From 7eb9a06ef53e727dc5775121fddebbbada60b907 Mon Sep 17 00:00:00 2001 From: Git User Date: Wed, 3 Apr 2019 04:01:20 -0700 Subject: [PATCH 0001/1061] Initial empty repository From 6f107f7e3579fdf01b55760b212c957b7cbbaf65 Mon Sep 17 00:00:00 2001 From: Maheshwar Ajja Date: Wed, 5 Aug 2020 14:29:29 -0700 Subject: [PATCH 0002/1061] techpack: video: add video driver Add initial video driver files. Change-Id: Icd48bbf31e435cf36f149d6c3267cf3a4d7913b3 Signed-off-by: Maheshwar Ajja --- Makefile | 46 + config/waipio_video.conf | 1 + config/waipio_video.h | 8 + driver/platform/waipio/inc/msm_vidc_waipio.h | 13 + driver/platform/waipio/src/msm_vidc_waipio.c | 236 ++ driver/variant/iris2/inc/msm_vidc_iris2.h | 15 + driver/variant/iris2/src/msm_vidc_iris2.c | 558 +++++ driver/vidc/inc/fixedpoint.h | 68 + driver/vidc/inc/hfi_packet.h | 53 + driver/vidc/inc/msm_vdec.h | 15 + driver/vidc/inc/msm_venc.h | 15 + driver/vidc/inc/msm_vidc.h | 48 + driver/vidc/inc/msm_vidc_bus.h | 248 ++ driver/vidc/inc/msm_vidc_core.h | 106 + driver/vidc/inc/msm_vidc_debug.h | 94 + driver/vidc/inc/msm_vidc_driver.h | 41 + driver/vidc/inc/msm_vidc_dt.h | 227 ++ driver/vidc/inc/msm_vidc_inst.h | 107 + driver/vidc/inc/msm_vidc_internal.h | 468 ++++ driver/vidc/inc/msm_vidc_memory.h | 23 + driver/vidc/inc/msm_vidc_platform.h | 78 + driver/vidc/inc/msm_vidc_v4l2.h | 55 + driver/vidc/inc/msm_vidc_vb2.h | 25 + driver/vidc/inc/venus_hfi.h | 71 + driver/vidc/src/hfi_packet.c | 21 + driver/vidc/src/msm_vdec.c | 108 + driver/vidc/src/msm_venc.c | 106 + driver/vidc/src/msm_vidc.c | 457 ++++ driver/vidc/src/msm_vidc_debug.c | 16 + driver/vidc/src/msm_vidc_driver.c | 151 ++ driver/vidc/src/msm_vidc_dt.c | 970 ++++++++ driver/vidc/src/msm_vidc_memory.c | 407 +++ driver/vidc/src/msm_vidc_platform.c | 133 + driver/vidc/src/msm_vidc_probe.c | 367 +++ driver/vidc/src/msm_vidc_v4l2.c | 200 ++ driver/vidc/src/msm_vidc_vb2.c | 44 + driver/vidc/src/venus_hfi.c | 2351 ++++++++++++++++++ include/uapi/vidc/media/msm_media_info.h | 1355 ++++++++++ include/uapi/vidc/media/msm_vidc_utils.h | 32 + 39 files changed, 9337 insertions(+) create mode 100644 Makefile create mode 100644 config/waipio_video.conf create mode 100644 config/waipio_video.h create mode 100644 driver/platform/waipio/inc/msm_vidc_waipio.h create mode 100644 driver/platform/waipio/src/msm_vidc_waipio.c create mode 100644 driver/variant/iris2/inc/msm_vidc_iris2.h create mode 100644 driver/variant/iris2/src/msm_vidc_iris2.c create mode 100644 driver/vidc/inc/fixedpoint.h create mode 100644 driver/vidc/inc/hfi_packet.h create mode 100644 driver/vidc/inc/msm_vdec.h create mode 100644 driver/vidc/inc/msm_venc.h create mode 100644 driver/vidc/inc/msm_vidc.h create mode 100644 driver/vidc/inc/msm_vidc_bus.h create mode 100644 driver/vidc/inc/msm_vidc_core.h create mode 100644 driver/vidc/inc/msm_vidc_debug.h create mode 100644 driver/vidc/inc/msm_vidc_driver.h create mode 100644 driver/vidc/inc/msm_vidc_dt.h create mode 100644 driver/vidc/inc/msm_vidc_inst.h create mode 100644 driver/vidc/inc/msm_vidc_internal.h create mode 100644 driver/vidc/inc/msm_vidc_memory.h create mode 100644 driver/vidc/inc/msm_vidc_platform.h create mode 100644 driver/vidc/inc/msm_vidc_v4l2.h create mode 100644 driver/vidc/inc/msm_vidc_vb2.h create mode 100644 driver/vidc/inc/venus_hfi.h create mode 100644 driver/vidc/src/hfi_packet.c create mode 100644 driver/vidc/src/msm_vdec.c create mode 100644 driver/vidc/src/msm_venc.c create mode 100644 driver/vidc/src/msm_vidc.c create mode 100644 driver/vidc/src/msm_vidc_debug.c create mode 100644 driver/vidc/src/msm_vidc_driver.c create mode 100644 driver/vidc/src/msm_vidc_dt.c create mode 100644 driver/vidc/src/msm_vidc_memory.c create mode 100644 driver/vidc/src/msm_vidc_platform.c create mode 100644 driver/vidc/src/msm_vidc_probe.c create mode 100644 driver/vidc/src/msm_vidc_v4l2.c create mode 100644 driver/vidc/src/msm_vidc_vb2.c create mode 100644 driver/vidc/src/venus_hfi.c create mode 100644 include/uapi/vidc/media/msm_media_info.h create mode 100644 include/uapi/vidc/media/msm_vidc_utils.h diff --git a/Makefile b/Makefile new file mode 100644 index 0000000000..a14220aa9b --- /dev/null +++ b/Makefile @@ -0,0 +1,46 @@ +# SPDX-License-Identifier: GPL-2.0-only + +# auto-detect subdirs +ifneq ($(CONFIG_ARCH_QTI_VM), y) +ifeq ($(CONFIG_ARCH_WAIPIO), y) +include $(srctree)/techpack/video/config/waipio_video.conf +LINUXINCLUDE += -include $(srctree)/techpack/video/config/waipio_video.h +endif +endif + +LINUXINCLUDE += -I$(srctree)/techpack/video/include \ + -I$(srctree)/techpack/video/include/uapi \ + -I$(srctree)/techpack/video/include/uapi/vidc \ + -I$(srctree)/techpack/video/driver/vidc/inc \ + -I$(srctree)/techpack/video/driver/platform/waipio/inc \ + -I$(srctree)/techpack/video/driver/variant/iris2/inc + +USERINCLUDE += -I$(srctree)/techpack/video/include/uapi + +ccflags-y += -I$(srctree)/techpack/video/driver/vidc/src/ \ + -I$(srctree)/techpack/video/driver/platform/waipio/src/ \ + -I$(srctree)/techpack/video/driver/variant/iris2/src + +msm-vidc-objs := driver/vidc/src/msm_vidc_v4l2.o \ + driver/vidc/src/msm_vidc_vb2.o \ + driver/vidc/src/msm_vidc.o \ + driver/vidc/src/msm_vdec.o \ + driver/vidc/src/msm_venc.o \ + driver/vidc/src/msm_vidc_vb2.o \ + driver/vidc/src/msm_vidc_driver.o \ + driver/vidc/src/msm_vidc_probe.o \ + driver/vidc/src/msm_vidc_dt.o \ + driver/vidc/src/msm_vidc_platform.o \ + driver/vidc/src/msm_vidc_debug.o \ + driver/vidc/src/msm_vidc_memory.o \ + driver/vidc/src/venus_hfi.o + +ifneq ($(CONFIG_ARCH_QTI_VM), y) +ifeq ($(CONFIG_ARCH_WAIPIO), y) +msm-vidc-objs += driver/platform/waipio/src/msm_vidc_waipio.o \ + driver/hfi/iris2/src/msm_vidc_iris2.o +endif +endif + +obj-$(CONFIG_MSM_VIDC_V4L2) := msm-vidc.o + diff --git a/config/waipio_video.conf b/config/waipio_video.conf new file mode 100644 index 0000000000..10a22741de --- /dev/null +++ b/config/waipio_video.conf @@ -0,0 +1 @@ +export CONFIG_MSM_VIDC_V4L2=m diff --git a/config/waipio_video.h b/config/waipio_video.h new file mode 100644 index 0000000000..6bc2c01784 --- /dev/null +++ b/config/waipio_video.h @@ -0,0 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) 2020, The Linux Foundation. All rights reserved. + */ + +#define CONFIG_MSM_VIDC_V4L2 1 +#define CONFIG_MSM_VIDC_IRIS2 1 +#define CONFIG_MSM_VIDC_WAIPIO 1 diff --git a/driver/platform/waipio/inc/msm_vidc_waipio.h b/driver/platform/waipio/inc/msm_vidc_waipio.h new file mode 100644 index 0000000000..2ca612c01d --- /dev/null +++ b/driver/platform/waipio/inc/msm_vidc_waipio.h @@ -0,0 +1,13 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) 2020, The Linux Foundation. All rights reserved. + */ + +#ifndef _MSM_VIDC_WAIPIO_H_ +#define _MSM_VIDC_WAIPIO_H_ + +#include "msm_vidc_core.h" + +int msm_vidc_init_platform_waipio(struct msm_vidc_core *core); + +#endif // _MSM_VIDC_WAIPIO_H_ diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c new file mode 100644 index 0000000000..e1632b00f6 --- /dev/null +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -0,0 +1,236 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2020, The Linux Foundation. All rights reserved. + */ + +#include + +#include "msm_vidc_waipio.h" +#include "msm_vidc_platform.h" +#include "msm_vidc_debug.h" +#include "msm_vidc_internal.h" +#include "msm_vidc_core.h" + +#define DDR_TYPE_LPDDR4 0x6 +#define DDR_TYPE_LPDDR4X 0x7 +#define DDR_TYPE_LPDDR5 0x8 +#define DDR_TYPE_LPDDR5X 0x9 + +#define UBWC_CONFIG(mco, mlo, hbo, bslo, bso, rs, mc, ml, hbb, bsl, bsp) \ +{ \ + .override_bit_info.max_channel_override = mco, \ + .override_bit_info.mal_length_override = mlo, \ + .override_bit_info.hb_override = hbo, \ + .override_bit_info.bank_swzl_level_override = bslo, \ + .override_bit_info.bank_spreading_override = bso, \ + .override_bit_info.reserved = rs, \ + .max_channels = mc, \ + .mal_length = ml, \ + .highest_bank_bit = hbb, \ + .bank_swzl_level = bsl, \ + .bank_spreading = bsp, \ +} + +#define ENC MSM_VIDC_ENCODER +#define DEC MSM_VIDC_DECODER +#define H264 MSM_VIDC_H264 +#define HEVC MSM_VIDC_HEVC +#define VP9 MSM_VIDC_VP9 +#define MPEG2 MSM_VIDC_MPEG2 +#define CODECS_ALL (MSM_VIDC_H264 | MSM_VIDC_HEVC | \ + MSM_VIDC_VP9 | MSM_VIDC_MPEG2) + +static struct msm_vidc_core_data core_data_waipio[] = { + /* {type, value} */ + {ENC_CODECS, H264|HEVC}, + {DEC_CODECS, H264|HEVC|VP9|MPEG2}, + {MAX_SESSION_COUNT, 16}, + {MAX_SECURE_SESSION_COUNT, 3}, + {MAX_MBPF, 173056}, /* (8192x4320)/256 + (4096x2176)/256*/ + {MAX_MBPS, 7833600}, /* max_load + * 7680x4320@60fps or 3840x2176@240fps + * which is greater than 4096x2176@120fps, + * 8192x4320@48fps + */ + {MAX_MBPF_HQ, 8160}, /* ((1920x1088)/256) */ + {MAX_MBPS_HQ, 489600}, /* ((1920x1088)/256)@60fps */ + {MAX_MBPF_B_FRAME, 32640}, /* 3840x2176/256 */ + {MAX_MBPS_B_FRAME, 1958400}, /* 3840x2176/256 MBs@60fps */ + {SW_PC, 1}, + {SW_PC_DELAY, 1500}, /* 1500 ms */ + {FW_UNLOAD, 0}, + {FW_UNLOAD_DELAY, 1000}, /* 1000 ms */ + {HW_RESPONSE_TIMEOUT, 1000}, /* 1000 ms */ + {DEBUG_TIMEOUT, 0}, + {PREFIX_BUF_COUNT_PIX, 18}, + {PREFIX_BUF_SIZE_PIX, 13434880}, /* Calculated by VENUS_BUFFER_SIZE for 4096x2160 UBWC */ + {PREFIX_BUF_COUNT_NON_PIX, 1}, + {PREFIX_BUF_SIZE_NON_PIX, 209715200}, /* + * Internal buffer size is calculated for secure decode session + * of resolution 4k (4096x2160) + * Internal buf size = calculate_scratch_size() + + * calculate_scratch1_size() + calculate_persist1_size() + * Take maximum between VP9 10bit, HEVC 10bit, AVC, MPEG2 secure + * decoder sessions + */ + {PAGEFAULT_NON_FATAL, 1}, + {PAGETABLE_CACHING, 0}, + {DCVS, 1}, + {DECODE_BATCH, 1}, + {DECODE_BATCH_TIMEOUT, 200}, + {AV_SYNC_WINDOW_SIZE, 40}, +}; + +static struct msm_vidc_instance_data instance_data_waipio[] = { + /* {type, domains, codecs, min, max, step_or_menu, value} */ + {FRAME_WIDTH, ENC|DEC, CODECS_ALL, 128, 8192, 1, 1920}, + {FRAME_HEIGHT, ENC|DEC, CODECS_ALL, 128, 8192, 1, 1080}, + /* (8192 * 4320) / 256 */ + {MBPF, ENC|DEC, CODECS_ALL, 64, 138240, 1, 138240}, + /* ((1920 * 1088) / 256) * 960 fps */ + {MBPS, ENC|DEC, CODECS_ALL, 64, 7833600, 1, 7833600}, + {FRAME_RATE, ENC|DEC, CODECS_ALL, 1, 960, 1, 30}, + {BIT_RATE, ENC|DEC, CODECS_ALL, 1, 220000000, 1, 20000000}, + {BIT_RATE, ENC, HEVC, 1, 160000000, 1, 20000000}, + {CABAC_BIT_RATE, ENC, H264, 1, 160000000, 1, 20000000}, + {SCALE_X, ENC, CODECS_ALL, 8192, 65536, 1, 8192}, + {SCALE_Y, ENC, CODECS_ALL, 8192, 65536, 1, 8192}, + {SCALE_X, DEC, CODECS_ALL, 65536, 65536, 1, 65536}, + {SCALE_Y, DEC, CODECS_ALL, 65536, 65536, 1, 65536}, + {B_FRAME, ENC, H264|HEVC, 0, 1, 1, 0}, + {HIER_P_LAYERS, ENC, H264|HEVC, 0, 6, 1, 0}, + {LTR_COUNT, ENC, H264|HEVC, 0, 2, 1, 0}, + /* ((4096 * 2304) / 256) * 60 fps */ + {POWER_SAVE_MBPS, ENC, CODECS_ALL, + 0, 2211840, 1, 2211840}, + {I_FRAME_QP, ENC, H264|HEVC, 0, 51, 1, 10}, + {P_FRAME_QP, ENC, H264|HEVC, 0, 51, 1, 20}, + {B_FRAME_QP, ENC, H264|HEVC, 0, 51, 1, 20}, + {I_FRAME_QP, ENC, VP9, 0, 127, 1, 20}, + {P_FRAME_QP, ENC, VP9, 0, 127, 1, 40}, + {B_FRAME_QP, ENC, VP9, 0, 127, 1, 40}, + /* 10 slices */ + {SLICE_BYTE, ENC, H264|HEVC, 1, 10, 1, 10}, + {SLICE_MB, ENC, H264|HEVC, 1, 10, 1, 10}, + + /* Mpeg2 decoder specific */ + {FRAME_WIDTH, DEC, MPEG2, 128, 1920, 1, 1920}, + {FRAME_HEIGHT, DEC, MPEG2, 128, 1920, 1, 1080}, + /* (1920 * 1088) / 256 */ + {MBPF, DEC, MPEG2, 64, 8160, 1, 8160}, + /* ((1920 * 1088) / 256) * 30*/ + {MBPS, DEC, MPEG2, 64, 244800, 1, 244800}, + {FRAME_RATE, DEC, MPEG2, 1, 30, 1, 30}, + {BIT_RATE, DEC, MPEG2, 1, 40000000, 1, 20000000}, + + /* Secure usecase specific */ + {SECURE_FRAME_WIDTH, ENC|DEC, CODECS_ALL, 128, 4096, 1, 1920}, + {SECURE_FRAME_HEIGHT, ENC|DEC, CODECS_ALL, 128, 4096, 1, 1080}, + /* (4096 * 2304) / 256 */ + {SECURE_MBPF, ENC|DEC, CODECS_ALL, 64, 36864, 1, 36864}, + {SECURE_BIT_RATE, ENC|DEC, CODECS_ALL, 1, 40000000, 1, 20000000}, + + /* Batch Mode Decode */ + {BATCH_MBPF, DEC, CODECS_ALL, 64, 34816, 1, 34816}, + /* (4096 * 2176) / 256 */ + {BATCH_FRAME_RATE, DEC, CODECS_ALL, 1, 120, 1, 120}, + + /* Lossless encoding usecase specific */ + {LOSSLESS_FRAME_WIDTH, ENC, H264|HEVC, 128, 4096, 1, 1920}, + {LOSSLESS_FRAME_HEIGHT, ENC, H264|HEVC, 128, 4096, 1, 1080}, + /* (4096 * 2304) / 256 */ + {LOSSLESS_MBPF, ENC, H264|HEVC, 64, 36864, 1, 36864}, + + /* All intra encoding usecase specific */ + {ALL_INTRA_FRAME_RATE, ENC, H264|HEVC, 1, 240, 1, 30}, + + /* Image specific */ + {HEVC_IMAGE_FRAME_WIDTH, ENC, HEVC, 128, 512, 1, 512}, + {HEVC_IMAGE_FRAME_HEIGHT, ENC, HEVC, 128, 512, 1, 512}, + {HEIC_IMAGE_FRAME_WIDTH, ENC, HEVC, 512, 16384, 1, 16384}, + {HEIC_IMAGE_FRAME_HEIGHT, ENC, HEVC, 512, 16384, 1, 16384}, + + {MB_CYCLES_VSP, ENC, CODECS_ALL, 25, 25, 1, 25}, + {MB_CYCLES_VPP, ENC, CODECS_ALL, 675, 675, 1, 675}, + {MB_CYCLES_LP, ENC, CODECS_ALL, 320, 320, 1, 320}, + {MB_CYCLES_VSP, DEC, CODECS_ALL, 25, 25, 1, 25}, + {MB_CYCLES_VSP, DEC, VP9, 60, 60, 1, 60}, + {MB_CYCLES_VPP, DEC, CODECS_ALL, 200, 200, 1, 200}, + {MB_CYCLES_LP, DEC, CODECS_ALL, 200, 200, 1, 200}, + {MB_CYCLES_FW, ENC|DEC, CODECS_ALL, 326389, 326389, 1, 326389}, + {MB_CYCLES_FW_VPP, ENC|DEC, CODECS_ALL, 44156, 44156, 1, 44156}, +}; + +/* + * Custom conversion coefficients for resolution: 176x144 negative + * coeffs are converted to s4.9 format + * (e.g. -22 converted to ((1 << 13) - 22) + * 3x3 transformation matrix coefficients in s4.9 fixed point format + */ +static u32 vpe_csc_custom_matrix_coeff[MAX_MATRIX_COEFFS] = { + 440, 8140, 8098, 0, 460, 52, 0, 34, 463 +}; + +/* offset coefficients in s9 fixed point format */ +static u32 vpe_csc_custom_bias_coeff[MAX_BIAS_COEFFS] = { + 53, 0, 4 +}; + +/* clamping value for Y/U/V([min,max] for Y/U/V) */ +static u32 vpe_csc_custom_limit_coeff[MAX_LIMIT_COEFFS] = { + 16, 235, 16, 240, 16, 240 +}; + +/* Default UBWC config for LPDDR5 */ +static struct msm_vidc_ubwc_config_data ubwc_config_waipio[] = { + UBWC_CONFIG(1, 1, 1, 0, 0, 0, 8, 32, 16, 0, 0), +}; + +static struct msm_vidc_platform_data waipio_data = { + .core_data = core_data_waipio, + .core_data_size = ARRAY_SIZE(core_data_waipio), + .instance_data = instance_data_waipio, + .instance_data_size = ARRAY_SIZE(instance_data_waipio), + .csc_data.vpe_csc_custom_bias_coeff = vpe_csc_custom_bias_coeff, + .csc_data.vpe_csc_custom_matrix_coeff = vpe_csc_custom_matrix_coeff, + .csc_data.vpe_csc_custom_limit_coeff = vpe_csc_custom_limit_coeff, + .ubwc_config = ubwc_config_waipio, +}; + +static int msm_vidc_init_data(struct msm_vidc_core *core) +{ + int rc = 0; + struct msm_vidc_ubwc_config_data *ubwc_config; + u32 ddr_type; + + if (!core || !core->platform) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + d_vpr_h("%s: initialize waipio data\n", __func__); + + ubwc_config = waipio_data.ubwc_config; + ddr_type = of_fdt_get_ddrtype(); + if (ddr_type == -ENOENT) + d_vpr_e("Failed to get ddr type, use LPDDR5\n"); + + if (ddr_type == DDR_TYPE_LPDDR4 || ddr_type == DDR_TYPE_LPDDR4X) + ubwc_config->highest_bank_bit = 0xf; + d_vpr_h("%s: DDR Type 0x%x hbb 0x%x\n", __func__, + ddr_type, ubwc_config->highest_bank_bit); + + core->platform->data = waipio_data; + + return rc; +} + +int msm_vidc_init_platform_waipio(struct msm_vidc_core *core) +{ + int rc = 0; + + rc = msm_vidc_init_data(core); + if (rc) + return rc; + + return 0; +} diff --git a/driver/variant/iris2/inc/msm_vidc_iris2.h b/driver/variant/iris2/inc/msm_vidc_iris2.h new file mode 100644 index 0000000000..4e67f0e2a9 --- /dev/null +++ b/driver/variant/iris2/inc/msm_vidc_iris2.h @@ -0,0 +1,15 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) 2020, The Linux Foundation. All rights reserved. + */ + +#include "msm_vidc_core.h" + +//#if defined(CONFIG_MSM_VIDC_IRIS2) +int msm_vidc_init_iris2(struct msm_vidc_core *core); +//#else +//static inline int msm_vidc_init_iris2(struct msm_vidc_core *core) +//{ +// return -EINVAL; +//} +//#endif diff --git a/driver/variant/iris2/src/msm_vidc_iris2.c b/driver/variant/iris2/src/msm_vidc_iris2.c new file mode 100644 index 0000000000..f1c8bb3317 --- /dev/null +++ b/driver/variant/iris2/src/msm_vidc_iris2.c @@ -0,0 +1,558 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2020, The Linux Foundation. All rights reserved. + */ + +#include + +#include "msm_vidc_iris2.h" +#include "venus_hfi.h" +#include "msm_vidc_core.h" +#include "msm_vidc_dt.h" +#include "msm_vidc_internal.h" +#include "msm_vidc_debug.h" + + +#define VBIF_BASE_OFFS_IRIS2 0x00080000 +#define CPU_BASE_OFFS_IRIS2 0x000A0000 +#define AON_BASE_OFFS 0x000E0000 +#define CPU_CS_BASE_OFFS_IRIS2 (CPU_BASE_OFFS_IRIS2) +#define CPU_IC_BASE_OFFS_IRIS2 (CPU_BASE_OFFS_IRIS2) + +#define CPU_CS_A2HSOFTINTCLR_IRIS2 (CPU_CS_BASE_OFFS_IRIS2 + 0x1C) +#define CPU_CS_VCICMD_IRIS2 (CPU_CS_BASE_OFFS_IRIS2 + 0x20) +#define CPU_CS_VCICMDARG0_IRIS2 (CPU_CS_BASE_OFFS_IRIS2 + 0x24) +#define CPU_CS_VCICMDARG1_IRIS2 (CPU_CS_BASE_OFFS_IRIS2 + 0x28) +#define CPU_CS_VCICMDARG2_IRIS2 (CPU_CS_BASE_OFFS_IRIS2 + 0x2C) +#define CPU_CS_VCICMDARG3_IRIS2 (CPU_CS_BASE_OFFS_IRIS2 + 0x30) +#define CPU_CS_VMIMSG_IRIS2 (CPU_CS_BASE_OFFS_IRIS2 + 0x34) +#define CPU_CS_VMIMSGAG0_IRIS2 (CPU_CS_BASE_OFFS_IRIS2 + 0x38) +#define CPU_CS_VMIMSGAG1_IRIS2 (CPU_CS_BASE_OFFS_IRIS2 + 0x3C) +#define CPU_CS_SCIACMD_IRIS2 (CPU_CS_BASE_OFFS_IRIS2 + 0x48) +#define CPU_CS_H2XSOFTINTEN_IRIS2 (CPU_CS_BASE_OFFS_IRIS2 + 0x148) + +/* HFI_CTRL_STATUS */ +#define CPU_CS_SCIACMDARG0_IRIS2 (CPU_CS_BASE_OFFS_IRIS2 + 0x4C) +#define CPU_CS_SCIACMDARG0_HFI_CTRL_ERROR_STATUS_BMSK_IRIS2 0xfe +#define CPU_CS_SCIACMDARG0_HFI_CTRL_PC_READY_IRIS2 0x100 +#define CPU_CS_SCIACMDARG0_HFI_CTRL_INIT_IDLE_MSG_BMSK_IRIS2 0x40000000 + +/* HFI_QTBL_INFO */ +#define CPU_CS_SCIACMDARG1_IRIS2 (CPU_CS_BASE_OFFS_IRIS2 + 0x50) + +/* HFI_QTBL_ADDR */ +#define CPU_CS_SCIACMDARG2_IRIS2 (CPU_CS_BASE_OFFS_IRIS2 + 0x54) + +/* HFI_VERSION_INFO */ +#define CPU_CS_SCIACMDARG3_IRIS2 (CPU_CS_BASE_OFFS_IRIS2 + 0x58) + +/* SFR_ADDR */ +#define CPU_CS_SCIBCMD_IRIS2 (CPU_CS_BASE_OFFS_IRIS2 + 0x5C) + +/* MMAP_ADDR */ +#define CPU_CS_SCIBCMDARG0_IRIS2 (CPU_CS_BASE_OFFS_IRIS2 + 0x60) + +/* UC_REGION_ADDR */ +#define CPU_CS_SCIBARG1_IRIS2 (CPU_CS_BASE_OFFS_IRIS2 + 0x64) + +/* UC_REGION_ADDR */ +#define CPU_CS_SCIBARG2_IRIS2 (CPU_CS_BASE_OFFS_IRIS2 + 0x68) + +/* FAL10 Feature Control */ +#define CPU_CS_X2RPMh_IRIS2 (CPU_CS_BASE_OFFS_IRIS2 + 0x168) +#define CPU_CS_X2RPMh_MASK0_BMSK_IRIS2 0x1 +#define CPU_CS_X2RPMh_MASK0_SHFT_IRIS2 0x0 +#define CPU_CS_X2RPMh_MASK1_BMSK_IRIS2 0x2 +#define CPU_CS_X2RPMh_MASK1_SHFT_IRIS2 0x1 +#define CPU_CS_X2RPMh_SWOVERRIDE_BMSK_IRIS2 0x4 +#define CPU_CS_X2RPMh_SWOVERRIDE_SHFT_IRIS2 0x3 + +#define CPU_IC_SOFTINT_IRIS2 (CPU_IC_BASE_OFFS_IRIS2 + 0x150) +#define CPU_IC_SOFTINT_H2A_SHFT_IRIS2 0x0 + +/* + * -------------------------------------------------------------------------- + * MODULE: wrapper + * -------------------------------------------------------------------------- + */ +#define WRAPPER_BASE_OFFS_IRIS2 0x000B0000 +#define WRAPPER_INTR_STATUS_IRIS2 (WRAPPER_BASE_OFFS_IRIS2 + 0x0C) +#define WRAPPER_INTR_STATUS_A2HWD_BMSK_IRIS2 0x8 +#define WRAPPER_INTR_STATUS_A2H_BMSK_IRIS2 0x4 + +#define WRAPPER_INTR_MASK_IRIS2 (WRAPPER_BASE_OFFS_IRIS2 + 0x10) +#define WRAPPER_INTR_MASK_A2HWD_BMSK_IRIS2 0x8 +#define WRAPPER_INTR_MASK_A2HCPU_BMSK_IRIS2 0x4 + +#define WRAPPER_CPU_CLOCK_CONFIG_IRIS2 (WRAPPER_BASE_OFFS_IRIS2 + 0x2000) +#define WRAPPER_CPU_CGC_DIS_IRIS2 (WRAPPER_BASE_OFFS_IRIS2 + 0x2010) +#define WRAPPER_CPU_STATUS_IRIS2 (WRAPPER_BASE_OFFS_IRIS2 + 0x2014) + +#define WRAPPER_DEBUG_BRIDGE_LPI_CONTROL_IRIS2 (WRAPPER_BASE_OFFS_IRIS2 + 0x54) +#define WRAPPER_DEBUG_BRIDGE_LPI_STATUS_IRIS2 (WRAPPER_BASE_OFFS_IRIS2 + 0x58) +/* + * -------------------------------------------------------------------------- + * MODULE: tz_wrapper + * -------------------------------------------------------------------------- + */ +#define WRAPPER_TZ_BASE_OFFS 0x000C0000 +#define WRAPPER_TZ_CPU_CLOCK_CONFIG (WRAPPER_TZ_BASE_OFFS) +#define WRAPPER_TZ_CPU_STATUS (WRAPPER_TZ_BASE_OFFS + 0x10) + +#define CTRL_INIT_IRIS2 CPU_CS_SCIACMD_IRIS2 + +#define CTRL_STATUS_IRIS2 CPU_CS_SCIACMDARG0_IRIS2 +#define CTRL_ERROR_STATUS__M_IRIS2 \ + CPU_CS_SCIACMDARG0_HFI_CTRL_ERROR_STATUS_BMSK_IRIS2 +#define CTRL_INIT_IDLE_MSG_BMSK_IRIS2 \ + CPU_CS_SCIACMDARG0_HFI_CTRL_INIT_IDLE_MSG_BMSK_IRIS2 +#define CTRL_STATUS_PC_READY_IRIS2 \ + CPU_CS_SCIACMDARG0_HFI_CTRL_PC_READY_IRIS2 + + +#define QTBL_INFO_IRIS2 CPU_CS_SCIACMDARG1_IRIS2 + +#define QTBL_ADDR_IRIS2 CPU_CS_SCIACMDARG2_IRIS2 + +#define VERSION_INFO_IRIS2 CPU_CS_SCIACMDARG3_IRIS2 + +#define SFR_ADDR_IRIS2 CPU_CS_SCIBCMD_IRIS2 +#define MMAP_ADDR_IRIS2 CPU_CS_SCIBCMDARG0_IRIS2 +#define UC_REGION_ADDR_IRIS2 CPU_CS_SCIBARG1_IRIS2 +#define UC_REGION_SIZE_IRIS2 CPU_CS_SCIBARG2_IRIS2 + +#define AON_WRAPPER_MVP_NOC_LPI_CONTROL (AON_BASE_OFFS) +#define AON_WRAPPER_MVP_NOC_LPI_STATUS (AON_BASE_OFFS + 0x4) + +/* + * -------------------------------------------------------------------------- + * MODULE: vcodec noc error log registers (iris2) + * -------------------------------------------------------------------------- + */ +#define VCODEC_NOC_VIDEO_A_NOC_BASE_OFFS 0x00010000 +#define VCODEC_NOC_ERL_MAIN_SWID_LOW 0x00011200 +#define VCODEC_NOC_ERL_MAIN_SWID_HIGH 0x00011204 +#define VCODEC_NOC_ERL_MAIN_MAINCTL_LOW 0x00011208 +#define VCODEC_NOC_ERL_MAIN_ERRVLD_LOW 0x00011210 +#define VCODEC_NOC_ERL_MAIN_ERRCLR_LOW 0x00011218 +#define VCODEC_NOC_ERL_MAIN_ERRLOG0_LOW 0x00011220 +#define VCODEC_NOC_ERL_MAIN_ERRLOG0_HIGH 0x00011224 +#define VCODEC_NOC_ERL_MAIN_ERRLOG1_LOW 0x00011228 +#define VCODEC_NOC_ERL_MAIN_ERRLOG1_HIGH 0x0001122C +#define VCODEC_NOC_ERL_MAIN_ERRLOG2_LOW 0x00011230 +#define VCODEC_NOC_ERL_MAIN_ERRLOG2_HIGH 0x00011234 +#define VCODEC_NOC_ERL_MAIN_ERRLOG3_LOW 0x00011238 +#define VCODEC_NOC_ERL_MAIN_ERRLOG3_HIGH 0x0001123C + +static int __interrupt_init_iris2(struct msm_vidc_core *vidc_core) +{ + u32 mask_val = 0; + struct msm_vidc_core *core = vidc_core; + + if (!core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + /* All interrupts should be disabled initially 0x1F6 : Reset value */ + mask_val = __read_register(core, WRAPPER_INTR_MASK_IRIS2); + + /* Write 0 to unmask CPU and WD interrupts */ + mask_val &= ~(WRAPPER_INTR_MASK_A2HWD_BMSK_IRIS2| + WRAPPER_INTR_MASK_A2HCPU_BMSK_IRIS2); + __write_register(core, WRAPPER_INTR_MASK_IRIS2, mask_val); + + return 0; +} + +static int __setup_ucregion_memory_map_iris2(struct msm_vidc_core *vidc_core) +{ + struct msm_vidc_core *core = vidc_core; + + if (!core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + __write_register(core, UC_REGION_ADDR_IRIS2, + (u32)core->iface_q_table.align_device_addr); + __write_register(core, UC_REGION_SIZE_IRIS2, SHARED_QSIZE); + __write_register(core, QTBL_ADDR_IRIS2, + (u32)core->iface_q_table.align_device_addr); + __write_register(core, QTBL_INFO_IRIS2, 0x01); + if (core->sfr.align_device_addr) + __write_register(core, SFR_ADDR_IRIS2, + (u32)core->sfr.align_device_addr); + /* update queues vaddr for debug purpose */ + __write_register(core, CPU_CS_VCICMDARG0_IRIS2, + (u32)core->iface_q_table.align_virtual_addr); + __write_register(core, CPU_CS_VCICMDARG1_IRIS2, + (u32)((u64)core->iface_q_table.align_virtual_addr >> 32)); + + return 0; +} + +static int __power_off_iris2(struct msm_vidc_core *vidc_core) +{ + u32 lpi_status, reg_status = 0, count = 0, max_count = 10; + struct msm_vidc_core *core = vidc_core; + + if (!core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (!core->power_enabled) + return 0; + + if (!(core->intr_status & WRAPPER_INTR_STATUS_A2HWD_BMSK_IRIS2)) + disable_irq_nosync(core->dt->irq); + core->intr_status = 0; + + /* HPG 6.1.2 Step 1 */ + __write_register(core, CPU_CS_X2RPMh_IRIS2, 0x3); + + /* HPG 6.1.2 Step 2, noc to low power */ + //if (core->res->vpu_ver == VPU_VERSION_IRIS2_1) + // goto skip_aon_mvp_noc; + + __write_register(core, AON_WRAPPER_MVP_NOC_LPI_CONTROL, 0x1); + while (!reg_status && count < max_count) { + lpi_status = + __read_register(core, + AON_WRAPPER_MVP_NOC_LPI_STATUS); + reg_status = lpi_status & BIT(0); + d_vpr_h("Noc: lpi_status %d noc_status %d (count %d)\n", + lpi_status, reg_status, count); + usleep_range(50, 100); + count++; + } + if (count == max_count) + d_vpr_e("NOC not in qaccept status %d\n", reg_status); + +//skip_aon_mvp_noc: + /* HPG 6.1.2 Step 3, debug bridge to low power */ + __write_register(core, + WRAPPER_DEBUG_BRIDGE_LPI_CONTROL_IRIS2, 0x7); + reg_status = 0; + count = 0; + while ((reg_status != 0x7) && count < max_count) { + lpi_status = __read_register(core, + WRAPPER_DEBUG_BRIDGE_LPI_STATUS_IRIS2); + reg_status = lpi_status & 0x7; + d_vpr_h("DBLP Set : lpi_status %d reg_status %d (count %d)\n", + lpi_status, reg_status, count); + usleep_range(50, 100); + count++; + } + if (count == max_count) + d_vpr_e("DBLP Set: status %d\n", reg_status); + + /* HPG 6.1.2 Step 4, debug bridge to lpi release */ + __write_register(core, + WRAPPER_DEBUG_BRIDGE_LPI_CONTROL_IRIS2, 0x0); + lpi_status = 0x1; + count = 0; + while (lpi_status && count < max_count) { + lpi_status = __read_register(core, + WRAPPER_DEBUG_BRIDGE_LPI_STATUS_IRIS2); + d_vpr_h("DBLP Release: lpi_status %d(count %d)\n", + lpi_status, count); + usleep_range(50, 100); + count++; + } + if (count == max_count) + d_vpr_e("DBLP Release: lpi_status %d\n", lpi_status); + + /* HPG 6.1.2 Step 6 */ + __disable_unprepare_clks(core); + + /* HPG 6.1.2 Step 5 */ + if (__disable_regulators(core)) + d_vpr_e("%s: Failed to disable regulators\n", __func__); + + if (__unvote_buses(core)) + d_vpr_e("%s: Failed to unvote for buses\n", __func__); + core->power_enabled = false; + + return 0; +} + +static int __prepare_pc_iris2(struct msm_vidc_core *vidc_core) +{ + int rc = 0; + u32 wfi_status = 0, idle_status = 0, pc_ready = 0; + u32 ctrl_status = 0; + int count = 0; + const int max_tries = 10; + struct msm_vidc_core *core = vidc_core; + + if (!core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + ctrl_status = __read_register(core, CTRL_STATUS_IRIS2); + pc_ready = ctrl_status & CTRL_STATUS_PC_READY_IRIS2; + idle_status = ctrl_status & BIT(30); + + if (pc_ready) { + d_vpr_h("Already in pc_ready state\n"); + return 0; + } + + wfi_status = BIT(0) & __read_register(core, WRAPPER_TZ_CPU_STATUS); + if (!wfi_status || !idle_status) { + d_vpr_e("Skipping PC, wfi status not set\n"); + goto skip_power_off; + } + + rc = __prepare_pc(core); + if (rc) { + d_vpr_e("Failed __prepare_pc %d\n", rc); + goto skip_power_off; + } + + while (count < max_tries) { + wfi_status = BIT(0) & __read_register(core, + WRAPPER_TZ_CPU_STATUS); + ctrl_status = __read_register(core, + CTRL_STATUS_IRIS2); + if (wfi_status && (ctrl_status & CTRL_STATUS_PC_READY_IRIS2)) + break; + usleep_range(150, 250); + count++; + } + + if (count == max_tries) { + d_vpr_e("Skip PC. Core is not in right state\n"); + goto skip_power_off; + } + + return rc; + +skip_power_off: + d_vpr_e("Skip PC, wfi=%#x, idle=%#x, pcr=%#x, ctrl=%#x)\n", + wfi_status, idle_status, pc_ready, ctrl_status); + return -EAGAIN; +} + +static int __raise_interrupt_iris2(struct msm_vidc_core *vidc_core) +{ + struct msm_vidc_core *core = vidc_core; + + if (!core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + __write_register(core, CPU_IC_SOFTINT_IRIS2, + 1 << CPU_IC_SOFTINT_H2A_SHFT_IRIS2); + return 0; +} + +static int __watchdog_iris2(struct msm_vidc_core *vidc_core, u32 intr_status) +{ + int rc = 0; + struct msm_vidc_core *core = vidc_core; + + if (!core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (intr_status & WRAPPER_INTR_STATUS_A2HWD_BMSK_IRIS2) + rc = 1; + + return rc; +} + +static int __noc_error_info_iris2(struct msm_vidc_core *vidc_core) +{ + u32 val = 0; + struct msm_vidc_core *core = vidc_core; + + if (!core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + //if (core->res->vpu_ver == VPU_VERSION_IRIS2_1) + // return; + + val = __read_register(core, VCODEC_NOC_ERL_MAIN_SWID_LOW); + d_vpr_e("VCODEC_NOC_ERL_MAIN_SWID_LOW: %#x\n", val); + val = __read_register(core, VCODEC_NOC_ERL_MAIN_SWID_HIGH); + d_vpr_e("VCODEC_NOC_ERL_MAIN_SWID_HIGH: %#x\n", val); + val = __read_register(core, VCODEC_NOC_ERL_MAIN_MAINCTL_LOW); + d_vpr_e("VCODEC_NOC_ERL_MAIN_MAINCTL_LOW: %#x\n", val); + val = __read_register(core, VCODEC_NOC_ERL_MAIN_ERRVLD_LOW); + d_vpr_e("VCODEC_NOC_ERL_MAIN_ERRVLD_LOW: %#x\n", val); + val = __read_register(core, VCODEC_NOC_ERL_MAIN_ERRCLR_LOW); + d_vpr_e("VCODEC_NOC_ERL_MAIN_ERRCLR_LOW: %#x\n", val); + val = __read_register(core, VCODEC_NOC_ERL_MAIN_ERRLOG0_LOW); + d_vpr_e("VCODEC_NOC_ERL_MAIN_ERRLOG0_LOW: %#x\n", val); + val = __read_register(core, VCODEC_NOC_ERL_MAIN_ERRLOG0_HIGH); + d_vpr_e("VCODEC_NOC_ERL_MAIN_ERRLOG0_HIGH: %#x\n", val); + val = __read_register(core, VCODEC_NOC_ERL_MAIN_ERRLOG1_LOW); + d_vpr_e("VCODEC_NOC_ERL_MAIN_ERRLOG1_LOW: %#x\n", val); + val = __read_register(core, VCODEC_NOC_ERL_MAIN_ERRLOG1_HIGH); + d_vpr_e("VCODEC_NOC_ERL_MAIN_ERRLOG1_HIGH: %#x\n", val); + val = __read_register(core, VCODEC_NOC_ERL_MAIN_ERRLOG2_LOW); + d_vpr_e("VCODEC_NOC_ERL_MAIN_ERRLOG2_LOW: %#x\n", val); + val = __read_register(core, VCODEC_NOC_ERL_MAIN_ERRLOG2_HIGH); + d_vpr_e("VCODEC_NOC_ERL_MAIN_ERRLOG2_HIGH: %#x\n", val); + val = __read_register(core, VCODEC_NOC_ERL_MAIN_ERRLOG3_LOW); + d_vpr_e("VCODEC_NOC_ERL_MAIN_ERRLOG3_LOW: %#x\n", val); + val = __read_register(core, VCODEC_NOC_ERL_MAIN_ERRLOG3_HIGH); + d_vpr_e("VCODEC_NOC_ERL_MAIN_ERRLOG3_HIGH: %#x\n", val); + + return 0; +} + +static int __clear_interrupt_iris2(struct msm_vidc_core *vidc_core) +{ + u32 intr_status = 0, mask = 0; + struct msm_vidc_core *core = vidc_core; + + if (!core) { + d_vpr_e("%s: NULL core\n", __func__); + return 0; + } + + intr_status = __read_register(core, WRAPPER_INTR_STATUS_IRIS2); + mask = (WRAPPER_INTR_STATUS_A2H_BMSK_IRIS2| + WRAPPER_INTR_STATUS_A2HWD_BMSK_IRIS2| + CTRL_INIT_IDLE_MSG_BMSK_IRIS2); + + if (intr_status & mask) { + core->intr_status |= intr_status; + core->reg_count++; + d_vpr_l("INTERRUPT: times: %d interrupt_status: %d\n", + core->reg_count, intr_status); + } else { + core->spur_count++; + } + + __write_register(core, CPU_CS_A2HSOFTINTCLR_IRIS2, 1); + + return 0; +} + +static int __boot_firmware_iris2(struct msm_vidc_core *vidc_core) +{ + int rc = 0; + u32 ctrl_init_val = 0, ctrl_status = 0, count = 0, max_tries = 1000; + struct msm_vidc_core *core = vidc_core; + + if (!core) { + d_vpr_e("%s: NULL core\n", __func__); + return 0; + } + + ctrl_init_val = BIT(0); + + __write_register(core, CTRL_INIT_IRIS2, ctrl_init_val); + while (!ctrl_status && count < max_tries) { + ctrl_status = __read_register(core, CTRL_STATUS_IRIS2); + if ((ctrl_status & CTRL_ERROR_STATUS__M_IRIS2) == 0x4) { + d_vpr_e("invalid setting for UC_REGION\n"); + break; + } + + usleep_range(50, 100); + count++; + } + + if (count >= max_tries) { + d_vpr_e("Error booting up vidc firmware\n"); + rc = -ETIME; + } + + /* Enable interrupt before sending commands to venus */ + __write_register(core, CPU_CS_H2XSOFTINTEN_IRIS2, 0x1); + __write_register(core, CPU_CS_X2RPMh_IRIS2, 0x0); + + return rc; +} + +static struct msm_vidc_venus_ops iris2_ops = { + .boot_firmware = __boot_firmware_iris2, + .interrupt_init = __interrupt_init_iris2, + .raise_interrupt = __raise_interrupt_iris2, + .clear_interrupt = __clear_interrupt_iris2, + .setup_ucregion_memmap = __setup_ucregion_memory_map_iris2, + .clock_config_on_enable = NULL, + .reset_ahb2axi_bridge = __reset_ahb2axi_bridge, + .power_off = __power_off_iris2, + .prepare_pc = __prepare_pc_iris2, + .watchdog = __watchdog_iris2, + .noc_error_info = __noc_error_info_iris2, +}; + +static int msm_vidc_buffer_size(struct msm_vidc_inst *inst, + enum msm_vidc_buffer_type type) +{ + int rc = 0; + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + d_vpr_h("%s()\n", __func__); + return rc; +} + +static int msm_vidc_buffer_min_count(struct msm_vidc_inst *inst, + enum msm_vidc_buffer_type type) +{ + int rc = 0; + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + d_vpr_h("%s()\n", __func__); + return rc; +} + +static int msm_vidc_buffer_extra_count(struct msm_vidc_inst *inst, + enum msm_vidc_buffer_type type) +{ + int rc = 0; + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + d_vpr_h("%s()\n", __func__); + return rc; +} + +static struct msm_vidc_session_ops msm_session_ops = { + .buffer_size = msm_vidc_buffer_size, + .min_count = msm_vidc_buffer_min_count, + .extra_count = msm_vidc_buffer_extra_count, + .calc_freq = NULL, + .calc_bw = NULL, + .decide_work_route = NULL, + .decide_work_mode = NULL, + .decide_core_and_power_mode = NULL, +}; + +int msm_vidc_init_iris2(struct msm_vidc_core *core) +{ + if (!core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + d_vpr_h("%s()\n", __func__); + core->venus_ops = &iris2_ops; + core->session_ops = &msm_session_ops; + + return 0; +} diff --git a/driver/vidc/inc/fixedpoint.h b/driver/vidc/inc/fixedpoint.h new file mode 100644 index 0000000000..99ebc63241 --- /dev/null +++ b/driver/vidc/inc/fixedpoint.h @@ -0,0 +1,68 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) 2020, The Linux Foundation. All rights reserved. + */ + +#ifdef _FIXP_ARITH_H +#error "This implementation is meant to override fixp-arith.h, don't use both" +#endif + +#ifndef _FIXEDPOINT_H_ +#define _FIXEDPOINT_H_ + +#include +#include + +/* + * Normally would typedef'ed, but checkpatch doesn't like typedef. + * Also should be normally typedef'ed to intmax_t but that doesn't seem to be + * available in the kernel + */ +#define fp_t size_t + +/* (Arbitrarily) make the first 25% of the bits to be the fractional bits */ +#define FP_FRACTIONAL_BITS ((sizeof(fp_t) * 8) / 4) + +#define FP(__i, __f_n, __f_d) \ + ((((fp_t)(__i)) << FP_FRACTIONAL_BITS) + \ + (((__f_n) << FP_FRACTIONAL_BITS) / (__f_d))) + +#define FP_INT(__i) FP(__i, 0, 1) +#define FP_ONE FP_INT(1) +#define FP_ZERO FP_INT(0) + +static inline size_t fp_frac_base(void) +{ + return GENMASK(FP_FRACTIONAL_BITS - 1, 0); +} + +static inline size_t fp_frac(fp_t a) +{ + return a & GENMASK(FP_FRACTIONAL_BITS - 1, 0); +} + +static inline size_t fp_int(fp_t a) +{ + return a >> FP_FRACTIONAL_BITS; +} + +static inline size_t fp_round(fp_t a) +{ + /* is the fractional part >= frac_max / 2? */ + bool round_up = fp_frac(a) >= fp_frac_base() / 2; + + return fp_int(a) + round_up; +} + +static inline fp_t fp_mult(fp_t a, fp_t b) +{ + return (a * b) >> FP_FRACTIONAL_BITS; +} + + +static inline fp_t fp_div(fp_t a, fp_t b) +{ + return (a << FP_FRACTIONAL_BITS) / b; +} + +#endif diff --git a/driver/vidc/inc/hfi_packet.h b/driver/vidc/inc/hfi_packet.h new file mode 100644 index 0000000000..fcd7a22580 --- /dev/null +++ b/driver/vidc/inc/hfi_packet.h @@ -0,0 +1,53 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) 2020, The Linux Foundation. All rights reserved. + */ + +#ifndef _HFI_PACKET_H_ +#define _HFI_PACKET_H_ + +#include "msm_vidc_internal.h" +#include "msm_vidc_inst.h" +#include "msm_vidc_core.h" + +struct hfi_header { + u32 size; + u32 session_id; + u32 header_id; + u32 reserved[4]; + u32 num_packets; +}; + +struct hfi_packet { + u32 size; + u32 type; + u32 flags; + u32 payload_info; + u32 port; + u32 packet_id; + u32 reserved[2]; +}; + +struct hfi_buffer { + u32 type; + u32 index; + u64 base_address; + u32 addr_offset; + u32 buffer_size; + u32 data_offset; + u32 data_size; + u32 flags; + u64 timestamp; + u32 reserved[5]; +}; + +int hfi_packet_sys_init(struct msm_vidc_core *core, + void *packet, u32 packet_size); +int hfi_packet_image_version(struct msm_vidc_core *core, + void *packet, u32 packet_size); +int hfi_packet_sys_debug_config(struct msm_vidc_core *core, + void *packet, u32 packet_size, u32 mode); +int hfi_packet_sys_pc_prep(struct msm_vidc_core *core, + void *packet, u32 packet_size); + +#endif // _HFI_PACKET_H_ diff --git a/driver/vidc/inc/msm_vdec.h b/driver/vidc/inc/msm_vdec.h new file mode 100644 index 0000000000..d0da941a24 --- /dev/null +++ b/driver/vidc/inc/msm_vdec.h @@ -0,0 +1,15 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) 2020, The Linux Foundation. All rights reserved. + */ + +#ifndef _MSM_VDEC_H_ +#define _MSM_VDEC_H_ + +#include "msm_vidc_core.h" +#include "msm_vidc_inst.h" + +int msm_vdec_inst_init(struct msm_vidc_inst *inst); +int msm_vdec_ctrl_init(struct msm_vidc_inst *inst); + +#endif // _MSM_VDEC_H_ \ No newline at end of file diff --git a/driver/vidc/inc/msm_venc.h b/driver/vidc/inc/msm_venc.h new file mode 100644 index 0000000000..e1810d950a --- /dev/null +++ b/driver/vidc/inc/msm_venc.h @@ -0,0 +1,15 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) 2020, The Linux Foundation. All rights reserved. + */ + +#ifndef _MSM_VENC_H_ +#define _MSM_VENC_H_ + +#include "msm_vidc_core.h" +#include "msm_vidc_inst.h" + +int msm_venc_inst_init(struct msm_vidc_inst *inst); +int msm_venc_ctrl_init(struct msm_vidc_inst *inst); + +#endif // _MSM_VENC_H_ \ No newline at end of file diff --git a/driver/vidc/inc/msm_vidc.h b/driver/vidc/inc/msm_vidc.h new file mode 100644 index 0000000000..ba432ed066 --- /dev/null +++ b/driver/vidc/inc/msm_vidc.h @@ -0,0 +1,48 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) 2020, The Linux Foundation. All rights reserved. + */ + +#ifndef _MSM_VIDC_H_ +#define _MSM_VIDC_H_ + +#include +#include + +union msm_v4l2_cmd { + struct v4l2_decoder_cmd dec; + struct v4l2_encoder_cmd enc; +}; + +void *msm_vidc_open(void *core, u32 session_type); +int msm_vidc_close(void *instance); +int msm_vidc_suspend(int core_id); +int msm_vidc_querycap(void *instance, struct v4l2_capability *cap); +int msm_vidc_enum_fmt(void *instance, struct v4l2_fmtdesc *f); +int msm_vidc_s_fmt(void *instance, struct v4l2_format *f); +int msm_vidc_g_fmt(void *instance, struct v4l2_format *f); +int msm_vidc_s_ctrl(void *instance, struct v4l2_control *a); +int msm_vidc_s_ext_ctrl(void *instance, struct v4l2_ext_controls *a); +int msm_vidc_g_ext_ctrl(void *instance, struct v4l2_ext_controls *a); +int msm_vidc_g_ctrl(void *instance, struct v4l2_control *a); +int msm_vidc_reqbufs(void *instance, struct v4l2_requestbuffers *b); +int msm_vidc_release_buffer(void *instance, int buffer_type, + unsigned int buffer_index); +int msm_vidc_qbuf(void *instance, struct media_device *mdev, + struct v4l2_buffer *b); +int msm_vidc_dqbuf(void *instance, struct v4l2_buffer *b); +int msm_vidc_streamon(void *instance, enum v4l2_buf_type i); +int msm_vidc_query_ctrl(void *instance, struct v4l2_queryctrl *ctrl); +int msm_vidc_query_menu(void *instance, struct v4l2_querymenu *qmenu); +int msm_vidc_streamoff(void *instance, enum v4l2_buf_type i); +int msm_vidc_cmd(void *instance, union msm_v4l2_cmd *cmd); +int msm_vidc_poll(void *instance, struct file *filp, + struct poll_table_struct *pt); +int msm_vidc_subscribe_event(void *instance, + const struct v4l2_event_subscription *sub); +int msm_vidc_unsubscribe_event(void *instance, + const struct v4l2_event_subscription *sub); +int msm_vidc_dqevent(void *instance, struct v4l2_event *event); +int msm_vidc_g_crop(void *instance, struct v4l2_crop *a); +int msm_vidc_enum_framesizes(void *instance, struct v4l2_frmsizeenum *fsize); +#endif diff --git a/driver/vidc/inc/msm_vidc_bus.h b/driver/vidc/inc/msm_vidc_bus.h new file mode 100644 index 0000000000..28d7b4c8de --- /dev/null +++ b/driver/vidc/inc/msm_vidc_bus.h @@ -0,0 +1,248 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) 2020, The Linux Foundation. All rights reserved. + */ + +#ifndef __H_MSM_VIDC_BUS_DEFS_H__ +#define __H_MSM_VIDC_BUS_DEFS_H__ + +#include "fixedpoint.h" +#include "msm_vidc_debug.h" +#include "msm_vidc_internal.h" + +#define COMPRESSION_RATIO_MAX 5 + +enum vidc_bus_type { + PERF, + DDR, + LLCC, +}; + +/* + * Minimum dimensions for which to calculate bandwidth. + * This means that anything bandwidth(0, 0) == + * bandwidth(BASELINE_DIMENSIONS.width, BASELINE_DIMENSIONS.height) + */ +static const struct { + int height, width; +} BASELINE_DIMENSIONS = { + .width = 1280, + .height = 720, +}; + +/* converts Mbps to bps (the "b" part can be bits or bytes based on context) */ +#define kbps(__mbps) ((__mbps) * 1000) +#define bps(__mbps) (kbps(__mbps) * 1000) + +#define GENERATE_COMPRESSION_PROFILE(__bpp, __worst) { \ + .bpp = __bpp, \ + .ratio = __worst, \ +} + +/* + * The below table is a structural representation of the following table: + * Resolution | Bitrate | Compression Ratio | + * ............|............|.........................................| + * Width Height|Average High|Avg_8bpc Worst_8bpc Avg_10bpc Worst_10bpc| + * 1280 720| 7 14| 1.69 1.28 1.49 1.23| + * 1920 1080| 20 40| 1.69 1.28 1.49 1.23| + * 2560 1440| 32 64| 2.2 1.26 1.97 1.22| + * 3840 2160| 42 84| 2.2 1.26 1.97 1.22| + * 4096 2160| 44 88| 2.2 1.26 1.97 1.22| + * 4096 2304| 48 96| 2.2 1.26 1.97 1.22| + */ +static struct lut { + int frame_size; /* width x height */ + int frame_rate; + unsigned long bitrate; + struct { + int bpp; + fp_t ratio; + } compression_ratio[COMPRESSION_RATIO_MAX]; +} const LUT[] = { + { + .frame_size = 1280 * 720, + .frame_rate = 30, + .bitrate = 14, + .compression_ratio = { + GENERATE_COMPRESSION_PROFILE(8, + FP(1, 28, 100)), + GENERATE_COMPRESSION_PROFILE(10, + FP(1, 23, 100)), + } + }, + { + .frame_size = 1280 * 720, + .frame_rate = 60, + .bitrate = 22, + .compression_ratio = { + GENERATE_COMPRESSION_PROFILE(8, + FP(1, 28, 100)), + GENERATE_COMPRESSION_PROFILE(10, + FP(1, 23, 100)), + } + }, + { + .frame_size = 1920 * 1088, + .frame_rate = 30, + .bitrate = 40, + .compression_ratio = { + GENERATE_COMPRESSION_PROFILE(8, + FP(1, 28, 100)), + GENERATE_COMPRESSION_PROFILE(10, + FP(1, 23, 100)), + } + }, + { + .frame_size = 1920 * 1088, + .frame_rate = 60, + .bitrate = 64, + .compression_ratio = { + GENERATE_COMPRESSION_PROFILE(8, + FP(1, 28, 100)), + GENERATE_COMPRESSION_PROFILE(10, + FP(1, 23, 100)), + } + }, + { + .frame_size = 2560 * 1440, + .frame_rate = 30, + .bitrate = 64, + .compression_ratio = { + GENERATE_COMPRESSION_PROFILE(8, + FP(1, 26, 100)), + GENERATE_COMPRESSION_PROFILE(10, + FP(1, 22, 100)), + } + }, + { + .frame_size = 2560 * 1440, + .frame_rate = 60, + .bitrate = 102, + .compression_ratio = { + GENERATE_COMPRESSION_PROFILE(8, + FP(1, 26, 100)), + GENERATE_COMPRESSION_PROFILE(10, + FP(1, 22, 100)), + } + }, + { + .frame_size = 3840 * 2160, + .frame_rate = 30, + .bitrate = 84, + .compression_ratio = { + GENERATE_COMPRESSION_PROFILE(8, + FP(1, 26, 100)), + GENERATE_COMPRESSION_PROFILE(10, + FP(1, 22, 100)), + } + }, + { + .frame_size = 3840 * 2160, + .frame_rate = 60, + .bitrate = 134, + .compression_ratio = { + GENERATE_COMPRESSION_PROFILE(8, + FP(1, 26, 100)), + GENERATE_COMPRESSION_PROFILE(10, + FP(1, 22, 100)), + } + }, + { + .frame_size = 4096 * 2160, + .frame_rate = 30, + .bitrate = 88, + .compression_ratio = { + GENERATE_COMPRESSION_PROFILE(8, + FP(1, 26, 100)), + GENERATE_COMPRESSION_PROFILE(10, + FP(1, 22, 100)), + } + }, + { + .frame_size = 4096 * 2160, + .frame_rate = 60, + .bitrate = 141, + .compression_ratio = { + GENERATE_COMPRESSION_PROFILE(8, + FP(1, 26, 100)), + GENERATE_COMPRESSION_PROFILE(10, + FP(1, 22, 100)), + } + }, + { + .frame_size = 4096 * 2304, + .frame_rate = 30, + .bitrate = 96, + .compression_ratio = { + GENERATE_COMPRESSION_PROFILE(8, + FP(1, 26, 100)), + GENERATE_COMPRESSION_PROFILE(10, + FP(1, 22, 100)), + } + }, + { + .frame_size = 4096 * 2304, + .frame_rate = 60, + .bitrate = 154, + .compression_ratio = { + GENERATE_COMPRESSION_PROFILE(8, + FP(1, 26, 100)), + GENERATE_COMPRESSION_PROFILE(10, + FP(1, 22, 100)), + } + }, +}; + +static inline u32 get_type_frm_name(const char *name) +{ + if (!strcmp(name, "venus-llcc")) + return LLCC; + else if (!strcmp(name, "venus-ddr")) + return DDR; + else + return PERF; +} + +#define DUMP_HEADER_MAGIC 0xdeadbeef +#define DUMP_FP_FMT "%FP" /* special format for fp_t */ + +struct dump { + char *key; + char *format; + size_t val; +}; + +struct lut const *__lut(int width, int height, int fps); +fp_t __compression_ratio(struct lut const *entry, int bpp); +void __dump(struct dump dump[], int len); + +static inline bool __ubwc(enum msm_vidc_colorformat_type f) +{ + switch (f) { + case MSM_VIDC_FMT_NV12_UBWC: + case MSM_VIDC_FMT_NV12_TP10_UBWC: + return true; + default: + return false; + } +} + +static inline int __bpp(enum msm_vidc_colorformat_type f) +{ + switch (f) { + case MSM_VIDC_FMT_NV12: + case MSM_VIDC_FMT_NV21: + case MSM_VIDC_FMT_NV12_UBWC: + case MSM_VIDC_FMT_RGBA8888_UBWC: + return 8; + case MSM_VIDC_FMT_NV12_P010_UBWC: + case MSM_VIDC_FMT_NV12_TP10_UBWC: + return 10; + default: + d_vpr_e("Unsupported colorformat (%x)", f); + return INT_MAX; + } +} + +#endif // __H_MSM_VIDC_BUS_DEFS_H__ diff --git a/driver/vidc/inc/msm_vidc_core.h b/driver/vidc/inc/msm_vidc_core.h new file mode 100644 index 0000000000..0392cb900b --- /dev/null +++ b/driver/vidc/inc/msm_vidc_core.h @@ -0,0 +1,106 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) 2020, The Linux Foundation. All rights reserved. + */ + +#ifndef _MSM_VIDC_CORE_H_ +#define _MSM_VIDC_CORE_H_ + +#include + +#include "msm_vidc_internal.h" + +struct msm_vidc_core; + +#define call_venus_op(d, op, ...) \ + (((d) && (d)->venus_ops && (d)->venus_ops->op) ? \ + ((d)->venus_ops->op(__VA_ARGS__)):0) + +struct msm_vidc_venus_ops { + int (*boot_firmware)(struct msm_vidc_core *core); + int (*reset_ahb2axi_bridge)(struct msm_vidc_core *core); + int (*clock_config_on_enable)(struct msm_vidc_core *core); + int (*interrupt_init)(struct msm_vidc_core *core); + int (*setup_ucregion_memmap)(struct msm_vidc_core *core); + int (*raise_interrupt)(struct msm_vidc_core *core); + int (*clear_interrupt)(struct msm_vidc_core *core); + int (*prepare_pc)(struct msm_vidc_core *core); + int (*power_off)(struct msm_vidc_core *core); + int (*watchdog)(struct msm_vidc_core *core, u32 intr_status); + int (*noc_error_info)(struct msm_vidc_core *core); +}; + +struct msm_vidc_mem_addr { + u32 align_device_addr; + u8 *align_virtual_addr; + u32 mem_size; + struct msm_vidc_map map; + struct msm_vidc_alloc alloc; +}; + +struct msm_vidc_iface_q_info { + void *q_hdr; + struct msm_vidc_mem_addr q_array; +}; + +struct msm_video_device { + enum msm_vidc_domain_type type; + struct video_device vdev; +}; + +struct msm_vidc_core_power { + u64 clk_freq; + u64 bw_ddr; + u64 bw_llcc; +}; + +enum msm_vidc_core_state { + MSM_VIDC_CORE_DEINIT = 0, + MSM_VIDC_CORE_INIT = 1, + MSM_VIDC_CORE_ERROR = 2, +}; + +struct msm_vidc_core { + struct platform_device *pdev; + struct msm_video_device vdev[2]; + struct v4l2_device v4l2_dev; + struct list_head instances; + struct list_head dangling_instances; + struct dentry *debugfs_root; + enum msm_vidc_core_state state; + struct mutex lock; + struct msm_vidc_dt *dt; + struct msm_vidc_platform *platform; + u8 __iomem *register_base_addr; + u32 intr_status; + u32 spur_count; + u32 reg_count; + bool power_enabled; + struct msm_vidc_mem_addr sfr; + struct msm_vidc_mem_addr iface_q_table; + struct msm_vidc_iface_q_info iface_queues[VIDC_IFACEQ_NUMQ]; + struct work_struct device_work; + struct workqueue_struct *device_workq; + struct delayed_work pm_work; + struct workqueue_struct *pm_workq; + struct delayed_work fw_unload_work; + struct delayed_work batch_work; + struct work_struct ssr_work; + struct msm_vidc_core_power power; + struct msm_vidc_ssr ssr; + bool smmu_fault_handled; + u32 skip_pc_count; + u32 last_packet_type; + u8 *packet; + u32 packet_size; + struct v4l2_file_operations *v4l2_file_ops; + struct v4l2_ioctl_ops *v4l2_ioctl_ops; + struct v4l2_ctrl_ops *v4l2_ctrl_ops; + struct vb2_ops *vb2_ops; + struct vb2_mem_ops *vb2_mem_ops; + struct msm_vidc_venus_ops *venus_ops; + struct msm_vidc_session_ops *session_ops; + struct msm_vidc_memory_ops *mem_ops; +}; + +#endif // _MSM_VIDC_CORE_H_ diff --git a/driver/vidc/inc/msm_vidc_debug.h b/driver/vidc/inc/msm_vidc_debug.h new file mode 100644 index 0000000000..aafa681554 --- /dev/null +++ b/driver/vidc/inc/msm_vidc_debug.h @@ -0,0 +1,94 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) 2020, The Linux Foundation. All rights reserved. + */ + +#ifndef __MSM_VIDC_DEBUG__ +#define __MSM_VIDC_DEBUG__ + +#include +#include +#include +#include + +#ifndef VIDC_DBG_LABEL +#define VIDC_DBG_LABEL "msm_vidc" +#endif + +#define VIDC_DBG_TAG VIDC_DBG_LABEL ": %6s: %08x: %5s: " +#define FW_DBG_TAG VIDC_DBG_LABEL ": %6s: " +#define DEFAULT_SID ((u32)-1) + +extern int msm_vidc_debug; +extern bool msm_vidc_lossless_encode; +extern bool msm_vidc_syscache_disable; + +/* To enable messages OR these values and + * echo the result to debugfs file. + * + * To enable all messages set debug_level = 0x101F + */ + +enum vidc_msg_prio { + VIDC_ERR = 0x00000001, + VIDC_INFO = 0x00000001, + VIDC_HIGH = 0x00000002, + VIDC_LOW = 0x00000004, + VIDC_PERF = 0x00000008, + VIDC_PKT = 0x00000010, + VIDC_BUS = 0x00000020, + VIDC_ENCODER = 0x00000100, + VIDC_DECODER = 0x00000200, + VIDC_PRINTK = 0x00001000, + VIDC_FTRACE = 0x00002000, + FW_LOW = 0x00010000, + FW_MEDIUM = 0x00020000, + FW_HIGH = 0x00040000, + FW_ERROR = 0x00080000, + FW_FATAL = 0x00100000, + FW_PERF = 0x00200000, + FW_PRINTK = 0x10000000, + FW_FTRACE = 0x20000000, +}; +#define FW_LOGSHIFT 16 +#define FW_LOGMASK 0x0FFF0000 + +#define dprintk(__level, sid, __fmt, ...) \ + do { \ + pr_err(VIDC_DBG_TAG __fmt, \ + "level", \ + sid, \ + "codec", \ + ##__VA_ARGS__); \ + } while (0) + +#define s_vpr_e(sid, __fmt, ...) dprintk(VIDC_ERR, sid, __fmt, ##__VA_ARGS__) +#define s_vpr_i(sid, __fmt, ...) dprintk(VIDC_INFO, sid, __fmt, ##__VA_ARGS__) +#define s_vpr_h(sid, __fmt, ...) dprintk(VIDC_HIGH, sid, __fmt, ##__VA_ARGS__) +#define s_vpr_l(sid, __fmt, ...) dprintk(VIDC_LOW, sid, __fmt, ##__VA_ARGS__) +#define s_vpr_p(sid, __fmt, ...) dprintk(VIDC_PERF, sid, __fmt, ##__VA_ARGS__) +#define s_vpr_t(sid, __fmt, ...) dprintk(VIDC_PKT, sid, __fmt, ##__VA_ARGS__) +#define s_vpr_b(sid, __fmt, ...) dprintk(VIDC_BUS, sid, __fmt, ##__VA_ARGS__) +#define s_vpr_hp(sid, __fmt, ...) \ + dprintk(VIDC_HIGH|VIDC_PERF, sid, __fmt, ##__VA_ARGS__) + +#define d_vpr_e(__fmt, ...) \ + dprintk(VIDC_ERR, DEFAULT_SID, __fmt, ##__VA_ARGS__) +#define d_vpr_i(__fmt, ...) \ + dprintk(VIDC_INFO, DEFAULT_SID, __fmt, ##__VA_ARGS__) +#define d_vpr_h(__fmt, ...) \ + dprintk(VIDC_HIGH, DEFAULT_SID, __fmt, ##__VA_ARGS__) +#define d_vpr_l(__fmt, ...) \ + dprintk(VIDC_LOW, DEFAULT_SID, __fmt, ##__VA_ARGS__) +#define d_vpr_p(__fmt, ...) \ + dprintk(VIDC_PERF, DEFAULT_SID, __fmt, ##__VA_ARGS__) +#define d_vpr_t(__fmt, ...) \ + dprintk(VIDC_PKT, DEFAULT_SID, __fmt, ##__VA_ARGS__) +#define d_vpr_b(__fmt, ...) \ + dprintk(VIDC_BUS, DEFAULT_SID, __fmt, ##__VA_ARGS__) + +#define MSM_VIDC_ERROR(value) \ + do { if (value) \ + d_vpr_e("BugOn"); \ + } while (0) +#endif diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h new file mode 100644 index 0000000000..36e7b9f1c9 --- /dev/null +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -0,0 +1,41 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) 2020, The Linux Foundation. All rights reserved. + */ + +#ifndef _MSM_VIDC_DRIVER_H_ +#define _MSM_VIDC_DRIVER_H_ + +#include +#include + +#include "msm_vidc_internal.h" +#include "msm_vidc_core.h" +#include "msm_vidc_inst.h" + +static inline is_decode_session(struct msm_vidc_inst *inst) +{ + return inst->domain == MSM_VIDC_DECODER; +} + +static inline is_encode_session(struct msm_vidc_inst *inst) +{ + return inst->domain == MSM_VIDC_ENCODER; +} + +int msm_vidc_add_session(struct msm_vidc_inst *inst); +int msm_vidc_core_init(struct msm_vidc_core *core); +int msm_vidc_smmu_fault_handler(struct iommu_domain *domain, + struct device *dev, unsigned long iova, int flags, void *data); +int msm_vidc_trigger_ssr(struct msm_vidc_core *core, + enum msm_vidc_ssr_trigger_type type); +void msm_vidc_ssr_handler(struct work_struct *work); +void msm_vidc_pm_work_handler(struct work_struct *work); +void msm_vidc_fw_unload_handler(struct work_struct *work); +void msm_vidc_batch_handler(struct work_struct *work); +int msm_vidc_setup_event_queue(struct msm_vidc_inst *inst); +int msm_vidc_queue_init(struct msm_vidc_inst *inst); +u32 msm_vidc_convert_color_fmt(u32 v4l2_fmt); + +#endif // _MSM_VIDC_DRIVER_H_ + diff --git a/driver/vidc/inc/msm_vidc_dt.h b/driver/vidc/inc/msm_vidc_dt.h new file mode 100644 index 0000000000..efee355ecb --- /dev/null +++ b/driver/vidc/inc/msm_vidc_dt.h @@ -0,0 +1,227 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) 2020, The Linux Foundation. All rights reserved. + */ + +#ifndef _MSM_VIDC_DT_H_ +#define _MSM_VIDC_DT_H_ + +#include +#include + +#include "msm_vidc_internal.h" + +/* + * These are helper macros to iterate over various lists within + * msm_vidc_core->dt. The intention is to cut down on a lot of boiler-plate + * code + */ + +/* Read as "for each 'thing' in a set of 'thingies'" */ +#define venus_hfi_for_each_thing(__device, __thing, __thingy) \ + venus_hfi_for_each_thing_continue(__device, __thing, __thingy, 0) + +#define venus_hfi_for_each_thing_reverse(__device, __thing, __thingy) \ + venus_hfi_for_each_thing_reverse_continue(__device, __thing, __thingy, \ + (__device)->dt->__thingy##_set.count - 1) + +/* TODO: the __from parameter technically not required since we can figure it + * out with some pointer magic (i.e. __thing - __thing##_tbl[0]). If this macro + * sees extensive use, probably worth cleaning it up but for now omitting it + * since it introduces unnecessary complexity. + */ +#define venus_hfi_for_each_thing_continue(__device, __thing, __thingy, __from) \ + for (__thing = &(__device)->dt->\ + __thingy##_set.__thingy##_tbl[__from]; \ + __thing < &(__device)->dt->__thingy##_set.__thingy##_tbl[0] + \ + ((__device)->dt->__thingy##_set.count - __from); \ + ++__thing) + +#define venus_hfi_for_each_thing_reverse_continue(__device, __thing, __thingy, \ + __from) \ + for (__thing = &(__device)->dt->\ + __thingy##_set.__thingy##_tbl[__from]; \ + __thing >= &(__device)->dt->__thingy##_set.__thingy##_tbl[0]; \ + --__thing) + +/* Regular set helpers */ +#define venus_hfi_for_each_regulator(__device, __rinfo) \ + venus_hfi_for_each_thing(__device, __rinfo, regulator) + +#define venus_hfi_for_each_regulator_reverse(__device, __rinfo) \ + venus_hfi_for_each_thing_reverse(__device, __rinfo, regulator) + +#define venus_hfi_for_each_regulator_reverse_continue(__device, __rinfo, \ + __from) \ + venus_hfi_for_each_thing_reverse_continue(__device, __rinfo, \ + regulator, __from) + +/* Clock set helpers */ +#define venus_hfi_for_each_clock(__device, __cinfo) \ + venus_hfi_for_each_thing(__device, __cinfo, clock) + +#define venus_hfi_for_each_clock_reverse(__device, __cinfo) \ + venus_hfi_for_each_thing_reverse(__device, __cinfo, clock) + +#define venus_hfi_for_each_clock_reverse_continue(__device, __rinfo, \ + __from) \ + venus_hfi_for_each_thing_reverse_continue(__device, __rinfo, \ + clock, __from) + +/* Bus set helpers */ +#define venus_hfi_for_each_bus(__device, __binfo) \ + venus_hfi_for_each_thing(__device, __binfo, bus) +#define venus_hfi_for_each_bus_reverse(__device, __binfo) \ + venus_hfi_for_each_thing_reverse(__device, __binfo, bus) + +/* Subcache set helpers */ +#define venus_hfi_for_each_subcache(__device, __sinfo) \ + venus_hfi_for_each_thing(__device, __sinfo, subcache) +#define venus_hfi_for_each_subcache_reverse(__device, __sinfo) \ + venus_hfi_for_each_thing_reverse(__device, __sinfo, subcache) + +struct reg_value_pair { + u32 reg; + u32 value; + u32 mask; +}; + +struct reg_set { + struct reg_value_pair *reg_tbl; + u32 count; +}; + +struct addr_range { + u32 start; + u32 size; +}; + +struct addr_set { + struct addr_range *addr_tbl; + u32 count; +}; + +struct context_bank_info { + struct list_head list; + const char *name; + u32 buffer_type; + bool is_secure; + struct addr_range addr_range; + struct device *dev; + struct iommu_domain *domain; +}; + +struct buffer_usage_table { + u32 buffer_type; + u32 tz_usage; +}; + +struct buffer_usage_set { + struct buffer_usage_table *buffer_usage_tbl; + u32 count; +}; + +struct regulator_info { + struct regulator *regulator; + bool has_hw_power_collapse; + char *name; +}; + +struct regulator_set { + struct regulator_info *regulator_tbl; + u32 count; +}; + +struct clock_info { + const char *name; + struct clk *clk; + u32 count; + bool has_scaling; + bool has_mem_retention; +}; + +struct clock_set { + struct clock_info *clock_tbl; + u32 count; +}; + +struct bus_info { + const char *name; + u32 range[2]; + struct device *dev; + struct icc_path *path; +}; + +struct bus_set { + struct bus_info *bus_tbl; + u32 count; +}; + +struct reset_info { + struct reset_control *rst; + const char *name; +}; + +struct reset_set { + struct reset_info *reset_tbl; + u32 count; +}; + +struct allowed_clock_rates_table { + u32 clock_rate; +}; + +struct clock_profile_entry { + u32 codec_mask; + u32 vpp_cycles; + u32 vsp_cycles; + u32 low_power_cycles; +}; + +struct clock_freq_table { + struct clock_profile_entry *clk_prof_entries; + u32 count; +}; + +struct subcache_info { + const char *name; + bool isactive; + bool isset; + struct llcc_slice_desc *subcache; +}; + +struct subcache_set { + struct subcache_info *subcache_tbl; + u32 count; +}; + +struct msm_vidc_dt { + void *core; + phys_addr_t register_base; + u32 register_size; + u32 irq; + u32 sku_version; + struct allowed_clock_rates_table *allowed_clks_tbl; + u32 allowed_clks_tbl_size; + struct clock_freq_table clock_freq_tbl; + bool sys_cache_present; + bool sys_cache_res_set; + struct subcache_set subcache_set; + struct reg_set reg_set; + struct addr_set qdss_addr_set; + struct buffer_usage_set buffer_usage_set; + struct regulator_set regulator_set; + struct clock_set clock_set; + struct bus_set bus_set; + struct reset_set reset_set; + struct list_head context_banks; + struct mutex cb_lock; + const char *fw_name; + void *fw_cookie; +}; + +int msm_vidc_init_dt(struct platform_device *pdev); +int msm_vidc_read_context_bank_resources_from_dt(struct platform_device *pdev); +void msm_vidc_deinit_dt(struct platform_device *pdev); + +#endif // _MSM_VIDC_DT_H_ diff --git a/driver/vidc/inc/msm_vidc_inst.h b/driver/vidc/inc/msm_vidc_inst.h new file mode 100644 index 0000000000..84b457449b --- /dev/null +++ b/driver/vidc/inc/msm_vidc_inst.h @@ -0,0 +1,107 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) 2020, The Linux Foundation. All rights reserved. + */ + +#ifndef _MSM_VIDC_INST_H_ +#define _MSM_VIDC_INST_H_ + +#include "msm_vidc_internal.h" + +struct msm_vidc_inst; + +#define call_session_op(c, op, ...) \ + (((c) && (c)->session_ops && (c)->session_ops->op) ? \ + ((c)->session_ops->op(__VA_ARGS__)) : 0) + +struct msm_vidc_session_ops { + int (*calc_freq)(struct msm_vidc_inst *inst, struct msm_vidc_buffer *mbuf); + int (*calc_bw)(struct msm_vidc_inst *inst, struct msm_vidc_buffer *mbuf); + int (*decide_work_route)(struct msm_vidc_inst *inst); + int (*decide_work_mode)(struct msm_vidc_inst *inst); + int (*decide_core_and_power_mode)(struct msm_vidc_inst *inst); + int (*buffer_size)(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type type); + int (*min_count)(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type type); + int (*extra_count)(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type type); +}; + +struct msm_vidc_allocations { + struct msm_vidc_alloc_info scratch; + struct msm_vidc_alloc_info scratch_1; + struct msm_vidc_alloc_info scratch_2; + struct msm_vidc_alloc_info persist; + struct msm_vidc_alloc_info persist_1; +}; + +struct msm_vidc_maps { + struct msm_vidc_map_info input; + struct msm_vidc_map_info output; + struct msm_vidc_map_info input_meta; + struct msm_vidc_map_info output_meta; + struct msm_vidc_map_info scratch; + struct msm_vidc_map_info scratch_1; + struct msm_vidc_map_info scratch_2; + struct msm_vidc_map_info persist; + struct msm_vidc_map_info persist_1; +}; + +struct msm_vidc_buffers { + struct msm_vidc_buffer_info input; + struct msm_vidc_buffer_info output; + struct msm_vidc_buffer_info input_meta; + struct msm_vidc_buffer_info output_meta; + struct msm_vidc_buffer_info scratch; + struct msm_vidc_buffer_info scratch_1; + struct msm_vidc_buffer_info scratch_2; + struct msm_vidc_buffer_info persist; + struct msm_vidc_buffer_info persist_1; +}; + +enum msm_vidc_inst_state { + MSM_VIDC_OPEN = 1, + MSM_VIDC_START_INPUT = 2, + MSM_VIDC_START_OUTPUT = 3, + MSM_VIDC_START = 4, + MSM_VIDC_DRC = 5, + MSM_VIDC_DRC_LAST_FLAG = 6, + MSM_VIDC_DRAIN = 7, + MSM_VIDC_DRAIN_LAST_FLAG = 8, + MSM_VIDC_DRC_DRAIN = 9, + MSM_VIDC_DRC_DRAIN_LAST_FLAG = 10, + MSM_VIDC_DRAIN_START_INPUT = 11, + MSM_VIDC_ERROR = 12, +}; + +struct msm_vidc_inst { + struct list_head list; + struct mutex lock; + enum msm_vidc_inst_state state; + enum msm_vidc_domain_type domain; + enum msm_vidc_codec_type codec; + void *core; + struct kref kref; + u32 session_id; + u32 sid; + struct v4l2_format fmts[MAX_PORT]; + struct v4l2_ctrl_handler ctrl_handler; + struct v4l2_fh event_handler; + struct v4l2_ctrl **ctrls; + u32 num_ctrls; + struct vb2_queue vb2q[MAX_PORT]; + struct msm_vidc_properties prop; + struct msm_vidc_power power; + struct msm_vidc_buffers buffers; + struct msm_vidc_maps maps; + struct msm_vidc_allocations allocations; + struct msm_vidc_port_settings port_settings[MAX_PORT]; + struct msm_vidc_decode_batch decode_batch; + struct msm_vidc_decode_vpp_delay decode_vpp_delay; + struct msm_vidc_session_idle session_idle; + struct list_head input_ts; + struct list_head enc_input_crs; + struct list_head decode_bitrate_data; + struct dentry *debugfs_root; + struct msm_vidc_debug debug; +}; + +#endif // _MSM_VIDC_INST_H_ diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h new file mode 100644 index 0000000000..fa7dd0b70c --- /dev/null +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -0,0 +1,468 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) 2020, The Linux Foundation. All rights reserved. + */ + +#ifndef _MSM_VIDC_INTERNAL_H_ +#define _MSM_VIDC_INTERNAL_H_ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define MAX_NAME_LENGTH 128 +#define MAX_MATRIX_COEFFS 9 +#define MAX_BIAS_COEFFS 3 +#define MAX_LIMIT_COEFFS 6 +#define MAX_DEBUGFS_NAME 50 +#define DEFAULT_TIMEOUT 3 +#define DEFAULT_HEIGHT 240 +#define DEFAULT_WIDTH 320 +#define MIN_SUPPORTED_WIDTH 32 +#define MIN_SUPPORTED_HEIGHT 32 +#define DEFAULT_FPS 30 +#define MINIMUM_FPS 1 +#define MAXIMUM_FPS 960 +#define SINGLE_INPUT_BUFFER 1 +#define SINGLE_OUTPUT_BUFFER 1 +#define MAX_NUM_INPUT_BUFFERS VIDEO_MAX_FRAME // same as VB2_MAX_FRAME +#define MAX_NUM_OUTPUT_BUFFERS VIDEO_MAX_FRAME // same as VB2_MAX_FRAME +#define MAX_SUPPORTED_INSTANCES 16 +#define MAX_BSE_VPP_DELAY 6 +#define DEFAULT_BSE_VPP_DELAY 2 + +/* Maintains the number of FTB's between each FBD over a window */ +#define DCVS_FTB_WINDOW 16 +/* Superframe can have maximum of 32 frames */ +#define VIDC_SUPERFRAME_MAX 32 +#define COLOR_RANGE_UNSPECIFIED (-1) + +#define V4L2_EVENT_VIDC_BASE 10 +#define INPUT_PLANE V4L2_BUF_TYPE_VIDEO_OUTPUT +#define OUTPUT_PLANE V4L2_BUF_TYPE_VIDEO_CAPTURE +#define INPUT_META_PLANE V4L2_BUF_TYPE_META_OUTPUT +#define OUTPUT_META_PLANE V4L2_BUF_TYPE_META_CAPTURE + +#define VIDC_IFACEQ_MAX_PKT_SIZE 1024 +#define VIDC_IFACEQ_MED_PKT_SIZE 768 +#define VIDC_IFACEQ_MIN_PKT_SIZE 8 +#define VIDC_IFACEQ_VAR_SMALL_PKT_SIZE 100 +#define VIDC_IFACEQ_VAR_LARGE_PKT_SIZE 512 +#define VIDC_IFACEQ_VAR_HUGE_PKT_SIZE (1024*12) + +#define NUM_MBS_PER_SEC(__height, __width, __fps) \ + (NUM_MBS_PER_FRAME(__height, __width) * __fps) + +#define NUM_MBS_PER_FRAME(__height, __width) \ + ((ALIGN(__height, 16) / 16) * (ALIGN(__width, 16) / 16)) + +/* + * Convert Q16 number into Integer and Fractional part upto 2 places. + * Ex : 105752 / 65536 = 1.61; 1.61 in Q16 = 105752; + * Integer part = 105752 / 65536 = 1; + * Reminder = 105752 * 0xFFFF = 40216; Last 16 bits. + * Fractional part = 40216 * 100 / 65536 = 61; + * Now convert to FP(1, 61, 100). + */ +#define Q16_INT(q) ((q) >> 16) +#define Q16_FRAC(q) ((((q) & 0xFFFF) * 100) >> 16) + +enum msm_vidc_domain_type { + MSM_VIDC_ENCODER = BIT(0), + MSM_VIDC_DECODER = BIT(1), +}; + +enum msm_vidc_codec_type { + MSM_VIDC_H264 = BIT(0), + MSM_VIDC_HEVC = BIT(1), + MSM_VIDC_VP9 = BIT(2), + MSM_VIDC_MPEG2 = BIT(3), +}; + +enum msm_vidc_colorformat_type { + MSM_VIDC_FMT_NV12 = BIT(0), + MSM_VIDC_FMT_NV21 = BIT(1), + MSM_VIDC_FMT_NV12_UBWC = BIT(2), + MSM_VIDC_FMT_NV12_P010_UBWC = BIT(3), + MSM_VIDC_FMT_NV12_TP10_UBWC = BIT(4), + MSM_VIDC_FMT_RGBA8888_UBWC = BIT(5), + MSM_VIDC_FMT_SDE_Y_CBCR_H2V2_P010_VENUS = BIT(6), +}; + +enum msm_vidc_buffer_type { + MSM_VIDC_QUEUE = BIT(0), + MSM_VIDC_INPUT = BIT(1), + MSM_VIDC_OUTPUT = BIT(2), + MSM_VIDC_INPUT_META = BIT(3), + MSM_VIDC_OUTPUT_META = BIT(4), + MSM_VIDC_DPB = BIT(5), + MSM_VIDC_ARP = BIT(6), + MSM_VIDC_LINE = BIT(7), + MSM_VIDC_BIN = BIT(8), +}; + +enum msm_vidc_buffer_attributes { + MSM_VIDC_DEFERRED_SUBMISSION = BIT(0), + MSM_VIDC_READ_ONLY = BIT(1), + MSM_VIDC_PENDING_RELEASE = BIT(2), +}; + +enum msm_vidc_buffer_region { + MSM_VIDC_NON_SECURE = BIT(0), + MSM_VIDC_SECURE_PIXEL = BIT(1), + MSM_VIDC_SECURE_NONPIXEL = BIT(2), + MSM_VIDC_SECURE_BITSTREAM = BIT(3), +}; + +enum msm_vidc_port_type { + INPUT_PORT, + OUTPUT_PORT, + INPUT_META_PORT, + OUTPUT_META_PORT, + MAX_PORT, +}; + +enum msm_vidc_core_data_type { + ENC_CODECS = 0, + DEC_CODECS, + MAX_SESSION_COUNT, + MAX_SECURE_SESSION_COUNT, + MAX_LOAD, + MAX_MBPF, + MAX_MBPS, + MAX_MBPF_HQ, + MAX_MBPS_HQ, + MAX_MBPF_B_FRAME, + MAX_MBPS_B_FRAME, + SW_PC, + SW_PC_DELAY, + FW_UNLOAD, + FW_UNLOAD_DELAY, + HW_RESPONSE_TIMEOUT, + DEBUG_TIMEOUT, + PREFIX_BUF_COUNT_PIX, + PREFIX_BUF_SIZE_PIX, + PREFIX_BUF_COUNT_NON_PIX, + PREFIX_BUF_SIZE_NON_PIX, + PAGEFAULT_NON_FATAL, + PAGETABLE_CACHING, + DCVS, + DECODE_BATCH, + DECODE_BATCH_TIMEOUT, + AV_SYNC_WINDOW_SIZE, + CLK_FREQ_THRESHOLD, +}; + +enum msm_vidc_instance_data_type { + FRAME_WIDTH, + FRAME_HEIGHT, + MBPF, + MBPS, + FRAME_RATE, + BIT_RATE, + CABAC_BIT_RATE, + LTR_COUNT, + LCU_SIZE, + POWER_SAVE_MBPS, + SCALE_X, + SCALE_Y, + PROFILE, + LEVEL, + I_FRAME_QP, + P_FRAME_QP, + B_FRAME_QP, + B_FRAME, + HIER_P_LAYERS, + BLUR_WIDTH, + BLUR_HEIGHT, + SLICE_BYTE, + SLICE_MB, + SECURE, + SECURE_FRAME_WIDTH, + SECURE_FRAME_HEIGHT, + SECURE_MBPF, + SECURE_BIT_RATE, + BATCH_MBPF, + BATCH_FRAME_RATE, + LOSSLESS_FRAME_WIDTH, + LOSSLESS_FRAME_HEIGHT, + LOSSLESS_MBPF, + ALL_INTRA_FRAME_RATE, + HEVC_IMAGE_FRAME_WIDTH, + HEVC_IMAGE_FRAME_HEIGHT, + HEIC_IMAGE_FRAME_WIDTH, + HEIC_IMAGE_FRAME_HEIGHT, + MB_CYCLES_VSP, + MB_CYCLES_VPP, + MB_CYCLES_LP, + MB_CYCLES_FW, + MB_CYCLES_FW_VPP, +}; + +enum efuse_purpose { + SKU_VERSION = 0, +}; + +enum sku_version { + SKU_VERSION_0 = 0, + SKU_VERSION_1, + SKU_VERSION_2, +}; + +enum msm_vidc_ssr_trigger_type { + SSR_ERR_FATAL = 1, + SSR_SW_DIV_BY_ZERO, + SSR_HW_WDOG_IRQ, +}; + +enum msm_vidc_cache_op { + MSM_VIDC_CACHE_CLEAN, + MSM_VIDC_CACHE_INVALIDATE, + MSM_VIDC_CACHE_CLEAN_INVALIDATE, +}; + +enum msm_vidc_dcvs_flags { + MSM_VIDC_DCVS_INCR = BIT(0), + MSM_VIDC_DCVS_DECR = BIT(1), +}; + +enum msm_vidc_clock_properties { + CLOCK_PROP_HAS_SCALING = BIT(0), + CLOCK_PROP_HAS_MEM_RETENTION = BIT(1), +}; + +enum profiling_points { + FRAME_PROCESSING = 0, + MAX_PROFILING_POINTS, +}; + +#define HFI_MASK_QHDR_TX_TYPE 0xFF000000 +#define HFI_MASK_QHDR_RX_TYPE 0x00FF0000 +#define HFI_MASK_QHDR_PRI_TYPE 0x0000FF00 +#define HFI_MASK_QHDR_Q_ID_TYPE 0x000000FF +#define HFI_Q_ID_HOST_TO_CTRL_CMD_Q 0x00 +#define HFI_Q_ID_CTRL_TO_HOST_MSG_Q 0x01 +#define HFI_Q_ID_CTRL_TO_HOST_DEBUG_Q 0x02 +#define HFI_MASK_QHDR_STATUS 0x000000FF + +#define VIDC_IFACEQ_NUMQ 3 +#define VIDC_IFACEQ_CMDQ_IDX 0 +#define VIDC_IFACEQ_MSGQ_IDX 1 +#define VIDC_IFACEQ_DBGQ_IDX 2 +#define VIDC_IFACEQ_MAX_BUF_COUNT 50 +#define VIDC_IFACE_MAX_PARALLEL_CLNTS 16 +#define VIDC_IFACEQ_DFLT_QHDR 0x01010000 + +struct hfi_queue_table_header { + u32 qtbl_version; + u32 qtbl_size; + u32 qtbl_qhdr0_offset; + u32 qtbl_qhdr_size; + u32 qtbl_num_q; + u32 qtbl_num_active_q; + void *device_addr; + char name[256]; +}; + +struct hfi_queue_header { + u32 qhdr_status; + u32 qhdr_start_addr; + u32 qhdr_type; + u32 qhdr_q_size; + u32 qhdr_pkt_size; + u32 qhdr_pkt_drop_cnt; + u32 qhdr_rx_wm; + u32 qhdr_tx_wm; + u32 qhdr_rx_req; + u32 qhdr_tx_req; + u32 qhdr_rx_irq_status; + u32 qhdr_tx_irq_status; + u32 qhdr_read_idx; + u32 qhdr_write_idx; +}; + +#define VIDC_IFACEQ_TABLE_SIZE (sizeof(struct hfi_queue_table_header) \ + + sizeof(struct hfi_queue_header) * VIDC_IFACEQ_NUMQ) + +#define VIDC_IFACEQ_QUEUE_SIZE (VIDC_IFACEQ_MAX_PKT_SIZE * \ + VIDC_IFACEQ_MAX_BUF_COUNT * VIDC_IFACE_MAX_PARALLEL_CLNTS) + +#define VIDC_IFACEQ_GET_QHDR_START_ADDR(ptr, i) \ + (void *)((ptr + sizeof(struct hfi_queue_table_header)) + \ + (i * sizeof(struct hfi_queue_header))) + +#define QDSS_SIZE 4096 +#define SFR_SIZE 4096 + +#define QUEUE_SIZE (VIDC_IFACEQ_TABLE_SIZE + \ + (VIDC_IFACEQ_QUEUE_SIZE * VIDC_IFACEQ_NUMQ)) + +#define ALIGNED_QDSS_SIZE ALIGN(QDSS_SIZE, SZ_4K) +#define ALIGNED_SFR_SIZE ALIGN(SFR_SIZE, SZ_4K) +#define ALIGNED_QUEUE_SIZE ALIGN(QUEUE_SIZE, SZ_4K) +#define SHARED_QSIZE ALIGN(ALIGNED_SFR_SIZE + ALIGNED_QUEUE_SIZE + \ + ALIGNED_QDSS_SIZE, SZ_1M) + +struct buf_count { + u32 etb; + u32 ftb; + u32 fbd; + u32 ebd; +}; + +struct profile_data { + u32 start; + u32 stop; + u32 cumulative; + char name[64]; + u32 sampling; + u32 average; +}; + +struct msm_vidc_debug { + struct profile_data pdata[MAX_PROFILING_POINTS]; + u32 profile; + u32 samples; + struct buf_count count; +}; + +struct msm_vidc_input_cr_data { + struct list_head list; + u32 index; + u32 input_cr; +}; + +struct msm_vidc_timestamps { + struct list_head list; + u64 timestamp_us; + u32 framerate; + bool is_valid; +}; + +struct msm_vidc_session_idle { + bool idle; + u64 last_activity_time_ns; +}; + +struct msm_vidc_port_settings { + u32 aligned_width; + u32 aligned_height; + u32 crop_width; + u32 crop_height; + u32 min_count; + u32 poc; +}; + +struct msm_vidc_decode_vpp_delay { + bool enable; + u32 size; +}; + +struct msm_vidc_decode_batch { + bool enable; + u32 size; + struct delayed_work work; +}; + +struct msm_vidc_power { + u32 buffer_counter; + u32 min_threshold; + u32 nom_threshold; + u32 max_threshold; + bool dcvs_mode; + u32 dcvs_window; + u64 min_freq; + u64 curr_freq; + u32 ddr_bw; + u32 sys_cache_bw; + u32 dcvs_flags; +}; + +struct msm_vidc_alloc { + enum msm_vidc_buffer_type buffer_type; + enum msm_vidc_buffer_region region; + u32 size; + u8 cached:1; + u8 secure:1; + u8 map_kernel:1; + struct dma_buf *dmabuf; + void *kvaddr; +}; + +struct msm_vidc_alloc_info { + struct list_head list; // list of "struct msm_vidc_alloc" +}; + +struct msm_vidc_map { + bool valid; + enum msm_vidc_buffer_type buffer_type; + enum msm_vidc_buffer_region region; + struct dma_buf *dmabuf; + u32 refcount; + u64 device_addr; + struct sg_table *table; + struct dma_buf_attachment *attach; +}; + +struct msm_vidc_map_info { + struct list_head list; // list of "struct msm_vidc_map" +}; + +struct msm_vidc_buffer { + bool valid; + enum msm_vidc_buffer_type type; + u32 index; + int fd; + u32 buffer_size; + u32 data_offset; + u32 data_size; + u64 device_addr; + void *dmabuf; + u32 flags; + u64 timestamp; + enum msm_vidc_buffer_attributes attr; +}; + +struct msm_vidc_buffer_info { + struct list_head list; // list of "struct msm_vidc_buffer" + u32 min_count; + u32 extra_count; + u32 actual_count; + u32 size; +}; + +struct msm_vidc_properties { + u32 frame_rate; + u32 operating_rate; + u32 bit_rate; + u32 profile; + u32 level; + u32 entropy_mode; + u32 rc_type; +}; + +struct msm_vidc_ssr { + bool trigger; + enum msm_vidc_ssr_trigger_type ssr_type; +}; + +#define call_mem_op(c, op, ...) \ + (((c) && (c)->mem_ops && (c)->mem_ops->op) ? \ + ((c)->mem_ops->op(__VA_ARGS__)) : 0) + +struct msm_vidc_memory_ops { + int (*allocate)(void *inst, struct msm_vidc_buffer *mbuf); + int (*dma_map)(void *inst, struct msm_vidc_buffer *mbuf); + int (*dma_unmap)(void *inst, struct msm_vidc_buffer *mbuf); + int (*free)(void *inst, struct msm_vidc_buffer *mbuf); + int (*cache_op)(void *inst, struct msm_vidc_buffer *mbuf, + enum msm_vidc_cache_op cache_op); +}; + +#endif // _MSM_VIDC_INTERNAL_H_ diff --git a/driver/vidc/inc/msm_vidc_memory.h b/driver/vidc/inc/msm_vidc_memory.h new file mode 100644 index 0000000000..e7e32602bf --- /dev/null +++ b/driver/vidc/inc/msm_vidc_memory.h @@ -0,0 +1,23 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) 2020, The Linux Foundation. All rights reserved. + */ + +#ifndef _MSM_VIDC_MEMORY_H_ +#define _MSM_VIDC_MEMORY_H_ + +#include "msm_vidc_internal.h" +#include "msm_vidc_core.h" + +int msm_vidc_memory_alloc(struct msm_vidc_core *core, + struct msm_vidc_alloc *alloc); +int msm_vidc_memory_free(struct msm_vidc_core *core, + struct msm_vidc_alloc *alloc); +int msm_vidc_memory_map(struct msm_vidc_core *core, + struct msm_vidc_map *map); +int msm_vidc_memory_unmap(struct msm_vidc_core *core, + struct msm_vidc_map *map); +struct dma_buf *msm_vidc_memory_get_dmabuf(int fd); +void msm_vidc_memory_put_dmabuf(void *dmabuf); + +#endif // _MSM_VIDC_MEMORY_H_ \ No newline at end of file diff --git a/driver/vidc/inc/msm_vidc_platform.h b/driver/vidc/inc/msm_vidc_platform.h new file mode 100644 index 0000000000..0f7f096dc5 --- /dev/null +++ b/driver/vidc/inc/msm_vidc_platform.h @@ -0,0 +1,78 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) 2020, The Linux Foundation. All rights reserved. + */ + +#ifndef _MSM_VIDC_PLATFORM_H_ +#define _MSM_VIDC_PLATFORM_H_ + +#include + +#include "msm_vidc_internal.h" + +struct msm_vidc_core_data { + enum msm_vidc_core_data_type type; + u32 value; +}; + +struct msm_vidc_instance_data { + enum msm_vidc_instance_data_type type; + enum msm_vidc_domain_type domains; + enum msm_vidc_codec_type codecs; + u32 min; + u32 max; + u32 step_or_menu; + u32 value; +}; + +struct msm_vidc_csc_coeff { + u32 *vpe_csc_custom_matrix_coeff; + u32 *vpe_csc_custom_bias_coeff; + u32 *vpe_csc_custom_limit_coeff; +}; + +struct msm_vidc_efuse_data { + u32 start_address; + u32 size; + u32 mask; + u32 shift; + enum efuse_purpose purpose; +}; + +struct msm_vidc_ubwc_config_data { + struct { + u32 max_channel_override : 1; + u32 mal_length_override : 1; + u32 hb_override : 1; + u32 bank_swzl_level_override : 1; + u32 bank_spreading_override : 1; + u32 reserved : 27; + } override_bit_info; + + u32 max_channels; + u32 mal_length; + u32 highest_bank_bit; + u32 bank_swzl_level; + u32 bank_spreading; +}; + +struct msm_vidc_platform_data { + struct msm_vidc_core_data *core_data; + u32 core_data_size; + struct msm_vidc_instance_data *instance_data; + u32 instance_data_size; + struct allowed_clock_rates_table *allowed_clks_tbl; + u32 allowed_clks_tbl_size; + struct msm_vidc_csc_coeff csc_data; + struct msm_vidc_ubwc_config_data *ubwc_config; +}; + +struct msm_vidc_platform { + void *core; + struct msm_vidc_platform_data data; +}; + +int msm_vidc_init_platform(struct platform_device *pdev); +int msm_vidc_deinit_platform(struct platform_device *pdev); + +#endif // _MSM_VIDC_PLATFORM_H_ diff --git a/driver/vidc/inc/msm_vidc_v4l2.h b/driver/vidc/inc/msm_vidc_v4l2.h new file mode 100644 index 0000000000..63ed122365 --- /dev/null +++ b/driver/vidc/inc/msm_vidc_v4l2.h @@ -0,0 +1,55 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) 2020, The Linux Foundation. All rights reserved. + */ + +#ifndef _MSM_VIDC_V4L2_H_ +#define _MSM_VIDC_V4L2_H_ + +#include +#include +#include +#include +#include + +int msm_v4l2_open(struct file *filp); +int msm_v4l2_close(struct file *filp); +int msm_v4l2_querycap(struct file *filp, void *fh, + struct v4l2_capability *cap); +int msm_v4l2_enum_fmt(struct file *file, void *fh, + struct v4l2_fmtdesc *f); +int msm_v4l2_s_fmt(struct file *file, void *fh, + struct v4l2_format *f); +int msm_v4l2_g_fmt(struct file *file, void *fh, + struct v4l2_format *f); +int msm_v4l2_s_ctrl(struct file *file, void *fh, + struct v4l2_control *a); +int msm_v4l2_g_ctrl(struct file *file, void *fh, + struct v4l2_control *a); +int msm_v4l2_reqbufs(struct file *file, void *fh, + struct v4l2_requestbuffers *b); +int msm_v4l2_qbuf(struct file *file, void *fh, + struct v4l2_buffer *b); +int msm_v4l2_dqbuf(struct file *file, void *fh, + struct v4l2_buffer *b); +int msm_v4l2_streamon(struct file *file, void *fh, + enum v4l2_buf_type i); +int msm_v4l2_streamoff(struct file *file, void *fh, + enum v4l2_buf_type i); +int msm_v4l2_subscribe_event(struct v4l2_fh *fh, + const struct v4l2_event_subscription *sub); +int msm_v4l2_unsubscribe_event(struct v4l2_fh *fh, + const struct v4l2_event_subscription *sub); +int msm_v4l2_decoder_cmd(struct file *file, void *fh, + struct v4l2_decoder_cmd *dec); +int msm_v4l2_encoder_cmd(struct file *file, void *fh, + struct v4l2_encoder_cmd *enc); +int msm_v4l2_enum_framesizes(struct file *file, void *fh, + struct v4l2_frmsizeenum *fsize); +int msm_v4l2_queryctrl(struct file *file, void *fh, + struct v4l2_queryctrl *ctrl); +int msm_v4l2_querymenu(struct file *file, void *fh, + struct v4l2_querymenu *qmenu); +unsigned int msm_v4l2_poll(struct file *filp, + struct poll_table_struct *pt); +#endif // _MSM_VIDC_V4L2_H_ \ No newline at end of file diff --git a/driver/vidc/inc/msm_vidc_vb2.h b/driver/vidc/inc/msm_vidc_vb2.h new file mode 100644 index 0000000000..f6e833aeb5 --- /dev/null +++ b/driver/vidc/inc/msm_vidc_vb2.h @@ -0,0 +1,25 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) 2020, The Linux Foundation. All rights reserved. + */ + +#ifndef _MSM_VIDC_VB2_H_ +#define _MSM_VIDC_VB2_H_ + +#include +#include + +/* vb2_mem_ops */ +void *msm_vb2_get_userptr(struct device *dev, unsigned long vaddr, + unsigned long size, enum dma_data_direction dma_dir); +void msm_vb2_put_userptr(void *buf_priv); + +/* vb2_ops */ +int msm_vidc_queue_setup(struct vb2_queue *q, + unsigned int *num_buffers, unsigned int *num_planes, + unsigned int sizes[], struct device *alloc_devs[]); +int msm_vidc_start_streaming(struct vb2_queue *q, unsigned int count); +void msm_vidc_stop_streaming(struct vb2_queue *q); +void msm_vidc_buf_queue(struct vb2_buffer *vb2); +void msm_vidc_buf_cleanup(struct vb2_buffer *vb); +#endif // _MSM_VIDC_VB2_H_ \ No newline at end of file diff --git a/driver/vidc/inc/venus_hfi.h b/driver/vidc/inc/venus_hfi.h new file mode 100644 index 0000000000..e7833b9f5e --- /dev/null +++ b/driver/vidc/inc/venus_hfi.h @@ -0,0 +1,71 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) 2020, The Linux Foundation. All rights reserved. + */ + +#ifndef _VENUS_HFI_H_ +#define _VENUS_HFI_H_ + +#include "msm_vidc_internal.h" +#include "msm_vidc_inst.h" +#include "msm_vidc_core.h" + +#define VIDC_MAX_NAME_LENGTH 64 +#define VIDC_MAX_PC_SKIP_COUNT 10 +#define VIDC_MAX_SUBCACHES 4 +#define VIDC_MAX_SUBCACHE_SIZE 52 + +enum vidc_resource_id { + VIDC_RESOURCE_NONE, + VIDC_RESOURCE_SYSCACHE, + VIDC_UNUSED_RESOURCE = 0x10000000, +}; + +struct vidc_resource_hdr { + enum vidc_resource_id resource_id; + void *resource_handle; +}; + +struct vidc_buffer_addr_info { + enum msm_vidc_buffer_type buffer_type; + u32 buffer_size; + u32 num_buffers; + u32 align_device_addr; + u32 extradata_addr; + u32 extradata_size; + u32 response_required; +}; + +struct hfi_resource_subcache_type { + u32 size; + u32 sc_id; +}; + +struct hfi_resource_syscache_info_type { + u32 num_entries; + struct hfi_resource_subcache_type rg_subcache_entries[1]; +}; + +int venus_hfi_core_init(struct msm_vidc_core *core); +int venus_hfi_core_release(struct msm_vidc_core *core); +int venus_hfi_suspend(struct msm_vidc_core *core); +int venus_hfi_session_open(struct msm_vidc_core *core, struct msm_vidc_inst *inst); +void venus_hfi_work_handler(struct work_struct *work); +void venus_hfi_pm_work_handler(struct work_struct *work); + +void __write_register(struct msm_vidc_core *core, + u32 reg, u32 value); +int __read_register(struct msm_vidc_core *core, u32 reg); +void __disable_unprepare_clks(struct msm_vidc_core *core); +int __disable_regulators(struct msm_vidc_core *core); +int __unvote_buses(struct msm_vidc_core *core); +int __prepare_pc(struct msm_vidc_core *core); + +int __reset_ahb2axi_bridge(struct msm_vidc_core *core); +int __clock_config_on_enable(struct msm_vidc_core *core); +int __interrupt_init(struct msm_vidc_core *core); +int __setup_ucregion_memmap(struct msm_vidc_core *core); +int __raise_interrupt(struct msm_vidc_core *core); +int __power_off(struct msm_vidc_core *core); + +#endif // _VENUS_HFI_H_ diff --git a/driver/vidc/src/hfi_packet.c b/driver/vidc/src/hfi_packet.c new file mode 100644 index 0000000000..7428966a3f --- /dev/null +++ b/driver/vidc/src/hfi_packet.c @@ -0,0 +1,21 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2020, The Linux Foundation. All rights reserved. + */ + +#include "hfi_packet.h" +#include "msm_vidc_core.h" +#include "msm_vidc_inst.h" +#include "msm_vidc_debug.h" + +int hfi_packet_sys_init(struct msm_vidc_core *core, void *pkt, u32 pkt_size) +{ + d_vpr_h("%s()\n", __func__); + return 0; +} + +int hfi_packet_sys_pc_prep(struct msm_vidc_core *core, void *pkt, u32 pkt_size) +{ + d_vpr_h("%s()\n", __func__); + return 0; +} diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c new file mode 100644 index 0000000000..1fd149f5a7 --- /dev/null +++ b/driver/vidc/src/msm_vdec.c @@ -0,0 +1,108 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2020, The Linux Foundation. All rights reserved. + */ + +#include +#include + +#include "msm_vdec.h" +#include "msm_vidc_core.h" +#include "msm_vidc_inst.h" +#include "msm_vidc_driver.h" +#include "msm_vidc_internal.h" +#include "msm_vidc_platform.h" +#include "msm_vidc_debug.h" + + +int msm_vdec_inst_init(struct msm_vidc_inst *inst) +{ + int rc = 0; + struct msm_vidc_core *core; + struct v4l2_format *f; + + d_vpr_h("%s()\n", __func__); + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + core = inst->core; + + INIT_DELAYED_WORK(&inst->decode_batch.work, msm_vidc_batch_handler); + + f = &inst->fmts[INPUT_PORT]; + f->type = INPUT_PLANE; + f->fmt.pix.width = DEFAULT_WIDTH; + f->fmt.pix.height = DEFAULT_HEIGHT; + f->fmt.pix.pixelformat = V4L2_PIX_FMT_H264; + f->fmt.pix.bytesperline = 0; + f->fmt.pix.sizeimage = call_session_op(core, buffer_size, + inst, MSM_VIDC_INPUT); + inst->buffers.input.min_count = + call_session_op(core, min_count, inst, MSM_VIDC_INPUT); + inst->buffers.input.extra_count = + call_session_op(core, extra_count, inst, MSM_VIDC_INPUT); + inst->buffers.input.actual_count = + inst->buffers.input.min_count + + inst->buffers.input.extra_count; + inst->buffers.input.size = f->fmt.pix.sizeimage; + + f = &inst->fmts[INPUT_META_PORT]; + f->type = INPUT_META_PLANE; + f->fmt.meta.dataformat = V4L2_PIX_FMT_VIDC_META; + f->fmt.meta.buffersize = call_session_op(core, buffer_size, + inst, MSM_VIDC_INPUT_META); + inst->buffers.input_meta.min_count = inst->buffers.input.min_count; + inst->buffers.input_meta.extra_count = inst->buffers.input.extra_count; + inst->buffers.input_meta.actual_count = inst->buffers.input.actual_count; + inst->buffers.input_meta.size = f->fmt.meta.buffersize; + + f = &inst->fmts[OUTPUT_PORT]; + f->type = OUTPUT_PLANE; + f->fmt.pix.pixelformat = V4L2_PIX_FMT_NV12_UBWC; + f->fmt.pix.width = VENUS_Y_STRIDE( + msm_vidc_convert_color_fmt(f->fmt.pix.pixelformat), DEFAULT_WIDTH); + f->fmt.pix.height = VENUS_Y_SCANLINES( + msm_vidc_convert_color_fmt(f->fmt.pix.pixelformat), DEFAULT_HEIGHT); + f->fmt.pix.bytesperline = f->fmt.pix.width; + f->fmt.pix.sizeimage = call_session_op(core, buffer_size, + inst, MSM_VIDC_OUTPUT); + inst->buffers.output.min_count = + call_session_op(core, min_count, inst, MSM_VIDC_OUTPUT); + inst->buffers.output.extra_count = + call_session_op(core, extra_count, inst, MSM_VIDC_OUTPUT); + inst->buffers.output.actual_count = + inst->buffers.output.min_count + + inst->buffers.output.extra_count; + inst->buffers.output.size = f->fmt.pix.sizeimage; + + f = &inst->fmts[OUTPUT_META_PORT]; + f->type = OUTPUT_META_PLANE; + f->fmt.meta.dataformat = V4L2_PIX_FMT_VIDC_META; + f->fmt.meta.buffersize = call_session_op(core, buffer_size, + inst, MSM_VIDC_OUTPUT_META); + inst->buffers.output_meta.min_count = inst->buffers.output.min_count; + inst->buffers.output_meta.extra_count = inst->buffers.output.extra_count; + inst->buffers.output_meta.actual_count = inst->buffers.output.actual_count; + inst->buffers.output_meta.size = f->fmt.meta.buffersize; + + inst->prop.frame_rate = DEFAULT_FPS << 16; + inst->prop.operating_rate = DEFAULT_FPS << 16; + + return rc; +} + +int msm_vdec_ctrl_init(struct msm_vidc_inst *inst) +{ + int rc = 0; + struct msm_vidc_core *core; + + d_vpr_h("%s()\n", __func__); + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + core = inst->core; + + return rc; +} diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c new file mode 100644 index 0000000000..60ab8523f5 --- /dev/null +++ b/driver/vidc/src/msm_venc.c @@ -0,0 +1,106 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2020, The Linux Foundation. All rights reserved. + */ + +#include +#include + +#include "msm_venc.h" +#include "msm_vidc_core.h" +#include "msm_vidc_inst.h" +#include "msm_vidc_driver.h" +#include "msm_vidc_internal.h" +#include "msm_vidc_platform.h" +#include "msm_vidc_debug.h" + + +int msm_venc_inst_init(struct msm_vidc_inst *inst) +{ + int rc = 0; + struct msm_vidc_core *core; + struct v4l2_format *f; + + d_vpr_h("%s()\n", __func__); + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + core = inst->core; + + f = &inst->fmts[OUTPUT_PORT]; + f->type = OUTPUT_PLANE; + f->fmt.pix.width = DEFAULT_WIDTH; + f->fmt.pix.height = DEFAULT_HEIGHT; + f->fmt.pix.pixelformat = V4L2_PIX_FMT_H264; + f->fmt.pix.bytesperline = 0; + f->fmt.pix.sizeimage = call_session_op(core, buffer_size, + inst, MSM_VIDC_OUTPUT); + inst->buffers.output.min_count = + call_session_op(core, min_count, inst, MSM_VIDC_OUTPUT); + inst->buffers.output.extra_count = + call_session_op(core, extra_count, inst, MSM_VIDC_OUTPUT); + inst->buffers.output.actual_count = + inst->buffers.output.min_count + + inst->buffers.output.extra_count; + inst->buffers.output.size = f->fmt.pix.sizeimage; + + f = &inst->fmts[OUTPUT_META_PORT]; + f->type = OUTPUT_META_PLANE; + f->fmt.meta.dataformat = V4L2_PIX_FMT_VIDC_META; + f->fmt.meta.buffersize = call_session_op(core, buffer_size, + inst, MSM_VIDC_OUTPUT_META); + inst->buffers.output_meta.min_count = inst->buffers.output.min_count; + inst->buffers.output_meta.extra_count = inst->buffers.output.extra_count; + inst->buffers.output_meta.actual_count = inst->buffers.output.actual_count; + inst->buffers.output_meta.size = f->fmt.meta.buffersize; + + f = &inst->fmts[INPUT_PORT]; + f->type = INPUT_PLANE; + f->fmt.pix.pixelformat = V4L2_PIX_FMT_NV12_UBWC; + f->fmt.pix.width = VENUS_Y_STRIDE( + msm_vidc_convert_color_fmt(f->fmt.pix.pixelformat), DEFAULT_WIDTH); + f->fmt.pix.height = VENUS_Y_SCANLINES( + msm_vidc_convert_color_fmt(f->fmt.pix.pixelformat), DEFAULT_HEIGHT); + f->fmt.pix.bytesperline = f->fmt.pix.width; + f->fmt.pix.sizeimage = call_session_op(core, buffer_size, + inst, MSM_VIDC_INPUT); + inst->buffers.input.min_count = + call_session_op(core, min_count, inst, MSM_VIDC_INPUT); + inst->buffers.input.extra_count = + call_session_op(core, extra_count, inst, MSM_VIDC_INPUT); + inst->buffers.input.actual_count = + inst->buffers.input.min_count + + inst->buffers.input.extra_count; + inst->buffers.input.size = f->fmt.pix.sizeimage; + + f = &inst->fmts[INPUT_META_PORT]; + f->type = INPUT_META_PLANE; + f->fmt.meta.dataformat = V4L2_PIX_FMT_VIDC_META; + f->fmt.meta.buffersize = call_session_op(core, buffer_size, + inst, MSM_VIDC_INPUT_META); + inst->buffers.input_meta.min_count = inst->buffers.input.min_count; + inst->buffers.input_meta.extra_count = inst->buffers.input.extra_count; + inst->buffers.input_meta.actual_count = inst->buffers.input.actual_count; + inst->buffers.input_meta.size = f->fmt.meta.buffersize; + + inst->prop.frame_rate = DEFAULT_FPS << 16; + inst->prop.operating_rate = DEFAULT_FPS << 16; + + return rc; +} + +int msm_venc_ctrl_init(struct msm_vidc_inst *inst) +{ + int rc = 0; + struct msm_vidc_core *core; + + d_vpr_h("%s()\n", __func__); + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + core = inst->core; + + return rc; +} diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c new file mode 100644 index 0000000000..9289019791 --- /dev/null +++ b/driver/vidc/src/msm_vidc.c @@ -0,0 +1,457 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2020, The Linux Foundation. All rights reserved. + */ + +#include "msm_vidc.h" +#include "msm_vidc_core.h" +#include "msm_vidc_inst.h" +#include "msm_vdec.h" +#include "msm_venc.h" +#include "msm_vidc_internal.h" +#include "msm_vidc_driver.h" +#include "msm_vidc_vb2.h" +#include "msm_vidc_v4l2.h" +#include "msm_vidc_debug.h" + +#define MSM_VIDC_DRV_NAME "msm_vidc_driver" +/* kernel/msm-4.19 */ +#define MSM_VIDC_VERSION ((0 << 16) + (4 << 8) + 19) + +#define MAX_EVENTS 30 + +bool valid_v4l2_buffer(struct v4l2_buffer *b, + struct msm_vidc_inst *inst) +{ + return true; +} +/* +static int get_poll_flags(struct msm_vidc_inst *inst) +{ + int rc = 0; + struct vb2_queue *outq = &inst->bufq[PORT_INPUT].vb2_bufq; + struct vb2_queue *capq = &inst->bufq[PORT_OUTPUT].vb2_bufq; + struct vb2_buffer *out_vb = NULL; + struct vb2_buffer *cap_vb = NULL; + unsigned long flags = 0; + + if (v4l2_event_pending(&inst->event_handler)) + rc |= POLLPRI; + + spin_lock_irqsave(&capq->done_lock, flags); + if (!list_empty(&capq->done_list)) + cap_vb = list_first_entry(&capq->done_list, struct vb2_buffer, + done_entry); + if (cap_vb && (cap_vb->state == VB2_BUF_STATE_DONE + || cap_vb->state == VB2_BUF_STATE_ERROR)) + rc |= POLLIN | POLLRDNORM; + spin_unlock_irqrestore(&capq->done_lock, flags); + + spin_lock_irqsave(&outq->done_lock, flags); + if (!list_empty(&outq->done_list)) + out_vb = list_first_entry(&outq->done_list, struct vb2_buffer, + done_entry); + if (out_vb && (out_vb->state == VB2_BUF_STATE_DONE + || out_vb->state == VB2_BUF_STATE_ERROR)) + rc |= POLLOUT | POLLWRNORM; + spin_unlock_irqrestore(&outq->done_lock, flags); + + return rc; +} +*/ + +int msm_vidc_poll(void *instance, struct file *filp, + struct poll_table_struct *wait) +{ +/* + struct msm_vidc_inst *inst = instance; + struct vb2_queue *outq = NULL; + struct vb2_queue *capq = NULL; + + if (!inst) + return -EINVAL; + + outq = &inst->bufq[PORT_INPUT].vb2_bufq; + capq = &inst->bufq[PORT_OUTPUT].vb2_bufq; + + poll_wait(filp, &inst->event_handler.wait, wait); + poll_wait(filp, &capq->done_wq, wait); + poll_wait(filp, &outq->done_wq, wait); + return get_poll_flags(inst); +*/ + return 0; +} +EXPORT_SYMBOL(msm_vidc_poll); + +int msm_vidc_querycap(void *instance, struct v4l2_capability *cap) +{ + struct msm_vidc_inst *inst = instance; + + if (!inst || !cap) + return -EINVAL; + + strlcpy(cap->driver, MSM_VIDC_DRV_NAME, sizeof(cap->driver)); + cap->bus_info[0] = 0; + cap->version = MSM_VIDC_VERSION; + cap->device_caps = V4L2_CAP_VIDEO_CAPTURE_MPLANE | + V4L2_CAP_VIDEO_OUTPUT_MPLANE | + V4L2_CAP_STREAMING; + cap->capabilities = cap->device_caps | V4L2_CAP_DEVICE_CAPS; + + memset(cap->reserved, 0, sizeof(cap->reserved)); + + if (inst->domain == MSM_VIDC_DECODER) + strlcpy(cap->card, "msm_vidc_decoder", sizeof(cap->card)); + else if (inst->domain == MSM_VIDC_ENCODER) + strlcpy(cap->card, "msm_vidc_encoder", sizeof(cap->card)); + else + return -EINVAL; + + return 0; +} +EXPORT_SYMBOL(msm_vidc_querycap); + +int msm_vidc_enum_fmt(void *instance, struct v4l2_fmtdesc *f) +{ + struct msm_vidc_inst *inst = instance; + + if (!inst || !f) + return -EINVAL; + + if (inst->domain == MSM_VIDC_DECODER) + return 0;//msm_vdec_enum_fmt(instance, f); + else if (inst->domain == MSM_VIDC_ENCODER) + return 0;//msm_venc_enum_fmt(instance, f); + return -EINVAL; +} +EXPORT_SYMBOL(msm_vidc_enum_fmt); + +int msm_vidc_query_ctrl(void *instance, struct v4l2_queryctrl *q_ctrl) +{ + int rc = 0; + struct msm_vidc_inst *inst = instance; + struct v4l2_ctrl *ctrl; + + if (!inst || !q_ctrl) { + d_vpr_e("%s: invalid params %pK %pK\n", + __func__, inst, q_ctrl); + return -EINVAL; + } + + ctrl = v4l2_ctrl_find(&inst->ctrl_handler, q_ctrl->id); + if (!ctrl) { + s_vpr_e(inst->sid, "%s: get_ctrl failed for id %d\n", + __func__, q_ctrl->id); + return -EINVAL; + } + q_ctrl->minimum = ctrl->minimum; + q_ctrl->maximum = ctrl->maximum; + q_ctrl->default_value = ctrl->default_value; + /* remove tier info for HEVC level */ + if (q_ctrl->id == V4L2_CID_MPEG_VIDEO_HEVC_LEVEL) { + q_ctrl->minimum &= ~(0xF << 28); + q_ctrl->maximum &= ~(0xF << 28); + } + if (ctrl->type == V4L2_CTRL_TYPE_MENU) { + q_ctrl->flags = ~(ctrl->menu_skip_mask); + } else { + q_ctrl->flags = 0; + q_ctrl->step = ctrl->step; + } + s_vpr_h(inst->sid, + "query ctrl: %s: min %d, max %d, default %d step %d flags %#x\n", + ctrl->name, q_ctrl->minimum, q_ctrl->maximum, + q_ctrl->default_value, q_ctrl->step, q_ctrl->flags); + return rc; +} +EXPORT_SYMBOL(msm_vidc_query_ctrl); + +int msm_vidc_query_menu(void *instance, struct v4l2_querymenu *qmenu) +{ + int rc = 0; + struct msm_vidc_inst *inst = instance; + struct v4l2_ctrl *ctrl; + + if (!inst || !qmenu) { + d_vpr_e("%s: invalid params %pK %pK\n", + __func__, inst, qmenu); + return -EINVAL; + } + + ctrl = v4l2_ctrl_find(&inst->ctrl_handler, qmenu->id); + if (!ctrl) { + s_vpr_e(inst->sid, "%s: get_ctrl failed for id %d\n", + __func__, qmenu->id); + return -EINVAL; + } + if (ctrl->type != V4L2_CTRL_TYPE_MENU) { + s_vpr_e(inst->sid, "%s: ctrl: %s: type (%d) is not MENU type\n", + __func__, ctrl->name, ctrl->type); + return -EINVAL; + } + if (qmenu->index < ctrl->minimum || qmenu->index > ctrl->maximum) + return -EINVAL; + + if (ctrl->menu_skip_mask & (1 << qmenu->index)) + rc = -EINVAL; + + s_vpr_h(inst->sid, + "%s: ctrl: %s: min %d, max %d, menu_skip_mask %#x, qmenu: id %d, index %d, %s\n", + __func__, ctrl->name, ctrl->minimum, ctrl->maximum, + ctrl->menu_skip_mask, qmenu->id, qmenu->index, + rc ? "not supported" : "supported"); + return rc; +} +EXPORT_SYMBOL(msm_vidc_query_menu); + +int msm_vidc_s_fmt(void *instance, struct v4l2_format *f) +{ + int rc = 0; + struct msm_vidc_inst *inst = instance; + + if (!inst || !f) + return -EINVAL; + + if (inst->domain == MSM_VIDC_DECODER) + rc = 0;//msm_vdec_s_fmt(instance, f); + if (inst->domain == MSM_VIDC_ENCODER) + rc = 0;//msm_venc_s_fmt(instance, f); + + return rc; +} +EXPORT_SYMBOL(msm_vidc_s_fmt); + +int msm_vidc_g_fmt(void *instance, struct v4l2_format *f) +{ + int rc = 0; + struct msm_vidc_inst *inst = instance; + + if (!inst || !f) + return -EINVAL; + + if (inst->domain == MSM_VIDC_DECODER) + rc = 0;//msm_vdec_g_fmt(instance, f); + if (inst->domain == MSM_VIDC_ENCODER) + rc = 0;//msm_venc_g_fmt(instance, f); + + return rc; +} +EXPORT_SYMBOL(msm_vidc_g_fmt); + +int msm_vidc_s_ctrl(void *instance, struct v4l2_control *control) +{ + struct msm_vidc_inst *inst = instance; + + if (!inst || !control) + return -EINVAL; + + return 0;//msm_comm_s_ctrl(instance, control); +} +EXPORT_SYMBOL(msm_vidc_s_ctrl); + +int msm_vidc_g_ctrl(void *instance, struct v4l2_control *control) +{ + struct msm_vidc_inst *inst = instance; + struct v4l2_ctrl *ctrl = NULL; + int rc = 0; + + if (!inst || !control) + return -EINVAL; + + ctrl = v4l2_ctrl_find(&inst->ctrl_handler, control->id); + if (ctrl) { + rc = 0;//try_get_ctrl_for_instance(inst, ctrl); + if (!rc) + control->value = ctrl->val; + } + + return rc; +} +EXPORT_SYMBOL(msm_vidc_g_ctrl); + +int msm_vidc_reqbufs(void *instance, struct v4l2_requestbuffers *b) +{ + return 0; +} +EXPORT_SYMBOL(msm_vidc_reqbufs); + +int msm_vidc_qbuf(void *instance, struct media_device *mdev, + struct v4l2_buffer *b) +{ + return 0; +} +EXPORT_SYMBOL(msm_vidc_qbuf); + +int msm_vidc_dqbuf(void *instance, struct v4l2_buffer *b) +{ + return 0; +} +EXPORT_SYMBOL(msm_vidc_dqbuf); + +int msm_vidc_streamon(void *instance, enum v4l2_buf_type i) +{ + return 0; +} +EXPORT_SYMBOL(msm_vidc_streamon); + +int msm_vidc_streamoff(void *instance, enum v4l2_buf_type i) +{ + return 0; +} +EXPORT_SYMBOL(msm_vidc_streamoff); + +int msm_vidc_cmd(void *instance, union msm_v4l2_cmd *cmd) +{ + return 0; +} +EXPORT_SYMBOL(msm_vidc_cmd); + +int msm_vidc_enum_framesizes(void *instance, struct v4l2_frmsizeenum *fsize) +{ + return 0; +} +EXPORT_SYMBOL(msm_vidc_enum_framesizes); + +int msm_vidc_subscribe_event(void *inst, + const struct v4l2_event_subscription *sub) +{ + int rc = 0; + struct msm_vidc_inst *vidc_inst = (struct msm_vidc_inst *)inst; + + if (!inst || !sub) + return -EINVAL; + + rc = v4l2_event_subscribe(&vidc_inst->event_handler, + sub, MAX_EVENTS, NULL); + return rc; +} +EXPORT_SYMBOL(msm_vidc_subscribe_event); + +int msm_vidc_unsubscribe_event(void *inst, + const struct v4l2_event_subscription *sub) +{ + int rc = 0; + struct msm_vidc_inst *vidc_inst = (struct msm_vidc_inst *)inst; + + if (!inst || !sub) + return -EINVAL; + + rc = v4l2_event_unsubscribe(&vidc_inst->event_handler, sub); + return rc; +} +EXPORT_SYMBOL(msm_vidc_unsubscribe_event); + +int msm_vidc_dqevent(void *inst, struct v4l2_event *event) +{ + int rc = 0; + struct msm_vidc_inst *vidc_inst = (struct msm_vidc_inst *)inst; + + if (!inst || !event) + return -EINVAL; + + rc = v4l2_event_dequeue(&vidc_inst->event_handler, event, false); + return rc; +} +EXPORT_SYMBOL(msm_vidc_dqevent); + +void *msm_vidc_open(void *vidc_core, u32 session_type) +{ + int rc = 0; + struct msm_vidc_inst *inst; + struct msm_vidc_core *core; + + d_vpr_h("%s()\n", __func__); + core = vidc_core; + if (!core) { + d_vpr_e("%s: invalid params\n", __func__); + return NULL; + } + + if (session_type != MSM_VIDC_DECODER && + session_type != MSM_VIDC_ENCODER) { + d_vpr_e("%s: invalid session_type %d\n", + __func__, session_type); + return NULL; + } + + if (core->state == MSM_VIDC_CORE_ERROR) { + d_vpr_e("%s: core invalid state\n", __func__); + return NULL; + } + + if (core->state == MSM_VIDC_CORE_DEINIT) { + rc = msm_vidc_core_init(core); + if (rc) + return NULL; + } + + inst = kzalloc(sizeof(*inst), GFP_KERNEL); + if (!inst) { + d_vpr_e("%s: failed to allocate inst memory\n", __func__); + return NULL; + } + inst->core = core; + + rc = msm_vidc_add_session(inst); + if (rc) { + d_vpr_e("%s: failed to get session id\n", __func__); + return NULL; + } + + s_vpr_i(inst->sid, "Opening video instance: %d\n", session_type); + + kref_init(&inst->kref); + INIT_LIST_HEAD(&inst->buffers.input.list); + INIT_LIST_HEAD(&inst->buffers.input_meta.list); + INIT_LIST_HEAD(&inst->buffers.output.list); + INIT_LIST_HEAD(&inst->buffers.output_meta.list); + INIT_LIST_HEAD(&inst->buffers.scratch.list); + INIT_LIST_HEAD(&inst->buffers.scratch_1.list); + INIT_LIST_HEAD(&inst->buffers.scratch_2.list); + INIT_LIST_HEAD(&inst->buffers.persist.list); + INIT_LIST_HEAD(&inst->buffers.persist_1.list); + inst->domain = session_type; + inst->state = MSM_VIDC_OPEN; + //inst->debugfs_root = + // msm_vidc_debugfs_init_inst(inst, core->debugfs_root); + + if (is_decode_session(inst)) { + rc = msm_vdec_inst_init(inst); + if (rc) + goto error; + rc = msm_vdec_ctrl_init(inst); + if (rc) + goto error; + } else if (is_encode_session(inst)) { + rc = msm_venc_inst_init(inst); + if (rc) + goto error; + rc = msm_venc_ctrl_init(inst); + if (rc) + goto error; + } + + rc = msm_vidc_queue_init(inst); + if (rc) + goto error; + + rc = msm_vidc_setup_event_queue(inst); + if (rc) + goto error; + + //msm_power_setup(inst); + // send cmd to firmware here + + return inst; + +error: + msm_vidc_close(inst); + return NULL; +} +EXPORT_SYMBOL(msm_vidc_open); + +int msm_vidc_close(void *instance) +{ + return 0; +} +EXPORT_SYMBOL(msm_vidc_close); diff --git a/driver/vidc/src/msm_vidc_debug.c b/driver/vidc/src/msm_vidc_debug.c new file mode 100644 index 0000000000..e7407a4e3f --- /dev/null +++ b/driver/vidc/src/msm_vidc_debug.c @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2020, The Linux Foundation. All rights reserved. + */ + +#include "msm_vidc_debug.h" + +int msm_vidc_debug = VIDC_HIGH | VIDC_LOW | VIDC_PKT | VIDC_ERR | VIDC_PRINTK | + FW_ERROR | FW_FATAL | FW_FTRACE; +EXPORT_SYMBOL(msm_vidc_debug); + +bool msm_vidc_lossless_encode = !true; +EXPORT_SYMBOL(msm_vidc_lossless_encode); + +bool msm_vidc_syscache_disable = !true; +EXPORT_SYMBOL(msm_vidc_syscache_disable); diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c new file mode 100644 index 0000000000..bc56a27f32 --- /dev/null +++ b/driver/vidc/src/msm_vidc_driver.c @@ -0,0 +1,151 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2020, The Linux Foundation. All rights reserved. + */ + +#include +#include +#include +#include + +#include "msm_vidc_driver.h" +#include "msm_vidc_internal.h" +#include "msm_vidc_debug.h" +#include "venus_hfi.h" + +u32 msm_vidc_convert_color_fmt(u32 v4l2_fmt) +{ + switch (v4l2_fmt) { + case V4L2_PIX_FMT_NV12: + return COLOR_FMT_NV12; + case V4L2_PIX_FMT_NV21: + return COLOR_FMT_NV21; + case V4L2_PIX_FMT_NV12_512: + return COLOR_FMT_NV12_512; + case V4L2_PIX_FMT_SDE_Y_CBCR_H2V2_P010_VENUS: + return COLOR_FMT_P010; + case V4L2_PIX_FMT_NV12_UBWC: + return COLOR_FMT_NV12_UBWC; + case V4L2_PIX_FMT_NV12_TP10_UBWC: + return COLOR_FMT_NV12_BPP10_UBWC; + case V4L2_PIX_FMT_RGBA8888_UBWC: + return COLOR_FMT_RGBA8888_UBWC; + default: + d_vpr_e( + "Invalid v4l2 color fmt FMT : %x, Set default(NV12)", + v4l2_fmt); + return COLOR_FMT_NV12; + } +} + +int msm_vidc_setup_event_queue(struct msm_vidc_inst *inst) +{ + int rc = 0; + + return rc; +} + +int msm_vidc_queue_init(struct msm_vidc_inst *inst) +{ + int rc = 0; + + return rc; +} + +int msm_vidc_add_session(struct msm_vidc_inst *inst) +{ + int rc = 0; + struct msm_vidc_inst *i; + struct msm_vidc_core *core; + u32 count = 0; + + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + core = inst->core; + + mutex_lock(&core->lock); + list_for_each_entry(i, &core->instances, list) + count++; + + if (count < MAX_SUPPORTED_INSTANCES) { + list_add_tail(&inst->list, &core->instances); + } else { + d_vpr_e("%s: total sessions %d reached max limit %d\n", + __func__, count, MAX_SUPPORTED_INSTANCES); + rc = -EINVAL; + } + mutex_unlock(&core->lock); + + /* assign session_id */ + inst->session_id = count + 1; + inst->sid = inst->session_id; + + return rc; +} + +int msm_vidc_core_init(struct msm_vidc_core *core) +{ + int rc; + + d_vpr_h("%s()\n", __func__); + if (!core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + mutex_lock(&core->lock); + if (core->state == MSM_VIDC_CORE_ERROR) { + d_vpr_e("%s: core invalid state\n", __func__); + rc = -EINVAL; + goto unlock; + } + if (core->state == MSM_VIDC_CORE_INIT) { + rc = 0; + goto unlock; + } + + rc = venus_hfi_core_init(core); + if (rc) { + d_vpr_e("%s: core init failed\n", __func__); + core->state = MSM_VIDC_CORE_DEINIT; + goto unlock; + } + + core->state = MSM_VIDC_CORE_INIT; + core->smmu_fault_handled = false; + core->ssr.trigger = false; + +unlock: + mutex_unlock(&core->lock); + return rc; +} + +int msm_vidc_smmu_fault_handler(struct iommu_domain *domain, + struct device *dev, unsigned long iova, int flags, void *data) +{ + return -EINVAL; +} + +int msm_vidc_trigger_ssr(struct msm_vidc_core *core, + enum msm_vidc_ssr_trigger_type type) +{ + return 0; +} + +void msm_vidc_ssr_handler(struct work_struct *work) +{ +} + +void msm_vidc_pm_work_handler(struct work_struct *work) +{ +} + +void msm_vidc_fw_unload_handler(struct work_struct *work) +{ +} + +void msm_vidc_batch_handler(struct work_struct *work) +{ +} diff --git a/driver/vidc/src/msm_vidc_dt.c b/driver/vidc/src/msm_vidc_dt.c new file mode 100644 index 0000000000..5647fdce0e --- /dev/null +++ b/driver/vidc/src/msm_vidc_dt.c @@ -0,0 +1,970 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2020, The Linux Foundation. All rights reserved. + */ + +#include +#include +#include + +#include "msm_vidc_dt.h" +#include "msm_vidc_internal.h" +#include "msm_vidc_core.h" +#include "msm_vidc_debug.h" +#include "msm_vidc_driver.h" + +static size_t get_u32_array_num_elements(struct device_node *np, + char *name) +{ + int len; + size_t num_elements = 0; + + if (!of_get_property(np, name, &len)) { + d_vpr_e("Failed to read %s from device tree\n", name); + goto fail_read; + } + + num_elements = len / sizeof(u32); + if (num_elements <= 0) { + d_vpr_e("%s not specified in device tree\n", name); + goto fail_read; + } + return num_elements; + +fail_read: + return 0; +} + +/** + * msm_vidc_load_u32_table() - load dtsi table entries + * @pdev: A pointer to the platform device. + * @of_node: A pointer to the device node. + * @table_name: A pointer to the dtsi table entry name. + * @struct_size: The size of the structure which is nothing but + * a single entry in the dtsi table. + * @table: A pointer to the table pointer which needs to be + * filled by the dtsi table entries. + * @num_elements: Number of elements pointer which needs to be filled + * with the number of elements in the table. + * + * This is a generic implementation to load single or multiple array + * table from dtsi. The array elements should be of size equal to u32. + * + * Return: Return '0' for success else appropriate error value. + */ +static int msm_vidc_load_u32_table(struct platform_device *pdev, + struct device_node *of_node, char *table_name, int struct_size, + u32 **table, u32 *num_elements) +{ + int rc = 0, num_elemts = 0; + u32 *ptbl = NULL; + + if (!of_find_property(of_node, table_name, NULL)) { + d_vpr_h("%s not found\n", table_name); + return 0; + } + + num_elemts = get_u32_array_num_elements(of_node, table_name); + if (!num_elemts) { + d_vpr_e("no elements in %s\n", table_name); + return 0; + } + num_elemts /= struct_size / sizeof(u32); + + ptbl = devm_kzalloc(&pdev->dev, num_elemts * struct_size, GFP_KERNEL); + if (!ptbl) { + d_vpr_e("Failed to alloc table %s\n", table_name); + return -ENOMEM; + } + + if (of_property_read_u32_array(of_node, table_name, ptbl, + num_elemts * struct_size / sizeof(u32))) { + d_vpr_e("Failed to read %s\n", table_name); + return -EINVAL; + } + + *table = ptbl; + if (num_elements) + *num_elements = num_elemts; + + return rc; +} + +/* A comparator to compare loads (needed later on) */ +static int cmp(const void *a, const void *b) +{ + /* want to sort in reverse so flip the comparison */ + return ((struct allowed_clock_rates_table *)b)->clock_rate - + ((struct allowed_clock_rates_table *)a)->clock_rate; +} + +static void msm_vidc_free_allowed_clocks_table(struct msm_vidc_dt *dt) +{ + dt->allowed_clks_tbl = NULL; +} + +static void msm_vidc_free_reg_table(struct msm_vidc_dt *dt) +{ + dt->reg_set.reg_tbl = NULL; +} + +static void msm_vidc_free_qdss_addr_table(struct msm_vidc_dt *dt) +{ + dt->qdss_addr_set.addr_tbl = NULL; +} + +static void msm_vidc_free_bus_table(struct msm_vidc_dt *dt) +{ + dt->bus_set.bus_tbl = NULL; + dt->bus_set.count = 0; +} + +static void msm_vidc_free_buffer_usage_table(struct msm_vidc_dt *dt) +{ + dt->buffer_usage_set.buffer_usage_tbl = NULL; +} + +static void msm_vidc_free_regulator_table(struct msm_vidc_dt *dt) +{ + int c = 0; + + for (c = 0; c < dt->regulator_set.count; ++c) { + struct regulator_info *rinfo = + &dt->regulator_set.regulator_tbl[c]; + + rinfo->name = NULL; + } + + dt->regulator_set.regulator_tbl = NULL; + dt->regulator_set.count = 0; +} + +static void msm_vidc_free_clock_table(struct msm_vidc_dt *dt) +{ + dt->clock_set.clock_tbl = NULL; + dt->clock_set.count = 0; +} + +static int msm_vidc_load_fw_name(struct msm_vidc_core *core) +{ + struct platform_device *pdev = core->pdev; + + return of_property_read_string_index(pdev->dev.of_node, + "vidc,firmware-name", 0, &core->dt->fw_name); +} + +static int msm_vidc_load_reg_table(struct msm_vidc_core *core) +{ + struct reg_set *reg_set; + struct platform_device *pdev = core->pdev; + struct msm_vidc_dt *dt = core->dt; + int i; + int rc = 0; + + if (!of_find_property(pdev->dev.of_node, "qcom,reg-presets", NULL)) { + /* + * qcom,reg-presets is an optional property. It likely won't be + * present if we don't have any register settings to program + */ + d_vpr_h("reg-presets not found\n"); + return 0; + } + + reg_set = &dt->reg_set; + reg_set->count = get_u32_array_num_elements(pdev->dev.of_node, + "qcom,reg-presets"); + reg_set->count /= sizeof(*reg_set->reg_tbl) / sizeof(u32); + + if (!reg_set->count) { + d_vpr_h("no elements in reg set\n"); + return rc; + } + + reg_set->reg_tbl = devm_kzalloc(&pdev->dev, reg_set->count * + sizeof(*(reg_set->reg_tbl)), GFP_KERNEL); + if (!reg_set->reg_tbl) { + d_vpr_e("%s: Failed to alloc register table\n", __func__); + return -ENOMEM; + } + + if (of_property_read_u32_array(pdev->dev.of_node, "qcom,reg-presets", + (u32 *)reg_set->reg_tbl, reg_set->count * 3)) { + d_vpr_e("Failed to read register table\n"); + msm_vidc_free_reg_table(core->dt); + return -EINVAL; + } + for (i = 0; i < reg_set->count; i++) { + d_vpr_h("reg = %#x, value = %#x, mask = %#x\n", + reg_set->reg_tbl[i].reg, reg_set->reg_tbl[i].value, + reg_set->reg_tbl[i].mask); + } + return rc; +} +static int msm_vidc_load_qdss_table(struct msm_vidc_core *core) +{ + struct addr_set *qdss_addr_set; + struct platform_device *pdev = core->pdev; + struct msm_vidc_dt *dt = core->dt; + int i; + int rc = 0; + + if (!of_find_property(pdev->dev.of_node, "qcom,qdss-presets", NULL)) { + /* + * qcom,qdss-presets is an optional property. It likely won't be + * present if we don't have any register settings to program + */ + d_vpr_h("qdss-presets not found\n"); + return rc; + } + + qdss_addr_set = &dt->qdss_addr_set; + qdss_addr_set->count = get_u32_array_num_elements(pdev->dev.of_node, + "qcom,qdss-presets"); + qdss_addr_set->count /= sizeof(*qdss_addr_set->addr_tbl) / sizeof(u32); + + if (!qdss_addr_set->count) { + d_vpr_h("no elements in qdss reg set\n"); + return rc; + } + + qdss_addr_set->addr_tbl = devm_kzalloc(&pdev->dev, + qdss_addr_set->count * sizeof(*qdss_addr_set->addr_tbl), + GFP_KERNEL); + if (!qdss_addr_set->addr_tbl) { + d_vpr_e("%s: Failed to alloc register table\n", __func__); + rc = -ENOMEM; + goto err_qdss_addr_tbl; + } + + rc = of_property_read_u32_array(pdev->dev.of_node, "qcom,qdss-presets", + (u32 *)qdss_addr_set->addr_tbl, qdss_addr_set->count * 2); + if (rc) { + d_vpr_e("Failed to read qdss address table\n"); + msm_vidc_free_qdss_addr_table(core->dt); + rc = -EINVAL; + goto err_qdss_addr_tbl; + } + + for (i = 0; i < qdss_addr_set->count; i++) { + d_vpr_h("qdss addr = %x, value = %x\n", + qdss_addr_set->addr_tbl[i].start, + qdss_addr_set->addr_tbl[i].size); + } +err_qdss_addr_tbl: + return rc; +} + +static int msm_vidc_load_subcache_info(struct msm_vidc_core *core) +{ + int rc = 0, num_subcaches = 0, c; + struct platform_device *pdev = core->pdev; + struct msm_vidc_dt *dt = core->dt; + struct subcache_set *subcaches = &dt->subcache_set; + + num_subcaches = of_property_count_strings(pdev->dev.of_node, + "cache-slice-names"); + if (num_subcaches <= 0) { + d_vpr_h("No subcaches found\n"); + goto err_load_subcache_table_fail; + } + + subcaches->subcache_tbl = devm_kzalloc(&pdev->dev, + sizeof(*subcaches->subcache_tbl) * num_subcaches, GFP_KERNEL); + if (!subcaches->subcache_tbl) { + d_vpr_e("Failed to allocate memory for subcache tbl\n"); + rc = -ENOMEM; + goto err_load_subcache_table_fail; + } + + subcaches->count = num_subcaches; + d_vpr_h("Found %d subcaches\n", num_subcaches); + + for (c = 0; c < num_subcaches; ++c) { + struct subcache_info *vsc = &dt->subcache_set.subcache_tbl[c]; + + of_property_read_string_index(pdev->dev.of_node, + "cache-slice-names", c, &vsc->name); + } + + dt->sys_cache_present = true; + + return 0; + +err_load_subcache_table_fail: + dt->sys_cache_present = false; + subcaches->count = 0; + subcaches->subcache_tbl = NULL; + + return rc; +} + +static int msm_vidc_load_allowed_clocks_table( + struct msm_vidc_core *core) +{ + int rc = 0; + struct platform_device *pdev = core->pdev; + struct msm_vidc_dt *dt = core->dt; + + if (!of_find_property(pdev->dev.of_node, + "qcom,allowed-clock-rates", NULL)) { + d_vpr_h("allowed-clock-rates not found\n"); + return 0; + } + + rc = msm_vidc_load_u32_table(pdev, pdev->dev.of_node, + "qcom,allowed-clock-rates", + sizeof(*dt->allowed_clks_tbl), + (u32 **)&dt->allowed_clks_tbl, + &dt->allowed_clks_tbl_size); + if (rc) { + d_vpr_e("%s: failed to read allowed clocks table\n", __func__); + return rc; + } + + sort(dt->allowed_clks_tbl, dt->allowed_clks_tbl_size, + sizeof(*dt->allowed_clks_tbl), cmp, NULL); + + return 0; +} + +static int msm_vidc_load_bus_table(struct msm_vidc_core *core) +{ + struct platform_device *pdev = core->pdev; + struct msm_vidc_dt *dt = core->dt; + struct bus_set *buses = &dt->bus_set; + int c = 0, num_buses = 0, rc = 0; + u32 *bus_ranges = NULL; + + num_buses = of_property_count_strings(pdev->dev.of_node, + "interconnect-names"); + if (num_buses <= 0) { + d_vpr_e("No buses found\n"); + return -EINVAL; + } + + buses->count = num_buses; + d_vpr_h("Found %d bus interconnects\n", num_buses); + + bus_ranges = kzalloc(2 * num_buses * sizeof(*bus_ranges), GFP_KERNEL); + if (!bus_ranges) { + d_vpr_e("No memory to read bus ranges\n"); + return -ENOMEM; + } + + rc = of_property_read_u32_array(pdev->dev.of_node, + "qcom,bus-range-kbps", bus_ranges, + num_buses * 2); + if (rc) { + d_vpr_e( + "Failed to read bus ranges: defaulting to <0 INT_MAX>\n"); + for (c = 0; c < num_buses; c++) { + bus_ranges[c * 2] = 0; + bus_ranges[c * 2 + 1] = INT_MAX; + } + } + + buses->bus_tbl = devm_kzalloc(&pdev->dev, num_buses * + sizeof(*buses->bus_tbl), GFP_KERNEL); + if (!buses->bus_tbl) { + d_vpr_e("No memory for bus table\n"); + rc = -ENOMEM; + goto exit; + } + + for (c = 0; c < num_buses; c++) { + struct bus_info *bus = &dt->bus_set.bus_tbl[c]; + + of_property_read_string_index(pdev->dev.of_node, + "interconnect-names", c, &bus->name); + + bus->dev = &pdev->dev; + bus->range[0] = bus_ranges[c * 2]; + bus->range[1] = bus_ranges[c * 2 + 1]; + + d_vpr_h("Found bus %s\n", bus->name); + } + +exit: + kfree(bus_ranges); + return rc; +} + +/* TODO: move this to platform data */ +static int msm_vidc_load_buffer_usage_table(struct msm_vidc_core *core) +{ + int rc = 0; + struct platform_device *pdev = core->pdev; + struct msm_vidc_dt *dt = core->dt; + struct buffer_usage_set *buffer_usage_set = &dt->buffer_usage_set; + + if (!of_find_property(pdev->dev.of_node, + "qcom,buffer-type-tz-usage-table", NULL)) { + /* + * qcom,buffer-type-tz-usage-table is an optional property. It + * likely won't be present if the core doesn't support content + * protection + */ + d_vpr_h("buffer-type-tz-usage-table not found\n"); + return 0; + } + + buffer_usage_set->count = get_u32_array_num_elements( + pdev->dev.of_node, "qcom,buffer-type-tz-usage-table"); + buffer_usage_set->count /= + sizeof(*buffer_usage_set->buffer_usage_tbl) / sizeof(u32); + if (!buffer_usage_set->count) { + d_vpr_h("no elements in buffer usage set\n"); + return 0; + } + + buffer_usage_set->buffer_usage_tbl = devm_kzalloc(&pdev->dev, + buffer_usage_set->count * + sizeof(*buffer_usage_set->buffer_usage_tbl), + GFP_KERNEL); + if (!buffer_usage_set->buffer_usage_tbl) { + d_vpr_e("%s: Failed to alloc buffer usage table\n", + __func__); + rc = -ENOMEM; + goto err_load_buf_usage; + } + + rc = of_property_read_u32_array(pdev->dev.of_node, + "qcom,buffer-type-tz-usage-table", + (u32 *)buffer_usage_set->buffer_usage_tbl, + buffer_usage_set->count * + sizeof(*buffer_usage_set->buffer_usage_tbl) / sizeof(u32)); + if (rc) { + d_vpr_e("Failed to read buffer usage table\n"); + goto err_load_buf_usage; + } + + return 0; +err_load_buf_usage: + msm_vidc_free_buffer_usage_table(core->dt); + return rc; +} + +static int msm_vidc_load_regulator_table(struct msm_vidc_core *core) +{ + int rc = 0; + struct platform_device *pdev = core->pdev; + struct msm_vidc_dt *dt = core->dt; + struct regulator_set *regulators = &dt->regulator_set; + struct device_node *domains_parent_node = NULL; + struct property *domains_property = NULL; + int reg_count = 0; + + regulators->count = 0; + regulators->regulator_tbl = NULL; + + domains_parent_node = pdev->dev.of_node; + for_each_property_of_node(domains_parent_node, domains_property) { + const char *search_string = "-supply"; + char *supply; + bool matched = false; + + /* check if current property is possibly a regulator */ + supply = strnstr(domains_property->name, search_string, + strlen(domains_property->name) + 1); + matched = supply && (*(supply + strlen(search_string)) == '\0'); + if (!matched) + continue; + + reg_count++; + } + + regulators->regulator_tbl = devm_kzalloc(&pdev->dev, + sizeof(*regulators->regulator_tbl) * + reg_count, GFP_KERNEL); + + if (!regulators->regulator_tbl) { + rc = -ENOMEM; + d_vpr_e("Failed to alloc memory for regulator table\n"); + goto err_reg_tbl_alloc; + } + + for_each_property_of_node(domains_parent_node, domains_property) { + const char *search_string = "-supply"; + char *supply; + bool matched = false; + struct device_node *regulator_node = NULL; + struct regulator_info *rinfo = NULL; + + /* check if current property is possibly a regulator */ + supply = strnstr(domains_property->name, search_string, + strlen(domains_property->name) + 1); + matched = supply && (supply[strlen(search_string)] == '\0'); + if (!matched) + continue; + + /* make sure prop isn't being misused */ + regulator_node = of_parse_phandle(domains_parent_node, + domains_property->name, 0); + if (IS_ERR(regulator_node)) { + d_vpr_e("%s is not a phandle\n", + domains_property->name); + continue; + } + regulators->count++; + + /* populate regulator info */ + rinfo = ®ulators->regulator_tbl[regulators->count - 1]; + rinfo->name = devm_kzalloc(&pdev->dev, + (supply - domains_property->name) + 1, GFP_KERNEL); + if (!rinfo->name) { + rc = -ENOMEM; + d_vpr_e("Failed to alloc memory for regulator name\n"); + goto err_reg_name_alloc; + } + strlcpy(rinfo->name, domains_property->name, + (supply - domains_property->name) + 1); + + rinfo->has_hw_power_collapse = of_property_read_bool( + regulator_node, "qcom,support-hw-trigger"); + + d_vpr_h("Found regulator %s: h/w collapse = %s\n", + rinfo->name, + rinfo->has_hw_power_collapse ? "yes" : "no"); + } + + if (!regulators->count) + d_vpr_h("No regulators found"); + + return 0; + +err_reg_name_alloc: +err_reg_tbl_alloc: + msm_vidc_free_regulator_table(core->dt); + return rc; +} + +static int msm_vidc_load_clock_table(struct msm_vidc_core *core) +{ + int rc = 0, num_clocks = 0, c = 0; + struct platform_device *pdev = core->pdev; + struct msm_vidc_dt *dt = core->dt; + int *clock_props = NULL; + struct clock_set *clocks = &dt->clock_set; + + num_clocks = of_property_count_strings(pdev->dev.of_node, + "clock-names"); + if (num_clocks <= 0) { + d_vpr_h("No clocks found\n"); + clocks->count = 0; + rc = 0; + goto err_load_clk_table_fail; + } + + clock_props = devm_kzalloc(&pdev->dev, num_clocks * + sizeof(*clock_props), GFP_KERNEL); + if (!clock_props) { + d_vpr_e("No memory to read clock properties\n"); + rc = -ENOMEM; + goto err_load_clk_table_fail; + } + + rc = of_property_read_u32_array(pdev->dev.of_node, + "qcom,clock-configs", clock_props, + num_clocks); + if (rc) { + d_vpr_e("Failed to read clock properties: %d\n", rc); + goto err_load_clk_prop_fail; + } + + clocks->clock_tbl = devm_kzalloc(&pdev->dev, sizeof(*clocks->clock_tbl) + * num_clocks, GFP_KERNEL); + if (!clocks->clock_tbl) { + d_vpr_e("Failed to allocate memory for clock tbl\n"); + rc = -ENOMEM; + goto err_load_clk_prop_fail; + } + + clocks->count = num_clocks; + d_vpr_h("Found %d clocks\n", num_clocks); + + for (c = 0; c < num_clocks; ++c) { + struct clock_info *vc = &dt->clock_set.clock_tbl[c]; + + of_property_read_string_index(pdev->dev.of_node, + "clock-names", c, &vc->name); + + if (clock_props[c] & CLOCK_PROP_HAS_SCALING) { + vc->has_scaling = true; + } else { + vc->has_scaling = false; + } + + if (clock_props[c] & CLOCK_PROP_HAS_MEM_RETENTION) + vc->has_mem_retention = true; + else + vc->has_mem_retention = false; + + d_vpr_h("Found clock %s: scale-able = %s\n", vc->name, + vc->has_scaling ? "yes" : "no"); + } + + + return 0; + +err_load_clk_prop_fail: +err_load_clk_table_fail: + return rc; +} + +static int msm_vidc_load_reset_table(struct msm_vidc_core *core) +{ + struct platform_device *pdev = core->pdev; + struct msm_vidc_dt *dt = core->dt; + struct reset_set *rst = &dt->reset_set; + int num_clocks = 0, c = 0; + + num_clocks = of_property_count_strings(pdev->dev.of_node, + "reset-names"); + if (num_clocks <= 0) { + d_vpr_h("No reset clocks found\n"); + rst->count = 0; + return 0; + } + + rst->reset_tbl = devm_kcalloc(&pdev->dev, num_clocks, + sizeof(*rst->reset_tbl), GFP_KERNEL); + if (!rst->reset_tbl) + return -ENOMEM; + + rst->count = num_clocks; + d_vpr_h("Found %d reset clocks\n", num_clocks); + + for (c = 0; c < num_clocks; ++c) { + struct reset_info *rc = &dt->reset_set.reset_tbl[c]; + + of_property_read_string_index(pdev->dev.of_node, + "reset-names", c, &rc->name); + } + + return 0; +} + +static int msm_decide_dt_node(struct msm_vidc_core *core) +{ + int rc = 0; + struct platform_device *pdev = core->pdev; + u32 sku_index = 0; + + rc = of_property_read_u32(pdev->dev.of_node, "sku-index", + &sku_index); + if (rc) { + d_vpr_h("'sku_index' not found in node\n"); + return 0; + } + + return 0; +} + +static int msm_vidc_read_resources_from_dt(struct platform_device *pdev) +{ + int rc = 0; + struct msm_vidc_core *core; + struct msm_vidc_dt *dt; + struct resource *kres; + + if (!pdev) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + core = dev_get_drvdata(&pdev->dev); + if (!core || !core->dt) { + d_vpr_e("%s: core not found in device %s", + dev_name(&pdev->dev)); + return -EINVAL; + } + dt = core->dt; + + rc = msm_decide_dt_node(core); + if (rc) + return rc; + + INIT_LIST_HEAD(&dt->context_banks); + + kres = platform_get_resource(pdev, IORESOURCE_MEM, 0); + dt->register_base = kres ? kres->start : -1; + dt->register_size = kres ? (kres->end + 1 - kres->start) : -1; + + kres = platform_get_resource(pdev, IORESOURCE_IRQ, 0); + dt->irq = kres ? kres->start : -1; + + rc = msm_vidc_load_fw_name(core); + if (rc) + d_vpr_e("%s: failed to load fw name, rc %d, using default fw\n", + __func__, rc); + + rc = msm_vidc_load_subcache_info(core); + if (rc) + d_vpr_e("Failed to load subcache info: %d\n", rc); + + rc = msm_vidc_load_qdss_table(core); + if (rc) + d_vpr_e("Failed to load qdss reg table: %d\n", rc); + + rc = msm_vidc_load_reg_table(core); + if (rc) { + d_vpr_e("Failed to load reg table: %d\n", rc); + goto err_load_reg_table; + } + + // TODO: move this table to platform + rc = msm_vidc_load_buffer_usage_table(core); + if (rc) { + d_vpr_e("Failed to load buffer usage table: %d\n", rc); + goto err_load_buffer_usage_table; + } + + rc = msm_vidc_load_regulator_table(core); + if (rc) { + d_vpr_e("Failed to load list of regulators %d\n", rc); + goto err_load_regulator_table; + } + + rc = msm_vidc_load_bus_table(core); + if (rc) { + d_vpr_e("Failed to load bus table: %d\n", rc); + goto err_load_bus_table; + } + + rc = msm_vidc_load_clock_table(core); + if (rc) { + d_vpr_e("Failed to load clock table: %d\n", rc); + goto err_load_clock_table; + } + + // TODO: move this table to platform + rc = msm_vidc_load_allowed_clocks_table(core); + if (rc) { + d_vpr_e("Failed to load allowed clocks table: %d\n", rc); + goto err_load_allowed_clocks_table; + } + + rc = msm_vidc_load_reset_table(core); + if (rc) { + d_vpr_e("Failed to load reset table: %d\n", rc); + goto err_load_reset_table; + } + + return rc; + +err_load_reset_table: + msm_vidc_free_allowed_clocks_table(core->dt); +err_load_allowed_clocks_table: + msm_vidc_free_clock_table(core->dt); +err_load_clock_table: + msm_vidc_free_bus_table(core->dt); +err_load_bus_table: + msm_vidc_free_regulator_table(core->dt); +err_load_regulator_table: + msm_vidc_free_buffer_usage_table(core->dt); +err_load_buffer_usage_table: + msm_vidc_free_reg_table(core->dt); +err_load_reg_table: + return rc; +} + +static int msm_vidc_setup_context_bank(struct msm_vidc_core *core, + struct context_bank_info *cb, struct device *dev) +{ + int rc = 0; + struct bus_type *bus; + + if (!core || !dev || !cb) { + d_vpr_e("%s: Invalid Input params\n", __func__); + return -EINVAL; + } + cb->dev = dev; + + bus = cb->dev->bus; + if (IS_ERR_OR_NULL(bus)) { + d_vpr_e("%s: failed to get bus type\n", __func__); + rc = PTR_ERR(bus) ? PTR_ERR(bus) : -ENODEV; + goto remove_cb; + } + + cb->domain = iommu_get_domain_for_dev(cb->dev); + + /* + * configure device segment size and segment boundary to ensure + * iommu mapping returns one mapping (which is required for partial + * cache operations) + */ + if (!dev->dma_parms) + dev->dma_parms = + devm_kzalloc(dev, sizeof(*dev->dma_parms), GFP_KERNEL); + dma_set_max_seg_size(dev, (unsigned int)DMA_BIT_MASK(32)); + dma_set_seg_boundary(dev, (unsigned long)DMA_BIT_MASK(64)); + + d_vpr_h("Attached %s and created mapping\n", dev_name(dev)); + d_vpr_h( + "Context bank: %s, buffer_type: %#x, is_secure: %d, address range start: %#x, size: %#x, dev: %pK, domain: %pK", + cb->name, cb->buffer_type, cb->is_secure, cb->addr_range.start, + cb->addr_range.size, cb->dev, cb->domain); + +remove_cb: + return rc; +} + +static int msm_vidc_populate_context_bank(struct device *dev, + struct msm_vidc_core *core) +{ + int rc = 0; + struct context_bank_info *cb = NULL; + struct device_node *np = NULL; + + if (!dev || !core || !core->dt) { + d_vpr_e("%s: invalid inputs\n", __func__); + return -EINVAL; + } + + np = dev->of_node; + cb = devm_kzalloc(dev, sizeof(*cb), GFP_KERNEL); + if (!cb) { + d_vpr_e("%s: Failed to allocate cb\n", __func__); + return -ENOMEM; + } + + INIT_LIST_HEAD(&cb->list); + list_add_tail(&cb->list, &core->dt->context_banks); + + rc = of_property_read_string(np, "label", &cb->name); + if (rc) { + d_vpr_h("Failed to read cb label from device tree\n"); + rc = 0; + } + + d_vpr_h("%s: context bank has name %s\n", __func__, cb->name); + rc = of_property_read_u32_array(np, "virtual-addr-pool", + (u32 *)&cb->addr_range, 2); + if (rc) { + d_vpr_e("Could not read addr pool: context bank: %s %d\n", + cb->name, rc); + goto err_setup_cb; + } + + cb->is_secure = of_property_read_bool(np, "qcom,secure-context-bank"); + d_vpr_h("context bank %s: secure = %d\n", + cb->name, cb->is_secure); + + /* setup buffer type for each sub device*/ + rc = of_property_read_u32(np, "buffer-types", &cb->buffer_type); + if (rc) { + d_vpr_e("failed to load buffer_type info %d\n", rc); + rc = -ENOENT; + goto err_setup_cb; + } + d_vpr_h("context bank %s address start %x size %x buffer_type %x\n", + cb->name, cb->addr_range.start, + cb->addr_range.size, cb->buffer_type); + + rc = msm_vidc_setup_context_bank(core, cb, dev); + if (rc) { + d_vpr_e("Cannot setup context bank %d\n", rc); + goto err_setup_cb; + } + + iommu_set_fault_handler(cb->domain, + msm_vidc_smmu_fault_handler, (void *)core); + + return 0; + +err_setup_cb: + list_del(&cb->list); + return rc; +} + +int msm_vidc_read_context_bank_resources_from_dt(struct platform_device *pdev) +{ + struct msm_vidc_core *core; + int rc = 0; + + if (!pdev) { + d_vpr_e("Invalid platform device\n"); + return -EINVAL; + } else if (!pdev->dev.parent) { + d_vpr_e("Failed to find a parent for %s\n", + dev_name(&pdev->dev)); + return -ENODEV; + } + + core = dev_get_drvdata(pdev->dev.parent); + if (!core) { + d_vpr_e("Failed to find cookie in parent device %s", + dev_name(pdev->dev.parent)); + return -EINVAL; + } + + rc = msm_vidc_populate_context_bank(&pdev->dev, core); + if (rc) + d_vpr_e("Failed to probe context bank\n"); + else + d_vpr_h("Successfully probed context bank\n"); + + return rc; +} + +void msm_vidc_deinit_dt(struct platform_device *pdev) +{ + struct msm_vidc_core *core; + + if (!pdev) { + d_vpr_e("%s: invalid params\n", __func__); + return; + } + + core = dev_get_drvdata(&pdev->dev); + if (!core) { + d_vpr_e("%s: core not found in device %s", + dev_name(&pdev->dev)); + return; + } else if (!core->dt) { + d_vpr_e("%s: invalid dt in device %s", + dev_name(&pdev->dev)); + return; + } + + msm_vidc_free_clock_table(core->dt); + msm_vidc_free_regulator_table(core->dt); + msm_vidc_free_allowed_clocks_table(core->dt); + msm_vidc_free_reg_table(core->dt); + msm_vidc_free_qdss_addr_table(core->dt); + msm_vidc_free_bus_table(core->dt); + msm_vidc_free_buffer_usage_table(core->dt); +} + +int msm_vidc_init_dt(struct platform_device *pdev) +{ + int rc = 0; + struct msm_vidc_dt *dt; + struct msm_vidc_core *core; + + if (!pdev) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + core = dev_get_drvdata(&pdev->dev); + if (!core) { + d_vpr_e("%s: core not found in device %s", + dev_name(&pdev->dev)); + return -EINVAL; + } + + dt = kzalloc(sizeof(struct msm_vidc_dt), GFP_KERNEL); + if (!dt) + return -ENOMEM; + + core->dt = dt; + dt->core = core; + + rc = msm_vidc_read_resources_from_dt(pdev); + if (rc) + return rc; + + return 0; +} \ No newline at end of file diff --git a/driver/vidc/src/msm_vidc_memory.c b/driver/vidc/src/msm_vidc_memory.c new file mode 100644 index 0000000000..59f63f9fc0 --- /dev/null +++ b/driver/vidc/src/msm_vidc_memory.c @@ -0,0 +1,407 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2020, The Linux Foundation. All rights reserved. + */ + +#include +#include +#include + +#include "msm_vidc_memory.h" +#include "msm_vidc_debug.h" +#include "msm_vidc_internal.h" +#include "msm_vidc_dt.h" +#include "msm_vidc_core.h" + + +static int get_ion_secure_flag(enum msm_vidc_buffer_region region) +{ + u32 ion_flag = 0; + + switch (region) { + case MSM_VIDC_SECURE_PIXEL: + ion_flag = ION_FLAG_CP_PIXEL; + break; + case MSM_VIDC_SECURE_NONPIXEL: + ion_flag = ION_FLAG_CP_NON_PIXEL; + break; + case MSM_VIDC_SECURE_BITSTREAM: + ion_flag = ION_FLAG_CP_BITSTREAM; + break; + default: + d_vpr_e("invalid secure region : %#x\n", region); + } + + return ion_flag; +} + +struct context_bank_info *get_context_bank(struct msm_vidc_core *core, + enum msm_vidc_buffer_region region) +{ + char *name; + struct context_bank_info *cb = NULL, *match = NULL; + + switch (region) { + case MSM_VIDC_NON_SECURE: + name = "venus_ns"; + break; + case MSM_VIDC_SECURE_PIXEL: + name = "venus_sec_pixel"; + break; + case MSM_VIDC_SECURE_NONPIXEL: + name = "venus_sec_non_pixel"; + break; + case MSM_VIDC_SECURE_BITSTREAM: + name = "venus_sec_bitstream"; + break; + default: + d_vpr_e("invalid region : %#x\n", region); + return NULL; + } + + list_for_each_entry(cb, &core->dt->context_banks, list) { + if (!strcmp(cb->name, name)) { + match = cb; + break; + } + } + if (!match) + d_vpr_e("cb not found for region %#x\n", region); + + return match; +} + +struct dma_buf *msm_vidc_memory_get_dmabuf(int fd) +{ + struct dma_buf *dmabuf; + + dmabuf = dma_buf_get(fd); + if (IS_ERR_OR_NULL(dmabuf)) { + d_vpr_e("Failed to get dmabuf for %d, error %ld\n", + fd, PTR_ERR(dmabuf)); + dmabuf = NULL; + } + + return dmabuf; +} + +void msm_vidc_memory_put_dmabuf(void *dmabuf) +{ + if (!dmabuf) { + d_vpr_e("%s: NULL dmabuf\n", __func__); + return; + } + + dma_buf_put((struct dma_buf *)dmabuf); +} + +int msm_vidc_memory_map(struct msm_vidc_core *core, struct msm_vidc_map *map) +{ + int rc = 0; + struct dma_buf_attachment *attach = NULL; + struct sg_table *table = NULL; + struct context_bank_info *cb = NULL; + + if (!core || !map) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (map->refcount) { + map->refcount++; + return 0; + } + + cb = get_context_bank(core, map->region); + if (!cb) { + d_vpr_e("%s: Failed to get context bank device\n", + __func__); + rc = -EIO; + goto error_cb; + } + + /* Prepare a dma buf for dma on the given device */ + attach = dma_buf_attach(map->dmabuf, cb->dev); + if (IS_ERR_OR_NULL(attach)) { + rc = PTR_ERR(attach) ? PTR_ERR(attach) : -ENOMEM; + d_vpr_e("Failed to attach dmabuf\n"); + goto error_attach; + } + + /* + * Get the scatterlist for the given attachment + * Mapping of sg is taken care by map attachment + */ + attach->dma_map_attrs = DMA_ATTR_DELAYED_UNMAP; + /* + * We do not need dma_map function to perform cache operations + * on the whole buffer size and hence pass skip sync flag. + * We do the required cache operations separately for the + * required buffer size + */ + attach->dma_map_attrs |= DMA_ATTR_SKIP_CPU_SYNC; + if (core->dt->sys_cache_present) + attach->dma_map_attrs |= + DMA_ATTR_IOMMU_USE_UPSTREAM_HINT; + + table = dma_buf_map_attachment(attach, DMA_BIDIRECTIONAL); + if (IS_ERR_OR_NULL(table)) { + rc = PTR_ERR(table) ? PTR_ERR(table) : -ENOMEM; + d_vpr_e("Failed to map table\n"); + goto error_table; + } + if (!table->sgl) { + d_vpr_e("sgl is NULL\n"); + rc = -ENOMEM; + goto error_sg; + } + + map->device_addr = table->sgl->dma_address; + map->table = table; + map->attach = attach; + map->refcount++; + return 0; + +error_sg: + dma_buf_unmap_attachment(attach, table, DMA_BIDIRECTIONAL); +error_table: + dma_buf_detach(map->dmabuf, attach); +error_attach: +error_cb: + return rc; +} + +int msm_vidc_memory_unmap(struct msm_vidc_core *core, struct msm_vidc_map *map) +{ + int rc = 0; + + if (!core || !map) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (map->refcount) { + map->refcount--; + } else { + d_vpr_e("unmap called while refcount is zero already\n"); + return -EINVAL; + } + + if (map->refcount) + goto exit; + + dma_buf_unmap_attachment(map->attach, map->table, DMA_BIDIRECTIONAL); + dma_buf_detach(map->dmabuf, map->attach); + + map->device_addr = 0x0; + map->dmabuf = NULL; + map->attach = NULL; + map->table = NULL; + +exit: + return rc; +} + +int msm_vidc_memory_alloc(struct msm_vidc_core *core, struct msm_vidc_alloc *mem) +{ + int rc = 0; + int ion_flags = 0; + int ion_secure_flag = 0; + unsigned long heap_mask = 0; + int size = 0; + + if (!mem) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + size = ALIGN(mem->size, SZ_4K); + + if (mem->cached) + ion_flags |= ION_FLAG_CACHED; + + if (mem->secure) { + ion_secure_flag = get_ion_secure_flag(mem->region); + ion_flags |= ION_FLAG_SECURE | ion_secure_flag; + heap_mask = ION_HEAP(ION_SECURE_HEAP_ID); + } else { + heap_mask = ION_HEAP(ION_SYSTEM_HEAP_ID); + } + + mem->dmabuf = ion_alloc(size, heap_mask, ion_flags); + if (IS_ERR_OR_NULL(mem->dmabuf)) { + d_vpr_e("%s: ion alloc failed\n", __func__); + mem->dmabuf = NULL; + rc = -ENOMEM; + goto error; + } + + if (mem->map_kernel) { + dma_buf_begin_cpu_access(mem->dmabuf, DMA_BIDIRECTIONAL); + mem->kvaddr = dma_buf_vmap(mem->dmabuf); + if (!mem->kvaddr) { + d_vpr_e("%s: kernel map failed\n", __func__); + rc = -EIO; + goto error; + } + } + + d_vpr_h( + "%s: dmabuf = %pK, size = %d, kvaddr = %pK, buffer_type = %#x\n", + __func__, mem->dmabuf, mem->size, + mem->kvaddr, mem->buffer_type); + return 0; + +error: + msm_vidc_memory_free(core, mem); + return rc; +} + +int msm_vidc_memory_free(struct msm_vidc_core *core, struct msm_vidc_alloc *mem) +{ + int rc = 0; + + if (!mem || !mem->dmabuf) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + d_vpr_h( + "%s: dmabuf = %pK, size = %d, kvaddr = %pK, buffer_type = %#x\n", + __func__, mem->dmabuf, mem->size, + mem->kvaddr, mem->buffer_type); + + if (mem->kvaddr) { + dma_buf_vunmap(mem->dmabuf, mem->kvaddr); + mem->kvaddr = NULL; + dma_buf_end_cpu_access(mem->dmabuf, DMA_BIDIRECTIONAL); + } + + if (mem->dmabuf) { + dma_buf_put(mem->dmabuf); + mem->dmabuf = NULL; + } + + return rc; +}; +/* +int msm_memory_cache_operations(struct dma_buf *dbuf, + enum smem_cache_ops cache_op, unsigned long offset, + unsigned long size, u32 sid) +{ + int rc = 0; + unsigned long flags = 0; + + if (!dbuf) { + s_vpr_e(sid, "%s: invalid params\n", __func__); + return -EINVAL; + } + + rc = dma_buf_get_flags(dbuf, &flags); + if (rc) { + s_vpr_e(sid, "%s: dma_buf_get_flags failed, err %d\n", + __func__, rc); + return rc; + } else if (!(flags & ION_FLAG_CACHED)) { + return rc; + } + + switch (cache_op) { + case SMEM_CACHE_CLEAN: + case SMEM_CACHE_CLEAN_INVALIDATE: + rc = dma_buf_begin_cpu_access_partial(dbuf, DMA_TO_DEVICE, + offset, size); + if (rc) + break; + rc = dma_buf_end_cpu_access_partial(dbuf, DMA_TO_DEVICE, + offset, size); + break; + case SMEM_CACHE_INVALIDATE: + rc = dma_buf_begin_cpu_access_partial(dbuf, DMA_TO_DEVICE, + offset, size); + if (rc) + break; + rc = dma_buf_end_cpu_access_partial(dbuf, DMA_FROM_DEVICE, + offset, size); + break; + default: + s_vpr_e(sid, "%s: cache (%d) operation not supported\n", + __func__, cache_op); + rc = -EINVAL; + break; + } + + return rc; +} + +int msm_smem_memory_prefetch(struct msm_vidc_inst *inst) +{ + int i, rc = 0; + struct memory_regions *vidc_regions = NULL; + struct ion_prefetch_region ion_region[MEMORY_REGIONS_MAX]; + + if (!inst) { + d_vpr_e("%s: invalid parameters\n", __func__); + return -EINVAL; + } + + vidc_regions = &inst->regions; + if (vidc_regions->num_regions > MEMORY_REGIONS_MAX) { + s_vpr_e(inst->sid, "%s: invalid num_regions %d, max %d\n", + __func__, vidc_regions->num_regions, + MEMORY_REGIONS_MAX); + return -EINVAL; + } + + memset(ion_region, 0, sizeof(ion_region)); + for (i = 0; i < vidc_regions->num_regions; i++) { + ion_region[i].size = vidc_regions->region[i].size; + ion_region[i].vmid = vidc_regions->region[i].vmid; + } + + rc = msm_ion_heap_prefetch(ION_SECURE_HEAP_ID, ion_region, + vidc_regions->num_regions); + if (rc) + s_vpr_e(inst->sid, "%s: prefetch failed, ret: %d\n", + __func__, rc); + else + s_vpr_l(inst->sid, "%s: prefetch succeeded\n", __func__); + + return rc; +} + +int msm_smem_memory_drain(struct msm_vidc_inst *inst) +{ + int i, rc = 0; + struct memory_regions *vidc_regions = NULL; + struct ion_prefetch_region ion_region[MEMORY_REGIONS_MAX]; + + if (!inst) { + d_vpr_e("%s: invalid parameters\n", __func__); + return -EINVAL; + } + + vidc_regions = &inst->regions; + if (vidc_regions->num_regions > MEMORY_REGIONS_MAX) { + s_vpr_e(inst->sid, "%s: invalid num_regions %d, max %d\n", + __func__, vidc_regions->num_regions, + MEMORY_REGIONS_MAX); + return -EINVAL; + } + + memset(ion_region, 0, sizeof(ion_region)); + for (i = 0; i < vidc_regions->num_regions; i++) { + ion_region[i].size = vidc_regions->region[i].size; + ion_region[i].vmid = vidc_regions->region[i].vmid; + } + + rc = msm_ion_heap_drain(ION_SECURE_HEAP_ID, ion_region, + vidc_regions->num_regions); + if (rc) + s_vpr_e(inst->sid, "%s: drain failed, ret: %d\n", __func__, rc); + else + s_vpr_l(inst->sid, "%s: drain succeeded\n", __func__); + + return rc; +} +*/ diff --git a/driver/vidc/src/msm_vidc_platform.c b/driver/vidc/src/msm_vidc_platform.c new file mode 100644 index 0000000000..56d20be98c --- /dev/null +++ b/driver/vidc/src/msm_vidc_platform.c @@ -0,0 +1,133 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2020, The Linux Foundation. All rights reserved. + */ + +#include + +#include "msm_vidc_waipio.h" + +#include "msm_vidc_platform.h" +#include "msm_vidc_iris2.h" +#include "msm_vidc_debug.h" +#include "msm_vidc_v4l2.h" +#include "msm_vidc_vb2.h" + + +static struct v4l2_file_operations msm_v4l2_file_operations = { + .owner = THIS_MODULE, + .open = msm_v4l2_open, + .release = msm_v4l2_close, + .unlocked_ioctl = video_ioctl2, + .poll = msm_v4l2_poll, +}; + +static struct v4l2_ioctl_ops msm_v4l2_ioctl_ops = { + .vidioc_querycap = msm_v4l2_querycap, + .vidioc_enum_fmt_vid_cap = msm_v4l2_enum_fmt, + .vidioc_enum_fmt_vid_out = msm_v4l2_enum_fmt, + .vidioc_enum_framesizes = msm_v4l2_enum_framesizes, + .vidioc_s_fmt_vid_cap_mplane = msm_v4l2_s_fmt, + .vidioc_s_fmt_vid_out_mplane = msm_v4l2_s_fmt, + .vidioc_g_fmt_vid_cap_mplane = msm_v4l2_g_fmt, + .vidioc_g_fmt_vid_out_mplane = msm_v4l2_g_fmt, + .vidioc_reqbufs = msm_v4l2_reqbufs, + .vidioc_qbuf = msm_v4l2_qbuf, + .vidioc_dqbuf = msm_v4l2_dqbuf, + .vidioc_streamon = msm_v4l2_streamon, + .vidioc_streamoff = msm_v4l2_streamoff, + .vidioc_s_ctrl = msm_v4l2_s_ctrl, + .vidioc_g_ctrl = msm_v4l2_g_ctrl, + .vidioc_queryctrl = msm_v4l2_queryctrl, + .vidioc_querymenu = msm_v4l2_querymenu, + .vidioc_subscribe_event = msm_v4l2_subscribe_event, + .vidioc_unsubscribe_event = msm_v4l2_unsubscribe_event, + .vidioc_decoder_cmd = msm_v4l2_decoder_cmd, + .vidioc_encoder_cmd = msm_v4l2_encoder_cmd, +}; + +static struct v4l2_ctrl_ops msm_v4l2_ctrl_ops = { + //.s_ctrl = msm_vidc_s_ctrl, +}; + +static struct vb2_ops msm_vb2_ops = { + .queue_setup = msm_vidc_queue_setup, + .start_streaming = msm_vidc_start_streaming, + .buf_queue = msm_vidc_buf_queue, + .buf_cleanup = msm_vidc_buf_cleanup, + .stop_streaming = msm_vidc_stop_streaming, +}; + +static struct vb2_mem_ops msm_vb2_mem_ops = { + .get_userptr = msm_vb2_get_userptr, + .put_userptr = msm_vb2_put_userptr, +}; + +static int msm_vidc_init_ops(struct msm_vidc_core *core) +{ + if (!core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + d_vpr_h("%s: initialize ops\n", __func__); + core->v4l2_file_ops = &msm_v4l2_file_operations; + core->v4l2_ioctl_ops = &msm_v4l2_ioctl_ops; + core->v4l2_ctrl_ops = &msm_v4l2_ctrl_ops; + core->vb2_ops = &msm_vb2_ops; + core->vb2_mem_ops = &msm_vb2_mem_ops; + + return 0; +} + +int msm_vidc_init_platform(struct platform_device *pdev) +{ + int rc = 0; + struct msm_vidc_platform *platform; + struct msm_vidc_core *core; + + if (!pdev) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + d_vpr_h("%s()\n", __func__); + + core = dev_get_drvdata(&pdev->dev); + if (!core) { + d_vpr_e("%s: core not found in device %s", + dev_name(&pdev->dev)); + return -EINVAL; + } + + platform = kzalloc(sizeof(struct msm_vidc_platform), GFP_KERNEL); + if (!platform) + return -ENOMEM; + + core->platform = platform; + platform->core = core; + + /* selected ops can be re-assigned in platform specific file */ + rc = msm_vidc_init_ops(core); + if (rc) + return rc; + + if (of_device_is_compatible(pdev->dev.of_node, "qcom,msm-vidc")) { // "qcom,msm-vidc-waipio" + rc = msm_vidc_init_platform_waipio(core); + if (rc) + return rc; + } + + if (of_device_is_compatible(pdev->dev.of_node, "qcom,msm-vidc")) { // "qcom,msm-vidc-iris2" + rc = msm_vidc_init_iris2(core); + if (rc) + return rc; + } + + return rc; +} + +int msm_vidc_deinit_platform(struct platform_device *pdev) +{ + return 0; +} diff --git a/driver/vidc/src/msm_vidc_probe.c b/driver/vidc/src/msm_vidc_probe.c new file mode 100644 index 0000000000..f55a82010d --- /dev/null +++ b/driver/vidc/src/msm_vidc_probe.c @@ -0,0 +1,367 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2020, The Linux Foundation. All rights reserved. + */ + +#include +#include +#include +#include +#include +#include +#include + +#include "msm_vidc_internal.h" +#include "msm_vidc_debug.h" +#include "msm_vidc_driver.h" +#include "msm_vidc_dt.h" +#include "msm_vidc_platform.h" +#include "msm_vidc_core.h" +#include "venus_hfi.h" + +#define BASE_DEVICE_NUMBER 32 + +static irqreturn_t msm_vidc_isr(int irq, void *data) +{ + struct msm_vidc_core *core = data; + + d_vpr_e("%s()\n", __func__); + + disable_irq_nosync(irq); + queue_work(core->device_workq, &core->device_work); + + return IRQ_HANDLED; +} + +static int msm_vidc_init_irq(struct msm_vidc_core *core) +{ + int rc = 0; + struct msm_vidc_dt *dt; + + d_vpr_e("%s()\n", __func__); + + if (!core || !core->pdev || !core->dt) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + dt = core->dt; + + core->register_base_addr = devm_ioremap_nocache(&core->pdev->dev, + dt->register_base, dt->register_size); + if (!core->register_base_addr) { + d_vpr_e("could not map reg addr %pa of size %d\n", + &dt->register_base, dt->register_size); + goto exit; + } + + rc = request_irq(dt->irq, msm_vidc_isr, IRQF_TRIGGER_HIGH, + "msm_vidc", core); + if (unlikely(rc)) { + d_vpr_e("%s: request_irq failed\n", __func__); + goto exit; + } + disable_irq_nosync(dt->irq); + + d_vpr_h("%s: reg_base = %pa, reg_size = %d\n", + __func__, &dt->register_base, dt->register_size); + + return 0; + +exit: + if (core->device_workq) + destroy_workqueue(core->device_workq); + + return rc; +} + +static struct attribute *msm_vidc_core_attrs[] = { + NULL +}; + +static struct attribute_group msm_vidc_core_attr_group = { + .attrs = msm_vidc_core_attrs, +}; + +static const struct of_device_id msm_vidc_dt_match[] = { + {.compatible = "qcom,msm-vidc"}, + {.compatible = "qcom,msm-vidc,context-bank"}, + {} +}; +MODULE_DEVICE_TABLE(of, msm_vidc_dt_match); + + +void msm_vidc_release_video_device(struct video_device *vdev) +{ + d_vpr_e("%s:\n", __func__); +} + +static int msm_vidc_register_video_device(struct msm_vidc_core *core, + enum msm_vidc_domain_type type, int nr) +{ + int rc = 0; + int index; + + d_vpr_h("%s()\n", __func__); + + if (type == MSM_VIDC_DECODER) + index = 0; + else if (type == MSM_VIDC_ENCODER) + index = 1; + else + return -EINVAL; + + core->vdev[index].vdev.release = + msm_vidc_release_video_device; + core->vdev[index].vdev.fops = core->v4l2_file_ops; + core->vdev[index].vdev.ioctl_ops = core->v4l2_ioctl_ops; + core->vdev[index].vdev.vfl_dir = VFL_DIR_M2M; + core->vdev[index].type = type; + core->vdev[index].vdev.v4l2_dev = &core->v4l2_dev; + core->vdev[index].vdev.device_caps = + V4L2_CAP_VIDEO_CAPTURE_MPLANE | V4L2_CAP_VIDEO_OUTPUT_MPLANE | + V4L2_CAP_STREAMING; + rc = video_register_device(&core->vdev[index].vdev, + VFL_TYPE_GRABBER, nr); + if (rc) { + d_vpr_e("Failed to register the video device\n"); + return rc; + } + video_set_drvdata(&core->vdev[index].vdev, core); + //rc = device_create_file(&core->vdev[index].vdev.dev, &dev_attr_link_name); + if (rc) { + d_vpr_e("Failed to create video device file\n"); + video_unregister_device(&core->vdev[index].vdev); + return rc; + } + + return 0; +} + +static int msm_vidc_initialize_core(struct msm_vidc_core *core) +{ + int rc = 0; + + if (!core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + d_vpr_h("%s()\n", __func__); + + core->state = MSM_VIDC_CORE_DEINIT; + + core->device_workq = create_singlethread_workqueue("device_workq"); + if (!core->device_workq) { + d_vpr_e("%s: create device workq failed\n", __func__); + rc = -EINVAL; + goto exit; + } + + core->pm_workq = create_singlethread_workqueue("pm_workq"); + if (!core->pm_workq) { + d_vpr_e("%s: create pm workq failed\n", __func__); + destroy_workqueue(core->device_workq); + rc = -EINVAL; + goto exit; + } + + mutex_init(&core->lock); + INIT_LIST_HEAD(&core->instances); + INIT_LIST_HEAD(&core->dangling_instances); + + INIT_WORK(&core->device_work, venus_hfi_work_handler); + INIT_DELAYED_WORK(&core->pm_work, venus_hfi_pm_work_handler); + INIT_DELAYED_WORK(&core->fw_unload_work, msm_vidc_fw_unload_handler); + INIT_DELAYED_WORK(&core->batch_work, msm_vidc_batch_handler); + INIT_WORK(&core->ssr_work, msm_vidc_ssr_handler); + +exit: + return rc; +} + +static int msm_vidc_probe_video_device(struct platform_device *pdev) +{ + int rc = 0; + struct msm_vidc_core *core; + int nr = BASE_DEVICE_NUMBER; + + d_vpr_h("%s()\n", __func__); + + core = kzalloc(sizeof(*core), GFP_KERNEL); + if (!core) + return -ENOMEM; + + core->pdev = pdev; + dev_set_drvdata(&pdev->dev, core); + + rc = msm_vidc_initialize_core(core); + if (rc) { + d_vpr_e("%s: init core failed with %d\n", __func__, rc); + goto exit; + } + + rc = msm_vidc_init_dt(pdev); + if (rc) { + d_vpr_e("%s: init dt failed with %d\n", __func__, rc); + return -EINVAL; + } + + rc = msm_vidc_init_platform(pdev); + if (rc) { + d_vpr_e("%s: init platform failed with %d\n", __func__, rc); + return -EINVAL; + } + + rc = msm_vidc_init_irq(core); + if (rc) + return rc; + + rc = sysfs_create_group(&pdev->dev.kobj, &msm_vidc_core_attr_group); + if (rc) { + d_vpr_e("Failed to create attributes\n"); + goto exit; + } + + rc = v4l2_device_register(&pdev->dev, &core->v4l2_dev); + if (rc) { + d_vpr_e("Failed to register v4l2 device\n"); + goto exit; + } + + /* setup the decoder device */ + rc = msm_vidc_register_video_device(core, MSM_VIDC_DECODER, nr); + if (rc) { + d_vpr_e("Failed to register video decoder\n"); + goto exit; + } + + /* setup the encoder device */ + rc = msm_vidc_register_video_device(core, MSM_VIDC_ENCODER, nr + 1); + if (rc) { + d_vpr_e("Failed to register video encoder\n"); + goto exit; + } + + //rc = msm_vidc_debugfs_init_core(core); + + d_vpr_h("populating sub devices\n"); + /* + * Trigger probe for each sub-device i.e. qcom,msm-vidc,context-bank. + * When msm_vidc_probe is called for each sub-device, parse the + * context-bank details and store it in core->resources.context_banks + * list. + */ + rc = of_platform_populate(pdev->dev.of_node, msm_vidc_dt_match, NULL, + &pdev->dev); + if (rc) { + d_vpr_e("Failed to trigger probe for sub-devices\n"); + goto exit; + } + +exit: + return rc; +} + +static int msm_vidc_probe_context_bank(struct platform_device *pdev) +{ + d_vpr_h("%s()\n", __func__); + + return msm_vidc_read_context_bank_resources_from_dt(pdev); +} + +static int msm_vidc_probe(struct platform_device *pdev) +{ + d_vpr_h("%s()\n", __func__); + + /* + * Sub devices probe will be triggered by of_platform_populate() towards + * the end of the probe function after msm-vidc device probe is + * completed. Return immediately after completing sub-device probe. + */ + if (of_device_is_compatible(pdev->dev.of_node, "qcom,msm-vidc")) { + return msm_vidc_probe_video_device(pdev); + } else if (of_device_is_compatible(pdev->dev.of_node, + "qcom,msm-vidc,context-bank")) { + return msm_vidc_probe_context_bank(pdev); + } + + /* How did we end up here? */ + MSM_VIDC_ERROR(1); + return -EINVAL; +} + +static int msm_vidc_remove(struct platform_device *pdev) +{ + int rc = 0; + + d_vpr_h("%s()\n", __func__); + +/* + struct msm_vidc_core *core; + + if (!pdev) { + d_vpr_e("%s: invalid input %pK", __func__, pdev); + return -EINVAL; + } + + core = dev_get_drvdata(&pdev->dev); + if (!core) { + d_vpr_e("%s: invalid core", __func__); + return -EINVAL; + } + + if (core->vidc_core_workq) + destroy_workqueue(core->vidc_core_workq); + vidc_hfi_deinitialize(core->hfi_type, core->device); + device_remove_file(&core->vdev[MSM_VIDC_ENCODER].vdev.dev, + &dev_attr_link_name); + video_unregister_device(&core->vdev[MSM_VIDC_ENCODER].vdev); + device_remove_file(&core->vdev[MSM_VIDC_DECODER].vdev.dev, + &dev_attr_link_name); + video_unregister_device(&core->vdev[MSM_VIDC_DECODER].vdev); + v4l2_device_unregister(&core->v4l2_dev); + + //msm_vidc_free_platform_resources(&core->resources); + sysfs_remove_group(&pdev->dev.kobj, &msm_vidc_core_attr_group); + dev_set_drvdata(&pdev->dev, NULL); + mutex_destroy(&core->lock); + kfree(core); +*/ + return rc; +} + +static struct platform_driver msm_vidc_driver = { + .probe = msm_vidc_probe, + .remove = msm_vidc_remove, + .driver = { + .name = "msm_vidc_v4l2", + .of_match_table = msm_vidc_dt_match, + }, +}; + +static int __init msm_vidc_init(void) +{ + int rc = 0; + + d_vpr_h("%s()\n", __func__); + + rc = platform_driver_register(&msm_vidc_driver); + if (rc) { + d_vpr_e("Failed to register platform driver\n"); + return rc; + } + + return 0; +} + +static void __exit msm_vidc_exit(void) +{ + d_vpr_h("%s()\n", __func__); + + platform_driver_unregister(&msm_vidc_driver); +} + +module_init(msm_vidc_init); +module_exit(msm_vidc_exit); + +MODULE_SOFTDEP("pre: subsys-pil-tz"); +MODULE_LICENSE("GPL v2"); diff --git a/driver/vidc/src/msm_vidc_v4l2.c b/driver/vidc/src/msm_vidc_v4l2.c new file mode 100644 index 0000000000..e40738f78d --- /dev/null +++ b/driver/vidc/src/msm_vidc_v4l2.c @@ -0,0 +1,200 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2020, The Linux Foundation. All rights reserved. + */ + +#include "msm_vidc_v4l2.h" +#include "msm_vidc_internal.h" +#include "msm_vidc_core.h" +#include "msm_vidc_inst.h" +#include "msm_vidc_debug.h" +#include "msm_vidc.h" + +static struct msm_vidc_inst *get_vidc_inst(struct file *filp, void *fh) +{ + if (!filp->private_data) + return NULL; + return container_of(filp->private_data, + struct msm_vidc_inst, event_handler); +} + +unsigned int msm_v4l2_poll(struct file *filp, struct poll_table_struct *pt) +{ + struct msm_vidc_inst *vidc_inst = get_vidc_inst(filp, NULL); + + return msm_vidc_poll((void *)vidc_inst, filp, pt); +} + +int msm_v4l2_open(struct file *filp) +{ + struct video_device *vdev = video_devdata(filp); + struct msm_video_device *vid_dev = + container_of(vdev, struct msm_video_device, vdev); + struct msm_vidc_core *core = video_drvdata(filp); + struct msm_vidc_inst *vidc_inst; + + vidc_inst = msm_vidc_open(core, vid_dev->type); + if (!vidc_inst) { + d_vpr_e("Failed to create instance, type = %d\n", + vid_dev->type); + return -ENOMEM; + } + clear_bit(V4L2_FL_USES_V4L2_FH, &vdev->flags); + filp->private_data = &(vidc_inst->event_handler); + return 0; +} + +int msm_v4l2_close(struct file *filp) +{ + int rc = 0; + struct msm_vidc_inst *vidc_inst; + + vidc_inst = get_vidc_inst(filp, NULL); + + rc = msm_vidc_close(vidc_inst); + filp->private_data = NULL; + return rc; +} + +int msm_v4l2_querycap(struct file *filp, void *fh, + struct v4l2_capability *cap) +{ + struct msm_vidc_inst *vidc_inst = get_vidc_inst(filp, fh); + + return msm_vidc_querycap((void *)vidc_inst, cap); +} + +int msm_v4l2_enum_fmt(struct file *file, void *fh, + struct v4l2_fmtdesc *f) +{ + struct msm_vidc_inst *vidc_inst = get_vidc_inst(file, fh); + + return msm_vidc_enum_fmt((void *)vidc_inst, f); +} + +int msm_v4l2_s_fmt(struct file *file, void *fh, + struct v4l2_format *f) +{ + struct msm_vidc_inst *vidc_inst = get_vidc_inst(file, fh); + + return msm_vidc_s_fmt((void *)vidc_inst, f); +} + +int msm_v4l2_g_fmt(struct file *file, void *fh, + struct v4l2_format *f) +{ + struct msm_vidc_inst *vidc_inst = get_vidc_inst(file, fh); + + return msm_vidc_g_fmt((void *)vidc_inst, f); +} + +int msm_v4l2_s_ctrl(struct file *file, void *fh, + struct v4l2_control *a) +{ + struct msm_vidc_inst *vidc_inst = get_vidc_inst(file, fh); + + return msm_vidc_s_ctrl((void *)vidc_inst, a); +} + +int msm_v4l2_g_ctrl(struct file *file, void *fh, + struct v4l2_control *a) +{ + struct msm_vidc_inst *vidc_inst = get_vidc_inst(file, fh); + + return msm_vidc_g_ctrl((void *)vidc_inst, a); +} + +int msm_v4l2_reqbufs(struct file *file, void *fh, + struct v4l2_requestbuffers *b) +{ + struct msm_vidc_inst *vidc_inst = get_vidc_inst(file, fh); + + return msm_vidc_reqbufs((void *)vidc_inst, b); +} + +int msm_v4l2_qbuf(struct file *file, void *fh, + struct v4l2_buffer *b) +{ + struct video_device *vdev = video_devdata(file); + return msm_vidc_qbuf(get_vidc_inst(file, fh), vdev->v4l2_dev->mdev, b); +} + +int msm_v4l2_dqbuf(struct file *file, void *fh, + struct v4l2_buffer *b) +{ + return msm_vidc_dqbuf(get_vidc_inst(file, fh), b); +} + +int msm_v4l2_streamon(struct file *file, void *fh, + enum v4l2_buf_type i) +{ + struct msm_vidc_inst *vidc_inst = get_vidc_inst(file, fh); + + return msm_vidc_streamon((void *)vidc_inst, i); +} + +int msm_v4l2_streamoff(struct file *file, void *fh, + enum v4l2_buf_type i) +{ + struct msm_vidc_inst *vidc_inst = get_vidc_inst(file, fh); + + return msm_vidc_streamoff((void *)vidc_inst, i); +} + +int msm_v4l2_subscribe_event(struct v4l2_fh *fh, + const struct v4l2_event_subscription *sub) +{ + struct msm_vidc_inst *vidc_inst = container_of(fh, + struct msm_vidc_inst, event_handler); + + return msm_vidc_subscribe_event((void *)vidc_inst, sub); +} + +int msm_v4l2_unsubscribe_event(struct v4l2_fh *fh, + const struct v4l2_event_subscription *sub) +{ + struct msm_vidc_inst *vidc_inst = container_of(fh, + struct msm_vidc_inst, event_handler); + + return msm_vidc_unsubscribe_event((void *)vidc_inst, sub); +} + +int msm_v4l2_decoder_cmd(struct file *file, void *fh, + struct v4l2_decoder_cmd *dec) +{ + struct msm_vidc_inst *vidc_inst = get_vidc_inst(file, fh); + + return msm_vidc_cmd((void *)vidc_inst, (union msm_v4l2_cmd *)dec); +} + +int msm_v4l2_encoder_cmd(struct file *file, void *fh, + struct v4l2_encoder_cmd *enc) +{ + struct msm_vidc_inst *vidc_inst = get_vidc_inst(file, fh); + + return msm_vidc_cmd((void *)vidc_inst, (union msm_v4l2_cmd *)enc); +} + +int msm_v4l2_enum_framesizes(struct file *file, void *fh, + struct v4l2_frmsizeenum *fsize) +{ + struct msm_vidc_inst *vidc_inst = get_vidc_inst(file, fh); + + return msm_vidc_enum_framesizes((void *)vidc_inst, fsize); +} + +int msm_v4l2_queryctrl(struct file *file, void *fh, + struct v4l2_queryctrl *ctrl) +{ + struct msm_vidc_inst *vidc_inst = get_vidc_inst(file, fh); + + return msm_vidc_query_ctrl((void *)vidc_inst, ctrl); +} + +int msm_v4l2_querymenu(struct file *file, void *fh, + struct v4l2_querymenu *qmenu) +{ + struct msm_vidc_inst *vidc_inst = get_vidc_inst(file, fh); + + return msm_vidc_query_menu((void *)vidc_inst, qmenu); +} diff --git a/driver/vidc/src/msm_vidc_vb2.c b/driver/vidc/src/msm_vidc_vb2.c new file mode 100644 index 0000000000..deb535abc1 --- /dev/null +++ b/driver/vidc/src/msm_vidc_vb2.c @@ -0,0 +1,44 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2020, The Linux Foundation. All rights reserved. + */ + +#include "msm_vidc_vb2.h" +#include "msm_vidc_core.h" +#include "msm_vidc_inst.h" +#include "msm_vidc_internal.h" +#include "msm_vidc_debug.h" + +void *msm_vb2_get_userptr(struct device *dev, unsigned long vaddr, + unsigned long size, enum dma_data_direction dma_dir) +{ + return (void *)0xdeadbeef; +} + +void msm_vb2_put_userptr(void *buf_priv) +{ +} + +int msm_vidc_queue_setup(struct vb2_queue *q, + unsigned int *num_buffers, unsigned int *num_planes, + unsigned int sizes[], struct device *alloc_devs[]) +{ + return 0; +} + +int msm_vidc_start_streaming(struct vb2_queue *q, unsigned int count) +{ + return 0; +} + +void msm_vidc_stop_streaming(struct vb2_queue *q) +{ +} + +void msm_vidc_buf_queue(struct vb2_buffer *vb2) +{ +} + +void msm_vidc_buf_cleanup(struct vb2_buffer *vb) +{ +} \ No newline at end of file diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c new file mode 100644 index 0000000000..a809025fe1 --- /dev/null +++ b/driver/vidc/src/venus_hfi.c @@ -0,0 +1,2351 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2020, The Linux Foundation. All rights reserved. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "venus_hfi.h" +#include "msm_vidc_core.h" +#include "msm_vidc_bus.h" +#include "msm_vidc_dt.h" +#include "msm_vidc_platform.h" +#include "msm_vidc_memory.h" +#include "msm_vidc_debug.h" +#include "hfi_packet.h" + +static int __resume(struct msm_vidc_core *core); +static int __suspend(struct msm_vidc_core *core); + +struct tzbsp_memprot { + u32 cp_start; + u32 cp_size; + u32 cp_nonpixel_start; + u32 cp_nonpixel_size; +}; + +enum tzbsp_video_state { + TZBSP_VIDEO_STATE_SUSPEND = 0, + TZBSP_VIDEO_STATE_RESUME = 1, + TZBSP_VIDEO_STATE_RESTORE_THRESHOLD = 2, +}; + +enum reset_state { + INIT = 1, + ASSERT, + DEASSERT, +}; + +/* Less than 50MBps is treated as trivial BW change */ +#define TRIVIAL_BW_THRESHOLD 50000 +#define TRIVIAL_BW_CHANGE(a, b) \ + ((a) > (b) ? (a) - (b) < TRIVIAL_BW_THRESHOLD : \ + (b) - (a) < TRIVIAL_BW_THRESHOLD) + +/** + * Utility function to enforce some of our assumptions. Spam calls to this + * in hotspots in code to double check some of the assumptions that we hold. + */ +struct lut const *__lut(int width, int height, int fps) +{ + int frame_size = height * width, c = 0; + + do { + if (LUT[c].frame_size >= frame_size && LUT[c].frame_rate >= fps) + return &LUT[c]; + } while (++c < ARRAY_SIZE(LUT)); + + return &LUT[ARRAY_SIZE(LUT) - 1]; +} + +fp_t __compression_ratio(struct lut const *entry, int bpp) +{ + int c = 0; + + for (c = 0; c < COMPRESSION_RATIO_MAX; ++c) { + if (entry->compression_ratio[c].bpp == bpp) + return entry->compression_ratio[c].ratio; + } + + WARN(true, "Shouldn't be here, LUT possibly corrupted?\n"); + return FP_ZERO; /* impossible */ +} + + +void __dump(struct dump dump[], int len) +{ + int c = 0; + + for (c = 0; c < len; ++c) { + char format_line[128] = "", formatted_line[128] = ""; + + if (dump[c].val == DUMP_HEADER_MAGIC) { + snprintf(formatted_line, sizeof(formatted_line), "%s\n", + dump[c].key); + } else { + bool fp_format = !strcmp(dump[c].format, DUMP_FP_FMT); + + if (!fp_format) { + snprintf(format_line, sizeof(format_line), + " %-35s: %s\n", dump[c].key, + dump[c].format); + snprintf(formatted_line, sizeof(formatted_line), + format_line, dump[c].val); + } else { + size_t integer_part, fractional_part; + + integer_part = fp_int(dump[c].val); + fractional_part = fp_frac(dump[c].val); + snprintf(formatted_line, sizeof(formatted_line), + " %-35s: %zd + %zd/%zd\n", + dump[c].key, integer_part, + fractional_part, + fp_frac_base()); + + + } + } + d_vpr_b("%s", formatted_line); + } +} + +static void __dump_packet(u8 *packet) +{ + u32 c = 0, packet_size = *(u32 *)packet; + const int row_size = 32; + /* + * row must contain enough for 0xdeadbaad * 8 to be converted into + * "de ad ba ab " * 8 + '\0' + */ + char row[3 * 32]; + + for (c = 0; c * row_size < packet_size; ++c) { + int bytes_to_read = ((c + 1) * row_size > packet_size) ? + packet_size % row_size : row_size; + hex_dump_to_buffer(packet + c * row_size, bytes_to_read, + row_size, 4, row, sizeof(row), false); + d_vpr_t("%s\n", row); + } +} + +static void __fatal_error(struct msm_vidc_core *core, bool fatal) +{ + return; + fatal &= core->platform->data.core_data[DEBUG_TIMEOUT].value; + MSM_VIDC_ERROR(fatal); +} + +static void __strict_check(struct msm_vidc_core *core) +{ + __fatal_error(core, !mutex_is_locked(&core->lock)); +} + +static bool __core_in_valid_state(struct msm_vidc_core *core) +{ + return core->state != MSM_VIDC_CORE_ERROR; +} + +static bool is_sys_cache_present(struct msm_vidc_core *core) +{ + return core->dt->sys_cache_present; +} + +void __write_register(struct msm_vidc_core *core, + u32 reg, u32 value) +{ + u32 hwiosymaddr = reg; + u8 *base_addr; + + if (!core) { + d_vpr_e("%s: invalid params\n", __func__); + return; + } + + __strict_check(core); + + if (!core->power_enabled) { + d_vpr_e("HFI Write register failed : Power is OFF\n"); + __fatal_error(core, true); + return; + } + + base_addr = core->register_base_addr; + d_vpr_l("Base addr: %pK, writing to: %#x, Value: %#x...\n", + base_addr, hwiosymaddr, value); + base_addr += hwiosymaddr; + writel_relaxed(value, base_addr); + + /* + * Memory barrier to make sure value is written into the register. + */ + wmb(); +} + +/* + * Argument mask is used to specify which bits to update. In case mask is 0x11, + * only bits 0 & 4 will be updated with corresponding bits from value. To update + * entire register with value, set mask = 0xFFFFFFFF. + */ +void __write_register_masked(struct msm_vidc_core *core, + u32 reg, u32 value, u32 mask) +{ + u32 prev_val, new_val; + u8 *base_addr; + + if (!core) { + d_vpr_e("%s: invalid params\n", __func__); + return; + } + + __strict_check(core); + + if (!core->power_enabled) { + d_vpr_e("%s: register write failed, power is off\n", + __func__); + __fatal_error(core, true); + return; + } + + base_addr = core->register_base_addr; + base_addr += reg; + + prev_val = readl_relaxed(base_addr); + /* + * Memory barrier to ensure register read is correct + */ + rmb(); + + new_val = (prev_val & ~mask) | (value & mask); + d_vpr_l( + "Base addr: %pK, writing to: %#x, previous-value: %#x, value: %#x, mask: %#x, new-value: %#x...\n", + base_addr, reg, prev_val, value, mask, new_val); + writel_relaxed(new_val, base_addr); + /* + * Memory barrier to make sure value is written into the register. + */ + wmb(); +} + +int __read_register(struct msm_vidc_core *core, u32 reg) +{ + int rc = 0; + u8 *base_addr; + + if (!core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + __strict_check(core); + + if (!core->power_enabled) { + d_vpr_e("HFI Read register failed : Power is OFF\n"); + __fatal_error(core, true); + return -EINVAL; + } + + base_addr = core->register_base_addr; + + rc = readl_relaxed(base_addr + reg); + /* + * Memory barrier to make sure value is read correctly from the + * register. + */ + rmb(); + d_vpr_l("Base addr: %pK, read from: %#x, value: %#x...\n", + base_addr, reg, rc); + + return rc; +} + +static void __schedule_power_collapse_work(struct msm_vidc_core *core) +{ + return; + if (!core->platform->data.core_data[SW_PC].value) + return; + + cancel_delayed_work(&core->pm_work); + if (!queue_delayed_work(core->pm_workq, + &core->pm_work, msecs_to_jiffies( + core->platform->data.core_data[SW_PC_DELAY].value))) { + d_vpr_l("PM work already scheduled\n"); + } +} + +static void __cancel_power_collapse_work(struct msm_vidc_core *core) +{ + return; + if (!core->platform->data.core_data[SW_PC].value) + return; + + cancel_delayed_work(&core->pm_work); +} + +static int __acquire_regulator(struct regulator_info *rinfo, + struct msm_vidc_core *core) +{ + int rc = 0; + + if (rinfo->has_hw_power_collapse) { + rc = regulator_set_mode(rinfo->regulator, + REGULATOR_MODE_NORMAL); + if (rc) { + /* + * This is somewhat fatal, but nothing we can do + * about it. We can't disable the regulator w/o + * getting it back under s/w control + */ + d_vpr_e( + "Failed to acquire regulator control: %s\n", + rinfo->name); + } else { + + d_vpr_h("Acquire regulator control from HW: %s\n", + rinfo->name); + + } + } + + if (!regulator_is_enabled(rinfo->regulator)) { + d_vpr_e("Regulator is not enabled %s\n", + rinfo->name); + __fatal_error(core, true); + } + + return rc; +} + +static int __hand_off_regulator(struct regulator_info *rinfo) +{ + int rc = 0; + + if (rinfo->has_hw_power_collapse) { + rc = regulator_set_mode(rinfo->regulator, + REGULATOR_MODE_FAST); + if (rc) { + d_vpr_e( + "Failed to hand off regulator control: %s\n", + rinfo->name); + } else { + d_vpr_h("Hand off regulator control to HW: %s\n", + rinfo->name); + } + } + + return rc; +} + +static int __hand_off_regulators(struct msm_vidc_core *core) +{ + struct regulator_info *rinfo; + int rc = 0, c = 0; + + venus_hfi_for_each_regulator(core, rinfo) { + rc = __hand_off_regulator(rinfo); + /* + * If one regulator hand off failed, driver should take + * the control for other regulators back. + */ + if (rc) + goto err_reg_handoff_failed; + c++; + } + + return rc; +err_reg_handoff_failed: + venus_hfi_for_each_regulator_reverse_continue(core, rinfo, c) + __acquire_regulator(rinfo, core); + + return rc; +} + +static void __set_registers(struct msm_vidc_core *core) +{ + struct reg_set *reg_set; + int i; + + if (!core || !core->dt) { + d_vpr_e("core resources null, cannot set registers\n"); + return; + } + + reg_set = &core->dt->reg_set; + for (i = 0; i < reg_set->count; i++) { + __write_register_masked(core, reg_set->reg_tbl[i].reg, + reg_set->reg_tbl[i].value, + reg_set->reg_tbl[i].mask); + } +} + +static int __vote_bandwidth(struct bus_info *bus, + unsigned long bw_kbps) +{ + int rc = 0; + + d_vpr_p("Voting bus %s to ab %llu kbps\n", bus->name, bw_kbps); + rc = icc_set_bw(bus->path, kbps_to_icc(bw_kbps), 0); + if (rc) + d_vpr_e("Failed voting bus %s to ab %llu, rc=%d\n", + bus->name, bw_kbps, rc); + + return rc; +} + +int __unvote_buses(struct msm_vidc_core *core) +{ + int rc = 0; + struct bus_info *bus = NULL; + + core->power.bw_ddr = 0; + core->power.bw_llcc = 0; + + venus_hfi_for_each_bus(core, bus) { + rc = __vote_bandwidth(bus, 0); + if (rc) + goto err_unknown_device; + } + +err_unknown_device: + return rc; +} + +static int __vote_buses(struct msm_vidc_core *core, + unsigned long bw_ddr, unsigned long bw_llcc) +{ + int rc = 0; + struct bus_info *bus = NULL; + unsigned long bw_kbps = 0, bw_prev = 0; + enum vidc_bus_type type; + + venus_hfi_for_each_bus(core, bus) { + if (bus && bus->path) { + type = get_type_frm_name(bus->name); + + if (type == DDR) { + bw_kbps = bw_ddr; + bw_prev = core->power.bw_ddr; + } else if (type == LLCC) { + bw_kbps = bw_llcc; + bw_prev = core->power.bw_llcc; + } else { + bw_kbps = bus->range[1]; + bw_prev = core->power.bw_ddr ? + bw_kbps : 0; + } + + /* ensure freq is within limits */ + bw_kbps = clamp_t(typeof(bw_kbps), bw_kbps, + bus->range[0], bus->range[1]); + + if (TRIVIAL_BW_CHANGE(bw_kbps, bw_prev) && bw_prev) { + d_vpr_l("Skip voting bus %s to %llu bps", + bus->name, bw_kbps * 1000); + continue; + } + + rc = __vote_bandwidth(bus, bw_kbps); + + if (type == DDR) + core->power.bw_ddr = bw_kbps; + else if (type == LLCC) + core->power.bw_llcc = bw_kbps; + } else { + d_vpr_e("No BUS to Vote\n"); + } + } + + return rc; +} + +static int __tzbsp_set_video_state(enum tzbsp_video_state state) +{ + int tzbsp_rsp = qcom_scm_set_remote_state(state, 0); + + d_vpr_l("Set state %d, resp %d\n", state, tzbsp_rsp); + if (tzbsp_rsp) { + d_vpr_e("Failed to set video core state to suspend: %d\n", + tzbsp_rsp); + return -EINVAL; + } + + return 0; +} + +static int __set_clk_rate(struct msm_vidc_core *core, + struct clock_info *cl, u64 rate) +{ + int rc = 0; + struct clk *clk = cl->clk; + + rc = clk_set_rate(clk, rate); + if (rc) { + d_vpr_e( + "%s: Failed to set clock rate %llu %s: %d\n", + __func__, rate, cl->name, rc); + return rc; + } + + core->power.clk_freq = rate; + + return rc; +} + +static int __set_clocks(struct msm_vidc_core *core, u32 freq) +{ + struct clock_info *cl; + int rc = 0; + + /* bail early if requested clk_freq is not changed */ + if (freq == core->power.clk_freq) + return 0; + + venus_hfi_for_each_clock(core, cl) { + if (cl->has_scaling) {/* has_scaling */ + rc = __set_clk_rate(core, cl, freq); + if (rc) + return rc; + } + } + + return 0; +} + +static int __scale_clocks(struct msm_vidc_core *core) +{ + int rc = 0; + struct allowed_clock_rates_table *allowed_clks_tbl = NULL; + u32 rate = 0; + + allowed_clks_tbl = core->dt->allowed_clks_tbl; + rate = core->power.clk_freq ? core->power.clk_freq : + allowed_clks_tbl[0].clock_rate; + + rc = __set_clocks(core, rate); + return rc; +} + +static int __write_queue(struct msm_vidc_iface_q_info *qinfo, u8 *packet, + bool *rx_req_is_set) +{ + struct hfi_queue_header *queue; + u32 packet_size_in_words, new_write_idx; + u32 empty_space, read_idx, write_idx; + u32 *write_ptr; + + if (!qinfo || !packet) { + d_vpr_e("%s: invalid params %pK %pK\n", + __func__, qinfo, packet); + return -EINVAL; + } else if (!qinfo->q_array.align_virtual_addr) { + d_vpr_e("Queues have already been freed\n"); + return -EINVAL; + } + + queue = (struct hfi_queue_header *) qinfo->q_hdr; + if (!queue) { + d_vpr_e("queue not present\n"); + return -ENOENT; + } + + if (msm_vidc_debug & VIDC_PKT) { + d_vpr_t("%s: %pK\n", __func__, qinfo); + __dump_packet(packet); + } + + packet_size_in_words = (*(u32 *)packet) >> 2; + if (!packet_size_in_words || packet_size_in_words > + qinfo->q_array.mem_size>>2) { + d_vpr_e("Invalid packet size\n"); + return -ENODATA; + } + + read_idx = queue->qhdr_read_idx; + write_idx = queue->qhdr_write_idx; + + empty_space = (write_idx >= read_idx) ? + ((qinfo->q_array.mem_size>>2) - (write_idx - read_idx)) : + (read_idx - write_idx); + if (empty_space <= packet_size_in_words) { + queue->qhdr_tx_req = 1; + d_vpr_e("Insufficient size (%d) to write (%d)\n", + empty_space, packet_size_in_words); + return -ENOTEMPTY; + } + + queue->qhdr_tx_req = 0; + + new_write_idx = write_idx + packet_size_in_words; + write_ptr = (u32 *)((qinfo->q_array.align_virtual_addr) + + (write_idx << 2)); + if (write_ptr < (u32 *)qinfo->q_array.align_virtual_addr || + write_ptr > (u32 *)(qinfo->q_array.align_virtual_addr + + qinfo->q_array.mem_size)) { + d_vpr_e("Invalid write index"); + return -ENODATA; + } + + if (new_write_idx < (qinfo->q_array.mem_size >> 2)) { + memcpy(write_ptr, packet, packet_size_in_words << 2); + } else { + new_write_idx -= qinfo->q_array.mem_size >> 2; + memcpy(write_ptr, packet, (packet_size_in_words - + new_write_idx) << 2); + memcpy((void *)qinfo->q_array.align_virtual_addr, + packet + ((packet_size_in_words - new_write_idx) << 2), + new_write_idx << 2); + } + + /* + * Memory barrier to make sure packet is written before updating the + * write index + */ + mb(); + queue->qhdr_write_idx = new_write_idx; + if (rx_req_is_set) + *rx_req_is_set = queue->qhdr_rx_req == 1; + /* + * Memory barrier to make sure write index is updated before an + * interrupt is raised on venus. + */ + mb(); + return 0; +} +#if 0 +static int __read_queue(struct msm_vidc_iface_q_info *qinfo, u8 *packet, + u32 *pb_tx_req_is_set) +{ + struct hfi_queue_header *queue; + u32 packet_size_in_words, new_read_idx; + u32 *read_ptr; + u32 receive_request = 0; + u32 read_idx, write_idx; + int rc = 0; + u32 sid; + + if (!qinfo || !packet || !pb_tx_req_is_set) { + d_vpr_e("%s: invalid params %pK %pK %pK\n", + __func__, qinfo, packet, pb_tx_req_is_set); + return -EINVAL; + } else if (!qinfo->q_array.align_virtual_addr) { + d_vpr_e("Queues have already been freed\n"); + return -EINVAL; + } + + /* + * Memory barrier to make sure data is valid before + *reading it + */ + mb(); + queue = (struct hfi_queue_header *) qinfo->q_hdr; + + if (!queue) { + d_vpr_e("Queue memory is not allocated\n"); + return -ENOMEM; + } + + /* + * Do not set receive request for debug queue, if set, + * Venus generates interrupt for debug messages even + * when there is no response message available. + * In general debug queue will not become full as it + * is being emptied out for every interrupt from Venus. + * Venus will anyway generates interrupt if it is full. + */ + if (queue->qhdr_type & HFI_Q_ID_CTRL_TO_HOST_MSG_Q) + receive_request = 1; + + read_idx = queue->qhdr_read_idx; + write_idx = queue->qhdr_write_idx; + + if (read_idx == write_idx) { + queue->qhdr_rx_req = receive_request; + /* + * mb() to ensure qhdr is updated in main memory + * so that venus reads the updated header values + */ + mb(); + *pb_tx_req_is_set = 0; + d_vpr_l( + "%s queue is empty, rx_req = %u, tx_req = %u, read_idx = %u\n", + receive_request ? "message" : "debug", + queue->qhdr_rx_req, queue->qhdr_tx_req, + queue->qhdr_read_idx); + return -ENODATA; + } + + read_ptr = (u32 *)((qinfo->q_array.align_virtual_addr) + + (read_idx << 2)); + if (read_ptr < (u32 *)qinfo->q_array.align_virtual_addr || + read_ptr > (u32 *)(qinfo->q_array.align_virtual_addr + + qinfo->q_array.mem_size - sizeof(*read_ptr))) { + d_vpr_e("Invalid read index\n"); + return -ENODATA; + } + + packet_size_in_words = (*read_ptr) >> 2; + if (!packet_size_in_words) { + d_vpr_e("Zero packet size\n"); + return -ENODATA; + } + + new_read_idx = read_idx + packet_size_in_words; + if (((packet_size_in_words << 2) <= VIDC_IFACEQ_VAR_HUGE_PKT_SIZE) && + read_idx <= (qinfo->q_array.mem_size >> 2)) { + if (new_read_idx < (qinfo->q_array.mem_size >> 2)) { + memcpy(packet, read_ptr, + packet_size_in_words << 2); + } else { + new_read_idx -= (qinfo->q_array.mem_size >> 2); + memcpy(packet, read_ptr, + (packet_size_in_words - new_read_idx) << 2); + memcpy(packet + ((packet_size_in_words - + new_read_idx) << 2), + (u8 *)qinfo->q_array.align_virtual_addr, + new_read_idx << 2); + } + } else { + d_vpr_e("BAD packet received, read_idx: %#x, pkt_size: %d\n", + read_idx, packet_size_in_words << 2); + d_vpr_e("Dropping this packet\n"); + new_read_idx = write_idx; + rc = -ENODATA; + } + + if (new_read_idx != write_idx) + queue->qhdr_rx_req = 0; + else + queue->qhdr_rx_req = receive_request; + + queue->qhdr_read_idx = new_read_idx; + /* + * mb() to ensure qhdr is updated in main memory + * so that venus reads the updated header values + */ + mb(); + + *pb_tx_req_is_set = (queue->qhdr_tx_req == 1) ? 1 : 0; + + if ((msm_vidc_debug & VIDC_PKT) && + !(queue->qhdr_type & HFI_Q_ID_CTRL_TO_HOST_DEBUG_Q)) { + sid = *((u32 *)packet + 2); + d_vpr_t("%s: %pK\n", __func__, qinfo); + __dump_packet(packet); + } + + return rc; +} +#endif +/* Writes into cmdq without raising an interrupt */ +static int __iface_cmdq_write_relaxed(struct msm_vidc_core *core, + void *pkt, bool *requires_interrupt) +{ + struct msm_vidc_iface_q_info *q_info; + //struct vidc_hal_cmd_pkt_hdr *cmd_packet; + int result = -E2BIG; + + if (!core || !pkt) { + d_vpr_e("%s: invalid params %pK %pK\n", + __func__, core, pkt); + return -EINVAL; + } + + __strict_check(core); + + if (!__core_in_valid_state(core)) { + d_vpr_e("%s: fw not in init state\n", __func__); + result = -EINVAL; + goto err_q_null; + } + + //cmd_packet = (struct vidc_hal_cmd_pkt_hdr *)pkt; + //core->last_packet_type = cmd_packet->packet_type; + + q_info = &core->iface_queues[VIDC_IFACEQ_CMDQ_IDX]; + if (!q_info) { + d_vpr_e("cannot write to shared Q's\n"); + goto err_q_null; + } + + if (!q_info->q_array.align_virtual_addr) { + d_vpr_e("cannot write to shared CMD Q's\n"); + result = -ENODATA; + goto err_q_null; + } + + if (__resume(core)) { + d_vpr_e("%s: Power on failed\n", __func__); + goto err_q_write; + } + + if (!__write_queue(q_info, (u8 *)pkt, requires_interrupt)) { + __schedule_power_collapse_work(core); + result = 0; + } else { + d_vpr_e("__iface_cmdq_write: queue full\n"); + } + +err_q_write: +err_q_null: + return result; +} + +static int __iface_cmdq_write(struct msm_vidc_core *core, + void *pkt) +{ + bool needs_interrupt = false; + int rc = __iface_cmdq_write_relaxed(core, pkt, &needs_interrupt); + + if (!rc && needs_interrupt) + call_venus_op(core, raise_interrupt, core); + + return rc; +} +/* +static int __iface_msgq_read(struct msm_vidc_core *core, void *pkt) +{ + u32 tx_req_is_set = 0; + int rc = 0; + struct msm_vidc_iface_q_info *q_info; + + if (!pkt) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + __strict_check(core); + + if (!__core_in_valid_state(core)) { + d_vpr_e("%s: fw not in init state\n", __func__); + rc = -EINVAL; + goto read_error_null; + } + + q_info = &core->iface_queues[VIDC_IFACEQ_MSGQ_IDX]; + if (!q_info->q_array.align_virtual_addr) { + d_vpr_e("cannot read from shared MSG Q's\n"); + rc = -ENODATA; + goto read_error_null; + } + + if (!__read_queue(q_info, (u8 *)pkt, &tx_req_is_set)) { + if (tx_req_is_set) + call_venus_op(core, raise_interrupt, core); + rc = 0; + } else + rc = -ENODATA; + +read_error_null: + return rc; +} + +static int __iface_dbgq_read(struct msm_vidc_core *core, void *pkt) +{ + u32 tx_req_is_set = 0; + int rc = 0; + struct msm_vidc_iface_q_info *q_info; + + if (!pkt) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + __strict_check(core); + + q_info = &core->iface_queues[VIDC_IFACEQ_DBGQ_IDX]; + if (!q_info->q_array.align_virtual_addr) { + d_vpr_e("cannot read from shared DBG Q's\n"); + rc = -ENODATA; + goto dbg_error_null; + } + + if (!__read_queue(q_info, (u8 *)pkt, &tx_req_is_set)) { + if (tx_req_is_set) + call_venus_op(core, raise_interrupt, core); + rc = 0; + } else + rc = -ENODATA; + +dbg_error_null: + return rc; +} +*/ +static int __sys_set_debug(struct msm_vidc_core *core, u32 debug) +{ + int rc = 0; + + //rc = call_hfi_pkt_op(core, sys_debug_config, pkt, debug); + rc = hfi_packet_sys_debug_config(core, core->packet, + core->packet_size, debug); + if (rc) { + d_vpr_e("Debug mode setting to FW failed\n"); + return -ENOTEMPTY; + } + + if (__iface_cmdq_write(core, core->packet)) + return -ENOTEMPTY; + return 0; +} +/* +static int __sys_set_coverage(struct msm_vidc_core *core, + u32 mode) +{ + int rc = 0; + + //rc = call_hfi_pkt_op(core, sys_coverage_config, pkt, mode); + if (rc) { + d_vpr_e("Coverage mode setting to FW failed\n"); + return -ENOTEMPTY; + } + + //if (__iface_cmdq_write(core, pkt, sid)) { + // d_vpr_e("Failed to send coverage pkt to f/w\n"); + // return -ENOTEMPTY; + //} + + return 0; +} + +static int __sys_set_power_control(struct msm_vidc_core *core, bool enable) +{ + struct regulator_info *rinfo; + bool supported = false; + + venus_hfi_for_each_regulator(core, rinfo) { + if (rinfo->has_hw_power_collapse) { + supported = true; + break; + } + } + + if (!supported) + return 0; + + //call_hfi_pkt_op(core, sys_power_control, pkt, enable); + //if (__iface_cmdq_write(core, pkt, sid)) + // return -ENOTEMPTY; + return 0; +} +*/ + +int __prepare_pc(struct msm_vidc_core *core) +{ + int rc = 0; + + rc = hfi_packet_sys_pc_prep(core, core->packet, core->packet_size); + if (rc) { + d_vpr_e("Failed to create sys pc prep pkt\n"); + goto err_pc_prep; + } + + if (__iface_cmdq_write(core, core->packet)) + rc = -ENOTEMPTY; + if (rc) + d_vpr_e("Failed to prepare venus for power off"); +err_pc_prep: + return rc; +} + +static int __power_collapse(struct msm_vidc_core *core, bool force) +{ + int rc = 0; + + if (!core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + if (!core->power_enabled) { + d_vpr_h("%s: Power already disabled\n", __func__); + goto exit; + } + + if (!__core_in_valid_state(core)) { + d_vpr_e("%s: Core not in init state\n", __func__); + return -EINVAL; + } + + rc = call_venus_op(core, prepare_pc, core); + if (rc) + goto skip_power_off; + + //__flush_debug_queue(core, core->raw_packet); + + rc = __suspend(core); + if (rc) + d_vpr_e("Failed __suspend\n"); + +exit: + return rc; + +skip_power_off: + return -EAGAIN; +} + +static int __protect_cp_mem(struct msm_vidc_core *core) +{ + struct tzbsp_memprot memprot; + int rc = 0; + struct context_bank_info *cb; + + if (!core) + return -EINVAL; + + memprot.cp_start = 0x0; + memprot.cp_size = 0x0; + memprot.cp_nonpixel_start = 0x0; + memprot.cp_nonpixel_size = 0x0; + + list_for_each_entry(cb, &core->dt->context_banks, list) { + if (!strcmp(cb->name, "venus_ns")) { + memprot.cp_size = cb->addr_range.start; + + d_vpr_h("%s: memprot.cp_size: %#x\n", + __func__, memprot.cp_size); + } + + if (!strcmp(cb->name, "venus_sec_non_pixel")) { + memprot.cp_nonpixel_start = cb->addr_range.start; + memprot.cp_nonpixel_size = cb->addr_range.size; + + d_vpr_h("%s: cp_nonpixel_start: %#x size: %#x\n", + __func__, memprot.cp_nonpixel_start, + memprot.cp_nonpixel_size); + } + } + + rc = qcom_scm_mem_protect_video(memprot.cp_start, memprot.cp_size, + memprot.cp_nonpixel_start, memprot.cp_nonpixel_size); + + if (rc) + d_vpr_e("Failed to protect memory(%d)\n", rc); + + return rc; +} + +static int __core_set_resource(struct msm_vidc_core *core, + struct vidc_resource_hdr *resource_hdr, void *resource_value) +{ + int rc = 0; + + if (!core || !resource_hdr || !resource_value) { + d_vpr_e("%s: invalid params %pK %pK %pK\n", __func__, + core, resource_hdr, resource_value); + return -EINVAL; + } + + //rc = hfi_packet_sys_set_resource(core, core->packet, core->packet_size, + // resource_hdr, resource_value); + if (rc) { + d_vpr_e("set_res: failed to create packet\n"); + goto err_create_pkt; + } + + //rc = __iface_cmdq_write(core, core->packet); + if (rc) + rc = -ENOTEMPTY; + +err_create_pkt: + return rc; +} + +static int __core_release_resource(struct msm_vidc_core *core, + struct vidc_resource_hdr *resource_hdr) +{ + int rc = 0; + + if (!core || !resource_hdr) { + d_vpr_e("%s: invalid params %pK %pK\n", + __func__, core, resource_hdr); + return -EINVAL; + } + + //rc = hfi_packet_sys_release_resource(core, core->packet, core->packet_size, resource_hdr); + if (rc) { + d_vpr_e("release_res: failed to create packet\n"); + goto err_create_pkt; + } + + //rc = __iface_cmdq_write(core, core->packet); + if (rc) + rc = -ENOTEMPTY; + +err_create_pkt: + return rc; +} + + + + +static void __deinit_clocks(struct msm_vidc_core *core) +{ + struct clock_info *cl; + + core->power.clk_freq = 0; + venus_hfi_for_each_clock_reverse(core, cl) { + if (cl->clk) { + clk_put(cl->clk); + cl->clk = NULL; + } + } +} + +static int __init_clocks(struct msm_vidc_core *core) +{ + int rc = 0; + struct clock_info *cl = NULL; + + if (!core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + venus_hfi_for_each_clock(core, cl) { + d_vpr_h("%s: scalable? %d, count %d\n", + cl->name, cl->has_scaling, cl->count); + } + + venus_hfi_for_each_clock(core, cl) { + if (!cl->clk) { + cl->clk = clk_get(&core->pdev->dev, cl->name); + if (IS_ERR_OR_NULL(cl->clk)) { + d_vpr_e("Failed to get clock: %s\n", cl->name); + rc = PTR_ERR(cl->clk) ? + PTR_ERR(cl->clk) : -EINVAL; + cl->clk = NULL; + goto err_clk_get; + } + } + } + core->power.clk_freq = 0; + return 0; + +err_clk_get: + __deinit_clocks(core); + return rc; +} + +static int __handle_reset_clk(struct msm_vidc_core *core, + int reset_index, enum reset_state state) +{ + int rc = 0; + struct msm_vidc_dt *dt = core->dt; + struct reset_control *rst; + struct reset_set *rst_set = &dt->reset_set; + + if (!rst_set->reset_tbl) + return 0; + + rst = rst_set->reset_tbl[reset_index].rst; + d_vpr_h("reset_clk: name %s reset_state %d rst %pK\n", + rst_set->reset_tbl[reset_index].name, state, rst); + + switch (state) { + case INIT: + if (rst) + goto skip_reset_init; + + rst = devm_reset_control_get(&core->pdev->dev, + rst_set->reset_tbl[reset_index].name); + if (IS_ERR(rst)) + rc = PTR_ERR(rst); + + rst_set->reset_tbl[reset_index].rst = rst; + break; + case ASSERT: + if (!rst) { + rc = PTR_ERR(rst); + goto failed_to_reset; + } + + rc = reset_control_assert(rst); + break; + case DEASSERT: + if (!rst) { + rc = PTR_ERR(rst); + goto failed_to_reset; + } + rc = reset_control_deassert(rst); + break; + default: + d_vpr_e("%s: invalid reset request\n", __func__); + if (rc) + goto failed_to_reset; + } + + return 0; + +skip_reset_init: +failed_to_reset: + return rc; +} + +void __disable_unprepare_clks(struct msm_vidc_core *core) +{ + struct clock_info *cl; + + if (!core) { + d_vpr_e("%s: invalid params\n", __func__); + return; + } + + venus_hfi_for_each_clock_reverse(core, cl) { + d_vpr_h("Clock: %s disable and unprepare\n", + cl->name); + + if (!__clk_is_enabled(cl->clk)) + d_vpr_e("%s: clock %s already disabled\n", + __func__, cl->name); + + clk_disable_unprepare(cl->clk); + + if (__clk_is_enabled(cl->clk)) + d_vpr_e("%s: clock %s not disabled\n", + __func__, cl->name); + } +} + +int __reset_ahb2axi_bridge(struct msm_vidc_core *core) +{ + int rc, i; + + if (!core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + for (i = 0; i < core->dt->reset_set.count; i++) { + rc = __handle_reset_clk(core, i, ASSERT); + if (rc) { + d_vpr_e("failed to assert reset clocks\n"); + goto failed_to_reset; + } + + /* wait for deassert */ + usleep_range(400, 500); + + rc = __handle_reset_clk(core, i, DEASSERT); + if (rc) { + d_vpr_e("failed to deassert reset clocks\n"); + goto failed_to_reset; + } + } + + return 0; + +failed_to_reset: + return rc; +} + +static int __prepare_enable_clks(struct msm_vidc_core *core) +{ + struct clock_info *cl = NULL, *cl_fail = NULL; + int rc = 0, c = 0; + + if (!core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + venus_hfi_for_each_clock(core, cl) { + /* + * For the clocks we control, set the rate prior to preparing + * them. Since we don't really have a load at this point, scale + * it to the lowest frequency possible + */ + if (cl->has_scaling) + __set_clk_rate(core, cl, + clk_round_rate(cl->clk, 0)); + + if (__clk_is_enabled(cl->clk)) + d_vpr_e("%s: clock %s already enabled\n", + __func__, cl->name); + + rc = clk_prepare_enable(cl->clk); + if (rc) { + d_vpr_e("Failed to enable clocks\n"); + cl_fail = cl; + goto fail_clk_enable; + } + + if (!__clk_is_enabled(cl->clk)) + d_vpr_e("%s: clock %s not enabled\n", + __func__, cl->name); + + c++; + d_vpr_h("Clock: %s prepared and enabled\n", cl->name); + } + + call_venus_op(core, clock_config_on_enable, core); + return rc; + +fail_clk_enable: + venus_hfi_for_each_clock_reverse_continue(core, cl, c) { + d_vpr_e("Clock: %s disable and unprepare\n", + cl->name); + clk_disable_unprepare(cl->clk); + } + + return rc; +} + +static void __deinit_bus(struct msm_vidc_core *core) +{ + struct bus_info *bus = NULL; + + if (!core) + return; + + core->power.bw_ddr = 0; + core->power.bw_llcc = 0; + + venus_hfi_for_each_bus_reverse(core, bus) { + icc_put(bus->path); + bus->path = NULL; + } +} + +static int __init_bus(struct msm_vidc_core *core) +{ + struct bus_info *bus = NULL; + int rc = 0; + + if (!core) + return -EINVAL; + + venus_hfi_for_each_bus(core, bus) { + if (!strcmp(bus->name, "venus-llcc")) { + if (msm_vidc_syscache_disable) { + d_vpr_h("Skipping LLC bus init: %s\n", + bus->name); + continue; + } + } + bus->path = of_icc_get(bus->dev, bus->name); + if (IS_ERR_OR_NULL(bus->path)) { + rc = PTR_ERR(bus->path) ? + PTR_ERR(bus->path) : -EBADHANDLE; + + d_vpr_e("Failed to register bus %s: %d\n", + bus->name, rc); + bus->path = NULL; + goto err_add_dev; + } + } + + return 0; + +err_add_dev: + __deinit_bus(core); + return rc; +} + +static void __deinit_regulators(struct msm_vidc_core *core) +{ + struct regulator_info *rinfo = NULL; + + venus_hfi_for_each_regulator_reverse(core, rinfo) { + if (rinfo->regulator) { + regulator_put(rinfo->regulator); + rinfo->regulator = NULL; + } + } +} + +static int __init_regulators(struct msm_vidc_core *core) +{ + int rc = 0; + struct regulator_info *rinfo = NULL; + + venus_hfi_for_each_regulator(core, rinfo) { + rinfo->regulator = regulator_get(&core->pdev->dev, + rinfo->name); + if (IS_ERR_OR_NULL(rinfo->regulator)) { + rc = PTR_ERR(rinfo->regulator) ? + PTR_ERR(rinfo->regulator) : -EBADHANDLE; + d_vpr_e("Failed to get regulator: %s\n", rinfo->name); + rinfo->regulator = NULL; + goto err_reg_get; + } + } + + return 0; + +err_reg_get: + __deinit_regulators(core); + return rc; +} + +static void __deinit_subcaches(struct msm_vidc_core *core) +{ + struct subcache_info *sinfo = NULL; + + if (!core) { + d_vpr_e("%s: invalid params\n", __func__); + goto exit; + } + + if (!is_sys_cache_present(core)) + goto exit; + + venus_hfi_for_each_subcache_reverse(core, sinfo) { + if (sinfo->subcache) { + d_vpr_h("deinit_subcaches: %s\n", sinfo->name); + llcc_slice_putd(sinfo->subcache); + sinfo->subcache = NULL; + } + } + +exit: + return; +} + +static int __init_subcaches(struct msm_vidc_core *core) +{ + int rc = 0; + struct subcache_info *sinfo = NULL; + + if (!core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (!is_sys_cache_present(core)) + return 0; + + venus_hfi_for_each_subcache(core, sinfo) { + if (!strcmp("vidsc0", sinfo->name)) { + sinfo->subcache = llcc_slice_getd(LLCC_VIDSC0); + } else if (!strcmp("vidsc1", sinfo->name)) { + sinfo->subcache = llcc_slice_getd(LLCC_VIDSC1); + } else if (!strcmp("vidscfw", sinfo->name)) { + sinfo->subcache = llcc_slice_getd(LLCC_VIDFW); + } else { + d_vpr_e("Invalid subcache name %s\n", + sinfo->name); + } + if (IS_ERR_OR_NULL(sinfo->subcache)) { + rc = PTR_ERR(sinfo->subcache) ? + PTR_ERR(sinfo->subcache) : -EBADHANDLE; + d_vpr_e("init_subcaches: invalid subcache: %s rc %d\n", + sinfo->name, rc); + sinfo->subcache = NULL; + goto err_subcache_get; + } + d_vpr_h("init_subcaches: %s\n", sinfo->name); + } + + return 0; + +err_subcache_get: + __deinit_subcaches(core); + return rc; +} + +static int __init_resources(struct msm_vidc_core *core) +{ + int i, rc = 0; + + rc = __init_regulators(core); + if (rc) { + d_vpr_e("Failed to get all regulators\n"); + return -ENODEV; + } + + rc = __init_clocks(core); + if (rc) { + d_vpr_e("Failed to init clocks\n"); + rc = -ENODEV; + goto err_init_clocks; + } + + for (i = 0; i < core->dt->reset_set.count; i++) { + rc = __handle_reset_clk(core, i, INIT); + if (rc) { + d_vpr_e("Failed to init reset clocks\n"); + rc = -ENODEV; + goto err_init_reset_clk; + } + } + + rc = __init_bus(core); + if (rc) { + d_vpr_e("Failed to init bus: %d\n", rc); + goto err_init_bus; + } + + rc = __init_subcaches(core); + if (rc) + d_vpr_e("Failed to init subcaches: %d\n", rc); + + return rc; + +err_init_reset_clk: +err_init_bus: + __deinit_clocks(core); +err_init_clocks: + __deinit_regulators(core); + return rc; +} + +static void __deinit_resources(struct msm_vidc_core *core) +{ + __deinit_subcaches(core); + __deinit_bus(core); + __deinit_clocks(core); + __deinit_regulators(core); +} + +static int __disable_regulator(struct regulator_info *rinfo, + struct msm_vidc_core *core) +{ + int rc = 0; + + d_vpr_h("Disabling regulator %s\n", rinfo->name); + + /* + * This call is needed. Driver needs to acquire the control back + * from HW in order to disable the regualtor. Else the behavior + * is unknown. + */ + + rc = __acquire_regulator(rinfo, core); + if (rc) { + /* + * This is somewhat fatal, but nothing we can do + * about it. We can't disable the regulator w/o + * getting it back under s/w control + */ + d_vpr_e("Failed to acquire control on %s\n", + rinfo->name); + + goto disable_regulator_failed; + } + + if (!regulator_is_enabled(rinfo->regulator)) + d_vpr_e("%s: regulator %s already disabled\n", + __func__, rinfo->name); + + rc = regulator_disable(rinfo->regulator); + if (rc) { + d_vpr_e("Failed to disable %s: %d\n", + rinfo->name, rc); + goto disable_regulator_failed; + } + + if (regulator_is_enabled(rinfo->regulator)) + d_vpr_e("%s: regulator %s not disabled\n", + __func__, rinfo->name); + + return 0; +disable_regulator_failed: + + /* Bring attention to this issue */ + __fatal_error(core, true); + return rc; +} + +static int __enable_hw_power_collapse(struct msm_vidc_core *core) +{ + int rc = 0; + + rc = __hand_off_regulators(core); + if (rc) + d_vpr_e("%s: Failed to enable HW power collapse %d\n", + __func__, rc); + return rc; +} + +static int __enable_regulators(struct msm_vidc_core *core) +{ + int rc = 0, c = 0; + struct regulator_info *rinfo; + + d_vpr_h("Enabling regulators\n"); + + venus_hfi_for_each_regulator(core, rinfo) { + if (regulator_is_enabled(rinfo->regulator)) + d_vpr_e("%s: regulator %s already enabled\n", + __func__, rinfo->name); + + rc = regulator_enable(rinfo->regulator); + if (rc) { + d_vpr_e("Failed to enable %s: %d\n", + rinfo->name, rc); + goto err_reg_enable_failed; + } + + if (!regulator_is_enabled(rinfo->regulator)) + d_vpr_e("%s: regulator %s not enabled\n", + __func__, rinfo->name); + + d_vpr_h("Enabled regulator %s\n", + rinfo->name); + c++; + } + + return 0; + +err_reg_enable_failed: + venus_hfi_for_each_regulator_reverse_continue(core, rinfo, c) + __disable_regulator(rinfo, core); + + return rc; +} + +int __disable_regulators(struct msm_vidc_core *core) +{ + struct regulator_info *rinfo; + + d_vpr_h("Disabling regulators\n"); + venus_hfi_for_each_regulator_reverse(core, rinfo) + __disable_regulator(rinfo, core); + + return 0; +} + +static int __release_subcaches(struct msm_vidc_core *core) +{ + struct subcache_info *sinfo; + int rc = 0; + u32 c = 0; + u32 resource[VIDC_MAX_SUBCACHE_SIZE]; + struct hfi_resource_syscache_info_type *sc_res_info; + struct hfi_resource_subcache_type *sc_res; + struct vidc_resource_hdr rhdr; + + if (msm_vidc_syscache_disable || !is_sys_cache_present(core)) + return 0; + + memset((void *)resource, 0x0, (sizeof(u32) * VIDC_MAX_SUBCACHE_SIZE)); + + sc_res_info = (struct hfi_resource_syscache_info_type *)resource; + sc_res = &(sc_res_info->rg_subcache_entries[0]); + + /* Release resource command to Venus */ + venus_hfi_for_each_subcache_reverse(core, sinfo) { + if (sinfo->isset) { + /* Update the entry */ + sc_res[c].size = sinfo->subcache->slice_size; + sc_res[c].sc_id = sinfo->subcache->slice_id; + c++; + sinfo->isset = false; + } + } + + if (c > 0) { + d_vpr_h("Releasing %d subcaches\n", c); + rhdr.resource_handle = sc_res_info; /* cookie */ + rhdr.resource_id = VIDC_RESOURCE_SYSCACHE; + + rc = __core_release_resource(core, &rhdr); + if (rc) + d_vpr_e("Failed to release %d subcaches\n", c); + } + + core->dt->sys_cache_res_set = false; + + return 0; +} + +static int __disable_subcaches(struct msm_vidc_core *core) +{ + struct subcache_info *sinfo; + int rc = 0; + + if (msm_vidc_syscache_disable || !is_sys_cache_present(core)) + return 0; + + /* De-activate subcaches */ + venus_hfi_for_each_subcache_reverse(core, sinfo) { + if (sinfo->isactive) { + d_vpr_h("De-activate subcache %s\n", + sinfo->name); + rc = llcc_slice_deactivate(sinfo->subcache); + if (rc) { + d_vpr_e("Failed to de-activate %s: %d\n", + sinfo->name, rc); + } + sinfo->isactive = false; + } + } + + return 0; +} + +static int __enable_subcaches(struct msm_vidc_core *core) +{ + int rc = 0; + u32 c = 0; + struct subcache_info *sinfo; + + if (msm_vidc_syscache_disable || !is_sys_cache_present(core)) + return 0; + + /* Activate subcaches */ + venus_hfi_for_each_subcache(core, sinfo) { + rc = llcc_slice_activate(sinfo->subcache); + if (rc) { + d_vpr_e("Failed to activate %s: %d\n", + sinfo->name, rc); + __fatal_error(core, true); + goto err_activate_fail; + } + sinfo->isactive = true; + d_vpr_h("Activated subcache %s\n", sinfo->name); + c++; + } + + d_vpr_h("Activated %d Subcaches to Venus\n", c); + + return 0; + +err_activate_fail: + __release_subcaches(core); + __disable_subcaches(core); + return 0; +} + +static int __set_subcaches(struct msm_vidc_core *core) +{ + int rc = 0; + u32 c = 0; + struct subcache_info *sinfo; + u32 resource[VIDC_MAX_SUBCACHE_SIZE]; + struct hfi_resource_syscache_info_type *sc_res_info; + struct hfi_resource_subcache_type *sc_res; + struct vidc_resource_hdr rhdr; + + if (core->dt->sys_cache_res_set) { + d_vpr_h("Subcaches already set to Venus\n"); + return 0; + } + + memset((void *)resource, 0x0, (sizeof(u32) * VIDC_MAX_SUBCACHE_SIZE)); + + sc_res_info = (struct hfi_resource_syscache_info_type *)resource; + sc_res = &(sc_res_info->rg_subcache_entries[0]); + + venus_hfi_for_each_subcache(core, sinfo) { + if (sinfo->isactive) { + sc_res[c].size = sinfo->subcache->slice_size; + sc_res[c].sc_id = sinfo->subcache->slice_id; + c++; + } + } + + /* Set resource to Venus for activated subcaches */ + if (c) { + d_vpr_h("Setting %d Subcaches\n", c); + + rhdr.resource_handle = sc_res_info; /* cookie */ + rhdr.resource_id = VIDC_RESOURCE_SYSCACHE; + + sc_res_info->num_entries = c; + + rc = __core_set_resource(core, &rhdr, (void *)sc_res_info); + if (rc) { + d_vpr_e("Failed to set subcaches %d\n", rc); + goto err_fail_set_subacaches; + } + + venus_hfi_for_each_subcache(core, sinfo) { + if (sinfo->isactive) + sinfo->isset = true; + } + + d_vpr_h("Set Subcaches done to Venus\n"); + core->dt->sys_cache_res_set = true; + } + + return 0; + +err_fail_set_subacaches: + __disable_subcaches(core); + + return 0; +} +/* +static int __set_ubwc_config(struct msm_vidc_core *core) +{ + int rc = 0; + + if (!core->platform->data.ubwc_config) { + d_vpr_h("%s: invalid ubwc config\n", __func__); + return -EINVAL; + } + + //rc = hfi_packet_sys_ubwc_config(core, core->packet, core->packet_size); + if (rc) + return rc; + + //rc = __iface_cmdq_write(core, core->packet)); + if (rc) + return rc; + + d_vpr_h("Configured UBWC Config\n"); + return rc; +} +*/ +static int __venus_power_on(struct msm_vidc_core *core) +{ + int rc = 0; + + if (core->power_enabled) + return 0; + + core->power_enabled = true; + /* Vote for all hardware resources */ + rc = __vote_buses(core, INT_MAX, INT_MAX); + if (rc) { + d_vpr_e("Failed to vote buses, err: %d\n", rc); + goto fail_vote_buses; + } + + rc = __enable_regulators(core); + if (rc) { + d_vpr_e("Failed to enable GDSC, err = %d\n", rc); + goto fail_enable_gdsc; + } + + rc = call_venus_op(core, reset_ahb2axi_bridge, core); + if (rc) { + d_vpr_e("Failed to reset ahb2axi: %d\n", rc); + goto fail_enable_clks; + } + + rc = __prepare_enable_clks(core); + if (rc) { + d_vpr_e("Failed to enable clocks: %d\n", rc); + goto fail_enable_clks; + } + + rc = __scale_clocks(core); + if (rc) { + d_vpr_e("Failed to scale clocks, performance might be affected\n"); + rc = 0; + } + + /* + * Re-program all of the registers that get reset as a result of + * regulator_disable() and _enable() + */ + __set_registers(core); + + call_venus_op(core, interrupt_init, core); + core->intr_status = 0; + enable_irq(core->dt->irq); + + return rc; + +fail_enable_clks: + __disable_regulators(core); +fail_enable_gdsc: + __unvote_buses(core); +fail_vote_buses: + core->power_enabled = false; + return rc; +} + +static int __suspend(struct msm_vidc_core *core) +{ + int rc = 0; + + if (!core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } else if (!core->power_enabled) { + d_vpr_h("Power already disabled\n"); + return 0; + } + + d_vpr_h("Entering suspend\n"); + + rc = __tzbsp_set_video_state(TZBSP_VIDEO_STATE_SUSPEND); + if (rc) { + d_vpr_e("Failed to suspend video core %d\n", rc); + goto err_tzbsp_suspend; + } + + __disable_subcaches(core); + + call_venus_op(core, power_off, core); + d_vpr_h("Venus power off\n"); + return rc; + +err_tzbsp_suspend: + return rc; +} + +static int __resume(struct msm_vidc_core *core) +{ + int rc = 0; + + if (!core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } else if (core->power_enabled) { + goto exit; + } else if (!__core_in_valid_state(core)) { + d_vpr_e("%s: core in deinit state\n", __func__); + return -EINVAL; + } + + d_vpr_h("Resuming from power collapse\n"); + rc = __venus_power_on(core); + if (rc) { + d_vpr_e("Failed to power on venus\n"); + goto err_venus_power_on; + } + + /* Reboot the firmware */ + rc = __tzbsp_set_video_state(TZBSP_VIDEO_STATE_RESUME); + if (rc) { + d_vpr_e("Failed to resume video core %d\n", rc); + goto err_set_video_state; + } + + /* + * Hand off control of regulators to h/w _after_ loading fw. + * Note that the GDSC will turn off when switching from normal + * (s/w triggered) to fast (HW triggered) unless the h/w vote is + * present. + */ + if (__enable_hw_power_collapse(core)) + d_vpr_e("Failed to enabled inter-frame PC\n"); + + call_venus_op(core, setup_ucregion_memmap, core); + + /* Wait for boot completion */ + rc = call_venus_op(core, boot_firmware, core); + if (rc) { + d_vpr_e("Failed to reset venus core\n"); + goto err_reset_core; + } + + __sys_set_debug(core, (msm_vidc_debug & FW_LOGMASK) >> FW_LOGSHIFT); + __enable_subcaches(core); + __set_subcaches(core); + + d_vpr_h("Resumed from power collapse\n"); +exit: + /* Don't reset skip_pc_count for SYS_PC_PREP cmd */ + //if (core->last_packet_type != HFI_CMD_SYS_PC_PREP) + // core->skip_pc_count = 0; + return rc; +err_reset_core: + __tzbsp_set_video_state(TZBSP_VIDEO_STATE_SUSPEND); +err_set_video_state: + call_venus_op(core, power_off, core); +err_venus_power_on: + d_vpr_e("Failed to resume from power collapse\n"); + return rc; +} + +static void __set_queue_hdr_defaults(struct hfi_queue_header *q_hdr) +{ + q_hdr->qhdr_status = 0x1; + q_hdr->qhdr_type = VIDC_IFACEQ_DFLT_QHDR; + q_hdr->qhdr_q_size = VIDC_IFACEQ_QUEUE_SIZE / 4; + q_hdr->qhdr_pkt_size = 0; + q_hdr->qhdr_rx_wm = 0x1; + q_hdr->qhdr_tx_wm = 0x1; + q_hdr->qhdr_rx_req = 0x1; + q_hdr->qhdr_tx_req = 0x0; + q_hdr->qhdr_rx_irq_status = 0x0; + q_hdr->qhdr_tx_irq_status = 0x0; + q_hdr->qhdr_read_idx = 0x0; + q_hdr->qhdr_write_idx = 0x0; +} + +static void __interface_queues_release(struct msm_vidc_core *core) +{ + int i; + + d_vpr_h("%s()\n", __func__); + + msm_vidc_memory_unmap(core, &core->iface_q_table.map); + msm_vidc_memory_free(core, &core->iface_q_table.alloc); + msm_vidc_memory_unmap(core, &core->sfr.map); + msm_vidc_memory_free(core, &core->sfr.alloc); + + for (i = 0; i < VIDC_IFACEQ_NUMQ; i++) { + core->iface_queues[i].q_hdr = NULL; + core->iface_queues[i].q_array.align_virtual_addr = NULL; + core->iface_queues[i].q_array.align_device_addr = 0; + } + + core->iface_q_table.align_virtual_addr = NULL; + core->iface_q_table.align_device_addr = 0; + + core->sfr.align_virtual_addr = NULL; + core->sfr.align_device_addr = 0; +} + +static int __interface_queues_init(struct msm_vidc_core *core) +{ + int rc = 0; + struct hfi_queue_table_header *q_tbl_hdr; + struct hfi_queue_header *q_hdr; + struct msm_vidc_iface_q_info *iface_q; + struct msm_vidc_alloc alloc; + struct msm_vidc_map map; + int offset = 0; + u32 q_size; + u32 i; + + d_vpr_h("%s()\n", __func__); + q_size = SHARED_QSIZE - ALIGNED_SFR_SIZE - ALIGNED_QDSS_SIZE; + + memset(&alloc, 0, sizeof(alloc)); + alloc.buffer_type = MSM_VIDC_QUEUE; + alloc.region = MSM_VIDC_NON_SECURE; + alloc.size = q_size; + alloc.cached = false; + alloc.secure = false; + alloc.map_kernel = true; + rc = msm_vidc_memory_alloc(core, &alloc); + if (rc) { + d_vpr_e("%s: alloc failed\n", __func__); + goto fail_alloc_queue; + } + + memset(&map, 0, sizeof(map)); + map.buffer_type = alloc.buffer_type; + map.region = alloc.region; + map.dmabuf = alloc.dmabuf; + rc = msm_vidc_memory_map(core, &map); + if (rc) { + d_vpr_e("%s: alloc failed\n", __func__); + goto fail_alloc_queue; + } + + core->iface_q_table.align_virtual_addr = alloc.kvaddr; + core->iface_q_table.align_device_addr = map.device_addr; + core->iface_q_table.mem_size = VIDC_IFACEQ_TABLE_SIZE; + core->iface_q_table.alloc = alloc; + core->iface_q_table.map = map; + offset += core->iface_q_table.mem_size; + + for (i = 0; i < VIDC_IFACEQ_NUMQ; i++) { + iface_q = &core->iface_queues[i]; + iface_q->q_array.align_device_addr = map.device_addr + offset; + iface_q->q_array.align_virtual_addr = alloc.kvaddr + offset; + iface_q->q_array.mem_size = VIDC_IFACEQ_QUEUE_SIZE; + offset += iface_q->q_array.mem_size; + iface_q->q_hdr = VIDC_IFACEQ_GET_QHDR_START_ADDR( + core->iface_q_table.align_virtual_addr, i); + __set_queue_hdr_defaults(iface_q->q_hdr); + } + + q_tbl_hdr = (struct hfi_queue_table_header *) + core->iface_q_table.align_virtual_addr; + q_tbl_hdr->qtbl_version = 0; + q_tbl_hdr->device_addr = (void *)core; + strlcpy(q_tbl_hdr->name, "msm_v4l2_vidc", sizeof(q_tbl_hdr->name)); + q_tbl_hdr->qtbl_size = VIDC_IFACEQ_TABLE_SIZE; + q_tbl_hdr->qtbl_qhdr0_offset = sizeof(struct hfi_queue_table_header); + q_tbl_hdr->qtbl_qhdr_size = sizeof(struct hfi_queue_header); + q_tbl_hdr->qtbl_num_q = VIDC_IFACEQ_NUMQ; + q_tbl_hdr->qtbl_num_active_q = VIDC_IFACEQ_NUMQ; + + iface_q = &core->iface_queues[VIDC_IFACEQ_CMDQ_IDX]; + q_hdr = iface_q->q_hdr; + q_hdr->qhdr_start_addr = iface_q->q_array.align_device_addr; + q_hdr->qhdr_type |= HFI_Q_ID_HOST_TO_CTRL_CMD_Q; + + iface_q = &core->iface_queues[VIDC_IFACEQ_MSGQ_IDX]; + q_hdr = iface_q->q_hdr; + q_hdr->qhdr_start_addr = iface_q->q_array.align_device_addr; + q_hdr->qhdr_type |= HFI_Q_ID_CTRL_TO_HOST_MSG_Q; + + iface_q = &core->iface_queues[VIDC_IFACEQ_DBGQ_IDX]; + q_hdr = iface_q->q_hdr; + q_hdr->qhdr_start_addr = iface_q->q_array.align_device_addr; + q_hdr->qhdr_type |= HFI_Q_ID_CTRL_TO_HOST_DEBUG_Q; + /* + * Set receive request to zero on debug queue as there is no + * need of interrupt from video hardware for debug messages + */ + q_hdr->qhdr_rx_req = 0; + + /* sfr buffer */ + memset(&alloc, 0, sizeof(alloc)); + alloc.buffer_type = MSM_VIDC_QUEUE; + alloc.region = MSM_VIDC_NON_SECURE; + alloc.size = ALIGNED_SFR_SIZE; + alloc.cached = false; + alloc.secure = false; + alloc.map_kernel = true; + rc = msm_vidc_memory_alloc(core, &alloc); + if (rc) { + d_vpr_e("%s: sfr alloc failed\n", __func__); + goto fail_alloc_queue; + } + memset(&map, 0, sizeof(map)); + map.buffer_type = alloc.buffer_type; + map.region = alloc.region; + map.dmabuf = alloc.dmabuf; + rc = msm_vidc_memory_map(core, &map); + if (rc) { + d_vpr_e("%s: sfr map failed\n", __func__); + goto fail_alloc_queue; + } + core->sfr.align_device_addr = map.device_addr; + core->sfr.align_virtual_addr = alloc.kvaddr; + core->sfr.mem_size = ALIGNED_SFR_SIZE; + core->sfr.alloc = alloc; + core->sfr.map = map; + /* write sfr buffer size in first word */ + *((u32 *)core->sfr.align_virtual_addr) = ALIGNED_SFR_SIZE; + + rc = call_venus_op(core, setup_ucregion_memmap, core); + if (rc) + return rc; + + return 0; +fail_alloc_queue: + return -ENOMEM; +} + +static int __load_fw(struct msm_vidc_core *core) +{ + int rc = 0; + + rc = __init_resources(core); + if (rc) { + d_vpr_e("Failed to init resources: %d\n", rc); + goto fail_init_res; + } + + rc = __venus_power_on(core); + if (rc) { + d_vpr_e("%s: power on failed\n", __func__); + goto fail_venus_power_on; + } + + if (!core->dt->fw_cookie) { + core->dt->fw_cookie = subsystem_get_with_fwname("venus", + core->dt->fw_name); + if (IS_ERR_OR_NULL(core->dt->fw_cookie)) { + d_vpr_e("%s: firmware download failed\n", __func__); + core->dt->fw_cookie = NULL; + rc = -ENOMEM; + goto fail_load_fw; + } + } + + rc = __protect_cp_mem(core); + if (rc) { + d_vpr_e("%s: protect memory failed\n", __func__); + goto fail_protect_mem; + } + /* + * Hand off control of regulators to h/w _after_ loading fw. + * Note that the GDSC will turn off when switching from normal + * (s/w triggered) to fast (HW triggered) unless the h/w vote is + * present. + */ + if (__enable_hw_power_collapse(core)) + d_vpr_e("%s: hardware power collapse unsuccessful\n", __func__); + + return rc; +fail_protect_mem: + if (core->dt->fw_cookie) + subsystem_put(core->dt->fw_cookie); + core->dt->fw_cookie = NULL; +fail_load_fw: + call_venus_op(core, power_off, core); +fail_venus_power_on: + __deinit_resources(core); +fail_init_res: + return rc; +} + +static void __unload_fw(struct msm_vidc_core *core) +{ + if (!core->dt->fw_cookie) + return; + + cancel_delayed_work(&core->pm_work); + if (core->state != MSM_VIDC_CORE_DEINIT) + flush_workqueue(core->pm_workq); + + subsystem_put(core->dt->fw_cookie); + __interface_queues_release(core); + call_venus_op(core, power_off, core); + core->dt->fw_cookie = NULL; + __deinit_resources(core); + + d_vpr_h("Firmware unloaded successfully\n"); +} + +void venus_hfi_work_handler(struct work_struct *work) +{ + struct msm_vidc_core *core; + + core = container_of(work, struct msm_vidc_core, device_work); + if (!core) { + d_vpr_e("%s: invalid params\n", __func__); + return; + } + d_vpr_e("%s(): core %pK\n", __func__, core); +} + +void venus_hfi_pm_work_handler(struct work_struct *work) +{ + int rc = 0; + struct msm_vidc_core *core; + + core = container_of(work, struct msm_vidc_core, device_work); + if (!core) { + d_vpr_e("%s: invalid params\n", __func__); + return; + } + d_vpr_e("%s(): core %pK\n", __func__, core); + + /* + * It is ok to check this variable outside the lock since + * it is being updated in this context only + */ + if (core->skip_pc_count >= VIDC_MAX_PC_SKIP_COUNT) { + d_vpr_e("Failed to PC for %d times\n", + core->skip_pc_count); + core->skip_pc_count = 0; + //__process_fatal_error(core); + return; + } + + mutex_lock(&core->lock); + rc = __power_collapse(core, false); + switch (rc) { + case 0: + core->skip_pc_count = 0; + /* Cancel pending delayed works if any */ + __cancel_power_collapse_work(core); + d_vpr_h("%s: power collapse successful!\n", __func__); + break; + case -EBUSY: + core->skip_pc_count = 0; + d_vpr_h("%s: retry PC as dsp is busy\n", __func__); + __schedule_power_collapse_work(core); + break; + case -EAGAIN: + core->skip_pc_count++; + d_vpr_e("%s: retry power collapse (count %d)\n", + __func__, core->skip_pc_count); + __schedule_power_collapse_work(core); + break; + default: + d_vpr_e("%s: power collapse failed\n", __func__); + break; + } + mutex_unlock(&core->lock); +} + +int venus_hfi_core_init(struct msm_vidc_core *core) +{ + int rc = 0; + + d_vpr_h("%s(): core %p\n", __func__, core); + + if (!core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + core->packet_size = 4096; + core->packet = kzalloc(core->packet_size, GFP_KERNEL); + if (!core->packet) { + d_vpr_e("%s(): core packet allocation failed\n", __func__); + return -ENOMEM; + } + + rc = __load_fw(core); + if (rc) + return rc; + + rc = __interface_queues_init(core); + if (rc) + goto error; + + rc = call_venus_op(core, boot_firmware, core); + if (rc) + goto error; + + rc = hfi_packet_sys_init(core, core->packet, core->packet_size); + if (rc) + goto error; + + rc = __iface_cmdq_write(core, core->packet); + if (rc) + goto error; + + rc = hfi_packet_image_version(core, core->packet, core->packet_size); + if (rc) + goto error; + + rc = __iface_cmdq_write(core, core->packet); + if (rc) + goto error; + + __sys_set_debug(core, (msm_vidc_debug & FW_LOGMASK) >> FW_LOGSHIFT); + __enable_subcaches(core); + __set_subcaches(core); + + d_vpr_h("%s(): successful\n", __func__); + return 0; + +error: + d_vpr_h("%s(): failed\n", __func__); + __unload_fw(core); + kfree(core->packet); + return rc; +} + +int venus_hfi_core_release(struct msm_vidc_core *core) +{ + d_vpr_h("%s(): core %p\n", __func__, core); + + return 0; +} + +int venus_hfi_suspend(struct msm_vidc_core *core) +{ + int rc = 0; + + if (!core) { + d_vpr_e("%s: invalid device\n", __func__); + return -EINVAL; + } + + d_vpr_h("Suspending Venus\n"); + rc = __power_collapse(core, true); + if (!rc) { + /* Cancel pending delayed works if any */ + __cancel_power_collapse_work(core); + } else { + d_vpr_e("%s: Venus is busy\n", __func__); + rc = -EBUSY; + } + + return rc; +} + +int venus_hfi_session_open(struct msm_vidc_core *core, struct msm_vidc_inst *inst) +{ + int rc = 0; + + d_vpr_h("%s(): inst %p, core %p\n", + __func__, inst, core); + + return rc; +} + diff --git a/include/uapi/vidc/media/msm_media_info.h b/include/uapi/vidc/media/msm_media_info.h new file mode 100644 index 0000000000..b61d7159da --- /dev/null +++ b/include/uapi/vidc/media/msm_media_info.h @@ -0,0 +1,1355 @@ +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ +/* + * Copyright (c) 2020, The Linux Foundation. All rights reserved. + */ + +#ifndef __MSM_MEDIA_INFO_H__ +#define __MSM_MEDIA_INFO_H__ + +/* Width and Height should be multiple of 16 */ +#define INTERLACE_WIDTH_MAX 1920 +#define INTERLACE_HEIGHT_MAX 1920 +#define INTERLACE_MB_PER_FRAME_MAX ((1920*1088)/256) + +#ifndef MSM_MEDIA_ALIGN +#define MSM_MEDIA_ALIGN(__sz, __align) (((__align) & ((__align) - 1)) ?\ + ((((__sz) + (__align) - 1) / (__align)) * (__align)) :\ + (((__sz) + (__align) - 1) & (~((__align) - 1)))) +#endif + +#ifndef MSM_MEDIA_ROUNDUP +#define MSM_MEDIA_ROUNDUP(__sz, __r) (((__sz) + ((__r) - 1)) / (__r)) +#endif + +enum color_fmts { + /* Venus NV12: + * YUV 4:2:0 image with a plane of 8 bit Y samples followed + * by an interleaved U/V plane containing 8 bit 2x2 subsampled + * colour difference samples. + * + * <-------- Y/UV_Stride --------> + * <------- Width -------> + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . ^ ^ + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . | | + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . Height | + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . | Y_Scanlines + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . | | + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . | | + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . | | + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . V | + * . . . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . . . V + * U V U V U V U V U V U V . . . . ^ + * U V U V U V U V U V U V . . . . | + * U V U V U V U V U V U V . . . . | + * U V U V U V U V U V U V . . . . UV_Scanlines + * . . . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . . . V + * . . . . . . . . . . . . . . . . --> Buffer size alignment + * + * Y_Stride : Width aligned to 512 + * UV_Stride : Width aligned to 512 + * Y_Scanlines: Height aligned to 512 + * UV_Scanlines: Height/2 aligned to 256 + * Total size = align(Y_Stride * Y_Scanlines + * + UV_Stride * UV_Scanlines, 4096) + */ + COLOR_FMT_NV12, + /* Venus NV21: + * YUV 4:2:0 image with a plane of 8 bit Y samples followed + * by an interleaved V/U plane containing 8 bit 2x2 subsampled + * colour difference samples. + * + * <-------- Y/UV_Stride --------> + * <------- Width -------> + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . ^ ^ + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . | | + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . Height | + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . | Y_Scanlines + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . | | + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . | | + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . | | + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . V | + * . . . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . . . V + * V U V U V U V U V U V U . . . . ^ + * V U V U V U V U V U V U . . . . | + * V U V U V U V U V U V U . . . . | + * V U V U V U V U V U V U . . . . UV_Scanlines + * . . . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . . . V + * . . . . . . . . . . . . . . . . --> Padding & Buffer size alignment + * + * Y_Stride : Width aligned to 512 + * UV_Stride : Width aligned to 512 + * Y_Scanlines: Height aligned to 512 + * UV_Scanlines: Height/2 aligned to 256 + * Total size = align(Y_Stride * Y_Scanlines + * + UV_Stride * UV_Scanlines, 4096) + */ + COLOR_FMT_NV21, + /* + * The buffer can be of 2 types: + * (1) Venus NV12 UBWC Progressive + * (2) Venus NV12 UBWC Interlaced + * + * (1) Venus NV12 UBWC Progressive Buffer Format: + * Compressed Macro-tile format for NV12. + * Contains 4 planes in the following order - + * (A) Y_Meta_Plane + * (B) Y_UBWC_Plane + * (C) UV_Meta_Plane + * (D) UV_UBWC_Plane + * + * Y_Meta_Plane consists of meta information to decode compressed + * tile data in Y_UBWC_Plane. + * Y_UBWC_Plane consists of Y data in compressed macro-tile format. + * UBWC decoder block will use the Y_Meta_Plane data together with + * Y_UBWC_Plane data to produce loss-less uncompressed 8 bit Y samples. + * + * UV_Meta_Plane consists of meta information to decode compressed + * tile data in UV_UBWC_Plane. + * UV_UBWC_Plane consists of UV data in compressed macro-tile format. + * UBWC decoder block will use UV_Meta_Plane data together with + * UV_UBWC_Plane data to produce loss-less uncompressed 8 bit 2x2 + * subsampled color difference samples. + * + * Each tile in Y_UBWC_Plane/UV_UBWC_Plane is independently decodable + * and randomly accessible. There is no dependency between tiles. + * + * <----- Y_Meta_Stride ----> + * <-------- Width ------> + * M M M M M M M M M M M M . . ^ ^ + * M M M M M M M M M M M M . . | | + * M M M M M M M M M M M M . . Height | + * M M M M M M M M M M M M . . | Meta_Y_Scanlines + * M M M M M M M M M M M M . . | | + * M M M M M M M M M M M M . . | | + * M M M M M M M M M M M M . . | | + * M M M M M M M M M M M M . . V | + * . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . -------> Buffer size aligned to 4k + * . . . . . . . . . . . . . . V + * <--Compressed tile Y Stride---> + * <------- Width -------> + * Y* Y* Y* Y* Y* Y* Y* Y* . . . . ^ ^ + * Y* Y* Y* Y* Y* Y* Y* Y* . . . . | | + * Y* Y* Y* Y* Y* Y* Y* Y* . . . . Height | + * Y* Y* Y* Y* Y* Y* Y* Y* . . . . | Macro_tile_Y_Scanlines + * Y* Y* Y* Y* Y* Y* Y* Y* . . . . | | + * Y* Y* Y* Y* Y* Y* Y* Y* . . . . | | + * Y* Y* Y* Y* Y* Y* Y* Y* . . . . | | + * Y* Y* Y* Y* Y* Y* Y* Y* . . . . V | + * . . . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . . . -------> Buffer size aligned to 4k + * . . . . . . . . . . . . . . . . V + * <----- UV_Meta_Stride ----> + * M M M M M M M M M M M M . . ^ + * M M M M M M M M M M M M . . | + * M M M M M M M M M M M M . . | + * M M M M M M M M M M M M . . M_UV_Scanlines + * . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . V + * . . . . . . . . . . . . . . -------> Buffer size aligned to 4k + * <--Compressed tile UV Stride---> + * U* V* U* V* U* V* U* V* . . . . ^ + * U* V* U* V* U* V* U* V* . . . . | + * U* V* U* V* U* V* U* V* . . . . | + * U* V* U* V* U* V* U* V* . . . . UV_Scanlines + * . . . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . . . V + * . . . . . . . . . . . . . . . . -------> Buffer size aligned to 4k + * + * Y_Stride = align(Width, 128) + * UV_Stride = align(Width, 128) + * Y_Scanlines = align(Height, 32) + * UV_Scanlines = align(Height/2, 32) + * Y_UBWC_Plane_size = align(Y_Stride * Y_Scanlines, 4096) + * UV_UBWC_Plane_size = align(UV_Stride * UV_Scanlines, 4096) + * Y_Meta_Stride = align(roundup(Width, Y_TileWidth), 64) + * Y_Meta_Scanlines = align(roundup(Height, Y_TileHeight), 16) + * Y_Meta_Plane_size = align(Y_Meta_Stride * Y_Meta_Scanlines, 4096) + * UV_Meta_Stride = align(roundup(Width, UV_TileWidth), 64) + * UV_Meta_Scanlines = align(roundup(Height, UV_TileHeight), 16) + * UV_Meta_Plane_size = align(UV_Meta_Stride * UV_Meta_Scanlines, 4096) + * + * Total size = align( Y_UBWC_Plane_size + UV_UBWC_Plane_size + + * Y_Meta_Plane_size + UV_Meta_Plane_size, 4096) + * + * + * (2) Venus NV12 UBWC Interlaced Buffer Format: + * Compressed Macro-tile format for NV12 interlaced. + * Contains 8 planes in the following order - + * (A) Y_Meta_Top_Field_Plane + * (B) Y_UBWC_Top_Field_Plane + * (C) UV_Meta_Top_Field_Plane + * (D) UV_UBWC_Top_Field_Plane + * (E) Y_Meta_Bottom_Field_Plane + * (F) Y_UBWC_Bottom_Field_Plane + * (G) UV_Meta_Bottom_Field_Plane + * (H) UV_UBWC_Bottom_Field_Plane + * Y_Meta_Top_Field_Plane consists of meta information to decode + * compressed tile data for Y_UBWC_Top_Field_Plane. + * Y_UBWC_Top_Field_Plane consists of Y data in compressed macro-tile + * format for top field of an interlaced frame. + * UBWC decoder block will use the Y_Meta_Top_Field_Plane data together + * with Y_UBWC_Top_Field_Plane data to produce loss-less uncompressed + * 8 bit Y samples for top field of an interlaced frame. + * + * UV_Meta_Top_Field_Plane consists of meta information to decode + * compressed tile data in UV_UBWC_Top_Field_Plane. + * UV_UBWC_Top_Field_Plane consists of UV data in compressed macro-tile + * format for top field of an interlaced frame. + * UBWC decoder block will use UV_Meta_Top_Field_Plane data together + * with UV_UBWC_Top_Field_Plane data to produce loss-less uncompressed + * 8 bit subsampled color difference samples for top field of an + * interlaced frame. + * + * Each tile in Y_UBWC_Top_Field_Plane/UV_UBWC_Top_Field_Plane is + * independently decodable and randomly accessible. There is no + * dependency between tiles. + * + * Y_Meta_Bottom_Field_Plane consists of meta information to decode + * compressed tile data for Y_UBWC_Bottom_Field_Plane. + * Y_UBWC_Bottom_Field_Plane consists of Y data in compressed macro-tile + * format for bottom field of an interlaced frame. + * UBWC decoder block will use the Y_Meta_Bottom_Field_Plane data + * together with Y_UBWC_Bottom_Field_Plane data to produce loss-less + * uncompressed 8 bit Y samples for bottom field of an interlaced frame. + * + * UV_Meta_Bottom_Field_Plane consists of meta information to decode + * compressed tile data in UV_UBWC_Bottom_Field_Plane. + * UV_UBWC_Bottom_Field_Plane consists of UV data in compressed + * macro-tile format for bottom field of an interlaced frame. + * UBWC decoder block will use UV_Meta_Bottom_Field_Plane data together + * with UV_UBWC_Bottom_Field_Plane data to produce loss-less + * uncompressed 8 bit subsampled color difference samples for bottom + * field of an interlaced frame. + * + * Each tile in Y_UBWC_Bottom_Field_Plane/UV_UBWC_Bottom_Field_Plane is + * independently decodable and randomly accessible. There is no + * dependency between tiles. + * + * <-----Y_TF_Meta_Stride----> + * <-------- Width ------> + * M M M M M M M M M M M M . . ^ ^ + * M M M M M M M M M M M M . . | | + * M M M M M M M M M M M M . . Half_height | + * M M M M M M M M M M M M . . | Meta_Y_TF_Scanlines + * M M M M M M M M M M M M . . | | + * M M M M M M M M M M M M . . | | + * M M M M M M M M M M M M . . | | + * M M M M M M M M M M M M . . V | + * . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . -------> Buffer size aligned to 4k + * . . . . . . . . . . . . . . V + * <-Compressed tile Y_TF Stride-> + * <------- Width -------> + * Y* Y* Y* Y* Y* Y* Y* Y* . . . . ^ ^ + * Y* Y* Y* Y* Y* Y* Y* Y* . . . . | | + * Y* Y* Y* Y* Y* Y* Y* Y* . . . . Half_height | + * Y* Y* Y* Y* Y* Y* Y* Y* . . . . | Macro_tile_Y_TF_Scanlines + * Y* Y* Y* Y* Y* Y* Y* Y* . . . . | | + * Y* Y* Y* Y* Y* Y* Y* Y* . . . . | | + * Y* Y* Y* Y* Y* Y* Y* Y* . . . . | | + * Y* Y* Y* Y* Y* Y* Y* Y* . . . . V | + * . . . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . . . -------> Buffer size aligned to 4k + * . . . . . . . . . . . . . . . . V + * <----UV_TF_Meta_Stride----> + * M M M M M M M M M M M M . . ^ + * M M M M M M M M M M M M . . | + * M M M M M M M M M M M M . . | + * M M M M M M M M M M M M . . M_UV_TF_Scanlines + * . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . V + * . . . . . . . . . . . . . . -------> Buffer size aligned to 4k + * <-Compressed tile UV_TF Stride-> + * U* V* U* V* U* V* U* V* . . . . ^ + * U* V* U* V* U* V* U* V* . . . . | + * U* V* U* V* U* V* U* V* . . . . | + * U* V* U* V* U* V* U* V* . . . . UV_TF_Scanlines + * . . . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . . . V + * . . . . . . . . . . . . . . . . -------> Buffer size aligned to 4k + * <-----Y_BF_Meta_Stride----> + * <-------- Width ------> + * M M M M M M M M M M M M . . ^ ^ + * M M M M M M M M M M M M . . | | + * M M M M M M M M M M M M . . Half_height | + * M M M M M M M M M M M M . . | Meta_Y_BF_Scanlines + * M M M M M M M M M M M M . . | | + * M M M M M M M M M M M M . . | | + * M M M M M M M M M M M M . . | | + * M M M M M M M M M M M M . . V | + * . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . -------> Buffer size aligned to 4k + * . . . . . . . . . . . . . . V + * <-Compressed tile Y_BF Stride-> + * <------- Width -------> + * Y* Y* Y* Y* Y* Y* Y* Y* . . . . ^ ^ + * Y* Y* Y* Y* Y* Y* Y* Y* . . . . | | + * Y* Y* Y* Y* Y* Y* Y* Y* . . . . Half_height | + * Y* Y* Y* Y* Y* Y* Y* Y* . . . . | Macro_tile_Y_BF_Scanlines + * Y* Y* Y* Y* Y* Y* Y* Y* . . . . | | + * Y* Y* Y* Y* Y* Y* Y* Y* . . . . | | + * Y* Y* Y* Y* Y* Y* Y* Y* . . . . | | + * Y* Y* Y* Y* Y* Y* Y* Y* . . . . V | + * . . . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . . . -------> Buffer size aligned to 4k + * . . . . . . . . . . . . . . . . V + * <----UV_BF_Meta_Stride----> + * M M M M M M M M M M M M . . ^ + * M M M M M M M M M M M M . . | + * M M M M M M M M M M M M . . | + * M M M M M M M M M M M M . . M_UV_BF_Scanlines + * . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . V + * . . . . . . . . . . . . . . -------> Buffer size aligned to 4k + * <-Compressed tile UV_BF Stride-> + * U* V* U* V* U* V* U* V* . . . . ^ + * U* V* U* V* U* V* U* V* . . . . | + * U* V* U* V* U* V* U* V* . . . . | + * U* V* U* V* U* V* U* V* . . . . UV_BF_Scanlines + * . . . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . . . V + * . . . . . . . . . . . . . . . . -------> Buffer size aligned to 4k + * + * Half_height = (Height+1)>>1 + * Y_TF_Stride = align(Width, 128) + * UV_TF_Stride = align(Width, 128) + * Y_TF_Scanlines = align(Half_height, 32) + * UV_TF_Scanlines = align((Half_height+1)/2, 32) + * Y_UBWC_TF_Plane_size = align(Y_TF_Stride * Y_TF_Scanlines, 4096) + * UV_UBWC_TF_Plane_size = align(UV_TF_Stride * UV_TF_Scanlines, 4096) + * Y_TF_Meta_Stride = align(roundup(Width, Y_TileWidth), 64) + * Y_TF_Meta_Scanlines = align(roundup(Half_height, Y_TileHeight), 16) + * Y_TF_Meta_Plane_size = + * align(Y_TF_Meta_Stride * Y_TF_Meta_Scanlines, 4096) + * UV_TF_Meta_Stride = align(roundup(Width, UV_TileWidth), 64) + * UV_TF_Meta_Scanlines = align(roundup(Half_height, UV_TileHeight), 16) + * UV_TF_Meta_Plane_size = + * align(UV_TF_Meta_Stride * UV_TF_Meta_Scanlines, 4096) + * Y_BF_Stride = align(Width, 128) + * UV_BF_Stride = align(Width, 128) + * Y_BF_Scanlines = align(Half_height, 32) + * UV_BF_Scanlines = align((Half_height+1)/2, 32) + * Y_UBWC_BF_Plane_size = align(Y_BF_Stride * Y_BF_Scanlines, 4096) + * UV_UBWC_BF_Plane_size = align(UV_BF_Stride * UV_BF_Scanlines, 4096) + * Y_BF_Meta_Stride = align(roundup(Width, Y_TileWidth), 64) + * Y_BF_Meta_Scanlines = align(roundup(Half_height, Y_TileHeight), 16) + * Y_BF_Meta_Plane_size = + * align(Y_BF_Meta_Stride * Y_BF_Meta_Scanlines, 4096) + * UV_BF_Meta_Stride = align(roundup(Width, UV_TileWidth), 64) + * UV_BF_Meta_Scanlines = align(roundup(Half_height, UV_TileHeight), 16) + * UV_BF_Meta_Plane_size = + * align(UV_BF_Meta_Stride * UV_BF_Meta_Scanlines, 4096) + * + * Total size = align( Y_UBWC_TF_Plane_size + UV_UBWC_TF_Plane_size + + * Y_TF_Meta_Plane_size + UV_TF_Meta_Plane_size + + * Y_UBWC_BF_Plane_size + UV_UBWC_BF_Plane_size + + * Y_BF_Meta_Plane_size + UV_BF_Meta_Plane_size +, 4096) + */ + COLOR_FMT_NV12_UBWC, + /* Venus NV12 10-bit UBWC: + * Compressed Macro-tile format for NV12. + * Contains 4 planes in the following order - + * (A) Y_Meta_Plane + * (B) Y_UBWC_Plane + * (C) UV_Meta_Plane + * (D) UV_UBWC_Plane + * + * Y_Meta_Plane consists of meta information to decode compressed + * tile data in Y_UBWC_Plane. + * Y_UBWC_Plane consists of Y data in compressed macro-tile format. + * UBWC decoder block will use the Y_Meta_Plane data together with + * Y_UBWC_Plane data to produce loss-less uncompressed 10 bit Y samples. + * + * UV_Meta_Plane consists of meta information to decode compressed + * tile data in UV_UBWC_Plane. + * UV_UBWC_Plane consists of UV data in compressed macro-tile format. + * UBWC decoder block will use UV_Meta_Plane data together with + * UV_UBWC_Plane data to produce loss-less uncompressed 10 bit 2x2 + * subsampled color difference samples. + * + * Each tile in Y_UBWC_Plane/UV_UBWC_Plane is independently decodable + * and randomly accessible. There is no dependency between tiles. + * + * <----- Y_Meta_Stride -----> + * <-------- Width ------> + * M M M M M M M M M M M M . . ^ ^ + * M M M M M M M M M M M M . . | | + * M M M M M M M M M M M M . . Height | + * M M M M M M M M M M M M . . | Meta_Y_Scanlines + * M M M M M M M M M M M M . . | | + * M M M M M M M M M M M M . . | | + * M M M M M M M M M M M M . . | | + * M M M M M M M M M M M M . . V | + * . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . -------> Buffer size aligned to 4k + * . . . . . . . . . . . . . . V + * <--Compressed tile Y Stride---> + * <------- Width -------> + * Y* Y* Y* Y* Y* Y* Y* Y* . . . . ^ ^ + * Y* Y* Y* Y* Y* Y* Y* Y* . . . . | | + * Y* Y* Y* Y* Y* Y* Y* Y* . . . . Height | + * Y* Y* Y* Y* Y* Y* Y* Y* . . . . | Macro_tile_Y_Scanlines + * Y* Y* Y* Y* Y* Y* Y* Y* . . . . | | + * Y* Y* Y* Y* Y* Y* Y* Y* . . . . | | + * Y* Y* Y* Y* Y* Y* Y* Y* . . . . | | + * Y* Y* Y* Y* Y* Y* Y* Y* . . . . V | + * . . . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . . . -------> Buffer size aligned to 4k + * . . . . . . . . . . . . . . . . V + * <----- UV_Meta_Stride ----> + * M M M M M M M M M M M M . . ^ + * M M M M M M M M M M M M . . | + * M M M M M M M M M M M M . . | + * M M M M M M M M M M M M . . M_UV_Scanlines + * . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . V + * . . . . . . . . . . . . . . -------> Buffer size aligned to 4k + * <--Compressed tile UV Stride---> + * U* V* U* V* U* V* U* V* . . . . ^ + * U* V* U* V* U* V* U* V* . . . . | + * U* V* U* V* U* V* U* V* . . . . | + * U* V* U* V* U* V* U* V* . . . . UV_Scanlines + * . . . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . . . V + * . . . . . . . . . . . . . . . . -------> Buffer size aligned to 4k + * + * + * Y_Stride = align(Width * 4/3, 256) + * UV_Stride = align(Width * 4/3, 256) + * Y_Scanlines = align(Height, 32) + * UV_Scanlines = align(Height/2, 16) + * Y_UBWC_Plane_Size = align(Y_Stride * Y_Scanlines, 4096) + * UV_UBWC_Plane_Size = align(UV_Stride * UV_Scanlines, 4096) + * Y_Meta_Stride = align(roundup(Width, Y_TileWidth), 64) + * Y_Meta_Scanlines = align(roundup(Height, Y_TileHeight), 16) + * Y_Meta_Plane_size = align(Y_Meta_Stride * Y_Meta_Scanlines, 4096) + * UV_Meta_Stride = align(roundup(Width, UV_TileWidth), 64) + * UV_Meta_Scanlines = align(roundup(Height, UV_TileHeight), 16) + * UV_Meta_Plane_size = align(UV_Meta_Stride * UV_Meta_Scanlines, 4096) + * + * Total size = align(Y_UBWC_Plane_size + UV_UBWC_Plane_size + + * Y_Meta_Plane_size + UV_Meta_Plane_size, 4096) + */ + COLOR_FMT_NV12_BPP10_UBWC, + /* Venus RGBA8888 format: + * Contains 1 plane in the following order - + * (A) RGBA plane + * + * <-------- RGB_Stride --------> + * <------- Width -------> + * R R R R R R R R R R R R . . . . ^ ^ + * R R R R R R R R R R R R . . . . | | + * R R R R R R R R R R R R . . . . Height | + * R R R R R R R R R R R R . . . . | RGB_Scanlines + * R R R R R R R R R R R R . . . . | | + * R R R R R R R R R R R R . . . . | | + * R R R R R R R R R R R R . . . . | | + * R R R R R R R R R R R R . . . . V | + * . . . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . . . V + * + * RGB_Stride = align(Width * 4, 128) + * RGB_Scanlines = align(Height, 32) + * RGB_Plane_size = align(RGB_Stride * RGB_Scanlines, 4096) + * + * Total size = align(RGB_Plane_size , 4096) + */ + COLOR_FMT_RGBA8888, + /* Venus RGBA8888 UBWC format: + * Contains 2 planes in the following order - + * (A) Meta plane + * (B) RGBA plane + * + * <--- RGB_Meta_Stride ----> + * <-------- Width ------> + * M M M M M M M M M M M M . . ^ ^ + * M M M M M M M M M M M M . . | | + * M M M M M M M M M M M M . . Height | + * M M M M M M M M M M M M . . | Meta_RGB_Scanlines + * M M M M M M M M M M M M . . | | + * M M M M M M M M M M M M . . | | + * M M M M M M M M M M M M . . | | + * M M M M M M M M M M M M . . V | + * . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . -------> Buffer size aligned to 4k + * . . . . . . . . . . . . . . V + * <-------- RGB_Stride --------> + * <------- Width -------> + * R R R R R R R R R R R R . . . . ^ ^ + * R R R R R R R R R R R R . . . . | | + * R R R R R R R R R R R R . . . . Height | + * R R R R R R R R R R R R . . . . | RGB_Scanlines + * R R R R R R R R R R R R . . . . | | + * R R R R R R R R R R R R . . . . | | + * R R R R R R R R R R R R . . . . | | + * R R R R R R R R R R R R . . . . V | + * . . . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . . . -------> Buffer size aligned to 4k + * . . . . . . . . . . . . . . . . V + * + * RGB_Stride = align(Width * 4, 256) + * RGB_Scanlines = align(Height, 16) + * RGB_Plane_size = align(RGB_Stride * RGB_Scanlines, 4096) + * RGB_Meta_Stride = align(roundup(Width, RGB_TileWidth), 64) + * RGB_Meta_Scanline = align(roundup(Height, RGB_TileHeight), 16) + * RGB_Meta_Plane_size = align(RGB_Meta_Stride * + * RGB_Meta_Scanlines, 4096) + * + * Total size = align(RGB_Meta_Plane_size + RGB_Plane_size, 4096) + */ + COLOR_FMT_RGBA8888_UBWC, + /* Venus RGBA1010102 UBWC format: + * Contains 2 planes in the following order - + * (A) Meta plane + * (B) RGBA plane + * + * <--- RGB_Meta_Stride ----> + * <-------- Width ------> + * M M M M M M M M M M M M . . ^ ^ + * M M M M M M M M M M M M . . | | + * M M M M M M M M M M M M . . Height | + * M M M M M M M M M M M M . . | Meta_RGB_Scanlines + * M M M M M M M M M M M M . . | | + * M M M M M M M M M M M M . . | | + * M M M M M M M M M M M M . . | | + * M M M M M M M M M M M M . . V | + * . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . -------> Buffer size aligned to 4k + * . . . . . . . . . . . . . . V + * <-------- RGB_Stride --------> + * <------- Width -------> + * R R R R R R R R R R R R . . . . ^ ^ + * R R R R R R R R R R R R . . . . | | + * R R R R R R R R R R R R . . . . Height | + * R R R R R R R R R R R R . . . . | RGB_Scanlines + * R R R R R R R R R R R R . . . . | | + * R R R R R R R R R R R R . . . . | | + * R R R R R R R R R R R R . . . . | | + * R R R R R R R R R R R R . . . . V | + * . . . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . . . -------> Buffer size aligned to 4k + * . . . . . . . . . . . . . . . . V + * + * RGB_Stride = align(Width * 4, 256) + * RGB_Scanlines = align(Height, 16) + * RGB_Plane_size = align(RGB_Stride * RGB_Scanlines, 4096) + * RGB_Meta_Stride = align(roundup(Width, RGB_TileWidth), 64) + * RGB_Meta_Scanline = align(roundup(Height, RGB_TileHeight), 16) + * RGB_Meta_Plane_size = align(RGB_Meta_Stride * + * RGB_Meta_Scanlines, 4096) + * + * Total size = align(RGB_Meta_Plane_size + RGB_Plane_size, 4096) + */ + COLOR_FMT_RGBA1010102_UBWC, + /* Venus RGB565 UBWC format: + * Contains 2 planes in the following order - + * (A) Meta plane + * (B) RGB plane + * + * <--- RGB_Meta_Stride ----> + * <-------- Width ------> + * M M M M M M M M M M M M . . ^ ^ + * M M M M M M M M M M M M . . | | + * M M M M M M M M M M M M . . Height | + * M M M M M M M M M M M M . . | Meta_RGB_Scanlines + * M M M M M M M M M M M M . . | | + * M M M M M M M M M M M M . . | | + * M M M M M M M M M M M M . . | | + * M M M M M M M M M M M M . . V | + * . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . -------> Buffer size aligned to 4k + * . . . . . . . . . . . . . . V + * <-------- RGB_Stride --------> + * <------- Width -------> + * R R R R R R R R R R R R . . . . ^ ^ + * R R R R R R R R R R R R . . . . | | + * R R R R R R R R R R R R . . . . Height | + * R R R R R R R R R R R R . . . . | RGB_Scanlines + * R R R R R R R R R R R R . . . . | | + * R R R R R R R R R R R R . . . . | | + * R R R R R R R R R R R R . . . . | | + * R R R R R R R R R R R R . . . . V | + * . . . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . . . -------> Buffer size aligned to 4k + * . . . . . . . . . . . . . . . . V + * + * RGB_Stride = align(Width * 2, 256) + * RGB_Scanlines = align(Height, 16) + * RGB_Plane_size = align(RGB_Stride * RGB_Scanlines, 4096) + * RGB_Meta_Stride = align(roundup(Width, RGB_TileWidth), 64) + * RGB_Meta_Scanline = align(roundup(Height, RGB_TileHeight), 16) + * RGB_Meta_Plane_size = align(RGB_Meta_Stride * + * RGB_Meta_Scanlines, 4096) + * + * Total size = align(RGB_Meta_Plane_size + RGB_Plane_size, 4096) + */ + COLOR_FMT_RGB565_UBWC, + /* P010 UBWC: + * Compressed Macro-tile format for NV12. + * Contains 4 planes in the following order - + * (A) Y_Meta_Plane + * (B) Y_UBWC_Plane + * (C) UV_Meta_Plane + * (D) UV_UBWC_Plane + * + * Y_Meta_Plane consists of meta information to decode compressed + * tile data in Y_UBWC_Plane. + * Y_UBWC_Plane consists of Y data in compressed macro-tile format. + * UBWC decoder block will use the Y_Meta_Plane data together with + * Y_UBWC_Plane data to produce loss-less uncompressed 10 bit Y samples. + * + * UV_Meta_Plane consists of meta information to decode compressed + * tile data in UV_UBWC_Plane. + * UV_UBWC_Plane consists of UV data in compressed macro-tile format. + * UBWC decoder block will use UV_Meta_Plane data together with + * UV_UBWC_Plane data to produce loss-less uncompressed 10 bit 2x2 + * subsampled color difference samples. + * + * Each tile in Y_UBWC_Plane/UV_UBWC_Plane is independently decodable + * and randomly accessible. There is no dependency between tiles. + * + * <----- Y_Meta_Stride -----> + * <-------- Width ------> + * M M M M M M M M M M M M . . ^ ^ + * M M M M M M M M M M M M . . | | + * M M M M M M M M M M M M . . Height | + * M M M M M M M M M M M M . . | Meta_Y_Scanlines + * M M M M M M M M M M M M . . | | + * M M M M M M M M M M M M . . | | + * M M M M M M M M M M M M . . | | + * M M M M M M M M M M M M . . V | + * . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . -------> Buffer size aligned to 4k + * . . . . . . . . . . . . . . V + * <--Compressed tile Y Stride---> + * <------- Width -------> + * Y* Y* Y* Y* Y* Y* Y* Y* . . . . ^ ^ + * Y* Y* Y* Y* Y* Y* Y* Y* . . . . | | + * Y* Y* Y* Y* Y* Y* Y* Y* . . . . Height | + * Y* Y* Y* Y* Y* Y* Y* Y* . . . . | Macro_tile_Y_Scanlines + * Y* Y* Y* Y* Y* Y* Y* Y* . . . . | | + * Y* Y* Y* Y* Y* Y* Y* Y* . . . . | | + * Y* Y* Y* Y* Y* Y* Y* Y* . . . . | | + * Y* Y* Y* Y* Y* Y* Y* Y* . . . . V | + * . . . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . . . -------> Buffer size aligned to 4k + * . . . . . . . . . . . . . . . . V + * <----- UV_Meta_Stride ----> + * M M M M M M M M M M M M . . ^ + * M M M M M M M M M M M M . . | + * M M M M M M M M M M M M . . | + * M M M M M M M M M M M M . . M_UV_Scanlines + * . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . V + * . . . . . . . . . . . . . . -------> Buffer size aligned to 4k + * <--Compressed tile UV Stride---> + * U* V* U* V* U* V* U* V* . . . . ^ + * U* V* U* V* U* V* U* V* . . . . | + * U* V* U* V* U* V* U* V* . . . . | + * U* V* U* V* U* V* U* V* . . . . UV_Scanlines + * . . . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . . . V + * . . . . . . . . . . . . . . . . -------> Buffer size aligned to 4k + * + * + * Y_Stride = align(Width * 2, 256) + * UV_Stride = align(Width * 2, 256) + * Y_Scanlines = align(Height, 16) + * UV_Scanlines = align(Height/2, 16) + * Y_UBWC_Plane_Size = align(Y_Stride * Y_Scanlines, 4096) + * UV_UBWC_Plane_Size = align(UV_Stride * UV_Scanlines, 4096) + * Y_Meta_Stride = align(roundup(Width, Y_TileWidth), 64) + * Y_Meta_Scanlines = align(roundup(Height, Y_TileHeight), 16) + * Y_Meta_Plane_size = align(Y_Meta_Stride * Y_Meta_Scanlines, 4096) + * UV_Meta_Stride = align(roundup(Width, UV_TileWidth), 64) + * UV_Meta_Scanlines = align(roundup(Height, UV_TileHeight), 16) + * UV_Meta_Plane_size = align(UV_Meta_Stride * UV_Meta_Scanlines, 4096) + * + * Total size = align(Y_UBWC_Plane_size + UV_UBWC_Plane_size + + * Y_Meta_Plane_size + UV_Meta_Plane_size, 4096) + */ + COLOR_FMT_P010_UBWC, + /* Venus P010: + * YUV 4:2:0 image with a plane of 10 bit Y samples followed + * by an interleaved U/V plane containing 10 bit 2x2 subsampled + * colour difference samples. + * + * <-------- Y/UV_Stride --------> + * <------- Width -------> + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . ^ ^ + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . | | + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . Height | + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . | Y_Scanlines + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . | | + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . | | + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . | | + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . V | + * . . . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . . . V + * U V U V U V U V U V U V . . . . ^ + * U V U V U V U V U V U V . . . . | + * U V U V U V U V U V U V . . . . | + * U V U V U V U V U V U V . . . . UV_Scanlines + * . . . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . . . V + * . . . . . . . . . . . . . . . . --> Buffer size alignment + * + * Y_Stride : Width * 2 aligned to 256 + * UV_Stride : Width * 2 aligned to 256 + * Y_Scanlines: Height aligned to 32 + * UV_Scanlines: Height/2 aligned to 16 + * Total size = align(Y_Stride * Y_Scanlines + * + UV_Stride * UV_Scanlines, 4096) + */ + COLOR_FMT_P010, + /* Venus NV12_512: + * YUV 4:2:0 image with a plane of 8 bit Y samples followed + * by an interleaved U/V plane containing 8 bit 2x2 subsampled + * colour difference samples. + * + * <-------- Y/UV_Stride --------> + * <------- Width -------> + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . ^ ^ + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . | | + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . Height | + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . | Y_Scanlines + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . | | + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . | | + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . | | + * Y Y Y Y Y Y Y Y Y Y Y Y . . . . V | + * . . . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . . . V + * U V U V U V U V U V U V . . . . ^ + * U V U V U V U V U V U V . . . . | + * U V U V U V U V U V U V . . . . | + * U V U V U V U V U V U V . . . . UV_Scanlines + * . . . . . . . . . . . . . . . . | + * . . . . . . . . . . . . . . . . V + * . . . . . . . . . . . . . . . . --> Buffer size alignment + * + * Y_Stride : Width aligned to 512 + * UV_Stride : Width aligned to 512 + * Y_Scanlines: Height aligned to 512 + * UV_Scanlines: Height/2 aligned to 256 + * Total size = align((Y_Stride * Y_Scanlines + * + UV_Stride * UV_Scanlines), 4096) + */ + COLOR_FMT_NV12_512, +}; + +/* + * Function arguments: + * @color_fmt + * @width + * Progressive: width + * Interlaced: width + */ +static inline unsigned int VENUS_Y_STRIDE(unsigned int color_fmt, + unsigned int width) +{ + unsigned int alignment, stride = 0; + + if (!width) + goto invalid_input; + + switch (color_fmt) { + case COLOR_FMT_NV12: + case COLOR_FMT_NV21: + case COLOR_FMT_NV12_512: + alignment = 512; + stride = MSM_MEDIA_ALIGN(width, alignment); + break; + case COLOR_FMT_NV12_UBWC: + alignment = 128; + stride = MSM_MEDIA_ALIGN(width, alignment); + break; + case COLOR_FMT_NV12_BPP10_UBWC: + alignment = 256; + stride = MSM_MEDIA_ALIGN(width, 192); + stride = MSM_MEDIA_ALIGN(stride * 4/3, alignment); + break; + case COLOR_FMT_P010_UBWC: + case COLOR_FMT_P010: + alignment = 256; + stride = MSM_MEDIA_ALIGN(width * 2, alignment); + break; + default: + break; + } +invalid_input: + return stride; +} + +/* + * Function arguments: + * @color_fmt + * @width + * Progressive: width + * Interlaced: width + */ +static inline unsigned int VENUS_UV_STRIDE(unsigned int color_fmt, + unsigned int width) +{ + unsigned int alignment, stride = 0; + + if (!width) + goto invalid_input; + + switch (color_fmt) { + case COLOR_FMT_NV21: + case COLOR_FMT_NV12: + case COLOR_FMT_NV12_512: + alignment = 512; + stride = MSM_MEDIA_ALIGN(width, alignment); + break; + case COLOR_FMT_NV12_UBWC: + alignment = 128; + stride = MSM_MEDIA_ALIGN(width, alignment); + break; + case COLOR_FMT_NV12_BPP10_UBWC: + alignment = 256; + stride = MSM_MEDIA_ALIGN(width, 192); + stride = MSM_MEDIA_ALIGN(stride * 4/3, alignment); + break; + case COLOR_FMT_P010_UBWC: + case COLOR_FMT_P010: + alignment = 256; + stride = MSM_MEDIA_ALIGN(width * 2, alignment); + break; + default: + break; + } +invalid_input: + return stride; +} + +/* + * Function arguments: + * @color_fmt + * @height + * Progressive: height + * Interlaced: (height+1)>>1 + */ +static inline unsigned int VENUS_Y_SCANLINES(unsigned int color_fmt, + unsigned int height) +{ + unsigned int alignment, sclines = 0; + + if (!height) + goto invalid_input; + + switch (color_fmt) { + case COLOR_FMT_NV12: + case COLOR_FMT_NV21: + case COLOR_FMT_NV12_512: + alignment = 512; + break; + case COLOR_FMT_NV12_UBWC: + case COLOR_FMT_P010: + alignment = 32; + break; + case COLOR_FMT_NV12_BPP10_UBWC: + case COLOR_FMT_P010_UBWC: + alignment = 16; + break; + default: + return 0; + } + sclines = MSM_MEDIA_ALIGN(height, alignment); +invalid_input: + return sclines; +} + +/* + * Function arguments: + * @color_fmt + * @height + * Progressive: height + * Interlaced: (height+1)>>1 + */ +static inline unsigned int VENUS_UV_SCANLINES(unsigned int color_fmt, + unsigned int height) +{ + unsigned int alignment, sclines = 0; + + if (!height) + goto invalid_input; + + switch (color_fmt) { + case COLOR_FMT_NV21: + case COLOR_FMT_NV12: + case COLOR_FMT_NV12_512: + alignment = 256; + break; + case COLOR_FMT_NV12_BPP10_UBWC: + case COLOR_FMT_P010_UBWC: + case COLOR_FMT_P010: + alignment = 16; + break; + case COLOR_FMT_NV12_UBWC: + alignment = 32; + break; + default: + goto invalid_input; + } + + sclines = MSM_MEDIA_ALIGN((height+1)>>1, alignment); + +invalid_input: + return sclines; +} + +/* + * Function arguments: + * @color_fmt + * @width + * Progressive: width + * Interlaced: width + */ +static inline unsigned int VENUS_Y_META_STRIDE(unsigned int color_fmt, + unsigned int width) +{ + int y_tile_width = 0, y_meta_stride = 0; + + if (!width) + goto invalid_input; + + switch (color_fmt) { + case COLOR_FMT_NV12_UBWC: + case COLOR_FMT_P010_UBWC: + y_tile_width = 32; + break; + case COLOR_FMT_NV12_BPP10_UBWC: + y_tile_width = 48; + break; + default: + goto invalid_input; + } + + y_meta_stride = MSM_MEDIA_ROUNDUP(width, y_tile_width); + y_meta_stride = MSM_MEDIA_ALIGN(y_meta_stride, 64); + +invalid_input: + return y_meta_stride; +} + +/* + * Function arguments: + * @color_fmt + * @height + * Progressive: height + * Interlaced: (height+1)>>1 + */ +static inline unsigned int VENUS_Y_META_SCANLINES(unsigned int color_fmt, + unsigned int height) +{ + int y_tile_height = 0, y_meta_scanlines = 0; + + if (!height) + goto invalid_input; + + switch (color_fmt) { + case COLOR_FMT_NV12_UBWC: + y_tile_height = 8; + break; + case COLOR_FMT_NV12_BPP10_UBWC: + case COLOR_FMT_P010_UBWC: + y_tile_height = 4; + break; + default: + goto invalid_input; + } + + y_meta_scanlines = MSM_MEDIA_ROUNDUP(height, y_tile_height); + y_meta_scanlines = MSM_MEDIA_ALIGN(y_meta_scanlines, 16); + +invalid_input: + return y_meta_scanlines; +} + +/* + * Function arguments: + * @color_fmt + * @width + * Progressive: width + * Interlaced: width + */ +static inline unsigned int VENUS_UV_META_STRIDE(unsigned int color_fmt, + unsigned int width) +{ + int uv_tile_width = 0, uv_meta_stride = 0; + + if (!width) + goto invalid_input; + + switch (color_fmt) { + case COLOR_FMT_NV12_UBWC: + case COLOR_FMT_P010_UBWC: + uv_tile_width = 16; + break; + case COLOR_FMT_NV12_BPP10_UBWC: + uv_tile_width = 24; + break; + default: + goto invalid_input; + } + + uv_meta_stride = MSM_MEDIA_ROUNDUP((width+1)>>1, uv_tile_width); + uv_meta_stride = MSM_MEDIA_ALIGN(uv_meta_stride, 64); + +invalid_input: + return uv_meta_stride; +} + +/* + * Function arguments: + * @color_fmt + * @height + * Progressive: height + * Interlaced: (height+1)>>1 + */ +static inline unsigned int VENUS_UV_META_SCANLINES(unsigned int color_fmt, + unsigned int height) +{ + int uv_tile_height = 0, uv_meta_scanlines = 0; + + if (!height) + goto invalid_input; + + switch (color_fmt) { + case COLOR_FMT_NV12_UBWC: + uv_tile_height = 8; + break; + case COLOR_FMT_NV12_BPP10_UBWC: + case COLOR_FMT_P010_UBWC: + uv_tile_height = 4; + break; + default: + goto invalid_input; + } + + uv_meta_scanlines = MSM_MEDIA_ROUNDUP((height+1)>>1, uv_tile_height); + uv_meta_scanlines = MSM_MEDIA_ALIGN(uv_meta_scanlines, 16); + +invalid_input: + return uv_meta_scanlines; +} + +static inline unsigned int VENUS_RGB_STRIDE(unsigned int color_fmt, + unsigned int width) +{ + unsigned int alignment = 0, stride = 0, bpp = 4; + + if (!width) + goto invalid_input; + + switch (color_fmt) { + case COLOR_FMT_RGBA8888: + alignment = 128; + break; + case COLOR_FMT_RGB565_UBWC: + alignment = 256; + bpp = 2; + break; + case COLOR_FMT_RGBA8888_UBWC: + case COLOR_FMT_RGBA1010102_UBWC: + alignment = 256; + break; + default: + goto invalid_input; + } + + stride = MSM_MEDIA_ALIGN(width * bpp, alignment); + +invalid_input: + return stride; +} + +static inline unsigned int VENUS_RGB_SCANLINES(unsigned int color_fmt, + unsigned int height) +{ + unsigned int alignment = 0, scanlines = 0; + + if (!height) + goto invalid_input; + + switch (color_fmt) { + case COLOR_FMT_RGBA8888: + alignment = 32; + break; + case COLOR_FMT_RGBA8888_UBWC: + case COLOR_FMT_RGBA1010102_UBWC: + case COLOR_FMT_RGB565_UBWC: + alignment = 16; + break; + default: + goto invalid_input; + } + + scanlines = MSM_MEDIA_ALIGN(height, alignment); + +invalid_input: + return scanlines; +} + +static inline unsigned int VENUS_RGB_META_STRIDE(unsigned int color_fmt, + unsigned int width) +{ + int rgb_tile_width = 0, rgb_meta_stride = 0; + + if (!width) + goto invalid_input; + + switch (color_fmt) { + case COLOR_FMT_RGBA8888_UBWC: + case COLOR_FMT_RGBA1010102_UBWC: + case COLOR_FMT_RGB565_UBWC: + rgb_tile_width = 16; + break; + default: + goto invalid_input; + } + + rgb_meta_stride = MSM_MEDIA_ROUNDUP(width, rgb_tile_width); + rgb_meta_stride = MSM_MEDIA_ALIGN(rgb_meta_stride, 64); + +invalid_input: + return rgb_meta_stride; +} + +static inline unsigned int VENUS_RGB_META_SCANLINES(unsigned int color_fmt, + unsigned int height) +{ + int rgb_tile_height = 0, rgb_meta_scanlines = 0; + + if (!height) + goto invalid_input; + + switch (color_fmt) { + case COLOR_FMT_RGBA8888_UBWC: + case COLOR_FMT_RGBA1010102_UBWC: + case COLOR_FMT_RGB565_UBWC: + rgb_tile_height = 4; + break; + default: + goto invalid_input; + } + + rgb_meta_scanlines = MSM_MEDIA_ROUNDUP(height, rgb_tile_height); + rgb_meta_scanlines = MSM_MEDIA_ALIGN(rgb_meta_scanlines, 16); + +invalid_input: + return rgb_meta_scanlines; +} + +/* + * Function arguments: + * @color_fmt + * @width + * Progressive: width + * Interlaced: width + * @height + * Progressive: height + * Interlaced: height + */ +static inline unsigned int VENUS_BUFFER_SIZE(unsigned int color_fmt, + unsigned int width, unsigned int height) +{ + unsigned int size = 0; + unsigned int y_plane, uv_plane, y_stride, + uv_stride, y_sclines, uv_sclines; + unsigned int y_ubwc_plane = 0, uv_ubwc_plane = 0; + unsigned int y_meta_stride = 0, y_meta_scanlines = 0; + unsigned int uv_meta_stride = 0, uv_meta_scanlines = 0; + unsigned int y_meta_plane = 0, uv_meta_plane = 0; + unsigned int rgb_stride = 0, rgb_scanlines = 0; + unsigned int rgb_plane = 0, rgb_ubwc_plane = 0, rgb_meta_plane = 0; + unsigned int rgb_meta_stride = 0, rgb_meta_scanlines = 0; + + if (!width || !height) + goto invalid_input; + + y_stride = VENUS_Y_STRIDE(color_fmt, width); + uv_stride = VENUS_UV_STRIDE(color_fmt, width); + y_sclines = VENUS_Y_SCANLINES(color_fmt, height); + uv_sclines = VENUS_UV_SCANLINES(color_fmt, height); + rgb_stride = VENUS_RGB_STRIDE(color_fmt, width); + rgb_scanlines = VENUS_RGB_SCANLINES(color_fmt, height); + + switch (color_fmt) { + case COLOR_FMT_NV21: + case COLOR_FMT_NV12: + case COLOR_FMT_P010: + case COLOR_FMT_NV12_512: + y_plane = y_stride * y_sclines; + uv_plane = uv_stride * uv_sclines; + size = y_plane + uv_plane; + break; + case COLOR_FMT_NV12_UBWC: + y_meta_stride = VENUS_Y_META_STRIDE(color_fmt, width); + uv_meta_stride = VENUS_UV_META_STRIDE(color_fmt, width); + if (width <= INTERLACE_WIDTH_MAX && + height <= INTERLACE_HEIGHT_MAX && + (height * width) / 256 <= INTERLACE_MB_PER_FRAME_MAX) { + y_sclines = + VENUS_Y_SCANLINES(color_fmt, (height+1)>>1); + y_ubwc_plane = + MSM_MEDIA_ALIGN(y_stride * y_sclines, 4096); + uv_sclines = + VENUS_UV_SCANLINES(color_fmt, (height+1)>>1); + uv_ubwc_plane = + MSM_MEDIA_ALIGN(uv_stride * uv_sclines, 4096); + y_meta_scanlines = + VENUS_Y_META_SCANLINES(color_fmt, (height+1)>>1); + y_meta_plane = MSM_MEDIA_ALIGN( + y_meta_stride * y_meta_scanlines, 4096); + uv_meta_scanlines = + VENUS_UV_META_SCANLINES(color_fmt, (height+1)>>1); + uv_meta_plane = MSM_MEDIA_ALIGN(uv_meta_stride * + uv_meta_scanlines, 4096); + size = (y_ubwc_plane + uv_ubwc_plane + y_meta_plane + + uv_meta_plane)*2; + } else { + y_sclines = VENUS_Y_SCANLINES(color_fmt, height); + y_ubwc_plane = + MSM_MEDIA_ALIGN(y_stride * y_sclines, 4096); + uv_sclines = VENUS_UV_SCANLINES(color_fmt, height); + uv_ubwc_plane = + MSM_MEDIA_ALIGN(uv_stride * uv_sclines, 4096); + y_meta_scanlines = + VENUS_Y_META_SCANLINES(color_fmt, height); + y_meta_plane = MSM_MEDIA_ALIGN( + y_meta_stride * y_meta_scanlines, 4096); + uv_meta_scanlines = + VENUS_UV_META_SCANLINES(color_fmt, height); + uv_meta_plane = MSM_MEDIA_ALIGN(uv_meta_stride * + uv_meta_scanlines, 4096); + size = (y_ubwc_plane + uv_ubwc_plane + y_meta_plane + + uv_meta_plane); + } + break; + case COLOR_FMT_NV12_BPP10_UBWC: + y_ubwc_plane = MSM_MEDIA_ALIGN(y_stride * y_sclines, 4096); + uv_ubwc_plane = MSM_MEDIA_ALIGN(uv_stride * uv_sclines, 4096); + y_meta_stride = VENUS_Y_META_STRIDE(color_fmt, width); + y_meta_scanlines = VENUS_Y_META_SCANLINES(color_fmt, height); + y_meta_plane = MSM_MEDIA_ALIGN( + y_meta_stride * y_meta_scanlines, 4096); + uv_meta_stride = VENUS_UV_META_STRIDE(color_fmt, width); + uv_meta_scanlines = VENUS_UV_META_SCANLINES(color_fmt, height); + uv_meta_plane = MSM_MEDIA_ALIGN(uv_meta_stride * + uv_meta_scanlines, 4096); + + size = y_ubwc_plane + uv_ubwc_plane + y_meta_plane + + uv_meta_plane; + break; + case COLOR_FMT_P010_UBWC: + y_ubwc_plane = MSM_MEDIA_ALIGN(y_stride * y_sclines, 4096); + uv_ubwc_plane = MSM_MEDIA_ALIGN(uv_stride * uv_sclines, 4096); + y_meta_stride = VENUS_Y_META_STRIDE(color_fmt, width); + y_meta_scanlines = VENUS_Y_META_SCANLINES(color_fmt, height); + y_meta_plane = MSM_MEDIA_ALIGN( + y_meta_stride * y_meta_scanlines, 4096); + uv_meta_stride = VENUS_UV_META_STRIDE(color_fmt, width); + uv_meta_scanlines = VENUS_UV_META_SCANLINES(color_fmt, height); + uv_meta_plane = MSM_MEDIA_ALIGN(uv_meta_stride * + uv_meta_scanlines, 4096); + + size = y_ubwc_plane + uv_ubwc_plane + y_meta_plane + + uv_meta_plane; + break; + case COLOR_FMT_RGBA8888: + rgb_plane = MSM_MEDIA_ALIGN(rgb_stride * rgb_scanlines, 4096); + size = rgb_plane; + break; + case COLOR_FMT_RGBA8888_UBWC: + case COLOR_FMT_RGBA1010102_UBWC: + case COLOR_FMT_RGB565_UBWC: + rgb_ubwc_plane = MSM_MEDIA_ALIGN(rgb_stride * rgb_scanlines, + 4096); + rgb_meta_stride = VENUS_RGB_META_STRIDE(color_fmt, width); + rgb_meta_scanlines = VENUS_RGB_META_SCANLINES(color_fmt, + height); + rgb_meta_plane = MSM_MEDIA_ALIGN(rgb_meta_stride * + rgb_meta_scanlines, 4096); + size = rgb_ubwc_plane + rgb_meta_plane; + break; + default: + break; + } +invalid_input: + return MSM_MEDIA_ALIGN(size, 4096); +} + +static inline unsigned int VENUS_BUFFER_SIZE_USED(unsigned int color_fmt, + unsigned int width, unsigned int height, unsigned int interlace) +{ + unsigned int size = 0; + unsigned int y_stride, uv_stride, y_sclines, uv_sclines; + unsigned int y_ubwc_plane = 0, uv_ubwc_plane = 0; + unsigned int y_meta_stride = 0, y_meta_scanlines = 0; + unsigned int uv_meta_stride = 0, uv_meta_scanlines = 0; + unsigned int y_meta_plane = 0, uv_meta_plane = 0; + + if (!width || !height) + goto invalid_input; + + if (!interlace && color_fmt == COLOR_FMT_NV12_UBWC) { + y_stride = VENUS_Y_STRIDE(color_fmt, width); + uv_stride = VENUS_UV_STRIDE(color_fmt, width); + y_sclines = VENUS_Y_SCANLINES(color_fmt, height); + y_ubwc_plane = MSM_MEDIA_ALIGN(y_stride * y_sclines, 4096); + uv_sclines = VENUS_UV_SCANLINES(color_fmt, height); + uv_ubwc_plane = MSM_MEDIA_ALIGN(uv_stride * uv_sclines, 4096); + y_meta_stride = VENUS_Y_META_STRIDE(color_fmt, width); + y_meta_scanlines = + VENUS_Y_META_SCANLINES(color_fmt, height); + y_meta_plane = MSM_MEDIA_ALIGN( + y_meta_stride * y_meta_scanlines, 4096); + uv_meta_stride = VENUS_UV_META_STRIDE(color_fmt, width); + uv_meta_scanlines = + VENUS_UV_META_SCANLINES(color_fmt, height); + uv_meta_plane = MSM_MEDIA_ALIGN(uv_meta_stride * + uv_meta_scanlines, 4096); + size = (y_ubwc_plane + uv_ubwc_plane + y_meta_plane + + uv_meta_plane); + size = MSM_MEDIA_ALIGN(size, 4096); + } else { + size = VENUS_BUFFER_SIZE(color_fmt, width, height); + } +invalid_input: + return size; +} + +#endif diff --git a/include/uapi/vidc/media/msm_vidc_utils.h b/include/uapi/vidc/media/msm_vidc_utils.h new file mode 100644 index 0000000000..2f614d314c --- /dev/null +++ b/include/uapi/vidc/media/msm_vidc_utils.h @@ -0,0 +1,32 @@ +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ +/* + * Copyright (c) 2020, The Linux Foundation. All rights reserved. + */ + +#ifndef __MSM_VIDC_UTILS_H__ +#define __MSM_VIDC_UTILS_H__ + +#include +#include + +/* vendor color format start */ +/* UBWC 8-bit Y/CbCr 4:2:0 */ +#define V4L2_PIX_FMT_NV12_UBWC v4l2_fourcc('Q', '1', '2', '8') +/* NV12_512 8-bit Y/CbCr 4:2:0 */ +#define V4L2_PIX_FMT_NV12_512 v4l2_fourcc('Q', '5', '1', '2') +/* NV12 10-bit Y/CbCr 4:2:0 */ +#define V4L2_PIX_FMT_NV12_P010_UBWC v4l2_fourcc('Q', '1', '2', 'B') +/* UBWC 10-bit Y/CbCr 4:2:0 */ +#define V4L2_PIX_FMT_NV12_TP10_UBWC v4l2_fourcc('Q', '1', '2', 'A') +#define V4L2_PIX_FMT_RGBA8888_UBWC v4l2_fourcc('Q', 'R', 'G', 'B') +/* Y/CbCr 4:2:0 P10 Venus */ +#define V4L2_PIX_FMT_SDE_Y_CBCR_H2V2_P010_VENUS v4l2_fourcc('Q', 'P', '1', '0') +#define V4L2_PIX_FMT_VIDC_META v4l2_fourcc('Q', 'M', 'E', 'T') +/* vendor color format end */ + +/* vendor controls start */ +#define V4L2_CID_MPEG_MSM_VIDC_BASE (V4L2_CTRL_CLASS_MPEG | 0x2000) + +/* vendor controls end */ + +#endif // __MSM_VIDC_UTILS_H__ From dc1d43bd644889146d8335f7ee4008255705f6ab Mon Sep 17 00:00:00 2001 From: Maheshwar Ajja Date: Fri, 7 Aug 2020 16:14:11 -0700 Subject: [PATCH 0003/1061] video: driver: add configuration support Add support for - set and get format - get min buffers - request buffers Change-Id: I0696386e10fc9571a99853070c108832873c4923 Signed-off-by: Maheshwar Ajja --- Makefile | 18 ++- driver/vidc/inc/hfi_packet.h | 5 +- driver/vidc/inc/msm_vdec.h | 2 + driver/vidc/inc/msm_vidc_driver.h | 6 + driver/vidc/inc/msm_vidc_inst.h | 2 + driver/vidc/src/hfi_packet.c | 34 ++++- driver/vidc/src/msm_vdec.c | 198 +++++++++++++++++++++++++++++- driver/vidc/src/msm_vidc.c | 79 +++++++++--- driver/vidc/src/msm_vidc_driver.c | 112 ++++++++++++++++- driver/vidc/src/msm_vidc_vb2.c | 83 ++++++++++++- driver/vidc/src/venus_hfi.c | 17 ++- 11 files changed, 521 insertions(+), 35 deletions(-) diff --git a/Makefile b/Makefile index a14220aa9b..e8a3137a3c 100644 --- a/Makefile +++ b/Makefile @@ -1,12 +1,6 @@ # SPDX-License-Identifier: GPL-2.0-only # auto-detect subdirs -ifneq ($(CONFIG_ARCH_QTI_VM), y) -ifeq ($(CONFIG_ARCH_WAIPIO), y) -include $(srctree)/techpack/video/config/waipio_video.conf -LINUXINCLUDE += -include $(srctree)/techpack/video/config/waipio_video.h -endif -endif LINUXINCLUDE += -I$(srctree)/techpack/video/include \ -I$(srctree)/techpack/video/include/uapi \ @@ -26,19 +20,23 @@ msm-vidc-objs := driver/vidc/src/msm_vidc_v4l2.o \ driver/vidc/src/msm_vidc.o \ driver/vidc/src/msm_vdec.o \ driver/vidc/src/msm_venc.o \ - driver/vidc/src/msm_vidc_vb2.o \ driver/vidc/src/msm_vidc_driver.o \ driver/vidc/src/msm_vidc_probe.o \ driver/vidc/src/msm_vidc_dt.o \ driver/vidc/src/msm_vidc_platform.o \ driver/vidc/src/msm_vidc_debug.o \ driver/vidc/src/msm_vidc_memory.o \ - driver/vidc/src/venus_hfi.o + driver/vidc/src/venus_hfi.o \ + driver/vidc/src/hfi_packet.o ifneq ($(CONFIG_ARCH_QTI_VM), y) -ifeq ($(CONFIG_ARCH_WAIPIO), y) +ifeq ($(CONFIG_ARCH_LAHAINA), y) + +include $(srctree)/techpack/video/config/waipio_video.conf +LINUXINCLUDE += -include $(srctree)/techpack/video/config/waipio_video.h + msm-vidc-objs += driver/platform/waipio/src/msm_vidc_waipio.o \ - driver/hfi/iris2/src/msm_vidc_iris2.o + driver/variant/iris2/src/msm_vidc_iris2.o endif endif diff --git a/driver/vidc/inc/hfi_packet.h b/driver/vidc/inc/hfi_packet.h index fcd7a22580..17fadf31a0 100644 --- a/driver/vidc/inc/hfi_packet.h +++ b/driver/vidc/inc/hfi_packet.h @@ -49,5 +49,8 @@ int hfi_packet_sys_debug_config(struct msm_vidc_core *core, void *packet, u32 packet_size, u32 mode); int hfi_packet_sys_pc_prep(struct msm_vidc_core *core, void *packet, u32 packet_size); - +int hfi_packet_session_open(struct msm_vidc_inst *inst, + void *packet, u32 pkt_size); +int hfi_packet_session_close(struct msm_vidc_inst *inst, + void *packet, u32 pkt_size); #endif // _HFI_PACKET_H_ diff --git a/driver/vidc/inc/msm_vdec.h b/driver/vidc/inc/msm_vdec.h index d0da941a24..2498f31bad 100644 --- a/driver/vidc/inc/msm_vdec.h +++ b/driver/vidc/inc/msm_vdec.h @@ -9,6 +9,8 @@ #include "msm_vidc_core.h" #include "msm_vidc_inst.h" +int msm_vdec_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f); +int msm_vdec_g_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f); int msm_vdec_inst_init(struct msm_vidc_inst *inst); int msm_vdec_ctrl_init(struct msm_vidc_inst *inst); diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 36e7b9f1c9..e9584d2c4e 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -36,6 +36,12 @@ void msm_vidc_batch_handler(struct work_struct *work); int msm_vidc_setup_event_queue(struct msm_vidc_inst *inst); int msm_vidc_queue_init(struct msm_vidc_inst *inst); u32 msm_vidc_convert_color_fmt(u32 v4l2_fmt); +int msm_vidc_get_control(struct msm_vidc_inst *inst, struct v4l2_ctrl *ctrl); +int msm_vidc_get_port_from_type(u32 type); +int msm_vidc_start_input(struct msm_vidc_inst *inst); +int msm_vidc_start_output(struct msm_vidc_inst *inst); +int msm_vidc_stop_input(struct msm_vidc_inst *inst); +int msm_vidc_stop_output(struct msm_vidc_inst *inst); #endif // _MSM_VIDC_DRIVER_H_ diff --git a/driver/vidc/inc/msm_vidc_inst.h b/driver/vidc/inc/msm_vidc_inst.h index 84b457449b..8544e5e098 100644 --- a/driver/vidc/inc/msm_vidc_inst.h +++ b/driver/vidc/inc/msm_vidc_inst.h @@ -82,6 +82,8 @@ struct msm_vidc_inst { struct kref kref; u32 session_id; u32 sid; + void *packet; + u32 packet_size; struct v4l2_format fmts[MAX_PORT]; struct v4l2_ctrl_handler ctrl_handler; struct v4l2_fh event_handler; diff --git a/driver/vidc/src/hfi_packet.c b/driver/vidc/src/hfi_packet.c index 7428966a3f..fb77fefe84 100644 --- a/driver/vidc/src/hfi_packet.c +++ b/driver/vidc/src/hfi_packet.c @@ -8,13 +8,43 @@ #include "msm_vidc_inst.h" #include "msm_vidc_debug.h" -int hfi_packet_sys_init(struct msm_vidc_core *core, void *pkt, u32 pkt_size) +int hfi_packet_sys_init(struct msm_vidc_core *core, + void *packet, u32 pkt_size) { d_vpr_h("%s()\n", __func__); return 0; } -int hfi_packet_sys_pc_prep(struct msm_vidc_core *core, void *pkt, u32 pkt_size) +int hfi_packet_sys_pc_prep(struct msm_vidc_core *core, + void *packet, u32 pkt_size) +{ + d_vpr_h("%s()\n", __func__); + return 0; +} + +int hfi_packet_sys_debug_config(struct msm_vidc_core *core, + void *packet, u32 pkt_size, u32 config) +{ + d_vpr_h("%s()\n", __func__); + return 0; +} + +int hfi_packet_image_version(struct msm_vidc_core *core, + void *packet, u32 pkt_size) +{ + d_vpr_h("%s()\n", __func__); + return 0; +} + +int hfi_packet_session_open(struct msm_vidc_inst *inst, + void *packet, u32 pkt_size) +{ + d_vpr_h("%s()\n", __func__); + return 0; +} + +int hfi_packet_session_close(struct msm_vidc_inst *inst, + void *packet, u32 pkt_size) { d_vpr_h("%s()\n", __func__); return 0; diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 1fd149f5a7..1db9736722 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -14,6 +14,202 @@ #include "msm_vidc_platform.h" #include "msm_vidc_debug.h" +static int msm_vdec_codec_change(struct msm_vidc_inst *inst, u32 codec) +{ + int rc = 0; + struct msm_vidc_core *core; + + d_vpr_h("%s()\n", __func__); + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + core = inst->core; + + return rc; +} + +int msm_vdec_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) +{ + int rc = 0; + struct msm_vidc_core *core; + struct v4l2_format *fmt; + + d_vpr_h("%s()\n", __func__); + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + core = inst->core; + + if (inst->state == MSM_VIDC_START) { + d_vpr_e("%s: invalid state %d\n", __func__, inst->state); + return -EINVAL; + } + + if (f->type == INPUT_PLANE) { + if (inst->state == MSM_VIDC_START_INPUT) { + d_vpr_e("%s: invalid state %d\n", __func__, inst->state); + return -EINVAL; + } + if (inst->fmts[INPUT_PORT].fmt.pix.pixelformat != + f->fmt.pix.pixelformat) { + s_vpr_e(inst->sid, + "%s: codec changed from %#x to %#x\n", __func__, + inst->fmts[INPUT_PORT].fmt.pix.pixelformat, + f->fmt.pix.pixelformat); + rc = msm_vdec_codec_change(inst, f->fmt.pix.pixelformat); + if (rc) + goto err_invalid_fmt; + } + fmt = &inst->fmts[INPUT_PORT]; + fmt->type = INPUT_PLANE; + fmt->fmt.pix.width = f->fmt.pix.width; + fmt->fmt.pix.height = f->fmt.pix.height; + fmt->fmt.pix.pixelformat = f->fmt.pix.pixelformat; + fmt->fmt.pix.bytesperline = 0; + fmt->fmt.pix.sizeimage = call_session_op(core, buffer_size, + inst, MSM_VIDC_INPUT); + inst->buffers.input.min_count = + call_session_op(core, min_count, inst, MSM_VIDC_INPUT); + inst->buffers.input.extra_count = + call_session_op(core, extra_count, inst, MSM_VIDC_INPUT); + if (inst->buffers.input.actual_count < + inst->buffers.input.min_count + + inst->buffers.input.extra_count) { + inst->buffers.input.actual_count = + inst->buffers.input.min_count + + inst->buffers.input.extra_count; + } + inst->buffers.input.size = fmt->fmt.pix.sizeimage; + + //rc = msm_vidc_check_session_supported(inst); + if (rc) + goto err_invalid_fmt; + //update_log_ctxt(inst->sid, inst->session_type, + // mplane->pixelformat); + s_vpr_h(inst->sid, + "%s: input: codec %#x width %d height %d size %d min_count %d extra_count %d\n", + __func__, fmt->fmt.pix.pixelformat, fmt->fmt.pix.width, + fmt->fmt.pix.height, fmt->fmt.pix.sizeimage, + inst->buffers.input.min_count, + inst->buffers.input.extra_count); + } else if (f->type == INPUT_META_PLANE) { + if (inst->state == MSM_VIDC_START_INPUT) { + d_vpr_e("%s: invalid state %d\n", __func__, inst->state); + return -EINVAL; + } + fmt = &inst->fmts[INPUT_META_PORT]; + fmt->type = INPUT_META_PLANE; + fmt->fmt.meta.dataformat = V4L2_PIX_FMT_VIDC_META; + fmt->fmt.meta.buffersize = call_session_op(core, buffer_size, + inst, MSM_VIDC_INPUT_META); + inst->buffers.input_meta.min_count = + inst->buffers.input.min_count; + inst->buffers.input_meta.extra_count = + inst->buffers.input.extra_count; + inst->buffers.input_meta.actual_count = + inst->buffers.input.actual_count; + inst->buffers.input_meta.size = fmt->fmt.meta.buffersize; + s_vpr_h(inst->sid, + "%s: input meta: size %d min_count %d extra_count %d\n", + __func__, fmt->fmt.meta.buffersize, + inst->buffers.input_meta.min_count, + inst->buffers.input_meta.extra_count); + } else if (f->type == OUTPUT_PLANE) { + if (inst->state == MSM_VIDC_START_OUTPUT) { + d_vpr_e("%s: invalid state %d\n", __func__, inst->state); + return -EINVAL; + } + fmt = &inst->fmts[OUTPUT_PORT]; + fmt->type = OUTPUT_PLANE; + fmt->fmt.pix.pixelformat = f->fmt.pix.pixelformat; + fmt->fmt.pix.width = VENUS_Y_STRIDE( + msm_vidc_convert_color_fmt(fmt->fmt.pix.pixelformat), + f->fmt.pix.width); + fmt->fmt.pix.height = VENUS_Y_SCANLINES( + msm_vidc_convert_color_fmt(fmt->fmt.pix.pixelformat), + f->fmt.pix.height); + fmt->fmt.pix.bytesperline = fmt->fmt.pix.width; + fmt->fmt.pix.sizeimage = call_session_op(core, buffer_size, + inst, MSM_VIDC_OUTPUT); + inst->buffers.output.min_count = + call_session_op(core, min_count, inst, MSM_VIDC_OUTPUT); + inst->buffers.output.extra_count = + call_session_op(core, extra_count, inst, MSM_VIDC_OUTPUT); + if (inst->buffers.output.actual_count < + inst->buffers.output.min_count + + inst->buffers.output.extra_count) { + inst->buffers.output.actual_count = + inst->buffers.output.min_count + + inst->buffers.output.extra_count; + } + inst->buffers.output.size = fmt->fmt.pix.sizeimage; + + //rc = msm_vidc_check_session_supported(inst); + if (rc) + goto err_invalid_fmt; + s_vpr_h(inst->sid, + "%s: output: format %#x width %d height %d size %d min_count %d extra_count %d\n", + __func__, fmt->fmt.pix.pixelformat, fmt->fmt.pix.width, + fmt->fmt.pix.height, fmt->fmt.pix.sizeimage, + inst->buffers.output.min_count, + inst->buffers.output.extra_count); + } else if (f->type == OUTPUT_META_PLANE) { + if (inst->state == MSM_VIDC_START_OUTPUT) { + d_vpr_e("%s: invalid state %d\n", __func__, inst->state); + return -EINVAL; + } + fmt = &inst->fmts[OUTPUT_META_PORT]; + fmt->type = OUTPUT_META_PLANE; + fmt->fmt.meta.dataformat = V4L2_PIX_FMT_VIDC_META; + fmt->fmt.meta.buffersize = call_session_op(core, buffer_size, + inst, MSM_VIDC_OUTPUT_META); + inst->buffers.output_meta.min_count = + inst->buffers.output.min_count; + inst->buffers.output_meta.extra_count = + inst->buffers.output.extra_count; + inst->buffers.output_meta.actual_count = + inst->buffers.output.actual_count; + inst->buffers.output_meta.size = fmt->fmt.meta.buffersize; + s_vpr_h(inst->sid, + "%s: input meta: size %d min_count %d extra_count %d\n", + __func__, fmt->fmt.meta.buffersize, + inst->buffers.output_meta.min_count, + inst->buffers.output_meta.extra_count); + } + +err_invalid_fmt: + return rc; +} + +int msm_vdec_g_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) +{ + int rc = 0; + u32 index; + + d_vpr_h("%s()\n", __func__); + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (f->type == OUTPUT_PLANE) { + index = OUTPUT_PORT; + } else if (f->type == INPUT_PLANE) { + index = OUTPUT_PORT; + } else if (f->type == OUTPUT_META_PLANE) { + index = OUTPUT_PORT; + } else if (f->type == OUTPUT_META_PLANE) { + index = OUTPUT_PORT; + } else { + d_vpr_e("%s: invalid type %d\n", __func__, f->type); + return -EINVAL; + } + memcpy(f, &inst->fmts[index], sizeof(struct v4l2_format)); + + return rc; +} int msm_vdec_inst_init(struct msm_vidc_inst *inst) { @@ -84,7 +280,7 @@ int msm_vdec_inst_init(struct msm_vidc_inst *inst) inst->buffers.output_meta.min_count = inst->buffers.output.min_count; inst->buffers.output_meta.extra_count = inst->buffers.output.extra_count; inst->buffers.output_meta.actual_count = inst->buffers.output.actual_count; - inst->buffers.output_meta.size = f->fmt.meta.buffersize; + inst->buffers.output_meta.size = f->fmt.meta.buffersize; inst->prop.frame_rate = DEFAULT_FPS << 16; inst->prop.operating_rate = DEFAULT_FPS << 16; diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index 9289019791..99e080b70c 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -147,17 +147,8 @@ int msm_vidc_query_ctrl(void *instance, struct v4l2_queryctrl *q_ctrl) q_ctrl->minimum = ctrl->minimum; q_ctrl->maximum = ctrl->maximum; q_ctrl->default_value = ctrl->default_value; - /* remove tier info for HEVC level */ - if (q_ctrl->id == V4L2_CID_MPEG_VIDEO_HEVC_LEVEL) { - q_ctrl->minimum &= ~(0xF << 28); - q_ctrl->maximum &= ~(0xF << 28); - } - if (ctrl->type == V4L2_CTRL_TYPE_MENU) { - q_ctrl->flags = ~(ctrl->menu_skip_mask); - } else { - q_ctrl->flags = 0; - q_ctrl->step = ctrl->step; - } + q_ctrl->flags = 0; + q_ctrl->step = ctrl->step; s_vpr_h(inst->sid, "query ctrl: %s: min %d, max %d, default %d step %d flags %#x\n", ctrl->name, q_ctrl->minimum, q_ctrl->maximum, @@ -213,7 +204,7 @@ int msm_vidc_s_fmt(void *instance, struct v4l2_format *f) return -EINVAL; if (inst->domain == MSM_VIDC_DECODER) - rc = 0;//msm_vdec_s_fmt(instance, f); + rc = msm_vdec_s_fmt(inst, f); if (inst->domain == MSM_VIDC_ENCODER) rc = 0;//msm_venc_s_fmt(instance, f); @@ -230,7 +221,7 @@ int msm_vidc_g_fmt(void *instance, struct v4l2_format *f) return -EINVAL; if (inst->domain == MSM_VIDC_DECODER) - rc = 0;//msm_vdec_g_fmt(instance, f); + rc = msm_vdec_g_fmt(inst, f); if (inst->domain == MSM_VIDC_ENCODER) rc = 0;//msm_venc_g_fmt(instance, f); @@ -260,7 +251,7 @@ int msm_vidc_g_ctrl(void *instance, struct v4l2_control *control) ctrl = v4l2_ctrl_find(&inst->ctrl_handler, control->id); if (ctrl) { - rc = 0;//try_get_ctrl_for_instance(inst, ctrl); + rc = msm_vidc_get_control(inst, ctrl); if (!rc) control->value = ctrl->val; } @@ -271,7 +262,25 @@ EXPORT_SYMBOL(msm_vidc_g_ctrl); int msm_vidc_reqbufs(void *instance, struct v4l2_requestbuffers *b) { - return 0; + int rc = 0; + struct msm_vidc_inst *inst = instance; + int port; + + if (!inst || !b) + return -EINVAL; + + port = msm_vidc_get_port_from_type(b->type); + if (port < 0) { + d_vpr_e("%s: invalid queue type %d\n", __func__, b->type); + return -EINVAL; + } + mutex_lock(&inst->lock); + rc = vb2_reqbufs(&inst->vb2q[port], b); + mutex_unlock(&inst->lock); + if (rc) + s_vpr_e(inst->sid, "%s: vb2_reqbufs failed, %d\n", rc); + + return rc; } EXPORT_SYMBOL(msm_vidc_reqbufs); @@ -290,13 +299,49 @@ EXPORT_SYMBOL(msm_vidc_dqbuf); int msm_vidc_streamon(void *instance, enum v4l2_buf_type i) { - return 0; + int rc = 0; + struct msm_vidc_inst *inst = instance; + int port; + + if (!inst) + return -EINVAL; + + port = msm_vidc_get_port_from_type(i); + if (port < 0) { + d_vpr_e("%s: invalid buf type %d\n", __func__, i); + return -EINVAL; + } + mutex_lock(&inst->lock); + rc = vb2_streamon(&inst->vb2q[port], i); + mutex_unlock(&inst->lock); + if (rc) + s_vpr_e(inst->sid, "%s: vb2_streamon failed, %d\n", rc); + + return rc; } EXPORT_SYMBOL(msm_vidc_streamon); int msm_vidc_streamoff(void *instance, enum v4l2_buf_type i) { - return 0; + int rc = 0; + struct msm_vidc_inst *inst = instance; + int port; + + if (!inst) + return -EINVAL; + + port = msm_vidc_get_port_from_type(i); + if (port < 0) { + d_vpr_e("%s: invalid buf type %d\n", __func__, i); + return -EINVAL; + } + mutex_lock(&inst->lock); + rc = vb2_streamoff(&inst->vb2q[port], i); + mutex_unlock(&inst->lock); + if (rc) + s_vpr_e(inst->sid, "%s: vb2_streamoff failed, %d\n", rc); + + return rc; } EXPORT_SYMBOL(msm_vidc_streamoff); diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index bc56a27f32..c9a7c24995 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -13,6 +13,52 @@ #include "msm_vidc_debug.h" #include "venus_hfi.h" +int msm_vidc_get_port_from_type(u32 type) +{ + int port; + + if (type == INPUT_PLANE) { + port = INPUT_PORT; + } else if (type == INPUT_META_PLANE) { + port = INPUT_META_PORT; + } else if (type == OUTPUT_PLANE) { + port = OUTPUT_PORT; + } else if (type == OUTPUT_META_PLANE) { + port = OUTPUT_META_PORT; + } else { + d_vpr_e("invalid type %d\n", type); + port = -EINVAL; + } + + return port; +} +int msm_vidc_get_control(struct msm_vidc_inst *inst, struct v4l2_ctrl *ctrl) +{ + int rc = 0; + + if (!inst || !ctrl) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + switch (ctrl->id) { + case V4L2_CID_MIN_BUFFERS_FOR_CAPTURE: + ctrl->val = inst->buffers.output.min_count + + inst->buffers.output.extra_count; + s_vpr_h(inst->sid, "g_min: output buffers %d\n", ctrl->val); + break; + case V4L2_CID_MIN_BUFFERS_FOR_OUTPUT: + ctrl->val = inst->buffers.input.min_count + + inst->buffers.input.extra_count; + s_vpr_h(inst->sid, "g_min: input buffers %d\n", ctrl->val); + break; + default: + break; + } + + return rc; +} + u32 msm_vidc_convert_color_fmt(u32 v4l2_fmt) { switch (v4l2_fmt) { @@ -38,10 +84,68 @@ u32 msm_vidc_convert_color_fmt(u32 v4l2_fmt) } } +int msm_vidc_stop_input(struct msm_vidc_inst *inst) +{ + int rc = 0; + + d_vpr_h("%s()\n", __func__); + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + return rc; +} + +int msm_vidc_stop_output(struct msm_vidc_inst *inst) +{ + int rc = 0; + + d_vpr_h("%s()\n", __func__); + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + return rc; +} + +int msm_vidc_start_input(struct msm_vidc_inst *inst) +{ + int rc = 0; + + d_vpr_h("%s()\n", __func__); + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + return rc; +} + +int msm_vidc_start_output(struct msm_vidc_inst *inst) +{ + int rc = 0; + + d_vpr_h("%s()\n", __func__); + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + return rc; +} + int msm_vidc_setup_event_queue(struct msm_vidc_inst *inst) { int rc = 0; + d_vpr_h("%s()\n", __func__); + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + return rc; } @@ -49,6 +153,12 @@ int msm_vidc_queue_init(struct msm_vidc_inst *inst) { int rc = 0; + d_vpr_h("%s()\n", __func__); + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + return rc; } @@ -72,7 +182,7 @@ int msm_vidc_add_session(struct msm_vidc_inst *inst) if (count < MAX_SUPPORTED_INSTANCES) { list_add_tail(&inst->list, &core->instances); } else { - d_vpr_e("%s: total sessions %d reached max limit %d\n", + d_vpr_e("%s: total sessions %d exceeded max limit %d\n", __func__, count, MAX_SUPPORTED_INSTANCES); rc = -EINVAL; } diff --git a/driver/vidc/src/msm_vidc_vb2.c b/driver/vidc/src/msm_vidc_vb2.c index deb535abc1..0d82cd5343 100644 --- a/driver/vidc/src/msm_vidc_vb2.c +++ b/driver/vidc/src/msm_vidc_vb2.c @@ -7,6 +7,7 @@ #include "msm_vidc_core.h" #include "msm_vidc_inst.h" #include "msm_vidc_internal.h" +#include "msm_vidc_driver.h" #include "msm_vidc_debug.h" void *msm_vb2_get_userptr(struct device *dev, unsigned long vaddr, @@ -23,12 +24,90 @@ int msm_vidc_queue_setup(struct vb2_queue *q, unsigned int *num_buffers, unsigned int *num_planes, unsigned int sizes[], struct device *alloc_devs[]) { - return 0; + int rc = 0; + struct msm_vidc_inst *inst; + int port; + + if (!q || !num_buffers || !num_planes + || !sizes || !q->drv_priv) { + d_vpr_e("%s: invalid params, q = %pK, %pK, %pK\n", + __func__, q, num_buffers, num_planes); + return -EINVAL; + } + inst = q->drv_priv; + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params %pK\n", __func__, inst); + return -EINVAL; + } + if (inst->state == MSM_VIDC_START) { + d_vpr_e("%s: invalid state %d\n", __func__, inst->state); + return -EINVAL; + } + + port = msm_vidc_get_port_from_type(q->type); + if (port < 0) { + d_vpr_e("%s: invalid queue type %d\n", __func__, q->type); + return -EINVAL; + } + if (port == INPUT_PORT || port == INPUT_META_PORT) { + if (inst->state == MSM_VIDC_START_INPUT) { + d_vpr_e("%s: input invalid state %d\n", + __func__, inst->state); + return -EINVAL; + } + } else if (port == OUTPUT_PORT || port == OUTPUT_META_PORT) { + if (inst->state == MSM_VIDC_START_OUTPUT) { + d_vpr_e("%s: output invalid state %d\n", + __func__, inst->state); + return -EINVAL; + } + } + + *num_planes = 1; + if (*num_buffers < inst->buffers.input.min_count + + inst->buffers.input.extra_count) + *num_buffers = inst->buffers.input.min_count + + inst->buffers.input.extra_count; + sizes[0] = inst->fmts[port].fmt.pix.sizeimage; + inst->buffers.input.actual_count = *num_buffers; + + s_vpr_h(inst->sid, + "queue_setup: type %d num_buffers %d sizes[0] %d\n", + q->type, *num_buffers, sizes[0]); + return rc; } int msm_vidc_start_streaming(struct vb2_queue *q, unsigned int count) { - return 0; + int rc = 0; + struct msm_vidc_inst *inst; + + if (!q || !q->drv_priv) { + d_vpr_e("%s: invalid input, q = %pK\n", q); + return -EINVAL; + } + inst = q->drv_priv; + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + if (q->type == INPUT_META_PLANE || q->type == OUTPUT_META_PLANE) { + s_vpr_h(inst->sid, "%s: nothing to start on meta port %d\n", + __func__, q->type); + return 0; + } + s_vpr_h(inst->sid, "Streamon: %d\n", q->type); + + if (q->type == INPUT_PLANE) { + rc = msm_vidc_start_input(inst); + } else if (q->type == INPUT_PLANE) { + rc = msm_vidc_start_output(inst); + } else { + s_vpr_e(inst->sid, "%s: invalid type %d\n", __func__, q->type); + rc = -EINVAL; + } + + return rc; } void msm_vidc_stop_streaming(struct vb2_queue *q) diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index a809025fe1..c76e7c48be 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -2322,7 +2322,7 @@ int venus_hfi_suspend(struct msm_vidc_core *core) int rc = 0; if (!core) { - d_vpr_e("%s: invalid device\n", __func__); + d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -2346,6 +2346,21 @@ int venus_hfi_session_open(struct msm_vidc_core *core, struct msm_vidc_inst *ins d_vpr_h("%s(): inst %p, core %p\n", __func__, inst, core); + if (!core || !inst) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + inst->packet_size = 4096; + inst->packet = kzalloc(inst->packet_size, GFP_KERNEL); + if (!inst->packet) { + d_vpr_e("%s(): inst packet allocation failed\n", __func__); + return -ENOMEM; + } + rc = hfi_packet_session_open(inst, inst->packet, inst->packet_size); + if (rc) + return rc; + return rc; } From 4b08bf5e4dce5322fd2cccb706c1aef5319fdaa4 Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Fri, 7 Aug 2020 15:39:32 -0700 Subject: [PATCH 0004/1061] msm: vidc: initial hfi packetization changes Initial HFI packetization changes. Change-Id: If09b93acf6aef55acc32b03b369989896d59f5e8 Signed-off-by: Darshana Patil --- driver/vidc/inc/hfi_command.h | 151 ++++++++ driver/vidc/inc/hfi_definition.h | 30 ++ driver/vidc/inc/hfi_packet.h | 61 ++-- driver/vidc/inc/hfi_property.h | 477 +++++++++++++++++++++++++ driver/vidc/inc/msm_vidc_core.h | 2 + driver/vidc/inc/msm_vidc_platform.h | 4 + driver/vidc/src/hfi_packet.c | 519 ++++++++++++++++++++++++++-- driver/vidc/src/venus_hfi.c | 14 +- 8 files changed, 1190 insertions(+), 68 deletions(-) create mode 100644 driver/vidc/inc/hfi_command.h create mode 100644 driver/vidc/inc/hfi_definition.h create mode 100644 driver/vidc/inc/hfi_property.h diff --git a/driver/vidc/inc/hfi_command.h b/driver/vidc/inc/hfi_command.h new file mode 100644 index 0000000000..43458ec476 --- /dev/null +++ b/driver/vidc/inc/hfi_command.h @@ -0,0 +1,151 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) 2012-2021, The Linux Foundation. All rights reserved. + */ + +#ifndef __H_HFI_COMMAND_H__ +#define __H_HFI_COMMAND_H__ + +#define HFI_VIDEO_ARCH_OX 0x1 + +struct hfi_header { + u32 size; + u32 session_id; + u32 header_id; + u32 reserved[4]; + u32 num_packets; +}; + +struct hfi_packet { + u32 size; + u32 type; + u32 flags; + u32 payload_info; + u32 port; + u32 packet_id; + u32 reserved[2]; +}; + +struct hfi_buffer { + u32 type; + u32 index; + u64 base_address; + u32 addr_offset; + u32 buffer_size; + u32 data_offset; + u32 data_size; + u32 flags; + u64 timestamp; + u32 reserved[5]; +}; + +enum hfi_packet_host_flags { + HFI_HOST_FLAGS_NONE = 0, + HFI_HOST_FLAGS_INTR_REQUIRED = BIT(0), + HFI_HOST_FLAGS_RESPONSE_REQUIRED = BIT(1), + HFI_HOST_FLAGS_NON_DISCARDABLE = BIT(2), + HFI_HOST_FLAGS_GET_PROPERTY = BIT(3), +}; + +enum hfi_packet_firmware_flags { + HFI_FW_FLAGS_NONE = 0, + HFI_FW_FLAGS_SUCCESS = BIT(0), + HFI_FW_FLAGS_INFORMATION = BIT(1), + HFI_FW_FLAGS_SESSION_ERROR = BIT(2), + HFI_FW_FLAGS_SYSTEM_ERROR = BIT(3), +}; + +enum hfi_packet_payload_info { + HFI_PAYLOAD_NONE = 0x00000000, + HFI_PAYLOAD_U32 = 0x00000001, + HFI_PAYLOAD_S32 = 0x00000002, + HFI_PAYLOAD_U64 = 0x00000003, + HFI_PAYLOAD_S64 = 0x00000004, + HFI_PAYLOAD_STRUCTURE = 0x00000005, + HFI_PAYLOAD_BLOB = 0x00000006, + HFI_PAYLOAD_STRING = 0x00000007, + HFI_PAYLOAD_Q16 = 0x00000008, + HFI_PAYLOAD_U32_ENUM = 0x00000009, + HFI_PAYLOAD_32_PACKED = 0x0000000a, + HFI_PAYLOAD_U32_ARRAY = 0x0000000b, + HFI_PAYLOAD_S32_ARRAY = 0x0000000c, +}; + +enum hfi_packet_port_type { + HFI_PORT_NONE = 0, + HFI_PORT_BITSTREAM = BIT(0), + HFI_PORT_RAW = BIT(1), +}; + +enum hfi_buffer_type { + HFI_BUFFER_BITSTREAM = 0x00000001, + HFI_BUFFER_RAW = 0x00000002, + HFI_BUFFER_METADATA = 0x00000003, + HFI_BUFFER_DPB = 0x00000010, + HFI_BUFFER_BIN = 0x00000011, + HFI_BUFFER_LINE = 0x00000012, + HFI_BUFFER_ARP = 0x00000013, + HFI_BUFFER_COMV = 0x00000014, + HFI_BUFFER_NON_COMV = 0x00000015, + HFI_BUFFER_SUBCACHE = 0x00000020, + HFI_BUFFER_SFR = 0x00000021, +}; + +enum hfi_buffer_host_flags { + HFI_BUF_HOST_FLAG_NONE = 0, + HFI_BUF_HOST_FLAG_RELEASE = BIT(0), + HFI_BUF_HOST_FLAG_READONLY = BIT(1), + HFI_BUF_HOST_FLAG_CODEC_CONFIG = BIT(2), +}; + +enum hfi_buffer_firmware_flags { + HFI_BUF_FW_FLAG_NONE = 0, + HFI_BUF_FW_FLAG_LAST = BIT(0), + HFI_BUF_FW_FLAG_READONLY = BIT(1), + HFI_BUF_FW_FLAG_CODEC_CONFIG = BIT(2), +}; + +enum hfi_metapayload_header_flags { + HFI_METADATA_FLAGS_NONE = 0, + HFI_METADATA_FLAGS_TOP_FIELD = BIT(0), + HFI_METADATA_FLAGS_BOTTOM_FIELDS = BIT(1), +}; + +struct metabuf_header { + u32 count; + u32 size; + u32 version; + u32 reserved[5]; +}; + +struct metapayload_header { + u32 type; + u32 size; + u32 version; + u32 offset; + u32 flags; + u32 reserved[3]; +}; + +enum hfi_property_mode_type { + HFI_MODE_NONE = 0, + HFI_MODE_PORT_SETTINGS_CHANGE = BIT(0), + HFI_MODE_PROPERTY = BIT(1), + HFI_MODE_METADATA = BIT(2), +}; + +#define HFI_CMD_INIT 0x1 +#define HFI_CMD_POWER_COLLAPSE 0x2 +#define HFI_CMD_OPEN 0x3 +#define HFI_CMD_CLOSE 0x4 +#define HFI_CMD_START 0x5 +#define HFI_CMD_STOP 0x6 +#define HFI_CMD_DRAIN 0x7 +#define HFI_CMD_RESUME 0x8 +#define HFI_CMD_BUFFER 0x9 +#define HFI_CMD_DELIVERY_MODE 0xA +#define HFI_CMD_SUBSCRIBE_MODE 0xB +#define HFI_CMD_SETTINGS_CHANGE 0xC + + +#endif //__H_HFI_COMMAND_H__ diff --git a/driver/vidc/inc/hfi_definition.h b/driver/vidc/inc/hfi_definition.h new file mode 100644 index 0000000000..0824541fed --- /dev/null +++ b/driver/vidc/inc/hfi_definition.h @@ -0,0 +1,30 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) 2012-2021, The Linux Foundation. All rights reserved. + */ + +#ifndef __H_HFI_DEFINITION_H__ +#define __H_HFI_DEFINITION_H__ + +typedef u8 HFI_U8; +typedef s8 HFI_S8; +typedef u16 HFI_U16; +typedef s16 HFI_S16; +typedef u32 HFI_U32; +typedef s32 HFI_S32; +typedef u64 HFI_U64; + +typedef HFI_U32 HFI_BOOL; +#define HFI_FALSE 0 +#define HFI_TRUE (!HFI_FALSE) + +typedef HFI_U32 HFI_STATUS; +#define HFI_FAIL 0 +#define HFI_SUCCESS 1 + +#define HFI_ALIGN(a, b) (((b) & ((b) - 1)) ? \ + (((a) + (b) - 1) / (b) * (b)) : \ + (((a) + (b) - 1) & (~((b) - 1)))) + +#endif // __H_HFI_DEFINITION_H__ + diff --git a/driver/vidc/inc/hfi_packet.h b/driver/vidc/inc/hfi_packet.h index 17fadf31a0..6b1a9bf230 100644 --- a/driver/vidc/inc/hfi_packet.h +++ b/driver/vidc/inc/hfi_packet.h @@ -9,48 +9,31 @@ #include "msm_vidc_internal.h" #include "msm_vidc_inst.h" #include "msm_vidc_core.h" +#include "hfi_command.h" +#include "hfi_property.h" +#include "hfi_definition.h" -struct hfi_header { - u32 size; - u32 session_id; - u32 header_id; - u32 reserved[4]; - u32 num_packets; -}; - -struct hfi_packet { - u32 size; - u32 type; - u32 flags; - u32 payload_info; - u32 port; - u32 packet_id; - u32 reserved[2]; -}; - -struct hfi_buffer { - u32 type; - u32 index; - u64 base_address; - u32 addr_offset; - u32 buffer_size; - u32 data_offset; - u32 data_size; - u32 flags; - u64 timestamp; - u32 reserved[5]; -}; +int hfi_create_header(u8 *pkt, u32 session_id, + u32 header_id, u32 num_packets, u32 total_size); +int hfi_create_packet(u8 *packet, u32 packet_size, u32 *offset, + u32 pkt_type, u32 pkt_flags, u32 payload_type, u32 port, + u32 packet_id, void *payload, u32 payload_size); +int hfi_create_buffer(u8 *packet, u32 packet_size, u32 *offset, + enum msm_vidc_domain_type domain, struct msm_vidc_buffer *data); int hfi_packet_sys_init(struct msm_vidc_core *core, - void *packet, u32 packet_size); + u8 *pkt, u32 pkt_size); int hfi_packet_image_version(struct msm_vidc_core *core, - void *packet, u32 packet_size); -int hfi_packet_sys_debug_config(struct msm_vidc_core *core, - void *packet, u32 packet_size, u32 mode); + u8 *pkt, u32 pkt_size); int hfi_packet_sys_pc_prep(struct msm_vidc_core *core, - void *packet, u32 packet_size); -int hfi_packet_session_open(struct msm_vidc_inst *inst, - void *packet, u32 pkt_size); -int hfi_packet_session_close(struct msm_vidc_inst *inst, - void *packet, u32 pkt_size); + u8 *pkt, u32 pkt_size); +int hfi_packet_sys_debug_config(struct msm_vidc_core *core, + u8 *pkt, u32 pkt_size, u32 debug_config); +int hfi_packet_session_command(struct msm_vidc_inst *inst, + u32 pkt_type, u32 flags, u32 port, u32 session_id, + u32 payload_type, void *payload, u32 payload_size); +int hfi_packet_create_property(struct msm_vidc_inst *inst, + void *pkt, u32 pkt_size, u32 pkt_type, u32 flags, + u32 port, u32 payload, u32 payload_type, u32 payload_size); #endif // _HFI_PACKET_H_ + diff --git a/driver/vidc/inc/hfi_property.h b/driver/vidc/inc/hfi_property.h new file mode 100644 index 0000000000..84fa63266a --- /dev/null +++ b/driver/vidc/inc/hfi_property.h @@ -0,0 +1,477 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) 2012-2021, The Linux Foundation. All rights reserved. + */ + +#ifndef __H_HFI_PROPERTY_H__ +#define __H_HFI_PROPERTY_H__ + +#define HFI_PROP_BEGIN 0x03000000 +#define HFI_PROP_IMAGE_VERSION 0x03000001 +#define HFI_PROP_INTRA_FRAME_POWER_COLLAPSE 0x03000002 +#define HFI_PROP_UBWC_MAX_CHANNELS 0x03000003 +#define HFI_PROP_UBWC_MAL_LENGTH 0x03000004 +#define HFI_PROP_UBWC_HBB 0x03000005 +#define HFI_PROP_UBWC_BANK_SWZL_LEVEL1 0x03000006 +#define HFI_PROP_UBWC_BANK_SWZL_LEVEL2 0x03000007 +#define HFI_PROP_UBWC_BANK_SWZL_LEVEL3 0x03000008 +#define HFI_PROP_UBWC_BANK_SPREADING 0x03000009 + +enum hfi_debug_config { + HFI_DEBUG_CONFIG_DEFAULT = 0, + HFI_DEBUG_CONFIG_CLRDBGQ = BIT(0), + HFI_DEBUG_CONFIG_WFI = BIT(1), + HFI_DEBUG_CONFIG_ARM9WD = BIT(2), +}; +#define HFI_PROP_DEBUG_CONFIG 0x0300000a + +enum hfi_debug_log_level { + HFI_DEBUG_LOG_NONE = 0, + HFI_DEBUG_LOG_ERROR = BIT(0), + HFI_DEBUG_LOG_FATAL = BIT(1), + HFI_DEBUG_LOG_PERF = BIT(2), + HFI_DEBUG_LOG_HIGH = BIT(3), + HFI_DEBUG_LOG_MEDIUM = BIT(4), + HFI_DEBUG_LOG_LOW = BIT(5), +}; +#define HFI_PROP_DEBUG_LOG_LEVEL 0x0300000b + +enum hfi_codec_type { + HFI_CODEC_DECODE_AVC = 1, + HFI_CODEC_ENCODE_AVC = 2, + HFI_CODEC_DECODE_HEVC = 3, + HFI_CODEC_ENCODE_HEVC = 4, + HFI_CODEC_DECODE_VP9 = 5, + HFI_CODEC_DECODE_MPEG2 = 6, +}; +#define HFI_PROP_CODEC 0x03000100 + +enum hfi_color_format { + HFI_COLOR_FMT_OPAQUE = 0, + HFI_COLOR_FMT_NV12 = 1, + HFI_COLOR_FMT_NV12_UBWC = 2, + HFI_COLOR_FMT_P010 = 3, + HFI_COLOR_FMT_TP10_UBWC = 4, + HFI_COLOR_FMT_RGBA8888 = 5, + HFI_COLOR_FMT_RGBA8888_UBWC = 6, + HFI_COLOR_FMT_NV21 = 7, +}; +#define HFI_PROP_COLOR_FORMAT 0x03000101 + +#define HFI_PROP_SECURE 0x03000102 + +#define HFI_BITMASK_ALIGN_WIDTH 0xffff0000 +#define HFI_BITMASK_ALIGN_HEIGHT 0x0000ffff +#define HFI_PROP_ALIGN_RESOLUTION 0x03000103 + +#define HFI_BITMASK_CROP_WIDTH 0xffff0000 +#define HFI_BITMASK_CROP_HEIGHT 0x0000ffff +#define HFI_PROP_CROP_RESOLUTION 0x03000104 + +#define HFI_BITMASK_FRAME_COORDINATE_TOP 0xffff0000 +#define HFI_BITMASK_FRAME_COORDINATE_LEFT 0x0000ffff +#define HFI_PROP_CROP_COORDINATE_TOP_LEFT 0x03000105 + +#define HFI_PROP_REALTIME 0x03000106 + +enum hfi_avc_profile_type { + HFI_AVC_PROFILE_BASELINE = 0, + HFI_AVC_PROFILE_CONSTRAINED_BASELINE = 1, + HFI_AVC_PROFILE_MAIN = 2, + HFI_AVC_PROFILE_HIGH = 4, + HFI_AVC_PROFILE_CONSTRAINED_HIGH = 17 +}; + +enum hfi_hevc_profile_type { + HFI_HEVC_HEVC_PROFILE_MAIN = 0, + HFI_HEVC_PROFILE_MAIN_STILL_PICTURE = 1, + HFI_HEVC_PROFILE_MAIN_10 = 2, +}; + +enum hfi_vp9_profile_type { + HFI_VP9_PROFILE_0 = 0, + HFI_VP9_PROFILE_1 = 1, + HFI_VP9_PROFILE_2 = 2, + HFI_VP9_PROFILE_3 = 3, +}; + +enum hfi_mpeg2_profile_type { + HFI_MPEG2_PROFILE_SIMPLE = 0, + HFI_MPEG2_PROFILE_MAIN = 1, +}; + +#define HFI_PROP_PROFILE 0x03000107 + +enum hfi_avc_level_type { + HFI_AVC_LEVEL_1_0 = 0, + HFI_AVC_LEVEL_1B = 1, + HFI_AVC_LEVEL_1_1 = 2, + HFI_AVC_LEVEL_1_2 = 3, + HFI_AVC_LEVEL_1_3 = 4, + HFI_AVC_LEVEL_2_0 = 5, + HFI_AVC_LEVEL_2_1 = 6, + HFI_AVC_LEVEL_2_2 = 7, + HFI_AVC_LEVEL_3_0 = 8, + HFI_AVC_LEVEL_3_1 = 9, + HFI_AVC_LEVEL_3_2 = 10, + HFI_AVC_LEVEL_4_0 = 11, + HFI_AVC_LEVEL_4_1 = 12, + HFI_AVC_LEVEL_4_2 = 13, + HFI_AVC_LEVEL_5_0 = 14, + HFI_AVC_LEVEL_5_1 = 15, + HFI_AVC_LEVEL_5_2 = 16, + HFI_AVC_LEVEL_6_0 = 17, + HFI_AVC_LEVEL_6_1 = 18, + HFI_AVC_LEVEL_6_2 = 19, +}; + +enum hfi_hevc_level_type { + HFI_HEVC_LEVEL_1 = 0, + HFI_HEVC_LEVEL_2 = 1, + HFI_HEVC_LEVEL_2_1 = 2, + HFI_HEVC_LEVEL_3 = 3, + HFI_HEVC_LEVEL_3_1 = 4, + HFI_HEVC_LEVEL_4 = 5, + HFI_HEVC_LEVEL_4_1 = 6, + HFI_HEVC_LEVEL_5 = 7, + HFI_HEVC_LEVEL_5_1 = 8, + HFI_HEVC_LEVEL_5_2 = 9, + HFI_HEVC_LEVEL_6 = 10, + HFI_HEVC_LEVEL_6_1 = 11, + HFI_HEVC_LEVEL_6_2 = 12, +}; + +enum hfi_vp9_level_type { + HFI_VP9_LEVEL_1 = 0, + HFI_VP9_LEVEL_11 = 1, + HFI_VP9_LEVEL_2 = 2, + HFI_VP9_LEVEL_21 = 3, + HFI_VP9_LEVEL_3 = 4, + HFI_VP9_LEVEL_31 = 5, + HFI_VP9_LEVEL_4 = 6, + HFI_VP9_LEVEL_41 = 7, + HFI_VP9_LEVEL_5 = 8, + HFI_VP9_LEVEL_51 = 9, + HFI_VP9_LEVEL_6 = 10, + HFI_VP9_LEVEL_61 = 11, +}; + +enum hfi_mpeg2_level_type { + HFI_MPEG2_LEVEL_LOW = 0, + HFI_MPEG2_LEVEL_MAIN = 1, + HFI_MPEG2_LEVEL_HIGH_1440 = 2, + HFI_MPEG2_LEVEL_HIGH = 3, +}; + +enum hfi_codec_level_type { + HFI_LEVEL_UNKNOWN = 0xFFFFFFFF, +}; + +#define HFI_PROP_LEVEL 0x03000108 + + +enum hfi_hevc_tier_type { + HFI_HEVC_TIER_MAIN = 0, + HFI_HEVC_TIER_HIGH = 1, +}; +#define HFI_PROP_TIER 0x03000109 + +#define HFI_PROP_STAGE 0x0300010a + +#define HFI_PROP_PIPE 0x0300010b + +#define HFI_PROP_FRAME_RATE 0x0300010c + +#define HFI_BITMASK_CONCEAL_LUMA 0x000003ff +#define HFI_BITMASK_CONCEAL_CB 0x000ffC00 +#define HFI_BITMASK_CONCEAL_CR 0x3ff00000 +#define HFI_PROP_CONCEAL_COLOR_8BIT 0x0300010d + +#define HFI_BITMASK_CONCEAL_LUMA 0x000003ff +#define HFI_BITMASK_CONCEAL_CB 0x000ffC00 +#define HFI_BITMASK_CONCEAL_CR 0x3ff00000 +#define HFI_PROP_CONCEAL_COLOR_10BIT 0x0300010e + +#define HFI_BITMASK_LUMA_BIT_DEPTH 0xffff0000 +#define HFI_BITMASK_CHROMA_BIT_DEPTH 0x0000ffff +#define HFI_PROP_LUMA_CHROMA_BIT_DEPTH 0x0300010f + +#define HFI_BITMASK_FRAME_MBS_ONLY_FLAG 0x00000001 +#define HFI_BITMASK_MB_ADAPTIVE_FRAME_FIELD_FLAG 0x00000002 +#define HFI_PROP_CODED_FRAMES 0x03000120 + +#define HFI_PROP_CABAC_SESSION 0x03000121 + +#define HFI_PROP_8X8_TRANSFORM 0x03000122 + +#define HFI_PROP_BUFFER_HOST_MAX_COUNT 0x03000123 + +#define HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT 0x03000124 + +#define HFI_PROP_BUFFER_MAXDPB_COUNT 0x03000125 + +#define HFI_PROP_BUFFER_MAX_NUM_REFERENCE 0x03000126 + +#define HFI_PROP_BUFFER_VUI_RESTRICTION 0x03000127 + +#define HFI_PROP_PIC_ORDER_CNT_TYPE 0x03000128 + +enum hfi_deblock_mode { + HFI_DB_MODE_DISABLE = 0, + HFI_DB_MODE_SKIP_SLICE_BOUNDARY = BIT(0), + HFI_DB_MODE_ALL_BOUNDARY = BIT(1), +}; +#define HFI_PROP_DEBLOCKING_MODE 0x03000129 + +enum hfi_rate_control { + HFI_RC_OFF = 0x00000000, + HFI_RC_VBR_CFR = 0x00000001, + HFI_RC_CBR_CFR = 0x00000002, + HFI_RC_CBR_VFR = 0x00000003, + HFI_RC_CQ = 0x00000004, + HFI_RC_LOSSLESS = 0x00000005, +}; +#define HFI_PROP_RATE_CONTROL 0x0300012a + +#define HFI_PROP_FRAMERATE_BASED_RATE_CONTROL 0x0300012b + +#define HFI_PROP_CONTENT_ADAPTIVE_CODING 0x0300012c + +#define HFI_PROP_CONST_QUALITY_BITRATE_BOOST 0x0300012d + +#define HFI_BITMASK_QP_I 0x000000ff +#define HFI_BITMASK_QP_P 0x0000ff00 +#define HFI_BITMASK_QP_B 0x00ff0000 +#define HFI_BITMASK_QP_ENABLE 0x0f000000 +#define HFI_BITMASK_QP_LAYERS 0xf0000000 +#define HFI_PROP_QP_PACKED 0x0300012e + +#define HFI_PROP_MIN_QP_PACKED 0x0300012f + +#define HFI_PROP_MAX_QP_PACKED 0x03000130 + +#define HFI_PROP_IR_RANDOM_PERIOD 0x03000131 + +#define HFI_PROP_MULTI_SLICE_MB_COUNT 0x03000132 + +#define HFI_PROP_MULTI_SLICE_BYTES_COUNT 0x03000133 + +#define HFI_PROP_LTR_COUNT 0x03000134 + +#define HFI_PROP_LTR_MARK 0x03000135 + +#define HFI_PROP_LTR_USE 0x03000136 + +#define HFI_PROP_LTR_MARK_USE_DETAILS 0x03000137 + +enum hfi_layer_encoding_type { + HFI_HIER_P_SLIDING_WINDOW = 0x1, + HFI_HIER_P_HYBRID_LTR = 0x2, + HFI_HIER_B = 0x4, +}; +#define HFI_PROP_LAYER_ENCODING_TYPE 0x03000138 + +#define HFI_PROP_LAYER_COUNT 0x03000139 + +#define HFI_BITMASK_CHROMA_CB_OFFSET 0x0000ffff +#define HFI_BITMASK_CHROMA_CR_OFFSET 0xffff0000 +#define HFI_PROP_CHROMA_QP_OFFSET 0x0300013a + +#define HFI_PROP_TOTAL_BITRATE 0x0300013b + +#define HFI_PROP_BITRATE_LAYER1 0x0300013c + +#define HFI_PROP_BITRATE_LAYER2 0x0300013d + +#define HFI_PROP_BITRATE_LAYER3 0x0300013e + +#define HFI_PROP_BITRATE_LAYER4 0x0300013f + +#define HFI_PROP_BITRATE_LAYER5 0x03000140 + +#define HFI_PROP_BITRATE_LAYER6 0x03000141 + +#define HFI_PROP_BASELAYER_PRIORITYID 0x03000142 + +#define HFI_PROP_CONSTANT_QUALITY 0x03000143 + +#define HFI_PROP_HEIC_GRID_ENABLE 0x03000144 + +#define HFI_PROP_REQUEST_SYNC_FRAME 0x03000145 + +#define HFI_PROP_MAX_GOP_FRAMES 0x03000146 + +#define HFI_PROP_MAX_B_FRAMES 0x03000147 + +enum hfi_quality_mode { + HFI_MODE_MAX_QUALITY = BIT(0), + HFI_MODE_POWER_SAVE = BIT(1), +}; +#define HFI_PROP_QUALITY_MODE 0x03000148 + +enum hfi_seq_header_mode { + HFI_SEQ_HEADER_SEPERATE_FRAME = BIT(0), + HFI_SEQ_HEADER_JOINED_WITH_1ST_FRAME = BIT(1), + HFI_SEQ_HEADER_PREFIX_WITH_SYNC_FRAME = BIT(2), + HFI_SEQ_HEADER_METADATA = BIT(3), +}; +#define HFI_PROP_SEQ_HEADER_MODE 0x03000149 + +#define HFI_PROP_METADATA_SEQ_HEADER_NAL 0x0300014a + +enum hfi_rotation { + HFI_ROTATION_NONE = 0x00000000, + HFI_ROTATION_90 = 0x00000001, + HFI_ROTATION_180 = 0x00000002, + HFI_ROTATION_270 = 0x00000003, +}; +#define HFI_PROP_ROTATION 0x0300014b + +enum hfi_flip { + HFI_FLIP_NONE = 0, + HFI_FLIP_HORIZONTAL = BIT(0), + HFI_FLIP_VERTICAL = BIT(1), +}; +#define HFI_PROP_FLIP 0x0300014c + +#define HFI_PROP_SCALAR 0x0300014d + +enum hfi_blur_types { + HFI_BLUR_NONE = 0, + HFI_BLUR_EXTERNAL = BIT(0), + HFI_BLUR_ADAPTIVE = BIT(1), +}; +#define HFI_PROP_BLUR_TYPES 0x0300014e + +#define HFI_BITMASK_BLUR_WIDTH 0xffff0000 +#define HFI_BITMASK_BLUR_HEIGHT 0x0000ffff +#define HFI_PROP_BLUR_RESOLUTION 0x0300014f + +#define HFI_BITMASK_SPS_ID 0x000000ff +#define HFI_BITMASK_PPS_ID 0x0000ff00 +#define HFI_BITMASK_VPS_ID 0x00ff0000 +#define HFI_PROP_SEQUENCE_HEADER_IDS 0x03000150 + +#define HFI_PROP_AUD 0x03000151 + +#define HFI_PROP_VUI_TIMING_INFO 0x03000152 + +#define HFI_PROP_DPB_LUMA_CHROMA_MISR 0x03000153 + +#define HFI_PROP_OPB_LUMA_CHROMA_MISR 0x03000154 + +#define HFI_BITMASK_QP_I 0x000000ff +#define HFI_BITMASK_QP_P 0x0000ff00 +#define HFI_BITMASK_QP_B 0x00ff0000 +#define HFI_BITMASK_QP_ENABLE 0x0f000000 +#define HFI_BITMASK_QP_LAYERS 0xf0000000 +#define HFI_PROP_SIGNAL_COLOR_INFO 0x03000155 + +enum hfi_interlace_info { + HFI_INTERLACE_INFO_NONE = 0, + HFI_FRAME_PROGRESSIVE = BIT(0), + HFI_FRAME_MBAFF = BIT(1), + HFI_FRAME_INTERLEAVE_TOPFIELD_FIRST = BIT(2), + HFI_FRAME_INTERLEAVE_BOTTOMFIELD_FIRST = BIT(3), + HFI_FRAME_INTERLACE_TOPFIELD_FIRST = BIT(4), + HFI_FRAME_INTERLACE_BOTTOMFIELD_FIRST = BIT(5), +}; +#define HFI_PROP_INTERLACE_INFO 0x03000156 + +#define HFI_PROP_CSC 0x03000157 + +#define HFI_PROP_CSC_MATRIX 0x03000158 + +#define HFI_PROP_CSC_BIAS 0x03000159 + +#define HFI_PROP_CSC_LIMIT 0x0300015a + +#define HFI_PROP_DECODE_ORDER_OUTPUT 0x0300015b + +#define HFI_PROP_TIMESTAMP 0x0300015c + +#define HFI_PROP_FRAMERATE_FROM_BITSTREAM 0x0300015d + +#define HFI_PROP_SEI_RECOVERY_POINT 0x0300015e + +#define HFI_PROP_CONEALED_MB_COUNT 0x0300015f + +#define HFI_BITMASK_SAR_WIDTH 0xffff0000 +#define HFI_BITMASK_SAR_HEIGHT 0x0000ffff +#define HFI_PROP_SAR_RESOLUTION 0x03000160 + +#define HFI_PROP_HISTOGRAM_INFO 0x03000161 + +enum hfi_picture_type { + HFI_PICTURE_TYPE_IDR = BIT(0), + HFI_PICTURE_TYPE_P = BIT(1), + HFI_PICTURE_TYPE_B = BIT(2), + HFI_PICTURE_TYPE_I = BIT(3), + HFI_PICTURE_TYPE_CRA = BIT(4), + HFI_PICTURE_TYPE_BLA = BIT(5), +}; +#define HFI_PROP_PICTURE_TYPE 0x03000162 + +#define HFI_PROP_SEI_MASTERING_DISPLAY_COLOUR 0x03000163 + +#define HFI_PROP_SEI_CONTENT_LIGHT_LEVEL 0x03000164 + +#define HFI_PROP_SEI_HDR10PLUS_USERDATA 0x03000165 + +#define HFI_PROP_SEI_STREAM_USERDATA 0x03000166 + +#define HFI_PROP_CVP_STAT_INFO 0x03000167 + +#define HFI_PROP_DEC_DEFAULT_HEADER 0x03000168 + +#define HFI_PROP_DEC_START_FROM_RAP_FRAME 0x03000169 + +#define HFI_PROP_TAG_NOT_PROPAGATED_TO_OUTPUT 0x0300016a + +#define HFI_PROP_BUFFER_TAG 0x0300016b + +#define HFI_PROP_BUFFER_MARK 0x0300016c + +#define HFI_PROP_SUBFRAME_OUTPUT 0x0300016d + +#define HFI_PROP_ENC_QP_METADATA 0x0300016e + +#define HFI_PROP_DEC_QP_METADATA 0x0300016f + +#define HFI_PROP_SEI_FRAME_PACKING_ARRANGEMENT 0x03000170 + +#define HFI_PROP_SEI_PAN_SCAN_RECT 0x03000171 + +#define HFI_PROP_THUMBNAIL_MODE 0x03000172 + +#define HFI_PROP_ROI_INFO 0x03000173 + +#define HFI_PROP_END 0x03FFFFFF + +#define HFI_SESSION_ERROR_BEGIN 0x04000000 + +#define HFI_ERROR_UNKNOWN_SESSION 0x04000001 + +#define HFI_ERROR_MAX_SESSIONS 0x04000002 + +#define HFI_ERROR_UNSUPPORTED 0x04000003 + +#define HFI_SESSION_ERROR_END 0x04FFFFFF + +#define HFI_SYSTEM_ERROR_BEGIN 0x05000000 + +#define HFI_SYS_ERROR_WD_TIMEOUT 0x05000001 + +#define HFI_SYS_ERROR_NOC 0x05000002 + +#define HFI_SYSTEM_ERROR_END 0x05FFFFFF + +#define HFI_INFORMATION_BEGIN 0x06000000 + +#define HFI_INFO_UNSUPPORTED 0x06000001 + +#define HFI_INFO_BITSTREAM_CORRUPT 0x06000002 + +#define HFI_INFORMATION_END 0x06FFFFFF + +#endif //__H_HFI_PROPERTY_H__ diff --git a/driver/vidc/inc/msm_vidc_core.h b/driver/vidc/inc/msm_vidc_core.h index 0392cb900b..29a13d92f9 100644 --- a/driver/vidc/inc/msm_vidc_core.h +++ b/driver/vidc/inc/msm_vidc_core.h @@ -101,6 +101,8 @@ struct msm_vidc_core { struct msm_vidc_venus_ops *venus_ops; struct msm_vidc_session_ops *session_ops; struct msm_vidc_memory_ops *mem_ops; + u32 header_id; + u32 packet_id; }; #endif // _MSM_VIDC_CORE_H_ diff --git a/driver/vidc/inc/msm_vidc_platform.h b/driver/vidc/inc/msm_vidc_platform.h index 0f7f096dc5..9d4b15049c 100644 --- a/driver/vidc/inc/msm_vidc_platform.h +++ b/driver/vidc/inc/msm_vidc_platform.h @@ -45,6 +45,8 @@ struct msm_vidc_ubwc_config_data { u32 mal_length_override : 1; u32 hb_override : 1; u32 bank_swzl_level_override : 1; + u32 bank_swz2_level_override : 1; + u32 bank_swz3_level_override : 1; u32 bank_spreading_override : 1; u32 reserved : 27; } override_bit_info; @@ -53,6 +55,8 @@ struct msm_vidc_ubwc_config_data { u32 mal_length; u32 highest_bank_bit; u32 bank_swzl_level; + u32 bank_swz2_level; + u32 bank_swz3_level; u32 bank_spreading; }; diff --git a/driver/vidc/src/hfi_packet.c b/driver/vidc/src/hfi_packet.c index fb77fefe84..e3be1150cd 100644 --- a/driver/vidc/src/hfi_packet.c +++ b/driver/vidc/src/hfi_packet.c @@ -7,45 +7,512 @@ #include "msm_vidc_core.h" #include "msm_vidc_inst.h" #include "msm_vidc_debug.h" +#include "msm_vidc_platform.h" + +static u32 get_hfi_buffer_type(enum msm_vidc_domain_type domain, + enum msm_vidc_buffer_type buf_type) +{ + switch (buf_type) { + case MSM_VIDC_QUEUE: + return 0; /* TODO */ + case MSM_VIDC_INPUT: + if (domain == MSM_VIDC_DECODER) + return HFI_PORT_BITSTREAM; + else + return HFI_PORT_RAW; + case MSM_VIDC_OUTPUT: + if (domain == MSM_VIDC_DECODER) + return HFI_PORT_RAW; + else + return HFI_PORT_BITSTREAM; + case MSM_VIDC_INPUT_META: + case MSM_VIDC_OUTPUT_META: + return HFI_BUFFER_METADATA; + case MSM_VIDC_DPB: + return HFI_BUFFER_DPB; + case MSM_VIDC_ARP: + return HFI_BUFFER_ARP; + case MSM_VIDC_LINE: + return HFI_BUFFER_LINE; + case MSM_VIDC_BIN: + return HFI_BUFFER_BIN; + default: + d_vpr_e("%s: Invalid buffer type %d\n", + __func__, buf_type); + return 0; + } +} + +static u32 get_hfi_buffer_flags(enum msm_vidc_buffer_attributes attr) +{ + switch (attr) { + case MSM_VIDC_DEFERRED_SUBMISSION: + return 0; /*not sure what it should be mapped to??*/ + case MSM_VIDC_READ_ONLY: + return HFI_BUF_HOST_FLAG_READONLY; + case MSM_VIDC_PENDING_RELEASE: + return HFI_BUF_HOST_FLAG_RELEASE; + default: + d_vpr_e("%s: Invalid buffer attribute %d\n", + __func__, attr); + return 0; + } +} + +int hfi_create_header(u8 *pkt, u32 session_id, + u32 header_id, u32 num_packets, u32 total_size) +{ + struct hfi_header *hdr = (struct hfi_header *)pkt; + + memset(hdr, 0, sizeof(struct hfi_header)); + + hdr->size = total_size; + hdr->session_id = session_id; + hdr->header_id = header_id; + hdr->num_packets = num_packets; + return 0; +} + +int hfi_create_packet(u8 *packet, u32 packet_size, u32 *offset, + u32 pkt_type, u32 pkt_flags, u32 payload_type, u32 port, + u32 packet_id, void *payload, u32 payload_size) +{ + u32 available_size = packet_size - *offset; + u32 pkt_size = sizeof(struct hfi_packet) + payload_size; + struct hfi_packet *pkt = (struct hfi_packet *)(packet + *offset); + + if (available_size < pkt_size) { + d_vpr_e("%s: Bad packet Size for packet type %d\n", + __func__, pkt_type); + return -EINVAL; + } + + memset(pkt, 0, pkt_size); + + pkt->size = pkt_size; + pkt->type = pkt_type; + pkt->flags = pkt_flags; + pkt->payload_info = payload_type; + pkt->port = port; + pkt->packet_id = packet_id; + if (payload_size) + memcpy((u8 *)pkt + sizeof(struct hfi_packet), + payload, payload_size); + *offset = *offset + pkt->size; + return 0; +} + +int hfi_create_buffer(u8 *packet, u32 packet_size, u32 *offset, + enum msm_vidc_domain_type domain, struct msm_vidc_buffer *data) +{ + u32 available_size = packet_size - *offset; + u32 buf_size = sizeof(struct hfi_buffer); + struct hfi_buffer *buf = (struct hfi_buffer *)packet; + + if (available_size < sizeof(struct hfi_buffer)) { + d_vpr_e("%s: Bad buffer Size for buffer type %d\n", + __func__, data->type); + return -EINVAL; + } + + memset(buf, 0, buf_size); + + buf->type = get_hfi_buffer_type(domain, data->type); + buf->index = data->index; + buf->base_address = data->device_addr; + buf->addr_offset = 0; + buf->buffer_size = data->buffer_size; + buf->data_offset = data->data_offset; + buf->data_size = data->data_size; + buf->flags = get_hfi_buffer_flags(data->attr); + buf->timestamp = data->timestamp; + *offset = *offset + buf_size; + return 0; +} int hfi_packet_sys_init(struct msm_vidc_core *core, - void *packet, u32 pkt_size) + u8 *pkt, u32 pkt_size) { - d_vpr_h("%s()\n", __func__); - return 0; -} + int rc = 0; + u32 offset = 0, payload = 0, num_packets = 0; -int hfi_packet_sys_pc_prep(struct msm_vidc_core *core, - void *packet, u32 pkt_size) -{ - d_vpr_h("%s()\n", __func__); - return 0; -} + if (!core || !pkt) { + d_vpr_e("%s: Invalid params\n", __func__); + return -EINVAL; + } -int hfi_packet_sys_debug_config(struct msm_vidc_core *core, - void *packet, u32 pkt_size, u32 config) -{ - d_vpr_h("%s()\n", __func__); - return 0; + if (pkt_size < sizeof(struct hfi_header)) { + d_vpr_e("%s: Invalid packet size\n", __func__); + return -EINVAL; + } + + /* HFI_CMD_SYSTEM_INIT */ + offset = sizeof(struct hfi_header); + payload = HFI_VIDEO_ARCH_OX; + rc = hfi_create_packet(pkt, pkt_size, &offset, + HFI_CMD_INIT, + (HFI_HOST_FLAGS_RESPONSE_REQUIRED | + HFI_HOST_FLAGS_INTR_REQUIRED | + HFI_HOST_FLAGS_NON_DISCARDABLE), + HFI_PAYLOAD_U32, + HFI_PORT_NONE, + core->packet_id++, + &payload, + sizeof(u32)); + if (rc) + goto err_sys_init; + num_packets++; + + /* HFI_PROP_INTRA_FRAME_POWER_COLLAPSE */ + payload = 0; + rc = hfi_create_packet(pkt, pkt_size, &offset, + HFI_PROP_INTRA_FRAME_POWER_COLLAPSE, + HFI_HOST_FLAGS_NONE, + HFI_PAYLOAD_U32, + HFI_PORT_NONE, + core->packet_id++, + &payload, + sizeof(u32)); + if (rc) + goto err_sys_init; + num_packets++; + + /* HFI_PROP_UBWC_MAX_CHANNELS */ + payload = core->platform->data.ubwc_config->max_channels; + rc = hfi_create_packet(pkt, pkt_size, &offset, + HFI_PROP_UBWC_MAX_CHANNELS, + HFI_HOST_FLAGS_NONE, + HFI_PAYLOAD_U32, + HFI_PORT_NONE, + core->packet_id++, + &payload, + sizeof(u32)); + if (rc) + goto err_sys_init; + num_packets++; + + /* HFI_PROP_UBWC_MAL_LENGTH */ + payload = core->platform->data.ubwc_config->mal_length; + rc = hfi_create_packet(pkt, pkt_size, &offset, + HFI_PROP_UBWC_MAL_LENGTH, + HFI_HOST_FLAGS_NONE, + HFI_PAYLOAD_U32, + HFI_PORT_NONE, + core->packet_id++, + &payload, + sizeof(u32)); + if (rc) + goto err_sys_init; + num_packets++; + + /* HFI_PROP_UBWC_HBB */ + payload = core->platform->data.ubwc_config->highest_bank_bit; + rc = hfi_create_packet(pkt, pkt_size, &offset, + HFI_PROP_UBWC_HBB, + HFI_HOST_FLAGS_NONE, + HFI_PAYLOAD_U32, + HFI_PORT_NONE, + core->packet_id++, + &payload, + sizeof(u32)); + if (rc) + goto err_sys_init; + num_packets++; + + /* HFI_PROP_UBWC_BANK_SWZL_LEVEL1 */ + payload = core->platform->data.ubwc_config->bank_swzl_level; + rc = hfi_create_packet(pkt, pkt_size, &offset, + HFI_PROP_UBWC_BANK_SWZL_LEVEL1, + HFI_HOST_FLAGS_NONE, + HFI_PAYLOAD_U32, + HFI_PORT_NONE, + core->packet_id++, + &payload, + sizeof(u32)); + if (rc) + goto err_sys_init; + num_packets++; + + /* HFI_PROP_UBWC_BANK_SWZL_LEVEL2 */ + payload = core->platform->data.ubwc_config->bank_swz2_level; + rc = hfi_create_packet(pkt, pkt_size, &offset, + HFI_PROP_UBWC_BANK_SWZL_LEVEL2, + HFI_HOST_FLAGS_NONE, + HFI_PAYLOAD_U32, + HFI_PORT_NONE, + core->packet_id++, + &payload, + sizeof(u32)); + if (rc) + goto err_sys_init; + num_packets++; + + /* HFI_PROP_UBWC_BANK_SWZL_LEVEL3 */ + payload = core->platform->data.ubwc_config->bank_swz3_level; + rc = hfi_create_packet(pkt, pkt_size, &offset, + HFI_PROP_UBWC_BANK_SWZL_LEVEL3, + HFI_HOST_FLAGS_NONE, + HFI_PAYLOAD_U32, + HFI_PORT_NONE, + core->packet_id++, + &payload, + sizeof(u32)); + if (rc) + goto err_sys_init; + num_packets++; + + /* HFI_PROP_UBWC_BANK_SPREADING */ + payload = core->platform->data.ubwc_config->bank_spreading; + rc = hfi_create_packet(pkt, pkt_size, &offset, + HFI_PROP_UBWC_BANK_SPREADING, + HFI_HOST_FLAGS_NONE, + HFI_PAYLOAD_U32, + HFI_PORT_NONE, + core->packet_id++, + &payload, + sizeof(u32)); + if (rc) + goto err_sys_init; + num_packets++; + + rc = hfi_create_header(pkt, 0 /*session_id*/, + core->header_id++, + num_packets, + offset); + + if (rc) + goto err_sys_init; + + d_vpr_h("System init packet created\n"); + return rc; + +err_sys_init: + d_vpr_e("%s: create packet failed\n", __func__); + return rc; } int hfi_packet_image_version(struct msm_vidc_core *core, - void *packet, u32 pkt_size) + u8 *pkt, u32 pkt_size) { - d_vpr_h("%s()\n", __func__); - return 0; + int rc = 0; + u32 num_packets = 0, offset = 0; + + if (!core || !pkt) { + d_vpr_e("%s: Invalid params\n", __func__); + return -EINVAL; + } + + /* HFI_PROP_IMAGE_VERSION */ + offset = sizeof(struct hfi_header); + rc = hfi_create_packet(pkt, pkt_size, &offset, + HFI_PROP_IMAGE_VERSION, + (HFI_HOST_FLAGS_RESPONSE_REQUIRED | + HFI_HOST_FLAGS_INTR_REQUIRED | + HFI_HOST_FLAGS_GET_PROPERTY), + HFI_PAYLOAD_NONE, + HFI_PORT_NONE, + core->packet_id++, + NULL, 0); + if (rc) + goto err_img_version; + num_packets++; + + rc = hfi_create_header(pkt, 0 /*session_id*/, + core->header_id++, + num_packets, + offset); + + if (rc) + goto err_img_version; + + d_vpr_h("Image version packet created\n"); + return rc; + +err_img_version: + d_vpr_e("%s: create packet failed\n", __func__); + return rc; } -int hfi_packet_session_open(struct msm_vidc_inst *inst, - void *packet, u32 pkt_size) +int hfi_packet_sys_pc_prep(struct msm_vidc_core *core, + u8 *pkt, u32 pkt_size) { - d_vpr_h("%s()\n", __func__); - return 0; + int rc = 0; + u32 num_packets = 0, offset = 0; + + if (!core || !pkt) { + d_vpr_e("%s: Invalid params\n", __func__); + return -EINVAL; + } + + /* HFI_CMD_POWER_COLLAPSE */ + offset = sizeof(struct hfi_header); + rc = hfi_create_packet(pkt, pkt_size, &offset, + HFI_CMD_POWER_COLLAPSE, + HFI_HOST_FLAGS_NONE, + HFI_PAYLOAD_NONE, + HFI_PORT_NONE, + core->packet_id++, + NULL, 0); + if (rc) + goto err_sys_pc; + num_packets++; + + rc = hfi_create_header(pkt, 0 /*session_id*/, + core->header_id++, + num_packets, + offset); + + if (rc) + goto err_sys_pc; + + d_vpr_h("Power collapse packet created\n"); + return rc; + +err_sys_pc: + d_vpr_e("%s: create packet failed\n", __func__); + return rc; } -int hfi_packet_session_close(struct msm_vidc_inst *inst, - void *packet, u32 pkt_size) +int hfi_packet_sys_debug_config(struct msm_vidc_core *core, + u8 *pkt, u32 pkt_size, u32 debug_config) { - d_vpr_h("%s()\n", __func__); - return 0; + int rc = 0; + u32 num_packets = 0, offset = 0, payload = 0; + + if (!core || !pkt) { + d_vpr_e("%s: Invalid params\n", __func__); + return -EINVAL; + } + + /* HFI_PROP_DEBUG_CONFIG */ + offset = sizeof(struct hfi_header); + payload = debug_config; /*TODO:Change later*/ + rc = hfi_create_packet(pkt, pkt_size, &offset, + HFI_PROP_DEBUG_CONFIG, + HFI_HOST_FLAGS_NONE, + HFI_PAYLOAD_U32_ENUM, + HFI_PORT_NONE, + core->packet_id++, + &payload, + sizeof(u32)); + if (rc) + goto err_debug; + num_packets++; + + /* HFI_PROP_DEBUG_LOG_LEVEL */ + payload = debug_config; /*TODO:Change later*/ + rc = hfi_create_packet(pkt, pkt_size, &offset, + HFI_PROP_DEBUG_LOG_LEVEL, + HFI_HOST_FLAGS_NONE, + HFI_PAYLOAD_U32_ENUM, + HFI_PORT_NONE, + core->packet_id++, + &payload, + sizeof(u32)); + if (rc) + goto err_debug; + num_packets++; + + rc = hfi_create_header(pkt, 0 /*session_id*/, + core->header_id++, + num_packets, + offset); + + if (rc) + goto err_debug; + + d_vpr_h("Debug packet created\n"); + return rc; + +err_debug: + d_vpr_e("%s: create packet failed\n", __func__); + return rc; +} + +int hfi_packet_session_command(struct msm_vidc_inst *inst, + u32 pkt_type, u32 flags, u32 port, u32 session_id, + u32 payload_type, void *payload, u32 payload_size) +{ + int rc = 0; + u32 num_packets = 0, offset = 0; + struct msm_vidc_core *core; + + if (!inst || !inst->core) { + d_vpr_e("%s: Invalid params\n", __func__); + return -EINVAL; + } + + core = inst->core; + offset = sizeof(struct hfi_header); + rc = hfi_create_packet(inst->packet, + inst->packet_size, + &offset, + pkt_type, + flags, + payload_type, + port, + core->packet_id++, + payload, + payload_size); + if (rc) + goto err_cmd; + num_packets++; + + rc = hfi_create_header(inst->packet, session_id, + core->header_id++, + num_packets, + offset); + + if (rc) + goto err_cmd; + + d_vpr_h("Command packet 0x%x created\n", pkt_type); + return rc; + +err_cmd: + d_vpr_e("%s: create packet failed\n", __func__); + return rc; +} + +int hfi_packet_create_property(struct msm_vidc_inst *inst, + void *pkt, u32 pkt_size, u32 pkt_type, u32 flags, + u32 port, u32 payload, u32 payload_type, u32 payload_size) +{ + int rc = 0; + u32 num_packets = 0, offset = 0; + struct msm_vidc_core *core; + + if (!inst || !inst->core || !pkt) { + d_vpr_e("%s: Invalid params\n", __func__); + return -EINVAL; + } + + core = inst->core; + offset = sizeof(struct hfi_header); + rc = hfi_create_packet(pkt, pkt_size, &offset, + pkt_type, + flags, + payload_type, + port, + core->packet_id++, + &payload, + payload_size); + if (rc) + goto err_prop; + num_packets++; + + rc = hfi_create_header(pkt, inst->session_id, + core->header_id++, + num_packets, + offset); + + if (rc) + goto err_prop; + + d_vpr_h("Property packet 0x%x created\n", pkt_type); + return rc; + +err_prop: + d_vpr_e("%s: create packet failed\n", __func__); + return rc; } diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index c76e7c48be..d4e20bf4db 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -2339,7 +2339,8 @@ int venus_hfi_suspend(struct msm_vidc_core *core) return rc; } -int venus_hfi_session_open(struct msm_vidc_core *core, struct msm_vidc_inst *inst) +int venus_hfi_session_open(struct msm_vidc_core *core, + struct msm_vidc_inst *inst) { int rc = 0; @@ -2357,10 +2358,17 @@ int venus_hfi_session_open(struct msm_vidc_core *core, struct msm_vidc_inst *ins d_vpr_e("%s(): inst packet allocation failed\n", __func__); return -ENOMEM; } - rc = hfi_packet_session_open(inst, inst->packet, inst->packet_size); + rc = hfi_packet_session_command(inst, + HFI_CMD_OPEN, + (HFI_HOST_FLAGS_RESPONSE_REQUIRED | + HFI_HOST_FLAGS_INTR_REQUIRED), + HFI_PORT_NONE, + 0 /* session_id */, + HFI_PAYLOAD_U32, + &inst->session_id /*payload*/, + sizeof(u32)); if (rc) return rc; return rc; } - From 6f3faa8d04c3cf9ebed0f01f644f478792da3989 Mon Sep 17 00:00:00 2001 From: Maheshwar Ajja Date: Fri, 14 Aug 2020 00:25:14 -0700 Subject: [PATCH 0005/1061] video: driver: add decoder input streamon support Add decoder input streamon functionality which include internal buffers support as well. Change-Id: Ifb5afa51a29270705863c273d1ae08310666895d Signed-off-by: Maheshwar Ajja --- Makefile | 4 +- config/waipio_video.conf | 2 +- .../variant/iris2/inc/msm_vidc_buffer_iris2.h | 20 + .../variant/iris2/src/msm_vidc_buffer_iris2.c | 1192 +++++++++++++++++ driver/variant/iris2/src/msm_vidc_iris2.c | 157 ++- driver/vidc/inc/hfi_command.h | 11 +- driver/vidc/inc/hfi_packet.h | 13 +- driver/vidc/inc/msm_vdec.h | 4 + driver/vidc/inc/msm_vidc_buffer.h | 24 + driver/vidc/inc/msm_vidc_driver.h | 71 +- driver/vidc/inc/msm_vidc_inst.h | 2 + driver/vidc/inc/msm_vidc_internal.h | 36 +- driver/vidc/inc/venus_hfi.h | 11 +- driver/vidc/src/hfi_packet.c | 188 ++- driver/vidc/src/msm_vdec.c | 270 +++- driver/vidc/src/msm_venc.c | 16 +- driver/vidc/src/msm_vidc.c | 251 +++- driver/vidc/src/msm_vidc_buffer.c | 190 +++ driver/vidc/src/msm_vidc_driver.c | 397 +++++- driver/vidc/src/msm_vidc_vb2.c | 27 +- driver/vidc/src/venus_hfi.c | 339 ++++- 21 files changed, 2993 insertions(+), 232 deletions(-) create mode 100644 driver/variant/iris2/inc/msm_vidc_buffer_iris2.h create mode 100644 driver/variant/iris2/src/msm_vidc_buffer_iris2.c create mode 100644 driver/vidc/inc/msm_vidc_buffer.h create mode 100644 driver/vidc/src/msm_vidc_buffer.c diff --git a/Makefile b/Makefile index e8a3137a3c..9549636a68 100644 --- a/Makefile +++ b/Makefile @@ -21,6 +21,7 @@ msm-vidc-objs := driver/vidc/src/msm_vidc_v4l2.o \ driver/vidc/src/msm_vdec.o \ driver/vidc/src/msm_venc.o \ driver/vidc/src/msm_vidc_driver.o \ + driver/vidc/src/msm_vidc_buffer.o \ driver/vidc/src/msm_vidc_probe.o \ driver/vidc/src/msm_vidc_dt.o \ driver/vidc/src/msm_vidc_platform.o \ @@ -36,7 +37,8 @@ include $(srctree)/techpack/video/config/waipio_video.conf LINUXINCLUDE += -include $(srctree)/techpack/video/config/waipio_video.h msm-vidc-objs += driver/platform/waipio/src/msm_vidc_waipio.o \ - driver/variant/iris2/src/msm_vidc_iris2.o + driver/variant/iris2/src/msm_vidc_iris2.o \ + driver/variant/iris2/src/msm_vidc_buffer_iris2.o endif endif diff --git a/config/waipio_video.conf b/config/waipio_video.conf index 10a22741de..efb4eedfb7 100644 --- a/config/waipio_video.conf +++ b/config/waipio_video.conf @@ -1 +1 @@ -export CONFIG_MSM_VIDC_V4L2=m +export CONFIG_MSM_VIDC_V4L2=y diff --git a/driver/variant/iris2/inc/msm_vidc_buffer_iris2.h b/driver/variant/iris2/inc/msm_vidc_buffer_iris2.h new file mode 100644 index 0000000000..ba29d574ff --- /dev/null +++ b/driver/variant/iris2/inc/msm_vidc_buffer_iris2.h @@ -0,0 +1,20 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) 2020, The Linux Foundation. All rights reserved. + */ + +#ifndef __H_MSM_VIDC_BUFFER_IRIS2_H__ +#define __H_MSM_VIDC_BUFFER_IRIS2_H__ + +#include "msm_vidc_inst.h" + +u32 msm_vidc_decoder_scratch_size_iris2(struct msm_vidc_inst *inst); +u32 msm_vidc_decoder_scratch_1_size_iris2(struct msm_vidc_inst *inst); +u32 msm_vidc_decoder_persist_1_size_iris2(struct msm_vidc_inst *inst); + +u32 msm_vidc_encoder_scratch_size_iris2(struct msm_vidc_inst *inst); +u32 msm_vidc_encoder_scratch_1_size_iris2(struct msm_vidc_inst *inst); +u32 msm_vidc_encoder_scratch_2_size_iris2(struct msm_vidc_inst *inst); +u32 msm_vidc_encoder_persist_size_iris2(struct msm_vidc_inst *inst); + +#endif // __H_MSM_VIDC_BUFFER_IRIS2_H__ diff --git a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c new file mode 100644 index 0000000000..7218968bd8 --- /dev/null +++ b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c @@ -0,0 +1,1192 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2020, The Linux Foundation. All rights reserved. + */ + +#include +#include "msm_vidc_buffer_iris2.h" +#include "msm_vidc_buffer.h" +#include "msm_vidc_inst.h" +#include "msm_vidc_core.h" +#include "msm_vidc_driver.h" +#include "msm_vidc_debug.h" + +#define HFI_COLOR_FORMAT_YUV420_NV12_UBWC_Y_TILE_WIDTH 32 +#define HFI_COLOR_FORMAT_YUV420_NV12_UBWC_Y_TILE_HEIGHT 8 +#define HFI_COLOR_FORMAT_YUV420_NV12_UBWC_UV_TILE_WIDTH 16 +#define HFI_COLOR_FORMAT_YUV420_NV12_UBWC_UV_TILE_HEIGHT 8 +#define HFI_COLOR_FORMAT_YUV420_TP10_UBWC_Y_TILE_WIDTH 48 +#define HFI_COLOR_FORMAT_YUV420_TP10_UBWC_Y_TILE_HEIGHT 4 +#define BUFFER_ALIGNMENT_4096_BYTES 4096 +#define VENUS_METADATA_STRIDE_MULTIPLE 64 +#define VENUS_METADATA_HEIGHT_MULTIPLE 16 +#define HFI_UBWC_CALC_METADATA_PLANE_STRIDE \ + ((metadataStride, width, metadataStrideMultiple, tileWidthInPels) \ + metadataStride = ALIGN(((width + (tileWidthInPels - 1)) / \ + tileWidthInPels), metadataStrideMultiple)) +#define HFI_UBWC_METADATA_PLANE_BUFHEIGHT \ + ((metadataBufHeight, height, metadataHeightMultiple, tileHeightInPels) \ + metadataBufHeight = ALIGN(((height + (tileHeightInPels - 1)) / \ + tileHeightInPels), metadataHeightMultiple)) +#define HFI_UBWC_METADATA_PLANE_BUFFER_SIZE \ + ((buffersize, MetadataStride, MetadataBufHeight) \ + buffersize = ALIGN(MetadataStride * MetadataBufHeight, \ + BUFFER_ALIGNMENT_4096_BYTES)) +#define HFI_UBWC_UV_METADATA_PLANE_STRIDE \ + ((metadataStride, width, metadataStrideMultiple, tileWidthInPels) \ + metadataStride = ALIGN(((((width + 1) >> 1) + \ + (tileWidthInPels - 1)) / tileWidthInPels), \ + metadataStrideMultiple)) +#define HFI_UBWC_UV_METADATA_PLANE_BUFHEIGHT \ + ((metadataBufHeight, height, metadataHeightMultiple, tileHeightInPels) \ + metadataBufHeight = ALIGN(((((height + 1) >> 1) + \ + (tileHeightInPels - 1)) / tileHeightInPels), \ + metadataHeightMultiple)) + +#define BUFFER_ALIGNMENT_SIZE(x) x + +#define VENUS_DMA_ALIGNMENT BUFFER_ALIGNMENT_SIZE(256) + +#define MAX_FE_NBR_CTRL_LCU64_LINE_BUFFER_SIZE 64 +#define MAX_FE_NBR_CTRL_LCU32_LINE_BUFFER_SIZE 64 +#define MAX_FE_NBR_CTRL_LCU16_LINE_BUFFER_SIZE 64 +#define MAX_FE_NBR_DATA_LUMA_LINE_BUFFER_SIZE 640 +#define MAX_FE_NBR_DATA_CB_LINE_BUFFER_SIZE 320 +#define MAX_FE_NBR_DATA_CR_LINE_BUFFER_SIZE 320 + +#define MAX_SE_NBR_CTRL_LCU64_LINE_BUFFER_SIZE (128 / 8) +#define MAX_SE_NBR_CTRL_LCU32_LINE_BUFFER_SIZE (128 / 8) +#define MAX_SE_NBR_CTRL_LCU16_LINE_BUFFER_SIZE (128 / 8) + +#define MAX_PE_NBR_DATA_LCU64_LINE_BUFFER_SIZE (64 * 2 * 3) +#define MAX_PE_NBR_DATA_LCU32_LINE_BUFFER_SIZE (32 * 2 * 3) +#define MAX_PE_NBR_DATA_LCU16_LINE_BUFFER_SIZE (16 * 2 * 3) + +#define MAX_TILE_COLUMNS 32 /* 8K/256 */ + +#define VPP_CMD_MAX_SIZE (1 << 20) +#define NUM_HW_PIC_BUF 32 +#define BIN_BUFFER_THRESHOLD (1280 * 736) +#define H264D_MAX_SLICE 1800 +#define SIZE_H264D_BUFTAB_T 256 // sizeof(h264d_buftab_t) aligned to 256 +#define SIZE_H264D_HW_PIC_T (1 << 11) // sizeof(h264d_hw_pic_t) 32 aligned +#define SIZE_H264D_BSE_CMD_PER_BUF (32 * 4) +#define SIZE_H264D_VPP_CMD_PER_BUF 512 + +// Line Buffer definitions +/* one for luma and 1/2 for each chroma */ +#define SIZE_H264D_LB_FE_TOP_DATA(width, height) \ + (MAX_FE_NBR_DATA_LUMA_LINE_BUFFER_SIZE * \ + ALIGN(width, 16) * 3) + +#define SIZE_H264D_LB_FE_TOP_CTRL(width, height) \ + (MAX_FE_NBR_CTRL_LCU64_LINE_BUFFER_SIZE * \ + ((width + 15) >> 4)) + +#define SIZE_H264D_LB_FE_LEFT_CTRL(width, height) \ + (MAX_FE_NBR_CTRL_LCU64_LINE_BUFFER_SIZE * \ + ((height + 15) >> 4)) + +#define SIZE_H264D_LB_SE_TOP_CTRL(width, height) \ + (MAX_SE_NBR_CTRL_LCU64_LINE_BUFFER_SIZE * \ + ((width + 15) >> 4)) + +#define SIZE_H264D_LB_SE_LEFT_CTRL(width, height) \ + (MAX_SE_NBR_CTRL_LCU64_LINE_BUFFER_SIZE * \ + ((height + 15) >> 4)) + +#define SIZE_H264D_LB_PE_TOP_DATA(width, height) \ + (MAX_PE_NBR_DATA_LCU64_LINE_BUFFER_SIZE * \ + ((width + 15) >> 4)) + +#define SIZE_H264D_LB_VSP_TOP(width, height) \ + ((((width + 15) >> 4) << 7)) + +#define SIZE_H264D_LB_RECON_DMA_METADATA_WR(width, height) \ + (ALIGN(height, 16) * 32) + +#define SIZE_H264D_QP(width, height) \ + (((width + 63) >> 6) * ((height + 63) >> 6) * 128) + +#define SIZE_HW_PIC(sizePerBuf) \ + (NUM_HW_PIC_BUF * sizePerBuf) + +#define H264_CABAC_HDR_RATIO_HD_TOT 1 +#define H264_CABAC_RES_RATIO_HD_TOT 3 + +/* + * some content need more bin buffer, but limit buffer + * size for high resolution + */ +#define NUM_SLIST_BUF_H264 (256 + 32) +#define SIZE_SLIST_BUF_H264 512 + +#define LCU_MAX_SIZE_PELS 64 +#define LCU_MIN_SIZE_PELS 16 + +#define H265D_MAX_SLICE 3600 +#define SIZE_H265D_HW_PIC_T SIZE_H264D_HW_PIC_T +#define SIZE_H265D_BSE_CMD_PER_BUF (16 * sizeof(u32)) +#define SIZE_H265D_VPP_CMD_PER_BUF 256 + +#define SIZE_H265D_LB_FE_TOP_DATA(width, height) \ + (MAX_FE_NBR_DATA_LUMA_LINE_BUFFER_SIZE * \ + (ALIGN(width, 64) + 8) * 2) + +#define SIZE_H265D_LB_FE_TOP_CTRL(width, height) \ + (MAX_FE_NBR_CTRL_LCU64_LINE_BUFFER_SIZE * \ + (ALIGN(width, LCU_MAX_SIZE_PELS) / LCU_MIN_SIZE_PELS)) + +#define SIZE_H265D_LB_FE_LEFT_CTRL(width, height) \ + (MAX_FE_NBR_CTRL_LCU64_LINE_BUFFER_SIZE * \ + (ALIGN(height, LCU_MAX_SIZE_PELS) / LCU_MIN_SIZE_PELS)) + +#define SIZE_H265D_LB_SE_TOP_CTRL(width, height) \ + ((LCU_MAX_SIZE_PELS / 8 * (128 / 8)) * \ + ((width + 15) >> 4)) + +#define SIZE_H265D_LB_SE_LEFT_CTRL(width, height) \ + (max(((height + 16 - 1) / 8) * MAX_SE_NBR_CTRL_LCU16_LINE_BUFFER_SIZE,\ + max(((height + 32 - 1) / 8) * MAX_SE_NBR_CTRL_LCU32_LINE_BUFFER_SIZE, \ + ((height + 64 - 1) / 8) * MAX_SE_NBR_CTRL_LCU64_LINE_BUFFER_SIZE))) + +#define SIZE_H265D_LB_PE_TOP_DATA(width, height) \ + (MAX_PE_NBR_DATA_LCU64_LINE_BUFFER_SIZE * \ + (ALIGN(width, LCU_MIN_SIZE_PELS) / LCU_MIN_SIZE_PELS)) + +#define SIZE_H265D_LB_VSP_TOP(width, height) \ + (((width + 63) >> 6) * 128) + +#define SIZE_H265D_LB_VSP_LEFT(width, height) \ + (((height + 63) >> 6) * 128) + +#define SIZE_H265D_LB_RECON_DMA_METADATA_WR(width, height) \ + SIZE_H264D_LB_RECON_DMA_METADATA_WR(width, height) + +#define SIZE_H265D_QP(width, height) SIZE_H264D_QP(width, height) + +#define H265_CABAC_HDR_RATIO_HD_TOT 2 +#define H265_CABAC_RES_RATIO_HD_TOT 2 + +/* + * some content need more bin buffer, but limit buffer size + * for high resolution + */ +#define SIZE_SLIST_BUF_H265 (1 << 10) +#define NUM_SLIST_BUF_H265 (80 + 20) +#define H265_NUM_TILE_COL 32 +#define H265_NUM_TILE_ROW 128 +#define H265_NUM_TILE (H265_NUM_TILE_ROW * H265_NUM_TILE_COL + 1) + +#define SIZE_VPXD_LB_FE_LEFT_CTRL(width, height) \ + max(((height + 15) >> 4) * MAX_FE_NBR_CTRL_LCU16_LINE_BUFFER_SIZE, \ + max(((height + 31) >> 5) * MAX_FE_NBR_CTRL_LCU32_LINE_BUFFER_SIZE, \ + ((height + 63) >> 6) * MAX_FE_NBR_CTRL_LCU64_LINE_BUFFER_SIZE)) +#define SIZE_VPXD_LB_FE_TOP_CTRL(width, height) \ + (((ALIGN(width, 64) + 8) * 10 * 2)) /* + small line */ +#define SIZE_VPXD_LB_SE_TOP_CTRL(width, height) \ + (((width + 15) >> 4) * MAX_FE_NBR_CTRL_LCU16_LINE_BUFFER_SIZE) +#define SIZE_VPXD_LB_SE_LEFT_CTRL(width, height) \ + max(((height + 15) >> 4) * MAX_SE_NBR_CTRL_LCU16_LINE_BUFFER_SIZE, \ + max(((height + 31) >> 5) * MAX_SE_NBR_CTRL_LCU32_LINE_BUFFER_SIZE, \ + ((height + 63) >> 6) * MAX_SE_NBR_CTRL_LCU64_LINE_BUFFER_SIZE)) +#define SIZE_VPXD_LB_RECON_DMA_METADATA_WR(width, height) \ + ALIGN((ALIGN(height, 16) / (4 / 2)) * 64, BUFFER_ALIGNMENT_SIZE(32)) +#define SIZE_VP8D_LB_FE_TOP_DATA(width, height) \ + ((ALIGN(width, 16) + 8) * 10 * 2) +#define SIZE_VP9D_LB_FE_TOP_DATA(width, height) \ + ((ALIGN(ALIGN(width, 16), 64) + 8) * 10 * 2) +#define SIZE_VP8D_LB_PE_TOP_DATA(width, height) \ + ((ALIGN(width, 16) >> 4) * 64) +#define SIZE_VP9D_LB_PE_TOP_DATA(width, height) \ + ((ALIGN(ALIGN(width, 16), 64) >> 6) * 176) +#define SIZE_VP8D_LB_VSP_TOP(width, height) \ + (((ALIGN(width, 16) >> 4) * 64 / 2) + 256) +#define SIZE_VP9D_LB_VSP_TOP(width, height) \ + (((ALIGN(ALIGN(width, 16), 64) >> 6) * 64 * 8) + 256) + + +#define HFI_IRIS2_VP9D_COMV_SIZE \ + ((((8192 + 63) >> 6) * ((4320 + 63) >> 6) * 8 * 8 * 2 * 8)) + +#define VPX_DECODER_FRAME_CONCURENCY_LVL 2 +#define VPX_DECODER_FRAME_BIN_HDR_BUDGET_RATIO_NUM 1 +#define VPX_DECODER_FRAME_BIN_HDR_BUDGET_RATIO_DEN 2 +#define VPX_DECODER_FRAME_BIN_RES_BUDGET_RATIO_NUM 3 +#define VPX_DECODER_FRAME_BIN_RES_BUDGET_RATIO_DEN 2 + +#define VP8_NUM_FRAME_INFO_BUF (5 + 1) +#define VP9_NUM_FRAME_INFO_BUF (32) +#define VP8_NUM_PROBABILITY_TABLE_BUF (VP8_NUM_FRAME_INFO_BUF) +#define VP9_NUM_PROBABILITY_TABLE_BUF (VP9_NUM_FRAME_INFO_BUF + 4) +#define VP8_PROB_TABLE_SIZE 3840 +#define VP9_PROB_TABLE_SIZE 3840 + +#define VP9_UDC_HEADER_BUF_SIZE (3 * 128) +#define MAX_SUPERFRAME_HEADER_LEN (34) +#define CCE_TILE_OFFSET_SIZE ALIGN(32 * 4 * 4, BUFFER_ALIGNMENT_SIZE(32)) + +#define QMATRIX_SIZE (sizeof(u32) * 128 + 256) +#define MP2D_QPDUMP_SIZE 115200 + +#define HFI_IRIS2_ENC_PERSIST_SIZE 204800 + +#define HFI_MAX_COL_FRAME 6 +#define HFI_VENUS_VENC_TRE_WB_BUFF_SIZE (65 << 4) // bytes +#define HFI_VENUS_VENC_DB_LINE_BUFF_PER_MB 512 +#define HFI_VENUS_VPPSG_MAX_REGISTERS 2048 +#define HFI_VENUS_WIDTH_ALIGNMENT 128 +#define HFI_VENUS_WIDTH_TEN_BIT_ALIGNMENT 192 +#define HFI_VENUS_HEIGHT_ALIGNMENT 32 + +#define SYSTEM_LAL_TILE10 192 +#define HDR10_HIST_EXTRADATA_SIZE 4096 + +static u32 size_vpss_lb(u32 width, u32 height, u32 num_vpp_pipes) +{ + u32 vpss_4tap_top_buffer_size, vpss_div2_top_buffer_size; + u32 vpss_4tap_left_buffer_size, vpss_div2_left_buffer_size; + u32 opb_wr_top_line_luma_buf_size, opb_wr_top_line_chroma_buf_size; + u32 opb_lb_wr_llb_y_buffer_size, opb_lb_wr_llb_uv_buffer_size; + u32 macrotiling_size; + u32 size = 0; + + vpss_4tap_top_buffer_size = vpss_div2_top_buffer_size = + vpss_4tap_left_buffer_size = vpss_div2_left_buffer_size = 0; + macrotiling_size = 32; + opb_wr_top_line_luma_buf_size = ALIGN(width, macrotiling_size) / + macrotiling_size * 256; + opb_wr_top_line_luma_buf_size = ALIGN(opb_wr_top_line_luma_buf_size, + VENUS_DMA_ALIGNMENT) + (MAX_TILE_COLUMNS - 1) * 256; + opb_wr_top_line_luma_buf_size = max(opb_wr_top_line_luma_buf_size, + (32 * ALIGN(height, 16))); + opb_wr_top_line_chroma_buf_size = opb_wr_top_line_luma_buf_size; + opb_lb_wr_llb_uv_buffer_size = opb_lb_wr_llb_y_buffer_size = + ALIGN((ALIGN(height, 16) / 2) * + 64, BUFFER_ALIGNMENT_SIZE(32)); + size = num_vpp_pipes * 2 * (vpss_4tap_top_buffer_size + + vpss_div2_top_buffer_size) + + 2 * (vpss_4tap_left_buffer_size + + vpss_div2_left_buffer_size) + + opb_wr_top_line_luma_buf_size + + opb_wr_top_line_chroma_buf_size + + opb_lb_wr_llb_uv_buffer_size + + opb_lb_wr_llb_y_buffer_size; + + return size; +} + +static u32 hfi_iris2_h264d_comv_size(u32 width, u32 height, + u32 yuv_buf_min_count) +{ + u32 comv_size = 0; + u32 frame_width_in_mbs = ((width + 15) >> 4); + u32 frame_height_in_mbs = ((height + 15) >> 4); + u32 col_mv_aligned_width = (frame_width_in_mbs << 7); + u32 col_zero_aligned_width = (frame_width_in_mbs << 2); + u32 col_zero_size = 0, size_colloc = 0; + + col_mv_aligned_width = ALIGN(col_mv_aligned_width, + BUFFER_ALIGNMENT_SIZE(16)); + col_zero_aligned_width = ALIGN(col_zero_aligned_width, + BUFFER_ALIGNMENT_SIZE(16)); + col_zero_size = col_zero_aligned_width * + ((frame_height_in_mbs + 1) >> 1); + col_zero_size = ALIGN(col_zero_size, BUFFER_ALIGNMENT_SIZE(64)); + col_zero_size <<= 1; + col_zero_size = ALIGN(col_zero_size, BUFFER_ALIGNMENT_SIZE(512)); + size_colloc = col_mv_aligned_width * ((frame_height_in_mbs + 1) >> 1); + size_colloc = ALIGN(size_colloc, BUFFER_ALIGNMENT_SIZE(64)); + size_colloc <<= 1; + size_colloc = ALIGN(size_colloc, BUFFER_ALIGNMENT_SIZE(512)); + size_colloc += (col_zero_size + SIZE_H264D_BUFTAB_T * 2); + comv_size = size_colloc * yuv_buf_min_count; + comv_size += BUFFER_ALIGNMENT_SIZE(512); + + return comv_size; +} + +static u32 size_h264d_bse_cmd_buf(u32 height) +{ + u32 aligned_height = ALIGN(height, BUFFER_ALIGNMENT_SIZE(32)); + + return min_t(u32, (((aligned_height + 15) >> 4) * 3 * 4), + H264D_MAX_SLICE) * + SIZE_H264D_BSE_CMD_PER_BUF; +} + +static u32 size_h264d_vpp_cmd_buf(u32 height) +{ + u32 size = 0; + u32 aligned_height = ALIGN(height, BUFFER_ALIGNMENT_SIZE(32)); + + size = min_t(u32, (((aligned_height + 15) >> 4) * 3 * 4), + H264D_MAX_SLICE) * + SIZE_H264D_VPP_CMD_PER_BUF; + if (size > VPP_CMD_MAX_SIZE) + size = VPP_CMD_MAX_SIZE; + return size; +} + +static u32 hfi_iris2_h264d_non_comv_size(u32 width, u32 height, + u32 num_vpp_pipes) +{ + u32 size; + u32 size_bse, size_vpp; + + size_bse = size_h264d_bse_cmd_buf(height); + size_vpp = size_h264d_vpp_cmd_buf(height); + size = ALIGN(size_bse, VENUS_DMA_ALIGNMENT) + + ALIGN(size_vpp, VENUS_DMA_ALIGNMENT) + + ALIGN(SIZE_HW_PIC(SIZE_H264D_HW_PIC_T), VENUS_DMA_ALIGNMENT) + + ALIGN(SIZE_H264D_LB_FE_TOP_DATA(width, height), + VENUS_DMA_ALIGNMENT) + + ALIGN(SIZE_H264D_LB_FE_TOP_CTRL(width, height), + VENUS_DMA_ALIGNMENT) + + ALIGN(SIZE_H264D_LB_FE_LEFT_CTRL(width, height), + VENUS_DMA_ALIGNMENT) * num_vpp_pipes + + ALIGN(SIZE_H264D_LB_SE_TOP_CTRL(width, height), + VENUS_DMA_ALIGNMENT) + + ALIGN(SIZE_H264D_LB_SE_LEFT_CTRL(width, height), + VENUS_DMA_ALIGNMENT) * num_vpp_pipes + + ALIGN(SIZE_H264D_LB_PE_TOP_DATA(width, height), + VENUS_DMA_ALIGNMENT) + + ALIGN(SIZE_H264D_LB_VSP_TOP(width, height), + VENUS_DMA_ALIGNMENT) + + ALIGN(SIZE_H264D_LB_RECON_DMA_METADATA_WR(width, height), + VENUS_DMA_ALIGNMENT) * 2 + + ALIGN(SIZE_H264D_QP(width, height), VENUS_DMA_ALIGNMENT); + size = ALIGN(size, VENUS_DMA_ALIGNMENT); + return size; +} + +static u32 size_h264d_hw_bin_buffer(u32 width, u32 height, u32 delay, + u32 num_vpp_pipes) +{ + u32 size_yuv, size_bin_hdr, size_bin_res; + u32 size = 0; + u32 product; + + product = width * height; + size_yuv = (product <= BIN_BUFFER_THRESHOLD) ? + ((BIN_BUFFER_THRESHOLD * 3) >> 1) : + ((product * 3) >> 1); + + size_bin_hdr = size_yuv * H264_CABAC_HDR_RATIO_HD_TOT; + size_bin_res = size_yuv * H264_CABAC_RES_RATIO_HD_TOT; + size_bin_hdr = size_bin_hdr * (((((u32)(delay)) & 31) / 10) + 2) / 2; + size_bin_res = size_bin_res * (((((u32)(delay)) & 31) / 10) + 2) / 2; + size_bin_hdr = ALIGN(size_bin_hdr / num_vpp_pipes, + VENUS_DMA_ALIGNMENT) * num_vpp_pipes; + size_bin_res = ALIGN(size_bin_res / num_vpp_pipes, + VENUS_DMA_ALIGNMENT) * num_vpp_pipes; + size = size_bin_hdr + size_bin_res; + return size; +} + +static u32 calculate_h264d_scratch_size(struct msm_vidc_inst *inst, + u32 width, u32 height, bool is_interlaced, u32 delay, u32 num_vpp_pipes) +{ + u32 aligned_width = ALIGN(width, BUFFER_ALIGNMENT_SIZE(16)); + u32 aligned_height = ALIGN(height, BUFFER_ALIGNMENT_SIZE(16)); + u32 size = 0; + + if (!is_interlaced) + size = size_h264d_hw_bin_buffer(aligned_width, aligned_height, + delay, num_vpp_pipes); + else + size = 0; + + return size; +} + +static u32 size_h265d_bse_cmd_buf(u32 width, u32 height) +{ + u32 size; + + size = (ALIGN(width, LCU_MAX_SIZE_PELS) / LCU_MIN_SIZE_PELS) * + (ALIGN(height, LCU_MAX_SIZE_PELS) / LCU_MIN_SIZE_PELS) * + NUM_HW_PIC_BUF; + size = min_t(u32, size, H265D_MAX_SLICE + 1); + size = 2 * size * SIZE_H265D_BSE_CMD_PER_BUF; + size = ALIGN(size, VENUS_DMA_ALIGNMENT); + + return size; +} + +static u32 size_h265d_vpp_cmd_buf(u32 width, u32 height) +{ + u32 size = 0; + + size = (ALIGN(width, LCU_MAX_SIZE_PELS) / LCU_MIN_SIZE_PELS) * + (ALIGN(height, LCU_MAX_SIZE_PELS) / LCU_MIN_SIZE_PELS) * + NUM_HW_PIC_BUF; + size = min_t(u32, size, H265D_MAX_SLICE + 1); + size = ALIGN(size, 4); + size = 2 * size * SIZE_H265D_VPP_CMD_PER_BUF; + size = ALIGN(size, VENUS_DMA_ALIGNMENT); + if (size > VPP_CMD_MAX_SIZE) + size = VPP_CMD_MAX_SIZE; + return size; +} + +static u32 hfi_iris2_h265d_comv_size(u32 width, u32 height, + u32 yuv_buf_count_min) +{ + u32 size = 0; + + size = ALIGN(((((width + 15) >> 4) * ((height + 15) >> 4)) << 8), + BUFFER_ALIGNMENT_SIZE(512)); + size *= yuv_buf_count_min; + size += BUFFER_ALIGNMENT_SIZE(512); + + return size; +} + +static u32 hfi_iris2_h265d_non_comv_size(u32 width, u32 height, + u32 num_vpp_pipes) +{ + u32 size_bse, size_vpp; + u32 size = 0; + + size_bse = size_h265d_bse_cmd_buf(width, height); + size_vpp = size_h265d_vpp_cmd_buf(width, height); + size = ALIGN(size_bse, VENUS_DMA_ALIGNMENT) + + ALIGN(size_vpp, VENUS_DMA_ALIGNMENT) + + ALIGN(NUM_HW_PIC_BUF * 20 * 22 * 4, VENUS_DMA_ALIGNMENT) + + ALIGN(2 * sizeof(u16) * + (ALIGN(width, LCU_MAX_SIZE_PELS) / LCU_MIN_SIZE_PELS) * + (ALIGN(height, LCU_MAX_SIZE_PELS) / LCU_MIN_SIZE_PELS), + VENUS_DMA_ALIGNMENT) + + ALIGN(SIZE_HW_PIC(SIZE_H265D_HW_PIC_T), VENUS_DMA_ALIGNMENT) + + ALIGN(SIZE_H265D_LB_FE_TOP_DATA(width, height), + VENUS_DMA_ALIGNMENT) + + ALIGN(SIZE_H265D_LB_FE_TOP_CTRL(width, height), + VENUS_DMA_ALIGNMENT) + + ALIGN(SIZE_H265D_LB_FE_LEFT_CTRL(width, height), + VENUS_DMA_ALIGNMENT) * num_vpp_pipes + + ALIGN(SIZE_H265D_LB_SE_LEFT_CTRL(width, height), + VENUS_DMA_ALIGNMENT) * num_vpp_pipes + + ALIGN(SIZE_H265D_LB_SE_TOP_CTRL(width, height), + VENUS_DMA_ALIGNMENT) + + ALIGN(SIZE_H265D_LB_PE_TOP_DATA(width, height), + VENUS_DMA_ALIGNMENT) + + ALIGN(SIZE_H265D_LB_VSP_TOP(width, height), + VENUS_DMA_ALIGNMENT) + + ALIGN(SIZE_H265D_LB_VSP_LEFT(width, height), + VENUS_DMA_ALIGNMENT) * num_vpp_pipes + + ALIGN(SIZE_H265D_LB_RECON_DMA_METADATA_WR(width, height), + VENUS_DMA_ALIGNMENT) * 4 + + ALIGN(SIZE_H265D_QP(width, height), VENUS_DMA_ALIGNMENT); + size = ALIGN(size, VENUS_DMA_ALIGNMENT); + return size; +} + +static u32 size_h265d_hw_bin_buffer(u32 width, u32 height, u32 delay, + u32 num_vpp_pipes) +{ + u32 size = 0; + u32 size_yuv, size_bin_hdr, size_bin_res; + u32 product; + + product = width * height; + size_yuv = (product <= BIN_BUFFER_THRESHOLD) ? + ((BIN_BUFFER_THRESHOLD * 3) >> 1) : + ((product * 3) >> 1); + size_bin_hdr = size_yuv * H265_CABAC_HDR_RATIO_HD_TOT; + size_bin_res = size_yuv * H265_CABAC_RES_RATIO_HD_TOT; + size_bin_hdr = size_bin_hdr * (((((u32)(delay)) & 31) / 10) + 2) / 2; + size_bin_res = size_bin_res * (((((u32)(delay)) & 31) / 10) + 2) / 2; + size_bin_hdr = ALIGN(size_bin_hdr / num_vpp_pipes, + VENUS_DMA_ALIGNMENT) * num_vpp_pipes; + size_bin_res = ALIGN(size_bin_res / num_vpp_pipes, + VENUS_DMA_ALIGNMENT) * num_vpp_pipes; + size = size_bin_hdr + size_bin_res; + + return size; +} + +static u32 calculate_h265d_scratch_size(struct msm_vidc_inst *inst, + u32 width, u32 height, bool is_interlaced, u32 delay, u32 num_vpp_pipes) +{ + u32 aligned_width = ALIGN(width, BUFFER_ALIGNMENT_SIZE(16)); + u32 aligned_height = ALIGN(height, BUFFER_ALIGNMENT_SIZE(16)); + u32 size = 0; + + if (!is_interlaced) + size = size_h265d_hw_bin_buffer(aligned_width, aligned_height, + delay, num_vpp_pipes); + else + size = 0; + + return size; +} + +static u32 calculate_vpxd_scratch_size(struct msm_vidc_inst *inst, + u32 width, u32 height, bool is_interlaced, u32 delay, u32 num_vpp_pipes) +{ + u32 aligned_width = ALIGN(width, BUFFER_ALIGNMENT_SIZE(16)); + u32 aligned_height = ALIGN(height, BUFFER_ALIGNMENT_SIZE(16)); + u32 size = 0; + u32 size_yuv = aligned_width * aligned_height * 3 / 2; + + if (!is_interlaced) { + /* binbuffer1_size + binbufer2_size */ + u32 binbuffer1_size = 0, binbuffer2_size = 0; + + binbuffer1_size = ALIGN(max_t(u32, size_yuv, + ((BIN_BUFFER_THRESHOLD * 3) >> 1)) * + VPX_DECODER_FRAME_CONCURENCY_LVL * + VPX_DECODER_FRAME_BIN_HDR_BUDGET_RATIO_NUM / + VPX_DECODER_FRAME_BIN_HDR_BUDGET_RATIO_DEN, + VENUS_DMA_ALIGNMENT); + binbuffer2_size = ALIGN(max_t(u32, size_yuv, + ((BIN_BUFFER_THRESHOLD * 3) >> 1)) * + VPX_DECODER_FRAME_CONCURENCY_LVL * + VPX_DECODER_FRAME_BIN_RES_BUDGET_RATIO_NUM / + VPX_DECODER_FRAME_BIN_RES_BUDGET_RATIO_DEN, + VENUS_DMA_ALIGNMENT); + size = binbuffer1_size + binbuffer2_size; + size = size * num_vpp_pipes; + } else { + size = 0; + } + + return size; +} + +static u32 calculate_mpeg2d_scratch_size(struct msm_vidc_inst *inst, + u32 width, u32 height, bool is_interlaced, u32 delay, u32 num_vpp_pipes) +{ + return 0; +} + +static u32 calculate_enc_scratch_size(struct msm_vidc_inst *inst, + u32 width, u32 height, u32 work_mode, u32 lcu_size, u32 num_vpp_pipes) +{ + u32 aligned_width, aligned_height, bitstream_size; + u32 total_bitbin_buffers = 0, size_singlePipe, bitbin_size = 0; + u32 sao_bin_buffer_size, padded_bin_size, size = 0; + + aligned_width = ALIGN(width, lcu_size); + aligned_height = ALIGN(height, lcu_size); + bitstream_size = msm_vidc_encoder_output_size(inst); + + bitstream_size = ALIGN(bitstream_size, VENUS_DMA_ALIGNMENT); + if (1) { // TODO: work_mode == HFI_WORKMODE_2) { + total_bitbin_buffers = 3; + bitbin_size = bitstream_size * 17 / 10; + bitbin_size = ALIGN(bitbin_size, VENUS_DMA_ALIGNMENT); + } else { + total_bitbin_buffers = 1; + bitstream_size = aligned_width * aligned_height * 3; + bitbin_size = ALIGN(bitstream_size, VENUS_DMA_ALIGNMENT); + } + if (num_vpp_pipes > 2) + size_singlePipe = bitbin_size / 2; + else + size_singlePipe = bitbin_size; + // TODO + //if (inst->rc_type == RATE_CONTROL_LOSSLESS) + // size_singlePipe <<= 1; + size_singlePipe = ALIGN(size_singlePipe, VENUS_DMA_ALIGNMENT); + sao_bin_buffer_size = (64 * (((width + BUFFER_ALIGNMENT_SIZE(32)) * + (height + BUFFER_ALIGNMENT_SIZE(32))) >> 10)) + 384; + padded_bin_size = ALIGN(size_singlePipe, VENUS_DMA_ALIGNMENT); + size_singlePipe = sao_bin_buffer_size + padded_bin_size; + size_singlePipe = ALIGN(size_singlePipe, VENUS_DMA_ALIGNMENT); + bitbin_size = size_singlePipe * num_vpp_pipes; + size = ALIGN(bitbin_size, VENUS_DMA_ALIGNMENT) * total_bitbin_buffers + + 512; + + return size; +} + +static u32 calculate_h264e_scratch_size(struct msm_vidc_inst *inst, + u32 width, u32 height, u32 work_mode, u32 num_vpp_pipes) +{ + return calculate_enc_scratch_size(inst, width, height, work_mode, 16, + num_vpp_pipes); +} + +static u32 calculate_h265e_scratch_size(struct msm_vidc_inst *inst, + u32 width, u32 height, u32 work_mode, u32 num_vpp_pipes) +{ + return calculate_enc_scratch_size(inst, width, height, work_mode, 32, + num_vpp_pipes); +} + +static u32 calculate_h264d_scratch1_size(struct msm_vidc_inst *inst, + u32 width, u32 height, u32 min_buf_count, + bool split_mode_enabled, u32 num_vpp_pipes) +{ + u32 co_mv_size = 0, nonco_mv_size = 0; + u32 vpss_lb_size = 0; + u32 size = 0; + + co_mv_size = hfi_iris2_h264d_comv_size(width, height, min_buf_count); + nonco_mv_size = hfi_iris2_h264d_non_comv_size(width, height, + num_vpp_pipes); + if (split_mode_enabled) + vpss_lb_size = size_vpss_lb(width, height, num_vpp_pipes); + size = co_mv_size + nonco_mv_size + vpss_lb_size; + return size; +} + +static u32 calculate_h265d_scratch1_size(struct msm_vidc_inst *inst, + u32 width, u32 height, u32 min_buf_count, + bool split_mode_enabled, u32 num_vpp_pipes) +{ + u32 co_mv_size = 0, nonco_mv_size = 0; + u32 vpss_lb_size = 0; + u32 size = 0; + + co_mv_size = hfi_iris2_h265d_comv_size(width, height, min_buf_count); + nonco_mv_size = + hfi_iris2_h265d_non_comv_size(width, height, num_vpp_pipes); + if (split_mode_enabled) + vpss_lb_size = size_vpss_lb(width, height, num_vpp_pipes); + + size = co_mv_size + nonco_mv_size + vpss_lb_size + + HDR10_HIST_EXTRADATA_SIZE; + return size; +} + +static u32 calculate_vp9d_scratch1_size(struct msm_vidc_inst *inst, + u32 width, u32 height, u32 min_buf_count, + bool split_mode_enabled, u32 num_vpp_pipes) +{ + u32 vpss_lb_size = 0; + u32 size = 0; + + size = ALIGN(SIZE_VPXD_LB_FE_LEFT_CTRL(width, height), + VENUS_DMA_ALIGNMENT) * num_vpp_pipes + + ALIGN(SIZE_VPXD_LB_SE_LEFT_CTRL(width, height), + VENUS_DMA_ALIGNMENT) * num_vpp_pipes + + ALIGN(SIZE_VP9D_LB_VSP_TOP(width, height), + VENUS_DMA_ALIGNMENT) + + ALIGN(SIZE_VPXD_LB_FE_TOP_CTRL(width, height), + VENUS_DMA_ALIGNMENT) + + 2 * ALIGN(SIZE_VPXD_LB_RECON_DMA_METADATA_WR(width, height), + VENUS_DMA_ALIGNMENT) + + ALIGN(SIZE_VPXD_LB_SE_TOP_CTRL(width, height), + VENUS_DMA_ALIGNMENT) + + ALIGN(SIZE_VP9D_LB_PE_TOP_DATA(width, height), + VENUS_DMA_ALIGNMENT) + + ALIGN(SIZE_VP9D_LB_FE_TOP_DATA(width, height), + VENUS_DMA_ALIGNMENT); + if (split_mode_enabled) + vpss_lb_size = size_vpss_lb(width, height, num_vpp_pipes); + + size += vpss_lb_size + HDR10_HIST_EXTRADATA_SIZE; + return size; +} + +static u32 calculate_mpeg2d_scratch1_size(struct msm_vidc_inst *inst, + u32 width, u32 height, u32 min_buf_count, + bool split_mode_enabled, u32 num_vpp_pipes) +{ + u32 vpss_lb_size = 0; + u32 size = 0; + + size = ALIGN(SIZE_VPXD_LB_FE_LEFT_CTRL(width, height), + VENUS_DMA_ALIGNMENT) * num_vpp_pipes + + ALIGN(SIZE_VPXD_LB_SE_LEFT_CTRL(width, height), + VENUS_DMA_ALIGNMENT) * num_vpp_pipes + + ALIGN(SIZE_VP8D_LB_VSP_TOP(width, height), + VENUS_DMA_ALIGNMENT) + + ALIGN(SIZE_VPXD_LB_FE_TOP_CTRL(width, height), + VENUS_DMA_ALIGNMENT) + + 2 * ALIGN(SIZE_VPXD_LB_RECON_DMA_METADATA_WR(width, height), + VENUS_DMA_ALIGNMENT) + + ALIGN(SIZE_VPXD_LB_SE_TOP_CTRL(width, height), + VENUS_DMA_ALIGNMENT) + + ALIGN(SIZE_VP8D_LB_PE_TOP_DATA(width, height), + VENUS_DMA_ALIGNMENT) + + ALIGN(SIZE_VP8D_LB_FE_TOP_DATA(width, height), + VENUS_DMA_ALIGNMENT); + if (split_mode_enabled) + vpss_lb_size = size_vpss_lb(width, height, num_vpp_pipes); + + size += vpss_lb_size; + return size; +} + +static u32 calculate_enc_scratch1_size(struct msm_vidc_inst *inst, + u32 width, u32 height, u32 lcu_size, u32 num_ref, bool ten_bit, + u32 num_vpp_pipes, bool is_h265) +{ + u32 line_buf_ctrl_size, line_buf_data_size, leftline_buf_ctrl_size; + u32 line_buf_sde_size, sps_pps_slice_hdr, topline_buf_ctrl_size_FE; + u32 leftline_buf_ctrl_size_FE, line_buf_recon_pix_size; + u32 leftline_buf_recon_pix_size, lambda_lut_size, override_buffer_size; + u32 col_mv_buf_size, vpp_reg_buffer_size, ir_buffer_size; + u32 vpss_line_buf, leftline_buf_meta_recony, col_rc_buf_size; + u32 h265e_framerc_bufsize, h265e_lcubitcnt_bufsize; + u32 h265e_lcubitmap_bufsize, se_stats_bufsize; + u32 bse_reg_buffer_size, bse_slice_cmd_buffer_size, slice_info_bufsize; + u32 line_buf_ctrl_size_buffid2, slice_cmd_buffer_size; + u32 width_lcu_num, height_lcu_num, width_coded, height_coded; + u32 frame_num_lcu, linebuf_meta_recon_uv, topline_bufsize_fe_1stg_sao; + u32 output_mv_bufsize = 0, temp_scratch_mv_bufsize = 0; + u32 size, bit_depth, num_LCUMB; + u32 vpss_lineBufferSize_1 = 0; + u32 width_mb_num = ((width + 15) >> 4); + u32 height_mb_num = ((height + 15) >> 4); + + width_lcu_num = ((width)+(lcu_size)-1) / (lcu_size); + height_lcu_num = ((height)+(lcu_size)-1) / (lcu_size); + frame_num_lcu = width_lcu_num * height_lcu_num; + width_coded = width_lcu_num * (lcu_size); + height_coded = height_lcu_num * (lcu_size); + num_LCUMB = (height_coded / lcu_size) * ((width_coded + lcu_size * 8) / lcu_size); + slice_info_bufsize = (256 + (frame_num_lcu << 4)); + slice_info_bufsize = ALIGN(slice_info_bufsize, VENUS_DMA_ALIGNMENT); + line_buf_ctrl_size = ALIGN(width_coded, VENUS_DMA_ALIGNMENT); + line_buf_ctrl_size_buffid2 = ALIGN(width_coded, VENUS_DMA_ALIGNMENT); + + bit_depth = ten_bit ? 10 : 8; + line_buf_data_size = (((((bit_depth * width_coded + 1024) + + (VENUS_DMA_ALIGNMENT - 1)) & (~(VENUS_DMA_ALIGNMENT - 1))) * 1) + + (((((bit_depth * width_coded + 1024) >> 1) + + (VENUS_DMA_ALIGNMENT - 1)) & + (~(VENUS_DMA_ALIGNMENT - 1))) * 2)); + leftline_buf_ctrl_size = (is_h265) ? + ((height_coded + (BUFFER_ALIGNMENT_SIZE(32))) / + BUFFER_ALIGNMENT_SIZE(32) * 4 * 16) : + ((height_coded + 15) / 16 * 5 * 16); + if (num_vpp_pipes > 1) { + leftline_buf_ctrl_size += BUFFER_ALIGNMENT_SIZE(512); + leftline_buf_ctrl_size = ALIGN(leftline_buf_ctrl_size, + BUFFER_ALIGNMENT_SIZE(512)) * num_vpp_pipes; + } + leftline_buf_ctrl_size = ALIGN(leftline_buf_ctrl_size, + VENUS_DMA_ALIGNMENT); + leftline_buf_recon_pix_size = (((ten_bit + 1) * 2 * + (height_coded)+VENUS_DMA_ALIGNMENT) + + (VENUS_DMA_ALIGNMENT << (num_vpp_pipes - 1)) - 1) & + (~((VENUS_DMA_ALIGNMENT << (num_vpp_pipes - 1)) - 1)) * 1; + topline_buf_ctrl_size_FE = (is_h265) ? (64 * (width_coded >> 5)) : + (VENUS_DMA_ALIGNMENT + 16 * (width_coded >> 4)); + topline_buf_ctrl_size_FE = ALIGN(topline_buf_ctrl_size_FE, + VENUS_DMA_ALIGNMENT); + leftline_buf_ctrl_size_FE = (((VENUS_DMA_ALIGNMENT + 64 * + (height_coded >> 4)) + + (VENUS_DMA_ALIGNMENT << (num_vpp_pipes - 1)) - 1) & + (~((VENUS_DMA_ALIGNMENT << (num_vpp_pipes - 1)) - 1)) * 1) * + num_vpp_pipes; + leftline_buf_meta_recony = (VENUS_DMA_ALIGNMENT + 64 * + ((height_coded) / (8 * (ten_bit ? 4 : 8)))); + leftline_buf_meta_recony = ALIGN(leftline_buf_meta_recony, + VENUS_DMA_ALIGNMENT); + leftline_buf_meta_recony = leftline_buf_meta_recony * + num_vpp_pipes; + linebuf_meta_recon_uv = (VENUS_DMA_ALIGNMENT + 64 * + ((height_coded) / (4 * (ten_bit ? 4 : 8)))); + linebuf_meta_recon_uv = ALIGN(linebuf_meta_recon_uv, + VENUS_DMA_ALIGNMENT); + linebuf_meta_recon_uv = linebuf_meta_recon_uv * + num_vpp_pipes; + line_buf_recon_pix_size = ((ten_bit ? 3 : 2) * width_coded); + line_buf_recon_pix_size = ALIGN(line_buf_recon_pix_size, + VENUS_DMA_ALIGNMENT); + slice_cmd_buffer_size = ALIGN(20480, VENUS_DMA_ALIGNMENT); + sps_pps_slice_hdr = 2048 + 4096; + col_mv_buf_size = (is_h265) ? (16 * ((frame_num_lcu << 2) + + BUFFER_ALIGNMENT_SIZE(32))) : + (3 * 16 * (width_lcu_num * height_lcu_num + + BUFFER_ALIGNMENT_SIZE(32))); + col_mv_buf_size = ALIGN(col_mv_buf_size, VENUS_DMA_ALIGNMENT) + * (num_ref + 1); + col_rc_buf_size = (((width_mb_num + 7) >> 3) * + 16 * 2 * height_mb_num); + col_rc_buf_size = ALIGN(col_rc_buf_size, + VENUS_DMA_ALIGNMENT) * HFI_MAX_COL_FRAME; + h265e_framerc_bufsize = (is_h265) ? (256 + 16 * + (14 + (((height_coded >> 5) + 7) >> 3))) : + (256 + 16 * (14 + (((height_coded >> 4) + 7) >> 3))); + h265e_framerc_bufsize *= 6; /* multiply by max numtilescol*/ + if (num_vpp_pipes > 1) + h265e_framerc_bufsize = ALIGN(h265e_framerc_bufsize, + VENUS_DMA_ALIGNMENT) * num_vpp_pipes; + + h265e_framerc_bufsize = ALIGN(h265e_framerc_bufsize, + BUFFER_ALIGNMENT_SIZE(512)) * HFI_MAX_COL_FRAME; + h265e_lcubitcnt_bufsize = (256 + 4 * frame_num_lcu); + h265e_lcubitcnt_bufsize = ALIGN(h265e_lcubitcnt_bufsize, + VENUS_DMA_ALIGNMENT); + h265e_lcubitmap_bufsize = 256 + (frame_num_lcu >> 3); + h265e_lcubitmap_bufsize = ALIGN(h265e_lcubitmap_bufsize, + VENUS_DMA_ALIGNMENT); + line_buf_sde_size = 256 + 16 * (width_coded >> 4); + line_buf_sde_size = ALIGN(line_buf_sde_size, VENUS_DMA_ALIGNMENT); + if ((width_coded * height_coded) > (4096 * 2160)) + se_stats_bufsize = 0; + else if ((width_coded * height_coded) > (1920 * 1088)) + se_stats_bufsize = (40 * 4 * frame_num_lcu + 256 + 256); + else + se_stats_bufsize = (1024 * frame_num_lcu + 256 + 256); + + se_stats_bufsize = ALIGN(se_stats_bufsize, VENUS_DMA_ALIGNMENT) * 2; + bse_slice_cmd_buffer_size = ((((8192 << 2) + 7) & (~7)) * 6); + bse_reg_buffer_size = ((((512 << 3) + 7) & (~7)) * 4); + vpp_reg_buffer_size = ((((HFI_VENUS_VPPSG_MAX_REGISTERS << 3) + 31) & + (~31)) * 10); + lambda_lut_size = (256 * 11); + override_buffer_size = 16 * ((num_LCUMB + 7) >> 3); + override_buffer_size = ALIGN(override_buffer_size, + VENUS_DMA_ALIGNMENT) * 2; + ir_buffer_size = (((frame_num_lcu << 1) + 7) & (~7)) * 3; + vpss_lineBufferSize_1 = ((((8192) >> 2) << 5) * num_vpp_pipes) + 64; + vpss_line_buf = (((((max(width_coded, height_coded) + 3) >> 2) << 5) + + 256) * 16) + vpss_lineBufferSize_1; + topline_bufsize_fe_1stg_sao = (16 * (width_coded >> 5)); + topline_bufsize_fe_1stg_sao = ALIGN(topline_bufsize_fe_1stg_sao, + VENUS_DMA_ALIGNMENT); + size = line_buf_ctrl_size + line_buf_data_size + + line_buf_ctrl_size_buffid2 + leftline_buf_ctrl_size + + vpss_line_buf + col_mv_buf_size + topline_buf_ctrl_size_FE + + leftline_buf_ctrl_size_FE + line_buf_recon_pix_size + + leftline_buf_recon_pix_size + leftline_buf_meta_recony + + linebuf_meta_recon_uv + col_rc_buf_size + + h265e_framerc_bufsize + h265e_lcubitcnt_bufsize + + h265e_lcubitmap_bufsize + line_buf_sde_size + + topline_bufsize_fe_1stg_sao + override_buffer_size + + bse_reg_buffer_size + vpp_reg_buffer_size + + sps_pps_slice_hdr + slice_cmd_buffer_size + + bse_slice_cmd_buffer_size + ir_buffer_size + slice_info_bufsize + + lambda_lut_size + se_stats_bufsize + temp_scratch_mv_bufsize + + output_mv_bufsize + 1024; + return size; +} + +static u32 calculate_h264e_scratch1_size(struct msm_vidc_inst *inst, + u32 width, u32 height, u32 num_ref, bool ten_bit, u32 num_vpp_pipes) +{ + return calculate_enc_scratch1_size(inst, width, height, 16, + num_ref, ten_bit, num_vpp_pipes, false); +} + +static u32 calculate_h265e_scratch1_size(struct msm_vidc_inst *inst, + u32 width, u32 height, u32 num_ref, bool ten_bit, u32 num_vpp_pipes) +{ + return calculate_enc_scratch1_size(inst, width, height, 32, + num_ref, ten_bit, num_vpp_pipes, true); +} + +static u32 hfi_ubwc_calc_metadata_plane_stride(u32 width, + u32 metadata_stride_multi, u32 tile_width_pels) +{ + return ALIGN(((width + (tile_width_pels - 1)) / tile_width_pels), + metadata_stride_multi); +} + +static u32 hfi_ubwc_metadata_plane_bufheight(u32 height, + u32 metadata_height_multi, u32 tile_height_pels) +{ + return ALIGN(((height + (tile_height_pels - 1)) / tile_height_pels), + metadata_height_multi); +} + +static u32 hfi_ubwc_metadata_plane_buffer_size(u32 metadata_stride, + u32 metadata_buf_height) +{ + return ALIGN(metadata_stride * metadata_buf_height, + BUFFER_ALIGNMENT_4096_BYTES); +} + +static u32 calculate_enc_scratch2_size(struct msm_vidc_inst *inst, + u32 width, u32 height, u32 num_ref, bool ten_bit) +{ + u32 aligned_width, aligned_height, chroma_height, ref_buf_height; + u32 luma_size, chroma_size; + u32 metadata_stride, meta_buf_height, meta_size_y, meta_size_c; + u32 ref_luma_stride_bytes, ref_chroma_height_bytes; + u32 ref_buf_size = 0, ref_stride; + u32 size; + + if (!ten_bit) { + aligned_height = ALIGN(height, HFI_VENUS_HEIGHT_ALIGNMENT); + chroma_height = height >> 1; + chroma_height = ALIGN(chroma_height, + HFI_VENUS_HEIGHT_ALIGNMENT); + aligned_width = ALIGN(width, HFI_VENUS_WIDTH_ALIGNMENT); + metadata_stride = hfi_ubwc_calc_metadata_plane_stride(width, + 64, HFI_COLOR_FORMAT_YUV420_NV12_UBWC_Y_TILE_WIDTH); + meta_buf_height = hfi_ubwc_metadata_plane_bufheight(height, + 16, HFI_COLOR_FORMAT_YUV420_NV12_UBWC_Y_TILE_HEIGHT); + meta_size_y = hfi_ubwc_metadata_plane_buffer_size( + metadata_stride, meta_buf_height); + meta_size_c = hfi_ubwc_metadata_plane_buffer_size( + metadata_stride, meta_buf_height); + size = (aligned_height + chroma_height) * aligned_width + + meta_size_y + meta_size_c; + size = (size * (num_ref+3)) + 4096; + } else { + ref_buf_height = (height + (HFI_VENUS_HEIGHT_ALIGNMENT - 1)) + & (~(HFI_VENUS_HEIGHT_ALIGNMENT - 1)); + ref_luma_stride_bytes = ((width + SYSTEM_LAL_TILE10 - 1) / + SYSTEM_LAL_TILE10) * SYSTEM_LAL_TILE10; + ref_stride = 4 * (ref_luma_stride_bytes / 3); + ref_stride = (ref_stride + (BUFFER_ALIGNMENT_SIZE(128) - 1)) & + (~(BUFFER_ALIGNMENT_SIZE(128) - 1)); + luma_size = ref_buf_height * ref_stride; + ref_chroma_height_bytes = (((height + 1) >> 1) + + (BUFFER_ALIGNMENT_SIZE(32) - 1)) & + (~(BUFFER_ALIGNMENT_SIZE(32) - 1)); + chroma_size = ref_stride * ref_chroma_height_bytes; + luma_size = (luma_size + (BUFFER_ALIGNMENT_4096_BYTES - 1)) & + (~(BUFFER_ALIGNMENT_4096_BYTES - 1)); + chroma_size = (chroma_size + + (BUFFER_ALIGNMENT_4096_BYTES - 1)) & + (~(BUFFER_ALIGNMENT_4096_BYTES - 1)); + ref_buf_size = luma_size + chroma_size; + metadata_stride = hfi_ubwc_calc_metadata_plane_stride( + width, + VENUS_METADATA_STRIDE_MULTIPLE, + HFI_COLOR_FORMAT_YUV420_TP10_UBWC_Y_TILE_WIDTH); + meta_buf_height = hfi_ubwc_metadata_plane_bufheight( + height, + VENUS_METADATA_HEIGHT_MULTIPLE, + HFI_COLOR_FORMAT_YUV420_TP10_UBWC_Y_TILE_HEIGHT); + meta_size_y = hfi_ubwc_metadata_plane_buffer_size( + metadata_stride, meta_buf_height); + meta_size_c = hfi_ubwc_metadata_plane_buffer_size( + metadata_stride, meta_buf_height); + size = ref_buf_size + meta_size_y + meta_size_c; + size = (size * (num_ref+3)) + 4096; + } + return size; +} + +static u32 calculate_enc_persist_size(void) +{ + return HFI_IRIS2_ENC_PERSIST_SIZE; +} + +static u32 calculate_h264d_persist1_size(void) +{ + u32 size = 0; + + size = ALIGN((SIZE_SLIST_BUF_H264 * NUM_SLIST_BUF_H264), + VENUS_DMA_ALIGNMENT); + return size; +} + +static u32 calculate_h265d_persist1_size(void) +{ + u32 size = 0; + + size = ALIGN((SIZE_SLIST_BUF_H265 * NUM_SLIST_BUF_H265 + H265_NUM_TILE + * sizeof(u32)), VENUS_DMA_ALIGNMENT); + return size; +} + +static u32 calculate_vp9d_persist1_size(void) +{ + u32 size = 0; + + size = ALIGN(VP9_NUM_PROBABILITY_TABLE_BUF * VP9_PROB_TABLE_SIZE, + VENUS_DMA_ALIGNMENT) + + ALIGN(HFI_IRIS2_VP9D_COMV_SIZE, VENUS_DMA_ALIGNMENT) + + ALIGN(MAX_SUPERFRAME_HEADER_LEN, VENUS_DMA_ALIGNMENT) + + ALIGN(VP9_UDC_HEADER_BUF_SIZE, VENUS_DMA_ALIGNMENT) + + ALIGN(VP9_NUM_FRAME_INFO_BUF * CCE_TILE_OFFSET_SIZE, + VENUS_DMA_ALIGNMENT); + return size; +} + +static u32 calculate_mpeg2d_persist1_size(void) +{ + return QMATRIX_SIZE + MP2D_QPDUMP_SIZE; +} + +/* encoder internal buffers */ +u32 msm_vidc_decoder_scratch_size_iris2(struct msm_vidc_inst *inst) +{ + u32 size = 0; + u32 width, height, num_vpp_pipes; + struct v4l2_format *f; + bool is_interlaced; + u32 vpp_delay; + + d_vpr_h("%s()\n", __func__); + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return size; + } + + num_vpp_pipes = 0; + vpp_delay = 0; + is_interlaced = false; //(inst->pic_struct == MSM_VIDC_PIC_STRUCT_MAYBE_INTERLACED); + f = &inst->fmts[INPUT_PORT]; + width = f->fmt.pix.width; + height = f->fmt.pix.height; + + if (inst->codec == MSM_VIDC_H264) { + size = calculate_h264d_scratch_size(inst, width, height, + is_interlaced, vpp_delay, num_vpp_pipes); + } else if (inst->codec == MSM_VIDC_HEVC) { + size = calculate_h265d_scratch_size(inst, width, height, + is_interlaced, vpp_delay, num_vpp_pipes); + } else if (inst->codec == MSM_VIDC_MPEG2) { + size = calculate_mpeg2d_scratch_size(inst, width, height, + is_interlaced, vpp_delay, num_vpp_pipes); + } else if (inst->codec == MSM_VIDC_VP9) { + size = calculate_vpxd_scratch_size(inst, width, height, + is_interlaced, vpp_delay, num_vpp_pipes); + } + + return size; +} + +u32 msm_vidc_decoder_scratch_1_size_iris2(struct msm_vidc_inst *inst) +{ + u32 size = 0; + u32 width, height, out_min_count, num_vpp_pipes; + struct v4l2_format *f; + u32 vpp_delay; + + d_vpr_h("%s()\n", __func__); + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return size; + } + + num_vpp_pipes = 0; + vpp_delay = 0; + f = &inst->fmts[INPUT_PORT]; + width = f->fmt.pix.width; + height = f->fmt.pix.height; + out_min_count = inst->buffers.output.min_count; + out_min_count = max(vpp_delay + 1, out_min_count); + + if (inst->codec == MSM_VIDC_H264) { + size = calculate_h264d_scratch1_size(inst, width, height, + out_min_count, is_secondary_output_mode(inst), + num_vpp_pipes); + } else if (inst->codec == MSM_VIDC_HEVC) { + size = calculate_h265d_scratch1_size(inst, width, height, + out_min_count, is_secondary_output_mode(inst), + num_vpp_pipes); + } else if (inst->codec == MSM_VIDC_MPEG2) { + size = calculate_mpeg2d_scratch1_size(inst, width, height, + out_min_count, is_secondary_output_mode(inst), + num_vpp_pipes); + } else if (inst->codec == MSM_VIDC_VP9) { + size = calculate_vp9d_scratch1_size(inst, width, height, + out_min_count, is_secondary_output_mode(inst), + num_vpp_pipes); + } + + return size; +} + +u32 msm_vidc_decoder_persist_1_size_iris2(struct msm_vidc_inst *inst) +{ + u32 size = 0; + + d_vpr_h("%s()\n", __func__); + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return size; + } + + if (inst->codec == MSM_VIDC_H264) { + size = calculate_h264d_persist1_size(); + } else if (inst->codec == MSM_VIDC_HEVC) { + size = calculate_h265d_persist1_size(); + } else if (inst->codec == MSM_VIDC_MPEG2) { + size = calculate_mpeg2d_persist1_size(); + } else if (inst->codec == MSM_VIDC_VP9) { + size = calculate_vp9d_persist1_size(); + } + + return size; +} + +/* encoder internal buffers */ +u32 msm_vidc_encoder_scratch_size_iris2(struct msm_vidc_inst *inst) +{ + u32 size = 0; + u32 width, height, num_vpp_pipes; + struct v4l2_format *f; + + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return size; + } + + num_vpp_pipes = 4; //inst->core->platform_data->num_vpp_pipes; + f = &inst->fmts[OUTPUT_PORT]; + width = f->fmt.pix.width; + height = f->fmt.pix.height; + + if (inst->codec == MSM_VIDC_H264) { + size = calculate_h264e_scratch_size(inst, width, height, + 2, //inst->clk_data.work_mode, + num_vpp_pipes); + } else if (inst->codec == MSM_VIDC_HEVC) { + size = calculate_h265e_scratch_size(inst, width, height, + 2, //inst->clk_data.work_mode, + num_vpp_pipes); + } + + return size; +} + +u32 msm_vidc_encoder_scratch_1_size_iris2(struct msm_vidc_inst *inst) +{ + u32 size = 0; + u32 width, height, num_ref, num_vpp_pipes; + bool is_tenbit = false; + struct v4l2_format *f; + + if (!inst || !inst->core) { + d_vpr_e("%s: Instance is null!", __func__); + return size; + } + + num_vpp_pipes = 4; //inst->core->platform_data->num_vpp_pipes; + f = &inst->fmts[OUTPUT_PORT]; + width = f->fmt.pix.width; + height = f->fmt.pix.height; + num_ref = 4; //msm_vidc_get_num_ref_frames(inst); + is_tenbit = false; //(inst->bit_depth == MSM_VIDC_BIT_DEPTH_10); + + if (inst->codec == MSM_VIDC_H264) { + size = calculate_h264e_scratch1_size(inst, width, height, + num_ref, is_tenbit, num_vpp_pipes); + } else if (inst->codec == MSM_VIDC_HEVC) { + size = calculate_h265e_scratch1_size(inst, width, height, + num_ref, is_tenbit, num_vpp_pipes); + } + + return size; +} + +u32 msm_vidc_encoder_scratch_2_size_iris2(struct msm_vidc_inst *inst) +{ + u32 width, height, num_ref; + bool is_tenbit = false; + struct v4l2_format *f; + + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return 0; + } + + f = &inst->fmts[OUTPUT_PORT]; + width = f->fmt.pix.width; + height = f->fmt.pix.height; + num_ref = 4; //msm_vidc_get_num_ref_frames(inst); + is_tenbit = false; //(inst->bit_depth == MSM_VIDC_BIT_DEPTH_10); + + return calculate_enc_scratch2_size(inst, width, height, + num_ref, is_tenbit); +} + +u32 msm_vidc_encoder_persist_size_iris2(struct msm_vidc_inst *inst) +{ + return calculate_enc_persist_size(); +} diff --git a/driver/variant/iris2/src/msm_vidc_iris2.c b/driver/variant/iris2/src/msm_vidc_iris2.c index f1c8bb3317..8225c8e7e2 100644 --- a/driver/variant/iris2/src/msm_vidc_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_iris2.c @@ -6,10 +6,14 @@ #include #include "msm_vidc_iris2.h" +#include "msm_vidc_buffer_iris2.h" #include "venus_hfi.h" +#include "msm_vidc_inst.h" #include "msm_vidc_core.h" +#include "msm_vidc_driver.h" #include "msm_vidc_dt.h" #include "msm_vidc_internal.h" +#include "msm_vidc_buffer.h" #include "msm_vidc_debug.h" @@ -490,52 +494,161 @@ static struct msm_vidc_venus_ops iris2_ops = { .noc_error_info = __noc_error_info_iris2, }; -static int msm_vidc_buffer_size(struct msm_vidc_inst *inst, - enum msm_vidc_buffer_type type) +static int msm_vidc_buffer_size_iris2(struct msm_vidc_inst *inst, + enum msm_vidc_buffer_type buffer_type) { - int rc = 0; - - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } + int size = 0; d_vpr_h("%s()\n", __func__); - return rc; + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return size; + } + + if (is_decode_session(inst)) { + switch (buffer_type) { + case MSM_VIDC_BUF_INPUT: + size = msm_vidc_decoder_input_size(inst); + break; + case MSM_VIDC_BUF_OUTPUT: + size = msm_vidc_decoder_output_size(inst); + break; + case MSM_VIDC_BUF_INPUT_META: + size = msm_vidc_decoder_input_meta_size(inst); + break; + case MSM_VIDC_BUF_OUTPUT_META: + size = msm_vidc_decoder_output_meta_size(inst); + break; + case MSM_VIDC_BUF_SCRATCH: + size = msm_vidc_decoder_scratch_size_iris2(inst); + break; + case MSM_VIDC_BUF_SCRATCH_1: + size = msm_vidc_decoder_scratch_1_size_iris2(inst); + break; + case MSM_VIDC_BUF_PERSIST_1: + size = msm_vidc_decoder_persist_1_size_iris2(inst); + break; + default: + break; + } + } else if (is_encode_session(inst)) { + switch (buffer_type) { + case MSM_VIDC_BUF_INPUT: + size = msm_vidc_encoder_input_size(inst); + break; + case MSM_VIDC_BUF_OUTPUT: + size = msm_vidc_encoder_output_size(inst); + break; + case MSM_VIDC_BUF_INPUT_META: + size = msm_vidc_encoder_input_meta_size(inst); + break; + case MSM_VIDC_BUF_OUTPUT_META: + size = msm_vidc_encoder_output_meta_size(inst); + break; + case MSM_VIDC_BUF_SCRATCH: + size = msm_vidc_encoder_scratch_size_iris2(inst); + break; + case MSM_VIDC_BUF_SCRATCH_1: + size = msm_vidc_encoder_scratch_1_size_iris2(inst); + break; + case MSM_VIDC_BUF_SCRATCH_2: + size = msm_vidc_encoder_scratch_2_size_iris2(inst); + break; + case MSM_VIDC_BUF_PERSIST: + size = msm_vidc_encoder_persist_size_iris2(inst); + break; + default: + break; + } + } + + return size; } -static int msm_vidc_buffer_min_count(struct msm_vidc_inst *inst, - enum msm_vidc_buffer_type type) +static int msm_vidc_min_count_iris2(struct msm_vidc_inst *inst, + enum msm_vidc_buffer_type buffer_type) { - int rc = 0; + int count = 0; if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - d_vpr_h("%s()\n", __func__); - return rc; + + if (is_decode_session(inst)) { + switch (buffer_type) { + case MSM_VIDC_BUF_INPUT: + case MSM_VIDC_BUF_INPUT_META: + count = msm_vidc_input_min_count(inst); + break; + case MSM_VIDC_BUF_OUTPUT: + case MSM_VIDC_BUF_OUTPUT_META: + count = msm_vidc_output_min_count(inst); + break; + case MSM_VIDC_BUF_SCRATCH: + case MSM_VIDC_BUF_SCRATCH_1: + case MSM_VIDC_BUF_PERSIST_1: + count = 1; + break; + default: + break; + } + } else if (is_encode_session(inst)) { + switch (buffer_type) { + case MSM_VIDC_BUF_INPUT: + case MSM_VIDC_BUF_INPUT_META: + count = msm_vidc_input_min_count(inst); + break; + case MSM_VIDC_BUF_OUTPUT: + case MSM_VIDC_BUF_OUTPUT_META: + count = msm_vidc_output_min_count(inst); + break; + case MSM_VIDC_BUF_SCRATCH: + case MSM_VIDC_BUF_SCRATCH_1: + case MSM_VIDC_BUF_SCRATCH_2: + case MSM_VIDC_BUF_PERSIST: + count = 1; + break; + default: + break; + } + } + + return count; } -static int msm_vidc_buffer_extra_count(struct msm_vidc_inst *inst, - enum msm_vidc_buffer_type type) +static int msm_vidc_extra_count_iris2(struct msm_vidc_inst *inst, + enum msm_vidc_buffer_type buffer_type) { - int rc = 0; + int count = 0; if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - d_vpr_h("%s()\n", __func__); - return rc; + + switch (buffer_type) { + case MSM_VIDC_BUF_INPUT: + case MSM_VIDC_BUF_INPUT_META: + count = msm_vidc_input_extra_count(inst); + break; + case MSM_VIDC_BUF_OUTPUT: + case MSM_VIDC_BUF_OUTPUT_META: + count = msm_vidc_output_extra_count(inst); + break; + default: + break; + } + + return count; } static struct msm_vidc_session_ops msm_session_ops = { - .buffer_size = msm_vidc_buffer_size, - .min_count = msm_vidc_buffer_min_count, - .extra_count = msm_vidc_buffer_extra_count, + .buffer_size = msm_vidc_buffer_size_iris2, + .min_count = msm_vidc_min_count_iris2, + .extra_count = msm_vidc_extra_count_iris2, .calc_freq = NULL, .calc_bw = NULL, .decide_work_route = NULL, diff --git a/driver/vidc/inc/hfi_command.h b/driver/vidc/inc/hfi_command.h index 43458ec476..c2215f91b3 100644 --- a/driver/vidc/inc/hfi_command.h +++ b/driver/vidc/inc/hfi_command.h @@ -81,12 +81,11 @@ enum hfi_buffer_type { HFI_BUFFER_BITSTREAM = 0x00000001, HFI_BUFFER_RAW = 0x00000002, HFI_BUFFER_METADATA = 0x00000003, - HFI_BUFFER_DPB = 0x00000010, - HFI_BUFFER_BIN = 0x00000011, - HFI_BUFFER_LINE = 0x00000012, - HFI_BUFFER_ARP = 0x00000013, - HFI_BUFFER_COMV = 0x00000014, - HFI_BUFFER_NON_COMV = 0x00000015, + HFI_BUFFER_SCRATCH = 0x00000010, + HFI_BUFFER_SCRATCH_1 = 0x00000011, + HFI_BUFFER_SCRATCH_2 = 0x00000012, + HFI_BUFFER_PERSIST = 0x00000013, + HFI_BUFFER_PERSIST_1 = 0x00000014, HFI_BUFFER_SUBCACHE = 0x00000020, HFI_BUFFER_SFR = 0x00000021, }; diff --git a/driver/vidc/inc/hfi_packet.h b/driver/vidc/inc/hfi_packet.h index 6b1a9bf230..545dac94ab 100644 --- a/driver/vidc/inc/hfi_packet.h +++ b/driver/vidc/inc/hfi_packet.h @@ -13,6 +13,13 @@ #include "hfi_property.h" #include "hfi_definition.h" +u32 get_hfi_port(struct msm_vidc_inst *inst, + enum msm_vidc_buffer_type buffer_type); +u32 get_hfi_buffer_type(enum msm_vidc_domain_type domain, + enum msm_vidc_buffer_type buffer_type); +u32 get_hfi_codec(struct msm_vidc_inst *inst); +int get_hfi_buffer(struct msm_vidc_inst *inst, + struct msm_vidc_buffer *buffer, struct hfi_buffer *buf); int hfi_create_header(u8 *pkt, u32 session_id, u32 header_id, u32 num_packets, u32 total_size); int hfi_create_packet(u8 *packet, u32 packet_size, u32 *offset, @@ -32,8 +39,8 @@ int hfi_packet_sys_debug_config(struct msm_vidc_core *core, int hfi_packet_session_command(struct msm_vidc_inst *inst, u32 pkt_type, u32 flags, u32 port, u32 session_id, u32 payload_type, void *payload, u32 payload_size); -int hfi_packet_create_property(struct msm_vidc_inst *inst, - void *pkt, u32 pkt_size, u32 pkt_type, u32 flags, - u32 port, u32 payload, u32 payload_type, u32 payload_size); +int hfi_packet_session_property(struct msm_vidc_inst *inst, + u32 pkt_type, u32 flags, u32 port, + u32 payload_type, void *payload, u32 payload_size); #endif // _HFI_PACKET_H_ diff --git a/driver/vidc/inc/msm_vdec.h b/driver/vidc/inc/msm_vdec.h index 2498f31bad..b3b8f5bb4d 100644 --- a/driver/vidc/inc/msm_vdec.h +++ b/driver/vidc/inc/msm_vdec.h @@ -9,6 +9,10 @@ #include "msm_vidc_core.h" #include "msm_vidc_inst.h" +int msm_vdec_stop_input(struct msm_vidc_inst *inst); +int msm_vdec_start_input(struct msm_vidc_inst *inst); +int msm_vdec_stop_output(struct msm_vidc_inst *inst); +int msm_vdec_start_output(struct msm_vidc_inst *inst); int msm_vdec_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f); int msm_vdec_g_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f); int msm_vdec_inst_init(struct msm_vidc_inst *inst); diff --git a/driver/vidc/inc/msm_vidc_buffer.h b/driver/vidc/inc/msm_vidc_buffer.h new file mode 100644 index 0000000000..12890b4937 --- /dev/null +++ b/driver/vidc/inc/msm_vidc_buffer.h @@ -0,0 +1,24 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) 2020, The Linux Foundation. All rights reserved. + */ + +#ifndef __H_MSM_VIDC_BUFFER_H__ +#define __H_MSM_VIDC_BUFFER_H__ + +#include "msm_vidc_inst.h" + +u32 msm_vidc_input_min_count(struct msm_vidc_inst *inst); +u32 msm_vidc_output_min_count(struct msm_vidc_inst *inst); +u32 msm_vidc_input_extra_count(struct msm_vidc_inst *inst); +u32 msm_vidc_output_extra_count(struct msm_vidc_inst *inst); +u32 msm_vidc_decoder_input_size(struct msm_vidc_inst *inst); +u32 msm_vidc_decoder_output_size(struct msm_vidc_inst *inst); +u32 msm_vidc_decoder_input_meta_size(struct msm_vidc_inst *inst); +u32 msm_vidc_decoder_output_meta_size(struct msm_vidc_inst *inst); +u32 msm_vidc_encoder_input_size(struct msm_vidc_inst *inst); +u32 msm_vidc_encoder_output_size(struct msm_vidc_inst *inst); +u32 msm_vidc_encoder_input_meta_size(struct msm_vidc_inst *inst); +u32 msm_vidc_encoder_output_meta_size(struct msm_vidc_inst *inst); + +#endif // __H_MSM_VIDC_BUFFER_H__ diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index e9584d2c4e..f414b7e736 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -8,7 +8,6 @@ #include #include - #include "msm_vidc_internal.h" #include "msm_vidc_core.h" #include "msm_vidc_inst.h" @@ -23,7 +22,60 @@ static inline is_encode_session(struct msm_vidc_inst *inst) return inst->domain == MSM_VIDC_ENCODER; } +static inline is_secure_session(struct msm_vidc_inst *inst) +{ + return false; +} + +static inline is_input_buffer(enum msm_vidc_buffer_type buffer_type) +{ + return buffer_type == MSM_VIDC_BUF_INPUT; +} + +static inline is_output_buffer(enum msm_vidc_buffer_type buffer_type) +{ + return buffer_type == MSM_VIDC_BUF_OUTPUT; +} + +static inline is_input_meta_buffer(enum msm_vidc_buffer_type buffer_type) +{ + return buffer_type == MSM_VIDC_BUF_INPUT_META; +} + +static inline is_output_meta_buffer(enum msm_vidc_buffer_type buffer_type) +{ + return buffer_type == MSM_VIDC_BUF_OUTPUT_META; +} + +static inline is_internal_buffer(enum msm_vidc_buffer_type buffer_type) +{ + return buffer_type == MSM_VIDC_BUF_SCRATCH || + buffer_type == MSM_VIDC_BUF_SCRATCH_1 || + buffer_type == MSM_VIDC_BUF_SCRATCH_2 || + buffer_type == MSM_VIDC_BUF_PERSIST || + buffer_type == MSM_VIDC_BUF_PERSIST_1; +} + +static inline bool is_secondary_output_mode(struct msm_vidc_inst *inst) +{ + return false; // TODO: inst->stream_output_mode == HAL_VIDEO_DECODER_SECONDARY; +} + +static inline bool is_thumbnail_session(struct msm_vidc_inst *inst) +{ + return false; // TODO: fix it +} + +int msm_vidc_change_inst_state(struct msm_vidc_inst *inst, + enum msm_vidc_inst_state state); +int msm_vidc_create_internal_buffers(struct msm_vidc_inst *inst, + enum msm_vidc_buffer_type buffer_type); +int msm_vidc_queue_internal_buffers(struct msm_vidc_inst *inst, + enum msm_vidc_buffer_type buffer_type); +int msm_vidc_release_internal_buffers(struct msm_vidc_inst *inst, + enum msm_vidc_buffer_type buffer_type); int msm_vidc_add_session(struct msm_vidc_inst *inst); +int msm_vidc_session_open(struct msm_vidc_inst *inst); int msm_vidc_core_init(struct msm_vidc_core *core); int msm_vidc_smmu_fault_handler(struct iommu_domain *domain, struct device *dev, unsigned long iova, int flags, void *data); @@ -34,14 +86,17 @@ void msm_vidc_pm_work_handler(struct work_struct *work); void msm_vidc_fw_unload_handler(struct work_struct *work); void msm_vidc_batch_handler(struct work_struct *work); int msm_vidc_setup_event_queue(struct msm_vidc_inst *inst); -int msm_vidc_queue_init(struct msm_vidc_inst *inst); +int msm_vidc_vb2_queue_init(struct msm_vidc_inst *inst); u32 msm_vidc_convert_color_fmt(u32 v4l2_fmt); int msm_vidc_get_control(struct msm_vidc_inst *inst, struct v4l2_ctrl *ctrl); -int msm_vidc_get_port_from_type(u32 type); -int msm_vidc_start_input(struct msm_vidc_inst *inst); -int msm_vidc_start_output(struct msm_vidc_inst *inst); -int msm_vidc_stop_input(struct msm_vidc_inst *inst); -int msm_vidc_stop_output(struct msm_vidc_inst *inst); - +int msm_vidc_get_port_from_v4l2_type(u32 type); +u32 msm_vidc_get_buffer_region(struct msm_vidc_inst *inst, + enum msm_vidc_buffer_type buffer_type); +struct msm_vidc_buffer_info *msm_vidc_get_buffer_info(struct msm_vidc_inst *inst, + enum msm_vidc_buffer_type buffer_type); +struct msm_vidc_map_info *msm_vidc_get_map_info(struct msm_vidc_inst *inst, + enum msm_vidc_buffer_type buffer_type); +struct msm_vidc_alloc_info *msm_vidc_get_alloc_info(struct msm_vidc_inst *inst, + enum msm_vidc_buffer_type buffer_type); #endif // _MSM_VIDC_DRIVER_H_ diff --git a/driver/vidc/inc/msm_vidc_inst.h b/driver/vidc/inc/msm_vidc_inst.h index 8544e5e098..ad3f4b06eb 100644 --- a/driver/vidc/inc/msm_vidc_inst.h +++ b/driver/vidc/inc/msm_vidc_inst.h @@ -90,6 +90,7 @@ struct msm_vidc_inst { struct v4l2_ctrl **ctrls; u32 num_ctrls; struct vb2_queue vb2q[MAX_PORT]; + struct msm_vidc_crop crop; struct msm_vidc_properties prop; struct msm_vidc_power power; struct msm_vidc_buffers buffers; @@ -102,6 +103,7 @@ struct msm_vidc_inst { struct list_head input_ts; struct list_head enc_input_crs; struct list_head decode_bitrate_data; + bool session_created; struct dentry *debugfs_root; struct msm_vidc_debug debug; }; diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index fa7dd0b70c..c087ad86f4 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -96,21 +96,23 @@ enum msm_vidc_colorformat_type { }; enum msm_vidc_buffer_type { - MSM_VIDC_QUEUE = BIT(0), - MSM_VIDC_INPUT = BIT(1), - MSM_VIDC_OUTPUT = BIT(2), - MSM_VIDC_INPUT_META = BIT(3), - MSM_VIDC_OUTPUT_META = BIT(4), - MSM_VIDC_DPB = BIT(5), - MSM_VIDC_ARP = BIT(6), - MSM_VIDC_LINE = BIT(7), - MSM_VIDC_BIN = BIT(8), + MSM_VIDC_BUF_QUEUE = BIT(0), + MSM_VIDC_BUF_INPUT = BIT(1), + MSM_VIDC_BUF_OUTPUT = BIT(2), + MSM_VIDC_BUF_INPUT_META = BIT(3), + MSM_VIDC_BUF_OUTPUT_META = BIT(4), + MSM_VIDC_BUF_SCRATCH = BIT(5), + MSM_VIDC_BUF_SCRATCH_1 = BIT(6), + MSM_VIDC_BUF_SCRATCH_2 = BIT(7), + MSM_VIDC_BUF_PERSIST = BIT(8), + MSM_VIDC_BUF_PERSIST_1 = BIT(9), }; enum msm_vidc_buffer_attributes { - MSM_VIDC_DEFERRED_SUBMISSION = BIT(0), - MSM_VIDC_READ_ONLY = BIT(1), - MSM_VIDC_PENDING_RELEASE = BIT(2), + MSM_VIDC_ATTR_DEFERRED_SUBMISSION = BIT(0), + MSM_VIDC_ATTR_READ_ONLY = BIT(1), + MSM_VIDC_ATTR_PENDING_RELEASE = BIT(2), + MSM_VIDC_ATTR_QUEUED = BIT(3), }; enum msm_vidc_buffer_region { @@ -385,6 +387,7 @@ struct msm_vidc_power { }; struct msm_vidc_alloc { + struct list_head list; enum msm_vidc_buffer_type buffer_type; enum msm_vidc_buffer_region region; u32 size; @@ -400,6 +403,7 @@ struct msm_vidc_alloc_info { }; struct msm_vidc_map { + struct list_head list; bool valid; enum msm_vidc_buffer_type buffer_type; enum msm_vidc_buffer_region region; @@ -415,6 +419,7 @@ struct msm_vidc_map_info { }; struct msm_vidc_buffer { + struct list_head list; bool valid; enum msm_vidc_buffer_type type; u32 index; @@ -437,6 +442,13 @@ struct msm_vidc_buffer_info { u32 size; }; +struct msm_vidc_crop { + u32 x; + u32 y; + u32 width; + u32 height; +}; + struct msm_vidc_properties { u32 frame_rate; u32 operating_rate; diff --git a/driver/vidc/inc/venus_hfi.h b/driver/vidc/inc/venus_hfi.h index e7833b9f5e..99f5d264c4 100644 --- a/driver/vidc/inc/venus_hfi.h +++ b/driver/vidc/inc/venus_hfi.h @@ -46,10 +46,19 @@ struct hfi_resource_syscache_info_type { struct hfi_resource_subcache_type rg_subcache_entries[1]; }; +int venus_hfi_queue_buffer(struct msm_vidc_inst *inst, + struct msm_vidc_buffer *buffer, struct msm_vidc_buffer *metabuf); +int venus_hfi_release_buffer(struct msm_vidc_inst *inst, + struct msm_vidc_buffer *buffer); +int venus_hfi_start_input(struct msm_vidc_inst *inst); +int venus_hfi_stop_input(struct msm_vidc_inst *inst); +int venus_hfi_start_output(struct msm_vidc_inst *inst); +int venus_hfi_stop_output(struct msm_vidc_inst *inst); +int venus_hfi_session_close(struct msm_vidc_inst *inst); +int venus_hfi_session_open(struct msm_vidc_inst *inst); int venus_hfi_core_init(struct msm_vidc_core *core); int venus_hfi_core_release(struct msm_vidc_core *core); int venus_hfi_suspend(struct msm_vidc_core *core); -int venus_hfi_session_open(struct msm_vidc_core *core, struct msm_vidc_inst *inst); void venus_hfi_work_handler(struct work_struct *work); void venus_hfi_pm_work_handler(struct work_struct *work); diff --git a/driver/vidc/src/hfi_packet.c b/driver/vidc/src/hfi_packet.c index e3be1150cd..b992e288ef 100644 --- a/driver/vidc/src/hfi_packet.c +++ b/driver/vidc/src/hfi_packet.c @@ -6,59 +6,136 @@ #include "hfi_packet.h" #include "msm_vidc_core.h" #include "msm_vidc_inst.h" +#include "msm_vidc_driver.h" #include "msm_vidc_debug.h" #include "msm_vidc_platform.h" -static u32 get_hfi_buffer_type(enum msm_vidc_domain_type domain, - enum msm_vidc_buffer_type buf_type) +u32 get_hfi_port(struct msm_vidc_inst *inst, + enum msm_vidc_buffer_type buffer_type) { - switch (buf_type) { - case MSM_VIDC_QUEUE: - return 0; /* TODO */ - case MSM_VIDC_INPUT: + u32 hfi_port = HFI_PORT_NONE; + + if (is_decode_session(inst)) { + switch(buffer_type) { + case MSM_VIDC_BUF_INPUT: + case MSM_VIDC_BUF_INPUT_META: + hfi_port = HFI_PORT_BITSTREAM; + break; + case MSM_VIDC_BUF_OUTPUT: + case MSM_VIDC_BUF_OUTPUT_META: + hfi_port = HFI_PORT_RAW; + break; + default: + s_vpr_e(inst->sid, "%s: invalid buffer type %d\n", + __func__, buffer_type); + break; + } + } else if (is_encode_session(inst)) { + switch (buffer_type) { + case MSM_VIDC_BUF_INPUT: + case MSM_VIDC_BUF_INPUT_META: + hfi_port = HFI_PORT_RAW; + break; + case MSM_VIDC_BUF_OUTPUT: + case MSM_VIDC_BUF_OUTPUT_META: + hfi_port = HFI_PORT_BITSTREAM; + break; + default: + s_vpr_e(inst->sid, "%s: invalid buffer type %d\n", + __func__, buffer_type); + break; + } + } else { + s_vpr_e(inst->sid, "%s: invalid domain %#x\n", + __func__, inst->domain); + } + + return hfi_port; +} + +u32 get_hfi_buffer_type(enum msm_vidc_domain_type domain, + enum msm_vidc_buffer_type buffer_type) +{ + switch (buffer_type) { + case MSM_VIDC_BUF_INPUT: if (domain == MSM_VIDC_DECODER) - return HFI_PORT_BITSTREAM; + return HFI_BUFFER_BITSTREAM; else - return HFI_PORT_RAW; - case MSM_VIDC_OUTPUT: + return HFI_BUFFER_RAW; + case MSM_VIDC_BUF_OUTPUT: if (domain == MSM_VIDC_DECODER) - return HFI_PORT_RAW; + return HFI_BUFFER_RAW; else - return HFI_PORT_BITSTREAM; - case MSM_VIDC_INPUT_META: - case MSM_VIDC_OUTPUT_META: + return HFI_BUFFER_BITSTREAM; + case MSM_VIDC_BUF_INPUT_META: + case MSM_VIDC_BUF_OUTPUT_META: return HFI_BUFFER_METADATA; - case MSM_VIDC_DPB: - return HFI_BUFFER_DPB; - case MSM_VIDC_ARP: - return HFI_BUFFER_ARP; - case MSM_VIDC_LINE: - return HFI_BUFFER_LINE; - case MSM_VIDC_BIN: - return HFI_BUFFER_BIN; + case MSM_VIDC_BUF_SCRATCH: + return HFI_BUFFER_SCRATCH; + case MSM_VIDC_BUF_SCRATCH_1: + return HFI_BUFFER_SCRATCH_1; + case MSM_VIDC_BUF_SCRATCH_2: + return HFI_BUFFER_SCRATCH_2; + case MSM_VIDC_BUF_PERSIST: + return HFI_BUFFER_PERSIST; + case MSM_VIDC_BUF_PERSIST_1: + return HFI_BUFFER_PERSIST_1; default: - d_vpr_e("%s: Invalid buffer type %d\n", - __func__, buf_type); + d_vpr_e("invalid buffer type %d\n", + buffer_type); return 0; } } -static u32 get_hfi_buffer_flags(enum msm_vidc_buffer_attributes attr) +u32 get_hfi_codec(struct msm_vidc_inst *inst) { - switch (attr) { - case MSM_VIDC_DEFERRED_SUBMISSION: - return 0; /*not sure what it should be mapped to??*/ - case MSM_VIDC_READ_ONLY: - return HFI_BUF_HOST_FLAG_READONLY; - case MSM_VIDC_PENDING_RELEASE: - return HFI_BUF_HOST_FLAG_RELEASE; + switch (inst->codec) { + case MSM_VIDC_H264: + if (inst->domain == MSM_VIDC_ENCODER) + return HFI_CODEC_ENCODE_AVC; + else + return HFI_CODEC_DECODE_AVC; + case MSM_VIDC_HEVC: + if (inst->domain == MSM_VIDC_ENCODER) + return HFI_CODEC_ENCODE_HEVC; + else + return HFI_CODEC_DECODE_HEVC; + case MSM_VIDC_VP9: + return HFI_CODEC_DECODE_VP9; + case MSM_VIDC_MPEG2: + return HFI_CODEC_DECODE_MPEG2; default: - d_vpr_e("%s: Invalid buffer attribute %d\n", - __func__, attr); + d_vpr_e("invalid codec %d, domain %d\n", + inst->codec, inst->domain); return 0; } } +int get_hfi_buffer(struct msm_vidc_inst *inst, + struct msm_vidc_buffer *buffer, struct hfi_buffer *buf) +{ + if (!inst || !buffer || !buf) { + d_vpr_e("%: invalid params\n", __func__); + return -EINVAL; + } + + memset(buf, 0, sizeof(struct hfi_buffer)); + buf->type = get_hfi_buffer_type(inst->domain, buffer->type); + buf->index = buffer->index; + buf->base_address = buffer->device_addr; + buf->addr_offset = 0; + buf->buffer_size = buffer->buffer_size; + buf->data_offset = buffer->data_offset; + buf->data_size = buffer->data_size; + if (buffer->attr & MSM_VIDC_ATTR_READ_ONLY) + buf->flags |= HFI_BUF_HOST_FLAG_READONLY; + if (buffer->attr & MSM_VIDC_ATTR_PENDING_RELEASE) + buf->flags |= HFI_BUF_HOST_FLAG_RELEASE; + buf->timestamp = buffer->timestamp; + + return 0; +} + int hfi_create_header(u8 *pkt, u32 session_id, u32 header_id, u32 num_packets, u32 total_size) { @@ -102,34 +179,6 @@ int hfi_create_packet(u8 *packet, u32 packet_size, u32 *offset, return 0; } -int hfi_create_buffer(u8 *packet, u32 packet_size, u32 *offset, - enum msm_vidc_domain_type domain, struct msm_vidc_buffer *data) -{ - u32 available_size = packet_size - *offset; - u32 buf_size = sizeof(struct hfi_buffer); - struct hfi_buffer *buf = (struct hfi_buffer *)packet; - - if (available_size < sizeof(struct hfi_buffer)) { - d_vpr_e("%s: Bad buffer Size for buffer type %d\n", - __func__, data->type); - return -EINVAL; - } - - memset(buf, 0, buf_size); - - buf->type = get_hfi_buffer_type(domain, data->type); - buf->index = data->index; - buf->base_address = data->device_addr; - buf->addr_offset = 0; - buf->buffer_size = data->buffer_size; - buf->data_offset = data->data_offset; - buf->data_size = data->data_size; - buf->flags = get_hfi_buffer_flags(data->attr); - buf->timestamp = data->timestamp; - *offset = *offset + buf_size; - return 0; -} - int hfi_packet_sys_init(struct msm_vidc_core *core, u8 *pkt, u32 pkt_size) { @@ -474,34 +523,35 @@ err_cmd: return rc; } -int hfi_packet_create_property(struct msm_vidc_inst *inst, - void *pkt, u32 pkt_size, u32 pkt_type, u32 flags, - u32 port, u32 payload, u32 payload_type, u32 payload_size) +int hfi_packet_session_property(struct msm_vidc_inst *inst, + u32 pkt_type, u32 flags, u32 port, u32 payload_type, + void *payload, u32 payload_size) { int rc = 0; u32 num_packets = 0, offset = 0; struct msm_vidc_core *core; - if (!inst || !inst->core || !pkt) { + if (!inst || !inst->core || !inst->packet) { d_vpr_e("%s: Invalid params\n", __func__); return -EINVAL; } core = inst->core; offset = sizeof(struct hfi_header); - rc = hfi_create_packet(pkt, pkt_size, &offset, + rc = hfi_create_packet(inst->packet, inst->packet_size, + &offset, pkt_type, flags, payload_type, port, core->packet_id++, - &payload, + payload, payload_size); if (rc) goto err_prop; num_packets++; - rc = hfi_create_header(pkt, inst->session_id, + rc = hfi_create_header(inst->packet, inst->session_id, core->header_id++, num_packets, offset); @@ -515,4 +565,4 @@ int hfi_packet_create_property(struct msm_vidc_inst *inst, err_prop: d_vpr_e("%s: create packet failed\n", __func__); return rc; -} +} \ No newline at end of file diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 1db9736722..4dd04f5103 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -13,6 +13,7 @@ #include "msm_vidc_internal.h" #include "msm_vidc_platform.h" #include "msm_vidc_debug.h" +#include "venus_hfi.h" static int msm_vdec_codec_change(struct msm_vidc_inst *inst, u32 codec) { @@ -29,6 +30,222 @@ static int msm_vdec_codec_change(struct msm_vidc_inst *inst, u32 codec) return rc; } +static int msm_vdec_set_input_properties(struct msm_vidc_inst *inst) +{ + int rc = 0; + + d_vpr_h("%s()\n", __func__); + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + return rc; +} + +static int msm_vdec_get_input_internal_buffers(struct msm_vidc_inst *inst) +{ + int rc = 0; + struct msm_vidc_core *core; + + d_vpr_h("%s()\n", __func__); + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + core = inst->core; + + inst->buffers.scratch.size = call_session_op(core, buffer_size, + inst, MSM_VIDC_BUF_SCRATCH); + inst->buffers.scratch_1.size = call_session_op(core, buffer_size, + inst, MSM_VIDC_BUF_SCRATCH_1); + inst->buffers.persist_1.size = call_session_op(core, buffer_size, + inst, MSM_VIDC_BUF_PERSIST_1); + + inst->buffers.scratch.min_count = call_session_op(core, min_count, + inst, MSM_VIDC_BUF_SCRATCH); + inst->buffers.scratch_1.min_count = call_session_op(core, min_count, + inst, MSM_VIDC_BUF_SCRATCH_1); + inst->buffers.persist_1.min_count = call_session_op(core, min_count, + inst, MSM_VIDC_BUF_PERSIST_1); + + return rc; +} + +static int msm_vdec_create_input_internal_buffers(struct msm_vidc_inst *inst) +{ + int rc = 0; + + d_vpr_h("%s()\n", __func__); + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + rc = msm_vidc_create_internal_buffers(inst, MSM_VIDC_BUF_SCRATCH); + if (rc) + return rc; + rc = msm_vidc_create_internal_buffers(inst, MSM_VIDC_BUF_SCRATCH_1); + if (rc) + return rc; + rc = msm_vidc_create_internal_buffers(inst, MSM_VIDC_BUF_PERSIST_1); + if (rc) + return rc; + + return 0; +} + +static int msm_vdec_queue_input_internal_buffers(struct msm_vidc_inst *inst) +{ + int rc = 0; + + d_vpr_h("%s()\n", __func__); + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + rc = msm_vidc_queue_internal_buffers(inst, MSM_VIDC_BUF_SCRATCH); + if (rc) + return rc; + rc = msm_vidc_queue_internal_buffers(inst, MSM_VIDC_BUF_SCRATCH_1); + if (rc) + return rc; + rc = msm_vidc_queue_internal_buffers(inst, MSM_VIDC_BUF_PERSIST_1); + if (rc) + return rc; + + return 0; +} +/* +static int msm_vdec_release_input_internal_buffers(struct msm_vidc_inst *inst) +{ + int rc = 0; + + d_vpr_h("%s()\n", __func__); + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + rc = msm_vidc_release_internal_buffers(inst, MSM_VIDC_BUF_SCRATCH); + if (rc) + return rc; + rc = msm_vidc_release_internal_buffers(inst, MSM_VIDC_BUF_SCRATCH_1); + if (rc) + return rc; + rc = msm_vidc_release_internal_buffers(inst, MSM_VIDC_BUF_PERSIST_1); + if (rc) + return rc; + + return 0; +} +*/ +int msm_vdec_stop_input(struct msm_vidc_inst *inst) +{ + int rc = 0; + + d_vpr_h("%s()\n", __func__); + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + return rc; +} + +int msm_vdec_start_input(struct msm_vidc_inst *inst) +{ + int rc = 0; + struct msm_vidc_core *core; + + d_vpr_h("%s()\n", __func__); + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + core = inst->core; + + //rc = msm_vidc_check_session_supported(inst); + if (rc) + goto error; + //rc = msm_vidc_check_scaling_supported(inst); + if (rc) + goto error; + rc = call_session_op(core, decide_work_mode, inst); + if (rc) + goto error; + rc = call_session_op(core, decide_work_route, inst); + if (rc) + goto error; + + /* Decide bse vpp delay after work mode */ + //msm_vidc_set_bse_vpp_delay(inst); + + rc = msm_vdec_get_input_internal_buffers(inst); + if (rc) + goto error; + /* check for memory after all buffers calculation */ + //rc = msm_vidc_check_memory_supported(inst); + if (rc) + goto error; + + //msm_vidc_update_dcvs(inst); + //msm_vidc_update_batching(inst); + //msm_vidc_scale_power(inst); + + rc = msm_vdec_set_input_properties(inst); + if (rc) + goto error; + rc = msm_vdec_create_input_internal_buffers(inst); + if (rc) + goto error; + rc = msm_vdec_queue_input_internal_buffers(inst); + if (rc) + goto error; + + rc = venus_hfi_start_input(inst); + if (rc) + goto error; + + rc = msm_vidc_change_inst_state(inst, MSM_VIDC_START_INPUT); + if (rc) + goto error; + + d_vpr_h("%s: done\n", __func__); + return 0; + +error: + msm_vdec_stop_input(inst); + return rc; +} + +int msm_vdec_stop_output(struct msm_vidc_inst *inst) +{ + int rc = 0; + + d_vpr_h("%s()\n", __func__); + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + return rc; +} + +int msm_vdec_start_output(struct msm_vidc_inst *inst) +{ + int rc = 0; + + d_vpr_h("%s()\n", __func__); + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + return rc; +} + int msm_vdec_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) { int rc = 0; @@ -64,16 +281,16 @@ int msm_vdec_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) } fmt = &inst->fmts[INPUT_PORT]; fmt->type = INPUT_PLANE; - fmt->fmt.pix.width = f->fmt.pix.width; - fmt->fmt.pix.height = f->fmt.pix.height; + fmt->fmt.pix.width = ALIGN(f->fmt.pix.width, 16); + fmt->fmt.pix.height = ALIGN(f->fmt.pix.height, 16); fmt->fmt.pix.pixelformat = f->fmt.pix.pixelformat; fmt->fmt.pix.bytesperline = 0; fmt->fmt.pix.sizeimage = call_session_op(core, buffer_size, - inst, MSM_VIDC_INPUT); + inst, MSM_VIDC_BUF_INPUT); inst->buffers.input.min_count = - call_session_op(core, min_count, inst, MSM_VIDC_INPUT); + call_session_op(core, min_count, inst, MSM_VIDC_BUF_INPUT); inst->buffers.input.extra_count = - call_session_op(core, extra_count, inst, MSM_VIDC_INPUT); + call_session_op(core, extra_count, inst, MSM_VIDC_BUF_INPUT); if (inst->buffers.input.actual_count < inst->buffers.input.min_count + inst->buffers.input.extra_count) { @@ -83,6 +300,11 @@ int msm_vdec_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) } inst->buffers.input.size = fmt->fmt.pix.sizeimage; + // update crop dimensions + inst->crop.x = inst->crop.y = 0; + inst->crop.width = f->fmt.pix.width; + inst->crop.height = f->fmt.pix.height; + //rc = msm_vidc_check_session_supported(inst); if (rc) goto err_invalid_fmt; @@ -90,10 +312,14 @@ int msm_vdec_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) // mplane->pixelformat); s_vpr_h(inst->sid, "%s: input: codec %#x width %d height %d size %d min_count %d extra_count %d\n", - __func__, fmt->fmt.pix.pixelformat, fmt->fmt.pix.width, - fmt->fmt.pix.height, fmt->fmt.pix.sizeimage, + __func__, f->fmt.pix.pixelformat, f->fmt.pix.width, + f->fmt.pix.height, fmt->fmt.pix.sizeimage, inst->buffers.input.min_count, inst->buffers.input.extra_count); + + //msm_vidc_update_dcvs(inst); + //msm_vidc_update_batching(inst); + } else if (f->type == INPUT_META_PLANE) { if (inst->state == MSM_VIDC_START_INPUT) { d_vpr_e("%s: invalid state %d\n", __func__, inst->state); @@ -103,7 +329,7 @@ int msm_vdec_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) fmt->type = INPUT_META_PLANE; fmt->fmt.meta.dataformat = V4L2_PIX_FMT_VIDC_META; fmt->fmt.meta.buffersize = call_session_op(core, buffer_size, - inst, MSM_VIDC_INPUT_META); + inst, MSM_VIDC_BUF_INPUT_META); inst->buffers.input_meta.min_count = inst->buffers.input.min_count; inst->buffers.input_meta.extra_count = @@ -132,11 +358,11 @@ int msm_vdec_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) f->fmt.pix.height); fmt->fmt.pix.bytesperline = fmt->fmt.pix.width; fmt->fmt.pix.sizeimage = call_session_op(core, buffer_size, - inst, MSM_VIDC_OUTPUT); + inst, MSM_VIDC_BUF_OUTPUT); inst->buffers.output.min_count = - call_session_op(core, min_count, inst, MSM_VIDC_OUTPUT); + call_session_op(core, min_count, inst, MSM_VIDC_BUF_OUTPUT); inst->buffers.output.extra_count = - call_session_op(core, extra_count, inst, MSM_VIDC_OUTPUT); + call_session_op(core, extra_count, inst, MSM_VIDC_BUF_OUTPUT); if (inst->buffers.output.actual_count < inst->buffers.output.min_count + inst->buffers.output.extra_count) { @@ -164,7 +390,7 @@ int msm_vdec_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) fmt->type = OUTPUT_META_PLANE; fmt->fmt.meta.dataformat = V4L2_PIX_FMT_VIDC_META; fmt->fmt.meta.buffersize = call_session_op(core, buffer_size, - inst, MSM_VIDC_OUTPUT_META); + inst, MSM_VIDC_BUF_OUTPUT_META); inst->buffers.output_meta.min_count = inst->buffers.output.min_count; inst->buffers.output_meta.extra_count = @@ -177,7 +403,11 @@ int msm_vdec_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) __func__, fmt->fmt.meta.buffersize, inst->buffers.output_meta.min_count, inst->buffers.output_meta.extra_count); + } else { + s_vpr_e(inst->sid, "%s: invalid type %d\n", __func__, f->type); + goto err_invalid_fmt; } + memcpy(f, fmt, sizeof(struct v4l2_format)); err_invalid_fmt: return rc; @@ -233,11 +463,11 @@ int msm_vdec_inst_init(struct msm_vidc_inst *inst) f->fmt.pix.pixelformat = V4L2_PIX_FMT_H264; f->fmt.pix.bytesperline = 0; f->fmt.pix.sizeimage = call_session_op(core, buffer_size, - inst, MSM_VIDC_INPUT); + inst, MSM_VIDC_BUF_INPUT); inst->buffers.input.min_count = - call_session_op(core, min_count, inst, MSM_VIDC_INPUT); + call_session_op(core, min_count, inst, MSM_VIDC_BUF_INPUT); inst->buffers.input.extra_count = - call_session_op(core, extra_count, inst, MSM_VIDC_INPUT); + call_session_op(core, extra_count, inst, MSM_VIDC_BUF_INPUT); inst->buffers.input.actual_count = inst->buffers.input.min_count + inst->buffers.input.extra_count; @@ -247,7 +477,7 @@ int msm_vdec_inst_init(struct msm_vidc_inst *inst) f->type = INPUT_META_PLANE; f->fmt.meta.dataformat = V4L2_PIX_FMT_VIDC_META; f->fmt.meta.buffersize = call_session_op(core, buffer_size, - inst, MSM_VIDC_INPUT_META); + inst, MSM_VIDC_BUF_INPUT_META); inst->buffers.input_meta.min_count = inst->buffers.input.min_count; inst->buffers.input_meta.extra_count = inst->buffers.input.extra_count; inst->buffers.input_meta.actual_count = inst->buffers.input.actual_count; @@ -262,11 +492,11 @@ int msm_vdec_inst_init(struct msm_vidc_inst *inst) msm_vidc_convert_color_fmt(f->fmt.pix.pixelformat), DEFAULT_HEIGHT); f->fmt.pix.bytesperline = f->fmt.pix.width; f->fmt.pix.sizeimage = call_session_op(core, buffer_size, - inst, MSM_VIDC_OUTPUT); + inst, MSM_VIDC_BUF_OUTPUT); inst->buffers.output.min_count = - call_session_op(core, min_count, inst, MSM_VIDC_OUTPUT); + call_session_op(core, min_count, inst, MSM_VIDC_BUF_OUTPUT); inst->buffers.output.extra_count = - call_session_op(core, extra_count, inst, MSM_VIDC_OUTPUT); + call_session_op(core, extra_count, inst, MSM_VIDC_BUF_OUTPUT); inst->buffers.output.actual_count = inst->buffers.output.min_count + inst->buffers.output.extra_count; @@ -276,7 +506,7 @@ int msm_vdec_inst_init(struct msm_vidc_inst *inst) f->type = OUTPUT_META_PLANE; f->fmt.meta.dataformat = V4L2_PIX_FMT_VIDC_META; f->fmt.meta.buffersize = call_session_op(core, buffer_size, - inst, MSM_VIDC_OUTPUT_META); + inst, MSM_VIDC_BUF_OUTPUT_META); inst->buffers.output_meta.min_count = inst->buffers.output.min_count; inst->buffers.output_meta.extra_count = inst->buffers.output.extra_count; inst->buffers.output_meta.actual_count = inst->buffers.output.actual_count; diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index 60ab8523f5..7ee0c4f633 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -35,11 +35,11 @@ int msm_venc_inst_init(struct msm_vidc_inst *inst) f->fmt.pix.pixelformat = V4L2_PIX_FMT_H264; f->fmt.pix.bytesperline = 0; f->fmt.pix.sizeimage = call_session_op(core, buffer_size, - inst, MSM_VIDC_OUTPUT); + inst, MSM_VIDC_BUF_OUTPUT); inst->buffers.output.min_count = - call_session_op(core, min_count, inst, MSM_VIDC_OUTPUT); + call_session_op(core, min_count, inst, MSM_VIDC_BUF_OUTPUT); inst->buffers.output.extra_count = - call_session_op(core, extra_count, inst, MSM_VIDC_OUTPUT); + call_session_op(core, extra_count, inst, MSM_VIDC_BUF_OUTPUT); inst->buffers.output.actual_count = inst->buffers.output.min_count + inst->buffers.output.extra_count; @@ -49,7 +49,7 @@ int msm_venc_inst_init(struct msm_vidc_inst *inst) f->type = OUTPUT_META_PLANE; f->fmt.meta.dataformat = V4L2_PIX_FMT_VIDC_META; f->fmt.meta.buffersize = call_session_op(core, buffer_size, - inst, MSM_VIDC_OUTPUT_META); + inst, MSM_VIDC_BUF_OUTPUT_META); inst->buffers.output_meta.min_count = inst->buffers.output.min_count; inst->buffers.output_meta.extra_count = inst->buffers.output.extra_count; inst->buffers.output_meta.actual_count = inst->buffers.output.actual_count; @@ -64,11 +64,11 @@ int msm_venc_inst_init(struct msm_vidc_inst *inst) msm_vidc_convert_color_fmt(f->fmt.pix.pixelformat), DEFAULT_HEIGHT); f->fmt.pix.bytesperline = f->fmt.pix.width; f->fmt.pix.sizeimage = call_session_op(core, buffer_size, - inst, MSM_VIDC_INPUT); + inst, MSM_VIDC_BUF_INPUT); inst->buffers.input.min_count = - call_session_op(core, min_count, inst, MSM_VIDC_INPUT); + call_session_op(core, min_count, inst, MSM_VIDC_BUF_INPUT); inst->buffers.input.extra_count = - call_session_op(core, extra_count, inst, MSM_VIDC_INPUT); + call_session_op(core, extra_count, inst, MSM_VIDC_BUF_INPUT); inst->buffers.input.actual_count = inst->buffers.input.min_count + inst->buffers.input.extra_count; @@ -78,7 +78,7 @@ int msm_venc_inst_init(struct msm_vidc_inst *inst) f->type = INPUT_META_PLANE; f->fmt.meta.dataformat = V4L2_PIX_FMT_VIDC_META; f->fmt.meta.buffersize = call_session_op(core, buffer_size, - inst, MSM_VIDC_INPUT_META); + inst, MSM_VIDC_BUF_INPUT_META); inst->buffers.input_meta.min_count = inst->buffers.input.min_count; inst->buffers.input_meta.extra_count = inst->buffers.input.extra_count; inst->buffers.input_meta.actual_count = inst->buffers.input.actual_count; diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index 99e080b70c..1725dfccc6 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -119,9 +119,9 @@ int msm_vidc_enum_fmt(void *instance, struct v4l2_fmtdesc *f) return -EINVAL; if (inst->domain == MSM_VIDC_DECODER) - return 0;//msm_vdec_enum_fmt(instance, f); + return -EINVAL;//msm_vdec_enum_fmt(instance, f); else if (inst->domain == MSM_VIDC_ENCODER) - return 0;//msm_venc_enum_fmt(instance, f); + return -EINVAL;//msm_venc_enum_fmt(instance, f); return -EINVAL; } EXPORT_SYMBOL(msm_vidc_enum_fmt); @@ -203,6 +203,25 @@ int msm_vidc_s_fmt(void *instance, struct v4l2_format *f) if (!inst || !f) return -EINVAL; + if (f->type == INPUT_PLANE) { + if (inst->state != MSM_VIDC_OPEN && + inst->state != MSM_VIDC_START_OUTPUT) { + s_vpr_e(inst->sid, + "%s: s_fmt(%d) not allowed in %d state\n", + __func__, f->type, inst->state); + return -EINVAL; + } + } else if (f->type == OUTPUT_PLANE) { + if (inst->state != MSM_VIDC_OPEN && + inst->state != MSM_VIDC_START_INPUT && + inst->state != MSM_VIDC_DRAIN_START_INPUT) { + s_vpr_e(inst->sid, + "%s: s_fmt(%d) not allowed in %d state\n", + __func__, f->type, inst->state); + return -EINVAL; + } + } + if (inst->domain == MSM_VIDC_DECODER) rc = msm_vdec_s_fmt(inst, f); if (inst->domain == MSM_VIDC_ENCODER) @@ -269,17 +288,41 @@ int msm_vidc_reqbufs(void *instance, struct v4l2_requestbuffers *b) if (!inst || !b) return -EINVAL; - port = msm_vidc_get_port_from_type(b->type); + mutex_lock(&inst->lock); + + if (b->type == INPUT_PLANE) { + if (inst->state != MSM_VIDC_OPEN && + inst->state != MSM_VIDC_START_OUTPUT) { + s_vpr_e(inst->sid, + "%s: reqbufs(%d) not allowed in %d state\n", + __func__, b->type, inst->state); + return -EINVAL; + } + } else if (b->type == OUTPUT_PLANE) { + if (inst->state != MSM_VIDC_OPEN && + inst->state != MSM_VIDC_START_INPUT && + inst->state != MSM_VIDC_DRAIN_START_INPUT) { + s_vpr_e(inst->sid, + "%s: reqbufs(%d) not allowed in %d state\n", + __func__, b->type, inst->state); + return -EINVAL; + } + } + + port = msm_vidc_get_port_from_v4l2_type(b->type); if (port < 0) { d_vpr_e("%s: invalid queue type %d\n", __func__, b->type); return -EINVAL; } - mutex_lock(&inst->lock); rc = vb2_reqbufs(&inst->vb2q[port], b); - mutex_unlock(&inst->lock); - if (rc) - s_vpr_e(inst->sid, "%s: vb2_reqbufs failed, %d\n", rc); + if (rc) { + s_vpr_e(inst->sid, "%s: vb2_reqbufs(%d) failed, %d\n", + __func__, b->type, rc); + goto unlock; + } +unlock: + mutex_unlock(&inst->lock); return rc; } EXPORT_SYMBOL(msm_vidc_reqbufs); @@ -297,50 +340,168 @@ int msm_vidc_dqbuf(void *instance, struct v4l2_buffer *b) } EXPORT_SYMBOL(msm_vidc_dqbuf); -int msm_vidc_streamon(void *instance, enum v4l2_buf_type i) +int msm_vidc_streamon(void *instance, enum v4l2_buf_type type) { int rc = 0; struct msm_vidc_inst *inst = instance; + enum msm_vidc_inst_state new_state = 0; int port; if (!inst) return -EINVAL; - port = msm_vidc_get_port_from_type(i); - if (port < 0) { - d_vpr_e("%s: invalid buf type %d\n", __func__, i); - return -EINVAL; - } mutex_lock(&inst->lock); - rc = vb2_streamon(&inst->vb2q[port], i); - mutex_unlock(&inst->lock); - if (rc) - s_vpr_e(inst->sid, "%s: vb2_streamon failed, %d\n", rc); + if (type == INPUT_PLANE) { + if (inst->state != MSM_VIDC_OPEN && + inst->state != MSM_VIDC_START_OUTPUT) { + s_vpr_e(inst->sid, + "%s: streamon(%d) not allowed in %d state\n", + __func__, type, inst->state); + rc = -EINVAL; + goto unlock; + } + } else if (type == OUTPUT_PLANE) { + if (inst->state != MSM_VIDC_OPEN && + inst->state != MSM_VIDC_START_INPUT && + inst->state != MSM_VIDC_DRAIN_START_INPUT) { + s_vpr_e(inst->sid, + "%s: streamon(%d) not allowed in %d state\n", + __func__, type, inst->state); + rc = -EINVAL; + goto unlock; + } + } + + port = msm_vidc_get_port_from_v4l2_type(type); + if (port < 0) { + d_vpr_e("%s: invalid buf type %d\n", __func__, type); + rc = -EINVAL; + goto unlock; + } + + rc = vb2_streamon(&inst->vb2q[port], type); + if (rc) { + s_vpr_e(inst->sid, "%s: vb2_streamon(%d) failed, %d\n", + __func__, type, rc); + goto unlock; + } + + if (type == INPUT_PLANE) { + if (inst->state == MSM_VIDC_OPEN) { + new_state = MSM_VIDC_START_INPUT; + } else if (inst->state == MSM_VIDC_START_OUTPUT) { + new_state = MSM_VIDC_START; + } + rc = msm_vidc_change_inst_state(inst, new_state); + if (rc) + goto unlock; + } else if (type == OUTPUT_PLANE) { + if (inst->state == MSM_VIDC_OPEN) { + new_state = MSM_VIDC_START_OUTPUT; + } else if (inst->state == MSM_VIDC_START_INPUT) { + new_state = MSM_VIDC_START; + } else if (inst->state == MSM_VIDC_DRAIN_START_INPUT) { + if (0 /* check if input port settings change pending */) + new_state = MSM_VIDC_DRC_DRAIN; + else + new_state = MSM_VIDC_DRAIN; + } + rc = msm_vidc_change_inst_state(inst, new_state); + if (rc) + goto unlock; + } + +unlock: + mutex_unlock(&inst->lock); return rc; } EXPORT_SYMBOL(msm_vidc_streamon); -int msm_vidc_streamoff(void *instance, enum v4l2_buf_type i) +int msm_vidc_streamoff(void *instance, enum v4l2_buf_type type) { int rc = 0; struct msm_vidc_inst *inst = instance; + enum msm_vidc_inst_state new_state = 0; int port; if (!inst) return -EINVAL; - port = msm_vidc_get_port_from_type(i); - if (port < 0) { - d_vpr_e("%s: invalid buf type %d\n", __func__, i); - return -EINVAL; - } mutex_lock(&inst->lock); - rc = vb2_streamoff(&inst->vb2q[port], i); - mutex_unlock(&inst->lock); - if (rc) - s_vpr_e(inst->sid, "%s: vb2_streamoff failed, %d\n", rc); + if (type == INPUT_PLANE) { + if (inst->state == MSM_VIDC_OPEN || + inst->state == MSM_VIDC_START_OUTPUT) { + s_vpr_e(inst->sid, + "%s: streamoff(%d) not allowed in %d state\n", + __func__, type, inst->state); + rc = -EINVAL; + goto unlock; + } + } else if (type == OUTPUT_PLANE) { + if (inst->state == MSM_VIDC_OPEN || + inst->state == MSM_VIDC_START_INPUT) { + s_vpr_e(inst->sid, + "%s: streamoff(%d) not allowed in %d state\n", + __func__, type, inst->state); + rc = -EINVAL; + goto unlock; + } + } + + port = msm_vidc_get_port_from_v4l2_type(type); + if (port < 0) { + d_vpr_e("%s: invalid buf type %d\n", __func__, type); + rc = -EINVAL; + goto unlock; + } + + rc = vb2_streamoff(&inst->vb2q[port], type); + if (rc) { + s_vpr_e(inst->sid, "%s: vb2_streamoff(%d) failed, %d\n", + __func__, type, rc); + goto unlock; + } + + if (type == INPUT_PLANE) { + if (inst->state == MSM_VIDC_START_INPUT) { + new_state = MSM_VIDC_OPEN; + } else if (inst->state == MSM_VIDC_START) { + new_state = MSM_VIDC_START_OUTPUT; + } else if (inst->state == MSM_VIDC_DRC || + inst->state == MSM_VIDC_DRC_LAST_FLAG || + inst->state == MSM_VIDC_DRAIN || + inst->state == MSM_VIDC_DRAIN_LAST_FLAG || + inst->state == MSM_VIDC_DRC_DRAIN || + inst->state == MSM_VIDC_DRC_DRAIN_LAST_FLAG || + inst->state == MSM_VIDC_DRAIN_START_INPUT) { + new_state = MSM_VIDC_START_OUTPUT; + /* discard pending port settings change if any */ + } + rc = msm_vidc_change_inst_state(inst, new_state); + if (rc) + goto unlock; + } else if (type == OUTPUT_PLANE) { + if (inst->state == MSM_VIDC_START_OUTPUT) { + new_state = MSM_VIDC_OPEN; + } else if (inst->state == MSM_VIDC_START || + inst->state == MSM_VIDC_DRAIN || + inst->state == MSM_VIDC_DRAIN_LAST_FLAG || + inst->state == MSM_VIDC_DRC || + inst->state == MSM_VIDC_DRC_LAST_FLAG || + inst->state == MSM_VIDC_DRC_DRAIN) { + new_state = MSM_VIDC_START_INPUT; + } else if (inst->state == MSM_VIDC_DRC_DRAIN_LAST_FLAG) { + new_state = MSM_VIDC_DRAIN_START_INPUT; + } + rc = msm_vidc_change_inst_state(inst, new_state); + if (rc) + goto unlock; + } + +unlock: + mutex_unlock(&inst->lock); return rc; } EXPORT_SYMBOL(msm_vidc_streamoff); @@ -357,44 +518,46 @@ int msm_vidc_enum_framesizes(void *instance, struct v4l2_frmsizeenum *fsize) } EXPORT_SYMBOL(msm_vidc_enum_framesizes); -int msm_vidc_subscribe_event(void *inst, +int msm_vidc_subscribe_event(void *instance, const struct v4l2_event_subscription *sub) { int rc = 0; - struct msm_vidc_inst *vidc_inst = (struct msm_vidc_inst *)inst; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; if (!inst || !sub) return -EINVAL; - rc = v4l2_event_subscribe(&vidc_inst->event_handler, + s_vpr_e(inst->sid, "%s: type %d id %d\n", __func__, sub->type, sub->id); + rc = v4l2_event_subscribe(&inst->event_handler, sub, MAX_EVENTS, NULL); return rc; } EXPORT_SYMBOL(msm_vidc_subscribe_event); -int msm_vidc_unsubscribe_event(void *inst, +int msm_vidc_unsubscribe_event(void *instance, const struct v4l2_event_subscription *sub) { int rc = 0; - struct msm_vidc_inst *vidc_inst = (struct msm_vidc_inst *)inst; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; if (!inst || !sub) return -EINVAL; - rc = v4l2_event_unsubscribe(&vidc_inst->event_handler, sub); + s_vpr_e(inst->sid, "%s: type %d id %d\n", __func__, sub->type, sub->id); + rc = v4l2_event_unsubscribe(&inst->event_handler, sub); return rc; } EXPORT_SYMBOL(msm_vidc_unsubscribe_event); -int msm_vidc_dqevent(void *inst, struct v4l2_event *event) +int msm_vidc_dqevent(void *instance, struct v4l2_event *event) { int rc = 0; - struct msm_vidc_inst *vidc_inst = (struct msm_vidc_inst *)inst; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; if (!inst || !event) return -EINVAL; - rc = v4l2_event_dequeue(&vidc_inst->event_handler, event, false); + rc = v4l2_event_dequeue(&inst->event_handler, event, false); return rc; } EXPORT_SYMBOL(msm_vidc_dqevent); @@ -455,6 +618,20 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) INIT_LIST_HEAD(&inst->buffers.scratch_2.list); INIT_LIST_HEAD(&inst->buffers.persist.list); INIT_LIST_HEAD(&inst->buffers.persist_1.list); + INIT_LIST_HEAD(&inst->allocations.scratch.list); + INIT_LIST_HEAD(&inst->allocations.scratch_1.list); + INIT_LIST_HEAD(&inst->allocations.scratch_2.list); + INIT_LIST_HEAD(&inst->allocations.persist.list); + INIT_LIST_HEAD(&inst->allocations.persist_1.list); + INIT_LIST_HEAD(&inst->maps.input.list); + INIT_LIST_HEAD(&inst->maps.input_meta.list); + INIT_LIST_HEAD(&inst->maps.output.list); + INIT_LIST_HEAD(&inst->maps.output_meta.list); + INIT_LIST_HEAD(&inst->maps.scratch.list); + INIT_LIST_HEAD(&inst->maps.scratch_1.list); + INIT_LIST_HEAD(&inst->maps.scratch_2.list); + INIT_LIST_HEAD(&inst->maps.persist.list); + INIT_LIST_HEAD(&inst->maps.persist_1.list); inst->domain = session_type; inst->state = MSM_VIDC_OPEN; //inst->debugfs_root = @@ -476,7 +653,7 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) goto error; } - rc = msm_vidc_queue_init(inst); + rc = msm_vidc_vb2_queue_init(inst); if (rc) goto error; diff --git a/driver/vidc/src/msm_vidc_buffer.c b/driver/vidc/src/msm_vidc_buffer.c new file mode 100644 index 0000000000..c2e9ec9943 --- /dev/null +++ b/driver/vidc/src/msm_vidc_buffer.c @@ -0,0 +1,190 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2020, The Linux Foundation. All rights reserved. + */ + +#include +#include "msm_vidc_buffer.h" +#include "msm_vidc_inst.h" +#include "msm_vidc_core.h" +#include "msm_vidc_driver.h" +#include "msm_vidc_debug.h" + +#define MIN_INPUT_BUFFERS 4 +#define MIN_ENC_OUTPUT_BUFFERS 4 + +u32 msm_vidc_input_min_count(struct msm_vidc_inst *inst) +{ + u32 input_min_count = 0; + //struct v4l2_ctrl *max_layer = NULL; + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return 0; + } + + if (!is_decode_session(inst) && !is_encode_session(inst)) + return 0; + + input_min_count = MIN_INPUT_BUFFERS; + + if (is_thumbnail_session(inst)) + input_min_count = 1; + + //if (is_grid_session(inst)) + // input_min_count = 2; + + //if (is_hier_b_session(inst)) { + //max_layer = get_ctrl(inst, + // V4L2_CID_MPEG_VIDC_VIDEO_HEVC_MAX_HIER_CODING_LAYER); + //input_min_count = (1 << (max_layer->val - 1)) + 2; + //} + + return input_min_count; +} + +u32 msm_vidc_output_min_count(struct msm_vidc_inst *inst) +{ + u32 output_min_count; + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return 0; + } + + if (!is_decode_session(inst) && !is_encode_session(inst)) + return 0; + + if (is_thumbnail_session(inst)) + return inst->codec == MSM_VIDC_VP9 ? 8 : 1; + + if (is_decode_session(inst)) { + switch (inst->codec) { + case MSM_VIDC_H264: + case MSM_VIDC_HEVC: + output_min_count = 4; + break; + case MSM_VIDC_VP9: + output_min_count = 9; + break; + case MSM_VIDC_MPEG2: + output_min_count = 6; + break; + default: + output_min_count = 4; + } + } else { + output_min_count = MIN_ENC_OUTPUT_BUFFERS; + } + + //if (is_vpp_delay_allowed(inst)) { + // output_min_count = + // max(output_min_count, (u32)MAX_BSE_VPP_DELAY); + // output_min_count = + // max(output_min_count, (u32)(msm_vidc_vpp_delay & 0x1F)); + //} + + return output_min_count; +} + +u32 msm_vidc_input_extra_count(struct msm_vidc_inst *inst) +{ + u32 extra_input_count = 0; + struct msm_vidc_core *core; + + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params %pK\n", __func__, inst); + return 0; + } + core = inst->core; + + if (is_thumbnail_session(inst)) + return extra_input_count; + + if (is_decode_session(inst)) { + /* add dcvs buffers */ + /* add batching buffers */ + extra_input_count = 6; + } else if (is_encode_session(inst)) { + /* add dcvs buffers */ + extra_input_count = 4; + } + return extra_input_count; +} + +u32 msm_vidc_output_extra_count(struct msm_vidc_inst *inst) +{ + u32 extra_output_count = 0; + struct msm_vidc_core *core; + + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params %pK\n", __func__, inst); + return 0; + } + core = inst->core; + + if (is_thumbnail_session(inst)) + return 0; + + if (is_decode_session(inst)) { + /* add dcvs buffers */ + /* add batching buffers */ + extra_output_count = 6; + } else if (is_encode_session(inst)) { + /* add heif buffers */ + //extra_output_count = 8 + } + return extra_output_count; +} + +u32 msm_vidc_decoder_input_size(struct msm_vidc_inst *inst) +{ + return ALIGN(15 * 1024 * 1024, SZ_4K); +} + +u32 msm_vidc_decoder_output_size(struct msm_vidc_inst *inst) +{ + u32 format; + struct v4l2_format *f; + + f = &inst->fmts[OUTPUT_PORT]; + format = msm_vidc_convert_color_fmt(f->fmt.pix.pixelformat); + return VENUS_BUFFER_SIZE(format, f->fmt.pix.width, + f->fmt.pix.height); +} + +u32 msm_vidc_decoder_input_meta_size(struct msm_vidc_inst *inst) +{ + return ALIGN(16 * 1024, SZ_4K); +} + +u32 msm_vidc_decoder_output_meta_size(struct msm_vidc_inst *inst) +{ + return ALIGN(16 * 1024, SZ_4K); +} + +u32 msm_vidc_encoder_input_size(struct msm_vidc_inst *inst) +{ + u32 format; + struct v4l2_format *f; + + f = &inst->fmts[INPUT_PORT]; + format = msm_vidc_convert_color_fmt(f->fmt.pix.pixelformat); + return VENUS_BUFFER_SIZE(format, f->fmt.pix.width, + f->fmt.pix.height); +} + +u32 msm_vidc_encoder_output_size(struct msm_vidc_inst *inst) +{ + return ALIGN(15 * 1024 * 1024, SZ_4K); +} + +u32 msm_vidc_encoder_input_meta_size(struct msm_vidc_inst *inst) +{ + return ALIGN(1 * 1024 * 1024, SZ_4K); +} + +u32 msm_vidc_encoder_output_meta_size(struct msm_vidc_inst *inst) +{ + return ALIGN(16 * 1024, SZ_4K); +} \ No newline at end of file diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index c9a7c24995..fc55340e44 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -10,10 +10,15 @@ #include "msm_vidc_driver.h" #include "msm_vidc_internal.h" +#include "msm_vidc_memory.h" #include "msm_vidc_debug.h" #include "venus_hfi.h" -int msm_vidc_get_port_from_type(u32 type) +void print_vidc_buffer(struct msm_vidc_inst *inst, struct msm_vidc_buffer *b) +{ +} + +int msm_vidc_get_port_from_v4l2_type(u32 type) { int port; @@ -26,12 +31,167 @@ int msm_vidc_get_port_from_type(u32 type) } else if (type == OUTPUT_META_PLANE) { port = OUTPUT_META_PORT; } else { - d_vpr_e("invalid type %d\n", type); + d_vpr_e("%s: invalid type %d\n", __func__, type); port = -EINVAL; } return port; } + +u32 msm_vidc_get_buffer_region(struct msm_vidc_inst *inst, + enum msm_vidc_buffer_type buffer_type) +{ + u32 region = MSM_VIDC_NON_SECURE; + + if (!is_secure_session(inst)) + return region; + + switch (buffer_type) { + case MSM_VIDC_BUF_INPUT: + if (is_encode_session(inst)) + region = MSM_VIDC_SECURE_PIXEL; + else + region = MSM_VIDC_SECURE_BITSTREAM; + break; + case MSM_VIDC_BUF_OUTPUT: + if (is_encode_session(inst)) + region = MSM_VIDC_SECURE_BITSTREAM; + else + region = MSM_VIDC_SECURE_PIXEL; + break; + case MSM_VIDC_BUF_INPUT_META: + case MSM_VIDC_BUF_OUTPUT_META: + region = MSM_VIDC_NON_SECURE; + break; + case MSM_VIDC_BUF_SCRATCH: + region = MSM_VIDC_SECURE_BITSTREAM; + break; + case MSM_VIDC_BUF_SCRATCH_1: + region = MSM_VIDC_SECURE_NONPIXEL; + break; + case MSM_VIDC_BUF_SCRATCH_2: + region = MSM_VIDC_SECURE_PIXEL; + break; + case MSM_VIDC_BUF_PERSIST: + if (is_encode_session(inst)) + region = MSM_VIDC_SECURE_NONPIXEL; + else + region = MSM_VIDC_SECURE_BITSTREAM; + break; + case MSM_VIDC_BUF_PERSIST_1: + region = MSM_VIDC_SECURE_NONPIXEL; + break; + default: + s_vpr_e(inst->sid, "%s: invalid buffer type %d\n", + __func__, buffer_type); + } + return region; +} + +struct msm_vidc_buffer_info *msm_vidc_get_buffer_info(struct msm_vidc_inst *inst, + enum msm_vidc_buffer_type buffer_type) +{ + switch (buffer_type) { + case MSM_VIDC_BUF_INPUT: + return &inst->buffers.input; + case MSM_VIDC_BUF_INPUT_META: + return &inst->buffers.input_meta; + case MSM_VIDC_BUF_OUTPUT: + return &inst->buffers.output; + case MSM_VIDC_BUF_OUTPUT_META: + return &inst->buffers.output_meta; + case MSM_VIDC_BUF_SCRATCH: + return &inst->buffers.scratch; + case MSM_VIDC_BUF_SCRATCH_1: + return &inst->buffers.scratch_1; + case MSM_VIDC_BUF_SCRATCH_2: + return &inst->buffers.scratch_2; + case MSM_VIDC_BUF_PERSIST: + return &inst->buffers.persist; + case MSM_VIDC_BUF_PERSIST_1: + return &inst->buffers.persist_1; + default: + s_vpr_e(inst->sid, "%s: invalid buffer type %d\n", + __func__, buffer_type); + return NULL; + } +} + +struct msm_vidc_map_info *msm_vidc_get_map_info(struct msm_vidc_inst *inst, + enum msm_vidc_buffer_type buffer_type) +{ + switch (buffer_type) { + case MSM_VIDC_BUF_INPUT: + return &inst->maps.input; + case MSM_VIDC_BUF_INPUT_META: + return &inst->maps.input_meta; + case MSM_VIDC_BUF_OUTPUT: + return &inst->maps.output; + case MSM_VIDC_BUF_OUTPUT_META: + return &inst->maps.output_meta; + case MSM_VIDC_BUF_SCRATCH: + return &inst->maps.scratch; + case MSM_VIDC_BUF_SCRATCH_1: + return &inst->maps.scratch_1; + case MSM_VIDC_BUF_SCRATCH_2: + return &inst->maps.scratch_2; + case MSM_VIDC_BUF_PERSIST: + return &inst->maps.persist; + case MSM_VIDC_BUF_PERSIST_1: + return &inst->maps.persist_1; + default: + s_vpr_e(inst->sid, "%s: invalid buffer type %d\n", + __func__, buffer_type); + return NULL; + } +} + +struct msm_vidc_alloc_info *msm_vidc_get_alloc_info(struct msm_vidc_inst *inst, + enum msm_vidc_buffer_type buffer_type) +{ + switch (buffer_type) { + case MSM_VIDC_BUF_SCRATCH: + return &inst->allocations.scratch; + case MSM_VIDC_BUF_SCRATCH_1: + return &inst->allocations.scratch_1; + case MSM_VIDC_BUF_SCRATCH_2: + return &inst->allocations.scratch_2; + case MSM_VIDC_BUF_PERSIST: + return &inst->allocations.persist; + case MSM_VIDC_BUF_PERSIST_1: + return &inst->allocations.persist_1; + default: + s_vpr_e(inst->sid, "%s: invalid buffer type %d\n", + __func__, buffer_type); + return NULL; + } +} + +int msm_vidc_change_inst_state(struct msm_vidc_inst *inst, + enum msm_vidc_inst_state request_state) +{ + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + if (!request_state) { + d_vpr_e("%s: invalid request state\n", __func__); + return -EINVAL; + } + + if (inst->state == MSM_VIDC_ERROR) { + s_vpr_h(inst->sid, + "inst is in bad state, can not change state to %d\n", + request_state); + return 0; + } + + s_vpr_h(inst->sid, "state changed from %d to %d\n", + inst->state, request_state); + inst->state = request_state; + return 0; +} + int msm_vidc_get_control(struct msm_vidc_inst *inst, struct v4l2_ctrl *ctrl) { int rc = 0; @@ -84,72 +244,226 @@ u32 msm_vidc_convert_color_fmt(u32 v4l2_fmt) } } -int msm_vidc_stop_input(struct msm_vidc_inst *inst) +int msm_vidc_create_internal_buffers(struct msm_vidc_inst *inst, + enum msm_vidc_buffer_type buffer_type) { int rc = 0; + struct msm_vidc_buffer_info *buffer_info; + struct msm_vidc_alloc_info *alloc_info; + struct msm_vidc_map_info *map_info; + int i; d_vpr_h("%s()\n", __func__); - if (!inst) { + if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } + if (!is_internal_buffer(buffer_type)) { + s_vpr_e(inst->sid, "%s: buffer type %#d is not internal\n", + __func__, buffer_type); + return 0; + } - return rc; + buffer_info = msm_vidc_get_buffer_info(inst, buffer_type); + if (!buffer_info) + return -EINVAL; + alloc_info = msm_vidc_get_alloc_info(inst, buffer_type); + if (!alloc_info) + return -EINVAL; + map_info = msm_vidc_get_map_info(inst, buffer_type); + if (!alloc_info) + return -EINVAL; + + for (i = 0; i < buffer_info->min_count; i++) { + struct msm_vidc_buffer *buffer; + struct msm_vidc_alloc *alloc; + struct msm_vidc_map *map; + + if (!buffer_info->size) { + d_vpr_e("%s: invalid buffer %#x\n", __func__, buffer_type); + return -EINVAL; + } + buffer = kzalloc(sizeof(struct msm_vidc_buffer), GFP_KERNEL); + if (!buffer) { + s_vpr_e(inst->sid, "%s: msm_vidc_buffer alloc failed\n", __func__); + return -ENOMEM; + } + INIT_LIST_HEAD(&buffer->list); + buffer->valid = true; + buffer->type = buffer_type; + buffer->index = i; + buffer->buffer_size = buffer_info->size; + list_add_tail(&buffer->list, &buffer_info->list); + + alloc = kzalloc(sizeof(struct msm_vidc_alloc), GFP_KERNEL); + if (!alloc) { + s_vpr_e(inst->sid, "%s: msm_vidc_alloc alloc failed\n", __func__); + return -ENOMEM; + } + INIT_LIST_HEAD(&alloc->list); + alloc->buffer_type = buffer_type; + alloc->region = msm_vidc_get_buffer_region(inst, buffer_type); + alloc->size = buffer->buffer_size; + rc = msm_vidc_memory_alloc(inst->core, alloc); + if (rc) + return -ENOMEM; + list_add_tail(&alloc->list, &alloc_info->list); + + map = kzalloc(sizeof(struct msm_vidc_map), GFP_KERNEL); + if (!map) { + s_vpr_e(inst->sid, "%s: msm_vidc_map alloc failed\n", __func__); + return -ENOMEM; + } + INIT_LIST_HEAD(&map->list); + map->buffer_type = alloc->buffer_type; + map->region = alloc->region; + map->dmabuf = alloc->dmabuf; + rc = msm_vidc_memory_map(inst->core, map); + if (rc) + return -ENOMEM; + list_add_tail(&map->list, &map_info->list); + + s_vpr_e(inst->sid, "%s: created buffer_type %d, size %d\n", + __func__, buffer_type, buffer_info->size); + } + + return 0; } -int msm_vidc_stop_output(struct msm_vidc_inst *inst) +int msm_vidc_queue_internal_buffers(struct msm_vidc_inst *inst, + enum msm_vidc_buffer_type buffer_type) { int rc = 0; + struct msm_vidc_buffer_info *buffer_info; + struct msm_vidc_buffer *buffer, *dummy; d_vpr_h("%s()\n", __func__); - if (!inst) { + if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } + if (!is_internal_buffer(buffer_type)) { + s_vpr_e(inst->sid, "%s: buffer type %#d is not internal\n", + __func__, buffer_type); + return 0; + } - return rc; + buffer_info = msm_vidc_get_buffer_info(inst, buffer_type); + if (!buffer_info) + return -EINVAL; + + list_for_each_entry_safe(buffer, dummy, &buffer_info->list, list) { + /* do not queue pending release buffers */ + if (buffer->flags & MSM_VIDC_ATTR_PENDING_RELEASE) + continue; + /* do not queue already queued buffers */ + if (buffer->attr & MSM_VIDC_ATTR_QUEUED) + continue; + rc = venus_hfi_queue_buffer(inst, buffer, NULL); + if (rc) + return rc; + /* mark queued */ + buffer->attr |= MSM_VIDC_ATTR_QUEUED; + + s_vpr_e(inst->sid, "%s: queued buffer_type %d, size %d\n", + __func__, buffer_type, buffer_info->size); + } + + return 0; } -int msm_vidc_start_input(struct msm_vidc_inst *inst) +int msm_vidc_release_internal_buffers(struct msm_vidc_inst *inst, + enum msm_vidc_buffer_type buffer_type) { int rc = 0; + struct msm_vidc_buffer_info *buffer_info; + struct msm_vidc_buffer *buffer, *dummy; d_vpr_h("%s()\n", __func__); - if (!inst) { + if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - - return rc; -} - -int msm_vidc_start_output(struct msm_vidc_inst *inst) -{ - int rc = 0; - - d_vpr_h("%s()\n", __func__); - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; + if (!is_internal_buffer(buffer_type)) { + s_vpr_e(inst->sid, "%s: buffer type %#d is not internal\n", + __func__, buffer_type); + return 0; } - return rc; + buffer_info = msm_vidc_get_buffer_info(inst, buffer_type); + if (!buffer_info) + return -EINVAL; + + list_for_each_entry_safe(buffer, dummy, &buffer_info->list, list) { + /* do not release already pending release buffers */ + if (buffer->attr & MSM_VIDC_ATTR_PENDING_RELEASE) + continue; + /* release only queued buffers */ + if (!(buffer->attr & MSM_VIDC_ATTR_QUEUED)) + continue; + rc = venus_hfi_release_buffer(inst, buffer); + if (rc) + return rc; + /* mark pending release */ + buffer->attr |= MSM_VIDC_ATTR_PENDING_RELEASE; + + s_vpr_e(inst->sid, "%s: released buffer_type %d, size %d\n", + __func__, buffer_type, buffer_info->size); + } + + return 0; } int msm_vidc_setup_event_queue(struct msm_vidc_inst *inst) { int rc = 0; + int index; + struct msm_vidc_core *core; d_vpr_h("%s()\n", __func__); - if (!inst) { + if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } + core = inst->core; + + // TODO: check decode is index = 0 and encode is index 1 + if (is_decode_session(inst)) + index = 0; + else if (is_encode_session(inst)) + index = 1; + else + return -EINVAL; + + v4l2_fh_init(&inst->event_handler, &core->vdev[index].vdev); + v4l2_fh_add(&inst->event_handler); return rc; } -int msm_vidc_queue_init(struct msm_vidc_inst *inst) +static int vb2q_init(struct msm_vidc_inst *inst, + struct vb2_queue *q, enum v4l2_buf_type type) +{ + struct msm_vidc_core *core; + + if (!inst || !q || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + core = inst->core; + + q->type = type; + q->io_modes = VB2_MMAP | VB2_USERPTR; + q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY; + q->ops = core->vb2_ops; + q->mem_ops = core->vb2_mem_ops; + q->drv_priv = inst; + q->allow_zero_bytesused = 1; + q->copy_timestamp = 1; + return vb2_queue_init(q); +} + +int msm_vidc_vb2_queue_init(struct msm_vidc_inst *inst) { int rc = 0; @@ -159,6 +473,22 @@ int msm_vidc_queue_init(struct msm_vidc_inst *inst) return -EINVAL; } + rc = vb2q_init(inst, &inst->vb2q[INPUT_PORT], INPUT_PLANE); + if (rc) + return rc; + + rc = vb2q_init(inst, &inst->vb2q[OUTPUT_PORT], OUTPUT_PLANE); + if (rc) + return rc; + + rc = vb2q_init(inst, &inst->vb2q[INPUT_META_PORT], INPUT_META_PLANE); + if (rc) + return rc; + + rc = vb2q_init(inst, &inst->vb2q[OUTPUT_META_PORT], OUTPUT_META_PLANE); + if (rc) + return rc; + return rc; } @@ -195,6 +525,23 @@ int msm_vidc_add_session(struct msm_vidc_inst *inst) return rc; } +int msm_vidc_session_open(struct msm_vidc_inst *inst) +{ + int rc = 0; + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + rc = venus_hfi_session_open(inst); + if (rc) + return rc; + + inst->session_created = true; + return 0; +} + int msm_vidc_core_init(struct msm_vidc_core *core) { int rc; diff --git a/driver/vidc/src/msm_vidc_vb2.c b/driver/vidc/src/msm_vidc_vb2.c index 0d82cd5343..64f323bb9c 100644 --- a/driver/vidc/src/msm_vidc_vb2.c +++ b/driver/vidc/src/msm_vidc_vb2.c @@ -8,6 +8,8 @@ #include "msm_vidc_inst.h" #include "msm_vidc_internal.h" #include "msm_vidc_driver.h" +#include "msm_vdec.h" +#include "msm_venc.h" #include "msm_vidc_debug.h" void *msm_vb2_get_userptr(struct device *dev, unsigned long vaddr, @@ -44,7 +46,7 @@ int msm_vidc_queue_setup(struct vb2_queue *q, return -EINVAL; } - port = msm_vidc_get_port_from_type(q->type); + port = msm_vidc_get_port_from_v4l2_type(q->type); if (port < 0) { d_vpr_e("%s: invalid queue type %d\n", __func__, q->type); return -EINVAL; @@ -96,12 +98,29 @@ int msm_vidc_start_streaming(struct vb2_queue *q, unsigned int count) __func__, q->type); return 0; } + if (!is_decode_session(inst) && !is_encode_session(inst)) { + s_vpr_e(inst->sid, "%s: invalid session %d\n", + __func__, inst->domain); + return -EINVAL; + } s_vpr_h(inst->sid, "Streamon: %d\n", q->type); + if (!inst->session_created) { + rc = msm_vidc_session_open(inst); + if (rc) + return -EINVAL; + } + if (q->type == INPUT_PLANE) { - rc = msm_vidc_start_input(inst); - } else if (q->type == INPUT_PLANE) { - rc = msm_vidc_start_output(inst); + if (is_decode_session(inst)) + rc = msm_vdec_start_input(inst); + //else if (is_encode_session(inst)) + // rc = msm_venc_start_input(inst); + } else if (q->type == OUTPUT_PLANE) { + if (is_decode_session(inst)) + rc = msm_vdec_start_output(inst); + //else if (is_encode_session(inst)) + // rc = msm_venc_start_output(inst); } else { s_vpr_e(inst->sid, "%s: invalid type %d\n", __func__, q->type); rc = -EINVAL; diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index d4e20bf4db..94dc2b01cd 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -20,6 +20,7 @@ #include "msm_vidc_dt.h" #include "msm_vidc_platform.h" #include "msm_vidc_memory.h" +#include "msm_vidc_driver.h" #include "msm_vidc_debug.h" #include "hfi_packet.h" @@ -561,6 +562,10 @@ static int __write_queue(struct msm_vidc_iface_q_info *qinfo, u8 *packet, __dump_packet(packet); } + // TODO: handle writing packet + d_vpr_e("skip writing packet\n"); + return 0; + packet_size_in_words = (*(u32 *)packet) >> 2; if (!packet_size_in_words || packet_size_in_words > qinfo->q_array.mem_size>>2) { @@ -2005,7 +2010,7 @@ static int __interface_queues_init(struct msm_vidc_core *core) q_size = SHARED_QSIZE - ALIGNED_SFR_SIZE - ALIGNED_QDSS_SIZE; memset(&alloc, 0, sizeof(alloc)); - alloc.buffer_type = MSM_VIDC_QUEUE; + alloc.buffer_type = MSM_VIDC_BUF_QUEUE; alloc.region = MSM_VIDC_NON_SECURE; alloc.size = q_size; alloc.cached = false; @@ -2078,7 +2083,7 @@ static int __interface_queues_init(struct msm_vidc_core *core) /* sfr buffer */ memset(&alloc, 0, sizeof(alloc)); - alloc.buffer_type = MSM_VIDC_QUEUE; + alloc.buffer_type = MSM_VIDC_BUF_QUEUE; alloc.region = MSM_VIDC_NON_SECURE; alloc.size = ALIGNED_SFR_SIZE; alloc.cached = false; @@ -2339,15 +2344,14 @@ int venus_hfi_suspend(struct msm_vidc_core *core) return rc; } -int venus_hfi_session_open(struct msm_vidc_core *core, - struct msm_vidc_inst *inst) +int venus_hfi_session_open(struct msm_vidc_inst *inst) { int rc = 0; + u32 codec; - d_vpr_h("%s(): inst %p, core %p\n", - __func__, inst, core); + d_vpr_h("%s(): inst %p %p\n", __func__, inst); - if (!core || !inst) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -2359,14 +2363,319 @@ int venus_hfi_session_open(struct msm_vidc_core *core, return -ENOMEM; } rc = hfi_packet_session_command(inst, - HFI_CMD_OPEN, - (HFI_HOST_FLAGS_RESPONSE_REQUIRED | - HFI_HOST_FLAGS_INTR_REQUIRED), - HFI_PORT_NONE, - 0 /* session_id */, - HFI_PAYLOAD_U32, - &inst->session_id /*payload*/, - sizeof(u32)); + HFI_CMD_OPEN, + (HFI_HOST_FLAGS_RESPONSE_REQUIRED | + HFI_HOST_FLAGS_INTR_REQUIRED), + HFI_PORT_NONE, + 0, /* session_id */ + HFI_PAYLOAD_U32, + &inst->session_id, /* payload */ + sizeof(u32)); + if (rc) + goto error; + + rc = __iface_cmdq_write(inst->core, inst->packet); + if (rc) + goto error; + + codec = get_hfi_codec(inst); + rc = hfi_packet_session_property(inst, + HFI_PROP_CODEC, + HFI_HOST_FLAGS_NONE, + HFI_PORT_NONE, + HFI_PAYLOAD_U32, + &codec, + sizeof(u32)); + if (rc) + goto error; + + rc = __iface_cmdq_write(inst->core, inst->packet); + if (rc) + goto error; + + inst->session_created = true; +error: + return rc; +} + +int venus_hfi_session_close(struct msm_vidc_inst *inst) +{ + int rc = 0; + + d_vpr_h("%s(): inst %p\n", __func__, inst); + + if (!inst || !inst->packet) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + rc = hfi_packet_session_command(inst, + HFI_CMD_CLOSE, + (HFI_HOST_FLAGS_RESPONSE_REQUIRED | + HFI_HOST_FLAGS_INTR_REQUIRED | + HFI_HOST_FLAGS_NON_DISCARDABLE), + HFI_PORT_NONE, + inst->session_id, + HFI_PAYLOAD_NONE, + NULL, + 0); + if (!rc) + __iface_cmdq_write(inst->core, inst->packet); + + kfree(inst->packet); + + return rc; +} + +int venus_hfi_start_input(struct msm_vidc_inst *inst) +{ + int rc = 0; + u32 port; + + d_vpr_h("%s(): inst %p\n", __func__, inst); + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + port = is_decode_session(inst) ? HFI_PORT_BITSTREAM : HFI_PORT_RAW; + rc = hfi_packet_session_command(inst, + HFI_CMD_START, + (HFI_HOST_FLAGS_RESPONSE_REQUIRED | + HFI_HOST_FLAGS_INTR_REQUIRED), + port, + inst->session_id, + HFI_PAYLOAD_NONE, + NULL, + 0); + if (rc) + return rc; + + rc = __iface_cmdq_write(inst->core, inst->packet); + if (rc) + return rc; + + return rc; +} + +int venus_hfi_stop_input(struct msm_vidc_inst *inst) +{ + int rc = 0; + u32 port; + + d_vpr_h("%s(): inst %p\n", __func__, inst); + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + port = is_decode_session(inst) ? HFI_PORT_BITSTREAM : HFI_PORT_RAW; + rc = hfi_packet_session_command(inst, + HFI_CMD_STOP, + (HFI_HOST_FLAGS_RESPONSE_REQUIRED | + HFI_HOST_FLAGS_INTR_REQUIRED | + HFI_HOST_FLAGS_NON_DISCARDABLE), + port, + inst->session_id, + HFI_PAYLOAD_NONE, + NULL, + 0); + if (rc) + return rc; + + rc = __iface_cmdq_write(inst->core, inst->packet); + if (rc) + return rc; + + return rc; +} + +int venus_hfi_start_output(struct msm_vidc_inst *inst) +{ + int rc = 0; + u32 port; + + d_vpr_h("%s(): inst %p\n", __func__, inst); + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + port = is_decode_session(inst) ? HFI_PORT_RAW : HFI_PORT_BITSTREAM; + rc = hfi_packet_session_command(inst, + HFI_CMD_START, + (HFI_HOST_FLAGS_RESPONSE_REQUIRED | + HFI_HOST_FLAGS_INTR_REQUIRED), + port, + inst->session_id, + HFI_PAYLOAD_NONE, + NULL, + 0); + if (rc) + return rc; + + rc = __iface_cmdq_write(inst->core, inst->packet); + if (rc) + return rc; + + return rc; +} + +int venus_hfi_stop_output(struct msm_vidc_inst *inst) +{ + int rc = 0; + u32 port; + + d_vpr_h("%s(): inst %p\n", __func__, inst); + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + port = is_decode_session(inst) ? HFI_PORT_RAW : HFI_PORT_BITSTREAM; + rc = hfi_packet_session_command(inst, + HFI_CMD_STOP, + (HFI_HOST_FLAGS_RESPONSE_REQUIRED | + HFI_HOST_FLAGS_INTR_REQUIRED | + HFI_HOST_FLAGS_NON_DISCARDABLE), + port, + inst->session_id, + HFI_PAYLOAD_NONE, + NULL, + 0); + if (rc) + return rc; + + rc = __iface_cmdq_write(inst->core, inst->packet); + if (rc) + return rc; + + return rc; +} + +int venus_hfi_queue_buffer(struct msm_vidc_inst *inst, + struct msm_vidc_buffer *buffer, struct msm_vidc_buffer *metabuf) +{ + int rc = 0; + struct msm_vidc_core *core; + struct hfi_buffer hfi_buffer; + u32 num_packets = 0, offset = 0; + + d_vpr_h("%s(): inst %p\n", __func__, inst); + if (!inst || !inst->core || !inst->packet) { + d_vpr_e("%s: Invalid params\n", __func__); + return -EINVAL; + } + core = inst->core; + + rc = get_hfi_buffer(inst, buffer, &hfi_buffer); + if (rc) + return rc; + + offset = sizeof(struct hfi_header); + rc = hfi_create_packet(inst->packet, + inst->packet_size, + &offset, + HFI_CMD_BUFFER, + (HFI_HOST_FLAGS_RESPONSE_REQUIRED | + HFI_HOST_FLAGS_INTR_REQUIRED), + HFI_PAYLOAD_STRUCTURE, + get_hfi_port(inst, buffer->type), + core->packet_id++, + &hfi_buffer, + sizeof(hfi_buffer)); + if (rc) + return rc; + num_packets++; + + if (metabuf) { + rc = get_hfi_buffer(inst, metabuf, &hfi_buffer); + if (rc) + return rc; + rc = hfi_create_packet(inst->packet, + inst->packet_size, + &offset, + HFI_CMD_BUFFER, + HFI_HOST_FLAGS_NONE, + HFI_PAYLOAD_STRUCTURE, + get_hfi_port(inst, metabuf->type), + core->packet_id++, + &hfi_buffer, + sizeof(hfi_buffer)); + if (rc) + return rc; + num_packets++; + } + + rc = hfi_create_header(inst->packet, inst->session_id, + core->header_id++, + num_packets, + offset); + if (rc) + return rc; + + rc = __iface_cmdq_write(inst->core, inst->packet); + if (rc) + return rc; + + return rc; +} + +int venus_hfi_release_buffer(struct msm_vidc_inst *inst, + struct msm_vidc_buffer *buffer) +{ + int rc = 0; + struct msm_vidc_core *core; + struct hfi_buffer hfi_buffer; + u32 num_packets = 0, offset = 0; + + d_vpr_h("%s(): inst %p\n", __func__, inst); + if (!inst || !buffer) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + if (!is_internal_buffer(buffer->type)) { + s_vpr_e(inst->sid, "release not allowed for buffer type %d\n", + buffer->type); + return 0; + } + core = inst->core; + + rc = get_hfi_buffer(inst, buffer, &hfi_buffer); + if (rc) + return rc; + + /* add pending release flag */ + hfi_buffer.flags |= HFI_BUF_HOST_FLAG_RELEASE; + + offset = sizeof(struct hfi_header); + rc = hfi_create_packet(inst->packet, + inst->packet_size, + &offset, + HFI_CMD_BUFFER, + (HFI_HOST_FLAGS_RESPONSE_REQUIRED | + HFI_HOST_FLAGS_INTR_REQUIRED), + HFI_PAYLOAD_STRUCTURE, + get_hfi_port(inst, buffer->type), + core->packet_id++, + &hfi_buffer, + sizeof(hfi_buffer)); + if (rc) + return rc; + num_packets++; + + rc = hfi_create_header(inst->packet, inst->session_id, + core->header_id++, + num_packets, + offset); + if (rc) + return rc; + + rc = __iface_cmdq_write(inst->core, inst->packet); if (rc) return rc; From 25f6fd7e7ed24702cbf23b10efe704a8c2e78c79 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Tue, 11 Aug 2020 18:24:13 -0700 Subject: [PATCH 0006/1061] video: driver: add capabilities parsing logic Parse capabilities from platform specific file. Change-Id: I46e45995f24f92d374f749fd58c200542591b6a4 Signed-off-by: Akshata Sahukar --- driver/platform/waipio/src/msm_vidc_waipio.c | 6 +- driver/vidc/inc/msm_vidc_core.h | 2 + driver/vidc/inc/msm_vidc_inst.h | 1 + driver/vidc/inc/msm_vidc_internal.h | 46 ++++- driver/vidc/inc/msm_vidc_platform.h | 29 +-- driver/vidc/src/msm_vidc_driver.c | 194 ++++++++++++++++++- include/uapi/vidc/media/msm_vidc_utils.h | 2 +- 7 files changed, 259 insertions(+), 21 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index e1632b00f6..55c3081bcf 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -40,7 +40,7 @@ #define CODECS_ALL (MSM_VIDC_H264 | MSM_VIDC_HEVC | \ MSM_VIDC_VP9 | MSM_VIDC_MPEG2) -static struct msm_vidc_core_data core_data_waipio[] = { +static struct msm_platform_core_capability core_data_waipio[] = { /* {type, value} */ {ENC_CODECS, H264|HEVC}, {DEC_CODECS, H264|HEVC|VP9|MPEG2}, @@ -81,7 +81,7 @@ static struct msm_vidc_core_data core_data_waipio[] = { {AV_SYNC_WINDOW_SIZE, 40}, }; -static struct msm_vidc_instance_data instance_data_waipio[] = { +static struct msm_platform_inst_capability instance_data_waipio[] = { /* {type, domains, codecs, min, max, step_or_menu, value} */ {FRAME_WIDTH, ENC|DEC, CODECS_ALL, 128, 8192, 1, 1920}, {FRAME_HEIGHT, ENC|DEC, CODECS_ALL, 128, 8192, 1, 1080}, @@ -92,7 +92,7 @@ static struct msm_vidc_instance_data instance_data_waipio[] = { {FRAME_RATE, ENC|DEC, CODECS_ALL, 1, 960, 1, 30}, {BIT_RATE, ENC|DEC, CODECS_ALL, 1, 220000000, 1, 20000000}, {BIT_RATE, ENC, HEVC, 1, 160000000, 1, 20000000}, - {CABAC_BIT_RATE, ENC, H264, 1, 160000000, 1, 20000000}, + {CABAC_BITRATE, ENC, H264, 1, 160000000, 1, 20000000}, {SCALE_X, ENC, CODECS_ALL, 8192, 65536, 1, 8192}, {SCALE_Y, ENC, CODECS_ALL, 8192, 65536, 1, 8192}, {SCALE_X, DEC, CODECS_ALL, 65536, 65536, 1, 65536}, diff --git a/driver/vidc/inc/msm_vidc_core.h b/driver/vidc/inc/msm_vidc_core.h index 29a13d92f9..450c68cd87 100644 --- a/driver/vidc/inc/msm_vidc_core.h +++ b/driver/vidc/inc/msm_vidc_core.h @@ -76,6 +76,8 @@ struct msm_vidc_core { u32 spur_count; u32 reg_count; bool power_enabled; + struct msm_vidc_core_capability *capabilities; + struct msm_vidc_inst_capability *inst_caps; struct msm_vidc_mem_addr sfr; struct msm_vidc_mem_addr iface_q_table; struct msm_vidc_iface_q_info iface_queues[VIDC_IFACEQ_NUMQ]; diff --git a/driver/vidc/inc/msm_vidc_inst.h b/driver/vidc/inc/msm_vidc_inst.h index ad3f4b06eb..43bd43d264 100644 --- a/driver/vidc/inc/msm_vidc_inst.h +++ b/driver/vidc/inc/msm_vidc_inst.h @@ -106,6 +106,7 @@ struct msm_vidc_inst { bool session_created; struct dentry *debugfs_root; struct msm_vidc_debug debug; + struct msm_vidc_inst_capability *capabilities; }; #endif // _MSM_VIDC_INST_H_ diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index c087ad86f4..e49581d44d 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -36,6 +36,8 @@ #define MAX_SUPPORTED_INSTANCES 16 #define MAX_BSE_VPP_DELAY 6 #define DEFAULT_BSE_VPP_DELAY 2 +#define MAX_CAP_PARENTS 16 +#define MAX_CAP_CHILDREN 16 /* Maintains the number of FTB's between each FBD over a window */ #define DCVS_FTB_WINDOW 16 @@ -130,8 +132,9 @@ enum msm_vidc_port_type { MAX_PORT, }; -enum msm_vidc_core_data_type { - ENC_CODECS = 0, +enum msm_vidc_core_capability_type { + CORE_CAP_NONE = 0, + ENC_CODECS, DEC_CODECS, MAX_SESSION_COUNT, MAX_SECURE_SESSION_COUNT, @@ -159,16 +162,18 @@ enum msm_vidc_core_data_type { DECODE_BATCH_TIMEOUT, AV_SYNC_WINDOW_SIZE, CLK_FREQ_THRESHOLD, + CORE_CAP_MAX, }; -enum msm_vidc_instance_data_type { +enum msm_vidc_inst_capability_type { + INST_CAP_NONE = 0, FRAME_WIDTH, FRAME_HEIGHT, MBPF, MBPS, FRAME_RATE, BIT_RATE, - CABAC_BIT_RATE, + CABAC_BITRATE, LTR_COUNT, LCU_SIZE, POWER_SAVE_MBPS, @@ -205,6 +210,39 @@ enum msm_vidc_instance_data_type { MB_CYCLES_LP, MB_CYCLES_FW, MB_CYCLES_FW_VPP, + INST_CAP_MAX, +}; + +enum msm_vidc_inst_capability_flags { + CAP_FLAG_ROOT = BIT(0), + CAP_FLAG_DYNAMIC_ALLOWED = BIT(1), + CAP_FLAG_MENU = BIT(2), +}; + +struct msm_vidc_inst_cap { + enum msm_vidc_inst_capability_type cap; + s32 min; + s32 max; + u32 step_or_menu; + s32 value; + enum msm_vidc_inst_capability_flags flags; + u32 v4l2_id; + u32 hfi_id; + u8 parents[MAX_CAP_PARENTS]; + u8 children[MAX_CAP_CHILDREN]; + void (*adjust)(void *inst, s32 new_value); + int (*set)(void *inst, struct v4l2_ctrl *ctrl); +}; + +struct msm_vidc_inst_capability { + enum msm_vidc_domain_type domain; + enum msm_vidc_codec_type codec; + struct msm_vidc_inst_cap cap[INST_CAP_MAX]; +}; + +struct msm_vidc_core_capability { + enum msm_vidc_core_capability_type type; + u32 value; }; enum efuse_purpose { diff --git a/driver/vidc/inc/msm_vidc_platform.h b/driver/vidc/inc/msm_vidc_platform.h index 9d4b15049c..87f2cdb57f 100644 --- a/driver/vidc/inc/msm_vidc_platform.h +++ b/driver/vidc/inc/msm_vidc_platform.h @@ -10,19 +10,26 @@ #include "msm_vidc_internal.h" -struct msm_vidc_core_data { - enum msm_vidc_core_data_type type; +struct msm_platform_core_capability { + enum msm_vidc_core_capability_type type; u32 value; }; -struct msm_vidc_instance_data { - enum msm_vidc_instance_data_type type; - enum msm_vidc_domain_type domains; - enum msm_vidc_codec_type codecs; - u32 min; - u32 max; +struct msm_platform_inst_capability { + enum msm_vidc_inst_capability_type cap; + enum msm_vidc_domain_type domain; + enum msm_vidc_codec_type codec; + s32 min; + s32 max; u32 step_or_menu; - u32 value; + s32 value; + enum msm_vidc_inst_capability_flags flags; + u32 v4l2_id; + u32 hfi_id; + u8 parents[MAX_CAP_PARENTS]; + u8 children[MAX_CAP_CHILDREN]; + void (*adjust)(void *inst, s32 new_value); + int (*set)(void *inst, struct v4l2_ctrl *ctrl); }; struct msm_vidc_csc_coeff { @@ -61,9 +68,9 @@ struct msm_vidc_ubwc_config_data { }; struct msm_vidc_platform_data { - struct msm_vidc_core_data *core_data; + struct msm_platform_core_capability *core_data; u32 core_data_size; - struct msm_vidc_instance_data *instance_data; + struct msm_platform_inst_capability *instance_data; u32 instance_data_size; struct allowed_clock_rates_table *allowed_clks_tbl; u32 allowed_clks_tbl_size; diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index fc55340e44..00729b0e22 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -9,11 +9,19 @@ #include #include "msm_vidc_driver.h" +#include "msm_vidc_platform.h" #include "msm_vidc_internal.h" #include "msm_vidc_memory.h" #include "msm_vidc_debug.h" #include "venus_hfi.h" +#define COUNT_BITS(a, out) ({ \ + while ((a) >= 1) { \ + (out) += (a) & (1); \ + (a) >>= (1); \ + } \ +}) + void print_vidc_buffer(struct msm_vidc_inst *inst, struct msm_vidc_buffer *b) { } @@ -542,12 +550,187 @@ int msm_vidc_session_open(struct msm_vidc_inst *inst) return 0; } +static int msm_vidc_init_core_caps(struct msm_vidc_core *core) +{ + int rc = 0; + int i, num_platform_caps; + struct msm_platform_core_capability *platform_data; + + if (!core || !core->platform) { + d_vpr_e("%s: invalid params\n", __func__); + rc = -EINVAL; + goto exit; + } + + platform_data = core->platform->data.core_data; + if (!platform_data) { + d_vpr_e("%s: platform core data is NULL\n", + __func__); + rc = -EINVAL; + goto exit; + } + + if (!core->capabilities) { + core->capabilities = kcalloc(1, + (sizeof(struct msm_vidc_core_capability) * + CORE_CAP_MAX), GFP_KERNEL); + if (!core->capabilities) { + d_vpr_e("%s: failed to allocate core capabilities\n", + __func__); + rc = -ENOMEM; + goto exit; + } + } else { + d_vpr_e("%s: capabilities memory is expected to be freed\n", + __func__); + } + + num_platform_caps = core->platform->data.core_data_size; + + /* loop over platform caps */ + for (i = 0; i < num_platform_caps; i++) { + core->capabilities[platform_data[i].type].type = platform_data[i].type; + core->capabilities[platform_data[i].type].value = platform_data[i].value; + } + +exit: + return rc; +} + +static void update_inst_capability(struct msm_platform_inst_capability *in, + struct msm_vidc_inst_capability *capability) +{ + if (!in || !capability) { + d_vpr_e("%s: invalid params %pK %pK\n", + __func__, in, capability); + return; + } + if (in->cap < INST_CAP_MAX) { + capability->cap[in->cap].cap = in->cap; + capability->cap[in->cap].min = in->min; + capability->cap[in->cap].max = in->max; + capability->cap[in->cap].step_or_menu = in->step_or_menu; + capability->cap[in->cap].value = in->value; + capability->cap[in->cap].flags = in->flags; + capability->cap[in->cap].v4l2_id = in->v4l2_id; + capability->cap[in->cap].hfi_id = in->hfi_id; + memcpy(capability->cap[in->cap].parents, in->parents, + sizeof(capability->cap[in->cap].parents)); + memcpy(capability->cap[in->cap].children, in->children, + sizeof(capability->cap[in->cap].children)); + capability->cap[in->cap].adjust = in->adjust; + capability->cap[in->cap].set = in->set; + } else { + d_vpr_e("%s: invalid cap %d\n", + __func__, in->cap); + } +} + +static int msm_vidc_init_instance_caps(struct msm_vidc_core *core) +{ + int rc = 0; + u8 enc_valid_codecs, dec_valid_codecs; + u8 count_bits, enc_codec_count; + u8 codecs_count = 0; + int i, j, check_bit, num_platform_caps; + struct msm_platform_inst_capability *platform_data = NULL; + + if (!core || !core->platform || !core->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + rc = -EINVAL; + goto exit; + } + + platform_data = core->platform->data.instance_data; + if (!platform_data) { + d_vpr_e("%s: platform instance data is NULL\n", + __func__); + rc = -EINVAL; + goto exit; + } + + enc_valid_codecs = core->capabilities[ENC_CODECS].value; + count_bits = enc_valid_codecs; + COUNT_BITS(count_bits, codecs_count); + enc_codec_count = codecs_count; + + dec_valid_codecs = core->capabilities[DEC_CODECS].value; + count_bits = dec_valid_codecs; + COUNT_BITS(count_bits, codecs_count); + + if (!core->inst_caps) { + core->inst_caps = kcalloc(codecs_count, + sizeof(struct msm_vidc_inst_capability), + GFP_KERNEL); + if (!core->inst_caps) { + d_vpr_e("%s: failed to allocate core capabilities\n", + __func__); + rc = -ENOMEM; + goto exit; + } + } else { + d_vpr_e("%s: capabilities memory is expected to be freed\n", + __func__); + } + + check_bit = 0; + /* determine codecs for enc domain */ + for (i = 0; i < enc_codec_count; i++) { + while (check_bit < (sizeof(enc_valid_codecs) * 8)) { + if (enc_valid_codecs & BIT(check_bit)) { + core->inst_caps[i].domain = MSM_VIDC_ENCODER; + core->inst_caps[i].codec = enc_valid_codecs & + BIT(check_bit); + check_bit++; + break; + } + check_bit++; + } + } + + /* reset checkbit to check from 0th bit of decoder codecs set bits*/ + check_bit = 0; + /* determine codecs for dec domain */ + for (; i < codecs_count; i++) { + while (check_bit < (sizeof(dec_valid_codecs) * 8)) { + if (dec_valid_codecs & BIT(check_bit)) { + core->inst_caps[i].domain = MSM_VIDC_DECODER; + core->inst_caps[i].codec = dec_valid_codecs & + BIT(check_bit); + check_bit++; + break; + } + check_bit++; + } + } + + num_platform_caps = core->platform->data.instance_data_size; + + d_vpr_h("%s: num caps %d\n", __func__, num_platform_caps); + /* loop over each platform capability */ + for (i = 0; i < num_platform_caps; i++) { + /* select matching core codec and update it */ + for (j = 0; j < codecs_count; j++) { + if ((platform_data[i].domain & + core->inst_caps[j].domain) && + (platform_data[i].codec & + core->inst_caps[j].codec)) { + /* update core capability */ + update_inst_capability(&platform_data[i], + &core->inst_caps[j]); + } + } + } +exit: + return rc; +} + int msm_vidc_core_init(struct msm_vidc_core *core) { - int rc; + int rc = 0; d_vpr_h("%s()\n", __func__); - if (!core) { + if (!core || !core->platform) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -563,6 +746,13 @@ int msm_vidc_core_init(struct msm_vidc_core *core) goto unlock; } + rc = msm_vidc_init_core_caps(core); + if (rc) + goto unlock; + rc = msm_vidc_init_instance_caps(core); + if (rc) + goto unlock; + rc = venus_hfi_core_init(core); if (rc) { d_vpr_e("%s: core init failed\n", __func__); diff --git a/include/uapi/vidc/media/msm_vidc_utils.h b/include/uapi/vidc/media/msm_vidc_utils.h index 2f614d314c..8c08ced070 100644 --- a/include/uapi/vidc/media/msm_vidc_utils.h +++ b/include/uapi/vidc/media/msm_vidc_utils.h @@ -29,4 +29,4 @@ /* vendor controls end */ -#endif // __MSM_VIDC_UTILS_H__ +#endif From cd536c944ccc6062e81b0a8aa1ea376a2163ef17 Mon Sep 17 00:00:00 2001 From: Maheshwar Ajja Date: Thu, 20 Aug 2020 09:26:07 -0700 Subject: [PATCH 0007/1061] video: driver: add enumerate format support Add below configuration - format enumeration - set format for encoder - get inst capabilities based on codec from core Change-Id: I2484056ae688cf7b634c5137631197a83c382950 Signed-off-by: Maheshwar Ajja --- driver/platform/waipio/src/msm_vidc_waipio.c | 16 +- driver/vidc/inc/msm_vdec.h | 1 + driver/vidc/inc/msm_venc.h | 3 + driver/vidc/inc/msm_vidc_core.h | 1 + driver/vidc/inc/msm_vidc_driver.h | 6 +- driver/vidc/inc/msm_vidc_internal.h | 3 +- driver/vidc/inc/msm_vidc_platform.h | 2 +- driver/vidc/src/msm_vdec.c | 108 +++++-- driver/vidc/src/msm_venc.c | 290 ++++++++++++++++++- driver/vidc/src/msm_vidc.c | 149 ++++++---- driver/vidc/src/msm_vidc_buffer.c | 4 +- driver/vidc/src/msm_vidc_driver.c | 168 +++++++++-- driver/vidc/src/msm_vidc_probe.c | 3 +- 13 files changed, 638 insertions(+), 116 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 55c3081bcf..5288b91cd8 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -82,9 +82,23 @@ static struct msm_platform_core_capability core_data_waipio[] = { }; static struct msm_platform_inst_capability instance_data_waipio[] = { - /* {type, domains, codecs, min, max, step_or_menu, value} */ + /* {type, domains, codecs, min, max, step_or_mask, value} */ {FRAME_WIDTH, ENC|DEC, CODECS_ALL, 128, 8192, 1, 1920}, {FRAME_HEIGHT, ENC|DEC, CODECS_ALL, 128, 8192, 1, 1080}, + {PIX_FMTS, ENC, CODECS_ALL, + MSM_VIDC_FMT_NV12, + MSM_VIDC_FMT_SDE_Y_CBCR_H2V2_P010_VENUS, + MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12_UBWC | + MSM_VIDC_FMT_NV12_P010_UBWC | MSM_VIDC_FMT_NV12_TP10_UBWC | + MSM_VIDC_FMT_RGBA8888_UBWC | MSM_VIDC_FMT_SDE_Y_CBCR_H2V2_P010_VENUS, + MSM_VIDC_FMT_NV12_UBWC}, + {PIX_FMTS, DEC, CODECS_ALL, + MSM_VIDC_FMT_NV12, + MSM_VIDC_FMT_SDE_Y_CBCR_H2V2_P010_VENUS, + MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12_UBWC | + MSM_VIDC_FMT_NV12_P010_UBWC | MSM_VIDC_FMT_NV12_TP10_UBWC | + MSM_VIDC_FMT_RGBA8888_UBWC | MSM_VIDC_FMT_SDE_Y_CBCR_H2V2_P010_VENUS, + MSM_VIDC_FMT_NV12_UBWC}, /* (8192 * 4320) / 256 */ {MBPF, ENC|DEC, CODECS_ALL, 64, 138240, 1, 138240}, /* ((1920 * 1088) / 256) * 960 fps */ diff --git a/driver/vidc/inc/msm_vdec.h b/driver/vidc/inc/msm_vdec.h index b3b8f5bb4d..71abfc0ef8 100644 --- a/driver/vidc/inc/msm_vdec.h +++ b/driver/vidc/inc/msm_vdec.h @@ -15,6 +15,7 @@ int msm_vdec_stop_output(struct msm_vidc_inst *inst); int msm_vdec_start_output(struct msm_vidc_inst *inst); int msm_vdec_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f); int msm_vdec_g_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f); +int msm_vdec_enum_fmt(struct msm_vidc_inst *inst, struct v4l2_fmtdesc *f); int msm_vdec_inst_init(struct msm_vidc_inst *inst); int msm_vdec_ctrl_init(struct msm_vidc_inst *inst); diff --git a/driver/vidc/inc/msm_venc.h b/driver/vidc/inc/msm_venc.h index e1810d950a..8af066db14 100644 --- a/driver/vidc/inc/msm_venc.h +++ b/driver/vidc/inc/msm_venc.h @@ -9,6 +9,9 @@ #include "msm_vidc_core.h" #include "msm_vidc_inst.h" +int msm_venc_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f); +int msm_venc_g_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f); +int msm_venc_enum_fmt(struct msm_vidc_inst *inst, struct v4l2_fmtdesc *f); int msm_venc_inst_init(struct msm_vidc_inst *inst); int msm_venc_ctrl_init(struct msm_vidc_inst *inst); diff --git a/driver/vidc/inc/msm_vidc_core.h b/driver/vidc/inc/msm_vidc_core.h index 450c68cd87..044d466b88 100644 --- a/driver/vidc/inc/msm_vidc_core.h +++ b/driver/vidc/inc/msm_vidc_core.h @@ -76,6 +76,7 @@ struct msm_vidc_core { u32 spur_count; u32 reg_count; bool power_enabled; + u32 codecs_count; struct msm_vidc_core_capability *capabilities; struct msm_vidc_inst_capability *inst_caps; struct msm_vidc_mem_addr sfr; diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index f414b7e736..b6cc9633cc 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -66,6 +66,11 @@ static inline bool is_thumbnail_session(struct msm_vidc_inst *inst) return false; // TODO: fix it } +u32 get_v4l2_codec_from_vidc(enum msm_vidc_codec_type codec); +enum msm_vidc_codec_type get_vidc_codec_from_v4l2(u32 v4l2_codec); +u32 get_v4l2_colorformat_from_vidc(enum msm_vidc_colorformat_type colorformat); +enum msm_vidc_colorformat_type get_vidc_colorformat_from_v4l2(u32 colorformat); +u32 get_media_colorformat_from_v4l2(u32 v4l2_fmt); int msm_vidc_change_inst_state(struct msm_vidc_inst *inst, enum msm_vidc_inst_state state); int msm_vidc_create_internal_buffers(struct msm_vidc_inst *inst, @@ -87,7 +92,6 @@ void msm_vidc_fw_unload_handler(struct work_struct *work); void msm_vidc_batch_handler(struct work_struct *work); int msm_vidc_setup_event_queue(struct msm_vidc_inst *inst); int msm_vidc_vb2_queue_init(struct msm_vidc_inst *inst); -u32 msm_vidc_convert_color_fmt(u32 v4l2_fmt); int msm_vidc_get_control(struct msm_vidc_inst *inst, struct v4l2_ctrl *ctrl); int msm_vidc_get_port_from_v4l2_type(u32 type); u32 msm_vidc_get_buffer_region(struct msm_vidc_inst *inst, diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index e49581d44d..5e298913c7 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -169,6 +169,7 @@ enum msm_vidc_inst_capability_type { INST_CAP_NONE = 0, FRAME_WIDTH, FRAME_HEIGHT, + PIX_FMTS, MBPF, MBPS, FRAME_RATE, @@ -223,7 +224,7 @@ struct msm_vidc_inst_cap { enum msm_vidc_inst_capability_type cap; s32 min; s32 max; - u32 step_or_menu; + u32 step_or_mask; s32 value; enum msm_vidc_inst_capability_flags flags; u32 v4l2_id; diff --git a/driver/vidc/inc/msm_vidc_platform.h b/driver/vidc/inc/msm_vidc_platform.h index 87f2cdb57f..ecef436290 100644 --- a/driver/vidc/inc/msm_vidc_platform.h +++ b/driver/vidc/inc/msm_vidc_platform.h @@ -21,7 +21,7 @@ struct msm_platform_inst_capability { enum msm_vidc_codec_type codec; s32 min; s32 max; - u32 step_or_menu; + u32 step_or_mask; s32 value; enum msm_vidc_inst_capability_flags flags; u32 v4l2_id; diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 4dd04f5103..36125a5ede 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -18,6 +18,7 @@ static int msm_vdec_codec_change(struct msm_vidc_inst *inst, u32 codec) { int rc = 0; + int i; struct msm_vidc_core *core; d_vpr_h("%s()\n", __func__); @@ -27,6 +28,20 @@ static int msm_vdec_codec_change(struct msm_vidc_inst *inst, u32 codec) } core = inst->core; + inst->capabilities = NULL; + for (i = 0; i < core->codecs_count; i++) { + if (core->inst_caps[i].domain == MSM_VIDC_DECODER && + core->inst_caps[i].codec == get_vidc_codec_from_v4l2( + inst->fmts[INPUT_PORT].fmt.pix.pixelformat)) { + s_vpr_h(inst->sid, "%s: changed capabilities to %#x caps\n", + __func__, inst->fmts[INPUT_PORT].fmt.pix.pixelformat); + inst->capabilities = &core->inst_caps[i]; + } + } + if (!inst->capabilities) { + s_vpr_e(inst->sid, "%s: capabilities not found\n", __func__); + return -EINVAL; + } return rc; } @@ -300,7 +315,7 @@ int msm_vdec_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) } inst->buffers.input.size = fmt->fmt.pix.sizeimage; - // update crop dimensions + /* update crop dimensions */ inst->crop.x = inst->crop.y = 0; inst->crop.width = f->fmt.pix.width; inst->crop.height = f->fmt.pix.height; @@ -351,10 +366,10 @@ int msm_vdec_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) fmt->type = OUTPUT_PLANE; fmt->fmt.pix.pixelformat = f->fmt.pix.pixelformat; fmt->fmt.pix.width = VENUS_Y_STRIDE( - msm_vidc_convert_color_fmt(fmt->fmt.pix.pixelformat), + get_media_colorformat_from_v4l2(fmt->fmt.pix.pixelformat), f->fmt.pix.width); fmt->fmt.pix.height = VENUS_Y_SCANLINES( - msm_vidc_convert_color_fmt(fmt->fmt.pix.pixelformat), + get_media_colorformat_from_v4l2(fmt->fmt.pix.pixelformat), f->fmt.pix.height); fmt->fmt.pix.bytesperline = fmt->fmt.pix.width; fmt->fmt.pix.sizeimage = call_session_op(core, buffer_size, @@ -416,7 +431,7 @@ err_invalid_fmt: int msm_vdec_g_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) { int rc = 0; - u32 index; + int port; d_vpr_h("%s()\n", __func__); if (!inst) { @@ -424,19 +439,58 @@ int msm_vdec_g_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) return -EINVAL; } - if (f->type == OUTPUT_PLANE) { - index = OUTPUT_PORT; - } else if (f->type == INPUT_PLANE) { - index = OUTPUT_PORT; - } else if (f->type == OUTPUT_META_PLANE) { - index = OUTPUT_PORT; - } else if (f->type == OUTPUT_META_PLANE) { - index = OUTPUT_PORT; - } else { - d_vpr_e("%s: invalid type %d\n", __func__, f->type); + port = msm_vidc_get_port_from_v4l2_type(f->type); + if (port < 0) { + d_vpr_e("%s: invalid format type %d\n", __func__, f->type); return -EINVAL; } - memcpy(f, &inst->fmts[index], sizeof(struct v4l2_format)); + memcpy(f, &inst->fmts[port], sizeof(struct v4l2_format)); + + return rc; +} + +int msm_vdec_enum_fmt(struct msm_vidc_inst *inst, struct v4l2_fmtdesc *f) +{ + int rc = 0; + enum msm_vidc_codec_type codec; + enum msm_vidc_colorformat_type colorformat; + struct msm_vidc_core *core; + + if (!inst || !inst->core || !inst->capabilities || !f) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + core = inst->core; + + if (f->index >= + sizeof(inst->capabilities->cap[PIX_FMTS].step_or_mask) * 8) { + d_vpr_e("%s: invalid index %d\n", __func__, f->index); + return -EINVAL; + } + memset(f->reserved, 0, sizeof(f->reserved)); + + if (f->type == INPUT_PLANE) { + codec = core->capabilities[DEC_CODECS].value & f->index; + f->pixelformat = get_v4l2_codec_from_vidc(codec); + if (!f->pixelformat) + return -EINVAL; + f->flags = V4L2_FMT_FLAG_COMPRESSED; + strlcpy(f->description, "codec", sizeof(f->description)); + } else if (f->type == OUTPUT_PLANE) { + colorformat = f->index & + inst->capabilities->cap[PIX_FMTS].step_or_mask; + f->pixelformat = get_v4l2_colorformat_from_vidc(colorformat); + if (!f->pixelformat) + return -EINVAL; + strlcpy(f->description, "colorformat", sizeof(f->description)); + } else if (f->type == INPUT_META_PLANE || f->type == OUTPUT_META_PLANE) { + if (!f->index) { + f->pixelformat = V4L2_PIX_FMT_VIDC_META; + strlcpy(f->description, "metadata", sizeof(f->description)); + } else { + return -EINVAL; + } + } return rc; } @@ -444,6 +498,7 @@ int msm_vdec_g_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) int msm_vdec_inst_init(struct msm_vidc_inst *inst) { int rc = 0; + int i; struct msm_vidc_core *core; struct v4l2_format *f; @@ -473,6 +528,10 @@ int msm_vdec_inst_init(struct msm_vidc_inst *inst) inst->buffers.input.extra_count; inst->buffers.input.size = f->fmt.pix.sizeimage; + inst->crop.x = inst->crop.y = 0; + inst->crop.width = f->fmt.pix.width; + inst->crop.height = f->fmt.pix.height; + f = &inst->fmts[INPUT_META_PORT]; f->type = INPUT_META_PLANE; f->fmt.meta.dataformat = V4L2_PIX_FMT_VIDC_META; @@ -487,9 +546,9 @@ int msm_vdec_inst_init(struct msm_vidc_inst *inst) f->type = OUTPUT_PLANE; f->fmt.pix.pixelformat = V4L2_PIX_FMT_NV12_UBWC; f->fmt.pix.width = VENUS_Y_STRIDE( - msm_vidc_convert_color_fmt(f->fmt.pix.pixelformat), DEFAULT_WIDTH); + get_media_colorformat_from_v4l2(f->fmt.pix.pixelformat), DEFAULT_WIDTH); f->fmt.pix.height = VENUS_Y_SCANLINES( - msm_vidc_convert_color_fmt(f->fmt.pix.pixelformat), DEFAULT_HEIGHT); + get_media_colorformat_from_v4l2(f->fmt.pix.pixelformat), DEFAULT_HEIGHT); f->fmt.pix.bytesperline = f->fmt.pix.width; f->fmt.pix.sizeimage = call_session_op(core, buffer_size, inst, MSM_VIDC_BUF_OUTPUT); @@ -515,6 +574,21 @@ int msm_vdec_inst_init(struct msm_vidc_inst *inst) inst->prop.frame_rate = DEFAULT_FPS << 16; inst->prop.operating_rate = DEFAULT_FPS << 16; + inst->capabilities = NULL; + for (i = 0; i < core->codecs_count; i++) { + if (core->inst_caps[i].domain == MSM_VIDC_DECODER && + core->inst_caps[i].codec == get_vidc_codec_from_v4l2( + inst->fmts[INPUT_PORT].fmt.pix.pixelformat)) { + s_vpr_h(inst->sid, "%s: assigned capabilities with %#x caps\n", + __func__, inst->fmts[INPUT_PORT].fmt.pix.pixelformat); + inst->capabilities = &core->inst_caps[i]; + } + } + if (!inst->capabilities) { + s_vpr_e(inst->sid, "%s: capabilities not found\n", __func__); + return -EINVAL; + } + return rc; } diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index 7ee0c4f633..f98f3e4695 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -14,10 +14,277 @@ #include "msm_vidc_platform.h" #include "msm_vidc_debug.h" +static int msm_venc_codec_change(struct msm_vidc_inst *inst, u32 codec) +{ + int rc = 0; + int i; + struct msm_vidc_core *core; + + d_vpr_h("%s()\n", __func__); + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + core = inst->core; + + inst->capabilities = NULL; + for (i = 0; i < core->codecs_count; i++) { + if (core->inst_caps[i].domain == MSM_VIDC_ENCODER && + core->inst_caps[i].codec == get_vidc_codec_from_v4l2( + inst->fmts[OUTPUT_PORT].fmt.pix.pixelformat)) { + s_vpr_h(inst->sid, "%s: assigned capabilities with %#x caps\n", + __func__, inst->fmts[OUTPUT_PORT].fmt.pix.pixelformat); + inst->capabilities = &core->inst_caps[i]; + } + } + if (!inst->capabilities) { + s_vpr_e(inst->sid, "%s: capabilities not found\n", __func__); + return -EINVAL; + } + + return rc; +} + +int msm_venc_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) +{ + int rc = 0; + struct msm_vidc_core *core; + struct v4l2_format *fmt; + + d_vpr_h("%s()\n", __func__); + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + core = inst->core; + + if (inst->state == MSM_VIDC_START) { + d_vpr_e("%s: invalid state %d\n", __func__, inst->state); + return -EINVAL; + } + + if (f->type == INPUT_PLANE) { + if (inst->state == MSM_VIDC_START_INPUT) { + d_vpr_e("%s: invalid state %d\n", __func__, inst->state); + return -EINVAL; + } + fmt = &inst->fmts[INPUT_PORT]; + fmt->type = INPUT_PLANE; + fmt->fmt.pix.pixelformat = f->fmt.pix.pixelformat; + fmt->fmt.pix.width = VENUS_Y_STRIDE( + get_media_colorformat_from_v4l2(fmt->fmt.pix.pixelformat), + f->fmt.pix.width); + fmt->fmt.pix.height = VENUS_Y_SCANLINES( + get_media_colorformat_from_v4l2(fmt->fmt.pix.pixelformat), + f->fmt.pix.height); + fmt->fmt.pix.bytesperline = fmt->fmt.pix.width; + fmt->fmt.pix.sizeimage = call_session_op(core, buffer_size, + inst, MSM_VIDC_BUF_INPUT); + inst->buffers.input.min_count = + call_session_op(core, min_count, inst, MSM_VIDC_BUF_INPUT); + inst->buffers.input.extra_count = + call_session_op(core, extra_count, inst, MSM_VIDC_BUF_INPUT); + if (inst->buffers.input.actual_count < + inst->buffers.input.min_count + + inst->buffers.input.extra_count) { + inst->buffers.input.actual_count = + inst->buffers.input.min_count + + inst->buffers.input.extra_count; + } + inst->buffers.input.size = fmt->fmt.pix.sizeimage; + + //rc = msm_vidc_check_session_supported(inst); + if (rc) + goto err_invalid_fmt; + //update_log_ctxt(inst->sid, inst->session_type, + // mplane->pixelformat); + s_vpr_h(inst->sid, + "%s: input: codec %#x width %d height %d size %d min_count %d extra_count %d\n", + __func__, f->fmt.pix.pixelformat, f->fmt.pix.width, + f->fmt.pix.height, fmt->fmt.pix.sizeimage, + inst->buffers.input.min_count, + inst->buffers.input.extra_count); + + //msm_vidc_update_dcvs(inst); + //msm_vidc_update_batching(inst); + + } else if (f->type == INPUT_META_PLANE) { + if (inst->state == MSM_VIDC_START_INPUT) { + d_vpr_e("%s: invalid state %d\n", __func__, inst->state); + return -EINVAL; + } + fmt = &inst->fmts[INPUT_META_PORT]; + fmt->type = INPUT_META_PLANE; + fmt->fmt.meta.dataformat = V4L2_PIX_FMT_VIDC_META; + fmt->fmt.meta.buffersize = call_session_op(core, buffer_size, + inst, MSM_VIDC_BUF_INPUT_META); + inst->buffers.input_meta.min_count = + inst->buffers.input.min_count; + inst->buffers.input_meta.extra_count = + inst->buffers.input.extra_count; + inst->buffers.input_meta.actual_count = + inst->buffers.input.actual_count; + inst->buffers.input_meta.size = fmt->fmt.meta.buffersize; + s_vpr_h(inst->sid, + "%s: input meta: size %d min_count %d extra_count %d\n", + __func__, fmt->fmt.meta.buffersize, + inst->buffers.input_meta.min_count, + inst->buffers.input_meta.extra_count); + } else if (f->type == OUTPUT_PLANE) { + if (inst->state == MSM_VIDC_START_OUTPUT) { + d_vpr_e("%s: invalid state %d\n", __func__, inst->state); + return -EINVAL; + } + fmt = &inst->fmts[OUTPUT_PORT]; + if (fmt->fmt.pix.pixelformat != f->fmt.pix.pixelformat) { + s_vpr_e(inst->sid, + "%s: codec changed from %#x to %#x\n", __func__, + fmt->fmt.pix.pixelformat, f->fmt.pix.pixelformat); + rc = msm_venc_codec_change(inst, f->fmt.pix.pixelformat); + if (rc) + goto err_invalid_fmt; + } + fmt->type = OUTPUT_PLANE; + fmt->fmt.pix.width = ALIGN(f->fmt.pix.width, 16); + fmt->fmt.pix.height = ALIGN(f->fmt.pix.height, 16); + fmt->fmt.pix.pixelformat = f->fmt.pix.pixelformat; + fmt->fmt.pix.bytesperline = 0; + fmt->fmt.pix.sizeimage = call_session_op(core, buffer_size, + inst, MSM_VIDC_BUF_OUTPUT); + inst->buffers.output.min_count = + call_session_op(core, min_count, inst, MSM_VIDC_BUF_OUTPUT); + inst->buffers.output.extra_count = + call_session_op(core, extra_count, inst, MSM_VIDC_BUF_OUTPUT); + if (inst->buffers.output.actual_count < + inst->buffers.output.min_count + + inst->buffers.output.extra_count) { + inst->buffers.output.actual_count = + inst->buffers.output.min_count + + inst->buffers.output.extra_count; + } + inst->buffers.output.size = fmt->fmt.pix.sizeimage; + + //rc = msm_vidc_check_session_supported(inst); + if (rc) + goto err_invalid_fmt; + + /* update crop dimensions */ + inst->crop.x = inst->crop.y = 0; + inst->crop.width = f->fmt.pix.width; + inst->crop.height = f->fmt.pix.height; + + //update_log_ctxt(inst->sid, inst->session_type, + // mplane->pixelformat); + + s_vpr_h(inst->sid, + "%s: output: format %#x width %d height %d size %d min_count %d extra_count %d\n", + __func__, fmt->fmt.pix.pixelformat, fmt->fmt.pix.width, + fmt->fmt.pix.height, fmt->fmt.pix.sizeimage, + inst->buffers.output.min_count, + inst->buffers.output.extra_count); + } else if (f->type == OUTPUT_META_PLANE) { + if (inst->state == MSM_VIDC_START_OUTPUT) { + d_vpr_e("%s: invalid state %d\n", __func__, inst->state); + return -EINVAL; + } + fmt = &inst->fmts[OUTPUT_META_PORT]; + fmt->type = OUTPUT_META_PLANE; + fmt->fmt.meta.dataformat = V4L2_PIX_FMT_VIDC_META; + fmt->fmt.meta.buffersize = call_session_op(core, buffer_size, + inst, MSM_VIDC_BUF_OUTPUT_META); + inst->buffers.output_meta.min_count = + inst->buffers.output.min_count; + inst->buffers.output_meta.extra_count = + inst->buffers.output.extra_count; + inst->buffers.output_meta.actual_count = + inst->buffers.output.actual_count; + inst->buffers.output_meta.size = fmt->fmt.meta.buffersize; + s_vpr_h(inst->sid, + "%s: input meta: size %d min_count %d extra_count %d\n", + __func__, fmt->fmt.meta.buffersize, + inst->buffers.output_meta.min_count, + inst->buffers.output_meta.extra_count); + } else { + s_vpr_e(inst->sid, "%s: invalid type %d\n", __func__, f->type); + goto err_invalid_fmt; + } + memcpy(f, fmt, sizeof(struct v4l2_format)); + +err_invalid_fmt: + return rc; +} + +int msm_venc_g_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) +{ + int rc = 0; + int port; + + d_vpr_h("%s()\n", __func__); + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + port = msm_vidc_get_port_from_v4l2_type(f->type); + if (port < 0) { + d_vpr_e("%s: invalid format type %d\n", __func__, f->type); + return -EINVAL; + } + memcpy(f, &inst->fmts[port], sizeof(struct v4l2_format)); + + return rc; +} + +int msm_venc_enum_fmt(struct msm_vidc_inst *inst, struct v4l2_fmtdesc *f) +{ + int rc = 0; + enum msm_vidc_codec_type codec; + enum msm_vidc_colorformat_type colorformat; + struct msm_vidc_core *core; + + if (!inst || !inst->core || !inst->capabilities || !f) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + core = inst->core; + + if (f->index >= + sizeof(inst->capabilities->cap[PIX_FMTS].step_or_mask) * 8) { + d_vpr_e("%s: invalid index %d\n", __func__, f->index); + return -EINVAL; + } + memset(f->reserved, 0, sizeof(f->reserved)); + + if (f->type == OUTPUT_PLANE) { + codec = core->capabilities[DEC_CODECS].value & f->index; + f->pixelformat = get_v4l2_codec_from_vidc(codec); + if (!f->pixelformat) + return -EINVAL; + f->flags = V4L2_FMT_FLAG_COMPRESSED; + strlcpy(f->description, "codec", sizeof(f->description)); + } else if (f->type == INPUT_PLANE) { + colorformat = f->index & + inst->capabilities->cap[PIX_FMTS].step_or_mask; + f->pixelformat = get_v4l2_colorformat_from_vidc(colorformat); + if (!f->pixelformat) + return -EINVAL; + strlcpy(f->description, "colorformat", sizeof(f->description)); + } else if (f->type == INPUT_META_PLANE || f->type == OUTPUT_META_PLANE) { + if (!f->index) { + f->pixelformat = V4L2_PIX_FMT_VIDC_META; + strlcpy(f->description, "metadata", sizeof(f->description)); + } else { + return -EINVAL; + } + } + + return rc; +} int msm_venc_inst_init(struct msm_vidc_inst *inst) { int rc = 0; + int i; struct msm_vidc_core *core; struct v4l2_format *f; @@ -45,6 +312,10 @@ int msm_venc_inst_init(struct msm_vidc_inst *inst) inst->buffers.output.extra_count; inst->buffers.output.size = f->fmt.pix.sizeimage; + inst->crop.x = inst->crop.y = 0; + inst->crop.width = f->fmt.pix.width; + inst->crop.height = f->fmt.pix.height; + f = &inst->fmts[OUTPUT_META_PORT]; f->type = OUTPUT_META_PLANE; f->fmt.meta.dataformat = V4L2_PIX_FMT_VIDC_META; @@ -59,9 +330,9 @@ int msm_venc_inst_init(struct msm_vidc_inst *inst) f->type = INPUT_PLANE; f->fmt.pix.pixelformat = V4L2_PIX_FMT_NV12_UBWC; f->fmt.pix.width = VENUS_Y_STRIDE( - msm_vidc_convert_color_fmt(f->fmt.pix.pixelformat), DEFAULT_WIDTH); + get_media_colorformat_from_v4l2(f->fmt.pix.pixelformat), DEFAULT_WIDTH); f->fmt.pix.height = VENUS_Y_SCANLINES( - msm_vidc_convert_color_fmt(f->fmt.pix.pixelformat), DEFAULT_HEIGHT); + get_media_colorformat_from_v4l2(f->fmt.pix.pixelformat), DEFAULT_HEIGHT); f->fmt.pix.bytesperline = f->fmt.pix.width; f->fmt.pix.sizeimage = call_session_op(core, buffer_size, inst, MSM_VIDC_BUF_INPUT); @@ -87,6 +358,21 @@ int msm_venc_inst_init(struct msm_vidc_inst *inst) inst->prop.frame_rate = DEFAULT_FPS << 16; inst->prop.operating_rate = DEFAULT_FPS << 16; + inst->capabilities = NULL; + for (i = 0; i < core->codecs_count; i++) { + if (core->inst_caps[i].domain == MSM_VIDC_ENCODER && + core->inst_caps[i].codec == get_vidc_codec_from_v4l2( + inst->fmts[OUTPUT_PORT].fmt.pix.pixelformat)) { + s_vpr_h(inst->sid, "%s: assigned capabilities with %#x caps\n", + __func__, inst->fmts[OUTPUT_PORT].fmt.pix.pixelformat); + inst->capabilities = &core->inst_caps[i]; + } + } + if (!inst->capabilities) { + s_vpr_e(inst->sid, "%s: capabilities not found\n", __func__); + return -EINVAL; + } + return rc; } diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index 1725dfccc6..c8b5a95551 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -25,61 +25,63 @@ bool valid_v4l2_buffer(struct v4l2_buffer *b, { return true; } -/* -static int get_poll_flags(struct msm_vidc_inst *inst) + +static int get_poll_flags(struct msm_vidc_inst *inst, u32 port) { - int rc = 0; - struct vb2_queue *outq = &inst->bufq[PORT_INPUT].vb2_bufq; - struct vb2_queue *capq = &inst->bufq[PORT_OUTPUT].vb2_bufq; - struct vb2_buffer *out_vb = NULL; - struct vb2_buffer *cap_vb = NULL; + int poll = 0; + struct vb2_queue *q = NULL; + struct vb2_buffer *vb = NULL; unsigned long flags = 0; - if (v4l2_event_pending(&inst->event_handler)) - rc |= POLLPRI; + if (!inst || port >= MAX_PORT) { + d_vpr_e("%s: invalid params, inst %pK, port %d\n", + __func__, inst, port); + return poll; + } + q = &inst->vb2q[port]; - spin_lock_irqsave(&capq->done_lock, flags); - if (!list_empty(&capq->done_list)) - cap_vb = list_first_entry(&capq->done_list, struct vb2_buffer, - done_entry); - if (cap_vb && (cap_vb->state == VB2_BUF_STATE_DONE - || cap_vb->state == VB2_BUF_STATE_ERROR)) - rc |= POLLIN | POLLRDNORM; - spin_unlock_irqrestore(&capq->done_lock, flags); + spin_lock_irqsave(&q->done_lock, flags); + if (!list_empty(&q->done_list)) + vb = list_first_entry(&q->done_list, struct vb2_buffer, + done_entry); + if (vb && (vb->state == VB2_BUF_STATE_DONE || + vb->state == VB2_BUF_STATE_ERROR)) { + if (port == OUTPUT_PORT || port == OUTPUT_META_PORT) + poll |= POLLIN | POLLRDNORM; + else if (port == INPUT_PORT || port == INPUT_META_PORT) + poll |= POLLOUT | POLLWRNORM; + } + spin_unlock_irqrestore(&q->done_lock, flags); - spin_lock_irqsave(&outq->done_lock, flags); - if (!list_empty(&outq->done_list)) - out_vb = list_first_entry(&outq->done_list, struct vb2_buffer, - done_entry); - if (out_vb && (out_vb->state == VB2_BUF_STATE_DONE - || out_vb->state == VB2_BUF_STATE_ERROR)) - rc |= POLLOUT | POLLWRNORM; - spin_unlock_irqrestore(&outq->done_lock, flags); - - return rc; + return poll; } -*/ int msm_vidc_poll(void *instance, struct file *filp, struct poll_table_struct *wait) { -/* + int poll = 0; struct msm_vidc_inst *inst = instance; - struct vb2_queue *outq = NULL; - struct vb2_queue *capq = NULL; - if (!inst) + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; - - outq = &inst->bufq[PORT_INPUT].vb2_bufq; - capq = &inst->bufq[PORT_OUTPUT].vb2_bufq; + } poll_wait(filp, &inst->event_handler.wait, wait); - poll_wait(filp, &capq->done_wq, wait); - poll_wait(filp, &outq->done_wq, wait); - return get_poll_flags(inst); -*/ - return 0; + poll_wait(filp, &inst->vb2q[INPUT_META_PORT].done_wq, wait); + poll_wait(filp, &inst->vb2q[OUTPUT_META_PORT].done_wq, wait); + poll_wait(filp, &inst->vb2q[INPUT_PORT].done_wq, wait); + poll_wait(filp, &inst->vb2q[OUTPUT_PORT].done_wq, wait); + + if (v4l2_event_pending(&inst->event_handler)) + poll |= POLLPRI; + + poll |= get_poll_flags(inst, INPUT_META_PORT); + poll |= get_poll_flags(inst, OUTPUT_META_PORT); + poll |= get_poll_flags(inst, INPUT_PORT); + poll |= get_poll_flags(inst, OUTPUT_PORT); + + return poll; } EXPORT_SYMBOL(msm_vidc_poll); @@ -87,14 +89,16 @@ int msm_vidc_querycap(void *instance, struct v4l2_capability *cap) { struct msm_vidc_inst *inst = instance; - if (!inst || !cap) + if (!inst || !cap) { + d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; + } strlcpy(cap->driver, MSM_VIDC_DRV_NAME, sizeof(cap->driver)); cap->bus_info[0] = 0; cap->version = MSM_VIDC_VERSION; - cap->device_caps = V4L2_CAP_VIDEO_CAPTURE_MPLANE | - V4L2_CAP_VIDEO_OUTPUT_MPLANE | + cap->device_caps = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_META_CAPTURE | + V4L2_CAP_VIDEO_OUTPUT | V4L2_CAP_META_OUTPUT | V4L2_CAP_STREAMING; cap->capabilities = cap->device_caps | V4L2_CAP_DEVICE_CAPS; @@ -115,13 +119,16 @@ int msm_vidc_enum_fmt(void *instance, struct v4l2_fmtdesc *f) { struct msm_vidc_inst *inst = instance; - if (!inst || !f) + if (!inst || !f) { + d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; + } if (inst->domain == MSM_VIDC_DECODER) - return -EINVAL;//msm_vdec_enum_fmt(instance, f); - else if (inst->domain == MSM_VIDC_ENCODER) - return -EINVAL;//msm_venc_enum_fmt(instance, f); + return msm_vdec_enum_fmt(inst, f); + if (inst->domain == MSM_VIDC_ENCODER) + return msm_venc_enum_fmt(inst, f); + return -EINVAL; } EXPORT_SYMBOL(msm_vidc_enum_fmt); @@ -200,8 +207,10 @@ int msm_vidc_s_fmt(void *instance, struct v4l2_format *f) int rc = 0; struct msm_vidc_inst *inst = instance; - if (!inst || !f) + if (!inst || !f) { + d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; + } if (f->type == INPUT_PLANE) { if (inst->state != MSM_VIDC_OPEN && @@ -225,7 +234,7 @@ int msm_vidc_s_fmt(void *instance, struct v4l2_format *f) if (inst->domain == MSM_VIDC_DECODER) rc = msm_vdec_s_fmt(inst, f); if (inst->domain == MSM_VIDC_ENCODER) - rc = 0;//msm_venc_s_fmt(instance, f); + rc = msm_venc_s_fmt(inst, f); return rc; } @@ -236,13 +245,15 @@ int msm_vidc_g_fmt(void *instance, struct v4l2_format *f) int rc = 0; struct msm_vidc_inst *inst = instance; - if (!inst || !f) + if (!inst || !f) { + d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; + } if (inst->domain == MSM_VIDC_DECODER) rc = msm_vdec_g_fmt(inst, f); if (inst->domain == MSM_VIDC_ENCODER) - rc = 0;//msm_venc_g_fmt(instance, f); + rc = msm_venc_g_fmt(inst, f); return rc; } @@ -265,9 +276,10 @@ int msm_vidc_g_ctrl(void *instance, struct v4l2_control *control) struct v4l2_ctrl *ctrl = NULL; int rc = 0; - if (!inst || !control) + if (!inst || !control) { + d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; - + } ctrl = v4l2_ctrl_find(&inst->ctrl_handler, control->id); if (ctrl) { rc = msm_vidc_get_control(inst, ctrl); @@ -285,8 +297,10 @@ int msm_vidc_reqbufs(void *instance, struct v4l2_requestbuffers *b) struct msm_vidc_inst *inst = instance; int port; - if (!inst || !b) + if (!inst || !b) { + d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; + } mutex_lock(&inst->lock); @@ -347,8 +361,10 @@ int msm_vidc_streamon(void *instance, enum v4l2_buf_type type) enum msm_vidc_inst_state new_state = 0; int port; - if (!inst) + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; + } mutex_lock(&inst->lock); @@ -425,8 +441,10 @@ int msm_vidc_streamoff(void *instance, enum v4l2_buf_type type) enum msm_vidc_inst_state new_state = 0; int port; - if (!inst) + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; + } mutex_lock(&inst->lock); @@ -524,10 +542,11 @@ int msm_vidc_subscribe_event(void *instance, int rc = 0; struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; - if (!inst || !sub) + if (!inst || !sub) { + d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; - - s_vpr_e(inst->sid, "%s: type %d id %d\n", __func__, sub->type, sub->id); + } + s_vpr_h(inst->sid, "%s: type %d id %d\n", __func__, sub->type, sub->id); rc = v4l2_event_subscribe(&inst->event_handler, sub, MAX_EVENTS, NULL); return rc; @@ -540,10 +559,11 @@ int msm_vidc_unsubscribe_event(void *instance, int rc = 0; struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; - if (!inst || !sub) + if (!inst || !sub) { + d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; - - s_vpr_e(inst->sid, "%s: type %d id %d\n", __func__, sub->type, sub->id); + } + s_vpr_h(inst->sid, "%s: type %d id %d\n", __func__, sub->type, sub->id); rc = v4l2_event_unsubscribe(&inst->event_handler, sub); return rc; } @@ -554,9 +574,10 @@ int msm_vidc_dqevent(void *instance, struct v4l2_event *event) int rc = 0; struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; - if (!inst || !event) + if (!inst || !event) { + d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; - + } rc = v4l2_event_dequeue(&inst->event_handler, event, false); return rc; } diff --git a/driver/vidc/src/msm_vidc_buffer.c b/driver/vidc/src/msm_vidc_buffer.c index c2e9ec9943..7b31c89e9b 100644 --- a/driver/vidc/src/msm_vidc_buffer.c +++ b/driver/vidc/src/msm_vidc_buffer.c @@ -148,7 +148,7 @@ u32 msm_vidc_decoder_output_size(struct msm_vidc_inst *inst) struct v4l2_format *f; f = &inst->fmts[OUTPUT_PORT]; - format = msm_vidc_convert_color_fmt(f->fmt.pix.pixelformat); + format = get_media_colorformat_from_v4l2(f->fmt.pix.pixelformat); return VENUS_BUFFER_SIZE(format, f->fmt.pix.width, f->fmt.pix.height); } @@ -169,7 +169,7 @@ u32 msm_vidc_encoder_input_size(struct msm_vidc_inst *inst) struct v4l2_format *f; f = &inst->fmts[INPUT_PORT]; - format = msm_vidc_convert_color_fmt(f->fmt.pix.pixelformat); + format = get_media_colorformat_from_v4l2(f->fmt.pix.pixelformat); return VENUS_BUFFER_SIZE(format, f->fmt.pix.width, f->fmt.pix.height); } diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 00729b0e22..6f1d5ae7a7 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -26,6 +26,145 @@ void print_vidc_buffer(struct msm_vidc_inst *inst, struct msm_vidc_buffer *b) { } +enum msm_vidc_codec_type get_vidc_codec_from_v4l2(u32 v4l2_codec) +{ + enum msm_vidc_codec_type codec = 0; + + switch (v4l2_codec) { + case V4L2_PIX_FMT_H264: + codec = MSM_VIDC_H264; + break; + case V4L2_PIX_FMT_HEVC: + codec = MSM_VIDC_HEVC; + break; + case V4L2_PIX_FMT_VP9: + codec = MSM_VIDC_VP9; + break; + case V4L2_PIX_FMT_MPEG2: + codec = MSM_VIDC_MPEG2; + break; + default: + d_vpr_e("%s: vidc codec not found for %#x\n", __func__, v4l2_codec); + break; + } + return codec; +} + +u32 get_v4l2_codec_from_vidc(enum msm_vidc_codec_type codec) +{ + u32 v4l2_codec = 0; + + switch (codec) { + case MSM_VIDC_H264: + v4l2_codec = V4L2_PIX_FMT_H264; + break; + case MSM_VIDC_HEVC: + v4l2_codec = V4L2_PIX_FMT_HEVC; + break; + case MSM_VIDC_VP9: + v4l2_codec = V4L2_PIX_FMT_VP9; + break; + case MSM_VIDC_MPEG2: + v4l2_codec = V4L2_PIX_FMT_MPEG2; + break; + default: + d_vpr_e("%s: v4l2 codec not found for %#x\n", __func__, codec); + break; + } + return v4l2_codec; +} + +enum msm_vidc_colorformat_type get_vidc_colorformat_from_v4l2(u32 v4l2_colorformat) +{ + enum msm_vidc_colorformat_type colorformat = 0; + + switch (v4l2_colorformat) { + case V4L2_PIX_FMT_NV12: + colorformat = MSM_VIDC_FMT_NV12; + break; + case V4L2_PIX_FMT_NV21: + colorformat = MSM_VIDC_FMT_NV21; + break; + case V4L2_PIX_FMT_NV12_UBWC: + colorformat = MSM_VIDC_FMT_NV12_UBWC; + break; + case V4L2_PIX_FMT_NV12_TP10_UBWC: + colorformat = MSM_VIDC_FMT_NV12_TP10_UBWC; + break; + case V4L2_PIX_FMT_RGBA8888_UBWC: + colorformat = MSM_VIDC_FMT_RGBA8888_UBWC; + break; + case V4L2_PIX_FMT_NV12_P010_UBWC: + colorformat = MSM_VIDC_FMT_SDE_Y_CBCR_H2V2_P010_VENUS; + break; + case V4L2_PIX_FMT_SDE_Y_CBCR_H2V2_P010_VENUS: + colorformat = MSM_VIDC_FMT_SDE_Y_CBCR_H2V2_P010_VENUS; + break; + default: + d_vpr_e("%s: vidc format not found for %#x\n", __func__, v4l2_colorformat); + break; + } + return colorformat; +} + +u32 get_v4l2_colorformat_from_vidc(enum msm_vidc_colorformat_type colorformat) +{ + u32 v4l2_colorformat = 0; + + switch (colorformat) { + case MSM_VIDC_FMT_NV12: + v4l2_colorformat = V4L2_PIX_FMT_NV12; + break; + case MSM_VIDC_FMT_NV21: + v4l2_colorformat = V4L2_PIX_FMT_NV21; + break; + case MSM_VIDC_FMT_NV12_UBWC: + v4l2_colorformat = V4L2_PIX_FMT_NV12_UBWC; + break; + case MSM_VIDC_FMT_NV12_TP10_UBWC: + v4l2_colorformat = V4L2_PIX_FMT_NV12_TP10_UBWC; + break; + case MSM_VIDC_FMT_RGBA8888_UBWC: + v4l2_colorformat = V4L2_PIX_FMT_RGBA8888_UBWC; + break; + case MSM_VIDC_FMT_NV12_P010_UBWC: + v4l2_colorformat = V4L2_PIX_FMT_SDE_Y_CBCR_H2V2_P010_VENUS; + break; + case MSM_VIDC_FMT_SDE_Y_CBCR_H2V2_P010_VENUS: + v4l2_colorformat = V4L2_PIX_FMT_SDE_Y_CBCR_H2V2_P010_VENUS; + break; + default: + d_vpr_e("%s: v4l2 format not found for %#x\n", __func__, colorformat); + break; + } + return v4l2_colorformat; +} + +u32 get_media_colorformat_from_v4l2(u32 v4l2_fmt) +{ + switch (v4l2_fmt) { + case V4L2_PIX_FMT_NV12: + return COLOR_FMT_NV12; + case V4L2_PIX_FMT_NV21: + return COLOR_FMT_NV21; + case V4L2_PIX_FMT_NV12_512: + return COLOR_FMT_NV12_512; + case V4L2_PIX_FMT_SDE_Y_CBCR_H2V2_P010_VENUS: + return COLOR_FMT_P010; + case V4L2_PIX_FMT_NV12_UBWC: + return COLOR_FMT_NV12_UBWC; + case V4L2_PIX_FMT_NV12_TP10_UBWC: + return COLOR_FMT_NV12_BPP10_UBWC; + case V4L2_PIX_FMT_RGBA8888_UBWC: + return COLOR_FMT_RGBA8888_UBWC; + default: + d_vpr_e( + "Invalid v4l2 color fmt FMT : %x, Set default(NV12)", + v4l2_fmt); + return COLOR_FMT_NV12; + } +} + int msm_vidc_get_port_from_v4l2_type(u32 type) { int port; @@ -227,31 +366,6 @@ int msm_vidc_get_control(struct msm_vidc_inst *inst, struct v4l2_ctrl *ctrl) return rc; } -u32 msm_vidc_convert_color_fmt(u32 v4l2_fmt) -{ - switch (v4l2_fmt) { - case V4L2_PIX_FMT_NV12: - return COLOR_FMT_NV12; - case V4L2_PIX_FMT_NV21: - return COLOR_FMT_NV21; - case V4L2_PIX_FMT_NV12_512: - return COLOR_FMT_NV12_512; - case V4L2_PIX_FMT_SDE_Y_CBCR_H2V2_P010_VENUS: - return COLOR_FMT_P010; - case V4L2_PIX_FMT_NV12_UBWC: - return COLOR_FMT_NV12_UBWC; - case V4L2_PIX_FMT_NV12_TP10_UBWC: - return COLOR_FMT_NV12_BPP10_UBWC; - case V4L2_PIX_FMT_RGBA8888_UBWC: - return COLOR_FMT_RGBA8888_UBWC; - default: - d_vpr_e( - "Invalid v4l2 color fmt FMT : %x, Set default(NV12)", - v4l2_fmt); - return COLOR_FMT_NV12; - } -} - int msm_vidc_create_internal_buffers(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type buffer_type) { @@ -609,7 +723,7 @@ static void update_inst_capability(struct msm_platform_inst_capability *in, capability->cap[in->cap].cap = in->cap; capability->cap[in->cap].min = in->min; capability->cap[in->cap].max = in->max; - capability->cap[in->cap].step_or_menu = in->step_or_menu; + capability->cap[in->cap].step_or_mask = in->step_or_mask; capability->cap[in->cap].value = in->value; capability->cap[in->cap].flags = in->flags; capability->cap[in->cap].v4l2_id = in->v4l2_id; @@ -658,6 +772,8 @@ static int msm_vidc_init_instance_caps(struct msm_vidc_core *core) count_bits = dec_valid_codecs; COUNT_BITS(count_bits, codecs_count); + core->codecs_count = codecs_count; + if (!core->inst_caps) { core->inst_caps = kcalloc(codecs_count, sizeof(struct msm_vidc_inst_capability), diff --git a/driver/vidc/src/msm_vidc_probe.c b/driver/vidc/src/msm_vidc_probe.c index f55a82010d..dc7eadce1e 100644 --- a/driver/vidc/src/msm_vidc_probe.c +++ b/driver/vidc/src/msm_vidc_probe.c @@ -118,7 +118,8 @@ static int msm_vidc_register_video_device(struct msm_vidc_core *core, core->vdev[index].type = type; core->vdev[index].vdev.v4l2_dev = &core->v4l2_dev; core->vdev[index].vdev.device_caps = - V4L2_CAP_VIDEO_CAPTURE_MPLANE | V4L2_CAP_VIDEO_OUTPUT_MPLANE | + V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_META_CAPTURE | + V4L2_CAP_VIDEO_OUTPUT | V4L2_CAP_META_OUTPUT | V4L2_CAP_STREAMING; rc = video_register_device(&core->vdev[index].vdev, VFL_TYPE_GRABBER, nr); From 6246ad4ce95a2646812bd96bf3bd941551603dcd Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Wed, 26 Aug 2020 23:51:04 -0700 Subject: [PATCH 0008/1061] driver: vidc: add support for control initialization Add support for control initialization and set control implementation. Modified hfi_create_header() and hfi_create_packet() to handle offset and num_packets within in the function itself. Change-Id: If8560be8a884c5df2fcc91f75be90311f1003a41 Signed-off-by: Akshata Sahukar Signed-off-by: Maheshwar Ajja --- Makefile | 1 + driver/platform/waipio/src/msm_vidc_waipio.c | 52 ++++- driver/vidc/inc/hfi_packet.h | 6 +- driver/vidc/inc/msm_vdec.h | 1 - driver/vidc/inc/msm_venc.h | 1 - driver/vidc/inc/msm_vidc_control.h | 20 ++ driver/vidc/inc/msm_vidc_driver.h | 1 + driver/vidc/inc/msm_vidc_inst.h | 3 + driver/vidc/inc/msm_vidc_internal.h | 26 ++- driver/vidc/inc/msm_vidc_platform.h | 14 +- driver/vidc/src/hfi_packet.c | 215 ++++++++---------- driver/vidc/src/msm_vdec.c | 53 +---- driver/vidc/src/msm_venc.c | 55 +---- driver/vidc/src/msm_vidc.c | 23 +- driver/vidc/src/msm_vidc_control.c | 223 +++++++++++++++++++ driver/vidc/src/msm_vidc_driver.c | 32 +++ driver/vidc/src/msm_vidc_platform.c | 4 +- driver/vidc/src/venus_hfi.c | 34 +-- 18 files changed, 489 insertions(+), 275 deletions(-) create mode 100644 driver/vidc/inc/msm_vidc_control.h create mode 100644 driver/vidc/src/msm_vidc_control.c diff --git a/Makefile b/Makefile index 9549636a68..d43f30ab6f 100644 --- a/Makefile +++ b/Makefile @@ -21,6 +21,7 @@ msm-vidc-objs := driver/vidc/src/msm_vidc_v4l2.o \ driver/vidc/src/msm_vdec.o \ driver/vidc/src/msm_venc.o \ driver/vidc/src/msm_vidc_driver.o \ + driver/vidc/src/msm_vidc_control.o \ driver/vidc/src/msm_vidc_buffer.o \ driver/vidc/src/msm_vidc_probe.o \ driver/vidc/src/msm_vidc_dt.o \ diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 5288b91cd8..593c52ec7c 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -10,6 +10,8 @@ #include "msm_vidc_debug.h" #include "msm_vidc_internal.h" #include "msm_vidc_core.h" +#include "msm_vidc_control.h" +#include "hfi_property.h" #define DDR_TYPE_LPDDR4 0x6 #define DDR_TYPE_LPDDR4X 0x7 @@ -82,7 +84,14 @@ static struct msm_platform_core_capability core_data_waipio[] = { }; static struct msm_platform_inst_capability instance_data_waipio[] = { - /* {type, domains, codecs, min, max, step_or_mask, value} */ + /* {cap, domain, codec, + * min, max, step_or_mask, value, + * v4l2_id, hfi_id, + * flags, + * parents, + * children, + * adjust, set} + */ {FRAME_WIDTH, ENC|DEC, CODECS_ALL, 128, 8192, 1, 1920}, {FRAME_HEIGHT, ENC|DEC, CODECS_ALL, 128, 8192, 1, 1080}, {PIX_FMTS, ENC, CODECS_ALL, @@ -104,8 +113,45 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { /* ((1920 * 1088) / 256) * 960 fps */ {MBPS, ENC|DEC, CODECS_ALL, 64, 7833600, 1, 7833600}, {FRAME_RATE, ENC|DEC, CODECS_ALL, 1, 960, 1, 30}, - {BIT_RATE, ENC|DEC, CODECS_ALL, 1, 220000000, 1, 20000000}, - {BIT_RATE, ENC, HEVC, 1, 160000000, 1, 20000000}, + {BIT_RATE, ENC|DEC, CODECS_ALL, + 1, 220000000, 1, 20000000, + V4L2_CID_MPEG_VIDEO_BITRATE, HFI_PROP_TOTAL_BITRATE, + CAP_FLAG_DYNAMIC_ALLOWED, + /* TO DO parents */ {0}, + {LAYER_BITRATE, SLICE_BYTE}}, + + {BIT_RATE, ENC, HEVC, + 1, 160000000, 1, 20000000, + V4L2_CID_MPEG_VIDEO_BITRATE, HFI_PROP_TOTAL_BITRATE, + CAP_FLAG_DYNAMIC_ALLOWED, + /* TO DO parents */{0}, + {LAYER_BITRATE, SLICE_BYTE}}, + + {ENTROPY_MODE, ENC, H264, + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC, + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC | + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, + V4L2_CID_MPEG_VIDEO_H264_ENTROPY_MODE, HFI_PROP_CABAC_SESSION, + CAP_FLAG_MENU, + {PROFILE}, + {BIT_RATE}}, + + {PROFILE, ENC|DEC, H264, + V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE, + V4L2_MPEG_VIDEO_H264_PROFILE_HIGH_10, + V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE | + V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_BASELINE | + V4L2_MPEG_VIDEO_H264_PROFILE_MAIN | + V4L2_MPEG_VIDEO_H264_PROFILE_HIGH | + V4L2_MPEG_VIDEO_H264_PROFILE_HIGH_10, + V4L2_MPEG_VIDEO_H264_PROFILE_HIGH, + V4L2_CID_MPEG_VIDEO_H264_PROFILE, HFI_PROP_PROFILE, + CAP_FLAG_ROOT | CAP_FLAG_MENU, + {0}, + {ENTROPY_MODE}}, + {CABAC_BITRATE, ENC, H264, 1, 160000000, 1, 20000000}, {SCALE_X, ENC, CODECS_ALL, 8192, 65536, 1, 8192}, {SCALE_Y, ENC, CODECS_ALL, 8192, 65536, 1, 8192}, diff --git a/driver/vidc/inc/hfi_packet.h b/driver/vidc/inc/hfi_packet.h index 545dac94ab..141f599d9b 100644 --- a/driver/vidc/inc/hfi_packet.h +++ b/driver/vidc/inc/hfi_packet.h @@ -20,9 +20,9 @@ u32 get_hfi_buffer_type(enum msm_vidc_domain_type domain, u32 get_hfi_codec(struct msm_vidc_inst *inst); int get_hfi_buffer(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buffer, struct hfi_buffer *buf); -int hfi_create_header(u8 *pkt, u32 session_id, - u32 header_id, u32 num_packets, u32 total_size); -int hfi_create_packet(u8 *packet, u32 packet_size, u32 *offset, +int hfi_create_header(u8 *packet, u32 packet_size, + u32 session_id, u32 header_id); +int hfi_create_packet(u8 *packet, u32 packet_size, u32 pkt_type, u32 pkt_flags, u32 payload_type, u32 port, u32 packet_id, void *payload, u32 payload_size); int hfi_create_buffer(u8 *packet, u32 packet_size, u32 *offset, diff --git a/driver/vidc/inc/msm_vdec.h b/driver/vidc/inc/msm_vdec.h index 71abfc0ef8..f58a3440b4 100644 --- a/driver/vidc/inc/msm_vdec.h +++ b/driver/vidc/inc/msm_vdec.h @@ -17,6 +17,5 @@ int msm_vdec_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f); int msm_vdec_g_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f); int msm_vdec_enum_fmt(struct msm_vidc_inst *inst, struct v4l2_fmtdesc *f); int msm_vdec_inst_init(struct msm_vidc_inst *inst); -int msm_vdec_ctrl_init(struct msm_vidc_inst *inst); #endif // _MSM_VDEC_H_ \ No newline at end of file diff --git a/driver/vidc/inc/msm_venc.h b/driver/vidc/inc/msm_venc.h index 8af066db14..1d1f41e921 100644 --- a/driver/vidc/inc/msm_venc.h +++ b/driver/vidc/inc/msm_venc.h @@ -13,6 +13,5 @@ int msm_venc_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f); int msm_venc_g_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f); int msm_venc_enum_fmt(struct msm_vidc_inst *inst, struct v4l2_fmtdesc *f); int msm_venc_inst_init(struct msm_vidc_inst *inst); -int msm_venc_ctrl_init(struct msm_vidc_inst *inst); #endif // _MSM_VENC_H_ \ No newline at end of file diff --git a/driver/vidc/inc/msm_vidc_control.h b/driver/vidc/inc/msm_vidc_control.h new file mode 100644 index 0000000000..1cce5cd5aa --- /dev/null +++ b/driver/vidc/inc/msm_vidc_control.h @@ -0,0 +1,20 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) 2020, The Linux Foundation. All rights reserved. + */ + +#ifndef _MSM_VIDC_CONTROL_H_ +#define _MSM_VIDC_CONTROL_H_ + +#include "msm_vidc_inst.h" +#include "msm_vidc_internal.h" + +enum msm_vidc_ctrl_list_type { + CHILD_LIST = BIT(0), + FW_LIST = BIT(1), +}; + +int msm_vidc_ctrl_init(struct msm_vidc_inst *inst); +int msm_v4l2_op_s_ctrl(struct v4l2_ctrl *ctrl); + +#endif diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index b6cc9633cc..4e13cb8b7e 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -81,6 +81,7 @@ int msm_vidc_release_internal_buffers(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type buffer_type); int msm_vidc_add_session(struct msm_vidc_inst *inst); int msm_vidc_session_open(struct msm_vidc_inst *inst); +int msm_vidc_get_inst_capability(struct msm_vidc_inst *inst, u32 codec); int msm_vidc_core_init(struct msm_vidc_core *core); int msm_vidc_smmu_fault_handler(struct iommu_domain *domain, struct device *dev, unsigned long iova, int flags, void *data); diff --git a/driver/vidc/inc/msm_vidc_inst.h b/driver/vidc/inc/msm_vidc_inst.h index 43bd43d264..13bb322006 100644 --- a/driver/vidc/inc/msm_vidc_inst.h +++ b/driver/vidc/inc/msm_vidc_inst.h @@ -89,6 +89,9 @@ struct msm_vidc_inst { struct v4l2_fh event_handler; struct v4l2_ctrl **ctrls; u32 num_ctrls; + struct msm_vidc_inst_cap_entry child_ctrls; + struct msm_vidc_inst_cap_entry fw_ctrls; + bool request; struct vb2_queue vb2q[MAX_PORT]; struct msm_vidc_crop crop; struct msm_vidc_properties prop; diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 5e298913c7..d95b8f9663 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -64,6 +64,10 @@ #define NUM_MBS_PER_FRAME(__height, __width) \ ((ALIGN(__height, 16) / 16) * (ALIGN(__width, 16) / 16)) +#define IS_PRIV_CTRL(idx) ( \ + (V4L2_CTRL_ID2WHICH(idx) == V4L2_CTRL_CLASS_MPEG) && \ + V4L2_CTRL_DRIVER_PRIV(idx)) + /* * Convert Q16 number into Integer and Fractional part upto 2 places. * Ex : 105752 / 65536 = 1.61; 1.61 in Q16 = 105752; @@ -174,6 +178,9 @@ enum msm_vidc_inst_capability_type { MBPS, FRAME_RATE, BIT_RATE, + BITRATE_MODE, + LAYER_BITRATE, + ENTROPY_MODE, CABAC_BITRATE, LTR_COUNT, LCU_SIZE, @@ -215,6 +222,7 @@ enum msm_vidc_inst_capability_type { }; enum msm_vidc_inst_capability_flags { + CAP_FLAG_NONE = 0, CAP_FLAG_ROOT = BIT(0), CAP_FLAG_DYNAMIC_ALLOWED = BIT(1), CAP_FLAG_MENU = BIT(2), @@ -226,13 +234,16 @@ struct msm_vidc_inst_cap { s32 max; u32 step_or_mask; s32 value; - enum msm_vidc_inst_capability_flags flags; u32 v4l2_id; u32 hfi_id; - u8 parents[MAX_CAP_PARENTS]; - u8 children[MAX_CAP_CHILDREN]; - void (*adjust)(void *inst, s32 new_value); - int (*set)(void *inst, struct v4l2_ctrl *ctrl); + enum msm_vidc_inst_capability_flags flags; + enum msm_vidc_inst_capability_type parents[MAX_CAP_PARENTS]; + enum msm_vidc_inst_capability_type children[MAX_CAP_CHILDREN]; + int (*adjust)(void *inst, + enum msm_vidc_inst_capability_type cap_id, + struct v4l2_ctrl *ctrl); + int (*set)(void *inst, + enum msm_vidc_inst_capability_type cap_id); }; struct msm_vidc_inst_capability { @@ -246,6 +257,11 @@ struct msm_vidc_core_capability { u32 value; }; +struct msm_vidc_inst_cap_entry { + struct list_head list; + enum msm_vidc_inst_capability_type cap_id; +}; + enum efuse_purpose { SKU_VERSION = 0, }; diff --git a/driver/vidc/inc/msm_vidc_platform.h b/driver/vidc/inc/msm_vidc_platform.h index ecef436290..5e67dbe5dc 100644 --- a/driver/vidc/inc/msm_vidc_platform.h +++ b/driver/vidc/inc/msm_vidc_platform.h @@ -9,6 +9,7 @@ #include #include "msm_vidc_internal.h" +#include struct msm_platform_core_capability { enum msm_vidc_core_capability_type type; @@ -23,13 +24,16 @@ struct msm_platform_inst_capability { s32 max; u32 step_or_mask; s32 value; - enum msm_vidc_inst_capability_flags flags; u32 v4l2_id; u32 hfi_id; - u8 parents[MAX_CAP_PARENTS]; - u8 children[MAX_CAP_CHILDREN]; - void (*adjust)(void *inst, s32 new_value); - int (*set)(void *inst, struct v4l2_ctrl *ctrl); + enum msm_vidc_inst_capability_flags flags; + enum msm_vidc_inst_capability_type parents[MAX_CAP_PARENTS]; + enum msm_vidc_inst_capability_type children[MAX_CAP_CHILDREN]; + int (*adjust)(void *inst, + enum msm_vidc_inst_capability_type cap_id, + struct v4l2_ctrl *ctrl); + int (*set)(void *inst, + enum msm_vidc_inst_capability_type cap_id); }; struct msm_vidc_csc_coeff { diff --git a/driver/vidc/src/hfi_packet.c b/driver/vidc/src/hfi_packet.c index b992e288ef..5f1e53cc32 100644 --- a/driver/vidc/src/hfi_packet.c +++ b/driver/vidc/src/hfi_packet.c @@ -115,7 +115,7 @@ int get_hfi_buffer(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buffer, struct hfi_buffer *buf) { if (!inst || !buffer || !buf) { - d_vpr_e("%: invalid params\n", __func__); + d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -136,36 +136,50 @@ int get_hfi_buffer(struct msm_vidc_inst *inst, return 0; } -int hfi_create_header(u8 *pkt, u32 session_id, - u32 header_id, u32 num_packets, u32 total_size) +int hfi_create_header(u8 *packet, u32 packet_size, u32 session_id, + u32 header_id) { - struct hfi_header *hdr = (struct hfi_header *)pkt; + struct hfi_header *hdr = (struct hfi_header *)packet; - memset(hdr, 0, sizeof(struct hfi_header)); - - hdr->size = total_size; - hdr->session_id = session_id; - hdr->header_id = header_id; - hdr->num_packets = num_packets; - return 0; -} - -int hfi_create_packet(u8 *packet, u32 packet_size, u32 *offset, - u32 pkt_type, u32 pkt_flags, u32 payload_type, u32 port, - u32 packet_id, void *payload, u32 payload_size) -{ - u32 available_size = packet_size - *offset; - u32 pkt_size = sizeof(struct hfi_packet) + payload_size; - struct hfi_packet *pkt = (struct hfi_packet *)(packet + *offset); - - if (available_size < pkt_size) { - d_vpr_e("%s: Bad packet Size for packet type %d\n", - __func__, pkt_type); + if (!packet || packet_size < sizeof(struct hfi_header)) { + d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - memset(pkt, 0, pkt_size); + memset(hdr, 0, sizeof(struct hfi_header)); + hdr->size = sizeof(struct hfi_header); + hdr->session_id = session_id; + hdr->header_id = header_id; + hdr->num_packets = 0; + return 0; +} + +int hfi_create_packet(u8 *packet, u32 packet_size, + u32 pkt_type, u32 pkt_flags, u32 payload_type, u32 port, + u32 packet_id, void *payload, u32 payload_size) +{ + struct hfi_header *hdr; + struct hfi_packet *pkt; + u32 pkt_size; + + if (!packet) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + hdr = (struct hfi_header *)packet; + if (hdr->size < sizeof(struct hfi_header)) { + d_vpr_e("%s: invalid hdr size %d\n", __func__, hdr->size); + return -EINVAL; + } + pkt = (struct hfi_packet *)(packet + hdr->size); + pkt_size = sizeof(struct hfi_packet) + payload_size; + if (packet_size < hdr->size + pkt_size) { + d_vpr_e("%s: invalid packet_size %d, %d %d\n", + __func__, packet_size, hdr->size, pkt_size); + return -EINVAL; + } + memset(pkt, 0, pkt_size); pkt->size = pkt_size; pkt->type = pkt_type; pkt->flags = pkt_flags; @@ -175,7 +189,9 @@ int hfi_create_packet(u8 *packet, u32 packet_size, u32 *offset, if (payload_size) memcpy((u8 *)pkt + sizeof(struct hfi_packet), payload, payload_size); - *offset = *offset + pkt->size; + + hdr->num_packets++; + hdr->size += pkt->size; return 0; } @@ -183,22 +199,22 @@ int hfi_packet_sys_init(struct msm_vidc_core *core, u8 *pkt, u32 pkt_size) { int rc = 0; - u32 offset = 0, payload = 0, num_packets = 0; + u32 payload = 0; if (!core || !pkt) { d_vpr_e("%s: Invalid params\n", __func__); return -EINVAL; } - if (pkt_size < sizeof(struct hfi_header)) { - d_vpr_e("%s: Invalid packet size\n", __func__); - return -EINVAL; - } + rc = hfi_create_header(pkt, pkt_size, + 0 /*session_id*/, + core->header_id++); + if (rc) + goto err_sys_init; /* HFI_CMD_SYSTEM_INIT */ - offset = sizeof(struct hfi_header); payload = HFI_VIDEO_ARCH_OX; - rc = hfi_create_packet(pkt, pkt_size, &offset, + rc = hfi_create_packet(pkt, pkt_size, HFI_CMD_INIT, (HFI_HOST_FLAGS_RESPONSE_REQUIRED | HFI_HOST_FLAGS_INTR_REQUIRED | @@ -210,11 +226,10 @@ int hfi_packet_sys_init(struct msm_vidc_core *core, sizeof(u32)); if (rc) goto err_sys_init; - num_packets++; /* HFI_PROP_INTRA_FRAME_POWER_COLLAPSE */ payload = 0; - rc = hfi_create_packet(pkt, pkt_size, &offset, + rc = hfi_create_packet(pkt, pkt_size, HFI_PROP_INTRA_FRAME_POWER_COLLAPSE, HFI_HOST_FLAGS_NONE, HFI_PAYLOAD_U32, @@ -224,11 +239,10 @@ int hfi_packet_sys_init(struct msm_vidc_core *core, sizeof(u32)); if (rc) goto err_sys_init; - num_packets++; /* HFI_PROP_UBWC_MAX_CHANNELS */ payload = core->platform->data.ubwc_config->max_channels; - rc = hfi_create_packet(pkt, pkt_size, &offset, + rc = hfi_create_packet(pkt, pkt_size, HFI_PROP_UBWC_MAX_CHANNELS, HFI_HOST_FLAGS_NONE, HFI_PAYLOAD_U32, @@ -238,11 +252,10 @@ int hfi_packet_sys_init(struct msm_vidc_core *core, sizeof(u32)); if (rc) goto err_sys_init; - num_packets++; /* HFI_PROP_UBWC_MAL_LENGTH */ payload = core->platform->data.ubwc_config->mal_length; - rc = hfi_create_packet(pkt, pkt_size, &offset, + rc = hfi_create_packet(pkt, pkt_size, HFI_PROP_UBWC_MAL_LENGTH, HFI_HOST_FLAGS_NONE, HFI_PAYLOAD_U32, @@ -252,11 +265,10 @@ int hfi_packet_sys_init(struct msm_vidc_core *core, sizeof(u32)); if (rc) goto err_sys_init; - num_packets++; /* HFI_PROP_UBWC_HBB */ payload = core->platform->data.ubwc_config->highest_bank_bit; - rc = hfi_create_packet(pkt, pkt_size, &offset, + rc = hfi_create_packet(pkt, pkt_size, HFI_PROP_UBWC_HBB, HFI_HOST_FLAGS_NONE, HFI_PAYLOAD_U32, @@ -266,11 +278,10 @@ int hfi_packet_sys_init(struct msm_vidc_core *core, sizeof(u32)); if (rc) goto err_sys_init; - num_packets++; /* HFI_PROP_UBWC_BANK_SWZL_LEVEL1 */ payload = core->platform->data.ubwc_config->bank_swzl_level; - rc = hfi_create_packet(pkt, pkt_size, &offset, + rc = hfi_create_packet(pkt, pkt_size, HFI_PROP_UBWC_BANK_SWZL_LEVEL1, HFI_HOST_FLAGS_NONE, HFI_PAYLOAD_U32, @@ -280,11 +291,10 @@ int hfi_packet_sys_init(struct msm_vidc_core *core, sizeof(u32)); if (rc) goto err_sys_init; - num_packets++; /* HFI_PROP_UBWC_BANK_SWZL_LEVEL2 */ payload = core->platform->data.ubwc_config->bank_swz2_level; - rc = hfi_create_packet(pkt, pkt_size, &offset, + rc = hfi_create_packet(pkt, pkt_size, HFI_PROP_UBWC_BANK_SWZL_LEVEL2, HFI_HOST_FLAGS_NONE, HFI_PAYLOAD_U32, @@ -294,11 +304,10 @@ int hfi_packet_sys_init(struct msm_vidc_core *core, sizeof(u32)); if (rc) goto err_sys_init; - num_packets++; /* HFI_PROP_UBWC_BANK_SWZL_LEVEL3 */ payload = core->platform->data.ubwc_config->bank_swz3_level; - rc = hfi_create_packet(pkt, pkt_size, &offset, + rc = hfi_create_packet(pkt, pkt_size, HFI_PROP_UBWC_BANK_SWZL_LEVEL3, HFI_HOST_FLAGS_NONE, HFI_PAYLOAD_U32, @@ -308,11 +317,10 @@ int hfi_packet_sys_init(struct msm_vidc_core *core, sizeof(u32)); if (rc) goto err_sys_init; - num_packets++; /* HFI_PROP_UBWC_BANK_SPREADING */ payload = core->platform->data.ubwc_config->bank_spreading; - rc = hfi_create_packet(pkt, pkt_size, &offset, + rc = hfi_create_packet(pkt, pkt_size, HFI_PROP_UBWC_BANK_SPREADING, HFI_HOST_FLAGS_NONE, HFI_PAYLOAD_U32, @@ -320,15 +328,6 @@ int hfi_packet_sys_init(struct msm_vidc_core *core, core->packet_id++, &payload, sizeof(u32)); - if (rc) - goto err_sys_init; - num_packets++; - - rc = hfi_create_header(pkt, 0 /*session_id*/, - core->header_id++, - num_packets, - offset); - if (rc) goto err_sys_init; @@ -344,16 +343,20 @@ int hfi_packet_image_version(struct msm_vidc_core *core, u8 *pkt, u32 pkt_size) { int rc = 0; - u32 num_packets = 0, offset = 0; if (!core || !pkt) { d_vpr_e("%s: Invalid params\n", __func__); return -EINVAL; } + rc = hfi_create_header(pkt, pkt_size, + 0 /*session_id*/, + core->header_id++); + if (rc) + goto err_img_version; + /* HFI_PROP_IMAGE_VERSION */ - offset = sizeof(struct hfi_header); - rc = hfi_create_packet(pkt, pkt_size, &offset, + rc = hfi_create_packet(pkt, pkt_size, HFI_PROP_IMAGE_VERSION, (HFI_HOST_FLAGS_RESPONSE_REQUIRED | HFI_HOST_FLAGS_INTR_REQUIRED | @@ -362,15 +365,6 @@ int hfi_packet_image_version(struct msm_vidc_core *core, HFI_PORT_NONE, core->packet_id++, NULL, 0); - if (rc) - goto err_img_version; - num_packets++; - - rc = hfi_create_header(pkt, 0 /*session_id*/, - core->header_id++, - num_packets, - offset); - if (rc) goto err_img_version; @@ -386,31 +380,26 @@ int hfi_packet_sys_pc_prep(struct msm_vidc_core *core, u8 *pkt, u32 pkt_size) { int rc = 0; - u32 num_packets = 0, offset = 0; if (!core || !pkt) { d_vpr_e("%s: Invalid params\n", __func__); return -EINVAL; } + rc = hfi_create_header(pkt, pkt_size, + 0 /*session_id*/, + core->header_id++); + if (rc) + goto err_sys_pc; + /* HFI_CMD_POWER_COLLAPSE */ - offset = sizeof(struct hfi_header); - rc = hfi_create_packet(pkt, pkt_size, &offset, + rc = hfi_create_packet(pkt, pkt_size, HFI_CMD_POWER_COLLAPSE, HFI_HOST_FLAGS_NONE, HFI_PAYLOAD_NONE, HFI_PORT_NONE, core->packet_id++, NULL, 0); - if (rc) - goto err_sys_pc; - num_packets++; - - rc = hfi_create_header(pkt, 0 /*session_id*/, - core->header_id++, - num_packets, - offset); - if (rc) goto err_sys_pc; @@ -426,17 +415,22 @@ int hfi_packet_sys_debug_config(struct msm_vidc_core *core, u8 *pkt, u32 pkt_size, u32 debug_config) { int rc = 0; - u32 num_packets = 0, offset = 0, payload = 0; + u32 payload = 0; if (!core || !pkt) { d_vpr_e("%s: Invalid params\n", __func__); return -EINVAL; } + rc = hfi_create_header(pkt, pkt_size, + 0 /*session_id*/, + core->header_id++); + if (rc) + goto err_debug; + /* HFI_PROP_DEBUG_CONFIG */ - offset = sizeof(struct hfi_header); payload = debug_config; /*TODO:Change later*/ - rc = hfi_create_packet(pkt, pkt_size, &offset, + rc = hfi_create_packet(pkt, pkt_size, HFI_PROP_DEBUG_CONFIG, HFI_HOST_FLAGS_NONE, HFI_PAYLOAD_U32_ENUM, @@ -446,11 +440,10 @@ int hfi_packet_sys_debug_config(struct msm_vidc_core *core, sizeof(u32)); if (rc) goto err_debug; - num_packets++; /* HFI_PROP_DEBUG_LOG_LEVEL */ payload = debug_config; /*TODO:Change later*/ - rc = hfi_create_packet(pkt, pkt_size, &offset, + rc = hfi_create_packet(pkt, pkt_size, HFI_PROP_DEBUG_LOG_LEVEL, HFI_HOST_FLAGS_NONE, HFI_PAYLOAD_U32_ENUM, @@ -458,15 +451,6 @@ int hfi_packet_sys_debug_config(struct msm_vidc_core *core, core->packet_id++, &payload, sizeof(u32)); - if (rc) - goto err_debug; - num_packets++; - - rc = hfi_create_header(pkt, 0 /*session_id*/, - core->header_id++, - num_packets, - offset); - if (rc) goto err_debug; @@ -483,19 +467,22 @@ int hfi_packet_session_command(struct msm_vidc_inst *inst, u32 payload_type, void *payload, u32 payload_size) { int rc = 0; - u32 num_packets = 0, offset = 0; struct msm_vidc_core *core; if (!inst || !inst->core) { d_vpr_e("%s: Invalid params\n", __func__); return -EINVAL; } - core = inst->core; - offset = sizeof(struct hfi_header); + + rc = hfi_create_header(inst->packet, inst->packet_size, + session_id, + core->header_id++); + if (rc) + goto err_cmd; + rc = hfi_create_packet(inst->packet, inst->packet_size, - &offset, pkt_type, flags, payload_type, @@ -503,15 +490,6 @@ int hfi_packet_session_command(struct msm_vidc_inst *inst, core->packet_id++, payload, payload_size); - if (rc) - goto err_cmd; - num_packets++; - - rc = hfi_create_header(inst->packet, session_id, - core->header_id++, - num_packets, - offset); - if (rc) goto err_cmd; @@ -528,18 +506,20 @@ int hfi_packet_session_property(struct msm_vidc_inst *inst, void *payload, u32 payload_size) { int rc = 0; - u32 num_packets = 0, offset = 0; struct msm_vidc_core *core; if (!inst || !inst->core || !inst->packet) { d_vpr_e("%s: Invalid params\n", __func__); return -EINVAL; } - core = inst->core; - offset = sizeof(struct hfi_header); + + rc = hfi_create_header(inst->packet, inst->packet_size, + inst->session_id, core->header_id++); + if (rc) + goto err_prop; + rc = hfi_create_packet(inst->packet, inst->packet_size, - &offset, pkt_type, flags, payload_type, @@ -547,15 +527,6 @@ int hfi_packet_session_property(struct msm_vidc_inst *inst, core->packet_id++, payload, payload_size); - if (rc) - goto err_prop; - num_packets++; - - rc = hfi_create_header(inst->packet, inst->session_id, - core->header_id++, - num_packets, - offset); - if (rc) goto err_prop; diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 36125a5ede..bcc5aa820e 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -18,30 +18,10 @@ static int msm_vdec_codec_change(struct msm_vidc_inst *inst, u32 codec) { int rc = 0; - int i; - struct msm_vidc_core *core; d_vpr_h("%s()\n", __func__); - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - core = inst->core; - inst->capabilities = NULL; - for (i = 0; i < core->codecs_count; i++) { - if (core->inst_caps[i].domain == MSM_VIDC_DECODER && - core->inst_caps[i].codec == get_vidc_codec_from_v4l2( - inst->fmts[INPUT_PORT].fmt.pix.pixelformat)) { - s_vpr_h(inst->sid, "%s: changed capabilities to %#x caps\n", - __func__, inst->fmts[INPUT_PORT].fmt.pix.pixelformat); - inst->capabilities = &core->inst_caps[i]; - } - } - if (!inst->capabilities) { - s_vpr_e(inst->sid, "%s: capabilities not found\n", __func__); - return -EINVAL; - } + rc = msm_vidc_get_inst_capability(inst, codec); return rc; } @@ -498,7 +478,6 @@ int msm_vdec_enum_fmt(struct msm_vidc_inst *inst, struct v4l2_fmtdesc *f) int msm_vdec_inst_init(struct msm_vidc_inst *inst) { int rc = 0; - int i; struct msm_vidc_core *core; struct v4l2_format *f; @@ -574,35 +553,9 @@ int msm_vdec_inst_init(struct msm_vidc_inst *inst) inst->prop.frame_rate = DEFAULT_FPS << 16; inst->prop.operating_rate = DEFAULT_FPS << 16; - inst->capabilities = NULL; - for (i = 0; i < core->codecs_count; i++) { - if (core->inst_caps[i].domain == MSM_VIDC_DECODER && - core->inst_caps[i].codec == get_vidc_codec_from_v4l2( - inst->fmts[INPUT_PORT].fmt.pix.pixelformat)) { - s_vpr_h(inst->sid, "%s: assigned capabilities with %#x caps\n", - __func__, inst->fmts[INPUT_PORT].fmt.pix.pixelformat); - inst->capabilities = &core->inst_caps[i]; - } - } - if (!inst->capabilities) { - s_vpr_e(inst->sid, "%s: capabilities not found\n", __func__); - return -EINVAL; - } + rc = msm_vdec_codec_change(inst, + inst->fmts[INPUT_PORT].fmt.pix.pixelformat); return rc; } -int msm_vdec_ctrl_init(struct msm_vidc_inst *inst) -{ - int rc = 0; - struct msm_vidc_core *core; - - d_vpr_h("%s()\n", __func__); - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - core = inst->core; - - return rc; -} diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index f98f3e4695..a8da10cf04 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -17,31 +17,10 @@ static int msm_venc_codec_change(struct msm_vidc_inst *inst, u32 codec) { int rc = 0; - int i; - struct msm_vidc_core *core; d_vpr_h("%s()\n", __func__); - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - core = inst->core; - - inst->capabilities = NULL; - for (i = 0; i < core->codecs_count; i++) { - if (core->inst_caps[i].domain == MSM_VIDC_ENCODER && - core->inst_caps[i].codec == get_vidc_codec_from_v4l2( - inst->fmts[OUTPUT_PORT].fmt.pix.pixelformat)) { - s_vpr_h(inst->sid, "%s: assigned capabilities with %#x caps\n", - __func__, inst->fmts[OUTPUT_PORT].fmt.pix.pixelformat); - inst->capabilities = &core->inst_caps[i]; - } - } - if (!inst->capabilities) { - s_vpr_e(inst->sid, "%s: capabilities not found\n", __func__); - return -EINVAL; - } + rc = msm_vidc_get_inst_capability(inst, codec); return rc; } @@ -284,7 +263,6 @@ int msm_venc_enum_fmt(struct msm_vidc_inst *inst, struct v4l2_fmtdesc *f) int msm_venc_inst_init(struct msm_vidc_inst *inst) { int rc = 0; - int i; struct msm_vidc_core *core; struct v4l2_format *f; @@ -358,35 +336,8 @@ int msm_venc_inst_init(struct msm_vidc_inst *inst) inst->prop.frame_rate = DEFAULT_FPS << 16; inst->prop.operating_rate = DEFAULT_FPS << 16; - inst->capabilities = NULL; - for (i = 0; i < core->codecs_count; i++) { - if (core->inst_caps[i].domain == MSM_VIDC_ENCODER && - core->inst_caps[i].codec == get_vidc_codec_from_v4l2( - inst->fmts[OUTPUT_PORT].fmt.pix.pixelformat)) { - s_vpr_h(inst->sid, "%s: assigned capabilities with %#x caps\n", - __func__, inst->fmts[OUTPUT_PORT].fmt.pix.pixelformat); - inst->capabilities = &core->inst_caps[i]; - } - } - if (!inst->capabilities) { - s_vpr_e(inst->sid, "%s: capabilities not found\n", __func__); - return -EINVAL; - } - - return rc; -} - -int msm_venc_ctrl_init(struct msm_vidc_inst *inst) -{ - int rc = 0; - struct msm_vidc_core *core; - - d_vpr_h("%s()\n", __func__); - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - core = inst->core; + rc = msm_venc_codec_change(inst, + inst->fmts[OUTPUT_PORT].fmt.pix.pixelformat); return rc; } diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index c8b5a95551..0b1a0cc5ae 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -13,6 +13,7 @@ #include "msm_vidc_vb2.h" #include "msm_vidc_v4l2.h" #include "msm_vidc_debug.h" +#include "msm_vidc_control.h" #define MSM_VIDC_DRV_NAME "msm_vidc_driver" /* kernel/msm-4.19 */ @@ -266,7 +267,7 @@ int msm_vidc_s_ctrl(void *instance, struct v4l2_control *control) if (!inst || !control) return -EINVAL; - return 0;//msm_comm_s_ctrl(instance, control); + return v4l2_s_ctrl(NULL, &inst->ctrl_handler, control); } EXPORT_SYMBOL(msm_vidc_s_ctrl); @@ -621,6 +622,14 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) } inst->core = core; + inst->capabilities = kzalloc( + sizeof(struct msm_vidc_inst_capability), GFP_KERNEL); + if (!inst->capabilities) { + s_vpr_e(inst->sid, + "%s: inst capability allocation failed\n", __func__); + return NULL; + } + rc = msm_vidc_add_session(inst); if (rc) { d_vpr_e("%s: failed to get session id\n", __func__); @@ -653,8 +662,11 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) INIT_LIST_HEAD(&inst->maps.scratch_2.list); INIT_LIST_HEAD(&inst->maps.persist.list); INIT_LIST_HEAD(&inst->maps.persist_1.list); + INIT_LIST_HEAD(&inst->child_ctrls.list); + INIT_LIST_HEAD(&inst->fw_ctrls.list); inst->domain = session_type; inst->state = MSM_VIDC_OPEN; + inst->request = false; //inst->debugfs_root = // msm_vidc_debugfs_init_inst(inst, core->debugfs_root); @@ -662,17 +674,14 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) rc = msm_vdec_inst_init(inst); if (rc) goto error; - rc = msm_vdec_ctrl_init(inst); - if (rc) - goto error; } else if (is_encode_session(inst)) { rc = msm_venc_inst_init(inst); if (rc) goto error; - rc = msm_venc_ctrl_init(inst); - if (rc) - goto error; } + rc = msm_vidc_ctrl_init(inst); + if (rc) + goto error; rc = msm_vidc_vb2_queue_init(inst); if (rc) diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c new file mode 100644 index 0000000000..f3646c105f --- /dev/null +++ b/driver/vidc/src/msm_vidc_control.c @@ -0,0 +1,223 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2020, The Linux Foundation. All rights reserved. + */ + +#include "msm_vidc_control.h" +#include "msm_vidc_debug.h" +#include "hfi_packet.h" +#include "hfi_property.h" +#include "venus_hfi.h" +#include "msm_vidc_internal.h" + +static bool is_priv_ctrl(u32 id) +{ + if (IS_PRIV_CTRL(id)) + return true; + + /* + * Treat below standard controls as private because + * we have added custom values to the controls + */ + switch (id) { + case V4L2_CID_MPEG_VIDEO_BITRATE_MODE: + return true; + } + + return false; +} + +static const char *const mpeg_video_rate_control[] = { + "VBR", + "CBR", + "CBR VFR", + "MBR", + "MBR VFR", + "CQ", + NULL +}; + +static const char *const mpeg_video_stream_format[] = { + "NAL Format Start Codes", + "NAL Format One NAL Per Buffer", + "NAL Format One Byte Length", + "NAL Format Two Byte Length", + "NAL Format Four Byte Length", + NULL, +}; + +static const char *const roi_map_type[] = { + "None", + "2-bit", + "2-bit", + NULL, +}; + +static const char * const * msm_vidc_get_qmenu_type( + struct msm_vidc_inst *inst, u32 control_id) +{ + switch (control_id) { + case V4L2_CID_MPEG_VIDEO_BITRATE_MODE: + return mpeg_video_rate_control; + case V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD: + return mpeg_video_stream_format; + /* + * TODO(AS) + * case V4L2_CID_MPEG_VIDC_VIDEO_ROI_TYPE: + * return roi_map_type; + */ + default: + s_vpr_e(inst->sid, "%s: No available qmenu for ctrl %#x", + __func__, control_id); + return NULL; + } +} + +static const char *msm_vidc_get_priv_ctrl_name(u32 sid, u32 control_id) +{ + switch (control_id) { + case V4L2_CID_MPEG_VIDEO_BITRATE_MODE: + return "Video Bitrate Control"; + case V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD: + return "NAL Format"; + /* + * TODO(AS) + * case V4L2_CID_MPEG_VIDC_VIDEO_ROI_TYPE: + * return "ROI Type"; + */ + default: + s_vpr_e(sid, "%s: ctrl name not available for ctrl id %#x", + __func__, control_id); + return NULL; + } +} + +int msm_vidc_ctrl_init(struct msm_vidc_inst *inst) +{ + int rc = 0; + struct msm_vidc_inst_capability *capability; + struct msm_vidc_core *core; + int idx = 0; + struct v4l2_ctrl_config ctrl_cfg = {0}; + int num_ctrls = 0, ctrl_idx = 0; + + d_vpr_h("%s()\n", __func__); + if (!inst || !inst->core || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + core = inst->core; + capability = inst->capabilities; + + for (idx = 0; idx < INST_CAP_MAX; idx++) { + if (capability->cap[idx].v4l2_id) + num_ctrls++; + } + if (!num_ctrls) { + s_vpr_e(inst->sid, "%s: failed to allocate ctrl\n", __func__); + return -EINVAL; + } + inst->ctrls = kcalloc(num_ctrls, + sizeof(struct v4l2_ctrl *), GFP_KERNEL); + if (!inst->ctrls) { + s_vpr_e(inst->sid, "%s: failed to allocate ctrl\n", __func__); + return -ENOMEM; + } + + rc = v4l2_ctrl_handler_init(&inst->ctrl_handler, num_ctrls); + if (rc) { + s_vpr_e(inst->sid, "control handler init failed, %d\n", + inst->ctrl_handler.error); + return rc; + } + + for (idx = 0; idx < INST_CAP_MAX; idx++) { + struct v4l2_ctrl *ctrl; + + if (ctrl_idx >= num_ctrls) { + s_vpr_e(inst->sid, + "invalid ctrl_idx, max allowed %d\n", + num_ctrls); + return -EINVAL; + } + if (!capability->cap[idx].v4l2_id) + continue; + + if (is_priv_ctrl(capability->cap[idx].v4l2_id)) { + /* add private control */ + ctrl_cfg.def = capability->cap[idx].value; + ctrl_cfg.flags = 0; + ctrl_cfg.id = capability->cap[idx].v4l2_id; + ctrl_cfg.max = capability->cap[idx].max; + ctrl_cfg.min = capability->cap[idx].min; + ctrl_cfg.menu_skip_mask = + ~(capability->cap[idx].step_or_mask); + ctrl_cfg.ops = core->v4l2_ctrl_ops; + ctrl_cfg.step = capability->cap[idx].step_or_mask; + ctrl_cfg.type = (capability->cap[idx].flags & + CAP_FLAG_MENU) ? + V4L2_CTRL_TYPE_MENU : + V4L2_CTRL_TYPE_INTEGER; + ctrl_cfg.qmenu = msm_vidc_get_qmenu_type(inst, + capability->cap[idx].v4l2_id); + ctrl_cfg.name = msm_vidc_get_priv_ctrl_name(inst->sid, + capability->cap[idx].v4l2_id); + if (!ctrl_cfg.name || !ctrl_cfg.ops) { + s_vpr_e(inst->sid, "%s: invalid control, %d\n", + __func__, ctrl_cfg.id); + return -EINVAL; + } + ctrl = v4l2_ctrl_new_custom(&inst->ctrl_handler, + &ctrl_cfg, NULL); + } else { + if (capability->cap[idx].flags & CAP_FLAG_MENU) { + ctrl = v4l2_ctrl_new_std_menu( + &inst->ctrl_handler, + core->v4l2_ctrl_ops, + capability->cap[idx].v4l2_id, + capability->cap[idx].max, + ~(capability->cap[idx].step_or_mask), + capability->cap[idx].value); + } else { + ctrl = v4l2_ctrl_new_std(&inst->ctrl_handler, + core->v4l2_ctrl_ops, + capability->cap[idx].v4l2_id, + capability->cap[idx].min, + capability->cap[idx].max, + capability->cap[idx].step_or_mask, + capability->cap[idx].value); + } + } + if (!ctrl) { + s_vpr_e(inst->sid, "%s: invalid ctrl %s\n", __func__, + ctrl->name); + return -EINVAL; + } + + rc = inst->ctrl_handler.error; + if (rc) { + s_vpr_e(inst->sid, + "error adding ctrl (%#x) to ctrl handle, %d\n", + capability->cap[idx].v4l2_id, + inst->ctrl_handler.error); + return rc; + } + + /* + * TODO(AS) + * ctrl->flags |= capability->cap[idx].flags; + */ + ctrl->flags |= V4L2_CTRL_FLAG_EXECUTE_ON_WRITE; + inst->ctrls[ctrl_idx] = ctrl; + ctrl_idx++; + } + inst->num_ctrls = num_ctrls; + + return rc; +} + +int msm_v4l2_op_s_ctrl(struct v4l2_ctrl *ctrl) +{ + return 0; +} + diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 6f1d5ae7a7..783d79f7f5 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -664,6 +664,38 @@ int msm_vidc_session_open(struct msm_vidc_inst *inst) return 0; } +int msm_vidc_get_inst_capability(struct msm_vidc_inst *inst, u32 codec) +{ + int rc = 0; + int i; + struct msm_vidc_core *core; + + d_vpr_h("%s()\n", __func__); + if (!inst || !inst->core || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + core = inst->core; + + for (i = 0; i < core->codecs_count; i++) { + if (core->inst_caps[i].domain == inst->domain && + core->inst_caps[i].codec == get_vidc_codec_from_v4l2( + codec)) { + s_vpr_h(inst->sid, + "%s: copied capabilities with %#x caps\n", + __func__, codec); + memcpy(inst->capabilities, &core->inst_caps[i], + sizeof(struct msm_vidc_inst_capability)); + } + } + if (!inst->capabilities) { + s_vpr_e(inst->sid, "%s: capabilities not found\n", __func__); + return -EINVAL; + } + + return rc; +} + static int msm_vidc_init_core_caps(struct msm_vidc_core *core) { int rc = 0; diff --git a/driver/vidc/src/msm_vidc_platform.c b/driver/vidc/src/msm_vidc_platform.c index 56d20be98c..69cda2acaa 100644 --- a/driver/vidc/src/msm_vidc_platform.c +++ b/driver/vidc/src/msm_vidc_platform.c @@ -12,7 +12,7 @@ #include "msm_vidc_debug.h" #include "msm_vidc_v4l2.h" #include "msm_vidc_vb2.h" - +#include "msm_vidc_control.h" static struct v4l2_file_operations msm_v4l2_file_operations = { .owner = THIS_MODULE, @@ -47,7 +47,7 @@ static struct v4l2_ioctl_ops msm_v4l2_ioctl_ops = { }; static struct v4l2_ctrl_ops msm_v4l2_ctrl_ops = { - //.s_ctrl = msm_vidc_s_ctrl, + .s_ctrl = msm_v4l2_op_s_ctrl, }; static struct vb2_ops msm_vb2_ops = { diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index 94dc2b01cd..86c3be3eaa 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -2563,7 +2563,6 @@ int venus_hfi_queue_buffer(struct msm_vidc_inst *inst, int rc = 0; struct msm_vidc_core *core; struct hfi_buffer hfi_buffer; - u32 num_packets = 0, offset = 0; d_vpr_h("%s(): inst %p\n", __func__, inst); if (!inst || !inst->core || !inst->packet) { @@ -2576,10 +2575,13 @@ int venus_hfi_queue_buffer(struct msm_vidc_inst *inst, if (rc) return rc; - offset = sizeof(struct hfi_header); + rc = hfi_create_header(inst->packet, inst->packet_size, + inst->session_id, core->header_id++); + if (rc) + return rc; + rc = hfi_create_packet(inst->packet, inst->packet_size, - &offset, HFI_CMD_BUFFER, (HFI_HOST_FLAGS_RESPONSE_REQUIRED | HFI_HOST_FLAGS_INTR_REQUIRED), @@ -2590,7 +2592,6 @@ int venus_hfi_queue_buffer(struct msm_vidc_inst *inst, sizeof(hfi_buffer)); if (rc) return rc; - num_packets++; if (metabuf) { rc = get_hfi_buffer(inst, metabuf, &hfi_buffer); @@ -2598,7 +2599,6 @@ int venus_hfi_queue_buffer(struct msm_vidc_inst *inst, return rc; rc = hfi_create_packet(inst->packet, inst->packet_size, - &offset, HFI_CMD_BUFFER, HFI_HOST_FLAGS_NONE, HFI_PAYLOAD_STRUCTURE, @@ -2608,16 +2608,8 @@ int venus_hfi_queue_buffer(struct msm_vidc_inst *inst, sizeof(hfi_buffer)); if (rc) return rc; - num_packets++; } - rc = hfi_create_header(inst->packet, inst->session_id, - core->header_id++, - num_packets, - offset); - if (rc) - return rc; - rc = __iface_cmdq_write(inst->core, inst->packet); if (rc) return rc; @@ -2631,7 +2623,6 @@ int venus_hfi_release_buffer(struct msm_vidc_inst *inst, int rc = 0; struct msm_vidc_core *core; struct hfi_buffer hfi_buffer; - u32 num_packets = 0, offset = 0; d_vpr_h("%s(): inst %p\n", __func__, inst); if (!inst || !buffer) { @@ -2652,10 +2643,13 @@ int venus_hfi_release_buffer(struct msm_vidc_inst *inst, /* add pending release flag */ hfi_buffer.flags |= HFI_BUF_HOST_FLAG_RELEASE; - offset = sizeof(struct hfi_header); + rc = hfi_create_header(inst->packet, inst->packet_size, + inst->session_id, core->header_id++); + if (rc) + return rc; + rc = hfi_create_packet(inst->packet, inst->packet_size, - &offset, HFI_CMD_BUFFER, (HFI_HOST_FLAGS_RESPONSE_REQUIRED | HFI_HOST_FLAGS_INTR_REQUIRED), @@ -2666,14 +2660,6 @@ int venus_hfi_release_buffer(struct msm_vidc_inst *inst, sizeof(hfi_buffer)); if (rc) return rc; - num_packets++; - - rc = hfi_create_header(inst->packet, inst->session_id, - core->header_id++, - num_packets, - offset); - if (rc) - return rc; rc = __iface_cmdq_write(inst->core, inst->packet); if (rc) From 55efff9d9f45de5779058491feec166f6ee09e7b Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Thu, 27 Aug 2020 12:57:58 -0700 Subject: [PATCH 0009/1061] msm: vidc: add wrapper for locks Add wrapper to acquire and release inst and core locks. Change-Id: I35a1c3a5c4ea3e1e177eb894d6dc4af2e5a7c174 Signed-off-by: Darshana Patil --- driver/vidc/inc/msm_vidc_driver.h | 6 ++++++ driver/vidc/src/msm_vidc_driver.c | 20 ++++++++++++++++++++ 2 files changed, 26 insertions(+) diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 4e13cb8b7e..84896a2da4 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -103,5 +103,11 @@ struct msm_vidc_map_info *msm_vidc_get_map_info(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type buffer_type); struct msm_vidc_alloc_info *msm_vidc_get_alloc_info(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type buffer_type); + +void core_lock(struct msm_vidc_core *core, const char *function); +void core_unlock(struct msm_vidc_core *core, const char *function); +void inst_lock(struct msm_vidc_inst *inst, const char *function); +void inst_unlock(struct msm_vidc_inst *inst, const char *function); + #endif // _MSM_VIDC_DRIVER_H_ diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 783d79f7f5..4a13975971 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -944,3 +944,23 @@ void msm_vidc_fw_unload_handler(struct work_struct *work) void msm_vidc_batch_handler(struct work_struct *work) { } + +void core_lock(struct msm_vidc_core *core, const char *function) +{ + mutex_lock(&core->lock); +} + +void core_unlock(struct msm_vidc_core *core, const char *function) +{ + mutex_unlock(&core->lock); +} + +void inst_lock(struct msm_vidc_inst *inst, const char *function) +{ + mutex_lock(&inst->lock); +} + +void inst_unlock(struct msm_vidc_inst *inst, const char *function) +{ + mutex_unlock(&inst->lock); +} \ No newline at end of file From 9a854613cd912902e4720b9e0dfe24dc53dc8197 Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Thu, 13 Aug 2020 16:03:47 -0700 Subject: [PATCH 0010/1061] msm: vidc: response handling add response handling for commands, properties, system and session errors. Change-Id: I87a8cba136979d425d978dfe55317a3deb081c53 Signed-off-by: Darshana Patil --- Makefile | 3 +- driver/vidc/inc/hfi_command.h | 11 +- driver/vidc/inc/hfi_packet.h | 1 - driver/vidc/inc/msm_vidc_core.h | 2 + driver/vidc/inc/msm_vidc_debug.h | 7 + driver/vidc/inc/msm_vidc_driver.h | 4 +- driver/vidc/inc/msm_vidc_inst.h | 1 + driver/vidc/inc/msm_vidc_internal.h | 6 + driver/vidc/inc/venus_hfi.h | 1 + driver/vidc/inc/venus_hfi_response.h | 18 + driver/vidc/src/hfi_packet.c | 2 +- driver/vidc/src/msm_vidc.c | 4 + driver/vidc/src/msm_vidc_debug.c | 3 +- driver/vidc/src/msm_vidc_driver.c | 64 +++- driver/vidc/src/venus_hfi.c | 128 +++++++- driver/vidc/src/venus_hfi_response.c | 469 +++++++++++++++++++++++++++ 16 files changed, 704 insertions(+), 20 deletions(-) create mode 100644 driver/vidc/inc/venus_hfi_response.h create mode 100644 driver/vidc/src/venus_hfi_response.c diff --git a/Makefile b/Makefile index d43f30ab6f..76bfd1b513 100644 --- a/Makefile +++ b/Makefile @@ -29,7 +29,8 @@ msm-vidc-objs := driver/vidc/src/msm_vidc_v4l2.o \ driver/vidc/src/msm_vidc_debug.o \ driver/vidc/src/msm_vidc_memory.o \ driver/vidc/src/venus_hfi.o \ - driver/vidc/src/hfi_packet.o + driver/vidc/src/hfi_packet.o \ + driver/vidc/src/venus_hfi_response.o ifneq ($(CONFIG_ARCH_QTI_VM), y) ifeq ($(CONFIG_ARCH_LAHAINA), y) diff --git a/driver/vidc/inc/hfi_command.h b/driver/vidc/inc/hfi_command.h index c2215f91b3..a5246bef5a 100644 --- a/driver/vidc/inc/hfi_command.h +++ b/driver/vidc/inc/hfi_command.h @@ -127,12 +127,13 @@ struct metapayload_header { }; enum hfi_property_mode_type { - HFI_MODE_NONE = 0, - HFI_MODE_PORT_SETTINGS_CHANGE = BIT(0), - HFI_MODE_PROPERTY = BIT(1), - HFI_MODE_METADATA = BIT(2), + HFI_MODE_NONE = 0, + HFI_MODE_PORT_SETTINGS_CHANGE = BIT(0), + HFI_MODE_PROPERTY = BIT(1), + HFI_MODE_METADATA = BIT(2), }; +#define HFI_CMD_BEGIN 0x0 #define HFI_CMD_INIT 0x1 #define HFI_CMD_POWER_COLLAPSE 0x2 #define HFI_CMD_OPEN 0x3 @@ -145,6 +146,6 @@ enum hfi_property_mode_type { #define HFI_CMD_DELIVERY_MODE 0xA #define HFI_CMD_SUBSCRIBE_MODE 0xB #define HFI_CMD_SETTINGS_CHANGE 0xC - +#define HFI_CMD_END 0xD #endif //__H_HFI_COMMAND_H__ diff --git a/driver/vidc/inc/hfi_packet.h b/driver/vidc/inc/hfi_packet.h index 141f599d9b..29cbf473cf 100644 --- a/driver/vidc/inc/hfi_packet.h +++ b/driver/vidc/inc/hfi_packet.h @@ -43,4 +43,3 @@ int hfi_packet_session_property(struct msm_vidc_inst *inst, u32 pkt_type, u32 flags, u32 port, u32 payload_type, void *payload, u32 payload_size); #endif // _HFI_PACKET_H_ - diff --git a/driver/vidc/inc/msm_vidc_core.h b/driver/vidc/inc/msm_vidc_core.h index 044d466b88..140b57985b 100644 --- a/driver/vidc/inc/msm_vidc_core.h +++ b/driver/vidc/inc/msm_vidc_core.h @@ -96,6 +96,7 @@ struct msm_vidc_core { u32 last_packet_type; u8 *packet; u32 packet_size; + u8 *response_packet; struct v4l2_file_operations *v4l2_file_ops; struct v4l2_ioctl_ops *v4l2_ioctl_ops; struct v4l2_ctrl_ops *v4l2_ctrl_ops; @@ -106,6 +107,7 @@ struct msm_vidc_core { struct msm_vidc_memory_ops *mem_ops; u32 header_id; u32 packet_id; + struct completion init_done; }; #endif // _MSM_VIDC_CORE_H_ diff --git a/driver/vidc/inc/msm_vidc_debug.h b/driver/vidc/inc/msm_vidc_debug.h index aafa681554..c7261465d6 100644 --- a/driver/vidc/inc/msm_vidc_debug.h +++ b/driver/vidc/inc/msm_vidc_debug.h @@ -87,6 +87,13 @@ enum vidc_msg_prio { #define d_vpr_b(__fmt, ...) \ dprintk(VIDC_BUS, DEFAULT_SID, __fmt, ##__VA_ARGS__) +#define dprintk_firmware(__level, __fmt, ...) \ + do { \ + pr_err(FW_DBG_TAG __fmt, \ + "fw", \ + ##__VA_ARGS__); \ + } while (0) + #define MSM_VIDC_ERROR(value) \ do { if (value) \ d_vpr_e("BugOn"); \ diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 84896a2da4..73aacd64ee 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -103,7 +103,9 @@ struct msm_vidc_map_info *msm_vidc_get_map_info(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type buffer_type); struct msm_vidc_alloc_info *msm_vidc_get_alloc_info(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type buffer_type); - +struct msm_vidc_inst *get_inst(struct msm_vidc_core *core, + u32 session_id); +void put_inst(struct msm_vidc_inst *inst); void core_lock(struct msm_vidc_core *core, const char *function); void core_unlock(struct msm_vidc_core *core, const char *function); void inst_lock(struct msm_vidc_inst *inst, const char *function); diff --git a/driver/vidc/inc/msm_vidc_inst.h b/driver/vidc/inc/msm_vidc_inst.h index 13bb322006..c0775a2f46 100644 --- a/driver/vidc/inc/msm_vidc_inst.h +++ b/driver/vidc/inc/msm_vidc_inst.h @@ -110,6 +110,7 @@ struct msm_vidc_inst { struct dentry *debugfs_root; struct msm_vidc_debug debug; struct msm_vidc_inst_capability *capabilities; + struct completion completions[MAX_SIGNAL]; }; #endif // _MSM_VIDC_INST_H_ diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index d95b8f9663..efe5d84e34 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -299,6 +299,12 @@ enum profiling_points { MAX_PROFILING_POINTS, }; +enum signal_session_response { + SIGNAL_CMD_STOP = 0, + SIGNAL_CMD_CLOSE, + MAX_SIGNAL, +}; + #define HFI_MASK_QHDR_TX_TYPE 0xFF000000 #define HFI_MASK_QHDR_RX_TYPE 0x00FF0000 #define HFI_MASK_QHDR_PRI_TYPE 0x0000FF00 diff --git a/driver/vidc/inc/venus_hfi.h b/driver/vidc/inc/venus_hfi.h index 99f5d264c4..2660cb8e2a 100644 --- a/driver/vidc/inc/venus_hfi.h +++ b/driver/vidc/inc/venus_hfi.h @@ -76,5 +76,6 @@ int __interrupt_init(struct msm_vidc_core *core); int __setup_ucregion_memmap(struct msm_vidc_core *core); int __raise_interrupt(struct msm_vidc_core *core); int __power_off(struct msm_vidc_core *core); +bool __core_in_valid_state(struct msm_vidc_core *core); #endif // _VENUS_HFI_H_ diff --git a/driver/vidc/inc/venus_hfi_response.h b/driver/vidc/inc/venus_hfi_response.h new file mode 100644 index 0000000000..c48a92f0b3 --- /dev/null +++ b/driver/vidc/inc/venus_hfi_response.h @@ -0,0 +1,18 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) 2020, The Linux Foundation. All rights reserved. + */ + +#ifndef __VENUS_HFI_RESPONSE_H__ +#define __VENUS_HFI_RESPONSE_H__ + +int handle_response(struct msm_vidc_core *core, + void *response); +int validate_packet(u8 *response_pkt, u8 *core_resp_pkt, + u32 core_resp_pkt_size, const char *func); +bool is_valid_port(struct msm_vidc_inst *inst, u32 port, + const char *func); +bool is_valid_hfi_buffer_type(struct msm_vidc_inst *inst, + u32 buffer_type, const char *func); + +#endif // __VENUS_HFI_RESPONSE_H__ diff --git a/driver/vidc/src/hfi_packet.c b/driver/vidc/src/hfi_packet.c index 5f1e53cc32..87ce3356b5 100644 --- a/driver/vidc/src/hfi_packet.c +++ b/driver/vidc/src/hfi_packet.c @@ -429,7 +429,7 @@ int hfi_packet_sys_debug_config(struct msm_vidc_core *core, goto err_debug; /* HFI_PROP_DEBUG_CONFIG */ - payload = debug_config; /*TODO:Change later*/ + payload = 0; /*TODO:Change later*/ rc = hfi_create_packet(pkt, pkt_size, HFI_PROP_DEBUG_CONFIG, HFI_HOST_FLAGS_NONE, diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index 0b1a0cc5ae..bb41bd304c 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -589,6 +589,7 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) int rc = 0; struct msm_vidc_inst *inst; struct msm_vidc_core *core; + int i = 0; d_vpr_h("%s()\n", __func__); core = vidc_core; @@ -667,6 +668,9 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) inst->domain = session_type; inst->state = MSM_VIDC_OPEN; inst->request = false; + for (i = 0; i < MAX_SIGNAL; i++) + init_completion(&inst->completions[i]); + //inst->debugfs_root = // msm_vidc_debugfs_init_inst(inst, core->debugfs_root); diff --git a/driver/vidc/src/msm_vidc_debug.c b/driver/vidc/src/msm_vidc_debug.c index e7407a4e3f..74f920e385 100644 --- a/driver/vidc/src/msm_vidc_debug.c +++ b/driver/vidc/src/msm_vidc_debug.c @@ -6,7 +6,8 @@ #include "msm_vidc_debug.h" int msm_vidc_debug = VIDC_HIGH | VIDC_LOW | VIDC_PKT | VIDC_ERR | VIDC_PRINTK | - FW_ERROR | FW_FATAL | FW_FTRACE; + FW_ERROR | FW_FATAL | FW_FTRACE | FW_LOW | FW_MEDIUM | FW_HIGH | + FW_PERF | FW_PRINTK; EXPORT_SYMBOL(msm_vidc_debug); bool msm_vidc_lossless_encode = !true; diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 4a13975971..ab1ac2376e 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -14,6 +14,7 @@ #include "msm_vidc_memory.h" #include "msm_vidc_debug.h" #include "venus_hfi.h" +#include "msm_vidc.h" #define COUNT_BITS(a, out) ({ \ while ((a) >= 1) { \ @@ -901,6 +902,11 @@ int msm_vidc_core_init(struct msm_vidc_core *core) if (rc) goto unlock; + core->state = MSM_VIDC_CORE_INIT; + init_completion(&core->init_done); + core->smmu_fault_handled = false; + core->ssr.trigger = false; + rc = venus_hfi_core_init(core); if (rc) { d_vpr_e("%s: core init failed\n", __func__); @@ -908,9 +914,18 @@ int msm_vidc_core_init(struct msm_vidc_core *core) goto unlock; } - core->state = MSM_VIDC_CORE_INIT; - core->smmu_fault_handled = false; - core->ssr.trigger = false; + mutex_unlock(&core->lock); + /*TODO: acquire lock or not */ + rc = wait_for_completion_timeout(&core->init_done, msecs_to_jiffies( + core->platform->data.core_data[DEBUG_TIMEOUT].value)); + if (!rc) { + d_vpr_e("%s: system init timed out\n", __func__); + //msm_comm_kill_session(inst); + rc = -EIO; + } else { + rc = 0; + } + mutex_lock(&core->lock); unlock: mutex_unlock(&core->lock); @@ -945,6 +960,47 @@ void msm_vidc_batch_handler(struct work_struct *work) { } +struct msm_vidc_inst *get_inst(struct msm_vidc_core *core, + u32 session_id) +{ + struct msm_vidc_inst *inst = NULL; + bool matches = false; + + if (!core) { + d_vpr_e("%s: invalid params\n", __func__); + return NULL; + } + + mutex_lock(&core->lock); + list_for_each_entry(inst, &core->instances, list) { + if (inst->session_id == session_id) { + matches = true; + break; + } + } + inst = (matches && kref_get_unless_zero(&inst->kref)) ? inst : NULL; + mutex_unlock(&core->lock); + return inst; +} + +static void put_inst_helper(struct kref *kref) +{ + struct msm_vidc_inst *inst = container_of(kref, + struct msm_vidc_inst, kref); + + msm_vidc_close(inst); +} + +void put_inst(struct msm_vidc_inst *inst) +{ + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return; + } + + kref_put(&inst->kref, put_inst_helper); +} + void core_lock(struct msm_vidc_core *core, const char *function) { mutex_lock(&core->lock); @@ -963,4 +1019,4 @@ void inst_lock(struct msm_vidc_inst *inst, const char *function) void inst_unlock(struct msm_vidc_inst *inst, const char *function) { mutex_unlock(&inst->lock); -} \ No newline at end of file +} diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index 86c3be3eaa..f400132ae2 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -23,6 +23,9 @@ #include "msm_vidc_driver.h" #include "msm_vidc_debug.h" #include "hfi_packet.h" +#include "venus_hfi_response.h" + +#define MIN_PAYLOAD_SIZE 3 static int __resume(struct msm_vidc_core *core); static int __suspend(struct msm_vidc_core *core); @@ -150,7 +153,7 @@ static void __strict_check(struct msm_vidc_core *core) __fatal_error(core, !mutex_is_locked(&core->lock)); } -static bool __core_in_valid_state(struct msm_vidc_core *core) +bool __core_in_valid_state(struct msm_vidc_core *core) { return core->state != MSM_VIDC_CORE_ERROR; } @@ -566,6 +569,7 @@ static int __write_queue(struct msm_vidc_iface_q_info *qinfo, u8 *packet, d_vpr_e("skip writing packet\n"); return 0; + packet_size_in_words = (*(u32 *)packet) >> 2; if (!packet_size_in_words || packet_size_in_words > qinfo->q_array.mem_size>>2) { @@ -624,7 +628,7 @@ static int __write_queue(struct msm_vidc_iface_q_info *qinfo, u8 *packet, mb(); return 0; } -#if 0 + static int __read_queue(struct msm_vidc_iface_q_info *qinfo, u8 *packet, u32 *pb_tx_req_is_set) { @@ -748,7 +752,7 @@ static int __read_queue(struct msm_vidc_iface_q_info *qinfo, u8 *packet, return rc; } -#endif + /* Writes into cmdq without raising an interrupt */ static int __iface_cmdq_write_relaxed(struct msm_vidc_core *core, void *pkt, bool *requires_interrupt) @@ -814,7 +818,7 @@ static int __iface_cmdq_write(struct msm_vidc_core *core, return rc; } -/* + static int __iface_msgq_read(struct msm_vidc_core *core, void *pkt) { u32 tx_req_is_set = 0; @@ -845,8 +849,9 @@ static int __iface_msgq_read(struct msm_vidc_core *core, void *pkt) if (tx_req_is_set) call_venus_op(core, raise_interrupt, core); rc = 0; - } else + } else { rc = -ENODATA; + } read_error_null: return rc; @@ -882,7 +887,74 @@ static int __iface_dbgq_read(struct msm_vidc_core *core, void *pkt) dbg_error_null: return rc; } -*/ + +/*TODO:darshana needs discussion*/ +static void __flush_debug_queue(struct msm_vidc_core *core, u8 *header) +{ + bool local_packet = false; + enum vidc_msg_prio log_level = msm_vidc_debug; + struct hfi_packet *pkt; + u32 payload = 0; + + if (!header) { + header = kzalloc(VIDC_IFACEQ_VAR_HUGE_PKT_SIZE, GFP_KERNEL); + if (!header) { + d_vpr_e("%s: Fail to allocate mem\n", __func__); + return; + } + + local_packet = true; + + /* + * Local packet is used when error occurred. + * It is good to print these logs to printk as well. + */ + log_level |= FW_PRINTK; + } + +#define SKIP_INVALID_PKT(pkt_size, payload_size, pkt_hdr_size) ({ \ + if (pkt_size < pkt_hdr_size || \ + payload_size < MIN_PAYLOAD_SIZE || \ + payload_size > \ + (pkt_size - pkt_hdr_size + sizeof(u8))) { \ + d_vpr_e("%s: invalid msg size - %d\n", \ + __func__, payload_size); \ + continue; \ + } \ + }) + + while (!__iface_dbgq_read(core, header)) { + struct hfi_header *hdr = + (struct hfi_header *) header; + + if (!validate_packet((u8 *)pkt, core->response_packet, + core->packet_size, __func__)) + return; + + pkt = (struct hfi_packet *)(hdr + sizeof(struct hfi_header)); + if (pkt->type == HFI_PROP_DEBUG_LOG_LEVEL) { + SKIP_INVALID_PKT(pkt->size, + sizeof(u32), sizeof(*pkt)); + + payload = (u32) *((u8 *)pkt + sizeof(struct hfi_packet)); + + /* + * All fw messages starts with new line character. This + * causes dprintk to print this message in two lines + * in the kernel log. Ignoring the first character + * from the message fixes this to print it in a single + * line. + */ + //pkt->rg_msg_data[sizeof(u32)-1] = '\0'; + dprintk_firmware(log_level, "%s", &payload); + } + } +#undef SKIP_INVALID_PKT + + if (local_packet) + kfree(header); +} + static int __sys_set_debug(struct msm_vidc_core *core, u32 debug) { int rc = 0; @@ -2192,9 +2264,29 @@ static void __unload_fw(struct msm_vidc_core *core) d_vpr_h("Firmware unloaded successfully\n"); } +static int __response_handler(struct msm_vidc_core *core) +{ + int rc = 0; + + while (!__iface_msgq_read(core, core->response_packet)) { + rc = handle_response(core, core->response_packet); + if (rc) + continue; + /* check for system error */ + if (core->state != MSM_VIDC_CORE_INIT) + break; + } + + __schedule_power_collapse_work(core); + __flush_debug_queue(core, core->response_packet); + + return rc; +} + void venus_hfi_work_handler(struct work_struct *work) { struct msm_vidc_core *core; + int num_responses = 0; core = container_of(work, struct msm_vidc_core, device_work); if (!core) { @@ -2202,6 +2294,21 @@ void venus_hfi_work_handler(struct work_struct *work) return; } d_vpr_e("%s(): core %pK\n", __func__, core); + + mutex_lock(&core->lock); + if (__resume(core)) { + d_vpr_e("%s: Power on failed\n", __func__); + goto err_no_work; + } + + call_venus_op(core, clear_interrupt, core); + mutex_unlock(&core->lock); + num_responses = __response_handler(core); + +err_no_work: + mutex_unlock(&core->lock); + if (!call_venus_op(core, watchdog, core, core->intr_status)) + enable_irq(core->dt->irq); } void venus_hfi_pm_work_handler(struct work_struct *work) @@ -2273,6 +2380,14 @@ int venus_hfi_core_init(struct msm_vidc_core *core) return -ENOMEM; } + core->response_packet = kzalloc(core->packet_size, GFP_KERNEL); + if (!core->response_packet) { + d_vpr_e("%s(): core response packet allocation failed\n", + __func__); + kfree(core->packet); + return -ENOMEM; + } + rc = __load_fw(core); if (rc) return rc; @@ -2311,6 +2426,7 @@ int venus_hfi_core_init(struct msm_vidc_core *core) error: d_vpr_h("%s(): failed\n", __func__); __unload_fw(core); + kfree(core->response_packet); kfree(core->packet); return rc; } diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c new file mode 100644 index 0000000000..0fe2ca2bc0 --- /dev/null +++ b/driver/vidc/src/venus_hfi_response.c @@ -0,0 +1,469 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2020, The Linux Foundation. All rights reserved. + */ + +#include "hfi_packet.h" +#include "venus_hfi.h" +#include "venus_hfi_response.h" +#include "msm_vidc_debug.h" +#include "msm_vidc_driver.h" + +bool is_valid_hfi_port(struct msm_vidc_inst *inst, u32 port, + const char *func) +{ + if (!inst) { + s_vpr_e(inst->sid, "%s: invalid params\n", func); + return false; + } + + if (port != HFI_PORT_BITSTREAM && port != HFI_PORT_RAW) { + s_vpr_e(inst->sid, "%s: invalid port %#x\n", func, port); + return false; + } + return true; +} + +bool is_valid_hfi_buffer_type(struct msm_vidc_inst *inst, + u32 buffer_type, const char *func) +{ + if (!inst) { + s_vpr_e(inst->sid, "%s: invalid params\n", func); + return false; + } + + if (buffer_type != HFI_BUFFER_BITSTREAM && + buffer_type != HFI_BUFFER_RAW && + buffer_type != HFI_BUFFER_METADATA) { + s_vpr_e(inst->sid, "%s: invalid buffer type %#x\n", + func, buffer_type); + return false; + } + return true; +} + +static int signal_session_msg_receipt(struct msm_vidc_inst *inst, + enum signal_session_response cmd) +{ + if (cmd < MAX_SIGNAL) + complete(&inst->completions[cmd]); + return 0; +} + +int validate_packet(u8 *response_pkt, u8 *core_resp_pkt, + u32 core_resp_pkt_size, const char *func) +{ + u8 *response_limit; + + if (!response_pkt || !core_resp_pkt || !core_resp_pkt_size) { + d_vpr_e("%s: invalid params\n", func); + return -EINVAL; + } + + response_limit = core_resp_pkt + core_resp_pkt_size - + max(sizeof(struct hfi_header), sizeof(struct hfi_packet)); + + if (response_pkt < core_resp_pkt || response_pkt > response_limit) { + d_vpr_e("%s: invalid packet address\n", func); + return -EINVAL; + } + + if (response_pkt + *(u32 *)response_pkt > response_limit) { + d_vpr_e("%s: invalid packet size %d\n", + func, *(u32 *)response_pkt); + return -EINVAL; + } + return 0; +} + +static int handle_session_error(struct msm_vidc_inst *inst, + struct hfi_packet *pkt) +{ + int rc = 0; + char *error; + + switch (pkt->type) { + case HFI_ERROR_MAX_SESSIONS: + error = "exceeded max sessions"; + break; + case HFI_ERROR_UNSUPPORTED: + error = "unsupported bitstream"; + break; + default: + error = "unknown"; + break; + } + + s_vpr_e(inst->sid, "session error (%#x): %s\n", pkt->type, error); + + rc = msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR); + return rc; +} + +static int handle_system_error(struct msm_vidc_core *core, + struct hfi_packet *pkt) +{ + mutex_lock(&core->lock); + if (core->state == MSM_VIDC_CORE_DEINIT) { + d_vpr_e("%s: core already deinitialized\n", __func__); + mutex_unlock(&core->lock); + return 0; + } + + d_vpr_e("%s: system error received\n", __func__); + core->state = MSM_VIDC_CORE_DEINIT; + mutex_unlock(&core->lock); + return 0; +} + +static int handle_system_init(struct msm_vidc_core *core, + struct hfi_packet *pkt) +{ + if (pkt->flags & HFI_FW_FLAGS_SYSTEM_ERROR) { + d_vpr_e("%s: received system error\n", __func__); + return 0; + } + + if (pkt->flags & HFI_FW_FLAGS_SUCCESS) { + d_vpr_h("%s: successful\n", __func__); + complete(&core->init_done); + } + + return 0; +} + +static int handle_session_open(struct msm_vidc_inst *inst, + struct hfi_packet *pkt) +{ + if (pkt->flags & HFI_FW_FLAGS_SESSION_ERROR) { + s_vpr_e(inst->sid, "%s: received session error\n", __func__); + msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR); + } + + if (pkt->flags & HFI_FW_FLAGS_SUCCESS) + s_vpr_h(inst->sid, "%s: successful\n", __func__); + + return 0; +} + +static int handle_session_close(struct msm_vidc_inst *inst, + struct hfi_packet *pkt) +{ + if (pkt->flags & HFI_FW_FLAGS_SESSION_ERROR) { + s_vpr_e(inst->sid, "%s: received session error\n", __func__); + msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR); + } + + if (pkt->flags & HFI_FW_FLAGS_SUCCESS) + s_vpr_h(inst->sid, "%s: successful\n", __func__); + + signal_session_msg_receipt(inst, SIGNAL_CMD_CLOSE); + return 0; +} + +static int handle_session_start(struct msm_vidc_inst *inst, + struct hfi_packet *pkt) +{ + if (pkt->flags & HFI_FW_FLAGS_SESSION_ERROR) { + s_vpr_e(inst->sid, "%s: received session error\n", __func__); + msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR); + } + + if (pkt->flags & HFI_FW_FLAGS_SUCCESS) + s_vpr_h(inst->sid, "%s: successful for port %d\n", + __func__, pkt->port); + return 0; +} + +static int handle_session_stop(struct msm_vidc_inst *inst, + struct hfi_packet *pkt) +{ + if (pkt->flags & HFI_FW_FLAGS_SESSION_ERROR) { + s_vpr_e(inst->sid, "%s: received session error\n", __func__); + msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR); + } + + if (pkt->flags & HFI_FW_FLAGS_SUCCESS) + s_vpr_h(inst->sid, "%s: successful for port %d\n", + __func__, pkt->port); + signal_session_msg_receipt(inst, SIGNAL_CMD_STOP); + return 0; +} + +static int handle_session_drain(struct msm_vidc_inst *inst, + struct hfi_packet *pkt) +{ + if (pkt->flags & HFI_FW_FLAGS_SESSION_ERROR) { + s_vpr_e(inst->sid, "%s: received session error\n", __func__); + msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR); + } + + if (pkt->flags & HFI_FW_FLAGS_SUCCESS) + s_vpr_h(inst->sid, "%s: successful\n", __func__); + return 0; +} + +static void handle_input_buffer(struct msm_vidc_inst *inst, + struct hfi_buffer *buffer) +{ +} + +static void handle_output_buffer(struct msm_vidc_inst *inst, + struct hfi_buffer *buffer) +{ +} + +static void handle_input_metadata_buffer(struct msm_vidc_inst *inst, + struct hfi_buffer *buffer) +{ +} + +static void handle_output_metadata_buffer(struct msm_vidc_inst *inst, + struct hfi_buffer *buffer) +{ +} + +static int handle_session_buffer(struct msm_vidc_inst *inst, + struct hfi_packet *pkt) +{ + struct hfi_buffer *buffer; + u32 buf_type = 0, port_type = 0; + + if (pkt->flags & HFI_FW_FLAGS_SESSION_ERROR) { + s_vpr_e(inst->sid, "%s: received session error\n", __func__); + msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR); + return 0; + } + + port_type = pkt->port; + if (!is_valid_hfi_port(inst, port_type, __func__)) { + msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR); + return 0; + } + + buffer = (struct hfi_buffer *)(pkt + sizeof(struct hfi_packet)); + buf_type = buffer->type; + if (!is_valid_hfi_buffer_type(inst, buf_type, __func__)) { + msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR); + return 0; + } + + s_vpr_h(inst->sid, "%s: Received buffer of type %#x\n", + __func__, buf_type); + + if (is_encode_session(inst)) { + if (port_type == HFI_PORT_BITSTREAM) { + if (buf_type == HFI_BUFFER_METADATA) + handle_output_metadata_buffer(inst, buffer); + else if (buf_type == HFI_BUFFER_BITSTREAM) + handle_output_buffer(inst, buffer); + } else if (port_type == HFI_PORT_RAW) { + if (buf_type == HFI_BUFFER_METADATA) + handle_input_metadata_buffer(inst, buffer); + else if (buf_type == HFI_BUFFER_RAW) + handle_input_buffer(inst, buffer); + } + } else if (is_decode_session(inst)) { + if (port_type == HFI_PORT_BITSTREAM) { + if (buf_type == HFI_BUFFER_METADATA) + handle_input_metadata_buffer(inst, buffer); + else if (buf_type == HFI_BUFFER_BITSTREAM) + handle_input_buffer(inst, buffer); + } else if (port_type == HFI_PORT_RAW) { + if (buf_type == HFI_BUFFER_METADATA) + handle_output_metadata_buffer(inst, buffer); + else if (buf_type == HFI_BUFFER_RAW) + handle_output_buffer(inst, buffer); + } + } else { + s_vpr_e(inst->sid, "%s: invalid session\n", __func__); + } + + return 0; +} + +static int handle_port_settings_change(struct msm_vidc_inst *inst, + struct hfi_packet *pkt) +{ + s_vpr_h(inst->sid, "%s: Received port settings change, type %d\n", + __func__, pkt->port); + return 0; +} + +static int handle_session_command(struct msm_vidc_inst *inst, + struct hfi_packet *pkt) +{ + switch (pkt->type) { + case HFI_CMD_OPEN: + return handle_session_open(inst, pkt); + case HFI_CMD_CLOSE: + return handle_session_close(inst, pkt); + case HFI_CMD_START: + return handle_session_start(inst, pkt); + case HFI_CMD_STOP: + return handle_session_stop(inst, pkt); + case HFI_CMD_DRAIN: + return handle_session_drain(inst, pkt); + case HFI_CMD_BUFFER: + return handle_session_buffer(inst, pkt); + case HFI_CMD_SETTINGS_CHANGE: + return handle_port_settings_change(inst, pkt); + default: + s_vpr_e(inst->sid, "%s: Unsupported command type: %#x\n", + __func__, pkt->type); + return -EINVAL; + } + return 0; +} + +static int handle_session_property(struct msm_vidc_inst *inst, + struct hfi_packet *pkt) +{ + s_vpr_h(inst->sid, "%s: property type %#x\n", __func__, pkt->type); + return 0; +} + +static int handle_image_version_property(struct hfi_packet *pkt) +{ + u32 i = 0; + char version[256]; + const u32 version_string_size = 128; + u8 *str_image_version; + u32 req_bytes; + + req_bytes = pkt->size - sizeof(*pkt); + if (req_bytes < version_string_size) { + d_vpr_e("%s: bad_pkt: %d\n", __func__, req_bytes); + return -EINVAL; + } + str_image_version = (u8 *)pkt + sizeof(struct hfi_packet); + /* + * The version string returned by firmware includes null + * characters at the start and in between. Replace the null + * characters with space, to print the version info. + */ + for (i = 0; i < version_string_size; i++) { + if (str_image_version[i] != '\0') + version[i] = str_image_version[i]; + else + version[i] = ' '; + } + version[i] = '\0'; + d_vpr_h("%s: F/W version: %s\n", __func__, version); + return 0; +} + +static int handle_system_property(struct msm_vidc_core *core, + struct hfi_packet *pkt) +{ + int rc = 0; + + if (pkt->flags & HFI_FW_FLAGS_SYSTEM_ERROR) { + d_vpr_e("%s: received system error for property type %#x\n", + __func__, pkt->type); + return handle_system_error(core, pkt); + } + + switch (pkt->type) { + case HFI_PROP_IMAGE_VERSION: + rc = handle_image_version_property(pkt); + break; + default: + d_vpr_h("%s: property type %#x successful\n", + __func__, pkt->type); + break; + } + return rc; +} + +static int handle_system_response(struct msm_vidc_core *core, + struct hfi_header *hdr) +{ + int rc = 0; + struct hfi_packet *pkt; + int i; + + pkt = (struct hfi_packet *)(hdr + sizeof(struct hfi_header)); + + for (i = 0; i < hdr->num_packets; i++) { + if (!validate_packet((u8 *)pkt, core->response_packet, + core->packet_size, __func__)) + return -EINVAL; + if (pkt->type == HFI_CMD_INIT) { + rc = handle_system_init(core, pkt); + } else if (pkt->type > HFI_SYSTEM_ERROR_BEGIN && + pkt->type < HFI_SYSTEM_ERROR_END) { + rc = handle_system_error(core, pkt); + } else if (pkt->type > HFI_PROP_BEGIN && + pkt->type < HFI_PROP_CODEC) { + rc = handle_system_property(core, pkt); + } else { + d_vpr_e("%s: Unknown packet type: %#x\n", + __func__, pkt->type); + return -EINVAL; + } + pkt += pkt->size; + } + return rc; +} + +static int handle_session_response(struct msm_vidc_core *core, + struct hfi_header *hdr) +{ + struct hfi_packet *pkt; + struct msm_vidc_inst *inst; + int i, rc = 0; + + inst = get_inst(core, hdr->session_id); + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + goto exit; + } + + pkt = (struct hfi_packet *)(hdr + sizeof(struct hfi_header)); + + for (i = 0; i < hdr->num_packets; i++) { + if (!validate_packet((u8 *)pkt, core->response_packet, + core->packet_size, __func__)) + goto exit; + if (pkt->type < HFI_CMD_END && pkt->type > HFI_CMD_BEGIN) { + rc = handle_session_command(inst, pkt); + } else if (pkt->type > HFI_PROP_BEGIN && + pkt->type < HFI_PROP_END) { + rc = handle_session_property(inst, pkt); + } else if (pkt->type > HFI_SESSION_ERROR_BEGIN && + pkt->type < HFI_SESSION_ERROR_END) { + rc = handle_session_error(inst, pkt); + } else { + s_vpr_e(inst->sid, "%s: Unknown packet type: %#x\n", + __func__, pkt->type); + goto exit; + } + pkt += pkt->size; + } +exit: + put_inst(inst); + return rc; +} + +int handle_response(struct msm_vidc_core *core, void *response) +{ + struct hfi_header *hdr; + + if (!core || !response) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + hdr = (struct hfi_header *)response; + if (!validate_packet((u8 *)hdr, core->response_packet, + core->packet_size, __func__)) + return -EINVAL; + + if (!hdr->session_id) + return handle_system_response(core, hdr); + else + return handle_session_response(core, hdr); + + return 0; +} From b5c03abc933cb009e61e59946fc4acf35bb1f012 Mon Sep 17 00:00:00 2001 From: Maheshwar Ajja Date: Thu, 27 Aug 2020 08:23:15 -0700 Subject: [PATCH 0011/1061] video: driver: add decoder controls Add decoder controls and subscribe parameters Change-Id: Ib4157b7f1dc8ce3c0b49f6bf7f6586883bf3b547 Signed-off-by: Maheshwar Ajja --- driver/platform/waipio/src/msm_vidc_waipio.c | 20 ++ driver/vidc/inc/hfi_packet.h | 2 + driver/vidc/inc/msm_vidc_control.h | 1 + driver/vidc/inc/msm_vidc_driver.h | 14 +- driver/vidc/inc/msm_vidc_inst.h | 7 +- driver/vidc/inc/msm_vidc_internal.h | 65 ++++-- driver/vidc/inc/venus_hfi.h | 6 +- driver/vidc/src/hfi_packet.c | 43 ++++ driver/vidc/src/msm_vdec.c | 230 +++++++++++++++++-- driver/vidc/src/msm_venc.c | 54 +++-- driver/vidc/src/msm_vidc.c | 70 ++++-- driver/vidc/src/msm_vidc_control.c | 72 ++++-- driver/vidc/src/msm_vidc_driver.c | 63 ++--- driver/vidc/src/msm_vidc_platform.c | 8 +- driver/vidc/src/msm_vidc_vb2.c | 7 +- driver/vidc/src/venus_hfi.c | 141 +++--------- include/uapi/vidc/media/msm_vidc_utils.h | 26 +++ 17 files changed, 577 insertions(+), 252 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 593c52ec7c..b9028c146d 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -108,6 +108,26 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { MSM_VIDC_FMT_NV12_P010_UBWC | MSM_VIDC_FMT_NV12_TP10_UBWC | MSM_VIDC_FMT_RGBA8888_UBWC | MSM_VIDC_FMT_SDE_Y_CBCR_H2V2_P010_VENUS, MSM_VIDC_FMT_NV12_UBWC}, + {MIN_BUFFERS_INPUT, ENC|DEC, CODECS_ALL, 0, 64, 1, 4, + V4L2_CID_MIN_BUFFERS_FOR_OUTPUT}, + {MIN_BUFFERS_OUTPUT, ENC|DEC, CODECS_ALL, 0, 64, 1, 4, + V4L2_CID_MIN_BUFFERS_FOR_CAPTURE}, + {DECODE_ORDER, DEC, CODECS_ALL, 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_VIDEO_DECODE_ORDER, + HFI_PROP_DECODE_ORDER_OUTPUT}, + {THUMBNAIL_MODE, DEC, CODECS_ALL, 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_VIDEO_SYNC_FRAME_DECODE, + HFI_PROP_THUMBNAIL_MODE}, + {SECURE_MODE, ENC|DEC, CODECS_ALL, 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_VIDEO_SECURE, + HFI_PROP_SECURE}, + {LOWLATENCY_MODE, ENC|DEC, CODECS_ALL, 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_VIDEO_LOWLATENCY_MODE}, + {LOWLATENCY_HINT, DEC, CODECS_ALL, 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_VIDEO_LOWLATENCY_HINT}, + {BUF_SIZE_LIMIT, ENC|DEC, CODECS_ALL, 0, 0x0fffffff, 1, 0, + V4L2_CID_MPEG_VIDC_VIDEO_BUFFER_SIZE_LIMIT}, + /* (8192 * 4320) / 256 */ {MBPF, ENC|DEC, CODECS_ALL, 64, 138240, 1, 138240}, /* ((1920 * 1088) / 256) * 960 fps */ diff --git a/driver/vidc/inc/hfi_packet.h b/driver/vidc/inc/hfi_packet.h index 29cbf473cf..fb867d6e5a 100644 --- a/driver/vidc/inc/hfi_packet.h +++ b/driver/vidc/inc/hfi_packet.h @@ -14,6 +14,8 @@ #include "hfi_definition.h" u32 get_hfi_port(struct msm_vidc_inst *inst, + enum msm_vidc_port_type port); +u32 get_hfi_port_from_buffer_type(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type buffer_type); u32 get_hfi_buffer_type(enum msm_vidc_domain_type domain, enum msm_vidc_buffer_type buffer_type); diff --git a/driver/vidc/inc/msm_vidc_control.h b/driver/vidc/inc/msm_vidc_control.h index 1cce5cd5aa..d438d2fc1a 100644 --- a/driver/vidc/inc/msm_vidc_control.h +++ b/driver/vidc/inc/msm_vidc_control.h @@ -6,6 +6,7 @@ #ifndef _MSM_VIDC_CONTROL_H_ #define _MSM_VIDC_CONTROL_H_ +#include #include "msm_vidc_inst.h" #include "msm_vidc_internal.h" diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 73aacd64ee..6c8865fa54 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -72,7 +72,7 @@ u32 get_v4l2_colorformat_from_vidc(enum msm_vidc_colorformat_type colorformat); enum msm_vidc_colorformat_type get_vidc_colorformat_from_v4l2(u32 colorformat); u32 get_media_colorformat_from_v4l2(u32 v4l2_fmt); int msm_vidc_change_inst_state(struct msm_vidc_inst *inst, - enum msm_vidc_inst_state state); + enum msm_vidc_inst_state state, const char *func); int msm_vidc_create_internal_buffers(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type buffer_type); int msm_vidc_queue_internal_buffers(struct msm_vidc_inst *inst, @@ -94,15 +94,16 @@ void msm_vidc_batch_handler(struct work_struct *work); int msm_vidc_setup_event_queue(struct msm_vidc_inst *inst); int msm_vidc_vb2_queue_init(struct msm_vidc_inst *inst); int msm_vidc_get_control(struct msm_vidc_inst *inst, struct v4l2_ctrl *ctrl); -int msm_vidc_get_port_from_v4l2_type(u32 type); +int msm_vidc_get_port_from_v4l2_type(struct msm_vidc_inst *inst, u32 type, + const char *func); u32 msm_vidc_get_buffer_region(struct msm_vidc_inst *inst, - enum msm_vidc_buffer_type buffer_type); + enum msm_vidc_buffer_type buffer_type, const char *func); struct msm_vidc_buffer_info *msm_vidc_get_buffer_info(struct msm_vidc_inst *inst, - enum msm_vidc_buffer_type buffer_type); + enum msm_vidc_buffer_type buffer_type, const char *func); struct msm_vidc_map_info *msm_vidc_get_map_info(struct msm_vidc_inst *inst, - enum msm_vidc_buffer_type buffer_type); + enum msm_vidc_buffer_type buffer_type, const char *func); struct msm_vidc_alloc_info *msm_vidc_get_alloc_info(struct msm_vidc_inst *inst, - enum msm_vidc_buffer_type buffer_type); + enum msm_vidc_buffer_type buffer_type, const char *func); struct msm_vidc_inst *get_inst(struct msm_vidc_core *core, u32 session_id); void put_inst(struct msm_vidc_inst *inst); @@ -110,6 +111,5 @@ void core_lock(struct msm_vidc_core *core, const char *function); void core_unlock(struct msm_vidc_core *core, const char *function); void inst_lock(struct msm_vidc_inst *inst, const char *function); void inst_unlock(struct msm_vidc_inst *inst, const char *function); - #endif // _MSM_VIDC_DRIVER_H_ diff --git a/driver/vidc/inc/msm_vidc_inst.h b/driver/vidc/inc/msm_vidc_inst.h index c0775a2f46..39cf7d950d 100644 --- a/driver/vidc/inc/msm_vidc_inst.h +++ b/driver/vidc/inc/msm_vidc_inst.h @@ -99,7 +99,12 @@ struct msm_vidc_inst { struct msm_vidc_buffers buffers; struct msm_vidc_maps maps; struct msm_vidc_allocations allocations; - struct msm_vidc_port_settings port_settings[MAX_PORT]; + bool subscribed_input_psc; + bool subscribed_output_psc; + bool subscribed_input_prop; + bool subscribed_output_prop; + struct msm_vidc_subscription_params vidc_subcr[MAX_PORT]; + struct msm_vidc_subscription_params hfi_subcr[MAX_PORT]; struct msm_vidc_decode_batch decode_batch; struct msm_vidc_decode_vpp_delay decode_vpp_delay; struct msm_vidc_session_idle session_idle; diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index efe5d84e34..ba8f6a69fd 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -174,6 +174,14 @@ enum msm_vidc_inst_capability_type { FRAME_WIDTH, FRAME_HEIGHT, PIX_FMTS, + MIN_BUFFERS_INPUT, + MIN_BUFFERS_OUTPUT, + DECODE_ORDER, + THUMBNAIL_MODE, + SECURE_MODE, + LOWLATENCY_MODE, + LOWLATENCY_HINT, + BUF_SIZE_LIMIT, MBPF, MBPS, FRAME_RATE, @@ -413,13 +421,41 @@ struct msm_vidc_session_idle { u64 last_activity_time_ns; }; -struct msm_vidc_port_settings { - u32 aligned_width; - u32 aligned_height; - u32 crop_width; - u32 crop_height; +struct msm_vidc_color_info { + u32 colorspace; + u32 ycbcr_enc; + u32 xfer_func; + u32 quantization; +}; + +struct msm_vidc_crop { + u32 x; + u32 y; + u32 width; + u32 height; +}; + +struct msm_vidc_properties { + u32 frame_rate; + u32 operating_rate; + u32 bit_rate; + u32 profile; + u32 level; + u32 entropy_mode; + u32 rc_type; +}; + +struct msm_vidc_subscription_params { + u32 align_width; + u32 align_height; + struct msm_vidc_crop crop; + struct msm_vidc_color_info color_info; + u32 bit_depth; + u32 cabac; + u32 interlace; u32 min_count; - u32 poc; + u32 pic_order_cnt; + u32 profile; }; struct msm_vidc_decode_vpp_delay { @@ -503,23 +539,6 @@ struct msm_vidc_buffer_info { u32 size; }; -struct msm_vidc_crop { - u32 x; - u32 y; - u32 width; - u32 height; -}; - -struct msm_vidc_properties { - u32 frame_rate; - u32 operating_rate; - u32 bit_rate; - u32 profile; - u32 level; - u32 entropy_mode; - u32 rc_type; -}; - struct msm_vidc_ssr { bool trigger; enum msm_vidc_ssr_trigger_type ssr_type; diff --git a/driver/vidc/inc/venus_hfi.h b/driver/vidc/inc/venus_hfi.h index 2660cb8e2a..5a816236ac 100644 --- a/driver/vidc/inc/venus_hfi.h +++ b/driver/vidc/inc/venus_hfi.h @@ -50,10 +50,8 @@ int venus_hfi_queue_buffer(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buffer, struct msm_vidc_buffer *metabuf); int venus_hfi_release_buffer(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buffer); -int venus_hfi_start_input(struct msm_vidc_inst *inst); -int venus_hfi_stop_input(struct msm_vidc_inst *inst); -int venus_hfi_start_output(struct msm_vidc_inst *inst); -int venus_hfi_stop_output(struct msm_vidc_inst *inst); +int venus_hfi_start(struct msm_vidc_inst *inst, enum msm_vidc_port_type port); +int venus_hfi_stop(struct msm_vidc_inst *inst, enum msm_vidc_port_type port); int venus_hfi_session_close(struct msm_vidc_inst *inst); int venus_hfi_session_open(struct msm_vidc_inst *inst); int venus_hfi_core_init(struct msm_vidc_core *core); diff --git a/driver/vidc/src/hfi_packet.c b/driver/vidc/src/hfi_packet.c index 87ce3356b5..afe81e3ca8 100644 --- a/driver/vidc/src/hfi_packet.c +++ b/driver/vidc/src/hfi_packet.c @@ -11,6 +11,49 @@ #include "msm_vidc_platform.h" u32 get_hfi_port(struct msm_vidc_inst *inst, + enum msm_vidc_port_type port) +{ + u32 hfi_port = HFI_PORT_NONE; + + if (is_decode_session(inst)) { + switch(port) { + case INPUT_PORT: + case INPUT_META_PORT: + hfi_port = HFI_PORT_BITSTREAM; + break; + case OUTPUT_PORT: + case OUTPUT_META_PORT: + hfi_port = HFI_PORT_RAW; + break; + default: + s_vpr_e(inst->sid, "%s: invalid port type %d\n", + __func__, port); + break; + } + } else if (is_encode_session(inst)) { + switch (port) { + case INPUT_PORT: + case INPUT_META_PORT: + hfi_port = HFI_PORT_RAW; + break; + case OUTPUT_PORT: + case OUTPUT_META_PORT: + hfi_port = HFI_PORT_BITSTREAM; + break; + default: + s_vpr_e(inst->sid, "%s: invalid port type %d\n", + __func__, port); + break; + } + } else { + s_vpr_e(inst->sid, "%s: invalid domain %#x\n", + __func__, inst->domain); + } + + return hfi_port; +} + +u32 get_hfi_port_from_buffer_type(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type buffer_type) { u32 hfi_port = HFI_PORT_NONE; diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index bcc5aa820e..ed01898d29 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -14,6 +14,7 @@ #include "msm_vidc_platform.h" #include "msm_vidc_debug.h" #include "venus_hfi.h" +#include "hfi_packet.h" static int msm_vdec_codec_change(struct msm_vidc_inst *inst, u32 codec) { @@ -136,15 +137,153 @@ static int msm_vdec_release_input_internal_buffers(struct msm_vidc_inst *inst) return 0; } */ + +static int msm_vdec_port_settings_subscription(struct msm_vidc_inst *inst, + enum msm_vidc_port_type port) +{ + int rc = 0; + struct msm_vidc_core *core; + u32 payload[32] = {0}; + u32 i; + u32 subscribe_psc[] = { + HFI_PROP_ALIGN_RESOLUTION, + HFI_PROP_CROP_RESOLUTION, + HFI_PROP_CROP_COORDINATE_TOP_LEFT, + HFI_PROP_LUMA_CHROMA_BIT_DEPTH, + HFI_PROP_CABAC_SESSION, + HFI_PROP_CODED_FRAMES, + HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT, + HFI_PROP_PIC_ORDER_CNT_TYPE, + HFI_PROP_SIGNAL_COLOR_INFO, + }; + + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + core = inst->core; + d_vpr_h("%s()\n", __func__); + + payload[0] = HFI_MODE_PORT_SETTINGS_CHANGE; + for (i = 0; i < ARRAY_SIZE(subscribe_psc); i++) + payload[i + 1] = subscribe_psc[i]; + + rc = hfi_create_header(inst->packet, inst->packet_size, + inst->session_id, + core->header_id++); + if (rc) + return rc; + + rc = hfi_create_packet(inst->packet, inst->packet_size, + HFI_CMD_SUBSCRIBE_MODE, + (HFI_HOST_FLAGS_RESPONSE_REQUIRED | + HFI_HOST_FLAGS_INTR_REQUIRED), + HFI_PAYLOAD_U32_ARRAY, + get_hfi_port(inst, port), + core->packet_id++, + &payload[0], + (ARRAY_SIZE(subscribe_psc) + 1) * sizeof(u32)); + if (rc) + return rc; + + return rc; +} + +static int msm_vdec_property_subscription(struct msm_vidc_inst *inst, + enum msm_vidc_port_type port) +{ + int rc = 0; + struct msm_vidc_core *core; + u32 payload[32] = {0}; + u32 i; + u32 subscribe_properties[] = { + HFI_PROP_TAG_NOT_PROPAGATED_TO_OUTPUT, + }; + + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + core = inst->core; + d_vpr_h("%s()\n", __func__); + + payload[0] = HFI_MODE_PROPERTY; + for (i = 0; i < ARRAY_SIZE(subscribe_properties); i++) + payload[i + 1] = subscribe_properties[i]; + + rc = hfi_create_header(inst->packet, inst->packet_size, + inst->session_id, + core->header_id++); + if (rc) + return rc; + + rc = hfi_create_packet(inst->packet, inst->packet_size, + HFI_CMD_SUBSCRIBE_MODE, + (HFI_HOST_FLAGS_RESPONSE_REQUIRED | + HFI_HOST_FLAGS_INTR_REQUIRED), + HFI_PAYLOAD_U32_ARRAY, + get_hfi_port(inst, port), + core->packet_id++, + &payload[0], + (ARRAY_SIZE(subscribe_properties) + 1) * sizeof(u32)); + if (rc) + return rc; + + return rc; +} + +static int msm_vdec_metadata_delivery(struct msm_vidc_inst *inst, + enum msm_vidc_port_type port) +{ + int rc = 0; + struct msm_vidc_core *core; + u32 payload[32] = {0}; + u32 i; + u32 metadata_delivery[] = { + HFI_PROP_BUFFER_TAG, + }; + + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + core = inst->core; + d_vpr_h("%s()\n", __func__); + + payload[0] = HFI_MODE_METADATA; + for (i = 0; i < ARRAY_SIZE(metadata_delivery); i++) + payload[i + 1] = metadata_delivery[i]; + + rc = hfi_create_header(inst->packet, inst->packet_size, + inst->session_id, + core->header_id++); + if (rc) + return rc; + + rc = hfi_create_packet(inst->packet, inst->packet_size, + HFI_CMD_DELIVERY_MODE, + (HFI_HOST_FLAGS_RESPONSE_REQUIRED | + HFI_HOST_FLAGS_INTR_REQUIRED), + HFI_PAYLOAD_U32_ARRAY, + get_hfi_port(inst, port), + core->packet_id++, + &payload[0], + (ARRAY_SIZE(metadata_delivery) + 1) * sizeof(u32)); + if (rc) + return rc; + + return rc; +} + int msm_vdec_stop_input(struct msm_vidc_inst *inst) { int rc = 0; - d_vpr_h("%s()\n", __func__); if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } + d_vpr_h("%s()\n", __func__); return rc; } @@ -154,11 +293,11 @@ int msm_vdec_start_input(struct msm_vidc_inst *inst) int rc = 0; struct msm_vidc_core *core; - d_vpr_h("%s()\n", __func__); if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } + d_vpr_h("%s()\n", __func__); core = inst->core; //rc = msm_vidc_check_session_supported(inst); @@ -199,11 +338,23 @@ int msm_vdec_start_input(struct msm_vidc_inst *inst) if (rc) goto error; - rc = venus_hfi_start_input(inst); + rc = msm_vdec_port_settings_subscription(inst, INPUT_PORT); if (rc) goto error; - rc = msm_vidc_change_inst_state(inst, MSM_VIDC_START_INPUT); + rc = msm_vdec_property_subscription(inst, INPUT_PORT); + if (rc) + goto error; + + rc = msm_vdec_metadata_delivery(inst, INPUT_PORT); + if (rc) + goto error; + + rc = venus_hfi_start(inst, INPUT_PORT); + if (rc) + goto error; + + rc = msm_vidc_change_inst_state(inst, MSM_VIDC_START_INPUT, __func__); if (rc) goto error; @@ -238,6 +389,23 @@ int msm_vdec_start_output(struct msm_vidc_inst *inst) return -EINVAL; } + rc = msm_vdec_port_settings_subscription(inst, OUTPUT_PORT); + if (rc) + goto error; + + rc = msm_vdec_metadata_delivery(inst, OUTPUT_PORT); + if (rc) + goto error; + + rc = venus_hfi_start(inst, OUTPUT_PORT); + if (rc) + goto error; + + d_vpr_h("%s: done\n", __func__); + return 0; + +error: + msm_vdec_stop_output(inst); return rc; } @@ -394,7 +562,7 @@ int msm_vdec_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) inst->buffers.output.actual_count; inst->buffers.output_meta.size = fmt->fmt.meta.buffersize; s_vpr_h(inst->sid, - "%s: input meta: size %d min_count %d extra_count %d\n", + "%s: output meta: size %d min_count %d extra_count %d\n", __func__, fmt->fmt.meta.buffersize, inst->buffers.output_meta.min_count, inst->buffers.output_meta.extra_count); @@ -419,11 +587,10 @@ int msm_vdec_g_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) return -EINVAL; } - port = msm_vidc_get_port_from_v4l2_type(f->type); - if (port < 0) { - d_vpr_e("%s: invalid format type %d\n", __func__, f->type); + port = msm_vidc_get_port_from_v4l2_type(inst, f->type, __func__); + if (port < 0) return -EINVAL; - } + memcpy(f, &inst->fmts[port], sizeof(struct v4l2_format)); return rc; @@ -432,9 +599,9 @@ int msm_vdec_g_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) int msm_vdec_enum_fmt(struct msm_vidc_inst *inst, struct v4l2_fmtdesc *f) { int rc = 0; - enum msm_vidc_codec_type codec; - enum msm_vidc_colorformat_type colorformat; struct msm_vidc_core *core; + u32 array[32] = {0}; + u32 i = 0, idx = 0; if (!inst || !inst->core || !inst->capabilities || !f) { d_vpr_e("%s: invalid params\n", __func__); @@ -442,24 +609,38 @@ int msm_vdec_enum_fmt(struct msm_vidc_inst *inst, struct v4l2_fmtdesc *f) } core = inst->core; - if (f->index >= - sizeof(inst->capabilities->cap[PIX_FMTS].step_or_mask) * 8) { - d_vpr_e("%s: invalid index %d\n", __func__, f->index); - return -EINVAL; - } - memset(f->reserved, 0, sizeof(f->reserved)); - if (f->type == INPUT_PLANE) { - codec = core->capabilities[DEC_CODECS].value & f->index; - f->pixelformat = get_v4l2_codec_from_vidc(codec); + u32 codecs = core->capabilities[DEC_CODECS].value; + + while (codecs) { + if (idx > 31) + break; + if (codecs & BIT(i)) { + array[idx] = codecs & BIT(i); + idx++; + } + i++; + codecs >>= 1; + } + f->pixelformat = get_v4l2_codec_from_vidc(array[f->index]); if (!f->pixelformat) return -EINVAL; f->flags = V4L2_FMT_FLAG_COMPRESSED; strlcpy(f->description, "codec", sizeof(f->description)); } else if (f->type == OUTPUT_PLANE) { - colorformat = f->index & - inst->capabilities->cap[PIX_FMTS].step_or_mask; - f->pixelformat = get_v4l2_colorformat_from_vidc(colorformat); + u32 formats = inst->capabilities->cap[PIX_FMTS].step_or_mask; + + while (formats) { + if (idx > 31) + break; + if (formats & BIT(i)) { + array[idx] = formats & BIT(i); + idx++; + } + i++; + formats >>= 1; + } + f->pixelformat = get_v4l2_colorformat_from_vidc(array[f->index]); if (!f->pixelformat) return -EINVAL; strlcpy(f->description, "colorformat", sizeof(f->description)); @@ -471,7 +652,10 @@ int msm_vdec_enum_fmt(struct msm_vidc_inst *inst, struct v4l2_fmtdesc *f) return -EINVAL; } } + memset(f->reserved, 0, sizeof(f->reserved)); + s_vpr_h(inst->sid, "%s: index %d, %s : %#x, flags %#x\n", + __func__, f->index, f->description, f->pixelformat, f->flags); return rc; } diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index a8da10cf04..e9b655608f 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -179,7 +179,7 @@ int msm_venc_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) inst->buffers.output.actual_count; inst->buffers.output_meta.size = fmt->fmt.meta.buffersize; s_vpr_h(inst->sid, - "%s: input meta: size %d min_count %d extra_count %d\n", + "%s: output meta: size %d min_count %d extra_count %d\n", __func__, fmt->fmt.meta.buffersize, inst->buffers.output_meta.min_count, inst->buffers.output_meta.extra_count); @@ -204,11 +204,10 @@ int msm_venc_g_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) return -EINVAL; } - port = msm_vidc_get_port_from_v4l2_type(f->type); - if (port < 0) { - d_vpr_e("%s: invalid format type %d\n", __func__, f->type); + port = msm_vidc_get_port_from_v4l2_type(inst, f->type, __func__); + if (port < 0) return -EINVAL; - } + memcpy(f, &inst->fmts[port], sizeof(struct v4l2_format)); return rc; @@ -217,9 +216,9 @@ int msm_venc_g_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) int msm_venc_enum_fmt(struct msm_vidc_inst *inst, struct v4l2_fmtdesc *f) { int rc = 0; - enum msm_vidc_codec_type codec; - enum msm_vidc_colorformat_type colorformat; struct msm_vidc_core *core; + u32 array[32] = {0}; + u32 i = 0, idx = 0; if (!inst || !inst->core || !inst->capabilities || !f) { d_vpr_e("%s: invalid params\n", __func__); @@ -227,24 +226,38 @@ int msm_venc_enum_fmt(struct msm_vidc_inst *inst, struct v4l2_fmtdesc *f) } core = inst->core; - if (f->index >= - sizeof(inst->capabilities->cap[PIX_FMTS].step_or_mask) * 8) { - d_vpr_e("%s: invalid index %d\n", __func__, f->index); - return -EINVAL; - } - memset(f->reserved, 0, sizeof(f->reserved)); - if (f->type == OUTPUT_PLANE) { - codec = core->capabilities[DEC_CODECS].value & f->index; - f->pixelformat = get_v4l2_codec_from_vidc(codec); + u32 codecs = core->capabilities[DEC_CODECS].value; + + while (codecs) { + if (idx > 31) + break; + if (codecs & BIT(i)) { + array[idx] = codecs & BIT(i); + idx++; + } + i++; + codecs >>= 1; + } + f->pixelformat = get_v4l2_codec_from_vidc(array[f->index]); if (!f->pixelformat) return -EINVAL; f->flags = V4L2_FMT_FLAG_COMPRESSED; strlcpy(f->description, "codec", sizeof(f->description)); } else if (f->type == INPUT_PLANE) { - colorformat = f->index & - inst->capabilities->cap[PIX_FMTS].step_or_mask; - f->pixelformat = get_v4l2_colorformat_from_vidc(colorformat); + u32 formats = inst->capabilities->cap[PIX_FMTS].step_or_mask; + + while (formats) { + if (idx > 31) + break; + if (formats & BIT(i)) { + array[idx] = formats & BIT(i); + idx++; + } + i++; + formats >>= 1; + } + f->pixelformat = get_v4l2_colorformat_from_vidc(array[f->index]); if (!f->pixelformat) return -EINVAL; strlcpy(f->description, "colorformat", sizeof(f->description)); @@ -256,7 +269,10 @@ int msm_venc_enum_fmt(struct msm_vidc_inst *inst, struct v4l2_fmtdesc *f) return -EINVAL; } } + memset(f->reserved, 0, sizeof(f->reserved)); + s_vpr_h(inst->sid, "%s: index %d, %s : %#x, flags %#x\n", + __func__, f->index, f->description, f->pixelformat, f->flags); return rc; } diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index bb41bd304c..ffa0d9a4f1 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -237,6 +237,9 @@ int msm_vidc_s_fmt(void *instance, struct v4l2_format *f) if (inst->domain == MSM_VIDC_ENCODER) rc = msm_venc_s_fmt(inst, f); + if (rc) + s_vpr_e(inst->sid, "%s: s_fmt(%d) failed %d\n", + __func__, f->type, rc); return rc; } EXPORT_SYMBOL(msm_vidc_s_fmt); @@ -287,7 +290,12 @@ int msm_vidc_g_ctrl(void *instance, struct v4l2_control *control) if (!rc) control->value = ctrl->val; } - + if (rc) + s_vpr_e(inst->sid, "%s: failed for control id %#x\n", + __func__, control->id); + else + s_vpr_h(inst->sid, "%s: control id %#x, value %d\n", + __func__, control->id, control->value); return rc; } EXPORT_SYMBOL(msm_vidc_g_ctrl); @@ -324,11 +332,10 @@ int msm_vidc_reqbufs(void *instance, struct v4l2_requestbuffers *b) } } - port = msm_vidc_get_port_from_v4l2_type(b->type); - if (port < 0) { - d_vpr_e("%s: invalid queue type %d\n", __func__, b->type); + port = msm_vidc_get_port_from_v4l2_type(inst, b->type, __func__); + if (port < 0) return -EINVAL; - } + rc = vb2_reqbufs(&inst->vb2q[port], b); if (rc) { s_vpr_e(inst->sid, "%s: vb2_reqbufs(%d) failed, %d\n", @@ -390,9 +397,8 @@ int msm_vidc_streamon(void *instance, enum v4l2_buf_type type) } } - port = msm_vidc_get_port_from_v4l2_type(type); + port = msm_vidc_get_port_from_v4l2_type(inst, type, __func__); if (port < 0) { - d_vpr_e("%s: invalid buf type %d\n", __func__, type); rc = -EINVAL; goto unlock; } @@ -410,7 +416,7 @@ int msm_vidc_streamon(void *instance, enum v4l2_buf_type type) } else if (inst->state == MSM_VIDC_START_OUTPUT) { new_state = MSM_VIDC_START; } - rc = msm_vidc_change_inst_state(inst, new_state); + rc = msm_vidc_change_inst_state(inst, new_state, __func__); if (rc) goto unlock; } else if (type == OUTPUT_PLANE) { @@ -424,7 +430,7 @@ int msm_vidc_streamon(void *instance, enum v4l2_buf_type type) else new_state = MSM_VIDC_DRAIN; } - rc = msm_vidc_change_inst_state(inst, new_state); + rc = msm_vidc_change_inst_state(inst, new_state, __func__); if (rc) goto unlock; } @@ -469,9 +475,8 @@ int msm_vidc_streamoff(void *instance, enum v4l2_buf_type type) } } - port = msm_vidc_get_port_from_v4l2_type(type); + port = msm_vidc_get_port_from_v4l2_type(inst, type, __func__); if (port < 0) { - d_vpr_e("%s: invalid buf type %d\n", __func__, type); rc = -EINVAL; goto unlock; } @@ -498,7 +503,7 @@ int msm_vidc_streamoff(void *instance, enum v4l2_buf_type type) new_state = MSM_VIDC_START_OUTPUT; /* discard pending port settings change if any */ } - rc = msm_vidc_change_inst_state(inst, new_state); + rc = msm_vidc_change_inst_state(inst, new_state, __func__); if (rc) goto unlock; } else if (type == OUTPUT_PLANE) { @@ -514,7 +519,7 @@ int msm_vidc_streamoff(void *instance, enum v4l2_buf_type type) } else if (inst->state == MSM_VIDC_DRC_DRAIN_LAST_FLAG) { new_state = MSM_VIDC_DRAIN_START_INPUT; } - rc = msm_vidc_change_inst_state(inst, new_state); + rc = msm_vidc_change_inst_state(inst, new_state, __func__); if (rc) goto unlock; } @@ -533,6 +538,29 @@ EXPORT_SYMBOL(msm_vidc_cmd); int msm_vidc_enum_framesizes(void *instance, struct v4l2_frmsizeenum *fsize) { + struct msm_vidc_inst *inst = instance; + struct msm_vidc_inst_capability *capability; + + if (!inst || !fsize) { + d_vpr_e("%s: invalid params: %pK %pK\n", + __func__, inst, fsize); + return -EINVAL; + } + if (!inst->capabilities) { + s_vpr_e(inst->sid, "capabilities not available\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + fsize->type = V4L2_FRMSIZE_TYPE_STEPWISE; + fsize->stepwise.min_width = capability->cap[FRAME_WIDTH].min; + fsize->stepwise.max_width = capability->cap[FRAME_WIDTH].max; + fsize->stepwise.step_width = + capability->cap[FRAME_WIDTH].step_or_mask; + fsize->stepwise.min_height = capability->cap[FRAME_HEIGHT].min; + fsize->stepwise.max_height = capability->cap[FRAME_HEIGHT].max; + fsize->stepwise.step_height = + capability->cap[FRAME_HEIGHT].step_or_mask; + return 0; } EXPORT_SYMBOL(msm_vidc_enum_framesizes); @@ -550,6 +578,9 @@ int msm_vidc_subscribe_event(void *instance, s_vpr_h(inst->sid, "%s: type %d id %d\n", __func__, sub->type, sub->id); rc = v4l2_event_subscribe(&inst->event_handler, sub, MAX_EVENTS, NULL); + if (rc) + s_vpr_e(inst->sid, "%s: fialed, type %d id %d\n", + __func__, sub->type, sub->id); return rc; } EXPORT_SYMBOL(msm_vidc_subscribe_event); @@ -566,6 +597,9 @@ int msm_vidc_unsubscribe_event(void *instance, } s_vpr_h(inst->sid, "%s: type %d id %d\n", __func__, sub->type, sub->id); rc = v4l2_event_unsubscribe(&inst->event_handler, sub); + if (rc) + s_vpr_e(inst->sid, "%s: fialed, type %d id %d\n", + __func__, sub->type, sub->id); return rc; } EXPORT_SYMBOL(msm_vidc_unsubscribe_event); @@ -580,6 +614,8 @@ int msm_vidc_dqevent(void *instance, struct v4l2_event *event) return -EINVAL; } rc = v4l2_event_dequeue(&inst->event_handler, event, false); + if (rc) + s_vpr_e(inst->sid, "%s: fialed\n", __func__); return rc; } EXPORT_SYMBOL(msm_vidc_dqevent); @@ -708,6 +744,14 @@ EXPORT_SYMBOL(msm_vidc_open); int msm_vidc_close(void *instance) { + struct msm_vidc_inst *inst = instance; + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + s_vpr_h(inst->sid, "%s()\n", __func__); + return 0; } EXPORT_SYMBOL(msm_vidc_close); diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index f3646c105f..5b78475a8b 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -61,11 +61,6 @@ static const char * const * msm_vidc_get_qmenu_type( return mpeg_video_rate_control; case V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD: return mpeg_video_stream_format; - /* - * TODO(AS) - * case V4L2_CID_MPEG_VIDC_VIDEO_ROI_TYPE: - * return roi_map_type; - */ default: s_vpr_e(inst->sid, "%s: No available qmenu for ctrl %#x", __func__, control_id); @@ -76,15 +71,22 @@ static const char * const * msm_vidc_get_qmenu_type( static const char *msm_vidc_get_priv_ctrl_name(u32 sid, u32 control_id) { switch (control_id) { + case V4L2_CID_MPEG_VIDC_VIDEO_DECODE_ORDER: + return "Decode Order"; + case V4L2_CID_MPEG_VIDC_VIDEO_SYNC_FRAME_DECODE: + return "Sync Frame Decode"; + case V4L2_CID_MPEG_VIDC_VIDEO_SECURE: + return "Secure Mode"; + case V4L2_CID_MPEG_VIDC_VIDEO_LOWLATENCY_MODE: + return "Low Latency Mode"; + case V4L2_CID_MPEG_VIDC_VIDEO_LOWLATENCY_HINT: + return "Low Latency Hint"; + case V4L2_CID_MPEG_VIDC_VIDEO_BUFFER_SIZE_LIMIT: + return "Buffer Size Limit"; case V4L2_CID_MPEG_VIDEO_BITRATE_MODE: return "Video Bitrate Control"; case V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD: return "NAL Format"; - /* - * TODO(AS) - * case V4L2_CID_MPEG_VIDC_VIDEO_ROI_TYPE: - * return "ROI Type"; - */ default: s_vpr_e(sid, "%s: ctrl name not available for ctrl id %#x", __func__, control_id); @@ -109,6 +111,11 @@ int msm_vidc_ctrl_init(struct msm_vidc_inst *inst) core = inst->core; capability = inst->capabilities; + if (core->v4l2_ctrl_ops) { + s_vpr_e(inst->sid, "%s: no control ops\n", __func__); + return -EINVAL; + } + for (idx = 0; idx < INST_CAP_MAX; idx++) { if (capability->cap[idx].v4l2_id) num_ctrls++; @@ -131,17 +138,36 @@ int msm_vidc_ctrl_init(struct msm_vidc_inst *inst) return rc; } + if (core->v4l2_ctrl_ops) { + s_vpr_e(inst->sid, "%s: no control ops\n", __func__); + return -EINVAL; + } + for (idx = 0; idx < INST_CAP_MAX; idx++) { struct v4l2_ctrl *ctrl; + if (!capability->cap[idx].v4l2_id) + continue; + if (ctrl_idx >= num_ctrls) { s_vpr_e(inst->sid, - "invalid ctrl_idx, max allowed %d\n", + "%s: invalid ctrl %#x, max allowed %d\n", + __func__, capability->cap[idx].v4l2_id, num_ctrls); return -EINVAL; } - if (!capability->cap[idx].v4l2_id) - continue; + s_vpr_h(inst->sid, + "%s: cap idx %d, value %d min %d max %d step_or_mask %#x flags %#x v4l2_id %#x hfi_id %#x\n", + __func__, idx, + capability->cap[idx].value, + capability->cap[idx].min, + capability->cap[idx].max, + capability->cap[idx].step_or_mask, + capability->cap[idx].flags, + capability->cap[idx].v4l2_id, + capability->cap[idx].hfi_id); + + memset(&ctrl_cfg, 0, sizeof(struct v4l2_ctrl_config)); if (is_priv_ctrl(capability->cap[idx].v4l2_id)) { /* add private control */ @@ -150,20 +176,24 @@ int msm_vidc_ctrl_init(struct msm_vidc_inst *inst) ctrl_cfg.id = capability->cap[idx].v4l2_id; ctrl_cfg.max = capability->cap[idx].max; ctrl_cfg.min = capability->cap[idx].min; - ctrl_cfg.menu_skip_mask = - ~(capability->cap[idx].step_or_mask); ctrl_cfg.ops = core->v4l2_ctrl_ops; - ctrl_cfg.step = capability->cap[idx].step_or_mask; ctrl_cfg.type = (capability->cap[idx].flags & CAP_FLAG_MENU) ? V4L2_CTRL_TYPE_MENU : V4L2_CTRL_TYPE_INTEGER; - ctrl_cfg.qmenu = msm_vidc_get_qmenu_type(inst, + if (ctrl_cfg.type == V4L2_CTRL_TYPE_MENU) { + ctrl_cfg.menu_skip_mask = + ~(capability->cap[idx].step_or_mask); + ctrl_cfg.qmenu = msm_vidc_get_qmenu_type(inst, capability->cap[idx].v4l2_id); + } else { + ctrl_cfg.step = + capability->cap[idx].step_or_mask; + } ctrl_cfg.name = msm_vidc_get_priv_ctrl_name(inst->sid, capability->cap[idx].v4l2_id); - if (!ctrl_cfg.name || !ctrl_cfg.ops) { - s_vpr_e(inst->sid, "%s: invalid control, %d\n", + if (!ctrl_cfg.name) { + s_vpr_e(inst->sid, "%s: invalid control, %#x\n", __func__, ctrl_cfg.id); return -EINVAL; } @@ -189,8 +219,8 @@ int msm_vidc_ctrl_init(struct msm_vidc_inst *inst) } } if (!ctrl) { - s_vpr_e(inst->sid, "%s: invalid ctrl %s\n", __func__, - ctrl->name); + s_vpr_e(inst->sid, "%s: invalid ctrl %#x\n", __func__, + capability->cap[idx].v4l2_id); return -EINVAL; } diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index ab1ac2376e..9dc5119f3a 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -166,7 +166,8 @@ u32 get_media_colorformat_from_v4l2(u32 v4l2_fmt) } } -int msm_vidc_get_port_from_v4l2_type(u32 type) +int msm_vidc_get_port_from_v4l2_type(struct msm_vidc_inst *inst, u32 type, + const char *func) { int port; @@ -179,7 +180,7 @@ int msm_vidc_get_port_from_v4l2_type(u32 type) } else if (type == OUTPUT_META_PLANE) { port = OUTPUT_META_PORT; } else { - d_vpr_e("%s: invalid type %d\n", __func__, type); + s_vpr_e(inst->sid, "%s: invalid type %d\n", func, type); port = -EINVAL; } @@ -187,7 +188,7 @@ int msm_vidc_get_port_from_v4l2_type(u32 type) } u32 msm_vidc_get_buffer_region(struct msm_vidc_inst *inst, - enum msm_vidc_buffer_type buffer_type) + enum msm_vidc_buffer_type buffer_type, const char *func) { u32 region = MSM_VIDC_NON_SECURE; @@ -231,13 +232,13 @@ u32 msm_vidc_get_buffer_region(struct msm_vidc_inst *inst, break; default: s_vpr_e(inst->sid, "%s: invalid buffer type %d\n", - __func__, buffer_type); + func, buffer_type); } return region; } struct msm_vidc_buffer_info *msm_vidc_get_buffer_info(struct msm_vidc_inst *inst, - enum msm_vidc_buffer_type buffer_type) + enum msm_vidc_buffer_type buffer_type, const char *func) { switch (buffer_type) { case MSM_VIDC_BUF_INPUT: @@ -266,7 +267,7 @@ struct msm_vidc_buffer_info *msm_vidc_get_buffer_info(struct msm_vidc_inst *inst } struct msm_vidc_map_info *msm_vidc_get_map_info(struct msm_vidc_inst *inst, - enum msm_vidc_buffer_type buffer_type) + enum msm_vidc_buffer_type buffer_type, const char *func) { switch (buffer_type) { case MSM_VIDC_BUF_INPUT: @@ -295,7 +296,7 @@ struct msm_vidc_map_info *msm_vidc_get_map_info(struct msm_vidc_inst *inst, } struct msm_vidc_alloc_info *msm_vidc_get_alloc_info(struct msm_vidc_inst *inst, - enum msm_vidc_buffer_type buffer_type) + enum msm_vidc_buffer_type buffer_type, const char *func) { switch (buffer_type) { case MSM_VIDC_BUF_SCRATCH: @@ -316,26 +317,26 @@ struct msm_vidc_alloc_info *msm_vidc_get_alloc_info(struct msm_vidc_inst *inst, } int msm_vidc_change_inst_state(struct msm_vidc_inst *inst, - enum msm_vidc_inst_state request_state) + enum msm_vidc_inst_state request_state, const char *func) { if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } if (!request_state) { - d_vpr_e("%s: invalid request state\n", __func__); + s_vpr_e(inst->sid, "%s: invalid request state\n", func); return -EINVAL; } if (inst->state == MSM_VIDC_ERROR) { s_vpr_h(inst->sid, - "inst is in bad state, can not change state to %d\n", - request_state); + "%s: inst is in bad state, can not change state to %d\n", + func, request_state); return 0; } - s_vpr_h(inst->sid, "state changed from %d to %d\n", - inst->state, request_state); + s_vpr_h(inst->sid, "%s: state changed from %d to %d\n", + func, inst->state, request_state); inst->state = request_state; return 0; } @@ -382,18 +383,18 @@ int msm_vidc_create_internal_buffers(struct msm_vidc_inst *inst, return -EINVAL; } if (!is_internal_buffer(buffer_type)) { - s_vpr_e(inst->sid, "%s: buffer type %#d is not internal\n", + s_vpr_e(inst->sid, "%s: buffer type %#x is not internal\n", __func__, buffer_type); return 0; } - buffer_info = msm_vidc_get_buffer_info(inst, buffer_type); + buffer_info = msm_vidc_get_buffer_info(inst, buffer_type, __func__); if (!buffer_info) return -EINVAL; - alloc_info = msm_vidc_get_alloc_info(inst, buffer_type); + alloc_info = msm_vidc_get_alloc_info(inst, buffer_type, __func__); if (!alloc_info) return -EINVAL; - map_info = msm_vidc_get_map_info(inst, buffer_type); + map_info = msm_vidc_get_map_info(inst, buffer_type, __func__); if (!alloc_info) return -EINVAL; @@ -403,12 +404,13 @@ int msm_vidc_create_internal_buffers(struct msm_vidc_inst *inst, struct msm_vidc_map *map; if (!buffer_info->size) { - d_vpr_e("%s: invalid buffer %#x\n", __func__, buffer_type); + s_vpr_e(inst->sid, "%s: invalid buffer %#x\n", + __func__, buffer_type); return -EINVAL; } buffer = kzalloc(sizeof(struct msm_vidc_buffer), GFP_KERNEL); if (!buffer) { - s_vpr_e(inst->sid, "%s: msm_vidc_buffer alloc failed\n", __func__); + s_vpr_e(inst->sid, "%s: buf alloc failed\n", __func__); return -ENOMEM; } INIT_LIST_HEAD(&buffer->list); @@ -420,12 +422,13 @@ int msm_vidc_create_internal_buffers(struct msm_vidc_inst *inst, alloc = kzalloc(sizeof(struct msm_vidc_alloc), GFP_KERNEL); if (!alloc) { - s_vpr_e(inst->sid, "%s: msm_vidc_alloc alloc failed\n", __func__); + s_vpr_e(inst->sid, "%s: alloc failed\n", __func__); return -ENOMEM; } INIT_LIST_HEAD(&alloc->list); alloc->buffer_type = buffer_type; - alloc->region = msm_vidc_get_buffer_region(inst, buffer_type); + alloc->region = msm_vidc_get_buffer_region(inst, + buffer_type, __func__); alloc->size = buffer->buffer_size; rc = msm_vidc_memory_alloc(inst->core, alloc); if (rc) @@ -434,7 +437,7 @@ int msm_vidc_create_internal_buffers(struct msm_vidc_inst *inst, map = kzalloc(sizeof(struct msm_vidc_map), GFP_KERNEL); if (!map) { - s_vpr_e(inst->sid, "%s: msm_vidc_map alloc failed\n", __func__); + s_vpr_e(inst->sid, "%s: map alloc failed\n", __func__); return -ENOMEM; } INIT_LIST_HEAD(&map->list); @@ -446,7 +449,7 @@ int msm_vidc_create_internal_buffers(struct msm_vidc_inst *inst, return -ENOMEM; list_add_tail(&map->list, &map_info->list); - s_vpr_e(inst->sid, "%s: created buffer_type %d, size %d\n", + s_vpr_e(inst->sid, "%s: created buffer_type %#x, size %d\n", __func__, buffer_type, buffer_info->size); } @@ -466,12 +469,12 @@ int msm_vidc_queue_internal_buffers(struct msm_vidc_inst *inst, return -EINVAL; } if (!is_internal_buffer(buffer_type)) { - s_vpr_e(inst->sid, "%s: buffer type %#d is not internal\n", + s_vpr_e(inst->sid, "%s: buffer type %#x is not internal\n", __func__, buffer_type); return 0; } - buffer_info = msm_vidc_get_buffer_info(inst, buffer_type); + buffer_info = msm_vidc_get_buffer_info(inst, buffer_type, __func__); if (!buffer_info) return -EINVAL; @@ -488,7 +491,7 @@ int msm_vidc_queue_internal_buffers(struct msm_vidc_inst *inst, /* mark queued */ buffer->attr |= MSM_VIDC_ATTR_QUEUED; - s_vpr_e(inst->sid, "%s: queued buffer_type %d, size %d\n", + s_vpr_h(inst->sid, "%s: queued buffer_type %#x, size %d\n", __func__, buffer_type, buffer_info->size); } @@ -508,12 +511,12 @@ int msm_vidc_release_internal_buffers(struct msm_vidc_inst *inst, return -EINVAL; } if (!is_internal_buffer(buffer_type)) { - s_vpr_e(inst->sid, "%s: buffer type %#d is not internal\n", + s_vpr_e(inst->sid, "%s: buffer type %#x is not internal\n", __func__, buffer_type); return 0; } - buffer_info = msm_vidc_get_buffer_info(inst, buffer_type); + buffer_info = msm_vidc_get_buffer_info(inst, buffer_type, __func__); if (!buffer_info) return -EINVAL; @@ -530,7 +533,7 @@ int msm_vidc_release_internal_buffers(struct msm_vidc_inst *inst, /* mark pending release */ buffer->attr |= MSM_VIDC_ATTR_PENDING_RELEASE; - s_vpr_e(inst->sid, "%s: released buffer_type %d, size %d\n", + s_vpr_e(inst->sid, "%s: released buffer_type %#x, size %d\n", __func__, buffer_type, buffer_info->size); } @@ -632,7 +635,7 @@ int msm_vidc_add_session(struct msm_vidc_inst *inst) list_for_each_entry(i, &core->instances, list) count++; - if (count < MAX_SUPPORTED_INSTANCES) { + if (count < 0xffffff /*TODO: MAX_SUPPORTED_INSTANCES*/) { list_add_tail(&inst->list, &core->instances); } else { d_vpr_e("%s: total sessions %d exceeded max limit %d\n", diff --git a/driver/vidc/src/msm_vidc_platform.c b/driver/vidc/src/msm_vidc_platform.c index 69cda2acaa..3492e601f2 100644 --- a/driver/vidc/src/msm_vidc_platform.c +++ b/driver/vidc/src/msm_vidc_platform.c @@ -27,10 +27,10 @@ static struct v4l2_ioctl_ops msm_v4l2_ioctl_ops = { .vidioc_enum_fmt_vid_cap = msm_v4l2_enum_fmt, .vidioc_enum_fmt_vid_out = msm_v4l2_enum_fmt, .vidioc_enum_framesizes = msm_v4l2_enum_framesizes, - .vidioc_s_fmt_vid_cap_mplane = msm_v4l2_s_fmt, - .vidioc_s_fmt_vid_out_mplane = msm_v4l2_s_fmt, - .vidioc_g_fmt_vid_cap_mplane = msm_v4l2_g_fmt, - .vidioc_g_fmt_vid_out_mplane = msm_v4l2_g_fmt, + .vidioc_s_fmt_vid_cap = msm_v4l2_s_fmt, + .vidioc_s_fmt_vid_out = msm_v4l2_s_fmt, + .vidioc_g_fmt_vid_cap = msm_v4l2_g_fmt, + .vidioc_g_fmt_vid_out = msm_v4l2_g_fmt, .vidioc_reqbufs = msm_v4l2_reqbufs, .vidioc_qbuf = msm_v4l2_qbuf, .vidioc_dqbuf = msm_v4l2_dqbuf, diff --git a/driver/vidc/src/msm_vidc_vb2.c b/driver/vidc/src/msm_vidc_vb2.c index 64f323bb9c..b95d046728 100644 --- a/driver/vidc/src/msm_vidc_vb2.c +++ b/driver/vidc/src/msm_vidc_vb2.c @@ -46,11 +46,10 @@ int msm_vidc_queue_setup(struct vb2_queue *q, return -EINVAL; } - port = msm_vidc_get_port_from_v4l2_type(q->type); - if (port < 0) { - d_vpr_e("%s: invalid queue type %d\n", __func__, q->type); + port = msm_vidc_get_port_from_v4l2_type(inst, q->type, __func__); + if (port < 0) return -EINVAL; - } + if (port == INPUT_PORT || port == INPUT_META_PORT) { if (inst->state == MSM_VIDC_START_INPUT) { d_vpr_e("%s: input invalid state %d\n", diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index f400132ae2..8e01bbc3e0 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -2543,24 +2543,24 @@ int venus_hfi_session_close(struct msm_vidc_inst *inst) return rc; } -int venus_hfi_start_input(struct msm_vidc_inst *inst) +int venus_hfi_start(struct msm_vidc_inst *inst, enum msm_vidc_port_type port) { int rc = 0; - u32 port; - - d_vpr_h("%s(): inst %p\n", __func__, inst); if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } + if (port != INPUT_PORT && port != OUTPUT_PORT) { + s_vpr_e(inst->sid, "%s: invalid port %d\n", __func__, port); + return -EINVAL; + } - port = is_decode_session(inst) ? HFI_PORT_BITSTREAM : HFI_PORT_RAW; rc = hfi_packet_session_command(inst, HFI_CMD_START, (HFI_HOST_FLAGS_RESPONSE_REQUIRED | HFI_HOST_FLAGS_INTR_REQUIRED), - port, + get_hfi_port(inst, port), inst->session_id, HFI_PAYLOAD_NONE, NULL, @@ -2575,90 +2575,25 @@ int venus_hfi_start_input(struct msm_vidc_inst *inst) return rc; } -int venus_hfi_stop_input(struct msm_vidc_inst *inst) +int venus_hfi_stop(struct msm_vidc_inst *inst, enum msm_vidc_port_type port) { int rc = 0; - u32 port; - - d_vpr_h("%s(): inst %p\n", __func__, inst); if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } + if (port != INPUT_PORT && port != OUTPUT_PORT) { + s_vpr_e(inst->sid, "%s: invalid port %d\n", __func__, port); + return -EINVAL; + } - port = is_decode_session(inst) ? HFI_PORT_BITSTREAM : HFI_PORT_RAW; rc = hfi_packet_session_command(inst, HFI_CMD_STOP, (HFI_HOST_FLAGS_RESPONSE_REQUIRED | HFI_HOST_FLAGS_INTR_REQUIRED | HFI_HOST_FLAGS_NON_DISCARDABLE), - port, - inst->session_id, - HFI_PAYLOAD_NONE, - NULL, - 0); - if (rc) - return rc; - - rc = __iface_cmdq_write(inst->core, inst->packet); - if (rc) - return rc; - - return rc; -} - -int venus_hfi_start_output(struct msm_vidc_inst *inst) -{ - int rc = 0; - u32 port; - - d_vpr_h("%s(): inst %p\n", __func__, inst); - - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - port = is_decode_session(inst) ? HFI_PORT_RAW : HFI_PORT_BITSTREAM; - rc = hfi_packet_session_command(inst, - HFI_CMD_START, - (HFI_HOST_FLAGS_RESPONSE_REQUIRED | - HFI_HOST_FLAGS_INTR_REQUIRED), - port, - inst->session_id, - HFI_PAYLOAD_NONE, - NULL, - 0); - if (rc) - return rc; - - rc = __iface_cmdq_write(inst->core, inst->packet); - if (rc) - return rc; - - return rc; -} - -int venus_hfi_stop_output(struct msm_vidc_inst *inst) -{ - int rc = 0; - u32 port; - - d_vpr_h("%s(): inst %p\n", __func__, inst); - - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - port = is_decode_session(inst) ? HFI_PORT_RAW : HFI_PORT_BITSTREAM; - rc = hfi_packet_session_command(inst, - HFI_CMD_STOP, - (HFI_HOST_FLAGS_RESPONSE_REQUIRED | - HFI_HOST_FLAGS_INTR_REQUIRED | - HFI_HOST_FLAGS_NON_DISCARDABLE), - port, + get_hfi_port(inst, port), inst->session_id, HFI_PAYLOAD_NONE, NULL, @@ -2697,15 +2632,15 @@ int venus_hfi_queue_buffer(struct msm_vidc_inst *inst, return rc; rc = hfi_create_packet(inst->packet, - inst->packet_size, - HFI_CMD_BUFFER, - (HFI_HOST_FLAGS_RESPONSE_REQUIRED | - HFI_HOST_FLAGS_INTR_REQUIRED), - HFI_PAYLOAD_STRUCTURE, - get_hfi_port(inst, buffer->type), - core->packet_id++, - &hfi_buffer, - sizeof(hfi_buffer)); + inst->packet_size, + HFI_CMD_BUFFER, + (HFI_HOST_FLAGS_RESPONSE_REQUIRED | + HFI_HOST_FLAGS_INTR_REQUIRED), + HFI_PAYLOAD_STRUCTURE, + get_hfi_port_from_buffer_type(inst, buffer->type), + core->packet_id++, + &hfi_buffer, + sizeof(hfi_buffer)); if (rc) return rc; @@ -2714,14 +2649,14 @@ int venus_hfi_queue_buffer(struct msm_vidc_inst *inst, if (rc) return rc; rc = hfi_create_packet(inst->packet, - inst->packet_size, - HFI_CMD_BUFFER, - HFI_HOST_FLAGS_NONE, - HFI_PAYLOAD_STRUCTURE, - get_hfi_port(inst, metabuf->type), - core->packet_id++, - &hfi_buffer, - sizeof(hfi_buffer)); + inst->packet_size, + HFI_CMD_BUFFER, + HFI_HOST_FLAGS_NONE, + HFI_PAYLOAD_STRUCTURE, + get_hfi_port_from_buffer_type(inst, metabuf->type), + core->packet_id++, + &hfi_buffer, + sizeof(hfi_buffer)); if (rc) return rc; } @@ -2765,15 +2700,15 @@ int venus_hfi_release_buffer(struct msm_vidc_inst *inst, return rc; rc = hfi_create_packet(inst->packet, - inst->packet_size, - HFI_CMD_BUFFER, - (HFI_HOST_FLAGS_RESPONSE_REQUIRED | - HFI_HOST_FLAGS_INTR_REQUIRED), - HFI_PAYLOAD_STRUCTURE, - get_hfi_port(inst, buffer->type), - core->packet_id++, - &hfi_buffer, - sizeof(hfi_buffer)); + inst->packet_size, + HFI_CMD_BUFFER, + (HFI_HOST_FLAGS_RESPONSE_REQUIRED | + HFI_HOST_FLAGS_INTR_REQUIRED), + HFI_PAYLOAD_STRUCTURE, + get_hfi_port_from_buffer_type(inst, buffer->type), + core->packet_id++, + &hfi_buffer, + sizeof(hfi_buffer)); if (rc) return rc; diff --git a/include/uapi/vidc/media/msm_vidc_utils.h b/include/uapi/vidc/media/msm_vidc_utils.h index 8c08ced070..2cc570f88c 100644 --- a/include/uapi/vidc/media/msm_vidc_utils.h +++ b/include/uapi/vidc/media/msm_vidc_utils.h @@ -27,6 +27,32 @@ /* vendor controls start */ #define V4L2_CID_MPEG_MSM_VIDC_BASE (V4L2_CTRL_CLASS_MPEG | 0x2000) +#define V4L2_CID_MPEG_VIDC_VIDEO_DECODE_ORDER \ + (V4L2_CID_MPEG_MSM_VIDC_BASE + 0x1) +#define V4L2_CID_MPEG_VIDC_VIDEO_SYNC_FRAME_DECODE \ + (V4L2_CID_MPEG_MSM_VIDC_BASE + 0x2) +#define V4L2_CID_MPEG_VIDC_VIDEO_SECURE \ + (V4L2_CID_MPEG_MSM_VIDC_BASE + 0x3) +#define V4L2_CID_MPEG_VIDC_VIDEO_LOWLATENCY_MODE \ + (V4L2_CID_MPEG_MSM_VIDC_BASE + 0x4) +#define V4L2_CID_MPEG_VIDC_VIDEO_LOWLATENCY_HINT \ + (V4L2_CID_MPEG_MSM_VIDC_BASE + 0x5) +#define V4L2_CID_MPEG_VIDC_VIDEO_BUFFER_SIZE_LIMIT \ + (V4L2_CID_MPEG_MSM_VIDC_BASE + 0x6) + +#define V4L2_CID_MPEG_VIDC_VIDEO_DECODE_ORDER \ + (V4L2_CID_MPEG_MSM_VIDC_BASE + 0x1) +#define V4L2_CID_MPEG_VIDC_VIDEO_SYNC_FRAME_DECODE \ + (V4L2_CID_MPEG_MSM_VIDC_BASE + 0x2) +#define V4L2_CID_MPEG_VIDC_VIDEO_SECURE \ + (V4L2_CID_MPEG_MSM_VIDC_BASE + 0x3) +#define V4L2_CID_MPEG_VIDC_VIDEO_LOWLATENCY_MODE \ + (V4L2_CID_MPEG_MSM_VIDC_BASE + 0x4) +#define V4L2_CID_MPEG_VIDC_VIDEO_LOWLATENCY_HINT \ + (V4L2_CID_MPEG_MSM_VIDC_BASE + 0x5) +#define V4L2_CID_MPEG_VIDC_VIDEO_BUFFER_SIZE_LIMIT \ + (V4L2_CID_MPEG_MSM_VIDC_BASE + 0x6) + /* vendor controls end */ #endif From dc3df521d4ca049dcf50f860d75a281cb9a7a794 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Thu, 27 Aug 2020 13:34:46 -0700 Subject: [PATCH 0012/1061] driver: vidc: add support to s_ctrl Add support to s_ctrl base skeleton. Change-Id: I842035b3bb296094f1491148f93233688f35ea14 Signed-off-by: Akshata Sahukar --- driver/platform/waipio/src/msm_vidc_waipio.c | 65 ++- driver/vidc/inc/msm_vidc_control.h | 12 + driver/vidc/inc/msm_vidc_driver.h | 2 +- driver/vidc/inc/msm_vidc_inst.h | 4 +- driver/vidc/inc/msm_vidc_internal.h | 4 +- driver/vidc/inc/msm_vidc_platform.h | 1 - driver/vidc/src/msm_vdec.c | 3 +- driver/vidc/src/msm_venc.c | 3 +- driver/vidc/src/msm_vidc.c | 4 +- driver/vidc/src/msm_vidc_control.c | 551 ++++++++++++++++++- driver/vidc/src/msm_vidc_driver.c | 9 +- driver/vidc/src/msm_vidc_vb2.c | 17 + driver/vidc/src/venus_hfi_response.c | 18 +- 13 files changed, 654 insertions(+), 39 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index b9028c146d..ba04c8a19a 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -92,6 +92,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { * children, * adjust, set} */ + {CODEC}, {FRAME_WIDTH, ENC|DEC, CODECS_ALL, 128, 8192, 1, 1920}, {FRAME_HEIGHT, ENC|DEC, CODECS_ALL, 128, 8192, 1, 1080}, {PIX_FMTS, ENC, CODECS_ALL, @@ -133,46 +134,86 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { /* ((1920 * 1088) / 256) * 960 fps */ {MBPS, ENC|DEC, CODECS_ALL, 64, 7833600, 1, 7833600}, {FRAME_RATE, ENC|DEC, CODECS_ALL, 1, 960, 1, 30}, + {BIT_RATE, ENC|DEC, CODECS_ALL, 1, 220000000, 1, 20000000, V4L2_CID_MPEG_VIDEO_BITRATE, HFI_PROP_TOTAL_BITRATE, CAP_FLAG_DYNAMIC_ALLOWED, /* TO DO parents */ {0}, - {LAYER_BITRATE, SLICE_BYTE}}, + {LAYER_BITRATE, SLICE_BYTE}, + msm_vidc_adjust_bitrate, msm_vidc_set_s32}, {BIT_RATE, ENC, HEVC, 1, 160000000, 1, 20000000, V4L2_CID_MPEG_VIDEO_BITRATE, HFI_PROP_TOTAL_BITRATE, CAP_FLAG_DYNAMIC_ALLOWED, /* TO DO parents */{0}, - {LAYER_BITRATE, SLICE_BYTE}}, + {LAYER_BITRATE, SLICE_BYTE}, + msm_vidc_adjust_bitrate, msm_vidc_set_s32}, {ENTROPY_MODE, ENC, H264, V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC, V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, - V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC | - V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, + BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC) | + BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC), V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, V4L2_CID_MPEG_VIDEO_H264_ENTROPY_MODE, HFI_PROP_CABAC_SESSION, CAP_FLAG_MENU, - {PROFILE}, - {BIT_RATE}}, + {CODEC, PROFILE}, + {BIT_RATE}, + msm_vidc_adjust_entropy_mode, msm_vidc_set_u32}, {PROFILE, ENC|DEC, H264, V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE, V4L2_MPEG_VIDEO_H264_PROFILE_HIGH_10, - V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE | - V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_BASELINE | - V4L2_MPEG_VIDEO_H264_PROFILE_MAIN | - V4L2_MPEG_VIDEO_H264_PROFILE_HIGH | - V4L2_MPEG_VIDEO_H264_PROFILE_HIGH_10, + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_BASELINE) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_MAIN) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_HIGH) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_HIGH_10), V4L2_MPEG_VIDEO_H264_PROFILE_HIGH, V4L2_CID_MPEG_VIDEO_H264_PROFILE, HFI_PROP_PROFILE, CAP_FLAG_ROOT | CAP_FLAG_MENU, {0}, - {ENTROPY_MODE}}, + {ENTROPY_MODE}, + NULL, msm_vidc_set_u32}, + + {LEVEL, ENC|DEC, H264, + V4L2_MPEG_VIDEO_H264_LEVEL_1_0, + V4L2_MPEG_VIDEO_H264_LEVEL_6_2, + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1B) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_3) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_2), + V4L2_MPEG_VIDEO_H264_LEVEL_6_2, + V4L2_CID_MPEG_VIDEO_H264_LEVEL, HFI_PROP_LEVEL, + /* TO DO(AS) */ + CAP_FLAG_ROOT | CAP_FLAG_MENU, + {0}, + {0}, + NULL, msm_vidc_set_u32}, {CABAC_BITRATE, ENC, H264, 1, 160000000, 1, 20000000}, + {VBV_DELAY, ENC, CODECS_ALL, + 0, 1000, 500, 0, + V4L2_CID_MPEG_VIDEO_VBV_DELAY}, + {SCALE_X, ENC, CODECS_ALL, 8192, 65536, 1, 8192}, {SCALE_Y, ENC, CODECS_ALL, 8192, 65536, 1, 8192}, {SCALE_X, DEC, CODECS_ALL, 65536, 65536, 1, 65536}, diff --git a/driver/vidc/inc/msm_vidc_control.h b/driver/vidc/inc/msm_vidc_control.h index d438d2fc1a..5e9ed8a30e 100644 --- a/driver/vidc/inc/msm_vidc_control.h +++ b/driver/vidc/inc/msm_vidc_control.h @@ -17,5 +17,17 @@ enum msm_vidc_ctrl_list_type { int msm_vidc_ctrl_init(struct msm_vidc_inst *inst); int msm_v4l2_op_s_ctrl(struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_bitrate(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_entropy_mode(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_properties(struct msm_vidc_inst *inst); +int msm_vidc_set_u32(void *instance, + enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_s32(void *instance, + enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_array(void *instance, + enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_fw_list(struct msm_vidc_inst *inst); +int msm_vidc_v4l2_menu_to_hfi(struct msm_vidc_inst *inst, + enum msm_vidc_inst_capability_type cap_id, u32 *value); #endif diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 6c8865fa54..18459cbc19 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -81,7 +81,7 @@ int msm_vidc_release_internal_buffers(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type buffer_type); int msm_vidc_add_session(struct msm_vidc_inst *inst); int msm_vidc_session_open(struct msm_vidc_inst *inst); -int msm_vidc_get_inst_capability(struct msm_vidc_inst *inst, u32 codec); +int msm_vidc_get_inst_capability(struct msm_vidc_inst *inst); int msm_vidc_core_init(struct msm_vidc_core *core); int msm_vidc_smmu_fault_handler(struct iommu_domain *domain, struct device *dev, unsigned long iova, int flags, void *data); diff --git a/driver/vidc/inc/msm_vidc_inst.h b/driver/vidc/inc/msm_vidc_inst.h index 39cf7d950d..e8b46f24ca 100644 --- a/driver/vidc/inc/msm_vidc_inst.h +++ b/driver/vidc/inc/msm_vidc_inst.h @@ -89,8 +89,8 @@ struct msm_vidc_inst { struct v4l2_fh event_handler; struct v4l2_ctrl **ctrls; u32 num_ctrls; - struct msm_vidc_inst_cap_entry child_ctrls; - struct msm_vidc_inst_cap_entry fw_ctrls; + struct msm_vidc_inst_cap_entry children; + struct msm_vidc_inst_cap_entry firmware; bool request; struct vb2_queue vb2q[MAX_PORT]; struct msm_vidc_crop crop; diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index ba8f6a69fd..99ba18e6c4 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -171,6 +171,7 @@ enum msm_vidc_core_capability_type { enum msm_vidc_inst_capability_type { INST_CAP_NONE = 0, + CODEC, FRAME_WIDTH, FRAME_HEIGHT, PIX_FMTS, @@ -190,6 +191,7 @@ enum msm_vidc_inst_capability_type { LAYER_BITRATE, ENTROPY_MODE, CABAC_BITRATE, + VBV_DELAY, LTR_COUNT, LCU_SIZE, POWER_SAVE_MBPS, @@ -248,7 +250,6 @@ struct msm_vidc_inst_cap { enum msm_vidc_inst_capability_type parents[MAX_CAP_PARENTS]; enum msm_vidc_inst_capability_type children[MAX_CAP_CHILDREN]; int (*adjust)(void *inst, - enum msm_vidc_inst_capability_type cap_id, struct v4l2_ctrl *ctrl); int (*set)(void *inst, enum msm_vidc_inst_capability_type cap_id); @@ -266,6 +267,7 @@ struct msm_vidc_core_capability { }; struct msm_vidc_inst_cap_entry { + /* list of struct msm_vidc_inst_cap_entry */ struct list_head list; enum msm_vidc_inst_capability_type cap_id; }; diff --git a/driver/vidc/inc/msm_vidc_platform.h b/driver/vidc/inc/msm_vidc_platform.h index 5e67dbe5dc..69769abc1a 100644 --- a/driver/vidc/inc/msm_vidc_platform.h +++ b/driver/vidc/inc/msm_vidc_platform.h @@ -30,7 +30,6 @@ struct msm_platform_inst_capability { enum msm_vidc_inst_capability_type parents[MAX_CAP_PARENTS]; enum msm_vidc_inst_capability_type children[MAX_CAP_CHILDREN]; int (*adjust)(void *inst, - enum msm_vidc_inst_capability_type cap_id, struct v4l2_ctrl *ctrl); int (*set)(void *inst, enum msm_vidc_inst_capability_type cap_id); diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index ed01898d29..fe1083b9d7 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -22,7 +22,8 @@ static int msm_vdec_codec_change(struct msm_vidc_inst *inst, u32 codec) d_vpr_h("%s()\n", __func__); - rc = msm_vidc_get_inst_capability(inst, codec); + inst->codec = get_vidc_codec_from_v4l2(codec); + rc = msm_vidc_get_inst_capability(inst); return rc; } diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index e9b655608f..a6e5007138 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -20,7 +20,8 @@ static int msm_venc_codec_change(struct msm_vidc_inst *inst, u32 codec) d_vpr_h("%s()\n", __func__); - rc = msm_vidc_get_inst_capability(inst, codec); + inst->codec = get_vidc_codec_from_v4l2(codec); + rc = msm_vidc_get_inst_capability(inst); return rc; } diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index ffa0d9a4f1..3c8f6630d9 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -699,8 +699,8 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) INIT_LIST_HEAD(&inst->maps.scratch_2.list); INIT_LIST_HEAD(&inst->maps.persist.list); INIT_LIST_HEAD(&inst->maps.persist_1.list); - INIT_LIST_HEAD(&inst->child_ctrls.list); - INIT_LIST_HEAD(&inst->fw_ctrls.list); + INIT_LIST_HEAD(&inst->children.list); + INIT_LIST_HEAD(&inst->firmware.list); inst->domain = session_type; inst->state = MSM_VIDC_OPEN; inst->request = false; diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 5b78475a8b..3fa29e550b 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -9,6 +9,7 @@ #include "hfi_property.h" #include "venus_hfi.h" #include "msm_vidc_internal.h" +#include "msm_vidc_driver.h" static bool is_priv_ctrl(u32 id) { @@ -62,7 +63,7 @@ static const char * const * msm_vidc_get_qmenu_type( case V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD: return mpeg_video_stream_format; default: - s_vpr_e(inst->sid, "%s: No available qmenu for ctrl %#x", + s_vpr_e(inst->sid, "%s: No available qmenu for ctrl %#x\n", __func__, control_id); return NULL; } @@ -88,12 +89,173 @@ static const char *msm_vidc_get_priv_ctrl_name(u32 sid, u32 control_id) case V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD: return "NAL Format"; default: - s_vpr_e(sid, "%s: ctrl name not available for ctrl id %#x", + s_vpr_e(sid, "%s: ctrl name not available for ctrl id %#x\n", __func__, control_id); return NULL; } } +static enum msm_vidc_inst_capability_type msm_vidc_get_cap_id( + struct msm_vidc_inst *inst, u32 id) +{ + enum msm_vidc_inst_capability_type i = INST_CAP_NONE + 1; + struct msm_vidc_inst_capability *capability; + enum msm_vidc_inst_capability_type cap_id = INST_CAP_NONE; + + capability = inst->capabilities; + do { + if (capability->cap[i].v4l2_id == id) { + cap_id = capability->cap[i].cap; + break; + } + i++; + } while (i < INST_CAP_MAX); + + return cap_id; +} + +static int msm_vidc_add_capid_to_list(struct msm_vidc_inst *inst, + enum msm_vidc_inst_capability_type cap_id, + enum msm_vidc_ctrl_list_type type) +{ + struct msm_vidc_inst_cap_entry *entry = NULL, *curr_node = NULL; + + /* skip adding if cap_id already present in list */ + if (type & FW_LIST) { + list_for_each_entry(curr_node, &inst->firmware.list, list) { + if (curr_node->cap_id == cap_id) { + s_vpr_e(inst->sid, + "%s: cap %d cannot be the child of two parents\n", + __func__, cap_id); + return 0; + } + } + } + + entry = kzalloc(sizeof(*entry), GFP_ATOMIC); + if (!entry) { + s_vpr_e(inst->sid, "%s: alloc failed\n", __func__); + return -ENOMEM; + } + entry->cap_id = cap_id; + if (type & CHILD_LIST) + list_add_tail(&entry->list, &inst->children.list); + if (type & FW_LIST) + list_add_tail(&entry->list, &inst->firmware.list); + + return 0; +} + +static int msm_vidc_add_children(struct msm_vidc_inst *inst, + enum msm_vidc_inst_capability_type cap_id) +{ + int rc = 0; + int i = 0; + struct msm_vidc_inst_capability *capability = inst->capabilities; + + while (i < MAX_CAP_CHILDREN && + capability->cap[cap_id].children[i]) { + rc = msm_vidc_add_capid_to_list(inst, + capability->cap[cap_id].children[i], + CHILD_LIST); + if (rc) + return rc; + i++; + } + return rc; +} + +static int msm_vidc_adjust_property(struct msm_vidc_inst *inst, + enum msm_vidc_inst_capability_type cap_id) +{ + int rc = 0; + struct msm_vidc_inst_capability *capability; + + capability = inst->capabilities; + + if (capability->cap[cap_id].adjust) { + rc = capability->cap[cap_id].adjust(inst, NULL); + if (rc) + goto exit; + } + + /* add children cap_id's to chidren list */ + rc = msm_vidc_add_children(inst, cap_id); + if (rc) + goto exit; + + /* add cap_id to firmware list always */ + rc = msm_vidc_add_capid_to_list(inst, cap_id, FW_LIST); + if (rc) + goto exit; + + return 0; + +exit: + return rc; +} + +static int msm_vidc_adjust_dynamic_property(struct msm_vidc_inst *inst, + enum msm_vidc_inst_capability_type cap_id, struct v4l2_ctrl *ctrl) +{ + int rc = 0; + struct msm_vidc_inst_capability *capability; + s32 prev_value; + + capability = inst->capabilities; + + /* + * ctrl is NULL for children adjustment calls + * When a dynamic control having children is adjusted, check if dynamic + * adjustment is allowed for its children. + */ + if (!(capability->cap[cap_id].flags & CAP_FLAG_DYNAMIC_ALLOWED)) { + s_vpr_e(inst->sid, + "%s: dynamic setting of cap_id %d is not allowed\n", + __func__, cap_id); + msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); + return -EINVAL; + } + + /* + * if ctrl is NULL, it is children of some parent, and hence, + * must have an adjust function defined + */ + if (!ctrl && !capability->cap[cap_id].adjust) { + s_vpr_e(inst->sid, + "%s: child cap %d must have ajdust function\n", + __func__, capability->cap[cap_id].cap); + return -EINVAL; + } + + prev_value = capability->cap[cap_id].value; + + if (capability->cap[cap_id].adjust) { + rc = capability->cap[cap_id].adjust(inst, ctrl); + if (rc) + goto exit; + } else if (ctrl) { + capability->cap[cap_id].value = ctrl->val; + } + + /* add children if cap value modified */ + if (capability->cap[cap_id].value != prev_value) { + rc = msm_vidc_add_children(inst, cap_id); + if (rc) + goto exit; + } + + /* add cap_id to firmware list always */ + rc = msm_vidc_add_capid_to_list(inst, cap_id, FW_LIST); + if (rc) + goto exit; + + return 0; + +exit: + return rc; +} + int msm_vidc_ctrl_init(struct msm_vidc_inst *inst) { int rc = 0; @@ -138,7 +300,7 @@ int msm_vidc_ctrl_init(struct msm_vidc_inst *inst) return rc; } - if (core->v4l2_ctrl_ops) { + if (!core->v4l2_ctrl_ops) { s_vpr_e(inst->sid, "%s: no control ops\n", __func__); return -EINVAL; } @@ -248,6 +410,387 @@ int msm_vidc_ctrl_init(struct msm_vidc_inst *inst) int msm_v4l2_op_s_ctrl(struct v4l2_ctrl *ctrl) { - return 0; + int rc = 0; + struct msm_vidc_inst *inst; + enum msm_vidc_inst_capability_type cap_id; + struct msm_vidc_inst_cap_entry *curr_node = NULL, *tmp_node = NULL; + struct msm_vidc_inst_capability *capability; + + if (!ctrl) { + d_vpr_e("%s: invalid ctrl parameter\n", __func__); + return -EINVAL; + } + + inst = container_of(ctrl->handler, + struct msm_vidc_inst, ctrl_handler); + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid parameters for inst\n", __func__); + return -EINVAL; + } + + if (inst->state == MSM_VIDC_ERROR) { + s_vpr_e(inst->sid, "%s: set ctrl not allowed in error state\n"); + /* (error name TBD); */ + return -EINVAL; + } + + capability = inst->capabilities; + + s_vpr_h(inst->sid, "%s: state %d, name %s, id 0x%x value %d\n", + __func__, inst->state, ctrl->name, ctrl->id, ctrl->val); + + cap_id = msm_vidc_get_cap_id(inst, ctrl->id); + if (cap_id == INST_CAP_NONE) { + s_vpr_e(inst->sid, "%s: could not find cap_id for ctrl %s\n", + __func__, ctrl->name); + return -EINVAL; + } + + /* Static setting */ + if (!inst->vb2q[OUTPUT_PORT].streaming) { + capability->cap[cap_id].value = ctrl->val; + return 0; + } + + /* check if dynamic adjustment is allowed */ + if (inst->vb2q[OUTPUT_PORT].streaming && + !(capability->cap[cap_id].flags & CAP_FLAG_DYNAMIC_ALLOWED)) { + s_vpr_e(inst->sid, + "%s: dynamic setting of cap_id %d is not allowed\n", + __func__, cap_id); + return -EBUSY; + } + + rc = msm_vidc_adjust_dynamic_property(inst, cap_id, ctrl); + if (rc) + goto exit; + + /* adjust all children if any */ + list_for_each_entry_safe(curr_node, tmp_node, + &inst->children.list, list) { + rc = msm_vidc_adjust_dynamic_property( + inst, curr_node->cap_id, NULL); + if (rc) + goto exit; + list_del(&curr_node->list); + kfree(curr_node); + } + + /* dynamic controls with request will be set along with qbuf */ + if (inst->request) + return 0; + + /* Dynamic set control ASAP */ + rc = msm_vidc_set_fw_list(inst); + if (rc) { + s_vpr_e(inst->sid, "%s: setting %s failed\n", + __func__, ctrl->name); + goto exit; + } + +exit: + return rc; } +int msm_vidc_adjust_entropy_mode(void *instance, struct v4l2_ctrl *ctrl) +{ + int rc = 0; + int i = 0; + struct msm_vidc_inst_capability *capability; + s32 adjusted_value; + enum msm_vidc_inst_capability_type parent_id; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + s32 codec = -1, profile = -1; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + capability = inst->capabilities; + + /* ctrl is always NULL in streamon case */ + if (ctrl) + adjusted_value = ctrl->val; + else + adjusted_value = capability->cap[ENTROPY_MODE].value; + + /* check parents and adjust cabac session value */ + while (i < MAX_CAP_PARENTS && + capability->cap[ENTROPY_MODE].parents[i]) { + parent_id = capability->cap[ENTROPY_MODE].parents[i]; + if (parent_id == CODEC) + codec = inst->codec; + else if (parent_id == profile) + profile = capability->cap[PROFILE].value; + else + s_vpr_e(inst->sid, + "%s: invalid parent %d\n", + __func__, parent_id); + } + + if (codec == -1 || profile == -1) { + s_vpr_e(inst->sid, + "%s: missing parents %d %d\n", + __func__, codec, profile); + return 0; + } + + if (codec == MSM_VIDC_H264 && + (profile == V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE || + profile == V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_BASELINE) && + adjusted_value == V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC) + adjusted_value = V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC; + + if (capability->cap[ENTROPY_MODE].value != adjusted_value) { + s_vpr_h(inst->sid, "%s: adjusted from %#x to %#x\n", __func__, + capability->cap[ENTROPY_MODE].value, adjusted_value); + capability->cap[ENTROPY_MODE].value = adjusted_value; + } + + return rc; +} + +int msm_vidc_adjust_bitrate(void *instance, struct v4l2_ctrl *ctrl) +{ + int rc = 0; + // u32 cabac_max_bitrate; + struct msm_vidc_inst_capability *capability; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + s32 new_value; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + capability = inst->capabilities; + + if (ctrl) + new_value = ctrl->val; + else + new_value = capability->cap[BIT_RATE].value; + + /* TO DO */ + return rc; +} + +/* + * Loop over instance capabilities with CAP_FLAG_ROOT + * and call adjust function, where + * - adjust current capability value + * - update tail of instance children list with capability children + * - update instance firmware list with current capability id + * Now, loop over child list and call its adjust function + */ +int msm_vidc_adjust_properties(struct msm_vidc_inst *inst) +{ + int rc = 0; + int i; + struct msm_vidc_inst_cap_entry *curr_node = NULL, *tmp_node = NULL; + struct msm_vidc_inst_capability *capability; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + capability = inst->capabilities; + + for (i = 0; i < INST_CAP_MAX; i++) { + if (capability->cap[i].flags & CAP_FLAG_ROOT) { + rc = msm_vidc_adjust_property(inst, + capability->cap[i].cap); + if (rc) + goto exit; + } + } + + /* + * children of all root controls are already + * added to inst->children list at this point + */ + list_for_each_entry_safe(curr_node, tmp_node, + &inst->children.list, list) { + /* + * call adjust for each child. Each child adjust + * will also update child list at the tail with + * its own children list. + * Also, if current control id value is updated, + * its entry should be added to fw list. + */ + rc = msm_vidc_adjust_property(inst, curr_node->cap_id); + if (rc) + goto exit; + list_del(&curr_node->list); + kfree(curr_node); + } + +exit: + return rc; +} + +int msm_vidc_set_u32(void *instance, + enum msm_vidc_inst_capability_type cap_id) +{ + int rc = 0; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; + u32 hfi_value; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + rc = msm_vidc_v4l2_menu_to_hfi(inst, cap_id, &hfi_value); + if (rc) + return -EINVAL; + + rc = hfi_packet_session_property(inst, + inst->capabilities->cap[cap_id].hfi_id, + HFI_HOST_FLAGS_NONE, HFI_PORT_NONE, + HFI_PAYLOAD_U32_ENUM, + &hfi_value, + sizeof(u32)); + if (rc) + s_vpr_e(inst->sid, + "%s: failed to set cap_id: %d to fw\n", + __func__, cap_id); + + return rc; +} + +int msm_vidc_set_s32(void *instance, + enum msm_vidc_inst_capability_type cap_id) +{ + int rc = 0; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + rc = hfi_packet_session_property(inst, + inst->capabilities->cap[cap_id].hfi_id, + HFI_HOST_FLAGS_NONE, HFI_PORT_NONE, + HFI_PAYLOAD_S32, + &inst->capabilities->cap[cap_id].value, + sizeof(s32)); + if (rc) + s_vpr_e(inst->sid, + "%s: failed to set cap_id: %d to fw\n", + __func__, cap_id); + + return rc; +} + +/* Please ignore this function for now. TO DO*/ +int msm_vidc_set_array(void *instance, + enum msm_vidc_inst_capability_type cap_id) +{ + int rc = 0; + struct msm_vidc_inst_capability *capability; + struct msm_vidc_core *core; + + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; + + if (!inst || !inst->core || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + capability = inst->capabilities; + core = (struct msm_vidc_core *)inst->core; + + switch (cap_id) { + /* + * Needed if any control needs to be packed into a structure + * and sent for packetization. + * payload types may be: + * STRUCTURE, BLOB, STRING, PACKED, ARRAY, + * + case BITRATE_MODE: + s_vpr_h(inst->sid, "%s: %d\n", __func__, hfi_value); + hfi_create_packet(inst->packet, inst->packet_size, + offset, + capability->cap[cap_id].hfi_id, + HFI_HOST_FLAGS_NONE, HFI_PAYLOAD_ENUM, + HFI_PORT_NONE, core->packet_id++, + &capability->cap[PROFILE].value, sizeof(u32)); + break; + } + */ + default: + s_vpr_e(inst->sid, + "%s: Unknown cap id %d, cannot set to fw\n", + __func__, cap_id); + rc = -EINVAL; + break; + } + + return rc; +} + +int msm_vidc_set_fw_list(struct msm_vidc_inst *inst) +{ + int rc = 0; + struct msm_vidc_inst_capability *capability; + struct msm_vidc_inst_cap_entry *curr_node = NULL, *tmp_node = NULL; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + list_for_each_entry_safe(curr_node, tmp_node, + &inst->firmware.list, list) { + + /* cap_id's like PIX_FMT etc may not have set functions */ + if (!capability->cap[curr_node->cap_id].set) + continue; + + rc = capability->cap[curr_node->cap_id].set(inst, + curr_node->cap_id); + if (rc) + goto exit; + + list_del(&curr_node->list); + kfree(curr_node); + } + +exit: + return rc; +} + +int msm_vidc_v4l2_menu_to_hfi(struct msm_vidc_inst *inst, + enum msm_vidc_inst_capability_type cap_id, u32 *value) +{ + struct msm_vidc_inst_capability *capability = inst->capabilities; + + switch (capability->cap[cap_id].v4l2_id) { + case V4L2_CID_MPEG_VIDEO_H264_ENTROPY_MODE: + switch (capability->cap[cap_id].value) { + case V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC: + *value = 1; + break; + case V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC: + *value = 0; + break; + default: + *value = 1; + s_vpr_e(inst->sid, + "%s: invalid ctrl %d value %d, default value %u\n", + __func__, capability->cap[cap_id].v4l2_id, + capability->cap[cap_id].value, *value); + } + break; + default: + s_vpr_e(inst->sid, + "%s: invalid ctrl with cap_id\n", cap_id); + return -EINVAL; + } + return 0; +} diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 9dc5119f3a..e58804b805 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -668,7 +668,7 @@ int msm_vidc_session_open(struct msm_vidc_inst *inst) return 0; } -int msm_vidc_get_inst_capability(struct msm_vidc_inst *inst, u32 codec) +int msm_vidc_get_inst_capability(struct msm_vidc_inst *inst) { int rc = 0; int i; @@ -683,11 +683,10 @@ int msm_vidc_get_inst_capability(struct msm_vidc_inst *inst, u32 codec) for (i = 0; i < core->codecs_count; i++) { if (core->inst_caps[i].domain == inst->domain && - core->inst_caps[i].codec == get_vidc_codec_from_v4l2( - codec)) { + core->inst_caps[i].codec == inst->codec) { s_vpr_h(inst->sid, - "%s: copied capabilities with %#x caps\n", - __func__, codec); + "%s: copied capabilities with %#x codec\n", + __func__, inst->codec); memcpy(inst->capabilities, &core->inst_caps[i], sizeof(struct msm_vidc_inst_capability)); } diff --git a/driver/vidc/src/msm_vidc_vb2.c b/driver/vidc/src/msm_vidc_vb2.c index b95d046728..055e0c4777 100644 --- a/driver/vidc/src/msm_vidc_vb2.c +++ b/driver/vidc/src/msm_vidc_vb2.c @@ -110,6 +110,23 @@ int msm_vidc_start_streaming(struct vb2_queue *q, unsigned int count) return -EINVAL; } + /* + if (inst->state == MSM_VIDC_START_INPUT || + inst->state == MSM_VIDC_START_OUTPUT) { + rc = msm_vidc_adjust_properties(inst); + if (rc) + return -EINVAL; + } + + if ((inst->state == MSM_VIDC_START_INPUT) || + (inst->state == MSM_VIDC_START && + q->type == INPUT_PLANE)) { + rc = msm_vidc_set_fw_list(inst); + if (rc) + return -EINVAL; + } + */ + if (q->type == INPUT_PLANE) { if (is_decode_session(inst)) rc = msm_vdec_start_input(inst); diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index 0fe2ca2bc0..82f66d2472 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -96,7 +96,7 @@ static int handle_session_error(struct msm_vidc_inst *inst, s_vpr_e(inst->sid, "session error (%#x): %s\n", pkt->type, error); - rc = msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR); + rc = msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); return rc; } @@ -137,7 +137,7 @@ static int handle_session_open(struct msm_vidc_inst *inst, { if (pkt->flags & HFI_FW_FLAGS_SESSION_ERROR) { s_vpr_e(inst->sid, "%s: received session error\n", __func__); - msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR); + msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); } if (pkt->flags & HFI_FW_FLAGS_SUCCESS) @@ -151,7 +151,7 @@ static int handle_session_close(struct msm_vidc_inst *inst, { if (pkt->flags & HFI_FW_FLAGS_SESSION_ERROR) { s_vpr_e(inst->sid, "%s: received session error\n", __func__); - msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR); + msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); } if (pkt->flags & HFI_FW_FLAGS_SUCCESS) @@ -166,7 +166,7 @@ static int handle_session_start(struct msm_vidc_inst *inst, { if (pkt->flags & HFI_FW_FLAGS_SESSION_ERROR) { s_vpr_e(inst->sid, "%s: received session error\n", __func__); - msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR); + msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); } if (pkt->flags & HFI_FW_FLAGS_SUCCESS) @@ -180,7 +180,7 @@ static int handle_session_stop(struct msm_vidc_inst *inst, { if (pkt->flags & HFI_FW_FLAGS_SESSION_ERROR) { s_vpr_e(inst->sid, "%s: received session error\n", __func__); - msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR); + msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); } if (pkt->flags & HFI_FW_FLAGS_SUCCESS) @@ -195,7 +195,7 @@ static int handle_session_drain(struct msm_vidc_inst *inst, { if (pkt->flags & HFI_FW_FLAGS_SESSION_ERROR) { s_vpr_e(inst->sid, "%s: received session error\n", __func__); - msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR); + msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); } if (pkt->flags & HFI_FW_FLAGS_SUCCESS) @@ -231,20 +231,20 @@ static int handle_session_buffer(struct msm_vidc_inst *inst, if (pkt->flags & HFI_FW_FLAGS_SESSION_ERROR) { s_vpr_e(inst->sid, "%s: received session error\n", __func__); - msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR); + msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); return 0; } port_type = pkt->port; if (!is_valid_hfi_port(inst, port_type, __func__)) { - msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR); + msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); return 0; } buffer = (struct hfi_buffer *)(pkt + sizeof(struct hfi_packet)); buf_type = buffer->type; if (!is_valid_hfi_buffer_type(inst, buf_type, __func__)) { - msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR); + msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); return 0; } From ec2f06a4ba90c23f674aad959cf5111b56334e44 Mon Sep 17 00:00:00 2001 From: Maheshwar Ajja Date: Thu, 3 Sep 2020 16:45:49 -0700 Subject: [PATCH 0013/1061] video: driver: add queue buffer support Add queue buffer support for sending buffers to firmware. Change-Id: Ie573c10a9b2f32a3eb202f97227b5e7edea26705 Signed-off-by: Maheshwar Ajja --- driver/vidc/inc/msm_vdec.h | 1 + driver/vidc/inc/msm_vidc_driver.h | 38 +- driver/vidc/inc/msm_vidc_inst.h | 58 +-- driver/vidc/inc/msm_vidc_internal.h | 12 +- driver/vidc/src/msm_vdec.c | 69 ++- driver/vidc/src/msm_venc.c | 16 +- driver/vidc/src/msm_vidc.c | 113 ++++- driver/vidc/src/msm_vidc_buffer.c | 22 +- driver/vidc/src/msm_vidc_control.c | 7 +- driver/vidc/src/msm_vidc_driver.c | 511 ++++++++++++++++++++--- driver/vidc/src/msm_vidc_memory.c | 6 +- driver/vidc/src/msm_vidc_platform.c | 4 + driver/vidc/src/msm_vidc_vb2.c | 30 +- driver/vidc/src/venus_hfi.c | 10 +- include/uapi/vidc/media/msm_vidc_utils.h | 13 - 15 files changed, 727 insertions(+), 183 deletions(-) diff --git a/driver/vidc/inc/msm_vdec.h b/driver/vidc/inc/msm_vdec.h index f58a3440b4..921b482722 100644 --- a/driver/vidc/inc/msm_vdec.h +++ b/driver/vidc/inc/msm_vdec.h @@ -13,6 +13,7 @@ int msm_vdec_stop_input(struct msm_vidc_inst *inst); int msm_vdec_start_input(struct msm_vidc_inst *inst); int msm_vdec_stop_output(struct msm_vidc_inst *inst); int msm_vdec_start_output(struct msm_vidc_inst *inst); +int msm_vdec_qbuf(struct msm_vidc_inst *inst, struct vb2_buffer *vb2); int msm_vdec_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f); int msm_vdec_g_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f); int msm_vdec_enum_fmt(struct msm_vidc_inst *inst, struct v4l2_fmtdesc *f); diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 18459cbc19..73cc625857 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -66,11 +66,17 @@ static inline bool is_thumbnail_session(struct msm_vidc_inst *inst) return false; // TODO: fix it } -u32 get_v4l2_codec_from_vidc(enum msm_vidc_codec_type codec); -enum msm_vidc_codec_type get_vidc_codec_from_v4l2(u32 v4l2_codec); -u32 get_v4l2_colorformat_from_vidc(enum msm_vidc_colorformat_type colorformat); -enum msm_vidc_colorformat_type get_vidc_colorformat_from_v4l2(u32 colorformat); -u32 get_media_colorformat_from_v4l2(u32 v4l2_fmt); +void print_vidc_buffer(u32 tag, const char *str, struct msm_vidc_inst *inst, + struct msm_vidc_buffer *vbuf); +void print_vb2_buffer(const char *str, struct msm_vidc_inst *inst, + struct vb2_buffer *vb2); +enum msm_vidc_codec_type v4l2_codec_to_driver(u32 v4l2_codec); +u32 v4l2_codec_from_driver(enum msm_vidc_codec_type codec); +u32 v4l2_colorformat_to_media(u32 v4l2_fmt); +enum msm_vidc_colorformat_type v4l2_colorformat_to_driver(u32 colorformat); +u32 v4l2_colorformat_from_driver(enum msm_vidc_colorformat_type colorformat); +int v4l2_type_to_driver_port(struct msm_vidc_inst *inst, u32 type, + const char *func); int msm_vidc_change_inst_state(struct msm_vidc_inst *inst, enum msm_vidc_inst_state state, const char *func); int msm_vidc_create_internal_buffers(struct msm_vidc_inst *inst, @@ -94,16 +100,26 @@ void msm_vidc_batch_handler(struct work_struct *work); int msm_vidc_setup_event_queue(struct msm_vidc_inst *inst); int msm_vidc_vb2_queue_init(struct msm_vidc_inst *inst); int msm_vidc_get_control(struct msm_vidc_inst *inst, struct v4l2_ctrl *ctrl); -int msm_vidc_get_port_from_v4l2_type(struct msm_vidc_inst *inst, u32 type, - const char *func); u32 msm_vidc_get_buffer_region(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type buffer_type, const char *func); -struct msm_vidc_buffer_info *msm_vidc_get_buffer_info(struct msm_vidc_inst *inst, +struct msm_vidc_buffers *msm_vidc_get_buffers(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type buffer_type, const char *func); -struct msm_vidc_map_info *msm_vidc_get_map_info(struct msm_vidc_inst *inst, - enum msm_vidc_buffer_type buffer_type, const char *func); -struct msm_vidc_alloc_info *msm_vidc_get_alloc_info(struct msm_vidc_inst *inst, +struct msm_vidc_mappings *msm_vidc_get_mappings(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type buffer_type, const char *func); +struct msm_vidc_allocations *msm_vidc_get_allocations( + struct msm_vidc_inst *inst, enum msm_vidc_buffer_type buffer_type, + const char *func); +struct msm_vidc_buffer *msm_vidc_get_driver_buf(struct msm_vidc_inst *inst, + struct vb2_buffer *vb2); +int msm_vidc_unmap_driver_buf(struct msm_vidc_inst *inst, + struct msm_vidc_buffer *buf); +int msm_vidc_map_driver_buf(struct msm_vidc_inst *inst, + struct msm_vidc_buffer *buf); +int msm_vidc_put_driver_buf(struct msm_vidc_inst *inst, + struct msm_vidc_buffer *buf); +int msm_vidc_queue_buffer(struct msm_vidc_inst *inst, struct vb2_buffer *vb2); +struct msm_vidc_buffer *get_meta_buffer(struct msm_vidc_inst *inst, + struct msm_vidc_buffer *vbuf); struct msm_vidc_inst *get_inst(struct msm_vidc_core *core, u32 session_id); void put_inst(struct msm_vidc_inst *inst); diff --git a/driver/vidc/inc/msm_vidc_inst.h b/driver/vidc/inc/msm_vidc_inst.h index e8b46f24ca..86a2996c63 100644 --- a/driver/vidc/inc/msm_vidc_inst.h +++ b/driver/vidc/inc/msm_vidc_inst.h @@ -25,36 +25,36 @@ struct msm_vidc_session_ops { int (*extra_count)(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type type); }; -struct msm_vidc_allocations { - struct msm_vidc_alloc_info scratch; - struct msm_vidc_alloc_info scratch_1; - struct msm_vidc_alloc_info scratch_2; - struct msm_vidc_alloc_info persist; - struct msm_vidc_alloc_info persist_1; +struct msm_vidc_allocations_info { + struct msm_vidc_allocations scratch; + struct msm_vidc_allocations scratch_1; + struct msm_vidc_allocations scratch_2; + struct msm_vidc_allocations persist; + struct msm_vidc_allocations persist_1; }; -struct msm_vidc_maps { - struct msm_vidc_map_info input; - struct msm_vidc_map_info output; - struct msm_vidc_map_info input_meta; - struct msm_vidc_map_info output_meta; - struct msm_vidc_map_info scratch; - struct msm_vidc_map_info scratch_1; - struct msm_vidc_map_info scratch_2; - struct msm_vidc_map_info persist; - struct msm_vidc_map_info persist_1; +struct msm_vidc_mappings_info { + struct msm_vidc_mappings input; + struct msm_vidc_mappings output; + struct msm_vidc_mappings input_meta; + struct msm_vidc_mappings output_meta; + struct msm_vidc_mappings scratch; + struct msm_vidc_mappings scratch_1; + struct msm_vidc_mappings scratch_2; + struct msm_vidc_mappings persist; + struct msm_vidc_mappings persist_1; }; -struct msm_vidc_buffers { - struct msm_vidc_buffer_info input; - struct msm_vidc_buffer_info output; - struct msm_vidc_buffer_info input_meta; - struct msm_vidc_buffer_info output_meta; - struct msm_vidc_buffer_info scratch; - struct msm_vidc_buffer_info scratch_1; - struct msm_vidc_buffer_info scratch_2; - struct msm_vidc_buffer_info persist; - struct msm_vidc_buffer_info persist_1; +struct msm_vidc_buffers_info { + struct msm_vidc_buffers input; + struct msm_vidc_buffers output; + struct msm_vidc_buffers input_meta; + struct msm_vidc_buffers output_meta; + struct msm_vidc_buffers scratch; + struct msm_vidc_buffers scratch_1; + struct msm_vidc_buffers scratch_2; + struct msm_vidc_buffers persist; + struct msm_vidc_buffers persist_1; }; enum msm_vidc_inst_state { @@ -96,9 +96,9 @@ struct msm_vidc_inst { struct msm_vidc_crop crop; struct msm_vidc_properties prop; struct msm_vidc_power power; - struct msm_vidc_buffers buffers; - struct msm_vidc_maps maps; - struct msm_vidc_allocations allocations; + struct msm_vidc_buffers_info buffers; + struct msm_vidc_mappings_info mappings; + struct msm_vidc_allocations_info allocations; bool subscribed_input_psc; bool subscribed_output_psc; bool subscribed_input_prop; diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 99ba18e6c4..7f1d27ca32 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -115,7 +115,7 @@ enum msm_vidc_buffer_type { }; enum msm_vidc_buffer_attributes { - MSM_VIDC_ATTR_DEFERRED_SUBMISSION = BIT(0), + MSM_VIDC_ATTR_DEFERRED = BIT(0), MSM_VIDC_ATTR_READ_ONLY = BIT(1), MSM_VIDC_ATTR_PENDING_RELEASE = BIT(2), MSM_VIDC_ATTR_QUEUED = BIT(3), @@ -487,7 +487,7 @@ struct msm_vidc_power { struct msm_vidc_alloc { struct list_head list; - enum msm_vidc_buffer_type buffer_type; + enum msm_vidc_buffer_type type; enum msm_vidc_buffer_region region; u32 size; u8 cached:1; @@ -497,14 +497,14 @@ struct msm_vidc_alloc { void *kvaddr; }; -struct msm_vidc_alloc_info { +struct msm_vidc_allocations { struct list_head list; // list of "struct msm_vidc_alloc" }; struct msm_vidc_map { struct list_head list; bool valid; - enum msm_vidc_buffer_type buffer_type; + enum msm_vidc_buffer_type type; enum msm_vidc_buffer_region region; struct dma_buf *dmabuf; u32 refcount; @@ -513,7 +513,7 @@ struct msm_vidc_map { struct dma_buf_attachment *attach; }; -struct msm_vidc_map_info { +struct msm_vidc_mappings { struct list_head list; // list of "struct msm_vidc_map" }; @@ -533,7 +533,7 @@ struct msm_vidc_buffer { enum msm_vidc_buffer_attributes attr; }; -struct msm_vidc_buffer_info { +struct msm_vidc_buffers { struct list_head list; // list of "struct msm_vidc_buffer" u32 min_count; u32 extra_count; diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index fe1083b9d7..412041348d 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -22,7 +22,7 @@ static int msm_vdec_codec_change(struct msm_vidc_inst *inst, u32 codec) d_vpr_h("%s()\n", __func__); - inst->codec = get_vidc_codec_from_v4l2(codec); + inst->codec = v4l2_codec_to_driver(codec); rc = msm_vidc_get_inst_capability(inst); return rc; } @@ -45,7 +45,6 @@ static int msm_vdec_get_input_internal_buffers(struct msm_vidc_inst *inst) int rc = 0; struct msm_vidc_core *core; - d_vpr_h("%s()\n", __func__); if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; @@ -66,6 +65,17 @@ static int msm_vdec_get_input_internal_buffers(struct msm_vidc_inst *inst) inst->buffers.persist_1.min_count = call_session_op(core, min_count, inst, MSM_VIDC_BUF_PERSIST_1); + s_vpr_h(inst->sid, "internal buffer: min size\n"); + s_vpr_h(inst->sid, "scratch buffer: %d %d\n", + inst->buffers.scratch.min_count, + inst->buffers.scratch.size); + s_vpr_h(inst->sid, "scratch1 buffer: %d %d\n", + inst->buffers.scratch_1.min_count, + inst->buffers.scratch_1.size); + s_vpr_h(inst->sid, "persist1 buffer: %d %d\n", + inst->buffers.persist_1.min_count, + inst->buffers.persist_1.size); + return rc; } @@ -298,8 +308,8 @@ int msm_vdec_start_input(struct msm_vidc_inst *inst) d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - d_vpr_h("%s()\n", __func__); core = inst->core; + s_vpr_h(inst->sid, "%s()\n", __func__); //rc = msm_vidc_check_session_supported(inst); if (rc) @@ -330,24 +340,30 @@ int msm_vdec_start_input(struct msm_vidc_inst *inst) //msm_vidc_scale_power(inst); rc = msm_vdec_set_input_properties(inst); + rc = 0; // TODO if (rc) goto error; rc = msm_vdec_create_input_internal_buffers(inst); + rc = 0; // TODO if (rc) goto error; rc = msm_vdec_queue_input_internal_buffers(inst); + rc = 0; // TODO if (rc) goto error; rc = msm_vdec_port_settings_subscription(inst, INPUT_PORT); + rc = 0; // TODO if (rc) goto error; rc = msm_vdec_property_subscription(inst, INPUT_PORT); + rc = 0; // TODO if (rc) goto error; rc = msm_vdec_metadata_delivery(inst, INPUT_PORT); + rc = 0; // TODO if (rc) goto error; @@ -355,14 +371,11 @@ int msm_vdec_start_input(struct msm_vidc_inst *inst) if (rc) goto error; - rc = msm_vidc_change_inst_state(inst, MSM_VIDC_START_INPUT, __func__); - if (rc) - goto error; - - d_vpr_h("%s: done\n", __func__); + s_vpr_h(inst->sid, "%s: done\n", __func__); return 0; error: + s_vpr_e(inst->sid, "%s: failed\n", __func__); msm_vdec_stop_input(inst); return rc; } @@ -410,6 +423,32 @@ error: return rc; } +static int msm_vdec_qbuf_batch(struct msm_vidc_inst *inst, + struct vb2_buffer *vb2) +{ + int rc = 0; + + if (!inst || !vb2) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + d_vpr_h("%s()\n", __func__); + + return rc; +} + +int msm_vdec_qbuf(struct msm_vidc_inst *inst, struct vb2_buffer *vb2) +{ + int rc = 0; + + if (inst->decode_batch.enable) + rc = msm_vdec_qbuf_batch(inst, vb2); + else + rc = msm_vidc_queue_buffer(inst, vb2); + + return rc; +} + int msm_vdec_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) { int rc = 0; @@ -515,10 +554,10 @@ int msm_vdec_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) fmt->type = OUTPUT_PLANE; fmt->fmt.pix.pixelformat = f->fmt.pix.pixelformat; fmt->fmt.pix.width = VENUS_Y_STRIDE( - get_media_colorformat_from_v4l2(fmt->fmt.pix.pixelformat), + v4l2_colorformat_to_media(fmt->fmt.pix.pixelformat), f->fmt.pix.width); fmt->fmt.pix.height = VENUS_Y_SCANLINES( - get_media_colorformat_from_v4l2(fmt->fmt.pix.pixelformat), + v4l2_colorformat_to_media(fmt->fmt.pix.pixelformat), f->fmt.pix.height); fmt->fmt.pix.bytesperline = fmt->fmt.pix.width; fmt->fmt.pix.sizeimage = call_session_op(core, buffer_size, @@ -588,7 +627,7 @@ int msm_vdec_g_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) return -EINVAL; } - port = msm_vidc_get_port_from_v4l2_type(inst, f->type, __func__); + port = v4l2_type_to_driver_port(inst, f->type, __func__); if (port < 0) return -EINVAL; @@ -623,7 +662,7 @@ int msm_vdec_enum_fmt(struct msm_vidc_inst *inst, struct v4l2_fmtdesc *f) i++; codecs >>= 1; } - f->pixelformat = get_v4l2_codec_from_vidc(array[f->index]); + f->pixelformat = v4l2_codec_from_driver(array[f->index]); if (!f->pixelformat) return -EINVAL; f->flags = V4L2_FMT_FLAG_COMPRESSED; @@ -641,7 +680,7 @@ int msm_vdec_enum_fmt(struct msm_vidc_inst *inst, struct v4l2_fmtdesc *f) i++; formats >>= 1; } - f->pixelformat = get_v4l2_colorformat_from_vidc(array[f->index]); + f->pixelformat = v4l2_colorformat_from_driver(array[f->index]); if (!f->pixelformat) return -EINVAL; strlcpy(f->description, "colorformat", sizeof(f->description)); @@ -710,9 +749,9 @@ int msm_vdec_inst_init(struct msm_vidc_inst *inst) f->type = OUTPUT_PLANE; f->fmt.pix.pixelformat = V4L2_PIX_FMT_NV12_UBWC; f->fmt.pix.width = VENUS_Y_STRIDE( - get_media_colorformat_from_v4l2(f->fmt.pix.pixelformat), DEFAULT_WIDTH); + v4l2_colorformat_to_media(f->fmt.pix.pixelformat), DEFAULT_WIDTH); f->fmt.pix.height = VENUS_Y_SCANLINES( - get_media_colorformat_from_v4l2(f->fmt.pix.pixelformat), DEFAULT_HEIGHT); + v4l2_colorformat_to_media(f->fmt.pix.pixelformat), DEFAULT_HEIGHT); f->fmt.pix.bytesperline = f->fmt.pix.width; f->fmt.pix.sizeimage = call_session_op(core, buffer_size, inst, MSM_VIDC_BUF_OUTPUT); diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index a6e5007138..e991e63b69 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -20,7 +20,7 @@ static int msm_venc_codec_change(struct msm_vidc_inst *inst, u32 codec) d_vpr_h("%s()\n", __func__); - inst->codec = get_vidc_codec_from_v4l2(codec); + inst->codec = v4l2_codec_to_driver(codec); rc = msm_vidc_get_inst_capability(inst); return rc; } @@ -52,10 +52,10 @@ int msm_venc_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) fmt->type = INPUT_PLANE; fmt->fmt.pix.pixelformat = f->fmt.pix.pixelformat; fmt->fmt.pix.width = VENUS_Y_STRIDE( - get_media_colorformat_from_v4l2(fmt->fmt.pix.pixelformat), + v4l2_colorformat_to_media(fmt->fmt.pix.pixelformat), f->fmt.pix.width); fmt->fmt.pix.height = VENUS_Y_SCANLINES( - get_media_colorformat_from_v4l2(fmt->fmt.pix.pixelformat), + v4l2_colorformat_to_media(fmt->fmt.pix.pixelformat), f->fmt.pix.height); fmt->fmt.pix.bytesperline = fmt->fmt.pix.width; fmt->fmt.pix.sizeimage = call_session_op(core, buffer_size, @@ -205,7 +205,7 @@ int msm_venc_g_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) return -EINVAL; } - port = msm_vidc_get_port_from_v4l2_type(inst, f->type, __func__); + port = v4l2_type_to_driver_port(inst, f->type, __func__); if (port < 0) return -EINVAL; @@ -240,7 +240,7 @@ int msm_venc_enum_fmt(struct msm_vidc_inst *inst, struct v4l2_fmtdesc *f) i++; codecs >>= 1; } - f->pixelformat = get_v4l2_codec_from_vidc(array[f->index]); + f->pixelformat = v4l2_codec_from_driver(array[f->index]); if (!f->pixelformat) return -EINVAL; f->flags = V4L2_FMT_FLAG_COMPRESSED; @@ -258,7 +258,7 @@ int msm_venc_enum_fmt(struct msm_vidc_inst *inst, struct v4l2_fmtdesc *f) i++; formats >>= 1; } - f->pixelformat = get_v4l2_colorformat_from_vidc(array[f->index]); + f->pixelformat = v4l2_colorformat_from_driver(array[f->index]); if (!f->pixelformat) return -EINVAL; strlcpy(f->description, "colorformat", sizeof(f->description)); @@ -325,9 +325,9 @@ int msm_venc_inst_init(struct msm_vidc_inst *inst) f->type = INPUT_PLANE; f->fmt.pix.pixelformat = V4L2_PIX_FMT_NV12_UBWC; f->fmt.pix.width = VENUS_Y_STRIDE( - get_media_colorformat_from_v4l2(f->fmt.pix.pixelformat), DEFAULT_WIDTH); + v4l2_colorformat_to_media(f->fmt.pix.pixelformat), DEFAULT_WIDTH); f->fmt.pix.height = VENUS_Y_SCANLINES( - get_media_colorformat_from_v4l2(f->fmt.pix.pixelformat), DEFAULT_HEIGHT); + v4l2_colorformat_to_media(f->fmt.pix.pixelformat), DEFAULT_HEIGHT); f->fmt.pix.bytesperline = f->fmt.pix.width; f->fmt.pix.sizeimage = call_session_op(core, buffer_size, inst, MSM_VIDC_BUF_INPUT); diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index 3c8f6630d9..2834b705ab 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -319,7 +319,8 @@ int msm_vidc_reqbufs(void *instance, struct v4l2_requestbuffers *b) s_vpr_e(inst->sid, "%s: reqbufs(%d) not allowed in %d state\n", __func__, b->type, inst->state); - return -EINVAL; + rc = -EINVAL; + goto unlock; } } else if (b->type == OUTPUT_PLANE) { if (inst->state != MSM_VIDC_OPEN && @@ -328,13 +329,16 @@ int msm_vidc_reqbufs(void *instance, struct v4l2_requestbuffers *b) s_vpr_e(inst->sid, "%s: reqbufs(%d) not allowed in %d state\n", __func__, b->type, inst->state); - return -EINVAL; + rc = -EINVAL; + goto unlock; } } - port = msm_vidc_get_port_from_v4l2_type(inst, b->type, __func__); - if (port < 0) - return -EINVAL; + port = v4l2_type_to_driver_port(inst, b->type, __func__); + if (port < 0) { + rc = -EINVAL; + goto unlock; + } rc = vb2_reqbufs(&inst->vb2q[port], b); if (rc) { @@ -352,13 +356,85 @@ EXPORT_SYMBOL(msm_vidc_reqbufs); int msm_vidc_qbuf(void *instance, struct media_device *mdev, struct v4l2_buffer *b) { - return 0; + int rc = 0; + struct msm_vidc_inst *inst = instance; + struct vb2_queue *q; + + if (!inst || !inst->core || !b || !valid_v4l2_buffer(b, inst)) { + d_vpr_e("%s: invalid params %pK %pK\n", __func__, inst, b); + return -EINVAL; + } + + mutex_lock(&inst->lock); + + if (inst->state == MSM_VIDC_ERROR) { + s_vpr_e(inst->sid, "%s: error state\n", __func__); + rc = -EINVAL; + goto unlock; + } + if (b->type == INPUT_PLANE) { + q = &inst->vb2q[INPUT_PORT]; + } else if (b->type == OUTPUT_PLANE) { + q = &inst->vb2q[OUTPUT_PORT]; + } else if (b->type == INPUT_META_PLANE) { + q = &inst->vb2q[INPUT_META_PORT]; + } else if (b->type == OUTPUT_META_PLANE) { + q = &inst->vb2q[OUTPUT_META_PORT]; + } else { + s_vpr_e(inst->sid, "%s: invalid buffer type %d\n", + __func__, b->type); + rc = -EINVAL; + goto unlock; + } + + rc = vb2_qbuf(q, mdev, b); + if (rc) + s_vpr_e(inst->sid, "%s: failed with %d\n", __func__, rc); + +unlock: + mutex_unlock(&inst->lock); + return rc; } EXPORT_SYMBOL(msm_vidc_qbuf); int msm_vidc_dqbuf(void *instance, struct v4l2_buffer *b) { - return 0; + int rc = 0; + struct msm_vidc_inst *inst = instance; + struct vb2_queue *q; + + if (!inst || !b || !valid_v4l2_buffer(b, inst)) { + d_vpr_e("%s: invalid params %pK %pK\n", __func__, inst, b); + return -EINVAL; + } + + mutex_lock(&inst->lock); + if (b->type == INPUT_PLANE) { + q = &inst->vb2q[INPUT_PORT]; + } else if (b->type == OUTPUT_PLANE) { + q = &inst->vb2q[OUTPUT_PORT]; + } else if (b->type == INPUT_META_PLANE) { + q = &inst->vb2q[INPUT_META_PORT]; + } else if (b->type == OUTPUT_META_PLANE) { + q = &inst->vb2q[OUTPUT_META_PORT]; + } else { + s_vpr_e(inst->sid, "%s: invalid buffer type %d\n", + __func__, b->type); + rc = -EINVAL; + goto unlock; + } + + rc = vb2_dqbuf(q, b, true); + if (rc == -EAGAIN) { + goto unlock; + } else if (rc) { + s_vpr_e(inst->sid, "%s: failed with %d\n", __func__, rc); + goto unlock; + } + +unlock: + mutex_unlock(&inst->lock); + return rc; } EXPORT_SYMBOL(msm_vidc_dqbuf); @@ -397,7 +473,7 @@ int msm_vidc_streamon(void *instance, enum v4l2_buf_type type) } } - port = msm_vidc_get_port_from_v4l2_type(inst, type, __func__); + port = v4l2_type_to_driver_port(inst, type, __func__); if (port < 0) { rc = -EINVAL; goto unlock; @@ -475,7 +551,7 @@ int msm_vidc_streamoff(void *instance, enum v4l2_buf_type type) } } - port = msm_vidc_get_port_from_v4l2_type(inst, type, __func__); + port = v4l2_type_to_driver_port(inst, type, __func__); if (port < 0) { rc = -EINVAL; goto unlock; @@ -676,6 +752,7 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) s_vpr_i(inst->sid, "Opening video instance: %d\n", session_type); kref_init(&inst->kref); + mutex_init(&inst->lock); INIT_LIST_HEAD(&inst->buffers.input.list); INIT_LIST_HEAD(&inst->buffers.input_meta.list); INIT_LIST_HEAD(&inst->buffers.output.list); @@ -690,15 +767,15 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) INIT_LIST_HEAD(&inst->allocations.scratch_2.list); INIT_LIST_HEAD(&inst->allocations.persist.list); INIT_LIST_HEAD(&inst->allocations.persist_1.list); - INIT_LIST_HEAD(&inst->maps.input.list); - INIT_LIST_HEAD(&inst->maps.input_meta.list); - INIT_LIST_HEAD(&inst->maps.output.list); - INIT_LIST_HEAD(&inst->maps.output_meta.list); - INIT_LIST_HEAD(&inst->maps.scratch.list); - INIT_LIST_HEAD(&inst->maps.scratch_1.list); - INIT_LIST_HEAD(&inst->maps.scratch_2.list); - INIT_LIST_HEAD(&inst->maps.persist.list); - INIT_LIST_HEAD(&inst->maps.persist_1.list); + INIT_LIST_HEAD(&inst->mappings.input.list); + INIT_LIST_HEAD(&inst->mappings.input_meta.list); + INIT_LIST_HEAD(&inst->mappings.output.list); + INIT_LIST_HEAD(&inst->mappings.output_meta.list); + INIT_LIST_HEAD(&inst->mappings.scratch.list); + INIT_LIST_HEAD(&inst->mappings.scratch_1.list); + INIT_LIST_HEAD(&inst->mappings.scratch_2.list); + INIT_LIST_HEAD(&inst->mappings.persist.list); + INIT_LIST_HEAD(&inst->mappings.persist_1.list); INIT_LIST_HEAD(&inst->children.list); INIT_LIST_HEAD(&inst->firmware.list); inst->domain = session_type; diff --git a/driver/vidc/src/msm_vidc_buffer.c b/driver/vidc/src/msm_vidc_buffer.c index 7b31c89e9b..f95850c6a1 100644 --- a/driver/vidc/src/msm_vidc_buffer.c +++ b/driver/vidc/src/msm_vidc_buffer.c @@ -139,18 +139,23 @@ u32 msm_vidc_output_extra_count(struct msm_vidc_inst *inst) u32 msm_vidc_decoder_input_size(struct msm_vidc_inst *inst) { - return ALIGN(15 * 1024 * 1024, SZ_4K); + u32 size = ALIGN(15 * 1024 * 1024, SZ_4K); + size = 4; // TODO + return size; } u32 msm_vidc_decoder_output_size(struct msm_vidc_inst *inst) { + u32 size; u32 format; struct v4l2_format *f; f = &inst->fmts[OUTPUT_PORT]; - format = get_media_colorformat_from_v4l2(f->fmt.pix.pixelformat); - return VENUS_BUFFER_SIZE(format, f->fmt.pix.width, + format = v4l2_colorformat_to_media(f->fmt.pix.pixelformat); + size = VENUS_BUFFER_SIZE(format, f->fmt.pix.width, f->fmt.pix.height); + size = 4; // TODO + return size; } u32 msm_vidc_decoder_input_meta_size(struct msm_vidc_inst *inst) @@ -165,18 +170,23 @@ u32 msm_vidc_decoder_output_meta_size(struct msm_vidc_inst *inst) u32 msm_vidc_encoder_input_size(struct msm_vidc_inst *inst) { + u32 size; u32 format; struct v4l2_format *f; f = &inst->fmts[INPUT_PORT]; - format = get_media_colorformat_from_v4l2(f->fmt.pix.pixelformat); - return VENUS_BUFFER_SIZE(format, f->fmt.pix.width, + format = v4l2_colorformat_to_media(f->fmt.pix.pixelformat); + size = VENUS_BUFFER_SIZE(format, f->fmt.pix.width, f->fmt.pix.height); + size = 4; // TODO + return size; } u32 msm_vidc_encoder_output_size(struct msm_vidc_inst *inst) { - return ALIGN(15 * 1024 * 1024, SZ_4K); + u32 size = ALIGN(15 * 1024 * 1024, SZ_4K); + size = 4; // TODO + return size; } u32 msm_vidc_encoder_input_meta_size(struct msm_vidc_inst *inst) diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 3fa29e550b..df3ccdaf03 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -273,7 +273,7 @@ int msm_vidc_ctrl_init(struct msm_vidc_inst *inst) core = inst->core; capability = inst->capabilities; - if (core->v4l2_ctrl_ops) { + if (!core->v4l2_ctrl_ops) { s_vpr_e(inst->sid, "%s: no control ops\n", __func__); return -EINVAL; } @@ -300,11 +300,6 @@ int msm_vidc_ctrl_init(struct msm_vidc_inst *inst) return rc; } - if (!core->v4l2_ctrl_ops) { - s_vpr_e(inst->sid, "%s: no control ops\n", __func__); - return -EINVAL; - } - for (idx = 0; idx < INST_CAP_MAX; idx++) { struct v4l2_ctrl *ctrl; diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index e58804b805..bea74766f7 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -23,11 +23,97 @@ } \ }) -void print_vidc_buffer(struct msm_vidc_inst *inst, struct msm_vidc_buffer *b) +void print_vidc_buffer(u32 tag, const char *str, struct msm_vidc_inst *inst, + struct msm_vidc_buffer *vbuf) { + struct msm_vidc_buffer *mbuf; + + if (!(tag & msm_vidc_debug) || !inst || !vbuf) + return; + + mbuf = get_meta_buffer(inst, vbuf); + if (!mbuf) + dprintk(tag, inst->sid, + "%s: %s: idx %2d fd %3d off %d daddr %#x size %d filled %d flags %#x ts %lld attr %#x\n", + str, vbuf->type == MSM_VIDC_BUF_INPUT ? "INPUT" : "OUTPUT", + vbuf->index, vbuf->fd, vbuf->data_offset, + vbuf->device_addr, vbuf->buffer_size, vbuf->data_size, + vbuf->flags, vbuf->timestamp, vbuf->attr); + else + dprintk(tag, inst->sid, + "%s: %s: idx %2d fd %3d off %d daddr %#x size %d filled %d flags %#x ts %lld attr %#x meta: fd %3d daddr %#x size %d\n", + str, vbuf->type == MSM_VIDC_BUF_INPUT ? "INPUT" : "OUTPUT", + vbuf->index, vbuf->fd, vbuf->data_offset, + vbuf->device_addr, vbuf->buffer_size, vbuf->data_size, + vbuf->flags, vbuf->timestamp, vbuf->attr, + mbuf->fd, mbuf->device_addr, mbuf->buffer_size); } -enum msm_vidc_codec_type get_vidc_codec_from_v4l2(u32 v4l2_codec) +void print_vb2_buffer(const char *str, struct msm_vidc_inst *inst, + struct vb2_buffer *vb2) +{ + if (!inst || !vb2) + return; + + s_vpr_e(inst->sid, + "%s: %s: idx %2d fd %d off %d size %d filled %d\n", + str, vb2->type == INPUT_PLANE ? "INPUT" : "OUTPUT", + vb2->index, vb2->planes[0].m.fd, + vb2->planes[0].data_offset, vb2->planes[0].length, + vb2->planes[0].bytesused); +} + +enum msm_vidc_buffer_type v4l2_type_to_driver(u32 type) +{ + enum msm_vidc_buffer_type buffer_type = 0; + + switch (type) { + case INPUT_PLANE: + buffer_type = MSM_VIDC_BUF_INPUT; + break; + case OUTPUT_PLANE: + buffer_type = MSM_VIDC_BUF_OUTPUT; + break; + case INPUT_META_PLANE: + buffer_type = MSM_VIDC_BUF_INPUT_META; + break; + case OUTPUT_META_PLANE: + buffer_type = MSM_VIDC_BUF_OUTPUT_META; + break; + default: + d_vpr_e("%s: vidc buffer type not found for %#x\n", + __func__, type); + break; + } + return buffer_type; +} + +u32 v4l2_type_from_driver(enum msm_vidc_buffer_type buffer_type) +{ + u32 type = 0; + + switch (buffer_type) { + case MSM_VIDC_BUF_INPUT: + type = INPUT_PLANE; + break; + case MSM_VIDC_BUF_OUTPUT: + type = OUTPUT_PLANE; + break; + case MSM_VIDC_BUF_INPUT_META: + type = INPUT_META_PLANE; + break; + case MSM_VIDC_BUF_OUTPUT_META: + type = OUTPUT_META_PLANE; + break; + default: + d_vpr_e("%s: v4l2 type not found for %#x\n", + __func__, buffer_type); + break; + } + return buffer_type; +} + +enum msm_vidc_codec_type v4l2_codec_to_driver(u32 v4l2_codec) { enum msm_vidc_codec_type codec = 0; @@ -51,7 +137,7 @@ enum msm_vidc_codec_type get_vidc_codec_from_v4l2(u32 v4l2_codec) return codec; } -u32 get_v4l2_codec_from_vidc(enum msm_vidc_codec_type codec) +u32 v4l2_codec_from_driver(enum msm_vidc_codec_type codec) { u32 v4l2_codec = 0; @@ -75,7 +161,7 @@ u32 get_v4l2_codec_from_vidc(enum msm_vidc_codec_type codec) return v4l2_codec; } -enum msm_vidc_colorformat_type get_vidc_colorformat_from_v4l2(u32 v4l2_colorformat) +enum msm_vidc_colorformat_type v4l2_colorformat_to_driver(u32 v4l2_colorformat) { enum msm_vidc_colorformat_type colorformat = 0; @@ -108,7 +194,7 @@ enum msm_vidc_colorformat_type get_vidc_colorformat_from_v4l2(u32 v4l2_colorform return colorformat; } -u32 get_v4l2_colorformat_from_vidc(enum msm_vidc_colorformat_type colorformat) +u32 v4l2_colorformat_from_driver(enum msm_vidc_colorformat_type colorformat) { u32 v4l2_colorformat = 0; @@ -141,7 +227,7 @@ u32 get_v4l2_colorformat_from_vidc(enum msm_vidc_colorformat_type colorformat) return v4l2_colorformat; } -u32 get_media_colorformat_from_v4l2(u32 v4l2_fmt) +u32 v4l2_colorformat_to_media(u32 v4l2_fmt) { switch (v4l2_fmt) { case V4L2_PIX_FMT_NV12: @@ -166,7 +252,7 @@ u32 get_media_colorformat_from_v4l2(u32 v4l2_fmt) } } -int msm_vidc_get_port_from_v4l2_type(struct msm_vidc_inst *inst, u32 type, +int v4l2_type_to_driver_port(struct msm_vidc_inst *inst, u32 type, const char *func) { int port; @@ -237,8 +323,9 @@ u32 msm_vidc_get_buffer_region(struct msm_vidc_inst *inst, return region; } -struct msm_vidc_buffer_info *msm_vidc_get_buffer_info(struct msm_vidc_inst *inst, - enum msm_vidc_buffer_type buffer_type, const char *func) +struct msm_vidc_buffers *msm_vidc_get_buffers( + struct msm_vidc_inst *inst, enum msm_vidc_buffer_type buffer_type, + const char *func) { switch (buffer_type) { case MSM_VIDC_BUF_INPUT: @@ -261,42 +348,44 @@ struct msm_vidc_buffer_info *msm_vidc_get_buffer_info(struct msm_vidc_inst *inst return &inst->buffers.persist_1; default: s_vpr_e(inst->sid, "%s: invalid buffer type %d\n", - __func__, buffer_type); + func, buffer_type); return NULL; } } -struct msm_vidc_map_info *msm_vidc_get_map_info(struct msm_vidc_inst *inst, - enum msm_vidc_buffer_type buffer_type, const char *func) +struct msm_vidc_mappings *msm_vidc_get_mappings( + struct msm_vidc_inst *inst, enum msm_vidc_buffer_type buffer_type, + const char *func) { switch (buffer_type) { case MSM_VIDC_BUF_INPUT: - return &inst->maps.input; + return &inst->mappings.input; case MSM_VIDC_BUF_INPUT_META: - return &inst->maps.input_meta; + return &inst->mappings.input_meta; case MSM_VIDC_BUF_OUTPUT: - return &inst->maps.output; + return &inst->mappings.output; case MSM_VIDC_BUF_OUTPUT_META: - return &inst->maps.output_meta; + return &inst->mappings.output_meta; case MSM_VIDC_BUF_SCRATCH: - return &inst->maps.scratch; + return &inst->mappings.scratch; case MSM_VIDC_BUF_SCRATCH_1: - return &inst->maps.scratch_1; + return &inst->mappings.scratch_1; case MSM_VIDC_BUF_SCRATCH_2: - return &inst->maps.scratch_2; + return &inst->mappings.scratch_2; case MSM_VIDC_BUF_PERSIST: - return &inst->maps.persist; + return &inst->mappings.persist; case MSM_VIDC_BUF_PERSIST_1: - return &inst->maps.persist_1; + return &inst->mappings.persist_1; default: s_vpr_e(inst->sid, "%s: invalid buffer type %d\n", - __func__, buffer_type); + func, buffer_type); return NULL; } } -struct msm_vidc_alloc_info *msm_vidc_get_alloc_info(struct msm_vidc_inst *inst, - enum msm_vidc_buffer_type buffer_type, const char *func) +struct msm_vidc_allocations *msm_vidc_get_allocations( + struct msm_vidc_inst *inst, enum msm_vidc_buffer_type buffer_type, + const char *func) { switch (buffer_type) { case MSM_VIDC_BUF_SCRATCH: @@ -311,7 +400,7 @@ struct msm_vidc_alloc_info *msm_vidc_get_alloc_info(struct msm_vidc_inst *inst, return &inst->allocations.persist_1; default: s_vpr_e(inst->sid, "%s: invalid buffer type %d\n", - __func__, buffer_type); + func, buffer_type); return NULL; } } @@ -368,13 +457,314 @@ int msm_vidc_get_control(struct msm_vidc_inst *inst, struct v4l2_ctrl *ctrl) return rc; } +static int vb2_buffer_to_driver(struct vb2_buffer *vb2, struct msm_vidc_buffer *buf) +{ + int rc = 0; + + if (!vb2 || !buf) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + buf->valid = true; + buf->type = v4l2_type_to_driver(vb2->type); + if (!buf->type) + return -EINVAL; + buf->index = vb2->index; + buf->fd = vb2->planes[0].m.fd; + buf->data_offset = vb2->planes[0].data_offset; + buf->data_size = vb2->planes[0].bytesused; + buf->buffer_size = vb2->planes[0].length; + buf->timestamp = vb2->timestamp; + + return rc; +} + +int msm_vidc_unmap_driver_buf(struct msm_vidc_inst *inst, + struct msm_vidc_buffer *buf) +{ + int rc = 0; + struct msm_vidc_mappings *mappings; + struct msm_vidc_map *map = NULL; + bool found = false; + + if (!inst || !buf) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + mappings = msm_vidc_get_mappings(inst, buf->type, __func__); + if (!mappings) + return -EINVAL; + + /* sanity check to see if it was not removed */ + list_for_each_entry(map, &mappings->list, list) { + if (map->dmabuf == buf->dmabuf) { + found = true; + break; + } + } + if (!found) { + print_vidc_buffer(VIDC_ERR, "no buf in mappings", inst, buf); + return -EINVAL; + } + + rc = msm_vidc_memory_unmap(inst->core, map); + if (rc) { + print_vidc_buffer(VIDC_ERR, "unmap failed", inst, buf); + return -EINVAL; + } + + /* finally delete if refcount is zero */ + if (!map->refcount) { + list_del(&map->list); + kfree(map); + } + + return 0; +} + +int msm_vidc_put_driver_buf(struct msm_vidc_inst *inst, + struct msm_vidc_buffer *buf) +{ + int rc = 0; + + if (!inst || !buf) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + /* do not unmap / delete read only buffer */ + if (buf->attr & MSM_VIDC_ATTR_READ_ONLY) + return 0; + + rc = msm_vidc_unmap_driver_buf(inst, buf); + if (rc) + return rc; + + /* delete the buffer from buffers->list */ + list_del(&buf->list); + kfree(buf); + + return 0; +} + +int msm_vidc_map_driver_buf(struct msm_vidc_inst *inst, + struct msm_vidc_buffer *buf) +{ + int rc = 0; + struct msm_vidc_mappings *mappings; + struct msm_vidc_map *map = NULL; + bool found = false; + + if (!inst || !buf) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + mappings = msm_vidc_get_mappings(inst, buf->type, __func__); + if (!mappings) + return -EINVAL; + + /* check if it is an existing one */ + list_for_each_entry(map, &mappings->list, list) { + if (map->dmabuf == buf->dmabuf) { + found = true; + break; + } + } + if (found) { + /* skip mapping for RO buffer */ + if (!(buf->attr & MSM_VIDC_ATTR_READ_ONLY)) { + rc = msm_vidc_memory_map(inst->core, map); + if (rc) + return -ENOMEM; + buf->device_addr = map->device_addr; + } + return 0; + } + map = kzalloc(sizeof(struct msm_vidc_map), GFP_KERNEL); + if (!map) { + s_vpr_e(inst->sid, "%s: alloc failed\n", __func__); + return -ENOMEM; + } + INIT_LIST_HEAD(&map->list); + map->type = buf->type; + map->dmabuf = buf->dmabuf; + map->region = msm_vidc_get_buffer_region(inst, buf->type, __func__); + rc = msm_vidc_memory_map(inst->core, map); + if (rc) { + kfree(map); + return -ENOMEM; + } + buf->device_addr = map->device_addr; + list_add_tail(&map->list, &mappings->list); + + return 0; +} + +struct msm_vidc_buffer *msm_vidc_get_driver_buf(struct msm_vidc_inst *inst, + struct vb2_buffer *vb2) +{ + int rc = 0; + struct msm_vidc_buffer *buf = NULL; + struct msm_vidc_buffers *buffers; + struct dma_buf *dmabuf; + enum msm_vidc_buffer_type buf_type; + bool found = false; + + if (!inst || !vb2) { + d_vpr_e("%s: invalid params\n", __func__); + return NULL; + } + + buf_type = v4l2_type_to_driver(vb2->type); + if (!buf_type) + return NULL; + + buffers = msm_vidc_get_buffers(inst, buf_type, __func__); + if (!buffers) + return NULL; + + dmabuf = msm_vidc_memory_get_dmabuf(vb2->planes[0].m.fd); + if (!dmabuf) + return NULL; + msm_vidc_memory_put_dmabuf(dmabuf); + + /* check if it is an existing buffer */ + list_for_each_entry(buf, &buffers->list, list) { + if (buf->dmabuf == dmabuf && + buf->data_offset == vb2->planes[0].data_offset) { + found = true; + break; + } + } + if (found) { + /* only YUV buffers are allowed to repeat */ + if ((is_decode_session(inst) && vb2->type != OUTPUT_PLANE) || + (is_encode_session(inst) && vb2->type != INPUT_PLANE)) { + print_vidc_buffer(VIDC_ERR, + "existing buffer", inst, buf); + goto error; + } + /* for decoder, YUV with RO flag are allowed to repeat */ + if (is_decode_session(inst) && + !(buf->attr & MSM_VIDC_ATTR_READ_ONLY)) { + print_vidc_buffer(VIDC_ERR, + "existing buffer without RO flag", inst, buf); + goto error; + } + /* for encoder, treat the repeated buffer as new buffer */ + if (is_encode_session(inst) && vb2->type == INPUT_PLANE) + found = false; + } else { + buf = kzalloc(sizeof(struct msm_vidc_buffer), GFP_KERNEL); + if (!buf) { + s_vpr_e(inst->sid, "%s: alloc failed\n", __func__); + goto error; + } + buf->dmabuf = dmabuf; + } + rc = vb2_buffer_to_driver(vb2, buf); + if (rc) + goto error; + + if (!found) + list_add_tail(&buf->list, &buffers->list); + + rc = msm_vidc_map_driver_buf(inst, buf); + if (rc) + goto error; + + return buf; + +error: + if (!found) + kfree(buf); + return NULL; +} + +struct msm_vidc_buffer *get_meta_buffer(struct msm_vidc_inst *inst, + struct msm_vidc_buffer *buf) +{ + struct msm_vidc_buffer *mbuf; + struct msm_vidc_buffers *meta; + bool found = false; + + if (!inst || !buf) { + d_vpr_e("%s: invalid params\n", __func__); + return NULL; + } + + if (buf->type == MSM_VIDC_BUF_INPUT) { + meta = &inst->buffers.input_meta; + } else if (buf->type == MSM_VIDC_BUF_OUTPUT) { + meta = &inst->buffers.output_meta; + } else { + s_vpr_e(inst->sid, "%s: invalid buffer type %d\n", + __func__, buf->type); + return NULL; + } + list_for_each_entry(mbuf, &meta->list, list) { + if (!mbuf->valid) + continue; + if (mbuf->type == buf->type && + mbuf->index == buf->index) { + found = true; + break; + } + } + if (!found) + return NULL; + + return mbuf; +} + +int msm_vidc_queue_buffer(struct msm_vidc_inst *inst, struct vb2_buffer *vb2) +{ + int rc = 0; + struct msm_vidc_buffer *buf; + int port; + + if (!inst || !vb2) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + buf = msm_vidc_get_driver_buf(inst, vb2); + if (!buf) + return -EINVAL; + + /* meta buffer will be queued along with actual buffer */ + if (buf->type == MSM_VIDC_BUF_INPUT_META || + buf->type == MSM_VIDC_BUF_OUTPUT_META) + return 0; + + /* skip queuing if streamon not completed */ + port = v4l2_type_to_driver_port(inst, vb2->type, __func__); + if (port < 0) + return -EINVAL; + if (!inst->vb2q[port].streaming) { + buf->attr |= MSM_VIDC_ATTR_DEFERRED; + print_vidc_buffer(VIDC_HIGH, "qbuf deferred", inst, buf); + return 0; + } + + print_vidc_buffer(VIDC_HIGH, "qbuf", inst, buf); + rc = venus_hfi_queue_buffer(inst, buf, get_meta_buffer(inst, buf)); + if (rc) + return rc; + + return rc; +} + int msm_vidc_create_internal_buffers(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type buffer_type) { int rc = 0; - struct msm_vidc_buffer_info *buffer_info; - struct msm_vidc_alloc_info *alloc_info; - struct msm_vidc_map_info *map_info; + struct msm_vidc_buffers *buffers; + struct msm_vidc_allocations *allocations; + struct msm_vidc_mappings *mappings; int i; d_vpr_h("%s()\n", __func__); @@ -388,22 +778,22 @@ int msm_vidc_create_internal_buffers(struct msm_vidc_inst *inst, return 0; } - buffer_info = msm_vidc_get_buffer_info(inst, buffer_type, __func__); - if (!buffer_info) + buffers = msm_vidc_get_buffers(inst, buffer_type, __func__); + if (!buffers) return -EINVAL; - alloc_info = msm_vidc_get_alloc_info(inst, buffer_type, __func__); - if (!alloc_info) + allocations = msm_vidc_get_allocations(inst, buffer_type, __func__); + if (!allocations) return -EINVAL; - map_info = msm_vidc_get_map_info(inst, buffer_type, __func__); - if (!alloc_info) + mappings = msm_vidc_get_mappings(inst, buffer_type, __func__); + if (!mappings) return -EINVAL; - for (i = 0; i < buffer_info->min_count; i++) { + for (i = 0; i < buffers->min_count; i++) { struct msm_vidc_buffer *buffer; struct msm_vidc_alloc *alloc; struct msm_vidc_map *map; - if (!buffer_info->size) { + if (!buffers->size) { s_vpr_e(inst->sid, "%s: invalid buffer %#x\n", __func__, buffer_type); return -EINVAL; @@ -417,8 +807,8 @@ int msm_vidc_create_internal_buffers(struct msm_vidc_inst *inst, buffer->valid = true; buffer->type = buffer_type; buffer->index = i; - buffer->buffer_size = buffer_info->size; - list_add_tail(&buffer->list, &buffer_info->list); + buffer->buffer_size = buffers->size; + list_add_tail(&buffer->list, &buffers->list); alloc = kzalloc(sizeof(struct msm_vidc_alloc), GFP_KERNEL); if (!alloc) { @@ -426,14 +816,14 @@ int msm_vidc_create_internal_buffers(struct msm_vidc_inst *inst, return -ENOMEM; } INIT_LIST_HEAD(&alloc->list); - alloc->buffer_type = buffer_type; - alloc->region = msm_vidc_get_buffer_region(inst, + alloc->type = buffer_type; + alloc->region = msm_vidc_get_buffer_region(inst, buffer_type, __func__); - alloc->size = buffer->buffer_size; + alloc->size = buffer->buffer_size; rc = msm_vidc_memory_alloc(inst->core, alloc); if (rc) return -ENOMEM; - list_add_tail(&alloc->list, &alloc_info->list); + list_add_tail(&alloc->list, &allocations->list); map = kzalloc(sizeof(struct msm_vidc_map), GFP_KERNEL); if (!map) { @@ -441,16 +831,16 @@ int msm_vidc_create_internal_buffers(struct msm_vidc_inst *inst, return -ENOMEM; } INIT_LIST_HEAD(&map->list); - map->buffer_type = alloc->buffer_type; - map->region = alloc->region; - map->dmabuf = alloc->dmabuf; + map->type = alloc->type; + map->region = alloc->region; + map->dmabuf = alloc->dmabuf; rc = msm_vidc_memory_map(inst->core, map); if (rc) return -ENOMEM; - list_add_tail(&map->list, &map_info->list); + list_add_tail(&map->list, &mappings->list); s_vpr_e(inst->sid, "%s: created buffer_type %#x, size %d\n", - __func__, buffer_type, buffer_info->size); + __func__, buffer_type, buffers->size); } return 0; @@ -460,7 +850,7 @@ int msm_vidc_queue_internal_buffers(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type buffer_type) { int rc = 0; - struct msm_vidc_buffer_info *buffer_info; + struct msm_vidc_buffers *buffers; struct msm_vidc_buffer *buffer, *dummy; d_vpr_h("%s()\n", __func__); @@ -474,11 +864,11 @@ int msm_vidc_queue_internal_buffers(struct msm_vidc_inst *inst, return 0; } - buffer_info = msm_vidc_get_buffer_info(inst, buffer_type, __func__); - if (!buffer_info) + buffers = msm_vidc_get_buffers(inst, buffer_type, __func__); + if (!buffers) return -EINVAL; - list_for_each_entry_safe(buffer, dummy, &buffer_info->list, list) { + list_for_each_entry_safe(buffer, dummy, &buffers->list, list) { /* do not queue pending release buffers */ if (buffer->flags & MSM_VIDC_ATTR_PENDING_RELEASE) continue; @@ -492,7 +882,7 @@ int msm_vidc_queue_internal_buffers(struct msm_vidc_inst *inst, buffer->attr |= MSM_VIDC_ATTR_QUEUED; s_vpr_h(inst->sid, "%s: queued buffer_type %#x, size %d\n", - __func__, buffer_type, buffer_info->size); + __func__, buffer_type, buffers->size); } return 0; @@ -502,7 +892,7 @@ int msm_vidc_release_internal_buffers(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type buffer_type) { int rc = 0; - struct msm_vidc_buffer_info *buffer_info; + struct msm_vidc_buffers *buffers; struct msm_vidc_buffer *buffer, *dummy; d_vpr_h("%s()\n", __func__); @@ -516,11 +906,11 @@ int msm_vidc_release_internal_buffers(struct msm_vidc_inst *inst, return 0; } - buffer_info = msm_vidc_get_buffer_info(inst, buffer_type, __func__); - if (!buffer_info) + buffers = msm_vidc_get_buffers(inst, buffer_type, __func__); + if (!buffers) return -EINVAL; - list_for_each_entry_safe(buffer, dummy, &buffer_info->list, list) { + list_for_each_entry_safe(buffer, dummy, &buffers->list, list) { /* do not release already pending release buffers */ if (buffer->attr & MSM_VIDC_ATTR_PENDING_RELEASE) continue; @@ -534,7 +924,7 @@ int msm_vidc_release_internal_buffers(struct msm_vidc_inst *inst, buffer->attr |= MSM_VIDC_ATTR_PENDING_RELEASE; s_vpr_e(inst->sid, "%s: released buffer_type %#x, size %d\n", - __func__, buffer_type, buffer_info->size); + __func__, buffer_type, buffers->size); } return 0; @@ -918,13 +1308,16 @@ int msm_vidc_core_init(struct msm_vidc_core *core) mutex_unlock(&core->lock); /*TODO: acquire lock or not */ + d_vpr_h("%s(): waiting for sys init done, %d ms\n", __func__, + core->platform->data.core_data[HW_RESPONSE_TIMEOUT].value); rc = wait_for_completion_timeout(&core->init_done, msecs_to_jiffies( - core->platform->data.core_data[DEBUG_TIMEOUT].value)); + core->platform->data.core_data[HW_RESPONSE_TIMEOUT].value)); if (!rc) { d_vpr_e("%s: system init timed out\n", __func__); //msm_comm_kill_session(inst); - rc = -EIO; + //rc = -EIO; } else { + d_vpr_h("%s: system init wait completed\n", __func__); rc = 0; } mutex_lock(&core->lock); diff --git a/driver/vidc/src/msm_vidc_memory.c b/driver/vidc/src/msm_vidc_memory.c index 59f63f9fc0..5c95f0d598 100644 --- a/driver/vidc/src/msm_vidc_memory.c +++ b/driver/vidc/src/msm_vidc_memory.c @@ -248,8 +248,7 @@ int msm_vidc_memory_alloc(struct msm_vidc_core *core, struct msm_vidc_alloc *mem d_vpr_h( "%s: dmabuf = %pK, size = %d, kvaddr = %pK, buffer_type = %#x\n", - __func__, mem->dmabuf, mem->size, - mem->kvaddr, mem->buffer_type); + __func__, mem->dmabuf, mem->size, mem->kvaddr, mem->type); return 0; error: @@ -268,8 +267,7 @@ int msm_vidc_memory_free(struct msm_vidc_core *core, struct msm_vidc_alloc *mem) d_vpr_h( "%s: dmabuf = %pK, size = %d, kvaddr = %pK, buffer_type = %#x\n", - __func__, mem->dmabuf, mem->size, - mem->kvaddr, mem->buffer_type); + __func__, mem->dmabuf, mem->size, mem->kvaddr, mem->type); if (mem->kvaddr) { dma_buf_vunmap(mem->dmabuf, mem->kvaddr); diff --git a/driver/vidc/src/msm_vidc_platform.c b/driver/vidc/src/msm_vidc_platform.c index 3492e601f2..9c2955cab4 100644 --- a/driver/vidc/src/msm_vidc_platform.c +++ b/driver/vidc/src/msm_vidc_platform.c @@ -29,8 +29,12 @@ static struct v4l2_ioctl_ops msm_v4l2_ioctl_ops = { .vidioc_enum_framesizes = msm_v4l2_enum_framesizes, .vidioc_s_fmt_vid_cap = msm_v4l2_s_fmt, .vidioc_s_fmt_vid_out = msm_v4l2_s_fmt, + .vidioc_s_fmt_meta_out = msm_v4l2_s_fmt, + .vidioc_s_fmt_meta_cap = msm_v4l2_s_fmt, .vidioc_g_fmt_vid_cap = msm_v4l2_g_fmt, .vidioc_g_fmt_vid_out = msm_v4l2_g_fmt, + .vidioc_g_fmt_meta_out = msm_v4l2_g_fmt, + .vidioc_g_fmt_meta_cap = msm_v4l2_g_fmt, .vidioc_reqbufs = msm_v4l2_reqbufs, .vidioc_qbuf = msm_v4l2_qbuf, .vidioc_dqbuf = msm_v4l2_dqbuf, diff --git a/driver/vidc/src/msm_vidc_vb2.c b/driver/vidc/src/msm_vidc_vb2.c index 055e0c4777..3830346d80 100644 --- a/driver/vidc/src/msm_vidc_vb2.c +++ b/driver/vidc/src/msm_vidc_vb2.c @@ -46,7 +46,7 @@ int msm_vidc_queue_setup(struct vb2_queue *q, return -EINVAL; } - port = msm_vidc_get_port_from_v4l2_type(inst, q->type, __func__); + port = v4l2_type_to_driver_port(inst, q->type, __func__); if (port < 0) return -EINVAL; @@ -69,8 +69,11 @@ int msm_vidc_queue_setup(struct vb2_queue *q, inst->buffers.input.extra_count) *num_buffers = inst->buffers.input.min_count + inst->buffers.input.extra_count; - sizes[0] = inst->fmts[port].fmt.pix.sizeimage; inst->buffers.input.actual_count = *num_buffers; + if (port == INPUT_PORT || port == OUTPUT_PORT) + sizes[0] = inst->fmts[port].fmt.pix.sizeimage; + else if (port == INPUT_META_PORT || port == OUTPUT_META_PORT) + sizes[0] = inst->fmts[port].fmt.meta.buffersize; s_vpr_h(inst->sid, "queue_setup: type %d num_buffers %d sizes[0] %d\n", @@ -151,8 +154,29 @@ void msm_vidc_stop_streaming(struct vb2_queue *q) void msm_vidc_buf_queue(struct vb2_buffer *vb2) { + int rc = 0; + struct msm_vidc_inst *inst; + + inst = vb2_get_drv_priv(vb2->vb2_queue); + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return; + } + + if (is_decode_session(inst)) + rc = msm_vdec_qbuf(inst, vb2); + else if (is_encode_session(inst)) + rc = msm_vdec_qbuf(inst, vb2); + else + rc = -EINVAL; + + if (rc) { + print_vb2_buffer("failed vb2-qbuf", inst, vb2); + msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); + vb2_buffer_done(vb2, VB2_BUF_STATE_ERROR); + } } void msm_vidc_buf_cleanup(struct vb2_buffer *vb) { -} \ No newline at end of file +} diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index 8e01bbc3e0..5a62ef2c41 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -144,7 +144,7 @@ static void __dump_packet(u8 *packet) static void __fatal_error(struct msm_vidc_core *core, bool fatal) { return; - fatal &= core->platform->data.core_data[DEBUG_TIMEOUT].value; + fatal &= core->platform->data.core_data[HW_RESPONSE_TIMEOUT].value; MSM_VIDC_ERROR(fatal); } @@ -2082,7 +2082,7 @@ static int __interface_queues_init(struct msm_vidc_core *core) q_size = SHARED_QSIZE - ALIGNED_SFR_SIZE - ALIGNED_QDSS_SIZE; memset(&alloc, 0, sizeof(alloc)); - alloc.buffer_type = MSM_VIDC_BUF_QUEUE; + alloc.type = MSM_VIDC_BUF_QUEUE; alloc.region = MSM_VIDC_NON_SECURE; alloc.size = q_size; alloc.cached = false; @@ -2095,7 +2095,7 @@ static int __interface_queues_init(struct msm_vidc_core *core) } memset(&map, 0, sizeof(map)); - map.buffer_type = alloc.buffer_type; + map.type = alloc.type; map.region = alloc.region; map.dmabuf = alloc.dmabuf; rc = msm_vidc_memory_map(core, &map); @@ -2155,7 +2155,7 @@ static int __interface_queues_init(struct msm_vidc_core *core) /* sfr buffer */ memset(&alloc, 0, sizeof(alloc)); - alloc.buffer_type = MSM_VIDC_BUF_QUEUE; + alloc.type = MSM_VIDC_BUF_QUEUE; alloc.region = MSM_VIDC_NON_SECURE; alloc.size = ALIGNED_SFR_SIZE; alloc.cached = false; @@ -2167,7 +2167,7 @@ static int __interface_queues_init(struct msm_vidc_core *core) goto fail_alloc_queue; } memset(&map, 0, sizeof(map)); - map.buffer_type = alloc.buffer_type; + map.type = alloc.type; map.region = alloc.region; map.dmabuf = alloc.dmabuf; rc = msm_vidc_memory_map(core, &map); diff --git a/include/uapi/vidc/media/msm_vidc_utils.h b/include/uapi/vidc/media/msm_vidc_utils.h index 2cc570f88c..f5ab05e0ff 100644 --- a/include/uapi/vidc/media/msm_vidc_utils.h +++ b/include/uapi/vidc/media/msm_vidc_utils.h @@ -27,19 +27,6 @@ /* vendor controls start */ #define V4L2_CID_MPEG_MSM_VIDC_BASE (V4L2_CTRL_CLASS_MPEG | 0x2000) -#define V4L2_CID_MPEG_VIDC_VIDEO_DECODE_ORDER \ - (V4L2_CID_MPEG_MSM_VIDC_BASE + 0x1) -#define V4L2_CID_MPEG_VIDC_VIDEO_SYNC_FRAME_DECODE \ - (V4L2_CID_MPEG_MSM_VIDC_BASE + 0x2) -#define V4L2_CID_MPEG_VIDC_VIDEO_SECURE \ - (V4L2_CID_MPEG_MSM_VIDC_BASE + 0x3) -#define V4L2_CID_MPEG_VIDC_VIDEO_LOWLATENCY_MODE \ - (V4L2_CID_MPEG_MSM_VIDC_BASE + 0x4) -#define V4L2_CID_MPEG_VIDC_VIDEO_LOWLATENCY_HINT \ - (V4L2_CID_MPEG_MSM_VIDC_BASE + 0x5) -#define V4L2_CID_MPEG_VIDC_VIDEO_BUFFER_SIZE_LIMIT \ - (V4L2_CID_MPEG_MSM_VIDC_BASE + 0x6) - #define V4L2_CID_MPEG_VIDC_VIDEO_DECODE_ORDER \ (V4L2_CID_MPEG_MSM_VIDC_BASE + 0x1) #define V4L2_CID_MPEG_VIDC_VIDEO_SYNC_FRAME_DECODE \ From 081c9ad524cd5ec672c1c379d287fb8cf4cc7bfb Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Fri, 4 Sep 2020 10:31:54 -0700 Subject: [PATCH 0014/1061] driver: vidc: fix response handling Add condition to check if response packet size is zero. Skip writing to sfr-register till FW adds support. Read FW response from the right addr. Change-Id: I9244d6af024da18750bb21186512c7cc4dfd0c65 Signed-off-by: Darshana Patil --- driver/variant/iris2/src/msm_vidc_iris2.c | 5 +++-- driver/vidc/src/venus_hfi.c | 2 +- driver/vidc/src/venus_hfi_response.c | 21 ++++++++++++++------- 3 files changed, 18 insertions(+), 10 deletions(-) diff --git a/driver/variant/iris2/src/msm_vidc_iris2.c b/driver/variant/iris2/src/msm_vidc_iris2.c index 8225c8e7e2..75a7ed998d 100644 --- a/driver/variant/iris2/src/msm_vidc_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_iris2.c @@ -184,9 +184,10 @@ static int __setup_ucregion_memory_map_iris2(struct msm_vidc_core *vidc_core) __write_register(core, QTBL_ADDR_IRIS2, (u32)core->iface_q_table.align_device_addr); __write_register(core, QTBL_INFO_IRIS2, 0x01); - if (core->sfr.align_device_addr) + /* TODO: darshana, remove below comment later with FW support*/ + /*if (core->sfr.align_device_addr) __write_register(core, SFR_ADDR_IRIS2, - (u32)core->sfr.align_device_addr); + (u32)core->sfr.align_device_addr);*/ /* update queues vaddr for debug purpose */ __write_register(core, CPU_CS_VCICMDARG0_IRIS2, (u32)core->iface_q_table.align_virtual_addr); diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index 5a62ef2c41..a33dbca30e 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -927,7 +927,7 @@ static void __flush_debug_queue(struct msm_vidc_core *core, u8 *header) struct hfi_header *hdr = (struct hfi_header *) header; - if (!validate_packet((u8 *)pkt, core->response_packet, + if (validate_packet((u8 *)pkt, core->response_packet, core->packet_size, __func__)) return; diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index 82f66d2472..687c1684da 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -54,6 +54,7 @@ int validate_packet(u8 *response_pkt, u8 *core_resp_pkt, u32 core_resp_pkt_size, const char *func) { u8 *response_limit; + u32 response_pkt_size = 0; if (!response_pkt || !core_resp_pkt || !core_resp_pkt_size) { d_vpr_e("%s: invalid params\n", func); @@ -68,7 +69,13 @@ int validate_packet(u8 *response_pkt, u8 *core_resp_pkt, return -EINVAL; } - if (response_pkt + *(u32 *)response_pkt > response_limit) { + response_pkt_size = *(u32 *)response_pkt; + if (!response_pkt_size) { + d_vpr_e("%s: response packet size cannot be zero\n", func); + return -EINVAL; + } + + if (response_pkt + response_pkt_size > response_limit) { d_vpr_e("%s: invalid packet size %d\n", func, *(u32 *)response_pkt); return -EINVAL; @@ -241,7 +248,7 @@ static int handle_session_buffer(struct msm_vidc_inst *inst, return 0; } - buffer = (struct hfi_buffer *)(pkt + sizeof(struct hfi_packet)); + buffer = (struct hfi_buffer *)((u8 *)pkt + sizeof(struct hfi_packet)); buf_type = buffer->type; if (!is_valid_hfi_buffer_type(inst, buf_type, __func__)) { msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); @@ -383,10 +390,10 @@ static int handle_system_response(struct msm_vidc_core *core, struct hfi_packet *pkt; int i; - pkt = (struct hfi_packet *)(hdr + sizeof(struct hfi_header)); + pkt = (struct hfi_packet *)((u8 *)hdr + sizeof(struct hfi_header)); for (i = 0; i < hdr->num_packets; i++) { - if (!validate_packet((u8 *)pkt, core->response_packet, + if (validate_packet((u8 *)pkt, core->response_packet, core->packet_size, __func__)) return -EINVAL; if (pkt->type == HFI_CMD_INIT) { @@ -420,10 +427,10 @@ static int handle_session_response(struct msm_vidc_core *core, goto exit; } - pkt = (struct hfi_packet *)(hdr + sizeof(struct hfi_header)); + pkt = (struct hfi_packet *)((u8 *)hdr + sizeof(struct hfi_header)); for (i = 0; i < hdr->num_packets; i++) { - if (!validate_packet((u8 *)pkt, core->response_packet, + if (validate_packet((u8 *)pkt, core->response_packet, core->packet_size, __func__)) goto exit; if (pkt->type < HFI_CMD_END && pkt->type > HFI_CMD_BEGIN) { @@ -456,7 +463,7 @@ int handle_response(struct msm_vidc_core *core, void *response) } hdr = (struct hfi_header *)response; - if (!validate_packet((u8 *)hdr, core->response_packet, + if (validate_packet((u8 *)hdr, core->response_packet, core->packet_size, __func__)) return -EINVAL; From c9dec2599e26c3a52a7349a97907538af57a55c9 Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Fri, 4 Sep 2020 15:47:10 -0700 Subject: [PATCH 0015/1061] driver: vidc: add support for open, close, set codec add support for session open, close and set codec. Change-Id: Ic2f7a953a0d90215fab0a0d141957c3eb1a8cc78 Signed-off-by: Darshana Patil --- driver/vidc/inc/msm_vidc_driver.h | 2 ++ driver/vidc/inc/msm_vidc_inst.h | 2 +- driver/vidc/inc/venus_hfi.h | 1 + driver/vidc/src/msm_vidc.c | 7 ++++- driver/vidc/src/msm_vidc_driver.c | 45 +++++++++++++++++++++++++++++-- driver/vidc/src/msm_vidc_vb2.c | 4 +-- driver/vidc/src/venus_hfi.c | 23 ++++++++++------ 7 files changed, 70 insertions(+), 14 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 73cc625857..a508f419a3 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -87,6 +87,8 @@ int msm_vidc_release_internal_buffers(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type buffer_type); int msm_vidc_add_session(struct msm_vidc_inst *inst); int msm_vidc_session_open(struct msm_vidc_inst *inst); +int msm_vidc_session_set_codec(struct msm_vidc_inst *inst); +int msm_vidc_session_close(struct msm_vidc_inst *inst); int msm_vidc_get_inst_capability(struct msm_vidc_inst *inst); int msm_vidc_core_init(struct msm_vidc_core *core); int msm_vidc_smmu_fault_handler(struct iommu_domain *domain, diff --git a/driver/vidc/inc/msm_vidc_inst.h b/driver/vidc/inc/msm_vidc_inst.h index 86a2996c63..b548a7bb3d 100644 --- a/driver/vidc/inc/msm_vidc_inst.h +++ b/driver/vidc/inc/msm_vidc_inst.h @@ -111,7 +111,7 @@ struct msm_vidc_inst { struct list_head input_ts; struct list_head enc_input_crs; struct list_head decode_bitrate_data; - bool session_created; + bool codec_set; struct dentry *debugfs_root; struct msm_vidc_debug debug; struct msm_vidc_inst_capability *capabilities; diff --git a/driver/vidc/inc/venus_hfi.h b/driver/vidc/inc/venus_hfi.h index 5a816236ac..d50e8baf51 100644 --- a/driver/vidc/inc/venus_hfi.h +++ b/driver/vidc/inc/venus_hfi.h @@ -54,6 +54,7 @@ int venus_hfi_start(struct msm_vidc_inst *inst, enum msm_vidc_port_type port); int venus_hfi_stop(struct msm_vidc_inst *inst, enum msm_vidc_port_type port); int venus_hfi_session_close(struct msm_vidc_inst *inst); int venus_hfi_session_open(struct msm_vidc_inst *inst); +int venus_hfi_session_set_codec(struct msm_vidc_inst *inst); int venus_hfi_core_init(struct msm_vidc_core *core); int venus_hfi_core_release(struct msm_vidc_core *core); int venus_hfi_suspend(struct msm_vidc_core *core); diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index 2834b705ab..30e48e026e 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -810,6 +810,9 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) //msm_power_setup(inst); // send cmd to firmware here + rc = msm_vidc_session_open(inst); + if (rc) + goto error; return inst; @@ -821,6 +824,7 @@ EXPORT_SYMBOL(msm_vidc_open); int msm_vidc_close(void *instance) { + int rc = 0; struct msm_vidc_inst *inst = instance; if (!inst) { @@ -828,7 +832,8 @@ int msm_vidc_close(void *instance) return -EINVAL; } s_vpr_h(inst->sid, "%s()\n", __func__); + rc = msm_vidc_session_close(inst); - return 0; + return rc; } EXPORT_SYMBOL(msm_vidc_close); diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index bea74766f7..d98e4f1dc5 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -1051,11 +1051,52 @@ int msm_vidc_session_open(struct msm_vidc_inst *inst) } rc = venus_hfi_session_open(inst); + + return rc; +} + +int msm_vidc_session_set_codec(struct msm_vidc_inst *inst) +{ + int rc = 0; + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + rc = venus_hfi_session_set_codec(inst); + + return rc; +} + +int msm_vidc_session_close(struct msm_vidc_inst *inst) +{ + int rc = 0; + struct msm_vidc_core *core; + + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + rc = venus_hfi_session_close(inst); if (rc) return rc; - inst->session_created = true; - return 0; + core = inst->core; + rc = wait_for_completion_timeout( + &inst->completions[SIGNAL_CMD_CLOSE], + msecs_to_jiffies( + core->platform->data.core_data[HW_RESPONSE_TIMEOUT].value)); + if (!rc) { + s_vpr_e(inst->sid, "%s: session close timed out\n", __func__); + //msm_comm_kill_session(inst); + rc = -EIO; + } else { + rc = 0; + } + + return rc; } int msm_vidc_get_inst_capability(struct msm_vidc_inst *inst) diff --git a/driver/vidc/src/msm_vidc_vb2.c b/driver/vidc/src/msm_vidc_vb2.c index 3830346d80..62555f9acd 100644 --- a/driver/vidc/src/msm_vidc_vb2.c +++ b/driver/vidc/src/msm_vidc_vb2.c @@ -107,8 +107,8 @@ int msm_vidc_start_streaming(struct vb2_queue *q, unsigned int count) } s_vpr_h(inst->sid, "Streamon: %d\n", q->type); - if (!inst->session_created) { - rc = msm_vidc_session_open(inst); + if (!inst->codec_set) { + rc = msm_vidc_session_set_codec(inst); if (rc) return -EINVAL; } diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index a33dbca30e..4530986833 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -569,7 +569,6 @@ static int __write_queue(struct msm_vidc_iface_q_info *qinfo, u8 *packet, d_vpr_e("skip writing packet\n"); return 0; - packet_size_in_words = (*(u32 *)packet) >> 2; if (!packet_size_in_words || packet_size_in_words > qinfo->q_array.mem_size>>2) { @@ -2463,9 +2462,6 @@ int venus_hfi_suspend(struct msm_vidc_core *core) int venus_hfi_session_open(struct msm_vidc_inst *inst) { int rc = 0; - u32 codec; - - d_vpr_h("%s(): inst %p %p\n", __func__, inst); if (!inst) { d_vpr_e("%s: invalid params\n", __func__); @@ -2493,6 +2489,19 @@ int venus_hfi_session_open(struct msm_vidc_inst *inst) rc = __iface_cmdq_write(inst->core, inst->packet); if (rc) goto error; +error: + return rc; +} + +int venus_hfi_session_set_codec(struct msm_vidc_inst *inst) +{ + int rc = 0; + u32 codec; + + if (!inst || !inst->packet) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } codec = get_hfi_codec(inst); rc = hfi_packet_session_property(inst, @@ -2509,7 +2518,7 @@ int venus_hfi_session_open(struct msm_vidc_inst *inst) if (rc) goto error; - inst->session_created = true; + inst->codec_set = true; error: return rc; } @@ -2518,8 +2527,6 @@ int venus_hfi_session_close(struct msm_vidc_inst *inst) { int rc = 0; - d_vpr_h("%s(): inst %p\n", __func__, inst); - if (!inst || !inst->packet) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; @@ -2540,7 +2547,7 @@ int venus_hfi_session_close(struct msm_vidc_inst *inst) kfree(inst->packet); - return rc; + return rc; } int venus_hfi_start(struct msm_vidc_inst *inst, enum msm_vidc_port_type port) From 78857beaced409ed8b5aa0471b42964b1b7034ea Mon Sep 17 00:00:00 2001 From: Maheshwar Ajja Date: Fri, 11 Sep 2020 13:57:33 -0700 Subject: [PATCH 0016/1061] video: driver: add buffer handling support - Add queue buffer support - Add dequeue buffer support - Use multiple plane buffers instead of single plane. Change-Id: I911784a1fa4b8a4b5d3fd35049379ea35d4d52b0 Signed-off-by: Maheshwar Ajja --- driver/platform/waipio/src/msm_vidc_waipio.c | 11 +- .../variant/iris2/src/msm_vidc_buffer_iris2.c | 75 +- driver/vidc/inc/hfi_command.h | 5 + driver/vidc/inc/hfi_packet.h | 5 +- driver/vidc/inc/msm_vidc_bus.h | 2 +- driver/vidc/inc/msm_vidc_driver.h | 18 +- driver/vidc/inc/msm_vidc_dt.h | 1 + driver/vidc/inc/msm_vidc_inst.h | 2 + driver/vidc/inc/msm_vidc_internal.h | 75 +- driver/vidc/inc/venus_hfi.h | 11 +- driver/vidc/src/hfi_packet.c | 73 +- driver/vidc/src/msm_vdec.c | 794 ++++++++++++++---- driver/vidc/src/msm_venc.c | 165 ++-- driver/vidc/src/msm_vidc.c | 41 +- driver/vidc/src/msm_vidc_buffer.c | 16 +- driver/vidc/src/msm_vidc_control.c | 4 +- driver/vidc/src/msm_vidc_driver.c | 238 ++++-- driver/vidc/src/msm_vidc_dt.c | 11 +- driver/vidc/src/msm_vidc_platform.c | 4 + driver/vidc/src/msm_vidc_probe.c | 6 +- driver/vidc/src/msm_vidc_vb2.c | 62 +- driver/vidc/src/venus_hfi.c | 227 +++-- driver/vidc/src/venus_hfi_response.c | 195 ++++- include/uapi/vidc/media/msm_vidc_utils.h | 5 +- 24 files changed, 1522 insertions(+), 524 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index ba04c8a19a..7de13f1e0f 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -58,6 +58,7 @@ static struct msm_platform_core_capability core_data_waipio[] = { {MAX_MBPS_HQ, 489600}, /* ((1920x1088)/256)@60fps */ {MAX_MBPF_B_FRAME, 32640}, /* 3840x2176/256 */ {MAX_MBPS_B_FRAME, 1958400}, /* 3840x2176/256 MBs@60fps */ + {NUM_VPP_PIPE, 4}, {SW_PC, 1}, {SW_PC_DELAY, 1500}, /* 1500 ms */ {FW_UNLOAD, 0}, @@ -97,17 +98,15 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {FRAME_HEIGHT, ENC|DEC, CODECS_ALL, 128, 8192, 1, 1080}, {PIX_FMTS, ENC, CODECS_ALL, MSM_VIDC_FMT_NV12, - MSM_VIDC_FMT_SDE_Y_CBCR_H2V2_P010_VENUS, + MSM_VIDC_FMT_NV12_TP10_UBWC, MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12_UBWC | - MSM_VIDC_FMT_NV12_P010_UBWC | MSM_VIDC_FMT_NV12_TP10_UBWC | - MSM_VIDC_FMT_RGBA8888_UBWC | MSM_VIDC_FMT_SDE_Y_CBCR_H2V2_P010_VENUS, + MSM_VIDC_FMT_NV12_P010 | MSM_VIDC_FMT_NV12_TP10_UBWC, MSM_VIDC_FMT_NV12_UBWC}, {PIX_FMTS, DEC, CODECS_ALL, MSM_VIDC_FMT_NV12, - MSM_VIDC_FMT_SDE_Y_CBCR_H2V2_P010_VENUS, + MSM_VIDC_FMT_NV12_TP10_UBWC, MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12_UBWC | - MSM_VIDC_FMT_NV12_P010_UBWC | MSM_VIDC_FMT_NV12_TP10_UBWC | - MSM_VIDC_FMT_RGBA8888_UBWC | MSM_VIDC_FMT_SDE_Y_CBCR_H2V2_P010_VENUS, + MSM_VIDC_FMT_NV12_P010 | MSM_VIDC_FMT_NV12_TP10_UBWC, MSM_VIDC_FMT_NV12_UBWC}, {MIN_BUFFERS_INPUT, ENC|DEC, CODECS_ALL, 0, 64, 1, 4, V4L2_CID_MIN_BUFFERS_FOR_OUTPUT}, diff --git a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c index 7218968bd8..427f2184b7 100644 --- a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c @@ -8,6 +8,7 @@ #include "msm_vidc_buffer.h" #include "msm_vidc_inst.h" #include "msm_vidc_core.h" +#include "msm_vidc_platform.h" #include "msm_vidc_driver.h" #include "msm_vidc_debug.h" @@ -1001,27 +1002,36 @@ static u32 calculate_mpeg2d_persist1_size(void) return QMATRIX_SIZE + MP2D_QPDUMP_SIZE; } -/* encoder internal buffers */ +/* decoder internal buffers */ u32 msm_vidc_decoder_scratch_size_iris2(struct msm_vidc_inst *inst) { + struct msm_vidc_core *core; u32 size = 0; u32 width, height, num_vpp_pipes; struct v4l2_format *f; bool is_interlaced; u32 vpp_delay; - d_vpr_h("%s()\n", __func__); - if (!inst) { + if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return size; } + core = inst->core; - num_vpp_pipes = 0; - vpp_delay = 0; + if (!core->capabilities) { + d_vpr_e("%s: invalid capabilities\n", __func__); + return size; + } + + num_vpp_pipes = core->capabilities[NUM_VPP_PIPE].value; + if (inst->decode_vpp_delay.enable) + vpp_delay = inst->decode_vpp_delay.size; + else + vpp_delay = DEFAULT_BSE_VPP_DELAY; is_interlaced = false; //(inst->pic_struct == MSM_VIDC_PIC_STRUCT_MAYBE_INTERLACED); f = &inst->fmts[INPUT_PORT]; - width = f->fmt.pix.width; - height = f->fmt.pix.height; + width = f->fmt.pix_mp.width; + height = f->fmt.pix_mp.height; if (inst->codec == MSM_VIDC_H264) { size = calculate_h264d_scratch_size(inst, width, height, @@ -1042,22 +1052,31 @@ u32 msm_vidc_decoder_scratch_size_iris2(struct msm_vidc_inst *inst) u32 msm_vidc_decoder_scratch_1_size_iris2(struct msm_vidc_inst *inst) { + struct msm_vidc_core *core; u32 size = 0; u32 width, height, out_min_count, num_vpp_pipes; struct v4l2_format *f; u32 vpp_delay; - d_vpr_h("%s()\n", __func__); - if (!inst) { + if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return size; } + core = inst->core; - num_vpp_pipes = 0; - vpp_delay = 0; + if (!core->capabilities) { + d_vpr_e("%s: invalid capabilities\n", __func__); + return size; + } + + num_vpp_pipes = core->capabilities[NUM_VPP_PIPE].value; + if (inst->decode_vpp_delay.enable) + vpp_delay = inst->decode_vpp_delay.size; + else + vpp_delay = DEFAULT_BSE_VPP_DELAY; f = &inst->fmts[INPUT_PORT]; - width = f->fmt.pix.width; - height = f->fmt.pix.height; + width = f->fmt.pix_mp.width; + height = f->fmt.pix_mp.height; out_min_count = inst->buffers.output.min_count; out_min_count = max(vpp_delay + 1, out_min_count); @@ -1108,6 +1127,7 @@ u32 msm_vidc_decoder_persist_1_size_iris2(struct msm_vidc_inst *inst) /* encoder internal buffers */ u32 msm_vidc_encoder_scratch_size_iris2(struct msm_vidc_inst *inst) { + struct msm_vidc_core *core; u32 size = 0; u32 width, height, num_vpp_pipes; struct v4l2_format *f; @@ -1116,11 +1136,17 @@ u32 msm_vidc_encoder_scratch_size_iris2(struct msm_vidc_inst *inst) d_vpr_e("%s: invalid params\n", __func__); return size; } + core = inst->core; - num_vpp_pipes = 4; //inst->core->platform_data->num_vpp_pipes; + if (!core->capabilities) { + d_vpr_e("%s: invalid capabilities\n", __func__); + return size; + } + + num_vpp_pipes = core->capabilities[NUM_VPP_PIPE].value; f = &inst->fmts[OUTPUT_PORT]; - width = f->fmt.pix.width; - height = f->fmt.pix.height; + width = f->fmt.pix_mp.width; + height = f->fmt.pix_mp.height; if (inst->codec == MSM_VIDC_H264) { size = calculate_h264e_scratch_size(inst, width, height, @@ -1137,6 +1163,7 @@ u32 msm_vidc_encoder_scratch_size_iris2(struct msm_vidc_inst *inst) u32 msm_vidc_encoder_scratch_1_size_iris2(struct msm_vidc_inst *inst) { + struct msm_vidc_core *core; u32 size = 0; u32 width, height, num_ref, num_vpp_pipes; bool is_tenbit = false; @@ -1146,11 +1173,17 @@ u32 msm_vidc_encoder_scratch_1_size_iris2(struct msm_vidc_inst *inst) d_vpr_e("%s: Instance is null!", __func__); return size; } + core = inst->core; - num_vpp_pipes = 4; //inst->core->platform_data->num_vpp_pipes; + if (!core->capabilities) { + d_vpr_e("%s: invalid capabilities\n", __func__); + return size; + } + + num_vpp_pipes = core->capabilities[NUM_VPP_PIPE].value; f = &inst->fmts[OUTPUT_PORT]; - width = f->fmt.pix.width; - height = f->fmt.pix.height; + width = f->fmt.pix_mp.width; + height = f->fmt.pix_mp.height; num_ref = 4; //msm_vidc_get_num_ref_frames(inst); is_tenbit = false; //(inst->bit_depth == MSM_VIDC_BIT_DEPTH_10); @@ -1177,8 +1210,8 @@ u32 msm_vidc_encoder_scratch_2_size_iris2(struct msm_vidc_inst *inst) } f = &inst->fmts[OUTPUT_PORT]; - width = f->fmt.pix.width; - height = f->fmt.pix.height; + width = f->fmt.pix_mp.width; + height = f->fmt.pix_mp.height; num_ref = 4; //msm_vidc_get_num_ref_frames(inst); is_tenbit = false; //(inst->bit_depth == MSM_VIDC_BIT_DEPTH_10); diff --git a/driver/vidc/inc/hfi_command.h b/driver/vidc/inc/hfi_command.h index a5246bef5a..3eb5621572 100644 --- a/driver/vidc/inc/hfi_command.h +++ b/driver/vidc/inc/hfi_command.h @@ -102,6 +102,11 @@ enum hfi_buffer_firmware_flags { HFI_BUF_FW_FLAG_LAST = BIT(0), HFI_BUF_FW_FLAG_READONLY = BIT(1), HFI_BUF_FW_FLAG_CODEC_CONFIG = BIT(2), + // TODO + HFI_BUF_FW_FLAG_SUBFRAME = BIT(3), + HFI_BUF_FW_FLAG_KEYFRAME = BIT(4), + HFI_BUF_FW_FLAG_CORRUPT = BIT(28), + HFI_BUF_FW_FLAG_UNSUPPORTED = BIT(29), }; enum hfi_metapayload_header_flags { diff --git a/driver/vidc/inc/hfi_packet.h b/driver/vidc/inc/hfi_packet.h index fb867d6e5a..843806b727 100644 --- a/driver/vidc/inc/hfi_packet.h +++ b/driver/vidc/inc/hfi_packet.h @@ -20,6 +20,8 @@ u32 get_hfi_port_from_buffer_type(struct msm_vidc_inst *inst, u32 get_hfi_buffer_type(enum msm_vidc_domain_type domain, enum msm_vidc_buffer_type buffer_type); u32 get_hfi_codec(struct msm_vidc_inst *inst); +u32 get_hfi_colorformat(struct msm_vidc_inst *inst, + enum msm_vidc_colorformat_type colorformat); int get_hfi_buffer(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buffer, struct hfi_buffer *buf); int hfi_create_header(u8 *packet, u32 packet_size, @@ -41,7 +43,4 @@ int hfi_packet_sys_debug_config(struct msm_vidc_core *core, int hfi_packet_session_command(struct msm_vidc_inst *inst, u32 pkt_type, u32 flags, u32 port, u32 session_id, u32 payload_type, void *payload, u32 payload_size); -int hfi_packet_session_property(struct msm_vidc_inst *inst, - u32 pkt_type, u32 flags, u32 port, - u32 payload_type, void *payload, u32 payload_size); #endif // _HFI_PACKET_H_ diff --git a/driver/vidc/inc/msm_vidc_bus.h b/driver/vidc/inc/msm_vidc_bus.h index 28d7b4c8de..91005e0464 100644 --- a/driver/vidc/inc/msm_vidc_bus.h +++ b/driver/vidc/inc/msm_vidc_bus.h @@ -236,7 +236,7 @@ static inline int __bpp(enum msm_vidc_colorformat_type f) case MSM_VIDC_FMT_NV12_UBWC: case MSM_VIDC_FMT_RGBA8888_UBWC: return 8; - case MSM_VIDC_FMT_NV12_P010_UBWC: + case MSM_VIDC_FMT_NV12_P010: case MSM_VIDC_FMT_NV12_TP10_UBWC: return 10; default: diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index a508f419a3..e950655c0e 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -70,11 +70,16 @@ void print_vidc_buffer(u32 tag, const char *str, struct msm_vidc_inst *inst, struct msm_vidc_buffer *vbuf); void print_vb2_buffer(const char *str, struct msm_vidc_inst *inst, struct vb2_buffer *vb2); -enum msm_vidc_codec_type v4l2_codec_to_driver(u32 v4l2_codec); -u32 v4l2_codec_from_driver(enum msm_vidc_codec_type codec); -u32 v4l2_colorformat_to_media(u32 v4l2_fmt); -enum msm_vidc_colorformat_type v4l2_colorformat_to_driver(u32 colorformat); -u32 v4l2_colorformat_from_driver(enum msm_vidc_colorformat_type colorformat); +enum msm_vidc_codec_type v4l2_codec_to_driver(u32 v4l2_codec, + const char *func); +u32 v4l2_codec_from_driver(enum msm_vidc_codec_type codec, + const char *func); +u32 v4l2_colorformat_to_media(u32 v4l2_fmt, + const char *func); +enum msm_vidc_colorformat_type v4l2_colorformat_to_driver(u32 colorformat, + const char *func); +u32 v4l2_colorformat_from_driver(enum msm_vidc_colorformat_type colorformat, + const char *func); int v4l2_type_to_driver_port(struct msm_vidc_inst *inst, u32 type, const char *func); int msm_vidc_change_inst_state(struct msm_vidc_inst *inst, @@ -85,6 +90,9 @@ int msm_vidc_queue_internal_buffers(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type buffer_type); int msm_vidc_release_internal_buffers(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type buffer_type); +int msm_vidc_vb2_buffer_done(struct msm_vidc_inst *inst, + struct msm_vidc_buffer *buf); +int msm_vidc_remove_session(struct msm_vidc_inst *inst); int msm_vidc_add_session(struct msm_vidc_inst *inst); int msm_vidc_session_open(struct msm_vidc_inst *inst); int msm_vidc_session_set_codec(struct msm_vidc_inst *inst); diff --git a/driver/vidc/inc/msm_vidc_dt.h b/driver/vidc/inc/msm_vidc_dt.h index efee355ecb..823116923d 100644 --- a/driver/vidc/inc/msm_vidc_dt.h +++ b/driver/vidc/inc/msm_vidc_dt.h @@ -138,6 +138,7 @@ struct clock_info { u32 count; bool has_scaling; bool has_mem_retention; + u64 prev; }; struct clock_set { diff --git a/driver/vidc/inc/msm_vidc_inst.h b/driver/vidc/inc/msm_vidc_inst.h index b548a7bb3d..4294bfc9f1 100644 --- a/driver/vidc/inc/msm_vidc_inst.h +++ b/driver/vidc/inc/msm_vidc_inst.h @@ -95,6 +95,8 @@ struct msm_vidc_inst { struct vb2_queue vb2q[MAX_PORT]; struct msm_vidc_crop crop; struct msm_vidc_properties prop; + enum msm_vidc_stage_type stage; + enum msm_vidc_pipe_type pipe; struct msm_vidc_power power; struct msm_vidc_buffers_info buffers; struct msm_vidc_mappings_info mappings; diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 7f1d27ca32..88788dbe48 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -46,8 +46,8 @@ #define COLOR_RANGE_UNSPECIFIED (-1) #define V4L2_EVENT_VIDC_BASE 10 -#define INPUT_PLANE V4L2_BUF_TYPE_VIDEO_OUTPUT -#define OUTPUT_PLANE V4L2_BUF_TYPE_VIDEO_CAPTURE +#define INPUT_MPLANE V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE +#define OUTPUT_MPLANE V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE #define INPUT_META_PLANE V4L2_BUF_TYPE_META_OUTPUT #define OUTPUT_META_PLANE V4L2_BUF_TYPE_META_CAPTURE @@ -92,26 +92,40 @@ enum msm_vidc_codec_type { }; enum msm_vidc_colorformat_type { - MSM_VIDC_FMT_NV12 = BIT(0), - MSM_VIDC_FMT_NV21 = BIT(1), - MSM_VIDC_FMT_NV12_UBWC = BIT(2), - MSM_VIDC_FMT_NV12_P010_UBWC = BIT(3), - MSM_VIDC_FMT_NV12_TP10_UBWC = BIT(4), - MSM_VIDC_FMT_RGBA8888_UBWC = BIT(5), - MSM_VIDC_FMT_SDE_Y_CBCR_H2V2_P010_VENUS = BIT(6), + MSM_VIDC_FMT_NONE = 0, + MSM_VIDC_FMT_NV12, + MSM_VIDC_FMT_NV21, + MSM_VIDC_FMT_NV12_UBWC, + MSM_VIDC_FMT_NV12_P010, + MSM_VIDC_FMT_NV12_TP10_UBWC, + MSM_VIDC_FMT_RGBA8888, + MSM_VIDC_FMT_RGBA8888_UBWC, }; enum msm_vidc_buffer_type { - MSM_VIDC_BUF_QUEUE = BIT(0), - MSM_VIDC_BUF_INPUT = BIT(1), - MSM_VIDC_BUF_OUTPUT = BIT(2), - MSM_VIDC_BUF_INPUT_META = BIT(3), - MSM_VIDC_BUF_OUTPUT_META = BIT(4), - MSM_VIDC_BUF_SCRATCH = BIT(5), - MSM_VIDC_BUF_SCRATCH_1 = BIT(6), - MSM_VIDC_BUF_SCRATCH_2 = BIT(7), - MSM_VIDC_BUF_PERSIST = BIT(8), - MSM_VIDC_BUF_PERSIST_1 = BIT(9), + MSM_VIDC_BUF_NONE = 0, + MSM_VIDC_BUF_INPUT, + MSM_VIDC_BUF_OUTPUT, + MSM_VIDC_BUF_INPUT_META, + MSM_VIDC_BUF_OUTPUT_META, + MSM_VIDC_BUF_QUEUE, + MSM_VIDC_BUF_SCRATCH, + MSM_VIDC_BUF_SCRATCH_1, + MSM_VIDC_BUF_SCRATCH_2, + MSM_VIDC_BUF_PERSIST, + MSM_VIDC_BUF_PERSIST_1, +}; + +/* always match with v4l2 flags V4L2_BUF_FLAG_* */ +enum msm_vidc_buffer_flags { + MSM_VIDC_BUF_FLAG_KEYFRAME = 0x00000008, + MSM_VIDC_BUF_FLAG_PFRAME = 0x00000010, + MSM_VIDC_BUF_FLAG_BFRAME = 0x00000020, + MSM_VIDC_BUF_FLAG_ERROR = 0x00000040, + MSM_VIDC_BUF_FLAG_LAST = 0x00100000, + // TODO: remove below flags + MSM_VIDC_BUF_FLAG_CODECCONFIG = 0x01000000, + MSM_VIDC_BUF_FLAG_SUBFRAME = 0x02000000, }; enum msm_vidc_buffer_attributes { @@ -122,10 +136,11 @@ enum msm_vidc_buffer_attributes { }; enum msm_vidc_buffer_region { - MSM_VIDC_NON_SECURE = BIT(0), - MSM_VIDC_SECURE_PIXEL = BIT(1), - MSM_VIDC_SECURE_NONPIXEL = BIT(2), - MSM_VIDC_SECURE_BITSTREAM = BIT(3), + MSM_VIDC_REGION_NONE = 0, + MSM_VIDC_NON_SECURE, + MSM_VIDC_SECURE_PIXEL, + MSM_VIDC_SECURE_NONPIXEL, + MSM_VIDC_SECURE_BITSTREAM, }; enum msm_vidc_port_type { @@ -136,6 +151,19 @@ enum msm_vidc_port_type { MAX_PORT, }; +enum msm_vidc_stage_type { + MSM_VIDC_STAGE_NONE = 0, + MSM_VIDC_STAGE_1 = 1, + MSM_VIDC_STAGE_2 = 2, +}; + +enum msm_vidc_pipe_type { + MSM_VIDC_PIPE_NONE = 0, + MSM_VIDC_PIPE_1 = 1, + MSM_VIDC_PIPE_2 = 2, + MSM_VIDC_PIPE_4 = 4, +}; + enum msm_vidc_core_capability_type { CORE_CAP_NONE = 0, ENC_CODECS, @@ -149,6 +177,7 @@ enum msm_vidc_core_capability_type { MAX_MBPS_HQ, MAX_MBPF_B_FRAME, MAX_MBPS_B_FRAME, + NUM_VPP_PIPE, SW_PC, SW_PC_DELAY, FW_UNLOAD, diff --git a/driver/vidc/inc/venus_hfi.h b/driver/vidc/inc/venus_hfi.h index d50e8baf51..97eda798f9 100644 --- a/driver/vidc/inc/venus_hfi.h +++ b/driver/vidc/inc/venus_hfi.h @@ -35,7 +35,7 @@ struct vidc_buffer_addr_info { u32 extradata_size; u32 response_required; }; - +#if 0 struct hfi_resource_subcache_type { u32 size; u32 sc_id; @@ -45,7 +45,10 @@ struct hfi_resource_syscache_info_type { u32 num_entries; struct hfi_resource_subcache_type rg_subcache_entries[1]; }; - +#endif +int venus_hfi_session_property(struct msm_vidc_inst *inst, + u32 pkt_type, u32 flags, u32 port, + u32 payload_type, void *payload, u32 payload_size); int venus_hfi_queue_buffer(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buffer, struct msm_vidc_buffer *metabuf); int venus_hfi_release_buffer(struct msm_vidc_inst *inst, @@ -64,6 +67,10 @@ void venus_hfi_pm_work_handler(struct work_struct *work); void __write_register(struct msm_vidc_core *core, u32 reg, u32 value); int __read_register(struct msm_vidc_core *core, u32 reg); +int __iface_cmdq_write(struct msm_vidc_core *core, + void *pkt); +int __iface_msgq_read(struct msm_vidc_core *core, void *pkt); +int __iface_dbgq_read(struct msm_vidc_core *core, void *pkt); void __disable_unprepare_clks(struct msm_vidc_core *core); int __disable_regulators(struct msm_vidc_core *core); int __unvote_buses(struct msm_vidc_core *core); diff --git a/driver/vidc/src/hfi_packet.c b/driver/vidc/src/hfi_packet.c index afe81e3ca8..eb0c20a05d 100644 --- a/driver/vidc/src/hfi_packet.c +++ b/driver/vidc/src/hfi_packet.c @@ -154,6 +154,42 @@ u32 get_hfi_codec(struct msm_vidc_inst *inst) } } +u32 get_hfi_colorformat(struct msm_vidc_inst *inst, + enum msm_vidc_colorformat_type colorformat) +{ + u32 hfi_colorformat = HFI_COLOR_FMT_NV12_UBWC; + + switch(colorformat) { + case MSM_VIDC_FMT_NV12: + hfi_colorformat = HFI_COLOR_FMT_NV12; + break; + case MSM_VIDC_FMT_NV12_UBWC: + hfi_colorformat = HFI_COLOR_FMT_NV12_UBWC; + break; + case MSM_VIDC_FMT_NV12_P010: + hfi_colorformat = HFI_COLOR_FMT_P010; + break; + case MSM_VIDC_FMT_NV12_TP10_UBWC: + hfi_colorformat = HFI_COLOR_FMT_TP10_UBWC; + break; + case MSM_VIDC_FMT_RGBA8888: + hfi_colorformat = HFI_COLOR_FMT_RGBA8888; + break; + case MSM_VIDC_FMT_RGBA8888_UBWC: + hfi_colorformat = HFI_COLOR_FMT_RGBA8888_UBWC; + break; + case MSM_VIDC_FMT_NV21: + hfi_colorformat = HFI_COLOR_FMT_NV21; + break; + default: + s_vpr_e(inst->sid, "%s: invalid colorformat %d\n", + __func__, colorformat); + break; + } + + return hfi_colorformat; +} + int get_hfi_buffer(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buffer, struct hfi_buffer *buf) { @@ -543,40 +579,3 @@ err_cmd: d_vpr_e("%s: create packet failed\n", __func__); return rc; } - -int hfi_packet_session_property(struct msm_vidc_inst *inst, - u32 pkt_type, u32 flags, u32 port, u32 payload_type, - void *payload, u32 payload_size) -{ - int rc = 0; - struct msm_vidc_core *core; - - if (!inst || !inst->core || !inst->packet) { - d_vpr_e("%s: Invalid params\n", __func__); - return -EINVAL; - } - core = inst->core; - - rc = hfi_create_header(inst->packet, inst->packet_size, - inst->session_id, core->header_id++); - if (rc) - goto err_prop; - - rc = hfi_create_packet(inst->packet, inst->packet_size, - pkt_type, - flags, - payload_type, - port, - core->packet_id++, - payload, - payload_size); - if (rc) - goto err_prop; - - d_vpr_h("Property packet 0x%x created\n", pkt_type); - return rc; - -err_prop: - d_vpr_e("%s: create packet failed\n", __func__); - return rc; -} \ No newline at end of file diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 412041348d..00851bf514 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -16,20 +16,363 @@ #include "venus_hfi.h" #include "hfi_packet.h" +u32 msm_vdec_subscribe_for_port_settings_change[] = { + HFI_PROP_ALIGN_RESOLUTION, + HFI_PROP_CROP_COORDINATE_TOP_LEFT, + HFI_PROP_CROP_RESOLUTION, + HFI_PROP_LUMA_CHROMA_BIT_DEPTH, + HFI_PROP_CABAC_SESSION, + HFI_PROP_CODED_FRAMES, + HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT, + HFI_PROP_PIC_ORDER_CNT_TYPE, + HFI_PROP_SIGNAL_COLOR_INFO, +}; + +u32 msm_vdec_subscribe_for_properties[] = { + HFI_PROP_TAG_NOT_PROPAGATED_TO_OUTPUT, +}; + +u32 msm_vdec_subscribe_for_metadata[] = { + HFI_PROP_TAG_NOT_PROPAGATED_TO_OUTPUT, +}; + +u32 msm_vdec_deliver_as_metadata[] = { + HFI_PROP_BUFFER_TAG, +}; + static int msm_vdec_codec_change(struct msm_vidc_inst *inst, u32 codec) { int rc = 0; d_vpr_h("%s()\n", __func__); - inst->codec = v4l2_codec_to_driver(codec); + inst->codec = v4l2_codec_to_driver(codec, __func__); rc = msm_vidc_get_inst_capability(inst); - return rc; + if (rc) + return rc; + return 0; +} + +static int msm_vdec_set_resolution(struct msm_vidc_inst *inst, + enum msm_vidc_port_type port) +{ + int rc = 0; + u32 resolution; + + if (port != INPUT_PORT && port != OUTPUT_PORT) { + s_vpr_e(inst->sid, "%s: invalid port %d\n", __func__, port); + return -EINVAL; + } + + resolution = inst->fmts[port].fmt.pix_mp.width << 16 | + inst->fmts[port].fmt.pix_mp.height; + rc = venus_hfi_session_property(inst, + HFI_PROP_ALIGN_RESOLUTION, + HFI_HOST_FLAGS_NONE, + get_hfi_port(inst, port), + HFI_PAYLOAD_U32, + &resolution, + sizeof(u32)); + if (rc) + return rc; + return 0; +} + +static int msm_vdec_set_crop_top_left(struct msm_vidc_inst *inst, + enum msm_vidc_port_type port) +{ + int rc = 0; + u32 crop_top_left; + + if (port != INPUT_PORT && port != OUTPUT_PORT) { + s_vpr_e(inst->sid, "%s: invalid port %d\n", __func__, port); + return -EINVAL; + } + + crop_top_left = 0; + rc = venus_hfi_session_property(inst, + HFI_PROP_CROP_COORDINATE_TOP_LEFT, + HFI_HOST_FLAGS_NONE, + get_hfi_port(inst, port), + HFI_PAYLOAD_U32, + &crop_top_left, + sizeof(u32)); + if (rc) + return rc; + return 0; +} + +static int msm_vdec_set_crop_resolution(struct msm_vidc_inst *inst, + enum msm_vidc_port_type port) +{ + int rc = 0; + u32 crop; + + if (port != INPUT_PORT && port != OUTPUT_PORT) { + s_vpr_e(inst->sid, "%s: invalid port %d\n", __func__, port); + return -EINVAL; + } + + /* output buffer resolution is nothing but crop */ + crop = inst->fmts[OUTPUT_PORT].fmt.pix_mp.width << 16 | + inst->fmts[OUTPUT_PORT].fmt.pix_mp.height; + rc = venus_hfi_session_property(inst, + HFI_PROP_CROP_RESOLUTION, + HFI_HOST_FLAGS_NONE, + get_hfi_port(inst, port), + HFI_PAYLOAD_U32, + &crop, + sizeof(u32)); + if (rc) + return rc; + return 0; +} + +static int msm_vdec_set_bit_depth(struct msm_vidc_inst *inst, + enum msm_vidc_port_type port) +{ + int rc = 0; + u32 colorformat; + u32 bitdepth = 8 << 16 | 8; + + if (port != INPUT_PORT && port != OUTPUT_PORT) { + s_vpr_e(inst->sid, "%s: invalid port %d\n", __func__, port); + return -EINVAL; + } + + colorformat = inst->fmts[OUTPUT_PORT].fmt.pix_mp.pixelformat; + if (colorformat == V4L2_PIX_FMT_NV12_P010 || + colorformat == V4L2_PIX_FMT_NV12_TP10_UBWC) + bitdepth = 10 << 16 | 10; + rc = venus_hfi_session_property(inst, + HFI_PROP_LUMA_CHROMA_BIT_DEPTH, + HFI_HOST_FLAGS_NONE, + get_hfi_port(inst, port), + HFI_PAYLOAD_U32, + &bitdepth, + sizeof(u32)); + if (rc) + return rc; + return 0; +} + +static int msm_vdec_set_cabac(struct msm_vidc_inst *inst, + enum msm_vidc_port_type port) +{ + int rc = 0; + u32 cabac = 0; + + if (port != INPUT_PORT && port != OUTPUT_PORT) { + s_vpr_e(inst->sid, "%s: invalid port %d\n", __func__, port); + return -EINVAL; + } + + rc = venus_hfi_session_property(inst, + HFI_PROP_CABAC_SESSION, + HFI_HOST_FLAGS_NONE, + get_hfi_port(inst, port), + HFI_PAYLOAD_U32, + &cabac, + sizeof(u32)); + if (rc) + return rc; + return 0; +} + +static int msm_vdec_set_coded_frames(struct msm_vidc_inst *inst, + enum msm_vidc_port_type port) +{ + int rc = 0; + u32 coded_frames; + + if (port != INPUT_PORT && port != OUTPUT_PORT) { + s_vpr_e(inst->sid, "%s: invalid port %d\n", __func__, port); + return -EINVAL; + } + + /* (mb_adaptive_frame_field_flag << 1) | frame_mbs_only_flag */ + coded_frames = 1; + rc = venus_hfi_session_property(inst, + HFI_PROP_CODED_FRAMES, + HFI_HOST_FLAGS_NONE, + get_hfi_port(inst, port), + HFI_PAYLOAD_U32, + &coded_frames, + sizeof(u32)); + if (rc) + return rc; + return 0; +} + +static int msm_vdec_set_min_output_count(struct msm_vidc_inst *inst, + enum msm_vidc_port_type port) +{ + int rc = 0; + u32 min_output; + + if (port != INPUT_PORT && port != OUTPUT_PORT) { + s_vpr_e(inst->sid, "%s: invalid port %d\n", __func__, port); + return -EINVAL; + } + + min_output = inst->buffers.output.min_count; + rc = venus_hfi_session_property(inst, + HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT, + HFI_HOST_FLAGS_NONE, + get_hfi_port(inst, port), + HFI_PAYLOAD_U32, + &min_output, + sizeof(u32)); + if (rc) + return rc; + return 0; +} + +static int msm_vdec_set_picture_order_count(struct msm_vidc_inst *inst, + enum msm_vidc_port_type port) +{ + int rc = 0; + u32 poc = 1; + + if (port != INPUT_PORT && port != OUTPUT_PORT) { + s_vpr_e(inst->sid, "%s: invalid port %d\n", __func__, port); + return -EINVAL; + } + + rc = venus_hfi_session_property(inst, + HFI_PROP_PIC_ORDER_CNT_TYPE, + HFI_HOST_FLAGS_NONE, + get_hfi_port(inst, port), + HFI_PAYLOAD_U32, + &poc, + sizeof(u32)); + if (rc) + return rc; + return 0; +} + +static int msm_vdec_set_colorspace(struct msm_vidc_inst *inst, + enum msm_vidc_port_type port) +{ + int rc = 0; + u32 colorspace; + + if (port != INPUT_PORT && port != OUTPUT_PORT) { + s_vpr_e(inst->sid, "%s: invalid port %d\n", __func__, port); + return -EINVAL; + } + + colorspace = inst->fmts[OUTPUT_PORT].fmt.pix_mp.colorspace; + rc = venus_hfi_session_property(inst, + HFI_PROP_SIGNAL_COLOR_INFO, + HFI_HOST_FLAGS_NONE, + get_hfi_port(inst, port), + HFI_PAYLOAD_U32, + &colorspace, + sizeof(u32)); + if (rc) + return rc; + return 0; +} + +static int msm_vdec_set_colorformat(struct msm_vidc_inst *inst, + enum msm_vidc_port_type port) +{ + int rc = 0; + u32 pixelformat; + enum msm_vidc_colorformat_type colorformat; + u32 hfi_colorformat; + + if (port != INPUT_PORT && port != OUTPUT_PORT) { + s_vpr_e(inst->sid, "%s: invalid port %d\n", __func__, port); + return -EINVAL; + } + + pixelformat = inst->fmts[OUTPUT_PORT].fmt.pix_mp.pixelformat; + if (pixelformat != V4L2_PIX_FMT_NV12_UBWC && + pixelformat != V4L2_PIX_FMT_NV12_TP10_UBWC) { + s_vpr_e(inst->sid, "%s: invalid pixelformat %#x\n", + __func__, pixelformat); + return -EINVAL; + } + colorformat = v4l2_colorformat_to_driver(pixelformat, __func__); + hfi_colorformat = get_hfi_colorformat(inst, colorformat); + rc = venus_hfi_session_property(inst, + HFI_PROP_COLOR_FORMAT, + HFI_HOST_FLAGS_NONE, + get_hfi_port(inst, port), + HFI_PAYLOAD_U32, + &hfi_colorformat, + sizeof(u32)); + if (rc) + return rc; + return 0; +} + +static int msm_vdec_set_stage(struct msm_vidc_inst *inst, + enum msm_vidc_port_type port) +{ + int rc = 0; + struct msm_vidc_core *core = inst->core; + + if (port != INPUT_PORT && port != OUTPUT_PORT) { + s_vpr_e(inst->sid, "%s: invalid port %d\n", __func__, port); + return -EINVAL; + } + + rc = call_session_op(core, decide_work_mode, inst); + if (rc) { + s_vpr_e(inst->sid, "%s: decide_work_mode failed %d\n", + __func__, port); + return -EINVAL; + } + + rc = venus_hfi_session_property(inst, + HFI_PROP_STAGE, + HFI_HOST_FLAGS_NONE, + get_hfi_port(inst, port), + HFI_PAYLOAD_U32, + &inst->stage, + sizeof(u32)); + if (rc) + return rc; + return 0; +} + +static int msm_vdec_set_pipe(struct msm_vidc_inst *inst, + enum msm_vidc_port_type port) +{ + int rc = 0; + struct msm_vidc_core *core = inst->core; + + if (port != INPUT_PORT && port != OUTPUT_PORT) { + s_vpr_e(inst->sid, "%s: invalid port %d\n", __func__, port); + return -EINVAL; + } + + rc = call_session_op(core, decide_work_route, inst); + if (rc) { + s_vpr_e(inst->sid, "%s: decide_work_route failed %d\n", + __func__, port); + return -EINVAL; + } + + rc = venus_hfi_session_property(inst, + HFI_PROP_PIPE, + HFI_HOST_FLAGS_NONE, + get_hfi_port(inst, port), + HFI_PAYLOAD_U32, + &inst->pipe, + sizeof(u32)); + if (rc) + return rc; + return 0; } static int msm_vdec_set_input_properties(struct msm_vidc_inst *inst) { int rc = 0; + int i = 0; d_vpr_h("%s()\n", __func__); if (!inst) { @@ -37,6 +380,108 @@ static int msm_vdec_set_input_properties(struct msm_vidc_inst *inst) return -EINVAL; } + for (i = 0; i < ARRAY_SIZE(msm_vdec_subscribe_for_port_settings_change); + i++) { + switch (msm_vdec_subscribe_for_port_settings_change[i]) { + case HFI_PROP_ALIGN_RESOLUTION: + rc = msm_vdec_set_resolution(inst, INPUT_PORT); + break; + case HFI_PROP_CROP_COORDINATE_TOP_LEFT: + rc = msm_vdec_set_crop_top_left(inst, INPUT_PORT); + break; + case HFI_PROP_CROP_RESOLUTION: + rc = msm_vdec_set_crop_resolution(inst, INPUT_PORT); + break; + case HFI_PROP_LUMA_CHROMA_BIT_DEPTH: + rc = msm_vdec_set_bit_depth(inst, INPUT_PORT); + break; + case HFI_PROP_CABAC_SESSION: + rc = msm_vdec_set_cabac(inst, INPUT_PORT); + break; + case HFI_PROP_CODED_FRAMES: + rc = msm_vdec_set_coded_frames(inst, INPUT_PORT); + break; + case HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT: + rc = msm_vdec_set_min_output_count(inst, INPUT_PORT); + break; + case HFI_PROP_PIC_ORDER_CNT_TYPE: + rc = msm_vdec_set_picture_order_count(inst, INPUT_PORT); + break; + case HFI_PROP_SIGNAL_COLOR_INFO: + rc = msm_vdec_set_colorspace(inst, INPUT_PORT); + break; + default: + d_vpr_e("%s: unknown property %#x\n", __func__, + msm_vdec_subscribe_for_port_settings_change[i]); + rc = -EINVAL; + break; + } + } + + return rc; +} + +static int msm_vdec_set_output_properties(struct msm_vidc_inst *inst) +{ + int rc = 0; + int i = 0; + + d_vpr_h("%s()\n", __func__); + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + rc = msm_vdec_set_colorformat(inst, OUTPUT_PORT); + if (rc) + return rc; + + rc = msm_vdec_set_stage(inst, OUTPUT_PORT); + if (rc) + return rc; + + rc = msm_vdec_set_pipe(inst, OUTPUT_PORT); + if (rc) + return rc; + + for (i = 0; i < ARRAY_SIZE(msm_vdec_subscribe_for_port_settings_change); + i++) { + switch (msm_vdec_subscribe_for_port_settings_change[i]) { + case HFI_PROP_ALIGN_RESOLUTION: + rc = msm_vdec_set_resolution(inst, OUTPUT_PORT); + break; + case HFI_PROP_CROP_COORDINATE_TOP_LEFT: + rc = msm_vdec_set_crop_top_left(inst, OUTPUT_PORT); + break; + case HFI_PROP_CROP_RESOLUTION: + rc = msm_vdec_set_crop_resolution(inst, OUTPUT_PORT); + break; + case HFI_PROP_LUMA_CHROMA_BIT_DEPTH: + rc = msm_vdec_set_bit_depth(inst, OUTPUT_PORT); + break; + case HFI_PROP_CABAC_SESSION: + rc = msm_vdec_set_cabac(inst, OUTPUT_PORT); + break; + case HFI_PROP_CODED_FRAMES: + rc = msm_vdec_set_coded_frames(inst, OUTPUT_PORT); + break; + case HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT: + rc = msm_vdec_set_min_output_count(inst, OUTPUT_PORT); + break; + case HFI_PROP_PIC_ORDER_CNT_TYPE: + rc = msm_vdec_set_picture_order_count(inst, OUTPUT_PORT); + break; + case HFI_PROP_SIGNAL_COLOR_INFO: + rc = msm_vdec_set_colorspace(inst, OUTPUT_PORT); + break; + default: + d_vpr_e("%s: unknown property %#x\n", __func__, + msm_vdec_subscribe_for_port_settings_change[i]); + rc = -EINVAL; + break; + } + } + return rc; } @@ -156,17 +601,6 @@ static int msm_vdec_port_settings_subscription(struct msm_vidc_inst *inst, struct msm_vidc_core *core; u32 payload[32] = {0}; u32 i; - u32 subscribe_psc[] = { - HFI_PROP_ALIGN_RESOLUTION, - HFI_PROP_CROP_RESOLUTION, - HFI_PROP_CROP_COORDINATE_TOP_LEFT, - HFI_PROP_LUMA_CHROMA_BIT_DEPTH, - HFI_PROP_CABAC_SESSION, - HFI_PROP_CODED_FRAMES, - HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT, - HFI_PROP_PIC_ORDER_CNT_TYPE, - HFI_PROP_SIGNAL_COLOR_INFO, - }; if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); @@ -176,24 +610,26 @@ static int msm_vdec_port_settings_subscription(struct msm_vidc_inst *inst, d_vpr_h("%s()\n", __func__); payload[0] = HFI_MODE_PORT_SETTINGS_CHANGE; - for (i = 0; i < ARRAY_SIZE(subscribe_psc); i++) - payload[i + 1] = subscribe_psc[i]; + for (i = 0; i < ARRAY_SIZE(msm_vdec_subscribe_for_port_settings_change); + i++) + payload[i + 1] = msm_vdec_subscribe_for_port_settings_change[i]; rc = hfi_create_header(inst->packet, inst->packet_size, - inst->session_id, - core->header_id++); + inst->session_id, + core->header_id++); if (rc) return rc; rc = hfi_create_packet(inst->packet, inst->packet_size, - HFI_CMD_SUBSCRIBE_MODE, - (HFI_HOST_FLAGS_RESPONSE_REQUIRED | - HFI_HOST_FLAGS_INTR_REQUIRED), - HFI_PAYLOAD_U32_ARRAY, - get_hfi_port(inst, port), - core->packet_id++, - &payload[0], - (ARRAY_SIZE(subscribe_psc) + 1) * sizeof(u32)); + HFI_CMD_SUBSCRIBE_MODE, + (HFI_HOST_FLAGS_RESPONSE_REQUIRED | + HFI_HOST_FLAGS_INTR_REQUIRED), + HFI_PAYLOAD_U32_ARRAY, + get_hfi_port(inst, port), + core->packet_id++, + &payload[0], + (ARRAY_SIZE(msm_vdec_subscribe_for_port_settings_change) + 1) * + sizeof(u32)); if (rc) return rc; @@ -207,9 +643,6 @@ static int msm_vdec_property_subscription(struct msm_vidc_inst *inst, struct msm_vidc_core *core; u32 payload[32] = {0}; u32 i; - u32 subscribe_properties[] = { - HFI_PROP_TAG_NOT_PROPAGATED_TO_OUTPUT, - }; if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); @@ -219,8 +652,8 @@ static int msm_vdec_property_subscription(struct msm_vidc_inst *inst, d_vpr_h("%s()\n", __func__); payload[0] = HFI_MODE_PROPERTY; - for (i = 0; i < ARRAY_SIZE(subscribe_properties); i++) - payload[i + 1] = subscribe_properties[i]; + for (i = 0; i < ARRAY_SIZE(msm_vdec_subscribe_for_properties); i++) + payload[i + 1] = msm_vdec_subscribe_for_properties[i]; rc = hfi_create_header(inst->packet, inst->packet_size, inst->session_id, @@ -236,7 +669,49 @@ static int msm_vdec_property_subscription(struct msm_vidc_inst *inst, get_hfi_port(inst, port), core->packet_id++, &payload[0], - (ARRAY_SIZE(subscribe_properties) + 1) * sizeof(u32)); + (ARRAY_SIZE(msm_vdec_subscribe_for_properties) + 1) * + sizeof(u32)); + if (rc) + return rc; + + return rc; +} + +static int msm_vdec_metadata_subscription(struct msm_vidc_inst *inst, + enum msm_vidc_port_type port) +{ + int rc = 0; + struct msm_vidc_core *core; + u32 payload[32] = {0}; + u32 i; + + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + core = inst->core; + d_vpr_h("%s()\n", __func__); + + payload[0] = HFI_MODE_METADATA; + for (i = 0; i < ARRAY_SIZE(msm_vdec_subscribe_for_metadata); i++) + payload[i + 1] = msm_vdec_subscribe_for_metadata[i]; + + rc = hfi_create_header(inst->packet, inst->packet_size, + inst->session_id, + core->header_id++); + if (rc) + return rc; + + rc = hfi_create_packet(inst->packet, inst->packet_size, + HFI_CMD_SUBSCRIBE_MODE, + (HFI_HOST_FLAGS_RESPONSE_REQUIRED | + HFI_HOST_FLAGS_INTR_REQUIRED), + HFI_PAYLOAD_U32_ARRAY, + get_hfi_port(inst, port), + core->packet_id++, + &payload[0], + (ARRAY_SIZE(msm_vdec_subscribe_for_metadata) + 1) * + sizeof(u32)); if (rc) return rc; @@ -250,9 +725,6 @@ static int msm_vdec_metadata_delivery(struct msm_vidc_inst *inst, struct msm_vidc_core *core; u32 payload[32] = {0}; u32 i; - u32 metadata_delivery[] = { - HFI_PROP_BUFFER_TAG, - }; if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); @@ -262,24 +734,54 @@ static int msm_vdec_metadata_delivery(struct msm_vidc_inst *inst, d_vpr_h("%s()\n", __func__); payload[0] = HFI_MODE_METADATA; - for (i = 0; i < ARRAY_SIZE(metadata_delivery); i++) - payload[i + 1] = metadata_delivery[i]; + for (i = 0; i < ARRAY_SIZE(msm_vdec_deliver_as_metadata); i++) + payload[i + 1] = msm_vdec_deliver_as_metadata[i]; rc = hfi_create_header(inst->packet, inst->packet_size, - inst->session_id, - core->header_id++); + inst->session_id, + core->header_id++); if (rc) return rc; rc = hfi_create_packet(inst->packet, inst->packet_size, - HFI_CMD_DELIVERY_MODE, - (HFI_HOST_FLAGS_RESPONSE_REQUIRED | - HFI_HOST_FLAGS_INTR_REQUIRED), - HFI_PAYLOAD_U32_ARRAY, - get_hfi_port(inst, port), - core->packet_id++, - &payload[0], - (ARRAY_SIZE(metadata_delivery) + 1) * sizeof(u32)); + HFI_CMD_DELIVERY_MODE, + (HFI_HOST_FLAGS_RESPONSE_REQUIRED | + HFI_HOST_FLAGS_INTR_REQUIRED), + HFI_PAYLOAD_U32_ARRAY, + get_hfi_port(inst, port), + core->packet_id++, + &payload[0], + (ARRAY_SIZE(msm_vdec_deliver_as_metadata) + 1) * sizeof(u32)); + if (rc) + return rc; + + return rc; +} + +static int msm_vdec_subscription(struct msm_vidc_inst *inst, + enum msm_vidc_port_type port) +{ + int rc = 0; + + rc = msm_vdec_port_settings_subscription(inst, port); + if (rc) + return rc; + rc = msm_vdec_property_subscription(inst, port); + if (rc) + return rc; + rc = msm_vdec_metadata_subscription(inst, port); + if (rc) + return rc; + + return rc; +} + +static int msm_vdec_deliveries(struct msm_vidc_inst *inst, + enum msm_vidc_port_type port) +{ + int rc = 0; + + rc = msm_vdec_metadata_delivery(inst, port); if (rc) return rc; @@ -290,7 +792,7 @@ int msm_vdec_stop_input(struct msm_vidc_inst *inst) { int rc = 0; - if (!inst) { + if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -317,10 +819,8 @@ int msm_vdec_start_input(struct msm_vidc_inst *inst) //rc = msm_vidc_check_scaling_supported(inst); if (rc) goto error; - rc = call_session_op(core, decide_work_mode, inst); - if (rc) - goto error; - rc = call_session_op(core, decide_work_route, inst); + + rc = msm_vdec_set_input_properties(inst); if (rc) goto error; @@ -339,10 +839,6 @@ int msm_vdec_start_input(struct msm_vidc_inst *inst) //msm_vidc_update_batching(inst); //msm_vidc_scale_power(inst); - rc = msm_vdec_set_input_properties(inst); - rc = 0; // TODO - if (rc) - goto error; rc = msm_vdec_create_input_internal_buffers(inst); rc = 0; // TODO if (rc) @@ -352,18 +848,11 @@ int msm_vdec_start_input(struct msm_vidc_inst *inst) if (rc) goto error; - rc = msm_vdec_port_settings_subscription(inst, INPUT_PORT); - rc = 0; // TODO + rc = msm_vdec_subscription(inst, INPUT_PORT); if (rc) goto error; - rc = msm_vdec_property_subscription(inst, INPUT_PORT); - rc = 0; // TODO - if (rc) - goto error; - - rc = msm_vdec_metadata_delivery(inst, INPUT_PORT); - rc = 0; // TODO + rc = msm_vdec_deliveries(inst, INPUT_PORT); if (rc) goto error; @@ -385,7 +874,7 @@ int msm_vdec_stop_output(struct msm_vidc_inst *inst) int rc = 0; d_vpr_h("%s()\n", __func__); - if (!inst) { + if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -398,16 +887,20 @@ int msm_vdec_start_output(struct msm_vidc_inst *inst) int rc = 0; d_vpr_h("%s()\n", __func__); - if (!inst) { + if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - rc = msm_vdec_port_settings_subscription(inst, OUTPUT_PORT); + rc = msm_vdec_set_output_properties(inst); if (rc) goto error; - rc = msm_vdec_metadata_delivery(inst, OUTPUT_PORT); + rc = msm_vdec_subscription(inst, OUTPUT_PORT); + if (rc) + goto error; + + rc = msm_vdec_deliveries(inst, OUTPUT_PORT); if (rc) goto error; @@ -467,33 +960,34 @@ int msm_vdec_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) return -EINVAL; } - if (f->type == INPUT_PLANE) { + if (f->type == INPUT_MPLANE) { if (inst->state == MSM_VIDC_START_INPUT) { d_vpr_e("%s: invalid state %d\n", __func__, inst->state); return -EINVAL; } - if (inst->fmts[INPUT_PORT].fmt.pix.pixelformat != - f->fmt.pix.pixelformat) { + if (inst->fmts[INPUT_PORT].fmt.pix_mp.pixelformat != + f->fmt.pix_mp.pixelformat) { s_vpr_e(inst->sid, "%s: codec changed from %#x to %#x\n", __func__, - inst->fmts[INPUT_PORT].fmt.pix.pixelformat, - f->fmt.pix.pixelformat); - rc = msm_vdec_codec_change(inst, f->fmt.pix.pixelformat); + inst->fmts[INPUT_PORT].fmt.pix_mp.pixelformat, + f->fmt.pix_mp.pixelformat); + rc = msm_vdec_codec_change(inst, f->fmt.pix_mp.pixelformat); if (rc) goto err_invalid_fmt; } fmt = &inst->fmts[INPUT_PORT]; - fmt->type = INPUT_PLANE; - fmt->fmt.pix.width = ALIGN(f->fmt.pix.width, 16); - fmt->fmt.pix.height = ALIGN(f->fmt.pix.height, 16); - fmt->fmt.pix.pixelformat = f->fmt.pix.pixelformat; - fmt->fmt.pix.bytesperline = 0; - fmt->fmt.pix.sizeimage = call_session_op(core, buffer_size, - inst, MSM_VIDC_BUF_INPUT); - inst->buffers.input.min_count = - call_session_op(core, min_count, inst, MSM_VIDC_BUF_INPUT); - inst->buffers.input.extra_count = - call_session_op(core, extra_count, inst, MSM_VIDC_BUF_INPUT); + fmt->type = INPUT_MPLANE; + fmt->fmt.pix_mp.width = ALIGN(f->fmt.pix_mp.width, 16); + fmt->fmt.pix_mp.height = ALIGN(f->fmt.pix_mp.height, 16); + fmt->fmt.pix_mp.pixelformat = f->fmt.pix_mp.pixelformat; + fmt->fmt.pix_mp.num_planes = 1; + fmt->fmt.pix_mp.plane_fmt[0].bytesperline = 0; + fmt->fmt.pix_mp.plane_fmt[0].sizeimage = call_session_op(core, + buffer_size, inst, MSM_VIDC_BUF_INPUT); + inst->buffers.input.min_count = call_session_op(core, + min_count, inst, MSM_VIDC_BUF_INPUT); + inst->buffers.input.extra_count = call_session_op(core, + extra_count, inst, MSM_VIDC_BUF_INPUT); if (inst->buffers.input.actual_count < inst->buffers.input.min_count + inst->buffers.input.extra_count) { @@ -501,12 +995,13 @@ int msm_vdec_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) inst->buffers.input.min_count + inst->buffers.input.extra_count; } - inst->buffers.input.size = fmt->fmt.pix.sizeimage; + inst->buffers.input.size = + fmt->fmt.pix_mp.plane_fmt[0].sizeimage; /* update crop dimensions */ inst->crop.x = inst->crop.y = 0; - inst->crop.width = f->fmt.pix.width; - inst->crop.height = f->fmt.pix.height; + inst->crop.width = f->fmt.pix_mp.width; + inst->crop.height = f->fmt.pix_mp.height; //rc = msm_vidc_check_session_supported(inst); if (rc) @@ -515,8 +1010,9 @@ int msm_vdec_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) // mplane->pixelformat); s_vpr_h(inst->sid, "%s: input: codec %#x width %d height %d size %d min_count %d extra_count %d\n", - __func__, f->fmt.pix.pixelformat, f->fmt.pix.width, - f->fmt.pix.height, fmt->fmt.pix.sizeimage, + __func__, f->fmt.pix_mp.pixelformat, f->fmt.pix_mp.width, + f->fmt.pix_mp.height, + fmt->fmt.pix_mp.plane_fmt[0].sizeimage, inst->buffers.input.min_count, inst->buffers.input.extra_count); @@ -545,27 +1041,31 @@ int msm_vdec_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) __func__, fmt->fmt.meta.buffersize, inst->buffers.input_meta.min_count, inst->buffers.input_meta.extra_count); - } else if (f->type == OUTPUT_PLANE) { + } else if (f->type == OUTPUT_MPLANE) { if (inst->state == MSM_VIDC_START_OUTPUT) { d_vpr_e("%s: invalid state %d\n", __func__, inst->state); return -EINVAL; } fmt = &inst->fmts[OUTPUT_PORT]; - fmt->type = OUTPUT_PLANE; - fmt->fmt.pix.pixelformat = f->fmt.pix.pixelformat; - fmt->fmt.pix.width = VENUS_Y_STRIDE( - v4l2_colorformat_to_media(fmt->fmt.pix.pixelformat), - f->fmt.pix.width); - fmt->fmt.pix.height = VENUS_Y_SCANLINES( - v4l2_colorformat_to_media(fmt->fmt.pix.pixelformat), - f->fmt.pix.height); - fmt->fmt.pix.bytesperline = fmt->fmt.pix.width; - fmt->fmt.pix.sizeimage = call_session_op(core, buffer_size, - inst, MSM_VIDC_BUF_OUTPUT); - inst->buffers.output.min_count = - call_session_op(core, min_count, inst, MSM_VIDC_BUF_OUTPUT); - inst->buffers.output.extra_count = - call_session_op(core, extra_count, inst, MSM_VIDC_BUF_OUTPUT); + fmt->type = OUTPUT_MPLANE; + fmt->fmt.pix_mp.pixelformat = f->fmt.pix_mp.pixelformat; + fmt->fmt.pix_mp.width = VENUS_Y_STRIDE( + v4l2_colorformat_to_media( + fmt->fmt.pix_mp.pixelformat, __func__), + f->fmt.pix_mp.width); + fmt->fmt.pix_mp.height = VENUS_Y_SCANLINES( + v4l2_colorformat_to_media( + fmt->fmt.pix_mp.pixelformat, __func__), + f->fmt.pix_mp.height); + fmt->fmt.pix_mp.num_planes = 1; + fmt->fmt.pix_mp.plane_fmt[0].bytesperline = + fmt->fmt.pix_mp.width; + fmt->fmt.pix_mp.plane_fmt[0].sizeimage = call_session_op(core, + buffer_size, inst, MSM_VIDC_BUF_OUTPUT); + inst->buffers.output.min_count = call_session_op(core, + min_count, inst, MSM_VIDC_BUF_OUTPUT); + inst->buffers.output.extra_count = call_session_op(core, + extra_count, inst, MSM_VIDC_BUF_OUTPUT); if (inst->buffers.output.actual_count < inst->buffers.output.min_count + inst->buffers.output.extra_count) { @@ -573,15 +1073,17 @@ int msm_vdec_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) inst->buffers.output.min_count + inst->buffers.output.extra_count; } - inst->buffers.output.size = fmt->fmt.pix.sizeimage; + inst->buffers.output.size = + fmt->fmt.pix_mp.plane_fmt[0].sizeimage; //rc = msm_vidc_check_session_supported(inst); if (rc) goto err_invalid_fmt; s_vpr_h(inst->sid, "%s: output: format %#x width %d height %d size %d min_count %d extra_count %d\n", - __func__, fmt->fmt.pix.pixelformat, fmt->fmt.pix.width, - fmt->fmt.pix.height, fmt->fmt.pix.sizeimage, + __func__, fmt->fmt.pix_mp.pixelformat, fmt->fmt.pix_mp.width, + fmt->fmt.pix_mp.height, + fmt->fmt.pix_mp.plane_fmt[0].sizeimage, inst->buffers.output.min_count, inst->buffers.output.extra_count); } else if (f->type == OUTPUT_META_PLANE) { @@ -649,7 +1151,7 @@ int msm_vdec_enum_fmt(struct msm_vidc_inst *inst, struct v4l2_fmtdesc *f) } core = inst->core; - if (f->type == INPUT_PLANE) { + if (f->type == INPUT_MPLANE) { u32 codecs = core->capabilities[DEC_CODECS].value; while (codecs) { @@ -662,12 +1164,13 @@ int msm_vdec_enum_fmt(struct msm_vidc_inst *inst, struct v4l2_fmtdesc *f) i++; codecs >>= 1; } - f->pixelformat = v4l2_codec_from_driver(array[f->index]); + f->pixelformat = v4l2_codec_from_driver(array[f->index], + __func__); if (!f->pixelformat) return -EINVAL; f->flags = V4L2_FMT_FLAG_COMPRESSED; strlcpy(f->description, "codec", sizeof(f->description)); - } else if (f->type == OUTPUT_PLANE) { + } else if (f->type == OUTPUT_MPLANE) { u32 formats = inst->capabilities->cap[PIX_FMTS].step_or_mask; while (formats) { @@ -680,7 +1183,8 @@ int msm_vdec_enum_fmt(struct msm_vidc_inst *inst, struct v4l2_fmtdesc *f) i++; formats >>= 1; } - f->pixelformat = v4l2_colorformat_from_driver(array[f->index]); + f->pixelformat = v4l2_colorformat_from_driver(array[f->index], + __func__); if (!f->pixelformat) return -EINVAL; strlcpy(f->description, "colorformat", sizeof(f->description)); @@ -715,25 +1219,26 @@ int msm_vdec_inst_init(struct msm_vidc_inst *inst) INIT_DELAYED_WORK(&inst->decode_batch.work, msm_vidc_batch_handler); f = &inst->fmts[INPUT_PORT]; - f->type = INPUT_PLANE; - f->fmt.pix.width = DEFAULT_WIDTH; - f->fmt.pix.height = DEFAULT_HEIGHT; - f->fmt.pix.pixelformat = V4L2_PIX_FMT_H264; - f->fmt.pix.bytesperline = 0; - f->fmt.pix.sizeimage = call_session_op(core, buffer_size, - inst, MSM_VIDC_BUF_INPUT); - inst->buffers.input.min_count = - call_session_op(core, min_count, inst, MSM_VIDC_BUF_INPUT); - inst->buffers.input.extra_count = - call_session_op(core, extra_count, inst, MSM_VIDC_BUF_INPUT); + f->type = INPUT_MPLANE; + f->fmt.pix_mp.width = DEFAULT_WIDTH; + f->fmt.pix_mp.height = DEFAULT_HEIGHT; + f->fmt.pix_mp.pixelformat = V4L2_PIX_FMT_H264; + f->fmt.pix_mp.num_planes = 1; + f->fmt.pix_mp.plane_fmt[0].bytesperline = 0; + f->fmt.pix_mp.plane_fmt[0].sizeimage = call_session_op(core, + buffer_size, inst, MSM_VIDC_BUF_INPUT); + inst->buffers.input.min_count = call_session_op(core, + min_count, inst, MSM_VIDC_BUF_INPUT); + inst->buffers.input.extra_count = call_session_op(core, + extra_count, inst, MSM_VIDC_BUF_INPUT); inst->buffers.input.actual_count = inst->buffers.input.min_count + inst->buffers.input.extra_count; - inst->buffers.input.size = f->fmt.pix.sizeimage; + inst->buffers.input.size = f->fmt.pix_mp.plane_fmt[0].sizeimage; inst->crop.x = inst->crop.y = 0; - inst->crop.width = f->fmt.pix.width; - inst->crop.height = f->fmt.pix.height; + inst->crop.width = f->fmt.pix_mp.width; + inst->crop.height = f->fmt.pix_mp.height; f = &inst->fmts[INPUT_META_PORT]; f->type = INPUT_META_PLANE; @@ -746,23 +1251,26 @@ int msm_vdec_inst_init(struct msm_vidc_inst *inst) inst->buffers.input_meta.size = f->fmt.meta.buffersize; f = &inst->fmts[OUTPUT_PORT]; - f->type = OUTPUT_PLANE; - f->fmt.pix.pixelformat = V4L2_PIX_FMT_NV12_UBWC; - f->fmt.pix.width = VENUS_Y_STRIDE( - v4l2_colorformat_to_media(f->fmt.pix.pixelformat), DEFAULT_WIDTH); - f->fmt.pix.height = VENUS_Y_SCANLINES( - v4l2_colorformat_to_media(f->fmt.pix.pixelformat), DEFAULT_HEIGHT); - f->fmt.pix.bytesperline = f->fmt.pix.width; - f->fmt.pix.sizeimage = call_session_op(core, buffer_size, - inst, MSM_VIDC_BUF_OUTPUT); - inst->buffers.output.min_count = - call_session_op(core, min_count, inst, MSM_VIDC_BUF_OUTPUT); - inst->buffers.output.extra_count = - call_session_op(core, extra_count, inst, MSM_VIDC_BUF_OUTPUT); + f->type = OUTPUT_MPLANE; + f->fmt.pix_mp.pixelformat = V4L2_PIX_FMT_NV12_UBWC; + f->fmt.pix_mp.width = VENUS_Y_STRIDE( + v4l2_colorformat_to_media(f->fmt.pix_mp.pixelformat, __func__), + DEFAULT_WIDTH); + f->fmt.pix_mp.height = VENUS_Y_SCANLINES( + v4l2_colorformat_to_media(f->fmt.pix_mp.pixelformat, __func__), + DEFAULT_HEIGHT); + f->fmt.pix_mp.num_planes = 1; + f->fmt.pix_mp.plane_fmt[0].bytesperline = f->fmt.pix_mp.width; + f->fmt.pix_mp.plane_fmt[0].sizeimage = call_session_op(core, + buffer_size, inst, MSM_VIDC_BUF_OUTPUT); + inst->buffers.output.min_count = call_session_op(core, + min_count, inst, MSM_VIDC_BUF_OUTPUT); + inst->buffers.output.extra_count = call_session_op(core, + extra_count, inst, MSM_VIDC_BUF_OUTPUT); inst->buffers.output.actual_count = inst->buffers.output.min_count + inst->buffers.output.extra_count; - inst->buffers.output.size = f->fmt.pix.sizeimage; + inst->buffers.output.size = f->fmt.pix_mp.plane_fmt[0].sizeimage; f = &inst->fmts[OUTPUT_META_PORT]; f->type = OUTPUT_META_PLANE; @@ -776,9 +1284,11 @@ int msm_vdec_inst_init(struct msm_vidc_inst *inst) inst->prop.frame_rate = DEFAULT_FPS << 16; inst->prop.operating_rate = DEFAULT_FPS << 16; + inst->stage = MSM_VIDC_STAGE_2; + inst->pipe = MSM_VIDC_PIPE_4; rc = msm_vdec_codec_change(inst, - inst->fmts[INPUT_PORT].fmt.pix.pixelformat); + inst->fmts[INPUT_PORT].fmt.pix_mp.pixelformat); return rc; } diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index e991e63b69..feb948f034 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -20,7 +20,7 @@ static int msm_venc_codec_change(struct msm_vidc_inst *inst, u32 codec) d_vpr_h("%s()\n", __func__); - inst->codec = v4l2_codec_to_driver(codec); + inst->codec = v4l2_codec_to_driver(codec, __func__); rc = msm_vidc_get_inst_capability(inst); return rc; } @@ -43,27 +43,31 @@ int msm_venc_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) return -EINVAL; } - if (f->type == INPUT_PLANE) { + if (f->type == INPUT_MPLANE) { if (inst->state == MSM_VIDC_START_INPUT) { d_vpr_e("%s: invalid state %d\n", __func__, inst->state); return -EINVAL; } fmt = &inst->fmts[INPUT_PORT]; - fmt->type = INPUT_PLANE; - fmt->fmt.pix.pixelformat = f->fmt.pix.pixelformat; - fmt->fmt.pix.width = VENUS_Y_STRIDE( - v4l2_colorformat_to_media(fmt->fmt.pix.pixelformat), - f->fmt.pix.width); - fmt->fmt.pix.height = VENUS_Y_SCANLINES( - v4l2_colorformat_to_media(fmt->fmt.pix.pixelformat), - f->fmt.pix.height); - fmt->fmt.pix.bytesperline = fmt->fmt.pix.width; - fmt->fmt.pix.sizeimage = call_session_op(core, buffer_size, - inst, MSM_VIDC_BUF_INPUT); - inst->buffers.input.min_count = - call_session_op(core, min_count, inst, MSM_VIDC_BUF_INPUT); - inst->buffers.input.extra_count = - call_session_op(core, extra_count, inst, MSM_VIDC_BUF_INPUT); + fmt->type = INPUT_MPLANE; + fmt->fmt.pix_mp.pixelformat = f->fmt.pix_mp.pixelformat; + fmt->fmt.pix_mp.width = VENUS_Y_STRIDE( + v4l2_colorformat_to_media(fmt->fmt.pix_mp.pixelformat, + __func__), + f->fmt.pix_mp.width); + fmt->fmt.pix_mp.height = VENUS_Y_SCANLINES( + v4l2_colorformat_to_media(fmt->fmt.pix_mp.pixelformat, + __func__), + f->fmt.pix_mp.height); + fmt->fmt.pix_mp.num_planes = 1; + fmt->fmt.pix_mp.plane_fmt[0].bytesperline = + fmt->fmt.pix_mp.width; + fmt->fmt.pix_mp.plane_fmt[0].sizeimage = call_session_op(core, + buffer_size, inst, MSM_VIDC_BUF_INPUT); + inst->buffers.input.min_count = call_session_op(core, + min_count, inst, MSM_VIDC_BUF_INPUT); + inst->buffers.input.extra_count = call_session_op(core, + extra_count, inst, MSM_VIDC_BUF_INPUT); if (inst->buffers.input.actual_count < inst->buffers.input.min_count + inst->buffers.input.extra_count) { @@ -71,7 +75,8 @@ int msm_venc_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) inst->buffers.input.min_count + inst->buffers.input.extra_count; } - inst->buffers.input.size = fmt->fmt.pix.sizeimage; + inst->buffers.input.size = + fmt->fmt.pix_mp.plane_fmt[0].sizeimage; //rc = msm_vidc_check_session_supported(inst); if (rc) @@ -80,8 +85,9 @@ int msm_venc_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) // mplane->pixelformat); s_vpr_h(inst->sid, "%s: input: codec %#x width %d height %d size %d min_count %d extra_count %d\n", - __func__, f->fmt.pix.pixelformat, f->fmt.pix.width, - f->fmt.pix.height, fmt->fmt.pix.sizeimage, + __func__, f->fmt.pix_mp.pixelformat, f->fmt.pix_mp.width, + f->fmt.pix_mp.height, + fmt->fmt.pix_mp.plane_fmt[0].sizeimage, inst->buffers.input.min_count, inst->buffers.input.extra_count); @@ -110,31 +116,32 @@ int msm_venc_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) __func__, fmt->fmt.meta.buffersize, inst->buffers.input_meta.min_count, inst->buffers.input_meta.extra_count); - } else if (f->type == OUTPUT_PLANE) { + } else if (f->type == OUTPUT_MPLANE) { if (inst->state == MSM_VIDC_START_OUTPUT) { d_vpr_e("%s: invalid state %d\n", __func__, inst->state); return -EINVAL; } fmt = &inst->fmts[OUTPUT_PORT]; - if (fmt->fmt.pix.pixelformat != f->fmt.pix.pixelformat) { + if (fmt->fmt.pix_mp.pixelformat != f->fmt.pix_mp.pixelformat) { s_vpr_e(inst->sid, "%s: codec changed from %#x to %#x\n", __func__, - fmt->fmt.pix.pixelformat, f->fmt.pix.pixelformat); - rc = msm_venc_codec_change(inst, f->fmt.pix.pixelformat); + fmt->fmt.pix_mp.pixelformat, f->fmt.pix_mp.pixelformat); + rc = msm_venc_codec_change(inst, f->fmt.pix_mp.pixelformat); if (rc) goto err_invalid_fmt; } - fmt->type = OUTPUT_PLANE; - fmt->fmt.pix.width = ALIGN(f->fmt.pix.width, 16); - fmt->fmt.pix.height = ALIGN(f->fmt.pix.height, 16); - fmt->fmt.pix.pixelformat = f->fmt.pix.pixelformat; - fmt->fmt.pix.bytesperline = 0; - fmt->fmt.pix.sizeimage = call_session_op(core, buffer_size, - inst, MSM_VIDC_BUF_OUTPUT); - inst->buffers.output.min_count = - call_session_op(core, min_count, inst, MSM_VIDC_BUF_OUTPUT); - inst->buffers.output.extra_count = - call_session_op(core, extra_count, inst, MSM_VIDC_BUF_OUTPUT); + fmt->type = OUTPUT_MPLANE; + fmt->fmt.pix_mp.width = ALIGN(f->fmt.pix_mp.width, 16); + fmt->fmt.pix_mp.height = ALIGN(f->fmt.pix_mp.height, 16); + fmt->fmt.pix_mp.pixelformat = f->fmt.pix_mp.pixelformat; + fmt->fmt.pix_mp.num_planes = 1; + fmt->fmt.pix_mp.plane_fmt[0].bytesperline = 0; + fmt->fmt.pix_mp.plane_fmt[0].sizeimage = call_session_op(core, + buffer_size, inst, MSM_VIDC_BUF_OUTPUT); + inst->buffers.output.min_count = call_session_op(core, + min_count, inst, MSM_VIDC_BUF_OUTPUT); + inst->buffers.output.extra_count = call_session_op(core, + extra_count, inst, MSM_VIDC_BUF_OUTPUT); if (inst->buffers.output.actual_count < inst->buffers.output.min_count + inst->buffers.output.extra_count) { @@ -142,7 +149,8 @@ int msm_venc_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) inst->buffers.output.min_count + inst->buffers.output.extra_count; } - inst->buffers.output.size = fmt->fmt.pix.sizeimage; + inst->buffers.output.size = + fmt->fmt.pix_mp.plane_fmt[0].sizeimage; //rc = msm_vidc_check_session_supported(inst); if (rc) @@ -150,16 +158,17 @@ int msm_venc_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) /* update crop dimensions */ inst->crop.x = inst->crop.y = 0; - inst->crop.width = f->fmt.pix.width; - inst->crop.height = f->fmt.pix.height; + inst->crop.width = f->fmt.pix_mp.width; + inst->crop.height = f->fmt.pix_mp.height; //update_log_ctxt(inst->sid, inst->session_type, // mplane->pixelformat); s_vpr_h(inst->sid, "%s: output: format %#x width %d height %d size %d min_count %d extra_count %d\n", - __func__, fmt->fmt.pix.pixelformat, fmt->fmt.pix.width, - fmt->fmt.pix.height, fmt->fmt.pix.sizeimage, + __func__, fmt->fmt.pix_mp.pixelformat, fmt->fmt.pix_mp.width, + fmt->fmt.pix_mp.height, + fmt->fmt.pix_mp.plane_fmt[0].sizeimage, inst->buffers.output.min_count, inst->buffers.output.extra_count); } else if (f->type == OUTPUT_META_PLANE) { @@ -227,7 +236,7 @@ int msm_venc_enum_fmt(struct msm_vidc_inst *inst, struct v4l2_fmtdesc *f) } core = inst->core; - if (f->type == OUTPUT_PLANE) { + if (f->type == OUTPUT_MPLANE) { u32 codecs = core->capabilities[DEC_CODECS].value; while (codecs) { @@ -240,12 +249,13 @@ int msm_venc_enum_fmt(struct msm_vidc_inst *inst, struct v4l2_fmtdesc *f) i++; codecs >>= 1; } - f->pixelformat = v4l2_codec_from_driver(array[f->index]); + f->pixelformat = v4l2_codec_from_driver(array[f->index], + __func__); if (!f->pixelformat) return -EINVAL; f->flags = V4L2_FMT_FLAG_COMPRESSED; strlcpy(f->description, "codec", sizeof(f->description)); - } else if (f->type == INPUT_PLANE) { + } else if (f->type == INPUT_MPLANE) { u32 formats = inst->capabilities->cap[PIX_FMTS].step_or_mask; while (formats) { @@ -258,7 +268,8 @@ int msm_venc_enum_fmt(struct msm_vidc_inst *inst, struct v4l2_fmtdesc *f) i++; formats >>= 1; } - f->pixelformat = v4l2_colorformat_from_driver(array[f->index]); + f->pixelformat = v4l2_colorformat_from_driver(array[f->index], + __func__); if (!f->pixelformat) return -EINVAL; strlcpy(f->description, "colorformat", sizeof(f->description)); @@ -291,25 +302,26 @@ int msm_venc_inst_init(struct msm_vidc_inst *inst) core = inst->core; f = &inst->fmts[OUTPUT_PORT]; - f->type = OUTPUT_PLANE; - f->fmt.pix.width = DEFAULT_WIDTH; - f->fmt.pix.height = DEFAULT_HEIGHT; - f->fmt.pix.pixelformat = V4L2_PIX_FMT_H264; - f->fmt.pix.bytesperline = 0; - f->fmt.pix.sizeimage = call_session_op(core, buffer_size, - inst, MSM_VIDC_BUF_OUTPUT); - inst->buffers.output.min_count = - call_session_op(core, min_count, inst, MSM_VIDC_BUF_OUTPUT); - inst->buffers.output.extra_count = - call_session_op(core, extra_count, inst, MSM_VIDC_BUF_OUTPUT); + f->type = OUTPUT_MPLANE; + f->fmt.pix_mp.width = DEFAULT_WIDTH; + f->fmt.pix_mp.height = DEFAULT_HEIGHT; + f->fmt.pix_mp.pixelformat = V4L2_PIX_FMT_H264; + f->fmt.pix_mp.num_planes = 1; + f->fmt.pix_mp.plane_fmt[0].bytesperline = 0; + f->fmt.pix_mp.plane_fmt[0].sizeimage = call_session_op(core, + buffer_size, inst, MSM_VIDC_BUF_OUTPUT); + inst->buffers.output.min_count = call_session_op(core, + min_count, inst, MSM_VIDC_BUF_OUTPUT); + inst->buffers.output.extra_count = call_session_op(core, + extra_count, inst, MSM_VIDC_BUF_OUTPUT); inst->buffers.output.actual_count = inst->buffers.output.min_count + inst->buffers.output.extra_count; - inst->buffers.output.size = f->fmt.pix.sizeimage; + inst->buffers.output.size = f->fmt.pix_mp.plane_fmt[0].sizeimage; inst->crop.x = inst->crop.y = 0; - inst->crop.width = f->fmt.pix.width; - inst->crop.height = f->fmt.pix.height; + inst->crop.width = f->fmt.pix_mp.width; + inst->crop.height = f->fmt.pix_mp.height; f = &inst->fmts[OUTPUT_META_PORT]; f->type = OUTPUT_META_PLANE; @@ -319,26 +331,29 @@ int msm_venc_inst_init(struct msm_vidc_inst *inst) inst->buffers.output_meta.min_count = inst->buffers.output.min_count; inst->buffers.output_meta.extra_count = inst->buffers.output.extra_count; inst->buffers.output_meta.actual_count = inst->buffers.output.actual_count; - inst->buffers.output_meta.size = f->fmt.meta.buffersize; + inst->buffers.output_meta.size = f->fmt.meta.buffersize; f = &inst->fmts[INPUT_PORT]; - f->type = INPUT_PLANE; - f->fmt.pix.pixelformat = V4L2_PIX_FMT_NV12_UBWC; - f->fmt.pix.width = VENUS_Y_STRIDE( - v4l2_colorformat_to_media(f->fmt.pix.pixelformat), DEFAULT_WIDTH); - f->fmt.pix.height = VENUS_Y_SCANLINES( - v4l2_colorformat_to_media(f->fmt.pix.pixelformat), DEFAULT_HEIGHT); - f->fmt.pix.bytesperline = f->fmt.pix.width; - f->fmt.pix.sizeimage = call_session_op(core, buffer_size, - inst, MSM_VIDC_BUF_INPUT); - inst->buffers.input.min_count = - call_session_op(core, min_count, inst, MSM_VIDC_BUF_INPUT); - inst->buffers.input.extra_count = - call_session_op(core, extra_count, inst, MSM_VIDC_BUF_INPUT); + f->type = INPUT_MPLANE; + f->fmt.pix_mp.pixelformat = V4L2_PIX_FMT_NV12_UBWC; + f->fmt.pix_mp.width = VENUS_Y_STRIDE( + v4l2_colorformat_to_media(f->fmt.pix_mp.pixelformat, __func__), + DEFAULT_WIDTH); + f->fmt.pix_mp.height = VENUS_Y_SCANLINES( + v4l2_colorformat_to_media(f->fmt.pix_mp.pixelformat, __func__), + DEFAULT_HEIGHT); + f->fmt.pix_mp.num_planes = 1; + f->fmt.pix_mp.plane_fmt[0].bytesperline = f->fmt.pix_mp.width; + f->fmt.pix_mp.plane_fmt[0].sizeimage = call_session_op(core, + buffer_size, inst, MSM_VIDC_BUF_INPUT); + inst->buffers.input.min_count = call_session_op(core, + min_count, inst, MSM_VIDC_BUF_INPUT); + inst->buffers.input.extra_count = call_session_op(core, + extra_count, inst, MSM_VIDC_BUF_INPUT); inst->buffers.input.actual_count = inst->buffers.input.min_count + inst->buffers.input.extra_count; - inst->buffers.input.size = f->fmt.pix.sizeimage; + inst->buffers.input.size = f->fmt.pix_mp.plane_fmt[0].sizeimage; f = &inst->fmts[INPUT_META_PORT]; f->type = INPUT_META_PLANE; @@ -352,9 +367,11 @@ int msm_venc_inst_init(struct msm_vidc_inst *inst) inst->prop.frame_rate = DEFAULT_FPS << 16; inst->prop.operating_rate = DEFAULT_FPS << 16; + inst->stage = MSM_VIDC_STAGE_2; + inst->pipe = MSM_VIDC_PIPE_4; rc = msm_venc_codec_change(inst, - inst->fmts[OUTPUT_PORT].fmt.pix.pixelformat); + inst->fmts[OUTPUT_PORT].fmt.pix_mp.pixelformat); return rc; } diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index 30e48e026e..3e2af014a4 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -98,8 +98,10 @@ int msm_vidc_querycap(void *instance, struct v4l2_capability *cap) strlcpy(cap->driver, MSM_VIDC_DRV_NAME, sizeof(cap->driver)); cap->bus_info[0] = 0; cap->version = MSM_VIDC_VERSION; - cap->device_caps = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_META_CAPTURE | - V4L2_CAP_VIDEO_OUTPUT | V4L2_CAP_META_OUTPUT | + cap->device_caps = V4L2_CAP_VIDEO_CAPTURE_MPLANE | + V4L2_CAP_VIDEO_OUTPUT_MPLANE | + V4L2_CAP_META_CAPTURE | + V4L2_CAP_META_OUTPUT | V4L2_CAP_STREAMING; cap->capabilities = cap->device_caps | V4L2_CAP_DEVICE_CAPS; @@ -213,7 +215,7 @@ int msm_vidc_s_fmt(void *instance, struct v4l2_format *f) return -EINVAL; } - if (f->type == INPUT_PLANE) { + if (f->type == INPUT_MPLANE) { if (inst->state != MSM_VIDC_OPEN && inst->state != MSM_VIDC_START_OUTPUT) { s_vpr_e(inst->sid, @@ -221,7 +223,7 @@ int msm_vidc_s_fmt(void *instance, struct v4l2_format *f) __func__, f->type, inst->state); return -EINVAL; } - } else if (f->type == OUTPUT_PLANE) { + } else if (f->type == OUTPUT_MPLANE) { if (inst->state != MSM_VIDC_OPEN && inst->state != MSM_VIDC_START_INPUT && inst->state != MSM_VIDC_DRAIN_START_INPUT) { @@ -313,7 +315,7 @@ int msm_vidc_reqbufs(void *instance, struct v4l2_requestbuffers *b) mutex_lock(&inst->lock); - if (b->type == INPUT_PLANE) { + if (b->type == INPUT_MPLANE) { if (inst->state != MSM_VIDC_OPEN && inst->state != MSM_VIDC_START_OUTPUT) { s_vpr_e(inst->sid, @@ -322,7 +324,7 @@ int msm_vidc_reqbufs(void *instance, struct v4l2_requestbuffers *b) rc = -EINVAL; goto unlock; } - } else if (b->type == OUTPUT_PLANE) { + } else if (b->type == OUTPUT_MPLANE) { if (inst->state != MSM_VIDC_OPEN && inst->state != MSM_VIDC_START_INPUT && inst->state != MSM_VIDC_DRAIN_START_INPUT) { @@ -372,9 +374,9 @@ int msm_vidc_qbuf(void *instance, struct media_device *mdev, rc = -EINVAL; goto unlock; } - if (b->type == INPUT_PLANE) { + if (b->type == INPUT_MPLANE) { q = &inst->vb2q[INPUT_PORT]; - } else if (b->type == OUTPUT_PLANE) { + } else if (b->type == OUTPUT_MPLANE) { q = &inst->vb2q[OUTPUT_PORT]; } else if (b->type == INPUT_META_PLANE) { q = &inst->vb2q[INPUT_META_PORT]; @@ -409,9 +411,9 @@ int msm_vidc_dqbuf(void *instance, struct v4l2_buffer *b) } mutex_lock(&inst->lock); - if (b->type == INPUT_PLANE) { + if (b->type == INPUT_MPLANE) { q = &inst->vb2q[INPUT_PORT]; - } else if (b->type == OUTPUT_PLANE) { + } else if (b->type == OUTPUT_MPLANE) { q = &inst->vb2q[OUTPUT_PORT]; } else if (b->type == INPUT_META_PLANE) { q = &inst->vb2q[INPUT_META_PORT]; @@ -452,7 +454,7 @@ int msm_vidc_streamon(void *instance, enum v4l2_buf_type type) mutex_lock(&inst->lock); - if (type == INPUT_PLANE) { + if (type == INPUT_MPLANE) { if (inst->state != MSM_VIDC_OPEN && inst->state != MSM_VIDC_START_OUTPUT) { s_vpr_e(inst->sid, @@ -461,7 +463,7 @@ int msm_vidc_streamon(void *instance, enum v4l2_buf_type type) rc = -EINVAL; goto unlock; } - } else if (type == OUTPUT_PLANE) { + } else if (type == OUTPUT_MPLANE) { if (inst->state != MSM_VIDC_OPEN && inst->state != MSM_VIDC_START_INPUT && inst->state != MSM_VIDC_DRAIN_START_INPUT) { @@ -486,7 +488,7 @@ int msm_vidc_streamon(void *instance, enum v4l2_buf_type type) goto unlock; } - if (type == INPUT_PLANE) { + if (type == INPUT_MPLANE) { if (inst->state == MSM_VIDC_OPEN) { new_state = MSM_VIDC_START_INPUT; } else if (inst->state == MSM_VIDC_START_OUTPUT) { @@ -495,7 +497,7 @@ int msm_vidc_streamon(void *instance, enum v4l2_buf_type type) rc = msm_vidc_change_inst_state(inst, new_state, __func__); if (rc) goto unlock; - } else if (type == OUTPUT_PLANE) { + } else if (type == OUTPUT_MPLANE) { if (inst->state == MSM_VIDC_OPEN) { new_state = MSM_VIDC_START_OUTPUT; } else if (inst->state == MSM_VIDC_START_INPUT) { @@ -531,7 +533,7 @@ int msm_vidc_streamoff(void *instance, enum v4l2_buf_type type) mutex_lock(&inst->lock); - if (type == INPUT_PLANE) { + if (type == INPUT_MPLANE) { if (inst->state == MSM_VIDC_OPEN || inst->state == MSM_VIDC_START_OUTPUT) { s_vpr_e(inst->sid, @@ -540,7 +542,7 @@ int msm_vidc_streamoff(void *instance, enum v4l2_buf_type type) rc = -EINVAL; goto unlock; } - } else if (type == OUTPUT_PLANE) { + } else if (type == OUTPUT_MPLANE) { if (inst->state == MSM_VIDC_OPEN || inst->state == MSM_VIDC_START_INPUT) { s_vpr_e(inst->sid, @@ -564,7 +566,7 @@ int msm_vidc_streamoff(void *instance, enum v4l2_buf_type type) goto unlock; } - if (type == INPUT_PLANE) { + if (type == INPUT_MPLANE) { if (inst->state == MSM_VIDC_START_INPUT) { new_state = MSM_VIDC_OPEN; } else if (inst->state == MSM_VIDC_START) { @@ -582,7 +584,7 @@ int msm_vidc_streamoff(void *instance, enum v4l2_buf_type type) rc = msm_vidc_change_inst_state(inst, new_state, __func__); if (rc) goto unlock; - } else if (type == OUTPUT_PLANE) { + } else if (type == OUTPUT_MPLANE) { if (inst->state == MSM_VIDC_START_OUTPUT) { new_state = MSM_VIDC_OPEN; } else if (inst->state == MSM_VIDC_START || @@ -832,7 +834,8 @@ int msm_vidc_close(void *instance) return -EINVAL; } s_vpr_h(inst->sid, "%s()\n", __func__); - rc = msm_vidc_session_close(inst); + msm_vidc_session_close(inst); + msm_vidc_remove_session(inst); return rc; } diff --git a/driver/vidc/src/msm_vidc_buffer.c b/driver/vidc/src/msm_vidc_buffer.c index f95850c6a1..5332c7aa06 100644 --- a/driver/vidc/src/msm_vidc_buffer.c +++ b/driver/vidc/src/msm_vidc_buffer.c @@ -151,10 +151,9 @@ u32 msm_vidc_decoder_output_size(struct msm_vidc_inst *inst) struct v4l2_format *f; f = &inst->fmts[OUTPUT_PORT]; - format = v4l2_colorformat_to_media(f->fmt.pix.pixelformat); - size = VENUS_BUFFER_SIZE(format, f->fmt.pix.width, - f->fmt.pix.height); - size = 4; // TODO + format = v4l2_colorformat_to_media(f->fmt.pix_mp.pixelformat, __func__); + size = VENUS_BUFFER_SIZE(format, f->fmt.pix_mp.width, + f->fmt.pix_mp.height); return size; } @@ -175,10 +174,9 @@ u32 msm_vidc_encoder_input_size(struct msm_vidc_inst *inst) struct v4l2_format *f; f = &inst->fmts[INPUT_PORT]; - format = v4l2_colorformat_to_media(f->fmt.pix.pixelformat); - size = VENUS_BUFFER_SIZE(format, f->fmt.pix.width, - f->fmt.pix.height); - size = 4; // TODO + format = v4l2_colorformat_to_media(f->fmt.pix_mp.pixelformat, __func__); + size = VENUS_BUFFER_SIZE(format, f->fmt.pix_mp.width, + f->fmt.pix_mp.height); return size; } @@ -197,4 +195,4 @@ u32 msm_vidc_encoder_input_meta_size(struct msm_vidc_inst *inst) u32 msm_vidc_encoder_output_meta_size(struct msm_vidc_inst *inst) { return ALIGN(16 * 1024, SZ_4K); -} \ No newline at end of file +} diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index df3ccdaf03..89961165e8 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -642,7 +642,7 @@ int msm_vidc_set_u32(void *instance, if (rc) return -EINVAL; - rc = hfi_packet_session_property(inst, + rc = venus_hfi_session_property(inst, inst->capabilities->cap[cap_id].hfi_id, HFI_HOST_FLAGS_NONE, HFI_PORT_NONE, HFI_PAYLOAD_U32_ENUM, @@ -667,7 +667,7 @@ int msm_vidc_set_s32(void *instance, return -EINVAL; } - rc = hfi_packet_session_property(inst, + rc = venus_hfi_session_property(inst, inst->capabilities->cap[cap_id].hfi_id, HFI_HOST_FLAGS_NONE, HFI_PORT_NONE, HFI_PAYLOAD_S32, diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index d98e4f1dc5..0c87adb603 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -57,21 +57,21 @@ void print_vb2_buffer(const char *str, struct msm_vidc_inst *inst, s_vpr_e(inst->sid, "%s: %s: idx %2d fd %d off %d size %d filled %d\n", - str, vb2->type == INPUT_PLANE ? "INPUT" : "OUTPUT", + str, vb2->type == INPUT_MPLANE ? "INPUT" : "OUTPUT", vb2->index, vb2->planes[0].m.fd, vb2->planes[0].data_offset, vb2->planes[0].length, vb2->planes[0].bytesused); } -enum msm_vidc_buffer_type v4l2_type_to_driver(u32 type) +enum msm_vidc_buffer_type v4l2_type_to_driver(u32 type, const char *func) { enum msm_vidc_buffer_type buffer_type = 0; switch (type) { - case INPUT_PLANE: + case INPUT_MPLANE: buffer_type = MSM_VIDC_BUF_INPUT; break; - case OUTPUT_PLANE: + case OUTPUT_MPLANE: buffer_type = MSM_VIDC_BUF_OUTPUT; break; case INPUT_META_PLANE: @@ -81,23 +81,23 @@ enum msm_vidc_buffer_type v4l2_type_to_driver(u32 type) buffer_type = MSM_VIDC_BUF_OUTPUT_META; break; default: - d_vpr_e("%s: vidc buffer type not found for %#x\n", - __func__, type); + d_vpr_e("%s: invalid v4l2 buffer type %#x\n", func, type); break; } return buffer_type; } -u32 v4l2_type_from_driver(enum msm_vidc_buffer_type buffer_type) +u32 v4l2_type_from_driver(enum msm_vidc_buffer_type buffer_type, + const char *func) { u32 type = 0; switch (buffer_type) { case MSM_VIDC_BUF_INPUT: - type = INPUT_PLANE; + type = INPUT_MPLANE; break; case MSM_VIDC_BUF_OUTPUT: - type = OUTPUT_PLANE; + type = OUTPUT_MPLANE; break; case MSM_VIDC_BUF_INPUT_META: type = INPUT_META_PLANE; @@ -106,14 +106,14 @@ u32 v4l2_type_from_driver(enum msm_vidc_buffer_type buffer_type) type = OUTPUT_META_PLANE; break; default: - d_vpr_e("%s: v4l2 type not found for %#x\n", - __func__, buffer_type); + d_vpr_e("%s: invalid driver buffer type %d\n", + func, buffer_type); break; } - return buffer_type; + return type; } -enum msm_vidc_codec_type v4l2_codec_to_driver(u32 v4l2_codec) +enum msm_vidc_codec_type v4l2_codec_to_driver(u32 v4l2_codec, const char *func) { enum msm_vidc_codec_type codec = 0; @@ -131,13 +131,13 @@ enum msm_vidc_codec_type v4l2_codec_to_driver(u32 v4l2_codec) codec = MSM_VIDC_MPEG2; break; default: - d_vpr_e("%s: vidc codec not found for %#x\n", __func__, v4l2_codec); + d_vpr_e("%s: invalid v4l2 codec %#x\n", func, v4l2_codec); break; } return codec; } -u32 v4l2_codec_from_driver(enum msm_vidc_codec_type codec) +u32 v4l2_codec_from_driver(enum msm_vidc_codec_type codec, const char *func) { u32 v4l2_codec = 0; @@ -155,13 +155,14 @@ u32 v4l2_codec_from_driver(enum msm_vidc_codec_type codec) v4l2_codec = V4L2_PIX_FMT_MPEG2; break; default: - d_vpr_e("%s: v4l2 codec not found for %#x\n", __func__, codec); + d_vpr_e("%s: invalid driver codec %#x\n", func, codec); break; } return v4l2_codec; } -enum msm_vidc_colorformat_type v4l2_colorformat_to_driver(u32 v4l2_colorformat) +enum msm_vidc_colorformat_type v4l2_colorformat_to_driver(u32 v4l2_colorformat, + const char *func) { enum msm_vidc_colorformat_type colorformat = 0; @@ -181,20 +182,19 @@ enum msm_vidc_colorformat_type v4l2_colorformat_to_driver(u32 v4l2_colorformat) case V4L2_PIX_FMT_RGBA8888_UBWC: colorformat = MSM_VIDC_FMT_RGBA8888_UBWC; break; - case V4L2_PIX_FMT_NV12_P010_UBWC: - colorformat = MSM_VIDC_FMT_SDE_Y_CBCR_H2V2_P010_VENUS; - break; - case V4L2_PIX_FMT_SDE_Y_CBCR_H2V2_P010_VENUS: - colorformat = MSM_VIDC_FMT_SDE_Y_CBCR_H2V2_P010_VENUS; + case V4L2_PIX_FMT_NV12_P010: + colorformat = MSM_VIDC_FMT_NV12_P010; break; default: - d_vpr_e("%s: vidc format not found for %#x\n", __func__, v4l2_colorformat); + d_vpr_e("%s: invalid v4l2 color format %#x\n", + func, v4l2_colorformat); break; } return colorformat; } -u32 v4l2_colorformat_from_driver(enum msm_vidc_colorformat_type colorformat) +u32 v4l2_colorformat_from_driver(enum msm_vidc_colorformat_type colorformat, + const char *func) { u32 v4l2_colorformat = 0; @@ -214,20 +214,18 @@ u32 v4l2_colorformat_from_driver(enum msm_vidc_colorformat_type colorformat) case MSM_VIDC_FMT_RGBA8888_UBWC: v4l2_colorformat = V4L2_PIX_FMT_RGBA8888_UBWC; break; - case MSM_VIDC_FMT_NV12_P010_UBWC: - v4l2_colorformat = V4L2_PIX_FMT_SDE_Y_CBCR_H2V2_P010_VENUS; - break; - case MSM_VIDC_FMT_SDE_Y_CBCR_H2V2_P010_VENUS: - v4l2_colorformat = V4L2_PIX_FMT_SDE_Y_CBCR_H2V2_P010_VENUS; + case MSM_VIDC_FMT_NV12_P010: + v4l2_colorformat = V4L2_PIX_FMT_NV12_P010; break; default: - d_vpr_e("%s: v4l2 format not found for %#x\n", __func__, colorformat); + d_vpr_e("%s: invalid driver color format %#x\n", + func, colorformat); break; } return v4l2_colorformat; } -u32 v4l2_colorformat_to_media(u32 v4l2_fmt) +u32 v4l2_colorformat_to_media(u32 v4l2_fmt, const char *func) { switch (v4l2_fmt) { case V4L2_PIX_FMT_NV12: @@ -236,7 +234,7 @@ u32 v4l2_colorformat_to_media(u32 v4l2_fmt) return COLOR_FMT_NV21; case V4L2_PIX_FMT_NV12_512: return COLOR_FMT_NV12_512; - case V4L2_PIX_FMT_SDE_Y_CBCR_H2V2_P010_VENUS: + case V4L2_PIX_FMT_NV12_P010: return COLOR_FMT_P010; case V4L2_PIX_FMT_NV12_UBWC: return COLOR_FMT_NV12_UBWC; @@ -245,9 +243,8 @@ u32 v4l2_colorformat_to_media(u32 v4l2_fmt) case V4L2_PIX_FMT_RGBA8888_UBWC: return COLOR_FMT_RGBA8888_UBWC; default: - d_vpr_e( - "Invalid v4l2 color fmt FMT : %x, Set default(NV12)", - v4l2_fmt); + d_vpr_e("%s: invalid v4l2 color fmt: %#x, set default (NV12)", + func, v4l2_fmt); return COLOR_FMT_NV12; } } @@ -257,16 +254,17 @@ int v4l2_type_to_driver_port(struct msm_vidc_inst *inst, u32 type, { int port; - if (type == INPUT_PLANE) { + if (type == INPUT_MPLANE) { port = INPUT_PORT; } else if (type == INPUT_META_PLANE) { port = INPUT_META_PORT; - } else if (type == OUTPUT_PLANE) { + } else if (type == OUTPUT_MPLANE) { port = OUTPUT_PORT; } else if (type == OUTPUT_META_PLANE) { port = OUTPUT_META_PORT; } else { - s_vpr_e(inst->sid, "%s: invalid type %d\n", func, type); + s_vpr_e(inst->sid, "%s: port not found for v4l2 type %d\n", + func, type); port = -EINVAL; } @@ -317,7 +315,7 @@ u32 msm_vidc_get_buffer_region(struct msm_vidc_inst *inst, region = MSM_VIDC_SECURE_NONPIXEL; break; default: - s_vpr_e(inst->sid, "%s: invalid buffer type %d\n", + s_vpr_e(inst->sid, "%s: invalid driver buffer type %d\n", func, buffer_type); } return region; @@ -347,7 +345,7 @@ struct msm_vidc_buffers *msm_vidc_get_buffers( case MSM_VIDC_BUF_PERSIST_1: return &inst->buffers.persist_1; default: - s_vpr_e(inst->sid, "%s: invalid buffer type %d\n", + s_vpr_e(inst->sid, "%s: invalid driver buffer type %d\n", func, buffer_type); return NULL; } @@ -377,7 +375,7 @@ struct msm_vidc_mappings *msm_vidc_get_mappings( case MSM_VIDC_BUF_PERSIST_1: return &inst->mappings.persist_1; default: - s_vpr_e(inst->sid, "%s: invalid buffer type %d\n", + s_vpr_e(inst->sid, "%s: invalid driver buffer type %d\n", func, buffer_type); return NULL; } @@ -399,7 +397,7 @@ struct msm_vidc_allocations *msm_vidc_get_allocations( case MSM_VIDC_BUF_PERSIST_1: return &inst->allocations.persist_1; default: - s_vpr_e(inst->sid, "%s: invalid buffer type %d\n", + s_vpr_e(inst->sid, "%s: invalid driver buffer type %d\n", func, buffer_type); return NULL; } @@ -457,7 +455,8 @@ int msm_vidc_get_control(struct msm_vidc_inst *inst, struct v4l2_ctrl *ctrl) return rc; } -static int vb2_buffer_to_driver(struct vb2_buffer *vb2, struct msm_vidc_buffer *buf) +static int vb2_buffer_to_driver(struct vb2_buffer *vb2, + struct msm_vidc_buffer *buf) { int rc = 0; @@ -467,7 +466,7 @@ static int vb2_buffer_to_driver(struct vb2_buffer *vb2, struct msm_vidc_buffer * } buf->valid = true; - buf->type = v4l2_type_to_driver(vb2->type); + buf->type = v4l2_type_to_driver(vb2->type, __func__); if (!buf->type) return -EINVAL; buf->index = vb2->index; @@ -475,7 +474,7 @@ static int vb2_buffer_to_driver(struct vb2_buffer *vb2, struct msm_vidc_buffer * buf->data_offset = vb2->planes[0].data_offset; buf->data_size = vb2->planes[0].bytesused; buf->buffer_size = vb2->planes[0].length; - buf->timestamp = vb2->timestamp; + buf->timestamp = do_div(vb2->timestamp, NSEC_PER_USEC); return rc; } @@ -618,7 +617,7 @@ struct msm_vidc_buffer *msm_vidc_get_driver_buf(struct msm_vidc_inst *inst, return NULL; } - buf_type = v4l2_type_to_driver(vb2->type); + buf_type = v4l2_type_to_driver(vb2->type, __func__); if (!buf_type) return NULL; @@ -641,8 +640,8 @@ struct msm_vidc_buffer *msm_vidc_get_driver_buf(struct msm_vidc_inst *inst, } if (found) { /* only YUV buffers are allowed to repeat */ - if ((is_decode_session(inst) && vb2->type != OUTPUT_PLANE) || - (is_encode_session(inst) && vb2->type != INPUT_PLANE)) { + if ((is_decode_session(inst) && vb2->type != OUTPUT_MPLANE) || + (is_encode_session(inst) && vb2->type != INPUT_MPLANE)) { print_vidc_buffer(VIDC_ERR, "existing buffer", inst, buf); goto error; @@ -655,7 +654,7 @@ struct msm_vidc_buffer *msm_vidc_get_driver_buf(struct msm_vidc_inst *inst, goto error; } /* for encoder, treat the repeated buffer as new buffer */ - if (is_encode_session(inst) && vb2->type == INPUT_PLANE) + if (is_encode_session(inst) && vb2->type == INPUT_MPLANE) found = false; } else { buf = kzalloc(sizeof(struct msm_vidc_buffer), GFP_KERNEL); @@ -663,6 +662,7 @@ struct msm_vidc_buffer *msm_vidc_get_driver_buf(struct msm_vidc_inst *inst, s_vpr_e(inst->sid, "%s: alloc failed\n", __func__); goto error; } + INIT_LIST_HEAD(&buf->list); buf->dmabuf = dmabuf; } rc = vb2_buffer_to_driver(vb2, buf); @@ -688,28 +688,30 @@ struct msm_vidc_buffer *get_meta_buffer(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buf) { struct msm_vidc_buffer *mbuf; - struct msm_vidc_buffers *meta; + struct msm_vidc_buffers *buffers; bool found = false; if (!inst || !buf) { d_vpr_e("%s: invalid params\n", __func__); return NULL; } - + /* + * do not call print_vidc_buffer() in this function to avoid recursion, + * this function is called from print_vidc_buffer. + */ if (buf->type == MSM_VIDC_BUF_INPUT) { - meta = &inst->buffers.input_meta; + buffers = &inst->buffers.input_meta; } else if (buf->type == MSM_VIDC_BUF_OUTPUT) { - meta = &inst->buffers.output_meta; + buffers = &inst->buffers.output_meta; } else { s_vpr_e(inst->sid, "%s: invalid buffer type %d\n", __func__, buf->type); return NULL; } - list_for_each_entry(mbuf, &meta->list, list) { + list_for_each_entry(mbuf, &buffers->list, list) { if (!mbuf->valid) continue; - if (mbuf->type == buf->type && - mbuf->index == buf->index) { + if (mbuf->index == buf->index) { found = true; break; } @@ -724,6 +726,7 @@ int msm_vidc_queue_buffer(struct msm_vidc_inst *inst, struct vb2_buffer *vb2) { int rc = 0; struct msm_vidc_buffer *buf; + struct msm_vidc_buffer *meta; int port; if (!inst || !vb2) { @@ -737,8 +740,12 @@ int msm_vidc_queue_buffer(struct msm_vidc_inst *inst, struct vb2_buffer *vb2) /* meta buffer will be queued along with actual buffer */ if (buf->type == MSM_VIDC_BUF_INPUT_META || - buf->type == MSM_VIDC_BUF_OUTPUT_META) + buf->type == MSM_VIDC_BUF_OUTPUT_META) { + buf->attr |= MSM_VIDC_ATTR_DEFERRED; + s_vpr_l(inst->sid, "metabuf fd %3d daddr %#x deferred\n", + buf->fd, buf->device_addr); return 0; + } /* skip queuing if streamon not completed */ port = v4l2_type_to_driver_port(inst, vb2->type, __func__); @@ -751,10 +758,18 @@ int msm_vidc_queue_buffer(struct msm_vidc_inst *inst, struct vb2_buffer *vb2) } print_vidc_buffer(VIDC_HIGH, "qbuf", inst, buf); - rc = venus_hfi_queue_buffer(inst, buf, get_meta_buffer(inst, buf)); + meta = get_meta_buffer(inst, buf); + rc = venus_hfi_queue_buffer(inst, buf, meta); if (rc) return rc; + buf->attr &= ~MSM_VIDC_ATTR_DEFERRED; + buf->attr |= MSM_VIDC_ATTR_QUEUED; + if (meta) { + meta->attr &= ~MSM_VIDC_ATTR_DEFERRED; + meta->attr |= MSM_VIDC_ATTR_QUEUED; + } + return rc; } @@ -839,8 +854,11 @@ int msm_vidc_create_internal_buffers(struct msm_vidc_inst *inst, return -ENOMEM; list_add_tail(&map->list, &mappings->list); - s_vpr_e(inst->sid, "%s: created buffer_type %#x, size %d\n", - __func__, buffer_type, buffers->size); + buffer->device_addr = map->device_addr; + s_vpr_h(inst->sid, + "%s: created buffer_type %#x, size %d device_addr %#x\n", + __func__, buffer_type, buffers->size, + buffer->device_addr); } return 0; @@ -930,6 +948,55 @@ int msm_vidc_release_internal_buffers(struct msm_vidc_inst *inst, return 0; } +int msm_vidc_vb2_buffer_done(struct msm_vidc_inst *inst, + struct msm_vidc_buffer *buf) +{ + int type, port; + struct vb2_queue *q; + struct vb2_buffer *vb2; + struct vb2_v4l2_buffer *vbuf; + bool found; + + if (!inst || !buf) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + type = v4l2_type_from_driver(buf->type, __func__); + if (!type) + return -EINVAL; + port = v4l2_type_to_driver_port(inst, type, __func__); + if (port < 0) + return -EINVAL; + + q = &inst->vb2q[port]; + if (!q->streaming) { + s_vpr_e(inst->sid, "%s: port %d is not streaming\n", + __func__, port); + return -EINVAL; + } + + found = false; + list_for_each_entry(vb2, &q->queued_list, queued_entry) { + if (vb2->state != VB2_BUF_STATE_ACTIVE) + continue; + if (vb2->index == buf->index) { + found = true; + break; + } + } + if (!found) { + print_vidc_buffer(VIDC_ERR, "vb2 not found for", inst, buf); + return -EINVAL; + } + vbuf = to_vb2_v4l2_buffer(vb2); + vbuf->flags = buf->flags; + vb2->timestamp = buf->timestamp * NSEC_PER_USEC; + vb2->planes[0].bytesused = buf->data_size; + vb2_buffer_done(vb2, VB2_BUF_STATE_DONE); + + return 0; +} + int msm_vidc_setup_event_queue(struct msm_vidc_inst *inst) { int rc = 0; @@ -969,7 +1036,7 @@ static int vb2q_init(struct msm_vidc_inst *inst, core = inst->core; q->type = type; - q->io_modes = VB2_MMAP | VB2_USERPTR; + q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF; q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY; q->ops = core->vb2_ops; q->mem_ops = core->vb2_mem_ops; @@ -989,11 +1056,11 @@ int msm_vidc_vb2_queue_init(struct msm_vidc_inst *inst) return -EINVAL; } - rc = vb2q_init(inst, &inst->vb2q[INPUT_PORT], INPUT_PLANE); + rc = vb2q_init(inst, &inst->vb2q[INPUT_PORT], INPUT_MPLANE); if (rc) return rc; - rc = vb2q_init(inst, &inst->vb2q[OUTPUT_PORT], OUTPUT_PLANE); + rc = vb2q_init(inst, &inst->vb2q[OUTPUT_PORT], OUTPUT_MPLANE); if (rc) return rc; @@ -1041,6 +1108,35 @@ int msm_vidc_add_session(struct msm_vidc_inst *inst) return rc; } +int msm_vidc_remove_session(struct msm_vidc_inst *inst) +{ + struct msm_vidc_inst *i, *temp; + struct msm_vidc_core *core; + u32 count = 0; + + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + core = inst->core; + + mutex_lock(&core->lock); + list_for_each_entry_safe(i, temp, &core->instances, list) { + if (i->session_id == inst->session_id) { + list_del_init(&i->list); + d_vpr_h("%s: removed session %d\n", + __func__, i->session_id); + inst->sid = 0; + } + } + list_for_each_entry(i, &core->instances, list) + count++; + d_vpr_h("%s: remaining sessions %d\n", __func__, count); + mutex_unlock(&core->lock); + + return 0; +} + int msm_vidc_session_open(struct msm_vidc_inst *inst) { int rc = 0; @@ -1064,9 +1160,15 @@ int msm_vidc_session_set_codec(struct msm_vidc_inst *inst) return -EINVAL; } - rc = venus_hfi_session_set_codec(inst); + if (inst->codec_set) + return 0; - return rc; + rc = venus_hfi_session_set_codec(inst); + if (rc) + return rc; + + inst->codec_set = true; + return 0; } int msm_vidc_session_close(struct msm_vidc_inst *inst) @@ -1087,7 +1189,7 @@ int msm_vidc_session_close(struct msm_vidc_inst *inst) rc = wait_for_completion_timeout( &inst->completions[SIGNAL_CMD_CLOSE], msecs_to_jiffies( - core->platform->data.core_data[HW_RESPONSE_TIMEOUT].value)); + core->capabilities[HW_RESPONSE_TIMEOUT].value)); if (!rc) { s_vpr_e(inst->sid, "%s: session close timed out\n", __func__); //msm_comm_kill_session(inst); @@ -1350,9 +1452,9 @@ int msm_vidc_core_init(struct msm_vidc_core *core) mutex_unlock(&core->lock); /*TODO: acquire lock or not */ d_vpr_h("%s(): waiting for sys init done, %d ms\n", __func__, - core->platform->data.core_data[HW_RESPONSE_TIMEOUT].value); + core->capabilities[HW_RESPONSE_TIMEOUT].value); rc = wait_for_completion_timeout(&core->init_done, msecs_to_jiffies( - core->platform->data.core_data[HW_RESPONSE_TIMEOUT].value)); + core->capabilities[HW_RESPONSE_TIMEOUT].value)); if (!rc) { d_vpr_e("%s: system init timed out\n", __func__); //msm_comm_kill_session(inst); diff --git a/driver/vidc/src/msm_vidc_dt.c b/driver/vidc/src/msm_vidc_dt.c index 5647fdce0e..82c966618b 100644 --- a/driver/vidc/src/msm_vidc_dt.c +++ b/driver/vidc/src/msm_vidc_dt.c @@ -304,6 +304,7 @@ static int msm_vidc_load_allowed_clocks_table( int rc = 0; struct platform_device *pdev = core->pdev; struct msm_vidc_dt *dt = core->dt; + int i; if (!of_find_property(pdev->dev.of_node, "qcom,allowed-clock-rates", NULL)) { @@ -324,15 +325,20 @@ static int msm_vidc_load_allowed_clocks_table( sort(dt->allowed_clks_tbl, dt->allowed_clks_tbl_size, sizeof(*dt->allowed_clks_tbl), cmp, NULL); + d_vpr_h("Found allowed clock rates\n"); + for (i = 0; i < dt->allowed_clks_tbl_size; i++) + d_vpr_h(" %d\n", dt->allowed_clks_tbl[i]); + return 0; } static int msm_vidc_load_bus_table(struct msm_vidc_core *core) { + int rc = 0; struct platform_device *pdev = core->pdev; struct msm_vidc_dt *dt = core->dt; struct bus_set *buses = &dt->bus_set; - int c = 0, num_buses = 0, rc = 0; + int c = 0, num_buses = 0; u32 *bus_ranges = NULL; num_buses = of_property_count_strings(pdev->dev.of_node, @@ -381,7 +387,8 @@ static int msm_vidc_load_bus_table(struct msm_vidc_core *core) bus->range[0] = bus_ranges[c * 2]; bus->range[1] = bus_ranges[c * 2 + 1]; - d_vpr_h("Found bus %s\n", bus->name); + d_vpr_h("Found bus %s, range [%d %d]\n", bus->name, + bus->range[0], bus->range[1]); } exit: diff --git a/driver/vidc/src/msm_vidc_platform.c b/driver/vidc/src/msm_vidc_platform.c index 9c2955cab4..b992e56644 100644 --- a/driver/vidc/src/msm_vidc_platform.c +++ b/driver/vidc/src/msm_vidc_platform.c @@ -29,10 +29,14 @@ static struct v4l2_ioctl_ops msm_v4l2_ioctl_ops = { .vidioc_enum_framesizes = msm_v4l2_enum_framesizes, .vidioc_s_fmt_vid_cap = msm_v4l2_s_fmt, .vidioc_s_fmt_vid_out = msm_v4l2_s_fmt, + .vidioc_s_fmt_vid_cap_mplane = msm_v4l2_s_fmt, + .vidioc_s_fmt_vid_out_mplane = msm_v4l2_s_fmt, .vidioc_s_fmt_meta_out = msm_v4l2_s_fmt, .vidioc_s_fmt_meta_cap = msm_v4l2_s_fmt, .vidioc_g_fmt_vid_cap = msm_v4l2_g_fmt, .vidioc_g_fmt_vid_out = msm_v4l2_g_fmt, + .vidioc_g_fmt_vid_cap_mplane = msm_v4l2_g_fmt, + .vidioc_g_fmt_vid_out_mplane = msm_v4l2_g_fmt, .vidioc_g_fmt_meta_out = msm_v4l2_g_fmt, .vidioc_g_fmt_meta_cap = msm_v4l2_g_fmt, .vidioc_reqbufs = msm_v4l2_reqbufs, diff --git a/driver/vidc/src/msm_vidc_probe.c b/driver/vidc/src/msm_vidc_probe.c index dc7eadce1e..31090a1154 100644 --- a/driver/vidc/src/msm_vidc_probe.c +++ b/driver/vidc/src/msm_vidc_probe.c @@ -118,8 +118,10 @@ static int msm_vidc_register_video_device(struct msm_vidc_core *core, core->vdev[index].type = type; core->vdev[index].vdev.v4l2_dev = &core->v4l2_dev; core->vdev[index].vdev.device_caps = - V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_META_CAPTURE | - V4L2_CAP_VIDEO_OUTPUT | V4L2_CAP_META_OUTPUT | + V4L2_CAP_VIDEO_CAPTURE_MPLANE | + V4L2_CAP_VIDEO_OUTPUT_MPLANE | + V4L2_CAP_META_CAPTURE | + V4L2_CAP_META_OUTPUT | V4L2_CAP_STREAMING; rc = video_register_device(&core->vdev[index].vdev, VFL_TYPE_GRABBER, nr); diff --git a/driver/vidc/src/msm_vidc_vb2.c b/driver/vidc/src/msm_vidc_vb2.c index 62555f9acd..6e714e052c 100644 --- a/driver/vidc/src/msm_vidc_vb2.c +++ b/driver/vidc/src/msm_vidc_vb2.c @@ -41,6 +41,7 @@ int msm_vidc_queue_setup(struct vb2_queue *q, d_vpr_e("%s: invalid params %pK\n", __func__, inst); return -EINVAL; } + if (inst->state == MSM_VIDC_START) { d_vpr_e("%s: invalid state %d\n", __func__, inst->state); return -EINVAL; @@ -50,28 +51,65 @@ int msm_vidc_queue_setup(struct vb2_queue *q, if (port < 0) return -EINVAL; - if (port == INPUT_PORT || port == INPUT_META_PORT) { + if (port == INPUT_PORT) { if (inst->state == MSM_VIDC_START_INPUT) { d_vpr_e("%s: input invalid state %d\n", __func__, inst->state); return -EINVAL; } - } else if (port == OUTPUT_PORT || port == OUTPUT_META_PORT) { + + *num_planes = 1; + if (*num_buffers < inst->buffers.input.min_count + + inst->buffers.input.extra_count) + *num_buffers = inst->buffers.input.min_count + + inst->buffers.input.extra_count; + inst->buffers.input.actual_count = *num_buffers; + + } else if (port == INPUT_META_PORT) { + if (inst->state == MSM_VIDC_START_INPUT) { + d_vpr_e("%s: input_meta invalid state %d\n", + __func__, inst->state); + return -EINVAL; + } + + *num_planes = 1; + if (*num_buffers < inst->buffers.input_meta.min_count + + inst->buffers.input_meta.extra_count) + *num_buffers = inst->buffers.input_meta.min_count + + inst->buffers.input_meta.extra_count; + inst->buffers.input_meta.actual_count = *num_buffers; + + } else if (port == OUTPUT_PORT) { if (inst->state == MSM_VIDC_START_OUTPUT) { d_vpr_e("%s: output invalid state %d\n", __func__, inst->state); return -EINVAL; } + + *num_planes = 1; + if (*num_buffers < inst->buffers.output.min_count + + inst->buffers.output.extra_count) + *num_buffers = inst->buffers.output.min_count + + inst->buffers.output.extra_count; + inst->buffers.output.actual_count = *num_buffers; + + } else if (port == OUTPUT_META_PORT) { + if (inst->state == MSM_VIDC_START_OUTPUT) { + d_vpr_e("%s: output_meta invalid state %d\n", + __func__, inst->state); + return -EINVAL; + } + + *num_planes = 1; + if (*num_buffers < inst->buffers.output_meta.min_count + + inst->buffers.output_meta.extra_count) + *num_buffers = inst->buffers.output_meta.min_count + + inst->buffers.output_meta.extra_count; + inst->buffers.output_meta.actual_count = *num_buffers; } - *num_planes = 1; - if (*num_buffers < inst->buffers.input.min_count + - inst->buffers.input.extra_count) - *num_buffers = inst->buffers.input.min_count + - inst->buffers.input.extra_count; - inst->buffers.input.actual_count = *num_buffers; if (port == INPUT_PORT || port == OUTPUT_PORT) - sizes[0] = inst->fmts[port].fmt.pix.sizeimage; + sizes[0] = inst->fmts[port].fmt.pix_mp.plane_fmt[0].sizeimage; else if (port == INPUT_META_PORT || port == OUTPUT_META_PORT) sizes[0] = inst->fmts[port].fmt.meta.buffersize; @@ -123,19 +161,19 @@ int msm_vidc_start_streaming(struct vb2_queue *q, unsigned int count) if ((inst->state == MSM_VIDC_START_INPUT) || (inst->state == MSM_VIDC_START && - q->type == INPUT_PLANE)) { + q->type == INPUT_MPLANE)) { rc = msm_vidc_set_fw_list(inst); if (rc) return -EINVAL; } */ - if (q->type == INPUT_PLANE) { + if (q->type == INPUT_MPLANE) { if (is_decode_session(inst)) rc = msm_vdec_start_input(inst); //else if (is_encode_session(inst)) // rc = msm_venc_start_input(inst); - } else if (q->type == OUTPUT_PLANE) { + } else if (q->type == OUTPUT_MPLANE) { if (is_decode_session(inst)) rc = msm_vdec_start_output(inst); //else if (is_encode_session(inst)) diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index 4530986833..5efb7d8031 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -144,7 +144,7 @@ static void __dump_packet(u8 *packet) static void __fatal_error(struct msm_vidc_core *core, bool fatal) { return; - fatal &= core->platform->data.core_data[HW_RESPONSE_TIMEOUT].value; + fatal &= core->capabilities[HW_RESPONSE_TIMEOUT].value; MSM_VIDC_ERROR(fatal); } @@ -273,33 +273,50 @@ int __read_register(struct msm_vidc_core *core, u32 reg) static void __schedule_power_collapse_work(struct msm_vidc_core *core) { - return; - if (!core->platform->data.core_data[SW_PC].value) + if (!core || !core->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); return; + } + if (!core->capabilities[SW_PC].value) { + d_vpr_l("software power collapse not enabled\n"); + return; + } cancel_delayed_work(&core->pm_work); if (!queue_delayed_work(core->pm_workq, &core->pm_work, msecs_to_jiffies( - core->platform->data.core_data[SW_PC_DELAY].value))) { - d_vpr_l("PM work already scheduled\n"); + core->capabilities[SW_PC_DELAY].value))) { + d_vpr_e("power collapse already scheduled\n"); + } else { + d_vpr_l("power collapse scheduled for %d ms\n", + core->capabilities[SW_PC_DELAY].value); } } static void __cancel_power_collapse_work(struct msm_vidc_core *core) { - return; - if (!core->platform->data.core_data[SW_PC].value) + if (!core || !core->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return; + } + if (!core->capabilities[SW_PC].value) return; cancel_delayed_work(&core->pm_work); } -static int __acquire_regulator(struct regulator_info *rinfo, - struct msm_vidc_core *core) +static int __acquire_regulator(struct msm_vidc_core *core, + struct regulator_info *rinfo) { int rc = 0; if (rinfo->has_hw_power_collapse) { + if (regulator_get_mode(rinfo->regulator) == + REGULATOR_MODE_NORMAL) { + d_vpr_h("Skip acquire regulator %s\n", rinfo->name); + goto exit; + } + rc = regulator_set_mode(rinfo->regulator, REGULATOR_MODE_NORMAL); if (rc) { @@ -308,27 +325,29 @@ static int __acquire_regulator(struct regulator_info *rinfo, * about it. We can't disable the regulator w/o * getting it back under s/w control */ - d_vpr_e( - "Failed to acquire regulator control: %s\n", + d_vpr_e("Failed to acquire regulator control: %s\n", rinfo->name); + goto exit; } else { - d_vpr_h("Acquire regulator control from HW: %s\n", + d_vpr_h("Acquired regulator control from HW: %s\n", rinfo->name); } + + if (!regulator_is_enabled(rinfo->regulator)) { + d_vpr_e("%s: Regulator is not enabled %s\n", + __func__, rinfo->name); + __fatal_error(core, true); + } } - if (!regulator_is_enabled(rinfo->regulator)) { - d_vpr_e("Regulator is not enabled %s\n", - rinfo->name); - __fatal_error(core, true); - } - +exit: return rc; } -static int __hand_off_regulator(struct regulator_info *rinfo) +static int __hand_off_regulator(struct msm_vidc_core *core, + struct regulator_info *rinfo) { int rc = 0; @@ -336,13 +355,19 @@ static int __hand_off_regulator(struct regulator_info *rinfo) rc = regulator_set_mode(rinfo->regulator, REGULATOR_MODE_FAST); if (rc) { - d_vpr_e( - "Failed to hand off regulator control: %s\n", + d_vpr_e("Failed to hand off regulator control: %s\n", rinfo->name); + return rc; } else { d_vpr_h("Hand off regulator control to HW: %s\n", rinfo->name); } + + if (!regulator_is_enabled(rinfo->regulator)) { + d_vpr_e("%s: Regulator is not enabled %s\n", + __func__, rinfo->name); + __fatal_error(core, true); + } } return rc; @@ -354,7 +379,7 @@ static int __hand_off_regulators(struct msm_vidc_core *core) int rc = 0, c = 0; venus_hfi_for_each_regulator(core, rinfo) { - rc = __hand_off_regulator(rinfo); + rc = __hand_off_regulator(core, rinfo); /* * If one regulator hand off failed, driver should take * the control for other regulators back. @@ -367,7 +392,7 @@ static int __hand_off_regulators(struct msm_vidc_core *core) return rc; err_reg_handoff_failed: venus_hfi_for_each_regulator_reverse_continue(core, rinfo, c) - __acquire_regulator(rinfo, core); + __acquire_regulator(core, rinfo); return rc; } @@ -490,30 +515,29 @@ static int __set_clk_rate(struct msm_vidc_core *core, int rc = 0; struct clk *clk = cl->clk; + /* bail early if requested clk rate is not changed */ + if (rate == cl->prev) + return 0; + rc = clk_set_rate(clk, rate); if (rc) { - d_vpr_e( - "%s: Failed to set clock rate %llu %s: %d\n", + d_vpr_e("%s: Failed to set clock rate %llu %s: %d\n", __func__, rate, cl->name, rc); return rc; } - - core->power.clk_freq = rate; - + cl->prev = rate; return rc; } static int __set_clocks(struct msm_vidc_core *core, u32 freq) { - struct clock_info *cl; int rc = 0; - - /* bail early if requested clk_freq is not changed */ - if (freq == core->power.clk_freq) - return 0; + struct clock_info *cl; venus_hfi_for_each_clock(core, cl) { if (cl->has_scaling) {/* has_scaling */ + d_vpr_h("Scaling clock %s to %u, prev %llu\n", + cl->name, freq, cl->prev); rc = __set_clk_rate(core, cl, freq); if (rc) return rc; @@ -526,15 +550,19 @@ static int __set_clocks(struct msm_vidc_core *core, u32 freq) static int __scale_clocks(struct msm_vidc_core *core) { int rc = 0; - struct allowed_clock_rates_table *allowed_clks_tbl = NULL; - u32 rate = 0; + struct allowed_clock_rates_table *allowed_clks_tbl; + u32 freq = 0; allowed_clks_tbl = core->dt->allowed_clks_tbl; - rate = core->power.clk_freq ? core->power.clk_freq : + freq = core->power.clk_freq ? core->power.clk_freq : allowed_clks_tbl[0].clock_rate; - rc = __set_clocks(core, rate); - return rc; + rc = __set_clocks(core, freq); + if (rc) + return rc; + + core->power.clk_freq = freq; + return 0; } static int __write_queue(struct msm_vidc_iface_q_info *qinfo, u8 *packet, @@ -806,7 +834,7 @@ err_q_null: return result; } -static int __iface_cmdq_write(struct msm_vidc_core *core, +int __iface_cmdq_write(struct msm_vidc_core *core, void *pkt) { bool needs_interrupt = false; @@ -818,7 +846,7 @@ static int __iface_cmdq_write(struct msm_vidc_core *core, return rc; } -static int __iface_msgq_read(struct msm_vidc_core *core, void *pkt) +int __iface_msgq_read(struct msm_vidc_core *core, void *pkt) { u32 tx_req_is_set = 0; int rc = 0; @@ -856,7 +884,7 @@ read_error_null: return rc; } -static int __iface_dbgq_read(struct msm_vidc_core *core, void *pkt) +int __iface_dbgq_read(struct msm_vidc_core *core, void *pkt) { u32 tx_req_is_set = 0; int rc = 0; @@ -958,7 +986,6 @@ static int __sys_set_debug(struct msm_vidc_core *core, u32 debug) { int rc = 0; - //rc = call_hfi_pkt_op(core, sys_debug_config, pkt, debug); rc = hfi_packet_sys_debug_config(core, core->packet, core->packet_size, debug); if (rc) { @@ -1052,7 +1079,7 @@ static int __power_collapse(struct msm_vidc_core *core, bool force) if (rc) goto skip_power_off; - //__flush_debug_queue(core, core->raw_packet); + __flush_debug_queue(core, core->packet); rc = __suspend(core); if (rc) @@ -1062,6 +1089,7 @@ exit: return rc; skip_power_off: + d_vpr_e("%s: skipped\n", __func__); return -EAGAIN; } @@ -1105,7 +1133,7 @@ static int __protect_cp_mem(struct msm_vidc_core *core) return rc; } - +#if 0 // TODO static int __core_set_resource(struct msm_vidc_core *core, struct vidc_resource_hdr *resource_hdr, void *resource_value) { @@ -1156,7 +1184,7 @@ static int __core_release_resource(struct msm_vidc_core *core, err_create_pkt: return rc; } - +#endif @@ -1281,6 +1309,7 @@ void __disable_unprepare_clks(struct msm_vidc_core *core) __func__, cl->name); clk_disable_unprepare(cl->clk); + cl->prev = 0; if (__clk_is_enabled(cl->clk)) d_vpr_e("%s: clock %s not disabled\n", @@ -1367,6 +1396,7 @@ fail_clk_enable: d_vpr_e("Clock: %s disable and unprepare\n", cl->name); clk_disable_unprepare(cl->clk); + cl->prev = 0; } return rc; @@ -1592,7 +1622,7 @@ static int __disable_regulator(struct regulator_info *rinfo, * is unknown. */ - rc = __acquire_regulator(rinfo, core); + rc = __acquire_regulator(core, rinfo); if (rc) { /* * This is somewhat fatal, but nothing we can do @@ -1632,6 +1662,10 @@ static int __enable_hw_power_collapse(struct msm_vidc_core *core) { int rc = 0; + // TODO: skip if hardwar power control feature is not present + d_vpr_e("%s: skip hand off regulators\n", __func__); + return 0; + rc = __hand_off_regulators(core); if (rc) d_vpr_e("%s: Failed to enable HW power collapse %d\n", @@ -1689,6 +1723,7 @@ int __disable_regulators(struct msm_vidc_core *core) static int __release_subcaches(struct msm_vidc_core *core) { +#if 0 // TODO struct subcache_info *sinfo; int rc = 0; u32 c = 0; @@ -1727,7 +1762,7 @@ static int __release_subcaches(struct msm_vidc_core *core) } core->dt->sys_cache_res_set = false; - +#endif return 0; } @@ -1791,6 +1826,7 @@ err_activate_fail: static int __set_subcaches(struct msm_vidc_core *core) { +#if 0 // TODO int rc = 0; u32 c = 0; struct subcache_info *sinfo; @@ -1845,7 +1881,7 @@ static int __set_subcaches(struct msm_vidc_core *core) err_fail_set_subacaches: __disable_subcaches(core); - +#endif return 0; } /* @@ -2302,6 +2338,7 @@ void venus_hfi_work_handler(struct work_struct *work) call_venus_op(core, clear_interrupt, core); mutex_unlock(&core->lock); + num_responses = __response_handler(core); err_no_work: @@ -2315,12 +2352,11 @@ void venus_hfi_pm_work_handler(struct work_struct *work) int rc = 0; struct msm_vidc_core *core; - core = container_of(work, struct msm_vidc_core, device_work); + core = container_of(work, struct msm_vidc_core, pm_work.work); if (!core) { d_vpr_e("%s: invalid params\n", __func__); return; } - d_vpr_e("%s(): core %pK\n", __func__, core); /* * It is ok to check this variable outside the lock since @@ -2361,6 +2397,36 @@ void venus_hfi_pm_work_handler(struct work_struct *work) mutex_unlock(&core->lock); } +static int __sys_init(struct msm_vidc_core *core) +{ + int rc = 0; + + rc = hfi_packet_sys_init(core, core->packet, core->packet_size); + if (rc) + return rc; + + rc = __iface_cmdq_write(core, core->packet); + if (rc) + return rc; + + return 0; +} + +static int __sys_image_version(struct msm_vidc_core *core) +{ + int rc = 0; + + rc = hfi_packet_image_version(core, core->packet, core->packet_size); + if (rc) + return rc; + + rc = __iface_cmdq_write(core, core->packet); + if (rc) + return rc; + + return 0; +} + int venus_hfi_core_init(struct msm_vidc_core *core) { int rc = 0; @@ -2399,22 +2465,8 @@ int venus_hfi_core_init(struct msm_vidc_core *core) if (rc) goto error; - rc = hfi_packet_sys_init(core, core->packet, core->packet_size); - if (rc) - goto error; - - rc = __iface_cmdq_write(core, core->packet); - if (rc) - goto error; - - rc = hfi_packet_image_version(core, core->packet, core->packet_size); - if (rc) - goto error; - - rc = __iface_cmdq_write(core, core->packet); - if (rc) - goto error; - + __sys_init(core); + __sys_image_version(core); __sys_set_debug(core, (msm_vidc_debug & FW_LOGMASK) >> FW_LOGSHIFT); __enable_subcaches(core); __set_subcaches(core); @@ -2474,6 +2526,7 @@ int venus_hfi_session_open(struct msm_vidc_inst *inst) d_vpr_e("%s(): inst packet allocation failed\n", __func__); return -ENOMEM; } + rc = hfi_packet_session_command(inst, HFI_CMD_OPEN, (HFI_HOST_FLAGS_RESPONSE_REQUIRED | @@ -2504,7 +2557,7 @@ int venus_hfi_session_set_codec(struct msm_vidc_inst *inst) } codec = get_hfi_codec(inst); - rc = hfi_packet_session_property(inst, + rc = venus_hfi_session_property(inst, HFI_PROP_CODEC, HFI_HOST_FLAGS_NONE, HFI_PORT_NONE, @@ -2514,12 +2567,46 @@ int venus_hfi_session_set_codec(struct msm_vidc_inst *inst) if (rc) goto error; +error: + return rc; +} + +int venus_hfi_session_property(struct msm_vidc_inst *inst, + u32 pkt_type, u32 flags, u32 port, u32 payload_type, + void *payload, u32 payload_size) +{ + int rc = 0; + struct msm_vidc_core *core; + + if (!inst || !inst->core || !inst->packet) { + d_vpr_e("%s: Invalid params\n", __func__); + return -EINVAL; + } + core = inst->core; + + rc = hfi_create_header(inst->packet, inst->packet_size, + inst->session_id, core->header_id++); + if (rc) + goto err_prop; + rc = hfi_create_packet(inst->packet, inst->packet_size, + pkt_type, + flags, + payload_type, + port, + core->packet_id++, + payload, + payload_size); + if (rc) + goto err_prop; + rc = __iface_cmdq_write(inst->core, inst->packet); if (rc) - goto error; + goto err_prop; - inst->codec_set = true; -error: + return rc; + +err_prop: + d_vpr_e("%s: create packet failed\n", __func__); return rc; } diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index 687c1684da..d4c1473144 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -33,8 +33,8 @@ bool is_valid_hfi_buffer_type(struct msm_vidc_inst *inst, } if (buffer_type != HFI_BUFFER_BITSTREAM && - buffer_type != HFI_BUFFER_RAW && - buffer_type != HFI_BUFFER_METADATA) { + buffer_type != HFI_BUFFER_RAW && + buffer_type != HFI_BUFFER_METADATA) { s_vpr_e(inst->sid, "%s: invalid buffer type %#x\n", func, buffer_type); return false; @@ -210,29 +210,174 @@ static int handle_session_drain(struct msm_vidc_inst *inst, return 0; } -static void handle_input_buffer(struct msm_vidc_inst *inst, +static int handle_input_buffer(struct msm_vidc_inst *inst, struct hfi_buffer *buffer) { + int rc = 0; + struct msm_vidc_buffers *buffers; + struct msm_vidc_buffer *buf; + bool found; + + buffers = msm_vidc_get_buffers(inst, MSM_VIDC_BUF_INPUT, __func__); + if (!buffers) + return -EINVAL; + + found = false; + list_for_each_entry(buf, &buffers->list, list) { + if (buf->device_addr == buffer->base_address) { + found = true; + break; + } + } + if (!found) { + s_vpr_e(inst->sid, "%s: buffer not found for idx %d addr %#x\n", + __func__, buffer->index, buffer->base_address); + return -EINVAL; + } + buf->data_offset = buffer->data_offset; + buf->data_size = buffer->data_size; + buf->attr &= ~MSM_VIDC_ATTR_QUEUED; + buf->flags = 0; + if (buffer->flags & HFI_BUF_FW_FLAG_CORRUPT) { + s_vpr_h(inst->sid, "%s: data corrupted\n", __func__); + buf->flags |= MSM_VIDC_BUF_FLAG_ERROR; + } + if (buffer->flags & HFI_BUF_FW_FLAG_UNSUPPORTED) { + s_vpr_e(inst->sid, "%s: unsupported input\n", __func__); + buf->flags |= MSM_VIDC_BUF_FLAG_ERROR; + // TODO: move inst->state to error state + } + + print_vidc_buffer(VIDC_HIGH, "EBD", inst, buf); + msm_vidc_vb2_buffer_done(inst, buf); + msm_vidc_put_driver_buf(inst, buf); + + return rc; } -static void handle_output_buffer(struct msm_vidc_inst *inst, +static int handle_output_buffer(struct msm_vidc_inst *inst, struct hfi_buffer *buffer) { + int rc = 0; + struct msm_vidc_buffers *buffers; + struct msm_vidc_buffer *buf; + bool found; + + buffers = msm_vidc_get_buffers(inst, MSM_VIDC_BUF_OUTPUT, __func__); + if (!buffers) + return -EINVAL; + + found = false; + list_for_each_entry(buf, &buffers->list, list) { + if (buf->device_addr == buffer->base_address) { + found = true; + break; + } + } + if (!found) { + s_vpr_e(inst->sid, "%s: invalid idx %d daddr %#x\n", + __func__, buffer->index, buffer->base_address); + return -EINVAL; + } + buf->data_offset = buffer->data_offset; + buf->data_size = buffer->data_size; + buf->timestamp = buffer->timestamp; + + buf->attr &= ~MSM_VIDC_ATTR_QUEUED; + if (buffer->flags & HFI_BUF_FW_FLAG_READONLY) + buf->attr |= MSM_VIDC_ATTR_READ_ONLY; + else + buf->attr &= ~MSM_VIDC_ATTR_READ_ONLY; + + buf->flags = 0; + if (buffer->flags & HFI_BUF_FW_FLAG_KEYFRAME) + buf->flags |= MSM_VIDC_BUF_FLAG_KEYFRAME; + if (buffer->flags & HFI_BUF_FW_FLAG_LAST) + buf->flags |= MSM_VIDC_BUF_FLAG_LAST; + if (buffer->flags & HFI_BUF_FW_FLAG_CORRUPT) + buf->flags |= MSM_VIDC_BUF_FLAG_ERROR; + if (buffer->flags & HFI_BUF_FW_FLAG_CODEC_CONFIG) + buf->flags |= MSM_VIDC_BUF_FLAG_CODECCONFIG; + if (buffer->flags & HFI_BUF_FW_FLAG_SUBFRAME) + buf->flags |= MSM_VIDC_BUF_FLAG_SUBFRAME; + + print_vidc_buffer(VIDC_HIGH, "FBD", inst, buf); + msm_vidc_vb2_buffer_done(inst, buf); + msm_vidc_put_driver_buf(inst, buf); + + return rc; } -static void handle_input_metadata_buffer(struct msm_vidc_inst *inst, +static int handle_input_metadata_buffer(struct msm_vidc_inst *inst, struct hfi_buffer *buffer) { + int rc = 0; + struct msm_vidc_buffers *buffers; + struct msm_vidc_buffer *buf; + bool found; + + buffers = msm_vidc_get_buffers(inst, MSM_VIDC_BUF_INPUT_META, __func__); + if (!buffers) + return -EINVAL; + + found = false; + list_for_each_entry(buf, &buffers->list, list) { + if (buf->device_addr == buffer->base_address) { + found = true; + break; + } + } + if (found) { + s_vpr_h(inst->sid, + "input metadata buffer done: idx %d fd %d daddr %#x\n", + buf->index, buf->fd, buf->device_addr); + msm_vidc_vb2_buffer_done(inst, buf); + msm_vidc_put_driver_buf(inst, buf); + } else { + s_vpr_e(inst->sid, "%s: invalid idx %d daddr %#x\n", + __func__, buffer->index, buffer->base_address); + return -EINVAL; + } + return rc; } -static void handle_output_metadata_buffer(struct msm_vidc_inst *inst, +static int handle_output_metadata_buffer(struct msm_vidc_inst *inst, struct hfi_buffer *buffer) { + int rc = 0; + struct msm_vidc_buffers *buffers; + struct msm_vidc_buffer *buf; + bool found; + + buffers = msm_vidc_get_buffers(inst, MSM_VIDC_BUF_OUTPUT_META, __func__); + if (!buffers) + return -EINVAL; + + found = false; + list_for_each_entry(buf, &buffers->list, list) { + if (buf->device_addr == buffer->base_address) { + found = true; + break; + } + } + if (found) { + s_vpr_h(inst->sid, + "output metadata buffer done: idx %d fd %d daddr %#x\n", + buf->index, buf->fd, buf->device_addr); + msm_vidc_vb2_buffer_done(inst, buf); + msm_vidc_put_driver_buf(inst, buf); + } else { + s_vpr_e(inst->sid, "%s: invalid idx %d daddr %#x\n", + __func__, buffer->index, buffer->base_address); + return -EINVAL; + } + return rc; } static int handle_session_buffer(struct msm_vidc_inst *inst, struct hfi_packet *pkt) { + int rc = 0; struct hfi_buffer *buffer; u32 buf_type = 0, port_type = 0; @@ -255,38 +400,37 @@ static int handle_session_buffer(struct msm_vidc_inst *inst, return 0; } - s_vpr_h(inst->sid, "%s: Received buffer of type %#x\n", - __func__, buf_type); - if (is_encode_session(inst)) { if (port_type == HFI_PORT_BITSTREAM) { if (buf_type == HFI_BUFFER_METADATA) - handle_output_metadata_buffer(inst, buffer); + rc = handle_output_metadata_buffer(inst, buffer); else if (buf_type == HFI_BUFFER_BITSTREAM) - handle_output_buffer(inst, buffer); - } else if (port_type == HFI_PORT_RAW) { + rc = handle_output_buffer(inst, buffer); + } else if (port_type == HFI_PORT_RAW) { if (buf_type == HFI_BUFFER_METADATA) - handle_input_metadata_buffer(inst, buffer); + rc = handle_input_metadata_buffer(inst, buffer); else if (buf_type == HFI_BUFFER_RAW) - handle_input_buffer(inst, buffer); + rc = handle_input_buffer(inst, buffer); } } else if (is_decode_session(inst)) { if (port_type == HFI_PORT_BITSTREAM) { if (buf_type == HFI_BUFFER_METADATA) - handle_input_metadata_buffer(inst, buffer); + rc = handle_input_metadata_buffer(inst, buffer); else if (buf_type == HFI_BUFFER_BITSTREAM) - handle_input_buffer(inst, buffer); - } else if (port_type == HFI_PORT_RAW) { + rc = handle_input_buffer(inst, buffer); + } else if (port_type == HFI_PORT_RAW) { if (buf_type == HFI_BUFFER_METADATA) - handle_output_metadata_buffer(inst, buffer); + rc = handle_output_metadata_buffer(inst, buffer); else if (buf_type == HFI_BUFFER_RAW) - handle_output_buffer(inst, buffer); + rc = handle_output_buffer(inst, buffer); } } else { - s_vpr_e(inst->sid, "%s: invalid session\n", __func__); + s_vpr_e(inst->sid, "%s: invalid session %d\n", + __func__, inst->domain); + return -EINVAL; } - return 0; + return rc; } static int handle_port_settings_change(struct msm_vidc_inst *inst, @@ -424,15 +568,18 @@ static int handle_session_response(struct msm_vidc_core *core, inst = get_inst(core, hdr->session_id); if (!inst) { d_vpr_e("%s: invalid params\n", __func__); - goto exit; + return -EINVAL; } + mutex_lock(&inst->lock); pkt = (struct hfi_packet *)((u8 *)hdr + sizeof(struct hfi_header)); for (i = 0; i < hdr->num_packets; i++) { if (validate_packet((u8 *)pkt, core->response_packet, - core->packet_size, __func__)) + core->packet_size, __func__)) { + rc = -EINVAL; goto exit; + } if (pkt->type < HFI_CMD_END && pkt->type > HFI_CMD_BEGIN) { rc = handle_session_command(inst, pkt); } else if (pkt->type > HFI_PROP_BEGIN && @@ -444,11 +591,13 @@ static int handle_session_response(struct msm_vidc_core *core, } else { s_vpr_e(inst->sid, "%s: Unknown packet type: %#x\n", __func__, pkt->type); + rc = -EINVAL; goto exit; } pkt += pkt->size; } exit: + mutex_unlock(&inst->lock); put_inst(inst); return rc; } diff --git a/include/uapi/vidc/media/msm_vidc_utils.h b/include/uapi/vidc/media/msm_vidc_utils.h index f5ab05e0ff..9ceef699ef 100644 --- a/include/uapi/vidc/media/msm_vidc_utils.h +++ b/include/uapi/vidc/media/msm_vidc_utils.h @@ -15,12 +15,11 @@ /* NV12_512 8-bit Y/CbCr 4:2:0 */ #define V4L2_PIX_FMT_NV12_512 v4l2_fourcc('Q', '5', '1', '2') /* NV12 10-bit Y/CbCr 4:2:0 */ -#define V4L2_PIX_FMT_NV12_P010_UBWC v4l2_fourcc('Q', '1', '2', 'B') +#define V4L2_PIX_FMT_NV12_P010 v4l2_fourcc('Q', 'P', '1', '0') /* UBWC 10-bit Y/CbCr 4:2:0 */ -#define V4L2_PIX_FMT_NV12_TP10_UBWC v4l2_fourcc('Q', '1', '2', 'A') +#define V4L2_PIX_FMT_NV12_TP10_UBWC v4l2_fourcc('Q', 'T', 'P', '0') #define V4L2_PIX_FMT_RGBA8888_UBWC v4l2_fourcc('Q', 'R', 'G', 'B') /* Y/CbCr 4:2:0 P10 Venus */ -#define V4L2_PIX_FMT_SDE_Y_CBCR_H2V2_P010_VENUS v4l2_fourcc('Q', 'P', '1', '0') #define V4L2_PIX_FMT_VIDC_META v4l2_fourcc('Q', 'M', 'E', 'T') /* vendor color format end */ From 2bbf35063f88be09595ee9e3a0ab281f7d1eae2e Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Thu, 8 Oct 2020 14:32:12 -0700 Subject: [PATCH 0017/1061] video: driver: fixes for streamoff/streamon Changes to fix streamon/streamoff functionality. Change-Id: Ibefa04c5812e0f5a42c578e72eea7650e37c18b0 Signed-off-by: Akshata Sahukar --- driver/platform/waipio/src/msm_vidc_waipio.c | 4 +- .../variant/iris2/inc/msm_vidc_buffer_iris2.h | 15 +- .../variant/iris2/src/msm_vidc_buffer_iris2.c | 175 +++++++++++++- driver/variant/iris2/src/msm_vidc_iris2.c | 157 +----------- driver/vidc/inc/hfi_command.h | 21 +- driver/vidc/inc/msm_vidc_driver.h | 13 +- driver/vidc/inc/msm_vidc_inst.h | 27 ++- driver/vidc/inc/msm_vidc_internal.h | 14 +- driver/vidc/inc/venus_hfi.h | 6 + driver/vidc/src/hfi_packet.c | 34 ++- driver/vidc/src/msm_vdec.c | 226 ++++++++---------- driver/vidc/src/msm_vidc.c | 31 +-- driver/vidc/src/msm_vidc_driver.c | 124 +++++++--- driver/vidc/src/msm_vidc_probe.c | 15 +- driver/vidc/src/msm_vidc_vb2.c | 43 ++++ driver/vidc/src/venus_hfi.c | 124 ++++++++-- driver/vidc/src/venus_hfi_response.c | 137 ++++++++--- 17 files changed, 704 insertions(+), 462 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 7de13f1e0f..b3217228df 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -59,11 +59,11 @@ static struct msm_platform_core_capability core_data_waipio[] = { {MAX_MBPF_B_FRAME, 32640}, /* 3840x2176/256 */ {MAX_MBPS_B_FRAME, 1958400}, /* 3840x2176/256 MBs@60fps */ {NUM_VPP_PIPE, 4}, - {SW_PC, 1}, + {SW_PC, 0}, {SW_PC_DELAY, 1500}, /* 1500 ms */ {FW_UNLOAD, 0}, {FW_UNLOAD_DELAY, 1000}, /* 1000 ms */ - {HW_RESPONSE_TIMEOUT, 1000}, /* 1000 ms */ + {HW_RESPONSE_TIMEOUT, 3000}, /* 1000 ms */ {DEBUG_TIMEOUT, 0}, {PREFIX_BUF_COUNT_PIX, 18}, {PREFIX_BUF_SIZE_PIX, 13434880}, /* Calculated by VENUS_BUFFER_SIZE for 4096x2160 UBWC */ diff --git a/driver/variant/iris2/inc/msm_vidc_buffer_iris2.h b/driver/variant/iris2/inc/msm_vidc_buffer_iris2.h index ba29d574ff..e3a319c415 100644 --- a/driver/variant/iris2/inc/msm_vidc_buffer_iris2.h +++ b/driver/variant/iris2/inc/msm_vidc_buffer_iris2.h @@ -8,13 +8,10 @@ #include "msm_vidc_inst.h" -u32 msm_vidc_decoder_scratch_size_iris2(struct msm_vidc_inst *inst); -u32 msm_vidc_decoder_scratch_1_size_iris2(struct msm_vidc_inst *inst); -u32 msm_vidc_decoder_persist_1_size_iris2(struct msm_vidc_inst *inst); - -u32 msm_vidc_encoder_scratch_size_iris2(struct msm_vidc_inst *inst); -u32 msm_vidc_encoder_scratch_1_size_iris2(struct msm_vidc_inst *inst); -u32 msm_vidc_encoder_scratch_2_size_iris2(struct msm_vidc_inst *inst); -u32 msm_vidc_encoder_persist_size_iris2(struct msm_vidc_inst *inst); - +int msm_buffer_size_iris2(struct msm_vidc_inst *inst, + enum msm_vidc_buffer_type buffer_type); +int msm_buffer_min_count_iris2(struct msm_vidc_inst *inst, + enum msm_vidc_buffer_type buffer_type); +int msm_buffer_extra_count_iris2(struct msm_vidc_inst *inst, + enum msm_vidc_buffer_type buffer_type); #endif // __H_MSM_VIDC_BUFFER_IRIS2_H__ diff --git a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c index 427f2184b7..13563c2c1a 100644 --- a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c @@ -1003,7 +1003,7 @@ static u32 calculate_mpeg2d_persist1_size(void) } /* decoder internal buffers */ -u32 msm_vidc_decoder_scratch_size_iris2(struct msm_vidc_inst *inst) +static u32 msm_vidc_decoder_bin_size_iris2(struct msm_vidc_inst *inst) { struct msm_vidc_core *core; u32 size = 0; @@ -1050,7 +1050,7 @@ u32 msm_vidc_decoder_scratch_size_iris2(struct msm_vidc_inst *inst) return size; } -u32 msm_vidc_decoder_scratch_1_size_iris2(struct msm_vidc_inst *inst) +static u32 msm_vidc_decoder_scratch_1_size_iris2(struct msm_vidc_inst *inst) { struct msm_vidc_core *core; u32 size = 0; @@ -1101,7 +1101,7 @@ u32 msm_vidc_decoder_scratch_1_size_iris2(struct msm_vidc_inst *inst) return size; } -u32 msm_vidc_decoder_persist_1_size_iris2(struct msm_vidc_inst *inst) +static u32 msm_vidc_decoder_persist_size_iris2(struct msm_vidc_inst *inst) { u32 size = 0; @@ -1125,7 +1125,7 @@ u32 msm_vidc_decoder_persist_1_size_iris2(struct msm_vidc_inst *inst) } /* encoder internal buffers */ -u32 msm_vidc_encoder_scratch_size_iris2(struct msm_vidc_inst *inst) +static u32 msm_vidc_encoder_bin_size_iris2(struct msm_vidc_inst *inst) { struct msm_vidc_core *core; u32 size = 0; @@ -1161,7 +1161,7 @@ u32 msm_vidc_encoder_scratch_size_iris2(struct msm_vidc_inst *inst) return size; } -u32 msm_vidc_encoder_scratch_1_size_iris2(struct msm_vidc_inst *inst) +static u32 msm_vidc_encoder_scratch_1_size_iris2(struct msm_vidc_inst *inst) { struct msm_vidc_core *core; u32 size = 0; @@ -1198,7 +1198,7 @@ u32 msm_vidc_encoder_scratch_1_size_iris2(struct msm_vidc_inst *inst) return size; } -u32 msm_vidc_encoder_scratch_2_size_iris2(struct msm_vidc_inst *inst) +static u32 msm_vidc_encoder_dpb_size_iris2(struct msm_vidc_inst *inst) { u32 width, height, num_ref; bool is_tenbit = false; @@ -1212,14 +1212,171 @@ u32 msm_vidc_encoder_scratch_2_size_iris2(struct msm_vidc_inst *inst) f = &inst->fmts[OUTPUT_PORT]; width = f->fmt.pix_mp.width; height = f->fmt.pix_mp.height; - num_ref = 4; //msm_vidc_get_num_ref_frames(inst); - is_tenbit = false; //(inst->bit_depth == MSM_VIDC_BIT_DEPTH_10); + num_ref = 4; // TODO: msm_vidc_get_num_ref_frames(inst); + is_tenbit = false; // TODO: (inst->bit_depth == MSM_VIDC_BIT_DEPTH_10); return calculate_enc_scratch2_size(inst, width, height, num_ref, is_tenbit); } -u32 msm_vidc_encoder_persist_size_iris2(struct msm_vidc_inst *inst) +static u32 msm_vidc_encoder_persist_size_iris2(struct msm_vidc_inst *inst) { return calculate_enc_persist_size(); } + +int msm_buffer_size_iris2(struct msm_vidc_inst *inst, + enum msm_vidc_buffer_type buffer_type) +{ + int size = 0; + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return size; + } + + if (is_decode_session(inst)) { + switch (buffer_type) { + case MSM_VIDC_BUF_INPUT: + size = msm_vidc_decoder_input_size(inst); + break; + case MSM_VIDC_BUF_OUTPUT: + size = msm_vidc_decoder_output_size(inst); + break; + case MSM_VIDC_BUF_INPUT_META: + size = msm_vidc_decoder_input_meta_size(inst); + break; + case MSM_VIDC_BUF_OUTPUT_META: + size = msm_vidc_decoder_output_meta_size(inst); + break; + case MSM_VIDC_BUF_BIN: + size = msm_vidc_decoder_bin_size_iris2(inst); + break; + case MSM_VIDC_BUF_COMV: + case MSM_VIDC_BUF_NON_COMV: + case MSM_VIDC_BUF_LINE: + size = msm_vidc_decoder_scratch_1_size_iris2(inst); + break; + case MSM_VIDC_BUF_PERSIST: + //size = msm_vidc_decoder_persist_1_size_iris2(inst); + size = msm_vidc_decoder_persist_size_iris2(inst); + break; + default: + break; + } + } else if (is_encode_session(inst)) { + switch (buffer_type) { + case MSM_VIDC_BUF_INPUT: + size = msm_vidc_encoder_input_size(inst); + break; + case MSM_VIDC_BUF_OUTPUT: + size = msm_vidc_encoder_output_size(inst); + break; + case MSM_VIDC_BUF_INPUT_META: + size = msm_vidc_encoder_input_meta_size(inst); + break; + case MSM_VIDC_BUF_OUTPUT_META: + size = msm_vidc_encoder_output_meta_size(inst); + break; + case MSM_VIDC_BUF_BIN: + size = msm_vidc_encoder_bin_size_iris2(inst); + break; + case MSM_VIDC_BUF_COMV: + case MSM_VIDC_BUF_NON_COMV: + case MSM_VIDC_BUF_LINE: + size = msm_vidc_encoder_scratch_1_size_iris2(inst); + break; + case MSM_VIDC_BUF_DPB: + size = msm_vidc_encoder_dpb_size_iris2(inst); + break; + case MSM_VIDC_BUF_PERSIST: + size = msm_vidc_encoder_persist_size_iris2(inst); + break; + default: + break; + } + } + + return size; +} + +int msm_buffer_min_count_iris2(struct msm_vidc_inst *inst, + enum msm_vidc_buffer_type buffer_type) +{ + int count = 0; + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (is_decode_session(inst)) { + switch (buffer_type) { + case MSM_VIDC_BUF_INPUT: + case MSM_VIDC_BUF_INPUT_META: + count = msm_vidc_input_min_count(inst); + break; + case MSM_VIDC_BUF_OUTPUT: + case MSM_VIDC_BUF_OUTPUT_META: + count = msm_vidc_output_min_count(inst); + break; + case MSM_VIDC_BUF_BIN: + case MSM_VIDC_BUF_COMV: + case MSM_VIDC_BUF_NON_COMV: + case MSM_VIDC_BUF_LINE: + case MSM_VIDC_BUF_PERSIST: + count = 1; + break; + default: + break; + } + } else if (is_encode_session(inst)) { + switch (buffer_type) { + case MSM_VIDC_BUF_INPUT: + case MSM_VIDC_BUF_INPUT_META: + count = msm_vidc_input_min_count(inst); + break; + case MSM_VIDC_BUF_OUTPUT: + case MSM_VIDC_BUF_OUTPUT_META: + count = msm_vidc_output_min_count(inst); + break; + case MSM_VIDC_BUF_BIN: + case MSM_VIDC_BUF_COMV: + case MSM_VIDC_BUF_NON_COMV: + case MSM_VIDC_BUF_LINE: + case MSM_VIDC_BUF_DPB: + case MSM_VIDC_BUF_PERSIST: + count = 1; + break; + default: + break; + } + } + + return count; +} + +int msm_buffer_extra_count_iris2(struct msm_vidc_inst *inst, + enum msm_vidc_buffer_type buffer_type) +{ + int count = 0; + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + switch (buffer_type) { + case MSM_VIDC_BUF_INPUT: + case MSM_VIDC_BUF_INPUT_META: + count = msm_vidc_input_extra_count(inst); + break; + case MSM_VIDC_BUF_OUTPUT: + case MSM_VIDC_BUF_OUTPUT_META: + count = msm_vidc_output_extra_count(inst); + break; + default: + break; + } + + return count; +} diff --git a/driver/variant/iris2/src/msm_vidc_iris2.c b/driver/variant/iris2/src/msm_vidc_iris2.c index 75a7ed998d..20e8b3c8ee 100644 --- a/driver/variant/iris2/src/msm_vidc_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_iris2.c @@ -495,161 +495,10 @@ static struct msm_vidc_venus_ops iris2_ops = { .noc_error_info = __noc_error_info_iris2, }; -static int msm_vidc_buffer_size_iris2(struct msm_vidc_inst *inst, - enum msm_vidc_buffer_type buffer_type) -{ - int size = 0; - - d_vpr_h("%s()\n", __func__); - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return size; - } - - if (is_decode_session(inst)) { - switch (buffer_type) { - case MSM_VIDC_BUF_INPUT: - size = msm_vidc_decoder_input_size(inst); - break; - case MSM_VIDC_BUF_OUTPUT: - size = msm_vidc_decoder_output_size(inst); - break; - case MSM_VIDC_BUF_INPUT_META: - size = msm_vidc_decoder_input_meta_size(inst); - break; - case MSM_VIDC_BUF_OUTPUT_META: - size = msm_vidc_decoder_output_meta_size(inst); - break; - case MSM_VIDC_BUF_SCRATCH: - size = msm_vidc_decoder_scratch_size_iris2(inst); - break; - case MSM_VIDC_BUF_SCRATCH_1: - size = msm_vidc_decoder_scratch_1_size_iris2(inst); - break; - case MSM_VIDC_BUF_PERSIST_1: - size = msm_vidc_decoder_persist_1_size_iris2(inst); - break; - default: - break; - } - } else if (is_encode_session(inst)) { - switch (buffer_type) { - case MSM_VIDC_BUF_INPUT: - size = msm_vidc_encoder_input_size(inst); - break; - case MSM_VIDC_BUF_OUTPUT: - size = msm_vidc_encoder_output_size(inst); - break; - case MSM_VIDC_BUF_INPUT_META: - size = msm_vidc_encoder_input_meta_size(inst); - break; - case MSM_VIDC_BUF_OUTPUT_META: - size = msm_vidc_encoder_output_meta_size(inst); - break; - case MSM_VIDC_BUF_SCRATCH: - size = msm_vidc_encoder_scratch_size_iris2(inst); - break; - case MSM_VIDC_BUF_SCRATCH_1: - size = msm_vidc_encoder_scratch_1_size_iris2(inst); - break; - case MSM_VIDC_BUF_SCRATCH_2: - size = msm_vidc_encoder_scratch_2_size_iris2(inst); - break; - case MSM_VIDC_BUF_PERSIST: - size = msm_vidc_encoder_persist_size_iris2(inst); - break; - default: - break; - } - } - - return size; -} - -static int msm_vidc_min_count_iris2(struct msm_vidc_inst *inst, - enum msm_vidc_buffer_type buffer_type) -{ - int count = 0; - - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - d_vpr_h("%s()\n", __func__); - - if (is_decode_session(inst)) { - switch (buffer_type) { - case MSM_VIDC_BUF_INPUT: - case MSM_VIDC_BUF_INPUT_META: - count = msm_vidc_input_min_count(inst); - break; - case MSM_VIDC_BUF_OUTPUT: - case MSM_VIDC_BUF_OUTPUT_META: - count = msm_vidc_output_min_count(inst); - break; - case MSM_VIDC_BUF_SCRATCH: - case MSM_VIDC_BUF_SCRATCH_1: - case MSM_VIDC_BUF_PERSIST_1: - count = 1; - break; - default: - break; - } - } else if (is_encode_session(inst)) { - switch (buffer_type) { - case MSM_VIDC_BUF_INPUT: - case MSM_VIDC_BUF_INPUT_META: - count = msm_vidc_input_min_count(inst); - break; - case MSM_VIDC_BUF_OUTPUT: - case MSM_VIDC_BUF_OUTPUT_META: - count = msm_vidc_output_min_count(inst); - break; - case MSM_VIDC_BUF_SCRATCH: - case MSM_VIDC_BUF_SCRATCH_1: - case MSM_VIDC_BUF_SCRATCH_2: - case MSM_VIDC_BUF_PERSIST: - count = 1; - break; - default: - break; - } - } - - return count; -} - -static int msm_vidc_extra_count_iris2(struct msm_vidc_inst *inst, - enum msm_vidc_buffer_type buffer_type) -{ - int count = 0; - - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - d_vpr_h("%s()\n", __func__); - - switch (buffer_type) { - case MSM_VIDC_BUF_INPUT: - case MSM_VIDC_BUF_INPUT_META: - count = msm_vidc_input_extra_count(inst); - break; - case MSM_VIDC_BUF_OUTPUT: - case MSM_VIDC_BUF_OUTPUT_META: - count = msm_vidc_output_extra_count(inst); - break; - default: - break; - } - - return count; -} - static struct msm_vidc_session_ops msm_session_ops = { - .buffer_size = msm_vidc_buffer_size_iris2, - .min_count = msm_vidc_min_count_iris2, - .extra_count = msm_vidc_extra_count_iris2, + .buffer_size = msm_buffer_size_iris2, + .min_count = msm_buffer_min_count_iris2, + .extra_count = msm_buffer_extra_count_iris2, .calc_freq = NULL, .calc_bw = NULL, .decide_work_route = NULL, diff --git a/driver/vidc/inc/hfi_command.h b/driver/vidc/inc/hfi_command.h index 3eb5621572..058819bff3 100644 --- a/driver/vidc/inc/hfi_command.h +++ b/driver/vidc/inc/hfi_command.h @@ -6,6 +6,9 @@ #ifndef __H_HFI_COMMAND_H__ #define __H_HFI_COMMAND_H__ +#include +#include + #define HFI_VIDEO_ARCH_OX 0x1 struct hfi_header { @@ -34,8 +37,8 @@ struct hfi_buffer { u32 buffer_size; u32 data_offset; u32 data_size; - u32 flags; u64 timestamp; + u32 flags; u32 reserved[5]; }; @@ -81,13 +84,15 @@ enum hfi_buffer_type { HFI_BUFFER_BITSTREAM = 0x00000001, HFI_BUFFER_RAW = 0x00000002, HFI_BUFFER_METADATA = 0x00000003, - HFI_BUFFER_SCRATCH = 0x00000010, - HFI_BUFFER_SCRATCH_1 = 0x00000011, - HFI_BUFFER_SCRATCH_2 = 0x00000012, - HFI_BUFFER_PERSIST = 0x00000013, - HFI_BUFFER_PERSIST_1 = 0x00000014, - HFI_BUFFER_SUBCACHE = 0x00000020, - HFI_BUFFER_SFR = 0x00000021, + HFI_BUFFER_DPB = 0x00000004, + HFI_BUFFER_BIN = 0x00000005, + HFI_BUFFER_LINE = 0x00000006, + HFI_BUFFER_ARP = 0x00000007, + HFI_BUFFER_COMV = 0x00000008, + HFI_BUFFER_NON_COMV = 0x00000009, + HFI_BUFFER_PERSIST = 0x0000000A, + HFI_BUFFER_SUBCACHE = 0x0000000B, + HFI_BUFFER_SFR = 0x0000000C, }; enum hfi_buffer_host_flags { diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index e950655c0e..9b562d6223 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -49,11 +49,12 @@ static inline is_output_meta_buffer(enum msm_vidc_buffer_type buffer_type) static inline is_internal_buffer(enum msm_vidc_buffer_type buffer_type) { - return buffer_type == MSM_VIDC_BUF_SCRATCH || - buffer_type == MSM_VIDC_BUF_SCRATCH_1 || - buffer_type == MSM_VIDC_BUF_SCRATCH_2 || - buffer_type == MSM_VIDC_BUF_PERSIST || - buffer_type == MSM_VIDC_BUF_PERSIST_1; + return buffer_type == MSM_VIDC_BUF_BIN || + buffer_type == MSM_VIDC_BUF_COMV || + buffer_type == MSM_VIDC_BUF_NON_COMV || + buffer_type == MSM_VIDC_BUF_LINE || + buffer_type == MSM_VIDC_BUF_DPB || + buffer_type == MSM_VIDC_BUF_PERSIST; } static inline bool is_secondary_output_mode(struct msm_vidc_inst *inst) @@ -96,6 +97,8 @@ int msm_vidc_remove_session(struct msm_vidc_inst *inst); int msm_vidc_add_session(struct msm_vidc_inst *inst); int msm_vidc_session_open(struct msm_vidc_inst *inst); int msm_vidc_session_set_codec(struct msm_vidc_inst *inst); +int msm_vidc_session_stop(struct msm_vidc_inst *inst, + enum msm_vidc_port_type port); int msm_vidc_session_close(struct msm_vidc_inst *inst); int msm_vidc_get_inst_capability(struct msm_vidc_inst *inst); int msm_vidc_core_init(struct msm_vidc_core *core); diff --git a/driver/vidc/inc/msm_vidc_inst.h b/driver/vidc/inc/msm_vidc_inst.h index 4294bfc9f1..1045100f48 100644 --- a/driver/vidc/inc/msm_vidc_inst.h +++ b/driver/vidc/inc/msm_vidc_inst.h @@ -26,11 +26,12 @@ struct msm_vidc_session_ops { }; struct msm_vidc_allocations_info { - struct msm_vidc_allocations scratch; - struct msm_vidc_allocations scratch_1; - struct msm_vidc_allocations scratch_2; + struct msm_vidc_allocations bin; + struct msm_vidc_allocations comv; + struct msm_vidc_allocations non_comv; + struct msm_vidc_allocations line; + struct msm_vidc_allocations dpb; struct msm_vidc_allocations persist; - struct msm_vidc_allocations persist_1; }; struct msm_vidc_mappings_info { @@ -38,11 +39,12 @@ struct msm_vidc_mappings_info { struct msm_vidc_mappings output; struct msm_vidc_mappings input_meta; struct msm_vidc_mappings output_meta; - struct msm_vidc_mappings scratch; - struct msm_vidc_mappings scratch_1; - struct msm_vidc_mappings scratch_2; + struct msm_vidc_mappings bin; + struct msm_vidc_mappings comv; + struct msm_vidc_mappings non_comv; + struct msm_vidc_mappings line; + struct msm_vidc_mappings dpb; struct msm_vidc_mappings persist; - struct msm_vidc_mappings persist_1; }; struct msm_vidc_buffers_info { @@ -50,11 +52,12 @@ struct msm_vidc_buffers_info { struct msm_vidc_buffers output; struct msm_vidc_buffers input_meta; struct msm_vidc_buffers output_meta; - struct msm_vidc_buffers scratch; - struct msm_vidc_buffers scratch_1; - struct msm_vidc_buffers scratch_2; + struct msm_vidc_buffers bin; + struct msm_vidc_buffers comv; + struct msm_vidc_buffers non_comv; + struct msm_vidc_buffers line; + struct msm_vidc_buffers dpb; struct msm_vidc_buffers persist; - struct msm_vidc_buffers persist_1; }; enum msm_vidc_inst_state { diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 88788dbe48..987cdb12b8 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -109,11 +109,12 @@ enum msm_vidc_buffer_type { MSM_VIDC_BUF_INPUT_META, MSM_VIDC_BUF_OUTPUT_META, MSM_VIDC_BUF_QUEUE, - MSM_VIDC_BUF_SCRATCH, - MSM_VIDC_BUF_SCRATCH_1, - MSM_VIDC_BUF_SCRATCH_2, + MSM_VIDC_BUF_BIN, + MSM_VIDC_BUF_COMV, + MSM_VIDC_BUF_NON_COMV, + MSM_VIDC_BUF_LINE, + MSM_VIDC_BUF_DPB, MSM_VIDC_BUF_PERSIST, - MSM_VIDC_BUF_PERSIST_1, }; /* always match with v4l2 flags V4L2_BUF_FLAG_* */ @@ -144,7 +145,7 @@ enum msm_vidc_buffer_region { }; enum msm_vidc_port_type { - INPUT_PORT, + INPUT_PORT = 0, OUTPUT_PORT, INPUT_META_PORT, OUTPUT_META_PORT, @@ -339,7 +340,8 @@ enum profiling_points { }; enum signal_session_response { - SIGNAL_CMD_STOP = 0, + SIGNAL_CMD_STOP_INPUT = 0, + SIGNAL_CMD_STOP_OUTPUT, SIGNAL_CMD_CLOSE, MAX_SIGNAL, }; diff --git a/driver/vidc/inc/venus_hfi.h b/driver/vidc/inc/venus_hfi.h index 97eda798f9..686f12e275 100644 --- a/driver/vidc/inc/venus_hfi.h +++ b/driver/vidc/inc/venus_hfi.h @@ -6,6 +6,8 @@ #ifndef _VENUS_HFI_H_ #define _VENUS_HFI_H_ +#include + #include "msm_vidc_internal.h" #include "msm_vidc_inst.h" #include "msm_vidc_core.h" @@ -49,6 +51,9 @@ struct hfi_resource_syscache_info_type { int venus_hfi_session_property(struct msm_vidc_inst *inst, u32 pkt_type, u32 flags, u32 port, u32 payload_type, void *payload, u32 payload_size); +int venus_hfi_session_command(struct msm_vidc_inst *inst, + u32 cmd, enum msm_vidc_port_type port, u32 payload_type, + void *payload, u32 payload_size); int venus_hfi_queue_buffer(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buffer, struct msm_vidc_buffer *metabuf); int venus_hfi_release_buffer(struct msm_vidc_inst *inst, @@ -63,6 +68,7 @@ int venus_hfi_core_release(struct msm_vidc_core *core); int venus_hfi_suspend(struct msm_vidc_core *core); void venus_hfi_work_handler(struct work_struct *work); void venus_hfi_pm_work_handler(struct work_struct *work); +irqreturn_t venus_hfi_isr(int irq, void *data); void __write_register(struct msm_vidc_core *core, u32 reg, u32 value); diff --git a/driver/vidc/src/hfi_packet.c b/driver/vidc/src/hfi_packet.c index eb0c20a05d..021d43759e 100644 --- a/driver/vidc/src/hfi_packet.c +++ b/driver/vidc/src/hfi_packet.c @@ -62,8 +62,16 @@ u32 get_hfi_port_from_buffer_type(struct msm_vidc_inst *inst, switch(buffer_type) { case MSM_VIDC_BUF_INPUT: case MSM_VIDC_BUF_INPUT_META: + case MSM_VIDC_BUF_BIN: + case MSM_VIDC_BUF_COMV: + case MSM_VIDC_BUF_NON_COMV: + case MSM_VIDC_BUF_LINE: + case MSM_VIDC_BUF_DPB: hfi_port = HFI_PORT_BITSTREAM; break; + case MSM_VIDC_BUF_PERSIST: + hfi_port = HFI_PORT_BITSTREAM | HFI_PORT_RAW; + break; case MSM_VIDC_BUF_OUTPUT: case MSM_VIDC_BUF_OUTPUT_META: hfi_port = HFI_PORT_RAW; @@ -77,8 +85,16 @@ u32 get_hfi_port_from_buffer_type(struct msm_vidc_inst *inst, switch (buffer_type) { case MSM_VIDC_BUF_INPUT: case MSM_VIDC_BUF_INPUT_META: + case MSM_VIDC_BUF_BIN: + case MSM_VIDC_BUF_COMV: + case MSM_VIDC_BUF_NON_COMV: + case MSM_VIDC_BUF_LINE: + case MSM_VIDC_BUF_DPB: hfi_port = HFI_PORT_RAW; break; + case MSM_VIDC_BUF_PERSIST: + hfi_port = HFI_PORT_BITSTREAM | HFI_PORT_RAW; + break; case MSM_VIDC_BUF_OUTPUT: case MSM_VIDC_BUF_OUTPUT_META: hfi_port = HFI_PORT_BITSTREAM; @@ -113,16 +129,18 @@ u32 get_hfi_buffer_type(enum msm_vidc_domain_type domain, case MSM_VIDC_BUF_INPUT_META: case MSM_VIDC_BUF_OUTPUT_META: return HFI_BUFFER_METADATA; - case MSM_VIDC_BUF_SCRATCH: - return HFI_BUFFER_SCRATCH; - case MSM_VIDC_BUF_SCRATCH_1: - return HFI_BUFFER_SCRATCH_1; - case MSM_VIDC_BUF_SCRATCH_2: - return HFI_BUFFER_SCRATCH_2; + case MSM_VIDC_BUF_BIN: + return HFI_BUFFER_BIN; + case MSM_VIDC_BUF_COMV: + return HFI_BUFFER_COMV; + case MSM_VIDC_BUF_NON_COMV: + return HFI_BUFFER_NON_COMV; + case MSM_VIDC_BUF_LINE: + return HFI_BUFFER_LINE; + case MSM_VIDC_BUF_DPB: + return HFI_BUFFER_DPB; case MSM_VIDC_BUF_PERSIST: return HFI_BUFFER_PERSIST; - case MSM_VIDC_BUF_PERSIST_1: - return HFI_BUFFER_PERSIST_1; default: d_vpr_e("invalid buffer type %d\n", buffer_type); diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 00851bf514..a6d80be430 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -33,7 +33,7 @@ u32 msm_vdec_subscribe_for_properties[] = { }; u32 msm_vdec_subscribe_for_metadata[] = { - HFI_PROP_TAG_NOT_PROPAGATED_TO_OUTPUT, + HFI_PROP_BUFFER_TAG, }; u32 msm_vdec_deliver_as_metadata[] = { @@ -496,30 +496,44 @@ static int msm_vdec_get_input_internal_buffers(struct msm_vidc_inst *inst) } core = inst->core; - inst->buffers.scratch.size = call_session_op(core, buffer_size, - inst, MSM_VIDC_BUF_SCRATCH); - inst->buffers.scratch_1.size = call_session_op(core, buffer_size, - inst, MSM_VIDC_BUF_SCRATCH_1); - inst->buffers.persist_1.size = call_session_op(core, buffer_size, - inst, MSM_VIDC_BUF_PERSIST_1); + inst->buffers.bin.size = call_session_op(core, buffer_size, + inst, MSM_VIDC_BUF_BIN); + inst->buffers.comv.size = call_session_op(core, buffer_size, + inst, MSM_VIDC_BUF_COMV); + inst->buffers.non_comv.size = call_session_op(core, buffer_size, + inst, MSM_VIDC_BUF_NON_COMV); + inst->buffers.line.size = call_session_op(core, buffer_size, + inst, MSM_VIDC_BUF_LINE); + inst->buffers.persist.size = call_session_op(core, buffer_size, + inst, MSM_VIDC_BUF_PERSIST); - inst->buffers.scratch.min_count = call_session_op(core, min_count, - inst, MSM_VIDC_BUF_SCRATCH); - inst->buffers.scratch_1.min_count = call_session_op(core, min_count, - inst, MSM_VIDC_BUF_SCRATCH_1); - inst->buffers.persist_1.min_count = call_session_op(core, min_count, - inst, MSM_VIDC_BUF_PERSIST_1); + inst->buffers.bin.min_count = call_session_op(core, min_count, + inst, MSM_VIDC_BUF_BIN); + inst->buffers.comv.min_count = call_session_op(core, min_count, + inst, MSM_VIDC_BUF_COMV); + inst->buffers.non_comv.min_count = call_session_op(core, min_count, + inst, MSM_VIDC_BUF_NON_COMV); + inst->buffers.line.min_count = call_session_op(core, min_count, + inst, MSM_VIDC_BUF_LINE); + inst->buffers.persist.min_count = call_session_op(core, min_count, + inst, MSM_VIDC_BUF_PERSIST); s_vpr_h(inst->sid, "internal buffer: min size\n"); - s_vpr_h(inst->sid, "scratch buffer: %d %d\n", - inst->buffers.scratch.min_count, - inst->buffers.scratch.size); - s_vpr_h(inst->sid, "scratch1 buffer: %d %d\n", - inst->buffers.scratch_1.min_count, - inst->buffers.scratch_1.size); - s_vpr_h(inst->sid, "persist1 buffer: %d %d\n", - inst->buffers.persist_1.min_count, - inst->buffers.persist_1.size); + s_vpr_h(inst->sid, "bin buffer: %d %d\n", + inst->buffers.bin.min_count, + inst->buffers.bin.size); + s_vpr_h(inst->sid, "comv buffer: %d %d\n", + inst->buffers.comv.min_count, + inst->buffers.comv.size); + s_vpr_h(inst->sid, "non_comv buffer: %d %d\n", + inst->buffers.non_comv.min_count, + inst->buffers.non_comv.size); + s_vpr_h(inst->sid, "line buffer: %d %d\n", + inst->buffers.line.min_count, + inst->buffers.line.size); + s_vpr_h(inst->sid, "persist buffer: %d %d\n", + inst->buffers.persist.min_count, + inst->buffers.persist.size); return rc; } @@ -534,13 +548,19 @@ static int msm_vdec_create_input_internal_buffers(struct msm_vidc_inst *inst) return -EINVAL; } - rc = msm_vidc_create_internal_buffers(inst, MSM_VIDC_BUF_SCRATCH); + rc = msm_vidc_create_internal_buffers(inst, MSM_VIDC_BUF_BIN); if (rc) return rc; - rc = msm_vidc_create_internal_buffers(inst, MSM_VIDC_BUF_SCRATCH_1); + rc = msm_vidc_create_internal_buffers(inst, MSM_VIDC_BUF_COMV); if (rc) return rc; - rc = msm_vidc_create_internal_buffers(inst, MSM_VIDC_BUF_PERSIST_1); + rc = msm_vidc_create_internal_buffers(inst, MSM_VIDC_BUF_NON_COMV); + if (rc) + return rc; + rc = msm_vidc_create_internal_buffers(inst, MSM_VIDC_BUF_LINE); + if (rc) + return rc; + rc = msm_vidc_create_internal_buffers(inst, MSM_VIDC_BUF_PERSIST); if (rc) return rc; @@ -557,18 +577,25 @@ static int msm_vdec_queue_input_internal_buffers(struct msm_vidc_inst *inst) return -EINVAL; } - rc = msm_vidc_queue_internal_buffers(inst, MSM_VIDC_BUF_SCRATCH); + rc = msm_vidc_queue_internal_buffers(inst, MSM_VIDC_BUF_BIN); if (rc) return rc; - rc = msm_vidc_queue_internal_buffers(inst, MSM_VIDC_BUF_SCRATCH_1); + rc = msm_vidc_queue_internal_buffers(inst, MSM_VIDC_BUF_COMV); if (rc) return rc; - rc = msm_vidc_queue_internal_buffers(inst, MSM_VIDC_BUF_PERSIST_1); + rc = msm_vidc_queue_internal_buffers(inst, MSM_VIDC_BUF_NON_COMV); + if (rc) + return rc; + rc = msm_vidc_queue_internal_buffers(inst, MSM_VIDC_BUF_LINE); + if (rc) + return rc; + rc = msm_vidc_queue_internal_buffers(inst, MSM_VIDC_BUF_PERSIST); if (rc) return rc; return 0; } + /* static int msm_vdec_release_input_internal_buffers(struct msm_vidc_inst *inst) { @@ -614,24 +641,13 @@ static int msm_vdec_port_settings_subscription(struct msm_vidc_inst *inst, i++) payload[i + 1] = msm_vdec_subscribe_for_port_settings_change[i]; - rc = hfi_create_header(inst->packet, inst->packet_size, - inst->session_id, - core->header_id++); - if (rc) - return rc; - - rc = hfi_create_packet(inst->packet, inst->packet_size, - HFI_CMD_SUBSCRIBE_MODE, - (HFI_HOST_FLAGS_RESPONSE_REQUIRED | - HFI_HOST_FLAGS_INTR_REQUIRED), - HFI_PAYLOAD_U32_ARRAY, - get_hfi_port(inst, port), - core->packet_id++, - &payload[0], - (ARRAY_SIZE(msm_vdec_subscribe_for_port_settings_change) + 1) * - sizeof(u32)); - if (rc) - return rc; + rc = venus_hfi_session_command(inst, + HFI_CMD_SUBSCRIBE_MODE, + port, + HFI_PAYLOAD_U32_ARRAY, + &payload[0], + (ARRAY_SIZE(msm_vdec_subscribe_for_port_settings_change) + 1) * + sizeof(u32)); return rc; } @@ -655,24 +671,13 @@ static int msm_vdec_property_subscription(struct msm_vidc_inst *inst, for (i = 0; i < ARRAY_SIZE(msm_vdec_subscribe_for_properties); i++) payload[i + 1] = msm_vdec_subscribe_for_properties[i]; - rc = hfi_create_header(inst->packet, inst->packet_size, - inst->session_id, - core->header_id++); - if (rc) - return rc; - - rc = hfi_create_packet(inst->packet, inst->packet_size, + rc = venus_hfi_session_command(inst, HFI_CMD_SUBSCRIBE_MODE, - (HFI_HOST_FLAGS_RESPONSE_REQUIRED | - HFI_HOST_FLAGS_INTR_REQUIRED), + port, HFI_PAYLOAD_U32_ARRAY, - get_hfi_port(inst, port), - core->packet_id++, &payload[0], (ARRAY_SIZE(msm_vdec_subscribe_for_properties) + 1) * sizeof(u32)); - if (rc) - return rc; return rc; } @@ -696,24 +701,13 @@ static int msm_vdec_metadata_subscription(struct msm_vidc_inst *inst, for (i = 0; i < ARRAY_SIZE(msm_vdec_subscribe_for_metadata); i++) payload[i + 1] = msm_vdec_subscribe_for_metadata[i]; - rc = hfi_create_header(inst->packet, inst->packet_size, - inst->session_id, - core->header_id++); - if (rc) - return rc; - - rc = hfi_create_packet(inst->packet, inst->packet_size, + rc = venus_hfi_session_command(inst, HFI_CMD_SUBSCRIBE_MODE, - (HFI_HOST_FLAGS_RESPONSE_REQUIRED | - HFI_HOST_FLAGS_INTR_REQUIRED), + port, HFI_PAYLOAD_U32_ARRAY, - get_hfi_port(inst, port), - core->packet_id++, &payload[0], (ARRAY_SIZE(msm_vdec_subscribe_for_metadata) + 1) * sizeof(u32)); - if (rc) - return rc; return rc; } @@ -737,53 +731,13 @@ static int msm_vdec_metadata_delivery(struct msm_vidc_inst *inst, for (i = 0; i < ARRAY_SIZE(msm_vdec_deliver_as_metadata); i++) payload[i + 1] = msm_vdec_deliver_as_metadata[i]; - rc = hfi_create_header(inst->packet, inst->packet_size, - inst->session_id, - core->header_id++); - if (rc) - return rc; - - rc = hfi_create_packet(inst->packet, inst->packet_size, - HFI_CMD_DELIVERY_MODE, - (HFI_HOST_FLAGS_RESPONSE_REQUIRED | - HFI_HOST_FLAGS_INTR_REQUIRED), - HFI_PAYLOAD_U32_ARRAY, - get_hfi_port(inst, port), - core->packet_id++, - &payload[0], - (ARRAY_SIZE(msm_vdec_deliver_as_metadata) + 1) * sizeof(u32)); - if (rc) - return rc; - - return rc; -} - -static int msm_vdec_subscription(struct msm_vidc_inst *inst, - enum msm_vidc_port_type port) -{ - int rc = 0; - - rc = msm_vdec_port_settings_subscription(inst, port); - if (rc) - return rc; - rc = msm_vdec_property_subscription(inst, port); - if (rc) - return rc; - rc = msm_vdec_metadata_subscription(inst, port); - if (rc) - return rc; - - return rc; -} - -static int msm_vdec_deliveries(struct msm_vidc_inst *inst, - enum msm_vidc_port_type port) -{ - int rc = 0; - - rc = msm_vdec_metadata_delivery(inst, port); - if (rc) - return rc; + rc = venus_hfi_session_command(inst, + HFI_CMD_DELIVERY_MODE, + port, + HFI_PAYLOAD_U32_ARRAY, + &payload[0], + (ARRAY_SIZE(msm_vdec_deliver_as_metadata) + 1) * + sizeof(u32)); return rc; } @@ -796,9 +750,12 @@ int msm_vdec_stop_input(struct msm_vidc_inst *inst) d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - d_vpr_h("%s()\n", __func__); - return rc; + rc = msm_vidc_session_stop(inst, INPUT_PORT); + if (rc) + return rc; + + return 0; } int msm_vdec_start_input(struct msm_vidc_inst *inst) @@ -848,13 +805,17 @@ int msm_vdec_start_input(struct msm_vidc_inst *inst) if (rc) goto error; - rc = msm_vdec_subscription(inst, INPUT_PORT); + rc = msm_vdec_port_settings_subscription(inst, INPUT_PORT); if (rc) - goto error; + return rc; - rc = msm_vdec_deliveries(inst, INPUT_PORT); + rc = msm_vdec_property_subscription(inst, INPUT_PORT); if (rc) - goto error; + return rc; + + rc = msm_vdec_metadata_delivery(inst, INPUT_PORT); + if (rc) + return rc; rc = venus_hfi_start(inst, INPUT_PORT); if (rc) @@ -873,13 +834,16 @@ int msm_vdec_stop_output(struct msm_vidc_inst *inst) { int rc = 0; - d_vpr_h("%s()\n", __func__); if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - return rc; + rc = msm_vidc_session_stop(inst, OUTPUT_PORT); + if (rc) + return rc; + + return 0; } int msm_vdec_start_output(struct msm_vidc_inst *inst) @@ -896,13 +860,13 @@ int msm_vdec_start_output(struct msm_vidc_inst *inst) if (rc) goto error; - rc = msm_vdec_subscription(inst, OUTPUT_PORT); + rc = msm_vdec_port_settings_subscription(inst, OUTPUT_PORT); if (rc) - goto error; + return rc; - rc = msm_vdec_deliveries(inst, OUTPUT_PORT); + rc = msm_vdec_metadata_subscription(inst, OUTPUT_PORT); if (rc) - goto error; + return rc; rc = venus_hfi_start(inst, OUTPUT_PORT); if (rc) diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index 3e2af014a4..d45151234e 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -444,7 +444,7 @@ int msm_vidc_streamon(void *instance, enum v4l2_buf_type type) { int rc = 0; struct msm_vidc_inst *inst = instance; - enum msm_vidc_inst_state new_state = 0; + enum msm_vidc_inst_state new_state = MSM_VIDC_ERROR; int port; if (!inst) { @@ -523,7 +523,7 @@ int msm_vidc_streamoff(void *instance, enum v4l2_buf_type type) { int rc = 0; struct msm_vidc_inst *inst = instance; - enum msm_vidc_inst_state new_state = 0; + enum msm_vidc_inst_state new_state = MSM_VIDC_ERROR; int port; if (!inst) { @@ -759,25 +759,28 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) INIT_LIST_HEAD(&inst->buffers.input_meta.list); INIT_LIST_HEAD(&inst->buffers.output.list); INIT_LIST_HEAD(&inst->buffers.output_meta.list); - INIT_LIST_HEAD(&inst->buffers.scratch.list); - INIT_LIST_HEAD(&inst->buffers.scratch_1.list); - INIT_LIST_HEAD(&inst->buffers.scratch_2.list); + INIT_LIST_HEAD(&inst->buffers.bin.list); + INIT_LIST_HEAD(&inst->buffers.comv.list); + INIT_LIST_HEAD(&inst->buffers.non_comv.list); + INIT_LIST_HEAD(&inst->buffers.line.list); + INIT_LIST_HEAD(&inst->buffers.dpb.list); INIT_LIST_HEAD(&inst->buffers.persist.list); - INIT_LIST_HEAD(&inst->buffers.persist_1.list); - INIT_LIST_HEAD(&inst->allocations.scratch.list); - INIT_LIST_HEAD(&inst->allocations.scratch_1.list); - INIT_LIST_HEAD(&inst->allocations.scratch_2.list); + INIT_LIST_HEAD(&inst->allocations.bin.list); + INIT_LIST_HEAD(&inst->allocations.comv.list); + INIT_LIST_HEAD(&inst->allocations.non_comv.list); + INIT_LIST_HEAD(&inst->allocations.line.list); + INIT_LIST_HEAD(&inst->allocations.dpb.list); INIT_LIST_HEAD(&inst->allocations.persist.list); - INIT_LIST_HEAD(&inst->allocations.persist_1.list); INIT_LIST_HEAD(&inst->mappings.input.list); INIT_LIST_HEAD(&inst->mappings.input_meta.list); INIT_LIST_HEAD(&inst->mappings.output.list); INIT_LIST_HEAD(&inst->mappings.output_meta.list); - INIT_LIST_HEAD(&inst->mappings.scratch.list); - INIT_LIST_HEAD(&inst->mappings.scratch_1.list); - INIT_LIST_HEAD(&inst->mappings.scratch_2.list); + INIT_LIST_HEAD(&inst->mappings.bin.list); + INIT_LIST_HEAD(&inst->mappings.comv.list); + INIT_LIST_HEAD(&inst->mappings.non_comv.list); + INIT_LIST_HEAD(&inst->mappings.line.list); + INIT_LIST_HEAD(&inst->mappings.dpb.list); INIT_LIST_HEAD(&inst->mappings.persist.list); - INIT_LIST_HEAD(&inst->mappings.persist_1.list); INIT_LIST_HEAD(&inst->children.list); INIT_LIST_HEAD(&inst->firmware.list); inst->domain = session_type; diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 0c87adb603..6c4e9f8c75 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -296,22 +296,18 @@ u32 msm_vidc_get_buffer_region(struct msm_vidc_inst *inst, case MSM_VIDC_BUF_OUTPUT_META: region = MSM_VIDC_NON_SECURE; break; - case MSM_VIDC_BUF_SCRATCH: + case MSM_VIDC_BUF_BIN: region = MSM_VIDC_SECURE_BITSTREAM; break; - case MSM_VIDC_BUF_SCRATCH_1: + case MSM_VIDC_BUF_COMV: + case MSM_VIDC_BUF_NON_COMV: + case MSM_VIDC_BUF_LINE: region = MSM_VIDC_SECURE_NONPIXEL; break; - case MSM_VIDC_BUF_SCRATCH_2: + case MSM_VIDC_BUF_DPB: region = MSM_VIDC_SECURE_PIXEL; break; case MSM_VIDC_BUF_PERSIST: - if (is_encode_session(inst)) - region = MSM_VIDC_SECURE_NONPIXEL; - else - region = MSM_VIDC_SECURE_BITSTREAM; - break; - case MSM_VIDC_BUF_PERSIST_1: region = MSM_VIDC_SECURE_NONPIXEL; break; default: @@ -334,16 +330,18 @@ struct msm_vidc_buffers *msm_vidc_get_buffers( return &inst->buffers.output; case MSM_VIDC_BUF_OUTPUT_META: return &inst->buffers.output_meta; - case MSM_VIDC_BUF_SCRATCH: - return &inst->buffers.scratch; - case MSM_VIDC_BUF_SCRATCH_1: - return &inst->buffers.scratch_1; - case MSM_VIDC_BUF_SCRATCH_2: - return &inst->buffers.scratch_2; + case MSM_VIDC_BUF_BIN: + return &inst->buffers.bin; + case MSM_VIDC_BUF_COMV: + return &inst->buffers.comv; + case MSM_VIDC_BUF_NON_COMV: + return &inst->buffers.non_comv; + case MSM_VIDC_BUF_LINE: + return &inst->buffers.line; + case MSM_VIDC_BUF_DPB: + return &inst->buffers.dpb; case MSM_VIDC_BUF_PERSIST: return &inst->buffers.persist; - case MSM_VIDC_BUF_PERSIST_1: - return &inst->buffers.persist_1; default: s_vpr_e(inst->sid, "%s: invalid driver buffer type %d\n", func, buffer_type); @@ -364,16 +362,18 @@ struct msm_vidc_mappings *msm_vidc_get_mappings( return &inst->mappings.output; case MSM_VIDC_BUF_OUTPUT_META: return &inst->mappings.output_meta; - case MSM_VIDC_BUF_SCRATCH: - return &inst->mappings.scratch; - case MSM_VIDC_BUF_SCRATCH_1: - return &inst->mappings.scratch_1; - case MSM_VIDC_BUF_SCRATCH_2: - return &inst->mappings.scratch_2; + case MSM_VIDC_BUF_BIN: + return &inst->mappings.bin; + case MSM_VIDC_BUF_COMV: + return &inst->mappings.comv; + case MSM_VIDC_BUF_NON_COMV: + return &inst->mappings.non_comv; + case MSM_VIDC_BUF_LINE: + return &inst->mappings.line; + case MSM_VIDC_BUF_DPB: + return &inst->mappings.dpb; case MSM_VIDC_BUF_PERSIST: return &inst->mappings.persist; - case MSM_VIDC_BUF_PERSIST_1: - return &inst->mappings.persist_1; default: s_vpr_e(inst->sid, "%s: invalid driver buffer type %d\n", func, buffer_type); @@ -386,16 +386,18 @@ struct msm_vidc_allocations *msm_vidc_get_allocations( const char *func) { switch (buffer_type) { - case MSM_VIDC_BUF_SCRATCH: - return &inst->allocations.scratch; - case MSM_VIDC_BUF_SCRATCH_1: - return &inst->allocations.scratch_1; - case MSM_VIDC_BUF_SCRATCH_2: - return &inst->allocations.scratch_2; + case MSM_VIDC_BUF_BIN: + return &inst->allocations.bin; + case MSM_VIDC_BUF_COMV: + return &inst->allocations.comv; + case MSM_VIDC_BUF_NON_COMV: + return &inst->allocations.non_comv; + case MSM_VIDC_BUF_LINE: + return &inst->allocations.line; + case MSM_VIDC_BUF_DPB: + return &inst->allocations.dpb; case MSM_VIDC_BUF_PERSIST: return &inst->allocations.persist; - case MSM_VIDC_BUF_PERSIST_1: - return &inst->allocations.persist_1; default: s_vpr_e(inst->sid, "%s: invalid driver buffer type %d\n", func, buffer_type); @@ -410,6 +412,7 @@ int msm_vidc_change_inst_state(struct msm_vidc_inst *inst, d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } + if (!request_state) { s_vpr_e(inst->sid, "%s: invalid request state\n", func); return -EINVAL; @@ -541,6 +544,8 @@ int msm_vidc_put_driver_buf(struct msm_vidc_inst *inst, if (rc) return rc; + msm_vidc_memory_put_dmabuf(buf->dmabuf); + /* delete the buffer from buffers->list */ list_del(&buf->list); kfree(buf); @@ -628,7 +633,6 @@ struct msm_vidc_buffer *msm_vidc_get_driver_buf(struct msm_vidc_inst *inst, dmabuf = msm_vidc_memory_get_dmabuf(vb2->planes[0].m.fd); if (!dmabuf) return NULL; - msm_vidc_memory_put_dmabuf(dmabuf); /* check if it is an existing buffer */ list_for_each_entry(buf, &buffers->list, list) { @@ -679,6 +683,7 @@ struct msm_vidc_buffer *msm_vidc_get_driver_buf(struct msm_vidc_inst *inst, return buf; error: + msm_vidc_memory_put_dmabuf(dmabuf); if (!found) kfree(buf); return NULL; @@ -1171,6 +1176,54 @@ int msm_vidc_session_set_codec(struct msm_vidc_inst *inst) return 0; } +int msm_vidc_session_stop(struct msm_vidc_inst *inst, + enum msm_vidc_port_type port) +{ + int rc = 0; + struct msm_vidc_core *core; + enum signal_session_response signal_type; + + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (port == INPUT_PORT) { + signal_type = SIGNAL_CMD_STOP_INPUT; + } else if (port == OUTPUT_PORT) { + signal_type = SIGNAL_CMD_STOP_OUTPUT; + } else { + s_vpr_e(inst->sid, "%s: invalid port: %d\n", __func__, port); + return -EINVAL; + } + + rc = venus_hfi_stop(inst, port); + if (rc) + return rc; + + core = inst->core; + mutex_unlock(&inst->lock); + s_vpr_h(inst->sid, "%s: wait on port: %d for time: %d ms\n", + __func__, port, core->capabilities[HW_RESPONSE_TIMEOUT].value); + rc = wait_for_completion_timeout( + &inst->completions[signal_type], + msecs_to_jiffies( + core->capabilities[HW_RESPONSE_TIMEOUT].value)); + mutex_lock(&inst->lock); + if (!rc) { + s_vpr_e(inst->sid, "%s: session stop timed out for port: %d\n", + __func__, port); + //msm_comm_kill_session(inst); + rc = -EIO; + } else { + rc = 0; + s_vpr_h(inst->sid, "%s: stop successful on port: %d\n", + __func__, port); + } + + return rc; +} + int msm_vidc_session_close(struct msm_vidc_inst *inst) { int rc = 0; @@ -1186,6 +1239,8 @@ int msm_vidc_session_close(struct msm_vidc_inst *inst) return rc; core = inst->core; + s_vpr_h(inst->sid, "%s: wait on close for time: %d ms\n", + __func__, core->capabilities[HW_RESPONSE_TIMEOUT].value); rc = wait_for_completion_timeout( &inst->completions[SIGNAL_CMD_CLOSE], msecs_to_jiffies( @@ -1196,6 +1251,7 @@ int msm_vidc_session_close(struct msm_vidc_inst *inst) rc = -EIO; } else { rc = 0; + s_vpr_h(inst->sid, "%s: close successful\n", __func__); } return rc; diff --git a/driver/vidc/src/msm_vidc_probe.c b/driver/vidc/src/msm_vidc_probe.c index 31090a1154..b70d596669 100644 --- a/driver/vidc/src/msm_vidc_probe.c +++ b/driver/vidc/src/msm_vidc_probe.c @@ -9,7 +9,6 @@ #include #include #include -#include #include "msm_vidc_internal.h" #include "msm_vidc_debug.h" @@ -21,18 +20,6 @@ #define BASE_DEVICE_NUMBER 32 -static irqreturn_t msm_vidc_isr(int irq, void *data) -{ - struct msm_vidc_core *core = data; - - d_vpr_e("%s()\n", __func__); - - disable_irq_nosync(irq); - queue_work(core->device_workq, &core->device_work); - - return IRQ_HANDLED; -} - static int msm_vidc_init_irq(struct msm_vidc_core *core) { int rc = 0; @@ -54,7 +41,7 @@ static int msm_vidc_init_irq(struct msm_vidc_core *core) goto exit; } - rc = request_irq(dt->irq, msm_vidc_isr, IRQF_TRIGGER_HIGH, + rc = request_irq(dt->irq, venus_hfi_isr, IRQF_TRIGGER_HIGH, "msm_vidc", core); if (unlikely(rc)) { d_vpr_e("%s: request_irq failed\n", __func__); diff --git a/driver/vidc/src/msm_vidc_vb2.c b/driver/vidc/src/msm_vidc_vb2.c index 6e714e052c..d746d570cb 100644 --- a/driver/vidc/src/msm_vidc_vb2.c +++ b/driver/vidc/src/msm_vidc_vb2.c @@ -188,6 +188,49 @@ int msm_vidc_start_streaming(struct vb2_queue *q, unsigned int count) void msm_vidc_stop_streaming(struct vb2_queue *q) { + int rc = 0; + struct msm_vidc_inst *inst; + + if (!q || !q->drv_priv) { + d_vpr_e("%s: invalid input, q = %pK\n", q); + return; + } + inst = q->drv_priv; + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return; + } + if (q->type == INPUT_META_PLANE || q->type == OUTPUT_META_PLANE) { + s_vpr_h(inst->sid, "%s: nothing to stop on meta port %d\n", + __func__, q->type); + return; + } + if (!is_decode_session(inst) && !is_encode_session(inst)) { + s_vpr_e(inst->sid, "%s: invalid session %d\n", + __func__, inst->domain); + return; + } + s_vpr_h(inst->sid, "Streamoff: %d\n", q->type); + + if (q->type == INPUT_MPLANE) { + if (is_decode_session(inst)) + rc = msm_vdec_stop_input(inst); + //else if (is_encode_session(inst)) + // rc = msm_venc_start_input(inst); + } else if (q->type == OUTPUT_MPLANE) { + if (is_decode_session(inst)) + rc = msm_vdec_stop_output(inst); + //else if (is_encode_session(inst)) + // rc = msm_venc_start_output(inst); + } else { + s_vpr_e(inst->sid, "%s: invalid type %d\n", __func__, q->type); + } + + if (rc) + s_vpr_e(inst->sid, "%s: stop failed for qtype: %d\n", + __func__, q->type); + + return; } void msm_vidc_buf_queue(struct vb2_buffer *vb2) diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index 5efb7d8031..ba6ceeeb86 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -594,8 +594,8 @@ static int __write_queue(struct msm_vidc_iface_q_info *qinfo, u8 *packet, } // TODO: handle writing packet - d_vpr_e("skip writing packet\n"); - return 0; + //d_vpr_e("skip writing packet\n"); + //return 0; packet_size_in_words = (*(u32 *)packet) >> 2; if (!packet_size_in_words || packet_size_in_words > @@ -915,18 +915,36 @@ dbg_error_null: return rc; } -/*TODO:darshana needs discussion*/ -static void __flush_debug_queue(struct msm_vidc_core *core, u8 *header) +// TODO: revisit once firmware updated to latest interface headers +struct hfi_packet_header { + u32 size; + u32 packet_type; +}; + +struct hfi_msg_sys_debug_packet { + u32 size; + u32 packet_type; + u32 msg_type; + u32 msg_size; + u32 time_stamp_hi; + u32 time_stamp_lo; + u8 rg_msg_data[1]; +}; + +static void __flush_debug_queue(struct msm_vidc_core *core, u8 *packet) { bool local_packet = false; enum vidc_msg_prio log_level = msm_vidc_debug; - struct hfi_packet *pkt; - u32 payload = 0; - if (!header) { - header = kzalloc(VIDC_IFACEQ_VAR_HUGE_PKT_SIZE, GFP_KERNEL); - if (!header) { - d_vpr_e("%s: Fail to allocate mem\n", __func__); + if (!core) { + d_vpr_e("%s: invalid params\n", __func__); + return; + } + + if (!packet) { + packet = kzalloc(VIDC_IFACEQ_VAR_HUGE_PKT_SIZE, GFP_KERNEL); + if (!packet) { + d_vpr_e("%s: fail to allocate\n", __func__); return; } @@ -950,20 +968,21 @@ static void __flush_debug_queue(struct msm_vidc_core *core, u8 *header) } \ }) - while (!__iface_dbgq_read(core, header)) { - struct hfi_header *hdr = - (struct hfi_header *) header; + while (!__iface_dbgq_read(core, packet)) { + struct hfi_packet_header *pkt = + (struct hfi_packet_header *) packet; - if (validate_packet((u8 *)pkt, core->response_packet, - core->packet_size, __func__)) - return; + if (pkt->size < sizeof(struct hfi_packet_header)) { + d_vpr_e("Invalid pkt size - %s\n", __func__); + continue; + } + + if (1) { + struct hfi_msg_sys_debug_packet *pkt = + (struct hfi_msg_sys_debug_packet *) packet; - pkt = (struct hfi_packet *)(hdr + sizeof(struct hfi_header)); - if (pkt->type == HFI_PROP_DEBUG_LOG_LEVEL) { SKIP_INVALID_PKT(pkt->size, - sizeof(u32), sizeof(*pkt)); - - payload = (u32) *((u8 *)pkt + sizeof(struct hfi_packet)); + pkt->msg_size, sizeof(*pkt)); /* * All fw messages starts with new line character. This @@ -972,14 +991,14 @@ static void __flush_debug_queue(struct msm_vidc_core *core, u8 *header) * from the message fixes this to print it in a single * line. */ - //pkt->rg_msg_data[sizeof(u32)-1] = '\0'; - dprintk_firmware(log_level, "%s", &payload); + pkt->rg_msg_data[pkt->msg_size-1] = '\0'; + dprintk_firmware(log_level, "%s", &pkt->rg_msg_data[1]); } } #undef SKIP_INVALID_PKT if (local_packet) - kfree(header); + kfree(packet); } static int __sys_set_debug(struct msm_vidc_core *core, u32 debug) @@ -2318,6 +2337,18 @@ static int __response_handler(struct msm_vidc_core *core) return rc; } +irqreturn_t venus_hfi_isr(int irq, void *data) +{ + struct msm_vidc_core *core = data; + + d_vpr_e("%s()\n", __func__); + + disable_irq_nosync(irq); + queue_work(core->device_workq, &core->device_work); + + return IRQ_HANDLED; +} + void venus_hfi_work_handler(struct work_struct *work) { struct msm_vidc_core *core; @@ -2561,7 +2592,7 @@ int venus_hfi_session_set_codec(struct msm_vidc_inst *inst) HFI_PROP_CODEC, HFI_HOST_FLAGS_NONE, HFI_PORT_NONE, - HFI_PAYLOAD_U32, + HFI_PAYLOAD_U32_ENUM, &codec, sizeof(u32)); if (rc) @@ -2702,6 +2733,49 @@ int venus_hfi_stop(struct msm_vidc_inst *inst, enum msm_vidc_port_type port) return rc; } +int venus_hfi_session_command(struct msm_vidc_inst *inst, + u32 cmd, enum msm_vidc_port_type port, u32 payload_type, + void *payload, u32 payload_size) +{ + int rc = 0; + struct msm_vidc_core *core; + + if (!inst || !inst->packet || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + core = inst->core; + + rc = hfi_create_header(inst->packet, inst->packet_size, + inst->session_id, + core->header_id++); + if (rc) + return rc; + + rc = hfi_create_packet(inst->packet, inst->packet_size, + cmd, + (HFI_HOST_FLAGS_RESPONSE_REQUIRED | + HFI_HOST_FLAGS_INTR_REQUIRED), + payload_type, + get_hfi_port(inst, port), + core->packet_id++, + payload, + payload_size); + + if (rc) + goto err_cmd; + + s_vpr_h(inst->sid, "Command packet 0x%x created\n", cmd); + __iface_cmdq_write(inst->core, inst->packet); + + return rc; + +err_cmd: + s_vpr_e(inst->sid, "%s: create packet failed for cmd: %d\n", + __func__, cmd); + return rc; +} + int venus_hfi_queue_buffer(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buffer, struct msm_vidc_buffer *metabuf) { diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index d4c1473144..b31bbd7a29 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -34,7 +34,13 @@ bool is_valid_hfi_buffer_type(struct msm_vidc_inst *inst, if (buffer_type != HFI_BUFFER_BITSTREAM && buffer_type != HFI_BUFFER_RAW && - buffer_type != HFI_BUFFER_METADATA) { + buffer_type != HFI_BUFFER_METADATA && + buffer_type != HFI_BUFFER_BIN && + buffer_type != HFI_BUFFER_COMV && + buffer_type != HFI_BUFFER_NON_COMV && + buffer_type != HFI_BUFFER_LINE && + buffer_type != HFI_BUFFER_DPB && + buffer_type != HFI_BUFFER_PERSIST) { s_vpr_e(inst->sid, "%s: invalid buffer type %#x\n", func, buffer_type); return false; @@ -185,6 +191,8 @@ static int handle_session_start(struct msm_vidc_inst *inst, static int handle_session_stop(struct msm_vidc_inst *inst, struct hfi_packet *pkt) { + int signal_type = -1; + if (pkt->flags & HFI_FW_FLAGS_SESSION_ERROR) { s_vpr_e(inst->sid, "%s: received session error\n", __func__); msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); @@ -193,7 +201,34 @@ static int handle_session_stop(struct msm_vidc_inst *inst, if (pkt->flags & HFI_FW_FLAGS_SUCCESS) s_vpr_h(inst->sid, "%s: successful for port %d\n", __func__, pkt->port); - signal_session_msg_receipt(inst, SIGNAL_CMD_STOP); + + if (is_encode_session(inst)) { + if (pkt->port == HFI_PORT_RAW) { + signal_type = SIGNAL_CMD_STOP_INPUT; + } else if (pkt->port == HFI_PORT_BITSTREAM) { + signal_type = SIGNAL_CMD_STOP_OUTPUT; + } else { + s_vpr_e(inst->sid, "%s: invalid port: %d\n", + __func__, pkt->port); + return -EINVAL; + } + } else if (is_decode_session(inst)) { + if (pkt->port == HFI_PORT_RAW) { + signal_type = SIGNAL_CMD_STOP_OUTPUT; + } else if (pkt->port == HFI_PORT_BITSTREAM) { + signal_type = SIGNAL_CMD_STOP_INPUT; + } else { + s_vpr_e(inst->sid, "%s: invalid port: %d\n", + __func__, pkt->port); + return -EINVAL; + } + } else { + s_vpr_e(inst->sid, "%s: invalid session\n", __func__); + return -EINVAL; + } + + if (signal_type != -1) + signal_session_msg_receipt(inst, signal_type); return 0; } @@ -441,6 +476,32 @@ static int handle_port_settings_change(struct msm_vidc_inst *inst, return 0; } +static int handle_session_subscribe_mode(struct msm_vidc_inst *inst, + struct hfi_packet *pkt) +{ + if (pkt->flags & HFI_FW_FLAGS_SESSION_ERROR) { + s_vpr_e(inst->sid, "%s: received session error\n", __func__); + msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); + } + + if (pkt->flags & HFI_FW_FLAGS_SUCCESS) + s_vpr_h(inst->sid, "%s: successful\n", __func__); + return 0; +} + +static int handle_session_delivery_mode(struct msm_vidc_inst *inst, + struct hfi_packet *pkt) +{ + if (pkt->flags & HFI_FW_FLAGS_SESSION_ERROR) { + s_vpr_e(inst->sid, "%s: received session error\n", __func__); + msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); + } + + if (pkt->flags & HFI_FW_FLAGS_SUCCESS) + s_vpr_h(inst->sid, "%s: successful\n", __func__); + return 0; +} + static int handle_session_command(struct msm_vidc_inst *inst, struct hfi_packet *pkt) { @@ -459,6 +520,10 @@ static int handle_session_command(struct msm_vidc_inst *inst, return handle_session_buffer(inst, pkt); case HFI_CMD_SETTINGS_CHANGE: return handle_port_settings_change(inst, pkt); + case HFI_CMD_SUBSCRIBE_MODE: + return handle_session_subscribe_mode(inst, pkt); + case HFI_CMD_DELIVERY_MODE: + return handle_session_delivery_mode(inst, pkt); default: s_vpr_e(inst->sid, "%s: Unsupported command type: %#x\n", __func__, pkt->type); @@ -531,39 +596,47 @@ static int handle_system_response(struct msm_vidc_core *core, struct hfi_header *hdr) { int rc = 0; - struct hfi_packet *pkt; + struct hfi_packet *packet; + u8 *pkt; int i; - pkt = (struct hfi_packet *)((u8 *)hdr + sizeof(struct hfi_header)); + pkt = (u8 *)((u8 *)hdr + sizeof(struct hfi_header)); for (i = 0; i < hdr->num_packets; i++) { if (validate_packet((u8 *)pkt, core->response_packet, - core->packet_size, __func__)) - return -EINVAL; - if (pkt->type == HFI_CMD_INIT) { - rc = handle_system_init(core, pkt); - } else if (pkt->type > HFI_SYSTEM_ERROR_BEGIN && - pkt->type < HFI_SYSTEM_ERROR_END) { - rc = handle_system_error(core, pkt); - } else if (pkt->type > HFI_PROP_BEGIN && - pkt->type < HFI_PROP_CODEC) { - rc = handle_system_property(core, pkt); + core->packet_size, __func__)) { + rc = -EINVAL; + goto exit; + } + packet = (struct hfi_packet *)pkt; + if (packet->type == HFI_CMD_INIT) { + rc = handle_system_init(core, packet); + } else if (packet->type > HFI_SYSTEM_ERROR_BEGIN && + packet->type < HFI_SYSTEM_ERROR_END) { + rc = handle_system_error(core, packet); + } else if (packet->type > HFI_PROP_BEGIN && + packet->type < HFI_PROP_CODEC) { + rc = handle_system_property(core, packet); } else { d_vpr_e("%s: Unknown packet type: %#x\n", - __func__, pkt->type); - return -EINVAL; + __func__, packet->type); + rc = -EINVAL; + goto exit; } - pkt += pkt->size; + pkt += packet->size; } +exit: return rc; } static int handle_session_response(struct msm_vidc_core *core, struct hfi_header *hdr) { - struct hfi_packet *pkt; + int rc = 0; struct msm_vidc_inst *inst; - int i, rc = 0; + struct hfi_packet *packet; + u8 *pkt; + int i; inst = get_inst(core, hdr->session_id); if (!inst) { @@ -572,29 +645,31 @@ static int handle_session_response(struct msm_vidc_core *core, } mutex_lock(&inst->lock); - pkt = (struct hfi_packet *)((u8 *)hdr + sizeof(struct hfi_header)); + pkt = (u8 *)((u8 *)hdr + sizeof(struct hfi_header)); for (i = 0; i < hdr->num_packets; i++) { - if (validate_packet((u8 *)pkt, core->response_packet, + if (validate_packet(pkt, core->response_packet, core->packet_size, __func__)) { rc = -EINVAL; goto exit; } - if (pkt->type < HFI_CMD_END && pkt->type > HFI_CMD_BEGIN) { - rc = handle_session_command(inst, pkt); - } else if (pkt->type > HFI_PROP_BEGIN && - pkt->type < HFI_PROP_END) { - rc = handle_session_property(inst, pkt); - } else if (pkt->type > HFI_SESSION_ERROR_BEGIN && - pkt->type < HFI_SESSION_ERROR_END) { - rc = handle_session_error(inst, pkt); + packet = (struct hfi_packet *)pkt; + if (packet->type < HFI_CMD_END && + packet->type > HFI_CMD_BEGIN) { + rc = handle_session_command(inst, packet); + } else if (packet->type > HFI_PROP_BEGIN && + packet->type < HFI_PROP_END) { + rc = handle_session_property(inst, packet); + } else if (packet->type > HFI_SESSION_ERROR_BEGIN && + packet->type < HFI_SESSION_ERROR_END) { + rc = handle_session_error(inst, packet); } else { s_vpr_e(inst->sid, "%s: Unknown packet type: %#x\n", - __func__, pkt->type); + __func__, packet->type); rc = -EINVAL; goto exit; } - pkt += pkt->size; + pkt += packet->size; } exit: mutex_unlock(&inst->lock); From 9476ecc5fe317bcd868e65013b5cb708e0a2c1ef Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Tue, 13 Oct 2020 14:11:37 -0700 Subject: [PATCH 0018/1061] video: driver: Add support to enc start/stop streaming Add support to encoder start and stop streaming sequence. Change-Id: Ie4f124af212ed030178d0e2fe5af3d6f9f639aa0 Signed-off-by: Akshata Sahukar --- .../variant/iris2/src/msm_vidc_buffer_iris2.c | 7 +- driver/vidc/inc/msm_venc.h | 4 + driver/vidc/inc/msm_vidc_driver.h | 1 + driver/vidc/inc/msm_vidc_inst.h | 3 + driver/vidc/inc/msm_vidc_internal.h | 5 + driver/vidc/src/hfi_packet.c | 3 + driver/vidc/src/msm_venc.c | 652 ++++++++++++++++++ driver/vidc/src/msm_vidc.c | 3 + driver/vidc/src/msm_vidc_buffer.c | 45 +- driver/vidc/src/msm_vidc_driver.c | 8 + driver/vidc/src/msm_vidc_vb2.c | 37 +- driver/vidc/src/venus_hfi_response.c | 1 + 12 files changed, 753 insertions(+), 16 deletions(-) diff --git a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c index 13563c2c1a..f0bfa3a3b8 100644 --- a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c @@ -575,6 +575,7 @@ static u32 calculate_enc_scratch_size(struct msm_vidc_inst *inst, bitstream_size = ALIGN(bitstream_size, VENUS_DMA_ALIGNMENT); if (1) { // TODO: work_mode == HFI_WORKMODE_2) { + s_vpr_e(inst->sid, "work mode 2\n"); total_bitbin_buffers = 3; bitbin_size = bitstream_size * 17 / 10; bitbin_size = ALIGN(bitbin_size, VENUS_DMA_ALIGNMENT); @@ -1288,7 +1289,8 @@ int msm_buffer_size_iris2(struct msm_vidc_inst *inst, case MSM_VIDC_BUF_DPB: size = msm_vidc_encoder_dpb_size_iris2(inst); break; - case MSM_VIDC_BUF_PERSIST: + //case MSM_VIDC_BUF_PERSIST: + case MSM_VIDC_BUF_ARP: size = msm_vidc_encoder_persist_size_iris2(inst); break; default: @@ -1344,7 +1346,8 @@ int msm_buffer_min_count_iris2(struct msm_vidc_inst *inst, case MSM_VIDC_BUF_NON_COMV: case MSM_VIDC_BUF_LINE: case MSM_VIDC_BUF_DPB: - case MSM_VIDC_BUF_PERSIST: + //case MSM_VIDC_BUF_PERSIST: + case MSM_VIDC_BUF_ARP: count = 1; break; default: diff --git a/driver/vidc/inc/msm_venc.h b/driver/vidc/inc/msm_venc.h index 1d1f41e921..11d5c2df67 100644 --- a/driver/vidc/inc/msm_venc.h +++ b/driver/vidc/inc/msm_venc.h @@ -9,6 +9,10 @@ #include "msm_vidc_core.h" #include "msm_vidc_inst.h" +int msm_venc_stop_input(struct msm_vidc_inst *inst); +int msm_venc_start_input(struct msm_vidc_inst *inst); +int msm_venc_stop_output(struct msm_vidc_inst *inst); +int msm_venc_start_output(struct msm_vidc_inst *inst); int msm_venc_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f); int msm_venc_g_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f); int msm_venc_enum_fmt(struct msm_vidc_inst *inst, struct v4l2_fmtdesc *f); diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 9b562d6223..a41ba4ba3c 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -50,6 +50,7 @@ static inline is_output_meta_buffer(enum msm_vidc_buffer_type buffer_type) static inline is_internal_buffer(enum msm_vidc_buffer_type buffer_type) { return buffer_type == MSM_VIDC_BUF_BIN || + buffer_type == MSM_VIDC_BUF_ARP || buffer_type == MSM_VIDC_BUF_COMV || buffer_type == MSM_VIDC_BUF_NON_COMV || buffer_type == MSM_VIDC_BUF_LINE || diff --git a/driver/vidc/inc/msm_vidc_inst.h b/driver/vidc/inc/msm_vidc_inst.h index 1045100f48..e312d8de52 100644 --- a/driver/vidc/inc/msm_vidc_inst.h +++ b/driver/vidc/inc/msm_vidc_inst.h @@ -27,6 +27,7 @@ struct msm_vidc_session_ops { struct msm_vidc_allocations_info { struct msm_vidc_allocations bin; + struct msm_vidc_allocations arp; struct msm_vidc_allocations comv; struct msm_vidc_allocations non_comv; struct msm_vidc_allocations line; @@ -40,6 +41,7 @@ struct msm_vidc_mappings_info { struct msm_vidc_mappings input_meta; struct msm_vidc_mappings output_meta; struct msm_vidc_mappings bin; + struct msm_vidc_mappings arp; struct msm_vidc_mappings comv; struct msm_vidc_mappings non_comv; struct msm_vidc_mappings line; @@ -53,6 +55,7 @@ struct msm_vidc_buffers_info { struct msm_vidc_buffers input_meta; struct msm_vidc_buffers output_meta; struct msm_vidc_buffers bin; + struct msm_vidc_buffers arp; struct msm_vidc_buffers comv; struct msm_vidc_buffers non_comv; struct msm_vidc_buffers line; diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 987cdb12b8..6022a67fb8 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -68,6 +68,10 @@ (V4L2_CTRL_ID2WHICH(idx) == V4L2_CTRL_CLASS_MPEG) && \ V4L2_CTRL_DRIVER_PRIV(idx)) +#define BUFFER_ALIGNMENT_SIZE(x) x +#define NUM_MBS_720P (((1280 + 15) >> 4) * ((720 + 15) >> 4)) +#define NUM_MBS_4k (((4096 + 15) >> 4) * ((2304 + 15) >> 4)) + /* * Convert Q16 number into Integer and Fractional part upto 2 places. * Ex : 105752 / 65536 = 1.61; 1.61 in Q16 = 105752; @@ -110,6 +114,7 @@ enum msm_vidc_buffer_type { MSM_VIDC_BUF_OUTPUT_META, MSM_VIDC_BUF_QUEUE, MSM_VIDC_BUF_BIN, + MSM_VIDC_BUF_ARP, MSM_VIDC_BUF_COMV, MSM_VIDC_BUF_NON_COMV, MSM_VIDC_BUF_LINE, diff --git a/driver/vidc/src/hfi_packet.c b/driver/vidc/src/hfi_packet.c index 021d43759e..c20fbac758 100644 --- a/driver/vidc/src/hfi_packet.c +++ b/driver/vidc/src/hfi_packet.c @@ -86,6 +86,7 @@ u32 get_hfi_port_from_buffer_type(struct msm_vidc_inst *inst, case MSM_VIDC_BUF_INPUT: case MSM_VIDC_BUF_INPUT_META: case MSM_VIDC_BUF_BIN: + case MSM_VIDC_BUF_ARP: case MSM_VIDC_BUF_COMV: case MSM_VIDC_BUF_NON_COMV: case MSM_VIDC_BUF_LINE: @@ -131,6 +132,8 @@ u32 get_hfi_buffer_type(enum msm_vidc_domain_type domain, return HFI_BUFFER_METADATA; case MSM_VIDC_BUF_BIN: return HFI_BUFFER_BIN; + case MSM_VIDC_BUF_ARP: + return HFI_BUFFER_ARP; case MSM_VIDC_BUF_COMV: return HFI_BUFFER_COMV; case MSM_VIDC_BUF_NON_COMV: diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index feb948f034..2d19b5b2ff 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -13,6 +13,47 @@ #include "msm_vidc_internal.h" #include "msm_vidc_platform.h" #include "msm_vidc_debug.h" +#include "venus_hfi.h" +#include "hfi_packet.h" + +u32 msm_venc_input_set_prop[] = { + HFI_PROP_COLOR_FORMAT, + HFI_PROP_ALIGN_RESOLUTION, + HFI_PROP_CROP_COORDINATE_TOP_LEFT, + HFI_PROP_CROP_RESOLUTION, +}; + +u32 msm_venc_output_set_prop[] = { + HFI_PROP_ALIGN_RESOLUTION, + HFI_PROP_CROP_COORDINATE_TOP_LEFT, + HFI_PROP_CROP_RESOLUTION, +}; + +u32 msm_venc_input_subscribe_for_properties[] = { + HFI_PROP_TAG_NOT_PROPAGATED_TO_OUTPUT, +}; + +u32 msm_venc_deliver_as_metadata[] = { + HFI_PROP_BUFFER_TAG, + HFI_PROP_SEI_MASTERING_DISPLAY_COLOUR, + HFI_PROP_SEI_CONTENT_LIGHT_LEVEL, + HFI_PROP_SEI_HDR10PLUS_USERDATA, + HFI_PROP_CVP_STAT_INFO, +}; + +u32 msm_venc_subscribe_for_metadata[] = { + HFI_PROP_BUFFER_TAG, + HFI_PROP_METADATA_SEQ_HEADER_NAL, + HFI_PROP_TIMESTAMP, + HFI_PROP_LTR_MARK_USE_DETAILS, + HFI_PROP_SUBFRAME_OUTPUT, + HFI_PROP_ENC_QP_METADATA, +}; + +u32 msm_venc_output_subscribe_for_properties[] = { + HFI_PROP_PICTURE_TYPE, + HFI_PROP_BUFFER_MARK, +}; static int msm_venc_codec_change(struct msm_vidc_inst *inst, u32 codec) { @@ -25,6 +66,617 @@ static int msm_venc_codec_change(struct msm_vidc_inst *inst, u32 codec) return rc; } +static int msm_venc_set_colorformat(struct msm_vidc_inst *inst, + enum msm_vidc_port_type port) +{ + int rc = 0; + u32 pixelformat; + enum msm_vidc_colorformat_type colorformat; + u32 hfi_colorformat; + + if (port != INPUT_PORT && port != OUTPUT_PORT) { + s_vpr_e(inst->sid, "%s: invalid port %d\n", __func__, port); + return -EINVAL; + } + + pixelformat = inst->fmts[INPUT_PORT].fmt.pix_mp.pixelformat; + if (pixelformat != V4L2_PIX_FMT_NV12_UBWC && + pixelformat != V4L2_PIX_FMT_NV12_TP10_UBWC) { + s_vpr_e(inst->sid, "%s: invalid pixelformat %#x\n", + __func__, pixelformat); + return -EINVAL; + } + colorformat = v4l2_colorformat_to_driver(pixelformat, __func__); + hfi_colorformat = get_hfi_colorformat(inst, colorformat); + rc = venus_hfi_session_property(inst, + HFI_PROP_COLOR_FORMAT, + HFI_HOST_FLAGS_NONE, + get_hfi_port(inst, port), + HFI_PAYLOAD_U32_ENUM, + &hfi_colorformat, + sizeof(u32)); + if (rc) + return rc; + return 0; +} + +static int msm_venc_set_resolution(struct msm_vidc_inst *inst, + enum msm_vidc_port_type port) +{ + int rc = 0; + u32 resolution; + + if (port != INPUT_PORT && port != OUTPUT_PORT) { + s_vpr_e(inst->sid, "%s: invalid port %d\n", __func__, port); + return -EINVAL; + } + + resolution = inst->fmts[port].fmt.pix_mp.width << 16 | + inst->fmts[port].fmt.pix_mp.height; + rc = venus_hfi_session_property(inst, + HFI_PROP_ALIGN_RESOLUTION, + HFI_HOST_FLAGS_NONE, + get_hfi_port(inst, port), + HFI_PAYLOAD_32_PACKED, + &resolution, + sizeof(u32)); + if (rc) + return rc; + return 0; +} + +static int msm_venc_set_crop_top_left(struct msm_vidc_inst *inst, + enum msm_vidc_port_type port) +{ + int rc = 0; + u32 crop_top_left; + + if (port != INPUT_PORT && port != OUTPUT_PORT) { + s_vpr_e(inst->sid, "%s: invalid port %d\n", __func__, port); + return -EINVAL; + } + + crop_top_left = 0; + rc = venus_hfi_session_property(inst, + HFI_PROP_CROP_COORDINATE_TOP_LEFT, + HFI_HOST_FLAGS_NONE, + get_hfi_port(inst, port), + HFI_PAYLOAD_32_PACKED, + &crop_top_left, + sizeof(u32)); + if (rc) + return rc; + return 0; +} + +static int msm_venc_set_crop_resolution(struct msm_vidc_inst *inst, + enum msm_vidc_port_type port) +{ + int rc = 0; + u32 crop; + + if (port != INPUT_PORT && port != OUTPUT_PORT) { + s_vpr_e(inst->sid, "%s: invalid port %d\n", __func__, port); + return -EINVAL; + } + + /* output buffer resolution is nothing but crop */ + crop = inst->fmts[INPUT_PORT].fmt.pix_mp.width << 16 | + inst->fmts[INPUT_PORT].fmt.pix_mp.height; + rc = venus_hfi_session_property(inst, + HFI_PROP_CROP_RESOLUTION, + HFI_HOST_FLAGS_NONE, + get_hfi_port(inst, port), + HFI_PAYLOAD_32_PACKED, + &crop, + sizeof(u32)); + if (rc) + return rc; + return 0; +} + +static int msm_venc_set_stage(struct msm_vidc_inst *inst) +{ + int rc = 0; + struct msm_vidc_core *core = inst->core; + + rc = call_session_op(core, decide_work_mode, inst); + if (rc) { + s_vpr_e(inst->sid, "%s: decide_work_mode failed\n", + __func__); + return -EINVAL; + } + + rc = venus_hfi_session_property(inst, + HFI_PROP_STAGE, + HFI_HOST_FLAGS_NONE, + HFI_PORT_NONE, + HFI_PAYLOAD_U32, + &inst->stage, + sizeof(u32)); + if (rc) + return rc; + return 0; +} + +static int msm_venc_set_pipe(struct msm_vidc_inst *inst) +{ + int rc = 0; + struct msm_vidc_core *core = inst->core; + + rc = call_session_op(core, decide_work_route, inst); + if (rc) { + s_vpr_e(inst->sid, "%s: decide_work_route failed\n", + __func__); + return -EINVAL; + } + + rc = venus_hfi_session_property(inst, + HFI_PROP_PIPE, + HFI_HOST_FLAGS_NONE, + HFI_PORT_NONE, + HFI_PAYLOAD_U32, + &inst->pipe, + sizeof(u32)); + if (rc) + return rc; + return 0; +} + +static int msm_venc_set_input_properties(struct msm_vidc_inst *inst) +{ + int rc = 0; + int i = 0; + + d_vpr_h("%s()\n", __func__); + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + for (i = 0; i < ARRAY_SIZE(msm_venc_input_set_prop); + i++) { + switch (msm_venc_input_set_prop[i]) { + case HFI_PROP_COLOR_FORMAT: + rc = msm_venc_set_colorformat(inst, INPUT_PORT); + break; + case HFI_PROP_ALIGN_RESOLUTION: + rc = msm_venc_set_resolution(inst, INPUT_PORT); + break; + case HFI_PROP_CROP_COORDINATE_TOP_LEFT: + rc = msm_venc_set_crop_top_left(inst, INPUT_PORT); + break; + case HFI_PROP_CROP_RESOLUTION: + rc = msm_venc_set_crop_resolution(inst, INPUT_PORT); + break; + default: + d_vpr_e("%s: unknown property %#x\n", __func__, + msm_venc_input_set_prop[i]); + rc = -EINVAL; + break; + } + } + + return rc; +} + +static int msm_venc_set_output_properties(struct msm_vidc_inst *inst) +{ + int rc = 0; + int i = 0; + + d_vpr_h("%s()\n", __func__); + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + //TODO: set HFI_PORT_NONE properties at master port streamon. + rc = msm_venc_set_stage(inst); + if (rc) + return rc; + + rc = msm_venc_set_pipe(inst); + if (rc) + return rc; + + for (i = 0; i < ARRAY_SIZE(msm_venc_output_set_prop); + i++) { + switch (msm_venc_output_set_prop[i]) { + case HFI_PROP_ALIGN_RESOLUTION: + rc = msm_venc_set_resolution(inst, OUTPUT_PORT); + break; + case HFI_PROP_CROP_COORDINATE_TOP_LEFT: + rc = msm_venc_set_crop_top_left(inst, OUTPUT_PORT); + break; + case HFI_PROP_CROP_RESOLUTION: + rc = msm_venc_set_crop_resolution(inst, OUTPUT_PORT); + break; + default: + d_vpr_e("%s: unknown property %#x\n", __func__, + msm_venc_output_set_prop[i]); + rc = -EINVAL; + break; + } + } + + return rc; +} + +static int msm_venc_get_input_internal_buffers(struct msm_vidc_inst *inst) +{ + int rc = 0; + struct msm_vidc_core *core; + + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + core = inst->core; + + inst->buffers.arp.size = call_session_op(core, buffer_size, + inst, MSM_VIDC_BUF_ARP); + inst->buffers.bin.size = call_session_op(core, buffer_size, + inst, MSM_VIDC_BUF_BIN); + /* inst->buffers.comv.size = call_session_op(core, buffer_size, + inst, MSM_VIDC_BUF_COMV); + inst->buffers.non_comv.size = call_session_op(core, buffer_size, + inst, MSM_VIDC_BUF_NON_COMV); */ + inst->buffers.line.size = call_session_op(core, buffer_size, + inst, MSM_VIDC_BUF_LINE); + inst->buffers.dpb.size = call_session_op(core, buffer_size, + inst, MSM_VIDC_BUF_DPB); + /* inst->buffers.persist.size = call_session_op(core, buffer_size, + inst, MSM_VIDC_BUF_PERSIST); */ + + inst->buffers.arp.min_count = call_session_op(core, min_count, + inst, MSM_VIDC_BUF_ARP); + inst->buffers.bin.min_count = call_session_op(core, min_count, + inst, MSM_VIDC_BUF_BIN); + /* inst->buffers.comv.min_count = call_session_op(core, min_count, + inst, MSM_VIDC_BUF_COMV); + inst->buffers.non_comv.min_count = call_session_op(core, min_count, + inst, MSM_VIDC_BUF_NON_COMV); */ + inst->buffers.line.min_count = call_session_op(core, min_count, + inst, MSM_VIDC_BUF_LINE); + inst->buffers.dpb.min_count = call_session_op(core, min_count, + inst, MSM_VIDC_BUF_DPB); + /* inst->buffers.persist.min_count = call_session_op(core, min_count, + inst, MSM_VIDC_BUF_PERSIST); */ + + s_vpr_h(inst->sid, "internal buffer: min size\n"); + s_vpr_h(inst->sid, "arp buffer: %d %d\n", + inst->buffers.arp.min_count, + inst->buffers.arp.size); + s_vpr_h(inst->sid, "bin buffer: %d %d\n", + inst->buffers.bin.min_count, + inst->buffers.bin.size); + /* s_vpr_h(inst->sid, "comv buffer: %d %d\n", + inst->buffers.comv.min_count, + inst->buffers.comv.size); + s_vpr_h(inst->sid, "non_comv buffer: %d %d\n", + inst->buffers.non_comv.min_count, + inst->buffers.non_comv.size); */ + s_vpr_h(inst->sid, "line buffer: %d %d\n", + inst->buffers.line.min_count, + inst->buffers.line.size); + s_vpr_h(inst->sid, "dpb buffer: %d %d\n", + inst->buffers.dpb.min_count, + inst->buffers.dpb.size); + /* s_vpr_h(inst->sid, "persist buffer: %d %d\n", + inst->buffers.persist.min_count, + inst->buffers.persist.size); */ + + return rc; +} + +static int msm_venc_create_input_internal_buffers(struct msm_vidc_inst *inst) +{ + int rc = 0; + + d_vpr_h("%s()\n", __func__); + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + rc = msm_vidc_create_internal_buffers(inst, MSM_VIDC_BUF_ARP); + if (rc) + return rc; + rc = msm_vidc_create_internal_buffers(inst, MSM_VIDC_BUF_BIN); + if (rc) + return rc; + /* rc = msm_vidc_create_internal_buffers(inst, MSM_VIDC_BUF_COMV); + if (rc) + return rc; + rc = msm_vidc_create_internal_buffers(inst, MSM_VIDC_BUF_NON_COMV); + if (rc) + return rc; */ + rc = msm_vidc_create_internal_buffers(inst, MSM_VIDC_BUF_LINE); + if (rc) + return rc; + rc = msm_vidc_create_internal_buffers(inst, MSM_VIDC_BUF_DPB); + if (rc) + return rc; + /* rc = msm_vidc_create_internal_buffers(inst, MSM_VIDC_BUF_PERSIST); + if (rc) + return rc; */ + + return 0; +} + +static int msm_venc_queue_input_internal_buffers(struct msm_vidc_inst *inst) +{ + int rc = 0; + + d_vpr_h("%s()\n", __func__); + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + rc = msm_vidc_queue_internal_buffers(inst, MSM_VIDC_BUF_ARP); + if (rc) + return rc; + rc = msm_vidc_queue_internal_buffers(inst, MSM_VIDC_BUF_BIN); + if (rc) + return rc; + /* rc = msm_vidc_queue_internal_buffers(inst, MSM_VIDC_BUF_COMV); + if (rc) + return rc; + rc = msm_vidc_queue_internal_buffers(inst, MSM_VIDC_BUF_NON_COMV); + if (rc) + return rc; */ + rc = msm_vidc_queue_internal_buffers(inst, MSM_VIDC_BUF_LINE); + if (rc) + return rc; + rc = msm_vidc_queue_internal_buffers(inst, MSM_VIDC_BUF_DPB); + if (rc) + return rc; + // TODO: fw is not accepting persist buffer and returning session error. + //rc = msm_vidc_queue_internal_buffers(inst, MSM_VIDC_BUF_PERSIST); + if (rc) + return rc; + + return 0; +} + +static int msm_venc_property_subscription(struct msm_vidc_inst *inst, + enum msm_vidc_port_type port) +{ + int rc = 0; + struct msm_vidc_core *core; + u32 payload[32] = {0}; + u32 i; + u32 payload_size = 0; + + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + core = inst->core; + d_vpr_h("%s()\n", __func__); + + payload[0] = HFI_MODE_PROPERTY; + if (port == INPUT_PORT) { + for (i = 0; i < ARRAY_SIZE(msm_venc_input_subscribe_for_properties); i++) + payload[i + 1] = msm_venc_input_subscribe_for_properties[i]; + payload_size = (ARRAY_SIZE(msm_venc_input_subscribe_for_properties) + 1) * + sizeof(u32); + } else if (port == OUTPUT_PORT) { + for (i = 0; i < ARRAY_SIZE(msm_venc_output_subscribe_for_properties); i++) + payload[i + 1] = msm_venc_output_subscribe_for_properties[i]; + payload_size = (ARRAY_SIZE(msm_venc_output_subscribe_for_properties) + 1) * + sizeof(u32); + } else { + s_vpr_e(inst->sid, "%s: invalid port: %d\n", __func__, port); + return -EINVAL; + } + + rc = venus_hfi_session_command(inst, + HFI_CMD_SUBSCRIBE_MODE, + port, + HFI_PAYLOAD_U32_ARRAY, + &payload[0], + payload_size); + + return rc; +} + +static int msm_venc_metadata_delivery(struct msm_vidc_inst *inst, + enum msm_vidc_port_type port) +{ + int rc = 0; + struct msm_vidc_core *core; + u32 payload[32] = {0}; + u32 i; + + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + core = inst->core; + d_vpr_h("%s()\n", __func__); + + payload[0] = HFI_MODE_METADATA; + for (i = 0; i < ARRAY_SIZE(msm_venc_deliver_as_metadata); i++) + payload[i + 1] = msm_venc_deliver_as_metadata[i]; + + rc = venus_hfi_session_command(inst, + HFI_CMD_DELIVERY_MODE, + port, + HFI_PAYLOAD_U32_ARRAY, + &payload[0], + (ARRAY_SIZE(msm_venc_deliver_as_metadata) + 1) * + sizeof(u32)); + + return rc; +} + +static int msm_venc_metadata_subscription(struct msm_vidc_inst *inst, + enum msm_vidc_port_type port) +{ + int rc = 0; + struct msm_vidc_core *core; + u32 payload[32] = {0}; + u32 i; + + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + core = inst->core; + d_vpr_h("%s()\n", __func__); + + payload[0] = HFI_MODE_METADATA; + for (i = 0; i < ARRAY_SIZE(msm_venc_subscribe_for_metadata); i++) + payload[i + 1] = msm_venc_subscribe_for_metadata[i]; + + rc = venus_hfi_session_command(inst, + HFI_CMD_SUBSCRIBE_MODE, + port, + HFI_PAYLOAD_U32_ARRAY, + &payload[0], + (ARRAY_SIZE(msm_venc_subscribe_for_metadata) + 1) * + sizeof(u32)); + + return rc; +} + +int msm_venc_stop_input(struct msm_vidc_inst *inst) +{ + int rc = 0; + + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + rc = msm_vidc_session_stop(inst, INPUT_PORT); + if (rc) + return rc; + + return 0; +} + +int msm_venc_start_input(struct msm_vidc_inst *inst) +{ + int rc = 0; + struct msm_vidc_core *core; + + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + core = inst->core; + s_vpr_h(inst->sid, "%s()\n", __func__); + + //rc = msm_vidc_check_session_supported(inst); + if (rc) + goto error; + //rc = msm_vidc_check_scaling_supported(inst); + if (rc) + goto error; + + rc = msm_venc_set_input_properties(inst); + if (rc) + goto error; + + /* Decide bse vpp delay after work mode */ + //msm_vidc_set_bse_vpp_delay(inst); + + rc = msm_venc_get_input_internal_buffers(inst); + if (rc) + goto error; + /* check for memory after all buffers calculation */ + //rc = msm_vidc_check_memory_supported(inst); + if (rc) + goto error; + + //msm_vidc_update_dcvs(inst); + //msm_vidc_update_batching(inst); + //msm_vidc_scale_power(inst); + + rc = msm_venc_create_input_internal_buffers(inst); + rc = 0; // TODO + if (rc) + goto error; + rc = msm_venc_queue_input_internal_buffers(inst); + rc = 0; // TODO + if (rc) + goto error; + + rc = msm_venc_property_subscription(inst, INPUT_PORT); + if (rc) + return rc; + + rc = msm_venc_metadata_delivery(inst, INPUT_PORT); + if (rc) + return rc; + + rc = venus_hfi_start(inst, INPUT_PORT); + if (rc) + goto error; + + s_vpr_h(inst->sid, "%s: done\n", __func__); + return 0; + +error: + s_vpr_e(inst->sid, "%s: failed\n", __func__); + msm_venc_stop_input(inst); + return rc; +} + +int msm_venc_stop_output(struct msm_vidc_inst *inst) +{ + int rc = 0; + + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + rc = msm_vidc_session_stop(inst, OUTPUT_PORT); + if (rc) + return rc; + + return 0; +} + +int msm_venc_start_output(struct msm_vidc_inst *inst) +{ + int rc = 0; + + d_vpr_h("%s()\n", __func__); + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + rc = msm_venc_set_output_properties(inst); + if (rc) + goto error; + + rc = msm_venc_property_subscription(inst, OUTPUT_PORT); + if (rc) + return rc; + + rc = msm_venc_metadata_subscription(inst, OUTPUT_PORT); + if (rc) + return rc; + + rc = venus_hfi_start(inst, OUTPUT_PORT); + if (rc) + goto error; + + d_vpr_h("%s: done\n", __func__); + return 0; + +error: + msm_venc_stop_output(inst); + return rc; +} + int msm_venc_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) { int rc = 0; diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index d45151234e..84d8e84725 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -760,12 +760,14 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) INIT_LIST_HEAD(&inst->buffers.output.list); INIT_LIST_HEAD(&inst->buffers.output_meta.list); INIT_LIST_HEAD(&inst->buffers.bin.list); + INIT_LIST_HEAD(&inst->buffers.arp.list); INIT_LIST_HEAD(&inst->buffers.comv.list); INIT_LIST_HEAD(&inst->buffers.non_comv.list); INIT_LIST_HEAD(&inst->buffers.line.list); INIT_LIST_HEAD(&inst->buffers.dpb.list); INIT_LIST_HEAD(&inst->buffers.persist.list); INIT_LIST_HEAD(&inst->allocations.bin.list); + INIT_LIST_HEAD(&inst->allocations.arp.list); INIT_LIST_HEAD(&inst->allocations.comv.list); INIT_LIST_HEAD(&inst->allocations.non_comv.list); INIT_LIST_HEAD(&inst->allocations.line.list); @@ -776,6 +778,7 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) INIT_LIST_HEAD(&inst->mappings.output.list); INIT_LIST_HEAD(&inst->mappings.output_meta.list); INIT_LIST_HEAD(&inst->mappings.bin.list); + INIT_LIST_HEAD(&inst->mappings.arp.list); INIT_LIST_HEAD(&inst->mappings.comv.list); INIT_LIST_HEAD(&inst->mappings.non_comv.list); INIT_LIST_HEAD(&inst->mappings.line.list); diff --git a/driver/vidc/src/msm_vidc_buffer.c b/driver/vidc/src/msm_vidc_buffer.c index 5332c7aa06..fc3d7f0858 100644 --- a/driver/vidc/src/msm_vidc_buffer.c +++ b/driver/vidc/src/msm_vidc_buffer.c @@ -9,6 +9,7 @@ #include "msm_vidc_core.h" #include "msm_vidc_driver.h" #include "msm_vidc_debug.h" +#include "msm_vidc_internal.h" #define MIN_INPUT_BUFFERS 4 #define MIN_ENC_OUTPUT_BUFFERS 4 @@ -182,9 +183,47 @@ u32 msm_vidc_encoder_input_size(struct msm_vidc_inst *inst) u32 msm_vidc_encoder_output_size(struct msm_vidc_inst *inst) { - u32 size = ALIGN(15 * 1024 * 1024, SZ_4K); - size = 4; // TODO - return size; + u32 frame_size; + u32 mbs_per_frame; + u32 width, height; + struct v4l2_format *f; + + f = &inst->fmts[OUTPUT_PORT]; + /* + * Encoder output size calculation: 32 Align width/height + * For resolution < 720p : YUVsize * 4 + * For resolution > 720p & <= 4K : YUVsize / 2 + * For resolution > 4k : YUVsize / 4 + * Initially frame_size = YUVsize * 2; + */ + + /* if (is_grid_session(inst)) { + f->fmt.pix_mp.width = f->fmt.pix_mp.height = HEIC_GRID_DIMENSION; + } */ + width = ALIGN(f->fmt.pix_mp.width, BUFFER_ALIGNMENT_SIZE(32)); + height = ALIGN(f->fmt.pix_mp.height, BUFFER_ALIGNMENT_SIZE(32)); + mbs_per_frame = NUM_MBS_PER_FRAME(width, height); + frame_size = (width * height * 3); + + if (mbs_per_frame < NUM_MBS_720P) + frame_size = frame_size << 1; + else if (mbs_per_frame <= NUM_MBS_4k) + frame_size = frame_size >> 2; + else + frame_size = frame_size >> 3; + + /*if ((inst->rc_type == RATE_CONTROL_OFF) || + (inst->rc_type == V4L2_MPEG_VIDEO_BITRATE_MODE_CQ)) + frame_size = frame_size << 1; + + if (inst->rc_type == RATE_CONTROL_LOSSLESS) + frame_size = (width * height * 9) >> 2; */ + + /* multiply by 10/8 (1.25) to get size for 10 bit case */ + if (f->fmt.pix_mp.pixelformat == V4L2_PIX_FMT_HEVC) + frame_size = frame_size + (frame_size >> 2); + + return ALIGN(frame_size, SZ_4K); } u32 msm_vidc_encoder_input_meta_size(struct msm_vidc_inst *inst) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 6c4e9f8c75..e873c6ad92 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -308,6 +308,8 @@ u32 msm_vidc_get_buffer_region(struct msm_vidc_inst *inst, region = MSM_VIDC_SECURE_PIXEL; break; case MSM_VIDC_BUF_PERSIST: + // TODO: Need to revisit for ARP + case MSM_VIDC_BUF_ARP: region = MSM_VIDC_SECURE_NONPIXEL; break; default: @@ -332,6 +334,8 @@ struct msm_vidc_buffers *msm_vidc_get_buffers( return &inst->buffers.output_meta; case MSM_VIDC_BUF_BIN: return &inst->buffers.bin; + case MSM_VIDC_BUF_ARP: + return &inst->buffers.arp; case MSM_VIDC_BUF_COMV: return &inst->buffers.comv; case MSM_VIDC_BUF_NON_COMV: @@ -364,6 +368,8 @@ struct msm_vidc_mappings *msm_vidc_get_mappings( return &inst->mappings.output_meta; case MSM_VIDC_BUF_BIN: return &inst->mappings.bin; + case MSM_VIDC_BUF_ARP: + return &inst->mappings.arp; case MSM_VIDC_BUF_COMV: return &inst->mappings.comv; case MSM_VIDC_BUF_NON_COMV: @@ -388,6 +394,8 @@ struct msm_vidc_allocations *msm_vidc_get_allocations( switch (buffer_type) { case MSM_VIDC_BUF_BIN: return &inst->allocations.bin; + case MSM_VIDC_BUF_ARP: + return &inst->allocations.arp; case MSM_VIDC_BUF_COMV: return &inst->allocations.comv; case MSM_VIDC_BUF_NON_COMV: diff --git a/driver/vidc/src/msm_vidc_vb2.c b/driver/vidc/src/msm_vidc_vb2.c index d746d570cb..9f96d7bc59 100644 --- a/driver/vidc/src/msm_vidc_vb2.c +++ b/driver/vidc/src/msm_vidc_vb2.c @@ -171,19 +171,26 @@ int msm_vidc_start_streaming(struct vb2_queue *q, unsigned int count) if (q->type == INPUT_MPLANE) { if (is_decode_session(inst)) rc = msm_vdec_start_input(inst); - //else if (is_encode_session(inst)) - // rc = msm_venc_start_input(inst); + else if (is_encode_session(inst)) + rc = msm_venc_start_input(inst); + else + goto error; } else if (q->type == OUTPUT_MPLANE) { if (is_decode_session(inst)) rc = msm_vdec_start_output(inst); - //else if (is_encode_session(inst)) - // rc = msm_venc_start_output(inst); + else if (is_encode_session(inst)) + rc = msm_venc_start_output(inst); + else + goto error; } else { - s_vpr_e(inst->sid, "%s: invalid type %d\n", __func__, q->type); - rc = -EINVAL; + goto error; } return rc; + +error: + s_vpr_e(inst->sid, "%s: invalid session/qtype, qtype %d\n", __func__, q->type); + return -EINVAL; } void msm_vidc_stop_streaming(struct vb2_queue *q) @@ -215,21 +222,29 @@ void msm_vidc_stop_streaming(struct vb2_queue *q) if (q->type == INPUT_MPLANE) { if (is_decode_session(inst)) rc = msm_vdec_stop_input(inst); - //else if (is_encode_session(inst)) - // rc = msm_venc_start_input(inst); + else if (is_encode_session(inst)) + rc = msm_venc_stop_input(inst); + else + goto error; } else if (q->type == OUTPUT_MPLANE) { if (is_decode_session(inst)) rc = msm_vdec_stop_output(inst); - //else if (is_encode_session(inst)) - // rc = msm_venc_start_output(inst); + else if (is_encode_session(inst)) + rc = msm_venc_stop_output(inst); + else + goto error; } else { - s_vpr_e(inst->sid, "%s: invalid type %d\n", __func__, q->type); + goto error; } if (rc) s_vpr_e(inst->sid, "%s: stop failed for qtype: %d\n", __func__, q->type); + return; +error: + s_vpr_e(inst->sid, "%s: invalid session/qtype, qtype: %d\n", + __func__, q->type); return; } diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index b31bbd7a29..6b7096c8b3 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -36,6 +36,7 @@ bool is_valid_hfi_buffer_type(struct msm_vidc_inst *inst, buffer_type != HFI_BUFFER_RAW && buffer_type != HFI_BUFFER_METADATA && buffer_type != HFI_BUFFER_BIN && + buffer_type != HFI_BUFFER_ARP && buffer_type != HFI_BUFFER_COMV && buffer_type != HFI_BUFFER_NON_COMV && buffer_type != HFI_BUFFER_LINE && From 3aa92663a7559c1bdfa27874c855cf2c833ac84c Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Fri, 16 Oct 2020 14:35:17 -0700 Subject: [PATCH 0019/1061] video: driver: basic misc changes added print for dt parsing and removed a couple of empty braces. removed static from platform_driver struct definition. Change-Id: Ic3c6c514f501281fd981f232b4125e702570f8c7 Signed-off-by: Darshana Patil --- driver/vidc/inc/msm_vidc_debug.h | 2 +- driver/vidc/src/msm_vidc_debug.c | 2 +- driver/vidc/src/msm_vidc_driver.c | 4 ++-- driver/vidc/src/msm_vidc_dt.c | 3 +++ driver/vidc/src/msm_vidc_probe.c | 3 +-- driver/vidc/src/venus_hfi.c | 6 +++--- 6 files changed, 11 insertions(+), 9 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_debug.h b/driver/vidc/inc/msm_vidc_debug.h index c7261465d6..fdefa84dda 100644 --- a/driver/vidc/inc/msm_vidc_debug.h +++ b/driver/vidc/inc/msm_vidc_debug.h @@ -42,7 +42,7 @@ enum vidc_msg_prio { VIDC_PRINTK = 0x00001000, VIDC_FTRACE = 0x00002000, FW_LOW = 0x00010000, - FW_MEDIUM = 0x00020000, + FW_MED = 0x00020000, FW_HIGH = 0x00040000, FW_ERROR = 0x00080000, FW_FATAL = 0x00100000, diff --git a/driver/vidc/src/msm_vidc_debug.c b/driver/vidc/src/msm_vidc_debug.c index 74f920e385..fa81fbb2f7 100644 --- a/driver/vidc/src/msm_vidc_debug.c +++ b/driver/vidc/src/msm_vidc_debug.c @@ -6,7 +6,7 @@ #include "msm_vidc_debug.h" int msm_vidc_debug = VIDC_HIGH | VIDC_LOW | VIDC_PKT | VIDC_ERR | VIDC_PRINTK | - FW_ERROR | FW_FATAL | FW_FTRACE | FW_LOW | FW_MEDIUM | FW_HIGH | + FW_ERROR | FW_FATAL | FW_FTRACE | FW_LOW | FW_MED | FW_HIGH | FW_PERF | FW_PRINTK; EXPORT_SYMBOL(msm_vidc_debug); diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index e873c6ad92..60b7d520c2 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -16,12 +16,12 @@ #include "venus_hfi.h" #include "msm_vidc.h" -#define COUNT_BITS(a, out) ({ \ +#define COUNT_BITS(a, out) { \ while ((a) >= 1) { \ (out) += (a) & (1); \ (a) >>= (1); \ } \ -}) +} void print_vidc_buffer(u32 tag, const char *str, struct msm_vidc_inst *inst, struct msm_vidc_buffer *vbuf) diff --git a/driver/vidc/src/msm_vidc_dt.c b/driver/vidc/src/msm_vidc_dt.c index 82c966618b..8b1b6eb316 100644 --- a/driver/vidc/src/msm_vidc_dt.c +++ b/driver/vidc/src/msm_vidc_dt.c @@ -696,9 +696,12 @@ static int msm_vidc_read_resources_from_dt(struct platform_device *pdev) kres = platform_get_resource(pdev, IORESOURCE_MEM, 0); dt->register_base = kres ? kres->start : -1; dt->register_size = kres ? (kres->end + 1 - kres->start) : -1; + d_vpr_h("%s: register base %pa, size %#x\n", + __func__, &dt->register_base, dt->register_size); kres = platform_get_resource(pdev, IORESOURCE_IRQ, 0); dt->irq = kres ? kres->start : -1; + d_vpr_h("%s: irq %d\n", __func__, dt->irq); rc = msm_vidc_load_fw_name(core); if (rc) diff --git a/driver/vidc/src/msm_vidc_probe.c b/driver/vidc/src/msm_vidc_probe.c index b70d596669..6b4a763999 100644 --- a/driver/vidc/src/msm_vidc_probe.c +++ b/driver/vidc/src/msm_vidc_probe.c @@ -72,7 +72,6 @@ static struct attribute_group msm_vidc_core_attr_group = { static const struct of_device_id msm_vidc_dt_match[] = { {.compatible = "qcom,msm-vidc"}, {.compatible = "qcom,msm-vidc,context-bank"}, - {} }; MODULE_DEVICE_TABLE(of, msm_vidc_dt_match); @@ -319,7 +318,7 @@ static int msm_vidc_remove(struct platform_device *pdev) return rc; } -static struct platform_driver msm_vidc_driver = { +struct platform_driver msm_vidc_driver = { .probe = msm_vidc_probe, .remove = msm_vidc_remove, .driver = { diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index ba6ceeeb86..1e92255685 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -957,7 +957,7 @@ static void __flush_debug_queue(struct msm_vidc_core *core, u8 *packet) log_level |= FW_PRINTK; } -#define SKIP_INVALID_PKT(pkt_size, payload_size, pkt_hdr_size) ({ \ +#define SKIP_INVALID_PKT(pkt_size, payload_size, pkt_hdr_size) { \ if (pkt_size < pkt_hdr_size || \ payload_size < MIN_PAYLOAD_SIZE || \ payload_size > \ @@ -966,7 +966,7 @@ static void __flush_debug_queue(struct msm_vidc_core *core, u8 *packet) __func__, payload_size); \ continue; \ } \ - }) + } while (!__iface_dbgq_read(core, packet)) { struct hfi_packet_header *pkt = @@ -2168,7 +2168,7 @@ static int __interface_queues_init(struct msm_vidc_core *core) for (i = 0; i < VIDC_IFACEQ_NUMQ; i++) { iface_q = &core->iface_queues[i]; iface_q->q_array.align_device_addr = map.device_addr + offset; - iface_q->q_array.align_virtual_addr = alloc.kvaddr + offset; + iface_q->q_array.align_virtual_addr = (void*)((char*)alloc.kvaddr + offset); iface_q->q_array.mem_size = VIDC_IFACEQ_QUEUE_SIZE; offset += iface_q->q_array.mem_size; iface_q->q_hdr = VIDC_IFACEQ_GET_QHDR_START_ADDR( From 843858405fbf83aa1333cfeb403490e0806ad4b3 Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Mon, 19 Oct 2020 15:12:40 -0700 Subject: [PATCH 0020/1061] video: driver: implement module remove function Implement remove function to unregister video device, unregister v4l2 device, remove sysfs group, deinit irq, platform, dt, core. Change-Id: Ib713b0b66500aafcfb5f0500b9ce7285b9640311 Signed-off-by: Darshana Patil --- driver/platform/waipio/inc/msm_vidc_waipio.h | 1 + driver/platform/waipio/src/msm_vidc_waipio.c | 6 ++ driver/variant/iris2/inc/msm_vidc_iris2.h | 1 + driver/variant/iris2/src/msm_vidc_iris2.c | 6 ++ driver/vidc/src/msm_vidc_driver.c | 4 +- driver/vidc/src/msm_vidc_platform.c | 35 ++++-- driver/vidc/src/msm_vidc_probe.c | 107 ++++++++++++++----- 7 files changed, 125 insertions(+), 35 deletions(-) diff --git a/driver/platform/waipio/inc/msm_vidc_waipio.h b/driver/platform/waipio/inc/msm_vidc_waipio.h index 2ca612c01d..8bef9b2968 100644 --- a/driver/platform/waipio/inc/msm_vidc_waipio.h +++ b/driver/platform/waipio/inc/msm_vidc_waipio.h @@ -9,5 +9,6 @@ #include "msm_vidc_core.h" int msm_vidc_init_platform_waipio(struct msm_vidc_core *core); +int msm_vidc_deinit_platform_waipio(struct msm_vidc_core *core); #endif // _MSM_VIDC_WAIPIO_H_ diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index b3217228df..b4950be9fb 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -354,3 +354,9 @@ int msm_vidc_init_platform_waipio(struct msm_vidc_core *core) return 0; } + +int msm_vidc_deinit_platform_waipio(struct msm_vidc_core *core) +{ + /* do nothing */ + return 0; +} diff --git a/driver/variant/iris2/inc/msm_vidc_iris2.h b/driver/variant/iris2/inc/msm_vidc_iris2.h index 4e67f0e2a9..5fbe17ffef 100644 --- a/driver/variant/iris2/inc/msm_vidc_iris2.h +++ b/driver/variant/iris2/inc/msm_vidc_iris2.h @@ -13,3 +13,4 @@ int msm_vidc_init_iris2(struct msm_vidc_core *core); // return -EINVAL; //} //#endif +int msm_vidc_deinit_iris2(struct msm_vidc_core *core); diff --git a/driver/variant/iris2/src/msm_vidc_iris2.c b/driver/variant/iris2/src/msm_vidc_iris2.c index 20e8b3c8ee..3a348d8b7e 100644 --- a/driver/variant/iris2/src/msm_vidc_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_iris2.c @@ -519,3 +519,9 @@ int msm_vidc_init_iris2(struct msm_vidc_core *core) return 0; } + +int msm_vidc_deinit_iris2(struct msm_vidc_core *core) +{ + /* do nothing */ + return 0; +} diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 60b7d520c2..8e8f94e0d7 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -485,7 +485,7 @@ static int vb2_buffer_to_driver(struct vb2_buffer *vb2, buf->data_offset = vb2->planes[0].data_offset; buf->data_size = vb2->planes[0].bytesused; buf->buffer_size = vb2->planes[0].length; - buf->timestamp = do_div(vb2->timestamp, NSEC_PER_USEC); + buf->timestamp = vb2->timestamp; return rc; } @@ -1003,7 +1003,7 @@ int msm_vidc_vb2_buffer_done(struct msm_vidc_inst *inst, } vbuf = to_vb2_v4l2_buffer(vb2); vbuf->flags = buf->flags; - vb2->timestamp = buf->timestamp * NSEC_PER_USEC; + vb2->timestamp = buf->timestamp; vb2->planes[0].bytesused = buf->data_size; vb2_buffer_done(vb2, VB2_BUF_STATE_DONE); diff --git a/driver/vidc/src/msm_vidc_platform.c b/driver/vidc/src/msm_vidc_platform.c index b992e56644..d469207f75 100644 --- a/driver/vidc/src/msm_vidc_platform.c +++ b/driver/vidc/src/msm_vidc_platform.c @@ -88,6 +88,34 @@ static int msm_vidc_init_ops(struct msm_vidc_core *core) return 0; } +int msm_vidc_deinit_platform(struct platform_device *pdev) +{ + struct msm_vidc_core *core; + + if (!pdev) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + core = dev_get_drvdata(&pdev->dev); + if (!core) { + d_vpr_e("%s: core not found in device %s", + dev_name(&pdev->dev)); + return -EINVAL; + } + + d_vpr_h("%s()\n", __func__); + + if (of_device_is_compatible(pdev->dev.of_node, "qcom,msm-vidc")) + msm_vidc_deinit_iris2(core); + + if (of_device_is_compatible(pdev->dev.of_node, "qcom,msm-vidc")) + msm_vidc_deinit_platform_waipio(core); + + kfree(core->platform); + return 0; +} + int msm_vidc_init_platform(struct platform_device *pdev) { int rc = 0; @@ -104,7 +132,7 @@ int msm_vidc_init_platform(struct platform_device *pdev) core = dev_get_drvdata(&pdev->dev); if (!core) { d_vpr_e("%s: core not found in device %s", - dev_name(&pdev->dev)); + dev_name(&pdev->dev)); return -EINVAL; } @@ -134,8 +162,3 @@ int msm_vidc_init_platform(struct platform_device *pdev) return rc; } - -int msm_vidc_deinit_platform(struct platform_device *pdev) -{ - return 0; -} diff --git a/driver/vidc/src/msm_vidc_probe.c b/driver/vidc/src/msm_vidc_probe.c index 6b4a763999..497063ae25 100644 --- a/driver/vidc/src/msm_vidc_probe.c +++ b/driver/vidc/src/msm_vidc_probe.c @@ -20,13 +20,33 @@ #define BASE_DEVICE_NUMBER 32 +static int msm_vidc_deinit_irq(struct msm_vidc_core *core) +{ + struct msm_vidc_dt *dt; + + if (!core || !core->pdev || !core->dt) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + dt = core->dt; + d_vpr_h("%s: reg_base = %pa, reg_size = %#x\n", + __func__, &dt->register_base, dt->register_size); + + if (dt->irq) + free_irq(dt->irq, core); + dt->irq = 0; + + if (core->register_base_addr) + devm_iounmap(&core->pdev->dev, core->register_base_addr); + core->register_base_addr = 0; + return 0; +} + static int msm_vidc_init_irq(struct msm_vidc_core *core) { int rc = 0; struct msm_vidc_dt *dt; - d_vpr_e("%s()\n", __func__); - if (!core || !core->pdev || !core->dt) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; @@ -38,6 +58,7 @@ static int msm_vidc_init_irq(struct msm_vidc_core *core) if (!core->register_base_addr) { d_vpr_e("could not map reg addr %pa of size %d\n", &dt->register_base, dt->register_size); + rc = -EINVAL; goto exit; } @@ -55,9 +76,7 @@ static int msm_vidc_init_irq(struct msm_vidc_core *core) return 0; exit: - if (core->device_workq) - destroy_workqueue(core->device_workq); - + msm_vidc_deinit_irq(core); return rc; } @@ -75,12 +94,31 @@ static const struct of_device_id msm_vidc_dt_match[] = { }; MODULE_DEVICE_TABLE(of, msm_vidc_dt_match); - -void msm_vidc_release_video_device(struct video_device *vdev) +static void msm_vidc_release_video_device(struct video_device *vdev) { d_vpr_e("%s:\n", __func__); } +static void msm_vidc_unregister_video_device(struct msm_vidc_core *core, + enum msm_vidc_domain_type type) +{ + int index; + + d_vpr_h("%s()\n", __func__); + + if (type == MSM_VIDC_DECODER) + index = 0; + else if (type == MSM_VIDC_ENCODER) + index = 1; + else + return; + + //rc = device_create_file(&core->vdev[index].vdev.dev, &dev_attr_link_name); + video_set_drvdata(&core->vdev[index].vdev, NULL); + video_unregister_device(&core->vdev[index].vdev); + //memset vdev to 0 +} + static int msm_vidc_register_video_device(struct msm_vidc_core *core, enum msm_vidc_domain_type type, int nr) { @@ -126,6 +164,28 @@ static int msm_vidc_register_video_device(struct msm_vidc_core *core, return 0; } +static int msm_vidc_deinitialize_core(struct msm_vidc_core *core) +{ + int rc = 0; + + if (!core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + d_vpr_h("%s()\n", __func__); + + mutex_destroy(&core->lock); + core->state = MSM_VIDC_CORE_DEINIT; + + if (core->pm_workq) + destroy_workqueue(core->pm_workq); + + if (core->device_workq) + destroy_workqueue(core->device_workq); + + return rc; +} + static int msm_vidc_initialize_core(struct msm_vidc_core *core) { int rc = 0; @@ -280,42 +340,35 @@ static int msm_vidc_probe(struct platform_device *pdev) static int msm_vidc_remove(struct platform_device *pdev) { - int rc = 0; - - d_vpr_h("%s()\n", __func__); - -/* struct msm_vidc_core *core; if (!pdev) { d_vpr_e("%s: invalid input %pK", __func__, pdev); return -EINVAL; } - core = dev_get_drvdata(&pdev->dev); if (!core) { d_vpr_e("%s: invalid core", __func__); return -EINVAL; } - if (core->vidc_core_workq) - destroy_workqueue(core->vidc_core_workq); - vidc_hfi_deinitialize(core->hfi_type, core->device); - device_remove_file(&core->vdev[MSM_VIDC_ENCODER].vdev.dev, - &dev_attr_link_name); - video_unregister_device(&core->vdev[MSM_VIDC_ENCODER].vdev); - device_remove_file(&core->vdev[MSM_VIDC_DECODER].vdev.dev, - &dev_attr_link_name); - video_unregister_device(&core->vdev[MSM_VIDC_DECODER].vdev); - v4l2_device_unregister(&core->v4l2_dev); + d_vpr_h("%s()\n", __func__); - //msm_vidc_free_platform_resources(&core->resources); + msm_vidc_unregister_video_device(core, MSM_VIDC_ENCODER); + msm_vidc_unregister_video_device(core, MSM_VIDC_DECODER); + //device_remove_file(&core->vdev[MSM_VIDC_ENCODER].vdev.dev, + //&dev_attr_link_name); + //device_remove_file(&core->vdev[MSM_VIDC_DECODER].vdev.dev, + //&dev_attr_link_name); + v4l2_device_unregister(&core->v4l2_dev); sysfs_remove_group(&pdev->dev.kobj, &msm_vidc_core_attr_group); + msm_vidc_deinit_irq(core); + msm_vidc_deinit_platform(pdev); + msm_vidc_deinit_dt(pdev); + msm_vidc_deinitialize_core(core); dev_set_drvdata(&pdev->dev, NULL); - mutex_destroy(&core->lock); kfree(core); -*/ - return rc; + return 0; } struct platform_driver msm_vidc_driver = { From 4d9b29ebf3350baf37a7eb61500802929b1f6285 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Wed, 21 Oct 2020 15:07:37 -0700 Subject: [PATCH 0021/1061] video: driver: rename video header interface file Rename msm_vidc_utils.h to v4l2_vidc_extensions.h. Change-Id: I50a9212d3d28756bdf0be33e135bce9c6337a816 Signed-off-by: Akshata Sahukar --- driver/vidc/inc/msm_vidc_control.h | 2 +- driver/vidc/src/msm_vdec.c | 2 +- driver/vidc/src/msm_venc.c | 2 +- driver/vidc/src/msm_vidc_driver.c | 2 +- .../vidc/media/{msm_vidc_utils.h => v4l2_vidc_extensions.h} | 4 ++-- 5 files changed, 6 insertions(+), 6 deletions(-) rename include/uapi/vidc/media/{msm_vidc_utils.h => v4l2_vidc_extensions.h} (96%) diff --git a/driver/vidc/inc/msm_vidc_control.h b/driver/vidc/inc/msm_vidc_control.h index 5e9ed8a30e..87dc22e841 100644 --- a/driver/vidc/inc/msm_vidc_control.h +++ b/driver/vidc/inc/msm_vidc_control.h @@ -6,7 +6,7 @@ #ifndef _MSM_VIDC_CONTROL_H_ #define _MSM_VIDC_CONTROL_H_ -#include +#include #include "msm_vidc_inst.h" #include "msm_vidc_internal.h" diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index a6d80be430..928c4c39de 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -3,7 +3,7 @@ * Copyright (c) 2020, The Linux Foundation. All rights reserved. */ -#include +#include #include #include "msm_vdec.h" diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index 2d19b5b2ff..6450eb7d82 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -3,7 +3,7 @@ * Copyright (c) 2020, The Linux Foundation. All rights reserved. */ -#include +#include #include #include "msm_venc.h" diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 8e8f94e0d7..83935d8387 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -5,7 +5,7 @@ #include #include -#include +#include #include #include "msm_vidc_driver.h" diff --git a/include/uapi/vidc/media/msm_vidc_utils.h b/include/uapi/vidc/media/v4l2_vidc_extensions.h similarity index 96% rename from include/uapi/vidc/media/msm_vidc_utils.h rename to include/uapi/vidc/media/v4l2_vidc_extensions.h index 9ceef699ef..eea8ab91b0 100644 --- a/include/uapi/vidc/media/msm_vidc_utils.h +++ b/include/uapi/vidc/media/v4l2_vidc_extensions.h @@ -3,8 +3,8 @@ * Copyright (c) 2020, The Linux Foundation. All rights reserved. */ -#ifndef __MSM_VIDC_UTILS_H__ -#define __MSM_VIDC_UTILS_H__ +#ifndef __V4l2_VIDC_EXTENSIONS_H__ +#define __V4l2_VIDC_EXTENSIONS_H__ #include #include From 7fe61f51d3d7fbd64b11168262f5e15ac691d9f8 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Wed, 21 Oct 2020 18:31:25 -0700 Subject: [PATCH 0022/1061] video: driver: add private control definitions Add private control macros and update old private control macro usage with newly added macros. Change-Id: Ie07fa28d74860bbd4de45fdcf746c1990c811aec Signed-off-by: Akshata Sahukar --- driver/platform/waipio/src/msm_vidc_waipio.c | 11 +- driver/vidc/src/msm_vdec.c | 20 +-- driver/vidc/src/msm_venc.c | 16 +-- driver/vidc/src/msm_vidc_control.c | 14 +- driver/vidc/src/msm_vidc_driver.c | 26 ++-- .../uapi/vidc/media/v4l2_vidc_extensions.h | 123 ++++++++++++++---- 6 files changed, 138 insertions(+), 72 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index b4950be9fb..38899de51d 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -113,20 +113,21 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {MIN_BUFFERS_OUTPUT, ENC|DEC, CODECS_ALL, 0, 64, 1, 4, V4L2_CID_MIN_BUFFERS_FOR_CAPTURE}, {DECODE_ORDER, DEC, CODECS_ALL, 0, 1, 1, 0, - V4L2_CID_MPEG_VIDC_VIDEO_DECODE_ORDER, + V4L2_CID_MPEG_MFC51_VIDEO_DECODER_H264_DISPLAY_DELAY_ENABLE, HFI_PROP_DECODE_ORDER_OUTPUT}, {THUMBNAIL_MODE, DEC, CODECS_ALL, 0, 1, 1, 0, - V4L2_CID_MPEG_VIDC_VIDEO_SYNC_FRAME_DECODE, + V4L2_CID_MPEG_VIDC_THUMBNAIL_MODE, HFI_PROP_THUMBNAIL_MODE}, {SECURE_MODE, ENC|DEC, CODECS_ALL, 0, 1, 1, 0, - V4L2_CID_MPEG_VIDC_VIDEO_SECURE, + V4L2_CID_MPEG_VIDC_SECURE, HFI_PROP_SECURE}, {LOWLATENCY_MODE, ENC|DEC, CODECS_ALL, 0, 1, 1, 0, - V4L2_CID_MPEG_VIDC_VIDEO_LOWLATENCY_MODE}, - {LOWLATENCY_HINT, DEC, CODECS_ALL, 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_LOWLATENCY_REQUEST}, + /* {LOWLATENCY_HINT, DEC, CODECS_ALL, 0, 1, 1, 0, V4L2_CID_MPEG_VIDC_VIDEO_LOWLATENCY_HINT}, {BUF_SIZE_LIMIT, ENC|DEC, CODECS_ALL, 0, 0x0fffffff, 1, 0, V4L2_CID_MPEG_VIDC_VIDEO_BUFFER_SIZE_LIMIT}, + */ /* (8192 * 4320) / 256 */ {MBPF, ENC|DEC, CODECS_ALL, 64, 138240, 1, 138240}, diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 928c4c39de..75cd83a017 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -141,8 +141,8 @@ static int msm_vdec_set_bit_depth(struct msm_vidc_inst *inst, } colorformat = inst->fmts[OUTPUT_PORT].fmt.pix_mp.pixelformat; - if (colorformat == V4L2_PIX_FMT_NV12_P010 || - colorformat == V4L2_PIX_FMT_NV12_TP10_UBWC) + if (colorformat == V4L2_PIX_FMT_VIDC_P010 || + colorformat == V4L2_PIX_FMT_VIDC_TP10C) bitdepth = 10 << 16 | 10; rc = venus_hfi_session_property(inst, HFI_PROP_LUMA_CHROMA_BIT_DEPTH, @@ -289,8 +289,8 @@ static int msm_vdec_set_colorformat(struct msm_vidc_inst *inst, } pixelformat = inst->fmts[OUTPUT_PORT].fmt.pix_mp.pixelformat; - if (pixelformat != V4L2_PIX_FMT_NV12_UBWC && - pixelformat != V4L2_PIX_FMT_NV12_TP10_UBWC) { + if (pixelformat != V4L2_PIX_FMT_VIDC_NV12C && + pixelformat != V4L2_PIX_FMT_VIDC_TP10C) { s_vpr_e(inst->sid, "%s: invalid pixelformat %#x\n", __func__, pixelformat); return -EINVAL; @@ -990,7 +990,7 @@ int msm_vdec_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) } fmt = &inst->fmts[INPUT_META_PORT]; fmt->type = INPUT_META_PLANE; - fmt->fmt.meta.dataformat = V4L2_PIX_FMT_VIDC_META; + fmt->fmt.meta.dataformat = V4L2_META_FMT_VIDC; fmt->fmt.meta.buffersize = call_session_op(core, buffer_size, inst, MSM_VIDC_BUF_INPUT_META); inst->buffers.input_meta.min_count = @@ -1057,7 +1057,7 @@ int msm_vdec_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) } fmt = &inst->fmts[OUTPUT_META_PORT]; fmt->type = OUTPUT_META_PLANE; - fmt->fmt.meta.dataformat = V4L2_PIX_FMT_VIDC_META; + fmt->fmt.meta.dataformat = V4L2_META_FMT_VIDC; fmt->fmt.meta.buffersize = call_session_op(core, buffer_size, inst, MSM_VIDC_BUF_OUTPUT_META); inst->buffers.output_meta.min_count = @@ -1154,7 +1154,7 @@ int msm_vdec_enum_fmt(struct msm_vidc_inst *inst, struct v4l2_fmtdesc *f) strlcpy(f->description, "colorformat", sizeof(f->description)); } else if (f->type == INPUT_META_PLANE || f->type == OUTPUT_META_PLANE) { if (!f->index) { - f->pixelformat = V4L2_PIX_FMT_VIDC_META; + f->pixelformat = V4L2_META_FMT_VIDC; strlcpy(f->description, "metadata", sizeof(f->description)); } else { return -EINVAL; @@ -1206,7 +1206,7 @@ int msm_vdec_inst_init(struct msm_vidc_inst *inst) f = &inst->fmts[INPUT_META_PORT]; f->type = INPUT_META_PLANE; - f->fmt.meta.dataformat = V4L2_PIX_FMT_VIDC_META; + f->fmt.meta.dataformat = V4L2_META_FMT_VIDC; f->fmt.meta.buffersize = call_session_op(core, buffer_size, inst, MSM_VIDC_BUF_INPUT_META); inst->buffers.input_meta.min_count = inst->buffers.input.min_count; @@ -1216,7 +1216,7 @@ int msm_vdec_inst_init(struct msm_vidc_inst *inst) f = &inst->fmts[OUTPUT_PORT]; f->type = OUTPUT_MPLANE; - f->fmt.pix_mp.pixelformat = V4L2_PIX_FMT_NV12_UBWC; + f->fmt.pix_mp.pixelformat = V4L2_PIX_FMT_VIDC_NV12C; f->fmt.pix_mp.width = VENUS_Y_STRIDE( v4l2_colorformat_to_media(f->fmt.pix_mp.pixelformat, __func__), DEFAULT_WIDTH); @@ -1238,7 +1238,7 @@ int msm_vdec_inst_init(struct msm_vidc_inst *inst) f = &inst->fmts[OUTPUT_META_PORT]; f->type = OUTPUT_META_PLANE; - f->fmt.meta.dataformat = V4L2_PIX_FMT_VIDC_META; + f->fmt.meta.dataformat = V4L2_META_FMT_VIDC; f->fmt.meta.buffersize = call_session_op(core, buffer_size, inst, MSM_VIDC_BUF_OUTPUT_META); inst->buffers.output_meta.min_count = inst->buffers.output.min_count; diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index 6450eb7d82..404943e89b 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -80,8 +80,8 @@ static int msm_venc_set_colorformat(struct msm_vidc_inst *inst, } pixelformat = inst->fmts[INPUT_PORT].fmt.pix_mp.pixelformat; - if (pixelformat != V4L2_PIX_FMT_NV12_UBWC && - pixelformat != V4L2_PIX_FMT_NV12_TP10_UBWC) { + if (pixelformat != V4L2_PIX_FMT_VIDC_NV12C && + pixelformat != V4L2_PIX_FMT_VIDC_TP10C) { s_vpr_e(inst->sid, "%s: invalid pixelformat %#x\n", __func__, pixelformat); return -EINVAL; @@ -753,7 +753,7 @@ int msm_venc_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) } fmt = &inst->fmts[INPUT_META_PORT]; fmt->type = INPUT_META_PLANE; - fmt->fmt.meta.dataformat = V4L2_PIX_FMT_VIDC_META; + fmt->fmt.meta.dataformat = V4L2_META_FMT_VIDC; fmt->fmt.meta.buffersize = call_session_op(core, buffer_size, inst, MSM_VIDC_BUF_INPUT_META); inst->buffers.input_meta.min_count = @@ -830,7 +830,7 @@ int msm_venc_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) } fmt = &inst->fmts[OUTPUT_META_PORT]; fmt->type = OUTPUT_META_PLANE; - fmt->fmt.meta.dataformat = V4L2_PIX_FMT_VIDC_META; + fmt->fmt.meta.dataformat = V4L2_META_FMT_VIDC; fmt->fmt.meta.buffersize = call_session_op(core, buffer_size, inst, MSM_VIDC_BUF_OUTPUT_META); inst->buffers.output_meta.min_count = @@ -927,7 +927,7 @@ int msm_venc_enum_fmt(struct msm_vidc_inst *inst, struct v4l2_fmtdesc *f) strlcpy(f->description, "colorformat", sizeof(f->description)); } else if (f->type == INPUT_META_PLANE || f->type == OUTPUT_META_PLANE) { if (!f->index) { - f->pixelformat = V4L2_PIX_FMT_VIDC_META; + f->pixelformat = V4L2_META_FMT_VIDC; strlcpy(f->description, "metadata", sizeof(f->description)); } else { return -EINVAL; @@ -977,7 +977,7 @@ int msm_venc_inst_init(struct msm_vidc_inst *inst) f = &inst->fmts[OUTPUT_META_PORT]; f->type = OUTPUT_META_PLANE; - f->fmt.meta.dataformat = V4L2_PIX_FMT_VIDC_META; + f->fmt.meta.dataformat = V4L2_META_FMT_VIDC; f->fmt.meta.buffersize = call_session_op(core, buffer_size, inst, MSM_VIDC_BUF_OUTPUT_META); inst->buffers.output_meta.min_count = inst->buffers.output.min_count; @@ -987,7 +987,7 @@ int msm_venc_inst_init(struct msm_vidc_inst *inst) f = &inst->fmts[INPUT_PORT]; f->type = INPUT_MPLANE; - f->fmt.pix_mp.pixelformat = V4L2_PIX_FMT_NV12_UBWC; + f->fmt.pix_mp.pixelformat = V4L2_PIX_FMT_VIDC_NV12C; f->fmt.pix_mp.width = VENUS_Y_STRIDE( v4l2_colorformat_to_media(f->fmt.pix_mp.pixelformat, __func__), DEFAULT_WIDTH); @@ -1009,7 +1009,7 @@ int msm_venc_inst_init(struct msm_vidc_inst *inst) f = &inst->fmts[INPUT_META_PORT]; f->type = INPUT_META_PLANE; - f->fmt.meta.dataformat = V4L2_PIX_FMT_VIDC_META; + f->fmt.meta.dataformat = V4L2_META_FMT_VIDC; f->fmt.meta.buffersize = call_session_op(core, buffer_size, inst, MSM_VIDC_BUF_INPUT_META); inst->buffers.input_meta.min_count = inst->buffers.input.min_count; diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 89961165e8..49abe6cad5 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -72,22 +72,18 @@ static const char * const * msm_vidc_get_qmenu_type( static const char *msm_vidc_get_priv_ctrl_name(u32 sid, u32 control_id) { switch (control_id) { - case V4L2_CID_MPEG_VIDC_VIDEO_DECODE_ORDER: - return "Decode Order"; - case V4L2_CID_MPEG_VIDC_VIDEO_SYNC_FRAME_DECODE: + case V4L2_CID_MPEG_VIDC_THUMBNAIL_MODE: return "Sync Frame Decode"; - case V4L2_CID_MPEG_VIDC_VIDEO_SECURE: + case V4L2_CID_MPEG_VIDC_SECURE: return "Secure Mode"; - case V4L2_CID_MPEG_VIDC_VIDEO_LOWLATENCY_MODE: + case V4L2_CID_MPEG_VIDC_LOWLATENCY_REQUEST: return "Low Latency Mode"; + /* TODO(AS) case V4L2_CID_MPEG_VIDC_VIDEO_LOWLATENCY_HINT: return "Low Latency Hint"; case V4L2_CID_MPEG_VIDC_VIDEO_BUFFER_SIZE_LIMIT: return "Buffer Size Limit"; - case V4L2_CID_MPEG_VIDEO_BITRATE_MODE: - return "Video Bitrate Control"; - case V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD: - return "NAL Format"; + */ default: s_vpr_e(sid, "%s: ctrl name not available for ctrl id %#x\n", __func__, control_id); diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 83935d8387..25b548375c 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -173,16 +173,16 @@ enum msm_vidc_colorformat_type v4l2_colorformat_to_driver(u32 v4l2_colorformat, case V4L2_PIX_FMT_NV21: colorformat = MSM_VIDC_FMT_NV21; break; - case V4L2_PIX_FMT_NV12_UBWC: + case V4L2_PIX_FMT_VIDC_NV12C: colorformat = MSM_VIDC_FMT_NV12_UBWC; break; - case V4L2_PIX_FMT_NV12_TP10_UBWC: + case V4L2_PIX_FMT_VIDC_TP10C: colorformat = MSM_VIDC_FMT_NV12_TP10_UBWC; break; - case V4L2_PIX_FMT_RGBA8888_UBWC: + case V4L2_PIX_FMT_VIDC_ARGB32C: colorformat = MSM_VIDC_FMT_RGBA8888_UBWC; break; - case V4L2_PIX_FMT_NV12_P010: + case V4L2_PIX_FMT_VIDC_P010: colorformat = MSM_VIDC_FMT_NV12_P010; break; default: @@ -206,16 +206,16 @@ u32 v4l2_colorformat_from_driver(enum msm_vidc_colorformat_type colorformat, v4l2_colorformat = V4L2_PIX_FMT_NV21; break; case MSM_VIDC_FMT_NV12_UBWC: - v4l2_colorformat = V4L2_PIX_FMT_NV12_UBWC; + v4l2_colorformat = V4L2_PIX_FMT_VIDC_NV12C; break; case MSM_VIDC_FMT_NV12_TP10_UBWC: - v4l2_colorformat = V4L2_PIX_FMT_NV12_TP10_UBWC; + v4l2_colorformat = V4L2_PIX_FMT_VIDC_TP10C; break; case MSM_VIDC_FMT_RGBA8888_UBWC: - v4l2_colorformat = V4L2_PIX_FMT_RGBA8888_UBWC; + v4l2_colorformat = V4L2_PIX_FMT_VIDC_ARGB32C; break; case MSM_VIDC_FMT_NV12_P010: - v4l2_colorformat = V4L2_PIX_FMT_NV12_P010; + v4l2_colorformat = V4L2_PIX_FMT_VIDC_P010; break; default: d_vpr_e("%s: invalid driver color format %#x\n", @@ -232,15 +232,13 @@ u32 v4l2_colorformat_to_media(u32 v4l2_fmt, const char *func) return COLOR_FMT_NV12; case V4L2_PIX_FMT_NV21: return COLOR_FMT_NV21; - case V4L2_PIX_FMT_NV12_512: - return COLOR_FMT_NV12_512; - case V4L2_PIX_FMT_NV12_P010: + case V4L2_PIX_FMT_VIDC_P010: return COLOR_FMT_P010; - case V4L2_PIX_FMT_NV12_UBWC: + case V4L2_PIX_FMT_VIDC_NV12C: return COLOR_FMT_NV12_UBWC; - case V4L2_PIX_FMT_NV12_TP10_UBWC: + case V4L2_PIX_FMT_VIDC_TP10C: return COLOR_FMT_NV12_BPP10_UBWC; - case V4L2_PIX_FMT_RGBA8888_UBWC: + case V4L2_PIX_FMT_VIDC_ARGB32C: return COLOR_FMT_RGBA8888_UBWC; default: d_vpr_e("%s: invalid v4l2 color fmt: %#x, set default (NV12)", diff --git a/include/uapi/vidc/media/v4l2_vidc_extensions.h b/include/uapi/vidc/media/v4l2_vidc_extensions.h index eea8ab91b0..1b5fd9c8cd 100644 --- a/include/uapi/vidc/media/v4l2_vidc_extensions.h +++ b/include/uapi/vidc/media/v4l2_vidc_extensions.h @@ -9,35 +9,106 @@ #include #include -/* vendor color format start */ -/* UBWC 8-bit Y/CbCr 4:2:0 */ -#define V4L2_PIX_FMT_NV12_UBWC v4l2_fourcc('Q', '1', '2', '8') -/* NV12_512 8-bit Y/CbCr 4:2:0 */ -#define V4L2_PIX_FMT_NV12_512 v4l2_fourcc('Q', '5', '1', '2') -/* NV12 10-bit Y/CbCr 4:2:0 */ -#define V4L2_PIX_FMT_NV12_P010 v4l2_fourcc('Q', 'P', '1', '0') -/* UBWC 10-bit Y/CbCr 4:2:0 */ -#define V4L2_PIX_FMT_NV12_TP10_UBWC v4l2_fourcc('Q', 'T', 'P', '0') -#define V4L2_PIX_FMT_RGBA8888_UBWC v4l2_fourcc('Q', 'R', 'G', 'B') -/* Y/CbCr 4:2:0 P10 Venus */ -#define V4L2_PIX_FMT_VIDC_META v4l2_fourcc('Q', 'M', 'E', 'T') -/* vendor color format end */ +/* + * supported standard color formats + * V4L2_PIX_FMT_NV12 Y/CbCr 4:2:0 + * NV21?? // TODO: jdas + * V4L2_PIX_FMT_ARGB32 ARGB-8-8-8-8 + */ + /* Below are additional color formats */ +/* 12 Y/CbCr 4:2:0 compressed */ +#define V4L2_PIX_FMT_VIDC_NV12C v4l2_fourcc('Q', '1', '2', 'C') +/* Y/CbCr 4:2:0, 10 bits per channel compressed */ +#define V4L2_PIX_FMT_VIDC_TP10C v4l2_fourcc('Q', '1', '0', 'C') +/* Y/CbCr 4:2:0, 10 bits per channel */ +#define V4L2_PIX_FMT_VIDC_P010 v4l2_fourcc('P', '0', '1', '0') +/* 32 ARGB-8-8-8-8 compressed */ +#define V4L2_PIX_FMT_VIDC_ARGB32C v4l2_fourcc('Q', '2', '4', 'C') +#define V4L2_META_FMT_VIDC v4l2_fourcc('Q', 'M', 'E', 'T') /* vendor controls start */ -#define V4L2_CID_MPEG_MSM_VIDC_BASE (V4L2_CTRL_CLASS_MPEG | 0x2000) +#define V4L2_CID_MPEG_VIDC_BASE (V4L2_CTRL_CLASS_MPEG | 0x2000) -#define V4L2_CID_MPEG_VIDC_VIDEO_DECODE_ORDER \ - (V4L2_CID_MPEG_MSM_VIDC_BASE + 0x1) -#define V4L2_CID_MPEG_VIDC_VIDEO_SYNC_FRAME_DECODE \ - (V4L2_CID_MPEG_MSM_VIDC_BASE + 0x2) -#define V4L2_CID_MPEG_VIDC_VIDEO_SECURE \ - (V4L2_CID_MPEG_MSM_VIDC_BASE + 0x3) -#define V4L2_CID_MPEG_VIDC_VIDEO_LOWLATENCY_MODE \ - (V4L2_CID_MPEG_MSM_VIDC_BASE + 0x4) -#define V4L2_CID_MPEG_VIDC_VIDEO_LOWLATENCY_HINT \ - (V4L2_CID_MPEG_MSM_VIDC_BASE + 0x5) -#define V4L2_CID_MPEG_VIDC_VIDEO_BUFFER_SIZE_LIMIT \ - (V4L2_CID_MPEG_MSM_VIDC_BASE + 0x6) +#define V4L2_CID_MPEG_VIDC_SECURE (V4L2_CID_MPEG_VIDC_BASE + 0x1) +/* HEIC encoder and decoder */ +#define V4L2_CID_MPEG_VIDC_HEIC (V4L2_CID_MPEG_VIDC_BASE + 0x2) +#define V4L2_CID_MPEG_VIDC_LOWLATENCY_REQUEST (V4L2_CID_MPEG_VIDC_BASE + 0x3) +/* FIXme: */ +#define V4L2_CID_MPEG_VIDC_CODEC_CONFIG (V4L2_CID_MPEG_VIDC_BASE + 0x4) +/* thumbnail decoding */ +#define V4L2_CID_MPEG_VIDC_THUMBNAIL_MODE (V4L2_CID_MPEG_VIDC_BASE + 0x4) +/* B frame min/max qp */ +#define V4L2_CID_MPEG_VIDC_B_FRAME_MIN_QP (V4L2_CID_MPEG_VIDC_BASE + 0x5) +#define V4L2_CID_MPEG_VIDC_B_FRAME_MAX_QP (V4L2_CID_MPEG_VIDC_BASE + 0x6) +/* LTR controls */ +#define V4L2_CID_MPEG_VIDC_LTRCOUNT (V4L2_CID_MPEG_VIDC_BASE + 0x7) +#define V4L2_CID_MPEG_VIDC_USELTRFRAME (V4L2_CID_MPEG_VIDC_BASE + 0x8) +#define V4L2_CID_MPEG_VIDC_MARKLTRFRAME (V4L2_CID_MPEG_VIDC_BASE + 0x9) +/* Base layer priority id value */ +#define V4L2_CID_MPEG_VIDC_BASELAYER_PRIORITY (V4L2_CID_MPEG_VIDC_BASE + 0xA) +/* Encoder Intra refresh period */ +#define V4L2_CID_MPEG_VIDC_INTRA_REFRESH_PERIOD (V4L2_CID_MPEG_VIDC_BASE + 0xB) +#define V4L2_CID_MPEG_VIDC_AU_DELIMITER (V4L2_CID_MPEG_VIDC_BASE + 0xC) +#define V4L2_CID_MPEG_VIDC_TIME_DELTA_BASED_RC (V4L2_CID_MPEG_VIDC_BASE + 0xD) +/* Encoder quality controls */ +#define V4L2_CID_MPEG_VIDC_CONTENT_ADAPTIVE_CODING \ + (V4L2_CID_MPEG_VIDC_BASE + 0xE) +#define V4L2_CID_MPEG_VIDC_QUALITY_BITRATE_BOOST \ + (V4L2_CID_MPEG_VIDC_BASE + 0xF) +#define V4L2_CID_MPEG_VIDC_VIDEO_BLUR_TYPES \ + (V4L2_CID_MPEG_VIDC_BASE + 0x10) +enum v4l2_mpeg_vidc_blur_types { + VIDC_BLUR_NONE = 0x0, + VIDC_BLUR_EXTERNAL = 0x1, + VIDC_BLUR_ADAPTIVE = 0x2, +}; +/* (blur width) << 16 | (blur height) */ +#define V4L2_CID_MPEG_VIDC_VIDEO_BLUR_RESOLUTION \ + (V4L2_CID_MPEG_VIDC_BASE + 0x11) +/* TODO: jdas: compound control for matrix */ +#define V4L2_CID_MPEG_VIDC_VIDEO_VPE_CSC_CUSTOM_MATRIX \ + (V4L2_CID_MPEG_VIDC_BASE + 0x12) + +/* various Metadata - encoder & decoder */ +#define V4L2_CID_MPEG_VIDC_METADATA_ENABLE \ + (V4L2_CID_MPEG_VIDC_BASE + 0x13) +#define V4L2_CID_MPEG_VIDC_METADATA_DISABLE \ + (V4L2_CID_MPEG_VIDC_BASE + 0x14) +enum v4l2_mpeg_vidc_metapayload_header_flags { + METADATA_FLAGS_NONE = 0, + METADATA_FLAGS_TOP_FIELD = (1 << 0), + METADATA_FLAGS_BOTTOM_FIELD = (1 << 1), +}; +struct msm_vidc_metabuf_header { + __u32 count; + __u32 size; + __u32 version; + __u32 reserved[5]; +}; +struct msm_vidc_metapayload_header { + __u32 type; + __u32 size; + __u32 version; + __u32 offset; + __u32 flags; + __u32 reserved[3]; +}; +enum v4l2_mpeg_vidc_metadata { + METADATA_LTR_MARK_USE_DETAILS = 0x03000137, + METADATA_METADATA_SEQ_HEADER_NAL = 0x0300014a, + METADATA_DPB_LUMA_CHROMA_MISR = 0x03000153, + METADATA_OPB_LUMA_CHROMA_MISR = 0x03000154, + METADATA_INTERLACE = 0x03000156, + METADATA_CONEALED_MB_COUNT = 0x0300015f, + METADATA_HISTOGRAM_INFO = 0x03000161, + METADATA_SEI_MASTERING_DISPLAY_COLOUR = 0x03000163, + METADATA_SEI_CONTENT_LIGHT_LEVEL = 0x03000164, + METADATA_HDR10PLUS = 0x03000165, + METADATA_EVA_STATS = 0x03000167, + METADATA_BUFFER_TAG = 0x0300016b, + METADATA_SUBFRAME_OUTPUT = 0x0300016d, + METADATA_ROI_INFO = 0x03000173, +}; /* vendor controls end */ From 10e2017aa83f4529f53e4ba75e2263ee7384e659 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Mon, 26 Oct 2020 14:32:15 -0700 Subject: [PATCH 0023/1061] video: driver: update instance database with controls Update instance database with v4l2 controls. Change-Id: I0715edfcbf46a82c8e2f67ec298185e2cf4eb5d0 Signed-off-by: Akshata Sahukar --- driver/platform/waipio/src/msm_vidc_waipio.c | 870 +++++++++++++++--- driver/vidc/inc/hfi_property.h | 2 +- driver/vidc/inc/msm_vidc_control.h | 10 + driver/vidc/inc/msm_vidc_internal.h | 120 ++- driver/vidc/src/msm_vdec.c | 25 +- driver/vidc/src/msm_venc.c | 23 +- driver/vidc/src/msm_vidc.c | 3 - driver/vidc/src/msm_vidc_control.c | 148 ++- driver/vidc/src/msm_vidc_driver.c | 4 +- .../uapi/vidc/media/v4l2_vidc_extensions.h | 5 +- 10 files changed, 1011 insertions(+), 199 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 38899de51d..769f2a7e5c 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -87,13 +87,13 @@ static struct msm_platform_core_capability core_data_waipio[] = { static struct msm_platform_inst_capability instance_data_waipio[] = { /* {cap, domain, codec, * min, max, step_or_mask, value, - * v4l2_id, hfi_id, + * v4l2_id, + * hfi_id, * flags, * parents, * children, * adjust, set} */ - {CODEC}, {FRAME_WIDTH, ENC|DEC, CODECS_ALL, 128, 8192, 1, 1920}, {FRAME_HEIGHT, ENC|DEC, CODECS_ALL, 128, 8192, 1, 1080}, {PIX_FMTS, ENC, CODECS_ALL, @@ -110,24 +110,11 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { MSM_VIDC_FMT_NV12_UBWC}, {MIN_BUFFERS_INPUT, ENC|DEC, CODECS_ALL, 0, 64, 1, 4, V4L2_CID_MIN_BUFFERS_FOR_OUTPUT}, - {MIN_BUFFERS_OUTPUT, ENC|DEC, CODECS_ALL, 0, 64, 1, 4, - V4L2_CID_MIN_BUFFERS_FOR_CAPTURE}, - {DECODE_ORDER, DEC, CODECS_ALL, 0, 1, 1, 0, - V4L2_CID_MPEG_MFC51_VIDEO_DECODER_H264_DISPLAY_DELAY_ENABLE, - HFI_PROP_DECODE_ORDER_OUTPUT}, - {THUMBNAIL_MODE, DEC, CODECS_ALL, 0, 1, 1, 0, - V4L2_CID_MPEG_VIDC_THUMBNAIL_MODE, - HFI_PROP_THUMBNAIL_MODE}, - {SECURE_MODE, ENC|DEC, CODECS_ALL, 0, 1, 1, 0, - V4L2_CID_MPEG_VIDC_SECURE, - HFI_PROP_SECURE}, - {LOWLATENCY_MODE, ENC|DEC, CODECS_ALL, 0, 1, 1, 0, - V4L2_CID_MPEG_VIDC_LOWLATENCY_REQUEST}, - /* {LOWLATENCY_HINT, DEC, CODECS_ALL, 0, 1, 1, 0, - V4L2_CID_MPEG_VIDC_VIDEO_LOWLATENCY_HINT}, - {BUF_SIZE_LIMIT, ENC|DEC, CODECS_ALL, 0, 0x0fffffff, 1, 0, - V4L2_CID_MPEG_VIDC_VIDEO_BUFFER_SIZE_LIMIT}, - */ + {MIN_BUFFERS_OUTPUT, ENC|DEC, CODECS_ALL, + 0, 64, 1, 4, + V4L2_CID_MIN_BUFFERS_FOR_CAPTURE, + HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT, + CAP_FLAG_ROOT}, /* (8192 * 4320) / 256 */ {MBPF, ENC|DEC, CODECS_ALL, 64, 138240, 1, 138240}, @@ -135,121 +122,20 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {MBPS, ENC|DEC, CODECS_ALL, 64, 7833600, 1, 7833600}, {FRAME_RATE, ENC|DEC, CODECS_ALL, 1, 960, 1, 30}, - {BIT_RATE, ENC|DEC, CODECS_ALL, - 1, 220000000, 1, 20000000, - V4L2_CID_MPEG_VIDEO_BITRATE, HFI_PROP_TOTAL_BITRATE, - CAP_FLAG_DYNAMIC_ALLOWED, - /* TO DO parents */ {0}, - {LAYER_BITRATE, SLICE_BYTE}, - msm_vidc_adjust_bitrate, msm_vidc_set_s32}, - - {BIT_RATE, ENC, HEVC, - 1, 160000000, 1, 20000000, - V4L2_CID_MPEG_VIDEO_BITRATE, HFI_PROP_TOTAL_BITRATE, - CAP_FLAG_DYNAMIC_ALLOWED, - /* TO DO parents */{0}, - {LAYER_BITRATE, SLICE_BYTE}, - msm_vidc_adjust_bitrate, msm_vidc_set_s32}, - - {ENTROPY_MODE, ENC, H264, - V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC, - V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, - BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC) | - BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC), - V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, - V4L2_CID_MPEG_VIDEO_H264_ENTROPY_MODE, HFI_PROP_CABAC_SESSION, - CAP_FLAG_MENU, - {CODEC, PROFILE}, - {BIT_RATE}, - msm_vidc_adjust_entropy_mode, msm_vidc_set_u32}, - - {PROFILE, ENC|DEC, H264, - V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE, - V4L2_MPEG_VIDEO_H264_PROFILE_HIGH_10, - BIT(V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE) | - BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_BASELINE) | - BIT(V4L2_MPEG_VIDEO_H264_PROFILE_MAIN) | - BIT(V4L2_MPEG_VIDEO_H264_PROFILE_HIGH) | - BIT(V4L2_MPEG_VIDEO_H264_PROFILE_HIGH_10), - V4L2_MPEG_VIDEO_H264_PROFILE_HIGH, - V4L2_CID_MPEG_VIDEO_H264_PROFILE, HFI_PROP_PROFILE, - CAP_FLAG_ROOT | CAP_FLAG_MENU, - {0}, - {ENTROPY_MODE}, - NULL, msm_vidc_set_u32}, - - {LEVEL, ENC|DEC, H264, - V4L2_MPEG_VIDEO_H264_LEVEL_1_0, - V4L2_MPEG_VIDEO_H264_LEVEL_6_2, - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1B) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_3) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_2), - V4L2_MPEG_VIDEO_H264_LEVEL_6_2, - V4L2_CID_MPEG_VIDEO_H264_LEVEL, HFI_PROP_LEVEL, - /* TO DO(AS) */ - CAP_FLAG_ROOT | CAP_FLAG_MENU, - {0}, - {0}, - NULL, msm_vidc_set_u32}, - - {CABAC_BITRATE, ENC, H264, 1, 160000000, 1, 20000000}, - {VBV_DELAY, ENC, CODECS_ALL, - 0, 1000, 500, 0, - V4L2_CID_MPEG_VIDEO_VBV_DELAY}, - {SCALE_X, ENC, CODECS_ALL, 8192, 65536, 1, 8192}, {SCALE_Y, ENC, CODECS_ALL, 8192, 65536, 1, 8192}, {SCALE_X, DEC, CODECS_ALL, 65536, 65536, 1, 65536}, {SCALE_Y, DEC, CODECS_ALL, 65536, 65536, 1, 65536}, - {B_FRAME, ENC, H264|HEVC, 0, 1, 1, 0}, - {HIER_P_LAYERS, ENC, H264|HEVC, 0, 6, 1, 0}, - {LTR_COUNT, ENC, H264|HEVC, 0, 2, 1, 0}, + {B_FRAME, ENC, H264|HEVC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDEO_B_FRAMES, + HFI_PROP_MAX_B_FRAMES, + CAP_FLAG_ROOT}, + /* ((4096 * 2304) / 256) * 60 fps */ {POWER_SAVE_MBPS, ENC, CODECS_ALL, 0, 2211840, 1, 2211840}, - {I_FRAME_QP, ENC, H264|HEVC, 0, 51, 1, 10}, - {P_FRAME_QP, ENC, H264|HEVC, 0, 51, 1, 20}, - {B_FRAME_QP, ENC, H264|HEVC, 0, 51, 1, 20}, - {I_FRAME_QP, ENC, VP9, 0, 127, 1, 20}, - {P_FRAME_QP, ENC, VP9, 0, 127, 1, 40}, - {B_FRAME_QP, ENC, VP9, 0, 127, 1, 40}, - /* 10 slices */ - {SLICE_BYTE, ENC, H264|HEVC, 1, 10, 1, 10}, - {SLICE_MB, ENC, H264|HEVC, 1, 10, 1, 10}, - - /* Mpeg2 decoder specific */ - {FRAME_WIDTH, DEC, MPEG2, 128, 1920, 1, 1920}, - {FRAME_HEIGHT, DEC, MPEG2, 128, 1920, 1, 1080}, - /* (1920 * 1088) / 256 */ - {MBPF, DEC, MPEG2, 64, 8160, 1, 8160}, - /* ((1920 * 1088) / 256) * 30*/ - {MBPS, DEC, MPEG2, 64, 244800, 1, 244800}, - {FRAME_RATE, DEC, MPEG2, 1, 30, 1, 30}, - {BIT_RATE, DEC, MPEG2, 1, 40000000, 1, 20000000}, - - /* Secure usecase specific */ - {SECURE_FRAME_WIDTH, ENC|DEC, CODECS_ALL, 128, 4096, 1, 1920}, - {SECURE_FRAME_HEIGHT, ENC|DEC, CODECS_ALL, 128, 4096, 1, 1080}, - /* (4096 * 2304) / 256 */ - {SECURE_MBPF, ENC|DEC, CODECS_ALL, 64, 36864, 1, 36864}, - {SECURE_BIT_RATE, ENC|DEC, CODECS_ALL, 1, 40000000, 1, 20000000}, /* Batch Mode Decode */ {BATCH_MBPF, DEC, CODECS_ALL, 64, 34816, 1, 34816}, @@ -280,6 +166,734 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {MB_CYCLES_LP, DEC, CODECS_ALL, 200, 200, 1, 200}, {MB_CYCLES_FW, ENC|DEC, CODECS_ALL, 326389, 326389, 1, 326389}, {MB_CYCLES_FW_VPP, ENC|DEC, CODECS_ALL, 44156, 44156, 1, 44156}, + + // confirm codec + {B_FRAME_MIN_QP, ENC, HEVC|H264, + 0, 51, 1, 20, + V4L2_CID_MPEG_VIDC_B_FRAME_MIN_QP, + HFI_PROP_MIN_QP_PACKED, + CAP_FLAG_ROOT}, + + {B_FRAME_MAX_QP, ENC, HEVC|H264, + 0, 51, 1, 20, + V4L2_CID_MPEG_VIDC_B_FRAME_MAX_QP, + HFI_PROP_MAX_QP_PACKED, + CAP_FLAG_ROOT}, + + {HFLIP, ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_HFLIP, + HFI_PROP_FLIP, + CAP_FLAG_ROOT}, + + {VFLIP, ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_VFLIP, + HFI_PROP_FLIP, + CAP_FLAG_ROOT}, + + {PREPEND_SPSPPS_TO_IDR, ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDEO_PREPEND_SPSPPS_TO_IDR, + HFI_PROP_SEQ_HEADER_MODE, + CAP_FLAG_ROOT}, + + {REQUEST_I_FRAME, ENC, CODECS_ALL, + 0, 0, 0, 0, + V4L2_CID_MPEG_VIDEO_FORCE_KEY_FRAME, + HFI_PROP_REQUEST_SYNC_FRAME, + CAP_FLAG_ROOT}, + + {SLICE_INTERFACE, DEC, CODECS_ALL, + 0, 0, 0, 0, + V4L2_CID_MPEG_VIDEO_DECODER_SLICE_INTERFACE, + 0}, + + {FRAME_RC, ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_ENABLE, + V4L2_CID_MPEG_VIDEO_FRAME_RC_ENABLE, + 0}, + + {BITRATE_MODE, ENC, CODECS_ALL, + V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, + V4L2_MPEG_VIDEO_BITRATE_MODE_CBR, + /* TODO: MBR, CBR_VFR, MBR_VFR, CQ */ + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_VBR) | + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CBR), + V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, + V4L2_CID_MPEG_VIDEO_BITRATE_MODE, + HFI_PROP_RATE_CONTROL, + CAP_FLAG_ROOT | CAP_FLAG_MENU}, + + {HEADER_MODE, ENC, CODECS_ALL, + V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE, + V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME, + BIT(V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE) | + BIT(V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME), + V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE, + V4L2_CID_MPEG_VIDEO_HEADER_MODE, + HFI_PROP_SEQ_HEADER_MODE, + CAP_FLAG_ROOT | CAP_FLAG_MENU}, + + // confirm codec + {GOP_SIZE, ENC, CODECS_ALL, + 0, MAX_GOP, 1, 2 * DEFAULT_FPS - 1, + V4L2_CID_MPEG_VIDEO_GOP_SIZE, + HFI_PROP_MAX_GOP_FRAMES, + CAP_FLAG_ROOT}, + + {GOP_CLOSURE, ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_ENABLE, + V4L2_CID_MPEG_VIDEO_GOP_CLOSURE, + 0}, + + {BIT_RATE, ENC, CODECS_ALL, + 1, 220000000, 1, 20000000, + V4L2_CID_MPEG_VIDEO_BITRATE, + HFI_PROP_TOTAL_BITRATE, + CAP_FLAG_DYNAMIC_ALLOWED, + /* TO DO parents */ {0}, + {SLICE_MAX_BYTES}, + msm_vidc_adjust_bitrate, msm_vidc_set_s32}, + + {BIT_RATE, DEC, CODECS_ALL, 1, 220000000, 1, 220000000}, + + /* Secure usecase specific */ + {SECURE_FRAME_WIDTH, ENC|DEC, CODECS_ALL, 128, 4096, 1, 1920}, + + {SECURE_FRAME_HEIGHT, ENC|DEC, CODECS_ALL, 128, 4096, 1, 1080}, + + /* (4096 * 2304) / 256 */ + {SECURE_MBPF, ENC|DEC, CODECS_ALL, 64, 36864, 1, 36864}, + + {SECURE_MODE, ENC|DEC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_SECURE, + HFI_PROP_SECURE, + CAP_FLAG_ROOT, + {0}, + {0}}, + + {BLUR_TYPES, ENC, CODECS_ALL, + VIDC_BLUR_NONE, VIDC_BLUR_ADAPTIVE, 1, VIDC_BLUR_NONE, + V4L2_CID_MPEG_VIDC_VIDEO_BLUR_TYPES, + HFI_PROP_BLUR_TYPES, + CAP_FLAG_ROOT}, + + {BLUR_RESOLUTION, ENC, CODECS_ALL, + 0, S32_MAX, 1, 0, + V4L2_CID_MPEG_VIDC_VIDEO_BLUR_RESOLUTION, + HFI_PROP_BLUR_RESOLUTION, + CAP_FLAG_ROOT}, + + /* Needed for control initialization. TODO */ + /* {CSC_CUSTOM_MATRIX, ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_VIDEO_VPE_CSC_CUSTOM_MATRIX, + HFI_PROP_CSC_MATRIX, + CAP_FLAG_ROOT}, */ + + {HEIC, ENC, HEVC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_HEIC, + HFI_PROP_HEIC_GRID_ENABLE, + CAP_FLAG_ROOT}, + + {LOWLATENCY_MODE, ENC|DEC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_LOWLATENCY_REQUEST, + HFI_PROP_STAGE, + CAP_FLAG_ROOT}, + + {LTR_COUNT, ENC, H264|HEVC, + 0, 2, 1, 0, + V4L2_CID_MPEG_VIDC_LTRCOUNT, + HFI_PROP_LTR_COUNT, + CAP_FLAG_ROOT}, + + {USE_LTR, ENC, H264|HEVC, + 0, ((1 << MAX_LTR_FRAME_COUNT) - 1), 1, 0, + V4L2_CID_MPEG_VIDC_USELTRFRAME, + HFI_PROP_LTR_USE, + CAP_FLAG_ROOT, + {LTR_COUNT}, + {0}}, + + {MARK_LTR, ENC, H264|HEVC, + 0, (MAX_LTR_FRAME_COUNT - 1), 1, 0, + V4L2_CID_MPEG_VIDC_MARKLTRFRAME, + HFI_PROP_LTR_MARK, + CAP_FLAG_ROOT}, + + {BASELAYER_PRIORITY, ENC, H264|HEVC, + 0, MAX_BASE_LAYER_PRIORITY_ID, 1, 0, + V4L2_CID_MPEG_VIDC_BASELAYER_PRIORITY, + HFI_PROP_BASELAYER_PRIORITYID, + CAP_FLAG_ROOT}, + + {IR_RANDOM, ENC, CODECS_ALL, + 0, MAX_INTRA_REFRESH_MBS, 1, 0, + V4L2_CID_MPEG_VIDC_INTRA_REFRESH_PERIOD, + HFI_PROP_IR_RANDOM_PERIOD, + CAP_FLAG_ROOT}, + + {AU_DELIMITER, ENC, H264|HEVC, + V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_AU_DELIMITER, + HFI_PROP_AUD, + CAP_FLAG_ROOT}, + + // confirm codec + {TIME_DELTA_BASED_RC, ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_ENABLE, + V4L2_CID_MPEG_VIDC_TIME_DELTA_BASED_RC, + HFI_PROP_TIME_DELTA_BASED_RATE_CONTROL, + CAP_FLAG_ROOT}, + + // confirm codec + {CONTENT_ADAPTIVE_CODING, ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_ENABLE, + V4L2_CID_MPEG_VIDC_CONTENT_ADAPTIVE_CODING, + HFI_PROP_CONTENT_ADAPTIVE_CODING, + CAP_FLAG_ROOT}, + + {BITRATE_BOOST, ENC, CODECS_ALL, + 0, 100, 25, 25, + V4L2_CID_MPEG_VIDC_QUALITY_BITRATE_BOOST, + HFI_PROP_CONST_QUALITY_BITRATE_BOOST, + CAP_FLAG_ROOT}, + + {ROTATION, ENC, CODECS_ALL, + 0, 270, 90, 0, + V4L2_CID_ROTATE, + HFI_PROP_ROTATION, + CAP_FLAG_ROOT}, + + {VBV_DELAY, ENC, CODECS_ALL, + 0, 1000, 500, 0, + V4L2_CID_MPEG_VIDEO_VBV_DELAY}, + + /* HEVC specific */ + {MIN_FRAME_QP, ENC, HEVC, + 0, 51, 1, 20, + V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP, + HFI_PROP_MIN_QP_PACKED, + CAP_FLAG_ROOT}, + + {MAX_FRAME_QP, ENC, HEVC, + 0, 51, 1, 20, + V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP, + HFI_PROP_MAX_QP_PACKED, + CAP_FLAG_ROOT}, + + {HEVC_HIER_QP, ENC, HEVC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_ROOT}, + + /* + * HEVC I_MIN_QP, I_MAX_QP, P_MIN_QP, P_MAX_QP, B_MIN_QP, B_MAX_QP are missing + */ + {I_FRAME_QP, ENC, HEVC, + 0, 51, 1, 10, + V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_ROOT}, + + {P_FRAME_QP, ENC, HEVC, + 0, 51, 1, 20, + V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_ROOT}, + + {B_FRAME_QP, ENC, HEVC, + 0, 51, 1, 20, + V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_ROOT}, + + {HIER_CODING_TYPE, ENC, HEVC, + V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B, + V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P, + BIT(V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B) | + BIT(V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P), + V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE, + HFI_PROP_LAYER_ENCODING_TYPE, + CAP_FLAG_ROOT | CAP_FLAG_MENU}, + + {HIER_CODING_LAYER, ENC, HEVC, + 0, 5, 1, 0, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER, + HFI_PROP_LAYER_COUNT, + CAP_FLAG_ROOT}, + + {L0_QP, ENC, HEVC, + 0, 51, 1, 20, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L0_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_ROOT}, + + {L1_QP, ENC, HEVC, + 0, 51, 1, 20, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L1_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_ROOT}, + + {L2_QP, ENC, HEVC, + 0, 51, 1, 20, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L2_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_ROOT}, + + {L3_QP, ENC, HEVC, + 0, 51, 1, 20, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L3_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_ROOT}, + + {L4_QP, ENC, HEVC, + 0, 51, 1, 20, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L4_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_ROOT}, + + {L5_QP, ENC, HEVC, + 0, 51, 1, 20, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L5_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_ROOT}, + + {PROFILE, ENC|DEC, HEVC, + V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN, + V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10, + BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN) | + BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE) | + BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10), + V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN, + V4L2_CID_MPEG_VIDEO_HEVC_PROFILE, + HFI_PROP_PROFILE, + CAP_FLAG_ROOT | CAP_FLAG_MENU, + {0}, + {ENTROPY_MODE}, + NULL, msm_vidc_set_u32}, + + {LEVEL, ENC|DEC, HEVC, + V4L2_MPEG_VIDEO_HEVC_LEVEL_1, + V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2, + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2), + V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2, + V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_ROOT | CAP_FLAG_MENU, + {0}, + {0}, + NULL, msm_vidc_set_u32}, + + {HEVC_TIER, ENC|DEC, HEVC, + V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, + V4L2_MPEG_VIDEO_HEVC_TIER_HIGH, + BIT(V4L2_MPEG_VIDEO_HEVC_TIER_MAIN) | + BIT(V4L2_MPEG_VIDEO_HEVC_TIER_HIGH), + V4L2_MPEG_VIDEO_HEVC_TIER_HIGH, + V4L2_CID_MPEG_VIDEO_HEVC_TIER, + HFI_PROP_TIER, + CAP_FLAG_ROOT | CAP_FLAG_MENU, + {0}, + {0}, + NULL, msm_vidc_set_u32}, + + {LF_MODE, ENC, HEVC, + V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_DISABLED, + DB_HEVC_DISABLE_SLICE_BOUNDARY, + BIT(V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_DISABLED) | + BIT(V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_ENABLED) | + BIT(DB_HEVC_DISABLE_SLICE_BOUNDARY), + V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_ENABLED, + V4L2_CID_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE, + HFI_PROP_DEBLOCKING_MODE, + CAP_FLAG_ROOT | CAP_FLAG_MENU}, + + {LF_BETA, ENC, HEVC, + -6, 6, 1, 0, + V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2, + HFI_PROP_DEBLOCKING_MODE, + CAP_FLAG_ROOT}, + + {LF_TC, ENC, HEVC, + -6, 6, 1, 0, + V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2, + HFI_PROP_DEBLOCKING_MODE, + CAP_FLAG_ROOT}, + + {LOSSLESS, ENC, HEVC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU, + HFI_PROP_RATE_CONTROL, + CAP_FLAG_ROOT}, + + {L0_BR, ENC, HEVC, + 1, 220000000, 1, 20000000, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L0_BR, + HFI_PROP_BITRATE_LAYER1, + CAP_FLAG_ROOT}, + + {L1_BR, ENC, HEVC, + 1, 220000000, 1, 20000000, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L1_BR, + HFI_PROP_BITRATE_LAYER2, + CAP_FLAG_ROOT}, + + {L2_BR, ENC, HEVC, + 1, 220000000, 1, 20000000, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L2_BR, + HFI_PROP_BITRATE_LAYER3, + CAP_FLAG_ROOT}, + + {L3_BR, ENC, HEVC, + 1, 220000000, 1, 20000000, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L3_BR, + HFI_PROP_BITRATE_LAYER4, + CAP_FLAG_ROOT}, + + {L4_BR, ENC, HEVC, + 1, 220000000, 1, 20000000, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L4_BR, + HFI_PROP_BITRATE_LAYER5, + CAP_FLAG_ROOT}, + + {L5_BR, ENC, HEVC, + 1, 220000000, 1, 20000000, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L5_BR, + HFI_PROP_BITRATE_LAYER6, + CAP_FLAG_ROOT}, + + {BIT_RATE, ENC, HEVC, + 1, 160000000, 1, 20000000, + V4L2_CID_MPEG_VIDEO_BITRATE, + HFI_PROP_TOTAL_BITRATE, + CAP_FLAG_DYNAMIC_ALLOWED, + /* TODO parents */{0}, + {SLICE_MAX_BYTES}, + msm_vidc_adjust_bitrate, msm_vidc_set_s32}, + + {SLICE_MAX_BYTES, ENC, H264|HEVC, + 1, MAX_BITRATE / DEFAULT_FPS / 8 / 10, + 1, MAX_BITRATE / DEFAULT_FPS / 8 / 10, + V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES, + HFI_PROP_MULTI_SLICE_BYTES_COUNT, + CAP_FLAG_ROOT}, + + {SLICE_MAX_MB, ENC, H264|HEVC, + 1, (MAX_WIDTH * MAX_HEIGHT) / 256 / DEFAULT_FPS / 10, + 1, (MAX_WIDTH * MAX_HEIGHT) / 256 / DEFAULT_FPS / 10, + V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB, + HFI_PROP_MULTI_SLICE_MB_COUNT, + CAP_FLAG_ROOT}, + + {SLICE_MODE, ENC, H264|HEVC, + V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, + V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_BYTES, + BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE) | + BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_MB) | + BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_BYTES), + V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, + V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE, + 0, + CAP_FLAG_ROOT | CAP_FLAG_MENU}, + + /* Mpeg2 decoder specific */ + {BIT_RATE, DEC, MPEG2, + 1, 40000000, 1, 20000000, + V4L2_CID_MPEG_VIDEO_BITRATE, + HFI_PROP_TOTAL_BITRATE, + CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + msm_vidc_adjust_bitrate, msm_vidc_set_s32}, + + {LEVEL, DEC, MPEG2, + V4L2_MPEG_VIDEO_MPEG2_LEVEL_LOW, + V4L2_MPEG_VIDEO_MPEG2_LEVEL_HIGH, + BIT(V4L2_MPEG_VIDEO_MPEG2_LEVEL_LOW) | + BIT(V4L2_MPEG_VIDEO_MPEG2_LEVEL_MAIN) | + BIT(V4L2_MPEG_VIDEO_MPEG2_LEVEL_HIGH_1440) | + BIT(V4L2_MPEG_VIDEO_MPEG2_LEVEL_HIGH), + V4L2_MPEG_VIDEO_MPEG2_LEVEL_HIGH, + V4L2_CID_MPEG_VIDEO_MPEG2_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_ROOT | CAP_FLAG_MENU}, + + {PROFILE, DEC, MPEG2, + V4L2_MPEG_VIDEO_MPEG2_PROFILE_SIMPLE, + V4L2_MPEG_VIDEO_MPEG2_PROFILE_MAIN, + BIT(V4L2_MPEG_VIDEO_MPEG2_PROFILE_SIMPLE) | + BIT(V4L2_MPEG_VIDEO_MPEG2_PROFILE_MAIN), + V4L2_MPEG_VIDEO_MPEG2_PROFILE_MAIN, + V4L2_CID_MPEG_VIDEO_MPEG2_PROFILE, + HFI_PROP_PROFILE, + CAP_FLAG_ROOT | CAP_FLAG_MENU}, + + {FRAME_WIDTH, DEC, MPEG2, 128, 1920, 1, 1920}, + {FRAME_HEIGHT, DEC, MPEG2, 128, 1920, 1, 1080}, + /* (1920 * 1088) / 256 */ + {MBPF, DEC, MPEG2, 64, 8160, 1, 8160}, + /* ((1920 * 1088) / 256) * 30*/ + {MBPS, DEC, MPEG2, 64, 244800, 1, 244800}, + {FRAME_RATE, DEC, MPEG2, 1, 30, 1, 30}, + + /* H264 specific */ + {CABAC_BITRATE, ENC, H264, 1, 160000000, 1, 20000000}, + + {I_FRAME_QP, ENC, H264, + 0, 51, 1, 10, + V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_ROOT}, + + {P_FRAME_QP, ENC, H264, + 0, 51, 1, 20, + V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_ROOT}, + + {B_FRAME_QP, ENC, H264, + 0, 51, 1, 20, + V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_ROOT}, + + {MIN_FRAME_QP, ENC, H264, + 0, 51, 1, 20, + V4L2_CID_MPEG_VIDEO_H264_MIN_QP, + HFI_PROP_MIN_QP_PACKED, + CAP_FLAG_ROOT}, + + {MAX_FRAME_QP, ENC, H264, + 0, 51, 1, 20, + V4L2_CID_MPEG_VIDEO_H264_MAX_QP, + HFI_PROP_MAX_QP_PACKED, + CAP_FLAG_ROOT}, + + {LF_BETA, ENC, H264, + -6, 6, 1, 0, + V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_BETA, + HFI_PROP_DEBLOCKING_MODE, + CAP_FLAG_ROOT}, + + {LF_ALPHA, ENC, H264, + -6, 6, 1, 0, + V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_ALPHA, + HFI_PROP_DEBLOCKING_MODE, + CAP_FLAG_ROOT}, + + {MB_RC, ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_ENABLE, + V4L2_CID_MPEG_VIDEO_MB_RC_ENABLE, + 0, + CAP_FLAG_ROOT}, + + {TRANSFORM_8X8, ENC, H264, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_ENABLE, + V4L2_CID_MPEG_VIDEO_H264_8X8_TRANSFORM, + HFI_PROP_8X8_TRANSFORM, + CAP_FLAG_ROOT}, + + {ENTROPY_MODE, ENC, H264, + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC, + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, + BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC) | + BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC), + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, + V4L2_CID_MPEG_VIDEO_H264_ENTROPY_MODE, + HFI_PROP_CABAC_SESSION, + CAP_FLAG_ROOT | CAP_FLAG_MENU, + {PROFILE}, + {BIT_RATE}, + msm_vidc_adjust_entropy_mode, msm_vidc_set_u32}, + + {PROFILE, ENC|DEC, H264, + V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE, + V4L2_MPEG_VIDEO_H264_PROFILE_HIGH_10, + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_BASELINE) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_MAIN) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_HIGH) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_HIGH_10), + V4L2_MPEG_VIDEO_H264_PROFILE_HIGH, + V4L2_CID_MPEG_VIDEO_H264_PROFILE, + HFI_PROP_PROFILE, + CAP_FLAG_ROOT | CAP_FLAG_MENU, + {0}, + {ENTROPY_MODE}, + NULL, msm_vidc_set_u32}, + + {LEVEL, ENC|DEC, H264, + V4L2_MPEG_VIDEO_H264_LEVEL_1_0, + V4L2_MPEG_VIDEO_H264_LEVEL_5_1, + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1B) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_3) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_1), + V4L2_MPEG_VIDEO_H264_LEVEL_5_1, + V4L2_CID_MPEG_VIDEO_H264_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_ROOT | CAP_FLAG_MENU, + {0}, + {0}, + NULL, msm_vidc_set_u32}, + + {LF_MODE, ENC, H264, + V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED, + DB_H264_DISABLE_SLICE_BOUNDARY, + BIT(V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED) | + BIT(V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_DISABLED) | + BIT(DB_H264_DISABLE_SLICE_BOUNDARY), + V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED, + V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_MODE, + HFI_PROP_DEBLOCKING_MODE, + CAP_FLAG_ROOT | CAP_FLAG_MENU}, + + {HIER_CODING, ENC, H264, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING, + HFI_PROP_LAYER_ENCODING_TYPE, + CAP_FLAG_ROOT}, + + /* TODO(AS) - ctrl init failing. Need to fix + {HIER_CODING_TYPE, ENC, H264, + V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_B, + V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P, + BIT(V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_B) | + BIT(V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P), + V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P, + V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_TYPE, + HFI_PROP_LAYER_ENCODING_TYPE, + CAP_FLAG_ROOT | CAP_FLAG_MENU}, + */ + + {HIER_CODING_LAYER, ENC, H264, + 0, 6, 1, 0, + V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_LAYER, + HFI_PROP_LAYER_COUNT, + CAP_FLAG_ROOT}, + + {HIER_LAYER_QP, ENC, H264, + 0, 0x0060033, 1, 20, + V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_LAYER_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_ROOT}, + + /* TODO: CHROMA_QP_INDEX_OFFSET is applicable to HEVC as well */ + {CHROMA_QP_INDEX_OFFSET, ENC, H264, + MIN_CHROMA_QP_OFFSET, MAX_CHROMA_QP_OFFSET, + 1, MAX_CHROMA_QP_OFFSET, + V4L2_CID_MPEG_VIDEO_H264_CHROMA_QP_INDEX_OFFSET, + HFI_PROP_CHROMA_QP_OFFSET, + CAP_FLAG_ROOT}, + + {I_FRAME_MIN_QP, ENC, H264, + 0, 51, 1, 20, + V4L2_CID_MPEG_VIDEO_H264_I_FRAME_MIN_QP, + HFI_PROP_MIN_QP_PACKED, + CAP_FLAG_ROOT}, + + {I_FRAME_MAX_QP, ENC, H264, + 0, 51, 1, 20, + V4L2_CID_MPEG_VIDEO_H264_I_FRAME_MAX_QP, + HFI_PROP_MIN_QP_PACKED, + CAP_FLAG_ROOT}, + + {P_FRAME_MIN_QP, ENC, H264, + 0, 51, 1, 20, + V4L2_CID_MPEG_VIDEO_H264_P_FRAME_MIN_QP, + HFI_PROP_MIN_QP_PACKED, + CAP_FLAG_ROOT}, + + {P_FRAME_MAX_QP, ENC, H264, + 0, 51, 1, 20, + V4L2_CID_MPEG_VIDEO_H264_P_FRAME_MAX_QP, + HFI_PROP_MIN_QP_PACKED, + CAP_FLAG_ROOT}, + + {DISPLAY_DELAY, DEC, CODECS_ALL, + 0, 1, 1, 0, + V4L2_CID_MPEG_MFC51_VIDEO_DECODER_H264_DISPLAY_DELAY, + HFI_PROP_DECODE_ORDER_OUTPUT, + CAP_FLAG_ROOT}, + + {DISPLAY_DELAY_ENABLE, DEC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_MFC51_VIDEO_DECODER_H264_DISPLAY_DELAY_ENABLE, + HFI_PROP_DECODE_ORDER_OUTPUT, + CAP_FLAG_ROOT}, + + /* VP9 specific */ + {I_FRAME_QP, ENC, VP9, 0, 127, 1, 20}, + + {P_FRAME_QP, ENC, VP9, 0, 127, 1, 40}, + + {B_FRAME_QP, ENC, VP9, 0, 127, 1, 40}, + + {PROFILE, DEC, VP9, + V4L2_MPEG_VIDEO_VP9_PROFILE_0, + V4L2_MPEG_VIDEO_VP9_PROFILE_2, + BIT(V4L2_MPEG_VIDEO_VP9_PROFILE_0) | + BIT(V4L2_MPEG_VIDEO_VP9_PROFILE_2), + V4L2_MPEG_VIDEO_VP9_PROFILE_0, + V4L2_CID_MPEG_VIDEO_VP9_PROFILE, + HFI_PROP_PROFILE, + CAP_FLAG_ROOT | CAP_FLAG_MENU, + {0}, + {ENTROPY_MODE}, + NULL, msm_vidc_set_u32}, }; /* diff --git a/driver/vidc/inc/hfi_property.h b/driver/vidc/inc/hfi_property.h index 84fa63266a..9a5e2cd4c1 100644 --- a/driver/vidc/inc/hfi_property.h +++ b/driver/vidc/inc/hfi_property.h @@ -233,7 +233,7 @@ enum hfi_rate_control { }; #define HFI_PROP_RATE_CONTROL 0x0300012a -#define HFI_PROP_FRAMERATE_BASED_RATE_CONTROL 0x0300012b +#define HFI_PROP_TIME_DELTA_BASED_RATE_CONTROL 0x0300012b #define HFI_PROP_CONTENT_ADAPTIVE_CODING 0x0300012c diff --git a/driver/vidc/inc/msm_vidc_control.h b/driver/vidc/inc/msm_vidc_control.h index 87dc22e841..7015d90cc2 100644 --- a/driver/vidc/inc/msm_vidc_control.h +++ b/driver/vidc/inc/msm_vidc_control.h @@ -10,15 +10,25 @@ #include "msm_vidc_inst.h" #include "msm_vidc_internal.h" +#define MAX_GOP 0xFFFFFFF +#define MAX_INTRA_REFRESH_MBS ((7680 * 4320) >> 8) +#define MAX_BASE_LAYER_PRIORITY_ID 63 +#define MIN_CHROMA_QP_OFFSET -12 +#define MAX_CHROMA_QP_OFFSET 12 +#define MAX_LTR_FRAME_COUNT 10 +#define MAX_BITRATE 220000000 + enum msm_vidc_ctrl_list_type { CHILD_LIST = BIT(0), FW_LIST = BIT(1), }; int msm_vidc_ctrl_init(struct msm_vidc_inst *inst); +int msm_vidc_ctrl_deinit(struct msm_vidc_inst *inst); int msm_v4l2_op_s_ctrl(struct v4l2_ctrl *ctrl); int msm_vidc_adjust_bitrate(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_entropy_mode(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_ltr_count(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_properties(struct msm_vidc_inst *inst); int msm_vidc_set_u32(void *instance, enum msm_vidc_inst_capability_type cap_id); diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 6022a67fb8..32746533bf 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -24,6 +24,8 @@ #define DEFAULT_TIMEOUT 3 #define DEFAULT_HEIGHT 240 #define DEFAULT_WIDTH 320 +#define MAX_HEIGHT 4320 +#define MAX_WIDTH 8192 #define MIN_SUPPORTED_WIDTH 32 #define MIN_SUPPORTED_HEIGHT 32 #define DEFAULT_FPS 30 @@ -38,6 +40,9 @@ #define DEFAULT_BSE_VPP_DELAY 2 #define MAX_CAP_PARENTS 16 #define MAX_CAP_CHILDREN 16 +/* TODO + * #define MAX_SUPERFRAME_COUNT 32 +*/ /* Maintains the number of FTB's between each FBD over a window */ #define DCVS_FTB_WINDOW 16 @@ -72,6 +77,12 @@ #define NUM_MBS_720P (((1280 + 15) >> 4) * ((720 + 15) >> 4)) #define NUM_MBS_4k (((4096 + 15) >> 4) * ((2304 + 15) >> 4)) +#define DB_H264_DISABLE_SLICE_BOUNDARY \ + V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_DISABLED_AT_SLICE_BOUNDARY + +#define DB_HEVC_DISABLE_SLICE_BOUNDARY \ + V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_DISABLED_AT_SLICE_BOUNDARY + /* * Convert Q16 number into Integer and Fractional part upto 2 places. * Ex : 105752 / 65536 = 1.61; 1.61 in Q16 = 105752; @@ -206,48 +217,18 @@ enum msm_vidc_core_capability_type { enum msm_vidc_inst_capability_type { INST_CAP_NONE = 0, - CODEC, FRAME_WIDTH, FRAME_HEIGHT, PIX_FMTS, MIN_BUFFERS_INPUT, MIN_BUFFERS_OUTPUT, - DECODE_ORDER, - THUMBNAIL_MODE, - SECURE_MODE, - LOWLATENCY_MODE, - LOWLATENCY_HINT, - BUF_SIZE_LIMIT, MBPF, MBPS, FRAME_RATE, - BIT_RATE, - BITRATE_MODE, - LAYER_BITRATE, - ENTROPY_MODE, - CABAC_BITRATE, - VBV_DELAY, - LTR_COUNT, - LCU_SIZE, - POWER_SAVE_MBPS, SCALE_X, SCALE_Y, - PROFILE, - LEVEL, - I_FRAME_QP, - P_FRAME_QP, - B_FRAME_QP, B_FRAME, - HIER_P_LAYERS, - BLUR_WIDTH, - BLUR_HEIGHT, - SLICE_BYTE, - SLICE_MB, - SECURE, - SECURE_FRAME_WIDTH, - SECURE_FRAME_HEIGHT, - SECURE_MBPF, - SECURE_BIT_RATE, + POWER_SAVE_MBPS, BATCH_MBPF, BATCH_FRAME_RATE, LOSSLESS_FRAME_WIDTH, @@ -263,6 +244,83 @@ enum msm_vidc_inst_capability_type { MB_CYCLES_LP, MB_CYCLES_FW, MB_CYCLES_FW_VPP, + HFLIP, + VFLIP, + PREPEND_SPSPPS_TO_IDR, + REQUEST_I_FRAME, + SLICE_INTERFACE, + FRAME_RC, + BITRATE_MODE, + HEADER_MODE, + GOP_SIZE, + GOP_CLOSURE, + BIT_RATE, + SECURE_FRAME_WIDTH, + SECURE_FRAME_HEIGHT, + SECURE_MBPF, + SECURE_MODE, + BLUR_TYPES, + BLUR_RESOLUTION, + CSC_CUSTOM_MATRIX, + HEIC, + LOWLATENCY_MODE, + LTR_COUNT, + USE_LTR, + MARK_LTR, + BASELAYER_PRIORITY, + IR_RANDOM, + AU_DELIMITER, + TIME_DELTA_BASED_RC, + CONTENT_ADAPTIVE_CODING, + BITRATE_BOOST, + ROTATION, + VBV_DELAY, + MIN_FRAME_QP, + MAX_FRAME_QP, + HEVC_HIER_QP, + I_FRAME_QP, + P_FRAME_QP, + I_FRAME_MIN_QP, + I_FRAME_MAX_QP, + P_FRAME_MIN_QP, + P_FRAME_MAX_QP, + B_FRAME_QP, + B_FRAME_MIN_QP, + B_FRAME_MAX_QP, + HIER_CODING_TYPE, + HIER_CODING_LAYER, + L0_QP, + L1_QP, + L2_QP, + L3_QP, + L4_QP, + L5_QP, + PROFILE, + LEVEL, + HEVC_TIER, + LF_MODE, + LF_ALPHA, + LF_BETA, + LF_TC, + LOSSLESS, + L0_BR, + L1_BR, + L2_BR, + L3_BR, + L4_BR, + L5_BR, + SLICE_MAX_BYTES, + SLICE_MAX_MB, + SLICE_MODE, + CABAC_BITRATE, + MB_RC, + TRANSFORM_8X8, + ENTROPY_MODE, + HIER_CODING, + HIER_LAYER_QP, + CHROMA_QP_INDEX_OFFSET, + DISPLAY_DELAY_ENABLE, + DISPLAY_DELAY, INST_CAP_MAX, }; diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 75cd83a017..fdc8f10b4f 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -12,6 +12,7 @@ #include "msm_vidc_driver.h" #include "msm_vidc_internal.h" #include "msm_vidc_platform.h" +#include "msm_vidc_control.h" #include "msm_vidc_debug.h" #include "venus_hfi.h" #include "hfi_packet.h" @@ -40,17 +41,31 @@ u32 msm_vdec_deliver_as_metadata[] = { HFI_PROP_BUFFER_TAG, }; -static int msm_vdec_codec_change(struct msm_vidc_inst *inst, u32 codec) +static int msm_vdec_codec_change(struct msm_vidc_inst *inst, u32 v4l2_codec) { int rc = 0; - d_vpr_h("%s()\n", __func__); + if (inst->codec && inst->fmts[INPUT_PORT].fmt.pix_mp.pixelformat == v4l2_codec) + return 0; - inst->codec = v4l2_codec_to_driver(codec, __func__); + s_vpr_h(inst->sid, "%s: codec changed from %#x to %#x\n", + __func__, inst->fmts[INPUT_PORT].fmt.pix_mp.pixelformat, v4l2_codec); + + inst->codec = v4l2_codec_to_driver(v4l2_codec, __func__); rc = msm_vidc_get_inst_capability(inst); if (rc) - return rc; - return 0; + goto exit; + + rc = msm_vidc_ctrl_deinit(inst); + if (rc) + goto exit; + + rc = msm_vidc_ctrl_init(inst); + if(rc) + goto exit; + +exit: + return rc; } static int msm_vdec_set_resolution(struct msm_vidc_inst *inst, diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index 404943e89b..d950ea0e80 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -12,6 +12,7 @@ #include "msm_vidc_driver.h" #include "msm_vidc_internal.h" #include "msm_vidc_platform.h" +#include "msm_vidc_control.h" #include "msm_vidc_debug.h" #include "venus_hfi.h" #include "hfi_packet.h" @@ -55,14 +56,30 @@ u32 msm_venc_output_subscribe_for_properties[] = { HFI_PROP_BUFFER_MARK, }; -static int msm_venc_codec_change(struct msm_vidc_inst *inst, u32 codec) +static int msm_venc_codec_change(struct msm_vidc_inst *inst, u32 v4l2_codec) { int rc = 0; - d_vpr_h("%s()\n", __func__); + if (inst->codec && inst->fmts[OUTPUT_PORT].fmt.pix_mp.pixelformat == v4l2_codec) + return 0; - inst->codec = v4l2_codec_to_driver(codec, __func__); + s_vpr_h(inst->sid, "%s: codec changed from %#x to %#x\n", + __func__, inst->fmts[OUTPUT_PORT].fmt.pix_mp.pixelformat, v4l2_codec); + + inst->codec = v4l2_codec_to_driver(v4l2_codec, __func__); rc = msm_vidc_get_inst_capability(inst); + if (rc) + goto exit; + + rc = msm_vidc_ctrl_deinit(inst); + if (rc) + goto exit; + + rc = msm_vidc_ctrl_init(inst); + if (rc) + goto exit; + +exit: return rc; } diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index 84d8e84725..cdfc9c3d94 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -804,9 +804,6 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) if (rc) goto error; } - rc = msm_vidc_ctrl_init(inst); - if (rc) - goto error; rc = msm_vidc_vb2_queue_init(inst); if (rc) diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 49abe6cad5..b45a47ee89 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -20,10 +20,6 @@ static bool is_priv_ctrl(u32 id) * Treat below standard controls as private because * we have added custom values to the controls */ - switch (id) { - case V4L2_CID_MPEG_VIDEO_BITRATE_MODE: - return true; - } return false; } @@ -47,6 +43,13 @@ static const char *const mpeg_video_stream_format[] = { NULL, }; +static const char *const mpeg_video_blur_types[] = { + "Blur None", + "Blur External", + "Blur Adaptive", + NULL, +}; + static const char *const roi_map_type[] = { "None", "2-bit", @@ -62,6 +65,8 @@ static const char * const * msm_vidc_get_qmenu_type( return mpeg_video_rate_control; case V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD: return mpeg_video_stream_format; + case V4L2_CID_MPEG_VIDC_VIDEO_BLUR_TYPES: + return mpeg_video_blur_types; default: s_vpr_e(inst->sid, "%s: No available qmenu for ctrl %#x\n", __func__, control_id); @@ -72,18 +77,50 @@ static const char * const * msm_vidc_get_qmenu_type( static const char *msm_vidc_get_priv_ctrl_name(u32 sid, u32 control_id) { switch (control_id) { - case V4L2_CID_MPEG_VIDC_THUMBNAIL_MODE: - return "Sync Frame Decode"; case V4L2_CID_MPEG_VIDC_SECURE: return "Secure Mode"; + case V4L2_CID_MPEG_VIDC_HEIC: + return "HEIC"; case V4L2_CID_MPEG_VIDC_LOWLATENCY_REQUEST: return "Low Latency Mode"; - /* TODO(AS) - case V4L2_CID_MPEG_VIDC_VIDEO_LOWLATENCY_HINT: - return "Low Latency Hint"; - case V4L2_CID_MPEG_VIDC_VIDEO_BUFFER_SIZE_LIMIT: - return "Buffer Size Limit"; - */ + case V4L2_CID_MPEG_VIDC_CODEC_CONFIG: + return "Codec Config"; + case V4L2_CID_MPEG_VIDC_B_FRAME_MIN_QP: + return "B frame Min QP"; + case V4L2_CID_MPEG_VIDC_B_FRAME_MAX_QP: + return "B frame Max QP"; + case V4L2_CID_MPEG_VIDC_LTRCOUNT: + return "LTR count"; + case V4L2_CID_MPEG_VIDC_USELTRFRAME: + return "Use LTR Frame"; + case V4L2_CID_MPEG_VIDC_MARKLTRFRAME: + return "Mark LTR Frame"; + case V4L2_CID_MPEG_VIDC_BASELAYER_PRIORITY: + return "Baselayer Priority"; + case V4L2_CID_MPEG_VIDC_INTRA_REFRESH_PERIOD: + return "Intra Refresh Period"; + case V4L2_CID_MPEG_VIDC_AU_DELIMITER: + return "AU Delimiter"; + case V4L2_CID_MPEG_VIDC_TIME_DELTA_BASED_RC: + return "Time Delta Based RC"; + case V4L2_CID_MPEG_VIDC_CONTENT_ADAPTIVE_CODING: + return "Content Adaptive Coding"; + case V4L2_CID_MPEG_VIDC_QUALITY_BITRATE_BOOST: + return "Quality Bitrate Boost"; + case V4L2_CID_MPEG_VIDC_VIDEO_BLUR_TYPES: + return "Blur Types"; + case V4L2_CID_MPEG_VIDC_VIDEO_BLUR_RESOLUTION: + return "Blur Resolution"; + case V4L2_CID_MPEG_VIDC_VIDEO_VPE_CSC_CUSTOM_MATRIX: + return "CSC Custom Matrix"; + case V4L2_CID_MPEG_VIDC_METADATA_ENABLE: + return "Metadata Enable"; + case V4L2_CID_MPEG_VIDC_METADATA_DISABLE: + return "Metadata Disable"; + case V4L2_CID_MPEG_MFC51_VIDEO_DECODER_H264_DISPLAY_DELAY: + return "H264 Display Delay"; + case V4L2_CID_MPEG_MFC51_VIDEO_DECODER_H264_DISPLAY_DELAY_ENABLE: + return "H264 Display Delay Enable"; default: s_vpr_e(sid, "%s: ctrl name not available for ctrl id %#x\n", __func__, control_id); @@ -169,6 +206,13 @@ static int msm_vidc_adjust_property(struct msm_vidc_inst *inst, capability = inst->capabilities; + /* + * skip for uninitialized cap properties. + * Eg: Skip Tramform 8x8 cap that is uninitialized for HEVC codec + */ + if (!capability->cap[cap_id].cap) + return 0; + if (capability->cap[cap_id].adjust) { rc = capability->cap[cap_id].adjust(inst, NULL); if (rc) @@ -180,7 +224,7 @@ static int msm_vidc_adjust_property(struct msm_vidc_inst *inst, if (rc) goto exit; - /* add cap_id to firmware list always */ + /* add cap_id to firmware list */ rc = msm_vidc_add_capid_to_list(inst, cap_id, FW_LIST); if (rc) goto exit; @@ -252,6 +296,19 @@ exit: return rc; } +int msm_vidc_ctrl_deinit(struct msm_vidc_inst *inst) +{ + if (!inst) { + d_vpr_e("%s: invalid parameters\n", __func__); + return -EINVAL; + } + + v4l2_ctrl_handler_free(&inst->ctrl_handler); + kfree(inst->ctrls); + + return 0; +} + int msm_vidc_ctrl_init(struct msm_vidc_inst *inst) { int rc = 0; @@ -279,7 +336,8 @@ int msm_vidc_ctrl_init(struct msm_vidc_inst *inst) num_ctrls++; } if (!num_ctrls) { - s_vpr_e(inst->sid, "%s: failed to allocate ctrl\n", __func__); + s_vpr_e(inst->sid, "%s: no ctrls available in cap database\n", + __func__); return -EINVAL; } inst->ctrls = kcalloc(num_ctrls, @@ -346,7 +404,7 @@ int msm_vidc_ctrl_init(struct msm_vidc_inst *inst) ctrl_cfg.name = msm_vidc_get_priv_ctrl_name(inst->sid, capability->cap[idx].v4l2_id); if (!ctrl_cfg.name) { - s_vpr_e(inst->sid, "%s: invalid control, %#x\n", + s_vpr_e(inst->sid, "%s: %#x ctrl name is null\n", __func__, ctrl_cfg.id); return -EINVAL; } @@ -492,7 +550,7 @@ int msm_vidc_adjust_entropy_mode(void *instance, struct v4l2_ctrl *ctrl) s32 adjusted_value; enum msm_vidc_inst_capability_type parent_id; struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - s32 codec = -1, profile = -1; + s32 profile = -1; if (!inst || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); @@ -511,31 +569,29 @@ int msm_vidc_adjust_entropy_mode(void *instance, struct v4l2_ctrl *ctrl) while (i < MAX_CAP_PARENTS && capability->cap[ENTROPY_MODE].parents[i]) { parent_id = capability->cap[ENTROPY_MODE].parents[i]; - if (parent_id == CODEC) - codec = inst->codec; - else if (parent_id == profile) + if (parent_id == PROFILE) profile = capability->cap[PROFILE].value; else s_vpr_e(inst->sid, "%s: invalid parent %d\n", __func__, parent_id); + i++; } - if (codec == -1 || profile == -1) { + if (profile == -1) { s_vpr_e(inst->sid, "%s: missing parents %d %d\n", - __func__, codec, profile); + __func__, profile); return 0; } - if (codec == MSM_VIDC_H264 && - (profile == V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE || + if ((profile == V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE || profile == V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_BASELINE) && adjusted_value == V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC) adjusted_value = V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC; if (capability->cap[ENTROPY_MODE].value != adjusted_value) { - s_vpr_h(inst->sid, "%s: adjusted from %#x to %#x\n", __func__, + s_vpr_h(inst->sid, "%s: updated from %#x to adjusted %#x\n", __func__, capability->cap[ENTROPY_MODE].value, adjusted_value); capability->cap[ENTROPY_MODE].value = adjusted_value; } @@ -543,6 +599,50 @@ int msm_vidc_adjust_entropy_mode(void *instance, struct v4l2_ctrl *ctrl) return rc; } +int msm_vidc_adjust_ltr_count(void *instance, struct v4l2_ctrl *ctrl) +{ + int rc = 0; + int i = 0; + struct msm_vidc_inst_capability *capability; + s32 adjusted_value; + enum msm_vidc_inst_capability_type parent_id; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + s32 rc_type = -1; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + if (ctrl) + adjusted_value = ctrl->val; + else + adjusted_value = capability->cap[LTR_COUNT].value; + + /* check parents and adjust cabac session value */ + while (i < MAX_CAP_PARENTS && + capability->cap[LTR_COUNT].parents[i]) { + parent_id = capability->cap[LTR_COUNT].parents[i]; + i++; + } + + if (!(rc_type == V4L2_MPEG_VIDEO_BITRATE_MODE_CBR + /* TODO(AS): remove comment after below rc modes are upstreamed + || rc_type == RATE_CONTROL_OFF || + || rc_tpe == V4L2_MPEG_VIDEO_BITRATE_MODE_CBR_VFR + */)) + adjusted_value = 0; + + if (capability->cap[LTR_COUNT].value != adjusted_value) { + s_vpr_h(inst->sid, "%s: adjusted from %#x to %#x\n", __func__, + capability->cap[LTR_COUNT].value, adjusted_value); + capability->cap[LTR_COUNT].value = adjusted_value; + } + + return rc; +} + int msm_vidc_adjust_bitrate(void *instance, struct v4l2_ctrl *ctrl) { int rc = 0; diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 25b548375c..7f04852400 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -1280,8 +1280,8 @@ int msm_vidc_get_inst_capability(struct msm_vidc_inst *inst) if (core->inst_caps[i].domain == inst->domain && core->inst_caps[i].codec == inst->codec) { s_vpr_h(inst->sid, - "%s: copied capabilities with %#x codec\n", - __func__, inst->codec); + "%s: copied capabilities with %#x codec, %#x domain\n", + __func__, inst->codec, inst->domain); memcpy(inst->capabilities, &core->inst_caps[i], sizeof(struct msm_vidc_inst_capability)); } diff --git a/include/uapi/vidc/media/v4l2_vidc_extensions.h b/include/uapi/vidc/media/v4l2_vidc_extensions.h index 1b5fd9c8cd..5aad9c2b9d 100644 --- a/include/uapi/vidc/media/v4l2_vidc_extensions.h +++ b/include/uapi/vidc/media/v4l2_vidc_extensions.h @@ -29,14 +29,15 @@ /* vendor controls start */ #define V4L2_CID_MPEG_VIDC_BASE (V4L2_CTRL_CLASS_MPEG | 0x2000) +#define V4L2_MPEG_MSM_VIDC_DISABLE 0 +#define V4L2_MPEG_MSM_VIDC_ENABLE 1 + #define V4L2_CID_MPEG_VIDC_SECURE (V4L2_CID_MPEG_VIDC_BASE + 0x1) /* HEIC encoder and decoder */ #define V4L2_CID_MPEG_VIDC_HEIC (V4L2_CID_MPEG_VIDC_BASE + 0x2) #define V4L2_CID_MPEG_VIDC_LOWLATENCY_REQUEST (V4L2_CID_MPEG_VIDC_BASE + 0x3) /* FIXme: */ #define V4L2_CID_MPEG_VIDC_CODEC_CONFIG (V4L2_CID_MPEG_VIDC_BASE + 0x4) -/* thumbnail decoding */ -#define V4L2_CID_MPEG_VIDC_THUMBNAIL_MODE (V4L2_CID_MPEG_VIDC_BASE + 0x4) /* B frame min/max qp */ #define V4L2_CID_MPEG_VIDC_B_FRAME_MIN_QP (V4L2_CID_MPEG_VIDC_BASE + 0x5) #define V4L2_CID_MPEG_VIDC_B_FRAME_MAX_QP (V4L2_CID_MPEG_VIDC_BASE + 0x6) From 9b4556df590dfc7fe22a1b92a8ab284106f9f83f Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Thu, 29 Oct 2020 12:45:19 -0700 Subject: [PATCH 0024/1061] driver: video: port settings changes updated hfi command, property header files. deleted hfi definition header file. added new input and output properties for decoder. added profile, level and tier properties as part of port settings subscription. Change-Id: I072d0bb56183950920975950b3873003218d526e Signed-off-by: Darshana Patil --- driver/platform/waipio/src/msm_vidc_waipio.c | 11 + driver/vidc/inc/hfi_command.h | 127 ++-- driver/vidc/inc/hfi_definition.h | 30 - driver/vidc/inc/hfi_packet.h | 1 - driver/vidc/inc/hfi_property.h | 214 ++++--- driver/vidc/inc/msm_vidc_internal.h | 11 +- driver/vidc/src/hfi_packet.c | 2 +- driver/vidc/src/msm_vdec.c | 630 +++++++++++++------ driver/vidc/src/msm_venc.c | 69 +- driver/vidc/src/msm_vidc_control.c | 2 +- driver/vidc/src/venus_hfi_response.c | 36 +- 11 files changed, 686 insertions(+), 447 deletions(-) delete mode 100644 driver/vidc/inc/hfi_definition.h diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 769f2a7e5c..a235701a4e 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -17,6 +17,7 @@ #define DDR_TYPE_LPDDR4X 0x7 #define DDR_TYPE_LPDDR5 0x8 #define DDR_TYPE_LPDDR5X 0x9 +#define DEFAULT_VIDEO_CONCEAL_COLOR_BLACK 0x8020010 #define UBWC_CONFIG(mco, mlo, hbo, bslo, bso, rs, mc, ml, hbb, bsl, bsp) \ { \ @@ -894,6 +895,16 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {0}, {ENTROPY_MODE}, NULL, msm_vidc_set_u32}, + + /* conceal color */ + {CONCEAL_COLOR_8BIT, DEC, CODECS_ALL, 0x0, 0xff3fcff, 1, + DEFAULT_VIDEO_CONCEAL_COLOR_BLACK, + V4L2_CID_MPEG_VIDEO_MUTE_YUV, + HFI_PROP_CONCEAL_COLOR_8BIT}, + {CONCEAL_COLOR_10BIT, DEC, CODECS_ALL, 0x0, 0x3fffffff, 1, + DEFAULT_VIDEO_CONCEAL_COLOR_BLACK, + V4L2_CID_MPEG_VIDEO_MUTE_YUV, + HFI_PROP_CONCEAL_COLOR_10BIT}, }; /* diff --git a/driver/vidc/inc/hfi_command.h b/driver/vidc/inc/hfi_command.h index 058819bff3..e67fd819c5 100644 --- a/driver/vidc/inc/hfi_command.h +++ b/driver/vidc/inc/hfi_command.h @@ -9,7 +9,7 @@ #include #include -#define HFI_VIDEO_ARCH_OX 0x1 +#define HFI_VIDEO_ARCH_LX 0x1 struct hfi_header { u32 size; @@ -43,19 +43,24 @@ struct hfi_buffer { }; enum hfi_packet_host_flags { - HFI_HOST_FLAGS_NONE = 0, - HFI_HOST_FLAGS_INTR_REQUIRED = BIT(0), - HFI_HOST_FLAGS_RESPONSE_REQUIRED = BIT(1), - HFI_HOST_FLAGS_NON_DISCARDABLE = BIT(2), - HFI_HOST_FLAGS_GET_PROPERTY = BIT(3), + HFI_HOST_FLAGS_NONE = 0x00000000, + HFI_HOST_FLAGS_INTR_REQUIRED = 0x00000001, + HFI_HOST_FLAGS_RESPONSE_REQUIRED = 0x00000002, + HFI_HOST_FLAGS_NON_DISCARDABLE = 0x00000004, + HFI_HOST_FLAGS_GET_PROPERTY = 0x00000008, + HFI_HOST_FLAGS_CB_NON_SECURE = 0x00000010, + HFI_HOST_FLAGS_CB_SECURE_PIXEL = 0x00000020, + HFI_HOST_FLAGS_CB_SECURE_BITSTREAM = 0x00000040, + HFI_HOST_FLAGS_CB_SECURE_NON_PIXEL = 0x00000080, + HFI_HOST_FLAGS_CB_NON_SECURE_PIXEL = 0x00000100, }; enum hfi_packet_firmware_flags { - HFI_FW_FLAGS_NONE = 0, - HFI_FW_FLAGS_SUCCESS = BIT(0), - HFI_FW_FLAGS_INFORMATION = BIT(1), - HFI_FW_FLAGS_SESSION_ERROR = BIT(2), - HFI_FW_FLAGS_SYSTEM_ERROR = BIT(3), + HFI_FW_FLAGS_NONE = 0x00000000, + HFI_FW_FLAGS_SUCCESS = 0x00000001, + HFI_FW_FLAGS_INFORMATION = 0x00000002, + HFI_FW_FLAGS_SESSION_ERROR = 0x00000004, + HFI_FW_FLAGS_SYSTEM_ERROR = 0x00000008, }; enum hfi_packet_payload_info { @@ -72,52 +77,49 @@ enum hfi_packet_payload_info { HFI_PAYLOAD_32_PACKED = 0x0000000a, HFI_PAYLOAD_U32_ARRAY = 0x0000000b, HFI_PAYLOAD_S32_ARRAY = 0x0000000c, + HFI_PAYLOAD_64_PACKED = 0x0000000d, }; enum hfi_packet_port_type { - HFI_PORT_NONE = 0, - HFI_PORT_BITSTREAM = BIT(0), - HFI_PORT_RAW = BIT(1), + HFI_PORT_NONE = 0x00000000, + HFI_PORT_BITSTREAM = 0x00000001, + HFI_PORT_RAW = 0x00000002, }; enum hfi_buffer_type { HFI_BUFFER_BITSTREAM = 0x00000001, HFI_BUFFER_RAW = 0x00000002, HFI_BUFFER_METADATA = 0x00000003, - HFI_BUFFER_DPB = 0x00000004, - HFI_BUFFER_BIN = 0x00000005, - HFI_BUFFER_LINE = 0x00000006, - HFI_BUFFER_ARP = 0x00000007, - HFI_BUFFER_COMV = 0x00000008, - HFI_BUFFER_NON_COMV = 0x00000009, - HFI_BUFFER_PERSIST = 0x0000000A, - HFI_BUFFER_SUBCACHE = 0x0000000B, - HFI_BUFFER_SFR = 0x0000000C, + HFI_BUFFER_SUBCACHE = 0x00000004, + HFI_BUFFER_SFR = 0x00000005, + HFI_BUFFER_DPB = 0x00000006, + HFI_BUFFER_BIN = 0x00000007, + HFI_BUFFER_LINE = 0x00000008, + HFI_BUFFER_ARP = 0x00000009, + HFI_BUFFER_COMV = 0x0000000A, + HFI_BUFFER_NON_COMV = 0x0000000B, + HFI_BUFFER_PERSIST = 0x0000000C, + HFI_BUFFER_VPSS = 0x0000000D, }; enum hfi_buffer_host_flags { - HFI_BUF_HOST_FLAG_NONE = 0, - HFI_BUF_HOST_FLAG_RELEASE = BIT(0), - HFI_BUF_HOST_FLAG_READONLY = BIT(1), - HFI_BUF_HOST_FLAG_CODEC_CONFIG = BIT(2), + HFI_BUF_HOST_FLAG_NONE = 0x00000000, + HFI_BUF_HOST_FLAG_RELEASE = 0x00000001, + HFI_BUF_HOST_FLAG_READONLY = 0x00000002, + HFI_BUF_HOST_FLAG_CODEC_CONFIG = 0x00000004, }; enum hfi_buffer_firmware_flags { - HFI_BUF_FW_FLAG_NONE = 0, - HFI_BUF_FW_FLAG_LAST = BIT(0), - HFI_BUF_FW_FLAG_READONLY = BIT(1), - HFI_BUF_FW_FLAG_CODEC_CONFIG = BIT(2), - // TODO - HFI_BUF_FW_FLAG_SUBFRAME = BIT(3), - HFI_BUF_FW_FLAG_KEYFRAME = BIT(4), - HFI_BUF_FW_FLAG_CORRUPT = BIT(28), - HFI_BUF_FW_FLAG_UNSUPPORTED = BIT(29), + HFI_BUF_FW_FLAG_NONE = 0x00000000, + HFI_BUF_FW_FLAG_LAST = 0x00000001, + HFI_BUF_FW_FLAG_READONLY = 0x00000002, + HFI_BUF_FW_FLAG_CODEC_CONFIG = 0x00000004, }; enum hfi_metapayload_header_flags { - HFI_METADATA_FLAGS_NONE = 0, - HFI_METADATA_FLAGS_TOP_FIELD = BIT(0), - HFI_METADATA_FLAGS_BOTTOM_FIELDS = BIT(1), + HFI_METADATA_FLAGS_NONE = 0x00000000, + HFI_METADATA_FLAGS_TOP_FIELD = 0x00000001, + HFI_METADATA_FLAGS_BOTTOM_FIELD = 0x00000002, }; struct metabuf_header { @@ -137,25 +139,36 @@ struct metapayload_header { }; enum hfi_property_mode_type { - HFI_MODE_NONE = 0, - HFI_MODE_PORT_SETTINGS_CHANGE = BIT(0), - HFI_MODE_PROPERTY = BIT(1), - HFI_MODE_METADATA = BIT(2), + HFI_MODE_NONE = 0x00000000, + HFI_MODE_PORT_SETTINGS_CHANGE = 0x00000001, + HFI_MODE_PROPERTY = 0x00000002, + HFI_MODE_METADATA = 0x00000004, }; -#define HFI_CMD_BEGIN 0x0 -#define HFI_CMD_INIT 0x1 -#define HFI_CMD_POWER_COLLAPSE 0x2 -#define HFI_CMD_OPEN 0x3 -#define HFI_CMD_CLOSE 0x4 -#define HFI_CMD_START 0x5 -#define HFI_CMD_STOP 0x6 -#define HFI_CMD_DRAIN 0x7 -#define HFI_CMD_RESUME 0x8 -#define HFI_CMD_BUFFER 0x9 -#define HFI_CMD_DELIVERY_MODE 0xA -#define HFI_CMD_SUBSCRIBE_MODE 0xB -#define HFI_CMD_SETTINGS_CHANGE 0xC -#define HFI_CMD_END 0xD +#define HFI_CMD_BEGIN 0x01000000 +#define HFI_CMD_INIT 0x01000001 +#define HFI_CMD_POWER_COLLAPSE 0x01000002 +#define HFI_CMD_OPEN 0x01000003 +#define HFI_CMD_CLOSE 0x01000004 +#define HFI_CMD_START 0x01000005 +#define HFI_CMD_STOP 0x01000006 +#define HFI_CMD_DRAIN 0x01000007 +#define HFI_CMD_RESUME 0x01000008 +#define HFI_CMD_BUFFER 0x01000009 +#define HFI_CMD_DELIVERY_MODE 0x0100000A +#define HFI_CMD_SUBSCRIBE_MODE 0x0100000B +#define HFI_CMD_SETTINGS_CHANGE 0x0100000C + +#define HFI_SSR_TYPE_SW_ERR_FATAL 0x1 +#define HFI_SSR_TYPE_SW_DIV_BY_ZERO 0x2 +#define HFI_SSR_TYPE_HW_WDOG_IRQ 0x3 +#define HFI_SSR_TYPE_NOC_ERROR 0x4 +#define HFI_SSR_TYPE_VCODEC_HUNG 0x5 + +#define HFI_BITMASK_SSR_SUB_CLIENT_ID 0x000000f0 +#define HFI_BITMASK_SSR_TYPE 0x0000000f +#define HFI_CMD_SSR 0x0100000D + +#define HFI_CMD_END 0x01FFFFFF #endif //__H_HFI_COMMAND_H__ diff --git a/driver/vidc/inc/hfi_definition.h b/driver/vidc/inc/hfi_definition.h deleted file mode 100644 index 0824541fed..0000000000 --- a/driver/vidc/inc/hfi_definition.h +++ /dev/null @@ -1,30 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * Copyright (c) 2012-2021, The Linux Foundation. All rights reserved. - */ - -#ifndef __H_HFI_DEFINITION_H__ -#define __H_HFI_DEFINITION_H__ - -typedef u8 HFI_U8; -typedef s8 HFI_S8; -typedef u16 HFI_U16; -typedef s16 HFI_S16; -typedef u32 HFI_U32; -typedef s32 HFI_S32; -typedef u64 HFI_U64; - -typedef HFI_U32 HFI_BOOL; -#define HFI_FALSE 0 -#define HFI_TRUE (!HFI_FALSE) - -typedef HFI_U32 HFI_STATUS; -#define HFI_FAIL 0 -#define HFI_SUCCESS 1 - -#define HFI_ALIGN(a, b) (((b) & ((b) - 1)) ? \ - (((a) + (b) - 1) / (b) * (b)) : \ - (((a) + (b) - 1) & (~((b) - 1)))) - -#endif // __H_HFI_DEFINITION_H__ - diff --git a/driver/vidc/inc/hfi_packet.h b/driver/vidc/inc/hfi_packet.h index 843806b727..e1c9cbee10 100644 --- a/driver/vidc/inc/hfi_packet.h +++ b/driver/vidc/inc/hfi_packet.h @@ -11,7 +11,6 @@ #include "msm_vidc_core.h" #include "hfi_command.h" #include "hfi_property.h" -#include "hfi_definition.h" u32 get_hfi_port(struct msm_vidc_inst *inst, enum msm_vidc_port_type port); diff --git a/driver/vidc/inc/hfi_property.h b/driver/vidc/inc/hfi_property.h index 9a5e2cd4c1..74a5e8b20d 100644 --- a/driver/vidc/inc/hfi_property.h +++ b/driver/vidc/inc/hfi_property.h @@ -18,21 +18,27 @@ #define HFI_PROP_UBWC_BANK_SPREADING 0x03000009 enum hfi_debug_config { - HFI_DEBUG_CONFIG_DEFAULT = 0, - HFI_DEBUG_CONFIG_CLRDBGQ = BIT(0), - HFI_DEBUG_CONFIG_WFI = BIT(1), - HFI_DEBUG_CONFIG_ARM9WD = BIT(2), + HFI_DEBUG_CONFIG_DEFAULT = 0x00000000, + HFI_DEBUG_CONFIG_CLRDBGQ = 0x00000001, + HFI_DEBUG_CONFIG_WFI = 0x00000002, + HFI_DEBUG_CONFIG_ARM9WD = 0x00000004, }; #define HFI_PROP_DEBUG_CONFIG 0x0300000a enum hfi_debug_log_level { - HFI_DEBUG_LOG_NONE = 0, - HFI_DEBUG_LOG_ERROR = BIT(0), - HFI_DEBUG_LOG_FATAL = BIT(1), - HFI_DEBUG_LOG_PERF = BIT(2), - HFI_DEBUG_LOG_HIGH = BIT(3), - HFI_DEBUG_LOG_MEDIUM = BIT(4), - HFI_DEBUG_LOG_LOW = BIT(5), + HFI_DEBUG_LOG_NONE = 0x00000000, + HFI_DEBUG_LOG_ERROR = 0x00000001, + HFI_DEBUG_LOG_FATAL = 0x00000002, + HFI_DEBUG_LOG_PERF = 0x00000004, + HFI_DEBUG_LOG_HIGH = 0x00000008, + HFI_DEBUG_LOG_MEDIUM = 0x00000010, + HFI_DEBUG_LOG_LOW = 0x00000020, +}; + +struct hfi_debug_header { + u32 size; + u32 debug_level; + u32 reserved[2]; }; #define HFI_PROP_DEBUG_LOG_LEVEL 0x0300000b @@ -60,17 +66,19 @@ enum hfi_color_format { #define HFI_PROP_SECURE 0x03000102 -#define HFI_BITMASK_ALIGN_WIDTH 0xffff0000 -#define HFI_BITMASK_ALIGN_HEIGHT 0x0000ffff -#define HFI_PROP_ALIGN_RESOLUTION 0x03000103 +#define HFI_BITMASK_BITSTREAM_WIDTH 0xffff0000 +#define HFI_BITMASK_BITSTREAM_HEIGHT 0x0000ffff +#define HFI_PROP_BITSTREAM_RESOLUTION 0x03000103 -#define HFI_BITMASK_CROP_WIDTH 0xffff0000 -#define HFI_BITMASK_CROP_HEIGHT 0x0000ffff -#define HFI_PROP_CROP_RESOLUTION 0x03000104 +#define HFI_BITMASK_LINEAR_STRIDE 0xffff0000 +#define HFI_BITMASK_LINEAR_SCANLINE 0x0000ffff +#define HFI_PROP_LINEAR_STRIDE_SCANLINE 0x03000104 -#define HFI_BITMASK_FRAME_COORDINATE_TOP 0xffff0000 -#define HFI_BITMASK_FRAME_COORDINATE_LEFT 0x0000ffff -#define HFI_PROP_CROP_COORDINATE_TOP_LEFT 0x03000105 +#define HFI_BITMASK_CROP_RIGHT_OFFSET 0xffff0000 +#define HFI_BITMASK_CROP_BOTTOM_OFFSET 0x0000ffff +#define HFI_BITMASK_CROP_LEFT_OFFSET 0xffff0000 +#define HFI_BITMASK_CROP_TOP_OFFSET 0x0000ffff +#define HFI_PROP_CROP_OFFSETS 0x03000105 #define HFI_PROP_REALTIME 0x03000106 @@ -83,9 +91,9 @@ enum hfi_avc_profile_type { }; enum hfi_hevc_profile_type { - HFI_HEVC_HEVC_PROFILE_MAIN = 0, - HFI_HEVC_PROFILE_MAIN_STILL_PICTURE = 1, - HFI_HEVC_PROFILE_MAIN_10 = 2, + HFI_H265_PROFILE_MAIN = 0, + HFI_H265_PROFILE_MAIN_STILL_PICTURE = 1, + HFI_H265_PROFILE_MAIN_10 = 2, }; enum hfi_vp9_profile_type { @@ -96,8 +104,8 @@ enum hfi_vp9_profile_type { }; enum hfi_mpeg2_profile_type { - HFI_MPEG2_PROFILE_SIMPLE = 0, - HFI_MPEG2_PROFILE_MAIN = 1, + HFI_MP2_PROFILE_SIMPLE = 0, + HFI_MP2_PROFILE_MAIN = 1, }; #define HFI_PROP_PROFILE 0x03000107 @@ -126,53 +134,52 @@ enum hfi_avc_level_type { }; enum hfi_hevc_level_type { - HFI_HEVC_LEVEL_1 = 0, - HFI_HEVC_LEVEL_2 = 1, - HFI_HEVC_LEVEL_2_1 = 2, - HFI_HEVC_LEVEL_3 = 3, - HFI_HEVC_LEVEL_3_1 = 4, - HFI_HEVC_LEVEL_4 = 5, - HFI_HEVC_LEVEL_4_1 = 6, - HFI_HEVC_LEVEL_5 = 7, - HFI_HEVC_LEVEL_5_1 = 8, - HFI_HEVC_LEVEL_5_2 = 9, - HFI_HEVC_LEVEL_6 = 10, - HFI_HEVC_LEVEL_6_1 = 11, - HFI_HEVC_LEVEL_6_2 = 12, + HFI_H265_LEVEL_1 = 0, + HFI_H265_LEVEL_2 = 1, + HFI_H265_LEVEL_2_1 = 2, + HFI_H265_LEVEL_3 = 3, + HFI_H265_LEVEL_3_1 = 4, + HFI_H265_LEVEL_4 = 5, + HFI_H265_LEVEL_4_1 = 6, + HFI_H265_LEVEL_5 = 7, + HFI_H265_LEVEL_5_1 = 8, + HFI_H265_LEVEL_5_2 = 9, + HFI_H265_LEVEL_6 = 10, + HFI_H265_LEVEL_6_1 = 11, + HFI_H265_LEVEL_6_2 = 12, }; enum hfi_vp9_level_type { - HFI_VP9_LEVEL_1 = 0, - HFI_VP9_LEVEL_11 = 1, - HFI_VP9_LEVEL_2 = 2, - HFI_VP9_LEVEL_21 = 3, - HFI_VP9_LEVEL_3 = 4, - HFI_VP9_LEVEL_31 = 5, - HFI_VP9_LEVEL_4 = 6, - HFI_VP9_LEVEL_41 = 7, - HFI_VP9_LEVEL_5 = 8, - HFI_VP9_LEVEL_51 = 9, - HFI_VP9_LEVEL_6 = 10, - HFI_VP9_LEVEL_61 = 11, + HFI_VP9_LEVEL_1_0 = 0, + HFI_VP9_LEVEL_1_1 = 1, + HFI_VP9_LEVEL_2_0 = 2, + HFI_VP9_LEVEL_2_1 = 3, + HFI_VP9_LEVEL_3_0 = 4, + HFI_VP9_LEVEL_3_1 = 5, + HFI_VP9_LEVEL_4_0 = 6, + HFI_VP9_LEVEL_4_1 = 7, + HFI_VP9_LEVEL_5_0 = 8, + HFI_VP9_LEVEL_5_1 = 9, + HFI_VP9_LEVEL_6_0 = 10, + HFI_VP9_LEVEL_6_1 = 11, }; enum hfi_mpeg2_level_type { - HFI_MPEG2_LEVEL_LOW = 0, - HFI_MPEG2_LEVEL_MAIN = 1, - HFI_MPEG2_LEVEL_HIGH_1440 = 2, - HFI_MPEG2_LEVEL_HIGH = 3, + HFI_MP2_LEVEL_LOW = 0, + HFI_MP2_LEVEL_MAIN = 1, + HFI_MP2_LEVEL_HIGH_1440 = 2, + HFI_MP2_LEVEL_HIGH = 3, }; enum hfi_codec_level_type { - HFI_LEVEL_UNKNOWN = 0xFFFFFFFF, + HFI_LEVEL_NONE = 0xFFFFFFFF, }; #define HFI_PROP_LEVEL 0x03000108 - enum hfi_hevc_tier_type { - HFI_HEVC_TIER_MAIN = 0, - HFI_HEVC_TIER_HIGH = 1, + HFI_H265_TIER_MAIN = 0, + HFI_H265_TIER_HIGH = 1, }; #define HFI_PROP_TIER 0x03000109 @@ -212,24 +219,25 @@ enum hfi_hevc_tier_type { #define HFI_PROP_BUFFER_MAX_NUM_REFERENCE 0x03000126 -#define HFI_PROP_BUFFER_VUI_RESTRICTION 0x03000127 +#define HFI_PROP_MAX_NUM_REORDER_FRAMES 0x03000127 #define HFI_PROP_PIC_ORDER_CNT_TYPE 0x03000128 enum hfi_deblock_mode { - HFI_DB_MODE_DISABLE = 0, - HFI_DB_MODE_SKIP_SLICE_BOUNDARY = BIT(0), - HFI_DB_MODE_ALL_BOUNDARY = BIT(1), + HFI_DEBLOCK_ALL_BOUNDARY = 0x0, + HFI_DEBLOCK_DISABLE = 0x1, + HFI_DEBLOCK_DISABLE_AT_SLICE_BOUNDARY = 0x2, }; #define HFI_PROP_DEBLOCKING_MODE 0x03000129 enum hfi_rate_control { - HFI_RC_OFF = 0x00000000, - HFI_RC_VBR_CFR = 0x00000001, - HFI_RC_CBR_CFR = 0x00000002, - HFI_RC_CBR_VFR = 0x00000003, - HFI_RC_CQ = 0x00000004, - HFI_RC_LOSSLESS = 0x00000005, + HFI_RC_VBR_CFR = 0x00000000, + HFI_RC_CBR_CFR = 0x00000001, + HFI_RC_CQ = 0x00000002, + HFI_RC_OFF = 0x00000003, + HFI_RC_CBR_VFR = 0x00000004, + HFI_RC_LOSSLESS = 0x00000005, + HFI_RC_CBR_VFR_LEGACY = 0x00000006, }; #define HFI_PROP_RATE_CONTROL 0x0300012a @@ -267,7 +275,7 @@ enum hfi_rate_control { enum hfi_layer_encoding_type { HFI_HIER_P_SLIDING_WINDOW = 0x1, HFI_HIER_P_HYBRID_LTR = 0x2, - HFI_HIER_B = 0x4, + HFI_HIER_B = 0x3, }; #define HFI_PROP_LAYER_ENCODING_TYPE 0x03000138 @@ -304,16 +312,16 @@ enum hfi_layer_encoding_type { #define HFI_PROP_MAX_B_FRAMES 0x03000147 enum hfi_quality_mode { - HFI_MODE_MAX_QUALITY = BIT(0), - HFI_MODE_POWER_SAVE = BIT(1), + HFI_MODE_MAX_QUALITY = 0x1, + HFI_MODE_POWER_SAVE = 0x2, }; #define HFI_PROP_QUALITY_MODE 0x03000148 enum hfi_seq_header_mode { - HFI_SEQ_HEADER_SEPERATE_FRAME = BIT(0), - HFI_SEQ_HEADER_JOINED_WITH_1ST_FRAME = BIT(1), - HFI_SEQ_HEADER_PREFIX_WITH_SYNC_FRAME = BIT(2), - HFI_SEQ_HEADER_METADATA = BIT(3), + HFI_SEQ_HEADER_SEPERATE_FRAME = 0x00000001, + HFI_SEQ_HEADER_JOINED_WITH_1ST_FRAME = 0x00000002, + HFI_SEQ_HEADER_PREFIX_WITH_SYNC_FRAME = 0x00000004, + HFI_SEQ_HEADER_METADATA = 0x00000008, }; #define HFI_PROP_SEQ_HEADER_MODE 0x03000149 @@ -328,18 +336,18 @@ enum hfi_rotation { #define HFI_PROP_ROTATION 0x0300014b enum hfi_flip { - HFI_FLIP_NONE = 0, - HFI_FLIP_HORIZONTAL = BIT(0), - HFI_FLIP_VERTICAL = BIT(1), + HFI_DISABLE_FLIP = 0x00000000, + HFI_HORIZONTAL_FLIP = 0x00000001, + HFI_VERTICAL_FLIP = 0x00000002, }; #define HFI_PROP_FLIP 0x0300014c #define HFI_PROP_SCALAR 0x0300014d enum hfi_blur_types { - HFI_BLUR_NONE = 0, - HFI_BLUR_EXTERNAL = BIT(0), - HFI_BLUR_ADAPTIVE = BIT(1), + HFI_BLUR_NONE = 0x00000000, + HFI_BLUR_EXTERNAL = 0x00000001, + HFI_BLUR_ADAPTIVE = 0x00000002, }; #define HFI_PROP_BLUR_TYPES 0x0300014e @@ -354,8 +362,6 @@ enum hfi_blur_types { #define HFI_PROP_AUD 0x03000151 -#define HFI_PROP_VUI_TIMING_INFO 0x03000152 - #define HFI_PROP_DPB_LUMA_CHROMA_MISR 0x03000153 #define HFI_PROP_OPB_LUMA_CHROMA_MISR 0x03000154 @@ -368,13 +374,13 @@ enum hfi_blur_types { #define HFI_PROP_SIGNAL_COLOR_INFO 0x03000155 enum hfi_interlace_info { - HFI_INTERLACE_INFO_NONE = 0, - HFI_FRAME_PROGRESSIVE = BIT(0), - HFI_FRAME_MBAFF = BIT(1), - HFI_FRAME_INTERLEAVE_TOPFIELD_FIRST = BIT(2), - HFI_FRAME_INTERLEAVE_BOTTOMFIELD_FIRST = BIT(3), - HFI_FRAME_INTERLACE_TOPFIELD_FIRST = BIT(4), - HFI_FRAME_INTERLACE_BOTTOMFIELD_FIRST = BIT(5), + HFI_INTERLACE_INFO_NONE = 0x00000000, + HFI_FRAME_PROGRESSIVE = 0x00000001, + HFI_FRAME_MBAFF = 0x00000002, + HFI_FRAME_INTERLEAVE_TOPFIELD_FIRST = 0x00000004, + HFI_FRAME_INTERLEAVE_BOTTOMFIELD_FIRST = 0x00000008, + HFI_FRAME_INTERLACE_TOPFIELD_FIRST = 0x00000010, + HFI_FRAME_INTERLACE_BOTTOMFIELD_FIRST = 0x00000020, }; #define HFI_PROP_INTERLACE_INFO 0x03000156 @@ -403,12 +409,12 @@ enum hfi_interlace_info { #define HFI_PROP_HISTOGRAM_INFO 0x03000161 enum hfi_picture_type { - HFI_PICTURE_TYPE_IDR = BIT(0), - HFI_PICTURE_TYPE_P = BIT(1), - HFI_PICTURE_TYPE_B = BIT(2), - HFI_PICTURE_TYPE_I = BIT(3), - HFI_PICTURE_TYPE_CRA = BIT(4), - HFI_PICTURE_TYPE_BLA = BIT(5), + HFI_PICTURE_IDR = 0x00000001, + HFI_PICTURE_P = 0x00000002, + HFI_PICTURE_B = 0x00000004, + HFI_PICTURE_I = 0x00000008, + HFI_PICTURE_CRA = 0x00000010, + HFI_PICTURE_BLA = 0x00000020, }; #define HFI_PROP_PICTURE_TYPE 0x03000162 @@ -420,13 +426,13 @@ enum hfi_picture_type { #define HFI_PROP_SEI_STREAM_USERDATA 0x03000166 -#define HFI_PROP_CVP_STAT_INFO 0x03000167 +#define HFI_PROP_EVA_STAT_INFO 0x03000167 #define HFI_PROP_DEC_DEFAULT_HEADER 0x03000168 #define HFI_PROP_DEC_START_FROM_RAP_FRAME 0x03000169 -#define HFI_PROP_TAG_NOT_PROPAGATED_TO_OUTPUT 0x0300016a +#define HFI_PROP_NO_OUTPUT 0x0300016a #define HFI_PROP_BUFFER_TAG 0x0300016b @@ -454,7 +460,13 @@ enum hfi_picture_type { #define HFI_ERROR_MAX_SESSIONS 0x04000002 -#define HFI_ERROR_UNSUPPORTED 0x04000003 +#define HFI_ERROR_FATAL 0x04000003 + +#define HFI_ERROR_INVALID_STATE 0x04000004 + +#define HFI_ERROR_INSUFFICIENT_RESOURCES 0x04000005 + +#define HFI_ERROR_BUFFER_NOT_SET 0x04000006 #define HFI_SESSION_ERROR_END 0x04FFFFFF @@ -464,13 +476,15 @@ enum hfi_picture_type { #define HFI_SYS_ERROR_NOC 0x05000002 +#define HFI_SYS_ERROR_FATAL 0x05000003 + #define HFI_SYSTEM_ERROR_END 0x05FFFFFF #define HFI_INFORMATION_BEGIN 0x06000000 #define HFI_INFO_UNSUPPORTED 0x06000001 -#define HFI_INFO_BITSTREAM_CORRUPT 0x06000002 +#define HFI_INFO_DATA_CORRUPT 0x06000002 #define HFI_INFORMATION_END 0x06FFFFFF diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 32746533bf..ef82e1c20a 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -321,6 +321,8 @@ enum msm_vidc_inst_capability_type { CHROMA_QP_INDEX_OFFSET, DISPLAY_DELAY_ENABLE, DISPLAY_DELAY, + CONCEAL_COLOR_8BIT, + CONCEAL_COLOR_10BIT, INST_CAP_MAX, }; @@ -525,8 +527,8 @@ struct msm_vidc_color_info { }; struct msm_vidc_crop { - u32 x; - u32 y; + u32 left; + u32 top; u32 width; u32 height; }; @@ -534,11 +536,6 @@ struct msm_vidc_crop { struct msm_vidc_properties { u32 frame_rate; u32 operating_rate; - u32 bit_rate; - u32 profile; - u32 level; - u32 entropy_mode; - u32 rc_type; }; struct msm_vidc_subscription_params { diff --git a/driver/vidc/src/hfi_packet.c b/driver/vidc/src/hfi_packet.c index c20fbac758..a5647b29fb 100644 --- a/driver/vidc/src/hfi_packet.c +++ b/driver/vidc/src/hfi_packet.c @@ -313,7 +313,7 @@ int hfi_packet_sys_init(struct msm_vidc_core *core, goto err_sys_init; /* HFI_CMD_SYSTEM_INIT */ - payload = HFI_VIDEO_ARCH_OX; + payload = HFI_VIDEO_ARCH_LX; rc = hfi_create_packet(pkt, pkt_size, HFI_CMD_INIT, (HFI_HOST_FLAGS_RESPONSE_REQUIRED | diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index fdc8f10b4f..8aa069defb 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -14,23 +14,26 @@ #include "msm_vidc_platform.h" #include "msm_vidc_control.h" #include "msm_vidc_debug.h" +#include "msm_vidc_control.h" #include "venus_hfi.h" #include "hfi_packet.h" u32 msm_vdec_subscribe_for_port_settings_change[] = { - HFI_PROP_ALIGN_RESOLUTION, - HFI_PROP_CROP_COORDINATE_TOP_LEFT, - HFI_PROP_CROP_RESOLUTION, + HFI_PROP_BITSTREAM_RESOLUTION, + HFI_PROP_CROP_OFFSETS, HFI_PROP_LUMA_CHROMA_BIT_DEPTH, HFI_PROP_CABAC_SESSION, HFI_PROP_CODED_FRAMES, HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT, HFI_PROP_PIC_ORDER_CNT_TYPE, HFI_PROP_SIGNAL_COLOR_INFO, + HFI_PROP_PROFILE, + HFI_PROP_LEVEL, + HFI_PROP_TIER, }; u32 msm_vdec_subscribe_for_properties[] = { - HFI_PROP_TAG_NOT_PROPAGATED_TO_OUTPUT, + HFI_PROP_NO_OUTPUT, }; u32 msm_vdec_subscribe_for_metadata[] = { @@ -68,79 +71,103 @@ exit: return rc; } -static int msm_vdec_set_resolution(struct msm_vidc_inst *inst, +static int msm_vdec_set_bitstream_resolution(struct msm_vidc_inst *inst, enum msm_vidc_port_type port) { int rc = 0; u32 resolution; - if (port != INPUT_PORT && port != OUTPUT_PORT) { - s_vpr_e(inst->sid, "%s: invalid port %d\n", __func__, port); - return -EINVAL; - } - - resolution = inst->fmts[port].fmt.pix_mp.width << 16 | - inst->fmts[port].fmt.pix_mp.height; + resolution = inst->fmts[INPUT_PORT].fmt.pix_mp.width << 16 | + inst->fmts[INPUT_PORT].fmt.pix_mp.height; + s_vpr_h(inst->sid, "%s: width: %d height: %d\n", __func__, + inst->fmts[INPUT_PORT].fmt.pix_mp.width, + inst->fmts[INPUT_PORT].fmt.pix_mp.height); rc = venus_hfi_session_property(inst, - HFI_PROP_ALIGN_RESOLUTION, + HFI_PROP_BITSTREAM_RESOLUTION, HFI_HOST_FLAGS_NONE, get_hfi_port(inst, port), HFI_PAYLOAD_U32, &resolution, sizeof(u32)); if (rc) - return rc; - return 0; + s_vpr_e(inst->sid, "%s: set property failed\n", __func__); + + return rc; } -static int msm_vdec_set_crop_top_left(struct msm_vidc_inst *inst, +static int msm_vdec_set_linear_stride_scanline(struct msm_vidc_inst *inst) +{ + int rc = 0; + u32 stride_y, scanline_y, stride_uv, scanline_uv; + u32 payload[2]; + + if (inst->fmts[OUTPUT_PORT].fmt.pix_mp.pixelformat != + V4L2_PIX_FMT_NV12 && + inst->fmts[OUTPUT_PORT].fmt.pix_mp.pixelformat != + V4L2_PIX_FMT_VIDC_P010) + return 0; + + stride_y = inst->fmts[OUTPUT_PORT].fmt.pix_mp.width; + scanline_y = inst->fmts[OUTPUT_PORT].fmt.pix_mp.height; + stride_uv = stride_y; + scanline_uv = scanline_y / 2; + + payload[0] = stride_y << 16 | scanline_y; + payload[1] = stride_uv << 16 | scanline_uv; + s_vpr_h(inst->sid, "%s: stride_y: %d scanline_y: %d " + "stride_uv: %d, scanline_uv: %d", __func__, + stride_y, scanline_y, stride_uv, scanline_uv); + rc = venus_hfi_session_property(inst, + HFI_PROP_LINEAR_STRIDE_SCANLINE, + HFI_HOST_FLAGS_NONE, + get_hfi_port(inst, OUTPUT_PORT), + HFI_PAYLOAD_U64, + &payload, + sizeof(u64)); + if (rc) + s_vpr_e(inst->sid, "%s: set property failed\n", __func__); + + return rc; +} + +static int msm_vdec_set_crop_offsets(struct msm_vidc_inst *inst, enum msm_vidc_port_type port) { int rc = 0; - u32 crop_top_left; + u32 left_offset, top_offset, right_offset, bottom_offset; + u32 payload[2]; - if (port != INPUT_PORT && port != OUTPUT_PORT) { - s_vpr_e(inst->sid, "%s: invalid port %d\n", __func__, port); + if (inst->fmts[INPUT_PORT].fmt.pix_mp.width < + inst->crop.width) return -EINVAL; - } - crop_top_left = 0; + if (inst->fmts[INPUT_PORT].fmt.pix_mp.height < + inst->crop.height) + return -EINVAL; + + left_offset = inst->crop.left; + top_offset = inst->crop.top; + right_offset = (inst->fmts[INPUT_PORT].fmt.pix_mp.width - + inst->crop.width); + bottom_offset = (inst->fmts[INPUT_PORT].fmt.pix_mp.height - + inst->crop.height); + + payload[0] = right_offset << 16 | bottom_offset; + payload[1] = left_offset << 16 | top_offset; + s_vpr_h(inst->sid, "%s: left_offset: %d top_offset: %d " + "right_offset: %d bottom_offset: %d", __func__, + left_offset, top_offset, right_offset, bottom_offset); rc = venus_hfi_session_property(inst, - HFI_PROP_CROP_COORDINATE_TOP_LEFT, + HFI_PROP_CROP_OFFSETS, HFI_HOST_FLAGS_NONE, get_hfi_port(inst, port), - HFI_PAYLOAD_U32, - &crop_top_left, - sizeof(u32)); + HFI_PAYLOAD_U64, + &payload, + sizeof(u64)); if (rc) - return rc; - return 0; -} + s_vpr_e(inst->sid, "%s: set property failed\n", __func__); -static int msm_vdec_set_crop_resolution(struct msm_vidc_inst *inst, - enum msm_vidc_port_type port) -{ - int rc = 0; - u32 crop; - - if (port != INPUT_PORT && port != OUTPUT_PORT) { - s_vpr_e(inst->sid, "%s: invalid port %d\n", __func__, port); - return -EINVAL; - } - - /* output buffer resolution is nothing but crop */ - crop = inst->fmts[OUTPUT_PORT].fmt.pix_mp.width << 16 | - inst->fmts[OUTPUT_PORT].fmt.pix_mp.height; - rc = venus_hfi_session_property(inst, - HFI_PROP_CROP_RESOLUTION, - HFI_HOST_FLAGS_NONE, - get_hfi_port(inst, port), - HFI_PAYLOAD_U32, - &crop, - sizeof(u32)); - if (rc) - return rc; - return 0; + return rc; } static int msm_vdec_set_bit_depth(struct msm_vidc_inst *inst, @@ -159,6 +186,7 @@ static int msm_vdec_set_bit_depth(struct msm_vidc_inst *inst, if (colorformat == V4L2_PIX_FMT_VIDC_P010 || colorformat == V4L2_PIX_FMT_VIDC_TP10C) bitdepth = 10 << 16 | 10; + s_vpr_h(inst->sid, "%s: bit depth: %d", __func__, bitdepth); rc = venus_hfi_session_property(inst, HFI_PROP_LUMA_CHROMA_BIT_DEPTH, HFI_HOST_FLAGS_NONE, @@ -167,8 +195,9 @@ static int msm_vdec_set_bit_depth(struct msm_vidc_inst *inst, &bitdepth, sizeof(u32)); if (rc) - return rc; - return 0; + s_vpr_e(inst->sid, "%s: set property failed\n", __func__); + + return rc; } static int msm_vdec_set_cabac(struct msm_vidc_inst *inst, @@ -182,6 +211,10 @@ static int msm_vdec_set_cabac(struct msm_vidc_inst *inst, return -EINVAL; } + rc = msm_vidc_v4l2_menu_to_hfi(inst, ENTROPY_MODE, &cabac); + if (rc) + return rc; + s_vpr_h(inst->sid, "%s: entropy mode: %d", __func__, cabac); rc = venus_hfi_session_property(inst, HFI_PROP_CABAC_SESSION, HFI_HOST_FLAGS_NONE, @@ -190,8 +223,9 @@ static int msm_vdec_set_cabac(struct msm_vidc_inst *inst, &cabac, sizeof(u32)); if (rc) - return rc; - return 0; + s_vpr_e(inst->sid, "%s: set property failed\n", __func__); + + return rc; } static int msm_vdec_set_coded_frames(struct msm_vidc_inst *inst, @@ -206,7 +240,8 @@ static int msm_vdec_set_coded_frames(struct msm_vidc_inst *inst, } /* (mb_adaptive_frame_field_flag << 1) | frame_mbs_only_flag */ - coded_frames = 1; + coded_frames = 0; + s_vpr_h(inst->sid, "%s: coded frames: %d", __func__, coded_frames); rc = venus_hfi_session_property(inst, HFI_PROP_CODED_FRAMES, HFI_HOST_FLAGS_NONE, @@ -215,8 +250,9 @@ static int msm_vdec_set_coded_frames(struct msm_vidc_inst *inst, &coded_frames, sizeof(u32)); if (rc) - return rc; - return 0; + s_vpr_e(inst->sid, "%s: set property failed\n", __func__); + + return rc; } static int msm_vdec_set_min_output_count(struct msm_vidc_inst *inst, @@ -231,6 +267,8 @@ static int msm_vdec_set_min_output_count(struct msm_vidc_inst *inst, } min_output = inst->buffers.output.min_count; + s_vpr_h(inst->sid, "%s: firmware min output count: %d", + __func__, min_output); rc = venus_hfi_session_property(inst, HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT, HFI_HOST_FLAGS_NONE, @@ -239,21 +277,23 @@ static int msm_vdec_set_min_output_count(struct msm_vidc_inst *inst, &min_output, sizeof(u32)); if (rc) - return rc; - return 0; + s_vpr_e(inst->sid, "%s: set property failed\n", __func__); + + return rc; } static int msm_vdec_set_picture_order_count(struct msm_vidc_inst *inst, enum msm_vidc_port_type port) { int rc = 0; - u32 poc = 1; + u32 poc = 0; if (port != INPUT_PORT && port != OUTPUT_PORT) { s_vpr_e(inst->sid, "%s: invalid port %d\n", __func__, port); return -EINVAL; } + s_vpr_h(inst->sid, "%s: picture order count: %d", __func__, poc); rc = venus_hfi_session_property(inst, HFI_PROP_PIC_ORDER_CNT_TYPE, HFI_HOST_FLAGS_NONE, @@ -262,8 +302,9 @@ static int msm_vdec_set_picture_order_count(struct msm_vidc_inst *inst, &poc, sizeof(u32)); if (rc) - return rc; - return 0; + s_vpr_e(inst->sid, "%s: set property failed\n", __func__); + + return rc; } static int msm_vdec_set_colorspace(struct msm_vidc_inst *inst, @@ -278,6 +319,7 @@ static int msm_vdec_set_colorspace(struct msm_vidc_inst *inst, } colorspace = inst->fmts[OUTPUT_PORT].fmt.pix_mp.colorspace; + s_vpr_h(inst->sid, "%s: colorspace: %d", __func__, colorspace); rc = venus_hfi_session_property(inst, HFI_PROP_SIGNAL_COLOR_INFO, HFI_HOST_FLAGS_NONE, @@ -286,152 +328,353 @@ static int msm_vdec_set_colorspace(struct msm_vidc_inst *inst, &colorspace, sizeof(u32)); if (rc) - return rc; - return 0; + s_vpr_e(inst->sid, "%s: set property failed\n", __func__); + + return rc; } -static int msm_vdec_set_colorformat(struct msm_vidc_inst *inst, +static int msm_vdec_set_profile(struct msm_vidc_inst *inst, enum msm_vidc_port_type port) +{ + int rc = 0; + u32 profile; + + if (port != INPUT_PORT && port != OUTPUT_PORT) { + s_vpr_e(inst->sid, "%s: invalid port %d\n", __func__, port); + return -EINVAL; + } + + profile = inst->capabilities->cap[PROFILE].value; + s_vpr_h(inst->sid, "%s: profile: %d", __func__, profile); + rc = venus_hfi_session_property(inst, + HFI_PROP_PROFILE, + HFI_HOST_FLAGS_NONE, + get_hfi_port(inst, port), + HFI_PAYLOAD_U32_ENUM, + &profile, + sizeof(u32)); + if (rc) + s_vpr_e(inst->sid, "%s: set property failed\n", __func__); + + return rc; +} + +static int msm_vdec_set_level(struct msm_vidc_inst *inst, + enum msm_vidc_port_type port) +{ + int rc = 0; + u32 level; + + if (port != INPUT_PORT && port != OUTPUT_PORT) { + s_vpr_e(inst->sid, "%s: invalid port %d\n", __func__, port); + return -EINVAL; + } + + level = inst->capabilities->cap[LEVEL].value; + s_vpr_h(inst->sid, "%s: level: %d", __func__, level); + rc = venus_hfi_session_property(inst, + HFI_PROP_LEVEL, + HFI_HOST_FLAGS_NONE, + get_hfi_port(inst, port), + HFI_PAYLOAD_U32_ENUM, + &level, + sizeof(u32)); + if (rc) + s_vpr_e(inst->sid, "%s: set property failed\n", __func__); + + return rc; +} + +static int msm_vdec_set_tier(struct msm_vidc_inst *inst, + enum msm_vidc_port_type port) +{ + int rc = 0; + u32 tier; + + if (port != INPUT_PORT && port != OUTPUT_PORT) { + s_vpr_e(inst->sid, "%s: invalid port %d\n", __func__, port); + return -EINVAL; + } + + tier = inst->capabilities->cap[HEVC_TIER].value; + s_vpr_h(inst->sid, "%s: tier: %d", __func__, tier); + rc = venus_hfi_session_property(inst, + HFI_PROP_TIER, + HFI_HOST_FLAGS_NONE, + get_hfi_port(inst, port), + HFI_PAYLOAD_U32_ENUM, + &tier, + sizeof(u32)); + if (rc) + s_vpr_e(inst->sid, "%s: set property failed\n", __func__); + + return rc; +} + +static int msm_vdec_set_colorformat(struct msm_vidc_inst *inst) { int rc = 0; u32 pixelformat; enum msm_vidc_colorformat_type colorformat; u32 hfi_colorformat; - if (port != INPUT_PORT && port != OUTPUT_PORT) { - s_vpr_e(inst->sid, "%s: invalid port %d\n", __func__, port); - return -EINVAL; - } - pixelformat = inst->fmts[OUTPUT_PORT].fmt.pix_mp.pixelformat; - if (pixelformat != V4L2_PIX_FMT_VIDC_NV12C && - pixelformat != V4L2_PIX_FMT_VIDC_TP10C) { - s_vpr_e(inst->sid, "%s: invalid pixelformat %#x\n", - __func__, pixelformat); - return -EINVAL; - } colorformat = v4l2_colorformat_to_driver(pixelformat, __func__); hfi_colorformat = get_hfi_colorformat(inst, colorformat); + s_vpr_h(inst->sid, "%s: hfi colorformat: %d", + __func__, hfi_colorformat); rc = venus_hfi_session_property(inst, HFI_PROP_COLOR_FORMAT, HFI_HOST_FLAGS_NONE, - get_hfi_port(inst, port), + get_hfi_port(inst, OUTPUT_PORT), HFI_PAYLOAD_U32, &hfi_colorformat, sizeof(u32)); if (rc) - return rc; - return 0; + s_vpr_e(inst->sid, "%s: set property failed\n", __func__); + + return rc; } -static int msm_vdec_set_stage(struct msm_vidc_inst *inst, - enum msm_vidc_port_type port) +static int msm_vdec_set_stage(struct msm_vidc_inst *inst) { int rc = 0; + u32 stage = 0; struct msm_vidc_core *core = inst->core; - if (port != INPUT_PORT && port != OUTPUT_PORT) { - s_vpr_e(inst->sid, "%s: invalid port %d\n", __func__, port); - return -EINVAL; - } - rc = call_session_op(core, decide_work_mode, inst); if (rc) { s_vpr_e(inst->sid, "%s: decide_work_mode failed %d\n", - __func__, port); + __func__); return -EINVAL; } + stage = inst->stage; + s_vpr_h(inst->sid, "%s: stage: %d", __func__, stage); rc = venus_hfi_session_property(inst, HFI_PROP_STAGE, HFI_HOST_FLAGS_NONE, - get_hfi_port(inst, port), + HFI_PORT_NONE, HFI_PAYLOAD_U32, - &inst->stage, + &stage, sizeof(u32)); if (rc) - return rc; - return 0; + s_vpr_e(inst->sid, "%s: set property failed\n", __func__); + + return rc; } -static int msm_vdec_set_pipe(struct msm_vidc_inst *inst, - enum msm_vidc_port_type port) +static int msm_vdec_set_pipe(struct msm_vidc_inst *inst) { int rc = 0; + u32 pipe; struct msm_vidc_core *core = inst->core; - if (port != INPUT_PORT && port != OUTPUT_PORT) { - s_vpr_e(inst->sid, "%s: invalid port %d\n", __func__, port); - return -EINVAL; - } - rc = call_session_op(core, decide_work_route, inst); if (rc) { - s_vpr_e(inst->sid, "%s: decide_work_route failed %d\n", - __func__, port); + s_vpr_e(inst->sid, "%s: decide_work_route failed\n", + __func__); return -EINVAL; } + pipe = inst->pipe; + s_vpr_h(inst->sid, "%s: pipe: %d", __func__, pipe); rc = venus_hfi_session_property(inst, HFI_PROP_PIPE, HFI_HOST_FLAGS_NONE, - get_hfi_port(inst, port), + HFI_PORT_NONE, HFI_PAYLOAD_U32, &inst->pipe, sizeof(u32)); if (rc) - return rc; - return 0; + s_vpr_e(inst->sid, "%s: set property failed\n", __func__); + + return rc; +} + +static int msm_vdec_set_output_order(struct msm_vidc_inst *inst, + enum msm_vidc_port_type port) +{ + int rc = 0; + u32 output_order; + + if (port != INPUT_PORT) { + s_vpr_e(inst->sid, "%s: invalid port %d\n", __func__, port); + return -EINVAL; + } + + output_order = inst->capabilities->cap[DISPLAY_DELAY_ENABLE].value; + s_vpr_h(inst->sid, "%s: output order: %d", __func__, output_order); + rc = venus_hfi_session_property(inst, + HFI_PROP_DECODE_ORDER_OUTPUT, + HFI_HOST_FLAGS_NONE, + get_hfi_port(inst, port), + HFI_PAYLOAD_U32, + &output_order, + sizeof(u32)); + if (rc) + s_vpr_e(inst->sid, "%s: set property failed\n", __func__); + + return rc; +} + +static int msm_vdec_set_secure_mode(struct msm_vidc_inst *inst, + enum msm_vidc_port_type port) +{ + int rc = 0; + u32 secure_mode; + + secure_mode = inst->capabilities->cap[SECURE_MODE].value; + s_vpr_h(inst->sid, "%s: secure mode: %d", __func__, secure_mode); + rc = venus_hfi_session_property(inst, + HFI_PROP_SECURE, + HFI_HOST_FLAGS_NONE, + HFI_PORT_NONE, + HFI_PAYLOAD_U32, + &secure_mode, + sizeof(u32)); + if (rc) + s_vpr_e(inst->sid, "%s: set property failed\n", __func__); + + return rc; +} + +static int msm_vdec_set_thumbnail_mode(struct msm_vidc_inst *inst, + enum msm_vidc_port_type port) +{ + int rc = 0; + u32 thumbnail_mode = 0; + + if (port != INPUT_PORT) { + s_vpr_e(inst->sid, "%s: invalid port %d\n", __func__, port); + return -EINVAL; + } + + s_vpr_h(inst->sid, "%s: thumbnail mode: %d", __func__, thumbnail_mode); + rc = venus_hfi_session_property(inst, + HFI_PROP_THUMBNAIL_MODE, + HFI_HOST_FLAGS_NONE, + get_hfi_port(inst, port), + HFI_PAYLOAD_U32, + &thumbnail_mode, + sizeof(u32)); + if (rc) + s_vpr_e(inst->sid, "%s: set property failed\n", __func__); + + return rc; +} + +static int msm_vdec_set_realtime(struct msm_vidc_inst *inst, + enum msm_vidc_port_type port) +{ + int rc = 0; + u32 realtime = 1; //todo + + if (port != INPUT_PORT) { + s_vpr_e(inst->sid, "%s: invalid port %d\n", __func__, port); + return -EINVAL; + } + + s_vpr_h(inst->sid, "%s: priority: %d", __func__, realtime); + rc = venus_hfi_session_property(inst, + HFI_PROP_REALTIME, + HFI_HOST_FLAGS_NONE, + get_hfi_port(inst, port), + HFI_PAYLOAD_U32, + &realtime, + sizeof(u32)); + if (rc) + s_vpr_e(inst->sid, "%s: set property failed\n", __func__); + + return rc; +} + +static int msm_vdec_set_conceal_color_8bit(struct msm_vidc_inst *inst, + enum msm_vidc_port_type port) +{ + int rc = 0; + u32 conceal_color_8bit; + + if (port != INPUT_PORT) { + s_vpr_e(inst->sid, "%s: invalid port %d\n", __func__, port); + return -EINVAL; + } + + conceal_color_8bit = inst->capabilities->cap[CONCEAL_COLOR_8BIT].value; + s_vpr_h(inst->sid, "%s: conceal color 8bit: %#x", + __func__, conceal_color_8bit); + rc = venus_hfi_session_property(inst, + HFI_PROP_CONCEAL_COLOR_8BIT, + HFI_HOST_FLAGS_NONE, + get_hfi_port(inst, port), + HFI_PAYLOAD_32_PACKED, + &conceal_color_8bit, + sizeof(u32)); + if (rc) + s_vpr_e(inst->sid, "%s: set property failed\n", __func__); + + return rc; +} + +static int msm_vdec_set_conceal_color_10bit(struct msm_vidc_inst *inst, + enum msm_vidc_port_type port) +{ + int rc = 0; + u32 conceal_color_10bit; + + if (port != INPUT_PORT) { + s_vpr_e(inst->sid, "%s: invalid port %d\n", __func__, port); + return -EINVAL; + } + + conceal_color_10bit = inst->capabilities->cap[CONCEAL_COLOR_8BIT].value; + s_vpr_h(inst->sid, "%s: conceal color 10bit: %#x", + __func__, conceal_color_10bit); + rc = venus_hfi_session_property(inst, + HFI_PROP_CONCEAL_COLOR_10BIT, + HFI_HOST_FLAGS_NONE, + get_hfi_port(inst, port), + HFI_PAYLOAD_32_PACKED, + &conceal_color_10bit, + sizeof(u32)); + if (rc) + s_vpr_e(inst->sid, "%s: set property failed\n", __func__); + + return rc; } static int msm_vdec_set_input_properties(struct msm_vidc_inst *inst) { int rc = 0; - int i = 0; - d_vpr_h("%s()\n", __func__); if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - for (i = 0; i < ARRAY_SIZE(msm_vdec_subscribe_for_port_settings_change); - i++) { - switch (msm_vdec_subscribe_for_port_settings_change[i]) { - case HFI_PROP_ALIGN_RESOLUTION: - rc = msm_vdec_set_resolution(inst, INPUT_PORT); - break; - case HFI_PROP_CROP_COORDINATE_TOP_LEFT: - rc = msm_vdec_set_crop_top_left(inst, INPUT_PORT); - break; - case HFI_PROP_CROP_RESOLUTION: - rc = msm_vdec_set_crop_resolution(inst, INPUT_PORT); - break; - case HFI_PROP_LUMA_CHROMA_BIT_DEPTH: - rc = msm_vdec_set_bit_depth(inst, INPUT_PORT); - break; - case HFI_PROP_CABAC_SESSION: - rc = msm_vdec_set_cabac(inst, INPUT_PORT); - break; - case HFI_PROP_CODED_FRAMES: - rc = msm_vdec_set_coded_frames(inst, INPUT_PORT); - break; - case HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT: - rc = msm_vdec_set_min_output_count(inst, INPUT_PORT); - break; - case HFI_PROP_PIC_ORDER_CNT_TYPE: - rc = msm_vdec_set_picture_order_count(inst, INPUT_PORT); - break; - case HFI_PROP_SIGNAL_COLOR_INFO: - rc = msm_vdec_set_colorspace(inst, INPUT_PORT); - break; - default: - d_vpr_e("%s: unknown property %#x\n", __func__, - msm_vdec_subscribe_for_port_settings_change[i]); - rc = -EINVAL; - break; - } - } + rc = msm_vdec_set_output_order(inst, INPUT_PORT); + if (rc) + return rc; + + rc = msm_vdec_set_secure_mode(inst, INPUT_PORT); + if (rc) + return rc; + + rc = msm_vdec_set_thumbnail_mode(inst, INPUT_PORT); + if (rc) + return rc; + + rc = msm_vdec_set_realtime(inst, INPUT_PORT); + if (rc) + return rc; + + rc = msm_vdec_set_conceal_color_8bit(inst, INPUT_PORT); + if (rc) + return rc; + + rc = msm_vdec_set_conceal_color_10bit(inst, INPUT_PORT); + if (rc) + return rc; return rc; } @@ -439,63 +682,27 @@ static int msm_vdec_set_input_properties(struct msm_vidc_inst *inst) static int msm_vdec_set_output_properties(struct msm_vidc_inst *inst) { int rc = 0; - int i = 0; - d_vpr_h("%s()\n", __func__); if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - rc = msm_vdec_set_colorformat(inst, OUTPUT_PORT); + rc = msm_vdec_set_colorformat(inst); if (rc) return rc; - rc = msm_vdec_set_stage(inst, OUTPUT_PORT); + rc = msm_vdec_set_stage(inst); if (rc) return rc; - rc = msm_vdec_set_pipe(inst, OUTPUT_PORT); + rc = msm_vdec_set_pipe(inst); if (rc) return rc; - for (i = 0; i < ARRAY_SIZE(msm_vdec_subscribe_for_port_settings_change); - i++) { - switch (msm_vdec_subscribe_for_port_settings_change[i]) { - case HFI_PROP_ALIGN_RESOLUTION: - rc = msm_vdec_set_resolution(inst, OUTPUT_PORT); - break; - case HFI_PROP_CROP_COORDINATE_TOP_LEFT: - rc = msm_vdec_set_crop_top_left(inst, OUTPUT_PORT); - break; - case HFI_PROP_CROP_RESOLUTION: - rc = msm_vdec_set_crop_resolution(inst, OUTPUT_PORT); - break; - case HFI_PROP_LUMA_CHROMA_BIT_DEPTH: - rc = msm_vdec_set_bit_depth(inst, OUTPUT_PORT); - break; - case HFI_PROP_CABAC_SESSION: - rc = msm_vdec_set_cabac(inst, OUTPUT_PORT); - break; - case HFI_PROP_CODED_FRAMES: - rc = msm_vdec_set_coded_frames(inst, OUTPUT_PORT); - break; - case HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT: - rc = msm_vdec_set_min_output_count(inst, OUTPUT_PORT); - break; - case HFI_PROP_PIC_ORDER_CNT_TYPE: - rc = msm_vdec_set_picture_order_count(inst, OUTPUT_PORT); - break; - case HFI_PROP_SIGNAL_COLOR_INFO: - rc = msm_vdec_set_colorspace(inst, OUTPUT_PORT); - break; - default: - d_vpr_e("%s: unknown property %#x\n", __func__, - msm_vdec_subscribe_for_port_settings_change[i]); - rc = -EINVAL; - break; - } - } + rc = msm_vdec_set_linear_stride_scanline(inst); + if (rc) + return rc; return rc; } @@ -664,6 +871,50 @@ static int msm_vdec_port_settings_subscription(struct msm_vidc_inst *inst, (ARRAY_SIZE(msm_vdec_subscribe_for_port_settings_change) + 1) * sizeof(u32)); + for (i = 0; i < ARRAY_SIZE(msm_vdec_subscribe_for_port_settings_change); + i++) { + switch (msm_vdec_subscribe_for_port_settings_change[i]) { + case HFI_PROP_BITSTREAM_RESOLUTION: + rc = msm_vdec_set_bitstream_resolution(inst, port); + break; + case HFI_PROP_CROP_OFFSETS: + rc = msm_vdec_set_crop_offsets(inst, port); + break; + case HFI_PROP_LUMA_CHROMA_BIT_DEPTH: + rc = msm_vdec_set_bit_depth(inst, port); + break; + case HFI_PROP_CABAC_SESSION: + rc = msm_vdec_set_cabac(inst, port); + break; + case HFI_PROP_CODED_FRAMES: + rc = msm_vdec_set_coded_frames(inst, port); + break; + case HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT: + rc = msm_vdec_set_min_output_count(inst, port); + break; + case HFI_PROP_PIC_ORDER_CNT_TYPE: + rc = msm_vdec_set_picture_order_count(inst, port); + break; + case HFI_PROP_SIGNAL_COLOR_INFO: + rc = msm_vdec_set_colorspace(inst, port); + break; + case HFI_PROP_PROFILE: + rc = msm_vdec_set_profile(inst, port); + break; + case HFI_PROP_LEVEL: + rc = msm_vdec_set_level(inst, port); + break; + case HFI_PROP_TIER: + rc = msm_vdec_set_tier(inst, port); + break; + default: + d_vpr_e("%s: unknown property %#x\n", __func__, + msm_vdec_subscribe_for_port_settings_change[i]); + rc = -EINVAL; + break; + } + } + return rc; } @@ -812,11 +1063,10 @@ int msm_vdec_start_input(struct msm_vidc_inst *inst) //msm_vidc_scale_power(inst); rc = msm_vdec_create_input_internal_buffers(inst); - rc = 0; // TODO if (rc) goto error; + rc = msm_vdec_queue_input_internal_buffers(inst); - rc = 0; // TODO if (rc) goto error; @@ -978,7 +1228,7 @@ int msm_vdec_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) fmt->fmt.pix_mp.plane_fmt[0].sizeimage; /* update crop dimensions */ - inst->crop.x = inst->crop.y = 0; + inst->crop.left = inst->crop.top = 0; inst->crop.width = f->fmt.pix_mp.width; inst->crop.height = f->fmt.pix_mp.height; @@ -1215,7 +1465,7 @@ int msm_vdec_inst_init(struct msm_vidc_inst *inst) inst->buffers.input.extra_count; inst->buffers.input.size = f->fmt.pix_mp.plane_fmt[0].sizeimage; - inst->crop.x = inst->crop.y = 0; + inst->crop.left = inst->crop.top = 0; inst->crop.width = f->fmt.pix_mp.width; inst->crop.height = f->fmt.pix_mp.height; diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index d950ea0e80..b3c684c7b9 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -19,19 +19,17 @@ u32 msm_venc_input_set_prop[] = { HFI_PROP_COLOR_FORMAT, - HFI_PROP_ALIGN_RESOLUTION, - HFI_PROP_CROP_COORDINATE_TOP_LEFT, - HFI_PROP_CROP_RESOLUTION, + HFI_PROP_BITSTREAM_RESOLUTION, + HFI_PROP_CROP_OFFSETS, }; u32 msm_venc_output_set_prop[] = { - HFI_PROP_ALIGN_RESOLUTION, - HFI_PROP_CROP_COORDINATE_TOP_LEFT, - HFI_PROP_CROP_RESOLUTION, + HFI_PROP_BITSTREAM_RESOLUTION, + HFI_PROP_CROP_OFFSETS, }; u32 msm_venc_input_subscribe_for_properties[] = { - HFI_PROP_TAG_NOT_PROPAGATED_TO_OUTPUT, + HFI_PROP_NO_OUTPUT, }; u32 msm_venc_deliver_as_metadata[] = { @@ -39,7 +37,7 @@ u32 msm_venc_deliver_as_metadata[] = { HFI_PROP_SEI_MASTERING_DISPLAY_COLOUR, HFI_PROP_SEI_CONTENT_LIGHT_LEVEL, HFI_PROP_SEI_HDR10PLUS_USERDATA, - HFI_PROP_CVP_STAT_INFO, + HFI_PROP_EVA_STAT_INFO, }; u32 msm_venc_subscribe_for_metadata[] = { @@ -83,6 +81,7 @@ exit: return rc; } +/* todo: add logs for each property once finalised */ static int msm_venc_set_colorformat(struct msm_vidc_inst *inst, enum msm_vidc_port_type port) { @@ -131,7 +130,7 @@ static int msm_venc_set_resolution(struct msm_vidc_inst *inst, resolution = inst->fmts[port].fmt.pix_mp.width << 16 | inst->fmts[port].fmt.pix_mp.height; rc = venus_hfi_session_property(inst, - HFI_PROP_ALIGN_RESOLUTION, + HFI_PROP_BITSTREAM_RESOLUTION, HFI_HOST_FLAGS_NONE, get_hfi_port(inst, port), HFI_PAYLOAD_32_PACKED, @@ -142,31 +141,7 @@ static int msm_venc_set_resolution(struct msm_vidc_inst *inst, return 0; } -static int msm_venc_set_crop_top_left(struct msm_vidc_inst *inst, - enum msm_vidc_port_type port) -{ - int rc = 0; - u32 crop_top_left; - - if (port != INPUT_PORT && port != OUTPUT_PORT) { - s_vpr_e(inst->sid, "%s: invalid port %d\n", __func__, port); - return -EINVAL; - } - - crop_top_left = 0; - rc = venus_hfi_session_property(inst, - HFI_PROP_CROP_COORDINATE_TOP_LEFT, - HFI_HOST_FLAGS_NONE, - get_hfi_port(inst, port), - HFI_PAYLOAD_32_PACKED, - &crop_top_left, - sizeof(u32)); - if (rc) - return rc; - return 0; -} - -static int msm_venc_set_crop_resolution(struct msm_vidc_inst *inst, +static int msm_venc_set_crop_offsets(struct msm_vidc_inst *inst, enum msm_vidc_port_type port) { int rc = 0; @@ -177,11 +152,11 @@ static int msm_venc_set_crop_resolution(struct msm_vidc_inst *inst, return -EINVAL; } - /* output buffer resolution is nothing but crop */ + /* TODO: recheck later */ crop = inst->fmts[INPUT_PORT].fmt.pix_mp.width << 16 | inst->fmts[INPUT_PORT].fmt.pix_mp.height; rc = venus_hfi_session_property(inst, - HFI_PROP_CROP_RESOLUTION, + HFI_PROP_CROP_OFFSETS, HFI_HOST_FLAGS_NONE, get_hfi_port(inst, port), HFI_PAYLOAD_32_PACKED, @@ -257,14 +232,11 @@ static int msm_venc_set_input_properties(struct msm_vidc_inst *inst) case HFI_PROP_COLOR_FORMAT: rc = msm_venc_set_colorformat(inst, INPUT_PORT); break; - case HFI_PROP_ALIGN_RESOLUTION: + case HFI_PROP_BITSTREAM_RESOLUTION: rc = msm_venc_set_resolution(inst, INPUT_PORT); break; - case HFI_PROP_CROP_COORDINATE_TOP_LEFT: - rc = msm_venc_set_crop_top_left(inst, INPUT_PORT); - break; - case HFI_PROP_CROP_RESOLUTION: - rc = msm_venc_set_crop_resolution(inst, INPUT_PORT); + case HFI_PROP_CROP_OFFSETS: + rc = msm_venc_set_crop_offsets(inst, INPUT_PORT); break; default: d_vpr_e("%s: unknown property %#x\n", __func__, @@ -300,14 +272,11 @@ static int msm_venc_set_output_properties(struct msm_vidc_inst *inst) for (i = 0; i < ARRAY_SIZE(msm_venc_output_set_prop); i++) { switch (msm_venc_output_set_prop[i]) { - case HFI_PROP_ALIGN_RESOLUTION: + case HFI_PROP_BITSTREAM_RESOLUTION: rc = msm_venc_set_resolution(inst, OUTPUT_PORT); break; - case HFI_PROP_CROP_COORDINATE_TOP_LEFT: - rc = msm_venc_set_crop_top_left(inst, OUTPUT_PORT); - break; - case HFI_PROP_CROP_RESOLUTION: - rc = msm_venc_set_crop_resolution(inst, OUTPUT_PORT); + case HFI_PROP_CROP_OFFSETS: + rc = msm_venc_set_crop_offsets(inst, OUTPUT_PORT); break; default: d_vpr_e("%s: unknown property %#x\n", __func__, @@ -826,7 +795,7 @@ int msm_venc_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) goto err_invalid_fmt; /* update crop dimensions */ - inst->crop.x = inst->crop.y = 0; + inst->crop.left = inst->crop.top = 0; inst->crop.width = f->fmt.pix_mp.width; inst->crop.height = f->fmt.pix_mp.height; @@ -988,7 +957,7 @@ int msm_venc_inst_init(struct msm_vidc_inst *inst) inst->buffers.output.extra_count; inst->buffers.output.size = f->fmt.pix_mp.plane_fmt[0].sizeimage; - inst->crop.x = inst->crop.y = 0; + inst->crop.left = inst->crop.top = 0; inst->crop.width = f->fmt.pix_mp.width; inst->crop.height = f->fmt.pix_mp.height; diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index b45a47ee89..fd0c62b2c0 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -880,7 +880,7 @@ int msm_vidc_v4l2_menu_to_hfi(struct msm_vidc_inst *inst, break; default: s_vpr_e(inst->sid, - "%s: invalid ctrl with cap_id\n", cap_id); + "%s: invalid ctrl with cap_id %d\n", __func__, cap_id); return -EINVAL; } return 0; diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index 6b7096c8b3..39e7b04313 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -100,8 +100,20 @@ static int handle_session_error(struct msm_vidc_inst *inst, case HFI_ERROR_MAX_SESSIONS: error = "exceeded max sessions"; break; - case HFI_ERROR_UNSUPPORTED: - error = "unsupported bitstream"; + case HFI_ERROR_UNKNOWN_SESSION: + error = "unknown session id"; + break; + case HFI_ERROR_INVALID_STATE: + error = "invalid operation for current state"; + break; + case HFI_ERROR_INSUFFICIENT_RESOURCES: + error = "insufficient resources"; + break; + case HFI_ERROR_BUFFER_NOT_SET: + error = "internal buffers not set"; + break; + case HFI_ERROR_FATAL: + error = "fatal error"; break; default: error = "unknown"; @@ -274,7 +286,8 @@ static int handle_input_buffer(struct msm_vidc_inst *inst, buf->data_size = buffer->data_size; buf->attr &= ~MSM_VIDC_ATTR_QUEUED; buf->flags = 0; - if (buffer->flags & HFI_BUF_FW_FLAG_CORRUPT) { + //todo: + /*if (buffer->flags & HFI_BUF_FW_FLAG_CORRUPT) { s_vpr_h(inst->sid, "%s: data corrupted\n", __func__); buf->flags |= MSM_VIDC_BUF_FLAG_ERROR; } @@ -282,7 +295,7 @@ static int handle_input_buffer(struct msm_vidc_inst *inst, s_vpr_e(inst->sid, "%s: unsupported input\n", __func__); buf->flags |= MSM_VIDC_BUF_FLAG_ERROR; // TODO: move inst->state to error state - } + }*/ print_vidc_buffer(VIDC_HIGH, "EBD", inst, buf); msm_vidc_vb2_buffer_done(inst, buf); @@ -326,16 +339,19 @@ static int handle_output_buffer(struct msm_vidc_inst *inst, buf->attr &= ~MSM_VIDC_ATTR_READ_ONLY; buf->flags = 0; - if (buffer->flags & HFI_BUF_FW_FLAG_KEYFRAME) - buf->flags |= MSM_VIDC_BUF_FLAG_KEYFRAME; + //todo: moved to HFI_PROP_PICTURE_TYPE + /*if (buffer->flags & HFI_BUF_FW_FLAG_KEYFRAME) + buf->flags |= MSM_VIDC_BUF_FLAG_KEYFRAME;*/ if (buffer->flags & HFI_BUF_FW_FLAG_LAST) buf->flags |= MSM_VIDC_BUF_FLAG_LAST; - if (buffer->flags & HFI_BUF_FW_FLAG_CORRUPT) - buf->flags |= MSM_VIDC_BUF_FLAG_ERROR; + //moved to HFI_INFO_DATA_CORRUPT + /*if (buffer->flags & HFI_BUF_FW_FLAG_CORRUPT) + buf->flags |= MSM_VIDC_BUF_FLAG_ERROR;*/ if (buffer->flags & HFI_BUF_FW_FLAG_CODEC_CONFIG) buf->flags |= MSM_VIDC_BUF_FLAG_CODECCONFIG; - if (buffer->flags & HFI_BUF_FW_FLAG_SUBFRAME) - buf->flags |= MSM_VIDC_BUF_FLAG_SUBFRAME; + //moved to HFI_PROP_SUBFRAME_OUTPUT + /*if (buffer->flags & HFI_BUF_FW_FLAG_SUBFRAME) + buf->flags |= MSM_VIDC_BUF_FLAG_SUBFRAME;*/ print_vidc_buffer(VIDC_HIGH, "FBD", inst, buf); msm_vidc_vb2_buffer_done(inst, buf); From 9099609e92e848b21634b47c201fb5beb357483f Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Tue, 2 Jun 2020 14:33:47 -0700 Subject: [PATCH 0025/1061] msm: vidc: Use upstream api to load firmware image Use upstream compliant APIs to, load and authenticate firmware image. Downstream api, PIL/SSR, are deprecated. Change-Id: I121c3c0276cdd84fa18ff8f65df45b3ac00e7443 Signed-off-by: Akshata Sahukar Signed-off-by: Chinmay Sawarkar --- driver/vidc/inc/msm_vidc_dt.h | 2 +- driver/vidc/src/venus_hfi.c | 131 ++++++++++++++++++++++++++++++---- 2 files changed, 120 insertions(+), 13 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_dt.h b/driver/vidc/inc/msm_vidc_dt.h index 823116923d..e45a37bfb5 100644 --- a/driver/vidc/inc/msm_vidc_dt.h +++ b/driver/vidc/inc/msm_vidc_dt.h @@ -218,7 +218,7 @@ struct msm_vidc_dt { struct list_head context_banks; struct mutex cb_lock; const char *fw_name; - void *fw_cookie; + int fw_cookie; }; int msm_vidc_init_dt(struct platform_device *pdev); diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index 1e92255685..fb4b6432b0 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -13,6 +13,10 @@ #include #include #include +#include +#include +#include +#include #include "venus_hfi.h" #include "msm_vidc_core.h" @@ -27,6 +31,8 @@ #define MIN_PAYLOAD_SIZE 3 +#define MAX_FIRMWARE_NAME_SIZE 128 + static int __resume(struct msm_vidc_core *core); static int __suspend(struct msm_vidc_core *core); @@ -2246,13 +2252,112 @@ fail_alloc_queue: return -ENOMEM; } +static int __load_fw_to_memory(struct platform_device *pdev, + const char *fw_name) +{ + int rc = 0; + const struct firmware *firmware = NULL; + char firmware_name[MAX_FIRMWARE_NAME_SIZE] = { 0 }; + struct device_node *node = NULL; + struct resource res = { 0 }; + phys_addr_t phys = 0; + size_t res_size = 0; + ssize_t fw_size = 0; + void *virt = NULL; + int pas_id = 0; + + if (!fw_name || !(*fw_name) || !pdev) { + d_vpr_e("%s: Invalid inputs\n", __func__); + return -EINVAL; + } + if (strlen(fw_name) >= MAX_FIRMWARE_NAME_SIZE - 4) { + d_vpr_e("%s: Invalid fw name\n", __func__); + return -EINVAL; + } + scnprintf(firmware_name, ARRAY_SIZE(firmware_name), "%s.mdt", fw_name); + + rc = of_property_read_u32(pdev->dev.of_node, "pas-id", &pas_id); + if (rc) { + d_vpr_e("%s: failed to read \"pas-id\". error %d\n", + __func__, rc); + goto exit; + } + + node = of_parse_phandle(pdev->dev.of_node, "memory-region", 0); + if (!node) { + d_vpr_e("%s: failed to read \"memory-region\"\n", + __func__); + return -EINVAL; + } + + rc = of_address_to_resource(node, 0, &res); + if (rc) { + d_vpr_e("%s: failed to read \"memory-region\", error %d\n", + __func__, rc); + goto exit; + } + phys = res.start; + res_size = (size_t)resource_size(&res); + + rc = request_firmware(&firmware, firmware_name, &pdev->dev); + if (rc) { + d_vpr_e("%s: failed to request fw \"%s\", error %d\n", + __func__, rc, firmware_name); + goto exit; + } + + fw_size = qcom_mdt_get_size(firmware); + if (fw_size < 0 || res_size < (size_t)fw_size) { + rc = -EINVAL; + d_vpr_e("%s: out of bound fw image fw size: %ld, res_size: %lu", + __func__, fw_size, res_size); + goto exit; + } + + virt = memremap(phys, res_size, MEMREMAP_WC); + if (!virt) { + d_vpr_e("%s: failed to remap fw memory phys %pa[p]\n", + __func__, phys); + return -ENOMEM; + } + + rc = qcom_mdt_load(&pdev->dev, firmware, firmware_name, + pas_id, virt, phys, res_size, NULL); + if (rc) { + d_vpr_e("%s: error %d loading fw \"%s\"\n", + __func__, rc, firmware_name); + goto exit; + } + rc = qcom_scm_pas_auth_and_reset(pas_id); + if (rc) { + d_vpr_e("%s: error %d authenticating fw \"%s\"\n", + __func__, rc, firmware_name); + goto exit; + } + + memunmap(virt); + release_firmware(firmware); + d_vpr_h("%s: firmware \"%s\" loaded successfully\n", + __func__, firmware_name); + + return pas_id; + +exit: + if (virt) + memunmap(virt); + if (firmware) + release_firmware(firmware); + + return rc; +} + static int __load_fw(struct msm_vidc_core *core) { int rc = 0; rc = __init_resources(core); if (rc) { - d_vpr_e("Failed to init resources: %d\n", rc); + d_vpr_e("%s: Failed to init resources: %d\n", __func__, rc); goto fail_init_res; } @@ -2263,11 +2368,12 @@ static int __load_fw(struct msm_vidc_core *core) } if (!core->dt->fw_cookie) { - core->dt->fw_cookie = subsystem_get_with_fwname("venus", - core->dt->fw_name); - if (IS_ERR_OR_NULL(core->dt->fw_cookie)) { - d_vpr_e("%s: firmware download failed\n", __func__); - core->dt->fw_cookie = NULL; + core->dt->fw_cookie = __load_fw_to_memory(core->pdev, + core->dt->fw_name); + if (core->dt->fw_cookie <= 0) { + d_vpr_e("%s: firmware download failed %d\n", + __func__, core->dt->fw_cookie); + core->dt->fw_cookie = 0; rc = -ENOMEM; goto fail_load_fw; } @@ -2284,14 +2390,13 @@ static int __load_fw(struct msm_vidc_core *core) * (s/w triggered) to fast (HW triggered) unless the h/w vote is * present. */ - if (__enable_hw_power_collapse(core)) - d_vpr_e("%s: hardware power collapse unsuccessful\n", __func__); + __enable_hw_power_collapse(core); return rc; fail_protect_mem: if (core->dt->fw_cookie) - subsystem_put(core->dt->fw_cookie); - core->dt->fw_cookie = NULL; + qcom_scm_pas_shutdown(core->dt->fw_cookie); + core->dt->fw_cookie = 0; fail_load_fw: call_venus_op(core, power_off, core); fail_venus_power_on: @@ -2309,10 +2414,12 @@ static void __unload_fw(struct msm_vidc_core *core) if (core->state != MSM_VIDC_CORE_DEINIT) flush_workqueue(core->pm_workq); - subsystem_put(core->dt->fw_cookie); + qcom_scm_pas_shutdown(core->dt->fw_cookie); + core->dt->fw_cookie = 0; + __interface_queues_release(core); call_venus_op(core, power_off, core); - core->dt->fw_cookie = NULL; + __deinit_resources(core); d_vpr_h("Firmware unloaded successfully\n"); From 9f4ffee965e78e21ce473cbb03f9fb1070698ef7 Mon Sep 17 00:00:00 2001 From: Chinmay Sawarkar Date: Wed, 4 Nov 2020 16:07:33 -0800 Subject: [PATCH 0026/1061] video: driver: Add V4L2_MEMORY_DMABUF support Use V4L2_MEMORY_DMABUF memory instead of V4L2_MEMORY_USERPTR in all video usecases. Change-Id: If763047f3f94ed2a19c239f8ce41d89fc2f086c4 Signed-off-by: Chinmay Sawarkar --- driver/vidc/inc/msm_vidc_vb2.h | 5 +++++ driver/vidc/src/msm_vidc_driver.c | 2 +- driver/vidc/src/msm_vidc_platform.c | 4 ++++ driver/vidc/src/msm_vidc_vb2.c | 19 +++++++++++++++++++ 4 files changed, 29 insertions(+), 1 deletion(-) diff --git a/driver/vidc/inc/msm_vidc_vb2.h b/driver/vidc/inc/msm_vidc_vb2.h index f6e833aeb5..2611d5f30a 100644 --- a/driver/vidc/inc/msm_vidc_vb2.h +++ b/driver/vidc/inc/msm_vidc_vb2.h @@ -13,6 +13,11 @@ void *msm_vb2_get_userptr(struct device *dev, unsigned long vaddr, unsigned long size, enum dma_data_direction dma_dir); void msm_vb2_put_userptr(void *buf_priv); +void* msm_vb2_attach_dmabuf(struct device* dev, struct dma_buf* dbuf, + unsigned long size, enum dma_data_direction dma_dir); +void msm_vb2_detach_dmabuf(void* buf_priv); +int msm_vb2_map_dmabuf(void* buf_priv); +void msm_vb2_unmap_dmabuf(void* buf_priv); /* vb2_ops */ int msm_vidc_queue_setup(struct vb2_queue *q, diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 7f04852400..03bab7ba2c 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -1047,7 +1047,7 @@ static int vb2q_init(struct msm_vidc_inst *inst, core = inst->core; q->type = type; - q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF; + q->io_modes = VB2_DMABUF; q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY; q->ops = core->vb2_ops; q->mem_ops = core->vb2_mem_ops; diff --git a/driver/vidc/src/msm_vidc_platform.c b/driver/vidc/src/msm_vidc_platform.c index d469207f75..cb32c4fc2d 100644 --- a/driver/vidc/src/msm_vidc_platform.c +++ b/driver/vidc/src/msm_vidc_platform.c @@ -69,6 +69,10 @@ static struct vb2_ops msm_vb2_ops = { static struct vb2_mem_ops msm_vb2_mem_ops = { .get_userptr = msm_vb2_get_userptr, .put_userptr = msm_vb2_put_userptr, + .attach_dmabuf = msm_vb2_attach_dmabuf, + .detach_dmabuf = msm_vb2_detach_dmabuf, + .map_dmabuf = msm_vb2_map_dmabuf, + .unmap_dmabuf = msm_vb2_unmap_dmabuf, }; static int msm_vidc_init_ops(struct msm_vidc_core *core) diff --git a/driver/vidc/src/msm_vidc_vb2.c b/driver/vidc/src/msm_vidc_vb2.c index 9f96d7bc59..159e64c1a2 100644 --- a/driver/vidc/src/msm_vidc_vb2.c +++ b/driver/vidc/src/msm_vidc_vb2.c @@ -22,6 +22,25 @@ void msm_vb2_put_userptr(void *buf_priv) { } +void* msm_vb2_attach_dmabuf(struct device* dev, struct dma_buf* dbuf, + unsigned long size, enum dma_data_direction dma_dir) +{ + return (void*)0xdeadbeef; +} + +void msm_vb2_detach_dmabuf(void* buf_priv) +{ +} + +int msm_vb2_map_dmabuf(void* buf_priv) +{ + return 0; +} + +void msm_vb2_unmap_dmabuf(void* buf_priv) +{ +} + int msm_vidc_queue_setup(struct vb2_queue *q, unsigned int *num_buffers, unsigned int *num_planes, unsigned int sizes[], struct device *alloc_devs[]) From 3858225fafc010835133f00a130b2a3c08dc170d Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Tue, 10 Nov 2020 16:41:47 -0800 Subject: [PATCH 0027/1061] driver: video: handle input port settings change add support for input port settings change raised by fw. update driver subscribed port settings properties with instance. Raise event to client. Release, get, create and queue input internal buffers. Send resume commond to fw on input port. Add support to destroy internal buffers. Change-Id: Ic979cf2d0c7298b8083347173a973d553ed52af8 Signed-off-by: Darshana Patil --- driver/platform/waipio/src/msm_vidc_waipio.c | 4 + driver/vidc/inc/msm_vdec.h | 2 + driver/vidc/inc/msm_vidc_driver.h | 2 + driver/vidc/inc/msm_vidc_inst.h | 6 +- driver/vidc/inc/msm_vidc_internal.h | 16 +- driver/vidc/src/msm_vdec.c | 184 +++++++++++-- driver/vidc/src/msm_vidc.c | 2 + driver/vidc/src/msm_vidc_driver.c | 204 ++++++++++----- driver/vidc/src/venus_hfi_response.c | 261 +++++++++++++++++++ 9 files changed, 591 insertions(+), 90 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index a235701a4e..228baec1cf 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -905,6 +905,10 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { DEFAULT_VIDEO_CONCEAL_COLOR_BLACK, V4L2_CID_MPEG_VIDEO_MUTE_YUV, HFI_PROP_CONCEAL_COLOR_10BIT}, + + {STAGE, DEC|ENC, CODECS_ALL, 1, 2, 1, 2}, + {PIPE, DEC|ENC, CODECS_ALL, 1, 4, 1, 4}, + {POC, DEC, H264, 0, 1, 1, 0}, }; /* diff --git a/driver/vidc/inc/msm_vdec.h b/driver/vidc/inc/msm_vdec.h index 921b482722..576818f91f 100644 --- a/driver/vidc/inc/msm_vdec.h +++ b/driver/vidc/inc/msm_vdec.h @@ -18,5 +18,7 @@ int msm_vdec_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f); int msm_vdec_g_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f); int msm_vdec_enum_fmt(struct msm_vidc_inst *inst, struct v4l2_fmtdesc *f); int msm_vdec_inst_init(struct msm_vidc_inst *inst); +int msm_vdec_input_port_settings_change(struct msm_vidc_inst *inst); +int msm_vdec_output_port_settings_change(struct msm_vidc_inst *inst); #endif // _MSM_VDEC_H_ \ No newline at end of file diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index a41ba4ba3c..2793357042 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -132,6 +132,8 @@ int msm_vidc_map_driver_buf(struct msm_vidc_inst *inst, int msm_vidc_put_driver_buf(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buf); int msm_vidc_queue_buffer(struct msm_vidc_inst *inst, struct vb2_buffer *vb2); +int msm_vidc_destroy_internal_buffer(struct msm_vidc_inst *inst, + struct msm_vidc_buffer *buffer); struct msm_vidc_buffer *get_meta_buffer(struct msm_vidc_inst *inst, struct msm_vidc_buffer *vbuf); struct msm_vidc_inst *get_inst(struct msm_vidc_core *core, diff --git a/driver/vidc/inc/msm_vidc_inst.h b/driver/vidc/inc/msm_vidc_inst.h index e312d8de52..4b7f4d811b 100644 --- a/driver/vidc/inc/msm_vidc_inst.h +++ b/driver/vidc/inc/msm_vidc_inst.h @@ -111,8 +111,7 @@ struct msm_vidc_inst { bool subscribed_output_psc; bool subscribed_input_prop; bool subscribed_output_prop; - struct msm_vidc_subscription_params vidc_subcr[MAX_PORT]; - struct msm_vidc_subscription_params hfi_subcr[MAX_PORT]; + struct msm_vidc_subscription_params subcr_params[MAX_PORT]; struct msm_vidc_decode_batch decode_batch; struct msm_vidc_decode_vpp_delay decode_vpp_delay; struct msm_vidc_session_idle session_idle; @@ -124,6 +123,9 @@ struct msm_vidc_inst { struct msm_vidc_debug debug; struct msm_vidc_inst_capability *capabilities; struct completion completions[MAX_SIGNAL]; + u32 hfi_cmd_type; + u32 hfi_port; + }; #endif // _MSM_VIDC_INST_H_ diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index ef82e1c20a..1249193ecd 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -323,6 +323,9 @@ enum msm_vidc_inst_capability_type { DISPLAY_DELAY, CONCEAL_COLOR_8BIT, CONCEAL_COLOR_10BIT, + STAGE, + PIPE, + POC, INST_CAP_MAX, }; @@ -539,16 +542,17 @@ struct msm_vidc_properties { }; struct msm_vidc_subscription_params { - u32 align_width; - u32 align_height; - struct msm_vidc_crop crop; - struct msm_vidc_color_info color_info; + u32 bitstream_resolution; + u64 crop_offsets; u32 bit_depth; u32 cabac; - u32 interlace; - u32 min_count; + u32 coded_frames; + u32 fw_min_count; u32 pic_order_cnt; + u32 color_info; u32 profile; + u32 level; + u32 tier; }; struct msm_vidc_decode_vpp_delay { diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 8aa069defb..b1a76f9c3b 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -82,6 +82,7 @@ static int msm_vdec_set_bitstream_resolution(struct msm_vidc_inst *inst, s_vpr_h(inst->sid, "%s: width: %d height: %d\n", __func__, inst->fmts[INPUT_PORT].fmt.pix_mp.width, inst->fmts[INPUT_PORT].fmt.pix_mp.height); + inst->subcr_params[port].bitstream_resolution = resolution; rc = venus_hfi_session_property(inst, HFI_PROP_BITSTREAM_RESOLUTION, HFI_HOST_FLAGS_NONE, @@ -135,7 +136,7 @@ static int msm_vdec_set_crop_offsets(struct msm_vidc_inst *inst, { int rc = 0; u32 left_offset, top_offset, right_offset, bottom_offset; - u32 payload[2]; + u64 payload; if (inst->fmts[INPUT_PORT].fmt.pix_mp.width < inst->crop.width) @@ -152,16 +153,17 @@ static int msm_vdec_set_crop_offsets(struct msm_vidc_inst *inst, bottom_offset = (inst->fmts[INPUT_PORT].fmt.pix_mp.height - inst->crop.height); - payload[0] = right_offset << 16 | bottom_offset; - payload[1] = left_offset << 16 | top_offset; + payload = (u64)right_offset << 48 | (u64)bottom_offset << 32 | + (u64)left_offset << 16 | top_offset; s_vpr_h(inst->sid, "%s: left_offset: %d top_offset: %d " "right_offset: %d bottom_offset: %d", __func__, left_offset, top_offset, right_offset, bottom_offset); + inst->subcr_params[port].crop_offsets = payload; rc = venus_hfi_session_property(inst, HFI_PROP_CROP_OFFSETS, HFI_HOST_FLAGS_NONE, get_hfi_port(inst, port), - HFI_PAYLOAD_U64, + HFI_PAYLOAD_64_PACKED, &payload, sizeof(u64)); if (rc) @@ -186,6 +188,8 @@ static int msm_vdec_set_bit_depth(struct msm_vidc_inst *inst, if (colorformat == V4L2_PIX_FMT_VIDC_P010 || colorformat == V4L2_PIX_FMT_VIDC_TP10C) bitdepth = 10 << 16 | 10; + + inst->subcr_params[port].bit_depth = bitdepth; s_vpr_h(inst->sid, "%s: bit depth: %d", __func__, bitdepth); rc = venus_hfi_session_property(inst, HFI_PROP_LUMA_CHROMA_BIT_DEPTH, @@ -214,6 +218,8 @@ static int msm_vdec_set_cabac(struct msm_vidc_inst *inst, rc = msm_vidc_v4l2_menu_to_hfi(inst, ENTROPY_MODE, &cabac); if (rc) return rc; + + inst->subcr_params[port].cabac = cabac; s_vpr_h(inst->sid, "%s: entropy mode: %d", __func__, cabac); rc = venus_hfi_session_property(inst, HFI_PROP_CABAC_SESSION, @@ -241,6 +247,7 @@ static int msm_vdec_set_coded_frames(struct msm_vidc_inst *inst, /* (mb_adaptive_frame_field_flag << 1) | frame_mbs_only_flag */ coded_frames = 0; + inst->subcr_params[port].coded_frames = coded_frames; s_vpr_h(inst->sid, "%s: coded frames: %d", __func__, coded_frames); rc = venus_hfi_session_property(inst, HFI_PROP_CODED_FRAMES, @@ -267,6 +274,7 @@ static int msm_vdec_set_min_output_count(struct msm_vidc_inst *inst, } min_output = inst->buffers.output.min_count; + inst->subcr_params[port].fw_min_count = min_output; s_vpr_h(inst->sid, "%s: firmware min output count: %d", __func__, min_output); rc = venus_hfi_session_property(inst, @@ -293,6 +301,7 @@ static int msm_vdec_set_picture_order_count(struct msm_vidc_inst *inst, return -EINVAL; } + inst->subcr_params[port].pic_order_cnt = poc; s_vpr_h(inst->sid, "%s: picture order count: %d", __func__, poc); rc = venus_hfi_session_property(inst, HFI_PROP_PIC_ORDER_CNT_TYPE, @@ -311,7 +320,7 @@ static int msm_vdec_set_colorspace(struct msm_vidc_inst *inst, enum msm_vidc_port_type port) { int rc = 0; - u32 colorspace; + u32 colorspace, xfer_func, ycbcr_enc, color_info; if (port != INPUT_PORT && port != OUTPUT_PORT) { s_vpr_e(inst->sid, "%s: invalid port %d\n", __func__, port); @@ -319,13 +328,19 @@ static int msm_vdec_set_colorspace(struct msm_vidc_inst *inst, } colorspace = inst->fmts[OUTPUT_PORT].fmt.pix_mp.colorspace; - s_vpr_h(inst->sid, "%s: colorspace: %d", __func__, colorspace); + xfer_func = inst->fmts[OUTPUT_PORT].fmt.pix_mp.xfer_func; + ycbcr_enc = inst->fmts[OUTPUT_PORT].fmt.pix_mp.ycbcr_enc; + + color_info = ((ycbcr_enc << 16) & 0xFF0000) | + ((xfer_func << 8) & 0xFF00) | (colorspace & 0xFF); + inst->subcr_params[port].color_info = color_info; + s_vpr_h(inst->sid, "%s: color info: %d", __func__, color_info); rc = venus_hfi_session_property(inst, HFI_PROP_SIGNAL_COLOR_INFO, HFI_HOST_FLAGS_NONE, get_hfi_port(inst, port), HFI_PAYLOAD_U32, - &colorspace, + &color_info, sizeof(u32)); if (rc) s_vpr_e(inst->sid, "%s: set property failed\n", __func__); @@ -345,6 +360,7 @@ static int msm_vdec_set_profile(struct msm_vidc_inst *inst, } profile = inst->capabilities->cap[PROFILE].value; + inst->subcr_params[port].profile = profile; s_vpr_h(inst->sid, "%s: profile: %d", __func__, profile); rc = venus_hfi_session_property(inst, HFI_PROP_PROFILE, @@ -371,6 +387,7 @@ static int msm_vdec_set_level(struct msm_vidc_inst *inst, } level = inst->capabilities->cap[LEVEL].value; + inst->subcr_params[port].level = level; s_vpr_h(inst->sid, "%s: level: %d", __func__, level); rc = venus_hfi_session_property(inst, HFI_PROP_LEVEL, @@ -397,6 +414,7 @@ static int msm_vdec_set_tier(struct msm_vidc_inst *inst, } tier = inst->capabilities->cap[HEVC_TIER].value; + inst->subcr_params[port].tier = tier; s_vpr_h(inst->sid, "%s: tier: %d", __func__, tier); rc = venus_hfi_session_property(inst, HFI_PROP_TIER, @@ -818,7 +836,7 @@ static int msm_vdec_queue_input_internal_buffers(struct msm_vidc_inst *inst) return 0; } -/* + static int msm_vdec_release_input_internal_buffers(struct msm_vidc_inst *inst) { int rc = 0; @@ -829,21 +847,26 @@ static int msm_vdec_release_input_internal_buffers(struct msm_vidc_inst *inst) return -EINVAL; } - rc = msm_vidc_release_internal_buffers(inst, MSM_VIDC_BUF_SCRATCH); + rc = msm_vidc_release_internal_buffers(inst, MSM_VIDC_BUF_BIN); if (rc) return rc; - rc = msm_vidc_release_internal_buffers(inst, MSM_VIDC_BUF_SCRATCH_1); + rc = msm_vidc_release_internal_buffers(inst, MSM_VIDC_BUF_COMV); if (rc) return rc; - rc = msm_vidc_release_internal_buffers(inst, MSM_VIDC_BUF_PERSIST_1); + rc = msm_vidc_release_internal_buffers(inst, MSM_VIDC_BUF_NON_COMV); + if (rc) + return rc; + rc = msm_vidc_release_internal_buffers(inst, MSM_VIDC_BUF_LINE); + if (rc) + return rc; + rc = msm_vidc_release_internal_buffers(inst, MSM_VIDC_BUF_PERSIST); if (rc) return rc; return 0; } -*/ -static int msm_vdec_port_settings_subscription(struct msm_vidc_inst *inst, +static int msm_vdec_subscribe_port_settings_change(struct msm_vidc_inst *inst, enum msm_vidc_port_type port) { int rc = 0; @@ -918,7 +941,7 @@ static int msm_vdec_port_settings_subscription(struct msm_vidc_inst *inst, return rc; } -static int msm_vdec_property_subscription(struct msm_vidc_inst *inst, +static int msm_vdec_subscribe_property(struct msm_vidc_inst *inst, enum msm_vidc_port_type port) { int rc = 0; @@ -948,7 +971,7 @@ static int msm_vdec_property_subscription(struct msm_vidc_inst *inst, return rc; } -static int msm_vdec_metadata_subscription(struct msm_vidc_inst *inst, +static int msm_vdec_subscribe_metadata(struct msm_vidc_inst *inst, enum msm_vidc_port_type port) { int rc = 0; @@ -978,7 +1001,7 @@ static int msm_vdec_metadata_subscription(struct msm_vidc_inst *inst, return rc; } -static int msm_vdec_metadata_delivery(struct msm_vidc_inst *inst, +static int msm_vdec_set_delivery_mode_metadata(struct msm_vidc_inst *inst, enum msm_vidc_port_type port) { int rc = 0; @@ -1008,6 +1031,125 @@ static int msm_vdec_metadata_delivery(struct msm_vidc_inst *inst, return rc; } +static int msm_vdec_session_resume(struct msm_vidc_inst *inst, + enum msm_vidc_port_type port) +{ + int rc = 0; + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + d_vpr_h("%s()\n", __func__); + + rc = venus_hfi_session_command(inst, + HFI_CMD_RESUME, + port, + HFI_PAYLOAD_NONE, + NULL, + 0); + + return rc; +} + +static msm_vdec_update_input_properties(struct msm_vidc_inst *inst) +{ + struct msm_vidc_subscription_params subsc_params; + u32 width, height; + + subsc_params = inst->subcr_params[INPUT_PORT]; + width = (subsc_params.bitstream_resolution & + HFI_BITMASK_BITSTREAM_WIDTH) >> 16; + height = subsc_params.bitstream_resolution & + HFI_BITMASK_BITSTREAM_HEIGHT; + + inst->fmts[INPUT_PORT].fmt.pix_mp.width = width; + inst->fmts[INPUT_PORT].fmt.pix_mp.height = height; + + inst->fmts[OUTPUT_PORT].fmt.pix_mp.width = VENUS_Y_STRIDE( + v4l2_colorformat_to_media( + inst->fmts[OUTPUT_PORT].fmt.pix_mp.pixelformat, __func__), + width); + inst->fmts[OUTPUT_PORT].fmt.pix_mp.height = VENUS_Y_SCANLINES( + v4l2_colorformat_to_media( + inst->fmts[OUTPUT_PORT].fmt.pix_mp.pixelformat, __func__), + height); + //inst->fmts[OUTPUT_PORT].fmt.pix_mp.bytesperline = + //inst->fmts[OUTPUT_PORT].fmt.pix_mp.width; + + inst->fmts[OUTPUT_PORT].fmt.pix_mp.colorspace = + (subsc_params.color_info & 0xFF0000) >> 16; + inst->fmts[OUTPUT_PORT].fmt.pix_mp.xfer_func = + (subsc_params.color_info & 0xFF00) >> 8; + inst->fmts[OUTPUT_PORT].fmt.pix_mp.ycbcr_enc = + subsc_params.color_info & 0xFF; + + inst->buffers.output.min_count = subsc_params.fw_min_count; + + inst->crop.top = subsc_params.crop_offsets & 0xFFFF; + inst->crop.left = (subsc_params.crop_offsets >> 16) & 0xFFFF; + inst->crop.height = inst->fmts[INPUT_PORT].fmt.pix_mp.height - + ((subsc_params.crop_offsets >> 32) & 0xFFFF); + inst->crop.width = inst->fmts[INPUT_PORT].fmt.pix_mp.width - + ((subsc_params.crop_offsets >> 48) & 0xFFFF); + + inst->capabilities->cap[PROFILE].value = subsc_params.profile; + inst->capabilities->cap[LEVEL].value = subsc_params.level; + inst->capabilities->cap[HEVC_TIER].value = subsc_params.tier; + inst->capabilities->cap[ENTROPY_MODE].value = subsc_params.cabac; + inst->capabilities->cap[POC].value = subsc_params.pic_order_cnt; + + return 0; +} + +int msm_vdec_input_port_settings_change(struct msm_vidc_inst *inst) +{ + u32 rc = 0; + struct v4l2_event event = {0}; + + if (!inst->vb2q[INPUT_PORT].streaming) { + s_vpr_e(inst->sid, "%s: input port not streaming\n", + __func__); + return 0; + } + + rc = msm_vdec_update_input_properties(inst); + if (rc) + return rc; + + event.type = V4L2_EVENT_SRC_CH_RESOLUTION;//todo + event.u.src_change.changes = V4L2_EVENT_SRC_CH_RESOLUTION; + v4l2_event_queue_fh(&inst->event_handler, &event); + + rc = msm_vdec_release_input_internal_buffers(inst); + if (rc) + return rc; + + rc = msm_vdec_get_input_internal_buffers(inst); + if (rc) + return rc; + + rc = msm_vdec_create_input_internal_buffers(inst); + if (rc) + return rc; + + rc = msm_vdec_queue_input_internal_buffers(inst); + if (rc) + return rc; + + rc = msm_vdec_session_resume(inst, INPUT_PORT); + if (rc) + return rc; + + return rc; +} + +int msm_vdec_output_port_settings_change(struct msm_vidc_inst *inst) +{ + //todo + return 0; +} + int msm_vdec_stop_input(struct msm_vidc_inst *inst) { int rc = 0; @@ -1070,15 +1212,15 @@ int msm_vdec_start_input(struct msm_vidc_inst *inst) if (rc) goto error; - rc = msm_vdec_port_settings_subscription(inst, INPUT_PORT); + rc = msm_vdec_subscribe_port_settings_change(inst, INPUT_PORT); if (rc) return rc; - rc = msm_vdec_property_subscription(inst, INPUT_PORT); + rc = msm_vdec_subscribe_property(inst, INPUT_PORT); if (rc) return rc; - rc = msm_vdec_metadata_delivery(inst, INPUT_PORT); + rc = msm_vdec_set_delivery_mode_metadata(inst, INPUT_PORT); if (rc) return rc; @@ -1125,11 +1267,11 @@ int msm_vdec_start_output(struct msm_vidc_inst *inst) if (rc) goto error; - rc = msm_vdec_port_settings_subscription(inst, OUTPUT_PORT); + rc = msm_vdec_subscribe_port_settings_change(inst, OUTPUT_PORT); if (rc) return rc; - rc = msm_vdec_metadata_subscription(inst, OUTPUT_PORT); + rc = msm_vdec_subscribe_metadata(inst, OUTPUT_PORT); if (rc) return rc; diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index cdfc9c3d94..a1d02e522e 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -789,6 +789,8 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) inst->domain = session_type; inst->state = MSM_VIDC_OPEN; inst->request = false; + inst->hfi_cmd_type = 0; + inst->hfi_port = 0; for (i = 0; i < MAX_SIGNAL; i++) init_completion(&inst->completions[i]); diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 03bab7ba2c..45473833fe 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -34,14 +34,14 @@ void print_vidc_buffer(u32 tag, const char *str, struct msm_vidc_inst *inst, mbuf = get_meta_buffer(inst, vbuf); if (!mbuf) dprintk(tag, inst->sid, - "%s: %s: idx %2d fd %3d off %d daddr %#x size %d filled %d flags %#x ts %lld attr %#x\n", + "%s: %s: idx %2d fd %3d off %d daddr %#llx size %d filled %d flags %#x ts %lld attr %#x\n", str, vbuf->type == MSM_VIDC_BUF_INPUT ? "INPUT" : "OUTPUT", vbuf->index, vbuf->fd, vbuf->data_offset, vbuf->device_addr, vbuf->buffer_size, vbuf->data_size, vbuf->flags, vbuf->timestamp, vbuf->attr); else dprintk(tag, inst->sid, - "%s: %s: idx %2d fd %3d off %d daddr %#x size %d filled %d flags %#x ts %lld attr %#x meta: fd %3d daddr %#x size %d\n", + "%s: %s: idx %2d fd %3d off %d daddr %#llx size %d filled %d flags %#x ts %lld attr %#x meta: fd %3d daddr %#llx size %d\n", str, vbuf->type == MSM_VIDC_BUF_INPUT ? "INPUT" : "OUTPUT", vbuf->index, vbuf->fd, vbuf->data_offset, vbuf->device_addr, vbuf->buffer_size, vbuf->data_size, @@ -784,14 +784,78 @@ int msm_vidc_queue_buffer(struct msm_vidc_inst *inst, struct vb2_buffer *vb2) return rc; } -int msm_vidc_create_internal_buffers(struct msm_vidc_inst *inst, - enum msm_vidc_buffer_type buffer_type) +int msm_vidc_destroy_internal_buffer(struct msm_vidc_inst *inst, + struct msm_vidc_buffer *buffer) +{ + struct msm_vidc_buffers *buffers; + struct msm_vidc_allocations *allocations; + struct msm_vidc_mappings *mappings; + struct msm_vidc_alloc *alloc, *alloc_dummy; + struct msm_vidc_map *map, *map_dummy; + struct msm_vidc_buffer *buf, *dummy; + + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (!is_internal_buffer(buffer->type)) { + s_vpr_e(inst->sid, "%s: buffer type %#x is not internal\n", + __func__, buffer->type); + return 0; + } + + s_vpr_h(inst->sid, + "%s: destroy buffer_type %#x, size %d device_addr %#x\n", + __func__, buffer->type, buffer->buffer_size, + buffer->device_addr); + + buffers = msm_vidc_get_buffers(inst, buffer->type, __func__); + if (!buffers) + return -EINVAL; + allocations = msm_vidc_get_allocations(inst, buffer->type, __func__); + if (!allocations) + return -EINVAL; + mappings = msm_vidc_get_mappings(inst, buffer->type, __func__); + if (!mappings) + return -EINVAL; + + list_for_each_entry_safe(map, map_dummy, &mappings->list, list) { + if (map->dmabuf == buffer->dmabuf) { + msm_vidc_memory_unmap(inst->core, map); + list_del(&map->list); + kfree(map); + } + } + + list_for_each_entry_safe(alloc, alloc_dummy, &allocations->list, list) { + if (alloc->dmabuf == buffer->dmabuf) { + msm_vidc_memory_free(inst->core, alloc); + list_del(&alloc->list); + kfree(alloc); + } + } + + list_for_each_entry_safe(buf, dummy, &buffers->list, list) { + if (buf->dmabuf == buffer->dmabuf) { + list_del(&buf->list); + kfree(buf); + } + } + + return 0; +} + +int msm_vidc_create_internal_buffer(struct msm_vidc_inst *inst, + enum msm_vidc_buffer_type buffer_type, u32 index) { int rc = 0; struct msm_vidc_buffers *buffers; struct msm_vidc_allocations *allocations; struct msm_vidc_mappings *mappings; - int i; + struct msm_vidc_buffer *buffer; + struct msm_vidc_alloc *alloc; + struct msm_vidc_map *map; d_vpr_h("%s()\n", __func__); if (!inst || !inst->core) { @@ -814,67 +878,85 @@ int msm_vidc_create_internal_buffers(struct msm_vidc_inst *inst, if (!mappings) return -EINVAL; - for (i = 0; i < buffers->min_count; i++) { - struct msm_vidc_buffer *buffer; - struct msm_vidc_alloc *alloc; - struct msm_vidc_map *map; - - if (!buffers->size) { - s_vpr_e(inst->sid, "%s: invalid buffer %#x\n", - __func__, buffer_type); - return -EINVAL; - } - buffer = kzalloc(sizeof(struct msm_vidc_buffer), GFP_KERNEL); - if (!buffer) { - s_vpr_e(inst->sid, "%s: buf alloc failed\n", __func__); - return -ENOMEM; - } - INIT_LIST_HEAD(&buffer->list); - buffer->valid = true; - buffer->type = buffer_type; - buffer->index = i; - buffer->buffer_size = buffers->size; - list_add_tail(&buffer->list, &buffers->list); - - alloc = kzalloc(sizeof(struct msm_vidc_alloc), GFP_KERNEL); - if (!alloc) { - s_vpr_e(inst->sid, "%s: alloc failed\n", __func__); - return -ENOMEM; - } - INIT_LIST_HEAD(&alloc->list); - alloc->type = buffer_type; - alloc->region = msm_vidc_get_buffer_region(inst, - buffer_type, __func__); - alloc->size = buffer->buffer_size; - rc = msm_vidc_memory_alloc(inst->core, alloc); - if (rc) - return -ENOMEM; - list_add_tail(&alloc->list, &allocations->list); - - map = kzalloc(sizeof(struct msm_vidc_map), GFP_KERNEL); - if (!map) { - s_vpr_e(inst->sid, "%s: map alloc failed\n", __func__); - return -ENOMEM; - } - INIT_LIST_HEAD(&map->list); - map->type = alloc->type; - map->region = alloc->region; - map->dmabuf = alloc->dmabuf; - rc = msm_vidc_memory_map(inst->core, map); - if (rc) - return -ENOMEM; - list_add_tail(&map->list, &mappings->list); - - buffer->device_addr = map->device_addr; - s_vpr_h(inst->sid, - "%s: created buffer_type %#x, size %d device_addr %#x\n", - __func__, buffer_type, buffers->size, - buffer->device_addr); + if (!buffers->size) { + s_vpr_e(inst->sid, "%s: invalid buffer %#x\n", + __func__, buffer_type); + return -EINVAL; } + buffer = kzalloc(sizeof(struct msm_vidc_buffer), GFP_KERNEL); + if (!buffer) { + s_vpr_e(inst->sid, "%s: buf alloc failed\n", __func__); + return -ENOMEM; + } + INIT_LIST_HEAD(&buffer->list); + buffer->valid = true; + buffer->type = buffer_type; + buffer->index = index; + buffer->buffer_size = buffers->size; + list_add_tail(&buffer->list, &buffers->list); + + alloc = kzalloc(sizeof(struct msm_vidc_alloc), GFP_KERNEL); + if (!alloc) { + s_vpr_e(inst->sid, "%s: alloc failed\n", __func__); + return -ENOMEM; + } + INIT_LIST_HEAD(&alloc->list); + alloc->type = buffer_type; + alloc->region = msm_vidc_get_buffer_region(inst, + buffer_type, __func__); + alloc->size = buffer->buffer_size; + rc = msm_vidc_memory_alloc(inst->core, alloc); + if (rc) + return -ENOMEM; + list_add_tail(&alloc->list, &allocations->list); + + map = kzalloc(sizeof(struct msm_vidc_map), GFP_KERNEL); + if (!map) { + s_vpr_e(inst->sid, "%s: map alloc failed\n", __func__); + return -ENOMEM; + } + INIT_LIST_HEAD(&map->list); + map->type = alloc->type; + map->region = alloc->region; + map->dmabuf = alloc->dmabuf; + rc = msm_vidc_memory_map(inst->core, map); + if (rc) + return -ENOMEM; + list_add_tail(&map->list, &mappings->list); + + buffer->dmabuf = alloc->dmabuf; + buffer->device_addr = map->device_addr; + s_vpr_h(inst->sid, + "%s: created buffer_type %#x, size %d device_addr %#x\n", + __func__, buffer_type, buffers->size, + buffer->device_addr); return 0; } +int msm_vidc_create_internal_buffers(struct msm_vidc_inst *inst, + enum msm_vidc_buffer_type buffer_type) +{ + int rc = 0; + struct msm_vidc_buffers *buffers; + int i; + + d_vpr_h("%s()\n", __func__); + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + buffers = msm_vidc_get_buffers(inst, buffer_type, __func__); + if (!buffers) + return -EINVAL; + + for (i = 0; i < buffers->min_count; i++) + rc = msm_vidc_create_internal_buffer(inst, buffer_type, i); + + return rc; +} + int msm_vidc_queue_internal_buffers(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type buffer_type) { diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index 39e7b04313..2b63e7afc1 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -8,6 +8,46 @@ #include "venus_hfi_response.h" #include "msm_vidc_debug.h" #include "msm_vidc_driver.h" +#include "msm_vdec.h" + +u32 vidc_port_from_hfi(struct msm_vidc_inst *inst, + enum hfi_packet_port_type hfi_port) +{ + enum msm_vidc_port_type port = MAX_PORT; + + if (is_decode_session(inst)) { + switch (hfi_port) { + case HFI_PORT_BITSTREAM: + port = INPUT_PORT; + break; + case HFI_PORT_RAW: + port = OUTPUT_PORT; + break; + default: + s_vpr_e(inst->sid, "%s: invalid hfi port type %d\n", + __func__, hfi_port); + break; + } + } else if (is_encode_session(inst)) { + switch (hfi_port) { + case HFI_PORT_RAW: + port = INPUT_PORT; + break; + case HFI_PORT_BITSTREAM: + port = OUTPUT_PORT; + break; + default: + s_vpr_e(inst->sid, "%s: invalid hfi port type %d\n", + __func__, hfi_port); + break; + } + } else { + s_vpr_e(inst->sid, "%s: invalid domain %#x\n", + __func__, inst->domain); + } + + return port; +} bool is_valid_hfi_port(struct msm_vidc_inst *inst, u32 port, const char *func) @@ -426,6 +466,151 @@ static int handle_output_metadata_buffer(struct msm_vidc_inst *inst, return rc; } +static int handle_persist_buffer(struct msm_vidc_inst *inst, + struct hfi_buffer *buffer) +{ + int rc = 0; + struct msm_vidc_buffers *buffers; + struct msm_vidc_buffer *buf; + bool found; + + buffers = msm_vidc_get_buffers(inst, MSM_VIDC_BUF_PERSIST, __func__); + if (!buffers) + return -EINVAL; + + found = false; + list_for_each_entry(buf, &buffers->list, list) { + if (buf->device_addr == buffer->base_address) { + found = true; + break; + } + } + if (found) { + rc = msm_vidc_destroy_internal_buffer(inst, buf); + } else { + s_vpr_e(inst->sid, "%s: invalid idx %d daddr %#x\n", + __func__, buffer->index, buffer->base_address); + return -EINVAL; + } + return rc; +} + +static int handle_line_buffer(struct msm_vidc_inst *inst, + struct hfi_buffer *buffer) +{ + int rc = 0; + struct msm_vidc_buffers *buffers; + struct msm_vidc_buffer *buf; + bool found; + + buffers = msm_vidc_get_buffers(inst, MSM_VIDC_BUF_LINE, __func__); + if (!buffers) + return -EINVAL; + + found = false; + list_for_each_entry(buf, &buffers->list, list) { + if (buf->device_addr == buffer->base_address) { + found = true; + break; + } + } + if (found) { + rc = msm_vidc_destroy_internal_buffer(inst, buf); + } else { + s_vpr_e(inst->sid, "%s: invalid idx %d daddr %#x\n", + __func__, buffer->index, buffer->base_address); + return -EINVAL; + } + return rc; +} + +static int handle_non_comv_buffer(struct msm_vidc_inst *inst, + struct hfi_buffer *buffer) +{ + int rc = 0; + struct msm_vidc_buffers *buffers; + struct msm_vidc_buffer *buf; + bool found; + + buffers = msm_vidc_get_buffers(inst, MSM_VIDC_BUF_NON_COMV, __func__); + if (!buffers) + return -EINVAL; + + found = false; + list_for_each_entry(buf, &buffers->list, list) { + if (buf->device_addr == buffer->base_address) { + found = true; + break; + } + } + if (found) { + rc = msm_vidc_destroy_internal_buffer(inst, buf); + } else { + s_vpr_e(inst->sid, "%s: invalid idx %d daddr %#x\n", + __func__, buffer->index, buffer->base_address); + return -EINVAL; + } + return rc; +} + +static int handle_comv_buffer(struct msm_vidc_inst *inst, + struct hfi_buffer *buffer) +{ + int rc = 0; + struct msm_vidc_buffers *buffers; + struct msm_vidc_buffer *buf; + bool found; + + buffers = msm_vidc_get_buffers(inst, MSM_VIDC_BUF_COMV, __func__); + if (!buffers) + return -EINVAL; + + found = false; + list_for_each_entry(buf, &buffers->list, list) { + if (buf->device_addr == buffer->base_address) { + found = true; + break; + } + } + if (found) { + rc = msm_vidc_destroy_internal_buffer(inst, buf); + } else { + s_vpr_e(inst->sid, "%s: invalid idx %d daddr %#x\n", + __func__, buffer->index, buffer->base_address); + return -EINVAL; + } + return rc; +} + +static int handle_bin_buffer(struct msm_vidc_inst *inst, + struct hfi_buffer *buffer) +{ + int rc = 0; + struct msm_vidc_buffers *buffers; + struct msm_vidc_buffer *buf; + bool found; + + buffers = msm_vidc_get_buffers(inst, MSM_VIDC_BUF_BIN, __func__); + if (!buffers) + return -EINVAL; + + found = false; + list_for_each_entry(buf, &buffers->list, list) { + if (buf->device_addr == buffer->base_address) { + found = true; + break; + } + } + if (found) { + rc = msm_vidc_destroy_internal_buffer(inst, buf); + } else { + s_vpr_e(inst->sid, "%s: invalid idx %d daddr %#x\n", + __func__, buffer->index, buffer->base_address); + return -EINVAL; + } + return rc; +} + static int handle_session_buffer(struct msm_vidc_inst *inst, struct hfi_packet *pkt) { @@ -470,6 +655,16 @@ static int handle_session_buffer(struct msm_vidc_inst *inst, rc = handle_input_metadata_buffer(inst, buffer); else if (buf_type == HFI_BUFFER_BITSTREAM) rc = handle_input_buffer(inst, buffer); + else if (buf_type == HFI_BUFFER_BIN) + rc = handle_bin_buffer(inst, buffer); + else if (buf_type == HFI_BUFFER_COMV) + rc = handle_comv_buffer(inst, buffer); + else if (buf_type == HFI_BUFFER_NON_COMV) + rc = handle_non_comv_buffer(inst, buffer); + else if (buf_type == HFI_BUFFER_LINE) + rc = handle_line_buffer(inst, buffer); + else if (buf_type == HFI_BUFFER_PERSIST) + rc = handle_persist_buffer(inst, buffer); } else if (port_type == HFI_PORT_RAW) { if (buf_type == HFI_BUFFER_METADATA) rc = handle_output_metadata_buffer(inst, buffer); @@ -552,7 +747,54 @@ static int handle_session_command(struct msm_vidc_inst *inst, static int handle_session_property(struct msm_vidc_inst *inst, struct hfi_packet *pkt) { + u32 port; + u32 *payload_ptr; + s_vpr_h(inst->sid, "%s: property type %#x\n", __func__, pkt->type); + + port = vidc_port_from_hfi(inst, pkt->port); + payload_ptr = (u32 *)((u8 *)pkt + sizeof(struct hfi_packet)); + + switch (pkt->type) { + case HFI_PROP_BITSTREAM_RESOLUTION: + inst->subcr_params[port].bitstream_resolution = payload_ptr[0]; + break; + case HFI_PROP_CROP_OFFSETS: + inst->subcr_params[port].crop_offsets = + (u64)payload_ptr[0] << 32 | payload_ptr[1]; + break; + case HFI_PROP_LUMA_CHROMA_BIT_DEPTH: + inst->subcr_params[port].bit_depth = payload_ptr[0]; + break; + case HFI_PROP_CABAC_SESSION: + inst->subcr_params[port].cabac = payload_ptr[0]; + break; + case HFI_PROP_CODED_FRAMES: + inst->subcr_params[port].coded_frames = payload_ptr[0]; + break; + case HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT: + inst->subcr_params[port].fw_min_count = payload_ptr[0]; + break; + case HFI_PROP_PIC_ORDER_CNT_TYPE: + inst->subcr_params[port].pic_order_cnt = payload_ptr[0]; + break; + case HFI_PROP_SIGNAL_COLOR_INFO: + inst->subcr_params[port].color_info = payload_ptr[0]; + break; + case HFI_PROP_PROFILE: + inst->subcr_params[port].profile = payload_ptr[0]; + break; + case HFI_PROP_LEVEL: + inst->subcr_params[port].level = payload_ptr[0]; + break; + case HFI_PROP_TIER: + inst->subcr_params[port].tier = payload_ptr[0]; + break; + default: + s_vpr_e(inst->sid, "%s: invalid port settings property %#x\n", + __func__, pkt->type); + return -EINVAL; + } return 0; } @@ -662,6 +904,8 @@ static int handle_session_response(struct msm_vidc_core *core, } mutex_lock(&inst->lock); + inst->hfi_cmd_type = 0; + inst->hfi_port = 0; pkt = (u8 *)((u8 *)hdr + sizeof(struct hfi_header)); for (i = 0; i < hdr->num_packets; i++) { @@ -673,6 +917,15 @@ static int handle_session_response(struct msm_vidc_core *core, packet = (struct hfi_packet *)pkt; if (packet->type < HFI_CMD_END && packet->type > HFI_CMD_BEGIN) { + if (inst->hfi_cmd_type || inst->hfi_port) { + s_vpr_e(inst->sid, + "%s: invalid cmd %d, port %d \n", + __func__, inst->hfi_cmd_type, + inst->hfi_port); + return -EINVAL; + } + inst->hfi_cmd_type = packet->type; + inst->hfi_port = packet->port; rc = handle_session_command(inst, packet); } else if (packet->type > HFI_PROP_BEGIN && packet->type < HFI_PROP_END) { @@ -688,6 +941,14 @@ static int handle_session_response(struct msm_vidc_core *core, } pkt += packet->size; } + + if (inst->hfi_cmd_type == HFI_CMD_SETTINGS_CHANGE) { + if (inst->hfi_port == HFI_PORT_BITSTREAM) + rc = msm_vdec_input_port_settings_change(inst); + else if (inst->hfi_port == HFI_PORT_RAW) + rc = msm_vdec_output_port_settings_change(inst); + } + exit: mutex_unlock(&inst->lock); put_inst(inst); From bff6f56a2869cc57e29b2b125fc3c72296a5ba70 Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Wed, 2 Dec 2020 15:15:23 -0800 Subject: [PATCH 0028/1061] driver: video: handle drain command handle decoder and encoder drain command. send hfi drain command to firmware. Change-Id: I94835ce0b2a8b06e7a9ad64f7cc8642913987659 Signed-off-by: Darshana Patil --- driver/vidc/inc/msm_vdec.h | 1 + driver/vidc/inc/msm_venc.h | 1 + driver/vidc/src/msm_vdec.c | 28 +++++++++++++++++++++++++++- driver/vidc/src/msm_venc.c | 25 +++++++++++++++++++++++++ driver/vidc/src/msm_vidc.c | 13 +++++++++++++ driver/vidc/src/msm_vidc_buffer.c | 3 +-- 6 files changed, 68 insertions(+), 3 deletions(-) diff --git a/driver/vidc/inc/msm_vdec.h b/driver/vidc/inc/msm_vdec.h index 576818f91f..b16aa22ab3 100644 --- a/driver/vidc/inc/msm_vdec.h +++ b/driver/vidc/inc/msm_vdec.h @@ -20,5 +20,6 @@ int msm_vdec_enum_fmt(struct msm_vidc_inst *inst, struct v4l2_fmtdesc *f); int msm_vdec_inst_init(struct msm_vidc_inst *inst); int msm_vdec_input_port_settings_change(struct msm_vidc_inst *inst); int msm_vdec_output_port_settings_change(struct msm_vidc_inst *inst); +int msm_vdec_process_cmd(struct msm_vidc_inst *inst, u32 cmd); #endif // _MSM_VDEC_H_ \ No newline at end of file diff --git a/driver/vidc/inc/msm_venc.h b/driver/vidc/inc/msm_venc.h index 11d5c2df67..05d2794448 100644 --- a/driver/vidc/inc/msm_venc.h +++ b/driver/vidc/inc/msm_venc.h @@ -13,6 +13,7 @@ int msm_venc_stop_input(struct msm_vidc_inst *inst); int msm_venc_start_input(struct msm_vidc_inst *inst); int msm_venc_stop_output(struct msm_vidc_inst *inst); int msm_venc_start_output(struct msm_vidc_inst *inst); +int msm_venc_process_cmd(struct msm_vidc_inst *inst, u32 cmd); int msm_venc_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f); int msm_venc_g_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f); int msm_venc_enum_fmt(struct msm_vidc_inst *inst, struct v4l2_fmtdesc *f); diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index b1a76f9c3b..6c48caafc8 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -1117,7 +1117,7 @@ int msm_vdec_input_port_settings_change(struct msm_vidc_inst *inst) if (rc) return rc; - event.type = V4L2_EVENT_SRC_CH_RESOLUTION;//todo + event.type = V4L2_EVENT_SOURCE_CHANGE; event.u.src_change.changes = V4L2_EVENT_SRC_CH_RESOLUTION; v4l2_event_queue_fh(&inst->event_handler, &event); @@ -1313,6 +1313,32 @@ int msm_vdec_qbuf(struct msm_vidc_inst *inst, struct vb2_buffer *vb2) return rc; } +int msm_vdec_process_cmd(struct msm_vidc_inst *inst, u32 cmd) +{ + int rc = 0; + + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (cmd == V4L2_DEC_CMD_STOP) { + rc = venus_hfi_session_command(inst, + HFI_CMD_DRAIN, + INPUT_PORT, + HFI_PAYLOAD_NONE, + NULL, + 0); + if (rc) + return rc; + } else { + d_vpr_e("%s: unknown cmd %d\n", __func__, cmd); + return -EINVAL; + } + + return 0; +} + int msm_vdec_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) { int rc = 0; diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index b3c684c7b9..63460244e3 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -613,6 +613,31 @@ error: return rc; } +int msm_venc_process_cmd(struct msm_vidc_inst *inst, u32 cmd) +{ + int rc = 0; + + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (cmd == V4L2_ENC_CMD_STOP) { + rc = venus_hfi_session_command(inst, + HFI_CMD_DRAIN, + INPUT_PORT, + HFI_PAYLOAD_NONE, + NULL, + 0); + if (rc) + return rc; + } else { + d_vpr_e("%s: unknown cmd %d\n", __func__, cmd); + return -EINVAL; + } + return 0; +} + int msm_venc_stop_output(struct msm_vidc_inst *inst) { int rc = 0; diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index a1d02e522e..d6ccd5ee0a 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -610,6 +610,19 @@ EXPORT_SYMBOL(msm_vidc_streamoff); int msm_vidc_cmd(void *instance, union msm_v4l2_cmd *cmd) { + int rc = 0; + struct msm_vidc_inst *inst = instance; + struct v4l2_decoder_cmd *dec = NULL; + struct v4l2_encoder_cmd *enc = NULL; + + if (is_decode_session(inst)) { + dec = (struct v4l2_decoder_cmd *)cmd; + rc = msm_vdec_process_cmd(inst, dec->cmd); + } else if (is_encode_session(inst)) { + enc = (struct v4l2_encoder_cmd *)cmd; + rc = msm_venc_process_cmd(inst, enc->cmd); + } + return 0; } EXPORT_SYMBOL(msm_vidc_cmd); diff --git a/driver/vidc/src/msm_vidc_buffer.c b/driver/vidc/src/msm_vidc_buffer.c index fc3d7f0858..e6b34f0d2b 100644 --- a/driver/vidc/src/msm_vidc_buffer.c +++ b/driver/vidc/src/msm_vidc_buffer.c @@ -140,8 +140,7 @@ u32 msm_vidc_output_extra_count(struct msm_vidc_inst *inst) u32 msm_vidc_decoder_input_size(struct msm_vidc_inst *inst) { - u32 size = ALIGN(15 * 1024 * 1024, SZ_4K); - size = 4; // TODO + u32 size = ALIGN(1 * 1024 * 1024, SZ_4K); return size; } From 0003d4f658b9e8446720ed06535c458ef4a38c31 Mon Sep 17 00:00:00 2001 From: Karthikeyan Periasamy Date: Wed, 18 Nov 2020 00:30:43 -0800 Subject: [PATCH 0029/1061] msm-vidc: Enable standalone compilation for video Added support for compiling video as kernel loadable module. Change-Id: I5b9183d56d14e5e413b786b9ac2b449c6f8ab8ba Signed-off-by: Karthikeyan Periasamy --- Android.mk | 32 ++++++++++++++++++++ Kbuild | 35 +++++++++++++++++++++ Makefile | 52 ++++++-------------------------- driver/vidc/src/msm_vidc_probe.c | 5 +-- 4 files changed, 80 insertions(+), 44 deletions(-) create mode 100644 Android.mk create mode 100644 Kbuild diff --git a/Android.mk b/Android.mk new file mode 100644 index 0000000000..529f50ee2b --- /dev/null +++ b/Android.mk @@ -0,0 +1,32 @@ +# SPDX-License-Identifier: GPL-2.0-only + +VIDEO_BLD_DIR := $(shell pwd)/vendor/qcom/opensource/video-driver +VIDEO_SELECT := CONFIG_MSM_VIDC_V4L2=m + +# Build msm_video.ko +########################################################### +# This is set once per LOCAL_PATH, not per (kernel) module +KBUILD_OPTIONS := VIDEO_ROOT=$(VIDEO_BLD_DIR) + +KBUILD_OPTIONS += MODNAME=msm_video +KBUILD_OPTIONS += BOARD_PLATFORM=$(TARGET_BOARD_PLATFORM) +KBUILD_OPTIONS += $(VIDEO_SELECT) + +########################################################### + +DLKM_DIR := device/qcom/common/dlkm + +LOCAL_PATH := $(call my-dir) + +include $(CLEAR_VARS) +# For incremental compilation +LOCAL_SRC_FILES := $(wildcard $(LOCAL_PATH)/**/*) $(wildcard $(LOCAL_PATH)/*) +LOCAL_MODULE := msm_video.ko +LOCAL_MODULE_KBUILD_NAME := msm_video.ko +LOCAL_MODULE_TAGS := optional +LOCAL_MODULE_DEBUG_ENABLE := true +LOCAL_MODULE_PATH := $(KERNEL_MODULES_OUT) + +# Include kp_module.ko in the /vendor/lib/modules (vendor.img) +# BOARD_VENDOR_KERNEL_MODULES += $(LOCAL_MODULE_PATH)/$(LOCAL_MODULE) +include $(DLKM_DIR)/Build_external_kernelmodule.mk diff --git a/Kbuild b/Kbuild new file mode 100644 index 0000000000..158a09d315 --- /dev/null +++ b/Kbuild @@ -0,0 +1,35 @@ +# SPDX-License-Identifier: GPL-2.0-only + +include $(VIDEO_ROOT)/config/waipio_video.conf + +LINUXINCLUDE += -include $(VIDEO_ROOT)/config/waipio_video.h + +LINUXINCLUDE += -I$(VIDEO_ROOT)/driver/vidc/inc \ + -I$(VIDEO_ROOT)/include/uapi/vidc \ + -I$(VIDEO_ROOT)/driver/platform/waipio/inc \ + -I$(VIDEO_ROOT)/driver/variant/iris2/inc + +USERINCLUDE += -I$(VIDEO_ROOT)/include/uapi/vidc/media \ + -I$(VIDEO_ROOT)/include/uapi/vidc + +obj-m += msm_video.o + +msm_video-objs += driver/vidc/src/msm_vidc_v4l2.o \ + driver/vidc/src/msm_vidc_vb2.o \ + driver/vidc/src/msm_vidc.o \ + driver/vidc/src/msm_vdec.o \ + driver/vidc/src/msm_venc.o \ + driver/vidc/src/msm_vidc_driver.o \ + driver/vidc/src/msm_vidc_control.o \ + driver/vidc/src/msm_vidc_buffer.o \ + driver/vidc/src/msm_vidc_probe.o \ + driver/vidc/src/msm_vidc_dt.o \ + driver/vidc/src/msm_vidc_platform.o \ + driver/vidc/src/msm_vidc_debug.o \ + driver/vidc/src/msm_vidc_memory.o \ + driver/vidc/src/venus_hfi.o \ + driver/vidc/src/hfi_packet.o \ + driver/vidc/src/venus_hfi_response.o \ + driver/variant/iris2/src/msm_vidc_buffer_iris2.o \ + driver/variant/iris2/src/msm_vidc_iris2.o \ + driver/platform/waipio/src/msm_vidc_waipio.o diff --git a/Makefile b/Makefile index 76bfd1b513..aec5948a70 100644 --- a/Makefile +++ b/Makefile @@ -1,48 +1,16 @@ # SPDX-License-Identifier: GPL-2.0-only -# auto-detect subdirs +KBUILD_OPTIONS+= VIDEO_ROOT=$(KERNEL_SRC)/$(M) -LINUXINCLUDE += -I$(srctree)/techpack/video/include \ - -I$(srctree)/techpack/video/include/uapi \ - -I$(srctree)/techpack/video/include/uapi/vidc \ - -I$(srctree)/techpack/video/driver/vidc/inc \ - -I$(srctree)/techpack/video/driver/platform/waipio/inc \ - -I$(srctree)/techpack/video/driver/variant/iris2/inc +all: + $(MAKE) -C $(KERNEL_SRC) M=$(M) modules $(KBUILD_OPTIONS) -USERINCLUDE += -I$(srctree)/techpack/video/include/uapi +modules_install: + $(MAKE) INSTALL_MOD_STRIP=1 -C $(KERNEL_SRC) M=$(M) modules_install -ccflags-y += -I$(srctree)/techpack/video/driver/vidc/src/ \ - -I$(srctree)/techpack/video/driver/platform/waipio/src/ \ - -I$(srctree)/techpack/video/driver/variant/iris2/src - -msm-vidc-objs := driver/vidc/src/msm_vidc_v4l2.o \ - driver/vidc/src/msm_vidc_vb2.o \ - driver/vidc/src/msm_vidc.o \ - driver/vidc/src/msm_vdec.o \ - driver/vidc/src/msm_venc.o \ - driver/vidc/src/msm_vidc_driver.o \ - driver/vidc/src/msm_vidc_control.o \ - driver/vidc/src/msm_vidc_buffer.o \ - driver/vidc/src/msm_vidc_probe.o \ - driver/vidc/src/msm_vidc_dt.o \ - driver/vidc/src/msm_vidc_platform.o \ - driver/vidc/src/msm_vidc_debug.o \ - driver/vidc/src/msm_vidc_memory.o \ - driver/vidc/src/venus_hfi.o \ - driver/vidc/src/hfi_packet.o \ - driver/vidc/src/venus_hfi_response.o - -ifneq ($(CONFIG_ARCH_QTI_VM), y) -ifeq ($(CONFIG_ARCH_LAHAINA), y) - -include $(srctree)/techpack/video/config/waipio_video.conf -LINUXINCLUDE += -include $(srctree)/techpack/video/config/waipio_video.h - -msm-vidc-objs += driver/platform/waipio/src/msm_vidc_waipio.o \ - driver/variant/iris2/src/msm_vidc_iris2.o \ - driver/variant/iris2/src/msm_vidc_buffer_iris2.o -endif -endif - -obj-$(CONFIG_MSM_VIDC_V4L2) := msm-vidc.o +%: + $(MAKE) -C $(KERNEL_SRC) M=$(M) $@ $(KBUILD_OPTIONS) +clean: + rm -f *.o *.ko *.mod.c *.mod.o *~ .*.cmd Module.symvers + rm -rf .tmp_versions diff --git a/driver/vidc/src/msm_vidc_probe.c b/driver/vidc/src/msm_vidc_probe.c index 497063ae25..6e15844c79 100644 --- a/driver/vidc/src/msm_vidc_probe.c +++ b/driver/vidc/src/msm_vidc_probe.c @@ -53,7 +53,7 @@ static int msm_vidc_init_irq(struct msm_vidc_core *core) } dt = core->dt; - core->register_base_addr = devm_ioremap_nocache(&core->pdev->dev, + core->register_base_addr = devm_ioremap(&core->pdev->dev, dt->register_base, dt->register_size); if (!core->register_base_addr) { d_vpr_e("could not map reg addr %pa of size %d\n", @@ -91,6 +91,7 @@ static struct attribute_group msm_vidc_core_attr_group = { static const struct of_device_id msm_vidc_dt_match[] = { {.compatible = "qcom,msm-vidc"}, {.compatible = "qcom,msm-vidc,context-bank"}, + {}, }; MODULE_DEVICE_TABLE(of, msm_vidc_dt_match); @@ -148,7 +149,7 @@ static int msm_vidc_register_video_device(struct msm_vidc_core *core, V4L2_CAP_META_OUTPUT | V4L2_CAP_STREAMING; rc = video_register_device(&core->vdev[index].vdev, - VFL_TYPE_GRABBER, nr); + VFL_TYPE_VIDEO, nr); if (rc) { d_vpr_e("Failed to register the video device\n"); return rc; From 39983874237a2a437eb4e2b3a768e6723389138a Mon Sep 17 00:00:00 2001 From: Prabhakar Reddy Krishnappa Date: Tue, 8 Dec 2020 11:55:44 -0800 Subject: [PATCH 0030/1061] msm_vidc: Disable CP memory protection Disabling CP memory protection. Change-Id: Ief8a06b39689452fedbc8729dd36c759498487ba Signed-off-by: Prabhakar Reddy Krishnappa --- driver/vidc/src/venus_hfi.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index fb4b6432b0..840eb3e795 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -2379,11 +2379,14 @@ static int __load_fw(struct msm_vidc_core *core) } } + // TODO: Prabhakar - revisit once hyp support is available. +#ifdef WAIPIO_PRESIL_CP_ENABLE rc = __protect_cp_mem(core); if (rc) { d_vpr_e("%s: protect memory failed\n", __func__); goto fail_protect_mem; } +#endif /* * Hand off control of regulators to h/w _after_ loading fw. * Note that the GDSC will turn off when switching from normal From e970285cda4b734363fc9143edb39a79afe7978a Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Tue, 24 Nov 2020 12:26:59 -0800 Subject: [PATCH 0031/1061] video: driver: driver fixes required for latest firmware Update debug packet structure to use waipio related debug packet structure. Also add HFI_INFORMATION_END cmd packets handling in reverse thread. Change-Id: Idbd421d8ada0e8c9d33df54e6f3708b1079c8b47 Signed-off-by: Akshata Sahukar --- driver/platform/waipio/src/msm_vidc_waipio.c | 2 +- driver/vidc/inc/msm_vdec.h | 2 + driver/vidc/inc/msm_vidc_inst.h | 2 +- driver/vidc/inc/msm_vidc_internal.h | 1 + driver/vidc/src/msm_vdec.c | 24 +++--- driver/vidc/src/msm_vidc_driver.c | 4 - driver/vidc/src/msm_vidc_vb2.c | 18 ++++- driver/vidc/src/venus_hfi.c | 80 +++++++------------- driver/vidc/src/venus_hfi_response.c | 36 ++++++++- 9 files changed, 90 insertions(+), 79 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 228baec1cf..2cb1c656b4 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -64,7 +64,7 @@ static struct msm_platform_core_capability core_data_waipio[] = { {SW_PC_DELAY, 1500}, /* 1500 ms */ {FW_UNLOAD, 0}, {FW_UNLOAD_DELAY, 1000}, /* 1000 ms */ - {HW_RESPONSE_TIMEOUT, 3000}, /* 1000 ms */ + {HW_RESPONSE_TIMEOUT, 5000}, /* 1000 ms */ {DEBUG_TIMEOUT, 0}, {PREFIX_BUF_COUNT_PIX, 18}, {PREFIX_BUF_SIZE_PIX, 13434880}, /* Calculated by VENUS_BUFFER_SIZE for 4096x2160 UBWC */ diff --git a/driver/vidc/inc/msm_vdec.h b/driver/vidc/inc/msm_vdec.h index b16aa22ab3..cd9c631a11 100644 --- a/driver/vidc/inc/msm_vdec.h +++ b/driver/vidc/inc/msm_vdec.h @@ -21,5 +21,7 @@ int msm_vdec_inst_init(struct msm_vidc_inst *inst); int msm_vdec_input_port_settings_change(struct msm_vidc_inst *inst); int msm_vdec_output_port_settings_change(struct msm_vidc_inst *inst); int msm_vdec_process_cmd(struct msm_vidc_inst *inst, u32 cmd); +int msm_vdec_subscribe_port_settings_change(struct msm_vidc_inst *inst, + enum msm_vidc_port_type port); #endif // _MSM_VDEC_H_ \ No newline at end of file diff --git a/driver/vidc/inc/msm_vidc_inst.h b/driver/vidc/inc/msm_vidc_inst.h index 4b7f4d811b..223777c02c 100644 --- a/driver/vidc/inc/msm_vidc_inst.h +++ b/driver/vidc/inc/msm_vidc_inst.h @@ -118,7 +118,7 @@ struct msm_vidc_inst { struct list_head input_ts; struct list_head enc_input_crs; struct list_head decode_bitrate_data; - bool codec_set; + bool once_per_session_set; struct dentry *debugfs_root; struct msm_vidc_debug debug; struct msm_vidc_inst_capability *capabilities; diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 1249193ecd..1d4da6fd0e 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -131,6 +131,7 @@ enum msm_vidc_buffer_type { MSM_VIDC_BUF_LINE, MSM_VIDC_BUF_DPB, MSM_VIDC_BUF_PERSIST, + MSM_VIDC_BUF_VPSS, }; /* always match with v4l2 flags V4L2_BUF_FLAG_* */ diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 6c48caafc8..07605d3a99 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -736,16 +736,20 @@ static int msm_vdec_get_input_internal_buffers(struct msm_vidc_inst *inst) } core = inst->core; + /* + * TODO: Remove the hack of sending bigger buffer sizes + * once internal buffer calculations are finalised + */ inst->buffers.bin.size = call_session_op(core, buffer_size, - inst, MSM_VIDC_BUF_BIN); + inst, MSM_VIDC_BUF_BIN) + 100000000; inst->buffers.comv.size = call_session_op(core, buffer_size, - inst, MSM_VIDC_BUF_COMV); + inst, MSM_VIDC_BUF_COMV) + 100000000; inst->buffers.non_comv.size = call_session_op(core, buffer_size, - inst, MSM_VIDC_BUF_NON_COMV); + inst, MSM_VIDC_BUF_NON_COMV) + 100000000; inst->buffers.line.size = call_session_op(core, buffer_size, - inst, MSM_VIDC_BUF_LINE); + inst, MSM_VIDC_BUF_LINE) + 100000000; inst->buffers.persist.size = call_session_op(core, buffer_size, - inst, MSM_VIDC_BUF_PERSIST); + inst, MSM_VIDC_BUF_PERSIST) + 100000000; inst->buffers.bin.min_count = call_session_op(core, min_count, inst, MSM_VIDC_BUF_BIN); @@ -866,7 +870,7 @@ static int msm_vdec_release_input_internal_buffers(struct msm_vidc_inst *inst) return 0; } -static int msm_vdec_subscribe_port_settings_change(struct msm_vidc_inst *inst, +int msm_vdec_subscribe_port_settings_change(struct msm_vidc_inst *inst, enum msm_vidc_port_type port) { int rc = 0; @@ -1212,10 +1216,6 @@ int msm_vdec_start_input(struct msm_vidc_inst *inst) if (rc) goto error; - rc = msm_vdec_subscribe_port_settings_change(inst, INPUT_PORT); - if (rc) - return rc; - rc = msm_vdec_subscribe_property(inst, INPUT_PORT); if (rc) return rc; @@ -1267,10 +1267,6 @@ int msm_vdec_start_output(struct msm_vidc_inst *inst) if (rc) goto error; - rc = msm_vdec_subscribe_port_settings_change(inst, OUTPUT_PORT); - if (rc) - return rc; - rc = msm_vdec_subscribe_metadata(inst, OUTPUT_PORT); if (rc) return rc; diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 45473833fe..44236382b2 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -1253,14 +1253,10 @@ int msm_vidc_session_set_codec(struct msm_vidc_inst *inst) return -EINVAL; } - if (inst->codec_set) - return 0; - rc = venus_hfi_session_set_codec(inst); if (rc) return rc; - inst->codec_set = true; return 0; } diff --git a/driver/vidc/src/msm_vidc_vb2.c b/driver/vidc/src/msm_vidc_vb2.c index 159e64c1a2..c54871660f 100644 --- a/driver/vidc/src/msm_vidc_vb2.c +++ b/driver/vidc/src/msm_vidc_vb2.c @@ -164,10 +164,24 @@ int msm_vidc_start_streaming(struct vb2_queue *q, unsigned int count) } s_vpr_h(inst->sid, "Streamon: %d\n", q->type); - if (!inst->codec_set) { + if (!inst->once_per_session_set) { + inst->once_per_session_set = true; rc = msm_vidc_session_set_codec(inst); if (rc) - return -EINVAL; + return rc; + if (is_decode_session(inst)) { + if (q->type == INPUT_MPLANE) { + rc = msm_vdec_subscribe_port_settings_change( + inst, INPUT_PORT); + if (rc) + return rc; + } else if (q->type == OUTPUT_MPLANE) { + rc = msm_vdec_subscribe_port_settings_change( + inst, OUTPUT_PORT); + if (rc) + return rc; + } + } } /* diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index fb4b6432b0..588dcf9333 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -921,24 +921,11 @@ dbg_error_null: return rc; } -// TODO: revisit once firmware updated to latest interface headers -struct hfi_packet_header { - u32 size; - u32 packet_type; -}; - -struct hfi_msg_sys_debug_packet { - u32 size; - u32 packet_type; - u32 msg_type; - u32 msg_size; - u32 time_stamp_hi; - u32 time_stamp_lo; - u8 rg_msg_data[1]; -}; - -static void __flush_debug_queue(struct msm_vidc_core *core, u8 *packet) +static void __flush_debug_queue(struct msm_vidc_core *core, + u8 *packet, u32 packet_size) { + u8 *log; + struct hfi_debug_header *pkt; bool local_packet = false; enum vidc_msg_prio log_level = msm_vidc_debug; @@ -947,12 +934,13 @@ static void __flush_debug_queue(struct msm_vidc_core *core, u8 *packet) return; } - if (!packet) { + if (!packet || !packet_size) { packet = kzalloc(VIDC_IFACEQ_VAR_HUGE_PKT_SIZE, GFP_KERNEL); if (!packet) { d_vpr_e("%s: fail to allocate\n", __func__); return; } + packet_size = VIDC_IFACEQ_VAR_HUGE_PKT_SIZE; local_packet = true; @@ -963,45 +951,31 @@ static void __flush_debug_queue(struct msm_vidc_core *core, u8 *packet) log_level |= FW_PRINTK; } -#define SKIP_INVALID_PKT(pkt_size, payload_size, pkt_hdr_size) { \ - if (pkt_size < pkt_hdr_size || \ - payload_size < MIN_PAYLOAD_SIZE || \ - payload_size > \ - (pkt_size - pkt_hdr_size + sizeof(u8))) { \ - d_vpr_e("%s: invalid msg size - %d\n", \ - __func__, payload_size); \ - continue; \ - } \ - } - while (!__iface_dbgq_read(core, packet)) { - struct hfi_packet_header *pkt = - (struct hfi_packet_header *) packet; + pkt = (struct hfi_debug_header *) packet; - if (pkt->size < sizeof(struct hfi_packet_header)) { - d_vpr_e("Invalid pkt size - %s\n", __func__); + if (pkt->size < sizeof(struct hfi_debug_header)) { + d_vpr_e("%s: invalid pkt size %d\n", + __func__, pkt->size); + continue; + } + if (pkt->size > packet_size) { + d_vpr_e("%s: pkt size[%d] > packet_size[%d]\n", + __func__, pkt->size, packet_size); continue; } - if (1) { - struct hfi_msg_sys_debug_packet *pkt = - (struct hfi_msg_sys_debug_packet *) packet; - - SKIP_INVALID_PKT(pkt->size, - pkt->msg_size, sizeof(*pkt)); - - /* - * All fw messages starts with new line character. This - * causes dprintk to print this message in two lines - * in the kernel log. Ignoring the first character - * from the message fixes this to print it in a single - * line. - */ - pkt->rg_msg_data[pkt->msg_size-1] = '\0'; - dprintk_firmware(log_level, "%s", &pkt->rg_msg_data[1]); - } + packet[packet_size - 1] = '\0'; + /* + * All fw messages starts with new line character. This + * causes dprintk to print this message in two lines + * in the kernel log. Ignoring the first character + * from the message fixes this to print it in a single + * line. + */ + log = (u8 *)packet + sizeof(struct hfi_debug_header) + 1; + dprintk_firmware(log_level, "%s", log); } -#undef SKIP_INVALID_PKT if (local_packet) kfree(packet); @@ -1104,7 +1078,7 @@ static int __power_collapse(struct msm_vidc_core *core, bool force) if (rc) goto skip_power_off; - __flush_debug_queue(core, core->packet); + __flush_debug_queue(core, core->packet, core->packet_size); rc = __suspend(core); if (rc) @@ -2439,7 +2413,7 @@ static int __response_handler(struct msm_vidc_core *core) } __schedule_power_collapse_work(core); - __flush_debug_queue(core, core->response_packet); + __flush_debug_queue(core, core->response_packet, core->packet_size); return rc; } diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index 2b63e7afc1..b5abc5758b 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -130,6 +130,30 @@ int validate_packet(u8 *response_pkt, u8 *core_resp_pkt, return 0; } +static int handle_session_info(struct msm_vidc_inst *inst, + struct hfi_packet *pkt) +{ + + int rc = 0; + char *info; + + switch (pkt->type) { + case HFI_INFO_UNSUPPORTED: + info = "unsupported"; + break; + case HFI_INFO_DATA_CORRUPT: + info = "data corrupt"; + break; + default: + info = "unknown"; + break; + } + + s_vpr_e(inst->sid, "session info (%#x): %s\n", pkt->type, info); + + return rc; +} + static int handle_session_error(struct msm_vidc_inst *inst, struct hfi_packet *pkt) { @@ -633,7 +657,8 @@ static int handle_session_buffer(struct msm_vidc_inst *inst, buffer = (struct hfi_buffer *)((u8 *)pkt + sizeof(struct hfi_packet)); buf_type = buffer->type; if (!is_valid_hfi_buffer_type(inst, buf_type, __func__)) { - msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); + /* TODO */ + //msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); return 0; } @@ -915,9 +940,9 @@ static int handle_session_response(struct msm_vidc_core *core, goto exit; } packet = (struct hfi_packet *)pkt; - if (packet->type < HFI_CMD_END && - packet->type > HFI_CMD_BEGIN) { - if (inst->hfi_cmd_type || inst->hfi_port) { + if (packet->type > HFI_CMD_BEGIN && + packet->type < HFI_CMD_END) { + if (inst->hfi_cmd_type == HFI_CMD_SETTINGS_CHANGE) { s_vpr_e(inst->sid, "%s: invalid cmd %d, port %d \n", __func__, inst->hfi_cmd_type, @@ -933,6 +958,9 @@ static int handle_session_response(struct msm_vidc_core *core, } else if (packet->type > HFI_SESSION_ERROR_BEGIN && packet->type < HFI_SESSION_ERROR_END) { rc = handle_session_error(inst, packet); + } else if (packet->type > HFI_INFORMATION_BEGIN && + packet->type < HFI_INFORMATION_END) { + rc = handle_session_info(inst, packet); } else { s_vpr_e(inst->sid, "%s: Unknown packet type: %#x\n", __func__, packet->type); From bdc2de6c9308ffa95db9a09628c93fd762bafe9a Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Mon, 7 Dec 2020 18:58:01 -0800 Subject: [PATCH 0032/1061] video: driver: fixes to get enc start/stop working below are the fixes added to get enc start/stop working along with setting default values to firmware for basic functionality controls. - Create and queue COMV and NON COMV internal buffers - Use HFI_PAYLOAD_64_PACKED as payload_info type instead of HFI_PAYLOAD_32_PACKED HFI_PROP_CROP_OFFSETS - Introduce new control port specifier flags in instance database to help set correct port to controls while packetization - Add support to map basic functionality controls v4l2 enum values to hfi enum values - Enable static adjust and set controls support Change-Id: Idc0dc3e3d07d8f6349c74136327a45d77ced1035 Signed-off-by: Akshata Sahukar --- driver/platform/waipio/src/msm_vidc_waipio.c | 193 ++++++++++--------- driver/vidc/inc/hfi_property.h | 2 + driver/vidc/inc/msm_vidc_driver.h | 3 +- driver/vidc/inc/msm_vidc_internal.h | 2 + driver/vidc/src/msm_venc.c | 42 ++-- driver/vidc/src/msm_vidc_control.c | 113 +++++++++-- driver/vidc/src/msm_vidc_vb2.c | 30 ++- 7 files changed, 260 insertions(+), 125 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 2cb1c656b4..17402f2299 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -115,7 +115,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 0, 64, 1, 4, V4L2_CID_MIN_BUFFERS_FOR_CAPTURE, HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT, - CAP_FLAG_ROOT}, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, /* (8192 * 4320) / 256 */ {MBPF, ENC|DEC, CODECS_ALL, 64, 138240, 1, 138240}, @@ -132,7 +132,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDEO_B_FRAMES, HFI_PROP_MAX_B_FRAMES, - CAP_FLAG_ROOT}, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, /* ((4096 * 2304) / 256) * 60 fps */ {POWER_SAVE_MBPS, ENC, CODECS_ALL, @@ -173,13 +173,13 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 0, 51, 1, 20, V4L2_CID_MPEG_VIDC_B_FRAME_MIN_QP, HFI_PROP_MIN_QP_PACKED, - CAP_FLAG_ROOT}, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, {B_FRAME_MAX_QP, ENC, HEVC|H264, 0, 51, 1, 20, V4L2_CID_MPEG_VIDC_B_FRAME_MAX_QP, HFI_PROP_MAX_QP_PACKED, - CAP_FLAG_ROOT}, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, {HFLIP, ENC, CODECS_ALL, V4L2_MPEG_MSM_VIDC_DISABLE, @@ -187,7 +187,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_HFLIP, HFI_PROP_FLIP, - CAP_FLAG_ROOT}, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, {VFLIP, ENC, CODECS_ALL, V4L2_MPEG_MSM_VIDC_DISABLE, @@ -195,7 +195,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_VFLIP, HFI_PROP_FLIP, - CAP_FLAG_ROOT}, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, {PREPEND_SPSPPS_TO_IDR, ENC, CODECS_ALL, V4L2_MPEG_MSM_VIDC_DISABLE, @@ -203,13 +203,13 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDEO_PREPEND_SPSPPS_TO_IDR, HFI_PROP_SEQ_HEADER_MODE, - CAP_FLAG_ROOT}, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, {REQUEST_I_FRAME, ENC, CODECS_ALL, 0, 0, 0, 0, V4L2_CID_MPEG_VIDEO_FORCE_KEY_FRAME, HFI_PROP_REQUEST_SYNC_FRAME, - CAP_FLAG_ROOT}, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, {SLICE_INTERFACE, DEC, CODECS_ALL, 0, 0, 0, 0, @@ -231,7 +231,9 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, V4L2_CID_MPEG_VIDEO_BITRATE_MODE, HFI_PROP_RATE_CONTROL, - CAP_FLAG_ROOT | CAP_FLAG_MENU}, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {0}, {0}, + NULL, msm_vidc_set_u32}, {HEADER_MODE, ENC, CODECS_ALL, V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE, @@ -241,14 +243,16 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE, V4L2_CID_MPEG_VIDEO_HEADER_MODE, HFI_PROP_SEQ_HEADER_MODE, - CAP_FLAG_ROOT | CAP_FLAG_MENU}, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {0}, {0}, + NULL, msm_vidc_set_u32}, // confirm codec {GOP_SIZE, ENC, CODECS_ALL, 0, MAX_GOP, 1, 2 * DEFAULT_FPS - 1, V4L2_CID_MPEG_VIDEO_GOP_SIZE, HFI_PROP_MAX_GOP_FRAMES, - CAP_FLAG_ROOT}, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, {GOP_CLOSURE, ENC, CODECS_ALL, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, @@ -260,10 +264,10 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 1, 220000000, 1, 20000000, V4L2_CID_MPEG_VIDEO_BITRATE, HFI_PROP_TOTAL_BITRATE, - CAP_FLAG_DYNAMIC_ALLOWED, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, /* TO DO parents */ {0}, {SLICE_MAX_BYTES}, - msm_vidc_adjust_bitrate, msm_vidc_set_s32}, + msm_vidc_adjust_bitrate, msm_vidc_set_u32}, {BIT_RATE, DEC, CODECS_ALL, 1, 220000000, 1, 220000000}, @@ -280,7 +284,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDC_SECURE, HFI_PROP_SECURE, - CAP_FLAG_ROOT, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, {0}, {0}}, @@ -288,13 +292,15 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { VIDC_BLUR_NONE, VIDC_BLUR_ADAPTIVE, 1, VIDC_BLUR_NONE, V4L2_CID_MPEG_VIDC_VIDEO_BLUR_TYPES, HFI_PROP_BLUR_TYPES, - CAP_FLAG_ROOT}, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + {0}, {0}, + NULL, msm_vidc_set_u32}, {BLUR_RESOLUTION, ENC, CODECS_ALL, 0, S32_MAX, 1, 0, V4L2_CID_MPEG_VIDC_VIDEO_BLUR_RESOLUTION, HFI_PROP_BLUR_RESOLUTION, - CAP_FLAG_ROOT}, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, /* Needed for control initialization. TODO */ /* {CSC_CUSTOM_MATRIX, ENC, CODECS_ALL, @@ -303,14 +309,14 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDC_VIDEO_VPE_CSC_CUSTOM_MATRIX, HFI_PROP_CSC_MATRIX, - CAP_FLAG_ROOT}, */ + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, */ {HEIC, ENC, HEVC, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDC_HEIC, HFI_PROP_HEIC_GRID_ENABLE, - CAP_FLAG_ROOT}, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, {LOWLATENCY_MODE, ENC|DEC, CODECS_ALL, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, @@ -323,13 +329,13 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 0, 2, 1, 0, V4L2_CID_MPEG_VIDC_LTRCOUNT, HFI_PROP_LTR_COUNT, - CAP_FLAG_ROOT}, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, {USE_LTR, ENC, H264|HEVC, 0, ((1 << MAX_LTR_FRAME_COUNT) - 1), 1, 0, V4L2_CID_MPEG_VIDC_USELTRFRAME, HFI_PROP_LTR_USE, - CAP_FLAG_ROOT, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, {LTR_COUNT}, {0}}, @@ -337,19 +343,19 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 0, (MAX_LTR_FRAME_COUNT - 1), 1, 0, V4L2_CID_MPEG_VIDC_MARKLTRFRAME, HFI_PROP_LTR_MARK, - CAP_FLAG_ROOT}, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, {BASELAYER_PRIORITY, ENC, H264|HEVC, 0, MAX_BASE_LAYER_PRIORITY_ID, 1, 0, V4L2_CID_MPEG_VIDC_BASELAYER_PRIORITY, HFI_PROP_BASELAYER_PRIORITYID, - CAP_FLAG_ROOT}, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, {IR_RANDOM, ENC, CODECS_ALL, 0, MAX_INTRA_REFRESH_MBS, 1, 0, V4L2_CID_MPEG_VIDC_INTRA_REFRESH_PERIOD, HFI_PROP_IR_RANDOM_PERIOD, - CAP_FLAG_ROOT}, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, {AU_DELIMITER, ENC, H264|HEVC, V4L2_MPEG_MSM_VIDC_DISABLE, @@ -357,7 +363,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDC_AU_DELIMITER, HFI_PROP_AUD, - CAP_FLAG_ROOT}, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, // confirm codec {TIME_DELTA_BASED_RC, ENC, CODECS_ALL, @@ -365,7 +371,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 1, V4L2_MPEG_MSM_VIDC_ENABLE, V4L2_CID_MPEG_VIDC_TIME_DELTA_BASED_RC, HFI_PROP_TIME_DELTA_BASED_RATE_CONTROL, - CAP_FLAG_ROOT}, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, // confirm codec {CONTENT_ADAPTIVE_CODING, ENC, CODECS_ALL, @@ -373,19 +379,19 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 1, V4L2_MPEG_MSM_VIDC_ENABLE, V4L2_CID_MPEG_VIDC_CONTENT_ADAPTIVE_CODING, HFI_PROP_CONTENT_ADAPTIVE_CODING, - CAP_FLAG_ROOT}, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, {BITRATE_BOOST, ENC, CODECS_ALL, 0, 100, 25, 25, V4L2_CID_MPEG_VIDC_QUALITY_BITRATE_BOOST, HFI_PROP_CONST_QUALITY_BITRATE_BOOST, - CAP_FLAG_ROOT}, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, {ROTATION, ENC, CODECS_ALL, 0, 270, 90, 0, V4L2_CID_ROTATE, HFI_PROP_ROTATION, - CAP_FLAG_ROOT}, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, {VBV_DELAY, ENC, CODECS_ALL, 0, 1000, 500, 0, @@ -396,20 +402,20 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 0, 51, 1, 20, V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP, HFI_PROP_MIN_QP_PACKED, - CAP_FLAG_ROOT}, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, {MAX_FRAME_QP, ENC, HEVC, 0, 51, 1, 20, V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP, HFI_PROP_MAX_QP_PACKED, - CAP_FLAG_ROOT}, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, {HEVC_HIER_QP, ENC, HEVC, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDEO_HEVC_HIER_QP, HFI_PROP_QP_PACKED, - CAP_FLAG_ROOT}, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, /* * HEVC I_MIN_QP, I_MAX_QP, P_MIN_QP, P_MAX_QP, B_MIN_QP, B_MAX_QP are missing @@ -418,19 +424,19 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 0, 51, 1, 10, V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP, HFI_PROP_QP_PACKED, - CAP_FLAG_ROOT}, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, {P_FRAME_QP, ENC, HEVC, 0, 51, 1, 20, V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP, HFI_PROP_QP_PACKED, - CAP_FLAG_ROOT}, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, {B_FRAME_QP, ENC, HEVC, 0, 51, 1, 20, V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP, HFI_PROP_QP_PACKED, - CAP_FLAG_ROOT}, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, {HIER_CODING_TYPE, ENC, HEVC, V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B, @@ -440,49 +446,51 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P, V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE, HFI_PROP_LAYER_ENCODING_TYPE, - CAP_FLAG_ROOT | CAP_FLAG_MENU}, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {0}, {0}, + NULL, msm_vidc_set_u32}, {HIER_CODING_LAYER, ENC, HEVC, 0, 5, 1, 0, V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER, HFI_PROP_LAYER_COUNT, - CAP_FLAG_ROOT}, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, {L0_QP, ENC, HEVC, 0, 51, 1, 20, V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L0_QP, HFI_PROP_QP_PACKED, - CAP_FLAG_ROOT}, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, {L1_QP, ENC, HEVC, 0, 51, 1, 20, V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L1_QP, HFI_PROP_QP_PACKED, - CAP_FLAG_ROOT}, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, {L2_QP, ENC, HEVC, 0, 51, 1, 20, V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L2_QP, HFI_PROP_QP_PACKED, - CAP_FLAG_ROOT}, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, {L3_QP, ENC, HEVC, 0, 51, 1, 20, V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L3_QP, HFI_PROP_QP_PACKED, - CAP_FLAG_ROOT}, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, {L4_QP, ENC, HEVC, 0, 51, 1, 20, V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L4_QP, HFI_PROP_QP_PACKED, - CAP_FLAG_ROOT}, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, {L5_QP, ENC, HEVC, 0, 51, 1, 20, V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L5_QP, HFI_PROP_QP_PACKED, - CAP_FLAG_ROOT}, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, {PROFILE, ENC|DEC, HEVC, V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN, @@ -493,7 +501,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN, V4L2_CID_MPEG_VIDEO_HEVC_PROFILE, HFI_PROP_PROFILE, - CAP_FLAG_ROOT | CAP_FLAG_MENU, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {ENTROPY_MODE}, NULL, msm_vidc_set_u32}, @@ -517,7 +525,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2, V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, HFI_PROP_LEVEL, - CAP_FLAG_ROOT | CAP_FLAG_MENU, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {0}, NULL, msm_vidc_set_u32}, @@ -530,7 +538,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_MPEG_VIDEO_HEVC_TIER_HIGH, V4L2_CID_MPEG_VIDEO_HEVC_TIER, HFI_PROP_TIER, - CAP_FLAG_ROOT | CAP_FLAG_MENU, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {0}, NULL, msm_vidc_set_u32}, @@ -544,85 +552,85 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_ENABLED, V4L2_CID_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE, HFI_PROP_DEBLOCKING_MODE, - CAP_FLAG_ROOT | CAP_FLAG_MENU}, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, {LF_BETA, ENC, HEVC, -6, 6, 1, 0, V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2, HFI_PROP_DEBLOCKING_MODE, - CAP_FLAG_ROOT}, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, {LF_TC, ENC, HEVC, -6, 6, 1, 0, V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2, HFI_PROP_DEBLOCKING_MODE, - CAP_FLAG_ROOT}, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, {LOSSLESS, ENC, HEVC, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU, HFI_PROP_RATE_CONTROL, - CAP_FLAG_ROOT}, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, {L0_BR, ENC, HEVC, 1, 220000000, 1, 20000000, V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L0_BR, HFI_PROP_BITRATE_LAYER1, - CAP_FLAG_ROOT}, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, {L1_BR, ENC, HEVC, 1, 220000000, 1, 20000000, V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L1_BR, HFI_PROP_BITRATE_LAYER2, - CAP_FLAG_ROOT}, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, {L2_BR, ENC, HEVC, 1, 220000000, 1, 20000000, V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L2_BR, HFI_PROP_BITRATE_LAYER3, - CAP_FLAG_ROOT}, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, {L3_BR, ENC, HEVC, 1, 220000000, 1, 20000000, V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L3_BR, HFI_PROP_BITRATE_LAYER4, - CAP_FLAG_ROOT}, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, {L4_BR, ENC, HEVC, 1, 220000000, 1, 20000000, V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L4_BR, HFI_PROP_BITRATE_LAYER5, - CAP_FLAG_ROOT}, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, {L5_BR, ENC, HEVC, 1, 220000000, 1, 20000000, V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L5_BR, HFI_PROP_BITRATE_LAYER6, - CAP_FLAG_ROOT}, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, {BIT_RATE, ENC, HEVC, 1, 160000000, 1, 20000000, V4L2_CID_MPEG_VIDEO_BITRATE, HFI_PROP_TOTAL_BITRATE, - CAP_FLAG_DYNAMIC_ALLOWED, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, /* TODO parents */{0}, {SLICE_MAX_BYTES}, - msm_vidc_adjust_bitrate, msm_vidc_set_s32}, + msm_vidc_adjust_bitrate, msm_vidc_set_u32}, {SLICE_MAX_BYTES, ENC, H264|HEVC, 1, MAX_BITRATE / DEFAULT_FPS / 8 / 10, 1, MAX_BITRATE / DEFAULT_FPS / 8 / 10, V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES, HFI_PROP_MULTI_SLICE_BYTES_COUNT, - CAP_FLAG_ROOT}, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, {SLICE_MAX_MB, ENC, H264|HEVC, 1, (MAX_WIDTH * MAX_HEIGHT) / 256 / DEFAULT_FPS / 10, 1, (MAX_WIDTH * MAX_HEIGHT) / 256 / DEFAULT_FPS / 10, V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB, HFI_PROP_MULTI_SLICE_MB_COUNT, - CAP_FLAG_ROOT}, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, {SLICE_MODE, ENC, H264|HEVC, V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, @@ -633,16 +641,16 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE, 0, - CAP_FLAG_ROOT | CAP_FLAG_MENU}, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, /* Mpeg2 decoder specific */ {BIT_RATE, DEC, MPEG2, 1, 40000000, 1, 20000000, V4L2_CID_MPEG_VIDEO_BITRATE, HFI_PROP_TOTAL_BITRATE, - CAP_FLAG_DYNAMIC_ALLOWED, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, {0}, {0}, - msm_vidc_adjust_bitrate, msm_vidc_set_s32}, + msm_vidc_adjust_bitrate, msm_vidc_set_u32}, {LEVEL, DEC, MPEG2, V4L2_MPEG_VIDEO_MPEG2_LEVEL_LOW, @@ -654,7 +662,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_MPEG_VIDEO_MPEG2_LEVEL_HIGH, V4L2_CID_MPEG_VIDEO_MPEG2_LEVEL, HFI_PROP_LEVEL, - CAP_FLAG_ROOT | CAP_FLAG_MENU}, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, {PROFILE, DEC, MPEG2, V4L2_MPEG_VIDEO_MPEG2_PROFILE_SIMPLE, @@ -664,7 +672,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_MPEG_VIDEO_MPEG2_PROFILE_MAIN, V4L2_CID_MPEG_VIDEO_MPEG2_PROFILE, HFI_PROP_PROFILE, - CAP_FLAG_ROOT | CAP_FLAG_MENU}, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, {FRAME_WIDTH, DEC, MPEG2, 128, 1920, 1, 1920}, {FRAME_HEIGHT, DEC, MPEG2, 128, 1920, 1, 1080}, @@ -681,57 +689,57 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 0, 51, 1, 10, V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP, HFI_PROP_QP_PACKED, - CAP_FLAG_ROOT}, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, {P_FRAME_QP, ENC, H264, 0, 51, 1, 20, V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP, HFI_PROP_QP_PACKED, - CAP_FLAG_ROOT}, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, {B_FRAME_QP, ENC, H264, 0, 51, 1, 20, V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP, HFI_PROP_QP_PACKED, - CAP_FLAG_ROOT}, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, {MIN_FRAME_QP, ENC, H264, 0, 51, 1, 20, V4L2_CID_MPEG_VIDEO_H264_MIN_QP, HFI_PROP_MIN_QP_PACKED, - CAP_FLAG_ROOT}, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, {MAX_FRAME_QP, ENC, H264, 0, 51, 1, 20, V4L2_CID_MPEG_VIDEO_H264_MAX_QP, HFI_PROP_MAX_QP_PACKED, - CAP_FLAG_ROOT}, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, {LF_BETA, ENC, H264, -6, 6, 1, 0, V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_BETA, HFI_PROP_DEBLOCKING_MODE, - CAP_FLAG_ROOT}, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, {LF_ALPHA, ENC, H264, -6, 6, 1, 0, V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_ALPHA, HFI_PROP_DEBLOCKING_MODE, - CAP_FLAG_ROOT}, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, {MB_RC, ENC, CODECS_ALL, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_ENABLE, V4L2_CID_MPEG_VIDEO_MB_RC_ENABLE, 0, - CAP_FLAG_ROOT}, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, {TRANSFORM_8X8, ENC, H264, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_ENABLE, V4L2_CID_MPEG_VIDEO_H264_8X8_TRANSFORM, HFI_PROP_8X8_TRANSFORM, - CAP_FLAG_ROOT}, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, {ENTROPY_MODE, ENC, H264, V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC, @@ -741,7 +749,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, V4L2_CID_MPEG_VIDEO_H264_ENTROPY_MODE, HFI_PROP_CABAC_SESSION, - CAP_FLAG_ROOT | CAP_FLAG_MENU, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {PROFILE}, {BIT_RATE}, msm_vidc_adjust_entropy_mode, msm_vidc_set_u32}, @@ -757,7 +765,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_MPEG_VIDEO_H264_PROFILE_HIGH, V4L2_CID_MPEG_VIDEO_H264_PROFILE, HFI_PROP_PROFILE, - CAP_FLAG_ROOT | CAP_FLAG_MENU, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {ENTROPY_MODE}, NULL, msm_vidc_set_u32}, @@ -784,7 +792,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_MPEG_VIDEO_H264_LEVEL_5_1, V4L2_CID_MPEG_VIDEO_H264_LEVEL, HFI_PROP_LEVEL, - CAP_FLAG_ROOT | CAP_FLAG_MENU, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {0}, NULL, msm_vidc_set_u32}, @@ -798,14 +806,15 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED, V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_MODE, HFI_PROP_DEBLOCKING_MODE, - CAP_FLAG_ROOT | CAP_FLAG_MENU}, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + //TODO (AS) {HIER_CODING, ENC, H264, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING, HFI_PROP_LAYER_ENCODING_TYPE, - CAP_FLAG_ROOT}, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, /* TODO(AS) - ctrl init failing. Need to fix {HIER_CODING_TYPE, ENC, H264, @@ -816,20 +825,20 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P, V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_TYPE, HFI_PROP_LAYER_ENCODING_TYPE, - CAP_FLAG_ROOT | CAP_FLAG_MENU}, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, */ {HIER_CODING_LAYER, ENC, H264, 0, 6, 1, 0, V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_LAYER, HFI_PROP_LAYER_COUNT, - CAP_FLAG_ROOT}, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, {HIER_LAYER_QP, ENC, H264, 0, 0x0060033, 1, 20, V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_LAYER_QP, HFI_PROP_QP_PACKED, - CAP_FLAG_ROOT}, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, /* TODO: CHROMA_QP_INDEX_OFFSET is applicable to HEVC as well */ {CHROMA_QP_INDEX_OFFSET, ENC, H264, @@ -837,44 +846,44 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 1, MAX_CHROMA_QP_OFFSET, V4L2_CID_MPEG_VIDEO_H264_CHROMA_QP_INDEX_OFFSET, HFI_PROP_CHROMA_QP_OFFSET, - CAP_FLAG_ROOT}, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, {I_FRAME_MIN_QP, ENC, H264, 0, 51, 1, 20, V4L2_CID_MPEG_VIDEO_H264_I_FRAME_MIN_QP, HFI_PROP_MIN_QP_PACKED, - CAP_FLAG_ROOT}, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, {I_FRAME_MAX_QP, ENC, H264, 0, 51, 1, 20, V4L2_CID_MPEG_VIDEO_H264_I_FRAME_MAX_QP, HFI_PROP_MIN_QP_PACKED, - CAP_FLAG_ROOT}, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, {P_FRAME_MIN_QP, ENC, H264, 0, 51, 1, 20, V4L2_CID_MPEG_VIDEO_H264_P_FRAME_MIN_QP, HFI_PROP_MIN_QP_PACKED, - CAP_FLAG_ROOT}, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, {P_FRAME_MAX_QP, ENC, H264, 0, 51, 1, 20, V4L2_CID_MPEG_VIDEO_H264_P_FRAME_MAX_QP, HFI_PROP_MIN_QP_PACKED, - CAP_FLAG_ROOT}, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, {DISPLAY_DELAY, DEC, CODECS_ALL, 0, 1, 1, 0, V4L2_CID_MPEG_MFC51_VIDEO_DECODER_H264_DISPLAY_DELAY, HFI_PROP_DECODE_ORDER_OUTPUT, - CAP_FLAG_ROOT}, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, {DISPLAY_DELAY_ENABLE, DEC, CODECS_ALL, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_MFC51_VIDEO_DECODER_H264_DISPLAY_DELAY_ENABLE, HFI_PROP_DECODE_ORDER_OUTPUT, - CAP_FLAG_ROOT}, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, /* VP9 specific */ {I_FRAME_QP, ENC, VP9, 0, 127, 1, 20}, @@ -891,7 +900,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_MPEG_VIDEO_VP9_PROFILE_0, V4L2_CID_MPEG_VIDEO_VP9_PROFILE, HFI_PROP_PROFILE, - CAP_FLAG_ROOT | CAP_FLAG_MENU, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {ENTROPY_MODE}, NULL, msm_vidc_set_u32}, @@ -900,11 +909,13 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {CONCEAL_COLOR_8BIT, DEC, CODECS_ALL, 0x0, 0xff3fcff, 1, DEFAULT_VIDEO_CONCEAL_COLOR_BLACK, V4L2_CID_MPEG_VIDEO_MUTE_YUV, - HFI_PROP_CONCEAL_COLOR_8BIT}, + HFI_PROP_CONCEAL_COLOR_8BIT, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, {CONCEAL_COLOR_10BIT, DEC, CODECS_ALL, 0x0, 0x3fffffff, 1, DEFAULT_VIDEO_CONCEAL_COLOR_BLACK, V4L2_CID_MPEG_VIDEO_MUTE_YUV, - HFI_PROP_CONCEAL_COLOR_10BIT}, + HFI_PROP_CONCEAL_COLOR_10BIT, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, {STAGE, DEC|ENC, CODECS_ALL, 1, 2, 1, 2}, {PIPE, DEC|ENC, CODECS_ALL, 1, 4, 1, 4}, diff --git a/driver/vidc/inc/hfi_property.h b/driver/vidc/inc/hfi_property.h index 74a5e8b20d..ef1cd2f530 100644 --- a/driver/vidc/inc/hfi_property.h +++ b/driver/vidc/inc/hfi_property.h @@ -315,6 +315,8 @@ enum hfi_quality_mode { HFI_MODE_MAX_QUALITY = 0x1, HFI_MODE_POWER_SAVE = 0x2, }; + +// TODO (AS): Does not map to any V4l2 control #define HFI_PROP_QUALITY_MODE 0x03000148 enum hfi_seq_header_mode { diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 2793357042..3a74e877bd 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -55,7 +55,8 @@ static inline is_internal_buffer(enum msm_vidc_buffer_type buffer_type) buffer_type == MSM_VIDC_BUF_NON_COMV || buffer_type == MSM_VIDC_BUF_LINE || buffer_type == MSM_VIDC_BUF_DPB || - buffer_type == MSM_VIDC_BUF_PERSIST; + buffer_type == MSM_VIDC_BUF_PERSIST || + buffer_type == MSM_VIDC_BUF_VPSS; } static inline bool is_secondary_output_mode(struct msm_vidc_inst *inst) diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 1d4da6fd0e..2ff344022d 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -335,6 +335,8 @@ enum msm_vidc_inst_capability_flags { CAP_FLAG_ROOT = BIT(0), CAP_FLAG_DYNAMIC_ALLOWED = BIT(1), CAP_FLAG_MENU = BIT(2), + CAP_FLAG_INPUT_PORT = BIT(3), + CAP_FLAG_OUTPUT_PORT = BIT(4), }; struct msm_vidc_inst_cap { diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index 63460244e3..a28a688ed3 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -129,6 +129,9 @@ static int msm_venc_set_resolution(struct msm_vidc_inst *inst, resolution = inst->fmts[port].fmt.pix_mp.width << 16 | inst->fmts[port].fmt.pix_mp.height; + s_vpr_h(inst->sid, "%s: width: %d height: %d\n", __func__, + inst->fmts[port].fmt.pix_mp.width, + inst->fmts[port].fmt.pix_mp.height); rc = venus_hfi_session_property(inst, HFI_PROP_BITSTREAM_RESOLUTION, HFI_HOST_FLAGS_NONE, @@ -155,11 +158,14 @@ static int msm_venc_set_crop_offsets(struct msm_vidc_inst *inst, /* TODO: recheck later */ crop = inst->fmts[INPUT_PORT].fmt.pix_mp.width << 16 | inst->fmts[INPUT_PORT].fmt.pix_mp.height; + s_vpr_h(inst->sid, "%s: width: %d height: %d\n", __func__, + inst->fmts[INPUT_PORT].fmt.pix_mp.width, + inst->fmts[INPUT_PORT].fmt.pix_mp.height); rc = venus_hfi_session_property(inst, HFI_PROP_CROP_OFFSETS, HFI_HOST_FLAGS_NONE, get_hfi_port(inst, port), - HFI_PAYLOAD_32_PACKED, + HFI_PAYLOAD_64_PACKED, &crop, sizeof(u32)); if (rc) @@ -301,17 +307,21 @@ static int msm_venc_get_input_internal_buffers(struct msm_vidc_inst *inst) core = inst->core; inst->buffers.arp.size = call_session_op(core, buffer_size, - inst, MSM_VIDC_BUF_ARP); + inst, MSM_VIDC_BUF_ARP) + 100000000; inst->buffers.bin.size = call_session_op(core, buffer_size, - inst, MSM_VIDC_BUF_BIN); - /* inst->buffers.comv.size = call_session_op(core, buffer_size, - inst, MSM_VIDC_BUF_COMV); + inst, MSM_VIDC_BUF_BIN) + 100000000; + inst->buffers.comv.size = call_session_op(core, buffer_size, + inst, MSM_VIDC_BUF_COMV) + 100000000; inst->buffers.non_comv.size = call_session_op(core, buffer_size, - inst, MSM_VIDC_BUF_NON_COMV); */ + inst, MSM_VIDC_BUF_NON_COMV) + 100000000; inst->buffers.line.size = call_session_op(core, buffer_size, - inst, MSM_VIDC_BUF_LINE); + inst, MSM_VIDC_BUF_LINE) + 100000000; inst->buffers.dpb.size = call_session_op(core, buffer_size, - inst, MSM_VIDC_BUF_DPB); + inst, MSM_VIDC_BUF_DPB) + 100000000; + //inst->buffers.vpss.size = call_session_op(core, buffer_size, + //inst, MSM_VIDC_BUF_VPSS) + 100000000; + //vpss is req - 100 mb + /* inst->buffers.persist.size = call_session_op(core, buffer_size, inst, MSM_VIDC_BUF_PERSIST); */ @@ -319,10 +329,10 @@ static int msm_venc_get_input_internal_buffers(struct msm_vidc_inst *inst) inst, MSM_VIDC_BUF_ARP); inst->buffers.bin.min_count = call_session_op(core, min_count, inst, MSM_VIDC_BUF_BIN); - /* inst->buffers.comv.min_count = call_session_op(core, min_count, + inst->buffers.comv.min_count = call_session_op(core, min_count, inst, MSM_VIDC_BUF_COMV); inst->buffers.non_comv.min_count = call_session_op(core, min_count, - inst, MSM_VIDC_BUF_NON_COMV); */ + inst, MSM_VIDC_BUF_NON_COMV); inst->buffers.line.min_count = call_session_op(core, min_count, inst, MSM_VIDC_BUF_LINE); inst->buffers.dpb.min_count = call_session_op(core, min_count, @@ -337,12 +347,12 @@ static int msm_venc_get_input_internal_buffers(struct msm_vidc_inst *inst) s_vpr_h(inst->sid, "bin buffer: %d %d\n", inst->buffers.bin.min_count, inst->buffers.bin.size); - /* s_vpr_h(inst->sid, "comv buffer: %d %d\n", + s_vpr_h(inst->sid, "comv buffer: %d %d\n", inst->buffers.comv.min_count, inst->buffers.comv.size); s_vpr_h(inst->sid, "non_comv buffer: %d %d\n", inst->buffers.non_comv.min_count, - inst->buffers.non_comv.size); */ + inst->buffers.non_comv.size); s_vpr_h(inst->sid, "line buffer: %d %d\n", inst->buffers.line.min_count, inst->buffers.line.size); @@ -372,12 +382,12 @@ static int msm_venc_create_input_internal_buffers(struct msm_vidc_inst *inst) rc = msm_vidc_create_internal_buffers(inst, MSM_VIDC_BUF_BIN); if (rc) return rc; - /* rc = msm_vidc_create_internal_buffers(inst, MSM_VIDC_BUF_COMV); + rc = msm_vidc_create_internal_buffers(inst, MSM_VIDC_BUF_COMV); if (rc) return rc; rc = msm_vidc_create_internal_buffers(inst, MSM_VIDC_BUF_NON_COMV); if (rc) - return rc; */ + return rc; rc = msm_vidc_create_internal_buffers(inst, MSM_VIDC_BUF_LINE); if (rc) return rc; @@ -407,12 +417,12 @@ static int msm_venc_queue_input_internal_buffers(struct msm_vidc_inst *inst) rc = msm_vidc_queue_internal_buffers(inst, MSM_VIDC_BUF_BIN); if (rc) return rc; - /* rc = msm_vidc_queue_internal_buffers(inst, MSM_VIDC_BUF_COMV); + rc = msm_vidc_queue_internal_buffers(inst, MSM_VIDC_BUF_COMV); if (rc) return rc; rc = msm_vidc_queue_internal_buffers(inst, MSM_VIDC_BUF_NON_COMV); if (rc) - return rc; */ + return rc; rc = msm_vidc_queue_internal_buffers(inst, MSM_VIDC_BUF_LINE); if (rc) return rc; diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index fd0c62b2c0..ae907206fb 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -31,7 +31,7 @@ static const char *const mpeg_video_rate_control[] = { "MBR", "MBR VFR", "CQ", - NULL + NULL, }; static const char *const mpeg_video_stream_format[] = { @@ -57,6 +57,26 @@ static const char *const roi_map_type[] = { NULL, }; +static u32 msm_vidc_get_port_info(struct msm_vidc_inst *inst, + enum msm_vidc_inst_capability_type cap_id) +{ + struct msm_vidc_inst_capability *capability = inst->capabilities; + + if (capability->cap[cap_id].flags & CAP_FLAG_INPUT_PORT && + capability->cap[cap_id].flags & CAP_FLAG_OUTPUT_PORT) { + s_vpr_e(inst->sid, + "%s: both ports enabled. Default port set: BITSTREAM\n", + __func__); + return HFI_PORT_BITSTREAM; + } + if (capability->cap[cap_id].flags & CAP_FLAG_INPUT_PORT) + return get_hfi_port(inst, INPUT_PORT); + else if (capability->cap[cap_id].flags & CAP_FLAG_OUTPUT_PORT) + return get_hfi_port(inst, OUTPUT_PORT); + else + return HFI_PORT_NONE; +} + static const char * const * msm_vidc_get_qmenu_type( struct msm_vidc_inst *inst, u32 control_id) { @@ -682,11 +702,11 @@ int msm_vidc_adjust_properties(struct msm_vidc_inst *inst) struct msm_vidc_inst_cap_entry *curr_node = NULL, *tmp_node = NULL; struct msm_vidc_inst_capability *capability; + d_vpr_h("%s()\n", __func__); if (!inst || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - capability = inst->capabilities; for (i = 0; i < INST_CAP_MAX; i++) { @@ -727,21 +747,28 @@ int msm_vidc_set_u32(void *instance, { int rc = 0; struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; - u32 hfi_value; + u32 hfi_value, hfi_payload; if (!inst || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - rc = msm_vidc_v4l2_menu_to_hfi(inst, cap_id, &hfi_value); - if (rc) - return -EINVAL; + if (inst->capabilities->cap[cap_id].flags & CAP_FLAG_MENU) { + rc = msm_vidc_v4l2_menu_to_hfi(inst, cap_id, &hfi_value); + if (rc) + return -EINVAL; + hfi_payload = HFI_PAYLOAD_U32_ENUM; + } else { + hfi_value = inst->capabilities->cap[cap_id].value; + hfi_payload = HFI_PAYLOAD_U32; + } rc = venus_hfi_session_property(inst, inst->capabilities->cap[cap_id].hfi_id, - HFI_HOST_FLAGS_NONE, HFI_PORT_NONE, - HFI_PAYLOAD_U32_ENUM, + HFI_HOST_FLAGS_NONE, + msm_vidc_get_port_info(inst, cap_id), + hfi_payload, &hfi_value, sizeof(u32)); if (rc) @@ -830,6 +857,7 @@ int msm_vidc_set_fw_list(struct msm_vidc_inst *inst) struct msm_vidc_inst_capability *capability; struct msm_vidc_inst_cap_entry *curr_node = NULL, *tmp_node = NULL; + d_vpr_h("%s()\n", __func__); if (!inst || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; @@ -862,6 +890,15 @@ int msm_vidc_v4l2_menu_to_hfi(struct msm_vidc_inst *inst, struct msm_vidc_inst_capability *capability = inst->capabilities; switch (capability->cap[cap_id].v4l2_id) { + case V4L2_CID_MPEG_VIDEO_HEVC_PROFILE: + case V4L2_CID_MPEG_VIDEO_H264_PROFILE: + case V4L2_CID_MPEG_VIDEO_VP9_PROFILE: + case V4L2_CID_MPEG_VIDEO_HEVC_LEVEL: + case V4L2_CID_MPEG_VIDEO_H264_LEVEL: + case V4L2_CID_MPEG_VIDEO_HEVC_TIER: + case V4L2_CID_MPEG_VIDC_VIDEO_BLUR_TYPES: + *value = capability->cap[cap_id].value; + return 0; case V4L2_CID_MPEG_VIDEO_H264_ENTROPY_MODE: switch (capability->cap[cap_id].value) { case V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC: @@ -872,16 +909,64 @@ int msm_vidc_v4l2_menu_to_hfi(struct msm_vidc_inst *inst, break; default: *value = 1; - s_vpr_e(inst->sid, - "%s: invalid ctrl %d value %d, default value %u\n", - __func__, capability->cap[cap_id].v4l2_id, - capability->cap[cap_id].value, *value); + goto set_default; } - break; + return 0; + case V4L2_CID_MPEG_VIDEO_BITRATE_MODE: + switch (capability->cap[cap_id].value) { + case V4L2_MPEG_VIDEO_BITRATE_MODE_VBR: + *value = HFI_RC_VBR_CFR; + break; + case V4L2_MPEG_VIDEO_BITRATE_MODE_CBR: + *value = HFI_RC_CBR_CFR; + break; + default: + *value = HFI_RC_VBR_CFR; + goto set_default; + } + return 0; + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE: + switch (capability->cap[cap_id].value) { + case V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B: + *value = HFI_HIER_B; + break; + case V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P: + //TODO (AS): check if this is right mapping + *value = HFI_HIER_P_SLIDING_WINDOW; + break; + default: + *value = HFI_HIER_P_SLIDING_WINDOW; + goto set_default; + } + return 0; + case V4L2_CID_MPEG_VIDEO_HEADER_MODE: + switch (capability->cap[cap_id].value) { + case V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE: + *value = BIT(HFI_SEQ_HEADER_SEPERATE_FRAME); + break; + case V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME: + *value = BIT(HFI_SEQ_HEADER_JOINED_WITH_1ST_FRAME); + break; + /* + * TODO (AS): other HFI values are missing corresponding + * V4l2 values. Add them once available. + */ + default: + *value = HFI_SEQ_HEADER_SEPERATE_FRAME; + goto set_default; + } + return 0; default: s_vpr_e(inst->sid, - "%s: invalid ctrl with cap_id %d\n", __func__, cap_id); + "%s: mapping not specified for ctrl_id: %#x\n", + __func__, capability->cap[cap_id].v4l2_id); return -EINVAL; } + +set_default: + s_vpr_e(inst->sid, + "%s: invalid value %d for ctrl id: %#x. Set default: %u\n", + __func__, capability->cap[cap_id].value, + capability->cap[cap_id].v4l2_id, *value); return 0; } diff --git a/driver/vidc/src/msm_vidc_vb2.c b/driver/vidc/src/msm_vidc_vb2.c index c54871660f..de6f7dd65c 100644 --- a/driver/vidc/src/msm_vidc_vb2.c +++ b/driver/vidc/src/msm_vidc_vb2.c @@ -6,11 +6,11 @@ #include "msm_vidc_vb2.h" #include "msm_vidc_core.h" #include "msm_vidc_inst.h" -#include "msm_vidc_internal.h" #include "msm_vidc_driver.h" #include "msm_vdec.h" #include "msm_venc.h" #include "msm_vidc_debug.h" +#include "msm_vidc_control.h" void *msm_vb2_get_userptr(struct device *dev, unsigned long vaddr, unsigned long size, enum dma_data_direction dma_dir) @@ -185,6 +185,19 @@ int msm_vidc_start_streaming(struct vb2_queue *q, unsigned int count) } /* + if ((inst->state == MSM_VIDC_OPEN && q->type == OUTPUT_MPLANE) || + inst->state == MSM_VIDC_START_INPUT) { + s_vpr_h(inst->sid, "$s: msm_vidc_adjust_properties\n"); + rc = msm_vidc_adjust_properties(inst); + if (rc) + return -EINVAL; + + s_vpr_h(inst->sid, "$s: msm_vidc_set_fw_list\n"); + rc = msm_vidc_set_fw_list(inst); + if (rc) + return -EINVAL; + } + if (inst->state == MSM_VIDC_START_INPUT || inst->state == MSM_VIDC_START_OUTPUT) { rc = msm_vidc_adjust_properties(inst); @@ -192,8 +205,8 @@ int msm_vidc_start_streaming(struct vb2_queue *q, unsigned int count) return -EINVAL; } - if ((inst->state == MSM_VIDC_START_INPUT) || - (inst->state == MSM_VIDC_START && + if ((inst->state == MSM_VIDC_START_OUTPUT) || + (inst->state == MSM_VIDC_OPEN && q->type == INPUT_MPLANE)) { rc = msm_vidc_set_fw_list(inst); if (rc) @@ -201,6 +214,17 @@ int msm_vidc_start_streaming(struct vb2_queue *q, unsigned int count) } */ + if (inst->state == MSM_VIDC_START_INPUT || + inst->state == MSM_VIDC_START_OUTPUT) { + rc = msm_vidc_adjust_properties(inst); + if (rc) + return -EINVAL; + + rc = msm_vidc_set_fw_list(inst); + if (rc) + return -EINVAL; + } + if (q->type == INPUT_MPLANE) { if (is_decode_session(inst)) rc = msm_vdec_start_input(inst); From 55ab2680d72d6854ee1cded631fba7d45dc98c82 Mon Sep 17 00:00:00 2001 From: Maheshwar Ajja Date: Fri, 11 Dec 2020 16:27:34 -0800 Subject: [PATCH 0033/1061] video: driver: handle dequeued buffers at once Firmware returns meta buffer after actual buffer but client needs meta buffer before actual buffer. Handle the case using MSM_VIDC_ATTR_DEQUEUED flag. Change-Id: I99048a2f110a1b14bc4bb140b6211afa340c9f38 Signed-off-by: Maheshwar Ajja --- driver/vidc/inc/msm_vidc_inst.h | 3 - driver/vidc/inc/msm_vidc_internal.h | 1 + driver/vidc/src/msm_vidc.c | 2 - driver/vidc/src/msm_vidc_driver.c | 21 ++---- driver/vidc/src/venus_hfi_response.c | 107 +++++++++++++++++++-------- 5 files changed, 86 insertions(+), 48 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_inst.h b/driver/vidc/inc/msm_vidc_inst.h index 223777c02c..6210328f25 100644 --- a/driver/vidc/inc/msm_vidc_inst.h +++ b/driver/vidc/inc/msm_vidc_inst.h @@ -123,9 +123,6 @@ struct msm_vidc_inst { struct msm_vidc_debug debug; struct msm_vidc_inst_capability *capabilities; struct completion completions[MAX_SIGNAL]; - u32 hfi_cmd_type; - u32 hfi_port; - }; #endif // _MSM_VIDC_INST_H_ diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 2ff344022d..997714d35a 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -151,6 +151,7 @@ enum msm_vidc_buffer_attributes { MSM_VIDC_ATTR_READ_ONLY = BIT(1), MSM_VIDC_ATTR_PENDING_RELEASE = BIT(2), MSM_VIDC_ATTR_QUEUED = BIT(3), + MSM_VIDC_ATTR_DEQUEUED = BIT(4), }; enum msm_vidc_buffer_region { diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index d6ccd5ee0a..6f8cc83b2f 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -802,8 +802,6 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) inst->domain = session_type; inst->state = MSM_VIDC_OPEN; inst->request = false; - inst->hfi_cmd_type = 0; - inst->hfi_port = 0; for (i = 0; i < MAX_SIGNAL; i++) init_completion(&inst->completions[i]); diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 44236382b2..ca461b634e 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -26,27 +26,25 @@ void print_vidc_buffer(u32 tag, const char *str, struct msm_vidc_inst *inst, struct msm_vidc_buffer *vbuf) { - struct msm_vidc_buffer *mbuf; - if (!(tag & msm_vidc_debug) || !inst || !vbuf) return; - mbuf = get_meta_buffer(inst, vbuf); - if (!mbuf) + if (vbuf->type == MSM_VIDC_BUF_INPUT || vbuf->type == MSM_VIDC_BUF_OUTPUT) { dprintk(tag, inst->sid, "%s: %s: idx %2d fd %3d off %d daddr %#llx size %d filled %d flags %#x ts %lld attr %#x\n", str, vbuf->type == MSM_VIDC_BUF_INPUT ? "INPUT" : "OUTPUT", vbuf->index, vbuf->fd, vbuf->data_offset, vbuf->device_addr, vbuf->buffer_size, vbuf->data_size, vbuf->flags, vbuf->timestamp, vbuf->attr); - else + } else if (vbuf->type == MSM_VIDC_BUF_INPUT_META || + vbuf->type == MSM_VIDC_BUF_OUTPUT_META) { dprintk(tag, inst->sid, - "%s: %s: idx %2d fd %3d off %d daddr %#llx size %d filled %d flags %#x ts %lld attr %#x meta: fd %3d daddr %#llx size %d\n", - str, vbuf->type == MSM_VIDC_BUF_INPUT ? "INPUT" : "OUTPUT", + "%s: %s: idx %2d fd %3d off %d daddr %#llx size %d filled %d flags %#x ts %lld attr %#x\n", + str, vbuf->type == MSM_VIDC_BUF_INPUT_META ? "INPUT_META" : "OUTPUT_META", vbuf->index, vbuf->fd, vbuf->data_offset, vbuf->device_addr, vbuf->buffer_size, vbuf->data_size, - vbuf->flags, vbuf->timestamp, vbuf->attr, - mbuf->fd, mbuf->device_addr, mbuf->buffer_size); + vbuf->flags, vbuf->timestamp, vbuf->attr); + } } void print_vb2_buffer(const char *str, struct msm_vidc_inst *inst, @@ -706,10 +704,7 @@ struct msm_vidc_buffer *get_meta_buffer(struct msm_vidc_inst *inst, d_vpr_e("%s: invalid params\n", __func__); return NULL; } - /* - * do not call print_vidc_buffer() in this function to avoid recursion, - * this function is called from print_vidc_buffer. - */ + if (buf->type == MSM_VIDC_BUF_INPUT) { buffers = &inst->buffers.input_meta; } else if (buf->type == MSM_VIDC_BUF_OUTPUT) { diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index b5abc5758b..7054b33df4 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -349,6 +349,7 @@ static int handle_input_buffer(struct msm_vidc_inst *inst, buf->data_offset = buffer->data_offset; buf->data_size = buffer->data_size; buf->attr &= ~MSM_VIDC_ATTR_QUEUED; + buf->attr |= MSM_VIDC_ATTR_DEQUEUED; buf->flags = 0; //todo: /*if (buffer->flags & HFI_BUF_FW_FLAG_CORRUPT) { @@ -362,8 +363,6 @@ static int handle_input_buffer(struct msm_vidc_inst *inst, }*/ print_vidc_buffer(VIDC_HIGH, "EBD", inst, buf); - msm_vidc_vb2_buffer_done(inst, buf); - msm_vidc_put_driver_buf(inst, buf); return rc; } @@ -397,6 +396,7 @@ static int handle_output_buffer(struct msm_vidc_inst *inst, buf->timestamp = buffer->timestamp; buf->attr &= ~MSM_VIDC_ATTR_QUEUED; + buf->attr |= MSM_VIDC_ATTR_DEQUEUED; if (buffer->flags & HFI_BUF_FW_FLAG_READONLY) buf->attr |= MSM_VIDC_ATTR_READ_ONLY; else @@ -418,8 +418,6 @@ static int handle_output_buffer(struct msm_vidc_inst *inst, buf->flags |= MSM_VIDC_BUF_FLAG_SUBFRAME;*/ print_vidc_buffer(VIDC_HIGH, "FBD", inst, buf); - msm_vidc_vb2_buffer_done(inst, buf); - msm_vidc_put_driver_buf(inst, buf); return rc; } @@ -443,17 +441,19 @@ static int handle_input_metadata_buffer(struct msm_vidc_inst *inst, break; } } - if (found) { - s_vpr_h(inst->sid, - "input metadata buffer done: idx %d fd %d daddr %#x\n", - buf->index, buf->fd, buf->device_addr); - msm_vidc_vb2_buffer_done(inst, buf); - msm_vidc_put_driver_buf(inst, buf); - } else { + if (!found) { s_vpr_e(inst->sid, "%s: invalid idx %d daddr %#x\n", __func__, buffer->index, buffer->base_address); return -EINVAL; } + buf->data_size = buffer->data_size; + buf->attr &= ~MSM_VIDC_ATTR_QUEUED; + buf->attr |= MSM_VIDC_ATTR_DEQUEUED; + buf->flags = 0; + if (buffer->flags & HFI_BUF_FW_FLAG_LAST) + buf->flags |= MSM_VIDC_BUF_FLAG_LAST; + + print_vidc_buffer(VIDC_HIGH, "EBD META", inst, buf); return rc; } @@ -476,17 +476,51 @@ static int handle_output_metadata_buffer(struct msm_vidc_inst *inst, break; } } - if (found) { - s_vpr_h(inst->sid, - "output metadata buffer done: idx %d fd %d daddr %#x\n", - buf->index, buf->fd, buf->device_addr); - msm_vidc_vb2_buffer_done(inst, buf); - msm_vidc_put_driver_buf(inst, buf); - } else { + if (!found) { s_vpr_e(inst->sid, "%s: invalid idx %d daddr %#x\n", __func__, buffer->index, buffer->base_address); return -EINVAL; } + + buf->data_size = buffer->data_size; + buf->attr &= ~MSM_VIDC_ATTR_QUEUED; + buf->attr |= MSM_VIDC_ATTR_DEQUEUED; + buf->flags = 0; + if (buffer->flags & HFI_BUF_FW_FLAG_LAST) + buf->flags |= MSM_VIDC_BUF_FLAG_LAST; + + print_vidc_buffer(VIDC_HIGH, "FBD META", inst, buf); + return rc; +} + +static int handle_dequeue_buffers(struct msm_vidc_inst* inst) +{ + int rc = 0; + int i; + struct msm_vidc_buffers* buffers; + struct msm_vidc_buffer* buf; + struct msm_vidc_buffer* dummy; + enum msm_vidc_buffer_type buffer_type[] = { + MSM_VIDC_BUF_INPUT_META, + MSM_VIDC_BUF_INPUT, + MSM_VIDC_BUF_OUTPUT_META, + MSM_VIDC_BUF_OUTPUT, + }; + + for (i = 0; i < ARRAY_SIZE(buffer_type); i++) { + buffers = msm_vidc_get_buffers(inst, buffer_type[i], __func__); + if (!buffers) + return -EINVAL; + + list_for_each_entry_safe(buf, dummy, &buffers->list, list) { + if (buf->attr & MSM_VIDC_ATTR_DEQUEUED) { + buf->attr &= ~MSM_VIDC_ATTR_DEQUEUED; + msm_vidc_vb2_buffer_done(inst, buf); + msm_vidc_put_driver_buf(inst, buf); + } + } + } + return rc; } @@ -920,6 +954,8 @@ static int handle_session_response(struct msm_vidc_core *core, struct msm_vidc_inst *inst; struct hfi_packet *packet; u8 *pkt; + u32 hfi_cmd_type = 0; + u32 hfi_port = 0; int i; inst = get_inst(core, hdr->session_id); @@ -929,8 +965,8 @@ static int handle_session_response(struct msm_vidc_core *core, } mutex_lock(&inst->lock); - inst->hfi_cmd_type = 0; - inst->hfi_port = 0; + hfi_cmd_type = 0; + hfi_port = 0; pkt = (u8 *)((u8 *)hdr + sizeof(struct hfi_header)); for (i = 0; i < hdr->num_packets; i++) { @@ -942,15 +978,15 @@ static int handle_session_response(struct msm_vidc_core *core, packet = (struct hfi_packet *)pkt; if (packet->type > HFI_CMD_BEGIN && packet->type < HFI_CMD_END) { - if (inst->hfi_cmd_type == HFI_CMD_SETTINGS_CHANGE) { + if (hfi_cmd_type == HFI_CMD_SETTINGS_CHANGE) { s_vpr_e(inst->sid, - "%s: invalid cmd %d, port %d \n", - __func__, inst->hfi_cmd_type, - inst->hfi_port); - return -EINVAL; + "%s: invalid packet type %d in port settings change\n", + __func__, packet->type); + rc = -EINVAL; + goto exit; } - inst->hfi_cmd_type = packet->type; - inst->hfi_port = packet->port; + hfi_cmd_type = packet->type; + hfi_port = packet->port; rc = handle_session_command(inst, packet); } else if (packet->type > HFI_PROP_BEGIN && packet->type < HFI_PROP_END) { @@ -970,11 +1006,22 @@ static int handle_session_response(struct msm_vidc_core *core, pkt += packet->size; } - if (inst->hfi_cmd_type == HFI_CMD_SETTINGS_CHANGE) { - if (inst->hfi_port == HFI_PORT_BITSTREAM) + if (hfi_cmd_type == HFI_CMD_BUFFER) { + rc = handle_dequeue_buffers(inst); + if (rc) + goto exit; + } + + if (hfi_cmd_type == HFI_CMD_SETTINGS_CHANGE) { + if (hfi_port == HFI_PORT_BITSTREAM) { rc = msm_vdec_input_port_settings_change(inst); - else if (inst->hfi_port == HFI_PORT_RAW) + if (rc) + goto exit; + } else if (hfi_port == HFI_PORT_RAW) { rc = msm_vdec_output_port_settings_change(inst); + if (rc) + goto exit; + } } exit: From c07697a367a5100c347e1589f74f2faf048eacb1 Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Tue, 15 Dec 2020 17:23:30 -0800 Subject: [PATCH 0034/1061] video: driver: fixes for port settings change Disable subscribe and delivery mode metadata. increase hardware timeout. fix to set port settings subscription once on input and output port. Change-Id: I16bbc40d2efe852d1d7f626feb871317a3bc6c08 Signed-off-by: Darshana Patil --- driver/platform/waipio/src/msm_vidc_waipio.c | 2 +- driver/vidc/src/msm_vdec.c | 8 ++++++++ driver/vidc/src/msm_vidc_vb2.c | 19 ++++++++----------- 3 files changed, 17 insertions(+), 12 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 17402f2299..d63b051fc6 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -64,7 +64,7 @@ static struct msm_platform_core_capability core_data_waipio[] = { {SW_PC_DELAY, 1500}, /* 1500 ms */ {FW_UNLOAD, 0}, {FW_UNLOAD_DELAY, 1000}, /* 1000 ms */ - {HW_RESPONSE_TIMEOUT, 5000}, /* 1000 ms */ + {HW_RESPONSE_TIMEOUT, 15000}, /* 1000 ms */ {DEBUG_TIMEOUT, 0}, {PREFIX_BUF_COUNT_PIX, 18}, {PREFIX_BUF_SIZE_PIX, 13434880}, /* Calculated by VENUS_BUFFER_SIZE for 4096x2160 UBWC */ diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 07605d3a99..3a0f8b3e39 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -983,6 +983,10 @@ static int msm_vdec_subscribe_metadata(struct msm_vidc_inst *inst, u32 payload[32] = {0}; u32 i; + //todo: (DP) + d_vpr_h("%s(): skip subscribe metadata\n", __func__); + return 0; + if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; @@ -1013,6 +1017,10 @@ static int msm_vdec_set_delivery_mode_metadata(struct msm_vidc_inst *inst, u32 payload[32] = {0}; u32 i; + //todo: (DP) + d_vpr_h("%s(): skip delivery mode metadata\n", __func__); + return 0; + if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; diff --git a/driver/vidc/src/msm_vidc_vb2.c b/driver/vidc/src/msm_vidc_vb2.c index de6f7dd65c..25ff3b1d48 100644 --- a/driver/vidc/src/msm_vidc_vb2.c +++ b/driver/vidc/src/msm_vidc_vb2.c @@ -170,17 +170,14 @@ int msm_vidc_start_streaming(struct vb2_queue *q, unsigned int count) if (rc) return rc; if (is_decode_session(inst)) { - if (q->type == INPUT_MPLANE) { - rc = msm_vdec_subscribe_port_settings_change( - inst, INPUT_PORT); - if (rc) - return rc; - } else if (q->type == OUTPUT_MPLANE) { - rc = msm_vdec_subscribe_port_settings_change( - inst, OUTPUT_PORT); - if (rc) - return rc; - } + rc = msm_vdec_subscribe_port_settings_change( + inst, INPUT_PORT); + if (rc) + return rc; + rc = msm_vdec_subscribe_port_settings_change( + inst, OUTPUT_PORT); + if (rc) + return rc; } } From bae72cb900640f7c56f6bb3fa3854474ed863e73 Mon Sep 17 00:00:00 2001 From: Maheshwar Ajja Date: Wed, 16 Dec 2020 15:42:34 -0800 Subject: [PATCH 0035/1061] video: driver: add scale clocks and buses functions Add clocks and buses scaling functionality. Change-Id: Ifa61043a938bc5c1990f6baf1777a3f2270fc77d Signed-off-by: Maheshwar Ajja --- Kbuild | 2 + .../variant/iris2/inc/msm_vidc_power_iris2.h | 14 +++++++ driver/variant/iris2/src/msm_vidc_iris2.c | 1 + .../variant/iris2/src/msm_vidc_power_iris2.c | 30 +++++++++++++ driver/vidc/inc/msm_vidc_inst.h | 4 +- driver/vidc/inc/msm_vidc_power.h | 13 ++++++ driver/vidc/inc/venus_hfi.h | 3 ++ driver/vidc/src/msm_vidc_power.c | 36 ++++++++++++++++ driver/vidc/src/venus_hfi.c | 42 +++++++++++++++++++ 9 files changed, 143 insertions(+), 2 deletions(-) create mode 100644 driver/variant/iris2/inc/msm_vidc_power_iris2.h create mode 100644 driver/variant/iris2/src/msm_vidc_power_iris2.c create mode 100644 driver/vidc/inc/msm_vidc_power.h create mode 100644 driver/vidc/src/msm_vidc_power.c diff --git a/Kbuild b/Kbuild index 158a09d315..a37c9cf097 100644 --- a/Kbuild +++ b/Kbuild @@ -22,6 +22,7 @@ msm_video-objs += driver/vidc/src/msm_vidc_v4l2.o \ driver/vidc/src/msm_vidc_driver.o \ driver/vidc/src/msm_vidc_control.o \ driver/vidc/src/msm_vidc_buffer.o \ + driver/vidc/src/msm_vidc_power.o \ driver/vidc/src/msm_vidc_probe.o \ driver/vidc/src/msm_vidc_dt.o \ driver/vidc/src/msm_vidc_platform.o \ @@ -31,5 +32,6 @@ msm_video-objs += driver/vidc/src/msm_vidc_v4l2.o \ driver/vidc/src/hfi_packet.o \ driver/vidc/src/venus_hfi_response.o \ driver/variant/iris2/src/msm_vidc_buffer_iris2.o \ + driver/variant/iris2/src/msm_vidc_power_iris2.o \ driver/variant/iris2/src/msm_vidc_iris2.o \ driver/platform/waipio/src/msm_vidc_waipio.o diff --git a/driver/variant/iris2/inc/msm_vidc_power_iris2.h b/driver/variant/iris2/inc/msm_vidc_power_iris2.h new file mode 100644 index 0000000000..886b724e60 --- /dev/null +++ b/driver/variant/iris2/inc/msm_vidc_power_iris2.h @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) 2020, The Linux Foundation. All rights reserved. + */ + +#ifndef __H_MSM_VIDC_POWER_IRIS2_H__ +#define __H_MSM_VIDC_POWER_IRIS2_H__ + +#include "msm_vidc_inst.h" + +u64 msm_vidc_calc_freq_iris2(struct msm_vidc_inst* inst); +u64 msm_vidc_calc_bw_iris2(struct msm_vidc_inst* inst); + +#endif diff --git a/driver/variant/iris2/src/msm_vidc_iris2.c b/driver/variant/iris2/src/msm_vidc_iris2.c index 3a348d8b7e..0423004092 100644 --- a/driver/variant/iris2/src/msm_vidc_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_iris2.c @@ -7,6 +7,7 @@ #include "msm_vidc_iris2.h" #include "msm_vidc_buffer_iris2.h" +#include "msm_vidc_power_iris2.h" #include "venus_hfi.h" #include "msm_vidc_inst.h" #include "msm_vidc_core.h" diff --git a/driver/variant/iris2/src/msm_vidc_power_iris2.c b/driver/variant/iris2/src/msm_vidc_power_iris2.c new file mode 100644 index 0000000000..b9779a0b1f --- /dev/null +++ b/driver/variant/iris2/src/msm_vidc_power_iris2.c @@ -0,0 +1,30 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2020, The Linux Foundation. All rights reserved. + */ + +#include "msm_vidc_power_iris2.h" +#include "msm_vidc_inst.h" +#include "msm_vidc_debug.h" + +u64 msm_vidc_calc_freq_iris2(struct msm_vidc_inst *inst) +{ + u64 freq = 0; + + /* 240 Mhz for iris2 based video hw */ + freq = 240 * 1000 * 1000; + s_vpr_h(inst->sid, "%s: freq %lu\n", __func__, freq); + + return freq; +} + +u64 msm_vidc_calc_bw_iris2(struct msm_vidc_inst *inst) +{ + u64 freq = 0; + + /* 600 Mhz for iris2 based video hw */ + freq = 600 * 1000 * 1000; + s_vpr_h(inst->sid, "%s: freq %lu\n", __func__, freq); + + return freq; +} diff --git a/driver/vidc/inc/msm_vidc_inst.h b/driver/vidc/inc/msm_vidc_inst.h index 6210328f25..9c75dda62c 100644 --- a/driver/vidc/inc/msm_vidc_inst.h +++ b/driver/vidc/inc/msm_vidc_inst.h @@ -15,8 +15,8 @@ struct msm_vidc_inst; ((c)->session_ops->op(__VA_ARGS__)) : 0) struct msm_vidc_session_ops { - int (*calc_freq)(struct msm_vidc_inst *inst, struct msm_vidc_buffer *mbuf); - int (*calc_bw)(struct msm_vidc_inst *inst, struct msm_vidc_buffer *mbuf); + u64 (*calc_freq)(struct msm_vidc_inst *inst); + u64 (*calc_bw)(struct msm_vidc_inst *inst); int (*decide_work_route)(struct msm_vidc_inst *inst); int (*decide_work_mode)(struct msm_vidc_inst *inst); int (*decide_core_and_power_mode)(struct msm_vidc_inst *inst); diff --git a/driver/vidc/inc/msm_vidc_power.h b/driver/vidc/inc/msm_vidc_power.h new file mode 100644 index 0000000000..62e08c4f81 --- /dev/null +++ b/driver/vidc/inc/msm_vidc_power.h @@ -0,0 +1,13 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) 2020, The Linux Foundation. All rights reserved. + */ + +#ifndef _MSM_VIDC_POWER_H_ +#define _MSM_VIDC_POWER_H_ + +#include "msm_vidc_inst.h" + +int msm_vidc_scale_power(struct msm_vidc_inst *inst); + +#endif diff --git a/driver/vidc/inc/venus_hfi.h b/driver/vidc/inc/venus_hfi.h index 686f12e275..be9dc8d34b 100644 --- a/driver/vidc/inc/venus_hfi.h +++ b/driver/vidc/inc/venus_hfi.h @@ -66,6 +66,9 @@ int venus_hfi_session_set_codec(struct msm_vidc_inst *inst); int venus_hfi_core_init(struct msm_vidc_core *core); int venus_hfi_core_release(struct msm_vidc_core *core); int venus_hfi_suspend(struct msm_vidc_core *core); +int venus_hfi_scale_clocks(struct msm_vidc_inst* inst, u64 freq); +int venus_hfi_scale_buses(struct msm_vidc_inst* inst, u64 freq); + void venus_hfi_work_handler(struct work_struct *work); void venus_hfi_pm_work_handler(struct work_struct *work); irqreturn_t venus_hfi_isr(int irq, void *data); diff --git a/driver/vidc/src/msm_vidc_power.c b/driver/vidc/src/msm_vidc_power.c new file mode 100644 index 0000000000..3c6499f4c9 --- /dev/null +++ b/driver/vidc/src/msm_vidc_power.c @@ -0,0 +1,36 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2020, The Linux Foundation. All rights reserved. + */ + +#include "msm_vidc_power.h" +#include "msm_vidc_debug.h" +#include "msm_vidc_internal.h" +#include "msm_vidc_inst.h" +#include "msm_vidc_core.h" +#include "venus_hfi.h" + +int msm_vidc_scale_power(struct msm_vidc_inst *inst) +{ + int rc = 0; + u64 freq; + struct msm_vidc_core* core; + + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params %pK\n", __func__, inst); + return -EINVAL; + } + core = inst->core; + + freq = call_session_op(core, calc_freq, inst); + rc = venus_hfi_scale_clocks(inst, freq); + if (rc) + return rc; + + freq = call_session_op(core, calc_bw, inst); + rc = venus_hfi_scale_buses(inst, freq); + if (rc) + return rc; + + return 0; +} diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index a7f6a716e6..3c018355da 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -2970,3 +2970,45 @@ int venus_hfi_release_buffer(struct msm_vidc_inst *inst, return rc; } + +int venus_hfi_scale_clocks(struct msm_vidc_inst* inst, u64 freq) +{ + int rc = 0; + struct msm_vidc_core* core; + + if (!inst || inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + core = inst->core; + + mutex_lock(&core->lock); + if (__resume(core)) { + s_vpr_e(inst->sid, "Resume from power collapse failed\n"); + rc = -EINVAL; + goto exit; + } + rc = __set_clocks(core, freq); +exit: + mutex_unlock(&core->lock); + + return rc; +} + +int venus_hfi_scale_buses(struct msm_vidc_inst *inst, u64 freq) +{ + int rc = 0; + struct msm_vidc_core* core; + + if (!inst || inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + core = inst->core; + + mutex_lock(&core->lock); + rc = __vote_buses(core, freq, freq); + mutex_unlock(&core->lock); + + return rc; +} From a2f47ddf003c5ca3a11810523e4c0d9de66b8909 Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Thu, 17 Dec 2020 15:08:24 -0800 Subject: [PATCH 0036/1061] video: driver: split ipsc and opsc subscription Set ipsc subscribe properties once during start input and opsc subscribe once during start output. Fetch all property values from ipsc and set the same values to output port. added codec config control support. Change-Id: I3683becdb62096ee4dbed36181a2dc9876c53724 Signed-off-by: Darshana Patil --- driver/platform/waipio/src/msm_vidc_waipio.c | 20 +++ driver/vidc/inc/msm_vidc_inst.h | 2 + driver/vidc/inc/msm_vidc_internal.h | 4 +- driver/vidc/src/hfi_packet.c | 2 + driver/vidc/src/msm_vdec.c | 144 +++++++++++++++++-- driver/vidc/src/msm_vidc.c | 2 + driver/vidc/src/msm_vidc_driver.c | 6 + driver/vidc/src/msm_vidc_vb2.c | 10 -- driver/vidc/src/venus_hfi_response.c | 20 +++ 9 files changed, 191 insertions(+), 19 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index d63b051fc6..39a2d9b2c3 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -920,6 +920,26 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {STAGE, DEC|ENC, CODECS_ALL, 1, 2, 1, 2}, {PIPE, DEC|ENC, CODECS_ALL, 1, 4, 1, 4}, {POC, DEC, H264, 0, 1, 1, 0}, + + {ENTROPY_MODE, DEC, CODECS_ALL, + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC, + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, + BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC) | + BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC), + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, + 0, + HFI_PROP_CABAC_SESSION}, + + {CODED_FRAMES, DEC, CODECS_ALL, 0, 1, 1, 0, + 0, + HFI_PROP_CODED_FRAMES}, + + {BIT_DEPTH, DEC, CODECS_ALL, 8 << 16 | 8, 10 << 16 | 10, 1, 8 << 16 | 8, + 0, + HFI_PROP_LUMA_CHROMA_BIT_DEPTH}, + + {CODEC_CONFIG, DEC, H264|HEVC, 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_CODEC_CONFIG}, }; /* diff --git a/driver/vidc/inc/msm_vidc_inst.h b/driver/vidc/inc/msm_vidc_inst.h index 9c75dda62c..f00feb611d 100644 --- a/driver/vidc/inc/msm_vidc_inst.h +++ b/driver/vidc/inc/msm_vidc_inst.h @@ -119,6 +119,8 @@ struct msm_vidc_inst { struct list_head enc_input_crs; struct list_head decode_bitrate_data; bool once_per_session_set; + bool ipsc_properties_set; + bool opsc_properties_set; struct dentry *debugfs_root; struct msm_vidc_debug debug; struct msm_vidc_inst_capability *capabilities; diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 997714d35a..2412bdae85 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -141,7 +141,6 @@ enum msm_vidc_buffer_flags { MSM_VIDC_BUF_FLAG_BFRAME = 0x00000020, MSM_VIDC_BUF_FLAG_ERROR = 0x00000040, MSM_VIDC_BUF_FLAG_LAST = 0x00100000, - // TODO: remove below flags MSM_VIDC_BUF_FLAG_CODECCONFIG = 0x01000000, MSM_VIDC_BUF_FLAG_SUBFRAME = 0x02000000, }; @@ -328,6 +327,9 @@ enum msm_vidc_inst_capability_type { STAGE, PIPE, POC, + CODED_FRAMES, + BIT_DEPTH, + CODEC_CONFIG, INST_CAP_MAX, }; diff --git a/driver/vidc/src/hfi_packet.c b/driver/vidc/src/hfi_packet.c index a5647b29fb..05d52e6777 100644 --- a/driver/vidc/src/hfi_packet.c +++ b/driver/vidc/src/hfi_packet.c @@ -231,6 +231,8 @@ int get_hfi_buffer(struct msm_vidc_inst *inst, buf->flags |= HFI_BUF_HOST_FLAG_READONLY; if (buffer->attr & MSM_VIDC_ATTR_PENDING_RELEASE) buf->flags |= HFI_BUF_HOST_FLAG_RELEASE; + if (buffer->flags & MSM_VIDC_BUF_FLAG_CODECCONFIG) + buf->flags |= HFI_BUF_HOST_FLAG_CODEC_CONFIG; buf->timestamp = buffer->timestamp; return 0; diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 3a0f8b3e39..2ae790361e 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -190,6 +190,7 @@ static int msm_vdec_set_bit_depth(struct msm_vidc_inst *inst, bitdepth = 10 << 16 | 10; inst->subcr_params[port].bit_depth = bitdepth; + inst->capabilities->cap[BIT_DEPTH].value = bitdepth; s_vpr_h(inst->sid, "%s: bit depth: %d", __func__, bitdepth); rc = venus_hfi_session_property(inst, HFI_PROP_LUMA_CHROMA_BIT_DEPTH, @@ -215,10 +216,7 @@ static int msm_vdec_set_cabac(struct msm_vidc_inst *inst, return -EINVAL; } - rc = msm_vidc_v4l2_menu_to_hfi(inst, ENTROPY_MODE, &cabac); - if (rc) - return rc; - + cabac = inst->capabilities->cap[ENTROPY_MODE].value; inst->subcr_params[port].cabac = cabac; s_vpr_h(inst->sid, "%s: entropy mode: %d", __func__, cabac); rc = venus_hfi_session_property(inst, @@ -245,8 +243,7 @@ static int msm_vdec_set_coded_frames(struct msm_vidc_inst *inst, return -EINVAL; } - /* (mb_adaptive_frame_field_flag << 1) | frame_mbs_only_flag */ - coded_frames = 0; + coded_frames = inst->capabilities->cap[CODED_FRAMES].value; inst->subcr_params[port].coded_frames = coded_frames; s_vpr_h(inst->sid, "%s: coded frames: %d", __func__, coded_frames); rc = venus_hfi_session_property(inst, @@ -870,7 +867,7 @@ static int msm_vdec_release_input_internal_buffers(struct msm_vidc_inst *inst) return 0; } -int msm_vdec_subscribe_port_settings_change(struct msm_vidc_inst *inst, +static int msm_vdec_subscribe_input_port_settings_change(struct msm_vidc_inst *inst, enum msm_vidc_port_type port) { int rc = 0; @@ -1064,7 +1061,7 @@ static int msm_vdec_session_resume(struct msm_vidc_inst *inst, return rc; } -static msm_vdec_update_input_properties(struct msm_vidc_inst *inst) +static int msm_vdec_update_input_properties(struct msm_vidc_inst *inst) { struct msm_vidc_subscription_params subsc_params; u32 width, height; @@ -1110,6 +1107,8 @@ static msm_vdec_update_input_properties(struct msm_vidc_inst *inst) inst->capabilities->cap[HEVC_TIER].value = subsc_params.tier; inst->capabilities->cap[ENTROPY_MODE].value = subsc_params.cabac; inst->capabilities->cap[POC].value = subsc_params.pic_order_cnt; + inst->capabilities->cap[BIT_DEPTH].value = subsc_params.bit_depth; + inst->capabilities->cap[CODED_FRAMES].value = subsc_params.coded_frames; return 0; } @@ -1224,6 +1223,14 @@ int msm_vdec_start_input(struct msm_vidc_inst *inst) if (rc) goto error; + if (!inst->ipsc_properties_set) { + rc = msm_vdec_subscribe_input_port_settings_change( + inst, INPUT_PORT); + if (rc) + return rc; + inst->ipsc_properties_set = true; + } + rc = msm_vdec_subscribe_property(inst, INPUT_PORT); if (rc) return rc; @@ -1261,6 +1268,118 @@ int msm_vdec_stop_output(struct msm_vidc_inst *inst) return 0; } +static int msm_vdec_subscribe_output_port_settings_change(struct msm_vidc_inst *inst, + enum msm_vidc_port_type port) +{ + int rc = 0; + u32 payload[32] = {0}; + u32 prop_type, payload_size, payload_type; + u32 i; + struct msm_vidc_subscription_params subsc_params; + + d_vpr_h("%s()\n", __func__); + + payload[0] = HFI_MODE_PORT_SETTINGS_CHANGE; + for (i = 0; i < ARRAY_SIZE(msm_vdec_subscribe_for_port_settings_change); + i++) + payload[i + 1] = msm_vdec_subscribe_for_port_settings_change[i]; + + rc = venus_hfi_session_command(inst, + HFI_CMD_SUBSCRIBE_MODE, + port, + HFI_PAYLOAD_U32_ARRAY, + &payload[0], + (ARRAY_SIZE(msm_vdec_subscribe_for_port_settings_change) + 1) * + sizeof(u32)); + + subsc_params = inst->subcr_params[port]; + for (i = 0; i < ARRAY_SIZE(msm_vdec_subscribe_for_port_settings_change); + i++) { + payload[0] = 0; + payload[1] = 0; + payload_size = 0; + payload_type = 0; + prop_type = msm_vdec_subscribe_for_port_settings_change[i]; + switch (prop_type) { + case HFI_PROP_BITSTREAM_RESOLUTION: + payload[0] = subsc_params.bitstream_resolution; + payload_size = sizeof(u32); + payload_type = HFI_PAYLOAD_U32; + break; + case HFI_PROP_CROP_OFFSETS: + payload[0] = subsc_params.crop_offsets >> 32; + payload[1] = subsc_params.crop_offsets; + payload_size = sizeof(u64); + payload_type = HFI_PAYLOAD_64_PACKED; + break; + case HFI_PROP_LUMA_CHROMA_BIT_DEPTH: + payload[0] = subsc_params.bit_depth; + payload_size = sizeof(u32); + payload_type = HFI_PAYLOAD_U32; + break; + case HFI_PROP_CABAC_SESSION: + payload[0] = subsc_params.cabac; + payload_size = sizeof(u32); + payload_type = HFI_PAYLOAD_U32; + break; + case HFI_PROP_CODED_FRAMES: + payload[0] = subsc_params.coded_frames; + payload_size = sizeof(u32); + payload_type = HFI_PAYLOAD_U32; + break; + case HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT: + payload[0] = subsc_params.fw_min_count; + payload_size = sizeof(u32); + payload_type = HFI_PAYLOAD_U32; + break; + case HFI_PROP_PIC_ORDER_CNT_TYPE: + payload[0] = subsc_params.pic_order_cnt; + payload_size = sizeof(u32); + payload_type = HFI_PAYLOAD_U32; + break; + case HFI_PROP_SIGNAL_COLOR_INFO: + payload[0] = subsc_params.color_info; + payload_size = sizeof(u32); + payload_type = HFI_PAYLOAD_U32; + break; + case HFI_PROP_PROFILE: + payload[0] = subsc_params.profile; + payload_size = sizeof(u32); + payload_type = HFI_PAYLOAD_U32; + break; + case HFI_PROP_LEVEL: + payload[0] = subsc_params.level; + payload_size = sizeof(u32); + payload_type = HFI_PAYLOAD_U32; + break; + case HFI_PROP_TIER: + payload[0] = subsc_params.tier; + payload_size = sizeof(u32); + payload_type = HFI_PAYLOAD_U32; + break; + default: + d_vpr_e("%s: unknown property %#x\n", __func__, + prop_type); + prop_type = 0; + rc = -EINVAL; + break; + } + if (prop_type) { + rc = venus_hfi_session_property(inst, + prop_type, + HFI_HOST_FLAGS_NONE, + get_hfi_port(inst, port), + payload_type, + &payload, + payload_size); + if (rc) + return rc; + } + } + + return rc; +} + int msm_vdec_start_output(struct msm_vidc_inst *inst) { int rc = 0; @@ -1275,6 +1394,15 @@ int msm_vdec_start_output(struct msm_vidc_inst *inst) if (rc) goto error; + if (!inst->opsc_properties_set) { + memcpy(&inst->subcr_params[OUTPUT_PORT], + &inst->subcr_params[INPUT_PORT], sizeof(inst->subcr_params[INPUT_PORT])); + rc = msm_vdec_subscribe_output_port_settings_change(inst, OUTPUT_PORT); + if (rc) + return rc; + inst->opsc_properties_set = true; + } + rc = msm_vdec_subscribe_metadata(inst, OUTPUT_PORT); if (rc) return rc; diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index 6f8cc83b2f..2c0bb413f1 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -802,6 +802,8 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) inst->domain = session_type; inst->state = MSM_VIDC_OPEN; inst->request = false; + inst->ipsc_properties_set = false; + inst->opsc_properties_set = false; for (i = 0; i < MAX_SIGNAL; i++) init_completion(&inst->completions[i]); diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index ca461b634e..03a527ebd0 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -763,6 +763,12 @@ int msm_vidc_queue_buffer(struct msm_vidc_inst *inst, struct vb2_buffer *vb2) return 0; } + if (is_decode_session(inst) && + inst->capabilities->cap[CODEC_CONFIG].value) { + buf->flags |= MSM_VIDC_BUF_FLAG_CODECCONFIG; + inst->capabilities->cap[CODEC_CONFIG].value = 0; + } + print_vidc_buffer(VIDC_HIGH, "qbuf", inst, buf); meta = get_meta_buffer(inst, buf); rc = venus_hfi_queue_buffer(inst, buf, meta); diff --git a/driver/vidc/src/msm_vidc_vb2.c b/driver/vidc/src/msm_vidc_vb2.c index 25ff3b1d48..c30f885230 100644 --- a/driver/vidc/src/msm_vidc_vb2.c +++ b/driver/vidc/src/msm_vidc_vb2.c @@ -169,16 +169,6 @@ int msm_vidc_start_streaming(struct vb2_queue *q, unsigned int count) rc = msm_vidc_session_set_codec(inst); if (rc) return rc; - if (is_decode_session(inst)) { - rc = msm_vdec_subscribe_port_settings_change( - inst, INPUT_PORT); - if (rc) - return rc; - rc = msm_vdec_subscribe_port_settings_change( - inst, OUTPUT_PORT); - if (rc) - return rc; - } } /* diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index 7054b33df4..1c682b4301 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -10,6 +10,22 @@ #include "msm_vidc_driver.h" #include "msm_vdec.h" +void print_psc_properties(u32 tag, const char *str, struct msm_vidc_inst *inst, + struct msm_vidc_subscription_params subsc_params) +{ + if (!(tag & msm_vidc_debug) || !inst) + return; + + dprintk(tag, inst->sid, + "%s: resolution %d, crop offsets %lld, bit depth %d, cabac %d, coded frames %d " + "fw min count %d, poc %d, color info %d, profile %d, level %d, tier %d ", + str, subsc_params.bitstream_resolution, subsc_params.crop_offsets, + subsc_params.bit_depth, subsc_params.cabac, subsc_params.coded_frames, + subsc_params.fw_min_count, subsc_params.pic_order_cnt, + subsc_params.color_info, subsc_params.profile, subsc_params.level, + subsc_params.tier); +} + u32 vidc_port_from_hfi(struct msm_vidc_inst *inst, enum hfi_packet_port_type hfi_port) { @@ -1014,10 +1030,14 @@ static int handle_session_response(struct msm_vidc_core *core, if (hfi_cmd_type == HFI_CMD_SETTINGS_CHANGE) { if (hfi_port == HFI_PORT_BITSTREAM) { + print_psc_properties(VIDC_HIGH, "INPUT_PSC", inst, + inst->subcr_params[INPUT_PORT]); rc = msm_vdec_input_port_settings_change(inst); if (rc) goto exit; } else if (hfi_port == HFI_PORT_RAW) { + print_psc_properties(VIDC_HIGH, "OUTPUT_PSC", inst, + inst->subcr_params[OUTPUT_PORT]); rc = msm_vdec_output_port_settings_change(inst); if (rc) goto exit; From 38b9dd655f8f8a73647593fd5ed97fef69707712 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Tue, 15 Dec 2020 15:57:19 -0800 Subject: [PATCH 0037/1061] video: driver: enc fix to run sample HEVC NV12C testcase Allocate ARP buffer in CB4 to avoid HW hang issue. Add support to set HFI_PROP_RAW_RESOLUTION at enc INPUT port and did necessary changes to set HFI_PROP_CROP_OFFSETS at OUTPUT port only for encoder. Also added support to set missing basic control properties to video firmware. Change-Id: If5bc2940d37ac20c1889cd4de466be09f1e1f28b Signed-off-by: Akshata Sahukar --- driver/platform/waipio/src/msm_vidc_waipio.c | 21 +- driver/vidc/inc/hfi_property.h | 32 ++- driver/vidc/inc/msm_vidc_control.h | 6 +- driver/vidc/inc/msm_vidc_inst.h | 1 + driver/vidc/inc/msm_vidc_internal.h | 9 + driver/vidc/src/hfi_packet.c | 20 ++ driver/vidc/src/msm_venc.c | 253 ++++++++++++++++--- driver/vidc/src/msm_vidc_control.c | 50 +++- driver/vidc/src/msm_vidc_driver.c | 5 +- driver/vidc/src/msm_vidc_vb2.c | 41 --- 10 files changed, 346 insertions(+), 92 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 39a2d9b2c3..c2f80d9369 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -121,7 +121,15 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {MBPF, ENC|DEC, CODECS_ALL, 64, 138240, 1, 138240}, /* ((1920 * 1088) / 256) * 960 fps */ {MBPS, ENC|DEC, CODECS_ALL, 64, 7833600, 1, 7833600}, - {FRAME_RATE, ENC|DEC, CODECS_ALL, 1, 960, 1, 30}, + + {FRAME_RATE, ENC, CODECS_ALL, + (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), + 1, (DEFAULT_FPS << 16), + 0, + HFI_PROP_FRAME_RATE, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + {0}, {0}, + NULL, msm_vidc_set_q16}, {SCALE_X, ENC, CODECS_ALL, 8192, 65536, 1, 8192}, {SCALE_Y, ENC, CODECS_ALL, 8192, 65536, 1, 8192}, @@ -252,7 +260,9 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 0, MAX_GOP, 1, 2 * DEFAULT_FPS - 1, V4L2_CID_MPEG_VIDEO_GOP_SIZE, HFI_PROP_MAX_GOP_FRAMES, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + {0}, {0}, + NULL, msm_vidc_set_u32}, {GOP_CLOSURE, ENC, CODECS_ALL, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, @@ -284,9 +294,10 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDC_SECURE, HFI_PROP_SECURE, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + CAP_FLAG_ROOT, {0}, - {0}}, + {0}, + NULL, msm_vidc_set_u32}, {BLUR_TYPES, ENC, CODECS_ALL, VIDC_BLUR_NONE, VIDC_BLUR_ADAPTIVE, 1, VIDC_BLUR_NONE, @@ -384,7 +395,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {BITRATE_BOOST, ENC, CODECS_ALL, 0, 100, 25, 25, V4L2_CID_MPEG_VIDC_QUALITY_BITRATE_BOOST, - HFI_PROP_CONST_QUALITY_BITRATE_BOOST, + HFI_PROP_BITRATE_BOOST, CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, {ROTATION, ENC, CODECS_ALL, diff --git a/driver/vidc/inc/hfi_property.h b/driver/vidc/inc/hfi_property.h index ef1cd2f530..c06f6e343b 100644 --- a/driver/vidc/inc/hfi_property.h +++ b/driver/vidc/inc/hfi_property.h @@ -70,8 +70,8 @@ enum hfi_color_format { #define HFI_BITMASK_BITSTREAM_HEIGHT 0x0000ffff #define HFI_PROP_BITSTREAM_RESOLUTION 0x03000103 -#define HFI_BITMASK_LINEAR_STRIDE 0xffff0000 -#define HFI_BITMASK_LINEAR_SCANLINE 0x0000ffff +#define HFI_BITMASK_LINEAR_STRIDE 0xffff0000 +#define HFI_BITMASK_LINEAR_SCANLINE 0x0000ffff #define HFI_PROP_LINEAR_STRIDE_SCANLINE 0x03000104 #define HFI_BITMASK_CROP_RIGHT_OFFSET 0xffff0000 @@ -245,7 +245,7 @@ enum hfi_rate_control { #define HFI_PROP_CONTENT_ADAPTIVE_CODING 0x0300012c -#define HFI_PROP_CONST_QUALITY_BITRATE_BOOST 0x0300012d +#define HFI_PROP_BITRATE_BOOST 0x0300012d #define HFI_BITMASK_QP_I 0x000000ff #define HFI_BITMASK_QP_P 0x0000ff00 @@ -305,6 +305,11 @@ enum hfi_layer_encoding_type { #define HFI_PROP_HEIC_GRID_ENABLE 0x03000144 +enum hfi_syncframe_request_mode { + HFI_SYNC_FRAME_REQUEST_WITHOUT_SEQ_HDR = 0x00000001, + HFI_SYNC_FRAME_REQUEST_WITH_PREFIX_SEQ_HDR = 0x00000002, +}; + #define HFI_PROP_REQUEST_SYNC_FRAME 0x03000145 #define HFI_PROP_MAX_GOP_FRAMES 0x03000146 @@ -316,7 +321,6 @@ enum hfi_quality_mode { HFI_MODE_POWER_SAVE = 0x2, }; -// TODO (AS): Does not map to any V4l2 control #define HFI_PROP_QUALITY_MODE 0x03000148 enum hfi_seq_header_mode { @@ -454,6 +458,19 @@ enum hfi_picture_type { #define HFI_PROP_ROI_INFO 0x03000173 +#define HFI_PROP_WORST_COMPRESSION_RATIO 0x03000174 + +#define HFI_PROP_WORST_COMPLEXITY_FACTOR 0x03000175 + +//TODO: Enable when firmware adds support for these +//#define HFI_PROP_VBV_DELAY 0x03000176 + +//#define HFI_PROP_SEQ_CHANGE_AT_SYNC_FRAME 0x03000177 + +#define HFI_BITMASK_RAW_WIDTH 0xffff0000 +#define HFI_BITMASK_RAW_HEIGHT 0x0000ffff +#define HFI_PROP_RAW_RESOLUTION 0x03000178 + #define HFI_PROP_END 0x03FFFFFF #define HFI_SESSION_ERROR_BEGIN 0x04000000 @@ -488,6 +505,13 @@ enum hfi_picture_type { #define HFI_INFO_DATA_CORRUPT 0x06000002 +//TODO: Enable when firmware adds support for these +//#define HFI_INFO_NEGATIVE_TIMESTAMP 0x06000003 + +//#define HFI_INFO_BUFFER_OVERFLOW 0x06000004 + +//#define HFI_INFO_VCODEC_RESET 0x06000005 + #define HFI_INFORMATION_END 0x06FFFFFF #endif //__H_HFI_PROPERTY_H__ diff --git a/driver/vidc/inc/msm_vidc_control.h b/driver/vidc/inc/msm_vidc_control.h index 7015d90cc2..3cfae1b268 100644 --- a/driver/vidc/inc/msm_vidc_control.h +++ b/driver/vidc/inc/msm_vidc_control.h @@ -29,14 +29,16 @@ int msm_v4l2_op_s_ctrl(struct v4l2_ctrl *ctrl); int msm_vidc_adjust_bitrate(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_entropy_mode(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_ltr_count(void *instance, struct v4l2_ctrl *ctrl); -int msm_vidc_adjust_properties(struct msm_vidc_inst *inst); +int msm_vidc_adjust_v4l2_properties(struct msm_vidc_inst *inst); int msm_vidc_set_u32(void *instance, enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_s32(void *instance, enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_array(void *instance, enum msm_vidc_inst_capability_type cap_id); -int msm_vidc_set_fw_list(struct msm_vidc_inst *inst); +int msm_vidc_set_q16(void *instance, + enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_v4l2_properties(struct msm_vidc_inst *inst); int msm_vidc_v4l2_menu_to_hfi(struct msm_vidc_inst *inst, enum msm_vidc_inst_capability_type cap_id, u32 *value); diff --git a/driver/vidc/inc/msm_vidc_inst.h b/driver/vidc/inc/msm_vidc_inst.h index f00feb611d..9c11aa19d0 100644 --- a/driver/vidc/inc/msm_vidc_inst.h +++ b/driver/vidc/inc/msm_vidc_inst.h @@ -103,6 +103,7 @@ struct msm_vidc_inst { struct msm_vidc_properties prop; enum msm_vidc_stage_type stage; enum msm_vidc_pipe_type pipe; + enum msm_vidc_quality_mode quality_mode; struct msm_vidc_power power; struct msm_vidc_buffers_info buffers; struct msm_vidc_mappings_info mappings; diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 2412bdae85..eb5ba48b63 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -40,6 +40,10 @@ #define DEFAULT_BSE_VPP_DELAY 2 #define MAX_CAP_PARENTS 16 #define MAX_CAP_CHILDREN 16 +#define DEFAULT_BITSTREM_ALIGNMENT 16 +#define H265_BITSTREM_ALIGNMENT 32 +#define DEFAULT_MAX_HOST_BUF_COUNT 32 + /* TODO * #define MAX_SUPERFRAME_COUNT 32 */ @@ -182,6 +186,11 @@ enum msm_vidc_pipe_type { MSM_VIDC_PIPE_4 = 4, }; +enum msm_vidc_quality_mode { + MSM_VIDC_MAX_QUALITY_MODE = 0x1, + MSM_VIDC_POWER_SAVE_MODE = 0x2, +}; + enum msm_vidc_core_capability_type { CORE_CAP_NONE = 0, ENC_CODECS, diff --git a/driver/vidc/src/hfi_packet.c b/driver/vidc/src/hfi_packet.c index 05d52e6777..5874b352e4 100644 --- a/driver/vidc/src/hfi_packet.c +++ b/driver/vidc/src/hfi_packet.c @@ -211,6 +211,26 @@ u32 get_hfi_colorformat(struct msm_vidc_inst *inst, return hfi_colorformat; } +u32 get_hfi_quality_mode(struct msm_vidc_inst *inst) +{ + u32 hfi_mode = HFI_MODE_POWER_SAVE; + + switch(inst->quality_mode) { + case MSM_VIDC_MAX_QUALITY_MODE: + hfi_mode = HFI_MODE_MAX_QUALITY; + break; + case MSM_VIDC_POWER_SAVE_MODE: + hfi_mode = HFI_MODE_POWER_SAVE; + break; + default: + s_vpr_e(inst->sid, "%s: invalid qulity mode %d\n", + __func__, inst->quality_mode); + break; + } + + return hfi_mode; +} + int get_hfi_buffer(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buffer, struct hfi_buffer *buf) { diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index a28a688ed3..0f680e825b 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -19,13 +19,15 @@ u32 msm_venc_input_set_prop[] = { HFI_PROP_COLOR_FORMAT, - HFI_PROP_BITSTREAM_RESOLUTION, - HFI_PROP_CROP_OFFSETS, + HFI_PROP_RAW_RESOLUTION, + HFI_PROP_LINEAR_STRIDE_SCANLINE, + HFI_PROP_BUFFER_HOST_MAX_COUNT, }; u32 msm_venc_output_set_prop[] = { HFI_PROP_BITSTREAM_RESOLUTION, HFI_PROP_CROP_OFFSETS, + HFI_PROP_BUFFER_HOST_MAX_COUNT, }; u32 msm_venc_input_subscribe_for_properties[] = { @@ -116,13 +118,65 @@ static int msm_venc_set_colorformat(struct msm_vidc_inst *inst, return 0; } -static int msm_venc_set_resolution(struct msm_vidc_inst *inst, +/* TODO: Enable when NV12 support is required */ +static int msm_venc_set_linear_alignment_factor(struct msm_vidc_inst *inst, + enum msm_vidc_port_type port) +{ +/* int rc = 0; + u32 pixelformat; + u32 alignment_factor[2]; + + if (port != INPUT_PORT) { + s_vpr_e(inst->sid, "%s: invalid port %d\n", __func__, port); + return -EINVAL; + } + + pixelformat = inst->fmts[INPUT_PORT].fmt.pix_mp.pixelformat; + if (pixelformat == V4L2_PIX_FMT_VIDC_NV12C || + pixelformat == V4L2_PIX_FMT_VIDC_TP10C || + pixelformat == V4L2_PIX_FMT_VIDC_ARGB32C) { + s_vpr_e(inst->sid, + "%s: not a linear color fmt, property is not set\n", + __func__); + return 0; + } + + if (pixelformat == V4L2_PIX_FMT_ARGB32) { + alignment_factor[0] = + (rgb_stride_alignment(pixelformat, __func__) << 16) | + rgb_scanline_alignment(pixelformat, __func__); + alignment_factor[1] = 0; + } else { + alignment_factor[0] = + (y_stride_alignment(pixelformat, __func__) << 16) | + y_scanline_alignment(pixelformat, __func__); + alignment_factor[1] = + (uv_stride_alignment(pixelformat, __func__) << 16) | + uv_scanline_alignment(pixelformat, __func__); + } + + s_vpr_h(inst->sid, "%s: payload[0]: %u payload[1]: %u\n", __func__, + alignment_factor[0], alignment_factor[1]); + rc = venus_hfi_session_property(inst, + HFI_PROP_LINEAR_STRIDE_SCANLINE, + HFI_HOST_FLAGS_NONE, + get_hfi_port(inst, port), + HFI_PAYLOAD_64_PACKED, + &alignment_factor, + sizeof(u64)); + if (rc) + return rc; +*/ + return 0; +} + +static int msm_venc_set_raw_resolution(struct msm_vidc_inst *inst, enum msm_vidc_port_type port) { int rc = 0; u32 resolution; - if (port != INPUT_PORT && port != OUTPUT_PORT) { + if (port != INPUT_PORT) { s_vpr_e(inst->sid, "%s: invalid port %d\n", __func__, port); return -EINVAL; } @@ -132,6 +186,34 @@ static int msm_venc_set_resolution(struct msm_vidc_inst *inst, s_vpr_h(inst->sid, "%s: width: %d height: %d\n", __func__, inst->fmts[port].fmt.pix_mp.width, inst->fmts[port].fmt.pix_mp.height); + rc = venus_hfi_session_property(inst, + HFI_PROP_RAW_RESOLUTION, + HFI_HOST_FLAGS_NONE, + get_hfi_port(inst, port), + HFI_PAYLOAD_32_PACKED, + &resolution, + sizeof(u32)); + if (rc) + return rc; + return 0; +} + +static int msm_venc_set_bitstream_resolution(struct msm_vidc_inst *inst, + enum msm_vidc_port_type port) +{ + int rc = 0; + u32 resolution; + + if (port != OUTPUT_PORT) { + s_vpr_e(inst->sid, "%s: invalid port %d\n", __func__, port); + return -EINVAL; + } + + resolution = (inst->fmts[port].fmt.pix_mp.width << 16) | + inst->fmts[port].fmt.pix_mp.height; + s_vpr_h(inst->sid, "%s: width: %d height: %d\n", __func__, + inst->fmts[port].fmt.pix_mp.width, + inst->fmts[port].fmt.pix_mp.height); rc = venus_hfi_session_property(inst, HFI_PROP_BITSTREAM_RESOLUTION, HFI_HOST_FLAGS_NONE, @@ -148,25 +230,57 @@ static int msm_venc_set_crop_offsets(struct msm_vidc_inst *inst, enum msm_vidc_port_type port) { int rc = 0; - u32 crop; + u32 left_offset, top_offset, right_offset, bottom_offset; + u64 crop; - if (port != INPUT_PORT && port != OUTPUT_PORT) { + if (port != OUTPUT_PORT) { s_vpr_e(inst->sid, "%s: invalid port %d\n", __func__, port); return -EINVAL; } - /* TODO: recheck later */ - crop = inst->fmts[INPUT_PORT].fmt.pix_mp.width << 16 | - inst->fmts[INPUT_PORT].fmt.pix_mp.height; - s_vpr_h(inst->sid, "%s: width: %d height: %d\n", __func__, - inst->fmts[INPUT_PORT].fmt.pix_mp.width, - inst->fmts[INPUT_PORT].fmt.pix_mp.height); + left_offset = inst->crop.left; + top_offset = inst->crop.top; + right_offset = (inst->fmts[port].fmt.pix_mp.width - + inst->crop.width); + bottom_offset = (inst->fmts[port].fmt.pix_mp.height - + inst->crop.height); + + crop = (u64)right_offset << 48 | (u64)bottom_offset << 32 | + (u64)left_offset << 16 | top_offset; + s_vpr_h(inst->sid, "%s: left_offset: %d top_offset: %d " + "right_offset: %d bottom_offset: %d", __func__, + left_offset, top_offset, right_offset, bottom_offset); + rc = venus_hfi_session_property(inst, HFI_PROP_CROP_OFFSETS, HFI_HOST_FLAGS_NONE, get_hfi_port(inst, port), HFI_PAYLOAD_64_PACKED, &crop, + sizeof(u64)); + if (rc) + return rc; + return 0; +} + +static int msm_venc_set_host_max_buf_count(struct msm_vidc_inst *inst, + enum msm_vidc_port_type port) +{ + int rc = 0; + u32 count = DEFAULT_MAX_HOST_BUF_COUNT; + + if (port != INPUT_PORT && port != OUTPUT_PORT) { + s_vpr_e(inst->sid, "%s: invalid port %d\n", __func__, port); + return -EINVAL; + } + + s_vpr_h(inst->sid, "%s: count: %u port: %u\n", __func__, count, port); + rc = venus_hfi_session_property(inst, + HFI_PROP_BUFFER_HOST_MAX_COUNT, + HFI_HOST_FLAGS_NONE, + get_hfi_port(inst, port), + HFI_PAYLOAD_U32, + &count, sizeof(u32)); if (rc) return rc; @@ -185,6 +299,7 @@ static int msm_venc_set_stage(struct msm_vidc_inst *inst) return -EINVAL; } + s_vpr_h(inst->sid, "%s: stage: %u\n", __func__, inst->stage); rc = venus_hfi_session_property(inst, HFI_PROP_STAGE, HFI_HOST_FLAGS_NONE, @@ -209,6 +324,7 @@ static int msm_venc_set_pipe(struct msm_vidc_inst *inst) return -EINVAL; } + s_vpr_h(inst->sid, "%s: pipe: %u\n", __func__, inst->pipe); rc = venus_hfi_session_property(inst, HFI_PROP_PIPE, HFI_HOST_FLAGS_NONE, @@ -221,6 +337,29 @@ static int msm_venc_set_pipe(struct msm_vidc_inst *inst) return 0; } +static int msm_venc_set_quality_mode(struct msm_vidc_inst *inst) +{ + int rc = 0; + + if (!inst->quality_mode) { + s_vpr_e(inst->sid, "%s: invalid mode: %u\n", + __func__, inst->quality_mode); + return -EINVAL; + } + + s_vpr_h(inst->sid, "%s: quality_mode: %u\n", __func__, inst->quality_mode); + rc = venus_hfi_session_property(inst, + HFI_PROP_QUALITY_MODE, + HFI_HOST_FLAGS_NONE, + HFI_PORT_BITSTREAM, + HFI_PAYLOAD_U32_ENUM, + &inst->quality_mode, + sizeof(u32)); + if (rc) + return rc; + return 0; +} + static int msm_venc_set_input_properties(struct msm_vidc_inst *inst) { int rc = 0; @@ -238,11 +377,14 @@ static int msm_venc_set_input_properties(struct msm_vidc_inst *inst) case HFI_PROP_COLOR_FORMAT: rc = msm_venc_set_colorformat(inst, INPUT_PORT); break; - case HFI_PROP_BITSTREAM_RESOLUTION: - rc = msm_venc_set_resolution(inst, INPUT_PORT); + case HFI_PROP_RAW_RESOLUTION: + rc = msm_venc_set_raw_resolution(inst, INPUT_PORT); break; - case HFI_PROP_CROP_OFFSETS: - rc = msm_venc_set_crop_offsets(inst, INPUT_PORT); + case HFI_PROP_LINEAR_STRIDE_SCANLINE: + rc = msm_venc_set_linear_alignment_factor(inst, INPUT_PORT); + break; + case HFI_PROP_BUFFER_HOST_MAX_COUNT: + rc = msm_venc_set_host_max_buf_count(inst, INPUT_PORT); break; default: d_vpr_e("%s: unknown property %#x\n", __func__, @@ -266,6 +408,39 @@ static int msm_venc_set_output_properties(struct msm_vidc_inst *inst) return -EINVAL; } + for (i = 0; i < ARRAY_SIZE(msm_venc_output_set_prop); + i++) { + switch (msm_venc_output_set_prop[i]) { + case HFI_PROP_BITSTREAM_RESOLUTION: + rc = msm_venc_set_bitstream_resolution(inst, OUTPUT_PORT); + break; + case HFI_PROP_CROP_OFFSETS: + rc = msm_venc_set_crop_offsets(inst, OUTPUT_PORT); + break; + case HFI_PROP_BUFFER_HOST_MAX_COUNT: + rc = msm_venc_set_host_max_buf_count(inst, OUTPUT_PORT); + break; + default: + d_vpr_e("%s: unknown property %#x\n", __func__, + msm_venc_output_set_prop[i]); + rc = -EINVAL; + break; + } + } + + return rc; +} + +static int msm_venc_set_internal_properties(struct msm_vidc_inst *inst) +{ + int rc = 0; + + d_vpr_h("%s()\n", __func__); + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + //TODO: set HFI_PORT_NONE properties at master port streamon. rc = msm_venc_set_stage(inst); if (rc) @@ -275,22 +450,9 @@ static int msm_venc_set_output_properties(struct msm_vidc_inst *inst) if (rc) return rc; - for (i = 0; i < ARRAY_SIZE(msm_venc_output_set_prop); - i++) { - switch (msm_venc_output_set_prop[i]) { - case HFI_PROP_BITSTREAM_RESOLUTION: - rc = msm_venc_set_resolution(inst, OUTPUT_PORT); - break; - case HFI_PROP_CROP_OFFSETS: - rc = msm_venc_set_crop_offsets(inst, OUTPUT_PORT); - break; - default: - d_vpr_e("%s: unknown property %#x\n", __func__, - msm_venc_output_set_prop[i]); - rc = -EINVAL; - break; - } - } + rc = msm_venc_set_quality_mode(inst); + if (rc) + return rc; return rc; } @@ -678,6 +840,18 @@ int msm_venc_start_output(struct msm_vidc_inst *inst) if (rc) goto error; + rc = msm_vidc_adjust_v4l2_properties(inst); + if (rc) + return -EINVAL; + + rc = msm_vidc_set_v4l2_properties(inst); + if (rc) + return -EINVAL; + + rc = msm_venc_set_internal_properties(inst); + if (rc) + goto error; + rc = msm_venc_property_subscription(inst, OUTPUT_PORT); if (rc) return rc; @@ -732,6 +906,7 @@ int msm_venc_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) v4l2_colorformat_to_media(fmt->fmt.pix_mp.pixelformat, __func__), f->fmt.pix_mp.height); + fmt->fmt.pix_mp.num_planes = 1; fmt->fmt.pix_mp.plane_fmt[0].bytesperline = fmt->fmt.pix_mp.width; @@ -804,8 +979,17 @@ int msm_venc_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) goto err_invalid_fmt; } fmt->type = OUTPUT_MPLANE; - fmt->fmt.pix_mp.width = ALIGN(f->fmt.pix_mp.width, 16); - fmt->fmt.pix_mp.height = ALIGN(f->fmt.pix_mp.height, 16); + if (f->fmt.pix_mp.pixelformat == V4L2_PIX_FMT_HEVC) { + fmt->fmt.pix_mp.width = ALIGN(f->fmt.pix_mp.width, + H265_BITSTREM_ALIGNMENT); + fmt->fmt.pix_mp.height = ALIGN(f->fmt.pix_mp.height, + H265_BITSTREM_ALIGNMENT); + } else { + fmt->fmt.pix_mp.width = ALIGN(f->fmt.pix_mp.width, + DEFAULT_BITSTREM_ALIGNMENT); + fmt->fmt.pix_mp.height = ALIGN(f->fmt.pix_mp.height, + DEFAULT_BITSTREM_ALIGNMENT); + } fmt->fmt.pix_mp.pixelformat = f->fmt.pix_mp.pixelformat; fmt->fmt.pix_mp.num_planes = 1; fmt->fmt.pix_mp.plane_fmt[0].bytesperline = 0; @@ -1042,6 +1226,7 @@ int msm_venc_inst_init(struct msm_vidc_inst *inst) inst->prop.operating_rate = DEFAULT_FPS << 16; inst->stage = MSM_VIDC_STAGE_2; inst->pipe = MSM_VIDC_PIPE_4; + inst->quality_mode = MSM_VIDC_MAX_QUALITY_MODE; rc = msm_venc_codec_change(inst, inst->fmts[OUTPUT_PORT].fmt.pix_mp.pixelformat); diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index ae907206fb..74a0b78b3f 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -551,7 +551,7 @@ int msm_v4l2_op_s_ctrl(struct v4l2_ctrl *ctrl) return 0; /* Dynamic set control ASAP */ - rc = msm_vidc_set_fw_list(inst); + rc = msm_vidc_set_v4l2_properties(inst); if (rc) { s_vpr_e(inst->sid, "%s: setting %s failed\n", __func__, ctrl->name); @@ -695,7 +695,7 @@ int msm_vidc_adjust_bitrate(void *instance, struct v4l2_ctrl *ctrl) * - update instance firmware list with current capability id * Now, loop over child list and call its adjust function */ -int msm_vidc_adjust_properties(struct msm_vidc_inst *inst) +int msm_vidc_adjust_v4l2_properties(struct msm_vidc_inst *inst) { int rc = 0; int i; @@ -742,6 +742,38 @@ exit: return rc; } +int msm_vidc_set_q16(void *instance, + enum msm_vidc_inst_capability_type cap_id) +{ + int rc = 0; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; + u32 hfi_value = 0; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + hfi_value = inst->capabilities->cap[cap_id].value; + s_vpr_h(inst->sid, + "%s: hfi_id: %#x, value: %#x\n", __func__, + inst->capabilities->cap[cap_id].hfi_id, + hfi_value); + rc = venus_hfi_session_property(inst, + inst->capabilities->cap[cap_id].hfi_id, + HFI_HOST_FLAGS_NONE, + msm_vidc_get_port_info(inst, cap_id), + HFI_PAYLOAD_Q16, + &hfi_value, + sizeof(u32)); + if (rc) + s_vpr_e(inst->sid, + "%s: failed to set cap_id: %d to fw\n", + __func__, cap_id); + + return rc; +} + int msm_vidc_set_u32(void *instance, enum msm_vidc_inst_capability_type cap_id) { @@ -764,6 +796,10 @@ int msm_vidc_set_u32(void *instance, hfi_payload = HFI_PAYLOAD_U32; } + s_vpr_h(inst->sid, + "%s: hfi_id: %#x, value: %u\n", __func__, + inst->capabilities->cap[cap_id].hfi_id, + hfi_value); rc = venus_hfi_session_property(inst, inst->capabilities->cap[cap_id].hfi_id, HFI_HOST_FLAGS_NONE, @@ -790,6 +826,10 @@ int msm_vidc_set_s32(void *instance, return -EINVAL; } + s_vpr_h(inst->sid, + "%s: hfi_id: %#x, value: %d\n", __func__, + inst->capabilities->cap[cap_id].hfi_id, + inst->capabilities->cap[cap_id].value); rc = venus_hfi_session_property(inst, inst->capabilities->cap[cap_id].hfi_id, HFI_HOST_FLAGS_NONE, HFI_PORT_NONE, @@ -851,7 +891,7 @@ int msm_vidc_set_array(void *instance, return rc; } -int msm_vidc_set_fw_list(struct msm_vidc_inst *inst) +int msm_vidc_set_v4l2_properties(struct msm_vidc_inst *inst) { int rc = 0; struct msm_vidc_inst_capability *capability; @@ -942,10 +982,10 @@ int msm_vidc_v4l2_menu_to_hfi(struct msm_vidc_inst *inst, case V4L2_CID_MPEG_VIDEO_HEADER_MODE: switch (capability->cap[cap_id].value) { case V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE: - *value = BIT(HFI_SEQ_HEADER_SEPERATE_FRAME); + *value = HFI_SEQ_HEADER_SEPERATE_FRAME; break; case V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME: - *value = BIT(HFI_SEQ_HEADER_JOINED_WITH_1ST_FRAME); + *value = HFI_SEQ_HEADER_JOINED_WITH_1ST_FRAME; break; /* * TODO (AS): other HFI values are missing corresponding diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 03a527ebd0..d3d53b6e0b 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -272,8 +272,10 @@ u32 msm_vidc_get_buffer_region(struct msm_vidc_inst *inst, { u32 region = MSM_VIDC_NON_SECURE; - if (!is_secure_session(inst)) + if (!is_secure_session(inst) && + buffer_type != MSM_VIDC_BUF_ARP) { return region; + } switch (buffer_type) { case MSM_VIDC_BUF_INPUT: @@ -906,6 +908,7 @@ int msm_vidc_create_internal_buffer(struct msm_vidc_inst *inst, alloc->region = msm_vidc_get_buffer_region(inst, buffer_type, __func__); alloc->size = buffer->buffer_size; + alloc->secure = (alloc->region > MSM_VIDC_NON_SECURE) ? 1 : 0; rc = msm_vidc_memory_alloc(inst->core, alloc); if (rc) return -ENOMEM; diff --git a/driver/vidc/src/msm_vidc_vb2.c b/driver/vidc/src/msm_vidc_vb2.c index c30f885230..735e414d3b 100644 --- a/driver/vidc/src/msm_vidc_vb2.c +++ b/driver/vidc/src/msm_vidc_vb2.c @@ -171,47 +171,6 @@ int msm_vidc_start_streaming(struct vb2_queue *q, unsigned int count) return rc; } - /* - if ((inst->state == MSM_VIDC_OPEN && q->type == OUTPUT_MPLANE) || - inst->state == MSM_VIDC_START_INPUT) { - s_vpr_h(inst->sid, "$s: msm_vidc_adjust_properties\n"); - rc = msm_vidc_adjust_properties(inst); - if (rc) - return -EINVAL; - - s_vpr_h(inst->sid, "$s: msm_vidc_set_fw_list\n"); - rc = msm_vidc_set_fw_list(inst); - if (rc) - return -EINVAL; - } - - if (inst->state == MSM_VIDC_START_INPUT || - inst->state == MSM_VIDC_START_OUTPUT) { - rc = msm_vidc_adjust_properties(inst); - if (rc) - return -EINVAL; - } - - if ((inst->state == MSM_VIDC_START_OUTPUT) || - (inst->state == MSM_VIDC_OPEN && - q->type == INPUT_MPLANE)) { - rc = msm_vidc_set_fw_list(inst); - if (rc) - return -EINVAL; - } - */ - - if (inst->state == MSM_VIDC_START_INPUT || - inst->state == MSM_VIDC_START_OUTPUT) { - rc = msm_vidc_adjust_properties(inst); - if (rc) - return -EINVAL; - - rc = msm_vidc_set_fw_list(inst); - if (rc) - return -EINVAL; - } - if (q->type == INPUT_MPLANE) { if (is_decode_session(inst)) rc = msm_vdec_start_input(inst); From b572d80324532a7870de219a7d4b586c5b577a5e Mon Sep 17 00:00:00 2001 From: Karthikeyan Periasamy Date: Fri, 18 Dec 2020 23:31:44 -0800 Subject: [PATCH 0038/1061] Enable Video DLKM Enable video DLKM compilation in vendor SI CRs-Fixed: 2836617 Signed-off-by: Karthikeyan Periasamy Change-Id: I281d1c18d72f75c43d7a14a174e892d44c1d9a3d --- video_kernel_board.mk | 7 +++++++ video_kernel_product.mk | 2 ++ 2 files changed, 9 insertions(+) create mode 100644 video_kernel_board.mk create mode 100644 video_kernel_product.mk diff --git a/video_kernel_board.mk b/video_kernel_board.mk new file mode 100644 index 0000000000..59c58749d6 --- /dev/null +++ b/video_kernel_board.mk @@ -0,0 +1,7 @@ +# SPDX-License-Identifier: GPL-2.0-only +# Build video kernel driver +ifneq ($(TARGET_BOARD_AUTO),true) +ifeq ($(call is-board-platform-in-list,$(TARGET_BOARD_PLATFORM)),true) +BOARD_VENDOR_KERNEL_MODULES += $(KERNEL_MODULES_OUT)/msm_video.ko +endif +endif diff --git a/video_kernel_product.mk b/video_kernel_product.mk new file mode 100644 index 0000000000..6cad4ca521 --- /dev/null +++ b/video_kernel_product.mk @@ -0,0 +1,2 @@ +# SPDX-License-Identifier: GPL-2.0-only +PRODUCT_PACKAGES += msm_video.ko From c5f9b0d80039b7fdd7b352c228b98e45ea85e4fd Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Mon, 21 Dec 2020 11:45:04 -0800 Subject: [PATCH 0039/1061] video: driver: update hfi driver files based on FW#7 (p4 CL# 27761469) update hfi_property.h and hfi_command.h files to align with firmware hfi_lx_prop_v1.0_doc.h and hfi_lx_cmd_v1.0_doc.h files respectively. Change-Id: Id1e01fab0d40040075987d5b745a2d9ade4cd3a1 Signed-off-by: Akshata Sahukar --- driver/vidc/inc/hfi_command.h | 12 ++++++++---- driver/vidc/inc/hfi_property.h | 19 ++++++++----------- driver/vidc/src/msm_vdec.c | 2 +- driver/vidc/src/msm_venc.c | 6 +++--- 4 files changed, 20 insertions(+), 19 deletions(-) diff --git a/driver/vidc/inc/hfi_command.h b/driver/vidc/inc/hfi_command.h index e67fd819c5..1837d001d7 100644 --- a/driver/vidc/inc/hfi_command.h +++ b/driver/vidc/inc/hfi_command.h @@ -161,14 +161,18 @@ enum hfi_property_mode_type { #define HFI_SSR_TYPE_SW_ERR_FATAL 0x1 #define HFI_SSR_TYPE_SW_DIV_BY_ZERO 0x2 -#define HFI_SSR_TYPE_HW_WDOG_IRQ 0x3 +#define HFI_SSR_TYPE_CPU_WDOG_IRQ 0x3 #define HFI_SSR_TYPE_NOC_ERROR 0x4 -#define HFI_SSR_TYPE_VCODEC_HUNG 0x5 -#define HFI_BITMASK_SSR_SUB_CLIENT_ID 0x000000f0 -#define HFI_BITMASK_SSR_TYPE 0x0000000f +#define HFI_BITMASK_HW_CLIENT_ID 0x000000f0 +#define HFI_BITMASK_SSR_TYPE 0x0000000f #define HFI_CMD_SSR 0x0100000D +#define HFI_STABILITY_TYPE_VCODEC_HUNG 0x1 +#define HFI_STABILITY_TYPE_ENC_BUFFER_FULL 0x2 +#define HFI_BITMASK_STABILITY_TYPE 0x0000000f +#define HFI_CMD_STABILITY 0x0100000E + #define HFI_CMD_END 0x01FFFFFF #endif //__H_HFI_COMMAND_H__ diff --git a/driver/vidc/inc/hfi_property.h b/driver/vidc/inc/hfi_property.h index c06f6e343b..f802f17c20 100644 --- a/driver/vidc/inc/hfi_property.h +++ b/driver/vidc/inc/hfi_property.h @@ -70,9 +70,9 @@ enum hfi_color_format { #define HFI_BITMASK_BITSTREAM_HEIGHT 0x0000ffff #define HFI_PROP_BITSTREAM_RESOLUTION 0x03000103 -#define HFI_BITMASK_LINEAR_STRIDE 0xffff0000 -#define HFI_BITMASK_LINEAR_SCANLINE 0x0000ffff -#define HFI_PROP_LINEAR_STRIDE_SCANLINE 0x03000104 +#define HFI_BITMASK_LINEAR_STRIDE_ALIGNMENT 0xffff0000 +#define HFI_BITMASK_LINEAR_SCANLINE_ALIGNMENT 0x0000ffff +#define HFI_PROP_LINEAR_ALIGNMENT_FACTOR 0x03000104 #define HFI_BITMASK_CROP_RIGHT_OFFSET 0xffff0000 #define HFI_BITMASK_CROP_BOTTOM_OFFSET 0x0000ffff @@ -237,7 +237,6 @@ enum hfi_rate_control { HFI_RC_OFF = 0x00000003, HFI_RC_CBR_VFR = 0x00000004, HFI_RC_LOSSLESS = 0x00000005, - HFI_RC_CBR_VFR_LEGACY = 0x00000006, }; #define HFI_PROP_RATE_CONTROL 0x0300012a @@ -462,10 +461,9 @@ enum hfi_picture_type { #define HFI_PROP_WORST_COMPLEXITY_FACTOR 0x03000175 -//TODO: Enable when firmware adds support for these -//#define HFI_PROP_VBV_DELAY 0x03000176 +#define HFI_PROP_VBV_DELAY 0x03000176 -//#define HFI_PROP_SEQ_CHANGE_AT_SYNC_FRAME 0x03000177 +#define HFI_PROP_SEQ_CHANGE_AT_SYNC_FRAME 0x03000177 #define HFI_BITMASK_RAW_WIDTH 0xffff0000 #define HFI_BITMASK_RAW_HEIGHT 0x0000ffff @@ -505,12 +503,11 @@ enum hfi_picture_type { #define HFI_INFO_DATA_CORRUPT 0x06000002 -//TODO: Enable when firmware adds support for these -//#define HFI_INFO_NEGATIVE_TIMESTAMP 0x06000003 +#define HFI_INFO_NEGATIVE_TIMESTAMP 0x06000003 -//#define HFI_INFO_BUFFER_OVERFLOW 0x06000004 +#define HFI_INFO_BUFFER_OVERFLOW 0x06000004 -//#define HFI_INFO_VCODEC_RESET 0x06000005 +#define HFI_INFO_VCODEC_RESET 0x06000005 #define HFI_INFORMATION_END 0x06FFFFFF diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 2ae790361e..ec9f931b22 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -119,7 +119,7 @@ static int msm_vdec_set_linear_stride_scanline(struct msm_vidc_inst *inst) "stride_uv: %d, scanline_uv: %d", __func__, stride_y, scanline_y, stride_uv, scanline_uv); rc = venus_hfi_session_property(inst, - HFI_PROP_LINEAR_STRIDE_SCANLINE, + HFI_PROP_LINEAR_ALIGNMENT_FACTOR, HFI_HOST_FLAGS_NONE, get_hfi_port(inst, OUTPUT_PORT), HFI_PAYLOAD_U64, diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index 0f680e825b..0946a0d618 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -20,7 +20,7 @@ u32 msm_venc_input_set_prop[] = { HFI_PROP_COLOR_FORMAT, HFI_PROP_RAW_RESOLUTION, - HFI_PROP_LINEAR_STRIDE_SCANLINE, + HFI_PROP_LINEAR_ALIGNMENT_FACTOR, HFI_PROP_BUFFER_HOST_MAX_COUNT, }; @@ -158,7 +158,7 @@ static int msm_venc_set_linear_alignment_factor(struct msm_vidc_inst *inst, s_vpr_h(inst->sid, "%s: payload[0]: %u payload[1]: %u\n", __func__, alignment_factor[0], alignment_factor[1]); rc = venus_hfi_session_property(inst, - HFI_PROP_LINEAR_STRIDE_SCANLINE, + HFI_PROP_LINEAR_ALIGNMENT_FACTOR, HFI_HOST_FLAGS_NONE, get_hfi_port(inst, port), HFI_PAYLOAD_64_PACKED, @@ -380,7 +380,7 @@ static int msm_venc_set_input_properties(struct msm_vidc_inst *inst) case HFI_PROP_RAW_RESOLUTION: rc = msm_venc_set_raw_resolution(inst, INPUT_PORT); break; - case HFI_PROP_LINEAR_STRIDE_SCANLINE: + case HFI_PROP_LINEAR_ALIGNMENT_FACTOR: rc = msm_venc_set_linear_alignment_factor(inst, INPUT_PORT); break; case HFI_PROP_BUFFER_HOST_MAX_COUNT: From 7509e9f16b0595f6b1224d8d6d3fa8d112abd031 Mon Sep 17 00:00:00 2001 From: Maheshwar Ajja Date: Mon, 21 Dec 2020 11:57:04 -0800 Subject: [PATCH 0040/1061] video: driver: add power changes Add or amend below functionalities - scale clocks - scale buses - buffer counts - buffer sizes Change-Id: I3cddbb7112cd85a84cf86256134059f52b66a3af Signed-off-by: Maheshwar Ajja --- .../variant/iris2/inc/msm_vidc_power_iris2.h | 6 +- driver/variant/iris2/src/msm_vidc_iris2.c | 4 +- .../variant/iris2/src/msm_vidc_power_iris2.c | 669 +++++++++++++++++- driver/vidc/inc/msm_vidc_buffer.h | 9 + driver/vidc/inc/msm_vidc_debug.h | 1 + driver/vidc/inc/msm_vidc_driver.h | 48 ++ driver/vidc/inc/msm_vidc_inst.h | 9 +- driver/vidc/inc/msm_vidc_internal.h | 43 ++ driver/vidc/inc/msm_vidc_power.h | 243 ++++++- driver/vidc/inc/venus_hfi.h | 2 +- driver/vidc/src/msm_vdec.c | 4 +- driver/vidc/src/msm_venc.c | 4 +- driver/vidc/src/msm_vidc.c | 6 +- driver/vidc/src/msm_vidc_buffer.c | 127 +++- driver/vidc/src/msm_vidc_debug.c | 3 + driver/vidc/src/msm_vidc_driver.c | 79 +++ driver/vidc/src/msm_vidc_power.c | 568 ++++++++++++++- driver/vidc/src/msm_vidc_vb2.c | 1 + driver/vidc/src/venus_hfi.c | 6 +- 19 files changed, 1774 insertions(+), 58 deletions(-) diff --git a/driver/variant/iris2/inc/msm_vidc_power_iris2.h b/driver/variant/iris2/inc/msm_vidc_power_iris2.h index 886b724e60..7ab3690e89 100644 --- a/driver/variant/iris2/inc/msm_vidc_power_iris2.h +++ b/driver/variant/iris2/inc/msm_vidc_power_iris2.h @@ -6,9 +6,11 @@ #ifndef __H_MSM_VIDC_POWER_IRIS2_H__ #define __H_MSM_VIDC_POWER_IRIS2_H__ +#include "msm_vidc_power.h" #include "msm_vidc_inst.h" -u64 msm_vidc_calc_freq_iris2(struct msm_vidc_inst* inst); -u64 msm_vidc_calc_bw_iris2(struct msm_vidc_inst* inst); +u64 msm_vidc_calc_freq_iris2(struct msm_vidc_inst* inst, u32 data_size); +int msm_vidc_calc_bw_iris2(struct msm_vidc_inst* inst, + struct vidc_bus_vote_data* vote_data); #endif diff --git a/driver/variant/iris2/src/msm_vidc_iris2.c b/driver/variant/iris2/src/msm_vidc_iris2.c index 0423004092..00795368f4 100644 --- a/driver/variant/iris2/src/msm_vidc_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_iris2.c @@ -500,8 +500,8 @@ static struct msm_vidc_session_ops msm_session_ops = { .buffer_size = msm_buffer_size_iris2, .min_count = msm_buffer_min_count_iris2, .extra_count = msm_buffer_extra_count_iris2, - .calc_freq = NULL, - .calc_bw = NULL, + .calc_freq = msm_vidc_calc_freq_iris2, + .calc_bw = msm_vidc_calc_bw_iris2, .decide_work_route = NULL, .decide_work_mode = NULL, .decide_core_and_power_mode = NULL, diff --git a/driver/variant/iris2/src/msm_vidc_power_iris2.c b/driver/variant/iris2/src/msm_vidc_power_iris2.c index b9779a0b1f..449eb6bb78 100644 --- a/driver/variant/iris2/src/msm_vidc_power_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_power_iris2.c @@ -5,26 +5,675 @@ #include "msm_vidc_power_iris2.h" #include "msm_vidc_inst.h" +#include "msm_vidc_core.h" +#include "msm_vidc_driver.h" #include "msm_vidc_debug.h" -u64 msm_vidc_calc_freq_iris2(struct msm_vidc_inst *inst) +u64 msm_vidc_calc_freq_iris2(struct msm_vidc_inst *inst, u32 data_size) { u64 freq = 0; + struct msm_vidc_core* core; + struct msm_vidc_power* power; + u64 vsp_cycles = 0, vpp_cycles = 0, fw_cycles = 0; + u64 fw_vpp_cycles = 0; + u32 vpp_cycles_per_mb; + u32 mbs_per_second; + u32 operating_rate, vsp_factor_num = 1, vsp_factor_den = 1; + u32 base_cycles = 0; + u32 fps; - /* 240 Mhz for iris2 based video hw */ - freq = 240 * 1000 * 1000; - s_vpr_h(inst->sid, "%s: freq %lu\n", __func__, freq); + if (!inst || !inst->core || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return freq; + } + core = inst->core; + power = &inst->power; + + mbs_per_second = msm_vidc_get_inst_load(inst, LOAD_POWER); + fps = msm_vidc_get_fps(inst); + + /* + * Calculate vpp, vsp, fw cycles separately for encoder and decoder. + * Even though, most part is common now, in future it may change + * between them. + */ + fw_cycles = fps * core->capabilities[MB_CYCLES_FW].value; + fw_vpp_cycles = fps * core->capabilities[MB_CYCLES_FW_VPP].value; + + if (inst->domain == MSM_VIDC_ENCODER) { + vpp_cycles_per_mb = inst->flags & VIDC_LOW_POWER ? + core->capabilities[MB_CYCLES_LP].value : + core->capabilities[MB_CYCLES_VPP].value; + + vpp_cycles = mbs_per_second * vpp_cycles_per_mb / + inst->capabilities->cap[PIPE].value; + /* 1.25 factor for IBP GOP structure */ + if (inst->capabilities->cap[B_FRAME].value) + vpp_cycles += vpp_cycles / 4; + /* 21 / 20 is minimum overhead factor */ + vpp_cycles += max(div_u64(vpp_cycles, 20), fw_vpp_cycles); + /* 1.01 is multi-pipe overhead */ + if (inst->capabilities->cap[PIPE].value > 1) + vpp_cycles += div_u64(vpp_cycles, 100); + /* + * 1080p@480fps usecase needs exactly 338MHz + * without any margin left. Hence, adding 2 percent + * extra to bump it to next level (366MHz). + */ + if (fps == 480) + vpp_cycles += div_u64(vpp_cycles * 2, 100); + + /* VSP */ + /* bitrate is based on fps, scale it using operating rate */ + operating_rate = inst->prop.operating_rate >> 16; + if (operating_rate > (inst->prop.frame_rate >> 16) && + (inst->prop.frame_rate >> 16)) { + vsp_factor_num = operating_rate; + vsp_factor_den = inst->prop.frame_rate >> 16; + } + vsp_cycles = div_u64(((u64)inst->prop.bitrate * + vsp_factor_num), vsp_factor_den); + + base_cycles = core->capabilities[MB_CYCLES_VSP].value; + if (inst->codec == MSM_VIDC_VP9) { + vsp_cycles = div_u64(vsp_cycles * 170, 100); + } else if (inst->capabilities->cap[ENTROPY_MODE].value == + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC) { + vsp_cycles = div_u64(vsp_cycles * 135, 100); + } else { + base_cycles = 0; + vsp_cycles = div_u64(vsp_cycles, 2); + /* VSP FW Overhead 1.05 */ + vsp_cycles = div_u64(vsp_cycles * 21, 20); + } + + if (inst->capabilities->cap[STAGE].value == MSM_VIDC_STAGE_1) + vsp_cycles = vsp_cycles * 3; + + vsp_cycles += mbs_per_second * base_cycles; + + } else if (inst->domain == MSM_VIDC_DECODER) { + /* VPP */ + vpp_cycles = mbs_per_second * core->capabilities[MB_CYCLES_VPP].value / + inst->capabilities->cap[PIPE].value; + /* 21 / 20 is minimum overhead factor */ + vpp_cycles += max(vpp_cycles / 20, fw_vpp_cycles); + /* 1.059 is multi-pipe overhead */ + if (inst->capabilities->cap[PIPE].value > 1) + vpp_cycles += div_u64(vpp_cycles * 59, 1000); + + /* VSP */ + base_cycles = core->capabilities[MB_CYCLES_VSP].value; + vsp_cycles = fps * data_size * 8; + + if (inst->codec == MSM_VIDC_VP9) { + vsp_cycles = div_u64(vsp_cycles * 170, 100); + } else if (inst->capabilities->cap[ENTROPY_MODE].value == + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC) { + vsp_cycles = div_u64(vsp_cycles * 135, 100); + } else { + base_cycles = 0; + vsp_cycles = div_u64(vsp_cycles, 2); + /* VSP FW overhead 1.05 */ + vsp_cycles = div_u64(vsp_cycles * 21, 20); + } + + if (inst->capabilities->cap[STAGE].value == MSM_VIDC_STAGE_1) + vsp_cycles = vsp_cycles * 3; + + vsp_cycles += mbs_per_second * base_cycles; + + } else { + s_vpr_e(inst->sid, "%s: Unknown session type\n", __func__); + return msm_vidc_max_freq(inst); + } + + freq = max(vpp_cycles, vsp_cycles); + freq = max(freq, fw_cycles); + + s_vpr_p(inst->sid, "%s: inst %pK: filled len %d required freq %llu\n", + __func__, inst, data_size, freq); return freq; } -u64 msm_vidc_calc_bw_iris2(struct msm_vidc_inst *inst) +static u64 __calculate_decoder(struct vidc_bus_vote_data *d) { - u64 freq = 0; + /* + * XXX: Don't fool around with any of the hardcoded numbers unless you + * know /exactly/ what you're doing. Many of these numbers are + * measured heuristics and hardcoded numbers taken from the firmware. + */ + /* Decoder parameters */ + int width, height, lcu_size, fps, dpb_bpp; + bool unified_dpb_opb, dpb_compression_enabled = true, + opb_compression_enabled = false, + llc_ref_read_l2_cache_enabled = false, + llc_top_line_buf_enabled = false; + fp_t dpb_read_compression_factor, dpb_opb_scaling_ratio, + dpb_write_compression_factor, opb_write_compression_factor, + qsmmu_bw_overhead_factor; + bool is_h264_category = true; - /* 600 Mhz for iris2 based video hw */ - freq = 600 * 1000 * 1000; - s_vpr_h(inst->sid, "%s: freq %lu\n", __func__, freq); + /* Derived parameters */ + int lcu_per_frame, collocated_bytes_per_lcu, tnbr_per_lcu; + unsigned long bitrate; + unsigned int num_vpp_pipes; - return freq; + fp_t bins_to_bit_factor, vsp_read_factor, vsp_write_factor, + dpb_factor, dpb_write_factor, y_bw_no_ubwc_8bpp; + fp_t y_bw_no_ubwc_10bpp = 0, y_bw_10bpp_p010 = 0, + motion_vector_complexity = 0; + fp_t dpb_total = 0; + + /* Output parameters */ + struct { + fp_t vsp_read, vsp_write, collocated_read, collocated_write, + dpb_read, dpb_write, opb_read, opb_write, + line_buffer_read, line_buffer_write, + total; + } ddr = {0}; + + struct { + fp_t dpb_read, line_buffer_read, line_buffer_write, total; + } llc = {0}; + + unsigned long ret = 0; + unsigned int integer_part, frac_part; + + width = max(d->input_width, BASELINE_DIMENSIONS.width); + height = max(d->input_height, BASELINE_DIMENSIONS.height); + + fps = d->fps; + + lcu_size = d->lcu_size; + + dpb_bpp = __bpp(d->color_formats[0]); + + unified_dpb_opb = d->num_formats == 1; + + dpb_opb_scaling_ratio = fp_div(FP_INT(d->input_width * d->input_height), + FP_INT(d->output_width * d->output_height)); + + opb_compression_enabled = d->num_formats >= 2 && + __ubwc(d->color_formats[1]); + + integer_part = Q16_INT(d->compression_ratio); + frac_part = Q16_FRAC(d->compression_ratio); + dpb_read_compression_factor = FP(integer_part, frac_part, 100); + + integer_part = Q16_INT(d->complexity_factor); + frac_part = Q16_FRAC(d->complexity_factor); + motion_vector_complexity = FP(integer_part, frac_part, 100); + + dpb_write_compression_factor = dpb_read_compression_factor; + opb_write_compression_factor = opb_compression_enabled ? + dpb_write_compression_factor : FP_ONE; + + num_vpp_pipes = d->num_vpp_pipes; + + if (d->codec == MSM_VIDC_HEVC || + d->codec == MSM_VIDC_VP9) { + /* H264, VP8, MPEG2 use the same settings */ + /* HEVC, VP9 use the same setting */ + is_h264_category = false; + } + if (d->use_sys_cache) { + llc_ref_read_l2_cache_enabled = true; + if (is_h264_category) + llc_top_line_buf_enabled = true; + } + + /* Derived parameters setup */ + lcu_per_frame = DIV_ROUND_UP(width, lcu_size) * + DIV_ROUND_UP(height, lcu_size); + + bitrate = DIV_ROUND_UP(d->bitrate, 1000000); + + bins_to_bit_factor = FP_INT(4); + + vsp_write_factor = bins_to_bit_factor; + vsp_read_factor = bins_to_bit_factor + FP_INT(2); + + collocated_bytes_per_lcu = lcu_size == 16 ? 16 : + lcu_size == 32 ? 64 : 256; + + dpb_factor = FP(1, 50, 100); + dpb_write_factor = FP(1, 5, 100); + + tnbr_per_lcu = lcu_size == 16 ? 128 : + lcu_size == 32 ? 64 : 128; + + /* .... For DDR & LLC ...... */ + ddr.vsp_read = fp_div(fp_mult(FP_INT(bitrate), + vsp_read_factor), FP_INT(8)); + ddr.vsp_write = fp_div(fp_mult(FP_INT(bitrate), + vsp_write_factor), FP_INT(8)); + + ddr.collocated_read = fp_div(FP_INT(lcu_per_frame * + collocated_bytes_per_lcu * fps), FP_INT(bps(1))); + ddr.collocated_write = ddr.collocated_read; + + y_bw_no_ubwc_8bpp = fp_div(FP_INT(width * height * fps), + FP_INT(1000 * 1000)); + + if (dpb_bpp != 8) { + y_bw_no_ubwc_10bpp = + fp_div(fp_mult(y_bw_no_ubwc_8bpp, FP_INT(256)), + FP_INT(192)); + y_bw_10bpp_p010 = y_bw_no_ubwc_8bpp * 2; + } + + ddr.dpb_read = dpb_bpp == 8 ? y_bw_no_ubwc_8bpp : y_bw_no_ubwc_10bpp; + ddr.dpb_read = fp_div(fp_mult(ddr.dpb_read, + fp_mult(dpb_factor, motion_vector_complexity)), + dpb_read_compression_factor); + + ddr.dpb_write = dpb_bpp == 8 ? y_bw_no_ubwc_8bpp : y_bw_no_ubwc_10bpp; + ddr.dpb_write = fp_div(fp_mult(ddr.dpb_write, + fp_mult(dpb_factor, dpb_write_factor)), + dpb_write_compression_factor); + + dpb_total = ddr.dpb_read + ddr.dpb_write; + + if (llc_ref_read_l2_cache_enabled) { + ddr.dpb_read = fp_div(ddr.dpb_read, is_h264_category ? + FP(1, 30, 100) : FP(1, 14, 100)); + llc.dpb_read = dpb_total - ddr.dpb_write - ddr.dpb_read; + } + + ddr.opb_read = FP_ZERO; + ddr.opb_write = unified_dpb_opb ? FP_ZERO : (dpb_bpp == 8 ? + y_bw_no_ubwc_8bpp : (opb_compression_enabled ? + y_bw_no_ubwc_10bpp : y_bw_10bpp_p010)); + ddr.opb_write = fp_div(fp_mult(dpb_factor, ddr.opb_write), + fp_mult(dpb_opb_scaling_ratio, opb_write_compression_factor)); + + ddr.line_buffer_read = + fp_div(FP_INT(tnbr_per_lcu * lcu_per_frame * fps), + FP_INT(bps(1))); + /* This change is applicable for all IRIS2 targets, + * but currently being done for IRIS2 with 2 pipes + * only due to timeline constraints. + */ + if((num_vpp_pipes == 2) && (is_h264_category)) + ddr.line_buffer_write = fp_div(ddr.line_buffer_read,FP_INT(2)); + else + ddr.line_buffer_write = ddr.line_buffer_read; + if (llc_top_line_buf_enabled) { + llc.line_buffer_read = ddr.line_buffer_read; + llc.line_buffer_write = ddr.line_buffer_write; + ddr.line_buffer_write = ddr.line_buffer_read = FP_ZERO; + } + + ddr.total = ddr.vsp_read + ddr.vsp_write + + ddr.collocated_read + ddr.collocated_write + + ddr.dpb_read + ddr.dpb_write + + ddr.opb_read + ddr.opb_write + + ddr.line_buffer_read + ddr.line_buffer_write; + + qsmmu_bw_overhead_factor = FP(1, 3, 100); + + ddr.total = fp_mult(ddr.total, qsmmu_bw_overhead_factor); + llc.total = llc.dpb_read + llc.line_buffer_read + + llc.line_buffer_write + ddr.total; + + /* Dump all the variables for easier debugging */ + if (msm_vidc_debug & VIDC_BUS) { + struct dump dump[] = { + {"DECODER PARAMETERS", "", DUMP_HEADER_MAGIC}, + {"lcu size", "%d", lcu_size}, + {"dpb bitdepth", "%d", dpb_bpp}, + {"frame rate", "%d", fps}, + {"dpb/opb unified", "%d", unified_dpb_opb}, + {"dpb/opb downscaling ratio", DUMP_FP_FMT, + dpb_opb_scaling_ratio}, + {"dpb compression", "%d", dpb_compression_enabled}, + {"opb compression", "%d", opb_compression_enabled}, + {"dpb read compression factor", DUMP_FP_FMT, + dpb_read_compression_factor}, + {"dpb write compression factor", DUMP_FP_FMT, + dpb_write_compression_factor}, + {"frame width", "%d", width}, + {"frame height", "%d", height}, + {"llc ref read l2 cache enabled", "%d", + llc_ref_read_l2_cache_enabled}, + {"llc top line buf enabled", "%d", + llc_top_line_buf_enabled}, + + {"DERIVED PARAMETERS (1)", "", DUMP_HEADER_MAGIC}, + {"lcus/frame", "%d", lcu_per_frame}, + {"bitrate (Mbit/sec)", "%d", bitrate}, + {"bins to bit factor", DUMP_FP_FMT, bins_to_bit_factor}, + {"dpb write factor", DUMP_FP_FMT, dpb_write_factor}, + {"vsp read factor", DUMP_FP_FMT, vsp_read_factor}, + {"vsp write factor", DUMP_FP_FMT, vsp_write_factor}, + {"tnbr/lcu", "%d", tnbr_per_lcu}, + {"collocated bytes/LCU", "%d", collocated_bytes_per_lcu}, + {"bw for NV12 8bpc)", DUMP_FP_FMT, y_bw_no_ubwc_8bpp}, + {"bw for NV12 10bpc)", DUMP_FP_FMT, y_bw_no_ubwc_10bpp}, + + {"DERIVED PARAMETERS (2)", "", DUMP_HEADER_MAGIC}, + {"mv complexity", DUMP_FP_FMT, motion_vector_complexity}, + {"qsmmu_bw_overhead_factor", DUMP_FP_FMT, + qsmmu_bw_overhead_factor}, + + {"INTERMEDIATE DDR B/W", "", DUMP_HEADER_MAGIC}, + {"vsp read", DUMP_FP_FMT, ddr.vsp_read}, + {"vsp write", DUMP_FP_FMT, ddr.vsp_write}, + {"collocated read", DUMP_FP_FMT, ddr.collocated_read}, + {"collocated write", DUMP_FP_FMT, ddr.collocated_write}, + {"line buffer read", DUMP_FP_FMT, ddr.line_buffer_read}, + {"line buffer write", DUMP_FP_FMT, ddr.line_buffer_write}, + {"opb read", DUMP_FP_FMT, ddr.opb_read}, + {"opb write", DUMP_FP_FMT, ddr.opb_write}, + {"dpb read", DUMP_FP_FMT, ddr.dpb_read}, + {"dpb write", DUMP_FP_FMT, ddr.dpb_write}, + {"dpb total", DUMP_FP_FMT, dpb_total}, + {"INTERMEDIATE LLC B/W", "", DUMP_HEADER_MAGIC}, + {"llc dpb read", DUMP_FP_FMT, llc.dpb_read}, + {"llc line buffer read", DUMP_FP_FMT, llc.line_buffer_read}, + {"llc line buffer write", DUMP_FP_FMT, llc.line_buffer_write}, + + }; + __dump(dump, ARRAY_SIZE(dump)); + } + + d->calc_bw_ddr = kbps(fp_round(ddr.total)); + d->calc_bw_llcc = kbps(fp_round(llc.total)); + + return ret; +} + +static u64 __calculate_encoder(struct vidc_bus_vote_data *d) +{ + /* + * XXX: Don't fool around with any of the hardcoded numbers unless you + * know /exactly/ what you're doing. Many of these numbers are + * measured heuristics and hardcoded numbers taken from the firmware. + */ + /* Encoder Parameters */ + int width, height, fps, lcu_size, bitrate, lcu_per_frame, + collocated_bytes_per_lcu, tnbr_per_lcu, dpb_bpp, + original_color_format, vertical_tile_width, rotation; + bool work_mode_1, original_compression_enabled, + low_power, cropping_or_scaling, + b_frames_enabled = false, + llc_ref_chroma_cache_enabled = false, + llc_top_line_buf_enabled = false, + llc_vpss_rot_line_buf_enabled = false; + + unsigned int bins_to_bit_factor; + fp_t dpb_compression_factor, + original_compression_factor, + original_compression_factor_y, + y_bw_no_ubwc_8bpp, y_bw_no_ubwc_10bpp = 0, y_bw_10bpp_p010 = 0, + input_compression_factor, + downscaling_ratio, + ref_y_read_bw_factor, ref_cbcr_read_bw_factor, + recon_write_bw_factor, + total_ref_read_crcb, + qsmmu_bw_overhead_factor; + fp_t integer_part, frac_part; + unsigned long ret = 0; + + /* Output parameters */ + struct { + fp_t vsp_read, vsp_write, collocated_read, collocated_write, + ref_read_y, ref_read_crcb, ref_write, + ref_write_overlap, orig_read, + line_buffer_read, line_buffer_write, + total; + } ddr = {0}; + + struct { + fp_t ref_read_crcb, line_buffer, total; + } llc = {0}; + + /* Encoder Parameters setup */ + rotation = d->rotation; + cropping_or_scaling = false; + vertical_tile_width = 960; + /* + * recon_write_bw_factor varies according to resolution and bit-depth, + * here use 1.08(1.075) for worst case. + * Similar for ref_y_read_bw_factor, it can reach 1.375 for worst case, + * here use 1.3 for average case, and can somewhat balance the + * worst case assumption for UBWC CR factors. + */ + recon_write_bw_factor = FP(1, 8, 100); + ref_y_read_bw_factor = FP(1, 30, 100); + ref_cbcr_read_bw_factor = FP(1, 50, 100); + + + /* Derived Parameters */ + fps = d->fps; + width = max(d->output_width, BASELINE_DIMENSIONS.width); + height = max(d->output_height, BASELINE_DIMENSIONS.height); + downscaling_ratio = fp_div(FP_INT(d->input_width * d->input_height), + FP_INT(d->output_width * d->output_height)); + downscaling_ratio = max(downscaling_ratio, FP_ONE); + bitrate = d->bitrate > 0 ? DIV_ROUND_UP(d->bitrate, 1000000) : + __lut(width, height, fps)->bitrate; + lcu_size = d->lcu_size; + lcu_per_frame = DIV_ROUND_UP(width, lcu_size) * + DIV_ROUND_UP(height, lcu_size); + tnbr_per_lcu = 16; + + dpb_bpp = __bpp(d->color_formats[0]); + + y_bw_no_ubwc_8bpp = fp_div(FP_INT(width * height * fps), + FP_INT(1000 * 1000)); + + if (dpb_bpp != 8) { + y_bw_no_ubwc_10bpp = fp_div(fp_mult(y_bw_no_ubwc_8bpp, + FP_INT(256)), FP_INT(192)); + y_bw_10bpp_p010 = y_bw_no_ubwc_8bpp * 2; + } + + b_frames_enabled = d->b_frames_enabled; + original_color_format = d->num_formats >= 1 ? + d->color_formats[0] : MSM_VIDC_FMT_NV12_UBWC; + + original_compression_enabled = __ubwc(original_color_format); + + work_mode_1 = d->work_mode == MSM_VIDC_STAGE_1; + low_power = d->power_mode == VIDC_POWER_LOW; + bins_to_bit_factor = 4; + + if (d->use_sys_cache) { + llc_ref_chroma_cache_enabled = true; + llc_top_line_buf_enabled = true, + llc_vpss_rot_line_buf_enabled = true; + } + + integer_part = Q16_INT(d->compression_ratio); + frac_part = Q16_FRAC(d->compression_ratio); + dpb_compression_factor = FP(integer_part, frac_part, 100); + + integer_part = Q16_INT(d->input_cr); + frac_part = Q16_FRAC(d->input_cr); + input_compression_factor = FP(integer_part, frac_part, 100); + + original_compression_factor = original_compression_factor_y = + !original_compression_enabled ? FP_ONE : + __compression_ratio(__lut(width, height, fps), dpb_bpp); + /* use input cr if it is valid (not 1), otherwise use lut */ + if (original_compression_enabled && + input_compression_factor != FP_ONE) { + original_compression_factor = input_compression_factor; + /* Luma usually has lower compression factor than Chroma, + * input cf is overall cf, add 1.08 factor for Luma cf + */ + original_compression_factor_y = + input_compression_factor > FP(1, 8, 100) ? + fp_div(input_compression_factor, FP(1, 8, 100)) : + input_compression_factor; + } + + ddr.vsp_read = fp_div(FP_INT(bitrate * bins_to_bit_factor), FP_INT(8)); + ddr.vsp_write = ddr.vsp_read + fp_div(FP_INT(bitrate), FP_INT(8)); + + collocated_bytes_per_lcu = lcu_size == 16 ? 16 : + lcu_size == 32 ? 64 : 256; + + ddr.collocated_read = fp_div(FP_INT(lcu_per_frame * + collocated_bytes_per_lcu * fps), FP_INT(bps(1))); + + ddr.collocated_write = ddr.collocated_read; + + ddr.ref_read_y = dpb_bpp == 8 ? + y_bw_no_ubwc_8bpp : y_bw_no_ubwc_10bpp; + if (b_frames_enabled) + ddr.ref_read_y = ddr.ref_read_y * 2; + ddr.ref_read_y = fp_div(ddr.ref_read_y, dpb_compression_factor); + + ddr.ref_read_crcb = fp_mult((ddr.ref_read_y / 2), + ref_cbcr_read_bw_factor); + + if (width > vertical_tile_width) { + ddr.ref_read_y = fp_mult(ddr.ref_read_y, + ref_y_read_bw_factor); + } + + if (llc_ref_chroma_cache_enabled) { + total_ref_read_crcb = ddr.ref_read_crcb; + ddr.ref_read_crcb = fp_div(ddr.ref_read_crcb, + ref_cbcr_read_bw_factor); + llc.ref_read_crcb = total_ref_read_crcb - ddr.ref_read_crcb; + } + + ddr.ref_write = dpb_bpp == 8 ? y_bw_no_ubwc_8bpp : y_bw_no_ubwc_10bpp; + ddr.ref_write = fp_div(fp_mult(ddr.ref_write, FP(1, 50, 100)), + dpb_compression_factor); + + if (width > vertical_tile_width) { + ddr.ref_write_overlap = fp_mult(ddr.ref_write, + (recon_write_bw_factor - FP_ONE)); + ddr.ref_write = fp_mult(ddr.ref_write, recon_write_bw_factor); + } + + ddr.orig_read = dpb_bpp == 8 ? y_bw_no_ubwc_8bpp : + (original_compression_enabled ? y_bw_no_ubwc_10bpp : + y_bw_10bpp_p010); + ddr.orig_read = fp_div(fp_mult(fp_mult(ddr.orig_read, FP(1, 50, 100)), + downscaling_ratio), original_compression_factor); + if (rotation == 90 || rotation == 270) + ddr.orig_read *= lcu_size == 32 ? (dpb_bpp == 8 ? 1 : 3) : 2; + + ddr.line_buffer_read = + fp_div(FP_INT(tnbr_per_lcu * lcu_per_frame * fps), + FP_INT(bps(1))); + + ddr.line_buffer_write = ddr.line_buffer_read; + if (llc_top_line_buf_enabled) { + llc.line_buffer = ddr.line_buffer_read + ddr.line_buffer_write; + ddr.line_buffer_read = ddr.line_buffer_write = FP_ZERO; + } + + ddr.total = ddr.vsp_read + ddr.vsp_write + + ddr.collocated_read + ddr.collocated_write + + ddr.ref_read_y + ddr.ref_read_crcb + + ddr.ref_write + ddr.ref_write_overlap + + ddr.orig_read + + ddr.line_buffer_read + ddr.line_buffer_write; + + qsmmu_bw_overhead_factor = FP(1, 3, 100); + ddr.total = fp_mult(ddr.total, qsmmu_bw_overhead_factor); + llc.total = llc.ref_read_crcb + llc.line_buffer + ddr.total; + + if (msm_vidc_debug & VIDC_BUS) { + struct dump dump[] = { + {"ENCODER PARAMETERS", "", DUMP_HEADER_MAGIC}, + {"width", "%d", width}, + {"height", "%d", height}, + {"fps", "%d", fps}, + {"dpb bitdepth", "%d", dpb_bpp}, + {"input downscaling ratio", DUMP_FP_FMT, downscaling_ratio}, + {"rotation", "%d", rotation}, + {"cropping or scaling", "%d", cropping_or_scaling}, + {"low power mode", "%d", low_power}, + {"work Mode", "%d", work_mode_1}, + {"B frame enabled", "%d", b_frames_enabled}, + {"original frame format", "%#x", original_color_format}, + {"original compression enabled", "%d", + original_compression_enabled}, + {"dpb compression factor", DUMP_FP_FMT, + dpb_compression_factor}, + {"input compression factor", DUMP_FP_FMT, + input_compression_factor}, + {"llc ref chroma cache enabled", DUMP_FP_FMT, + llc_ref_chroma_cache_enabled}, + {"llc top line buf enabled", DUMP_FP_FMT, + llc_top_line_buf_enabled}, + {"llc vpss rot line buf enabled ", DUMP_FP_FMT, + llc_vpss_rot_line_buf_enabled}, + + {"DERIVED PARAMETERS", "", DUMP_HEADER_MAGIC}, + {"lcu size", "%d", lcu_size}, + {"bitrate (Mbit/sec)", "%lu", bitrate}, + {"bins to bit factor", "%u", bins_to_bit_factor}, + {"original compression factor", DUMP_FP_FMT, + original_compression_factor}, + {"original compression factor y", DUMP_FP_FMT, + original_compression_factor_y}, + {"qsmmu_bw_overhead_factor", + DUMP_FP_FMT, qsmmu_bw_overhead_factor}, + {"bw for NV12 8bpc)", DUMP_FP_FMT, y_bw_no_ubwc_8bpp}, + {"bw for NV12 10bpc)", DUMP_FP_FMT, y_bw_no_ubwc_10bpp}, + + {"INTERMEDIATE B/W DDR", "", DUMP_HEADER_MAGIC}, + {"vsp read", DUMP_FP_FMT, ddr.vsp_read}, + {"vsp write", DUMP_FP_FMT, ddr.vsp_write}, + {"collocated read", DUMP_FP_FMT, ddr.collocated_read}, + {"collocated write", DUMP_FP_FMT, ddr.collocated_write}, + {"ref read y", DUMP_FP_FMT, ddr.ref_read_y}, + {"ref read crcb", DUMP_FP_FMT, ddr.ref_read_crcb}, + {"ref write", DUMP_FP_FMT, ddr.ref_write}, + {"ref write overlap", DUMP_FP_FMT, ddr.ref_write_overlap}, + {"original read", DUMP_FP_FMT, ddr.orig_read}, + {"line buffer read", DUMP_FP_FMT, ddr.line_buffer_read}, + {"line buffer write", DUMP_FP_FMT, ddr.line_buffer_write}, + {"INTERMEDIATE LLC B/W", "", DUMP_HEADER_MAGIC}, + {"llc ref read crcb", DUMP_FP_FMT, llc.ref_read_crcb}, + {"llc line buffer", DUMP_FP_FMT, llc.line_buffer}, + }; + __dump(dump, ARRAY_SIZE(dump)); + } + + d->calc_bw_ddr = kbps(fp_round(ddr.total)); + d->calc_bw_llcc = kbps(fp_round(llc.total)); + + return ret; +} + +static u64 __calculate(struct msm_vidc_inst* inst, struct vidc_bus_vote_data *d) +{ + u64 value = 0; + + switch (d->domain) { + case MSM_VIDC_ENCODER: + value = __calculate_encoder(d); + break; + case MSM_VIDC_DECODER: + value = __calculate_decoder(d); + break; + default: + s_vpr_e(inst->sid, "Unknown Domain %#x", d->domain); + } + + return value; +} + +int msm_vidc_calc_bw_iris2(struct msm_vidc_inst *inst, + struct vidc_bus_vote_data *vidc_data) +{ + int value = 0; + + if (!vidc_data) + return value; + + value = __calculate(inst, vidc_data); + + return value; } diff --git a/driver/vidc/inc/msm_vidc_buffer.h b/driver/vidc/inc/msm_vidc_buffer.h index 12890b4937..9c26ba0d8f 100644 --- a/driver/vidc/inc/msm_vidc_buffer.h +++ b/driver/vidc/inc/msm_vidc_buffer.h @@ -8,6 +8,15 @@ #include "msm_vidc_inst.h" +#define MIN_DEC_INPUT_BUFFERS 4 +#define MIN_DEC_OUTPUT_BUFFERS 4 + +#define MIN_ENC_INPUT_BUFFERS 4 +#define MIN_ENC_OUTPUT_BUFFERS 4 + +#define DCVS_ENC_EXTRA_INPUT_BUFFERS 4 +#define DCVS_DEC_EXTRA_OUTPUT_BUFFERS 4 + u32 msm_vidc_input_min_count(struct msm_vidc_inst *inst); u32 msm_vidc_output_min_count(struct msm_vidc_inst *inst); u32 msm_vidc_input_extra_count(struct msm_vidc_inst *inst); diff --git a/driver/vidc/inc/msm_vidc_debug.h b/driver/vidc/inc/msm_vidc_debug.h index fdefa84dda..2a179c6ab8 100644 --- a/driver/vidc/inc/msm_vidc_debug.h +++ b/driver/vidc/inc/msm_vidc_debug.h @@ -22,6 +22,7 @@ extern int msm_vidc_debug; extern bool msm_vidc_lossless_encode; extern bool msm_vidc_syscache_disable; +extern int msm_vidc_clock_voting; /* To enable messages OR these values and * echo the result to debugfs file. diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 3a74e877bd..fa32a887c4 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -12,6 +12,8 @@ #include "msm_vidc_core.h" #include "msm_vidc_inst.h" +#define MSM_VIDC_SESSION_INACTIVE_THRESHOLD_MS 1000 + static inline is_decode_session(struct msm_vidc_inst *inst) { return inst->domain == MSM_VIDC_DECODER; @@ -59,16 +61,57 @@ static inline is_internal_buffer(enum msm_vidc_buffer_type buffer_type) buffer_type == MSM_VIDC_BUF_VPSS; } +static inline bool is_linear_colorformat(enum msm_vidc_colorformat_type colorformat) +{ + return colorformat == MSM_VIDC_FMT_NV12 || + colorformat == MSM_VIDC_FMT_NV21 || + colorformat == MSM_VIDC_FMT_NV12_P010; +} + +static inline bool is_10bit_colorformat(enum msm_vidc_colorformat_type colorformat) +{ + return colorformat == MSM_VIDC_FMT_NV12_P010 || + colorformat == MSM_VIDC_FMT_NV12_TP10_UBWC; +} + static inline bool is_secondary_output_mode(struct msm_vidc_inst *inst) { return false; // TODO: inst->stream_output_mode == HAL_VIDEO_DECODER_SECONDARY; } +static inline bool is_turbo_session(struct msm_vidc_inst *inst) +{ + return !!(inst->flags & VIDC_TURBO); +} + static inline bool is_thumbnail_session(struct msm_vidc_inst *inst) +{ + return !!(inst->flags & VIDC_THUMBNAIL); +} + +static inline bool is_low_power_session(struct msm_vidc_inst *inst) +{ + return !!(inst->flags & VIDC_LOW_POWER); +} + +static inline bool is_realtime_session(struct msm_vidc_inst *inst) { return false; // TODO: fix it } +static inline bool is_active_session(u64 prev, u64 curr) +{ + u64 ts_delta; + + if (!prev || !curr) + return true; + + ts_delta = (prev < curr) ? curr - prev : prev - curr; + + return ((ts_delta / NSEC_PER_MSEC) <= + MSM_VIDC_SESSION_INACTIVE_THRESHOLD_MS); +} + void print_vidc_buffer(u32 tag, const char *str, struct msm_vidc_inst *inst, struct msm_vidc_buffer *vbuf); void print_vb2_buffer(const char *str, struct msm_vidc_inst *inst, @@ -99,6 +142,8 @@ int msm_vidc_remove_session(struct msm_vidc_inst *inst); int msm_vidc_add_session(struct msm_vidc_inst *inst); int msm_vidc_session_open(struct msm_vidc_inst *inst); int msm_vidc_session_set_codec(struct msm_vidc_inst *inst); +int msm_vidc_session_start(struct msm_vidc_inst* inst, + enum msm_vidc_port_type port); int msm_vidc_session_stop(struct msm_vidc_inst *inst, enum msm_vidc_port_type port); int msm_vidc_session_close(struct msm_vidc_inst *inst); @@ -140,6 +185,9 @@ struct msm_vidc_buffer *get_meta_buffer(struct msm_vidc_inst *inst, struct msm_vidc_inst *get_inst(struct msm_vidc_core *core, u32 session_id); void put_inst(struct msm_vidc_inst *inst); +int msm_vidc_get_mbs_per_frame(struct msm_vidc_inst* inst); +int msm_vidc_get_fps(struct msm_vidc_inst* inst); +int msm_vidc_num_queued_bufs(struct msm_vidc_inst* inst, u32 type); void core_lock(struct msm_vidc_core *core, const char *function); void core_unlock(struct msm_vidc_core *core, const char *function); void inst_lock(struct msm_vidc_inst *inst, const char *function); diff --git a/driver/vidc/inc/msm_vidc_inst.h b/driver/vidc/inc/msm_vidc_inst.h index 9c11aa19d0..350bf3c4c6 100644 --- a/driver/vidc/inc/msm_vidc_inst.h +++ b/driver/vidc/inc/msm_vidc_inst.h @@ -15,8 +15,9 @@ struct msm_vidc_inst; ((c)->session_ops->op(__VA_ARGS__)) : 0) struct msm_vidc_session_ops { - u64 (*calc_freq)(struct msm_vidc_inst *inst); - u64 (*calc_bw)(struct msm_vidc_inst *inst); + u64 (*calc_freq)(struct msm_vidc_inst *inst, u32 data_size); + int (*calc_bw)(struct msm_vidc_inst *inst, + struct vidc_bus_vote_data* vote_data); int (*decide_work_route)(struct msm_vidc_inst *inst); int (*decide_work_mode)(struct msm_vidc_inst *inst); int (*decide_core_and_power_mode)(struct msm_vidc_inst *inst); @@ -105,6 +106,8 @@ struct msm_vidc_inst { enum msm_vidc_pipe_type pipe; enum msm_vidc_quality_mode quality_mode; struct msm_vidc_power power; + enum msm_vidc_modes flags; + struct vidc_bus_vote_data bus_data; struct msm_vidc_buffers_info buffers; struct msm_vidc_mappings_info mappings; struct msm_vidc_allocations_info allocations; @@ -126,6 +129,8 @@ struct msm_vidc_inst { struct msm_vidc_debug debug; struct msm_vidc_inst_capability *capabilities; struct completion completions[MAX_SIGNAL]; + bool active; + u64 last_qbuf_time_ns; }; #endif // _MSM_VIDC_INST_H_ diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index eb5ba48b63..56180ef61b 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -80,6 +80,7 @@ #define BUFFER_ALIGNMENT_SIZE(x) x #define NUM_MBS_720P (((1280 + 15) >> 4) * ((720 + 15) >> 4)) #define NUM_MBS_4k (((4096 + 15) >> 4) * ((2304 + 15) >> 4)) +#define MB_SIZE_IN_PIXEL (16 * 16) #define DB_H264_DISABLE_SLICE_BOUNDARY \ V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_DISABLED_AT_SLICE_BOUNDARY @@ -554,6 +555,7 @@ struct msm_vidc_crop { struct msm_vidc_properties { u32 frame_rate; u32 operating_rate; + u32 bitrate; }; struct msm_vidc_subscription_params { @@ -581,7 +583,48 @@ struct msm_vidc_decode_batch { struct delayed_work work; }; +enum msm_vidc_modes { + VIDC_SECURE = BIT(0), + VIDC_TURBO = BIT(1), + VIDC_THUMBNAIL = BIT(2), + VIDC_LOW_POWER = BIT(3), +}; + +enum load_calc_quirks { + LOAD_POWER = 0, + LOAD_ADMISSION_CONTROL = 1, +}; + +enum msm_vidc_power_mode { + VIDC_POWER_NORMAL = 0, + VIDC_POWER_LOW, + VIDC_POWER_TURBO, +}; + +struct vidc_bus_vote_data { + enum msm_vidc_domain_type domain; + enum msm_vidc_codec_type codec; + enum msm_vidc_power_mode power_mode; + u32 color_formats[2]; + int num_formats; /* 1 = DPB-OPB unified; 2 = split */ + int input_height, input_width, bitrate; + int output_height, output_width; + int rotation; + int compression_ratio; + int complexity_factor; + int input_cr; + u32 lcu_size; + u32 fps; + u32 work_mode; + bool use_sys_cache; + bool b_frames_enabled; + u64 calc_bw_ddr; + u64 calc_bw_llcc; + u32 num_vpp_pipes; +}; + struct msm_vidc_power { + enum msm_vidc_power_mode power_mode; u32 buffer_counter; u32 min_threshold; u32 nom_threshold; diff --git a/driver/vidc/inc/msm_vidc_power.h b/driver/vidc/inc/msm_vidc_power.h index 62e08c4f81..efb25ef1fb 100644 --- a/driver/vidc/inc/msm_vidc_power.h +++ b/driver/vidc/inc/msm_vidc_power.h @@ -6,8 +6,249 @@ #ifndef _MSM_VIDC_POWER_H_ #define _MSM_VIDC_POWER_H_ +#include "fixedpoint.h" +#include "msm_vidc_debug.h" +#include "msm_vidc_internal.h" #include "msm_vidc_inst.h" -int msm_vidc_scale_power(struct msm_vidc_inst *inst); +#define COMPRESSION_RATIO_MAX 5 + +enum vidc_bus_type { + PERF, + DDR, + LLCC, +}; + +/* + * Minimum dimensions for which to calculate bandwidth. + * This means that anything bandwidth(0, 0) == + * bandwidth(BASELINE_DIMENSIONS.width, BASELINE_DIMENSIONS.height) + */ +static const struct { + int height, width; +} BASELINE_DIMENSIONS = { + .width = 1280, + .height = 720, +}; + +/* converts Mbps to bps (the "b" part can be bits or bytes based on context) */ +#define kbps(__mbps) ((__mbps) * 1000) +#define bps(__mbps) (kbps(__mbps) * 1000) + +#define GENERATE_COMPRESSION_PROFILE(__bpp, __worst) { \ + .bpp = __bpp, \ + .ratio = __worst, \ +} + +/* + * The below table is a structural representation of the following table: + * Resolution | Bitrate | Compression Ratio | + * ............|............|.........................................| + * Width Height|Average High|Avg_8bpc Worst_8bpc Avg_10bpc Worst_10bpc| + * 1280 720| 7 14| 1.69 1.28 1.49 1.23| + * 1920 1080| 20 40| 1.69 1.28 1.49 1.23| + * 2560 1440| 32 64| 2.2 1.26 1.97 1.22| + * 3840 2160| 42 84| 2.2 1.26 1.97 1.22| + * 4096 2160| 44 88| 2.2 1.26 1.97 1.22| + * 4096 2304| 48 96| 2.2 1.26 1.97 1.22| + */ +static struct lut { + int frame_size; /* width x height */ + int frame_rate; + unsigned long bitrate; + struct { + int bpp; + fp_t ratio; + } compression_ratio[COMPRESSION_RATIO_MAX]; +} const LUT[] = { + { + .frame_size = 1280 * 720, + .frame_rate = 30, + .bitrate = 14, + .compression_ratio = { + GENERATE_COMPRESSION_PROFILE(8, + FP(1, 28, 100)), + GENERATE_COMPRESSION_PROFILE(10, + FP(1, 23, 100)), + } + }, + { + .frame_size = 1280 * 720, + .frame_rate = 60, + .bitrate = 22, + .compression_ratio = { + GENERATE_COMPRESSION_PROFILE(8, + FP(1, 28, 100)), + GENERATE_COMPRESSION_PROFILE(10, + FP(1, 23, 100)), + } + }, + { + .frame_size = 1920 * 1088, + .frame_rate = 30, + .bitrate = 40, + .compression_ratio = { + GENERATE_COMPRESSION_PROFILE(8, + FP(1, 28, 100)), + GENERATE_COMPRESSION_PROFILE(10, + FP(1, 23, 100)), + } + }, + { + .frame_size = 1920 * 1088, + .frame_rate = 60, + .bitrate = 64, + .compression_ratio = { + GENERATE_COMPRESSION_PROFILE(8, + FP(1, 28, 100)), + GENERATE_COMPRESSION_PROFILE(10, + FP(1, 23, 100)), + } + }, + { + .frame_size = 2560 * 1440, + .frame_rate = 30, + .bitrate = 64, + .compression_ratio = { + GENERATE_COMPRESSION_PROFILE(8, + FP(1, 26, 100)), + GENERATE_COMPRESSION_PROFILE(10, + FP(1, 22, 100)), + } + }, + { + .frame_size = 2560 * 1440, + .frame_rate = 60, + .bitrate = 102, + .compression_ratio = { + GENERATE_COMPRESSION_PROFILE(8, + FP(1, 26, 100)), + GENERATE_COMPRESSION_PROFILE(10, + FP(1, 22, 100)), + } + }, + { + .frame_size = 3840 * 2160, + .frame_rate = 30, + .bitrate = 84, + .compression_ratio = { + GENERATE_COMPRESSION_PROFILE(8, + FP(1, 26, 100)), + GENERATE_COMPRESSION_PROFILE(10, + FP(1, 22, 100)), + } + }, + { + .frame_size = 3840 * 2160, + .frame_rate = 60, + .bitrate = 134, + .compression_ratio = { + GENERATE_COMPRESSION_PROFILE(8, + FP(1, 26, 100)), + GENERATE_COMPRESSION_PROFILE(10, + FP(1, 22, 100)), + } + }, + { + .frame_size = 4096 * 2160, + .frame_rate = 30, + .bitrate = 88, + .compression_ratio = { + GENERATE_COMPRESSION_PROFILE(8, + FP(1, 26, 100)), + GENERATE_COMPRESSION_PROFILE(10, + FP(1, 22, 100)), + } + }, + { + .frame_size = 4096 * 2160, + .frame_rate = 60, + .bitrate = 141, + .compression_ratio = { + GENERATE_COMPRESSION_PROFILE(8, + FP(1, 26, 100)), + GENERATE_COMPRESSION_PROFILE(10, + FP(1, 22, 100)), + } + }, + { + .frame_size = 4096 * 2304, + .frame_rate = 30, + .bitrate = 96, + .compression_ratio = { + GENERATE_COMPRESSION_PROFILE(8, + FP(1, 26, 100)), + GENERATE_COMPRESSION_PROFILE(10, + FP(1, 22, 100)), + } + }, + { + .frame_size = 4096 * 2304, + .frame_rate = 60, + .bitrate = 154, + .compression_ratio = { + GENERATE_COMPRESSION_PROFILE(8, + FP(1, 26, 100)), + GENERATE_COMPRESSION_PROFILE(10, + FP(1, 22, 100)), + } + }, +}; + +static inline u32 get_type_frm_name(const char* name) +{ + if (!strcmp(name, "venus-llcc")) + return LLCC; + else if (!strcmp(name, "venus-ddr")) + return DDR; + else + return PERF; +} + +#define DUMP_HEADER_MAGIC 0xdeadbeef +#define DUMP_FP_FMT "%FP" /* special format for fp_t */ + +struct dump { + char* key; + char* format; + size_t val; +}; + +struct lut const* __lut(int width, int height, int fps); +fp_t __compression_ratio(struct lut const* entry, int bpp); +void __dump(struct dump dump[], int len); + +static inline bool __ubwc(enum msm_vidc_colorformat_type f) +{ + switch (f) { + case MSM_VIDC_FMT_NV12_UBWC: + case MSM_VIDC_FMT_NV12_TP10_UBWC: + return true; + default: + return false; + } +} + +static inline int __bpp(enum msm_vidc_colorformat_type f) +{ + switch (f) { + case MSM_VIDC_FMT_NV12: + case MSM_VIDC_FMT_NV21: + case MSM_VIDC_FMT_NV12_UBWC: + case MSM_VIDC_FMT_RGBA8888_UBWC: + return 8; + case MSM_VIDC_FMT_NV12_P010: + case MSM_VIDC_FMT_NV12_TP10_UBWC: + return 10; + default: + d_vpr_e("Unsupported colorformat (%x)", f); + return INT_MAX; + } +} + +u64 msm_vidc_max_freq(struct msm_vidc_inst* inst); +int msm_vidc_get_inst_load(struct msm_vidc_inst* inst, + enum load_calc_quirks quirks); +int msm_vidc_scale_power(struct msm_vidc_inst *inst, bool scale_buses); #endif diff --git a/driver/vidc/inc/venus_hfi.h b/driver/vidc/inc/venus_hfi.h index be9dc8d34b..5b485b854d 100644 --- a/driver/vidc/inc/venus_hfi.h +++ b/driver/vidc/inc/venus_hfi.h @@ -67,7 +67,7 @@ int venus_hfi_core_init(struct msm_vidc_core *core); int venus_hfi_core_release(struct msm_vidc_core *core); int venus_hfi_suspend(struct msm_vidc_core *core); int venus_hfi_scale_clocks(struct msm_vidc_inst* inst, u64 freq); -int venus_hfi_scale_buses(struct msm_vidc_inst* inst, u64 freq); +int venus_hfi_scale_buses(struct msm_vidc_inst* inst, u64 bw_ddr, u64 bw_llcc); void venus_hfi_work_handler(struct work_struct *work); void venus_hfi_pm_work_handler(struct work_struct *work); diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 2ae790361e..a4d9cafe51 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -1239,7 +1239,7 @@ int msm_vdec_start_input(struct msm_vidc_inst *inst) if (rc) return rc; - rc = venus_hfi_start(inst, INPUT_PORT); + rc = msm_vidc_session_start(inst, INPUT_PORT); if (rc) goto error; @@ -1407,7 +1407,7 @@ int msm_vdec_start_output(struct msm_vidc_inst *inst) if (rc) return rc; - rc = venus_hfi_start(inst, OUTPUT_PORT); + rc = msm_vidc_session_start(inst, OUTPUT_PORT); if (rc) goto error; diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index 0f680e825b..b8513eb8f9 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -772,7 +772,7 @@ int msm_venc_start_input(struct msm_vidc_inst *inst) if (rc) return rc; - rc = venus_hfi_start(inst, INPUT_PORT); + rc = msm_vidc_session_start(inst, INPUT_PORT); if (rc) goto error; @@ -860,7 +860,7 @@ int msm_venc_start_output(struct msm_vidc_inst *inst) if (rc) return rc; - rc = venus_hfi_start(inst, OUTPUT_PORT); + rc = msm_vidc_session_start(inst, OUTPUT_PORT); if (rc) goto error; diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index 2c0bb413f1..36899dfea4 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -14,6 +14,7 @@ #include "msm_vidc_v4l2.h" #include "msm_vidc_debug.h" #include "msm_vidc_control.h" +#include "msm_vidc_power.h" #define MSM_VIDC_DRV_NAME "msm_vidc_driver" /* kernel/msm-4.19 */ @@ -801,6 +802,7 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) INIT_LIST_HEAD(&inst->firmware.list); inst->domain = session_type; inst->state = MSM_VIDC_OPEN; + inst->active = true; inst->request = false; inst->ipsc_properties_set = false; inst->opsc_properties_set = false; @@ -828,8 +830,8 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) if (rc) goto error; - //msm_power_setup(inst); - // send cmd to firmware here + msm_vidc_scale_power(inst, true); + rc = msm_vidc_session_open(inst); if (rc) goto error; diff --git a/driver/vidc/src/msm_vidc_buffer.c b/driver/vidc/src/msm_vidc_buffer.c index e6b34f0d2b..33e12af791 100644 --- a/driver/vidc/src/msm_vidc_buffer.c +++ b/driver/vidc/src/msm_vidc_buffer.c @@ -11,10 +11,7 @@ #include "msm_vidc_debug.h" #include "msm_vidc_internal.h" -#define MIN_INPUT_BUFFERS 4 -#define MIN_ENC_OUTPUT_BUFFERS 4 - -u32 msm_vidc_input_min_count(struct msm_vidc_inst *inst) +u32 msm_vidc_input_min_count(struct msm_vidc_inst* inst) { u32 input_min_count = 0; //struct v4l2_ctrl *max_layer = NULL; @@ -24,10 +21,15 @@ u32 msm_vidc_input_min_count(struct msm_vidc_inst *inst) return 0; } - if (!is_decode_session(inst) && !is_encode_session(inst)) + if (is_decode_session(inst)) { + input_min_count = MIN_DEC_INPUT_BUFFERS; + } else if (is_encode_session(inst)) { + input_min_count = MIN_ENC_INPUT_BUFFERS; + } else { + s_vpr_e(inst->sid, "%s: invalid domain\n", + __func__, inst->domain); return 0; - - input_min_count = MIN_INPUT_BUFFERS; + } if (is_thumbnail_session(inst)) input_min_count = 1; @@ -90,7 +92,7 @@ u32 msm_vidc_output_min_count(struct msm_vidc_inst *inst) u32 msm_vidc_input_extra_count(struct msm_vidc_inst *inst) { - u32 extra_input_count = 0; + u32 count = 0; struct msm_vidc_core *core; if (!inst || !inst->core) { @@ -99,23 +101,36 @@ u32 msm_vidc_input_extra_count(struct msm_vidc_inst *inst) } core = inst->core; + /* + * no extra buffers for thumbnail session because + * neither dcvs nor batching will be enabled + */ if (is_thumbnail_session(inst)) - return extra_input_count; + return 0; if (is_decode_session(inst)) { - /* add dcvs buffers */ - /* add batching buffers */ - extra_input_count = 6; + /* + * if decode batching enabled, ensure minimum batch size + * count of input buffers present on input port + */ + if (core->capabilities[DECODE_BATCH].value && + inst->decode_batch.enable) { + if (inst->buffers.input.min_count < inst->decode_batch.size) { + count = inst->decode_batch.size - + inst->buffers.input.min_count; + } + } } else if (is_encode_session(inst)) { /* add dcvs buffers */ - extra_input_count = 4; + count = DCVS_ENC_EXTRA_INPUT_BUFFERS; } - return extra_input_count; + + return count; } u32 msm_vidc_output_extra_count(struct msm_vidc_inst *inst) { - u32 extra_output_count = 0; + u32 count = 0; struct msm_vidc_core *core; if (!inst || !inst->core) { @@ -124,24 +139,94 @@ u32 msm_vidc_output_extra_count(struct msm_vidc_inst *inst) } core = inst->core; + /* + * no extra buffers for thumbnail session because + * neither dcvs nor batching will be enabled + */ if (is_thumbnail_session(inst)) return 0; if (is_decode_session(inst)) { /* add dcvs buffers */ - /* add batching buffers */ - extra_output_count = 6; + count = DCVS_DEC_EXTRA_OUTPUT_BUFFERS; + /* + * if decode batching enabled, ensure minimum batch size + * count of extra output buffers added on output port + */ + if (core->capabilities[DECODE_BATCH].value && + inst->decode_batch.enable && + count < inst->decode_batch.size) + count = inst->decode_batch.size; + } else if (is_encode_session(inst)) { /* add heif buffers */ - //extra_output_count = 8 + //count = 8 } - return extra_output_count; + + return count; } u32 msm_vidc_decoder_input_size(struct msm_vidc_inst *inst) { - u32 size = ALIGN(1 * 1024 * 1024, SZ_4K); - return size; + u32 frame_size, num_mbs; + u32 div_factor = 1; + u32 base_res_mbs = NUM_MBS_4k; + struct v4l2_format *f; + u32 buffer_size_limit = 0; // TODO: fix me + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n"); + return 0; + } + + /* + * Decoder input size calculation: + * For 8k resolution, buffer size is calculated as 8k mbs / 4 and + * for 8k cases we expect width/height to be set always. + * In all other cases, buffer size is calculated as + * 4k mbs for VP8/VP9 and 4k / 2 for remaining codecs. + */ + f = &inst->fmts[INPUT_PORT]; + num_mbs = msm_vidc_get_mbs_per_frame(inst); + if (num_mbs > NUM_MBS_4k) { + div_factor = 4; + base_res_mbs = inst->capabilities->cap[MBPF].value; + } else { + base_res_mbs = NUM_MBS_4k; + if (f->fmt.pix_mp.pixelformat == V4L2_PIX_FMT_VP9) + div_factor = 1; + else + div_factor = 2; + } + + if (is_secure_session(inst)) + div_factor = div_factor << 1; + + /* For HEIF image, use the actual resolution to calc buffer size */ + /* TODO: fix me + if (is_heif_decoder(inst)) { + base_res_mbs = num_mbs; + div_factor = 1; + } + */ + + frame_size = base_res_mbs * MB_SIZE_IN_PIXEL * 3 / 2 / div_factor; + + /* multiply by 10/8 (1.25) to get size for 10 bit case */ + if (f->fmt.pix_mp.pixelformat == V4L2_PIX_FMT_VP9 || + f->fmt.pix_mp.pixelformat == V4L2_PIX_FMT_HEVC) + frame_size = frame_size + (frame_size >> 2); + + if (buffer_size_limit && (buffer_size_limit < frame_size)) { + frame_size = buffer_size_limit; + s_vpr_h(inst->sid, "input buffer size limited to %d\n", + frame_size); + } else { + s_vpr_h(inst->sid, "set input buffer size to %d\n", + frame_size); + } + + return ALIGN(frame_size, SZ_4K); } u32 msm_vidc_decoder_output_size(struct msm_vidc_inst *inst) diff --git a/driver/vidc/src/msm_vidc_debug.c b/driver/vidc/src/msm_vidc_debug.c index fa81fbb2f7..28716e211a 100644 --- a/driver/vidc/src/msm_vidc_debug.c +++ b/driver/vidc/src/msm_vidc_debug.c @@ -15,3 +15,6 @@ EXPORT_SYMBOL(msm_vidc_lossless_encode); bool msm_vidc_syscache_disable = !true; EXPORT_SYMBOL(msm_vidc_syscache_disable); + +int msm_vidc_clock_voting = !1; + diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index d3d53b6e0b..495a98a72e 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -13,6 +13,7 @@ #include "msm_vidc_internal.h" #include "msm_vidc_memory.h" #include "msm_vidc_debug.h" +#include "msm_vidc_power.h" #include "venus_hfi.h" #include "msm_vidc.h" @@ -464,6 +465,65 @@ int msm_vidc_get_control(struct msm_vidc_inst *inst, struct v4l2_ctrl *ctrl) return rc; } +int msm_vidc_get_mbs_per_frame(struct msm_vidc_inst *inst) +{ + int height, width; + struct v4l2_format *out_f; + struct v4l2_format *inp_f; + + out_f = &inst->fmts[OUTPUT_PORT]; + inp_f = &inst->fmts[INPUT_PORT]; + height = max(out_f->fmt.pix_mp.height, + inp_f->fmt.pix_mp.height); + width = max(out_f->fmt.pix_mp.width, + inp_f->fmt.pix_mp.width); + + return NUM_MBS_PER_FRAME(height, width); +} + +int msm_vidc_get_fps(struct msm_vidc_inst *inst) +{ + int fps; + + if (inst->prop.operating_rate > inst->prop.frame_rate) + fps = (inst->prop.operating_rate >> 16) ? + (inst->prop.operating_rate >> 16) : 1; + else + fps = inst->prop.frame_rate >> 16; + + return fps; +} + +int msm_vidc_num_queued_bufs(struct msm_vidc_inst *inst, u32 type) +{ + int count = 0; + struct msm_vidc_buffer *vbuf; + struct msm_vidc_buffers* buffers; + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return 0; + } + if (type == OUTPUT_MPLANE) { + buffers = &inst->buffers.output; + } else if (type == INPUT_MPLANE) { + buffers = &inst->buffers.input; + } else { + s_vpr_e(inst->sid, "%s: invalid buffer type %#x\n", __func__, type); + return -EINVAL; + } + + list_for_each_entry(vbuf, &buffers->list, list) { + if (vbuf->type != type) + continue; + if (!(vbuf->attr & MSM_VIDC_ATTR_QUEUED)) + continue; + count++; + } + + return count; +} + static int vb2_buffer_to_driver(struct vb2_buffer *vb2, struct msm_vidc_buffer *buf) { @@ -1264,6 +1324,25 @@ int msm_vidc_session_set_codec(struct msm_vidc_inst *inst) return 0; } +int msm_vidc_session_start(struct msm_vidc_inst* inst, + enum msm_vidc_port_type port) +{ + int rc = 0; + + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + msm_vidc_scale_power(inst, true); + + rc = venus_hfi_start(inst, port); + if (rc) + return rc; + + return rc; +} + int msm_vidc_session_stop(struct msm_vidc_inst *inst, enum msm_vidc_port_type port) { diff --git a/driver/vidc/src/msm_vidc_power.c b/driver/vidc/src/msm_vidc_power.c index 3c6499f4c9..351be4d020 100644 --- a/driver/vidc/src/msm_vidc_power.c +++ b/driver/vidc/src/msm_vidc_power.c @@ -8,29 +8,577 @@ #include "msm_vidc_internal.h" #include "msm_vidc_inst.h" #include "msm_vidc_core.h" +#include "msm_vidc_dt.h" +#include "msm_vidc_driver.h" +#include "msm_vidc_platform.h" +#include "msm_vidc_buffer.h" #include "venus_hfi.h" -int msm_vidc_scale_power(struct msm_vidc_inst *inst) +#define MSM_VIDC_MIN_UBWC_COMPLEXITY_FACTOR (1 << 16) +#define MSM_VIDC_MAX_UBWC_COMPLEXITY_FACTOR (4 << 16) +#define MSM_VIDC_MIN_UBWC_COMPRESSION_RATIO (1 << 16) +#define MSM_VIDC_MAX_UBWC_COMPRESSION_RATIO (5 << 16) + +u64 msm_vidc_max_freq(struct msm_vidc_inst *inst) { - int rc = 0; - u64 freq; struct msm_vidc_core* core; + struct allowed_clock_rates_table *allowed_clks_tbl; + u64 freq = 0; if (!inst || !inst->core) { - d_vpr_e("%s: invalid params %pK\n", __func__, inst); + d_vpr_e("%s: invalid params\n", __func__); + return freq; + } + core = inst->core; + if (!core->dt || !core->dt->allowed_clks_tbl) { + s_vpr_e(inst->sid, "%s: invalid params\n", __func__); + return freq; + } + allowed_clks_tbl = core->dt->allowed_clks_tbl; + freq = allowed_clks_tbl[0].clock_rate; + + s_vpr_l(inst->sid, "%s: rate = %lu\n", __func__, freq); + return freq; +} + +static int msm_vidc_get_mbps(struct msm_vidc_inst *inst, + enum load_calc_quirks quirks) +{ + int input_port_mbs, output_port_mbs; + int fps; + struct v4l2_format *f; + + f = &inst->fmts[INPUT_PORT]; + input_port_mbs = NUM_MBS_PER_FRAME(f->fmt.pix_mp.width, + f->fmt.pix_mp.height); + + f = &inst->fmts[OUTPUT_PORT]; + output_port_mbs = NUM_MBS_PER_FRAME(f->fmt.pix_mp.width, + f->fmt.pix_mp.height); + + fps = inst->prop.frame_rate; + + /* For admission control operating rate is ignored */ + if (quirks == LOAD_POWER) + fps = max(inst->prop.operating_rate, inst->prop.frame_rate); + + /* In case of fps < 1 we assume 1 */ + fps = max(fps >> 16, 1); + + return max(input_port_mbs, output_port_mbs) * fps; +} + +int msm_vidc_get_inst_load(struct msm_vidc_inst *inst, + enum load_calc_quirks quirks) +{ + int load = 0; + + if (inst->state == MSM_VIDC_OPEN || + inst->state == MSM_VIDC_ERROR) + goto exit; + + /* + * Clock and Load calculations for REALTIME/NON-REALTIME + * Operating rate will either Default or Client value. + * Session admission control will be based on Load. + * Power requests based of calculated Clock/Freq. + * ----------------|----------------------------| + * REALTIME | Admission Control Load = | + * | res * fps | + * | Power Request Load = | + * | res * max(op, fps)| + * ----------------|----------------------------| + * NON-REALTIME/ | Admission Control Load = 0 | + * THUMBNAIL | Power Request Load = | + * | res * max(op, fps)| + * ----------------|----------------------------| + */ + if (is_thumbnail_session(inst) || + (!is_realtime_session(inst) && + quirks == LOAD_ADMISSION_CONTROL)) { + load = 0; + } else { + load = msm_vidc_get_mbps(inst, quirks); + } + +exit: + return load; +} + +static int fill_dynamic_stats(struct msm_vidc_inst *inst, + struct vidc_bus_vote_data *vote_data) +{ + u32 max_cr = MSM_VIDC_MIN_UBWC_COMPRESSION_RATIO; + u32 max_cf = MSM_VIDC_MIN_UBWC_COMPLEXITY_FACTOR; + u32 max_input_cr = MSM_VIDC_MIN_UBWC_COMPRESSION_RATIO; + u32 min_cf = MSM_VIDC_MAX_UBWC_COMPLEXITY_FACTOR; + u32 min_input_cr = MSM_VIDC_MAX_UBWC_COMPRESSION_RATIO; + u32 min_cr = MSM_VIDC_MAX_UBWC_COMPRESSION_RATIO; + + /* TODO: get ubwc stats from firmware + if (inst->core->resources.ubwc_stats_in_fbd == 1) { + mutex_lock(&inst->ubwc_stats_lock); + if (inst->ubwc_stats.is_valid == 1) { + min_cr = inst->ubwc_stats.worst_cr; + max_cf = inst->ubwc_stats.worst_cf; + min_input_cr = inst->ubwc_stats.worst_cr; + } + mutex_unlock(&inst->ubwc_stats_lock); + } + */ + /* Sanitize CF values from HW */ + max_cf = min_t(u32, max_cf, MSM_VIDC_MAX_UBWC_COMPLEXITY_FACTOR); + min_cf = max_t(u32, min_cf, MSM_VIDC_MIN_UBWC_COMPLEXITY_FACTOR); + max_cr = min_t(u32, max_cr, MSM_VIDC_MAX_UBWC_COMPRESSION_RATIO); + min_cr = max_t(u32, min_cr, MSM_VIDC_MIN_UBWC_COMPRESSION_RATIO); + max_input_cr = min_t(u32, + max_input_cr, MSM_VIDC_MAX_UBWC_COMPRESSION_RATIO); + min_input_cr = max_t(u32, + min_input_cr, MSM_VIDC_MIN_UBWC_COMPRESSION_RATIO); + + vote_data->compression_ratio = min_cr; + vote_data->complexity_factor = max_cf; + vote_data->input_cr = min_input_cr; + + s_vpr_l(inst->sid, + "Input CR = %d Recon CR = %d Complexity Factor = %d\n", + vote_data->input_cr, vote_data->compression_ratio, + vote_data->complexity_factor); + + return 0; +} + +static int msm_vidc_set_buses(struct msm_vidc_inst* inst) +{ + int rc = 0; + struct msm_vidc_core* core; + struct msm_vidc_inst* temp; + u64 total_bw_ddr = 0, total_bw_llcc = 0; + u64 curr_time_ns; + + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } core = inst->core; - freq = call_session_op(core, calc_freq, inst); - rc = venus_hfi_scale_clocks(inst, freq); - if (rc) - return rc; + mutex_lock(&core->lock); + curr_time_ns = ktime_get_ns(); + list_for_each_entry(temp, &core->instances, list) { + struct msm_vidc_buffer *vbuf, *next; + u32 data_size = 0; - freq = call_session_op(core, calc_bw, inst); - rc = venus_hfi_scale_buses(inst, freq); + /* TODO: accessing temp without lock */ + list_for_each_entry_safe(vbuf, next, &temp->buffers.input.list, list) + data_size = max(data_size, vbuf->data_size); + if (!data_size) + continue; + + /* skip inactive session bus bandwidth */ + if (!is_active_session(temp->last_qbuf_time_ns, curr_time_ns)) { + temp->active = false; + continue; + } + + if (temp->bus_data.power_mode == VIDC_POWER_TURBO) { + total_bw_ddr = total_bw_llcc = INT_MAX; + break; + } + total_bw_ddr += temp->bus_data.calc_bw_ddr; + total_bw_llcc += temp->bus_data.calc_bw_llcc; + } + mutex_unlock(&core->lock); + + rc = venus_hfi_scale_buses(inst, total_bw_ddr, total_bw_llcc); if (rc) return rc; return 0; } + +int msm_vidc_scale_buses(struct msm_vidc_inst *inst) +{ + int rc = 0; + struct msm_vidc_core *core; + struct vidc_bus_vote_data *vote_data; + struct v4l2_format *out_f; + struct v4l2_format *inp_f; + struct msm_vidc_buffer *vbuf; + u32 data_size = 0; + int codec = 0; + + if (!inst || !inst->core || !inst->capabilities) { + d_vpr_e("%s: invalid params: %pK\n", __func__, inst); + return -EINVAL; + } + core = inst->core; + if (!core->dt) { + d_vpr_e("%s: invalid dt params\n", __func__); + return -EINVAL; + } + vote_data = &inst->bus_data; + + list_for_each_entry(vbuf, &inst->buffers.input.list, list) + data_size = max(data_size, vbuf->data_size); + if (!data_size) + return 0; + + vote_data->power_mode = VIDC_POWER_NORMAL; + if (inst->power.buffer_counter < DCVS_FTB_WINDOW) + vote_data->power_mode = VIDC_POWER_TURBO; + if (msm_vidc_clock_voting) + vote_data->power_mode = VIDC_POWER_TURBO; + + if (vote_data->power_mode == VIDC_POWER_TURBO) + goto set_buses; + + out_f = &inst->fmts[OUTPUT_PORT]; + inp_f = &inst->fmts[INPUT_PORT]; + switch (inst->domain) { + case MSM_VIDC_DECODER: + codec = inp_f->fmt.pix_mp.pixelformat; + break; + case MSM_VIDC_ENCODER: + codec = out_f->fmt.pix_mp.pixelformat; + break; + default: + s_vpr_e(inst->sid, "%s: invalid session_type %#x\n", + __func__, inst->domain); + break; + } + + vote_data->codec = inst->codec; + vote_data->input_width = inp_f->fmt.pix_mp.width; + vote_data->input_height = inp_f->fmt.pix_mp.height; + vote_data->output_width = out_f->fmt.pix_mp.width; + vote_data->output_height = out_f->fmt.pix_mp.height; + vote_data->lcu_size = (codec == V4L2_PIX_FMT_HEVC || + codec == V4L2_PIX_FMT_VP9) ? 32 : 16; + vote_data->fps = msm_vidc_get_fps(inst); + + if (inst->domain == MSM_VIDC_ENCODER) { + vote_data->bitrate = inst->capabilities->cap[BIT_RATE].value; + vote_data->rotation = inst->capabilities->cap[ROTATION].value; + vote_data->b_frames_enabled = + inst->capabilities->cap[B_FRAME].value > 0; + /* scale bitrate if operating rate is larger than fps */ + if (vote_data->fps > (inst->prop.frame_rate >> 16) && + (inst->prop.frame_rate >> 16)) { + vote_data->bitrate = vote_data->bitrate / + (inst->prop.frame_rate >> 16) * vote_data->fps; + } + vote_data->num_formats = 1; + vote_data->color_formats[0] = v4l2_colorformat_to_driver( + inst->fmts[INPUT_PORT].fmt.pix_mp.pixelformat, __func__); + } else if (inst->domain == MSM_VIDC_DECODER) { + u32 color_format; + + vote_data->bitrate = data_size * vote_data->fps * 8; + color_format = v4l2_colorformat_to_driver( + inst->fmts[OUTPUT_PORT].fmt.pix_mp.pixelformat, __func__); + if (is_linear_colorformat(color_format)) { + vote_data->num_formats = 2; + /* + * 0 index - dpb colorformat + * 1 index - opb colorformat + */ + if (is_10bit_colorformat(color_format)) { + vote_data->color_formats[0] = MSM_VIDC_FMT_NV12_TP10_UBWC; + } else { + vote_data->color_formats[0] = MSM_VIDC_FMT_NV12; + } + vote_data->color_formats[0] = color_format; + } else { + vote_data->num_formats = 1; + vote_data->color_formats[0] = color_format; + } + } + vote_data->work_mode = inst->stage; + if (core->dt->sys_cache_res_set) + vote_data->use_sys_cache = true; + vote_data->num_vpp_pipes = core->capabilities[NUM_VPP_PIPE].value; + fill_dynamic_stats(inst, vote_data); + + call_session_op(core, calc_bw, inst, vote_data); + +set_buses: + rc = msm_vidc_set_buses(inst); + if (rc) + return rc; + + return 0; +} + +int msm_vidc_set_clocks(struct msm_vidc_inst* inst) +{ + int rc = 0; + struct msm_vidc_core* core; + struct msm_vidc_inst* temp; + u64 freq, rate; + u32 data_size; + bool increment, decrement; + u64 curr_time_ns; + int i = 0; + + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + core = inst->core; + if (!core->dt || !core->dt->allowed_clks_tbl) { + d_vpr_e("%s: invalid dt params\n", __func__); + return -EINVAL; + } + + mutex_lock(&core->lock); + increment = false; + decrement = true; + freq = 0; + curr_time_ns = ktime_get_ns(); + list_for_each_entry(temp, &core->instances, list) { + struct msm_vidc_buffer* vbuf, *next; + + data_size = 0; + list_for_each_entry_safe(vbuf, next, &temp->buffers.input.list, list) + data_size = max(data_size, vbuf->data_size); + if (!data_size) + continue; + + /* skip inactive session clock rate */ + if (!is_active_session(temp->last_qbuf_time_ns, curr_time_ns)) { + temp->active = false; + continue; + } + freq += temp->power.min_freq; + + if (msm_vidc_clock_voting) { + d_vpr_l("msm_vidc_clock_voting %d\n", msm_vidc_clock_voting); + freq = msm_vidc_clock_voting; + decrement = false; + break; + } + /* increment even if one session requested for it */ + if (temp->power.dcvs_flags & MSM_VIDC_DCVS_INCR) + increment = true; + /* decrement only if all sessions requested for it */ + if (!(temp->power.dcvs_flags & MSM_VIDC_DCVS_DECR)) + decrement = false; + } + + /* + * keep checking from lowest to highest rate until + * table rate >= requested rate + */ + for (i = core->dt->allowed_clks_tbl_size - 1; i >= 0; i--) { + rate = core->dt->allowed_clks_tbl[i].clock_rate; + if (rate >= freq) + break; + } + if (i < 0) + i = 0; + if (increment) { + if (i > 0) + rate = core->dt->allowed_clks_tbl[i - 1].clock_rate; + } else if (decrement) { + if (i < (int) (core->dt->allowed_clks_tbl_size - 1)) + rate = core->dt->allowed_clks_tbl[i + 1].clock_rate; + } + core->power.clk_freq = (u32)rate; + + d_vpr_p("%s: clock rate %lu requested %lu increment %d decrement %d\n", + __func__, rate, freq, increment, decrement); + mutex_unlock(&core->lock); + + rc = venus_hfi_scale_clocks(inst, rate); + if (rc) + return rc; + + return 0; +} + +static int msm_vidc_apply_dcvs(struct msm_vidc_inst *inst) +{ + int rc = 0; + int bufs_with_fw = 0; + struct msm_vidc_power *power; + + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params %pK\n", __func__, inst); + return -EINVAL; + } + + if (!inst->power.dcvs_mode || inst->decode_batch.enable) { + s_vpr_l(inst->sid, "Skip DCVS (dcvs %d, batching %d)\n", + inst->power.dcvs_mode, inst->decode_batch.enable); + inst->power.dcvs_flags = 0; + return 0; + } + power = &inst->power; + + if (is_decode_session(inst)) { + bufs_with_fw = msm_vidc_num_queued_bufs(inst, OUTPUT_MPLANE); + } else { + bufs_with_fw = msm_vidc_num_queued_bufs(inst, INPUT_MPLANE); + } + + /* +1 as one buffer is going to be queued after the function */ + bufs_with_fw += 1; + + /* + * DCVS decides clock level based on below algorithm + * + * Limits : + * min_threshold : Buffers required for reference by FW. + * nom_threshold : Midpoint of Min and Max thresholds + * max_threshold : Min Threshold + DCVS extra buffers, allocated + * for smooth flow. + * 1) When buffers outside FW are reaching client's extra buffers, + * FW is slow and will impact pipeline, Increase clock. + * 2) When pending buffers with FW are less than FW requested, + * pipeline has cushion to absorb FW slowness, Decrease clocks. + * 3) When DCVS has engaged(Inc or Dec) and pending buffers with FW + * transitions past the nom_threshold, switch to calculated load. + * This smoothens the clock transitions. + * 4) Otherwise maintain previous Load config. + */ + if (bufs_with_fw >= power->max_threshold) { + power->dcvs_flags = MSM_VIDC_DCVS_INCR; + } else if (bufs_with_fw < power->min_threshold) { + power->dcvs_flags = MSM_VIDC_DCVS_DECR; + } else if ((power->dcvs_flags & MSM_VIDC_DCVS_DECR && + bufs_with_fw >= power->nom_threshold) || + (power->dcvs_flags & MSM_VIDC_DCVS_INCR && + bufs_with_fw <= power->nom_threshold)) + power->dcvs_flags = 0; + + s_vpr_p(inst->sid, "DCVS: bufs_with_fw %d th[%d %d %d] flags %#x\n", + bufs_with_fw, power->min_threshold, + power->nom_threshold, power->max_threshold, + power->dcvs_flags); + + return rc; +} + +int msm_vidc_scale_clocks(struct msm_vidc_inst *inst) +{ + struct msm_vidc_core* core; + struct msm_vidc_buffer *vbuf; + u32 data_size = 0; + + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + core = inst->core; + + list_for_each_entry(vbuf, &inst->buffers.input.list, list) + data_size = max(data_size, vbuf->data_size); + if (!data_size) + return 0; + + if (inst->power.buffer_counter < DCVS_FTB_WINDOW || + is_turbo_session(inst)) { + inst->power.min_freq = msm_vidc_max_freq(inst); + inst->power.dcvs_flags = 0; + } else if (msm_vidc_clock_voting) { + inst->power.min_freq = msm_vidc_clock_voting; + inst->power.dcvs_flags = 0; + } else { + inst->power.min_freq = + call_session_op(core, calc_freq, inst, data_size); + msm_vidc_apply_dcvs(inst); + } + msm_vidc_set_clocks(inst); + + return 0; +} + +int msm_vidc_scale_power(struct msm_vidc_inst *inst, bool scale_buses) +{ + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params %pK\n", __func__, inst); + return -EINVAL; + } + + if (!inst->active) { + /* scale buses for inactive -> active session */ + scale_buses = true; + inst->active = true; + } + + if (msm_vidc_scale_clocks(inst)) + s_vpr_e(inst->sid, "failed to scale clock\n"); + + if (scale_buses) { + if (msm_vidc_scale_buses(inst)) + s_vpr_e(inst->sid, "failed to scale bus\n"); + } + + return 0; +} + +void msm_vidc_dcvs_data_reset(struct msm_vidc_inst *inst) +{ + struct msm_vidc_power *dcvs; + u32 min_count, actual_count; + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return; + } + + dcvs = &inst->power; + if (inst->domain == MSM_VIDC_ENCODER) { + min_count = inst->buffers.input.min_count; + actual_count = inst->buffers.input.actual_count; + } else if (inst->domain == MSM_VIDC_DECODER) { + min_count = inst->buffers.output.min_count; + actual_count = inst->buffers.output.actual_count; + } else { + s_vpr_e(inst->sid, "%s: invalid domain type %d\n", + __func__, inst->domain); + return; + } + + dcvs->min_threshold = min_count; + if (inst->domain == MSM_VIDC_ENCODER) + dcvs->max_threshold = min((min_count + DCVS_ENC_EXTRA_INPUT_BUFFERS), + actual_count); + else + dcvs->max_threshold = min((min_count + DCVS_DEC_EXTRA_OUTPUT_BUFFERS), + actual_count); + + dcvs->dcvs_window = + dcvs->max_threshold < dcvs->min_threshold ? 0 : + dcvs->max_threshold - dcvs->min_threshold; + dcvs->nom_threshold = dcvs->min_threshold + + (dcvs->dcvs_window ? + (dcvs->dcvs_window / 2) : 0); + + dcvs->dcvs_flags = 0; + + s_vpr_p(inst->sid, "%s: DCVS: thresholds [%d %d %d] flags %#x\n", + __func__, dcvs->min_threshold, + dcvs->nom_threshold, dcvs->max_threshold, + dcvs->dcvs_flags); +} + +void msm_vidc_power_data_reset(struct msm_vidc_inst *inst) +{ + int rc = 0; + + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return; + } + s_vpr_h(inst->sid, "%s\n", __func__); + + msm_vidc_dcvs_data_reset(inst); + + inst->power.buffer_counter = 0; + //inst->ubwc_stats.is_valid = 0; TODO: fix it + + rc = msm_vidc_scale_power(inst, true); + if (rc) + s_vpr_e(inst->sid, "%s: failed to scale power\n", __func__); +} diff --git a/driver/vidc/src/msm_vidc_vb2.c b/driver/vidc/src/msm_vidc_vb2.c index 735e414d3b..401ccba14c 100644 --- a/driver/vidc/src/msm_vidc_vb2.c +++ b/driver/vidc/src/msm_vidc_vb2.c @@ -6,6 +6,7 @@ #include "msm_vidc_vb2.h" #include "msm_vidc_core.h" #include "msm_vidc_inst.h" +#include "msm_vidc_internal.h" #include "msm_vidc_driver.h" #include "msm_vdec.h" #include "msm_venc.h" diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index 3c018355da..e29d1ca095 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -20,7 +20,7 @@ #include "venus_hfi.h" #include "msm_vidc_core.h" -#include "msm_vidc_bus.h" +#include "msm_vidc_power.h" #include "msm_vidc_dt.h" #include "msm_vidc_platform.h" #include "msm_vidc_memory.h" @@ -2995,7 +2995,7 @@ exit: return rc; } -int venus_hfi_scale_buses(struct msm_vidc_inst *inst, u64 freq) +int venus_hfi_scale_buses(struct msm_vidc_inst *inst, u64 bw_ddr, u64 bw_llcc) { int rc = 0; struct msm_vidc_core* core; @@ -3007,7 +3007,7 @@ int venus_hfi_scale_buses(struct msm_vidc_inst *inst, u64 freq) core = inst->core; mutex_lock(&core->lock); - rc = __vote_buses(core, freq, freq); + rc = __vote_buses(core, bw_ddr, bw_llcc); mutex_unlock(&core->lock); return rc; From 4282d85d6ff7418010bbb78b6fde5518dc8f3a9d Mon Sep 17 00:00:00 2001 From: Chinmay Sawarkar Date: Tue, 1 Dec 2020 15:33:20 -0800 Subject: [PATCH 0041/1061] video: driver: Use dma-heap for non secure allocations Non secure buffer allocation will use dma-heaps, while secure allocations will continue using ion apis. Change-Id: I7a7d77d197275814c8e6a9e1effe59ad3bd15224 Signed-off-by: Chinmay Sawarkar --- driver/vidc/inc/msm_vidc_internal.h | 1 - driver/vidc/src/msm_vidc_memory.c | 57 +++++++++++------------------ driver/vidc/src/venus_hfi.c | 2 - 3 files changed, 22 insertions(+), 38 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index eb5ba48b63..5f25f2a341 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -600,7 +600,6 @@ struct msm_vidc_alloc { enum msm_vidc_buffer_type type; enum msm_vidc_buffer_region region; u32 size; - u8 cached:1; u8 secure:1; u8 map_kernel:1; struct dma_buf *dmabuf; diff --git a/driver/vidc/src/msm_vidc_memory.c b/driver/vidc/src/msm_vidc_memory.c index 5c95f0d598..031cf26759 100644 --- a/driver/vidc/src/msm_vidc_memory.c +++ b/driver/vidc/src/msm_vidc_memory.c @@ -4,6 +4,7 @@ */ #include +#include #include #include @@ -14,27 +15,6 @@ #include "msm_vidc_core.h" -static int get_ion_secure_flag(enum msm_vidc_buffer_region region) -{ - u32 ion_flag = 0; - - switch (region) { - case MSM_VIDC_SECURE_PIXEL: - ion_flag = ION_FLAG_CP_PIXEL; - break; - case MSM_VIDC_SECURE_NONPIXEL: - ion_flag = ION_FLAG_CP_NON_PIXEL; - break; - case MSM_VIDC_SECURE_BITSTREAM: - ion_flag = ION_FLAG_CP_BITSTREAM; - break; - default: - d_vpr_e("invalid secure region : %#x\n", region); - } - - return ion_flag; -} - struct context_bank_info *get_context_bank(struct msm_vidc_core *core, enum msm_vidc_buffer_region region) { @@ -92,7 +72,7 @@ void msm_vidc_memory_put_dmabuf(void *dmabuf) return; } - dma_buf_put((struct dma_buf *)dmabuf); + dma_heap_buffer_free((struct dma_buf *)dmabuf); } int msm_vidc_memory_map(struct msm_vidc_core *core, struct msm_vidc_map *map) @@ -205,10 +185,9 @@ exit: int msm_vidc_memory_alloc(struct msm_vidc_core *core, struct msm_vidc_alloc *mem) { int rc = 0; - int ion_flags = 0; - int ion_secure_flag = 0; - unsigned long heap_mask = 0; int size = 0; + struct dma_heap *heap; + char *heap_name = NULL; if (!mem) { d_vpr_e("%s: invalid params\n", __func__); @@ -217,20 +196,28 @@ int msm_vidc_memory_alloc(struct msm_vidc_core *core, struct msm_vidc_alloc *mem size = ALIGN(mem->size, SZ_4K); - if (mem->cached) - ion_flags |= ION_FLAG_CACHED; - +/* All dma-heap allocations are cached by default. */ if (mem->secure) { - ion_secure_flag = get_ion_secure_flag(mem->region); - ion_flags |= ION_FLAG_SECURE | ion_secure_flag; - heap_mask = ION_HEAP(ION_SECURE_HEAP_ID); + switch (mem->region) { + case MSM_VIDC_SECURE_PIXEL: + heap_name = "qcom,secure-pixel"; + break; + case MSM_VIDC_SECURE_NONPIXEL: + heap_name = "qcom,secure-non-pixel"; + break; + case MSM_VIDC_SECURE_BITSTREAM: + default: + d_vpr_e("invalid secure region : %#x\n", mem->region); + return -EINVAL; + } } else { - heap_mask = ION_HEAP(ION_SYSTEM_HEAP_ID); + heap_name = "qcom,system"; } - mem->dmabuf = ion_alloc(size, heap_mask, ion_flags); + heap = dma_heap_find(heap_name); + mem->dmabuf = dma_heap_buffer_alloc(heap, size, 0, 0); if (IS_ERR_OR_NULL(mem->dmabuf)) { - d_vpr_e("%s: ion alloc failed\n", __func__); + d_vpr_e("%s: dma heap %s alloc failed\n", __func__, heap_name); mem->dmabuf = NULL; rc = -ENOMEM; goto error; @@ -276,7 +263,7 @@ int msm_vidc_memory_free(struct msm_vidc_core *core, struct msm_vidc_alloc *mem) } if (mem->dmabuf) { - dma_buf_put(mem->dmabuf); + dma_heap_buffer_free(mem->dmabuf); mem->dmabuf = NULL; } diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index 3c018355da..705ffcdf8f 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -2119,7 +2119,6 @@ static int __interface_queues_init(struct msm_vidc_core *core) alloc.type = MSM_VIDC_BUF_QUEUE; alloc.region = MSM_VIDC_NON_SECURE; alloc.size = q_size; - alloc.cached = false; alloc.secure = false; alloc.map_kernel = true; rc = msm_vidc_memory_alloc(core, &alloc); @@ -2192,7 +2191,6 @@ static int __interface_queues_init(struct msm_vidc_core *core) alloc.type = MSM_VIDC_BUF_QUEUE; alloc.region = MSM_VIDC_NON_SECURE; alloc.size = ALIGNED_SFR_SIZE; - alloc.cached = false; alloc.secure = false; alloc.map_kernel = true; rc = msm_vidc_memory_alloc(core, &alloc); From b44f17ecd4ca8300a5e8b659b0a1bb62cd29df93 Mon Sep 17 00:00:00 2001 From: Maheshwar Ajja Date: Mon, 21 Dec 2020 20:52:12 -0800 Subject: [PATCH 0042/1061] video: driver: add video encoder internal buffers Add video encoder internal buffer sizes to be used by video hardware to process input data and produce output. Change-Id: Icf58c748d5be2f81c7de69e914c526821a7effaf Signed-off-by: Maheshwar Ajja --- driver/variant/iris2/inc/hfi_buffer_iris2.h | 13 +++++++++++++ 1 file changed, 13 insertions(+) create mode 100644 driver/variant/iris2/inc/hfi_buffer_iris2.h diff --git a/driver/variant/iris2/inc/hfi_buffer_iris2.h b/driver/variant/iris2/inc/hfi_buffer_iris2.h new file mode 100644 index 0000000000..eabf036ffd --- /dev/null +++ b/driver/variant/iris2/inc/hfi_buffer_iris2.h @@ -0,0 +1,13 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) 2020, The Linux Foundation. All rights reserved. + */ + + +#define HFI_BUFFER_ARP_ENC (204800) +#define HFI_BUFFER_BIN_ENC (15 * 1000 * 1000) +#define HFI_BUFFER_LINE_ENC (200 * 1000) +#define HFI_BUFFER_COMV_ENC (1 * 1000 * 1000) +#define HFI_BUFFER_NON_COMV_ENC (500 * 1000) +#define HFI_BUFFER_DPB_ENC (3 * 1000 * 1000) +#define HFI_BUFFER_VPSS_ENC (2 * 1000 * 1000) From 8f55c1030e634e7256247ac1234bdc9a842fe22c Mon Sep 17 00:00:00 2001 From: Rakshitha Shakamuri Date: Wed, 16 Dec 2020 17:55:16 -0800 Subject: [PATCH 0043/1061] video: driver: add firmware memory header file Adding firmware meomory header file Change-Id: If04a2817870b63c51dcec118b3976c647fb98c1e Signed-off-by: Rakshitha Shakamuri --- driver/variant/iris2/inc/hfi_buffer_iris2.h | 1801 ++++++++++++++++++- 1 file changed, 1794 insertions(+), 7 deletions(-) diff --git a/driver/variant/iris2/inc/hfi_buffer_iris2.h b/driver/variant/iris2/inc/hfi_buffer_iris2.h index eabf036ffd..858bb75a0f 100644 --- a/driver/variant/iris2/inc/hfi_buffer_iris2.h +++ b/driver/variant/iris2/inc/hfi_buffer_iris2.h @@ -3,11 +3,1798 @@ * Copyright (c) 2020, The Linux Foundation. All rights reserved. */ +#ifndef __HFI_BUFFER_IRIS2__ +#define __HFI_BUFFER_IRIS2__ -#define HFI_BUFFER_ARP_ENC (204800) -#define HFI_BUFFER_BIN_ENC (15 * 1000 * 1000) -#define HFI_BUFFER_LINE_ENC (200 * 1000) -#define HFI_BUFFER_COMV_ENC (1 * 1000 * 1000) -#define HFI_BUFFER_NON_COMV_ENC (500 * 1000) -#define HFI_BUFFER_DPB_ENC (3 * 1000 * 1000) -#define HFI_BUFFER_VPSS_ENC (2 * 1000 * 1000) +#ifndef MIN +#define MIN(x, y) (((x) < (y)) ? (x) : (y)) +#endif + +#ifndef MAX +#define MAX(x, y) (((x) > (y)) ? (x) : (y)) +#endif + +/* + * Default buffer size alignment value + */ +#define HFI_ALIGNMENT_4096 (4096) + +/* + * Macro to align a to b + */ +#define HFI_ALIGN(a, b) (((b) & ((b) - 1)) ? (((a) + (b) - 1) / \ + (b) * (b)) : (((a) + (b) - 1) & (~((b) - 1)))) + +/* + * Default ubwc metadata buffer stride and height alignment values + */ +#define HFI_DEFAULT_METADATA_STRIDE_MULTIPLE (64) +#define HFI_DEFAULT_METADATA_BUFFERHEIGHT_MULTIPLE (16) + +/* + * Level 2 Comment: "Default Parameters for Firmware " + * This section defines all the default constants used by Firmware + * for any encoding session: + * 1. Bitstream Restriction VUI: TRUE + * 2. Picture Order Count: 2 (for all profiles except B frame case) + * 3. Constrained intra pred flag : TRUE (if Intra-refresh (IR) is enabled) + */ + +/* + * Level 2 Comment: "Tile dimensions(in pixels) macros for + * different color formats" + * @datatypes + * @sa + */ +#define HFI_COLOR_FORMAT_YUV420_NV12_UBWC_Y_TILE_HEIGHT (8) +#define HFI_COLOR_FORMAT_YUV420_NV12_UBWC_Y_TILE_WIDTH (32) +#define HFI_COLOR_FORMAT_YUV420_NV12_UBWC_UV_TILE_HEIGHT (8) +#define HFI_COLOR_FORMAT_YUV420_NV12_UBWC_UV_TILE_WIDTH (16) +#define HFI_COLOR_FORMAT_YUV420_TP10_UBWC_Y_TILE_HEIGHT (4) +#define HFI_COLOR_FORMAT_YUV420_TP10_UBWC_Y_TILE_WIDTH (48) +#define HFI_COLOR_FORMAT_YUV420_TP10_UBWC_UV_TILE_HEIGHT (4) +#define HFI_COLOR_FORMAT_YUV420_TP10_UBWC_UV_TILE_WIDTH (24) +#define HFI_COLOR_FORMAT_RGBA8888_UBWC_TILE_HEIGHT (4) +#define HFI_COLOR_FORMAT_RGBA8888_UBWC_TILE_WIDTH (16) + +/* + * Level 2 Comment: "Macros to calculate YUV strides and size" + * @datatypes + * HFI_UNCOMPRESSED_FORMAT_SUPPORTED_TYPE + * HFI_UNCOMPRESSED_PLANE_INFO_TYPE + * HFI_UNCOMPRESSED_PLANE_CONSTRAINTS_TYPE + * @sa + * HFI_PROPERTY_PARAM_UNCOMPRESSED_FORMAT_SUPPORTED + */ + +/* + * Luma stride calculation for YUV420, NV12/NV21, NV12_UBWC color format + * Stride arrived at here is the minimum required stride. Host may + * set a stride higher than the one calculated here, till the stride + * is a multiple of "nStrideMultiples" in + * HFI_UNCOMPRESSED_PLANE_CONSTRAINTS_TYPE + */ +#define HFI_NV12_IL_CALC_Y_STRIDE(stride, frame_width, stride_multiple) \ + stride = HFI_ALIGN(frame_width, stride_multiple) + +/* + * Luma plane height calculation for YUV420 NV12/NV21, NV12_UBWC color format + * Luma plane height used by the host needs to be either equal + * to higher than the value calculated here + */ +#define HFI_NV12_IL_CALC_Y_BUFHEIGHT(buf_height, frame_height, \ + min_buf_height_multiple) buf_height = HFI_ALIGN(frame_height, \ + min_buf_height_multiple) + +/* + * Chroma stride calculation for NV12/NV21, NV12_UBWC color format + */ +#define HFI_NV12_IL_CALC_UV_STRIDE(stride, frame_width, stride_multiple) \ + stride = HFI_ALIGN(frame_width, stride_multiple) + +/* + * Chroma plane height calculation for NV12/NV21, NV12_UBWC color format + */ +#define HFI_NV12_IL_CALC_UV_BUFHEIGHT(buf_height, frame_height, \ + min_buf_height_multiple) buf_height = HFI_ALIGN(((frame_height + 1) \ + >> 1), min_buf_height_multiple) + +/* + * Minimum buffer size that needs to be allocated for current + * frame dimensions for NV12/N21 Linear format + * (calcualtion includes both luma and chroma plane) + */ +#define HFI_NV12_IL_CALC_BUF_SIZE(buf_size, y_bufSize, y_stride, y_buf_height, \ + uv_buf_size, uv_stride, uv_buf_height) \ + y_bufSize = (y_stride * y_buf_height); \ + uv_buf_size = (uv_stride * uv_buf_height); \ + buf_size = HFI_ALIGN(y_bufSize + uv_buf_size, HFI_ALIGNMENT_4096) + +/* + * Minimum Luma buffer size that needs to be allocated for current + * frame dimensions NV12_UBWC format + */ +#define HFI_NV12_UBWC_IL_CALC_Y_BUF_SIZE(y_bufSize, y_stride, y_buf_height) \ + y_bufSize = HFI_ALIGN(y_stride * y_buf_height, HFI_ALIGNMENT_4096) + +/* + * Minimum chroma buffer size that needs to be allocated for current + * frame dimensions NV12_UBWC format + */ +#define HFI_NV12_UBWC_IL_CALC_UV_BUF_SIZE(uv_buf_size, \ + uv_stride, uv_buf_height) \ + uv_buf_size = HFI_ALIGN(uv_stride * uv_buf_height, HFI_ALIGNMENT_4096) + +/* + * This is for sdm845 onwards: + * Ver2.0: Minimum buffer size that needs to be allocated for current + * frame dimensions NV12_UBWC format (including interlace UBWC) + * (calculation includes all data & metadata planes) + */ +#define HFI_NV12_UBWC_IL_CALC_BUF_SIZE_V2 \ + (buf_size, frame_width, frame_height, y_stride_multiple,\ + y_buffer_height_multiple, uv_stride_multiple, \ + uv_buffer_height_multiple, y_metadata_stride_multiple, \ + y_metadata_buffer_height_multiple, \ + uv_metadata_stride_multiple, uv_metadata_buffer_height_multiple) \ + do \ + { \ + UInt32 y_buf_size, uv_buf_size, y_meta_size, uv_meta_size; \ + UInt32 stride, height; \ + UInt32 halfHeight = (frame_height + 1) >> 1; \ + HFI_NV12_IL_CALC_Y_STRIDE(stride, frame_width,\ + y_stride_multiple); \ + HFI_NV12_IL_CALC_Y_BUFHEIGHT(height, half_height,\ + y_buffer_height_multiple); \ + HFI_NV12_UBWC_IL_CALC_Y_BUF_SIZE(y_buf_size, stride, height);\ + HFI_NV12_IL_CALC_UV_STRIDE(stride, frame_width, \ + uv_stride_multiple); \ + HFI_NV12_IL_CALC_UV_BUFHEIGHT(height, half_height, \ + uv_buffer_height_multiple); \ + HFI_NV12_UBWC_IL_CALC_UV_BUF_SIZE(uv_buf_size, stride, height);\ + HFI_UBWC_CALC_METADATA_PLANE_STRIDE(stride, frame_width,\ + y_metadata_stride_multiple, \ + HFI_COLOR_FORMAT_YUV420_NV12_UBWC_Y_TILE_WIDTH);\ + HFI_UBWC_METADATA_PLANE_BUFHEIGHT(height, half_height, \ + y_metadata_buffer_height_multiple,\ + HFI_COLOR_FORMAT_YUV420_NV12_UBWC_Y_TILE_HEIGHT);\ + HFI_UBWC_METADATA_PLANE_BUFFER_SIZE(y_meta_size, stride, \ + height); \ + HFI_UBWC_UV_METADATA_PLANE_STRIDE(stride, frame_width,\ + uv_metadata_stride_multiple, \ + HFI_COLOR_FORMAT_YUV420_NV12_UBWC_UV_TILE_WIDTH); \ + HFI_UBWC_UV_METADATA_PLANE_BUFHEIGHT(height, half_height,\ + uv_metadata_buffer_height_multiple,\ + HFI_COLOR_FORMAT_YUV420_NV12_UBWC_UV_TILE_HEIGHT);\ + HFI_UBWC_METADATA_PLANE_BUFFER_SIZE(uv_meta_size, stride, \ + height); \ + bufSize = (y_buf_size + uv_buf_size + y_meta_size + \ + uv_meta_size) << 1;\ + } while (0) + +/* + * Luma stride calculation for YUV420_TP10 color format + * Stride arrived at here is the minimum required stride. Host may + * set a stride higher than the one calculated here, till the stride + * is a multiple of "nStrideMultiples" in + * HFI_UNCOMPRESSED_PLANE_CONSTRAINTS_TYPE + */ +#define HFI_YUV420_TP10_CALC_Y_STRIDE(stride, frame_width, stride_multiple) \ + stride = HFI_ALIGN(frame_width, 192); \ + stride = HFI_ALIGN(stride * 4 / 3, stride_multiple) + +/* + * Luma plane height calculation for YUV420_TP10 linear & UBWC color format + * Luma plane height used by the host needs to be either equal + * to higher than the value calculated here + */ +#define HFI_YUV420_TP10_CALC_Y_BUFHEIGHT(buf_height, frame_height, \ + min_buf_height_multiple) \ + buf_height = HFI_ALIGN(frame_height, min_buf_height_multiple) + +/* + * Chroma stride calculation for YUV420_TP10 linear & UBWC color format + */ +#define HFI_YUV420_TP10_CALC_UV_STRIDE(stride, frame_width, stride_multiple) \ + stride = HFI_ALIGN(frame_width, 192); \ + stride = HFI_ALIGN(stride * 4 / 3, stride_multiple) + +/* + * Chroma plane height calculation for YUV420_TP10 linear & UBWC color format + */ +#define HFI_YUV420_TP10_CALC_UV_BUFHEIGHT(buf_height, frame_height, \ + min_buf_height_multiple) \ + buf_height = HFI_ALIGN(((frame_height + 1) >> 1), \ + min_buf_height_multiple) + +/* + * Minimum buffer size that needs to be allocated for current + * frame dimensions for YUV420_TP10 linear format + * (calcualtion includes both luma and chroma plane) + */ +#define HFI_YUV420_TP10_CALC_BUF_SIZE(buf_size, y_buf_size, y_stride,\ + y_buf_height, uv_buf_size, uv_stride, uv_buf_height) \ + y_buf_size = (y_stride * y_buf_height); \ + uv_buf_size = (uv_stride * uv_buf_height); \ + buf_size = y_buf_size + uv_buf_size + +/* + * Minimum Luma data buffer size that needs to be allocated for current + * frame dimensions YUV420_TP10_UBWC format + */ +#define HFI_YUV420_TP10_UBWC_CALC_Y_BUF_SIZE(y_buf_size, y_stride, \ + y_buf_height) \ + y_buf_size = HFI_ALIGN(y_stride * y_buf_height, HFI_ALIGNMENT_4096) + +/* + * Minimum chroma data buffer size that needs to be allocated for current + * frame dimensions YUV420_TP10_UBWC format + */ +#define HFI_YUV420_TP10_UBWC_CALC_UV_BUF_SIZE(uv_buf_size, uv_stride, \ + uv_buf_height) \ + uv_buf_size = HFI_ALIGN(uv_stride * uv_buf_height, HFI_ALIGNMENT_4096) + +/* + * Minimum buffer size that needs to be allocated for current + * frame dimensions NV12_UBWC format + * (calculation includes all data & metadata planes) + */ +#define HFI_YUV420_TP10_UBWC_CALC_BUF_SIZE(buf_size, y_stride, y_buf_height, \ + uv_stride, uv_buf_height, y_md_stride, y_md_height, uv_md_stride, \ + uv_md_height)\ + do \ + { \ + HFI_U32 y_data_size, uv_data_size, y_md_size, uv_md_size; \ + HFI_YUV420_TP10_UBWC_CALC_Y_BUF_SIZE(y_data_size, y_stride,\ + y_buf_height); \ + HFI_YUV420_TP10_UBWC_CALC_UV_BUF_SIZE(uv_data_size, uv_stride, \ + uv_buf_height); \ + HFI_UBWC_METADATA_PLANE_BUFFER_SIZE(y_md_size, y_md_stride, \ + y_md_height); \ + HFI_UBWC_METADATA_PLANE_BUFFER_SIZE(uv_md_size, uv_md_stride, \ + uv_md_height); \ + buf_size = y_data_size + uv_data_size + y_md_size + \ + uv_md_size; \ + } while (0) + +/* + * Luma stride calculation for YUV420_P010 color format + * Stride arrived at here is the minimum required stride. Host may + * set a stride higher than the one calculated here, till the stride + * is a multiple of "nStrideMultiples" in + * HFI_UNCOMPRESSED_PLANE_CONSTRAINTS_TYPE + */ + +#define HFI_YUV420_P010_CALC_Y_STRIDE(stride, frame_width, stride_multiple) \ + stride = HFI_ALIGN(frame_width * 2, stride_multiple) + +/* + * Luma plane height calculation for YUV420_P010 linear color format + * Luma plane height used by the host needs to be either equal + * to higher than the value calculated here + */ +#define HFI_YUV420_P010_CALC_Y_BUFHEIGHT(buf_height, frame_height, \ + min_buf_height_multiple) \ + buf_height = HFI_ALIGN(frame_height, min_buf_height_multiple) + +/* + * Chroma stride calculation for YUV420_P010 linear color format + */ +#define HFI_YUV420_P010_CALC_UV_STRIDE(stride, frame_width, stride_multiple) \ + stride = HFI_ALIGN(frame_width * 2, stride_multiple) + +/* + * Chroma plane height calculation for YUV420_P010 linear color format + */ +#define HFI_YUV420_P010_CALC_UV_BUFHEIGHT(buf_height, frame_height, \ + min_buf_height_multiple) \ + buf_height = HFI_ALIGN(((frame_height + 1) >> 1), \ + min_buf_height_multiple) + +/* + * Minimum buffer size that needs to be allocated for current + * frame dimensions for YUV420_P010 linear format + * (calculation includes both luma and chroma plane) + */ +#define HFI_YUV420_P010_CALC_BUF_SIZE(buf_size, y_data_size, y_stride, \ + y_buf_height, uv_data_size, uv_stride, uv_buf_height) \ + do \ + { \ + y_data_size = HFI_ALIGN(y_stride * y_buf_height, \ + HFI_ALIGNMENT_4096);\ + uv_data_size = HFI_ALIGN(uv_stride * uv_buf_height, \ + HFI_ALIGNMENT_4096); \ + buf_size = y_data_size + uv_data_size; \ + } while (0) + +/* + * Plane stride calculation for RGB888/BGR888 color format + * Stride arrived at here is the minimum required stride. Host may + * set a stride higher than the one calculated here, till the stride + * is a multiple of "nStrideMultiples" in + * HFI_UNCOMPRESSED_PLANE_CONSTRAINTS_TYPE + */ +#define HFI_RGB888_CALC_STRIDE(stride, frame_width, stride_multiple) \ + stride = ((frame_width * 3) + stride_multiple - 1) & \ + (0xffffffff - (stride_multiple - 1)) + +/* + * Plane height calculation for RGB888/BGR888 color format + * Luma plane height used by the host needs to be either equal + * to higher than the value calculated here + */ +#define HFI_RGB888_CALC_BUFHEIGHT(buf_height, frame_height, \ + min_buf_height_multiple) \ + buf_height = ((frame_height + min_buf_height_multiple - 1) & \ + (0xffffffff - (min_buf_height_multiple - 1))) + +/* + * Minimum buffer size that needs to be allocated for current + * frame dimensions for RGB888/BGR888 format + */ +#define HFI_RGB888_CALC_BUF_SIZE(buf_size, stride, buf_height) \ + buf_size = ((stride) * (buf_height)) + +/* + * Plane stride calculation for RGBA8888 color format + * Stride arrived at here is the minimum required stride. Host may + * set a stride higher than the one calculated here, till the stride + * is a multiple of "nStrideMultiples" in + * HFI_UNCOMPRESSED_PLANE_CONSTRAINTS_TYPE + */ +#define HFI_RGBA8888_CALC_STRIDE(stride, frame_width, stride_multiple) \ + stride = HFI_ALIGN((frame_width << 2), stride_multiple) +/* + * Plane height calculation for RGBA8888 color format + * Luma plane height used by the host needs to be either equal + * to higher than the value calculated here + */ +#define HFI_RGBA8888_CALC_BUFHEIGHT(buf_height, frame_height, \ + min_buf_height_multiple) \ + buf_height = HFI_ALIGN(frame_height, min_buf_height_multiple) +/* + * Minimum buffer size that needs to be allocated for current + * frame dimensions for RGBA8888 format + */ +#define HFI_RGBA8888_CALC_BUF_SIZE(buf_size, stride, buf_height) \ + buf_size = (stride) * (buf_height) +/* + * Minimum buffer size that needs to be allocated for current + * frame dimensions for data plane of RGBA8888_UBWC format + */ +#define HFI_RGBA8888_UBWC_CALC_DATA_PLANE_BUF_SIZE(buf_size, stride, \ + buf_height) \ + buf_size = HFI_ALIGN((stride) * (buf_height), HFI_ALIGNMENT_4096) + +/* + * Minimum buffer size that needs to be allocated for current + * frame dimensions for of RGBA8888_UBWC format + */ +#define HFI_RGBA8888_UBWC_BUF_SIZE(buf_size, data_buf_size, \ + metadata_buffer_size, stride, buf_height, _metadata_tride, \ + _metadata_buf_height) \ + HFI_RGBA8888_UBWC_CALC_DATA_PLANE_BUF_SIZE(data_buf_size, \ + stride, buf_height); \ + HFI_UBWC_METADATA_PLANE_BUFFER_SIZE(metadata_buffer_size, \ + _metadata_tride, _metadata_buf_height); \ + buf_size = data_buf_size + metadata_buffer_size + +/* + * Metadata plane stride calculation for all UBWC color formats + * Should be used for Y metadata Plane & all single plane color + * formats. Stride arrived at here is the minimum required + * stride. Host may set a stride higher than the one calculated + * here, till the stride is a multiple of + * "_metadata_trideMultiple" in + * HFI_UNCOMPRESSED_PLANE_CONSTRAINTS_TYPE Default + * metadataDataStrideMultiple = 64 + */ +#define HFI_UBWC_CALC_METADATA_PLANE_STRIDE(metadata_stride, frame_width,\ + metadata_stride_multiple, tile_width_in_pels) \ + metadata_stride = HFI_ALIGN(((frame_width + (tile_width_in_pels - 1)) /\ + tile_width_in_pels), metadata_stride_multiple) + +/* + * Metadata plane height calculation for all UBWC color formats + * Should be used for Y metadata Plane & all single plane color + * formats. Plane height used by the host needs to be either + * equal to higher than the value calculated here + * Default metadataHeightMultiple = 16 + */ +#define HFI_UBWC_METADATA_PLANE_BUFHEIGHT(metadata_buf_height, frame_height, \ + metadata_height_multiple, tile_height_in_pels) \ + metadata_buf_height = HFI_ALIGN(((frame_height + \ + (tile_height_in_pels - 1)) / tile_height_in_pels), \ + metadata_height_multiple) + +/* + * UV Metadata plane stride calculation for NV12_UBWC color + * format. Stride arrived at here is the minimum required + * stride. Host may set a stride higher than the one calculated + * here, till the stride is a multiple of + * "_metadata_trideMultiple" in + * HFI_UNCOMPRESSED_PLANE_CONSTRAINTS_TYPE Default + * metadataDataStrideMultiple = 64 + */ +#define HFI_UBWC_UV_METADATA_PLANE_STRIDE(metadata_stride, frame_width, \ + metadata_stride_multiple, tile_width_in_pels) \ + metadata_stride = HFI_ALIGN(((((frame_width + 1) >> 1) +\ + (tile_width_in_pels - 1)) / tile_width_in_pels), \ + metadata_stride_multiple) + +/* + * UV Metadata plane height calculation for NV12_UBWC color + * format. Plane height used by the host needs to be either + * equal to higher than the value calculated here Default + * metadata_height_multiple = 16 + */ +#define HFI_UBWC_UV_METADATA_PLANE_BUFHEIGHT(metadata_buf_height, frame_height,\ + metadata_height_multiple, tile_height_in_pels) \ + metadata_buf_height = HFI_ALIGN(((((frame_height + 1) >> 1) + \ + (tile_height_in_pels - 1)) / tile_height_in_pels), \ + metadata_height_multiple) + +/* + * Minimum metadata buffer size that needs to be allocated for + * current frame dimensions for each metadata plane. + * This macro applies to all UBWC color format + */ +#define HFI_UBWC_METADATA_PLANE_BUFFER_SIZE(buffer_size, _metadata_tride, \ + _metadata_buf_height) \ + buffer_size = HFI_ALIGN(_metadata_tride * _metadata_buf_height, \ + HFI_ALIGNMENT_4096) + + + +#define BUFFER_ALIGNMENT_512_BYTES 512 +#define BUFFER_ALIGNMENT_256_BYTES 256 +#define BUFFER_ALIGNMENT_128_BYTES 128 +#define BUFFER_ALIGNMENT_64_BYTES 64 +#define BUFFER_ALIGNMENT_32_BYTES 32 +#define BUFFER_ALIGNMENT_16_BYTES 16 +#define BUFFER_ALIGNMENT_8_BYTES 8 +#define BUFFER_ALIGNMENT_4_BYTES 4 + +#define VENUS_DMA_ALIGNMENT BUFFER_ALIGNMENT_256_BYTES + +#define MAX_FE_NBR_CTRL_LCU64_LINE_BUFFER_SIZE 64 +#define MAX_FE_NBR_CTRL_LCU32_LINE_BUFFER_SIZE 64 +#define MAX_FE_NBR_CTRL_LCU16_LINE_BUFFER_SIZE 64 +#define MAX_FE_NBR_DATA_LUMA_LINE_BUFFER_SIZE 640 +#define MAX_FE_NBR_DATA_CB_LINE_BUFFER_SIZE 320 +#define MAX_FE_NBR_DATA_CR_LINE_BUFFER_SIZE 320 + +#define MAX_SE_NBR_CTRL_LCU64_LINE_BUFFER_SIZE (128 / 8) +#define MAX_SE_NBR_CTRL_LCU32_LINE_BUFFER_SIZE (128 / 8) +#define MAX_SE_NBR_CTRL_LCU16_LINE_BUFFER_SIZE (128 / 8) + +#define MAX_PE_NBR_DATA_LCU64_LINE_BUFFER_SIZE (64 * 2 * 3) +#define MAX_PE_NBR_DATA_LCU32_LINE_BUFFER_SIZE (32 * 2 * 3) +#define MAX_PE_NBR_DATA_LCU16_LINE_BUFFER_SIZE (16 * 2 * 3) + +/* Begin of IRIS2 */ + +/* + * VPSS internal buffer definition + * Only for 1:1 DS ratio case + */ +#define MAX_TILE_COLUMNS 32 /* 8K/256 */ + +/* + * For all buffer size calculators using num_vpp_pipes, + * use per chipset "static" pipe count. + * Note that this applies to all use-cases, + * e.g. buffer sizes for interlace decode + * will be calculated using 4 vpp pipes on Kona, + * even though interlace decode uses single vpp pipe. + * __________________________________________________________ + * |_____________Target_____________|_______numVPPpipes_______| + * | IRIS2(e.g. Kona) | 4 | + * | IRIS2(e.g. Cedros) | 2 | + * |_______IRIS2(e.g. Bitra)________|___________1_____________| + */ + +#define SIZE_VPSS_LB(Size, frame_width, frame_height, num_vpp_pipes) \ + do \ + { \ + HFI_U32 vpss_4tap_top_buffer_size, vpss_div2_top_buffer_size, \ + vpss_4tap_left_buffer_size, vpss_div2_left_buffer_size; \ + HFI_U32 opb_wr_top_line_luma_buffer_size, \ + opb_wr_top_line_chroma_buffer_size, \ + opb_lb_wr_llb_y_buffer_size,\ + opb_lb_wr_llb_uv_buffer_size; \ + HFI_U32 lcu_size_pels, macrotiling_size, padding_size; \ + vpss_4tap_top_buffer_size = vpss_div2_top_buffer_size = \ + vpss_4tap_left_buffer_size = vpss_div2_left_buffer_size = 0; \ + macrotiling_size = 32; \ + opb_wr_top_line_luma_buffer_size = HFI_ALIGN(frame_width, \ + macrotiling_size) / macrotiling_size * 256; \ + opb_wr_top_line_luma_buffer_size = \ + HFI_ALIGN(opb_wr_top_line_luma_buffer_size, \ + VENUS_DMA_ALIGNMENT) + (MAX_TILE_COLUMNS - 1) * 256; \ + opb_wr_top_line_luma_buffer_size = \ + MAX(opb_wr_top_line_luma_buffer_size, (32 * \ + HFI_ALIGN(frame_height, 8))); \ + opb_wr_top_line_chroma_buffer_size = \ + opb_wr_top_line_luma_buffer_size;\ + opb_lb_wr_llb_uv_buffer_size = opb_lb_wr_llb_y_buffer_size = \ + HFI_ALIGN((HFI_ALIGN(frame_height, 8) / (4 / 2)) * 64,\ + BUFFER_ALIGNMENT_32_BYTES); \ + Size = num_vpp_pipes * 2 * (vpss_4tap_top_buffer_size + \ + vpss_div2_top_buffer_size) + \ + 2 * (vpss_4tap_left_buffer_size + \ + vpss_div2_left_buffer_size) + \ + opb_wr_top_line_luma_buffer_size + \ + opb_wr_top_line_chroma_buffer_size + \ + opb_lb_wr_llb_uv_buffer_size + \ + opb_lb_wr_llb_y_buffer_size; \ + } while (0) + +/* + * H264d internal buffer definition + */ +#define VPP_CMD_MAX_SIZE (1 << 20) +#define NUM_HW_PIC_BUF 32 +#define BIN_BUFFER_THRESHOLD (1280 * 736) +#define H264D_MAX_SLICE 1800 +#define SIZE_H264D_BUFTAB_T (256) /* sizeof(h264d_buftab_t) aligned to 256 */ +#define SIZE_H264D_HW_PIC_T (1 << 11) /* sizeof(h264d_hw_pic_t) 32 aligned */ +#define SIZE_H264D_BSE_CMD_PER_BUF (32 * 4) +#define SIZE_H264D_VPP_CMD_PER_BUF (512) + +/* Line Buffer definitions */ +/* one for luma and 1/2 for each chroma */ +#define SIZE_H264D_LB_FE_TOP_DATA(frame_width, frame_height) \ + (MAX_FE_NBR_DATA_LUMA_LINE_BUFFER_SIZE * HFI_ALIGN(frame_width, 16) * 3) + +#define SIZE_H264D_LB_FE_TOP_CTRL(frame_width, frame_height) \ + (MAX_FE_NBR_CTRL_LCU64_LINE_BUFFER_SIZE * ((frame_width + 15) >> 4)) + +#define SIZE_H264D_LB_FE_LEFT_CTRL(frame_width, frame_height) \ + (MAX_FE_NBR_CTRL_LCU64_LINE_BUFFER_SIZE * ((frame_height + 15) >> 4)) + +#define SIZE_H264D_LB_SE_TOP_CTRL(frame_width, frame_height) \ + (MAX_SE_NBR_CTRL_LCU64_LINE_BUFFER_SIZE * ((frame_width + 15) >> 4)) + +#define SIZE_H264D_LB_SE_LEFT_CTRL(frame_width, frame_height) \ + (MAX_SE_NBR_CTRL_LCU64_LINE_BUFFER_SIZE * ((frame_height + 15) >> 4)) + +#define SIZE_H264D_LB_PE_TOP_DATA(frame_width, frame_height) \ + (MAX_PE_NBR_DATA_LCU64_LINE_BUFFER_SIZE * ((frame_width + 15) >> 4)) + +#define SIZE_H264D_LB_VSP_TOP(frame_width, frame_height) \ + ((((frame_width + 15) >> 4) << 7)) + +#define SIZE_H264D_LB_RECON_DMA_METADATA_WR(frame_width, frame_height) \ + (HFI_ALIGN(frame_height, 16) * 32) + +#define SIZE_H264D_QP(frame_width, frame_height) \ + (((frame_width + 63) >> 6) * ((frame_height + 63) >> 6) * 128) + +#define SIZE_HW_PIC(size_per_buf) \ + (NUM_HW_PIC_BUF * size_per_buf) + +#define SIZE_H264D_BSE_CMD_BUF(_size, frame_width, frame_height) \ + do \ + { /* this could change alignment */ \ + UInt32 height = HFI_ALIGN(frame_height, \ + BUFFER_ALIGNMENT_32_BYTES); \ + _size = MIN((((height + 15) >> 4) * 3 * 4), H264D_MAX_SLICE) *\ + SIZE_H264D_BSE_CMD_PER_BUF; \ + } while (0) + +#define SIZE_H264D_VPP_CMD_BUF(_size, frame_width, frame_height) \ + do \ + { /* this could change alignment */ \ + UInt32 height = HFI_ALIGN(frame_height, \ + BUFFER_ALIGNMENT_32_BYTES); \ + _size = MIN((((height + 15) >> 4) * 3 * 4), H264D_MAX_SLICE) * \ + SIZE_H264D_VPP_CMD_PER_BUF; \ + if (_size > VPP_CMD_MAX_SIZE) { _size = VPP_CMD_MAX_SIZE; } \ + } while (0) + +#define HFI_BUFFER_COMV_H264D(coMV_size, frame_width, \ + frame_height, _yuv_bufcount_min) \ + do \ + { \ + HFI_U32 frame_width_in_mbs = ((frame_width + 15) >> 4); \ + HFI_U32 frame_height_in_mbs = ((frame_height + 15) >> 4); \ + HFI_U32 col_mv_aligned_width = (frame_width_in_mbs << 7); \ + HFI_U32 col_zero_aligned_width = (frame_width_in_mbs << 2); \ + HFI_U32 col_zero_size = 0, size_colloc = 0; \ + col_mv_aligned_width = HFI_ALIGN(col_mv_aligned_width, \ + BUFFER_ALIGNMENT_16_BYTES); \ + col_zero_aligned_width = HFI_ALIGN(col_zero_aligned_width, \ + BUFFER_ALIGNMENT_16_BYTES); \ + col_zero_size = col_zero_aligned_width * \ + ((frame_height_in_mbs + 1) >> 1); \ + col_zero_size = HFI_ALIGN(col_zero_size, \ + BUFFER_ALIGNMENT_64_BYTES); \ + col_zero_size <<= 1; \ + col_zero_size = HFI_ALIGN(col_zero_size, \ + BUFFER_ALIGNMENT_512_BYTES); \ + size_colloc = col_mv_aligned_width * ((frame_height_in_mbs + \ + 1) >> 1); \ + size_colloc = HFI_ALIGN(size_colloc, \ + BUFFER_ALIGNMENT_64_BYTES); \ + size_colloc <<= 1; \ + size_colloc = HFI_ALIGN(size_colloc, \ + BUFFER_ALIGNMENT_512_BYTES); \ + size_colloc += (col_zero_size + SIZE_H264D_BUFTAB_T * 2); \ + coMV_size = size_colloc * (_yuv_bufcount_min); \ + coMV_size += BUFFER_ALIGNMENT_512_BYTES; \ + } while (0) + +#define HFI_BUFFER_NON_COMV_H264D(_size, frame_width, frame_height, \ + num_vpp_pipes) \ + do \ + { \ + HFI_U32 _size_bse, _size_vpp; \ + SIZE_H264D_BSE_CMD_BUF(_size_bse, frame_width, frame_height); \ + SIZE_H264D_VPP_CMD_BUF(_size_vpp, frame_width, frame_height); \ + _size = HFI_ALIGN(_size_bse, VENUS_DMA_ALIGNMENT) + \ + HFI_ALIGN(_size_vpp, VENUS_DMA_ALIGNMENT) + \ + HFI_ALIGN(SIZE_HW_PIC(SIZE_H264D_HW_PIC_T), \ + VENUS_DMA_ALIGNMENT)+ HFI_ALIGN(SIZE_H264D_QP\ + (frame_width, frame_height), VENUS_DMA_ALIGNMENT); \ + _size = HFI_ALIGN(_size, VENUS_DMA_ALIGNMENT); \ + } while (0) + +/* + * _yuv_bufcount_min = MAX(Min YUV Buffer count, + * (HFI_PROPERTY_PARAM_VDEC_VPP_DELAY + 1)) + */ +#define HFI_BUFFER_LINE_H264D(_size, frame_width, frame_height, \ + _yuv_bufcount_min, is_opb, num_vpp_pipes) \ + do \ + { \ + HFI_U32 vpss_lb_size = 0; \ + _size = HFI_ALIGN(SIZE_H264D_LB_FE_TOP_DATA(frame_width, \ + frame_height), VENUS_DMA_ALIGNMENT) + \ + HFI_ALIGN(SIZE_H264D_LB_FE_TOP_CTRL(frame_width, \ + frame_height), VENUS_DMA_ALIGNMENT) + \ + HFI_ALIGN(SIZE_H264D_LB_FE_LEFT_CTRL(frame_width, \ + frame_height), VENUS_DMA_ALIGNMENT) * num_vpp_pipes + \ + HFI_ALIGN(SIZE_H264D_LB_SE_TOP_CTRL(frame_width, \ + frame_height), VENUS_DMA_ALIGNMENT) + \ + HFI_ALIGN(SIZE_H264D_LB_SE_LEFT_CTRL(frame_width, \ + frame_height), VENUS_DMA_ALIGNMENT) * \ + num_vpp_pipes + \ + HFI_ALIGN(SIZE_H264D_LB_PE_TOP_DATA(frame_width, \ + frame_height), VENUS_DMA_ALIGNMENT) + \ + HFI_ALIGN(SIZE_H264D_LB_VSP_TOP(frame_width, \ + frame_height), VENUS_DMA_ALIGNMENT) + \ + HFI_ALIGN(SIZE_H264D_LB_RECON_DMA_METADATA_WR\ + (frame_width, frame_height), \ + VENUS_DMA_ALIGNMENT) * 2; \ + _size = HFI_ALIGN(_size, VENUS_DMA_ALIGNMENT); \ + if (is_opb) \ + { \ + SIZE_VPSS_LB(vpss_lb_size, frame_width, frame_height, \ + num_vpp_pipes); \ + } \ + _size = HFI_ALIGN((_size + vpss_lb_size), \ + VENUS_DMA_ALIGNMENT); \ + } while (0) + +#define H264_CABAC_HDR_RATIO_HD_TOT 1 +#define H264_CABAC_RES_RATIO_HD_TOT 3 +/* + * some content need more bin buffer, + * but limit buffer size for high resolution + */ +#define SIZE_H264D_HW_BIN_BUFFER(_size, frame_width, frame_height, \ + delay, num_vpp_pipes) \ + do \ + { \ + HFI_U32 size_yuv, size_bin_hdr, size_bin_res; \ + size_yuv = ((frame_width * frame_height) <= \ + BIN_BUFFER_THRESHOLD) ?\ + ((BIN_BUFFER_THRESHOLD * 3) >> 1) : \ + ((frame_width * frame_height * 3) >> 1); \ + size_bin_hdr = size_yuv * H264_CABAC_HDR_RATIO_HD_TOT; \ + size_bin_res = size_yuv * H264_CABAC_RES_RATIO_HD_TOT; \ + size_bin_hdr = size_bin_hdr * (((((HFI_U32)(delay)) & 31) /\ + 10) + 2) / 2; \ + size_bin_res = size_bin_res * (((((HFI_U32)(delay)) & 31) /\ + 10) + 2) / 2; \ + size_bin_hdr = HFI_ALIGN(size_bin_hdr / num_vpp_pipes,\ + VENUS_DMA_ALIGNMENT) * num_vpp_pipes; \ + size_bin_res = HFI_ALIGN(size_bin_res / num_vpp_pipes, \ + VENUS_DMA_ALIGNMENT) * num_vpp_pipes; \ + _size = size_bin_hdr + size_bin_res; \ + } while (0) + +#define HFI_BUFFER_BIN_H264D(_size, frame_width, frame_height, is_interlaced, \ + delay, num_vpp_pipes) \ + do \ + { \ + HFI_U32 n_aligned_w = HFI_ALIGN(frame_width, \ + BUFFER_ALIGNMENT_16_BYTES);\ + HFI_U32 n_aligned_h = HFI_ALIGN(frame_height, \ + BUFFER_ALIGNMENT_16_BYTES); \ + if (!is_interlaced) \ + { \ + SIZE_H264D_HW_BIN_BUFFER(_size, n_aligned_w, \ + n_aligned_h, delay, num_vpp_pipes); \ + } \ + else \ + { \ + _size = 0; \ + } \ + } while (0) + +#define NUM_SLIST_BUF_H264 (256 + 32) +#define SIZE_SLIST_BUF_H264 (512) +#define SIZE_SEI_USERDATA (4096) +#define HFI_BUFFER_PERSIST_H264D(_size) \ + _size = HFI_ALIGN((SIZE_SLIST_BUF_H264 * NUM_SLIST_BUF_H264 + \ + NUM_HW_PIC_BUF * SIZE_SEI_USERDATA), VENUS_DMA_ALIGNMENT) + +/* + * H265d internal buffer definition + */ +#define LCU_MAX_SIZE_PELS 64 +#define LCU_MIN_SIZE_PELS 16 + +#define H265D_MAX_SLICE 1200 +#define SIZE_H265D_HW_PIC_T SIZE_H264D_HW_PIC_T +#define SIZE_H265D_BSE_CMD_PER_BUF (16 * sizeof(HFI_U32)) +#define SIZE_H265D_VPP_CMD_PER_BUF (256) + +#define SIZE_H265D_LB_FE_TOP_DATA(frame_width, frame_height) \ + (MAX_FE_NBR_DATA_LUMA_LINE_BUFFER_SIZE * \ + (HFI_ALIGN(frame_width, 64) + 8) * 2) + +#define SIZE_H265D_LB_FE_TOP_CTRL(frame_width, frame_height) \ + (MAX_FE_NBR_CTRL_LCU64_LINE_BUFFER_SIZE * \ + (HFI_ALIGN(frame_width, LCU_MAX_SIZE_PELS) / LCU_MIN_SIZE_PELS)) + +#define SIZE_H265D_LB_FE_LEFT_CTRL(frame_width, frame_height) \ + (MAX_FE_NBR_CTRL_LCU64_LINE_BUFFER_SIZE * \ + (HFI_ALIGN(frame_height, LCU_MAX_SIZE_PELS) / LCU_MIN_SIZE_PELS)) + +#define SIZE_H265D_LB_SE_TOP_CTRL(frame_width, frame_height) \ + ((LCU_MAX_SIZE_PELS / 8 * (128 / 8)) * ((frame_width + 15) >> 4)) + +#define SIZE_H265D_LB_SE_LEFT_CTRL(frame_width, frame_height) \ + (MAX(((frame_height + 16 - 1) / 8) * \ + MAX_SE_NBR_CTRL_LCU16_LINE_BUFFER_SIZE, \ + MAX(((frame_height + 32 - 1) / 8) * \ + MAX_SE_NBR_CTRL_LCU32_LINE_BUFFER_SIZE, \ + ((frame_height + 64 - 1) / 8) * \ + MAX_SE_NBR_CTRL_LCU64_LINE_BUFFER_SIZE))) + +#define SIZE_H265D_LB_PE_TOP_DATA(frame_width, frame_height) \ + (MAX_PE_NBR_DATA_LCU64_LINE_BUFFER_SIZE * (HFI_ALIGN(frame_width, \ + LCU_MIN_SIZE_PELS) / LCU_MIN_SIZE_PELS)) + +#define SIZE_H265D_LB_VSP_TOP(frame_width, frame_height) \ + (((frame_width + 63) >> 6) * 128) + +#define SIZE_H265D_LB_VSP_LEFT(frame_width, frame_height) \ + (((frame_height + 63) >> 6) * 128) + +#define SIZE_H265D_LB_RECON_DMA_METADATA_WR(frame_width, frame_height) \ + SIZE_H264D_LB_RECON_DMA_METADATA_WR(frame_width, frame_height) + +#define SIZE_H265D_QP(frame_width, frame_height) \ + SIZE_H264D_QP(frame_width, frame_height) + +#define SIZE_H265D_BSE_CMD_BUF(_size, frame_width, frame_height)\ + do \ + { \ + _size = HFI_ALIGN(((HFI_ALIGN(frame_width, \ + LCU_MAX_SIZE_PELS) / LCU_MIN_SIZE_PELS) * \ + (HFI_ALIGN(frame_height, LCU_MAX_SIZE_PELS) /\ + LCU_MIN_SIZE_PELS)) * NUM_HW_PIC_BUF, VENUS_DMA_ALIGNMENT); \ + _size = MIN(_size, H265D_MAX_SLICE + 1); \ + _size = 2 * _size * SIZE_H265D_BSE_CMD_PER_BUF; \ + } while (0) + +#define SIZE_H265D_VPP_CMD_BUF(_size, frame_width, frame_height) \ + do \ + { \ + _size = HFI_ALIGN(((HFI_ALIGN(frame_width, LCU_MAX_SIZE_PELS) /\ + LCU_MIN_SIZE_PELS) * (HFI_ALIGN(frame_height, \ + LCU_MAX_SIZE_PELS) / LCU_MIN_SIZE_PELS)) * \ + NUM_HW_PIC_BUF, VENUS_DMA_ALIGNMENT); \ + _size = MIN(_size, H265D_MAX_SLICE + 1); \ + _size = HFI_ALIGN(_size, 4); \ + _size = 2 * _size * SIZE_H265D_VPP_CMD_PER_BUF; \ + if (_size > VPP_CMD_MAX_SIZE) \ + { \ + _size = VPP_CMD_MAX_SIZE; \ + } \ + } while (0) + +#define HFI_BUFFER_COMV_H265D(_size, frame_width, frame_height, \ + _yuv_bufcount_min) \ + do \ + { \ + _size = HFI_ALIGN(((((frame_width + 15) >> 4) * \ + ((frame_height + 15) >> 4)) << 8), \ + BUFFER_ALIGNMENT_512_BYTES); \ + _size *= _yuv_bufcount_min; \ + _size += BUFFER_ALIGNMENT_512_BYTES; \ + } while (0) + +/* c2 divide this into NON_COMV and LINE */ +#define HFI_BUFFER_NON_COMV_H265D(_size, frame_width, frame_height, \ + num_vpp_pipes) \ + do \ + { \ + HFI_U32 _size_bse, _size_vpp; \ + SIZE_H265D_BSE_CMD_BUF(_size_bse, frame_width, \ + frame_height); \ + SIZE_H265D_VPP_CMD_BUF(_size_vpp, frame_width, \ + frame_height); \ + _size = HFI_ALIGN(_size_bse, VENUS_DMA_ALIGNMENT) + \ + HFI_ALIGN(_size_vpp, VENUS_DMA_ALIGNMENT) + \ + HFI_ALIGN(NUM_HW_PIC_BUF * 20 * 22 * 4, \ + VENUS_DMA_ALIGNMENT) + \ + HFI_ALIGN(2 * sizeof(HFI_U16) * \ + (HFI_ALIGN(frame_width, LCU_MAX_SIZE_PELS) / \ + LCU_MIN_SIZE_PELS) * (HFI_ALIGN(frame_height, \ + LCU_MAX_SIZE_PELS) / LCU_MIN_SIZE_PELS), \ + VENUS_DMA_ALIGNMENT) + \ + HFI_ALIGN(SIZE_HW_PIC(SIZE_H265D_HW_PIC_T), \ + VENUS_DMA_ALIGNMENT)\ + + HDR10_HIST_EXTRADATA_SIZE; \ + _size = HFI_ALIGN(_size, VENUS_DMA_ALIGNMENT); \ + } while (0) + +#define HFI_BUFFER_LINE_H265D(_size, frame_width, frame_height, \ + is_opb, num_vpp_pipes) \ + do \ + { \ + HFI_U32 vpssLB_size = 0; \ + _size = HFI_ALIGN(SIZE_H265D_LB_FE_TOP_DATA(frame_width, \ + frame_height), VENUS_DMA_ALIGNMENT) + \ + HFI_ALIGN(SIZE_H265D_LB_FE_TOP_CTRL(frame_width, \ + frame_height), VENUS_DMA_ALIGNMENT) + \ + HFI_ALIGN(SIZE_H265D_LB_FE_LEFT_CTRL(frame_width, \ + frame_height), VENUS_DMA_ALIGNMENT) * num_vpp_pipes + \ + HFI_ALIGN(SIZE_H265D_LB_SE_LEFT_CTRL(frame_width, \ + frame_height), VENUS_DMA_ALIGNMENT) * num_vpp_pipes + \ + HFI_ALIGN(SIZE_H265D_LB_SE_TOP_CTRL(frame_width, \ + frame_height), VENUS_DMA_ALIGNMENT) + \ + HFI_ALIGN(SIZE_H265D_LB_PE_TOP_DATA(frame_width, \ + frame_height), VENUS_DMA_ALIGNMENT) + \ + HFI_ALIGN(SIZE_H265D_LB_VSP_TOP(frame_width, \ + frame_height), VENUS_DMA_ALIGNMENT) + \ + HFI_ALIGN(SIZE_H265D_LB_VSP_LEFT(frame_width, \ + frame_height), VENUS_DMA_ALIGNMENT) * num_vpp_pipes + \ + HFI_ALIGN(SIZE_H265D_LB_RECON_DMA_METADATA_WR\ + (frame_width, frame_height), \ + VENUS_DMA_ALIGNMENT) * 4 + \ + HFI_ALIGN(SIZE_H265D_QP(frame_width, frame_height),\ + VENUS_DMA_ALIGNMENT); \ + if (is_opb) \ + { \ + SIZE_VPSS_LB(vpss_lb_size, frame_width, frame_height,\ + num_vpp_pipes); \ + } \ + _size = HFI_ALIGN((_size + vpss_lb_size), \ + VENUS_DMA_ALIGNMENT); \ + } while (0) + +#define H265_CABAC_HDR_RATIO_HD_TOT 2 +#define H265_CABAC_RES_RATIO_HD_TOT 2 +/* + * some content need more bin buffer, + * but limit buffer size for high resolution + */ +#define SIZE_H265D_HW_BIN_BUFFER(_size, frame_width, frame_height, \ + delay, num_vpp_pipes) \ + do \ + { \ + HFI_U32 size_yuv, size_bin_hdr, size_bin_res; \ + size_yuv = ((frame_width * frame_height) <= \ + BIN_BUFFER_THRESHOLD) ? \ + ((BIN_BUFFER_THRESHOLD * 3) >> 1) : \ + ((frame_width * frame_height * 3) >> 1); \ + size_bin_hdr = size_yuv * H265_CABAC_HDR_RATIO_HD_TOT; \ + size_bin_res = size_yuv * H265_CABAC_RES_RATIO_HD_TOT; \ + size_bin_hdr = size_bin_hdr * \ + (((((HFI_U32)(delay)) & 31) / 10) + 2) / 2; \ + size_bin_res = size_bin_res * \ + (((((HFI_U32)(delay)) & 31) / 10) + 2) / 2; \ + size_bin_hdr = HFI_ALIGN(size_bin_hdr / \ + num_vpp_pipes, VENUS_DMA_ALIGNMENT) * \ + num_vpp_pipes; \ + size_bin_res = HFI_ALIGN(size_bin_res / num_vpp_pipes,\ + VENUS_DMA_ALIGNMENT) * num_vpp_pipes; \ + _size = size_bin_hdr + size_bin_res; \ + } while (0) + +#define HFI_BUFFER_BIN_H265D(_size, frame_width, frame_height, \ + is_interlaced, delay, num_vpp_pipes) \ + do \ + { \ + HFI_U32 n_aligned_w = HFI_ALIGN(frame_width, \ + BUFFER_ALIGNMENT_16_BYTES); \ + HFI_U32 n_aligned_h = HFI_ALIGN(frame_height, \ + BUFFER_ALIGNMENT_16_BYTES); \ + if (!is_interlaced) \ + { \ + SIZE_H265D_HW_BIN_BUFFER(_size, n_aligned_w, \ + n_aligned_h, delay, num_vpp_pipes); \ + } \ + else \ + { \ + _size = 0; \ + } \ + } while (0) + +#define SIZE_SLIST_BUF_H265 (1 << 10) +#define NUM_SLIST_BUF_H265 (80 + 20) +#define H265_NUM_TILE_COL 32 +#define H265_NUM_TILE_ROW 128 +#define H265_NUM_TILE (H265_NUM_TILE_ROW * H265_NUM_TILE_COL + 1) +#define HFI_BUFFER_PERSIST_H265D(_size) \ + _size = HFI_ALIGN((SIZE_SLIST_BUF_H265 * NUM_SLIST_BUF_H265 + \ + H265_NUM_TILE * sizeof(Int32) + NUM_HW_PIC_BUF * SIZE_SEI_USERDATA),\ + VENUS_DMA_ALIGNMENT) + +/* + * VPxd internal buffer definition + */ +#define SIZE_VPXD_LB_FE_LEFT_CTRL(frame_width, frame_height) \ + MAX(((frame_height + 15) >> 4) * \ + MAX_FE_NBR_CTRL_LCU16_LINE_BUFFER_SIZE, \ + MAX(((frame_height + 31) >> 5) * \ + MAX_FE_NBR_CTRL_LCU32_LINE_BUFFER_SIZE, \ + ((frame_height + 63) >> 6) * MAX_FE_NBR_CTRL_LCU64_LINE_BUFFER_SIZE)) +#define SIZE_VPXD_LB_FE_TOP_CTRL(frame_width, frame_height) \ + (((HFI_ALIGN(frame_width, 64) + 8) * 10 * 2)) /* + small line */ +#define SIZE_VPXD_LB_SE_TOP_CTRL(frame_width, frame_height) \ + (((frame_width + 15) >> 4) * MAX_FE_NBR_CTRL_LCU16_LINE_BUFFER_SIZE) +#define SIZE_VPXD_LB_SE_LEFT_CTRL(frame_width, frame_height) \ + MAX(((frame_height + 15) >> 4) * \ + MAX_SE_NBR_CTRL_LCU16_LINE_BUFFER_SIZE,\ + MAX(((frame_height + 31) >> 5) * \ + MAX_SE_NBR_CTRL_LCU32_LINE_BUFFER_SIZE, \ + ((frame_height + 63) >> 6) * MAX_SE_NBR_CTRL_LCU64_LINE_BUFFER_SIZE)) +#define SIZE_VPXD_LB_RECON_DMA_METADATA_WR(frame_width, frame_height) \ + HFI_ALIGN((HFI_ALIGN(frame_height, 8) / (4 / 2)) * 64,\ + BUFFER_ALIGNMENT_32_BYTES) +#define SIZE_MP2D_LB_FE_TOP_DATA(frame_width, frame_height) \ + ((HFI_ALIGN(frame_width, 16) + 8) * 10 * 2) +#define SIZE_VP9D_LB_FE_TOP_DATA(frame_width, frame_height) \ + ((HFI_ALIGN(HFI_ALIGN(frame_width, 8), 64) + 8) * 10 * 2) +#define SIZE_MP2D_LB_PE_TOP_DATA(frame_width, frame_height) \ + ((HFI_ALIGN(frame_width, 16) >> 4) * 64) +#define SIZE_VP9D_LB_PE_TOP_DATA(frame_width, frame_height) \ + ((HFI_ALIGN(HFI_ALIGN(frame_width, 8), 64) >> 6) * 176) +#define SIZE_MP2D_LB_VSP_TOP(frame_width, frame_height) \ + (((HFI_ALIGN(frame_width, 16) >> 4) * 64 / 2) + 256) +#define SIZE_VP9D_LB_VSP_TOP(frame_width, frame_height) \ + ((((HFI_ALIGN(HFI_ALIGN(frame_width, 8), 64) >> 6) * 64 * 8) + 256)) + +/* sizeof(VP9_COL_MV_BUFFER) */ +#define HFI_IRIS2_VP9D_COMV_SIZE \ + ((((8192 + 63) >> 6) * ((4320 + 63) >> 6) * 8 * 8 * 2 * 8)) + +#define HFI_IRIS2_VP9D_LB_SIZE(_size, frame_width, frame_height, num_vpp_pipes)\ + do \ + { \ + _size = HFI_ALIGN(SIZE_VPXD_LB_FE_LEFT_CTRL(frame_width, \ + frame_height),VENUS_DMA_ALIGNMENT) * num_vpp_pipes + \ + HFI_ALIGN(SIZE_VPXD_LB_SE_LEFT_CTRL(frame_width, frame_height),\ + VENUS_DMA_ALIGNMENT) * num_vpp_pipes + \ + HFI_ALIGN(SIZE_VP9D_LB_VSP_TOP(frame_width, frame_height), \ + VENUS_DMA_ALIGNMENT) + \ + HFI_ALIGN(SIZE_VPXD_LB_FE_TOP_CTRL(frame_width, frame_height), \ + VENUS_DMA_ALIGNMENT) + 2 * \ + HFI_ALIGN(SIZE_VPXD_LB_RECON_DMA_METADATA_WR \ + (frame_width, frame_height), VENUS_DMA_ALIGNMENT) + \ + HFI_ALIGN(SIZE_VPXD_LB_SE_TOP_CTRL(frame_width, frame_height), \ + VENUS_DMA_ALIGNMENT) + \ + HFI_ALIGN(SIZE_VP9D_LB_PE_TOP_DATA(frame_width, frame_height), \ + VENUS_DMA_ALIGNMENT) + \ + HFI_ALIGN(SIZE_VP9D_LB_FE_TOP_DATA(frame_width, frame_height), \ + VENUS_DMA_ALIGNMENT); \ + } while (0) + +/* _yuv_bufcount_min = MAX(Min YUV Buffer count, + * (HFI_PROPERTY_PARAM_VDEC_VPP_DELAY + 1)) + */ +#define HFI_BUFFER_LINE_VP9D(_size, frame_width, frame_height, \ + _yuv_bufcount_min, is_opb, num_vpp_pipes) \ + do \ + { \ + HFI_U32 _lb_size = 0; \ + HFI_U32 vpss_lb_size = 0; \ + HFI_IRIS2_VP9D_LB_SIZE(_lb_size, frame_width, frame_height,\ + num_vpp_pipes); \ + if (is_opb) \ + { \ + SIZE_VPSS_LB(vpss_lb_size, frame_width, frame_height, \ + num_vpp_pipes); \ + } \ + _size = _lb_size + vpss_lb_size + HDR10_HIST_EXTRADATA_SIZE; \ + } while (0) + +#define VPX_DECODER_FRAME_CONCURENCY_LVL (2) +#define VPX_DECODER_FRAME_BIN_HDR_BUDGET_RATIO 1 / 2 +#define VPX_DECODER_FRAME_BIN_RES_BUDGET_RATIO 3 / 2 + +#define HFI_BUFFER_BIN_VP9D(_size, frame_width, frame_height, \ + is_interlaced, num_vpp_pipes) \ + do \ + { \ + HFI_U32 _size_yuv = HFI_ALIGN(frame_width, \ + BUFFER_ALIGNMENT_16_BYTES) *\ + HFI_ALIGN(frame_height, BUFFER_ALIGNMENT_16_BYTES) * 3 / 2; \ + if (!is_interlaced) \ + { \ + /* binbuffer1_size + binbufer2_size */ \ + _size = HFI_ALIGN(((MAX(_size_yuv, \ + ((BIN_BUFFER_THRESHOLD * 3) >> 1)) * \ + VPX_DECODER_FRAME_BIN_HDR_BUDGET_RATIO * \ + VPX_DECODER_FRAME_CONCURENCY_LVL) / num_vpp_pipes), \ + VENUS_DMA_ALIGNMENT) + HFI_ALIGN(((MAX(_size_yuv, \ + ((BIN_BUFFER_THRESHOLD * 3) >> 1)) * \ + VPX_DECODER_FRAME_BIN_RES_BUDGET_RATIO * \ + VPX_DECODER_FRAME_CONCURENCY_LVL) / num_vpp_pipes), \ + VENUS_DMA_ALIGNMENT); \ + _size = _size * num_vpp_pipes; \ + } \ + else \ + { \ + _size = 0; \ + } \ + } while (0) + +#define VP9_NUM_FRAME_INFO_BUF 32 +#define VP9_NUM_PROBABILITY_TABLE_BUF (VP9_NUM_FRAME_INFO_BUF + 4) +#define VP9_PROB_TABLE_SIZE (3840) + +#define VP9_UDC_HEADER_BUF_SIZE (3 * 128) +#define MAX_SUPERFRAME_HEADER_LEN (34) +#define CCE_TILE_OFFSET_SIZE HFI_ALIGN(32 * 4 * 4, BUFFER_ALIGNMENT_32_BYTES) + +#define HFI_BUFFER_PERSIST_VP9D(_size) \ + _size = HFI_ALIGN(VP9_NUM_PROBABILITY_TABLE_BUF * VP9_PROB_TABLE_SIZE, \ + VENUS_DMA_ALIGNMENT) + HFI_ALIGN(HFI_IRIS2_VP9D_COMV_SIZE, \ + VENUS_DMA_ALIGNMENT) + HFI_ALIGN(MAX_SUPERFRAME_HEADER_LEN, \ + VENUS_DMA_ALIGNMENT) + HFI_ALIGN(VP9_UDC_HEADER_BUF_SIZE, \ + VENUS_DMA_ALIGNMENT) + HFI_ALIGN(VP9_NUM_FRAME_INFO_BUF * \ + CCE_TILE_OFFSET_SIZE, VENUS_DMA_ALIGNMENT) + +/* + * MP2d internal buffer definition + */ +#define HFI_BUFFER_LINE_MP2D(_size, frame_width, frame_height, \ +_yuv_bufcount_min, is_opb, num_vpp_pipes) \ + do \ + { \ + HFI_U32 vpss_lb_size = 0; \ + _size = HFI_ALIGN(SIZE_VPXD_LB_FE_LEFT_CTRL(frame_width, \ + frame_height), VENUS_DMA_ALIGNMENT) * num_vpp_pipes + \ + HFI_ALIGN(SIZE_VPXD_LB_SE_LEFT_CTRL(frame_width, frame_height),\ + VENUS_DMA_ALIGNMENT) * num_vpp_pipes + \ + HFI_ALIGN(SIZE_MP2D_LB_VSP_TOP(frame_width, frame_height),\ + VENUS_DMA_ALIGNMENT) + HFI_ALIGN(SIZE_VPXD_LB_FE_TOP_CTRL\ + (frame_width, frame_height), VENUS_DMA_ALIGNMENT) + \ + 2 * HFI_ALIGN(SIZE_VPXD_LB_RECON_DMA_METADATA_WR(frame_width,\ + frame_height), VENUS_DMA_ALIGNMENT) + \ + HFI_ALIGN(SIZE_VPXD_LB_SE_TOP_CTRL(frame_width, frame_height),\ + VENUS_DMA_ALIGNMENT) + \ + HFI_ALIGN(SIZE_MP2D_LB_PE_TOP_DATA(frame_width, frame_height), \ + VENUS_DMA_ALIGNMENT) + \ + HFI_ALIGN(SIZE_MP2D_LB_FE_TOP_DATA(frame_width, frame_height), \ + VENUS_DMA_ALIGNMENT); \ + if (is_opb) \ + { \ + SIZE_VPSS_LB(vpss_lb_size, frame_width, frame_height, \ + num_vpp_pipes); \ + } \ + _size += vpss_lb_size; \ + } while (0) + +#define HFI_BUFFER_BIN_MP2D(_size, frame_width, frame_height, is_interlaced) 0 + +#define QMATRIX_SIZE (sizeof(HFI_U32) * 128 + 256) +#define MP2D_QPDUMP_SIZE 115200 +#define HFI_BUFFER_PERSIST_MP2D(_size) \ + _size = QMATRIX_SIZE + MP2D_QPDUMP_SIZE; + +/* Begin of IRIS2 Encoder */ + +/* + * Encoder Output Bitstream Buffer definition + * To match with driver Calculation, + * the output bitstream = YUV/4 for larger than 4K size. + */ +#define HFI_BUFFER_BITSTREAM_ENC(size, frame_width, frame_height, \ + rc_type, is_ten_bit) \ + do \ + { \ + HFI_U32 aligned_width, aligned_height, bitstream_size; \ + aligned_width = HFI_ALIGN(frame_width, 32); \ + aligned_height = HFI_ALIGN(frame_height, 32); \ + bitstream_size = aligned_width * aligned_height * 3; \ + if (aligned_width * aligned_height > (4096 * 2176)) \ + { \ + bitstream_size = (bitstream_size >> 3); \ + } \ + else if (bitstream_size > (1280 * 720)) \ + { \ + bitstream_size = (bitstream_size >> 2); \ + } \ + else \ + { \ + bitstream_size = (bitstream_size << 1);\ + } \ + if ((rc_type == HFI_RC_CQ) || (rc_type == HFI_RC_OFF)) \ + { \ + bitstream_size = (bitstream_size << 1);\ + } \ + if (is_ten_bit) \ + { \ + bitstream_size = (bitstream_size) + \ + (bitstream_size >> 2); \ + } \ + size = HFI_ALIGN(bitstream_size, HFI_ALIGNMENT_4096); \ + } while (0) + +#define SIZE_ROI_METADATA_ENC(size_roi, frame_width, frame_height, lcu_size)\ + do \ + { \ + HFI_U32 width_in_lcus = 0, height_in_lcus = 0, n_shift = 0; \ + while (lcu_size && !(lcu_size & 0x1)) \ + { \ + n_shift++; \ + lcu_size = lcu_size >> 1; \ + } \ + width_in_lcus = (frame_width + (lcu_size - 1)) >> n_shift; \ + height_in_lcus = (frame_height + (lcu_size - 1)) >> n_shift; \ + size_roi = (((width_in_lcus + 7) >> 3) << 3) * \ + height_in_lcus * 2 + 256; \ + } while (0) + +/* + * Encoder Input Extradata Buffer definition + */ +#define HFI_BUFFER_INPUT_METADATA_ENC(size, frame_width, frame_height, \ + is_roi_enabled, lcu_size) \ + do \ + { \ + HFI_U32 roi_size = 0; \ + if (is_roi_enabled) \ + { \ + SIZE_ROI_METADATA_ENC(roi_size, frame_width, \ + frame_height, lcu_size); \ + } \ + size = roi_size + 16384; \ + size = HFI_ALIGN(size, HFI_ALIGNMENT_4096); \ + } while (0) + +#define HFI_BUFFER_INPUT_METADATA_H264E(size_metadata, frame_width, \ + frame_height, is_roi_enabled) \ + do \ + { \ + HFI_BUFFER_INPUT_METADATA_ENC(size_metadata, frame_width, \ + frame_height, is_roi_enabled, 16); \ + }while (0) + +#define HFI_BUFFER_INPUT_METADATA_H265E(size_metadata, frame_width, \ + frame_height, is_roi_enabled) \ + do \ + { \ + HFI_BUFFER_INPUT_METADATA_ENC(size_metadata, frame_width, \ + frame_height, is_roi_enabled, 32); \ + } while (0) + +#define HFI_BUFFER_ARP_ENC(size) \ + do \ + { \ + size = 204800; \ + } while (0) + +/* + * Encoder Scratch Buffer definition + */ +#define HFI_MAX_COL_FRAME 6 +#define HFI_VENUS_VENC_TRE_WB_BUFF_SIZE (65 << 4) // bytes +#define HFI_VENUS_VENC_DB_LINE_BUFF_PER_MB 512 +#define HFI_VENUS_VPPSG_MAX_REGISTERS 2048 +#define HFI_VENUS_WIDTH_ALIGNMENT 128 +#define HFI_VENUS_WIDTH_TEN_BIT_ALIGNMENT 192 +#define HFI_VENUS_HEIGHT_ALIGNMENT 32 +#define VENUS_METADATA_STRIDE_MULTIPLE 64 +#define VENUS_METADATA_HEIGHT_MULTIPLE 16 + +#ifndef SYSTEM_LAL_TILE10 +#define SYSTEM_LAL_TILE10 192 +#endif + +/* + * Host uses following macro to calculate num_ref for encoder + * Here: _total_hp_layers = HFI_PROPERTY_PARAM_VENC_HIER_P_MAX_NUM_ENH_LAYER + 1 + * Here: _total_hb_layers = HFI_PROPERTY_PARAM_VENC_HIER_B_MAX_NUM_ENH_LAYER + 1 + */ +#define HFI_IRIS2_ENC_RECON_BUF_COUNT(num_ref, n_bframe, ltr_count, \ + _total_hp_layers, _total_hb_layers, hybrid_hp, codec_standard) \ + do \ + { \ + num_ref = 1; \ + if (n_bframe) \ + num_ref = n_bframe + 1; \ + if (ltr_count) \ + /* B and LTR can't be at same time */\ + num_ref = num_ref + ltr_count; \ + if (_total_hp_layers) \ + { \ + if (hybrid_hp) \ + /* LTR and B-frame not supported with hybrid HP */\ + num_ref = (_total_hp_layers - 1); \ + if (codec_standard == HFI_VIDEO_CODEC_HEVC) \ + num_ref = (_total_hp_layers + 1) / 2 + \ + ltr_count; \ + else if (codec_standard == HFI_VIDEO_CODEC_H264 && \ + _total_hp_layers <= 4) \ + num_ref = (2 ^ (_total_hp_layers - 1)) - 1 + \ + ltr_count; \ + else \ + /* AVC normal HP and TotalHPLayer>4.*/ \ + /* This is NPOR. uses MMCO. */ \ + num_ref = (_total_hp_layers + 1) / 2 + \ + ltr_count; \ + } \ + if (_total_hb_layers >= 2) \ + { \ + num_ref = (2 ^ (_total_hb_layers - 1)) / 2 + 1; \ + } \ + } while (0) + +#define SIZE_BIN_BITSTREAM_ENC(_size, frame_width, frame_height, \ + work_mode, lcu_size) \ + do \ + { \ + HFI_U32 size_aligned_width = 0, size_aligned_height = 0; \ + HFI_U32 bitstream_size_eval = 0; \ + size_aligned_width = HFI_ALIGN((frame_width), lcu_size); \ + size_aligned_height = HFI_ALIGN((frame_height), lcu_size); \ + if (work_mode == HFI_WORKMODE_2) \ + { \ + bitstream_size_eval = (((size_aligned_width) * \ + (size_aligned_height)*3 * 5) >> 2); \ + if (size_aligned_width * size_aligned_height > \ + (4096 * 2176)) \ + { \ + bitstream_size_eval = \ + (bitstream_size_eval >> 3); \ + } \ + else if (bitstream_size_eval > (352 * 288 * 4)) \ + { \ + bitstream_size_eval = \ + (bitstream_size_eval >> 2); \ + } \ + } \ + else \ + { \ + bitstream_size_eval = size_aligned_width * \ + size_aligned_height * 3; \ + } \ + _size = HFI_ALIGN(bitstream_size_eval, VENUS_DMA_ALIGNMENT); \ + } while (0) + +#define SIZE_ENC_SINGLE_PIPE(size, bitbin_size, num_vpp_pipes, \ + frame_height, frame_width) \ + do \ + { \ + HFI_U32 size_single_pipe_eval = 0, sao_bin_buffer_size = 0, \ + _padded_bin_sz = 0; \ + if (num_vpp_pipes > 2) \ + { \ + size_single_pipe_eval = bitbin_size / 2; \ + } \ + else \ + { \ + size_single_pipe_eval = bitbin_size; \ + } \ + size_single_pipe_eval = HFI_ALIGN(size_single_pipe_eval, \ + VENUS_DMA_ALIGNMENT); \ + sao_bin_buffer_size = (64 * ((((frame_width) + \ + BUFFER_ALIGNMENT_32_BYTES) * ((frame_height) +\ + BUFFER_ALIGNMENT_32_BYTES)) >> 10)) + 384; \ + _padded_bin_sz = HFI_ALIGN(size_single_pipe_eval, \ + VENUS_DMA_ALIGNMENT);\ + size_single_pipe_eval = sao_bin_buffer_size + _padded_bin_sz; \ + size_single_pipe_eval = HFI_ALIGN(size_single_pipe_eval, \ + VENUS_DMA_ALIGNMENT); \ + size = size_single_pipe_eval; \ + } while (0) + +#define HFI_BUFFER_BIN_ENC(_size, frame_width, frame_height, lcu_size, \ + work_mode, num_vpp_pipes) \ + do \ + { \ + HFI_U32 bitstream_size = 0, total_bitbin_buffers = 0, \ + size_single_pipe = 0, bitbin_size = 0; \ + HFI_U32 sao_bin_buffer_size = 0, _padded_bin_sz = 0; \ + SIZE_BIN_BITSTREAM_ENC(bitstream_size, frame_width, \ + frame_height, work_mode, lcu_size); \ + if (work_mode == HFI_WORKMODE_2) \ + { \ + total_bitbin_buffers = 3; \ + bitbin_size = bitstream_size * 17 / 10; \ + bitbin_size = HFI_ALIGN(bitbin_size, \ + VENUS_DMA_ALIGNMENT); \ + } \ + else \ + { \ + total_bitbin_buffers = 1; \ + bitbin_size = bitstream_size; \ + } \ + SIZE_ENC_SINGLE_PIPE(size_single_pipe, bitbin_size, \ + num_vpp_pipes, frame_height, frame_width); \ + bitbin_size = size_single_pipe * num_vpp_pipes; \ + _size = HFI_ALIGN(bitbin_size, VENUS_DMA_ALIGNMENT) * \ + total_bitbin_buffers + 512; \ + } while (0) + +#define HFI_BUFFER_BIN_H264E(_size, frame_width, frame_height, \ + work_mode, num_vpp_pipes) \ + do \ + { \ + HFI_BUFFER_BIN_ENC(_size, frame_width, frame_height, 16, \ + work_mode, num_vpp_pipes); \ + } while (0) + +#define HFI_BUFFER_BIN_H265E(_size, frame_width, frame_height, \ + work_mode, num_vpp_pipes) \ + do \ + { \ + HFI_BUFFER_BIN_ENC(_size, frame_width, frame_height, 32,\ + work_mode, num_vpp_pipes); \ + } while (0) + +#define SIZE_ENC_SLICE_INFO_BUF(num_lcu_in_frame) HFI_ALIGN((256 + \ + (num_lcu_in_frame << 4)), VENUS_DMA_ALIGNMENT) +#define SIZE_LINE_BUF_CTRL(frame_width_coded) \ + HFI_ALIGN(frame_width_coded, VENUS_DMA_ALIGNMENT) +#define SIZE_LINE_BUF_CTRL_ID2(frame_width_coded) \ + HFI_ALIGN(frame_width_coded, VENUS_DMA_ALIGNMENT) + +#define SIZE_LINEBUFF_DATA(_size, is_ten_bit, frame_width_coded) \ + do \ + { \ + _size = is_ten_bit ? (((((10 * (frame_width_coded) +\ + 1024) + (VENUS_DMA_ALIGNMENT - 1)) & \ + (~(VENUS_DMA_ALIGNMENT - 1))) * 1) + \ + (((((10 * (frame_width_coded) + 1024) >> 1) + \ + (VENUS_DMA_ALIGNMENT - 1)) & (~(VENUS_DMA_ALIGNMENT - 1))) * \ + 2)) : (((((8 * (frame_width_coded) + 1024) + \ + (VENUS_DMA_ALIGNMENT - 1)) \ + & (~(VENUS_DMA_ALIGNMENT - 1))) * 1) + \ + (((((8 * (frame_width_coded) +\ + 1024) >> 1) + (VENUS_DMA_ALIGNMENT - 1)) & \ + (~(VENUS_DMA_ALIGNMENT - 1))) * 2)); \ + } while (0) + +#define SIZE_LEFT_LINEBUFF_CTRL(_size, standard, frame_height_coded, \ + num_vpp_pipes_enc) \ + do \ + { \ + _size = (standard == HFI_VIDEO_CODEC_HEVC) ? \ + (((frame_height_coded) + \ + (BUF_SIZE_ALIGN_32)) / BUF_SIZE_ALIGN_32 * 4 * 16) : \ + (((frame_height_coded) + 15) / 16 * 5 * 16); \ + if ((num_vpp_pipes_enc) > 1) \ + { \ + _size += BUFFER_ALIGNMENT_512_BYTES; \ + _size = HFI_ALIGN(_size, BUFFER_ALIGNMENT_512_BYTES) *\ + (num_vpp_pipes_enc); \ + } \ + _size = HFI_ALIGN(_size, VENUS_DMA_ALIGNMENT); \ + } while (0) + +#define SIZE_LEFT_LINEBUFF_RECON_PIX(_size, is_ten_bit, frame_height_coded, \ + num_vpp_pipes_enc) \ + do \ + { \ + _size = (((is_ten_bit + 1) * 2 * (frame_height_coded) + \ + VENUS_DMA_ALIGNMENT) + \ + (VENUS_DMA_ALIGNMENT << (num_vpp_pipes_enc - 1)) - 1) & \ + (~((VENUS_DMA_ALIGNMENT << (num_vpp_pipes_enc - 1)) - 1)) * 1; \ + } while (0) + +#define SIZE_TOP_LINEBUFF_CTRL_FE(_size, frame_width_coded, standard) \ + do \ + { \ + _size = (standard == HFI_VIDEO_CODEC_HEVC) ? (64 * \ + ((frame_width_coded) >> 5)) : (VENUS_DMA_ALIGNMENT + 16 * \ + ((frame_width_coded) >> 4)); \ + _size = HFI_ALIGN(_size, VENUS_DMA_ALIGNMENT); \ + } while (0) + +#define SIZE_LEFT_LINEBUFF_CTRL_FE(frame_height_coded, num_vpp_pipes_enc) \ + ((((VENUS_DMA_ALIGNMENT + 64 * ((frame_height_coded) >> 4)) + \ + (VENUS_DMA_ALIGNMENT << (num_vpp_pipes_enc - 1)) - 1) & \ + (~((VENUS_DMA_ALIGNMENT << (num_vpp_pipes_enc - 1)) - 1)) * 1) * \ + num_vpp_pipes_enc) + +#define SIZE_LEFT_LINEBUFF_METADATA_RECON_Y(_size, frame_height_coded, \ + is_ten_bit, num_vpp_pipes_enc) \ + do \ + { \ + _size = ((VENUS_DMA_ALIGNMENT + 64 * ((frame_height_coded) / \ + (8 * (is_ten_bit ? 4 : 8))))); \ + _size = HFI_ALIGN(_size, VENUS_DMA_ALIGNMENT); \ + _size = (_size * num_vpp_pipes_enc); \ + } while (0) + +#define SIZE_LEFT_LINEBUFF_METADATA_RECON_UV(_size, frame_height_coded, \ + is_ten_bit, num_vpp_pipes_enc) \ + do \ + { \ + _size = ((VENUS_DMA_ALIGNMENT + 64 * ((frame_height_coded) / \ + (4 * (is_ten_bit ? 4 : 8))))); \ + _size = HFI_ALIGN(_size, VENUS_DMA_ALIGNMENT); \ + _size = (_size * num_vpp_pipes_enc); \ + } while (0) + +#define SIZE_LINEBUFF_RECON_PIX(_size, is_ten_bit, frame_width_coded) \ + do \ + { \ + _size = ((is_ten_bit ? 3 : 2) * (frame_width_coded)); \ + _size = HFI_ALIGN(_size, VENUS_DMA_ALIGNMENT); \ + } while (0) + +#define SIZE_SLICE_CMD_BUFFER (HFI_ALIGN(20480, VENUS_DMA_ALIGNMENT)) +#define SIZE_SPS_PPS_SLICE_HDR (2048 + 4096) + +#define SIZE_FRAME_RC_BUF_SIZE(_size, standard, frame_height_coded, \ + num_vpp_pipes_enc) \ + do \ + { \ + _size = (standard == HFI_VIDEO_CODEC_HEVC) ? (256 + 16 * \ + (14 + ((((frame_height_coded) >> 5) + 7) >> 3))) : \ + (256 + 16 * (14 + ((((frame_height_coded) >> 4) + 7) >> 3))); \ + _size *= 6; /* multiply by max numtilescol*/ \ + if (num_vpp_pipes_enc > 1) \ + { \ + _size = HFI_ALIGN(_size, VENUS_DMA_ALIGNMENT) \ + * num_vpp_pipes_enc;\ + } \ + _size = HFI_ALIGN(_size, BUFFER_ALIGNMENT_512_BYTES) * \ + HFI_MAX_COL_FRAME; \ + } while (0) + +#define ENC_BITCNT_BUF_SIZE(num_lcu_in_frame) HFI_ALIGN((256 + \ + (4 * (num_lcu_in_frame))), VENUS_DMA_ALIGNMENT) +#define ENC_BITMAP_BUF_SIZE(num_lcu_in_frame) HFI_ALIGN((256 + \ + ((num_lcu_in_frame) >> 3)), VENUS_DMA_ALIGNMENT) +#define SIZE_LINE_BUF_SDE(frame_width_coded) HFI_ALIGN((256 + \ + (16 * ((frame_width_coded) >> 4))), VENUS_DMA_ALIGNMENT) + +#define SIZE_SE_STATS_BUF(_size, frame_width_coded, frame_height_coded, \ + num_lcu_in_frame) \ + do \ + { \ + if (((frame_width_coded) * (frame_height_coded)) > \ + (4096 * 2160)) \ + { \ + _size = 0; \ + } \ + else if (((frame_width_coded) * (frame_height_coded)) > \ + (1920 * 1088)) \ + { \ + _size = (40 * 4 * num_lcu_in_frame + 256 + 256); \ + } \ + else \ + { \ + _size = (1024 * num_lcu_in_frame + 256 + 256); \ + } \ + _size = HFI_ALIGN(se_stats_buf_size, VENUS_DMA_ALIGNMENT) * 2; \ + } while (0) + +#define SIZE_BSE_SLICE_CMD_BUF ((((8192 << 2) + 7) & (~7)) * 6) +#define SIZE_BSE_REG_BUF ((((512 << 3) + 7) & (~7)) * 4) +#define SIZE_VPP_REG_BUF ((((HFI_VENUS_VPPSG_MAX_REGISTERS << 3) +\ + 31) & (~31)) * 10) +#define SIZE_LAMBDA_LUT (256 * 11) +#define SIZE_OVERRIDE_BUF(num_lcumb) (HFI_ALIGN(((16 * (((num_lcumb) + 7)\ + >> 3))), VENUS_DMA_ALIGNMENT) * 2) +#define SIZE_IR_BUF(num_lcu_in_frame) (((((num_lcu_in_frame) << 1) + 7) &\ + (~7)) * 3) + +#define SIZE_VPSS_LINE_BUF(num_vpp_pipes_enc, frame_height_coded, \ + frame_width_coded) \ + ((((((8192) >> 2) << 5) * (num_vpp_pipes_enc)) + 64) + \ + (((((MAX((frame_width_coded), (frame_height_coded)) + 3) >> 2) << 5) +\ + 256) * 16)) + +#define SIZE_TOP_LINE_BUF_FIRST_STG_SAO(frame_width_coded) \ + HFI_ALIGN((16 * ((frame_width_coded) >> 5)), VENUS_DMA_ALIGNMENT) + +#define HFI_BUFFER_LINE_ENC(_size, frame_width, frame_height, is_ten_bit, \ + num_vpp_pipes_enc, lcu_size, standard) \ + do \ + { \ + HFI_U32 width_in_lcus = 0, height_in_lcus = 0, \ + frame_width_coded = 0, frame_height_coded = 0; \ + HFI_U32 line_buff_data_size = 0, left_line_buff_ctrl_size = 0, \ + left_line_buff_recon_pix_size = 0, \ + top_line_buff_ctrl_fe_size = 0; \ + HFI_U32 left_line_buff_metadata_recon__y__size = 0, \ + left_line_buff_metadata_recon__uv__size = 0, \ + line_buff_recon_pix_size = 0; \ + width_in_lcus = ((frame_width) + (lcu_size)-1) / (lcu_size); \ + height_in_lcus = ((frame_height) + (lcu_size)-1) / (lcu_size); \ + frame_width_coded = width_in_lcus * (lcu_size); \ + frame_height_coded = height_in_lcus * (lcu_size); \ + SIZE_LINEBUFF_DATA(line_buff_data_size, is_ten_bit, \ + frame_width_coded);\ + SIZE_LEFT_LINEBUFF_CTRL(left_line_buff_ctrl_size, standard, \ + frame_height_coded, num_vpp_pipes_enc); \ + SIZE_LEFT_LINEBUFF_RECON_PIX(left_line_buff_recon_pix_size, \ + is_ten_bit, frame_height_coded, num_vpp_pipes_enc); \ + SIZE_TOP_LINEBUFF_CTRL_FE(top_line_buff_ctrl_fe_size, \ + frame_width_coded, standard); \ + SIZE_LEFT_LINEBUFF_METADATA_RECON_Y\ + (left_line_buff_metadata_recon__y__size, \ + frame_height_coded, is_ten_bit, num_vpp_pipes_enc); \ + SIZE_LEFT_LINEBUFF_METADATA_RECON_UV\ + (left_line_buff_metadata_recon__uv__size, \ + frame_height_coded, is_ten_bit, num_vpp_pipes_enc); \ + SIZE_LINEBUFF_RECON_PIX(line_buff_recon_pix_size, is_ten_bit,\ + frame_width_coded); \ + _size = SIZE_LINE_BUF_CTRL(frame_width_coded) + \ + SIZE_LINE_BUF_CTRL_ID2(frame_width_coded) + \ + line_buff_data_size + \ + left_line_buff_ctrl_size + \ + left_line_buff_recon_pix_size + \ + top_line_buff_ctrl_fe_size + \ + left_line_buff_metadata_recon__y__size + \ + left_line_buff_metadata_recon__uv__size + \ + line_buff_recon_pix_size + \ + SIZE_LEFT_LINEBUFF_CTRL_FE(frame_height_coded, \ + num_vpp_pipes_enc) + SIZE_LINE_BUF_SDE(frame_width_coded) + \ + SIZE_VPSS_LINE_BUF(num_vpp_pipes_enc, frame_height_coded, \ + frame_width_coded) + \ + SIZE_TOP_LINE_BUF_FIRST_STG_SAO(frame_width_coded); \ + } while (0) + +#define HFI_BUFFER_LINE_H264E(_size, frame_width, frame_height, is_ten_bit, \ + num_vpp_pipes) \ + do \ + { \ + HFI_BUFFER_LINE_ENC(_size, frame_width, frame_height, 0, \ + num_vpp_pipes, 16, HFI_VIDEO_CODEC_H264); \ + } while (0) + +#define HFI_BUFFER_LINE_H265E(_size, frame_width, frame_height, is_ten_bit, \ + num_vpp_pipes) \ + do \ + { \ + HFI_BUFFER_LINE_ENC(_size, frame_width, frame_height, \ + is_ten_bit, num_vpp_pipes, 32, HFI_VIDEO_CODEC_HEVC); \ + } while (0) + +#define HFI_BUFFER_COMV_ENC(_size, frame_width, frame_height, lcu_size, \ + num_ref, standard) \ + do \ + { \ + HFI_U32 size_colloc_mv = 0, size_colloc_rc = 0; \ + HFI_U32 mb_width = ((frame_width) + 15) >> 4; \ + HFI_U32 mb_height = ((frame_height) + 15) >> 4; \ + HFI_U32 width_in_lcus = ((frame_width) + (lcu_size)-1) /\ + (lcu_size); \ + HFI_U32 height_in_lcus = ((frame_height) + (lcu_size)-1) / \ + (lcu_size); \ + HFI_U32 num_lcu_in_frame = width_in_lcus * height_in_lcus; \ + size_colloc_mv = (standard == HFI_VIDEO_CODEC_HEVC) ? \ + (16 * ((num_lcu_in_frame << 2) + BUFFER_ALIGNMENT_32_BYTES)) : \ + (3 * 16 * (width_in_lcus * height_in_lcus +\ + BUFFER_ALIGNMENT_32_BYTES)); \ + size_colloc_mv = HFI_ALIGN(size_colloc_mv, \ + VENUS_DMA_ALIGNMENT) * (num_ref + 1); \ + size_colloc_rc = (((mb_width + 7) >> 3) * 16 * 2 * mb_height); \ + size_colloc_rc = HFI_ALIGN(size_colloc_rc, \ + VENUS_DMA_ALIGNMENT) * HFI_MAX_COL_FRAME; \ + _size = size_colloc_mv + size_colloc_rc; \ + } while (0) + +#define HFI_BUFFER_COMV_H264E(_size, frame_width, frame_height, num_ref) \ + do \ + { \ + HFI_BUFFER_COMV_ENC(_size, frame_width, frame_height, 16, \ + num_ref, HFI_VIDEO_CODEC_H264); \ + } while (0) + +#define HFI_BUFFER_COMV_H265E(_size, frame_width, frame_height, num_ref) \ + do \ + { \ + HFI_BUFFER_COMV_ENC(_size, frame_width, frame_height, 32,\ + num_ref, HFI_VIDEO_CODEC_HEVC); \ + } while (0) + +#define HFI_BUFFER_NON_COMV_ENC(_size, frame_width, frame_height, \ + num_vpp_pipes_enc, lcu_size, standard) \ + do \ + { \ + HFI_U32 width_in_lcus = 0, height_in_lcus = 0, \ + frame_width_coded = 0, frame_height_coded = 0, \ + num_lcu_in_frame = 0, num_lcumb = 0; \ + HFI_U32 left_line_buff_metadata_recon__y__size = 0, \ + left_line_buff_metadata_recon__uv__size = 0, \ + line_buff_recon_pix_size = 0, frame_rc_buf_size = 0, \ + se_stats_buf_size = 0; \ + width_in_lcus = ((frame_width) + (lcu_size)-1) / (lcu_size); \ + height_in_lcus = ((frame_height) + (lcu_size)-1) / (lcu_size); \ + num_lcu_in_frame = width_in_lcus * height_in_lcus; \ + frame_width_coded = width_in_lcus * (lcu_size); \ + frame_height_coded = height_in_lcus * (lcu_size); \ + num_lcumb = (frame_height_coded / lcu_size) * \ + ((frame_width_coded + lcu_size * 8) / lcu_size); \ + SIZE_FRAME_RC_BUF_SIZE(frame_rc_buf_size, standard, \ + frame_height_coded, num_vpp_pipes_enc); \ + SIZE_SE_STATS_BUF(se_stats_buf_size, frame_width_coded, \ + frame_height_coded, num_lcu_in_frame); \ + _size = SIZE_ENC_SLICE_INFO_BUF(num_lcu_in_frame) + \ + SIZE_SLICE_CMD_BUFFER + \ + SIZE_SPS_PPS_SLICE_HDR + \ + frame_rc_buf_size + \ + ENC_BITCNT_BUF_SIZE(num_lcu_in_frame) + \ + ENC_BITMAP_BUF_SIZE(num_lcu_in_frame) + \ + se_stats_buf_size + \ + SIZE_BSE_SLICE_CMD_BUF + \ + SIZE_BSE_REG_BUF + \ + SIZE_VPP_REG_BUF + \ + SIZE_LAMBDA_LUT + \ + SIZE_OVERRIDE_BUF(num_lcumb) + \ + SIZE_IR_BUF(num_lcu_in_frame); \ + } while (0) + +#define HFI_BUFFER_NON_COMV_H264E(_size, frame_width, frame_height, \ + num_vpp_pipes_enc) \ + do \ + { \ + HFI_BUFFER_NON_COMV_ENC(_size, frame_width, frame_height, \ + num_vpp_pipes_enc, 16, HFI_VIDEO_CODEC_H264); \ + } while (0) + +#define HFI_BUFFER_NON_COMV_H265E(_size, frame_width, frame_height, \ + num_vpp_pipes_enc) \ + do \ + { \ + HFI_BUFFER_NON_COMV_ENC(_size, frame_width, frame_height, \ + num_vpp_pipes_enc, 32, HFI_VIDEO_CODEC_HEVC); \ + } while (0) + +#define SIZE_ENC_REF_BUFFER(size, frame_width, frame_height) \ + do \ + { \ + HFI_U32 u_buffer_width = 0, u_buffer_height = 0, \ + u_chroma_buffer_height = 0; \ + u_buffer_height = HFI_ALIGN(frame_height, \ + HFI_VENUS_HEIGHT_ALIGNMENT); \ + u_chroma_buffer_height = frame_height >> 1; \ + u_chroma_buffer_height = HFI_ALIGN(u_chroma_buffer_height, \ + HFI_VENUS_HEIGHT_ALIGNMENT); \ + u_buffer_width = HFI_ALIGN(frame_width, \ + HFI_VENUS_WIDTH_ALIGNMENT); \ + size = (u_buffer_height + u_chroma_buffer_height) * \ + u_buffer_width; \ + } while (0) + +#define SIZE_ENC_TEN_BIT_REF_BUFFER(size, frame_width, frame_height) \ + do \ + { \ + HFI_U32 ref_buf_height = 0, ref_luma_stride_in_bytes = 0, \ + u_ref_stride = 0, luma_size = 0, ref_chrm_height_in_bytes = 0, \ + chroma_size = 0, ref_buf_size = 0; \ + ref_buf_height = (frame_height + \ + (HFI_VENUS_HEIGHT_ALIGNMENT - 1)) \ + & (~(HFI_VENUS_HEIGHT_ALIGNMENT - 1)); \ + ref_luma_stride_in_bytes = ((frame_width + \ + SYSTEM_LAL_TILE10 - 1) / SYSTEM_LAL_TILE10) * \ + SYSTEM_LAL_TILE10; \ + u_ref_stride = 4 * (ref_luma_stride_in_bytes / 3); \ + u_ref_stride = (u_ref_stride + (BUF_SIZE_ALIGN_128 - 1)) &\ + (~(BUF_SIZE_ALIGN_128 - 1)); \ + luma_size = ref_buf_height * u_ref_stride; \ + ref_chrm_height_in_bytes = (((frame_height + 1) >> 1) + \ + (BUF_SIZE_ALIGN_32 - 1)) & (~(BUF_SIZE_ALIGN_32 - 1)); \ + chroma_size = u_ref_stride * ref_chrm_height_in_bytes; \ + luma_size = (luma_size + (BUF_SIZE_ALIGN_4096 - 1)) & \ + (~(BUF_SIZE_ALIGN_4096 - 1)); \ + chroma_size = (chroma_size + (BUF_SIZE_ALIGN_4096 - 1)) & \ + (~(BUF_SIZE_ALIGN_4096 - 1)); \ + ref_buf_size = luma_size + chroma_size; \ + size = ref_buf_size; \ + } while (0) + +/* + * Encoder Scratch2 Buffer definition + */ +#define HFI_BUFFER_DPB_ENC(_size, frame_width, frame_height, is_ten_bit) \ + do \ + { \ + HFI_U32 metadata_stride, metadata_buf_height, meta_size_y, \ + meta_size_c;\ + HFI_U32 ten_bit_ref_buf_size = 0, ref_buf_size = 0; \ + if (!is_ten_bit) \ + { \ + SIZE_ENC_REF_BUFFER(ref_buf_size, frame_width, \ + frame_height); \ + HFI_UBWC_CALC_METADATA_PLANE_STRIDE(metadata_stride, \ + (frame_width),\ + 64, HFI_COLOR_FORMAT_YUV420_NV12_UBWC_Y_TILE_WIDTH); \ + HFI_UBWC_METADATA_PLANE_BUFHEIGHT(metadata_buf_height, \ + (frame_height), 16, \ + HFI_COLOR_FORMAT_YUV420_NV12_UBWC_Y_TILE_HEIGHT); \ + HFI_UBWC_METADATA_PLANE_BUFFER_SIZE(meta_size_y, \ + metadata_stride, metadata_buf_height); \ + HFI_UBWC_METADATA_PLANE_BUFFER_SIZE(meta_size_c, \ + metadata_stride, metadata_buf_height); \ + _size = ref_buf_size + meta_size_y + meta_size_c; \ + } \ + else \ + { \ + SIZE_ENC_TEN_BIT_REF_BUFFER(ten_bit_ref_buf_size, \ + frame_width, frame_height); \ + HFI_UBWC_CALC_METADATA_PLANE_STRIDE(metadata_stride, \ + frame_width, VENUS_METADATA_STRIDE_MULTIPLE, \ + HFI_COLOR_FORMAT_YUV420_TP10_UBWC_Y_TILE_WIDTH); \ + HFI_UBWC_METADATA_PLANE_BUFHEIGHT(metadata_buf_height, \ + frame_height, VENUS_METADATA_HEIGHT_MULTIPLE, \ + HFI_COLOR_FORMAT_YUV420_TP10_UBWC_Y_TILE_HEIGHT); \ + HFI_UBWC_METADATA_PLANE_BUFFER_SIZE(meta_size_y, \ + metadata_stride, metadata_buf_height); \ + HFI_UBWC_METADATA_PLANE_BUFFER_SIZE(meta_size_c, \ + metadata_stride, metadata_buf_height); \ + _size = ten_bit_ref_buf_size + meta_size_y + \ + meta_size_c; \ + } \ + } while (0) + +#define HFI_BUFFER_DPB_H264E(_size, frame_width, frame_height) \ + do \ + { \ + HFI_BUFFER_DPB_ENC(_size, frame_width, frame_height, 0); \ + } while (0) + +#define HFI_BUFFER_DPB_H265E(_size, frame_width, frame_height, is_ten_bit) \ + do \ + { \ + HFI_BUFFER_DPB_ENC(_size, frame_width, frame_height, \ + is_ten_bit); \ + } while (0) + +#define HFI_BUFFER_VPSS_ENC(vpss_size, frame_width, frame_height, ds_enable, \ + rot_enable, flip_enable, is_ten_bit) \ + do \ + { \ + HFI_U32 vpss_size = 0; \ + if (ds_enable) \ + { \ + if (rot_enable) \ + { \ + HFI_BUFFER_DPB_ENC(vpss_size, frame_height, \ + frame_width, is_ten_bit); \ + } \ + else if (flip_enable) \ + { \ + HFI_BUFFER_DPB_ENC(vpss_size, frame_width, \ + frame_height, is_ten_bit); \ + } \ + else \ + { \ + vpss_size = 0; \ + } \ + vpss_size = vpss_size; \ + } \ + else \ + { \ + vpss_size = vpss_size; \ + } \ + } while (0) + +/* End of IRIS2 */ +#endif /* __HFI_BUFFER_IRIS2__ */ From ce89227af9693a608b3d71d6b7cb1b1f679a1979 Mon Sep 17 00:00:00 2001 From: Mihir Ganu Date: Mon, 21 Dec 2020 12:12:11 -0800 Subject: [PATCH 0044/1061] video: driver: Enable encoder and decoder metadata -Add support to set metadata controls. -Adjust set/get format for metadata ports. -Add check when queuing metadata buffers. Change-Id: I73725e26106621386dcb62cbf916186b9bc43995 Signed-off-by: Mihir Ganu --- driver/platform/waipio/src/msm_vidc_waipio.c | 84 +++++++++++++++++++ driver/vidc/inc/msm_vidc_driver.h | 49 +++++++++++ driver/vidc/inc/msm_vidc_internal.h | 14 ++++ driver/vidc/src/msm_vdec.c | 68 +++++++++++---- driver/vidc/src/msm_venc.c | 68 +++++++++++---- driver/vidc/src/msm_vidc_control.c | 32 ++++++- driver/vidc/src/msm_vidc_driver.c | 7 ++ .../uapi/vidc/media/v4l2_vidc_extensions.h | 29 ++++++- 8 files changed, 309 insertions(+), 42 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index c2f80d9369..bfb73ccdf0 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -951,6 +951,90 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {CODEC_CONFIG, DEC, H264|HEVC, 0, 1, 1, 0, V4L2_CID_MPEG_VIDC_CODEC_CONFIG}, + + {META_LTR_MARK_USE, ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_LTR_MARK_USE_DETAILS, + HFI_PROP_LTR_MARK_USE_DETAILS}, + + {META_SEQ_HDR_NAL, ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_SEQ_HEADER_NAL, + HFI_PROP_METADATA_SEQ_HEADER_NAL}, + + {META_DPB_MISR, DEC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_DPB_LUMA_CHROMA_MISR, + HFI_PROP_DPB_LUMA_CHROMA_MISR}, + + {META_OPB_MISR, DEC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_OPB_LUMA_CHROMA_MISR, + HFI_PROP_OPB_LUMA_CHROMA_MISR}, + + {META_INTERLACE, DEC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_INTERLACE, + HFI_PROP_INTERLACE_INFO}, + + {META_CONCEALED_MB_CNT, DEC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_CONCEALED_MB_COUNT, + HFI_PROP_CONEALED_MB_COUNT}, + + {META_HIST_INFO, DEC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_HISTOGRAM_INFO, + HFI_PROP_HISTOGRAM_INFO}, + + {META_SEI_MASTERING_DISP, DEC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_SEI_MASTERING_DISPLAY_COLOUR, + HFI_PROP_SEI_MASTERING_DISPLAY_COLOUR}, + + {META_SEI_CLL, DEC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_SEI_CONTENT_LIGHT_LEVEL, + HFI_PROP_SEI_CONTENT_LIGHT_LEVEL}, + + {META_HDR10PLUS, DEC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_HDR10PLUS, + HFI_PROP_SEI_HDR10PLUS_USERDATA}, + + {META_EVA_STATS, ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_EVA_STATS, + HFI_PROP_EVA_STAT_INFO}, + + {META_BUF_TAG, DEC | ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_BUFFER_TAG, + HFI_PROP_BUFFER_TAG}, + + {META_SUBFRAME_OUTPUT, DEC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_SUBFRAME_OUTPUT, + HFI_PROP_SUBFRAME_OUTPUT}, + + {META_ROI_INFO, ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_ROI_INFO, + HFI_PROP_ROI_INFO}, }; /* diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index fa32a887c4..6e8805febf 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -61,6 +61,55 @@ static inline is_internal_buffer(enum msm_vidc_buffer_type buffer_type) buffer_type == MSM_VIDC_BUF_VPSS; } +static inline bool is_input_meta_enabled(struct msm_vidc_inst *inst) +{ + bool enabled = false; + + if (is_decode_session(inst)) { + enabled = inst->capabilities->cap[META_BUF_TAG].value ? + true : false; + } else if (is_encode_session(inst)) { + enabled = (inst->capabilities->cap[META_LTR_MARK_USE].value || + inst->capabilities->cap[META_SEQ_HDR_NAL].value || + inst->capabilities->cap[META_EVA_STATS].value || + inst->capabilities->cap[META_BUF_TAG].value); + } + return enabled; +} + +static inline bool is_output_meta_enabled(struct msm_vidc_inst *inst) +{ + bool enabled = false; + + if (is_decode_session(inst)) { + enabled = (inst->capabilities->cap[META_DPB_MISR].value || + inst->capabilities->cap[META_OPB_MISR].value || + inst->capabilities->cap[META_INTERLACE].value || + inst->capabilities->cap[META_CONCEALED_MB_CNT].value || + inst->capabilities->cap[META_HIST_INFO].value || + inst->capabilities->cap[META_SEI_MASTERING_DISP].value || + inst->capabilities->cap[META_SEI_CLL].value || + inst->capabilities->cap[META_BUF_TAG].value || + inst->capabilities->cap[META_SUBFRAME_OUTPUT].value); + } else if (is_encode_session(inst)) { + enabled = inst->capabilities->cap[META_BUF_TAG].value ? + true : false; + } + return enabled; +} + +static inline bool is_meta_enabled(struct msm_vidc_inst *inst, unsigned int type) +{ + bool enabled = false; + + if (type == MSM_VIDC_BUF_INPUT) + enabled = is_input_meta_enabled(inst); + else if (type == MSM_VIDC_BUF_OUTPUT) + enabled = is_output_meta_enabled(inst); + + return enabled; +} + static inline bool is_linear_colorformat(enum msm_vidc_colorformat_type colorformat) { return colorformat == MSM_VIDC_FMT_NV12 || diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 56180ef61b..2d606d9d61 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -340,6 +340,20 @@ enum msm_vidc_inst_capability_type { CODED_FRAMES, BIT_DEPTH, CODEC_CONFIG, + META_LTR_MARK_USE, + META_SEQ_HDR_NAL, + META_DPB_MISR, + META_OPB_MISR, + META_INTERLACE, + META_CONCEALED_MB_CNT, + META_HIST_INFO, + META_SEI_MASTERING_DISP, + META_SEI_CLL, + META_HDR10PLUS, + META_EVA_STATS, + META_BUF_TAG, + META_SUBFRAME_OUTPUT, + META_ROI_INFO, INST_CAP_MAX, }; diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index a1c8ae7331..e880299ecd 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -1189,6 +1189,14 @@ int msm_vdec_start_input(struct msm_vidc_inst *inst) core = inst->core; s_vpr_h(inst->sid, "%s()\n", __func__); + if (is_input_meta_enabled(inst) && + !inst->vb2q[INPUT_META_PORT].streaming) { + s_vpr_e(inst->sid, + "%s: Meta port must be streamed on before data port\n", + __func__); + goto error; + } + //rc = msm_vidc_check_session_supported(inst); if (rc) goto error; @@ -1390,6 +1398,14 @@ int msm_vdec_start_output(struct msm_vidc_inst *inst) return -EINVAL; } + if (is_output_meta_enabled(inst) && + !inst->vb2q[OUTPUT_META_PORT].streaming) { + s_vpr_e(inst->sid, + "%s: Meta port must be streamed on before data port\n", + __func__); + goto error; + } + rc = msm_vdec_set_output_properties(inst); if (rc) goto error; @@ -1556,15 +1572,23 @@ int msm_vdec_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) fmt = &inst->fmts[INPUT_META_PORT]; fmt->type = INPUT_META_PLANE; fmt->fmt.meta.dataformat = V4L2_META_FMT_VIDC; - fmt->fmt.meta.buffersize = call_session_op(core, buffer_size, - inst, MSM_VIDC_BUF_INPUT_META); - inst->buffers.input_meta.min_count = - inst->buffers.input.min_count; - inst->buffers.input_meta.extra_count = - inst->buffers.input.extra_count; - inst->buffers.input_meta.actual_count = - inst->buffers.input.actual_count; - inst->buffers.input_meta.size = fmt->fmt.meta.buffersize; + if (is_input_meta_enabled(inst)) { + fmt->fmt.meta.buffersize = call_session_op(core, + buffer_size, inst, MSM_VIDC_BUF_INPUT_META); + inst->buffers.input_meta.min_count = + inst->buffers.input.min_count; + inst->buffers.input_meta.extra_count = + inst->buffers.input.extra_count; + inst->buffers.input_meta.actual_count = + inst->buffers.input.actual_count; + inst->buffers.input_meta.size = fmt->fmt.meta.buffersize; + } else { + fmt->fmt.meta.buffersize = 0; + inst->buffers.input_meta.min_count = 0; + inst->buffers.input_meta.extra_count = 0; + inst->buffers.input_meta.actual_count = 0; + inst->buffers.input_meta.size = 0; + } s_vpr_h(inst->sid, "%s: input meta: size %d min_count %d extra_count %d\n", __func__, fmt->fmt.meta.buffersize, @@ -1623,15 +1647,23 @@ int msm_vdec_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) fmt = &inst->fmts[OUTPUT_META_PORT]; fmt->type = OUTPUT_META_PLANE; fmt->fmt.meta.dataformat = V4L2_META_FMT_VIDC; - fmt->fmt.meta.buffersize = call_session_op(core, buffer_size, - inst, MSM_VIDC_BUF_OUTPUT_META); - inst->buffers.output_meta.min_count = - inst->buffers.output.min_count; - inst->buffers.output_meta.extra_count = - inst->buffers.output.extra_count; - inst->buffers.output_meta.actual_count = - inst->buffers.output.actual_count; - inst->buffers.output_meta.size = fmt->fmt.meta.buffersize; + if (is_output_meta_enabled(inst)) { + fmt->fmt.meta.buffersize = call_session_op(core, + buffer_size, inst, MSM_VIDC_BUF_OUTPUT_META); + inst->buffers.output_meta.min_count = + inst->buffers.output.min_count; + inst->buffers.output_meta.extra_count = + inst->buffers.output.extra_count; + inst->buffers.output_meta.actual_count = + inst->buffers.output.actual_count; + inst->buffers.output_meta.size = fmt->fmt.meta.buffersize; + } else { + fmt->fmt.meta.buffersize = 0; + inst->buffers.output_meta.min_count = 0; + inst->buffers.output_meta.extra_count = 0; + inst->buffers.output_meta.actual_count = 0; + inst->buffers.output_meta.size = 0; + } s_vpr_h(inst->sid, "%s: output meta: size %d min_count %d extra_count %d\n", __func__, fmt->fmt.meta.buffersize, diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index 5f3473dba8..b071853345 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -729,6 +729,14 @@ int msm_venc_start_input(struct msm_vidc_inst *inst) core = inst->core; s_vpr_h(inst->sid, "%s()\n", __func__); + if (is_input_meta_enabled(inst) && + !inst->vb2q[INPUT_META_PORT].streaming) { + s_vpr_e(inst->sid, + "%s: Meta port must be streamed on before data port\n", + __func__); + goto error; + } + //rc = msm_vidc_check_session_supported(inst); if (rc) goto error; @@ -836,6 +844,14 @@ int msm_venc_start_output(struct msm_vidc_inst *inst) return -EINVAL; } + if (is_output_meta_enabled(inst) && + !inst->vb2q[OUTPUT_META_PORT].streaming) { + s_vpr_e(inst->sid, + "%s: Meta port must be streamed on before data port\n", + __func__); + goto error; + } + rc = msm_venc_set_output_properties(inst); if (rc) goto error; @@ -950,15 +966,23 @@ int msm_venc_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) fmt = &inst->fmts[INPUT_META_PORT]; fmt->type = INPUT_META_PLANE; fmt->fmt.meta.dataformat = V4L2_META_FMT_VIDC; - fmt->fmt.meta.buffersize = call_session_op(core, buffer_size, - inst, MSM_VIDC_BUF_INPUT_META); - inst->buffers.input_meta.min_count = - inst->buffers.input.min_count; - inst->buffers.input_meta.extra_count = - inst->buffers.input.extra_count; - inst->buffers.input_meta.actual_count = - inst->buffers.input.actual_count; - inst->buffers.input_meta.size = fmt->fmt.meta.buffersize; + if (is_input_meta_enabled(inst)) { + fmt->fmt.meta.buffersize = call_session_op(core, + buffer_size, inst, MSM_VIDC_BUF_OUTPUT_META); + inst->buffers.input_meta.min_count = + inst->buffers.input.min_count; + inst->buffers.input_meta.extra_count = + inst->buffers.input.extra_count; + inst->buffers.input_meta.actual_count = + inst->buffers.input.actual_count; + inst->buffers.input_meta.size = fmt->fmt.meta.buffersize; + } else { + fmt->fmt.meta.buffersize = 0; + inst->buffers.input_meta.min_count = 0; + inst->buffers.input_meta.extra_count = 0; + inst->buffers.input_meta.actual_count = 0; + inst->buffers.input_meta.size = 0; + } s_vpr_h(inst->sid, "%s: input meta: size %d min_count %d extra_count %d\n", __func__, fmt->fmt.meta.buffersize, @@ -1036,15 +1060,23 @@ int msm_venc_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) fmt = &inst->fmts[OUTPUT_META_PORT]; fmt->type = OUTPUT_META_PLANE; fmt->fmt.meta.dataformat = V4L2_META_FMT_VIDC; - fmt->fmt.meta.buffersize = call_session_op(core, buffer_size, - inst, MSM_VIDC_BUF_OUTPUT_META); - inst->buffers.output_meta.min_count = - inst->buffers.output.min_count; - inst->buffers.output_meta.extra_count = - inst->buffers.output.extra_count; - inst->buffers.output_meta.actual_count = - inst->buffers.output.actual_count; - inst->buffers.output_meta.size = fmt->fmt.meta.buffersize; + if (is_output_meta_enabled(inst)) { + fmt->fmt.meta.buffersize = call_session_op(core, + buffer_size, inst, MSM_VIDC_BUF_OUTPUT_META); + inst->buffers.output_meta.min_count = + inst->buffers.output.min_count; + inst->buffers.output_meta.extra_count = + inst->buffers.output.extra_count; + inst->buffers.output_meta.actual_count = + inst->buffers.output.actual_count; + inst->buffers.output_meta.size = fmt->fmt.meta.buffersize; + } else { + fmt->fmt.meta.buffersize = 0; + inst->buffers.output_meta.min_count = 0; + inst->buffers.output_meta.extra_count = 0; + inst->buffers.output_meta.actual_count = 0; + inst->buffers.output_meta.size = 0; + } s_vpr_h(inst->sid, "%s: output meta: size %d min_count %d extra_count %d\n", __func__, fmt->fmt.meta.buffersize, diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 74a0b78b3f..3bb7295e33 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -133,14 +133,38 @@ static const char *msm_vidc_get_priv_ctrl_name(u32 sid, u32 control_id) return "Blur Resolution"; case V4L2_CID_MPEG_VIDC_VIDEO_VPE_CSC_CUSTOM_MATRIX: return "CSC Custom Matrix"; - case V4L2_CID_MPEG_VIDC_METADATA_ENABLE: - return "Metadata Enable"; - case V4L2_CID_MPEG_VIDC_METADATA_DISABLE: - return "Metadata Disable"; case V4L2_CID_MPEG_MFC51_VIDEO_DECODER_H264_DISPLAY_DELAY: return "H264 Display Delay"; case V4L2_CID_MPEG_MFC51_VIDEO_DECODER_H264_DISPLAY_DELAY_ENABLE: return "H264 Display Delay Enable"; + case V4L2_CID_MPEG_VIDC_METADATA_LTR_MARK_USE_DETAILS: + return "LTR Mark Use Details Metadata"; + case V4L2_CID_MPEG_VIDC_METADATA_SEQ_HEADER_NAL: + return "Seq Header NAL Metadata"; + case V4L2_CID_MPEG_VIDC_METADATA_DPB_LUMA_CHROMA_MISR: + return "DPB Luma-Chroma MISR Metadata"; + case V4L2_CID_MPEG_VIDC_METADATA_OPB_LUMA_CHROMA_MISR: + return "OPB Luma-Chroma MISR Metadata"; + case V4L2_CID_MPEG_VIDC_METADATA_INTERLACE: + return "Interlace Metadata"; + case V4L2_CID_MPEG_VIDC_METADATA_CONCEALED_MB_COUNT: + return "Concealed MB Count Metadata"; + case V4L2_CID_MPEG_VIDC_METADATA_HISTOGRAM_INFO: + return "Historgram Info Metadata"; + case V4L2_CID_MPEG_VIDC_METADATA_SEI_MASTERING_DISPLAY_COLOUR: + return "SEI Mastering Display Color Metadata"; + case V4L2_CID_MPEG_VIDC_METADATA_SEI_CONTENT_LIGHT_LEVEL: + return "SEI Content Lighting Level Metadata"; + case V4L2_CID_MPEG_VIDC_METADATA_HDR10PLUS: + return "HDR10PLUS Metadata"; + case V4L2_CID_MPEG_VIDC_METADATA_EVA_STATS: + return "EVA Stats Metadata"; + case V4L2_CID_MPEG_VIDC_METADATA_BUFFER_TAG: + return "Buffer Tag Metadata"; + case V4L2_CID_MPEG_VIDC_METADATA_SUBFRAME_OUTPUT: + return "Subframe Output Metadata"; + case V4L2_CID_MPEG_VIDC_METADATA_ROI_INFO: + return "ROI Info Metadata"; default: s_vpr_e(sid, "%s: ctrl name not available for ctrl id %#x\n", __func__, control_id); diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 495a98a72e..f3a3c3060d 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -833,6 +833,13 @@ int msm_vidc_queue_buffer(struct msm_vidc_inst *inst, struct vb2_buffer *vb2) print_vidc_buffer(VIDC_HIGH, "qbuf", inst, buf); meta = get_meta_buffer(inst, buf); + if (!meta) { + if (is_meta_enabled(inst, buf->type)) { + print_vidc_buffer(VIDC_ERR, "missing meta for", + inst, buf); + return -EINVAL; + } + } rc = venus_hfi_queue_buffer(inst, buf, meta); if (rc) return rc; diff --git a/include/uapi/vidc/media/v4l2_vidc_extensions.h b/include/uapi/vidc/media/v4l2_vidc_extensions.h index 5aad9c2b9d..a4e15c8bfa 100644 --- a/include/uapi/vidc/media/v4l2_vidc_extensions.h +++ b/include/uapi/vidc/media/v4l2_vidc_extensions.h @@ -71,10 +71,35 @@ enum v4l2_mpeg_vidc_blur_types { (V4L2_CID_MPEG_VIDC_BASE + 0x12) /* various Metadata - encoder & decoder */ -#define V4L2_CID_MPEG_VIDC_METADATA_ENABLE \ +#define V4L2_CID_MPEG_VIDC_METADATA_LTR_MARK_USE_DETAILS \ (V4L2_CID_MPEG_VIDC_BASE + 0x13) -#define V4L2_CID_MPEG_VIDC_METADATA_DISABLE \ +#define V4L2_CID_MPEG_VIDC_METADATA_SEQ_HEADER_NAL \ (V4L2_CID_MPEG_VIDC_BASE + 0x14) +#define V4L2_CID_MPEG_VIDC_METADATA_DPB_LUMA_CHROMA_MISR \ + (V4L2_CID_MPEG_VIDC_BASE + 0x15) +#define V4L2_CID_MPEG_VIDC_METADATA_OPB_LUMA_CHROMA_MISR \ + (V4L2_CID_MPEG_VIDC_BASE + 0x16) +#define V4L2_CID_MPEG_VIDC_METADATA_INTERLACE \ + (V4L2_CID_MPEG_VIDC_BASE + 0x17) +#define V4L2_CID_MPEG_VIDC_METADATA_CONCEALED_MB_COUNT \ + (V4L2_CID_MPEG_VIDC_BASE + 0x18) +#define V4L2_CID_MPEG_VIDC_METADATA_HISTOGRAM_INFO \ + (V4L2_CID_MPEG_VIDC_BASE + 0x19) +#define V4L2_CID_MPEG_VIDC_METADATA_SEI_MASTERING_DISPLAY_COLOUR \ + (V4L2_CID_MPEG_VIDC_BASE + 0x1A) +#define V4L2_CID_MPEG_VIDC_METADATA_SEI_CONTENT_LIGHT_LEVEL \ + (V4L2_CID_MPEG_VIDC_BASE + 0x1B) +#define V4L2_CID_MPEG_VIDC_METADATA_HDR10PLUS \ + (V4L2_CID_MPEG_VIDC_BASE + 0x1C) +#define V4L2_CID_MPEG_VIDC_METADATA_EVA_STATS \ + (V4L2_CID_MPEG_VIDC_BASE + 0x1D) +#define V4L2_CID_MPEG_VIDC_METADATA_BUFFER_TAG \ + (V4L2_CID_MPEG_VIDC_BASE + 0x1E) +#define V4L2_CID_MPEG_VIDC_METADATA_SUBFRAME_OUTPUT \ + (V4L2_CID_MPEG_VIDC_BASE + 0x1F) +#define V4L2_CID_MPEG_VIDC_METADATA_ROI_INFO \ + (V4L2_CID_MPEG_VIDC_BASE + 0x20) + enum v4l2_mpeg_vidc_metapayload_header_flags { METADATA_FLAGS_NONE = 0, METADATA_FLAGS_TOP_FIELD = (1 << 0), From cff8298accae6d81ef0a0f5cdfb669d26c73e396 Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Tue, 22 Dec 2020 19:15:25 -0800 Subject: [PATCH 0045/1061] video: driver: new workhandler for inst events create a new work handler and post and handle events like psc. introduce reuse concept for internal buffers. Change-Id: Ibeaabae1b5923681756e959389df00b287206fb6 Signed-off-by: Darshana Patil --- driver/vidc/inc/msm_vidc_core.h | 15 +++ driver/vidc/inc/msm_vidc_driver.h | 2 + driver/vidc/inc/msm_vidc_internal.h | 1 + driver/vidc/inc/venus_hfi.h | 1 + driver/vidc/src/msm_vdec.c | 74 +++++++------ driver/vidc/src/msm_vidc_driver.c | 57 ++++++++++ driver/vidc/src/msm_vidc_probe.c | 10 ++ driver/vidc/src/venus_hfi_response.c | 149 +++++++++++++++++++++++++-- 8 files changed, 261 insertions(+), 48 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_core.h b/driver/vidc/inc/msm_vidc_core.h index 140b57985b..6f9eb84c44 100644 --- a/driver/vidc/inc/msm_vidc_core.h +++ b/driver/vidc/inc/msm_vidc_core.h @@ -60,6 +60,18 @@ enum msm_vidc_core_state { MSM_VIDC_CORE_ERROR = 2, }; +enum work_type { + MSM_VIDC_INST_WORK_PSC = 1, +}; + +struct work_header { + void *data; + struct list_head list; + enum work_type type; + u32 session_id; + u32 data_size; +}; + struct msm_vidc_core { struct platform_device *pdev; struct msm_video_device vdev[2]; @@ -108,6 +120,9 @@ struct msm_vidc_core { u32 header_id; u32 packet_id; struct completion init_done; + struct list_head inst_works; /* list of struct work_header */ + struct delayed_work inst_work; + struct workqueue_struct *inst_workq; }; #endif // _MSM_VIDC_CORE_H_ diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index fa32a887c4..5bf51deaa5 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -130,6 +130,8 @@ int v4l2_type_to_driver_port(struct msm_vidc_inst *inst, u32 type, const char *func); int msm_vidc_change_inst_state(struct msm_vidc_inst *inst, enum msm_vidc_inst_state state, const char *func); +int msm_vidc_get_input_internal_buffers(struct msm_vidc_inst *inst, + enum msm_vidc_buffer_type buffer_type); int msm_vidc_create_internal_buffers(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type buffer_type); int msm_vidc_queue_internal_buffers(struct msm_vidc_inst *inst, diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 019185413e..889c47da14 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -691,6 +691,7 @@ struct msm_vidc_buffers { u32 extra_count; u32 actual_count; u32 size; + bool reuse; }; struct msm_vidc_ssr { diff --git a/driver/vidc/inc/venus_hfi.h b/driver/vidc/inc/venus_hfi.h index 5b485b854d..44393c75be 100644 --- a/driver/vidc/inc/venus_hfi.h +++ b/driver/vidc/inc/venus_hfi.h @@ -71,6 +71,7 @@ int venus_hfi_scale_buses(struct msm_vidc_inst* inst, u64 bw_ddr, u64 bw_llcc); void venus_hfi_work_handler(struct work_struct *work); void venus_hfi_pm_work_handler(struct work_struct *work); +void venus_hfi_inst_work_handler(struct work_struct *work); irqreturn_t venus_hfi_isr(int irq, void *data); void __write_register(struct msm_vidc_core *core, diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index a1c8ae7331..73bee66f33 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -725,56 +725,53 @@ static int msm_vdec_set_output_properties(struct msm_vidc_inst *inst) static int msm_vdec_get_input_internal_buffers(struct msm_vidc_inst *inst) { int rc = 0; - struct msm_vidc_core *core; - if (!inst || !inst->core) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - core = inst->core; - /* - * TODO: Remove the hack of sending bigger buffer sizes - * once internal buffer calculations are finalised - */ - inst->buffers.bin.size = call_session_op(core, buffer_size, - inst, MSM_VIDC_BUF_BIN) + 100000000; - inst->buffers.comv.size = call_session_op(core, buffer_size, - inst, MSM_VIDC_BUF_COMV) + 100000000; - inst->buffers.non_comv.size = call_session_op(core, buffer_size, - inst, MSM_VIDC_BUF_NON_COMV) + 100000000; - inst->buffers.line.size = call_session_op(core, buffer_size, - inst, MSM_VIDC_BUF_LINE) + 100000000; - inst->buffers.persist.size = call_session_op(core, buffer_size, - inst, MSM_VIDC_BUF_PERSIST) + 100000000; + rc = msm_vidc_get_input_internal_buffers(inst, MSM_VIDC_BUF_BIN); + if (rc) + return rc; - inst->buffers.bin.min_count = call_session_op(core, min_count, - inst, MSM_VIDC_BUF_BIN); - inst->buffers.comv.min_count = call_session_op(core, min_count, - inst, MSM_VIDC_BUF_COMV); - inst->buffers.non_comv.min_count = call_session_op(core, min_count, - inst, MSM_VIDC_BUF_NON_COMV); - inst->buffers.line.min_count = call_session_op(core, min_count, - inst, MSM_VIDC_BUF_LINE); - inst->buffers.persist.min_count = call_session_op(core, min_count, - inst, MSM_VIDC_BUF_PERSIST); + rc = msm_vidc_get_input_internal_buffers(inst, MSM_VIDC_BUF_COMV); + if (rc) + return rc; - s_vpr_h(inst->sid, "internal buffer: min size\n"); - s_vpr_h(inst->sid, "bin buffer: %d %d\n", + rc = msm_vidc_get_input_internal_buffers(inst, MSM_VIDC_BUF_NON_COMV); + if (rc) + return rc; + + rc = msm_vidc_get_input_internal_buffers(inst, MSM_VIDC_BUF_LINE); + if (rc) + return rc; + + rc = msm_vidc_get_input_internal_buffers(inst, MSM_VIDC_BUF_PERSIST); + if (rc) + return rc; + + s_vpr_h(inst->sid, "internal buffer: min size reuse\n"); + s_vpr_h(inst->sid, "bin buffer: %d %d %d\n", inst->buffers.bin.min_count, - inst->buffers.bin.size); - s_vpr_h(inst->sid, "comv buffer: %d %d\n", + inst->buffers.bin.size, + inst->buffers.bin.reuse); + s_vpr_h(inst->sid, "comv buffer: %d %d %d\n", inst->buffers.comv.min_count, - inst->buffers.comv.size); - s_vpr_h(inst->sid, "non_comv buffer: %d %d\n", + inst->buffers.comv.size, + inst->buffers.comv.reuse); + s_vpr_h(inst->sid, "non_comv buffer: %d %d %d\n", inst->buffers.non_comv.min_count, - inst->buffers.non_comv.size); - s_vpr_h(inst->sid, "line buffer: %d %d\n", + inst->buffers.non_comv.size, + inst->buffers.non_comv.reuse); + s_vpr_h(inst->sid, "line buffer: %d %d %d\n", inst->buffers.line.min_count, - inst->buffers.line.size); - s_vpr_h(inst->sid, "persist buffer: %d %d\n", + inst->buffers.line.size, + inst->buffers.line.reuse); + s_vpr_h(inst->sid, "buffer: %d %d %d\n", inst->buffers.persist.min_count, - inst->buffers.persist.size); + inst->buffers.persist.size, + inst->buffers.persist.reuse); return rc; } @@ -1821,4 +1818,3 @@ int msm_vdec_inst_init(struct msm_vidc_inst *inst) return rc; } - diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 495a98a72e..ed83f395b5 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -909,6 +909,45 @@ int msm_vidc_destroy_internal_buffer(struct msm_vidc_inst *inst, return 0; } +int msm_vidc_get_input_internal_buffers(struct msm_vidc_inst *inst, + enum msm_vidc_buffer_type buffer_type) +{ + u32 buf_size; + u32 buf_count; + struct msm_vidc_core *core; + struct msm_vidc_buffers *buffers; + + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + core = inst->core; + + /* + * TODO: Remove the hack of sending bigger buffer sizes + * once internal buffer calculations are finalised + */ + buf_size = call_session_op(core, buffer_size, + inst, buffer_type) + 100000000; + + buf_count = call_session_op(core, min_count, + inst, buffer_type); + + buffers = msm_vidc_get_buffers(inst, buffer_type, __func__); + if (!buffers) + return -EINVAL; + + if (buf_size <= buffers->size && + buf_count <= buffers->min_count) { + buffers->reuse = true; + } else { + buffers->reuse = false; + buffers->size = buf_size; + buffers->min_count = buf_count; + } + return 0; +} + int msm_vidc_create_internal_buffer(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type buffer_type, u32 index) { @@ -1015,6 +1054,12 @@ int msm_vidc_create_internal_buffers(struct msm_vidc_inst *inst, if (!buffers) return -EINVAL; + if (buffers->reuse) { + s_vpr_l(inst->sid, "%s: reuse enabled for buffer type %#x\n", + __func__, buffer_type); + return 0; + } + for (i = 0; i < buffers->min_count; i++) rc = msm_vidc_create_internal_buffer(inst, buffer_type, i); @@ -1043,6 +1088,12 @@ int msm_vidc_queue_internal_buffers(struct msm_vidc_inst *inst, if (!buffers) return -EINVAL; + if (buffers->reuse) { + s_vpr_l(inst->sid, "%s: reuse enabled for buffer type %#x\n", + __func__, buffer_type); + return 0; + } + list_for_each_entry_safe(buffer, dummy, &buffers->list, list) { /* do not queue pending release buffers */ if (buffer->flags & MSM_VIDC_ATTR_PENDING_RELEASE) @@ -1085,6 +1136,12 @@ int msm_vidc_release_internal_buffers(struct msm_vidc_inst *inst, if (!buffers) return -EINVAL; + if (buffers->reuse) { + s_vpr_l(inst->sid, "%s: reuse enabled for buffer type %#x\n", + __func__, buffer_type); + return 0; + } + list_for_each_entry_safe(buffer, dummy, &buffers->list, list) { /* do not release already pending release buffers */ if (buffer->attr & MSM_VIDC_ATTR_PENDING_RELEASE) diff --git a/driver/vidc/src/msm_vidc_probe.c b/driver/vidc/src/msm_vidc_probe.c index 6e15844c79..7086d606ab 100644 --- a/driver/vidc/src/msm_vidc_probe.c +++ b/driver/vidc/src/msm_vidc_probe.c @@ -214,15 +214,25 @@ static int msm_vidc_initialize_core(struct msm_vidc_core *core) goto exit; } + core->inst_workq = create_singlethread_workqueue("inst_workq"); + if (!core->inst_workq) { + d_vpr_e("%s: create workq failed\n", __func__); + destroy_workqueue(core->inst_workq); + rc = -EINVAL; + goto exit; + } + mutex_init(&core->lock); INIT_LIST_HEAD(&core->instances); INIT_LIST_HEAD(&core->dangling_instances); + INIT_LIST_HEAD(&core->inst_works); INIT_WORK(&core->device_work, venus_hfi_work_handler); INIT_DELAYED_WORK(&core->pm_work, venus_hfi_pm_work_handler); INIT_DELAYED_WORK(&core->fw_unload_work, msm_vidc_fw_unload_handler); INIT_DELAYED_WORK(&core->batch_work, msm_vidc_batch_handler); INIT_WORK(&core->ssr_work, msm_vidc_ssr_handler); + INIT_DELAYED_WORK(&core->inst_work, venus_hfi_inst_work_handler); exit: return rc; diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index 1c682b4301..6c3e1b7b2c 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -124,8 +124,7 @@ int validate_packet(u8 *response_pkt, u8 *core_resp_pkt, return -EINVAL; } - response_limit = core_resp_pkt + core_resp_pkt_size - - max(sizeof(struct hfi_header), sizeof(struct hfi_packet)); + response_limit = core_resp_pkt + core_resp_pkt_size; if (response_pkt < core_resp_pkt || response_pkt > response_limit) { d_vpr_e("%s: invalid packet address\n", func); @@ -963,6 +962,121 @@ exit: return rc; } +static int venus_hfi_input_psc(struct msm_vidc_core *core, + struct work_header *work_hdr) +{ + int rc = 0; + struct msm_vidc_inst *inst; + struct hfi_header *hdr = NULL; + struct hfi_packet *packet; + u8 *pkt, *temp_pkt; + u32 hfi_cmd_type = 0; + u32 hfi_port = 0; + int i; + + if (!work_hdr) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + hdr = (struct hfi_header *)work_hdr->data; + if (!hdr) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + inst = get_inst(core, hdr->session_id); + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + mutex_lock(&inst->lock); + hfi_cmd_type = 0; + hfi_port = 0; + pkt = (u8 *)((u8 *)hdr + sizeof(struct hfi_header)); + temp_pkt = pkt; + + for (i = 0; i < hdr->num_packets; i++) { + if (validate_packet(pkt, work_hdr->data, + work_hdr->data_size, __func__)) { + rc = -EINVAL; + goto exit; + } + packet = (struct hfi_packet *)pkt; + if (packet->type > HFI_CMD_BEGIN && + packet->type < HFI_CMD_END) { + if (hfi_cmd_type == HFI_CMD_SETTINGS_CHANGE) { + s_vpr_e(inst->sid, + "%s: invalid packet type %d in port settings change\n", + __func__, packet->type); + rc = -EINVAL; + goto exit; + } + hfi_cmd_type = packet->type; + hfi_port = packet->port; + rc = handle_session_command(inst, packet); + } else if (packet->type > HFI_PROP_BEGIN && + packet->type < HFI_PROP_END) { + rc = handle_session_property(inst, packet); + } else if (packet->type > HFI_SESSION_ERROR_BEGIN && + packet->type < HFI_SESSION_ERROR_END) { + rc = handle_session_error(inst, packet); + } else if (packet->type > HFI_INFORMATION_BEGIN && + packet->type < HFI_INFORMATION_END) { + rc = handle_session_info(inst, packet); + } else { + s_vpr_e(inst->sid, "%s: Unknown packet type: %#x\n", + __func__, packet->type); + rc = -EINVAL; + goto exit; + } + pkt += packet->size; + } + + if (hfi_cmd_type == HFI_CMD_SETTINGS_CHANGE) { + if (hfi_port == HFI_PORT_BITSTREAM) { + print_psc_properties(VIDC_HIGH, "INPUT_PSC", inst, + inst->subcr_params[INPUT_PORT]); + rc = msm_vdec_input_port_settings_change(inst); + if (rc) + goto exit; + } + } + +exit: + mutex_unlock(&inst->lock); + put_inst(inst); + return rc; +} + +void venus_hfi_inst_work_handler(struct work_struct *work) +{ + struct msm_vidc_core *core; + struct work_header *work_hdr, *dummy = NULL; + + core = container_of(work, struct msm_vidc_core, inst_work.work); + if (!core) { + d_vpr_e("%s: invalid params\n", __func__); + return; + } + + list_for_each_entry_safe(work_hdr, dummy, &core->inst_works, list) { + switch (work_hdr->type) { + case MSM_VIDC_INST_WORK_PSC: + venus_hfi_input_psc(core, work_hdr); + break; + default: + d_vpr_e("%s(): invalid work type: %d\n", __func__, + work_hdr->type); + break; + } + list_del(&work_hdr->list); + kfree(work_hdr->data); + kfree(work_hdr); + } +} + static int handle_session_response(struct msm_vidc_core *core, struct hfi_header *hdr) { @@ -994,6 +1108,26 @@ static int handle_session_response(struct msm_vidc_core *core, packet = (struct hfi_packet *)pkt; if (packet->type > HFI_CMD_BEGIN && packet->type < HFI_CMD_END) { + if (packet->type == HFI_CMD_SETTINGS_CHANGE && + packet->port == HFI_PORT_BITSTREAM) { + struct work_header *work; + + work = kzalloc(sizeof(struct work_header), GFP_KERNEL); + INIT_LIST_HEAD(&work->list); + work->type = MSM_VIDC_INST_WORK_PSC; + work->session_id = hdr->session_id; + work->data_size = hdr->size; + work->data = kzalloc(hdr->size, GFP_KERNEL); + if (!work->data) { + rc= -ENOMEM; + goto exit; + } + memcpy(work->data, (void *)hdr, hdr->size); + list_add_tail(&work->list, &core->inst_works); + queue_delayed_work(core->inst_workq, + &core->inst_work, msecs_to_jiffies(0)); + goto exit; + } if (hfi_cmd_type == HFI_CMD_SETTINGS_CHANGE) { s_vpr_e(inst->sid, "%s: invalid packet type %d in port settings change\n", @@ -1029,18 +1163,15 @@ static int handle_session_response(struct msm_vidc_core *core, } if (hfi_cmd_type == HFI_CMD_SETTINGS_CHANGE) { - if (hfi_port == HFI_PORT_BITSTREAM) { - print_psc_properties(VIDC_HIGH, "INPUT_PSC", inst, - inst->subcr_params[INPUT_PORT]); - rc = msm_vdec_input_port_settings_change(inst); - if (rc) - goto exit; - } else if (hfi_port == HFI_PORT_RAW) { + if (hfi_port == HFI_PORT_RAW) { print_psc_properties(VIDC_HIGH, "OUTPUT_PSC", inst, inst->subcr_params[OUTPUT_PORT]); rc = msm_vdec_output_port_settings_change(inst); if (rc) goto exit; + } else { + s_vpr_e(inst->sid, "%s: invalid port type: %#x\n", + __func__, hfi_port); } } From e48a514a896de6a43f07d41bd71c0c8eea8bad1f Mon Sep 17 00:00:00 2001 From: Maheshwar Ajja Date: Wed, 23 Dec 2020 12:13:32 -0800 Subject: [PATCH 0046/1061] video: driver: add get and set selection support Add support to get and set selection to update crop and compose values in driver. Change-Id: I1f38ac6a4f3ceac64d08d66f30b422efd79959a9 Signed-off-by: Maheshwar Ajja --- driver/vidc/inc/msm_vdec.h | 2 + driver/vidc/inc/msm_venc.h | 2 + driver/vidc/inc/msm_vidc.h | 2 + driver/vidc/inc/msm_vidc_inst.h | 3 +- driver/vidc/inc/msm_vidc_internal.h | 2 +- driver/vidc/inc/msm_vidc_v4l2.h | 4 + driver/vidc/src/msm_vdec.c | 41 +++++- driver/vidc/src/msm_venc.c | 200 +++++++++++++++++++++++++--- driver/vidc/src/msm_vidc.c | 38 ++++++ driver/vidc/src/msm_vidc_platform.c | 2 + driver/vidc/src/msm_vidc_v4l2.c | 16 +++ 11 files changed, 288 insertions(+), 24 deletions(-) diff --git a/driver/vidc/inc/msm_vdec.h b/driver/vidc/inc/msm_vdec.h index cd9c631a11..ffe3471c12 100644 --- a/driver/vidc/inc/msm_vdec.h +++ b/driver/vidc/inc/msm_vdec.h @@ -16,6 +16,8 @@ int msm_vdec_start_output(struct msm_vidc_inst *inst); int msm_vdec_qbuf(struct msm_vidc_inst *inst, struct vb2_buffer *vb2); int msm_vdec_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f); int msm_vdec_g_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f); +int msm_vdec_s_selection(struct msm_vidc_inst* inst, struct v4l2_selection* s); +int msm_vdec_g_selection(struct msm_vidc_inst* inst, struct v4l2_selection* s); int msm_vdec_enum_fmt(struct msm_vidc_inst *inst, struct v4l2_fmtdesc *f); int msm_vdec_inst_init(struct msm_vidc_inst *inst); int msm_vdec_input_port_settings_change(struct msm_vidc_inst *inst); diff --git a/driver/vidc/inc/msm_venc.h b/driver/vidc/inc/msm_venc.h index 05d2794448..11efcd853b 100644 --- a/driver/vidc/inc/msm_venc.h +++ b/driver/vidc/inc/msm_venc.h @@ -16,6 +16,8 @@ int msm_venc_start_output(struct msm_vidc_inst *inst); int msm_venc_process_cmd(struct msm_vidc_inst *inst, u32 cmd); int msm_venc_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f); int msm_venc_g_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f); +int msm_venc_s_selection(struct msm_vidc_inst* inst, struct v4l2_selection* s); +int msm_venc_g_selection(struct msm_vidc_inst* inst, struct v4l2_selection* s); int msm_venc_enum_fmt(struct msm_vidc_inst *inst, struct v4l2_fmtdesc *f); int msm_venc_inst_init(struct msm_vidc_inst *inst); diff --git a/driver/vidc/inc/msm_vidc.h b/driver/vidc/inc/msm_vidc.h index ba432ed066..ede165d584 100644 --- a/driver/vidc/inc/msm_vidc.h +++ b/driver/vidc/inc/msm_vidc.h @@ -21,6 +21,8 @@ int msm_vidc_querycap(void *instance, struct v4l2_capability *cap); int msm_vidc_enum_fmt(void *instance, struct v4l2_fmtdesc *f); int msm_vidc_s_fmt(void *instance, struct v4l2_format *f); int msm_vidc_g_fmt(void *instance, struct v4l2_format *f); +int msm_vidc_s_selection(void* instance, struct v4l2_selection* s); +int msm_vidc_g_selection(void* instance, struct v4l2_selection* s); int msm_vidc_s_ctrl(void *instance, struct v4l2_control *a); int msm_vidc_s_ext_ctrl(void *instance, struct v4l2_ext_controls *a); int msm_vidc_g_ext_ctrl(void *instance, struct v4l2_ext_controls *a); diff --git a/driver/vidc/inc/msm_vidc_inst.h b/driver/vidc/inc/msm_vidc_inst.h index 350bf3c4c6..8e9248ccfa 100644 --- a/driver/vidc/inc/msm_vidc_inst.h +++ b/driver/vidc/inc/msm_vidc_inst.h @@ -100,7 +100,8 @@ struct msm_vidc_inst { struct msm_vidc_inst_cap_entry firmware; bool request; struct vb2_queue vb2q[MAX_PORT]; - struct msm_vidc_crop crop; + struct msm_vidc_rectangle crop; + struct msm_vidc_rectangle compose; struct msm_vidc_properties prop; enum msm_vidc_stage_type stage; enum msm_vidc_pipe_type pipe; diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 019185413e..d0a396809d 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -545,7 +545,7 @@ struct msm_vidc_color_info { u32 quantization; }; -struct msm_vidc_crop { +struct msm_vidc_rectangle { u32 left; u32 top; u32 width; diff --git a/driver/vidc/inc/msm_vidc_v4l2.h b/driver/vidc/inc/msm_vidc_v4l2.h index 63ed122365..0cd9ecdefc 100644 --- a/driver/vidc/inc/msm_vidc_v4l2.h +++ b/driver/vidc/inc/msm_vidc_v4l2.h @@ -22,6 +22,10 @@ int msm_v4l2_s_fmt(struct file *file, void *fh, struct v4l2_format *f); int msm_v4l2_g_fmt(struct file *file, void *fh, struct v4l2_format *f); +int msm_v4l2_s_selection(struct file* file, void* fh, + struct v4l2_selection* s); +int msm_v4l2_g_selection(struct file* file, void* fh, + struct v4l2_selection* s); int msm_v4l2_s_ctrl(struct file *file, void *fh, struct v4l2_control *a); int msm_v4l2_g_ctrl(struct file *file, void *fh, diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index a1c8ae7331..bc65738752 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -5,6 +5,7 @@ #include #include +#include #include "msm_vdec.h" #include "msm_vidc_core.h" @@ -1477,7 +1478,6 @@ int msm_vdec_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) struct msm_vidc_core *core; struct v4l2_format *fmt; - d_vpr_h("%s()\n", __func__); if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; @@ -1652,7 +1652,6 @@ int msm_vdec_g_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) int rc = 0; int port; - d_vpr_h("%s()\n", __func__); if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; @@ -1667,6 +1666,44 @@ int msm_vdec_g_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) return rc; } +int msm_vdec_s_selection(struct msm_vidc_inst* inst, struct v4l2_selection* s) +{ + if (!inst || !s) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + s_vpr_e(inst->sid, "%s: unsupported\n", __func__); + return -EINVAL; +} + +int msm_vdec_g_selection(struct msm_vidc_inst* inst, struct v4l2_selection* s) +{ + if (!inst || !s) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + switch (s->target) { + case V4L2_SEL_TGT_CROP_BOUNDS: + case V4L2_SEL_TGT_CROP_DEFAULT: + case V4L2_SEL_TGT_CROP: + case V4L2_SEL_TGT_COMPOSE_BOUNDS: + case V4L2_SEL_TGT_COMPOSE_PADDED: + case V4L2_SEL_TGT_COMPOSE_DEFAULT: + case V4L2_SEL_TGT_COMPOSE: + default: + s->r.left = inst->crop.left; + s->r.top = inst->crop.top; + s->r.width = inst->crop.width; + s->r.height = inst->crop.height; + break; + } + s_vpr_h(inst->sid, "%s: type %d target %d, r [%d, %d, %d, %d]\n", + __func__, s->type, s->target, s->r.top, s->r.left, + s->r.width, s->r.height); + return 0; +} + int msm_vdec_enum_fmt(struct msm_vidc_inst *inst, struct v4l2_fmtdesc *f) { int rc = 0; diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index 5f3473dba8..9a390c8591 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -877,6 +877,7 @@ int msm_venc_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) int rc = 0; struct msm_vidc_core *core; struct v4l2_format *fmt; + u32 codec_align; d_vpr_h("%s()\n", __func__); if (!inst || !inst->core) { @@ -899,12 +900,10 @@ int msm_venc_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) fmt->type = INPUT_MPLANE; fmt->fmt.pix_mp.pixelformat = f->fmt.pix_mp.pixelformat; fmt->fmt.pix_mp.width = VENUS_Y_STRIDE( - v4l2_colorformat_to_media(fmt->fmt.pix_mp.pixelformat, - __func__), + v4l2_colorformat_to_media(fmt->fmt.pix_mp.pixelformat, __func__), f->fmt.pix_mp.width); fmt->fmt.pix_mp.height = VENUS_Y_SCANLINES( - v4l2_colorformat_to_media(fmt->fmt.pix_mp.pixelformat, - __func__), + v4l2_colorformat_to_media(fmt->fmt.pix_mp.pixelformat, __func__), f->fmt.pix_mp.height); fmt->fmt.pix_mp.num_planes = 1; @@ -926,6 +925,33 @@ int msm_venc_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) inst->buffers.input.size = fmt->fmt.pix_mp.plane_fmt[0].sizeimage; + codec_align = inst->fmts[OUTPUT_PORT].fmt.pix_mp.pixelformat == + V4L2_PIX_FMT_HEVC ? 32 : 16; + /* check if resolution changed */ + if (inst->fmts[OUTPUT_PORT].fmt.pix_mp.width != + ALIGN(f->fmt.pix_mp.width, codec_align) || + inst->fmts[OUTPUT_PORT].fmt.pix_mp.height != + ALIGN(f->fmt.pix_mp.height, codec_align)) { + /* reset bitstream port with updated resolution */ + inst->fmts[OUTPUT_PORT].fmt.pix_mp.width = + ALIGN(f->fmt.pix_mp.width, codec_align); + inst->fmts[OUTPUT_PORT].fmt.pix_mp.height = + ALIGN(f->fmt.pix_mp.height, codec_align); + inst->fmts[OUTPUT_PORT].fmt.pix_mp.plane_fmt[0].sizeimage = + call_session_op(core, buffer_size, + inst, MSM_VIDC_BUF_OUTPUT); + + /* reset crop dimensions with updated resolution */ + inst->crop.top = inst->crop.left = 0; + inst->crop.width = f->fmt.pix_mp.width; + inst->crop.height = f->fmt.pix_mp.height; + + /* reset compose dimensions with updated resolution */ + inst->compose.top = inst->crop.left = 0; + inst->compose.width = f->fmt.pix_mp.width; + inst->compose.height = f->fmt.pix_mp.height; + } + //rc = msm_vidc_check_session_supported(inst); if (rc) goto err_invalid_fmt; @@ -979,17 +1005,12 @@ int msm_venc_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) goto err_invalid_fmt; } fmt->type = OUTPUT_MPLANE; - if (f->fmt.pix_mp.pixelformat == V4L2_PIX_FMT_HEVC) { - fmt->fmt.pix_mp.width = ALIGN(f->fmt.pix_mp.width, - H265_BITSTREM_ALIGNMENT); - fmt->fmt.pix_mp.height = ALIGN(f->fmt.pix_mp.height, - H265_BITSTREM_ALIGNMENT); - } else { - fmt->fmt.pix_mp.width = ALIGN(f->fmt.pix_mp.width, - DEFAULT_BITSTREM_ALIGNMENT); - fmt->fmt.pix_mp.height = ALIGN(f->fmt.pix_mp.height, - DEFAULT_BITSTREM_ALIGNMENT); - } + + codec_align = f->fmt.pix_mp.pixelformat == + V4L2_PIX_FMT_HEVC ? 32 : 16; + /* width, height is readonly for client */ + fmt->fmt.pix_mp.width = ALIGN(inst->crop.width, codec_align); + fmt->fmt.pix_mp.height = ALIGN(inst->crop.height, codec_align); fmt->fmt.pix_mp.pixelformat = f->fmt.pix_mp.pixelformat; fmt->fmt.pix_mp.num_planes = 1; fmt->fmt.pix_mp.plane_fmt[0].bytesperline = 0; @@ -1013,11 +1034,6 @@ int msm_venc_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) if (rc) goto err_invalid_fmt; - /* update crop dimensions */ - inst->crop.left = inst->crop.top = 0; - inst->crop.width = f->fmt.pix_mp.width; - inst->crop.height = f->fmt.pix_mp.height; - //update_log_ctxt(inst->sid, inst->session_type, // mplane->pixelformat); @@ -1080,6 +1096,150 @@ int msm_venc_g_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) return rc; } +int msm_venc_s_selection(struct msm_vidc_inst* inst, struct v4l2_selection* s) +{ + int rc = 0; + u32 codec_align; + + if (!inst || !s) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + if (s->type != INPUT_MPLANE && s->type != V4L2_BUF_TYPE_VIDEO_OUTPUT) { + s_vpr_e(inst->sid, "%s: invalid type %d\n", __func__, s->type); + return -EINVAL; + } + + switch (s->target) { + case V4L2_SEL_TGT_CROP_BOUNDS: + case V4L2_SEL_TGT_CROP_DEFAULT: + case V4L2_SEL_TGT_CROP: + codec_align = inst->fmts[OUTPUT_PORT].fmt.pix_mp.pixelformat == + V4L2_PIX_FMT_HEVC ? 32 : 16; + if (s->r.left || s->r.top) { + s_vpr_h(inst->sid, "%s: unsupported top %d or left %d\n", + __func__, s->r.left, s->r.top); + s->r.left = s->r.top = 0; + } + if (s->r.width > inst->fmts[OUTPUT_PORT].fmt.pix_mp.width || + ALIGN(s->r.width, codec_align) != inst->fmts[OUTPUT_PORT].fmt.pix_mp.width) { + s_vpr_h(inst->sid, "%s: unsupported width %d, fmt width %d\n", + __func__, s->r.width, + inst->fmts[OUTPUT_PORT].fmt.pix_mp.width); + s->r.width = inst->fmts[OUTPUT_PORT].fmt.pix_mp.width; + } + if (s->r.height > inst->fmts[OUTPUT_PORT].fmt.pix_mp.height || + ALIGN(s->r.height, codec_align) != inst->fmts[OUTPUT_PORT].fmt.pix_mp.height) { + s_vpr_h(inst->sid, "%s: unsupported height %d, fmt height %d\n", + __func__, s->r.height, + inst->fmts[OUTPUT_PORT].fmt.pix_mp.height); + s->r.height = inst->fmts[OUTPUT_PORT].fmt.pix_mp.height; + } + + inst->crop.left = s->r.left; + inst->crop.top = s->r.top; + inst->crop.width = s->r.width; + inst->crop.height = s->r.height; + /* adjust compose such that it is within crop */ + if (inst->compose.left < inst->crop.left) + inst->compose.left = inst->crop.left; + if (inst->compose.top < inst->crop.top) + inst->compose.top = inst->crop.top; + if (inst->compose.width > inst->crop.width) + inst->compose.width = inst->crop.width; + if (inst->compose.height > inst->crop.height) + inst->compose.height = inst->crop.height; + break; + case V4L2_SEL_TGT_COMPOSE_BOUNDS: + case V4L2_SEL_TGT_COMPOSE_PADDED: + case V4L2_SEL_TGT_COMPOSE_DEFAULT: + case V4L2_SEL_TGT_COMPOSE: + if (s->r.left < inst->crop.left) { + s_vpr_e(inst->sid, + "%s: compose left (%d) less than crop left (%d)\n", + __func__, s->r.left, inst->crop.left); + s->r.left = inst->crop.left; + } + if (s->r.top < inst->crop.top) { + s_vpr_e(inst->sid, + "%s: compose top (%d) less than crop top (%d)\n", + __func__, s->r.top, inst->crop.top); + s->r.top = inst->crop.top; + } + if (s->r.width > inst->crop.width) { + s_vpr_e(inst->sid, + "%s: compose width (%d) greate than crop width (%d)\n", + __func__, s->r.width, inst->crop.width); + s->r.width = inst->crop.width; + } + if (s->r.height > inst->crop.height) { + s_vpr_e(inst->sid, + "%s: compose height (%d) greate than crop height (%d)\n", + __func__, s->r.height, inst->crop.height); + s->r.height = inst->crop.height; + } + inst->compose.left = s->r.left; + inst->compose.top = s->r.top; + inst->compose.width = s->r.width; + inst->compose.height= s->r.height; + break; + default: + s_vpr_e(inst->sid, "%s: invalid target %d\n", + __func__, s->target); + rc = -EINVAL; + break; + } + if (!rc) + s_vpr_h(inst->sid, "%s: target %d, r [%d, %d, %d, %d]\n", + __func__, s->target, s->r.top, s->r.left, + s->r.width, s->r.height); + return rc; +} + +int msm_venc_g_selection(struct msm_vidc_inst* inst, struct v4l2_selection* s) +{ + int rc = 0; + + if (!inst || !s) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + if (s->type != INPUT_MPLANE && s->type != V4L2_BUF_TYPE_VIDEO_OUTPUT) { + s_vpr_e(inst->sid, "%s: invalid type %d\n", __func__, s->type); + return -EINVAL; + } + + switch (s->target) { + case V4L2_SEL_TGT_CROP_BOUNDS: + case V4L2_SEL_TGT_CROP_DEFAULT: + case V4L2_SEL_TGT_CROP: + s->r.left = inst->crop.left; + s->r.top = inst->crop.top; + s->r.width = inst->crop.width; + s->r.height = inst->crop.height; + break; + case V4L2_SEL_TGT_COMPOSE_BOUNDS: + case V4L2_SEL_TGT_COMPOSE_PADDED: + case V4L2_SEL_TGT_COMPOSE_DEFAULT: + case V4L2_SEL_TGT_COMPOSE: + s->r.left = inst->compose.left; + s->r.top = inst->compose.top; + s->r.width = inst->compose.width; + s->r.height = inst->compose.height; + break; + default: + s_vpr_e(inst->sid, "%s: invalid target %d\n", + __func__, s->target); + rc = -EINVAL; + break; + } + if (!rc) + s_vpr_h(inst->sid, "%s: target %d, r [%d, %d, %d, %d]\n", + __func__, s->target, s->r.top, s->r.left, + s->r.width, s->r.height); + return rc; +} + int msm_venc_enum_fmt(struct msm_vidc_inst *inst, struct v4l2_fmtdesc *f) { int rc = 0; diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index 36899dfea4..6c77b18b4b 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -266,6 +266,44 @@ int msm_vidc_g_fmt(void *instance, struct v4l2_format *f) } EXPORT_SYMBOL(msm_vidc_g_fmt); +int msm_vidc_s_selection(void* instance, struct v4l2_selection* s) +{ + int rc = 0; + struct msm_vidc_inst* inst = instance; + + if (!inst || !s) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (is_decode_session(inst)) + rc = msm_vdec_s_selection(inst, s); + if (is_encode_session(inst)) + rc = msm_venc_s_selection(inst, s); + + return rc; +} +EXPORT_SYMBOL(msm_vidc_s_selection); + +int msm_vidc_g_selection(void* instance, struct v4l2_selection* s) +{ + int rc = 0; + struct msm_vidc_inst* inst = instance; + + if (!inst || !s) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (is_decode_session(inst)) + rc = msm_vdec_g_selection(inst, s); + if (is_encode_session(inst)) + rc = msm_venc_g_selection(inst, s); + + return rc; +} +EXPORT_SYMBOL(msm_vidc_g_selection); + int msm_vidc_s_ctrl(void *instance, struct v4l2_control *control) { struct msm_vidc_inst *inst = instance; diff --git a/driver/vidc/src/msm_vidc_platform.c b/driver/vidc/src/msm_vidc_platform.c index cb32c4fc2d..fcb69eb38b 100644 --- a/driver/vidc/src/msm_vidc_platform.c +++ b/driver/vidc/src/msm_vidc_platform.c @@ -39,6 +39,8 @@ static struct v4l2_ioctl_ops msm_v4l2_ioctl_ops = { .vidioc_g_fmt_vid_out_mplane = msm_v4l2_g_fmt, .vidioc_g_fmt_meta_out = msm_v4l2_g_fmt, .vidioc_g_fmt_meta_cap = msm_v4l2_g_fmt, + .vidioc_g_selection = msm_v4l2_g_selection, + .vidioc_s_selection = msm_v4l2_s_selection, .vidioc_reqbufs = msm_v4l2_reqbufs, .vidioc_qbuf = msm_v4l2_qbuf, .vidioc_dqbuf = msm_v4l2_dqbuf, diff --git a/driver/vidc/src/msm_vidc_v4l2.c b/driver/vidc/src/msm_vidc_v4l2.c index e40738f78d..d5f15f22da 100644 --- a/driver/vidc/src/msm_vidc_v4l2.c +++ b/driver/vidc/src/msm_vidc_v4l2.c @@ -88,6 +88,22 @@ int msm_v4l2_g_fmt(struct file *file, void *fh, return msm_vidc_g_fmt((void *)vidc_inst, f); } +int msm_v4l2_s_selection(struct file* file, void* fh, + struct v4l2_selection* s) +{ + struct msm_vidc_inst* vidc_inst = get_vidc_inst(file, fh); + + return msm_vidc_s_selection((void*)vidc_inst, s); +} + +int msm_v4l2_g_selection(struct file* file, void* fh, + struct v4l2_selection* s) +{ + struct msm_vidc_inst* vidc_inst = get_vidc_inst(file, fh); + + return msm_vidc_g_selection((void*)vidc_inst, s); +} + int msm_v4l2_s_ctrl(struct file *file, void *fh, struct v4l2_control *a) { From 9a6bc75fe71d6c5bb484ed21426d143f3f9a490b Mon Sep 17 00:00:00 2001 From: Akshay Chandrashekhar Kalghatgi Date: Sun, 20 Dec 2020 23:54:40 -0800 Subject: [PATCH 0047/1061] video: driver: fix compilation issues Fix compilation issues Change-Id: Iba42eb95758b27b308b471b10cb56638a3b37f20 Signed-off-by: Akshay Chandrashekhar Kalghatgi --- driver/variant/iris2/src/msm_vidc_iris2.c | 2 +- driver/vidc/src/venus_hfi.c | 10 ++++++---- 2 files changed, 7 insertions(+), 5 deletions(-) diff --git a/driver/variant/iris2/src/msm_vidc_iris2.c b/driver/variant/iris2/src/msm_vidc_iris2.c index 00795368f4..6eca81b88d 100644 --- a/driver/variant/iris2/src/msm_vidc_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_iris2.c @@ -191,7 +191,7 @@ static int __setup_ucregion_memory_map_iris2(struct msm_vidc_core *vidc_core) (u32)core->sfr.align_device_addr);*/ /* update queues vaddr for debug purpose */ __write_register(core, CPU_CS_VCICMDARG0_IRIS2, - (u32)core->iface_q_table.align_virtual_addr); + (u32)((u64)core->iface_q_table.align_virtual_addr)); __write_register(core, CPU_CS_VCICMDARG1_IRIS2, (u32)((u64)core->iface_q_table.align_virtual_addr >> 32)); diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index 7ef1e02557..591bda389c 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -1094,6 +1094,7 @@ skip_power_off: static int __protect_cp_mem(struct msm_vidc_core *core) { +#if 0 struct tzbsp_memprot memprot; int rc = 0; struct context_bank_info *cb; @@ -1124,13 +1125,16 @@ static int __protect_cp_mem(struct msm_vidc_core *core) } } - rc = qcom_scm_mem_protect_video(memprot.cp_start, memprot.cp_size, + rc = qcom_scm_mem_protect_video_var(memprot.cp_start, memprot.cp_size, memprot.cp_nonpixel_start, memprot.cp_nonpixel_size); if (rc) d_vpr_e("Failed to protect memory(%d)\n", rc); return rc; +#endif + // TODO: revert once SSG changes merged + return 0; } #if 0 // TODO static int __core_set_resource(struct msm_vidc_core *core, @@ -2351,14 +2355,12 @@ static int __load_fw(struct msm_vidc_core *core) } } - // TODO: Prabhakar - revisit once hyp support is available. -#ifdef WAIPIO_PRESIL_CP_ENABLE rc = __protect_cp_mem(core); if (rc) { d_vpr_e("%s: protect memory failed\n", __func__); goto fail_protect_mem; } -#endif + /* * Hand off control of regulators to h/w _after_ loading fw. * Note that the GDSC will turn off when switching from normal From 1a9d8e71ba031ca3756e507af9dc5ff389874fde Mon Sep 17 00:00:00 2001 From: Maheshwar Ajja Date: Mon, 28 Dec 2020 12:00:41 -0800 Subject: [PATCH 0048/1061] video: driver: amend internal buffer size calculations Utilize new HFI header to calculate internal buffer sizes. Change-Id: I0f9e105da4cd346ed377f24b0823152f88150aa4 Signed-off-by: Maheshwar Ajja --- driver/variant/iris2/inc/hfi_buffer_iris2.h | 172 ++- .../variant/iris2/src/msm_vidc_buffer_iris2.c | 1342 ++++------------- driver/vidc/inc/hfi_command.h | 1 + driver/vidc/inc/hfi_property.h | 3 + 4 files changed, 363 insertions(+), 1155 deletions(-) diff --git a/driver/variant/iris2/inc/hfi_buffer_iris2.h b/driver/variant/iris2/inc/hfi_buffer_iris2.h index 858bb75a0f..34d513c4bf 100644 --- a/driver/variant/iris2/inc/hfi_buffer_iris2.h +++ b/driver/variant/iris2/inc/hfi_buffer_iris2.h @@ -6,6 +6,18 @@ #ifndef __HFI_BUFFER_IRIS2__ #define __HFI_BUFFER_IRIS2__ +#include +#include "hfi_property.h" + +typedef u8 HFI_U8; +typedef s8 HFI_S8; +typedef u16 HFI_U16; +typedef s16 HFI_S16; +typedef u32 HFI_U32; +typedef s32 HFI_S32; +typedef u64 HFI_U64; +typedef HFI_U32 HFI_BOOL; + #ifndef MIN #define MIN(x, y) (((x) < (y)) ? (x) : (y)) #endif @@ -19,12 +31,24 @@ */ #define HFI_ALIGNMENT_4096 (4096) +#define BUF_SIZE_ALIGN_16 (16) +#define BUF_SIZE_ALIGN_32 (32) +#define BUF_SIZE_ALIGN_64 (64) +#define BUF_SIZE_ALIGN_128 (128) +#define BUF_SIZE_ALIGN_256 (256) +#define BUF_SIZE_ALIGN_512 (512) +#define BUF_SIZE_ALIGN_4096 (4096) + /* * Macro to align a to b */ #define HFI_ALIGN(a, b) (((b) & ((b) - 1)) ? (((a) + (b) - 1) / \ (b) * (b)) : (((a) + (b) - 1) & (~((b) - 1)))) + +#define HFI_WORKMODE_1 1 /* stage 1 */ +#define HFI_WORKMODE_2 2 /* stage 2 */ + /* * Default ubwc metadata buffer stride and height alignment values */ @@ -139,9 +163,9 @@ uv_metadata_stride_multiple, uv_metadata_buffer_height_multiple) \ do \ { \ - UInt32 y_buf_size, uv_buf_size, y_meta_size, uv_meta_size; \ - UInt32 stride, height; \ - UInt32 halfHeight = (frame_height + 1) >> 1; \ + HFI_U32 y_buf_size, uv_buf_size, y_meta_size, uv_meta_size; \ + HFI_U32 stride, height; \ + HFI_U32 halfHeight = (frame_height + 1) >> 1; \ HFI_NV12_IL_CALC_Y_STRIDE(stride, frame_width,\ y_stride_multiple); \ HFI_NV12_IL_CALC_Y_BUFHEIGHT(height, half_height,\ @@ -503,7 +527,7 @@ opb_wr_top_line_chroma_buffer_size, \ opb_lb_wr_llb_y_buffer_size,\ opb_lb_wr_llb_uv_buffer_size; \ - HFI_U32 lcu_size_pels, macrotiling_size, padding_size; \ + HFI_U32 macrotiling_size; \ vpss_4tap_top_buffer_size = vpss_div2_top_buffer_size = \ vpss_4tap_left_buffer_size = vpss_div2_left_buffer_size = 0; \ macrotiling_size = 32; \ @@ -577,18 +601,18 @@ #define SIZE_H264D_BSE_CMD_BUF(_size, frame_width, frame_height) \ do \ { /* this could change alignment */ \ - UInt32 height = HFI_ALIGN(frame_height, \ + HFI_U32 _height = HFI_ALIGN(frame_height, \ BUFFER_ALIGNMENT_32_BYTES); \ - _size = MIN((((height + 15) >> 4) * 3 * 4), H264D_MAX_SLICE) *\ + _size = MIN((((_height + 15) >> 4) * 3 * 4), H264D_MAX_SLICE) *\ SIZE_H264D_BSE_CMD_PER_BUF; \ } while (0) #define SIZE_H264D_VPP_CMD_BUF(_size, frame_width, frame_height) \ do \ { /* this could change alignment */ \ - UInt32 height = HFI_ALIGN(frame_height, \ + HFI_U32 _height = HFI_ALIGN(frame_height, \ BUFFER_ALIGNMENT_32_BYTES); \ - _size = MIN((((height + 15) >> 4) * 3 * 4), H264D_MAX_SLICE) * \ + _size = MIN((((_height + 15) >> 4) * 3 * 4), H264D_MAX_SLICE) * \ SIZE_H264D_VPP_CMD_PER_BUF; \ if (_size > VPP_CMD_MAX_SIZE) { _size = VPP_CMD_MAX_SIZE; } \ } while (0) @@ -819,6 +843,8 @@ _size += BUFFER_ALIGNMENT_512_BYTES; \ } while (0) +#define HDR10_HIST_EXTRADATA_SIZE (4 * 1024) + /* c2 divide this into NON_COMV and LINE */ #define HFI_BUFFER_NON_COMV_H265D(_size, frame_width, frame_height, \ num_vpp_pipes) \ @@ -839,8 +865,8 @@ LCU_MAX_SIZE_PELS) / LCU_MIN_SIZE_PELS), \ VENUS_DMA_ALIGNMENT) + \ HFI_ALIGN(SIZE_HW_PIC(SIZE_H265D_HW_PIC_T), \ - VENUS_DMA_ALIGNMENT)\ - + HDR10_HIST_EXTRADATA_SIZE; \ + VENUS_DMA_ALIGNMENT) + \ + HDR10_HIST_EXTRADATA_SIZE; \ _size = HFI_ALIGN(_size, VENUS_DMA_ALIGNMENT); \ } while (0) @@ -848,7 +874,7 @@ is_opb, num_vpp_pipes) \ do \ { \ - HFI_U32 vpssLB_size = 0; \ + HFI_U32 vpss_lb_size = 0; \ _size = HFI_ALIGN(SIZE_H265D_LB_FE_TOP_DATA(frame_width, \ frame_height), VENUS_DMA_ALIGNMENT) + \ HFI_ALIGN(SIZE_H265D_LB_FE_TOP_CTRL(frame_width, \ @@ -934,7 +960,7 @@ #define H265_NUM_TILE (H265_NUM_TILE_ROW * H265_NUM_TILE_COL + 1) #define HFI_BUFFER_PERSIST_H265D(_size) \ _size = HFI_ALIGN((SIZE_SLIST_BUF_H265 * NUM_SLIST_BUF_H265 + \ - H265_NUM_TILE * sizeof(Int32) + NUM_HW_PIC_BUF * SIZE_SEI_USERDATA),\ + H265_NUM_TILE * sizeof(HFI_U32) + NUM_HW_PIC_BUF * SIZE_SEI_USERDATA),\ VENUS_DMA_ALIGNMENT) /* @@ -1231,10 +1257,10 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ if (hybrid_hp) \ /* LTR and B-frame not supported with hybrid HP */\ num_ref = (_total_hp_layers - 1); \ - if (codec_standard == HFI_VIDEO_CODEC_HEVC) \ + if (codec_standard == HFI_CODEC_ENCODE_HEVC) \ num_ref = (_total_hp_layers + 1) / 2 + \ ltr_count; \ - else if (codec_standard == HFI_VIDEO_CODEC_H264 && \ + else if (codec_standard == HFI_CODEC_ENCODE_AVC && \ _total_hp_layers <= 4) \ num_ref = (2 ^ (_total_hp_layers - 1)) - 1 + \ ltr_count; \ @@ -1314,10 +1340,9 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ do \ { \ HFI_U32 bitstream_size = 0, total_bitbin_buffers = 0, \ - size_single_pipe = 0, bitbin_size = 0; \ - HFI_U32 sao_bin_buffer_size = 0, _padded_bin_sz = 0; \ + size_single_pipe = 0, bitbin_size = 0; \ SIZE_BIN_BITSTREAM_ENC(bitstream_size, frame_width, \ - frame_height, work_mode, lcu_size); \ + frame_height, work_mode, lcu_size); \ if (work_mode == HFI_WORKMODE_2) \ { \ total_bitbin_buffers = 3; \ @@ -1380,10 +1405,10 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ num_vpp_pipes_enc) \ do \ { \ - _size = (standard == HFI_VIDEO_CODEC_HEVC) ? \ - (((frame_height_coded) + \ - (BUF_SIZE_ALIGN_32)) / BUF_SIZE_ALIGN_32 * 4 * 16) : \ - (((frame_height_coded) + 15) / 16 * 5 * 16); \ + _size = (standard == HFI_CODEC_ENCODE_HEVC) ? \ + (((frame_height_coded) + \ + (BUF_SIZE_ALIGN_32)) / BUF_SIZE_ALIGN_32 * 4 * 16) : \ + (((frame_height_coded) + 15) / 16 * 5 * 16); \ if ((num_vpp_pipes_enc) > 1) \ { \ _size += BUFFER_ALIGNMENT_512_BYTES; \ @@ -1406,7 +1431,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define SIZE_TOP_LINEBUFF_CTRL_FE(_size, frame_width_coded, standard) \ do \ { \ - _size = (standard == HFI_VIDEO_CODEC_HEVC) ? (64 * \ + _size = (standard == HFI_CODEC_ENCODE_HEVC) ? (64 * \ ((frame_width_coded) >> 5)) : (VENUS_DMA_ALIGNMENT + 16 * \ ((frame_width_coded) >> 4)); \ _size = HFI_ALIGN(_size, VENUS_DMA_ALIGNMENT); \ @@ -1452,10 +1477,10 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ num_vpp_pipes_enc) \ do \ { \ - _size = (standard == HFI_VIDEO_CODEC_HEVC) ? (256 + 16 * \ - (14 + ((((frame_height_coded) >> 5) + 7) >> 3))) : \ - (256 + 16 * (14 + ((((frame_height_coded) >> 4) + 7) >> 3))); \ - _size *= 6; /* multiply by max numtilescol*/ \ + _size = (standard == HFI_CODEC_ENCODE_HEVC) ? (256 + 16 * \ + (14 + ((((frame_height_coded) >> 5) + 7) >> 3))) : \ + (256 + 16 * (14 + ((((frame_height_coded) >> 4) + 7) >> 3))); \ + _size *= 6; /* multiply by max numtilescol */ \ if (num_vpp_pipes_enc > 1) \ { \ _size = HFI_ALIGN(_size, VENUS_DMA_ALIGNMENT) \ @@ -1517,13 +1542,13 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ do \ { \ HFI_U32 width_in_lcus = 0, height_in_lcus = 0, \ - frame_width_coded = 0, frame_height_coded = 0; \ + frame_width_coded = 0, frame_height_coded = 0; \ HFI_U32 line_buff_data_size = 0, left_line_buff_ctrl_size = 0, \ - left_line_buff_recon_pix_size = 0, \ - top_line_buff_ctrl_fe_size = 0; \ + left_line_buff_recon_pix_size = 0, \ + top_line_buff_ctrl_fe_size = 0; \ HFI_U32 left_line_buff_metadata_recon__y__size = 0, \ - left_line_buff_metadata_recon__uv__size = 0, \ - line_buff_recon_pix_size = 0; \ + left_line_buff_metadata_recon__uv__size = 0, \ + line_buff_recon_pix_size = 0; \ width_in_lcus = ((frame_width) + (lcu_size)-1) / (lcu_size); \ height_in_lcus = ((frame_height) + (lcu_size)-1) / (lcu_size); \ frame_width_coded = width_in_lcus * (lcu_size); \ @@ -1531,9 +1556,9 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ SIZE_LINEBUFF_DATA(line_buff_data_size, is_ten_bit, \ frame_width_coded);\ SIZE_LEFT_LINEBUFF_CTRL(left_line_buff_ctrl_size, standard, \ - frame_height_coded, num_vpp_pipes_enc); \ + frame_height_coded, num_vpp_pipes_enc); \ SIZE_LEFT_LINEBUFF_RECON_PIX(left_line_buff_recon_pix_size, \ - is_ten_bit, frame_height_coded, num_vpp_pipes_enc); \ + is_ten_bit, frame_height_coded, num_vpp_pipes_enc); \ SIZE_TOP_LINEBUFF_CTRL_FE(top_line_buff_ctrl_fe_size, \ frame_width_coded, standard); \ SIZE_LEFT_LINEBUFF_METADATA_RECON_Y\ @@ -1545,18 +1570,18 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ SIZE_LINEBUFF_RECON_PIX(line_buff_recon_pix_size, is_ten_bit,\ frame_width_coded); \ _size = SIZE_LINE_BUF_CTRL(frame_width_coded) + \ - SIZE_LINE_BUF_CTRL_ID2(frame_width_coded) + \ - line_buff_data_size + \ - left_line_buff_ctrl_size + \ - left_line_buff_recon_pix_size + \ - top_line_buff_ctrl_fe_size + \ - left_line_buff_metadata_recon__y__size + \ - left_line_buff_metadata_recon__uv__size + \ - line_buff_recon_pix_size + \ + SIZE_LINE_BUF_CTRL_ID2(frame_width_coded) + \ + line_buff_data_size + \ + left_line_buff_ctrl_size + \ + left_line_buff_recon_pix_size + \ + top_line_buff_ctrl_fe_size + \ + left_line_buff_metadata_recon__y__size + \ + left_line_buff_metadata_recon__uv__size + \ + line_buff_recon_pix_size + \ SIZE_LEFT_LINEBUFF_CTRL_FE(frame_height_coded, \ - num_vpp_pipes_enc) + SIZE_LINE_BUF_SDE(frame_width_coded) + \ + num_vpp_pipes_enc) + SIZE_LINE_BUF_SDE(frame_width_coded) + \ SIZE_VPSS_LINE_BUF(num_vpp_pipes_enc, frame_height_coded, \ - frame_width_coded) + \ + frame_width_coded) + \ SIZE_TOP_LINE_BUF_FIRST_STG_SAO(frame_width_coded); \ } while (0) @@ -1565,7 +1590,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ do \ { \ HFI_BUFFER_LINE_ENC(_size, frame_width, frame_height, 0, \ - num_vpp_pipes, 16, HFI_VIDEO_CODEC_H264); \ + num_vpp_pipes, 16, HFI_CODEC_ENCODE_AVC); \ } while (0) #define HFI_BUFFER_LINE_H265E(_size, frame_width, frame_height, is_ten_bit, \ @@ -1573,7 +1598,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ do \ { \ HFI_BUFFER_LINE_ENC(_size, frame_width, frame_height, \ - is_ten_bit, num_vpp_pipes, 32, HFI_VIDEO_CODEC_HEVC); \ + is_ten_bit, num_vpp_pipes, 32, HFI_CODEC_ENCODE_HEVC); \ } while (0) #define HFI_BUFFER_COMV_ENC(_size, frame_width, frame_height, lcu_size, \ @@ -1588,7 +1613,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ HFI_U32 height_in_lcus = ((frame_height) + (lcu_size)-1) / \ (lcu_size); \ HFI_U32 num_lcu_in_frame = width_in_lcus * height_in_lcus; \ - size_colloc_mv = (standard == HFI_VIDEO_CODEC_HEVC) ? \ + size_colloc_mv = (standard == HFI_CODEC_ENCODE_HEVC) ? \ (16 * ((num_lcu_in_frame << 2) + BUFFER_ALIGNMENT_32_BYTES)) : \ (3 * 16 * (width_in_lcus * height_in_lcus +\ BUFFER_ALIGNMENT_32_BYTES)); \ @@ -1604,14 +1629,14 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ do \ { \ HFI_BUFFER_COMV_ENC(_size, frame_width, frame_height, 16, \ - num_ref, HFI_VIDEO_CODEC_H264); \ + num_ref, HFI_CODEC_ENCODE_AVC); \ } while (0) #define HFI_BUFFER_COMV_H265E(_size, frame_width, frame_height, num_ref) \ do \ { \ HFI_BUFFER_COMV_ENC(_size, frame_width, frame_height, 32,\ - num_ref, HFI_VIDEO_CODEC_HEVC); \ + num_ref, HFI_CODEC_ENCODE_HEVC); \ } while (0) #define HFI_BUFFER_NON_COMV_ENC(_size, frame_width, frame_height, \ @@ -1621,10 +1646,8 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ HFI_U32 width_in_lcus = 0, height_in_lcus = 0, \ frame_width_coded = 0, frame_height_coded = 0, \ num_lcu_in_frame = 0, num_lcumb = 0; \ - HFI_U32 left_line_buff_metadata_recon__y__size = 0, \ - left_line_buff_metadata_recon__uv__size = 0, \ - line_buff_recon_pix_size = 0, frame_rc_buf_size = 0, \ - se_stats_buf_size = 0; \ + HFI_U32 frame_rc_buf_size = 0, \ + se_stats_buf_size = 0; \ width_in_lcus = ((frame_width) + (lcu_size)-1) / (lcu_size); \ height_in_lcus = ((frame_height) + (lcu_size)-1) / (lcu_size); \ num_lcu_in_frame = width_in_lcus * height_in_lcus; \ @@ -1656,7 +1679,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ do \ { \ HFI_BUFFER_NON_COMV_ENC(_size, frame_width, frame_height, \ - num_vpp_pipes_enc, 16, HFI_VIDEO_CODEC_H264); \ + num_vpp_pipes_enc, 16, HFI_CODEC_ENCODE_AVC); \ } while (0) #define HFI_BUFFER_NON_COMV_H265E(_size, frame_width, frame_height, \ @@ -1664,19 +1687,19 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ do \ { \ HFI_BUFFER_NON_COMV_ENC(_size, frame_width, frame_height, \ - num_vpp_pipes_enc, 32, HFI_VIDEO_CODEC_HEVC); \ + num_vpp_pipes_enc, 32, HFI_CODEC_ENCODE_HEVC); \ } while (0) #define SIZE_ENC_REF_BUFFER(size, frame_width, frame_height) \ do \ { \ HFI_U32 u_buffer_width = 0, u_buffer_height = 0, \ - u_chroma_buffer_height = 0; \ + u_chroma_buffer_height = 0; \ u_buffer_height = HFI_ALIGN(frame_height, \ HFI_VENUS_HEIGHT_ALIGNMENT); \ u_chroma_buffer_height = frame_height >> 1; \ u_chroma_buffer_height = HFI_ALIGN(u_chroma_buffer_height, \ - HFI_VENUS_HEIGHT_ALIGNMENT); \ + HFI_VENUS_HEIGHT_ALIGNMENT); \ u_buffer_width = HFI_ALIGN(frame_width, \ HFI_VENUS_WIDTH_ALIGNMENT); \ size = (u_buffer_height + u_chroma_buffer_height) * \ @@ -1697,15 +1720,15 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ SYSTEM_LAL_TILE10; \ u_ref_stride = 4 * (ref_luma_stride_in_bytes / 3); \ u_ref_stride = (u_ref_stride + (BUF_SIZE_ALIGN_128 - 1)) &\ - (~(BUF_SIZE_ALIGN_128 - 1)); \ + (~(BUF_SIZE_ALIGN_128 - 1)); \ luma_size = ref_buf_height * u_ref_stride; \ ref_chrm_height_in_bytes = (((frame_height + 1) >> 1) + \ - (BUF_SIZE_ALIGN_32 - 1)) & (~(BUF_SIZE_ALIGN_32 - 1)); \ + (BUF_SIZE_ALIGN_32 - 1)) & (~(BUF_SIZE_ALIGN_32 - 1)); \ chroma_size = u_ref_stride * ref_chrm_height_in_bytes; \ luma_size = (luma_size + (BUF_SIZE_ALIGN_4096 - 1)) & \ - (~(BUF_SIZE_ALIGN_4096 - 1)); \ + (~(BUF_SIZE_ALIGN_4096 - 1)); \ chroma_size = (chroma_size + (BUF_SIZE_ALIGN_4096 - 1)) & \ - (~(BUF_SIZE_ALIGN_4096 - 1)); \ + (~(BUF_SIZE_ALIGN_4096 - 1)); \ ref_buf_size = luma_size + chroma_size; \ size = ref_buf_size; \ } while (0) @@ -1717,38 +1740,38 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ do \ { \ HFI_U32 metadata_stride, metadata_buf_height, meta_size_y, \ - meta_size_c;\ + meta_size_c; \ HFI_U32 ten_bit_ref_buf_size = 0, ref_buf_size = 0; \ if (!is_ten_bit) \ { \ SIZE_ENC_REF_BUFFER(ref_buf_size, frame_width, \ - frame_height); \ + frame_height); \ HFI_UBWC_CALC_METADATA_PLANE_STRIDE(metadata_stride, \ - (frame_width),\ - 64, HFI_COLOR_FORMAT_YUV420_NV12_UBWC_Y_TILE_WIDTH); \ + (frame_width), 64, \ + HFI_COLOR_FORMAT_YUV420_NV12_UBWC_Y_TILE_WIDTH); \ HFI_UBWC_METADATA_PLANE_BUFHEIGHT(metadata_buf_height, \ - (frame_height), 16, \ - HFI_COLOR_FORMAT_YUV420_NV12_UBWC_Y_TILE_HEIGHT); \ + (frame_height), 16, \ + HFI_COLOR_FORMAT_YUV420_NV12_UBWC_Y_TILE_HEIGHT); \ HFI_UBWC_METADATA_PLANE_BUFFER_SIZE(meta_size_y, \ - metadata_stride, metadata_buf_height); \ + metadata_stride, metadata_buf_height); \ HFI_UBWC_METADATA_PLANE_BUFFER_SIZE(meta_size_c, \ - metadata_stride, metadata_buf_height); \ + metadata_stride, metadata_buf_height); \ _size = ref_buf_size + meta_size_y + meta_size_c; \ } \ else \ { \ SIZE_ENC_TEN_BIT_REF_BUFFER(ten_bit_ref_buf_size, \ - frame_width, frame_height); \ + frame_width, frame_height); \ HFI_UBWC_CALC_METADATA_PLANE_STRIDE(metadata_stride, \ - frame_width, VENUS_METADATA_STRIDE_MULTIPLE, \ + frame_width, VENUS_METADATA_STRIDE_MULTIPLE, \ HFI_COLOR_FORMAT_YUV420_TP10_UBWC_Y_TILE_WIDTH); \ HFI_UBWC_METADATA_PLANE_BUFHEIGHT(metadata_buf_height, \ - frame_height, VENUS_METADATA_HEIGHT_MULTIPLE, \ + frame_height, VENUS_METADATA_HEIGHT_MULTIPLE, \ HFI_COLOR_FORMAT_YUV420_TP10_UBWC_Y_TILE_HEIGHT); \ HFI_UBWC_METADATA_PLANE_BUFFER_SIZE(meta_size_y, \ - metadata_stride, metadata_buf_height); \ + metadata_stride, metadata_buf_height); \ HFI_UBWC_METADATA_PLANE_BUFFER_SIZE(meta_size_c, \ - metadata_stride, metadata_buf_height); \ + metadata_stride, metadata_buf_height); \ _size = ten_bit_ref_buf_size + meta_size_y + \ meta_size_c; \ } \ @@ -1763,8 +1786,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define HFI_BUFFER_DPB_H265E(_size, frame_width, frame_height, is_ten_bit) \ do \ { \ - HFI_BUFFER_DPB_ENC(_size, frame_width, frame_height, \ - is_ten_bit); \ + HFI_BUFFER_DPB_ENC(_size, frame_width, frame_height, is_ten_bit); \ } while (0) #define HFI_BUFFER_VPSS_ENC(vpss_size, frame_width, frame_height, ds_enable, \ diff --git a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c index f0bfa3a3b8..11599fad8f 100644 --- a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c @@ -3,7 +3,8 @@ * Copyright (c) 2020, The Linux Foundation. All rights reserved. */ -#include +#include "hfi_property.h" +#include "hfi_buffer_iris2.h" #include "msm_vidc_buffer_iris2.h" #include "msm_vidc_buffer.h" #include "msm_vidc_inst.h" @@ -12,998 +13,6 @@ #include "msm_vidc_driver.h" #include "msm_vidc_debug.h" -#define HFI_COLOR_FORMAT_YUV420_NV12_UBWC_Y_TILE_WIDTH 32 -#define HFI_COLOR_FORMAT_YUV420_NV12_UBWC_Y_TILE_HEIGHT 8 -#define HFI_COLOR_FORMAT_YUV420_NV12_UBWC_UV_TILE_WIDTH 16 -#define HFI_COLOR_FORMAT_YUV420_NV12_UBWC_UV_TILE_HEIGHT 8 -#define HFI_COLOR_FORMAT_YUV420_TP10_UBWC_Y_TILE_WIDTH 48 -#define HFI_COLOR_FORMAT_YUV420_TP10_UBWC_Y_TILE_HEIGHT 4 -#define BUFFER_ALIGNMENT_4096_BYTES 4096 -#define VENUS_METADATA_STRIDE_MULTIPLE 64 -#define VENUS_METADATA_HEIGHT_MULTIPLE 16 -#define HFI_UBWC_CALC_METADATA_PLANE_STRIDE \ - ((metadataStride, width, metadataStrideMultiple, tileWidthInPels) \ - metadataStride = ALIGN(((width + (tileWidthInPels - 1)) / \ - tileWidthInPels), metadataStrideMultiple)) -#define HFI_UBWC_METADATA_PLANE_BUFHEIGHT \ - ((metadataBufHeight, height, metadataHeightMultiple, tileHeightInPels) \ - metadataBufHeight = ALIGN(((height + (tileHeightInPels - 1)) / \ - tileHeightInPels), metadataHeightMultiple)) -#define HFI_UBWC_METADATA_PLANE_BUFFER_SIZE \ - ((buffersize, MetadataStride, MetadataBufHeight) \ - buffersize = ALIGN(MetadataStride * MetadataBufHeight, \ - BUFFER_ALIGNMENT_4096_BYTES)) -#define HFI_UBWC_UV_METADATA_PLANE_STRIDE \ - ((metadataStride, width, metadataStrideMultiple, tileWidthInPels) \ - metadataStride = ALIGN(((((width + 1) >> 1) + \ - (tileWidthInPels - 1)) / tileWidthInPels), \ - metadataStrideMultiple)) -#define HFI_UBWC_UV_METADATA_PLANE_BUFHEIGHT \ - ((metadataBufHeight, height, metadataHeightMultiple, tileHeightInPels) \ - metadataBufHeight = ALIGN(((((height + 1) >> 1) + \ - (tileHeightInPels - 1)) / tileHeightInPels), \ - metadataHeightMultiple)) - -#define BUFFER_ALIGNMENT_SIZE(x) x - -#define VENUS_DMA_ALIGNMENT BUFFER_ALIGNMENT_SIZE(256) - -#define MAX_FE_NBR_CTRL_LCU64_LINE_BUFFER_SIZE 64 -#define MAX_FE_NBR_CTRL_LCU32_LINE_BUFFER_SIZE 64 -#define MAX_FE_NBR_CTRL_LCU16_LINE_BUFFER_SIZE 64 -#define MAX_FE_NBR_DATA_LUMA_LINE_BUFFER_SIZE 640 -#define MAX_FE_NBR_DATA_CB_LINE_BUFFER_SIZE 320 -#define MAX_FE_NBR_DATA_CR_LINE_BUFFER_SIZE 320 - -#define MAX_SE_NBR_CTRL_LCU64_LINE_BUFFER_SIZE (128 / 8) -#define MAX_SE_NBR_CTRL_LCU32_LINE_BUFFER_SIZE (128 / 8) -#define MAX_SE_NBR_CTRL_LCU16_LINE_BUFFER_SIZE (128 / 8) - -#define MAX_PE_NBR_DATA_LCU64_LINE_BUFFER_SIZE (64 * 2 * 3) -#define MAX_PE_NBR_DATA_LCU32_LINE_BUFFER_SIZE (32 * 2 * 3) -#define MAX_PE_NBR_DATA_LCU16_LINE_BUFFER_SIZE (16 * 2 * 3) - -#define MAX_TILE_COLUMNS 32 /* 8K/256 */ - -#define VPP_CMD_MAX_SIZE (1 << 20) -#define NUM_HW_PIC_BUF 32 -#define BIN_BUFFER_THRESHOLD (1280 * 736) -#define H264D_MAX_SLICE 1800 -#define SIZE_H264D_BUFTAB_T 256 // sizeof(h264d_buftab_t) aligned to 256 -#define SIZE_H264D_HW_PIC_T (1 << 11) // sizeof(h264d_hw_pic_t) 32 aligned -#define SIZE_H264D_BSE_CMD_PER_BUF (32 * 4) -#define SIZE_H264D_VPP_CMD_PER_BUF 512 - -// Line Buffer definitions -/* one for luma and 1/2 for each chroma */ -#define SIZE_H264D_LB_FE_TOP_DATA(width, height) \ - (MAX_FE_NBR_DATA_LUMA_LINE_BUFFER_SIZE * \ - ALIGN(width, 16) * 3) - -#define SIZE_H264D_LB_FE_TOP_CTRL(width, height) \ - (MAX_FE_NBR_CTRL_LCU64_LINE_BUFFER_SIZE * \ - ((width + 15) >> 4)) - -#define SIZE_H264D_LB_FE_LEFT_CTRL(width, height) \ - (MAX_FE_NBR_CTRL_LCU64_LINE_BUFFER_SIZE * \ - ((height + 15) >> 4)) - -#define SIZE_H264D_LB_SE_TOP_CTRL(width, height) \ - (MAX_SE_NBR_CTRL_LCU64_LINE_BUFFER_SIZE * \ - ((width + 15) >> 4)) - -#define SIZE_H264D_LB_SE_LEFT_CTRL(width, height) \ - (MAX_SE_NBR_CTRL_LCU64_LINE_BUFFER_SIZE * \ - ((height + 15) >> 4)) - -#define SIZE_H264D_LB_PE_TOP_DATA(width, height) \ - (MAX_PE_NBR_DATA_LCU64_LINE_BUFFER_SIZE * \ - ((width + 15) >> 4)) - -#define SIZE_H264D_LB_VSP_TOP(width, height) \ - ((((width + 15) >> 4) << 7)) - -#define SIZE_H264D_LB_RECON_DMA_METADATA_WR(width, height) \ - (ALIGN(height, 16) * 32) - -#define SIZE_H264D_QP(width, height) \ - (((width + 63) >> 6) * ((height + 63) >> 6) * 128) - -#define SIZE_HW_PIC(sizePerBuf) \ - (NUM_HW_PIC_BUF * sizePerBuf) - -#define H264_CABAC_HDR_RATIO_HD_TOT 1 -#define H264_CABAC_RES_RATIO_HD_TOT 3 - -/* - * some content need more bin buffer, but limit buffer - * size for high resolution - */ -#define NUM_SLIST_BUF_H264 (256 + 32) -#define SIZE_SLIST_BUF_H264 512 - -#define LCU_MAX_SIZE_PELS 64 -#define LCU_MIN_SIZE_PELS 16 - -#define H265D_MAX_SLICE 3600 -#define SIZE_H265D_HW_PIC_T SIZE_H264D_HW_PIC_T -#define SIZE_H265D_BSE_CMD_PER_BUF (16 * sizeof(u32)) -#define SIZE_H265D_VPP_CMD_PER_BUF 256 - -#define SIZE_H265D_LB_FE_TOP_DATA(width, height) \ - (MAX_FE_NBR_DATA_LUMA_LINE_BUFFER_SIZE * \ - (ALIGN(width, 64) + 8) * 2) - -#define SIZE_H265D_LB_FE_TOP_CTRL(width, height) \ - (MAX_FE_NBR_CTRL_LCU64_LINE_BUFFER_SIZE * \ - (ALIGN(width, LCU_MAX_SIZE_PELS) / LCU_MIN_SIZE_PELS)) - -#define SIZE_H265D_LB_FE_LEFT_CTRL(width, height) \ - (MAX_FE_NBR_CTRL_LCU64_LINE_BUFFER_SIZE * \ - (ALIGN(height, LCU_MAX_SIZE_PELS) / LCU_MIN_SIZE_PELS)) - -#define SIZE_H265D_LB_SE_TOP_CTRL(width, height) \ - ((LCU_MAX_SIZE_PELS / 8 * (128 / 8)) * \ - ((width + 15) >> 4)) - -#define SIZE_H265D_LB_SE_LEFT_CTRL(width, height) \ - (max(((height + 16 - 1) / 8) * MAX_SE_NBR_CTRL_LCU16_LINE_BUFFER_SIZE,\ - max(((height + 32 - 1) / 8) * MAX_SE_NBR_CTRL_LCU32_LINE_BUFFER_SIZE, \ - ((height + 64 - 1) / 8) * MAX_SE_NBR_CTRL_LCU64_LINE_BUFFER_SIZE))) - -#define SIZE_H265D_LB_PE_TOP_DATA(width, height) \ - (MAX_PE_NBR_DATA_LCU64_LINE_BUFFER_SIZE * \ - (ALIGN(width, LCU_MIN_SIZE_PELS) / LCU_MIN_SIZE_PELS)) - -#define SIZE_H265D_LB_VSP_TOP(width, height) \ - (((width + 63) >> 6) * 128) - -#define SIZE_H265D_LB_VSP_LEFT(width, height) \ - (((height + 63) >> 6) * 128) - -#define SIZE_H265D_LB_RECON_DMA_METADATA_WR(width, height) \ - SIZE_H264D_LB_RECON_DMA_METADATA_WR(width, height) - -#define SIZE_H265D_QP(width, height) SIZE_H264D_QP(width, height) - -#define H265_CABAC_HDR_RATIO_HD_TOT 2 -#define H265_CABAC_RES_RATIO_HD_TOT 2 - -/* - * some content need more bin buffer, but limit buffer size - * for high resolution - */ -#define SIZE_SLIST_BUF_H265 (1 << 10) -#define NUM_SLIST_BUF_H265 (80 + 20) -#define H265_NUM_TILE_COL 32 -#define H265_NUM_TILE_ROW 128 -#define H265_NUM_TILE (H265_NUM_TILE_ROW * H265_NUM_TILE_COL + 1) - -#define SIZE_VPXD_LB_FE_LEFT_CTRL(width, height) \ - max(((height + 15) >> 4) * MAX_FE_NBR_CTRL_LCU16_LINE_BUFFER_SIZE, \ - max(((height + 31) >> 5) * MAX_FE_NBR_CTRL_LCU32_LINE_BUFFER_SIZE, \ - ((height + 63) >> 6) * MAX_FE_NBR_CTRL_LCU64_LINE_BUFFER_SIZE)) -#define SIZE_VPXD_LB_FE_TOP_CTRL(width, height) \ - (((ALIGN(width, 64) + 8) * 10 * 2)) /* + small line */ -#define SIZE_VPXD_LB_SE_TOP_CTRL(width, height) \ - (((width + 15) >> 4) * MAX_FE_NBR_CTRL_LCU16_LINE_BUFFER_SIZE) -#define SIZE_VPXD_LB_SE_LEFT_CTRL(width, height) \ - max(((height + 15) >> 4) * MAX_SE_NBR_CTRL_LCU16_LINE_BUFFER_SIZE, \ - max(((height + 31) >> 5) * MAX_SE_NBR_CTRL_LCU32_LINE_BUFFER_SIZE, \ - ((height + 63) >> 6) * MAX_SE_NBR_CTRL_LCU64_LINE_BUFFER_SIZE)) -#define SIZE_VPXD_LB_RECON_DMA_METADATA_WR(width, height) \ - ALIGN((ALIGN(height, 16) / (4 / 2)) * 64, BUFFER_ALIGNMENT_SIZE(32)) -#define SIZE_VP8D_LB_FE_TOP_DATA(width, height) \ - ((ALIGN(width, 16) + 8) * 10 * 2) -#define SIZE_VP9D_LB_FE_TOP_DATA(width, height) \ - ((ALIGN(ALIGN(width, 16), 64) + 8) * 10 * 2) -#define SIZE_VP8D_LB_PE_TOP_DATA(width, height) \ - ((ALIGN(width, 16) >> 4) * 64) -#define SIZE_VP9D_LB_PE_TOP_DATA(width, height) \ - ((ALIGN(ALIGN(width, 16), 64) >> 6) * 176) -#define SIZE_VP8D_LB_VSP_TOP(width, height) \ - (((ALIGN(width, 16) >> 4) * 64 / 2) + 256) -#define SIZE_VP9D_LB_VSP_TOP(width, height) \ - (((ALIGN(ALIGN(width, 16), 64) >> 6) * 64 * 8) + 256) - - -#define HFI_IRIS2_VP9D_COMV_SIZE \ - ((((8192 + 63) >> 6) * ((4320 + 63) >> 6) * 8 * 8 * 2 * 8)) - -#define VPX_DECODER_FRAME_CONCURENCY_LVL 2 -#define VPX_DECODER_FRAME_BIN_HDR_BUDGET_RATIO_NUM 1 -#define VPX_DECODER_FRAME_BIN_HDR_BUDGET_RATIO_DEN 2 -#define VPX_DECODER_FRAME_BIN_RES_BUDGET_RATIO_NUM 3 -#define VPX_DECODER_FRAME_BIN_RES_BUDGET_RATIO_DEN 2 - -#define VP8_NUM_FRAME_INFO_BUF (5 + 1) -#define VP9_NUM_FRAME_INFO_BUF (32) -#define VP8_NUM_PROBABILITY_TABLE_BUF (VP8_NUM_FRAME_INFO_BUF) -#define VP9_NUM_PROBABILITY_TABLE_BUF (VP9_NUM_FRAME_INFO_BUF + 4) -#define VP8_PROB_TABLE_SIZE 3840 -#define VP9_PROB_TABLE_SIZE 3840 - -#define VP9_UDC_HEADER_BUF_SIZE (3 * 128) -#define MAX_SUPERFRAME_HEADER_LEN (34) -#define CCE_TILE_OFFSET_SIZE ALIGN(32 * 4 * 4, BUFFER_ALIGNMENT_SIZE(32)) - -#define QMATRIX_SIZE (sizeof(u32) * 128 + 256) -#define MP2D_QPDUMP_SIZE 115200 - -#define HFI_IRIS2_ENC_PERSIST_SIZE 204800 - -#define HFI_MAX_COL_FRAME 6 -#define HFI_VENUS_VENC_TRE_WB_BUFF_SIZE (65 << 4) // bytes -#define HFI_VENUS_VENC_DB_LINE_BUFF_PER_MB 512 -#define HFI_VENUS_VPPSG_MAX_REGISTERS 2048 -#define HFI_VENUS_WIDTH_ALIGNMENT 128 -#define HFI_VENUS_WIDTH_TEN_BIT_ALIGNMENT 192 -#define HFI_VENUS_HEIGHT_ALIGNMENT 32 - -#define SYSTEM_LAL_TILE10 192 -#define HDR10_HIST_EXTRADATA_SIZE 4096 - -static u32 size_vpss_lb(u32 width, u32 height, u32 num_vpp_pipes) -{ - u32 vpss_4tap_top_buffer_size, vpss_div2_top_buffer_size; - u32 vpss_4tap_left_buffer_size, vpss_div2_left_buffer_size; - u32 opb_wr_top_line_luma_buf_size, opb_wr_top_line_chroma_buf_size; - u32 opb_lb_wr_llb_y_buffer_size, opb_lb_wr_llb_uv_buffer_size; - u32 macrotiling_size; - u32 size = 0; - - vpss_4tap_top_buffer_size = vpss_div2_top_buffer_size = - vpss_4tap_left_buffer_size = vpss_div2_left_buffer_size = 0; - macrotiling_size = 32; - opb_wr_top_line_luma_buf_size = ALIGN(width, macrotiling_size) / - macrotiling_size * 256; - opb_wr_top_line_luma_buf_size = ALIGN(opb_wr_top_line_luma_buf_size, - VENUS_DMA_ALIGNMENT) + (MAX_TILE_COLUMNS - 1) * 256; - opb_wr_top_line_luma_buf_size = max(opb_wr_top_line_luma_buf_size, - (32 * ALIGN(height, 16))); - opb_wr_top_line_chroma_buf_size = opb_wr_top_line_luma_buf_size; - opb_lb_wr_llb_uv_buffer_size = opb_lb_wr_llb_y_buffer_size = - ALIGN((ALIGN(height, 16) / 2) * - 64, BUFFER_ALIGNMENT_SIZE(32)); - size = num_vpp_pipes * 2 * (vpss_4tap_top_buffer_size + - vpss_div2_top_buffer_size) + - 2 * (vpss_4tap_left_buffer_size + - vpss_div2_left_buffer_size) + - opb_wr_top_line_luma_buf_size + - opb_wr_top_line_chroma_buf_size + - opb_lb_wr_llb_uv_buffer_size + - opb_lb_wr_llb_y_buffer_size; - - return size; -} - -static u32 hfi_iris2_h264d_comv_size(u32 width, u32 height, - u32 yuv_buf_min_count) -{ - u32 comv_size = 0; - u32 frame_width_in_mbs = ((width + 15) >> 4); - u32 frame_height_in_mbs = ((height + 15) >> 4); - u32 col_mv_aligned_width = (frame_width_in_mbs << 7); - u32 col_zero_aligned_width = (frame_width_in_mbs << 2); - u32 col_zero_size = 0, size_colloc = 0; - - col_mv_aligned_width = ALIGN(col_mv_aligned_width, - BUFFER_ALIGNMENT_SIZE(16)); - col_zero_aligned_width = ALIGN(col_zero_aligned_width, - BUFFER_ALIGNMENT_SIZE(16)); - col_zero_size = col_zero_aligned_width * - ((frame_height_in_mbs + 1) >> 1); - col_zero_size = ALIGN(col_zero_size, BUFFER_ALIGNMENT_SIZE(64)); - col_zero_size <<= 1; - col_zero_size = ALIGN(col_zero_size, BUFFER_ALIGNMENT_SIZE(512)); - size_colloc = col_mv_aligned_width * ((frame_height_in_mbs + 1) >> 1); - size_colloc = ALIGN(size_colloc, BUFFER_ALIGNMENT_SIZE(64)); - size_colloc <<= 1; - size_colloc = ALIGN(size_colloc, BUFFER_ALIGNMENT_SIZE(512)); - size_colloc += (col_zero_size + SIZE_H264D_BUFTAB_T * 2); - comv_size = size_colloc * yuv_buf_min_count; - comv_size += BUFFER_ALIGNMENT_SIZE(512); - - return comv_size; -} - -static u32 size_h264d_bse_cmd_buf(u32 height) -{ - u32 aligned_height = ALIGN(height, BUFFER_ALIGNMENT_SIZE(32)); - - return min_t(u32, (((aligned_height + 15) >> 4) * 3 * 4), - H264D_MAX_SLICE) * - SIZE_H264D_BSE_CMD_PER_BUF; -} - -static u32 size_h264d_vpp_cmd_buf(u32 height) -{ - u32 size = 0; - u32 aligned_height = ALIGN(height, BUFFER_ALIGNMENT_SIZE(32)); - - size = min_t(u32, (((aligned_height + 15) >> 4) * 3 * 4), - H264D_MAX_SLICE) * - SIZE_H264D_VPP_CMD_PER_BUF; - if (size > VPP_CMD_MAX_SIZE) - size = VPP_CMD_MAX_SIZE; - return size; -} - -static u32 hfi_iris2_h264d_non_comv_size(u32 width, u32 height, - u32 num_vpp_pipes) -{ - u32 size; - u32 size_bse, size_vpp; - - size_bse = size_h264d_bse_cmd_buf(height); - size_vpp = size_h264d_vpp_cmd_buf(height); - size = ALIGN(size_bse, VENUS_DMA_ALIGNMENT) + - ALIGN(size_vpp, VENUS_DMA_ALIGNMENT) + - ALIGN(SIZE_HW_PIC(SIZE_H264D_HW_PIC_T), VENUS_DMA_ALIGNMENT) + - ALIGN(SIZE_H264D_LB_FE_TOP_DATA(width, height), - VENUS_DMA_ALIGNMENT) + - ALIGN(SIZE_H264D_LB_FE_TOP_CTRL(width, height), - VENUS_DMA_ALIGNMENT) + - ALIGN(SIZE_H264D_LB_FE_LEFT_CTRL(width, height), - VENUS_DMA_ALIGNMENT) * num_vpp_pipes + - ALIGN(SIZE_H264D_LB_SE_TOP_CTRL(width, height), - VENUS_DMA_ALIGNMENT) + - ALIGN(SIZE_H264D_LB_SE_LEFT_CTRL(width, height), - VENUS_DMA_ALIGNMENT) * num_vpp_pipes + - ALIGN(SIZE_H264D_LB_PE_TOP_DATA(width, height), - VENUS_DMA_ALIGNMENT) + - ALIGN(SIZE_H264D_LB_VSP_TOP(width, height), - VENUS_DMA_ALIGNMENT) + - ALIGN(SIZE_H264D_LB_RECON_DMA_METADATA_WR(width, height), - VENUS_DMA_ALIGNMENT) * 2 + - ALIGN(SIZE_H264D_QP(width, height), VENUS_DMA_ALIGNMENT); - size = ALIGN(size, VENUS_DMA_ALIGNMENT); - return size; -} - -static u32 size_h264d_hw_bin_buffer(u32 width, u32 height, u32 delay, - u32 num_vpp_pipes) -{ - u32 size_yuv, size_bin_hdr, size_bin_res; - u32 size = 0; - u32 product; - - product = width * height; - size_yuv = (product <= BIN_BUFFER_THRESHOLD) ? - ((BIN_BUFFER_THRESHOLD * 3) >> 1) : - ((product * 3) >> 1); - - size_bin_hdr = size_yuv * H264_CABAC_HDR_RATIO_HD_TOT; - size_bin_res = size_yuv * H264_CABAC_RES_RATIO_HD_TOT; - size_bin_hdr = size_bin_hdr * (((((u32)(delay)) & 31) / 10) + 2) / 2; - size_bin_res = size_bin_res * (((((u32)(delay)) & 31) / 10) + 2) / 2; - size_bin_hdr = ALIGN(size_bin_hdr / num_vpp_pipes, - VENUS_DMA_ALIGNMENT) * num_vpp_pipes; - size_bin_res = ALIGN(size_bin_res / num_vpp_pipes, - VENUS_DMA_ALIGNMENT) * num_vpp_pipes; - size = size_bin_hdr + size_bin_res; - return size; -} - -static u32 calculate_h264d_scratch_size(struct msm_vidc_inst *inst, - u32 width, u32 height, bool is_interlaced, u32 delay, u32 num_vpp_pipes) -{ - u32 aligned_width = ALIGN(width, BUFFER_ALIGNMENT_SIZE(16)); - u32 aligned_height = ALIGN(height, BUFFER_ALIGNMENT_SIZE(16)); - u32 size = 0; - - if (!is_interlaced) - size = size_h264d_hw_bin_buffer(aligned_width, aligned_height, - delay, num_vpp_pipes); - else - size = 0; - - return size; -} - -static u32 size_h265d_bse_cmd_buf(u32 width, u32 height) -{ - u32 size; - - size = (ALIGN(width, LCU_MAX_SIZE_PELS) / LCU_MIN_SIZE_PELS) * - (ALIGN(height, LCU_MAX_SIZE_PELS) / LCU_MIN_SIZE_PELS) * - NUM_HW_PIC_BUF; - size = min_t(u32, size, H265D_MAX_SLICE + 1); - size = 2 * size * SIZE_H265D_BSE_CMD_PER_BUF; - size = ALIGN(size, VENUS_DMA_ALIGNMENT); - - return size; -} - -static u32 size_h265d_vpp_cmd_buf(u32 width, u32 height) -{ - u32 size = 0; - - size = (ALIGN(width, LCU_MAX_SIZE_PELS) / LCU_MIN_SIZE_PELS) * - (ALIGN(height, LCU_MAX_SIZE_PELS) / LCU_MIN_SIZE_PELS) * - NUM_HW_PIC_BUF; - size = min_t(u32, size, H265D_MAX_SLICE + 1); - size = ALIGN(size, 4); - size = 2 * size * SIZE_H265D_VPP_CMD_PER_BUF; - size = ALIGN(size, VENUS_DMA_ALIGNMENT); - if (size > VPP_CMD_MAX_SIZE) - size = VPP_CMD_MAX_SIZE; - return size; -} - -static u32 hfi_iris2_h265d_comv_size(u32 width, u32 height, - u32 yuv_buf_count_min) -{ - u32 size = 0; - - size = ALIGN(((((width + 15) >> 4) * ((height + 15) >> 4)) << 8), - BUFFER_ALIGNMENT_SIZE(512)); - size *= yuv_buf_count_min; - size += BUFFER_ALIGNMENT_SIZE(512); - - return size; -} - -static u32 hfi_iris2_h265d_non_comv_size(u32 width, u32 height, - u32 num_vpp_pipes) -{ - u32 size_bse, size_vpp; - u32 size = 0; - - size_bse = size_h265d_bse_cmd_buf(width, height); - size_vpp = size_h265d_vpp_cmd_buf(width, height); - size = ALIGN(size_bse, VENUS_DMA_ALIGNMENT) + - ALIGN(size_vpp, VENUS_DMA_ALIGNMENT) + - ALIGN(NUM_HW_PIC_BUF * 20 * 22 * 4, VENUS_DMA_ALIGNMENT) + - ALIGN(2 * sizeof(u16) * - (ALIGN(width, LCU_MAX_SIZE_PELS) / LCU_MIN_SIZE_PELS) * - (ALIGN(height, LCU_MAX_SIZE_PELS) / LCU_MIN_SIZE_PELS), - VENUS_DMA_ALIGNMENT) + - ALIGN(SIZE_HW_PIC(SIZE_H265D_HW_PIC_T), VENUS_DMA_ALIGNMENT) + - ALIGN(SIZE_H265D_LB_FE_TOP_DATA(width, height), - VENUS_DMA_ALIGNMENT) + - ALIGN(SIZE_H265D_LB_FE_TOP_CTRL(width, height), - VENUS_DMA_ALIGNMENT) + - ALIGN(SIZE_H265D_LB_FE_LEFT_CTRL(width, height), - VENUS_DMA_ALIGNMENT) * num_vpp_pipes + - ALIGN(SIZE_H265D_LB_SE_LEFT_CTRL(width, height), - VENUS_DMA_ALIGNMENT) * num_vpp_pipes + - ALIGN(SIZE_H265D_LB_SE_TOP_CTRL(width, height), - VENUS_DMA_ALIGNMENT) + - ALIGN(SIZE_H265D_LB_PE_TOP_DATA(width, height), - VENUS_DMA_ALIGNMENT) + - ALIGN(SIZE_H265D_LB_VSP_TOP(width, height), - VENUS_DMA_ALIGNMENT) + - ALIGN(SIZE_H265D_LB_VSP_LEFT(width, height), - VENUS_DMA_ALIGNMENT) * num_vpp_pipes + - ALIGN(SIZE_H265D_LB_RECON_DMA_METADATA_WR(width, height), - VENUS_DMA_ALIGNMENT) * 4 + - ALIGN(SIZE_H265D_QP(width, height), VENUS_DMA_ALIGNMENT); - size = ALIGN(size, VENUS_DMA_ALIGNMENT); - return size; -} - -static u32 size_h265d_hw_bin_buffer(u32 width, u32 height, u32 delay, - u32 num_vpp_pipes) -{ - u32 size = 0; - u32 size_yuv, size_bin_hdr, size_bin_res; - u32 product; - - product = width * height; - size_yuv = (product <= BIN_BUFFER_THRESHOLD) ? - ((BIN_BUFFER_THRESHOLD * 3) >> 1) : - ((product * 3) >> 1); - size_bin_hdr = size_yuv * H265_CABAC_HDR_RATIO_HD_TOT; - size_bin_res = size_yuv * H265_CABAC_RES_RATIO_HD_TOT; - size_bin_hdr = size_bin_hdr * (((((u32)(delay)) & 31) / 10) + 2) / 2; - size_bin_res = size_bin_res * (((((u32)(delay)) & 31) / 10) + 2) / 2; - size_bin_hdr = ALIGN(size_bin_hdr / num_vpp_pipes, - VENUS_DMA_ALIGNMENT) * num_vpp_pipes; - size_bin_res = ALIGN(size_bin_res / num_vpp_pipes, - VENUS_DMA_ALIGNMENT) * num_vpp_pipes; - size = size_bin_hdr + size_bin_res; - - return size; -} - -static u32 calculate_h265d_scratch_size(struct msm_vidc_inst *inst, - u32 width, u32 height, bool is_interlaced, u32 delay, u32 num_vpp_pipes) -{ - u32 aligned_width = ALIGN(width, BUFFER_ALIGNMENT_SIZE(16)); - u32 aligned_height = ALIGN(height, BUFFER_ALIGNMENT_SIZE(16)); - u32 size = 0; - - if (!is_interlaced) - size = size_h265d_hw_bin_buffer(aligned_width, aligned_height, - delay, num_vpp_pipes); - else - size = 0; - - return size; -} - -static u32 calculate_vpxd_scratch_size(struct msm_vidc_inst *inst, - u32 width, u32 height, bool is_interlaced, u32 delay, u32 num_vpp_pipes) -{ - u32 aligned_width = ALIGN(width, BUFFER_ALIGNMENT_SIZE(16)); - u32 aligned_height = ALIGN(height, BUFFER_ALIGNMENT_SIZE(16)); - u32 size = 0; - u32 size_yuv = aligned_width * aligned_height * 3 / 2; - - if (!is_interlaced) { - /* binbuffer1_size + binbufer2_size */ - u32 binbuffer1_size = 0, binbuffer2_size = 0; - - binbuffer1_size = ALIGN(max_t(u32, size_yuv, - ((BIN_BUFFER_THRESHOLD * 3) >> 1)) * - VPX_DECODER_FRAME_CONCURENCY_LVL * - VPX_DECODER_FRAME_BIN_HDR_BUDGET_RATIO_NUM / - VPX_DECODER_FRAME_BIN_HDR_BUDGET_RATIO_DEN, - VENUS_DMA_ALIGNMENT); - binbuffer2_size = ALIGN(max_t(u32, size_yuv, - ((BIN_BUFFER_THRESHOLD * 3) >> 1)) * - VPX_DECODER_FRAME_CONCURENCY_LVL * - VPX_DECODER_FRAME_BIN_RES_BUDGET_RATIO_NUM / - VPX_DECODER_FRAME_BIN_RES_BUDGET_RATIO_DEN, - VENUS_DMA_ALIGNMENT); - size = binbuffer1_size + binbuffer2_size; - size = size * num_vpp_pipes; - } else { - size = 0; - } - - return size; -} - -static u32 calculate_mpeg2d_scratch_size(struct msm_vidc_inst *inst, - u32 width, u32 height, bool is_interlaced, u32 delay, u32 num_vpp_pipes) -{ - return 0; -} - -static u32 calculate_enc_scratch_size(struct msm_vidc_inst *inst, - u32 width, u32 height, u32 work_mode, u32 lcu_size, u32 num_vpp_pipes) -{ - u32 aligned_width, aligned_height, bitstream_size; - u32 total_bitbin_buffers = 0, size_singlePipe, bitbin_size = 0; - u32 sao_bin_buffer_size, padded_bin_size, size = 0; - - aligned_width = ALIGN(width, lcu_size); - aligned_height = ALIGN(height, lcu_size); - bitstream_size = msm_vidc_encoder_output_size(inst); - - bitstream_size = ALIGN(bitstream_size, VENUS_DMA_ALIGNMENT); - if (1) { // TODO: work_mode == HFI_WORKMODE_2) { - s_vpr_e(inst->sid, "work mode 2\n"); - total_bitbin_buffers = 3; - bitbin_size = bitstream_size * 17 / 10; - bitbin_size = ALIGN(bitbin_size, VENUS_DMA_ALIGNMENT); - } else { - total_bitbin_buffers = 1; - bitstream_size = aligned_width * aligned_height * 3; - bitbin_size = ALIGN(bitstream_size, VENUS_DMA_ALIGNMENT); - } - if (num_vpp_pipes > 2) - size_singlePipe = bitbin_size / 2; - else - size_singlePipe = bitbin_size; - // TODO - //if (inst->rc_type == RATE_CONTROL_LOSSLESS) - // size_singlePipe <<= 1; - size_singlePipe = ALIGN(size_singlePipe, VENUS_DMA_ALIGNMENT); - sao_bin_buffer_size = (64 * (((width + BUFFER_ALIGNMENT_SIZE(32)) * - (height + BUFFER_ALIGNMENT_SIZE(32))) >> 10)) + 384; - padded_bin_size = ALIGN(size_singlePipe, VENUS_DMA_ALIGNMENT); - size_singlePipe = sao_bin_buffer_size + padded_bin_size; - size_singlePipe = ALIGN(size_singlePipe, VENUS_DMA_ALIGNMENT); - bitbin_size = size_singlePipe * num_vpp_pipes; - size = ALIGN(bitbin_size, VENUS_DMA_ALIGNMENT) * total_bitbin_buffers - + 512; - - return size; -} - -static u32 calculate_h264e_scratch_size(struct msm_vidc_inst *inst, - u32 width, u32 height, u32 work_mode, u32 num_vpp_pipes) -{ - return calculate_enc_scratch_size(inst, width, height, work_mode, 16, - num_vpp_pipes); -} - -static u32 calculate_h265e_scratch_size(struct msm_vidc_inst *inst, - u32 width, u32 height, u32 work_mode, u32 num_vpp_pipes) -{ - return calculate_enc_scratch_size(inst, width, height, work_mode, 32, - num_vpp_pipes); -} - -static u32 calculate_h264d_scratch1_size(struct msm_vidc_inst *inst, - u32 width, u32 height, u32 min_buf_count, - bool split_mode_enabled, u32 num_vpp_pipes) -{ - u32 co_mv_size = 0, nonco_mv_size = 0; - u32 vpss_lb_size = 0; - u32 size = 0; - - co_mv_size = hfi_iris2_h264d_comv_size(width, height, min_buf_count); - nonco_mv_size = hfi_iris2_h264d_non_comv_size(width, height, - num_vpp_pipes); - if (split_mode_enabled) - vpss_lb_size = size_vpss_lb(width, height, num_vpp_pipes); - size = co_mv_size + nonco_mv_size + vpss_lb_size; - return size; -} - -static u32 calculate_h265d_scratch1_size(struct msm_vidc_inst *inst, - u32 width, u32 height, u32 min_buf_count, - bool split_mode_enabled, u32 num_vpp_pipes) -{ - u32 co_mv_size = 0, nonco_mv_size = 0; - u32 vpss_lb_size = 0; - u32 size = 0; - - co_mv_size = hfi_iris2_h265d_comv_size(width, height, min_buf_count); - nonco_mv_size = - hfi_iris2_h265d_non_comv_size(width, height, num_vpp_pipes); - if (split_mode_enabled) - vpss_lb_size = size_vpss_lb(width, height, num_vpp_pipes); - - size = co_mv_size + nonco_mv_size + vpss_lb_size + - HDR10_HIST_EXTRADATA_SIZE; - return size; -} - -static u32 calculate_vp9d_scratch1_size(struct msm_vidc_inst *inst, - u32 width, u32 height, u32 min_buf_count, - bool split_mode_enabled, u32 num_vpp_pipes) -{ - u32 vpss_lb_size = 0; - u32 size = 0; - - size = ALIGN(SIZE_VPXD_LB_FE_LEFT_CTRL(width, height), - VENUS_DMA_ALIGNMENT) * num_vpp_pipes + - ALIGN(SIZE_VPXD_LB_SE_LEFT_CTRL(width, height), - VENUS_DMA_ALIGNMENT) * num_vpp_pipes + - ALIGN(SIZE_VP9D_LB_VSP_TOP(width, height), - VENUS_DMA_ALIGNMENT) + - ALIGN(SIZE_VPXD_LB_FE_TOP_CTRL(width, height), - VENUS_DMA_ALIGNMENT) + - 2 * ALIGN(SIZE_VPXD_LB_RECON_DMA_METADATA_WR(width, height), - VENUS_DMA_ALIGNMENT) + - ALIGN(SIZE_VPXD_LB_SE_TOP_CTRL(width, height), - VENUS_DMA_ALIGNMENT) + - ALIGN(SIZE_VP9D_LB_PE_TOP_DATA(width, height), - VENUS_DMA_ALIGNMENT) + - ALIGN(SIZE_VP9D_LB_FE_TOP_DATA(width, height), - VENUS_DMA_ALIGNMENT); - if (split_mode_enabled) - vpss_lb_size = size_vpss_lb(width, height, num_vpp_pipes); - - size += vpss_lb_size + HDR10_HIST_EXTRADATA_SIZE; - return size; -} - -static u32 calculate_mpeg2d_scratch1_size(struct msm_vidc_inst *inst, - u32 width, u32 height, u32 min_buf_count, - bool split_mode_enabled, u32 num_vpp_pipes) -{ - u32 vpss_lb_size = 0; - u32 size = 0; - - size = ALIGN(SIZE_VPXD_LB_FE_LEFT_CTRL(width, height), - VENUS_DMA_ALIGNMENT) * num_vpp_pipes + - ALIGN(SIZE_VPXD_LB_SE_LEFT_CTRL(width, height), - VENUS_DMA_ALIGNMENT) * num_vpp_pipes + - ALIGN(SIZE_VP8D_LB_VSP_TOP(width, height), - VENUS_DMA_ALIGNMENT) + - ALIGN(SIZE_VPXD_LB_FE_TOP_CTRL(width, height), - VENUS_DMA_ALIGNMENT) + - 2 * ALIGN(SIZE_VPXD_LB_RECON_DMA_METADATA_WR(width, height), - VENUS_DMA_ALIGNMENT) + - ALIGN(SIZE_VPXD_LB_SE_TOP_CTRL(width, height), - VENUS_DMA_ALIGNMENT) + - ALIGN(SIZE_VP8D_LB_PE_TOP_DATA(width, height), - VENUS_DMA_ALIGNMENT) + - ALIGN(SIZE_VP8D_LB_FE_TOP_DATA(width, height), - VENUS_DMA_ALIGNMENT); - if (split_mode_enabled) - vpss_lb_size = size_vpss_lb(width, height, num_vpp_pipes); - - size += vpss_lb_size; - return size; -} - -static u32 calculate_enc_scratch1_size(struct msm_vidc_inst *inst, - u32 width, u32 height, u32 lcu_size, u32 num_ref, bool ten_bit, - u32 num_vpp_pipes, bool is_h265) -{ - u32 line_buf_ctrl_size, line_buf_data_size, leftline_buf_ctrl_size; - u32 line_buf_sde_size, sps_pps_slice_hdr, topline_buf_ctrl_size_FE; - u32 leftline_buf_ctrl_size_FE, line_buf_recon_pix_size; - u32 leftline_buf_recon_pix_size, lambda_lut_size, override_buffer_size; - u32 col_mv_buf_size, vpp_reg_buffer_size, ir_buffer_size; - u32 vpss_line_buf, leftline_buf_meta_recony, col_rc_buf_size; - u32 h265e_framerc_bufsize, h265e_lcubitcnt_bufsize; - u32 h265e_lcubitmap_bufsize, se_stats_bufsize; - u32 bse_reg_buffer_size, bse_slice_cmd_buffer_size, slice_info_bufsize; - u32 line_buf_ctrl_size_buffid2, slice_cmd_buffer_size; - u32 width_lcu_num, height_lcu_num, width_coded, height_coded; - u32 frame_num_lcu, linebuf_meta_recon_uv, topline_bufsize_fe_1stg_sao; - u32 output_mv_bufsize = 0, temp_scratch_mv_bufsize = 0; - u32 size, bit_depth, num_LCUMB; - u32 vpss_lineBufferSize_1 = 0; - u32 width_mb_num = ((width + 15) >> 4); - u32 height_mb_num = ((height + 15) >> 4); - - width_lcu_num = ((width)+(lcu_size)-1) / (lcu_size); - height_lcu_num = ((height)+(lcu_size)-1) / (lcu_size); - frame_num_lcu = width_lcu_num * height_lcu_num; - width_coded = width_lcu_num * (lcu_size); - height_coded = height_lcu_num * (lcu_size); - num_LCUMB = (height_coded / lcu_size) * ((width_coded + lcu_size * 8) / lcu_size); - slice_info_bufsize = (256 + (frame_num_lcu << 4)); - slice_info_bufsize = ALIGN(slice_info_bufsize, VENUS_DMA_ALIGNMENT); - line_buf_ctrl_size = ALIGN(width_coded, VENUS_DMA_ALIGNMENT); - line_buf_ctrl_size_buffid2 = ALIGN(width_coded, VENUS_DMA_ALIGNMENT); - - bit_depth = ten_bit ? 10 : 8; - line_buf_data_size = (((((bit_depth * width_coded + 1024) + - (VENUS_DMA_ALIGNMENT - 1)) & (~(VENUS_DMA_ALIGNMENT - 1))) * 1) + - (((((bit_depth * width_coded + 1024) >> 1) + - (VENUS_DMA_ALIGNMENT - 1)) & - (~(VENUS_DMA_ALIGNMENT - 1))) * 2)); - leftline_buf_ctrl_size = (is_h265) ? - ((height_coded + (BUFFER_ALIGNMENT_SIZE(32))) / - BUFFER_ALIGNMENT_SIZE(32) * 4 * 16) : - ((height_coded + 15) / 16 * 5 * 16); - if (num_vpp_pipes > 1) { - leftline_buf_ctrl_size += BUFFER_ALIGNMENT_SIZE(512); - leftline_buf_ctrl_size = ALIGN(leftline_buf_ctrl_size, - BUFFER_ALIGNMENT_SIZE(512)) * num_vpp_pipes; - } - leftline_buf_ctrl_size = ALIGN(leftline_buf_ctrl_size, - VENUS_DMA_ALIGNMENT); - leftline_buf_recon_pix_size = (((ten_bit + 1) * 2 * - (height_coded)+VENUS_DMA_ALIGNMENT) + - (VENUS_DMA_ALIGNMENT << (num_vpp_pipes - 1)) - 1) & - (~((VENUS_DMA_ALIGNMENT << (num_vpp_pipes - 1)) - 1)) * 1; - topline_buf_ctrl_size_FE = (is_h265) ? (64 * (width_coded >> 5)) : - (VENUS_DMA_ALIGNMENT + 16 * (width_coded >> 4)); - topline_buf_ctrl_size_FE = ALIGN(topline_buf_ctrl_size_FE, - VENUS_DMA_ALIGNMENT); - leftline_buf_ctrl_size_FE = (((VENUS_DMA_ALIGNMENT + 64 * - (height_coded >> 4)) + - (VENUS_DMA_ALIGNMENT << (num_vpp_pipes - 1)) - 1) & - (~((VENUS_DMA_ALIGNMENT << (num_vpp_pipes - 1)) - 1)) * 1) * - num_vpp_pipes; - leftline_buf_meta_recony = (VENUS_DMA_ALIGNMENT + 64 * - ((height_coded) / (8 * (ten_bit ? 4 : 8)))); - leftline_buf_meta_recony = ALIGN(leftline_buf_meta_recony, - VENUS_DMA_ALIGNMENT); - leftline_buf_meta_recony = leftline_buf_meta_recony * - num_vpp_pipes; - linebuf_meta_recon_uv = (VENUS_DMA_ALIGNMENT + 64 * - ((height_coded) / (4 * (ten_bit ? 4 : 8)))); - linebuf_meta_recon_uv = ALIGN(linebuf_meta_recon_uv, - VENUS_DMA_ALIGNMENT); - linebuf_meta_recon_uv = linebuf_meta_recon_uv * - num_vpp_pipes; - line_buf_recon_pix_size = ((ten_bit ? 3 : 2) * width_coded); - line_buf_recon_pix_size = ALIGN(line_buf_recon_pix_size, - VENUS_DMA_ALIGNMENT); - slice_cmd_buffer_size = ALIGN(20480, VENUS_DMA_ALIGNMENT); - sps_pps_slice_hdr = 2048 + 4096; - col_mv_buf_size = (is_h265) ? (16 * ((frame_num_lcu << 2) + - BUFFER_ALIGNMENT_SIZE(32))) : - (3 * 16 * (width_lcu_num * height_lcu_num + - BUFFER_ALIGNMENT_SIZE(32))); - col_mv_buf_size = ALIGN(col_mv_buf_size, VENUS_DMA_ALIGNMENT) - * (num_ref + 1); - col_rc_buf_size = (((width_mb_num + 7) >> 3) * - 16 * 2 * height_mb_num); - col_rc_buf_size = ALIGN(col_rc_buf_size, - VENUS_DMA_ALIGNMENT) * HFI_MAX_COL_FRAME; - h265e_framerc_bufsize = (is_h265) ? (256 + 16 * - (14 + (((height_coded >> 5) + 7) >> 3))) : - (256 + 16 * (14 + (((height_coded >> 4) + 7) >> 3))); - h265e_framerc_bufsize *= 6; /* multiply by max numtilescol*/ - if (num_vpp_pipes > 1) - h265e_framerc_bufsize = ALIGN(h265e_framerc_bufsize, - VENUS_DMA_ALIGNMENT) * num_vpp_pipes; - - h265e_framerc_bufsize = ALIGN(h265e_framerc_bufsize, - BUFFER_ALIGNMENT_SIZE(512)) * HFI_MAX_COL_FRAME; - h265e_lcubitcnt_bufsize = (256 + 4 * frame_num_lcu); - h265e_lcubitcnt_bufsize = ALIGN(h265e_lcubitcnt_bufsize, - VENUS_DMA_ALIGNMENT); - h265e_lcubitmap_bufsize = 256 + (frame_num_lcu >> 3); - h265e_lcubitmap_bufsize = ALIGN(h265e_lcubitmap_bufsize, - VENUS_DMA_ALIGNMENT); - line_buf_sde_size = 256 + 16 * (width_coded >> 4); - line_buf_sde_size = ALIGN(line_buf_sde_size, VENUS_DMA_ALIGNMENT); - if ((width_coded * height_coded) > (4096 * 2160)) - se_stats_bufsize = 0; - else if ((width_coded * height_coded) > (1920 * 1088)) - se_stats_bufsize = (40 * 4 * frame_num_lcu + 256 + 256); - else - se_stats_bufsize = (1024 * frame_num_lcu + 256 + 256); - - se_stats_bufsize = ALIGN(se_stats_bufsize, VENUS_DMA_ALIGNMENT) * 2; - bse_slice_cmd_buffer_size = ((((8192 << 2) + 7) & (~7)) * 6); - bse_reg_buffer_size = ((((512 << 3) + 7) & (~7)) * 4); - vpp_reg_buffer_size = ((((HFI_VENUS_VPPSG_MAX_REGISTERS << 3) + 31) & - (~31)) * 10); - lambda_lut_size = (256 * 11); - override_buffer_size = 16 * ((num_LCUMB + 7) >> 3); - override_buffer_size = ALIGN(override_buffer_size, - VENUS_DMA_ALIGNMENT) * 2; - ir_buffer_size = (((frame_num_lcu << 1) + 7) & (~7)) * 3; - vpss_lineBufferSize_1 = ((((8192) >> 2) << 5) * num_vpp_pipes) + 64; - vpss_line_buf = (((((max(width_coded, height_coded) + 3) >> 2) << 5) - + 256) * 16) + vpss_lineBufferSize_1; - topline_bufsize_fe_1stg_sao = (16 * (width_coded >> 5)); - topline_bufsize_fe_1stg_sao = ALIGN(topline_bufsize_fe_1stg_sao, - VENUS_DMA_ALIGNMENT); - size = line_buf_ctrl_size + line_buf_data_size + - line_buf_ctrl_size_buffid2 + leftline_buf_ctrl_size + - vpss_line_buf + col_mv_buf_size + topline_buf_ctrl_size_FE + - leftline_buf_ctrl_size_FE + line_buf_recon_pix_size + - leftline_buf_recon_pix_size + leftline_buf_meta_recony + - linebuf_meta_recon_uv + col_rc_buf_size + - h265e_framerc_bufsize + h265e_lcubitcnt_bufsize + - h265e_lcubitmap_bufsize + line_buf_sde_size + - topline_bufsize_fe_1stg_sao + override_buffer_size + - bse_reg_buffer_size + vpp_reg_buffer_size + - sps_pps_slice_hdr + slice_cmd_buffer_size + - bse_slice_cmd_buffer_size + ir_buffer_size + slice_info_bufsize - + lambda_lut_size + se_stats_bufsize + temp_scratch_mv_bufsize - + output_mv_bufsize + 1024; - return size; -} - -static u32 calculate_h264e_scratch1_size(struct msm_vidc_inst *inst, - u32 width, u32 height, u32 num_ref, bool ten_bit, u32 num_vpp_pipes) -{ - return calculate_enc_scratch1_size(inst, width, height, 16, - num_ref, ten_bit, num_vpp_pipes, false); -} - -static u32 calculate_h265e_scratch1_size(struct msm_vidc_inst *inst, - u32 width, u32 height, u32 num_ref, bool ten_bit, u32 num_vpp_pipes) -{ - return calculate_enc_scratch1_size(inst, width, height, 32, - num_ref, ten_bit, num_vpp_pipes, true); -} - -static u32 hfi_ubwc_calc_metadata_plane_stride(u32 width, - u32 metadata_stride_multi, u32 tile_width_pels) -{ - return ALIGN(((width + (tile_width_pels - 1)) / tile_width_pels), - metadata_stride_multi); -} - -static u32 hfi_ubwc_metadata_plane_bufheight(u32 height, - u32 metadata_height_multi, u32 tile_height_pels) -{ - return ALIGN(((height + (tile_height_pels - 1)) / tile_height_pels), - metadata_height_multi); -} - -static u32 hfi_ubwc_metadata_plane_buffer_size(u32 metadata_stride, - u32 metadata_buf_height) -{ - return ALIGN(metadata_stride * metadata_buf_height, - BUFFER_ALIGNMENT_4096_BYTES); -} - -static u32 calculate_enc_scratch2_size(struct msm_vidc_inst *inst, - u32 width, u32 height, u32 num_ref, bool ten_bit) -{ - u32 aligned_width, aligned_height, chroma_height, ref_buf_height; - u32 luma_size, chroma_size; - u32 metadata_stride, meta_buf_height, meta_size_y, meta_size_c; - u32 ref_luma_stride_bytes, ref_chroma_height_bytes; - u32 ref_buf_size = 0, ref_stride; - u32 size; - - if (!ten_bit) { - aligned_height = ALIGN(height, HFI_VENUS_HEIGHT_ALIGNMENT); - chroma_height = height >> 1; - chroma_height = ALIGN(chroma_height, - HFI_VENUS_HEIGHT_ALIGNMENT); - aligned_width = ALIGN(width, HFI_VENUS_WIDTH_ALIGNMENT); - metadata_stride = hfi_ubwc_calc_metadata_plane_stride(width, - 64, HFI_COLOR_FORMAT_YUV420_NV12_UBWC_Y_TILE_WIDTH); - meta_buf_height = hfi_ubwc_metadata_plane_bufheight(height, - 16, HFI_COLOR_FORMAT_YUV420_NV12_UBWC_Y_TILE_HEIGHT); - meta_size_y = hfi_ubwc_metadata_plane_buffer_size( - metadata_stride, meta_buf_height); - meta_size_c = hfi_ubwc_metadata_plane_buffer_size( - metadata_stride, meta_buf_height); - size = (aligned_height + chroma_height) * aligned_width + - meta_size_y + meta_size_c; - size = (size * (num_ref+3)) + 4096; - } else { - ref_buf_height = (height + (HFI_VENUS_HEIGHT_ALIGNMENT - 1)) - & (~(HFI_VENUS_HEIGHT_ALIGNMENT - 1)); - ref_luma_stride_bytes = ((width + SYSTEM_LAL_TILE10 - 1) / - SYSTEM_LAL_TILE10) * SYSTEM_LAL_TILE10; - ref_stride = 4 * (ref_luma_stride_bytes / 3); - ref_stride = (ref_stride + (BUFFER_ALIGNMENT_SIZE(128) - 1)) & - (~(BUFFER_ALIGNMENT_SIZE(128) - 1)); - luma_size = ref_buf_height * ref_stride; - ref_chroma_height_bytes = (((height + 1) >> 1) + - (BUFFER_ALIGNMENT_SIZE(32) - 1)) & - (~(BUFFER_ALIGNMENT_SIZE(32) - 1)); - chroma_size = ref_stride * ref_chroma_height_bytes; - luma_size = (luma_size + (BUFFER_ALIGNMENT_4096_BYTES - 1)) & - (~(BUFFER_ALIGNMENT_4096_BYTES - 1)); - chroma_size = (chroma_size + - (BUFFER_ALIGNMENT_4096_BYTES - 1)) & - (~(BUFFER_ALIGNMENT_4096_BYTES - 1)); - ref_buf_size = luma_size + chroma_size; - metadata_stride = hfi_ubwc_calc_metadata_plane_stride( - width, - VENUS_METADATA_STRIDE_MULTIPLE, - HFI_COLOR_FORMAT_YUV420_TP10_UBWC_Y_TILE_WIDTH); - meta_buf_height = hfi_ubwc_metadata_plane_bufheight( - height, - VENUS_METADATA_HEIGHT_MULTIPLE, - HFI_COLOR_FORMAT_YUV420_TP10_UBWC_Y_TILE_HEIGHT); - meta_size_y = hfi_ubwc_metadata_plane_buffer_size( - metadata_stride, meta_buf_height); - meta_size_c = hfi_ubwc_metadata_plane_buffer_size( - metadata_stride, meta_buf_height); - size = ref_buf_size + meta_size_y + meta_size_c; - size = (size * (num_ref+3)) + 4096; - } - return size; -} - -static u32 calculate_enc_persist_size(void) -{ - return HFI_IRIS2_ENC_PERSIST_SIZE; -} - -static u32 calculate_h264d_persist1_size(void) -{ - u32 size = 0; - - size = ALIGN((SIZE_SLIST_BUF_H264 * NUM_SLIST_BUF_H264), - VENUS_DMA_ALIGNMENT); - return size; -} - -static u32 calculate_h265d_persist1_size(void) -{ - u32 size = 0; - - size = ALIGN((SIZE_SLIST_BUF_H265 * NUM_SLIST_BUF_H265 + H265_NUM_TILE - * sizeof(u32)), VENUS_DMA_ALIGNMENT); - return size; -} - -static u32 calculate_vp9d_persist1_size(void) -{ - u32 size = 0; - - size = ALIGN(VP9_NUM_PROBABILITY_TABLE_BUF * VP9_PROB_TABLE_SIZE, - VENUS_DMA_ALIGNMENT) + - ALIGN(HFI_IRIS2_VP9D_COMV_SIZE, VENUS_DMA_ALIGNMENT) + - ALIGN(MAX_SUPERFRAME_HEADER_LEN, VENUS_DMA_ALIGNMENT) + - ALIGN(VP9_UDC_HEADER_BUF_SIZE, VENUS_DMA_ALIGNMENT) + - ALIGN(VP9_NUM_FRAME_INFO_BUF * CCE_TILE_OFFSET_SIZE, - VENUS_DMA_ALIGNMENT); - return size; -} - -static u32 calculate_mpeg2d_persist1_size(void) -{ - return QMATRIX_SIZE + MP2D_QPDUMP_SIZE; -} - -/* decoder internal buffers */ static u32 msm_vidc_decoder_bin_size_iris2(struct msm_vidc_inst *inst) { struct msm_vidc_core *core; @@ -1023,82 +32,140 @@ static u32 msm_vidc_decoder_bin_size_iris2(struct msm_vidc_inst *inst) d_vpr_e("%s: invalid capabilities\n", __func__); return size; } - num_vpp_pipes = core->capabilities[NUM_VPP_PIPE].value; if (inst->decode_vpp_delay.enable) vpp_delay = inst->decode_vpp_delay.size; else vpp_delay = DEFAULT_BSE_VPP_DELAY; - is_interlaced = false; //(inst->pic_struct == MSM_VIDC_PIC_STRUCT_MAYBE_INTERLACED); + is_interlaced = false; //TODO: (inst->pic_struct == MSM_VIDC_PIC_STRUCT_MAYBE_INTERLACED); f = &inst->fmts[INPUT_PORT]; width = f->fmt.pix_mp.width; height = f->fmt.pix_mp.height; - if (inst->codec == MSM_VIDC_H264) { - size = calculate_h264d_scratch_size(inst, width, height, + if (inst->codec == MSM_VIDC_H264) + HFI_BUFFER_BIN_H264D(size, width, height, is_interlaced, vpp_delay, num_vpp_pipes); - } else if (inst->codec == MSM_VIDC_HEVC) { - size = calculate_h265d_scratch_size(inst, width, height, - is_interlaced, vpp_delay, num_vpp_pipes); - } else if (inst->codec == MSM_VIDC_MPEG2) { - size = calculate_mpeg2d_scratch_size(inst, width, height, - is_interlaced, vpp_delay, num_vpp_pipes); - } else if (inst->codec == MSM_VIDC_VP9) { - size = calculate_vpxd_scratch_size(inst, width, height, - is_interlaced, vpp_delay, num_vpp_pipes); - } + else if (inst->codec == MSM_VIDC_HEVC) + HFI_BUFFER_BIN_H265D(size, width, height, + 0, vpp_delay, num_vpp_pipes); + else if (inst->codec == MSM_VIDC_VP9) + HFI_BUFFER_BIN_VP9D(size, width, height, + 0, num_vpp_pipes); + s_vpr_l(inst->sid, "%s: size %d\n", __func__, size); return size; } -static u32 msm_vidc_decoder_scratch_1_size_iris2(struct msm_vidc_inst *inst) +static u32 msm_vidc_decoder_comv_size_iris2(struct msm_vidc_inst* inst) { - struct msm_vidc_core *core; u32 size = 0; - u32 width, height, out_min_count, num_vpp_pipes; - struct v4l2_format *f; - u32 vpp_delay; + u32 width, height, out_min_count, vpp_delay; + struct v4l2_format* f; + + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return size; + } + + f = &inst->fmts[INPUT_PORT]; + width = f->fmt.pix_mp.width; + height = f->fmt.pix_mp.height; + if (inst->decode_vpp_delay.enable) + vpp_delay = inst->decode_vpp_delay.size; + else + vpp_delay = DEFAULT_BSE_VPP_DELAY; + out_min_count = inst->buffers.output.min_count; + out_min_count = max(vpp_delay + 1, out_min_count); + + if (inst->codec == MSM_VIDC_H264) + HFI_BUFFER_COMV_H264D(size, width, height, out_min_count); + else if (inst->codec == MSM_VIDC_HEVC) + HFI_BUFFER_COMV_H265D(size, width, height, out_min_count); + + s_vpr_l(inst->sid, "%s: size %d\n", __func__, size); + return size; +} + +static u32 msm_vidc_decoder_non_comv_size_iris2(struct msm_vidc_inst* inst) +{ + u32 size = 0; + u32 width, height, num_vpp_pipes; + struct msm_vidc_core* core; + struct v4l2_format* f; if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return size; } core = inst->core; + if (!core->capabilities) { + s_vpr_e(inst->sid, "%s: invalid core capabilities\n", __func__); + return size; + } + num_vpp_pipes = core->capabilities[NUM_VPP_PIPE].value; + f = &inst->fmts[INPUT_PORT]; + width = f->fmt.pix_mp.width; + height = f->fmt.pix_mp.height; + + if (inst->codec == MSM_VIDC_H264) + HFI_BUFFER_NON_COMV_H264D(size, width, height, num_vpp_pipes); + else if (inst->codec == MSM_VIDC_HEVC) + HFI_BUFFER_NON_COMV_H265D(size, width, height, num_vpp_pipes); + + s_vpr_l(inst->sid, "%s: size %d\n", __func__, size); + return size; +} + +static u32 msm_vidc_decoder_line_size_iris2(struct msm_vidc_inst *inst) +{ + struct msm_vidc_core *core; + u32 size = 0; + u32 width, height, out_min_count, num_vpp_pipes, vpp_delay; + struct v4l2_format *f; + bool is_opb; + u32 pixelformat; + + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return size; + } + core = inst->core; if (!core->capabilities) { d_vpr_e("%s: invalid capabilities\n", __func__); return size; } - num_vpp_pipes = core->capabilities[NUM_VPP_PIPE].value; + + pixelformat = inst->fmts[OUTPUT_PORT].fmt.pix_mp.pixelformat; + if (pixelformat == MSM_VIDC_FMT_NV12 || + pixelformat == MSM_VIDC_FMT_NV12_P010) + is_opb = true; + else + is_opb = false; + if (inst->decode_vpp_delay.enable) vpp_delay = inst->decode_vpp_delay.size; else vpp_delay = DEFAULT_BSE_VPP_DELAY; + f = &inst->fmts[INPUT_PORT]; width = f->fmt.pix_mp.width; height = f->fmt.pix_mp.height; out_min_count = inst->buffers.output.min_count; out_min_count = max(vpp_delay + 1, out_min_count); - if (inst->codec == MSM_VIDC_H264) { - size = calculate_h264d_scratch1_size(inst, width, height, - out_min_count, is_secondary_output_mode(inst), + if (inst->codec == MSM_VIDC_H264) + HFI_BUFFER_LINE_H264D(size, width, height, out_min_count, + is_opb, num_vpp_pipes); + else if (inst->codec == MSM_VIDC_HEVC) + HFI_BUFFER_LINE_H265D(size, width, height, is_opb, num_vpp_pipes); - } else if (inst->codec == MSM_VIDC_HEVC) { - size = calculate_h265d_scratch1_size(inst, width, height, - out_min_count, is_secondary_output_mode(inst), - num_vpp_pipes); - } else if (inst->codec == MSM_VIDC_MPEG2) { - size = calculate_mpeg2d_scratch1_size(inst, width, height, - out_min_count, is_secondary_output_mode(inst), - num_vpp_pipes); - } else if (inst->codec == MSM_VIDC_VP9) { - size = calculate_vp9d_scratch1_size(inst, width, height, - out_min_count, is_secondary_output_mode(inst), - num_vpp_pipes); - } + else if (inst->codec == MSM_VIDC_VP9) + HFI_BUFFER_LINE_VP9D(size, width, height, out_min_count, + is_opb, num_vpp_pipes); + s_vpr_l(inst->sid, "%s: size %d\n", __func__, size); return size; } @@ -1106,22 +173,19 @@ static u32 msm_vidc_decoder_persist_size_iris2(struct msm_vidc_inst *inst) { u32 size = 0; - d_vpr_h("%s()\n", __func__); if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return size; } - if (inst->codec == MSM_VIDC_H264) { - size = calculate_h264d_persist1_size(); - } else if (inst->codec == MSM_VIDC_HEVC) { - size = calculate_h265d_persist1_size(); - } else if (inst->codec == MSM_VIDC_MPEG2) { - size = calculate_mpeg2d_persist1_size(); - } else if (inst->codec == MSM_VIDC_VP9) { - size = calculate_vp9d_persist1_size(); - } + if (inst->codec == MSM_VIDC_H264) + HFI_BUFFER_PERSIST_H264D(size); + else if (inst->codec == MSM_VIDC_HEVC) + HFI_BUFFER_PERSIST_H265D(size); + else if (inst->codec == MSM_VIDC_VP9) + HFI_BUFFER_PERSIST_VP9D(size); + s_vpr_l(inst->sid, "%s: size %d\n", __func__, size); return size; } @@ -1138,72 +202,129 @@ static u32 msm_vidc_encoder_bin_size_iris2(struct msm_vidc_inst *inst) return size; } core = inst->core; - if (!core->capabilities) { - d_vpr_e("%s: invalid capabilities\n", __func__); + s_vpr_e(inst->sid, "%s: invalid core capabilities\n", __func__); return size; } - num_vpp_pipes = core->capabilities[NUM_VPP_PIPE].value; f = &inst->fmts[OUTPUT_PORT]; width = f->fmt.pix_mp.width; height = f->fmt.pix_mp.height; - if (inst->codec == MSM_VIDC_H264) { - size = calculate_h264e_scratch_size(inst, width, height, - 2, //inst->clk_data.work_mode, - num_vpp_pipes); - } else if (inst->codec == MSM_VIDC_HEVC) { - size = calculate_h265e_scratch_size(inst, width, height, - 2, //inst->clk_data.work_mode, - num_vpp_pipes); - } + if (inst->codec == MSM_VIDC_H264) + HFI_BUFFER_BIN_H264E(size, width, height, inst->stage, num_vpp_pipes); + else if (inst->codec == MSM_VIDC_HEVC) + HFI_BUFFER_BIN_H265E(size, width, height, inst->stage, num_vpp_pipes); + s_vpr_l(inst->sid, "%s: size %d\n", __func__, size); return size; } -static u32 msm_vidc_encoder_scratch_1_size_iris2(struct msm_vidc_inst *inst) +static u32 msm_vidc_encoder_comv_size_iris2(struct msm_vidc_inst* inst) +{ + u32 size = 0; + u32 width, height, num_ref; + struct v4l2_format* f; + + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return size; + } + + f = &inst->fmts[OUTPUT_PORT]; + width = f->fmt.pix_mp.width; + height = f->fmt.pix_mp.height; + + if (inst->codec == MSM_VIDC_H264) { + // TODO: replace zeros with appropriate variables + HFI_IRIS2_ENC_RECON_BUF_COUNT(num_ref, 0, 0, 0, 0, 0, + HFI_CODEC_ENCODE_AVC); + HFI_BUFFER_COMV_H264E(size, width, height, num_ref); + } else if (inst->codec == MSM_VIDC_HEVC) { + // TODO: replace zeros with appropriate variables + HFI_IRIS2_ENC_RECON_BUF_COUNT(num_ref, 0, 0, 0, 0, 0, + HFI_CODEC_ENCODE_HEVC); + HFI_BUFFER_COMV_H265E(size, width, height, num_ref); + } + + s_vpr_l(inst->sid, "%s: size %d\n", __func__, size); + return size; +} + +static u32 msm_vidc_encoder_non_comv_size_iris2(struct msm_vidc_inst* inst) +{ + struct msm_vidc_core* core; + u32 size = 0; + u32 width, height, num_vpp_pipes; + struct v4l2_format* f; + + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return size; + } + core = inst->core; + if (!core->capabilities) { + s_vpr_e(inst->sid, "%s: invalid core capabilities\n", __func__); + return size; + } + num_vpp_pipes = core->capabilities[NUM_VPP_PIPE].value; + f = &inst->fmts[OUTPUT_PORT]; + width = f->fmt.pix_mp.width; + height = f->fmt.pix_mp.height; + + if (inst->codec == MSM_VIDC_H264) + HFI_BUFFER_NON_COMV_H264E(size, width, height, num_vpp_pipes); + else if (inst->codec == MSM_VIDC_HEVC) + HFI_BUFFER_NON_COMV_H265E(size, width, height, num_vpp_pipes); + + s_vpr_l(inst->sid, "%s: size %d\n", __func__, size); + return size; +} + +static u32 msm_vidc_encoder_line_size_iris2(struct msm_vidc_inst *inst) { struct msm_vidc_core *core; u32 size = 0; - u32 width, height, num_ref, num_vpp_pipes; + u32 width, height, pixelformat, num_vpp_pipes; bool is_tenbit = false; struct v4l2_format *f; if (!inst || !inst->core) { - d_vpr_e("%s: Instance is null!", __func__); + d_vpr_e("%s: invalid params\n", __func__); return size; } core = inst->core; - if (!core->capabilities) { - d_vpr_e("%s: invalid capabilities\n", __func__); + s_vpr_e(inst->sid, "%s: invalid core capabilities\n", __func__); return size; } - num_vpp_pipes = core->capabilities[NUM_VPP_PIPE].value; + f = &inst->fmts[OUTPUT_PORT]; width = f->fmt.pix_mp.width; height = f->fmt.pix_mp.height; - num_ref = 4; //msm_vidc_get_num_ref_frames(inst); - is_tenbit = false; //(inst->bit_depth == MSM_VIDC_BIT_DEPTH_10); + pixelformat = f->fmt.pix_mp.pixelformat; + if (pixelformat == MSM_VIDC_FMT_NV12_P010 || + pixelformat == MSM_VIDC_FMT_NV12_TP10_UBWC) + is_tenbit = true; + else + is_tenbit = false; - if (inst->codec == MSM_VIDC_H264) { - size = calculate_h264e_scratch1_size(inst, width, height, - num_ref, is_tenbit, num_vpp_pipes); - } else if (inst->codec == MSM_VIDC_HEVC) { - size = calculate_h265e_scratch1_size(inst, width, height, - num_ref, is_tenbit, num_vpp_pipes); - } + if (inst->codec == MSM_VIDC_H264) + HFI_BUFFER_LINE_H264E(size, width, height, is_tenbit, num_vpp_pipes); + else if (inst->codec == MSM_VIDC_HEVC) + HFI_BUFFER_LINE_H265E(size, width, height, is_tenbit, num_vpp_pipes); + s_vpr_l(inst->sid, "%s: size %d\n", __func__, size); return size; } static u32 msm_vidc_encoder_dpb_size_iris2(struct msm_vidc_inst *inst) { - u32 width, height, num_ref; - bool is_tenbit = false; + u32 size = 0; + u32 width, height, pixelformat; struct v4l2_format *f; + bool is_tenbit; if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); @@ -1213,16 +334,66 @@ static u32 msm_vidc_encoder_dpb_size_iris2(struct msm_vidc_inst *inst) f = &inst->fmts[OUTPUT_PORT]; width = f->fmt.pix_mp.width; height = f->fmt.pix_mp.height; - num_ref = 4; // TODO: msm_vidc_get_num_ref_frames(inst); - is_tenbit = false; // TODO: (inst->bit_depth == MSM_VIDC_BIT_DEPTH_10); + pixelformat = f->fmt.pix_mp.pixelformat; + if (pixelformat == MSM_VIDC_FMT_NV12_P010 || + pixelformat == MSM_VIDC_FMT_NV12_TP10_UBWC) + is_tenbit = true; + else + is_tenbit = false; - return calculate_enc_scratch2_size(inst, width, height, - num_ref, is_tenbit); + if (inst->codec == MSM_VIDC_H264) + HFI_BUFFER_DPB_H264E(size, width, height); + else if (inst->codec == MSM_VIDC_HEVC) + HFI_BUFFER_DPB_H265E(size, width, height, is_tenbit); + + s_vpr_l(inst->sid, "%s: size %d\n", __func__, size); + return size; } -static u32 msm_vidc_encoder_persist_size_iris2(struct msm_vidc_inst *inst) +static u32 msm_vidc_encoder_arp_size_iris2(struct msm_vidc_inst *inst) { - return calculate_enc_persist_size(); + u32 size = 0; + + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return 0; + } + + HFI_BUFFER_ARP_ENC(size); + s_vpr_l(inst->sid, "%s: size %d\n", __func__, size); + return size; +} + +static u32 msm_vidc_encoder_vpss_size_iris2(struct msm_vidc_inst* inst) +{ + u32 size = 0; + bool ds_enable, rot_enable, flip_enable, is_tenbit; + u32 width, height, pixelformat; + struct v4l2_format* f; + + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return 0; + } + ds_enable = false; // TODO: fixme + rot_enable = false; // TODO: fixme + flip_enable = false; // TODO: fixme + is_tenbit = false; + + f = &inst->fmts[OUTPUT_PORT]; + width = f->fmt.pix_mp.width; + height = f->fmt.pix_mp.height; + pixelformat = f->fmt.pix_mp.pixelformat; + if (pixelformat == MSM_VIDC_FMT_NV12_P010 || + pixelformat == MSM_VIDC_FMT_NV12_TP10_UBWC) + is_tenbit = true; + else + is_tenbit = false; + + HFI_BUFFER_VPSS_ENC(size, width, height, ds_enable, + rot_enable, flip_enable, is_tenbit); + s_vpr_l(inst->sid, "%s: size %d\n", __func__, size); + return size; } int msm_buffer_size_iris2(struct msm_vidc_inst *inst, @@ -1253,12 +424,15 @@ int msm_buffer_size_iris2(struct msm_vidc_inst *inst, size = msm_vidc_decoder_bin_size_iris2(inst); break; case MSM_VIDC_BUF_COMV: + size = msm_vidc_decoder_comv_size_iris2(inst); + break; case MSM_VIDC_BUF_NON_COMV: + size = msm_vidc_decoder_non_comv_size_iris2(inst); + break; case MSM_VIDC_BUF_LINE: - size = msm_vidc_decoder_scratch_1_size_iris2(inst); + size = msm_vidc_decoder_line_size_iris2(inst); break; case MSM_VIDC_BUF_PERSIST: - //size = msm_vidc_decoder_persist_1_size_iris2(inst); size = msm_vidc_decoder_persist_size_iris2(inst); break; default: @@ -1282,16 +456,22 @@ int msm_buffer_size_iris2(struct msm_vidc_inst *inst, size = msm_vidc_encoder_bin_size_iris2(inst); break; case MSM_VIDC_BUF_COMV: + size = msm_vidc_encoder_comv_size_iris2(inst); + break; case MSM_VIDC_BUF_NON_COMV: + size = msm_vidc_encoder_non_comv_size_iris2(inst); + break; case MSM_VIDC_BUF_LINE: - size = msm_vidc_encoder_scratch_1_size_iris2(inst); + size = msm_vidc_encoder_line_size_iris2(inst); break; case MSM_VIDC_BUF_DPB: size = msm_vidc_encoder_dpb_size_iris2(inst); break; - //case MSM_VIDC_BUF_PERSIST: case MSM_VIDC_BUF_ARP: - size = msm_vidc_encoder_persist_size_iris2(inst); + size = msm_vidc_encoder_arp_size_iris2(inst); + break; + case MSM_VIDC_BUF_VPSS: + size = msm_vidc_encoder_vpss_size_iris2(inst); break; default: break; @@ -1328,6 +508,7 @@ int msm_buffer_min_count_iris2(struct msm_vidc_inst *inst, case MSM_VIDC_BUF_PERSIST: count = 1; break; + //todo: add DPB default: break; } @@ -1346,8 +527,9 @@ int msm_buffer_min_count_iris2(struct msm_vidc_inst *inst, case MSM_VIDC_BUF_NON_COMV: case MSM_VIDC_BUF_LINE: case MSM_VIDC_BUF_DPB: - //case MSM_VIDC_BUF_PERSIST: + //todo: add DPB count case MSM_VIDC_BUF_ARP: + case MSM_VIDC_BUF_VPSS: count = 1; break; default: diff --git a/driver/vidc/inc/hfi_command.h b/driver/vidc/inc/hfi_command.h index 1837d001d7..62d64df5a1 100644 --- a/driver/vidc/inc/hfi_command.h +++ b/driver/vidc/inc/hfi_command.h @@ -6,6 +6,7 @@ #ifndef __H_HFI_COMMAND_H__ #define __H_HFI_COMMAND_H__ +//todo: DP: remove below headers #include #include diff --git a/driver/vidc/inc/hfi_property.h b/driver/vidc/inc/hfi_property.h index f802f17c20..be1a74fa36 100644 --- a/driver/vidc/inc/hfi_property.h +++ b/driver/vidc/inc/hfi_property.h @@ -6,6 +6,9 @@ #ifndef __H_HFI_PROPERTY_H__ #define __H_HFI_PROPERTY_H__ +//todo: DP: remove below header +#include + #define HFI_PROP_BEGIN 0x03000000 #define HFI_PROP_IMAGE_VERSION 0x03000001 #define HFI_PROP_INTRA_FRAME_POWER_COLLAPSE 0x03000002 From 7c203e7bf51ee2820ebd7104081839eab94ff9b1 Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Tue, 29 Dec 2020 17:47:18 -0800 Subject: [PATCH 0049/1061] video: driver: fix dmabuf put call dmabuf put function instead of dma heap buffer free. Change-Id: Ic8946ebf189aeb94d93cf5aaa38b0b790d64f2f0 Signed-off-by: Darshana Patil --- driver/vidc/src/msm_vidc_memory.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/driver/vidc/src/msm_vidc_memory.c b/driver/vidc/src/msm_vidc_memory.c index 031cf26759..21128255b0 100644 --- a/driver/vidc/src/msm_vidc_memory.c +++ b/driver/vidc/src/msm_vidc_memory.c @@ -72,7 +72,7 @@ void msm_vidc_memory_put_dmabuf(void *dmabuf) return; } - dma_heap_buffer_free((struct dma_buf *)dmabuf); + dma_buf_put((struct dma_buf *)dmabuf); } int msm_vidc_memory_map(struct msm_vidc_core *core, struct msm_vidc_map *map) From 58cd1120eedd11e26f2f61e09dd50835f187bed7 Mon Sep 17 00:00:00 2001 From: Maheshwar Ajja Date: Wed, 30 Dec 2020 08:30:11 -0800 Subject: [PATCH 0050/1061] video: driver: add support for instance states Add support for all the required instance states and move the states accordingly. Change-Id: Iac1046ab8c7a0116df6ed3069d566c7a1b65e61c Signed-off-by: Maheshwar Ajja --- driver/vidc/inc/msm_vdec.h | 11 +- driver/vidc/inc/msm_venc.h | 9 +- driver/vidc/inc/msm_vidc_core.h | 15 - driver/vidc/inc/msm_vidc_driver.h | 35 +- driver/vidc/inc/msm_vidc_inst.h | 6 + driver/vidc/inc/msm_vidc_internal.h | 6 + driver/vidc/inc/msm_vidc_vb2.h | 4 + driver/vidc/inc/venus_hfi.h | 3 +- driver/vidc/inc/venus_hfi_response.h | 3 + driver/vidc/src/msm_vdec.c | 94 ++-- driver/vidc/src/msm_venc.c | 88 ++- driver/vidc/src/msm_vidc.c | 263 +++------ driver/vidc/src/msm_vidc_control.c | 4 +- driver/vidc/src/msm_vidc_driver.c | 788 +++++++++++++++++++++++++-- driver/vidc/src/msm_vidc_probe.c | 14 +- driver/vidc/src/msm_vidc_vb2.c | 78 +-- driver/vidc/src/venus_hfi.c | 56 +- driver/vidc/src/venus_hfi_response.c | 103 ++-- 18 files changed, 1119 insertions(+), 461 deletions(-) diff --git a/driver/vidc/inc/msm_vdec.h b/driver/vidc/inc/msm_vdec.h index cd9c631a11..c7df1df6cd 100644 --- a/driver/vidc/inc/msm_vdec.h +++ b/driver/vidc/inc/msm_vdec.h @@ -9,19 +9,18 @@ #include "msm_vidc_core.h" #include "msm_vidc_inst.h" -int msm_vdec_stop_input(struct msm_vidc_inst *inst); -int msm_vdec_start_input(struct msm_vidc_inst *inst); -int msm_vdec_stop_output(struct msm_vidc_inst *inst); -int msm_vdec_start_output(struct msm_vidc_inst *inst); +int msm_vdec_streamoff_input(struct msm_vidc_inst *inst); +int msm_vdec_streamon_input(struct msm_vidc_inst *inst); +int msm_vdec_streamoff_output(struct msm_vidc_inst *inst); +int msm_vdec_streamon_output(struct msm_vidc_inst *inst); int msm_vdec_qbuf(struct msm_vidc_inst *inst, struct vb2_buffer *vb2); int msm_vdec_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f); int msm_vdec_g_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f); int msm_vdec_enum_fmt(struct msm_vidc_inst *inst, struct v4l2_fmtdesc *f); int msm_vdec_inst_init(struct msm_vidc_inst *inst); +int msm_vdec_inst_deinit(struct msm_vidc_inst *inst); int msm_vdec_input_port_settings_change(struct msm_vidc_inst *inst); int msm_vdec_output_port_settings_change(struct msm_vidc_inst *inst); int msm_vdec_process_cmd(struct msm_vidc_inst *inst, u32 cmd); -int msm_vdec_subscribe_port_settings_change(struct msm_vidc_inst *inst, - enum msm_vidc_port_type port); #endif // _MSM_VDEC_H_ \ No newline at end of file diff --git a/driver/vidc/inc/msm_venc.h b/driver/vidc/inc/msm_venc.h index 05d2794448..04a55d7677 100644 --- a/driver/vidc/inc/msm_venc.h +++ b/driver/vidc/inc/msm_venc.h @@ -9,14 +9,15 @@ #include "msm_vidc_core.h" #include "msm_vidc_inst.h" -int msm_venc_stop_input(struct msm_vidc_inst *inst); -int msm_venc_start_input(struct msm_vidc_inst *inst); -int msm_venc_stop_output(struct msm_vidc_inst *inst); -int msm_venc_start_output(struct msm_vidc_inst *inst); +int msm_venc_streamoff_input(struct msm_vidc_inst *inst); +int msm_venc_streamon_input(struct msm_vidc_inst *inst); +int msm_venc_streamoff_output(struct msm_vidc_inst *inst); +int msm_venc_streamon_output(struct msm_vidc_inst *inst); int msm_venc_process_cmd(struct msm_vidc_inst *inst, u32 cmd); int msm_venc_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f); int msm_venc_g_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f); int msm_venc_enum_fmt(struct msm_vidc_inst *inst, struct v4l2_fmtdesc *f); int msm_venc_inst_init(struct msm_vidc_inst *inst); +int msm_venc_inst_deinit(struct msm_vidc_inst *inst); #endif // _MSM_VENC_H_ \ No newline at end of file diff --git a/driver/vidc/inc/msm_vidc_core.h b/driver/vidc/inc/msm_vidc_core.h index 6f9eb84c44..140b57985b 100644 --- a/driver/vidc/inc/msm_vidc_core.h +++ b/driver/vidc/inc/msm_vidc_core.h @@ -60,18 +60,6 @@ enum msm_vidc_core_state { MSM_VIDC_CORE_ERROR = 2, }; -enum work_type { - MSM_VIDC_INST_WORK_PSC = 1, -}; - -struct work_header { - void *data; - struct list_head list; - enum work_type type; - u32 session_id; - u32 data_size; -}; - struct msm_vidc_core { struct platform_device *pdev; struct msm_video_device vdev[2]; @@ -120,9 +108,6 @@ struct msm_vidc_core { u32 header_id; u32 packet_id; struct completion init_done; - struct list_head inst_works; /* list of struct work_header */ - struct delayed_work inst_work; - struct workqueue_struct *inst_workq; }; #endif // _MSM_VIDC_CORE_H_ diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 64fcd6cb9c..ec9159732a 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -177,6 +177,7 @@ u32 v4l2_colorformat_from_driver(enum msm_vidc_colorformat_type colorformat, const char *func); int v4l2_type_to_driver_port(struct msm_vidc_inst *inst, u32 type, const char *func); +const char *state_name(enum msm_vidc_inst_state state); int msm_vidc_change_inst_state(struct msm_vidc_inst *inst, enum msm_vidc_inst_state state, const char *func); int msm_vidc_get_input_internal_buffers(struct msm_vidc_inst *inst, @@ -193,13 +194,14 @@ int msm_vidc_remove_session(struct msm_vidc_inst *inst); int msm_vidc_add_session(struct msm_vidc_inst *inst); int msm_vidc_session_open(struct msm_vidc_inst *inst); int msm_vidc_session_set_codec(struct msm_vidc_inst *inst); -int msm_vidc_session_start(struct msm_vidc_inst* inst, +int msm_vidc_session_streamon(struct msm_vidc_inst *inst, enum msm_vidc_port_type port); -int msm_vidc_session_stop(struct msm_vidc_inst *inst, +int msm_vidc_session_streamoff(struct msm_vidc_inst *inst, enum msm_vidc_port_type port); int msm_vidc_session_close(struct msm_vidc_inst *inst); int msm_vidc_get_inst_capability(struct msm_vidc_inst *inst); int msm_vidc_core_init(struct msm_vidc_core *core); +int msm_vidc_core_deinit(struct msm_vidc_core *core); int msm_vidc_smmu_fault_handler(struct iommu_domain *domain, struct device *dev, unsigned long iova, int flags, void *data); int msm_vidc_trigger_ssr(struct msm_vidc_core *core, @@ -208,8 +210,10 @@ void msm_vidc_ssr_handler(struct work_struct *work); void msm_vidc_pm_work_handler(struct work_struct *work); void msm_vidc_fw_unload_handler(struct work_struct *work); void msm_vidc_batch_handler(struct work_struct *work); -int msm_vidc_setup_event_queue(struct msm_vidc_inst *inst); +int msm_vidc_event_queue_init(struct msm_vidc_inst *inst); +int msm_vidc_event_queue_deinit(struct msm_vidc_inst *inst); int msm_vidc_vb2_queue_init(struct msm_vidc_inst *inst); +int msm_vidc_vb2_queue_deinit(struct msm_vidc_inst *inst); int msm_vidc_get_control(struct msm_vidc_inst *inst, struct v4l2_ctrl *ctrl); u32 msm_vidc_get_buffer_region(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type buffer_type, const char *func); @@ -231,14 +235,33 @@ int msm_vidc_put_driver_buf(struct msm_vidc_inst *inst, int msm_vidc_queue_buffer(struct msm_vidc_inst *inst, struct vb2_buffer *vb2); int msm_vidc_destroy_internal_buffer(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buffer); +void msm_vidc_destroy_buffers(struct msm_vidc_inst *inst); struct msm_vidc_buffer *get_meta_buffer(struct msm_vidc_inst *inst, struct msm_vidc_buffer *vbuf); +struct msm_vidc_inst *get_inst_ref(struct msm_vidc_core *core, + struct msm_vidc_inst *instance); struct msm_vidc_inst *get_inst(struct msm_vidc_core *core, u32 session_id); void put_inst(struct msm_vidc_inst *inst); -int msm_vidc_get_mbs_per_frame(struct msm_vidc_inst* inst); -int msm_vidc_get_fps(struct msm_vidc_inst* inst); -int msm_vidc_num_queued_bufs(struct msm_vidc_inst* inst, u32 type); +bool msm_vidc_allow_s_fmt(struct msm_vidc_inst *inst, u32 type); +bool msm_vidc_allow_s_ctrl(struct msm_vidc_inst *inst, u32 id); +bool msm_vidc_allow_reqbufs(struct msm_vidc_inst *inst, u32 type); +bool msm_vidc_allow_stop(struct msm_vidc_inst *inst); +bool msm_vidc_allow_start(struct msm_vidc_inst *inst); +bool msm_vidc_allow_streamon(struct msm_vidc_inst *inst, u32 type); +bool msm_vidc_allow_streamoff(struct msm_vidc_inst *inst, u32 type); +bool msm_vidc_allow_qbuf(struct msm_vidc_inst *inst); +int msm_vidc_allow_input_psc(struct msm_vidc_inst *inst); +bool msm_vidc_allow_last_flag(struct msm_vidc_inst *inst); +int msm_vidc_state_change_streamon(struct msm_vidc_inst *inst, u32 type); +int msm_vidc_state_change_streamoff(struct msm_vidc_inst *inst, u32 type); +int msm_vidc_state_change_stop(struct msm_vidc_inst *inst); +int msm_vidc_state_change_start(struct msm_vidc_inst *inst); +int msm_vidc_state_change_input_psc(struct msm_vidc_inst *inst); +int msm_vidc_state_change_last_flag(struct msm_vidc_inst *inst); +int msm_vidc_get_mbs_per_frame(struct msm_vidc_inst *inst); +int msm_vidc_get_fps(struct msm_vidc_inst *inst); +int msm_vidc_num_queued_bufs(struct msm_vidc_inst *inst, u32 type); void core_lock(struct msm_vidc_core *core, const char *function); void core_unlock(struct msm_vidc_core *core, const char *function); void inst_lock(struct msm_vidc_inst *inst, const char *function); diff --git a/driver/vidc/inc/msm_vidc_inst.h b/driver/vidc/inc/msm_vidc_inst.h index 350bf3c4c6..f7d6d9abd4 100644 --- a/driver/vidc/inc/msm_vidc_inst.h +++ b/driver/vidc/inc/msm_vidc_inst.h @@ -34,6 +34,7 @@ struct msm_vidc_allocations_info { struct msm_vidc_allocations line; struct msm_vidc_allocations dpb; struct msm_vidc_allocations persist; + struct msm_vidc_allocations vpss; }; struct msm_vidc_mappings_info { @@ -48,6 +49,7 @@ struct msm_vidc_mappings_info { struct msm_vidc_mappings line; struct msm_vidc_mappings dpb; struct msm_vidc_mappings persist; + struct msm_vidc_mappings vpss; }; struct msm_vidc_buffers_info { @@ -62,6 +64,7 @@ struct msm_vidc_buffers_info { struct msm_vidc_buffers line; struct msm_vidc_buffers dpb; struct msm_vidc_buffers persist; + struct msm_vidc_buffers vpss; }; enum msm_vidc_inst_state { @@ -119,6 +122,9 @@ struct msm_vidc_inst { struct msm_vidc_decode_batch decode_batch; struct msm_vidc_decode_vpp_delay decode_vpp_delay; struct msm_vidc_session_idle session_idle; + struct delayed_work input_psc_work; + struct workqueue_struct *input_psc_workq; + struct list_head input_psc_works; /* list of struct input_psc_work */ struct list_head input_ts; struct list_head enc_input_crs; struct list_head decode_bitrate_data; diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 5b61e2b880..a3aa5442c5 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -708,6 +708,12 @@ struct msm_vidc_buffers { bool reuse; }; +struct input_psc_work { + struct list_head list; + void *data; + u32 data_size; +}; + struct msm_vidc_ssr { bool trigger; enum msm_vidc_ssr_trigger_type ssr_type; diff --git a/driver/vidc/inc/msm_vidc_vb2.h b/driver/vidc/inc/msm_vidc_vb2.h index 2611d5f30a..c924c1dd4b 100644 --- a/driver/vidc/inc/msm_vidc_vb2.h +++ b/driver/vidc/inc/msm_vidc_vb2.h @@ -8,6 +8,10 @@ #include #include +#include "msm_vidc_inst.h" + +struct vb2_queue *msm_vidc_get_vb2q(struct msm_vidc_inst *inst, + u32 type, const char *func); /* vb2_mem_ops */ void *msm_vb2_get_userptr(struct device *dev, unsigned long vaddr, diff --git a/driver/vidc/inc/venus_hfi.h b/driver/vidc/inc/venus_hfi.h index 44393c75be..57a0dbcea5 100644 --- a/driver/vidc/inc/venus_hfi.h +++ b/driver/vidc/inc/venus_hfi.h @@ -64,14 +64,13 @@ int venus_hfi_session_close(struct msm_vidc_inst *inst); int venus_hfi_session_open(struct msm_vidc_inst *inst); int venus_hfi_session_set_codec(struct msm_vidc_inst *inst); int venus_hfi_core_init(struct msm_vidc_core *core); -int venus_hfi_core_release(struct msm_vidc_core *core); +int venus_hfi_core_deinit(struct msm_vidc_core *core); int venus_hfi_suspend(struct msm_vidc_core *core); int venus_hfi_scale_clocks(struct msm_vidc_inst* inst, u64 freq); int venus_hfi_scale_buses(struct msm_vidc_inst* inst, u64 bw_ddr, u64 bw_llcc); void venus_hfi_work_handler(struct work_struct *work); void venus_hfi_pm_work_handler(struct work_struct *work); -void venus_hfi_inst_work_handler(struct work_struct *work); irqreturn_t venus_hfi_isr(int irq, void *data); void __write_register(struct msm_vidc_core *core, diff --git a/driver/vidc/inc/venus_hfi_response.h b/driver/vidc/inc/venus_hfi_response.h index c48a92f0b3..57110372c3 100644 --- a/driver/vidc/inc/venus_hfi_response.h +++ b/driver/vidc/inc/venus_hfi_response.h @@ -14,5 +14,8 @@ bool is_valid_port(struct msm_vidc_inst *inst, u32 port, const char *func); bool is_valid_hfi_buffer_type(struct msm_vidc_inst *inst, u32 buffer_type, const char *func); +void handle_session_input_psc_work_handler(struct work_struct *work); +int handle_session_input_psc(struct msm_vidc_inst *inst, + struct input_psc_work *psc_work); #endif // __VENUS_HFI_RESPONSE_H__ diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 3c39f81dbb..bff4c0f954 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -1158,7 +1158,7 @@ int msm_vdec_output_port_settings_change(struct msm_vidc_inst *inst) return 0; } -int msm_vdec_stop_input(struct msm_vidc_inst *inst) +int msm_vdec_streamoff_input(struct msm_vidc_inst *inst) { int rc = 0; @@ -1167,31 +1167,28 @@ int msm_vdec_stop_input(struct msm_vidc_inst *inst) return -EINVAL; } - rc = msm_vidc_session_stop(inst, INPUT_PORT); + rc = msm_vidc_session_streamoff(inst, INPUT_PORT); if (rc) return rc; return 0; } -int msm_vdec_start_input(struct msm_vidc_inst *inst) +int msm_vdec_streamon_input(struct msm_vidc_inst *inst) { int rc = 0; - struct msm_vidc_core *core; if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - core = inst->core; - s_vpr_h(inst->sid, "%s()\n", __func__); if (is_input_meta_enabled(inst) && !inst->vb2q[INPUT_META_PORT].streaming) { s_vpr_e(inst->sid, "%s: Meta port must be streamed on before data port\n", __func__); - goto error; + return -EINVAL; } //rc = msm_vidc_check_session_supported(inst); @@ -1244,20 +1241,19 @@ int msm_vdec_start_input(struct msm_vidc_inst *inst) if (rc) return rc; - rc = msm_vidc_session_start(inst, INPUT_PORT); + rc = msm_vidc_session_streamon(inst, INPUT_PORT); if (rc) goto error; - s_vpr_h(inst->sid, "%s: done\n", __func__); return 0; error: s_vpr_e(inst->sid, "%s: failed\n", __func__); - msm_vdec_stop_input(inst); + msm_vdec_streamoff_input(inst); return rc; } -int msm_vdec_stop_output(struct msm_vidc_inst *inst) +int msm_vdec_streamoff_output(struct msm_vidc_inst *inst) { int rc = 0; @@ -1266,7 +1262,7 @@ int msm_vdec_stop_output(struct msm_vidc_inst *inst) return -EINVAL; } - rc = msm_vidc_session_stop(inst, OUTPUT_PORT); + rc = msm_vidc_session_streamoff(inst, OUTPUT_PORT); if (rc) return rc; @@ -1385,11 +1381,10 @@ static int msm_vdec_subscribe_output_port_settings_change(struct msm_vidc_inst * return rc; } -int msm_vdec_start_output(struct msm_vidc_inst *inst) +int msm_vdec_streamon_output(struct msm_vidc_inst *inst) { int rc = 0; - d_vpr_h("%s()\n", __func__); if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; @@ -1400,7 +1395,7 @@ int msm_vdec_start_output(struct msm_vidc_inst *inst) s_vpr_e(inst->sid, "%s: Meta port must be streamed on before data port\n", __func__); - goto error; + return -EINVAL; } rc = msm_vdec_set_output_properties(inst); @@ -1409,26 +1404,27 @@ int msm_vdec_start_output(struct msm_vidc_inst *inst) if (!inst->opsc_properties_set) { memcpy(&inst->subcr_params[OUTPUT_PORT], - &inst->subcr_params[INPUT_PORT], sizeof(inst->subcr_params[INPUT_PORT])); + &inst->subcr_params[INPUT_PORT], + sizeof(inst->subcr_params[INPUT_PORT])); rc = msm_vdec_subscribe_output_port_settings_change(inst, OUTPUT_PORT); if (rc) - return rc; + goto error; inst->opsc_properties_set = true; } rc = msm_vdec_subscribe_metadata(inst, OUTPUT_PORT); if (rc) - return rc; + goto error; - rc = msm_vidc_session_start(inst, OUTPUT_PORT); + rc = msm_vidc_session_streamon(inst, OUTPUT_PORT); if (rc) goto error; - d_vpr_h("%s: done\n", __func__); return 0; error: - msm_vdec_stop_output(inst); + s_vpr_e(inst->sid, "%s: failed\n", __func__); + msm_vdec_streamoff_output(inst); return rc; } @@ -1468,6 +1464,8 @@ int msm_vdec_process_cmd(struct msm_vidc_inst *inst, u32 cmd) } if (cmd == V4L2_DEC_CMD_STOP) { + if (!msm_vidc_allow_stop(inst)) + return -EBUSY; rc = venus_hfi_session_command(inst, HFI_CMD_DRAIN, INPUT_PORT, @@ -1476,6 +1474,23 @@ int msm_vdec_process_cmd(struct msm_vidc_inst *inst, u32 cmd) 0); if (rc) return rc; + rc = msm_vidc_state_change_stop(inst); + if (rc) + return rc; + } else if (cmd == V4L2_DEC_CMD_START) { + if (!msm_vidc_allow_start(inst)) + return -EBUSY; + rc = msm_vidc_state_change_start(inst); + if (rc) + return rc; + rc = venus_hfi_session_command(inst, + HFI_CMD_RESUME, + OUTPUT_PORT, + HFI_PAYLOAD_NONE, + NULL, + 0); + if (rc) + return rc; } else { d_vpr_e("%s: unknown cmd %d\n", __func__, cmd); return -EINVAL; @@ -1490,23 +1505,13 @@ int msm_vdec_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) struct msm_vidc_core *core; struct v4l2_format *fmt; - d_vpr_h("%s()\n", __func__); if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } core = inst->core; - if (inst->state == MSM_VIDC_START) { - d_vpr_e("%s: invalid state %d\n", __func__, inst->state); - return -EINVAL; - } - if (f->type == INPUT_MPLANE) { - if (inst->state == MSM_VIDC_START_INPUT) { - d_vpr_e("%s: invalid state %d\n", __func__, inst->state); - return -EINVAL; - } if (inst->fmts[INPUT_PORT].fmt.pix_mp.pixelformat != f->fmt.pix_mp.pixelformat) { s_vpr_e(inst->sid, @@ -1562,10 +1567,6 @@ int msm_vdec_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) //msm_vidc_update_batching(inst); } else if (f->type == INPUT_META_PLANE) { - if (inst->state == MSM_VIDC_START_INPUT) { - d_vpr_e("%s: invalid state %d\n", __func__, inst->state); - return -EINVAL; - } fmt = &inst->fmts[INPUT_META_PORT]; fmt->type = INPUT_META_PLANE; fmt->fmt.meta.dataformat = V4L2_META_FMT_VIDC; @@ -1592,10 +1593,6 @@ int msm_vdec_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) inst->buffers.input_meta.min_count, inst->buffers.input_meta.extra_count); } else if (f->type == OUTPUT_MPLANE) { - if (inst->state == MSM_VIDC_START_OUTPUT) { - d_vpr_e("%s: invalid state %d\n", __func__, inst->state); - return -EINVAL; - } fmt = &inst->fmts[OUTPUT_PORT]; fmt->type = OUTPUT_MPLANE; fmt->fmt.pix_mp.pixelformat = f->fmt.pix_mp.pixelformat; @@ -1637,10 +1634,6 @@ int msm_vdec_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) inst->buffers.output.min_count, inst->buffers.output.extra_count); } else if (f->type == OUTPUT_META_PLANE) { - if (inst->state == MSM_VIDC_START_OUTPUT) { - d_vpr_e("%s: invalid state %d\n", __func__, inst->state); - return -EINVAL; - } fmt = &inst->fmts[OUTPUT_META_PORT]; fmt->type = OUTPUT_META_PLANE; fmt->fmt.meta.dataformat = V4L2_META_FMT_VIDC; @@ -1681,7 +1674,6 @@ int msm_vdec_g_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) int rc = 0; int port; - d_vpr_h("%s()\n", __func__); if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; @@ -1767,7 +1759,6 @@ int msm_vdec_inst_init(struct msm_vidc_inst *inst) struct msm_vidc_core *core; struct v4l2_format *f; - d_vpr_h("%s()\n", __func__); if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; @@ -1850,3 +1841,16 @@ int msm_vdec_inst_init(struct msm_vidc_inst *inst) return rc; } + +int msm_vdec_inst_deinit(struct msm_vidc_inst *inst) +{ + int rc = 0; + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + rc = msm_vidc_ctrl_deinit(inst); + + return rc; +} diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index b071853345..94db5ab018 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -701,7 +701,7 @@ static int msm_venc_metadata_subscription(struct msm_vidc_inst *inst, return rc; } -int msm_venc_stop_input(struct msm_vidc_inst *inst) +int msm_venc_streamoff_input(struct msm_vidc_inst *inst) { int rc = 0; @@ -710,31 +710,28 @@ int msm_venc_stop_input(struct msm_vidc_inst *inst) return -EINVAL; } - rc = msm_vidc_session_stop(inst, INPUT_PORT); + rc = msm_vidc_session_streamoff(inst, INPUT_PORT); if (rc) return rc; return 0; } -int msm_venc_start_input(struct msm_vidc_inst *inst) +int msm_venc_streamon_input(struct msm_vidc_inst *inst) { int rc = 0; - struct msm_vidc_core *core; if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - core = inst->core; - s_vpr_h(inst->sid, "%s()\n", __func__); if (is_input_meta_enabled(inst) && !inst->vb2q[INPUT_META_PORT].streaming) { s_vpr_e(inst->sid, "%s: Meta port must be streamed on before data port\n", __func__); - goto error; + return -EINVAL; } //rc = msm_vidc_check_session_supported(inst); @@ -780,16 +777,15 @@ int msm_venc_start_input(struct msm_vidc_inst *inst) if (rc) return rc; - rc = msm_vidc_session_start(inst, INPUT_PORT); + rc = msm_vidc_session_streamon(inst, INPUT_PORT); if (rc) goto error; - s_vpr_h(inst->sid, "%s: done\n", __func__); return 0; error: s_vpr_e(inst->sid, "%s: failed\n", __func__); - msm_venc_stop_input(inst); + msm_venc_streamoff_input(inst); return rc; } @@ -803,6 +799,8 @@ int msm_venc_process_cmd(struct msm_vidc_inst *inst, u32 cmd) } if (cmd == V4L2_ENC_CMD_STOP) { + if (!msm_vidc_allow_stop(inst)) + return -EBUSY; rc = venus_hfi_session_command(inst, HFI_CMD_DRAIN, INPUT_PORT, @@ -811,6 +809,17 @@ int msm_venc_process_cmd(struct msm_vidc_inst *inst, u32 cmd) 0); if (rc) return rc; + } else if (cmd == V4L2_ENC_CMD_START) { + if (!msm_vidc_allow_start(inst)) + return -EBUSY; + rc = venus_hfi_session_command(inst, + HFI_CMD_RESUME, + INPUT_PORT, + HFI_PAYLOAD_NONE, + NULL, + 0); + if (rc) + return rc; } else { d_vpr_e("%s: unknown cmd %d\n", __func__, cmd); return -EINVAL; @@ -818,7 +827,7 @@ int msm_venc_process_cmd(struct msm_vidc_inst *inst, u32 cmd) return 0; } -int msm_venc_stop_output(struct msm_vidc_inst *inst) +int msm_venc_streamoff_output(struct msm_vidc_inst *inst) { int rc = 0; @@ -827,18 +836,17 @@ int msm_venc_stop_output(struct msm_vidc_inst *inst) return -EINVAL; } - rc = msm_vidc_session_stop(inst, OUTPUT_PORT); + rc = msm_vidc_session_streamoff(inst, OUTPUT_PORT); if (rc) return rc; return 0; } -int msm_venc_start_output(struct msm_vidc_inst *inst) +int msm_venc_streamon_output(struct msm_vidc_inst *inst) { int rc = 0; - d_vpr_h("%s()\n", __func__); if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; @@ -849,7 +857,7 @@ int msm_venc_start_output(struct msm_vidc_inst *inst) s_vpr_e(inst->sid, "%s: Meta port must be streamed on before data port\n", __func__); - goto error; + return -EINVAL; } rc = msm_venc_set_output_properties(inst); @@ -858,11 +866,11 @@ int msm_venc_start_output(struct msm_vidc_inst *inst) rc = msm_vidc_adjust_v4l2_properties(inst); if (rc) - return -EINVAL; + goto error; rc = msm_vidc_set_v4l2_properties(inst); if (rc) - return -EINVAL; + goto error; rc = msm_venc_set_internal_properties(inst); if (rc) @@ -870,21 +878,21 @@ int msm_venc_start_output(struct msm_vidc_inst *inst) rc = msm_venc_property_subscription(inst, OUTPUT_PORT); if (rc) - return rc; + goto error; rc = msm_venc_metadata_subscription(inst, OUTPUT_PORT); if (rc) - return rc; + goto error; - rc = msm_vidc_session_start(inst, OUTPUT_PORT); + rc = msm_vidc_session_streamon(inst, OUTPUT_PORT); if (rc) goto error; - d_vpr_h("%s: done\n", __func__); return 0; error: - msm_venc_stop_output(inst); + s_vpr_e(inst->sid, "%s: failed\n", __func__); + msm_venc_streamoff_output(inst); return rc; } @@ -894,23 +902,13 @@ int msm_venc_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) struct msm_vidc_core *core; struct v4l2_format *fmt; - d_vpr_h("%s()\n", __func__); if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } core = inst->core; - if (inst->state == MSM_VIDC_START) { - d_vpr_e("%s: invalid state %d\n", __func__, inst->state); - return -EINVAL; - } - if (f->type == INPUT_MPLANE) { - if (inst->state == MSM_VIDC_START_INPUT) { - d_vpr_e("%s: invalid state %d\n", __func__, inst->state); - return -EINVAL; - } fmt = &inst->fmts[INPUT_PORT]; fmt->type = INPUT_MPLANE; fmt->fmt.pix_mp.pixelformat = f->fmt.pix_mp.pixelformat; @@ -959,10 +957,6 @@ int msm_venc_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) //msm_vidc_update_batching(inst); } else if (f->type == INPUT_META_PLANE) { - if (inst->state == MSM_VIDC_START_INPUT) { - d_vpr_e("%s: invalid state %d\n", __func__, inst->state); - return -EINVAL; - } fmt = &inst->fmts[INPUT_META_PORT]; fmt->type = INPUT_META_PLANE; fmt->fmt.meta.dataformat = V4L2_META_FMT_VIDC; @@ -989,10 +983,6 @@ int msm_venc_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) inst->buffers.input_meta.min_count, inst->buffers.input_meta.extra_count); } else if (f->type == OUTPUT_MPLANE) { - if (inst->state == MSM_VIDC_START_OUTPUT) { - d_vpr_e("%s: invalid state %d\n", __func__, inst->state); - return -EINVAL; - } fmt = &inst->fmts[OUTPUT_PORT]; if (fmt->fmt.pix_mp.pixelformat != f->fmt.pix_mp.pixelformat) { s_vpr_e(inst->sid, @@ -1053,10 +1043,6 @@ int msm_venc_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) inst->buffers.output.min_count, inst->buffers.output.extra_count); } else if (f->type == OUTPUT_META_PLANE) { - if (inst->state == MSM_VIDC_START_OUTPUT) { - d_vpr_e("%s: invalid state %d\n", __func__, inst->state); - return -EINVAL; - } fmt = &inst->fmts[OUTPUT_META_PORT]; fmt->type = OUTPUT_META_PLANE; fmt->fmt.meta.dataformat = V4L2_META_FMT_VIDC; @@ -1097,7 +1083,6 @@ int msm_venc_g_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) int rc = 0; int port; - d_vpr_h("%s()\n", __func__); if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; @@ -1265,3 +1250,16 @@ int msm_venc_inst_init(struct msm_vidc_inst *inst) return rc; } + +int msm_venc_inst_deinit(struct msm_vidc_inst *inst) +{ + int rc = 0; + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + rc = msm_vidc_ctrl_deinit(inst); + + return rc; +} diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index 36899dfea4..7e964544a6 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -15,6 +15,7 @@ #include "msm_vidc_debug.h" #include "msm_vidc_control.h" #include "msm_vidc_power.h" +#include "venus_hfi_response.h" #define MSM_VIDC_DRV_NAME "msm_vidc_driver" /* kernel/msm-4.19 */ @@ -68,6 +69,10 @@ int msm_vidc_poll(void *instance, struct file *filp, d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } + if (inst->state == MSM_VIDC_ERROR) { + s_vpr_e(inst->sid, "%s: inst in error state\n", __func__); + return -EINVAL; + } poll_wait(filp, &inst->event_handler.wait, wait); poll_wait(filp, &inst->vb2q[INPUT_META_PORT].done_wq, wait); @@ -216,24 +221,8 @@ int msm_vidc_s_fmt(void *instance, struct v4l2_format *f) return -EINVAL; } - if (f->type == INPUT_MPLANE) { - if (inst->state != MSM_VIDC_OPEN && - inst->state != MSM_VIDC_START_OUTPUT) { - s_vpr_e(inst->sid, - "%s: s_fmt(%d) not allowed in %d state\n", - __func__, f->type, inst->state); - return -EINVAL; - } - } else if (f->type == OUTPUT_MPLANE) { - if (inst->state != MSM_VIDC_OPEN && - inst->state != MSM_VIDC_START_INPUT && - inst->state != MSM_VIDC_DRAIN_START_INPUT) { - s_vpr_e(inst->sid, - "%s: s_fmt(%d) not allowed in %d state\n", - __func__, f->type, inst->state); - return -EINVAL; - } - } + if (!msm_vidc_allow_s_fmt(inst, f->type)) + return -EBUSY; if (inst->domain == MSM_VIDC_DECODER) rc = msm_vdec_s_fmt(inst, f); @@ -261,8 +250,18 @@ int msm_vidc_g_fmt(void *instance, struct v4l2_format *f) rc = msm_vdec_g_fmt(inst, f); if (inst->domain == MSM_VIDC_ENCODER) rc = msm_venc_g_fmt(inst, f); + if (rc) + return rc; - return rc; + if (f->type == INPUT_MPLANE || f->type == OUTPUT_MPLANE) + s_vpr_h(inst->sid, + "%s: type %d format %#x width %d height %d size %d\n", + __func__, f->fmt.pix_mp.pixelformat, f->fmt.pix_mp.width, + f->fmt.pix_mp.height, f->fmt.pix_mp.plane_fmt[0].sizeimage); + else if (f->type == INPUT_META_PLANE || f->type == OUTPUT_META_PLANE) + s_vpr_h(inst->sid, "%s: meta type %d size %d\n", + __func__, f->type, f->fmt.meta.buffersize); + return 0; } EXPORT_SYMBOL(msm_vidc_g_fmt); @@ -273,6 +272,9 @@ int msm_vidc_s_ctrl(void *instance, struct v4l2_control *control) if (!inst || !control) return -EINVAL; + if (!msm_vidc_allow_s_ctrl(inst, control->id)) + return -EBUSY; + return v4l2_s_ctrl(NULL, &inst->ctrl_handler, control); } EXPORT_SYMBOL(msm_vidc_s_ctrl); @@ -316,25 +318,9 @@ int msm_vidc_reqbufs(void *instance, struct v4l2_requestbuffers *b) mutex_lock(&inst->lock); - if (b->type == INPUT_MPLANE) { - if (inst->state != MSM_VIDC_OPEN && - inst->state != MSM_VIDC_START_OUTPUT) { - s_vpr_e(inst->sid, - "%s: reqbufs(%d) not allowed in %d state\n", - __func__, b->type, inst->state); - rc = -EINVAL; - goto unlock; - } - } else if (b->type == OUTPUT_MPLANE) { - if (inst->state != MSM_VIDC_OPEN && - inst->state != MSM_VIDC_START_INPUT && - inst->state != MSM_VIDC_DRAIN_START_INPUT) { - s_vpr_e(inst->sid, - "%s: reqbufs(%d) not allowed in %d state\n", - __func__, b->type, inst->state); - rc = -EINVAL; - goto unlock; - } + if (!msm_vidc_allow_reqbufs(inst, b->type)) { + rc = -EBUSY; + goto unlock; } port = v4l2_type_to_driver_port(inst, b->type, __func__); @@ -370,22 +356,13 @@ int msm_vidc_qbuf(void *instance, struct media_device *mdev, mutex_lock(&inst->lock); - if (inst->state == MSM_VIDC_ERROR) { - s_vpr_e(inst->sid, "%s: error state\n", __func__); - rc = -EINVAL; + if (!msm_vidc_allow_qbuf(inst)) { + rc = -EBUSY; goto unlock; } - if (b->type == INPUT_MPLANE) { - q = &inst->vb2q[INPUT_PORT]; - } else if (b->type == OUTPUT_MPLANE) { - q = &inst->vb2q[OUTPUT_PORT]; - } else if (b->type == INPUT_META_PLANE) { - q = &inst->vb2q[INPUT_META_PORT]; - } else if (b->type == OUTPUT_META_PLANE) { - q = &inst->vb2q[OUTPUT_META_PORT]; - } else { - s_vpr_e(inst->sid, "%s: invalid buffer type %d\n", - __func__, b->type); + + q = msm_vidc_get_vb2q(inst, b->type, __func__); + if (!q) { rc = -EINVAL; goto unlock; } @@ -412,17 +389,9 @@ int msm_vidc_dqbuf(void *instance, struct v4l2_buffer *b) } mutex_lock(&inst->lock); - if (b->type == INPUT_MPLANE) { - q = &inst->vb2q[INPUT_PORT]; - } else if (b->type == OUTPUT_MPLANE) { - q = &inst->vb2q[OUTPUT_PORT]; - } else if (b->type == INPUT_META_PLANE) { - q = &inst->vb2q[INPUT_META_PORT]; - } else if (b->type == OUTPUT_META_PLANE) { - q = &inst->vb2q[OUTPUT_META_PORT]; - } else { - s_vpr_e(inst->sid, "%s: invalid buffer type %d\n", - __func__, b->type); + + q = msm_vidc_get_vb2q(inst, b->type, __func__); + if (!q) { rc = -EINVAL; goto unlock; } @@ -445,7 +414,6 @@ int msm_vidc_streamon(void *instance, enum v4l2_buf_type type) { int rc = 0; struct msm_vidc_inst *inst = instance; - enum msm_vidc_inst_state new_state = MSM_VIDC_ERROR; int port; if (!inst) { @@ -455,26 +423,13 @@ int msm_vidc_streamon(void *instance, enum v4l2_buf_type type) mutex_lock(&inst->lock); - if (type == INPUT_MPLANE) { - if (inst->state != MSM_VIDC_OPEN && - inst->state != MSM_VIDC_START_OUTPUT) { - s_vpr_e(inst->sid, - "%s: streamon(%d) not allowed in %d state\n", - __func__, type, inst->state); - rc = -EINVAL; - goto unlock; - } - } else if (type == OUTPUT_MPLANE) { - if (inst->state != MSM_VIDC_OPEN && - inst->state != MSM_VIDC_START_INPUT && - inst->state != MSM_VIDC_DRAIN_START_INPUT) { - s_vpr_e(inst->sid, - "%s: streamon(%d) not allowed in %d state\n", - __func__, type, inst->state); - rc = -EINVAL; - goto unlock; - } + if (!msm_vidc_allow_streamon(inst, type)) { + rc = -EBUSY; + goto unlock; } + rc = msm_vidc_state_change_streamon(inst, type); + if (rc) + goto unlock; port = v4l2_type_to_driver_port(inst, type, __func__); if (port < 0) { @@ -486,34 +441,10 @@ int msm_vidc_streamon(void *instance, enum v4l2_buf_type type) if (rc) { s_vpr_e(inst->sid, "%s: vb2_streamon(%d) failed, %d\n", __func__, type, rc); + msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); goto unlock; } - if (type == INPUT_MPLANE) { - if (inst->state == MSM_VIDC_OPEN) { - new_state = MSM_VIDC_START_INPUT; - } else if (inst->state == MSM_VIDC_START_OUTPUT) { - new_state = MSM_VIDC_START; - } - rc = msm_vidc_change_inst_state(inst, new_state, __func__); - if (rc) - goto unlock; - } else if (type == OUTPUT_MPLANE) { - if (inst->state == MSM_VIDC_OPEN) { - new_state = MSM_VIDC_START_OUTPUT; - } else if (inst->state == MSM_VIDC_START_INPUT) { - new_state = MSM_VIDC_START; - } else if (inst->state == MSM_VIDC_DRAIN_START_INPUT) { - if (0 /* check if input port settings change pending */) - new_state = MSM_VIDC_DRC_DRAIN; - else - new_state = MSM_VIDC_DRAIN; - } - rc = msm_vidc_change_inst_state(inst, new_state, __func__); - if (rc) - goto unlock; - } - unlock: mutex_unlock(&inst->lock); return rc; @@ -524,7 +455,6 @@ int msm_vidc_streamoff(void *instance, enum v4l2_buf_type type) { int rc = 0; struct msm_vidc_inst *inst = instance; - enum msm_vidc_inst_state new_state = MSM_VIDC_ERROR; int port; if (!inst) { @@ -534,25 +464,13 @@ int msm_vidc_streamoff(void *instance, enum v4l2_buf_type type) mutex_lock(&inst->lock); - if (type == INPUT_MPLANE) { - if (inst->state == MSM_VIDC_OPEN || - inst->state == MSM_VIDC_START_OUTPUT) { - s_vpr_e(inst->sid, - "%s: streamoff(%d) not allowed in %d state\n", - __func__, type, inst->state); - rc = -EINVAL; - goto unlock; - } - } else if (type == OUTPUT_MPLANE) { - if (inst->state == MSM_VIDC_OPEN || - inst->state == MSM_VIDC_START_INPUT) { - s_vpr_e(inst->sid, - "%s: streamoff(%d) not allowed in %d state\n", - __func__, type, inst->state); - rc = -EINVAL; - goto unlock; - } + if (!msm_vidc_allow_streamoff(inst, type)) { + rc = -EBUSY; + goto unlock; } + rc = msm_vidc_state_change_streamoff(inst, type); + if (rc) + goto unlock; port = v4l2_type_to_driver_port(inst, type, __func__); if (port < 0) { @@ -564,45 +482,10 @@ int msm_vidc_streamoff(void *instance, enum v4l2_buf_type type) if (rc) { s_vpr_e(inst->sid, "%s: vb2_streamoff(%d) failed, %d\n", __func__, type, rc); + msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); goto unlock; } - if (type == INPUT_MPLANE) { - if (inst->state == MSM_VIDC_START_INPUT) { - new_state = MSM_VIDC_OPEN; - } else if (inst->state == MSM_VIDC_START) { - new_state = MSM_VIDC_START_OUTPUT; - } else if (inst->state == MSM_VIDC_DRC || - inst->state == MSM_VIDC_DRC_LAST_FLAG || - inst->state == MSM_VIDC_DRAIN || - inst->state == MSM_VIDC_DRAIN_LAST_FLAG || - inst->state == MSM_VIDC_DRC_DRAIN || - inst->state == MSM_VIDC_DRC_DRAIN_LAST_FLAG || - inst->state == MSM_VIDC_DRAIN_START_INPUT) { - new_state = MSM_VIDC_START_OUTPUT; - /* discard pending port settings change if any */ - } - rc = msm_vidc_change_inst_state(inst, new_state, __func__); - if (rc) - goto unlock; - } else if (type == OUTPUT_MPLANE) { - if (inst->state == MSM_VIDC_START_OUTPUT) { - new_state = MSM_VIDC_OPEN; - } else if (inst->state == MSM_VIDC_START || - inst->state == MSM_VIDC_DRAIN || - inst->state == MSM_VIDC_DRAIN_LAST_FLAG || - inst->state == MSM_VIDC_DRC || - inst->state == MSM_VIDC_DRC_LAST_FLAG || - inst->state == MSM_VIDC_DRC_DRAIN) { - new_state = MSM_VIDC_START_INPUT; - } else if (inst->state == MSM_VIDC_DRC_DRAIN_LAST_FLAG) { - new_state = MSM_VIDC_DRAIN_START_INPUT; - } - rc = msm_vidc_change_inst_state(inst, new_state, __func__); - if (rc) - goto unlock; - } - unlock: mutex_unlock(&inst->lock); return rc; @@ -740,8 +623,10 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) if (core->state == MSM_VIDC_CORE_DEINIT) { rc = msm_vidc_core_init(core); - if (rc) + if (rc) { + msm_vidc_core_deinit(core); return NULL; + } } inst = kzalloc(sizeof(*inst), GFP_KERNEL); @@ -750,25 +635,34 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) return NULL; } inst->core = core; + kref_init(&inst->kref); + mutex_init(&inst->lock); + + rc = msm_vidc_add_session(inst); + if (rc) { + d_vpr_e("%s: failed to get session id\n", __func__); + goto error; + } + s_vpr_i(inst->sid, "Opening video instance: %d\n", session_type); + + inst->input_psc_workq = create_singlethread_workqueue("input_psc_workq"); + if (!inst->input_psc_workq) { + d_vpr_e("%s: create input_psc_workq failed\n", __func__); + goto error; + } inst->capabilities = kzalloc( sizeof(struct msm_vidc_inst_capability), GFP_KERNEL); if (!inst->capabilities) { s_vpr_e(inst->sid, "%s: inst capability allocation failed\n", __func__); - return NULL; + goto error; } - rc = msm_vidc_add_session(inst); - if (rc) { - d_vpr_e("%s: failed to get session id\n", __func__); - return NULL; - } + INIT_DELAYED_WORK(&inst->input_psc_work, + handle_session_input_psc_work_handler); - s_vpr_i(inst->sid, "Opening video instance: %d\n", session_type); - - kref_init(&inst->kref); - mutex_init(&inst->lock); + INIT_LIST_HEAD(&inst->input_psc_works); INIT_LIST_HEAD(&inst->buffers.input.list); INIT_LIST_HEAD(&inst->buffers.input_meta.list); INIT_LIST_HEAD(&inst->buffers.output.list); @@ -780,6 +674,7 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) INIT_LIST_HEAD(&inst->buffers.line.list); INIT_LIST_HEAD(&inst->buffers.dpb.list); INIT_LIST_HEAD(&inst->buffers.persist.list); + INIT_LIST_HEAD(&inst->buffers.vpss.list); INIT_LIST_HEAD(&inst->allocations.bin.list); INIT_LIST_HEAD(&inst->allocations.arp.list); INIT_LIST_HEAD(&inst->allocations.comv.list); @@ -787,6 +682,7 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) INIT_LIST_HEAD(&inst->allocations.line.list); INIT_LIST_HEAD(&inst->allocations.dpb.list); INIT_LIST_HEAD(&inst->allocations.persist.list); + INIT_LIST_HEAD(&inst->allocations.vpss.list); INIT_LIST_HEAD(&inst->mappings.input.list); INIT_LIST_HEAD(&inst->mappings.input_meta.list); INIT_LIST_HEAD(&inst->mappings.output.list); @@ -798,6 +694,7 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) INIT_LIST_HEAD(&inst->mappings.line.list); INIT_LIST_HEAD(&inst->mappings.dpb.list); INIT_LIST_HEAD(&inst->mappings.persist.list); + INIT_LIST_HEAD(&inst->mappings.vpss.list); INIT_LIST_HEAD(&inst->children.list); INIT_LIST_HEAD(&inst->firmware.list); inst->domain = session_type; @@ -812,21 +709,18 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) //inst->debugfs_root = // msm_vidc_debugfs_init_inst(inst, core->debugfs_root); - if (is_decode_session(inst)) { + if (is_decode_session(inst)) rc = msm_vdec_inst_init(inst); - if (rc) - goto error; - } else if (is_encode_session(inst)) { + else if (is_encode_session(inst)) rc = msm_venc_inst_init(inst); - if (rc) - goto error; - } + if (rc) + goto error; rc = msm_vidc_vb2_queue_init(inst); if (rc) goto error; - rc = msm_vidc_setup_event_queue(inst); + rc = msm_vidc_event_queue_init(inst); if (rc) goto error; @@ -854,9 +748,12 @@ int msm_vidc_close(void *instance) return -EINVAL; } s_vpr_h(inst->sid, "%s()\n", __func__); + mutex_lock(&inst->lock); msm_vidc_session_close(inst); msm_vidc_remove_session(inst); - + msm_vidc_destroy_buffers(inst); + mutex_unlock(&inst->lock); + put_inst(inst); return rc; } EXPORT_SYMBOL(msm_vidc_close); diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 3bb7295e33..73f77f9b5c 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -346,7 +346,7 @@ int msm_vidc_ctrl_deinit(struct msm_vidc_inst *inst) d_vpr_e("%s: invalid parameters\n", __func__); return -EINVAL; } - + s_vpr_h(inst->sid, "%s(): num ctrls %d\n", __func__, inst->num_ctrls); v4l2_ctrl_handler_free(&inst->ctrl_handler); kfree(inst->ctrls); @@ -362,7 +362,6 @@ int msm_vidc_ctrl_init(struct msm_vidc_inst *inst) struct v4l2_ctrl_config ctrl_cfg = {0}; int num_ctrls = 0, ctrl_idx = 0; - d_vpr_h("%s()\n", __func__); if (!inst || !inst->core || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; @@ -497,6 +496,7 @@ int msm_vidc_ctrl_init(struct msm_vidc_inst *inst) ctrl_idx++; } inst->num_ctrls = num_ctrls; + s_vpr_h(inst->sid, "%s(): num ctrls %d\n", __func__, inst->num_ctrls); return rc; } diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 01b15e7a6c..b2dd409537 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -14,8 +14,11 @@ #include "msm_vidc_memory.h" #include "msm_vidc_debug.h" #include "msm_vidc_power.h" -#include "venus_hfi.h" #include "msm_vidc.h" +#include "msm_vdec.h" +#include "msm_venc.h" +#include "venus_hfi.h" +#include "venus_hfi_response.h" #define COUNT_BITS(a, out) { \ while ((a) >= 1) { \ @@ -345,6 +348,8 @@ struct msm_vidc_buffers *msm_vidc_get_buffers( return &inst->buffers.dpb; case MSM_VIDC_BUF_PERSIST: return &inst->buffers.persist; + case MSM_VIDC_BUF_VPSS: + return &inst->buffers.vpss; default: s_vpr_e(inst->sid, "%s: invalid driver buffer type %d\n", func, buffer_type); @@ -379,6 +384,8 @@ struct msm_vidc_mappings *msm_vidc_get_mappings( return &inst->mappings.dpb; case MSM_VIDC_BUF_PERSIST: return &inst->mappings.persist; + case MSM_VIDC_BUF_VPSS: + return &inst->mappings.vpss; default: s_vpr_e(inst->sid, "%s: invalid driver buffer type %d\n", func, buffer_type); @@ -405,6 +412,8 @@ struct msm_vidc_allocations *msm_vidc_get_allocations( return &inst->allocations.dpb; case MSM_VIDC_BUF_PERSIST: return &inst->allocations.persist; + case MSM_VIDC_BUF_VPSS: + return &inst->allocations.vpss; default: s_vpr_e(inst->sid, "%s: invalid driver buffer type %d\n", func, buffer_type); @@ -412,6 +421,55 @@ struct msm_vidc_allocations *msm_vidc_get_allocations( } } +const char *state_name(enum msm_vidc_inst_state state) +{ + const char *name = "UNKNOWN"; + + switch (state) { + case MSM_VIDC_OPEN: + name = "OPEN"; + break; + case MSM_VIDC_START_INPUT: + name = "START_INPUT"; + break; + case MSM_VIDC_START_OUTPUT: + name = "START_OUTPUT"; + break; + case MSM_VIDC_START: + name = "START"; + break; + case MSM_VIDC_DRC: + name = "DRC"; + break; + case MSM_VIDC_DRC_LAST_FLAG: + name = "DRC_LAST_FLAG"; + break; + case MSM_VIDC_DRAIN: + name = "DRAIN"; + break; + case MSM_VIDC_DRAIN_LAST_FLAG: + name = "DRAIN_LAST_FLAG"; + break; + case MSM_VIDC_DRC_DRAIN: + name = "DRC_DRAIN"; + break; + case MSM_VIDC_DRC_DRAIN_LAST_FLAG: + name = "DRC_DRAIN_LAST_FLAG"; + break; + case MSM_VIDC_DRAIN_START_INPUT: + name = "DRAIN_START_INPUT"; + break; + case MSM_VIDC_ERROR: + name = "ERROR"; + break; + default: + name = "UNKNOWN"; + break; + } + + return name; +} + int msm_vidc_change_inst_state(struct msm_vidc_inst *inst, enum msm_vidc_inst_state request_state, const char *func) { @@ -427,17 +485,531 @@ int msm_vidc_change_inst_state(struct msm_vidc_inst *inst, if (inst->state == MSM_VIDC_ERROR) { s_vpr_h(inst->sid, - "%s: inst is in bad state, can not change state to %d\n", - func, request_state); + "%s: inst is in bad state, can not change state to %s\n", + func, state_name(request_state)); return 0; } - s_vpr_h(inst->sid, "%s: state changed from %d to %d\n", - func, inst->state, request_state); + s_vpr_h(inst->sid, "%s: state changed from %s to %s\n", + func, state_name(inst->state), state_name(request_state)); inst->state = request_state; return 0; } +bool msm_vidc_allow_s_fmt(struct msm_vidc_inst *inst, u32 type) +{ + bool allow = false; + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return false; + } + if (inst->state == MSM_VIDC_OPEN) { + allow = true; + goto exit; + } + if (inst->state == MSM_VIDC_START_INPUT) { + if (type == OUTPUT_MPLANE || type == OUTPUT_META_PLANE) { + allow = true; + goto exit; + } + } + if (inst->state == MSM_VIDC_START_OUTPUT) { + if (type == INPUT_MPLANE || type == INPUT_META_PLANE) { + allow = true; + goto exit; + } + } + +exit: + if (!allow) + s_vpr_e(inst->sid, "%s: type %d not allowed in state %s\n", + __func__, type, state_name(inst->state)); + return allow; +} + +bool msm_vidc_allow_s_ctrl(struct msm_vidc_inst *inst, u32 id) +{ + bool allow = false; + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return false; + } + if (inst->state == MSM_VIDC_OPEN) { + allow = true; + goto exit; + } + if (inst->state == MSM_VIDC_START || inst->state == MSM_VIDC_START_OUTPUT) { + switch (id) { + case V4L2_CID_MPEG_VIDEO_BITRATE: + case V4L2_CID_MPEG_VIDEO_GOP_SIZE: + case V4L2_CID_MPEG_VIDEO_FORCE_KEY_FRAME: + case V4L2_CID_HFLIP: + case V4L2_CID_VFLIP: + case V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP: + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER: + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L0_BR: + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L1_BR: + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L2_BR: + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L3_BR: + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L4_BR: + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L5_BR: + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L6_BR: + case V4L2_CID_MPEG_VIDC_BASELAYER_PRIORITY: + case V4L2_CID_MPEG_VIDC_USELTRFRAME: + case V4L2_CID_MPEG_VIDC_MARKLTRFRAME: + case V4L2_CID_MPEG_VIDC_VIDEO_BLUR_TYPES: + case V4L2_CID_MPEG_VIDC_VIDEO_BLUR_RESOLUTION: + allow = true; + break; + default: + allow = false; + break; + } + } + +exit: + if (!allow) + s_vpr_e(inst->sid, "%s: id %d not allowed in state %s\n", + __func__, id, state_name(inst->state)); + return allow; +} + +bool msm_vidc_allow_reqbufs(struct msm_vidc_inst *inst, u32 type) +{ + bool allow = false; + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return false; + } + if (inst->state == MSM_VIDC_OPEN) { + allow = true; + goto exit; + } + if (inst->state == MSM_VIDC_START_INPUT) { + if (type == OUTPUT_MPLANE || type == OUTPUT_META_PLANE) { + allow = true; + goto exit; + } + } + if (inst->state == MSM_VIDC_START_OUTPUT) { + if (type == INPUT_MPLANE || type == INPUT_META_PLANE) { + allow = true; + goto exit; + } + } + +exit: + if (!allow) + s_vpr_e(inst->sid, "%s: type %d not allowed in state %s\n", + __func__, type, state_name(inst->state)); + return allow; +} + +bool msm_vidc_allow_stop(struct msm_vidc_inst *inst) +{ + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return false; + } + if (inst->state == MSM_VIDC_START || + inst->state == MSM_VIDC_DRC || + inst->state == MSM_VIDC_DRC_LAST_FLAG || + inst->state == MSM_VIDC_DRC_DRAIN) + return true; + + s_vpr_e(inst->sid, "%s: not allowed in state %s\n", + __func__, state_name(inst->state)); + return false; +} + +bool msm_vidc_allow_start(struct msm_vidc_inst *inst) +{ + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return false; + } + if (inst->state == MSM_VIDC_DRAIN_LAST_FLAG || + inst->state == MSM_VIDC_DRC_LAST_FLAG || + inst->state == MSM_VIDC_DRC_DRAIN_LAST_FLAG) + return true; + + s_vpr_e(inst->sid, "%s: not allowed in state %s\n", + __func__, state_name(inst->state)); + return false; +} + +bool msm_vidc_allow_streamon(struct msm_vidc_inst *inst, u32 type) +{ + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return false; + } + if (type == INPUT_MPLANE || type == INPUT_META_PLANE) { + if (inst->state == MSM_VIDC_OPEN || + inst->state == MSM_VIDC_START_OUTPUT) + return true; + } else if (type == OUTPUT_MPLANE || type == OUTPUT_META_PLANE) { + if (inst->state == MSM_VIDC_OPEN || + inst->state == MSM_VIDC_START_INPUT || + inst->state == MSM_VIDC_DRAIN_START_INPUT) + return true; + } + + s_vpr_e(inst->sid, "%s: type %d not allowed in state %s\n", + __func__, type, state_name(inst->state)); + return false; +} + +bool msm_vidc_allow_streamoff(struct msm_vidc_inst *inst, u32 type) +{ + bool allow = true; + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return false; + } + if (type == INPUT_MPLANE || type == INPUT_META_PLANE) { + if (inst->state == MSM_VIDC_OPEN || + inst->state == MSM_VIDC_START_OUTPUT) + allow = false; + } else if (type == OUTPUT_MPLANE || type == OUTPUT_META_PLANE) { + if (inst->state == MSM_VIDC_OPEN || + inst->state == MSM_VIDC_START_INPUT) + allow = false; + } + if (!allow) + s_vpr_e(inst->sid, "%s: type %d not allowed in state %s\n", + __func__, type, state_name(inst->state)); + + return allow; +} + +bool msm_vidc_allow_qbuf(struct msm_vidc_inst *inst) +{ + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return false; + } + if (inst->state == MSM_VIDC_ERROR) { + s_vpr_e(inst->sid, "%s: inst in error state\n", __func__); + return false; + } else { + return true; + } +} + +int msm_vidc_allow_input_psc(struct msm_vidc_inst *inst) +{ + int rc = 0; + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + if (inst->state == MSM_VIDC_START || + inst->state == MSM_VIDC_START_INPUT || + inst->state == MSM_VIDC_DRAIN) { + rc = 0; + } else if (inst->state == MSM_VIDC_DRC || + inst->state == MSM_VIDC_DRC_LAST_FLAG || + inst->state == MSM_VIDC_DRC_DRAIN || + inst->state == MSM_VIDC_DRC_DRAIN_LAST_FLAG || + inst->state == MSM_VIDC_DRAIN_START_INPUT) { + s_vpr_h(inst->sid, "%s: input psc postponed, inst state %s\n", + __func__, state_name(inst->state)); + rc = -EAGAIN; + } else { + s_vpr_e(inst->sid, "%s: input psc in wrong state %s\n", + __func__, state_name(inst->state)); + rc = -EINVAL; + } + + return rc; +} + +bool msm_vidc_allow_last_flag(struct msm_vidc_inst *inst) +{ + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return false; + } + if (inst->state == MSM_VIDC_DRC || + inst->state == MSM_VIDC_DRAIN || + inst->state == MSM_VIDC_DRC_DRAIN) + return true; + + s_vpr_e(inst->sid, "%s: not allowed in state %s\n", + __func__, state_name(inst->state)); + return false; +} + +int msm_vidc_state_change_streamon(struct msm_vidc_inst *inst, u32 type) +{ + int rc = 0; + enum msm_vidc_inst_state new_state = MSM_VIDC_ERROR; + struct input_psc_work *psc_work; + + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (type == INPUT_MPLANE) { + if (inst->state == MSM_VIDC_OPEN) + new_state = MSM_VIDC_START_INPUT; + else if (inst->state == MSM_VIDC_START_OUTPUT) + new_state = MSM_VIDC_START; + } else if (type == OUTPUT_MPLANE) { + if (inst->state == MSM_VIDC_OPEN) { + new_state = MSM_VIDC_START_OUTPUT; + } else if (inst->state == MSM_VIDC_START_INPUT) { + new_state = MSM_VIDC_START; + } else if (inst->state == MSM_VIDC_DRAIN_START_INPUT) { + s_vpr_h(inst->sid, + "%s: streamon(output) in DRAIN_START_INPUT state\n", + __func__); + if (list_empty(&inst->input_psc_works)) { + new_state = MSM_VIDC_DRAIN; + } else { + s_vpr_h(inst->sid, + "%s: streamon(output) in DRAIN_START_INPUT state, input psc pending\n", + __func__); + psc_work = list_first_entry(&inst->input_psc_works, + struct input_psc_work, list); + rc = handle_session_input_psc(inst, psc_work); + if (rc) { + s_vpr_e(inst->sid, + "%s: handle input psc failed\n", __func__); + new_state = MSM_VIDC_ERROR; + } else { + new_state = MSM_VIDC_DRC_DRAIN; + } + list_del(&psc_work->list); + kfree(psc_work->data); + kfree(psc_work); + } + } + } + rc = msm_vidc_change_inst_state(inst, new_state, __func__); + if (rc) + return rc; + + return rc; +} + +int msm_vidc_state_change_streamoff(struct msm_vidc_inst *inst, u32 type) +{ + int rc = 0; + enum msm_vidc_inst_state new_state = MSM_VIDC_ERROR; + struct input_psc_work *psc_work, *dummy; + + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (type == INPUT_MPLANE) { + if (inst->state == MSM_VIDC_START_INPUT) { + new_state = MSM_VIDC_OPEN; + } else if (inst->state == MSM_VIDC_START) { + new_state = MSM_VIDC_START_OUTPUT; + } else if (inst->state == MSM_VIDC_DRC || + inst->state == MSM_VIDC_DRC_LAST_FLAG || + inst->state == MSM_VIDC_DRAIN || + inst->state == MSM_VIDC_DRAIN_LAST_FLAG || + inst->state == MSM_VIDC_DRC_DRAIN || + inst->state == MSM_VIDC_DRC_DRAIN_LAST_FLAG || + inst->state == MSM_VIDC_DRAIN_START_INPUT) { + new_state = MSM_VIDC_START_OUTPUT; + /* discard pending port settings change if any */ + list_for_each_entry_safe(psc_work, dummy, + &inst->input_psc_works, list) { + s_vpr_h(inst->sid, + "%s: discard pending input psc\n", __func__); + list_del(&psc_work->list); + kfree(psc_work->data); + kfree(psc_work); + } + } + } else if (type == OUTPUT_MPLANE) { + if (inst->state == MSM_VIDC_START_OUTPUT) { + new_state = MSM_VIDC_OPEN; + } else if (inst->state == MSM_VIDC_START || + inst->state == MSM_VIDC_DRAIN || + inst->state == MSM_VIDC_DRAIN_LAST_FLAG || + inst->state == MSM_VIDC_DRC || + inst->state == MSM_VIDC_DRC_LAST_FLAG || + inst->state == MSM_VIDC_DRC_DRAIN) { + new_state = MSM_VIDC_START_INPUT; + } else if (inst->state == MSM_VIDC_DRC_DRAIN_LAST_FLAG) { + new_state = MSM_VIDC_DRAIN_START_INPUT; + } + } + rc = msm_vidc_change_inst_state(inst, new_state, __func__); + if (rc) + goto exit; + +exit: + return rc; +} + +int msm_vidc_state_change_stop(struct msm_vidc_inst *inst) +{ + int rc = 0; + enum msm_vidc_inst_state new_state = MSM_VIDC_ERROR; + + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (inst->state == MSM_VIDC_START) { + new_state = MSM_VIDC_DRAIN; + } else if (inst->state == MSM_VIDC_DRC) { + new_state = MSM_VIDC_DRC_DRAIN; + } else if (inst->state == MSM_VIDC_DRC_DRAIN || + inst->state == MSM_VIDC_DRC_LAST_FLAG) { + new_state = MSM_VIDC_DRC_DRAIN_LAST_FLAG; + } else { + s_vpr_e(inst->sid, "%s: wrong state %s\n", + __func__, state_name(inst->state)); + msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); + return -EINVAL; + } + rc = msm_vidc_change_inst_state(inst, new_state, __func__); + if (rc) + return rc; + + return rc; +} + +int msm_vidc_state_change_start(struct msm_vidc_inst *inst) +{ + int rc = 0; + enum msm_vidc_inst_state new_state = MSM_VIDC_ERROR; + struct input_psc_work *psc_work; + + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (inst->state == MSM_VIDC_DRAIN_LAST_FLAG || + inst->state == MSM_VIDC_DRC_LAST_FLAG) { + if (list_empty(&inst->input_psc_works)) { + new_state = MSM_VIDC_START; + } else { + s_vpr_h(inst->sid, + "%s: start in DRC(DRAIN)_LAST_FLAG state, input psc pending\n", + __func__); + psc_work = list_first_entry(&inst->input_psc_works, + struct input_psc_work, list); + rc = handle_session_input_psc(inst, psc_work); + if (rc) { + s_vpr_e(inst->sid, + "%s: handle input psc failed\n", __func__); + new_state = MSM_VIDC_ERROR; + } else { + new_state = MSM_VIDC_DRC; + } + list_del(&psc_work->list); + kfree(psc_work->data); + kfree(psc_work); + } + } else if (inst->state == MSM_VIDC_DRC_DRAIN_LAST_FLAG) { + if (list_empty(&inst->input_psc_works)) { + new_state = MSM_VIDC_DRAIN; + } else { + s_vpr_h(inst->sid, + "%s: start in DRC_DRAIN_LAST_FLAG state, input psc pending\n"); + psc_work = list_first_entry(&inst->input_psc_works, + struct input_psc_work, list); + rc = handle_session_input_psc(inst, psc_work); + if (rc) { + s_vpr_e(inst->sid, + "%s: handle input psc failed\n", __func__); + new_state = MSM_VIDC_ERROR; + } else { + new_state = MSM_VIDC_DRC_DRAIN; + } + list_del(&psc_work->list); + kfree(psc_work->data); + kfree(psc_work); + } + } else { + s_vpr_e(inst->sid, "%s: wrong state %s\n", + __func__, state_name(inst->state)); + msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); + return -EINVAL; + } + rc = msm_vidc_change_inst_state(inst, new_state, __func__); + if (rc) + return rc; + + return rc; +} + +int msm_vidc_state_change_input_psc(struct msm_vidc_inst *inst) +{ + int rc = 0; + enum msm_vidc_inst_state new_state = MSM_VIDC_ERROR; + + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + /* don't change state as output port is not started yet */ + if (inst->state == MSM_VIDC_START_INPUT) + return 0; + + if (inst->state == MSM_VIDC_START) { + new_state = MSM_VIDC_DRC; + } else if (inst->state == MSM_VIDC_DRAIN) { + new_state = MSM_VIDC_DRC_DRAIN; + } else { + s_vpr_e(inst->sid, "%s: wrong state %s\n", + __func__, state_name(inst->state)); + msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); + return -EINVAL; + } + rc = msm_vidc_change_inst_state(inst, new_state, __func__); + if (rc) + return rc; + + return rc; +} + +int msm_vidc_state_change_last_flag(struct msm_vidc_inst *inst) +{ + int rc = 0; + enum msm_vidc_inst_state new_state = MSM_VIDC_ERROR; + + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + if (inst->state == MSM_VIDC_DRC) { + new_state = MSM_VIDC_DRC_LAST_FLAG; + } else if (inst->state == MSM_VIDC_DRAIN) { + new_state = MSM_VIDC_DRAIN_LAST_FLAG; + } else if (inst->state == MSM_VIDC_DRC_DRAIN) { + new_state = MSM_VIDC_DRC_DRAIN_LAST_FLAG; + } else { + s_vpr_e(inst->sid, "%s: wrong state %s\n", + __func__, state_name(inst->state)); + msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); + return -EINVAL; + } + rc = msm_vidc_change_inst_state(inst, new_state, __func__); + if (rc) + return rc; + + return rc; +} + int msm_vidc_get_control(struct msm_vidc_inst *inst, struct v4l2_ctrl *ctrl) { int rc = 0; @@ -602,10 +1174,6 @@ int msm_vidc_put_driver_buf(struct msm_vidc_inst *inst, return -EINVAL; } - /* do not unmap / delete read only buffer */ - if (buf->attr & MSM_VIDC_ATTR_READ_ONLY) - return 0; - rc = msm_vidc_unmap_driver_buf(inst, buf); if (rc) return rc; @@ -1218,20 +1786,18 @@ int msm_vidc_vb2_buffer_done(struct msm_vidc_inst *inst, return 0; } -int msm_vidc_setup_event_queue(struct msm_vidc_inst *inst) +int msm_vidc_event_queue_init(struct msm_vidc_inst *inst) { int rc = 0; int index; struct msm_vidc_core *core; - d_vpr_h("%s()\n", __func__); if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } core = inst->core; - // TODO: check decode is index = 0 and encode is index 1 if (is_decode_session(inst)) index = 0; else if (is_encode_session(inst)) @@ -1245,9 +1811,25 @@ int msm_vidc_setup_event_queue(struct msm_vidc_inst *inst) return rc; } +int msm_vidc_event_queue_deinit(struct msm_vidc_inst *inst) +{ + int rc = 0; + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + v4l2_fh_del(&inst->event_handler); + v4l2_fh_exit(&inst->event_handler); + + return rc; +} + static int vb2q_init(struct msm_vidc_inst *inst, struct vb2_queue *q, enum v4l2_buf_type type) { + int rc = 0; struct msm_vidc_core *core; if (!inst || !q || !inst->core) { @@ -1264,14 +1846,17 @@ static int vb2q_init(struct msm_vidc_inst *inst, q->drv_priv = inst; q->allow_zero_bytesused = 1; q->copy_timestamp = 1; - return vb2_queue_init(q); + rc = vb2_queue_init(q); + if (rc) + s_vpr_e(inst->sid, "%s: vb2_queue_init failed for type %d\n", + __func__, type); + return rc; } int msm_vidc_vb2_queue_init(struct msm_vidc_inst *inst) { int rc = 0; - d_vpr_h("%s()\n", __func__); if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; @@ -1296,6 +1881,22 @@ int msm_vidc_vb2_queue_init(struct msm_vidc_inst *inst) return rc; } +int msm_vidc_vb2_queue_deinit(struct msm_vidc_inst *inst) +{ + int rc = 0; + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + vb2_queue_release(&inst->vb2q[OUTPUT_META_PORT]); + vb2_queue_release(&inst->vb2q[INPUT_META_PORT]); + vb2_queue_release(&inst->vb2q[OUTPUT_PORT]); + vb2_queue_release(&inst->vb2q[INPUT_PORT]); + + return rc; +} + int msm_vidc_add_session(struct msm_vidc_inst *inst) { int rc = 0; @@ -1388,7 +1989,7 @@ int msm_vidc_session_set_codec(struct msm_vidc_inst *inst) return 0; } -int msm_vidc_session_start(struct msm_vidc_inst* inst, +int msm_vidc_session_streamon(struct msm_vidc_inst *inst, enum msm_vidc_port_type port) { int rc = 0; @@ -1407,7 +2008,7 @@ int msm_vidc_session_start(struct msm_vidc_inst* inst, return rc; } -int msm_vidc_session_stop(struct msm_vidc_inst *inst, +int msm_vidc_session_streamoff(struct msm_vidc_inst *inst, enum msm_vidc_port_type port) { int rc = 0; @@ -1433,9 +2034,9 @@ int msm_vidc_session_stop(struct msm_vidc_inst *inst, return rc; core = inst->core; - mutex_unlock(&inst->lock); s_vpr_h(inst->sid, "%s: wait on port: %d for time: %d ms\n", __func__, port, core->capabilities[HW_RESPONSE_TIMEOUT].value); + mutex_unlock(&inst->lock); rc = wait_for_completion_timeout( &inst->completions[signal_type], msecs_to_jiffies( @@ -1472,10 +2073,12 @@ int msm_vidc_session_close(struct msm_vidc_inst *inst) core = inst->core; s_vpr_h(inst->sid, "%s: wait on close for time: %d ms\n", __func__, core->capabilities[HW_RESPONSE_TIMEOUT].value); + mutex_unlock(&inst->lock); rc = wait_for_completion_timeout( &inst->completions[SIGNAL_CMD_CLOSE], msecs_to_jiffies( core->capabilities[HW_RESPONSE_TIMEOUT].value)); + mutex_lock(&inst->lock); if (!rc) { s_vpr_e(inst->sid, "%s: session close timed out\n", __func__); //msm_comm_kill_session(inst); @@ -1519,6 +2122,20 @@ int msm_vidc_get_inst_capability(struct msm_vidc_inst *inst) return rc; } +static int msm_vidc_deinit_core_caps(struct msm_vidc_core *core) +{ + int rc = 0; + + if (!core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + kfree(core->capabilities); + core->capabilities = NULL; + + return rc; +} + static int msm_vidc_init_core_caps(struct msm_vidc_core *core) { int rc = 0; @@ -1563,6 +2180,8 @@ static int msm_vidc_init_core_caps(struct msm_vidc_core *core) } exit: + if (rc) + msm_vidc_deinit_core_caps(core); return rc; } @@ -1595,6 +2214,20 @@ static void update_inst_capability(struct msm_platform_inst_capability *in, } } +static int msm_vidc_deinit_instance_caps(struct msm_vidc_core *core) +{ + int rc = 0; + + if (!core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + kfree(core->inst_caps); + core->inst_caps = NULL; + + return rc; +} + static int msm_vidc_init_instance_caps(struct msm_vidc_core *core) { int rc = 0; @@ -1607,7 +2240,7 @@ static int msm_vidc_init_instance_caps(struct msm_vidc_core *core) if (!core || !core->platform || !core->capabilities) { d_vpr_e("%s: invalid params\n", __func__); rc = -EINVAL; - goto exit; + goto error; } platform_data = core->platform->data.instance_data; @@ -1615,7 +2248,7 @@ static int msm_vidc_init_instance_caps(struct msm_vidc_core *core) d_vpr_e("%s: platform instance data is NULL\n", __func__); rc = -EINVAL; - goto exit; + goto error; } enc_valid_codecs = core->capabilities[ENC_CODECS].value; @@ -1637,7 +2270,7 @@ static int msm_vidc_init_instance_caps(struct msm_vidc_core *core) d_vpr_e("%s: failed to allocate core capabilities\n", __func__); rc = -ENOMEM; - goto exit; + goto error; } } else { d_vpr_e("%s: capabilities memory is expected to be freed\n", @@ -1692,7 +2325,28 @@ static int msm_vidc_init_instance_caps(struct msm_vidc_core *core) } } } -exit: + + return 0; +error: + if (rc) + msm_vidc_deinit_instance_caps(core); + return rc; +} + +int msm_vidc_core_deinit(struct msm_vidc_core *core) +{ + int rc = 0; + + d_vpr_h("%s()\n", __func__); + if (!core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + mutex_lock(&core->lock); + venus_hfi_core_deinit(core); + msm_vidc_deinit_instance_caps(core); + msm_vidc_deinit_core_caps(core); + mutex_unlock(&core->lock); return rc; } @@ -1736,16 +2390,14 @@ int msm_vidc_core_init(struct msm_vidc_core *core) goto unlock; } - mutex_unlock(&core->lock); - /*TODO: acquire lock or not */ d_vpr_h("%s(): waiting for sys init done, %d ms\n", __func__, core->capabilities[HW_RESPONSE_TIMEOUT].value); + mutex_unlock(&core->lock); rc = wait_for_completion_timeout(&core->init_done, msecs_to_jiffies( core->capabilities[HW_RESPONSE_TIMEOUT].value)); if (!rc) { d_vpr_e("%s: system init timed out\n", __func__); - //msm_comm_kill_session(inst); - //rc = -EIO; + rc = -ETIMEDOUT; } else { d_vpr_h("%s: system init wait completed\n", __func__); rc = 0; @@ -1785,6 +2437,82 @@ void msm_vidc_batch_handler(struct work_struct *work) { } +void msm_vidc_destroy_buffers(struct msm_vidc_inst *inst) +{ + struct msm_vidc_buffers *buffers; + struct msm_vidc_buffer *buf, *dummy; + enum msm_vidc_buffer_type buf_types[] = { + MSM_VIDC_BUF_INPUT, + MSM_VIDC_BUF_OUTPUT, + MSM_VIDC_BUF_INPUT_META, + MSM_VIDC_BUF_OUTPUT_META, + MSM_VIDC_BUF_BIN, + MSM_VIDC_BUF_ARP, + MSM_VIDC_BUF_COMV, + MSM_VIDC_BUF_NON_COMV, + MSM_VIDC_BUF_LINE, + MSM_VIDC_BUF_DPB, + MSM_VIDC_BUF_PERSIST, + MSM_VIDC_BUF_VPSS, + }; + int i; + + for (i = 0; i < ARRAY_SIZE(buf_types); i++) { + buffers = msm_vidc_get_buffers(inst, buf_types[i], __func__); + if (!buffers) + continue; + list_for_each_entry_safe(buf, dummy, &buffers->list, list) { + s_vpr_e(inst->sid, + "destroying buffer: type %d idx %d fd %d addr %#x size %d\n", + buf->type, buf->index, buf->fd, buf->device_addr, buf->buffer_size); + if (is_internal_buffer(buf->type)) + msm_vidc_destroy_internal_buffer(inst, buf); + else + msm_vidc_put_driver_buf(inst, buf); + } + } +} + +static void msm_vidc_close_helper(struct kref *kref) +{ + struct msm_vidc_inst *inst = container_of(kref, + struct msm_vidc_inst, kref); + + s_vpr_h(inst->sid, "%s()\n", __func__); + msm_vidc_event_queue_deinit(inst); + msm_vidc_vb2_queue_deinit(inst); + if (is_decode_session(inst)) + msm_vdec_inst_deinit(inst); + else if (is_encode_session(inst)) + msm_venc_inst_deinit(inst); + kfree(inst->capabilities); + if (inst->input_psc_workq) + destroy_workqueue(inst->input_psc_workq); +} + +struct msm_vidc_inst *get_inst_ref(struct msm_vidc_core *core, + struct msm_vidc_inst *instance) +{ + struct msm_vidc_inst *inst = NULL; + bool matches = false; + + if (!core) { + d_vpr_e("%s: invalid params\n", __func__); + return NULL; + } + + mutex_lock(&core->lock); + list_for_each_entry(inst, &core->instances, list) { + if (inst == instance) { + matches = true; + break; + } + } + inst = (matches && kref_get_unless_zero(&inst->kref)) ? inst : NULL; + mutex_unlock(&core->lock); + return inst; +} + struct msm_vidc_inst *get_inst(struct msm_vidc_core *core, u32 session_id) { @@ -1808,14 +2536,6 @@ struct msm_vidc_inst *get_inst(struct msm_vidc_core *core, return inst; } -static void put_inst_helper(struct kref *kref) -{ - struct msm_vidc_inst *inst = container_of(kref, - struct msm_vidc_inst, kref); - - msm_vidc_close(inst); -} - void put_inst(struct msm_vidc_inst *inst) { if (!inst) { @@ -1823,7 +2543,7 @@ void put_inst(struct msm_vidc_inst *inst) return; } - kref_put(&inst->kref, put_inst_helper); + kref_put(&inst->kref, msm_vidc_close_helper); } void core_lock(struct msm_vidc_core *core, const char *function) diff --git a/driver/vidc/src/msm_vidc_probe.c b/driver/vidc/src/msm_vidc_probe.c index 7086d606ab..a28d88594d 100644 --- a/driver/vidc/src/msm_vidc_probe.c +++ b/driver/vidc/src/msm_vidc_probe.c @@ -20,6 +20,8 @@ #define BASE_DEVICE_NUMBER 32 +struct msm_vidc_core *g_core; + static int msm_vidc_deinit_irq(struct msm_vidc_core *core) { struct msm_vidc_dt *dt; @@ -214,25 +216,15 @@ static int msm_vidc_initialize_core(struct msm_vidc_core *core) goto exit; } - core->inst_workq = create_singlethread_workqueue("inst_workq"); - if (!core->inst_workq) { - d_vpr_e("%s: create workq failed\n", __func__); - destroy_workqueue(core->inst_workq); - rc = -EINVAL; - goto exit; - } - mutex_init(&core->lock); INIT_LIST_HEAD(&core->instances); INIT_LIST_HEAD(&core->dangling_instances); - INIT_LIST_HEAD(&core->inst_works); INIT_WORK(&core->device_work, venus_hfi_work_handler); INIT_DELAYED_WORK(&core->pm_work, venus_hfi_pm_work_handler); INIT_DELAYED_WORK(&core->fw_unload_work, msm_vidc_fw_unload_handler); INIT_DELAYED_WORK(&core->batch_work, msm_vidc_batch_handler); INIT_WORK(&core->ssr_work, msm_vidc_ssr_handler); - INIT_DELAYED_WORK(&core->inst_work, venus_hfi_inst_work_handler); exit: return rc; @@ -249,6 +241,7 @@ static int msm_vidc_probe_video_device(struct platform_device *pdev) core = kzalloc(sizeof(*core), GFP_KERNEL); if (!core) return -ENOMEM; + g_core = core; core->pdev = pdev; dev_set_drvdata(&pdev->dev, core); @@ -379,6 +372,7 @@ static int msm_vidc_remove(struct platform_device *pdev) msm_vidc_deinitialize_core(core); dev_set_drvdata(&pdev->dev, NULL); kfree(core); + g_core = NULL; return 0; } diff --git a/driver/vidc/src/msm_vidc_vb2.c b/driver/vidc/src/msm_vidc_vb2.c index 401ccba14c..8023dd0812 100644 --- a/driver/vidc/src/msm_vidc_vb2.c +++ b/driver/vidc/src/msm_vidc_vb2.c @@ -13,6 +13,30 @@ #include "msm_vidc_debug.h" #include "msm_vidc_control.h" +struct vb2_queue *msm_vidc_get_vb2q(struct msm_vidc_inst *inst, + u32 type, const char *func) +{ + struct vb2_queue *q = NULL; + + if (!inst) { + d_vpr_e("%s: invalid buffer type %d\n", func); + return NULL; + } + if (type == INPUT_MPLANE) { + q = &inst->vb2q[INPUT_PORT]; + } else if (type == OUTPUT_MPLANE) { + q = &inst->vb2q[OUTPUT_PORT]; + } else if (type == INPUT_META_PLANE) { + q = &inst->vb2q[INPUT_META_PORT]; + } else if (type == OUTPUT_META_PLANE) { + q = &inst->vb2q[OUTPUT_META_PORT]; + } else { + s_vpr_e(inst->sid, "%s: invalid buffer type %d\n", + __func__, type); + } + return q; +} + void *msm_vb2_get_userptr(struct device *dev, unsigned long vaddr, unsigned long size, enum dma_data_direction dma_dir) { @@ -72,12 +96,6 @@ int msm_vidc_queue_setup(struct vb2_queue *q, return -EINVAL; if (port == INPUT_PORT) { - if (inst->state == MSM_VIDC_START_INPUT) { - d_vpr_e("%s: input invalid state %d\n", - __func__, inst->state); - return -EINVAL; - } - *num_planes = 1; if (*num_buffers < inst->buffers.input.min_count + inst->buffers.input.extra_count) @@ -86,12 +104,6 @@ int msm_vidc_queue_setup(struct vb2_queue *q, inst->buffers.input.actual_count = *num_buffers; } else if (port == INPUT_META_PORT) { - if (inst->state == MSM_VIDC_START_INPUT) { - d_vpr_e("%s: input_meta invalid state %d\n", - __func__, inst->state); - return -EINVAL; - } - *num_planes = 1; if (*num_buffers < inst->buffers.input_meta.min_count + inst->buffers.input_meta.extra_count) @@ -100,12 +112,6 @@ int msm_vidc_queue_setup(struct vb2_queue *q, inst->buffers.input_meta.actual_count = *num_buffers; } else if (port == OUTPUT_PORT) { - if (inst->state == MSM_VIDC_START_OUTPUT) { - d_vpr_e("%s: output invalid state %d\n", - __func__, inst->state); - return -EINVAL; - } - *num_planes = 1; if (*num_buffers < inst->buffers.output.min_count + inst->buffers.output.extra_count) @@ -114,12 +120,6 @@ int msm_vidc_queue_setup(struct vb2_queue *q, inst->buffers.output.actual_count = *num_buffers; } else if (port == OUTPUT_META_PORT) { - if (inst->state == MSM_VIDC_START_OUTPUT) { - d_vpr_e("%s: output_meta invalid state %d\n", - __func__, inst->state); - return -EINVAL; - } - *num_planes = 1; if (*num_buffers < inst->buffers.output_meta.min_count + inst->buffers.output_meta.extra_count) @@ -174,26 +174,29 @@ int msm_vidc_start_streaming(struct vb2_queue *q, unsigned int count) if (q->type == INPUT_MPLANE) { if (is_decode_session(inst)) - rc = msm_vdec_start_input(inst); + rc = msm_vdec_streamon_input(inst); else if (is_encode_session(inst)) - rc = msm_venc_start_input(inst); + rc = msm_venc_streamon_input(inst); else goto error; } else if (q->type == OUTPUT_MPLANE) { if (is_decode_session(inst)) - rc = msm_vdec_start_output(inst); + rc = msm_vdec_streamon_output(inst); else if (is_encode_session(inst)) - rc = msm_venc_start_output(inst); + rc = msm_venc_streamon_output(inst); else goto error; } else { + s_vpr_e(inst->sid, "%s: invalid type %d\n", q->type); goto error; } + if (!rc) + s_vpr_h(inst->sid, "Streamon: %d successful\n", q->type); return rc; error: - s_vpr_e(inst->sid, "%s: invalid session/qtype, qtype %d\n", __func__, q->type); + s_vpr_h(inst->sid, "Streamon: %d failed\n", q->type); return -EINVAL; } @@ -225,30 +228,29 @@ void msm_vidc_stop_streaming(struct vb2_queue *q) if (q->type == INPUT_MPLANE) { if (is_decode_session(inst)) - rc = msm_vdec_stop_input(inst); + rc = msm_vdec_streamoff_input(inst); else if (is_encode_session(inst)) - rc = msm_venc_stop_input(inst); + rc = msm_venc_streamoff_input(inst); else goto error; } else if (q->type == OUTPUT_MPLANE) { if (is_decode_session(inst)) - rc = msm_vdec_stop_output(inst); + rc = msm_vdec_streamoff_output(inst); else if (is_encode_session(inst)) - rc = msm_venc_stop_output(inst); + rc = msm_venc_streamoff_output(inst); else goto error; } else { + s_vpr_e(inst->sid, "%s: invalid type %d\n", q->type); goto error; } - if (rc) - s_vpr_e(inst->sid, "%s: stop failed for qtype: %d\n", - __func__, q->type); + if (!rc) + s_vpr_h(inst->sid, "Streamoff: %d successful\n", q->type); return; error: - s_vpr_e(inst->sid, "%s: invalid session/qtype, qtype: %d\n", - __func__, q->type); + s_vpr_e(inst->sid, "Streamoff: %d failed\n", q->type); return; } diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index 591bda389c..ea5ae830a5 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -2080,7 +2080,7 @@ static void __set_queue_hdr_defaults(struct hfi_queue_header *q_hdr) q_hdr->qhdr_write_idx = 0x0; } -static void __interface_queues_release(struct msm_vidc_core *core) +static void __interface_queues_deinit(struct msm_vidc_core *core) { int i; @@ -2394,7 +2394,7 @@ static void __unload_fw(struct msm_vidc_core *core) qcom_scm_pas_shutdown(core->dt->fw_cookie); core->dt->fw_cookie = 0; - __interface_queues_release(core); + __interface_queues_deinit(core); call_venus_op(core, power_off, core); __deinit_resources(core); @@ -2425,7 +2425,7 @@ irqreturn_t venus_hfi_isr(int irq, void *data) { struct msm_vidc_core *core = data; - d_vpr_e("%s()\n", __func__); + d_vpr_l("%s()\n", __func__); disable_irq_nosync(irq); queue_work(core->device_workq, &core->device_work); @@ -2443,7 +2443,6 @@ void venus_hfi_work_handler(struct work_struct *work) d_vpr_e("%s: invalid params\n", __func__); return; } - d_vpr_e("%s(): core %pK\n", __func__, core); mutex_lock(&core->lock); if (__resume(core)) { @@ -2546,12 +2545,11 @@ int venus_hfi_core_init(struct msm_vidc_core *core) { int rc = 0; - d_vpr_h("%s(): core %p\n", __func__, core); - if (!core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } + d_vpr_h("%s(): core %pK\n", __func__, core); core->packet_size = 4096; core->packet = kzalloc(core->packet_size, GFP_KERNEL); @@ -2580,27 +2578,49 @@ int venus_hfi_core_init(struct msm_vidc_core *core) if (rc) goto error; - __sys_init(core); - __sys_image_version(core); - __sys_set_debug(core, (msm_vidc_debug & FW_LOGMASK) >> FW_LOGSHIFT); - __enable_subcaches(core); - __set_subcaches(core); + rc = __enable_subcaches(core); + if (rc) + goto error; + + rc = __sys_init(core); + if (rc) + goto error; + + rc = __sys_image_version(core); + if (rc) + goto error; + + rc = __sys_set_debug(core, (msm_vidc_debug & FW_LOGMASK) >> FW_LOGSHIFT); + if (rc) + goto error; + + rc = __set_subcaches(core); + if (rc) + goto error; d_vpr_h("%s(): successful\n", __func__); return 0; error: d_vpr_h("%s(): failed\n", __func__); - __unload_fw(core); - kfree(core->response_packet); - kfree(core->packet); + venus_hfi_core_deinit(core); return rc; } -int venus_hfi_core_release(struct msm_vidc_core *core) +int venus_hfi_core_deinit(struct msm_vidc_core *core) { - d_vpr_h("%s(): core %p\n", __func__, core); - + if (!core) { + d_vpr_h("%s(): invalid params\n", __func__); + return -EINVAL; + } + d_vpr_h("%s(): core %pK\n", __func__, core); + __disable_subcaches(core); + __interface_queues_deinit(core); + __unload_fw(core); + kfree(core->response_packet); + core->response_packet = NULL; + kfree(core->packet); + core->packet = NULL; return 0; } @@ -2867,7 +2887,6 @@ int venus_hfi_queue_buffer(struct msm_vidc_inst *inst, struct msm_vidc_core *core; struct hfi_buffer hfi_buffer; - d_vpr_h("%s(): inst %p\n", __func__, inst); if (!inst || !inst->core || !inst->packet) { d_vpr_e("%s: Invalid params\n", __func__); return -EINVAL; @@ -2927,7 +2946,6 @@ int venus_hfi_release_buffer(struct msm_vidc_inst *inst, struct msm_vidc_core *core; struct hfi_buffer hfi_buffer; - d_vpr_h("%s(): inst %p\n", __func__, inst); if (!inst || !buffer) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index 6c3e1b7b2c..fbb1a77f1c 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -10,6 +10,8 @@ #include "msm_vidc_driver.h" #include "msm_vdec.h" +extern struct msm_vidc_core *g_core; + void print_psc_properties(u32 tag, const char *str, struct msm_vidc_inst *inst, struct msm_vidc_subscription_params subsc_params) { @@ -421,8 +423,6 @@ static int handle_output_buffer(struct msm_vidc_inst *inst, //todo: moved to HFI_PROP_PICTURE_TYPE /*if (buffer->flags & HFI_BUF_FW_FLAG_KEYFRAME) buf->flags |= MSM_VIDC_BUF_FLAG_KEYFRAME;*/ - if (buffer->flags & HFI_BUF_FW_FLAG_LAST) - buf->flags |= MSM_VIDC_BUF_FLAG_LAST; //moved to HFI_INFO_DATA_CORRUPT /*if (buffer->flags & HFI_BUF_FW_FLAG_CORRUPT) buf->flags |= MSM_VIDC_BUF_FLAG_ERROR;*/ @@ -432,6 +432,12 @@ static int handle_output_buffer(struct msm_vidc_inst *inst, /*if (buffer->flags & HFI_BUF_FW_FLAG_SUBFRAME) buf->flags |= MSM_VIDC_BUF_FLAG_SUBFRAME;*/ + if (buffer->flags & HFI_BUF_FW_FLAG_LAST) { + if (msm_vidc_allow_last_flag(inst)) { + buf->flags |= MSM_VIDC_BUF_FLAG_LAST; + msm_vidc_state_change_last_flag(inst); + } + } print_vidc_buffer(VIDC_HIGH, "FBD", inst, buf); return rc; @@ -531,7 +537,9 @@ static int handle_dequeue_buffers(struct msm_vidc_inst* inst) if (buf->attr & MSM_VIDC_ATTR_DEQUEUED) { buf->attr &= ~MSM_VIDC_ATTR_DEQUEUED; msm_vidc_vb2_buffer_done(inst, buf); - msm_vidc_put_driver_buf(inst, buf); + /* do not unmap / delete read only buffer */ + if (!(buf->attr & MSM_VIDC_ATTR_READ_ONLY)) + msm_vidc_put_driver_buf(inst, buf); } } } @@ -962,11 +970,10 @@ exit: return rc; } -static int venus_hfi_input_psc(struct msm_vidc_core *core, - struct work_header *work_hdr) +int handle_session_input_psc(struct msm_vidc_inst *inst, + struct input_psc_work *psc_work) { int rc = 0; - struct msm_vidc_inst *inst; struct hfi_header *hdr = NULL; struct hfi_packet *packet; u8 *pkt, *temp_pkt; @@ -974,32 +981,25 @@ static int venus_hfi_input_psc(struct msm_vidc_core *core, u32 hfi_port = 0; int i; - if (!work_hdr) { + if (!inst || !psc_work) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - hdr = (struct hfi_header *)work_hdr->data; + hdr = (struct hfi_header *)psc_work->data; if (!hdr) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - inst = get_inst(core, hdr->session_id); - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - mutex_lock(&inst->lock); hfi_cmd_type = 0; hfi_port = 0; pkt = (u8 *)((u8 *)hdr + sizeof(struct hfi_header)); temp_pkt = pkt; for (i = 0; i < hdr->num_packets; i++) { - if (validate_packet(pkt, work_hdr->data, - work_hdr->data_size, __func__)) { + if (validate_packet(pkt, psc_work->data, + psc_work->data_size, __func__)) { rc = -EINVAL; goto exit; } @@ -1034,47 +1034,48 @@ static int venus_hfi_input_psc(struct msm_vidc_core *core, pkt += packet->size; } - if (hfi_cmd_type == HFI_CMD_SETTINGS_CHANGE) { - if (hfi_port == HFI_PORT_BITSTREAM) { - print_psc_properties(VIDC_HIGH, "INPUT_PSC", inst, - inst->subcr_params[INPUT_PORT]); - rc = msm_vdec_input_port_settings_change(inst); - if (rc) - goto exit; - } - } + print_psc_properties(VIDC_HIGH, "INPUT_PSC", inst, + inst->subcr_params[INPUT_PORT]); + rc = msm_vdec_input_port_settings_change(inst); + if (rc) + goto exit; exit: - mutex_unlock(&inst->lock); - put_inst(inst); return rc; } -void venus_hfi_inst_work_handler(struct work_struct *work) +void handle_session_input_psc_work_handler(struct work_struct *work) { - struct msm_vidc_core *core; - struct work_header *work_hdr, *dummy = NULL; + int rc = 0; + struct msm_vidc_inst *inst; + struct input_psc_work *psc_work, *dummy = NULL; - core = container_of(work, struct msm_vidc_core, inst_work.work); - if (!core) { + inst = container_of(work, struct msm_vidc_inst, input_psc_work.work); + inst = get_inst_ref(g_core, inst); + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return; } - list_for_each_entry_safe(work_hdr, dummy, &core->inst_works, list) { - switch (work_hdr->type) { - case MSM_VIDC_INST_WORK_PSC: - venus_hfi_input_psc(core, work_hdr); - break; - default: - d_vpr_e("%s(): invalid work type: %d\n", __func__, - work_hdr->type); - break; + mutex_lock(&inst->lock); + list_for_each_entry_safe(psc_work, dummy, &inst->input_psc_works, list) { + rc = msm_vidc_allow_input_psc(inst); + if (!rc) { + rc = handle_session_input_psc(inst, psc_work); + if (!rc) + rc = msm_vidc_state_change_input_psc(inst); + + /* either handle input psc or state change failed */ + if (rc) + msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); } - list_del(&work_hdr->list); - kfree(work_hdr->data); - kfree(work_hdr); + list_del(&psc_work->list); + kfree(psc_work->data); + kfree(psc_work); } + mutex_unlock(&inst->lock); + + put_inst(inst); } static int handle_session_response(struct msm_vidc_core *core, @@ -1110,12 +1111,10 @@ static int handle_session_response(struct msm_vidc_core *core, packet->type < HFI_CMD_END) { if (packet->type == HFI_CMD_SETTINGS_CHANGE && packet->port == HFI_PORT_BITSTREAM) { - struct work_header *work; + struct input_psc_work *work; - work = kzalloc(sizeof(struct work_header), GFP_KERNEL); + work = kzalloc(sizeof(struct input_psc_work), GFP_KERNEL); INIT_LIST_HEAD(&work->list); - work->type = MSM_VIDC_INST_WORK_PSC; - work->session_id = hdr->session_id; work->data_size = hdr->size; work->data = kzalloc(hdr->size, GFP_KERNEL); if (!work->data) { @@ -1123,9 +1122,9 @@ static int handle_session_response(struct msm_vidc_core *core, goto exit; } memcpy(work->data, (void *)hdr, hdr->size); - list_add_tail(&work->list, &core->inst_works); - queue_delayed_work(core->inst_workq, - &core->inst_work, msecs_to_jiffies(0)); + list_add_tail(&work->list, &inst->input_psc_works); + queue_delayed_work(inst->input_psc_workq, + &inst->input_psc_work, msecs_to_jiffies(0)); goto exit; } if (hfi_cmd_type == HFI_CMD_SETTINGS_CHANGE) { From c19f4aec51e0ffebb61f6c897ea53e22bf19f0d3 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Tue, 29 Dec 2020 17:26:50 -0800 Subject: [PATCH 0051/1061] video: driver: update basic functionality controls - update basic functionality controls with their parents and children list. - deprecate MPEG2 related code. - rename driver internal color formats. Change-Id: I918d6fd238486098f10c5b9ce40c895bcd9468e5 Signed-off-by: Akshata Sahukar --- driver/platform/waipio/src/msm_vidc_waipio.c | 860 +++++++++--------- .../variant/iris2/src/msm_vidc_buffer_iris2.c | 14 +- .../variant/iris2/src/msm_vidc_power_iris2.c | 2 +- driver/vidc/inc/msm_vidc_bus.h | 12 +- driver/vidc/inc/msm_vidc_control.h | 9 + driver/vidc/inc/msm_vidc_driver.h | 6 +- driver/vidc/inc/msm_vidc_internal.h | 90 +- driver/vidc/inc/msm_vidc_power.h | 12 +- driver/vidc/src/hfi_packet.c | 10 +- driver/vidc/src/msm_venc.c | 1 + driver/vidc/src/msm_vidc_buffer.c | 3 - driver/vidc/src/msm_vidc_control.c | 405 ++++++--- driver/vidc/src/msm_vidc_driver.c | 22 +- driver/vidc/src/msm_vidc_power.c | 2 +- 14 files changed, 775 insertions(+), 673 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index bfb73ccdf0..503a81fb70 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -39,15 +39,15 @@ #define H264 MSM_VIDC_H264 #define HEVC MSM_VIDC_HEVC #define VP9 MSM_VIDC_VP9 -#define MPEG2 MSM_VIDC_MPEG2 #define CODECS_ALL (MSM_VIDC_H264 | MSM_VIDC_HEVC | \ - MSM_VIDC_VP9 | MSM_VIDC_MPEG2) + MSM_VIDC_VP9) static struct msm_platform_core_capability core_data_waipio[] = { /* {type, value} */ {ENC_CODECS, H264|HEVC}, - {DEC_CODECS, H264|HEVC|VP9|MPEG2}, - {MAX_SESSION_COUNT, 16}, + {DEC_CODECS, H264|HEVC|VP9}, + // TODO: MAX_SESSION_COUNT needs to be changed to 16 + {MAX_SESSION_COUNT, 3}, {MAX_SECURE_SESSION_COUNT, 3}, {MAX_MBPF, 173056}, /* (8192x4320)/256 + (4096x2176)/256*/ {MAX_MBPS, 7833600}, /* max_load @@ -66,6 +66,7 @@ static struct msm_platform_core_capability core_data_waipio[] = { {FW_UNLOAD_DELAY, 1000}, /* 1000 ms */ {HW_RESPONSE_TIMEOUT, 15000}, /* 1000 ms */ {DEBUG_TIMEOUT, 0}, + // TODO: review below entries, and if required rename as PREFETCH {PREFIX_BUF_COUNT_PIX, 18}, {PREFIX_BUF_SIZE_PIX, 13434880}, /* Calculated by VENUS_BUFFER_SIZE for 4096x2160 UBWC */ {PREFIX_BUF_COUNT_NON_PIX, 1}, @@ -74,7 +75,7 @@ static struct msm_platform_core_capability core_data_waipio[] = { * of resolution 4k (4096x2160) * Internal buf size = calculate_scratch_size() + * calculate_scratch1_size() + calculate_persist1_size() - * Take maximum between VP9 10bit, HEVC 10bit, AVC, MPEG2 secure + * Take maximum between VP9 10bit, HEVC 10bit, AVC secure * decoder sessions */ {PAGEFAULT_NON_FATAL, 1}, @@ -95,20 +96,49 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { * children, * adjust, set} */ - {FRAME_WIDTH, ENC|DEC, CODECS_ALL, 128, 8192, 1, 1920}, - {FRAME_HEIGHT, ENC|DEC, CODECS_ALL, 128, 8192, 1, 1080}, - {PIX_FMTS, ENC, CODECS_ALL, + + {FRAME_WIDTH, DEC, CODECS_ALL, 96, 8192, 1, 1920}, + {FRAME_WIDTH, ENC, CODECS_ALL, 128, 8192, 1, 1920}, + {LOSSLESS_FRAME_WIDTH, ENC, H264|HEVC, 128, 4096, 1, 1920}, + /* Secure usecase specific */ + {SECURE_FRAME_WIDTH, ENC|DEC, CODECS_ALL, 128, 4096, 1, 1920}, + {HEVC_IMAGE_FRAME_WIDTH, ENC, HEVC, 128, 512, 1, 512}, + {HEIC_IMAGE_FRAME_WIDTH, ENC, HEVC, 512, 16384, 1, 16384}, + {FRAME_HEIGHT, DEC, CODECS_ALL, 96, 8192, 1, 1080}, + {FRAME_HEIGHT, ENC, CODECS_ALL, 128, 8192, 1, 1080}, + {LOSSLESS_FRAME_HEIGHT, ENC, H264|HEVC, 128, 4096, 1, 1080}, + {SECURE_FRAME_HEIGHT, ENC|DEC, CODECS_ALL, 128, 4096, 1, 1080}, + {HEVC_IMAGE_FRAME_HEIGHT, ENC, HEVC, 128, 512, 1, 512}, + {HEIC_IMAGE_FRAME_HEIGHT, ENC, HEVC, 512, 16384, 1, 16384}, + {PIX_FMTS, ENC, H264, MSM_VIDC_FMT_NV12, - MSM_VIDC_FMT_NV12_TP10_UBWC, - MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12_UBWC | - MSM_VIDC_FMT_NV12_P010 | MSM_VIDC_FMT_NV12_TP10_UBWC, - MSM_VIDC_FMT_NV12_UBWC}, - {PIX_FMTS, DEC, CODECS_ALL, + MSM_VIDC_FMT_NV12C, + MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C, + MSM_VIDC_FMT_NV12C}, + {PIX_FMTS, ENC|DEC, HEVC, MSM_VIDC_FMT_NV12, - MSM_VIDC_FMT_NV12_TP10_UBWC, - MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12_UBWC | - MSM_VIDC_FMT_NV12_P010 | MSM_VIDC_FMT_NV12_TP10_UBWC, - MSM_VIDC_FMT_NV12_UBWC}, + MSM_VIDC_FMT_TP10C, + MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C | + MSM_VIDC_FMT_P010 | MSM_VIDC_FMT_TP10C, + MSM_VIDC_FMT_NV12C, + 0, 0, + CAP_FLAG_ROOT, + {0}, + {PROFILE}}, + + {PIX_FMTS, DEC, H264, + MSM_VIDC_FMT_NV12, + MSM_VIDC_FMT_NV12C, + MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C, + MSM_VIDC_FMT_NV12C}, + + {PIX_FMTS, DEC, VP9, + MSM_VIDC_FMT_NV12, + MSM_VIDC_FMT_TP10C, + MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C | + MSM_VIDC_FMT_P010 | MSM_VIDC_FMT_TP10C, + MSM_VIDC_FMT_NV12C}, + {MIN_BUFFERS_INPUT, ENC|DEC, CODECS_ALL, 0, 64, 1, 4, V4L2_CID_MIN_BUFFERS_FOR_OUTPUT}, {MIN_BUFFERS_OUTPUT, ENC|DEC, CODECS_ALL, @@ -118,10 +148,22 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, /* (8192 * 4320) / 256 */ - {MBPF, ENC|DEC, CODECS_ALL, 64, 138240, 1, 138240}, + {MBPF, ENC, CODECS_ALL, 64, 138240, 1, 138240}, + {MBPF, DEC, CODECS_ALL, 36, 138240, 1, 138240}, + /* (4096 * 2304) / 256 */ + {LOSSLESS_MBPF, ENC, H264|HEVC, 64, 36864, 1, 36864}, + /* Batch Mode Decode */ + {BATCH_MBPF, DEC, CODECS_ALL, 64, 34816, 1, 34816}, + /* (4096 * 2304) / 256 */ + {SECURE_MBPF, ENC|DEC, CODECS_ALL, 64, 36864, 1, 36864}, + /* ((1920 * 1088) / 256) * 480 fps */ + {MBPS, ENC, CODECS_ALL, 64, 3916800, 1, 3916800}, /* ((1920 * 1088) / 256) * 960 fps */ - {MBPS, ENC|DEC, CODECS_ALL, 64, 7833600, 1, 7833600}, + {MBPS, DEC, CODECS_ALL, 64, 7833600, 1, 7833600}, + /* ((4096 * 2304) / 256) * 60 fps */ + {POWER_SAVE_MBPS, ENC, CODECS_ALL, 0, 2211840, 1, 2211840}, + // TODO: Decide to store q16 or just int {FRAME_RATE, ENC, CODECS_ALL, (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), 1, (DEFAULT_FPS << 16), @@ -131,9 +173,15 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {0}, {0}, NULL, msm_vidc_set_q16}, + // Implement: Operating rate will accept any int value. + {OPERATING_RATE, ENC|DEC, CODECS_ALL, + 1, INT_MAX, 1, (DEFAULT_FPS << 16), + 0, + HFI_PROP_FRAME_RATE}, + {SCALE_X, ENC, CODECS_ALL, 8192, 65536, 1, 8192}, - {SCALE_Y, ENC, CODECS_ALL, 8192, 65536, 1, 8192}, {SCALE_X, DEC, CODECS_ALL, 65536, 65536, 1, 65536}, + {SCALE_Y, ENC, CODECS_ALL, 8192, 65536, 1, 8192}, {SCALE_Y, DEC, CODECS_ALL, 65536, 65536, 1, 65536}, {B_FRAME, ENC, H264|HEVC, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, @@ -142,52 +190,25 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { HFI_PROP_MAX_B_FRAMES, CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, - /* ((4096 * 2304) / 256) * 60 fps */ - {POWER_SAVE_MBPS, ENC, CODECS_ALL, - 0, 2211840, 1, 2211840}, - - /* Batch Mode Decode */ - {BATCH_MBPF, DEC, CODECS_ALL, 64, 34816, 1, 34816}, - /* (4096 * 2176) / 256 */ - {BATCH_FRAME_RATE, DEC, CODECS_ALL, 1, 120, 1, 120}, - - /* Lossless encoding usecase specific */ - {LOSSLESS_FRAME_WIDTH, ENC, H264|HEVC, 128, 4096, 1, 1920}, - {LOSSLESS_FRAME_HEIGHT, ENC, H264|HEVC, 128, 4096, 1, 1080}, - /* (4096 * 2304) / 256 */ - {LOSSLESS_MBPF, ENC, H264|HEVC, 64, 36864, 1, 36864}, - - /* All intra encoding usecase specific */ - {ALL_INTRA_FRAME_RATE, ENC, H264|HEVC, 1, 240, 1, 30}, - - /* Image specific */ - {HEVC_IMAGE_FRAME_WIDTH, ENC, HEVC, 128, 512, 1, 512}, - {HEVC_IMAGE_FRAME_HEIGHT, ENC, HEVC, 128, 512, 1, 512}, - {HEIC_IMAGE_FRAME_WIDTH, ENC, HEVC, 512, 16384, 1, 16384}, - {HEIC_IMAGE_FRAME_HEIGHT, ENC, HEVC, 512, 16384, 1, 16384}, - {MB_CYCLES_VSP, ENC, CODECS_ALL, 25, 25, 1, 25}, - {MB_CYCLES_VPP, ENC, CODECS_ALL, 675, 675, 1, 675}, - {MB_CYCLES_LP, ENC, CODECS_ALL, 320, 320, 1, 320}, {MB_CYCLES_VSP, DEC, CODECS_ALL, 25, 25, 1, 25}, {MB_CYCLES_VSP, DEC, VP9, 60, 60, 1, 60}, + {MB_CYCLES_VPP, ENC, CODECS_ALL, 675, 675, 1, 675}, {MB_CYCLES_VPP, DEC, CODECS_ALL, 200, 200, 1, 200}, + {MB_CYCLES_LP, ENC, CODECS_ALL, 320, 320, 1, 320}, {MB_CYCLES_LP, DEC, CODECS_ALL, 200, 200, 1, 200}, {MB_CYCLES_FW, ENC|DEC, CODECS_ALL, 326389, 326389, 1, 326389}, {MB_CYCLES_FW_VPP, ENC|DEC, CODECS_ALL, 44156, 44156, 1, 44156}, - // confirm codec - {B_FRAME_MIN_QP, ENC, HEVC|H264, - 0, 51, 1, 20, - V4L2_CID_MPEG_VIDC_B_FRAME_MIN_QP, - HFI_PROP_MIN_QP_PACKED, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, - - {B_FRAME_MAX_QP, ENC, HEVC|H264, - 0, 51, 1, 20, - V4L2_CID_MPEG_VIDC_B_FRAME_MAX_QP, - HFI_PROP_MAX_QP_PACKED, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + {SECURE_MODE, ENC|DEC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_SECURE, + HFI_PROP_SECURE, + CAP_FLAG_ROOT, + {0}, + {0}, + NULL, msm_vidc_set_u32}, {HFLIP, ENC, CODECS_ALL, V4L2_MPEG_MSM_VIDC_DISABLE, @@ -205,18 +226,10 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { HFI_PROP_FLIP, CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, - {PREPEND_SPSPPS_TO_IDR, ENC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDEO_PREPEND_SPSPPS_TO_IDR, - HFI_PROP_SEQ_HEADER_MODE, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, - - {REQUEST_I_FRAME, ENC, CODECS_ALL, - 0, 0, 0, 0, - V4L2_CID_MPEG_VIDEO_FORCE_KEY_FRAME, - HFI_PROP_REQUEST_SYNC_FRAME, + {ROTATION, ENC, CODECS_ALL, + 0, 270, 90, 0, + V4L2_CID_ROTATE, + HFI_PROP_ROTATION, CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, {SLICE_INTERFACE, DEC, CODECS_ALL, @@ -224,25 +237,6 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_CID_MPEG_VIDEO_DECODER_SLICE_INTERFACE, 0}, - {FRAME_RC, ENC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_ENABLE, - V4L2_CID_MPEG_VIDEO_FRAME_RC_ENABLE, - 0}, - - {BITRATE_MODE, ENC, CODECS_ALL, - V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, - V4L2_MPEG_VIDEO_BITRATE_MODE_CBR, - /* TODO: MBR, CBR_VFR, MBR_VFR, CQ */ - BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_VBR) | - BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CBR), - V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, - V4L2_CID_MPEG_VIDEO_BITRATE_MODE, - HFI_PROP_RATE_CONTROL, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, {0}, - NULL, msm_vidc_set_u32}, - {HEADER_MODE, ENC, CODECS_ALL, V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE, V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME, @@ -253,9 +247,72 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { HFI_PROP_SEQ_HEADER_MODE, CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {0}, + NULL, msm_vidc_set_header_mode}, + + {PREPEND_SPSPPS_TO_IDR, ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDEO_PREPEND_SPSPPS_TO_IDR}, + + {META_SEQ_HDR_NAL, ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_SEQ_HEADER_NAL}, + + /* TODO: Firmware introduced enumeration type for this + * with and without seq header. + */ + {REQUEST_I_FRAME, ENC, CODECS_ALL, + 0, 0, 0, 0, + V4L2_CID_MPEG_VIDEO_FORCE_KEY_FRAME, + HFI_PROP_REQUEST_SYNC_FRAME, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + + /* Enc: Keeping CABAC and CAVLC as same bitrate. + * Dec: there's no use of Bitrate cap + */ + {BIT_RATE, ENC, CODECS_ALL, + 1, 220000000, 1, 20000000, + V4L2_CID_MPEG_VIDEO_BITRATE, + HFI_PROP_TOTAL_BITRATE, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, NULL, msm_vidc_set_u32}, - // confirm codec + {BITRATE_MODE, ENC, CODECS_ALL, + V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, + V4L2_MPEG_VIDEO_BITRATE_MODE_CBR, + /* TODO: CQ. For more info: go/videogki */ + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_VBR) | + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CBR), + V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, + V4L2_CID_MPEG_VIDEO_BITRATE_MODE, + HFI_PROP_RATE_CONTROL, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {0}, {0}, + NULL, msm_vidc_set_bitrate_mode}, + + {LOSSLESS, ENC, HEVC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU}, + + {FRAME_SKIP_MODE, ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE}, + /* TODO(AS): uncomment once below v4l2 id is + * available (post 5.4 kernel) + */ + //V4L2_CID_MPEG_VIDEO_FRAME_SKIP_MODE}, + + {FRAME_RC_ENABLE, ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_ENABLE, + V4L2_CID_MPEG_VIDEO_FRAME_RC_ENABLE}, + + // TODO: GOP dependencies {GOP_SIZE, ENC, CODECS_ALL, 0, MAX_GOP, 1, 2 * DEFAULT_FPS - 1, V4L2_CID_MPEG_VIDEO_GOP_SIZE, @@ -270,42 +327,13 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_CID_MPEG_VIDEO_GOP_CLOSURE, 0}, - {BIT_RATE, ENC, CODECS_ALL, - 1, 220000000, 1, 20000000, - V4L2_CID_MPEG_VIDEO_BITRATE, - HFI_PROP_TOTAL_BITRATE, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, - /* TO DO parents */ {0}, - {SLICE_MAX_BYTES}, - msm_vidc_adjust_bitrate, msm_vidc_set_u32}, - - {BIT_RATE, DEC, CODECS_ALL, 1, 220000000, 1, 220000000}, - - /* Secure usecase specific */ - {SECURE_FRAME_WIDTH, ENC|DEC, CODECS_ALL, 128, 4096, 1, 1920}, - - {SECURE_FRAME_HEIGHT, ENC|DEC, CODECS_ALL, 128, 4096, 1, 1080}, - - /* (4096 * 2304) / 256 */ - {SECURE_MBPF, ENC|DEC, CODECS_ALL, 64, 36864, 1, 36864}, - - {SECURE_MODE, ENC|DEC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_SECURE, - HFI_PROP_SECURE, - CAP_FLAG_ROOT, - {0}, - {0}, - NULL, msm_vidc_set_u32}, - {BLUR_TYPES, ENC, CODECS_ALL, VIDC_BLUR_NONE, VIDC_BLUR_ADAPTIVE, 1, VIDC_BLUR_NONE, V4L2_CID_MPEG_VIDC_VIDEO_BLUR_TYPES, HFI_PROP_BLUR_TYPES, CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, {0}, {0}, - NULL, msm_vidc_set_u32}, + NULL, msm_vidc_set_u32_enum}, {BLUR_RESOLUTION, ENC, CODECS_ALL, 0, S32_MAX, 1, 0, @@ -376,7 +404,6 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { HFI_PROP_AUD, CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, - // confirm codec {TIME_DELTA_BASED_RC, ENC, CODECS_ALL, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_ENABLE, @@ -384,7 +411,6 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { HFI_PROP_TIME_DELTA_BASED_RATE_CONTROL, CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, - // confirm codec {CONTENT_ADAPTIVE_CODING, ENC, CODECS_ALL, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_ENABLE, @@ -398,29 +424,73 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { HFI_PROP_BITRATE_BOOST, CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, - {ROTATION, ENC, CODECS_ALL, - 0, 270, 90, 0, - V4L2_CID_ROTATE, - HFI_PROP_ROTATION, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, - {VBV_DELAY, ENC, CODECS_ALL, 0, 1000, 500, 0, V4L2_CID_MPEG_VIDEO_VBV_DELAY}, - /* HEVC specific */ + // TODO: QP for 10 bits and review QP caps + {MIN_FRAME_QP, ENC, HEVC, 0, 51, 1, 20, V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP, HFI_PROP_MIN_QP_PACKED, CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + {MIN_FRAME_QP, ENC, H264, + 0, 51, 1, 20, + V4L2_CID_MPEG_VIDEO_H264_MIN_QP, + HFI_PROP_MIN_QP_PACKED, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + + {I_FRAME_MIN_QP, ENC, H264, + 0, 51, 1, 20, + V4L2_CID_MPEG_VIDEO_H264_I_FRAME_MIN_QP, + HFI_PROP_MIN_QP_PACKED, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + + {P_FRAME_MIN_QP, ENC, H264, + 0, 51, 1, 20, + V4L2_CID_MPEG_VIDEO_H264_P_FRAME_MIN_QP, + HFI_PROP_MIN_QP_PACKED, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + + // confirm codec + {B_FRAME_MIN_QP, ENC, HEVC|H264, + 0, 51, 1, 20, + V4L2_CID_MPEG_VIDC_B_FRAME_MIN_QP, + HFI_PROP_MIN_QP_PACKED, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + + {MAX_FRAME_QP, ENC, H264, + 0, 51, 1, 20, + V4L2_CID_MPEG_VIDEO_H264_MAX_QP, + HFI_PROP_MAX_QP_PACKED, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + {MAX_FRAME_QP, ENC, HEVC, 0, 51, 1, 20, V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP, HFI_PROP_MAX_QP_PACKED, CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + {I_FRAME_MAX_QP, ENC, H264, + 0, 51, 1, 20, + V4L2_CID_MPEG_VIDEO_H264_I_FRAME_MAX_QP, + HFI_PROP_MAX_QP_PACKED, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + + {P_FRAME_MAX_QP, ENC, H264, + 0, 51, 1, 20, + V4L2_CID_MPEG_VIDEO_H264_P_FRAME_MAX_QP, + HFI_PROP_MAX_QP_PACKED, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + + {B_FRAME_MAX_QP, ENC, HEVC|H264, + 0, 51, 1, 20, + V4L2_CID_MPEG_VIDC_B_FRAME_MAX_QP, + HFI_PROP_MAX_QP_PACKED, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + {HEVC_HIER_QP, ENC, HEVC, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, @@ -437,36 +507,42 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { HFI_PROP_QP_PACKED, CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + {I_FRAME_QP, ENC, H264, + 0, 51, 1, 10, + V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + + {I_FRAME_QP, ENC, VP9, 0, 127, 1, 20}, + {P_FRAME_QP, ENC, HEVC, 0, 51, 1, 20, V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP, HFI_PROP_QP_PACKED, CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + {P_FRAME_QP, ENC, H264, + 0, 51, 1, 20, + V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + + {P_FRAME_QP, ENC, VP9, 0, 127, 1, 40}, + {B_FRAME_QP, ENC, HEVC, 0, 51, 1, 20, V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP, HFI_PROP_QP_PACKED, CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, - {HIER_CODING_TYPE, ENC, HEVC, - V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B, - V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P, - BIT(V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B) | - BIT(V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P), - V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P, - V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE, - HFI_PROP_LAYER_ENCODING_TYPE, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, {0}, - NULL, msm_vidc_set_u32}, - - {HIER_CODING_LAYER, ENC, HEVC, - 0, 5, 1, 0, - V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER, - HFI_PROP_LAYER_COUNT, + {B_FRAME_QP, ENC, H264, + 0, 51, 1, 20, + V4L2_CID_MPEG_VIDEO_H264_B_FRAME_QP, + HFI_PROP_QP_PACKED, CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + {B_FRAME_QP, ENC, VP9, 0, 127, 1, 40}, + {L0_QP, ENC, HEVC, 0, 51, 1, 20, V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L0_QP, @@ -503,85 +579,55 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { HFI_PROP_QP_PACKED, CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, - {PROFILE, ENC|DEC, HEVC, - V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN, - V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10, - BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN) | - BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE) | - BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10), - V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN, - V4L2_CID_MPEG_VIDEO_HEVC_PROFILE, - HFI_PROP_PROFILE, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, - {ENTROPY_MODE}, - NULL, msm_vidc_set_u32}, + {HIER_LAYER_QP, ENC, H264, + 0, 0x0060033, 1, 20, + V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_LAYER_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, - {LEVEL, ENC|DEC, HEVC, - V4L2_MPEG_VIDEO_HEVC_LEVEL_1, - V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2, - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2), - V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2, - V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, - HFI_PROP_LEVEL, + {HIER_CODING_TYPE, ENC, HEVC, + V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B, + V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P, + BIT(V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B) | + BIT(V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P), + V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE, + HFI_PROP_LAYER_ENCODING_TYPE, CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, - {0}, - NULL, msm_vidc_set_u32}, + {0}, {0}, + NULL, msm_vidc_set_u32_enum}, - {HEVC_TIER, ENC|DEC, HEVC, - V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, - V4L2_MPEG_VIDEO_HEVC_TIER_HIGH, - BIT(V4L2_MPEG_VIDEO_HEVC_TIER_MAIN) | - BIT(V4L2_MPEG_VIDEO_HEVC_TIER_HIGH), - V4L2_MPEG_VIDEO_HEVC_TIER_HIGH, - V4L2_CID_MPEG_VIDEO_HEVC_TIER, - HFI_PROP_TIER, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, - {0}, - NULL, msm_vidc_set_u32}, - - {LF_MODE, ENC, HEVC, - V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_DISABLED, - DB_HEVC_DISABLE_SLICE_BOUNDARY, - BIT(V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_DISABLED) | - BIT(V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_ENABLED) | - BIT(DB_HEVC_DISABLE_SLICE_BOUNDARY), - V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_ENABLED, - V4L2_CID_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE, - HFI_PROP_DEBLOCKING_MODE, + /* TODO(AS) - ctrl init failing. Need to fix + {HIER_CODING_TYPE, ENC, H264, + V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_B, + V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P, + BIT(V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_B) | + BIT(V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P), + V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P, + V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_TYPE, + HFI_PROP_LAYER_ENCODING_TYPE, CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + */ - {LF_BETA, ENC, HEVC, - -6, 6, 1, 0, - V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2, - HFI_PROP_DEBLOCKING_MODE, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, - - {LF_TC, ENC, HEVC, - -6, 6, 1, 0, - V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2, - HFI_PROP_DEBLOCKING_MODE, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, - - {LOSSLESS, ENC, HEVC, + //TODO (AS) + {HIER_CODING, ENC, H264, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU, - HFI_PROP_RATE_CONTROL, + V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING, + HFI_PROP_LAYER_ENCODING_TYPE, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + + // TODO: add relationship with GOP_SIZE in caps + {HIER_CODING_LAYER, ENC, HEVC, + 0, 5, 1, 0, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER, + HFI_PROP_LAYER_COUNT, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + + {HIER_CODING_LAYER, ENC, H264, + 0, 6, 1, 0, + V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_LAYER, + HFI_PROP_LAYER_COUNT, CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, {L0_BR, ENC, HEVC, @@ -620,138 +666,6 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { HFI_PROP_BITRATE_LAYER6, CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, - {BIT_RATE, ENC, HEVC, - 1, 160000000, 1, 20000000, - V4L2_CID_MPEG_VIDEO_BITRATE, - HFI_PROP_TOTAL_BITRATE, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, - /* TODO parents */{0}, - {SLICE_MAX_BYTES}, - msm_vidc_adjust_bitrate, msm_vidc_set_u32}, - - {SLICE_MAX_BYTES, ENC, H264|HEVC, - 1, MAX_BITRATE / DEFAULT_FPS / 8 / 10, - 1, MAX_BITRATE / DEFAULT_FPS / 8 / 10, - V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES, - HFI_PROP_MULTI_SLICE_BYTES_COUNT, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, - - {SLICE_MAX_MB, ENC, H264|HEVC, - 1, (MAX_WIDTH * MAX_HEIGHT) / 256 / DEFAULT_FPS / 10, - 1, (MAX_WIDTH * MAX_HEIGHT) / 256 / DEFAULT_FPS / 10, - V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB, - HFI_PROP_MULTI_SLICE_MB_COUNT, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, - - {SLICE_MODE, ENC, H264|HEVC, - V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, - V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_BYTES, - BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE) | - BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_MB) | - BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_BYTES), - V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, - V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE, - 0, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - /* Mpeg2 decoder specific */ - {BIT_RATE, DEC, MPEG2, - 1, 40000000, 1, 20000000, - V4L2_CID_MPEG_VIDEO_BITRATE, - HFI_PROP_TOTAL_BITRATE, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - msm_vidc_adjust_bitrate, msm_vidc_set_u32}, - - {LEVEL, DEC, MPEG2, - V4L2_MPEG_VIDEO_MPEG2_LEVEL_LOW, - V4L2_MPEG_VIDEO_MPEG2_LEVEL_HIGH, - BIT(V4L2_MPEG_VIDEO_MPEG2_LEVEL_LOW) | - BIT(V4L2_MPEG_VIDEO_MPEG2_LEVEL_MAIN) | - BIT(V4L2_MPEG_VIDEO_MPEG2_LEVEL_HIGH_1440) | - BIT(V4L2_MPEG_VIDEO_MPEG2_LEVEL_HIGH), - V4L2_MPEG_VIDEO_MPEG2_LEVEL_HIGH, - V4L2_CID_MPEG_VIDEO_MPEG2_LEVEL, - HFI_PROP_LEVEL, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {PROFILE, DEC, MPEG2, - V4L2_MPEG_VIDEO_MPEG2_PROFILE_SIMPLE, - V4L2_MPEG_VIDEO_MPEG2_PROFILE_MAIN, - BIT(V4L2_MPEG_VIDEO_MPEG2_PROFILE_SIMPLE) | - BIT(V4L2_MPEG_VIDEO_MPEG2_PROFILE_MAIN), - V4L2_MPEG_VIDEO_MPEG2_PROFILE_MAIN, - V4L2_CID_MPEG_VIDEO_MPEG2_PROFILE, - HFI_PROP_PROFILE, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {FRAME_WIDTH, DEC, MPEG2, 128, 1920, 1, 1920}, - {FRAME_HEIGHT, DEC, MPEG2, 128, 1920, 1, 1080}, - /* (1920 * 1088) / 256 */ - {MBPF, DEC, MPEG2, 64, 8160, 1, 8160}, - /* ((1920 * 1088) / 256) * 30*/ - {MBPS, DEC, MPEG2, 64, 244800, 1, 244800}, - {FRAME_RATE, DEC, MPEG2, 1, 30, 1, 30}, - - /* H264 specific */ - {CABAC_BITRATE, ENC, H264, 1, 160000000, 1, 20000000}, - - {I_FRAME_QP, ENC, H264, - 0, 51, 1, 10, - V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP, - HFI_PROP_QP_PACKED, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, - - {P_FRAME_QP, ENC, H264, - 0, 51, 1, 20, - V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP, - HFI_PROP_QP_PACKED, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, - - {B_FRAME_QP, ENC, H264, - 0, 51, 1, 20, - V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP, - HFI_PROP_QP_PACKED, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, - - {MIN_FRAME_QP, ENC, H264, - 0, 51, 1, 20, - V4L2_CID_MPEG_VIDEO_H264_MIN_QP, - HFI_PROP_MIN_QP_PACKED, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, - - {MAX_FRAME_QP, ENC, H264, - 0, 51, 1, 20, - V4L2_CID_MPEG_VIDEO_H264_MAX_QP, - HFI_PROP_MAX_QP_PACKED, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, - - {LF_BETA, ENC, H264, - -6, 6, 1, 0, - V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_BETA, - HFI_PROP_DEBLOCKING_MODE, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, - - {LF_ALPHA, ENC, H264, - -6, 6, 1, 0, - V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_ALPHA, - HFI_PROP_DEBLOCKING_MODE, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, - - {MB_RC, ENC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_ENABLE, - V4L2_CID_MPEG_VIDEO_MB_RC_ENABLE, - 0, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, - - {TRANSFORM_8X8, ENC, H264, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_ENABLE, - V4L2_CID_MPEG_VIDEO_H264_8X8_TRANSFORM, - HFI_PROP_8X8_TRANSFORM, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, - {ENTROPY_MODE, ENC, H264, V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC, V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, @@ -760,26 +674,63 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, V4L2_CID_MPEG_VIDEO_H264_ENTROPY_MODE, HFI_PROP_CABAC_SESSION, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {PROFILE}, - {BIT_RATE}, + {0}, msm_vidc_adjust_entropy_mode, msm_vidc_set_u32}, + {ENTROPY_MODE, DEC, CODECS_ALL, + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC, + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, + BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC) | + BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC), + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, + 0, + HFI_PROP_CABAC_SESSION}, + + /* H264 does not support 10 bit, PIX_FMTS would not be a Parent for this */ {PROFILE, ENC|DEC, H264, V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE, - V4L2_MPEG_VIDEO_H264_PROFILE_HIGH_10, + V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH, BIT(V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH) | BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_BASELINE) | BIT(V4L2_MPEG_VIDEO_H264_PROFILE_MAIN) | - BIT(V4L2_MPEG_VIDEO_H264_PROFILE_HIGH) | - BIT(V4L2_MPEG_VIDEO_H264_PROFILE_HIGH_10), + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_HIGH), V4L2_MPEG_VIDEO_H264_PROFILE_HIGH, V4L2_CID_MPEG_VIDEO_H264_PROFILE, HFI_PROP_PROFILE, CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {ENTROPY_MODE}, - NULL, msm_vidc_set_u32}, + NULL, msm_vidc_set_u32_enum}, + + {PROFILE, ENC|DEC, HEVC, + V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN, + V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10, + BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN) | + BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE) | + BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10), + V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN, + V4L2_CID_MPEG_VIDEO_HEVC_PROFILE, + HFI_PROP_PROFILE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {PIX_FMTS}, + {0}, + msm_vidc_adjust_profile, msm_vidc_set_u32_enum}, + + {PROFILE, DEC, VP9, + V4L2_MPEG_VIDEO_VP9_PROFILE_0, + V4L2_MPEG_VIDEO_VP9_PROFILE_2, + BIT(V4L2_MPEG_VIDEO_VP9_PROFILE_0) | + BIT(V4L2_MPEG_VIDEO_VP9_PROFILE_2), + V4L2_MPEG_VIDEO_VP9_PROFILE_0, + V4L2_CID_MPEG_VIDEO_VP9_PROFILE, + HFI_PROP_PROFILE, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {0}, + {0}, + NULL, msm_vidc_set_u32_enum}, {LEVEL, ENC|DEC, H264, V4L2_MPEG_VIDEO_H264_LEVEL_1_0, @@ -806,7 +757,59 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {0}, - NULL, msm_vidc_set_u32}, + NULL, msm_vidc_set_u32_enum}, + + {LEVEL, ENC|DEC, HEVC, + V4L2_MPEG_VIDEO_HEVC_LEVEL_1, + V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2, + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2), + V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2, + V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {0}, + {0}, + NULL, msm_vidc_set_u32_enum}, + + /* TODO: Bring the VP9 Level upstream GKI change, and level cap here: + * go/videogki + */ + + {HEVC_TIER, ENC|DEC, HEVC, + V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, + V4L2_MPEG_VIDEO_HEVC_TIER_HIGH, + BIT(V4L2_MPEG_VIDEO_HEVC_TIER_MAIN) | + BIT(V4L2_MPEG_VIDEO_HEVC_TIER_HIGH), + V4L2_MPEG_VIDEO_HEVC_TIER_HIGH, + V4L2_CID_MPEG_VIDEO_HEVC_TIER, + HFI_PROP_TIER, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {0}, + {0}, + NULL, msm_vidc_set_u32_enum}, + + {LF_MODE, ENC, HEVC, + V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_DISABLED, + DB_HEVC_DISABLE_SLICE_BOUNDARY, + BIT(V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_DISABLED) | + BIT(V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_ENABLED) | + BIT(DB_HEVC_DISABLE_SLICE_BOUNDARY), + V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_ENABLED, + V4L2_CID_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE, + HFI_PROP_DEBLOCKING_MODE, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, {LF_MODE, ENC, H264, V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED, @@ -819,36 +822,68 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { HFI_PROP_DEBLOCKING_MODE, CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - //TODO (AS) - {HIER_CODING, ENC, H264, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING, - HFI_PROP_LAYER_ENCODING_TYPE, + {LF_ALPHA, ENC, H264, + -6, 6, 1, 0, + V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_ALPHA, + HFI_PROP_DEBLOCKING_MODE, CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, - /* TODO(AS) - ctrl init failing. Need to fix - {HIER_CODING_TYPE, ENC, H264, - V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_B, - V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P, - BIT(V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_B) | - BIT(V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P), - V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P, - V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_TYPE, - HFI_PROP_LAYER_ENCODING_TYPE, + {LF_BETA, ENC, HEVC, + -6, 6, 1, 0, + V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2, + HFI_PROP_DEBLOCKING_MODE, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + + {LF_BETA, ENC, H264, + -6, 6, 1, 0, + V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_BETA, + HFI_PROP_DEBLOCKING_MODE, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + + {LF_TC, ENC, HEVC, + -6, 6, 1, 0, + V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2, + HFI_PROP_DEBLOCKING_MODE, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + + {SLICE_MAX_BYTES, ENC, H264|HEVC, + 1, MAX_BITRATE / DEFAULT_FPS / 8 / 10, + 1, MAX_BITRATE / DEFAULT_FPS / 8 / 10, + V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES, + HFI_PROP_MULTI_SLICE_BYTES_COUNT, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + + {SLICE_MAX_MB, ENC, H264|HEVC, + 1, (MAX_WIDTH * MAX_HEIGHT) / 256 / DEFAULT_FPS / 10, + 1, (MAX_WIDTH * MAX_HEIGHT) / 256 / DEFAULT_FPS / 10, + V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB, + HFI_PROP_MULTI_SLICE_MB_COUNT, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + + {SLICE_MODE, ENC, H264|HEVC, + V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, + V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_BYTES, + BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE) | + BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_MB) | + BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_BYTES), + V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, + V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE, + 0, CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - */ - {HIER_CODING_LAYER, ENC, H264, - 0, 6, 1, 0, - V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_LAYER, - HFI_PROP_LAYER_COUNT, + // TODO: MB level RC - mapping + {MB_RC, ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_ENABLE, + V4L2_CID_MPEG_VIDEO_MB_RC_ENABLE, + 0, CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, - {HIER_LAYER_QP, ENC, H264, - 0, 0x0060033, 1, 20, - V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_LAYER_QP, - HFI_PROP_QP_PACKED, + {TRANSFORM_8X8, ENC, H264, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_ENABLE, + V4L2_CID_MPEG_VIDEO_H264_8X8_TRANSFORM, + HFI_PROP_8X8_TRANSFORM, CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, /* TODO: CHROMA_QP_INDEX_OFFSET is applicable to HEVC as well */ @@ -859,28 +894,11 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { HFI_PROP_CHROMA_QP_OFFSET, CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, - {I_FRAME_MIN_QP, ENC, H264, - 0, 51, 1, 20, - V4L2_CID_MPEG_VIDEO_H264_I_FRAME_MIN_QP, - HFI_PROP_MIN_QP_PACKED, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, - - {I_FRAME_MAX_QP, ENC, H264, - 0, 51, 1, 20, - V4L2_CID_MPEG_VIDEO_H264_I_FRAME_MAX_QP, - HFI_PROP_MIN_QP_PACKED, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, - - {P_FRAME_MIN_QP, ENC, H264, - 0, 51, 1, 20, - V4L2_CID_MPEG_VIDEO_H264_P_FRAME_MIN_QP, - HFI_PROP_MIN_QP_PACKED, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, - - {P_FRAME_MAX_QP, ENC, H264, - 0, 51, 1, 20, - V4L2_CID_MPEG_VIDEO_H264_P_FRAME_MAX_QP, - HFI_PROP_MIN_QP_PACKED, + {DISPLAY_DELAY_ENABLE, DEC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_MFC51_VIDEO_DECODER_H264_DISPLAY_DELAY_ENABLE, + HFI_PROP_DECODE_ORDER_OUTPUT, CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, {DISPLAY_DELAY, DEC, CODECS_ALL, @@ -889,58 +907,24 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { HFI_PROP_DECODE_ORDER_OUTPUT, CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, - {DISPLAY_DELAY_ENABLE, DEC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_MFC51_VIDEO_DECODER_H264_DISPLAY_DELAY_ENABLE, - HFI_PROP_DECODE_ORDER_OUTPUT, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, - - /* VP9 specific */ - {I_FRAME_QP, ENC, VP9, 0, 127, 1, 20}, - - {P_FRAME_QP, ENC, VP9, 0, 127, 1, 40}, - - {B_FRAME_QP, ENC, VP9, 0, 127, 1, 40}, - - {PROFILE, DEC, VP9, - V4L2_MPEG_VIDEO_VP9_PROFILE_0, - V4L2_MPEG_VIDEO_VP9_PROFILE_2, - BIT(V4L2_MPEG_VIDEO_VP9_PROFILE_0) | - BIT(V4L2_MPEG_VIDEO_VP9_PROFILE_2), - V4L2_MPEG_VIDEO_VP9_PROFILE_0, - V4L2_CID_MPEG_VIDEO_VP9_PROFILE, - HFI_PROP_PROFILE, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, - {ENTROPY_MODE}, - NULL, msm_vidc_set_u32}, - /* conceal color */ {CONCEAL_COLOR_8BIT, DEC, CODECS_ALL, 0x0, 0xff3fcff, 1, DEFAULT_VIDEO_CONCEAL_COLOR_BLACK, V4L2_CID_MPEG_VIDEO_MUTE_YUV, HFI_PROP_CONCEAL_COLOR_8BIT, CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + {CONCEAL_COLOR_10BIT, DEC, CODECS_ALL, 0x0, 0x3fffffff, 1, DEFAULT_VIDEO_CONCEAL_COLOR_BLACK, V4L2_CID_MPEG_VIDEO_MUTE_YUV, HFI_PROP_CONCEAL_COLOR_10BIT, CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + // TODO {STAGE, DEC|ENC, CODECS_ALL, 1, 2, 1, 2}, {PIPE, DEC|ENC, CODECS_ALL, 1, 4, 1, 4}, {POC, DEC, H264, 0, 1, 1, 0}, - {ENTROPY_MODE, DEC, CODECS_ALL, - V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC, - V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, - BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC) | - BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC), - V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, - 0, - HFI_PROP_CABAC_SESSION}, - {CODED_FRAMES, DEC, CODECS_ALL, 0, 1, 1, 0, 0, HFI_PROP_CODED_FRAMES}, diff --git a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c index 11599fad8f..940d94fa55 100644 --- a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c @@ -139,7 +139,7 @@ static u32 msm_vidc_decoder_line_size_iris2(struct msm_vidc_inst *inst) pixelformat = inst->fmts[OUTPUT_PORT].fmt.pix_mp.pixelformat; if (pixelformat == MSM_VIDC_FMT_NV12 || - pixelformat == MSM_VIDC_FMT_NV12_P010) + pixelformat == MSM_VIDC_FMT_P010) is_opb = true; else is_opb = false; @@ -304,8 +304,8 @@ static u32 msm_vidc_encoder_line_size_iris2(struct msm_vidc_inst *inst) width = f->fmt.pix_mp.width; height = f->fmt.pix_mp.height; pixelformat = f->fmt.pix_mp.pixelformat; - if (pixelformat == MSM_VIDC_FMT_NV12_P010 || - pixelformat == MSM_VIDC_FMT_NV12_TP10_UBWC) + if (pixelformat == MSM_VIDC_FMT_P010 || + pixelformat == MSM_VIDC_FMT_TP10C) is_tenbit = true; else is_tenbit = false; @@ -335,8 +335,8 @@ static u32 msm_vidc_encoder_dpb_size_iris2(struct msm_vidc_inst *inst) width = f->fmt.pix_mp.width; height = f->fmt.pix_mp.height; pixelformat = f->fmt.pix_mp.pixelformat; - if (pixelformat == MSM_VIDC_FMT_NV12_P010 || - pixelformat == MSM_VIDC_FMT_NV12_TP10_UBWC) + if (pixelformat == MSM_VIDC_FMT_P010 || + pixelformat == MSM_VIDC_FMT_TP10C) is_tenbit = true; else is_tenbit = false; @@ -384,8 +384,8 @@ static u32 msm_vidc_encoder_vpss_size_iris2(struct msm_vidc_inst* inst) width = f->fmt.pix_mp.width; height = f->fmt.pix_mp.height; pixelformat = f->fmt.pix_mp.pixelformat; - if (pixelformat == MSM_VIDC_FMT_NV12_P010 || - pixelformat == MSM_VIDC_FMT_NV12_TP10_UBWC) + if (pixelformat == MSM_VIDC_FMT_P010 || + pixelformat == MSM_VIDC_FMT_TP10C) is_tenbit = true; else is_tenbit = false; diff --git a/driver/variant/iris2/src/msm_vidc_power_iris2.c b/driver/variant/iris2/src/msm_vidc_power_iris2.c index 449eb6bb78..e47829d733 100644 --- a/driver/variant/iris2/src/msm_vidc_power_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_power_iris2.c @@ -473,7 +473,7 @@ static u64 __calculate_encoder(struct vidc_bus_vote_data *d) b_frames_enabled = d->b_frames_enabled; original_color_format = d->num_formats >= 1 ? - d->color_formats[0] : MSM_VIDC_FMT_NV12_UBWC; + d->color_formats[0] : MSM_VIDC_FMT_NV12C; original_compression_enabled = __ubwc(original_color_format); diff --git a/driver/vidc/inc/msm_vidc_bus.h b/driver/vidc/inc/msm_vidc_bus.h index 91005e0464..d28de7ba94 100644 --- a/driver/vidc/inc/msm_vidc_bus.h +++ b/driver/vidc/inc/msm_vidc_bus.h @@ -220,8 +220,8 @@ void __dump(struct dump dump[], int len); static inline bool __ubwc(enum msm_vidc_colorformat_type f) { switch (f) { - case MSM_VIDC_FMT_NV12_UBWC: - case MSM_VIDC_FMT_NV12_TP10_UBWC: + case MSM_VIDC_FMT_NV12C: + case MSM_VIDC_FMT_TP10C: return true; default: return false; @@ -233,11 +233,11 @@ static inline int __bpp(enum msm_vidc_colorformat_type f) switch (f) { case MSM_VIDC_FMT_NV12: case MSM_VIDC_FMT_NV21: - case MSM_VIDC_FMT_NV12_UBWC: - case MSM_VIDC_FMT_RGBA8888_UBWC: + case MSM_VIDC_FMT_NV12C: + case MSM_VIDC_FMT_RGBA8888C: return 8; - case MSM_VIDC_FMT_NV12_P010: - case MSM_VIDC_FMT_NV12_TP10_UBWC: + case MSM_VIDC_FMT_P010: + case MSM_VIDC_FMT_TP10C: return 10; default: d_vpr_e("Unsupported colorformat (%x)", f); diff --git a/driver/vidc/inc/msm_vidc_control.h b/driver/vidc/inc/msm_vidc_control.h index 3cfae1b268..38d8902faa 100644 --- a/driver/vidc/inc/msm_vidc_control.h +++ b/driver/vidc/inc/msm_vidc_control.h @@ -28,10 +28,17 @@ int msm_vidc_ctrl_deinit(struct msm_vidc_inst *inst); int msm_v4l2_op_s_ctrl(struct v4l2_ctrl *ctrl); int msm_vidc_adjust_bitrate(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_entropy_mode(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_profile(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_ltr_count(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_v4l2_properties(struct msm_vidc_inst *inst); +int msm_vidc_set_header_mode(void *instance, + enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_bitrate_mode(void *instance, + enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_u32(void *instance, enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_u32_enum(void *instance, + enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_s32(void *instance, enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_array(void *instance, @@ -41,5 +48,7 @@ int msm_vidc_set_q16(void *instance, int msm_vidc_set_v4l2_properties(struct msm_vidc_inst *inst); int msm_vidc_v4l2_menu_to_hfi(struct msm_vidc_inst *inst, enum msm_vidc_inst_capability_type cap_id, u32 *value); +int msm_vidc_v4l2_to_hfi_enum(struct msm_vidc_inst *inst, + enum msm_vidc_inst_capability_type cap_id, u32 *value); #endif diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index ec9159732a..308a0b0067 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -114,13 +114,13 @@ static inline bool is_linear_colorformat(enum msm_vidc_colorformat_type colorfor { return colorformat == MSM_VIDC_FMT_NV12 || colorformat == MSM_VIDC_FMT_NV21 || - colorformat == MSM_VIDC_FMT_NV12_P010; + colorformat == MSM_VIDC_FMT_P010; } static inline bool is_10bit_colorformat(enum msm_vidc_colorformat_type colorformat) { - return colorformat == MSM_VIDC_FMT_NV12_P010 || - colorformat == MSM_VIDC_FMT_NV12_TP10_UBWC; + return colorformat == MSM_VIDC_FMT_P010 || + colorformat == MSM_VIDC_FMT_TP10C; } static inline bool is_secondary_output_mode(struct msm_vidc_inst *inst) diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index a3aa5442c5..86f75c91e5 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -108,18 +108,17 @@ enum msm_vidc_codec_type { MSM_VIDC_H264 = BIT(0), MSM_VIDC_HEVC = BIT(1), MSM_VIDC_VP9 = BIT(2), - MSM_VIDC_MPEG2 = BIT(3), }; enum msm_vidc_colorformat_type { MSM_VIDC_FMT_NONE = 0, MSM_VIDC_FMT_NV12, MSM_VIDC_FMT_NV21, - MSM_VIDC_FMT_NV12_UBWC, - MSM_VIDC_FMT_NV12_P010, - MSM_VIDC_FMT_NV12_TP10_UBWC, + MSM_VIDC_FMT_NV12C, + MSM_VIDC_FMT_P010, + MSM_VIDC_FMT_TP10C, MSM_VIDC_FMT_RGBA8888, - MSM_VIDC_FMT_RGBA8888_UBWC, + MSM_VIDC_FMT_RGBA8888C, }; enum msm_vidc_buffer_type { @@ -229,47 +228,50 @@ enum msm_vidc_core_capability_type { enum msm_vidc_inst_capability_type { INST_CAP_NONE = 0, FRAME_WIDTH, + LOSSLESS_FRAME_WIDTH, + SECURE_FRAME_WIDTH, + HEVC_IMAGE_FRAME_WIDTH, + HEIC_IMAGE_FRAME_WIDTH, FRAME_HEIGHT, + LOSSLESS_FRAME_HEIGHT, + SECURE_FRAME_HEIGHT, + HEVC_IMAGE_FRAME_HEIGHT, + HEIC_IMAGE_FRAME_HEIGHT, PIX_FMTS, MIN_BUFFERS_INPUT, MIN_BUFFERS_OUTPUT, MBPF, + LOSSLESS_MBPF, + BATCH_MBPF, + SECURE_MBPF, MBPS, + POWER_SAVE_MBPS, FRAME_RATE, + OPERATING_RATE, SCALE_X, SCALE_Y, B_FRAME, - POWER_SAVE_MBPS, - BATCH_MBPF, - BATCH_FRAME_RATE, - LOSSLESS_FRAME_WIDTH, - LOSSLESS_FRAME_HEIGHT, - LOSSLESS_MBPF, - ALL_INTRA_FRAME_RATE, - HEVC_IMAGE_FRAME_WIDTH, - HEVC_IMAGE_FRAME_HEIGHT, - HEIC_IMAGE_FRAME_WIDTH, - HEIC_IMAGE_FRAME_HEIGHT, MB_CYCLES_VSP, MB_CYCLES_VPP, MB_CYCLES_LP, MB_CYCLES_FW, MB_CYCLES_FW_VPP, + SECURE_MODE, HFLIP, VFLIP, - PREPEND_SPSPPS_TO_IDR, - REQUEST_I_FRAME, + ROTATION, SLICE_INTERFACE, - FRAME_RC, - BITRATE_MODE, HEADER_MODE, + PREPEND_SPSPPS_TO_IDR, + META_SEQ_HDR_NAL, + REQUEST_I_FRAME, + BIT_RATE, + BITRATE_MODE, + LOSSLESS, + FRAME_SKIP_MODE, + FRAME_RC_ENABLE, GOP_SIZE, GOP_CLOSURE, - BIT_RATE, - SECURE_FRAME_WIDTH, - SECURE_FRAME_HEIGHT, - SECURE_MBPF, - SECURE_MODE, BLUR_TYPES, BLUR_RESOLUTION, CSC_CUSTOM_MATRIX, @@ -284,28 +286,36 @@ enum msm_vidc_inst_capability_type { TIME_DELTA_BASED_RC, CONTENT_ADAPTIVE_CODING, BITRATE_BOOST, - ROTATION, VBV_DELAY, MIN_FRAME_QP, + I_FRAME_MIN_QP, + P_FRAME_MIN_QP, + B_FRAME_MIN_QP, MAX_FRAME_QP, + I_FRAME_MAX_QP, + P_FRAME_MAX_QP, + B_FRAME_MAX_QP, HEVC_HIER_QP, I_FRAME_QP, P_FRAME_QP, - I_FRAME_MIN_QP, - I_FRAME_MAX_QP, - P_FRAME_MIN_QP, - P_FRAME_MAX_QP, B_FRAME_QP, - B_FRAME_MIN_QP, - B_FRAME_MAX_QP, - HIER_CODING_TYPE, - HIER_CODING_LAYER, L0_QP, L1_QP, L2_QP, L3_QP, L4_QP, L5_QP, + HIER_LAYER_QP, + HIER_CODING_TYPE, + HIER_CODING, + HIER_CODING_LAYER, + L0_BR, + L1_BR, + L2_BR, + L3_BR, + L4_BR, + L5_BR, + ENTROPY_MODE, PROFILE, LEVEL, HEVC_TIER, @@ -313,22 +323,11 @@ enum msm_vidc_inst_capability_type { LF_ALPHA, LF_BETA, LF_TC, - LOSSLESS, - L0_BR, - L1_BR, - L2_BR, - L3_BR, - L4_BR, - L5_BR, SLICE_MAX_BYTES, SLICE_MAX_MB, SLICE_MODE, - CABAC_BITRATE, MB_RC, TRANSFORM_8X8, - ENTROPY_MODE, - HIER_CODING, - HIER_LAYER_QP, CHROMA_QP_INDEX_OFFSET, DISPLAY_DELAY_ENABLE, DISPLAY_DELAY, @@ -341,7 +340,6 @@ enum msm_vidc_inst_capability_type { BIT_DEPTH, CODEC_CONFIG, META_LTR_MARK_USE, - META_SEQ_HDR_NAL, META_DPB_MISR, META_OPB_MISR, META_INTERLACE, diff --git a/driver/vidc/inc/msm_vidc_power.h b/driver/vidc/inc/msm_vidc_power.h index efb25ef1fb..009ff8f1dc 100644 --- a/driver/vidc/inc/msm_vidc_power.h +++ b/driver/vidc/inc/msm_vidc_power.h @@ -221,8 +221,8 @@ void __dump(struct dump dump[], int len); static inline bool __ubwc(enum msm_vidc_colorformat_type f) { switch (f) { - case MSM_VIDC_FMT_NV12_UBWC: - case MSM_VIDC_FMT_NV12_TP10_UBWC: + case MSM_VIDC_FMT_NV12C: + case MSM_VIDC_FMT_TP10C: return true; default: return false; @@ -234,11 +234,11 @@ static inline int __bpp(enum msm_vidc_colorformat_type f) switch (f) { case MSM_VIDC_FMT_NV12: case MSM_VIDC_FMT_NV21: - case MSM_VIDC_FMT_NV12_UBWC: - case MSM_VIDC_FMT_RGBA8888_UBWC: + case MSM_VIDC_FMT_NV12C: + case MSM_VIDC_FMT_RGBA8888C: return 8; - case MSM_VIDC_FMT_NV12_P010: - case MSM_VIDC_FMT_NV12_TP10_UBWC: + case MSM_VIDC_FMT_P010: + case MSM_VIDC_FMT_TP10C: return 10; default: d_vpr_e("Unsupported colorformat (%x)", f); diff --git a/driver/vidc/src/hfi_packet.c b/driver/vidc/src/hfi_packet.c index 5874b352e4..bd08ee4f14 100644 --- a/driver/vidc/src/hfi_packet.c +++ b/driver/vidc/src/hfi_packet.c @@ -166,8 +166,6 @@ u32 get_hfi_codec(struct msm_vidc_inst *inst) return HFI_CODEC_DECODE_HEVC; case MSM_VIDC_VP9: return HFI_CODEC_DECODE_VP9; - case MSM_VIDC_MPEG2: - return HFI_CODEC_DECODE_MPEG2; default: d_vpr_e("invalid codec %d, domain %d\n", inst->codec, inst->domain); @@ -184,19 +182,19 @@ u32 get_hfi_colorformat(struct msm_vidc_inst *inst, case MSM_VIDC_FMT_NV12: hfi_colorformat = HFI_COLOR_FMT_NV12; break; - case MSM_VIDC_FMT_NV12_UBWC: + case MSM_VIDC_FMT_NV12C: hfi_colorformat = HFI_COLOR_FMT_NV12_UBWC; break; - case MSM_VIDC_FMT_NV12_P010: + case MSM_VIDC_FMT_P010: hfi_colorformat = HFI_COLOR_FMT_P010; break; - case MSM_VIDC_FMT_NV12_TP10_UBWC: + case MSM_VIDC_FMT_TP10C: hfi_colorformat = HFI_COLOR_FMT_TP10_UBWC; break; case MSM_VIDC_FMT_RGBA8888: hfi_colorformat = HFI_COLOR_FMT_RGBA8888; break; - case MSM_VIDC_FMT_RGBA8888_UBWC: + case MSM_VIDC_FMT_RGBA8888C: hfi_colorformat = HFI_COLOR_FMT_RGBA8888_UBWC; break; case MSM_VIDC_FMT_NV21: diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index 94db5ab018..4651a7747e 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -896,6 +896,7 @@ error: return rc; } +// TODO: use PIX_FMTS caps to check supported color format int msm_venc_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) { int rc = 0; diff --git a/driver/vidc/src/msm_vidc_buffer.c b/driver/vidc/src/msm_vidc_buffer.c index 33e12af791..1e7d427bde 100644 --- a/driver/vidc/src/msm_vidc_buffer.c +++ b/driver/vidc/src/msm_vidc_buffer.c @@ -70,9 +70,6 @@ u32 msm_vidc_output_min_count(struct msm_vidc_inst *inst) case MSM_VIDC_VP9: output_min_count = 9; break; - case MSM_VIDC_MPEG2: - output_min_count = 6; - break; default: output_min_count = 4; } diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 73f77f9b5c..cfd955ec4d 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -172,6 +172,32 @@ static const char *msm_vidc_get_priv_ctrl_name(u32 sid, u32 control_id) } } +static int msm_vidc_packetize_control(struct msm_vidc_inst *inst, + enum msm_vidc_inst_capability_type cap_id, u32 payload_type, + void *hfi_val, u32 payload_size, const char *func) +{ + int rc = 0; + + s_vpr_l(inst->sid, + "%s: hfi_id: %#x, value: %#x\n", func, + inst->capabilities->cap[cap_id].hfi_id, + *(s64 *)hfi_val); + + rc = venus_hfi_session_property(inst, + inst->capabilities->cap[cap_id].hfi_id, + HFI_HOST_FLAGS_NONE, + msm_vidc_get_port_info(inst, cap_id), + payload_type, + hfi_val, + sizeof(payload_size)); + if (rc) + s_vpr_e(inst->sid, + "%s: failed to set cap_id: %d to fw\n", + __func__, cap_id); + + return rc; +} + static enum msm_vidc_inst_capability_type msm_vidc_get_cap_id( struct msm_vidc_inst *inst, u32 id) { @@ -589,10 +615,8 @@ exit: int msm_vidc_adjust_entropy_mode(void *instance, struct v4l2_ctrl *ctrl) { int rc = 0; - int i = 0; struct msm_vidc_inst_capability *capability; s32 adjusted_value; - enum msm_vidc_inst_capability_type parent_id; struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; s32 profile = -1; @@ -609,12 +633,60 @@ int msm_vidc_adjust_entropy_mode(void *instance, struct v4l2_ctrl *ctrl) else adjusted_value = capability->cap[ENTROPY_MODE].value; - /* check parents and adjust cabac session value */ + if (inst->codec != MSM_VIDC_H264) { + s_vpr_e(inst->sid, + "%s: incorrect entry in database. fix the database\n", + __func__); + return 0; + } + + profile = capability->cap[PROFILE].value; + + if (profile == V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE || + profile == V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_BASELINE) + adjusted_value = V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC; + + if (capability->cap[ENTROPY_MODE].value != adjusted_value) { + s_vpr_h(inst->sid, "%s: updated from %#x to adjusted %#x\n", __func__, + capability->cap[ENTROPY_MODE].value, adjusted_value); + capability->cap[ENTROPY_MODE].value = adjusted_value; + } + + return rc; +} + +int msm_vidc_adjust_profile(void *instance, struct v4l2_ctrl *ctrl) +{ + int rc = 0; + int i = 0; + struct msm_vidc_inst_capability *capability; + s32 adjusted_value; + enum msm_vidc_inst_capability_type parent_id; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + s32 pix_fmt = -1; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + capability = inst->capabilities; + + /* ctrl is always NULL in streamon case */ + if (ctrl) + adjusted_value = ctrl->val; + else + adjusted_value = capability->cap[PROFILE].value; + + /* TODO(AS): Create a utility for this while loop and add + * detailed comments within for utility functionality + */ while (i < MAX_CAP_PARENTS && - capability->cap[ENTROPY_MODE].parents[i]) { - parent_id = capability->cap[ENTROPY_MODE].parents[i]; - if (parent_id == PROFILE) - profile = capability->cap[PROFILE].value; + capability->cap[PROFILE].parents[i]) { + parent_id = capability->cap[PROFILE].parents[i]; + if (parent_id == PIX_FMTS) { + pix_fmt = capability->cap[PIX_FMTS].value; + } else s_vpr_e(inst->sid, "%s: invalid parent %d\n", @@ -622,22 +694,32 @@ int msm_vidc_adjust_entropy_mode(void *instance, struct v4l2_ctrl *ctrl) i++; } - if (profile == -1) { + /* PIX_FMTS dependency is common across all chipsets. + * Hence, PIX_FMTS must be specified as Parent for HEVC profile. + * Otherwise it would be a database error that should be fixed. + */ + if (pix_fmt == -1) { s_vpr_e(inst->sid, - "%s: missing parents %d %d\n", - __func__, profile); - return 0; + "%s: missing parent: %d, please correct database\n", + __func__, PIX_FMTS); + return -EINVAL; } - if ((profile == V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE || - profile == V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_BASELINE) && - adjusted_value == V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC) - adjusted_value = V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC; + /* 10 bit profile for 10 bit color format */ + if (pix_fmt == MSM_VIDC_FMT_TP10C || + pix_fmt == MSM_VIDC_FMT_P010) { + adjusted_value = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10; + } else { + /* 8 bit profile for 8 bit color format */ + if (adjusted_value == V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10) + adjusted_value = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN; + } - if (capability->cap[ENTROPY_MODE].value != adjusted_value) { - s_vpr_h(inst->sid, "%s: updated from %#x to adjusted %#x\n", __func__, - capability->cap[ENTROPY_MODE].value, adjusted_value); - capability->cap[ENTROPY_MODE].value = adjusted_value; + if (capability->cap[PROFILE].value != adjusted_value) { + s_vpr_h(inst->sid, + "%s: updated from %#x to adjusted %#x\n", __func__, + capability->cap[PROFILE].value, adjusted_value); + capability->cap[PROFILE].value = adjusted_value; } return rc; @@ -687,30 +769,6 @@ int msm_vidc_adjust_ltr_count(void *instance, struct v4l2_ctrl *ctrl) return rc; } -int msm_vidc_adjust_bitrate(void *instance, struct v4l2_ctrl *ctrl) -{ - int rc = 0; - // u32 cabac_max_bitrate; - struct msm_vidc_inst_capability *capability; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - s32 new_value; - - if (!inst || !inst->capabilities) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - capability = inst->capabilities; - - if (ctrl) - new_value = ctrl->val; - else - new_value = capability->cap[BIT_RATE].value; - - /* TO DO */ - return rc; -} - /* * Loop over instance capabilities with CAP_FLAG_ROOT * and call adjust function, where @@ -766,6 +824,93 @@ exit: return rc; } +int msm_vidc_set_bitrate_mode(void *instance, + enum msm_vidc_inst_capability_type cap_id) +{ + int rc = 0; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + int lossless, frame_rc, bitrate_mode, frame_skip; + u32 hfi_value; + struct msm_vidc_inst_capability *capability; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + bitrate_mode = capability->cap[cap_id].value; + lossless = capability->cap[LOSSLESS].value; + frame_rc = capability->cap[FRAME_RC_ENABLE].value; + frame_skip = capability->cap[FRAME_SKIP_MODE].value; + + if (lossless) { + hfi_value = HFI_RC_LOSSLESS; + return rc; + } + + if (!frame_rc) { + hfi_value = HFI_RC_OFF; + return rc; + } + + if (bitrate_mode == V4L2_MPEG_VIDEO_BITRATE_MODE_VBR) { + hfi_value = HFI_RC_VBR_CFR; + } else if (bitrate_mode == V4L2_MPEG_VIDEO_BITRATE_MODE_CBR) { + if (frame_skip) + hfi_value = HFI_RC_CBR_VFR; + else + hfi_value = HFI_RC_CBR_CFR; + }/* TODO: CQ mode + else if (bitrate_mode == CQ) { + hfi_value = HFI_RC_CQ; + } + */ + + rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32_ENUM, + &hfi_value, sizeof(u32), __func__); + + return rc; +} + +int msm_vidc_set_header_mode(void *instance, + enum msm_vidc_inst_capability_type cap_id) +{ + int rc = 0; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + int header_mode, prepend_sps_pps, hdr_metadata; + u32 hfi_value = 0; + struct msm_vidc_inst_capability *capability; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + header_mode = capability->cap[cap_id].value; + prepend_sps_pps = capability->cap[PREPEND_SPSPPS_TO_IDR].value; + hdr_metadata = capability->cap[META_SEQ_HDR_NAL].value; + + if (header_mode == V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE) + hfi_value |= HFI_SEQ_HEADER_SEPERATE_FRAME; + else if (header_mode == V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME) + hfi_value |= HFI_SEQ_HEADER_JOINED_WITH_1ST_FRAME; + + if (prepend_sps_pps) { + hfi_value |= HFI_SEQ_HEADER_PREFIX_WITH_SYNC_FRAME; + } + + if (hdr_metadata) { + hfi_value |= HFI_SEQ_HEADER_METADATA; + } + + rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32_ENUM, + &hfi_value, sizeof(u32), __func__); + + return rc; +} + int msm_vidc_set_q16(void *instance, enum msm_vidc_inst_capability_type cap_id) { @@ -779,21 +924,9 @@ int msm_vidc_set_q16(void *instance, } hfi_value = inst->capabilities->cap[cap_id].value; - s_vpr_h(inst->sid, - "%s: hfi_id: %#x, value: %#x\n", __func__, - inst->capabilities->cap[cap_id].hfi_id, - hfi_value); - rc = venus_hfi_session_property(inst, - inst->capabilities->cap[cap_id].hfi_id, - HFI_HOST_FLAGS_NONE, - msm_vidc_get_port_info(inst, cap_id), - HFI_PAYLOAD_Q16, - &hfi_value, - sizeof(u32)); - if (rc) - s_vpr_e(inst->sid, - "%s: failed to set cap_id: %d to fw\n", - __func__, cap_id); + + rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_Q16, + &hfi_value, sizeof(u32), __func__); return rc; } @@ -803,7 +936,7 @@ int msm_vidc_set_u32(void *instance, { int rc = 0; struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; - u32 hfi_value, hfi_payload; + u32 hfi_value; if (!inst || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); @@ -814,27 +947,34 @@ int msm_vidc_set_u32(void *instance, rc = msm_vidc_v4l2_menu_to_hfi(inst, cap_id, &hfi_value); if (rc) return -EINVAL; - hfi_payload = HFI_PAYLOAD_U32_ENUM; } else { hfi_value = inst->capabilities->cap[cap_id].value; - hfi_payload = HFI_PAYLOAD_U32; } - s_vpr_h(inst->sid, - "%s: hfi_id: %#x, value: %u\n", __func__, - inst->capabilities->cap[cap_id].hfi_id, - hfi_value); - rc = venus_hfi_session_property(inst, - inst->capabilities->cap[cap_id].hfi_id, - HFI_HOST_FLAGS_NONE, - msm_vidc_get_port_info(inst, cap_id), - hfi_payload, - &hfi_value, - sizeof(u32)); + rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32, + &hfi_value, sizeof(u32), __func__); + + return rc; +} + +int msm_vidc_set_u32_enum(void *instance, + enum msm_vidc_inst_capability_type cap_id) +{ + int rc = 0; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; + u32 hfi_value; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + rc = msm_vidc_v4l2_to_hfi_enum(inst, cap_id, &hfi_value); if (rc) - s_vpr_e(inst->sid, - "%s: failed to set cap_id: %d to fw\n", - __func__, cap_id); + return -EINVAL; + + rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32_ENUM, + &hfi_value, sizeof(u32), __func__); return rc; } @@ -844,26 +984,16 @@ int msm_vidc_set_s32(void *instance, { int rc = 0; struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; + s32 hfi_value = 0; if (!inst || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - s_vpr_h(inst->sid, - "%s: hfi_id: %#x, value: %d\n", __func__, - inst->capabilities->cap[cap_id].hfi_id, - inst->capabilities->cap[cap_id].value); - rc = venus_hfi_session_property(inst, - inst->capabilities->cap[cap_id].hfi_id, - HFI_HOST_FLAGS_NONE, HFI_PORT_NONE, - HFI_PAYLOAD_S32, - &inst->capabilities->cap[cap_id].value, - sizeof(s32)); - if (rc) - s_vpr_e(inst->sid, - "%s: failed to set cap_id: %d to fw\n", - __func__, cap_id); + hfi_value = inst->capabilities->cap[cap_id].value; + rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_S32, + &hfi_value, sizeof(u32), __func__); return rc; } @@ -954,15 +1084,6 @@ int msm_vidc_v4l2_menu_to_hfi(struct msm_vidc_inst *inst, struct msm_vidc_inst_capability *capability = inst->capabilities; switch (capability->cap[cap_id].v4l2_id) { - case V4L2_CID_MPEG_VIDEO_HEVC_PROFILE: - case V4L2_CID_MPEG_VIDEO_H264_PROFILE: - case V4L2_CID_MPEG_VIDEO_VP9_PROFILE: - case V4L2_CID_MPEG_VIDEO_HEVC_LEVEL: - case V4L2_CID_MPEG_VIDEO_H264_LEVEL: - case V4L2_CID_MPEG_VIDEO_HEVC_TIER: - case V4L2_CID_MPEG_VIDC_VIDEO_BLUR_TYPES: - *value = capability->cap[cap_id].value; - return 0; case V4L2_CID_MPEG_VIDEO_H264_ENTROPY_MODE: switch (capability->cap[cap_id].value) { case V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC: @@ -976,50 +1097,50 @@ int msm_vidc_v4l2_menu_to_hfi(struct msm_vidc_inst *inst, goto set_default; } return 0; - case V4L2_CID_MPEG_VIDEO_BITRATE_MODE: - switch (capability->cap[cap_id].value) { - case V4L2_MPEG_VIDEO_BITRATE_MODE_VBR: - *value = HFI_RC_VBR_CFR; - break; - case V4L2_MPEG_VIDEO_BITRATE_MODE_CBR: - *value = HFI_RC_CBR_CFR; - break; - default: - *value = HFI_RC_VBR_CFR; - goto set_default; - } - return 0; - case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE: - switch (capability->cap[cap_id].value) { - case V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B: - *value = HFI_HIER_B; - break; - case V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P: - //TODO (AS): check if this is right mapping - *value = HFI_HIER_P_SLIDING_WINDOW; - break; - default: - *value = HFI_HIER_P_SLIDING_WINDOW; - goto set_default; - } - return 0; - case V4L2_CID_MPEG_VIDEO_HEADER_MODE: - switch (capability->cap[cap_id].value) { - case V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE: - *value = HFI_SEQ_HEADER_SEPERATE_FRAME; - break; - case V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME: - *value = HFI_SEQ_HEADER_JOINED_WITH_1ST_FRAME; - break; - /* - * TODO (AS): other HFI values are missing corresponding - * V4l2 values. Add them once available. - */ - default: - *value = HFI_SEQ_HEADER_SEPERATE_FRAME; - goto set_default; - } - return 0; + default: + s_vpr_e(inst->sid, + "%s: mapping not specified for ctrl_id: %#x\n", + __func__, capability->cap[cap_id].v4l2_id); + return -EINVAL; + } + +set_default: + s_vpr_e(inst->sid, + "%s: invalid value %d for ctrl id: %#x. Set default: %u\n", + __func__, capability->cap[cap_id].value, + capability->cap[cap_id].v4l2_id, *value); + return 0; +} + +int msm_vidc_v4l2_to_hfi_enum(struct msm_vidc_inst *inst, + enum msm_vidc_inst_capability_type cap_id, u32 *value) +{ + struct msm_vidc_inst_capability *capability = inst->capabilities; + + switch (capability->cap[cap_id].v4l2_id) { + case V4L2_CID_MPEG_VIDEO_HEVC_PROFILE: + case V4L2_CID_MPEG_VIDEO_H264_PROFILE: + case V4L2_CID_MPEG_VIDEO_VP9_PROFILE: + case V4L2_CID_MPEG_VIDEO_HEVC_LEVEL: + case V4L2_CID_MPEG_VIDEO_H264_LEVEL: + case V4L2_CID_MPEG_VIDEO_HEVC_TIER: + case V4L2_CID_MPEG_VIDC_VIDEO_BLUR_TYPES: + *value = capability->cap[cap_id].value; + return 0; + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE: + switch (capability->cap[cap_id].value) { + case V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B: + *value = HFI_HIER_B; + break; + case V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P: + //TODO (AS): check if this is right mapping + *value = HFI_HIER_P_SLIDING_WINDOW; + break; + default: + *value = HFI_HIER_P_SLIDING_WINDOW; + goto set_default; + } + return 0; default: s_vpr_e(inst->sid, "%s: mapping not specified for ctrl_id: %#x\n", diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index b2dd409537..b0baf455fa 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -129,9 +129,6 @@ enum msm_vidc_codec_type v4l2_codec_to_driver(u32 v4l2_codec, const char *func) case V4L2_PIX_FMT_VP9: codec = MSM_VIDC_VP9; break; - case V4L2_PIX_FMT_MPEG2: - codec = MSM_VIDC_MPEG2; - break; default: d_vpr_e("%s: invalid v4l2 codec %#x\n", func, v4l2_codec); break; @@ -153,9 +150,6 @@ u32 v4l2_codec_from_driver(enum msm_vidc_codec_type codec, const char *func) case MSM_VIDC_VP9: v4l2_codec = V4L2_PIX_FMT_VP9; break; - case MSM_VIDC_MPEG2: - v4l2_codec = V4L2_PIX_FMT_MPEG2; - break; default: d_vpr_e("%s: invalid driver codec %#x\n", func, codec); break; @@ -176,16 +170,16 @@ enum msm_vidc_colorformat_type v4l2_colorformat_to_driver(u32 v4l2_colorformat, colorformat = MSM_VIDC_FMT_NV21; break; case V4L2_PIX_FMT_VIDC_NV12C: - colorformat = MSM_VIDC_FMT_NV12_UBWC; + colorformat = MSM_VIDC_FMT_NV12C; break; case V4L2_PIX_FMT_VIDC_TP10C: - colorformat = MSM_VIDC_FMT_NV12_TP10_UBWC; + colorformat = MSM_VIDC_FMT_TP10C; break; case V4L2_PIX_FMT_VIDC_ARGB32C: - colorformat = MSM_VIDC_FMT_RGBA8888_UBWC; + colorformat = MSM_VIDC_FMT_RGBA8888C; break; case V4L2_PIX_FMT_VIDC_P010: - colorformat = MSM_VIDC_FMT_NV12_P010; + colorformat = MSM_VIDC_FMT_P010; break; default: d_vpr_e("%s: invalid v4l2 color format %#x\n", @@ -207,16 +201,16 @@ u32 v4l2_colorformat_from_driver(enum msm_vidc_colorformat_type colorformat, case MSM_VIDC_FMT_NV21: v4l2_colorformat = V4L2_PIX_FMT_NV21; break; - case MSM_VIDC_FMT_NV12_UBWC: + case MSM_VIDC_FMT_NV12C: v4l2_colorformat = V4L2_PIX_FMT_VIDC_NV12C; break; - case MSM_VIDC_FMT_NV12_TP10_UBWC: + case MSM_VIDC_FMT_TP10C: v4l2_colorformat = V4L2_PIX_FMT_VIDC_TP10C; break; - case MSM_VIDC_FMT_RGBA8888_UBWC: + case MSM_VIDC_FMT_RGBA8888C: v4l2_colorformat = V4L2_PIX_FMT_VIDC_ARGB32C; break; - case MSM_VIDC_FMT_NV12_P010: + case MSM_VIDC_FMT_P010: v4l2_colorformat = V4L2_PIX_FMT_VIDC_P010; break; default: diff --git a/driver/vidc/src/msm_vidc_power.c b/driver/vidc/src/msm_vidc_power.c index 351be4d020..4cfe5f8a3f 100644 --- a/driver/vidc/src/msm_vidc_power.c +++ b/driver/vidc/src/msm_vidc_power.c @@ -283,7 +283,7 @@ int msm_vidc_scale_buses(struct msm_vidc_inst *inst) * 1 index - opb colorformat */ if (is_10bit_colorformat(color_format)) { - vote_data->color_formats[0] = MSM_VIDC_FMT_NV12_TP10_UBWC; + vote_data->color_formats[0] = MSM_VIDC_FMT_TP10C; } else { vote_data->color_formats[0] = MSM_VIDC_FMT_NV12; } From a96377f69b60da34d5fa2b777c13d9c899df6d71 Mon Sep 17 00:00:00 2001 From: Maheshwar Ajja Date: Mon, 4 Jan 2021 15:32:20 -0800 Subject: [PATCH 0052/1061] video: driver: amend colorformat mask values Amend database colorformat mask values to avoid enum / query colorformat failure for clients. Change-Id: I2ef61129d0aac3da12b015af699eea9bdc73dc57 Signed-off-by: Maheshwar Ajja --- driver/platform/waipio/src/msm_vidc_waipio.c | 12 +++--- driver/vidc/inc/msm_vidc_internal.h | 40 ++++++++++---------- 2 files changed, 26 insertions(+), 26 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 503a81fb70..1c54f6321f 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -113,13 +113,13 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {PIX_FMTS, ENC, H264, MSM_VIDC_FMT_NV12, MSM_VIDC_FMT_NV12C, - MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C, + BIT(MSM_VIDC_FMT_NV12) | BIT(MSM_VIDC_FMT_NV21) | BIT(MSM_VIDC_FMT_NV12C), MSM_VIDC_FMT_NV12C}, {PIX_FMTS, ENC|DEC, HEVC, MSM_VIDC_FMT_NV12, MSM_VIDC_FMT_TP10C, - MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C | - MSM_VIDC_FMT_P010 | MSM_VIDC_FMT_TP10C, + BIT(MSM_VIDC_FMT_NV12) | BIT(MSM_VIDC_FMT_NV21) | BIT(MSM_VIDC_FMT_NV12C ) | + BIT(MSM_VIDC_FMT_P010) | BIT(MSM_VIDC_FMT_TP10C), MSM_VIDC_FMT_NV12C, 0, 0, CAP_FLAG_ROOT, @@ -129,14 +129,14 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {PIX_FMTS, DEC, H264, MSM_VIDC_FMT_NV12, MSM_VIDC_FMT_NV12C, - MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C, + BIT(MSM_VIDC_FMT_NV12) | BIT(MSM_VIDC_FMT_NV21) | BIT(MSM_VIDC_FMT_NV12C), MSM_VIDC_FMT_NV12C}, {PIX_FMTS, DEC, VP9, MSM_VIDC_FMT_NV12, MSM_VIDC_FMT_TP10C, - MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C | - MSM_VIDC_FMT_P010 | MSM_VIDC_FMT_TP10C, + BIT(MSM_VIDC_FMT_NV12) | BIT(MSM_VIDC_FMT_NV21) | BIT(MSM_VIDC_FMT_NV12C) | + BIT(MSM_VIDC_FMT_P010) | BIT(MSM_VIDC_FMT_TP10C), MSM_VIDC_FMT_NV12C}, {MIN_BUFFERS_INPUT, ENC|DEC, CODECS_ALL, 0, 64, 1, 4, diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 41f4cf2898..1deb5f4f69 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -112,30 +112,30 @@ enum msm_vidc_codec_type { enum msm_vidc_colorformat_type { MSM_VIDC_FMT_NONE = 0, - MSM_VIDC_FMT_NV12, - MSM_VIDC_FMT_NV21, - MSM_VIDC_FMT_NV12C, - MSM_VIDC_FMT_P010, - MSM_VIDC_FMT_TP10C, - MSM_VIDC_FMT_RGBA8888, - MSM_VIDC_FMT_RGBA8888C, + MSM_VIDC_FMT_NV12 = 1, + MSM_VIDC_FMT_NV12C = 2, + MSM_VIDC_FMT_P010 = 3, + MSM_VIDC_FMT_TP10C = 4, + MSM_VIDC_FMT_RGBA8888 = 5, + MSM_VIDC_FMT_RGBA8888C = 6, + MSM_VIDC_FMT_NV21 = 7, }; enum msm_vidc_buffer_type { MSM_VIDC_BUF_NONE = 0, - MSM_VIDC_BUF_INPUT, - MSM_VIDC_BUF_OUTPUT, - MSM_VIDC_BUF_INPUT_META, - MSM_VIDC_BUF_OUTPUT_META, - MSM_VIDC_BUF_QUEUE, - MSM_VIDC_BUF_BIN, - MSM_VIDC_BUF_ARP, - MSM_VIDC_BUF_COMV, - MSM_VIDC_BUF_NON_COMV, - MSM_VIDC_BUF_LINE, - MSM_VIDC_BUF_DPB, - MSM_VIDC_BUF_PERSIST, - MSM_VIDC_BUF_VPSS, + MSM_VIDC_BUF_INPUT = 1, + MSM_VIDC_BUF_OUTPUT = 2, + MSM_VIDC_BUF_INPUT_META = 3, + MSM_VIDC_BUF_OUTPUT_META = 4, + MSM_VIDC_BUF_QUEUE = 10, + MSM_VIDC_BUF_BIN = 20, + MSM_VIDC_BUF_ARP = 21, + MSM_VIDC_BUF_COMV = 22, + MSM_VIDC_BUF_NON_COMV = 23, + MSM_VIDC_BUF_LINE = 24, + MSM_VIDC_BUF_DPB = 25, + MSM_VIDC_BUF_PERSIST = 26, + MSM_VIDC_BUF_VPSS = 27, }; /* always match with v4l2 flags V4L2_BUF_FLAG_* */ From 37b85f09d6f6e19326567821ade384fc14df396e Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Tue, 5 Jan 2021 12:05:14 -0800 Subject: [PATCH 0053/1061] video: driver: update ubwc settings Amend UBWC settings to firmware for processing UBWC data. Change-Id: Ia15f6117cc3182344ff96c54cce02ca2f8185eb1 Signed-off-by: Akshata Sahukar --- driver/platform/waipio/src/msm_vidc_waipio.c | 14 +++++--------- driver/vidc/inc/msm_vidc_platform.h | 11 ----------- driver/vidc/src/hfi_packet.c | 9 +++++++++ driver/vidc/src/msm_venc.c | 6 ++---- 4 files changed, 16 insertions(+), 24 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 1c54f6321f..b1a8a4bf70 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -19,18 +19,14 @@ #define DDR_TYPE_LPDDR5X 0x9 #define DEFAULT_VIDEO_CONCEAL_COLOR_BLACK 0x8020010 -#define UBWC_CONFIG(mco, mlo, hbo, bslo, bso, rs, mc, ml, hbb, bsl, bsp) \ +#define UBWC_CONFIG(mc, ml, hbb, bs1, bs2, bs3, bsp) \ { \ - .override_bit_info.max_channel_override = mco, \ - .override_bit_info.mal_length_override = mlo, \ - .override_bit_info.hb_override = hbo, \ - .override_bit_info.bank_swzl_level_override = bslo, \ - .override_bit_info.bank_spreading_override = bso, \ - .override_bit_info.reserved = rs, \ .max_channels = mc, \ .mal_length = ml, \ .highest_bank_bit = hbb, \ - .bank_swzl_level = bsl, \ + .bank_swzl_level = bs1, \ + .bank_swz2_level = bs2, \ + .bank_swz3_level = bs3, \ .bank_spreading = bsp, \ } @@ -1043,7 +1039,7 @@ static u32 vpe_csc_custom_limit_coeff[MAX_LIMIT_COEFFS] = { /* Default UBWC config for LPDDR5 */ static struct msm_vidc_ubwc_config_data ubwc_config_waipio[] = { - UBWC_CONFIG(1, 1, 1, 0, 0, 0, 8, 32, 16, 0, 0), + UBWC_CONFIG(8, 32, 16, 0, 1, 1, 1), }; static struct msm_vidc_platform_data waipio_data = { diff --git a/driver/vidc/inc/msm_vidc_platform.h b/driver/vidc/inc/msm_vidc_platform.h index 69769abc1a..dde8d4f582 100644 --- a/driver/vidc/inc/msm_vidc_platform.h +++ b/driver/vidc/inc/msm_vidc_platform.h @@ -50,17 +50,6 @@ struct msm_vidc_efuse_data { }; struct msm_vidc_ubwc_config_data { - struct { - u32 max_channel_override : 1; - u32 mal_length_override : 1; - u32 hb_override : 1; - u32 bank_swzl_level_override : 1; - u32 bank_swz2_level_override : 1; - u32 bank_swz3_level_override : 1; - u32 bank_spreading_override : 1; - u32 reserved : 27; - } override_bit_info; - u32 max_channels; u32 mal_length; u32 highest_bank_bit; diff --git a/driver/vidc/src/hfi_packet.c b/driver/vidc/src/hfi_packet.c index bd08ee4f14..3b724dc294 100644 --- a/driver/vidc/src/hfi_packet.c +++ b/driver/vidc/src/hfi_packet.c @@ -334,6 +334,7 @@ int hfi_packet_sys_init(struct msm_vidc_core *core, /* HFI_CMD_SYSTEM_INIT */ payload = HFI_VIDEO_ARCH_LX; + d_vpr_h("%s: arch %d\n", __func__, payload); rc = hfi_create_packet(pkt, pkt_size, HFI_CMD_INIT, (HFI_HOST_FLAGS_RESPONSE_REQUIRED | @@ -349,6 +350,7 @@ int hfi_packet_sys_init(struct msm_vidc_core *core, /* HFI_PROP_INTRA_FRAME_POWER_COLLAPSE */ payload = 0; + d_vpr_h("%s: intra frame power collapse %d\n", __func__, payload); rc = hfi_create_packet(pkt, pkt_size, HFI_PROP_INTRA_FRAME_POWER_COLLAPSE, HFI_HOST_FLAGS_NONE, @@ -362,6 +364,7 @@ int hfi_packet_sys_init(struct msm_vidc_core *core, /* HFI_PROP_UBWC_MAX_CHANNELS */ payload = core->platform->data.ubwc_config->max_channels; + d_vpr_h("%s: ubwc max channels %d\n", __func__, payload); rc = hfi_create_packet(pkt, pkt_size, HFI_PROP_UBWC_MAX_CHANNELS, HFI_HOST_FLAGS_NONE, @@ -375,6 +378,7 @@ int hfi_packet_sys_init(struct msm_vidc_core *core, /* HFI_PROP_UBWC_MAL_LENGTH */ payload = core->platform->data.ubwc_config->mal_length; + d_vpr_h("%s: ubwc mal length %d\n", __func__, payload); rc = hfi_create_packet(pkt, pkt_size, HFI_PROP_UBWC_MAL_LENGTH, HFI_HOST_FLAGS_NONE, @@ -388,6 +392,7 @@ int hfi_packet_sys_init(struct msm_vidc_core *core, /* HFI_PROP_UBWC_HBB */ payload = core->platform->data.ubwc_config->highest_bank_bit; + d_vpr_h("%s: ubwc hbb %d\n", __func__, payload); rc = hfi_create_packet(pkt, pkt_size, HFI_PROP_UBWC_HBB, HFI_HOST_FLAGS_NONE, @@ -401,6 +406,7 @@ int hfi_packet_sys_init(struct msm_vidc_core *core, /* HFI_PROP_UBWC_BANK_SWZL_LEVEL1 */ payload = core->platform->data.ubwc_config->bank_swzl_level; + d_vpr_h("%s: ubwc swzl1 %d\n", __func__, payload); rc = hfi_create_packet(pkt, pkt_size, HFI_PROP_UBWC_BANK_SWZL_LEVEL1, HFI_HOST_FLAGS_NONE, @@ -414,6 +420,7 @@ int hfi_packet_sys_init(struct msm_vidc_core *core, /* HFI_PROP_UBWC_BANK_SWZL_LEVEL2 */ payload = core->platform->data.ubwc_config->bank_swz2_level; + d_vpr_h("%s: ubwc swzl2 %d\n", __func__, payload); rc = hfi_create_packet(pkt, pkt_size, HFI_PROP_UBWC_BANK_SWZL_LEVEL2, HFI_HOST_FLAGS_NONE, @@ -427,6 +434,7 @@ int hfi_packet_sys_init(struct msm_vidc_core *core, /* HFI_PROP_UBWC_BANK_SWZL_LEVEL3 */ payload = core->platform->data.ubwc_config->bank_swz3_level; + d_vpr_h("%s: ubwc swzl3 %d\n", __func__, payload); rc = hfi_create_packet(pkt, pkt_size, HFI_PROP_UBWC_BANK_SWZL_LEVEL3, HFI_HOST_FLAGS_NONE, @@ -440,6 +448,7 @@ int hfi_packet_sys_init(struct msm_vidc_core *core, /* HFI_PROP_UBWC_BANK_SPREADING */ payload = core->platform->data.ubwc_config->bank_spreading; + d_vpr_h("%s: ubwc bank spreading %d\n", __func__, payload); rc = hfi_create_packet(pkt, pkt_size, HFI_PROP_UBWC_BANK_SPREADING, HFI_HOST_FLAGS_NONE, diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index 9fb5f7e5dc..caa726abd5 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -181,11 +181,9 @@ static int msm_venc_set_raw_resolution(struct msm_vidc_inst *inst, return -EINVAL; } - resolution = inst->fmts[port].fmt.pix_mp.width << 16 | - inst->fmts[port].fmt.pix_mp.height; + resolution = inst->crop.width << 16 | inst->crop.height; s_vpr_h(inst->sid, "%s: width: %d height: %d\n", __func__, - inst->fmts[port].fmt.pix_mp.width, - inst->fmts[port].fmt.pix_mp.height); + inst->crop.width, inst->crop.height); rc = venus_hfi_session_property(inst, HFI_PROP_RAW_RESOLUTION, HFI_HOST_FLAGS_NONE, From 2ddc1435656f374ae9f4ab8dbdad5967adf4ec76 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Tue, 5 Jan 2021 17:52:46 -0800 Subject: [PATCH 0054/1061] video: driver: update defaults to avoid fw sync issue for enc session Use STAGE_1 work mode and HFI_SEQ_HEADER_JOINED_WITH_1ST_FRAME as header mode as default values to avoid firmware sync issue with enc HEVC NV12_UBWC session. Change-Id: If15c743ec8f9d34e6ec878e4fbbedd20f7bb4e73 Signed-off-by: Akshata Sahukar --- driver/platform/waipio/src/msm_vidc_waipio.c | 7 ++++++- driver/vidc/src/msm_venc.c | 2 +- 2 files changed, 7 insertions(+), 2 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index b1a8a4bf70..73e3432c14 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -238,7 +238,12 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME, BIT(V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE) | BIT(V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME), - V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE, + /* + * TODO(AS): change default to + * V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE once + * HW hang issue is fixed in FW rel 8 + */ + V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME, V4L2_CID_MPEG_VIDEO_HEADER_MODE, HFI_PROP_SEQ_HEADER_MODE, CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index caa726abd5..8228d1207a 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -1400,7 +1400,7 @@ int msm_venc_inst_init(struct msm_vidc_inst *inst) inst->prop.frame_rate = DEFAULT_FPS << 16; inst->prop.operating_rate = DEFAULT_FPS << 16; - inst->stage = MSM_VIDC_STAGE_2; + inst->stage = MSM_VIDC_STAGE_1; inst->pipe = MSM_VIDC_PIPE_4; inst->quality_mode = MSM_VIDC_MAX_QUALITY_MODE; From d98075c932a456a26405ec4cfc0b1ccc6a961077 Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Tue, 5 Jan 2021 16:08:54 -0800 Subject: [PATCH 0055/1061] video: driver: fixes for PSC on latest fw - post input psc, output psc and last flag events to response work handler - fix issue with release and create internal buffers during input psc - clear last flag after session continue Change-Id: Ic0278a09a0f6ee8ffff8840a47cd80c046ecadc4 Signed-off-by: Darshana Patil --- driver/vidc/inc/msm_vidc_driver.h | 2 +- driver/vidc/inc/msm_vidc_inst.h | 6 +- driver/vidc/inc/msm_vidc_internal.h | 15 ++- driver/vidc/inc/venus_hfi_response.h | 6 +- driver/vidc/src/msm_vdec.c | 26 +++- driver/vidc/src/msm_vidc.c | 12 +- driver/vidc/src/msm_vidc_driver.c | 145 +++++++++++---------- driver/vidc/src/venus_hfi_response.c | 185 ++++++++++++++++++--------- 8 files changed, 241 insertions(+), 156 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 308a0b0067..38798323e3 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -251,7 +251,7 @@ bool msm_vidc_allow_start(struct msm_vidc_inst *inst); bool msm_vidc_allow_streamon(struct msm_vidc_inst *inst, u32 type); bool msm_vidc_allow_streamoff(struct msm_vidc_inst *inst, u32 type); bool msm_vidc_allow_qbuf(struct msm_vidc_inst *inst); -int msm_vidc_allow_input_psc(struct msm_vidc_inst *inst); +bool msm_vidc_allow_input_psc(struct msm_vidc_inst *inst); bool msm_vidc_allow_last_flag(struct msm_vidc_inst *inst); int msm_vidc_state_change_streamon(struct msm_vidc_inst *inst, u32 type); int msm_vidc_state_change_streamoff(struct msm_vidc_inst *inst, u32 type); diff --git a/driver/vidc/inc/msm_vidc_inst.h b/driver/vidc/inc/msm_vidc_inst.h index fef9854bb5..f92191b9ef 100644 --- a/driver/vidc/inc/msm_vidc_inst.h +++ b/driver/vidc/inc/msm_vidc_inst.h @@ -123,9 +123,9 @@ struct msm_vidc_inst { struct msm_vidc_decode_batch decode_batch; struct msm_vidc_decode_vpp_delay decode_vpp_delay; struct msm_vidc_session_idle session_idle; - struct delayed_work input_psc_work; - struct workqueue_struct *input_psc_workq; - struct list_head input_psc_works; /* list of struct input_psc_work */ + struct delayed_work response_work; + struct workqueue_struct *response_workq; + struct list_head response_works; /* list of struct response_work */ struct list_head input_ts; struct list_head enc_input_crs; struct list_head decode_bitrate_data; diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 1deb5f4f69..cc13bb0d05 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -706,10 +706,17 @@ struct msm_vidc_buffers { bool reuse; }; -struct input_psc_work { - struct list_head list; - void *data; - u32 data_size; +enum response_work_type { + RESP_WORK_INPUT_PSC = 1, + RESP_WORK_OUTPUT_PSC, + RESP_WORK_LAST_FLAG, +}; + +struct response_work { + struct list_head list; + enum response_work_type type; + void *data; + u32 data_size; }; struct msm_vidc_ssr { diff --git a/driver/vidc/inc/venus_hfi_response.h b/driver/vidc/inc/venus_hfi_response.h index 57110372c3..ac99ba95ea 100644 --- a/driver/vidc/inc/venus_hfi_response.h +++ b/driver/vidc/inc/venus_hfi_response.h @@ -14,8 +14,8 @@ bool is_valid_port(struct msm_vidc_inst *inst, u32 port, const char *func); bool is_valid_hfi_buffer_type(struct msm_vidc_inst *inst, u32 buffer_type, const char *func); -void handle_session_input_psc_work_handler(struct work_struct *work); -int handle_session_input_psc(struct msm_vidc_inst *inst, - struct input_psc_work *psc_work); +void handle_session_response_work_handler(struct work_struct *work); +int handle_session_response_work(struct msm_vidc_inst *inst, + struct response_work *work); #endif // __VENUS_HFI_RESPONSE_H__ diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index c99f9b9a73..bc795cd988 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -769,7 +769,7 @@ static int msm_vdec_get_input_internal_buffers(struct msm_vidc_inst *inst) inst->buffers.line.min_count, inst->buffers.line.size, inst->buffers.line.reuse); - s_vpr_h(inst->sid, "buffer: %d %d %d\n", + s_vpr_h(inst->sid, "persist buffer: %d %d %d\n", inst->buffers.persist.min_count, inst->buffers.persist.size, inst->buffers.persist.reuse); @@ -1059,11 +1059,18 @@ static int msm_vdec_session_resume(struct msm_vidc_inst *inst, return rc; } -static int msm_vdec_update_input_properties(struct msm_vidc_inst *inst) +static int msm_vdec_update_properties(struct msm_vidc_inst *inst) { struct msm_vidc_subscription_params subsc_params; + struct msm_vidc_core *core; u32 width, height; + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + core = inst->core; + subsc_params = inst->subcr_params[INPUT_PORT]; width = (subsc_params.bitstream_resolution & HFI_BITMASK_BITSTREAM_WIDTH) >> 16; @@ -1081,8 +1088,11 @@ static int msm_vdec_update_input_properties(struct msm_vidc_inst *inst) v4l2_colorformat_to_media( inst->fmts[OUTPUT_PORT].fmt.pix_mp.pixelformat, __func__), height); - //inst->fmts[OUTPUT_PORT].fmt.pix_mp.bytesperline = - //inst->fmts[OUTPUT_PORT].fmt.pix_mp.width; + inst->fmts[OUTPUT_PORT].fmt.pix_mp.plane_fmt[0].bytesperline = + inst->fmts[OUTPUT_PORT].fmt.pix_mp.width; + inst->fmts[OUTPUT_PORT].fmt.pix_mp.plane_fmt[0].sizeimage = + call_session_op(core, buffer_size, inst, MSM_VIDC_BUF_OUTPUT); + //inst->buffers.output.size = inst->fmts[OUTPUT_PORT].fmt.pix_mp.plane_fmt[0].sizeimage; inst->fmts[OUTPUT_PORT].fmt.pix_mp.colorspace = (subsc_params.color_info & 0xFF0000) >> 16; @@ -1122,7 +1132,7 @@ int msm_vdec_input_port_settings_change(struct msm_vidc_inst *inst) return 0; } - rc = msm_vdec_update_input_properties(inst); + rc = msm_vdec_update_properties(inst); if (rc) return rc; @@ -1130,11 +1140,11 @@ int msm_vdec_input_port_settings_change(struct msm_vidc_inst *inst) event.u.src_change.changes = V4L2_EVENT_SRC_CH_RESOLUTION; v4l2_event_queue_fh(&inst->event_handler, &event); - rc = msm_vdec_release_input_internal_buffers(inst); + rc = msm_vdec_get_input_internal_buffers(inst); if (rc) return rc; - rc = msm_vdec_get_input_internal_buffers(inst); + rc = msm_vdec_release_input_internal_buffers(inst); if (rc) return rc; @@ -1492,6 +1502,8 @@ int msm_vdec_process_cmd(struct msm_vidc_inst *inst, u32 cmd) 0); if (rc) return rc; + vb2_clear_last_buffer_dequeued(&inst->vb2q[OUTPUT_META_PORT]); + vb2_clear_last_buffer_dequeued(&inst->vb2q[OUTPUT_PORT]); } else { d_vpr_e("%s: unknown cmd %d\n", __func__, cmd); return -EINVAL; diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index be99d965d2..4b6137748c 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -256,7 +256,7 @@ int msm_vidc_g_fmt(void *instance, struct v4l2_format *f) if (f->type == INPUT_MPLANE || f->type == OUTPUT_MPLANE) s_vpr_h(inst->sid, "%s: type %d format %#x width %d height %d size %d\n", - __func__, f->fmt.pix_mp.pixelformat, f->fmt.pix_mp.width, + __func__, f->type, f->fmt.pix_mp.pixelformat, f->fmt.pix_mp.width, f->fmt.pix_mp.height, f->fmt.pix_mp.plane_fmt[0].sizeimage); else if (f->type == INPUT_META_PLANE || f->type == OUTPUT_META_PLANE) s_vpr_h(inst->sid, "%s: meta type %d size %d\n", @@ -683,8 +683,8 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) } s_vpr_i(inst->sid, "Opening video instance: %d\n", session_type); - inst->input_psc_workq = create_singlethread_workqueue("input_psc_workq"); - if (!inst->input_psc_workq) { + inst->response_workq = create_singlethread_workqueue("response_workq"); + if (!inst->response_workq) { d_vpr_e("%s: create input_psc_workq failed\n", __func__); goto error; } @@ -697,10 +697,10 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) goto error; } - INIT_DELAYED_WORK(&inst->input_psc_work, - handle_session_input_psc_work_handler); + INIT_DELAYED_WORK(&inst->response_work, + handle_session_response_work_handler); - INIT_LIST_HEAD(&inst->input_psc_works); + INIT_LIST_HEAD(&inst->response_works); INIT_LIST_HEAD(&inst->buffers.input.list); INIT_LIST_HEAD(&inst->buffers.input_meta.list); INIT_LIST_HEAD(&inst->buffers.output.list); diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index b0baf455fa..26f18128da 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -695,18 +695,18 @@ bool msm_vidc_allow_qbuf(struct msm_vidc_inst *inst) } } -int msm_vidc_allow_input_psc(struct msm_vidc_inst *inst) +bool msm_vidc_allow_input_psc(struct msm_vidc_inst *inst) { - int rc = 0; + bool allow = false; if (!inst) { d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; + return false; } if (inst->state == MSM_VIDC_START || inst->state == MSM_VIDC_START_INPUT || inst->state == MSM_VIDC_DRAIN) { - rc = 0; + allow = true; } else if (inst->state == MSM_VIDC_DRC || inst->state == MSM_VIDC_DRC_LAST_FLAG || inst->state == MSM_VIDC_DRC_DRAIN || @@ -714,14 +714,14 @@ int msm_vidc_allow_input_psc(struct msm_vidc_inst *inst) inst->state == MSM_VIDC_DRAIN_START_INPUT) { s_vpr_h(inst->sid, "%s: input psc postponed, inst state %s\n", __func__, state_name(inst->state)); - rc = -EAGAIN; + allow = false; } else { s_vpr_e(inst->sid, "%s: input psc in wrong state %s\n", __func__, state_name(inst->state)); - rc = -EINVAL; + allow = false; } - return rc; + return allow; } bool msm_vidc_allow_last_flag(struct msm_vidc_inst *inst) @@ -744,7 +744,7 @@ int msm_vidc_state_change_streamon(struct msm_vidc_inst *inst, u32 type) { int rc = 0; enum msm_vidc_inst_state new_state = MSM_VIDC_ERROR; - struct input_psc_work *psc_work; + struct response_work *resp_work; if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); @@ -765,25 +765,26 @@ int msm_vidc_state_change_streamon(struct msm_vidc_inst *inst, u32 type) s_vpr_h(inst->sid, "%s: streamon(output) in DRAIN_START_INPUT state\n", __func__); - if (list_empty(&inst->input_psc_works)) { - new_state = MSM_VIDC_DRAIN; - } else { - s_vpr_h(inst->sid, - "%s: streamon(output) in DRAIN_START_INPUT state, input psc pending\n", - __func__); - psc_work = list_first_entry(&inst->input_psc_works, - struct input_psc_work, list); - rc = handle_session_input_psc(inst, psc_work); - if (rc) { - s_vpr_e(inst->sid, - "%s: handle input psc failed\n", __func__); - new_state = MSM_VIDC_ERROR; - } else { - new_state = MSM_VIDC_DRC_DRAIN; + new_state = MSM_VIDC_DRAIN; + if (!list_empty(&inst->response_works)) { + resp_work = list_first_entry(&inst->response_works, + struct response_work, list); + if (resp_work->type == RESP_WORK_INPUT_PSC) { + s_vpr_h(inst->sid, + "%s: streamon(output) in DRAIN_START_INPUT state, input psc pending\n", + __func__); + rc = handle_session_response_work(inst, resp_work); + if (rc) { + s_vpr_e(inst->sid, + "%s: handle input psc failed\n", __func__); + new_state = MSM_VIDC_ERROR; + } else { + new_state = MSM_VIDC_DRC_DRAIN; + } + list_del(&resp_work->list); + kfree(resp_work->data); + kfree(resp_work); } - list_del(&psc_work->list); - kfree(psc_work->data); - kfree(psc_work); } } } @@ -798,7 +799,7 @@ int msm_vidc_state_change_streamoff(struct msm_vidc_inst *inst, u32 type) { int rc = 0; enum msm_vidc_inst_state new_state = MSM_VIDC_ERROR; - struct input_psc_work *psc_work, *dummy; + struct response_work *resp_work, *dummy; if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); @@ -819,13 +820,15 @@ int msm_vidc_state_change_streamoff(struct msm_vidc_inst *inst, u32 type) inst->state == MSM_VIDC_DRAIN_START_INPUT) { new_state = MSM_VIDC_START_OUTPUT; /* discard pending port settings change if any */ - list_for_each_entry_safe(psc_work, dummy, - &inst->input_psc_works, list) { - s_vpr_h(inst->sid, - "%s: discard pending input psc\n", __func__); - list_del(&psc_work->list); - kfree(psc_work->data); - kfree(psc_work); + list_for_each_entry_safe(resp_work, dummy, + &inst->response_works, list) { + if (resp_work->type == RESP_WORK_INPUT_PSC) { + s_vpr_h(inst->sid, + "%s: discard pending input psc\n", __func__); + list_del(&resp_work->list); + kfree(resp_work->data); + kfree(resp_work); + } } } } else if (type == OUTPUT_MPLANE) { @@ -884,7 +887,7 @@ int msm_vidc_state_change_start(struct msm_vidc_inst *inst) { int rc = 0; enum msm_vidc_inst_state new_state = MSM_VIDC_ERROR; - struct input_psc_work *psc_work; + struct response_work *resp_work; if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); @@ -893,45 +896,47 @@ int msm_vidc_state_change_start(struct msm_vidc_inst *inst) if (inst->state == MSM_VIDC_DRAIN_LAST_FLAG || inst->state == MSM_VIDC_DRC_LAST_FLAG) { - if (list_empty(&inst->input_psc_works)) { new_state = MSM_VIDC_START; - } else { - s_vpr_h(inst->sid, - "%s: start in DRC(DRAIN)_LAST_FLAG state, input psc pending\n", - __func__); - psc_work = list_first_entry(&inst->input_psc_works, - struct input_psc_work, list); - rc = handle_session_input_psc(inst, psc_work); - if (rc) { - s_vpr_e(inst->sid, - "%s: handle input psc failed\n", __func__); - new_state = MSM_VIDC_ERROR; - } else { - new_state = MSM_VIDC_DRC; + if (!list_empty(&inst->response_works)) { + resp_work = list_first_entry(&inst->response_works, + struct response_work, list); + if (resp_work->type == RESP_WORK_INPUT_PSC) { + s_vpr_h(inst->sid, + "%s: start in DRC(DRAIN)_LAST_FLAG state, input psc pending\n", + __func__); + rc = handle_session_response_work(inst, resp_work); + if (rc) { + s_vpr_e(inst->sid, + "%s: handle input psc failed\n", __func__); + new_state = MSM_VIDC_ERROR; + } else { + new_state = MSM_VIDC_DRC; + } + list_del(&resp_work->list); + kfree(resp_work->data); + kfree(resp_work); } - list_del(&psc_work->list); - kfree(psc_work->data); - kfree(psc_work); } } else if (inst->state == MSM_VIDC_DRC_DRAIN_LAST_FLAG) { - if (list_empty(&inst->input_psc_works)) { new_state = MSM_VIDC_DRAIN; - } else { - s_vpr_h(inst->sid, - "%s: start in DRC_DRAIN_LAST_FLAG state, input psc pending\n"); - psc_work = list_first_entry(&inst->input_psc_works, - struct input_psc_work, list); - rc = handle_session_input_psc(inst, psc_work); - if (rc) { - s_vpr_e(inst->sid, - "%s: handle input psc failed\n", __func__); - new_state = MSM_VIDC_ERROR; - } else { - new_state = MSM_VIDC_DRC_DRAIN; + if (!list_empty(&inst->response_works)) { + resp_work = list_first_entry(&inst->response_works, + struct response_work, list); + if (resp_work->type == RESP_WORK_INPUT_PSC) { + s_vpr_h(inst->sid, + "%s: start in DRC_DRAIN_LAST_FLAG state, input psc pending\n"); + rc = handle_session_response_work(inst, resp_work); + if (rc) { + s_vpr_e(inst->sid, + "%s: handle input psc failed\n", __func__); + new_state = MSM_VIDC_ERROR; + } else { + new_state = MSM_VIDC_DRC_DRAIN; + } + list_del(&resp_work->list); + kfree(resp_work->data); + kfree(resp_work); } - list_del(&psc_work->list); - kfree(psc_work->data); - kfree(psc_work); } } else { s_vpr_e(inst->sid, "%s: wrong state %s\n", @@ -2480,8 +2485,8 @@ static void msm_vidc_close_helper(struct kref *kref) else if (is_encode_session(inst)) msm_venc_inst_deinit(inst); kfree(inst->capabilities); - if (inst->input_psc_workq) - destroy_workqueue(inst->input_psc_workq); + if (inst->response_workq) + destroy_workqueue(inst->response_workq); } struct msm_vidc_inst *get_inst_ref(struct msm_vidc_core *core, diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index fbb1a77f1c..5bdbbed88b 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -147,6 +147,25 @@ int validate_packet(u8 *response_pkt, u8 *core_resp_pkt, return 0; } +static bool check_last_flag(struct msm_vidc_inst *inst, + struct hfi_packet *pkt) +{ + struct hfi_buffer *buffer; + + if (!inst || !pkt) { + d_vpr_e("%s: invalid params %d\n", __func__); + return false; + } + + buffer = (struct hfi_buffer *)((u8 *)pkt + sizeof(struct hfi_packet)); + if (buffer->flags & HFI_BUF_FW_FLAG_LAST) { + s_vpr_h(inst->sid, "%s: received last flag on FBD, index: %d\n", + __func__, buffer->index); + return true; + } + return false; +} + static int handle_session_info(struct msm_vidc_inst *inst, struct hfi_packet *pkt) { @@ -432,12 +451,8 @@ static int handle_output_buffer(struct msm_vidc_inst *inst, /*if (buffer->flags & HFI_BUF_FW_FLAG_SUBFRAME) buf->flags |= MSM_VIDC_BUF_FLAG_SUBFRAME;*/ - if (buffer->flags & HFI_BUF_FW_FLAG_LAST) { - if (msm_vidc_allow_last_flag(inst)) { - buf->flags |= MSM_VIDC_BUF_FLAG_LAST; - msm_vidc_state_change_last_flag(inst); - } - } + if (buffer->flags & HFI_BUF_FW_FLAG_LAST) + buf->flags |= MSM_VIDC_BUF_FLAG_LAST; print_vidc_buffer(VIDC_HIGH, "FBD", inst, buf); return rc; @@ -970,8 +985,8 @@ exit: return rc; } -int handle_session_input_psc(struct msm_vidc_inst *inst, - struct input_psc_work *psc_work) +int handle_session_response_work(struct msm_vidc_inst *inst, + struct response_work *resp_work) { int rc = 0; struct hfi_header *hdr = NULL; @@ -981,12 +996,12 @@ int handle_session_input_psc(struct msm_vidc_inst *inst, u32 hfi_port = 0; int i; - if (!inst || !psc_work) { + if (!inst || !resp_work) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - hdr = (struct hfi_header *)psc_work->data; + hdr = (struct hfi_header *)resp_work->data; if (!hdr) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; @@ -998,8 +1013,8 @@ int handle_session_input_psc(struct msm_vidc_inst *inst, temp_pkt = pkt; for (i = 0; i < hdr->num_packets; i++) { - if (validate_packet(pkt, psc_work->data, - psc_work->data_size, __func__)) { + if (validate_packet(pkt, resp_work->data, + resp_work->data_size, __func__)) { rc = -EINVAL; goto exit; } @@ -1034,23 +1049,44 @@ int handle_session_input_psc(struct msm_vidc_inst *inst, pkt += packet->size; } - print_psc_properties(VIDC_HIGH, "INPUT_PSC", inst, - inst->subcr_params[INPUT_PORT]); - rc = msm_vdec_input_port_settings_change(inst); - if (rc) - goto exit; + + if (hfi_cmd_type == HFI_CMD_BUFFER) { + rc = handle_dequeue_buffers(inst); + if (rc) + goto exit; + } + + if (hfi_cmd_type == HFI_CMD_SETTINGS_CHANGE) { + if (hfi_port == HFI_PORT_RAW) { + print_psc_properties(VIDC_HIGH, "OUTPUT_PSC", inst, + inst->subcr_params[OUTPUT_PORT]); + rc = msm_vdec_output_port_settings_change(inst); + if (rc) + goto exit; + } else if (hfi_port == HFI_PORT_BITSTREAM) { + print_psc_properties(VIDC_HIGH, "INPUT_PSC", inst, + inst->subcr_params[INPUT_PORT]); + rc = msm_vdec_input_port_settings_change(inst); + if (rc) + goto exit; + } else { + s_vpr_e(inst->sid, "%s: invalid port type: %#x\n", + __func__, hfi_port); + } + } exit: return rc; } -void handle_session_input_psc_work_handler(struct work_struct *work) +void handle_session_response_work_handler(struct work_struct *work) { int rc = 0; + bool allow = false; struct msm_vidc_inst *inst; - struct input_psc_work *psc_work, *dummy = NULL; + struct response_work *resp_work, *dummy = NULL; - inst = container_of(work, struct msm_vidc_inst, input_psc_work.work); + inst = container_of(work, struct msm_vidc_inst, response_work.work); inst = get_inst_ref(g_core, inst); if (!inst) { d_vpr_e("%s: invalid params\n", __func__); @@ -1058,26 +1094,74 @@ void handle_session_input_psc_work_handler(struct work_struct *work) } mutex_lock(&inst->lock); - list_for_each_entry_safe(psc_work, dummy, &inst->input_psc_works, list) { - rc = msm_vidc_allow_input_psc(inst); - if (!rc) { - rc = handle_session_input_psc(inst, psc_work); + list_for_each_entry_safe(resp_work, dummy, &inst->response_works, list) { + switch (resp_work->type) { + case RESP_WORK_INPUT_PSC: + allow = msm_vidc_allow_input_psc(inst); + if (!allow) { + s_vpr_e(inst->sid, "%s: input psc not allowed\n", __func__); + break; + } + rc = handle_session_response_work(inst, resp_work); if (!rc) rc = msm_vidc_state_change_input_psc(inst); /* either handle input psc or state change failed */ if (rc) msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); + break; + case RESP_WORK_OUTPUT_PSC: + rc = handle_session_response_work(inst, resp_work); + if (rc) + msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); + break; + case RESP_WORK_LAST_FLAG: + allow = msm_vidc_allow_last_flag(inst); + if (!allow) { + s_vpr_e(inst->sid, "%s: last flag not allowed\n", __func__); + break; + } + rc = handle_session_response_work(inst, resp_work); + if (!rc) + rc = msm_vidc_state_change_last_flag(inst); + + /* either handle last flag or state change failed */ + if (rc) + msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); + break; + default: + d_vpr_e("%s: invalid response work type %d\n", __func__, + resp_work->type); + break; } - list_del(&psc_work->list); - kfree(psc_work->data); - kfree(psc_work); + list_del(&resp_work->list); + kfree(resp_work->data); + kfree(resp_work); } mutex_unlock(&inst->lock); put_inst(inst); } +static int queue_response_work(struct msm_vidc_inst *inst, + enum response_work_type type, void *hdr, u32 hdr_size) +{ + struct response_work *work; + + work = kzalloc(sizeof(struct response_work), GFP_KERNEL); + INIT_LIST_HEAD(&work->list); + work->type = type; + work->data_size = hdr_size; + work->data = kzalloc(hdr_size, GFP_KERNEL); + if (!work->data) + return -ENOMEM; + memcpy(work->data, hdr, hdr_size); + list_add_tail(&work->list, &inst->response_works); + queue_delayed_work(inst->response_workq, + &inst->response_work, msecs_to_jiffies(0)); + return 0; +} + static int handle_session_response(struct msm_vidc_core *core, struct hfi_header *hdr) { @@ -1109,29 +1193,19 @@ static int handle_session_response(struct msm_vidc_core *core, packet = (struct hfi_packet *)pkt; if (packet->type > HFI_CMD_BEGIN && packet->type < HFI_CMD_END) { - if (packet->type == HFI_CMD_SETTINGS_CHANGE && - packet->port == HFI_PORT_BITSTREAM) { - struct input_psc_work *work; - - work = kzalloc(sizeof(struct input_psc_work), GFP_KERNEL); - INIT_LIST_HEAD(&work->list); - work->data_size = hdr->size; - work->data = kzalloc(hdr->size, GFP_KERNEL); - if (!work->data) { - rc= -ENOMEM; + if (packet->type == HFI_CMD_SETTINGS_CHANGE) { + if (packet->port == HFI_PORT_BITSTREAM) + rc = queue_response_work(inst, RESP_WORK_INPUT_PSC, + (void *)hdr, hdr->size); + else if (packet->port == HFI_PORT_RAW) + rc = queue_response_work(inst, RESP_WORK_OUTPUT_PSC, + (void *)hdr, hdr->size); goto exit; - } - memcpy(work->data, (void *)hdr, hdr->size); - list_add_tail(&work->list, &inst->input_psc_works); - queue_delayed_work(inst->input_psc_workq, - &inst->input_psc_work, msecs_to_jiffies(0)); - goto exit; - } - if (hfi_cmd_type == HFI_CMD_SETTINGS_CHANGE) { - s_vpr_e(inst->sid, - "%s: invalid packet type %d in port settings change\n", - __func__, packet->type); - rc = -EINVAL; + } else if (packet->type == HFI_CMD_BUFFER && + packet->port == HFI_PORT_RAW && + check_last_flag(inst, packet)) { + rc = queue_response_work(inst, RESP_WORK_LAST_FLAG, + (void *)hdr, hdr->size); goto exit; } hfi_cmd_type = packet->type; @@ -1161,19 +1235,6 @@ static int handle_session_response(struct msm_vidc_core *core, goto exit; } - if (hfi_cmd_type == HFI_CMD_SETTINGS_CHANGE) { - if (hfi_port == HFI_PORT_RAW) { - print_psc_properties(VIDC_HIGH, "OUTPUT_PSC", inst, - inst->subcr_params[OUTPUT_PORT]); - rc = msm_vdec_output_port_settings_change(inst); - if (rc) - goto exit; - } else { - s_vpr_e(inst->sid, "%s: invalid port type: %#x\n", - __func__, hfi_port); - } - } - exit: mutex_unlock(&inst->lock); put_inst(inst); From 8902bc827f167425150e9948699ba177fd2cb3b0 Mon Sep 17 00:00:00 2001 From: Karthikeyan Periasamy Date: Mon, 4 Jan 2021 12:32:55 -0800 Subject: [PATCH 0056/1061] msm-vidc: Compile video driver UAPI as overlay Install the video UAPI header files for other modules and userspace can use them. CRs-Fixed: 2836617 Change-Id: I664efd10322600fa83fc7970f4a33643c06ae5b7 Signed-off-by: Karthikeyan Periasamy --- Android.bp | 32 +++++++++++++++ video_kernel_headers.py | 88 +++++++++++++++++++++++++++++++++++++++++ 2 files changed, 120 insertions(+) create mode 100644 Android.bp create mode 100644 video_kernel_headers.py diff --git a/Android.bp b/Android.bp new file mode 100644 index 0000000000..a2a67d5ec0 --- /dev/null +++ b/Android.bp @@ -0,0 +1,32 @@ +headers_src = [ + "include/uapi/*/**/*.h", +] + +video_headers_out = [ + "vidc/media/v4l2_vidc_extensions.h", +] + +video_kernel_headers_verbose = "--verbose " +genrule { + name: "qti_generate_video_kernel_headers", + tools: ["headers_install.sh"], + tool_files: [ + "video_kernel_headers.py", + ], + srcs: headers_src, + cmd: "python3 -u $(location video_kernel_headers.py) " + + video_kernel_headers_verbose + + "--header_arch arm64 " + + "--gen_dir $(genDir) " + + "--video_include_uapi $(locations include/uapi/*/**/*.h) " + + "--headers_install $(location headers_install.sh)", + out: video_headers_out, +} + +cc_library_headers { + name: "qti_video_kernel_uapi", + generated_headers: ["qti_generate_video_kernel_headers"], + export_generated_headers: ["qti_generate_video_kernel_headers"], + vendor: true, + recovery_available: true +} diff --git a/video_kernel_headers.py b/video_kernel_headers.py new file mode 100644 index 0000000000..3046ca60a1 --- /dev/null +++ b/video_kernel_headers.py @@ -0,0 +1,88 @@ +# Copyright (c) 2020, The Linux Foundation. All rights reserved. +# +# This program is free software; you can redistribute it and/or modify it +# under the terms of the GNU General Public License version 2 as published by +# the Free Software Foundation. +# +# This program is distributed in the hope that it will be useful, but WITHOUT +# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +# more details. +# +# You should have received a copy of the GNU General Public License along with +# this program. If not, see . + +import argparse +import filecmp +import os +import re +import subprocess +import sys + +def run_headers_install(verbose, gen_dir, headers_install, prefix, h): + if not h.startswith(prefix): + print('error: expected prefix [%s] on header [%s]' % (prefix, h)) + return False + + out_h = os.path.join(gen_dir, h[len(prefix):]) + (out_h_dirname, out_h_basename) = os.path.split(out_h) + cmd = ["bash", headers_install, h, out_h] + + if verbose: + print('run_headers_install: cmd is %s' % cmd) + + result = subprocess.call(cmd) + + if result != 0: + print('error: run_headers_install: cmd %s failed %d' % (cmd, result)) + return False + return True + +def gen_video_headers(verbose, gen_dir, headers_install, video_include_uapi): + error_count = 0 + for h in video_include_uapi: + video_uapi_include_prefix = os.path.join(h.split('/include/uapi/')[0], + 'include', + 'uapi') + os.sep + + if not run_headers_install( + verbose, gen_dir, headers_install, + video_uapi_include_prefix, h): error_count += 1 + return error_count + +def main(): + """Parse command line arguments and perform top level control.""" + parser = argparse.ArgumentParser( + description=__doc__, + formatter_class=argparse.RawDescriptionHelpFormatter) + + # Arguments that apply to every invocation of this script. + parser.add_argument( + '--verbose', action='store_true', + help='Print output that describes the workings of this script.') + parser.add_argument( + '--header_arch', required=True, + help='The arch for which to generate headers.') + parser.add_argument( + '--gen_dir', required=True, + help='Where to place the generated files.') + parser.add_argument( + '--video_include_uapi', required=True, nargs='*', + help='The list of techpack/*/include/uapi header files.') + parser.add_argument( + '--headers_install', required=True, + help='The headers_install tool to process input headers.') + + args = parser.parse_args() + + if args.verbose: + print('header_arch [%s]' % args.header_arch) + print('gen_dir [%s]' % args.gen_dir) + print('video_include_uapi [%s]' % args.video_include_uapi) + print('headers_install [%s]' % args.headers_install) + + return gen_video_headers(args.verbose, args.gen_dir, + args.headers_install, args.video_include_uapi) + +if __name__ == '__main__': + sys.exit(main()) From 2126abf6c35b4fbebb9d1080ed3481118ce26d85 Mon Sep 17 00:00:00 2001 From: Mihir Ganu Date: Fri, 8 Jan 2021 14:37:18 -0800 Subject: [PATCH 0057/1061] video: driver: Update metadata delivery and subscription Enable delivery and subscriptions of various metadata based on client settings. Also, skip instance state changes during metadata port streamon/streamoff. Change-Id: I063b562818c661bf1932c3362ecb709d7fe6bc20 Signed-off-by: Mihir Ganu --- driver/platform/waipio/src/msm_vidc_waipio.c | 12 ++++ driver/vidc/inc/msm_vidc_internal.h | 2 + driver/vidc/src/msm_vdec.c | 64 ++++++++++-------- driver/vidc/src/msm_venc.c | 65 +++++++++++-------- driver/vidc/src/msm_vidc_control.c | 4 ++ driver/vidc/src/msm_vidc_driver.c | 6 ++ .../uapi/vidc/media/v4l2_vidc_extensions.h | 12 +++- 7 files changed, 109 insertions(+), 56 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 73e3432c14..1015dd2524 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -967,6 +967,12 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_CID_MPEG_VIDC_METADATA_INTERLACE, HFI_PROP_INTERLACE_INFO}, + {META_TIMESTAMP, DEC | ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_TIMESTAMP, + HFI_PROP_TIMESTAMP}, + {META_CONCEALED_MB_CNT, DEC, CODECS_ALL, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, @@ -1015,6 +1021,12 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_CID_MPEG_VIDC_METADATA_SUBFRAME_OUTPUT, HFI_PROP_SUBFRAME_OUTPUT}, + {META_ENC_QP_METADATA, ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_ENC_QP_METADATA, + HFI_PROP_ENC_QP_METADATA}, + {META_ROI_INFO, ENC, CODECS_ALL, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index cc13bb0d05..346ae758d4 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -343,6 +343,7 @@ enum msm_vidc_inst_capability_type { META_DPB_MISR, META_OPB_MISR, META_INTERLACE, + META_TIMESTAMP, META_CONCEALED_MB_CNT, META_HIST_INFO, META_SEI_MASTERING_DISP, @@ -351,6 +352,7 @@ enum msm_vidc_inst_capability_type { META_EVA_STATS, META_BUF_TAG, META_SUBFRAME_OUTPUT, + META_ENC_QP_METADATA, META_ROI_INFO, INST_CAP_MAX, }; diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index bc795cd988..9d03caa797 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -37,14 +37,6 @@ u32 msm_vdec_subscribe_for_properties[] = { HFI_PROP_NO_OUTPUT, }; -u32 msm_vdec_subscribe_for_metadata[] = { - HFI_PROP_BUFFER_TAG, -}; - -u32 msm_vdec_deliver_as_metadata[] = { - HFI_PROP_BUFFER_TAG, -}; - static int msm_vdec_codec_change(struct msm_vidc_inst *inst, u32 v4l2_codec) { int rc = 0; @@ -976,11 +968,21 @@ static int msm_vdec_subscribe_metadata(struct msm_vidc_inst *inst, int rc = 0; struct msm_vidc_core *core; u32 payload[32] = {0}; - u32 i; - - //todo: (DP) - d_vpr_h("%s(): skip subscribe metadata\n", __func__); - return 0; + u32 i, count = 0; + struct msm_vidc_inst_capability *capability; + u32 metadata_list[] = { + META_DPB_MISR, + META_OPB_MISR, + META_INTERLACE, + META_TIMESTAMP, + META_CONCEALED_MB_CNT, + META_HIST_INFO, + META_SEI_MASTERING_DISP, + META_SEI_CLL, + META_HDR10PLUS, + META_BUF_TAG, + META_SUBFRAME_OUTPUT, + }; if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); @@ -989,17 +991,22 @@ static int msm_vdec_subscribe_metadata(struct msm_vidc_inst *inst, core = inst->core; d_vpr_h("%s()\n", __func__); + capability = inst->capabilities; payload[0] = HFI_MODE_METADATA; - for (i = 0; i < ARRAY_SIZE(msm_vdec_subscribe_for_metadata); i++) - payload[i + 1] = msm_vdec_subscribe_for_metadata[i]; + for (i = 0; i < ARRAY_SIZE(metadata_list); i++) { + if (capability->cap[metadata_list[i]].value) { + payload[count + 1] = + capability->cap[metadata_list[i]].hfi_id; + count++; + } + }; rc = venus_hfi_session_command(inst, HFI_CMD_SUBSCRIBE_MODE, port, HFI_PAYLOAD_U32_ARRAY, &payload[0], - (ARRAY_SIZE(msm_vdec_subscribe_for_metadata) + 1) * - sizeof(u32)); + (count + 1) * sizeof(u32)); return rc; } @@ -1010,11 +1017,11 @@ static int msm_vdec_set_delivery_mode_metadata(struct msm_vidc_inst *inst, int rc = 0; struct msm_vidc_core *core; u32 payload[32] = {0}; - u32 i; - - //todo: (DP) - d_vpr_h("%s(): skip delivery mode metadata\n", __func__); - return 0; + u32 i, count = 0; + struct msm_vidc_inst_capability *capability; + u32 metadata_list[] = { + META_BUF_TAG, + }; if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); @@ -1023,17 +1030,22 @@ static int msm_vdec_set_delivery_mode_metadata(struct msm_vidc_inst *inst, core = inst->core; d_vpr_h("%s()\n", __func__); + capability = inst->capabilities; payload[0] = HFI_MODE_METADATA; - for (i = 0; i < ARRAY_SIZE(msm_vdec_deliver_as_metadata); i++) - payload[i + 1] = msm_vdec_deliver_as_metadata[i]; + for (i = 0; i < ARRAY_SIZE(metadata_list); i++) { + if (capability->cap[metadata_list[i]].value) { + payload[count + 1] = + capability->cap[metadata_list[i]].hfi_id; + count++; + } + }; rc = venus_hfi_session_command(inst, HFI_CMD_DELIVERY_MODE, port, HFI_PAYLOAD_U32_ARRAY, &payload[0], - (ARRAY_SIZE(msm_vdec_deliver_as_metadata) + 1) * - sizeof(u32)); + (count + 1) * sizeof(u32)); return rc; } diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index 8228d1207a..89c31877ed 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -34,23 +34,6 @@ u32 msm_venc_input_subscribe_for_properties[] = { HFI_PROP_NO_OUTPUT, }; -u32 msm_venc_deliver_as_metadata[] = { - HFI_PROP_BUFFER_TAG, - HFI_PROP_SEI_MASTERING_DISPLAY_COLOUR, - HFI_PROP_SEI_CONTENT_LIGHT_LEVEL, - HFI_PROP_SEI_HDR10PLUS_USERDATA, - HFI_PROP_EVA_STAT_INFO, -}; - -u32 msm_venc_subscribe_for_metadata[] = { - HFI_PROP_BUFFER_TAG, - HFI_PROP_METADATA_SEQ_HEADER_NAL, - HFI_PROP_TIMESTAMP, - HFI_PROP_LTR_MARK_USE_DETAILS, - HFI_PROP_SUBFRAME_OUTPUT, - HFI_PROP_ENC_QP_METADATA, -}; - u32 msm_venc_output_subscribe_for_properties[] = { HFI_PROP_PICTURE_TYPE, HFI_PROP_BUFFER_MARK, @@ -645,7 +628,16 @@ static int msm_venc_metadata_delivery(struct msm_vidc_inst *inst, int rc = 0; struct msm_vidc_core *core; u32 payload[32] = {0}; - u32 i; + u32 i, count = 0; + struct msm_vidc_inst_capability *capability; + u32 metadata_list[] = { + META_SEI_MASTERING_DISP, + META_SEI_CLL, + META_HDR10PLUS, + META_EVA_STATS, + META_BUF_TAG, + META_ROI_INFO, + }; if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); @@ -654,17 +646,22 @@ static int msm_venc_metadata_delivery(struct msm_vidc_inst *inst, core = inst->core; d_vpr_h("%s()\n", __func__); + capability = inst->capabilities; payload[0] = HFI_MODE_METADATA; - for (i = 0; i < ARRAY_SIZE(msm_venc_deliver_as_metadata); i++) - payload[i + 1] = msm_venc_deliver_as_metadata[i]; + for (i = 0; i < ARRAY_SIZE(metadata_list); i++) { + if (capability->cap[metadata_list[i]].value) { + payload[count + 1] = + capability->cap[metadata_list[i]].hfi_id; + count++; + } + }; rc = venus_hfi_session_command(inst, HFI_CMD_DELIVERY_MODE, port, HFI_PAYLOAD_U32_ARRAY, &payload[0], - (ARRAY_SIZE(msm_venc_deliver_as_metadata) + 1) * - sizeof(u32)); + (count + 1) * sizeof(u32)); return rc; } @@ -675,7 +672,16 @@ static int msm_venc_metadata_subscription(struct msm_vidc_inst *inst, int rc = 0; struct msm_vidc_core *core; u32 payload[32] = {0}; - u32 i; + u32 i, count = 0; + struct msm_vidc_inst_capability *capability; + u32 metadata_list[] = { + META_LTR_MARK_USE, + META_SEQ_HDR_NAL, + META_TIMESTAMP, + META_BUF_TAG, + META_SUBFRAME_OUTPUT, + META_ENC_QP_METADATA, + }; if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); @@ -684,17 +690,22 @@ static int msm_venc_metadata_subscription(struct msm_vidc_inst *inst, core = inst->core; d_vpr_h("%s()\n", __func__); + capability = inst->capabilities; payload[0] = HFI_MODE_METADATA; - for (i = 0; i < ARRAY_SIZE(msm_venc_subscribe_for_metadata); i++) - payload[i + 1] = msm_venc_subscribe_for_metadata[i]; + for (i = 0; i < ARRAY_SIZE(metadata_list); i++) { + if (capability->cap[metadata_list[i]].value) { + payload[count + 1] = + capability->cap[metadata_list[i]].hfi_id; + count++; + } + }; rc = venus_hfi_session_command(inst, HFI_CMD_SUBSCRIBE_MODE, port, HFI_PAYLOAD_U32_ARRAY, &payload[0], - (ARRAY_SIZE(msm_venc_subscribe_for_metadata) + 1) * - sizeof(u32)); + (count + 1) * sizeof(u32)); return rc; } diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index cfd955ec4d..d4720a435b 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -165,6 +165,10 @@ static const char *msm_vidc_get_priv_ctrl_name(u32 sid, u32 control_id) return "Subframe Output Metadata"; case V4L2_CID_MPEG_VIDC_METADATA_ROI_INFO: return "ROI Info Metadata"; + case V4L2_CID_MPEG_VIDC_METADATA_TIMESTAMP: + return "Timestamp Metadata"; + case V4L2_CID_MPEG_VIDC_METADATA_ENC_QP_METADATA: + return "Encoder QP Metadata"; default: s_vpr_e(sid, "%s: ctrl name not available for ctrl id %#x\n", __func__, control_id); diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 26f18128da..93fae80cd6 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -751,6 +751,9 @@ int msm_vidc_state_change_streamon(struct msm_vidc_inst *inst, u32 type) return -EINVAL; } + if (type == INPUT_META_PLANE || type == OUTPUT_META_PLANE) + return 0; + if (type == INPUT_MPLANE) { if (inst->state == MSM_VIDC_OPEN) new_state = MSM_VIDC_START_INPUT; @@ -806,6 +809,9 @@ int msm_vidc_state_change_streamoff(struct msm_vidc_inst *inst, u32 type) return -EINVAL; } + if (type == INPUT_META_PLANE || type == OUTPUT_META_PLANE) + return 0; + if (type == INPUT_MPLANE) { if (inst->state == MSM_VIDC_START_INPUT) { new_state = MSM_VIDC_OPEN; diff --git a/include/uapi/vidc/media/v4l2_vidc_extensions.h b/include/uapi/vidc/media/v4l2_vidc_extensions.h index a4e15c8bfa..31e8fde888 100644 --- a/include/uapi/vidc/media/v4l2_vidc_extensions.h +++ b/include/uapi/vidc/media/v4l2_vidc_extensions.h @@ -81,7 +81,7 @@ enum v4l2_mpeg_vidc_blur_types { (V4L2_CID_MPEG_VIDC_BASE + 0x16) #define V4L2_CID_MPEG_VIDC_METADATA_INTERLACE \ (V4L2_CID_MPEG_VIDC_BASE + 0x17) -#define V4L2_CID_MPEG_VIDC_METADATA_CONCEALED_MB_COUNT \ +#define V4L2_CID_MPEG_VIDC_METADATA_CONCEALED_MB_COUNT \ (V4L2_CID_MPEG_VIDC_BASE + 0x18) #define V4L2_CID_MPEG_VIDC_METADATA_HISTOGRAM_INFO \ (V4L2_CID_MPEG_VIDC_BASE + 0x19) @@ -99,6 +99,10 @@ enum v4l2_mpeg_vidc_blur_types { (V4L2_CID_MPEG_VIDC_BASE + 0x1F) #define V4L2_CID_MPEG_VIDC_METADATA_ROI_INFO \ (V4L2_CID_MPEG_VIDC_BASE + 0x20) +#define V4L2_CID_MPEG_VIDC_METADATA_TIMESTAMP \ + (V4L2_CID_MPEG_VIDC_BASE + 0x21) +#define V4L2_CID_MPEG_VIDC_METADATA_ENC_QP_METADATA \ + (V4L2_CID_MPEG_VIDC_BASE + 0x22) enum v4l2_mpeg_vidc_metapayload_header_flags { METADATA_FLAGS_NONE = 0, @@ -121,11 +125,12 @@ struct msm_vidc_metapayload_header { }; enum v4l2_mpeg_vidc_metadata { METADATA_LTR_MARK_USE_DETAILS = 0x03000137, - METADATA_METADATA_SEQ_HEADER_NAL = 0x0300014a, + METADATA_SEQ_HEADER_NAL = 0x0300014a, METADATA_DPB_LUMA_CHROMA_MISR = 0x03000153, METADATA_OPB_LUMA_CHROMA_MISR = 0x03000154, METADATA_INTERLACE = 0x03000156, - METADATA_CONEALED_MB_COUNT = 0x0300015f, + METADATA_TIMESTAMP = 0x0300015c, + METADATA_CONCEALED_MB_COUNT = 0x0300015f, METADATA_HISTOGRAM_INFO = 0x03000161, METADATA_SEI_MASTERING_DISPLAY_COLOUR = 0x03000163, METADATA_SEI_CONTENT_LIGHT_LEVEL = 0x03000164, @@ -133,6 +138,7 @@ enum v4l2_mpeg_vidc_metadata { METADATA_EVA_STATS = 0x03000167, METADATA_BUFFER_TAG = 0x0300016b, METADATA_SUBFRAME_OUTPUT = 0x0300016d, + METADATA_ENC_QP_METADATA = 0x0300016e, METADATA_ROI_INFO = 0x03000173, }; From 0208a2b4718dc7a52840d679c24640eb558e9e3d Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Fri, 8 Jan 2021 19:40:41 -0800 Subject: [PATCH 0058/1061] video: driver: Add support for VIDIOC_S_PARM and VIDIOC_G_PARM Add support for S_PARM and G_PARM to enable client to set and get frame rate and operating rate to driver. Also includes some inst database grooming changes. Change-Id: I5b39537662faa56effa0ac63acdfc100d83bf403 Signed-off-by: Akshata Sahukar --- driver/platform/waipio/src/msm_vidc_waipio.c | 28 ++-- .../variant/iris2/src/msm_vidc_buffer_iris2.c | 9 +- .../variant/iris2/src/msm_vidc_power_iris2.c | 11 +- driver/vidc/inc/msm_vdec.h | 4 + driver/vidc/inc/msm_venc.h | 4 + driver/vidc/inc/msm_vidc.h | 2 + driver/vidc/inc/msm_vidc_inst.h | 4 - driver/vidc/inc/msm_vidc_internal.h | 1 + driver/vidc/inc/msm_vidc_v4l2.h | 4 + driver/vidc/src/hfi_packet.c | 12 +- driver/vidc/src/msm_vdec.c | 115 +++++++++++++- driver/vidc/src/msm_venc.c | 148 +++++++++++++++--- driver/vidc/src/msm_vidc.c | 46 ++++++ driver/vidc/src/msm_vidc_control.c | 5 +- driver/vidc/src/msm_vidc_driver.c | 17 +- driver/vidc/src/msm_vidc_platform.c | 2 + driver/vidc/src/msm_vidc_power.c | 25 ++- driver/vidc/src/msm_vidc_v4l2.c | 16 ++ 18 files changed, 385 insertions(+), 68 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 1015dd2524..e32e004411 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -159,21 +159,15 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { /* ((4096 * 2304) / 256) * 60 fps */ {POWER_SAVE_MBPS, ENC, CODECS_ALL, 0, 2211840, 1, 2211840}, - // TODO: Decide to store q16 or just int - {FRAME_RATE, ENC, CODECS_ALL, + {FRAME_RATE, ENC|DEC, CODECS_ALL, (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), 1, (DEFAULT_FPS << 16), 0, HFI_PROP_FRAME_RATE, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, - {0}, {0}, - NULL, msm_vidc_set_q16}, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, - // Implement: Operating rate will accept any int value. {OPERATING_RATE, ENC|DEC, CODECS_ALL, - 1, INT_MAX, 1, (DEFAULT_FPS << 16), - 0, - HFI_PROP_FRAME_RATE}, + 1, INT_MAX, 1, (DEFAULT_FPS << 16)}, {SCALE_X, ENC, CODECS_ALL, 8192, 65536, 1, 8192}, {SCALE_X, DEC, CODECS_ALL, 65536, 65536, 1, 65536}, @@ -922,9 +916,19 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, // TODO - {STAGE, DEC|ENC, CODECS_ALL, 1, 2, 1, 2}, - {PIPE, DEC|ENC, CODECS_ALL, 1, 4, 1, 4}, - {POC, DEC, H264, 0, 1, 1, 0}, + {STAGE, DEC|ENC, CODECS_ALL, + MSM_VIDC_STAGE_1, + MSM_VIDC_STAGE_2, 1, + MSM_VIDC_STAGE_2}, + {PIPE, DEC|ENC, CODECS_ALL, + MSM_VIDC_PIPE_1, + MSM_VIDC_PIPE_4, 1, + MSM_VIDC_PIPE_4}, + {POC, DEC, H264, 0, 18, 1, 1}, + {QUALITY_MODE, DEC|ENC, CODECS_ALL, + MSM_VIDC_MAX_QUALITY_MODE, + MSM_VIDC_POWER_SAVE_MODE, 1, + MSM_VIDC_MAX_QUALITY_MODE}, {CODED_FRAMES, DEC, CODECS_ALL, 0, 1, 1, 0, 0, diff --git a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c index 940d94fa55..fea9826954 100644 --- a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c @@ -194,10 +194,10 @@ static u32 msm_vidc_encoder_bin_size_iris2(struct msm_vidc_inst *inst) { struct msm_vidc_core *core; u32 size = 0; - u32 width, height, num_vpp_pipes; + u32 width, height, num_vpp_pipes, stage; struct v4l2_format *f; - if (!inst || !inst->core) { + if (!inst || !inst->core || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); return size; } @@ -207,14 +207,15 @@ static u32 msm_vidc_encoder_bin_size_iris2(struct msm_vidc_inst *inst) return size; } num_vpp_pipes = core->capabilities[NUM_VPP_PIPE].value; + stage = inst->capabilities->cap[STAGE].value; f = &inst->fmts[OUTPUT_PORT]; width = f->fmt.pix_mp.width; height = f->fmt.pix_mp.height; if (inst->codec == MSM_VIDC_H264) - HFI_BUFFER_BIN_H264E(size, width, height, inst->stage, num_vpp_pipes); + HFI_BUFFER_BIN_H264E(size, width, height, stage, num_vpp_pipes); else if (inst->codec == MSM_VIDC_HEVC) - HFI_BUFFER_BIN_H265E(size, width, height, inst->stage, num_vpp_pipes); + HFI_BUFFER_BIN_H265E(size, width, height, stage, num_vpp_pipes); s_vpr_l(inst->sid, "%s: size %d\n", __func__, size); return size; diff --git a/driver/variant/iris2/src/msm_vidc_power_iris2.c b/driver/variant/iris2/src/msm_vidc_power_iris2.c index e47829d733..eb045d4495 100644 --- a/driver/variant/iris2/src/msm_vidc_power_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_power_iris2.c @@ -65,13 +65,14 @@ u64 msm_vidc_calc_freq_iris2(struct msm_vidc_inst *inst, u32 data_size) /* VSP */ /* bitrate is based on fps, scale it using operating rate */ - operating_rate = inst->prop.operating_rate >> 16; - if (operating_rate > (inst->prop.frame_rate >> 16) && - (inst->prop.frame_rate >> 16)) { + operating_rate = inst->capabilities->cap[OPERATING_RATE].value >> 16; + if (operating_rate > + (inst->capabilities->cap[FRAME_RATE].value >> 16) && + (inst->capabilities->cap[FRAME_RATE].value >> 16)) { vsp_factor_num = operating_rate; - vsp_factor_den = inst->prop.frame_rate >> 16; + vsp_factor_den = inst->capabilities->cap[FRAME_RATE].value >> 16; } - vsp_cycles = div_u64(((u64)inst->prop.bitrate * + vsp_cycles = div_u64(((u64)inst->capabilities->cap[BIT_RATE].value * vsp_factor_num), vsp_factor_den); base_cycles = core->capabilities[MB_CYCLES_VSP].value; diff --git a/driver/vidc/inc/msm_vdec.h b/driver/vidc/inc/msm_vdec.h index f4102549da..132cd74700 100644 --- a/driver/vidc/inc/msm_vdec.h +++ b/driver/vidc/inc/msm_vdec.h @@ -18,6 +18,10 @@ int msm_vdec_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f); int msm_vdec_g_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f); int msm_vdec_s_selection(struct msm_vidc_inst* inst, struct v4l2_selection* s); int msm_vdec_g_selection(struct msm_vidc_inst* inst, struct v4l2_selection* s); +int msm_vdec_s_param(struct msm_vidc_inst *inst, + struct v4l2_streamparm *s_parm); +int msm_vdec_g_param(struct msm_vidc_inst *inst, + struct v4l2_streamparm *s_parm); int msm_vdec_enum_fmt(struct msm_vidc_inst *inst, struct v4l2_fmtdesc *f); int msm_vdec_inst_init(struct msm_vidc_inst *inst); int msm_vdec_inst_deinit(struct msm_vidc_inst *inst); diff --git a/driver/vidc/inc/msm_venc.h b/driver/vidc/inc/msm_venc.h index 70e1e44a4d..6714b4b87b 100644 --- a/driver/vidc/inc/msm_venc.h +++ b/driver/vidc/inc/msm_venc.h @@ -18,6 +18,10 @@ int msm_venc_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f); int msm_venc_g_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f); int msm_venc_s_selection(struct msm_vidc_inst* inst, struct v4l2_selection* s); int msm_venc_g_selection(struct msm_vidc_inst* inst, struct v4l2_selection* s); +int msm_venc_s_param(struct msm_vidc_inst *inst, + struct v4l2_streamparm *s_parm); +int msm_venc_g_param(struct msm_vidc_inst *inst, + struct v4l2_streamparm *s_parm); int msm_venc_enum_fmt(struct msm_vidc_inst *inst, struct v4l2_fmtdesc *f); int msm_venc_inst_init(struct msm_vidc_inst *inst); int msm_venc_inst_deinit(struct msm_vidc_inst *inst); diff --git a/driver/vidc/inc/msm_vidc.h b/driver/vidc/inc/msm_vidc.h index ede165d584..0f8966cc7e 100644 --- a/driver/vidc/inc/msm_vidc.h +++ b/driver/vidc/inc/msm_vidc.h @@ -23,6 +23,8 @@ int msm_vidc_s_fmt(void *instance, struct v4l2_format *f); int msm_vidc_g_fmt(void *instance, struct v4l2_format *f); int msm_vidc_s_selection(void* instance, struct v4l2_selection* s); int msm_vidc_g_selection(void* instance, struct v4l2_selection* s); +int msm_vidc_s_param(void *instance, struct v4l2_streamparm *sp); +int msm_vidc_g_param(void *instance, struct v4l2_streamparm *sp); int msm_vidc_s_ctrl(void *instance, struct v4l2_control *a); int msm_vidc_s_ext_ctrl(void *instance, struct v4l2_ext_controls *a); int msm_vidc_g_ext_ctrl(void *instance, struct v4l2_ext_controls *a); diff --git a/driver/vidc/inc/msm_vidc_inst.h b/driver/vidc/inc/msm_vidc_inst.h index f92191b9ef..65440d0168 100644 --- a/driver/vidc/inc/msm_vidc_inst.h +++ b/driver/vidc/inc/msm_vidc_inst.h @@ -105,10 +105,6 @@ struct msm_vidc_inst { struct vb2_queue vb2q[MAX_PORT]; struct msm_vidc_rectangle crop; struct msm_vidc_rectangle compose; - struct msm_vidc_properties prop; - enum msm_vidc_stage_type stage; - enum msm_vidc_pipe_type pipe; - enum msm_vidc_quality_mode quality_mode; struct msm_vidc_power power; enum msm_vidc_modes flags; struct vidc_bus_vote_data bus_data; diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 346ae758d4..e14038e643 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -336,6 +336,7 @@ enum msm_vidc_inst_capability_type { STAGE, PIPE, POC, + QUALITY_MODE, CODED_FRAMES, BIT_DEPTH, CODEC_CONFIG, diff --git a/driver/vidc/inc/msm_vidc_v4l2.h b/driver/vidc/inc/msm_vidc_v4l2.h index 0cd9ecdefc..4475122032 100644 --- a/driver/vidc/inc/msm_vidc_v4l2.h +++ b/driver/vidc/inc/msm_vidc_v4l2.h @@ -26,6 +26,10 @@ int msm_v4l2_s_selection(struct file* file, void* fh, struct v4l2_selection* s); int msm_v4l2_g_selection(struct file* file, void* fh, struct v4l2_selection* s); +int msm_v4l2_s_parm(struct file *file, void *fh, + struct v4l2_streamparm *a); +int msm_v4l2_g_parm(struct file *file, void *fh, + struct v4l2_streamparm *a); int msm_v4l2_s_ctrl(struct file *file, void *fh, struct v4l2_control *a); int msm_v4l2_g_ctrl(struct file *file, void *fh, diff --git a/driver/vidc/src/hfi_packet.c b/driver/vidc/src/hfi_packet.c index 3b724dc294..d83d54759c 100644 --- a/driver/vidc/src/hfi_packet.c +++ b/driver/vidc/src/hfi_packet.c @@ -213,7 +213,12 @@ u32 get_hfi_quality_mode(struct msm_vidc_inst *inst) { u32 hfi_mode = HFI_MODE_POWER_SAVE; - switch(inst->quality_mode) { + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + goto exit; + } + + switch(inst->capabilities->cap[QUALITY_MODE].value) { case MSM_VIDC_MAX_QUALITY_MODE: hfi_mode = HFI_MODE_MAX_QUALITY; break; @@ -221,11 +226,12 @@ u32 get_hfi_quality_mode(struct msm_vidc_inst *inst) hfi_mode = HFI_MODE_POWER_SAVE; break; default: - s_vpr_e(inst->sid, "%s: invalid qulity mode %d\n", - __func__, inst->quality_mode); + s_vpr_e(inst->sid, "%s: invalid qulity mode %d\n", __func__, + inst->capabilities->cap[QUALITY_MODE].value); break; } +exit: return hfi_mode; } diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 9d03caa797..ac6ca287d6 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -449,6 +449,7 @@ static int msm_vdec_set_stage(struct msm_vidc_inst *inst) int rc = 0; u32 stage = 0; struct msm_vidc_core *core = inst->core; + struct msm_vidc_inst_capability *capability = inst->capabilities; rc = call_session_op(core, decide_work_mode, inst); if (rc) { @@ -457,7 +458,7 @@ static int msm_vdec_set_stage(struct msm_vidc_inst *inst) return -EINVAL; } - stage = inst->stage; + stage = capability->cap[STAGE].value; s_vpr_h(inst->sid, "%s: stage: %d", __func__, stage); rc = venus_hfi_session_property(inst, HFI_PROP_STAGE, @@ -477,6 +478,7 @@ static int msm_vdec_set_pipe(struct msm_vidc_inst *inst) int rc = 0; u32 pipe; struct msm_vidc_core *core = inst->core; + struct msm_vidc_inst_capability *capability = inst->capabilities; rc = call_session_op(core, decide_work_route, inst); if (rc) { @@ -485,14 +487,14 @@ static int msm_vdec_set_pipe(struct msm_vidc_inst *inst) return -EINVAL; } - pipe = inst->pipe; + pipe = capability->cap[PIPE].value; s_vpr_h(inst->sid, "%s: pipe: %d", __func__, pipe); rc = venus_hfi_session_property(inst, HFI_PROP_PIPE, HFI_HOST_FLAGS_NONE, HFI_PORT_NONE, HFI_PAYLOAD_U32, - &inst->pipe, + &pipe, sizeof(u32)); if (rc) s_vpr_e(inst->sid, "%s: set property failed\n", __func__); @@ -1751,6 +1753,108 @@ int msm_vdec_g_selection(struct msm_vidc_inst* inst, struct v4l2_selection* s) return 0; } +int msm_vdec_s_param(struct msm_vidc_inst *inst, + struct v4l2_streamparm *s_parm) +{ + int rc = 0; + struct msm_vidc_inst_capability *capability = NULL; + struct v4l2_fract *timeperframe = NULL; + u32 q16_rate, max_rate, default_rate; + u64 us_per_frame = 0, input_rate = 0; + bool is_frame_rate = false; + + if (!inst || !s_parm) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + if (s_parm->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) { + timeperframe = &s_parm->parm.output.timeperframe; + max_rate = capability->cap[FRAME_RATE].max; + default_rate = capability->cap[FRAME_RATE].value; + is_frame_rate = true; + } else { + timeperframe = &s_parm->parm.capture.timeperframe; + max_rate = capability->cap[OPERATING_RATE].value; + default_rate = capability->cap[OPERATING_RATE].value; + } + + if (!timeperframe->denominator || !timeperframe->numerator) { + s_vpr_e(inst->sid, + "%s: invalid rate for type %u\n", + __func__, s_parm->type); + input_rate = default_rate >> 16; + goto set_default; + } + + us_per_frame = timeperframe->numerator * (u64)USEC_PER_SEC; + do_div(us_per_frame, timeperframe->denominator); + + if (!us_per_frame) { + s_vpr_e(inst->sid, "%s: us_per_frame is zero\n", + __func__); + rc = -EINVAL; + goto exit; + } + + input_rate = (u64)USEC_PER_SEC; + do_div(input_rate, us_per_frame); + + /* Check max allowed rate */ + if (input_rate > max_rate) { + s_vpr_e(inst->sid, + "%s: Unsupported rate %u, max_fps %u, type: %u\n", + __func__, input_rate, max_rate, s_parm->type); + rc = -ENOTSUPP; + goto exit; + } + +set_default: + q16_rate = (u32)input_rate << 16; + s_vpr_h(inst->sid, "%s: type %u value %#x\n", + __func__, s_parm->type, q16_rate); + + if (is_frame_rate) { + capability->cap[FRAME_RATE].value = q16_rate; + } else { + capability->cap[OPERATING_RATE].value = q16_rate; + } + +exit: + return rc; +} + +int msm_vdec_g_param(struct msm_vidc_inst *inst, + struct v4l2_streamparm *s_parm) +{ + struct msm_vidc_inst_capability *capability = NULL; + struct v4l2_fract *timeperframe = NULL; + + if (!inst || !s_parm) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + if (s_parm->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) { + timeperframe = &s_parm->parm.output.timeperframe; + timeperframe->numerator = 1; + timeperframe->denominator = + capability->cap[FRAME_RATE].value >> 16; + } else { + timeperframe = &s_parm->parm.capture.timeperframe; + timeperframe->numerator = 1; + timeperframe->denominator = + capability->cap[OPERATING_RATE].value >> 16; + } + + s_vpr_h(inst->sid, "%s: type %u, num %u denom %u\n", + __func__, s_parm->type, timeperframe->numerator, + timeperframe->denominator); + return 0; +} + int msm_vdec_enum_fmt(struct msm_vidc_inst *inst, struct v4l2_fmtdesc *f) { int rc = 0; @@ -1894,11 +1998,6 @@ int msm_vdec_inst_init(struct msm_vidc_inst *inst) inst->buffers.output_meta.actual_count = inst->buffers.output.actual_count; inst->buffers.output_meta.size = f->fmt.meta.buffersize; - inst->prop.frame_rate = DEFAULT_FPS << 16; - inst->prop.operating_rate = DEFAULT_FPS << 16; - inst->stage = MSM_VIDC_STAGE_2; - inst->pipe = MSM_VIDC_PIPE_4; - rc = msm_vdec_codec_change(inst, inst->fmts[INPUT_PORT].fmt.pix_mp.pixelformat); diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index 89c31877ed..09ca3ba166 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -272,6 +272,8 @@ static int msm_venc_set_stage(struct msm_vidc_inst *inst) { int rc = 0; struct msm_vidc_core *core = inst->core; + struct msm_vidc_inst_capability *capability = inst->capabilities; + u32 stage; rc = call_session_op(core, decide_work_mode, inst); if (rc) { @@ -280,13 +282,14 @@ static int msm_venc_set_stage(struct msm_vidc_inst *inst) return -EINVAL; } - s_vpr_h(inst->sid, "%s: stage: %u\n", __func__, inst->stage); + stage = capability->cap[STAGE].value; + s_vpr_h(inst->sid, "%s: stage: %u\n", __func__, stage); rc = venus_hfi_session_property(inst, HFI_PROP_STAGE, HFI_HOST_FLAGS_NONE, HFI_PORT_NONE, HFI_PAYLOAD_U32, - &inst->stage, + &stage, sizeof(u32)); if (rc) return rc; @@ -297,6 +300,8 @@ static int msm_venc_set_pipe(struct msm_vidc_inst *inst) { int rc = 0; struct msm_vidc_core *core = inst->core; + struct msm_vidc_inst_capability *capability = inst->capabilities; + u32 pipe; rc = call_session_op(core, decide_work_route, inst); if (rc) { @@ -305,13 +310,14 @@ static int msm_venc_set_pipe(struct msm_vidc_inst *inst) return -EINVAL; } - s_vpr_h(inst->sid, "%s: pipe: %u\n", __func__, inst->pipe); + pipe = capability->cap[PIPE].value; + s_vpr_h(inst->sid, "%s: pipe: %u\n", __func__, pipe); rc = venus_hfi_session_property(inst, HFI_PROP_PIPE, HFI_HOST_FLAGS_NONE, HFI_PORT_NONE, HFI_PAYLOAD_U32, - &inst->pipe, + &pipe, sizeof(u32)); if (rc) return rc; @@ -321,20 +327,17 @@ static int msm_venc_set_pipe(struct msm_vidc_inst *inst) static int msm_venc_set_quality_mode(struct msm_vidc_inst *inst) { int rc = 0; + struct msm_vidc_inst_capability *capability = inst->capabilities; + u32 mode; - if (!inst->quality_mode) { - s_vpr_e(inst->sid, "%s: invalid mode: %u\n", - __func__, inst->quality_mode); - return -EINVAL; - } - - s_vpr_h(inst->sid, "%s: quality_mode: %u\n", __func__, inst->quality_mode); + mode = capability->cap[QUALITY_MODE].value; + s_vpr_h(inst->sid, "%s: quality_mode: %u\n", __func__, mode); rc = venus_hfi_session_property(inst, HFI_PROP_QUALITY_MODE, HFI_HOST_FLAGS_NONE, HFI_PORT_BITSTREAM, HFI_PAYLOAD_U32_ENUM, - &inst->quality_mode, + &mode, sizeof(u32)); if (rc) return rc; @@ -1267,6 +1270,121 @@ int msm_venc_g_selection(struct msm_vidc_inst* inst, struct v4l2_selection* s) return rc; } +int msm_venc_s_param(struct msm_vidc_inst *inst, + struct v4l2_streamparm *s_parm) +{ + int rc = 0; + struct msm_vidc_inst_capability *capability = NULL; + struct v4l2_fract *timeperframe = NULL; + u32 q16_rate, max_rate, default_rate; + u64 us_per_frame = 0, input_rate = 0; + bool is_frame_rate = false; + + if (!inst || !s_parm) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + if (s_parm->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) { + timeperframe = &s_parm->parm.output.timeperframe; + max_rate = capability->cap[OPERATING_RATE].max; + default_rate = capability->cap[OPERATING_RATE].value; + } else { + timeperframe = &s_parm->parm.capture.timeperframe; + is_frame_rate = true; + max_rate = capability->cap[FRAME_RATE].value; + default_rate = capability->cap[FRAME_RATE].value; + } + + if (!timeperframe->denominator || !timeperframe->numerator) { + s_vpr_e(inst->sid, + "%s: invalid rate for type %u\n", + __func__, s_parm->type); + input_rate = default_rate >> 16; + goto set_default; + } + + us_per_frame = timeperframe->numerator * (u64)USEC_PER_SEC; + do_div(us_per_frame, timeperframe->denominator); + + if (!us_per_frame) { + s_vpr_e(inst->sid, "%s: us_per_frame is zero\n", + __func__); + rc = -EINVAL; + goto exit; + } + + input_rate = (u64)USEC_PER_SEC; + do_div(input_rate, us_per_frame); + + /* Check max allowed rate */ + if (input_rate > max_rate) { + s_vpr_e(inst->sid, + "%s: Unsupported rate %u, max_fps %u, type: %u\n", + __func__, input_rate, max_rate, s_parm->type); + rc = -ENOTSUPP; + goto exit; + } + +set_default: + q16_rate = (u32)input_rate << 16; + s_vpr_h(inst->sid, "%s: type %u value %#x\n", + __func__, s_parm->type, q16_rate); + + if (is_frame_rate) { + rc = venus_hfi_session_property(inst, + HFI_PROP_FRAME_RATE, + HFI_HOST_FLAGS_NONE, + HFI_PORT_BITSTREAM, + HFI_PAYLOAD_Q16, + &q16_rate, + sizeof(u32)); + if (rc) { + s_vpr_e(inst->sid, + "%s: failed to set frame rate to fw\n", + __func__); + goto exit; + } + capability->cap[FRAME_RATE].value = q16_rate; + } else { + capability->cap[OPERATING_RATE].value = q16_rate; + } + +exit: + return rc; +} + +int msm_venc_g_param(struct msm_vidc_inst *inst, + struct v4l2_streamparm *s_parm) +{ + struct msm_vidc_inst_capability *capability = NULL; + struct v4l2_fract *timeperframe = NULL; + + if (!inst || !s_parm) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + if (s_parm->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) { + timeperframe = &s_parm->parm.output.timeperframe; + timeperframe->numerator = 1; + timeperframe->denominator = + capability->cap[OPERATING_RATE].value >> 16; + } else { + timeperframe = &s_parm->parm.capture.timeperframe; + timeperframe->numerator = 1; + timeperframe->denominator = + capability->cap[FRAME_RATE].value >> 16; + } + + s_vpr_h(inst->sid, "%s: type %u, num %u denom %u\n", + __func__, s_parm->type, timeperframe->numerator, + timeperframe->denominator); + return 0; +} + int msm_venc_enum_fmt(struct msm_vidc_inst *inst, struct v4l2_fmtdesc *f) { int rc = 0; @@ -1409,12 +1527,6 @@ int msm_venc_inst_init(struct msm_vidc_inst *inst) inst->buffers.input_meta.actual_count = inst->buffers.input.actual_count; inst->buffers.input_meta.size = f->fmt.meta.buffersize; - inst->prop.frame_rate = DEFAULT_FPS << 16; - inst->prop.operating_rate = DEFAULT_FPS << 16; - inst->stage = MSM_VIDC_STAGE_1; - inst->pipe = MSM_VIDC_PIPE_4; - inst->quality_mode = MSM_VIDC_MAX_QUALITY_MODE; - rc = msm_venc_codec_change(inst, inst->fmts[OUTPUT_PORT].fmt.pix_mp.pixelformat); diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index 4b6137748c..d506e1aa38 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -303,6 +303,52 @@ int msm_vidc_g_selection(void* instance, struct v4l2_selection* s) } EXPORT_SYMBOL(msm_vidc_g_selection); +int msm_vidc_s_param(void *instance, struct v4l2_streamparm *param) +{ + int rc = 0; + struct msm_vidc_inst *inst = instance; + + if (!inst || !param) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (param->type != V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE && + param->type != V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) + return -EINVAL; + + if (is_decode_session(inst)) + rc = msm_vdec_s_param(instance, param); + else if (is_encode_session(inst)) + rc = msm_venc_s_param(instance, param); + + return rc; +} +EXPORT_SYMBOL(msm_vidc_s_param); + +int msm_vidc_g_param(void *instance, struct v4l2_streamparm *param) +{ + int rc = 0; + struct msm_vidc_inst *inst = instance; + + if (!inst || !param) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (param->type != V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE && + param->type != V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) + return -EINVAL; + + if (is_decode_session(inst)) + rc = msm_vdec_g_param(instance, param); + else if (is_encode_session(inst)) + rc = msm_venc_g_param(instance, param); + + return rc; +} +EXPORT_SYMBOL(msm_vidc_g_param); + int msm_vidc_s_ctrl(void *instance, struct v4l2_control *control) { struct msm_vidc_inst *inst = instance; diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index d4720a435b..7f0654ab9c 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -850,12 +850,12 @@ int msm_vidc_set_bitrate_mode(void *instance, if (lossless) { hfi_value = HFI_RC_LOSSLESS; - return rc; + goto set; } if (!frame_rc) { hfi_value = HFI_RC_OFF; - return rc; + goto set; } if (bitrate_mode == V4L2_MPEG_VIDEO_BITRATE_MODE_VBR) { @@ -871,6 +871,7 @@ int msm_vidc_set_bitrate_mode(void *instance, } */ +set: rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32_ENUM, &hfi_value, sizeof(u32), __func__); diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 93fae80cd6..bdf21e6198 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -1061,12 +1061,21 @@ int msm_vidc_get_mbs_per_frame(struct msm_vidc_inst *inst) int msm_vidc_get_fps(struct msm_vidc_inst *inst) { int fps; + u32 frame_rate, operating_rate; - if (inst->prop.operating_rate > inst->prop.frame_rate) - fps = (inst->prop.operating_rate >> 16) ? - (inst->prop.operating_rate >> 16) : 1; + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + frame_rate = inst->capabilities->cap[FRAME_RATE].value; + operating_rate = inst->capabilities->cap[OPERATING_RATE].value; + + if (operating_rate > frame_rate) + fps = (operating_rate >> 16) ? + (operating_rate >> 16) : 1; else - fps = inst->prop.frame_rate >> 16; + fps = frame_rate >> 16; return fps; } diff --git a/driver/vidc/src/msm_vidc_platform.c b/driver/vidc/src/msm_vidc_platform.c index fcb69eb38b..07f0fb96f0 100644 --- a/driver/vidc/src/msm_vidc_platform.c +++ b/driver/vidc/src/msm_vidc_platform.c @@ -41,6 +41,8 @@ static struct v4l2_ioctl_ops msm_v4l2_ioctl_ops = { .vidioc_g_fmt_meta_cap = msm_v4l2_g_fmt, .vidioc_g_selection = msm_v4l2_g_selection, .vidioc_s_selection = msm_v4l2_s_selection, + .vidioc_s_parm = msm_v4l2_s_parm, + .vidioc_g_parm = msm_v4l2_g_parm, .vidioc_reqbufs = msm_v4l2_reqbufs, .vidioc_qbuf = msm_v4l2_qbuf, .vidioc_dqbuf = msm_v4l2_dqbuf, diff --git a/driver/vidc/src/msm_vidc_power.c b/driver/vidc/src/msm_vidc_power.c index 4cfe5f8a3f..458bafa9fd 100644 --- a/driver/vidc/src/msm_vidc_power.c +++ b/driver/vidc/src/msm_vidc_power.c @@ -45,7 +45,7 @@ static int msm_vidc_get_mbps(struct msm_vidc_inst *inst, enum load_calc_quirks quirks) { int input_port_mbs, output_port_mbs; - int fps; + int fps, operating_rate, frame_rate; struct v4l2_format *f; f = &inst->fmts[INPUT_PORT]; @@ -56,11 +56,14 @@ static int msm_vidc_get_mbps(struct msm_vidc_inst *inst, output_port_mbs = NUM_MBS_PER_FRAME(f->fmt.pix_mp.width, f->fmt.pix_mp.height); - fps = inst->prop.frame_rate; + frame_rate = inst->capabilities->cap[FRAME_RATE].value; + operating_rate = inst->capabilities->cap[OPERATING_RATE].value; + + fps = frame_rate; /* For admission control operating rate is ignored */ if (quirks == LOAD_POWER) - fps = max(inst->prop.operating_rate, inst->prop.frame_rate); + fps = max(operating_rate, frame_rate); /* In case of fps < 1 we assume 1 */ fps = max(fps >> 16, 1); @@ -73,6 +76,11 @@ int msm_vidc_get_inst_load(struct msm_vidc_inst *inst, { int load = 0; + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + if (inst->state == MSM_VIDC_OPEN || inst->state == MSM_VIDC_ERROR) goto exit; @@ -205,7 +213,7 @@ int msm_vidc_scale_buses(struct msm_vidc_inst *inst) struct v4l2_format *inp_f; struct msm_vidc_buffer *vbuf; u32 data_size = 0; - int codec = 0; + int codec = 0, frame_rate; if (!inst || !inst->core || !inst->capabilities) { d_vpr_e("%s: invalid params: %pK\n", __func__, inst); @@ -247,6 +255,7 @@ int msm_vidc_scale_buses(struct msm_vidc_inst *inst) break; } + frame_rate = inst->capabilities->cap[FRAME_RATE].value; vote_data->codec = inst->codec; vote_data->input_width = inp_f->fmt.pix_mp.width; vote_data->input_height = inp_f->fmt.pix_mp.height; @@ -262,10 +271,10 @@ int msm_vidc_scale_buses(struct msm_vidc_inst *inst) vote_data->b_frames_enabled = inst->capabilities->cap[B_FRAME].value > 0; /* scale bitrate if operating rate is larger than fps */ - if (vote_data->fps > (inst->prop.frame_rate >> 16) && - (inst->prop.frame_rate >> 16)) { + if (vote_data->fps > (frame_rate >> 16) && + (frame_rate >> 16)) { vote_data->bitrate = vote_data->bitrate / - (inst->prop.frame_rate >> 16) * vote_data->fps; + (frame_rate >> 16) * vote_data->fps; } vote_data->num_formats = 1; vote_data->color_formats[0] = v4l2_colorformat_to_driver( @@ -293,7 +302,7 @@ int msm_vidc_scale_buses(struct msm_vidc_inst *inst) vote_data->color_formats[0] = color_format; } } - vote_data->work_mode = inst->stage; + vote_data->work_mode = inst->capabilities->cap[STAGE].value; if (core->dt->sys_cache_res_set) vote_data->use_sys_cache = true; vote_data->num_vpp_pipes = core->capabilities[NUM_VPP_PIPE].value; diff --git a/driver/vidc/src/msm_vidc_v4l2.c b/driver/vidc/src/msm_vidc_v4l2.c index d5f15f22da..74fba3ef65 100644 --- a/driver/vidc/src/msm_vidc_v4l2.c +++ b/driver/vidc/src/msm_vidc_v4l2.c @@ -104,6 +104,22 @@ int msm_v4l2_g_selection(struct file* file, void* fh, return msm_vidc_g_selection((void*)vidc_inst, s); } +int msm_v4l2_s_parm(struct file *file, void *fh, + struct v4l2_streamparm *a) +{ + struct msm_vidc_inst *vidc_inst = get_vidc_inst(file, fh); + + return msm_vidc_s_param((void *)vidc_inst, a); +} + +int msm_v4l2_g_parm(struct file *file, void *fh, + struct v4l2_streamparm *a) +{ + struct msm_vidc_inst *vidc_inst = get_vidc_inst(file, fh); + + return msm_vidc_g_param((void *)vidc_inst, a); +} + int msm_v4l2_s_ctrl(struct file *file, void *fh, struct v4l2_control *a) { From 0750c2bb020b6546198955b60c9f7ef306baf744 Mon Sep 17 00:00:00 2001 From: Mihir Ganu Date: Tue, 12 Jan 2021 13:26:20 -0800 Subject: [PATCH 0059/1061] video: driver: Skip subscription/delivery when not required Avoid sending subscribe or delivery comannds to firmware when no metadata is enabled by client. Change-Id: I379aa018b676ebc9b7e327757213371dbf089d53 Signed-off-by: Mihir Ganu --- driver/vidc/src/msm_vdec.c | 6 ++++++ driver/vidc/src/msm_venc.c | 6 ++++++ driver/vidc/src/venus_hfi_response.c | 2 +- 3 files changed, 13 insertions(+), 1 deletion(-) diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index ac6ca287d6..af9f82e6f5 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -1003,6 +1003,9 @@ static int msm_vdec_subscribe_metadata(struct msm_vidc_inst *inst, } }; + if (!count) + return 0; + rc = venus_hfi_session_command(inst, HFI_CMD_SUBSCRIBE_MODE, port, @@ -1042,6 +1045,9 @@ static int msm_vdec_set_delivery_mode_metadata(struct msm_vidc_inst *inst, } }; + if (!count) + return 0; + rc = venus_hfi_session_command(inst, HFI_CMD_DELIVERY_MODE, port, diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index 09ca3ba166..3b81a8ea0c 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -659,6 +659,9 @@ static int msm_venc_metadata_delivery(struct msm_vidc_inst *inst, } }; + if (!count) + return 0; + rc = venus_hfi_session_command(inst, HFI_CMD_DELIVERY_MODE, port, @@ -703,6 +706,9 @@ static int msm_venc_metadata_subscription(struct msm_vidc_inst *inst, } }; + if (!count) + return 0; + rc = venus_hfi_session_command(inst, HFI_CMD_SUBSCRIBE_MODE, port, diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index 5bdbbed88b..29f509baaf 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -1200,7 +1200,7 @@ static int handle_session_response(struct msm_vidc_core *core, else if (packet->port == HFI_PORT_RAW) rc = queue_response_work(inst, RESP_WORK_OUTPUT_PSC, (void *)hdr, hdr->size); - goto exit; + goto exit; } else if (packet->type == HFI_CMD_BUFFER && packet->port == HFI_PORT_RAW && check_last_flag(inst, packet)) { From a972b72afe7433435a6d8bad1a8fd7eeb900614d Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Fri, 8 Jan 2021 14:25:52 -0800 Subject: [PATCH 0060/1061] Revert "video: driver: update defaults to avoid fw sync issue for enc session" This reverts commit 2ddc1435656f374ae9f4ab8dbdad5967adf4ec76. Change-Id: I6484584391963fa352ee158b11a0ef83984a5f80 --- driver/platform/waipio/src/msm_vidc_waipio.c | 7 +------ 1 file changed, 1 insertion(+), 6 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index e32e004411..3c14bad4c2 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -232,12 +232,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME, BIT(V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE) | BIT(V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME), - /* - * TODO(AS): change default to - * V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE once - * HW hang issue is fixed in FW rel 8 - */ - V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME, + V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE, V4L2_CID_MPEG_VIDEO_HEADER_MODE, HFI_PROP_SEQ_HEADER_MODE, CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, From 60bf543cff92a9d1467a1376e87872a2eac9ac7e Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Tue, 12 Jan 2021 12:48:32 -0800 Subject: [PATCH 0061/1061] video: driver: fix enc drain and change frame rate set handling - Move driver to MSM_VIDC_DRAIN state when drain command is receieved for an encoder session - Static HFI_PROP_FRAME_RATE setting to video fw handling is moved to inst database set function via msm_vidc_set_v4l2_properties to avoid enc session failure due to setting HFI_PROP_FRAME_RATE before starting video fw Change-Id: I207b4bce932c5959fe47b9cca32abd15660ce2a9 Signed-off-by: Akshata Sahukar --- driver/platform/waipio/src/msm_vidc_waipio.c | 11 ++++++++- driver/vidc/src/msm_venc.c | 24 ++++++++++++++++---- driver/vidc/src/venus_hfi.c | 6 ++--- driver/vidc/src/venus_hfi_response.c | 3 +-- 4 files changed, 33 insertions(+), 11 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index e32e004411..f697833a79 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -159,7 +159,16 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { /* ((4096 * 2304) / 256) * 60 fps */ {POWER_SAVE_MBPS, ENC, CODECS_ALL, 0, 2211840, 1, 2211840}, - {FRAME_RATE, ENC|DEC, CODECS_ALL, + {FRAME_RATE, ENC, CODECS_ALL, + (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), + 1, (DEFAULT_FPS << 16), + 0, + HFI_PROP_FRAME_RATE, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + {0}, {0}, + NULL, msm_vidc_set_q16}, + + {FRAME_RATE, DEC, CODECS_ALL, (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), 1, (DEFAULT_FPS << 16), 0, diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index 09ca3ba166..b139790eab 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -821,9 +821,15 @@ int msm_venc_process_cmd(struct msm_vidc_inst *inst, u32 cmd) 0); if (rc) return rc; + rc = msm_vidc_state_change_stop(inst); + if (rc) + return rc; } else if (cmd == V4L2_ENC_CMD_START) { if (!msm_vidc_allow_start(inst)) return -EBUSY; + rc = msm_vidc_state_change_start(inst); + if (rc) + return rc; rc = venus_hfi_session_command(inst, HFI_CMD_RESUME, INPUT_PORT, @@ -1332,7 +1338,20 @@ set_default: s_vpr_h(inst->sid, "%s: type %u value %#x\n", __func__, s_parm->type, q16_rate); - if (is_frame_rate) { + if (!is_frame_rate) { + capability->cap[OPERATING_RATE].value = q16_rate; + goto exit; + } else { + capability->cap[FRAME_RATE].value = q16_rate; + } + + /* + * In static case, frame rate is set during via + * inst database set function mentioned in + * FRAME_RATE cap id. + * In dynamic case, frame rate is set like below. + */ + if (inst->vb2q[OUTPUT_PORT].streaming) { rc = venus_hfi_session_property(inst, HFI_PROP_FRAME_RATE, HFI_HOST_FLAGS_NONE, @@ -1346,9 +1365,6 @@ set_default: __func__); goto exit; } - capability->cap[FRAME_RATE].value = q16_rate; - } else { - capability->cap[OPERATING_RATE].value = q16_rate; } exit: diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index ea5ae830a5..f3542d544f 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -2858,8 +2858,7 @@ int venus_hfi_session_command(struct msm_vidc_inst *inst, rc = hfi_create_packet(inst->packet, inst->packet_size, cmd, - (HFI_HOST_FLAGS_RESPONSE_REQUIRED | - HFI_HOST_FLAGS_INTR_REQUIRED), + HFI_HOST_FLAGS_NONE, payload_type, get_hfi_port(inst, port), core->packet_id++, @@ -2905,8 +2904,7 @@ int venus_hfi_queue_buffer(struct msm_vidc_inst *inst, rc = hfi_create_packet(inst->packet, inst->packet_size, HFI_CMD_BUFFER, - (HFI_HOST_FLAGS_RESPONSE_REQUIRED | - HFI_HOST_FLAGS_INTR_REQUIRED), + HFI_HOST_FLAGS_NONE, HFI_PAYLOAD_STRUCTURE, get_hfi_port_from_buffer_type(inst, buffer->type), core->packet_id++, diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index 5bdbbed88b..9d92b0841e 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -729,8 +729,7 @@ static int handle_session_buffer(struct msm_vidc_inst *inst, buffer = (struct hfi_buffer *)((u8 *)pkt + sizeof(struct hfi_packet)); buf_type = buffer->type; if (!is_valid_hfi_buffer_type(inst, buf_type, __func__)) { - /* TODO */ - //msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); + msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); return 0; } From 689fd02b04df8d7f0e3a8aa815b4f7bdd98d4dc8 Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Wed, 13 Jan 2021 12:25:01 -0800 Subject: [PATCH 0062/1061] video: driver: fix for codec config control fix for codec config control setting. Change-Id: I5fc65cdd99a9346323d2b61de3ef6024b33ca7f2 Signed-off-by: Darshana Patil --- driver/vidc/src/msm_vidc_driver.c | 67 +++++++++++++++++++------------ 1 file changed, 42 insertions(+), 25 deletions(-) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index bdf21e6198..762de355ea 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -534,32 +534,49 @@ bool msm_vidc_allow_s_ctrl(struct msm_vidc_inst *inst, u32 id) allow = true; goto exit; } - if (inst->state == MSM_VIDC_START || inst->state == MSM_VIDC_START_OUTPUT) { - switch (id) { - case V4L2_CID_MPEG_VIDEO_BITRATE: - case V4L2_CID_MPEG_VIDEO_GOP_SIZE: - case V4L2_CID_MPEG_VIDEO_FORCE_KEY_FRAME: - case V4L2_CID_HFLIP: - case V4L2_CID_VFLIP: - case V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP: - case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER: - case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L0_BR: - case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L1_BR: - case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L2_BR: - case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L3_BR: - case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L4_BR: - case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L5_BR: - case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L6_BR: - case V4L2_CID_MPEG_VIDC_BASELAYER_PRIORITY: - case V4L2_CID_MPEG_VIDC_USELTRFRAME: - case V4L2_CID_MPEG_VIDC_MARKLTRFRAME: - case V4L2_CID_MPEG_VIDC_VIDEO_BLUR_TYPES: - case V4L2_CID_MPEG_VIDC_VIDEO_BLUR_RESOLUTION: + if (is_decode_session(inst)) { + if (!inst->vb2q[INPUT_PORT].streaming) { allow = true; - break; - default: - allow = false; - break; + goto exit; + } + if (inst->vb2q[INPUT_PORT].streaming) { + switch (id) { + case V4L2_CID_MPEG_VIDC_CODEC_CONFIG: + allow = true; + break; + default: + allow = false; + break; + } + } + } else if (is_encode_session(inst)) { + if (inst->state == MSM_VIDC_START || inst->state == MSM_VIDC_START_OUTPUT) { + switch (id) { + case V4L2_CID_MPEG_VIDEO_BITRATE: + case V4L2_CID_MPEG_VIDEO_GOP_SIZE: + case V4L2_CID_MPEG_VIDEO_FORCE_KEY_FRAME: + case V4L2_CID_HFLIP: + case V4L2_CID_VFLIP: + case V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP: + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER: + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L0_BR: + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L1_BR: + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L2_BR: + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L3_BR: + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L4_BR: + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L5_BR: + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L6_BR: + case V4L2_CID_MPEG_VIDC_BASELAYER_PRIORITY: + case V4L2_CID_MPEG_VIDC_USELTRFRAME: + case V4L2_CID_MPEG_VIDC_MARKLTRFRAME: + case V4L2_CID_MPEG_VIDC_VIDEO_BLUR_TYPES: + case V4L2_CID_MPEG_VIDC_VIDEO_BLUR_RESOLUTION: + allow = true; + break; + default: + allow = false; + break; + } } } From 0910978cb09f16c0608a7ca8b14724e0716baefa Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Thu, 7 Jan 2021 23:00:44 -0800 Subject: [PATCH 0063/1061] video: driver: Enable CP memory protection for secure non pixel cb Revert disabling CP memory protection for secure non pixel cb to avoid firmware hang issue for enc session. Change-Id: I93260691d9504b33fc8f88a28fb81e66c9d24ce4 Signed-off-by: Akshata Sahukar --- driver/vidc/src/venus_hfi.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index f3542d544f..6be0e95747 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -1094,7 +1094,7 @@ skip_power_off: static int __protect_cp_mem(struct msm_vidc_core *core) { -#if 0 + struct tzbsp_memprot memprot; int rc = 0; struct context_bank_info *cb; @@ -1132,9 +1132,6 @@ static int __protect_cp_mem(struct msm_vidc_core *core) d_vpr_e("Failed to protect memory(%d)\n", rc); return rc; -#endif - // TODO: revert once SSG changes merged - return 0; } #if 0 // TODO static int __core_set_resource(struct msm_vidc_core *core, From bda04993162ebb9b6df46a9c73f7708d12fd33f7 Mon Sep 17 00:00:00 2001 From: Chinmay Sawarkar Date: Thu, 14 Jan 2021 18:45:40 -0800 Subject: [PATCH 0064/1061] waipio: driver: Vote max bw by default Force BW vote to MAX by default. Change-Id: I39a0686096536331546df21f1dc538fae46ac549 Signed-off-by: Chinmay Sawarkar --- driver/vidc/src/msm_vidc_power.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/driver/vidc/src/msm_vidc_power.c b/driver/vidc/src/msm_vidc_power.c index 458bafa9fd..f7d988ea0a 100644 --- a/driver/vidc/src/msm_vidc_power.c +++ b/driver/vidc/src/msm_vidc_power.c @@ -231,7 +231,7 @@ int msm_vidc_scale_buses(struct msm_vidc_inst *inst) if (!data_size) return 0; - vote_data->power_mode = VIDC_POWER_NORMAL; + vote_data->power_mode = VIDC_POWER_TURBO; if (inst->power.buffer_counter < DCVS_FTB_WINDOW) vote_data->power_mode = VIDC_POWER_TURBO; if (msm_vidc_clock_voting) From 45d8a8c80e9a516f9fa1362291f00f4edab5a5cc Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Thu, 14 Jan 2021 14:34:22 -0800 Subject: [PATCH 0065/1061] video: driver: add decoder bitstream size overwrite support add decoder bitsream size overwrite support Change-Id: Id2968c3ac7d485109a47ff7a570a1c18d74dfe43 Signed-off-by: Darshana Patil --- driver/platform/waipio/src/msm_vidc_waipio.c | 3 +++ driver/vidc/inc/msm_vidc_internal.h | 1 + driver/vidc/src/msm_vidc_buffer.c | 20 ++++++++++--------- driver/vidc/src/msm_vidc_control.c | 2 ++ .../uapi/vidc/media/v4l2_vidc_extensions.h | 2 ++ 5 files changed, 19 insertions(+), 9 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 2d6093ec21..7cde2a68b6 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -945,6 +945,9 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {CODEC_CONFIG, DEC, H264|HEVC, 0, 1, 1, 0, V4L2_CID_MPEG_VIDC_CODEC_CONFIG}, + {BITSTREAM_SIZE_OVERWRITE, DEC, CODECS_ALL, 0, INT_MAX, 1, 0, + V4L2_CID_MPEG_VIDC_MIN_BITSTREAM_SIZE_OVERWRITE}, + {META_LTR_MARK_USE, ENC, CODECS_ALL, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index e14038e643..e0bd21da9a 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -340,6 +340,7 @@ enum msm_vidc_inst_capability_type { CODED_FRAMES, BIT_DEPTH, CODEC_CONFIG, + BITSTREAM_SIZE_OVERWRITE, META_LTR_MARK_USE, META_DPB_MISR, META_OPB_MISR, diff --git a/driver/vidc/src/msm_vidc_buffer.c b/driver/vidc/src/msm_vidc_buffer.c index 1e7d427bde..979a6b1679 100644 --- a/driver/vidc/src/msm_vidc_buffer.c +++ b/driver/vidc/src/msm_vidc_buffer.c @@ -169,13 +169,22 @@ u32 msm_vidc_decoder_input_size(struct msm_vidc_inst *inst) u32 div_factor = 1; u32 base_res_mbs = NUM_MBS_4k; struct v4l2_format *f; - u32 buffer_size_limit = 0; // TODO: fix me + u32 bitstream_size_overwrite = 0; if (!inst || !inst->capabilities) { d_vpr_e("%s: invalid params\n"); return 0; } + bitstream_size_overwrite = + inst->capabilities->cap[BITSTREAM_SIZE_OVERWRITE].value; + if (bitstream_size_overwrite) { + frame_size = bitstream_size_overwrite; + s_vpr_h(inst->sid, "client configured bitstream buffer size %d\n", + frame_size); + return frame_size; + } + /* * Decoder input size calculation: * For 8k resolution, buffer size is calculated as 8k mbs / 4 and @@ -214,14 +223,7 @@ u32 msm_vidc_decoder_input_size(struct msm_vidc_inst *inst) f->fmt.pix_mp.pixelformat == V4L2_PIX_FMT_HEVC) frame_size = frame_size + (frame_size >> 2); - if (buffer_size_limit && (buffer_size_limit < frame_size)) { - frame_size = buffer_size_limit; - s_vpr_h(inst->sid, "input buffer size limited to %d\n", - frame_size); - } else { - s_vpr_h(inst->sid, "set input buffer size to %d\n", - frame_size); - } + s_vpr_h(inst->sid, "set input buffer size to %d\n", frame_size); return ALIGN(frame_size, SZ_4K); } diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 7f0654ab9c..c32611dbd9 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -169,6 +169,8 @@ static const char *msm_vidc_get_priv_ctrl_name(u32 sid, u32 control_id) return "Timestamp Metadata"; case V4L2_CID_MPEG_VIDC_METADATA_ENC_QP_METADATA: return "Encoder QP Metadata"; + case V4L2_CID_MPEG_VIDC_MIN_BITSTREAM_SIZE_OVERWRITE: + return "Bitstream Size Overwrite"; default: s_vpr_e(sid, "%s: ctrl name not available for ctrl id %#x\n", __func__, control_id); diff --git a/include/uapi/vidc/media/v4l2_vidc_extensions.h b/include/uapi/vidc/media/v4l2_vidc_extensions.h index 31e8fde888..53e09c17be 100644 --- a/include/uapi/vidc/media/v4l2_vidc_extensions.h +++ b/include/uapi/vidc/media/v4l2_vidc_extensions.h @@ -103,6 +103,8 @@ enum v4l2_mpeg_vidc_blur_types { (V4L2_CID_MPEG_VIDC_BASE + 0x21) #define V4L2_CID_MPEG_VIDC_METADATA_ENC_QP_METADATA \ (V4L2_CID_MPEG_VIDC_BASE + 0x22) +#define V4L2_CID_MPEG_VIDC_MIN_BITSTREAM_SIZE_OVERWRITE \ + (V4L2_CID_MPEG_VIDC_BASE + 0x23) enum v4l2_mpeg_vidc_metapayload_header_flags { METADATA_FLAGS_NONE = 0, From 56f8fb871d05e8364bf10e560b943bcbf65325c8 Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Fri, 15 Jan 2021 13:00:48 -0800 Subject: [PATCH 0066/1061] video: driver: move msm_media_info from uapi move msm_midia_info from uapi to core video driver folder. Change-Id: Ibe7eb898fd40958577a8b1afa46c46ea3c6a2ddf Signed-off-by: Darshana Patil --- .../uapi/vidc/media => driver/vidc/inc}/msm_media_info.h | 0 driver/vidc/src/msm_vdec.c | 2 +- driver/vidc/src/msm_venc.c | 2 +- driver/vidc/src/msm_vidc_buffer.c | 2 +- driver/vidc/src/msm_vidc_driver.c | 8 ++------ 5 files changed, 5 insertions(+), 9 deletions(-) rename {include/uapi/vidc/media => driver/vidc/inc}/msm_media_info.h (100%) diff --git a/include/uapi/vidc/media/msm_media_info.h b/driver/vidc/inc/msm_media_info.h similarity index 100% rename from include/uapi/vidc/media/msm_media_info.h rename to driver/vidc/inc/msm_media_info.h diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index af9f82e6f5..4d3dc0ed9a 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -4,7 +4,7 @@ */ #include -#include +#include "msm_media_info.h" #include #include "msm_vdec.h" diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index cea801d3a8..6968a83faa 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -4,7 +4,7 @@ */ #include -#include +#include "msm_media_info.h" #include "msm_venc.h" #include "msm_vidc_core.h" diff --git a/driver/vidc/src/msm_vidc_buffer.c b/driver/vidc/src/msm_vidc_buffer.c index 979a6b1679..e757707d2d 100644 --- a/driver/vidc/src/msm_vidc_buffer.c +++ b/driver/vidc/src/msm_vidc_buffer.c @@ -3,7 +3,7 @@ * Copyright (c) 2020, The Linux Foundation. All rights reserved. */ -#include +#include "msm_media_info.h" #include "msm_vidc_buffer.h" #include "msm_vidc_inst.h" #include "msm_vidc_core.h" diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 762de355ea..df50ff55e5 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -6,7 +6,7 @@ #include #include #include -#include +#include "msm_media_info.h" #include "msm_vidc_driver.h" #include "msm_vidc_platform.h" @@ -1529,12 +1529,8 @@ int msm_vidc_get_input_internal_buffers(struct msm_vidc_inst *inst, } core = inst->core; - /* - * TODO: Remove the hack of sending bigger buffer sizes - * once internal buffer calculations are finalised - */ buf_size = call_session_op(core, buffer_size, - inst, buffer_type) + 100000000; + inst, buffer_type); buf_count = call_session_op(core, min_count, inst, buffer_type); From 92f04d74466d8bc0e8cedab5a3c25f0cf21f0e20 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Tue, 12 Jan 2021 18:16:14 -0800 Subject: [PATCH 0067/1061] video: driver: Phase 2: Add support for advance controls Add support for some advance controls to set adjusted client set values to video fw. Mentioned below are the properties added. - HFI_PROP_LTR_COUNT - HFI_PROP_LTR_USE - HFI_PROP_LTR_MARK - HFI_PROP_IR_RANDOM_PERIOD - HFI_PROP_AUD - HFI_PROP_TIME_DELTA_BASED_RATE_CONTROL - HFI_PROP_8X8_TRANSFORM - HFI_PROP_LTR_MARK_USE_DETAILS - HFI_PROP_DEBLOCKING_MODE Change-Id: Id31e9774154556df7c66cda366913489815a2723 Signed-off-by: Akshata Sahukar --- driver/platform/waipio/src/msm_vidc_waipio.c | 121 ++-- driver/vidc/inc/msm_vidc_control.h | 19 +- driver/vidc/inc/msm_vidc_inst.h | 2 + driver/vidc/inc/msm_vidc_internal.h | 2 +- driver/vidc/src/msm_venc.c | 2 + driver/vidc/src/msm_vidc_control.c | 556 ++++++++++++++----- 6 files changed, 520 insertions(+), 182 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 7cde2a68b6..88a58aa638 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -18,6 +18,11 @@ #define DDR_TYPE_LPDDR5 0x8 #define DDR_TYPE_LPDDR5X 0x9 #define DEFAULT_VIDEO_CONCEAL_COLOR_BLACK 0x8020010 +#define MAX_LTR_FRAME_COUNT 2 +#define MAX_BASE_LAYER_PRIORITY_ID 63 +#define MIN_CHROMA_QP_OFFSET -12 +#define MAX_CHROMA_QP_OFFSET 0 +#define MAX_BITRATE 220000000 #define UBWC_CONFIG(mc, ml, hbb, bs1, bs2, bs3, bsp) \ { \ @@ -96,7 +101,6 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {FRAME_WIDTH, DEC, CODECS_ALL, 96, 8192, 1, 1920}, {FRAME_WIDTH, ENC, CODECS_ALL, 128, 8192, 1, 1920}, {LOSSLESS_FRAME_WIDTH, ENC, H264|HEVC, 128, 4096, 1, 1920}, - /* Secure usecase specific */ {SECURE_FRAME_WIDTH, ENC|DEC, CODECS_ALL, 128, 4096, 1, 1920}, {HEVC_IMAGE_FRAME_WIDTH, ENC, HEVC, 128, 512, 1, 512}, {HEIC_IMAGE_FRAME_WIDTH, ENC, HEVC, 512, 16384, 1, 16384}, @@ -215,7 +219,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_HFLIP, HFI_PROP_FLIP, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, {VFLIP, ENC, CODECS_ALL, V4L2_MPEG_MSM_VIDC_DISABLE, @@ -223,7 +227,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_VFLIP, HFI_PROP_FLIP, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, {ROTATION, ENC, CODECS_ALL, 0, 270, 90, 0, @@ -290,8 +294,8 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_CID_MPEG_VIDEO_BITRATE_MODE, HFI_PROP_RATE_CONTROL, CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, {0}, - NULL, msm_vidc_set_bitrate_mode}, + {0}, {LTR_COUNT, IR_RANDOM, TIME_DELTA_BASED_RC}, + msm_vidc_adjust_bitrate_mode, msm_vidc_set_u32_enum}, {LOSSLESS, ENC, HEVC, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, @@ -313,7 +317,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { // TODO: GOP dependencies {GOP_SIZE, ENC, CODECS_ALL, - 0, MAX_GOP, 1, 2 * DEFAULT_FPS - 1, + 0, INT_MAX, 1, 2 * DEFAULT_FPS - 1, V4L2_CID_MPEG_VIDEO_GOP_SIZE, HFI_PROP_MAX_GOP_FRAMES, CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, @@ -367,33 +371,39 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 0, 2, 1, 0, V4L2_CID_MPEG_VIDC_LTRCOUNT, HFI_PROP_LTR_COUNT, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + CAP_FLAG_OUTPUT_PORT, + {BITRATE_MODE}, {USE_LTR, MARK_LTR}, + msm_vidc_adjust_ltr_count, msm_vidc_set_u32}, {USE_LTR, ENC, H264|HEVC, 0, ((1 << MAX_LTR_FRAME_COUNT) - 1), 1, 0, V4L2_CID_MPEG_VIDC_USELTRFRAME, HFI_PROP_LTR_USE, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, - {LTR_COUNT}, - {0}}, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, + {LTR_COUNT}, {0}, + msm_vidc_adjust_use_ltr, msm_vidc_set_use_and_mark_ltr}, {MARK_LTR, ENC, H264|HEVC, 0, (MAX_LTR_FRAME_COUNT - 1), 1, 0, V4L2_CID_MPEG_VIDC_MARKLTRFRAME, HFI_PROP_LTR_MARK, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, + {LTR_COUNT}, {0}, + msm_vidc_adjust_mark_ltr, msm_vidc_set_use_and_mark_ltr}, - {BASELAYER_PRIORITY, ENC, H264|HEVC, + {BASELAYER_PRIORITY, ENC, H264, 0, MAX_BASE_LAYER_PRIORITY_ID, 1, 0, V4L2_CID_MPEG_VIDC_BASELAYER_PRIORITY, HFI_PROP_BASELAYER_PRIORITYID, CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, {IR_RANDOM, ENC, CODECS_ALL, - 0, MAX_INTRA_REFRESH_MBS, 1, 0, + 0, INT_MAX, 1, 0, V4L2_CID_MPEG_VIDC_INTRA_REFRESH_PERIOD, HFI_PROP_IR_RANDOM_PERIOD, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + CAP_FLAG_OUTPUT_PORT, + {BITRATE_MODE}, {0}, + msm_vidc_adjust_ir_random, msm_vidc_set_u32}, {AU_DELIMITER, ENC, H264|HEVC, V4L2_MPEG_MSM_VIDC_DISABLE, @@ -401,14 +411,18 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDC_AU_DELIMITER, HFI_PROP_AUD, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + {0}, {0}, + NULL, msm_vidc_set_u32}, {TIME_DELTA_BASED_RC, ENC, CODECS_ALL, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_ENABLE, V4L2_CID_MPEG_VIDC_TIME_DELTA_BASED_RC, HFI_PROP_TIME_DELTA_BASED_RATE_CONTROL, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + CAP_FLAG_OUTPUT_PORT, + {BITRATE_MODE}, {0}, + msm_vidc_adjust_delta_based_rc, msm_vidc_set_u32}, {CONTENT_ADAPTIVE_CODING, ENC, CODECS_ALL, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, @@ -688,7 +702,23 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { HFI_PROP_CABAC_SESSION}, /* H264 does not support 10 bit, PIX_FMTS would not be a Parent for this */ - {PROFILE, ENC|DEC, H264, + {PROFILE, ENC, H264, + V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE, + V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH, + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_BASELINE) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_MAIN) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_HIGH), + V4L2_MPEG_VIDEO_H264_PROFILE_HIGH, + V4L2_CID_MPEG_VIDEO_H264_PROFILE, + HFI_PROP_PROFILE, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {0}, + {ENTROPY_MODE, TRANSFORM_8X8}, + NULL, msm_vidc_set_u32_enum}, + + {PROFILE, DEC, H264, V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE, V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH, BIT(V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE) | @@ -799,17 +829,6 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {0}, NULL, msm_vidc_set_u32_enum}, - {LF_MODE, ENC, HEVC, - V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_DISABLED, - DB_HEVC_DISABLE_SLICE_BOUNDARY, - BIT(V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_DISABLED) | - BIT(V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_ENABLED) | - BIT(DB_HEVC_DISABLE_SLICE_BOUNDARY), - V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_ENABLED, - V4L2_CID_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE, - HFI_PROP_DEBLOCKING_MODE, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - {LF_MODE, ENC, H264, V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED, DB_H264_DISABLE_SLICE_BOUNDARY, @@ -819,31 +838,38 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED, V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_MODE, HFI_PROP_DEBLOCKING_MODE, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {0}, {0}, + NULL, msm_vidc_set_deblock_mode}, + + {LF_MODE, ENC, HEVC, + V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_DISABLED, + DB_HEVC_DISABLE_SLICE_BOUNDARY, + BIT(V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_DISABLED) | + BIT(V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_ENABLED) | + BIT(DB_HEVC_DISABLE_SLICE_BOUNDARY), + V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_ENABLED, + V4L2_CID_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE, + HFI_PROP_DEBLOCKING_MODE, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {0}, {0}, + NULL, msm_vidc_set_deblock_mode}, {LF_ALPHA, ENC, H264, -6, 6, 1, 0, - V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_ALPHA, - HFI_PROP_DEBLOCKING_MODE, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_ALPHA}, - {LF_BETA, ENC, HEVC, + {LF_ALPHA, ENC, HEVC, -6, 6, 1, 0, - V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2, - HFI_PROP_DEBLOCKING_MODE, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2}, {LF_BETA, ENC, H264, -6, 6, 1, 0, - V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_BETA, - HFI_PROP_DEBLOCKING_MODE, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_BETA}, - {LF_TC, ENC, HEVC, + {LF_BETA, ENC, HEVC, -6, 6, 1, 0, - V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2, - HFI_PROP_DEBLOCKING_MODE, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2}, {SLICE_MAX_BYTES, ENC, H264|HEVC, 1, MAX_BITRATE / DEFAULT_FPS / 8 / 10, @@ -883,10 +909,11 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 1, V4L2_MPEG_MSM_VIDC_ENABLE, V4L2_CID_MPEG_VIDEO_H264_8X8_TRANSFORM, HFI_PROP_8X8_TRANSFORM, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + CAP_FLAG_OUTPUT_PORT, + {PROFILE}, {0}, + msm_vidc_adjust_transform_8x8, msm_vidc_set_u32}, - /* TODO: CHROMA_QP_INDEX_OFFSET is applicable to HEVC as well */ - {CHROMA_QP_INDEX_OFFSET, ENC, H264, + {CHROMA_QP_INDEX_OFFSET, ENC, HEVC, MIN_CHROMA_QP_OFFSET, MAX_CHROMA_QP_OFFSET, 1, MAX_CHROMA_QP_OFFSET, V4L2_CID_MPEG_VIDEO_H264_CHROMA_QP_INDEX_OFFSET, @@ -929,7 +956,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { MSM_VIDC_PIPE_4, 1, MSM_VIDC_PIPE_4}, {POC, DEC, H264, 0, 18, 1, 1}, - {QUALITY_MODE, DEC|ENC, CODECS_ALL, + {QUALITY_MODE, ENC, CODECS_ALL, MSM_VIDC_MAX_QUALITY_MODE, MSM_VIDC_POWER_SAVE_MODE, 1, MSM_VIDC_MAX_QUALITY_MODE}, diff --git a/driver/vidc/inc/msm_vidc_control.h b/driver/vidc/inc/msm_vidc_control.h index 38d8902faa..005b63f8db 100644 --- a/driver/vidc/inc/msm_vidc_control.h +++ b/driver/vidc/inc/msm_vidc_control.h @@ -10,14 +10,6 @@ #include "msm_vidc_inst.h" #include "msm_vidc_internal.h" -#define MAX_GOP 0xFFFFFFF -#define MAX_INTRA_REFRESH_MBS ((7680 * 4320) >> 8) -#define MAX_BASE_LAYER_PRIORITY_ID 63 -#define MIN_CHROMA_QP_OFFSET -12 -#define MAX_CHROMA_QP_OFFSET 12 -#define MAX_LTR_FRAME_COUNT 10 -#define MAX_BITRATE 220000000 - enum msm_vidc_ctrl_list_type { CHILD_LIST = BIT(0), FW_LIST = BIT(1), @@ -27,18 +19,27 @@ int msm_vidc_ctrl_init(struct msm_vidc_inst *inst); int msm_vidc_ctrl_deinit(struct msm_vidc_inst *inst); int msm_v4l2_op_s_ctrl(struct v4l2_ctrl *ctrl); int msm_vidc_adjust_bitrate(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_bitrate_mode(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_entropy_mode(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_profile(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_ltr_count(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_use_ltr(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_mark_ltr(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_ir_random(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_delta_based_rc(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_transform_8x8(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_v4l2_properties(struct msm_vidc_inst *inst); + int msm_vidc_set_header_mode(void *instance, enum msm_vidc_inst_capability_type cap_id); -int msm_vidc_set_bitrate_mode(void *instance, +int msm_vidc_set_deblock_mode(void *instance, enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_u32(void *instance, enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_u32_enum(void *instance, enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_use_and_mark_ltr(void *instance, + enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_s32(void *instance, enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_array(void *instance, diff --git a/driver/vidc/inc/msm_vidc_inst.h b/driver/vidc/inc/msm_vidc_inst.h index 65440d0168..039d2437c9 100644 --- a/driver/vidc/inc/msm_vidc_inst.h +++ b/driver/vidc/inc/msm_vidc_inst.h @@ -7,6 +7,7 @@ #define _MSM_VIDC_INST_H_ #include "msm_vidc_internal.h" +#include "hfi_property.h" struct msm_vidc_inst; @@ -101,6 +102,7 @@ struct msm_vidc_inst { u32 num_ctrls; struct msm_vidc_inst_cap_entry children; struct msm_vidc_inst_cap_entry firmware; + enum hfi_rate_control hfi_rc_type; bool request; struct vb2_queue vb2q[MAX_PORT]; struct msm_vidc_rectangle crop; diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index e0bd21da9a..00edecb24b 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -322,7 +322,6 @@ enum msm_vidc_inst_capability_type { LF_MODE, LF_ALPHA, LF_BETA, - LF_TC, SLICE_MAX_BYTES, SLICE_MAX_MB, SLICE_MODE, @@ -366,6 +365,7 @@ enum msm_vidc_inst_capability_flags { CAP_FLAG_MENU = BIT(2), CAP_FLAG_INPUT_PORT = BIT(3), CAP_FLAG_OUTPUT_PORT = BIT(4), + CAP_FLAG_CLIENT_SET = BIT(5), }; struct msm_vidc_inst_cap { diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index 6968a83faa..dcf2ce2dcb 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -1549,6 +1549,8 @@ int msm_venc_inst_init(struct msm_vidc_inst *inst) inst->buffers.input_meta.actual_count = inst->buffers.input.actual_count; inst->buffers.input_meta.size = f->fmt.meta.buffersize; + inst->hfi_rc_type = HFI_RC_VBR_CFR; + rc = msm_venc_codec_change(inst, inst->fmts[OUTPUT_PORT].fmt.pix_mp.pixelformat); diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index c32611dbd9..fe9ce5bc41 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -274,6 +274,57 @@ static int msm_vidc_add_children(struct msm_vidc_inst *inst, return rc; } +static bool is_parent_available(struct msm_vidc_inst* inst, + u32 cap, u32 check_parent) +{ + int i = 0; + u32 cap_parent; + + while (i < MAX_CAP_PARENTS && + inst->capabilities->cap[cap].parents[i]) { + cap_parent = inst->capabilities->cap[cap].parents[i]; + if (cap_parent == check_parent) { + return true; + } + i++; + } + return false; +} + +static int msm_vidc_update_cap_value(struct msm_vidc_inst* inst, u32 cap, + s32 adjusted_val, const char *func) +{ + if (inst->capabilities->cap[cap].value != adjusted_val) + s_vpr_h(inst->sid, + "%s: updated database value from %#x to %#x\n", + func, inst->capabilities->cap[cap].value, + adjusted_val); + + inst->capabilities->cap[cap].value = adjusted_val; + + return 0; +} + +static int msm_vidc_get_parent_value(struct msm_vidc_inst* inst, + u32 cap, u32 parent, s32 *value, const char *func) +{ + int rc = 0; + + if (is_parent_available(inst, cap, parent)) { + if (parent == BITRATE_MODE) + *value = inst->hfi_rc_type; + else + *value = inst->capabilities->cap[parent].value; + } else { + s_vpr_e(inst->sid, + "%s: missing parent %d, please correct database\n", + func, parent); + rc = -EINVAL; + } + + return rc; +} + static int msm_vidc_adjust_property(struct msm_vidc_inst *inst, enum msm_vidc_inst_capability_type cap_id) { @@ -319,7 +370,6 @@ static int msm_vidc_adjust_dynamic_property(struct msm_vidc_inst *inst, s32 prev_value; capability = inst->capabilities; - /* * ctrl is NULL for children adjustment calls * When a dynamic control having children is adjusted, check if dynamic @@ -343,7 +393,6 @@ static int msm_vidc_adjust_dynamic_property(struct msm_vidc_inst *inst, __func__, capability->cap[cap_id].cap); return -EINVAL; } - prev_value = capability->cap[cap_id].value; if (capability->cap[cap_id].adjust) { @@ -572,6 +621,7 @@ int msm_v4l2_op_s_ctrl(struct v4l2_ctrl *ctrl) return -EINVAL; } + capability->cap[cap_id].flags |= CAP_FLAG_CLIENT_SET; /* Static setting */ if (!inst->vb2q[OUTPUT_PORT].streaming) { capability->cap[cap_id].value = ctrl->val; @@ -620,7 +670,6 @@ exit: int msm_vidc_adjust_entropy_mode(void *instance, struct v4l2_ctrl *ctrl) { - int rc = 0; struct msm_vidc_inst_capability *capability; s32 adjusted_value; struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; @@ -630,14 +679,11 @@ int msm_vidc_adjust_entropy_mode(void *instance, struct v4l2_ctrl *ctrl) d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - capability = inst->capabilities; /* ctrl is always NULL in streamon case */ - if (ctrl) - adjusted_value = ctrl->val; - else - adjusted_value = capability->cap[ENTROPY_MODE].value; + adjusted_value = ctrl ? ctrl->val : + capability->cap[ENTROPY_MODE].value; if (inst->codec != MSM_VIDC_H264) { s_vpr_e(inst->sid, @@ -646,28 +692,73 @@ int msm_vidc_adjust_entropy_mode(void *instance, struct v4l2_ctrl *ctrl) return 0; } - profile = capability->cap[PROFILE].value; + if (msm_vidc_get_parent_value(inst, ENTROPY_MODE, + PROFILE, &profile, __func__)) + return -EINVAL; if (profile == V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE || profile == V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_BASELINE) adjusted_value = V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC; - if (capability->cap[ENTROPY_MODE].value != adjusted_value) { - s_vpr_h(inst->sid, "%s: updated from %#x to adjusted %#x\n", __func__, - capability->cap[ENTROPY_MODE].value, adjusted_value); - capability->cap[ENTROPY_MODE].value = adjusted_value; + msm_vidc_update_cap_value(inst, ENTROPY_MODE, + adjusted_value, __func__); + + return 0; +} + +int msm_vidc_adjust_bitrate_mode(void *instance, struct v4l2_ctrl *ctrl) +{ + struct msm_vidc_inst_capability *capability; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + int lossless, frame_rc, bitrate_mode, frame_skip; + u32 hfi_value = 0; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + bitrate_mode = capability->cap[BITRATE_MODE].value; + lossless = capability->cap[LOSSLESS].value; + frame_rc = capability->cap[FRAME_RC_ENABLE].value; + frame_skip = capability->cap[FRAME_SKIP_MODE].value; + + if (lossless) { + hfi_value = HFI_RC_LOSSLESS; + goto update; } - return rc; + if (!frame_rc) { + hfi_value = HFI_RC_OFF; + goto update; + } + + if (bitrate_mode == V4L2_MPEG_VIDEO_BITRATE_MODE_VBR) { + hfi_value = HFI_RC_VBR_CFR; + } else if (bitrate_mode == V4L2_MPEG_VIDEO_BITRATE_MODE_CBR) { + if (frame_skip) + hfi_value = HFI_RC_CBR_VFR; + else + hfi_value = HFI_RC_CBR_CFR; + }/* TODO: CQ mode + else if (bitrate_mode == CQ) { + hfi_value = HFI_RC_CQ; + } + */ + +update: + inst->hfi_rc_type = hfi_value; + s_vpr_h(inst->sid, "%s: hfi rc type: %#x\n", + __func__, inst->hfi_rc_type); + + return 0; } int msm_vidc_adjust_profile(void *instance, struct v4l2_ctrl *ctrl) { - int rc = 0; - int i = 0; struct msm_vidc_inst_capability *capability; s32 adjusted_value; - enum msm_vidc_inst_capability_type parent_id; struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; s32 pix_fmt = -1; @@ -675,41 +766,17 @@ int msm_vidc_adjust_profile(void *instance, struct v4l2_ctrl *ctrl) d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - capability = inst->capabilities; - /* ctrl is always NULL in streamon case */ - if (ctrl) - adjusted_value = ctrl->val; - else - adjusted_value = capability->cap[PROFILE].value; - - /* TODO(AS): Create a utility for this while loop and add - * detailed comments within for utility functionality - */ - while (i < MAX_CAP_PARENTS && - capability->cap[PROFILE].parents[i]) { - parent_id = capability->cap[PROFILE].parents[i]; - if (parent_id == PIX_FMTS) { - pix_fmt = capability->cap[PIX_FMTS].value; - } - else - s_vpr_e(inst->sid, - "%s: invalid parent %d\n", - __func__, parent_id); - i++; - } + adjusted_value = ctrl ? ctrl->val : capability->cap[PROFILE].value; /* PIX_FMTS dependency is common across all chipsets. * Hence, PIX_FMTS must be specified as Parent for HEVC profile. * Otherwise it would be a database error that should be fixed. */ - if (pix_fmt == -1) { - s_vpr_e(inst->sid, - "%s: missing parent: %d, please correct database\n", - __func__, PIX_FMTS); + if (msm_vidc_get_parent_value(inst, PROFILE, PIX_FMTS, + &pix_fmt, __func__)) return -EINVAL; - } /* 10 bit profile for 10 bit color format */ if (pix_fmt == MSM_VIDC_FMT_TP10C || @@ -721,23 +788,16 @@ int msm_vidc_adjust_profile(void *instance, struct v4l2_ctrl *ctrl) adjusted_value = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN; } - if (capability->cap[PROFILE].value != adjusted_value) { - s_vpr_h(inst->sid, - "%s: updated from %#x to adjusted %#x\n", __func__, - capability->cap[PROFILE].value, adjusted_value); - capability->cap[PROFILE].value = adjusted_value; - } + msm_vidc_update_cap_value(inst, PROFILE, + adjusted_value, __func__); - return rc; + return 0; } int msm_vidc_adjust_ltr_count(void *instance, struct v4l2_ctrl *ctrl) { - int rc = 0; - int i = 0; struct msm_vidc_inst_capability *capability; s32 adjusted_value; - enum msm_vidc_inst_capability_type parent_id; struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; s32 rc_type = -1; @@ -747,32 +807,188 @@ int msm_vidc_adjust_ltr_count(void *instance, struct v4l2_ctrl *ctrl) } capability = inst->capabilities; - if (ctrl) - adjusted_value = ctrl->val; - else - adjusted_value = capability->cap[LTR_COUNT].value; + adjusted_value = ctrl ? ctrl->val : capability->cap[LTR_COUNT].value; - /* check parents and adjust cabac session value */ - while (i < MAX_CAP_PARENTS && - capability->cap[LTR_COUNT].parents[i]) { - parent_id = capability->cap[LTR_COUNT].parents[i]; - i++; - } + if (msm_vidc_get_parent_value(inst, LTR_COUNT, BITRATE_MODE, + &rc_type, __func__)) + return -EINVAL; - if (!(rc_type == V4L2_MPEG_VIDEO_BITRATE_MODE_CBR - /* TODO(AS): remove comment after below rc modes are upstreamed - || rc_type == RATE_CONTROL_OFF || - || rc_tpe == V4L2_MPEG_VIDEO_BITRATE_MODE_CBR_VFR - */)) + if (rc_type != HFI_RC_OFF && + rc_type != HFI_RC_CBR_CFR && + rc_type != HFI_RC_CBR_VFR) adjusted_value = 0; - if (capability->cap[LTR_COUNT].value != adjusted_value) { - s_vpr_h(inst->sid, "%s: adjusted from %#x to %#x\n", __func__, - capability->cap[LTR_COUNT].value, adjusted_value); - capability->cap[LTR_COUNT].value = adjusted_value; + msm_vidc_update_cap_value(inst, LTR_COUNT, + adjusted_value, __func__); + + return 0; +} + +int msm_vidc_adjust_use_ltr(void *instance, struct v4l2_ctrl *ctrl) +{ + struct msm_vidc_inst_capability *capability; + s32 adjusted_value; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + s32 ltr_count = -1; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + adjusted_value = ctrl ? ctrl->val : capability->cap[USE_LTR].value; + + if (msm_vidc_get_parent_value(inst, USE_LTR, LTR_COUNT, + <r_count, __func__)) + return -EINVAL; + + if (!ltr_count) { + adjusted_value = 0; + } else if (adjusted_value <= 0 || + adjusted_value >= (1 << ltr_count)) { + /* USE_LTR value should be > 0 and < (2 ^ LTR_COUNT) */ + s_vpr_e(inst->sid, "%s: invalid value %d\n", + __func__, adjusted_value); + return -EINVAL; } - return rc; + /* USE_LTR value is a bitmask value */ + msm_vidc_update_cap_value(inst, USE_LTR, + adjusted_value, __func__); + + return 0; +} + +int msm_vidc_adjust_mark_ltr(void *instance, struct v4l2_ctrl *ctrl) +{ + struct msm_vidc_inst_capability *capability; + s32 adjusted_value; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + s32 ltr_count = -1; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + adjusted_value = ctrl ? ctrl->val : capability->cap[MARK_LTR].value; + + if (msm_vidc_get_parent_value(inst, MARK_LTR, LTR_COUNT, + <r_count, __func__)) + return -EINVAL; + + if (!ltr_count) { + adjusted_value = 0; + } else if (adjusted_value < 0 || + adjusted_value > (ltr_count - 1)) { + /* MARK_LTR value should be > 0 and <= (LTR_COUNT - 1) */ + s_vpr_e(inst->sid, "%s: invalid value %d\n", + __func__, adjusted_value); + return -EINVAL; + } + + msm_vidc_update_cap_value(inst, MARK_LTR, + adjusted_value, __func__); + + return 0; +} + +int msm_vidc_adjust_ir_random(void *instance, struct v4l2_ctrl *ctrl) +{ + struct msm_vidc_inst_capability *capability; + s32 adjusted_value; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + adjusted_value = ctrl ? ctrl->val : capability->cap[IR_RANDOM].value; + + /* + * BITRATE_MODE dependency is NOT common across all chipsets. + * Hence, do not return error if not specified as one of the parent. + */ + if (is_parent_available(inst, IR_RANDOM, BITRATE_MODE) && + inst->hfi_rc_type != HFI_RC_CBR_CFR && + inst->hfi_rc_type != HFI_RC_CBR_VFR) + adjusted_value = 0; + + msm_vidc_update_cap_value(inst, IR_RANDOM, + adjusted_value, __func__); + + return 0; +} + +int msm_vidc_adjust_delta_based_rc(void *instance, struct v4l2_ctrl *ctrl) +{ + struct msm_vidc_inst_capability *capability; + s32 adjusted_value; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + s32 rc_type = -1; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + adjusted_value = ctrl ? ctrl->val : + capability->cap[TIME_DELTA_BASED_RC].value; + + if (msm_vidc_get_parent_value(inst, TIME_DELTA_BASED_RC, + BITRATE_MODE, &rc_type, __func__)) + return -EINVAL; + + if (rc_type == HFI_RC_OFF || + rc_type == HFI_RC_CQ) + adjusted_value = 0; + + msm_vidc_update_cap_value(inst, TIME_DELTA_BASED_RC, + adjusted_value, __func__); + + return 0; +} + +int msm_vidc_adjust_transform_8x8(void *instance, struct v4l2_ctrl *ctrl) +{ + struct msm_vidc_inst_capability *capability; + s32 adjusted_value; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + s32 profile = -1; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + adjusted_value = ctrl ? ctrl->val : + capability->cap[TRANSFORM_8X8].value; + + if (inst->codec != MSM_VIDC_H264) { + s_vpr_e(inst->sid, + "%s: incorrect entry in database. fix the database\n", + __func__); + return 0; + } + + if (msm_vidc_get_parent_value(inst, TRANSFORM_8X8, + PROFILE, &profile, __func__)) + return -EINVAL; + + if (profile != V4L2_MPEG_VIDEO_H264_PROFILE_HIGH && + profile != V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH) + adjusted_value = V4L2_MPEG_MSM_VIDC_DISABLE; + + msm_vidc_update_cap_value(inst, TRANSFORM_8X8, + adjusted_value, __func__); + + return 0; } /* @@ -830,56 +1046,6 @@ exit: return rc; } -int msm_vidc_set_bitrate_mode(void *instance, - enum msm_vidc_inst_capability_type cap_id) -{ - int rc = 0; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - int lossless, frame_rc, bitrate_mode, frame_skip; - u32 hfi_value; - struct msm_vidc_inst_capability *capability; - - if (!inst || !inst->capabilities) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - capability = inst->capabilities; - - bitrate_mode = capability->cap[cap_id].value; - lossless = capability->cap[LOSSLESS].value; - frame_rc = capability->cap[FRAME_RC_ENABLE].value; - frame_skip = capability->cap[FRAME_SKIP_MODE].value; - - if (lossless) { - hfi_value = HFI_RC_LOSSLESS; - goto set; - } - - if (!frame_rc) { - hfi_value = HFI_RC_OFF; - goto set; - } - - if (bitrate_mode == V4L2_MPEG_VIDEO_BITRATE_MODE_VBR) { - hfi_value = HFI_RC_VBR_CFR; - } else if (bitrate_mode == V4L2_MPEG_VIDEO_BITRATE_MODE_CBR) { - if (frame_skip) - hfi_value = HFI_RC_CBR_VFR; - else - hfi_value = HFI_RC_CBR_CFR; - }/* TODO: CQ mode - else if (bitrate_mode == CQ) { - hfi_value = HFI_RC_CQ; - } - */ - -set: - rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32_ENUM, - &hfi_value, sizeof(u32), __func__); - - return rc; -} - int msm_vidc_set_header_mode(void *instance, enum msm_vidc_inst_capability_type cap_id) { @@ -918,6 +1084,92 @@ int msm_vidc_set_header_mode(void *instance, return rc; } +int msm_vidc_set_deblock_mode(void *instance, + enum msm_vidc_inst_capability_type cap_id) +{ + int rc = 0; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + s32 alpha = 0, beta = 0; + u32 lf_mode, hfi_value = 0, lf_offset = 12; + struct msm_vidc_inst_capability *capability; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + rc = msm_vidc_v4l2_to_hfi_enum(inst, LF_MODE, &lf_mode); + if (rc) + return -EINVAL; + + /* + * TODO: Revisit once s32 packing problem is fixed in hfi interface. + * For now, using offset value as 6 to shift alpha, beta ranges + * to (0 to 12) from (-6 to 6) + */ + beta = inst->capabilities->cap[LF_BETA].value + lf_offset; + alpha = inst->capabilities->cap[LF_ALPHA].value + lf_offset; + + hfi_value = (alpha << 16) | (beta << 8) | lf_mode; + rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_32_PACKED, + &hfi_value, sizeof(u32), __func__); + + return rc; +} + +int msm_vidc_set_use_and_mark_ltr(void *instance, + enum msm_vidc_inst_capability_type cap_id) +{ + int rc = 0; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; + u32 hfi_value = 0; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (!inst->capabilities->cap[LTR_COUNT].value) + return 0; + + hfi_value = inst->capabilities->cap[cap_id].value; + + rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32, + &hfi_value, sizeof(u32), __func__); + + return rc; +} + +/* TODO +int msm_vidc_set_flip(void *instance, + enum msm_vidc_inst_capability_type cap_id) +{ + int rc = 0; + u32 hflip, vflip, hfi_value = HFI_DISABLE_FLIP; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + hflip = inst->capabilities->cap[HFLIP].value; + vflip = inst->capabilities->cap[VFLIP].value; + + if (hflip) + hfi_value |= HFI_HORIZONTAL_FLIP; + + if (vflip) + hfi_value |= HFI_VERTICAL_FLIP; + + rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32_ENUM, + &hfi_value, sizeof(u32), __func__); + + return rc; +} +*/ + int msm_vidc_set_q16(void *instance, enum msm_vidc_inst_capability_type cap_id) { @@ -1000,7 +1252,7 @@ int msm_vidc_set_s32(void *instance, hfi_value = inst->capabilities->cap[cap_id].value; rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_S32, - &hfi_value, sizeof(u32), __func__); + &hfi_value, sizeof(s32), __func__); return rc; } @@ -1125,6 +1377,9 @@ int msm_vidc_v4l2_to_hfi_enum(struct msm_vidc_inst *inst, struct msm_vidc_inst_capability *capability = inst->capabilities; switch (capability->cap[cap_id].v4l2_id) { + case V4L2_CID_MPEG_VIDEO_BITRATE_MODE: + *value = inst->hfi_rc_type; + return 0; case V4L2_CID_MPEG_VIDEO_HEVC_PROFILE: case V4L2_CID_MPEG_VIDEO_H264_PROFILE: case V4L2_CID_MPEG_VIDEO_VP9_PROFILE: @@ -1148,6 +1403,57 @@ int msm_vidc_v4l2_to_hfi_enum(struct msm_vidc_inst *inst, goto set_default; } return 0; + case V4L2_CID_ROTATE: + switch (capability->cap[cap_id].value) { + case 0: + *value = HFI_ROTATION_NONE; + break; + case 90: + *value = HFI_ROTATION_90; + break; + case 180: + *value = HFI_ROTATION_180; + break; + case 270: + *value = HFI_ROTATION_270; + break; + default: + *value = HFI_ROTATION_NONE; + goto set_default; + } + return 0; + case V4L2_CID_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE: + switch (capability->cap[cap_id].value) { + case V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_ENABLED: + *value = HFI_DEBLOCK_ALL_BOUNDARY; + break; + case V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_DISABLED: + *value = HFI_DEBLOCK_DISABLE; + break; + case DB_HEVC_DISABLE_SLICE_BOUNDARY: + *value = HFI_DEBLOCK_DISABLE_AT_SLICE_BOUNDARY; + break; + default: + *value = HFI_DEBLOCK_ALL_BOUNDARY; + goto set_default; + } + return 0; + case V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_MODE: + switch (capability->cap[cap_id].value) { + case V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED: + *value = HFI_DEBLOCK_ALL_BOUNDARY; + break; + case V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_DISABLED: + *value = HFI_DEBLOCK_DISABLE; + break; + case DB_H264_DISABLE_SLICE_BOUNDARY: + *value = HFI_DEBLOCK_DISABLE_AT_SLICE_BOUNDARY; + break; + default: + *value = HFI_DEBLOCK_ALL_BOUNDARY; + goto set_default; + } + return 0; default: s_vpr_e(inst->sid, "%s: mapping not specified for ctrl_id: %#x\n", From 39e830e7e37fb9fa87581f292df4327b8d3b1d50 Mon Sep 17 00:00:00 2001 From: Maheshwar Ajja Date: Tue, 5 Jan 2021 00:27:57 -0800 Subject: [PATCH 0068/1061] video: driver: kill session and core deinit support Add below support - kill session in case of errors - core deinit in case of timeout errors - flush buffers in streamoff - decide supported colorformats based on bitdepth and interlace info - print level based logs Change-Id: I45b9b0eae4220a818de23308da8802a9e12ae255 Signed-off-by: Maheshwar Ajja --- driver/platform/waipio/src/msm_vidc_waipio.c | 6 +- driver/variant/iris2/src/msm_vidc_iris2.c | 4 +- driver/vidc/inc/msm_vidc_core.h | 1 - driver/vidc/inc/msm_vidc_debug.h | 15 +- driver/vidc/inc/msm_vidc_driver.h | 37 ++- driver/vidc/inc/msm_vidc_internal.h | 4 + driver/vidc/src/msm_vdec.c | 35 ++- driver/vidc/src/msm_vidc.c | 13 +- driver/vidc/src/msm_vidc_debug.c | 19 +- driver/vidc/src/msm_vidc_driver.c | 228 ++++++++++++++++--- driver/vidc/src/msm_vidc_power.c | 6 +- driver/vidc/src/msm_vidc_probe.c | 4 +- driver/vidc/src/msm_vidc_v4l2.c | 2 +- driver/vidc/src/venus_hfi.c | 114 ++++++++-- driver/vidc/src/venus_hfi_response.c | 13 +- 15 files changed, 403 insertions(+), 98 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 2d6093ec21..2499a7357b 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -934,11 +934,13 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { MSM_VIDC_POWER_SAVE_MODE, 1, MSM_VIDC_MAX_QUALITY_MODE}, - {CODED_FRAMES, DEC, CODECS_ALL, 0, 1, 1, 0, + {CODED_FRAMES, DEC, CODECS_ALL, + CODED_FRAMES_MBS_ONLY, CODED_FRAMES_ADAPTIVE_FIELDS, + 1, CODED_FRAMES_MBS_ONLY, 0, HFI_PROP_CODED_FRAMES}, - {BIT_DEPTH, DEC, CODECS_ALL, 8 << 16 | 8, 10 << 16 | 10, 1, 8 << 16 | 8, + {BIT_DEPTH, DEC, CODECS_ALL, BIT_DEPTH_8, BIT_DEPTH_10, 1, BIT_DEPTH_8, 0, HFI_PROP_LUMA_CHROMA_BIT_DEPTH}, diff --git a/driver/variant/iris2/src/msm_vidc_iris2.c b/driver/variant/iris2/src/msm_vidc_iris2.c index 6eca81b88d..7bb1c07d4d 100644 --- a/driver/variant/iris2/src/msm_vidc_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_iris2.c @@ -367,8 +367,10 @@ static int __watchdog_iris2(struct msm_vidc_core *vidc_core, u32 intr_status) return -EINVAL; } - if (intr_status & WRAPPER_INTR_STATUS_A2HWD_BMSK_IRIS2) + if (intr_status & WRAPPER_INTR_STATUS_A2HWD_BMSK_IRIS2) { + d_vpr_e("%s: received watchdog interrupt\n", __func__); rc = 1; + } return rc; } diff --git a/driver/vidc/inc/msm_vidc_core.h b/driver/vidc/inc/msm_vidc_core.h index 140b57985b..8ad1e64388 100644 --- a/driver/vidc/inc/msm_vidc_core.h +++ b/driver/vidc/inc/msm_vidc_core.h @@ -57,7 +57,6 @@ struct msm_vidc_core_power { enum msm_vidc_core_state { MSM_VIDC_CORE_DEINIT = 0, MSM_VIDC_CORE_INIT = 1, - MSM_VIDC_CORE_ERROR = 2, }; struct msm_vidc_core { diff --git a/driver/vidc/inc/msm_vidc_debug.h b/driver/vidc/inc/msm_vidc_debug.h index 2a179c6ab8..a929a773cd 100644 --- a/driver/vidc/inc/msm_vidc_debug.h +++ b/driver/vidc/inc/msm_vidc_debug.h @@ -56,11 +56,13 @@ enum vidc_msg_prio { #define dprintk(__level, sid, __fmt, ...) \ do { \ - pr_err(VIDC_DBG_TAG __fmt, \ - "level", \ - sid, \ - "codec", \ - ##__VA_ARGS__); \ + if (msm_vidc_debug & __level) { \ + pr_err(VIDC_DBG_TAG __fmt, \ + level_str(__level), \ + sid, \ + "codec", \ + ##__VA_ARGS__); \ + } \ } while (0) #define s_vpr_e(sid, __fmt, ...) dprintk(VIDC_ERR, sid, __fmt, ##__VA_ARGS__) @@ -99,4 +101,7 @@ enum vidc_msg_prio { do { if (value) \ d_vpr_e("BugOn"); \ } while (0) + +const char *level_str(u32 level); + #endif diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 38798323e3..4c40413648 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -114,7 +114,15 @@ static inline bool is_linear_colorformat(enum msm_vidc_colorformat_type colorfor { return colorformat == MSM_VIDC_FMT_NV12 || colorformat == MSM_VIDC_FMT_NV21 || - colorformat == MSM_VIDC_FMT_P010; + colorformat == MSM_VIDC_FMT_P010 || + colorformat == MSM_VIDC_FMT_RGBA8888; +} + +static inline bool is_ubwc_colorformat(enum msm_vidc_colorformat_type colorformat) +{ + return colorformat == MSM_VIDC_FMT_NV12C || + colorformat == MSM_VIDC_FMT_TP10C || + colorformat == MSM_VIDC_FMT_RGBA8888C; } static inline bool is_10bit_colorformat(enum msm_vidc_colorformat_type colorformat) @@ -123,6 +131,15 @@ static inline bool is_10bit_colorformat(enum msm_vidc_colorformat_type colorform colorformat == MSM_VIDC_FMT_TP10C; } +static inline bool is_8bit_colorformat(enum msm_vidc_colorformat_type colorformat) +{ + return colorformat == MSM_VIDC_FMT_NV12 || + colorformat == MSM_VIDC_FMT_NV12C || + colorformat == MSM_VIDC_FMT_NV21 || + colorformat == MSM_VIDC_FMT_RGBA8888 || + colorformat == MSM_VIDC_FMT_RGBA8888C; +} + static inline bool is_secondary_output_mode(struct msm_vidc_inst *inst) { return false; // TODO: inst->stream_output_mode == HAL_VIDEO_DECODER_SECONDARY; @@ -161,6 +178,11 @@ static inline bool is_active_session(u64 prev, u64 curr) MSM_VIDC_SESSION_INACTIVE_THRESHOLD_MS); } +static inline bool is_session_error(struct msm_vidc_inst* inst) +{ + return inst->state == MSM_VIDC_ERROR; +} + void print_vidc_buffer(u32 tag, const char *str, struct msm_vidc_inst *inst, struct msm_vidc_buffer *vbuf); void print_vb2_buffer(const char *str, struct msm_vidc_inst *inst, @@ -179,7 +201,7 @@ int v4l2_type_to_driver_port(struct msm_vidc_inst *inst, u32 type, const char *func); const char *state_name(enum msm_vidc_inst_state state); int msm_vidc_change_inst_state(struct msm_vidc_inst *inst, - enum msm_vidc_inst_state state, const char *func); + enum msm_vidc_inst_state request_state, const char *func); int msm_vidc_get_input_internal_buffers(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type buffer_type); int msm_vidc_create_internal_buffers(struct msm_vidc_inst *inst, @@ -199,9 +221,13 @@ int msm_vidc_session_streamon(struct msm_vidc_inst *inst, int msm_vidc_session_streamoff(struct msm_vidc_inst *inst, enum msm_vidc_port_type port); int msm_vidc_session_close(struct msm_vidc_inst *inst); +int msm_vidc_kill_session(struct msm_vidc_inst* inst); int msm_vidc_get_inst_capability(struct msm_vidc_inst *inst); +int msm_vidc_change_core_state(struct msm_vidc_core *core, + enum msm_vidc_core_state request_state, const char *func); int msm_vidc_core_init(struct msm_vidc_core *core); int msm_vidc_core_deinit(struct msm_vidc_core *core); +int msm_vidc_core_timeout(struct msm_vidc_core *core); int msm_vidc_smmu_fault_handler(struct iommu_domain *domain, struct device *dev, unsigned long iova, int flags, void *data); int msm_vidc_trigger_ssr(struct msm_vidc_core *core, @@ -236,6 +262,8 @@ int msm_vidc_queue_buffer(struct msm_vidc_inst *inst, struct vb2_buffer *vb2); int msm_vidc_destroy_internal_buffer(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buffer); void msm_vidc_destroy_buffers(struct msm_vidc_inst *inst); +int msm_vidc_flush_buffers(struct msm_vidc_inst* inst, + enum msm_vidc_buffer_type type); struct msm_vidc_buffer *get_meta_buffer(struct msm_vidc_inst *inst, struct msm_vidc_buffer *vbuf); struct msm_vidc_inst *get_inst_ref(struct msm_vidc_core *core, @@ -261,10 +289,13 @@ int msm_vidc_state_change_input_psc(struct msm_vidc_inst *inst); int msm_vidc_state_change_last_flag(struct msm_vidc_inst *inst); int msm_vidc_get_mbs_per_frame(struct msm_vidc_inst *inst); int msm_vidc_get_fps(struct msm_vidc_inst *inst); -int msm_vidc_num_queued_bufs(struct msm_vidc_inst *inst, u32 type); +int msm_vidc_num_buffers(struct msm_vidc_inst *inst, + enum msm_vidc_buffer_type type, enum msm_vidc_buffer_attributes attr); void core_lock(struct msm_vidc_core *core, const char *function); void core_unlock(struct msm_vidc_core *core, const char *function); +bool core_lock_check(struct msm_vidc_core *core, const char *function); void inst_lock(struct msm_vidc_inst *inst, const char *function); void inst_unlock(struct msm_vidc_inst *inst, const char *function); +bool inst_lock_check(struct msm_vidc_inst *inst, const char *function); #endif // _MSM_VIDC_DRIVER_H_ diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index e14038e643..12b56181e2 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -43,6 +43,10 @@ #define DEFAULT_BITSTREM_ALIGNMENT 16 #define H265_BITSTREM_ALIGNMENT 32 #define DEFAULT_MAX_HOST_BUF_COUNT 32 +#define BIT_DEPTH_8 (8 << 16 | 8) +#define BIT_DEPTH_10 (10 << 16 | 10) +#define CODED_FRAMES_MBS_ONLY HFI_BITMASK_FRAME_MBS_ONLY_FLAG +#define CODED_FRAMES_ADAPTIVE_FIELDS HFI_BITMASK_MB_ADAPTIVE_FRAME_FIELD_FLAG /* TODO * #define MAX_SUPERFRAME_COUNT 32 diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index af9f82e6f5..f3ac13f539 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -1861,6 +1861,34 @@ int msm_vdec_g_param(struct msm_vidc_inst *inst, return 0; } +static int msm_vdec_check_colorformat_supported(struct msm_vidc_inst* inst, + enum msm_vidc_colorformat_type colorformat) +{ + bool supported = true; + + /* do not reject coloformats before streamon */ + if (!inst->vb2q[INPUT_PORT].streaming) + return true; + + /* + * bit_depth 8 bit supports 8 bit colorformats only + * bit_depth 10 bit supports 10 bit colorformats only + * interlace supports ubwc colorformats only + */ + if (inst->capabilities->cap[BIT_DEPTH].value == BIT_DEPTH_8 && + !is_8bit_colorformat(colorformat)) + supported = false; + if (inst->capabilities->cap[BIT_DEPTH].value == BIT_DEPTH_10 && + !is_10bit_colorformat(colorformat)) + supported = false; + if (inst->capabilities->cap[CODED_FRAMES].value == + CODED_FRAMES_ADAPTIVE_FIELDS && + !is_ubwc_colorformat(colorformat)) + supported = false; + + return supported; +} + int msm_vdec_enum_fmt(struct msm_vidc_inst *inst, struct v4l2_fmtdesc *f) { int rc = 0; @@ -1900,8 +1928,11 @@ int msm_vdec_enum_fmt(struct msm_vidc_inst *inst, struct v4l2_fmtdesc *f) if (idx > 31) break; if (formats & BIT(i)) { - array[idx] = formats & BIT(i); - idx++; + if (msm_vdec_check_colorformat_supported(inst, + formats & BIT(i))) { + array[idx] = formats & BIT(i); + idx++; + } } i++; formats >>= 1; diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index d506e1aa38..31cbe069e2 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -700,18 +700,9 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) return NULL; } - if (core->state == MSM_VIDC_CORE_ERROR) { - d_vpr_e("%s: core invalid state\n", __func__); + rc = msm_vidc_core_init(core); + if (rc) return NULL; - } - - if (core->state == MSM_VIDC_CORE_DEINIT) { - rc = msm_vidc_core_init(core); - if (rc) { - msm_vidc_core_deinit(core); - return NULL; - } - } inst = kzalloc(sizeof(*inst), GFP_KERNEL); if (!inst) { diff --git a/driver/vidc/src/msm_vidc_debug.c b/driver/vidc/src/msm_vidc_debug.c index 28716e211a..1b32b790cc 100644 --- a/driver/vidc/src/msm_vidc_debug.c +++ b/driver/vidc/src/msm_vidc_debug.c @@ -5,7 +5,7 @@ #include "msm_vidc_debug.h" -int msm_vidc_debug = VIDC_HIGH | VIDC_LOW | VIDC_PKT | VIDC_ERR | VIDC_PRINTK | +int msm_vidc_debug = VIDC_HIGH | VIDC_PKT | VIDC_ERR | VIDC_PRINTK | FW_ERROR | FW_FATAL | FW_FTRACE | FW_LOW | FW_MED | FW_HIGH | FW_PERF | FW_PRINTK; EXPORT_SYMBOL(msm_vidc_debug); @@ -18,3 +18,20 @@ EXPORT_SYMBOL(msm_vidc_syscache_disable); int msm_vidc_clock_voting = !1; +const char *level_str(u32 level) +{ + if (level & VIDC_ERR) + return "err "; + else if (level & VIDC_HIGH) + return "high"; + else if (level & VIDC_LOW) + return "low "; + else if (level & VIDC_PERF) + return "perf"; + else if (level & VIDC_PKT) + return "pkt "; + else if (level & VIDC_BUS) + return "bus "; + else + return "????"; +} \ No newline at end of file diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 762de355ea..1f7fb61734 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -415,6 +415,45 @@ struct msm_vidc_allocations *msm_vidc_get_allocations( } } +const char *core_state_name(enum msm_vidc_core_state state) +{ + const char* name = "UNKNOWN"; + + switch (state) { + case MSM_VIDC_CORE_INIT: + name = "CORE_INIT"; + break; + case MSM_VIDC_CORE_DEINIT: + name = "CORE_DEINIT"; + break; + default: + name = "UNKNOWN"; + break; + } + + return name; +} + +int msm_vidc_change_core_state(struct msm_vidc_core *core, + enum msm_vidc_core_state request_state, const char *func) +{ + if (!core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (!request_state) { + d_vpr_e("%s: invalid core request state\n", func); + return -EINVAL; + } + + d_vpr_h("%s: core state changed from %s to %s\n", + func, core_state_name(core->state), + core_state_name(request_state)); + core->state = request_state; + return 0; +} + const char *state_name(enum msm_vidc_inst_state state) { const char *name = "UNKNOWN"; @@ -1097,29 +1136,31 @@ int msm_vidc_get_fps(struct msm_vidc_inst *inst) return fps; } -int msm_vidc_num_queued_bufs(struct msm_vidc_inst *inst, u32 type) +int msm_vidc_num_buffers(struct msm_vidc_inst *inst, + enum msm_vidc_buffer_type type, enum msm_vidc_buffer_attributes attr) { int count = 0; struct msm_vidc_buffer *vbuf; - struct msm_vidc_buffers* buffers; + struct msm_vidc_buffers *buffers; if (!inst) { d_vpr_e("%s: invalid params\n", __func__); - return 0; + return count; } - if (type == OUTPUT_MPLANE) { + if (type == MSM_VIDC_BUF_OUTPUT) { buffers = &inst->buffers.output; - } else if (type == INPUT_MPLANE) { + } else if (type == MSM_VIDC_BUF_INPUT) { buffers = &inst->buffers.input; } else { - s_vpr_e(inst->sid, "%s: invalid buffer type %#x\n", __func__, type); - return -EINVAL; + s_vpr_e(inst->sid, "%s: invalid buffer type %#x\n", + __func__, type); + return count; } list_for_each_entry(vbuf, &buffers->list, list) { if (vbuf->type != type) continue; - if (!(vbuf->attr & MSM_VIDC_ATTR_QUEUED)) + if (!(vbuf->attr & attr)) continue; count++; } @@ -1565,7 +1606,6 @@ int msm_vidc_create_internal_buffer(struct msm_vidc_inst *inst, struct msm_vidc_alloc *alloc; struct msm_vidc_map *map; - d_vpr_h("%s()\n", __func__); if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; @@ -1650,7 +1690,6 @@ int msm_vidc_create_internal_buffers(struct msm_vidc_inst *inst, struct msm_vidc_buffers *buffers; int i; - d_vpr_h("%s()\n", __func__); if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; @@ -1679,7 +1718,6 @@ int msm_vidc_queue_internal_buffers(struct msm_vidc_inst *inst, struct msm_vidc_buffers *buffers; struct msm_vidc_buffer *buffer, *dummy; - d_vpr_h("%s()\n", __func__); if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; @@ -1727,7 +1765,6 @@ int msm_vidc_release_internal_buffers(struct msm_vidc_inst *inst, struct msm_vidc_buffers *buffers; struct msm_vidc_buffer *buffer, *dummy; - d_vpr_h("%s()\n", __func__); if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; @@ -1999,8 +2036,22 @@ int msm_vidc_session_open(struct msm_vidc_inst *inst) return -EINVAL; } - rc = venus_hfi_session_open(inst); + inst->packet_size = 4096; + inst->packet = kzalloc(inst->packet_size, GFP_KERNEL); + if (!inst->packet) { + s_vpr_e(inst->sid, "%s(): inst packet allocation failed\n", __func__); + return -ENOMEM; + } + rc = venus_hfi_session_open(inst); + if (rc) + goto error; + + return 0; +error: + s_vpr_e(inst->sid, "%s(): session open failed\n", __func__); + kfree(inst->packet); + inst->packet = NULL; return rc; } @@ -2043,8 +2094,10 @@ int msm_vidc_session_streamoff(struct msm_vidc_inst *inst, enum msm_vidc_port_type port) { int rc = 0; + int count = 0; struct msm_vidc_core *core; enum signal_session_response signal_type; + enum msm_vidc_buffer_type buffer_type; if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); @@ -2053,8 +2106,10 @@ int msm_vidc_session_streamoff(struct msm_vidc_inst *inst, if (port == INPUT_PORT) { signal_type = SIGNAL_CMD_STOP_INPUT; + buffer_type = MSM_VIDC_BUF_INPUT; } else if (port == OUTPUT_PORT) { signal_type = SIGNAL_CMD_STOP_OUTPUT; + buffer_type = MSM_VIDC_BUF_OUTPUT; } else { s_vpr_e(inst->sid, "%s: invalid port: %d\n", __func__, port); return -EINVAL; @@ -2072,19 +2127,31 @@ int msm_vidc_session_streamoff(struct msm_vidc_inst *inst, &inst->completions[signal_type], msecs_to_jiffies( core->capabilities[HW_RESPONSE_TIMEOUT].value)); - mutex_lock(&inst->lock); if (!rc) { s_vpr_e(inst->sid, "%s: session stop timed out for port: %d\n", __func__, port); - //msm_comm_kill_session(inst); - rc = -EIO; + rc = -ETIMEDOUT; + msm_vidc_core_timeout(inst->core); } else { rc = 0; - s_vpr_h(inst->sid, "%s: stop successful on port: %d\n", - __func__, port); } + mutex_lock(&inst->lock); - return rc; + /* no more queued buffers after streamoff */ + count = msm_vidc_num_buffers(inst, buffer_type, MSM_VIDC_ATTR_QUEUED); + if (count) { + s_vpr_e(inst->sid, "%s: %d buffers pending on port: %d\n", + __func__, count, port); + msm_vidc_kill_session(inst); + } + rc = msm_vidc_flush_buffers(inst, buffer_type); + if (rc) + return rc; + + s_vpr_h(inst->sid, "%s: stop successful on port: %d\n", + __func__, port); + + return 0; } int msm_vidc_session_close(struct msm_vidc_inst *inst) @@ -2109,19 +2176,43 @@ int msm_vidc_session_close(struct msm_vidc_inst *inst) &inst->completions[SIGNAL_CMD_CLOSE], msecs_to_jiffies( core->capabilities[HW_RESPONSE_TIMEOUT].value)); - mutex_lock(&inst->lock); if (!rc) { s_vpr_e(inst->sid, "%s: session close timed out\n", __func__); - //msm_comm_kill_session(inst); - rc = -EIO; + rc = -ETIMEDOUT; + msm_vidc_core_timeout(inst->core); } else { rc = 0; s_vpr_h(inst->sid, "%s: close successful\n", __func__); } + mutex_lock(&inst->lock); + + msm_vidc_remove_session(inst); + + s_vpr_h(inst->sid, "%s: free session packet data\n", __func__); + kfree(inst->packet); + inst->packet = NULL; return rc; } +int msm_vidc_kill_session(struct msm_vidc_inst *inst) +{ + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + if (!inst->session_id) { + s_vpr_e(inst->sid, "%s: already killed\n", __func__); + return 0; + } + + s_vpr_e(inst->sid, "%s: killing session\n", __func__); + msm_vidc_session_close(inst); + msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); + + return 0; +} + int msm_vidc_get_inst_capability(struct msm_vidc_inst *inst) { int rc = 0; @@ -2367,16 +2458,28 @@ error: int msm_vidc_core_deinit(struct msm_vidc_core *core) { int rc = 0; + struct msm_vidc_inst *inst, *dummy; - d_vpr_h("%s()\n", __func__); if (!core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } mutex_lock(&core->lock); + d_vpr_h("%s()\n", __func__); + if (core->state == MSM_VIDC_CORE_DEINIT) + goto unlock; + venus_hfi_core_deinit(core); msm_vidc_deinit_instance_caps(core); msm_vidc_deinit_core_caps(core); + /* unlink all sessions from core, if any */ + list_for_each_entry_safe(inst, dummy, &core->instances, list) { + msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); + list_del(&inst->list); + } + msm_vidc_change_core_state(core, MSM_VIDC_CORE_DEINIT, __func__); + +unlock: mutex_unlock(&core->lock); return rc; } @@ -2385,18 +2488,12 @@ int msm_vidc_core_init(struct msm_vidc_core *core) { int rc = 0; - d_vpr_h("%s()\n", __func__); if (!core || !core->platform) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } mutex_lock(&core->lock); - if (core->state == MSM_VIDC_CORE_ERROR) { - d_vpr_e("%s: core invalid state\n", __func__); - rc = -EINVAL; - goto unlock; - } if (core->state == MSM_VIDC_CORE_INIT) { rc = 0; goto unlock; @@ -2409,7 +2506,7 @@ int msm_vidc_core_init(struct msm_vidc_core *core) if (rc) goto unlock; - core->state = MSM_VIDC_CORE_INIT; + msm_vidc_change_core_state(core, MSM_VIDC_CORE_INIT, __func__); init_completion(&core->init_done); core->smmu_fault_handled = false; core->ssr.trigger = false; @@ -2417,7 +2514,6 @@ int msm_vidc_core_init(struct msm_vidc_core *core) rc = venus_hfi_core_init(core); if (rc) { d_vpr_e("%s: core init failed\n", __func__); - core->state = MSM_VIDC_CORE_DEINIT; goto unlock; } @@ -2426,20 +2522,27 @@ int msm_vidc_core_init(struct msm_vidc_core *core) mutex_unlock(&core->lock); rc = wait_for_completion_timeout(&core->init_done, msecs_to_jiffies( core->capabilities[HW_RESPONSE_TIMEOUT].value)); + mutex_lock(&core->lock); if (!rc) { - d_vpr_e("%s: system init timed out\n", __func__); + d_vpr_e("%s: core init timed out\n", __func__); rc = -ETIMEDOUT; } else { d_vpr_h("%s: system init wait completed\n", __func__); rc = 0; } - mutex_lock(&core->lock); unlock: mutex_unlock(&core->lock); + if (rc) + msm_vidc_core_init(core); return rc; } +int msm_vidc_core_timeout(struct msm_vidc_core *core) +{ + return msm_vidc_core_deinit(core); +} + int msm_vidc_smmu_fault_handler(struct iommu_domain *domain, struct device *dev, unsigned long iova, int flags, void *data) { @@ -2468,6 +2571,50 @@ void msm_vidc_batch_handler(struct work_struct *work) { } +int msm_vidc_flush_buffers(struct msm_vidc_inst* inst, + enum msm_vidc_buffer_type type) +{ + int rc = 0; + struct msm_vidc_buffers *buffers; + struct msm_vidc_buffer *buf, *dummy; + enum msm_vidc_buffer_type buffer_type[2]; + int i; + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (type == MSM_VIDC_BUF_INPUT) { + buffer_type[0] = MSM_VIDC_BUF_INPUT_META; + buffer_type[1] = MSM_VIDC_BUF_INPUT; + } else if (type == MSM_VIDC_BUF_OUTPUT) { + buffer_type[0] = MSM_VIDC_BUF_OUTPUT_META; + buffer_type[1] = MSM_VIDC_BUF_OUTPUT; + } else { + s_vpr_h(inst->sid, "%s: invalid buffer type %d\n", + __func__, type); + return -EINVAL; + } + + for (i = 0; i < ARRAY_SIZE(buffer_type); i++) { + buffers = msm_vidc_get_buffers(inst, buffer_type[i], __func__); + if (!buffers) + return -EINVAL; + + list_for_each_entry_safe(buf, dummy, &buffers->list, list) { + if (buf->attr & MSM_VIDC_ATTR_QUEUED || + buf->attr & MSM_VIDC_ATTR_DEFERRED) { + print_vidc_buffer(VIDC_ERR, "flushing buffer", inst, buf); + msm_vidc_vb2_buffer_done(inst, buf); + msm_vidc_put_driver_buf(inst, buf); + } + } + } + + return rc; +} + void msm_vidc_destroy_buffers(struct msm_vidc_inst *inst) { struct msm_vidc_buffers *buffers; @@ -2488,6 +2635,11 @@ void msm_vidc_destroy_buffers(struct msm_vidc_inst *inst) }; int i; + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return; + } + for (i = 0; i < ARRAY_SIZE(buf_types); i++) { buffers = msm_vidc_get_buffers(inst, buf_types[i], __func__); if (!buffers) @@ -2577,6 +2729,11 @@ void put_inst(struct msm_vidc_inst *inst) kref_put(&inst->kref, msm_vidc_close_helper); } +bool core_lock_check(struct msm_vidc_core *core, const char* func) +{ + return mutex_is_locked(&core->lock); +} + void core_lock(struct msm_vidc_core *core, const char *function) { mutex_lock(&core->lock); @@ -2587,6 +2744,11 @@ void core_unlock(struct msm_vidc_core *core, const char *function) mutex_unlock(&core->lock); } +bool inst_lock_check(struct msm_vidc_inst *inst, const char* func) +{ + return mutex_is_locked(&inst->lock); +} + void inst_lock(struct msm_vidc_inst *inst, const char *function) { mutex_lock(&inst->lock); diff --git a/driver/vidc/src/msm_vidc_power.c b/driver/vidc/src/msm_vidc_power.c index 458bafa9fd..e6cf258e25 100644 --- a/driver/vidc/src/msm_vidc_power.c +++ b/driver/vidc/src/msm_vidc_power.c @@ -425,9 +425,11 @@ static int msm_vidc_apply_dcvs(struct msm_vidc_inst *inst) power = &inst->power; if (is_decode_session(inst)) { - bufs_with_fw = msm_vidc_num_queued_bufs(inst, OUTPUT_MPLANE); + bufs_with_fw = msm_vidc_num_buffers(inst, + MSM_VIDC_BUF_OUTPUT, MSM_VIDC_ATTR_QUEUED); } else { - bufs_with_fw = msm_vidc_num_queued_bufs(inst, INPUT_MPLANE); + bufs_with_fw = msm_vidc_num_buffers(inst, + MSM_VIDC_BUF_INPUT, MSM_VIDC_ATTR_QUEUED); } /* +1 as one buffer is going to be queued after the function */ diff --git a/driver/vidc/src/msm_vidc_probe.c b/driver/vidc/src/msm_vidc_probe.c index a28d88594d..2bfaa2ad0f 100644 --- a/driver/vidc/src/msm_vidc_probe.c +++ b/driver/vidc/src/msm_vidc_probe.c @@ -178,7 +178,7 @@ static int msm_vidc_deinitialize_core(struct msm_vidc_core *core) d_vpr_h("%s()\n", __func__); mutex_destroy(&core->lock); - core->state = MSM_VIDC_CORE_DEINIT; + msm_vidc_change_core_state(core, MSM_VIDC_CORE_DEINIT, __func__); if (core->pm_workq) destroy_workqueue(core->pm_workq); @@ -199,7 +199,7 @@ static int msm_vidc_initialize_core(struct msm_vidc_core *core) } d_vpr_h("%s()\n", __func__); - core->state = MSM_VIDC_CORE_DEINIT; + msm_vidc_change_core_state(core, MSM_VIDC_CORE_DEINIT, __func__); core->device_workq = create_singlethread_workqueue("device_workq"); if (!core->device_workq) { diff --git a/driver/vidc/src/msm_vidc_v4l2.c b/driver/vidc/src/msm_vidc_v4l2.c index 74fba3ef65..c2191c7dbf 100644 --- a/driver/vidc/src/msm_vidc_v4l2.c +++ b/driver/vidc/src/msm_vidc_v4l2.c @@ -12,7 +12,7 @@ static struct msm_vidc_inst *get_vidc_inst(struct file *filp, void *fh) { - if (!filp->private_data) + if (!filp || !filp->private_data) return NULL; return container_of(filp->private_data, struct msm_vidc_inst, event_handler); diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index f3542d544f..ca1112adc3 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -33,6 +33,8 @@ #define MAX_FIRMWARE_NAME_SIZE 128 +extern struct msm_vidc_core *g_core; + static int __resume(struct msm_vidc_core *core); static int __suspend(struct msm_vidc_core *core); @@ -161,7 +163,7 @@ static void __strict_check(struct msm_vidc_core *core) bool __core_in_valid_state(struct msm_vidc_core *core) { - return core->state != MSM_VIDC_CORE_ERROR; + return core->state == MSM_VIDC_CORE_INIT; } static bool is_sys_cache_present(struct msm_vidc_core *core) @@ -169,6 +171,30 @@ static bool is_sys_cache_present(struct msm_vidc_core *core) return core->dt->sys_cache_present; } +static bool valdiate_session(struct msm_vidc_inst* inst, const char *func) +{ + bool valid = false; + struct msm_vidc_inst *temp; + struct msm_vidc_core *core = g_core; + + if (!core) + return false; + + mutex_lock(&core->lock); + list_for_each_entry(temp, &core->instances, list) { + if (temp == inst) { + valid = true; + break; + } + } + mutex_unlock(&core->lock); + + if (!valid) + s_vpr_e(inst->sid, "%s: invalid session\n", func); + + return valid; +} + void __write_register(struct msm_vidc_core *core, u32 reg, u32 value) { @@ -879,8 +905,12 @@ int __iface_msgq_read(struct msm_vidc_core *core, void *pkt) } if (!__read_queue(q_info, (u8 *)pkt, &tx_req_is_set)) { - if (tx_req_is_set) - call_venus_op(core, raise_interrupt, core); + if (tx_req_is_set) { + //call_venus_op(core, raise_interrupt, core); + d_vpr_e("%s: queue is full\n", __func__); + rc = -EINVAL; + goto read_error_null; + } rc = 0; } else { rc = -ENODATA; @@ -911,11 +941,16 @@ int __iface_dbgq_read(struct msm_vidc_core *core, void *pkt) } if (!__read_queue(q_info, (u8 *)pkt, &tx_req_is_set)) { - if (tx_req_is_set) - call_venus_op(core, raise_interrupt, core); + if (tx_req_is_set) { + d_vpr_e("%s: queue is full\n", __func__); + //call_venus_op(core, raise_interrupt, core); + rc = -EINVAL; + goto dbg_error_null; + } rc = 0; - } else + } else { rc = -ENODATA; + } dbg_error_null: return rc; @@ -1909,6 +1944,24 @@ static int __set_ubwc_config(struct msm_vidc_core *core) return rc; } */ + +static int __venus_power_off(struct msm_vidc_core* core) +{ + int rc = 0; + + if (!core->power_enabled) + return 0; + + rc = call_venus_op(core, power_off, core); + if (rc) { + d_vpr_e("Failed to power off, err: %d\n", rc); + return rc; + } + core->power_enabled = false; + + return rc; +} + static int __venus_power_on(struct msm_vidc_core *core) { int rc = 0; @@ -2009,7 +2062,7 @@ static int __resume(struct msm_vidc_core *core) } else if (core->power_enabled) { goto exit; } else if (!__core_in_valid_state(core)) { - d_vpr_e("%s: core in deinit state\n", __func__); + d_vpr_e("%s: core not in valid state\n", __func__); return -EINVAL; } @@ -2394,9 +2447,7 @@ static void __unload_fw(struct msm_vidc_core *core) qcom_scm_pas_shutdown(core->dt->fw_cookie); core->dt->fw_cookie = 0; - __interface_queues_deinit(core); - call_venus_op(core, power_off, core); - + __venus_power_off(core); __deinit_resources(core); d_vpr_h("Firmware unloaded successfully\n"); @@ -2447,16 +2498,15 @@ void venus_hfi_work_handler(struct work_struct *work) mutex_lock(&core->lock); if (__resume(core)) { d_vpr_e("%s: Power on failed\n", __func__); + mutex_unlock(&core->lock); goto err_no_work; } - call_venus_op(core, clear_interrupt, core); mutex_unlock(&core->lock); num_responses = __response_handler(core); err_no_work: - mutex_unlock(&core->lock); if (!call_venus_op(core, watchdog, core, core->intr_status)) enable_irq(core->dt->irq); } @@ -2614,6 +2664,7 @@ int venus_hfi_core_deinit(struct msm_vidc_core *core) return -EINVAL; } d_vpr_h("%s(): core %pK\n", __func__, core); + __flush_debug_queue(core, core->packet, core->packet_size); __disable_subcaches(core); __interface_queues_deinit(core); __unload_fw(core); @@ -2655,13 +2706,6 @@ int venus_hfi_session_open(struct msm_vidc_inst *inst) return -EINVAL; } - inst->packet_size = 4096; - inst->packet = kzalloc(inst->packet_size, GFP_KERNEL); - if (!inst->packet) { - d_vpr_e("%s(): inst packet allocation failed\n", __func__); - return -ENOMEM; - } - rc = hfi_packet_session_command(inst, HFI_CMD_OPEN, (HFI_HOST_FLAGS_RESPONSE_REQUIRED | @@ -2672,13 +2716,13 @@ int venus_hfi_session_open(struct msm_vidc_inst *inst) &inst->session_id, /* payload */ sizeof(u32)); if (rc) - goto error; + return rc; rc = __iface_cmdq_write(inst->core, inst->packet); if (rc) - goto error; -error: - return rc; + return rc; + + return 0; } int venus_hfi_session_set_codec(struct msm_vidc_inst *inst) @@ -2690,6 +2734,8 @@ int venus_hfi_session_set_codec(struct msm_vidc_inst *inst) d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } + if (!valdiate_session(inst, __func__)) + return -EINVAL; codec = get_hfi_codec(inst); rc = venus_hfi_session_property(inst, @@ -2719,6 +2765,9 @@ int venus_hfi_session_property(struct msm_vidc_inst *inst, } core = inst->core; + if (!valdiate_session(inst, __func__)) + return -EINVAL; + rc = hfi_create_header(inst->packet, inst->packet_size, inst->session_id, core->header_id++); if (rc) @@ -2753,6 +2802,8 @@ int venus_hfi_session_close(struct msm_vidc_inst *inst) d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } + if (!valdiate_session(inst, __func__)) + return -EINVAL; rc = hfi_packet_session_command(inst, HFI_CMD_CLOSE, @@ -2767,8 +2818,6 @@ int venus_hfi_session_close(struct msm_vidc_inst *inst) if (!rc) __iface_cmdq_write(inst->core, inst->packet); - kfree(inst->packet); - return rc; } @@ -2780,6 +2829,9 @@ int venus_hfi_start(struct msm_vidc_inst *inst, enum msm_vidc_port_type port) d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } + if (!valdiate_session(inst, __func__)) + return -EINVAL; + if (port != INPUT_PORT && port != OUTPUT_PORT) { s_vpr_e(inst->sid, "%s: invalid port %d\n", __func__, port); return -EINVAL; @@ -2812,6 +2864,9 @@ int venus_hfi_stop(struct msm_vidc_inst *inst, enum msm_vidc_port_type port) d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } + if (!valdiate_session(inst, __func__)) + return -EINVAL; + if (port != INPUT_PORT && port != OUTPUT_PORT) { s_vpr_e(inst->sid, "%s: invalid port %d\n", __func__, port); return -EINVAL; @@ -2850,6 +2905,9 @@ int venus_hfi_session_command(struct msm_vidc_inst *inst, } core = inst->core; + if (!valdiate_session(inst, __func__)) + return -EINVAL; + rc = hfi_create_header(inst->packet, inst->packet_size, inst->session_id, core->header_id++); @@ -2892,6 +2950,9 @@ int venus_hfi_queue_buffer(struct msm_vidc_inst *inst, } core = inst->core; + if (!valdiate_session(inst, __func__)) + return -EINVAL; + rc = get_hfi_buffer(inst, buffer, &hfi_buffer); if (rc) return rc; @@ -2948,6 +3009,9 @@ int venus_hfi_release_buffer(struct msm_vidc_inst *inst, d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } + if (!valdiate_session(inst, __func__)) + return -EINVAL; + if (!is_internal_buffer(buffer->type)) { s_vpr_e(inst->sid, "release not allowed for buffer type %d\n", buffer->type); diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index bf1408755a..92095e64c9 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -229,16 +229,8 @@ static int handle_session_error(struct msm_vidc_inst *inst, static int handle_system_error(struct msm_vidc_core *core, struct hfi_packet *pkt) { - mutex_lock(&core->lock); - if (core->state == MSM_VIDC_CORE_DEINIT) { - d_vpr_e("%s: core already deinitialized\n", __func__); - mutex_unlock(&core->lock); - return 0; - } - d_vpr_e("%s: system error received\n", __func__); - core->state = MSM_VIDC_CORE_DEINIT; - mutex_unlock(&core->lock); + msm_vidc_core_deinit(core); return 0; } @@ -264,6 +256,7 @@ static int handle_session_open(struct msm_vidc_inst *inst, if (pkt->flags & HFI_FW_FLAGS_SESSION_ERROR) { s_vpr_e(inst->sid, "%s: received session error\n", __func__); msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); + return 0; } if (pkt->flags & HFI_FW_FLAGS_SUCCESS) @@ -293,6 +286,7 @@ static int handle_session_start(struct msm_vidc_inst *inst, if (pkt->flags & HFI_FW_FLAGS_SESSION_ERROR) { s_vpr_e(inst->sid, "%s: received session error\n", __func__); msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); + return 0; } if (pkt->flags & HFI_FW_FLAGS_SUCCESS) @@ -351,6 +345,7 @@ static int handle_session_drain(struct msm_vidc_inst *inst, if (pkt->flags & HFI_FW_FLAGS_SESSION_ERROR) { s_vpr_e(inst->sid, "%s: received session error\n", __func__); msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); + return 0; } if (pkt->flags & HFI_FW_FLAGS_SUCCESS) From 319e78041cb390517df2b1ab1a4c7c1825ede8c3 Mon Sep 17 00:00:00 2001 From: Manikanta Kanamarlapudi Date: Tue, 12 Jan 2021 20:08:27 +0530 Subject: [PATCH 0069/1061] video: driver: correct state checks for meta ports correct state checks in stream off sequence for meta ports. Change-Id: Ic9ebf64961ed654b2a9b750d6fdc8f3b7bb10195 --- driver/vidc/src/msm_vidc_driver.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index df50ff55e5..d502d96dad 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -682,14 +682,20 @@ bool msm_vidc_allow_streamoff(struct msm_vidc_inst *inst, u32 type) d_vpr_e("%s: invalid params\n", __func__); return false; } - if (type == INPUT_MPLANE || type == INPUT_META_PLANE) { + if (type == INPUT_MPLANE) { if (inst->state == MSM_VIDC_OPEN || inst->state == MSM_VIDC_START_OUTPUT) allow = false; - } else if (type == OUTPUT_MPLANE || type == OUTPUT_META_PLANE) { + } else if (type == INPUT_META_PLANE) { + if (inst->state == MSM_VIDC_START_INPUT) + allow = false; + } else if (type == OUTPUT_MPLANE) { if (inst->state == MSM_VIDC_OPEN || inst->state == MSM_VIDC_START_INPUT) allow = false; + } else if (type == OUTPUT_META_PLANE) { + if (inst->state == MSM_VIDC_START_OUTPUT) + allow = false; } if (!allow) s_vpr_e(inst->sid, "%s: type %d not allowed in state %s\n", From dca32dc98477daeac280b0f23ea87891365e250f Mon Sep 17 00:00:00 2001 From: Chinmay Sawarkar Date: Fri, 15 Jan 2021 18:38:56 -0800 Subject: [PATCH 0070/1061] waipio: driver: Add support for work mode and route Iris2 specific calculations for Work Mode and Route. Also add quality mode support. Change-Id: I7a1e2fa27236aa749978d146d85fd0af6177084c Signed-off-by: Chinmay Sawarkar --- driver/platform/waipio/src/msm_vidc_waipio.c | 2 +- driver/variant/iris2/src/msm_vidc_iris2.c | 171 ++++++++++++++++++- driver/vidc/inc/msm_vidc_inst.h | 2 +- driver/vidc/src/msm_venc.c | 8 + 4 files changed, 177 insertions(+), 6 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 35a8f61b7e..fde836d1dd 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -959,7 +959,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {QUALITY_MODE, ENC, CODECS_ALL, MSM_VIDC_MAX_QUALITY_MODE, MSM_VIDC_POWER_SAVE_MODE, 1, - MSM_VIDC_MAX_QUALITY_MODE}, + MSM_VIDC_POWER_SAVE_MODE}, {CODED_FRAMES, DEC, CODECS_ALL, CODED_FRAMES_MBS_ONLY, CODED_FRAMES_ADAPTIVE_FIELDS, diff --git a/driver/variant/iris2/src/msm_vidc_iris2.c b/driver/variant/iris2/src/msm_vidc_iris2.c index 7bb1c07d4d..166e706735 100644 --- a/driver/variant/iris2/src/msm_vidc_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_iris2.c @@ -17,7 +17,6 @@ #include "msm_vidc_buffer.h" #include "msm_vidc_debug.h" - #define VBIF_BASE_OFFS_IRIS2 0x00080000 #define CPU_BASE_OFFS_IRIS2 0x000A0000 #define AON_BASE_OFFS 0x000E0000 @@ -484,6 +483,170 @@ static int __boot_firmware_iris2(struct msm_vidc_core *vidc_core) return rc; } +bool res_is_greater_than(u32 width, u32 height, + u32 ref_width, u32 ref_height) +{ + u32 num_mbs = NUM_MBS_PER_FRAME(height, width); + u32 max_side = max(ref_width, ref_height); + + if (num_mbs > NUM_MBS_PER_FRAME(ref_height, ref_width) || + width > max_side || + height > max_side) + return true; + else + return false; +} + +bool res_is_less_than_or_equal_to(u32 width, u32 height, + u32 ref_width, u32 ref_height) +{ + u32 num_mbs = NUM_MBS_PER_FRAME(height, width); + u32 max_side = max(ref_width, ref_height); + + if (num_mbs <= NUM_MBS_PER_FRAME(ref_height, ref_width) && + width <= max_side && + height <= max_side) + return true; + else + return false; +} + +int msm_vidc_decide_work_mode_iris2(struct msm_vidc_inst* inst) +{ + u32 work_mode; + struct v4l2_format* out_f; + struct v4l2_format* inp_f; + u32 width, height; + bool res_ok = false; + bool lowlatency = false; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + work_mode = MSM_VIDC_STAGE_2; + out_f = &inst->fmts[OUTPUT_PORT]; + inp_f = &inst->fmts[INPUT_PORT]; + + if (is_decode_session(inst)) { + height = out_f->fmt.pix_mp.height; + width = out_f->fmt.pix_mp.width; + res_ok = res_is_less_than_or_equal_to(width, height, 1280, 720); + if (inst->capabilities->cap[CODED_FRAMES].value == + CODED_FRAMES_ADAPTIVE_FIELDS || + inst->capabilities->cap[LOWLATENCY_MODE].value || + res_ok) { + work_mode = MSM_VIDC_STAGE_1; + } + } else if (is_encode_session(inst)) { + height = inp_f->fmt.pix_mp.height; + width = inp_f->fmt.pix_mp.width; + res_ok = !res_is_greater_than(width, height, 4096, 2160); + if (res_ok && + (inst->capabilities->cap[LOWLATENCY_MODE].value)) { + work_mode = MSM_VIDC_STAGE_1; + /* For WORK_MODE_1, set Low Latency mode by default */ + lowlatency = true; + } + if (inst->capabilities->cap[LOSSLESS].value) { + /*TODO Set 2 stage in case of ALL INTRA */ + work_mode = MSM_VIDC_STAGE_2; + lowlatency = false; + } + } + else { + d_vpr_e("%s: invalid session type\n", __func__); + return -EINVAL; + } + + s_vpr_h(inst->sid, "Configuring work mode = %u low latency = %u", + work_mode, lowlatency); + inst->capabilities->cap[STAGE].value = work_mode; + + /* TODO If Encode then Set Low Latency (Enable/Disable) + * and Update internal cap struct + */ + + return 0; +} + +int msm_vidc_decide_work_route_iris2(struct msm_vidc_inst* inst) +{ + u32 work_route; + struct msm_vidc_core* core; + + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + core = inst->core; + work_route = core->capabilities[NUM_VPP_PIPE].value; + + if (is_decode_session(inst)) { + if (inst->capabilities->cap[CODED_FRAMES].value == + CODED_FRAMES_ADAPTIVE_FIELDS) + work_route = MSM_VIDC_PIPE_1; + } else if (is_encode_session(inst)) { + u32 slice_mode, width, height; + struct v4l2_format* f; + + f = &inst->fmts[INPUT_PORT]; + height = f->fmt.pix_mp.height; + width = f->fmt.pix_mp.width; + slice_mode = inst->capabilities->cap[SLICE_MODE].value; + + /*TODO Pipe=1 for legacy CBR*/ + if (slice_mode == V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_BYTES) + work_route = MSM_VIDC_PIPE_1; + + } else { + d_vpr_e("%s: invalid session type\n", __func__); + return -EINVAL; + } + + s_vpr_h(inst->sid, "Configuring work route = %u", work_route); + inst->capabilities->cap[PIPE].value = work_route; + + return 0; +} + +int msm_vidc_decide_quality_mode_iris2(struct msm_vidc_inst* inst) +{ + struct msm_vidc_inst_capability* capability = inst->capabilities; + struct msm_vidc_core *core; + u32 mbpf, mbps, max_hq_mbpf, max_hq_mbps; + u32 mode; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (!is_encode_session(inst)) + return 0; + + mode = MSM_VIDC_POWER_SAVE_MODE; + mbpf = msm_vidc_get_mbs_per_frame(inst); + mbps = mbpf * msm_vidc_get_fps(inst); + core = inst->core; + max_hq_mbpf = core->capabilities[MAX_MBPF_HQ].value;; + max_hq_mbps = core->capabilities[MAX_MBPS_HQ].value;; + + /* Power saving always disabled for CQ and LOSSLESS RC modes. */ + if (inst->capabilities->cap[LOSSLESS].value || + (mbpf <= max_hq_mbpf && mbps <= max_hq_mbps)) + mode = MSM_VIDC_MAX_QUALITY_MODE; + + inst->flags = mode == MSM_VIDC_POWER_SAVE_MODE ? + inst->flags | VIDC_LOW_POWER : + inst->flags & ~VIDC_LOW_POWER; + capability->cap[QUALITY_MODE].value = mode; + + return 0; +} + static struct msm_vidc_venus_ops iris2_ops = { .boot_firmware = __boot_firmware_iris2, .interrupt_init = __interrupt_init_iris2, @@ -504,9 +667,9 @@ static struct msm_vidc_session_ops msm_session_ops = { .extra_count = msm_buffer_extra_count_iris2, .calc_freq = msm_vidc_calc_freq_iris2, .calc_bw = msm_vidc_calc_bw_iris2, - .decide_work_route = NULL, - .decide_work_mode = NULL, - .decide_core_and_power_mode = NULL, + .decide_work_route = msm_vidc_decide_work_route_iris2, + .decide_work_mode = msm_vidc_decide_work_mode_iris2, + .decide_quality_mode = msm_vidc_decide_quality_mode_iris2, }; int msm_vidc_init_iris2(struct msm_vidc_core *core) diff --git a/driver/vidc/inc/msm_vidc_inst.h b/driver/vidc/inc/msm_vidc_inst.h index 039d2437c9..0a0897ba2d 100644 --- a/driver/vidc/inc/msm_vidc_inst.h +++ b/driver/vidc/inc/msm_vidc_inst.h @@ -21,7 +21,7 @@ struct msm_vidc_session_ops { struct vidc_bus_vote_data* vote_data); int (*decide_work_route)(struct msm_vidc_inst *inst); int (*decide_work_mode)(struct msm_vidc_inst *inst); - int (*decide_core_and_power_mode)(struct msm_vidc_inst *inst); + int (*decide_quality_mode)(struct msm_vidc_inst *inst); int (*buffer_size)(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type type); int (*min_count)(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type type); int (*extra_count)(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type type); diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index dcf2ce2dcb..1dfe00d4a7 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -327,9 +327,17 @@ static int msm_venc_set_pipe(struct msm_vidc_inst *inst) static int msm_venc_set_quality_mode(struct msm_vidc_inst *inst) { int rc = 0; + struct msm_vidc_core* core = inst->core; struct msm_vidc_inst_capability *capability = inst->capabilities; u32 mode; + rc = call_session_op(core, decide_quality_mode, inst); + if (rc) { + s_vpr_e(inst->sid, "%s: decide_work_route failed\n", + __func__); + return -EINVAL; + } + mode = capability->cap[QUALITY_MODE].value; s_vpr_h(inst->sid, "%s: quality_mode: %u\n", __func__, mode); rc = venus_hfi_session_property(inst, From 9ec3d72b489e13bf4fcc54b9fd29758b54ef39c0 Mon Sep 17 00:00:00 2001 From: Mihir Ganu Date: Fri, 15 Jan 2021 17:52:01 -0800 Subject: [PATCH 0071/1061] video: driver: Update metadata port settings - Set correct metadata buffer sizes/counts in initialization. - Update metadata buffer sizes/count when a metadata control is set. Change-Id: Ib695b267efac26caa5858cdcdec1868d85182b90 Signed-off-by: Mihir Ganu --- driver/vidc/inc/msm_vidc_driver.h | 1 + driver/vidc/src/msm_vdec.c | 22 ++++++------- driver/vidc/src/msm_venc.c | 22 ++++++------- driver/vidc/src/msm_vidc_control.c | 24 ++++++++++++++ driver/vidc/src/msm_vidc_driver.c | 51 ++++++++++++++++++++++++++++++ 5 files changed, 96 insertions(+), 24 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 4c40413648..fef4fb7454 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -297,5 +297,6 @@ bool core_lock_check(struct msm_vidc_core *core, const char *function); void inst_lock(struct msm_vidc_inst *inst, const char *function); void inst_unlock(struct msm_vidc_inst *inst, const char *function); bool inst_lock_check(struct msm_vidc_inst *inst, const char *function); +int msm_vidc_update_meta_port_settings(struct msm_vidc_inst *inst); #endif // _MSM_VIDC_DRIVER_H_ diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 7a60b06a27..9140009e42 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -1996,12 +1996,11 @@ int msm_vdec_inst_init(struct msm_vidc_inst *inst) f = &inst->fmts[INPUT_META_PORT]; f->type = INPUT_META_PLANE; f->fmt.meta.dataformat = V4L2_META_FMT_VIDC; - f->fmt.meta.buffersize = call_session_op(core, buffer_size, - inst, MSM_VIDC_BUF_INPUT_META); - inst->buffers.input_meta.min_count = inst->buffers.input.min_count; - inst->buffers.input_meta.extra_count = inst->buffers.input.extra_count; - inst->buffers.input_meta.actual_count = inst->buffers.input.actual_count; - inst->buffers.input_meta.size = f->fmt.meta.buffersize; + f->fmt.meta.buffersize = 0; + inst->buffers.input_meta.min_count = 0; + inst->buffers.input_meta.extra_count = 0; + inst->buffers.input_meta.actual_count = 0; + inst->buffers.input_meta.size = 0; f = &inst->fmts[OUTPUT_PORT]; f->type = OUTPUT_MPLANE; @@ -2028,12 +2027,11 @@ int msm_vdec_inst_init(struct msm_vidc_inst *inst) f = &inst->fmts[OUTPUT_META_PORT]; f->type = OUTPUT_META_PLANE; f->fmt.meta.dataformat = V4L2_META_FMT_VIDC; - f->fmt.meta.buffersize = call_session_op(core, buffer_size, - inst, MSM_VIDC_BUF_OUTPUT_META); - inst->buffers.output_meta.min_count = inst->buffers.output.min_count; - inst->buffers.output_meta.extra_count = inst->buffers.output.extra_count; - inst->buffers.output_meta.actual_count = inst->buffers.output.actual_count; - inst->buffers.output_meta.size = f->fmt.meta.buffersize; + f->fmt.meta.buffersize = 0; + inst->buffers.output_meta.min_count = 0; + inst->buffers.output_meta.extra_count = 0; + inst->buffers.output_meta.actual_count = 0; + inst->buffers.output_meta.size = 0; rc = msm_vdec_codec_change(inst, inst->fmts[INPUT_PORT].fmt.pix_mp.pixelformat); diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index dcf2ce2dcb..f0d56a8abc 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -1510,12 +1510,11 @@ int msm_venc_inst_init(struct msm_vidc_inst *inst) f = &inst->fmts[OUTPUT_META_PORT]; f->type = OUTPUT_META_PLANE; f->fmt.meta.dataformat = V4L2_META_FMT_VIDC; - f->fmt.meta.buffersize = call_session_op(core, buffer_size, - inst, MSM_VIDC_BUF_OUTPUT_META); - inst->buffers.output_meta.min_count = inst->buffers.output.min_count; - inst->buffers.output_meta.extra_count = inst->buffers.output.extra_count; - inst->buffers.output_meta.actual_count = inst->buffers.output.actual_count; - inst->buffers.output_meta.size = f->fmt.meta.buffersize; + f->fmt.meta.buffersize = 0; + inst->buffers.output_meta.min_count = 0; + inst->buffers.output_meta.extra_count = 0; + inst->buffers.output_meta.actual_count = 0; + inst->buffers.output_meta.size = 0; f = &inst->fmts[INPUT_PORT]; f->type = INPUT_MPLANE; @@ -1542,12 +1541,11 @@ int msm_venc_inst_init(struct msm_vidc_inst *inst) f = &inst->fmts[INPUT_META_PORT]; f->type = INPUT_META_PLANE; f->fmt.meta.dataformat = V4L2_META_FMT_VIDC; - f->fmt.meta.buffersize = call_session_op(core, buffer_size, - inst, MSM_VIDC_BUF_INPUT_META); - inst->buffers.input_meta.min_count = inst->buffers.input.min_count; - inst->buffers.input_meta.extra_count = inst->buffers.input.extra_count; - inst->buffers.input_meta.actual_count = inst->buffers.input.actual_count; - inst->buffers.input_meta.size = f->fmt.meta.buffersize; + f->fmt.meta.buffersize = 0; + inst->buffers.input_meta.min_count = 0; + inst->buffers.input_meta.extra_count = 0; + inst->buffers.input_meta.actual_count = 0; + inst->buffers.input_meta.size = 0; inst->hfi_rc_type = HFI_RC_VBR_CFR; diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index fe9ce5bc41..4d9fba31c5 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -24,6 +24,26 @@ static bool is_priv_ctrl(u32 id) return false; } +static bool is_meta_ctrl(u32 id) +{ + return (id == V4L2_CID_MPEG_VIDC_METADATA_LTR_MARK_USE_DETAILS || + id == V4L2_CID_MPEG_VIDC_METADATA_SEQ_HEADER_NAL || + id == V4L2_CID_MPEG_VIDC_METADATA_DPB_LUMA_CHROMA_MISR || + id == V4L2_CID_MPEG_VIDC_METADATA_OPB_LUMA_CHROMA_MISR || + id == V4L2_CID_MPEG_VIDC_METADATA_INTERLACE || + id == V4L2_CID_MPEG_VIDC_METADATA_CONCEALED_MB_COUNT || + id == V4L2_CID_MPEG_VIDC_METADATA_HISTOGRAM_INFO || + id == V4L2_CID_MPEG_VIDC_METADATA_SEI_MASTERING_DISPLAY_COLOUR || + id == V4L2_CID_MPEG_VIDC_METADATA_SEI_CONTENT_LIGHT_LEVEL || + id == V4L2_CID_MPEG_VIDC_METADATA_HDR10PLUS || + id == V4L2_CID_MPEG_VIDC_METADATA_EVA_STATS || + id == V4L2_CID_MPEG_VIDC_METADATA_BUFFER_TAG || + id == V4L2_CID_MPEG_VIDC_METADATA_SUBFRAME_OUTPUT || + id == V4L2_CID_MPEG_VIDC_METADATA_ROI_INFO || + id == V4L2_CID_MPEG_VIDC_METADATA_TIMESTAMP || + id == V4L2_CID_MPEG_VIDC_METADATA_ENC_QP_METADATA); +} + static const char *const mpeg_video_rate_control[] = { "VBR", "CBR", @@ -625,6 +645,10 @@ int msm_v4l2_op_s_ctrl(struct v4l2_ctrl *ctrl) /* Static setting */ if (!inst->vb2q[OUTPUT_PORT].streaming) { capability->cap[cap_id].value = ctrl->val; + + if (is_meta_ctrl(ctrl->id)) + msm_vidc_update_meta_port_settings(inst); + return 0; } diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index a18a3d9ae3..9dad8957bc 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -2760,3 +2760,54 @@ void inst_unlock(struct msm_vidc_inst *inst, const char *function) { mutex_unlock(&inst->lock); } + +int msm_vidc_update_meta_port_settings(struct msm_vidc_inst *inst) +{ + struct msm_vidc_core *core; + struct v4l2_format *fmt; + + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + core = inst->core; + + fmt = &inst->fmts[INPUT_META_PORT]; + if (is_input_meta_enabled(inst)) { + fmt->fmt.meta.buffersize = call_session_op(core, + buffer_size, inst, MSM_VIDC_BUF_INPUT_META); + inst->buffers.input_meta.min_count = + inst->buffers.input.min_count; + inst->buffers.input_meta.extra_count = + inst->buffers.input.extra_count; + inst->buffers.input_meta.actual_count = + inst->buffers.input.actual_count; + inst->buffers.input_meta.size = fmt->fmt.meta.buffersize; + } else { + fmt->fmt.meta.buffersize = 0; + inst->buffers.input_meta.min_count = 0; + inst->buffers.input_meta.extra_count = 0; + inst->buffers.input_meta.actual_count = 0; + inst->buffers.input_meta.size = 0; + } + + fmt = &inst->fmts[OUTPUT_META_PORT]; + if (is_output_meta_enabled(inst)) { + fmt->fmt.meta.buffersize = call_session_op(core, + buffer_size, inst, MSM_VIDC_BUF_OUTPUT_META); + inst->buffers.output_meta.min_count = + inst->buffers.output.min_count; + inst->buffers.output_meta.extra_count = + inst->buffers.output.extra_count; + inst->buffers.output_meta.actual_count = + inst->buffers.output.actual_count; + inst->buffers.output_meta.size = fmt->fmt.meta.buffersize; + } else { + fmt->fmt.meta.buffersize = 0; + inst->buffers.output_meta.min_count = 0; + inst->buffers.output_meta.extra_count = 0; + inst->buffers.output_meta.actual_count = 0; + inst->buffers.output_meta.size = 0; + } + return 0; +} From 0b21038c2708458286735f077af69d7053061453 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Tue, 19 Jan 2021 14:58:00 -0800 Subject: [PATCH 0072/1061] video: driver: Add support to deduce min, max, frame qp values Add support to deduce min, max, frame qp values from client set controls and set the same to video firmware. Change-Id: Id94e781cc0c8afdf0e9e00562bdaea32db04fd74 Signed-off-by: Akshata Sahukar --- driver/platform/waipio/src/msm_vidc_waipio.c | 161 +++++----- driver/vidc/inc/msm_vidc_control.h | 9 + driver/vidc/src/msm_vidc_control.c | 278 +++++++++++++++++- .../uapi/vidc/media/v4l2_vidc_extensions.h | 10 + 4 files changed, 380 insertions(+), 78 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index fde836d1dd..5144599591 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -23,6 +23,10 @@ #define MIN_CHROMA_QP_OFFSET -12 #define MAX_CHROMA_QP_OFFSET 0 #define MAX_BITRATE 220000000 +#define MIN_QP_10BIT -12 +#define MIN_QP_8BIT 0 +#define MAX_QP 51 +#define DEFAULT_QP 20 #define UBWC_CONFIG(mc, ml, hbb, bs1, bs2, bs3, bsp) \ { \ @@ -115,7 +119,18 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { MSM_VIDC_FMT_NV12C, BIT(MSM_VIDC_FMT_NV12) | BIT(MSM_VIDC_FMT_NV21) | BIT(MSM_VIDC_FMT_NV12C), MSM_VIDC_FMT_NV12C}, - {PIX_FMTS, ENC|DEC, HEVC, + {PIX_FMTS, ENC, HEVC, + MSM_VIDC_FMT_NV12, + MSM_VIDC_FMT_TP10C, + BIT(MSM_VIDC_FMT_NV12) | BIT(MSM_VIDC_FMT_NV21) | BIT(MSM_VIDC_FMT_NV12C ) | + BIT(MSM_VIDC_FMT_P010) | BIT(MSM_VIDC_FMT_TP10C), + MSM_VIDC_FMT_NV12C, + 0, 0, + CAP_FLAG_ROOT, + {0}, + {PROFILE, MIN_FRAME_QP, MAX_FRAME_QP, I_FRAME_QP}}, + + {PIX_FMTS, DEC, HEVC, MSM_VIDC_FMT_NV12, MSM_VIDC_FMT_TP10C, BIT(MSM_VIDC_FMT_NV12) | BIT(MSM_VIDC_FMT_NV21) | BIT(MSM_VIDC_FMT_NV12C ) | @@ -294,7 +309,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_CID_MPEG_VIDEO_BITRATE_MODE, HFI_PROP_RATE_CONTROL, CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, {LTR_COUNT, IR_RANDOM, TIME_DELTA_BASED_RC}, + {0}, {LTR_COUNT, IR_RANDOM, TIME_DELTA_BASED_RC, I_FRAME_QP}, msm_vidc_adjust_bitrate_mode, msm_vidc_set_u32_enum}, {LOSSLESS, ENC, HEVC, @@ -441,68 +456,85 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 0, 1000, 500, 0, V4L2_CID_MPEG_VIDEO_VBV_DELAY}, - // TODO: QP for 10 bits and review QP caps - - {MIN_FRAME_QP, ENC, HEVC, - 0, 51, 1, 20, - V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP, - HFI_PROP_MIN_QP_PACKED, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, - {MIN_FRAME_QP, ENC, H264, - 0, 51, 1, 20, + MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, V4L2_CID_MPEG_VIDEO_H264_MIN_QP, HFI_PROP_MIN_QP_PACKED, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + {0}, {0}, + NULL, msm_vidc_set_min_qp}, + + {MIN_FRAME_QP, ENC, HEVC, + MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, + V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP, + HFI_PROP_MIN_QP_PACKED, + CAP_FLAG_OUTPUT_PORT, + {PIX_FMTS}, {0}, + msm_vidc_adjust_hevc_min_qp, msm_vidc_set_min_qp}, {I_FRAME_MIN_QP, ENC, H264, - 0, 51, 1, 20, - V4L2_CID_MPEG_VIDEO_H264_I_FRAME_MIN_QP, - HFI_PROP_MIN_QP_PACKED, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, + V4L2_CID_MPEG_VIDEO_H264_I_FRAME_MIN_QP}, + + {I_FRAME_MIN_QP, ENC, HEVC, + MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, + V4L2_CID_MPEG_VIDC_HEVC_I_FRAME_MIN_QP}, {P_FRAME_MIN_QP, ENC, H264, - 0, 51, 1, 20, - V4L2_CID_MPEG_VIDEO_H264_P_FRAME_MIN_QP, - HFI_PROP_MIN_QP_PACKED, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, + V4L2_CID_MPEG_VIDEO_H264_P_FRAME_MIN_QP}, - // confirm codec - {B_FRAME_MIN_QP, ENC, HEVC|H264, - 0, 51, 1, 20, - V4L2_CID_MPEG_VIDC_B_FRAME_MIN_QP, - HFI_PROP_MIN_QP_PACKED, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + {P_FRAME_MIN_QP, ENC, HEVC, + MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, + V4L2_CID_MPEG_VIDC_HEVC_P_FRAME_MIN_QP}, + + {B_FRAME_MIN_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, + V4L2_CID_MPEG_VIDC_B_FRAME_MIN_QP}, + + {B_FRAME_MIN_QP, ENC, HEVC, + MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, + V4L2_CID_MPEG_VIDC_B_FRAME_MIN_QP}, {MAX_FRAME_QP, ENC, H264, - 0, 51, 1, 20, + MIN_QP_8BIT, MAX_QP, 1, MAX_QP, V4L2_CID_MPEG_VIDEO_H264_MAX_QP, HFI_PROP_MAX_QP_PACKED, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + {0}, {0}, + NULL, msm_vidc_set_min_qp}, {MAX_FRAME_QP, ENC, HEVC, - 0, 51, 1, 20, + MIN_QP_10BIT, MAX_QP, 1, MAX_QP, V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP, HFI_PROP_MAX_QP_PACKED, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + CAP_FLAG_OUTPUT_PORT, + {PIX_FMTS}, {0}, + msm_vidc_adjust_hevc_max_qp, msm_vidc_set_min_qp}, {I_FRAME_MAX_QP, ENC, H264, - 0, 51, 1, 20, - V4L2_CID_MPEG_VIDEO_H264_I_FRAME_MAX_QP, - HFI_PROP_MAX_QP_PACKED, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + MIN_QP_8BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_H264_I_FRAME_MAX_QP}, + + {I_FRAME_MAX_QP, ENC, HEVC, + MIN_QP_10BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDC_HEVC_I_FRAME_MAX_QP}, {P_FRAME_MAX_QP, ENC, H264, - 0, 51, 1, 20, - V4L2_CID_MPEG_VIDEO_H264_P_FRAME_MAX_QP, - HFI_PROP_MAX_QP_PACKED, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + MIN_QP_8BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_H264_P_FRAME_MAX_QP}, - {B_FRAME_MAX_QP, ENC, HEVC|H264, - 0, 51, 1, 20, - V4L2_CID_MPEG_VIDC_B_FRAME_MAX_QP, - HFI_PROP_MAX_QP_PACKED, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + {P_FRAME_MAX_QP, ENC, HEVC, + MIN_QP_10BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDC_HEVC_P_FRAME_MAX_QP}, + + {B_FRAME_MAX_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDC_B_FRAME_MAX_QP}, + + {B_FRAME_MAX_QP, ENC, HEVC, + MIN_QP_10BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDC_B_FRAME_MAX_QP}, {HEVC_HIER_QP, ENC, HEVC, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, @@ -511,50 +543,39 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { HFI_PROP_QP_PACKED, CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, - /* - * HEVC I_MIN_QP, I_MAX_QP, P_MIN_QP, P_MAX_QP, B_MIN_QP, B_MAX_QP are missing - */ {I_FRAME_QP, ENC, HEVC, - 0, 51, 1, 10, + MIN_QP_10BIT, MAX_QP, 1, DEFAULT_QP, V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP, HFI_PROP_QP_PACKED, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + CAP_FLAG_OUTPUT_PORT, + {PIX_FMTS, BITRATE_MODE}, {0}, + msm_vidc_adjust_hevc_frame_qp, msm_vidc_set_frame_qp}, {I_FRAME_QP, ENC, H264, - 0, 51, 1, 10, + MIN_QP_8BIT, MAX_QP, 1, DEFAULT_QP, V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP, HFI_PROP_QP_PACKED, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, - - {I_FRAME_QP, ENC, VP9, 0, 127, 1, 20}, + CAP_FLAG_OUTPUT_PORT, + {BITRATE_MODE}, {0}, + NULL, msm_vidc_set_frame_qp}, {P_FRAME_QP, ENC, HEVC, - 0, 51, 1, 20, - V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP, - HFI_PROP_QP_PACKED, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + MIN_QP_10BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP}, {P_FRAME_QP, ENC, H264, - 0, 51, 1, 20, - V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP, - HFI_PROP_QP_PACKED, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + MIN_QP_8BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP}, {P_FRAME_QP, ENC, VP9, 0, 127, 1, 40}, {B_FRAME_QP, ENC, HEVC, - 0, 51, 1, 20, - V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP, - HFI_PROP_QP_PACKED, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + MIN_QP_10BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP}, {B_FRAME_QP, ENC, H264, - 0, 51, 1, 20, - V4L2_CID_MPEG_VIDEO_H264_B_FRAME_QP, - HFI_PROP_QP_PACKED, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, - - {B_FRAME_QP, ENC, VP9, 0, 127, 1, 40}, + MIN_QP_8BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_H264_B_FRAME_QP}, {L0_QP, ENC, HEVC, 0, 51, 1, 20, diff --git a/driver/vidc/inc/msm_vidc_control.h b/driver/vidc/inc/msm_vidc_control.h index 005b63f8db..85c465725c 100644 --- a/driver/vidc/inc/msm_vidc_control.h +++ b/driver/vidc/inc/msm_vidc_control.h @@ -28,12 +28,21 @@ int msm_vidc_adjust_mark_ltr(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_ir_random(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_delta_based_rc(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_transform_8x8(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_hevc_min_qp(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_hevc_max_qp(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_hevc_frame_qp(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_v4l2_properties(struct msm_vidc_inst *inst); int msm_vidc_set_header_mode(void *instance, enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_deblock_mode(void *instance, enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_min_qp(void *instance, + enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_max_qp(void *instance, + enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_frame_qp(void *instance, + enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_u32(void *instance, enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_u32_enum(void *instance, diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 4d9fba31c5..2827b261bd 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -11,6 +11,11 @@ #include "msm_vidc_internal.h" #include "msm_vidc_driver.h" +#define CAP_TO_8BIT_QP(a) { \ + if ((a) < 0) \ + (a) = 0; \ +} + static bool is_priv_ctrl(u32 id) { if (IS_PRIV_CTRL(id)) @@ -191,6 +196,14 @@ static const char *msm_vidc_get_priv_ctrl_name(u32 sid, u32 control_id) return "Encoder QP Metadata"; case V4L2_CID_MPEG_VIDC_MIN_BITSTREAM_SIZE_OVERWRITE: return "Bitstream Size Overwrite"; + case V4L2_CID_MPEG_VIDC_HEVC_I_FRAME_MIN_QP: + return "HEVC I Frame Min QP"; + case V4L2_CID_MPEG_VIDC_HEVC_P_FRAME_MIN_QP: + return "HEVC P Frame Min QP"; + case V4L2_CID_MPEG_VIDC_HEVC_I_FRAME_MAX_QP: + return "HEVC I Frame Max QP"; + case V4L2_CID_MPEG_VIDC_HEVC_P_FRAME_MAX_QP: + return "HEVC P Frame Max QP"; default: s_vpr_e(sid, "%s: ctrl name not available for ctrl id %#x\n", __func__, control_id); @@ -337,14 +350,54 @@ static int msm_vidc_get_parent_value(struct msm_vidc_inst* inst, *value = inst->capabilities->cap[parent].value; } else { s_vpr_e(inst->sid, - "%s: missing parent %d, please correct database\n", - func, parent); + "%s: missing parent %d for cap %d, please correct database\n", + func, parent, cap); rc = -EINVAL; } return rc; } +static int msm_vidc_adjust_hevc_qp(struct msm_vidc_inst *inst, + enum msm_vidc_inst_capability_type cap_id) +{ + struct msm_vidc_inst_capability *capability; + s32 pix_fmt = -1; + + capability = inst->capabilities; + + if (inst->codec != MSM_VIDC_HEVC) { + s_vpr_e(inst->sid, + "%s: incorrect entry in database for cap %d. fix the database\n", + __func__, cap_id); + return -EINVAL; + } + + if (msm_vidc_get_parent_value(inst, cap_id, + PIX_FMTS, &pix_fmt, __func__)) + return -EINVAL; + + if (pix_fmt == MSM_VIDC_FMT_P010 || pix_fmt == MSM_VIDC_FMT_TP10C) + goto exit; + + CAP_TO_8BIT_QP(capability->cap[cap_id].value); + if (cap_id == MIN_FRAME_QP) { + CAP_TO_8BIT_QP(capability->cap[I_FRAME_MIN_QP].value); + CAP_TO_8BIT_QP(capability->cap[P_FRAME_MIN_QP].value); + CAP_TO_8BIT_QP(capability->cap[B_FRAME_MIN_QP].value); + } else if (cap_id == MAX_FRAME_QP) { + CAP_TO_8BIT_QP(capability->cap[I_FRAME_MAX_QP].value); + CAP_TO_8BIT_QP(capability->cap[P_FRAME_MAX_QP].value); + CAP_TO_8BIT_QP(capability->cap[B_FRAME_MAX_QP].value); + } else if (cap_id == I_FRAME_QP) { + CAP_TO_8BIT_QP(capability->cap[P_FRAME_QP].value); + CAP_TO_8BIT_QP(capability->cap[B_FRAME_QP].value); + } + +exit: + return 0; +} + static int msm_vidc_adjust_property(struct msm_vidc_inst *inst, enum msm_vidc_inst_capability_type cap_id) { @@ -1015,6 +1068,57 @@ int msm_vidc_adjust_transform_8x8(void *instance, struct v4l2_ctrl *ctrl) return 0; } +int msm_vidc_adjust_hevc_min_qp(void *instance, struct v4l2_ctrl *ctrl) +{ + int rc = 0; + struct msm_vidc_inst_capability *capability; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + rc = msm_vidc_adjust_hevc_qp(inst, MIN_FRAME_QP); + + return rc; +} + +int msm_vidc_adjust_hevc_max_qp(void *instance, struct v4l2_ctrl *ctrl) +{ + int rc = 0; + struct msm_vidc_inst_capability *capability; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + rc = msm_vidc_adjust_hevc_qp(inst, MAX_FRAME_QP); + + return rc; +} + +int msm_vidc_adjust_hevc_frame_qp(void *instance, struct v4l2_ctrl *ctrl) +{ + int rc = 0; + struct msm_vidc_inst_capability *capability; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + rc = msm_vidc_adjust_hevc_qp(inst, I_FRAME_QP); + + return rc; +} + /* * Loop over instance capabilities with CAP_FLAG_ROOT * and call adjust function, where @@ -1114,7 +1218,7 @@ int msm_vidc_set_deblock_mode(void *instance, int rc = 0; struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; s32 alpha = 0, beta = 0; - u32 lf_mode, hfi_value = 0, lf_offset = 12; + u32 lf_mode, hfi_value = 0, lf_offset = 6; struct msm_vidc_inst_capability *capability; if (!inst || !inst->capabilities) { @@ -1127,11 +1231,6 @@ int msm_vidc_set_deblock_mode(void *instance, if (rc) return -EINVAL; - /* - * TODO: Revisit once s32 packing problem is fixed in hfi interface. - * For now, using offset value as 6 to shift alpha, beta ranges - * to (0 to 12) from (-6 to 6) - */ beta = inst->capabilities->cap[LF_BETA].value + lf_offset; alpha = inst->capabilities->cap[LF_ALPHA].value + lf_offset; @@ -1165,6 +1264,169 @@ int msm_vidc_set_use_and_mark_ltr(void *instance, return rc; } +int msm_vidc_set_min_qp(void *instance, + enum msm_vidc_inst_capability_type cap_id) +{ + int rc = 0; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; + struct msm_vidc_inst_capability *capability; + s32 i_frame_qp = 0, p_frame_qp = 0, b_frame_qp = 0, min_qp_enable = 0; + u32 i_qp_enable = 0, p_qp_enable = 0, b_qp_enable = 0; + u32 client_qp_enable = 0, hfi_value = 0, offset = 0; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + min_qp_enable = + capability->cap[MIN_FRAME_QP].flags & CAP_FLAG_CLIENT_SET; + + i_qp_enable = min_qp_enable || + capability->cap[I_FRAME_MIN_QP].flags & CAP_FLAG_CLIENT_SET; + p_qp_enable = min_qp_enable || + capability->cap[P_FRAME_MIN_QP].flags & CAP_FLAG_CLIENT_SET; + b_qp_enable = min_qp_enable || + capability->cap[B_FRAME_MIN_QP].flags & CAP_FLAG_CLIENT_SET; + + client_qp_enable = i_qp_enable | p_qp_enable << 1 | b_qp_enable << 2; + if (!client_qp_enable) + return 0; + + if (is_10bit_colorformat(capability->cap[PIX_FMTS].value)) + offset = 12; + + /* + * I_FRAME_MIN_QP, P_FRAME_MIN_QP, B_FRAME_MIN_QP, + * MIN_FRAME_QP caps have default value as MIN_QP_10BIT values. + * Hence, if client sets either one among MIN_FRAME_QP + * and (I_FRAME_MIN_QP or P_FRAME_MIN_QP or B_FRAME_MIN_QP), + * max of both caps will result into client set value. + */ + i_frame_qp = max(capability->cap[I_FRAME_MIN_QP].value, + capability->cap[MIN_FRAME_QP].value) + offset; + p_frame_qp = max(capability->cap[P_FRAME_MIN_QP].value, + capability->cap[MIN_FRAME_QP].value) + offset; + b_frame_qp = max(capability->cap[B_FRAME_MIN_QP].value, + capability->cap[MIN_FRAME_QP].value) + offset; + + hfi_value = i_frame_qp | p_frame_qp << 8 | b_frame_qp << 16 | + client_qp_enable << 24; + rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_32_PACKED, + &hfi_value, sizeof(u32), __func__); + + return rc; +} + +int msm_vidc_set_max_qp(void *instance, + enum msm_vidc_inst_capability_type cap_id) +{ + int rc = 0; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; + struct msm_vidc_inst_capability *capability; + s32 i_frame_qp = 0, p_frame_qp = 0, b_frame_qp = 0, max_qp_enable = 0; + u32 i_qp_enable = 0, p_qp_enable = 0, b_qp_enable = 0; + u32 client_qp_enable = 0, hfi_value = 0, offset = 0; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + max_qp_enable = + capability->cap[MAX_FRAME_QP].flags & CAP_FLAG_CLIENT_SET; + + i_qp_enable = max_qp_enable || + capability->cap[I_FRAME_MIN_QP].flags & CAP_FLAG_CLIENT_SET; + p_qp_enable = max_qp_enable || + capability->cap[P_FRAME_MIN_QP].flags & CAP_FLAG_CLIENT_SET; + b_qp_enable = max_qp_enable || + capability->cap[B_FRAME_MIN_QP].flags & CAP_FLAG_CLIENT_SET; + + client_qp_enable = i_qp_enable | p_qp_enable << 1 | b_qp_enable << 2; + if (!client_qp_enable) + return 0; + + if (is_10bit_colorformat(capability->cap[PIX_FMTS].value)) + offset = 12; + + /* + * I_FRAME_MAX_QP, P_FRAME_MAX_QP, B_FRAME_MAX_QP, + * MAX_FRAME_QP caps have default value as MAX_QP values. + * Hence, if client sets either one among MAX_FRAME_QP + * and (I_FRAME_MAX_QP or P_FRAME_MAX_QP or B_FRAME_MAX_QP), + * min of both caps will result into client set value. + */ + i_frame_qp = min(capability->cap[I_FRAME_MAX_QP].value, + capability->cap[MAX_FRAME_QP].value) + offset; + p_frame_qp = min(capability->cap[P_FRAME_MAX_QP].value, + capability->cap[MAX_FRAME_QP].value) + offset; + b_frame_qp = min(capability->cap[B_FRAME_MAX_QP].value, + capability->cap[MAX_FRAME_QP].value) + offset; + + hfi_value = i_frame_qp | p_frame_qp << 8 | b_frame_qp << 16 | + client_qp_enable << 24; + rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_32_PACKED, + &hfi_value, sizeof(u32), __func__); + + return rc; +} + +int msm_vidc_set_frame_qp(void *instance, + enum msm_vidc_inst_capability_type cap_id) +{ + int rc = 0; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; + struct msm_vidc_inst_capability *capab; + s32 i_frame_qp = 0, p_frame_qp = 0, b_frame_qp = 0; + u32 i_qp_enable = 0, p_qp_enable = 0, b_qp_enable = 0; + u32 client_qp_enable = 0, hfi_value = 0, offset = 0; + s32 rc_type = -1; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capab = inst->capabilities; + + if (msm_vidc_get_parent_value(inst, I_FRAME_QP, + BITRATE_MODE, &rc_type, __func__)) + return -EINVAL; + + if (rc_type == HFI_RC_OFF) { + /* Mandatorily set for rc off case */ + i_qp_enable = p_qp_enable = b_qp_enable = 1; + } else { + /* Set only if client has set for NON rc off case */ + i_qp_enable = + capab->cap[I_FRAME_QP].flags & CAP_FLAG_CLIENT_SET; + p_qp_enable = + capab->cap[P_FRAME_QP].flags & CAP_FLAG_CLIENT_SET; + b_qp_enable = + capab->cap[B_FRAME_QP].flags & CAP_FLAG_CLIENT_SET; + } + + client_qp_enable = i_qp_enable | p_qp_enable << 1 | b_qp_enable << 2; + if (!client_qp_enable) + return 0; + + if (is_10bit_colorformat(capab->cap[PIX_FMTS].value)) + offset = 12; + + i_frame_qp = capab->cap[I_FRAME_QP].value + offset; + p_frame_qp = capab->cap[P_FRAME_QP].value + offset; + b_frame_qp = capab->cap[B_FRAME_QP].value + offset; + + hfi_value = i_frame_qp | p_frame_qp << 8 | b_frame_qp << 16 | + client_qp_enable << 24; + rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_32_PACKED, + &hfi_value, sizeof(u32), __func__); + + return rc; +} + /* TODO int msm_vidc_set_flip(void *instance, enum msm_vidc_inst_capability_type cap_id) diff --git a/include/uapi/vidc/media/v4l2_vidc_extensions.h b/include/uapi/vidc/media/v4l2_vidc_extensions.h index 53e09c17be..3b6c4d751e 100644 --- a/include/uapi/vidc/media/v4l2_vidc_extensions.h +++ b/include/uapi/vidc/media/v4l2_vidc_extensions.h @@ -106,6 +106,16 @@ enum v4l2_mpeg_vidc_blur_types { #define V4L2_CID_MPEG_VIDC_MIN_BITSTREAM_SIZE_OVERWRITE \ (V4L2_CID_MPEG_VIDC_BASE + 0x23) +/* Deprecate below controls once they are available in upstream */ +#define V4L2_CID_MPEG_VIDC_HEVC_I_FRAME_MIN_QP \ + (V4L2_CID_MPEG_VIDC_BASE + 0x24) +#define V4L2_CID_MPEG_VIDC_HEVC_P_FRAME_MIN_QP \ + (V4L2_CID_MPEG_VIDC_BASE + 0x25) +#define V4L2_CID_MPEG_VIDC_HEVC_I_FRAME_MAX_QP \ + (V4L2_CID_MPEG_VIDC_BASE + 0x26) +#define V4L2_CID_MPEG_VIDC_HEVC_P_FRAME_MAX_QP \ + (V4L2_CID_MPEG_VIDC_BASE + 0x27) + enum v4l2_mpeg_vidc_metapayload_header_flags { METADATA_FLAGS_NONE = 0, METADATA_FLAGS_TOP_FIELD = (1 << 0), From b7fb5cfaa00887799646bf40784748fe566139fc Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Thu, 21 Jan 2021 13:36:12 -0800 Subject: [PATCH 0073/1061] video: driver: disable fw logs by default disable all fw logs by default except FW_ERROR and FW_ERROR. Change-Id: I90f62ca72684f326872cbe5cd87444d237d360be Signed-off-by: Akshata Sahukar --- driver/vidc/src/msm_vidc_debug.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/driver/vidc/src/msm_vidc_debug.c b/driver/vidc/src/msm_vidc_debug.c index 1b32b790cc..b9f706d34c 100644 --- a/driver/vidc/src/msm_vidc_debug.c +++ b/driver/vidc/src/msm_vidc_debug.c @@ -6,8 +6,7 @@ #include "msm_vidc_debug.h" int msm_vidc_debug = VIDC_HIGH | VIDC_PKT | VIDC_ERR | VIDC_PRINTK | - FW_ERROR | FW_FATAL | FW_FTRACE | FW_LOW | FW_MED | FW_HIGH | - FW_PERF | FW_PRINTK; + FW_ERROR | FW_FATAL; EXPORT_SYMBOL(msm_vidc_debug); bool msm_vidc_lossless_encode = !true; From 4cf4cc9a01ebe0232355f94265039515b74e22ee Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Fri, 22 Jan 2021 11:31:50 -0800 Subject: [PATCH 0074/1061] video: driver: fix decoder testcase timeout issue Decoder full reconfig testcase timeouts and fails with fw logs disabled. Set only interrupt required flag without response required flag for HFI_CMD_BUFFER to fix this issue. Change-Id: I5509372fe34cbea8a62d7d9cb7f541ee2d6e1e15 Signed-off-by: Akshata Sahukar --- driver/vidc/src/venus_hfi.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index 0381099bab..4bb13e4ab5 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -2913,7 +2913,8 @@ int venus_hfi_session_command(struct msm_vidc_inst *inst, rc = hfi_create_packet(inst->packet, inst->packet_size, cmd, - HFI_HOST_FLAGS_NONE, + (HFI_HOST_FLAGS_RESPONSE_REQUIRED | + HFI_HOST_FLAGS_INTR_REQUIRED), payload_type, get_hfi_port(inst, port), core->packet_id++, @@ -2962,7 +2963,7 @@ int venus_hfi_queue_buffer(struct msm_vidc_inst *inst, rc = hfi_create_packet(inst->packet, inst->packet_size, HFI_CMD_BUFFER, - HFI_HOST_FLAGS_NONE, + HFI_HOST_FLAGS_INTR_REQUIRED, HFI_PAYLOAD_STRUCTURE, get_hfi_port_from_buffer_type(inst, buffer->type), core->packet_id++, @@ -2978,7 +2979,7 @@ int venus_hfi_queue_buffer(struct msm_vidc_inst *inst, rc = hfi_create_packet(inst->packet, inst->packet_size, HFI_CMD_BUFFER, - HFI_HOST_FLAGS_NONE, + HFI_HOST_FLAGS_INTR_REQUIRED, HFI_PAYLOAD_STRUCTURE, get_hfi_port_from_buffer_type(inst, metabuf->type), core->packet_id++, From 3b10d3f3d8e984bd53002b3325f8215cb6212389 Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Fri, 22 Jan 2021 13:21:26 -0800 Subject: [PATCH 0075/1061] video: driver: internal buffer size for h264d add internal buffer size change for h264 decoder. Change-Id: Idc5aa592ff7cd5a04c5e982becb128e626455ef2 Signed-off-by: Darshana Patil --- driver/variant/iris2/inc/hfi_buffer_iris2.h | 12 ++++-------- driver/variant/iris2/src/msm_vidc_buffer_iris2.c | 4 ++-- 2 files changed, 6 insertions(+), 10 deletions(-) diff --git a/driver/variant/iris2/inc/hfi_buffer_iris2.h b/driver/variant/iris2/inc/hfi_buffer_iris2.h index 34d513c4bf..414b185949 100644 --- a/driver/variant/iris2/inc/hfi_buffer_iris2.h +++ b/driver/variant/iris2/inc/hfi_buffer_iris2.h @@ -659,17 +659,12 @@ typedef HFI_U32 HFI_BOOL; _size = HFI_ALIGN(_size_bse, VENUS_DMA_ALIGNMENT) + \ HFI_ALIGN(_size_vpp, VENUS_DMA_ALIGNMENT) + \ HFI_ALIGN(SIZE_HW_PIC(SIZE_H264D_HW_PIC_T), \ - VENUS_DMA_ALIGNMENT)+ HFI_ALIGN(SIZE_H264D_QP\ - (frame_width, frame_height), VENUS_DMA_ALIGNMENT); \ + VENUS_DMA_ALIGNMENT); \ _size = HFI_ALIGN(_size, VENUS_DMA_ALIGNMENT); \ } while (0) -/* - * _yuv_bufcount_min = MAX(Min YUV Buffer count, - * (HFI_PROPERTY_PARAM_VDEC_VPP_DELAY + 1)) - */ #define HFI_BUFFER_LINE_H264D(_size, frame_width, frame_height, \ - _yuv_bufcount_min, is_opb, num_vpp_pipes) \ + is_opb, num_vpp_pipes) \ do \ { \ HFI_U32 vpss_lb_size = 0; \ @@ -690,7 +685,8 @@ typedef HFI_U32 HFI_BOOL; frame_height), VENUS_DMA_ALIGNMENT) + \ HFI_ALIGN(SIZE_H264D_LB_RECON_DMA_METADATA_WR\ (frame_width, frame_height), \ - VENUS_DMA_ALIGNMENT) * 2; \ + VENUS_DMA_ALIGNMENT) * 2 + HFI_ALIGN(SIZE_H264D_QP\ + (frame_width, frame_height), VENUS_DMA_ALIGNMENT); \ _size = HFI_ALIGN(_size, VENUS_DMA_ALIGNMENT); \ if (is_opb) \ { \ diff --git a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c index fea9826954..dd79e30cd5 100644 --- a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c @@ -156,8 +156,8 @@ static u32 msm_vidc_decoder_line_size_iris2(struct msm_vidc_inst *inst) out_min_count = max(vpp_delay + 1, out_min_count); if (inst->codec == MSM_VIDC_H264) - HFI_BUFFER_LINE_H264D(size, width, height, out_min_count, - is_opb, num_vpp_pipes); + HFI_BUFFER_LINE_H264D(size, width, height, is_opb, + num_vpp_pipes); else if (inst->codec == MSM_VIDC_HEVC) HFI_BUFFER_LINE_H265D(size, width, height, is_opb, num_vpp_pipes); From 4765d28baa6c773439a6f28e7ad38609b965e5af Mon Sep 17 00:00:00 2001 From: Maheshwar Ajja Date: Thu, 21 Jan 2021 14:01:10 -0800 Subject: [PATCH 0076/1061] video: driver: assign session id as hash value Use hashed value for session id to over come the same session ids being used concurrently where one session is being closed and the other session opening might be getting same session id. Change-Id: I0bba056f26e404a7ff3b92ca9a81e673a0a6802f Signed-off-by: Maheshwar Ajja --- driver/vidc/src/msm_vidc_driver.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 9dad8957bc..37b1918f9f 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -5,6 +5,7 @@ #include #include +#include #include #include "msm_media_info.h" @@ -1994,7 +1995,7 @@ int msm_vidc_add_session(struct msm_vidc_inst *inst) mutex_unlock(&core->lock); /* assign session_id */ - inst->session_id = count + 1; + inst->session_id = hash32_ptr(inst); inst->sid = inst->session_id; return rc; From 852608fcc3f877490c0cf59f8155efc7d34b434c Mon Sep 17 00:00:00 2001 From: Chinmay Sawarkar Date: Wed, 13 Jan 2021 17:45:43 -0800 Subject: [PATCH 0077/1061] waipio: driver: Add support for fw unload and power collapse If required, Firmware can be unloaded after every session. Power collapse is enabled by default. Change-Id: Ie014a26ae600816d8713cd34826f1f9a77088e4a Signed-off-by: Chinmay Sawarkar --- driver/platform/waipio/src/msm_vidc_waipio.c | 6 +-- driver/vidc/inc/msm_vidc_driver.h | 3 +- driver/vidc/src/msm_vidc.c | 6 +++ driver/vidc/src/msm_vidc_driver.c | 47 +++++++++++++++++--- driver/vidc/src/venus_hfi_response.c | 2 +- 5 files changed, 52 insertions(+), 12 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index fde836d1dd..ecb58aada1 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -61,10 +61,10 @@ static struct msm_platform_core_capability core_data_waipio[] = { {MAX_MBPF_B_FRAME, 32640}, /* 3840x2176/256 */ {MAX_MBPS_B_FRAME, 1958400}, /* 3840x2176/256 MBs@60fps */ {NUM_VPP_PIPE, 4}, - {SW_PC, 0}, - {SW_PC_DELAY, 1500}, /* 1500 ms */ + {SW_PC, 1}, + {SW_PC_DELAY, 20000}, /* 20000 ms (>HW_RESPONSE_TIMEOUT)*/ {FW_UNLOAD, 0}, - {FW_UNLOAD_DELAY, 1000}, /* 1000 ms */ + {FW_UNLOAD_DELAY, 25000}, /* 25000 ms (>PC_DELAY)*/ {HW_RESPONSE_TIMEOUT, 15000}, /* 1000 ms */ {DEBUG_TIMEOUT, 0}, // TODO: review below entries, and if required rename as PREFETCH diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index fef4fb7454..f8100a3314 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -226,7 +226,7 @@ int msm_vidc_get_inst_capability(struct msm_vidc_inst *inst); int msm_vidc_change_core_state(struct msm_vidc_core *core, enum msm_vidc_core_state request_state, const char *func); int msm_vidc_core_init(struct msm_vidc_core *core); -int msm_vidc_core_deinit(struct msm_vidc_core *core); +int msm_vidc_core_deinit(struct msm_vidc_core *core, bool force); int msm_vidc_core_timeout(struct msm_vidc_core *core); int msm_vidc_smmu_fault_handler(struct iommu_domain *domain, struct device *dev, unsigned long iova, int flags, void *data); @@ -298,5 +298,6 @@ void inst_lock(struct msm_vidc_inst *inst, const char *function); void inst_unlock(struct msm_vidc_inst *inst, const char *function); bool inst_lock_check(struct msm_vidc_inst *inst, const char *function); int msm_vidc_update_meta_port_settings(struct msm_vidc_inst *inst); +void msm_vidc_schedule_core_deinit(struct msm_vidc_core *core); #endif // _MSM_VIDC_DRIVER_H_ diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index 31cbe069e2..47739399dc 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -817,11 +817,15 @@ int msm_vidc_close(void *instance) { int rc = 0; struct msm_vidc_inst *inst = instance; + struct msm_vidc_core *core; if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } + + core = inst->core; + s_vpr_h(inst->sid, "%s()\n", __func__); mutex_lock(&inst->lock); msm_vidc_session_close(inst); @@ -829,6 +833,8 @@ int msm_vidc_close(void *instance) msm_vidc_destroy_buffers(inst); mutex_unlock(&inst->lock); put_inst(inst); + msm_vidc_schedule_core_deinit(core); + return rc; } EXPORT_SYMBOL(msm_vidc_close); diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 9dad8957bc..a6517e1c27 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -442,11 +442,6 @@ int msm_vidc_change_core_state(struct msm_vidc_core *core, return -EINVAL; } - if (!request_state) { - d_vpr_e("%s: invalid core request state\n", func); - return -EINVAL; - } - d_vpr_h("%s: core state changed from %s to %s\n", func, core_state_name(core->state), core_state_name(request_state)); @@ -2457,7 +2452,7 @@ error: return rc; } -int msm_vidc_core_deinit(struct msm_vidc_core *core) +int msm_vidc_core_deinit(struct msm_vidc_core *core, bool force) { int rc = 0; struct msm_vidc_inst *inst, *dummy; @@ -2466,10 +2461,14 @@ int msm_vidc_core_deinit(struct msm_vidc_core *core) d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } + mutex_lock(&core->lock); d_vpr_h("%s()\n", __func__); if (core->state == MSM_VIDC_CORE_DEINIT) goto unlock; + if (!force) + if (!list_empty(&core->instances)) + goto unlock; venus_hfi_core_deinit(core); msm_vidc_deinit_instance_caps(core); @@ -2542,7 +2541,7 @@ unlock: int msm_vidc_core_timeout(struct msm_vidc_core *core) { - return msm_vidc_core_deinit(core); + return msm_vidc_core_deinit(core, true); } int msm_vidc_smmu_fault_handler(struct iommu_domain *domain, @@ -2567,6 +2566,20 @@ void msm_vidc_pm_work_handler(struct work_struct *work) void msm_vidc_fw_unload_handler(struct work_struct *work) { + struct msm_vidc_core *core = NULL; + int rc = 0; + + core = container_of(work, struct msm_vidc_core, fw_unload_work.work); + if (!core) { + d_vpr_e("%s: invalid work or core handle\n", __func__); + return; + } + + d_vpr_h("%s: deinitializing video core\n",__func__); + rc = msm_vidc_core_deinit(core, false); + if (rc) + d_vpr_e("%s: Failed to deinit core\n", __func__); + } void msm_vidc_batch_handler(struct work_struct *work) @@ -2811,3 +2824,23 @@ int msm_vidc_update_meta_port_settings(struct msm_vidc_inst *inst) } return 0; } + +void msm_vidc_schedule_core_deinit(struct msm_vidc_core *core) +{ + if (!core) + return; + + if (!core->capabilities[FW_UNLOAD].value) + return; + + cancel_delayed_work(&core->fw_unload_work); + + schedule_delayed_work(&core->fw_unload_work, + msecs_to_jiffies(core->capabilities[FW_UNLOAD_DELAY].value)); + + d_vpr_h("firmware unload delayed by %u ms\n", + core->capabilities[FW_UNLOAD_DELAY].value); + + return; +} + diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index 92095e64c9..84a3757736 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -230,7 +230,7 @@ static int handle_system_error(struct msm_vidc_core *core, struct hfi_packet *pkt) { d_vpr_e("%s: system error received\n", __func__); - msm_vidc_core_deinit(core); + msm_vidc_core_deinit(core, true); return 0; } From 59813f951dd528f3602adc7c738ba63216e052dc Mon Sep 17 00:00:00 2001 From: Mihir Ganu Date: Fri, 22 Jan 2021 17:06:18 -0800 Subject: [PATCH 0078/1061] video: driver: Update interlace metadata UAPI Update UAPI for interlace metadata and add better logging for metadata qbuf. Change-Id: Icd56872ffea7444a1b8f3c5c1bb61495552659b4 Signed-off-by: Mihir Ganu --- driver/vidc/src/msm_vidc_driver.c | 3 +-- include/uapi/vidc/media/v4l2_vidc_extensions.h | 9 +++++++++ 2 files changed, 10 insertions(+), 2 deletions(-) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 37b1918f9f..52d7c2c14c 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -1457,8 +1457,7 @@ int msm_vidc_queue_buffer(struct msm_vidc_inst *inst, struct vb2_buffer *vb2) if (buf->type == MSM_VIDC_BUF_INPUT_META || buf->type == MSM_VIDC_BUF_OUTPUT_META) { buf->attr |= MSM_VIDC_ATTR_DEFERRED; - s_vpr_l(inst->sid, "metabuf fd %3d daddr %#x deferred\n", - buf->fd, buf->device_addr); + print_vidc_buffer(VIDC_HIGH, "qbuf deferred", inst, buf); return 0; } diff --git a/include/uapi/vidc/media/v4l2_vidc_extensions.h b/include/uapi/vidc/media/v4l2_vidc_extensions.h index 3b6c4d751e..be3c7293e0 100644 --- a/include/uapi/vidc/media/v4l2_vidc_extensions.h +++ b/include/uapi/vidc/media/v4l2_vidc_extensions.h @@ -153,6 +153,15 @@ enum v4l2_mpeg_vidc_metadata { METADATA_ENC_QP_METADATA = 0x0300016e, METADATA_ROI_INFO = 0x03000173, }; +enum meta_interlace_info { + META_INTERLACE_INFO_NONE = 0x00000000, + META_INTERLACE_FRAME_PROGRESSIVE = 0x00000001, + META_INTERLACE_FRAME_MBAFF = 0x00000002, + META_INTERLACE_FRAME_INTERLEAVE_TOPFIELD_FIRST = 0x00000004, + META_INTERLACE_FRAME_INTERLEAVE_BOTTOMFIELD_FIRST = 0x00000008, + META_INTERLACE_FRAME_INTERLACE_TOPFIELD_FIRST = 0x00000010, + META_INTERLACE_FRAME_INTERLACE_BOTTOMFIELD_FIRST = 0x00000020, +}; /* vendor controls end */ From 60b7435a4cab18eeed756473c27456c71f219109 Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Tue, 12 Jan 2021 12:23:57 -0800 Subject: [PATCH 0079/1061] video: driver: add nv12 format support add nv12 format support Change-Id: I6a9f2eb814504e35797fb91053417f16cfdf8b25 Signed-off-by: Darshana Patil --- driver/variant/iris2/inc/hfi_buffer_iris2.h | 26 ++--- .../variant/iris2/src/msm_vidc_buffer_iris2.c | 99 ++++++++++++++++- driver/vidc/inc/msm_vidc_driver.h | 2 +- driver/vidc/src/msm_vdec.c | 102 ++++++++++++++++-- driver/vidc/src/msm_vidc_driver.c | 4 +- driver/vidc/src/venus_hfi_response.c | 43 ++++++++ 6 files changed, 246 insertions(+), 30 deletions(-) diff --git a/driver/variant/iris2/inc/hfi_buffer_iris2.h b/driver/variant/iris2/inc/hfi_buffer_iris2.h index 414b185949..a6765bd014 100644 --- a/driver/variant/iris2/inc/hfi_buffer_iris2.h +++ b/driver/variant/iris2/inc/hfi_buffer_iris2.h @@ -155,8 +155,8 @@ typedef HFI_U32 HFI_BOOL; * frame dimensions NV12_UBWC format (including interlace UBWC) * (calculation includes all data & metadata planes) */ -#define HFI_NV12_UBWC_IL_CALC_BUF_SIZE_V2 \ - (buf_size, frame_width, frame_height, y_stride_multiple,\ +#define HFI_NV12_UBWC_IL_CALC_BUF_SIZE_V2(buf_size,\ + frame_width, frame_height, y_stride_multiple,\ y_buffer_height_multiple, uv_stride_multiple, \ uv_buffer_height_multiple, y_metadata_stride_multiple, \ y_metadata_buffer_height_multiple, \ @@ -164,35 +164,35 @@ typedef HFI_U32 HFI_BOOL; do \ { \ HFI_U32 y_buf_size, uv_buf_size, y_meta_size, uv_meta_size; \ - HFI_U32 stride, height; \ - HFI_U32 halfHeight = (frame_height + 1) >> 1; \ + HFI_U32 stride, _height; \ + HFI_U32 half_height = (frame_height + 1) >> 1; \ HFI_NV12_IL_CALC_Y_STRIDE(stride, frame_width,\ y_stride_multiple); \ - HFI_NV12_IL_CALC_Y_BUFHEIGHT(height, half_height,\ + HFI_NV12_IL_CALC_Y_BUFHEIGHT(_height, half_height,\ y_buffer_height_multiple); \ - HFI_NV12_UBWC_IL_CALC_Y_BUF_SIZE(y_buf_size, stride, height);\ + HFI_NV12_UBWC_IL_CALC_Y_BUF_SIZE(y_buf_size, stride, _height);\ HFI_NV12_IL_CALC_UV_STRIDE(stride, frame_width, \ uv_stride_multiple); \ - HFI_NV12_IL_CALC_UV_BUFHEIGHT(height, half_height, \ + HFI_NV12_IL_CALC_UV_BUFHEIGHT(_height, half_height, \ uv_buffer_height_multiple); \ - HFI_NV12_UBWC_IL_CALC_UV_BUF_SIZE(uv_buf_size, stride, height);\ + HFI_NV12_UBWC_IL_CALC_UV_BUF_SIZE(uv_buf_size, stride, _height);\ HFI_UBWC_CALC_METADATA_PLANE_STRIDE(stride, frame_width,\ y_metadata_stride_multiple, \ HFI_COLOR_FORMAT_YUV420_NV12_UBWC_Y_TILE_WIDTH);\ - HFI_UBWC_METADATA_PLANE_BUFHEIGHT(height, half_height, \ + HFI_UBWC_METADATA_PLANE_BUFHEIGHT(_height, half_height, \ y_metadata_buffer_height_multiple,\ HFI_COLOR_FORMAT_YUV420_NV12_UBWC_Y_TILE_HEIGHT);\ HFI_UBWC_METADATA_PLANE_BUFFER_SIZE(y_meta_size, stride, \ - height); \ + _height); \ HFI_UBWC_UV_METADATA_PLANE_STRIDE(stride, frame_width,\ uv_metadata_stride_multiple, \ HFI_COLOR_FORMAT_YUV420_NV12_UBWC_UV_TILE_WIDTH); \ - HFI_UBWC_UV_METADATA_PLANE_BUFHEIGHT(height, half_height,\ + HFI_UBWC_UV_METADATA_PLANE_BUFHEIGHT(_height, half_height,\ uv_metadata_buffer_height_multiple,\ HFI_COLOR_FORMAT_YUV420_NV12_UBWC_UV_TILE_HEIGHT);\ HFI_UBWC_METADATA_PLANE_BUFFER_SIZE(uv_meta_size, stride, \ - height); \ - bufSize = (y_buf_size + uv_buf_size + y_meta_size + \ + _height); \ + buf_size = (y_buf_size + uv_buf_size + y_meta_size + \ uv_meta_size) << 1;\ } while (0) diff --git a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c index dd79e30cd5..0cc1b33332 100644 --- a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c @@ -12,6 +12,7 @@ #include "msm_vidc_platform.h" #include "msm_vidc_driver.h" #include "msm_vidc_debug.h" +#include "msm_media_info.h" static u32 msm_vidc_decoder_bin_size_iris2(struct msm_vidc_inst *inst) { @@ -189,6 +190,51 @@ static u32 msm_vidc_decoder_persist_size_iris2(struct msm_vidc_inst *inst) return size; } +static u32 msm_vidc_decoder_dpb_size_iris2(struct msm_vidc_inst *inst) +{ + + u32 size = 0; + u32 color_fmt, media_fmt; + u32 width, height; + struct v4l2_format *f; + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return size; + } + + color_fmt = inst->capabilities->cap[PIX_FMTS].value; + if (!is_linear_colorformat(color_fmt)) + return size; + + f = &inst->fmts[OUTPUT_PORT]; + width = f->fmt.pix_mp.width; + height = f->fmt.pix_mp.height; + + if (color_fmt == MSM_VIDC_FMT_NV12) { + media_fmt = COLOR_FMT_NV12_UBWC; + HFI_NV12_UBWC_IL_CALC_BUF_SIZE_V2(size, width, height, + VENUS_Y_STRIDE(media_fmt, width), VENUS_Y_SCANLINES(media_fmt, height), + VENUS_UV_STRIDE(media_fmt, width), VENUS_UV_SCANLINES(media_fmt, height), + VENUS_Y_META_STRIDE(media_fmt, width), VENUS_Y_META_SCANLINES(media_fmt, + height), + VENUS_UV_META_STRIDE(media_fmt, width), VENUS_UV_META_SCANLINES(media_fmt, + height)); + } else if (color_fmt == MSM_VIDC_FMT_P010) { + media_fmt = COLOR_FMT_P010_UBWC; + HFI_YUV420_TP10_UBWC_CALC_BUF_SIZE(size, + VENUS_Y_STRIDE(media_fmt, width), VENUS_Y_SCANLINES(media_fmt, height), + VENUS_UV_STRIDE(media_fmt, width), VENUS_UV_SCANLINES(media_fmt, height), + VENUS_Y_META_STRIDE(media_fmt, width), VENUS_Y_META_SCANLINES(media_fmt, + height), + VENUS_UV_META_STRIDE(media_fmt, width), VENUS_UV_META_SCANLINES(media_fmt, + height)); + } + + s_vpr_l(inst->sid, "%s: size %d\n", __func__, size); + return size; +} + /* encoder internal buffers */ static u32 msm_vidc_encoder_bin_size_iris2(struct msm_vidc_inst *inst) { @@ -436,6 +482,9 @@ int msm_buffer_size_iris2(struct msm_vidc_inst *inst, case MSM_VIDC_BUF_PERSIST: size = msm_vidc_decoder_persist_size_iris2(inst); break; + case MSM_VIDC_BUF_DPB: + size = msm_vidc_decoder_dpb_size_iris2(inst); + break; default: break; } @@ -482,6 +531,44 @@ int msm_buffer_size_iris2(struct msm_vidc_inst *inst, return size; } +static int msm_buffer_encoder_dpb_count(struct msm_vidc_inst *inst) +{ + int count = 0; + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return 0; + } + + if (inst->codec == MSM_VIDC_H264) { + // TODO: replace zeros with appropriate variables + HFI_IRIS2_ENC_RECON_BUF_COUNT(count, 0, 0, 0, 0, 0, + HFI_CODEC_ENCODE_AVC); + } else if (inst->codec == MSM_VIDC_HEVC) { + // TODO: replace zeros with appropriate variables + HFI_IRIS2_ENC_RECON_BUF_COUNT(count, 0, 0, 0, 0, 0, + HFI_CODEC_ENCODE_HEVC); + } + return count; +} + +static int msm_buffer_decoder_dpb_count(struct msm_vidc_inst *inst) +{ + int count = 0; + u32 color_fmt; + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return 0; + } + + color_fmt = inst->capabilities->cap[PIX_FMTS].value; + if (is_linear_colorformat(color_fmt)) + count = inst->buffers.output.min_count; + + return count; +} + int msm_buffer_min_count_iris2(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type buffer_type) { @@ -489,7 +576,7 @@ int msm_buffer_min_count_iris2(struct msm_vidc_inst *inst, if (!inst) { d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; + return 0; } if (is_decode_session(inst)) { @@ -509,7 +596,9 @@ int msm_buffer_min_count_iris2(struct msm_vidc_inst *inst, case MSM_VIDC_BUF_PERSIST: count = 1; break; - //todo: add DPB + case MSM_VIDC_BUF_DPB: + count = msm_buffer_decoder_dpb_count(inst); + break; default: break; } @@ -527,12 +616,12 @@ int msm_buffer_min_count_iris2(struct msm_vidc_inst *inst, case MSM_VIDC_BUF_COMV: case MSM_VIDC_BUF_NON_COMV: case MSM_VIDC_BUF_LINE: - case MSM_VIDC_BUF_DPB: - //todo: add DPB count case MSM_VIDC_BUF_ARP: case MSM_VIDC_BUF_VPSS: count = 1; break; + case MSM_VIDC_BUF_DPB: + count = msm_buffer_encoder_dpb_count(inst); default: break; } @@ -548,7 +637,7 @@ int msm_buffer_extra_count_iris2(struct msm_vidc_inst *inst, if (!inst) { d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; + return 0; } switch (buffer_type) { diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index f8100a3314..632d60654a 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -202,7 +202,7 @@ int v4l2_type_to_driver_port(struct msm_vidc_inst *inst, u32 type, const char *state_name(enum msm_vidc_inst_state state); int msm_vidc_change_inst_state(struct msm_vidc_inst *inst, enum msm_vidc_inst_state request_state, const char *func); -int msm_vidc_get_input_internal_buffers(struct msm_vidc_inst *inst, +int msm_vidc_get_internal_buffers(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type buffer_type); int msm_vidc_create_internal_buffers(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type buffer_type); diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 9140009e42..b58e224759 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -726,27 +726,27 @@ static int msm_vdec_get_input_internal_buffers(struct msm_vidc_inst *inst) return -EINVAL; } - rc = msm_vidc_get_input_internal_buffers(inst, MSM_VIDC_BUF_BIN); + rc = msm_vidc_get_internal_buffers(inst, MSM_VIDC_BUF_BIN); if (rc) return rc; - rc = msm_vidc_get_input_internal_buffers(inst, MSM_VIDC_BUF_COMV); + rc = msm_vidc_get_internal_buffers(inst, MSM_VIDC_BUF_COMV); if (rc) return rc; - rc = msm_vidc_get_input_internal_buffers(inst, MSM_VIDC_BUF_NON_COMV); + rc = msm_vidc_get_internal_buffers(inst, MSM_VIDC_BUF_NON_COMV); if (rc) return rc; - rc = msm_vidc_get_input_internal_buffers(inst, MSM_VIDC_BUF_LINE); + rc = msm_vidc_get_internal_buffers(inst, MSM_VIDC_BUF_LINE); if (rc) return rc; - rc = msm_vidc_get_input_internal_buffers(inst, MSM_VIDC_BUF_PERSIST); + rc = msm_vidc_get_internal_buffers(inst, MSM_VIDC_BUF_PERSIST); if (rc) return rc; - s_vpr_h(inst->sid, "internal buffer: min size reuse\n"); + s_vpr_h(inst->sid, "input internal buffer: min size reuse\n"); s_vpr_h(inst->sid, "bin buffer: %d %d %d\n", inst->buffers.bin.min_count, inst->buffers.bin.size, @@ -771,11 +771,32 @@ static int msm_vdec_get_input_internal_buffers(struct msm_vidc_inst *inst) return rc; } +static int msm_vdec_get_output_internal_buffers(struct msm_vidc_inst *inst) +{ + int rc = 0; + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + rc = msm_vidc_get_internal_buffers(inst, MSM_VIDC_BUF_DPB); + if (rc) + return rc; + + s_vpr_h(inst->sid, "output internal buffer: min size reuse\n"); + s_vpr_h(inst->sid, "dpb buffer: %d %d %d\n", + inst->buffers.bin.min_count, + inst->buffers.bin.size, + inst->buffers.bin.reuse); + + return rc; +} + static int msm_vdec_create_input_internal_buffers(struct msm_vidc_inst *inst) { int rc = 0; - d_vpr_h("%s()\n", __func__); if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; @@ -800,11 +821,26 @@ static int msm_vdec_create_input_internal_buffers(struct msm_vidc_inst *inst) return 0; } +static int msm_vdec_create_output_internal_buffers(struct msm_vidc_inst *inst) +{ + int rc = 0; + + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + rc = msm_vidc_create_internal_buffers(inst, MSM_VIDC_BUF_DPB); + if (rc) + return rc; + + return 0; +} + static int msm_vdec_queue_input_internal_buffers(struct msm_vidc_inst *inst) { int rc = 0; - d_vpr_h("%s()\n", __func__); if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; @@ -829,16 +865,31 @@ static int msm_vdec_queue_input_internal_buffers(struct msm_vidc_inst *inst) return 0; } +static int msm_vdec_queue_output_internal_buffers(struct msm_vidc_inst *inst) +{ + int rc = 0; + + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + rc = msm_vidc_queue_internal_buffers(inst, MSM_VIDC_BUF_DPB); + if (rc) + return rc; + + return 0; +} static int msm_vdec_release_input_internal_buffers(struct msm_vidc_inst *inst) { int rc = 0; - d_vpr_h("%s()\n", __func__); if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } + s_vpr_h(inst->sid, "%s()\n",__func__); rc = msm_vidc_release_internal_buffers(inst, MSM_VIDC_BUF_BIN); if (rc) @@ -859,6 +910,23 @@ static int msm_vdec_release_input_internal_buffers(struct msm_vidc_inst *inst) return 0; } +static int msm_vdec_release_output_internal_buffers(struct msm_vidc_inst *inst) +{ + int rc = 0; + + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + s_vpr_h(inst->sid, "%s()\n",__func__); + + rc = msm_vidc_release_internal_buffers(inst, MSM_VIDC_BUF_DPB); + if (rc) + return rc; + + return 0; +} + static int msm_vdec_subscribe_input_port_settings_change(struct msm_vidc_inst *inst, enum msm_vidc_port_type port) { @@ -1447,6 +1515,22 @@ int msm_vdec_streamon_output(struct msm_vidc_inst *inst) if (rc) goto error; + rc = msm_vdec_get_output_internal_buffers(inst); + if (rc) + goto error; + + rc = msm_vdec_release_output_internal_buffers(inst); + if (rc) + goto error; + + rc = msm_vdec_create_output_internal_buffers(inst); + if (rc) + goto error; + + rc = msm_vdec_queue_output_internal_buffers(inst); + if (rc) + goto error; + rc = msm_vidc_session_streamon(inst, OUTPUT_PORT); if (rc) goto error; diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index af581ae0df..2edc252eef 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -1557,7 +1557,7 @@ int msm_vidc_destroy_internal_buffer(struct msm_vidc_inst *inst, return 0; } -int msm_vidc_get_input_internal_buffers(struct msm_vidc_inst *inst, +int msm_vidc_get_internal_buffers(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type buffer_type) { u32 buf_size; @@ -2660,7 +2660,7 @@ void msm_vidc_destroy_buffers(struct msm_vidc_inst *inst) if (!buffers) continue; list_for_each_entry_safe(buf, dummy, &buffers->list, list) { - s_vpr_e(inst->sid, + s_vpr_h(inst->sid, "destroying buffer: type %d idx %d fd %d addr %#x size %d\n", buf->type, buf->index, buf->fd, buf->device_addr, buf->buffer_size); if (is_internal_buffer(buf->type)) diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index 84a3757736..00da73ec07 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -557,6 +557,35 @@ static int handle_dequeue_buffers(struct msm_vidc_inst* inst) return rc; } +static int handle_dpb_buffer(struct msm_vidc_inst *inst, + struct hfi_buffer *buffer) +{ + int rc = 0; + struct msm_vidc_buffers *buffers; + struct msm_vidc_buffer *buf; + bool found; + + buffers = msm_vidc_get_buffers(inst, MSM_VIDC_BUF_DPB, __func__); + if (!buffers) + return -EINVAL; + + found = false; + list_for_each_entry(buf, &buffers->list, list) { + if (buf->device_addr == buffer->base_address) { + found = true; + break; + } + } + if (found) { + rc = msm_vidc_destroy_internal_buffer(inst, buf); + } else { + s_vpr_e(inst->sid, "%s: invalid idx %d daddr %#x\n", + __func__, buffer->index, buffer->base_address); + return -EINVAL; + } + return rc; +} + static int handle_persist_buffer(struct msm_vidc_inst *inst, struct hfi_buffer *buffer) { @@ -734,11 +763,17 @@ static int handle_session_buffer(struct msm_vidc_inst *inst, rc = handle_output_metadata_buffer(inst, buffer); else if (buf_type == HFI_BUFFER_BITSTREAM) rc = handle_output_buffer(inst, buffer); + else + s_vpr_e(inst->sid, "%s: unknown bitstream port buffer type %#x\n", + __func__, buf_type); } else if (port_type == HFI_PORT_RAW) { if (buf_type == HFI_BUFFER_METADATA) rc = handle_input_metadata_buffer(inst, buffer); else if (buf_type == HFI_BUFFER_RAW) rc = handle_input_buffer(inst, buffer); + else + s_vpr_e(inst->sid, "%s: unknown raw port buffer type %#x\n", + __func__, buf_type); } } else if (is_decode_session(inst)) { if (port_type == HFI_PORT_BITSTREAM) { @@ -756,11 +791,19 @@ static int handle_session_buffer(struct msm_vidc_inst *inst, rc = handle_line_buffer(inst, buffer); else if (buf_type == HFI_BUFFER_PERSIST) rc = handle_persist_buffer(inst, buffer); + else + s_vpr_e(inst->sid, "%s: unknown bitstream port buffer type %#x\n", + __func__, buf_type); } else if (port_type == HFI_PORT_RAW) { if (buf_type == HFI_BUFFER_METADATA) rc = handle_output_metadata_buffer(inst, buffer); else if (buf_type == HFI_BUFFER_RAW) rc = handle_output_buffer(inst, buffer); + else if (buf_type == HFI_BUFFER_DPB) + rc = handle_dpb_buffer(inst, buffer); + else + s_vpr_e(inst->sid, "%s: unknown raw port buffer type %#x\n", + __func__, buf_type); } } else { s_vpr_e(inst->sid, "%s: invalid session %d\n", From 364a8f95e444499c3c4580cfbbe4d859b11356d3 Mon Sep 17 00:00:00 2001 From: Maheshwar Ajja Date: Mon, 25 Jan 2021 17:32:31 -0800 Subject: [PATCH 0080/1061] video: driver: access core resources under core lock Access core resources like queue interface under core lock. Change-Id: I3f7c4e523bbe17b0967944079013a170ae8964f3 Signed-off-by: Maheshwar Ajja --- driver/vidc/src/msm_vidc_driver.c | 36 ++--- driver/vidc/src/venus_hfi.c | 235 +++++++++++++++++++----------- 2 files changed, 168 insertions(+), 103 deletions(-) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 2edc252eef..1d1e7429a2 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -1975,7 +1975,7 @@ int msm_vidc_add_session(struct msm_vidc_inst *inst) } core = inst->core; - mutex_lock(&core->lock); + core_lock(core, __func__); list_for_each_entry(i, &core->instances, list) count++; @@ -1986,7 +1986,7 @@ int msm_vidc_add_session(struct msm_vidc_inst *inst) __func__, count, MAX_SUPPORTED_INSTANCES); rc = -EINVAL; } - mutex_unlock(&core->lock); + core_unlock(core, __func__); /* assign session_id */ inst->session_id = hash32_ptr(inst); @@ -2007,7 +2007,7 @@ int msm_vidc_remove_session(struct msm_vidc_inst *inst) } core = inst->core; - mutex_lock(&core->lock); + core_lock(core, __func__); list_for_each_entry_safe(i, temp, &core->instances, list) { if (i->session_id == inst->session_id) { list_del_init(&i->list); @@ -2019,7 +2019,7 @@ int msm_vidc_remove_session(struct msm_vidc_inst *inst) list_for_each_entry(i, &core->instances, list) count++; d_vpr_h("%s: remaining sessions %d\n", __func__, count); - mutex_unlock(&core->lock); + core_unlock(core, __func__); return 0; } @@ -2249,8 +2249,9 @@ static int msm_vidc_deinit_core_caps(struct msm_vidc_core *core) d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - kfree(core->capabilities); - core->capabilities = NULL; + d_vpr_h("%s: skip freeing core capabilities\n", __func__); + //kfree(core->capabilities); + //core->capabilities = NULL; return rc; } @@ -2286,7 +2287,7 @@ static int msm_vidc_init_core_caps(struct msm_vidc_core *core) goto exit; } } else { - d_vpr_e("%s: capabilities memory is expected to be freed\n", + d_vpr_h("%s: capabilities memory is expected to be freed\n", __func__); } @@ -2341,8 +2342,9 @@ static int msm_vidc_deinit_instance_caps(struct msm_vidc_core *core) d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - kfree(core->inst_caps); - core->inst_caps = NULL; + d_vpr_h("%s: skip freeing core->instance capabilities\n", __func__); + //kfree(core->inst_caps); + //core->inst_caps = NULL; return rc; } @@ -2392,7 +2394,7 @@ static int msm_vidc_init_instance_caps(struct msm_vidc_core *core) goto error; } } else { - d_vpr_e("%s: capabilities memory is expected to be freed\n", + d_vpr_h("%s: capabilities memory is expected to be freed\n", __func__); } @@ -2462,7 +2464,7 @@ int msm_vidc_core_deinit(struct msm_vidc_core *core, bool force) return -EINVAL; } - mutex_lock(&core->lock); + core_lock(core, __func__); d_vpr_h("%s()\n", __func__); if (core->state == MSM_VIDC_CORE_DEINIT) goto unlock; @@ -2481,7 +2483,7 @@ int msm_vidc_core_deinit(struct msm_vidc_core *core, bool force) msm_vidc_change_core_state(core, MSM_VIDC_CORE_DEINIT, __func__); unlock: - mutex_unlock(&core->lock); + core_unlock(core, __func__); return rc; } @@ -2494,7 +2496,7 @@ int msm_vidc_core_init(struct msm_vidc_core *core) return -EINVAL; } - mutex_lock(&core->lock); + core_lock(core, __func__); if (core->state == MSM_VIDC_CORE_INIT) { rc = 0; goto unlock; @@ -2520,10 +2522,10 @@ int msm_vidc_core_init(struct msm_vidc_core *core) d_vpr_h("%s(): waiting for sys init done, %d ms\n", __func__, core->capabilities[HW_RESPONSE_TIMEOUT].value); - mutex_unlock(&core->lock); + core_unlock(core, __func__); rc = wait_for_completion_timeout(&core->init_done, msecs_to_jiffies( core->capabilities[HW_RESPONSE_TIMEOUT].value)); - mutex_lock(&core->lock); + core_lock(core, __func__); if (!rc) { d_vpr_e("%s: core init timed out\n", __func__); rc = -ETIMEDOUT; @@ -2533,9 +2535,9 @@ int msm_vidc_core_init(struct msm_vidc_core *core) } unlock: - mutex_unlock(&core->lock); + core_unlock(core, __func__); if (rc) - msm_vidc_core_init(core); + msm_vidc_core_deinit(core, true); return rc; } diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index 4bb13e4ab5..bb493f7103 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -171,24 +171,23 @@ static bool is_sys_cache_present(struct msm_vidc_core *core) return core->dt->sys_cache_present; } -static bool valdiate_session(struct msm_vidc_inst* inst, const char *func) +static bool __valdiate_session(struct msm_vidc_core *core, + struct msm_vidc_inst *inst, const char *func) { bool valid = false; struct msm_vidc_inst *temp; - struct msm_vidc_core *core = g_core; if (!core) return false; - mutex_lock(&core->lock); + __strict_check(core); + list_for_each_entry(temp, &core->instances, list) { if (temp == inst) { valid = true; break; } } - mutex_unlock(&core->lock); - if (!valid) s_vpr_e(inst->sid, "%s: invalid session\n", func); @@ -2492,14 +2491,14 @@ void venus_hfi_work_handler(struct work_struct *work) return; } - mutex_lock(&core->lock); + core_lock(core, __func__); if (__resume(core)) { d_vpr_e("%s: Power on failed\n", __func__); - mutex_unlock(&core->lock); + core_unlock(core, __func__); goto err_no_work; } call_venus_op(core, clear_interrupt, core); - mutex_unlock(&core->lock); + core_unlock(core, __func__); num_responses = __response_handler(core); @@ -2531,7 +2530,7 @@ void venus_hfi_pm_work_handler(struct work_struct *work) return; } - mutex_lock(&core->lock); + core_lock(core, __func__); rc = __power_collapse(core, false); switch (rc) { case 0: @@ -2555,7 +2554,7 @@ void venus_hfi_pm_work_handler(struct work_struct *work) d_vpr_e("%s: power collapse failed\n", __func__); break; } - mutex_unlock(&core->lock); + core_unlock(core, __func__); } static int __sys_init(struct msm_vidc_core *core) @@ -2598,6 +2597,8 @@ int venus_hfi_core_init(struct msm_vidc_core *core) } d_vpr_h("%s(): core %pK\n", __func__, core); + __strict_check(core); + core->packet_size = 4096; core->packet = kzalloc(core->packet_size, GFP_KERNEL); if (!core->packet) { @@ -2661,6 +2662,7 @@ int venus_hfi_core_deinit(struct msm_vidc_core *core) return -EINVAL; } d_vpr_h("%s(): core %pK\n", __func__, core); + __strict_check(core); __flush_debug_queue(core, core->packet, core->packet_size); __disable_subcaches(core); __interface_queues_deinit(core); @@ -2680,7 +2682,7 @@ int venus_hfi_suspend(struct msm_vidc_core *core) d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - + core_lock(core, __func__); d_vpr_h("Suspending Venus\n"); rc = __power_collapse(core, true); if (!rc) { @@ -2690,18 +2692,26 @@ int venus_hfi_suspend(struct msm_vidc_core *core) d_vpr_e("%s: Venus is busy\n", __func__); rc = -EBUSY; } - + core_unlock(core, __func__); return rc; } int venus_hfi_session_open(struct msm_vidc_inst *inst) { int rc = 0; + struct msm_vidc_core *core; - if (!inst) { + if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } + core = inst->core; + core_lock(core, __func__); + + if (!__valdiate_session(core, inst, __func__)) { + rc = -EINVAL; + goto unlock; + } rc = hfi_packet_session_command(inst, HFI_CMD_OPEN, @@ -2713,39 +2723,58 @@ int venus_hfi_session_open(struct msm_vidc_inst *inst) &inst->session_id, /* payload */ sizeof(u32)); if (rc) - return rc; + goto unlock; rc = __iface_cmdq_write(inst->core, inst->packet); if (rc) - return rc; + goto unlock; +unlock: + core_unlock(core, __func__); return 0; } int venus_hfi_session_set_codec(struct msm_vidc_inst *inst) { int rc = 0; + struct msm_vidc_core *core; u32 codec; - if (!inst || !inst->packet) { + if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - if (!valdiate_session(inst, __func__)) - return -EINVAL; + core = inst->core; + core_lock(core, __func__); + + if (!__valdiate_session(core, inst, __func__)) { + rc = -EINVAL; + goto unlock; + } + + rc = hfi_create_header(inst->packet, inst->packet_size, + inst->session_id, core->header_id++); + if (rc) + goto unlock; codec = get_hfi_codec(inst); - rc = venus_hfi_session_property(inst, - HFI_PROP_CODEC, - HFI_HOST_FLAGS_NONE, - HFI_PORT_NONE, - HFI_PAYLOAD_U32_ENUM, - &codec, - sizeof(u32)); + rc = hfi_create_packet(inst->packet, inst->packet_size, + HFI_PROP_CODEC, + HFI_HOST_FLAGS_NONE, + HFI_PAYLOAD_U32_ENUM, + HFI_PORT_NONE, + core->packet_id++, + &codec, + sizeof(u32)); if (rc) - goto error; + goto unlock; -error: + rc = __iface_cmdq_write(inst->core, inst->packet); + if (rc) + goto unlock; + +unlock: + core_unlock(core, __func__); return rc; } @@ -2756,19 +2785,22 @@ int venus_hfi_session_property(struct msm_vidc_inst *inst, int rc = 0; struct msm_vidc_core *core; - if (!inst || !inst->core || !inst->packet) { - d_vpr_e("%s: Invalid params\n", __func__); + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } core = inst->core; + core_lock(core, __func__); - if (!valdiate_session(inst, __func__)) - return -EINVAL; + if (!__valdiate_session(core, inst, __func__)) { + rc = -EINVAL; + goto unlock; + } rc = hfi_create_header(inst->packet, inst->packet_size, inst->session_id, core->header_id++); if (rc) - goto err_prop; + goto unlock; rc = hfi_create_packet(inst->packet, inst->packet_size, pkt_type, flags, @@ -2778,28 +2810,31 @@ int venus_hfi_session_property(struct msm_vidc_inst *inst, payload, payload_size); if (rc) - goto err_prop; + goto unlock; rc = __iface_cmdq_write(inst->core, inst->packet); if (rc) - goto err_prop; + goto unlock; - return rc; - -err_prop: - d_vpr_e("%s: create packet failed\n", __func__); +unlock: + core_unlock(core, __func__); return rc; } int venus_hfi_session_close(struct msm_vidc_inst *inst) { int rc = 0; + struct msm_vidc_core* core; if (!inst || !inst->packet) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - if (!valdiate_session(inst, __func__)) + core = inst->core; + + __strict_check(core); + + if (!__valdiate_session(core, inst, __func__)) return -EINVAL; rc = hfi_packet_session_command(inst, @@ -2821,17 +2856,23 @@ int venus_hfi_session_close(struct msm_vidc_inst *inst) int venus_hfi_start(struct msm_vidc_inst *inst, enum msm_vidc_port_type port) { int rc = 0; + struct msm_vidc_core* core; - if (!inst) { + if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - if (!valdiate_session(inst, __func__)) - return -EINVAL; + core = inst->core; + core_lock(core, __func__); + + if (!__valdiate_session(core, inst, __func__)) { + rc = -EINVAL; + goto unlock; + } if (port != INPUT_PORT && port != OUTPUT_PORT) { s_vpr_e(inst->sid, "%s: invalid port %d\n", __func__, port); - return -EINVAL; + goto unlock; } rc = hfi_packet_session_command(inst, @@ -2844,29 +2885,37 @@ int venus_hfi_start(struct msm_vidc_inst *inst, enum msm_vidc_port_type port) NULL, 0); if (rc) - return rc; + goto unlock; rc = __iface_cmdq_write(inst->core, inst->packet); if (rc) - return rc; + goto unlock; +unlock: + core_unlock(core, __func__); return rc; } int venus_hfi_stop(struct msm_vidc_inst *inst, enum msm_vidc_port_type port) { int rc = 0; + struct msm_vidc_core* core; - if (!inst) { + if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - if (!valdiate_session(inst, __func__)) - return -EINVAL; + core = inst->core; + core_lock(core, __func__); + + if (!__valdiate_session(core, inst, __func__)) { + rc = -EINVAL; + goto unlock; + } if (port != INPUT_PORT && port != OUTPUT_PORT) { s_vpr_e(inst->sid, "%s: invalid port %d\n", __func__, port); - return -EINVAL; + goto unlock; } rc = hfi_packet_session_command(inst, @@ -2880,12 +2929,14 @@ int venus_hfi_stop(struct msm_vidc_inst *inst, enum msm_vidc_port_type port) NULL, 0); if (rc) - return rc; + goto unlock; rc = __iface_cmdq_write(inst->core, inst->packet); if (rc) - return rc; + goto unlock; +unlock: + core_unlock(core, __func__); return rc; } @@ -2896,20 +2947,23 @@ int venus_hfi_session_command(struct msm_vidc_inst *inst, int rc = 0; struct msm_vidc_core *core; - if (!inst || !inst->packet || !inst->core) { + if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } core = inst->core; + core_lock(core, __func__); - if (!valdiate_session(inst, __func__)) - return -EINVAL; + if (!__valdiate_session(core, inst, __func__)) { + rc = -EINVAL; + goto unlock; + } rc = hfi_create_header(inst->packet, inst->packet_size, inst->session_id, core->header_id++); if (rc) - return rc; + goto unlock; rc = hfi_create_packet(inst->packet, inst->packet_size, cmd, @@ -2920,18 +2974,15 @@ int venus_hfi_session_command(struct msm_vidc_inst *inst, core->packet_id++, payload, payload_size); - if (rc) - goto err_cmd; + goto unlock; - s_vpr_h(inst->sid, "Command packet 0x%x created\n", cmd); - __iface_cmdq_write(inst->core, inst->packet); + rc = __iface_cmdq_write(inst->core, inst->packet); + if (rc) + goto unlock; - return rc; - -err_cmd: - s_vpr_e(inst->sid, "%s: create packet failed for cmd: %d\n", - __func__, cmd); +unlock: + core_unlock(core, __func__); return rc; } @@ -2942,23 +2993,26 @@ int venus_hfi_queue_buffer(struct msm_vidc_inst *inst, struct msm_vidc_core *core; struct hfi_buffer hfi_buffer; - if (!inst || !inst->core || !inst->packet) { - d_vpr_e("%s: Invalid params\n", __func__); + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } core = inst->core; + core_lock(core, __func__); - if (!valdiate_session(inst, __func__)) - return -EINVAL; + if (!__valdiate_session(core, inst, __func__)) { + rc = -EINVAL; + goto unlock; + } rc = get_hfi_buffer(inst, buffer, &hfi_buffer); if (rc) - return rc; + goto unlock; rc = hfi_create_header(inst->packet, inst->packet_size, inst->session_id, core->header_id++); if (rc) - return rc; + goto unlock; rc = hfi_create_packet(inst->packet, inst->packet_size, @@ -2970,12 +3024,12 @@ int venus_hfi_queue_buffer(struct msm_vidc_inst *inst, &hfi_buffer, sizeof(hfi_buffer)); if (rc) - return rc; + goto unlock; if (metabuf) { rc = get_hfi_buffer(inst, metabuf, &hfi_buffer); if (rc) - return rc; + goto unlock; rc = hfi_create_packet(inst->packet, inst->packet_size, HFI_CMD_BUFFER, @@ -2986,13 +3040,15 @@ int venus_hfi_queue_buffer(struct msm_vidc_inst *inst, &hfi_buffer, sizeof(hfi_buffer)); if (rc) - return rc; + goto unlock; } rc = __iface_cmdq_write(inst->core, inst->packet); if (rc) - return rc; + goto unlock; +unlock: + core_unlock(core, __func__); return rc; } @@ -3003,23 +3059,28 @@ int venus_hfi_release_buffer(struct msm_vidc_inst *inst, struct msm_vidc_core *core; struct hfi_buffer hfi_buffer; - if (!inst || !buffer) { + if (!inst || !inst->core || !buffer) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - if (!valdiate_session(inst, __func__)) - return -EINVAL; + core = inst->core; + core_lock(core, __func__); + + if (!__valdiate_session(core, inst, __func__)) { + rc = -EINVAL; + goto unlock; + } if (!is_internal_buffer(buffer->type)) { s_vpr_e(inst->sid, "release not allowed for buffer type %d\n", buffer->type); - return 0; + goto unlock; } core = inst->core; rc = get_hfi_buffer(inst, buffer, &hfi_buffer); if (rc) - return rc; + goto unlock; /* add pending release flag */ hfi_buffer.flags |= HFI_BUF_HOST_FLAG_RELEASE; @@ -3027,7 +3088,7 @@ int venus_hfi_release_buffer(struct msm_vidc_inst *inst, rc = hfi_create_header(inst->packet, inst->packet_size, inst->session_id, core->header_id++); if (rc) - return rc; + goto unlock; rc = hfi_create_packet(inst->packet, inst->packet_size, @@ -3040,12 +3101,14 @@ int venus_hfi_release_buffer(struct msm_vidc_inst *inst, &hfi_buffer, sizeof(hfi_buffer)); if (rc) - return rc; + goto unlock; rc = __iface_cmdq_write(inst->core, inst->packet); if (rc) - return rc; + goto unlock; +unlock: + core_unlock(core, __func__); return rc; } @@ -3060,7 +3123,7 @@ int venus_hfi_scale_clocks(struct msm_vidc_inst* inst, u64 freq) } core = inst->core; - mutex_lock(&core->lock); + core_lock(core, __func__); if (__resume(core)) { s_vpr_e(inst->sid, "Resume from power collapse failed\n"); rc = -EINVAL; @@ -3068,7 +3131,7 @@ int venus_hfi_scale_clocks(struct msm_vidc_inst* inst, u64 freq) } rc = __set_clocks(core, freq); exit: - mutex_unlock(&core->lock); + core_unlock(core, __func__); return rc; } @@ -3084,9 +3147,9 @@ int venus_hfi_scale_buses(struct msm_vidc_inst *inst, u64 bw_ddr, u64 bw_llcc) } core = inst->core; - mutex_lock(&core->lock); + core_lock(core, __func__); rc = __vote_buses(core, bw_ddr, bw_llcc); - mutex_unlock(&core->lock); + core_unlock(core, __func__); return rc; } From d868af90dbf392ebb1400af26a6408a063c32d4d Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Mon, 25 Jan 2021 19:16:52 -0800 Subject: [PATCH 0081/1061] video: driver: remove cabac_session as PSC property remove HFI_PROP_CABAC_SESSION as PSC property. Change-Id: Ib123f5576763221775a225f882bcc91685d16411 Signed-off-by: Darshana Patil --- driver/vidc/inc/msm_vidc_internal.h | 1 - driver/vidc/src/msm_vdec.c | 16 ++++------------ driver/vidc/src/venus_hfi_response.c | 7 ++----- 3 files changed, 6 insertions(+), 18 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index a1a3825717..2dff93f28a 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -582,7 +582,6 @@ struct msm_vidc_subscription_params { u32 bitstream_resolution; u64 crop_offsets; u32 bit_depth; - u32 cabac; u32 coded_frames; u32 fw_min_count; u32 pic_order_cnt; diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index b58e224759..45885303ca 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -23,7 +23,6 @@ u32 msm_vdec_subscribe_for_port_settings_change[] = { HFI_PROP_BITSTREAM_RESOLUTION, HFI_PROP_CROP_OFFSETS, HFI_PROP_LUMA_CHROMA_BIT_DEPTH, - HFI_PROP_CABAC_SESSION, HFI_PROP_CODED_FRAMES, HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT, HFI_PROP_PIC_ORDER_CNT_TYPE, @@ -35,6 +34,7 @@ u32 msm_vdec_subscribe_for_port_settings_change[] = { u32 msm_vdec_subscribe_for_properties[] = { HFI_PROP_NO_OUTPUT, + HFI_PROP_CABAC_SESSION, }; static int msm_vdec_codec_change(struct msm_vidc_inst *inst, u32 v4l2_codec) @@ -197,7 +197,8 @@ static int msm_vdec_set_bit_depth(struct msm_vidc_inst *inst, return rc; } - +//todo: enable when needed +/* static int msm_vdec_set_cabac(struct msm_vidc_inst *inst, enum msm_vidc_port_type port) { @@ -224,7 +225,7 @@ static int msm_vdec_set_cabac(struct msm_vidc_inst *inst, return rc; } - +*/ static int msm_vdec_set_coded_frames(struct msm_vidc_inst *inst, enum msm_vidc_port_type port) { @@ -967,9 +968,6 @@ static int msm_vdec_subscribe_input_port_settings_change(struct msm_vidc_inst *i case HFI_PROP_LUMA_CHROMA_BIT_DEPTH: rc = msm_vdec_set_bit_depth(inst, port); break; - case HFI_PROP_CABAC_SESSION: - rc = msm_vdec_set_cabac(inst, port); - break; case HFI_PROP_CODED_FRAMES: rc = msm_vdec_set_coded_frames(inst, port); break; @@ -1201,7 +1199,6 @@ static int msm_vdec_update_properties(struct msm_vidc_inst *inst) inst->capabilities->cap[PROFILE].value = subsc_params.profile; inst->capabilities->cap[LEVEL].value = subsc_params.level; inst->capabilities->cap[HEVC_TIER].value = subsc_params.tier; - inst->capabilities->cap[ENTROPY_MODE].value = subsc_params.cabac; inst->capabilities->cap[POC].value = subsc_params.pic_order_cnt; inst->capabilities->cap[BIT_DEPTH].value = subsc_params.bit_depth; inst->capabilities->cap[CODED_FRAMES].value = subsc_params.coded_frames; @@ -1417,11 +1414,6 @@ static int msm_vdec_subscribe_output_port_settings_change(struct msm_vidc_inst * payload_size = sizeof(u32); payload_type = HFI_PAYLOAD_U32; break; - case HFI_PROP_CABAC_SESSION: - payload[0] = subsc_params.cabac; - payload_size = sizeof(u32); - payload_type = HFI_PAYLOAD_U32; - break; case HFI_PROP_CODED_FRAMES: payload[0] = subsc_params.coded_frames; payload_size = sizeof(u32); diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index 00da73ec07..171dcd649c 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -19,10 +19,10 @@ void print_psc_properties(u32 tag, const char *str, struct msm_vidc_inst *inst, return; dprintk(tag, inst->sid, - "%s: resolution %d, crop offsets %lld, bit depth %d, cabac %d, coded frames %d " + "%s: resolution %#x, crop offsets %#llx, bit depth %d, coded frames %d " "fw min count %d, poc %d, color info %d, profile %d, level %d, tier %d ", str, subsc_params.bitstream_resolution, subsc_params.crop_offsets, - subsc_params.bit_depth, subsc_params.cabac, subsc_params.coded_frames, + subsc_params.bit_depth, subsc_params.coded_frames, subsc_params.fw_min_count, subsc_params.pic_order_cnt, subsc_params.color_info, subsc_params.profile, subsc_params.level, subsc_params.tier); @@ -900,9 +900,6 @@ static int handle_session_property(struct msm_vidc_inst *inst, case HFI_PROP_LUMA_CHROMA_BIT_DEPTH: inst->subcr_params[port].bit_depth = payload_ptr[0]; break; - case HFI_PROP_CABAC_SESSION: - inst->subcr_params[port].cabac = payload_ptr[0]; - break; case HFI_PROP_CODED_FRAMES: inst->subcr_params[port].coded_frames = payload_ptr[0]; break; From 29bbe0780ea8373b9baeef71ae03ba6e62a49a76 Mon Sep 17 00:00:00 2001 From: Maheshwar Ajja Date: Fri, 22 Jan 2021 13:12:06 -0800 Subject: [PATCH 0082/1061] video: driver: enable scale clocks and busses Enable scale clocks and busses when queuing input buffers. Change-Id: I8dca67c5c2463f5bfc1ccaed7375fb69d80a0196 Signed-off-by: Maheshwar Ajja --- driver/vidc/src/msm_vidc_debug.c | 3 ++- driver/vidc/src/msm_vidc_driver.c | 5 +++++ driver/vidc/src/msm_vidc_power.c | 10 ++++++++++ driver/vidc/src/venus_hfi.c | 16 ++++++++++------ 4 files changed, 27 insertions(+), 7 deletions(-) diff --git a/driver/vidc/src/msm_vidc_debug.c b/driver/vidc/src/msm_vidc_debug.c index b9f706d34c..3cac80c639 100644 --- a/driver/vidc/src/msm_vidc_debug.c +++ b/driver/vidc/src/msm_vidc_debug.c @@ -33,4 +33,5 @@ const char *level_str(u32 level) return "bus "; else return "????"; -} \ No newline at end of file +} + diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 1d1e7429a2..0b0547f4c3 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -1472,6 +1472,11 @@ int msm_vidc_queue_buffer(struct msm_vidc_inst *inst, struct vb2_buffer *vb2) inst->capabilities->cap[CODEC_CONFIG].value = 0; } + if (buf->type == MSM_VIDC_BUF_INPUT) { + inst->power.buffer_counter++; + msm_vidc_scale_power(inst, true); + } + print_vidc_buffer(VIDC_HIGH, "qbuf", inst, buf); meta = get_meta_buffer(inst, buf); if (!meta) { diff --git a/driver/vidc/src/msm_vidc_power.c b/driver/vidc/src/msm_vidc_power.c index 1a45495c7b..61e0c07473 100644 --- a/driver/vidc/src/msm_vidc_power.c +++ b/driver/vidc/src/msm_vidc_power.c @@ -506,11 +506,15 @@ int msm_vidc_scale_clocks(struct msm_vidc_inst *inst) int msm_vidc_scale_power(struct msm_vidc_inst *inst, bool scale_buses) { + struct msm_vidc_core *core; + if (!inst || !inst->core) { d_vpr_e("%s: invalid params %pK\n", __func__, inst); return -EINVAL; } + core = inst->core; + if (!inst->active) { /* scale buses for inactive -> active session */ scale_buses = true; @@ -525,6 +529,12 @@ int msm_vidc_scale_power(struct msm_vidc_inst *inst, bool scale_buses) s_vpr_e(inst->sid, "failed to scale bus\n"); } + s_vpr_h(inst->sid, + "power: inst: clk %lld ddr %d llcc %d dcvs flags %#x, core: clk %lld ddr %lld llcc %lld\n", + inst->power.curr_freq, inst->power.ddr_bw, + inst->power.sys_cache_bw, inst->power.dcvs_flags, + core->power.clk_freq, core->power.bw_ddr, + core->power.bw_llcc); return 0; } diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index bb493f7103..e10f5faef3 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -507,7 +507,7 @@ static int __vote_buses(struct msm_vidc_core *core, bus->range[0], bus->range[1]); if (TRIVIAL_BW_CHANGE(bw_kbps, bw_prev) && bw_prev) { - d_vpr_l("Skip voting bus %s to %llu bps", + d_vpr_l("Skip voting bus %s to %llu bps\n", bus->name, bw_kbps * 1000); continue; } @@ -656,7 +656,7 @@ static int __write_queue(struct msm_vidc_iface_q_info *qinfo, u8 *packet, if (write_ptr < (u32 *)qinfo->q_array.align_virtual_addr || write_ptr > (u32 *)(qinfo->q_array.align_virtual_addr + qinfo->q_array.mem_size)) { - d_vpr_e("Invalid write index"); + d_vpr_e("Invalid write index\n"); return -ENODATA; } @@ -1457,8 +1457,10 @@ static int __init_bus(struct msm_vidc_core *core) struct bus_info *bus = NULL; int rc = 0; - if (!core) + if (!core) { + d_vpr_e("%s: invalid param\n", __func__); return -EINVAL; + } venus_hfi_for_each_bus(core, bus) { if (!strcmp(bus->name, "venus-llcc")) { @@ -1962,8 +1964,10 @@ static int __venus_power_on(struct msm_vidc_core *core) { int rc = 0; - if (core->power_enabled) + if (core->power_enabled) { + d_vpr_e("%s: Skip power on, core already enabled.\n", __func__); return 0; + } core->power_enabled = true; /* Vote for all hardware resources */ @@ -3117,7 +3121,7 @@ int venus_hfi_scale_clocks(struct msm_vidc_inst* inst, u64 freq) int rc = 0; struct msm_vidc_core* core; - if (!inst || inst->core) { + if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -3141,7 +3145,7 @@ int venus_hfi_scale_buses(struct msm_vidc_inst *inst, u64 bw_ddr, u64 bw_llcc) int rc = 0; struct msm_vidc_core* core; - if (!inst || inst->core) { + if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } From 18f496a511d16969973f1b7e8d753dbef92a4823 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Mon, 25 Jan 2021 16:21:19 -0800 Subject: [PATCH 0083/1061] video: driver: handle enc internal buffers returned from fw - destroy enc internal buffers when firmware returns these buffers after its usage. - fix some incorrect log masks that result in false error logs. Change-Id: I4707e915b725769bbbaa0a2c4c4e0d9cd10805a4 Signed-off-by: Akshata Sahukar --- driver/vidc/inc/msm_vidc_debug.h | 1 - driver/vidc/inc/msm_vidc_driver.h | 2 + driver/vidc/src/hfi_packet.c | 17 +-- driver/vidc/src/msm_vdec.c | 2 +- driver/vidc/src/msm_venc.c | 157 ++++++++++++++++----------- driver/vidc/src/msm_vidc.c | 2 +- driver/vidc/src/msm_vidc_driver.c | 38 +++++++ driver/vidc/src/msm_vidc_vb2.c | 20 ++++ driver/vidc/src/venus_hfi.c | 2 + driver/vidc/src/venus_hfi_response.c | 69 ++++++++++-- 10 files changed, 227 insertions(+), 83 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_debug.h b/driver/vidc/inc/msm_vidc_debug.h index a929a773cd..5a02e181ac 100644 --- a/driver/vidc/inc/msm_vidc_debug.h +++ b/driver/vidc/inc/msm_vidc_debug.h @@ -32,7 +32,6 @@ extern int msm_vidc_clock_voting; enum vidc_msg_prio { VIDC_ERR = 0x00000001, - VIDC_INFO = 0x00000001, VIDC_HIGH = 0x00000002, VIDC_LOW = 0x00000004, VIDC_PERF = 0x00000008, diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 632d60654a..bbfc92e521 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -208,6 +208,8 @@ int msm_vidc_create_internal_buffers(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type buffer_type); int msm_vidc_queue_internal_buffers(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type buffer_type); +int msm_vidc_alloc_and_queue_session_internal_buffers(struct msm_vidc_inst *inst, + enum msm_vidc_buffer_type buffer_type); int msm_vidc_release_internal_buffers(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type buffer_type); int msm_vidc_vb2_buffer_done(struct msm_vidc_inst *inst, diff --git a/driver/vidc/src/hfi_packet.c b/driver/vidc/src/hfi_packet.c index d83d54759c..235cd42a88 100644 --- a/driver/vidc/src/hfi_packet.c +++ b/driver/vidc/src/hfi_packet.c @@ -70,6 +70,7 @@ u32 get_hfi_port_from_buffer_type(struct msm_vidc_inst *inst, hfi_port = HFI_PORT_BITSTREAM; break; case MSM_VIDC_BUF_PERSIST: + /* TODO: change to HFI_PORT_NONE */ hfi_port = HFI_PORT_BITSTREAM | HFI_PORT_RAW; break; case MSM_VIDC_BUF_OUTPUT: @@ -85,21 +86,21 @@ u32 get_hfi_port_from_buffer_type(struct msm_vidc_inst *inst, switch (buffer_type) { case MSM_VIDC_BUF_INPUT: case MSM_VIDC_BUF_INPUT_META: + case MSM_VIDC_BUF_VPSS: + hfi_port = HFI_PORT_RAW; + break; + case MSM_VIDC_BUF_OUTPUT: + case MSM_VIDC_BUF_OUTPUT_META: case MSM_VIDC_BUF_BIN: - case MSM_VIDC_BUF_ARP: case MSM_VIDC_BUF_COMV: case MSM_VIDC_BUF_NON_COMV: case MSM_VIDC_BUF_LINE: case MSM_VIDC_BUF_DPB: - hfi_port = HFI_PORT_RAW; - break; - case MSM_VIDC_BUF_PERSIST: - hfi_port = HFI_PORT_BITSTREAM | HFI_PORT_RAW; - break; - case MSM_VIDC_BUF_OUTPUT: - case MSM_VIDC_BUF_OUTPUT_META: hfi_port = HFI_PORT_BITSTREAM; break; + case MSM_VIDC_BUF_ARP: + hfi_port = HFI_PORT_NONE; + break; default: s_vpr_e(inst->sid, "%s: invalid buffer type %d\n", __func__, buffer_type); diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 45885303ca..300e856109 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -1623,7 +1623,7 @@ int msm_vdec_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) if (f->type == INPUT_MPLANE) { if (inst->fmts[INPUT_PORT].fmt.pix_mp.pixelformat != f->fmt.pix_mp.pixelformat) { - s_vpr_e(inst->sid, + s_vpr_h(inst->sid, "%s: codec changed from %#x to %#x\n", __func__, inst->fmts[INPUT_PORT].fmt.pix_mp.pixelformat, f->fmt.pix_mp.pixelformat); diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index c408340eef..60fa93c80c 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -452,6 +452,7 @@ static int msm_venc_set_internal_properties(struct msm_vidc_inst *inst) static int msm_venc_get_input_internal_buffers(struct msm_vidc_inst *inst) { int rc = 0; +/* TODO: VPSS struct msm_vidc_core *core; if (!inst || !inst->core) { @@ -460,44 +461,87 @@ static int msm_venc_get_input_internal_buffers(struct msm_vidc_inst *inst) } core = inst->core; - inst->buffers.arp.size = call_session_op(core, buffer_size, - inst, MSM_VIDC_BUF_ARP) + 100000000; - inst->buffers.bin.size = call_session_op(core, buffer_size, - inst, MSM_VIDC_BUF_BIN) + 100000000; - inst->buffers.comv.size = call_session_op(core, buffer_size, - inst, MSM_VIDC_BUF_COMV) + 100000000; - inst->buffers.non_comv.size = call_session_op(core, buffer_size, - inst, MSM_VIDC_BUF_NON_COMV) + 100000000; - inst->buffers.line.size = call_session_op(core, buffer_size, - inst, MSM_VIDC_BUF_LINE) + 100000000; - inst->buffers.dpb.size = call_session_op(core, buffer_size, - inst, MSM_VIDC_BUF_DPB) + 100000000; - //inst->buffers.vpss.size = call_session_op(core, buffer_size, - //inst, MSM_VIDC_BUF_VPSS) + 100000000; - //vpss is req - 100 mb + inst->buffers.vpss.size = call_session_op(core, buffer_size, + inst, MSM_VIDC_BUF_VPSS) + 100000000; - /* inst->buffers.persist.size = call_session_op(core, buffer_size, - inst, MSM_VIDC_BUF_PERSIST); */ - - inst->buffers.arp.min_count = call_session_op(core, min_count, - inst, MSM_VIDC_BUF_ARP); - inst->buffers.bin.min_count = call_session_op(core, min_count, - inst, MSM_VIDC_BUF_BIN); - inst->buffers.comv.min_count = call_session_op(core, min_count, - inst, MSM_VIDC_BUF_COMV); - inst->buffers.non_comv.min_count = call_session_op(core, min_count, - inst, MSM_VIDC_BUF_NON_COMV); - inst->buffers.line.min_count = call_session_op(core, min_count, - inst, MSM_VIDC_BUF_LINE); inst->buffers.dpb.min_count = call_session_op(core, min_count, - inst, MSM_VIDC_BUF_DPB); - /* inst->buffers.persist.min_count = call_session_op(core, min_count, - inst, MSM_VIDC_BUF_PERSIST); */ + inst, MSM_VIDC_BUF_VPSS); + + s_vpr_h(inst->sid, "%s: internal buffer: min size\n", __func__); + s_vpr_h(inst->sid, "vpss buffer: %d %d\n", + inst->buffers.vpss.min_count, + inst->buffers.vpss.size); +*/ + return rc; +} + +static int msm_venc_create_input_internal_buffers(struct msm_vidc_inst *inst) +{ + int rc = 0; +/* TODO: VPSS + d_vpr_h("%s()\n", __func__); + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + rc = msm_vidc_create_internal_buffers(inst, MSM_VIDC_BUF_VPSS); + if (rc) + return rc; +*/ + return rc; +} + +static int msm_venc_queue_input_internal_buffers(struct msm_vidc_inst *inst) +{ + int rc = 0; + +/* TODO: VPSS + d_vpr_h("%s()\n", __func__); + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + rc = msm_vidc_queue_internal_buffers(inst, MSM_VIDC_BUF_VPSS); + if (rc) + return rc; +*/ + return rc; +} + +static int msm_venc_get_output_internal_buffers(struct msm_vidc_inst *inst) +{ + int rc = 0; + struct msm_vidc_core *core; + + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + core = inst->core; + + rc = msm_vidc_get_internal_buffers(inst, MSM_VIDC_BUF_BIN); + if (rc) + return rc; + + rc = msm_vidc_get_internal_buffers(inst, MSM_VIDC_BUF_COMV); + if (rc) + return rc; + + rc = msm_vidc_get_internal_buffers(inst, MSM_VIDC_BUF_NON_COMV); + if (rc) + return rc; + + rc = msm_vidc_get_internal_buffers(inst, MSM_VIDC_BUF_LINE); + if (rc) + return rc; + + rc = msm_vidc_get_internal_buffers(inst, MSM_VIDC_BUF_DPB); + if (rc) + return rc; s_vpr_h(inst->sid, "internal buffer: min size\n"); - s_vpr_h(inst->sid, "arp buffer: %d %d\n", - inst->buffers.arp.min_count, - inst->buffers.arp.size); s_vpr_h(inst->sid, "bin buffer: %d %d\n", inst->buffers.bin.min_count, inst->buffers.bin.size); @@ -513,14 +557,11 @@ static int msm_venc_get_input_internal_buffers(struct msm_vidc_inst *inst) s_vpr_h(inst->sid, "dpb buffer: %d %d\n", inst->buffers.dpb.min_count, inst->buffers.dpb.size); - /* s_vpr_h(inst->sid, "persist buffer: %d %d\n", - inst->buffers.persist.min_count, - inst->buffers.persist.size); */ return rc; } -static int msm_venc_create_input_internal_buffers(struct msm_vidc_inst *inst) +static int msm_venc_create_output_internal_buffers(struct msm_vidc_inst *inst) { int rc = 0; @@ -530,9 +571,6 @@ static int msm_venc_create_input_internal_buffers(struct msm_vidc_inst *inst) return -EINVAL; } - rc = msm_vidc_create_internal_buffers(inst, MSM_VIDC_BUF_ARP); - if (rc) - return rc; rc = msm_vidc_create_internal_buffers(inst, MSM_VIDC_BUF_BIN); if (rc) return rc; @@ -548,14 +586,11 @@ static int msm_venc_create_input_internal_buffers(struct msm_vidc_inst *inst) rc = msm_vidc_create_internal_buffers(inst, MSM_VIDC_BUF_DPB); if (rc) return rc; - /* rc = msm_vidc_create_internal_buffers(inst, MSM_VIDC_BUF_PERSIST); - if (rc) - return rc; */ return 0; } -static int msm_venc_queue_input_internal_buffers(struct msm_vidc_inst *inst) +static int msm_venc_queue_output_internal_buffers(struct msm_vidc_inst *inst) { int rc = 0; @@ -565,9 +600,6 @@ static int msm_venc_queue_input_internal_buffers(struct msm_vidc_inst *inst) return -EINVAL; } - rc = msm_vidc_queue_internal_buffers(inst, MSM_VIDC_BUF_ARP); - if (rc) - return rc; rc = msm_vidc_queue_internal_buffers(inst, MSM_VIDC_BUF_BIN); if (rc) return rc; @@ -581,10 +613,6 @@ static int msm_venc_queue_input_internal_buffers(struct msm_vidc_inst *inst) if (rc) return rc; rc = msm_vidc_queue_internal_buffers(inst, MSM_VIDC_BUF_DPB); - if (rc) - return rc; - // TODO: fw is not accepting persist buffer and returning session error. - //rc = msm_vidc_queue_internal_buffers(inst, MSM_VIDC_BUF_PERSIST); if (rc) return rc; @@ -777,21 +805,12 @@ int msm_venc_streamon_input(struct msm_vidc_inst *inst) rc = msm_venc_get_input_internal_buffers(inst); if (rc) goto error; - /* check for memory after all buffers calculation */ - //rc = msm_vidc_check_memory_supported(inst); - if (rc) - goto error; - - //msm_vidc_update_dcvs(inst); - //msm_vidc_update_batching(inst); - //msm_vidc_scale_power(inst); rc = msm_venc_create_input_internal_buffers(inst); - rc = 0; // TODO if (rc) goto error; + rc = msm_venc_queue_input_internal_buffers(inst); - rc = 0; // TODO if (rc) goto error; @@ -896,6 +915,18 @@ int msm_venc_streamon_output(struct msm_vidc_inst *inst) if (rc) goto error; + rc = msm_venc_get_output_internal_buffers(inst); + if (rc) + goto error; + + rc = msm_venc_create_output_internal_buffers(inst); + if (rc) + goto error; + + rc = msm_venc_queue_output_internal_buffers(inst); + if (rc) + goto error; + rc = msm_vidc_adjust_v4l2_properties(inst); if (rc) goto error; @@ -1044,7 +1075,7 @@ int msm_venc_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) } else if (f->type == OUTPUT_MPLANE) { fmt = &inst->fmts[OUTPUT_PORT]; if (fmt->fmt.pix_mp.pixelformat != f->fmt.pix_mp.pixelformat) { - s_vpr_e(inst->sid, + s_vpr_h(inst->sid, "%s: codec changed from %#x to %#x\n", __func__, fmt->fmt.pix_mp.pixelformat, f->fmt.pix_mp.pixelformat); rc = msm_venc_codec_change(inst, f->fmt.pix_mp.pixelformat); diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index 47739399dc..fc2a47074b 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -718,7 +718,7 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) d_vpr_e("%s: failed to get session id\n", __func__); goto error; } - s_vpr_i(inst->sid, "Opening video instance: %d\n", session_type); + s_vpr_e(inst->sid, "Opening video instance: %d\n", session_type); inst->response_workq = create_singlethread_workqueue("response_workq"); if (!inst->response_workq) { diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 1d1e7429a2..8561a291c9 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -1574,6 +1574,10 @@ int msm_vidc_get_internal_buffers(struct msm_vidc_inst *inst, buf_size = call_session_op(core, buffer_size, inst, buffer_type); + /* TODO: remove below hack to increase enc inter buf size by 100MB */ + if (is_encode_session(inst)) + buf_size += 100000000; + buf_count = call_session_op(core, min_count, inst, buffer_type); @@ -1755,6 +1759,40 @@ int msm_vidc_queue_internal_buffers(struct msm_vidc_inst *inst, return 0; } +int msm_vidc_alloc_and_queue_session_internal_buffers(struct msm_vidc_inst *inst, + enum msm_vidc_buffer_type buffer_type) +{ + int rc = 0; + + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (buffer_type != MSM_VIDC_BUF_ARP && + buffer_type != MSM_VIDC_BUF_PERSIST) { + s_vpr_e(inst->sid, "%s: invalid buffer type: %d\n", + __func__, buffer_type); + rc = -EINVAL; + goto exit; + } + + rc = msm_vidc_get_internal_buffers(inst, buffer_type); + if (rc) + goto exit; + + rc = msm_vidc_create_internal_buffers(inst, buffer_type); + if (rc) + goto exit; + + rc = msm_vidc_queue_internal_buffers(inst, buffer_type); + if (rc) + goto exit; + +exit: + return rc; +} + int msm_vidc_release_internal_buffers(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type buffer_type) { diff --git a/driver/vidc/src/msm_vidc_vb2.c b/driver/vidc/src/msm_vidc_vb2.c index 8023dd0812..6d4f9627cb 100644 --- a/driver/vidc/src/msm_vidc_vb2.c +++ b/driver/vidc/src/msm_vidc_vb2.c @@ -170,6 +170,26 @@ int msm_vidc_start_streaming(struct vb2_queue *q, unsigned int count) rc = msm_vidc_session_set_codec(inst); if (rc) return rc; + + if (is_encode_session(inst)) { + rc = msm_vidc_alloc_and_queue_session_internal_buffers(inst, + MSM_VIDC_BUF_ARP); + if (rc) + goto error; + s_vpr_h(inst->sid, "arp buffer: %d %d\n", + inst->buffers.arp.min_count, + inst->buffers.arp.size); + } else if(is_decode_session(inst)) { + /* TODO: move persist buf from msm_vdec_streamon_input to here + rc = msm_vidc_alloc_and_queue_session_internal_buffers(inst, + MSM_VIDC_BUF_PERSIST); + if (rc) + goto error; + s_vpr_h(inst->sid, "persist buffer: %d %d\n", + inst->buffers.persist.min_count, + inst->buffers.persist.size); + */ + } } if (q->type == INPUT_MPLANE) { diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index bb493f7103..8523415151 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -2453,6 +2453,7 @@ static int __response_handler(struct msm_vidc_core *core) { int rc = 0; + memset(core->response_packet, 0, core->packet_size); while (!__iface_msgq_read(core, core->response_packet)) { rc = handle_response(core, core->response_packet); if (rc) @@ -2460,6 +2461,7 @@ static int __response_handler(struct msm_vidc_core *core) /* check for system error */ if (core->state != MSM_VIDC_CORE_INIT) break; + memset(core->response_packet, 0, core->packet_size); } __schedule_power_collapse_work(core); diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index 171dcd649c..5f052cab7f 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -68,18 +68,27 @@ u32 vidc_port_from_hfi(struct msm_vidc_inst *inst, } bool is_valid_hfi_port(struct msm_vidc_inst *inst, u32 port, - const char *func) + u32 buffer_type, const char *func) { if (!inst) { s_vpr_e(inst->sid, "%s: invalid params\n", func); return false; } - if (port != HFI_PORT_BITSTREAM && port != HFI_PORT_RAW) { - s_vpr_e(inst->sid, "%s: invalid port %#x\n", func, port); - return false; - } + if (port == HFI_PORT_NONE && + buffer_type != HFI_BUFFER_ARP && + buffer_type != HFI_BUFFER_PERSIST) + goto invalid; + + if (port != HFI_PORT_BITSTREAM && port != HFI_PORT_RAW) + goto invalid; + return true; + +invalid: + s_vpr_e(inst->sid, "%s: invalid port %#x buffer_type %u\n", + func, port, buffer_type); + return false; } bool is_valid_hfi_buffer_type(struct msm_vidc_inst *inst, @@ -731,6 +740,35 @@ static int handle_bin_buffer(struct msm_vidc_inst *inst, return rc; } +static int handle_arp_buffer(struct msm_vidc_inst *inst, + struct hfi_buffer *buffer) +{ + int rc = 0; + struct msm_vidc_buffers *buffers; + struct msm_vidc_buffer *buf; + bool found; + + buffers = msm_vidc_get_buffers(inst, MSM_VIDC_BUF_ARP, __func__); + if (!buffers) + return -EINVAL; + + found = false; + list_for_each_entry(buf, &buffers->list, list) { + if (buf->device_addr == buffer->base_address) { + found = true; + break; + } + } + if (found) { + rc = msm_vidc_destroy_internal_buffer(inst, buf); + } else { + s_vpr_e(inst->sid, "%s: invalid idx %d daddr %#x\n", + __func__, buffer->index, buffer->base_address); + return -EINVAL; + } + return rc; +} + static int handle_session_buffer(struct msm_vidc_inst *inst, struct hfi_packet *pkt) { @@ -745,10 +783,6 @@ static int handle_session_buffer(struct msm_vidc_inst *inst, } port_type = pkt->port; - if (!is_valid_hfi_port(inst, port_type, __func__)) { - msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); - return 0; - } buffer = (struct hfi_buffer *)((u8 *)pkt + sizeof(struct hfi_packet)); buf_type = buffer->type; @@ -757,12 +791,29 @@ static int handle_session_buffer(struct msm_vidc_inst *inst, return 0; } + if (!is_valid_hfi_port(inst, port_type, buf_type, __func__)) { + msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); + return 0; + } + if (is_encode_session(inst)) { if (port_type == HFI_PORT_BITSTREAM) { if (buf_type == HFI_BUFFER_METADATA) rc = handle_output_metadata_buffer(inst, buffer); else if (buf_type == HFI_BUFFER_BITSTREAM) rc = handle_output_buffer(inst, buffer); + else if (buf_type == HFI_BUFFER_BIN) + rc = handle_bin_buffer(inst, buffer); + else if (buf_type == HFI_BUFFER_COMV) + rc = handle_comv_buffer(inst, buffer); + else if (buf_type == HFI_BUFFER_NON_COMV) + rc = handle_non_comv_buffer(inst, buffer); + else if (buf_type == HFI_BUFFER_LINE) + rc = handle_line_buffer(inst, buffer); + else if (buf_type == HFI_BUFFER_ARP) + rc = handle_arp_buffer(inst, buffer); + else if (buf_type == HFI_BUFFER_DPB) + rc = handle_dpb_buffer(inst, buffer); else s_vpr_e(inst->sid, "%s: unknown bitstream port buffer type %#x\n", __func__, buf_type); From 24de4a8b91daf5f201604c11b48e09a089d21483 Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Tue, 26 Jan 2021 14:22:11 -0800 Subject: [PATCH 0084/1061] video: driver: print error message from FW print error message from FW during system error Change-Id: Id27469d786b647d2b61e8090fa1f4337b8bc79f6 Signed-off-by: Darshana Patil --- driver/variant/iris2/src/msm_vidc_iris2.c | 4 -- driver/vidc/inc/msm_vidc_internal.h | 5 +++ driver/vidc/src/venus_hfi.c | 46 +++++++++++++++++++++++ driver/vidc/src/venus_hfi_response.c | 24 ++++++++++++ 4 files changed, 75 insertions(+), 4 deletions(-) diff --git a/driver/variant/iris2/src/msm_vidc_iris2.c b/driver/variant/iris2/src/msm_vidc_iris2.c index 166e706735..e90094495f 100644 --- a/driver/variant/iris2/src/msm_vidc_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_iris2.c @@ -184,10 +184,6 @@ static int __setup_ucregion_memory_map_iris2(struct msm_vidc_core *vidc_core) __write_register(core, QTBL_ADDR_IRIS2, (u32)core->iface_q_table.align_device_addr); __write_register(core, QTBL_INFO_IRIS2, 0x01); - /* TODO: darshana, remove below comment later with FW support*/ - /*if (core->sfr.align_device_addr) - __write_register(core, SFR_ADDR_IRIS2, - (u32)core->sfr.align_device_addr);*/ /* update queues vaddr for debug purpose */ __write_register(core, CPU_CS_VCICMDARG0_IRIS2, (u32)((u64)core->iface_q_table.align_virtual_addr)); diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 2dff93f28a..59ddc61136 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -731,6 +731,11 @@ struct msm_vidc_ssr { enum msm_vidc_ssr_trigger_type ssr_type; }; +struct msm_vidc_sfr { + u32 bufSize; + u8 rg_data[1]; +}; + #define call_mem_op(c, op, ...) \ (((c) && (c)->mem_ops && (c)->mem_ops->op) ? \ ((c)->mem_ops->op(__VA_ARGS__)) : 0) diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index 453e590afb..17cf71b0f9 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -2578,6 +2578,48 @@ static int __sys_init(struct msm_vidc_core *core) return 0; } +static int __queue_sfr_buffer(struct msm_vidc_core *core) +{ + int rc = 0; + struct hfi_buffer buf; + + memset(&buf, 0, sizeof(struct hfi_buffer)); + buf.type = HFI_BUFFER_SFR; + buf.index = 0; + buf.base_address = core->sfr.align_device_addr; + buf.addr_offset = 0; + buf.buffer_size = core->sfr.mem_size; + buf.data_offset = 0; + buf.data_size = 0; + buf.timestamp = 0; + buf.flags = 0; + + rc = hfi_create_header(core->packet, core->packet_size, + 0, core->header_id++); + if (rc) + return rc; + + rc = hfi_create_packet(core->packet, + core->packet_size, + HFI_CMD_BUFFER, + HFI_BUF_HOST_FLAG_NONE, + HFI_PAYLOAD_STRUCTURE, + HFI_PORT_NONE, + core->packet_id++, + &buf, + sizeof(buf)); + if (rc) + return rc; + + rc = __iface_cmdq_write(core, core->packet); + if (rc) + return rc; + + d_vpr_h("SFR buffer packet queued\n"); + + return rc; +} + static int __sys_image_version(struct msm_vidc_core *core) { int rc = 0; @@ -2640,6 +2682,10 @@ int venus_hfi_core_init(struct msm_vidc_core *core) if (rc) goto error; + rc = __queue_sfr_buffer(core); + if (rc) + goto error; + rc = __sys_image_version(core); if (rc) goto error; diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index 5f052cab7f..bdb07f878a 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -28,6 +28,29 @@ void print_psc_properties(u32 tag, const char *str, struct msm_vidc_inst *inst, subsc_params.tier); } +static void print_sfr_message(struct msm_vidc_core *core) +{ + struct msm_vidc_sfr *vsfr = NULL; + u32 vsfr_size = 0; + void *p = NULL; + + vsfr = (struct msm_vidc_sfr *)core->sfr.align_virtual_addr; + if (vsfr) { + if (vsfr->bufSize != core->sfr.mem_size) { + d_vpr_e("Invalid SFR buf size %d actual %d\n", + vsfr->bufSize, core->sfr.mem_size); + return; + } + vsfr_size = vsfr->bufSize - sizeof(u32); + p = memchr(vsfr->rg_data, '\0', vsfr_size); + /* SFR isn't guaranteed to be NULL terminated */ + if (p == NULL) + vsfr->rg_data[vsfr_size - 1] = '\0'; + + d_vpr_e("SFR Message from FW: %s\n", vsfr->rg_data); + } +} + u32 vidc_port_from_hfi(struct msm_vidc_inst *inst, enum hfi_packet_port_type hfi_port) { @@ -239,6 +262,7 @@ static int handle_system_error(struct msm_vidc_core *core, struct hfi_packet *pkt) { d_vpr_e("%s: system error received\n", __func__); + print_sfr_message(core); msm_vidc_core_deinit(core, true); return 0; } From c0b11f64829c3d0ba9b47efd7e6bb15dd33af53a Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Wed, 27 Jan 2021 10:30:36 -0800 Subject: [PATCH 0085/1061] video: driver: fix line and dpb buffers for enc - Removed internal bufsize hack to increase bufsize by 100MB. - update enc internal buf size adn count macros to align with video fw macro definitions. P4 cl: 28472789 and 28496178 Change-Id: I30a4d043a07c6e890d58f4138590f112d192080a Signed-off-by: Akshata Sahukar --- driver/variant/iris2/inc/hfi_buffer_iris2.h | 15 ++++++++------- driver/variant/iris2/src/msm_vidc_buffer_iris2.c | 8 +++++--- driver/vidc/src/msm_vidc_driver.c | 4 ---- 3 files changed, 13 insertions(+), 14 deletions(-) diff --git a/driver/variant/iris2/inc/hfi_buffer_iris2.h b/driver/variant/iris2/inc/hfi_buffer_iris2.h index a6765bd014..701455e839 100644 --- a/driver/variant/iris2/inc/hfi_buffer_iris2.h +++ b/driver/variant/iris2/inc/hfi_buffer_iris2.h @@ -1238,13 +1238,13 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ * Here: _total_hp_layers = HFI_PROPERTY_PARAM_VENC_HIER_P_MAX_NUM_ENH_LAYER + 1 * Here: _total_hb_layers = HFI_PROPERTY_PARAM_VENC_HIER_B_MAX_NUM_ENH_LAYER + 1 */ -#define HFI_IRIS2_ENC_RECON_BUF_COUNT(num_ref, n_bframe, ltr_count, \ +#define HFI_IRIS2_ENC_RECON_BUF_COUNT(num_recon, n_bframe, ltr_count, \ _total_hp_layers, _total_hb_layers, hybrid_hp, codec_standard) \ do \ { \ - num_ref = 1; \ + HFI_U32 num_ref = 1; \ if (n_bframe) \ - num_ref = n_bframe + 1; \ + num_ref = 2; \ if (ltr_count) \ /* B and LTR can't be at same time */\ num_ref = num_ref + ltr_count; \ @@ -1270,6 +1270,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ { \ num_ref = (2 ^ (_total_hb_layers - 1)) / 2 + 1; \ } \ + num_recon = num_ref + 1; \ } while (0) #define SIZE_BIN_BITSTREAM_ENC(_size, frame_width, frame_height, \ @@ -1521,14 +1522,14 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define SIZE_LAMBDA_LUT (256 * 11) #define SIZE_OVERRIDE_BUF(num_lcumb) (HFI_ALIGN(((16 * (((num_lcumb) + 7)\ >> 3))), VENUS_DMA_ALIGNMENT) * 2) -#define SIZE_IR_BUF(num_lcu_in_frame) (((((num_lcu_in_frame) << 1) + 7) &\ - (~7)) * 3) +#define SIZE_IR_BUF(num_lcu_in_frame) HFI_ALIGN((((((num_lcu_in_frame) << 1) + 7) &\ + (~7)) * 3), VENUS_DMA_ALIGNMENT) #define SIZE_VPSS_LINE_BUF(num_vpp_pipes_enc, frame_height_coded, \ frame_width_coded) \ - ((((((8192) >> 2) << 5) * (num_vpp_pipes_enc)) + 64) + \ + (HFI_ALIGN(((((((8192) >> 2) << 5) * (num_vpp_pipes_enc)) + 64) + \ (((((MAX((frame_width_coded), (frame_height_coded)) + 3) >> 2) << 5) +\ - 256) * 16)) + 256) * 16)), VENUS_DMA_ALIGNMENT)) #define SIZE_TOP_LINE_BUF_FIRST_STG_SAO(frame_width_coded) \ HFI_ALIGN((16 * ((frame_width_coded) >> 5)), VENUS_DMA_ALIGNMENT) diff --git a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c index 0cc1b33332..2d74363d84 100644 --- a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c @@ -270,7 +270,7 @@ static u32 msm_vidc_encoder_bin_size_iris2(struct msm_vidc_inst *inst) static u32 msm_vidc_encoder_comv_size_iris2(struct msm_vidc_inst* inst) { u32 size = 0; - u32 width, height, num_ref; + u32 width, height, num_ref = 0, num_recon = 0; struct v4l2_format* f; if (!inst || !inst->core) { @@ -284,13 +284,15 @@ static u32 msm_vidc_encoder_comv_size_iris2(struct msm_vidc_inst* inst) if (inst->codec == MSM_VIDC_H264) { // TODO: replace zeros with appropriate variables - HFI_IRIS2_ENC_RECON_BUF_COUNT(num_ref, 0, 0, 0, 0, 0, + HFI_IRIS2_ENC_RECON_BUF_COUNT(num_recon, 0, 0, 0, 0, 0, HFI_CODEC_ENCODE_AVC); + num_ref = num_recon - 1; HFI_BUFFER_COMV_H264E(size, width, height, num_ref); } else if (inst->codec == MSM_VIDC_HEVC) { // TODO: replace zeros with appropriate variables - HFI_IRIS2_ENC_RECON_BUF_COUNT(num_ref, 0, 0, 0, 0, 0, + HFI_IRIS2_ENC_RECON_BUF_COUNT(num_recon, 0, 0, 0, 0, 0, HFI_CODEC_ENCODE_HEVC); + num_ref = num_recon - 1; HFI_BUFFER_COMV_H265E(size, width, height, num_ref); } diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index e91a146402..7dae2c3dd0 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -1579,10 +1579,6 @@ int msm_vidc_get_internal_buffers(struct msm_vidc_inst *inst, buf_size = call_session_op(core, buffer_size, inst, buffer_type); - /* TODO: remove below hack to increase enc inter buf size by 100MB */ - if (is_encode_session(inst)) - buf_size += 100000000; - buf_count = call_session_op(core, min_count, inst, buffer_type); From b226d6a0892ba2acaf96194b13fc99ef31bbfa5a Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Tue, 26 Jan 2021 17:03:39 -0800 Subject: [PATCH 0086/1061] video: driver: fixes for nv12 format and dpb buffer fixes for nv12 format and dpb buffers. modified PIX_FMTS and corresponding driver color format structure, therby fixing enum_fmts. Change-Id: I955b76dd4938e96fe259311e107a0cdca39425bc Signed-off-by: Darshana Patil --- driver/platform/waipio/src/msm_vidc_waipio.c | 16 ++--- .../variant/iris2/src/msm_vidc_buffer_iris2.c | 14 ++-- driver/vidc/inc/msm_media_info.h | 66 +++---------------- driver/vidc/inc/msm_vidc_internal.h | 14 ++-- driver/vidc/src/hfi_packet.c | 2 +- driver/vidc/src/msm_vdec.c | 34 ++++++---- driver/vidc/src/msm_venc.c | 9 ++- driver/vidc/src/msm_vidc_driver.c | 5 +- 8 files changed, 61 insertions(+), 99 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index f44839723e..864704c7e0 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -117,13 +117,13 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {PIX_FMTS, ENC, H264, MSM_VIDC_FMT_NV12, MSM_VIDC_FMT_NV12C, - BIT(MSM_VIDC_FMT_NV12) | BIT(MSM_VIDC_FMT_NV21) | BIT(MSM_VIDC_FMT_NV12C), + MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C, MSM_VIDC_FMT_NV12C}, {PIX_FMTS, ENC, HEVC, MSM_VIDC_FMT_NV12, MSM_VIDC_FMT_TP10C, - BIT(MSM_VIDC_FMT_NV12) | BIT(MSM_VIDC_FMT_NV21) | BIT(MSM_VIDC_FMT_NV12C ) | - BIT(MSM_VIDC_FMT_P010) | BIT(MSM_VIDC_FMT_TP10C), + MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C | + MSM_VIDC_FMT_P010 | MSM_VIDC_FMT_TP10C, MSM_VIDC_FMT_NV12C, 0, 0, CAP_FLAG_ROOT, @@ -133,8 +133,8 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {PIX_FMTS, DEC, HEVC, MSM_VIDC_FMT_NV12, MSM_VIDC_FMT_TP10C, - BIT(MSM_VIDC_FMT_NV12) | BIT(MSM_VIDC_FMT_NV21) | BIT(MSM_VIDC_FMT_NV12C ) | - BIT(MSM_VIDC_FMT_P010) | BIT(MSM_VIDC_FMT_TP10C), + MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C | + MSM_VIDC_FMT_P010 | MSM_VIDC_FMT_TP10C, MSM_VIDC_FMT_NV12C, 0, 0, CAP_FLAG_ROOT, @@ -144,14 +144,14 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {PIX_FMTS, DEC, H264, MSM_VIDC_FMT_NV12, MSM_VIDC_FMT_NV12C, - BIT(MSM_VIDC_FMT_NV12) | BIT(MSM_VIDC_FMT_NV21) | BIT(MSM_VIDC_FMT_NV12C), + MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C, MSM_VIDC_FMT_NV12C}, {PIX_FMTS, DEC, VP9, MSM_VIDC_FMT_NV12, MSM_VIDC_FMT_TP10C, - BIT(MSM_VIDC_FMT_NV12) | BIT(MSM_VIDC_FMT_NV21) | BIT(MSM_VIDC_FMT_NV12C) | - BIT(MSM_VIDC_FMT_P010) | BIT(MSM_VIDC_FMT_TP10C), + MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C | + MSM_VIDC_FMT_P010 | MSM_VIDC_FMT_TP10C, MSM_VIDC_FMT_NV12C}, {MIN_BUFFERS_INPUT, ENC|DEC, CODECS_ALL, 0, 64, 1, 4, diff --git a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c index 2d74363d84..a1cdd7ef98 100644 --- a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c @@ -125,7 +125,7 @@ static u32 msm_vidc_decoder_line_size_iris2(struct msm_vidc_inst *inst) u32 width, height, out_min_count, num_vpp_pipes, vpp_delay; struct v4l2_format *f; bool is_opb; - u32 pixelformat; + u32 color_fmt; if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); @@ -138,12 +138,17 @@ static u32 msm_vidc_decoder_line_size_iris2(struct msm_vidc_inst *inst) } num_vpp_pipes = core->capabilities[NUM_VPP_PIPE].value; - pixelformat = inst->fmts[OUTPUT_PORT].fmt.pix_mp.pixelformat; - if (pixelformat == MSM_VIDC_FMT_NV12 || - pixelformat == MSM_VIDC_FMT_P010) + color_fmt = v4l2_colorformat_to_driver( + inst->fmts[OUTPUT_PORT].fmt.pix_mp.pixelformat, __func__); + if (is_linear_colorformat(color_fmt)) is_opb = true; else is_opb = false; + /* + * assume worst case, since color format is unknown at this + * time + */ + is_opb = true; if (inst->decode_vpp_delay.enable) vpp_delay = inst->decode_vpp_delay.size; @@ -155,7 +160,6 @@ static u32 msm_vidc_decoder_line_size_iris2(struct msm_vidc_inst *inst) height = f->fmt.pix_mp.height; out_min_count = inst->buffers.output.min_count; out_min_count = max(vpp_delay + 1, out_min_count); - if (inst->codec == MSM_VIDC_H264) HFI_BUFFER_LINE_H264D(size, width, height, is_opb, num_vpp_pipes); diff --git a/driver/vidc/inc/msm_media_info.h b/driver/vidc/inc/msm_media_info.h index b61d7159da..f9aa5b2a51 100644 --- a/driver/vidc/inc/msm_media_info.h +++ b/driver/vidc/inc/msm_media_info.h @@ -49,10 +49,10 @@ enum color_fmts { * . . . . . . . . . . . . . . . . V * . . . . . . . . . . . . . . . . --> Buffer size alignment * - * Y_Stride : Width aligned to 512 - * UV_Stride : Width aligned to 512 - * Y_Scanlines: Height aligned to 512 - * UV_Scanlines: Height/2 aligned to 256 + * Y_Stride : Width aligned to 128 + * UV_Stride : Width aligned to 128 + * Y_Scanlines: Height aligned to 32 + * UV_Scanlines: Height/2 aligned to 16 * Total size = align(Y_Stride * Y_Scanlines * + UV_Stride * UV_Scanlines, 4096) */ @@ -84,10 +84,10 @@ enum color_fmts { * . . . . . . . . . . . . . . . . V * . . . . . . . . . . . . . . . . --> Padding & Buffer size alignment * - * Y_Stride : Width aligned to 512 - * UV_Stride : Width aligned to 512 - * Y_Scanlines: Height aligned to 512 - * UV_Scanlines: Height/2 aligned to 256 + * Y_Stride : Width aligned to 128 + * UV_Stride : Width aligned to 128 + * Y_Scanlines: Height aligned to 32 + * UV_Scanlines: Height/2 aligned to 16 * Total size = align(Y_Stride * Y_Scanlines * + UV_Stride * UV_Scanlines, 4096) */ @@ -731,41 +731,6 @@ enum color_fmts { * + UV_Stride * UV_Scanlines, 4096) */ COLOR_FMT_P010, - /* Venus NV12_512: - * YUV 4:2:0 image with a plane of 8 bit Y samples followed - * by an interleaved U/V plane containing 8 bit 2x2 subsampled - * colour difference samples. - * - * <-------- Y/UV_Stride --------> - * <------- Width -------> - * Y Y Y Y Y Y Y Y Y Y Y Y . . . . ^ ^ - * Y Y Y Y Y Y Y Y Y Y Y Y . . . . | | - * Y Y Y Y Y Y Y Y Y Y Y Y . . . . Height | - * Y Y Y Y Y Y Y Y Y Y Y Y . . . . | Y_Scanlines - * Y Y Y Y Y Y Y Y Y Y Y Y . . . . | | - * Y Y Y Y Y Y Y Y Y Y Y Y . . . . | | - * Y Y Y Y Y Y Y Y Y Y Y Y . . . . | | - * Y Y Y Y Y Y Y Y Y Y Y Y . . . . V | - * . . . . . . . . . . . . . . . . | - * . . . . . . . . . . . . . . . . | - * . . . . . . . . . . . . . . . . | - * . . . . . . . . . . . . . . . . V - * U V U V U V U V U V U V . . . . ^ - * U V U V U V U V U V U V . . . . | - * U V U V U V U V U V U V . . . . | - * U V U V U V U V U V U V . . . . UV_Scanlines - * . . . . . . . . . . . . . . . . | - * . . . . . . . . . . . . . . . . V - * . . . . . . . . . . . . . . . . --> Buffer size alignment - * - * Y_Stride : Width aligned to 512 - * UV_Stride : Width aligned to 512 - * Y_Scanlines: Height aligned to 512 - * UV_Scanlines: Height/2 aligned to 256 - * Total size = align((Y_Stride * Y_Scanlines - * + UV_Stride * UV_Scanlines), 4096) - */ - COLOR_FMT_NV12_512, }; /* @@ -786,10 +751,6 @@ static inline unsigned int VENUS_Y_STRIDE(unsigned int color_fmt, switch (color_fmt) { case COLOR_FMT_NV12: case COLOR_FMT_NV21: - case COLOR_FMT_NV12_512: - alignment = 512; - stride = MSM_MEDIA_ALIGN(width, alignment); - break; case COLOR_FMT_NV12_UBWC: alignment = 128; stride = MSM_MEDIA_ALIGN(width, alignment); @@ -829,10 +790,6 @@ static inline unsigned int VENUS_UV_STRIDE(unsigned int color_fmt, switch (color_fmt) { case COLOR_FMT_NV21: case COLOR_FMT_NV12: - case COLOR_FMT_NV12_512: - alignment = 512; - stride = MSM_MEDIA_ALIGN(width, alignment); - break; case COLOR_FMT_NV12_UBWC: alignment = 128; stride = MSM_MEDIA_ALIGN(width, alignment); @@ -872,9 +829,6 @@ static inline unsigned int VENUS_Y_SCANLINES(unsigned int color_fmt, switch (color_fmt) { case COLOR_FMT_NV12: case COLOR_FMT_NV21: - case COLOR_FMT_NV12_512: - alignment = 512; - break; case COLOR_FMT_NV12_UBWC: case COLOR_FMT_P010: alignment = 32; @@ -909,9 +863,6 @@ static inline unsigned int VENUS_UV_SCANLINES(unsigned int color_fmt, switch (color_fmt) { case COLOR_FMT_NV21: case COLOR_FMT_NV12: - case COLOR_FMT_NV12_512: - alignment = 256; - break; case COLOR_FMT_NV12_BPP10_UBWC: case COLOR_FMT_P010_UBWC: case COLOR_FMT_P010: @@ -1211,7 +1162,6 @@ static inline unsigned int VENUS_BUFFER_SIZE(unsigned int color_fmt, case COLOR_FMT_NV21: case COLOR_FMT_NV12: case COLOR_FMT_P010: - case COLOR_FMT_NV12_512: y_plane = y_stride * y_sclines; uv_plane = uv_stride * uv_sclines; size = y_plane + uv_plane; diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 59ddc61136..302ce88cad 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -116,13 +116,13 @@ enum msm_vidc_codec_type { enum msm_vidc_colorformat_type { MSM_VIDC_FMT_NONE = 0, - MSM_VIDC_FMT_NV12 = 1, - MSM_VIDC_FMT_NV12C = 2, - MSM_VIDC_FMT_P010 = 3, - MSM_VIDC_FMT_TP10C = 4, - MSM_VIDC_FMT_RGBA8888 = 5, - MSM_VIDC_FMT_RGBA8888C = 6, - MSM_VIDC_FMT_NV21 = 7, + MSM_VIDC_FMT_NV12 = BIT(0), + MSM_VIDC_FMT_NV21 = BIT(1), + MSM_VIDC_FMT_NV12C = BIT(2), + MSM_VIDC_FMT_P010 = BIT(3), + MSM_VIDC_FMT_TP10C = BIT(4), + MSM_VIDC_FMT_RGBA8888 = BIT(5), + MSM_VIDC_FMT_RGBA8888C = BIT(6), }; enum msm_vidc_buffer_type { diff --git a/driver/vidc/src/hfi_packet.c b/driver/vidc/src/hfi_packet.c index 235cd42a88..501230fc32 100644 --- a/driver/vidc/src/hfi_packet.c +++ b/driver/vidc/src/hfi_packet.c @@ -66,7 +66,6 @@ u32 get_hfi_port_from_buffer_type(struct msm_vidc_inst *inst, case MSM_VIDC_BUF_COMV: case MSM_VIDC_BUF_NON_COMV: case MSM_VIDC_BUF_LINE: - case MSM_VIDC_BUF_DPB: hfi_port = HFI_PORT_BITSTREAM; break; case MSM_VIDC_BUF_PERSIST: @@ -75,6 +74,7 @@ u32 get_hfi_port_from_buffer_type(struct msm_vidc_inst *inst, break; case MSM_VIDC_BUF_OUTPUT: case MSM_VIDC_BUF_OUTPUT_META: + case MSM_VIDC_BUF_DPB: hfi_port = HFI_PORT_RAW; break; default: diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 300e856109..c4f77d9c2a 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -787,9 +787,9 @@ static int msm_vdec_get_output_internal_buffers(struct msm_vidc_inst *inst) s_vpr_h(inst->sid, "output internal buffer: min size reuse\n"); s_vpr_h(inst->sid, "dpb buffer: %d %d %d\n", - inst->buffers.bin.min_count, - inst->buffers.bin.size, - inst->buffers.bin.reuse); + inst->buffers.dpb.min_count, + inst->buffers.dpb.size, + inst->buffers.dpb.reuse); return rc; } @@ -1519,11 +1519,11 @@ int msm_vdec_streamon_output(struct msm_vidc_inst *inst) if (rc) goto error; - rc = msm_vdec_queue_output_internal_buffers(inst); + rc = msm_vidc_session_streamon(inst, OUTPUT_PORT); if (rc) goto error; - rc = msm_vidc_session_streamon(inst, OUTPUT_PORT); + rc = msm_vdec_queue_output_internal_buffers(inst); if (rc) goto error; @@ -1704,6 +1704,10 @@ int msm_vdec_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) } else if (f->type == OUTPUT_MPLANE) { fmt = &inst->fmts[OUTPUT_PORT]; fmt->type = OUTPUT_MPLANE; + if (inst->vb2q[INPUT_PORT].streaming) { + f->fmt.pix_mp.height = fmt->fmt.pix_mp.height; + f->fmt.pix_mp.width = fmt->fmt.pix_mp.width; + } fmt->fmt.pix_mp.pixelformat = f->fmt.pix_mp.pixelformat; fmt->fmt.pix_mp.width = VENUS_Y_STRIDE( v4l2_colorformat_to_media( @@ -1718,8 +1722,10 @@ int msm_vdec_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) fmt->fmt.pix_mp.width; fmt->fmt.pix_mp.plane_fmt[0].sizeimage = call_session_op(core, buffer_size, inst, MSM_VIDC_BUF_OUTPUT); - inst->buffers.output.min_count = call_session_op(core, - min_count, inst, MSM_VIDC_BUF_OUTPUT); + + if (!inst->vb2q[INPUT_PORT].streaming) + inst->buffers.output.min_count = call_session_op(core, + min_count, inst, MSM_VIDC_BUF_OUTPUT); inst->buffers.output.extra_count = call_session_op(core, extra_count, inst, MSM_VIDC_BUF_OUTPUT); if (inst->buffers.output.actual_count < @@ -1731,7 +1737,8 @@ int msm_vdec_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) } inst->buffers.output.size = fmt->fmt.pix_mp.plane_fmt[0].sizeimage; - + inst->capabilities->cap[PIX_FMTS].value = + v4l2_colorformat_to_driver(f->fmt.pix_mp.pixelformat, __func__); //rc = msm_vidc_check_session_supported(inst); if (rc) goto err_invalid_fmt; @@ -1982,14 +1989,13 @@ int msm_vdec_enum_fmt(struct msm_vidc_inst *inst, struct v4l2_fmtdesc *f) u32 codecs = core->capabilities[DEC_CODECS].value; while (codecs) { - if (idx > 31) + if (i > 31) break; if (codecs & BIT(i)) { array[idx] = codecs & BIT(i); idx++; } i++; - codecs >>= 1; } f->pixelformat = v4l2_codec_from_driver(array[f->index], __func__); @@ -2001,7 +2007,7 @@ int msm_vdec_enum_fmt(struct msm_vidc_inst *inst, struct v4l2_fmtdesc *f) u32 formats = inst->capabilities->cap[PIX_FMTS].step_or_mask; while (formats) { - if (idx > 31) + if (i > 31) break; if (formats & BIT(i)) { if (msm_vdec_check_colorformat_supported(inst, @@ -2011,7 +2017,6 @@ int msm_vdec_enum_fmt(struct msm_vidc_inst *inst, struct v4l2_fmtdesc *f) } } i++; - formats >>= 1; } f->pixelformat = v4l2_colorformat_from_driver(array[f->index], __func__); @@ -2028,8 +2033,9 @@ int msm_vdec_enum_fmt(struct msm_vidc_inst *inst, struct v4l2_fmtdesc *f) } memset(f->reserved, 0, sizeof(f->reserved)); - s_vpr_h(inst->sid, "%s: index %d, %s : %#x, flags %#x\n", - __func__, f->index, f->description, f->pixelformat, f->flags); + s_vpr_h(inst->sid, "%s: index %d, %s : %#x, flags %#x, driver colorfmt %#x\n", + __func__, f->index, f->description, f->pixelformat, f->flags, + v4l2_colorformat_to_driver(f->pixelformat, __func__)); return rc; } diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index 60fa93c80c..ba4644e7f0 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -1463,14 +1463,13 @@ int msm_venc_enum_fmt(struct msm_vidc_inst *inst, struct v4l2_fmtdesc *f) u32 codecs = core->capabilities[DEC_CODECS].value; while (codecs) { - if (idx > 31) + if (i > 31) break; if (codecs & BIT(i)) { array[idx] = codecs & BIT(i); idx++; } i++; - codecs >>= 1; } f->pixelformat = v4l2_codec_from_driver(array[f->index], __func__); @@ -1489,7 +1488,6 @@ int msm_venc_enum_fmt(struct msm_vidc_inst *inst, struct v4l2_fmtdesc *f) idx++; } i++; - formats >>= 1; } f->pixelformat = v4l2_colorformat_from_driver(array[f->index], __func__); @@ -1506,8 +1504,9 @@ int msm_venc_enum_fmt(struct msm_vidc_inst *inst, struct v4l2_fmtdesc *f) } memset(f->reserved, 0, sizeof(f->reserved)); - s_vpr_h(inst->sid, "%s: index %d, %s : %#x, flags %#x\n", - __func__, f->index, f->description, f->pixelformat, f->flags); + s_vpr_h(inst->sid, "%s: index %d, %s : %#x, flags %#x, driver colorfmt %#x\n", + __func__, f->index, f->description, f->pixelformat, f->flags, + v4l2_colorformat_to_driver(f->pixelformat, __func__)); return rc; } diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 7dae2c3dd0..33fbd1f3ee 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -1707,8 +1707,11 @@ int msm_vidc_create_internal_buffers(struct msm_vidc_inst *inst, return 0; } - for (i = 0; i < buffers->min_count; i++) + for (i = 0; i < buffers->min_count; i++) { rc = msm_vidc_create_internal_buffer(inst, buffer_type, i); + if (rc) + return rc; + } return rc; } From 6b6b21c70597abf4dc4974952a1bb245d0780f16 Mon Sep 17 00:00:00 2001 From: Chinmay Sawarkar Date: Thu, 28 Jan 2021 13:40:13 -0800 Subject: [PATCH 0087/1061] waipio: driver: Set missing video domain for bw Video domain information is required to make correct BW vote calculations. Change-Id: I36cf1d157ba50f43a64e736f7d3e86d15d195244 Signed-off-by: Chinmay Sawarkar --- driver/variant/iris2/src/msm_vidc_power_iris2.c | 2 +- driver/vidc/src/msm_vidc_power.c | 15 +++++++++++---- 2 files changed, 12 insertions(+), 5 deletions(-) diff --git a/driver/variant/iris2/src/msm_vidc_power_iris2.c b/driver/variant/iris2/src/msm_vidc_power_iris2.c index eb045d4495..eeee40f006 100644 --- a/driver/variant/iris2/src/msm_vidc_power_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_power_iris2.c @@ -660,7 +660,7 @@ static u64 __calculate(struct msm_vidc_inst* inst, struct vidc_bus_vote_data *d) value = __calculate_decoder(d); break; default: - s_vpr_e(inst->sid, "Unknown Domain %#x", d->domain); + s_vpr_e(inst->sid, "%s: Unknown Domain %#x", __func__, d->domain); } return value; diff --git a/driver/vidc/src/msm_vidc_power.c b/driver/vidc/src/msm_vidc_power.c index 61e0c07473..ce377b7b7b 100644 --- a/driver/vidc/src/msm_vidc_power.c +++ b/driver/vidc/src/msm_vidc_power.c @@ -188,12 +188,12 @@ static int msm_vidc_set_buses(struct msm_vidc_inst* inst) continue; } - if (temp->bus_data.power_mode == VIDC_POWER_TURBO) { + if (temp->power.power_mode == VIDC_POWER_TURBO) { total_bw_ddr = total_bw_llcc = INT_MAX; break; } - total_bw_ddr += temp->bus_data.calc_bw_ddr; - total_bw_llcc += temp->bus_data.calc_bw_llcc; + total_bw_ddr += temp->power.ddr_bw; + total_bw_llcc += temp->power.sys_cache_bw; } mutex_unlock(&core->lock); @@ -231,7 +231,7 @@ int msm_vidc_scale_buses(struct msm_vidc_inst *inst) if (!data_size) return 0; - vote_data->power_mode = VIDC_POWER_TURBO; + vote_data->power_mode = VIDC_POWER_NORMAL; if (inst->power.buffer_counter < DCVS_FTB_WINDOW) vote_data->power_mode = VIDC_POWER_TURBO; if (msm_vidc_clock_voting) @@ -266,6 +266,7 @@ int msm_vidc_scale_buses(struct msm_vidc_inst *inst) vote_data->fps = msm_vidc_get_fps(inst); if (inst->domain == MSM_VIDC_ENCODER) { + vote_data->domain = MSM_VIDC_ENCODER; vote_data->bitrate = inst->capabilities->cap[BIT_RATE].value; vote_data->rotation = inst->capabilities->cap[ROTATION].value; vote_data->b_frames_enabled = @@ -282,6 +283,7 @@ int msm_vidc_scale_buses(struct msm_vidc_inst *inst) } else if (inst->domain == MSM_VIDC_DECODER) { u32 color_format; + vote_data->domain = MSM_VIDC_DECODER; vote_data->bitrate = data_size * vote_data->fps * 8; color_format = v4l2_colorformat_to_driver( inst->fmts[OUTPUT_PORT].fmt.pix_mp.pixelformat, __func__); @@ -310,6 +312,10 @@ int msm_vidc_scale_buses(struct msm_vidc_inst *inst) call_session_op(core, calc_bw, inst, vote_data); + inst->power.power_mode = vote_data->power_mode; + inst->power.ddr_bw = vote_data->calc_bw_ddr; + inst->power.sys_cache_bw = vote_data->calc_bw_llcc; + set_buses: rc = msm_vidc_set_buses(inst); if (rc) @@ -499,6 +505,7 @@ int msm_vidc_scale_clocks(struct msm_vidc_inst *inst) call_session_op(core, calc_freq, inst, data_size); msm_vidc_apply_dcvs(inst); } + inst->power.curr_freq = inst->power.min_freq; msm_vidc_set_clocks(inst); return 0; From 2719badd2bbdb97cdbc83c447c2966a46bacab26 Mon Sep 17 00:00:00 2001 From: Maheshwar Ajja Date: Tue, 26 Jan 2021 22:42:15 -0800 Subject: [PATCH 0088/1061] video: driver: amend stop and last flag processing - do not ignore last flag buffer in last flag not allowed case also - ignore stop command if input port is not streaming instead of returning -EBUSY error. - defer input port settings change in few states instead of ignoring it. Change-Id: I705f0c8ae2da899a5d262f6246aa65de5591ac26 Signed-off-by: Maheshwar Ajja --- driver/vidc/inc/msm_vidc_driver.h | 4 +-- driver/vidc/inc/msm_vidc_internal.h | 7 +++++ driver/vidc/src/msm_vdec.c | 8 ++++- driver/vidc/src/msm_venc.c | 8 ++++- driver/vidc/src/msm_vidc_driver.c | 36 ++++++++++++++--------- driver/vidc/src/venus_hfi_response.c | 44 +++++++++++++++------------- 6 files changed, 69 insertions(+), 38 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index bbfc92e521..454b5de027 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -276,12 +276,12 @@ void put_inst(struct msm_vidc_inst *inst); bool msm_vidc_allow_s_fmt(struct msm_vidc_inst *inst, u32 type); bool msm_vidc_allow_s_ctrl(struct msm_vidc_inst *inst, u32 id); bool msm_vidc_allow_reqbufs(struct msm_vidc_inst *inst, u32 type); -bool msm_vidc_allow_stop(struct msm_vidc_inst *inst); +enum msm_vidc_allow msm_vidc_allow_stop(struct msm_vidc_inst *inst); bool msm_vidc_allow_start(struct msm_vidc_inst *inst); bool msm_vidc_allow_streamon(struct msm_vidc_inst *inst, u32 type); bool msm_vidc_allow_streamoff(struct msm_vidc_inst *inst, u32 type); bool msm_vidc_allow_qbuf(struct msm_vidc_inst *inst); -bool msm_vidc_allow_input_psc(struct msm_vidc_inst *inst); +enum msm_vidc_allow msm_vidc_allow_input_psc(struct msm_vidc_inst *inst); bool msm_vidc_allow_last_flag(struct msm_vidc_inst *inst); int msm_vidc_state_change_streamon(struct msm_vidc_inst *inst, u32 type); int msm_vidc_state_change_streamoff(struct msm_vidc_inst *inst, u32 type); diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 302ce88cad..0c9c1a7552 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -713,6 +713,13 @@ struct msm_vidc_buffers { bool reuse; }; +enum msm_vidc_allow { + MSM_VIDC_DISALLOW = 0, + MSM_VIDC_ALLOW, + MSM_VIDC_DEFER, + MSM_VIDC_IGNORE, +}; + enum response_work_type { RESP_WORK_INPUT_PSC = 1, RESP_WORK_OUTPUT_PSC, diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index c4f77d9c2a..61c1e48fe3 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -1564,6 +1564,7 @@ int msm_vdec_qbuf(struct msm_vidc_inst *inst, struct vb2_buffer *vb2) int msm_vdec_process_cmd(struct msm_vidc_inst *inst, u32 cmd) { int rc = 0; + enum msm_vidc_allow allow = MSM_VIDC_DISALLOW; if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); @@ -1571,8 +1572,13 @@ int msm_vdec_process_cmd(struct msm_vidc_inst *inst, u32 cmd) } if (cmd == V4L2_DEC_CMD_STOP) { - if (!msm_vidc_allow_stop(inst)) + allow = msm_vidc_allow_stop(inst); + if (allow == MSM_VIDC_DISALLOW) return -EBUSY; + else if (allow == MSM_VIDC_IGNORE) + return 0; + else if (allow != MSM_VIDC_ALLOW) + return -EINVAL; rc = venus_hfi_session_command(inst, HFI_CMD_DRAIN, INPUT_PORT, diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index ba4644e7f0..cf379cb26b 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -837,6 +837,7 @@ error: int msm_venc_process_cmd(struct msm_vidc_inst *inst, u32 cmd) { int rc = 0; + enum msm_vidc_allow allow = MSM_VIDC_DISALLOW; if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); @@ -844,8 +845,13 @@ int msm_venc_process_cmd(struct msm_vidc_inst *inst, u32 cmd) } if (cmd == V4L2_ENC_CMD_STOP) { - if (!msm_vidc_allow_stop(inst)) + allow = msm_vidc_allow_stop(inst); + if (allow == MSM_VIDC_DISALLOW) return -EBUSY; + else if (allow == MSM_VIDC_IGNORE) + return 0; + else if (allow != MSM_VIDC_ALLOW) + return -EINVAL; rc = venus_hfi_session_command(inst, HFI_CMD_DRAIN, INPUT_PORT, diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 33fbd1f3ee..c2f1833382 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -654,21 +654,29 @@ exit: return allow; } -bool msm_vidc_allow_stop(struct msm_vidc_inst *inst) +enum msm_vidc_allow msm_vidc_allow_stop(struct msm_vidc_inst *inst) { + enum msm_vidc_allow allow = MSM_VIDC_DISALLOW; + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); - return false; + return allow; } if (inst->state == MSM_VIDC_START || inst->state == MSM_VIDC_DRC || inst->state == MSM_VIDC_DRC_LAST_FLAG || - inst->state == MSM_VIDC_DRC_DRAIN) - return true; - - s_vpr_e(inst->sid, "%s: not allowed in state %s\n", + inst->state == MSM_VIDC_DRC_DRAIN) { + allow = MSM_VIDC_ALLOW; + } else if (inst->state == MSM_VIDC_START_INPUT) { + allow = MSM_VIDC_IGNORE; + s_vpr_e(inst->sid, "%s: stop ignored in state %s\n", __func__, state_name(inst->state)); - return false; + } else { + s_vpr_e(inst->sid, "%s: stop not allowed in state %s\n", + __func__, state_name(inst->state)); + } + + return allow; } bool msm_vidc_allow_start(struct msm_vidc_inst *inst) @@ -753,30 +761,30 @@ bool msm_vidc_allow_qbuf(struct msm_vidc_inst *inst) } } -bool msm_vidc_allow_input_psc(struct msm_vidc_inst *inst) +enum msm_vidc_allow msm_vidc_allow_input_psc(struct msm_vidc_inst *inst) { - bool allow = false; + enum msm_vidc_allow allow = MSM_VIDC_DISALLOW; if (!inst) { d_vpr_e("%s: invalid params\n", __func__); - return false; + return MSM_VIDC_DISALLOW; } if (inst->state == MSM_VIDC_START || inst->state == MSM_VIDC_START_INPUT || inst->state == MSM_VIDC_DRAIN) { - allow = true; + allow = MSM_VIDC_ALLOW; } else if (inst->state == MSM_VIDC_DRC || inst->state == MSM_VIDC_DRC_LAST_FLAG || inst->state == MSM_VIDC_DRC_DRAIN || inst->state == MSM_VIDC_DRC_DRAIN_LAST_FLAG || inst->state == MSM_VIDC_DRAIN_START_INPUT) { - s_vpr_h(inst->sid, "%s: input psc postponed, inst state %s\n", + s_vpr_h(inst->sid, "%s: defer input psc, inst state %s\n", __func__, state_name(inst->state)); - allow = false; + allow = MSM_VIDC_DEFER; } else { s_vpr_e(inst->sid, "%s: input psc in wrong state %s\n", __func__, state_name(inst->state)); - allow = false; + allow = MSM_VIDC_DISALLOW; } return allow; diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index bdb07f878a..030ba3f84a 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -1191,7 +1191,6 @@ exit: void handle_session_response_work_handler(struct work_struct *work) { int rc = 0; - bool allow = false; struct msm_vidc_inst *inst; struct response_work *resp_work, *dummy = NULL; @@ -1206,37 +1205,42 @@ void handle_session_response_work_handler(struct work_struct *work) list_for_each_entry_safe(resp_work, dummy, &inst->response_works, list) { switch (resp_work->type) { case RESP_WORK_INPUT_PSC: - allow = msm_vidc_allow_input_psc(inst); - if (!allow) { - s_vpr_e(inst->sid, "%s: input psc not allowed\n", __func__); - break; - } - rc = handle_session_response_work(inst, resp_work); - if (!rc) - rc = msm_vidc_state_change_input_psc(inst); + { + enum msm_vidc_allow allow = MSM_VIDC_DISALLOW; - /* either handle input psc or state change failed */ - if (rc) + allow = msm_vidc_allow_input_psc(inst); + if (allow == MSM_VIDC_DISALLOW) { msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); + break; + } else if (allow == MSM_VIDC_DEFER) { + /* continue to next entry processing */ + continue; + } else if (allow == MSM_VIDC_ALLOW) { + rc = handle_session_response_work(inst, resp_work); + if (!rc) + rc = msm_vidc_state_change_input_psc(inst); + /* either handle input psc or state change failed */ + if (rc) + msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); + } break; + } case RESP_WORK_OUTPUT_PSC: rc = handle_session_response_work(inst, resp_work); if (rc) msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); break; case RESP_WORK_LAST_FLAG: - allow = msm_vidc_allow_last_flag(inst); - if (!allow) { - s_vpr_e(inst->sid, "%s: last flag not allowed\n", __func__); + rc = handle_session_response_work(inst, resp_work); + if (rc) { + msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); break; } - rc = handle_session_response_work(inst, resp_work); - if (!rc) + if (msm_vidc_allow_last_flag(inst)) { rc = msm_vidc_state_change_last_flag(inst); - - /* either handle last flag or state change failed */ - if (rc) - msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); + if (rc) + msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); + } break; default: d_vpr_e("%s: invalid response work type %d\n", __func__, From 4fe03d8ab171c52d9ac31a37a34d7d069a70fac1 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Thu, 28 Jan 2021 19:42:57 -0800 Subject: [PATCH 0089/1061] video: driver: Add support to debugfs Add debugfs support. Change-Id: I78b66048cc7a0d9e74bf0e0b13b5ab15ec77c17b Signed-off-by: Akshata Sahukar --- driver/vidc/inc/msm_vidc_core.h | 2 + driver/vidc/inc/msm_vidc_debug.h | 17 + driver/vidc/inc/msm_vidc_inst.h | 1 + driver/vidc/inc/msm_vidc_internal.h | 8 + driver/vidc/src/msm_vidc.c | 8 +- driver/vidc/src/msm_vidc_debug.c | 528 +++++++++++++++++++++++++++ driver/vidc/src/msm_vidc_driver.c | 6 + driver/vidc/src/msm_vidc_probe.c | 12 +- driver/vidc/src/venus_hfi_response.c | 22 +- 9 files changed, 590 insertions(+), 14 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_core.h b/driver/vidc/inc/msm_vidc_core.h index 8ad1e64388..f8bd3a960a 100644 --- a/driver/vidc/inc/msm_vidc_core.h +++ b/driver/vidc/inc/msm_vidc_core.h @@ -65,7 +65,9 @@ struct msm_vidc_core { struct v4l2_device v4l2_dev; struct list_head instances; struct list_head dangling_instances; + struct dentry *debugfs_parent; struct dentry *debugfs_root; + char fw_version[MAX_NAME_LENGTH]; enum msm_vidc_core_state state; struct mutex lock; struct msm_vidc_dt *dt; diff --git a/driver/vidc/inc/msm_vidc_debug.h b/driver/vidc/inc/msm_vidc_debug.h index 5a02e181ac..0ae4b4e258 100644 --- a/driver/vidc/inc/msm_vidc_debug.h +++ b/driver/vidc/inc/msm_vidc_debug.h @@ -11,6 +11,8 @@ #include #include +void do_gettimeofday(struct timeval *__ddl_tv); + #ifndef VIDC_DBG_LABEL #define VIDC_DBG_LABEL "msm_vidc" #endif @@ -103,4 +105,19 @@ enum vidc_msg_prio { const char *level_str(u32 level); +enum msm_vidc_debugfs_event { + MSM_VIDC_DEBUGFS_EVENT_ETB, + MSM_VIDC_DEBUGFS_EVENT_EBD, + MSM_VIDC_DEBUGFS_EVENT_FTB, + MSM_VIDC_DEBUGFS_EVENT_FBD, +}; + +struct dentry *msm_vidc_debugfs_init_drv(void); +struct dentry *msm_vidc_debugfs_init_core(void *core); +struct dentry *msm_vidc_debugfs_init_inst(void *inst, + struct dentry *parent); +void msm_vidc_debugfs_deinit_inst(void *inst); +void msm_vidc_debugfs_update(void *inst, + enum msm_vidc_debugfs_event e); + #endif diff --git a/driver/vidc/inc/msm_vidc_inst.h b/driver/vidc/inc/msm_vidc_inst.h index 0a0897ba2d..7267132411 100644 --- a/driver/vidc/inc/msm_vidc_inst.h +++ b/driver/vidc/inc/msm_vidc_inst.h @@ -132,6 +132,7 @@ struct msm_vidc_inst { bool opsc_properties_set; struct dentry *debugfs_root; struct msm_vidc_debug debug; + struct debug_buf_count debug_count; struct msm_vidc_inst_capability *capabilities; struct completion completions[MAX_SIGNAL]; bool active; diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 302ce88cad..d42b9be533 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -17,6 +17,7 @@ #include #define MAX_NAME_LENGTH 128 +#define VENUS_VERSION_LENGTH 128 #define MAX_MATRIX_COEFFS 9 #define MAX_BIAS_COEFFS 3 #define MAX_LIMIT_COEFFS 6 @@ -406,6 +407,13 @@ struct msm_vidc_inst_cap_entry { enum msm_vidc_inst_capability_type cap_id; }; +struct debug_buf_count { + int etb; + int ftb; + int fbd; + int ebd; +}; + enum efuse_purpose { SKU_VERSION = 0, }; diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index fc2a47074b..ad05c7b48d 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -781,9 +781,6 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) for (i = 0; i < MAX_SIGNAL; i++) init_completion(&inst->completions[i]); - //inst->debugfs_root = - // msm_vidc_debugfs_init_inst(inst, core->debugfs_root); - if (is_decode_session(inst)) rc = msm_vdec_inst_init(inst); else if (is_encode_session(inst)) @@ -805,6 +802,11 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) if (rc) goto error; + inst->debugfs_root = + msm_vidc_debugfs_init_inst(inst, core->debugfs_root); + if (!inst->debugfs_root) + s_vpr_h(inst->sid, "%s: debugfs not available\n", __func__); + return inst; error: diff --git a/driver/vidc/src/msm_vidc_debug.c b/driver/vidc/src/msm_vidc_debug.c index 3cac80c639..04223328eb 100644 --- a/driver/vidc/src/msm_vidc_debug.c +++ b/driver/vidc/src/msm_vidc_debug.c @@ -4,6 +4,15 @@ */ #include "msm_vidc_debug.h" +#include "msm_vidc_driver.h" +#include "msm_vidc_dt.h" +#include "msm_vidc.h" +#include "msm_vidc_core.h" +#include "msm_vidc_inst.h" +#include "msm_vidc_internal.h" + +#define MAX_SSR_STRING_LEN 10 +#define MAX_DEBUG_LEVEL_STRING_LEN 15 int msm_vidc_debug = VIDC_HIGH | VIDC_PKT | VIDC_ERR | VIDC_PRINTK | FW_ERROR | FW_FATAL; @@ -35,3 +44,522 @@ const char *level_str(u32 level) return "????"; } +#define MAX_DBG_BUF_SIZE 4096 + +struct core_inst_pair { + struct msm_vidc_core *core; + struct msm_vidc_inst *inst; +}; + +/* debug fs support */ + +static inline void tic(struct msm_vidc_inst *i, enum profiling_points p, + char *b) +{ + struct timeval __ddl_tv; + + if (!i->debug.pdata[p].name[0]) + memcpy(i->debug.pdata[p].name, b, 64); + if ((msm_vidc_debug & VIDC_PERF) && + i->debug.pdata[p].sampling) { + do_gettimeofday(&__ddl_tv); + i->debug.pdata[p].start = + (__ddl_tv.tv_sec * 1000) + (__ddl_tv.tv_usec / 1000); + i->debug.pdata[p].sampling = false; + } +} + +static inline void toc(struct msm_vidc_inst *i, enum profiling_points p) +{ + struct timeval __ddl_tv; + + if ((msm_vidc_debug & VIDC_PERF) && + !i->debug.pdata[p].sampling) { + do_gettimeofday(&__ddl_tv); + i->debug.pdata[p].stop = (__ddl_tv.tv_sec * 1000) + + (__ddl_tv.tv_usec / 1000); + i->debug.pdata[p].cumulative += i->debug.pdata[p].stop - + i->debug.pdata[p].start; + i->debug.pdata[p].sampling = true; + } +} + +static u32 write_str(char *buffer, + size_t size, const char *fmt, ...) +{ + va_list args; + u32 len; + + va_start(args, fmt); + len = vscnprintf(buffer, size, fmt, args); + va_end(args); + return len; +} + +static ssize_t core_info_read(struct file* file, char __user* buf, + size_t count, loff_t* ppos) +{ + struct msm_vidc_core *core = file->private_data; + char* dbuf, * cur, * end; + ssize_t len = 0; + + if (!core || !core->dt) { + d_vpr_e("%s: invalid params %pK\n", __func__, core); + return 0; + } + + dbuf = kzalloc(MAX_DBG_BUF_SIZE, GFP_KERNEL); + if (!dbuf) { + d_vpr_e("%s: Allocation failed!\n", __func__); + return -ENOMEM; + } + cur = dbuf; + end = cur + MAX_DBG_BUF_SIZE; + + cur += write_str(cur, end - cur, "Core state: %d\n", core->state); + + cur += write_str(cur, end - cur, + "FW version : %s\n", core->fw_version); + cur += write_str(cur, end - cur, + "register_base: 0x%x\n", core->dt->register_base); + cur += write_str(cur, end - cur, + "register_size: %u\n", core->dt->register_size); + cur += write_str(cur, end - cur, "irq: %u\n", core->dt->irq); + + len = simple_read_from_buffer(buf, count, ppos, + dbuf, cur - dbuf); + + kfree(dbuf); + return len; +} + +static const struct file_operations core_info_fops = { + .open = simple_open, + .read = core_info_read, +}; + +static ssize_t trigger_ssr_write(struct file* filp, const char __user* buf, + size_t count, loff_t* ppos) +{ + unsigned long ssr_trigger_val = 0; + int rc = 0; + struct msm_vidc_core* core = filp->private_data; + size_t size = MAX_SSR_STRING_LEN; + char kbuf[MAX_SSR_STRING_LEN + 1] = { 0 }; + + if (!buf) + return -EINVAL; + + if (!count) + goto exit; + + if (count < size) + size = count; + + if (copy_from_user(kbuf, buf, size)) { + d_vpr_e("%s: User memory fault\n", __func__); + rc = -EFAULT; + goto exit; + } + + rc = kstrtoul(kbuf, 0, &ssr_trigger_val); + if (rc) { + d_vpr_e("returning error err %d\n", rc); + rc = -EINVAL; + } + else { + msm_vidc_trigger_ssr(core, ssr_trigger_val); + rc = count; + } +exit: + return rc; +} + +static const struct file_operations ssr_fops = { + .open = simple_open, + .write = trigger_ssr_write, +}; + +static ssize_t debug_level_write(struct file* filp, const char __user* buf, + size_t count, loff_t* ppos) +{ + int rc = 0; + struct msm_vidc_core* core = filp->private_data; + char kbuf[MAX_DEBUG_LEVEL_STRING_LEN] = { 0 }; + + /* filter partial writes and invalid commands */ + if (*ppos != 0 || count >= sizeof(kbuf) || count == 0) { + d_vpr_e("returning error - pos %d, count %d\n", *ppos, count); + rc = -EINVAL; + } + + rc = simple_write_to_buffer(kbuf, sizeof(kbuf) - 1, ppos, buf, count); + if (rc < 0) { + d_vpr_e("%s: User memory fault\n", __func__); + rc = -EFAULT; + goto exit; + } + + rc = kstrtoint(kbuf, 0, &msm_vidc_debug); + if (rc) { + d_vpr_e("returning error err %d\n", rc); + rc = -EINVAL; + goto exit; + } + core->capabilities[HW_RESPONSE_TIMEOUT].value = + ((msm_vidc_debug & 0xFF) > + (VIDC_ERR | VIDC_HIGH)) ? 1500 : 1000; + rc = count; + d_vpr_h("debug timeout updated to - %d ms\n", + core->capabilities[HW_RESPONSE_TIMEOUT].value); + +exit: + return rc; +} + +static ssize_t debug_level_read(struct file* file, char __user* buf, + size_t count, loff_t* ppos) +{ + size_t len; + char kbuf[MAX_DEBUG_LEVEL_STRING_LEN]; + + len = scnprintf(kbuf, sizeof(kbuf), "0x%08x\n", msm_vidc_debug); + return simple_read_from_buffer(buf, count, ppos, kbuf, len); +} + +static const struct file_operations debug_level_fops = { + .open = simple_open, + .write = debug_level_write, + .read = debug_level_read, +}; + +struct dentry* msm_vidc_debugfs_init_drv() +{ + bool ok = false; + struct dentry *dir = NULL; + + dir = debugfs_create_dir("msm_vidc", NULL); + if (IS_ERR_OR_NULL(dir)) { + dir = NULL; + goto failed_create_dir; + } + +#define __debugfs_create(__type, __name, __value) ({ \ + struct dentry *f = debugfs_create_##__type(__name, 0644, \ + dir, __value); \ + if (IS_ERR_OR_NULL(f)) { \ + d_vpr_e("Failed creating debugfs file '%pd/%s'\n", \ + dir, __name); \ + f = NULL; \ + } \ + f; \ +}) + + ok = + __debugfs_create(u32, "core_clock_voting", + &msm_vidc_clock_voting) && + __debugfs_create(bool, "disable_video_syscache", + &msm_vidc_syscache_disable) && + __debugfs_create(bool, "lossless_encoding", + &msm_vidc_lossless_encode); + +#undef __debugfs_create + + if (!ok) + goto failed_create_dir; + + return dir; + +failed_create_dir: + if (dir) + debugfs_remove_recursive(dir); + + return NULL; +} + +struct dentry *msm_vidc_debugfs_init_core(void *core_in) +{ + struct dentry *dir = NULL; + char debugfs_name[MAX_DEBUGFS_NAME]; + struct msm_vidc_core *core = (struct msm_vidc_core *) core_in; + struct dentry *parent; + + if (!core || !core->debugfs_parent) { + d_vpr_e("%s: invalid params\n", __func__); + goto failed_create_dir; + } + parent = core->debugfs_parent; + + snprintf(debugfs_name, MAX_DEBUGFS_NAME, "core"); + dir = debugfs_create_dir(debugfs_name, parent); + if (IS_ERR_OR_NULL(dir)) { + dir = NULL; + d_vpr_e("Failed to create debugfs for msm_vidc\n"); + goto failed_create_dir; + } + if (!debugfs_create_file("info", 0444, dir, core, &core_info_fops)) { + d_vpr_e("debugfs_create_file: fail\n"); + goto failed_create_dir; + } + if (!debugfs_create_file("trigger_ssr", 0200, + dir, core, &ssr_fops)) { + d_vpr_e("debugfs_create_file: fail\n"); + goto failed_create_dir; + } + if (!debugfs_create_file("debug_level", 0644, + parent, core, &debug_level_fops)) { + d_vpr_e("debugfs_create_file: fail\n"); + goto failed_create_dir; + } +failed_create_dir: + return dir; +} + +static int inst_info_open(struct inode *inode, struct file *file) +{ + d_vpr_l("Open inode ptr: %pK\n", inode->i_private); + file->private_data = inode->i_private; + return 0; +} + +static int publish_unreleased_reference(struct msm_vidc_inst *inst, + char **dbuf, char *end) +{ + return 0; +} + +static ssize_t inst_info_read(struct file *file, char __user *buf, + size_t count, loff_t *ppos) +{ + struct core_inst_pair *idata = file->private_data; + struct msm_vidc_core *core; + struct msm_vidc_inst *inst; + char *dbuf, *cur, *end; + int i, j; + ssize_t len = 0; + struct v4l2_format *f; + + if (!idata || !idata->core || !idata->inst || + !idata->inst->capabilities) { + d_vpr_e("%s: invalid params %pK\n", __func__, idata); + return 0; + } + + core = idata->core; + inst = idata->inst; + + inst = get_inst(core, inst->session_id); + if (!inst) { + d_vpr_h("%s: instance has become obsolete", __func__); + return 0; + } + + dbuf = kzalloc(MAX_DBG_BUF_SIZE, GFP_KERNEL); + if (!dbuf) { + s_vpr_e(inst->sid, "%s: Allocation failed!\n", __func__); + len = -ENOMEM; + goto failed_alloc; + } + cur = dbuf; + end = cur + MAX_DBG_BUF_SIZE; + + f = &inst->fmts[OUTPUT_PORT]; + cur += write_str(cur, end - cur, "==============================\n"); + cur += write_str(cur, end - cur, "INSTANCE: %pK (%s)\n", inst, + inst->domain == MSM_VIDC_ENCODER ? "Encoder" : "Decoder"); + cur += write_str(cur, end - cur, "==============================\n"); + cur += write_str(cur, end - cur, "core: %pK\n", inst->core); + cur += write_str(cur, end - cur, "height: %d\n", f->fmt.pix_mp.height); + cur += write_str(cur, end - cur, "width: %d\n", f->fmt.pix_mp.width); + cur += write_str(cur, end - cur, "fps: %d\n", + inst->capabilities->cap[FRAME_RATE].value >> 16); + cur += write_str(cur, end - cur, "state: %d\n", inst->state); + cur += write_str(cur, end - cur, "secure: %d\n", + !!(inst->flags & VIDC_SECURE)); + cur += write_str(cur, end - cur, "-----------Formats-------------\n"); + for (i = 0; i < MAX_PORT; i++) { + if (i != INPUT_PORT && i != OUTPUT_PORT) + continue; + f = &inst->fmts[i]; + cur += write_str(cur, end - cur, "capability: %s\n", + i == INPUT_PORT ? "Output" : "Capture"); + cur += write_str(cur, end - cur, "planes : %d\n", + f->fmt.pix_mp.num_planes); + cur += write_str(cur, end - cur, + "type: %s\n", i == INPUT_PORT ? + "Output" : "Capture"); + cur += write_str(cur, end - cur, "count: %u\n", + inst->vb2q[i].num_buffers); + + for (j = 0; j < f->fmt.pix_mp.num_planes; j++) + cur += write_str(cur, end - cur, + "size for plane %d: %u\n", + j, f->fmt.pix_mp.plane_fmt[j].sizeimage); + + cur += write_str(cur, end - cur, "\n"); + } + cur += write_str(cur, end - cur, "-------------------------------\n"); + cur += write_str(cur, end - cur, "ETB Count: %d\n", + inst->debug_count.etb); + cur += write_str(cur, end - cur, "EBD Count: %d\n", + inst->debug_count.ebd); + cur += write_str(cur, end - cur, "FTB Count: %d\n", + inst->debug_count.ftb); + cur += write_str(cur, end - cur, "FBD Count: %d\n", + inst->debug_count.fbd); + + publish_unreleased_reference(inst, &cur, end); + len = simple_read_from_buffer(buf, count, ppos, + dbuf, cur - dbuf); + + kfree(dbuf); +failed_alloc: + put_inst(inst); + return len; +} + +static int inst_info_release(struct inode *inode, struct file *file) +{ + d_vpr_l("Release inode ptr: %pK\n", inode->i_private); + file->private_data = NULL; + return 0; +} + +static const struct file_operations inst_info_fops = { + .open = inst_info_open, + .read = inst_info_read, + .release = inst_info_release, +}; + +struct dentry *msm_vidc_debugfs_init_inst(void *instance, struct dentry *parent) +{ + struct dentry *dir = NULL, *info = NULL; + char debugfs_name[MAX_DEBUGFS_NAME]; + struct core_inst_pair *idata = NULL; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + goto exit; + } + snprintf(debugfs_name, MAX_DEBUGFS_NAME, "inst_%d", inst->sid); + + idata = kzalloc(sizeof(struct core_inst_pair), GFP_KERNEL); + if (!idata) { + s_vpr_e(inst->sid, "%s: Allocation failed!\n", __func__); + goto exit; + } + + idata->core = inst->core; + idata->inst = inst; + + dir = debugfs_create_dir(debugfs_name, parent); + if (IS_ERR_OR_NULL(dir)) { + dir = NULL; + s_vpr_e(inst->sid, + "%s: Failed to create debugfs for msm_vidc\n", + __func__); + goto failed_create_dir; + } + + info = debugfs_create_file("info", 0444, dir, + idata, &inst_info_fops); + if (IS_ERR_OR_NULL(info)) { + s_vpr_e(inst->sid, "%s: debugfs_create_file: fail\n", + __func__); + goto failed_create_file; + } + + dir->d_inode->i_private = info->d_inode->i_private; + inst->debug.pdata[FRAME_PROCESSING].sampling = true; + return dir; + +failed_create_file: + debugfs_remove_recursive(dir); + dir = NULL; +failed_create_dir: + kfree(idata); +exit: + return dir; +} + +void msm_vidc_debugfs_deinit_inst(void *instance) +{ + struct dentry *dentry = NULL; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + + if (!inst || !inst->debugfs_root) + return; + + dentry = inst->debugfs_root; + if (dentry->d_inode) { + s_vpr_l(inst->sid, "%s: Destroy %pK\n", + __func__, dentry->d_inode->i_private); + kfree(dentry->d_inode->i_private); + dentry->d_inode->i_private = NULL; + } + debugfs_remove_recursive(dentry); + inst->debugfs_root = NULL; +} + +void msm_vidc_debugfs_update(void *instance, + enum msm_vidc_debugfs_event e) +{ + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + struct msm_vidc_debug *d; + char a[64] = "Frame processing"; + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return; + } + d = &inst->debug; + + switch (e) { + case MSM_VIDC_DEBUGFS_EVENT_ETB: + inst->debug_count.etb++; + if (inst->debug_count.ebd && + inst->debug_count.ftb > inst->debug_count.fbd) { + d->pdata[FRAME_PROCESSING].name[0] = '\0'; + tic(inst, FRAME_PROCESSING, a); + } + break; + case MSM_VIDC_DEBUGFS_EVENT_EBD: + inst->debug_count.ebd++; + if (inst->debug_count.ebd && + inst->debug_count.ebd == inst->debug_count.etb) { + toc(inst, FRAME_PROCESSING); + s_vpr_p(inst->sid, "EBD: FW needs input buffers\n"); + } + if (inst->debug_count.ftb == inst->debug_count.fbd) + s_vpr_p(inst->sid, "EBD: FW needs output buffers\n"); + break; + case MSM_VIDC_DEBUGFS_EVENT_FTB: + inst->debug_count.ftb++; + if (inst->debug_count.ebd && + inst->debug_count.etb > inst->debug_count.ebd) { + d->pdata[FRAME_PROCESSING].name[0] = '\0'; + tic(inst, FRAME_PROCESSING, a); + } + break; + case MSM_VIDC_DEBUGFS_EVENT_FBD: + inst->debug_count.fbd++; + inst->debug.samples++; + if (inst->debug_count.fbd && + inst->debug_count.fbd == inst->debug_count.ftb) { + toc(inst, FRAME_PROCESSING); + s_vpr_p(inst->sid, "FBD: FW needs output buffers\n"); + } + if (inst->debug_count.etb == inst->debug_count.ebd) + s_vpr_p(inst->sid, "FBD: FW needs input buffers\n"); + break; + default: + s_vpr_e(inst->sid, "invalid event in debugfs: %d\n", e); + break; + } +} + +void do_gettimeofday(struct timeval *__ddl_tv) +{ +} + diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 33fbd1f3ee..c11194c63e 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -1497,6 +1497,11 @@ int msm_vidc_queue_buffer(struct msm_vidc_inst *inst, struct vb2_buffer *vb2) meta->attr |= MSM_VIDC_ATTR_QUEUED; } + if (buf->type == MSM_VIDC_BUF_INPUT) + msm_vidc_debugfs_update(inst, MSM_VIDC_DEBUGFS_EVENT_ETB); + else if (buf->type == MSM_VIDC_BUF_OUTPUT) + msm_vidc_debugfs_update(inst, MSM_VIDC_DEBUGFS_EVENT_FTB); + return rc; } @@ -2723,6 +2728,7 @@ static void msm_vidc_close_helper(struct kref *kref) s_vpr_h(inst->sid, "%s()\n", __func__); msm_vidc_event_queue_deinit(inst); msm_vidc_vb2_queue_deinit(inst); + msm_vidc_debugfs_deinit_inst(inst); if (is_decode_session(inst)) msm_vdec_inst_deinit(inst); else if (is_encode_session(inst)) diff --git a/driver/vidc/src/msm_vidc_probe.c b/driver/vidc/src/msm_vidc_probe.c index 2bfaa2ad0f..a980a6c54b 100644 --- a/driver/vidc/src/msm_vidc_probe.c +++ b/driver/vidc/src/msm_vidc_probe.c @@ -243,6 +243,10 @@ static int msm_vidc_probe_video_device(struct platform_device *pdev) return -ENOMEM; g_core = core; + core->debugfs_parent = msm_vidc_debugfs_init_drv(); + if (!core->debugfs_parent) + d_vpr_h("Failed to create debugfs for msm_vidc\n"); + core->pdev = pdev; dev_set_drvdata(&pdev->dev, core); @@ -294,7 +298,9 @@ static int msm_vidc_probe_video_device(struct platform_device *pdev) goto exit; } - //rc = msm_vidc_debugfs_init_core(core); + core->debugfs_root = msm_vidc_debugfs_init_core(core); + if (!core->debugfs_root) + d_vpr_h("Failed to init debugfs core\n"); d_vpr_h("populating sub devices\n"); /* @@ -311,6 +317,9 @@ static int msm_vidc_probe_video_device(struct platform_device *pdev) } exit: + if (rc) + debugfs_remove_recursive(core->debugfs_parent); + return rc; } @@ -371,6 +380,7 @@ static int msm_vidc_remove(struct platform_device *pdev) msm_vidc_deinit_dt(pdev); msm_vidc_deinitialize_core(core); dev_set_drvdata(&pdev->dev, NULL); + debugfs_remove_recursive(core->debugfs_parent); kfree(core); g_core = NULL; return 0; diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index bdb07f878a..ad8f1801b9 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -427,6 +427,7 @@ static int handle_input_buffer(struct msm_vidc_inst *inst, }*/ print_vidc_buffer(VIDC_HIGH, "EBD", inst, buf); + msm_vidc_debugfs_update(inst, MSM_VIDC_DEBUGFS_EVENT_EBD); return rc; } @@ -482,6 +483,7 @@ static int handle_output_buffer(struct msm_vidc_inst *inst, if (buffer->flags & HFI_BUF_FW_FLAG_LAST) buf->flags |= MSM_VIDC_BUF_FLAG_LAST; print_vidc_buffer(VIDC_HIGH, "FBD", inst, buf); + msm_vidc_debugfs_update(inst, MSM_VIDC_DEBUGFS_EVENT_FBD); return rc; } @@ -1004,16 +1006,15 @@ static int handle_session_property(struct msm_vidc_inst *inst, return 0; } -static int handle_image_version_property(struct hfi_packet *pkt) +static int handle_image_version_property(struct msm_vidc_core *core, + struct hfi_packet *pkt) { u32 i = 0; - char version[256]; - const u32 version_string_size = 128; u8 *str_image_version; u32 req_bytes; req_bytes = pkt->size - sizeof(*pkt); - if (req_bytes < version_string_size) { + if (req_bytes < VENUS_VERSION_LENGTH - 1) { d_vpr_e("%s: bad_pkt: %d\n", __func__, req_bytes); return -EINVAL; } @@ -1023,14 +1024,15 @@ static int handle_image_version_property(struct hfi_packet *pkt) * characters at the start and in between. Replace the null * characters with space, to print the version info. */ - for (i = 0; i < version_string_size; i++) { + for (i = 0; i < VENUS_VERSION_LENGTH - 1; i++) { if (str_image_version[i] != '\0') - version[i] = str_image_version[i]; + core->fw_version[i] = str_image_version[i]; else - version[i] = ' '; + core->fw_version[i] = ' '; } - version[i] = '\0'; - d_vpr_h("%s: F/W version: %s\n", __func__, version); + core->fw_version[i] = '\0'; + + d_vpr_h("%s: F/W version: %s\n", __func__, core->fw_version); return 0; } @@ -1047,7 +1049,7 @@ static int handle_system_property(struct msm_vidc_core *core, switch (pkt->type) { case HFI_PROP_IMAGE_VERSION: - rc = handle_image_version_property(pkt); + rc = handle_image_version_property(core, pkt); break; default: d_vpr_h("%s: property type %#x successful\n", From c5746cfb36158cb5a838a70879822574e74f150d Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Mon, 1 Feb 2021 11:54:38 -0800 Subject: [PATCH 0090/1061] video: driver: fix encoder input size calculation fix encoder input size calculation Change-Id: I344a9fdc2ed636e5f8a0df4493f7a3da3a6c0925 Signed-off-by: Darshana Patil --- driver/vidc/src/msm_vidc_buffer.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/driver/vidc/src/msm_vidc_buffer.c b/driver/vidc/src/msm_vidc_buffer.c index e757707d2d..28c6ddd161 100644 --- a/driver/vidc/src/msm_vidc_buffer.c +++ b/driver/vidc/src/msm_vidc_buffer.c @@ -259,8 +259,8 @@ u32 msm_vidc_encoder_input_size(struct msm_vidc_inst *inst) f = &inst->fmts[INPUT_PORT]; format = v4l2_colorformat_to_media(f->fmt.pix_mp.pixelformat, __func__); - size = VENUS_BUFFER_SIZE(format, f->fmt.pix_mp.width, - f->fmt.pix_mp.height); + size = VENUS_BUFFER_SIZE_USED(format, f->fmt.pix_mp.width, + f->fmt.pix_mp.height, false); return size; } From 73c17560ac2446b1ed0b2297e214dc92bd37c23e Mon Sep 17 00:00:00 2001 From: Maheshwar Ajja Date: Fri, 29 Jan 2021 17:01:36 -0800 Subject: [PATCH 0091/1061] video: driver: return all buffers in streamoff - return all buffers in streamoff error cases as well - free instance memory in close Change-Id: I06464bb0df4d2851c361a8027528e7cb5c7d241f Signed-off-by: Maheshwar Ajja --- driver/vidc/src/msm_vidc_driver.c | 26 +++++++++++++++----------- 1 file changed, 15 insertions(+), 11 deletions(-) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 28ffd0f265..a218dc8ae1 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -2169,7 +2169,7 @@ int msm_vidc_session_streamoff(struct msm_vidc_inst *inst, rc = venus_hfi_stop(inst, port); if (rc) - return rc; + goto error; core = inst->core; s_vpr_h(inst->sid, "%s: wait on port: %d for time: %d ms\n", @@ -2191,19 +2191,22 @@ int msm_vidc_session_streamoff(struct msm_vidc_inst *inst, /* no more queued buffers after streamoff */ count = msm_vidc_num_buffers(inst, buffer_type, MSM_VIDC_ATTR_QUEUED); - if (count) { - s_vpr_e(inst->sid, "%s: %d buffers pending on port: %d\n", + if (!count) { + s_vpr_h(inst->sid, "%s: stop successful on port: %d\n", + __func__, port); + } else { + s_vpr_e(inst->sid, + "%s: %d buffers pending with firmware on port: %d\n", __func__, count, port); - msm_vidc_kill_session(inst); + rc = -EINVAL; + goto error; } - rc = msm_vidc_flush_buffers(inst, buffer_type); - if (rc) - return rc; - - s_vpr_h(inst->sid, "%s: stop successful on port: %d\n", - __func__, port); - return 0; + +error: + msm_vidc_kill_session(inst); + msm_vidc_flush_buffers(inst, buffer_type); + return rc; } int msm_vidc_session_close(struct msm_vidc_inst *inst) @@ -2744,6 +2747,7 @@ static void msm_vidc_close_helper(struct kref *kref) kfree(inst->capabilities); if (inst->response_workq) destroy_workqueue(inst->response_workq); + kfree(inst); } struct msm_vidc_inst *get_inst_ref(struct msm_vidc_core *core, From 5220f1f7f28798539623f90536dc7dedc1649887 Mon Sep 17 00:00:00 2001 From: Sebastian Dang Date: Mon, 1 Feb 2021 20:39:39 -0800 Subject: [PATCH 0092/1061] video: driver: Convert debug messages Add new print format using msm_vidc_inst. Convert existing sid print statements. Change-Id: Iba6774c31ff92997b4f8598e6a705f58bfa1b03c --- .../variant/iris2/src/msm_vidc_buffer_iris2.c | 34 ++-- driver/variant/iris2/src/msm_vidc_iris2.c | 4 +- .../variant/iris2/src/msm_vidc_power_iris2.c | 6 +- driver/vidc/inc/msm_vidc_debug.h | 33 +++- driver/vidc/src/hfi_packet.c | 16 +- driver/vidc/src/msm_vdec.c | 176 +++++++++--------- driver/vidc/src/msm_venc.c | 118 ++++++------ driver/vidc/src/msm_vidc.c | 52 +++--- driver/vidc/src/msm_vidc_buffer.c | 6 +- driver/vidc/src/msm_vidc_control.c | 82 ++++---- driver/vidc/src/msm_vidc_debug.c | 57 +++++- driver/vidc/src/msm_vidc_driver.c | 150 +++++++-------- driver/vidc/src/msm_vidc_memory.c | 29 +-- driver/vidc/src/msm_vidc_power.c | 26 +-- driver/vidc/src/msm_vidc_vb2.c | 32 ++-- driver/vidc/src/venus_hfi.c | 10 +- driver/vidc/src/venus_hfi_response.c | 108 +++++------ 17 files changed, 497 insertions(+), 442 deletions(-) diff --git a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c index a1cdd7ef98..8cb1532577 100644 --- a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c @@ -53,7 +53,7 @@ static u32 msm_vidc_decoder_bin_size_iris2(struct msm_vidc_inst *inst) HFI_BUFFER_BIN_VP9D(size, width, height, 0, num_vpp_pipes); - s_vpr_l(inst->sid, "%s: size %d\n", __func__, size); + i_vpr_l(inst, "%s: size %d\n", __func__, size); return size; } @@ -83,7 +83,7 @@ static u32 msm_vidc_decoder_comv_size_iris2(struct msm_vidc_inst* inst) else if (inst->codec == MSM_VIDC_HEVC) HFI_BUFFER_COMV_H265D(size, width, height, out_min_count); - s_vpr_l(inst->sid, "%s: size %d\n", __func__, size); + i_vpr_l(inst, "%s: size %d\n", __func__, size); return size; } @@ -100,7 +100,7 @@ static u32 msm_vidc_decoder_non_comv_size_iris2(struct msm_vidc_inst* inst) } core = inst->core; if (!core->capabilities) { - s_vpr_e(inst->sid, "%s: invalid core capabilities\n", __func__); + i_vpr_e(inst, "%s: invalid core capabilities\n", __func__); return size; } num_vpp_pipes = core->capabilities[NUM_VPP_PIPE].value; @@ -114,7 +114,7 @@ static u32 msm_vidc_decoder_non_comv_size_iris2(struct msm_vidc_inst* inst) else if (inst->codec == MSM_VIDC_HEVC) HFI_BUFFER_NON_COMV_H265D(size, width, height, num_vpp_pipes); - s_vpr_l(inst->sid, "%s: size %d\n", __func__, size); + i_vpr_l(inst, "%s: size %d\n", __func__, size); return size; } @@ -170,7 +170,7 @@ static u32 msm_vidc_decoder_line_size_iris2(struct msm_vidc_inst *inst) HFI_BUFFER_LINE_VP9D(size, width, height, out_min_count, is_opb, num_vpp_pipes); - s_vpr_l(inst->sid, "%s: size %d\n", __func__, size); + i_vpr_l(inst, "%s: size %d\n", __func__, size); return size; } @@ -190,7 +190,7 @@ static u32 msm_vidc_decoder_persist_size_iris2(struct msm_vidc_inst *inst) else if (inst->codec == MSM_VIDC_VP9) HFI_BUFFER_PERSIST_VP9D(size); - s_vpr_l(inst->sid, "%s: size %d\n", __func__, size); + i_vpr_l(inst, "%s: size %d\n", __func__, size); return size; } @@ -235,7 +235,7 @@ static u32 msm_vidc_decoder_dpb_size_iris2(struct msm_vidc_inst *inst) height)); } - s_vpr_l(inst->sid, "%s: size %d\n", __func__, size); + i_vpr_l(inst, "%s: size %d\n", __func__, size); return size; } @@ -253,7 +253,7 @@ static u32 msm_vidc_encoder_bin_size_iris2(struct msm_vidc_inst *inst) } core = inst->core; if (!core->capabilities) { - s_vpr_e(inst->sid, "%s: invalid core capabilities\n", __func__); + i_vpr_e(inst, "%s: invalid core capabilities\n", __func__); return size; } num_vpp_pipes = core->capabilities[NUM_VPP_PIPE].value; @@ -267,7 +267,7 @@ static u32 msm_vidc_encoder_bin_size_iris2(struct msm_vidc_inst *inst) else if (inst->codec == MSM_VIDC_HEVC) HFI_BUFFER_BIN_H265E(size, width, height, stage, num_vpp_pipes); - s_vpr_l(inst->sid, "%s: size %d\n", __func__, size); + i_vpr_l(inst, "%s: size %d\n", __func__, size); return size; } @@ -300,7 +300,7 @@ static u32 msm_vidc_encoder_comv_size_iris2(struct msm_vidc_inst* inst) HFI_BUFFER_COMV_H265E(size, width, height, num_ref); } - s_vpr_l(inst->sid, "%s: size %d\n", __func__, size); + i_vpr_l(inst, "%s: size %d\n", __func__, size); return size; } @@ -317,7 +317,7 @@ static u32 msm_vidc_encoder_non_comv_size_iris2(struct msm_vidc_inst* inst) } core = inst->core; if (!core->capabilities) { - s_vpr_e(inst->sid, "%s: invalid core capabilities\n", __func__); + i_vpr_e(inst, "%s: invalid core capabilities\n", __func__); return size; } num_vpp_pipes = core->capabilities[NUM_VPP_PIPE].value; @@ -330,7 +330,7 @@ static u32 msm_vidc_encoder_non_comv_size_iris2(struct msm_vidc_inst* inst) else if (inst->codec == MSM_VIDC_HEVC) HFI_BUFFER_NON_COMV_H265E(size, width, height, num_vpp_pipes); - s_vpr_l(inst->sid, "%s: size %d\n", __func__, size); + i_vpr_l(inst, "%s: size %d\n", __func__, size); return size; } @@ -348,7 +348,7 @@ static u32 msm_vidc_encoder_line_size_iris2(struct msm_vidc_inst *inst) } core = inst->core; if (!core->capabilities) { - s_vpr_e(inst->sid, "%s: invalid core capabilities\n", __func__); + i_vpr_e(inst, "%s: invalid core capabilities\n", __func__); return size; } num_vpp_pipes = core->capabilities[NUM_VPP_PIPE].value; @@ -368,7 +368,7 @@ static u32 msm_vidc_encoder_line_size_iris2(struct msm_vidc_inst *inst) else if (inst->codec == MSM_VIDC_HEVC) HFI_BUFFER_LINE_H265E(size, width, height, is_tenbit, num_vpp_pipes); - s_vpr_l(inst->sid, "%s: size %d\n", __func__, size); + i_vpr_l(inst, "%s: size %d\n", __func__, size); return size; } @@ -399,7 +399,7 @@ static u32 msm_vidc_encoder_dpb_size_iris2(struct msm_vidc_inst *inst) else if (inst->codec == MSM_VIDC_HEVC) HFI_BUFFER_DPB_H265E(size, width, height, is_tenbit); - s_vpr_l(inst->sid, "%s: size %d\n", __func__, size); + i_vpr_l(inst, "%s: size %d\n", __func__, size); return size; } @@ -413,7 +413,7 @@ static u32 msm_vidc_encoder_arp_size_iris2(struct msm_vidc_inst *inst) } HFI_BUFFER_ARP_ENC(size); - s_vpr_l(inst->sid, "%s: size %d\n", __func__, size); + i_vpr_l(inst, "%s: size %d\n", __func__, size); return size; } @@ -445,7 +445,7 @@ static u32 msm_vidc_encoder_vpss_size_iris2(struct msm_vidc_inst* inst) HFI_BUFFER_VPSS_ENC(size, width, height, ds_enable, rot_enable, flip_enable, is_tenbit); - s_vpr_l(inst->sid, "%s: size %d\n", __func__, size); + i_vpr_l(inst, "%s: size %d\n", __func__, size); return size; } diff --git a/driver/variant/iris2/src/msm_vidc_iris2.c b/driver/variant/iris2/src/msm_vidc_iris2.c index e90094495f..7702bea65b 100644 --- a/driver/variant/iris2/src/msm_vidc_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_iris2.c @@ -556,7 +556,7 @@ int msm_vidc_decide_work_mode_iris2(struct msm_vidc_inst* inst) return -EINVAL; } - s_vpr_h(inst->sid, "Configuring work mode = %u low latency = %u", + i_vpr_h(inst, "Configuring work mode = %u low latency = %u", work_mode, lowlatency); inst->capabilities->cap[STAGE].value = work_mode; @@ -602,7 +602,7 @@ int msm_vidc_decide_work_route_iris2(struct msm_vidc_inst* inst) return -EINVAL; } - s_vpr_h(inst->sid, "Configuring work route = %u", work_route); + i_vpr_h(inst, "Configuring work route = %u", work_route); inst->capabilities->cap[PIPE].value = work_route; return 0; diff --git a/driver/variant/iris2/src/msm_vidc_power_iris2.c b/driver/variant/iris2/src/msm_vidc_power_iris2.c index eeee40f006..2d05c288bb 100644 --- a/driver/variant/iris2/src/msm_vidc_power_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_power_iris2.c @@ -125,14 +125,14 @@ u64 msm_vidc_calc_freq_iris2(struct msm_vidc_inst *inst, u32 data_size) vsp_cycles += mbs_per_second * base_cycles; } else { - s_vpr_e(inst->sid, "%s: Unknown session type\n", __func__); + i_vpr_e(inst, "%s: Unknown session type\n", __func__); return msm_vidc_max_freq(inst); } freq = max(vpp_cycles, vsp_cycles); freq = max(freq, fw_cycles); - s_vpr_p(inst->sid, "%s: inst %pK: filled len %d required freq %llu\n", + i_vpr_p(inst, "%s: inst %pK: filled len %d required freq %llu\n", __func__, inst, data_size, freq); return freq; @@ -660,7 +660,7 @@ static u64 __calculate(struct msm_vidc_inst* inst, struct vidc_bus_vote_data *d) value = __calculate_decoder(d); break; default: - s_vpr_e(inst->sid, "%s: Unknown Domain %#x", __func__, d->domain); + i_vpr_e(inst, "%s: Unknown Domain %#x", __func__, d->domain); } return value; diff --git a/driver/vidc/inc/msm_vidc_debug.h b/driver/vidc/inc/msm_vidc_debug.h index 0ae4b4e258..b0cabc956d 100644 --- a/driver/vidc/inc/msm_vidc_debug.h +++ b/driver/vidc/inc/msm_vidc_debug.h @@ -55,6 +55,27 @@ enum vidc_msg_prio { #define FW_LOGSHIFT 16 #define FW_LOGMASK 0x0FFF0000 +#define dprintk_inst(__level, inst, __fmt, ...) \ + do { \ + if (inst && (msm_vidc_debug & __level)) { \ + pr_err(VIDC_DBG_TAG __fmt, \ + level_str(__level), \ + get_sid(inst), \ + codec_str(inst), \ + ##__VA_ARGS__); \ + } \ + } while (0) + +#define i_vpr_e(inst, __fmt, ...) dprintk_inst(VIDC_ERR, inst, __fmt, ##__VA_ARGS__) +#define i_vpr_i(inst, __fmt, ...) dprintk_inst(VIDC_INFO, inst, __fmt, ##__VA_ARGS__) +#define i_vpr_h(inst, __fmt, ...) dprintk_inst(VIDC_HIGH, inst, __fmt, ##__VA_ARGS__) +#define i_vpr_l(inst, __fmt, ...) dprintk_inst(VIDC_LOW, inst, __fmt, ##__VA_ARGS__) +#define i_vpr_p(inst, __fmt, ...) dprintk_inst(VIDC_PERF, inst, __fmt, ##__VA_ARGS__) +#define i_vpr_t(inst, __fmt, ...) dprintk_inst(VIDC_PKT, inst, __fmt, ##__VA_ARGS__) +#define i_vpr_b(inst, __fmt, ...) dprintk_inst(VIDC_BUS, inst, __fmt, ##__VA_ARGS__) +#define i_vpr_hp(inst, __fmt, ...) \ + dprintk_inst(VIDC_HIGH | VIDC_PERF, inst, __fmt, ##__VA_ARGS__) + #define dprintk(__level, sid, __fmt, ...) \ do { \ if (msm_vidc_debug & __level) { \ @@ -66,16 +87,6 @@ enum vidc_msg_prio { } \ } while (0) -#define s_vpr_e(sid, __fmt, ...) dprintk(VIDC_ERR, sid, __fmt, ##__VA_ARGS__) -#define s_vpr_i(sid, __fmt, ...) dprintk(VIDC_INFO, sid, __fmt, ##__VA_ARGS__) -#define s_vpr_h(sid, __fmt, ...) dprintk(VIDC_HIGH, sid, __fmt, ##__VA_ARGS__) -#define s_vpr_l(sid, __fmt, ...) dprintk(VIDC_LOW, sid, __fmt, ##__VA_ARGS__) -#define s_vpr_p(sid, __fmt, ...) dprintk(VIDC_PERF, sid, __fmt, ##__VA_ARGS__) -#define s_vpr_t(sid, __fmt, ...) dprintk(VIDC_PKT, sid, __fmt, ##__VA_ARGS__) -#define s_vpr_b(sid, __fmt, ...) dprintk(VIDC_BUS, sid, __fmt, ##__VA_ARGS__) -#define s_vpr_hp(sid, __fmt, ...) \ - dprintk(VIDC_HIGH|VIDC_PERF, sid, __fmt, ##__VA_ARGS__) - #define d_vpr_e(__fmt, ...) \ dprintk(VIDC_ERR, DEFAULT_SID, __fmt, ##__VA_ARGS__) #define d_vpr_i(__fmt, ...) \ @@ -104,6 +115,8 @@ enum vidc_msg_prio { } while (0) const char *level_str(u32 level); +const char *codec_str(void *instance); +u32 get_sid(void *instance); enum msm_vidc_debugfs_event { MSM_VIDC_DEBUGFS_EVENT_ETB, diff --git a/driver/vidc/src/hfi_packet.c b/driver/vidc/src/hfi_packet.c index 501230fc32..4ec182b56e 100644 --- a/driver/vidc/src/hfi_packet.c +++ b/driver/vidc/src/hfi_packet.c @@ -26,7 +26,7 @@ u32 get_hfi_port(struct msm_vidc_inst *inst, hfi_port = HFI_PORT_RAW; break; default: - s_vpr_e(inst->sid, "%s: invalid port type %d\n", + i_vpr_e(inst, "%s: invalid port type %d\n", __func__, port); break; } @@ -41,12 +41,12 @@ u32 get_hfi_port(struct msm_vidc_inst *inst, hfi_port = HFI_PORT_BITSTREAM; break; default: - s_vpr_e(inst->sid, "%s: invalid port type %d\n", + i_vpr_e(inst, "%s: invalid port type %d\n", __func__, port); break; } } else { - s_vpr_e(inst->sid, "%s: invalid domain %#x\n", + i_vpr_e(inst, "%s: invalid domain %#x\n", __func__, inst->domain); } @@ -78,7 +78,7 @@ u32 get_hfi_port_from_buffer_type(struct msm_vidc_inst *inst, hfi_port = HFI_PORT_RAW; break; default: - s_vpr_e(inst->sid, "%s: invalid buffer type %d\n", + i_vpr_e(inst, "%s: invalid buffer type %d\n", __func__, buffer_type); break; } @@ -102,12 +102,12 @@ u32 get_hfi_port_from_buffer_type(struct msm_vidc_inst *inst, hfi_port = HFI_PORT_NONE; break; default: - s_vpr_e(inst->sid, "%s: invalid buffer type %d\n", + i_vpr_e(inst, "%s: invalid buffer type %d\n", __func__, buffer_type); break; } } else { - s_vpr_e(inst->sid, "%s: invalid domain %#x\n", + i_vpr_e(inst, "%s: invalid domain %#x\n", __func__, inst->domain); } @@ -202,7 +202,7 @@ u32 get_hfi_colorformat(struct msm_vidc_inst *inst, hfi_colorformat = HFI_COLOR_FMT_NV21; break; default: - s_vpr_e(inst->sid, "%s: invalid colorformat %d\n", + i_vpr_e(inst, "%s: invalid colorformat %d\n", __func__, colorformat); break; } @@ -227,7 +227,7 @@ u32 get_hfi_quality_mode(struct msm_vidc_inst *inst) hfi_mode = HFI_MODE_POWER_SAVE; break; default: - s_vpr_e(inst->sid, "%s: invalid qulity mode %d\n", __func__, + i_vpr_e(inst, "%s: invalid qulity mode %d\n", __func__, inst->capabilities->cap[QUALITY_MODE].value); break; } diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 61c1e48fe3..bf440a6b82 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -44,7 +44,7 @@ static int msm_vdec_codec_change(struct msm_vidc_inst *inst, u32 v4l2_codec) if (inst->codec && inst->fmts[INPUT_PORT].fmt.pix_mp.pixelformat == v4l2_codec) return 0; - s_vpr_h(inst->sid, "%s: codec changed from %#x to %#x\n", + i_vpr_h(inst, "%s: codec changed from %#x to %#x\n", __func__, inst->fmts[INPUT_PORT].fmt.pix_mp.pixelformat, v4l2_codec); inst->codec = v4l2_codec_to_driver(v4l2_codec, __func__); @@ -72,7 +72,7 @@ static int msm_vdec_set_bitstream_resolution(struct msm_vidc_inst *inst, resolution = inst->fmts[INPUT_PORT].fmt.pix_mp.width << 16 | inst->fmts[INPUT_PORT].fmt.pix_mp.height; - s_vpr_h(inst->sid, "%s: width: %d height: %d\n", __func__, + i_vpr_h(inst, "%s: width: %d height: %d\n", __func__, inst->fmts[INPUT_PORT].fmt.pix_mp.width, inst->fmts[INPUT_PORT].fmt.pix_mp.height); inst->subcr_params[port].bitstream_resolution = resolution; @@ -84,7 +84,7 @@ static int msm_vdec_set_bitstream_resolution(struct msm_vidc_inst *inst, &resolution, sizeof(u32)); if (rc) - s_vpr_e(inst->sid, "%s: set property failed\n", __func__); + i_vpr_e(inst, "%s: set property failed\n", __func__); return rc; } @@ -108,7 +108,7 @@ static int msm_vdec_set_linear_stride_scanline(struct msm_vidc_inst *inst) payload[0] = stride_y << 16 | scanline_y; payload[1] = stride_uv << 16 | scanline_uv; - s_vpr_h(inst->sid, "%s: stride_y: %d scanline_y: %d " + i_vpr_h(inst, "%s: stride_y: %d scanline_y: %d " "stride_uv: %d, scanline_uv: %d", __func__, stride_y, scanline_y, stride_uv, scanline_uv); rc = venus_hfi_session_property(inst, @@ -119,7 +119,7 @@ static int msm_vdec_set_linear_stride_scanline(struct msm_vidc_inst *inst) &payload, sizeof(u64)); if (rc) - s_vpr_e(inst->sid, "%s: set property failed\n", __func__); + i_vpr_e(inst, "%s: set property failed\n", __func__); return rc; } @@ -148,7 +148,7 @@ static int msm_vdec_set_crop_offsets(struct msm_vidc_inst *inst, payload = (u64)right_offset << 48 | (u64)bottom_offset << 32 | (u64)left_offset << 16 | top_offset; - s_vpr_h(inst->sid, "%s: left_offset: %d top_offset: %d " + i_vpr_h(inst, "%s: left_offset: %d top_offset: %d " "right_offset: %d bottom_offset: %d", __func__, left_offset, top_offset, right_offset, bottom_offset); inst->subcr_params[port].crop_offsets = payload; @@ -160,7 +160,7 @@ static int msm_vdec_set_crop_offsets(struct msm_vidc_inst *inst, &payload, sizeof(u64)); if (rc) - s_vpr_e(inst->sid, "%s: set property failed\n", __func__); + i_vpr_e(inst, "%s: set property failed\n", __func__); return rc; } @@ -173,7 +173,7 @@ static int msm_vdec_set_bit_depth(struct msm_vidc_inst *inst, u32 bitdepth = 8 << 16 | 8; if (port != INPUT_PORT && port != OUTPUT_PORT) { - s_vpr_e(inst->sid, "%s: invalid port %d\n", __func__, port); + i_vpr_e(inst, "%s: invalid port %d\n", __func__, port); return -EINVAL; } @@ -184,7 +184,7 @@ static int msm_vdec_set_bit_depth(struct msm_vidc_inst *inst, inst->subcr_params[port].bit_depth = bitdepth; inst->capabilities->cap[BIT_DEPTH].value = bitdepth; - s_vpr_h(inst->sid, "%s: bit depth: %d", __func__, bitdepth); + i_vpr_h(inst, "%s: bit depth: %d", __func__, bitdepth); rc = venus_hfi_session_property(inst, HFI_PROP_LUMA_CHROMA_BIT_DEPTH, HFI_HOST_FLAGS_NONE, @@ -193,7 +193,7 @@ static int msm_vdec_set_bit_depth(struct msm_vidc_inst *inst, &bitdepth, sizeof(u32)); if (rc) - s_vpr_e(inst->sid, "%s: set property failed\n", __func__); + i_vpr_e(inst, "%s: set property failed\n", __func__); return rc; } @@ -206,13 +206,13 @@ static int msm_vdec_set_cabac(struct msm_vidc_inst *inst, u32 cabac = 0; if (port != INPUT_PORT && port != OUTPUT_PORT) { - s_vpr_e(inst->sid, "%s: invalid port %d\n", __func__, port); + i_vpr_e(inst, "%s: invalid port %d\n", __func__, port); return -EINVAL; } cabac = inst->capabilities->cap[ENTROPY_MODE].value; inst->subcr_params[port].cabac = cabac; - s_vpr_h(inst->sid, "%s: entropy mode: %d", __func__, cabac); + i_vpr_h(inst, "%s: entropy mode: %d", __func__, cabac); rc = venus_hfi_session_property(inst, HFI_PROP_CABAC_SESSION, HFI_HOST_FLAGS_NONE, @@ -221,7 +221,7 @@ static int msm_vdec_set_cabac(struct msm_vidc_inst *inst, &cabac, sizeof(u32)); if (rc) - s_vpr_e(inst->sid, "%s: set property failed\n", __func__); + i_vpr_e(inst, "%s: set property failed\n", __func__); return rc; } @@ -233,13 +233,13 @@ static int msm_vdec_set_coded_frames(struct msm_vidc_inst *inst, u32 coded_frames; if (port != INPUT_PORT && port != OUTPUT_PORT) { - s_vpr_e(inst->sid, "%s: invalid port %d\n", __func__, port); + i_vpr_e(inst, "%s: invalid port %d\n", __func__, port); return -EINVAL; } coded_frames = inst->capabilities->cap[CODED_FRAMES].value; inst->subcr_params[port].coded_frames = coded_frames; - s_vpr_h(inst->sid, "%s: coded frames: %d", __func__, coded_frames); + i_vpr_h(inst, "%s: coded frames: %d", __func__, coded_frames); rc = venus_hfi_session_property(inst, HFI_PROP_CODED_FRAMES, HFI_HOST_FLAGS_NONE, @@ -248,7 +248,7 @@ static int msm_vdec_set_coded_frames(struct msm_vidc_inst *inst, &coded_frames, sizeof(u32)); if (rc) - s_vpr_e(inst->sid, "%s: set property failed\n", __func__); + i_vpr_e(inst, "%s: set property failed\n", __func__); return rc; } @@ -260,13 +260,13 @@ static int msm_vdec_set_min_output_count(struct msm_vidc_inst *inst, u32 min_output; if (port != INPUT_PORT && port != OUTPUT_PORT) { - s_vpr_e(inst->sid, "%s: invalid port %d\n", __func__, port); + i_vpr_e(inst, "%s: invalid port %d\n", __func__, port); return -EINVAL; } min_output = inst->buffers.output.min_count; inst->subcr_params[port].fw_min_count = min_output; - s_vpr_h(inst->sid, "%s: firmware min output count: %d", + i_vpr_h(inst, "%s: firmware min output count: %d", __func__, min_output); rc = venus_hfi_session_property(inst, HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT, @@ -276,7 +276,7 @@ static int msm_vdec_set_min_output_count(struct msm_vidc_inst *inst, &min_output, sizeof(u32)); if (rc) - s_vpr_e(inst->sid, "%s: set property failed\n", __func__); + i_vpr_e(inst, "%s: set property failed\n", __func__); return rc; } @@ -288,12 +288,12 @@ static int msm_vdec_set_picture_order_count(struct msm_vidc_inst *inst, u32 poc = 0; if (port != INPUT_PORT && port != OUTPUT_PORT) { - s_vpr_e(inst->sid, "%s: invalid port %d\n", __func__, port); + i_vpr_e(inst, "%s: invalid port %d\n", __func__, port); return -EINVAL; } inst->subcr_params[port].pic_order_cnt = poc; - s_vpr_h(inst->sid, "%s: picture order count: %d", __func__, poc); + i_vpr_h(inst, "%s: picture order count: %d", __func__, poc); rc = venus_hfi_session_property(inst, HFI_PROP_PIC_ORDER_CNT_TYPE, HFI_HOST_FLAGS_NONE, @@ -302,7 +302,7 @@ static int msm_vdec_set_picture_order_count(struct msm_vidc_inst *inst, &poc, sizeof(u32)); if (rc) - s_vpr_e(inst->sid, "%s: set property failed\n", __func__); + i_vpr_e(inst, "%s: set property failed\n", __func__); return rc; } @@ -314,7 +314,7 @@ static int msm_vdec_set_colorspace(struct msm_vidc_inst *inst, u32 colorspace, xfer_func, ycbcr_enc, color_info; if (port != INPUT_PORT && port != OUTPUT_PORT) { - s_vpr_e(inst->sid, "%s: invalid port %d\n", __func__, port); + i_vpr_e(inst, "%s: invalid port %d\n", __func__, port); return -EINVAL; } @@ -325,7 +325,7 @@ static int msm_vdec_set_colorspace(struct msm_vidc_inst *inst, color_info = ((ycbcr_enc << 16) & 0xFF0000) | ((xfer_func << 8) & 0xFF00) | (colorspace & 0xFF); inst->subcr_params[port].color_info = color_info; - s_vpr_h(inst->sid, "%s: color info: %d", __func__, color_info); + i_vpr_h(inst, "%s: color info: %d", __func__, color_info); rc = venus_hfi_session_property(inst, HFI_PROP_SIGNAL_COLOR_INFO, HFI_HOST_FLAGS_NONE, @@ -334,7 +334,7 @@ static int msm_vdec_set_colorspace(struct msm_vidc_inst *inst, &color_info, sizeof(u32)); if (rc) - s_vpr_e(inst->sid, "%s: set property failed\n", __func__); + i_vpr_e(inst, "%s: set property failed\n", __func__); return rc; } @@ -346,13 +346,13 @@ static int msm_vdec_set_profile(struct msm_vidc_inst *inst, u32 profile; if (port != INPUT_PORT && port != OUTPUT_PORT) { - s_vpr_e(inst->sid, "%s: invalid port %d\n", __func__, port); + i_vpr_e(inst, "%s: invalid port %d\n", __func__, port); return -EINVAL; } profile = inst->capabilities->cap[PROFILE].value; inst->subcr_params[port].profile = profile; - s_vpr_h(inst->sid, "%s: profile: %d", __func__, profile); + i_vpr_h(inst, "%s: profile: %d", __func__, profile); rc = venus_hfi_session_property(inst, HFI_PROP_PROFILE, HFI_HOST_FLAGS_NONE, @@ -361,7 +361,7 @@ static int msm_vdec_set_profile(struct msm_vidc_inst *inst, &profile, sizeof(u32)); if (rc) - s_vpr_e(inst->sid, "%s: set property failed\n", __func__); + i_vpr_e(inst, "%s: set property failed\n", __func__); return rc; } @@ -373,13 +373,13 @@ static int msm_vdec_set_level(struct msm_vidc_inst *inst, u32 level; if (port != INPUT_PORT && port != OUTPUT_PORT) { - s_vpr_e(inst->sid, "%s: invalid port %d\n", __func__, port); + i_vpr_e(inst, "%s: invalid port %d\n", __func__, port); return -EINVAL; } level = inst->capabilities->cap[LEVEL].value; inst->subcr_params[port].level = level; - s_vpr_h(inst->sid, "%s: level: %d", __func__, level); + i_vpr_h(inst, "%s: level: %d", __func__, level); rc = venus_hfi_session_property(inst, HFI_PROP_LEVEL, HFI_HOST_FLAGS_NONE, @@ -388,7 +388,7 @@ static int msm_vdec_set_level(struct msm_vidc_inst *inst, &level, sizeof(u32)); if (rc) - s_vpr_e(inst->sid, "%s: set property failed\n", __func__); + i_vpr_e(inst, "%s: set property failed\n", __func__); return rc; } @@ -400,13 +400,13 @@ static int msm_vdec_set_tier(struct msm_vidc_inst *inst, u32 tier; if (port != INPUT_PORT && port != OUTPUT_PORT) { - s_vpr_e(inst->sid, "%s: invalid port %d\n", __func__, port); + i_vpr_e(inst, "%s: invalid port %d\n", __func__, port); return -EINVAL; } tier = inst->capabilities->cap[HEVC_TIER].value; inst->subcr_params[port].tier = tier; - s_vpr_h(inst->sid, "%s: tier: %d", __func__, tier); + i_vpr_h(inst, "%s: tier: %d", __func__, tier); rc = venus_hfi_session_property(inst, HFI_PROP_TIER, HFI_HOST_FLAGS_NONE, @@ -415,7 +415,7 @@ static int msm_vdec_set_tier(struct msm_vidc_inst *inst, &tier, sizeof(u32)); if (rc) - s_vpr_e(inst->sid, "%s: set property failed\n", __func__); + i_vpr_e(inst, "%s: set property failed\n", __func__); return rc; } @@ -430,7 +430,7 @@ static int msm_vdec_set_colorformat(struct msm_vidc_inst *inst) pixelformat = inst->fmts[OUTPUT_PORT].fmt.pix_mp.pixelformat; colorformat = v4l2_colorformat_to_driver(pixelformat, __func__); hfi_colorformat = get_hfi_colorformat(inst, colorformat); - s_vpr_h(inst->sid, "%s: hfi colorformat: %d", + i_vpr_h(inst, "%s: hfi colorformat: %d", __func__, hfi_colorformat); rc = venus_hfi_session_property(inst, HFI_PROP_COLOR_FORMAT, @@ -440,7 +440,7 @@ static int msm_vdec_set_colorformat(struct msm_vidc_inst *inst) &hfi_colorformat, sizeof(u32)); if (rc) - s_vpr_e(inst->sid, "%s: set property failed\n", __func__); + i_vpr_e(inst, "%s: set property failed\n", __func__); return rc; } @@ -454,13 +454,13 @@ static int msm_vdec_set_stage(struct msm_vidc_inst *inst) rc = call_session_op(core, decide_work_mode, inst); if (rc) { - s_vpr_e(inst->sid, "%s: decide_work_mode failed %d\n", + i_vpr_e(inst, "%s: decide_work_mode failed %d\n", __func__); return -EINVAL; } stage = capability->cap[STAGE].value; - s_vpr_h(inst->sid, "%s: stage: %d", __func__, stage); + i_vpr_h(inst, "%s: stage: %d", __func__, stage); rc = venus_hfi_session_property(inst, HFI_PROP_STAGE, HFI_HOST_FLAGS_NONE, @@ -469,7 +469,7 @@ static int msm_vdec_set_stage(struct msm_vidc_inst *inst) &stage, sizeof(u32)); if (rc) - s_vpr_e(inst->sid, "%s: set property failed\n", __func__); + i_vpr_e(inst, "%s: set property failed\n", __func__); return rc; } @@ -483,13 +483,13 @@ static int msm_vdec_set_pipe(struct msm_vidc_inst *inst) rc = call_session_op(core, decide_work_route, inst); if (rc) { - s_vpr_e(inst->sid, "%s: decide_work_route failed\n", + i_vpr_e(inst, "%s: decide_work_route failed\n", __func__); return -EINVAL; } pipe = capability->cap[PIPE].value; - s_vpr_h(inst->sid, "%s: pipe: %d", __func__, pipe); + i_vpr_h(inst, "%s: pipe: %d", __func__, pipe); rc = venus_hfi_session_property(inst, HFI_PROP_PIPE, HFI_HOST_FLAGS_NONE, @@ -498,7 +498,7 @@ static int msm_vdec_set_pipe(struct msm_vidc_inst *inst) &pipe, sizeof(u32)); if (rc) - s_vpr_e(inst->sid, "%s: set property failed\n", __func__); + i_vpr_e(inst, "%s: set property failed\n", __func__); return rc; } @@ -510,12 +510,12 @@ static int msm_vdec_set_output_order(struct msm_vidc_inst *inst, u32 output_order; if (port != INPUT_PORT) { - s_vpr_e(inst->sid, "%s: invalid port %d\n", __func__, port); + i_vpr_e(inst, "%s: invalid port %d\n", __func__, port); return -EINVAL; } output_order = inst->capabilities->cap[DISPLAY_DELAY_ENABLE].value; - s_vpr_h(inst->sid, "%s: output order: %d", __func__, output_order); + i_vpr_h(inst, "%s: output order: %d", __func__, output_order); rc = venus_hfi_session_property(inst, HFI_PROP_DECODE_ORDER_OUTPUT, HFI_HOST_FLAGS_NONE, @@ -524,7 +524,7 @@ static int msm_vdec_set_output_order(struct msm_vidc_inst *inst, &output_order, sizeof(u32)); if (rc) - s_vpr_e(inst->sid, "%s: set property failed\n", __func__); + i_vpr_e(inst, "%s: set property failed\n", __func__); return rc; } @@ -536,7 +536,7 @@ static int msm_vdec_set_secure_mode(struct msm_vidc_inst *inst, u32 secure_mode; secure_mode = inst->capabilities->cap[SECURE_MODE].value; - s_vpr_h(inst->sid, "%s: secure mode: %d", __func__, secure_mode); + i_vpr_h(inst, "%s: secure mode: %d", __func__, secure_mode); rc = venus_hfi_session_property(inst, HFI_PROP_SECURE, HFI_HOST_FLAGS_NONE, @@ -545,7 +545,7 @@ static int msm_vdec_set_secure_mode(struct msm_vidc_inst *inst, &secure_mode, sizeof(u32)); if (rc) - s_vpr_e(inst->sid, "%s: set property failed\n", __func__); + i_vpr_e(inst, "%s: set property failed\n", __func__); return rc; } @@ -557,11 +557,11 @@ static int msm_vdec_set_thumbnail_mode(struct msm_vidc_inst *inst, u32 thumbnail_mode = 0; if (port != INPUT_PORT) { - s_vpr_e(inst->sid, "%s: invalid port %d\n", __func__, port); + i_vpr_e(inst, "%s: invalid port %d\n", __func__, port); return -EINVAL; } - s_vpr_h(inst->sid, "%s: thumbnail mode: %d", __func__, thumbnail_mode); + i_vpr_h(inst, "%s: thumbnail mode: %d", __func__, thumbnail_mode); rc = venus_hfi_session_property(inst, HFI_PROP_THUMBNAIL_MODE, HFI_HOST_FLAGS_NONE, @@ -570,7 +570,7 @@ static int msm_vdec_set_thumbnail_mode(struct msm_vidc_inst *inst, &thumbnail_mode, sizeof(u32)); if (rc) - s_vpr_e(inst->sid, "%s: set property failed\n", __func__); + i_vpr_e(inst, "%s: set property failed\n", __func__); return rc; } @@ -582,11 +582,11 @@ static int msm_vdec_set_realtime(struct msm_vidc_inst *inst, u32 realtime = 1; //todo if (port != INPUT_PORT) { - s_vpr_e(inst->sid, "%s: invalid port %d\n", __func__, port); + i_vpr_e(inst, "%s: invalid port %d\n", __func__, port); return -EINVAL; } - s_vpr_h(inst->sid, "%s: priority: %d", __func__, realtime); + i_vpr_h(inst, "%s: priority: %d", __func__, realtime); rc = venus_hfi_session_property(inst, HFI_PROP_REALTIME, HFI_HOST_FLAGS_NONE, @@ -595,7 +595,7 @@ static int msm_vdec_set_realtime(struct msm_vidc_inst *inst, &realtime, sizeof(u32)); if (rc) - s_vpr_e(inst->sid, "%s: set property failed\n", __func__); + i_vpr_e(inst, "%s: set property failed\n", __func__); return rc; } @@ -607,12 +607,12 @@ static int msm_vdec_set_conceal_color_8bit(struct msm_vidc_inst *inst, u32 conceal_color_8bit; if (port != INPUT_PORT) { - s_vpr_e(inst->sid, "%s: invalid port %d\n", __func__, port); + i_vpr_e(inst, "%s: invalid port %d\n", __func__, port); return -EINVAL; } conceal_color_8bit = inst->capabilities->cap[CONCEAL_COLOR_8BIT].value; - s_vpr_h(inst->sid, "%s: conceal color 8bit: %#x", + i_vpr_h(inst, "%s: conceal color 8bit: %#x", __func__, conceal_color_8bit); rc = venus_hfi_session_property(inst, HFI_PROP_CONCEAL_COLOR_8BIT, @@ -622,7 +622,7 @@ static int msm_vdec_set_conceal_color_8bit(struct msm_vidc_inst *inst, &conceal_color_8bit, sizeof(u32)); if (rc) - s_vpr_e(inst->sid, "%s: set property failed\n", __func__); + i_vpr_e(inst, "%s: set property failed\n", __func__); return rc; } @@ -634,12 +634,12 @@ static int msm_vdec_set_conceal_color_10bit(struct msm_vidc_inst *inst, u32 conceal_color_10bit; if (port != INPUT_PORT) { - s_vpr_e(inst->sid, "%s: invalid port %d\n", __func__, port); + i_vpr_e(inst, "%s: invalid port %d\n", __func__, port); return -EINVAL; } conceal_color_10bit = inst->capabilities->cap[CONCEAL_COLOR_8BIT].value; - s_vpr_h(inst->sid, "%s: conceal color 10bit: %#x", + i_vpr_h(inst, "%s: conceal color 10bit: %#x", __func__, conceal_color_10bit); rc = venus_hfi_session_property(inst, HFI_PROP_CONCEAL_COLOR_10BIT, @@ -649,7 +649,7 @@ static int msm_vdec_set_conceal_color_10bit(struct msm_vidc_inst *inst, &conceal_color_10bit, sizeof(u32)); if (rc) - s_vpr_e(inst->sid, "%s: set property failed\n", __func__); + i_vpr_e(inst, "%s: set property failed\n", __func__); return rc; } @@ -747,24 +747,24 @@ static int msm_vdec_get_input_internal_buffers(struct msm_vidc_inst *inst) if (rc) return rc; - s_vpr_h(inst->sid, "input internal buffer: min size reuse\n"); - s_vpr_h(inst->sid, "bin buffer: %d %d %d\n", + i_vpr_h(inst, "input internal buffer: min size reuse\n"); + i_vpr_h(inst, "bin buffer: %d %d %d\n", inst->buffers.bin.min_count, inst->buffers.bin.size, inst->buffers.bin.reuse); - s_vpr_h(inst->sid, "comv buffer: %d %d %d\n", + i_vpr_h(inst, "comv buffer: %d %d %d\n", inst->buffers.comv.min_count, inst->buffers.comv.size, inst->buffers.comv.reuse); - s_vpr_h(inst->sid, "non_comv buffer: %d %d %d\n", + i_vpr_h(inst, "non_comv buffer: %d %d %d\n", inst->buffers.non_comv.min_count, inst->buffers.non_comv.size, inst->buffers.non_comv.reuse); - s_vpr_h(inst->sid, "line buffer: %d %d %d\n", + i_vpr_h(inst, "line buffer: %d %d %d\n", inst->buffers.line.min_count, inst->buffers.line.size, inst->buffers.line.reuse); - s_vpr_h(inst->sid, "persist buffer: %d %d %d\n", + i_vpr_h(inst, "persist buffer: %d %d %d\n", inst->buffers.persist.min_count, inst->buffers.persist.size, inst->buffers.persist.reuse); @@ -785,8 +785,8 @@ static int msm_vdec_get_output_internal_buffers(struct msm_vidc_inst *inst) if (rc) return rc; - s_vpr_h(inst->sid, "output internal buffer: min size reuse\n"); - s_vpr_h(inst->sid, "dpb buffer: %d %d %d\n", + i_vpr_h(inst, "output internal buffer: min size reuse\n"); + i_vpr_h(inst, "dpb buffer: %d %d %d\n", inst->buffers.dpb.min_count, inst->buffers.dpb.size, inst->buffers.dpb.reuse); @@ -890,7 +890,7 @@ static int msm_vdec_release_input_internal_buffers(struct msm_vidc_inst *inst) d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - s_vpr_h(inst->sid, "%s()\n",__func__); + i_vpr_h(inst, "%s()\n",__func__); rc = msm_vidc_release_internal_buffers(inst, MSM_VIDC_BUF_BIN); if (rc) @@ -919,7 +919,7 @@ static int msm_vdec_release_output_internal_buffers(struct msm_vidc_inst *inst) d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - s_vpr_h(inst->sid, "%s()\n",__func__); + i_vpr_h(inst, "%s()\n",__func__); rc = msm_vidc_release_internal_buffers(inst, MSM_VIDC_BUF_DPB); if (rc) @@ -1212,7 +1212,7 @@ int msm_vdec_input_port_settings_change(struct msm_vidc_inst *inst) struct v4l2_event event = {0}; if (!inst->vb2q[INPUT_PORT].streaming) { - s_vpr_e(inst->sid, "%s: input port not streaming\n", + i_vpr_e(inst, "%s: input port not streaming\n", __func__); return 0; } @@ -1281,7 +1281,7 @@ int msm_vdec_streamon_input(struct msm_vidc_inst *inst) if (is_input_meta_enabled(inst) && !inst->vb2q[INPUT_META_PORT].streaming) { - s_vpr_e(inst->sid, + i_vpr_e(inst, "%s: Meta port must be streamed on before data port\n", __func__); return -EINVAL; @@ -1344,7 +1344,7 @@ int msm_vdec_streamon_input(struct msm_vidc_inst *inst) return 0; error: - s_vpr_e(inst->sid, "%s: failed\n", __func__); + i_vpr_e(inst, "%s: failed\n", __func__); msm_vdec_streamoff_input(inst); return rc; } @@ -1483,7 +1483,7 @@ int msm_vdec_streamon_output(struct msm_vidc_inst *inst) if (is_output_meta_enabled(inst) && !inst->vb2q[OUTPUT_META_PORT].streaming) { - s_vpr_e(inst->sid, + i_vpr_e(inst, "%s: Meta port must be streamed on before data port\n", __func__); return -EINVAL; @@ -1530,7 +1530,7 @@ int msm_vdec_streamon_output(struct msm_vidc_inst *inst) return 0; error: - s_vpr_e(inst->sid, "%s: failed\n", __func__); + i_vpr_e(inst, "%s: failed\n", __func__); msm_vdec_streamoff_output(inst); return rc; } @@ -1629,7 +1629,7 @@ int msm_vdec_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) if (f->type == INPUT_MPLANE) { if (inst->fmts[INPUT_PORT].fmt.pix_mp.pixelformat != f->fmt.pix_mp.pixelformat) { - s_vpr_h(inst->sid, + i_vpr_h(inst, "%s: codec changed from %#x to %#x\n", __func__, inst->fmts[INPUT_PORT].fmt.pix_mp.pixelformat, f->fmt.pix_mp.pixelformat); @@ -1670,7 +1670,7 @@ int msm_vdec_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) goto err_invalid_fmt; //update_log_ctxt(inst->sid, inst->session_type, // mplane->pixelformat); - s_vpr_h(inst->sid, + i_vpr_h(inst, "%s: input: codec %#x width %d height %d size %d min_count %d extra_count %d\n", __func__, f->fmt.pix_mp.pixelformat, f->fmt.pix_mp.width, f->fmt.pix_mp.height, @@ -1702,7 +1702,7 @@ int msm_vdec_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) inst->buffers.input_meta.actual_count = 0; inst->buffers.input_meta.size = 0; } - s_vpr_h(inst->sid, + i_vpr_h(inst, "%s: input meta: size %d min_count %d extra_count %d\n", __func__, fmt->fmt.meta.buffersize, inst->buffers.input_meta.min_count, @@ -1748,7 +1748,7 @@ int msm_vdec_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) //rc = msm_vidc_check_session_supported(inst); if (rc) goto err_invalid_fmt; - s_vpr_h(inst->sid, + i_vpr_h(inst, "%s: output: format %#x width %d height %d size %d min_count %d extra_count %d\n", __func__, fmt->fmt.pix_mp.pixelformat, fmt->fmt.pix_mp.width, fmt->fmt.pix_mp.height, @@ -1776,13 +1776,13 @@ int msm_vdec_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) inst->buffers.output_meta.actual_count = 0; inst->buffers.output_meta.size = 0; } - s_vpr_h(inst->sid, + i_vpr_h(inst, "%s: output meta: size %d min_count %d extra_count %d\n", __func__, fmt->fmt.meta.buffersize, inst->buffers.output_meta.min_count, inst->buffers.output_meta.extra_count); } else { - s_vpr_e(inst->sid, "%s: invalid type %d\n", __func__, f->type); + i_vpr_e(inst, "%s: invalid type %d\n", __func__, f->type); goto err_invalid_fmt; } memcpy(f, fmt, sizeof(struct v4l2_format)); @@ -1816,7 +1816,7 @@ int msm_vdec_s_selection(struct msm_vidc_inst* inst, struct v4l2_selection* s) d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - s_vpr_e(inst->sid, "%s: unsupported\n", __func__); + i_vpr_e(inst, "%s: unsupported\n", __func__); return -EINVAL; } @@ -1842,7 +1842,7 @@ int msm_vdec_g_selection(struct msm_vidc_inst* inst, struct v4l2_selection* s) s->r.height = inst->crop.height; break; } - s_vpr_h(inst->sid, "%s: type %d target %d, r [%d, %d, %d, %d]\n", + i_vpr_h(inst, "%s: type %d target %d, r [%d, %d, %d, %d]\n", __func__, s->type, s->target, s->r.top, s->r.left, s->r.width, s->r.height); return 0; @@ -1876,7 +1876,7 @@ int msm_vdec_s_param(struct msm_vidc_inst *inst, } if (!timeperframe->denominator || !timeperframe->numerator) { - s_vpr_e(inst->sid, + i_vpr_e(inst, "%s: invalid rate for type %u\n", __func__, s_parm->type); input_rate = default_rate >> 16; @@ -1887,7 +1887,7 @@ int msm_vdec_s_param(struct msm_vidc_inst *inst, do_div(us_per_frame, timeperframe->denominator); if (!us_per_frame) { - s_vpr_e(inst->sid, "%s: us_per_frame is zero\n", + i_vpr_e(inst, "%s: us_per_frame is zero\n", __func__); rc = -EINVAL; goto exit; @@ -1898,7 +1898,7 @@ int msm_vdec_s_param(struct msm_vidc_inst *inst, /* Check max allowed rate */ if (input_rate > max_rate) { - s_vpr_e(inst->sid, + i_vpr_e(inst, "%s: Unsupported rate %u, max_fps %u, type: %u\n", __func__, input_rate, max_rate, s_parm->type); rc = -ENOTSUPP; @@ -1907,7 +1907,7 @@ int msm_vdec_s_param(struct msm_vidc_inst *inst, set_default: q16_rate = (u32)input_rate << 16; - s_vpr_h(inst->sid, "%s: type %u value %#x\n", + i_vpr_h(inst, "%s: type %u value %#x\n", __func__, s_parm->type, q16_rate); if (is_frame_rate) { @@ -1944,7 +1944,7 @@ int msm_vdec_g_param(struct msm_vidc_inst *inst, capability->cap[OPERATING_RATE].value >> 16; } - s_vpr_h(inst->sid, "%s: type %u, num %u denom %u\n", + i_vpr_h(inst, "%s: type %u, num %u denom %u\n", __func__, s_parm->type, timeperframe->numerator, timeperframe->denominator); return 0; @@ -2039,7 +2039,7 @@ int msm_vdec_enum_fmt(struct msm_vidc_inst *inst, struct v4l2_fmtdesc *f) } memset(f->reserved, 0, sizeof(f->reserved)); - s_vpr_h(inst->sid, "%s: index %d, %s : %#x, flags %#x, driver colorfmt %#x\n", + i_vpr_h(inst, "%s: index %d, %s : %#x, flags %#x, driver colorfmt %#x\n", __func__, f->index, f->description, f->pixelformat, f->flags, v4l2_colorformat_to_driver(f->pixelformat, __func__)); return rc; diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index cf379cb26b..200ee80754 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -46,7 +46,7 @@ static int msm_venc_codec_change(struct msm_vidc_inst *inst, u32 v4l2_codec) if (inst->codec && inst->fmts[OUTPUT_PORT].fmt.pix_mp.pixelformat == v4l2_codec) return 0; - s_vpr_h(inst->sid, "%s: codec changed from %#x to %#x\n", + i_vpr_h(inst, "%s: codec changed from %#x to %#x\n", __func__, inst->fmts[OUTPUT_PORT].fmt.pix_mp.pixelformat, v4l2_codec); inst->codec = v4l2_codec_to_driver(v4l2_codec, __func__); @@ -76,14 +76,14 @@ static int msm_venc_set_colorformat(struct msm_vidc_inst *inst, u32 hfi_colorformat; if (port != INPUT_PORT && port != OUTPUT_PORT) { - s_vpr_e(inst->sid, "%s: invalid port %d\n", __func__, port); + i_vpr_e(inst, "%s: invalid port %d\n", __func__, port); return -EINVAL; } pixelformat = inst->fmts[INPUT_PORT].fmt.pix_mp.pixelformat; if (pixelformat != V4L2_PIX_FMT_VIDC_NV12C && pixelformat != V4L2_PIX_FMT_VIDC_TP10C) { - s_vpr_e(inst->sid, "%s: invalid pixelformat %#x\n", + i_vpr_e(inst, "%s: invalid pixelformat %#x\n", __func__, pixelformat); return -EINVAL; } @@ -110,7 +110,7 @@ static int msm_venc_set_linear_alignment_factor(struct msm_vidc_inst *inst, u32 alignment_factor[2]; if (port != INPUT_PORT) { - s_vpr_e(inst->sid, "%s: invalid port %d\n", __func__, port); + i_vpr_e(inst, "%s: invalid port %d\n", __func__, port); return -EINVAL; } @@ -118,7 +118,7 @@ static int msm_venc_set_linear_alignment_factor(struct msm_vidc_inst *inst, if (pixelformat == V4L2_PIX_FMT_VIDC_NV12C || pixelformat == V4L2_PIX_FMT_VIDC_TP10C || pixelformat == V4L2_PIX_FMT_VIDC_ARGB32C) { - s_vpr_e(inst->sid, + i_vpr_e(inst, "%s: not a linear color fmt, property is not set\n", __func__); return 0; @@ -138,7 +138,7 @@ static int msm_venc_set_linear_alignment_factor(struct msm_vidc_inst *inst, uv_scanline_alignment(pixelformat, __func__); } - s_vpr_h(inst->sid, "%s: payload[0]: %u payload[1]: %u\n", __func__, + i_vpr_h(inst, "%s: payload[0]: %u payload[1]: %u\n", __func__, alignment_factor[0], alignment_factor[1]); rc = venus_hfi_session_property(inst, HFI_PROP_LINEAR_ALIGNMENT_FACTOR, @@ -160,12 +160,12 @@ static int msm_venc_set_raw_resolution(struct msm_vidc_inst *inst, u32 resolution; if (port != INPUT_PORT) { - s_vpr_e(inst->sid, "%s: invalid port %d\n", __func__, port); + i_vpr_e(inst, "%s: invalid port %d\n", __func__, port); return -EINVAL; } resolution = inst->crop.width << 16 | inst->crop.height; - s_vpr_h(inst->sid, "%s: width: %d height: %d\n", __func__, + i_vpr_h(inst, "%s: width: %d height: %d\n", __func__, inst->crop.width, inst->crop.height); rc = venus_hfi_session_property(inst, HFI_PROP_RAW_RESOLUTION, @@ -186,13 +186,13 @@ static int msm_venc_set_bitstream_resolution(struct msm_vidc_inst *inst, u32 resolution; if (port != OUTPUT_PORT) { - s_vpr_e(inst->sid, "%s: invalid port %d\n", __func__, port); + i_vpr_e(inst, "%s: invalid port %d\n", __func__, port); return -EINVAL; } resolution = (inst->fmts[port].fmt.pix_mp.width << 16) | inst->fmts[port].fmt.pix_mp.height; - s_vpr_h(inst->sid, "%s: width: %d height: %d\n", __func__, + i_vpr_h(inst, "%s: width: %d height: %d\n", __func__, inst->fmts[port].fmt.pix_mp.width, inst->fmts[port].fmt.pix_mp.height); rc = venus_hfi_session_property(inst, @@ -215,7 +215,7 @@ static int msm_venc_set_crop_offsets(struct msm_vidc_inst *inst, u64 crop; if (port != OUTPUT_PORT) { - s_vpr_e(inst->sid, "%s: invalid port %d\n", __func__, port); + i_vpr_e(inst, "%s: invalid port %d\n", __func__, port); return -EINVAL; } @@ -228,7 +228,7 @@ static int msm_venc_set_crop_offsets(struct msm_vidc_inst *inst, crop = (u64)right_offset << 48 | (u64)bottom_offset << 32 | (u64)left_offset << 16 | top_offset; - s_vpr_h(inst->sid, "%s: left_offset: %d top_offset: %d " + i_vpr_h(inst, "%s: left_offset: %d top_offset: %d " "right_offset: %d bottom_offset: %d", __func__, left_offset, top_offset, right_offset, bottom_offset); @@ -251,11 +251,11 @@ static int msm_venc_set_host_max_buf_count(struct msm_vidc_inst *inst, u32 count = DEFAULT_MAX_HOST_BUF_COUNT; if (port != INPUT_PORT && port != OUTPUT_PORT) { - s_vpr_e(inst->sid, "%s: invalid port %d\n", __func__, port); + i_vpr_e(inst, "%s: invalid port %d\n", __func__, port); return -EINVAL; } - s_vpr_h(inst->sid, "%s: count: %u port: %u\n", __func__, count, port); + i_vpr_h(inst, "%s: count: %u port: %u\n", __func__, count, port); rc = venus_hfi_session_property(inst, HFI_PROP_BUFFER_HOST_MAX_COUNT, HFI_HOST_FLAGS_NONE, @@ -277,13 +277,13 @@ static int msm_venc_set_stage(struct msm_vidc_inst *inst) rc = call_session_op(core, decide_work_mode, inst); if (rc) { - s_vpr_e(inst->sid, "%s: decide_work_mode failed\n", + i_vpr_e(inst, "%s: decide_work_mode failed\n", __func__); return -EINVAL; } stage = capability->cap[STAGE].value; - s_vpr_h(inst->sid, "%s: stage: %u\n", __func__, stage); + i_vpr_h(inst, "%s: stage: %u\n", __func__, stage); rc = venus_hfi_session_property(inst, HFI_PROP_STAGE, HFI_HOST_FLAGS_NONE, @@ -305,13 +305,13 @@ static int msm_venc_set_pipe(struct msm_vidc_inst *inst) rc = call_session_op(core, decide_work_route, inst); if (rc) { - s_vpr_e(inst->sid, "%s: decide_work_route failed\n", + i_vpr_e(inst, "%s: decide_work_route failed\n", __func__); return -EINVAL; } pipe = capability->cap[PIPE].value; - s_vpr_h(inst->sid, "%s: pipe: %u\n", __func__, pipe); + i_vpr_h(inst, "%s: pipe: %u\n", __func__, pipe); rc = venus_hfi_session_property(inst, HFI_PROP_PIPE, HFI_HOST_FLAGS_NONE, @@ -333,13 +333,13 @@ static int msm_venc_set_quality_mode(struct msm_vidc_inst *inst) rc = call_session_op(core, decide_quality_mode, inst); if (rc) { - s_vpr_e(inst->sid, "%s: decide_work_route failed\n", + i_vpr_e(inst, "%s: decide_work_route failed\n", __func__); return -EINVAL; } mode = capability->cap[QUALITY_MODE].value; - s_vpr_h(inst->sid, "%s: quality_mode: %u\n", __func__, mode); + i_vpr_h(inst, "%s: quality_mode: %u\n", __func__, mode); rc = venus_hfi_session_property(inst, HFI_PROP_QUALITY_MODE, HFI_HOST_FLAGS_NONE, @@ -467,8 +467,8 @@ static int msm_venc_get_input_internal_buffers(struct msm_vidc_inst *inst) inst->buffers.dpb.min_count = call_session_op(core, min_count, inst, MSM_VIDC_BUF_VPSS); - s_vpr_h(inst->sid, "%s: internal buffer: min size\n", __func__); - s_vpr_h(inst->sid, "vpss buffer: %d %d\n", + i_vpr_h(inst, "%s: internal buffer: min size\n", __func__); + i_vpr_h(inst, "vpss buffer: %d %d\n", inst->buffers.vpss.min_count, inst->buffers.vpss.size); */ @@ -541,20 +541,20 @@ static int msm_venc_get_output_internal_buffers(struct msm_vidc_inst *inst) if (rc) return rc; - s_vpr_h(inst->sid, "internal buffer: min size\n"); - s_vpr_h(inst->sid, "bin buffer: %d %d\n", + i_vpr_h(inst, "internal buffer: min size\n"); + i_vpr_h(inst, "bin buffer: %d %d\n", inst->buffers.bin.min_count, inst->buffers.bin.size); - s_vpr_h(inst->sid, "comv buffer: %d %d\n", + i_vpr_h(inst, "comv buffer: %d %d\n", inst->buffers.comv.min_count, inst->buffers.comv.size); - s_vpr_h(inst->sid, "non_comv buffer: %d %d\n", + i_vpr_h(inst, "non_comv buffer: %d %d\n", inst->buffers.non_comv.min_count, inst->buffers.non_comv.size); - s_vpr_h(inst->sid, "line buffer: %d %d\n", + i_vpr_h(inst, "line buffer: %d %d\n", inst->buffers.line.min_count, inst->buffers.line.size); - s_vpr_h(inst->sid, "dpb buffer: %d %d\n", + i_vpr_h(inst, "dpb buffer: %d %d\n", inst->buffers.dpb.min_count, inst->buffers.dpb.size); @@ -647,7 +647,7 @@ static int msm_venc_property_subscription(struct msm_vidc_inst *inst, payload_size = (ARRAY_SIZE(msm_venc_output_subscribe_for_properties) + 1) * sizeof(u32); } else { - s_vpr_e(inst->sid, "%s: invalid port: %d\n", __func__, port); + i_vpr_e(inst, "%s: invalid port: %d\n", __func__, port); return -EINVAL; } @@ -782,7 +782,7 @@ int msm_venc_streamon_input(struct msm_vidc_inst *inst) if (is_input_meta_enabled(inst) && !inst->vb2q[INPUT_META_PORT].streaming) { - s_vpr_e(inst->sid, + i_vpr_e(inst, "%s: Meta port must be streamed on before data port\n", __func__); return -EINVAL; @@ -829,7 +829,7 @@ int msm_venc_streamon_input(struct msm_vidc_inst *inst) return 0; error: - s_vpr_e(inst->sid, "%s: failed\n", __func__); + i_vpr_e(inst, "%s: failed\n", __func__); msm_venc_streamoff_input(inst); return rc; } @@ -911,7 +911,7 @@ int msm_venc_streamon_output(struct msm_vidc_inst *inst) if (is_output_meta_enabled(inst) && !inst->vb2q[OUTPUT_META_PORT].streaming) { - s_vpr_e(inst->sid, + i_vpr_e(inst, "%s: Meta port must be streamed on before data port\n", __func__); return -EINVAL; @@ -960,7 +960,7 @@ int msm_venc_streamon_output(struct msm_vidc_inst *inst) return 0; error: - s_vpr_e(inst->sid, "%s: failed\n", __func__); + i_vpr_e(inst, "%s: failed\n", __func__); msm_venc_streamoff_output(inst); return rc; } @@ -1041,7 +1041,7 @@ int msm_venc_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) goto err_invalid_fmt; //update_log_ctxt(inst->sid, inst->session_type, // mplane->pixelformat); - s_vpr_h(inst->sid, + i_vpr_h(inst, "%s: input: codec %#x width %d height %d size %d min_count %d extra_count %d\n", __func__, f->fmt.pix_mp.pixelformat, f->fmt.pix_mp.width, f->fmt.pix_mp.height, @@ -1073,7 +1073,7 @@ int msm_venc_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) inst->buffers.input_meta.actual_count = 0; inst->buffers.input_meta.size = 0; } - s_vpr_h(inst->sid, + i_vpr_h(inst, "%s: input meta: size %d min_count %d extra_count %d\n", __func__, fmt->fmt.meta.buffersize, inst->buffers.input_meta.min_count, @@ -1081,7 +1081,7 @@ int msm_venc_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) } else if (f->type == OUTPUT_MPLANE) { fmt = &inst->fmts[OUTPUT_PORT]; if (fmt->fmt.pix_mp.pixelformat != f->fmt.pix_mp.pixelformat) { - s_vpr_h(inst->sid, + i_vpr_h(inst, "%s: codec changed from %#x to %#x\n", __func__, fmt->fmt.pix_mp.pixelformat, f->fmt.pix_mp.pixelformat); rc = msm_venc_codec_change(inst, f->fmt.pix_mp.pixelformat); @@ -1121,7 +1121,7 @@ int msm_venc_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) //update_log_ctxt(inst->sid, inst->session_type, // mplane->pixelformat); - s_vpr_h(inst->sid, + i_vpr_h(inst, "%s: output: format %#x width %d height %d size %d min_count %d extra_count %d\n", __func__, fmt->fmt.pix_mp.pixelformat, fmt->fmt.pix_mp.width, fmt->fmt.pix_mp.height, @@ -1149,13 +1149,13 @@ int msm_venc_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) inst->buffers.output_meta.actual_count = 0; inst->buffers.output_meta.size = 0; } - s_vpr_h(inst->sid, + i_vpr_h(inst, "%s: output meta: size %d min_count %d extra_count %d\n", __func__, fmt->fmt.meta.buffersize, inst->buffers.output_meta.min_count, inst->buffers.output_meta.extra_count); } else { - s_vpr_e(inst->sid, "%s: invalid type %d\n", __func__, f->type); + i_vpr_e(inst, "%s: invalid type %d\n", __func__, f->type); goto err_invalid_fmt; } memcpy(f, fmt, sizeof(struct v4l2_format)); @@ -1193,7 +1193,7 @@ int msm_venc_s_selection(struct msm_vidc_inst* inst, struct v4l2_selection* s) return -EINVAL; } if (s->type != INPUT_MPLANE && s->type != V4L2_BUF_TYPE_VIDEO_OUTPUT) { - s_vpr_e(inst->sid, "%s: invalid type %d\n", __func__, s->type); + i_vpr_e(inst, "%s: invalid type %d\n", __func__, s->type); return -EINVAL; } @@ -1204,20 +1204,20 @@ int msm_venc_s_selection(struct msm_vidc_inst* inst, struct v4l2_selection* s) codec_align = inst->fmts[OUTPUT_PORT].fmt.pix_mp.pixelformat == V4L2_PIX_FMT_HEVC ? 32 : 16; if (s->r.left || s->r.top) { - s_vpr_h(inst->sid, "%s: unsupported top %d or left %d\n", + i_vpr_h(inst, "%s: unsupported top %d or left %d\n", __func__, s->r.left, s->r.top); s->r.left = s->r.top = 0; } if (s->r.width > inst->fmts[OUTPUT_PORT].fmt.pix_mp.width || ALIGN(s->r.width, codec_align) != inst->fmts[OUTPUT_PORT].fmt.pix_mp.width) { - s_vpr_h(inst->sid, "%s: unsupported width %d, fmt width %d\n", + i_vpr_h(inst, "%s: unsupported width %d, fmt width %d\n", __func__, s->r.width, inst->fmts[OUTPUT_PORT].fmt.pix_mp.width); s->r.width = inst->fmts[OUTPUT_PORT].fmt.pix_mp.width; } if (s->r.height > inst->fmts[OUTPUT_PORT].fmt.pix_mp.height || ALIGN(s->r.height, codec_align) != inst->fmts[OUTPUT_PORT].fmt.pix_mp.height) { - s_vpr_h(inst->sid, "%s: unsupported height %d, fmt height %d\n", + i_vpr_h(inst, "%s: unsupported height %d, fmt height %d\n", __func__, s->r.height, inst->fmts[OUTPUT_PORT].fmt.pix_mp.height); s->r.height = inst->fmts[OUTPUT_PORT].fmt.pix_mp.height; @@ -1242,25 +1242,25 @@ int msm_venc_s_selection(struct msm_vidc_inst* inst, struct v4l2_selection* s) case V4L2_SEL_TGT_COMPOSE_DEFAULT: case V4L2_SEL_TGT_COMPOSE: if (s->r.left < inst->crop.left) { - s_vpr_e(inst->sid, + i_vpr_e(inst, "%s: compose left (%d) less than crop left (%d)\n", __func__, s->r.left, inst->crop.left); s->r.left = inst->crop.left; } if (s->r.top < inst->crop.top) { - s_vpr_e(inst->sid, + i_vpr_e(inst, "%s: compose top (%d) less than crop top (%d)\n", __func__, s->r.top, inst->crop.top); s->r.top = inst->crop.top; } if (s->r.width > inst->crop.width) { - s_vpr_e(inst->sid, + i_vpr_e(inst, "%s: compose width (%d) greate than crop width (%d)\n", __func__, s->r.width, inst->crop.width); s->r.width = inst->crop.width; } if (s->r.height > inst->crop.height) { - s_vpr_e(inst->sid, + i_vpr_e(inst, "%s: compose height (%d) greate than crop height (%d)\n", __func__, s->r.height, inst->crop.height); s->r.height = inst->crop.height; @@ -1271,13 +1271,13 @@ int msm_venc_s_selection(struct msm_vidc_inst* inst, struct v4l2_selection* s) inst->compose.height= s->r.height; break; default: - s_vpr_e(inst->sid, "%s: invalid target %d\n", + i_vpr_e(inst, "%s: invalid target %d\n", __func__, s->target); rc = -EINVAL; break; } if (!rc) - s_vpr_h(inst->sid, "%s: target %d, r [%d, %d, %d, %d]\n", + i_vpr_h(inst, "%s: target %d, r [%d, %d, %d, %d]\n", __func__, s->target, s->r.top, s->r.left, s->r.width, s->r.height); return rc; @@ -1292,7 +1292,7 @@ int msm_venc_g_selection(struct msm_vidc_inst* inst, struct v4l2_selection* s) return -EINVAL; } if (s->type != INPUT_MPLANE && s->type != V4L2_BUF_TYPE_VIDEO_OUTPUT) { - s_vpr_e(inst->sid, "%s: invalid type %d\n", __func__, s->type); + i_vpr_e(inst, "%s: invalid type %d\n", __func__, s->type); return -EINVAL; } @@ -1315,13 +1315,13 @@ int msm_venc_g_selection(struct msm_vidc_inst* inst, struct v4l2_selection* s) s->r.height = inst->compose.height; break; default: - s_vpr_e(inst->sid, "%s: invalid target %d\n", + i_vpr_e(inst, "%s: invalid target %d\n", __func__, s->target); rc = -EINVAL; break; } if (!rc) - s_vpr_h(inst->sid, "%s: target %d, r [%d, %d, %d, %d]\n", + i_vpr_h(inst, "%s: target %d, r [%d, %d, %d, %d]\n", __func__, s->target, s->r.top, s->r.left, s->r.width, s->r.height); return rc; @@ -1355,7 +1355,7 @@ int msm_venc_s_param(struct msm_vidc_inst *inst, } if (!timeperframe->denominator || !timeperframe->numerator) { - s_vpr_e(inst->sid, + i_vpr_e(inst, "%s: invalid rate for type %u\n", __func__, s_parm->type); input_rate = default_rate >> 16; @@ -1366,7 +1366,7 @@ int msm_venc_s_param(struct msm_vidc_inst *inst, do_div(us_per_frame, timeperframe->denominator); if (!us_per_frame) { - s_vpr_e(inst->sid, "%s: us_per_frame is zero\n", + i_vpr_e(inst, "%s: us_per_frame is zero\n", __func__); rc = -EINVAL; goto exit; @@ -1377,7 +1377,7 @@ int msm_venc_s_param(struct msm_vidc_inst *inst, /* Check max allowed rate */ if (input_rate > max_rate) { - s_vpr_e(inst->sid, + i_vpr_e(inst, "%s: Unsupported rate %u, max_fps %u, type: %u\n", __func__, input_rate, max_rate, s_parm->type); rc = -ENOTSUPP; @@ -1386,7 +1386,7 @@ int msm_venc_s_param(struct msm_vidc_inst *inst, set_default: q16_rate = (u32)input_rate << 16; - s_vpr_h(inst->sid, "%s: type %u value %#x\n", + i_vpr_h(inst, "%s: type %u value %#x\n", __func__, s_parm->type, q16_rate); if (!is_frame_rate) { @@ -1411,7 +1411,7 @@ set_default: &q16_rate, sizeof(u32)); if (rc) { - s_vpr_e(inst->sid, + i_vpr_e(inst, "%s: failed to set frame rate to fw\n", __func__); goto exit; @@ -1446,7 +1446,7 @@ int msm_venc_g_param(struct msm_vidc_inst *inst, capability->cap[FRAME_RATE].value >> 16; } - s_vpr_h(inst->sid, "%s: type %u, num %u denom %u\n", + i_vpr_h(inst, "%s: type %u, num %u denom %u\n", __func__, s_parm->type, timeperframe->numerator, timeperframe->denominator); return 0; @@ -1510,7 +1510,7 @@ int msm_venc_enum_fmt(struct msm_vidc_inst *inst, struct v4l2_fmtdesc *f) } memset(f->reserved, 0, sizeof(f->reserved)); - s_vpr_h(inst->sid, "%s: index %d, %s : %#x, flags %#x, driver colorfmt %#x\n", + i_vpr_h(inst, "%s: index %d, %s : %#x, flags %#x, driver colorfmt %#x\n", __func__, f->index, f->description, f->pixelformat, f->flags, v4l2_colorformat_to_driver(f->pixelformat, __func__)); return rc; diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index ad05c7b48d..057443eab9 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -70,7 +70,7 @@ int msm_vidc_poll(void *instance, struct file *filp, return -EINVAL; } if (inst->state == MSM_VIDC_ERROR) { - s_vpr_e(inst->sid, "%s: inst in error state\n", __func__); + i_vpr_e(inst, "%s: inst in error state\n", __func__); return -EINVAL; } @@ -156,7 +156,7 @@ int msm_vidc_query_ctrl(void *instance, struct v4l2_queryctrl *q_ctrl) ctrl = v4l2_ctrl_find(&inst->ctrl_handler, q_ctrl->id); if (!ctrl) { - s_vpr_e(inst->sid, "%s: get_ctrl failed for id %d\n", + i_vpr_e(inst, "%s: get_ctrl failed for id %d\n", __func__, q_ctrl->id); return -EINVAL; } @@ -165,7 +165,7 @@ int msm_vidc_query_ctrl(void *instance, struct v4l2_queryctrl *q_ctrl) q_ctrl->default_value = ctrl->default_value; q_ctrl->flags = 0; q_ctrl->step = ctrl->step; - s_vpr_h(inst->sid, + i_vpr_h(inst, "query ctrl: %s: min %d, max %d, default %d step %d flags %#x\n", ctrl->name, q_ctrl->minimum, q_ctrl->maximum, q_ctrl->default_value, q_ctrl->step, q_ctrl->flags); @@ -187,12 +187,12 @@ int msm_vidc_query_menu(void *instance, struct v4l2_querymenu *qmenu) ctrl = v4l2_ctrl_find(&inst->ctrl_handler, qmenu->id); if (!ctrl) { - s_vpr_e(inst->sid, "%s: get_ctrl failed for id %d\n", + i_vpr_e(inst, "%s: get_ctrl failed for id %d\n", __func__, qmenu->id); return -EINVAL; } if (ctrl->type != V4L2_CTRL_TYPE_MENU) { - s_vpr_e(inst->sid, "%s: ctrl: %s: type (%d) is not MENU type\n", + i_vpr_e(inst, "%s: ctrl: %s: type (%d) is not MENU type\n", __func__, ctrl->name, ctrl->type); return -EINVAL; } @@ -202,7 +202,7 @@ int msm_vidc_query_menu(void *instance, struct v4l2_querymenu *qmenu) if (ctrl->menu_skip_mask & (1 << qmenu->index)) rc = -EINVAL; - s_vpr_h(inst->sid, + i_vpr_h(inst, "%s: ctrl: %s: min %d, max %d, menu_skip_mask %#x, qmenu: id %d, index %d, %s\n", __func__, ctrl->name, ctrl->minimum, ctrl->maximum, ctrl->menu_skip_mask, qmenu->id, qmenu->index, @@ -230,7 +230,7 @@ int msm_vidc_s_fmt(void *instance, struct v4l2_format *f) rc = msm_venc_s_fmt(inst, f); if (rc) - s_vpr_e(inst->sid, "%s: s_fmt(%d) failed %d\n", + i_vpr_e(inst, "%s: s_fmt(%d) failed %d\n", __func__, f->type, rc); return rc; } @@ -254,12 +254,12 @@ int msm_vidc_g_fmt(void *instance, struct v4l2_format *f) return rc; if (f->type == INPUT_MPLANE || f->type == OUTPUT_MPLANE) - s_vpr_h(inst->sid, + i_vpr_h(inst, "%s: type %d format %#x width %d height %d size %d\n", __func__, f->type, f->fmt.pix_mp.pixelformat, f->fmt.pix_mp.width, f->fmt.pix_mp.height, f->fmt.pix_mp.plane_fmt[0].sizeimage); else if (f->type == INPUT_META_PLANE || f->type == OUTPUT_META_PLANE) - s_vpr_h(inst->sid, "%s: meta type %d size %d\n", + i_vpr_h(inst, "%s: meta type %d size %d\n", __func__, f->type, f->fmt.meta.buffersize); return 0; } @@ -380,10 +380,10 @@ int msm_vidc_g_ctrl(void *instance, struct v4l2_control *control) control->value = ctrl->val; } if (rc) - s_vpr_e(inst->sid, "%s: failed for control id %#x\n", + i_vpr_e(inst, "%s: failed for control id %#x\n", __func__, control->id); else - s_vpr_h(inst->sid, "%s: control id %#x, value %d\n", + i_vpr_h(inst, "%s: control id %#x, value %d\n", __func__, control->id, control->value); return rc; } @@ -415,7 +415,7 @@ int msm_vidc_reqbufs(void *instance, struct v4l2_requestbuffers *b) rc = vb2_reqbufs(&inst->vb2q[port], b); if (rc) { - s_vpr_e(inst->sid, "%s: vb2_reqbufs(%d) failed, %d\n", + i_vpr_e(inst, "%s: vb2_reqbufs(%d) failed, %d\n", __func__, b->type, rc); goto unlock; } @@ -453,7 +453,7 @@ int msm_vidc_qbuf(void *instance, struct media_device *mdev, rc = vb2_qbuf(q, mdev, b); if (rc) - s_vpr_e(inst->sid, "%s: failed with %d\n", __func__, rc); + i_vpr_e(inst, "%s: failed with %d\n", __func__, rc); unlock: mutex_unlock(&inst->lock); @@ -484,7 +484,7 @@ int msm_vidc_dqbuf(void *instance, struct v4l2_buffer *b) if (rc == -EAGAIN) { goto unlock; } else if (rc) { - s_vpr_e(inst->sid, "%s: failed with %d\n", __func__, rc); + i_vpr_e(inst, "%s: failed with %d\n", __func__, rc); goto unlock; } @@ -523,7 +523,7 @@ int msm_vidc_streamon(void *instance, enum v4l2_buf_type type) rc = vb2_streamon(&inst->vb2q[port], type); if (rc) { - s_vpr_e(inst->sid, "%s: vb2_streamon(%d) failed, %d\n", + i_vpr_e(inst, "%s: vb2_streamon(%d) failed, %d\n", __func__, type, rc); msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); goto unlock; @@ -564,7 +564,7 @@ int msm_vidc_streamoff(void *instance, enum v4l2_buf_type type) rc = vb2_streamoff(&inst->vb2q[port], type); if (rc) { - s_vpr_e(inst->sid, "%s: vb2_streamoff(%d) failed, %d\n", + i_vpr_e(inst, "%s: vb2_streamoff(%d) failed, %d\n", __func__, type, rc); msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); goto unlock; @@ -606,7 +606,7 @@ int msm_vidc_enum_framesizes(void *instance, struct v4l2_frmsizeenum *fsize) return -EINVAL; } if (!inst->capabilities) { - s_vpr_e(inst->sid, "capabilities not available\n", __func__); + i_vpr_e(inst, "capabilities not available\n", __func__); return -EINVAL; } capability = inst->capabilities; @@ -634,11 +634,11 @@ int msm_vidc_subscribe_event(void *instance, d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - s_vpr_h(inst->sid, "%s: type %d id %d\n", __func__, sub->type, sub->id); + i_vpr_h(inst, "%s: type %d id %d\n", __func__, sub->type, sub->id); rc = v4l2_event_subscribe(&inst->event_handler, sub, MAX_EVENTS, NULL); if (rc) - s_vpr_e(inst->sid, "%s: fialed, type %d id %d\n", + i_vpr_e(inst, "%s: fialed, type %d id %d\n", __func__, sub->type, sub->id); return rc; } @@ -654,10 +654,10 @@ int msm_vidc_unsubscribe_event(void *instance, d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - s_vpr_h(inst->sid, "%s: type %d id %d\n", __func__, sub->type, sub->id); + i_vpr_h(inst, "%s: type %d id %d\n", __func__, sub->type, sub->id); rc = v4l2_event_unsubscribe(&inst->event_handler, sub); if (rc) - s_vpr_e(inst->sid, "%s: fialed, type %d id %d\n", + i_vpr_e(inst, "%s: fialed, type %d id %d\n", __func__, sub->type, sub->id); return rc; } @@ -674,7 +674,7 @@ int msm_vidc_dqevent(void *instance, struct v4l2_event *event) } rc = v4l2_event_dequeue(&inst->event_handler, event, false); if (rc) - s_vpr_e(inst->sid, "%s: fialed\n", __func__); + i_vpr_e(inst, "%s: fialed\n", __func__); return rc; } EXPORT_SYMBOL(msm_vidc_dqevent); @@ -718,7 +718,7 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) d_vpr_e("%s: failed to get session id\n", __func__); goto error; } - s_vpr_e(inst->sid, "Opening video instance: %d\n", session_type); + i_vpr_e(inst, "Opening video instance: %d\n", session_type); inst->response_workq = create_singlethread_workqueue("response_workq"); if (!inst->response_workq) { @@ -729,7 +729,7 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) inst->capabilities = kzalloc( sizeof(struct msm_vidc_inst_capability), GFP_KERNEL); if (!inst->capabilities) { - s_vpr_e(inst->sid, + i_vpr_e(inst, "%s: inst capability allocation failed\n", __func__); goto error; } @@ -805,7 +805,7 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) inst->debugfs_root = msm_vidc_debugfs_init_inst(inst, core->debugfs_root); if (!inst->debugfs_root) - s_vpr_h(inst->sid, "%s: debugfs not available\n", __func__); + i_vpr_h(inst, "%s: debugfs not available\n", __func__); return inst; @@ -828,7 +828,7 @@ int msm_vidc_close(void *instance) core = inst->core; - s_vpr_h(inst->sid, "%s()\n", __func__); + i_vpr_h(inst, "%s()\n", __func__); mutex_lock(&inst->lock); msm_vidc_session_close(inst); msm_vidc_remove_session(inst); diff --git a/driver/vidc/src/msm_vidc_buffer.c b/driver/vidc/src/msm_vidc_buffer.c index 28c6ddd161..7a52b54450 100644 --- a/driver/vidc/src/msm_vidc_buffer.c +++ b/driver/vidc/src/msm_vidc_buffer.c @@ -26,7 +26,7 @@ u32 msm_vidc_input_min_count(struct msm_vidc_inst* inst) } else if (is_encode_session(inst)) { input_min_count = MIN_ENC_INPUT_BUFFERS; } else { - s_vpr_e(inst->sid, "%s: invalid domain\n", + i_vpr_e(inst, "%s: invalid domain\n", __func__, inst->domain); return 0; } @@ -180,7 +180,7 @@ u32 msm_vidc_decoder_input_size(struct msm_vidc_inst *inst) inst->capabilities->cap[BITSTREAM_SIZE_OVERWRITE].value; if (bitstream_size_overwrite) { frame_size = bitstream_size_overwrite; - s_vpr_h(inst->sid, "client configured bitstream buffer size %d\n", + i_vpr_h(inst, "client configured bitstream buffer size %d\n", frame_size); return frame_size; } @@ -223,7 +223,7 @@ u32 msm_vidc_decoder_input_size(struct msm_vidc_inst *inst) f->fmt.pix_mp.pixelformat == V4L2_PIX_FMT_HEVC) frame_size = frame_size + (frame_size >> 2); - s_vpr_h(inst->sid, "set input buffer size to %d\n", frame_size); + i_vpr_h(inst, "set input buffer size to %d\n", frame_size); return ALIGN(frame_size, SZ_4K); } diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 2827b261bd..ca32ef0ac3 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -89,7 +89,7 @@ static u32 msm_vidc_get_port_info(struct msm_vidc_inst *inst, if (capability->cap[cap_id].flags & CAP_FLAG_INPUT_PORT && capability->cap[cap_id].flags & CAP_FLAG_OUTPUT_PORT) { - s_vpr_e(inst->sid, + i_vpr_e(inst, "%s: both ports enabled. Default port set: BITSTREAM\n", __func__); return HFI_PORT_BITSTREAM; @@ -113,13 +113,13 @@ static const char * const * msm_vidc_get_qmenu_type( case V4L2_CID_MPEG_VIDC_VIDEO_BLUR_TYPES: return mpeg_video_blur_types; default: - s_vpr_e(inst->sid, "%s: No available qmenu for ctrl %#x\n", + i_vpr_e(inst, "%s: No available qmenu for ctrl %#x\n", __func__, control_id); return NULL; } } -static const char *msm_vidc_get_priv_ctrl_name(u32 sid, u32 control_id) +static const char *msm_vidc_get_priv_ctrl_name(struct msm_vidc_inst *inst, u32 control_id) { switch (control_id) { case V4L2_CID_MPEG_VIDC_SECURE: @@ -205,7 +205,7 @@ static const char *msm_vidc_get_priv_ctrl_name(u32 sid, u32 control_id) case V4L2_CID_MPEG_VIDC_HEVC_P_FRAME_MAX_QP: return "HEVC P Frame Max QP"; default: - s_vpr_e(sid, "%s: ctrl name not available for ctrl id %#x\n", + i_vpr_e(inst, "%s: ctrl name not available for ctrl id %#x\n", __func__, control_id); return NULL; } @@ -217,7 +217,7 @@ static int msm_vidc_packetize_control(struct msm_vidc_inst *inst, { int rc = 0; - s_vpr_l(inst->sid, + i_vpr_l(inst, "%s: hfi_id: %#x, value: %#x\n", func, inst->capabilities->cap[cap_id].hfi_id, *(s64 *)hfi_val); @@ -230,7 +230,7 @@ static int msm_vidc_packetize_control(struct msm_vidc_inst *inst, hfi_val, sizeof(payload_size)); if (rc) - s_vpr_e(inst->sid, + i_vpr_e(inst, "%s: failed to set cap_id: %d to fw\n", __func__, cap_id); @@ -266,7 +266,7 @@ static int msm_vidc_add_capid_to_list(struct msm_vidc_inst *inst, if (type & FW_LIST) { list_for_each_entry(curr_node, &inst->firmware.list, list) { if (curr_node->cap_id == cap_id) { - s_vpr_e(inst->sid, + i_vpr_e(inst, "%s: cap %d cannot be the child of two parents\n", __func__, cap_id); return 0; @@ -276,7 +276,7 @@ static int msm_vidc_add_capid_to_list(struct msm_vidc_inst *inst, entry = kzalloc(sizeof(*entry), GFP_ATOMIC); if (!entry) { - s_vpr_e(inst->sid, "%s: alloc failed\n", __func__); + i_vpr_e(inst, "%s: alloc failed\n", __func__); return -ENOMEM; } entry->cap_id = cap_id; @@ -328,7 +328,7 @@ static int msm_vidc_update_cap_value(struct msm_vidc_inst* inst, u32 cap, s32 adjusted_val, const char *func) { if (inst->capabilities->cap[cap].value != adjusted_val) - s_vpr_h(inst->sid, + i_vpr_h(inst, "%s: updated database value from %#x to %#x\n", func, inst->capabilities->cap[cap].value, adjusted_val); @@ -349,7 +349,7 @@ static int msm_vidc_get_parent_value(struct msm_vidc_inst* inst, else *value = inst->capabilities->cap[parent].value; } else { - s_vpr_e(inst->sid, + i_vpr_e(inst, "%s: missing parent %d for cap %d, please correct database\n", func, parent, cap); rc = -EINVAL; @@ -367,7 +367,7 @@ static int msm_vidc_adjust_hevc_qp(struct msm_vidc_inst *inst, capability = inst->capabilities; if (inst->codec != MSM_VIDC_HEVC) { - s_vpr_e(inst->sid, + i_vpr_e(inst, "%s: incorrect entry in database for cap %d. fix the database\n", __func__, cap_id); return -EINVAL; @@ -449,7 +449,7 @@ static int msm_vidc_adjust_dynamic_property(struct msm_vidc_inst *inst, * adjustment is allowed for its children. */ if (!(capability->cap[cap_id].flags & CAP_FLAG_DYNAMIC_ALLOWED)) { - s_vpr_e(inst->sid, + i_vpr_e(inst, "%s: dynamic setting of cap_id %d is not allowed\n", __func__, cap_id); msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); @@ -461,7 +461,7 @@ static int msm_vidc_adjust_dynamic_property(struct msm_vidc_inst *inst, * must have an adjust function defined */ if (!ctrl && !capability->cap[cap_id].adjust) { - s_vpr_e(inst->sid, + i_vpr_e(inst, "%s: child cap %d must have ajdust function\n", __func__, capability->cap[cap_id].cap); return -EINVAL; @@ -500,7 +500,7 @@ int msm_vidc_ctrl_deinit(struct msm_vidc_inst *inst) d_vpr_e("%s: invalid parameters\n", __func__); return -EINVAL; } - s_vpr_h(inst->sid, "%s(): num ctrls %d\n", __func__, inst->num_ctrls); + i_vpr_h(inst, "%s(): num ctrls %d\n", __func__, inst->num_ctrls); v4l2_ctrl_handler_free(&inst->ctrl_handler); kfree(inst->ctrls); @@ -524,7 +524,7 @@ int msm_vidc_ctrl_init(struct msm_vidc_inst *inst) capability = inst->capabilities; if (!core->v4l2_ctrl_ops) { - s_vpr_e(inst->sid, "%s: no control ops\n", __func__); + i_vpr_e(inst, "%s: no control ops\n", __func__); return -EINVAL; } @@ -533,20 +533,20 @@ int msm_vidc_ctrl_init(struct msm_vidc_inst *inst) num_ctrls++; } if (!num_ctrls) { - s_vpr_e(inst->sid, "%s: no ctrls available in cap database\n", + i_vpr_e(inst, "%s: no ctrls available in cap database\n", __func__); return -EINVAL; } inst->ctrls = kcalloc(num_ctrls, sizeof(struct v4l2_ctrl *), GFP_KERNEL); if (!inst->ctrls) { - s_vpr_e(inst->sid, "%s: failed to allocate ctrl\n", __func__); + i_vpr_e(inst, "%s: failed to allocate ctrl\n", __func__); return -ENOMEM; } rc = v4l2_ctrl_handler_init(&inst->ctrl_handler, num_ctrls); if (rc) { - s_vpr_e(inst->sid, "control handler init failed, %d\n", + i_vpr_e(inst, "control handler init failed, %d\n", inst->ctrl_handler.error); return rc; } @@ -558,13 +558,13 @@ int msm_vidc_ctrl_init(struct msm_vidc_inst *inst) continue; if (ctrl_idx >= num_ctrls) { - s_vpr_e(inst->sid, + i_vpr_e(inst, "%s: invalid ctrl %#x, max allowed %d\n", __func__, capability->cap[idx].v4l2_id, num_ctrls); return -EINVAL; } - s_vpr_h(inst->sid, + i_vpr_h(inst, "%s: cap idx %d, value %d min %d max %d step_or_mask %#x flags %#x v4l2_id %#x hfi_id %#x\n", __func__, idx, capability->cap[idx].value, @@ -598,10 +598,10 @@ int msm_vidc_ctrl_init(struct msm_vidc_inst *inst) ctrl_cfg.step = capability->cap[idx].step_or_mask; } - ctrl_cfg.name = msm_vidc_get_priv_ctrl_name(inst->sid, + ctrl_cfg.name = msm_vidc_get_priv_ctrl_name(inst, capability->cap[idx].v4l2_id); if (!ctrl_cfg.name) { - s_vpr_e(inst->sid, "%s: %#x ctrl name is null\n", + i_vpr_e(inst, "%s: %#x ctrl name is null\n", __func__, ctrl_cfg.id); return -EINVAL; } @@ -627,14 +627,14 @@ int msm_vidc_ctrl_init(struct msm_vidc_inst *inst) } } if (!ctrl) { - s_vpr_e(inst->sid, "%s: invalid ctrl %#x\n", __func__, + i_vpr_e(inst, "%s: invalid ctrl %#x\n", __func__, capability->cap[idx].v4l2_id); return -EINVAL; } rc = inst->ctrl_handler.error; if (rc) { - s_vpr_e(inst->sid, + i_vpr_e(inst, "error adding ctrl (%#x) to ctrl handle, %d\n", capability->cap[idx].v4l2_id, inst->ctrl_handler.error); @@ -650,7 +650,7 @@ int msm_vidc_ctrl_init(struct msm_vidc_inst *inst) ctrl_idx++; } inst->num_ctrls = num_ctrls; - s_vpr_h(inst->sid, "%s(): num ctrls %d\n", __func__, inst->num_ctrls); + i_vpr_h(inst, "%s(): num ctrls %d\n", __func__, inst->num_ctrls); return rc; } @@ -677,19 +677,19 @@ int msm_v4l2_op_s_ctrl(struct v4l2_ctrl *ctrl) } if (inst->state == MSM_VIDC_ERROR) { - s_vpr_e(inst->sid, "%s: set ctrl not allowed in error state\n"); + i_vpr_e(inst, "%s: set ctrl not allowed in error state\n"); /* (error name TBD); */ return -EINVAL; } capability = inst->capabilities; - s_vpr_h(inst->sid, "%s: state %d, name %s, id 0x%x value %d\n", + i_vpr_h(inst, "%s: state %d, name %s, id 0x%x value %d\n", __func__, inst->state, ctrl->name, ctrl->id, ctrl->val); cap_id = msm_vidc_get_cap_id(inst, ctrl->id); if (cap_id == INST_CAP_NONE) { - s_vpr_e(inst->sid, "%s: could not find cap_id for ctrl %s\n", + i_vpr_e(inst, "%s: could not find cap_id for ctrl %s\n", __func__, ctrl->name); return -EINVAL; } @@ -708,7 +708,7 @@ int msm_v4l2_op_s_ctrl(struct v4l2_ctrl *ctrl) /* check if dynamic adjustment is allowed */ if (inst->vb2q[OUTPUT_PORT].streaming && !(capability->cap[cap_id].flags & CAP_FLAG_DYNAMIC_ALLOWED)) { - s_vpr_e(inst->sid, + i_vpr_e(inst, "%s: dynamic setting of cap_id %d is not allowed\n", __func__, cap_id); return -EBUSY; @@ -736,7 +736,7 @@ int msm_v4l2_op_s_ctrl(struct v4l2_ctrl *ctrl) /* Dynamic set control ASAP */ rc = msm_vidc_set_v4l2_properties(inst); if (rc) { - s_vpr_e(inst->sid, "%s: setting %s failed\n", + i_vpr_e(inst, "%s: setting %s failed\n", __func__, ctrl->name); goto exit; } @@ -763,7 +763,7 @@ int msm_vidc_adjust_entropy_mode(void *instance, struct v4l2_ctrl *ctrl) capability->cap[ENTROPY_MODE].value; if (inst->codec != MSM_VIDC_H264) { - s_vpr_e(inst->sid, + i_vpr_e(inst, "%s: incorrect entry in database. fix the database\n", __func__); return 0; @@ -826,7 +826,7 @@ int msm_vidc_adjust_bitrate_mode(void *instance, struct v4l2_ctrl *ctrl) update: inst->hfi_rc_type = hfi_value; - s_vpr_h(inst->sid, "%s: hfi rc type: %#x\n", + i_vpr_h(inst, "%s: hfi rc type: %#x\n", __func__, inst->hfi_rc_type); return 0; @@ -925,7 +925,7 @@ int msm_vidc_adjust_use_ltr(void *instance, struct v4l2_ctrl *ctrl) } else if (adjusted_value <= 0 || adjusted_value >= (1 << ltr_count)) { /* USE_LTR value should be > 0 and < (2 ^ LTR_COUNT) */ - s_vpr_e(inst->sid, "%s: invalid value %d\n", + i_vpr_e(inst, "%s: invalid value %d\n", __func__, adjusted_value); return -EINVAL; } @@ -961,7 +961,7 @@ int msm_vidc_adjust_mark_ltr(void *instance, struct v4l2_ctrl *ctrl) } else if (adjusted_value < 0 || adjusted_value > (ltr_count - 1)) { /* MARK_LTR value should be > 0 and <= (LTR_COUNT - 1) */ - s_vpr_e(inst->sid, "%s: invalid value %d\n", + i_vpr_e(inst, "%s: invalid value %d\n", __func__, adjusted_value); return -EINVAL; } @@ -1048,7 +1048,7 @@ int msm_vidc_adjust_transform_8x8(void *instance, struct v4l2_ctrl *ctrl) capability->cap[TRANSFORM_8X8].value; if (inst->codec != MSM_VIDC_H264) { - s_vpr_e(inst->sid, + i_vpr_e(inst, "%s: incorrect entry in database. fix the database\n", __func__); return 0; @@ -1569,7 +1569,7 @@ int msm_vidc_set_array(void *instance, * STRUCTURE, BLOB, STRING, PACKED, ARRAY, * case BITRATE_MODE: - s_vpr_h(inst->sid, "%s: %d\n", __func__, hfi_value); + i_vpr_h(inst, "%s: %d\n", __func__, hfi_value); hfi_create_packet(inst->packet, inst->packet_size, offset, capability->cap[cap_id].hfi_id, @@ -1580,7 +1580,7 @@ int msm_vidc_set_array(void *instance, } */ default: - s_vpr_e(inst->sid, + i_vpr_e(inst, "%s: Unknown cap id %d, cannot set to fw\n", __func__, cap_id); rc = -EINVAL; @@ -1643,14 +1643,14 @@ int msm_vidc_v4l2_menu_to_hfi(struct msm_vidc_inst *inst, } return 0; default: - s_vpr_e(inst->sid, + i_vpr_e(inst, "%s: mapping not specified for ctrl_id: %#x\n", __func__, capability->cap[cap_id].v4l2_id); return -EINVAL; } set_default: - s_vpr_e(inst->sid, + i_vpr_e(inst, "%s: invalid value %d for ctrl id: %#x. Set default: %u\n", __func__, capability->cap[cap_id].value, capability->cap[cap_id].v4l2_id, *value); @@ -1741,14 +1741,14 @@ int msm_vidc_v4l2_to_hfi_enum(struct msm_vidc_inst *inst, } return 0; default: - s_vpr_e(inst->sid, + i_vpr_e(inst, "%s: mapping not specified for ctrl_id: %#x\n", __func__, capability->cap[cap_id].v4l2_id); return -EINVAL; } set_default: - s_vpr_e(inst->sid, + i_vpr_e(inst, "%s: invalid value %d for ctrl id: %#x. Set default: %u\n", __func__, capability->cap[cap_id].value, capability->cap[cap_id].v4l2_id, *value); diff --git a/driver/vidc/src/msm_vidc_debug.c b/driver/vidc/src/msm_vidc_debug.c index 04223328eb..fd1a401c9b 100644 --- a/driver/vidc/src/msm_vidc_debug.c +++ b/driver/vidc/src/msm_vidc_debug.c @@ -44,6 +44,43 @@ const char *level_str(u32 level) return "????"; } +const char *codec_str(void *instance) +{ + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + goto err_invalid_inst; + } + + if (inst->codec == MSM_VIDC_H264) + return "h264 "; + else if (inst->codec == MSM_VIDC_HEVC) + return "hevc "; + else if (inst->codec == MSM_VIDC_VP9) + return "vp9 "; + else + return "?????"; + +err_invalid_inst: + return "null "; +} + +u32 get_sid(void *instance) +{ + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + goto err_invalid_inst; + } + + return inst->sid; + +err_invalid_inst: + return 0; +} + #define MAX_DBG_BUF_SIZE 4096 struct core_inst_pair { @@ -356,7 +393,7 @@ static ssize_t inst_info_read(struct file *file, char __user *buf, dbuf = kzalloc(MAX_DBG_BUF_SIZE, GFP_KERNEL); if (!dbuf) { - s_vpr_e(inst->sid, "%s: Allocation failed!\n", __func__); + i_vpr_e(inst, "%s: Allocation failed!\n", __func__); len = -ENOMEM; goto failed_alloc; } @@ -446,7 +483,7 @@ struct dentry *msm_vidc_debugfs_init_inst(void *instance, struct dentry *parent) idata = kzalloc(sizeof(struct core_inst_pair), GFP_KERNEL); if (!idata) { - s_vpr_e(inst->sid, "%s: Allocation failed!\n", __func__); + i_vpr_e(inst, "%s: Allocation failed!\n", __func__); goto exit; } @@ -456,7 +493,7 @@ struct dentry *msm_vidc_debugfs_init_inst(void *instance, struct dentry *parent) dir = debugfs_create_dir(debugfs_name, parent); if (IS_ERR_OR_NULL(dir)) { dir = NULL; - s_vpr_e(inst->sid, + i_vpr_e(inst, "%s: Failed to create debugfs for msm_vidc\n", __func__); goto failed_create_dir; @@ -465,7 +502,7 @@ struct dentry *msm_vidc_debugfs_init_inst(void *instance, struct dentry *parent) info = debugfs_create_file("info", 0444, dir, idata, &inst_info_fops); if (IS_ERR_OR_NULL(info)) { - s_vpr_e(inst->sid, "%s: debugfs_create_file: fail\n", + i_vpr_e(inst, "%s: debugfs_create_file: fail\n", __func__); goto failed_create_file; } @@ -493,7 +530,7 @@ void msm_vidc_debugfs_deinit_inst(void *instance) dentry = inst->debugfs_root; if (dentry->d_inode) { - s_vpr_l(inst->sid, "%s: Destroy %pK\n", + i_vpr_l(inst, "%s: Destroy %pK\n", __func__, dentry->d_inode->i_private); kfree(dentry->d_inode->i_private); dentry->d_inode->i_private = NULL; @@ -529,10 +566,10 @@ void msm_vidc_debugfs_update(void *instance, if (inst->debug_count.ebd && inst->debug_count.ebd == inst->debug_count.etb) { toc(inst, FRAME_PROCESSING); - s_vpr_p(inst->sid, "EBD: FW needs input buffers\n"); + i_vpr_p(inst, "EBD: FW needs input buffers\n"); } if (inst->debug_count.ftb == inst->debug_count.fbd) - s_vpr_p(inst->sid, "EBD: FW needs output buffers\n"); + i_vpr_p(inst, "EBD: FW needs output buffers\n"); break; case MSM_VIDC_DEBUGFS_EVENT_FTB: inst->debug_count.ftb++; @@ -548,13 +585,13 @@ void msm_vidc_debugfs_update(void *instance, if (inst->debug_count.fbd && inst->debug_count.fbd == inst->debug_count.ftb) { toc(inst, FRAME_PROCESSING); - s_vpr_p(inst->sid, "FBD: FW needs output buffers\n"); + i_vpr_p(inst, "FBD: FW needs output buffers\n"); } if (inst->debug_count.etb == inst->debug_count.ebd) - s_vpr_p(inst->sid, "FBD: FW needs input buffers\n"); + i_vpr_p(inst, "FBD: FW needs input buffers\n"); break; default: - s_vpr_e(inst->sid, "invalid event in debugfs: %d\n", e); + i_vpr_e(inst, "invalid event in debugfs: %d\n", e); break; } } diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index a218dc8ae1..fa356baff1 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -58,7 +58,7 @@ void print_vb2_buffer(const char *str, struct msm_vidc_inst *inst, if (!inst || !vb2) return; - s_vpr_e(inst->sid, + i_vpr_e(inst, "%s: %s: idx %2d fd %d off %d size %d filled %d\n", str, vb2->type == INPUT_MPLANE ? "INPUT" : "OUTPUT", vb2->index, vb2->planes[0].m.fd, @@ -258,7 +258,7 @@ int v4l2_type_to_driver_port(struct msm_vidc_inst *inst, u32 type, } else if (type == OUTPUT_META_PLANE) { port = OUTPUT_META_PORT; } else { - s_vpr_e(inst->sid, "%s: port not found for v4l2 type %d\n", + i_vpr_e(inst, "%s: port not found for v4l2 type %d\n", func, type); port = -EINVAL; } @@ -310,7 +310,7 @@ u32 msm_vidc_get_buffer_region(struct msm_vidc_inst *inst, region = MSM_VIDC_SECURE_NONPIXEL; break; default: - s_vpr_e(inst->sid, "%s: invalid driver buffer type %d\n", + i_vpr_e(inst, "%s: invalid driver buffer type %d\n", func, buffer_type); } return region; @@ -346,7 +346,7 @@ struct msm_vidc_buffers *msm_vidc_get_buffers( case MSM_VIDC_BUF_VPSS: return &inst->buffers.vpss; default: - s_vpr_e(inst->sid, "%s: invalid driver buffer type %d\n", + i_vpr_e(inst, "%s: invalid driver buffer type %d\n", func, buffer_type); return NULL; } @@ -382,7 +382,7 @@ struct msm_vidc_mappings *msm_vidc_get_mappings( case MSM_VIDC_BUF_VPSS: return &inst->mappings.vpss; default: - s_vpr_e(inst->sid, "%s: invalid driver buffer type %d\n", + i_vpr_e(inst, "%s: invalid driver buffer type %d\n", func, buffer_type); return NULL; } @@ -410,7 +410,7 @@ struct msm_vidc_allocations *msm_vidc_get_allocations( case MSM_VIDC_BUF_VPSS: return &inst->allocations.vpss; default: - s_vpr_e(inst->sid, "%s: invalid driver buffer type %d\n", + i_vpr_e(inst, "%s: invalid driver buffer type %d\n", func, buffer_type); return NULL; } @@ -508,18 +508,18 @@ int msm_vidc_change_inst_state(struct msm_vidc_inst *inst, } if (!request_state) { - s_vpr_e(inst->sid, "%s: invalid request state\n", func); + i_vpr_e(inst, "%s: invalid request state\n", func); return -EINVAL; } if (inst->state == MSM_VIDC_ERROR) { - s_vpr_h(inst->sid, + i_vpr_h(inst, "%s: inst is in bad state, can not change state to %s\n", func, state_name(request_state)); return 0; } - s_vpr_h(inst->sid, "%s: state changed from %s to %s\n", + i_vpr_h(inst, "%s: state changed from %s to %s\n", func, state_name(inst->state), state_name(request_state)); inst->state = request_state; return 0; @@ -552,7 +552,7 @@ bool msm_vidc_allow_s_fmt(struct msm_vidc_inst *inst, u32 type) exit: if (!allow) - s_vpr_e(inst->sid, "%s: type %d not allowed in state %s\n", + i_vpr_e(inst, "%s: type %d not allowed in state %s\n", __func__, type, state_name(inst->state)); return allow; } @@ -617,7 +617,7 @@ bool msm_vidc_allow_s_ctrl(struct msm_vidc_inst *inst, u32 id) exit: if (!allow) - s_vpr_e(inst->sid, "%s: id %d not allowed in state %s\n", + i_vpr_e(inst, "%s: id %d not allowed in state %s\n", __func__, id, state_name(inst->state)); return allow; } @@ -649,7 +649,7 @@ bool msm_vidc_allow_reqbufs(struct msm_vidc_inst *inst, u32 type) exit: if (!allow) - s_vpr_e(inst->sid, "%s: type %d not allowed in state %s\n", + i_vpr_e(inst, "%s: type %d not allowed in state %s\n", __func__, type, state_name(inst->state)); return allow; } @@ -669,10 +669,10 @@ enum msm_vidc_allow msm_vidc_allow_stop(struct msm_vidc_inst *inst) allow = MSM_VIDC_ALLOW; } else if (inst->state == MSM_VIDC_START_INPUT) { allow = MSM_VIDC_IGNORE; - s_vpr_e(inst->sid, "%s: stop ignored in state %s\n", + i_vpr_e(inst, "%s: stop ignored in state %s\n", __func__, state_name(inst->state)); } else { - s_vpr_e(inst->sid, "%s: stop not allowed in state %s\n", + i_vpr_e(inst, "%s: stop not allowed in state %s\n", __func__, state_name(inst->state)); } @@ -690,7 +690,7 @@ bool msm_vidc_allow_start(struct msm_vidc_inst *inst) inst->state == MSM_VIDC_DRC_DRAIN_LAST_FLAG) return true; - s_vpr_e(inst->sid, "%s: not allowed in state %s\n", + i_vpr_e(inst, "%s: not allowed in state %s\n", __func__, state_name(inst->state)); return false; } @@ -712,7 +712,7 @@ bool msm_vidc_allow_streamon(struct msm_vidc_inst *inst, u32 type) return true; } - s_vpr_e(inst->sid, "%s: type %d not allowed in state %s\n", + i_vpr_e(inst, "%s: type %d not allowed in state %s\n", __func__, type, state_name(inst->state)); return false; } @@ -741,7 +741,7 @@ bool msm_vidc_allow_streamoff(struct msm_vidc_inst *inst, u32 type) allow = false; } if (!allow) - s_vpr_e(inst->sid, "%s: type %d not allowed in state %s\n", + i_vpr_e(inst, "%s: type %d not allowed in state %s\n", __func__, type, state_name(inst->state)); return allow; @@ -754,7 +754,7 @@ bool msm_vidc_allow_qbuf(struct msm_vidc_inst *inst) return false; } if (inst->state == MSM_VIDC_ERROR) { - s_vpr_e(inst->sid, "%s: inst in error state\n", __func__); + i_vpr_e(inst, "%s: inst in error state\n", __func__); return false; } else { return true; @@ -778,11 +778,11 @@ enum msm_vidc_allow msm_vidc_allow_input_psc(struct msm_vidc_inst *inst) inst->state == MSM_VIDC_DRC_DRAIN || inst->state == MSM_VIDC_DRC_DRAIN_LAST_FLAG || inst->state == MSM_VIDC_DRAIN_START_INPUT) { - s_vpr_h(inst->sid, "%s: defer input psc, inst state %s\n", + i_vpr_h(inst, "%s: defer input psc, inst state %s\n", __func__, state_name(inst->state)); allow = MSM_VIDC_DEFER; } else { - s_vpr_e(inst->sid, "%s: input psc in wrong state %s\n", + i_vpr_e(inst, "%s: input psc in wrong state %s\n", __func__, state_name(inst->state)); allow = MSM_VIDC_DISALLOW; } @@ -801,7 +801,7 @@ bool msm_vidc_allow_last_flag(struct msm_vidc_inst *inst) inst->state == MSM_VIDC_DRC_DRAIN) return true; - s_vpr_e(inst->sid, "%s: not allowed in state %s\n", + i_vpr_e(inst, "%s: not allowed in state %s\n", __func__, state_name(inst->state)); return false; } @@ -831,7 +831,7 @@ int msm_vidc_state_change_streamon(struct msm_vidc_inst *inst, u32 type) } else if (inst->state == MSM_VIDC_START_INPUT) { new_state = MSM_VIDC_START; } else if (inst->state == MSM_VIDC_DRAIN_START_INPUT) { - s_vpr_h(inst->sid, + i_vpr_h(inst, "%s: streamon(output) in DRAIN_START_INPUT state\n", __func__); new_state = MSM_VIDC_DRAIN; @@ -839,12 +839,12 @@ int msm_vidc_state_change_streamon(struct msm_vidc_inst *inst, u32 type) resp_work = list_first_entry(&inst->response_works, struct response_work, list); if (resp_work->type == RESP_WORK_INPUT_PSC) { - s_vpr_h(inst->sid, + i_vpr_h(inst, "%s: streamon(output) in DRAIN_START_INPUT state, input psc pending\n", __func__); rc = handle_session_response_work(inst, resp_work); if (rc) { - s_vpr_e(inst->sid, + i_vpr_e(inst, "%s: handle input psc failed\n", __func__); new_state = MSM_VIDC_ERROR; } else { @@ -895,7 +895,7 @@ int msm_vidc_state_change_streamoff(struct msm_vidc_inst *inst, u32 type) list_for_each_entry_safe(resp_work, dummy, &inst->response_works, list) { if (resp_work->type == RESP_WORK_INPUT_PSC) { - s_vpr_h(inst->sid, + i_vpr_h(inst, "%s: discard pending input psc\n", __func__); list_del(&resp_work->list); kfree(resp_work->data); @@ -943,7 +943,7 @@ int msm_vidc_state_change_stop(struct msm_vidc_inst *inst) inst->state == MSM_VIDC_DRC_LAST_FLAG) { new_state = MSM_VIDC_DRC_DRAIN_LAST_FLAG; } else { - s_vpr_e(inst->sid, "%s: wrong state %s\n", + i_vpr_e(inst, "%s: wrong state %s\n", __func__, state_name(inst->state)); msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); return -EINVAL; @@ -973,12 +973,12 @@ int msm_vidc_state_change_start(struct msm_vidc_inst *inst) resp_work = list_first_entry(&inst->response_works, struct response_work, list); if (resp_work->type == RESP_WORK_INPUT_PSC) { - s_vpr_h(inst->sid, + i_vpr_h(inst, "%s: start in DRC(DRAIN)_LAST_FLAG state, input psc pending\n", __func__); rc = handle_session_response_work(inst, resp_work); if (rc) { - s_vpr_e(inst->sid, + i_vpr_e(inst, "%s: handle input psc failed\n", __func__); new_state = MSM_VIDC_ERROR; } else { @@ -995,11 +995,11 @@ int msm_vidc_state_change_start(struct msm_vidc_inst *inst) resp_work = list_first_entry(&inst->response_works, struct response_work, list); if (resp_work->type == RESP_WORK_INPUT_PSC) { - s_vpr_h(inst->sid, + i_vpr_h(inst, "%s: start in DRC_DRAIN_LAST_FLAG state, input psc pending\n"); rc = handle_session_response_work(inst, resp_work); if (rc) { - s_vpr_e(inst->sid, + i_vpr_e(inst, "%s: handle input psc failed\n", __func__); new_state = MSM_VIDC_ERROR; } else { @@ -1011,7 +1011,7 @@ int msm_vidc_state_change_start(struct msm_vidc_inst *inst) } } } else { - s_vpr_e(inst->sid, "%s: wrong state %s\n", + i_vpr_e(inst, "%s: wrong state %s\n", __func__, state_name(inst->state)); msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); return -EINVAL; @@ -1041,7 +1041,7 @@ int msm_vidc_state_change_input_psc(struct msm_vidc_inst *inst) } else if (inst->state == MSM_VIDC_DRAIN) { new_state = MSM_VIDC_DRC_DRAIN; } else { - s_vpr_e(inst->sid, "%s: wrong state %s\n", + i_vpr_e(inst, "%s: wrong state %s\n", __func__, state_name(inst->state)); msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); return -EINVAL; @@ -1069,7 +1069,7 @@ int msm_vidc_state_change_last_flag(struct msm_vidc_inst *inst) } else if (inst->state == MSM_VIDC_DRC_DRAIN) { new_state = MSM_VIDC_DRC_DRAIN_LAST_FLAG; } else { - s_vpr_e(inst->sid, "%s: wrong state %s\n", + i_vpr_e(inst, "%s: wrong state %s\n", __func__, state_name(inst->state)); msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); return -EINVAL; @@ -1094,12 +1094,12 @@ int msm_vidc_get_control(struct msm_vidc_inst *inst, struct v4l2_ctrl *ctrl) case V4L2_CID_MIN_BUFFERS_FOR_CAPTURE: ctrl->val = inst->buffers.output.min_count + inst->buffers.output.extra_count; - s_vpr_h(inst->sid, "g_min: output buffers %d\n", ctrl->val); + i_vpr_h(inst, "g_min: output buffers %d\n", ctrl->val); break; case V4L2_CID_MIN_BUFFERS_FOR_OUTPUT: ctrl->val = inst->buffers.input.min_count + inst->buffers.input.extra_count; - s_vpr_h(inst->sid, "g_min: input buffers %d\n", ctrl->val); + i_vpr_h(inst, "g_min: input buffers %d\n", ctrl->val); break; default: break; @@ -1162,7 +1162,7 @@ int msm_vidc_num_buffers(struct msm_vidc_inst *inst, } else if (type == MSM_VIDC_BUF_INPUT) { buffers = &inst->buffers.input; } else { - s_vpr_e(inst->sid, "%s: invalid buffer type %#x\n", + i_vpr_e(inst, "%s: invalid buffer type %#x\n", __func__, type); return count; } @@ -1305,7 +1305,7 @@ int msm_vidc_map_driver_buf(struct msm_vidc_inst *inst, } map = kzalloc(sizeof(struct msm_vidc_map), GFP_KERNEL); if (!map) { - s_vpr_e(inst->sid, "%s: alloc failed\n", __func__); + i_vpr_e(inst, "%s: alloc failed\n", __func__); return -ENOMEM; } INIT_LIST_HEAD(&map->list); @@ -1379,7 +1379,7 @@ struct msm_vidc_buffer *msm_vidc_get_driver_buf(struct msm_vidc_inst *inst, } else { buf = kzalloc(sizeof(struct msm_vidc_buffer), GFP_KERNEL); if (!buf) { - s_vpr_e(inst->sid, "%s: alloc failed\n", __func__); + i_vpr_e(inst, "%s: alloc failed\n", __func__); goto error; } INIT_LIST_HEAD(&buf->list); @@ -1422,7 +1422,7 @@ struct msm_vidc_buffer *get_meta_buffer(struct msm_vidc_inst *inst, } else if (buf->type == MSM_VIDC_BUF_OUTPUT) { buffers = &inst->buffers.output_meta; } else { - s_vpr_e(inst->sid, "%s: invalid buffer type %d\n", + i_vpr_e(inst, "%s: invalid buffer type %d\n", __func__, buf->type); return NULL; } @@ -1529,12 +1529,12 @@ int msm_vidc_destroy_internal_buffer(struct msm_vidc_inst *inst, } if (!is_internal_buffer(buffer->type)) { - s_vpr_e(inst->sid, "%s: buffer type %#x is not internal\n", + i_vpr_e(inst, "%s: buffer type %#x is not internal\n", __func__, buffer->type); return 0; } - s_vpr_h(inst->sid, + i_vpr_h(inst, "%s: destroy buffer_type %#x, size %d device_addr %#x\n", __func__, buffer->type, buffer->buffer_size, buffer->device_addr); @@ -1626,7 +1626,7 @@ int msm_vidc_create_internal_buffer(struct msm_vidc_inst *inst, return -EINVAL; } if (!is_internal_buffer(buffer_type)) { - s_vpr_e(inst->sid, "%s: buffer type %#x is not internal\n", + i_vpr_e(inst, "%s: buffer type %#x is not internal\n", __func__, buffer_type); return 0; } @@ -1642,13 +1642,13 @@ int msm_vidc_create_internal_buffer(struct msm_vidc_inst *inst, return -EINVAL; if (!buffers->size) { - s_vpr_e(inst->sid, "%s: invalid buffer %#x\n", + i_vpr_e(inst, "%s: invalid buffer %#x\n", __func__, buffer_type); return -EINVAL; } buffer = kzalloc(sizeof(struct msm_vidc_buffer), GFP_KERNEL); if (!buffer) { - s_vpr_e(inst->sid, "%s: buf alloc failed\n", __func__); + i_vpr_e(inst, "%s: buf alloc failed\n", __func__); return -ENOMEM; } INIT_LIST_HEAD(&buffer->list); @@ -1660,7 +1660,7 @@ int msm_vidc_create_internal_buffer(struct msm_vidc_inst *inst, alloc = kzalloc(sizeof(struct msm_vidc_alloc), GFP_KERNEL); if (!alloc) { - s_vpr_e(inst->sid, "%s: alloc failed\n", __func__); + i_vpr_e(inst, "%s: alloc failed\n", __func__); return -ENOMEM; } INIT_LIST_HEAD(&alloc->list); @@ -1676,7 +1676,7 @@ int msm_vidc_create_internal_buffer(struct msm_vidc_inst *inst, map = kzalloc(sizeof(struct msm_vidc_map), GFP_KERNEL); if (!map) { - s_vpr_e(inst->sid, "%s: map alloc failed\n", __func__); + i_vpr_e(inst, "%s: map alloc failed\n", __func__); return -ENOMEM; } INIT_LIST_HEAD(&map->list); @@ -1690,7 +1690,7 @@ int msm_vidc_create_internal_buffer(struct msm_vidc_inst *inst, buffer->dmabuf = alloc->dmabuf; buffer->device_addr = map->device_addr; - s_vpr_h(inst->sid, + i_vpr_h(inst, "%s: created buffer_type %#x, size %d device_addr %#x\n", __func__, buffer_type, buffers->size, buffer->device_addr); @@ -1715,7 +1715,7 @@ int msm_vidc_create_internal_buffers(struct msm_vidc_inst *inst, return -EINVAL; if (buffers->reuse) { - s_vpr_l(inst->sid, "%s: reuse enabled for buffer type %#x\n", + i_vpr_l(inst, "%s: reuse enabled for buffer type %#x\n", __func__, buffer_type); return 0; } @@ -1741,7 +1741,7 @@ int msm_vidc_queue_internal_buffers(struct msm_vidc_inst *inst, return -EINVAL; } if (!is_internal_buffer(buffer_type)) { - s_vpr_e(inst->sid, "%s: buffer type %#x is not internal\n", + i_vpr_e(inst, "%s: buffer type %#x is not internal\n", __func__, buffer_type); return 0; } @@ -1751,7 +1751,7 @@ int msm_vidc_queue_internal_buffers(struct msm_vidc_inst *inst, return -EINVAL; if (buffers->reuse) { - s_vpr_l(inst->sid, "%s: reuse enabled for buffer type %#x\n", + i_vpr_l(inst, "%s: reuse enabled for buffer type %#x\n", __func__, buffer_type); return 0; } @@ -1769,7 +1769,7 @@ int msm_vidc_queue_internal_buffers(struct msm_vidc_inst *inst, /* mark queued */ buffer->attr |= MSM_VIDC_ATTR_QUEUED; - s_vpr_h(inst->sid, "%s: queued buffer_type %#x, size %d\n", + i_vpr_h(inst, "%s: queued buffer_type %#x, size %d\n", __func__, buffer_type, buffers->size); } @@ -1788,7 +1788,7 @@ int msm_vidc_alloc_and_queue_session_internal_buffers(struct msm_vidc_inst *inst if (buffer_type != MSM_VIDC_BUF_ARP && buffer_type != MSM_VIDC_BUF_PERSIST) { - s_vpr_e(inst->sid, "%s: invalid buffer type: %d\n", + i_vpr_e(inst, "%s: invalid buffer type: %d\n", __func__, buffer_type); rc = -EINVAL; goto exit; @@ -1822,7 +1822,7 @@ int msm_vidc_release_internal_buffers(struct msm_vidc_inst *inst, return -EINVAL; } if (!is_internal_buffer(buffer_type)) { - s_vpr_e(inst->sid, "%s: buffer type %#x is not internal\n", + i_vpr_e(inst, "%s: buffer type %#x is not internal\n", __func__, buffer_type); return 0; } @@ -1832,7 +1832,7 @@ int msm_vidc_release_internal_buffers(struct msm_vidc_inst *inst, return -EINVAL; if (buffers->reuse) { - s_vpr_l(inst->sid, "%s: reuse enabled for buffer type %#x\n", + i_vpr_l(inst, "%s: reuse enabled for buffer type %#x\n", __func__, buffer_type); return 0; } @@ -1850,7 +1850,7 @@ int msm_vidc_release_internal_buffers(struct msm_vidc_inst *inst, /* mark pending release */ buffer->attr |= MSM_VIDC_ATTR_PENDING_RELEASE; - s_vpr_e(inst->sid, "%s: released buffer_type %#x, size %d\n", + i_vpr_e(inst, "%s: released buffer_type %#x, size %d\n", __func__, buffer_type, buffers->size); } @@ -1879,7 +1879,7 @@ int msm_vidc_vb2_buffer_done(struct msm_vidc_inst *inst, q = &inst->vb2q[port]; if (!q->streaming) { - s_vpr_e(inst->sid, "%s: port %d is not streaming\n", + i_vpr_e(inst, "%s: port %d is not streaming\n", __func__, port); return -EINVAL; } @@ -1968,7 +1968,7 @@ static int vb2q_init(struct msm_vidc_inst *inst, q->copy_timestamp = 1; rc = vb2_queue_init(q); if (rc) - s_vpr_e(inst->sid, "%s: vb2_queue_init failed for type %d\n", + i_vpr_e(inst, "%s: vb2_queue_init failed for type %d\n", __func__, type); return rc; } @@ -2091,7 +2091,7 @@ int msm_vidc_session_open(struct msm_vidc_inst *inst) inst->packet_size = 4096; inst->packet = kzalloc(inst->packet_size, GFP_KERNEL); if (!inst->packet) { - s_vpr_e(inst->sid, "%s(): inst packet allocation failed\n", __func__); + i_vpr_e(inst, "%s(): inst packet allocation failed\n", __func__); return -ENOMEM; } @@ -2101,7 +2101,7 @@ int msm_vidc_session_open(struct msm_vidc_inst *inst) return 0; error: - s_vpr_e(inst->sid, "%s(): session open failed\n", __func__); + i_vpr_e(inst, "%s(): session open failed\n", __func__); kfree(inst->packet); inst->packet = NULL; return rc; @@ -2163,7 +2163,7 @@ int msm_vidc_session_streamoff(struct msm_vidc_inst *inst, signal_type = SIGNAL_CMD_STOP_OUTPUT; buffer_type = MSM_VIDC_BUF_OUTPUT; } else { - s_vpr_e(inst->sid, "%s: invalid port: %d\n", __func__, port); + i_vpr_e(inst, "%s: invalid port: %d\n", __func__, port); return -EINVAL; } @@ -2172,7 +2172,7 @@ int msm_vidc_session_streamoff(struct msm_vidc_inst *inst, goto error; core = inst->core; - s_vpr_h(inst->sid, "%s: wait on port: %d for time: %d ms\n", + i_vpr_h(inst, "%s: wait on port: %d for time: %d ms\n", __func__, port, core->capabilities[HW_RESPONSE_TIMEOUT].value); mutex_unlock(&inst->lock); rc = wait_for_completion_timeout( @@ -2180,7 +2180,7 @@ int msm_vidc_session_streamoff(struct msm_vidc_inst *inst, msecs_to_jiffies( core->capabilities[HW_RESPONSE_TIMEOUT].value)); if (!rc) { - s_vpr_e(inst->sid, "%s: session stop timed out for port: %d\n", + i_vpr_e(inst, "%s: session stop timed out for port: %d\n", __func__, port); rc = -ETIMEDOUT; msm_vidc_core_timeout(inst->core); @@ -2192,10 +2192,10 @@ int msm_vidc_session_streamoff(struct msm_vidc_inst *inst, /* no more queued buffers after streamoff */ count = msm_vidc_num_buffers(inst, buffer_type, MSM_VIDC_ATTR_QUEUED); if (!count) { - s_vpr_h(inst->sid, "%s: stop successful on port: %d\n", + i_vpr_h(inst, "%s: stop successful on port: %d\n", __func__, port); } else { - s_vpr_e(inst->sid, + i_vpr_e(inst, "%s: %d buffers pending with firmware on port: %d\n", __func__, count, port); rc = -EINVAL; @@ -2224,7 +2224,7 @@ int msm_vidc_session_close(struct msm_vidc_inst *inst) return rc; core = inst->core; - s_vpr_h(inst->sid, "%s: wait on close for time: %d ms\n", + i_vpr_h(inst, "%s: wait on close for time: %d ms\n", __func__, core->capabilities[HW_RESPONSE_TIMEOUT].value); mutex_unlock(&inst->lock); rc = wait_for_completion_timeout( @@ -2232,18 +2232,18 @@ int msm_vidc_session_close(struct msm_vidc_inst *inst) msecs_to_jiffies( core->capabilities[HW_RESPONSE_TIMEOUT].value)); if (!rc) { - s_vpr_e(inst->sid, "%s: session close timed out\n", __func__); + i_vpr_e(inst, "%s: session close timed out\n", __func__); rc = -ETIMEDOUT; msm_vidc_core_timeout(inst->core); } else { rc = 0; - s_vpr_h(inst->sid, "%s: close successful\n", __func__); + i_vpr_h(inst, "%s: close successful\n", __func__); } mutex_lock(&inst->lock); msm_vidc_remove_session(inst); - s_vpr_h(inst->sid, "%s: free session packet data\n", __func__); + i_vpr_h(inst, "%s: free session packet data\n", __func__); kfree(inst->packet); inst->packet = NULL; @@ -2257,11 +2257,11 @@ int msm_vidc_kill_session(struct msm_vidc_inst *inst) return -EINVAL; } if (!inst->session_id) { - s_vpr_e(inst->sid, "%s: already killed\n", __func__); + i_vpr_e(inst, "%s: already killed\n", __func__); return 0; } - s_vpr_e(inst->sid, "%s: killing session\n", __func__); + i_vpr_e(inst, "%s: killing session\n", __func__); msm_vidc_session_close(inst); msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); @@ -2284,7 +2284,7 @@ int msm_vidc_get_inst_capability(struct msm_vidc_inst *inst) for (i = 0; i < core->codecs_count; i++) { if (core->inst_caps[i].domain == inst->domain && core->inst_caps[i].codec == inst->codec) { - s_vpr_h(inst->sid, + i_vpr_h(inst, "%s: copied capabilities with %#x codec, %#x domain\n", __func__, inst->codec, inst->domain); memcpy(inst->capabilities, &core->inst_caps[i], @@ -2292,7 +2292,7 @@ int msm_vidc_get_inst_capability(struct msm_vidc_inst *inst) } } if (!inst->capabilities) { - s_vpr_e(inst->sid, "%s: capabilities not found\n", __func__); + i_vpr_e(inst, "%s: capabilities not found\n", __func__); return -EINVAL; } @@ -2667,7 +2667,7 @@ int msm_vidc_flush_buffers(struct msm_vidc_inst* inst, buffer_type[0] = MSM_VIDC_BUF_OUTPUT_META; buffer_type[1] = MSM_VIDC_BUF_OUTPUT; } else { - s_vpr_h(inst->sid, "%s: invalid buffer type %d\n", + i_vpr_h(inst, "%s: invalid buffer type %d\n", __func__, type); return -EINVAL; } @@ -2720,7 +2720,7 @@ void msm_vidc_destroy_buffers(struct msm_vidc_inst *inst) if (!buffers) continue; list_for_each_entry_safe(buf, dummy, &buffers->list, list) { - s_vpr_h(inst->sid, + i_vpr_h(inst, "destroying buffer: type %d idx %d fd %d addr %#x size %d\n", buf->type, buf->index, buf->fd, buf->device_addr, buf->buffer_size); if (is_internal_buffer(buf->type)) @@ -2736,7 +2736,7 @@ static void msm_vidc_close_helper(struct kref *kref) struct msm_vidc_inst *inst = container_of(kref, struct msm_vidc_inst, kref); - s_vpr_h(inst->sid, "%s()\n", __func__); + i_vpr_h(inst, "%s()\n", __func__); msm_vidc_event_queue_deinit(inst); msm_vidc_vb2_queue_deinit(inst); msm_vidc_debugfs_deinit_inst(inst); diff --git a/driver/vidc/src/msm_vidc_memory.c b/driver/vidc/src/msm_vidc_memory.c index 21128255b0..a4f2b6640f 100644 --- a/driver/vidc/src/msm_vidc_memory.c +++ b/driver/vidc/src/msm_vidc_memory.c @@ -270,21 +270,26 @@ int msm_vidc_memory_free(struct msm_vidc_core *core, struct msm_vidc_alloc *mem) return rc; }; /* -int msm_memory_cache_operations(struct dma_buf *dbuf, - enum smem_cache_ops cache_op, unsigned long offset, - unsigned long size, u32 sid) +int msm_memory_cache_operations(struct msm_vidc_inst *inst, + struct dma_buf *dbuf, enum smem_cache_ops cache_op, + unsigned long offset, unsigned long size, u32 sid) { int rc = 0; unsigned long flags = 0; + if (!inst) { + d_vpr_e("%s: invalid parameters\n", __func__); + return -EINVAL; + } + if (!dbuf) { - s_vpr_e(sid, "%s: invalid params\n", __func__); + i_vpr_e(inst, "%s: invalid params\n", __func__); return -EINVAL; } rc = dma_buf_get_flags(dbuf, &flags); if (rc) { - s_vpr_e(sid, "%s: dma_buf_get_flags failed, err %d\n", + i_vpr_e(inst, "%s: dma_buf_get_flags failed, err %d\n", __func__, rc); return rc; } else if (!(flags & ION_FLAG_CACHED)) { @@ -310,7 +315,7 @@ int msm_memory_cache_operations(struct dma_buf *dbuf, offset, size); break; default: - s_vpr_e(sid, "%s: cache (%d) operation not supported\n", + i_vpr_e(inst, "%s: cache (%d) operation not supported\n", __func__, cache_op); rc = -EINVAL; break; @@ -332,7 +337,7 @@ int msm_smem_memory_prefetch(struct msm_vidc_inst *inst) vidc_regions = &inst->regions; if (vidc_regions->num_regions > MEMORY_REGIONS_MAX) { - s_vpr_e(inst->sid, "%s: invalid num_regions %d, max %d\n", + i_vpr_e(inst, "%s: invalid num_regions %d, max %d\n", __func__, vidc_regions->num_regions, MEMORY_REGIONS_MAX); return -EINVAL; @@ -347,10 +352,10 @@ int msm_smem_memory_prefetch(struct msm_vidc_inst *inst) rc = msm_ion_heap_prefetch(ION_SECURE_HEAP_ID, ion_region, vidc_regions->num_regions); if (rc) - s_vpr_e(inst->sid, "%s: prefetch failed, ret: %d\n", + i_vpr_e(inst, "%s: prefetch failed, ret: %d\n", __func__, rc); else - s_vpr_l(inst->sid, "%s: prefetch succeeded\n", __func__); + i_vpr_l(inst, "%s: prefetch succeeded\n", __func__); return rc; } @@ -368,7 +373,7 @@ int msm_smem_memory_drain(struct msm_vidc_inst *inst) vidc_regions = &inst->regions; if (vidc_regions->num_regions > MEMORY_REGIONS_MAX) { - s_vpr_e(inst->sid, "%s: invalid num_regions %d, max %d\n", + i_vpr_e(inst, "%s: invalid num_regions %d, max %d\n", __func__, vidc_regions->num_regions, MEMORY_REGIONS_MAX); return -EINVAL; @@ -383,9 +388,9 @@ int msm_smem_memory_drain(struct msm_vidc_inst *inst) rc = msm_ion_heap_drain(ION_SECURE_HEAP_ID, ion_region, vidc_regions->num_regions); if (rc) - s_vpr_e(inst->sid, "%s: drain failed, ret: %d\n", __func__, rc); + i_vpr_e(inst, "%s: drain failed, ret: %d\n", __func__, rc); else - s_vpr_l(inst->sid, "%s: drain succeeded\n", __func__); + i_vpr_l(inst, "%s: drain succeeded\n", __func__); return rc; } diff --git a/driver/vidc/src/msm_vidc_power.c b/driver/vidc/src/msm_vidc_power.c index ce377b7b7b..cccf6ad2e0 100644 --- a/driver/vidc/src/msm_vidc_power.c +++ b/driver/vidc/src/msm_vidc_power.c @@ -31,13 +31,13 @@ u64 msm_vidc_max_freq(struct msm_vidc_inst *inst) } core = inst->core; if (!core->dt || !core->dt->allowed_clks_tbl) { - s_vpr_e(inst->sid, "%s: invalid params\n", __func__); + i_vpr_e(inst, "%s: invalid params\n", __func__); return freq; } allowed_clks_tbl = core->dt->allowed_clks_tbl; freq = allowed_clks_tbl[0].clock_rate; - s_vpr_l(inst->sid, "%s: rate = %lu\n", __func__, freq); + i_vpr_l(inst, "%s: rate = %lu\n", __func__, freq); return freq; } @@ -148,7 +148,7 @@ static int fill_dynamic_stats(struct msm_vidc_inst *inst, vote_data->complexity_factor = max_cf; vote_data->input_cr = min_input_cr; - s_vpr_l(inst->sid, + i_vpr_l(inst, "Input CR = %d Recon CR = %d Complexity Factor = %d\n", vote_data->input_cr, vote_data->compression_ratio, vote_data->complexity_factor); @@ -250,7 +250,7 @@ int msm_vidc_scale_buses(struct msm_vidc_inst *inst) codec = out_f->fmt.pix_mp.pixelformat; break; default: - s_vpr_e(inst->sid, "%s: invalid session_type %#x\n", + i_vpr_e(inst, "%s: invalid session_type %#x\n", __func__, inst->domain); break; } @@ -423,7 +423,7 @@ static int msm_vidc_apply_dcvs(struct msm_vidc_inst *inst) } if (!inst->power.dcvs_mode || inst->decode_batch.enable) { - s_vpr_l(inst->sid, "Skip DCVS (dcvs %d, batching %d)\n", + i_vpr_l(inst, "Skip DCVS (dcvs %d, batching %d)\n", inst->power.dcvs_mode, inst->decode_batch.enable); inst->power.dcvs_flags = 0; return 0; @@ -468,7 +468,7 @@ static int msm_vidc_apply_dcvs(struct msm_vidc_inst *inst) bufs_with_fw <= power->nom_threshold)) power->dcvs_flags = 0; - s_vpr_p(inst->sid, "DCVS: bufs_with_fw %d th[%d %d %d] flags %#x\n", + i_vpr_p(inst, "DCVS: bufs_with_fw %d th[%d %d %d] flags %#x\n", bufs_with_fw, power->min_threshold, power->nom_threshold, power->max_threshold, power->dcvs_flags); @@ -529,14 +529,14 @@ int msm_vidc_scale_power(struct msm_vidc_inst *inst, bool scale_buses) } if (msm_vidc_scale_clocks(inst)) - s_vpr_e(inst->sid, "failed to scale clock\n"); + i_vpr_e(inst, "failed to scale clock\n"); if (scale_buses) { if (msm_vidc_scale_buses(inst)) - s_vpr_e(inst->sid, "failed to scale bus\n"); + i_vpr_e(inst, "failed to scale bus\n"); } - s_vpr_h(inst->sid, + i_vpr_h(inst, "power: inst: clk %lld ddr %d llcc %d dcvs flags %#x, core: clk %lld ddr %lld llcc %lld\n", inst->power.curr_freq, inst->power.ddr_bw, inst->power.sys_cache_bw, inst->power.dcvs_flags, @@ -563,7 +563,7 @@ void msm_vidc_dcvs_data_reset(struct msm_vidc_inst *inst) min_count = inst->buffers.output.min_count; actual_count = inst->buffers.output.actual_count; } else { - s_vpr_e(inst->sid, "%s: invalid domain type %d\n", + i_vpr_e(inst, "%s: invalid domain type %d\n", __func__, inst->domain); return; } @@ -585,7 +585,7 @@ void msm_vidc_dcvs_data_reset(struct msm_vidc_inst *inst) dcvs->dcvs_flags = 0; - s_vpr_p(inst->sid, "%s: DCVS: thresholds [%d %d %d] flags %#x\n", + i_vpr_p(inst, "%s: DCVS: thresholds [%d %d %d] flags %#x\n", __func__, dcvs->min_threshold, dcvs->nom_threshold, dcvs->max_threshold, dcvs->dcvs_flags); @@ -599,7 +599,7 @@ void msm_vidc_power_data_reset(struct msm_vidc_inst *inst) d_vpr_e("%s: invalid params\n", __func__); return; } - s_vpr_h(inst->sid, "%s\n", __func__); + i_vpr_h(inst, "%s\n", __func__); msm_vidc_dcvs_data_reset(inst); @@ -608,5 +608,5 @@ void msm_vidc_power_data_reset(struct msm_vidc_inst *inst) rc = msm_vidc_scale_power(inst, true); if (rc) - s_vpr_e(inst->sid, "%s: failed to scale power\n", __func__); + i_vpr_e(inst, "%s: failed to scale power\n", __func__); } diff --git a/driver/vidc/src/msm_vidc_vb2.c b/driver/vidc/src/msm_vidc_vb2.c index 6d4f9627cb..69c5d8a2de 100644 --- a/driver/vidc/src/msm_vidc_vb2.c +++ b/driver/vidc/src/msm_vidc_vb2.c @@ -31,7 +31,7 @@ struct vb2_queue *msm_vidc_get_vb2q(struct msm_vidc_inst *inst, } else if (type == OUTPUT_META_PLANE) { q = &inst->vb2q[OUTPUT_META_PORT]; } else { - s_vpr_e(inst->sid, "%s: invalid buffer type %d\n", + i_vpr_e(inst, "%s: invalid buffer type %d\n", __func__, type); } return q; @@ -133,7 +133,7 @@ int msm_vidc_queue_setup(struct vb2_queue *q, else if (port == INPUT_META_PORT || port == OUTPUT_META_PORT) sizes[0] = inst->fmts[port].fmt.meta.buffersize; - s_vpr_h(inst->sid, + i_vpr_h(inst, "queue_setup: type %d num_buffers %d sizes[0] %d\n", q->type, *num_buffers, sizes[0]); return rc; @@ -154,16 +154,16 @@ int msm_vidc_start_streaming(struct vb2_queue *q, unsigned int count) return -EINVAL; } if (q->type == INPUT_META_PLANE || q->type == OUTPUT_META_PLANE) { - s_vpr_h(inst->sid, "%s: nothing to start on meta port %d\n", + i_vpr_h(inst, "%s: nothing to start on meta port %d\n", __func__, q->type); return 0; } if (!is_decode_session(inst) && !is_encode_session(inst)) { - s_vpr_e(inst->sid, "%s: invalid session %d\n", + i_vpr_e(inst, "%s: invalid session %d\n", __func__, inst->domain); return -EINVAL; } - s_vpr_h(inst->sid, "Streamon: %d\n", q->type); + i_vpr_h(inst, "Streamon: %d\n", q->type); if (!inst->once_per_session_set) { inst->once_per_session_set = true; @@ -176,7 +176,7 @@ int msm_vidc_start_streaming(struct vb2_queue *q, unsigned int count) MSM_VIDC_BUF_ARP); if (rc) goto error; - s_vpr_h(inst->sid, "arp buffer: %d %d\n", + i_vpr_h(inst, "arp buffer: %d %d\n", inst->buffers.arp.min_count, inst->buffers.arp.size); } else if(is_decode_session(inst)) { @@ -185,7 +185,7 @@ int msm_vidc_start_streaming(struct vb2_queue *q, unsigned int count) MSM_VIDC_BUF_PERSIST); if (rc) goto error; - s_vpr_h(inst->sid, "persist buffer: %d %d\n", + i_vpr_h(inst, "persist buffer: %d %d\n", inst->buffers.persist.min_count, inst->buffers.persist.size); */ @@ -207,16 +207,16 @@ int msm_vidc_start_streaming(struct vb2_queue *q, unsigned int count) else goto error; } else { - s_vpr_e(inst->sid, "%s: invalid type %d\n", q->type); + i_vpr_e(inst, "%s: invalid type %d\n", q->type); goto error; } if (!rc) - s_vpr_h(inst->sid, "Streamon: %d successful\n", q->type); + i_vpr_h(inst, "Streamon: %d successful\n", q->type); return rc; error: - s_vpr_h(inst->sid, "Streamon: %d failed\n", q->type); + i_vpr_h(inst, "Streamon: %d failed\n", q->type); return -EINVAL; } @@ -235,16 +235,16 @@ void msm_vidc_stop_streaming(struct vb2_queue *q) return; } if (q->type == INPUT_META_PLANE || q->type == OUTPUT_META_PLANE) { - s_vpr_h(inst->sid, "%s: nothing to stop on meta port %d\n", + i_vpr_h(inst, "%s: nothing to stop on meta port %d\n", __func__, q->type); return; } if (!is_decode_session(inst) && !is_encode_session(inst)) { - s_vpr_e(inst->sid, "%s: invalid session %d\n", + i_vpr_e(inst, "%s: invalid session %d\n", __func__, inst->domain); return; } - s_vpr_h(inst->sid, "Streamoff: %d\n", q->type); + i_vpr_h(inst, "Streamoff: %d\n", q->type); if (q->type == INPUT_MPLANE) { if (is_decode_session(inst)) @@ -261,16 +261,16 @@ void msm_vidc_stop_streaming(struct vb2_queue *q) else goto error; } else { - s_vpr_e(inst->sid, "%s: invalid type %d\n", q->type); + i_vpr_e(inst, "%s: invalid type %d\n", q->type); goto error; } if (!rc) - s_vpr_h(inst->sid, "Streamoff: %d successful\n", q->type); + i_vpr_h(inst, "Streamoff: %d successful\n", q->type); return; error: - s_vpr_e(inst->sid, "Streamoff: %d failed\n", q->type); + i_vpr_e(inst, "Streamoff: %d failed\n", q->type); return; } diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index 17cf71b0f9..1e3fd76d75 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -189,7 +189,7 @@ static bool __valdiate_session(struct msm_vidc_core *core, } } if (!valid) - s_vpr_e(inst->sid, "%s: invalid session\n", func); + i_vpr_e(inst, "%s: invalid session\n", func); return valid; } @@ -2923,7 +2923,7 @@ int venus_hfi_start(struct msm_vidc_inst *inst, enum msm_vidc_port_type port) } if (port != INPUT_PORT && port != OUTPUT_PORT) { - s_vpr_e(inst->sid, "%s: invalid port %d\n", __func__, port); + i_vpr_e(inst, "%s: invalid port %d\n", __func__, port); goto unlock; } @@ -2966,7 +2966,7 @@ int venus_hfi_stop(struct msm_vidc_inst *inst, enum msm_vidc_port_type port) } if (port != INPUT_PORT && port != OUTPUT_PORT) { - s_vpr_e(inst->sid, "%s: invalid port %d\n", __func__, port); + i_vpr_e(inst, "%s: invalid port %d\n", __func__, port); goto unlock; } @@ -3124,7 +3124,7 @@ int venus_hfi_release_buffer(struct msm_vidc_inst *inst, } if (!is_internal_buffer(buffer->type)) { - s_vpr_e(inst->sid, "release not allowed for buffer type %d\n", + i_vpr_e(inst, "release not allowed for buffer type %d\n", buffer->type); goto unlock; } @@ -3177,7 +3177,7 @@ int venus_hfi_scale_clocks(struct msm_vidc_inst* inst, u64 freq) core_lock(core, __func__); if (__resume(core)) { - s_vpr_e(inst->sid, "Resume from power collapse failed\n"); + i_vpr_e(inst, "Resume from power collapse failed\n"); rc = -EINVAL; goto exit; } diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index 2667651231..a70fc5674e 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -65,7 +65,7 @@ u32 vidc_port_from_hfi(struct msm_vidc_inst *inst, port = OUTPUT_PORT; break; default: - s_vpr_e(inst->sid, "%s: invalid hfi port type %d\n", + i_vpr_e(inst, "%s: invalid hfi port type %d\n", __func__, hfi_port); break; } @@ -78,12 +78,12 @@ u32 vidc_port_from_hfi(struct msm_vidc_inst *inst, port = OUTPUT_PORT; break; default: - s_vpr_e(inst->sid, "%s: invalid hfi port type %d\n", + i_vpr_e(inst, "%s: invalid hfi port type %d\n", __func__, hfi_port); break; } } else { - s_vpr_e(inst->sid, "%s: invalid domain %#x\n", + i_vpr_e(inst, "%s: invalid domain %#x\n", __func__, inst->domain); } @@ -94,7 +94,7 @@ bool is_valid_hfi_port(struct msm_vidc_inst *inst, u32 port, u32 buffer_type, const char *func) { if (!inst) { - s_vpr_e(inst->sid, "%s: invalid params\n", func); + i_vpr_e(inst, "%s: invalid params\n", func); return false; } @@ -109,7 +109,7 @@ bool is_valid_hfi_port(struct msm_vidc_inst *inst, u32 port, return true; invalid: - s_vpr_e(inst->sid, "%s: invalid port %#x buffer_type %u\n", + i_vpr_e(inst, "%s: invalid port %#x buffer_type %u\n", func, port, buffer_type); return false; } @@ -118,7 +118,7 @@ bool is_valid_hfi_buffer_type(struct msm_vidc_inst *inst, u32 buffer_type, const char *func) { if (!inst) { - s_vpr_e(inst->sid, "%s: invalid params\n", func); + i_vpr_e(inst, "%s: invalid params\n", func); return false; } @@ -132,7 +132,7 @@ bool is_valid_hfi_buffer_type(struct msm_vidc_inst *inst, buffer_type != HFI_BUFFER_LINE && buffer_type != HFI_BUFFER_DPB && buffer_type != HFI_BUFFER_PERSIST) { - s_vpr_e(inst->sid, "%s: invalid buffer type %#x\n", + i_vpr_e(inst, "%s: invalid buffer type %#x\n", func, buffer_type); return false; } @@ -191,7 +191,7 @@ static bool check_last_flag(struct msm_vidc_inst *inst, buffer = (struct hfi_buffer *)((u8 *)pkt + sizeof(struct hfi_packet)); if (buffer->flags & HFI_BUF_FW_FLAG_LAST) { - s_vpr_h(inst->sid, "%s: received last flag on FBD, index: %d\n", + i_vpr_h(inst, "%s: received last flag on FBD, index: %d\n", __func__, buffer->index); return true; } @@ -217,7 +217,7 @@ static int handle_session_info(struct msm_vidc_inst *inst, break; } - s_vpr_e(inst->sid, "session info (%#x): %s\n", pkt->type, info); + i_vpr_e(inst, "session info (%#x): %s\n", pkt->type, info); return rc; } @@ -252,7 +252,7 @@ static int handle_session_error(struct msm_vidc_inst *inst, break; } - s_vpr_e(inst->sid, "session error (%#x): %s\n", pkt->type, error); + i_vpr_e(inst, "session error (%#x): %s\n", pkt->type, error); rc = msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); return rc; @@ -287,13 +287,13 @@ static int handle_session_open(struct msm_vidc_inst *inst, struct hfi_packet *pkt) { if (pkt->flags & HFI_FW_FLAGS_SESSION_ERROR) { - s_vpr_e(inst->sid, "%s: received session error\n", __func__); + i_vpr_e(inst, "%s: received session error\n", __func__); msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); return 0; } if (pkt->flags & HFI_FW_FLAGS_SUCCESS) - s_vpr_h(inst->sid, "%s: successful\n", __func__); + i_vpr_h(inst, "%s: successful\n", __func__); return 0; } @@ -302,12 +302,12 @@ static int handle_session_close(struct msm_vidc_inst *inst, struct hfi_packet *pkt) { if (pkt->flags & HFI_FW_FLAGS_SESSION_ERROR) { - s_vpr_e(inst->sid, "%s: received session error\n", __func__); + i_vpr_e(inst, "%s: received session error\n", __func__); msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); } if (pkt->flags & HFI_FW_FLAGS_SUCCESS) - s_vpr_h(inst->sid, "%s: successful\n", __func__); + i_vpr_h(inst, "%s: successful\n", __func__); signal_session_msg_receipt(inst, SIGNAL_CMD_CLOSE); return 0; @@ -317,13 +317,13 @@ static int handle_session_start(struct msm_vidc_inst *inst, struct hfi_packet *pkt) { if (pkt->flags & HFI_FW_FLAGS_SESSION_ERROR) { - s_vpr_e(inst->sid, "%s: received session error\n", __func__); + i_vpr_e(inst, "%s: received session error\n", __func__); msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); return 0; } if (pkt->flags & HFI_FW_FLAGS_SUCCESS) - s_vpr_h(inst->sid, "%s: successful for port %d\n", + i_vpr_h(inst, "%s: successful for port %d\n", __func__, pkt->port); return 0; } @@ -334,12 +334,12 @@ static int handle_session_stop(struct msm_vidc_inst *inst, int signal_type = -1; if (pkt->flags & HFI_FW_FLAGS_SESSION_ERROR) { - s_vpr_e(inst->sid, "%s: received session error\n", __func__); + i_vpr_e(inst, "%s: received session error\n", __func__); msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); } if (pkt->flags & HFI_FW_FLAGS_SUCCESS) - s_vpr_h(inst->sid, "%s: successful for port %d\n", + i_vpr_h(inst, "%s: successful for port %d\n", __func__, pkt->port); if (is_encode_session(inst)) { @@ -348,7 +348,7 @@ static int handle_session_stop(struct msm_vidc_inst *inst, } else if (pkt->port == HFI_PORT_BITSTREAM) { signal_type = SIGNAL_CMD_STOP_OUTPUT; } else { - s_vpr_e(inst->sid, "%s: invalid port: %d\n", + i_vpr_e(inst, "%s: invalid port: %d\n", __func__, pkt->port); return -EINVAL; } @@ -358,12 +358,12 @@ static int handle_session_stop(struct msm_vidc_inst *inst, } else if (pkt->port == HFI_PORT_BITSTREAM) { signal_type = SIGNAL_CMD_STOP_INPUT; } else { - s_vpr_e(inst->sid, "%s: invalid port: %d\n", + i_vpr_e(inst, "%s: invalid port: %d\n", __func__, pkt->port); return -EINVAL; } } else { - s_vpr_e(inst->sid, "%s: invalid session\n", __func__); + i_vpr_e(inst, "%s: invalid session\n", __func__); return -EINVAL; } @@ -376,13 +376,13 @@ static int handle_session_drain(struct msm_vidc_inst *inst, struct hfi_packet *pkt) { if (pkt->flags & HFI_FW_FLAGS_SESSION_ERROR) { - s_vpr_e(inst->sid, "%s: received session error\n", __func__); + i_vpr_e(inst, "%s: received session error\n", __func__); msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); return 0; } if (pkt->flags & HFI_FW_FLAGS_SUCCESS) - s_vpr_h(inst->sid, "%s: successful\n", __func__); + i_vpr_h(inst, "%s: successful\n", __func__); return 0; } @@ -406,7 +406,7 @@ static int handle_input_buffer(struct msm_vidc_inst *inst, } } if (!found) { - s_vpr_e(inst->sid, "%s: buffer not found for idx %d addr %#x\n", + i_vpr_e(inst, "%s: buffer not found for idx %d addr %#x\n", __func__, buffer->index, buffer->base_address); return -EINVAL; } @@ -417,11 +417,11 @@ static int handle_input_buffer(struct msm_vidc_inst *inst, buf->flags = 0; //todo: /*if (buffer->flags & HFI_BUF_FW_FLAG_CORRUPT) { - s_vpr_h(inst->sid, "%s: data corrupted\n", __func__); + i_vpr_h(inst, "%s: data corrupted\n", __func__); buf->flags |= MSM_VIDC_BUF_FLAG_ERROR; } if (buffer->flags & HFI_BUF_FW_FLAG_UNSUPPORTED) { - s_vpr_e(inst->sid, "%s: unsupported input\n", __func__); + i_vpr_e(inst, "%s: unsupported input\n", __func__); buf->flags |= MSM_VIDC_BUF_FLAG_ERROR; // TODO: move inst->state to error state }*/ @@ -452,7 +452,7 @@ static int handle_output_buffer(struct msm_vidc_inst *inst, } } if (!found) { - s_vpr_e(inst->sid, "%s: invalid idx %d daddr %#x\n", + i_vpr_e(inst, "%s: invalid idx %d daddr %#x\n", __func__, buffer->index, buffer->base_address); return -EINVAL; } @@ -508,7 +508,7 @@ static int handle_input_metadata_buffer(struct msm_vidc_inst *inst, } } if (!found) { - s_vpr_e(inst->sid, "%s: invalid idx %d daddr %#x\n", + i_vpr_e(inst, "%s: invalid idx %d daddr %#x\n", __func__, buffer->index, buffer->base_address); return -EINVAL; } @@ -543,7 +543,7 @@ static int handle_output_metadata_buffer(struct msm_vidc_inst *inst, } } if (!found) { - s_vpr_e(inst->sid, "%s: invalid idx %d daddr %#x\n", + i_vpr_e(inst, "%s: invalid idx %d daddr %#x\n", __func__, buffer->index, buffer->base_address); return -EINVAL; } @@ -614,7 +614,7 @@ static int handle_dpb_buffer(struct msm_vidc_inst *inst, if (found) { rc = msm_vidc_destroy_internal_buffer(inst, buf); } else { - s_vpr_e(inst->sid, "%s: invalid idx %d daddr %#x\n", + i_vpr_e(inst, "%s: invalid idx %d daddr %#x\n", __func__, buffer->index, buffer->base_address); return -EINVAL; } @@ -643,7 +643,7 @@ static int handle_persist_buffer(struct msm_vidc_inst *inst, if (found) { rc = msm_vidc_destroy_internal_buffer(inst, buf); } else { - s_vpr_e(inst->sid, "%s: invalid idx %d daddr %#x\n", + i_vpr_e(inst, "%s: invalid idx %d daddr %#x\n", __func__, buffer->index, buffer->base_address); return -EINVAL; } @@ -672,7 +672,7 @@ static int handle_line_buffer(struct msm_vidc_inst *inst, if (found) { rc = msm_vidc_destroy_internal_buffer(inst, buf); } else { - s_vpr_e(inst->sid, "%s: invalid idx %d daddr %#x\n", + i_vpr_e(inst, "%s: invalid idx %d daddr %#x\n", __func__, buffer->index, buffer->base_address); return -EINVAL; } @@ -701,7 +701,7 @@ static int handle_non_comv_buffer(struct msm_vidc_inst *inst, if (found) { rc = msm_vidc_destroy_internal_buffer(inst, buf); } else { - s_vpr_e(inst->sid, "%s: invalid idx %d daddr %#x\n", + i_vpr_e(inst, "%s: invalid idx %d daddr %#x\n", __func__, buffer->index, buffer->base_address); return -EINVAL; } @@ -730,7 +730,7 @@ static int handle_comv_buffer(struct msm_vidc_inst *inst, if (found) { rc = msm_vidc_destroy_internal_buffer(inst, buf); } else { - s_vpr_e(inst->sid, "%s: invalid idx %d daddr %#x\n", + i_vpr_e(inst, "%s: invalid idx %d daddr %#x\n", __func__, buffer->index, buffer->base_address); return -EINVAL; } @@ -759,7 +759,7 @@ static int handle_bin_buffer(struct msm_vidc_inst *inst, if (found) { rc = msm_vidc_destroy_internal_buffer(inst, buf); } else { - s_vpr_e(inst->sid, "%s: invalid idx %d daddr %#x\n", + i_vpr_e(inst, "%s: invalid idx %d daddr %#x\n", __func__, buffer->index, buffer->base_address); return -EINVAL; } @@ -788,7 +788,7 @@ static int handle_arp_buffer(struct msm_vidc_inst *inst, if (found) { rc = msm_vidc_destroy_internal_buffer(inst, buf); } else { - s_vpr_e(inst->sid, "%s: invalid idx %d daddr %#x\n", + i_vpr_e(inst, "%s: invalid idx %d daddr %#x\n", __func__, buffer->index, buffer->base_address); return -EINVAL; } @@ -803,7 +803,7 @@ static int handle_session_buffer(struct msm_vidc_inst *inst, u32 buf_type = 0, port_type = 0; if (pkt->flags & HFI_FW_FLAGS_SESSION_ERROR) { - s_vpr_e(inst->sid, "%s: received session error\n", __func__); + i_vpr_e(inst, "%s: received session error\n", __func__); msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); return 0; } @@ -841,7 +841,7 @@ static int handle_session_buffer(struct msm_vidc_inst *inst, else if (buf_type == HFI_BUFFER_DPB) rc = handle_dpb_buffer(inst, buffer); else - s_vpr_e(inst->sid, "%s: unknown bitstream port buffer type %#x\n", + i_vpr_e(inst, "%s: unknown bitstream port buffer type %#x\n", __func__, buf_type); } else if (port_type == HFI_PORT_RAW) { if (buf_type == HFI_BUFFER_METADATA) @@ -849,7 +849,7 @@ static int handle_session_buffer(struct msm_vidc_inst *inst, else if (buf_type == HFI_BUFFER_RAW) rc = handle_input_buffer(inst, buffer); else - s_vpr_e(inst->sid, "%s: unknown raw port buffer type %#x\n", + i_vpr_e(inst, "%s: unknown raw port buffer type %#x\n", __func__, buf_type); } } else if (is_decode_session(inst)) { @@ -869,7 +869,7 @@ static int handle_session_buffer(struct msm_vidc_inst *inst, else if (buf_type == HFI_BUFFER_PERSIST) rc = handle_persist_buffer(inst, buffer); else - s_vpr_e(inst->sid, "%s: unknown bitstream port buffer type %#x\n", + i_vpr_e(inst, "%s: unknown bitstream port buffer type %#x\n", __func__, buf_type); } else if (port_type == HFI_PORT_RAW) { if (buf_type == HFI_BUFFER_METADATA) @@ -879,11 +879,11 @@ static int handle_session_buffer(struct msm_vidc_inst *inst, else if (buf_type == HFI_BUFFER_DPB) rc = handle_dpb_buffer(inst, buffer); else - s_vpr_e(inst->sid, "%s: unknown raw port buffer type %#x\n", + i_vpr_e(inst, "%s: unknown raw port buffer type %#x\n", __func__, buf_type); } } else { - s_vpr_e(inst->sid, "%s: invalid session %d\n", + i_vpr_e(inst, "%s: invalid session %d\n", __func__, inst->domain); return -EINVAL; } @@ -894,7 +894,7 @@ static int handle_session_buffer(struct msm_vidc_inst *inst, static int handle_port_settings_change(struct msm_vidc_inst *inst, struct hfi_packet *pkt) { - s_vpr_h(inst->sid, "%s: Received port settings change, type %d\n", + i_vpr_h(inst, "%s: Received port settings change, type %d\n", __func__, pkt->port); return 0; } @@ -903,12 +903,12 @@ static int handle_session_subscribe_mode(struct msm_vidc_inst *inst, struct hfi_packet *pkt) { if (pkt->flags & HFI_FW_FLAGS_SESSION_ERROR) { - s_vpr_e(inst->sid, "%s: received session error\n", __func__); + i_vpr_e(inst, "%s: received session error\n", __func__); msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); } if (pkt->flags & HFI_FW_FLAGS_SUCCESS) - s_vpr_h(inst->sid, "%s: successful\n", __func__); + i_vpr_h(inst, "%s: successful\n", __func__); return 0; } @@ -916,12 +916,12 @@ static int handle_session_delivery_mode(struct msm_vidc_inst *inst, struct hfi_packet *pkt) { if (pkt->flags & HFI_FW_FLAGS_SESSION_ERROR) { - s_vpr_e(inst->sid, "%s: received session error\n", __func__); + i_vpr_e(inst, "%s: received session error\n", __func__); msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); } if (pkt->flags & HFI_FW_FLAGS_SUCCESS) - s_vpr_h(inst->sid, "%s: successful\n", __func__); + i_vpr_h(inst, "%s: successful\n", __func__); return 0; } @@ -948,7 +948,7 @@ static int handle_session_command(struct msm_vidc_inst *inst, case HFI_CMD_DELIVERY_MODE: return handle_session_delivery_mode(inst, pkt); default: - s_vpr_e(inst->sid, "%s: Unsupported command type: %#x\n", + i_vpr_e(inst, "%s: Unsupported command type: %#x\n", __func__, pkt->type); return -EINVAL; } @@ -961,7 +961,7 @@ static int handle_session_property(struct msm_vidc_inst *inst, u32 port; u32 *payload_ptr; - s_vpr_h(inst->sid, "%s: property type %#x\n", __func__, pkt->type); + i_vpr_h(inst, "%s: property type %#x\n", __func__, pkt->type); port = vidc_port_from_hfi(inst, pkt->port); payload_ptr = (u32 *)((u8 *)pkt + sizeof(struct hfi_packet)); @@ -999,7 +999,7 @@ static int handle_session_property(struct msm_vidc_inst *inst, inst->subcr_params[port].tier = payload_ptr[0]; break; default: - s_vpr_e(inst->sid, "%s: invalid port settings property %#x\n", + i_vpr_e(inst, "%s: invalid port settings property %#x\n", __func__, pkt->type); return -EINVAL; } @@ -1133,7 +1133,7 @@ int handle_session_response_work(struct msm_vidc_inst *inst, if (packet->type > HFI_CMD_BEGIN && packet->type < HFI_CMD_END) { if (hfi_cmd_type == HFI_CMD_SETTINGS_CHANGE) { - s_vpr_e(inst->sid, + i_vpr_e(inst, "%s: invalid packet type %d in port settings change\n", __func__, packet->type); rc = -EINVAL; @@ -1152,7 +1152,7 @@ int handle_session_response_work(struct msm_vidc_inst *inst, packet->type < HFI_INFORMATION_END) { rc = handle_session_info(inst, packet); } else { - s_vpr_e(inst->sid, "%s: Unknown packet type: %#x\n", + i_vpr_e(inst, "%s: Unknown packet type: %#x\n", __func__, packet->type); rc = -EINVAL; goto exit; @@ -1181,7 +1181,7 @@ int handle_session_response_work(struct msm_vidc_inst *inst, if (rc) goto exit; } else { - s_vpr_e(inst->sid, "%s: invalid port type: %#x\n", + i_vpr_e(inst, "%s: invalid port type: %#x\n", __func__, hfi_port); } } @@ -1336,7 +1336,7 @@ static int handle_session_response(struct msm_vidc_core *core, packet->type < HFI_INFORMATION_END) { rc = handle_session_info(inst, packet); } else { - s_vpr_e(inst->sid, "%s: Unknown packet type: %#x\n", + i_vpr_e(inst, "%s: Unknown packet type: %#x\n", __func__, packet->type); rc = -EINVAL; goto exit; From c5262f2e9957a9225520f8a7f5daa52dd40c73f3 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Tue, 2 Feb 2021 10:53:55 -0800 Subject: [PATCH 0093/1061] video: driver: Avoid compilation failure due to time.h Since linux/time.h is not visible in waipio branch, compilation issue is seen due to usage of timeval structure. Get rid of timeval struct usage to avoid encountering this issue. Change-Id: I03ce4f72f97b5e96e4dd495595c60c6835498f66 Signed-off-by: Akshata Sahukar --- driver/vidc/inc/msm_vidc_debug.h | 3 --- driver/vidc/src/msm_vidc_debug.c | 27 ++------------------------- 2 files changed, 2 insertions(+), 28 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_debug.h b/driver/vidc/inc/msm_vidc_debug.h index 0ae4b4e258..faabcd45b7 100644 --- a/driver/vidc/inc/msm_vidc_debug.h +++ b/driver/vidc/inc/msm_vidc_debug.h @@ -9,9 +9,6 @@ #include #include #include -#include - -void do_gettimeofday(struct timeval *__ddl_tv); #ifndef VIDC_DBG_LABEL #define VIDC_DBG_LABEL "msm_vidc" diff --git a/driver/vidc/src/msm_vidc_debug.c b/driver/vidc/src/msm_vidc_debug.c index 04223328eb..fce6c2efff 100644 --- a/driver/vidc/src/msm_vidc_debug.c +++ b/driver/vidc/src/msm_vidc_debug.c @@ -56,32 +56,12 @@ struct core_inst_pair { static inline void tic(struct msm_vidc_inst *i, enum profiling_points p, char *b) { - struct timeval __ddl_tv; - - if (!i->debug.pdata[p].name[0]) - memcpy(i->debug.pdata[p].name, b, 64); - if ((msm_vidc_debug & VIDC_PERF) && - i->debug.pdata[p].sampling) { - do_gettimeofday(&__ddl_tv); - i->debug.pdata[p].start = - (__ddl_tv.tv_sec * 1000) + (__ddl_tv.tv_usec / 1000); - i->debug.pdata[p].sampling = false; - } + return; } static inline void toc(struct msm_vidc_inst *i, enum profiling_points p) { - struct timeval __ddl_tv; - - if ((msm_vidc_debug & VIDC_PERF) && - !i->debug.pdata[p].sampling) { - do_gettimeofday(&__ddl_tv); - i->debug.pdata[p].stop = (__ddl_tv.tv_sec * 1000) - + (__ddl_tv.tv_usec / 1000); - i->debug.pdata[p].cumulative += i->debug.pdata[p].stop - - i->debug.pdata[p].start; - i->debug.pdata[p].sampling = true; - } + return; } static u32 write_str(char *buffer, @@ -559,7 +539,4 @@ void msm_vidc_debugfs_update(void *instance, } } -void do_gettimeofday(struct timeval *__ddl_tv) -{ -} From 91d3cc6aaa05a0c43330eaa787888342402ccfbe Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Tue, 2 Feb 2021 10:53:14 -0800 Subject: [PATCH 0094/1061] video: driver: reset buffer parameters during destroy reset internal buffer size, buffers counts at the time of destroy buffers. Change-Id: Ibb83792c093849ac123bb8b0bfd01c5d97f675aa Signed-off-by: Darshana Patil --- driver/vidc/src/msm_vidc_driver.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index a218dc8ae1..2f3d446473 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -1572,6 +1572,9 @@ int msm_vidc_destroy_internal_buffer(struct msm_vidc_inst *inst, } } + buffers->size = 0; + buffers->min_count = buffers->extra_count = buffers->actual_count = 0; + return 0; } From 48b189ef85dde339891fd1bae9ae9fdf15a98dc7 Mon Sep 17 00:00:00 2001 From: Maheshwar Ajja Date: Tue, 2 Feb 2021 17:38:07 -0800 Subject: [PATCH 0095/1061] video: driver: update debugfs functions On latest kernel version the debugfs functions return type is void and hence update debugfs functions in driver accordingly. Change-Id: I13b10aaf84dc1c9bd0e2dd2b632e543f2a2e878d Signed-off-by: Maheshwar Ajja --- driver/vidc/src/msm_vidc_debug.c | 28 +++++----------------------- 1 file changed, 5 insertions(+), 23 deletions(-) diff --git a/driver/vidc/src/msm_vidc_debug.c b/driver/vidc/src/msm_vidc_debug.c index 0dafca9d81..8fab100036 100644 --- a/driver/vidc/src/msm_vidc_debug.c +++ b/driver/vidc/src/msm_vidc_debug.c @@ -252,7 +252,6 @@ static const struct file_operations debug_level_fops = { struct dentry* msm_vidc_debugfs_init_drv() { - bool ok = false; struct dentry *dir = NULL; dir = debugfs_create_dir("msm_vidc", NULL); @@ -261,30 +260,13 @@ struct dentry* msm_vidc_debugfs_init_drv() goto failed_create_dir; } -#define __debugfs_create(__type, __name, __value) ({ \ - struct dentry *f = debugfs_create_##__type(__name, 0644, \ - dir, __value); \ - if (IS_ERR_OR_NULL(f)) { \ - d_vpr_e("Failed creating debugfs file '%pd/%s'\n", \ - dir, __name); \ - f = NULL; \ - } \ - f; \ -}) - - ok = - __debugfs_create(u32, "core_clock_voting", - &msm_vidc_clock_voting) && - __debugfs_create(bool, "disable_video_syscache", - &msm_vidc_syscache_disable) && - __debugfs_create(bool, "lossless_encoding", + debugfs_create_u32("core_clock_voting", 0644, dir, + &msm_vidc_clock_voting); + debugfs_create_bool("disable_video_syscache", 0644, dir, + &msm_vidc_syscache_disable); + debugfs_create_bool("lossless_encoding", 0644, dir, &msm_vidc_lossless_encode); -#undef __debugfs_create - - if (!ok) - goto failed_create_dir; - return dir; failed_create_dir: From f5a9db9667a4a5c111a3de1106804d3ad2cc0b31 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Wed, 3 Feb 2021 17:08:50 -0800 Subject: [PATCH 0096/1061] video: driver: Add NV12 related support for enc Add support to set HFI_PROP_LINEAR_STRIDE_SCANLINE property to video fw. Change-Id: I0ce3549a472388a5d2471bf4c8978a5a5f524a34 Signed-off-by: Akshata Sahukar --- driver/vidc/inc/hfi_property.h | 6 ++-- driver/vidc/src/msm_vdec.c | 6 +++- driver/vidc/src/msm_venc.c | 64 ++++++++++++++++++---------------- 3 files changed, 41 insertions(+), 35 deletions(-) diff --git a/driver/vidc/inc/hfi_property.h b/driver/vidc/inc/hfi_property.h index be1a74fa36..f9aef26d60 100644 --- a/driver/vidc/inc/hfi_property.h +++ b/driver/vidc/inc/hfi_property.h @@ -73,9 +73,9 @@ enum hfi_color_format { #define HFI_BITMASK_BITSTREAM_HEIGHT 0x0000ffff #define HFI_PROP_BITSTREAM_RESOLUTION 0x03000103 -#define HFI_BITMASK_LINEAR_STRIDE_ALIGNMENT 0xffff0000 -#define HFI_BITMASK_LINEAR_SCANLINE_ALIGNMENT 0x0000ffff -#define HFI_PROP_LINEAR_ALIGNMENT_FACTOR 0x03000104 +#define HFI_BITMASK_LINEAR_STRIDE 0xffff0000 +#define HFI_BITMASK_LINEAR_SCANLINE 0x0000ffff +#define HFI_PROP_LINEAR_STRIDE_SCANLINE 0x03000104 #define HFI_BITMASK_CROP_RIGHT_OFFSET 0xffff0000 #define HFI_BITMASK_CROP_BOTTOM_OFFSET 0x0000ffff diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index bf440a6b82..256f770914 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -112,7 +112,7 @@ static int msm_vdec_set_linear_stride_scanline(struct msm_vidc_inst *inst) "stride_uv: %d, scanline_uv: %d", __func__, stride_y, scanline_y, stride_uv, scanline_uv); rc = venus_hfi_session_property(inst, - HFI_PROP_LINEAR_ALIGNMENT_FACTOR, + HFI_PROP_LINEAR_STRIDE_SCANLINE, HFI_HOST_FLAGS_NONE, get_hfi_port(inst, OUTPUT_PORT), HFI_PAYLOAD_U64, @@ -995,8 +995,12 @@ static int msm_vdec_subscribe_input_port_settings_change(struct msm_vidc_inst *i rc = -EINVAL; break; } + + if (rc) + goto exit; } +exit: return rc; } diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index 200ee80754..258af84e8c 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -20,7 +20,7 @@ u32 msm_venc_input_set_prop[] = { HFI_PROP_COLOR_FORMAT, HFI_PROP_RAW_RESOLUTION, - HFI_PROP_LINEAR_ALIGNMENT_FACTOR, + HFI_PROP_LINEAR_STRIDE_SCANLINE, HFI_PROP_BUFFER_HOST_MAX_COUNT, }; @@ -75,20 +75,22 @@ static int msm_venc_set_colorformat(struct msm_vidc_inst *inst, enum msm_vidc_colorformat_type colorformat; u32 hfi_colorformat; - if (port != INPUT_PORT && port != OUTPUT_PORT) { + if (port != INPUT_PORT) { i_vpr_e(inst, "%s: invalid port %d\n", __func__, port); return -EINVAL; } pixelformat = inst->fmts[INPUT_PORT].fmt.pix_mp.pixelformat; - if (pixelformat != V4L2_PIX_FMT_VIDC_NV12C && - pixelformat != V4L2_PIX_FMT_VIDC_TP10C) { + colorformat = v4l2_colorformat_to_driver(pixelformat, __func__); + if (!(colorformat & inst->capabilities->cap[PIX_FMTS].step_or_mask)) { i_vpr_e(inst, "%s: invalid pixelformat %#x\n", __func__, pixelformat); return -EINVAL; } - colorformat = v4l2_colorformat_to_driver(pixelformat, __func__); + hfi_colorformat = get_hfi_colorformat(inst, colorformat); + i_vpr_h(inst, "%s: hfi colorformat: %#x", __func__, + hfi_colorformat); rc = venus_hfi_session_property(inst, HFI_PROP_COLOR_FORMAT, HFI_HOST_FLAGS_NONE, @@ -101,13 +103,12 @@ static int msm_venc_set_colorformat(struct msm_vidc_inst *inst, return 0; } -/* TODO: Enable when NV12 support is required */ static int msm_venc_set_linear_alignment_factor(struct msm_vidc_inst *inst, enum msm_vidc_port_type port) { -/* int rc = 0; - u32 pixelformat; - u32 alignment_factor[2]; + int rc = 0; + u32 pixelformat, stride_y, scanline_y, stride_uv, scanline_uv; + u32 payload[2]; if (port != INPUT_PORT) { i_vpr_e(inst, "%s: invalid port %d\n", __func__, port); @@ -115,41 +116,34 @@ static int msm_venc_set_linear_alignment_factor(struct msm_vidc_inst *inst, } pixelformat = inst->fmts[INPUT_PORT].fmt.pix_mp.pixelformat; - if (pixelformat == V4L2_PIX_FMT_VIDC_NV12C || - pixelformat == V4L2_PIX_FMT_VIDC_TP10C || - pixelformat == V4L2_PIX_FMT_VIDC_ARGB32C) { + if (pixelformat != V4L2_PIX_FMT_NV12 && + pixelformat != V4L2_PIX_FMT_VIDC_P010) { i_vpr_e(inst, "%s: not a linear color fmt, property is not set\n", __func__); return 0; } - if (pixelformat == V4L2_PIX_FMT_ARGB32) { - alignment_factor[0] = - (rgb_stride_alignment(pixelformat, __func__) << 16) | - rgb_scanline_alignment(pixelformat, __func__); - alignment_factor[1] = 0; - } else { - alignment_factor[0] = - (y_stride_alignment(pixelformat, __func__) << 16) | - y_scanline_alignment(pixelformat, __func__); - alignment_factor[1] = - (uv_stride_alignment(pixelformat, __func__) << 16) | - uv_scanline_alignment(pixelformat, __func__); - } + stride_y = inst->fmts[INPUT_PORT].fmt.pix_mp.width; + scanline_y = inst->fmts[INPUT_PORT].fmt.pix_mp.height; + stride_uv = stride_y; + scanline_uv = scanline_y / 2; - i_vpr_h(inst, "%s: payload[0]: %u payload[1]: %u\n", __func__, - alignment_factor[0], alignment_factor[1]); + payload[0] = stride_y << 16 | scanline_y; + payload[1] = stride_uv << 16 | scanline_uv; + i_vpr_h(inst, "%s: stride_y: %d scanline_y: %d " + "stride_uv: %d, scanline_uv: %d", __func__, + stride_y, scanline_y, stride_uv, scanline_uv); rc = venus_hfi_session_property(inst, - HFI_PROP_LINEAR_ALIGNMENT_FACTOR, + HFI_PROP_LINEAR_STRIDE_SCANLINE, HFI_HOST_FLAGS_NONE, get_hfi_port(inst, port), HFI_PAYLOAD_64_PACKED, - &alignment_factor, + &payload, sizeof(u64)); if (rc) return rc; -*/ + return 0; } @@ -372,7 +366,7 @@ static int msm_venc_set_input_properties(struct msm_vidc_inst *inst) case HFI_PROP_RAW_RESOLUTION: rc = msm_venc_set_raw_resolution(inst, INPUT_PORT); break; - case HFI_PROP_LINEAR_ALIGNMENT_FACTOR: + case HFI_PROP_LINEAR_STRIDE_SCANLINE: rc = msm_venc_set_linear_alignment_factor(inst, INPUT_PORT); break; case HFI_PROP_BUFFER_HOST_MAX_COUNT: @@ -384,8 +378,12 @@ static int msm_venc_set_input_properties(struct msm_vidc_inst *inst) rc = -EINVAL; break; } + + if (rc) + goto exit; } +exit: return rc; } @@ -418,8 +416,12 @@ static int msm_venc_set_output_properties(struct msm_vidc_inst *inst) rc = -EINVAL; break; } + + if (rc) + goto exit; } +exit: return rc; } From d4a802bba57373e07bf303c63ee5f3e15b298a07 Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Thu, 4 Feb 2021 10:49:47 -0800 Subject: [PATCH 0097/1061] video: driver: add default hdr and rap frame support For decoder FW should not assume any default sequence header. Decodering should start only after FW receives first sequence header. Also, decoding starts only after discovery of random access point frame. RAP frame means IDR for AVC, IDR/CRA/BLA for HEVC, I frame for VP9 and MPEG2. Change-Id: Ie12b8140f6b63e57c52a9c96cb1250f4958a42c6 Signed-off-by: Darshana Patil --- driver/platform/waipio/src/msm_vidc_waipio.c | 20 +++++++ driver/vidc/inc/msm_vidc_internal.h | 3 + driver/vidc/src/msm_vdec.c | 59 ++++++++++++++++++++ 3 files changed, 82 insertions(+) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 864704c7e0..8a08ec3717 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -998,6 +998,26 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {BITSTREAM_SIZE_OVERWRITE, DEC, CODECS_ALL, 0, INT_MAX, 1, 0, V4L2_CID_MPEG_VIDC_MIN_BITSTREAM_SIZE_OVERWRITE}, + {THUMBNAIL_MODE, DEC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, + HFI_PROP_THUMBNAIL_MODE}, + + {DEFAULT_HEADER, DEC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, + HFI_PROP_DEC_DEFAULT_HEADER}, + + {RAP_FRAME, DEC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_ENABLE, + 0, + HFI_PROP_DEC_START_FROM_RAP_FRAME, + CAP_FLAG_INPUT_PORT, + {THUMBNAIL_MODE}}, + {META_LTR_MARK_USE, ENC, CODECS_ALL, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index e3b7640bae..2be0882b89 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -345,6 +345,9 @@ enum msm_vidc_inst_capability_type { BIT_DEPTH, CODEC_CONFIG, BITSTREAM_SIZE_OVERWRITE, + THUMBNAIL_MODE, + DEFAULT_HEADER, + RAP_FRAME, META_LTR_MARK_USE, META_DPB_MISR, META_OPB_MISR, diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 256f770914..57807ff76e 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -550,6 +550,56 @@ static int msm_vdec_set_secure_mode(struct msm_vidc_inst *inst, return rc; } +static int msm_vdec_set_default_header(struct msm_vidc_inst *inst, + enum msm_vidc_port_type port) +{ + int rc = 0; + u32 default_header = false; + + if (port != INPUT_PORT) { + i_vpr_e(inst, "%s: invalid port %d\n", __func__, port); + return -EINVAL; + } + + default_header = inst->capabilities->cap[DEFAULT_HEADER].value; + i_vpr_h(inst, "%s: default header: %d", __func__, default_header); + rc = venus_hfi_session_property(inst, + HFI_PROP_DEC_DEFAULT_HEADER, + HFI_HOST_FLAGS_NONE, + get_hfi_port(inst, port), + HFI_PAYLOAD_U32, + &default_header, + sizeof(u32)); + if (rc) + i_vpr_e(inst, "%s: set property failed\n", __func__); + return rc; +} + +static int msm_vdec_set_rap_frame(struct msm_vidc_inst *inst, + enum msm_vidc_port_type port) +{ + int rc = 0; + u32 rap_frame = true; + + if (port != INPUT_PORT) { + i_vpr_e(inst, "%s: invalid port %d\n", __func__, port); + return -EINVAL; + } + + rap_frame = inst->capabilities->cap[RAP_FRAME].value; + i_vpr_h(inst, "%s: start from rap frame: %d", __func__, rap_frame); + rc = venus_hfi_session_property(inst, + HFI_PROP_DEC_START_FROM_RAP_FRAME, + HFI_HOST_FLAGS_NONE, + get_hfi_port(inst, port), + HFI_PAYLOAD_U32, + &rap_frame, + sizeof(u32)); + if (rc) + i_vpr_e(inst, "%s: set property failed\n", __func__); + return rc; +} + static int msm_vdec_set_thumbnail_mode(struct msm_vidc_inst *inst, enum msm_vidc_port_type port) { @@ -561,6 +611,7 @@ static int msm_vdec_set_thumbnail_mode(struct msm_vidc_inst *inst, return -EINVAL; } + thumbnail_mode = inst->capabilities->cap[THUMBNAIL_MODE].value; i_vpr_h(inst, "%s: thumbnail mode: %d", __func__, thumbnail_mode); rc = venus_hfi_session_property(inst, HFI_PROP_THUMBNAIL_MODE, @@ -675,6 +726,14 @@ static int msm_vdec_set_input_properties(struct msm_vidc_inst *inst) if (rc) return rc; + rc = msm_vdec_set_default_header(inst, INPUT_PORT); + if (rc) + return rc; + + rc = msm_vdec_set_rap_frame(inst, INPUT_PORT); + if (rc) + return rc; + rc = msm_vdec_set_realtime(inst, INPUT_PORT); if (rc) return rc; From 97ff8e4a71e3e45364502b783880a09a681eccf8 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Fri, 5 Feb 2021 16:14:14 +0530 Subject: [PATCH 0098/1061] video: driver: handle encoder repeat buffer scenario Encoder yuv buffer dma_buffer addr can repeat. So donot attempt to add same buffer node again. Change-Id: Ic43e1704d4e355c5e98ee059e03107087260f202 Signed-off-by: Govindaraj Rajagopal --- driver/vidc/src/msm_vidc_driver.c | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index eceb681e6d..44d90b2b6e 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -1376,22 +1376,21 @@ struct msm_vidc_buffer *msm_vidc_get_driver_buf(struct msm_vidc_inst *inst, /* for encoder, treat the repeated buffer as new buffer */ if (is_encode_session(inst) && vb2->type == INPUT_MPLANE) found = false; - } else { + } + if (!found) { buf = kzalloc(sizeof(struct msm_vidc_buffer), GFP_KERNEL); if (!buf) { i_vpr_e(inst, "%s: alloc failed\n", __func__); goto error; } - INIT_LIST_HEAD(&buf->list); buf->dmabuf = dmabuf; + INIT_LIST_HEAD(&buf->list); + list_add_tail(&buf->list, &buffers->list); } rc = vb2_buffer_to_driver(vb2, buf); if (rc) goto error; - if (!found) - list_add_tail(&buf->list, &buffers->list); - rc = msm_vidc_map_driver_buf(inst, buf); if (rc) goto error; From 899cd05a06e5fafec086827c3193ba577b4b92e2 Mon Sep 17 00:00:00 2001 From: Chinmay Sawarkar Date: Mon, 1 Feb 2021 14:55:27 -0800 Subject: [PATCH 0099/1061] video: driver: Enable video subcache Enable video subcaches. Change-Id: I193c5dd6bb02f87c4576f5b9dbbeee31116e1858 Signed-off-by: Chinmay Sawarkar --- driver/vidc/inc/venus_hfi.h | 21 ----- driver/vidc/src/venus_hfi.c | 151 +++++++++++++++++++++--------------- 2 files changed, 89 insertions(+), 83 deletions(-) diff --git a/driver/vidc/inc/venus_hfi.h b/driver/vidc/inc/venus_hfi.h index 57a0dbcea5..ab7ea11915 100644 --- a/driver/vidc/inc/venus_hfi.h +++ b/driver/vidc/inc/venus_hfi.h @@ -17,17 +17,6 @@ #define VIDC_MAX_SUBCACHES 4 #define VIDC_MAX_SUBCACHE_SIZE 52 -enum vidc_resource_id { - VIDC_RESOURCE_NONE, - VIDC_RESOURCE_SYSCACHE, - VIDC_UNUSED_RESOURCE = 0x10000000, -}; - -struct vidc_resource_hdr { - enum vidc_resource_id resource_id; - void *resource_handle; -}; - struct vidc_buffer_addr_info { enum msm_vidc_buffer_type buffer_type; u32 buffer_size; @@ -37,17 +26,7 @@ struct vidc_buffer_addr_info { u32 extradata_size; u32 response_required; }; -#if 0 -struct hfi_resource_subcache_type { - u32 size; - u32 sc_id; -}; -struct hfi_resource_syscache_info_type { - u32 num_entries; - struct hfi_resource_subcache_type rg_subcache_entries[1]; -}; -#endif int venus_hfi_session_property(struct msm_vidc_inst *inst, u32 pkt_type, u32 flags, u32 port, u32 payload_type, void *payload, u32 payload_size); diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index 17cf71b0f9..16a4a24f7d 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -166,7 +166,7 @@ bool __core_in_valid_state(struct msm_vidc_core *core) return core->state == MSM_VIDC_CORE_INIT; } -static bool is_sys_cache_present(struct msm_vidc_core *core) +bool is_sys_cache_present(struct msm_vidc_core *core) { return core->dt->sys_cache_present; } @@ -1759,46 +1759,62 @@ int __disable_regulators(struct msm_vidc_core *core) static int __release_subcaches(struct msm_vidc_core *core) { -#if 0 // TODO - struct subcache_info *sinfo; int rc = 0; - u32 c = 0; - u32 resource[VIDC_MAX_SUBCACHE_SIZE]; - struct hfi_resource_syscache_info_type *sc_res_info; - struct hfi_resource_subcache_type *sc_res; - struct vidc_resource_hdr rhdr; + struct subcache_info* sinfo; + struct hfi_buffer buf; if (msm_vidc_syscache_disable || !is_sys_cache_present(core)) return 0; - memset((void *)resource, 0x0, (sizeof(u32) * VIDC_MAX_SUBCACHE_SIZE)); + if (!core->dt->sys_cache_res_set) { + d_vpr_h("Subcaches not set to Venus\n"); + return 0; + } - sc_res_info = (struct hfi_resource_syscache_info_type *)resource; - sc_res = &(sc_res_info->rg_subcache_entries[0]); + rc = hfi_create_header(core->packet, core->packet_size, + 0, core->header_id++); + if (rc) + return rc; + + memset(&buf, 0, sizeof(struct hfi_buffer)); + buf.type = HFI_BUFFER_SUBCACHE; + buf.flags = HFI_BUF_HOST_FLAG_RELEASE; - /* Release resource command to Venus */ venus_hfi_for_each_subcache_reverse(core, sinfo) { - if (sinfo->isset) { - /* Update the entry */ - sc_res[c].size = sinfo->subcache->slice_size; - sc_res[c].sc_id = sinfo->subcache->slice_id; - c++; - sinfo->isset = false; + if (sinfo->isactive) { + buf.index = sinfo->subcache->slice_id; + buf.buffer_size = sinfo->subcache->slice_size; + + rc = hfi_create_packet(core->packet, + core->packet_size, + HFI_CMD_BUFFER, + HFI_BUF_HOST_FLAG_NONE, + HFI_PAYLOAD_STRUCTURE, + HFI_PORT_NONE, + core->packet_id++, + &buf, + sizeof(buf)); + if (rc) + return rc; } } - if (c > 0) { - d_vpr_h("Releasing %d subcaches\n", c); - rhdr.resource_handle = sc_res_info; /* cookie */ - rhdr.resource_id = VIDC_RESOURCE_SYSCACHE; + /* Set resource to Venus for activated subcaches */ + rc = __iface_cmdq_write(core, core->packet); + if (rc) + return rc; - rc = __core_release_resource(core, &rhdr); - if (rc) - d_vpr_e("Failed to release %d subcaches\n", c); + venus_hfi_for_each_subcache_reverse(core, sinfo) { + if (sinfo->isactive) { + sinfo->isset = false; + d_vpr_h("Release Subcache id %d size %d done\n", + sinfo->subcache->slice_id, + sinfo->subcache->slice_size); + } } core->dt->sys_cache_res_set = false; -#endif + return 0; } @@ -1857,69 +1873,76 @@ static int __enable_subcaches(struct msm_vidc_core *core) err_activate_fail: __release_subcaches(core); __disable_subcaches(core); - return 0; + return rc; } static int __set_subcaches(struct msm_vidc_core *core) { -#if 0 // TODO int rc = 0; - u32 c = 0; struct subcache_info *sinfo; - u32 resource[VIDC_MAX_SUBCACHE_SIZE]; - struct hfi_resource_syscache_info_type *sc_res_info; - struct hfi_resource_subcache_type *sc_res; - struct vidc_resource_hdr rhdr; + struct hfi_buffer buf; + + if (msm_vidc_syscache_disable || + !is_sys_cache_present(core)) { + return 0; + } if (core->dt->sys_cache_res_set) { d_vpr_h("Subcaches already set to Venus\n"); return 0; } - memset((void *)resource, 0x0, (sizeof(u32) * VIDC_MAX_SUBCACHE_SIZE)); + rc = hfi_create_header(core->packet, core->packet_size, + 0, core->header_id++); + if (rc) + goto err_fail_set_subacaches; - sc_res_info = (struct hfi_resource_syscache_info_type *)resource; - sc_res = &(sc_res_info->rg_subcache_entries[0]); + memset(&buf, 0, sizeof(struct hfi_buffer)); + buf.type = HFI_BUFFER_SUBCACHE; + buf.flags = HFI_BUF_HOST_FLAG_NONE; venus_hfi_for_each_subcache(core, sinfo) { if (sinfo->isactive) { - sc_res[c].size = sinfo->subcache->slice_size; - sc_res[c].sc_id = sinfo->subcache->slice_id; - c++; + buf.index = sinfo->subcache->slice_id; + buf.buffer_size = sinfo->subcache->slice_size; + + rc = hfi_create_packet(core->packet, + core->packet_size, + HFI_CMD_BUFFER, + HFI_BUF_HOST_FLAG_NONE, + HFI_PAYLOAD_STRUCTURE, + HFI_PORT_NONE, + core->packet_id++, + &buf, + sizeof(buf)); + if (rc) + goto err_fail_set_subacaches; } } /* Set resource to Venus for activated subcaches */ - if (c) { - d_vpr_h("Setting %d Subcaches\n", c); - - rhdr.resource_handle = sc_res_info; /* cookie */ - rhdr.resource_id = VIDC_RESOURCE_SYSCACHE; - - sc_res_info->num_entries = c; - - rc = __core_set_resource(core, &rhdr, (void *)sc_res_info); - if (rc) { - d_vpr_e("Failed to set subcaches %d\n", rc); - goto err_fail_set_subacaches; + rc = __iface_cmdq_write(core, core->packet); + if (rc) + goto err_fail_set_subacaches; + + venus_hfi_for_each_subcache(core, sinfo) { + if (sinfo->isactive) { + sinfo->isset = true; + d_vpr_h("Set Subcache id %d size %d done\n", + sinfo->subcache->slice_id, + sinfo->subcache->slice_size); } - - venus_hfi_for_each_subcache(core, sinfo) { - if (sinfo->isactive) - sinfo->isset = true; - } - - d_vpr_h("Set Subcaches done to Venus\n"); - core->dt->sys_cache_res_set = true; } + + core->dt->sys_cache_res_set = true; return 0; err_fail_set_subacaches: __disable_subcaches(core); -#endif - return 0; + return rc; } + /* static int __set_ubwc_config(struct msm_vidc_core *core) { @@ -2099,7 +2122,11 @@ static int __resume(struct msm_vidc_core *core) } __sys_set_debug(core, (msm_vidc_debug & FW_LOGMASK) >> FW_LOGSHIFT); - __enable_subcaches(core); + rc = __enable_subcaches(core); + if (rc) { + d_vpr_e("Failed to activate subcache\n"); + goto err_reset_core; + } __set_subcaches(core); d_vpr_h("Resumed from power collapse\n"); From 508102a802258eae198c8f3c3badfda4a982e88e Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Fri, 5 Feb 2021 16:32:06 -0800 Subject: [PATCH 0100/1061] video: driver: Add support to update buffer flags Add support to added buf flags in dequeued buffers based on HFI_PROP_NO_OUTPUT and HFI_PROP_PICTURE_TYPE property values received from video fw. Change-Id: Icf285ab7feb88daf8991705964ed0d3214c99870 Signed-off-by: Akshata Sahukar --- driver/vidc/inc/msm_vidc_inst.h | 1 + driver/vidc/inc/msm_vidc_internal.h | 12 ++ driver/vidc/src/venus_hfi_response.c | 304 +++++++++++++++++---------- 3 files changed, 205 insertions(+), 112 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_inst.h b/driver/vidc/inc/msm_vidc_inst.h index 7267132411..6ab73bc6c3 100644 --- a/driver/vidc/inc/msm_vidc_inst.h +++ b/driver/vidc/inc/msm_vidc_inst.h @@ -118,6 +118,7 @@ struct msm_vidc_inst { bool subscribed_input_prop; bool subscribed_output_prop; struct msm_vidc_subscription_params subcr_params[MAX_PORT]; + struct msm_vidc_frame_properties frame_prop; struct msm_vidc_decode_batch decode_batch; struct msm_vidc_decode_vpp_delay decode_vpp_delay; struct msm_vidc_session_idle session_idle; diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 2be0882b89..1167f51bc2 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -602,6 +602,18 @@ struct msm_vidc_subscription_params { u32 tier; }; +struct msm_vidc_frame_properties { + u32 hfi_picture_type; + u32 hfi_no_output; + u32 hfi_cr; + u32 hfi_cf; +}; + +struct msm_vidc_cmd_range { + u32 begin; + u32 end; +}; + struct msm_vidc_decode_vpp_delay { bool enable; u32 size; diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index a70fc5674e..38e71eb1ec 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -386,6 +386,40 @@ static int handle_session_drain(struct msm_vidc_inst *inst, return 0; } +static int get_driver_buffer_flags(struct msm_vidc_inst *inst, u32 hfi_flags) +{ + u32 driver_flags = 0; + + if (inst->frame_prop.hfi_picture_type & HFI_PICTURE_IDR) { + driver_flags |= MSM_VIDC_BUF_FLAG_KEYFRAME; + } else if (inst->frame_prop.hfi_picture_type & HFI_PICTURE_P) { + driver_flags |= MSM_VIDC_BUF_FLAG_PFRAME; + } else if (inst->frame_prop.hfi_picture_type & HFI_PICTURE_B) { + driver_flags |= MSM_VIDC_BUF_FLAG_BFRAME; + } else if (inst->frame_prop.hfi_picture_type & HFI_PICTURE_I) { + if (inst->codec == MSM_VIDC_VP9) + driver_flags |= MSM_VIDC_BUF_FLAG_KEYFRAME; + } else if (inst->frame_prop.hfi_picture_type & HFI_PICTURE_CRA) { + driver_flags |= MSM_VIDC_BUF_FLAG_KEYFRAME; + } else if (inst->frame_prop.hfi_picture_type & HFI_PICTURE_BLA) { + driver_flags |= MSM_VIDC_BUF_FLAG_KEYFRAME; + } + + if (inst->capabilities->cap[META_BUF_TAG].value) { + if (inst->frame_prop.hfi_no_output && + !(hfi_flags & HFI_BUF_FW_FLAG_CODEC_CONFIG)) + driver_flags |= MSM_VIDC_BUF_FLAG_ERROR; + } + + if (hfi_flags & HFI_BUF_FW_FLAG_CODEC_CONFIG) + driver_flags |= MSM_VIDC_BUF_FLAG_CODECCONFIG; + + if (hfi_flags & HFI_BUF_FW_FLAG_LAST) + driver_flags |= MSM_VIDC_BUF_FLAG_LAST; + + return driver_flags; +} + static int handle_input_buffer(struct msm_vidc_inst *inst, struct hfi_buffer *buffer) { @@ -414,17 +448,9 @@ static int handle_input_buffer(struct msm_vidc_inst *inst, buf->data_size = buffer->data_size; buf->attr &= ~MSM_VIDC_ATTR_QUEUED; buf->attr |= MSM_VIDC_ATTR_DEQUEUED; + buf->flags = 0; - //todo: - /*if (buffer->flags & HFI_BUF_FW_FLAG_CORRUPT) { - i_vpr_h(inst, "%s: data corrupted\n", __func__); - buf->flags |= MSM_VIDC_BUF_FLAG_ERROR; - } - if (buffer->flags & HFI_BUF_FW_FLAG_UNSUPPORTED) { - i_vpr_e(inst, "%s: unsupported input\n", __func__); - buf->flags |= MSM_VIDC_BUF_FLAG_ERROR; - // TODO: move inst->state to error state - }*/ + buf->flags = get_driver_buffer_flags(inst, buffer->flags); print_vidc_buffer(VIDC_HIGH, "EBD", inst, buf); msm_vidc_debugfs_update(inst, MSM_VIDC_DEBUGFS_EVENT_EBD); @@ -467,21 +493,10 @@ static int handle_output_buffer(struct msm_vidc_inst *inst, else buf->attr &= ~MSM_VIDC_ATTR_READ_ONLY; - buf->flags = 0; - //todo: moved to HFI_PROP_PICTURE_TYPE - /*if (buffer->flags & HFI_BUF_FW_FLAG_KEYFRAME) - buf->flags |= MSM_VIDC_BUF_FLAG_KEYFRAME;*/ - //moved to HFI_INFO_DATA_CORRUPT - /*if (buffer->flags & HFI_BUF_FW_FLAG_CORRUPT) - buf->flags |= MSM_VIDC_BUF_FLAG_ERROR;*/ - if (buffer->flags & HFI_BUF_FW_FLAG_CODEC_CONFIG) - buf->flags |= MSM_VIDC_BUF_FLAG_CODECCONFIG; - //moved to HFI_PROP_SUBFRAME_OUTPUT - /*if (buffer->flags & HFI_BUF_FW_FLAG_SUBFRAME) - buf->flags |= MSM_VIDC_BUF_FLAG_SUBFRAME;*/ - if (buffer->flags & HFI_BUF_FW_FLAG_LAST) - buf->flags |= MSM_VIDC_BUF_FLAG_LAST; + buf->flags = 0; + buf->flags = get_driver_buffer_flags(inst, buffer->flags); + print_vidc_buffer(VIDC_HIGH, "FBD", inst, buf); msm_vidc_debugfs_update(inst, MSM_VIDC_DEBUGFS_EVENT_FBD); @@ -894,9 +909,26 @@ static int handle_session_buffer(struct msm_vidc_inst *inst, static int handle_port_settings_change(struct msm_vidc_inst *inst, struct hfi_packet *pkt) { + int rc = 0; + i_vpr_h(inst, "%s: Received port settings change, type %d\n", __func__, pkt->port); - return 0; + + if (pkt->port == HFI_PORT_RAW) { + print_psc_properties(VIDC_HIGH, "OUTPUT_PSC", inst, + inst->subcr_params[OUTPUT_PORT]); + rc = msm_vdec_output_port_settings_change(inst); + } else if (pkt->port == HFI_PORT_BITSTREAM) { + print_psc_properties(VIDC_HIGH, "INPUT_PSC", inst, + inst->subcr_params[INPUT_PORT]); + rc = msm_vdec_input_port_settings_change(inst); + } else { + i_vpr_e(inst, "%s: invalid port type: %#x\n", + __func__, pkt->port); + rc = -EINVAL; + } + + return rc; } static int handle_session_subscribe_mode(struct msm_vidc_inst *inst, @@ -958,6 +990,7 @@ static int handle_session_command(struct msm_vidc_inst *inst, static int handle_session_property(struct msm_vidc_inst *inst, struct hfi_packet *pkt) { + int rc = 0; u32 port; u32 *payload_ptr; @@ -998,12 +1031,33 @@ static int handle_session_property(struct msm_vidc_inst *inst, case HFI_PROP_TIER: inst->subcr_params[port].tier = payload_ptr[0]; break; + case HFI_PROP_PICTURE_TYPE: + if (is_encode_session(inst) && port == INPUT_PORT) { + rc = -EINVAL; + i_vpr_e(inst, + "%s: invalid port: %d for property %#x\n", + __func__, pkt->port, pkt->type); + break; + } + inst->frame_prop.hfi_picture_type = payload_ptr[0]; + break; + case HFI_PROP_NO_OUTPUT: + if (port != INPUT_PORT) { + rc = -EINVAL; + i_vpr_e(inst, + "%s: invalid port: %d for property %#x\n", + __func__, pkt->port, pkt->type); + break; + } + inst->frame_prop.hfi_no_output = 1; + break; default: i_vpr_e(inst, "%s: invalid port settings property %#x\n", __func__, pkt->type); return -EINVAL; } - return 0; + + return rc; } static int handle_image_version_property(struct msm_vidc_core *core, @@ -1096,16 +1150,48 @@ exit: return rc; } +static int process_response_packet(struct msm_vidc_inst *inst, + struct hfi_packet *packet) +{ + int rc = 0; + + if (packet->type > HFI_CMD_BEGIN && + packet->type < HFI_CMD_END) { + rc = handle_session_command(inst, packet); + } else if (packet->type > HFI_PROP_BEGIN && + packet->type < HFI_PROP_END) { + rc = handle_session_property(inst, packet); + } else if (packet->type > HFI_SESSION_ERROR_BEGIN && + packet->type < HFI_SESSION_ERROR_END) { + rc = handle_session_error(inst, packet); + } else if (packet->type > HFI_INFORMATION_BEGIN && + packet->type < HFI_INFORMATION_END) { + rc = handle_session_info(inst, packet); + } else { + i_vpr_e(inst, "%s: Unknown packet type: %#x\n", + __func__, packet->type); + rc = -EINVAL; + } + + return rc; +} + int handle_session_response_work(struct msm_vidc_inst *inst, struct response_work *resp_work) { int rc = 0; struct hfi_header *hdr = NULL; struct hfi_packet *packet; - u8 *pkt, *temp_pkt; + u8 *pkt, *start_pkt; u32 hfi_cmd_type = 0; - u32 hfi_port = 0; - int i; + int i, j; + struct msm_vidc_cmd_range be[5] = { + {HFI_SYSTEM_ERROR_BEGIN, HFI_SYSTEM_ERROR_END}, + {HFI_SESSION_ERROR_BEGIN, HFI_SESSION_ERROR_END}, + {HFI_PROP_BEGIN, HFI_PROP_END}, + {HFI_CMD_BEGIN, HFI_CMD_END}, + {HFI_INFORMATION_BEGIN, HFI_INFORMATION_END}, + }; if (!inst || !resp_work) { d_vpr_e("%s: invalid params\n", __func__); @@ -1119,47 +1205,42 @@ int handle_session_response_work(struct msm_vidc_inst *inst, } hfi_cmd_type = 0; - hfi_port = 0; pkt = (u8 *)((u8 *)hdr + sizeof(struct hfi_header)); - temp_pkt = pkt; + start_pkt = pkt; + /* validate all packets */ for (i = 0; i < hdr->num_packets; i++) { + packet = (struct hfi_packet * ) pkt; if (validate_packet(pkt, resp_work->data, resp_work->data_size, __func__)) { rc = -EINVAL; goto exit; } - packet = (struct hfi_packet *)pkt; - if (packet->type > HFI_CMD_BEGIN && - packet->type < HFI_CMD_END) { - if (hfi_cmd_type == HFI_CMD_SETTINGS_CHANGE) { - i_vpr_e(inst, - "%s: invalid packet type %d in port settings change\n", - __func__, packet->type); - rc = -EINVAL; - goto exit; - } - hfi_cmd_type = packet->type; - hfi_port = packet->port; - rc = handle_session_command(inst, packet); - } else if (packet->type > HFI_PROP_BEGIN && - packet->type < HFI_PROP_END) { - rc = handle_session_property(inst, packet); - } else if (packet->type > HFI_SESSION_ERROR_BEGIN && - packet->type < HFI_SESSION_ERROR_END) { - rc = handle_session_error(inst, packet); - } else if (packet->type > HFI_INFORMATION_BEGIN && - packet->type < HFI_INFORMATION_END) { - rc = handle_session_info(inst, packet); - } else { - i_vpr_e(inst, "%s: Unknown packet type: %#x\n", - __func__, packet->type); - rc = -EINVAL; - goto exit; - } pkt += packet->size; } + memset(&inst->frame_prop, 0, + sizeof(struct msm_vidc_frame_properties)); + for (i = 0; i < ARRAY_SIZE(be); i++) { + pkt = start_pkt; + for (j = 0; j < hdr->num_packets; j++) { + packet = (struct hfi_packet * ) pkt; + if (packet->type > be[i].begin + && packet->type < be[i].end) { + if (hfi_cmd_type == HFI_CMD_SETTINGS_CHANGE) { + i_vpr_e(inst, + "%s: invalid packet type %d in port settings change\n", + __func__, packet->type); + rc = -EINVAL; + } + hfi_cmd_type = packet->type; + rc = process_response_packet(inst, packet); + if (rc) + goto exit; + } + pkt += packet->size; + } + } if (hfi_cmd_type == HFI_CMD_BUFFER) { rc = handle_dequeue_buffers(inst); @@ -1167,24 +1248,8 @@ int handle_session_response_work(struct msm_vidc_inst *inst, goto exit; } - if (hfi_cmd_type == HFI_CMD_SETTINGS_CHANGE) { - if (hfi_port == HFI_PORT_RAW) { - print_psc_properties(VIDC_HIGH, "OUTPUT_PSC", inst, - inst->subcr_params[OUTPUT_PORT]); - rc = msm_vdec_output_port_settings_change(inst); - if (rc) - goto exit; - } else if (hfi_port == HFI_PORT_BITSTREAM) { - print_psc_properties(VIDC_HIGH, "INPUT_PSC", inst, - inst->subcr_params[INPUT_PORT]); - rc = msm_vdec_input_port_settings_change(inst); - if (rc) - goto exit; - } else { - i_vpr_e(inst, "%s: invalid port type: %#x\n", - __func__, hfi_port); - } - } + memset(&inst->frame_prop, 0, + sizeof(struct msm_vidc_frame_properties)); exit: return rc; @@ -1283,10 +1348,17 @@ static int handle_session_response(struct msm_vidc_core *core, int rc = 0; struct msm_vidc_inst *inst; struct hfi_packet *packet; - u8 *pkt; + u8 *pkt, *start_pkt; u32 hfi_cmd_type = 0; u32 hfi_port = 0; - int i; + int i, j; + struct msm_vidc_cmd_range be[5] = { + {HFI_SYSTEM_ERROR_BEGIN, HFI_SYSTEM_ERROR_END}, + {HFI_SESSION_ERROR_BEGIN, HFI_SESSION_ERROR_END}, + {HFI_PROP_BEGIN, HFI_PROP_END}, + {HFI_CMD_BEGIN, HFI_CMD_END}, + {HFI_INFORMATION_BEGIN, HFI_INFORMATION_END}, + }; inst = get_inst(core, hdr->session_id); if (!inst) { @@ -1298,58 +1370,66 @@ static int handle_session_response(struct msm_vidc_core *core, hfi_cmd_type = 0; hfi_port = 0; pkt = (u8 *)((u8 *)hdr + sizeof(struct hfi_header)); + start_pkt = pkt; + /* validate all packets */ for (i = 0; i < hdr->num_packets; i++) { + packet = (struct hfi_packet * ) pkt; if (validate_packet(pkt, core->response_packet, core->packet_size, __func__)) { rc = -EINVAL; goto exit; } - packet = (struct hfi_packet *)pkt; - if (packet->type > HFI_CMD_BEGIN && - packet->type < HFI_CMD_END) { - if (packet->type == HFI_CMD_SETTINGS_CHANGE) { - if (packet->port == HFI_PORT_BITSTREAM) - rc = queue_response_work(inst, RESP_WORK_INPUT_PSC, - (void *)hdr, hdr->size); - else if (packet->port == HFI_PORT_RAW) - rc = queue_response_work(inst, RESP_WORK_OUTPUT_PSC, - (void *)hdr, hdr->size); - goto exit; - } else if (packet->type == HFI_CMD_BUFFER && - packet->port == HFI_PORT_RAW && - check_last_flag(inst, packet)) { - rc = queue_response_work(inst, RESP_WORK_LAST_FLAG, + pkt += packet->size; + } + + pkt = start_pkt; + for (j = 0; j < hdr->num_packets; j++) { + packet = (struct hfi_packet * ) pkt; + if (packet->type == HFI_CMD_SETTINGS_CHANGE) { + if (packet->port == HFI_PORT_BITSTREAM) + rc = queue_response_work(inst, + RESP_WORK_INPUT_PSC, (void *)hdr, hdr->size); - goto exit; - } - hfi_cmd_type = packet->type; - hfi_port = packet->port; - rc = handle_session_command(inst, packet); - } else if (packet->type > HFI_PROP_BEGIN && - packet->type < HFI_PROP_END) { - rc = handle_session_property(inst, packet); - } else if (packet->type > HFI_SESSION_ERROR_BEGIN && - packet->type < HFI_SESSION_ERROR_END) { - rc = handle_session_error(inst, packet); - } else if (packet->type > HFI_INFORMATION_BEGIN && - packet->type < HFI_INFORMATION_END) { - rc = handle_session_info(inst, packet); - } else { - i_vpr_e(inst, "%s: Unknown packet type: %#x\n", - __func__, packet->type); - rc = -EINVAL; + else if (packet->port == HFI_PORT_RAW) + rc = queue_response_work(inst, + RESP_WORK_OUTPUT_PSC, + (void *)hdr, hdr->size); + goto exit; + } else if (packet->type == HFI_CMD_BUFFER && + packet->port == HFI_PORT_RAW && + check_last_flag(inst, packet)) { + rc = queue_response_work(inst, + RESP_WORK_LAST_FLAG, + (void *)hdr, hdr->size); goto exit; } pkt += packet->size; } + memset(&inst->frame_prop, 0, sizeof(struct msm_vidc_frame_properties)); + for (i = 0; i < ARRAY_SIZE(be); i++) { + pkt = start_pkt; + for (j = 0; j < hdr->num_packets; j++) { + packet = (struct hfi_packet * ) pkt; + if (packet->type > be[i].begin && packet->type < be[i].end) { + hfi_cmd_type = packet->type; + rc = process_response_packet(inst, packet); + if (rc) + goto exit; + } + pkt += packet->size; + } + } + if (hfi_cmd_type == HFI_CMD_BUFFER) { rc = handle_dequeue_buffers(inst); if (rc) goto exit; } + memset(&inst->frame_prop, 0, sizeof(struct msm_vidc_frame_properties)); + exit: mutex_unlock(&inst->lock); put_inst(inst); From 9c98bcf3981ded557e34a81a2802f5507539b2e8 Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Mon, 8 Feb 2021 14:16:12 -0800 Subject: [PATCH 0101/1061] video: driver: handle multiple read only buffers when fw sends FBDs with read only flag for second time, do not send vb2 buffer done on that buffer. Change-Id: Iacf6fe87403664f2063b9d2e1859323506fa22a8 Signed-off-by: Darshana Patil --- driver/vidc/inc/msm_vidc_internal.h | 1 + driver/vidc/src/venus_hfi_response.c | 21 +++++++++++++++++++-- 2 files changed, 20 insertions(+), 2 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 2be0882b89..57e6283144 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -160,6 +160,7 @@ enum msm_vidc_buffer_attributes { MSM_VIDC_ATTR_PENDING_RELEASE = BIT(2), MSM_VIDC_ATTR_QUEUED = BIT(3), MSM_VIDC_ATTR_DEQUEUED = BIT(4), + MSM_VIDC_ATTR_BUFFER_DONE = BIT(5), }; enum msm_vidc_buffer_region { diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index a70fc5674e..a25f77a075 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -462,7 +462,14 @@ static int handle_output_buffer(struct msm_vidc_inst *inst, buf->attr &= ~MSM_VIDC_ATTR_QUEUED; buf->attr |= MSM_VIDC_ATTR_DEQUEUED; - if (buffer->flags & HFI_BUF_FW_FLAG_READONLY) + /* + * reset read only flag for a zero length + * buffer (if marked read only) + */ + if (buffer->flags & HFI_BUF_FW_FLAG_READONLY && + !buffer->data_size) + buf->attr &= ~MSM_VIDC_ATTR_READ_ONLY; + else if (buffer->flags & HFI_BUF_FW_FLAG_READONLY) buf->attr |= MSM_VIDC_ATTR_READ_ONLY; else buf->attr &= ~MSM_VIDC_ATTR_READ_ONLY; @@ -581,7 +588,17 @@ static int handle_dequeue_buffers(struct msm_vidc_inst* inst) list_for_each_entry_safe(buf, dummy, &buffers->list, list) { if (buf->attr & MSM_VIDC_ATTR_DEQUEUED) { buf->attr &= ~MSM_VIDC_ATTR_DEQUEUED; - msm_vidc_vb2_buffer_done(inst, buf); + /* + * do not send vb2_buffer_done when fw sends FBDs + * with read only flag for second time + */ + if ((buf->attr & MSM_VIDC_ATTR_BUFFER_DONE) && + buf->attr & MSM_VIDC_ATTR_READ_ONLY){ + print_vidc_buffer(VIDC_HIGH, "vb2 done already", inst, buf); + } else { + buf->attr |= MSM_VIDC_ATTR_BUFFER_DONE; + msm_vidc_vb2_buffer_done(inst, buf); + } /* do not unmap / delete read only buffer */ if (!(buf->attr & MSM_VIDC_ATTR_READ_ONLY)) msm_vidc_put_driver_buf(inst, buf); From 691eb8dfa549f589724da6c4a099115314b56c88 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Mon, 8 Feb 2021 16:06:53 -0800 Subject: [PATCH 0102/1061] video: driver: Add support for CQ bitrate mode Add CQ bitrate mode support. Also add related constant quality control support. Change-Id: I415423e76dc855a7a72e1b68062b9d49433f3ed3 Signed-off-by: Akshata Sahukar --- driver/platform/waipio/src/msm_vidc_waipio.c | 37 +++++++++++++++----- driver/vidc/inc/msm_vidc_control.h | 2 ++ driver/vidc/inc/msm_vidc_internal.h | 1 + driver/vidc/src/msm_vidc_control.c | 32 +++++++++++++++-- 4 files changed, 61 insertions(+), 11 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 8a08ec3717..c3deb9c027 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -27,6 +27,7 @@ #define MIN_QP_8BIT 0 #define MAX_QP 51 #define DEFAULT_QP 20 +#define MAX_CONSTANT_QUALITY 100 #define UBWC_CONFIG(mc, ml, hbb, bs1, bs2, bs3, bsp) \ { \ @@ -299,17 +300,32 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {0}, {0}, NULL, msm_vidc_set_u32}, - {BITRATE_MODE, ENC, CODECS_ALL, + {BITRATE_MODE, ENC, H264, V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, V4L2_MPEG_VIDEO_BITRATE_MODE_CBR, - /* TODO: CQ. For more info: go/videogki */ BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_VBR) | BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CBR), V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, V4L2_CID_MPEG_VIDEO_BITRATE_MODE, HFI_PROP_RATE_CONTROL, CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, {LTR_COUNT, IR_RANDOM, TIME_DELTA_BASED_RC, I_FRAME_QP}, + {0}, + {LTR_COUNT, IR_RANDOM, TIME_DELTA_BASED_RC, I_FRAME_QP}, + msm_vidc_adjust_bitrate_mode, msm_vidc_set_u32_enum}, + + {BITRATE_MODE, ENC, HEVC, + V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, + V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_VBR) | + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CBR) | + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CQ), + V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, + V4L2_CID_MPEG_VIDEO_BITRATE_MODE, + HFI_PROP_RATE_CONTROL, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {0}, + {LTR_COUNT, IR_RANDOM, TIME_DELTA_BASED_RC, + I_FRAME_QP, CONSTANT_QUALITY}, msm_vidc_adjust_bitrate_mode, msm_vidc_set_u32_enum}, {LOSSLESS, ENC, HEVC, @@ -319,17 +335,22 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {FRAME_SKIP_MODE, ENC, CODECS_ALL, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE}, - /* TODO(AS): uncomment once below v4l2 id is - * available (post 5.4 kernel) - */ - //V4L2_CID_MPEG_VIDEO_FRAME_SKIP_MODE}, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDEO_FRAME_SKIP_MODE}, {FRAME_RC_ENABLE, ENC, CODECS_ALL, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_ENABLE, V4L2_CID_MPEG_VIDEO_FRAME_RC_ENABLE}, + {CONSTANT_QUALITY, ENC, HEVC, + 1, MAX_CONSTANT_QUALITY, 1, 90, + V4L2_CID_MPEG_VIDEO_CONSTANT_QUALITY, + HFI_PROP_CONSTANT_QUALITY, + CAP_FLAG_OUTPUT_PORT, + {BITRATE_MODE}, {0}, + NULL, msm_vidc_set_constant_quality}, + // TODO: GOP dependencies {GOP_SIZE, ENC, CODECS_ALL, 0, INT_MAX, 1, 2 * DEFAULT_FPS - 1, diff --git a/driver/vidc/inc/msm_vidc_control.h b/driver/vidc/inc/msm_vidc_control.h index 85c465725c..874e061a59 100644 --- a/driver/vidc/inc/msm_vidc_control.h +++ b/driver/vidc/inc/msm_vidc_control.h @@ -47,6 +47,8 @@ int msm_vidc_set_u32(void *instance, enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_u32_enum(void *instance, enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_constant_quality(void *instance, + enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_use_and_mark_ltr(void *instance, enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_s32(void *instance, diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index bbbc889b6b..0efc01faaa 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -276,6 +276,7 @@ enum msm_vidc_inst_capability_type { LOSSLESS, FRAME_SKIP_MODE, FRAME_RC_ENABLE, + CONSTANT_QUALITY, GOP_SIZE, GOP_CLOSURE, BLUR_TYPES, diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index ca32ef0ac3..2c96ce6850 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -818,11 +818,9 @@ int msm_vidc_adjust_bitrate_mode(void *instance, struct v4l2_ctrl *ctrl) hfi_value = HFI_RC_CBR_VFR; else hfi_value = HFI_RC_CBR_CFR; - }/* TODO: CQ mode - else if (bitrate_mode == CQ) { + } else if (bitrate_mode == V4L2_MPEG_VIDEO_BITRATE_MODE_CQ) { hfi_value = HFI_RC_CQ; } - */ update: inst->hfi_rc_type = hfi_value; @@ -1241,6 +1239,34 @@ int msm_vidc_set_deblock_mode(void *instance, return rc; } +int msm_vidc_set_constant_quality(void *instance, + enum msm_vidc_inst_capability_type cap_id) +{ + int rc = 0; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; + u32 hfi_value = 0; + s32 rc_type = -1; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (msm_vidc_get_parent_value(inst, cap_id, + BITRATE_MODE, &rc_type, __func__)) + return -EINVAL; + + if (rc_type != HFI_RC_CQ) + return 0; + + hfi_value = inst->capabilities->cap[cap_id].value; + + rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32, + &hfi_value, sizeof(u32), __func__); + + return rc; +} + int msm_vidc_set_use_and_mark_ltr(void *instance, enum msm_vidc_inst_capability_type cap_id) { From 964c0e2b7903def72b1ec9943c2eec0bcf41c00b Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Tue, 9 Feb 2021 11:12:52 -0800 Subject: [PATCH 0103/1061] video: driver: handle zero length, RO last flag buffer reset data size to zero for last flag buffer. reset RO flag for last flag buffer. Change-Id: Idb340217c00ce478d1ec7de338b2ad38da23016d Signed-off-by: Darshana Patil --- driver/vidc/src/venus_hfi_response.c | 22 ++++++++++++++++------ 1 file changed, 16 insertions(+), 6 deletions(-) diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index e8024ae55f..6d9d37597a 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -489,13 +489,23 @@ static int handle_output_buffer(struct msm_vidc_inst *inst, buf->attr &= ~MSM_VIDC_ATTR_QUEUED; buf->attr |= MSM_VIDC_ATTR_DEQUEUED; /* - * reset read only flag for a zero length - * buffer (if marked read only) + * reset data size to zero for last flag buffer. + * reset RO flag for last flag buffer. */ - if (buffer->flags & HFI_BUF_FW_FLAG_READONLY && - !buffer->data_size) - buf->attr &= ~MSM_VIDC_ATTR_READ_ONLY; - else if (buffer->flags & HFI_BUF_FW_FLAG_READONLY) + if (buffer->flags & HFI_BUF_FW_FLAG_LAST) { + if (buffer->data_size) { + i_vpr_e(inst, "%s: reset data size to zero for last flag buffer\n", + __func__); + buffer->data_size = 0; + } + if (buffer->flags & HFI_BUF_FW_FLAG_READONLY) { + i_vpr_e(inst, "%s: reset RO flag for last flag buffer\n", + __func__); + buffer->flags &= ~HFI_BUF_FW_FLAG_READONLY; + } + } + + if (buffer->flags & HFI_BUF_FW_FLAG_READONLY) buf->attr |= MSM_VIDC_ATTR_READ_ONLY; else buf->attr &= ~MSM_VIDC_ATTR_READ_ONLY; From 8cd787ac52e82fdd2aad931e8c0b85e0a687b834 Mon Sep 17 00:00:00 2001 From: Chinmay Sawarkar Date: Tue, 2 Feb 2021 11:56:40 -0800 Subject: [PATCH 0104/1061] video: driver: Set lx arch to fw before fw boot To simplify the boot process, firmware needs to know the type of architecture before it boots up. Change-Id: I42ff87094b816f9783d18fa67126e9b7a4dab320 Signed-off-by: Chinmay Sawarkar --- driver/variant/iris2/src/msm_vidc_iris2.c | 6 +++ driver/vidc/inc/hfi_command.h | 1 - driver/vidc/src/msm_vidc_driver.c | 2 +- driver/vidc/src/venus_hfi.c | 46 ----------------------- driver/vidc/src/venus_hfi_response.c | 2 + 5 files changed, 9 insertions(+), 48 deletions(-) diff --git a/driver/variant/iris2/src/msm_vidc_iris2.c b/driver/variant/iris2/src/msm_vidc_iris2.c index 7702bea65b..dacfc3c51b 100644 --- a/driver/variant/iris2/src/msm_vidc_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_iris2.c @@ -17,6 +17,8 @@ #include "msm_vidc_buffer.h" #include "msm_vidc_debug.h" +#define VIDEO_ARCH_LX 1 + #define VBIF_BASE_OFFS_IRIS2 0x00080000 #define CPU_BASE_OFFS_IRIS2 0x000A0000 #define AON_BASE_OFFS 0x000E0000 @@ -190,6 +192,10 @@ static int __setup_ucregion_memory_map_iris2(struct msm_vidc_core *vidc_core) __write_register(core, CPU_CS_VCICMDARG1_IRIS2, (u32)((u64)core->iface_q_table.align_virtual_addr >> 32)); + if(core->sfr.align_device_addr) + __write_register(core, SFR_ADDR_IRIS2, + (u32)core->sfr.align_device_addr + VIDEO_ARCH_LX); + return 0; } diff --git a/driver/vidc/inc/hfi_command.h b/driver/vidc/inc/hfi_command.h index 62d64df5a1..cafaeea662 100644 --- a/driver/vidc/inc/hfi_command.h +++ b/driver/vidc/inc/hfi_command.h @@ -92,7 +92,6 @@ enum hfi_buffer_type { HFI_BUFFER_RAW = 0x00000002, HFI_BUFFER_METADATA = 0x00000003, HFI_BUFFER_SUBCACHE = 0x00000004, - HFI_BUFFER_SFR = 0x00000005, HFI_BUFFER_DPB = 0x00000006, HFI_BUFFER_BIN = 0x00000007, HFI_BUFFER_LINE = 0x00000008, diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 44d90b2b6e..9ebc735761 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -2580,7 +2580,7 @@ int msm_vidc_core_init(struct msm_vidc_core *core) goto unlock; } - d_vpr_h("%s(): waiting for sys init done, %d ms\n", __func__, + d_vpr_h("%s(): waiting for sys_init_done, %d ms\n", __func__, core->capabilities[HW_RESPONSE_TIMEOUT].value); core_unlock(core, __func__); rc = wait_for_completion_timeout(&core->init_done, msecs_to_jiffies( diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index 90b46450c3..845c2eae19 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -2605,48 +2605,6 @@ static int __sys_init(struct msm_vidc_core *core) return 0; } -static int __queue_sfr_buffer(struct msm_vidc_core *core) -{ - int rc = 0; - struct hfi_buffer buf; - - memset(&buf, 0, sizeof(struct hfi_buffer)); - buf.type = HFI_BUFFER_SFR; - buf.index = 0; - buf.base_address = core->sfr.align_device_addr; - buf.addr_offset = 0; - buf.buffer_size = core->sfr.mem_size; - buf.data_offset = 0; - buf.data_size = 0; - buf.timestamp = 0; - buf.flags = 0; - - rc = hfi_create_header(core->packet, core->packet_size, - 0, core->header_id++); - if (rc) - return rc; - - rc = hfi_create_packet(core->packet, - core->packet_size, - HFI_CMD_BUFFER, - HFI_BUF_HOST_FLAG_NONE, - HFI_PAYLOAD_STRUCTURE, - HFI_PORT_NONE, - core->packet_id++, - &buf, - sizeof(buf)); - if (rc) - return rc; - - rc = __iface_cmdq_write(core, core->packet); - if (rc) - return rc; - - d_vpr_h("SFR buffer packet queued\n"); - - return rc; -} - static int __sys_image_version(struct msm_vidc_core *core) { int rc = 0; @@ -2709,10 +2667,6 @@ int venus_hfi_core_init(struct msm_vidc_core *core) if (rc) goto error; - rc = __queue_sfr_buffer(core); - if (rc) - goto error; - rc = __sys_image_version(core); if (rc) goto error; diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index e8024ae55f..21f6d59043 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -278,6 +278,8 @@ static int handle_system_init(struct msm_vidc_core *core, if (pkt->flags & HFI_FW_FLAGS_SUCCESS) { d_vpr_h("%s: successful\n", __func__); complete(&core->init_done); + } else { + d_vpr_h("%s: unhandled. flags=%d\n", __func__, pkt->flags); } return 0; From cb9cd42f137a3d4fa5ef4178fcf7b54f129d38ec Mon Sep 17 00:00:00 2001 From: Maheshwar Ajja Date: Tue, 9 Feb 2021 17:08:59 -0800 Subject: [PATCH 0105/1061] video: driver: correct firmware debug log prints Print firmware debug log message size to avoid printing extra unnecessary data. Change-Id: Ic6ed1bbbfdfeae9ba31b0bfaf06e15e6c7fc4b78 Signed-off-by: Maheshwar Ajja --- driver/vidc/src/venus_hfi.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index 90b46450c3..6cf0fe1ee2 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -993,13 +993,13 @@ static void __flush_debug_queue(struct msm_vidc_core *core, __func__, pkt->size); continue; } - if (pkt->size > packet_size) { - d_vpr_e("%s: pkt size[%d] > packet_size[%d]\n", + if (pkt->size >= packet_size) { + d_vpr_e("%s: pkt size[%d] >= packet_size[%d]\n", __func__, pkt->size, packet_size); continue; } - packet[packet_size - 1] = '\0'; + packet[pkt->size] = '\0'; /* * All fw messages starts with new line character. This * causes dprintk to print this message in two lines From 0e8d5a08a38ea078193e64bd2048b5a024ac41b0 Mon Sep 17 00:00:00 2001 From: Maheshwar Ajja Date: Tue, 9 Feb 2021 17:14:55 -0800 Subject: [PATCH 0106/1061] video: driver: set firmware debug log cmd in session open Currently firmware debug log command is sent only in system initialization command which is not sufficient as system init cmd will be sent only once during system bootup and hence set firmware debug log cmd in every session open. Change-Id: I5d6cf781ac8f168afd182777a6b8a0579db22d09 Signed-off-by: Maheshwar Ajja --- driver/vidc/src/venus_hfi.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index 90b46450c3..89b4202db6 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -2792,6 +2792,9 @@ int venus_hfi_session_open(struct msm_vidc_inst *inst) goto unlock; } + __sys_set_debug(core, + (msm_vidc_debug & FW_LOGMASK) >> FW_LOGSHIFT); + rc = hfi_packet_session_command(inst, HFI_CMD_OPEN, (HFI_HOST_FLAGS_RESPONSE_REQUIRED | From 21556050827b634d2165b59f5ba329b0eb16a0e4 Mon Sep 17 00:00:00 2001 From: Rohit Kulkarni Date: Wed, 27 Jan 2021 01:18:41 -0800 Subject: [PATCH 0107/1061] video: driver: update fw load-unload functions Update the fw load and fw unload functions to make them non-static to allow calls from other files. Change-Id: I387a884a1274354e78defdf00245bd0108dd61fc Signed-off-by: Rohit Kulkarni --- driver/vidc/inc/venus_hfi.h | 2 ++ driver/vidc/src/venus_hfi.c | 4 ++-- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/driver/vidc/inc/venus_hfi.h b/driver/vidc/inc/venus_hfi.h index ab7ea11915..21624faacf 100644 --- a/driver/vidc/inc/venus_hfi.h +++ b/driver/vidc/inc/venus_hfi.h @@ -71,5 +71,7 @@ int __setup_ucregion_memmap(struct msm_vidc_core *core); int __raise_interrupt(struct msm_vidc_core *core); int __power_off(struct msm_vidc_core *core); bool __core_in_valid_state(struct msm_vidc_core *core); +int __load_fw(struct msm_vidc_core *core); +void __unload_fw(struct msm_vidc_core *core); #endif // _VENUS_HFI_H_ diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index 90b46450c3..29f86a458a 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -2407,7 +2407,7 @@ exit: return rc; } -static int __load_fw(struct msm_vidc_core *core) +int __load_fw(struct msm_vidc_core *core) { int rc = 0; @@ -2462,7 +2462,7 @@ fail_init_res: return rc; } -static void __unload_fw(struct msm_vidc_core *core) +void __unload_fw(struct msm_vidc_core *core) { if (!core->dt->fw_cookie) return; From 40a39d7455baa6c37d40b9f14c6ead5f821bebff Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Wed, 10 Feb 2021 12:32:18 -0800 Subject: [PATCH 0108/1061] video: driver: queue persist buffer as session buffer -queue persist buffer as session buffer at the start of the session for decoder -fix hfi buffer packet parsing when payload is none. Change-Id: I5da2472d00bf85dd328bbdfcbd35074a46522d25 Signed-off-by: Darshana Patil --- driver/vidc/src/hfi_packet.c | 7 +++---- driver/vidc/src/msm_vdec.c | 17 ----------------- driver/vidc/src/msm_vidc_vb2.c | 9 +++++---- driver/vidc/src/venus_hfi_response.c | 6 ++++++ 4 files changed, 14 insertions(+), 25 deletions(-) diff --git a/driver/vidc/src/hfi_packet.c b/driver/vidc/src/hfi_packet.c index 4ec182b56e..3d774ccb3d 100644 --- a/driver/vidc/src/hfi_packet.c +++ b/driver/vidc/src/hfi_packet.c @@ -68,15 +68,14 @@ u32 get_hfi_port_from_buffer_type(struct msm_vidc_inst *inst, case MSM_VIDC_BUF_LINE: hfi_port = HFI_PORT_BITSTREAM; break; - case MSM_VIDC_BUF_PERSIST: - /* TODO: change to HFI_PORT_NONE */ - hfi_port = HFI_PORT_BITSTREAM | HFI_PORT_RAW; - break; case MSM_VIDC_BUF_OUTPUT: case MSM_VIDC_BUF_OUTPUT_META: case MSM_VIDC_BUF_DPB: hfi_port = HFI_PORT_RAW; break; + case MSM_VIDC_BUF_PERSIST: + hfi_port = HFI_PORT_NONE; + break; default: i_vpr_e(inst, "%s: invalid buffer type %d\n", __func__, buffer_type); diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 57807ff76e..a5c66ee1e5 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -802,10 +802,6 @@ static int msm_vdec_get_input_internal_buffers(struct msm_vidc_inst *inst) if (rc) return rc; - rc = msm_vidc_get_internal_buffers(inst, MSM_VIDC_BUF_PERSIST); - if (rc) - return rc; - i_vpr_h(inst, "input internal buffer: min size reuse\n"); i_vpr_h(inst, "bin buffer: %d %d %d\n", inst->buffers.bin.min_count, @@ -823,10 +819,6 @@ static int msm_vdec_get_input_internal_buffers(struct msm_vidc_inst *inst) inst->buffers.line.min_count, inst->buffers.line.size, inst->buffers.line.reuse); - i_vpr_h(inst, "persist buffer: %d %d %d\n", - inst->buffers.persist.min_count, - inst->buffers.persist.size, - inst->buffers.persist.reuse); return rc; } @@ -872,9 +864,6 @@ static int msm_vdec_create_input_internal_buffers(struct msm_vidc_inst *inst) if (rc) return rc; rc = msm_vidc_create_internal_buffers(inst, MSM_VIDC_BUF_LINE); - if (rc) - return rc; - rc = msm_vidc_create_internal_buffers(inst, MSM_VIDC_BUF_PERSIST); if (rc) return rc; @@ -916,9 +905,6 @@ static int msm_vdec_queue_input_internal_buffers(struct msm_vidc_inst *inst) if (rc) return rc; rc = msm_vidc_queue_internal_buffers(inst, MSM_VIDC_BUF_LINE); - if (rc) - return rc; - rc = msm_vidc_queue_internal_buffers(inst, MSM_VIDC_BUF_PERSIST); if (rc) return rc; @@ -961,9 +947,6 @@ static int msm_vdec_release_input_internal_buffers(struct msm_vidc_inst *inst) if (rc) return rc; rc = msm_vidc_release_internal_buffers(inst, MSM_VIDC_BUF_LINE); - if (rc) - return rc; - rc = msm_vidc_release_internal_buffers(inst, MSM_VIDC_BUF_PERSIST); if (rc) return rc; diff --git a/driver/vidc/src/msm_vidc_vb2.c b/driver/vidc/src/msm_vidc_vb2.c index 69c5d8a2de..4c3e71a86f 100644 --- a/driver/vidc/src/msm_vidc_vb2.c +++ b/driver/vidc/src/msm_vidc_vb2.c @@ -176,19 +176,20 @@ int msm_vidc_start_streaming(struct vb2_queue *q, unsigned int count) MSM_VIDC_BUF_ARP); if (rc) goto error; + i_vpr_h(inst, "session internal buffer: min size\n"); i_vpr_h(inst, "arp buffer: %d %d\n", inst->buffers.arp.min_count, inst->buffers.arp.size); } else if(is_decode_session(inst)) { - /* TODO: move persist buf from msm_vdec_streamon_input to here rc = msm_vidc_alloc_and_queue_session_internal_buffers(inst, MSM_VIDC_BUF_PERSIST); if (rc) goto error; - i_vpr_h(inst, "persist buffer: %d %d\n", + i_vpr_h(inst, "session internal buffer: min size reuse\n"); + i_vpr_h(inst, "persist buffer: %d %d %d\n", inst->buffers.persist.min_count, - inst->buffers.persist.size); - */ + inst->buffers.persist.size, + inst->buffers.persist.reuse); } } diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index 0bb6b46a13..299cf34225 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -852,6 +852,12 @@ static int handle_session_buffer(struct msm_vidc_inst *inst, return 0; } + if (pkt->payload_info == HFI_PAYLOAD_NONE) { + i_vpr_h(inst, "%s: received hfi buffer packet without payload\n", + __func__); + return 0; + } + port_type = pkt->port; buffer = (struct hfi_buffer *)((u8 *)pkt + sizeof(struct hfi_packet)); From f451c19147e121cd81ab81813aff2f7fdeaaea9e Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Wed, 10 Feb 2021 13:48:37 -0800 Subject: [PATCH 0109/1061] video: driver: amend V4L2_BUF_FLAG_ERROR flag handling amend MSM_VIDC_BUF_FLAG_ERROR driver EBD/FBD buffer flag handling to properly pass V4L2_BUF_FLAG_ERROR to client. Change-Id: I9de1af3a2b5026e6d281982048f2e7f172221695 Signed-off-by: Akshata Sahukar --- driver/vidc/inc/msm_vidc_inst.h | 2 +- driver/vidc/inc/msm_vidc_internal.h | 11 ++++--- driver/vidc/src/venus_hfi_response.c | 49 ++++++++++++++++++---------- 3 files changed, 38 insertions(+), 24 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_inst.h b/driver/vidc/inc/msm_vidc_inst.h index 6ab73bc6c3..328ad3fb8d 100644 --- a/driver/vidc/inc/msm_vidc_inst.h +++ b/driver/vidc/inc/msm_vidc_inst.h @@ -118,7 +118,7 @@ struct msm_vidc_inst { bool subscribed_input_prop; bool subscribed_output_prop; struct msm_vidc_subscription_params subcr_params[MAX_PORT]; - struct msm_vidc_frame_properties frame_prop; + struct msm_vidc_hfi_frame_info hfi_frame_info; struct msm_vidc_decode_batch decode_batch; struct msm_vidc_decode_vpp_delay decode_vpp_delay; struct msm_vidc_session_idle session_idle; diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 0efc01faaa..171a87fb0f 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -604,11 +604,12 @@ struct msm_vidc_subscription_params { u32 tier; }; -struct msm_vidc_frame_properties { - u32 hfi_picture_type; - u32 hfi_no_output; - u32 hfi_cr; - u32 hfi_cf; +struct msm_vidc_hfi_frame_info { + u32 picture_type; + u32 no_output; + u32 cr; + u32 cf; + u32 data_corrupt; }; struct msm_vidc_cmd_range { diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index 0bb6b46a13..eab02d3c8f 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -211,6 +211,7 @@ static int handle_session_info(struct msm_vidc_inst *inst, break; case HFI_INFO_DATA_CORRUPT: info = "data corrupt"; + inst->hfi_frame_info.data_corrupt = 1; break; default: info = "unknown"; @@ -392,23 +393,26 @@ static int get_driver_buffer_flags(struct msm_vidc_inst *inst, u32 hfi_flags) { u32 driver_flags = 0; - if (inst->frame_prop.hfi_picture_type & HFI_PICTURE_IDR) { + if (inst->hfi_frame_info.picture_type & HFI_PICTURE_IDR) { driver_flags |= MSM_VIDC_BUF_FLAG_KEYFRAME; - } else if (inst->frame_prop.hfi_picture_type & HFI_PICTURE_P) { + } else if (inst->hfi_frame_info.picture_type & HFI_PICTURE_P) { driver_flags |= MSM_VIDC_BUF_FLAG_PFRAME; - } else if (inst->frame_prop.hfi_picture_type & HFI_PICTURE_B) { + } else if (inst->hfi_frame_info.picture_type & HFI_PICTURE_B) { driver_flags |= MSM_VIDC_BUF_FLAG_BFRAME; - } else if (inst->frame_prop.hfi_picture_type & HFI_PICTURE_I) { + } else if (inst->hfi_frame_info.picture_type & HFI_PICTURE_I) { if (inst->codec == MSM_VIDC_VP9) driver_flags |= MSM_VIDC_BUF_FLAG_KEYFRAME; - } else if (inst->frame_prop.hfi_picture_type & HFI_PICTURE_CRA) { + } else if (inst->hfi_frame_info.picture_type & HFI_PICTURE_CRA) { driver_flags |= MSM_VIDC_BUF_FLAG_KEYFRAME; - } else if (inst->frame_prop.hfi_picture_type & HFI_PICTURE_BLA) { + } else if (inst->hfi_frame_info.picture_type & HFI_PICTURE_BLA) { driver_flags |= MSM_VIDC_BUF_FLAG_KEYFRAME; } - if (inst->capabilities->cap[META_BUF_TAG].value) { - if (inst->frame_prop.hfi_no_output && + if (inst->hfi_frame_info.data_corrupt) + driver_flags |= MSM_VIDC_BUF_FLAG_ERROR; + + if (inst->hfi_frame_info.no_output) { + if (inst->capabilities->cap[META_BUF_TAG].value && !(hfi_flags & HFI_BUF_FW_FLAG_CODEC_CONFIG)) driver_flags |= MSM_VIDC_BUF_FLAG_ERROR; } @@ -490,6 +494,15 @@ static int handle_output_buffer(struct msm_vidc_inst *inst, buf->attr &= ~MSM_VIDC_ATTR_QUEUED; buf->attr |= MSM_VIDC_ATTR_DEQUEUED; + + if (is_encode_session(inst)) { + /* encoder output is not expected to be corrupted */ + if (inst->hfi_frame_info.data_corrupt) { + i_vpr_e(inst, "%s: encode output is corrupted\n", __func__); + msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); + } + } + /* * reset data size to zero for last flag buffer. * reset RO flag for last flag buffer. @@ -1068,7 +1081,7 @@ static int handle_session_property(struct msm_vidc_inst *inst, __func__, pkt->port, pkt->type); break; } - inst->frame_prop.hfi_picture_type = payload_ptr[0]; + inst->hfi_frame_info.picture_type = payload_ptr[0]; break; case HFI_PROP_NO_OUTPUT: if (port != INPUT_PORT) { @@ -1078,7 +1091,7 @@ static int handle_session_property(struct msm_vidc_inst *inst, __func__, pkt->port, pkt->type); break; } - inst->frame_prop.hfi_no_output = 1; + inst->hfi_frame_info.no_output = 1; break; default: i_vpr_e(inst, "%s: invalid port settings property %#x\n", @@ -1217,9 +1230,9 @@ int handle_session_response_work(struct msm_vidc_inst *inst, struct msm_vidc_cmd_range be[5] = { {HFI_SYSTEM_ERROR_BEGIN, HFI_SYSTEM_ERROR_END}, {HFI_SESSION_ERROR_BEGIN, HFI_SESSION_ERROR_END}, + {HFI_INFORMATION_BEGIN, HFI_INFORMATION_END}, {HFI_PROP_BEGIN, HFI_PROP_END}, {HFI_CMD_BEGIN, HFI_CMD_END}, - {HFI_INFORMATION_BEGIN, HFI_INFORMATION_END}, }; if (!inst || !resp_work) { @@ -1248,8 +1261,8 @@ int handle_session_response_work(struct msm_vidc_inst *inst, pkt += packet->size; } - memset(&inst->frame_prop, 0, - sizeof(struct msm_vidc_frame_properties)); + memset(&inst->hfi_frame_info, 0, + sizeof(struct msm_vidc_hfi_frame_info)); for (i = 0; i < ARRAY_SIZE(be); i++) { pkt = start_pkt; for (j = 0; j < hdr->num_packets; j++) { @@ -1277,8 +1290,8 @@ int handle_session_response_work(struct msm_vidc_inst *inst, goto exit; } - memset(&inst->frame_prop, 0, - sizeof(struct msm_vidc_frame_properties)); + memset(&inst->hfi_frame_info, 0, + sizeof(struct msm_vidc_hfi_frame_info)); exit: return rc; @@ -1384,9 +1397,9 @@ static int handle_session_response(struct msm_vidc_core *core, struct msm_vidc_cmd_range be[5] = { {HFI_SYSTEM_ERROR_BEGIN, HFI_SYSTEM_ERROR_END}, {HFI_SESSION_ERROR_BEGIN, HFI_SESSION_ERROR_END}, + {HFI_INFORMATION_BEGIN, HFI_INFORMATION_END}, {HFI_PROP_BEGIN, HFI_PROP_END}, {HFI_CMD_BEGIN, HFI_CMD_END}, - {HFI_INFORMATION_BEGIN, HFI_INFORMATION_END}, }; inst = get_inst(core, hdr->session_id); @@ -1436,7 +1449,7 @@ static int handle_session_response(struct msm_vidc_core *core, pkt += packet->size; } - memset(&inst->frame_prop, 0, sizeof(struct msm_vidc_frame_properties)); + memset(&inst->hfi_frame_info, 0, sizeof(struct msm_vidc_hfi_frame_info)); for (i = 0; i < ARRAY_SIZE(be); i++) { pkt = start_pkt; for (j = 0; j < hdr->num_packets; j++) { @@ -1457,7 +1470,7 @@ static int handle_session_response(struct msm_vidc_core *core, goto exit; } - memset(&inst->frame_prop, 0, sizeof(struct msm_vidc_frame_properties)); + memset(&inst->hfi_frame_info, 0, sizeof(struct msm_vidc_hfi_frame_info)); exit: mutex_unlock(&inst->lock); From ddcadaf0551e153d7cd789333a99796919b1d658 Mon Sep 17 00:00:00 2001 From: Maheshwar Ajja Date: Wed, 10 Feb 2021 18:34:26 -0800 Subject: [PATCH 0110/1061] video: driver: print buffer region Print buffer region and secutity information. Change-Id: I9fae1b193b5e416cb291109c25fe025c34f50f34 Signed-off-by: Maheshwar Ajja --- driver/vidc/src/msm_vidc_memory.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/driver/vidc/src/msm_vidc_memory.c b/driver/vidc/src/msm_vidc_memory.c index a4f2b6640f..2ccc358c83 100644 --- a/driver/vidc/src/msm_vidc_memory.c +++ b/driver/vidc/src/msm_vidc_memory.c @@ -196,7 +196,6 @@ int msm_vidc_memory_alloc(struct msm_vidc_core *core, struct msm_vidc_alloc *mem size = ALIGN(mem->size, SZ_4K); -/* All dma-heap allocations are cached by default. */ if (mem->secure) { switch (mem->region) { case MSM_VIDC_SECURE_PIXEL: @@ -234,8 +233,9 @@ int msm_vidc_memory_alloc(struct msm_vidc_core *core, struct msm_vidc_alloc *mem } d_vpr_h( - "%s: dmabuf = %pK, size = %d, kvaddr = %pK, buffer_type = %#x\n", - __func__, mem->dmabuf, mem->size, mem->kvaddr, mem->type); + "%s: dmabuf = %pK, size = %d, kvaddr = %pK, buffer_type = %#x secure %d region %d\n", + __func__, mem->dmabuf, mem->size, mem->kvaddr, mem->type, + mem->secure, mem->region); return 0; error: From 91212e2c024cdf698b0a9c0009d079c297d6a3be Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Wed, 10 Feb 2021 19:02:50 -0800 Subject: [PATCH 0111/1061] video: driver: fix destroy internal buffer break after destroying each internal buffer Change-Id: I1b3eaf3b655113e0f2f911683c423cdeaeac3ade Signed-off-by: Darshana Patil --- driver/vidc/src/msm_vidc_driver.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 9ebc735761..e5bfba4cca 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -1553,6 +1553,7 @@ int msm_vidc_destroy_internal_buffer(struct msm_vidc_inst *inst, msm_vidc_memory_unmap(inst->core, map); list_del(&map->list); kfree(map); + break; } } @@ -1561,6 +1562,7 @@ int msm_vidc_destroy_internal_buffer(struct msm_vidc_inst *inst, msm_vidc_memory_free(inst->core, alloc); list_del(&alloc->list); kfree(alloc); + break; } } @@ -1568,6 +1570,7 @@ int msm_vidc_destroy_internal_buffer(struct msm_vidc_inst *inst, if (buf->dmabuf == buffer->dmabuf) { list_del(&buf->list); kfree(buf); + break; } } From 622febc90c6d0f37d351591323bc3e45d9e96ccf Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Wed, 10 Feb 2021 16:51:21 -0800 Subject: [PATCH 0112/1061] video: driver: Modify frame skip mode control Modify frame skip mode control to alogn with waipio kernel. Change-Id: I311e5a6359543cb90ac5c96730b0d50d9f9b2295 Signed-off-by: Akshata Sahukar --- driver/platform/waipio/src/msm_vidc_waipio.c | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index c3deb9c027..c1dbf6900d 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -334,9 +334,15 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU}, {FRAME_SKIP_MODE, ENC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDEO_FRAME_SKIP_MODE}, + V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED, + V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT, + BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED) | + BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_LEVEL_LIMIT) | + BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT), + V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED, + V4L2_CID_MPEG_VIDEO_FRAME_SKIP_MODE, + 0, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, {FRAME_RC_ENABLE, ENC, CODECS_ALL, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, From b5ce6c94cca3019428b9e841839c613925434220 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Wed, 10 Feb 2021 19:56:47 -0800 Subject: [PATCH 0113/1061] video: driver: dynamic control support - Set dynamic flag in inst database to allow dynamic setting of necessary controls. - avoid enc qbuf call routed to dec. Change-Id: I66cfcc6be86bfbfe237191a11d533ab6c9455f32 Signed-off-by: Akshata Sahukar --- driver/platform/waipio/src/msm_vidc_waipio.c | 25 ++++++++++---------- driver/vidc/inc/msm_venc.h | 1 + driver/vidc/inc/msm_vidc_internal.h | 7 +----- driver/vidc/src/msm_venc.c | 11 +++++++++ driver/vidc/src/msm_vidc_control.c | 4 ++-- driver/vidc/src/msm_vidc_driver.c | 1 + driver/vidc/src/msm_vidc_vb2.c | 2 +- 7 files changed, 29 insertions(+), 22 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index c1dbf6900d..553d28e9d7 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -181,19 +181,11 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {FRAME_RATE, ENC, CODECS_ALL, (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), - 1, (DEFAULT_FPS << 16), - 0, - HFI_PROP_FRAME_RATE, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, - {0}, {0}, - NULL, msm_vidc_set_q16}, + 1, (DEFAULT_FPS << 16)}, {FRAME_RATE, DEC, CODECS_ALL, (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), - 1, (DEFAULT_FPS << 16), - 0, - HFI_PROP_FRAME_RATE, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + 1, (DEFAULT_FPS << 16)}, {OPERATING_RATE, ENC|DEC, CODECS_ALL, 1, INT_MAX, 1, (DEFAULT_FPS << 16)}, @@ -287,7 +279,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 0, 0, 0, 0, V4L2_CID_MPEG_VIDEO_FORCE_KEY_FRAME, HFI_PROP_REQUEST_SYNC_FRAME, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, /* Enc: Keeping CABAC and CAVLC as same bitrate. * Dec: there's no use of Bitrate cap @@ -353,7 +345,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 1, MAX_CONSTANT_QUALITY, 1, 90, V4L2_CID_MPEG_VIDEO_CONSTANT_QUALITY, HFI_PROP_CONSTANT_QUALITY, - CAP_FLAG_OUTPUT_PORT, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, {BITRATE_MODE}, {0}, NULL, msm_vidc_set_constant_quality}, @@ -362,7 +354,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 0, INT_MAX, 1, 2 * DEFAULT_FPS - 1, V4L2_CID_MPEG_VIDEO_GOP_SIZE, HFI_PROP_MAX_GOP_FRAMES, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, {0}, {0}, NULL, msm_vidc_set_u32}, @@ -1045,6 +1037,13 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { CAP_FLAG_INPUT_PORT, {THUMBNAIL_MODE}}, + {SEQ_CHANGE_AT_SYNC_FRAME, DEC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_ENABLE, + 0, + HFI_PROP_SEQ_CHANGE_AT_SYNC_FRAME, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + {META_LTR_MARK_USE, ENC, CODECS_ALL, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, diff --git a/driver/vidc/inc/msm_venc.h b/driver/vidc/inc/msm_venc.h index 6714b4b87b..1082561579 100644 --- a/driver/vidc/inc/msm_venc.h +++ b/driver/vidc/inc/msm_venc.h @@ -13,6 +13,7 @@ int msm_venc_streamoff_input(struct msm_vidc_inst *inst); int msm_venc_streamon_input(struct msm_vidc_inst *inst); int msm_venc_streamoff_output(struct msm_vidc_inst *inst); int msm_venc_streamon_output(struct msm_vidc_inst *inst); +int msm_venc_qbuf(struct msm_vidc_inst *inst, struct vb2_buffer *vb2); int msm_venc_process_cmd(struct msm_vidc_inst *inst, u32 cmd); int msm_venc_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f); int msm_venc_g_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f); diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 171a87fb0f..b94818b738 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -350,6 +350,7 @@ enum msm_vidc_inst_capability_type { THUMBNAIL_MODE, DEFAULT_HEADER, RAP_FRAME, + SEQ_CHANGE_AT_SYNC_FRAME, META_LTR_MARK_USE, META_DPB_MISR, META_OPB_MISR, @@ -585,12 +586,6 @@ struct msm_vidc_rectangle { u32 height; }; -struct msm_vidc_properties { - u32 frame_rate; - u32 operating_rate; - u32 bitrate; -}; - struct msm_vidc_subscription_params { u32 bitstream_resolution; u64 crop_offsets; diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index 258af84e8c..08066a3a90 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -836,6 +836,17 @@ error: return rc; } +int msm_venc_qbuf(struct msm_vidc_inst *inst, struct vb2_buffer *vb2) +{ + int rc = 0; + + rc = msm_vidc_queue_buffer(inst, vb2); + if (rc) + return rc; + + return rc; +} + int msm_venc_process_cmd(struct msm_vidc_inst *inst, u32 cmd) { int rc = 0; diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 2c96ce6850..8e70e81258 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -266,8 +266,8 @@ static int msm_vidc_add_capid_to_list(struct msm_vidc_inst *inst, if (type & FW_LIST) { list_for_each_entry(curr_node, &inst->firmware.list, list) { if (curr_node->cap_id == cap_id) { - i_vpr_e(inst, - "%s: cap %d cannot be the child of two parents\n", + i_vpr_l(inst, + "%s: cap %d already present in FW_LIST\n", __func__, cap_id); return 0; } diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index e5bfba4cca..1ec0df2623 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -606,6 +606,7 @@ bool msm_vidc_allow_s_ctrl(struct msm_vidc_inst *inst, u32 id) case V4L2_CID_MPEG_VIDC_MARKLTRFRAME: case V4L2_CID_MPEG_VIDC_VIDEO_BLUR_TYPES: case V4L2_CID_MPEG_VIDC_VIDEO_BLUR_RESOLUTION: + case V4L2_CID_MPEG_VIDEO_CONSTANT_QUALITY: allow = true; break; default: diff --git a/driver/vidc/src/msm_vidc_vb2.c b/driver/vidc/src/msm_vidc_vb2.c index 4c3e71a86f..0134e1c32d 100644 --- a/driver/vidc/src/msm_vidc_vb2.c +++ b/driver/vidc/src/msm_vidc_vb2.c @@ -289,7 +289,7 @@ void msm_vidc_buf_queue(struct vb2_buffer *vb2) if (is_decode_session(inst)) rc = msm_vdec_qbuf(inst, vb2); else if (is_encode_session(inst)) - rc = msm_vdec_qbuf(inst, vb2); + rc = msm_venc_qbuf(inst, vb2); else rc = -EINVAL; From 59e44ef2fa02fad4854884fbe58363fd2ce77cd9 Mon Sep 17 00:00:00 2001 From: Manikanta Kanamarlapudi Date: Fri, 12 Feb 2021 21:45:14 +0530 Subject: [PATCH 0114/1061] msm: vidc: Initialize queues before adding session to core Initialize queues first and then add the session to the core. This will avoid the access to uninitialized queues of new instance while voting the clocks/buses of the other instance. Change-Id: I92b06dba361eb1539aced90fb58251c04a55b175 --- driver/vidc/src/msm_vidc.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index 057443eab9..78e5da2546 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -713,11 +713,6 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) kref_init(&inst->kref); mutex_init(&inst->lock); - rc = msm_vidc_add_session(inst); - if (rc) { - d_vpr_e("%s: failed to get session id\n", __func__); - goto error; - } i_vpr_e(inst, "Opening video instance: %d\n", session_type); inst->response_workq = create_singlethread_workqueue("response_workq"); @@ -796,6 +791,11 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) if (rc) goto error; + rc = msm_vidc_add_session(inst); + if (rc) { + d_vpr_e("%s: failed to get session id\n", __func__); + goto error; + } msm_vidc_scale_power(inst, true); rc = msm_vidc_session_open(inst); From a92ec619048ca09f53996ef887e75305ada6ff57 Mon Sep 17 00:00:00 2001 From: Sebastian Dang Date: Wed, 10 Feb 2021 18:53:19 -0800 Subject: [PATCH 0115/1061] video: driver: Remove ddr_type call Use default LPDDR5 ubwc config. Change-Id: I658117c7daefd3d5900db790b2092db0f75dd01a --- driver/platform/waipio/src/msm_vidc_waipio.c | 16 ---------------- 1 file changed, 16 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index c1dbf6900d..a4f92fe9ee 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -13,10 +13,6 @@ #include "msm_vidc_control.h" #include "hfi_property.h" -#define DDR_TYPE_LPDDR4 0x6 -#define DDR_TYPE_LPDDR4X 0x7 -#define DDR_TYPE_LPDDR5 0x8 -#define DDR_TYPE_LPDDR5X 0x9 #define DEFAULT_VIDEO_CONCEAL_COLOR_BLACK 0x8020010 #define MAX_LTR_FRAME_COUNT 2 #define MAX_BASE_LAYER_PRIORITY_ID 63 @@ -1181,8 +1177,6 @@ static struct msm_vidc_platform_data waipio_data = { static int msm_vidc_init_data(struct msm_vidc_core *core) { int rc = 0; - struct msm_vidc_ubwc_config_data *ubwc_config; - u32 ddr_type; if (!core || !core->platform) { d_vpr_e("%s: invalid params\n", __func__); @@ -1190,16 +1184,6 @@ static int msm_vidc_init_data(struct msm_vidc_core *core) } d_vpr_h("%s: initialize waipio data\n", __func__); - ubwc_config = waipio_data.ubwc_config; - ddr_type = of_fdt_get_ddrtype(); - if (ddr_type == -ENOENT) - d_vpr_e("Failed to get ddr type, use LPDDR5\n"); - - if (ddr_type == DDR_TYPE_LPDDR4 || ddr_type == DDR_TYPE_LPDDR4X) - ubwc_config->highest_bank_bit = 0xf; - d_vpr_h("%s: DDR Type 0x%x hbb 0x%x\n", __func__, - ddr_type, ubwc_config->highest_bank_bit); - core->platform->data = waipio_data; return rc; From 0cb0862d1c60bd229d3840406c815f853d0518f1 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Mon, 15 Feb 2021 19:05:27 +0530 Subject: [PATCH 0116/1061] video: driver: update streamoff failure return code. Currently streamoff failure error code was overriden with zero. added change to propagate correct error code. Change-Id: I9ad92f27ae6de109c9959abf0692e6e32cd52d3d Signed-off-by: Govindaraj Rajagopal --- driver/vidc/src/msm_vidc_driver.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 1ec0df2623..39d9895bf6 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -2195,6 +2195,9 @@ int msm_vidc_session_streamoff(struct msm_vidc_inst *inst, } mutex_lock(&inst->lock); + if(rc) + goto error: + /* no more queued buffers after streamoff */ count = msm_vidc_num_buffers(inst, buffer_type, MSM_VIDC_ATTR_QUEUED); if (!count) { From 8ed48fa824a2e162fbf26d944730fa2b8990d19a Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Tue, 16 Feb 2021 23:29:52 +0530 Subject: [PATCH 0117/1061] video: driver: fix minor typo fixed minor typo. Change-Id: I76e3d3fb4b0691f324d58e22b148fe26760c7fc1 Signed-off-by: Govindaraj Rajagopal --- driver/vidc/src/msm_vidc_driver.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 39d9895bf6..d7053d5cd9 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -2196,7 +2196,7 @@ int msm_vidc_session_streamoff(struct msm_vidc_inst *inst, mutex_lock(&inst->lock); if(rc) - goto error: + goto error; /* no more queued buffers after streamoff */ count = msm_vidc_num_buffers(inst, buffer_type, MSM_VIDC_ATTR_QUEUED); From 8867ad497a400216ab9d797367e98fd34b7dfd7d Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Thu, 11 Feb 2021 16:22:10 +0530 Subject: [PATCH 0118/1061] video: driver: resume input port for drain sequnce. HFI_CMD_RESUME should be sent for following cases: Decoder(V4L2_DEC_CMD_START) input port: ipsc & drain output port: opsc Encoder(V4L2_ENC_CMD_START) input port: drain output port: no usage Change-Id: I77b29c2da542a3d91f7ba96fb36291303d6af3f9 Signed-off-by: Govindaraj Rajagopal --- driver/vidc/src/msm_vdec.c | 8 +++++--- driver/vidc/src/msm_venc.c | 2 ++ 2 files changed, 7 insertions(+), 3 deletions(-) diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index a5c66ee1e5..718fde638c 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -1611,6 +1611,7 @@ int msm_vdec_process_cmd(struct msm_vidc_inst *inst, u32 cmd) { int rc = 0; enum msm_vidc_allow allow = MSM_VIDC_DISALLOW; + enum msm_vidc_port_type port; if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); @@ -1639,19 +1640,20 @@ int msm_vdec_process_cmd(struct msm_vidc_inst *inst, u32 cmd) } else if (cmd == V4L2_DEC_CMD_START) { if (!msm_vidc_allow_start(inst)) return -EBUSY; + port = (inst->state == MSM_VIDC_DRAIN_LAST_FLAG) ? INPUT_PORT : OUTPUT_PORT; + vb2_clear_last_buffer_dequeued(&inst->vb2q[OUTPUT_META_PORT]); + vb2_clear_last_buffer_dequeued(&inst->vb2q[OUTPUT_PORT]); rc = msm_vidc_state_change_start(inst); if (rc) return rc; rc = venus_hfi_session_command(inst, HFI_CMD_RESUME, - OUTPUT_PORT, + port, HFI_PAYLOAD_NONE, NULL, 0); if (rc) return rc; - vb2_clear_last_buffer_dequeued(&inst->vb2q[OUTPUT_META_PORT]); - vb2_clear_last_buffer_dequeued(&inst->vb2q[OUTPUT_PORT]); } else { d_vpr_e("%s: unknown cmd %d\n", __func__, cmd); return -EINVAL; diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index 08066a3a90..5750138384 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -879,6 +879,8 @@ int msm_venc_process_cmd(struct msm_vidc_inst *inst, u32 cmd) } else if (cmd == V4L2_ENC_CMD_START) { if (!msm_vidc_allow_start(inst)) return -EBUSY; + vb2_clear_last_buffer_dequeued(&inst->vb2q[OUTPUT_META_PORT]); + vb2_clear_last_buffer_dequeued(&inst->vb2q[OUTPUT_PORT]); rc = msm_vidc_state_change_start(inst); if (rc) return rc; From bef0dd14da88fd1aeef08b71b9f094ca2a690cd5 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Tue, 9 Feb 2021 11:35:40 +0530 Subject: [PATCH 0119/1061] video: driver: avoid drain_last_flag to drc state transition [1] DRC_DRAIN_LAST_FLAG to DRC is not allowed. So remove support [2] introduced in_range macro [3] removed process_response_packet function [4] introduced msm_vidc_process_pending_ipsc function. Change-Id: I1bc7ed6f0d94052900a4655a2e3da9ea44d60143 Signed-off-by: Govindaraj Rajagopal --- driver/vidc/inc/msm_vidc_internal.h | 5 - driver/vidc/src/msm_vidc_driver.c | 139 +++++++++++++-------------- driver/vidc/src/venus_hfi_response.c | 64 ++++-------- 3 files changed, 87 insertions(+), 121 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index b94818b738..4cde4f524e 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -607,11 +607,6 @@ struct msm_vidc_hfi_frame_info { u32 data_corrupt; }; -struct msm_vidc_cmd_range { - u32 begin; - u32 end; -}; - struct msm_vidc_decode_vpp_delay { bool enable; u32 size; diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index d7053d5cd9..90200132c3 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -807,11 +807,50 @@ bool msm_vidc_allow_last_flag(struct msm_vidc_inst *inst) return false; } +static int msm_vidc_process_pending_ipsc(struct msm_vidc_inst *inst, + enum msm_vidc_inst_state *new_state) +{ + struct response_work *resp_work, *dummy = NULL; + int rc = 0; + + if (!inst || !new_state) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (list_empty(&inst->response_works)) + return 0; + + i_vpr_h(inst, "%s: state %s, ipsc pending\n", __func__, state_name(inst->state)); + list_for_each_entry_safe(resp_work, dummy, &inst->response_works, list) { + if (resp_work->type == RESP_WORK_INPUT_PSC) { + rc = handle_session_response_work(inst, resp_work); + if (rc) { + i_vpr_e(inst, "%s: handle ipsc failed\n", __func__); + *new_state = MSM_VIDC_ERROR; + } else { + if (inst->state == MSM_VIDC_DRC_DRAIN_LAST_FLAG || + inst->state == MSM_VIDC_DRAIN_START_INPUT) { + *new_state = MSM_VIDC_DRC_DRAIN; + } else if (inst->state == MSM_VIDC_DRC_LAST_FLAG) { + *new_state = MSM_VIDC_DRC; + } + } + list_del(&resp_work->list); + kfree(resp_work->data); + kfree(resp_work); + /* list contains max only one ipsc at anytime */ + break; + } + } + + return rc; +} + int msm_vidc_state_change_streamon(struct msm_vidc_inst *inst, u32 type) { int rc = 0; enum msm_vidc_inst_state new_state = MSM_VIDC_ERROR; - struct response_work *resp_work; if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); @@ -832,35 +871,19 @@ int msm_vidc_state_change_streamon(struct msm_vidc_inst *inst, u32 type) } else if (inst->state == MSM_VIDC_START_INPUT) { new_state = MSM_VIDC_START; } else if (inst->state == MSM_VIDC_DRAIN_START_INPUT) { - i_vpr_h(inst, - "%s: streamon(output) in DRAIN_START_INPUT state\n", - __func__); + i_vpr_h(inst, "%s: streamon(output) in %s state\n", + __func__, state_name(inst->state)); new_state = MSM_VIDC_DRAIN; - if (!list_empty(&inst->response_works)) { - resp_work = list_first_entry(&inst->response_works, - struct response_work, list); - if (resp_work->type == RESP_WORK_INPUT_PSC) { - i_vpr_h(inst, - "%s: streamon(output) in DRAIN_START_INPUT state, input psc pending\n", - __func__); - rc = handle_session_response_work(inst, resp_work); - if (rc) { - i_vpr_e(inst, - "%s: handle input psc failed\n", __func__); - new_state = MSM_VIDC_ERROR; - } else { - new_state = MSM_VIDC_DRC_DRAIN; - } - list_del(&resp_work->list); - kfree(resp_work->data); - kfree(resp_work); - } + rc = msm_vidc_process_pending_ipsc(inst, &new_state); + if (rc) { + i_vpr_e(inst, "%s: process pending ipsc failed\n", __func__); + goto state_change; } } } - rc = msm_vidc_change_inst_state(inst, new_state, __func__); - if (rc) - return rc; + +state_change: + msm_vidc_change_inst_state(inst, new_state, __func__); return rc; } @@ -960,7 +983,6 @@ int msm_vidc_state_change_start(struct msm_vidc_inst *inst) { int rc = 0; enum msm_vidc_inst_state new_state = MSM_VIDC_ERROR; - struct response_work *resp_work; if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); @@ -969,57 +991,28 @@ int msm_vidc_state_change_start(struct msm_vidc_inst *inst) if (inst->state == MSM_VIDC_DRAIN_LAST_FLAG || inst->state == MSM_VIDC_DRC_LAST_FLAG) { - new_state = MSM_VIDC_START; - if (!list_empty(&inst->response_works)) { - resp_work = list_first_entry(&inst->response_works, - struct response_work, list); - if (resp_work->type == RESP_WORK_INPUT_PSC) { - i_vpr_h(inst, - "%s: start in DRC(DRAIN)_LAST_FLAG state, input psc pending\n", - __func__); - rc = handle_session_response_work(inst, resp_work); - if (rc) { - i_vpr_e(inst, - "%s: handle input psc failed\n", __func__); - new_state = MSM_VIDC_ERROR; - } else { - new_state = MSM_VIDC_DRC; - } - list_del(&resp_work->list); - kfree(resp_work->data); - kfree(resp_work); - } + new_state = MSM_VIDC_START; + rc = msm_vidc_process_pending_ipsc(inst, &new_state); + if (rc) { + i_vpr_e(inst, "%s: process pending ipsc failed\n", __func__); + goto state_change; } } else if (inst->state == MSM_VIDC_DRC_DRAIN_LAST_FLAG) { - new_state = MSM_VIDC_DRAIN; - if (!list_empty(&inst->response_works)) { - resp_work = list_first_entry(&inst->response_works, - struct response_work, list); - if (resp_work->type == RESP_WORK_INPUT_PSC) { - i_vpr_h(inst, - "%s: start in DRC_DRAIN_LAST_FLAG state, input psc pending\n"); - rc = handle_session_response_work(inst, resp_work); - if (rc) { - i_vpr_e(inst, - "%s: handle input psc failed\n", __func__); - new_state = MSM_VIDC_ERROR; - } else { - new_state = MSM_VIDC_DRC_DRAIN; - } - list_del(&resp_work->list); - kfree(resp_work->data); - kfree(resp_work); - } + new_state = MSM_VIDC_DRAIN; + rc = msm_vidc_process_pending_ipsc(inst, &new_state); + if (rc) { + i_vpr_e(inst, "%s: process pending ipsc failed\n", __func__); + goto state_change; } } else { - i_vpr_e(inst, "%s: wrong state %s\n", - __func__, state_name(inst->state)); - msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); - return -EINVAL; + i_vpr_e(inst, "%s: wrong state %s\n", __func__, state_name(inst->state)); + new_state = MSM_VIDC_ERROR; + rc = -EINVAL; + goto state_change; } - rc = msm_vidc_change_inst_state(inst, new_state, __func__); - if (rc) - return rc; + +state_change: + msm_vidc_change_inst_state(inst, new_state, __func__); return rc; } diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index 135dd9871c..f4a0a1689e 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -10,7 +10,14 @@ #include "msm_vidc_driver.h" #include "msm_vdec.h" +#define in_range(range, val) (((range.begin) < (val)) && ((range.end) > (val))) + extern struct msm_vidc_core *g_core; +struct msm_vidc_hfi_range { + u32 begin; + u32 end; + int (*handle)(struct msm_vidc_inst *inst, struct hfi_packet *pkt); +}; void print_psc_properties(u32 tag, const char *str, struct msm_vidc_inst *inst, struct msm_vidc_subscription_params subsc_params) @@ -1198,32 +1205,6 @@ exit: return rc; } -static int process_response_packet(struct msm_vidc_inst *inst, - struct hfi_packet *packet) -{ - int rc = 0; - - if (packet->type > HFI_CMD_BEGIN && - packet->type < HFI_CMD_END) { - rc = handle_session_command(inst, packet); - } else if (packet->type > HFI_PROP_BEGIN && - packet->type < HFI_PROP_END) { - rc = handle_session_property(inst, packet); - } else if (packet->type > HFI_SESSION_ERROR_BEGIN && - packet->type < HFI_SESSION_ERROR_END) { - rc = handle_session_error(inst, packet); - } else if (packet->type > HFI_INFORMATION_BEGIN && - packet->type < HFI_INFORMATION_END) { - rc = handle_session_info(inst, packet); - } else { - i_vpr_e(inst, "%s: Unknown packet type: %#x\n", - __func__, packet->type); - rc = -EINVAL; - } - - return rc; -} - int handle_session_response_work(struct msm_vidc_inst *inst, struct response_work *resp_work) { @@ -1233,12 +1214,11 @@ int handle_session_response_work(struct msm_vidc_inst *inst, u8 *pkt, *start_pkt; u32 hfi_cmd_type = 0; int i, j; - struct msm_vidc_cmd_range be[5] = { - {HFI_SYSTEM_ERROR_BEGIN, HFI_SYSTEM_ERROR_END}, - {HFI_SESSION_ERROR_BEGIN, HFI_SESSION_ERROR_END}, - {HFI_INFORMATION_BEGIN, HFI_INFORMATION_END}, - {HFI_PROP_BEGIN, HFI_PROP_END}, - {HFI_CMD_BEGIN, HFI_CMD_END}, + struct msm_vidc_hfi_range be[] = { + {HFI_SESSION_ERROR_BEGIN, HFI_SESSION_ERROR_END, handle_session_error}, + {HFI_INFORMATION_BEGIN, HFI_INFORMATION_END, handle_session_info}, + {HFI_PROP_BEGIN, HFI_PROP_END, handle_session_property}, + {HFI_CMD_BEGIN, HFI_CMD_END, handle_session_command}, }; if (!inst || !resp_work) { @@ -1273,8 +1253,7 @@ int handle_session_response_work(struct msm_vidc_inst *inst, pkt = start_pkt; for (j = 0; j < hdr->num_packets; j++) { packet = (struct hfi_packet * ) pkt; - if (packet->type > be[i].begin - && packet->type < be[i].end) { + if (in_range(be[i], packet->type)) { if (hfi_cmd_type == HFI_CMD_SETTINGS_CHANGE) { i_vpr_e(inst, "%s: invalid packet type %d in port settings change\n", @@ -1282,7 +1261,7 @@ int handle_session_response_work(struct msm_vidc_inst *inst, rc = -EINVAL; } hfi_cmd_type = packet->type; - rc = process_response_packet(inst, packet); + rc = be[i].handle(inst, packet); if (rc) goto exit; } @@ -1400,12 +1379,11 @@ static int handle_session_response(struct msm_vidc_core *core, u32 hfi_cmd_type = 0; u32 hfi_port = 0; int i, j; - struct msm_vidc_cmd_range be[5] = { - {HFI_SYSTEM_ERROR_BEGIN, HFI_SYSTEM_ERROR_END}, - {HFI_SESSION_ERROR_BEGIN, HFI_SESSION_ERROR_END}, - {HFI_INFORMATION_BEGIN, HFI_INFORMATION_END}, - {HFI_PROP_BEGIN, HFI_PROP_END}, - {HFI_CMD_BEGIN, HFI_CMD_END}, + struct msm_vidc_hfi_range be[] = { + {HFI_SESSION_ERROR_BEGIN, HFI_SESSION_ERROR_END, handle_session_error}, + {HFI_INFORMATION_BEGIN, HFI_INFORMATION_END, handle_session_info}, + {HFI_PROP_BEGIN, HFI_PROP_END, handle_session_property}, + {HFI_CMD_BEGIN, HFI_CMD_END, handle_session_command}, }; inst = get_inst(core, hdr->session_id); @@ -1460,9 +1438,9 @@ static int handle_session_response(struct msm_vidc_core *core, pkt = start_pkt; for (j = 0; j < hdr->num_packets; j++) { packet = (struct hfi_packet * ) pkt; - if (packet->type > be[i].begin && packet->type < be[i].end) { + if (in_range(be[i], packet->type)) { hfi_cmd_type = packet->type; - rc = process_response_packet(inst, packet); + rc = be[i].handle(inst, packet); if (rc) goto exit; } From 816f15fbcf18070b925ad0914c0723f1e845a2fe Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Wed, 17 Feb 2021 17:31:10 +0530 Subject: [PATCH 0120/1061] video: driver: reset last_buffer_dequeued flag for streamoff case After drc/drain sequence completion, if client initiates input port streamoff, then firmware is expected to release all EBD's. But looks like couple of FBD's also returned by firmware and gets added to q->done_list. Due to valid vb2_buffer entry, poll() gets unblocked everytime and attempts to dequeue but dqbuf request on capture port after last_flag will be rajected by vb2 with -EPIPE error. So v2_buffer never gets dequeued and poll always gets unblocked i.e leading to barrage of dqbuf failure prints. Added change to clear last_buffer_dequeued flag as part of streamoff. This is required for both input & output port side. Change-Id: I9e84e642811100b1e32317228e7d9b3739def1c4 Signed-off-by: Govindaraj Rajagopal --- driver/vidc/src/msm_vidc_vb2.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/driver/vidc/src/msm_vidc_vb2.c b/driver/vidc/src/msm_vidc_vb2.c index 0134e1c32d..6587161981 100644 --- a/driver/vidc/src/msm_vidc_vb2.c +++ b/driver/vidc/src/msm_vidc_vb2.c @@ -247,6 +247,12 @@ void msm_vidc_stop_streaming(struct vb2_queue *q) } i_vpr_h(inst, "Streamoff: %d\n", q->type); + /** + * Clear q->last_buffer_dequeued flag to facilitate + * userspace dqbuf on output port after last_flag FBD. + */ + vb2_clear_last_buffer_dequeued(&inst->vb2q[OUTPUT_META_PORT]); + vb2_clear_last_buffer_dequeued(&inst->vb2q[OUTPUT_PORT]); if (q->type == INPUT_MPLANE) { if (is_decode_session(inst)) rc = msm_vdec_streamoff_input(inst); From bcb2df4067baa976e6ffa60a9de0caef2d4bbd6b Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Tue, 16 Feb 2021 12:07:24 -0800 Subject: [PATCH 0121/1061] video: driver: fixes for nv12 512x512 encoder fixes for nv12 512x512 custom stride and scanline support. Change-Id: Ifc2a64e881587b9bf4538496dfaab70c8726fb85 Signed-off-by: Darshana Patil --- driver/vidc/src/msm_venc.c | 459 ++++++++++++++++++++++--------------- 1 file changed, 268 insertions(+), 191 deletions(-) diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index 5750138384..eac9d4c22b 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -980,12 +980,11 @@ error: return rc; } -// TODO: use PIX_FMTS caps to check supported color format -int msm_venc_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) +static int msm_venc_s_fmt_input(struct msm_vidc_inst *inst, struct v4l2_format *f) { int rc = 0; - struct msm_vidc_core *core; struct v4l2_format *fmt; + struct msm_vidc_core *core; u32 codec_align; if (!inst || !inst->core) { @@ -994,188 +993,267 @@ int msm_venc_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) } core = inst->core; - if (f->type == INPUT_MPLANE) { - fmt = &inst->fmts[INPUT_PORT]; - fmt->type = INPUT_MPLANE; - fmt->fmt.pix_mp.pixelformat = f->fmt.pix_mp.pixelformat; - fmt->fmt.pix_mp.width = VENUS_Y_STRIDE( - v4l2_colorformat_to_media(fmt->fmt.pix_mp.pixelformat, __func__), - f->fmt.pix_mp.width); - fmt->fmt.pix_mp.height = VENUS_Y_SCANLINES( - v4l2_colorformat_to_media(fmt->fmt.pix_mp.pixelformat, __func__), - f->fmt.pix_mp.height); + fmt = &inst->fmts[INPUT_PORT]; + fmt->type = INPUT_MPLANE; + fmt->fmt.pix_mp.pixelformat = f->fmt.pix_mp.pixelformat; + fmt->fmt.pix_mp.width = VENUS_Y_STRIDE( + v4l2_colorformat_to_media(fmt->fmt.pix_mp.pixelformat, __func__), + f->fmt.pix_mp.width); + fmt->fmt.pix_mp.height = VENUS_Y_SCANLINES( + v4l2_colorformat_to_media(fmt->fmt.pix_mp.pixelformat, __func__), + f->fmt.pix_mp.height); - fmt->fmt.pix_mp.num_planes = 1; - fmt->fmt.pix_mp.plane_fmt[0].bytesperline = - fmt->fmt.pix_mp.width; - fmt->fmt.pix_mp.plane_fmt[0].sizeimage = call_session_op(core, - buffer_size, inst, MSM_VIDC_BUF_INPUT); - inst->buffers.input.min_count = call_session_op(core, - min_count, inst, MSM_VIDC_BUF_INPUT); - inst->buffers.input.extra_count = call_session_op(core, - extra_count, inst, MSM_VIDC_BUF_INPUT); - if (inst->buffers.input.actual_count < + fmt->fmt.pix_mp.num_planes = 1; + fmt->fmt.pix_mp.plane_fmt[0].bytesperline = + fmt->fmt.pix_mp.width; + fmt->fmt.pix_mp.plane_fmt[0].sizeimage = call_session_op(core, + buffer_size, inst, MSM_VIDC_BUF_INPUT); + inst->buffers.input.min_count = call_session_op(core, + min_count, inst, MSM_VIDC_BUF_INPUT); + inst->buffers.input.extra_count = call_session_op(core, + extra_count, inst, MSM_VIDC_BUF_INPUT); + if (inst->buffers.input.actual_count < + inst->buffers.input.min_count + + inst->buffers.input.extra_count) { + inst->buffers.input.actual_count = inst->buffers.input.min_count + - inst->buffers.input.extra_count) { - inst->buffers.input.actual_count = - inst->buffers.input.min_count + - inst->buffers.input.extra_count; - } - inst->buffers.input.size = - fmt->fmt.pix_mp.plane_fmt[0].sizeimage; - - codec_align = inst->fmts[OUTPUT_PORT].fmt.pix_mp.pixelformat == - V4L2_PIX_FMT_HEVC ? 32 : 16; - /* check if resolution changed */ - if (inst->fmts[OUTPUT_PORT].fmt.pix_mp.width != - ALIGN(f->fmt.pix_mp.width, codec_align) || - inst->fmts[OUTPUT_PORT].fmt.pix_mp.height != - ALIGN(f->fmt.pix_mp.height, codec_align)) { - /* reset bitstream port with updated resolution */ - inst->fmts[OUTPUT_PORT].fmt.pix_mp.width = - ALIGN(f->fmt.pix_mp.width, codec_align); - inst->fmts[OUTPUT_PORT].fmt.pix_mp.height = - ALIGN(f->fmt.pix_mp.height, codec_align); - inst->fmts[OUTPUT_PORT].fmt.pix_mp.plane_fmt[0].sizeimage = - call_session_op(core, buffer_size, - inst, MSM_VIDC_BUF_OUTPUT); - - /* reset crop dimensions with updated resolution */ - inst->crop.top = inst->crop.left = 0; - inst->crop.width = f->fmt.pix_mp.width; - inst->crop.height = f->fmt.pix_mp.height; - - /* reset compose dimensions with updated resolution */ - inst->compose.top = inst->crop.left = 0; - inst->compose.width = f->fmt.pix_mp.width; - inst->compose.height = f->fmt.pix_mp.height; - } - - //rc = msm_vidc_check_session_supported(inst); - if (rc) - goto err_invalid_fmt; - //update_log_ctxt(inst->sid, inst->session_type, - // mplane->pixelformat); - i_vpr_h(inst, - "%s: input: codec %#x width %d height %d size %d min_count %d extra_count %d\n", - __func__, f->fmt.pix_mp.pixelformat, f->fmt.pix_mp.width, - f->fmt.pix_mp.height, - fmt->fmt.pix_mp.plane_fmt[0].sizeimage, - inst->buffers.input.min_count, - inst->buffers.input.extra_count); - - //msm_vidc_update_dcvs(inst); - //msm_vidc_update_batching(inst); - - } else if (f->type == INPUT_META_PLANE) { - fmt = &inst->fmts[INPUT_META_PORT]; - fmt->type = INPUT_META_PLANE; - fmt->fmt.meta.dataformat = V4L2_META_FMT_VIDC; - if (is_input_meta_enabled(inst)) { - fmt->fmt.meta.buffersize = call_session_op(core, - buffer_size, inst, MSM_VIDC_BUF_OUTPUT_META); - inst->buffers.input_meta.min_count = - inst->buffers.input.min_count; - inst->buffers.input_meta.extra_count = - inst->buffers.input.extra_count; - inst->buffers.input_meta.actual_count = - inst->buffers.input.actual_count; - inst->buffers.input_meta.size = fmt->fmt.meta.buffersize; - } else { - fmt->fmt.meta.buffersize = 0; - inst->buffers.input_meta.min_count = 0; - inst->buffers.input_meta.extra_count = 0; - inst->buffers.input_meta.actual_count = 0; - inst->buffers.input_meta.size = 0; - } - i_vpr_h(inst, - "%s: input meta: size %d min_count %d extra_count %d\n", - __func__, fmt->fmt.meta.buffersize, - inst->buffers.input_meta.min_count, - inst->buffers.input_meta.extra_count); - } else if (f->type == OUTPUT_MPLANE) { - fmt = &inst->fmts[OUTPUT_PORT]; - if (fmt->fmt.pix_mp.pixelformat != f->fmt.pix_mp.pixelformat) { - i_vpr_h(inst, - "%s: codec changed from %#x to %#x\n", __func__, - fmt->fmt.pix_mp.pixelformat, f->fmt.pix_mp.pixelformat); - rc = msm_venc_codec_change(inst, f->fmt.pix_mp.pixelformat); - if (rc) - goto err_invalid_fmt; - } - fmt->type = OUTPUT_MPLANE; - - codec_align = f->fmt.pix_mp.pixelformat == - V4L2_PIX_FMT_HEVC ? 32 : 16; - /* width, height is readonly for client */ - fmt->fmt.pix_mp.width = ALIGN(inst->crop.width, codec_align); - fmt->fmt.pix_mp.height = ALIGN(inst->crop.height, codec_align); - fmt->fmt.pix_mp.pixelformat = f->fmt.pix_mp.pixelformat; - fmt->fmt.pix_mp.num_planes = 1; - fmt->fmt.pix_mp.plane_fmt[0].bytesperline = 0; - fmt->fmt.pix_mp.plane_fmt[0].sizeimage = call_session_op(core, - buffer_size, inst, MSM_VIDC_BUF_OUTPUT); - inst->buffers.output.min_count = call_session_op(core, - min_count, inst, MSM_VIDC_BUF_OUTPUT); - inst->buffers.output.extra_count = call_session_op(core, - extra_count, inst, MSM_VIDC_BUF_OUTPUT); - if (inst->buffers.output.actual_count < - inst->buffers.output.min_count + - inst->buffers.output.extra_count) { - inst->buffers.output.actual_count = - inst->buffers.output.min_count + - inst->buffers.output.extra_count; - } - inst->buffers.output.size = - fmt->fmt.pix_mp.plane_fmt[0].sizeimage; - - //rc = msm_vidc_check_session_supported(inst); - if (rc) - goto err_invalid_fmt; - - //update_log_ctxt(inst->sid, inst->session_type, - // mplane->pixelformat); - - i_vpr_h(inst, - "%s: output: format %#x width %d height %d size %d min_count %d extra_count %d\n", - __func__, fmt->fmt.pix_mp.pixelformat, fmt->fmt.pix_mp.width, - fmt->fmt.pix_mp.height, - fmt->fmt.pix_mp.plane_fmt[0].sizeimage, - inst->buffers.output.min_count, - inst->buffers.output.extra_count); - } else if (f->type == OUTPUT_META_PLANE) { - fmt = &inst->fmts[OUTPUT_META_PORT]; - fmt->type = OUTPUT_META_PLANE; - fmt->fmt.meta.dataformat = V4L2_META_FMT_VIDC; - if (is_output_meta_enabled(inst)) { - fmt->fmt.meta.buffersize = call_session_op(core, - buffer_size, inst, MSM_VIDC_BUF_OUTPUT_META); - inst->buffers.output_meta.min_count = - inst->buffers.output.min_count; - inst->buffers.output_meta.extra_count = - inst->buffers.output.extra_count; - inst->buffers.output_meta.actual_count = - inst->buffers.output.actual_count; - inst->buffers.output_meta.size = fmt->fmt.meta.buffersize; - } else { - fmt->fmt.meta.buffersize = 0; - inst->buffers.output_meta.min_count = 0; - inst->buffers.output_meta.extra_count = 0; - inst->buffers.output_meta.actual_count = 0; - inst->buffers.output_meta.size = 0; - } - i_vpr_h(inst, - "%s: output meta: size %d min_count %d extra_count %d\n", - __func__, fmt->fmt.meta.buffersize, - inst->buffers.output_meta.min_count, - inst->buffers.output_meta.extra_count); - } else { - i_vpr_e(inst, "%s: invalid type %d\n", __func__, f->type); - goto err_invalid_fmt; + inst->buffers.input.extra_count; } + inst->buffers.input.size = + fmt->fmt.pix_mp.plane_fmt[0].sizeimage; + + codec_align = inst->fmts[OUTPUT_PORT].fmt.pix_mp.pixelformat == + V4L2_PIX_FMT_HEVC ? 32 : 16; + + /* check if resolution changed */ + if (inst->fmts[OUTPUT_PORT].fmt.pix_mp.width > + ALIGN(f->fmt.pix_mp.width, codec_align) || + inst->fmts[OUTPUT_PORT].fmt.pix_mp.height > + ALIGN(f->fmt.pix_mp.height, codec_align)) { + /* reset bitstream port with updated resolution */ + inst->fmts[OUTPUT_PORT].fmt.pix_mp.width = + ALIGN(f->fmt.pix_mp.width, codec_align); + inst->fmts[OUTPUT_PORT].fmt.pix_mp.height = + ALIGN(f->fmt.pix_mp.height, codec_align); + inst->fmts[OUTPUT_PORT].fmt.pix_mp.plane_fmt[0].sizeimage = + call_session_op(core, buffer_size, + inst, MSM_VIDC_BUF_OUTPUT); + + /* reset crop dimensions with updated resolution */ + inst->crop.top = inst->crop.left = 0; + inst->crop.width = f->fmt.pix_mp.width; + inst->crop.height = f->fmt.pix_mp.height; + + /* reset compose dimensions with updated resolution */ + inst->compose.top = inst->crop.left = 0; + inst->compose.width = f->fmt.pix_mp.width; + inst->compose.height = f->fmt.pix_mp.height; + } + + //rc = msm_vidc_check_session_supported(inst); + if (rc) + return rc; + //update_log_ctxt(inst->sid, inst->session_type, + // mplane->pixelformat); + i_vpr_h(inst, + "%s: input: codec %#x width %d height %d size %d min_count %d extra_count %d\n", + __func__, f->fmt.pix_mp.pixelformat, f->fmt.pix_mp.width, + f->fmt.pix_mp.height, + fmt->fmt.pix_mp.plane_fmt[0].sizeimage, + inst->buffers.input.min_count, + inst->buffers.input.extra_count); + + //msm_vidc_update_dcvs(inst); + //msm_vidc_update_batching(inst); + memcpy(f, fmt, sizeof(struct v4l2_format)); -err_invalid_fmt: + return rc; +} + +static int msm_venc_s_fmt_input_meta(struct msm_vidc_inst *inst, struct v4l2_format *f) +{ + int rc = 0; + struct v4l2_format *fmt; + struct msm_vidc_core *core; + + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + core = inst->core; + + fmt = &inst->fmts[INPUT_META_PORT]; + fmt->type = INPUT_META_PLANE; + fmt->fmt.meta.dataformat = V4L2_META_FMT_VIDC; + if (is_input_meta_enabled(inst)) { + fmt->fmt.meta.buffersize = call_session_op(core, + buffer_size, inst, MSM_VIDC_BUF_OUTPUT_META); + inst->buffers.input_meta.min_count = + inst->buffers.input.min_count; + inst->buffers.input_meta.extra_count = + inst->buffers.input.extra_count; + inst->buffers.input_meta.actual_count = + inst->buffers.input.actual_count; + inst->buffers.input_meta.size = fmt->fmt.meta.buffersize; + } else { + fmt->fmt.meta.buffersize = 0; + inst->buffers.input_meta.min_count = 0; + inst->buffers.input_meta.extra_count = 0; + inst->buffers.input_meta.actual_count = 0; + inst->buffers.input_meta.size = 0; + } + i_vpr_h(inst, + "%s: input meta: size %d min_count %d extra_count %d\n", + __func__, fmt->fmt.meta.buffersize, + inst->buffers.input_meta.min_count, + inst->buffers.input_meta.extra_count); + + memcpy(f, fmt, sizeof(struct v4l2_format)); + return rc; +} + +static int msm_venc_s_fmt_output(struct msm_vidc_inst *inst, struct v4l2_format *f) +{ + int rc = 0; + struct v4l2_format *fmt; + struct msm_vidc_core *core; + u32 codec_align; + + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + core = inst->core; + + fmt = &inst->fmts[OUTPUT_PORT]; + if (fmt->fmt.pix_mp.pixelformat != f->fmt.pix_mp.pixelformat) { + i_vpr_h(inst, + "%s: codec changed from %#x to %#x\n", __func__, + fmt->fmt.pix_mp.pixelformat, f->fmt.pix_mp.pixelformat); + rc = msm_venc_codec_change(inst, f->fmt.pix_mp.pixelformat); + if (rc) + return rc; + } + fmt->type = OUTPUT_MPLANE; + + codec_align = f->fmt.pix_mp.pixelformat == + V4L2_PIX_FMT_HEVC ? 32 : 16; + /* width, height is readonly for client */ + fmt->fmt.pix_mp.width = ALIGN(inst->crop.width, codec_align); + fmt->fmt.pix_mp.height = ALIGN(inst->crop.height, codec_align); + fmt->fmt.pix_mp.pixelformat = f->fmt.pix_mp.pixelformat; + fmt->fmt.pix_mp.num_planes = 1; + fmt->fmt.pix_mp.plane_fmt[0].bytesperline = 0; + fmt->fmt.pix_mp.plane_fmt[0].sizeimage = call_session_op(core, + buffer_size, inst, MSM_VIDC_BUF_OUTPUT); + inst->buffers.output.min_count = call_session_op(core, + min_count, inst, MSM_VIDC_BUF_OUTPUT); + inst->buffers.output.extra_count = call_session_op(core, + extra_count, inst, MSM_VIDC_BUF_OUTPUT); + if (inst->buffers.output.actual_count < + inst->buffers.output.min_count + + inst->buffers.output.extra_count) { + inst->buffers.output.actual_count = + inst->buffers.output.min_count + + inst->buffers.output.extra_count; + } + inst->buffers.output.size = + fmt->fmt.pix_mp.plane_fmt[0].sizeimage; + + //rc = msm_vidc_check_session_supported(inst); + if (rc) + return rc; + + //update_log_ctxt(inst->sid, inst->session_type, + // mplane->pixelformat); + + i_vpr_h(inst, + "%s: output: format %#x width %d height %d size %d min_count %d extra_count %d\n", + __func__, fmt->fmt.pix_mp.pixelformat, fmt->fmt.pix_mp.width, + fmt->fmt.pix_mp.height, + fmt->fmt.pix_mp.plane_fmt[0].sizeimage, + inst->buffers.output.min_count, + inst->buffers.output.extra_count); + + memcpy(f, fmt, sizeof(struct v4l2_format)); + + return rc; +} + +static int msm_venc_s_fmt_output_meta(struct msm_vidc_inst *inst, struct v4l2_format *f) +{ + int rc = 0; + struct v4l2_format *fmt; + struct msm_vidc_core *core; + + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + core = inst->core; + + fmt = &inst->fmts[OUTPUT_META_PORT]; + fmt->type = OUTPUT_META_PLANE; + fmt->fmt.meta.dataformat = V4L2_META_FMT_VIDC; + if (is_output_meta_enabled(inst)) { + fmt->fmt.meta.buffersize = call_session_op(core, + buffer_size, inst, MSM_VIDC_BUF_OUTPUT_META); + inst->buffers.output_meta.min_count = + inst->buffers.output.min_count; + inst->buffers.output_meta.extra_count = + inst->buffers.output.extra_count; + inst->buffers.output_meta.actual_count = + inst->buffers.output.actual_count; + inst->buffers.output_meta.size = fmt->fmt.meta.buffersize; + } else { + fmt->fmt.meta.buffersize = 0; + inst->buffers.output_meta.min_count = 0; + inst->buffers.output_meta.extra_count = 0; + inst->buffers.output_meta.actual_count = 0; + inst->buffers.output_meta.size = 0; + } + i_vpr_h(inst, + "%s: output meta: size %d min_count %d extra_count %d\n", + __func__, fmt->fmt.meta.buffersize, + inst->buffers.output_meta.min_count, + inst->buffers.output_meta.extra_count); + + memcpy(f, fmt, sizeof(struct v4l2_format)); + return rc; +} + +// TODO: use PIX_FMTS caps to check supported color format +int msm_venc_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) +{ + int rc = 0; + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (f->type == INPUT_MPLANE) { + rc = msm_venc_s_fmt_input(inst, f); + if (rc) + return rc; + } else if (f->type == INPUT_META_PLANE) { + rc = msm_venc_s_fmt_input_meta(inst, f); + if (rc) + return rc; + } else if (f->type == OUTPUT_MPLANE) { + rc = msm_venc_s_fmt_output(inst, f); + if (rc) + return rc; + } else if (f->type == OUTPUT_META_PLANE) { + rc = msm_venc_s_fmt_output_meta(inst, f); + if (rc) + return rc; + } else { + i_vpr_e(inst, "%s: invalid type %d\n", __func__, f->type); + return rc; + } + return rc; } @@ -1201,7 +1279,6 @@ int msm_venc_g_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) int msm_venc_s_selection(struct msm_vidc_inst* inst, struct v4l2_selection* s) { int rc = 0; - u32 codec_align; if (!inst || !s) { d_vpr_e("%s: invalid params\n", __func__); @@ -1216,26 +1293,22 @@ int msm_venc_s_selection(struct msm_vidc_inst* inst, struct v4l2_selection* s) case V4L2_SEL_TGT_CROP_BOUNDS: case V4L2_SEL_TGT_CROP_DEFAULT: case V4L2_SEL_TGT_CROP: - codec_align = inst->fmts[OUTPUT_PORT].fmt.pix_mp.pixelformat == - V4L2_PIX_FMT_HEVC ? 32 : 16; if (s->r.left || s->r.top) { i_vpr_h(inst, "%s: unsupported top %d or left %d\n", __func__, s->r.left, s->r.top); s->r.left = s->r.top = 0; } - if (s->r.width > inst->fmts[OUTPUT_PORT].fmt.pix_mp.width || - ALIGN(s->r.width, codec_align) != inst->fmts[OUTPUT_PORT].fmt.pix_mp.width) { + if (s->r.width > inst->fmts[INPUT_PORT].fmt.pix_mp.width) { i_vpr_h(inst, "%s: unsupported width %d, fmt width %d\n", __func__, s->r.width, - inst->fmts[OUTPUT_PORT].fmt.pix_mp.width); - s->r.width = inst->fmts[OUTPUT_PORT].fmt.pix_mp.width; + inst->fmts[INPUT_PORT].fmt.pix_mp.width); + s->r.width = inst->fmts[INPUT_PORT].fmt.pix_mp.width; } - if (s->r.height > inst->fmts[OUTPUT_PORT].fmt.pix_mp.height || - ALIGN(s->r.height, codec_align) != inst->fmts[OUTPUT_PORT].fmt.pix_mp.height) { + if (s->r.height > inst->fmts[INPUT_PORT].fmt.pix_mp.height) { i_vpr_h(inst, "%s: unsupported height %d, fmt height %d\n", __func__, s->r.height, - inst->fmts[OUTPUT_PORT].fmt.pix_mp.height); - s->r.height = inst->fmts[OUTPUT_PORT].fmt.pix_mp.height; + inst->fmts[INPUT_PORT].fmt.pix_mp.height); + s->r.height = inst->fmts[INPUT_PORT].fmt.pix_mp.height; } inst->crop.left = s->r.left; @@ -1251,6 +1324,10 @@ int msm_venc_s_selection(struct msm_vidc_inst* inst, struct v4l2_selection* s) inst->compose.width = inst->crop.width; if (inst->compose.height > inst->crop.height) inst->compose.height = inst->crop.height; + /* update output format based on new crop dimensions */ + rc = msm_venc_s_fmt_output(inst, &inst->fmts[OUTPUT_PORT]); + if (rc) + return rc; break; case V4L2_SEL_TGT_COMPOSE_BOUNDS: case V4L2_SEL_TGT_COMPOSE_PADDED: From c1bb737feb96ad8980b3b8054bb2c00274984658 Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Tue, 16 Feb 2021 19:25:24 -0800 Subject: [PATCH 0122/1061] video: driver: modify default logging By default, enable only driver error, fw error and fatal logs. Change-Id: Ifdca1e26350b25b04555fd6fc402e8c3b7d28dfe Signed-off-by: Darshana Patil --- driver/vidc/src/msm_vidc_debug.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/driver/vidc/src/msm_vidc_debug.c b/driver/vidc/src/msm_vidc_debug.c index 8fab100036..4516abff99 100644 --- a/driver/vidc/src/msm_vidc_debug.c +++ b/driver/vidc/src/msm_vidc_debug.c @@ -14,8 +14,7 @@ #define MAX_SSR_STRING_LEN 10 #define MAX_DEBUG_LEVEL_STRING_LEN 15 -int msm_vidc_debug = VIDC_HIGH | VIDC_PKT | VIDC_ERR | VIDC_PRINTK | - FW_ERROR | FW_FATAL; +int msm_vidc_debug = VIDC_ERR | VIDC_PRINTK | FW_ERROR | FW_FATAL; EXPORT_SYMBOL(msm_vidc_debug); bool msm_vidc_lossless_encode = !true; From 577430f10f6caa750224c2cc9fbd0f5a864b8c2e Mon Sep 17 00:00:00 2001 From: Karthikeyan Periasamy Date: Wed, 17 Feb 2021 16:16:10 -0800 Subject: [PATCH 0123/1061] video: VIDC_INFO is deprecated Used VIDC_HIGH instead. CRs-Fixed: 2836558 Change-Id: I6a6a92f41aa18a175d8d8a405c95d2d18cdb2c42 Signed-off-by: Karthikeyan Periasamy --- driver/vidc/inc/msm_vidc_debug.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_debug.h b/driver/vidc/inc/msm_vidc_debug.h index b67c38b4f4..141e2991d7 100644 --- a/driver/vidc/inc/msm_vidc_debug.h +++ b/driver/vidc/inc/msm_vidc_debug.h @@ -64,7 +64,7 @@ enum vidc_msg_prio { } while (0) #define i_vpr_e(inst, __fmt, ...) dprintk_inst(VIDC_ERR, inst, __fmt, ##__VA_ARGS__) -#define i_vpr_i(inst, __fmt, ...) dprintk_inst(VIDC_INFO, inst, __fmt, ##__VA_ARGS__) +#define i_vpr_i(inst, __fmt, ...) dprintk_inst(VIDC_HIGH, inst, __fmt, ##__VA_ARGS__) #define i_vpr_h(inst, __fmt, ...) dprintk_inst(VIDC_HIGH, inst, __fmt, ##__VA_ARGS__) #define i_vpr_l(inst, __fmt, ...) dprintk_inst(VIDC_LOW, inst, __fmt, ##__VA_ARGS__) #define i_vpr_p(inst, __fmt, ...) dprintk_inst(VIDC_PERF, inst, __fmt, ##__VA_ARGS__) @@ -87,7 +87,7 @@ enum vidc_msg_prio { #define d_vpr_e(__fmt, ...) \ dprintk(VIDC_ERR, DEFAULT_SID, __fmt, ##__VA_ARGS__) #define d_vpr_i(__fmt, ...) \ - dprintk(VIDC_INFO, DEFAULT_SID, __fmt, ##__VA_ARGS__) + dprintk(VIDC_HIGH, DEFAULT_SID, __fmt, ##__VA_ARGS__) #define d_vpr_h(__fmt, ...) \ dprintk(VIDC_HIGH, DEFAULT_SID, __fmt, ##__VA_ARGS__) #define d_vpr_l(__fmt, ...) \ From b8996ba0089e049ef44ffd7c05e5877c71538424 Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Wed, 17 Feb 2021 15:54:55 -0800 Subject: [PATCH 0124/1061] video: driver: modify crop offsets property modify crop offsets property to match the hfi header file. Change-Id: Id4cd1e6f68a811e7d3dfbaeb80b20bff98eaf35c Signed-off-by: Darshana Patil --- driver/vidc/inc/msm_vidc_internal.h | 2 +- driver/vidc/src/msm_vdec.c | 29 ++++++++++++++++------------ driver/vidc/src/msm_venc.c | 6 +++--- driver/vidc/src/venus_hfi_response.c | 9 +++++---- 4 files changed, 26 insertions(+), 20 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 4cde4f524e..7eac2c434f 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -588,7 +588,7 @@ struct msm_vidc_rectangle { struct msm_vidc_subscription_params { u32 bitstream_resolution; - u64 crop_offsets; + u32 crop_offsets[2]; u32 bit_depth; u32 coded_frames; u32 fw_min_count; diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 718fde638c..51ccdc3a98 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -129,7 +129,7 @@ static int msm_vdec_set_crop_offsets(struct msm_vidc_inst *inst, { int rc = 0; u32 left_offset, top_offset, right_offset, bottom_offset; - u64 payload; + u32 payload[2] = {0}; if (inst->fmts[INPUT_PORT].fmt.pix_mp.width < inst->crop.width) @@ -146,12 +146,13 @@ static int msm_vdec_set_crop_offsets(struct msm_vidc_inst *inst, bottom_offset = (inst->fmts[INPUT_PORT].fmt.pix_mp.height - inst->crop.height); - payload = (u64)right_offset << 48 | (u64)bottom_offset << 32 | - (u64)left_offset << 16 | top_offset; + payload[0] = left_offset << 16 | top_offset; + payload[1] = right_offset << 16 | bottom_offset; i_vpr_h(inst, "%s: left_offset: %d top_offset: %d " "right_offset: %d bottom_offset: %d", __func__, left_offset, top_offset, right_offset, bottom_offset); - inst->subcr_params[port].crop_offsets = payload; + inst->subcr_params[port].crop_offsets[0] = payload[0]; + inst->subcr_params[port].crop_offsets[1] = payload[1]; rc = venus_hfi_session_property(inst, HFI_PROP_CROP_OFFSETS, HFI_HOST_FLAGS_NONE, @@ -1235,12 +1236,12 @@ static int msm_vdec_update_properties(struct msm_vidc_inst *inst) inst->buffers.output.min_count = subsc_params.fw_min_count; - inst->crop.top = subsc_params.crop_offsets & 0xFFFF; - inst->crop.left = (subsc_params.crop_offsets >> 16) & 0xFFFF; + inst->crop.top = subsc_params.crop_offsets[0] & 0xFFFF; + inst->crop.left = (subsc_params.crop_offsets[0] >> 16) & 0xFFFF; inst->crop.height = inst->fmts[INPUT_PORT].fmt.pix_mp.height - - ((subsc_params.crop_offsets >> 32) & 0xFFFF); + (subsc_params.crop_offsets[1] & 0xFFFF); inst->crop.width = inst->fmts[INPUT_PORT].fmt.pix_mp.width - - ((subsc_params.crop_offsets >> 48) & 0xFFFF); + ((subsc_params.crop_offsets[1] >> 16) & 0xFFFF); inst->capabilities->cap[PROFILE].value = subsc_params.profile; inst->capabilities->cap[LEVEL].value = subsc_params.level; @@ -1450,8 +1451,8 @@ static int msm_vdec_subscribe_output_port_settings_change(struct msm_vidc_inst * payload_type = HFI_PAYLOAD_U32; break; case HFI_PROP_CROP_OFFSETS: - payload[0] = subsc_params.crop_offsets >> 32; - payload[1] = subsc_params.crop_offsets; + payload[0] = subsc_params.crop_offsets[0]; + payload[1] = subsc_params.crop_offsets[1]; payload_size = sizeof(u64); payload_type = HFI_PAYLOAD_64_PACKED; break; @@ -1667,6 +1668,7 @@ int msm_vdec_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) int rc = 0; struct msm_vidc_core *core; struct v4l2_format *fmt; + u32 codec_align; if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); @@ -1687,8 +1689,11 @@ int msm_vdec_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) } fmt = &inst->fmts[INPUT_PORT]; fmt->type = INPUT_MPLANE; - fmt->fmt.pix_mp.width = ALIGN(f->fmt.pix_mp.width, 16); - fmt->fmt.pix_mp.height = ALIGN(f->fmt.pix_mp.height, 16); + + codec_align = inst->fmts[INPUT_PORT].fmt.pix_mp.pixelformat == + V4L2_PIX_FMT_HEVC ? 32 : 16; + fmt->fmt.pix_mp.width = ALIGN(f->fmt.pix_mp.width, codec_align); + fmt->fmt.pix_mp.height = ALIGN(f->fmt.pix_mp.height, codec_align); fmt->fmt.pix_mp.pixelformat = f->fmt.pix_mp.pixelformat; fmt->fmt.pix_mp.num_planes = 1; fmt->fmt.pix_mp.plane_fmt[0].bytesperline = 0; diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index eac9d4c22b..e685f5c6b7 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -206,7 +206,7 @@ static int msm_venc_set_crop_offsets(struct msm_vidc_inst *inst, { int rc = 0; u32 left_offset, top_offset, right_offset, bottom_offset; - u64 crop; + u32 crop[2] = {0}; if (port != OUTPUT_PORT) { i_vpr_e(inst, "%s: invalid port %d\n", __func__, port); @@ -220,8 +220,8 @@ static int msm_venc_set_crop_offsets(struct msm_vidc_inst *inst, bottom_offset = (inst->fmts[port].fmt.pix_mp.height - inst->crop.height); - crop = (u64)right_offset << 48 | (u64)bottom_offset << 32 | - (u64)left_offset << 16 | top_offset; + crop[0] = left_offset << 16 | top_offset; + crop[1] = right_offset << 16 | bottom_offset; i_vpr_h(inst, "%s: left_offset: %d top_offset: %d " "right_offset: %d bottom_offset: %d", __func__, left_offset, top_offset, right_offset, bottom_offset); diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index f4a0a1689e..8f899d3d9b 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -26,9 +26,10 @@ void print_psc_properties(u32 tag, const char *str, struct msm_vidc_inst *inst, return; dprintk(tag, inst->sid, - "%s: resolution %#x, crop offsets %#llx, bit depth %d, coded frames %d " + "%s: resolution %#x, crop offsets[0] %#x, crop offsets[1] %#x, bit depth %d, coded frames %d " "fw min count %d, poc %d, color info %d, profile %d, level %d, tier %d ", - str, subsc_params.bitstream_resolution, subsc_params.crop_offsets, + str, subsc_params.bitstream_resolution, + subsc_params.crop_offsets[0], subsc_params.crop_offsets[1], subsc_params.bit_depth, subsc_params.coded_frames, subsc_params.fw_min_count, subsc_params.pic_order_cnt, subsc_params.color_info, subsc_params.profile, subsc_params.level, @@ -1059,8 +1060,8 @@ static int handle_session_property(struct msm_vidc_inst *inst, inst->subcr_params[port].bitstream_resolution = payload_ptr[0]; break; case HFI_PROP_CROP_OFFSETS: - inst->subcr_params[port].crop_offsets = - (u64)payload_ptr[0] << 32 | payload_ptr[1]; + inst->subcr_params[port].crop_offsets[0] = payload_ptr[0]; + inst->subcr_params[port].crop_offsets[1] = payload_ptr[1]; break; case HFI_PROP_LUMA_CHROMA_BIT_DEPTH: inst->subcr_params[port].bit_depth = payload_ptr[0]; From 3ad2fda959fef632cdabbc9654be78488bde3c84 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Tue, 16 Feb 2021 14:25:45 -0800 Subject: [PATCH 0125/1061] video: driver: add support to set colorspace for enc - Set enc colorspace info to firmware via HFI_PROP_SIGNAL_COLOR_INFO property. - Fix dec colorspace payload packaging. Change-Id: Ib7ef2395a4f98f6497bbb200770a8612410eb8f5 Signed-off-by: Akshata Sahukar --- driver/platform/waipio/src/msm_vidc_waipio.c | 7 + driver/vidc/inc/msm_vidc_internal.h | 1 + driver/vidc/src/msm_vdec.c | 94 +++++++++-- driver/vidc/src/msm_venc.c | 154 +++++++++++++++++-- 4 files changed, 227 insertions(+), 29 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 42226a8959..8cc5f1cfb8 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -374,6 +374,13 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { HFI_PROP_BLUR_RESOLUTION, CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + {CSC, ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, + HFI_PROP_CSC}, + /* Needed for control initialization. TODO */ /* {CSC_CUSTOM_MATRIX, ENC, CODECS_ALL, V4L2_MPEG_MSM_VIDC_DISABLE, diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 7eac2c434f..234e8ed392 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -281,6 +281,7 @@ enum msm_vidc_inst_capability_type { GOP_CLOSURE, BLUR_TYPES, BLUR_RESOLUTION, + CSC, CSC_CUSTOM_MATRIX, HEIC, LOWLATENCY_MODE, diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 51ccdc3a98..de36f8b734 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -312,26 +312,54 @@ static int msm_vdec_set_colorspace(struct msm_vidc_inst *inst, enum msm_vidc_port_type port) { int rc = 0; - u32 colorspace, xfer_func, ycbcr_enc, color_info; + u32 primaries, matrix_coeff, transfer_char; + u32 full_range = 0; + u32 colour_description_present_flag = 0; + u32 video_signal_type_present_flag = 0, color_info = 0; + /* Unspecified video format */ + u32 video_format = 5; if (port != INPUT_PORT && port != OUTPUT_PORT) { i_vpr_e(inst, "%s: invalid port %d\n", __func__, port); return -EINVAL; } - colorspace = inst->fmts[OUTPUT_PORT].fmt.pix_mp.colorspace; - xfer_func = inst->fmts[OUTPUT_PORT].fmt.pix_mp.xfer_func; - ycbcr_enc = inst->fmts[OUTPUT_PORT].fmt.pix_mp.ycbcr_enc; + if (inst->codec != MSM_VIDC_H264 && inst->codec != MSM_VIDC_HEVC) + return 0; + + primaries = inst->fmts[port].fmt.pix_mp.colorspace; + matrix_coeff = inst->fmts[port].fmt.pix_mp.ycbcr_enc; + transfer_char = inst->fmts[port].fmt.pix_mp.xfer_func; + + if (primaries != V4L2_COLORSPACE_DEFAULT || + transfer_char != V4L2_XFER_FUNC_DEFAULT || + matrix_coeff != V4L2_YCBCR_ENC_DEFAULT) { + colour_description_present_flag = 1; + video_signal_type_present_flag = 1; + } + + if (inst->fmts[port].fmt.pix_mp.quantization != + V4L2_QUANTIZATION_DEFAULT) { + video_signal_type_present_flag = 1; + full_range = inst->fmts[port].fmt.pix_mp.quantization == + V4L2_QUANTIZATION_FULL_RANGE ? 1 : 0; + } + + color_info = (matrix_coeff & 0xFF) | + ((transfer_char << 8) & 0xFF00) | + ((primaries << 16) & 0xFF0000) | + ((colour_description_present_flag << 24) & 0x1000000) | + ((full_range << 25) & 0x2000000) | + ((video_format << 26) & 0x1C000000) | + ((video_signal_type_present_flag << 29) & 0x20000000); - color_info = ((ycbcr_enc << 16) & 0xFF0000) | - ((xfer_func << 8) & 0xFF00) | (colorspace & 0xFF); inst->subcr_params[port].color_info = color_info; - i_vpr_h(inst, "%s: color info: %d", __func__, color_info); + i_vpr_h(inst, "%s: color info: %#x\n", __func__, color_info); rc = venus_hfi_session_property(inst, HFI_PROP_SIGNAL_COLOR_INFO, HFI_HOST_FLAGS_NONE, get_hfi_port(inst, port), - HFI_PAYLOAD_U32, + HFI_PAYLOAD_32_PACKED, &color_info, sizeof(u32)); if (rc) @@ -1197,6 +1225,10 @@ static int msm_vdec_update_properties(struct msm_vidc_inst *inst) struct msm_vidc_subscription_params subsc_params; struct msm_vidc_core *core; u32 width, height; + u32 primaries, matrix_coeff, transfer_char; + u32 full_range = 0, video_format = 0; + u32 colour_description_present_flag = 0; + u32 video_signal_type_present_flag = 0; if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); @@ -1227,12 +1259,42 @@ static int msm_vdec_update_properties(struct msm_vidc_inst *inst) call_session_op(core, buffer_size, inst, MSM_VIDC_BUF_OUTPUT); //inst->buffers.output.size = inst->fmts[OUTPUT_PORT].fmt.pix_mp.plane_fmt[0].sizeimage; - inst->fmts[OUTPUT_PORT].fmt.pix_mp.colorspace = - (subsc_params.color_info & 0xFF0000) >> 16; - inst->fmts[OUTPUT_PORT].fmt.pix_mp.xfer_func = - (subsc_params.color_info & 0xFF00) >> 8; - inst->fmts[OUTPUT_PORT].fmt.pix_mp.ycbcr_enc = - subsc_params.color_info & 0xFF; + matrix_coeff = subsc_params.color_info & 0xFF; + transfer_char = (subsc_params.color_info & 0xFF00) >> 8; + primaries = (subsc_params.color_info & 0xFF0000) >> 16; + colour_description_present_flag = + (subsc_params.color_info & 0x1000000) >> 24; + full_range = (subsc_params.color_info & 0x2000000) >> 25; + video_signal_type_present_flag = + (subsc_params.color_info & 0x20000000) >> 29; + + inst->fmts[OUTPUT_PORT].fmt.pix_mp.colorspace = V4L2_COLORSPACE_DEFAULT; + inst->fmts[OUTPUT_PORT].fmt.pix_mp.xfer_func = V4L2_XFER_FUNC_DEFAULT; + inst->fmts[OUTPUT_PORT].fmt.pix_mp.ycbcr_enc = V4L2_YCBCR_ENC_DEFAULT; + inst->fmts[OUTPUT_PORT].fmt.pix_mp.quantization = V4L2_QUANTIZATION_DEFAULT; + + if (video_signal_type_present_flag) { + video_format = (subsc_params.color_info & 0x1C000000) >> 26; + inst->fmts[OUTPUT_PORT].fmt.pix_mp.quantization = + full_range ? + V4L2_QUANTIZATION_FULL_RANGE : + V4L2_QUANTIZATION_LIM_RANGE; + if (colour_description_present_flag) { + inst->fmts[OUTPUT_PORT].fmt.pix_mp.colorspace = + primaries; + inst->fmts[OUTPUT_PORT].fmt.pix_mp.xfer_func = + transfer_char; + inst->fmts[OUTPUT_PORT].fmt.pix_mp.ycbcr_enc = + matrix_coeff; + } else { + i_vpr_h(inst, + "%s: color description flag is not present\n", + __func__); + } + } else { + i_vpr_h(inst, "%s: video_signal type is not present\n", + __func__); + } inst->buffers.output.min_count = subsc_params.fw_min_count; @@ -2156,6 +2218,10 @@ int msm_vdec_inst_init(struct msm_vidc_inst *inst) f->fmt.pix_mp.plane_fmt[0].bytesperline = f->fmt.pix_mp.width; f->fmt.pix_mp.plane_fmt[0].sizeimage = call_session_op(core, buffer_size, inst, MSM_VIDC_BUF_OUTPUT); + f->fmt.pix_mp.colorspace = V4L2_COLORSPACE_DEFAULT; + f->fmt.pix_mp.xfer_func = V4L2_XFER_FUNC_DEFAULT; + f->fmt.pix_mp.ycbcr_enc = V4L2_YCBCR_ENC_DEFAULT; + f->fmt.pix_mp.quantization = V4L2_QUANTIZATION_DEFAULT; inst->buffers.output.min_count = call_session_op(core, min_count, inst, MSM_VIDC_BUF_OUTPUT); inst->buffers.output.extra_count = call_session_op(core, diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index e685f5c6b7..6edf76f92b 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -22,12 +22,14 @@ u32 msm_venc_input_set_prop[] = { HFI_PROP_RAW_RESOLUTION, HFI_PROP_LINEAR_STRIDE_SCANLINE, HFI_PROP_BUFFER_HOST_MAX_COUNT, + HFI_PROP_SIGNAL_COLOR_INFO, }; u32 msm_venc_output_set_prop[] = { HFI_PROP_BITSTREAM_RESOLUTION, HFI_PROP_CROP_OFFSETS, HFI_PROP_BUFFER_HOST_MAX_COUNT, + HFI_PROP_CSC, }; u32 msm_venc_input_subscribe_for_properties[] = { @@ -262,6 +264,104 @@ static int msm_venc_set_host_max_buf_count(struct msm_vidc_inst *inst, return 0; } +static int msm_venc_set_colorspace(struct msm_vidc_inst* inst, + enum msm_vidc_port_type port) +{ + int rc = 0; + u32 primaries, matrix_coeff, transfer_char; + u32 full_range = 0; + u32 colour_description_present_flag = 0; + u32 video_signal_type_present_flag = 0, payload = 0; + /* Unspecified video format */ + u32 video_format = 5; + + if (port != INPUT_PORT) { + i_vpr_e(inst, "%s: invalid port %d\n", __func__, port); + return -EINVAL; + } + + primaries = inst->fmts[port].fmt.pix_mp.colorspace; + matrix_coeff = inst->fmts[port].fmt.pix_mp.ycbcr_enc; + transfer_char = inst->fmts[port].fmt.pix_mp.xfer_func; + + if (primaries != V4L2_COLORSPACE_DEFAULT || + transfer_char != V4L2_XFER_FUNC_DEFAULT || + matrix_coeff != V4L2_YCBCR_ENC_DEFAULT) { + colour_description_present_flag = 1; + video_signal_type_present_flag = 1; + } + + if (inst->fmts[port].fmt.pix_mp.quantization != + V4L2_QUANTIZATION_DEFAULT) { + video_signal_type_present_flag = 1; + full_range = inst->fmts[port].fmt.pix_mp.quantization == + V4L2_QUANTIZATION_FULL_RANGE ? 1 : 0; + } + + payload = (matrix_coeff & 0xFF) | + ((transfer_char << 8) & 0xFF00) | + ((primaries << 16) & 0xFF0000) | + ((colour_description_present_flag << 24) & 0x1000000) | + ((full_range << 25) & 0x2000000) | + ((video_format << 26) & 0x1C000000) | + ((video_signal_type_present_flag << 29) & 0x20000000); + i_vpr_h(inst, "%s: color info: %#x\n", __func__, payload); + rc = venus_hfi_session_property(inst, + HFI_PROP_SIGNAL_COLOR_INFO, + HFI_HOST_FLAGS_NONE, + get_hfi_port(inst, port), + HFI_PAYLOAD_32_PACKED, + &payload, + sizeof(u32)); + if (rc) + return rc; + return 0; +} + +static bool msm_venc_csc_required(struct msm_vidc_inst* inst) +{ + struct v4l2_format *in_fmt = &inst->fmts[INPUT_PORT]; + struct v4l2_format *out_fmt = &inst->fmts[OUTPUT_PORT]; + + /* video hardware supports conversion to REC709 CSC only */ + if (in_fmt->fmt.pix_mp.colorspace != out_fmt->fmt.pix_mp.colorspace && + out_fmt->fmt.pix_mp.colorspace == V4L2_COLORSPACE_REC709) + return true; + + return false; +} + +static int msm_venc_set_csc(struct msm_vidc_inst* inst, + enum msm_vidc_port_type port) +{ + int rc = 0; + u32 csc = 0; + + if (port != OUTPUT_PORT) { + i_vpr_e(inst, "%s: invalid port %d\n", __func__, port); + return -EINVAL; + } + + if (msm_venc_csc_required(inst)) + inst->capabilities->cap[CSC].value = 1; + else + inst->capabilities->cap[CSC].value = 0; + + csc = inst->capabilities->cap[CSC].value; + i_vpr_h(inst, "%s: csc: %u\n", __func__, csc); + rc = venus_hfi_session_property(inst, + HFI_PROP_CSC, + HFI_HOST_FLAGS_NONE, + get_hfi_port(inst, port), + HFI_PAYLOAD_U32, + &csc, + sizeof(u32)); + if (rc) + return rc; + + return 0; +} + static int msm_venc_set_stage(struct msm_vidc_inst *inst) { int rc = 0; @@ -351,11 +451,11 @@ static int msm_venc_set_input_properties(struct msm_vidc_inst *inst) int rc = 0; int i = 0; - d_vpr_h("%s()\n", __func__); if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } + i_vpr_h(inst, "%s()\n", __func__); for (i = 0; i < ARRAY_SIZE(msm_venc_input_set_prop); i++) { @@ -372,6 +472,9 @@ static int msm_venc_set_input_properties(struct msm_vidc_inst *inst) case HFI_PROP_BUFFER_HOST_MAX_COUNT: rc = msm_venc_set_host_max_buf_count(inst, INPUT_PORT); break; + case HFI_PROP_SIGNAL_COLOR_INFO: + rc = msm_venc_set_colorspace(inst, INPUT_PORT); + break; default: d_vpr_e("%s: unknown property %#x\n", __func__, msm_venc_input_set_prop[i]); @@ -392,11 +495,11 @@ static int msm_venc_set_output_properties(struct msm_vidc_inst *inst) int rc = 0; int i = 0; - d_vpr_h("%s()\n", __func__); if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } + i_vpr_h(inst, "%s()\n", __func__); for (i = 0; i < ARRAY_SIZE(msm_venc_output_set_prop); i++) { @@ -410,6 +513,9 @@ static int msm_venc_set_output_properties(struct msm_vidc_inst *inst) case HFI_PROP_BUFFER_HOST_MAX_COUNT: rc = msm_venc_set_host_max_buf_count(inst, OUTPUT_PORT); break; + case HFI_PROP_CSC: + rc = msm_venc_set_csc(inst, OUTPUT_PORT); + break; default: d_vpr_e("%s: unknown property %#x\n", __func__, msm_venc_output_set_prop[i]); @@ -429,11 +535,11 @@ static int msm_venc_set_internal_properties(struct msm_vidc_inst *inst) { int rc = 0; - d_vpr_h("%s()\n", __func__); if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } + i_vpr_h(inst, "%s()\n", __func__); //TODO: set HFI_PORT_NONE properties at master port streamon. rc = msm_venc_set_stage(inst); @@ -481,7 +587,6 @@ static int msm_venc_create_input_internal_buffers(struct msm_vidc_inst *inst) { int rc = 0; /* TODO: VPSS - d_vpr_h("%s()\n", __func__); if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; @@ -499,7 +604,6 @@ static int msm_venc_queue_input_internal_buffers(struct msm_vidc_inst *inst) int rc = 0; /* TODO: VPSS - d_vpr_h("%s()\n", __func__); if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; @@ -567,7 +671,6 @@ static int msm_venc_create_output_internal_buffers(struct msm_vidc_inst *inst) { int rc = 0; - d_vpr_h("%s()\n", __func__); if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; @@ -596,7 +699,6 @@ static int msm_venc_queue_output_internal_buffers(struct msm_vidc_inst *inst) { int rc = 0; - d_vpr_h("%s()\n", __func__); if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; @@ -635,7 +737,7 @@ static int msm_venc_property_subscription(struct msm_vidc_inst *inst, return -EINVAL; } core = inst->core; - d_vpr_h("%s()\n", __func__); + i_vpr_h(inst, "%s()\n", __func__); payload[0] = HFI_MODE_PROPERTY; if (port == INPUT_PORT) { @@ -685,7 +787,7 @@ static int msm_venc_metadata_delivery(struct msm_vidc_inst *inst, return -EINVAL; } core = inst->core; - d_vpr_h("%s()\n", __func__); + i_vpr_h(inst, "%s()\n", __func__); capability = inst->capabilities; payload[0] = HFI_MODE_METADATA; @@ -697,6 +799,7 @@ static int msm_venc_metadata_delivery(struct msm_vidc_inst *inst, } }; + // TODO: remove below check later if (!count) return 0; @@ -732,7 +835,7 @@ static int msm_venc_metadata_subscription(struct msm_vidc_inst *inst, return -EINVAL; } core = inst->core; - d_vpr_h("%s()\n", __func__); + i_vpr_h(inst, "%s()\n", __func__); capability = inst->capabilities; payload[0] = HFI_MODE_METADATA; @@ -744,6 +847,7 @@ static int msm_venc_metadata_subscription(struct msm_vidc_inst *inst, } }; + // TODO: remove below check later if (!count) return 0; @@ -761,7 +865,7 @@ int msm_venc_streamoff_input(struct msm_vidc_inst *inst) { int rc = 0; - if (!inst || !inst->core) { + if (!inst || !inst->core || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -777,7 +881,7 @@ int msm_venc_streamon_input(struct msm_vidc_inst *inst) { int rc = 0; - if (!inst || !inst->core) { + if (!inst || !inst->core || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -903,7 +1007,7 @@ int msm_venc_streamoff_output(struct msm_vidc_inst *inst) { int rc = 0; - if (!inst || !inst->core) { + if (!inst || !inst->core || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -919,7 +1023,7 @@ int msm_venc_streamon_output(struct msm_vidc_inst *inst) { int rc = 0; - if (!inst || !inst->core) { + if (!inst || !inst->core || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -987,7 +1091,7 @@ static int msm_venc_s_fmt_input(struct msm_vidc_inst *inst, struct v4l2_format * struct msm_vidc_core *core; u32 codec_align; - if (!inst || !inst->core) { + if (!inst || !inst->core || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -1008,6 +1112,10 @@ static int msm_venc_s_fmt_input(struct msm_vidc_inst *inst, struct v4l2_format * fmt->fmt.pix_mp.width; fmt->fmt.pix_mp.plane_fmt[0].sizeimage = call_session_op(core, buffer_size, inst, MSM_VIDC_BUF_INPUT); + fmt->fmt.pix_mp.colorspace = f->fmt.pix_mp.colorspace; + fmt->fmt.pix_mp.xfer_func = f->fmt.pix_mp.xfer_func; + fmt->fmt.pix_mp.ycbcr_enc = f->fmt.pix_mp.ycbcr_enc; + fmt->fmt.pix_mp.quantization = f->fmt.pix_mp.quantization; inst->buffers.input.min_count = call_session_op(core, min_count, inst, MSM_VIDC_BUF_INPUT); inst->buffers.input.extra_count = call_session_op(core, @@ -1147,6 +1255,14 @@ static int msm_venc_s_fmt_output(struct msm_vidc_inst *inst, struct v4l2_format fmt->fmt.pix_mp.plane_fmt[0].bytesperline = 0; fmt->fmt.pix_mp.plane_fmt[0].sizeimage = call_session_op(core, buffer_size, inst, MSM_VIDC_BUF_OUTPUT); + /* video hw supports conversion to V4L2_COLORSPACE_REC709 only */ + if (f->fmt.pix_mp.colorspace != V4L2_COLORSPACE_DEFAULT && + f->fmt.pix_mp.colorspace != V4L2_COLORSPACE_REC709) + f->fmt.pix_mp.colorspace = V4L2_COLORSPACE_DEFAULT; + fmt->fmt.pix_mp.colorspace = f->fmt.pix_mp.colorspace; + fmt->fmt.pix_mp.xfer_func = f->fmt.pix_mp.xfer_func; + fmt->fmt.pix_mp.ycbcr_enc = f->fmt.pix_mp.ycbcr_enc; + fmt->fmt.pix_mp.quantization = f->fmt.pix_mp.quantization; inst->buffers.output.min_count = call_session_op(core, min_count, inst, MSM_VIDC_BUF_OUTPUT); inst->buffers.output.extra_count = call_session_op(core, @@ -1630,6 +1746,10 @@ int msm_venc_inst_init(struct msm_vidc_inst *inst) f->fmt.pix_mp.plane_fmt[0].bytesperline = 0; f->fmt.pix_mp.plane_fmt[0].sizeimage = call_session_op(core, buffer_size, inst, MSM_VIDC_BUF_OUTPUT); + f->fmt.pix_mp.colorspace = V4L2_COLORSPACE_DEFAULT; + f->fmt.pix_mp.xfer_func = V4L2_XFER_FUNC_DEFAULT; + f->fmt.pix_mp.ycbcr_enc = V4L2_YCBCR_ENC_DEFAULT; + f->fmt.pix_mp.quantization = V4L2_QUANTIZATION_DEFAULT; inst->buffers.output.min_count = call_session_op(core, min_count, inst, MSM_VIDC_BUF_OUTPUT); inst->buffers.output.extra_count = call_session_op(core, @@ -1665,6 +1785,10 @@ int msm_venc_inst_init(struct msm_vidc_inst *inst) f->fmt.pix_mp.plane_fmt[0].bytesperline = f->fmt.pix_mp.width; f->fmt.pix_mp.plane_fmt[0].sizeimage = call_session_op(core, buffer_size, inst, MSM_VIDC_BUF_INPUT); + f->fmt.pix_mp.colorspace = V4L2_COLORSPACE_DEFAULT; + f->fmt.pix_mp.xfer_func = V4L2_XFER_FUNC_DEFAULT; + f->fmt.pix_mp.ycbcr_enc = V4L2_YCBCR_ENC_DEFAULT; + f->fmt.pix_mp.quantization = V4L2_QUANTIZATION_DEFAULT; inst->buffers.input.min_count = call_session_op(core, min_count, inst, MSM_VIDC_BUF_INPUT); inst->buffers.input.extra_count = call_session_op(core, From a11586233af375d3ac0956ae00847143d1d9e12e Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Thu, 18 Feb 2021 10:48:58 -0800 Subject: [PATCH 0126/1061] video: driver: handle resume command response handle resume command response from fw. Change-Id: Ib45a7e1f6b6ffab6573699dfc4efb2305ced511c Signed-off-by: Darshana Patil --- driver/vidc/src/msm_vidc_driver.c | 2 +- driver/vidc/src/venus_hfi_response.c | 15 +++++++++++++++ 2 files changed, 16 insertions(+), 1 deletion(-) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 90200132c3..97837f75b4 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -1849,7 +1849,7 @@ int msm_vidc_release_internal_buffers(struct msm_vidc_inst *inst, /* mark pending release */ buffer->attr |= MSM_VIDC_ATTR_PENDING_RELEASE; - i_vpr_e(inst, "%s: released buffer_type %#x, size %d\n", + i_vpr_h(inst, "%s: released buffer_type %#x, size %d\n", __func__, buffer_type, buffers->size); } diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index 8f899d3d9b..ab63612e0d 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -1013,6 +1013,19 @@ static int handle_session_delivery_mode(struct msm_vidc_inst *inst, return 0; } +static int handle_session_resume(struct msm_vidc_inst *inst, + struct hfi_packet *pkt) +{ + if (pkt->flags & HFI_FW_FLAGS_SESSION_ERROR) { + i_vpr_e(inst, "%s: received session error\n", __func__); + msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); + } + + if (pkt->flags & HFI_FW_FLAGS_SUCCESS) + i_vpr_h(inst, "%s: successful\n", __func__); + return 0; +} + static int handle_session_command(struct msm_vidc_inst *inst, struct hfi_packet *pkt) { @@ -1035,6 +1048,8 @@ static int handle_session_command(struct msm_vidc_inst *inst, return handle_session_subscribe_mode(inst, pkt); case HFI_CMD_DELIVERY_MODE: return handle_session_delivery_mode(inst, pkt); + case HFI_CMD_RESUME: + return handle_session_resume(inst, pkt); default: i_vpr_e(inst, "%s: Unsupported command type: %#x\n", __func__, pkt->type); From b42f622d58cb802250991db9f9df7bcbb1bce09f Mon Sep 17 00:00:00 2001 From: Mihir Ganu Date: Thu, 18 Feb 2021 18:41:25 -0800 Subject: [PATCH 0127/1061] video: driver: Check capabilities pointer before accessing it Core capabitlities are not created before opening first instance, hence add a check before accesing capabilities. Change-Id: I46b85e685624a2219fcf9e1153f8f470c17dcec0 Signed-off-by: Mihir Ganu --- driver/vidc/src/msm_vidc_debug.c | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/driver/vidc/src/msm_vidc_debug.c b/driver/vidc/src/msm_vidc_debug.c index 4516abff99..c70a4e2390 100644 --- a/driver/vidc/src/msm_vidc_debug.c +++ b/driver/vidc/src/msm_vidc_debug.c @@ -222,12 +222,14 @@ static ssize_t debug_level_write(struct file* filp, const char __user* buf, rc = -EINVAL; goto exit; } - core->capabilities[HW_RESPONSE_TIMEOUT].value = - ((msm_vidc_debug & 0xFF) > - (VIDC_ERR | VIDC_HIGH)) ? 1500 : 1000; rc = count; - d_vpr_h("debug timeout updated to - %d ms\n", - core->capabilities[HW_RESPONSE_TIMEOUT].value); + if (core->capabilities) { + core->capabilities[HW_RESPONSE_TIMEOUT].value = + ((msm_vidc_debug & 0xFF) > + (VIDC_ERR | VIDC_HIGH)) ? 1500 : 1000; + d_vpr_h("debug timeout updated to - %d ms\n", + core->capabilities[HW_RESPONSE_TIMEOUT].value); + } exit: return rc; From 0cae147e2afbe2f9e38c965f38cc14c97cd6807e Mon Sep 17 00:00:00 2001 From: Maheshwar Ajja Date: Thu, 18 Feb 2021 19:48:13 -0800 Subject: [PATCH 0128/1061] video: driver: reset required buffer attributes Reset all attributes except read only attribute in msm_vidc_get_driver_buf() for an existing buffer to avoid buffer flow problems in driver. Change-Id: If6170caa9b9315f73b6023ef496aed2ba3e6efba Signed-off-by: Maheshwar Ajja --- driver/vidc/src/msm_vidc_driver.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 90200132c3..7d9d7aa801 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -1380,7 +1380,11 @@ struct msm_vidc_buffer *msm_vidc_get_driver_buf(struct msm_vidc_inst *inst, buf->dmabuf = dmabuf; INIT_LIST_HEAD(&buf->list); list_add_tail(&buf->list, &buffers->list); + } else { + /* reset all attributes except read only */ + buf->attr &= MSM_VIDC_ATTR_READ_ONLY; } + rc = vb2_buffer_to_driver(vb2, buf); if (rc) goto error; From 0126cc3d4b778ab5a4a762dd82090b4e2c8a8f2e Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Thu, 18 Feb 2021 18:26:43 -0800 Subject: [PATCH 0129/1061] video: driver: modify decoder subscribe psc list modify decoder subscribe psc list according to supported codecs. Change-Id: Id54ea26bac07491b80877ef88ab7888c08750335 Signed-off-by: Darshana Patil --- driver/vidc/src/msm_vdec.c | 97 ++++++++++++++++++++++++++++++-------- 1 file changed, 78 insertions(+), 19 deletions(-) diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index de36f8b734..6e391e0a54 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -19,17 +19,35 @@ #include "venus_hfi.h" #include "hfi_packet.h" -u32 msm_vdec_subscribe_for_port_settings_change[] = { +u32 msm_vdec_subscribe_for_psc_avc[] = { HFI_PROP_BITSTREAM_RESOLUTION, HFI_PROP_CROP_OFFSETS, - HFI_PROP_LUMA_CHROMA_BIT_DEPTH, HFI_PROP_CODED_FRAMES, HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT, HFI_PROP_PIC_ORDER_CNT_TYPE, + HFI_PROP_PROFILE, + HFI_PROP_LEVEL, HFI_PROP_SIGNAL_COLOR_INFO, +}; + +u32 msm_vdec_subscribe_for_psc_hevc[] = { + HFI_PROP_BITSTREAM_RESOLUTION, + HFI_PROP_CROP_OFFSETS, + HFI_PROP_LUMA_CHROMA_BIT_DEPTH, + HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT, HFI_PROP_PROFILE, HFI_PROP_LEVEL, HFI_PROP_TIER, + HFI_PROP_SIGNAL_COLOR_INFO, +}; + +u32 msm_vdec_subscribe_for_psc_vp9[] = { + HFI_PROP_BITSTREAM_RESOLUTION, + HFI_PROP_CROP_OFFSETS, + HFI_PROP_LUMA_CHROMA_BIT_DEPTH, + HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT, + HFI_PROP_PROFILE, + HFI_PROP_LEVEL, }; u32 msm_vdec_subscribe_for_properties[] = { @@ -1006,6 +1024,8 @@ static int msm_vdec_subscribe_input_port_settings_change(struct msm_vidc_inst *i struct msm_vidc_core *core; u32 payload[32] = {0}; u32 i; + u32 subscribe_psc_size = 0; + u32 *psc = NULL; if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); @@ -1015,21 +1035,39 @@ static int msm_vdec_subscribe_input_port_settings_change(struct msm_vidc_inst *i d_vpr_h("%s()\n", __func__); payload[0] = HFI_MODE_PORT_SETTINGS_CHANGE; - for (i = 0; i < ARRAY_SIZE(msm_vdec_subscribe_for_port_settings_change); - i++) - payload[i + 1] = msm_vdec_subscribe_for_port_settings_change[i]; + if (inst->codec == MSM_VIDC_H264) { + subscribe_psc_size = ARRAY_SIZE(msm_vdec_subscribe_for_psc_avc); + psc = msm_vdec_subscribe_for_psc_avc; + } else if (inst->codec == MSM_VIDC_HEVC) { + subscribe_psc_size = ARRAY_SIZE(msm_vdec_subscribe_for_psc_hevc); + psc = msm_vdec_subscribe_for_psc_hevc; + } else if (inst->codec == MSM_VIDC_VP9) { + subscribe_psc_size = ARRAY_SIZE(msm_vdec_subscribe_for_psc_vp9); + psc = msm_vdec_subscribe_for_psc_vp9; + } else { + d_vpr_e("%s: unsupported codec: %d\n", __func__, inst->codec); + psc = NULL; + return -EINVAL; + } + if (!psc || !subscribe_psc_size) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + payload[0] = HFI_MODE_PORT_SETTINGS_CHANGE; + for (i = 0; i < subscribe_psc_size; i++) + payload[i + 1] = psc[i]; rc = venus_hfi_session_command(inst, HFI_CMD_SUBSCRIBE_MODE, port, HFI_PAYLOAD_U32_ARRAY, &payload[0], - (ARRAY_SIZE(msm_vdec_subscribe_for_port_settings_change) + 1) * - sizeof(u32)); + ((subscribe_psc_size + 1) * + sizeof(u32))); - for (i = 0; i < ARRAY_SIZE(msm_vdec_subscribe_for_port_settings_change); - i++) { - switch (msm_vdec_subscribe_for_port_settings_change[i]) { + for (i = 0; i < subscribe_psc_size; i++) { + switch (psc[i]) { case HFI_PROP_BITSTREAM_RESOLUTION: rc = msm_vdec_set_bitstream_resolution(inst, port); break; @@ -1062,7 +1100,7 @@ static int msm_vdec_subscribe_input_port_settings_change(struct msm_vidc_inst *i break; default: d_vpr_e("%s: unknown property %#x\n", __func__, - msm_vdec_subscribe_for_port_settings_change[i]); + psc[i]); rc = -EINVAL; break; } @@ -1482,30 +1520,51 @@ static int msm_vdec_subscribe_output_port_settings_change(struct msm_vidc_inst * u32 prop_type, payload_size, payload_type; u32 i; struct msm_vidc_subscription_params subsc_params; + u32 subscribe_psc_size = 0; + u32 *psc = NULL; d_vpr_h("%s()\n", __func__); payload[0] = HFI_MODE_PORT_SETTINGS_CHANGE; - for (i = 0; i < ARRAY_SIZE(msm_vdec_subscribe_for_port_settings_change); - i++) - payload[i + 1] = msm_vdec_subscribe_for_port_settings_change[i]; + if (inst->codec == MSM_VIDC_H264) { + subscribe_psc_size = ARRAY_SIZE(msm_vdec_subscribe_for_psc_avc); + psc = msm_vdec_subscribe_for_psc_avc; + } else if (inst->codec == MSM_VIDC_HEVC) { + subscribe_psc_size = ARRAY_SIZE(msm_vdec_subscribe_for_psc_hevc); + psc = msm_vdec_subscribe_for_psc_hevc; + } else if (inst->codec == MSM_VIDC_VP9) { + subscribe_psc_size = ARRAY_SIZE(msm_vdec_subscribe_for_psc_vp9); + psc = msm_vdec_subscribe_for_psc_vp9; + } else { + d_vpr_e("%s: unsupported codec: %d\n", __func__, inst->codec); + psc = NULL; + return -EINVAL; + } + + if (!psc || !subscribe_psc_size) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + payload[0] = HFI_MODE_PORT_SETTINGS_CHANGE; + for (i = 0; i < subscribe_psc_size; i++) + payload[i + 1] = psc[i]; rc = venus_hfi_session_command(inst, HFI_CMD_SUBSCRIBE_MODE, port, HFI_PAYLOAD_U32_ARRAY, &payload[0], - (ARRAY_SIZE(msm_vdec_subscribe_for_port_settings_change) + 1) * - sizeof(u32)); + ((subscribe_psc_size + 1) * + sizeof(u32))); subsc_params = inst->subcr_params[port]; - for (i = 0; i < ARRAY_SIZE(msm_vdec_subscribe_for_port_settings_change); - i++) { + for (i = 0; i < subscribe_psc_size; i++) { payload[0] = 0; payload[1] = 0; payload_size = 0; payload_type = 0; - prop_type = msm_vdec_subscribe_for_port_settings_change[i]; + prop_type = psc[i]; switch (prop_type) { case HFI_PROP_BITSTREAM_RESOLUTION: payload[0] = subsc_params.bitstream_resolution; From f1e6bbf2ed3f5a23874a310dfef75d8f56c211b1 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Fri, 19 Feb 2021 21:16:54 +0530 Subject: [PATCH 0130/1061] video: driver: fix error handling sequence in msm_vidc_open Currently msm_vidc_close is called directly for any failure in msm_vidc_open(at any level). So i.e leading to free without alloc & deinit without init problems. Example: if msm_vdec_inst_init is failed, msm_vidc_event_queue_deinit will be called as part of msm_vidc_close and leading to crash at v4l2_fh_del. v4l2_fh_del should be called only if v4l2_fh_add is successful. Change-Id: I5dd063c19327b881f533aa141f77b23ee7fad125 Signed-off-by: Govindaraj Rajagopal --- driver/vidc/inc/msm_vidc_inst.h | 1 + driver/vidc/src/msm_vidc_control.c | 19 ++++++++++++----- driver/vidc/src/msm_vidc_driver.c | 34 ++++++++++++++++++++++-------- 3 files changed, 40 insertions(+), 14 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_inst.h b/driver/vidc/inc/msm_vidc_inst.h index 328ad3fb8d..5e4a7a5fa4 100644 --- a/driver/vidc/inc/msm_vidc_inst.h +++ b/driver/vidc/inc/msm_vidc_inst.h @@ -138,6 +138,7 @@ struct msm_vidc_inst { struct completion completions[MAX_SIGNAL]; bool active; u64 last_qbuf_time_ns; + bool vb2q_init; }; #endif // _MSM_VIDC_INST_H_ diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 8e70e81258..f48c9a990c 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -502,7 +502,9 @@ int msm_vidc_ctrl_deinit(struct msm_vidc_inst *inst) } i_vpr_h(inst, "%s(): num ctrls %d\n", __func__, inst->num_ctrls); v4l2_ctrl_handler_free(&inst->ctrl_handler); + memset(&inst->ctrl_handler, 0, sizeof(struct v4l2_ctrl_handler)); kfree(inst->ctrls); + inst->ctrls = NULL; return 0; } @@ -548,7 +550,7 @@ int msm_vidc_ctrl_init(struct msm_vidc_inst *inst) if (rc) { i_vpr_e(inst, "control handler init failed, %d\n", inst->ctrl_handler.error); - return rc; + goto error; } for (idx = 0; idx < INST_CAP_MAX; idx++) { @@ -562,7 +564,8 @@ int msm_vidc_ctrl_init(struct msm_vidc_inst *inst) "%s: invalid ctrl %#x, max allowed %d\n", __func__, capability->cap[idx].v4l2_id, num_ctrls); - return -EINVAL; + rc = -EINVAL; + goto error; } i_vpr_h(inst, "%s: cap idx %d, value %d min %d max %d step_or_mask %#x flags %#x v4l2_id %#x hfi_id %#x\n", @@ -603,7 +606,8 @@ int msm_vidc_ctrl_init(struct msm_vidc_inst *inst) if (!ctrl_cfg.name) { i_vpr_e(inst, "%s: %#x ctrl name is null\n", __func__, ctrl_cfg.id); - return -EINVAL; + rc = -EINVAL; + goto error; } ctrl = v4l2_ctrl_new_custom(&inst->ctrl_handler, &ctrl_cfg, NULL); @@ -629,7 +633,8 @@ int msm_vidc_ctrl_init(struct msm_vidc_inst *inst) if (!ctrl) { i_vpr_e(inst, "%s: invalid ctrl %#x\n", __func__, capability->cap[idx].v4l2_id); - return -EINVAL; + rc = -EINVAL; + goto error; } rc = inst->ctrl_handler.error; @@ -638,7 +643,7 @@ int msm_vidc_ctrl_init(struct msm_vidc_inst *inst) "error adding ctrl (%#x) to ctrl handle, %d\n", capability->cap[idx].v4l2_id, inst->ctrl_handler.error); - return rc; + goto error; } /* @@ -652,6 +657,10 @@ int msm_vidc_ctrl_init(struct msm_vidc_inst *inst) inst->num_ctrls = num_ctrls; i_vpr_h(inst, "%s(): num ctrls %d\n", __func__, inst->num_ctrls); + return 0; +error: + msm_vidc_ctrl_deinit(inst); + return rc; } diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 97837f75b4..6ae9454492 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -1977,26 +1977,40 @@ int msm_vidc_vb2_queue_init(struct msm_vidc_inst *inst) int rc = 0; if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); + i_vpr_e(inst, "%s: invalid params\n", __func__); return -EINVAL; } + if (inst->vb2q_init) { + i_vpr_h(inst, "%s: vb2q already inited\n", __func__); + return 0; + } + rc = vb2q_init(inst, &inst->vb2q[INPUT_PORT], INPUT_MPLANE); if (rc) - return rc; + goto exit; rc = vb2q_init(inst, &inst->vb2q[OUTPUT_PORT], OUTPUT_MPLANE); if (rc) - return rc; + goto fail_out_vb2q_init; rc = vb2q_init(inst, &inst->vb2q[INPUT_META_PORT], INPUT_META_PLANE); if (rc) - return rc; + goto fail_in_meta_vb2q_init; rc = vb2q_init(inst, &inst->vb2q[OUTPUT_META_PORT], OUTPUT_META_PLANE); if (rc) - return rc; + goto fail_out_meta_vb2q_init; + inst->vb2q_init = true; + return 0; +fail_out_meta_vb2q_init: + vb2_queue_release(&inst->vb2q[INPUT_META_PORT]); +fail_in_meta_vb2q_init: + vb2_queue_release(&inst->vb2q[OUTPUT_PORT]); +fail_out_vb2q_init: + vb2_queue_release(&inst->vb2q[INPUT_PORT]); +exit: return rc; } @@ -2008,10 +2022,16 @@ int msm_vidc_vb2_queue_deinit(struct msm_vidc_inst *inst) d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } + if (!inst->vb2q_init) { + i_vpr_h(inst, "%s: vb2q already deinited\n", __func__); + return 0; + } + vb2_queue_release(&inst->vb2q[OUTPUT_META_PORT]); vb2_queue_release(&inst->vb2q[INPUT_META_PORT]); vb2_queue_release(&inst->vb2q[OUTPUT_PORT]); vb2_queue_release(&inst->vb2q[INPUT_PORT]); + inst->vb2q_init = false; return rc; } @@ -2293,10 +2313,6 @@ int msm_vidc_get_inst_capability(struct msm_vidc_inst *inst) sizeof(struct msm_vidc_inst_capability)); } } - if (!inst->capabilities) { - i_vpr_e(inst, "%s: capabilities not found\n", __func__); - return -EINVAL; - } return rc; } From 52e7bb22138f8ef4a39371bb14ea581d36e839b2 Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Fri, 19 Feb 2021 11:46:38 -0800 Subject: [PATCH 0131/1061] video: driver: set default_header property at session level set default header property once per session for decoder. Change-Id: I5ca9088b8bed09907f2c9f829acec3db23e65a7c Signed-off-by: Darshana Patil --- driver/vidc/inc/msm_vidc_driver.h | 1 + driver/vidc/src/msm_vdec.c | 29 ----------------------------- driver/vidc/src/msm_vidc_driver.c | 25 +++++++++++++++++++++++++ driver/vidc/src/msm_vidc_vb2.c | 4 ++++ 4 files changed, 30 insertions(+), 29 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 454b5de027..2d482d1fbe 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -218,6 +218,7 @@ int msm_vidc_remove_session(struct msm_vidc_inst *inst); int msm_vidc_add_session(struct msm_vidc_inst *inst); int msm_vidc_session_open(struct msm_vidc_inst *inst); int msm_vidc_session_set_codec(struct msm_vidc_inst *inst); +int msm_vidc_session_set_default_header(struct msm_vidc_inst *inst); int msm_vidc_session_streamon(struct msm_vidc_inst *inst, enum msm_vidc_port_type port); int msm_vidc_session_streamoff(struct msm_vidc_inst *inst, diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index de36f8b734..5b534ed942 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -579,31 +579,6 @@ static int msm_vdec_set_secure_mode(struct msm_vidc_inst *inst, return rc; } -static int msm_vdec_set_default_header(struct msm_vidc_inst *inst, - enum msm_vidc_port_type port) -{ - int rc = 0; - u32 default_header = false; - - if (port != INPUT_PORT) { - i_vpr_e(inst, "%s: invalid port %d\n", __func__, port); - return -EINVAL; - } - - default_header = inst->capabilities->cap[DEFAULT_HEADER].value; - i_vpr_h(inst, "%s: default header: %d", __func__, default_header); - rc = venus_hfi_session_property(inst, - HFI_PROP_DEC_DEFAULT_HEADER, - HFI_HOST_FLAGS_NONE, - get_hfi_port(inst, port), - HFI_PAYLOAD_U32, - &default_header, - sizeof(u32)); - if (rc) - i_vpr_e(inst, "%s: set property failed\n", __func__); - return rc; -} - static int msm_vdec_set_rap_frame(struct msm_vidc_inst *inst, enum msm_vidc_port_type port) { @@ -755,10 +730,6 @@ static int msm_vdec_set_input_properties(struct msm_vidc_inst *inst) if (rc) return rc; - rc = msm_vdec_set_default_header(inst, INPUT_PORT); - if (rc) - return rc; - rc = msm_vdec_set_rap_frame(inst, INPUT_PORT); if (rc) return rc; diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 97837f75b4..d003f684af 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -20,6 +20,7 @@ #include "msm_venc.h" #include "venus_hfi.h" #include "venus_hfi_response.h" +#include "hfi_packet.h" #define COUNT_BITS(a, out) { \ while ((a) >= 1) { \ @@ -2122,6 +2123,30 @@ int msm_vidc_session_set_codec(struct msm_vidc_inst *inst) return 0; } +int msm_vidc_session_set_default_header(struct msm_vidc_inst *inst) +{ + int rc = 0; + u32 default_header = false; + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + default_header = inst->capabilities->cap[DEFAULT_HEADER].value; + i_vpr_h(inst, "%s: default header: %d", __func__, default_header); + rc = venus_hfi_session_property(inst, + HFI_PROP_DEC_DEFAULT_HEADER, + HFI_HOST_FLAGS_NONE, + get_hfi_port(inst, INPUT_PORT), + HFI_PAYLOAD_U32, + &default_header, + sizeof(u32)); + if (rc) + i_vpr_e(inst, "%s: set property failed\n", __func__); + return rc; +} + int msm_vidc_session_streamon(struct msm_vidc_inst *inst, enum msm_vidc_port_type port) { diff --git a/driver/vidc/src/msm_vidc_vb2.c b/driver/vidc/src/msm_vidc_vb2.c index 6587161981..e1d26cea44 100644 --- a/driver/vidc/src/msm_vidc_vb2.c +++ b/driver/vidc/src/msm_vidc_vb2.c @@ -181,6 +181,10 @@ int msm_vidc_start_streaming(struct vb2_queue *q, unsigned int count) inst->buffers.arp.min_count, inst->buffers.arp.size); } else if(is_decode_session(inst)) { + rc = msm_vidc_session_set_default_header(inst); + if (rc) + return rc; + rc = msm_vidc_alloc_and_queue_session_internal_buffers(inst, MSM_VIDC_BUF_PERSIST); if (rc) From d8e9c5d4dbe758bbfc78af35def8bb619cf96d9b Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Fri, 19 Feb 2021 15:00:42 -0800 Subject: [PATCH 0132/1061] video: driver: Avoid setting HFI_PROP_LAYER_ENCODING_TYPE Avoid setting HFI_PROP_LAYER_ENCODING_TYPE to firmware Change-Id: I056baa670a3b6ceee150b1032e5691623c6ddab9 Signed-off-by: Akshata Sahukar --- driver/platform/waipio/src/msm_vidc_waipio.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 8cc5f1cfb8..07b83b3629 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -641,6 +641,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { HFI_PROP_QP_PACKED, CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + // TODO: Enable while reveiwing support for layer encoding {HIER_CODING_TYPE, ENC, HEVC, V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B, V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P, @@ -651,7 +652,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { HFI_PROP_LAYER_ENCODING_TYPE, CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {0}, - NULL, msm_vidc_set_u32_enum}, + NULL, NULL}, /* TODO(AS) - ctrl init failing. Need to fix {HIER_CODING_TYPE, ENC, H264, From 02346b9728a06a0e537e1395efaa7f582a245e31 Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Fri, 19 Feb 2021 17:02:45 -0800 Subject: [PATCH 0133/1061] video: driver: modify internal buffer counts for vp9 modify internal buffer counts for vp9. fix comv and noncomv buffer count to 0 for vp9 as they are not supported for this codec. Change-Id: I5d504128ab587c425d4cd4cfd2059241e8d256aa Signed-off-by: Darshana Patil --- .../variant/iris2/src/msm_vidc_buffer_iris2.c | 2 +- driver/vidc/inc/msm_vidc_buffer.h | 2 ++ driver/vidc/src/msm_vidc_buffer.c | 33 +++++++++++++++++++ 3 files changed, 36 insertions(+), 1 deletion(-) diff --git a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c index 8cb1532577..b76ae4b06c 100644 --- a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c @@ -600,7 +600,7 @@ int msm_buffer_min_count_iris2(struct msm_vidc_inst *inst, case MSM_VIDC_BUF_NON_COMV: case MSM_VIDC_BUF_LINE: case MSM_VIDC_BUF_PERSIST: - count = 1; + count = msm_vidc_internal_buffer_count(inst, buffer_type); break; case MSM_VIDC_BUF_DPB: count = msm_buffer_decoder_dpb_count(inst); diff --git a/driver/vidc/inc/msm_vidc_buffer.h b/driver/vidc/inc/msm_vidc_buffer.h index 9c26ba0d8f..1b6f48ee5d 100644 --- a/driver/vidc/inc/msm_vidc_buffer.h +++ b/driver/vidc/inc/msm_vidc_buffer.h @@ -21,6 +21,8 @@ u32 msm_vidc_input_min_count(struct msm_vidc_inst *inst); u32 msm_vidc_output_min_count(struct msm_vidc_inst *inst); u32 msm_vidc_input_extra_count(struct msm_vidc_inst *inst); u32 msm_vidc_output_extra_count(struct msm_vidc_inst *inst); +u32 msm_vidc_internal_buffer_count(struct msm_vidc_inst *inst, + enum msm_vidc_buffer_type buffer_type); u32 msm_vidc_decoder_input_size(struct msm_vidc_inst *inst); u32 msm_vidc_decoder_output_size(struct msm_vidc_inst *inst); u32 msm_vidc_decoder_input_meta_size(struct msm_vidc_inst *inst); diff --git a/driver/vidc/src/msm_vidc_buffer.c b/driver/vidc/src/msm_vidc_buffer.c index 7a52b54450..4f24367606 100644 --- a/driver/vidc/src/msm_vidc_buffer.c +++ b/driver/vidc/src/msm_vidc_buffer.c @@ -163,6 +163,39 @@ u32 msm_vidc_output_extra_count(struct msm_vidc_inst *inst) return count; } +u32 msm_vidc_internal_buffer_count(struct msm_vidc_inst *inst, + enum msm_vidc_buffer_type buffer_type) +{ + u32 count = 0; + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return 0; + } + + if (is_decode_session(inst)) { + if (buffer_type == MSM_VIDC_BUF_BIN || + buffer_type == MSM_VIDC_BUF_LINE || + buffer_type == MSM_VIDC_BUF_PERSIST) { + count = 1; + } else if (buffer_type == MSM_VIDC_BUF_COMV || + buffer_type == MSM_VIDC_BUF_NON_COMV) { + if (inst->codec == MSM_VIDC_HEVC || + inst->codec == MSM_VIDC_H264) + count = 1; + else + count = 0; + } else { + d_vpr_e("%s: unsupported buffer type %#x\n", + __func__, buffer_type); + count = 0; + } + } + //todo: add enc support if needed + + return count; +} + u32 msm_vidc_decoder_input_size(struct msm_vidc_inst *inst) { u32 frame_size, num_mbs; From 6070bc252371e018e49812f7898b076477d0956f Mon Sep 17 00:00:00 2001 From: Chinmay Sawarkar Date: Thu, 18 Feb 2021 12:09:40 -0800 Subject: [PATCH 0134/1061] video: driver: enable interframe power collapse Hand off regulators to hw to enable interframe power collapse. Change-Id: I11d3d96f0a6cce23ef374e2065532a13af38d2f4 Signed-off-by: Chinmay Sawarkar --- driver/vidc/inc/hfi_packet.h | 2 ++ driver/vidc/inc/msm_vidc_core.h | 1 + driver/vidc/src/hfi_packet.c | 53 ++++++++++++++++++++++++--------- driver/vidc/src/msm_vidc.c | 2 +- driver/vidc/src/venus_hfi.c | 44 ++++++++++++++------------- 5 files changed, 66 insertions(+), 36 deletions(-) diff --git a/driver/vidc/inc/hfi_packet.h b/driver/vidc/inc/hfi_packet.h index e1c9cbee10..43eda70d80 100644 --- a/driver/vidc/inc/hfi_packet.h +++ b/driver/vidc/inc/hfi_packet.h @@ -42,4 +42,6 @@ int hfi_packet_sys_debug_config(struct msm_vidc_core *core, int hfi_packet_session_command(struct msm_vidc_inst *inst, u32 pkt_type, u32 flags, u32 port, u32 session_id, u32 payload_type, void *payload, u32 payload_size); +int hfi_packet_sys_intraframe_powercollapse(struct msm_vidc_core* core, + u8* pkt, u32 pkt_size, u32 enable); #endif // _HFI_PACKET_H_ diff --git a/driver/vidc/inc/msm_vidc_core.h b/driver/vidc/inc/msm_vidc_core.h index f8bd3a960a..f8a1f52da8 100644 --- a/driver/vidc/inc/msm_vidc_core.h +++ b/driver/vidc/inc/msm_vidc_core.h @@ -109,6 +109,7 @@ struct msm_vidc_core { u32 header_id; u32 packet_id; struct completion init_done; + u32 handoff_done; }; #endif // _MSM_VIDC_CORE_H_ diff --git a/driver/vidc/src/hfi_packet.c b/driver/vidc/src/hfi_packet.c index 3d774ccb3d..63d48febdb 100644 --- a/driver/vidc/src/hfi_packet.c +++ b/driver/vidc/src/hfi_packet.c @@ -354,20 +354,6 @@ int hfi_packet_sys_init(struct msm_vidc_core *core, if (rc) goto err_sys_init; - /* HFI_PROP_INTRA_FRAME_POWER_COLLAPSE */ - payload = 0; - d_vpr_h("%s: intra frame power collapse %d\n", __func__, payload); - rc = hfi_create_packet(pkt, pkt_size, - HFI_PROP_INTRA_FRAME_POWER_COLLAPSE, - HFI_HOST_FLAGS_NONE, - HFI_PAYLOAD_U32, - HFI_PORT_NONE, - core->packet_id++, - &payload, - sizeof(u32)); - if (rc) - goto err_sys_init; - /* HFI_PROP_UBWC_MAX_CHANNELS */ payload = core->platform->data.ubwc_config->max_channels; d_vpr_h("%s: ubwc max channels %d\n", __func__, payload); @@ -635,3 +621,42 @@ err_cmd: d_vpr_e("%s: create packet failed\n", __func__); return rc; } + +int hfi_packet_sys_intraframe_powercollapse(struct msm_vidc_core* core, + u8* pkt, u32 pkt_size, u32 enable) +{ + int rc = 0; + u32 payload = 0; + + if (!core || !pkt) { + d_vpr_e("%s: Invalid params\n", __func__); + return -EINVAL; + } + + rc = hfi_create_header(pkt, pkt_size, + 0 /*session_id*/, + core->header_id++); + if (rc) + goto err; + + /* HFI_PROP_INTRA_FRAME_POWER_COLLAPSE */ + payload = enable; + d_vpr_h("%s: intra frame power collapse %d\n", __func__, payload); + rc = hfi_create_packet(pkt, pkt_size, + HFI_PROP_INTRA_FRAME_POWER_COLLAPSE, + HFI_HOST_FLAGS_NONE, + HFI_PAYLOAD_U32, + HFI_PORT_NONE, + core->packet_id++, + &payload, + sizeof(u32)); + if (rc) + goto err; + + d_vpr_h("IFPC packet created\n"); + return rc; + +err: + d_vpr_e("%s: create packet failed\n", __func__); + return rc; +} diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index 78e5da2546..a25b7a2baa 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -713,7 +713,7 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) kref_init(&inst->kref); mutex_init(&inst->lock); - i_vpr_e(inst, "Opening video instance: %d\n", session_type); + i_vpr_h(inst, "Opening video instance: %d\n", session_type); inst->response_workq = create_singlethread_workqueue("response_workq"); if (!inst->response_workq) { diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index f9a3b5e808..b1eb5fb14b 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -386,10 +386,12 @@ static int __hand_off_regulator(struct msm_vidc_core *core, rc = regulator_set_mode(rinfo->regulator, REGULATOR_MODE_FAST); if (rc) { + core->handoff_done = 0; d_vpr_e("Failed to hand off regulator control: %s\n", rinfo->name); return rc; } else { + core->handoff_done = 1; d_vpr_h("Hand off regulator control to HW: %s\n", rinfo->name); } @@ -1049,28 +1051,24 @@ static int __sys_set_coverage(struct msm_vidc_core *core, return 0; } - +*/ static int __sys_set_power_control(struct msm_vidc_core *core, bool enable) { - struct regulator_info *rinfo; - bool supported = false; + int rc = 0; - venus_hfi_for_each_regulator(core, rinfo) { - if (rinfo->has_hw_power_collapse) { - supported = true; - break; - } - } + if (!core->handoff_done) + return rc; - if (!supported) - return 0; + rc = hfi_packet_sys_intraframe_powercollapse(core, core->packet, core->packet_size, enable); + if (rc) + return rc; - //call_hfi_pkt_op(core, sys_power_control, pkt, enable); - //if (__iface_cmdq_write(core, pkt, sid)) - // return -ENOTEMPTY; - return 0; + rc = __iface_cmdq_write(core, core->packet); + if (rc) + return rc; + + return rc; } -*/ int __prepare_pc(struct msm_vidc_core *core) { @@ -1698,14 +1696,11 @@ static int __enable_hw_power_collapse(struct msm_vidc_core *core) { int rc = 0; - // TODO: skip if hardwar power control feature is not present - d_vpr_e("%s: skip hand off regulators\n", __func__); - return 0; - rc = __hand_off_regulators(core); if (rc) d_vpr_e("%s: Failed to enable HW power collapse %d\n", - __func__, rc); + __func__, rc); + return rc; } @@ -2122,6 +2117,7 @@ static int __resume(struct msm_vidc_core *core) } __sys_set_debug(core, (msm_vidc_debug & FW_LOGMASK) >> FW_LOGSHIFT); + rc = __enable_subcaches(core); if (rc) { d_vpr_e("Failed to activate subcache\n"); @@ -2129,6 +2125,9 @@ static int __resume(struct msm_vidc_core *core) } __set_subcaches(core); + if (core->handoff_done) + __sys_set_power_control(core, true); + d_vpr_h("Resumed from power collapse\n"); exit: /* Don't reset skip_pc_count for SYS_PC_PREP cmd */ @@ -2679,6 +2678,9 @@ int venus_hfi_core_init(struct msm_vidc_core *core) if (rc) goto error; + if (core->handoff_done) + __sys_set_power_control(core, true); + d_vpr_h("%s(): successful\n", __func__); return 0; From f02bbaf836debf23241eb543fff52fb3b23e434e Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Tue, 16 Feb 2021 21:11:21 +0530 Subject: [PATCH 0135/1061] video: driver: enable encoder superframe batching support Added HFR/HSR superframe handling support for encoder. Change-Id: I28ced3f223cd78d00b1a654a79bcac3b02f378dc Signed-off-by: Govindaraj Rajagopal --- driver/platform/waipio/src/msm_vidc_waipio.c | 5 + driver/vidc/inc/msm_vidc_driver.h | 1 + driver/vidc/inc/msm_vidc_internal.h | 4 +- driver/vidc/inc/venus_hfi.h | 2 + driver/vidc/src/msm_venc.c | 2 +- driver/vidc/src/msm_vidc_control.c | 2 + driver/vidc/src/msm_vidc_driver.c | 19 ++- driver/vidc/src/venus_hfi.c | 139 ++++++++++++++++++ driver/vidc/src/venus_hfi_response.c | 33 +++++ .../uapi/vidc/media/v4l2_vidc_extensions.h | 3 + 10 files changed, 207 insertions(+), 3 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 07b83b3629..42b9bcc112 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -239,6 +239,11 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { HFI_PROP_ROTATION, CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + {SUPER_FRAME, ENC, CODECS_ALL, + 0, 16, 1, 0, + V4L2_CID_MPEG_VIDC_SUPERFRAME, + 0}, + {SLICE_INTERFACE, DEC, CODECS_ALL, 0, 0, 0, 0, V4L2_CID_MPEG_VIDEO_DECODER_SLICE_INTERFACE, diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 2d482d1fbe..971991594f 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -302,5 +302,6 @@ void inst_unlock(struct msm_vidc_inst *inst, const char *function); bool inst_lock_check(struct msm_vidc_inst *inst, const char *function); int msm_vidc_update_meta_port_settings(struct msm_vidc_inst *inst); void msm_vidc_schedule_core_deinit(struct msm_vidc_core *core); +bool msm_vidc_is_super_buffer(struct msm_vidc_inst *inst); #endif // _MSM_VIDC_DRIVER_H_ diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 234e8ed392..14948dcbb0 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -43,7 +43,8 @@ #define MAX_CAP_CHILDREN 16 #define DEFAULT_BITSTREM_ALIGNMENT 16 #define H265_BITSTREM_ALIGNMENT 32 -#define DEFAULT_MAX_HOST_BUF_COUNT 32 +#define DEFAULT_MAX_HOST_ENC_BUF_COUNT 64 +#define DEFAULT_MAX_HOST_DEC_BUF_COUNT 64 #define BIT_DEPTH_8 (8 << 16 | 8) #define BIT_DEPTH_10 (10 << 16 | 10) #define CODED_FRAMES_MBS_ONLY HFI_BITMASK_FRAME_MBS_ONLY_FLAG @@ -266,6 +267,7 @@ enum msm_vidc_inst_capability_type { HFLIP, VFLIP, ROTATION, + SUPER_FRAME, SLICE_INTERFACE, HEADER_MODE, PREPEND_SPSPPS_TO_IDR, diff --git a/driver/vidc/inc/venus_hfi.h b/driver/vidc/inc/venus_hfi.h index 21624faacf..f890df7892 100644 --- a/driver/vidc/inc/venus_hfi.h +++ b/driver/vidc/inc/venus_hfi.h @@ -35,6 +35,8 @@ int venus_hfi_session_command(struct msm_vidc_inst *inst, void *payload, u32 payload_size); int venus_hfi_queue_buffer(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buffer, struct msm_vidc_buffer *metabuf); +int venus_hfi_queue_super_buffer(struct msm_vidc_inst *inst, + struct msm_vidc_buffer *buffer, struct msm_vidc_buffer *metabuf); int venus_hfi_release_buffer(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buffer); int venus_hfi_start(struct msm_vidc_inst *inst, enum msm_vidc_port_type port); diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index 6edf76f92b..ecd447dc85 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -244,7 +244,7 @@ static int msm_venc_set_host_max_buf_count(struct msm_vidc_inst *inst, enum msm_vidc_port_type port) { int rc = 0; - u32 count = DEFAULT_MAX_HOST_BUF_COUNT; + u32 count = DEFAULT_MAX_HOST_ENC_BUF_COUNT; if (port != INPUT_PORT && port != OUTPUT_PORT) { i_vpr_e(inst, "%s: invalid port %d\n", __func__, port); diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index f48c9a990c..28c2782bde 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -204,6 +204,8 @@ static const char *msm_vidc_get_priv_ctrl_name(struct msm_vidc_inst *inst, u32 c return "HEVC I Frame Max QP"; case V4L2_CID_MPEG_VIDC_HEVC_P_FRAME_MAX_QP: return "HEVC P Frame Max QP"; + case V4L2_CID_MPEG_VIDC_SUPERFRAME: + return "Encoder Batching Superframe"; default: i_vpr_e(inst, "%s: ctrl name not available for ctrl id %#x\n", __func__, control_id); diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 87d54e616a..967b0b6aca 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -1438,6 +1438,20 @@ struct msm_vidc_buffer *get_meta_buffer(struct msm_vidc_inst *inst, return mbuf; } +bool msm_vidc_is_super_buffer(struct msm_vidc_inst *inst) +{ + struct msm_vidc_inst_capability *capability = NULL; + + if (!inst || !inst->capabilities) { + i_vpr_e(inst, "%s: Invalid params\n", __func__); + return false; + } + + capability = inst->capabilities; + + return !!capability->cap[SUPER_FRAME].value; +} + int msm_vidc_queue_buffer(struct msm_vidc_inst *inst, struct vb2_buffer *vb2) { int rc = 0; @@ -1492,7 +1506,10 @@ int msm_vidc_queue_buffer(struct msm_vidc_inst *inst, struct vb2_buffer *vb2) return -EINVAL; } } - rc = venus_hfi_queue_buffer(inst, buf, meta); + if (msm_vidc_is_super_buffer(inst) && is_input_buffer(buf->type)) + rc = venus_hfi_queue_super_buffer(inst, buf, meta); + else + rc = venus_hfi_queue_buffer(inst, buf, meta); if (rc) return rc; diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index b1eb5fb14b..ed0c1ff9b7 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -33,6 +33,14 @@ #define MAX_FIRMWARE_NAME_SIZE 128 +#define update_offset(offset, val) ((offset) += (val)) +#define update_timestamp(ts, val) \ + do { \ + do_div((ts), NSEC_PER_USEC); \ + (ts) += (val); \ + (ts) *= NSEC_PER_USEC; \ + } while (0) + extern struct msm_vidc_core *g_core; static int __resume(struct msm_vidc_core *core); @@ -879,6 +887,18 @@ int __iface_cmdq_write(struct msm_vidc_core *core, return rc; } +static int __iface_cmdq_write_intr(struct msm_vidc_core *core, + void *pkt, bool allow) +{ + bool needs_interrupt = false; + int rc = __iface_cmdq_write_relaxed(core, pkt, &needs_interrupt); + + if (!rc && allow && needs_interrupt) + call_venus_op(core, raise_interrupt, core); + + return rc; +} + int __iface_msgq_read(struct msm_vidc_core *core, void *pkt) { u32 tx_req_is_set = 0; @@ -3024,6 +3044,125 @@ unlock: return rc; } +int venus_hfi_queue_super_buffer(struct msm_vidc_inst *inst, + struct msm_vidc_buffer *buffer, struct msm_vidc_buffer *metabuf) +{ + int rc = 0; + struct msm_vidc_core *core; + struct hfi_buffer hfi_buffer; + struct hfi_buffer hfi_meta_buffer; + struct msm_vidc_inst_capability *capability; + u32 frame_size, meta_size, batch_size, cnt = 0; + u64 ts_delta_us; + + if (!inst || !inst->core || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + core = inst->core; + capability = inst->capabilities; + core_lock(core, __func__); + + if (!__valdiate_session(core, inst, __func__)) { + rc = -EINVAL; + goto unlock; + } + + /* Get super yuv buffer */ + rc = get_hfi_buffer(inst, buffer, &hfi_buffer); + if (rc) + goto unlock; + + /* Get super meta buffer */ + if (metabuf) { + rc = get_hfi_buffer(inst, metabuf, &hfi_meta_buffer); + if (rc) + goto unlock; + } + + batch_size = capability->cap[SUPER_FRAME].value; + frame_size = call_session_op(core, buffer_size, inst, MSM_VIDC_BUF_INPUT); + meta_size = call_session_op(core, buffer_size, inst, MSM_VIDC_BUF_INPUT_META); + ts_delta_us = 1000000 / (capability->cap[FRAME_RATE].value >> 16); + + /* Sanitize super yuv buffer */ + if (frame_size * batch_size != buffer->buffer_size) { + i_vpr_e(inst, "%s: invalid super yuv buffer. frame %u, batch %u, buffer size %u\n", + __func__, frame_size, batch_size, buffer->buffer_size); + goto unlock; + } + + /* Sanitize super meta buffer */ + if (metabuf && meta_size * batch_size != metabuf->buffer_size) { + i_vpr_e(inst, "%s: invalid super meta buffer. meta %u, batch %u, buffer size %u\n", + __func__, meta_size, batch_size, metabuf->buffer_size); + goto unlock; + } + + /* Initialize yuv buffer */ + hfi_buffer.data_size = frame_size; + hfi_buffer.addr_offset = 0; + + /* Initialize meta buffer */ + if (metabuf) { + hfi_meta_buffer.data_size = meta_size; + hfi_meta_buffer.addr_offset = 0; + } + + while (cnt < batch_size) { + /* Create header */ + rc = hfi_create_header(inst->packet, inst->packet_size, + inst->session_id, core->header_id++); + if (rc) + goto unlock; + + /* Create yuv packet */ + update_offset(hfi_buffer.addr_offset, (cnt ? frame_size : 0u)); + update_timestamp(hfi_buffer.timestamp, (cnt ? ts_delta_us : 0u)); + rc = hfi_create_packet(inst->packet, + inst->packet_size, + HFI_CMD_BUFFER, + HFI_HOST_FLAGS_INTR_REQUIRED, + HFI_PAYLOAD_STRUCTURE, + get_hfi_port_from_buffer_type(inst, buffer->type), + core->packet_id++, + &hfi_buffer, + sizeof(hfi_buffer)); + if (rc) + goto unlock; + + /* Create meta packet */ + if (metabuf) { + update_offset(hfi_meta_buffer.addr_offset, (cnt ? meta_size : 0u)); + update_timestamp(hfi_meta_buffer.timestamp, (cnt ? ts_delta_us : 0u)); + rc = hfi_create_packet(inst->packet, + inst->packet_size, + HFI_CMD_BUFFER, + HFI_HOST_FLAGS_INTR_REQUIRED, + HFI_PAYLOAD_STRUCTURE, + get_hfi_port_from_buffer_type(inst, metabuf->type), + core->packet_id++, + &hfi_meta_buffer, + sizeof(hfi_meta_buffer)); + if (rc) + goto unlock; + } + + /* Raise interrupt only for last pkt in the batch */ + rc = __iface_cmdq_write_intr(inst->core, inst->packet, (cnt == batch_size - 1)); + if (rc) + goto unlock; + + cnt++; + } +unlock: + core_unlock(core, __func__); + if (rc) + i_vpr_e(inst, "%s: queue super buffer failed: %d\n", __func__, rc); + + return rc; +} + int venus_hfi_queue_buffer(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buffer, struct msm_vidc_buffer *metabuf) { diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index ab63612e0d..86f0638813 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -440,8 +440,15 @@ static int handle_input_buffer(struct msm_vidc_inst *inst, int rc = 0; struct msm_vidc_buffers *buffers; struct msm_vidc_buffer *buf; + struct msm_vidc_core *core; + u32 frame_size, batch_size; bool found; + if (!inst || !buffer || !inst->capabilities || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + core = inst->core; buffers = msm_vidc_get_buffers(inst, MSM_VIDC_BUF_INPUT, __func__); if (!buffers) return -EINVAL; @@ -458,6 +465,16 @@ static int handle_input_buffer(struct msm_vidc_inst *inst, __func__, buffer->index, buffer->base_address); return -EINVAL; } + + frame_size = call_session_op(core, buffer_size, inst, MSM_VIDC_BUF_INPUT); + batch_size = inst->capabilities->cap[SUPER_FRAME].value; + /* attach dequeued flag for, only last frame in the batch */ + if (msm_vidc_is_super_buffer(inst) && + buffer->addr_offset / frame_size < batch_size - 1) { + i_vpr_h(inst, "%s: superframe last buffer not reached: %u, %u, %u\n", + __func__, buffer->addr_offset, frame_size, batch_size); + return 0; + } buf->data_offset = buffer->data_offset; buf->data_size = buffer->data_size; buf->attr &= ~MSM_VIDC_ATTR_QUEUED; @@ -549,8 +566,15 @@ static int handle_input_metadata_buffer(struct msm_vidc_inst *inst, int rc = 0; struct msm_vidc_buffers *buffers; struct msm_vidc_buffer *buf; + struct msm_vidc_core *core; + u32 frame_size, batch_size; bool found; + if (!inst || !buffer || !inst->capabilities || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + core = inst->core; buffers = msm_vidc_get_buffers(inst, MSM_VIDC_BUF_INPUT_META, __func__); if (!buffers) return -EINVAL; @@ -567,6 +591,15 @@ static int handle_input_metadata_buffer(struct msm_vidc_inst *inst, __func__, buffer->index, buffer->base_address); return -EINVAL; } + frame_size = call_session_op(core, buffer_size, inst, MSM_VIDC_BUF_INPUT_META); + batch_size = inst->capabilities->cap[SUPER_FRAME].value; + /* attach dequeued flag for, only last frame in the batch */ + if (msm_vidc_is_super_buffer(inst) && + buffer->addr_offset / frame_size < batch_size - 1) { + i_vpr_h(inst, "%s: superframe last buffer not reached: %u, %u, %u\n", + __func__, buffer->addr_offset, frame_size, batch_size); + return 0; + } buf->data_size = buffer->data_size; buf->attr &= ~MSM_VIDC_ATTR_QUEUED; buf->attr |= MSM_VIDC_ATTR_DEQUEUED; diff --git a/include/uapi/vidc/media/v4l2_vidc_extensions.h b/include/uapi/vidc/media/v4l2_vidc_extensions.h index be3c7293e0..4f176b3ee0 100644 --- a/include/uapi/vidc/media/v4l2_vidc_extensions.h +++ b/include/uapi/vidc/media/v4l2_vidc_extensions.h @@ -116,6 +116,9 @@ enum v4l2_mpeg_vidc_blur_types { #define V4L2_CID_MPEG_VIDC_HEVC_P_FRAME_MAX_QP \ (V4L2_CID_MPEG_VIDC_BASE + 0x27) +/* Encoder Super frame control */ +#define V4L2_CID_MPEG_VIDC_SUPERFRAME (V4L2_CID_MPEG_VIDC_BASE + 0x28) + enum v4l2_mpeg_vidc_metapayload_header_flags { METADATA_FLAGS_NONE = 0, METADATA_FLAGS_TOP_FIELD = (1 << 0), From c684975c19701ac4e92a96594c050453260dae94 Mon Sep 17 00:00:00 2001 From: Chinmay Sawarkar Date: Mon, 22 Feb 2021 13:14:15 -0800 Subject: [PATCH 0136/1061] video: driver: Initialize handoff_done If not initialized, power control may wrongly be transferred to firmware, even though regulator handoff is not done. Change-Id: Ic76a679ff5f848bfb50c95dc3306f05ee62bc82f Signed-off-by: Chinmay Sawarkar --- driver/vidc/src/venus_hfi.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index b1eb5fb14b..f2549c2bb8 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -1669,6 +1669,8 @@ static int __disable_regulator(struct regulator_info *rinfo, goto disable_regulator_failed; } + core->handoff_done = 0; + if (!regulator_is_enabled(rinfo->regulator)) d_vpr_e("%s: regulator %s already disabled\n", __func__, rinfo->name); @@ -2125,8 +2127,7 @@ static int __resume(struct msm_vidc_core *core) } __set_subcaches(core); - if (core->handoff_done) - __sys_set_power_control(core, true); + __sys_set_power_control(core, true); d_vpr_h("Resumed from power collapse\n"); exit: @@ -2646,6 +2647,8 @@ int venus_hfi_core_init(struct msm_vidc_core *core) return -ENOMEM; } + core->handoff_done = 0; + rc = __load_fw(core); if (rc) return rc; @@ -2678,8 +2681,7 @@ int venus_hfi_core_init(struct msm_vidc_core *core) if (rc) goto error; - if (core->handoff_done) - __sys_set_power_control(core, true); + __sys_set_power_control(core, true); d_vpr_h("%s(): successful\n", __func__); return 0; From e83bddb6e9774fcc1603c87a5604061a6be87596 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Mon, 22 Feb 2021 15:14:03 -0800 Subject: [PATCH 0137/1061] video: driver: allow interlace metadata for avc dec only Allow interlace metadata for avc decoder Change-Id: I25ad16d5d904068e633b0304a62bc766a7de16bc Signed-off-by: Akshata Sahukar --- driver/platform/waipio/src/msm_vidc_waipio.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 42b9bcc112..bb025f5613 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -1077,7 +1077,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_CID_MPEG_VIDC_METADATA_OPB_LUMA_CHROMA_MISR, HFI_PROP_OPB_LUMA_CHROMA_MISR}, - {META_INTERLACE, DEC, CODECS_ALL, + {META_INTERLACE, DEC, H264, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_INTERLACE, From a00765b85cb48cfe791845f33ef8477c7aa520fe Mon Sep 17 00:00:00 2001 From: Karthikeyan Periasamy Date: Tue, 23 Feb 2021 11:57:18 -0800 Subject: [PATCH 0138/1061] Video : get unifdef explicitly CRs-Fixed: 2836558 Change-Id: Iab81cd0ed9791e7426719fbc1b43d9ccafc89bb7 Signed-off-by: Karthikeyan Periasamy --- Android.bp | 5 ++++- video_kernel_headers.py | 19 +++++++++++++------ 2 files changed, 17 insertions(+), 7 deletions(-) diff --git a/Android.bp b/Android.bp index a2a67d5ec0..9b144883fc 100644 --- a/Android.bp +++ b/Android.bp @@ -9,7 +9,9 @@ video_headers_out = [ video_kernel_headers_verbose = "--verbose " genrule { name: "qti_generate_video_kernel_headers", - tools: ["headers_install.sh"], + tools: ["headers_install.sh", + "unifdef" + ], tool_files: [ "video_kernel_headers.py", ], @@ -19,6 +21,7 @@ genrule { "--header_arch arm64 " + "--gen_dir $(genDir) " + "--video_include_uapi $(locations include/uapi/*/**/*.h) " + + "--unifdef $(location unifdef) " + "--headers_install $(location headers_install.sh)", out: video_headers_out, } diff --git a/video_kernel_headers.py b/video_kernel_headers.py index 3046ca60a1..b98a5ac61b 100644 --- a/video_kernel_headers.py +++ b/video_kernel_headers.py @@ -19,26 +19,28 @@ import re import subprocess import sys -def run_headers_install(verbose, gen_dir, headers_install, prefix, h): +def run_headers_install(verbose, gen_dir, headers_install, unifdef, prefix, h): if not h.startswith(prefix): print('error: expected prefix [%s] on header [%s]' % (prefix, h)) return False out_h = os.path.join(gen_dir, h[len(prefix):]) (out_h_dirname, out_h_basename) = os.path.split(out_h) - cmd = ["bash", headers_install, h, out_h] + env = os.environ.copy() + env["LOC_UNIFDEF"] = unifdef + cmd = ["sh", headers_install, h, out_h] if verbose: print('run_headers_install: cmd is %s' % cmd) - result = subprocess.call(cmd) + result = subprocess.call(cmd, env=env) if result != 0: print('error: run_headers_install: cmd %s failed %d' % (cmd, result)) return False return True -def gen_video_headers(verbose, gen_dir, headers_install, video_include_uapi): +def gen_video_headers(verbose, gen_dir, headers_install, unifdef, video_include_uapi): error_count = 0 for h in video_include_uapi: video_uapi_include_prefix = os.path.join(h.split('/include/uapi/')[0], @@ -46,7 +48,7 @@ def gen_video_headers(verbose, gen_dir, headers_install, video_include_uapi): 'uapi') + os.sep if not run_headers_install( - verbose, gen_dir, headers_install, + verbose, gen_dir, headers_install, unifdef, video_uapi_include_prefix, h): error_count += 1 return error_count @@ -72,6 +74,10 @@ def main(): parser.add_argument( '--headers_install', required=True, help='The headers_install tool to process input headers.') + parser.add_argument( + '--unifdef', + required=True, + help='The unifdef tool used by headers_install.') args = parser.parse_args() @@ -80,9 +86,10 @@ def main(): print('gen_dir [%s]' % args.gen_dir) print('video_include_uapi [%s]' % args.video_include_uapi) print('headers_install [%s]' % args.headers_install) + print('unifdef [%s]' % args.unifdef) return gen_video_headers(args.verbose, args.gen_dir, - args.headers_install, args.video_include_uapi) + args.headers_install, args.unifdef, args.video_include_uapi) if __name__ == '__main__': sys.exit(main()) From d4b5661567928fc0d81e58ace047338d47895f52 Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Mon, 22 Feb 2021 12:54:17 -0800 Subject: [PATCH 0139/1061] video: driver: modify msm_media_info.h to fix 10bit - introduce STRIDE_BYTES and STRIDE_PIX to calculate size is bytes and pxls respectively. - DEPRECATE VENUS_BUFFER_SIZE and introduce VIDEO_RAW_BUFFER_SIZE. All buffer sizes are calculated by using STRIDE_BYTES. - For s_fmt, use STRIDE_PIX to calculate size. - For v4l2 bytesperline, use STRIDE_IN_BYTES to calculates size in bytes Change-Id: I3db4d843d1834b25c6160ebc318572ac67e22806 Signed-off-by: Darshana Patil --- driver/platform/waipio/src/msm_vidc_waipio.c | 2 +- .../variant/iris2/src/msm_vidc_buffer_iris2.c | 22 +- driver/vidc/inc/msm_media_info.h | 1158 ++++------------- driver/vidc/inc/msm_vidc_driver.h | 2 - driver/vidc/src/msm_vdec.c | 41 +- driver/vidc/src/msm_venc.c | 19 +- driver/vidc/src/msm_vidc_buffer.c | 12 +- driver/vidc/src/msm_vidc_driver.c | 22 - 8 files changed, 271 insertions(+), 1007 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index bb025f5613..f7abd095e1 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -70,7 +70,7 @@ static struct msm_platform_core_capability core_data_waipio[] = { {DEBUG_TIMEOUT, 0}, // TODO: review below entries, and if required rename as PREFETCH {PREFIX_BUF_COUNT_PIX, 18}, - {PREFIX_BUF_SIZE_PIX, 13434880}, /* Calculated by VENUS_BUFFER_SIZE for 4096x2160 UBWC */ + {PREFIX_BUF_SIZE_PIX, 13434880}, /* Calculated by VIDEO_RAW_BUFFER_SIZE for 4096x2160 UBWC */ {PREFIX_BUF_COUNT_NON_PIX, 1}, {PREFIX_BUF_SIZE_NON_PIX, 209715200}, /* * Internal buffer size is calculated for secure decode session diff --git a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c index b76ae4b06c..a3168090df 100644 --- a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c @@ -198,7 +198,7 @@ static u32 msm_vidc_decoder_dpb_size_iris2(struct msm_vidc_inst *inst) { u32 size = 0; - u32 color_fmt, media_fmt; + u32 color_fmt, v4l2_fmt; u32 width, height; struct v4l2_format *f; @@ -216,22 +216,22 @@ static u32 msm_vidc_decoder_dpb_size_iris2(struct msm_vidc_inst *inst) height = f->fmt.pix_mp.height; if (color_fmt == MSM_VIDC_FMT_NV12) { - media_fmt = COLOR_FMT_NV12_UBWC; + v4l2_fmt = V4L2_PIX_FMT_VIDC_NV12C; HFI_NV12_UBWC_IL_CALC_BUF_SIZE_V2(size, width, height, - VENUS_Y_STRIDE(media_fmt, width), VENUS_Y_SCANLINES(media_fmt, height), - VENUS_UV_STRIDE(media_fmt, width), VENUS_UV_SCANLINES(media_fmt, height), - VENUS_Y_META_STRIDE(media_fmt, width), VENUS_Y_META_SCANLINES(media_fmt, + VIDEO_Y_STRIDE_BYTES(v4l2_fmt, width), VIDEO_Y_SCANLINES(v4l2_fmt, height), + VIDEO_UV_STRIDE_BYTES(v4l2_fmt, width), VIDEO_UV_SCANLINES(v4l2_fmt, height), + VIDEO_Y_META_STRIDE(v4l2_fmt, width), VIDEO_Y_META_SCANLINES(v4l2_fmt, height), - VENUS_UV_META_STRIDE(media_fmt, width), VENUS_UV_META_SCANLINES(media_fmt, + VIDEO_UV_META_STRIDE(v4l2_fmt, width), VIDEO_UV_META_SCANLINES(v4l2_fmt, height)); } else if (color_fmt == MSM_VIDC_FMT_P010) { - media_fmt = COLOR_FMT_P010_UBWC; + v4l2_fmt = V4L2_PIX_FMT_VIDC_TP10C; HFI_YUV420_TP10_UBWC_CALC_BUF_SIZE(size, - VENUS_Y_STRIDE(media_fmt, width), VENUS_Y_SCANLINES(media_fmt, height), - VENUS_UV_STRIDE(media_fmt, width), VENUS_UV_SCANLINES(media_fmt, height), - VENUS_Y_META_STRIDE(media_fmt, width), VENUS_Y_META_SCANLINES(media_fmt, + VIDEO_Y_STRIDE_BYTES(v4l2_fmt, width), VIDEO_Y_SCANLINES(v4l2_fmt, height), + VIDEO_UV_STRIDE_BYTES(v4l2_fmt, width), VIDEO_UV_SCANLINES(v4l2_fmt, height), + VIDEO_Y_META_STRIDE(v4l2_fmt, width), VIDEO_Y_META_SCANLINES(v4l2_fmt, height), - VENUS_UV_META_STRIDE(media_fmt, width), VENUS_UV_META_SCANLINES(media_fmt, + VIDEO_UV_META_STRIDE(v4l2_fmt, width), VIDEO_UV_META_SCANLINES(v4l2_fmt, height)); } diff --git a/driver/vidc/inc/msm_media_info.h b/driver/vidc/inc/msm_media_info.h index f9aa5b2a51..60d8e2416c 100644 --- a/driver/vidc/inc/msm_media_info.h +++ b/driver/vidc/inc/msm_media_info.h @@ -6,6 +6,9 @@ #ifndef __MSM_MEDIA_INFO_H__ #define __MSM_MEDIA_INFO_H__ +#include +#include + /* Width and Height should be multiple of 16 */ #define INTERLACE_WIDTH_MAX 1920 #define INTERLACE_HEIGHT_MAX 1920 @@ -21,726 +24,14 @@ #define MSM_MEDIA_ROUNDUP(__sz, __r) (((__sz) + ((__r) - 1)) / (__r)) #endif -enum color_fmts { - /* Venus NV12: - * YUV 4:2:0 image with a plane of 8 bit Y samples followed - * by an interleaved U/V plane containing 8 bit 2x2 subsampled - * colour difference samples. - * - * <-------- Y/UV_Stride --------> - * <------- Width -------> - * Y Y Y Y Y Y Y Y Y Y Y Y . . . . ^ ^ - * Y Y Y Y Y Y Y Y Y Y Y Y . . . . | | - * Y Y Y Y Y Y Y Y Y Y Y Y . . . . Height | - * Y Y Y Y Y Y Y Y Y Y Y Y . . . . | Y_Scanlines - * Y Y Y Y Y Y Y Y Y Y Y Y . . . . | | - * Y Y Y Y Y Y Y Y Y Y Y Y . . . . | | - * Y Y Y Y Y Y Y Y Y Y Y Y . . . . | | - * Y Y Y Y Y Y Y Y Y Y Y Y . . . . V | - * . . . . . . . . . . . . . . . . | - * . . . . . . . . . . . . . . . . | - * . . . . . . . . . . . . . . . . | - * . . . . . . . . . . . . . . . . V - * U V U V U V U V U V U V . . . . ^ - * U V U V U V U V U V U V . . . . | - * U V U V U V U V U V U V . . . . | - * U V U V U V U V U V U V . . . . UV_Scanlines - * . . . . . . . . . . . . . . . . | - * . . . . . . . . . . . . . . . . V - * . . . . . . . . . . . . . . . . --> Buffer size alignment - * - * Y_Stride : Width aligned to 128 - * UV_Stride : Width aligned to 128 - * Y_Scanlines: Height aligned to 32 - * UV_Scanlines: Height/2 aligned to 16 - * Total size = align(Y_Stride * Y_Scanlines - * + UV_Stride * UV_Scanlines, 4096) - */ - COLOR_FMT_NV12, - /* Venus NV21: - * YUV 4:2:0 image with a plane of 8 bit Y samples followed - * by an interleaved V/U plane containing 8 bit 2x2 subsampled - * colour difference samples. - * - * <-------- Y/UV_Stride --------> - * <------- Width -------> - * Y Y Y Y Y Y Y Y Y Y Y Y . . . . ^ ^ - * Y Y Y Y Y Y Y Y Y Y Y Y . . . . | | - * Y Y Y Y Y Y Y Y Y Y Y Y . . . . Height | - * Y Y Y Y Y Y Y Y Y Y Y Y . . . . | Y_Scanlines - * Y Y Y Y Y Y Y Y Y Y Y Y . . . . | | - * Y Y Y Y Y Y Y Y Y Y Y Y . . . . | | - * Y Y Y Y Y Y Y Y Y Y Y Y . . . . | | - * Y Y Y Y Y Y Y Y Y Y Y Y . . . . V | - * . . . . . . . . . . . . . . . . | - * . . . . . . . . . . . . . . . . | - * . . . . . . . . . . . . . . . . | - * . . . . . . . . . . . . . . . . V - * V U V U V U V U V U V U . . . . ^ - * V U V U V U V U V U V U . . . . | - * V U V U V U V U V U V U . . . . | - * V U V U V U V U V U V U . . . . UV_Scanlines - * . . . . . . . . . . . . . . . . | - * . . . . . . . . . . . . . . . . V - * . . . . . . . . . . . . . . . . --> Padding & Buffer size alignment - * - * Y_Stride : Width aligned to 128 - * UV_Stride : Width aligned to 128 - * Y_Scanlines: Height aligned to 32 - * UV_Scanlines: Height/2 aligned to 16 - * Total size = align(Y_Stride * Y_Scanlines - * + UV_Stride * UV_Scanlines, 4096) - */ - COLOR_FMT_NV21, - /* - * The buffer can be of 2 types: - * (1) Venus NV12 UBWC Progressive - * (2) Venus NV12 UBWC Interlaced - * - * (1) Venus NV12 UBWC Progressive Buffer Format: - * Compressed Macro-tile format for NV12. - * Contains 4 planes in the following order - - * (A) Y_Meta_Plane - * (B) Y_UBWC_Plane - * (C) UV_Meta_Plane - * (D) UV_UBWC_Plane - * - * Y_Meta_Plane consists of meta information to decode compressed - * tile data in Y_UBWC_Plane. - * Y_UBWC_Plane consists of Y data in compressed macro-tile format. - * UBWC decoder block will use the Y_Meta_Plane data together with - * Y_UBWC_Plane data to produce loss-less uncompressed 8 bit Y samples. - * - * UV_Meta_Plane consists of meta information to decode compressed - * tile data in UV_UBWC_Plane. - * UV_UBWC_Plane consists of UV data in compressed macro-tile format. - * UBWC decoder block will use UV_Meta_Plane data together with - * UV_UBWC_Plane data to produce loss-less uncompressed 8 bit 2x2 - * subsampled color difference samples. - * - * Each tile in Y_UBWC_Plane/UV_UBWC_Plane is independently decodable - * and randomly accessible. There is no dependency between tiles. - * - * <----- Y_Meta_Stride ----> - * <-------- Width ------> - * M M M M M M M M M M M M . . ^ ^ - * M M M M M M M M M M M M . . | | - * M M M M M M M M M M M M . . Height | - * M M M M M M M M M M M M . . | Meta_Y_Scanlines - * M M M M M M M M M M M M . . | | - * M M M M M M M M M M M M . . | | - * M M M M M M M M M M M M . . | | - * M M M M M M M M M M M M . . V | - * . . . . . . . . . . . . . . | - * . . . . . . . . . . . . . . | - * . . . . . . . . . . . . . . -------> Buffer size aligned to 4k - * . . . . . . . . . . . . . . V - * <--Compressed tile Y Stride---> - * <------- Width -------> - * Y* Y* Y* Y* Y* Y* Y* Y* . . . . ^ ^ - * Y* Y* Y* Y* Y* Y* Y* Y* . . . . | | - * Y* Y* Y* Y* Y* Y* Y* Y* . . . . Height | - * Y* Y* Y* Y* Y* Y* Y* Y* . . . . | Macro_tile_Y_Scanlines - * Y* Y* Y* Y* Y* Y* Y* Y* . . . . | | - * Y* Y* Y* Y* Y* Y* Y* Y* . . . . | | - * Y* Y* Y* Y* Y* Y* Y* Y* . . . . | | - * Y* Y* Y* Y* Y* Y* Y* Y* . . . . V | - * . . . . . . . . . . . . . . . . | - * . . . . . . . . . . . . . . . . | - * . . . . . . . . . . . . . . . . -------> Buffer size aligned to 4k - * . . . . . . . . . . . . . . . . V - * <----- UV_Meta_Stride ----> - * M M M M M M M M M M M M . . ^ - * M M M M M M M M M M M M . . | - * M M M M M M M M M M M M . . | - * M M M M M M M M M M M M . . M_UV_Scanlines - * . . . . . . . . . . . . . . | - * . . . . . . . . . . . . . . V - * . . . . . . . . . . . . . . -------> Buffer size aligned to 4k - * <--Compressed tile UV Stride---> - * U* V* U* V* U* V* U* V* . . . . ^ - * U* V* U* V* U* V* U* V* . . . . | - * U* V* U* V* U* V* U* V* . . . . | - * U* V* U* V* U* V* U* V* . . . . UV_Scanlines - * . . . . . . . . . . . . . . . . | - * . . . . . . . . . . . . . . . . V - * . . . . . . . . . . . . . . . . -------> Buffer size aligned to 4k - * - * Y_Stride = align(Width, 128) - * UV_Stride = align(Width, 128) - * Y_Scanlines = align(Height, 32) - * UV_Scanlines = align(Height/2, 32) - * Y_UBWC_Plane_size = align(Y_Stride * Y_Scanlines, 4096) - * UV_UBWC_Plane_size = align(UV_Stride * UV_Scanlines, 4096) - * Y_Meta_Stride = align(roundup(Width, Y_TileWidth), 64) - * Y_Meta_Scanlines = align(roundup(Height, Y_TileHeight), 16) - * Y_Meta_Plane_size = align(Y_Meta_Stride * Y_Meta_Scanlines, 4096) - * UV_Meta_Stride = align(roundup(Width, UV_TileWidth), 64) - * UV_Meta_Scanlines = align(roundup(Height, UV_TileHeight), 16) - * UV_Meta_Plane_size = align(UV_Meta_Stride * UV_Meta_Scanlines, 4096) - * - * Total size = align( Y_UBWC_Plane_size + UV_UBWC_Plane_size + - * Y_Meta_Plane_size + UV_Meta_Plane_size, 4096) - * - * - * (2) Venus NV12 UBWC Interlaced Buffer Format: - * Compressed Macro-tile format for NV12 interlaced. - * Contains 8 planes in the following order - - * (A) Y_Meta_Top_Field_Plane - * (B) Y_UBWC_Top_Field_Plane - * (C) UV_Meta_Top_Field_Plane - * (D) UV_UBWC_Top_Field_Plane - * (E) Y_Meta_Bottom_Field_Plane - * (F) Y_UBWC_Bottom_Field_Plane - * (G) UV_Meta_Bottom_Field_Plane - * (H) UV_UBWC_Bottom_Field_Plane - * Y_Meta_Top_Field_Plane consists of meta information to decode - * compressed tile data for Y_UBWC_Top_Field_Plane. - * Y_UBWC_Top_Field_Plane consists of Y data in compressed macro-tile - * format for top field of an interlaced frame. - * UBWC decoder block will use the Y_Meta_Top_Field_Plane data together - * with Y_UBWC_Top_Field_Plane data to produce loss-less uncompressed - * 8 bit Y samples for top field of an interlaced frame. - * - * UV_Meta_Top_Field_Plane consists of meta information to decode - * compressed tile data in UV_UBWC_Top_Field_Plane. - * UV_UBWC_Top_Field_Plane consists of UV data in compressed macro-tile - * format for top field of an interlaced frame. - * UBWC decoder block will use UV_Meta_Top_Field_Plane data together - * with UV_UBWC_Top_Field_Plane data to produce loss-less uncompressed - * 8 bit subsampled color difference samples for top field of an - * interlaced frame. - * - * Each tile in Y_UBWC_Top_Field_Plane/UV_UBWC_Top_Field_Plane is - * independently decodable and randomly accessible. There is no - * dependency between tiles. - * - * Y_Meta_Bottom_Field_Plane consists of meta information to decode - * compressed tile data for Y_UBWC_Bottom_Field_Plane. - * Y_UBWC_Bottom_Field_Plane consists of Y data in compressed macro-tile - * format for bottom field of an interlaced frame. - * UBWC decoder block will use the Y_Meta_Bottom_Field_Plane data - * together with Y_UBWC_Bottom_Field_Plane data to produce loss-less - * uncompressed 8 bit Y samples for bottom field of an interlaced frame. - * - * UV_Meta_Bottom_Field_Plane consists of meta information to decode - * compressed tile data in UV_UBWC_Bottom_Field_Plane. - * UV_UBWC_Bottom_Field_Plane consists of UV data in compressed - * macro-tile format for bottom field of an interlaced frame. - * UBWC decoder block will use UV_Meta_Bottom_Field_Plane data together - * with UV_UBWC_Bottom_Field_Plane data to produce loss-less - * uncompressed 8 bit subsampled color difference samples for bottom - * field of an interlaced frame. - * - * Each tile in Y_UBWC_Bottom_Field_Plane/UV_UBWC_Bottom_Field_Plane is - * independently decodable and randomly accessible. There is no - * dependency between tiles. - * - * <-----Y_TF_Meta_Stride----> - * <-------- Width ------> - * M M M M M M M M M M M M . . ^ ^ - * M M M M M M M M M M M M . . | | - * M M M M M M M M M M M M . . Half_height | - * M M M M M M M M M M M M . . | Meta_Y_TF_Scanlines - * M M M M M M M M M M M M . . | | - * M M M M M M M M M M M M . . | | - * M M M M M M M M M M M M . . | | - * M M M M M M M M M M M M . . V | - * . . . . . . . . . . . . . . | - * . . . . . . . . . . . . . . | - * . . . . . . . . . . . . . . -------> Buffer size aligned to 4k - * . . . . . . . . . . . . . . V - * <-Compressed tile Y_TF Stride-> - * <------- Width -------> - * Y* Y* Y* Y* Y* Y* Y* Y* . . . . ^ ^ - * Y* Y* Y* Y* Y* Y* Y* Y* . . . . | | - * Y* Y* Y* Y* Y* Y* Y* Y* . . . . Half_height | - * Y* Y* Y* Y* Y* Y* Y* Y* . . . . | Macro_tile_Y_TF_Scanlines - * Y* Y* Y* Y* Y* Y* Y* Y* . . . . | | - * Y* Y* Y* Y* Y* Y* Y* Y* . . . . | | - * Y* Y* Y* Y* Y* Y* Y* Y* . . . . | | - * Y* Y* Y* Y* Y* Y* Y* Y* . . . . V | - * . . . . . . . . . . . . . . . . | - * . . . . . . . . . . . . . . . . | - * . . . . . . . . . . . . . . . . -------> Buffer size aligned to 4k - * . . . . . . . . . . . . . . . . V - * <----UV_TF_Meta_Stride----> - * M M M M M M M M M M M M . . ^ - * M M M M M M M M M M M M . . | - * M M M M M M M M M M M M . . | - * M M M M M M M M M M M M . . M_UV_TF_Scanlines - * . . . . . . . . . . . . . . | - * . . . . . . . . . . . . . . V - * . . . . . . . . . . . . . . -------> Buffer size aligned to 4k - * <-Compressed tile UV_TF Stride-> - * U* V* U* V* U* V* U* V* . . . . ^ - * U* V* U* V* U* V* U* V* . . . . | - * U* V* U* V* U* V* U* V* . . . . | - * U* V* U* V* U* V* U* V* . . . . UV_TF_Scanlines - * . . . . . . . . . . . . . . . . | - * . . . . . . . . . . . . . . . . V - * . . . . . . . . . . . . . . . . -------> Buffer size aligned to 4k - * <-----Y_BF_Meta_Stride----> - * <-------- Width ------> - * M M M M M M M M M M M M . . ^ ^ - * M M M M M M M M M M M M . . | | - * M M M M M M M M M M M M . . Half_height | - * M M M M M M M M M M M M . . | Meta_Y_BF_Scanlines - * M M M M M M M M M M M M . . | | - * M M M M M M M M M M M M . . | | - * M M M M M M M M M M M M . . | | - * M M M M M M M M M M M M . . V | - * . . . . . . . . . . . . . . | - * . . . . . . . . . . . . . . | - * . . . . . . . . . . . . . . -------> Buffer size aligned to 4k - * . . . . . . . . . . . . . . V - * <-Compressed tile Y_BF Stride-> - * <------- Width -------> - * Y* Y* Y* Y* Y* Y* Y* Y* . . . . ^ ^ - * Y* Y* Y* Y* Y* Y* Y* Y* . . . . | | - * Y* Y* Y* Y* Y* Y* Y* Y* . . . . Half_height | - * Y* Y* Y* Y* Y* Y* Y* Y* . . . . | Macro_tile_Y_BF_Scanlines - * Y* Y* Y* Y* Y* Y* Y* Y* . . . . | | - * Y* Y* Y* Y* Y* Y* Y* Y* . . . . | | - * Y* Y* Y* Y* Y* Y* Y* Y* . . . . | | - * Y* Y* Y* Y* Y* Y* Y* Y* . . . . V | - * . . . . . . . . . . . . . . . . | - * . . . . . . . . . . . . . . . . | - * . . . . . . . . . . . . . . . . -------> Buffer size aligned to 4k - * . . . . . . . . . . . . . . . . V - * <----UV_BF_Meta_Stride----> - * M M M M M M M M M M M M . . ^ - * M M M M M M M M M M M M . . | - * M M M M M M M M M M M M . . | - * M M M M M M M M M M M M . . M_UV_BF_Scanlines - * . . . . . . . . . . . . . . | - * . . . . . . . . . . . . . . V - * . . . . . . . . . . . . . . -------> Buffer size aligned to 4k - * <-Compressed tile UV_BF Stride-> - * U* V* U* V* U* V* U* V* . . . . ^ - * U* V* U* V* U* V* U* V* . . . . | - * U* V* U* V* U* V* U* V* . . . . | - * U* V* U* V* U* V* U* V* . . . . UV_BF_Scanlines - * . . . . . . . . . . . . . . . . | - * . . . . . . . . . . . . . . . . V - * . . . . . . . . . . . . . . . . -------> Buffer size aligned to 4k - * - * Half_height = (Height+1)>>1 - * Y_TF_Stride = align(Width, 128) - * UV_TF_Stride = align(Width, 128) - * Y_TF_Scanlines = align(Half_height, 32) - * UV_TF_Scanlines = align((Half_height+1)/2, 32) - * Y_UBWC_TF_Plane_size = align(Y_TF_Stride * Y_TF_Scanlines, 4096) - * UV_UBWC_TF_Plane_size = align(UV_TF_Stride * UV_TF_Scanlines, 4096) - * Y_TF_Meta_Stride = align(roundup(Width, Y_TileWidth), 64) - * Y_TF_Meta_Scanlines = align(roundup(Half_height, Y_TileHeight), 16) - * Y_TF_Meta_Plane_size = - * align(Y_TF_Meta_Stride * Y_TF_Meta_Scanlines, 4096) - * UV_TF_Meta_Stride = align(roundup(Width, UV_TileWidth), 64) - * UV_TF_Meta_Scanlines = align(roundup(Half_height, UV_TileHeight), 16) - * UV_TF_Meta_Plane_size = - * align(UV_TF_Meta_Stride * UV_TF_Meta_Scanlines, 4096) - * Y_BF_Stride = align(Width, 128) - * UV_BF_Stride = align(Width, 128) - * Y_BF_Scanlines = align(Half_height, 32) - * UV_BF_Scanlines = align((Half_height+1)/2, 32) - * Y_UBWC_BF_Plane_size = align(Y_BF_Stride * Y_BF_Scanlines, 4096) - * UV_UBWC_BF_Plane_size = align(UV_BF_Stride * UV_BF_Scanlines, 4096) - * Y_BF_Meta_Stride = align(roundup(Width, Y_TileWidth), 64) - * Y_BF_Meta_Scanlines = align(roundup(Half_height, Y_TileHeight), 16) - * Y_BF_Meta_Plane_size = - * align(Y_BF_Meta_Stride * Y_BF_Meta_Scanlines, 4096) - * UV_BF_Meta_Stride = align(roundup(Width, UV_TileWidth), 64) - * UV_BF_Meta_Scanlines = align(roundup(Half_height, UV_TileHeight), 16) - * UV_BF_Meta_Plane_size = - * align(UV_BF_Meta_Stride * UV_BF_Meta_Scanlines, 4096) - * - * Total size = align( Y_UBWC_TF_Plane_size + UV_UBWC_TF_Plane_size + - * Y_TF_Meta_Plane_size + UV_TF_Meta_Plane_size + - * Y_UBWC_BF_Plane_size + UV_UBWC_BF_Plane_size + - * Y_BF_Meta_Plane_size + UV_BF_Meta_Plane_size +, 4096) - */ - COLOR_FMT_NV12_UBWC, - /* Venus NV12 10-bit UBWC: - * Compressed Macro-tile format for NV12. - * Contains 4 planes in the following order - - * (A) Y_Meta_Plane - * (B) Y_UBWC_Plane - * (C) UV_Meta_Plane - * (D) UV_UBWC_Plane - * - * Y_Meta_Plane consists of meta information to decode compressed - * tile data in Y_UBWC_Plane. - * Y_UBWC_Plane consists of Y data in compressed macro-tile format. - * UBWC decoder block will use the Y_Meta_Plane data together with - * Y_UBWC_Plane data to produce loss-less uncompressed 10 bit Y samples. - * - * UV_Meta_Plane consists of meta information to decode compressed - * tile data in UV_UBWC_Plane. - * UV_UBWC_Plane consists of UV data in compressed macro-tile format. - * UBWC decoder block will use UV_Meta_Plane data together with - * UV_UBWC_Plane data to produce loss-less uncompressed 10 bit 2x2 - * subsampled color difference samples. - * - * Each tile in Y_UBWC_Plane/UV_UBWC_Plane is independently decodable - * and randomly accessible. There is no dependency between tiles. - * - * <----- Y_Meta_Stride -----> - * <-------- Width ------> - * M M M M M M M M M M M M . . ^ ^ - * M M M M M M M M M M M M . . | | - * M M M M M M M M M M M M . . Height | - * M M M M M M M M M M M M . . | Meta_Y_Scanlines - * M M M M M M M M M M M M . . | | - * M M M M M M M M M M M M . . | | - * M M M M M M M M M M M M . . | | - * M M M M M M M M M M M M . . V | - * . . . . . . . . . . . . . . | - * . . . . . . . . . . . . . . | - * . . . . . . . . . . . . . . -------> Buffer size aligned to 4k - * . . . . . . . . . . . . . . V - * <--Compressed tile Y Stride---> - * <------- Width -------> - * Y* Y* Y* Y* Y* Y* Y* Y* . . . . ^ ^ - * Y* Y* Y* Y* Y* Y* Y* Y* . . . . | | - * Y* Y* Y* Y* Y* Y* Y* Y* . . . . Height | - * Y* Y* Y* Y* Y* Y* Y* Y* . . . . | Macro_tile_Y_Scanlines - * Y* Y* Y* Y* Y* Y* Y* Y* . . . . | | - * Y* Y* Y* Y* Y* Y* Y* Y* . . . . | | - * Y* Y* Y* Y* Y* Y* Y* Y* . . . . | | - * Y* Y* Y* Y* Y* Y* Y* Y* . . . . V | - * . . . . . . . . . . . . . . . . | - * . . . . . . . . . . . . . . . . | - * . . . . . . . . . . . . . . . . -------> Buffer size aligned to 4k - * . . . . . . . . . . . . . . . . V - * <----- UV_Meta_Stride ----> - * M M M M M M M M M M M M . . ^ - * M M M M M M M M M M M M . . | - * M M M M M M M M M M M M . . | - * M M M M M M M M M M M M . . M_UV_Scanlines - * . . . . . . . . . . . . . . | - * . . . . . . . . . . . . . . V - * . . . . . . . . . . . . . . -------> Buffer size aligned to 4k - * <--Compressed tile UV Stride---> - * U* V* U* V* U* V* U* V* . . . . ^ - * U* V* U* V* U* V* U* V* . . . . | - * U* V* U* V* U* V* U* V* . . . . | - * U* V* U* V* U* V* U* V* . . . . UV_Scanlines - * . . . . . . . . . . . . . . . . | - * . . . . . . . . . . . . . . . . V - * . . . . . . . . . . . . . . . . -------> Buffer size aligned to 4k - * - * - * Y_Stride = align(Width * 4/3, 256) - * UV_Stride = align(Width * 4/3, 256) - * Y_Scanlines = align(Height, 32) - * UV_Scanlines = align(Height/2, 16) - * Y_UBWC_Plane_Size = align(Y_Stride * Y_Scanlines, 4096) - * UV_UBWC_Plane_Size = align(UV_Stride * UV_Scanlines, 4096) - * Y_Meta_Stride = align(roundup(Width, Y_TileWidth), 64) - * Y_Meta_Scanlines = align(roundup(Height, Y_TileHeight), 16) - * Y_Meta_Plane_size = align(Y_Meta_Stride * Y_Meta_Scanlines, 4096) - * UV_Meta_Stride = align(roundup(Width, UV_TileWidth), 64) - * UV_Meta_Scanlines = align(roundup(Height, UV_TileHeight), 16) - * UV_Meta_Plane_size = align(UV_Meta_Stride * UV_Meta_Scanlines, 4096) - * - * Total size = align(Y_UBWC_Plane_size + UV_UBWC_Plane_size + - * Y_Meta_Plane_size + UV_Meta_Plane_size, 4096) - */ - COLOR_FMT_NV12_BPP10_UBWC, - /* Venus RGBA8888 format: - * Contains 1 plane in the following order - - * (A) RGBA plane - * - * <-------- RGB_Stride --------> - * <------- Width -------> - * R R R R R R R R R R R R . . . . ^ ^ - * R R R R R R R R R R R R . . . . | | - * R R R R R R R R R R R R . . . . Height | - * R R R R R R R R R R R R . . . . | RGB_Scanlines - * R R R R R R R R R R R R . . . . | | - * R R R R R R R R R R R R . . . . | | - * R R R R R R R R R R R R . . . . | | - * R R R R R R R R R R R R . . . . V | - * . . . . . . . . . . . . . . . . | - * . . . . . . . . . . . . . . . . | - * . . . . . . . . . . . . . . . . | - * . . . . . . . . . . . . . . . . V - * - * RGB_Stride = align(Width * 4, 128) - * RGB_Scanlines = align(Height, 32) - * RGB_Plane_size = align(RGB_Stride * RGB_Scanlines, 4096) - * - * Total size = align(RGB_Plane_size , 4096) - */ - COLOR_FMT_RGBA8888, - /* Venus RGBA8888 UBWC format: - * Contains 2 planes in the following order - - * (A) Meta plane - * (B) RGBA plane - * - * <--- RGB_Meta_Stride ----> - * <-------- Width ------> - * M M M M M M M M M M M M . . ^ ^ - * M M M M M M M M M M M M . . | | - * M M M M M M M M M M M M . . Height | - * M M M M M M M M M M M M . . | Meta_RGB_Scanlines - * M M M M M M M M M M M M . . | | - * M M M M M M M M M M M M . . | | - * M M M M M M M M M M M M . . | | - * M M M M M M M M M M M M . . V | - * . . . . . . . . . . . . . . | - * . . . . . . . . . . . . . . | - * . . . . . . . . . . . . . . -------> Buffer size aligned to 4k - * . . . . . . . . . . . . . . V - * <-------- RGB_Stride --------> - * <------- Width -------> - * R R R R R R R R R R R R . . . . ^ ^ - * R R R R R R R R R R R R . . . . | | - * R R R R R R R R R R R R . . . . Height | - * R R R R R R R R R R R R . . . . | RGB_Scanlines - * R R R R R R R R R R R R . . . . | | - * R R R R R R R R R R R R . . . . | | - * R R R R R R R R R R R R . . . . | | - * R R R R R R R R R R R R . . . . V | - * . . . . . . . . . . . . . . . . | - * . . . . . . . . . . . . . . . . | - * . . . . . . . . . . . . . . . . -------> Buffer size aligned to 4k - * . . . . . . . . . . . . . . . . V - * - * RGB_Stride = align(Width * 4, 256) - * RGB_Scanlines = align(Height, 16) - * RGB_Plane_size = align(RGB_Stride * RGB_Scanlines, 4096) - * RGB_Meta_Stride = align(roundup(Width, RGB_TileWidth), 64) - * RGB_Meta_Scanline = align(roundup(Height, RGB_TileHeight), 16) - * RGB_Meta_Plane_size = align(RGB_Meta_Stride * - * RGB_Meta_Scanlines, 4096) - * - * Total size = align(RGB_Meta_Plane_size + RGB_Plane_size, 4096) - */ - COLOR_FMT_RGBA8888_UBWC, - /* Venus RGBA1010102 UBWC format: - * Contains 2 planes in the following order - - * (A) Meta plane - * (B) RGBA plane - * - * <--- RGB_Meta_Stride ----> - * <-------- Width ------> - * M M M M M M M M M M M M . . ^ ^ - * M M M M M M M M M M M M . . | | - * M M M M M M M M M M M M . . Height | - * M M M M M M M M M M M M . . | Meta_RGB_Scanlines - * M M M M M M M M M M M M . . | | - * M M M M M M M M M M M M . . | | - * M M M M M M M M M M M M . . | | - * M M M M M M M M M M M M . . V | - * . . . . . . . . . . . . . . | - * . . . . . . . . . . . . . . | - * . . . . . . . . . . . . . . -------> Buffer size aligned to 4k - * . . . . . . . . . . . . . . V - * <-------- RGB_Stride --------> - * <------- Width -------> - * R R R R R R R R R R R R . . . . ^ ^ - * R R R R R R R R R R R R . . . . | | - * R R R R R R R R R R R R . . . . Height | - * R R R R R R R R R R R R . . . . | RGB_Scanlines - * R R R R R R R R R R R R . . . . | | - * R R R R R R R R R R R R . . . . | | - * R R R R R R R R R R R R . . . . | | - * R R R R R R R R R R R R . . . . V | - * . . . . . . . . . . . . . . . . | - * . . . . . . . . . . . . . . . . | - * . . . . . . . . . . . . . . . . -------> Buffer size aligned to 4k - * . . . . . . . . . . . . . . . . V - * - * RGB_Stride = align(Width * 4, 256) - * RGB_Scanlines = align(Height, 16) - * RGB_Plane_size = align(RGB_Stride * RGB_Scanlines, 4096) - * RGB_Meta_Stride = align(roundup(Width, RGB_TileWidth), 64) - * RGB_Meta_Scanline = align(roundup(Height, RGB_TileHeight), 16) - * RGB_Meta_Plane_size = align(RGB_Meta_Stride * - * RGB_Meta_Scanlines, 4096) - * - * Total size = align(RGB_Meta_Plane_size + RGB_Plane_size, 4096) - */ - COLOR_FMT_RGBA1010102_UBWC, - /* Venus RGB565 UBWC format: - * Contains 2 planes in the following order - - * (A) Meta plane - * (B) RGB plane - * - * <--- RGB_Meta_Stride ----> - * <-------- Width ------> - * M M M M M M M M M M M M . . ^ ^ - * M M M M M M M M M M M M . . | | - * M M M M M M M M M M M M . . Height | - * M M M M M M M M M M M M . . | Meta_RGB_Scanlines - * M M M M M M M M M M M M . . | | - * M M M M M M M M M M M M . . | | - * M M M M M M M M M M M M . . | | - * M M M M M M M M M M M M . . V | - * . . . . . . . . . . . . . . | - * . . . . . . . . . . . . . . | - * . . . . . . . . . . . . . . -------> Buffer size aligned to 4k - * . . . . . . . . . . . . . . V - * <-------- RGB_Stride --------> - * <------- Width -------> - * R R R R R R R R R R R R . . . . ^ ^ - * R R R R R R R R R R R R . . . . | | - * R R R R R R R R R R R R . . . . Height | - * R R R R R R R R R R R R . . . . | RGB_Scanlines - * R R R R R R R R R R R R . . . . | | - * R R R R R R R R R R R R . . . . | | - * R R R R R R R R R R R R . . . . | | - * R R R R R R R R R R R R . . . . V | - * . . . . . . . . . . . . . . . . | - * . . . . . . . . . . . . . . . . | - * . . . . . . . . . . . . . . . . -------> Buffer size aligned to 4k - * . . . . . . . . . . . . . . . . V - * - * RGB_Stride = align(Width * 2, 256) - * RGB_Scanlines = align(Height, 16) - * RGB_Plane_size = align(RGB_Stride * RGB_Scanlines, 4096) - * RGB_Meta_Stride = align(roundup(Width, RGB_TileWidth), 64) - * RGB_Meta_Scanline = align(roundup(Height, RGB_TileHeight), 16) - * RGB_Meta_Plane_size = align(RGB_Meta_Stride * - * RGB_Meta_Scanlines, 4096) - * - * Total size = align(RGB_Meta_Plane_size + RGB_Plane_size, 4096) - */ - COLOR_FMT_RGB565_UBWC, - /* P010 UBWC: - * Compressed Macro-tile format for NV12. - * Contains 4 planes in the following order - - * (A) Y_Meta_Plane - * (B) Y_UBWC_Plane - * (C) UV_Meta_Plane - * (D) UV_UBWC_Plane - * - * Y_Meta_Plane consists of meta information to decode compressed - * tile data in Y_UBWC_Plane. - * Y_UBWC_Plane consists of Y data in compressed macro-tile format. - * UBWC decoder block will use the Y_Meta_Plane data together with - * Y_UBWC_Plane data to produce loss-less uncompressed 10 bit Y samples. - * - * UV_Meta_Plane consists of meta information to decode compressed - * tile data in UV_UBWC_Plane. - * UV_UBWC_Plane consists of UV data in compressed macro-tile format. - * UBWC decoder block will use UV_Meta_Plane data together with - * UV_UBWC_Plane data to produce loss-less uncompressed 10 bit 2x2 - * subsampled color difference samples. - * - * Each tile in Y_UBWC_Plane/UV_UBWC_Plane is independently decodable - * and randomly accessible. There is no dependency between tiles. - * - * <----- Y_Meta_Stride -----> - * <-------- Width ------> - * M M M M M M M M M M M M . . ^ ^ - * M M M M M M M M M M M M . . | | - * M M M M M M M M M M M M . . Height | - * M M M M M M M M M M M M . . | Meta_Y_Scanlines - * M M M M M M M M M M M M . . | | - * M M M M M M M M M M M M . . | | - * M M M M M M M M M M M M . . | | - * M M M M M M M M M M M M . . V | - * . . . . . . . . . . . . . . | - * . . . . . . . . . . . . . . | - * . . . . . . . . . . . . . . -------> Buffer size aligned to 4k - * . . . . . . . . . . . . . . V - * <--Compressed tile Y Stride---> - * <------- Width -------> - * Y* Y* Y* Y* Y* Y* Y* Y* . . . . ^ ^ - * Y* Y* Y* Y* Y* Y* Y* Y* . . . . | | - * Y* Y* Y* Y* Y* Y* Y* Y* . . . . Height | - * Y* Y* Y* Y* Y* Y* Y* Y* . . . . | Macro_tile_Y_Scanlines - * Y* Y* Y* Y* Y* Y* Y* Y* . . . . | | - * Y* Y* Y* Y* Y* Y* Y* Y* . . . . | | - * Y* Y* Y* Y* Y* Y* Y* Y* . . . . | | - * Y* Y* Y* Y* Y* Y* Y* Y* . . . . V | - * . . . . . . . . . . . . . . . . | - * . . . . . . . . . . . . . . . . | - * . . . . . . . . . . . . . . . . -------> Buffer size aligned to 4k - * . . . . . . . . . . . . . . . . V - * <----- UV_Meta_Stride ----> - * M M M M M M M M M M M M . . ^ - * M M M M M M M M M M M M . . | - * M M M M M M M M M M M M . . | - * M M M M M M M M M M M M . . M_UV_Scanlines - * . . . . . . . . . . . . . . | - * . . . . . . . . . . . . . . V - * . . . . . . . . . . . . . . -------> Buffer size aligned to 4k - * <--Compressed tile UV Stride---> - * U* V* U* V* U* V* U* V* . . . . ^ - * U* V* U* V* U* V* U* V* . . . . | - * U* V* U* V* U* V* U* V* . . . . | - * U* V* U* V* U* V* U* V* . . . . UV_Scanlines - * . . . . . . . . . . . . . . . . | - * . . . . . . . . . . . . . . . . V - * . . . . . . . . . . . . . . . . -------> Buffer size aligned to 4k - * - * - * Y_Stride = align(Width * 2, 256) - * UV_Stride = align(Width * 2, 256) - * Y_Scanlines = align(Height, 16) - * UV_Scanlines = align(Height/2, 16) - * Y_UBWC_Plane_Size = align(Y_Stride * Y_Scanlines, 4096) - * UV_UBWC_Plane_Size = align(UV_Stride * UV_Scanlines, 4096) - * Y_Meta_Stride = align(roundup(Width, Y_TileWidth), 64) - * Y_Meta_Scanlines = align(roundup(Height, Y_TileHeight), 16) - * Y_Meta_Plane_size = align(Y_Meta_Stride * Y_Meta_Scanlines, 4096) - * UV_Meta_Stride = align(roundup(Width, UV_TileWidth), 64) - * UV_Meta_Scanlines = align(roundup(Height, UV_TileHeight), 16) - * UV_Meta_Plane_size = align(UV_Meta_Stride * UV_Meta_Scanlines, 4096) - * - * Total size = align(Y_UBWC_Plane_size + UV_UBWC_Plane_size + - * Y_Meta_Plane_size + UV_Meta_Plane_size, 4096) - */ - COLOR_FMT_P010_UBWC, - /* Venus P010: - * YUV 4:2:0 image with a plane of 10 bit Y samples followed - * by an interleaved U/V plane containing 10 bit 2x2 subsampled - * colour difference samples. - * - * <-------- Y/UV_Stride --------> - * <------- Width -------> - * Y Y Y Y Y Y Y Y Y Y Y Y . . . . ^ ^ - * Y Y Y Y Y Y Y Y Y Y Y Y . . . . | | - * Y Y Y Y Y Y Y Y Y Y Y Y . . . . Height | - * Y Y Y Y Y Y Y Y Y Y Y Y . . . . | Y_Scanlines - * Y Y Y Y Y Y Y Y Y Y Y Y . . . . | | - * Y Y Y Y Y Y Y Y Y Y Y Y . . . . | | - * Y Y Y Y Y Y Y Y Y Y Y Y . . . . | | - * Y Y Y Y Y Y Y Y Y Y Y Y . . . . V | - * . . . . . . . . . . . . . . . . | - * . . . . . . . . . . . . . . . . | - * . . . . . . . . . . . . . . . . | - * . . . . . . . . . . . . . . . . V - * U V U V U V U V U V U V . . . . ^ - * U V U V U V U V U V U V . . . . | - * U V U V U V U V U V U V . . . . | - * U V U V U V U V U V U V . . . . UV_Scanlines - * . . . . . . . . . . . . . . . . | - * . . . . . . . . . . . . . . . . V - * . . . . . . . . . . . . . . . . --> Buffer size alignment - * - * Y_Stride : Width * 2 aligned to 256 - * UV_Stride : Width * 2 aligned to 256 - * Y_Scanlines: Height aligned to 32 - * UV_Scanlines: Height/2 aligned to 16 - * Total size = align(Y_Stride * Y_Scanlines - * + UV_Stride * UV_Scanlines, 4096) - */ - COLOR_FMT_P010, -}; - /* * Function arguments: - * @color_fmt + * @v4l2_fmt * @width * Progressive: width * Interlaced: width */ -static inline unsigned int VENUS_Y_STRIDE(unsigned int color_fmt, +static inline unsigned int VIDEO_Y_STRIDE_BYTES(unsigned int v4l2_fmt, unsigned int width) { unsigned int alignment, stride = 0; @@ -748,20 +39,19 @@ static inline unsigned int VENUS_Y_STRIDE(unsigned int color_fmt, if (!width) goto invalid_input; - switch (color_fmt) { - case COLOR_FMT_NV12: - case COLOR_FMT_NV21: - case COLOR_FMT_NV12_UBWC: + switch (v4l2_fmt) { + case V4L2_PIX_FMT_NV12: + case V4L2_PIX_FMT_NV21: + case V4L2_PIX_FMT_VIDC_NV12C: alignment = 128; stride = MSM_MEDIA_ALIGN(width, alignment); break; - case COLOR_FMT_NV12_BPP10_UBWC: + case V4L2_PIX_FMT_VIDC_TP10C: alignment = 256; stride = MSM_MEDIA_ALIGN(width, 192); stride = MSM_MEDIA_ALIGN(stride * 4/3, alignment); break; - case COLOR_FMT_P010_UBWC: - case COLOR_FMT_P010: + case V4L2_PIX_FMT_VIDC_P010: alignment = 256; stride = MSM_MEDIA_ALIGN(width * 2, alignment); break; @@ -774,12 +64,12 @@ invalid_input: /* * Function arguments: - * @color_fmt + * @v4l2_fmt * @width * Progressive: width * Interlaced: width */ -static inline unsigned int VENUS_UV_STRIDE(unsigned int color_fmt, +static inline unsigned int VIDEO_Y_STRIDE_PIX(unsigned int v4l2_fmt, unsigned int width) { unsigned int alignment, stride = 0; @@ -787,20 +77,56 @@ static inline unsigned int VENUS_UV_STRIDE(unsigned int color_fmt, if (!width) goto invalid_input; - switch (color_fmt) { - case COLOR_FMT_NV21: - case COLOR_FMT_NV12: - case COLOR_FMT_NV12_UBWC: + switch (v4l2_fmt) { + case V4L2_PIX_FMT_NV12: + case V4L2_PIX_FMT_NV21: + case V4L2_PIX_FMT_VIDC_NV12C: alignment = 128; stride = MSM_MEDIA_ALIGN(width, alignment); break; - case COLOR_FMT_NV12_BPP10_UBWC: + case V4L2_PIX_FMT_VIDC_TP10C: + alignment = 192; + stride = MSM_MEDIA_ALIGN(width, alignment); + break; + case V4L2_PIX_FMT_VIDC_P010: + alignment = 256; + stride = MSM_MEDIA_ALIGN(width, alignment); + break; + default: + break; + } +invalid_input: + return stride; +} + +/* + * Function arguments: + * @v4l2_fmt + * @width + * Progressive: width + * Interlaced: width + */ +static inline unsigned int VIDEO_UV_STRIDE_BYTES(unsigned int v4l2_fmt, + unsigned int width) +{ + unsigned int alignment, stride = 0; + + if (!width) + goto invalid_input; + + switch (v4l2_fmt) { + case V4L2_PIX_FMT_NV21: + case V4L2_PIX_FMT_NV12: + case V4L2_PIX_FMT_VIDC_NV12C: + alignment = 128; + stride = MSM_MEDIA_ALIGN(width, alignment); + break; + case V4L2_PIX_FMT_VIDC_TP10C: alignment = 256; stride = MSM_MEDIA_ALIGN(width, 192); stride = MSM_MEDIA_ALIGN(stride * 4/3, alignment); break; - case COLOR_FMT_P010_UBWC: - case COLOR_FMT_P010: + case V4L2_PIX_FMT_VIDC_P010: alignment = 256; stride = MSM_MEDIA_ALIGN(width * 2, alignment); break; @@ -813,12 +139,49 @@ invalid_input: /* * Function arguments: - * @color_fmt + * @v4l2_fmt + * @width + * Progressive: width + * Interlaced: width + */ +static inline unsigned int VIDEO_UV_STRIDE_PIX(unsigned int v4l2_fmt, + unsigned int width) +{ + unsigned int alignment, stride = 0; + + if (!width) + goto invalid_input; + + switch (v4l2_fmt) { + case V4L2_PIX_FMT_NV21: + case V4L2_PIX_FMT_NV12: + case V4L2_PIX_FMT_VIDC_NV12C: + alignment = 128; + stride = MSM_MEDIA_ALIGN(width, alignment); + break; + case V4L2_PIX_FMT_VIDC_TP10C: + alignment = 192; + stride = MSM_MEDIA_ALIGN(width, alignment); + break; + case V4L2_PIX_FMT_VIDC_P010: + alignment = 256; + stride = MSM_MEDIA_ALIGN(width, alignment); + break; + default: + break; + } +invalid_input: + return stride; +} + +/* + * Function arguments: + * @v4l2_fmt * @height * Progressive: height * Interlaced: (height+1)>>1 */ -static inline unsigned int VENUS_Y_SCANLINES(unsigned int color_fmt, +static inline unsigned int VIDEO_Y_SCANLINES(unsigned int v4l2_fmt, unsigned int height) { unsigned int alignment, sclines = 0; @@ -826,15 +189,14 @@ static inline unsigned int VENUS_Y_SCANLINES(unsigned int color_fmt, if (!height) goto invalid_input; - switch (color_fmt) { - case COLOR_FMT_NV12: - case COLOR_FMT_NV21: - case COLOR_FMT_NV12_UBWC: - case COLOR_FMT_P010: + switch (v4l2_fmt) { + case V4L2_PIX_FMT_NV12: + case V4L2_PIX_FMT_NV21: + case V4L2_PIX_FMT_VIDC_NV12C: + case V4L2_PIX_FMT_VIDC_P010: alignment = 32; break; - case COLOR_FMT_NV12_BPP10_UBWC: - case COLOR_FMT_P010_UBWC: + case V4L2_PIX_FMT_VIDC_TP10C: alignment = 16; break; default: @@ -847,12 +209,12 @@ invalid_input: /* * Function arguments: - * @color_fmt + * @v4l2_fmt * @height * Progressive: height * Interlaced: (height+1)>>1 */ -static inline unsigned int VENUS_UV_SCANLINES(unsigned int color_fmt, +static inline unsigned int VIDEO_UV_SCANLINES(unsigned int v4l2_fmt, unsigned int height) { unsigned int alignment, sclines = 0; @@ -860,15 +222,14 @@ static inline unsigned int VENUS_UV_SCANLINES(unsigned int color_fmt, if (!height) goto invalid_input; - switch (color_fmt) { - case COLOR_FMT_NV21: - case COLOR_FMT_NV12: - case COLOR_FMT_NV12_BPP10_UBWC: - case COLOR_FMT_P010_UBWC: - case COLOR_FMT_P010: + switch (v4l2_fmt) { + case V4L2_PIX_FMT_NV21: + case V4L2_PIX_FMT_NV12: + case V4L2_PIX_FMT_VIDC_TP10C: + case V4L2_PIX_FMT_VIDC_P010: alignment = 16; break; - case COLOR_FMT_NV12_UBWC: + case V4L2_PIX_FMT_VIDC_NV12C: alignment = 32; break; default: @@ -883,12 +244,12 @@ invalid_input: /* * Function arguments: - * @color_fmt + * @v4l2_fmt * @width * Progressive: width * Interlaced: width */ -static inline unsigned int VENUS_Y_META_STRIDE(unsigned int color_fmt, +static inline unsigned int VIDEO_Y_META_STRIDE(unsigned int v4l2_fmt, unsigned int width) { int y_tile_width = 0, y_meta_stride = 0; @@ -896,12 +257,11 @@ static inline unsigned int VENUS_Y_META_STRIDE(unsigned int color_fmt, if (!width) goto invalid_input; - switch (color_fmt) { - case COLOR_FMT_NV12_UBWC: - case COLOR_FMT_P010_UBWC: + switch (v4l2_fmt) { + case V4L2_PIX_FMT_VIDC_NV12C: y_tile_width = 32; break; - case COLOR_FMT_NV12_BPP10_UBWC: + case V4L2_PIX_FMT_VIDC_TP10C: y_tile_width = 48; break; default: @@ -917,12 +277,12 @@ invalid_input: /* * Function arguments: - * @color_fmt + * @v4l2_fmt * @height * Progressive: height * Interlaced: (height+1)>>1 */ -static inline unsigned int VENUS_Y_META_SCANLINES(unsigned int color_fmt, +static inline unsigned int VIDEO_Y_META_SCANLINES(unsigned int v4l2_fmt, unsigned int height) { int y_tile_height = 0, y_meta_scanlines = 0; @@ -930,12 +290,11 @@ static inline unsigned int VENUS_Y_META_SCANLINES(unsigned int color_fmt, if (!height) goto invalid_input; - switch (color_fmt) { - case COLOR_FMT_NV12_UBWC: + switch (v4l2_fmt) { + case V4L2_PIX_FMT_VIDC_NV12C: y_tile_height = 8; break; - case COLOR_FMT_NV12_BPP10_UBWC: - case COLOR_FMT_P010_UBWC: + case V4L2_PIX_FMT_VIDC_TP10C: y_tile_height = 4; break; default: @@ -951,12 +310,12 @@ invalid_input: /* * Function arguments: - * @color_fmt + * @v4l2_fmt * @width * Progressive: width * Interlaced: width */ -static inline unsigned int VENUS_UV_META_STRIDE(unsigned int color_fmt, +static inline unsigned int VIDEO_UV_META_STRIDE(unsigned int v4l2_fmt, unsigned int width) { int uv_tile_width = 0, uv_meta_stride = 0; @@ -964,12 +323,11 @@ static inline unsigned int VENUS_UV_META_STRIDE(unsigned int color_fmt, if (!width) goto invalid_input; - switch (color_fmt) { - case COLOR_FMT_NV12_UBWC: - case COLOR_FMT_P010_UBWC: + switch (v4l2_fmt) { + case V4L2_PIX_FMT_VIDC_NV12C: uv_tile_width = 16; break; - case COLOR_FMT_NV12_BPP10_UBWC: + case V4L2_PIX_FMT_VIDC_TP10C: uv_tile_width = 24; break; default: @@ -985,12 +343,12 @@ invalid_input: /* * Function arguments: - * @color_fmt + * @v4l2_fmt * @height * Progressive: height * Interlaced: (height+1)>>1 */ -static inline unsigned int VENUS_UV_META_SCANLINES(unsigned int color_fmt, +static inline unsigned int VIDEO_UV_META_SCANLINES(unsigned int v4l2_fmt, unsigned int height) { int uv_tile_height = 0, uv_meta_scanlines = 0; @@ -998,12 +356,11 @@ static inline unsigned int VENUS_UV_META_SCANLINES(unsigned int color_fmt, if (!height) goto invalid_input; - switch (color_fmt) { - case COLOR_FMT_NV12_UBWC: + switch (v4l2_fmt) { + case V4L2_PIX_FMT_VIDC_NV12C: uv_tile_height = 8; break; - case COLOR_FMT_NV12_BPP10_UBWC: - case COLOR_FMT_P010_UBWC: + case V4L2_PIX_FMT_VIDC_TP10C: uv_tile_height = 4; break; default: @@ -1017,7 +374,7 @@ invalid_input: return uv_meta_scanlines; } -static inline unsigned int VENUS_RGB_STRIDE(unsigned int color_fmt, +static inline unsigned int VIDEO_RGB_STRIDE_BYTES(unsigned int v4l2_fmt, unsigned int width) { unsigned int alignment = 0, stride = 0, bpp = 4; @@ -1025,17 +382,9 @@ static inline unsigned int VENUS_RGB_STRIDE(unsigned int color_fmt, if (!width) goto invalid_input; - switch (color_fmt) { - case COLOR_FMT_RGBA8888: - alignment = 128; - break; - case COLOR_FMT_RGB565_UBWC: - alignment = 256; - bpp = 2; - break; - case COLOR_FMT_RGBA8888_UBWC: - case COLOR_FMT_RGBA1010102_UBWC: - alignment = 256; + switch (v4l2_fmt) { + case V4L2_PIX_FMT_VIDC_ARGB32C: + alignment = 64; break; default: goto invalid_input; @@ -1047,7 +396,15 @@ invalid_input: return stride; } -static inline unsigned int VENUS_RGB_SCANLINES(unsigned int color_fmt, +static inline unsigned int VIDEO_RGB_STRIDE_PIX(unsigned int v4l2_fmt, + unsigned int width) +{ + unsigned int bpp = 4; + + return VIDEO_RGB_STRIDE_BYTES(v4l2_fmt, width) / bpp; +} + +static inline unsigned int VIDEO_RGB_SCANLINES(unsigned int v4l2_fmt, unsigned int height) { unsigned int alignment = 0, scanlines = 0; @@ -1055,13 +412,8 @@ static inline unsigned int VENUS_RGB_SCANLINES(unsigned int color_fmt, if (!height) goto invalid_input; - switch (color_fmt) { - case COLOR_FMT_RGBA8888: - alignment = 32; - break; - case COLOR_FMT_RGBA8888_UBWC: - case COLOR_FMT_RGBA1010102_UBWC: - case COLOR_FMT_RGB565_UBWC: + switch (v4l2_fmt) { + case V4L2_PIX_FMT_VIDC_ARGB32C: alignment = 16; break; default: @@ -1074,7 +426,7 @@ invalid_input: return scanlines; } -static inline unsigned int VENUS_RGB_META_STRIDE(unsigned int color_fmt, +static inline unsigned int VIDEO_RGB_META_STRIDE(unsigned int v4l2_fmt, unsigned int width) { int rgb_tile_width = 0, rgb_meta_stride = 0; @@ -1082,10 +434,8 @@ static inline unsigned int VENUS_RGB_META_STRIDE(unsigned int color_fmt, if (!width) goto invalid_input; - switch (color_fmt) { - case COLOR_FMT_RGBA8888_UBWC: - case COLOR_FMT_RGBA1010102_UBWC: - case COLOR_FMT_RGB565_UBWC: + switch (v4l2_fmt) { + case V4L2_PIX_FMT_VIDC_ARGB32C: rgb_tile_width = 16; break; default: @@ -1099,7 +449,7 @@ invalid_input: return rgb_meta_stride; } -static inline unsigned int VENUS_RGB_META_SCANLINES(unsigned int color_fmt, +static inline unsigned int VIDEO_RGB_META_SCANLINES(unsigned int v4l2_fmt, unsigned int height) { int rgb_tile_height = 0, rgb_meta_scanlines = 0; @@ -1107,10 +457,8 @@ static inline unsigned int VENUS_RGB_META_SCANLINES(unsigned int color_fmt, if (!height) goto invalid_input; - switch (color_fmt) { - case COLOR_FMT_RGBA8888_UBWC: - case COLOR_FMT_RGBA1010102_UBWC: - case COLOR_FMT_RGB565_UBWC: + switch (v4l2_fmt) { + case V4L2_PIX_FMT_VIDC_ARGB32C: rgb_tile_height = 4; break; default: @@ -1124,18 +472,8 @@ invalid_input: return rgb_meta_scanlines; } -/* - * Function arguments: - * @color_fmt - * @width - * Progressive: width - * Interlaced: width - * @height - * Progressive: height - * Interlaced: height - */ -static inline unsigned int VENUS_BUFFER_SIZE(unsigned int color_fmt, - unsigned int width, unsigned int height) +static inline unsigned int VIDEO_RAW_BUFFER_SIZE(unsigned int v4l2_fmt, + unsigned int pix_width, unsigned int pix_height, unsigned int interlace) { unsigned int size = 0; unsigned int y_plane, uv_plane, y_stride, @@ -1145,159 +483,115 @@ static inline unsigned int VENUS_BUFFER_SIZE(unsigned int color_fmt, unsigned int uv_meta_stride = 0, uv_meta_scanlines = 0; unsigned int y_meta_plane = 0, uv_meta_plane = 0; unsigned int rgb_stride = 0, rgb_scanlines = 0; - unsigned int rgb_plane = 0, rgb_ubwc_plane = 0, rgb_meta_plane = 0; + unsigned int rgb_ubwc_plane = 0, rgb_meta_plane = 0; unsigned int rgb_meta_stride = 0, rgb_meta_scanlines = 0; - if (!width || !height) + if (!pix_width || !pix_height) goto invalid_input; - y_stride = VENUS_Y_STRIDE(color_fmt, width); - uv_stride = VENUS_UV_STRIDE(color_fmt, width); - y_sclines = VENUS_Y_SCANLINES(color_fmt, height); - uv_sclines = VENUS_UV_SCANLINES(color_fmt, height); - rgb_stride = VENUS_RGB_STRIDE(color_fmt, width); - rgb_scanlines = VENUS_RGB_SCANLINES(color_fmt, height); + y_stride = VIDEO_Y_STRIDE_BYTES(v4l2_fmt, pix_width); + uv_stride = VIDEO_UV_STRIDE_BYTES(v4l2_fmt, pix_width); + y_sclines = VIDEO_Y_SCANLINES(v4l2_fmt, pix_height); + uv_sclines = VIDEO_UV_SCANLINES(v4l2_fmt, pix_height); + rgb_stride = VIDEO_RGB_STRIDE_BYTES(v4l2_fmt, pix_width); + rgb_scanlines = VIDEO_RGB_SCANLINES(v4l2_fmt, pix_height); - switch (color_fmt) { - case COLOR_FMT_NV21: - case COLOR_FMT_NV12: - case COLOR_FMT_P010: + switch (v4l2_fmt) { + case V4L2_PIX_FMT_NV21: + case V4L2_PIX_FMT_NV12: + case V4L2_PIX_FMT_VIDC_P010: y_plane = y_stride * y_sclines; uv_plane = uv_stride * uv_sclines; size = y_plane + uv_plane; break; - case COLOR_FMT_NV12_UBWC: - y_meta_stride = VENUS_Y_META_STRIDE(color_fmt, width); - uv_meta_stride = VENUS_UV_META_STRIDE(color_fmt, width); - if (width <= INTERLACE_WIDTH_MAX && - height <= INTERLACE_HEIGHT_MAX && - (height * width) / 256 <= INTERLACE_MB_PER_FRAME_MAX) { - y_sclines = - VENUS_Y_SCANLINES(color_fmt, (height+1)>>1); - y_ubwc_plane = - MSM_MEDIA_ALIGN(y_stride * y_sclines, 4096); - uv_sclines = - VENUS_UV_SCANLINES(color_fmt, (height+1)>>1); - uv_ubwc_plane = - MSM_MEDIA_ALIGN(uv_stride * uv_sclines, 4096); + case V4L2_PIX_FMT_VIDC_NV12C: + y_meta_stride = VIDEO_Y_META_STRIDE(v4l2_fmt, pix_width); + uv_meta_stride = VIDEO_UV_META_STRIDE(v4l2_fmt, pix_width); + if (!interlace && v4l2_fmt == V4L2_PIX_FMT_VIDC_NV12C) { + y_ubwc_plane = MSM_MEDIA_ALIGN(y_stride * y_sclines, 4096); + uv_ubwc_plane = MSM_MEDIA_ALIGN(uv_stride * uv_sclines, 4096); y_meta_scanlines = - VENUS_Y_META_SCANLINES(color_fmt, (height+1)>>1); + VIDEO_Y_META_SCANLINES(v4l2_fmt, pix_height); y_meta_plane = MSM_MEDIA_ALIGN( y_meta_stride * y_meta_scanlines, 4096); uv_meta_scanlines = - VENUS_UV_META_SCANLINES(color_fmt, (height+1)>>1); - uv_meta_plane = MSM_MEDIA_ALIGN(uv_meta_stride * - uv_meta_scanlines, 4096); - size = (y_ubwc_plane + uv_ubwc_plane + y_meta_plane + - uv_meta_plane)*2; - } else { - y_sclines = VENUS_Y_SCANLINES(color_fmt, height); - y_ubwc_plane = - MSM_MEDIA_ALIGN(y_stride * y_sclines, 4096); - uv_sclines = VENUS_UV_SCANLINES(color_fmt, height); - uv_ubwc_plane = - MSM_MEDIA_ALIGN(uv_stride * uv_sclines, 4096); - y_meta_scanlines = - VENUS_Y_META_SCANLINES(color_fmt, height); - y_meta_plane = MSM_MEDIA_ALIGN( - y_meta_stride * y_meta_scanlines, 4096); - uv_meta_scanlines = - VENUS_UV_META_SCANLINES(color_fmt, height); + VIDEO_UV_META_SCANLINES(v4l2_fmt, pix_height); uv_meta_plane = MSM_MEDIA_ALIGN(uv_meta_stride * uv_meta_scanlines, 4096); size = (y_ubwc_plane + uv_ubwc_plane + y_meta_plane + uv_meta_plane); + size = MSM_MEDIA_ALIGN(size, 4096); + } else { + if (pix_width <= INTERLACE_WIDTH_MAX && + pix_height <= INTERLACE_HEIGHT_MAX && + (pix_height * pix_width) / 256 <= INTERLACE_MB_PER_FRAME_MAX) { + y_sclines = + VIDEO_Y_SCANLINES(v4l2_fmt, (pix_height+1)>>1); + y_ubwc_plane = + MSM_MEDIA_ALIGN(y_stride * y_sclines, 4096); + uv_sclines = + VIDEO_UV_SCANLINES(v4l2_fmt, (pix_height+1)>>1); + uv_ubwc_plane = + MSM_MEDIA_ALIGN(uv_stride * uv_sclines, 4096); + y_meta_scanlines = + VIDEO_Y_META_SCANLINES(v4l2_fmt, (pix_height+1)>>1); + y_meta_plane = MSM_MEDIA_ALIGN( + y_meta_stride * y_meta_scanlines, 4096); + uv_meta_scanlines = + VIDEO_UV_META_SCANLINES(v4l2_fmt, (pix_height+1)>>1); + uv_meta_plane = MSM_MEDIA_ALIGN(uv_meta_stride * + uv_meta_scanlines, 4096); + size = (y_ubwc_plane + uv_ubwc_plane + y_meta_plane + + uv_meta_plane)*2; + } else { + y_sclines = VIDEO_Y_SCANLINES(v4l2_fmt, pix_height); + y_ubwc_plane = + MSM_MEDIA_ALIGN(y_stride * y_sclines, 4096); + uv_sclines = VIDEO_UV_SCANLINES(v4l2_fmt, pix_height); + uv_ubwc_plane = + MSM_MEDIA_ALIGN(uv_stride * uv_sclines, 4096); + y_meta_scanlines = + VIDEO_Y_META_SCANLINES(v4l2_fmt, pix_height); + y_meta_plane = MSM_MEDIA_ALIGN( + y_meta_stride * y_meta_scanlines, 4096); + uv_meta_scanlines = + VIDEO_UV_META_SCANLINES(v4l2_fmt, pix_height); + uv_meta_plane = MSM_MEDIA_ALIGN(uv_meta_stride * + uv_meta_scanlines, 4096); + size = (y_ubwc_plane + uv_ubwc_plane + y_meta_plane + + uv_meta_plane); + } } break; - case COLOR_FMT_NV12_BPP10_UBWC: + case V4L2_PIX_FMT_VIDC_TP10C: y_ubwc_plane = MSM_MEDIA_ALIGN(y_stride * y_sclines, 4096); uv_ubwc_plane = MSM_MEDIA_ALIGN(uv_stride * uv_sclines, 4096); - y_meta_stride = VENUS_Y_META_STRIDE(color_fmt, width); - y_meta_scanlines = VENUS_Y_META_SCANLINES(color_fmt, height); + y_meta_stride = VIDEO_Y_META_STRIDE(v4l2_fmt, pix_width); + y_meta_scanlines = VIDEO_Y_META_SCANLINES(v4l2_fmt, pix_height); y_meta_plane = MSM_MEDIA_ALIGN( - y_meta_stride * y_meta_scanlines, 4096); - uv_meta_stride = VENUS_UV_META_STRIDE(color_fmt, width); - uv_meta_scanlines = VENUS_UV_META_SCANLINES(color_fmt, height); + y_meta_stride * y_meta_scanlines, 4096); + uv_meta_stride = VIDEO_UV_META_STRIDE(v4l2_fmt, pix_width); + uv_meta_scanlines = VIDEO_UV_META_SCANLINES(v4l2_fmt, pix_height); uv_meta_plane = MSM_MEDIA_ALIGN(uv_meta_stride * - uv_meta_scanlines, 4096); + uv_meta_scanlines, 4096); size = y_ubwc_plane + uv_ubwc_plane + y_meta_plane + uv_meta_plane; break; - case COLOR_FMT_P010_UBWC: - y_ubwc_plane = MSM_MEDIA_ALIGN(y_stride * y_sclines, 4096); - uv_ubwc_plane = MSM_MEDIA_ALIGN(uv_stride * uv_sclines, 4096); - y_meta_stride = VENUS_Y_META_STRIDE(color_fmt, width); - y_meta_scanlines = VENUS_Y_META_SCANLINES(color_fmt, height); - y_meta_plane = MSM_MEDIA_ALIGN( - y_meta_stride * y_meta_scanlines, 4096); - uv_meta_stride = VENUS_UV_META_STRIDE(color_fmt, width); - uv_meta_scanlines = VENUS_UV_META_SCANLINES(color_fmt, height); - uv_meta_plane = MSM_MEDIA_ALIGN(uv_meta_stride * - uv_meta_scanlines, 4096); - - size = y_ubwc_plane + uv_ubwc_plane + y_meta_plane + - uv_meta_plane; - break; - case COLOR_FMT_RGBA8888: - rgb_plane = MSM_MEDIA_ALIGN(rgb_stride * rgb_scanlines, 4096); - size = rgb_plane; - break; - case COLOR_FMT_RGBA8888_UBWC: - case COLOR_FMT_RGBA1010102_UBWC: - case COLOR_FMT_RGB565_UBWC: + case V4L2_PIX_FMT_VIDC_ARGB32C: rgb_ubwc_plane = MSM_MEDIA_ALIGN(rgb_stride * rgb_scanlines, - 4096); - rgb_meta_stride = VENUS_RGB_META_STRIDE(color_fmt, width); - rgb_meta_scanlines = VENUS_RGB_META_SCANLINES(color_fmt, - height); + 4096); + rgb_meta_stride = VIDEO_RGB_META_STRIDE(v4l2_fmt, pix_width); + rgb_meta_scanlines = VIDEO_RGB_META_SCANLINES(v4l2_fmt, + pix_height); rgb_meta_plane = MSM_MEDIA_ALIGN(rgb_meta_stride * - rgb_meta_scanlines, 4096); + rgb_meta_scanlines, 4096); size = rgb_ubwc_plane + rgb_meta_plane; break; default: break; } -invalid_input: - return MSM_MEDIA_ALIGN(size, 4096); -} -static inline unsigned int VENUS_BUFFER_SIZE_USED(unsigned int color_fmt, - unsigned int width, unsigned int height, unsigned int interlace) -{ - unsigned int size = 0; - unsigned int y_stride, uv_stride, y_sclines, uv_sclines; - unsigned int y_ubwc_plane = 0, uv_ubwc_plane = 0; - unsigned int y_meta_stride = 0, y_meta_scanlines = 0; - unsigned int uv_meta_stride = 0, uv_meta_scanlines = 0; - unsigned int y_meta_plane = 0, uv_meta_plane = 0; - - if (!width || !height) - goto invalid_input; - - if (!interlace && color_fmt == COLOR_FMT_NV12_UBWC) { - y_stride = VENUS_Y_STRIDE(color_fmt, width); - uv_stride = VENUS_UV_STRIDE(color_fmt, width); - y_sclines = VENUS_Y_SCANLINES(color_fmt, height); - y_ubwc_plane = MSM_MEDIA_ALIGN(y_stride * y_sclines, 4096); - uv_sclines = VENUS_UV_SCANLINES(color_fmt, height); - uv_ubwc_plane = MSM_MEDIA_ALIGN(uv_stride * uv_sclines, 4096); - y_meta_stride = VENUS_Y_META_STRIDE(color_fmt, width); - y_meta_scanlines = - VENUS_Y_META_SCANLINES(color_fmt, height); - y_meta_plane = MSM_MEDIA_ALIGN( - y_meta_stride * y_meta_scanlines, 4096); - uv_meta_stride = VENUS_UV_META_STRIDE(color_fmt, width); - uv_meta_scanlines = - VENUS_UV_META_SCANLINES(color_fmt, height); - uv_meta_plane = MSM_MEDIA_ALIGN(uv_meta_stride * - uv_meta_scanlines, 4096); - size = (y_ubwc_plane + uv_ubwc_plane + y_meta_plane + - uv_meta_plane); - size = MSM_MEDIA_ALIGN(size, 4096); - } else { - size = VENUS_BUFFER_SIZE(color_fmt, width, height); - } invalid_input: return size; } diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 971991594f..35e242e1ee 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -191,8 +191,6 @@ enum msm_vidc_codec_type v4l2_codec_to_driver(u32 v4l2_codec, const char *func); u32 v4l2_codec_from_driver(enum msm_vidc_codec_type codec, const char *func); -u32 v4l2_colorformat_to_media(u32 v4l2_fmt, - const char *func); enum msm_vidc_colorformat_type v4l2_colorformat_to_driver(u32 colorformat, const char *func); u32 v4l2_colorformat_from_driver(enum msm_vidc_colorformat_type colorformat, diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 5343f1d922..050557f8e9 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -1254,16 +1254,13 @@ static int msm_vdec_update_properties(struct msm_vidc_inst *inst) inst->fmts[INPUT_PORT].fmt.pix_mp.width = width; inst->fmts[INPUT_PORT].fmt.pix_mp.height = height; - inst->fmts[OUTPUT_PORT].fmt.pix_mp.width = VENUS_Y_STRIDE( - v4l2_colorformat_to_media( - inst->fmts[OUTPUT_PORT].fmt.pix_mp.pixelformat, __func__), - width); - inst->fmts[OUTPUT_PORT].fmt.pix_mp.height = VENUS_Y_SCANLINES( - v4l2_colorformat_to_media( - inst->fmts[OUTPUT_PORT].fmt.pix_mp.pixelformat, __func__), - height); + inst->fmts[OUTPUT_PORT].fmt.pix_mp.width = VIDEO_Y_STRIDE_PIX( + inst->fmts[OUTPUT_PORT].fmt.pix_mp.pixelformat, width); + inst->fmts[OUTPUT_PORT].fmt.pix_mp.height = VIDEO_Y_SCANLINES( + inst->fmts[OUTPUT_PORT].fmt.pix_mp.pixelformat, height); inst->fmts[OUTPUT_PORT].fmt.pix_mp.plane_fmt[0].bytesperline = - inst->fmts[OUTPUT_PORT].fmt.pix_mp.width; + VIDEO_Y_STRIDE_BYTES( + inst->fmts[OUTPUT_PORT].fmt.pix_mp.pixelformat, width); inst->fmts[OUTPUT_PORT].fmt.pix_mp.plane_fmt[0].sizeimage = call_session_op(core, buffer_size, inst, MSM_VIDC_BUF_OUTPUT); //inst->buffers.output.size = inst->fmts[OUTPUT_PORT].fmt.pix_mp.plane_fmt[0].sizeimage; @@ -1860,17 +1857,16 @@ int msm_vdec_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) f->fmt.pix_mp.width = fmt->fmt.pix_mp.width; } fmt->fmt.pix_mp.pixelformat = f->fmt.pix_mp.pixelformat; - fmt->fmt.pix_mp.width = VENUS_Y_STRIDE( - v4l2_colorformat_to_media( - fmt->fmt.pix_mp.pixelformat, __func__), - f->fmt.pix_mp.width); - fmt->fmt.pix_mp.height = VENUS_Y_SCANLINES( - v4l2_colorformat_to_media( - fmt->fmt.pix_mp.pixelformat, __func__), + fmt->fmt.pix_mp.width = VIDEO_Y_STRIDE_PIX( + fmt->fmt.pix_mp.pixelformat, f->fmt.pix_mp.width); + fmt->fmt.pix_mp.height = VIDEO_Y_SCANLINES( + fmt->fmt.pix_mp.pixelformat, f->fmt.pix_mp.height); fmt->fmt.pix_mp.num_planes = 1; fmt->fmt.pix_mp.plane_fmt[0].bytesperline = - fmt->fmt.pix_mp.width; + VIDEO_Y_STRIDE_BYTES( + inst->fmts[OUTPUT_PORT].fmt.pix_mp.pixelformat, + f->fmt.pix_mp.width); fmt->fmt.pix_mp.plane_fmt[0].sizeimage = call_session_op(core, buffer_size, inst, MSM_VIDC_BUF_OUTPUT); @@ -2238,14 +2234,15 @@ int msm_vdec_inst_init(struct msm_vidc_inst *inst) f = &inst->fmts[OUTPUT_PORT]; f->type = OUTPUT_MPLANE; f->fmt.pix_mp.pixelformat = V4L2_PIX_FMT_VIDC_NV12C; - f->fmt.pix_mp.width = VENUS_Y_STRIDE( - v4l2_colorformat_to_media(f->fmt.pix_mp.pixelformat, __func__), + f->fmt.pix_mp.width = VIDEO_Y_STRIDE_PIX(f->fmt.pix_mp.pixelformat, DEFAULT_WIDTH); - f->fmt.pix_mp.height = VENUS_Y_SCANLINES( - v4l2_colorformat_to_media(f->fmt.pix_mp.pixelformat, __func__), + f->fmt.pix_mp.height = VIDEO_Y_SCANLINES(f->fmt.pix_mp.pixelformat, DEFAULT_HEIGHT); f->fmt.pix_mp.num_planes = 1; - f->fmt.pix_mp.plane_fmt[0].bytesperline = f->fmt.pix_mp.width; + f->fmt.pix_mp.plane_fmt[0].bytesperline = + VIDEO_Y_STRIDE_BYTES( + inst->fmts[OUTPUT_PORT].fmt.pix_mp.pixelformat, + DEFAULT_WIDTH); f->fmt.pix_mp.plane_fmt[0].sizeimage = call_session_op(core, buffer_size, inst, MSM_VIDC_BUF_OUTPUT); f->fmt.pix_mp.colorspace = V4L2_COLORSPACE_DEFAULT; diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index ecd447dc85..27b774a7c2 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -1100,16 +1100,15 @@ static int msm_venc_s_fmt_input(struct msm_vidc_inst *inst, struct v4l2_format * fmt = &inst->fmts[INPUT_PORT]; fmt->type = INPUT_MPLANE; fmt->fmt.pix_mp.pixelformat = f->fmt.pix_mp.pixelformat; - fmt->fmt.pix_mp.width = VENUS_Y_STRIDE( - v4l2_colorformat_to_media(fmt->fmt.pix_mp.pixelformat, __func__), + fmt->fmt.pix_mp.width = VIDEO_Y_STRIDE_PIX(fmt->fmt.pix_mp.pixelformat, f->fmt.pix_mp.width); - fmt->fmt.pix_mp.height = VENUS_Y_SCANLINES( - v4l2_colorformat_to_media(fmt->fmt.pix_mp.pixelformat, __func__), + fmt->fmt.pix_mp.height = VIDEO_Y_SCANLINES(fmt->fmt.pix_mp.pixelformat, f->fmt.pix_mp.height); fmt->fmt.pix_mp.num_planes = 1; fmt->fmt.pix_mp.plane_fmt[0].bytesperline = - fmt->fmt.pix_mp.width; + VIDEO_Y_STRIDE_BYTES(fmt->fmt.pix_mp.pixelformat, + f->fmt.pix_mp.width); fmt->fmt.pix_mp.plane_fmt[0].sizeimage = call_session_op(core, buffer_size, inst, MSM_VIDC_BUF_INPUT); fmt->fmt.pix_mp.colorspace = f->fmt.pix_mp.colorspace; @@ -1775,14 +1774,14 @@ int msm_venc_inst_init(struct msm_vidc_inst *inst) f = &inst->fmts[INPUT_PORT]; f->type = INPUT_MPLANE; f->fmt.pix_mp.pixelformat = V4L2_PIX_FMT_VIDC_NV12C; - f->fmt.pix_mp.width = VENUS_Y_STRIDE( - v4l2_colorformat_to_media(f->fmt.pix_mp.pixelformat, __func__), + f->fmt.pix_mp.width = VIDEO_Y_STRIDE_PIX(f->fmt.pix_mp.pixelformat, DEFAULT_WIDTH); - f->fmt.pix_mp.height = VENUS_Y_SCANLINES( - v4l2_colorformat_to_media(f->fmt.pix_mp.pixelformat, __func__), + f->fmt.pix_mp.height = VIDEO_Y_SCANLINES(f->fmt.pix_mp.pixelformat, DEFAULT_HEIGHT); f->fmt.pix_mp.num_planes = 1; - f->fmt.pix_mp.plane_fmt[0].bytesperline = f->fmt.pix_mp.width; + f->fmt.pix_mp.plane_fmt[0].bytesperline = + VIDEO_Y_STRIDE_BYTES(f->fmt.pix_mp.pixelformat, + DEFAULT_WIDTH); f->fmt.pix_mp.plane_fmt[0].sizeimage = call_session_op(core, buffer_size, inst, MSM_VIDC_BUF_INPUT); f->fmt.pix_mp.colorspace = V4L2_COLORSPACE_DEFAULT; diff --git a/driver/vidc/src/msm_vidc_buffer.c b/driver/vidc/src/msm_vidc_buffer.c index 4f24367606..71804b7eae 100644 --- a/driver/vidc/src/msm_vidc_buffer.c +++ b/driver/vidc/src/msm_vidc_buffer.c @@ -264,13 +264,12 @@ u32 msm_vidc_decoder_input_size(struct msm_vidc_inst *inst) u32 msm_vidc_decoder_output_size(struct msm_vidc_inst *inst) { u32 size; - u32 format; struct v4l2_format *f; f = &inst->fmts[OUTPUT_PORT]; - format = v4l2_colorformat_to_media(f->fmt.pix_mp.pixelformat, __func__); - size = VENUS_BUFFER_SIZE(format, f->fmt.pix_mp.width, - f->fmt.pix_mp.height); + size = VIDEO_RAW_BUFFER_SIZE(f->fmt.pix_mp.pixelformat, + f->fmt.pix_mp.width, + f->fmt.pix_mp.height, true); return size; } @@ -287,12 +286,11 @@ u32 msm_vidc_decoder_output_meta_size(struct msm_vidc_inst *inst) u32 msm_vidc_encoder_input_size(struct msm_vidc_inst *inst) { u32 size; - u32 format; struct v4l2_format *f; f = &inst->fmts[INPUT_PORT]; - format = v4l2_colorformat_to_media(f->fmt.pix_mp.pixelformat, __func__); - size = VENUS_BUFFER_SIZE_USED(format, f->fmt.pix_mp.width, + size = VIDEO_RAW_BUFFER_SIZE(f->fmt.pix_mp.pixelformat, + f->fmt.pix_mp.width, f->fmt.pix_mp.height, false); return size; } diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 967b0b6aca..96939f5e1a 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -223,28 +223,6 @@ u32 v4l2_colorformat_from_driver(enum msm_vidc_colorformat_type colorformat, return v4l2_colorformat; } -u32 v4l2_colorformat_to_media(u32 v4l2_fmt, const char *func) -{ - switch (v4l2_fmt) { - case V4L2_PIX_FMT_NV12: - return COLOR_FMT_NV12; - case V4L2_PIX_FMT_NV21: - return COLOR_FMT_NV21; - case V4L2_PIX_FMT_VIDC_P010: - return COLOR_FMT_P010; - case V4L2_PIX_FMT_VIDC_NV12C: - return COLOR_FMT_NV12_UBWC; - case V4L2_PIX_FMT_VIDC_TP10C: - return COLOR_FMT_NV12_BPP10_UBWC; - case V4L2_PIX_FMT_VIDC_ARGB32C: - return COLOR_FMT_RGBA8888_UBWC; - default: - d_vpr_e("%s: invalid v4l2 color fmt: %#x, set default (NV12)", - func, v4l2_fmt); - return COLOR_FMT_NV12; - } -} - int v4l2_type_to_driver_port(struct msm_vidc_inst *inst, u32 type, const char *func) { From 17addfbc6d516224f823dc01dccf312366f14d8b Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Mon, 22 Feb 2021 15:08:06 -0800 Subject: [PATCH 0140/1061] video: driver: add support to few properties Add support to below properties - HFI_PROP_MULTI_SLICE_BYTES_COUNT - HFI_PROP_MULTI_SLICE_MB_COUNT - HFI_PROP_CHROMA_QP_OFFSET - HFI_PROP_REQUEST_SYNC_FRAME Change-Id: I4cc62870756d058e7a7b15290f5d6797b3be243c Signed-off-by: Akshata Sahukar --- driver/platform/waipio/src/msm_vidc_waipio.c | 38 +++++---- driver/vidc/inc/hfi_property.h | 4 + driver/vidc/inc/msm_vidc_control.h | 6 ++ driver/vidc/inc/msm_vidc_internal.h | 2 +- driver/vidc/src/msm_vidc_control.c | 86 ++++++++++++++++++++ 5 files changed, 118 insertions(+), 18 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index f7abd095e1..2d9775d55b 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -280,7 +280,9 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 0, 0, 0, 0, V4L2_CID_MPEG_VIDEO_FORCE_KEY_FRAME, HFI_PROP_REQUEST_SYNC_FRAME, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + NULL, msm_vidc_set_req_sync_frame}, /* Enc: Keeping CABAC and CAVLC as same bitrate. * Dec: there's no use of Bitrate cap @@ -920,20 +922,6 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { -6, 6, 1, 0, V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2}, - {SLICE_MAX_BYTES, ENC, H264|HEVC, - 1, MAX_BITRATE / DEFAULT_FPS / 8 / 10, - 1, MAX_BITRATE / DEFAULT_FPS / 8 / 10, - V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES, - HFI_PROP_MULTI_SLICE_BYTES_COUNT, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, - - {SLICE_MAX_MB, ENC, H264|HEVC, - 1, (MAX_WIDTH * MAX_HEIGHT) / 256 / DEFAULT_FPS / 10, - 1, (MAX_WIDTH * MAX_HEIGHT) / 256 / DEFAULT_FPS / 10, - V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB, - HFI_PROP_MULTI_SLICE_MB_COUNT, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, - {SLICE_MODE, ENC, H264|HEVC, V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_BYTES, @@ -943,7 +931,21 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE, 0, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {0}, {0}, + NULL, msm_vidc_set_slice_count}, + + {SLICE_MAX_BYTES, ENC, H264|HEVC, + 1, INT_MAX, 1, INT_MAX, + V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES, + HFI_PROP_MULTI_SLICE_BYTES_COUNT, + CAP_FLAG_OUTPUT_PORT}, + + {SLICE_MAX_MB, ENC, H264|HEVC, + 1, INT_MAX, 1, INT_MAX, + V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB, + HFI_PROP_MULTI_SLICE_MB_COUNT, + CAP_FLAG_OUTPUT_PORT}, // TODO: MB level RC - mapping {MB_RC, ENC, CODECS_ALL, @@ -967,7 +969,9 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 1, MAX_CHROMA_QP_OFFSET, V4L2_CID_MPEG_VIDEO_H264_CHROMA_QP_INDEX_OFFSET, HFI_PROP_CHROMA_QP_OFFSET, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + {0}, {0}, + NULL, msm_vidc_set_chroma_qp_index_offset}, {DISPLAY_DELAY_ENABLE, DEC, CODECS_ALL, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, diff --git a/driver/vidc/inc/hfi_property.h b/driver/vidc/inc/hfi_property.h index f9aef26d60..a22f1594bd 100644 --- a/driver/vidc/inc/hfi_property.h +++ b/driver/vidc/inc/hfi_property.h @@ -283,6 +283,10 @@ enum hfi_layer_encoding_type { #define HFI_PROP_LAYER_COUNT 0x03000139 +enum hfi_chromaqp_offset_mode { + HFI_ADAPTIVE_CHROMAQP_OFFSET = 0x0, + HFI_FIXED_CHROMAQP_OFFSET = 0x1, +}; #define HFI_BITMASK_CHROMA_CB_OFFSET 0x0000ffff #define HFI_BITMASK_CHROMA_CR_OFFSET 0xffff0000 #define HFI_PROP_CHROMA_QP_OFFSET 0x0300013a diff --git a/driver/vidc/inc/msm_vidc_control.h b/driver/vidc/inc/msm_vidc_control.h index 874e061a59..ff525e0aa8 100644 --- a/driver/vidc/inc/msm_vidc_control.h +++ b/driver/vidc/inc/msm_vidc_control.h @@ -43,6 +43,12 @@ int msm_vidc_set_max_qp(void *instance, enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_frame_qp(void *instance, enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_req_sync_frame(void *instance, + enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_chroma_qp_index_offset(void *instance, + enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_slice_count(void* instance, + enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_u32(void *instance, enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_u32_enum(void *instance, diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 14948dcbb0..77f0bd2314 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -332,9 +332,9 @@ enum msm_vidc_inst_capability_type { LF_MODE, LF_ALPHA, LF_BETA, + SLICE_MODE, SLICE_MAX_BYTES, SLICE_MAX_MB, - SLICE_MODE, MB_RC, TRANSFORM_8X8, CHROMA_QP_INDEX_OFFSET, diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 28c2782bde..60d990a06e 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -1464,6 +1464,92 @@ int msm_vidc_set_frame_qp(void *instance, return rc; } +int msm_vidc_set_req_sync_frame(void *instance, + enum msm_vidc_inst_capability_type cap_id) +{ + int rc = 0; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; + s32 prepend_spspps; + u32 hfi_value = 0; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + prepend_spspps = inst->capabilities->cap[PREPEND_SPSPPS_TO_IDR].value; + if (prepend_spspps) + hfi_value = HFI_SYNC_FRAME_REQUEST_WITH_PREFIX_SEQ_HDR; + else + hfi_value = HFI_SYNC_FRAME_REQUEST_WITHOUT_SEQ_HDR; + + rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32_ENUM, + &hfi_value, sizeof(u32), __func__); + + return rc; +} + +int msm_vidc_set_chroma_qp_index_offset(void *instance, + enum msm_vidc_inst_capability_type cap_id) +{ + int rc = 0; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; + u32 hfi_value = 0, chroma_qp_offset_mode = 0, chroma_qp = 0; + u32 offset = 12; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (inst->capabilities->cap[cap_id].flags & CAP_FLAG_CLIENT_SET) + chroma_qp_offset_mode = HFI_FIXED_CHROMAQP_OFFSET; + else + chroma_qp_offset_mode = HFI_ADAPTIVE_CHROMAQP_OFFSET; + + chroma_qp = inst->capabilities->cap[cap_id].value + offset; + hfi_value = chroma_qp_offset_mode | chroma_qp << 8 | chroma_qp << 16 ; + + rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_32_PACKED, + &hfi_value, sizeof(u32), __func__); + + return rc; +} + +int msm_vidc_set_slice_count(void* instance, + enum msm_vidc_inst_capability_type cap_id) +{ + int rc = 0; + struct msm_vidc_inst* inst = (struct msm_vidc_inst*)instance; + s32 slice_mode = -1; + u32 hfi_value = 0, set_cap_id = 0; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + slice_mode = inst->capabilities->cap[SLICE_MODE].value; + + if (slice_mode == V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE) { + i_vpr_l(inst, "%s: slice mode is: %u, ignore setting to fw\n", + __func__, slice_mode); + return 0; + } + if (slice_mode == V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_MB) { + hfi_value = inst->capabilities->cap[SLICE_MAX_MB].value; + set_cap_id = SLICE_MAX_MB; + } else if (slice_mode == V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_BYTES) { + hfi_value = inst->capabilities->cap[SLICE_MAX_BYTES].value; + set_cap_id = SLICE_MAX_BYTES; + } + + rc = msm_vidc_packetize_control(inst, set_cap_id, HFI_PAYLOAD_U32, + &hfi_value, sizeof(u32), __func__); + + return rc; +} + /* TODO int msm_vidc_set_flip(void *instance, enum msm_vidc_inst_capability_type cap_id) From 0e491223d555ecb6ae87cc044e18fa571bca02df Mon Sep 17 00:00:00 2001 From: Karthikeyan Periasamy Date: Wed, 24 Feb 2021 14:24:18 -0800 Subject: [PATCH 0141/1061] video: Added more validations Fixes for KW security issues. CRs-Fixed: 2836558 Change-Id: I0c8ca6b13c00420a50b8518caea6ad51ed1268bb Signed-off-by: Karthikeyan Periasamy --- driver/variant/iris2/src/msm_vidc_iris2.c | 4 +++- driver/vidc/inc/msm_vidc_internal.h | 2 +- driver/vidc/src/venus_hfi_response.c | 8 ++++++++ 3 files changed, 12 insertions(+), 2 deletions(-) diff --git a/driver/variant/iris2/src/msm_vidc_iris2.c b/driver/variant/iris2/src/msm_vidc_iris2.c index dacfc3c51b..2d0ccfd4fd 100644 --- a/driver/variant/iris2/src/msm_vidc_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_iris2.c @@ -616,7 +616,7 @@ int msm_vidc_decide_work_route_iris2(struct msm_vidc_inst* inst) int msm_vidc_decide_quality_mode_iris2(struct msm_vidc_inst* inst) { - struct msm_vidc_inst_capability* capability = inst->capabilities; + struct msm_vidc_inst_capability* capability = NULL; struct msm_vidc_core *core; u32 mbpf, mbps, max_hq_mbpf, max_hq_mbps; u32 mode; @@ -626,6 +626,8 @@ int msm_vidc_decide_quality_mode_iris2(struct msm_vidc_inst* inst) return -EINVAL; } + capability = inst->capabilities; + if (!is_encode_session(inst)) return 0; diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 14948dcbb0..c6fdb2da9d 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -402,7 +402,7 @@ struct msm_vidc_inst_cap { struct msm_vidc_inst_capability { enum msm_vidc_domain_type domain; enum msm_vidc_codec_type codec; - struct msm_vidc_inst_cap cap[INST_CAP_MAX]; + struct msm_vidc_inst_cap cap[INST_CAP_MAX+1]; }; struct msm_vidc_core_capability { diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index 86f0638813..55786c24b2 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -1101,6 +1101,12 @@ static int handle_session_property(struct msm_vidc_inst *inst, i_vpr_h(inst, "%s: property type %#x\n", __func__, pkt->type); port = vidc_port_from_hfi(inst, pkt->port); + if (port >= MAX_PORT) { + i_vpr_e(inst, + "%s: invalid port: %d for property %#x\n", + __func__, pkt->port, pkt->type); + return -EINVAL; + } payload_ptr = (u32 *)((u8 *)pkt + sizeof(struct hfi_packet)); switch (pkt->type) { @@ -1405,6 +1411,8 @@ static int queue_response_work(struct msm_vidc_inst *inst, struct response_work *work; work = kzalloc(sizeof(struct response_work), GFP_KERNEL); + if (!work) + return -ENOMEM; INIT_LIST_HEAD(&work->list); work->type = type; work->data_size = hdr_size; From d1264c76f0a4df643fc94a141765d07e19256c64 Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Wed, 24 Feb 2021 15:32:15 -0800 Subject: [PATCH 0142/1061] video: driver: return POLLERR when inst in error state return POLLERR when inst is in error state. Change-Id: If207b8e3346322424e95d70a45aa684643e9461d Signed-off-by: Darshana Patil --- driver/vidc/src/msm_vidc.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index a25b7a2baa..4f5d9386dc 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -67,11 +67,11 @@ int msm_vidc_poll(void *instance, struct file *filp, if (!inst) { d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; + return POLLERR; } if (inst->state == MSM_VIDC_ERROR) { i_vpr_e(inst, "%s: inst in error state\n", __func__); - return -EINVAL; + return POLLERR; } poll_wait(filp, &inst->event_handler.wait, wait); From 92a5583706b4b69d7657e1f8e4208f40f7422cca Mon Sep 17 00:00:00 2001 From: Chinmay Sawarkar Date: Wed, 24 Feb 2021 00:04:20 -0800 Subject: [PATCH 0143/1061] video: driver: fix video driver remove While removing driver fw should be unloaded. Also improved error handling. Change-Id: Ia9f224da6f176c8a50c153f67fe8a77a92b7b08f Signed-off-by: Chinmay Sawarkar --- driver/vidc/inc/msm_vidc_driver.h | 4 + driver/vidc/src/msm_vidc_driver.c | 77 ++++++---------- driver/vidc/src/msm_vidc_probe.c | 144 ++++++++++++++++++++---------- driver/vidc/src/venus_hfi.c | 9 +- 4 files changed, 135 insertions(+), 99 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 35e242e1ee..72b060c800 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -301,5 +301,9 @@ bool inst_lock_check(struct msm_vidc_inst *inst, const char *function); int msm_vidc_update_meta_port_settings(struct msm_vidc_inst *inst); void msm_vidc_schedule_core_deinit(struct msm_vidc_core *core); bool msm_vidc_is_super_buffer(struct msm_vidc_inst *inst); +int msm_vidc_init_core_caps(struct msm_vidc_core* core); +int msm_vidc_init_instance_caps(struct msm_vidc_core* core); +int msm_vidc_deinit_core_caps(struct msm_vidc_core* core); +int msm_vidc_deinit_instance_caps(struct msm_vidc_core* core); #endif // _MSM_VIDC_DRIVER_H_ diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 96939f5e1a..692459cf33 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -2085,7 +2085,7 @@ int msm_vidc_remove_session(struct msm_vidc_inst *inst) list_for_each_entry_safe(i, temp, &core->instances, list) { if (i->session_id == inst->session_id) { list_del_init(&i->list); - d_vpr_h("%s: removed session %d\n", + d_vpr_h("%s: removed session %#x\n", __func__, i->session_id); inst->sid = 0; } @@ -2341,7 +2341,7 @@ int msm_vidc_get_inst_capability(struct msm_vidc_inst *inst) return rc; } -static int msm_vidc_deinit_core_caps(struct msm_vidc_core *core) +int msm_vidc_deinit_core_caps(struct msm_vidc_core *core) { int rc = 0; @@ -2349,14 +2349,15 @@ static int msm_vidc_deinit_core_caps(struct msm_vidc_core *core) d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - d_vpr_h("%s: skip freeing core capabilities\n", __func__); - //kfree(core->capabilities); - //core->capabilities = NULL; + + kfree(core->capabilities); + core->capabilities = NULL; + d_vpr_h("%s: Core capabilities freed\n", __func__); return rc; } -static int msm_vidc_init_core_caps(struct msm_vidc_core *core) +int msm_vidc_init_core_caps(struct msm_vidc_core *core) { int rc = 0; int i, num_platform_caps; @@ -2376,32 +2377,25 @@ static int msm_vidc_init_core_caps(struct msm_vidc_core *core) goto exit; } + core->capabilities = kcalloc(1, + (sizeof(struct msm_vidc_core_capability) * + (CORE_CAP_MAX + 1)), GFP_KERNEL); if (!core->capabilities) { - core->capabilities = kcalloc(1, - (sizeof(struct msm_vidc_core_capability) * - CORE_CAP_MAX), GFP_KERNEL); - if (!core->capabilities) { - d_vpr_e("%s: failed to allocate core capabilities\n", - __func__); - rc = -ENOMEM; - goto exit; - } - } else { - d_vpr_h("%s: capabilities memory is expected to be freed\n", + d_vpr_e("%s: failed to allocate core capabilities\n", __func__); + rc = -ENOMEM; + goto exit; } num_platform_caps = core->platform->data.core_data_size; /* loop over platform caps */ - for (i = 0; i < num_platform_caps; i++) { + for (i = 0; i < num_platform_caps && i < CORE_CAP_MAX; i++) { core->capabilities[platform_data[i].type].type = platform_data[i].type; core->capabilities[platform_data[i].type].value = platform_data[i].value; } exit: - if (rc) - msm_vidc_deinit_core_caps(core); return rc; } @@ -2434,7 +2428,7 @@ static void update_inst_capability(struct msm_platform_inst_capability *in, } } -static int msm_vidc_deinit_instance_caps(struct msm_vidc_core *core) +int msm_vidc_deinit_instance_caps(struct msm_vidc_core *core) { int rc = 0; @@ -2442,14 +2436,15 @@ static int msm_vidc_deinit_instance_caps(struct msm_vidc_core *core) d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - d_vpr_h("%s: skip freeing core->instance capabilities\n", __func__); - //kfree(core->inst_caps); - //core->inst_caps = NULL; + + kfree(core->inst_caps); + core->inst_caps = NULL; + d_vpr_h("%s: core->inst_caps freed\n", __func__); return rc; } -static int msm_vidc_init_instance_caps(struct msm_vidc_core *core) +int msm_vidc_init_instance_caps(struct msm_vidc_core *core) { int rc = 0; u8 enc_valid_codecs, dec_valid_codecs; @@ -2482,20 +2477,14 @@ static int msm_vidc_init_instance_caps(struct msm_vidc_core *core) COUNT_BITS(count_bits, codecs_count); core->codecs_count = codecs_count; - + core->inst_caps = kcalloc(codecs_count, + sizeof(struct msm_vidc_inst_capability), + GFP_KERNEL); if (!core->inst_caps) { - core->inst_caps = kcalloc(codecs_count, - sizeof(struct msm_vidc_inst_capability), - GFP_KERNEL); - if (!core->inst_caps) { - d_vpr_e("%s: failed to allocate core capabilities\n", - __func__); - rc = -ENOMEM; - goto error; - } - } else { - d_vpr_h("%s: capabilities memory is expected to be freed\n", + d_vpr_e("%s: failed to allocate core capabilities\n", __func__); + rc = -ENOMEM; + goto error; } check_bit = 0; @@ -2547,10 +2536,7 @@ static int msm_vidc_init_instance_caps(struct msm_vidc_core *core) } } - return 0; error: - if (rc) - msm_vidc_deinit_instance_caps(core); return rc; } @@ -2568,13 +2554,13 @@ int msm_vidc_core_deinit(struct msm_vidc_core *core, bool force) d_vpr_h("%s()\n", __func__); if (core->state == MSM_VIDC_CORE_DEINIT) goto unlock; + if (!force) if (!list_empty(&core->instances)) goto unlock; venus_hfi_core_deinit(core); - msm_vidc_deinit_instance_caps(core); - msm_vidc_deinit_core_caps(core); + /* unlink all sessions from core, if any */ list_for_each_entry_safe(inst, dummy, &core->instances, list) { msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); @@ -2602,13 +2588,6 @@ int msm_vidc_core_init(struct msm_vidc_core *core) goto unlock; } - rc = msm_vidc_init_core_caps(core); - if (rc) - goto unlock; - rc = msm_vidc_init_instance_caps(core); - if (rc) - goto unlock; - msm_vidc_change_core_state(core, MSM_VIDC_CORE_INIT, __func__); init_completion(&core->init_done); core->smmu_fault_handled = false; diff --git a/driver/vidc/src/msm_vidc_probe.c b/driver/vidc/src/msm_vidc_probe.c index a980a6c54b..c5fdb13559 100644 --- a/driver/vidc/src/msm_vidc_probe.c +++ b/driver/vidc/src/msm_vidc_probe.c @@ -230,6 +230,49 @@ exit: return rc; } +static int msm_vidc_remove(struct platform_device* pdev) +{ + struct msm_vidc_core* core; + + if (!pdev) { + d_vpr_e("%s: invalid input %pK", __func__, pdev); + return -EINVAL; + } + core = dev_get_drvdata(&pdev->dev); + if (!core) { + d_vpr_e("%s: invalid core", __func__); + return -EINVAL; + } + + d_vpr_h("%s()\n", __func__); + + msm_vidc_core_deinit(core, true); + + msm_vidc_unregister_video_device(core, MSM_VIDC_ENCODER); + msm_vidc_unregister_video_device(core, MSM_VIDC_DECODER); + //device_remove_file(&core->vdev[MSM_VIDC_ENCODER].vdev.dev, + //&dev_attr_link_name); + //device_remove_file(&core->vdev[MSM_VIDC_DECODER].vdev.dev, + //&dev_attr_link_name); + v4l2_device_unregister(&core->v4l2_dev); + sysfs_remove_group(&pdev->dev.kobj, &msm_vidc_core_attr_group); + + msm_vidc_deinit_instance_caps(core); + msm_vidc_deinit_core_caps(core); + + msm_vidc_deinit_irq(core); + msm_vidc_deinit_platform(pdev); + msm_vidc_deinit_dt(pdev); + msm_vidc_deinitialize_core(core); + + dev_set_drvdata(&pdev->dev, NULL); + debugfs_remove_recursive(core->debugfs_parent); + kfree(core); + g_core = NULL; + + return 0; +} + static int msm_vidc_probe_video_device(struct platform_device *pdev) { int rc = 0; @@ -253,49 +296,65 @@ static int msm_vidc_probe_video_device(struct platform_device *pdev) rc = msm_vidc_initialize_core(core); if (rc) { d_vpr_e("%s: init core failed with %d\n", __func__, rc); - goto exit; + goto init_core_failed; } rc = msm_vidc_init_dt(pdev); if (rc) { d_vpr_e("%s: init dt failed with %d\n", __func__, rc); - return -EINVAL; + rc = -EINVAL; + goto init_dt_failed; } rc = msm_vidc_init_platform(pdev); if (rc) { d_vpr_e("%s: init platform failed with %d\n", __func__, rc); - return -EINVAL; + rc = -EINVAL; + goto init_plat_failed; } rc = msm_vidc_init_irq(core); - if (rc) - return rc; + if (rc) { + d_vpr_e("%s: init irq failed with %d\n", __func__, rc); + goto init_irq_failed; + } + + rc = msm_vidc_init_core_caps(core); + if (rc) { + d_vpr_e("%s: init core caps failed with %d\n", __func__, rc); + goto init_core_caps_fail; + } + + rc = msm_vidc_init_instance_caps(core); + if (rc) { + d_vpr_e("%s: init inst cap failed with %d\n", __func__, rc); + goto init_inst_caps_fail; + } rc = sysfs_create_group(&pdev->dev.kobj, &msm_vidc_core_attr_group); if (rc) { d_vpr_e("Failed to create attributes\n"); - goto exit; + goto init_group_failed; } rc = v4l2_device_register(&pdev->dev, &core->v4l2_dev); if (rc) { d_vpr_e("Failed to register v4l2 device\n"); - goto exit; + goto v4l2_reg_failed; } /* setup the decoder device */ rc = msm_vidc_register_video_device(core, MSM_VIDC_DECODER, nr); if (rc) { d_vpr_e("Failed to register video decoder\n"); - goto exit; + goto dec_reg_failed; } /* setup the encoder device */ rc = msm_vidc_register_video_device(core, MSM_VIDC_ENCODER, nr + 1); if (rc) { d_vpr_e("Failed to register video encoder\n"); - goto exit; + goto enc_reg_failed; } core->debugfs_root = msm_vidc_debugfs_init_core(core); @@ -313,12 +372,36 @@ static int msm_vidc_probe_video_device(struct platform_device *pdev) &pdev->dev); if (rc) { d_vpr_e("Failed to trigger probe for sub-devices\n"); - goto exit; + goto sub_dev_failed; } -exit: - if (rc) - debugfs_remove_recursive(core->debugfs_parent); + return rc; + +sub_dev_failed: + msm_vidc_unregister_video_device(core, MSM_VIDC_ENCODER); +enc_reg_failed: + msm_vidc_unregister_video_device(core, MSM_VIDC_DECODER); +dec_reg_failed: + v4l2_device_unregister(&core->v4l2_dev); +v4l2_reg_failed: + sysfs_remove_group(&pdev->dev.kobj, &msm_vidc_core_attr_group); +init_group_failed: + msm_vidc_deinit_instance_caps(core); +init_inst_caps_fail: + msm_vidc_deinit_core_caps(core); +init_core_caps_fail: + msm_vidc_deinit_irq(core); +init_irq_failed: + msm_vidc_deinit_platform(pdev); +init_plat_failed: + msm_vidc_deinit_dt(pdev); +init_dt_failed: + msm_vidc_deinitialize_core(core); +init_core_failed: + dev_set_drvdata(&pdev->dev, NULL); + debugfs_remove_recursive(core->debugfs_parent); + kfree(core); + g_core = NULL; return rc; } @@ -351,41 +434,6 @@ static int msm_vidc_probe(struct platform_device *pdev) return -EINVAL; } -static int msm_vidc_remove(struct platform_device *pdev) -{ - struct msm_vidc_core *core; - - if (!pdev) { - d_vpr_e("%s: invalid input %pK", __func__, pdev); - return -EINVAL; - } - core = dev_get_drvdata(&pdev->dev); - if (!core) { - d_vpr_e("%s: invalid core", __func__); - return -EINVAL; - } - - d_vpr_h("%s()\n", __func__); - - msm_vidc_unregister_video_device(core, MSM_VIDC_ENCODER); - msm_vidc_unregister_video_device(core, MSM_VIDC_DECODER); - //device_remove_file(&core->vdev[MSM_VIDC_ENCODER].vdev.dev, - //&dev_attr_link_name); - //device_remove_file(&core->vdev[MSM_VIDC_DECODER].vdev.dev, - //&dev_attr_link_name); - v4l2_device_unregister(&core->v4l2_dev); - sysfs_remove_group(&pdev->dev.kobj, &msm_vidc_core_attr_group); - msm_vidc_deinit_irq(core); - msm_vidc_deinit_platform(pdev); - msm_vidc_deinit_dt(pdev); - msm_vidc_deinitialize_core(core); - dev_set_drvdata(&pdev->dev, NULL); - debugfs_remove_recursive(core->debugfs_parent); - kfree(core); - g_core = NULL; - return 0; -} - struct platform_driver msm_vidc_driver = { .probe = msm_vidc_probe, .remove = msm_vidc_remove, diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index fd007b46d1..8b1f6d7b34 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -2484,6 +2484,8 @@ fail_init_res: void __unload_fw(struct msm_vidc_core *core) { + int rc = 0; + if (!core->dt->fw_cookie) return; @@ -2491,13 +2493,16 @@ void __unload_fw(struct msm_vidc_core *core) if (core->state != MSM_VIDC_CORE_DEINIT) flush_workqueue(core->pm_workq); - qcom_scm_pas_shutdown(core->dt->fw_cookie); + rc = qcom_scm_pas_shutdown(core->dt->fw_cookie); + if (rc) + d_vpr_e("Firmware unload failed rc=%d\n", rc); + core->dt->fw_cookie = 0; __venus_power_off(core); __deinit_resources(core); - d_vpr_h("Firmware unloaded successfully\n"); + d_vpr_h("%s done\n", __func__); } static int __response_handler(struct msm_vidc_core *core) From ddffda415c6d0a91f6e97ed0046cf4cfe9a02296 Mon Sep 17 00:00:00 2001 From: Swarna Vanka Date: Wed, 24 Feb 2021 16:42:36 -0800 Subject: [PATCH 0144/1061] video: driver: fix an uninitialized variable Initialized the variable to avoid setting clock with some random number CRs-Fixed: 2836558 Change-Id: Id5673210c9e7431aad35b830c9538f8dae4982fc Signed-off-by: Swarna Vanka --- driver/vidc/src/msm_vidc_power.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/driver/vidc/src/msm_vidc_power.c b/driver/vidc/src/msm_vidc_power.c index cccf6ad2e0..4f612ad922 100644 --- a/driver/vidc/src/msm_vidc_power.c +++ b/driver/vidc/src/msm_vidc_power.c @@ -329,7 +329,8 @@ int msm_vidc_set_clocks(struct msm_vidc_inst* inst) int rc = 0; struct msm_vidc_core* core; struct msm_vidc_inst* temp; - u64 freq, rate; + u64 freq; + u64 rate = 0; u32 data_size; bool increment, decrement; u64 curr_time_ns; From a406874508ec5941dade14db81b844186250b92d Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Wed, 24 Feb 2021 17:01:35 -0800 Subject: [PATCH 0145/1061] video: driver: avoid output port stale resolution Whenever cliet sets input port resolution greater than output port resolution, stale resolution in output port is set to video fw causing corrupted encoded bitstream. Fixed the same to avoid encountering this issue. Change-Id: Icf4569b0e5b101bfea8136936706490693286cce gned-off-by: Akshata Sahukar --- driver/vidc/src/msm_venc.c | 281 +++++++++++++++++-------------------- 1 file changed, 132 insertions(+), 149 deletions(-) diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index 27b774a7c2..2126e44e5e 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -1084,142 +1084,6 @@ error: return rc; } -static int msm_venc_s_fmt_input(struct msm_vidc_inst *inst, struct v4l2_format *f) -{ - int rc = 0; - struct v4l2_format *fmt; - struct msm_vidc_core *core; - u32 codec_align; - - if (!inst || !inst->core || !inst->capabilities) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - core = inst->core; - - fmt = &inst->fmts[INPUT_PORT]; - fmt->type = INPUT_MPLANE; - fmt->fmt.pix_mp.pixelformat = f->fmt.pix_mp.pixelformat; - fmt->fmt.pix_mp.width = VIDEO_Y_STRIDE_PIX(fmt->fmt.pix_mp.pixelformat, - f->fmt.pix_mp.width); - fmt->fmt.pix_mp.height = VIDEO_Y_SCANLINES(fmt->fmt.pix_mp.pixelformat, - f->fmt.pix_mp.height); - - fmt->fmt.pix_mp.num_planes = 1; - fmt->fmt.pix_mp.plane_fmt[0].bytesperline = - VIDEO_Y_STRIDE_BYTES(fmt->fmt.pix_mp.pixelformat, - f->fmt.pix_mp.width); - fmt->fmt.pix_mp.plane_fmt[0].sizeimage = call_session_op(core, - buffer_size, inst, MSM_VIDC_BUF_INPUT); - fmt->fmt.pix_mp.colorspace = f->fmt.pix_mp.colorspace; - fmt->fmt.pix_mp.xfer_func = f->fmt.pix_mp.xfer_func; - fmt->fmt.pix_mp.ycbcr_enc = f->fmt.pix_mp.ycbcr_enc; - fmt->fmt.pix_mp.quantization = f->fmt.pix_mp.quantization; - inst->buffers.input.min_count = call_session_op(core, - min_count, inst, MSM_VIDC_BUF_INPUT); - inst->buffers.input.extra_count = call_session_op(core, - extra_count, inst, MSM_VIDC_BUF_INPUT); - if (inst->buffers.input.actual_count < - inst->buffers.input.min_count + - inst->buffers.input.extra_count) { - inst->buffers.input.actual_count = - inst->buffers.input.min_count + - inst->buffers.input.extra_count; - } - inst->buffers.input.size = - fmt->fmt.pix_mp.plane_fmt[0].sizeimage; - - codec_align = inst->fmts[OUTPUT_PORT].fmt.pix_mp.pixelformat == - V4L2_PIX_FMT_HEVC ? 32 : 16; - - /* check if resolution changed */ - if (inst->fmts[OUTPUT_PORT].fmt.pix_mp.width > - ALIGN(f->fmt.pix_mp.width, codec_align) || - inst->fmts[OUTPUT_PORT].fmt.pix_mp.height > - ALIGN(f->fmt.pix_mp.height, codec_align)) { - /* reset bitstream port with updated resolution */ - inst->fmts[OUTPUT_PORT].fmt.pix_mp.width = - ALIGN(f->fmt.pix_mp.width, codec_align); - inst->fmts[OUTPUT_PORT].fmt.pix_mp.height = - ALIGN(f->fmt.pix_mp.height, codec_align); - inst->fmts[OUTPUT_PORT].fmt.pix_mp.plane_fmt[0].sizeimage = - call_session_op(core, buffer_size, - inst, MSM_VIDC_BUF_OUTPUT); - - /* reset crop dimensions with updated resolution */ - inst->crop.top = inst->crop.left = 0; - inst->crop.width = f->fmt.pix_mp.width; - inst->crop.height = f->fmt.pix_mp.height; - - /* reset compose dimensions with updated resolution */ - inst->compose.top = inst->crop.left = 0; - inst->compose.width = f->fmt.pix_mp.width; - inst->compose.height = f->fmt.pix_mp.height; - } - - //rc = msm_vidc_check_session_supported(inst); - if (rc) - return rc; - //update_log_ctxt(inst->sid, inst->session_type, - // mplane->pixelformat); - i_vpr_h(inst, - "%s: input: codec %#x width %d height %d size %d min_count %d extra_count %d\n", - __func__, f->fmt.pix_mp.pixelformat, f->fmt.pix_mp.width, - f->fmt.pix_mp.height, - fmt->fmt.pix_mp.plane_fmt[0].sizeimage, - inst->buffers.input.min_count, - inst->buffers.input.extra_count); - - //msm_vidc_update_dcvs(inst); - //msm_vidc_update_batching(inst); - - memcpy(f, fmt, sizeof(struct v4l2_format)); - - return rc; -} - -static int msm_venc_s_fmt_input_meta(struct msm_vidc_inst *inst, struct v4l2_format *f) -{ - int rc = 0; - struct v4l2_format *fmt; - struct msm_vidc_core *core; - - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - core = inst->core; - - fmt = &inst->fmts[INPUT_META_PORT]; - fmt->type = INPUT_META_PLANE; - fmt->fmt.meta.dataformat = V4L2_META_FMT_VIDC; - if (is_input_meta_enabled(inst)) { - fmt->fmt.meta.buffersize = call_session_op(core, - buffer_size, inst, MSM_VIDC_BUF_OUTPUT_META); - inst->buffers.input_meta.min_count = - inst->buffers.input.min_count; - inst->buffers.input_meta.extra_count = - inst->buffers.input.extra_count; - inst->buffers.input_meta.actual_count = - inst->buffers.input.actual_count; - inst->buffers.input_meta.size = fmt->fmt.meta.buffersize; - } else { - fmt->fmt.meta.buffersize = 0; - inst->buffers.input_meta.min_count = 0; - inst->buffers.input_meta.extra_count = 0; - inst->buffers.input_meta.actual_count = 0; - inst->buffers.input_meta.size = 0; - } - i_vpr_h(inst, - "%s: input meta: size %d min_count %d extra_count %d\n", - __func__, fmt->fmt.meta.buffersize, - inst->buffers.input_meta.min_count, - inst->buffers.input_meta.extra_count); - - memcpy(f, fmt, sizeof(struct v4l2_format)); - return rc; -} - static int msm_venc_s_fmt_output(struct msm_vidc_inst *inst, struct v4l2_format *f) { int rc = 0; @@ -1283,14 +1147,6 @@ static int msm_venc_s_fmt_output(struct msm_vidc_inst *inst, struct v4l2_format //update_log_ctxt(inst->sid, inst->session_type, // mplane->pixelformat); - i_vpr_h(inst, - "%s: output: format %#x width %d height %d size %d min_count %d extra_count %d\n", - __func__, fmt->fmt.pix_mp.pixelformat, fmt->fmt.pix_mp.width, - fmt->fmt.pix_mp.height, - fmt->fmt.pix_mp.plane_fmt[0].sizeimage, - inst->buffers.output.min_count, - inst->buffers.output.extra_count); - memcpy(f, fmt, sizeof(struct v4l2_format)); return rc; @@ -1328,11 +1184,121 @@ static int msm_venc_s_fmt_output_meta(struct msm_vidc_inst *inst, struct v4l2_fo inst->buffers.output_meta.actual_count = 0; inst->buffers.output_meta.size = 0; } - i_vpr_h(inst, - "%s: output meta: size %d min_count %d extra_count %d\n", - __func__, fmt->fmt.meta.buffersize, - inst->buffers.output_meta.min_count, - inst->buffers.output_meta.extra_count); + + memcpy(f, fmt, sizeof(struct v4l2_format)); + return rc; +} + +static int msm_venc_s_fmt_input(struct msm_vidc_inst *inst, struct v4l2_format *f) +{ + int rc = 0; + struct v4l2_format *fmt; + struct msm_vidc_core *core; + + if (!inst || !inst->core || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + core = inst->core; + + fmt = &inst->fmts[INPUT_PORT]; + fmt->type = INPUT_MPLANE; + fmt->fmt.pix_mp.pixelformat = f->fmt.pix_mp.pixelformat; + fmt->fmt.pix_mp.width = VIDEO_Y_STRIDE_PIX(fmt->fmt.pix_mp.pixelformat, + f->fmt.pix_mp.width); + fmt->fmt.pix_mp.height = VIDEO_Y_SCANLINES(fmt->fmt.pix_mp.pixelformat, + f->fmt.pix_mp.height); + + fmt->fmt.pix_mp.num_planes = 1; + fmt->fmt.pix_mp.plane_fmt[0].bytesperline = + VIDEO_Y_STRIDE_BYTES(fmt->fmt.pix_mp.pixelformat, + f->fmt.pix_mp.width); + fmt->fmt.pix_mp.plane_fmt[0].sizeimage = call_session_op(core, + buffer_size, inst, MSM_VIDC_BUF_INPUT); + fmt->fmt.pix_mp.colorspace = f->fmt.pix_mp.colorspace; + fmt->fmt.pix_mp.xfer_func = f->fmt.pix_mp.xfer_func; + fmt->fmt.pix_mp.ycbcr_enc = f->fmt.pix_mp.ycbcr_enc; + fmt->fmt.pix_mp.quantization = f->fmt.pix_mp.quantization; + inst->buffers.input.min_count = call_session_op(core, + min_count, inst, MSM_VIDC_BUF_INPUT); + inst->buffers.input.extra_count = call_session_op(core, + extra_count, inst, MSM_VIDC_BUF_INPUT); + if (inst->buffers.input.actual_count < + inst->buffers.input.min_count + + inst->buffers.input.extra_count) { + inst->buffers.input.actual_count = + inst->buffers.input.min_count + + inst->buffers.input.extra_count; + } + inst->buffers.input.size = + fmt->fmt.pix_mp.plane_fmt[0].sizeimage; + + if (fmt->fmt.pix_mp.width != VIDEO_Y_STRIDE_PIX( + fmt->fmt.pix_mp.pixelformat, inst->crop.width) || + fmt->fmt.pix_mp.height != VIDEO_Y_SCANLINES( + fmt->fmt.pix_mp.pixelformat, inst->crop.height)) { + + /* reset crop dimensions with updated resolution */ + inst->crop.top = inst->crop.left = 0; + inst->crop.width = f->fmt.pix_mp.width; + inst->crop.height = f->fmt.pix_mp.height; + + /* reset compose dimensions with updated resolution */ + inst->compose.top = inst->crop.left = 0; + inst->compose.width = f->fmt.pix_mp.width; + inst->compose.height = f->fmt.pix_mp.height; + + rc = msm_venc_s_fmt_output(inst, &inst->fmts[OUTPUT_PORT]); + if (rc) + return rc; + } + + //rc = msm_vidc_check_session_supported(inst); + if (rc) + return rc; + //update_log_ctxt(inst->sid, inst->session_type, + // mplane->pixelformat); + + //msm_vidc_update_dcvs(inst); + //msm_vidc_update_batching(inst); + + memcpy(f, fmt, sizeof(struct v4l2_format)); + + return rc; +} + +static int msm_venc_s_fmt_input_meta(struct msm_vidc_inst *inst, struct v4l2_format *f) +{ + int rc = 0; + struct v4l2_format *fmt; + struct msm_vidc_core *core; + + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + core = inst->core; + + fmt = &inst->fmts[INPUT_META_PORT]; + fmt->type = INPUT_META_PLANE; + fmt->fmt.meta.dataformat = V4L2_META_FMT_VIDC; + if (is_input_meta_enabled(inst)) { + fmt->fmt.meta.buffersize = call_session_op(core, + buffer_size, inst, MSM_VIDC_BUF_OUTPUT_META); + inst->buffers.input_meta.min_count = + inst->buffers.input.min_count; + inst->buffers.input_meta.extra_count = + inst->buffers.input.extra_count; + inst->buffers.input_meta.actual_count = + inst->buffers.input.actual_count; + inst->buffers.input_meta.size = fmt->fmt.meta.buffersize; + } else { + fmt->fmt.meta.buffersize = 0; + inst->buffers.input_meta.min_count = 0; + inst->buffers.input_meta.extra_count = 0; + inst->buffers.input_meta.actual_count = 0; + inst->buffers.input_meta.size = 0; + } memcpy(f, fmt, sizeof(struct v4l2_format)); return rc; @@ -1342,6 +1308,7 @@ static int msm_venc_s_fmt_output_meta(struct msm_vidc_inst *inst, struct v4l2_fo int msm_venc_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) { int rc = 0; + struct v4l2_format *fmt = NULL; if (!inst) { d_vpr_e("%s: invalid params\n", __func__); @@ -1349,18 +1316,22 @@ int msm_venc_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) } if (f->type == INPUT_MPLANE) { + fmt = &inst->fmts[INPUT_PORT]; rc = msm_venc_s_fmt_input(inst, f); if (rc) return rc; } else if (f->type == INPUT_META_PLANE) { + fmt = &inst->fmts[INPUT_META_PORT]; rc = msm_venc_s_fmt_input_meta(inst, f); if (rc) return rc; } else if (f->type == OUTPUT_MPLANE) { + fmt = &inst->fmts[OUTPUT_PORT]; rc = msm_venc_s_fmt_output(inst, f); if (rc) return rc; } else if (f->type == OUTPUT_META_PLANE) { + fmt = &inst->fmts[OUTPUT_META_PORT]; rc = msm_venc_s_fmt_output_meta(inst, f); if (rc) return rc; @@ -1369,6 +1340,18 @@ int msm_venc_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) return rc; } + if (f->type == INPUT_MPLANE || f->type == OUTPUT_MPLANE) { + i_vpr_h(inst, + "%s: type %d: format %#x width %d height %d size %d\n", + __func__, f->type, fmt->fmt.pix_mp.pixelformat, + fmt->fmt.pix_mp.width, + fmt->fmt.pix_mp.height, + fmt->fmt.pix_mp.plane_fmt[0].sizeimage); + } else { + i_vpr_h(inst, "%s: type %d: size %d\n", + __func__, f->type, fmt->fmt.meta.buffersize); + } + return rc; } From 4055a232557d71e1153def6d78d18611afa04dff Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Mon, 22 Feb 2021 22:40:56 +0530 Subject: [PATCH 0146/1061] video: driver: enable smmu_fault_handler support Added smmu_fault_handler support and printing all buffers, allocations, mappings list details as part of smmu fault handling. Change-Id: Idb5d28357f9fb885adf7ae16f328b4963c56aa8c Signed-off-by: Govindaraj Rajagopal --- driver/platform/waipio/src/msm_vidc_waipio.c | 1 + driver/vidc/inc/msm_vidc_core.h | 1 + driver/vidc/inc/msm_vidc_debug.h | 12 ++ driver/vidc/inc/msm_vidc_driver.h | 2 + driver/vidc/inc/msm_vidc_internal.h | 1 + driver/vidc/src/msm_vidc_debug.c | 8 +- driver/vidc/src/msm_vidc_driver.c | 138 ++++++++++++++++++- driver/vidc/src/msm_vidc_probe.c | 1 + 8 files changed, 162 insertions(+), 2 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 2d9775d55b..140f321d6d 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -86,6 +86,7 @@ static struct msm_platform_core_capability core_data_waipio[] = { {DECODE_BATCH, 1}, {DECODE_BATCH_TIMEOUT, 200}, {AV_SYNC_WINDOW_SIZE, 40}, + {NON_FATAL_FAULTS, 1}, }; static struct msm_platform_inst_capability instance_data_waipio[] = { diff --git a/driver/vidc/inc/msm_vidc_core.h b/driver/vidc/inc/msm_vidc_core.h index f8a1f52da8..565b2a965a 100644 --- a/driver/vidc/inc/msm_vidc_core.h +++ b/driver/vidc/inc/msm_vidc_core.h @@ -84,6 +84,7 @@ struct msm_vidc_core { struct msm_vidc_mem_addr iface_q_table; struct msm_vidc_iface_q_info iface_queues[VIDC_IFACEQ_NUMQ]; struct work_struct device_work; + struct work_struct smmu_fault_work; struct workqueue_struct *device_workq; struct delayed_work pm_work; struct workqueue_struct *pm_workq; diff --git a/driver/vidc/inc/msm_vidc_debug.h b/driver/vidc/inc/msm_vidc_debug.h index 141e2991d7..d1cad9bb94 100644 --- a/driver/vidc/inc/msm_vidc_debug.h +++ b/driver/vidc/inc/msm_vidc_debug.h @@ -14,6 +14,10 @@ #define VIDC_DBG_LABEL "msm_vidc" #endif +/* Allow only 6 prints/sec */ +#define VIDC_DBG_SESSION_RATELIMIT_INTERVAL (1 * HZ) +#define VIDC_DBG_SESSION_RATELIMIT_BURST 6 + #define VIDC_DBG_TAG VIDC_DBG_LABEL ": %6s: %08x: %5s: " #define FW_DBG_TAG VIDC_DBG_LABEL ": %6s: " #define DEFAULT_SID ((u32)-1) @@ -106,6 +110,13 @@ enum vidc_msg_prio { ##__VA_ARGS__); \ } while (0) +#define dprintk_ratelimit(__level, __fmt, ...) \ + do { \ + if (msm_vidc_check_ratelimit()) { \ + dprintk(__level, DEFAULT_SID, __fmt, ##__VA_ARGS__); \ + } \ + } while (0) + #define MSM_VIDC_ERROR(value) \ do { if (value) \ d_vpr_e("BugOn"); \ @@ -129,5 +140,6 @@ struct dentry *msm_vidc_debugfs_init_inst(void *inst, void msm_vidc_debugfs_deinit_inst(void *inst); void msm_vidc_debugfs_update(void *inst, enum msm_vidc_debugfs_event e); +int msm_vidc_check_ratelimit(void); #endif diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 72b060c800..c2a8ce5ef2 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -229,6 +229,8 @@ int msm_vidc_change_core_state(struct msm_vidc_core *core, int msm_vidc_core_init(struct msm_vidc_core *core); int msm_vidc_core_deinit(struct msm_vidc_core *core, bool force); int msm_vidc_core_timeout(struct msm_vidc_core *core); +int msm_vidc_print_inst_info(struct msm_vidc_inst *inst); +void msm_vidc_smmu_fault_work_handler(struct work_struct *work); int msm_vidc_smmu_fault_handler(struct iommu_domain *domain, struct device *dev, unsigned long iova, int flags, void *data); int msm_vidc_trigger_ssr(struct msm_vidc_core *core, diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index fe7c166363..fba7c795a2 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -229,6 +229,7 @@ enum msm_vidc_core_capability_type { DECODE_BATCH_TIMEOUT, AV_SYNC_WINDOW_SIZE, CLK_FREQ_THRESHOLD, + NON_FATAL_FAULTS, CORE_CAP_MAX, }; diff --git a/driver/vidc/src/msm_vidc_debug.c b/driver/vidc/src/msm_vidc_debug.c index c70a4e2390..70b6c7bb8b 100644 --- a/driver/vidc/src/msm_vidc_debug.c +++ b/driver/vidc/src/msm_vidc_debug.c @@ -559,4 +559,10 @@ void msm_vidc_debugfs_update(void *instance, } } - +int msm_vidc_check_ratelimit(void) +{ + static DEFINE_RATELIMIT_STATE(_rs, + VIDC_DBG_SESSION_RATELIMIT_INTERVAL, + VIDC_DBG_SESSION_RATELIMIT_BURST); + return __ratelimit(&_rs); +} diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 692459cf33..3d17836646 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -29,6 +29,11 @@ } \ } +struct msm_vidc_buf_details { + enum msm_vidc_buffer_type type; + char *name; +}; + void print_vidc_buffer(u32 tag, const char *str, struct msm_vidc_inst *inst, struct msm_vidc_buffer *vbuf) { @@ -2625,10 +2630,141 @@ int msm_vidc_core_timeout(struct msm_vidc_core *core) return msm_vidc_core_deinit(core, true); } +int msm_vidc_print_inst_info(struct msm_vidc_inst *inst) +{ + struct msm_vidc_buffers *buffers; + struct msm_vidc_buffer *buf; + enum msm_vidc_port_type port; + bool is_secure, is_decode; + u32 bit_depth, bit_rate, frame_rate, width, height; + struct dma_buf *dbuf; + int i = 0; + + struct msm_vidc_buf_details buffer_details[] = { + {MSM_VIDC_BUF_INPUT, "INPUT" }, + {MSM_VIDC_BUF_OUTPUT, "OUTPUT" }, + {MSM_VIDC_BUF_INPUT_META, "IN_META" }, + {MSM_VIDC_BUF_OUTPUT_META, "OUT_META" }, + {MSM_VIDC_BUF_BIN, "BIN" }, + {MSM_VIDC_BUF_ARP, "ARP" }, + {MSM_VIDC_BUF_COMV, "COMV" }, + {MSM_VIDC_BUF_NON_COMV, "NON_COMV" }, + {MSM_VIDC_BUF_LINE, "LINE" }, + {MSM_VIDC_BUF_PERSIST, "PERSIST" }, + {MSM_VIDC_BUF_VPSS, "VPSS" }, + }; + + if (!inst || !inst->capabilities) { + i_vpr_e(inst, "%s: invalid params\n", __func__); + return -EINVAL; + } + + is_secure = !!(inst->flags & VIDC_SECURE); + is_decode = inst->domain == MSM_VIDC_DECODER; + port = is_decode ? INPUT_PORT : OUTPUT_PORT; + width = inst->fmts[port].fmt.pix_mp.width; + height = inst->fmts[port].fmt.pix_mp.height; + bit_depth = inst->capabilities->cap[BIT_DEPTH].value & 0xFFFF; + bit_rate = inst->capabilities->cap[BIT_RATE].value; + frame_rate = inst->capabilities->cap[FRAME_RATE].value >> 16; + + i_vpr_e(inst, "%s %s session, HxW: %d x %d, fps: %d, bitrate: %d, bit-depth: %d\n", + is_secure ? "Secure" : "Non-Secure", + is_decode ? "Decode" : "Encode", + height, width, + frame_rate, bit_rate, bit_depth); + + /* Print buffer details */ + for (i = 0; i < ARRAY_SIZE(buffer_details); i++) { + buffers = msm_vidc_get_buffers(inst, buffer_details[i].type, __func__); + if (!buffers) + continue; + + i_vpr_e(inst, "count: type: %8s, min: %2d, extra: %2d, actual: %2d\n", + buffer_details[i].name, buffers->min_count, + buffers->extra_count, buffers->actual_count); + + list_for_each_entry(buf, &buffers->list, list) { + if (!buf->valid || !buf->dmabuf) + continue; + dbuf = (struct dma_buf *)buf->dmabuf; + i_vpr_e(inst, + "buf: type: %8s, index: %2d, fd: %4d, size: %9u, off: %8u, filled: %9u, iova: %8x, inode: %9ld, flags: %8x, ts: %16lld, attr: %8x\n", + buffer_details[i].name, buf->index, buf->fd, buf->buffer_size, + buf->data_offset, buf->data_size, buf->device_addr, + file_inode(dbuf->file)->i_ino, + buf->flags, buf->timestamp, buf->attr); + } + } + + return 0; +} + +void msm_vidc_smmu_fault_work_handler(struct work_struct *work) +{ + struct msm_vidc_core *core; + struct msm_vidc_inst *inst = NULL; + struct msm_vidc_inst *instances[MAX_SUPPORTED_INSTANCES]; + s32 num_instances = 0; + + core = container_of(work, struct msm_vidc_core, smmu_fault_work); + if (!core) { + d_vpr_e("%s: invalid params\n", __func__); + return; + } + + core_lock(core, __func__); + list_for_each_entry(inst, &core->instances, list) + instances[num_instances++] = inst; + core_unlock(core, __func__); + + while (num_instances--) { + inst = instances[num_instances]; + inst = get_inst_ref(core, inst); + if (!inst) + continue; + inst_lock(inst, __func__); + msm_vidc_print_inst_info(inst); + inst_unlock(inst, __func__); + put_inst(inst); + } +} + int msm_vidc_smmu_fault_handler(struct iommu_domain *domain, struct device *dev, unsigned long iova, int flags, void *data) { - return -EINVAL; + struct msm_vidc_core *core = data; + + if (!domain || !core || !core->capabilities) { + d_vpr_e("%s: invalid params %pK %pK\n", + __func__, domain, core); + return -EINVAL; + } + + if (core->smmu_fault_handled) { + if (core->capabilities[NON_FATAL_FAULTS].value) { + dprintk_ratelimit(VIDC_ERR, + "%s: non-fatal pagefault address: %lx\n", + __func__, iova); + return 0; + } + } + + d_vpr_e("%s: faulting address: %lx\n", __func__, iova); + + core->smmu_fault_handled = true; + /** + * Fault handler shouldn't be blocked for longtime. So offload work + * to device_workq to print buffer and memory consumption details. + */ + queue_work(core->device_workq, &core->smmu_fault_work); + /* + * Return -ENOSYS to elicit the default behaviour of smmu driver. + * If we return -ENOSYS, then smmu driver assumes page fault handler + * is not installed and prints a list of useful debug information like + * FAR, SID etc. This information is not printed if we return 0. + */ + return -ENOSYS; } int msm_vidc_trigger_ssr(struct msm_vidc_core *core, diff --git a/driver/vidc/src/msm_vidc_probe.c b/driver/vidc/src/msm_vidc_probe.c index c5fdb13559..13ed986d14 100644 --- a/driver/vidc/src/msm_vidc_probe.c +++ b/driver/vidc/src/msm_vidc_probe.c @@ -221,6 +221,7 @@ static int msm_vidc_initialize_core(struct msm_vidc_core *core) INIT_LIST_HEAD(&core->dangling_instances); INIT_WORK(&core->device_work, venus_hfi_work_handler); + INIT_WORK(&core->smmu_fault_work, msm_vidc_smmu_fault_work_handler); INIT_DELAYED_WORK(&core->pm_work, venus_hfi_pm_work_handler); INIT_DELAYED_WORK(&core->fw_unload_work, msm_vidc_fw_unload_handler); INIT_DELAYED_WORK(&core->batch_work, msm_vidc_batch_handler); From e743f5dd4895de7121a83543be913263d82c0637 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Fri, 26 Feb 2021 20:59:25 +0530 Subject: [PATCH 0147/1061] video: driver: use char array for printing vidc logs Instead of formulating session_id, codec_type, domain at each log print, used pre-formatted char array to print the vidc logs. Change-Id: If7a93ecb25a7b1b98ebca6f39e3990079c00b5dd Signed-off-by: Govindaraj Rajagopal --- .../variant/iris2/src/msm_vidc_buffer_iris2.c | 4 +- driver/variant/iris2/src/msm_vidc_iris2.c | 4 +- driver/vidc/inc/msm_vidc_debug.h | 80 +++++++-------- driver/vidc/inc/msm_vidc_driver.h | 3 +- driver/vidc/inc/msm_vidc_inst.h | 2 +- driver/vidc/src/hfi_packet.c | 6 +- driver/vidc/src/msm_vdec.c | 36 ++++--- driver/vidc/src/msm_venc.c | 14 ++- driver/vidc/src/msm_vidc.c | 20 ++-- driver/vidc/src/msm_vidc_buffer.c | 2 +- driver/vidc/src/msm_vidc_control.c | 4 +- driver/vidc/src/msm_vidc_debug.c | 57 +---------- driver/vidc/src/msm_vidc_driver.c | 97 +++++++++++++------ driver/vidc/src/msm_vidc_power.c | 4 +- driver/vidc/src/msm_vidc_vb2.c | 2 +- driver/vidc/src/venus_hfi.c | 48 +++++---- driver/vidc/src/venus_hfi_response.c | 27 +++--- 17 files changed, 203 insertions(+), 207 deletions(-) diff --git a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c index a3168090df..504c92267c 100644 --- a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c @@ -30,7 +30,7 @@ static u32 msm_vidc_decoder_bin_size_iris2(struct msm_vidc_inst *inst) core = inst->core; if (!core->capabilities) { - d_vpr_e("%s: invalid capabilities\n", __func__); + i_vpr_e(inst, "%s: invalid capabilities\n", __func__); return size; } num_vpp_pipes = core->capabilities[NUM_VPP_PIPE].value; @@ -133,7 +133,7 @@ static u32 msm_vidc_decoder_line_size_iris2(struct msm_vidc_inst *inst) } core = inst->core; if (!core->capabilities) { - d_vpr_e("%s: invalid capabilities\n", __func__); + i_vpr_e(inst, "%s: invalid capabilities\n", __func__); return size; } num_vpp_pipes = core->capabilities[NUM_VPP_PIPE].value; diff --git a/driver/variant/iris2/src/msm_vidc_iris2.c b/driver/variant/iris2/src/msm_vidc_iris2.c index 2d0ccfd4fd..b4aeeeae72 100644 --- a/driver/variant/iris2/src/msm_vidc_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_iris2.c @@ -558,7 +558,7 @@ int msm_vidc_decide_work_mode_iris2(struct msm_vidc_inst* inst) } } else { - d_vpr_e("%s: invalid session type\n", __func__); + i_vpr_e(inst, "%s: invalid session type\n", __func__); return -EINVAL; } @@ -604,7 +604,7 @@ int msm_vidc_decide_work_route_iris2(struct msm_vidc_inst* inst) work_route = MSM_VIDC_PIPE_1; } else { - d_vpr_e("%s: invalid session type\n", __func__); + i_vpr_e(inst, "%s: invalid session type\n", __func__); return -EINVAL; } diff --git a/driver/vidc/inc/msm_vidc_debug.h b/driver/vidc/inc/msm_vidc_debug.h index d1cad9bb94..d947bca160 100644 --- a/driver/vidc/inc/msm_vidc_debug.h +++ b/driver/vidc/inc/msm_vidc_debug.h @@ -18,7 +18,8 @@ #define VIDC_DBG_SESSION_RATELIMIT_INTERVAL (1 * HZ) #define VIDC_DBG_SESSION_RATELIMIT_BURST 6 -#define VIDC_DBG_TAG VIDC_DBG_LABEL ": %6s: %08x: %5s: " +#define VIDC_DBG_TAG_INST VIDC_DBG_LABEL ": %4s: %s: " +#define VIDC_DBG_TAG_CORE VIDC_DBG_LABEL ": %4s: %08x: %s: " #define FW_DBG_TAG VIDC_DBG_LABEL ": %6s: " #define DEFAULT_SID ((u32)-1) @@ -56,64 +57,55 @@ enum vidc_msg_prio { #define FW_LOGSHIFT 16 #define FW_LOGMASK 0x0FFF0000 -#define dprintk_inst(__level, inst, __fmt, ...) \ +#define dprintk_inst(__level, __level_str, inst, __fmt, ...) \ do { \ if (inst && (msm_vidc_debug & __level)) { \ - pr_err(VIDC_DBG_TAG __fmt, \ - level_str(__level), \ - get_sid(inst), \ - codec_str(inst), \ + pr_info(VIDC_DBG_TAG_INST __fmt, \ + __level_str, \ + inst->debug_str, \ ##__VA_ARGS__); \ } \ } while (0) -#define i_vpr_e(inst, __fmt, ...) dprintk_inst(VIDC_ERR, inst, __fmt, ##__VA_ARGS__) -#define i_vpr_i(inst, __fmt, ...) dprintk_inst(VIDC_HIGH, inst, __fmt, ##__VA_ARGS__) -#define i_vpr_h(inst, __fmt, ...) dprintk_inst(VIDC_HIGH, inst, __fmt, ##__VA_ARGS__) -#define i_vpr_l(inst, __fmt, ...) dprintk_inst(VIDC_LOW, inst, __fmt, ##__VA_ARGS__) -#define i_vpr_p(inst, __fmt, ...) dprintk_inst(VIDC_PERF, inst, __fmt, ##__VA_ARGS__) -#define i_vpr_t(inst, __fmt, ...) dprintk_inst(VIDC_PKT, inst, __fmt, ##__VA_ARGS__) -#define i_vpr_b(inst, __fmt, ...) dprintk_inst(VIDC_BUS, inst, __fmt, ##__VA_ARGS__) -#define i_vpr_hp(inst, __fmt, ...) \ - dprintk_inst(VIDC_HIGH | VIDC_PERF, inst, __fmt, ##__VA_ARGS__) +#define i_vpr_e(inst, __fmt, ...) dprintk_inst(VIDC_ERR, "err ", inst, __fmt, ##__VA_ARGS__) +#define i_vpr_i(inst, __fmt, ...) dprintk_inst(VIDC_HIGH, "high", inst, __fmt, ##__VA_ARGS__) +#define i_vpr_h(inst, __fmt, ...) dprintk_inst(VIDC_HIGH, "high", inst, __fmt, ##__VA_ARGS__) +#define i_vpr_l(inst, __fmt, ...) dprintk_inst(VIDC_LOW, "low ", inst, __fmt, ##__VA_ARGS__) +#define i_vpr_p(inst, __fmt, ...) dprintk_inst(VIDC_PERF, "perf", inst, __fmt, ##__VA_ARGS__) +#define i_vpr_t(inst, __fmt, ...) dprintk_inst(VIDC_PKT, "pkt ", inst, __fmt, ##__VA_ARGS__) +#define i_vpr_b(inst, __fmt, ...) dprintk_inst(VIDC_BUS, "bus ", inst, __fmt, ##__VA_ARGS__) -#define dprintk(__level, sid, __fmt, ...) \ +#define dprintk_core(__level, __level_str, __fmt, ...) \ do { \ if (msm_vidc_debug & __level) { \ - pr_err(VIDC_DBG_TAG __fmt, \ - level_str(__level), \ - sid, \ + pr_info(VIDC_DBG_TAG_CORE __fmt, \ + __level_str, \ + DEFAULT_SID, \ "codec", \ ##__VA_ARGS__); \ } \ } while (0) -#define d_vpr_e(__fmt, ...) \ - dprintk(VIDC_ERR, DEFAULT_SID, __fmt, ##__VA_ARGS__) -#define d_vpr_i(__fmt, ...) \ - dprintk(VIDC_HIGH, DEFAULT_SID, __fmt, ##__VA_ARGS__) -#define d_vpr_h(__fmt, ...) \ - dprintk(VIDC_HIGH, DEFAULT_SID, __fmt, ##__VA_ARGS__) -#define d_vpr_l(__fmt, ...) \ - dprintk(VIDC_LOW, DEFAULT_SID, __fmt, ##__VA_ARGS__) -#define d_vpr_p(__fmt, ...) \ - dprintk(VIDC_PERF, DEFAULT_SID, __fmt, ##__VA_ARGS__) -#define d_vpr_t(__fmt, ...) \ - dprintk(VIDC_PKT, DEFAULT_SID, __fmt, ##__VA_ARGS__) -#define d_vpr_b(__fmt, ...) \ - dprintk(VIDC_BUS, DEFAULT_SID, __fmt, ##__VA_ARGS__) +#define d_vpr_e(__fmt, ...) dprintk_core(VIDC_ERR, "err ", __fmt, ##__VA_ARGS__) +#define d_vpr_h(__fmt, ...) dprintk_core(VIDC_HIGH, "high", __fmt, ##__VA_ARGS__) +#define d_vpr_l(__fmt, ...) dprintk_core(VIDC_LOW, "low ", __fmt, ##__VA_ARGS__) +#define d_vpr_p(__fmt, ...) dprintk_core(VIDC_PERF, "perf", __fmt, ##__VA_ARGS__) +#define d_vpr_t(__fmt, ...) dprintk_core(VIDC_PKT, "pkt ", __fmt, ##__VA_ARGS__) +#define d_vpr_b(__fmt, ...) dprintk_core(VIDC_BUS, "bus ", __fmt, ##__VA_ARGS__) + +#define dprintk_ratelimit(__level, __level_str, __fmt, ...) \ + do { \ + if (msm_vidc_check_ratelimit()) { \ + dprintk_core(__level, __level_str, __fmt, ##__VA_ARGS__); \ + } \ + } while (0) #define dprintk_firmware(__level, __fmt, ...) \ do { \ - pr_err(FW_DBG_TAG __fmt, \ - "fw", \ - ##__VA_ARGS__); \ - } while (0) - -#define dprintk_ratelimit(__level, __fmt, ...) \ - do { \ - if (msm_vidc_check_ratelimit()) { \ - dprintk(__level, DEFAULT_SID, __fmt, ##__VA_ARGS__); \ + if (__level & FW_PRINTK) { \ + pr_info(FW_DBG_TAG __fmt, \ + "fw", \ + ##__VA_ARGS__); \ } \ } while (0) @@ -122,10 +114,6 @@ enum vidc_msg_prio { d_vpr_e("BugOn"); \ } while (0) -const char *level_str(u32 level); -const char *codec_str(void *instance); -u32 get_sid(void *instance); - enum msm_vidc_debugfs_event { MSM_VIDC_DEBUGFS_EVENT_ETB, MSM_VIDC_DEBUGFS_EVENT_EBD, diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index c2a8ce5ef2..5d6c76ed2b 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -183,7 +183,7 @@ static inline bool is_session_error(struct msm_vidc_inst* inst) return inst->state == MSM_VIDC_ERROR; } -void print_vidc_buffer(u32 tag, const char *str, struct msm_vidc_inst *inst, +void print_vidc_buffer(u32 tag, const char *tag_str, const char *str, struct msm_vidc_inst *inst, struct msm_vidc_buffer *vbuf); void print_vb2_buffer(const char *str, struct msm_vidc_inst *inst, struct vb2_buffer *vb2); @@ -307,5 +307,6 @@ int msm_vidc_init_core_caps(struct msm_vidc_core* core); int msm_vidc_init_instance_caps(struct msm_vidc_core* core); int msm_vidc_deinit_core_caps(struct msm_vidc_core* core); int msm_vidc_deinit_instance_caps(struct msm_vidc_core* core); +int msm_vidc_update_debug_str(struct msm_vidc_inst *inst); #endif // _MSM_VIDC_DRIVER_H_ diff --git a/driver/vidc/inc/msm_vidc_inst.h b/driver/vidc/inc/msm_vidc_inst.h index 5e4a7a5fa4..c49e3e000a 100644 --- a/driver/vidc/inc/msm_vidc_inst.h +++ b/driver/vidc/inc/msm_vidc_inst.h @@ -92,7 +92,7 @@ struct msm_vidc_inst { void *core; struct kref kref; u32 session_id; - u32 sid; + u8 debug_str[24]; void *packet; u32 packet_size; struct v4l2_format fmts[MAX_PORT]; diff --git a/driver/vidc/src/hfi_packet.c b/driver/vidc/src/hfi_packet.c index 63d48febdb..4048a9fe9f 100644 --- a/driver/vidc/src/hfi_packet.c +++ b/driver/vidc/src/hfi_packet.c @@ -167,7 +167,7 @@ u32 get_hfi_codec(struct msm_vidc_inst *inst) case MSM_VIDC_VP9: return HFI_CODEC_DECODE_VP9; default: - d_vpr_e("invalid codec %d, domain %d\n", + i_vpr_e(inst, "invalid codec %d, domain %d\n", inst->codec, inst->domain); return 0; } @@ -614,11 +614,11 @@ int hfi_packet_session_command(struct msm_vidc_inst *inst, if (rc) goto err_cmd; - d_vpr_h("Command packet 0x%x created\n", pkt_type); + i_vpr_h(inst, "Command packet 0x%x created\n", pkt_type); return rc; err_cmd: - d_vpr_e("%s: create packet failed\n", __func__); + i_vpr_e(inst, "%s: create packet failed\n", __func__); return rc; } diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 050557f8e9..7906586b07 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -66,6 +66,10 @@ static int msm_vdec_codec_change(struct msm_vidc_inst *inst, u32 v4l2_codec) __func__, inst->fmts[INPUT_PORT].fmt.pix_mp.pixelformat, v4l2_codec); inst->codec = v4l2_codec_to_driver(v4l2_codec, __func__); + rc = msm_vidc_update_debug_str(inst); + if (rc) + goto exit; + rc = msm_vidc_get_inst_capability(inst); if (rc) goto exit; @@ -1003,7 +1007,7 @@ static int msm_vdec_subscribe_input_port_settings_change(struct msm_vidc_inst *i return -EINVAL; } core = inst->core; - d_vpr_h("%s()\n", __func__); + i_vpr_h(inst, "%s()\n", __func__); payload[0] = HFI_MODE_PORT_SETTINGS_CHANGE; if (inst->codec == MSM_VIDC_H264) { @@ -1016,13 +1020,13 @@ static int msm_vdec_subscribe_input_port_settings_change(struct msm_vidc_inst *i subscribe_psc_size = ARRAY_SIZE(msm_vdec_subscribe_for_psc_vp9); psc = msm_vdec_subscribe_for_psc_vp9; } else { - d_vpr_e("%s: unsupported codec: %d\n", __func__, inst->codec); + i_vpr_e(inst, "%s: unsupported codec: %d\n", __func__, inst->codec); psc = NULL; return -EINVAL; } if (!psc || !subscribe_psc_size) { - d_vpr_e("%s: invalid params\n", __func__); + i_vpr_e(inst, "%s: invalid params\n", __func__); return -EINVAL; } @@ -1070,7 +1074,7 @@ static int msm_vdec_subscribe_input_port_settings_change(struct msm_vidc_inst *i rc = msm_vdec_set_tier(inst, port); break; default: - d_vpr_e("%s: unknown property %#x\n", __func__, + i_vpr_e(inst, "%s: unknown property %#x\n", __func__, psc[i]); rc = -EINVAL; break; @@ -1097,7 +1101,7 @@ static int msm_vdec_subscribe_property(struct msm_vidc_inst *inst, return -EINVAL; } core = inst->core; - d_vpr_h("%s()\n", __func__); + i_vpr_h(inst, "%s()\n", __func__); payload[0] = HFI_MODE_PROPERTY; for (i = 0; i < ARRAY_SIZE(msm_vdec_subscribe_for_properties); i++) @@ -1141,7 +1145,7 @@ static int msm_vdec_subscribe_metadata(struct msm_vidc_inst *inst, return -EINVAL; } core = inst->core; - d_vpr_h("%s()\n", __func__); + i_vpr_h(inst, "%s()\n", __func__); capability = inst->capabilities; payload[0] = HFI_MODE_METADATA; @@ -1183,7 +1187,7 @@ static int msm_vdec_set_delivery_mode_metadata(struct msm_vidc_inst *inst, return -EINVAL; } core = inst->core; - d_vpr_h("%s()\n", __func__); + i_vpr_h(inst, "%s()\n", __func__); capability = inst->capabilities; payload[0] = HFI_MODE_METADATA; @@ -1217,7 +1221,7 @@ static int msm_vdec_session_resume(struct msm_vidc_inst *inst, d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - d_vpr_h("%s()\n", __func__); + i_vpr_h(inst, "%s()\n", __func__); rc = venus_hfi_session_command(inst, HFI_CMD_RESUME, @@ -1491,7 +1495,11 @@ static int msm_vdec_subscribe_output_port_settings_change(struct msm_vidc_inst * u32 subscribe_psc_size = 0; u32 *psc = NULL; - d_vpr_h("%s()\n", __func__); + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + i_vpr_h(inst, "%s()\n", __func__); payload[0] = HFI_MODE_PORT_SETTINGS_CHANGE; if (inst->codec == MSM_VIDC_H264) { @@ -1504,13 +1512,13 @@ static int msm_vdec_subscribe_output_port_settings_change(struct msm_vidc_inst * subscribe_psc_size = ARRAY_SIZE(msm_vdec_subscribe_for_psc_vp9); psc = msm_vdec_subscribe_for_psc_vp9; } else { - d_vpr_e("%s: unsupported codec: %d\n", __func__, inst->codec); + i_vpr_e(inst, "%s: unsupported codec: %d\n", __func__, inst->codec); psc = NULL; return -EINVAL; } if (!psc || !subscribe_psc_size) { - d_vpr_e("%s: invalid params\n", __func__); + i_vpr_e(inst, "%s: invalid params\n", __func__); return -EINVAL; } @@ -1586,7 +1594,7 @@ static int msm_vdec_subscribe_output_port_settings_change(struct msm_vidc_inst * payload_type = HFI_PAYLOAD_U32; break; default: - d_vpr_e("%s: unknown property %#x\n", __func__, + i_vpr_e(inst, "%s: unknown property %#x\n", __func__, prop_type); prop_type = 0; rc = -EINVAL; @@ -1680,7 +1688,7 @@ static int msm_vdec_qbuf_batch(struct msm_vidc_inst *inst, d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - d_vpr_h("%s()\n", __func__); + i_vpr_h(inst, "%s()\n", __func__); return rc; } @@ -1745,7 +1753,7 @@ int msm_vdec_process_cmd(struct msm_vidc_inst *inst, u32 cmd) if (rc) return rc; } else { - d_vpr_e("%s: unknown cmd %d\n", __func__, cmd); + i_vpr_e(inst, "%s: unknown cmd %d\n", __func__, cmd); return -EINVAL; } diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index 2126e44e5e..8751f6dfc5 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -52,6 +52,10 @@ static int msm_venc_codec_change(struct msm_vidc_inst *inst, u32 v4l2_codec) __func__, inst->fmts[OUTPUT_PORT].fmt.pix_mp.pixelformat, v4l2_codec); inst->codec = v4l2_codec_to_driver(v4l2_codec, __func__); + rc = msm_vidc_update_debug_str(inst); + if (rc) + goto exit; + rc = msm_vidc_get_inst_capability(inst); if (rc) goto exit; @@ -476,7 +480,7 @@ static int msm_venc_set_input_properties(struct msm_vidc_inst *inst) rc = msm_venc_set_colorspace(inst, INPUT_PORT); break; default: - d_vpr_e("%s: unknown property %#x\n", __func__, + i_vpr_e(inst, "%s: unknown property %#x\n", __func__, msm_venc_input_set_prop[i]); rc = -EINVAL; break; @@ -517,7 +521,7 @@ static int msm_venc_set_output_properties(struct msm_vidc_inst *inst) rc = msm_venc_set_csc(inst, OUTPUT_PORT); break; default: - d_vpr_e("%s: unknown property %#x\n", __func__, + i_vpr_e(inst, "%s: unknown property %#x\n", __func__, msm_venc_output_set_prop[i]); rc = -EINVAL; break; @@ -997,7 +1001,7 @@ int msm_venc_process_cmd(struct msm_vidc_inst *inst, u32 cmd) if (rc) return rc; } else { - d_vpr_e("%s: unknown cmd %d\n", __func__, cmd); + i_vpr_e(inst, "%s: unknown cmd %d\n", __func__, cmd); return -EINVAL; } return 0; @@ -1712,13 +1716,13 @@ int msm_venc_inst_init(struct msm_vidc_inst *inst) struct msm_vidc_core *core; struct v4l2_format *f; - d_vpr_h("%s()\n", __func__); if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - core = inst->core; + i_vpr_h(inst, "%s()\n", __func__); + core = inst->core; f = &inst->fmts[OUTPUT_PORT]; f->type = OUTPUT_MPLANE; f->fmt.pix_mp.width = DEFAULT_WIDTH; diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index 4f5d9386dc..3faedae006 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -3,6 +3,8 @@ * Copyright (c) 2020, The Linux Foundation. All rights reserved. */ +#include +#include #include "msm_vidc.h" #include "msm_vidc_core.h" #include "msm_vidc_inst.h" @@ -710,14 +712,22 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) return NULL; } inst->core = core; + inst->domain = session_type; + inst->session_id = hash32_ptr(inst); + inst->state = MSM_VIDC_OPEN; + inst->active = true; + inst->request = false; + inst->ipsc_properties_set = false; + inst->opsc_properties_set = false; kref_init(&inst->kref); mutex_init(&inst->lock); + msm_vidc_update_debug_str(inst); i_vpr_h(inst, "Opening video instance: %d\n", session_type); inst->response_workq = create_singlethread_workqueue("response_workq"); if (!inst->response_workq) { - d_vpr_e("%s: create input_psc_workq failed\n", __func__); + i_vpr_e(inst, "%s: create input_psc_workq failed\n", __func__); goto error; } @@ -767,12 +777,6 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) INIT_LIST_HEAD(&inst->mappings.vpss.list); INIT_LIST_HEAD(&inst->children.list); INIT_LIST_HEAD(&inst->firmware.list); - inst->domain = session_type; - inst->state = MSM_VIDC_OPEN; - inst->active = true; - inst->request = false; - inst->ipsc_properties_set = false; - inst->opsc_properties_set = false; for (i = 0; i < MAX_SIGNAL; i++) init_completion(&inst->completions[i]); @@ -793,7 +797,7 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) rc = msm_vidc_add_session(inst); if (rc) { - d_vpr_e("%s: failed to get session id\n", __func__); + i_vpr_e(inst, "%s: failed to get session id\n", __func__); goto error; } msm_vidc_scale_power(inst, true); diff --git a/driver/vidc/src/msm_vidc_buffer.c b/driver/vidc/src/msm_vidc_buffer.c index 71804b7eae..df1212c856 100644 --- a/driver/vidc/src/msm_vidc_buffer.c +++ b/driver/vidc/src/msm_vidc_buffer.c @@ -186,7 +186,7 @@ u32 msm_vidc_internal_buffer_count(struct msm_vidc_inst *inst, else count = 0; } else { - d_vpr_e("%s: unsupported buffer type %#x\n", + i_vpr_e(inst, "%s: unsupported buffer type %#x\n", __func__, buffer_type); count = 0; } diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 60d990a06e..8940c489cd 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -1143,13 +1143,13 @@ int msm_vidc_adjust_v4l2_properties(struct msm_vidc_inst *inst) struct msm_vidc_inst_cap_entry *curr_node = NULL, *tmp_node = NULL; struct msm_vidc_inst_capability *capability; - d_vpr_h("%s()\n", __func__); if (!inst || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } capability = inst->capabilities; + i_vpr_h(inst, "%s()\n", __func__); for (i = 0; i < INST_CAP_MAX; i++) { if (capability->cap[i].flags & CAP_FLAG_ROOT) { rc = msm_vidc_adjust_property(inst, @@ -1719,11 +1719,11 @@ int msm_vidc_set_v4l2_properties(struct msm_vidc_inst *inst) struct msm_vidc_inst_capability *capability; struct msm_vidc_inst_cap_entry *curr_node = NULL, *tmp_node = NULL; - d_vpr_h("%s()\n", __func__); if (!inst || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } + i_vpr_h(inst, "%s()\n", __func__); capability = inst->capabilities; list_for_each_entry_safe(curr_node, tmp_node, diff --git a/driver/vidc/src/msm_vidc_debug.c b/driver/vidc/src/msm_vidc_debug.c index 70b6c7bb8b..8ba9762481 100644 --- a/driver/vidc/src/msm_vidc_debug.c +++ b/driver/vidc/src/msm_vidc_debug.c @@ -25,61 +25,6 @@ EXPORT_SYMBOL(msm_vidc_syscache_disable); int msm_vidc_clock_voting = !1; -const char *level_str(u32 level) -{ - if (level & VIDC_ERR) - return "err "; - else if (level & VIDC_HIGH) - return "high"; - else if (level & VIDC_LOW) - return "low "; - else if (level & VIDC_PERF) - return "perf"; - else if (level & VIDC_PKT) - return "pkt "; - else if (level & VIDC_BUS) - return "bus "; - else - return "????"; -} - -const char *codec_str(void *instance) -{ - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - goto err_invalid_inst; - } - - if (inst->codec == MSM_VIDC_H264) - return "h264 "; - else if (inst->codec == MSM_VIDC_HEVC) - return "hevc "; - else if (inst->codec == MSM_VIDC_VP9) - return "vp9 "; - else - return "?????"; - -err_invalid_inst: - return "null "; -} - -u32 get_sid(void *instance) -{ - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - goto err_invalid_inst; - } - - return inst->sid; - -err_invalid_inst: - return 0; -} - #define MAX_DBG_BUF_SIZE 4096 struct core_inst_pair { @@ -442,7 +387,7 @@ struct dentry *msm_vidc_debugfs_init_inst(void *instance, struct dentry *parent) d_vpr_e("%s: invalid params\n", __func__); goto exit; } - snprintf(debugfs_name, MAX_DEBUGFS_NAME, "inst_%d", inst->sid); + snprintf(debugfs_name, MAX_DEBUGFS_NAME, "inst_%d", inst->session_id); idata = kzalloc(sizeof(struct core_inst_pair), GFP_KERNEL); if (!idata) { diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 3d17836646..4d830ac985 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -5,7 +5,6 @@ #include #include -#include #include #include "msm_media_info.h" @@ -34,14 +33,14 @@ struct msm_vidc_buf_details { char *name; }; -void print_vidc_buffer(u32 tag, const char *str, struct msm_vidc_inst *inst, +void print_vidc_buffer(u32 tag, const char *tag_str, const char *str, struct msm_vidc_inst *inst, struct msm_vidc_buffer *vbuf) { - if (!(tag & msm_vidc_debug) || !inst || !vbuf) + if (!(tag & msm_vidc_debug) || !inst || !vbuf || !tag_str || !str) return; if (vbuf->type == MSM_VIDC_BUF_INPUT || vbuf->type == MSM_VIDC_BUF_OUTPUT) { - dprintk(tag, inst->sid, + dprintk_inst(tag, tag_str, inst, "%s: %s: idx %2d fd %3d off %d daddr %#llx size %d filled %d flags %#x ts %lld attr %#x\n", str, vbuf->type == MSM_VIDC_BUF_INPUT ? "INPUT" : "OUTPUT", vbuf->index, vbuf->fd, vbuf->data_offset, @@ -49,7 +48,7 @@ void print_vidc_buffer(u32 tag, const char *str, struct msm_vidc_inst *inst, vbuf->flags, vbuf->timestamp, vbuf->attr); } else if (vbuf->type == MSM_VIDC_BUF_INPUT_META || vbuf->type == MSM_VIDC_BUF_OUTPUT_META) { - dprintk(tag, inst->sid, + dprintk_inst(tag, tag_str, inst, "%s: %s: idx %2d fd %3d off %d daddr %#llx size %d filled %d flags %#x ts %lld attr %#x\n", str, vbuf->type == MSM_VIDC_BUF_INPUT_META ? "INPUT_META" : "OUTPUT_META", vbuf->index, vbuf->fd, vbuf->data_offset, @@ -1205,13 +1204,13 @@ int msm_vidc_unmap_driver_buf(struct msm_vidc_inst *inst, } } if (!found) { - print_vidc_buffer(VIDC_ERR, "no buf in mappings", inst, buf); + print_vidc_buffer(VIDC_ERR, "err ", "no buf in mappings", inst, buf); return -EINVAL; } rc = msm_vidc_memory_unmap(inst->core, map); if (rc) { - print_vidc_buffer(VIDC_ERR, "unmap failed", inst, buf); + print_vidc_buffer(VIDC_ERR, "err ", "unmap failed", inst, buf); return -EINVAL; } @@ -1340,14 +1339,14 @@ struct msm_vidc_buffer *msm_vidc_get_driver_buf(struct msm_vidc_inst *inst, /* only YUV buffers are allowed to repeat */ if ((is_decode_session(inst) && vb2->type != OUTPUT_MPLANE) || (is_encode_session(inst) && vb2->type != INPUT_MPLANE)) { - print_vidc_buffer(VIDC_ERR, + print_vidc_buffer(VIDC_ERR, "err ", "existing buffer", inst, buf); goto error; } /* for decoder, YUV with RO flag are allowed to repeat */ if (is_decode_session(inst) && !(buf->attr & MSM_VIDC_ATTR_READ_ONLY)) { - print_vidc_buffer(VIDC_ERR, + print_vidc_buffer(VIDC_ERR, "err ", "existing buffer without RO flag", inst, buf); goto error; } @@ -1455,7 +1454,8 @@ int msm_vidc_queue_buffer(struct msm_vidc_inst *inst, struct vb2_buffer *vb2) if (buf->type == MSM_VIDC_BUF_INPUT_META || buf->type == MSM_VIDC_BUF_OUTPUT_META) { buf->attr |= MSM_VIDC_ATTR_DEFERRED; - print_vidc_buffer(VIDC_HIGH, "qbuf deferred", inst, buf); + i_vpr_h(inst, "%s: %s_META qbuf deferred\n", __func__, + buf->type == MSM_VIDC_BUF_INPUT_META ? "INPUT" : "OUTPUT"); return 0; } @@ -1465,7 +1465,7 @@ int msm_vidc_queue_buffer(struct msm_vidc_inst *inst, struct vb2_buffer *vb2) return -EINVAL; if (!inst->vb2q[port].streaming) { buf->attr |= MSM_VIDC_ATTR_DEFERRED; - print_vidc_buffer(VIDC_HIGH, "qbuf deferred", inst, buf); + print_vidc_buffer(VIDC_HIGH, "high", "qbuf deferred", inst, buf); return 0; } @@ -1480,15 +1480,16 @@ int msm_vidc_queue_buffer(struct msm_vidc_inst *inst, struct vb2_buffer *vb2) msm_vidc_scale_power(inst, true); } - print_vidc_buffer(VIDC_HIGH, "qbuf", inst, buf); + print_vidc_buffer(VIDC_HIGH, "high", "qbuf", inst, buf); meta = get_meta_buffer(inst, buf); - if (!meta) { - if (is_meta_enabled(inst, buf->type)) { - print_vidc_buffer(VIDC_ERR, "missing meta for", - inst, buf); - return -EINVAL; - } + if (meta) + print_vidc_buffer(VIDC_HIGH, "high", "qbuf", inst, meta); + + if (!meta && is_meta_enabled(inst, buf->type)) { + print_vidc_buffer(VIDC_ERR, "err ", "missing meta for", inst, buf); + return -EINVAL; } + if (msm_vidc_is_super_buffer(inst) && is_input_buffer(buf->type)) rc = venus_hfi_queue_super_buffer(inst, buf, meta); else @@ -1898,7 +1899,7 @@ int msm_vidc_vb2_buffer_done(struct msm_vidc_inst *inst, } } if (!found) { - print_vidc_buffer(VIDC_ERR, "vb2 not found for", inst, buf); + print_vidc_buffer(VIDC_ERR, "err ", "vb2 not found for", inst, buf); return -EINVAL; } vbuf = to_vb2_v4l2_buffer(vb2); @@ -2061,16 +2062,12 @@ int msm_vidc_add_session(struct msm_vidc_inst *inst) if (count < 0xffffff /*TODO: MAX_SUPPORTED_INSTANCES*/) { list_add_tail(&inst->list, &core->instances); } else { - d_vpr_e("%s: total sessions %d exceeded max limit %d\n", + i_vpr_e(inst, "%s: total sessions %d exceeded max limit %d\n", __func__, count, MAX_SUPPORTED_INSTANCES); rc = -EINVAL; } core_unlock(core, __func__); - /* assign session_id */ - inst->session_id = hash32_ptr(inst); - inst->sid = inst->session_id; - return rc; } @@ -2090,14 +2087,13 @@ int msm_vidc_remove_session(struct msm_vidc_inst *inst) list_for_each_entry_safe(i, temp, &core->instances, list) { if (i->session_id == inst->session_id) { list_del_init(&i->list); - d_vpr_h("%s: removed session %#x\n", + i_vpr_h(inst, "%s: removed session %#x\n", __func__, i->session_id); - inst->sid = 0; } } list_for_each_entry(i, &core->instances, list) count++; - d_vpr_h("%s: remaining sessions %d\n", __func__, count); + i_vpr_h(inst, "%s: remaining sessions %d\n", __func__, count); core_unlock(core, __func__); return 0; @@ -2325,7 +2321,6 @@ int msm_vidc_get_inst_capability(struct msm_vidc_inst *inst) int i; struct msm_vidc_core *core; - d_vpr_h("%s()\n", __func__); if (!inst || !inst->core || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; @@ -2556,7 +2551,7 @@ int msm_vidc_core_deinit(struct msm_vidc_core *core, bool force) } core_lock(core, __func__); - d_vpr_h("%s()\n", __func__); + d_vpr_h("%s(): force %u\n", __func__, force); if (core->state == MSM_VIDC_CORE_DEINIT) goto unlock; @@ -2743,7 +2738,7 @@ int msm_vidc_smmu_fault_handler(struct iommu_domain *domain, if (core->smmu_fault_handled) { if (core->capabilities[NON_FATAL_FAULTS].value) { - dprintk_ratelimit(VIDC_ERR, + dprintk_ratelimit(VIDC_ERR, "err ", "%s: non-fatal pagefault address: %lx\n", __func__, iova); return 0; @@ -2837,7 +2832,7 @@ int msm_vidc_flush_buffers(struct msm_vidc_inst* inst, list_for_each_entry_safe(buf, dummy, &buffers->list, list) { if (buf->attr & MSM_VIDC_ATTR_QUEUED || buf->attr & MSM_VIDC_ATTR_DEFERRED) { - print_vidc_buffer(VIDC_ERR, "flushing buffer", inst, buf); + print_vidc_buffer(VIDC_ERR, "err ", "flushing buffer", inst, buf); msm_vidc_vb2_buffer_done(inst, buf); msm_vidc_put_driver_buf(inst, buf); } @@ -3063,3 +3058,43 @@ void msm_vidc_schedule_core_deinit(struct msm_vidc_core *core) return; } +static const char *get_codec_str(enum msm_vidc_codec_type type) +{ + switch (type) { + case MSM_VIDC_H264: return "h264"; + case MSM_VIDC_HEVC: return "h265"; + case MSM_VIDC_VP9: return " vp9"; + } + + return "...."; +} + +static const char *get_domain_str(enum msm_vidc_domain_type type) +{ + switch (type) { + case MSM_VIDC_ENCODER: return "e"; + case MSM_VIDC_DECODER: return "d"; + } + + return "."; +} + +int msm_vidc_update_debug_str(struct msm_vidc_inst *inst) +{ + u32 sid; + const char *codec; + const char *domain; + + if (!inst) { + d_vpr_e("%s: Invalid params\n", __func__); + return -EINVAL; + } + sid = inst->session_id; + codec = get_codec_str(inst->codec); + domain = get_domain_str(inst->domain); + snprintf(inst->debug_str, sizeof(inst->debug_str), "%08x: %s%s", sid, codec, domain); + d_vpr_h("%s: sid: %08x, codec: %s, domain: %s, final: %s\n", + __func__, sid, codec, domain, inst->debug_str); + + return 0; +} diff --git a/driver/vidc/src/msm_vidc_power.c b/driver/vidc/src/msm_vidc_power.c index 4f612ad922..1a892b0963 100644 --- a/driver/vidc/src/msm_vidc_power.c +++ b/driver/vidc/src/msm_vidc_power.c @@ -221,7 +221,7 @@ int msm_vidc_scale_buses(struct msm_vidc_inst *inst) } core = inst->core; if (!core->dt) { - d_vpr_e("%s: invalid dt params\n", __func__); + i_vpr_e(inst, "%s: invalid dt params\n", __func__); return -EINVAL; } vote_data = &inst->bus_data; @@ -401,7 +401,7 @@ int msm_vidc_set_clocks(struct msm_vidc_inst* inst) } core->power.clk_freq = (u32)rate; - d_vpr_p("%s: clock rate %lu requested %lu increment %d decrement %d\n", + i_vpr_p(inst, "%s: clock rate %lu requested %lu increment %d decrement %d\n", __func__, rate, freq, increment, decrement); mutex_unlock(&core->lock); diff --git a/driver/vidc/src/msm_vidc_vb2.c b/driver/vidc/src/msm_vidc_vb2.c index e1d26cea44..a0db3a27b2 100644 --- a/driver/vidc/src/msm_vidc_vb2.c +++ b/driver/vidc/src/msm_vidc_vb2.c @@ -87,7 +87,7 @@ int msm_vidc_queue_setup(struct vb2_queue *q, } if (inst->state == MSM_VIDC_START) { - d_vpr_e("%s: invalid state %d\n", __func__, inst->state); + i_vpr_e(inst, "%s: invalid state %d\n", __func__, inst->state); return -EINVAL; } diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index 8b1f6d7b34..b842e84da5 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -138,22 +138,40 @@ void __dump(struct dump dump[], int len) } } -static void __dump_packet(u8 *packet) +static void __dump_packet(u8 *packet, const char *function, void *qinfo) { - u32 c = 0, packet_size = *(u32 *)packet; + u32 c = 0, session_id, packet_size = *(u32 *)packet; const int row_size = 32; + struct msm_vidc_inst *inst = NULL; + bool matches = false; /* * row must contain enough for 0xdeadbaad * 8 to be converted into * "de ad ba ab " * 8 + '\0' */ char row[3 * 32]; + session_id = *((u32 *)packet + 1); + list_for_each_entry(inst, &g_core->instances, list) { + if (inst->session_id == session_id) { + matches = true; + break; + } + } + + if (matches) + i_vpr_t(inst, "%s: %pK\n", function, qinfo); + else + d_vpr_t("%s: %pK\n", function, qinfo); + for (c = 0; c * row_size < packet_size; ++c) { int bytes_to_read = ((c + 1) * row_size > packet_size) ? packet_size % row_size : row_size; hex_dump_to_buffer(packet + c * row_size, bytes_to_read, row_size, 4, row, sizeof(row), false); - d_vpr_t("%s\n", row); + if (matches) + i_vpr_t(inst, "%s\n", row); + else + d_vpr_t("%s\n", row); } } @@ -185,7 +203,7 @@ static bool __valdiate_session(struct msm_vidc_core *core, bool valid = false; struct msm_vidc_inst *temp; - if (!core) + if (!core || !inst) return false; __strict_check(core); @@ -461,11 +479,11 @@ static int __vote_bandwidth(struct bus_info *bus, { int rc = 0; - d_vpr_p("Voting bus %s to ab %llu kbps\n", bus->name, bw_kbps); + d_vpr_p("Voting bus %s to ab %llu kbps\n", bus->name, kbps_to_icc(bw_kbps)); rc = icc_set_bw(bus->path, kbps_to_icc(bw_kbps), 0); if (rc) d_vpr_e("Failed voting bus %s to ab %llu, rc=%d\n", - bus->name, bw_kbps, rc); + bus->name, kbps_to_icc(bw_kbps), rc); return rc; } @@ -560,6 +578,7 @@ static int __set_clk_rate(struct msm_vidc_core *core, if (rate == cl->prev) return 0; + d_vpr_p("Scaling clock %s to %llu, prev %llu\n", cl->name, rate, cl->prev); rc = clk_set_rate(clk, rate); if (rc) { d_vpr_e("%s: Failed to set clock rate %llu %s: %d\n", @@ -577,8 +596,6 @@ static int __set_clocks(struct msm_vidc_core *core, u32 freq) venus_hfi_for_each_clock(core, cl) { if (cl->has_scaling) {/* has_scaling */ - d_vpr_h("Scaling clock %s to %u, prev %llu\n", - cl->name, freq, cl->prev); rc = __set_clk_rate(core, cl, freq); if (rc) return rc; @@ -629,10 +646,9 @@ static int __write_queue(struct msm_vidc_iface_q_info *qinfo, u8 *packet, return -ENOENT; } - if (msm_vidc_debug & VIDC_PKT) { - d_vpr_t("%s: %pK\n", __func__, qinfo); - __dump_packet(packet); - } + if (msm_vidc_debug & VIDC_PKT) + __dump_packet(packet, __func__, qinfo); + // TODO: handle writing packet //d_vpr_e("skip writing packet\n"); @@ -706,7 +722,6 @@ static int __read_queue(struct msm_vidc_iface_q_info *qinfo, u8 *packet, u32 receive_request = 0; u32 read_idx, write_idx; int rc = 0; - u32 sid; if (!qinfo || !packet || !pb_tx_req_is_set) { d_vpr_e("%s: invalid params %pK %pK %pK\n", @@ -813,9 +828,7 @@ static int __read_queue(struct msm_vidc_iface_q_info *qinfo, u8 *packet, if ((msm_vidc_debug & VIDC_PKT) && !(queue->qhdr_type & HFI_Q_ID_CTRL_TO_HOST_DEBUG_Q)) { - sid = *((u32 *)packet + 2); - d_vpr_t("%s: %pK\n", __func__, qinfo); - __dump_packet(packet); + __dump_packet(packet, __func__, qinfo); } return rc; @@ -2530,8 +2543,6 @@ irqreturn_t venus_hfi_isr(int irq, void *data) { struct msm_vidc_core *core = data; - d_vpr_l("%s()\n", __func__); - disable_irq_nosync(irq); queue_work(core->device_workq, &core->device_work); @@ -2543,6 +2554,7 @@ void venus_hfi_work_handler(struct work_struct *work) struct msm_vidc_core *core; int num_responses = 0; + d_vpr_l("%s()\n", __func__); core = container_of(work, struct msm_vidc_core, device_work); if (!core) { d_vpr_e("%s: invalid params\n", __func__); diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index 55786c24b2..a5d2a15552 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -19,13 +19,13 @@ struct msm_vidc_hfi_range { int (*handle)(struct msm_vidc_inst *inst, struct hfi_packet *pkt); }; -void print_psc_properties(u32 tag, const char *str, struct msm_vidc_inst *inst, +void print_psc_properties(const char *str, struct msm_vidc_inst *inst, struct msm_vidc_subscription_params subsc_params) { - if (!(tag & msm_vidc_debug) || !inst) + if (!inst || !str) return; - dprintk(tag, inst->sid, + i_vpr_h(inst, "%s: resolution %#x, crop offsets[0] %#x, crop offsets[1] %#x, bit depth %d, coded frames %d " "fw min count %d, poc %d, color info %d, profile %d, level %d, tier %d ", str, subsc_params.bitstream_resolution, @@ -483,7 +483,7 @@ static int handle_input_buffer(struct msm_vidc_inst *inst, buf->flags = 0; buf->flags = get_driver_buffer_flags(inst, buffer->flags); - print_vidc_buffer(VIDC_HIGH, "EBD", inst, buf); + print_vidc_buffer(VIDC_HIGH, "high", "dqbuf", inst, buf); msm_vidc_debugfs_update(inst, MSM_VIDC_DEBUGFS_EVENT_EBD); return rc; @@ -554,7 +554,7 @@ static int handle_output_buffer(struct msm_vidc_inst *inst, buf->flags = 0; buf->flags = get_driver_buffer_flags(inst, buffer->flags); - print_vidc_buffer(VIDC_HIGH, "FBD", inst, buf); + print_vidc_buffer(VIDC_HIGH, "high", "dqbuf", inst, buf); msm_vidc_debugfs_update(inst, MSM_VIDC_DEBUGFS_EVENT_FBD); return rc; @@ -607,7 +607,7 @@ static int handle_input_metadata_buffer(struct msm_vidc_inst *inst, if (buffer->flags & HFI_BUF_FW_FLAG_LAST) buf->flags |= MSM_VIDC_BUF_FLAG_LAST; - print_vidc_buffer(VIDC_HIGH, "EBD META", inst, buf); + print_vidc_buffer(VIDC_HIGH, "high", "dqbuf", inst, buf); return rc; } @@ -643,7 +643,7 @@ static int handle_output_metadata_buffer(struct msm_vidc_inst *inst, if (buffer->flags & HFI_BUF_FW_FLAG_LAST) buf->flags |= MSM_VIDC_BUF_FLAG_LAST; - print_vidc_buffer(VIDC_HIGH, "FBD META", inst, buf); + print_vidc_buffer(VIDC_HIGH, "high", "dqbuf", inst, buf); return rc; } @@ -675,7 +675,8 @@ static int handle_dequeue_buffers(struct msm_vidc_inst* inst) */ if ((buf->attr & MSM_VIDC_ATTR_BUFFER_DONE) && buf->attr & MSM_VIDC_ATTR_READ_ONLY){ - print_vidc_buffer(VIDC_HIGH, "vb2 done already", inst, buf); + print_vidc_buffer(VIDC_HIGH, "high", + "vb2 done already", inst, buf); } else { buf->attr |= MSM_VIDC_ATTR_BUFFER_DONE; msm_vidc_vb2_buffer_done(inst, buf); @@ -1004,12 +1005,10 @@ static int handle_port_settings_change(struct msm_vidc_inst *inst, __func__, pkt->port); if (pkt->port == HFI_PORT_RAW) { - print_psc_properties(VIDC_HIGH, "OUTPUT_PSC", inst, - inst->subcr_params[OUTPUT_PORT]); + print_psc_properties("OUTPUT_PSC", inst, inst->subcr_params[OUTPUT_PORT]); rc = msm_vdec_output_port_settings_change(inst); } else if (pkt->port == HFI_PORT_BITSTREAM) { - print_psc_properties(VIDC_HIGH, "INPUT_PSC", inst, - inst->subcr_params[INPUT_PORT]); + print_psc_properties("INPUT_PSC", inst, inst->subcr_params[INPUT_PORT]); rc = msm_vdec_input_port_settings_change(inst); } else { i_vpr_e(inst, "%s: invalid port type: %#x\n", @@ -1283,7 +1282,7 @@ int handle_session_response_work(struct msm_vidc_inst *inst, hdr = (struct hfi_header *)resp_work->data; if (!hdr) { - d_vpr_e("%s: invalid params\n", __func__); + i_vpr_e(inst, "%s: invalid params\n", __func__); return -EINVAL; } @@ -1392,7 +1391,7 @@ void handle_session_response_work_handler(struct work_struct *work) } break; default: - d_vpr_e("%s: invalid response work type %d\n", __func__, + i_vpr_e(inst, "%s: invalid response work type %d\n", __func__, resp_work->type); break; } From a774cd62bbcc1c29205d3c65dcc2532581f77b02 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Fri, 26 Feb 2021 10:51:58 -0800 Subject: [PATCH 0148/1061] video: driver: Resolve empty brace compilation issue for VS Empty braces caused compilation issue on VS. Resolved the same to now compile complete driver code on VS with no additional change requirements. Change-Id: Ib63aad3d104362c17c952780f40cd6e381902343 Signed-off-by: Akshata Sahukar --- driver/vidc/inc/msm_vidc_debug.h | 4 ++++ driver/vidc/src/msm_vidc_probe.c | 2 +- 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/driver/vidc/inc/msm_vidc_debug.h b/driver/vidc/inc/msm_vidc_debug.h index d947bca160..ba339e9d41 100644 --- a/driver/vidc/inc/msm_vidc_debug.h +++ b/driver/vidc/inc/msm_vidc_debug.h @@ -23,6 +23,10 @@ #define FW_DBG_TAG VIDC_DBG_LABEL ": %6s: " #define DEFAULT_SID ((u32)-1) +#ifndef MSM_VIDC_EMPTY_BRACE +#define MSM_VIDC_EMPTY_BRACE {}, +#endif + extern int msm_vidc_debug; extern bool msm_vidc_lossless_encode; extern bool msm_vidc_syscache_disable; diff --git a/driver/vidc/src/msm_vidc_probe.c b/driver/vidc/src/msm_vidc_probe.c index 13ed986d14..e801a070d7 100644 --- a/driver/vidc/src/msm_vidc_probe.c +++ b/driver/vidc/src/msm_vidc_probe.c @@ -93,7 +93,7 @@ static struct attribute_group msm_vidc_core_attr_group = { static const struct of_device_id msm_vidc_dt_match[] = { {.compatible = "qcom,msm-vidc"}, {.compatible = "qcom,msm-vidc,context-bank"}, - {}, + MSM_VIDC_EMPTY_BRACE }; MODULE_DEVICE_TABLE(of, msm_vidc_dt_match); From 20d30c5dd22993a45e32ef04826763e9545a6d77 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Mon, 22 Feb 2021 11:54:19 -0800 Subject: [PATCH 0149/1061] video: driver: amend colorspace info setting v4l2 enums for color space info are not one to one mappings with hevc spec values. Hence, introduce and use corresponding mapper functions. Change-Id: I37a79a9b34b66184ece9a284ae98c9fa4efd248f Signed-off-by: Akshata Sahukar --- driver/vidc/inc/msm_vidc_driver.h | 12 + driver/vidc/inc/msm_vidc_internal.h | 55 ++++ driver/vidc/src/msm_vdec.c | 28 +- driver/vidc/src/msm_venc.c | 22 +- driver/vidc/src/msm_vidc_driver.c | 291 ++++++++++++++++++ .../uapi/vidc/media/v4l2_vidc_extensions.h | 20 ++ 6 files changed, 407 insertions(+), 21 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 5d6c76ed2b..61a43694a6 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -195,6 +195,18 @@ enum msm_vidc_colorformat_type v4l2_colorformat_to_driver(u32 colorformat, const char *func); u32 v4l2_colorformat_from_driver(enum msm_vidc_colorformat_type colorformat, const char *func); +u32 v4l2_color_primaries_to_driver(struct msm_vidc_inst *inst, + u32 v4l2_primaries); +u32 v4l2_color_primaries_from_driver(struct msm_vidc_inst *inst, + u32 vidc_color_primaries); +u32 v4l2_transfer_char_to_driver(struct msm_vidc_inst *inst, + u32 v4l2_transfer_char); +u32 v4l2_transfer_char_from_driver(struct msm_vidc_inst *inst, + u32 vidc_transfer_char); +u32 v4l2_matrix_coeff_to_driver(struct msm_vidc_inst *inst, + u32 v4l2_matrix_coeff); +u32 v4l2_matrix_coeff_from_driver(struct msm_vidc_inst *inst, + u32 vidc_matrix_coeff); int v4l2_type_to_driver_port(struct msm_vidc_inst *inst, u32 type, const char *func); const char *state_name(enum msm_vidc_inst_state state); diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index fba7c795a2..f032f037c4 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -198,6 +198,61 @@ enum msm_vidc_quality_mode { MSM_VIDC_POWER_SAVE_MODE = 0x2, }; +enum msm_vidc_color_primaries { + MSM_VIDC_PRIMARIES_RESERVED = 0, + MSM_VIDC_PRIMARIES_BT709 = 1, + MSM_VIDC_PRIMARIES_UNSPECIFIED = 2, + MSM_VIDC_PRIMARIES_BT470_SYSTEM_M = 4, + MSM_VIDC_PRIMARIES_BT470_SYSTEM_BG = 5, + MSM_VIDC_PRIMARIES_BT601_525 = 6, + MSM_VIDC_PRIMARIES_SMPTE_ST240M = 7, + MSM_VIDC_PRIMARIES_GENERIC_FILM = 8, + MSM_VIDC_PRIMARIES_BT2020 = 9, + MSM_VIDC_PRIMARIES_SMPTE_ST428_1 = 10, + MSM_VIDC_PRIMARIES_SMPTE_RP431_2 = 11, + MSM_VIDC_PRIMARIES_SMPTE_EG431_1 = 12, + MSM_VIDC_PRIMARIES_SMPTE_EBU_TECH = 22, +}; + +enum msm_vidc_transfer_characteristics { + MSM_VIDC_TRANSFER_RESERVED = 0, + MSM_VIDC_TRANSFER_BT709 = 1, + MSM_VIDC_TRANSFER_UNSPECIFIED = 2, + MSM_VIDC_TRANSFER_BT470_SYSTEM_M = 4, + MSM_VIDC_TRANSFER_BT470_SYSTEM_BG = 5, + MSM_VIDC_TRANSFER_BT601_525_OR_625 = 6, + MSM_VIDC_TRANSFER_SMPTE_ST240M = 7, + MSM_VIDC_TRANSFER_LINEAR = 8, + MSM_VIDC_TRANSFER_LOG_100_1 = 9, + MSM_VIDC_TRANSFER_LOG_SQRT = 10, + MSM_VIDC_TRANSFER_XVYCC = 11, + MSM_VIDC_TRANSFER_BT1361_0 = 12, + MSM_VIDC_TRANSFER_SRGB_SYCC = 13, + MSM_VIDC_TRANSFER_BT2020_14 = 14, + MSM_VIDC_TRANSFER_BT2020_15 = 15, + MSM_VIDC_TRANSFER_SMPTE_ST2084_PQ = 16, + MSM_VIDC_TRANSFER_SMPTE_ST428_1 = 17, + MSM_VIDC_TRANSFER_BT2100_2_HLG = 18, +}; + +enum msm_vidc_matrix_coefficients { + MSM_VIDC_MATRIX_COEFF_SRGB_SMPTE_ST428_1 = 0, + MSM_VIDC_MATRIX_COEFF_BT709 = 1, + MSM_VIDC_MATRIX_COEFF_UNSPECIFIED = 2, + MSM_VIDC_MATRIX_COEFF_RESERVED = 3, + MSM_VIDC_MATRIX_COEFF_FCC_TITLE_47 = 4, + MSM_VIDC_MATRIX_COEFF_BT470_SYS_BG_OR_BT601_625 = 5, + MSM_VIDC_MATRIX_COEFF_BT601_525_BT1358_525_OR_625 = 6, + MSM_VIDC_MATRIX_COEFF_SMPTE_ST240 = 7, + MSM_VIDC_MATRIX_COEFF_YCGCO = 8, + MSM_VIDC_MATRIX_COEFF_BT2020_NON_CONSTANT = 9, + MSM_VIDC_MATRIX_COEFF_BT2020_CONSTANT = 10, + MSM_VIDC_MATRIX_COEFF_SMPTE_ST2085 = 11, + MSM_VIDC_MATRIX_COEFF_SMPTE_CHROM_DERV_NON_CONSTANT = 12, + MSM_VIDC_MATRIX_COEFF_SMPTE_CHROM_DERV_CONSTANT = 13, + MSM_VIDC_MATRIX_COEFF_BT2100 = 14, +}; + enum msm_vidc_core_capability_type { CORE_CAP_NONE = 0, ENC_CODECS, diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 7906586b07..1d2471cdca 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -334,8 +334,10 @@ static int msm_vdec_set_colorspace(struct msm_vidc_inst *inst, enum msm_vidc_port_type port) { int rc = 0; - u32 primaries, matrix_coeff, transfer_char; - u32 full_range = 0; + u32 primaries = MSM_VIDC_PRIMARIES_RESERVED; + u32 matrix_coeff = MSM_VIDC_MATRIX_COEFF_RESERVED; + u32 transfer_char = MSM_VIDC_TRANSFER_RESERVED; + u32 full_range = V4L2_QUANTIZATION_DEFAULT; u32 colour_description_present_flag = 0; u32 video_signal_type_present_flag = 0, color_info = 0; /* Unspecified video format */ @@ -349,15 +351,17 @@ static int msm_vdec_set_colorspace(struct msm_vidc_inst *inst, if (inst->codec != MSM_VIDC_H264 && inst->codec != MSM_VIDC_HEVC) return 0; - primaries = inst->fmts[port].fmt.pix_mp.colorspace; - matrix_coeff = inst->fmts[port].fmt.pix_mp.ycbcr_enc; - transfer_char = inst->fmts[port].fmt.pix_mp.xfer_func; - - if (primaries != V4L2_COLORSPACE_DEFAULT || - transfer_char != V4L2_XFER_FUNC_DEFAULT || - matrix_coeff != V4L2_YCBCR_ENC_DEFAULT) { + if (inst->fmts[port].fmt.pix_mp.colorspace != V4L2_COLORSPACE_DEFAULT || + inst->fmts[port].fmt.pix_mp.ycbcr_enc != V4L2_XFER_FUNC_DEFAULT || + inst->fmts[port].fmt.pix_mp.xfer_func != V4L2_YCBCR_ENC_DEFAULT) { colour_description_present_flag = 1; video_signal_type_present_flag = 1; + primaries = v4l2_color_primaries_to_driver(inst, + inst->fmts[port].fmt.pix_mp.colorspace); + matrix_coeff = v4l2_matrix_coeff_to_driver(inst, + inst->fmts[port].fmt.pix_mp.ycbcr_enc); + transfer_char = v4l2_transfer_char_to_driver(inst, + inst->fmts[port].fmt.pix_mp.xfer_func); } if (inst->fmts[port].fmt.pix_mp.quantization != @@ -1291,11 +1295,11 @@ static int msm_vdec_update_properties(struct msm_vidc_inst *inst) V4L2_QUANTIZATION_LIM_RANGE; if (colour_description_present_flag) { inst->fmts[OUTPUT_PORT].fmt.pix_mp.colorspace = - primaries; + v4l2_color_primaries_from_driver(inst, primaries); inst->fmts[OUTPUT_PORT].fmt.pix_mp.xfer_func = - transfer_char; + v4l2_transfer_char_from_driver(inst, transfer_char); inst->fmts[OUTPUT_PORT].fmt.pix_mp.ycbcr_enc = - matrix_coeff; + v4l2_matrix_coeff_from_driver(inst, matrix_coeff); } else { i_vpr_h(inst, "%s: color description flag is not present\n", diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index 8751f6dfc5..758a3f45d7 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -272,8 +272,10 @@ static int msm_venc_set_colorspace(struct msm_vidc_inst* inst, enum msm_vidc_port_type port) { int rc = 0; - u32 primaries, matrix_coeff, transfer_char; - u32 full_range = 0; + u32 primaries = MSM_VIDC_PRIMARIES_RESERVED; + u32 matrix_coeff = MSM_VIDC_MATRIX_COEFF_RESERVED; + u32 transfer_char = MSM_VIDC_TRANSFER_RESERVED; + u32 full_range = V4L2_QUANTIZATION_DEFAULT; u32 colour_description_present_flag = 0; u32 video_signal_type_present_flag = 0, payload = 0; /* Unspecified video format */ @@ -284,15 +286,17 @@ static int msm_venc_set_colorspace(struct msm_vidc_inst* inst, return -EINVAL; } - primaries = inst->fmts[port].fmt.pix_mp.colorspace; - matrix_coeff = inst->fmts[port].fmt.pix_mp.ycbcr_enc; - transfer_char = inst->fmts[port].fmt.pix_mp.xfer_func; - - if (primaries != V4L2_COLORSPACE_DEFAULT || - transfer_char != V4L2_XFER_FUNC_DEFAULT || - matrix_coeff != V4L2_YCBCR_ENC_DEFAULT) { + if (inst->fmts[port].fmt.pix_mp.colorspace != V4L2_COLORSPACE_DEFAULT || + inst->fmts[port].fmt.pix_mp.ycbcr_enc != V4L2_XFER_FUNC_DEFAULT || + inst->fmts[port].fmt.pix_mp.xfer_func != V4L2_YCBCR_ENC_DEFAULT) { colour_description_present_flag = 1; video_signal_type_present_flag = 1; + primaries = v4l2_color_primaries_to_driver(inst, + inst->fmts[port].fmt.pix_mp.colorspace); + matrix_coeff = v4l2_matrix_coeff_to_driver(inst, + inst->fmts[port].fmt.pix_mp.ycbcr_enc); + transfer_char = v4l2_transfer_char_to_driver(inst, + inst->fmts[port].fmt.pix_mp.xfer_func); } if (inst->fmts[port].fmt.pix_mp.quantization != diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 4d830ac985..eaa56fe318 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -227,6 +227,297 @@ u32 v4l2_colorformat_from_driver(enum msm_vidc_colorformat_type colorformat, return v4l2_colorformat; } +u32 v4l2_color_primaries_to_driver(struct msm_vidc_inst *inst, + u32 v4l2_primaries) +{ + u32 vidc_color_primaries = MSM_VIDC_PRIMARIES_RESERVED; + + switch(v4l2_primaries) { + case V4L2_COLORSPACE_DEFAULT: + vidc_color_primaries = MSM_VIDC_PRIMARIES_RESERVED; + break; + case V4L2_COLORSPACE_REC709: + vidc_color_primaries = MSM_VIDC_PRIMARIES_BT709; + break; + case V4L2_COLORSPACE_470_SYSTEM_M: + vidc_color_primaries = MSM_VIDC_PRIMARIES_BT470_SYSTEM_M; + break; + case V4L2_COLORSPACE_470_SYSTEM_BG: + vidc_color_primaries = MSM_VIDC_PRIMARIES_BT470_SYSTEM_BG; + break; + case V4L2_COLORSPACE_SMPTE170M: + vidc_color_primaries = MSM_VIDC_PRIMARIES_BT601_525; + break; + case V4L2_COLORSPACE_SMPTE240M: + vidc_color_primaries = MSM_VIDC_PRIMARIES_SMPTE_ST240M; + break; + case V4L2_COLORSPACE_VIDC_GENERIC_FILM: + vidc_color_primaries = MSM_VIDC_PRIMARIES_GENERIC_FILM; + break; + case V4L2_COLORSPACE_BT2020: + vidc_color_primaries = MSM_VIDC_PRIMARIES_BT2020; + break; + case V4L2_COLORSPACE_DCI_P3: + vidc_color_primaries = MSM_VIDC_PRIMARIES_SMPTE_RP431_2; + break; + case V4L2_COLORSPACE_VIDC_EG431: + vidc_color_primaries = MSM_VIDC_PRIMARIES_SMPTE_EG431_1; + break; + case V4L2_COLORSPACE_VIDC_EBU_TECH: + vidc_color_primaries = MSM_VIDC_PRIMARIES_SMPTE_EBU_TECH; + break; + default: + i_vpr_e(inst, "%s: invalid color primaries %d\n", + __func__, v4l2_primaries); + break; + } + + return vidc_color_primaries; +} + +u32 v4l2_color_primaries_from_driver(struct msm_vidc_inst *inst, + u32 vidc_color_primaries) +{ + u32 v4l2_primaries = V4L2_COLORSPACE_DEFAULT; + + switch(vidc_color_primaries) { + case MSM_VIDC_PRIMARIES_UNSPECIFIED: + v4l2_primaries = V4L2_COLORSPACE_DEFAULT; + break; + case MSM_VIDC_PRIMARIES_BT709: + v4l2_primaries = V4L2_COLORSPACE_REC709; + break; + case MSM_VIDC_PRIMARIES_BT470_SYSTEM_M: + v4l2_primaries = V4L2_COLORSPACE_470_SYSTEM_M; + break; + case MSM_VIDC_PRIMARIES_BT470_SYSTEM_BG: + v4l2_primaries = V4L2_COLORSPACE_470_SYSTEM_BG; + break; + case MSM_VIDC_PRIMARIES_BT601_525: + v4l2_primaries = V4L2_COLORSPACE_SMPTE170M; + break; + case MSM_VIDC_PRIMARIES_SMPTE_ST240M: + v4l2_primaries = V4L2_COLORSPACE_SMPTE240M; + break; + case MSM_VIDC_PRIMARIES_GENERIC_FILM: + v4l2_primaries = V4L2_COLORSPACE_VIDC_GENERIC_FILM; + break; + case MSM_VIDC_PRIMARIES_BT2020: + v4l2_primaries = V4L2_COLORSPACE_BT2020; + break; + case MSM_VIDC_PRIMARIES_SMPTE_RP431_2: + v4l2_primaries = V4L2_COLORSPACE_DCI_P3; + break; + case MSM_VIDC_PRIMARIES_SMPTE_EG431_1: + v4l2_primaries = V4L2_COLORSPACE_VIDC_EG431; + break; + case MSM_VIDC_PRIMARIES_SMPTE_EBU_TECH: + v4l2_primaries = V4L2_COLORSPACE_VIDC_EBU_TECH; + break; + default: + i_vpr_e(inst, "%s: invalid hfi color primaries %d\n", + __func__, vidc_color_primaries); + v4l2_primaries = V4L2_COLORSPACE_DEFAULT; + break; + } + + return v4l2_primaries; +} + +u32 v4l2_transfer_char_to_driver(struct msm_vidc_inst *inst, + u32 v4l2_transfer_char) +{ + u32 vidc_transfer_char = MSM_VIDC_TRANSFER_RESERVED; + + switch(v4l2_transfer_char) { + case V4L2_XFER_FUNC_DEFAULT: + vidc_transfer_char = MSM_VIDC_TRANSFER_RESERVED; + break; + case V4L2_XFER_FUNC_709: + vidc_transfer_char = MSM_VIDC_TRANSFER_BT709; + break; + case V4L2_XFER_FUNC_VIDC_BT470_SYSTEM_M: + vidc_transfer_char = MSM_VIDC_TRANSFER_BT470_SYSTEM_M; + break; + case V4L2_XFER_FUNC_VIDC_BT470_SYSTEM_BG: + vidc_transfer_char = MSM_VIDC_TRANSFER_BT470_SYSTEM_BG; + break; + case V4L2_XFER_FUNC_VIDC_BT601_525_OR_625: + vidc_transfer_char = MSM_VIDC_TRANSFER_BT601_525_OR_625; + break; + case V4L2_XFER_FUNC_SMPTE240M: + vidc_transfer_char = MSM_VIDC_TRANSFER_SMPTE_ST240M; + break; + case V4L2_XFER_FUNC_VIDC_LINEAR: + vidc_transfer_char = MSM_VIDC_TRANSFER_LINEAR; + break; + case V4L2_XFER_FUNC_VIDC_XVYCC: + vidc_transfer_char = MSM_VIDC_TRANSFER_XVYCC; + break; + case V4L2_XFER_FUNC_VIDC_BT1361: + vidc_transfer_char = MSM_VIDC_TRANSFER_BT1361_0; + break; + case V4L2_XFER_FUNC_SRGB: + vidc_transfer_char = MSM_VIDC_TRANSFER_SRGB_SYCC; + break; + case V4L2_XFER_FUNC_VIDC_BT2020: + vidc_transfer_char = MSM_VIDC_TRANSFER_BT2020_14; + break; + case V4L2_XFER_FUNC_SMPTE2084: + vidc_transfer_char = MSM_VIDC_TRANSFER_SMPTE_ST2084_PQ; + break; + case V4L2_XFER_FUNC_VIDC_ST428: + vidc_transfer_char = MSM_VIDC_TRANSFER_SMPTE_ST428_1; + break; + case V4L2_XFER_FUNC_VIDC_HLG: + vidc_transfer_char = MSM_VIDC_TRANSFER_BT2100_2_HLG; + break; + default: + i_vpr_e(inst, "%s: invalid transfer char %d\n", + __func__, v4l2_transfer_char); + break; + } + + return vidc_transfer_char; +} + +u32 v4l2_transfer_char_from_driver(struct msm_vidc_inst *inst, + u32 vidc_transfer_char) +{ + u32 v4l2_transfer_char = V4L2_XFER_FUNC_DEFAULT; + + switch(vidc_transfer_char) { + case MSM_VIDC_TRANSFER_UNSPECIFIED: + v4l2_transfer_char = V4L2_XFER_FUNC_DEFAULT; + break; + case MSM_VIDC_TRANSFER_BT709: + v4l2_transfer_char = V4L2_XFER_FUNC_709; + break; + case MSM_VIDC_TRANSFER_BT470_SYSTEM_M: + v4l2_transfer_char = V4L2_XFER_FUNC_VIDC_BT470_SYSTEM_M; + break; + case MSM_VIDC_TRANSFER_BT470_SYSTEM_BG: + v4l2_transfer_char = V4L2_XFER_FUNC_VIDC_BT470_SYSTEM_BG; + break; + case MSM_VIDC_TRANSFER_BT601_525_OR_625: + v4l2_transfer_char = V4L2_XFER_FUNC_VIDC_BT601_525_OR_625; + break; + case MSM_VIDC_TRANSFER_SMPTE_ST240M: + v4l2_transfer_char = V4L2_XFER_FUNC_SMPTE240M; + break; + case MSM_VIDC_TRANSFER_LINEAR: + v4l2_transfer_char = V4L2_XFER_FUNC_VIDC_LINEAR; + break; + case MSM_VIDC_TRANSFER_XVYCC: + v4l2_transfer_char = V4L2_XFER_FUNC_VIDC_XVYCC; + break; + case MSM_VIDC_TRANSFER_BT1361_0: + v4l2_transfer_char = V4L2_XFER_FUNC_VIDC_BT1361; + break; + case MSM_VIDC_TRANSFER_SRGB_SYCC: + v4l2_transfer_char = V4L2_XFER_FUNC_SRGB; + break; + case MSM_VIDC_TRANSFER_BT2020_14: + case MSM_VIDC_TRANSFER_BT2020_15: + v4l2_transfer_char = V4L2_XFER_FUNC_VIDC_BT2020; + break; + case MSM_VIDC_TRANSFER_SMPTE_ST2084_PQ: + v4l2_transfer_char = V4L2_XFER_FUNC_SMPTE2084; + break; + case MSM_VIDC_TRANSFER_SMPTE_ST428_1: + v4l2_transfer_char = V4L2_XFER_FUNC_VIDC_ST428; + break; + case MSM_VIDC_TRANSFER_BT2100_2_HLG: + v4l2_transfer_char = V4L2_XFER_FUNC_VIDC_HLG; + break; + default: + i_vpr_e(inst, "%s: invalid transfer char %d\n", + __func__, vidc_transfer_char); + break; + } + + return v4l2_transfer_char; +} + +u32 v4l2_matrix_coeff_to_driver(struct msm_vidc_inst *inst, + u32 v4l2_matrix_coeff) +{ + u32 vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_RESERVED; + + switch(v4l2_matrix_coeff) { + case V4L2_YCBCR_VIDC_SRGB_OR_SMPTE_ST428: + vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_SRGB_SMPTE_ST428_1; + break; + case V4L2_YCBCR_ENC_709: + case V4L2_YCBCR_ENC_XV709: + vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_BT709; + break; + case V4L2_YCBCR_VIDC_FCC47_73_682: + vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_FCC_TITLE_47; + break; + case V4L2_YCBCR_ENC_XV601: + vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_BT470_SYS_BG_OR_BT601_625; + break; + case V4L2_YCBCR_ENC_601: + vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_BT601_525_BT1358_525_OR_625; + break; + case V4L2_YCBCR_ENC_SMPTE240M: + vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_SMPTE_ST240; + break; + case V4L2_YCBCR_ENC_BT2020: + vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_BT2020_NON_CONSTANT; + break; + case V4L2_YCBCR_ENC_BT2020_CONST_LUM: + vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_BT2020_CONSTANT; + break; + default: + i_vpr_e(inst, "%s: invalid matrix coeff %d\n", + __func__, v4l2_matrix_coeff); + break; + } + + return vidc_matrix_coeff; +} + +u32 v4l2_matrix_coeff_from_driver(struct msm_vidc_inst *inst, + u32 vidc_matrix_coeff) +{ + u32 v4l2_matrix_coeff = V4L2_YCBCR_ENC_DEFAULT; + + switch(vidc_matrix_coeff) { + case MSM_VIDC_MATRIX_COEFF_SRGB_SMPTE_ST428_1: + v4l2_matrix_coeff = V4L2_YCBCR_VIDC_SRGB_OR_SMPTE_ST428; + break; + case MSM_VIDC_MATRIX_COEFF_BT709: + v4l2_matrix_coeff = V4L2_YCBCR_ENC_709; + break; + case MSM_VIDC_MATRIX_COEFF_FCC_TITLE_47: + v4l2_matrix_coeff = V4L2_YCBCR_VIDC_FCC47_73_682; + break; + case MSM_VIDC_MATRIX_COEFF_BT470_SYS_BG_OR_BT601_625: + v4l2_matrix_coeff = V4L2_YCBCR_ENC_XV601; + break; + case MSM_VIDC_MATRIX_COEFF_BT601_525_BT1358_525_OR_625: + v4l2_matrix_coeff = V4L2_YCBCR_ENC_601; + break; + case MSM_VIDC_MATRIX_COEFF_SMPTE_ST240: + v4l2_matrix_coeff = V4L2_YCBCR_ENC_SMPTE240M; + break; + case MSM_VIDC_MATRIX_COEFF_BT2020_NON_CONSTANT: + v4l2_matrix_coeff = V4L2_YCBCR_ENC_BT2020; + break; + case MSM_VIDC_MATRIX_COEFF_BT2020_CONSTANT: + v4l2_matrix_coeff = V4L2_YCBCR_ENC_BT2020_CONST_LUM; + break; + default: + i_vpr_e(inst, "%s: invalid matrix coeff %d\n", + __func__, vidc_matrix_coeff); + break; + } + + return v4l2_matrix_coeff; +} + int v4l2_type_to_driver_port(struct msm_vidc_inst *inst, u32 type, const char *func) { diff --git a/include/uapi/vidc/media/v4l2_vidc_extensions.h b/include/uapi/vidc/media/v4l2_vidc_extensions.h index 4f176b3ee0..aae48b2f6e 100644 --- a/include/uapi/vidc/media/v4l2_vidc_extensions.h +++ b/include/uapi/vidc/media/v4l2_vidc_extensions.h @@ -26,6 +26,26 @@ #define V4L2_PIX_FMT_VIDC_ARGB32C v4l2_fourcc('Q', '2', '4', 'C') #define V4L2_META_FMT_VIDC v4l2_fourcc('Q', 'M', 'E', 'T') +/* start of vidc specific colorspace definitions */ +#define V4L2_COLORSPACE_VIDC_GENERIC_FILM 101 +#define V4L2_COLORSPACE_VIDC_EG431 102 +#define V4L2_COLORSPACE_VIDC_EBU_TECH 103 + +#define V4L2_XFER_FUNC_VIDC_BT470_SYSTEM_M 201 +#define V4L2_XFER_FUNC_VIDC_BT470_SYSTEM_BG 202 +#define V4L2_XFER_FUNC_VIDC_BT601_525_OR_625 203 +#define V4L2_XFER_FUNC_VIDC_LINEAR 204 +#define V4L2_XFER_FUNC_VIDC_XVYCC 205 +#define V4L2_XFER_FUNC_VIDC_BT1361 206 +#define V4L2_XFER_FUNC_VIDC_BT2020 207 +#define V4L2_XFER_FUNC_VIDC_ST428 208 +#define V4L2_XFER_FUNC_VIDC_HLG 209 + +#define V4L2_YCBCR_VIDC_SRGB_OR_SMPTE_ST428 301 +#define V4L2_YCBCR_VIDC_FCC47_73_682 302 + +/* end of vidc specific colorspace definitions */ + /* vendor controls start */ #define V4L2_CID_MPEG_VIDC_BASE (V4L2_CTRL_CLASS_MPEG | 0x2000) From f25d5c7078e0c569d5f9e05c13d9430b564966da Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Thu, 25 Feb 2021 20:26:48 +0530 Subject: [PATCH 0150/1061] video: driver: handle race between streamoff and qbuf sequence Currently stramoff releases inst->lock and waits for response from firmware i.e race issue. Streamoff released int->lock and that got acquired by qbuf. So 2 FTB's were queued to firmware after streamoff request. Receiving qbuf after streamoff is treated as fatal at firmware side and it sends session error as response to host. Added change to avoid such issues. Change-Id: I6da8ac0d3d30b540784e3c03c423270cb5212af2 Signed-off-by: Govindaraj Rajagopal --- driver/vidc/inc/msm_vidc_driver.h | 2 +- driver/vidc/src/msm_vidc.c | 2 +- driver/vidc/src/msm_vidc_driver.c | 49 +++++++++++++++++++++---------- 3 files changed, 36 insertions(+), 17 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 61a43694a6..f7221429f5 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -293,7 +293,7 @@ enum msm_vidc_allow msm_vidc_allow_stop(struct msm_vidc_inst *inst); bool msm_vidc_allow_start(struct msm_vidc_inst *inst); bool msm_vidc_allow_streamon(struct msm_vidc_inst *inst, u32 type); bool msm_vidc_allow_streamoff(struct msm_vidc_inst *inst, u32 type); -bool msm_vidc_allow_qbuf(struct msm_vidc_inst *inst); +enum msm_vidc_allow msm_vidc_allow_qbuf(struct msm_vidc_inst *inst, u32 type); enum msm_vidc_allow msm_vidc_allow_input_psc(struct msm_vidc_inst *inst); bool msm_vidc_allow_last_flag(struct msm_vidc_inst *inst); int msm_vidc_state_change_streamon(struct msm_vidc_inst *inst, u32 type); diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index 3faedae006..3a2f93a0e8 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -442,7 +442,7 @@ int msm_vidc_qbuf(void *instance, struct media_device *mdev, mutex_lock(&inst->lock); - if (!msm_vidc_allow_qbuf(inst)) { + if (is_session_error(inst)) { rc = -EBUSY; goto unlock; } diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index eaa56fe318..df04598703 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -1022,18 +1022,38 @@ bool msm_vidc_allow_streamoff(struct msm_vidc_inst *inst, u32 type) return allow; } -bool msm_vidc_allow_qbuf(struct msm_vidc_inst *inst) +enum msm_vidc_allow msm_vidc_allow_qbuf(struct msm_vidc_inst *inst, u32 type) { if (!inst) { d_vpr_e("%s: invalid params\n", __func__); - return false; + return MSM_VIDC_DISALLOW; } if (inst->state == MSM_VIDC_ERROR) { i_vpr_e(inst, "%s: inst in error state\n", __func__); - return false; - } else { - return true; + return MSM_VIDC_DISALLOW; } + if (type == INPUT_META_PLANE || type == OUTPUT_META_PLANE) + return MSM_VIDC_DEFER; + + if (type == INPUT_MPLANE) { + if (inst->state == MSM_VIDC_OPEN || + inst->state == MSM_VIDC_START_OUTPUT) + return MSM_VIDC_DEFER; + else + return MSM_VIDC_ALLOW; + } else if (type == OUTPUT_MPLANE) { + if (inst->state == MSM_VIDC_OPEN || + inst->state == MSM_VIDC_START_INPUT || + inst->state == MSM_VIDC_DRAIN_START_INPUT) + return MSM_VIDC_DEFER; + else + return MSM_VIDC_ALLOW; + } else { + i_vpr_e(inst, "%s: unknown buffer type %d\n", __func__, type); + return MSM_VIDC_DISALLOW; + } + + return MSM_VIDC_DISALLOW; } enum msm_vidc_allow msm_vidc_allow_input_psc(struct msm_vidc_inst *inst) @@ -1730,6 +1750,7 @@ int msm_vidc_queue_buffer(struct msm_vidc_inst *inst, struct vb2_buffer *vb2) int rc = 0; struct msm_vidc_buffer *buf; struct msm_vidc_buffer *meta; + enum msm_vidc_allow allow; int port; if (!inst || !vb2) { @@ -1741,20 +1762,18 @@ int msm_vidc_queue_buffer(struct msm_vidc_inst *inst, struct vb2_buffer *vb2) if (!buf) return -EINVAL; - /* meta buffer will be queued along with actual buffer */ - if (buf->type == MSM_VIDC_BUF_INPUT_META || - buf->type == MSM_VIDC_BUF_OUTPUT_META) { - buf->attr |= MSM_VIDC_ATTR_DEFERRED; - i_vpr_h(inst, "%s: %s_META qbuf deferred\n", __func__, - buf->type == MSM_VIDC_BUF_INPUT_META ? "INPUT" : "OUTPUT"); - return 0; - } - /* skip queuing if streamon not completed */ port = v4l2_type_to_driver_port(inst, vb2->type, __func__); if (port < 0) return -EINVAL; - if (!inst->vb2q[port].streaming) { + + allow = msm_vidc_allow_qbuf(inst, vb2->type); + if (allow == MSM_VIDC_DISALLOW) { + i_vpr_e(inst, "%s: qbuf not allowed\n", __func__); + return -EINVAL; + } + + if (!inst->vb2q[port].streaming || allow == MSM_VIDC_DEFER) { buf->attr |= MSM_VIDC_ATTR_DEFERRED; print_vidc_buffer(VIDC_HIGH, "high", "qbuf deferred", inst, buf); return 0; From f7dc3c77896650f02cef5406df309890c5a27190 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Tue, 23 Feb 2021 17:51:20 +0530 Subject: [PATCH 0151/1061] video: driver: increase encoder max host buffer count Increase encoder max host bufcount 64 -> 256 to support superframe(encoder batching) usecase. Change-Id: I8607b8302a10c52ac47a0c67ee7c359c62aa1d02 Signed-off-by: Govindaraj Rajagopal --- driver/vidc/inc/msm_vidc_internal.h | 1 + driver/vidc/src/msm_venc.c | 3 +++ driver/vidc/src/venus_hfi_response.c | 40 ++++++++++++++++++---------- 3 files changed, 30 insertions(+), 14 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index f032f037c4..449430656a 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -45,6 +45,7 @@ #define H265_BITSTREM_ALIGNMENT 32 #define DEFAULT_MAX_HOST_ENC_BUF_COUNT 64 #define DEFAULT_MAX_HOST_DEC_BUF_COUNT 64 +#define DEFAULT_MAX_HOST_ENC_SUPER_BUF_COUNT 256 #define BIT_DEPTH_8 (8 << 16 | 8) #define BIT_DEPTH_10 (10 << 16 | 10) #define CODED_FRAMES_MBS_ONLY HFI_BITMASK_FRAME_MBS_ONLY_FLAG diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index 758a3f45d7..19b0b4fbd5 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -255,6 +255,9 @@ static int msm_venc_set_host_max_buf_count(struct msm_vidc_inst *inst, return -EINVAL; } + if (msm_vidc_is_super_buffer(inst)) + count = DEFAULT_MAX_HOST_ENC_SUPER_BUF_COUNT; + i_vpr_h(inst, "%s: count: %u port: %u\n", __func__, count, port); rc = venus_hfi_session_property(inst, HFI_PROP_BUFFER_HOST_MAX_COUNT, diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index a5d2a15552..419b89a0ff 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -466,14 +466,20 @@ static int handle_input_buffer(struct msm_vidc_inst *inst, return -EINVAL; } - frame_size = call_session_op(core, buffer_size, inst, MSM_VIDC_BUF_INPUT); - batch_size = inst->capabilities->cap[SUPER_FRAME].value; /* attach dequeued flag for, only last frame in the batch */ - if (msm_vidc_is_super_buffer(inst) && - buffer->addr_offset / frame_size < batch_size - 1) { - i_vpr_h(inst, "%s: superframe last buffer not reached: %u, %u, %u\n", - __func__, buffer->addr_offset, frame_size, batch_size); - return 0; + if (msm_vidc_is_super_buffer(inst)) { + frame_size = call_session_op(core, buffer_size, inst, MSM_VIDC_BUF_INPUT); + batch_size = inst->capabilities->cap[SUPER_FRAME].value; + if (!frame_size || !batch_size) { + i_vpr_e(inst, "%s: invalid size: frame %u, batch %u\n", + __func__, frame_size, batch_size); + return -EINVAL; + } + if (buffer->addr_offset / frame_size < batch_size - 1) { + i_vpr_h(inst, "%s: superframe last buffer not reached: %u, %u, %u\n", + __func__, buffer->addr_offset, frame_size, batch_size); + return 0; + } } buf->data_offset = buffer->data_offset; buf->data_size = buffer->data_size; @@ -591,14 +597,20 @@ static int handle_input_metadata_buffer(struct msm_vidc_inst *inst, __func__, buffer->index, buffer->base_address); return -EINVAL; } - frame_size = call_session_op(core, buffer_size, inst, MSM_VIDC_BUF_INPUT_META); - batch_size = inst->capabilities->cap[SUPER_FRAME].value; /* attach dequeued flag for, only last frame in the batch */ - if (msm_vidc_is_super_buffer(inst) && - buffer->addr_offset / frame_size < batch_size - 1) { - i_vpr_h(inst, "%s: superframe last buffer not reached: %u, %u, %u\n", - __func__, buffer->addr_offset, frame_size, batch_size); - return 0; + if (msm_vidc_is_super_buffer(inst)) { + frame_size = call_session_op(core, buffer_size, inst, MSM_VIDC_BUF_INPUT_META); + batch_size = inst->capabilities->cap[SUPER_FRAME].value; + if (!frame_size || !batch_size) { + i_vpr_e(inst, "%s: invalid size: frame %u, batch %u\n", + __func__, frame_size, batch_size); + return -EINVAL; + } + if (buffer->addr_offset / frame_size < batch_size - 1) { + i_vpr_h(inst, "%s: superframe last buffer not reached: %u, %u, %u\n", + __func__, buffer->addr_offset, frame_size, batch_size); + return 0; + } } buf->data_size = buffer->data_size; buf->attr &= ~MSM_VIDC_ATTR_QUEUED; From 2a92b7d6da00ac3c1ea4a9950609b0e8e41c2f59 Mon Sep 17 00:00:00 2001 From: Maheshwar Ajja Date: Fri, 26 Feb 2021 14:10:58 -0800 Subject: [PATCH 0152/1061] video: driver: handle same buffer returned from firmware case Firmware is expected to return the buffer which was earlier returned with READ_ONLY flag as part of stop command processing. Amend the condition to avoid returning the same buffer to client again. Change-Id: I814098e140bf89b4a4e55dcd5efbff5a9d1cba12 Signed-off-by: Maheshwar Ajja --- driver/vidc/src/venus_hfi_response.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index a5d2a15552..b8a334bf28 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -670,11 +670,10 @@ static int handle_dequeue_buffers(struct msm_vidc_inst* inst) if (buf->attr & MSM_VIDC_ATTR_DEQUEUED) { buf->attr &= ~MSM_VIDC_ATTR_DEQUEUED; /* - * do not send vb2_buffer_done when fw sends FBDs - * with read only flag for second time + * do not send vb2_buffer_done when fw returns + * same buffer again */ - if ((buf->attr & MSM_VIDC_ATTR_BUFFER_DONE) && - buf->attr & MSM_VIDC_ATTR_READ_ONLY){ + if (buf->attr & MSM_VIDC_ATTR_BUFFER_DONE) { print_vidc_buffer(VIDC_HIGH, "high", "vb2 done already", inst, buf); } else { From 481a6117d815726cfc01a255f440716e7b5605b5 Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Mon, 1 Mar 2021 15:41:08 -0800 Subject: [PATCH 0153/1061] video: driver: update license year update license year to 2020-2021 Change-Id: I5a67bf49c386e86337bc7449ded08d186fc9a280 Signed-off-by: Darshana Patil --- config/waipio_video.h | 2 +- driver/platform/waipio/inc/msm_vidc_waipio.h | 2 +- driver/platform/waipio/src/msm_vidc_waipio.c | 2 +- driver/variant/iris2/inc/hfi_buffer_iris2.h | 2 +- driver/variant/iris2/inc/msm_vidc_buffer_iris2.h | 2 +- driver/variant/iris2/inc/msm_vidc_iris2.h | 2 +- driver/variant/iris2/inc/msm_vidc_power_iris2.h | 2 +- driver/variant/iris2/src/msm_vidc_buffer_iris2.c | 2 +- driver/variant/iris2/src/msm_vidc_iris2.c | 2 +- driver/variant/iris2/src/msm_vidc_power_iris2.c | 2 +- driver/vidc/inc/fixedpoint.h | 2 +- driver/vidc/inc/hfi_command.h | 2 +- driver/vidc/inc/hfi_packet.h | 2 +- driver/vidc/inc/hfi_property.h | 2 +- driver/vidc/inc/msm_media_info.h | 2 +- driver/vidc/inc/msm_vdec.h | 2 +- driver/vidc/inc/msm_venc.h | 2 +- driver/vidc/inc/msm_vidc.h | 2 +- driver/vidc/inc/msm_vidc_buffer.h | 2 +- driver/vidc/inc/msm_vidc_bus.h | 2 +- driver/vidc/inc/msm_vidc_control.h | 2 +- driver/vidc/inc/msm_vidc_core.h | 2 +- driver/vidc/inc/msm_vidc_debug.h | 2 +- driver/vidc/inc/msm_vidc_driver.h | 2 +- driver/vidc/inc/msm_vidc_dt.h | 2 +- driver/vidc/inc/msm_vidc_inst.h | 2 +- driver/vidc/inc/msm_vidc_internal.h | 2 +- driver/vidc/inc/msm_vidc_memory.h | 2 +- driver/vidc/inc/msm_vidc_platform.h | 2 +- driver/vidc/inc/msm_vidc_power.h | 2 +- driver/vidc/inc/msm_vidc_v4l2.h | 2 +- driver/vidc/inc/msm_vidc_vb2.h | 2 +- driver/vidc/inc/venus_hfi.h | 2 +- driver/vidc/inc/venus_hfi_response.h | 2 +- driver/vidc/src/hfi_packet.c | 2 +- driver/vidc/src/msm_vdec.c | 2 +- driver/vidc/src/msm_venc.c | 2 +- driver/vidc/src/msm_vidc.c | 2 +- driver/vidc/src/msm_vidc_buffer.c | 2 +- driver/vidc/src/msm_vidc_control.c | 2 +- driver/vidc/src/msm_vidc_debug.c | 2 +- driver/vidc/src/msm_vidc_driver.c | 2 +- driver/vidc/src/msm_vidc_dt.c | 2 +- driver/vidc/src/msm_vidc_memory.c | 2 +- driver/vidc/src/msm_vidc_platform.c | 2 +- driver/vidc/src/msm_vidc_power.c | 2 +- driver/vidc/src/msm_vidc_probe.c | 2 +- driver/vidc/src/msm_vidc_v4l2.c | 2 +- driver/vidc/src/msm_vidc_vb2.c | 2 +- driver/vidc/src/venus_hfi.c | 2 +- driver/vidc/src/venus_hfi_response.c | 2 +- include/uapi/vidc/media/v4l2_vidc_extensions.h | 2 +- video_kernel_headers.py | 2 +- 53 files changed, 53 insertions(+), 53 deletions(-) diff --git a/config/waipio_video.h b/config/waipio_video.h index 6bc2c01784..8660ddf8bb 100644 --- a/config/waipio_video.h +++ b/config/waipio_video.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* - * Copyright (c) 2020, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. */ #define CONFIG_MSM_VIDC_V4L2 1 diff --git a/driver/platform/waipio/inc/msm_vidc_waipio.h b/driver/platform/waipio/inc/msm_vidc_waipio.h index 8bef9b2968..9f5b371d54 100644 --- a/driver/platform/waipio/inc/msm_vidc_waipio.h +++ b/driver/platform/waipio/inc/msm_vidc_waipio.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* - * Copyright (c) 2020, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. */ #ifndef _MSM_VIDC_WAIPIO_H_ diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 140f321d6d..0318a931a3 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * Copyright (c) 2020, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. */ #include diff --git a/driver/variant/iris2/inc/hfi_buffer_iris2.h b/driver/variant/iris2/inc/hfi_buffer_iris2.h index 701455e839..8d2690484d 100644 --- a/driver/variant/iris2/inc/hfi_buffer_iris2.h +++ b/driver/variant/iris2/inc/hfi_buffer_iris2.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* - * Copyright (c) 2020, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. */ #ifndef __HFI_BUFFER_IRIS2__ diff --git a/driver/variant/iris2/inc/msm_vidc_buffer_iris2.h b/driver/variant/iris2/inc/msm_vidc_buffer_iris2.h index e3a319c415..4fec123ee1 100644 --- a/driver/variant/iris2/inc/msm_vidc_buffer_iris2.h +++ b/driver/variant/iris2/inc/msm_vidc_buffer_iris2.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* - * Copyright (c) 2020, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. */ #ifndef __H_MSM_VIDC_BUFFER_IRIS2_H__ diff --git a/driver/variant/iris2/inc/msm_vidc_iris2.h b/driver/variant/iris2/inc/msm_vidc_iris2.h index 5fbe17ffef..7f8f7b9d69 100644 --- a/driver/variant/iris2/inc/msm_vidc_iris2.h +++ b/driver/variant/iris2/inc/msm_vidc_iris2.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* - * Copyright (c) 2020, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. */ #include "msm_vidc_core.h" diff --git a/driver/variant/iris2/inc/msm_vidc_power_iris2.h b/driver/variant/iris2/inc/msm_vidc_power_iris2.h index 7ab3690e89..4eab42b234 100644 --- a/driver/variant/iris2/inc/msm_vidc_power_iris2.h +++ b/driver/variant/iris2/inc/msm_vidc_power_iris2.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* - * Copyright (c) 2020, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. */ #ifndef __H_MSM_VIDC_POWER_IRIS2_H__ diff --git a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c index 504c92267c..6808449304 100644 --- a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * Copyright (c) 2020, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. */ #include "hfi_property.h" diff --git a/driver/variant/iris2/src/msm_vidc_iris2.c b/driver/variant/iris2/src/msm_vidc_iris2.c index b4aeeeae72..fdd389761a 100644 --- a/driver/variant/iris2/src/msm_vidc_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_iris2.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * Copyright (c) 2020, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. */ #include diff --git a/driver/variant/iris2/src/msm_vidc_power_iris2.c b/driver/variant/iris2/src/msm_vidc_power_iris2.c index 2d05c288bb..37e0ecc09e 100644 --- a/driver/variant/iris2/src/msm_vidc_power_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_power_iris2.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * Copyright (c) 2020, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. */ #include "msm_vidc_power_iris2.h" diff --git a/driver/vidc/inc/fixedpoint.h b/driver/vidc/inc/fixedpoint.h index 99ebc63241..e9861bf056 100644 --- a/driver/vidc/inc/fixedpoint.h +++ b/driver/vidc/inc/fixedpoint.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* - * Copyright (c) 2020, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. */ #ifdef _FIXP_ARITH_H diff --git a/driver/vidc/inc/hfi_command.h b/driver/vidc/inc/hfi_command.h index cafaeea662..bbf76f2ccf 100644 --- a/driver/vidc/inc/hfi_command.h +++ b/driver/vidc/inc/hfi_command.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* - * Copyright (c) 2012-2021, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. */ #ifndef __H_HFI_COMMAND_H__ diff --git a/driver/vidc/inc/hfi_packet.h b/driver/vidc/inc/hfi_packet.h index 43eda70d80..4f25135248 100644 --- a/driver/vidc/inc/hfi_packet.h +++ b/driver/vidc/inc/hfi_packet.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* - * Copyright (c) 2020, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. */ #ifndef _HFI_PACKET_H_ diff --git a/driver/vidc/inc/hfi_property.h b/driver/vidc/inc/hfi_property.h index a22f1594bd..6afbe3fd02 100644 --- a/driver/vidc/inc/hfi_property.h +++ b/driver/vidc/inc/hfi_property.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* - * Copyright (c) 2012-2021, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. */ #ifndef __H_HFI_PROPERTY_H__ diff --git a/driver/vidc/inc/msm_media_info.h b/driver/vidc/inc/msm_media_info.h index 60d8e2416c..444759891e 100644 --- a/driver/vidc/inc/msm_media_info.h +++ b/driver/vidc/inc/msm_media_info.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ /* - * Copyright (c) 2020, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. */ #ifndef __MSM_MEDIA_INFO_H__ diff --git a/driver/vidc/inc/msm_vdec.h b/driver/vidc/inc/msm_vdec.h index 132cd74700..5636301560 100644 --- a/driver/vidc/inc/msm_vdec.h +++ b/driver/vidc/inc/msm_vdec.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* - * Copyright (c) 2020, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. */ #ifndef _MSM_VDEC_H_ diff --git a/driver/vidc/inc/msm_venc.h b/driver/vidc/inc/msm_venc.h index 1082561579..af55a3c350 100644 --- a/driver/vidc/inc/msm_venc.h +++ b/driver/vidc/inc/msm_venc.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* - * Copyright (c) 2020, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. */ #ifndef _MSM_VENC_H_ diff --git a/driver/vidc/inc/msm_vidc.h b/driver/vidc/inc/msm_vidc.h index 0f8966cc7e..40990d2207 100644 --- a/driver/vidc/inc/msm_vidc.h +++ b/driver/vidc/inc/msm_vidc.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* - * Copyright (c) 2020, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. */ #ifndef _MSM_VIDC_H_ diff --git a/driver/vidc/inc/msm_vidc_buffer.h b/driver/vidc/inc/msm_vidc_buffer.h index 1b6f48ee5d..16220936a5 100644 --- a/driver/vidc/inc/msm_vidc_buffer.h +++ b/driver/vidc/inc/msm_vidc_buffer.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* - * Copyright (c) 2020, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. */ #ifndef __H_MSM_VIDC_BUFFER_H__ diff --git a/driver/vidc/inc/msm_vidc_bus.h b/driver/vidc/inc/msm_vidc_bus.h index d28de7ba94..45088c7965 100644 --- a/driver/vidc/inc/msm_vidc_bus.h +++ b/driver/vidc/inc/msm_vidc_bus.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* - * Copyright (c) 2020, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. */ #ifndef __H_MSM_VIDC_BUS_DEFS_H__ diff --git a/driver/vidc/inc/msm_vidc_control.h b/driver/vidc/inc/msm_vidc_control.h index ff525e0aa8..5dee318288 100644 --- a/driver/vidc/inc/msm_vidc_control.h +++ b/driver/vidc/inc/msm_vidc_control.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* - * Copyright (c) 2020, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. */ #ifndef _MSM_VIDC_CONTROL_H_ diff --git a/driver/vidc/inc/msm_vidc_core.h b/driver/vidc/inc/msm_vidc_core.h index 565b2a965a..945aba30c0 100644 --- a/driver/vidc/inc/msm_vidc_core.h +++ b/driver/vidc/inc/msm_vidc_core.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* - * Copyright (c) 2020, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. */ #ifndef _MSM_VIDC_CORE_H_ diff --git a/driver/vidc/inc/msm_vidc_debug.h b/driver/vidc/inc/msm_vidc_debug.h index ba339e9d41..aa41d63599 100644 --- a/driver/vidc/inc/msm_vidc_debug.h +++ b/driver/vidc/inc/msm_vidc_debug.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* - * Copyright (c) 2020, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. */ #ifndef __MSM_VIDC_DEBUG__ diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index f7221429f5..351e4abaaa 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* - * Copyright (c) 2020, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. */ #ifndef _MSM_VIDC_DRIVER_H_ diff --git a/driver/vidc/inc/msm_vidc_dt.h b/driver/vidc/inc/msm_vidc_dt.h index e45a37bfb5..d3baaee007 100644 --- a/driver/vidc/inc/msm_vidc_dt.h +++ b/driver/vidc/inc/msm_vidc_dt.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* - * Copyright (c) 2020, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. */ #ifndef _MSM_VIDC_DT_H_ diff --git a/driver/vidc/inc/msm_vidc_inst.h b/driver/vidc/inc/msm_vidc_inst.h index c49e3e000a..798d925350 100644 --- a/driver/vidc/inc/msm_vidc_inst.h +++ b/driver/vidc/inc/msm_vidc_inst.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* - * Copyright (c) 2020, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. */ #ifndef _MSM_VIDC_INST_H_ diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 449430656a..a449bdcd1a 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* - * Copyright (c) 2020, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. */ #ifndef _MSM_VIDC_INTERNAL_H_ diff --git a/driver/vidc/inc/msm_vidc_memory.h b/driver/vidc/inc/msm_vidc_memory.h index e7e32602bf..cb183ad3f9 100644 --- a/driver/vidc/inc/msm_vidc_memory.h +++ b/driver/vidc/inc/msm_vidc_memory.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* - * Copyright (c) 2020, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. */ #ifndef _MSM_VIDC_MEMORY_H_ diff --git a/driver/vidc/inc/msm_vidc_platform.h b/driver/vidc/inc/msm_vidc_platform.h index dde8d4f582..08e225dc56 100644 --- a/driver/vidc/inc/msm_vidc_platform.h +++ b/driver/vidc/inc/msm_vidc_platform.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* - * Copyright (c) 2020, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. */ #ifndef _MSM_VIDC_PLATFORM_H_ diff --git a/driver/vidc/inc/msm_vidc_power.h b/driver/vidc/inc/msm_vidc_power.h index 009ff8f1dc..7848b3477a 100644 --- a/driver/vidc/inc/msm_vidc_power.h +++ b/driver/vidc/inc/msm_vidc_power.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* - * Copyright (c) 2020, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. */ #ifndef _MSM_VIDC_POWER_H_ diff --git a/driver/vidc/inc/msm_vidc_v4l2.h b/driver/vidc/inc/msm_vidc_v4l2.h index 4475122032..018bedc784 100644 --- a/driver/vidc/inc/msm_vidc_v4l2.h +++ b/driver/vidc/inc/msm_vidc_v4l2.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* - * Copyright (c) 2020, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. */ #ifndef _MSM_VIDC_V4L2_H_ diff --git a/driver/vidc/inc/msm_vidc_vb2.h b/driver/vidc/inc/msm_vidc_vb2.h index c924c1dd4b..c4c66dfab7 100644 --- a/driver/vidc/inc/msm_vidc_vb2.h +++ b/driver/vidc/inc/msm_vidc_vb2.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* - * Copyright (c) 2020, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. */ #ifndef _MSM_VIDC_VB2_H_ diff --git a/driver/vidc/inc/venus_hfi.h b/driver/vidc/inc/venus_hfi.h index f890df7892..5273edbe50 100644 --- a/driver/vidc/inc/venus_hfi.h +++ b/driver/vidc/inc/venus_hfi.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* - * Copyright (c) 2020, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. */ #ifndef _VENUS_HFI_H_ diff --git a/driver/vidc/inc/venus_hfi_response.h b/driver/vidc/inc/venus_hfi_response.h index ac99ba95ea..bd87e513d3 100644 --- a/driver/vidc/inc/venus_hfi_response.h +++ b/driver/vidc/inc/venus_hfi_response.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* - * Copyright (c) 2020, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. */ #ifndef __VENUS_HFI_RESPONSE_H__ diff --git a/driver/vidc/src/hfi_packet.c b/driver/vidc/src/hfi_packet.c index 4048a9fe9f..e97cc5fedb 100644 --- a/driver/vidc/src/hfi_packet.c +++ b/driver/vidc/src/hfi_packet.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * Copyright (c) 2020, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. */ #include "hfi_packet.h" diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 1d2471cdca..2c59256db2 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * Copyright (c) 2020, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. */ #include diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index 19b0b4fbd5..e5131ebf05 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * Copyright (c) 2020, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. */ #include diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index 3a2f93a0e8..65a7f65d87 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * Copyright (c) 2020, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. */ #include diff --git a/driver/vidc/src/msm_vidc_buffer.c b/driver/vidc/src/msm_vidc_buffer.c index df1212c856..334238c395 100644 --- a/driver/vidc/src/msm_vidc_buffer.c +++ b/driver/vidc/src/msm_vidc_buffer.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * Copyright (c) 2020, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. */ #include "msm_media_info.h" diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 8940c489cd..bc50920133 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * Copyright (c) 2020, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. */ #include "msm_vidc_control.h" diff --git a/driver/vidc/src/msm_vidc_debug.c b/driver/vidc/src/msm_vidc_debug.c index 8ba9762481..b68ad03b26 100644 --- a/driver/vidc/src/msm_vidc_debug.c +++ b/driver/vidc/src/msm_vidc_debug.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * Copyright (c) 2020, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. */ #include "msm_vidc_debug.h" diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index df04598703..8d832af426 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * Copyright (c) 2020, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. */ #include diff --git a/driver/vidc/src/msm_vidc_dt.c b/driver/vidc/src/msm_vidc_dt.c index 8b1b6eb316..41a3d4e1ba 100644 --- a/driver/vidc/src/msm_vidc_dt.c +++ b/driver/vidc/src/msm_vidc_dt.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * Copyright (c) 2020, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. */ #include diff --git a/driver/vidc/src/msm_vidc_memory.c b/driver/vidc/src/msm_vidc_memory.c index 2ccc358c83..1d167b868a 100644 --- a/driver/vidc/src/msm_vidc_memory.c +++ b/driver/vidc/src/msm_vidc_memory.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * Copyright (c) 2020, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. */ #include diff --git a/driver/vidc/src/msm_vidc_platform.c b/driver/vidc/src/msm_vidc_platform.c index 07f0fb96f0..0c3831b5b8 100644 --- a/driver/vidc/src/msm_vidc_platform.c +++ b/driver/vidc/src/msm_vidc_platform.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * Copyright (c) 2020, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. */ #include diff --git a/driver/vidc/src/msm_vidc_power.c b/driver/vidc/src/msm_vidc_power.c index 1a892b0963..72018613b8 100644 --- a/driver/vidc/src/msm_vidc_power.c +++ b/driver/vidc/src/msm_vidc_power.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * Copyright (c) 2020, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. */ #include "msm_vidc_power.h" diff --git a/driver/vidc/src/msm_vidc_probe.c b/driver/vidc/src/msm_vidc_probe.c index e801a070d7..8f9dcdc5f0 100644 --- a/driver/vidc/src/msm_vidc_probe.c +++ b/driver/vidc/src/msm_vidc_probe.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * Copyright (c) 2020, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. */ #include diff --git a/driver/vidc/src/msm_vidc_v4l2.c b/driver/vidc/src/msm_vidc_v4l2.c index c2191c7dbf..fb4d1785ef 100644 --- a/driver/vidc/src/msm_vidc_v4l2.c +++ b/driver/vidc/src/msm_vidc_v4l2.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * Copyright (c) 2020, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. */ #include "msm_vidc_v4l2.h" diff --git a/driver/vidc/src/msm_vidc_vb2.c b/driver/vidc/src/msm_vidc_vb2.c index a0db3a27b2..06bae86f1a 100644 --- a/driver/vidc/src/msm_vidc_vb2.c +++ b/driver/vidc/src/msm_vidc_vb2.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * Copyright (c) 2020, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. */ #include "msm_vidc_vb2.h" diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index b842e84da5..8c1dd7d633 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * Copyright (c) 2020, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. */ #include diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index 1e116e640e..ebf4a48f2e 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * Copyright (c) 2020, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. */ #include "hfi_packet.h" diff --git a/include/uapi/vidc/media/v4l2_vidc_extensions.h b/include/uapi/vidc/media/v4l2_vidc_extensions.h index aae48b2f6e..20f39ba809 100644 --- a/include/uapi/vidc/media/v4l2_vidc_extensions.h +++ b/include/uapi/vidc/media/v4l2_vidc_extensions.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ /* - * Copyright (c) 2020, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. */ #ifndef __V4l2_VIDC_EXTENSIONS_H__ diff --git a/video_kernel_headers.py b/video_kernel_headers.py index b98a5ac61b..bfb5507a5c 100644 --- a/video_kernel_headers.py +++ b/video_kernel_headers.py @@ -1,4 +1,4 @@ -# Copyright (c) 2020, The Linux Foundation. All rights reserved. +# Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. # # This program is free software; you can redistribute it and/or modify it # under the terms of the GNU General Public License version 2 as published by From 395d4a9ff5ee05c929b0778043b4ce42e3afbad0 Mon Sep 17 00:00:00 2001 From: Maheshwar Ajja Date: Wed, 24 Feb 2021 16:49:15 -0800 Subject: [PATCH 0154/1061] video: driver: amend interlace detection logic As per HFI_PROP_CODED_FRAMES details, 0x0 is field interlace, 0x1 is progressive and 0x2 is adaptive frame field bitstream. Treat 0x1 as progressive and both 0x0 and 0x2 as interlace in driver. Change-Id: I07c7c8b4faaccc896249b2da84148ec05c2047da Signed-off-by: Maheshwar Ajja --- driver/platform/waipio/src/msm_vidc_waipio.c | 4 ++-- driver/variant/iris2/src/msm_vidc_iris2.c | 4 ++-- driver/vidc/inc/msm_vidc_internal.h | 4 ++-- driver/vidc/src/msm_vdec.c | 9 +++++++-- 4 files changed, 13 insertions(+), 8 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 0318a931a3..a4020fcd11 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -1016,8 +1016,8 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { MSM_VIDC_POWER_SAVE_MODE}, {CODED_FRAMES, DEC, CODECS_ALL, - CODED_FRAMES_MBS_ONLY, CODED_FRAMES_ADAPTIVE_FIELDS, - 1, CODED_FRAMES_MBS_ONLY, + CODED_FRAMES_PROGRESSIVE, CODED_FRAMES_INTERLACE, + 1, CODED_FRAMES_PROGRESSIVE, 0, HFI_PROP_CODED_FRAMES}, diff --git a/driver/variant/iris2/src/msm_vidc_iris2.c b/driver/variant/iris2/src/msm_vidc_iris2.c index fdd389761a..f3db4c1323 100644 --- a/driver/variant/iris2/src/msm_vidc_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_iris2.c @@ -536,7 +536,7 @@ int msm_vidc_decide_work_mode_iris2(struct msm_vidc_inst* inst) width = out_f->fmt.pix_mp.width; res_ok = res_is_less_than_or_equal_to(width, height, 1280, 720); if (inst->capabilities->cap[CODED_FRAMES].value == - CODED_FRAMES_ADAPTIVE_FIELDS || + CODED_FRAMES_INTERLACE || inst->capabilities->cap[LOWLATENCY_MODE].value || res_ok) { work_mode = MSM_VIDC_STAGE_1; @@ -588,7 +588,7 @@ int msm_vidc_decide_work_route_iris2(struct msm_vidc_inst* inst) if (is_decode_session(inst)) { if (inst->capabilities->cap[CODED_FRAMES].value == - CODED_FRAMES_ADAPTIVE_FIELDS) + CODED_FRAMES_INTERLACE) work_route = MSM_VIDC_PIPE_1; } else if (is_encode_session(inst)) { u32 slice_mode, width, height; diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index a449bdcd1a..aaa09d4496 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -48,8 +48,8 @@ #define DEFAULT_MAX_HOST_ENC_SUPER_BUF_COUNT 256 #define BIT_DEPTH_8 (8 << 16 | 8) #define BIT_DEPTH_10 (10 << 16 | 10) -#define CODED_FRAMES_MBS_ONLY HFI_BITMASK_FRAME_MBS_ONLY_FLAG -#define CODED_FRAMES_ADAPTIVE_FIELDS HFI_BITMASK_MB_ADAPTIVE_FRAME_FIELD_FLAG +#define CODED_FRAMES_PROGRESSIVE 0x0 +#define CODED_FRAMES_INTERLACE 0x1 /* TODO * #define MAX_SUPERFRAME_COUNT 32 diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 2c59256db2..0736bec8b5 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -1324,7 +1324,12 @@ static int msm_vdec_update_properties(struct msm_vidc_inst *inst) inst->capabilities->cap[HEVC_TIER].value = subsc_params.tier; inst->capabilities->cap[POC].value = subsc_params.pic_order_cnt; inst->capabilities->cap[BIT_DEPTH].value = subsc_params.bit_depth; - inst->capabilities->cap[CODED_FRAMES].value = subsc_params.coded_frames; + if (subsc_params.coded_frames & HFI_BITMASK_FRAME_MBS_ONLY_FLAG) + inst->capabilities->cap[CODED_FRAMES].value = + CODED_FRAMES_PROGRESSIVE; + else + inst->capabilities->cap[CODED_FRAMES].value = + CODED_FRAMES_INTERLACE; return 0; } @@ -2124,7 +2129,7 @@ static int msm_vdec_check_colorformat_supported(struct msm_vidc_inst* inst, !is_10bit_colorformat(colorformat)) supported = false; if (inst->capabilities->cap[CODED_FRAMES].value == - CODED_FRAMES_ADAPTIVE_FIELDS && + CODED_FRAMES_INTERLACE && !is_ubwc_colorformat(colorformat)) supported = false; From b297e04dee8f8ee1526fa74b40c3ee8164712ed6 Mon Sep 17 00:00:00 2001 From: Maheshwar Ajja Date: Mon, 1 Mar 2021 14:45:35 -0800 Subject: [PATCH 0155/1061] video: driver: initialize subscribe parameters Initialize subscribe parameters before input port settings change event from firmware to avoid uninitialized subscribe params usage in video driver. Change-Id: I39a1e6646a845836a406193ace7a5fb71edee192 Depends-On: I07c7c8b4faaccc896249b2da84148ec05c2047da Signed-off-by: Maheshwar Ajja --- .../variant/iris2/src/msm_vidc_buffer_iris2.c | 8 +- driver/vidc/inc/msm_vdec.h | 1 + driver/vidc/src/msm_vdec.c | 75 ++++++++++++++++++- driver/vidc/src/venus_hfi_response.c | 3 + 4 files changed, 81 insertions(+), 6 deletions(-) diff --git a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c index 6808449304..99eb83223b 100644 --- a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c @@ -23,7 +23,7 @@ static u32 msm_vidc_decoder_bin_size_iris2(struct msm_vidc_inst *inst) bool is_interlaced; u32 vpp_delay; - if (!inst || !inst->core) { + if (!inst || !inst->core || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); return size; } @@ -38,7 +38,11 @@ static u32 msm_vidc_decoder_bin_size_iris2(struct msm_vidc_inst *inst) vpp_delay = inst->decode_vpp_delay.size; else vpp_delay = DEFAULT_BSE_VPP_DELAY; - is_interlaced = false; //TODO: (inst->pic_struct == MSM_VIDC_PIC_STRUCT_MAYBE_INTERLACED); + if (inst->capabilities->cap[CODED_FRAMES].value == + CODED_FRAMES_PROGRESSIVE) + is_interlaced = false; + else + is_interlaced = true; f = &inst->fmts[INPUT_PORT]; width = f->fmt.pix_mp.width; height = f->fmt.pix_mp.height; diff --git a/driver/vidc/inc/msm_vdec.h b/driver/vidc/inc/msm_vdec.h index 5636301560..5371979159 100644 --- a/driver/vidc/inc/msm_vdec.h +++ b/driver/vidc/inc/msm_vdec.h @@ -25,6 +25,7 @@ int msm_vdec_g_param(struct msm_vidc_inst *inst, int msm_vdec_enum_fmt(struct msm_vidc_inst *inst, struct v4l2_fmtdesc *f); int msm_vdec_inst_init(struct msm_vidc_inst *inst); int msm_vdec_inst_deinit(struct msm_vidc_inst *inst); +int msm_vdec_init_input_subcr_params(struct msm_vidc_inst *inst); int msm_vdec_input_port_settings_change(struct msm_vidc_inst *inst); int msm_vdec_output_port_settings_change(struct msm_vidc_inst *inst); int msm_vdec_process_cmd(struct msm_vidc_inst *inst, u32 cmd); diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 0736bec8b5..c6a0f2b3b8 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -253,14 +253,16 @@ static int msm_vdec_set_coded_frames(struct msm_vidc_inst *inst, enum msm_vidc_port_type port) { int rc = 0; - u32 coded_frames; + u32 coded_frames = 0; if (port != INPUT_PORT && port != OUTPUT_PORT) { i_vpr_e(inst, "%s: invalid port %d\n", __func__, port); return -EINVAL; } - coded_frames = inst->capabilities->cap[CODED_FRAMES].value; + if (inst->capabilities->cap[CODED_FRAMES].value == + CODED_FRAMES_PROGRESSIVE) + coded_frames = HFI_BITMASK_FRAME_MBS_ONLY_FLAG; inst->subcr_params[port].coded_frames = coded_frames; i_vpr_h(inst, "%s: coded frames: %d", __func__, coded_frames); rc = venus_hfi_session_property(inst, @@ -1237,7 +1239,72 @@ static int msm_vdec_session_resume(struct msm_vidc_inst *inst, return rc; } -static int msm_vdec_update_properties(struct msm_vidc_inst *inst) +int msm_vdec_init_input_subcr_params(struct msm_vidc_inst *inst) +{ + struct msm_vidc_subscription_params *subsc_params; + struct msm_vidc_core *core; + u32 left_offset, top_offset, right_offset, bottom_offset; + u32 primaries, matrix_coeff, transfer_char; + u32 full_range = 0, video_format = 0; + u32 colour_description_present_flag = 0; + u32 video_signal_type_present_flag = 0; + + if (!inst || !inst->core || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + core = inst->core; + subsc_params = &inst->subcr_params[INPUT_PORT]; + + subsc_params->bitstream_resolution = + inst->fmts[INPUT_PORT].fmt.pix_mp.width << 16 | + inst->fmts[INPUT_PORT].fmt.pix_mp.height; + + left_offset = inst->crop.left; + top_offset = inst->crop.top; + right_offset = (inst->fmts[INPUT_PORT].fmt.pix_mp.width - + inst->crop.width); + bottom_offset = (inst->fmts[INPUT_PORT].fmt.pix_mp.height - + inst->crop.height); + subsc_params->crop_offsets[0] = + left_offset << 16 | top_offset; + subsc_params->crop_offsets[1] = + right_offset << 16 | bottom_offset; + + subsc_params->fw_min_count = inst->buffers.output.min_count; + + primaries = v4l2_color_primaries_from_driver(inst, + inst->fmts[INPUT_PORT].fmt.pix_mp.colorspace); + matrix_coeff = v4l2_matrix_coeff_from_driver(inst, + inst->fmts[INPUT_PORT].fmt.pix_mp.ycbcr_enc); + transfer_char = v4l2_transfer_char_from_driver(inst, + inst->fmts[INPUT_PORT].fmt.pix_mp.xfer_func); + full_range = inst->fmts[INPUT_PORT].fmt.pix_mp.quantization == + V4L2_QUANTIZATION_FULL_RANGE ? 1 : 0; + subsc_params->color_info = + (matrix_coeff & 0xFF) | + ((transfer_char << 8) & 0xFF00) | + ((primaries << 16) & 0xFF0000) | + ((colour_description_present_flag << 24) & 0x1000000) | + ((full_range << 25) & 0x2000000) | + ((video_format << 26) & 0x1C000000) | + ((video_signal_type_present_flag << 29) & 0x20000000); + + subsc_params->profile = inst->capabilities->cap[PROFILE].value; + subsc_params->level = inst->capabilities->cap[LEVEL].value; + subsc_params->tier = inst->capabilities->cap[HEVC_TIER].value; + subsc_params->pic_order_cnt = inst->capabilities->cap[POC].value; + subsc_params->bit_depth = inst->capabilities->cap[BIT_DEPTH].value; + if (inst->capabilities->cap[CODED_FRAMES].value == + CODED_FRAMES_PROGRESSIVE) + subsc_params->coded_frames = HFI_BITMASK_FRAME_MBS_ONLY_FLAG; + else + subsc_params->coded_frames = 0; + + return 0; +} + +static int msm_vdec_read_input_subcr_params(struct msm_vidc_inst *inst) { struct msm_vidc_subscription_params subsc_params; struct msm_vidc_core *core; @@ -1345,7 +1412,7 @@ int msm_vdec_input_port_settings_change(struct msm_vidc_inst *inst) return 0; } - rc = msm_vdec_update_properties(inst); + rc = msm_vdec_read_input_subcr_params(inst); if (rc) return rc; diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index ebf4a48f2e..a414277aed 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -1312,6 +1312,9 @@ int handle_session_response_work(struct msm_vidc_inst *inst, pkt += packet->size; } + if (resp_work->type == RESP_WORK_INPUT_PSC) + msm_vdec_init_input_subcr_params(inst); + memset(&inst->hfi_frame_info, 0, sizeof(struct msm_vidc_hfi_frame_info)); for (i = 0; i < ARRAY_SIZE(be); i++) { From 4387226f982f4b5668c516d287646d3ca5010979 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Tue, 2 Mar 2021 16:32:14 -0800 Subject: [PATCH 0156/1061] video: driver: Add support to set default fps Add support to set default fps to video fw. Change-Id: I5074b5379c8bca273e098a3375f2c949b0656ae8 Signed-off-by: Akshata Sahukar --- driver/platform/waipio/src/msm_vidc_waipio.c | 7 ++++++- driver/vidc/src/msm_vdec.c | 12 ++++++------ driver/vidc/src/msm_venc.c | 12 ++++++------ 3 files changed, 18 insertions(+), 13 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index a4020fcd11..b2b204627e 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -178,7 +178,12 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {FRAME_RATE, ENC, CODECS_ALL, (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), - 1, (DEFAULT_FPS << 16)}, + 1, (DEFAULT_FPS << 16), + 0, + HFI_PROP_FRAME_RATE, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + {0}, {0}, + NULL, msm_vidc_set_q16}, {FRAME_RATE, DEC, CODECS_ALL, (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index c6a0f2b3b8..26c0fa9013 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -2091,20 +2091,20 @@ int msm_vdec_s_param(struct msm_vidc_inst *inst, if (s_parm->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) { timeperframe = &s_parm->parm.output.timeperframe; - max_rate = capability->cap[FRAME_RATE].max; - default_rate = capability->cap[FRAME_RATE].value; + max_rate = capability->cap[FRAME_RATE].max >> 16; + default_rate = capability->cap[FRAME_RATE].value >> 16; is_frame_rate = true; } else { timeperframe = &s_parm->parm.capture.timeperframe; - max_rate = capability->cap[OPERATING_RATE].value; - default_rate = capability->cap[OPERATING_RATE].value; + max_rate = capability->cap[OPERATING_RATE].max; + default_rate = capability->cap[OPERATING_RATE].value >> 16; } if (!timeperframe->denominator || !timeperframe->numerator) { i_vpr_e(inst, "%s: invalid rate for type %u\n", __func__, s_parm->type); - input_rate = default_rate >> 16; + input_rate = default_rate; goto set_default; } @@ -2124,7 +2124,7 @@ int msm_vdec_s_param(struct msm_vidc_inst *inst, /* Check max allowed rate */ if (input_rate > max_rate) { i_vpr_e(inst, - "%s: Unsupported rate %u, max_fps %u, type: %u\n", + "%s: Unsupported rate %llu, max_fps %u, type: %u\n", __func__, input_rate, max_rate, s_parm->type); rc = -ENOTSUPP; goto exit; diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index e5131ebf05..138e30f637 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -1547,19 +1547,19 @@ int msm_venc_s_param(struct msm_vidc_inst *inst, if (s_parm->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) { timeperframe = &s_parm->parm.output.timeperframe; max_rate = capability->cap[OPERATING_RATE].max; - default_rate = capability->cap[OPERATING_RATE].value; + default_rate = capability->cap[OPERATING_RATE].value >> 16; } else { timeperframe = &s_parm->parm.capture.timeperframe; is_frame_rate = true; - max_rate = capability->cap[FRAME_RATE].value; - default_rate = capability->cap[FRAME_RATE].value; + max_rate = capability->cap[FRAME_RATE].max >> 16; + default_rate = capability->cap[FRAME_RATE].value >> 16; } if (!timeperframe->denominator || !timeperframe->numerator) { i_vpr_e(inst, "%s: invalid rate for type %u\n", __func__, s_parm->type); - input_rate = default_rate >> 16; + input_rate = default_rate; goto set_default; } @@ -1579,7 +1579,7 @@ int msm_venc_s_param(struct msm_vidc_inst *inst, /* Check max allowed rate */ if (input_rate > max_rate) { i_vpr_e(inst, - "%s: Unsupported rate %u, max_fps %u, type: %u\n", + "%s: Unsupported rate %llu, max_fps %u, type: %u\n", __func__, input_rate, max_rate, s_parm->type); rc = -ENOTSUPP; goto exit; @@ -1598,7 +1598,7 @@ set_default: } /* - * In static case, frame rate is set during via + * In static case, frame rate is set via * inst database set function mentioned in * FRAME_RATE cap id. * In dynamic case, frame rate is set like below. From 51c2ce468dc9f1b64a800183415a5ea9e5fe1119 Mon Sep 17 00:00:00 2001 From: Vikash Garodia Date: Fri, 12 Feb 2021 22:51:32 +0530 Subject: [PATCH 0157/1061] msm: driver: configure video context bank for best fit With best fit configuration, the probability of getting a mapping for video buffer increases even when the system is fragmented. Change-Id: I8689447ce1341fd1189b543eb9fb6a2e03edcc94 Signed-off-by: Vikash Garodia --- driver/vidc/src/msm_vidc_dt.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/driver/vidc/src/msm_vidc_dt.c b/driver/vidc/src/msm_vidc_dt.c index 41a3d4e1ba..f0616155c3 100644 --- a/driver/vidc/src/msm_vidc_dt.c +++ b/driver/vidc/src/msm_vidc_dt.c @@ -4,6 +4,7 @@ */ #include +#include #include #include @@ -799,6 +800,12 @@ static int msm_vidc_setup_context_bank(struct msm_vidc_core *core, cb->domain = iommu_get_domain_for_dev(cb->dev); + /* + * When memory is fragmented, below configuration increases the + * possibility to get a mapping for buffer in the configured CB. + */ + iommu_dma_enable_best_fit_algo(cb->dev); + /* * configure device segment size and segment boundary to ensure * iommu mapping returns one mapping (which is required for partial From 660008370e6c60d56a1abb044b456987648200e5 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Tue, 2 Mar 2021 19:14:03 -0800 Subject: [PATCH 0158/1061] video: driver: Add NAL length based encoding Add support to set HFI_PROP_NAL_LENGTH_FIELD property to video firmware. Change-Id: I20db36bad394fe0b5163a156199340836af3f740 Signed-off-by: Akshata Sahukar --- driver/platform/waipio/src/msm_vidc_waipio.c | 20 +++++++++++ driver/vidc/inc/hfi_property.h | 14 ++++++++ driver/vidc/inc/msm_vidc_control.h | 2 ++ driver/vidc/inc/msm_vidc_internal.h | 2 ++ driver/vidc/src/msm_vidc_control.c | 36 ++++++++++++++++++++ 5 files changed, 74 insertions(+) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index b2b204627e..a0191e6f9c 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -279,6 +279,26 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_SEQ_HEADER_NAL}, + {WITHOUT_STARTCODE, ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE, + HFI_PROP_NAL_LENGTH_FIELD, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + {0}, {0}, + NULL, msm_vidc_set_nal_length}, + + {NAL_LENGTH_FIELD, ENC, CODECS_ALL, + V4L2_MPEG_VIDEO_HEVC_SIZE_0, + V4L2_MPEG_VIDEO_HEVC_SIZE_4, + BIT(V4L2_MPEG_VIDEO_HEVC_SIZE_0) | + BIT(V4L2_MPEG_VIDEO_HEVC_SIZE_4), + V4L2_MPEG_VIDEO_HEVC_SIZE_0, + V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD, + HFI_PROP_NAL_LENGTH_FIELD, + CAP_FLAG_MENU | CAP_FLAG_OUTPUT_PORT}, + /* TODO: Firmware introduced enumeration type for this * with and without seq header. */ diff --git a/driver/vidc/inc/hfi_property.h b/driver/vidc/inc/hfi_property.h index 6afbe3fd02..e89d5f3b35 100644 --- a/driver/vidc/inc/hfi_property.h +++ b/driver/vidc/inc/hfi_property.h @@ -476,6 +476,20 @@ enum hfi_picture_type { #define HFI_BITMASK_RAW_HEIGHT 0x0000ffff #define HFI_PROP_RAW_RESOLUTION 0x03000178 +#define HFI_PROP_DPB_TAG_LIST 0x03000179 + +#define HFI_PROP_DPB_LIST 0x0300017A + +enum hfi_nal_length_field_type { + HFI_NAL_LENGTH_STARTCODES = 0, + HFI_NAL_LENGTH_SIZE_4 = 4, +}; +#define HFI_PROP_NAL_LENGTH_FIELD 0x0300017B + +#define HFI_PROP_TOTAL_PEAK_BITRATE 0x0300017C + +#define HFI_PROP_MAINTAIN_MIN_QUALITY 0x0300017D + #define HFI_PROP_END 0x03FFFFFF #define HFI_SESSION_ERROR_BEGIN 0x04000000 diff --git a/driver/vidc/inc/msm_vidc_control.h b/driver/vidc/inc/msm_vidc_control.h index 5dee318288..13ad1d2292 100644 --- a/driver/vidc/inc/msm_vidc_control.h +++ b/driver/vidc/inc/msm_vidc_control.h @@ -57,6 +57,8 @@ int msm_vidc_set_constant_quality(void *instance, enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_use_and_mark_ltr(void *instance, enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_nal_length(void* instance, + enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_s32(void *instance, enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_array(void *instance, diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index aaa09d4496..b2f0cae72c 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -329,6 +329,8 @@ enum msm_vidc_inst_capability_type { HEADER_MODE, PREPEND_SPSPPS_TO_IDR, META_SEQ_HDR_NAL, + WITHOUT_STARTCODE, + NAL_LENGTH_FIELD, REQUEST_I_FRAME, BIT_RATE, BITRATE_MODE, diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index bc50920133..b364517533 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -1550,6 +1550,32 @@ int msm_vidc_set_slice_count(void* instance, return rc; } +int msm_vidc_set_nal_length(void* instance, + enum msm_vidc_inst_capability_type cap_id) +{ + int rc = 0; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; + u32 hfi_value = HFI_NAL_LENGTH_STARTCODES; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (!inst->capabilities->cap[WITHOUT_STARTCODE].value) { + hfi_value = HFI_NAL_LENGTH_STARTCODES; + } else { + rc = msm_vidc_v4l2_to_hfi_enum(inst, NAL_LENGTH_FIELD, &hfi_value); + if (rc) + return -EINVAL; + } + + rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32_ENUM, + &hfi_value, sizeof(u32), __func__); + + return rc; +} + /* TODO int msm_vidc_set_flip(void *instance, enum msm_vidc_inst_capability_type cap_id) @@ -1863,6 +1889,16 @@ int msm_vidc_v4l2_to_hfi_enum(struct msm_vidc_inst *inst, goto set_default; } return 0; + case V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD: + switch (capability->cap[cap_id].value) { + case V4L2_MPEG_VIDEO_HEVC_SIZE_4: + *value = HFI_NAL_LENGTH_SIZE_4; + break; + default: + *value = HFI_NAL_LENGTH_STARTCODES; + goto set_default; + } + return 0; default: i_vpr_e(inst, "%s: mapping not specified for ctrl_id: %#x\n", From 57637ef8e02b4d0f329ac4acd8a53eb16fe93029 Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Wed, 3 Mar 2021 18:11:20 -0800 Subject: [PATCH 0159/1061] video: driver: add thumbnail mode and priority controls add thumbnail mode and priority private controls. Change-Id: Ie274d8ab429978d12054e5a07956f34e025b8e1f Signed-off-by: Darshana Patil --- include/uapi/vidc/media/v4l2_vidc_extensions.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/include/uapi/vidc/media/v4l2_vidc_extensions.h b/include/uapi/vidc/media/v4l2_vidc_extensions.h index 20f39ba809..f0990d2694 100644 --- a/include/uapi/vidc/media/v4l2_vidc_extensions.h +++ b/include/uapi/vidc/media/v4l2_vidc_extensions.h @@ -138,6 +138,10 @@ enum v4l2_mpeg_vidc_blur_types { /* Encoder Super frame control */ #define V4L2_CID_MPEG_VIDC_SUPERFRAME (V4L2_CID_MPEG_VIDC_BASE + 0x28) +/* Thumbnail Mode control */ +#define V4L2_CID_MPEG_VIDC_THUMBNAIL_MODE (V4L2_CID_MPEG_VIDC_BASE + 0x29) +/* Priority control */ +#define V4L2_CID_MPEG_VIDC_PRIORITY (V4L2_CID_MPEG_VIDC_BASE + 0x2A) enum v4l2_mpeg_vidc_metapayload_header_flags { METADATA_FLAGS_NONE = 0, From 596ca194de7e2f227cec96e7880dada30a10234c Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Mon, 1 Mar 2021 13:13:22 -0800 Subject: [PATCH 0160/1061] video: driver: add thumbnail and priority support - add thumbnail mode and priority in database. - modify output min count for thumbnail session - deprecate is_turbo_session. - deprecate flags variable in instance structure and use database entries. Change-Id: I04a3386f1e2eb9fb97bd550d6f169f9510f462c8 Signed-off-by: Darshana Patil --- driver/platform/waipio/src/msm_vidc_waipio.c | 10 +- driver/variant/iris2/src/msm_vidc_iris2.c | 5 +- .../variant/iris2/src/msm_vidc_power_iris2.c | 2 +- driver/vidc/inc/msm_vidc_driver.h | 15 +-- driver/vidc/inc/msm_vidc_inst.h | 1 - driver/vidc/inc/msm_vidc_internal.h | 8 +- driver/vidc/src/msm_vdec.c | 9 +- driver/vidc/src/msm_vidc_buffer.c | 2 +- driver/vidc/src/msm_vidc_control.c | 119 +++++++++++------- driver/vidc/src/msm_vidc_debug.c | 2 +- driver/vidc/src/msm_vidc_driver.c | 2 +- driver/vidc/src/msm_vidc_power.c | 4 +- 12 files changed, 107 insertions(+), 72 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index a0191e6f9c..f6030c5779 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -1059,7 +1059,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {THUMBNAIL_MODE, DEC, CODECS_ALL, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, - 0, + V4L2_CID_MPEG_VIDC_THUMBNAIL_MODE, HFI_PROP_THUMBNAIL_MODE}, {DEFAULT_HEADER, DEC, CODECS_ALL, @@ -1083,6 +1083,14 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { HFI_PROP_SEQ_CHANGE_AT_SYNC_FRAME, CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + {PRIORITY, DEC|ENC, CODECS_ALL, + 0, 2, 1, 1, + V4L2_CID_MPEG_VIDC_PRIORITY, + HFI_PROP_REALTIME, + CAP_FLAG_ROOT, + {0}, {0}, + NULL, NULL}, + {META_LTR_MARK_USE, ENC, CODECS_ALL, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, diff --git a/driver/variant/iris2/src/msm_vidc_iris2.c b/driver/variant/iris2/src/msm_vidc_iris2.c index f3db4c1323..1d6103e7d0 100644 --- a/driver/variant/iris2/src/msm_vidc_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_iris2.c @@ -639,13 +639,10 @@ int msm_vidc_decide_quality_mode_iris2(struct msm_vidc_inst* inst) max_hq_mbps = core->capabilities[MAX_MBPS_HQ].value;; /* Power saving always disabled for CQ and LOSSLESS RC modes. */ - if (inst->capabilities->cap[LOSSLESS].value || + if (capability->cap[LOSSLESS].value || (mbpf <= max_hq_mbpf && mbps <= max_hq_mbps)) mode = MSM_VIDC_MAX_QUALITY_MODE; - inst->flags = mode == MSM_VIDC_POWER_SAVE_MODE ? - inst->flags | VIDC_LOW_POWER : - inst->flags & ~VIDC_LOW_POWER; capability->cap[QUALITY_MODE].value = mode; return 0; diff --git a/driver/variant/iris2/src/msm_vidc_power_iris2.c b/driver/variant/iris2/src/msm_vidc_power_iris2.c index 37e0ecc09e..d9aa38ab84 100644 --- a/driver/variant/iris2/src/msm_vidc_power_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_power_iris2.c @@ -41,7 +41,7 @@ u64 msm_vidc_calc_freq_iris2(struct msm_vidc_inst *inst, u32 data_size) fw_vpp_cycles = fps * core->capabilities[MB_CYCLES_FW_VPP].value; if (inst->domain == MSM_VIDC_ENCODER) { - vpp_cycles_per_mb = inst->flags & VIDC_LOW_POWER ? + vpp_cycles_per_mb = is_low_power_session(inst) ? core->capabilities[MB_CYCLES_LP].value : core->capabilities[MB_CYCLES_VPP].value; diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 351e4abaaa..a0d5979264 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -26,7 +26,7 @@ static inline is_encode_session(struct msm_vidc_inst *inst) static inline is_secure_session(struct msm_vidc_inst *inst) { - return false; + return !!(inst->capabilities->cap[SECURE_MODE].value); } static inline is_input_buffer(enum msm_vidc_buffer_type buffer_type) @@ -145,24 +145,21 @@ static inline bool is_secondary_output_mode(struct msm_vidc_inst *inst) return false; // TODO: inst->stream_output_mode == HAL_VIDEO_DECODER_SECONDARY; } -static inline bool is_turbo_session(struct msm_vidc_inst *inst) -{ - return !!(inst->flags & VIDC_TURBO); -} - static inline bool is_thumbnail_session(struct msm_vidc_inst *inst) { - return !!(inst->flags & VIDC_THUMBNAIL); + return false; + // todo: return !!(inst->capabilities->cap[THUMBNAIL_MODE].value); } static inline bool is_low_power_session(struct msm_vidc_inst *inst) { - return !!(inst->flags & VIDC_LOW_POWER); + return (inst->capabilities->cap[QUALITY_MODE].value == + MSM_VIDC_POWER_SAVE_MODE); } static inline bool is_realtime_session(struct msm_vidc_inst *inst) { - return false; // TODO: fix it + return !inst->capabilities->cap[PRIORITY].value; } static inline bool is_active_session(u64 prev, u64 curr) diff --git a/driver/vidc/inc/msm_vidc_inst.h b/driver/vidc/inc/msm_vidc_inst.h index 798d925350..4b8459a6fa 100644 --- a/driver/vidc/inc/msm_vidc_inst.h +++ b/driver/vidc/inc/msm_vidc_inst.h @@ -108,7 +108,6 @@ struct msm_vidc_inst { struct msm_vidc_rectangle crop; struct msm_vidc_rectangle compose; struct msm_vidc_power power; - enum msm_vidc_modes flags; struct vidc_bus_vote_data bus_data; struct msm_vidc_buffers_info buffers; struct msm_vidc_mappings_info mappings; diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index b2f0cae72c..ab8e485beb 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -413,6 +413,7 @@ enum msm_vidc_inst_capability_type { DEFAULT_HEADER, RAP_FRAME, SEQ_CHANGE_AT_SYNC_FRAME, + PRIORITY, META_LTR_MARK_USE, META_DPB_MISR, META_OPB_MISR, @@ -680,13 +681,6 @@ struct msm_vidc_decode_batch { struct delayed_work work; }; -enum msm_vidc_modes { - VIDC_SECURE = BIT(0), - VIDC_TURBO = BIT(1), - VIDC_THUMBNAIL = BIT(2), - VIDC_LOW_POWER = BIT(3), -}; - enum load_calc_quirks { LOAD_POWER = 0, LOAD_ADMISSION_CONTROL = 1, diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 26c0fa9013..ed2a6f8b10 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -669,6 +669,7 @@ static int msm_vdec_set_realtime(struct msm_vidc_inst *inst, return -EINVAL; } + realtime = inst->capabilities->cap[PRIORITY].value; i_vpr_h(inst, "%s: priority: %d", __func__, realtime); rc = venus_hfi_session_property(inst, HFI_PROP_REALTIME, @@ -1378,7 +1379,13 @@ static int msm_vdec_read_input_subcr_params(struct msm_vidc_inst *inst) } inst->buffers.output.min_count = subsc_params.fw_min_count; - + if (is_thumbnail_session(inst) && inst->codec != MSM_VIDC_VP9) { + if (inst->buffers.output.min_count != 1) { + i_vpr_e(inst, "%s: invalid min count %d in thumbnail case\n", + __func__, inst->buffers.output.min_count); + msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); + } + } inst->crop.top = subsc_params.crop_offsets[0] & 0xFFFF; inst->crop.left = (subsc_params.crop_offsets[0] >> 16) & 0xFFFF; inst->crop.height = inst->fmts[INPUT_PORT].fmt.pix_mp.height - diff --git a/driver/vidc/src/msm_vidc_buffer.c b/driver/vidc/src/msm_vidc_buffer.c index 334238c395..8b2f9df4e5 100644 --- a/driver/vidc/src/msm_vidc_buffer.c +++ b/driver/vidc/src/msm_vidc_buffer.c @@ -59,7 +59,7 @@ u32 msm_vidc_output_min_count(struct msm_vidc_inst *inst) return 0; if (is_thumbnail_session(inst)) - return inst->codec == MSM_VIDC_VP9 ? 8 : 1; + return 1; if (is_decode_session(inst)) { switch (inst->codec) { diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index b364517533..d7904af970 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -119,7 +119,57 @@ static const char * const * msm_vidc_get_qmenu_type( } } -static const char *msm_vidc_get_priv_ctrl_name(struct msm_vidc_inst *inst, u32 control_id) +static const char *msm_vidc_get_priv_ctrl_name_list2(struct msm_vidc_inst *inst, + u32 control_id) +{ + switch (control_id) { + case V4L2_CID_MPEG_VIDC_HEVC_I_FRAME_MIN_QP: + return "HEVC I Frame Min QP"; + case V4L2_CID_MPEG_VIDC_HEVC_P_FRAME_MIN_QP: + return "HEVC P Frame Min QP"; + case V4L2_CID_MPEG_VIDC_HEVC_I_FRAME_MAX_QP: + return "HEVC I Frame Max QP"; + case V4L2_CID_MPEG_VIDC_HEVC_P_FRAME_MAX_QP: + return "HEVC P Frame Max QP"; + case V4L2_CID_MPEG_VIDC_METADATA_LTR_MARK_USE_DETAILS: + return "LTR Mark Use Details Metadata"; + case V4L2_CID_MPEG_VIDC_METADATA_SEQ_HEADER_NAL: + return "Seq Header NAL Metadata"; + case V4L2_CID_MPEG_VIDC_METADATA_DPB_LUMA_CHROMA_MISR: + return "DPB Luma-Chroma MISR Metadata"; + case V4L2_CID_MPEG_VIDC_METADATA_OPB_LUMA_CHROMA_MISR: + return "OPB Luma-Chroma MISR Metadata"; + case V4L2_CID_MPEG_VIDC_METADATA_INTERLACE: + return "Interlace Metadata"; + case V4L2_CID_MPEG_VIDC_METADATA_CONCEALED_MB_COUNT: + return "Concealed MB Count Metadata"; + case V4L2_CID_MPEG_VIDC_METADATA_HISTOGRAM_INFO: + return "Historgram Info Metadata"; + case V4L2_CID_MPEG_VIDC_METADATA_SEI_MASTERING_DISPLAY_COLOUR: + return "SEI Mastering Display Color Metadata"; + case V4L2_CID_MPEG_VIDC_METADATA_SEI_CONTENT_LIGHT_LEVEL: + return "SEI Content Lighting Level Metadata"; + case V4L2_CID_MPEG_VIDC_METADATA_HDR10PLUS: + return "HDR10PLUS Metadata"; + case V4L2_CID_MPEG_VIDC_METADATA_EVA_STATS: + return "EVA Stats Metadata"; + case V4L2_CID_MPEG_VIDC_METADATA_BUFFER_TAG: + return "Buffer Tag Metadata"; + case V4L2_CID_MPEG_VIDC_METADATA_SUBFRAME_OUTPUT: + return "Subframe Output Metadata"; + case V4L2_CID_MPEG_VIDC_METADATA_ROI_INFO: + return "ROI Info Metadata"; + case V4L2_CID_MPEG_VIDC_METADATA_TIMESTAMP: + return "Timestamp Metadata"; + case V4L2_CID_MPEG_VIDC_METADATA_ENC_QP_METADATA: + return "Encoder QP Metadata"; + default: + return NULL; + } +} + +static const char *msm_vidc_get_priv_ctrl_name_list1(struct msm_vidc_inst *inst, + u32 control_id) { switch (control_id) { case V4L2_CID_MPEG_VIDC_SECURE: @@ -162,56 +212,39 @@ static const char *msm_vidc_get_priv_ctrl_name(struct msm_vidc_inst *inst, u32 c return "H264 Display Delay"; case V4L2_CID_MPEG_MFC51_VIDEO_DECODER_H264_DISPLAY_DELAY_ENABLE: return "H264 Display Delay Enable"; - case V4L2_CID_MPEG_VIDC_METADATA_LTR_MARK_USE_DETAILS: - return "LTR Mark Use Details Metadata"; - case V4L2_CID_MPEG_VIDC_METADATA_SEQ_HEADER_NAL: - return "Seq Header NAL Metadata"; - case V4L2_CID_MPEG_VIDC_METADATA_DPB_LUMA_CHROMA_MISR: - return "DPB Luma-Chroma MISR Metadata"; - case V4L2_CID_MPEG_VIDC_METADATA_OPB_LUMA_CHROMA_MISR: - return "OPB Luma-Chroma MISR Metadata"; - case V4L2_CID_MPEG_VIDC_METADATA_INTERLACE: - return "Interlace Metadata"; - case V4L2_CID_MPEG_VIDC_METADATA_CONCEALED_MB_COUNT: - return "Concealed MB Count Metadata"; - case V4L2_CID_MPEG_VIDC_METADATA_HISTOGRAM_INFO: - return "Historgram Info Metadata"; - case V4L2_CID_MPEG_VIDC_METADATA_SEI_MASTERING_DISPLAY_COLOUR: - return "SEI Mastering Display Color Metadata"; - case V4L2_CID_MPEG_VIDC_METADATA_SEI_CONTENT_LIGHT_LEVEL: - return "SEI Content Lighting Level Metadata"; - case V4L2_CID_MPEG_VIDC_METADATA_HDR10PLUS: - return "HDR10PLUS Metadata"; - case V4L2_CID_MPEG_VIDC_METADATA_EVA_STATS: - return "EVA Stats Metadata"; - case V4L2_CID_MPEG_VIDC_METADATA_BUFFER_TAG: - return "Buffer Tag Metadata"; - case V4L2_CID_MPEG_VIDC_METADATA_SUBFRAME_OUTPUT: - return "Subframe Output Metadata"; - case V4L2_CID_MPEG_VIDC_METADATA_ROI_INFO: - return "ROI Info Metadata"; - case V4L2_CID_MPEG_VIDC_METADATA_TIMESTAMP: - return "Timestamp Metadata"; - case V4L2_CID_MPEG_VIDC_METADATA_ENC_QP_METADATA: - return "Encoder QP Metadata"; case V4L2_CID_MPEG_VIDC_MIN_BITSTREAM_SIZE_OVERWRITE: return "Bitstream Size Overwrite"; - case V4L2_CID_MPEG_VIDC_HEVC_I_FRAME_MIN_QP: - return "HEVC I Frame Min QP"; - case V4L2_CID_MPEG_VIDC_HEVC_P_FRAME_MIN_QP: - return "HEVC P Frame Min QP"; - case V4L2_CID_MPEG_VIDC_HEVC_I_FRAME_MAX_QP: - return "HEVC I Frame Max QP"; - case V4L2_CID_MPEG_VIDC_HEVC_P_FRAME_MAX_QP: - return "HEVC P Frame Max QP"; case V4L2_CID_MPEG_VIDC_SUPERFRAME: return "Encoder Batching Superframe"; + case V4L2_CID_MPEG_VIDC_THUMBNAIL_MODE: + return "Thumbnail Mode"; + case V4L2_CID_MPEG_VIDC_PRIORITY: + return "Priority"; default: - i_vpr_e(inst, "%s: ctrl name not available for ctrl id %#x\n", - __func__, control_id); return NULL; } } +/* + * Due to a long switch case function, ccn failure was observed. Hence the + * below function is split into msm_vidc_get_priv_ctrl_name_list1() and + * msm_vidc_get_priv_ctrl_name_list2() + */ +static const char *msm_vidc_get_priv_ctrl_name(struct msm_vidc_inst *inst, + u32 control_id) +{ + const char *ctrl_name; + + ctrl_name = msm_vidc_get_priv_ctrl_name_list1(inst, control_id); + if (ctrl_name) + return ctrl_name; + ctrl_name = msm_vidc_get_priv_ctrl_name_list2(inst, control_id); + if (ctrl_name) + return ctrl_name; + + i_vpr_e(inst, "%s: ctrl name not available for ctrl id %#x\n", + __func__, control_id); + return NULL; +} static int msm_vidc_packetize_control(struct msm_vidc_inst *inst, enum msm_vidc_inst_capability_type cap_id, u32 payload_type, diff --git a/driver/vidc/src/msm_vidc_debug.c b/driver/vidc/src/msm_vidc_debug.c index b68ad03b26..91c38a4c14 100644 --- a/driver/vidc/src/msm_vidc_debug.c +++ b/driver/vidc/src/msm_vidc_debug.c @@ -320,7 +320,7 @@ static ssize_t inst_info_read(struct file *file, char __user *buf, inst->capabilities->cap[FRAME_RATE].value >> 16); cur += write_str(cur, end - cur, "state: %d\n", inst->state); cur += write_str(cur, end - cur, "secure: %d\n", - !!(inst->flags & VIDC_SECURE)); + is_secure_session(inst)); cur += write_str(cur, end - cur, "-----------Formats-------------\n"); for (i = 0; i < MAX_PORT; i++) { if (i != INPUT_PORT && i != OUTPUT_PORT) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 8d832af426..5d58e707ac 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -2964,7 +2964,7 @@ int msm_vidc_print_inst_info(struct msm_vidc_inst *inst) return -EINVAL; } - is_secure = !!(inst->flags & VIDC_SECURE); + is_secure = is_secure_session(inst); is_decode = inst->domain == MSM_VIDC_DECODER; port = is_decode ? INPUT_PORT : OUTPUT_PORT; width = inst->fmts[port].fmt.pix_mp.width; diff --git a/driver/vidc/src/msm_vidc_power.c b/driver/vidc/src/msm_vidc_power.c index 72018613b8..4bf125632a 100644 --- a/driver/vidc/src/msm_vidc_power.c +++ b/driver/vidc/src/msm_vidc_power.c @@ -494,8 +494,8 @@ int msm_vidc_scale_clocks(struct msm_vidc_inst *inst) if (!data_size) return 0; - if (inst->power.buffer_counter < DCVS_FTB_WINDOW || - is_turbo_session(inst)) { + //todo: add turbo session check + if (inst->power.buffer_counter < DCVS_FTB_WINDOW) { inst->power.min_freq = msm_vidc_max_freq(inst); inst->power.dcvs_flags = 0; } else if (msm_vidc_clock_voting) { From a7670d7f42ad7459a961d4a16dcc0a8f46e8f8ff Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Tue, 2 Mar 2021 20:35:55 +0530 Subject: [PATCH 0161/1061] video: driver: enable decoder batching support Added change to enable decoder batching feature. Batching willbe enabled only when below conditions were met. [1] platform supports batching [2] decode session [3] realtime session [4] non-thumbnail session [5] non-heif session [6] 2-stage decode only(low_latency not supported). Change-Id: I54b601814c3b5fa2077dc41c5b0ac84964c2674a Signed-off-by: Govindaraj Rajagopal --- driver/platform/waipio/src/msm_vidc_waipio.c | 2 + driver/variant/iris2/src/msm_vidc_iris2.c | 7 +- driver/vidc/inc/msm_vdec.h | 1 + driver/vidc/inc/msm_vidc_control.h | 2 + driver/vidc/inc/msm_vidc_core.h | 2 +- driver/vidc/inc/msm_vidc_driver.h | 8 +- driver/vidc/inc/msm_vidc_internal.h | 1 + driver/vidc/src/msm_vdec.c | 116 +++++++-- driver/vidc/src/msm_venc.c | 17 +- driver/vidc/src/msm_vidc_control.c | 11 +- driver/vidc/src/msm_vidc_driver.c | 239 ++++++++++++++++--- driver/vidc/src/msm_vidc_probe.c | 27 ++- 12 files changed, 355 insertions(+), 78 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index f6030c5779..0f62cf5688 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -166,8 +166,10 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { /* (4096 * 2304) / 256 */ {LOSSLESS_MBPF, ENC, H264|HEVC, 64, 36864, 1, 36864}, /* Batch Mode Decode */ + /* TODO: update with new values based on updated voltage corner */ {BATCH_MBPF, DEC, CODECS_ALL, 64, 34816, 1, 34816}, /* (4096 * 2304) / 256 */ + {BATCH_FPS, DEC, CODECS_ALL, 1, 120, 1, 120}, {SECURE_MBPF, ENC|DEC, CODECS_ALL, 64, 36864, 1, 36864}, /* ((1920 * 1088) / 256) * 480 fps */ {MBPS, ENC, CODECS_ALL, 64, 3916800, 1, 3916800}, diff --git a/driver/variant/iris2/src/msm_vidc_iris2.c b/driver/variant/iris2/src/msm_vidc_iris2.c index 1d6103e7d0..92ba209b86 100644 --- a/driver/variant/iris2/src/msm_vidc_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_iris2.c @@ -12,6 +12,7 @@ #include "msm_vidc_inst.h" #include "msm_vidc_core.h" #include "msm_vidc_driver.h" +#include "msm_vidc_control.h" #include "msm_vidc_dt.h" #include "msm_vidc_internal.h" #include "msm_vidc_buffer.h" @@ -564,7 +565,7 @@ int msm_vidc_decide_work_mode_iris2(struct msm_vidc_inst* inst) i_vpr_h(inst, "Configuring work mode = %u low latency = %u", work_mode, lowlatency); - inst->capabilities->cap[STAGE].value = work_mode; + msm_vidc_update_cap_value(inst, STAGE, work_mode, __func__); /* TODO If Encode then Set Low Latency (Enable/Disable) * and Update internal cap struct @@ -609,7 +610,7 @@ int msm_vidc_decide_work_route_iris2(struct msm_vidc_inst* inst) } i_vpr_h(inst, "Configuring work route = %u", work_route); - inst->capabilities->cap[PIPE].value = work_route; + msm_vidc_update_cap_value(inst, PIPE, work_route, __func__); return 0; } @@ -643,7 +644,7 @@ int msm_vidc_decide_quality_mode_iris2(struct msm_vidc_inst* inst) (mbpf <= max_hq_mbpf && mbps <= max_hq_mbps)) mode = MSM_VIDC_MAX_QUALITY_MODE; - capability->cap[QUALITY_MODE].value = mode; + msm_vidc_update_cap_value(inst, QUALITY_MODE, mode, __func__); return 0; } diff --git a/driver/vidc/inc/msm_vdec.h b/driver/vidc/inc/msm_vdec.h index 5371979159..0926cf1e23 100644 --- a/driver/vidc/inc/msm_vdec.h +++ b/driver/vidc/inc/msm_vdec.h @@ -29,5 +29,6 @@ int msm_vdec_init_input_subcr_params(struct msm_vidc_inst *inst); int msm_vdec_input_port_settings_change(struct msm_vidc_inst *inst); int msm_vdec_output_port_settings_change(struct msm_vidc_inst *inst); int msm_vdec_process_cmd(struct msm_vidc_inst *inst, u32 cmd); +int msm_vidc_queue_buffer_batch(struct msm_vidc_inst *inst); #endif // _MSM_VDEC_H_ diff --git a/driver/vidc/inc/msm_vidc_control.h b/driver/vidc/inc/msm_vidc_control.h index 13ad1d2292..0d7fd8a574 100644 --- a/driver/vidc/inc/msm_vidc_control.h +++ b/driver/vidc/inc/msm_vidc_control.h @@ -70,5 +70,7 @@ int msm_vidc_v4l2_menu_to_hfi(struct msm_vidc_inst *inst, enum msm_vidc_inst_capability_type cap_id, u32 *value); int msm_vidc_v4l2_to_hfi_enum(struct msm_vidc_inst *inst, enum msm_vidc_inst_capability_type cap_id, u32 *value); +int msm_vidc_update_cap_value(struct msm_vidc_inst *inst, u32 cap, + s32 adjusted_val, const char *func); #endif diff --git a/driver/vidc/inc/msm_vidc_core.h b/driver/vidc/inc/msm_vidc_core.h index 945aba30c0..a55b8a2fc7 100644 --- a/driver/vidc/inc/msm_vidc_core.h +++ b/driver/vidc/inc/msm_vidc_core.h @@ -88,8 +88,8 @@ struct msm_vidc_core { struct workqueue_struct *device_workq; struct delayed_work pm_work; struct workqueue_struct *pm_workq; + struct workqueue_struct *batch_workq; struct delayed_work fw_unload_work; - struct delayed_work batch_work; struct work_struct ssr_work; struct msm_vidc_core_power power; struct msm_vidc_ssr ssr; diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index a0d5979264..44ed1c4312 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -162,6 +162,11 @@ static inline bool is_realtime_session(struct msm_vidc_inst *inst) return !inst->capabilities->cap[PRIORITY].value; } +static inline bool is_lowlatency_session(struct msm_vidc_inst *inst) +{ + return !!(inst->capabilities->cap[LOWLATENCY_MODE].value); +} + static inline bool is_active_session(u64 prev, u64 curr) { u64 ts_delta; @@ -270,7 +275,7 @@ int msm_vidc_map_driver_buf(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buf); int msm_vidc_put_driver_buf(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buf); -int msm_vidc_queue_buffer(struct msm_vidc_inst *inst, struct vb2_buffer *vb2); +int msm_vidc_queue_buffer_single(struct msm_vidc_inst *inst, struct vb2_buffer *vb2); int msm_vidc_destroy_internal_buffer(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buffer); void msm_vidc_destroy_buffers(struct msm_vidc_inst *inst); @@ -317,5 +322,6 @@ int msm_vidc_init_instance_caps(struct msm_vidc_core* core); int msm_vidc_deinit_core_caps(struct msm_vidc_core* core); int msm_vidc_deinit_instance_caps(struct msm_vidc_core* core); int msm_vidc_update_debug_str(struct msm_vidc_inst *inst); +bool msm_vidc_allow_decode_batch(struct msm_vidc_inst *inst); #endif // _MSM_VIDC_DRIVER_H_ diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index ab8e485beb..87b7a62e26 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -307,6 +307,7 @@ enum msm_vidc_inst_capability_type { MBPF, LOSSLESS_MBPF, BATCH_MBPF, + BATCH_FPS, SECURE_MBPF, MBPS, POWER_SAVE_MBPS, diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index ed2a6f8b10..f450ae98f8 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -18,6 +18,9 @@ #include "msm_vidc_control.h" #include "venus_hfi.h" #include "hfi_packet.h" +/* TODO: update based on clips */ +#define MAX_DEC_BATCH_SIZE 6 +#define SKIP_BATCH_WINDOW 100 u32 msm_vdec_subscribe_for_psc_avc[] = { HFI_PROP_BITSTREAM_RESOLUTION, @@ -206,7 +209,7 @@ static int msm_vdec_set_bit_depth(struct msm_vidc_inst *inst, bitdepth = 10 << 16 | 10; inst->subcr_params[port].bit_depth = bitdepth; - inst->capabilities->cap[BIT_DEPTH].value = bitdepth; + msm_vidc_update_cap_value(inst, BIT_DEPTH, bitdepth, __func__); i_vpr_h(inst, "%s: bit depth: %d", __func__, bitdepth); rc = venus_hfi_session_property(inst, HFI_PROP_LUMA_CHROMA_BIT_DEPTH, @@ -1393,17 +1396,17 @@ static int msm_vdec_read_input_subcr_params(struct msm_vidc_inst *inst) inst->crop.width = inst->fmts[INPUT_PORT].fmt.pix_mp.width - ((subsc_params.crop_offsets[1] >> 16) & 0xFFFF); - inst->capabilities->cap[PROFILE].value = subsc_params.profile; - inst->capabilities->cap[LEVEL].value = subsc_params.level; - inst->capabilities->cap[HEVC_TIER].value = subsc_params.tier; - inst->capabilities->cap[POC].value = subsc_params.pic_order_cnt; - inst->capabilities->cap[BIT_DEPTH].value = subsc_params.bit_depth; + msm_vidc_update_cap_value(inst, PROFILE, subsc_params.profile, __func__); + msm_vidc_update_cap_value(inst, LEVEL, subsc_params.level, __func__); + msm_vidc_update_cap_value(inst, HEVC_TIER, subsc_params.tier, __func__); + msm_vidc_update_cap_value(inst, POC, subsc_params.pic_order_cnt, __func__); + msm_vidc_update_cap_value(inst, BIT_DEPTH, subsc_params.bit_depth, __func__); if (subsc_params.coded_frames & HFI_BITMASK_FRAME_MBS_ONLY_FLAG) - inst->capabilities->cap[CODED_FRAMES].value = - CODED_FRAMES_PROGRESSIVE; + msm_vidc_update_cap_value(inst, CODED_FRAMES, CODED_FRAMES_PROGRESSIVE, __func__); else - inst->capabilities->cap[CODED_FRAMES].value = - CODED_FRAMES_INTERLACE; + msm_vidc_update_cap_value(inst, CODED_FRAMES, CODED_FRAMES_INTERLACE, __func__); + + inst->decode_batch.enable = msm_vidc_allow_decode_batch(inst); return 0; } @@ -1543,6 +1546,8 @@ int msm_vdec_streamon_input(struct msm_vidc_inst *inst) if (rc) goto error; + inst->decode_batch.enable = msm_vidc_allow_decode_batch(inst); + return 0; error: @@ -1551,6 +1556,33 @@ error: return rc; } +static int schedule_batch_work(struct msm_vidc_inst *inst) +{ + struct msm_vidc_core *core; + + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + core = inst->core; + cancel_delayed_work(&inst->decode_batch.work); + queue_delayed_work(core->batch_workq, &inst->decode_batch.work, + msecs_to_jiffies(core->capabilities[DECODE_BATCH_TIMEOUT].value)); + + return 0; +} + +static int cancel_batch_work(struct msm_vidc_inst *inst) +{ + if (!inst) { + d_vpr_e("%s: Invalid arguments\n", __func__); + return -EINVAL; + } + cancel_delayed_work(&inst->decode_batch.work); + + return 0; +} + int msm_vdec_streamoff_output(struct msm_vidc_inst *inst) { int rc = 0; @@ -1560,6 +1592,8 @@ int msm_vdec_streamoff_output(struct msm_vidc_inst *inst) return -EINVAL; } + /* cancel pending batch work */ + cancel_batch_work(inst); rc = msm_vidc_session_streamoff(inst, OUTPUT_PORT); if (rc) return rc; @@ -1754,6 +1788,8 @@ int msm_vdec_streamon_output(struct msm_vidc_inst *inst) if (rc) goto error; + inst->decode_batch.enable = msm_vidc_allow_decode_batch(inst); + return 0; error: @@ -1765,13 +1801,43 @@ error: static int msm_vdec_qbuf_batch(struct msm_vidc_inst *inst, struct vb2_buffer *vb2) { - int rc = 0; + struct msm_vidc_buffer *buf; + enum msm_vidc_allow allow; + int count, rc; - if (!inst || !vb2) { + if (!inst || !vb2 || !inst->decode_batch.size) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - i_vpr_h(inst, "%s()\n", __func__); + + buf = msm_vidc_get_driver_buf(inst, vb2); + if (!buf) + return -EINVAL; + + allow = msm_vidc_allow_qbuf(inst, vb2->type); + if (allow == MSM_VIDC_DISALLOW) { + i_vpr_e(inst, "%s: qbuf not allowed\n", __func__); + return -EINVAL; + } else if (allow == MSM_VIDC_DEFER) { + print_vidc_buffer(VIDC_HIGH, "high", "qbuf deferred", inst, buf); + return 0; + } + + /* do not defer buffers initially to avoid latency issues */ + if (inst->power.buffer_counter > SKIP_BATCH_WINDOW) { + count = msm_vidc_num_buffers(inst, MSM_VIDC_BUF_OUTPUT, MSM_VIDC_ATTR_DEFERRED); + if (count < inst->decode_batch.size) { + print_vidc_buffer(VIDC_HIGH, "high", "batch-qbuf deferred", inst, buf); + schedule_batch_work(inst); + return 0; + } + + cancel_batch_work(inst); + } + + rc = msm_vidc_queue_buffer_batch(inst); + if (rc) + return rc; return rc; } @@ -1780,10 +1846,16 @@ int msm_vdec_qbuf(struct msm_vidc_inst *inst, struct vb2_buffer *vb2) { int rc = 0; - if (inst->decode_batch.enable) + if (!inst || !vb2) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + /* batch decoder output & meta buffer only */ + if (inst->decode_batch.enable && vb2->type == OUTPUT_MPLANE) rc = msm_vdec_qbuf_batch(inst, vb2); else - rc = msm_vidc_queue_buffer(inst, vb2); + rc = msm_vidc_queue_buffer_single(inst, vb2); return rc; } @@ -2142,11 +2214,9 @@ set_default: i_vpr_h(inst, "%s: type %u value %#x\n", __func__, s_parm->type, q16_rate); - if (is_frame_rate) { - capability->cap[FRAME_RATE].value = q16_rate; - } else { - capability->cap[OPERATING_RATE].value = q16_rate; - } + msm_vidc_update_cap_value(inst, + is_frame_rate ? FRAME_RATE : OPERATING_RATE, + q16_rate, __func__); exit: return rc; @@ -2290,6 +2360,10 @@ int msm_vdec_inst_init(struct msm_vidc_inst *inst) core = inst->core; INIT_DELAYED_WORK(&inst->decode_batch.work, msm_vidc_batch_handler); + if (core->capabilities[DECODE_BATCH].value) { + inst->decode_batch.enable = true; + inst->decode_batch.size = MAX_DEC_BATCH_SIZE; + } f = &inst->fmts[INPUT_PORT]; f->type = INPUT_MPLANE; @@ -2372,6 +2446,8 @@ int msm_vdec_inst_deinit(struct msm_vidc_inst *inst) d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } + /* cancel pending batch work */ + cancel_batch_work(inst); rc = msm_vidc_ctrl_deinit(inst); return rc; diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index 138e30f637..c968573c17 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -353,10 +353,8 @@ static int msm_venc_set_csc(struct msm_vidc_inst* inst, return -EINVAL; } - if (msm_venc_csc_required(inst)) - inst->capabilities->cap[CSC].value = 1; - else - inst->capabilities->cap[CSC].value = 0; + msm_vidc_update_cap_value(inst, CSC, + msm_venc_csc_required(inst) ? 1 : 0, __func__); csc = inst->capabilities->cap[CSC].value; i_vpr_h(inst, "%s: csc: %u\n", __func__, csc); @@ -955,7 +953,7 @@ int msm_venc_qbuf(struct msm_vidc_inst *inst, struct vb2_buffer *vb2) { int rc = 0; - rc = msm_vidc_queue_buffer(inst, vb2); + rc = msm_vidc_queue_buffer_single(inst, vb2); if (rc) return rc; @@ -1590,12 +1588,9 @@ set_default: i_vpr_h(inst, "%s: type %u value %#x\n", __func__, s_parm->type, q16_rate); - if (!is_frame_rate) { - capability->cap[OPERATING_RATE].value = q16_rate; - goto exit; - } else { - capability->cap[FRAME_RATE].value = q16_rate; - } + msm_vidc_update_cap_value(inst, + is_frame_rate ? FRAME_RATE : OPERATING_RATE, + q16_rate, __func__); /* * In static case, frame rate is set via diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index d7904af970..9b55cceaa4 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -359,9 +359,14 @@ static bool is_parent_available(struct msm_vidc_inst* inst, return false; } -static int msm_vidc_update_cap_value(struct msm_vidc_inst* inst, u32 cap, +int msm_vidc_update_cap_value(struct msm_vidc_inst *inst, u32 cap, s32 adjusted_val, const char *func) { + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + if (inst->capabilities->cap[cap].value != adjusted_val) i_vpr_h(inst, "%s: updated database value from %#x to %#x\n", @@ -508,7 +513,7 @@ static int msm_vidc_adjust_dynamic_property(struct msm_vidc_inst *inst, if (rc) goto exit; } else if (ctrl) { - capability->cap[cap_id].value = ctrl->val; + msm_vidc_update_cap_value(inst, cap_id, ctrl->val, __func__); } /* add children if cap value modified */ @@ -741,7 +746,7 @@ int msm_v4l2_op_s_ctrl(struct v4l2_ctrl *ctrl) capability->cap[cap_id].flags |= CAP_FLAG_CLIENT_SET; /* Static setting */ if (!inst->vb2q[OUTPUT_PORT].streaming) { - capability->cap[cap_id].value = ctrl->val; + msm_vidc_update_cap_value(inst, cap_id, ctrl->val, __func__); if (is_meta_ctrl(ctrl->id)) msm_vidc_update_meta_port_settings(inst); diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 5d58e707ac..b8ecd4f062 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -11,6 +11,7 @@ #include "msm_vidc_driver.h" #include "msm_vidc_platform.h" #include "msm_vidc_internal.h" +#include "msm_vidc_control.h" #include "msm_vidc_memory.h" #include "msm_vidc_debug.h" #include "msm_vidc_power.h" @@ -20,6 +21,7 @@ #include "venus_hfi.h" #include "venus_hfi_response.h" #include "hfi_packet.h" +extern struct msm_vidc_core *g_core; #define COUNT_BITS(a, out) { \ while ((a) >= 1) { \ @@ -1024,6 +1026,8 @@ bool msm_vidc_allow_streamoff(struct msm_vidc_inst *inst, u32 type) enum msm_vidc_allow msm_vidc_allow_qbuf(struct msm_vidc_inst *inst, u32 type) { + int port = 0; + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return MSM_VIDC_DISALLOW; @@ -1032,6 +1036,15 @@ enum msm_vidc_allow msm_vidc_allow_qbuf(struct msm_vidc_inst *inst, u32 type) i_vpr_e(inst, "%s: inst in error state\n", __func__); return MSM_VIDC_DISALLOW; } + + port = v4l2_type_to_driver_port(inst, type, __func__); + if (port < 0) + return MSM_VIDC_DISALLOW; + + /* defer queuing if streamon not completed */ + if (!inst->vb2q[port].streaming) + return MSM_VIDC_DEFER; + if (type == INPUT_META_PLANE || type == OUTPUT_META_PLANE) return MSM_VIDC_DEFER; @@ -1679,6 +1692,9 @@ struct msm_vidc_buffer *msm_vidc_get_driver_buf(struct msm_vidc_inst *inst, buf->attr &= MSM_VIDC_ATTR_READ_ONLY; } + /* treat every buffer as deferred buffer initially */ + buf->attr |= MSM_VIDC_ATTR_DEFERRED; + rc = vb2_buffer_to_driver(vb2, buf); if (rc) goto error; @@ -1736,7 +1752,7 @@ bool msm_vidc_is_super_buffer(struct msm_vidc_inst *inst) struct msm_vidc_inst_capability *capability = NULL; if (!inst || !inst->capabilities) { - i_vpr_e(inst, "%s: Invalid params\n", __func__); + d_vpr_e("%s: Invalid params\n", __func__); return false; } @@ -1745,49 +1761,98 @@ bool msm_vidc_is_super_buffer(struct msm_vidc_inst *inst) return !!capability->cap[SUPER_FRAME].value; } -int msm_vidc_queue_buffer(struct msm_vidc_inst *inst, struct vb2_buffer *vb2) +static bool is_single_session(struct msm_vidc_inst *inst) { - int rc = 0; - struct msm_vidc_buffer *buf; - struct msm_vidc_buffer *meta; - enum msm_vidc_allow allow; - int port; + struct msm_vidc_core *core; + u32 count = 0; - if (!inst || !vb2) { + if (!inst) { + d_vpr_e("%s: Invalid params\n", __func__); + return false; + } + core = inst->core; + + core_lock(core, __func__); + list_for_each_entry(inst, &core->instances, list) + count++; + core_unlock(core, __func__); + + return count == 1; +} + +bool msm_vidc_allow_decode_batch(struct msm_vidc_inst *inst) +{ + struct msm_vidc_core *core; + bool allow = false; + + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + core = inst->core; + + allow = inst->decode_batch.enable; + if (!allow) { + i_vpr_h(inst, "%s: batching already disabled\n", __func__); + goto exit; + } + + allow = core->capabilities[DECODE_BATCH].value; + if (!allow) { + i_vpr_h(inst, "%s: core doesn't support batching\n", __func__); + goto exit; + } + + allow = is_single_session(inst); + if (!allow) { + i_vpr_h(inst, "%s: multiple sessions running\n", __func__); + goto exit; + } + + allow = is_decode_session(inst); + if (!allow) { + i_vpr_h(inst, "%s: not a decoder session\n", __func__); + goto exit; + } + + allow = !is_thumbnail_session(inst); + if (!allow) { + i_vpr_h(inst, "%s: thumbnail session\n", __func__); + goto exit; + } + + allow = is_realtime_session(inst); + if (!allow) { + i_vpr_h(inst, "%s: non-realtime session\n", __func__); + goto exit; + } + + allow = !is_lowlatency_session(inst); + if (!allow) { + i_vpr_h(inst, "%s: lowlatency session\n", __func__); + goto exit; + } + +exit: + i_vpr_h(inst, "%s: batching %s\n", __func__, allow ? "enabled" : "disabled"); + + return allow; +} + +static int msm_vidc_queue_buffer(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buf) +{ + struct msm_vidc_buffer *meta; + int rc = 0; + + if (!inst || !buf || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - buf = msm_vidc_get_driver_buf(inst, vb2); - if (!buf) - return -EINVAL; - - /* skip queuing if streamon not completed */ - port = v4l2_type_to_driver_port(inst, vb2->type, __func__); - if (port < 0) - return -EINVAL; - - allow = msm_vidc_allow_qbuf(inst, vb2->type); - if (allow == MSM_VIDC_DISALLOW) { - i_vpr_e(inst, "%s: qbuf not allowed\n", __func__); - return -EINVAL; - } - - if (!inst->vb2q[port].streaming || allow == MSM_VIDC_DEFER) { - buf->attr |= MSM_VIDC_ATTR_DEFERRED; - print_vidc_buffer(VIDC_HIGH, "high", "qbuf deferred", inst, buf); - return 0; - } - - if (is_decode_session(inst) && - inst->capabilities->cap[CODEC_CONFIG].value) { + if (is_decode_session(inst) && is_input_buffer(buf->type) && + inst->capabilities->cap[CODEC_CONFIG].value) { buf->flags |= MSM_VIDC_BUF_FLAG_CODECCONFIG; - inst->capabilities->cap[CODEC_CONFIG].value = 0; - } - - if (buf->type == MSM_VIDC_BUF_INPUT) { - inst->power.buffer_counter++; - msm_vidc_scale_power(inst, true); + msm_vidc_update_cap_value(inst, CODEC_CONFIG, 0, __func__); } print_vidc_buffer(VIDC_HIGH, "high", "qbuf", inst, buf); @@ -1819,6 +1884,70 @@ int msm_vidc_queue_buffer(struct msm_vidc_inst *inst, struct vb2_buffer *vb2) else if (buf->type == MSM_VIDC_BUF_OUTPUT) msm_vidc_debugfs_update(inst, MSM_VIDC_DEBUGFS_EVENT_FTB); + return 0; +} + +int msm_vidc_queue_buffer_batch(struct msm_vidc_inst *inst) +{ + struct msm_vidc_buffers *buffers; + struct msm_vidc_buffer *buf; + int rc = 0; + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + buffers = msm_vidc_get_buffers(inst, MSM_VIDC_BUF_OUTPUT, __func__); + if (!buffers) + return -EINVAL; + + msm_vidc_scale_power(inst, true); + + list_for_each_entry(buf, &buffers->list, list) { + if (!(buf->attr & MSM_VIDC_ATTR_DEFERRED)) + continue; + rc = msm_vidc_queue_buffer(inst, buf); + if (rc) + return rc; + } + + return 0; +} + +int msm_vidc_queue_buffer_single(struct msm_vidc_inst *inst, struct vb2_buffer *vb2) +{ + int rc = 0; + struct msm_vidc_buffer *buf; + enum msm_vidc_allow allow; + + if (!inst || !vb2) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + buf = msm_vidc_get_driver_buf(inst, vb2); + if (!buf) + return -EINVAL; + + allow = msm_vidc_allow_qbuf(inst, vb2->type); + if (allow == MSM_VIDC_DISALLOW) { + i_vpr_e(inst, "%s: qbuf not allowed\n", __func__); + return -EINVAL; + } else if (allow == MSM_VIDC_DEFER) { + print_vidc_buffer(VIDC_HIGH, "high", "qbuf deferred", inst, buf); + return 0; + } + + if (buf->type == MSM_VIDC_BUF_INPUT) { + inst->power.buffer_counter++; + msm_vidc_scale_power(inst, true); + } + + rc = msm_vidc_queue_buffer(inst, buf); + if (rc) + return rc; + return rc; } @@ -2558,6 +2687,9 @@ int msm_vidc_session_streamoff(struct msm_vidc_inst *inst, rc = -EINVAL; goto error; } + + /* flush deferred buffers */ + msm_vidc_flush_buffers(inst, buffer_type); return 0; error: @@ -3106,6 +3238,39 @@ void msm_vidc_fw_unload_handler(struct work_struct *work) void msm_vidc_batch_handler(struct work_struct *work) { + struct msm_vidc_inst *inst; + enum msm_vidc_allow allow; + int rc = 0; + + inst = container_of(work, struct msm_vidc_inst, decode_batch.work.work); + inst = get_inst_ref(g_core, inst); + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return; + } + + inst_lock(inst, __func__); + if (is_session_error(inst)) { + i_vpr_e(inst, "%s: failled. Session error\n", __func__); + goto exit; + } + + allow = msm_vidc_allow_qbuf(inst, OUTPUT_MPLANE); + if (allow != MSM_VIDC_ALLOW) { + i_vpr_e(inst, "%s: not allowed in state: %s\n", __func__, state_name(inst->state)); + goto exit; + } + + i_vpr_h(inst, "%s: queue pending batch buffers\n", __func__); + rc = msm_vidc_queue_buffer_batch(inst); + if (rc) { + i_vpr_e(inst, "%s: batch qbufs failed\n", __func__); + msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); + } + +exit: + inst_unlock(inst, __func__); + put_inst(inst); } int msm_vidc_flush_buffers(struct msm_vidc_inst* inst, diff --git a/driver/vidc/src/msm_vidc_probe.c b/driver/vidc/src/msm_vidc_probe.c index 8f9dcdc5f0..6955846806 100644 --- a/driver/vidc/src/msm_vidc_probe.c +++ b/driver/vidc/src/msm_vidc_probe.c @@ -180,12 +180,19 @@ static int msm_vidc_deinitialize_core(struct msm_vidc_core *core) mutex_destroy(&core->lock); msm_vidc_change_core_state(core, MSM_VIDC_CORE_DEINIT, __func__); + if (core->batch_workq) + destroy_workqueue(core->batch_workq); + if (core->pm_workq) destroy_workqueue(core->pm_workq); if (core->device_workq) destroy_workqueue(core->device_workq); + core->batch_workq = NULL; + core->pm_workq = NULL; + core->device_workq = NULL; + return rc; } @@ -211,7 +218,13 @@ static int msm_vidc_initialize_core(struct msm_vidc_core *core) core->pm_workq = create_singlethread_workqueue("pm_workq"); if (!core->pm_workq) { d_vpr_e("%s: create pm workq failed\n", __func__); - destroy_workqueue(core->device_workq); + rc = -EINVAL; + goto exit; + } + + core->batch_workq = create_singlethread_workqueue("batch_workq"); + if (!core->batch_workq) { + d_vpr_e("%s: create batch workq failed\n", __func__); rc = -EINVAL; goto exit; } @@ -224,10 +237,20 @@ static int msm_vidc_initialize_core(struct msm_vidc_core *core) INIT_WORK(&core->smmu_fault_work, msm_vidc_smmu_fault_work_handler); INIT_DELAYED_WORK(&core->pm_work, venus_hfi_pm_work_handler); INIT_DELAYED_WORK(&core->fw_unload_work, msm_vidc_fw_unload_handler); - INIT_DELAYED_WORK(&core->batch_work, msm_vidc_batch_handler); INIT_WORK(&core->ssr_work, msm_vidc_ssr_handler); + return 0; exit: + if (core->batch_workq) + destroy_workqueue(core->batch_workq); + if (core->pm_workq) + destroy_workqueue(core->pm_workq); + if (core->device_workq) + destroy_workqueue(core->device_workq); + core->batch_workq = NULL; + core->pm_workq = NULL; + core->device_workq = NULL; + return rc; } From 11642f31441d25b385d7dfaf93601675d58c0137 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Thu, 4 Mar 2021 02:55:35 -0800 Subject: [PATCH 0162/1061] video: driver: align buffer hfi interface file with CI: 29135164 Align hfi_buffer_iris2.h file with corresponding hfi interface file. Change-Id: I2af476ad71e4aa99c93492be7d358087a38c79ce Signed-off-by: Akshata Sahukar --- driver/variant/iris2/inc/hfi_buffer_iris2.h | 39 +++++++++++-------- .../variant/iris2/src/msm_vidc_buffer_iris2.c | 6 ++- 2 files changed, 27 insertions(+), 18 deletions(-) diff --git a/driver/variant/iris2/inc/hfi_buffer_iris2.h b/driver/variant/iris2/inc/hfi_buffer_iris2.h index 8d2690484d..9c12ec1dc2 100644 --- a/driver/variant/iris2/inc/hfi_buffer_iris2.h +++ b/driver/variant/iris2/inc/hfi_buffer_iris2.h @@ -1273,7 +1273,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ num_recon = num_ref + 1; \ } while (0) -#define SIZE_BIN_BITSTREAM_ENC(_size, frame_width, frame_height, \ +#define SIZE_BIN_BITSTREAM_ENC(_size, rc_type, frame_width, frame_height, \ work_mode, lcu_size) \ do \ { \ @@ -1283,18 +1283,25 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ size_aligned_height = HFI_ALIGN((frame_height), lcu_size); \ if (work_mode == HFI_WORKMODE_2) \ { \ - bitstream_size_eval = (((size_aligned_width) * \ - (size_aligned_height)*3 * 5) >> 2); \ - if (size_aligned_width * size_aligned_height > \ - (4096 * 2176)) \ + if ((rc_type == HFI_RC_CQ) || (rc_type == HFI_RC_OFF)) \ { \ - bitstream_size_eval = \ - (bitstream_size_eval >> 3); \ + bitstream_size_eval = (((size_aligned_width)* (size_aligned_height)* 3) >> 1); \ } \ - else if (bitstream_size_eval > (352 * 288 * 4)) \ + else \ { \ - bitstream_size_eval = \ - (bitstream_size_eval >> 2); \ + bitstream_size_eval = (((size_aligned_width) * \ + (size_aligned_height)*3 * 5) >> 2); \ + if (size_aligned_width * size_aligned_height > \ + (4096 * 2176)) \ + { \ + bitstream_size_eval = \ + (bitstream_size_eval >> 3); \ + } \ + else if (size_aligned_width * size_aligned_height > (352 * 288 * 4)) \ + { \ + bitstream_size_eval = \ + (bitstream_size_eval >> 2); \ + } \ } \ } \ else \ @@ -1332,13 +1339,13 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ size = size_single_pipe_eval; \ } while (0) -#define HFI_BUFFER_BIN_ENC(_size, frame_width, frame_height, lcu_size, \ +#define HFI_BUFFER_BIN_ENC(_size, rc_type, frame_width, frame_height, lcu_size, \ work_mode, num_vpp_pipes) \ do \ { \ HFI_U32 bitstream_size = 0, total_bitbin_buffers = 0, \ size_single_pipe = 0, bitbin_size = 0; \ - SIZE_BIN_BITSTREAM_ENC(bitstream_size, frame_width, \ + SIZE_BIN_BITSTREAM_ENC(bitstream_size, rc_type, frame_width, \ frame_height, work_mode, lcu_size); \ if (work_mode == HFI_WORKMODE_2) \ { \ @@ -1359,19 +1366,19 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ total_bitbin_buffers + 512; \ } while (0) -#define HFI_BUFFER_BIN_H264E(_size, frame_width, frame_height, \ +#define HFI_BUFFER_BIN_H264E(_size, rc_type, frame_width, frame_height, \ work_mode, num_vpp_pipes) \ do \ { \ - HFI_BUFFER_BIN_ENC(_size, frame_width, frame_height, 16, \ + HFI_BUFFER_BIN_ENC(_size, rc_type, frame_width, frame_height, 16, \ work_mode, num_vpp_pipes); \ } while (0) -#define HFI_BUFFER_BIN_H265E(_size, frame_width, frame_height, \ +#define HFI_BUFFER_BIN_H265E(_size, rc_type, frame_width, frame_height, \ work_mode, num_vpp_pipes) \ do \ { \ - HFI_BUFFER_BIN_ENC(_size, frame_width, frame_height, 32,\ + HFI_BUFFER_BIN_ENC(_size, rc_type, frame_width, frame_height, 32,\ work_mode, num_vpp_pipes); \ } while (0) diff --git a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c index 99eb83223b..edf1f5acc6 100644 --- a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c @@ -267,9 +267,11 @@ static u32 msm_vidc_encoder_bin_size_iris2(struct msm_vidc_inst *inst) height = f->fmt.pix_mp.height; if (inst->codec == MSM_VIDC_H264) - HFI_BUFFER_BIN_H264E(size, width, height, stage, num_vpp_pipes); + HFI_BUFFER_BIN_H264E(size, inst->hfi_rc_type, width, + height, stage, num_vpp_pipes); else if (inst->codec == MSM_VIDC_HEVC) - HFI_BUFFER_BIN_H265E(size, width, height, stage, num_vpp_pipes); + HFI_BUFFER_BIN_H265E(size, inst->hfi_rc_type, width, + height, stage, num_vpp_pipes); i_vpr_l(inst, "%s: size %d\n", __func__, size); return size; From ab6b763fea476392a9e696acd24910733054979e Mon Sep 17 00:00:00 2001 From: Maheshwar Ajja Date: Tue, 2 Mar 2021 19:39:40 -0800 Subject: [PATCH 0163/1061] video: driver: allow output settings in DRAIN_START_INPUT state Allow output settings (reqest buffers, set format etc) in MSM_VIDC_DRAIN_START_INPUT state because output port is streamed off already. Change-Id: Ia00451a4cc85f3fe05820721235661bfe2d3de04 Signed-off-by: Maheshwar Ajja --- driver/vidc/src/msm_vidc_driver.c | 18 ++++++++++-------- 1 file changed, 10 insertions(+), 8 deletions(-) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 5d58e707ac..261575fda1 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -811,14 +811,15 @@ bool msm_vidc_allow_s_fmt(struct msm_vidc_inst *inst, u32 type) allow = true; goto exit; } - if (inst->state == MSM_VIDC_START_INPUT) { - if (type == OUTPUT_MPLANE || type == OUTPUT_META_PLANE) { + if (type == OUTPUT_MPLANE || type == OUTPUT_META_PLANE) { + if (inst->state == MSM_VIDC_START_INPUT || + inst->state == MSM_VIDC_DRAIN_START_INPUT) { allow = true; goto exit; } } - if (inst->state == MSM_VIDC_START_OUTPUT) { - if (type == INPUT_MPLANE || type == INPUT_META_PLANE) { + if (type == INPUT_MPLANE || type == INPUT_META_PLANE) { + if (inst->state == MSM_VIDC_START_OUTPUT) { allow = true; goto exit; } @@ -909,14 +910,15 @@ bool msm_vidc_allow_reqbufs(struct msm_vidc_inst *inst, u32 type) allow = true; goto exit; } - if (inst->state == MSM_VIDC_START_INPUT) { - if (type == OUTPUT_MPLANE || type == OUTPUT_META_PLANE) { + if (type == OUTPUT_MPLANE || type == OUTPUT_META_PLANE) { + if (inst->state == MSM_VIDC_START_INPUT || + inst->state == MSM_VIDC_DRAIN_START_INPUT) { allow = true; goto exit; } } - if (inst->state == MSM_VIDC_START_OUTPUT) { - if (type == INPUT_MPLANE || type == INPUT_META_PLANE) { + if (type == INPUT_MPLANE || type == INPUT_META_PLANE) { + if (inst->state == MSM_VIDC_START_OUTPUT) { allow = true; goto exit; } From 3f9d032aa136d45d75279d1669317fe3d8ef8864 Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Thu, 4 Mar 2021 11:18:14 -0800 Subject: [PATCH 0164/1061] video: driver: update sizeimage during set ctrl update input port sizeimage for a decode session during set control of bitsream size overwrite control. Change-Id: I4cb7d6c8d416f187e1ac557d3b423acfdbcb7a60 Signed-off-by: Darshana Patil --- driver/vidc/inc/msm_vidc_driver.h | 1 + driver/vidc/src/msm_vidc_control.c | 13 ++++++++++--- driver/vidc/src/msm_vidc_driver.c | 20 ++++++++++++++++++++ 3 files changed, 31 insertions(+), 3 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index a0d5979264..37112bd55c 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -309,6 +309,7 @@ bool core_lock_check(struct msm_vidc_core *core, const char *function); void inst_lock(struct msm_vidc_inst *inst, const char *function); void inst_unlock(struct msm_vidc_inst *inst, const char *function); bool inst_lock_check(struct msm_vidc_inst *inst, const char *function); +int msm_vidc_update_bitstream_buffer_size(struct msm_vidc_inst *inst); int msm_vidc_update_meta_port_settings(struct msm_vidc_inst *inst); void msm_vidc_schedule_core_deinit(struct msm_vidc_core *core); bool msm_vidc_is_super_buffer(struct msm_vidc_inst *inst); diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index d7904af970..46774d5fd6 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -743,9 +743,16 @@ int msm_v4l2_op_s_ctrl(struct v4l2_ctrl *ctrl) if (!inst->vb2q[OUTPUT_PORT].streaming) { capability->cap[cap_id].value = ctrl->val; - if (is_meta_ctrl(ctrl->id)) - msm_vidc_update_meta_port_settings(inst); - + if (ctrl->id == V4L2_CID_MPEG_VIDC_MIN_BITSTREAM_SIZE_OVERWRITE) { + rc = msm_vidc_update_bitstream_buffer_size(inst); + if (rc) + return rc; + } + if (is_meta_ctrl(ctrl->id)) { + rc = msm_vidc_update_meta_port_settings(inst); + if (rc) + return rc; + } return 0; } diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 5d58e707ac..a15078f1c2 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -3298,6 +3298,26 @@ void inst_unlock(struct msm_vidc_inst *inst, const char *function) mutex_unlock(&inst->lock); } +int msm_vidc_update_bitstream_buffer_size(struct msm_vidc_inst *inst) +{ + struct msm_vidc_core *core; + struct v4l2_format *fmt; + + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + core = inst->core; + + if (is_decode_session(inst)) { + fmt = &inst->fmts[INPUT_PORT]; + fmt->fmt.pix_mp.plane_fmt[0].sizeimage = call_session_op(core, + buffer_size, inst, MSM_VIDC_BUF_INPUT); + } + + return 0; +} + int msm_vidc_update_meta_port_settings(struct msm_vidc_inst *inst) { struct msm_vidc_core *core; From eab698711399daeaef48d1e32d1ab3d0e3016606 Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Fri, 5 Mar 2021 16:29:11 -0800 Subject: [PATCH 0165/1061] video: driver: add dpb tag list control add dpb tag list private control. Change-Id: I1bc409991e94ac455918eab41e6bdfb7a526b577 Signed-off-by: Darshana Patil --- include/uapi/vidc/media/v4l2_vidc_extensions.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/include/uapi/vidc/media/v4l2_vidc_extensions.h b/include/uapi/vidc/media/v4l2_vidc_extensions.h index f0990d2694..82cf512848 100644 --- a/include/uapi/vidc/media/v4l2_vidc_extensions.h +++ b/include/uapi/vidc/media/v4l2_vidc_extensions.h @@ -142,6 +142,9 @@ enum v4l2_mpeg_vidc_blur_types { #define V4L2_CID_MPEG_VIDC_THUMBNAIL_MODE (V4L2_CID_MPEG_VIDC_BASE + 0x29) /* Priority control */ #define V4L2_CID_MPEG_VIDC_PRIORITY (V4L2_CID_MPEG_VIDC_BASE + 0x2A) +/* Metadata DPB Tag List*/ +#define V4L2_CID_MPEG_VIDC_METADATA_DPB_TAG_LIST \ + (V4L2_CID_MPEG_VIDC_BASE + 0x2B) enum v4l2_mpeg_vidc_metapayload_header_flags { METADATA_FLAGS_NONE = 0, From 41d465f5cf447bc0ff2ee5b6c44ef1fdc0bd0db4 Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Fri, 5 Mar 2021 14:24:25 -0800 Subject: [PATCH 0166/1061] video: driver: add dpb tag list metadata support - add DPB tag list capability in database - subscribe in metadata mode for the dpb tag list property if enabled Change-Id: Id4b9b7392b7b26cccf0860d578b8a0cb8d798d04 Signed-off-by: Darshana Patil --- driver/platform/waipio/src/msm_vidc_waipio.c | 6 ++++++ driver/vidc/inc/msm_vidc_internal.h | 1 + driver/vidc/src/msm_vdec.c | 1 + driver/vidc/src/msm_vidc_control.c | 2 ++ 4 files changed, 10 insertions(+) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 0f62cf5688..1fe5c92fd4 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -1171,6 +1171,12 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_CID_MPEG_VIDC_METADATA_BUFFER_TAG, HFI_PROP_BUFFER_TAG}, + {META_DPB_TAG_LIST, DEC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_DPB_TAG_LIST, + HFI_PROP_DPB_TAG_LIST}, + {META_SUBFRAME_OUTPUT, DEC, CODECS_ALL, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 87b7a62e26..f383a733a6 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -427,6 +427,7 @@ enum msm_vidc_inst_capability_type { META_HDR10PLUS, META_EVA_STATS, META_BUF_TAG, + META_DPB_TAG_LIST, META_SUBFRAME_OUTPUT, META_ENC_QP_METADATA, META_ROI_INFO, diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index f450ae98f8..a70449841f 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -1147,6 +1147,7 @@ static int msm_vdec_subscribe_metadata(struct msm_vidc_inst *inst, META_SEI_CLL, META_HDR10PLUS, META_BUF_TAG, + META_DPB_TAG_LIST, META_SUBFRAME_OUTPUT, }; diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 3cb7a6fa05..590c513f16 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -163,6 +163,8 @@ static const char *msm_vidc_get_priv_ctrl_name_list2(struct msm_vidc_inst *inst, return "Timestamp Metadata"; case V4L2_CID_MPEG_VIDC_METADATA_ENC_QP_METADATA: return "Encoder QP Metadata"; + case V4L2_CID_MPEG_VIDC_METADATA_DPB_TAG_LIST: + return "DPB Tag List"; default: return NULL; } From 261f17368055c9b2e7faa2f02fb52957ebb0143d Mon Sep 17 00:00:00 2001 From: Mihir Ganu Date: Fri, 26 Feb 2021 10:39:27 -0800 Subject: [PATCH 0167/1061] video: driver: Enable HDR10/10+ encoder metadata Modify control database to allow hdr10/10+ metadata controls for encoder. Change-Id: I594bae02c9f768307422b20ef0d5fe18b5597056 Signed-off-by: Mihir Ganu --- driver/platform/waipio/src/msm_vidc_waipio.c | 6 +++--- driver/vidc/src/msm_vdec.c | 2 +- driver/vidc/src/venus_hfi_response.c | 2 +- 3 files changed, 5 insertions(+), 5 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 1fe5c92fd4..8034e829d2 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -1141,19 +1141,19 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_CID_MPEG_VIDC_METADATA_HISTOGRAM_INFO, HFI_PROP_HISTOGRAM_INFO}, - {META_SEI_MASTERING_DISP, DEC, CODECS_ALL, + {META_SEI_MASTERING_DISP, DEC | ENC, HEVC, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_SEI_MASTERING_DISPLAY_COLOUR, HFI_PROP_SEI_MASTERING_DISPLAY_COLOUR}, - {META_SEI_CLL, DEC, CODECS_ALL, + {META_SEI_CLL, DEC | ENC, HEVC, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_SEI_CONTENT_LIGHT_LEVEL, HFI_PROP_SEI_CONTENT_LIGHT_LEVEL}, - {META_HDR10PLUS, DEC, CODECS_ALL, + {META_HDR10PLUS, DEC | ENC, HEVC, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_HDR10PLUS, diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index a70449841f..c05caf51cb 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -210,7 +210,7 @@ static int msm_vdec_set_bit_depth(struct msm_vidc_inst *inst, inst->subcr_params[port].bit_depth = bitdepth; msm_vidc_update_cap_value(inst, BIT_DEPTH, bitdepth, __func__); - i_vpr_h(inst, "%s: bit depth: %d", __func__, bitdepth); + i_vpr_h(inst, "%s: bit depth: %#x", __func__, bitdepth); rc = venus_hfi_session_property(inst, HFI_PROP_LUMA_CHROMA_BIT_DEPTH, HFI_HOST_FLAGS_NONE, diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index a414277aed..d0de95a877 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -26,7 +26,7 @@ void print_psc_properties(const char *str, struct msm_vidc_inst *inst, return; i_vpr_h(inst, - "%s: resolution %#x, crop offsets[0] %#x, crop offsets[1] %#x, bit depth %d, coded frames %d " + "%s: resolution %#x, crop offsets[0] %#x, crop offsets[1] %#x, bit depth %#x, coded frames %d " "fw min count %d, poc %d, color info %d, profile %d, level %d, tier %d ", str, subsc_params.bitstream_resolution, subsc_params.crop_offsets[0], subsc_params.crop_offsets[1], From 1a9c2e36bba8a72b85d234fedbe67c047b237e52 Mon Sep 17 00:00:00 2001 From: Chinmay Sawarkar Date: Fri, 26 Feb 2021 14:22:57 -0800 Subject: [PATCH 0168/1061] video: driver: Enable CR and CF Enable Compression Ratio and Complexity Factor property. Change-Id: Ia34ffe0a91b0b3b9941ccb0bbb0eacfdb16b51e9 Signed-off-by: Chinmay Sawarkar --- driver/vidc/inc/msm_vidc_internal.h | 2 ++ driver/vidc/src/msm_vdec.c | 34 ++++++++++++++++++++++++---- driver/vidc/src/msm_venc.c | 1 + driver/vidc/src/msm_vidc_power.c | 21 ++++++++--------- driver/vidc/src/venus_hfi_response.c | 6 +++++ 5 files changed, 47 insertions(+), 17 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index ab8e485beb..3fb215f52c 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -727,6 +727,8 @@ struct msm_vidc_power { u32 ddr_bw; u32 sys_cache_bw; u32 dcvs_flags; + u32 fw_cr; + u32 fw_cf; }; struct msm_vidc_alloc { diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index ed2a6f8b10..86464a7ff5 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -50,11 +50,16 @@ u32 msm_vdec_subscribe_for_psc_vp9[] = { HFI_PROP_LEVEL, }; -u32 msm_vdec_subscribe_for_properties[] = { +u32 msm_vdec_input_subscribe_for_properties[] = { HFI_PROP_NO_OUTPUT, HFI_PROP_CABAC_SESSION, }; +u32 msm_vdec_output_subscribe_for_properties[] = { + HFI_PROP_WORST_COMPRESSION_RATIO, + HFI_PROP_WORST_COMPLEXITY_FACTOR, +}; + static int msm_vdec_codec_change(struct msm_vidc_inst *inst, u32 v4l2_codec) { int rc = 0; @@ -1102,6 +1107,7 @@ static int msm_vdec_subscribe_property(struct msm_vidc_inst *inst, struct msm_vidc_core *core; u32 payload[32] = {0}; u32 i; + u32 payload_size = 0; if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); @@ -1111,16 +1117,30 @@ static int msm_vdec_subscribe_property(struct msm_vidc_inst *inst, i_vpr_h(inst, "%s()\n", __func__); payload[0] = HFI_MODE_PROPERTY; - for (i = 0; i < ARRAY_SIZE(msm_vdec_subscribe_for_properties); i++) - payload[i + 1] = msm_vdec_subscribe_for_properties[i]; + + if (port == INPUT_PORT) { + for (i = 0; i < ARRAY_SIZE(msm_vdec_input_subscribe_for_properties); i++) + payload[i + 1] = msm_vdec_input_subscribe_for_properties[i]; + payload_size = (ARRAY_SIZE(msm_vdec_input_subscribe_for_properties) + 1) * + sizeof(u32); + } + else if (port == OUTPUT_PORT) { + for (i = 0; i < ARRAY_SIZE(msm_vdec_output_subscribe_for_properties); i++) + payload[i + 1] = msm_vdec_output_subscribe_for_properties[i]; + payload_size = (ARRAY_SIZE(msm_vdec_output_subscribe_for_properties) + 1) * + sizeof(u32); + } + else { + i_vpr_e(inst, "%s: invalid port: %d\n", __func__, port); + return -EINVAL; + } rc = venus_hfi_session_command(inst, HFI_CMD_SUBSCRIBE_MODE, port, HFI_PAYLOAD_U32_ARRAY, &payload[0], - (ARRAY_SIZE(msm_vdec_subscribe_for_properties) + 1) * - sizeof(u32)); + payload_size); return rc; } @@ -1730,6 +1750,10 @@ int msm_vdec_streamon_output(struct msm_vidc_inst *inst) inst->opsc_properties_set = true; } + rc = msm_vdec_subscribe_property(inst, OUTPUT_PORT); + if (rc) + return rc; + rc = msm_vdec_subscribe_metadata(inst, OUTPUT_PORT); if (rc) goto error; diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index 138e30f637..3b32a0d84e 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -39,6 +39,7 @@ u32 msm_venc_input_subscribe_for_properties[] = { u32 msm_venc_output_subscribe_for_properties[] = { HFI_PROP_PICTURE_TYPE, HFI_PROP_BUFFER_MARK, + HFI_PROP_WORST_COMPRESSION_RATIO, }; static int msm_venc_codec_change(struct msm_vidc_inst *inst, u32 v4l2_codec) diff --git a/driver/vidc/src/msm_vidc_power.c b/driver/vidc/src/msm_vidc_power.c index 4bf125632a..5d3badaaf5 100644 --- a/driver/vidc/src/msm_vidc_power.c +++ b/driver/vidc/src/msm_vidc_power.c @@ -14,6 +14,7 @@ #include "msm_vidc_buffer.h" #include "venus_hfi.h" +/* Q16 Format */ #define MSM_VIDC_MIN_UBWC_COMPLEXITY_FACTOR (1 << 16) #define MSM_VIDC_MAX_UBWC_COMPLEXITY_FACTOR (4 << 16) #define MSM_VIDC_MIN_UBWC_COMPRESSION_RATIO (1 << 16) @@ -123,17 +124,12 @@ static int fill_dynamic_stats(struct msm_vidc_inst *inst, u32 min_input_cr = MSM_VIDC_MAX_UBWC_COMPRESSION_RATIO; u32 min_cr = MSM_VIDC_MAX_UBWC_COMPRESSION_RATIO; - /* TODO: get ubwc stats from firmware - if (inst->core->resources.ubwc_stats_in_fbd == 1) { - mutex_lock(&inst->ubwc_stats_lock); - if (inst->ubwc_stats.is_valid == 1) { - min_cr = inst->ubwc_stats.worst_cr; - max_cf = inst->ubwc_stats.worst_cf; - min_input_cr = inst->ubwc_stats.worst_cr; - } - mutex_unlock(&inst->ubwc_stats_lock); - } - */ + /* TODO: get ubwc stats from firmware */ + min_cr = inst->power.fw_cr; + max_cf = inst->power.fw_cf; + max_cf = max_cf / ((msm_vidc_get_mbs_per_frame(inst)) / (32 * 8) * 3) / 2; + // Todo: min_input_cr = 0; + /* Sanitize CF values from HW */ max_cf = min_t(u32, max_cf, MSM_VIDC_MAX_UBWC_COMPLEXITY_FACTOR); min_cf = max_t(u32, min_cf, MSM_VIDC_MIN_UBWC_COMPLEXITY_FACTOR); @@ -605,7 +601,8 @@ void msm_vidc_power_data_reset(struct msm_vidc_inst *inst) msm_vidc_dcvs_data_reset(inst); inst->power.buffer_counter = 0; - //inst->ubwc_stats.is_valid = 0; TODO: fix it + inst->power.fw_cr = 0; + inst->power.fw_cf = INT_MAX; rc = msm_vidc_scale_power(inst, true); if (rc) diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index a414277aed..746443e8b3 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -1171,6 +1171,12 @@ static int handle_session_property(struct msm_vidc_inst *inst, } inst->hfi_frame_info.no_output = 1; break; + case HFI_PROP_WORST_COMPRESSION_RATIO: + inst->power.fw_cr = payload_ptr[0]; + break; + case HFI_PROP_WORST_COMPLEXITY_FACTOR: + inst->power.fw_cf = payload_ptr[0]; + break; default: i_vpr_e(inst, "%s: invalid port settings property %#x\n", __func__, pkt->type); From 6d97dd37950afa044ca62d276e9f5d42ec59efc0 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Mon, 8 Mar 2021 21:49:09 +0530 Subject: [PATCH 0169/1061] video: driver: refine queue work functionality [1] remove unwanted switch cases to reduce code complexity [2] refine queue_response_work functionality. Change-Id: I91aabb2eb4c64caea09a26895358544972a7d427 Signed-off-by: Govindaraj Rajagopal --- .../variant/iris2/src/msm_vidc_buffer_iris2.c | 126 ++--- driver/vidc/inc/msm_vidc_driver.h | 1 + driver/vidc/src/msm_vdec.c | 200 +++---- driver/vidc/src/msm_venc.c | 191 +++---- driver/vidc/src/msm_vidc_control.c | 138 +---- driver/vidc/src/msm_vidc_driver.c | 334 +++++++++--- driver/vidc/src/msm_vidc_memory.c | 41 +- driver/vidc/src/venus_hfi_response.c | 511 ++++++++++-------- 8 files changed, 752 insertions(+), 790 deletions(-) diff --git a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c index edf1f5acc6..2f9afe02fa 100644 --- a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c @@ -455,91 +455,69 @@ static u32 msm_vidc_encoder_vpss_size_iris2(struct msm_vidc_inst* inst) return size; } +struct msm_vidc_buf_type_handle { + enum msm_vidc_buffer_type type; + u32 (*handle)(struct msm_vidc_inst *inst); +}; + int msm_buffer_size_iris2(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type buffer_type) { - int size = 0; + int i, size = 0; + u32 buf_type_handle_size = 0; + const struct msm_vidc_buf_type_handle *buf_type_handle_arr = NULL; + static const struct msm_vidc_buf_type_handle dec_buf_type_handle[] = { + {MSM_VIDC_BUF_INPUT, msm_vidc_decoder_input_size }, + {MSM_VIDC_BUF_OUTPUT, msm_vidc_decoder_output_size }, + {MSM_VIDC_BUF_INPUT_META, msm_vidc_decoder_input_meta_size }, + {MSM_VIDC_BUF_OUTPUT_META, msm_vidc_decoder_output_meta_size }, + {MSM_VIDC_BUF_BIN, msm_vidc_decoder_bin_size_iris2 }, + {MSM_VIDC_BUF_COMV, msm_vidc_decoder_comv_size_iris2 }, + {MSM_VIDC_BUF_NON_COMV, msm_vidc_decoder_non_comv_size_iris2 }, + {MSM_VIDC_BUF_LINE, msm_vidc_decoder_line_size_iris2 }, + {MSM_VIDC_BUF_PERSIST, msm_vidc_decoder_persist_size_iris2 }, + {MSM_VIDC_BUF_DPB, msm_vidc_decoder_dpb_size_iris2 }, + }; + static const struct msm_vidc_buf_type_handle enc_buf_type_handle[] = { + {MSM_VIDC_BUF_INPUT, msm_vidc_encoder_input_size }, + {MSM_VIDC_BUF_OUTPUT, msm_vidc_encoder_output_size }, + {MSM_VIDC_BUF_INPUT_META, msm_vidc_encoder_input_meta_size }, + {MSM_VIDC_BUF_OUTPUT_META, msm_vidc_encoder_output_meta_size }, + {MSM_VIDC_BUF_BIN, msm_vidc_encoder_bin_size_iris2 }, + {MSM_VIDC_BUF_COMV, msm_vidc_encoder_comv_size_iris2 }, + {MSM_VIDC_BUF_NON_COMV, msm_vidc_encoder_non_comv_size_iris2 }, + {MSM_VIDC_BUF_LINE, msm_vidc_encoder_line_size_iris2 }, + {MSM_VIDC_BUF_DPB, msm_vidc_encoder_dpb_size_iris2 }, + {MSM_VIDC_BUF_ARP, msm_vidc_encoder_arp_size_iris2 }, + {MSM_VIDC_BUF_VPSS, msm_vidc_encoder_vpss_size_iris2 }, + }; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); + if (is_decode_session(inst)) { + buf_type_handle_size = ARRAY_SIZE(dec_buf_type_handle); + buf_type_handle_arr = dec_buf_type_handle; + } else if (is_encode_session(inst)) { + buf_type_handle_size = ARRAY_SIZE(enc_buf_type_handle); + buf_type_handle_arr = enc_buf_type_handle; + } + + /* handle invalid session */ + if (!buf_type_handle_arr || !buf_type_handle_size) { + i_vpr_e(inst, "%s: invalid session %d\n", __func__, inst->domain); return size; } - if (is_decode_session(inst)) { - switch (buffer_type) { - case MSM_VIDC_BUF_INPUT: - size = msm_vidc_decoder_input_size(inst); - break; - case MSM_VIDC_BUF_OUTPUT: - size = msm_vidc_decoder_output_size(inst); - break; - case MSM_VIDC_BUF_INPUT_META: - size = msm_vidc_decoder_input_meta_size(inst); - break; - case MSM_VIDC_BUF_OUTPUT_META: - size = msm_vidc_decoder_output_meta_size(inst); - break; - case MSM_VIDC_BUF_BIN: - size = msm_vidc_decoder_bin_size_iris2(inst); - break; - case MSM_VIDC_BUF_COMV: - size = msm_vidc_decoder_comv_size_iris2(inst); - break; - case MSM_VIDC_BUF_NON_COMV: - size = msm_vidc_decoder_non_comv_size_iris2(inst); - break; - case MSM_VIDC_BUF_LINE: - size = msm_vidc_decoder_line_size_iris2(inst); - break; - case MSM_VIDC_BUF_PERSIST: - size = msm_vidc_decoder_persist_size_iris2(inst); - break; - case MSM_VIDC_BUF_DPB: - size = msm_vidc_decoder_dpb_size_iris2(inst); - break; - default: - break; - } - } else if (is_encode_session(inst)) { - switch (buffer_type) { - case MSM_VIDC_BUF_INPUT: - size = msm_vidc_encoder_input_size(inst); - break; - case MSM_VIDC_BUF_OUTPUT: - size = msm_vidc_encoder_output_size(inst); - break; - case MSM_VIDC_BUF_INPUT_META: - size = msm_vidc_encoder_input_meta_size(inst); - break; - case MSM_VIDC_BUF_OUTPUT_META: - size = msm_vidc_encoder_output_meta_size(inst); - break; - case MSM_VIDC_BUF_BIN: - size = msm_vidc_encoder_bin_size_iris2(inst); - break; - case MSM_VIDC_BUF_COMV: - size = msm_vidc_encoder_comv_size_iris2(inst); - break; - case MSM_VIDC_BUF_NON_COMV: - size = msm_vidc_encoder_non_comv_size_iris2(inst); - break; - case MSM_VIDC_BUF_LINE: - size = msm_vidc_encoder_line_size_iris2(inst); - break; - case MSM_VIDC_BUF_DPB: - size = msm_vidc_encoder_dpb_size_iris2(inst); - break; - case MSM_VIDC_BUF_ARP: - size = msm_vidc_encoder_arp_size_iris2(inst); - break; - case MSM_VIDC_BUF_VPSS: - size = msm_vidc_encoder_vpss_size_iris2(inst); - break; - default: + /* fetch buffer size */ + for (i = 0; i < buf_type_handle_size; i++) { + if (buf_type_handle_arr[i].type == buffer_type) { + size = buf_type_handle_arr[i].handle(inst); break; } } + /* handle unknown buffer type */ + if (i == buf_type_handle_size) + i_vpr_e(inst, "%s: unknown buffer type %#x\n", __func__, buffer_type); + return size; } diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 4e25cd3e34..1dd76652ec 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -185,6 +185,7 @@ static inline bool is_session_error(struct msm_vidc_inst* inst) return inst->state == MSM_VIDC_ERROR; } +const char *cap_name(enum msm_vidc_inst_capability_type cap); void print_vidc_buffer(u32 tag, const char *tag_str, const char *str, struct msm_vidc_inst *inst, struct msm_vidc_buffer *vbuf); void print_vb2_buffer(const char *str, struct msm_vidc_inst *inst, diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 772f765662..11969dd911 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -22,7 +22,7 @@ #define MAX_DEC_BATCH_SIZE 6 #define SKIP_BATCH_WINDOW 100 -u32 msm_vdec_subscribe_for_psc_avc[] = { +static const u32 msm_vdec_subscribe_for_psc_avc[] = { HFI_PROP_BITSTREAM_RESOLUTION, HFI_PROP_CROP_OFFSETS, HFI_PROP_CODED_FRAMES, @@ -33,7 +33,7 @@ u32 msm_vdec_subscribe_for_psc_avc[] = { HFI_PROP_SIGNAL_COLOR_INFO, }; -u32 msm_vdec_subscribe_for_psc_hevc[] = { +static const u32 msm_vdec_subscribe_for_psc_hevc[] = { HFI_PROP_BITSTREAM_RESOLUTION, HFI_PROP_CROP_OFFSETS, HFI_PROP_LUMA_CHROMA_BIT_DEPTH, @@ -44,7 +44,7 @@ u32 msm_vdec_subscribe_for_psc_hevc[] = { HFI_PROP_SIGNAL_COLOR_INFO, }; -u32 msm_vdec_subscribe_for_psc_vp9[] = { +static const u32 msm_vdec_subscribe_for_psc_vp9[] = { HFI_PROP_BITSTREAM_RESOLUTION, HFI_PROP_CROP_OFFSETS, HFI_PROP_LUMA_CHROMA_BIT_DEPTH, @@ -53,16 +53,28 @@ u32 msm_vdec_subscribe_for_psc_vp9[] = { HFI_PROP_LEVEL, }; -u32 msm_vdec_input_subscribe_for_properties[] = { +static const u32 msm_vdec_input_subscribe_for_properties[] = { HFI_PROP_NO_OUTPUT, HFI_PROP_CABAC_SESSION, }; -u32 msm_vdec_output_subscribe_for_properties[] = { +static const u32 msm_vdec_output_subscribe_for_properties[] = { HFI_PROP_WORST_COMPRESSION_RATIO, HFI_PROP_WORST_COMPLEXITY_FACTOR, }; +static const u32 msm_vdec_internal_buffer_type[] = { + MSM_VIDC_BUF_BIN, + MSM_VIDC_BUF_COMV, + MSM_VIDC_BUF_NON_COMV, + MSM_VIDC_BUF_LINE, +}; + +struct msm_vdec_prop_type_handle { + u32 type; + int (*handle)(struct msm_vidc_inst *inst, enum msm_vidc_port_type port); +}; + static int msm_vdec_codec_change(struct msm_vidc_inst *inst, u32 v4l2_codec) { int rc = 0; @@ -817,27 +829,18 @@ static int msm_vdec_set_output_properties(struct msm_vidc_inst *inst) static int msm_vdec_get_input_internal_buffers(struct msm_vidc_inst *inst) { int rc = 0; + u32 i = 0; if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - rc = msm_vidc_get_internal_buffers(inst, MSM_VIDC_BUF_BIN); - if (rc) - return rc; - - rc = msm_vidc_get_internal_buffers(inst, MSM_VIDC_BUF_COMV); - if (rc) - return rc; - - rc = msm_vidc_get_internal_buffers(inst, MSM_VIDC_BUF_NON_COMV); - if (rc) - return rc; - - rc = msm_vidc_get_internal_buffers(inst, MSM_VIDC_BUF_LINE); - if (rc) - return rc; + for (i = 0; i < ARRAY_SIZE(msm_vdec_internal_buffer_type); i++) { + rc = msm_vidc_get_internal_buffers(inst, msm_vdec_internal_buffer_type[i]); + if (rc) + return rc; + } i_vpr_h(inst, "input internal buffer: min size reuse\n"); i_vpr_h(inst, "bin buffer: %d %d %d\n", @@ -885,25 +888,14 @@ static int msm_vdec_get_output_internal_buffers(struct msm_vidc_inst *inst) static int msm_vdec_create_input_internal_buffers(struct msm_vidc_inst *inst) { int rc = 0; + u32 i = 0; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; + for (i = 0; i < ARRAY_SIZE(msm_vdec_internal_buffer_type); i++) { + rc = msm_vidc_create_internal_buffers(inst, msm_vdec_internal_buffer_type[i]); + if (rc) + return rc; } - rc = msm_vidc_create_internal_buffers(inst, MSM_VIDC_BUF_BIN); - if (rc) - return rc; - rc = msm_vidc_create_internal_buffers(inst, MSM_VIDC_BUF_COMV); - if (rc) - return rc; - rc = msm_vidc_create_internal_buffers(inst, MSM_VIDC_BUF_NON_COMV); - if (rc) - return rc; - rc = msm_vidc_create_internal_buffers(inst, MSM_VIDC_BUF_LINE); - if (rc) - return rc; - return 0; } @@ -911,11 +903,6 @@ static int msm_vdec_create_output_internal_buffers(struct msm_vidc_inst *inst) { int rc = 0; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - rc = msm_vidc_create_internal_buffers(inst, MSM_VIDC_BUF_DPB); if (rc) return rc; @@ -926,25 +913,14 @@ static int msm_vdec_create_output_internal_buffers(struct msm_vidc_inst *inst) static int msm_vdec_queue_input_internal_buffers(struct msm_vidc_inst *inst) { int rc = 0; + u32 i = 0; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; + for (i = 0; i < ARRAY_SIZE(msm_vdec_internal_buffer_type); i++) { + rc = msm_vidc_queue_internal_buffers(inst, msm_vdec_internal_buffer_type[i]); + if (rc) + return rc; } - rc = msm_vidc_queue_internal_buffers(inst, MSM_VIDC_BUF_BIN); - if (rc) - return rc; - rc = msm_vidc_queue_internal_buffers(inst, MSM_VIDC_BUF_COMV); - if (rc) - return rc; - rc = msm_vidc_queue_internal_buffers(inst, MSM_VIDC_BUF_NON_COMV); - if (rc) - return rc; - rc = msm_vidc_queue_internal_buffers(inst, MSM_VIDC_BUF_LINE); - if (rc) - return rc; - return 0; } @@ -952,11 +928,6 @@ static int msm_vdec_queue_output_internal_buffers(struct msm_vidc_inst *inst) { int rc = 0; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - rc = msm_vidc_queue_internal_buffers(inst, MSM_VIDC_BUF_DPB); if (rc) return rc; @@ -967,25 +938,15 @@ static int msm_vdec_queue_output_internal_buffers(struct msm_vidc_inst *inst) static int msm_vdec_release_input_internal_buffers(struct msm_vidc_inst *inst) { int rc = 0; + u32 i = 0; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } i_vpr_h(inst, "%s()\n",__func__); - rc = msm_vidc_release_internal_buffers(inst, MSM_VIDC_BUF_BIN); - if (rc) - return rc; - rc = msm_vidc_release_internal_buffers(inst, MSM_VIDC_BUF_COMV); - if (rc) - return rc; - rc = msm_vidc_release_internal_buffers(inst, MSM_VIDC_BUF_NON_COMV); - if (rc) - return rc; - rc = msm_vidc_release_internal_buffers(inst, MSM_VIDC_BUF_LINE); - if (rc) - return rc; + for (i = 0; i < ARRAY_SIZE(msm_vdec_internal_buffer_type); i++) { + rc = msm_vidc_release_internal_buffers(inst, msm_vdec_internal_buffer_type[i]); + if (rc) + return rc; + } return 0; } @@ -994,12 +955,7 @@ static int msm_vdec_release_output_internal_buffers(struct msm_vidc_inst *inst) { int rc = 0; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } i_vpr_h(inst, "%s()\n",__func__); - rc = msm_vidc_release_internal_buffers(inst, MSM_VIDC_BUF_DPB); if (rc) return rc; @@ -1013,9 +969,21 @@ static int msm_vdec_subscribe_input_port_settings_change(struct msm_vidc_inst *i int rc = 0; struct msm_vidc_core *core; u32 payload[32] = {0}; - u32 i; - u32 subscribe_psc_size = 0; - u32 *psc = NULL; + u32 i, j; + u32 subscribe_psc_size; + const u32 *psc; + static const struct msm_vdec_prop_type_handle prop_type_handle_arr[] = { + {HFI_PROP_BITSTREAM_RESOLUTION, msm_vdec_set_bitstream_resolution }, + {HFI_PROP_CROP_OFFSETS, msm_vdec_set_crop_offsets }, + {HFI_PROP_LUMA_CHROMA_BIT_DEPTH, msm_vdec_set_bit_depth }, + {HFI_PROP_CODED_FRAMES, msm_vdec_set_coded_frames }, + {HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT, msm_vdec_set_min_output_count }, + {HFI_PROP_PIC_ORDER_CNT_TYPE, msm_vdec_set_picture_order_count }, + {HFI_PROP_SIGNAL_COLOR_INFO, msm_vdec_set_colorspace }, + {HFI_PROP_PROFILE, msm_vdec_set_profile }, + {HFI_PROP_LEVEL, msm_vdec_set_level }, + {HFI_PROP_TIER, msm_vdec_set_tier }, + }; if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); @@ -1057,46 +1025,19 @@ static int msm_vdec_subscribe_input_port_settings_change(struct msm_vidc_inst *i sizeof(u32))); for (i = 0; i < subscribe_psc_size; i++) { - switch (psc[i]) { - case HFI_PROP_BITSTREAM_RESOLUTION: - rc = msm_vdec_set_bitstream_resolution(inst, port); - break; - case HFI_PROP_CROP_OFFSETS: - rc = msm_vdec_set_crop_offsets(inst, port); - break; - case HFI_PROP_LUMA_CHROMA_BIT_DEPTH: - rc = msm_vdec_set_bit_depth(inst, port); - break; - case HFI_PROP_CODED_FRAMES: - rc = msm_vdec_set_coded_frames(inst, port); - break; - case HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT: - rc = msm_vdec_set_min_output_count(inst, port); - break; - case HFI_PROP_PIC_ORDER_CNT_TYPE: - rc = msm_vdec_set_picture_order_count(inst, port); - break; - case HFI_PROP_SIGNAL_COLOR_INFO: - rc = msm_vdec_set_colorspace(inst, port); - break; - case HFI_PROP_PROFILE: - rc = msm_vdec_set_profile(inst, port); - break; - case HFI_PROP_LEVEL: - rc = msm_vdec_set_level(inst, port); - break; - case HFI_PROP_TIER: - rc = msm_vdec_set_tier(inst, port); - break; - default: - i_vpr_e(inst, "%s: unknown property %#x\n", __func__, - psc[i]); - rc = -EINVAL; - break; + /* set session properties */ + for (j = 0; j < ARRAY_SIZE(prop_type_handle_arr); j++) { + if (prop_type_handle_arr[j].type == psc[i]) { + rc = prop_type_handle_arr[j].handle(inst, port); + if (rc) + goto exit; + break; + } } - if (rc) - goto exit; + /* is property type unknown ? */ + if (j == ARRAY_SIZE(prop_type_handle_arr)) + i_vpr_e(inst, "%s: unknown property %#x\n", __func__, psc[i]); } exit: @@ -1156,7 +1097,7 @@ static int msm_vdec_subscribe_metadata(struct msm_vidc_inst *inst, u32 payload[32] = {0}; u32 i, count = 0; struct msm_vidc_inst_capability *capability; - u32 metadata_list[] = { + static const u32 metadata_list[] = { META_DPB_MISR, META_OPB_MISR, META_INTERLACE, @@ -1209,7 +1150,7 @@ static int msm_vdec_set_delivery_mode_metadata(struct msm_vidc_inst *inst, u32 payload[32] = {0}; u32 i, count = 0; struct msm_vidc_inst_capability *capability; - u32 metadata_list[] = { + static const u32 metadata_list[] = { META_BUF_TAG, }; @@ -1248,12 +1189,7 @@ static int msm_vdec_session_resume(struct msm_vidc_inst *inst, { int rc = 0; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } i_vpr_h(inst, "%s()\n", __func__); - rc = venus_hfi_session_command(inst, HFI_CMD_RESUME, port, @@ -1631,7 +1567,7 @@ static int msm_vdec_subscribe_output_port_settings_change(struct msm_vidc_inst * u32 i; struct msm_vidc_subscription_params subsc_params; u32 subscribe_psc_size = 0; - u32 *psc = NULL; + const u32 *psc = NULL; if (!inst) { d_vpr_e("%s: invalid params\n", __func__); diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index eade4c5a38..bc6a737dc0 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -17,7 +17,7 @@ #include "venus_hfi.h" #include "hfi_packet.h" -u32 msm_venc_input_set_prop[] = { +static const u32 msm_venc_input_set_prop[] = { HFI_PROP_COLOR_FORMAT, HFI_PROP_RAW_RESOLUTION, HFI_PROP_LINEAR_STRIDE_SCANLINE, @@ -25,23 +25,36 @@ u32 msm_venc_input_set_prop[] = { HFI_PROP_SIGNAL_COLOR_INFO, }; -u32 msm_venc_output_set_prop[] = { +static const u32 msm_venc_output_set_prop[] = { HFI_PROP_BITSTREAM_RESOLUTION, HFI_PROP_CROP_OFFSETS, HFI_PROP_BUFFER_HOST_MAX_COUNT, HFI_PROP_CSC, }; -u32 msm_venc_input_subscribe_for_properties[] = { +static const u32 msm_venc_input_subscribe_for_properties[] = { HFI_PROP_NO_OUTPUT, }; -u32 msm_venc_output_subscribe_for_properties[] = { +static const u32 msm_venc_output_subscribe_for_properties[] = { HFI_PROP_PICTURE_TYPE, HFI_PROP_BUFFER_MARK, HFI_PROP_WORST_COMPRESSION_RATIO, }; +static const u32 msm_venc_internal_buffer_type[] = { + MSM_VIDC_BUF_BIN, + MSM_VIDC_BUF_COMV, + MSM_VIDC_BUF_NON_COMV, + MSM_VIDC_BUF_LINE, + MSM_VIDC_BUF_DPB, +}; + +struct msm_venc_prop_type_handle { + u32 type; + int (*handle)(struct msm_vidc_inst *inst, enum msm_vidc_port_type port); +}; + static int msm_venc_codec_change(struct msm_vidc_inst *inst, u32 v4l2_codec) { int rc = 0; @@ -458,42 +471,36 @@ static int msm_venc_set_quality_mode(struct msm_vidc_inst *inst) static int msm_venc_set_input_properties(struct msm_vidc_inst *inst) { - int rc = 0; - int i = 0; + int i, j, rc = 0; + static const struct msm_venc_prop_type_handle prop_type_handle_arr[] = { + {HFI_PROP_COLOR_FORMAT, msm_venc_set_colorformat }, + {HFI_PROP_RAW_RESOLUTION, msm_venc_set_raw_resolution }, + {HFI_PROP_LINEAR_STRIDE_SCANLINE, msm_venc_set_linear_alignment_factor }, + {HFI_PROP_BUFFER_HOST_MAX_COUNT, msm_venc_set_host_max_buf_count }, + {HFI_PROP_SIGNAL_COLOR_INFO, msm_venc_set_colorspace }, + }; if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - i_vpr_h(inst, "%s()\n", __func__); - for (i = 0; i < ARRAY_SIZE(msm_venc_input_set_prop); - i++) { - switch (msm_venc_input_set_prop[i]) { - case HFI_PROP_COLOR_FORMAT: - rc = msm_venc_set_colorformat(inst, INPUT_PORT); - break; - case HFI_PROP_RAW_RESOLUTION: - rc = msm_venc_set_raw_resolution(inst, INPUT_PORT); - break; - case HFI_PROP_LINEAR_STRIDE_SCANLINE: - rc = msm_venc_set_linear_alignment_factor(inst, INPUT_PORT); - break; - case HFI_PROP_BUFFER_HOST_MAX_COUNT: - rc = msm_venc_set_host_max_buf_count(inst, INPUT_PORT); - break; - case HFI_PROP_SIGNAL_COLOR_INFO: - rc = msm_venc_set_colorspace(inst, INPUT_PORT); - break; - default: - i_vpr_e(inst, "%s: unknown property %#x\n", __func__, - msm_venc_input_set_prop[i]); - rc = -EINVAL; - break; + i_vpr_h(inst, "%s()\n", __func__); + for (i = 0; i < ARRAY_SIZE(msm_venc_input_set_prop); i++) { + /* set session input properties */ + for (j = 0; j < ARRAY_SIZE(prop_type_handle_arr); j++) { + if (prop_type_handle_arr[j].type == msm_venc_input_set_prop[i]) { + rc = prop_type_handle_arr[j].handle(inst, INPUT_PORT); + if (rc) + goto exit; + break; + } } - if (rc) - goto exit; + /* is property type unknown ? */ + if (j == ARRAY_SIZE(prop_type_handle_arr)) + i_vpr_e(inst, "%s: unknown property %#x\n", __func__, + msm_venc_input_set_prop[i]); } exit: @@ -502,39 +509,35 @@ exit: static int msm_venc_set_output_properties(struct msm_vidc_inst *inst) { - int rc = 0; - int i = 0; + int i, j, rc = 0; + static const struct msm_venc_prop_type_handle prop_type_handle_arr[] = { + {HFI_PROP_BITSTREAM_RESOLUTION, msm_venc_set_bitstream_resolution }, + {HFI_PROP_CROP_OFFSETS, msm_venc_set_crop_offsets }, + {HFI_PROP_BUFFER_HOST_MAX_COUNT, msm_venc_set_host_max_buf_count }, + {HFI_PROP_CSC, msm_venc_set_csc }, + }; if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - i_vpr_h(inst, "%s()\n", __func__); - for (i = 0; i < ARRAY_SIZE(msm_venc_output_set_prop); - i++) { - switch (msm_venc_output_set_prop[i]) { - case HFI_PROP_BITSTREAM_RESOLUTION: - rc = msm_venc_set_bitstream_resolution(inst, OUTPUT_PORT); - break; - case HFI_PROP_CROP_OFFSETS: - rc = msm_venc_set_crop_offsets(inst, OUTPUT_PORT); - break; - case HFI_PROP_BUFFER_HOST_MAX_COUNT: - rc = msm_venc_set_host_max_buf_count(inst, OUTPUT_PORT); - break; - case HFI_PROP_CSC: - rc = msm_venc_set_csc(inst, OUTPUT_PORT); - break; - default: - i_vpr_e(inst, "%s: unknown property %#x\n", __func__, - msm_venc_output_set_prop[i]); - rc = -EINVAL; - break; + i_vpr_h(inst, "%s()\n", __func__); + for (i = 0; i < ARRAY_SIZE(msm_venc_output_set_prop); i++) { + /* set session output properties */ + for (j = 0; j < ARRAY_SIZE(prop_type_handle_arr); j++) { + if (prop_type_handle_arr[j].type == msm_venc_output_set_prop[i]) { + rc = prop_type_handle_arr[j].handle(inst, OUTPUT_PORT); + if (rc) + goto exit; + break; + } } - if (rc) - goto exit; + /* is property type unknown ? */ + if (j == ARRAY_SIZE(prop_type_handle_arr)) + i_vpr_e(inst, "%s: unknown property %#x\n", __func__, + msm_venc_output_set_prop[i]); } exit: @@ -628,7 +631,7 @@ static int msm_venc_queue_input_internal_buffers(struct msm_vidc_inst *inst) static int msm_venc_get_output_internal_buffers(struct msm_vidc_inst *inst) { - int rc = 0; + int i, rc = 0; struct msm_vidc_core *core; if (!inst || !inst->core) { @@ -637,25 +640,11 @@ static int msm_venc_get_output_internal_buffers(struct msm_vidc_inst *inst) } core = inst->core; - rc = msm_vidc_get_internal_buffers(inst, MSM_VIDC_BUF_BIN); - if (rc) - return rc; - - rc = msm_vidc_get_internal_buffers(inst, MSM_VIDC_BUF_COMV); - if (rc) - return rc; - - rc = msm_vidc_get_internal_buffers(inst, MSM_VIDC_BUF_NON_COMV); - if (rc) - return rc; - - rc = msm_vidc_get_internal_buffers(inst, MSM_VIDC_BUF_LINE); - if (rc) - return rc; - - rc = msm_vidc_get_internal_buffers(inst, MSM_VIDC_BUF_DPB); - if (rc) - return rc; + for (i = 0; i < ARRAY_SIZE(msm_venc_internal_buffer_type); i++) { + rc = msm_vidc_get_internal_buffers(inst, msm_venc_internal_buffer_type[i]); + if (rc) + return rc; + } i_vpr_h(inst, "internal buffer: min size\n"); i_vpr_h(inst, "bin buffer: %d %d\n", @@ -679,56 +668,36 @@ static int msm_venc_get_output_internal_buffers(struct msm_vidc_inst *inst) static int msm_venc_create_output_internal_buffers(struct msm_vidc_inst *inst) { - int rc = 0; + int i, rc = 0; if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - rc = msm_vidc_create_internal_buffers(inst, MSM_VIDC_BUF_BIN); - if (rc) - return rc; - rc = msm_vidc_create_internal_buffers(inst, MSM_VIDC_BUF_COMV); - if (rc) - return rc; - rc = msm_vidc_create_internal_buffers(inst, MSM_VIDC_BUF_NON_COMV); - if (rc) - return rc; - rc = msm_vidc_create_internal_buffers(inst, MSM_VIDC_BUF_LINE); - if (rc) - return rc; - rc = msm_vidc_create_internal_buffers(inst, MSM_VIDC_BUF_DPB); - if (rc) - return rc; + for (i = 0; i < ARRAY_SIZE(msm_venc_internal_buffer_type); i++) { + rc = msm_vidc_create_internal_buffers(inst, msm_venc_internal_buffer_type[i]); + if (rc) + return rc; + } return 0; } static int msm_venc_queue_output_internal_buffers(struct msm_vidc_inst *inst) { - int rc = 0; + int i, rc = 0; if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - rc = msm_vidc_queue_internal_buffers(inst, MSM_VIDC_BUF_BIN); - if (rc) - return rc; - rc = msm_vidc_queue_internal_buffers(inst, MSM_VIDC_BUF_COMV); - if (rc) - return rc; - rc = msm_vidc_queue_internal_buffers(inst, MSM_VIDC_BUF_NON_COMV); - if (rc) - return rc; - rc = msm_vidc_queue_internal_buffers(inst, MSM_VIDC_BUF_LINE); - if (rc) - return rc; - rc = msm_vidc_queue_internal_buffers(inst, MSM_VIDC_BUF_DPB); - if (rc) - return rc; + for (i = 0; i < ARRAY_SIZE(msm_venc_internal_buffer_type); i++) { + rc = msm_vidc_queue_internal_buffers(inst, msm_venc_internal_buffer_type[i]); + if (rc) + return rc; + } return 0; } @@ -783,7 +752,7 @@ static int msm_venc_metadata_delivery(struct msm_vidc_inst *inst, u32 payload[32] = {0}; u32 i, count = 0; struct msm_vidc_inst_capability *capability; - u32 metadata_list[] = { + static const u32 metadata_list[] = { META_SEI_MASTERING_DISP, META_SEI_CLL, META_HDR10PLUS, @@ -831,7 +800,7 @@ static int msm_venc_metadata_subscription(struct msm_vidc_inst *inst, u32 payload[32] = {0}; u32 i, count = 0; struct msm_vidc_inst_capability *capability; - u32 metadata_list[] = { + static const u32 metadata_list[] = { META_LTR_MARK_USE, META_SEQ_HDR_NAL, META_TIMESTAMP, diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 590c513f16..e10e0112a3 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -119,135 +119,6 @@ static const char * const * msm_vidc_get_qmenu_type( } } -static const char *msm_vidc_get_priv_ctrl_name_list2(struct msm_vidc_inst *inst, - u32 control_id) -{ - switch (control_id) { - case V4L2_CID_MPEG_VIDC_HEVC_I_FRAME_MIN_QP: - return "HEVC I Frame Min QP"; - case V4L2_CID_MPEG_VIDC_HEVC_P_FRAME_MIN_QP: - return "HEVC P Frame Min QP"; - case V4L2_CID_MPEG_VIDC_HEVC_I_FRAME_MAX_QP: - return "HEVC I Frame Max QP"; - case V4L2_CID_MPEG_VIDC_HEVC_P_FRAME_MAX_QP: - return "HEVC P Frame Max QP"; - case V4L2_CID_MPEG_VIDC_METADATA_LTR_MARK_USE_DETAILS: - return "LTR Mark Use Details Metadata"; - case V4L2_CID_MPEG_VIDC_METADATA_SEQ_HEADER_NAL: - return "Seq Header NAL Metadata"; - case V4L2_CID_MPEG_VIDC_METADATA_DPB_LUMA_CHROMA_MISR: - return "DPB Luma-Chroma MISR Metadata"; - case V4L2_CID_MPEG_VIDC_METADATA_OPB_LUMA_CHROMA_MISR: - return "OPB Luma-Chroma MISR Metadata"; - case V4L2_CID_MPEG_VIDC_METADATA_INTERLACE: - return "Interlace Metadata"; - case V4L2_CID_MPEG_VIDC_METADATA_CONCEALED_MB_COUNT: - return "Concealed MB Count Metadata"; - case V4L2_CID_MPEG_VIDC_METADATA_HISTOGRAM_INFO: - return "Historgram Info Metadata"; - case V4L2_CID_MPEG_VIDC_METADATA_SEI_MASTERING_DISPLAY_COLOUR: - return "SEI Mastering Display Color Metadata"; - case V4L2_CID_MPEG_VIDC_METADATA_SEI_CONTENT_LIGHT_LEVEL: - return "SEI Content Lighting Level Metadata"; - case V4L2_CID_MPEG_VIDC_METADATA_HDR10PLUS: - return "HDR10PLUS Metadata"; - case V4L2_CID_MPEG_VIDC_METADATA_EVA_STATS: - return "EVA Stats Metadata"; - case V4L2_CID_MPEG_VIDC_METADATA_BUFFER_TAG: - return "Buffer Tag Metadata"; - case V4L2_CID_MPEG_VIDC_METADATA_SUBFRAME_OUTPUT: - return "Subframe Output Metadata"; - case V4L2_CID_MPEG_VIDC_METADATA_ROI_INFO: - return "ROI Info Metadata"; - case V4L2_CID_MPEG_VIDC_METADATA_TIMESTAMP: - return "Timestamp Metadata"; - case V4L2_CID_MPEG_VIDC_METADATA_ENC_QP_METADATA: - return "Encoder QP Metadata"; - case V4L2_CID_MPEG_VIDC_METADATA_DPB_TAG_LIST: - return "DPB Tag List"; - default: - return NULL; - } -} - -static const char *msm_vidc_get_priv_ctrl_name_list1(struct msm_vidc_inst *inst, - u32 control_id) -{ - switch (control_id) { - case V4L2_CID_MPEG_VIDC_SECURE: - return "Secure Mode"; - case V4L2_CID_MPEG_VIDC_HEIC: - return "HEIC"; - case V4L2_CID_MPEG_VIDC_LOWLATENCY_REQUEST: - return "Low Latency Mode"; - case V4L2_CID_MPEG_VIDC_CODEC_CONFIG: - return "Codec Config"; - case V4L2_CID_MPEG_VIDC_B_FRAME_MIN_QP: - return "B frame Min QP"; - case V4L2_CID_MPEG_VIDC_B_FRAME_MAX_QP: - return "B frame Max QP"; - case V4L2_CID_MPEG_VIDC_LTRCOUNT: - return "LTR count"; - case V4L2_CID_MPEG_VIDC_USELTRFRAME: - return "Use LTR Frame"; - case V4L2_CID_MPEG_VIDC_MARKLTRFRAME: - return "Mark LTR Frame"; - case V4L2_CID_MPEG_VIDC_BASELAYER_PRIORITY: - return "Baselayer Priority"; - case V4L2_CID_MPEG_VIDC_INTRA_REFRESH_PERIOD: - return "Intra Refresh Period"; - case V4L2_CID_MPEG_VIDC_AU_DELIMITER: - return "AU Delimiter"; - case V4L2_CID_MPEG_VIDC_TIME_DELTA_BASED_RC: - return "Time Delta Based RC"; - case V4L2_CID_MPEG_VIDC_CONTENT_ADAPTIVE_CODING: - return "Content Adaptive Coding"; - case V4L2_CID_MPEG_VIDC_QUALITY_BITRATE_BOOST: - return "Quality Bitrate Boost"; - case V4L2_CID_MPEG_VIDC_VIDEO_BLUR_TYPES: - return "Blur Types"; - case V4L2_CID_MPEG_VIDC_VIDEO_BLUR_RESOLUTION: - return "Blur Resolution"; - case V4L2_CID_MPEG_VIDC_VIDEO_VPE_CSC_CUSTOM_MATRIX: - return "CSC Custom Matrix"; - case V4L2_CID_MPEG_MFC51_VIDEO_DECODER_H264_DISPLAY_DELAY: - return "H264 Display Delay"; - case V4L2_CID_MPEG_MFC51_VIDEO_DECODER_H264_DISPLAY_DELAY_ENABLE: - return "H264 Display Delay Enable"; - case V4L2_CID_MPEG_VIDC_MIN_BITSTREAM_SIZE_OVERWRITE: - return "Bitstream Size Overwrite"; - case V4L2_CID_MPEG_VIDC_SUPERFRAME: - return "Encoder Batching Superframe"; - case V4L2_CID_MPEG_VIDC_THUMBNAIL_MODE: - return "Thumbnail Mode"; - case V4L2_CID_MPEG_VIDC_PRIORITY: - return "Priority"; - default: - return NULL; - } -} -/* - * Due to a long switch case function, ccn failure was observed. Hence the - * below function is split into msm_vidc_get_priv_ctrl_name_list1() and - * msm_vidc_get_priv_ctrl_name_list2() - */ -static const char *msm_vidc_get_priv_ctrl_name(struct msm_vidc_inst *inst, - u32 control_id) -{ - const char *ctrl_name; - - ctrl_name = msm_vidc_get_priv_ctrl_name_list1(inst, control_id); - if (ctrl_name) - return ctrl_name; - ctrl_name = msm_vidc_get_priv_ctrl_name_list2(inst, control_id); - if (ctrl_name) - return ctrl_name; - - i_vpr_e(inst, "%s: ctrl name not available for ctrl id %#x\n", - __func__, control_id); - return NULL; -} - static int msm_vidc_packetize_control(struct msm_vidc_inst *inst, enum msm_vidc_inst_capability_type cap_id, u32 payload_type, void *hfi_val, u32 payload_size, const char *func) @@ -371,9 +242,9 @@ int msm_vidc_update_cap_value(struct msm_vidc_inst *inst, u32 cap, if (inst->capabilities->cap[cap].value != adjusted_val) i_vpr_h(inst, - "%s: updated database value from %#x to %#x\n", - func, inst->capabilities->cap[cap].value, - adjusted_val); + "%s: updated database: name %s, value %#x -> %#x\n", + func, cap_name(cap), + inst->capabilities->cap[cap].value, adjusted_val); inst->capabilities->cap[cap].value = adjusted_val; @@ -643,8 +514,7 @@ int msm_vidc_ctrl_init(struct msm_vidc_inst *inst) ctrl_cfg.step = capability->cap[idx].step_or_mask; } - ctrl_cfg.name = msm_vidc_get_priv_ctrl_name(inst, - capability->cap[idx].v4l2_id); + ctrl_cfg.name = cap_name(capability->cap[idx].cap); if (!ctrl_cfg.name) { i_vpr_e(inst, "%s: %#x ctrl name is null\n", __func__, ctrl_cfg.id); diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 368205c0d5..a2edba81d0 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -30,11 +30,239 @@ extern struct msm_vidc_core *g_core; } \ } -struct msm_vidc_buf_details { +struct msm_vidc_buf_type_name { enum msm_vidc_buffer_type type; char *name; }; +struct msm_vidc_cap_name { + enum msm_vidc_inst_capability_type cap; + char *name; +}; + +static const struct msm_vidc_cap_name cap_name_arr[] = { + {INST_CAP_NONE, "INST_CAP_NONE" }, + {FRAME_WIDTH, "FRAME_WIDTH" }, + {LOSSLESS_FRAME_WIDTH, "LOSSLESS_FRAME_WIDTH" }, + {SECURE_FRAME_WIDTH, "SECURE_FRAME_WIDTH" }, + {HEVC_IMAGE_FRAME_WIDTH, "HEVC_IMAGE_FRAME_WIDTH" }, + {HEIC_IMAGE_FRAME_WIDTH, "HEIC_IMAGE_FRAME_WIDTH" }, + {FRAME_HEIGHT, "FRAME_HEIGHT" }, + {LOSSLESS_FRAME_HEIGHT, "LOSSLESS_FRAME_HEIGHT" }, + {SECURE_FRAME_HEIGHT, "SECURE_FRAME_HEIGHT" }, + {HEVC_IMAGE_FRAME_HEIGHT, "HEVC_IMAGE_FRAME_HEIGHT" }, + {HEIC_IMAGE_FRAME_HEIGHT, "HEIC_IMAGE_FRAME_HEIGHT" }, + {PIX_FMTS, "PIX_FMTS" }, + {MIN_BUFFERS_INPUT, "MIN_BUFFERS_INPUT" }, + {MIN_BUFFERS_OUTPUT, "MIN_BUFFERS_OUTPUT" }, + {MBPF, "MBPF" }, + {LOSSLESS_MBPF, "LOSSLESS_MBPF" }, + {BATCH_MBPF, "BATCH_MBPF" }, + {BATCH_FPS, "BATCH_FPS" }, + {SECURE_MBPF, "SECURE_MBPF" }, + {MBPS, "MBPS" }, + {POWER_SAVE_MBPS, "POWER_SAVE_MBPS" }, + {FRAME_RATE, "FRAME_RATE" }, + {OPERATING_RATE, "OPERATING_RATE" }, + {SCALE_X, "SCALE_X" }, + {SCALE_Y, "SCALE_Y" }, + {B_FRAME, "B_FRAME" }, + {MB_CYCLES_VSP, "MB_CYCLES_VSP" }, + {MB_CYCLES_VPP, "MB_CYCLES_VPP" }, + {MB_CYCLES_LP, "MB_CYCLES_LP" }, + {MB_CYCLES_FW, "MB_CYCLES_FW" }, + {MB_CYCLES_FW_VPP, "MB_CYCLES_FW_VPP" }, + {SECURE_MODE, "SECURE_MODE" }, + {HFLIP, "HFLIP" }, + {VFLIP, "VFLIP" }, + {ROTATION, "ROTATION" }, + {SUPER_FRAME, "SUPER_FRAME" }, + {SLICE_INTERFACE, "SLICE_INTERFACE" }, + {HEADER_MODE, "HEADER_MODE" }, + {PREPEND_SPSPPS_TO_IDR, "PREPEND_SPSPPS_TO_IDR" }, + {META_SEQ_HDR_NAL, "META_SEQ_HDR_NAL" }, + {WITHOUT_STARTCODE, "WITHOUT_STARTCODE" }, + {NAL_LENGTH_FIELD, "NAL_LENGTH_FIELD" }, + {REQUEST_I_FRAME, "REQUEST_I_FRAME" }, + {BIT_RATE, "BIT_RATE" }, + {BITRATE_MODE, "BITRATE_MODE" }, + {LOSSLESS, "LOSSLESS" }, + {FRAME_SKIP_MODE, "FRAME_SKIP_MODE" }, + {FRAME_RC_ENABLE, "FRAME_RC_ENABLE" }, + {CONSTANT_QUALITY, "CONSTANT_QUALITY" }, + {GOP_SIZE, "GOP_SIZE" }, + {GOP_CLOSURE, "GOP_CLOSURE" }, + {BLUR_TYPES, "BLUR_TYPES" }, + {BLUR_RESOLUTION, "BLUR_RESOLUTION" }, + {CSC, "CSC" }, + {CSC_CUSTOM_MATRIX, "CSC_CUSTOM_MATRIX" }, + {HEIC, "HEIC" }, + {LOWLATENCY_MODE, "LOWLATENCY_MODE" }, + {LTR_COUNT, "LTR_COUNT" }, + {USE_LTR, "USE_LTR" }, + {MARK_LTR, "MARK_LTR" }, + {BASELAYER_PRIORITY, "BASELAYER_PRIORITY" }, + {IR_RANDOM, "IR_RANDOM" }, + {AU_DELIMITER, "AU_DELIMITER" }, + {TIME_DELTA_BASED_RC, "TIME_DELTA_BASED_RC" }, + {CONTENT_ADAPTIVE_CODING, "CONTENT_ADAPTIVE_CODING" }, + {BITRATE_BOOST, "BITRATE_BOOST" }, + {VBV_DELAY, "VBV_DELAY" }, + {MIN_FRAME_QP, "MIN_FRAME_QP" }, + {I_FRAME_MIN_QP, "I_FRAME_MIN_QP" }, + {P_FRAME_MIN_QP, "P_FRAME_MIN_QP" }, + {B_FRAME_MIN_QP, "B_FRAME_MIN_QP" }, + {MAX_FRAME_QP, "MAX_FRAME_QP" }, + {I_FRAME_MAX_QP, "I_FRAME_MAX_QP" }, + {P_FRAME_MAX_QP, "P_FRAME_MAX_QP" }, + {B_FRAME_MAX_QP, "B_FRAME_MAX_QP" }, + {HEVC_HIER_QP, "HEVC_HIER_QP" }, + {I_FRAME_QP, "I_FRAME_QP" }, + {P_FRAME_QP, "P_FRAME_QP" }, + {B_FRAME_QP, "B_FRAME_QP" }, + {L0_QP, "L0_QP" }, + {L1_QP, "L1_QP" }, + {L2_QP, "L2_QP" }, + {L3_QP, "L3_QP" }, + {L4_QP, "L4_QP" }, + {L5_QP, "L5_QP" }, + {HIER_LAYER_QP, "HIER_LAYER_QP" }, + {HIER_CODING_TYPE, "HIER_CODING_TYPE" }, + {HIER_CODING, "HIER_CODING" }, + {HIER_CODING_LAYER, "HIER_CODING_LAYER" }, + {L0_BR, "L0_BR" }, + {L1_BR, "L1_BR" }, + {L2_BR, "L2_BR" }, + {L3_BR, "L3_BR" }, + {L4_BR, "L4_BR" }, + {L5_BR, "L5_BR" }, + {ENTROPY_MODE, "ENTROPY_MODE" }, + {PROFILE, "PROFILE" }, + {LEVEL, "LEVEL" }, + {HEVC_TIER, "HEVC_TIER" }, + {LF_MODE, "LF_MODE" }, + {LF_ALPHA, "LF_ALPHA" }, + {LF_BETA, "LF_BETA" }, + {SLICE_MODE, "SLICE_MODE" }, + {SLICE_MAX_BYTES, "SLICE_MAX_BYTES" }, + {SLICE_MAX_MB, "SLICE_MAX_MB" }, + {MB_RC, "MB_RC" }, + {TRANSFORM_8X8, "TRANSFORM_8X8" }, + {CHROMA_QP_INDEX_OFFSET, "CHROMA_QP_INDEX_OFFSET" }, + {DISPLAY_DELAY_ENABLE, "DISPLAY_DELAY_ENABLE" }, + {DISPLAY_DELAY, "DISPLAY_DELAY" }, + {CONCEAL_COLOR_8BIT, "CONCEAL_COLOR_8BIT" }, + {CONCEAL_COLOR_10BIT, "CONCEAL_COLOR_10BIT" }, + {STAGE, "STAGE" }, + {PIPE, "PIPE" }, + {POC, "POC" }, + {QUALITY_MODE, "QUALITY_MODE" }, + {CODED_FRAMES, "CODED_FRAMES" }, + {BIT_DEPTH, "BIT_DEPTH" }, + {CODEC_CONFIG, "CODEC_CONFIG" }, + {BITSTREAM_SIZE_OVERWRITE, "BITSTREAM_SIZE_OVERWRITE" }, + {THUMBNAIL_MODE, "THUMBNAIL_MODE" }, + {DEFAULT_HEADER, "DEFAULT_HEADER" }, + {RAP_FRAME, "RAP_FRAME" }, + {SEQ_CHANGE_AT_SYNC_FRAME, "SEQ_CHANGE_AT_SYNC_FRAME" }, + {PRIORITY, "PRIORITY" }, + {META_LTR_MARK_USE, "META_LTR_MARK_USE" }, + {META_DPB_MISR, "META_DPB_MISR" }, + {META_OPB_MISR, "META_OPB_MISR" }, + {META_INTERLACE, "META_INTERLACE" }, + {META_TIMESTAMP, "META_TIMESTAMP" }, + {META_CONCEALED_MB_CNT, "META_CONCEALED_MB_CNT" }, + {META_HIST_INFO, "META_HIST_INFO" }, + {META_SEI_MASTERING_DISP, "META_SEI_MASTERING_DISP" }, + {META_SEI_CLL, "META_SEI_CLL" }, + {META_HDR10PLUS, "META_HDR10PLUS" }, + {META_EVA_STATS, "META_EVA_STATS" }, + {META_BUF_TAG, "META_BUF_TAG" }, + {META_DPB_TAG_LIST, "META_DPB_TAG_LIST" }, + {META_SUBFRAME_OUTPUT, "META_SUBFRAME_OUTPUT" }, + {META_ENC_QP_METADATA, "META_ENC_QP_METADATA" }, + {META_ROI_INFO, "META_ROI_INFO" }, + {INST_CAP_MAX, "INST_CAP_MAX" }, +}; + +const char *cap_name(enum msm_vidc_inst_capability_type cap) +{ + const char *name = "UNKNOWN CAP"; + + if (cap > ARRAY_SIZE(cap_name_arr)) + goto exit; + + if (cap_name_arr[cap].cap != cap) + goto exit; + + name = cap_name_arr[cap].name; + +exit: + return name; +} + +struct msm_vidc_inst_state_name { + enum msm_vidc_inst_state state; + char *name; +}; + +static const struct msm_vidc_inst_state_name inst_state_name_arr[] = { + {MSM_VIDC_OPEN, "OPEN" }, + {MSM_VIDC_START_INPUT, "START_INPUT" }, + {MSM_VIDC_START_OUTPUT, "START_OUTPUT" }, + {MSM_VIDC_START, "START" }, + {MSM_VIDC_DRC, "DRC" }, + {MSM_VIDC_DRC_LAST_FLAG, "DRC_LAST_FLAG" }, + {MSM_VIDC_DRAIN, "DRAIN" }, + {MSM_VIDC_DRAIN_LAST_FLAG, "DRAIN_LAST_FLAG" }, + {MSM_VIDC_DRC_DRAIN, "DRC_DRAIN" }, + {MSM_VIDC_DRC_DRAIN_LAST_FLAG, "DRC_DRAIN_LAST_FLAG" }, + {MSM_VIDC_DRAIN_START_INPUT, "DRAIN_START_INPUT" }, + {MSM_VIDC_ERROR, "ERROR" }, +}; + +const char *state_name(enum msm_vidc_inst_state state) +{ + const char *name = "UNKNOWN STATE"; + + if (!state || state > ARRAY_SIZE(inst_state_name_arr)) + goto exit; + + if (inst_state_name_arr[state - 1].state != state) + goto exit; + + name = inst_state_name_arr[state - 1].name; + +exit: + return name; +} + +struct msm_vidc_core_state_name { + enum msm_vidc_core_state state; + char *name; +}; + +static const struct msm_vidc_core_state_name core_state_name_arr[] = { + {MSM_VIDC_CORE_DEINIT, "CORE_DEINIT" }, + {MSM_VIDC_CORE_INIT, "CORE_INIT" }, +}; + +const char *core_state_name(enum msm_vidc_core_state state) +{ + const char *name = "UNKNOWN STATE"; + + if (state >= ARRAY_SIZE(core_state_name_arr)) + goto exit; + + if (core_state_name_arr[state].state != state) + goto exit; + + name = core_state_name_arr[state].name; + +exit: + return name; +} + void print_vidc_buffer(u32 tag, const char *tag_str, const char *str, struct msm_vidc_inst *inst, struct msm_vidc_buffer *vbuf) { @@ -65,12 +293,21 @@ void print_vb2_buffer(const char *str, struct msm_vidc_inst *inst, if (!inst || !vb2) return; - i_vpr_e(inst, - "%s: %s: idx %2d fd %d off %d size %d filled %d\n", - str, vb2->type == INPUT_MPLANE ? "INPUT" : "OUTPUT", - vb2->index, vb2->planes[0].m.fd, - vb2->planes[0].data_offset, vb2->planes[0].length, - vb2->planes[0].bytesused); + if (vb2->type == INPUT_MPLANE || vb2->type == OUTPUT_MPLANE) { + i_vpr_e(inst, + "%s: %s: idx %2d fd %d off %d size %d filled %d\n", + str, vb2->type == INPUT_MPLANE ? "INPUT" : "OUTPUT", + vb2->index, vb2->planes[0].m.fd, + vb2->planes[0].data_offset, vb2->planes[0].length, + vb2->planes[0].bytesused); + } else if (vb2->type == INPUT_META_PLANE || vb2->type == OUTPUT_META_PLANE) { + i_vpr_e(inst, + "%s: %s: idx %2d fd %d off %d size %d filled %d\n", + str, vb2->type == INPUT_MPLANE ? "INPUT_META" : "OUTPUT_META", + vb2->index, vb2->planes[0].m.fd, + vb2->planes[0].data_offset, vb2->planes[0].length, + vb2->planes[0].bytesused); + } } enum msm_vidc_buffer_type v4l2_type_to_driver(u32 type, const char *func) @@ -692,25 +929,6 @@ struct msm_vidc_allocations *msm_vidc_get_allocations( } } -const char *core_state_name(enum msm_vidc_core_state state) -{ - const char* name = "UNKNOWN"; - - switch (state) { - case MSM_VIDC_CORE_INIT: - name = "CORE_INIT"; - break; - case MSM_VIDC_CORE_DEINIT: - name = "CORE_DEINIT"; - break; - default: - name = "UNKNOWN"; - break; - } - - return name; -} - int msm_vidc_change_core_state(struct msm_vidc_core *core, enum msm_vidc_core_state request_state, const char *func) { @@ -726,55 +944,6 @@ int msm_vidc_change_core_state(struct msm_vidc_core *core, return 0; } -const char *state_name(enum msm_vidc_inst_state state) -{ - const char *name = "UNKNOWN"; - - switch (state) { - case MSM_VIDC_OPEN: - name = "OPEN"; - break; - case MSM_VIDC_START_INPUT: - name = "START_INPUT"; - break; - case MSM_VIDC_START_OUTPUT: - name = "START_OUTPUT"; - break; - case MSM_VIDC_START: - name = "START"; - break; - case MSM_VIDC_DRC: - name = "DRC"; - break; - case MSM_VIDC_DRC_LAST_FLAG: - name = "DRC_LAST_FLAG"; - break; - case MSM_VIDC_DRAIN: - name = "DRAIN"; - break; - case MSM_VIDC_DRAIN_LAST_FLAG: - name = "DRAIN_LAST_FLAG"; - break; - case MSM_VIDC_DRC_DRAIN: - name = "DRC_DRAIN"; - break; - case MSM_VIDC_DRC_DRAIN_LAST_FLAG: - name = "DRC_DRAIN_LAST_FLAG"; - break; - case MSM_VIDC_DRAIN_START_INPUT: - name = "DRAIN_START_INPUT"; - break; - case MSM_VIDC_ERROR: - name = "ERROR"; - break; - default: - name = "UNKNOWN"; - break; - } - - return name; -} - int msm_vidc_change_inst_state(struct msm_vidc_inst *inst, enum msm_vidc_inst_state request_state, const char *func) { @@ -3079,7 +3248,7 @@ int msm_vidc_print_inst_info(struct msm_vidc_inst *inst) struct dma_buf *dbuf; int i = 0; - struct msm_vidc_buf_details buffer_details[] = { + static const struct msm_vidc_buf_type_name buf_type_name[] = { {MSM_VIDC_BUF_INPUT, "INPUT" }, {MSM_VIDC_BUF_OUTPUT, "OUTPUT" }, {MSM_VIDC_BUF_INPUT_META, "IN_META" }, @@ -3114,13 +3283,13 @@ int msm_vidc_print_inst_info(struct msm_vidc_inst *inst) frame_rate, bit_rate, bit_depth); /* Print buffer details */ - for (i = 0; i < ARRAY_SIZE(buffer_details); i++) { - buffers = msm_vidc_get_buffers(inst, buffer_details[i].type, __func__); + for (i = 0; i < ARRAY_SIZE(buf_type_name); i++) { + buffers = msm_vidc_get_buffers(inst, buf_type_name[i].type, __func__); if (!buffers) continue; i_vpr_e(inst, "count: type: %8s, min: %2d, extra: %2d, actual: %2d\n", - buffer_details[i].name, buffers->min_count, + buf_type_name[i].name, buffers->min_count, buffers->extra_count, buffers->actual_count); list_for_each_entry(buf, &buffers->list, list) { @@ -3129,7 +3298,7 @@ int msm_vidc_print_inst_info(struct msm_vidc_inst *inst) dbuf = (struct dma_buf *)buf->dmabuf; i_vpr_e(inst, "buf: type: %8s, index: %2d, fd: %4d, size: %9u, off: %8u, filled: %9u, iova: %8x, inode: %9ld, flags: %8x, ts: %16lld, attr: %8x\n", - buffer_details[i].name, buf->index, buf->fd, buf->buffer_size, + buf_type_name[i].name, buf->index, buf->fd, buf->buffer_size, buf->data_offset, buf->data_size, buf->device_addr, file_inode(dbuf->file)->i_ino, buf->flags, buf->timestamp, buf->attr); @@ -3259,7 +3428,8 @@ void msm_vidc_batch_handler(struct work_struct *work) allow = msm_vidc_allow_qbuf(inst, OUTPUT_MPLANE); if (allow != MSM_VIDC_ALLOW) { - i_vpr_e(inst, "%s: not allowed in state: %s\n", __func__, state_name(inst->state)); + i_vpr_e(inst, "%s: not allowed in state: %s\n", __func__, + state_name(inst->state)); goto exit; } @@ -3323,7 +3493,7 @@ void msm_vidc_destroy_buffers(struct msm_vidc_inst *inst) { struct msm_vidc_buffers *buffers; struct msm_vidc_buffer *buf, *dummy; - enum msm_vidc_buffer_type buf_types[] = { + static const enum msm_vidc_buffer_type buf_types[] = { MSM_VIDC_BUF_INPUT, MSM_VIDC_BUF_OUTPUT, MSM_VIDC_BUF_INPUT_META, diff --git a/driver/vidc/src/msm_vidc_memory.c b/driver/vidc/src/msm_vidc_memory.c index 1d167b868a..7cbed6f03f 100644 --- a/driver/vidc/src/msm_vidc_memory.c +++ b/driver/vidc/src/msm_vidc_memory.c @@ -14,30 +14,31 @@ #include "msm_vidc_dt.h" #include "msm_vidc_core.h" +struct msm_vidc_buf_region_name { + enum msm_vidc_buffer_region region; + char *name; +}; struct context_bank_info *get_context_bank(struct msm_vidc_core *core, enum msm_vidc_buffer_region region) { - char *name; + const char *name; struct context_bank_info *cb = NULL, *match = NULL; + static const struct msm_vidc_buf_region_name buf_region_name[] = { + {MSM_VIDC_REGION_NONE, "none" }, + {MSM_VIDC_NON_SECURE, "venus_ns" }, + {MSM_VIDC_SECURE_PIXEL, "venus_sec_pixel" }, + {MSM_VIDC_SECURE_NONPIXEL, "venus_sec_non_pixel" }, + {MSM_VIDC_SECURE_BITSTREAM, "venus_sec_bitstream" }, + }; - switch (region) { - case MSM_VIDC_NON_SECURE: - name = "venus_ns"; - break; - case MSM_VIDC_SECURE_PIXEL: - name = "venus_sec_pixel"; - break; - case MSM_VIDC_SECURE_NONPIXEL: - name = "venus_sec_non_pixel"; - break; - case MSM_VIDC_SECURE_BITSTREAM: - name = "venus_sec_bitstream"; - break; - default: - d_vpr_e("invalid region : %#x\n", region); - return NULL; - } + if (!region || region > ARRAY_SIZE(buf_region_name)) + goto exit; + + if (buf_region_name[region].region != region) + goto exit; + + name = buf_region_name[region].name; list_for_each_entry(cb, &core->dt->context_banks, list) { if (!strcmp(cb->name, name)) { @@ -49,6 +50,10 @@ struct context_bank_info *get_context_bank(struct msm_vidc_core *core, d_vpr_e("cb not found for region %#x\n", region); return match; + +exit: + d_vpr_e("Invalid region %#x\n", region); + return NULL; } struct dma_buf *msm_vidc_memory_get_dmabuf(int fd) diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index d3799fd4f0..653b844bcb 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -13,9 +13,25 @@ #define in_range(range, val) (((range.begin) < (val)) && ((range.end) > (val))) extern struct msm_vidc_core *g_core; -struct msm_vidc_hfi_range { +struct msm_vidc_core_hfi_range { u32 begin; u32 end; + int (*handle)(struct msm_vidc_core *core, struct hfi_packet *pkt); +}; + +struct msm_vidc_inst_hfi_range { + u32 begin; + u32 end; + int (*handle)(struct msm_vidc_inst *inst, struct hfi_packet *pkt); +}; + +struct msm_vidc_hfi_buffer_handle { + enum hfi_buffer_type type; + int (*handle)(struct msm_vidc_inst *inst, struct hfi_buffer *buffer); +}; + +struct msm_vidc_hfi_packet_handle { + enum hfi_buffer_type type; int (*handle)(struct msm_vidc_inst *inst, struct hfi_packet *pkt); }; @@ -187,6 +203,33 @@ int validate_packet(u8 *response_pkt, u8 *core_resp_pkt, return 0; } +static int validate_hdr_packet(struct msm_vidc_core *core, + struct hfi_header *hdr, const char *function) +{ + struct hfi_packet *packet; + u8 *pkt; + int i, rc = 0; + + if (!core || !hdr || !function) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + pkt = (u8 *)((u8 *)hdr + sizeof(struct hfi_header)); + + /* validate all packets */ + for (i = 0; i < hdr->num_packets; i++) { + packet = (struct hfi_packet *)pkt; + rc = validate_packet(pkt, core->response_packet, core->packet_size, function); + if (rc) + return rc; + + pkt += packet->size; + } + + return 0; +} + static bool check_last_flag(struct msm_vidc_inst *inst, struct hfi_packet *pkt) { @@ -666,7 +709,7 @@ static int handle_dequeue_buffers(struct msm_vidc_inst* inst) struct msm_vidc_buffers* buffers; struct msm_vidc_buffer* buf; struct msm_vidc_buffer* dummy; - enum msm_vidc_buffer_type buffer_type[] = { + static const enum msm_vidc_buffer_type buffer_type[] = { MSM_VIDC_BUF_INPUT_META, MSM_VIDC_BUF_INPUT, MSM_VIDC_BUF_OUTPUT_META, @@ -908,9 +951,38 @@ static int handle_arp_buffer(struct msm_vidc_inst *inst, static int handle_session_buffer(struct msm_vidc_inst *inst, struct hfi_packet *pkt) { - int rc = 0; + int i, rc = 0; struct hfi_buffer *buffer; - u32 buf_type = 0, port_type = 0; + u32 hfi_handle_size = 0; + const struct msm_vidc_hfi_buffer_handle *hfi_handle_arr = NULL; + static const struct msm_vidc_hfi_buffer_handle enc_input_hfi_handle[] = { + {HFI_BUFFER_METADATA, handle_input_metadata_buffer }, + {HFI_BUFFER_RAW, handle_input_buffer }, + }; + static const struct msm_vidc_hfi_buffer_handle enc_output_hfi_handle[] = { + {HFI_BUFFER_METADATA, handle_output_metadata_buffer }, + {HFI_BUFFER_BITSTREAM, handle_output_buffer }, + {HFI_BUFFER_BIN, handle_bin_buffer }, + {HFI_BUFFER_COMV, handle_comv_buffer }, + {HFI_BUFFER_NON_COMV, handle_non_comv_buffer }, + {HFI_BUFFER_LINE, handle_line_buffer }, + {HFI_BUFFER_ARP, handle_arp_buffer }, + {HFI_BUFFER_DPB, handle_dpb_buffer }, + }; + static const struct msm_vidc_hfi_buffer_handle dec_input_hfi_handle[] = { + {HFI_BUFFER_METADATA, handle_input_metadata_buffer }, + {HFI_BUFFER_BITSTREAM, handle_input_buffer }, + {HFI_BUFFER_BIN, handle_bin_buffer }, + {HFI_BUFFER_COMV, handle_comv_buffer }, + {HFI_BUFFER_NON_COMV, handle_non_comv_buffer }, + {HFI_BUFFER_LINE, handle_line_buffer }, + {HFI_BUFFER_PERSIST, handle_persist_buffer }, + }; + static const struct msm_vidc_hfi_buffer_handle dec_output_hfi_handle[] = { + {HFI_BUFFER_METADATA, handle_output_metadata_buffer }, + {HFI_BUFFER_RAW, handle_output_buffer }, + {HFI_BUFFER_DPB, handle_dpb_buffer }, + }; if (pkt->flags & HFI_FW_FLAGS_SESSION_ERROR) { i_vpr_e(inst, "%s: received session error\n", __func__); @@ -924,86 +996,56 @@ static int handle_session_buffer(struct msm_vidc_inst *inst, return 0; } - port_type = pkt->port; - buffer = (struct hfi_buffer *)((u8 *)pkt + sizeof(struct hfi_packet)); - buf_type = buffer->type; - if (!is_valid_hfi_buffer_type(inst, buf_type, __func__)) { + if (!is_valid_hfi_buffer_type(inst, buffer->type, __func__)) { msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); return 0; } - if (!is_valid_hfi_port(inst, port_type, buf_type, __func__)) { + if (!is_valid_hfi_port(inst, pkt->port, buffer->type, __func__)) { msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); return 0; } if (is_encode_session(inst)) { - if (port_type == HFI_PORT_BITSTREAM) { - if (buf_type == HFI_BUFFER_METADATA) - rc = handle_output_metadata_buffer(inst, buffer); - else if (buf_type == HFI_BUFFER_BITSTREAM) - rc = handle_output_buffer(inst, buffer); - else if (buf_type == HFI_BUFFER_BIN) - rc = handle_bin_buffer(inst, buffer); - else if (buf_type == HFI_BUFFER_COMV) - rc = handle_comv_buffer(inst, buffer); - else if (buf_type == HFI_BUFFER_NON_COMV) - rc = handle_non_comv_buffer(inst, buffer); - else if (buf_type == HFI_BUFFER_LINE) - rc = handle_line_buffer(inst, buffer); - else if (buf_type == HFI_BUFFER_ARP) - rc = handle_arp_buffer(inst, buffer); - else if (buf_type == HFI_BUFFER_DPB) - rc = handle_dpb_buffer(inst, buffer); - else - i_vpr_e(inst, "%s: unknown bitstream port buffer type %#x\n", - __func__, buf_type); - } else if (port_type == HFI_PORT_RAW) { - if (buf_type == HFI_BUFFER_METADATA) - rc = handle_input_metadata_buffer(inst, buffer); - else if (buf_type == HFI_BUFFER_RAW) - rc = handle_input_buffer(inst, buffer); - else - i_vpr_e(inst, "%s: unknown raw port buffer type %#x\n", - __func__, buf_type); + if (pkt->port == HFI_PORT_RAW) { + hfi_handle_size = ARRAY_SIZE(enc_input_hfi_handle); + hfi_handle_arr = enc_input_hfi_handle; + } else if (pkt->port == HFI_PORT_BITSTREAM) { + hfi_handle_size = ARRAY_SIZE(enc_output_hfi_handle); + hfi_handle_arr = enc_output_hfi_handle; } } else if (is_decode_session(inst)) { - if (port_type == HFI_PORT_BITSTREAM) { - if (buf_type == HFI_BUFFER_METADATA) - rc = handle_input_metadata_buffer(inst, buffer); - else if (buf_type == HFI_BUFFER_BITSTREAM) - rc = handle_input_buffer(inst, buffer); - else if (buf_type == HFI_BUFFER_BIN) - rc = handle_bin_buffer(inst, buffer); - else if (buf_type == HFI_BUFFER_COMV) - rc = handle_comv_buffer(inst, buffer); - else if (buf_type == HFI_BUFFER_NON_COMV) - rc = handle_non_comv_buffer(inst, buffer); - else if (buf_type == HFI_BUFFER_LINE) - rc = handle_line_buffer(inst, buffer); - else if (buf_type == HFI_BUFFER_PERSIST) - rc = handle_persist_buffer(inst, buffer); - else - i_vpr_e(inst, "%s: unknown bitstream port buffer type %#x\n", - __func__, buf_type); - } else if (port_type == HFI_PORT_RAW) { - if (buf_type == HFI_BUFFER_METADATA) - rc = handle_output_metadata_buffer(inst, buffer); - else if (buf_type == HFI_BUFFER_RAW) - rc = handle_output_buffer(inst, buffer); - else if (buf_type == HFI_BUFFER_DPB) - rc = handle_dpb_buffer(inst, buffer); - else - i_vpr_e(inst, "%s: unknown raw port buffer type %#x\n", - __func__, buf_type); + if (pkt->port == HFI_PORT_BITSTREAM) { + hfi_handle_size = ARRAY_SIZE(dec_input_hfi_handle); + hfi_handle_arr = dec_input_hfi_handle; + } else if (pkt->port == HFI_PORT_RAW) { + hfi_handle_size = ARRAY_SIZE(dec_output_hfi_handle); + hfi_handle_arr = dec_output_hfi_handle; } - } else { - i_vpr_e(inst, "%s: invalid session %d\n", - __func__, inst->domain); + } + + /* handle invalid session */ + if (!hfi_handle_arr || !hfi_handle_size) { + i_vpr_e(inst, "%s: invalid session %d\n", __func__, inst->domain); return -EINVAL; } + /* handle session buffer */ + for (i = 0; i < hfi_handle_size; i++) { + if (hfi_handle_arr[i].type == buffer->type) { + rc = hfi_handle_arr[i].handle(inst, buffer); + if (rc) + return rc; + break; + } + } + + /* handle unknown buffer type */ + if (i == hfi_handle_size) + i_vpr_e(inst, "%s: port %u, unknown buffer type %#x\n", __func__, + pkt->port, buffer->type); + return rc; } @@ -1072,32 +1114,36 @@ static int handle_session_resume(struct msm_vidc_inst *inst, static int handle_session_command(struct msm_vidc_inst *inst, struct hfi_packet *pkt) { - switch (pkt->type) { - case HFI_CMD_OPEN: - return handle_session_open(inst, pkt); - case HFI_CMD_CLOSE: - return handle_session_close(inst, pkt); - case HFI_CMD_START: - return handle_session_start(inst, pkt); - case HFI_CMD_STOP: - return handle_session_stop(inst, pkt); - case HFI_CMD_DRAIN: - return handle_session_drain(inst, pkt); - case HFI_CMD_BUFFER: - return handle_session_buffer(inst, pkt); - case HFI_CMD_SETTINGS_CHANGE: - return handle_port_settings_change(inst, pkt); - case HFI_CMD_SUBSCRIBE_MODE: - return handle_session_subscribe_mode(inst, pkt); - case HFI_CMD_DELIVERY_MODE: - return handle_session_delivery_mode(inst, pkt); - case HFI_CMD_RESUME: - return handle_session_resume(inst, pkt); - default: - i_vpr_e(inst, "%s: Unsupported command type: %#x\n", - __func__, pkt->type); + int i, rc; + static const struct msm_vidc_hfi_packet_handle hfi_pkt_handle[] = { + {HFI_CMD_OPEN, handle_session_open }, + {HFI_CMD_CLOSE, handle_session_close }, + {HFI_CMD_START, handle_session_start }, + {HFI_CMD_STOP, handle_session_stop }, + {HFI_CMD_DRAIN, handle_session_drain }, + {HFI_CMD_BUFFER, handle_session_buffer }, + {HFI_CMD_SETTINGS_CHANGE, handle_port_settings_change }, + {HFI_CMD_SUBSCRIBE_MODE, handle_session_subscribe_mode }, + {HFI_CMD_DELIVERY_MODE, handle_session_delivery_mode }, + {HFI_CMD_RESUME, handle_session_resume }, + }; + + /* handle session pkt */ + for (i = 0; i < ARRAY_SIZE(hfi_pkt_handle); i++) { + if (hfi_pkt_handle[i].type == pkt->type) { + rc = hfi_pkt_handle[i].handle(inst, pkt); + if (rc) + return rc; + break; + } + } + + /* handle unknown buffer type */ + if (i == ARRAY_SIZE(hfi_pkt_handle)) { + i_vpr_e(inst, "%s: Unsupported command type: %#x\n", __func__, pkt->type); return -EINVAL; } + return 0; } @@ -1244,35 +1290,99 @@ static int handle_system_response(struct msm_vidc_core *core, { int rc = 0; struct hfi_packet *packet; - u8 *pkt; - int i; + u8 *pkt, *start_pkt; + bool parsed = false; + int i, j, k; + static const struct msm_vidc_core_hfi_range be[] = { + {HFI_SYSTEM_ERROR_BEGIN, HFI_SYSTEM_ERROR_END, handle_system_error }, + {HFI_PROP_BEGIN, HFI_PROP_END, handle_system_property }, + {HFI_CMD_BEGIN, HFI_CMD_END, handle_system_init }, + }; - pkt = (u8 *)((u8 *)hdr + sizeof(struct hfi_header)); + start_pkt = (u8 *)((u8 *)hdr + sizeof(struct hfi_header)); + for (i = 0; i < ARRAY_SIZE(be); i++) { + pkt = start_pkt; + for (j = 0; j < hdr->num_packets; j++) { + packet = (struct hfi_packet *)pkt; + parsed = false; + if (in_range(be[i], packet->type)) { + parsed = true; + rc = be[i].handle(core, packet); + if (rc) + return -EINVAL; + } - for (i = 0; i < hdr->num_packets; i++) { - if (validate_packet((u8 *)pkt, core->response_packet, - core->packet_size, __func__)) { - rc = -EINVAL; - goto exit; + /* is pkt type unknown ? */ + if (!parsed) { + for (k = 0; k < ARRAY_SIZE(be); k++) + if (in_range(be[k], packet->type)) + parsed |= true; + + if (!parsed) + d_vpr_e("%s: unknown packet received %#x\n", + __func__, packet->type); + } + + pkt += packet->size; } - packet = (struct hfi_packet *)pkt; - if (packet->type == HFI_CMD_INIT) { - rc = handle_system_init(core, packet); - } else if (packet->type > HFI_SYSTEM_ERROR_BEGIN && - packet->type < HFI_SYSTEM_ERROR_END) { - rc = handle_system_error(core, packet); - } else if (packet->type > HFI_PROP_BEGIN && - packet->type < HFI_PROP_CODEC) { - rc = handle_system_property(core, packet); - } else { - d_vpr_e("%s: Unknown packet type: %#x\n", - __func__, packet->type); - rc = -EINVAL; - goto exit; - } - pkt += packet->size; } + + return 0; +} + +static int __handle_session_response(struct msm_vidc_inst *inst, + struct hfi_header *hdr) +{ + int rc = 0; + struct hfi_packet *packet; + u8 *pkt, *start_pkt; + bool dequeue = false, parsed = false; + int i, j, k; + static const struct msm_vidc_inst_hfi_range be[] = { + {HFI_SESSION_ERROR_BEGIN, HFI_SESSION_ERROR_END, handle_session_error }, + {HFI_INFORMATION_BEGIN, HFI_INFORMATION_END, handle_session_info }, + {HFI_PROP_BEGIN, HFI_PROP_END, handle_session_property }, + {HFI_CMD_BEGIN, HFI_CMD_END, handle_session_command }, + }; + + memset(&inst->hfi_frame_info, 0, sizeof(struct msm_vidc_hfi_frame_info)); + start_pkt = (u8 *)((u8 *)hdr + sizeof(struct hfi_header)); + for (i = 0; i < ARRAY_SIZE(be); i++) { + pkt = start_pkt; + for (j = 0; j < hdr->num_packets; j++) { + packet = (struct hfi_packet *)pkt; + parsed = false; + if (in_range(be[i], packet->type)) { + parsed = true; + dequeue |= (packet->type == HFI_CMD_BUFFER); + rc = be[i].handle(inst, packet); + if (rc) + goto exit; + } + + /* is pkt type unknown ? */ + if (!parsed) { + for (k = 0; k < ARRAY_SIZE(be); k++) + if (in_range(be[k], packet->type)) + parsed |= true; + + if (!parsed) + d_vpr_e("%s: unknown packet received %#x\n", + __func__, packet->type); + } + + pkt += packet->size; + } + } + if (dequeue) { + rc = handle_dequeue_buffers(inst); + if (rc) + goto exit; + } + exit: + memset(&inst->hfi_frame_info, 0, sizeof(struct msm_vidc_hfi_frame_info)); + return rc; } @@ -1281,18 +1391,8 @@ int handle_session_response_work(struct msm_vidc_inst *inst, { int rc = 0; struct hfi_header *hdr = NULL; - struct hfi_packet *packet; - u8 *pkt, *start_pkt; - u32 hfi_cmd_type = 0; - int i, j; - struct msm_vidc_hfi_range be[] = { - {HFI_SESSION_ERROR_BEGIN, HFI_SESSION_ERROR_END, handle_session_error}, - {HFI_INFORMATION_BEGIN, HFI_INFORMATION_END, handle_session_info}, - {HFI_PROP_BEGIN, HFI_PROP_END, handle_session_property}, - {HFI_CMD_BEGIN, HFI_CMD_END, handle_session_command}, - }; - if (!inst || !resp_work) { + if (!inst || !inst->core || !resp_work) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -1302,58 +1402,14 @@ int handle_session_response_work(struct msm_vidc_inst *inst, i_vpr_e(inst, "%s: invalid params\n", __func__); return -EINVAL; } - - hfi_cmd_type = 0; - pkt = (u8 *)((u8 *)hdr + sizeof(struct hfi_header)); - start_pkt = pkt; - - /* validate all packets */ - for (i = 0; i < hdr->num_packets; i++) { - packet = (struct hfi_packet * ) pkt; - if (validate_packet(pkt, resp_work->data, - resp_work->data_size, __func__)) { - rc = -EINVAL; - goto exit; - } - pkt += packet->size; - } - if (resp_work->type == RESP_WORK_INPUT_PSC) msm_vdec_init_input_subcr_params(inst); - memset(&inst->hfi_frame_info, 0, - sizeof(struct msm_vidc_hfi_frame_info)); - for (i = 0; i < ARRAY_SIZE(be); i++) { - pkt = start_pkt; - for (j = 0; j < hdr->num_packets; j++) { - packet = (struct hfi_packet * ) pkt; - if (in_range(be[i], packet->type)) { - if (hfi_cmd_type == HFI_CMD_SETTINGS_CHANGE) { - i_vpr_e(inst, - "%s: invalid packet type %d in port settings change\n", - __func__, packet->type); - rc = -EINVAL; - } - hfi_cmd_type = packet->type; - rc = be[i].handle(inst, packet); - if (rc) - goto exit; - } - pkt += packet->size; - } - } + rc = __handle_session_response(inst, hdr); + if (rc) + return rc; - if (hfi_cmd_type == HFI_CMD_BUFFER) { - rc = handle_dequeue_buffers(inst); - if (rc) - goto exit; - } - - memset(&inst->hfi_frame_info, 0, - sizeof(struct msm_vidc_hfi_frame_info)); - -exit: - return rc; + return 0; } void handle_session_response_work_handler(struct work_struct *work) @@ -1448,89 +1504,63 @@ static int queue_response_work(struct msm_vidc_inst *inst, static int handle_session_response(struct msm_vidc_core *core, struct hfi_header *hdr) { - int rc = 0; struct msm_vidc_inst *inst; struct hfi_packet *packet; - u8 *pkt, *start_pkt; - u32 hfi_cmd_type = 0; - u32 hfi_port = 0; - int i, j; - struct msm_vidc_hfi_range be[] = { - {HFI_SESSION_ERROR_BEGIN, HFI_SESSION_ERROR_END, handle_session_error}, - {HFI_INFORMATION_BEGIN, HFI_INFORMATION_END, handle_session_info}, - {HFI_PROP_BEGIN, HFI_PROP_END, handle_session_property}, - {HFI_CMD_BEGIN, HFI_CMD_END, handle_session_command}, - }; + u8 *pkt; + enum response_work_type type; + int i, rc = 0; + bool offload = false; + + if (!core || !hdr) { + d_vpr_e("%s: Invalid params\n", __func__); + return -EINVAL; + } inst = get_inst(core, hdr->session_id); if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); + d_vpr_e("%s: Invalid params\n", __func__); return -EINVAL; } mutex_lock(&inst->lock); - hfi_cmd_type = 0; - hfi_port = 0; + /* search for special pkt */ pkt = (u8 *)((u8 *)hdr + sizeof(struct hfi_header)); - start_pkt = pkt; - - /* validate all packets */ for (i = 0; i < hdr->num_packets; i++) { - packet = (struct hfi_packet * ) pkt; - if (validate_packet(pkt, core->response_packet, - core->packet_size, __func__)) { - rc = -EINVAL; - goto exit; - } - pkt += packet->size; - } + packet = (struct hfi_packet *)pkt; - pkt = start_pkt; - for (j = 0; j < hdr->num_packets; j++) { - packet = (struct hfi_packet * ) pkt; if (packet->type == HFI_CMD_SETTINGS_CHANGE) { - if (packet->port == HFI_PORT_BITSTREAM) - rc = queue_response_work(inst, - RESP_WORK_INPUT_PSC, - (void *)hdr, hdr->size); - else if (packet->port == HFI_PORT_RAW) - rc = queue_response_work(inst, - RESP_WORK_OUTPUT_PSC, - (void *)hdr, hdr->size); - goto exit; + if (packet->port == HFI_PORT_BITSTREAM) { + offload = true; + type = RESP_WORK_INPUT_PSC; + } else if (packet->port == HFI_PORT_RAW) { + offload = true; + type = RESP_WORK_OUTPUT_PSC; + } } else if (packet->type == HFI_CMD_BUFFER && - packet->port == HFI_PORT_RAW && - check_last_flag(inst, packet)) { - rc = queue_response_work(inst, - RESP_WORK_LAST_FLAG, - (void *)hdr, hdr->size); - goto exit; + packet->port == HFI_PORT_RAW) { + if (check_last_flag(inst, packet)) { + offload = true; + type = RESP_WORK_LAST_FLAG; + } } + if (offload) + break; + pkt += packet->size; } - memset(&inst->hfi_frame_info, 0, sizeof(struct msm_vidc_hfi_frame_info)); - for (i = 0; i < ARRAY_SIZE(be); i++) { - pkt = start_pkt; - for (j = 0; j < hdr->num_packets; j++) { - packet = (struct hfi_packet * ) pkt; - if (in_range(be[i], packet->type)) { - hfi_cmd_type = packet->type; - rc = be[i].handle(inst, packet); - if (rc) - goto exit; - } - pkt += packet->size; - } - } - - if (hfi_cmd_type == HFI_CMD_BUFFER) { - rc = handle_dequeue_buffers(inst); + if (offload) { + i_vpr_h(inst, "%s: queue response work %#x\n", __func__, type); + rc = queue_response_work(inst, type, (void *)hdr, hdr->size); if (rc) - goto exit; + i_vpr_e(inst, "%s: Offload response work failed\n", __func__); + + goto exit; } - memset(&inst->hfi_frame_info, 0, sizeof(struct msm_vidc_hfi_frame_info)); + rc = __handle_session_response(inst, hdr); + if (rc) + goto exit; exit: mutex_unlock(&inst->lock); @@ -1541,6 +1571,7 @@ exit: int handle_response(struct msm_vidc_core *core, void *response) { struct hfi_header *hdr; + int rc = 0; if (!core || !response) { d_vpr_e("%s: invalid params\n", __func__); @@ -1548,9 +1579,11 @@ int handle_response(struct msm_vidc_core *core, void *response) } hdr = (struct hfi_header *)response; - if (validate_packet((u8 *)hdr, core->response_packet, - core->packet_size, __func__)) + rc = validate_hdr_packet(core, hdr, __func__); + if (rc) { + d_vpr_e("%s: hdr pkt validation failed\n", __func__); return -EINVAL; + } if (!hdr->session_id) return handle_system_response(core, hdr); From 03bda80d9ed5847b2d7ff5d314029baae783cc49 Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Mon, 8 Mar 2021 17:29:40 -0800 Subject: [PATCH 0170/1061] video: driver: add release done flag support update hfi command header file to include release done flag and related hfi buffer flag changes. add functionality to release and unmap buffer if this flag is sent by fw. Change-Id: I03fdd7776fcd6ac5e8a147c7dff2dfb6a15250e9 Signed-off-by: Darshana Patil --- driver/vidc/inc/hfi_command.h | 17 +++++----- driver/vidc/inc/hfi_packet.h | 4 ++- driver/vidc/src/hfi_packet.c | 50 ++++++++++++++++++++++++++-- driver/vidc/src/venus_hfi_response.c | 38 +++++++++++++++++++++ 4 files changed, 98 insertions(+), 11 deletions(-) diff --git a/driver/vidc/inc/hfi_command.h b/driver/vidc/inc/hfi_command.h index bbf76f2ccf..e7128f3ab9 100644 --- a/driver/vidc/inc/hfi_command.h +++ b/driver/vidc/inc/hfi_command.h @@ -103,17 +103,18 @@ enum hfi_buffer_type { }; enum hfi_buffer_host_flags { - HFI_BUF_HOST_FLAG_NONE = 0x00000000, - HFI_BUF_HOST_FLAG_RELEASE = 0x00000001, - HFI_BUF_HOST_FLAG_READONLY = 0x00000002, - HFI_BUF_HOST_FLAG_CODEC_CONFIG = 0x00000004, + HFI_BUF_HOST_FLAG_NONE = 0x00000000, + HFI_BUF_HOST_FLAG_RELEASE = 0x00000001, + HFI_BUF_HOST_FLAG_READONLY = 0x00000010, + HFI_BUF_HOST_FLAG_CODEC_CONFIG = 0x00000100, }; enum hfi_buffer_firmware_flags { - HFI_BUF_FW_FLAG_NONE = 0x00000000, - HFI_BUF_FW_FLAG_LAST = 0x00000001, - HFI_BUF_FW_FLAG_READONLY = 0x00000002, - HFI_BUF_FW_FLAG_CODEC_CONFIG = 0x00000004, + HFI_BUF_FW_FLAG_NONE = 0x00000000, + HFI_BUF_FW_FLAG_RELEASE_DONE = 0x00000001, + HFI_BUF_FW_FLAG_READONLY = 0x00000010, + HFI_BUF_FW_FLAG_CODEC_CONFIG = 0x00000100, + HFI_BUF_FW_FLAG_LAST = 0x10000000, }; enum hfi_metapayload_header_flags { diff --git a/driver/vidc/inc/hfi_packet.h b/driver/vidc/inc/hfi_packet.h index 4f25135248..86871f25f9 100644 --- a/driver/vidc/inc/hfi_packet.h +++ b/driver/vidc/inc/hfi_packet.h @@ -16,8 +16,10 @@ u32 get_hfi_port(struct msm_vidc_inst *inst, enum msm_vidc_port_type port); u32 get_hfi_port_from_buffer_type(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type buffer_type); -u32 get_hfi_buffer_type(enum msm_vidc_domain_type domain, +u32 hfi_buf_type_from_driver(enum msm_vidc_domain_type domain, enum msm_vidc_buffer_type buffer_type); +u32 hfi_buf_type_to_driver(enum msm_vidc_domain_type domain, + enum hfi_buffer_type buffer_type, enum hfi_packet_port_type port_type); u32 get_hfi_codec(struct msm_vidc_inst *inst); u32 get_hfi_colorformat(struct msm_vidc_inst *inst, enum msm_vidc_colorformat_type colorformat); diff --git a/driver/vidc/src/hfi_packet.c b/driver/vidc/src/hfi_packet.c index e97cc5fedb..fb7770be46 100644 --- a/driver/vidc/src/hfi_packet.c +++ b/driver/vidc/src/hfi_packet.c @@ -113,7 +113,7 @@ u32 get_hfi_port_from_buffer_type(struct msm_vidc_inst *inst, return hfi_port; } -u32 get_hfi_buffer_type(enum msm_vidc_domain_type domain, +u32 hfi_buf_type_from_driver(enum msm_vidc_domain_type domain, enum msm_vidc_buffer_type buffer_type) { switch (buffer_type) { @@ -151,6 +151,52 @@ u32 get_hfi_buffer_type(enum msm_vidc_domain_type domain, } } +u32 hfi_buf_type_to_driver(enum msm_vidc_domain_type domain, + enum hfi_buffer_type buffer_type, enum hfi_packet_port_type port_type) +{ + switch (buffer_type) { + case HFI_BUFFER_BITSTREAM: + if (domain == MSM_VIDC_DECODER) + return MSM_VIDC_BUF_INPUT; + else + return MSM_VIDC_BUF_OUTPUT; + case HFI_BUFFER_RAW: + if (domain == MSM_VIDC_DECODER) + return MSM_VIDC_BUF_OUTPUT; + else + return MSM_VIDC_BUF_INPUT; + case HFI_BUFFER_METADATA: + if (domain == MSM_VIDC_DECODER) + if (port_type == HFI_PORT_BITSTREAM) + return MSM_VIDC_BUF_INPUT_META; + else + return MSM_VIDC_BUF_OUTPUT_META; + else + if (port_type == HFI_PORT_BITSTREAM) + return MSM_VIDC_BUF_OUTPUT_META; + else + return MSM_VIDC_BUF_INPUT_META; + case HFI_BUFFER_BIN: + return MSM_VIDC_BUF_BIN; + case HFI_BUFFER_ARP: + return MSM_VIDC_BUF_ARP; + case HFI_BUFFER_COMV: + return MSM_VIDC_BUF_COMV; + case HFI_BUFFER_NON_COMV: + return MSM_VIDC_BUF_NON_COMV; + case HFI_BUFFER_LINE: + return MSM_VIDC_BUF_LINE; + case HFI_BUFFER_DPB: + return MSM_VIDC_BUF_DPB; + case HFI_BUFFER_PERSIST: + return MSM_VIDC_BUF_PERSIST; + default: + d_vpr_e("invalid buffer type %d\n", + buffer_type); + return 0; + } +} + u32 get_hfi_codec(struct msm_vidc_inst *inst) { switch (inst->codec) { @@ -244,7 +290,7 @@ int get_hfi_buffer(struct msm_vidc_inst *inst, } memset(buf, 0, sizeof(struct hfi_buffer)); - buf->type = get_hfi_buffer_type(inst->domain, buffer->type); + buf->type = hfi_buf_type_from_driver(inst->domain, buffer->type); buf->index = buffer->index; buf->base_address = buffer->device_addr; buf->addr_offset = 0; diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index 653b844bcb..a248b3cf60 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -745,6 +745,7 @@ static int handle_dequeue_buffers(struct msm_vidc_inst* inst) return rc; } +/* todo: remove below funcs once fw supports rel done flag for internl buf*/ static int handle_dpb_buffer(struct msm_vidc_inst *inst, struct hfi_buffer *buffer) { @@ -948,6 +949,41 @@ static int handle_arp_buffer(struct msm_vidc_inst *inst, return rc; } +static int handle_release_buffer(struct msm_vidc_inst *inst, + struct hfi_buffer *buffer, enum hfi_packet_port_type port_type) +{ + int rc = 0; + struct msm_vidc_buffers *buffers; + struct msm_vidc_buffer *buf; + bool found; + + buffers = msm_vidc_get_buffers(inst, hfi_buf_type_to_driver(inst->domain, + buffer->type, port_type), __func__); + if (!buffers) + return -EINVAL; + + found = false; + list_for_each_entry(buf, &buffers->list, list) { + if (buf->device_addr == buffer->base_address) { + found = true; + break; + } + } + if (!found) { + i_vpr_e(inst, "%s: invalid idx %d daddr %#x\n", + __func__, buffer->index, buffer->base_address); + return -EINVAL; + } + if (is_internal_buffer(buf->type)) + rc = msm_vidc_destroy_internal_buffer(inst, buf); + else + rc = msm_vidc_put_driver_buf(inst, buf); + if (rc) + return rc; + + return rc; +} + static int handle_session_buffer(struct msm_vidc_inst *inst, struct hfi_packet *pkt) { @@ -1006,6 +1042,8 @@ static int handle_session_buffer(struct msm_vidc_inst *inst, msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); return 0; } + if (buffer->flags & HFI_BUF_FW_FLAG_RELEASE_DONE) + return handle_release_buffer(inst, buffer, pkt->port); if (is_encode_session(inst)) { if (pkt->port == HFI_PORT_RAW) { From ccb6da75673eb994c9f4a22c3a1895f4138127c9 Mon Sep 17 00:00:00 2001 From: Mihir Ganu Date: Fri, 5 Mar 2021 17:51:10 -0800 Subject: [PATCH 0171/1061] video: driver: Add support for non-secure pix context bank - Add support for a new non-secure pix context bank. - Remove usage of deprecated 'buffer-types' in context banks. Change-Id: I3a21eb8ce1d9aff277568d54aadb54193ad0ce75 Signed-off-by: Mihir Ganu --- driver/vidc/inc/msm_vidc_driver.h | 8 ++- driver/vidc/inc/msm_vidc_dt.h | 1 - driver/vidc/inc/msm_vidc_internal.h | 1 + driver/vidc/src/msm_vidc_driver.c | 103 +++++++++++++++++----------- driver/vidc/src/msm_vidc_dt.c | 16 ++--- driver/vidc/src/msm_vidc_memory.c | 1 + 6 files changed, 75 insertions(+), 55 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 1dd76652ec..dfef8e16e5 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -180,11 +180,17 @@ static inline bool is_active_session(u64 prev, u64 curr) MSM_VIDC_SESSION_INACTIVE_THRESHOLD_MS); } -static inline bool is_session_error(struct msm_vidc_inst* inst) +static inline bool is_session_error(struct msm_vidc_inst *inst) { return inst->state == MSM_VIDC_ERROR; } +static inline bool is_secure_region(enum msm_vidc_buffer_region region) +{ + return !(region == MSM_VIDC_NON_SECURE || + region == MSM_VIDC_NON_SECURE_PIXEL); +} + const char *cap_name(enum msm_vidc_inst_capability_type cap); void print_vidc_buffer(u32 tag, const char *tag_str, const char *str, struct msm_vidc_inst *inst, struct msm_vidc_buffer *vbuf); diff --git a/driver/vidc/inc/msm_vidc_dt.h b/driver/vidc/inc/msm_vidc_dt.h index d3baaee007..04b58a8451 100644 --- a/driver/vidc/inc/msm_vidc_dt.h +++ b/driver/vidc/inc/msm_vidc_dt.h @@ -104,7 +104,6 @@ struct addr_set { struct context_bank_info { struct list_head list; const char *name; - u32 buffer_type; bool is_secure; struct addr_range addr_range; struct device *dev; diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index aafcd7c803..638458b7dc 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -168,6 +168,7 @@ enum msm_vidc_buffer_attributes { enum msm_vidc_buffer_region { MSM_VIDC_REGION_NONE = 0, MSM_VIDC_NON_SECURE, + MSM_VIDC_NON_SECURE_PIXEL, MSM_VIDC_SECURE_PIXEL, MSM_VIDC_SECURE_NONPIXEL, MSM_VIDC_SECURE_BITSTREAM, diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index a2edba81d0..c1cea19e86 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -784,48 +784,69 @@ u32 msm_vidc_get_buffer_region(struct msm_vidc_inst *inst, { u32 region = MSM_VIDC_NON_SECURE; - if (!is_secure_session(inst) && - buffer_type != MSM_VIDC_BUF_ARP) { - return region; + if (!is_secure_session(inst)) { + switch (buffer_type) { + case MSM_VIDC_BUF_ARP: + region = MSM_VIDC_SECURE_NONPIXEL; + break; + case MSM_VIDC_BUF_INPUT: + if (is_encode_session(inst)) + region = MSM_VIDC_NON_SECURE_PIXEL; + else + region = MSM_VIDC_NON_SECURE; + break; + case MSM_VIDC_BUF_OUTPUT: + if (is_decode_session(inst)) + region = MSM_VIDC_NON_SECURE_PIXEL; + else + region = MSM_VIDC_NON_SECURE; + break; + case MSM_VIDC_BUF_DPB: + region = MSM_VIDC_NON_SECURE_PIXEL; + break; + default: + region = MSM_VIDC_NON_SECURE; + break; + } + } else { + switch (buffer_type) { + case MSM_VIDC_BUF_INPUT: + if (is_encode_session(inst)) + region = MSM_VIDC_SECURE_PIXEL; + else + region = MSM_VIDC_SECURE_BITSTREAM; + break; + case MSM_VIDC_BUF_OUTPUT: + if (is_encode_session(inst)) + region = MSM_VIDC_SECURE_BITSTREAM; + else + region = MSM_VIDC_SECURE_PIXEL; + break; + case MSM_VIDC_BUF_INPUT_META: + case MSM_VIDC_BUF_OUTPUT_META: + region = MSM_VIDC_NON_SECURE; + break; + case MSM_VIDC_BUF_BIN: + region = MSM_VIDC_SECURE_BITSTREAM; + break; + case MSM_VIDC_BUF_COMV: + case MSM_VIDC_BUF_NON_COMV: + case MSM_VIDC_BUF_LINE: + region = MSM_VIDC_SECURE_NONPIXEL; + break; + case MSM_VIDC_BUF_DPB: + region = MSM_VIDC_SECURE_PIXEL; + break; + case MSM_VIDC_BUF_PERSIST: + case MSM_VIDC_BUF_ARP: + region = MSM_VIDC_SECURE_NONPIXEL; + break; + default: + i_vpr_e(inst, "%s: invalid driver buffer type %d\n", + func, buffer_type); + } } - switch (buffer_type) { - case MSM_VIDC_BUF_INPUT: - if (is_encode_session(inst)) - region = MSM_VIDC_SECURE_PIXEL; - else - region = MSM_VIDC_SECURE_BITSTREAM; - break; - case MSM_VIDC_BUF_OUTPUT: - if (is_encode_session(inst)) - region = MSM_VIDC_SECURE_BITSTREAM; - else - region = MSM_VIDC_SECURE_PIXEL; - break; - case MSM_VIDC_BUF_INPUT_META: - case MSM_VIDC_BUF_OUTPUT_META: - region = MSM_VIDC_NON_SECURE; - break; - case MSM_VIDC_BUF_BIN: - region = MSM_VIDC_SECURE_BITSTREAM; - break; - case MSM_VIDC_BUF_COMV: - case MSM_VIDC_BUF_NON_COMV: - case MSM_VIDC_BUF_LINE: - region = MSM_VIDC_SECURE_NONPIXEL; - break; - case MSM_VIDC_BUF_DPB: - region = MSM_VIDC_SECURE_PIXEL; - break; - case MSM_VIDC_BUF_PERSIST: - // TODO: Need to revisit for ARP - case MSM_VIDC_BUF_ARP: - region = MSM_VIDC_SECURE_NONPIXEL; - break; - default: - i_vpr_e(inst, "%s: invalid driver buffer type %d\n", - func, buffer_type); - } return region; } @@ -2283,7 +2304,7 @@ int msm_vidc_create_internal_buffer(struct msm_vidc_inst *inst, alloc->region = msm_vidc_get_buffer_region(inst, buffer_type, __func__); alloc->size = buffer->buffer_size; - alloc->secure = (alloc->region > MSM_VIDC_NON_SECURE) ? 1 : 0; + alloc->secure = is_secure_region(alloc->region); rc = msm_vidc_memory_alloc(inst->core, alloc); if (rc) return -ENOMEM; diff --git a/driver/vidc/src/msm_vidc_dt.c b/driver/vidc/src/msm_vidc_dt.c index f0616155c3..a2d9c1ea38 100644 --- a/driver/vidc/src/msm_vidc_dt.c +++ b/driver/vidc/src/msm_vidc_dt.c @@ -819,10 +819,9 @@ static int msm_vidc_setup_context_bank(struct msm_vidc_core *core, d_vpr_h("Attached %s and created mapping\n", dev_name(dev)); d_vpr_h( - "Context bank: %s, buffer_type: %#x, is_secure: %d, address range start: %#x, size: %#x, dev: %pK, domain: %pK", - cb->name, cb->buffer_type, cb->is_secure, cb->addr_range.start, + "Context bank: %s, is_secure: %d, address range start: %#x, size: %#x, dev: %pK, domain: %pK", + cb->name, cb->is_secure, cb->addr_range.start, cb->addr_range.size, cb->dev, cb->domain); - remove_cb: return rc; } @@ -868,16 +867,9 @@ static int msm_vidc_populate_context_bank(struct device *dev, d_vpr_h("context bank %s: secure = %d\n", cb->name, cb->is_secure); - /* setup buffer type for each sub device*/ - rc = of_property_read_u32(np, "buffer-types", &cb->buffer_type); - if (rc) { - d_vpr_e("failed to load buffer_type info %d\n", rc); - rc = -ENOENT; - goto err_setup_cb; - } - d_vpr_h("context bank %s address start %x size %x buffer_type %x\n", + d_vpr_h("context bank %s address start %x size %x\n", cb->name, cb->addr_range.start, - cb->addr_range.size, cb->buffer_type); + cb->addr_range.size); rc = msm_vidc_setup_context_bank(core, cb, dev); if (rc) { diff --git a/driver/vidc/src/msm_vidc_memory.c b/driver/vidc/src/msm_vidc_memory.c index 7cbed6f03f..ff362febb5 100644 --- a/driver/vidc/src/msm_vidc_memory.c +++ b/driver/vidc/src/msm_vidc_memory.c @@ -27,6 +27,7 @@ struct context_bank_info *get_context_bank(struct msm_vidc_core *core, static const struct msm_vidc_buf_region_name buf_region_name[] = { {MSM_VIDC_REGION_NONE, "none" }, {MSM_VIDC_NON_SECURE, "venus_ns" }, + {MSM_VIDC_NON_SECURE_PIXEL, "venus_ns_pixel" }, {MSM_VIDC_SECURE_PIXEL, "venus_sec_pixel" }, {MSM_VIDC_SECURE_NONPIXEL, "venus_sec_non_pixel" }, {MSM_VIDC_SECURE_BITSTREAM, "venus_sec_bitstream" }, From d102315942bd79936fd58691fb1c6c23cbe88672 Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Wed, 10 Mar 2021 16:18:54 -0800 Subject: [PATCH 0172/1061] video: driver: add picture type for decoder subscribe for picture type property on output port for decoder. Change-Id: I4354f47777ca51a257f8ab85e9cb85faddad0099 Signed-off-by: Darshana Patil --- driver/vidc/src/msm_vdec.c | 7 +++---- driver/vidc/src/venus_hfi_response.c | 7 ------- 2 files changed, 3 insertions(+), 11 deletions(-) diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 11969dd911..7c2e9ac072 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -61,6 +61,7 @@ static const u32 msm_vdec_input_subscribe_for_properties[] = { static const u32 msm_vdec_output_subscribe_for_properties[] = { HFI_PROP_WORST_COMPRESSION_RATIO, HFI_PROP_WORST_COMPLEXITY_FACTOR, + HFI_PROP_PICTURE_TYPE, }; static const u32 msm_vdec_internal_buffer_type[] = { @@ -1067,14 +1068,12 @@ static int msm_vdec_subscribe_property(struct msm_vidc_inst *inst, payload[i + 1] = msm_vdec_input_subscribe_for_properties[i]; payload_size = (ARRAY_SIZE(msm_vdec_input_subscribe_for_properties) + 1) * sizeof(u32); - } - else if (port == OUTPUT_PORT) { + } else if (port == OUTPUT_PORT) { for (i = 0; i < ARRAY_SIZE(msm_vdec_output_subscribe_for_properties); i++) payload[i + 1] = msm_vdec_output_subscribe_for_properties[i]; payload_size = (ARRAY_SIZE(msm_vdec_output_subscribe_for_properties) + 1) * sizeof(u32); - } - else { + } else { i_vpr_e(inst, "%s: invalid port: %d\n", __func__, port); return -EINVAL; } diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index a248b3cf60..8332370c8b 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -1236,13 +1236,6 @@ static int handle_session_property(struct msm_vidc_inst *inst, inst->subcr_params[port].tier = payload_ptr[0]; break; case HFI_PROP_PICTURE_TYPE: - if (is_encode_session(inst) && port == INPUT_PORT) { - rc = -EINVAL; - i_vpr_e(inst, - "%s: invalid port: %d for property %#x\n", - __func__, pkt->port, pkt->type); - break; - } inst->hfi_frame_info.picture_type = payload_ptr[0]; break; case HFI_PROP_NO_OUTPUT: From cb2b2112f142c80479dba8aa2c8528cc41432e2a Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Fri, 12 Mar 2021 18:19:30 +0530 Subject: [PATCH 0173/1061] video: driver: add HEIC codec type to support image session Added V4L2_PIX_FMT_HEIC codec type to support image encode and decode session. Change-Id: I41fef70de36e853a694afe5fca7a365e46a1b034 Signed-off-by: Govindaraj Rajagopal --- include/uapi/vidc/media/v4l2_vidc_extensions.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/include/uapi/vidc/media/v4l2_vidc_extensions.h b/include/uapi/vidc/media/v4l2_vidc_extensions.h index 82cf512848..a546ccc02e 100644 --- a/include/uapi/vidc/media/v4l2_vidc_extensions.h +++ b/include/uapi/vidc/media/v4l2_vidc_extensions.h @@ -25,6 +25,8 @@ /* 32 ARGB-8-8-8-8 compressed */ #define V4L2_PIX_FMT_VIDC_ARGB32C v4l2_fourcc('Q', '2', '4', 'C') #define V4L2_META_FMT_VIDC v4l2_fourcc('Q', 'M', 'E', 'T') +/* HEIC encoder and decoder */ +#define V4L2_PIX_FMT_HEIC v4l2_fourcc('H', 'E', 'I', 'C') /* start of vidc specific colorspace definitions */ #define V4L2_COLORSPACE_VIDC_GENERIC_FILM 101 @@ -53,8 +55,6 @@ #define V4L2_MPEG_MSM_VIDC_ENABLE 1 #define V4L2_CID_MPEG_VIDC_SECURE (V4L2_CID_MPEG_VIDC_BASE + 0x1) -/* HEIC encoder and decoder */ -#define V4L2_CID_MPEG_VIDC_HEIC (V4L2_CID_MPEG_VIDC_BASE + 0x2) #define V4L2_CID_MPEG_VIDC_LOWLATENCY_REQUEST (V4L2_CID_MPEG_VIDC_BASE + 0x3) /* FIXme: */ #define V4L2_CID_MPEG_VIDC_CODEC_CONFIG (V4L2_CID_MPEG_VIDC_BASE + 0x4) From 048064ff82bf1e7523f0c8def33f13f02e248ca7 Mon Sep 17 00:00:00 2001 From: Vinay Pandurangi Date: Fri, 12 Mar 2021 18:34:01 -0800 Subject: [PATCH 0174/1061] Revert video: driver: add HEIC codec type to support image session Change-Id: I164df87ab15c31e368a27f5f7f8d0f207f73df6b --- include/uapi/vidc/media/v4l2_vidc_extensions.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/include/uapi/vidc/media/v4l2_vidc_extensions.h b/include/uapi/vidc/media/v4l2_vidc_extensions.h index a546ccc02e..4f6ef39f0c 100644 --- a/include/uapi/vidc/media/v4l2_vidc_extensions.h +++ b/include/uapi/vidc/media/v4l2_vidc_extensions.h @@ -25,8 +25,6 @@ /* 32 ARGB-8-8-8-8 compressed */ #define V4L2_PIX_FMT_VIDC_ARGB32C v4l2_fourcc('Q', '2', '4', 'C') #define V4L2_META_FMT_VIDC v4l2_fourcc('Q', 'M', 'E', 'T') -/* HEIC encoder and decoder */ -#define V4L2_PIX_FMT_HEIC v4l2_fourcc('H', 'E', 'I', 'C') /* start of vidc specific colorspace definitions */ #define V4L2_COLORSPACE_VIDC_GENERIC_FILM 101 @@ -55,6 +53,8 @@ #define V4L2_MPEG_MSM_VIDC_ENABLE 1 #define V4L2_CID_MPEG_VIDC_SECURE (V4L2_CID_MPEG_VIDC_BASE + 0x1) +/* HEIC encoder and decoder */ +#define V4L2_CID_MPEG_VIDC_HEIC (V4L2_CID_MPEG_VIDC_BASE + 0x02) #define V4L2_CID_MPEG_VIDC_LOWLATENCY_REQUEST (V4L2_CID_MPEG_VIDC_BASE + 0x3) /* FIXme: */ #define V4L2_CID_MPEG_VIDC_CODEC_CONFIG (V4L2_CID_MPEG_VIDC_BASE + 0x4) From 67f9760f853595b16a148e9df69770dd601fadaf Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Fri, 12 Mar 2021 18:19:30 +0530 Subject: [PATCH 0175/1061] video: driver: add HEIC codec type to support image session Added V4L2_PIX_FMT_HEIC codec type to support image decode and encode session. Change-Id: I1adc3eeacaef5622222122b464ffd43b877638e8 Signed-off-by: Govindaraj Rajagopal --- include/uapi/vidc/media/v4l2_vidc_extensions.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/include/uapi/vidc/media/v4l2_vidc_extensions.h b/include/uapi/vidc/media/v4l2_vidc_extensions.h index 4f6ef39f0c..a546ccc02e 100644 --- a/include/uapi/vidc/media/v4l2_vidc_extensions.h +++ b/include/uapi/vidc/media/v4l2_vidc_extensions.h @@ -25,6 +25,8 @@ /* 32 ARGB-8-8-8-8 compressed */ #define V4L2_PIX_FMT_VIDC_ARGB32C v4l2_fourcc('Q', '2', '4', 'C') #define V4L2_META_FMT_VIDC v4l2_fourcc('Q', 'M', 'E', 'T') +/* HEIC encoder and decoder */ +#define V4L2_PIX_FMT_HEIC v4l2_fourcc('H', 'E', 'I', 'C') /* start of vidc specific colorspace definitions */ #define V4L2_COLORSPACE_VIDC_GENERIC_FILM 101 @@ -53,8 +55,6 @@ #define V4L2_MPEG_MSM_VIDC_ENABLE 1 #define V4L2_CID_MPEG_VIDC_SECURE (V4L2_CID_MPEG_VIDC_BASE + 0x1) -/* HEIC encoder and decoder */ -#define V4L2_CID_MPEG_VIDC_HEIC (V4L2_CID_MPEG_VIDC_BASE + 0x02) #define V4L2_CID_MPEG_VIDC_LOWLATENCY_REQUEST (V4L2_CID_MPEG_VIDC_BASE + 0x3) /* FIXme: */ #define V4L2_CID_MPEG_VIDC_CODEC_CONFIG (V4L2_CID_MPEG_VIDC_BASE + 0x4) From f4045ecbd686029b123758b9d4dccc393177ce6a Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Wed, 10 Mar 2021 22:54:06 +0530 Subject: [PATCH 0176/1061] video: driver: enable image encode and decode support Added change to enable image encode and decode support. Decoder: - codec: hevc - input buffer size: yuv size - run as turbo session - all intra session - disable dcvs & batching - ignore admission control(skip mbps, mbpf check) Encoder: - codec: hevc - rc mode: CQ - profile: MainStillPic - all intra session - output buffer size: 2 * yuv size - output dimension: 512 x 512 - disable dcvs & batching - ignore admission control(skip mbps, mbpf check) - skip scaling check - hfi: set grid enable & disable time_delta based rc. Change-Id: I0af47de1406a53d8d8bf1969a65b3a390b0aacb5 Signed-off-by: Govindaraj Rajagopal --- driver/platform/waipio/src/msm_vidc_waipio.c | 213 ++++++++++++------ .../variant/iris2/src/msm_vidc_buffer_iris2.c | 22 +- .../variant/iris2/src/msm_vidc_power_iris2.c | 1 + driver/vidc/inc/msm_vidc_driver.h | 18 ++ driver/vidc/inc/msm_vidc_internal.h | 7 +- driver/vidc/src/hfi_packet.c | 1 + driver/vidc/src/msm_vdec.c | 23 +- driver/vidc/src/msm_venc.c | 17 +- driver/vidc/src/msm_vidc_buffer.c | 33 ++- driver/vidc/src/msm_vidc_control.c | 10 +- driver/vidc/src/msm_vidc_driver.c | 209 ++++++++++++++++- driver/vidc/src/msm_vidc_memory.c | 2 +- driver/vidc/src/msm_vidc_power.c | 27 +-- driver/vidc/src/venus_hfi_response.c | 35 +-- 14 files changed, 445 insertions(+), 173 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 8034e829d2..3b0fad34d8 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -41,15 +41,14 @@ #define H264 MSM_VIDC_H264 #define HEVC MSM_VIDC_HEVC #define VP9 MSM_VIDC_VP9 -#define CODECS_ALL (MSM_VIDC_H264 | MSM_VIDC_HEVC | \ - MSM_VIDC_VP9) +#define HEIC MSM_VIDC_HEIC +#define CODECS_ALL (H264 | HEVC | VP9 | HEIC) static struct msm_platform_core_capability core_data_waipio[] = { /* {type, value} */ - {ENC_CODECS, H264|HEVC}, - {DEC_CODECS, H264|HEVC|VP9}, - // TODO: MAX_SESSION_COUNT needs to be changed to 16 - {MAX_SESSION_COUNT, 3}, + {ENC_CODECS, H264|HEVC|HEIC}, + {DEC_CODECS, H264|HEVC|VP9|HEIC}, + {MAX_SESSION_COUNT, 16}, {MAX_SECURE_SESSION_COUNT, 3}, {MAX_MBPF, 173056}, /* (8192x4320)/256 + (4096x2176)/256*/ {MAX_MBPS, 7833600}, /* max_load @@ -103,21 +102,17 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {FRAME_WIDTH, DEC, CODECS_ALL, 96, 8192, 1, 1920}, {FRAME_WIDTH, ENC, CODECS_ALL, 128, 8192, 1, 1920}, {LOSSLESS_FRAME_WIDTH, ENC, H264|HEVC, 128, 4096, 1, 1920}, - {SECURE_FRAME_WIDTH, ENC|DEC, CODECS_ALL, 128, 4096, 1, 1920}, - {HEVC_IMAGE_FRAME_WIDTH, ENC, HEVC, 128, 512, 1, 512}, - {HEIC_IMAGE_FRAME_WIDTH, ENC, HEVC, 512, 16384, 1, 16384}, + {SECURE_FRAME_WIDTH, ENC|DEC, H264|HEVC|VP9, 128, 4096, 1, 1920}, {FRAME_HEIGHT, DEC, CODECS_ALL, 96, 8192, 1, 1080}, {FRAME_HEIGHT, ENC, CODECS_ALL, 128, 8192, 1, 1080}, {LOSSLESS_FRAME_HEIGHT, ENC, H264|HEVC, 128, 4096, 1, 1080}, - {SECURE_FRAME_HEIGHT, ENC|DEC, CODECS_ALL, 128, 4096, 1, 1080}, - {HEVC_IMAGE_FRAME_HEIGHT, ENC, HEVC, 128, 512, 1, 512}, - {HEIC_IMAGE_FRAME_HEIGHT, ENC, HEVC, 512, 16384, 1, 16384}, + {SECURE_FRAME_HEIGHT, ENC|DEC, H264|HEVC|VP9, 128, 4096, 1, 1080}, {PIX_FMTS, ENC, H264, MSM_VIDC_FMT_NV12, MSM_VIDC_FMT_NV12C, MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C, MSM_VIDC_FMT_NV12C}, - {PIX_FMTS, ENC, HEVC, + {PIX_FMTS, ENC, HEVC|HEIC, MSM_VIDC_FMT_NV12, MSM_VIDC_FMT_TP10C, MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C | @@ -128,7 +123,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {0}, {PROFILE, MIN_FRAME_QP, MAX_FRAME_QP, I_FRAME_QP}}, - {PIX_FMTS, DEC, HEVC, + {PIX_FMTS, DEC, HEVC|HEIC, MSM_VIDC_FMT_NV12, MSM_VIDC_FMT_TP10C, MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C | @@ -167,10 +162,10 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {LOSSLESS_MBPF, ENC, H264|HEVC, 64, 36864, 1, 36864}, /* Batch Mode Decode */ /* TODO: update with new values based on updated voltage corner */ - {BATCH_MBPF, DEC, CODECS_ALL, 64, 34816, 1, 34816}, + {BATCH_MBPF, DEC, H264|HEVC|VP9, 64, 34816, 1, 34816}, /* (4096 * 2304) / 256 */ - {BATCH_FPS, DEC, CODECS_ALL, 1, 120, 1, 120}, - {SECURE_MBPF, ENC|DEC, CODECS_ALL, 64, 36864, 1, 36864}, + {BATCH_FPS, DEC, H264|HEVC|VP9, 1, 120, 1, 120}, + {SECURE_MBPF, ENC|DEC, H264|HEVC|VP9, 64, 36864, 1, 36864}, /* ((1920 * 1088) / 256) * 480 fps */ {MBPS, ENC, CODECS_ALL, 64, 3916800, 1, 3916800}, /* ((1920 * 1088) / 256) * 960 fps */ @@ -194,10 +189,10 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {OPERATING_RATE, ENC|DEC, CODECS_ALL, 1, INT_MAX, 1, (DEFAULT_FPS << 16)}, - {SCALE_X, ENC, CODECS_ALL, 8192, 65536, 1, 8192}, - {SCALE_X, DEC, CODECS_ALL, 65536, 65536, 1, 65536}, - {SCALE_Y, ENC, CODECS_ALL, 8192, 65536, 1, 8192}, - {SCALE_Y, DEC, CODECS_ALL, 65536, 65536, 1, 65536}, + {SCALE_X, ENC, H264|HEVC, 8192, 65536, 1, 8192}, + {SCALE_X, DEC, H264|HEVC|VP9, 65536, 65536, 1, 65536}, + {SCALE_Y, ENC, H264|HEVC, 8192, 65536, 1, 8192}, + {SCALE_Y, DEC, H264|HEVC|VP9, 65536, 65536, 1, 65536}, {B_FRAME, ENC, H264|HEVC, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, @@ -215,7 +210,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {MB_CYCLES_FW, ENC|DEC, CODECS_ALL, 326389, 326389, 1, 326389}, {MB_CYCLES_FW_VPP, ENC|DEC, CODECS_ALL, 44156, 44156, 1, 44156}, - {SECURE_MODE, ENC|DEC, CODECS_ALL, + {SECURE_MODE, ENC|DEC, H264|HEVC|VP9, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDC_SECURE, @@ -247,7 +242,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { HFI_PROP_ROTATION, CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, - {SUPER_FRAME, ENC, CODECS_ALL, + {SUPER_FRAME, ENC, H264|HEVC, 0, 16, 1, 0, V4L2_CID_MPEG_VIDC_SUPERFRAME, 0}, @@ -304,7 +299,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { /* TODO: Firmware introduced enumeration type for this * with and without seq header. */ - {REQUEST_I_FRAME, ENC, CODECS_ALL, + {REQUEST_I_FRAME, ENC, H264|HEVC, 0, 0, 0, 0, V4L2_CID_MPEG_VIDEO_FORCE_KEY_FRAME, HFI_PROP_REQUEST_SYNC_FRAME, @@ -351,12 +346,12 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { I_FRAME_QP, CONSTANT_QUALITY}, msm_vidc_adjust_bitrate_mode, msm_vidc_set_u32_enum}, - {LOSSLESS, ENC, HEVC, + {LOSSLESS, ENC, HEVC|HEIC, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU}, - {FRAME_SKIP_MODE, ENC, CODECS_ALL, + {FRAME_SKIP_MODE, ENC, H264|HEVC, V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED, V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT, BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED) | @@ -367,12 +362,12 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 0, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - {FRAME_RC_ENABLE, ENC, CODECS_ALL, + {FRAME_RC_ENABLE, ENC, H264|HEVC, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_ENABLE, V4L2_CID_MPEG_VIDEO_FRAME_RC_ENABLE}, - {CONSTANT_QUALITY, ENC, HEVC, + {CONSTANT_QUALITY, ENC, HEVC|HEIC, 1, MAX_CONSTANT_QUALITY, 1, 90, V4L2_CID_MPEG_VIDEO_CONSTANT_QUALITY, HFI_PROP_CONSTANT_QUALITY, @@ -389,7 +384,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {0}, {0}, NULL, msm_vidc_set_u32}, - {GOP_CLOSURE, ENC, CODECS_ALL, + {GOP_CLOSURE, ENC, H264|HEVC, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_ENABLE, V4L2_CID_MPEG_VIDEO_GOP_CLOSURE, @@ -425,14 +420,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { HFI_PROP_CSC_MATRIX, CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, */ - {HEIC, ENC, HEVC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_HEIC, - HFI_PROP_HEIC_GRID_ENABLE, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, - - {LOWLATENCY_MODE, ENC|DEC, CODECS_ALL, + {LOWLATENCY_MODE, ENC|DEC, H264|HEVC|VP9, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDC_LOWLATENCY_REQUEST, @@ -469,7 +457,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { HFI_PROP_BASELAYER_PRIORITYID, CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, - {IR_RANDOM, ENC, CODECS_ALL, + {IR_RANDOM, ENC, H264|HEVC, 0, INT_MAX, 1, 0, V4L2_CID_MPEG_VIDC_INTRA_REFRESH_PERIOD, HFI_PROP_IR_RANDOM_PERIOD, @@ -496,20 +484,20 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {BITRATE_MODE}, {0}, msm_vidc_adjust_delta_based_rc, msm_vidc_set_u32}, - {CONTENT_ADAPTIVE_CODING, ENC, CODECS_ALL, + {CONTENT_ADAPTIVE_CODING, ENC, H264|HEVC, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_ENABLE, V4L2_CID_MPEG_VIDC_CONTENT_ADAPTIVE_CODING, HFI_PROP_CONTENT_ADAPTIVE_CODING, CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, - {BITRATE_BOOST, ENC, CODECS_ALL, + {BITRATE_BOOST, ENC, H264|HEVC, 0, 100, 25, 25, V4L2_CID_MPEG_VIDC_QUALITY_BITRATE_BOOST, HFI_PROP_BITRATE_BOOST, CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, - {VBV_DELAY, ENC, CODECS_ALL, + {VBV_DELAY, ENC, H264|HEVC, 0, 1000, 500, 0, V4L2_CID_MPEG_VIDEO_VBV_DELAY}, @@ -521,7 +509,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {0}, {0}, NULL, msm_vidc_set_min_qp}, - {MIN_FRAME_QP, ENC, HEVC, + {MIN_FRAME_QP, ENC, HEVC|HEIC, MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP, HFI_PROP_MIN_QP_PACKED, @@ -533,7 +521,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, V4L2_CID_MPEG_VIDEO_H264_I_FRAME_MIN_QP}, - {I_FRAME_MIN_QP, ENC, HEVC, + {I_FRAME_MIN_QP, ENC, HEVC|HEIC, MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, V4L2_CID_MPEG_VIDC_HEVC_I_FRAME_MIN_QP}, @@ -541,7 +529,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, V4L2_CID_MPEG_VIDEO_H264_P_FRAME_MIN_QP}, - {P_FRAME_MIN_QP, ENC, HEVC, + {P_FRAME_MIN_QP, ENC, HEVC|HEIC, MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, V4L2_CID_MPEG_VIDC_HEVC_P_FRAME_MIN_QP}, @@ -549,7 +537,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, V4L2_CID_MPEG_VIDC_B_FRAME_MIN_QP}, - {B_FRAME_MIN_QP, ENC, HEVC, + {B_FRAME_MIN_QP, ENC, HEVC|HEIC, MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, V4L2_CID_MPEG_VIDC_B_FRAME_MIN_QP}, @@ -561,7 +549,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {0}, {0}, NULL, msm_vidc_set_min_qp}, - {MAX_FRAME_QP, ENC, HEVC, + {MAX_FRAME_QP, ENC, HEVC|HEIC, MIN_QP_10BIT, MAX_QP, 1, MAX_QP, V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP, HFI_PROP_MAX_QP_PACKED, @@ -573,7 +561,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { MIN_QP_8BIT, MAX_QP, 1, MAX_QP, V4L2_CID_MPEG_VIDEO_H264_I_FRAME_MAX_QP}, - {I_FRAME_MAX_QP, ENC, HEVC, + {I_FRAME_MAX_QP, ENC, HEVC|HEIC, MIN_QP_10BIT, MAX_QP, 1, MAX_QP, V4L2_CID_MPEG_VIDC_HEVC_I_FRAME_MAX_QP}, @@ -581,7 +569,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { MIN_QP_8BIT, MAX_QP, 1, MAX_QP, V4L2_CID_MPEG_VIDEO_H264_P_FRAME_MAX_QP}, - {P_FRAME_MAX_QP, ENC, HEVC, + {P_FRAME_MAX_QP, ENC, HEVC|HEIC, MIN_QP_10BIT, MAX_QP, 1, MAX_QP, V4L2_CID_MPEG_VIDC_HEVC_P_FRAME_MAX_QP}, @@ -589,18 +577,18 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { MIN_QP_8BIT, MAX_QP, 1, MAX_QP, V4L2_CID_MPEG_VIDC_B_FRAME_MAX_QP}, - {B_FRAME_MAX_QP, ENC, HEVC, + {B_FRAME_MAX_QP, ENC, HEVC|HEIC, MIN_QP_10BIT, MAX_QP, 1, MAX_QP, V4L2_CID_MPEG_VIDC_B_FRAME_MAX_QP}, - {HEVC_HIER_QP, ENC, HEVC, + {HEVC_HIER_QP, ENC, HEVC|HEIC, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDEO_HEVC_HIER_QP, HFI_PROP_QP_PACKED, CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, - {I_FRAME_QP, ENC, HEVC, + {I_FRAME_QP, ENC, HEVC|HEIC, MIN_QP_10BIT, MAX_QP, 1, DEFAULT_QP, V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP, HFI_PROP_QP_PACKED, @@ -616,7 +604,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {BITRATE_MODE}, {0}, NULL, msm_vidc_set_frame_qp}, - {P_FRAME_QP, ENC, HEVC, + {P_FRAME_QP, ENC, HEVC|HEIC, MIN_QP_10BIT, MAX_QP, 1, DEFAULT_QP, V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP}, @@ -624,9 +612,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { MIN_QP_8BIT, MAX_QP, 1, DEFAULT_QP, V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP}, - {P_FRAME_QP, ENC, VP9, 0, 127, 1, 40}, - - {B_FRAME_QP, ENC, HEVC, + {B_FRAME_QP, ENC, HEVC|HEIC, MIN_QP_10BIT, MAX_QP, 1, DEFAULT_QP, V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP}, @@ -771,7 +757,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {0}, msm_vidc_adjust_entropy_mode, msm_vidc_set_u32}, - {ENTROPY_MODE, DEC, CODECS_ALL, + {ENTROPY_MODE, DEC, H264|HEVC|VP9, V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC, V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC) | @@ -813,7 +799,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {ENTROPY_MODE}, NULL, msm_vidc_set_u32_enum}, - {PROFILE, ENC|DEC, HEVC, + {PROFILE, ENC|DEC, HEVC|HEIC, V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN, V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10, BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN) | @@ -867,7 +853,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {0}, NULL, msm_vidc_set_u32_enum}, - {LEVEL, ENC|DEC, HEVC, + {LEVEL, ENC|DEC, HEVC|HEIC, V4L2_MPEG_VIDEO_HEVC_LEVEL_1, V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2, BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_1) | @@ -895,7 +881,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { * go/videogki */ - {HEVC_TIER, ENC|DEC, HEVC, + {HEVC_TIER, ENC|DEC, HEVC|HEIC, V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, V4L2_MPEG_VIDEO_HEVC_TIER_HIGH, BIT(V4L2_MPEG_VIDEO_HEVC_TIER_MAIN) | @@ -921,7 +907,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {0}, {0}, NULL, msm_vidc_set_deblock_mode}, - {LF_MODE, ENC, HEVC, + {LF_MODE, ENC, HEVC|HEIC, V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_DISABLED, DB_HEVC_DISABLE_SLICE_BOUNDARY, BIT(V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_DISABLED) | @@ -938,7 +924,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { -6, 6, 1, 0, V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_ALPHA}, - {LF_ALPHA, ENC, HEVC, + {LF_ALPHA, ENC, HEVC|HEIC, -6, 6, 1, 0, V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2}, @@ -946,11 +932,11 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { -6, 6, 1, 0, V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_BETA}, - {LF_BETA, ENC, HEVC, + {LF_BETA, ENC, HEVC|HEIC, -6, 6, 1, 0, V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2}, - {SLICE_MODE, ENC, H264|HEVC, + {SLICE_MODE, ENC, H264|HEVC|HEIC, V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_BYTES, BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE) | @@ -963,20 +949,20 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {0}, {0}, NULL, msm_vidc_set_slice_count}, - {SLICE_MAX_BYTES, ENC, H264|HEVC, + {SLICE_MAX_BYTES, ENC, H264|HEVC|HEIC, 1, INT_MAX, 1, INT_MAX, V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES, HFI_PROP_MULTI_SLICE_BYTES_COUNT, CAP_FLAG_OUTPUT_PORT}, - {SLICE_MAX_MB, ENC, H264|HEVC, + {SLICE_MAX_MB, ENC, H264|HEVC|HEIC, 1, INT_MAX, 1, INT_MAX, V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB, HFI_PROP_MULTI_SLICE_MB_COUNT, CAP_FLAG_OUTPUT_PORT}, // TODO: MB level RC - mapping - {MB_RC, ENC, CODECS_ALL, + {MB_RC, ENC, H264|HEVC, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_ENABLE, V4L2_CID_MPEG_VIDEO_MB_RC_ENABLE, @@ -1001,14 +987,14 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {0}, {0}, NULL, msm_vidc_set_chroma_qp_index_offset}, - {DISPLAY_DELAY_ENABLE, DEC, CODECS_ALL, + {DISPLAY_DELAY_ENABLE, DEC, H264|HEVC|VP9, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_MFC51_VIDEO_DECODER_H264_DISPLAY_DELAY_ENABLE, HFI_PROP_DECODE_ORDER_OUTPUT, CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, - {DISPLAY_DELAY, DEC, CODECS_ALL, + {DISPLAY_DELAY, DEC, H264|HEVC|VP9, 0, 1, 1, 0, V4L2_CID_MPEG_MFC51_VIDEO_DECODER_H264_DISPLAY_DELAY, HFI_PROP_DECODE_ORDER_OUTPUT, @@ -1042,7 +1028,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { MSM_VIDC_POWER_SAVE_MODE, 1, MSM_VIDC_POWER_SAVE_MODE}, - {CODED_FRAMES, DEC, CODECS_ALL, + {CODED_FRAMES, DEC, H264|HEVC|HEIC, CODED_FRAMES_PROGRESSIVE, CODED_FRAMES_INTERLACE, 1, CODED_FRAMES_PROGRESSIVE, 0, @@ -1052,7 +1038,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 0, HFI_PROP_LUMA_CHROMA_BIT_DEPTH}, - {CODEC_CONFIG, DEC, H264|HEVC, 0, 1, 1, 0, + {CODEC_CONFIG, DEC, H264|HEVC|HEIC, 0, 1, 1, 0, V4L2_CID_MPEG_VIDC_CODEC_CONFIG}, {BITSTREAM_SIZE_OVERWRITE, DEC, CODECS_ALL, 0, INT_MAX, 1, 0, @@ -1093,7 +1079,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {0}, {0}, NULL, NULL}, - {META_LTR_MARK_USE, ENC, CODECS_ALL, + {META_LTR_MARK_USE, ENC, H264|HEVC, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_LTR_MARK_USE_DETAILS, @@ -1141,19 +1127,19 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_CID_MPEG_VIDC_METADATA_HISTOGRAM_INFO, HFI_PROP_HISTOGRAM_INFO}, - {META_SEI_MASTERING_DISP, DEC | ENC, HEVC, + {META_SEI_MASTERING_DISP, DEC|ENC, HEVC|HEIC, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_SEI_MASTERING_DISPLAY_COLOUR, HFI_PROP_SEI_MASTERING_DISPLAY_COLOUR}, - {META_SEI_CLL, DEC | ENC, HEVC, + {META_SEI_CLL, DEC|ENC, HEVC|HEIC, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_SEI_CONTENT_LIGHT_LEVEL, HFI_PROP_SEI_CONTENT_LIGHT_LEVEL}, - {META_HDR10PLUS, DEC | ENC, HEVC, + {META_HDR10PLUS, DEC | ENC, HEVC|HEIC, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_HDR10PLUS, @@ -1194,6 +1180,85 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_ROI_INFO, HFI_PROP_ROI_INFO}, + + /* configure image properties */ + {FRAME_WIDTH, ENC, HEIC, 512, 16384, 1, 16384}, + {FRAME_WIDTH, DEC, HEIC, 512, 8192, 1, 8192}, + {FRAME_HEIGHT, ENC, HEIC, 512, 16384, 1, 16384}, + {FRAME_HEIGHT, DEC, HEIC, 512, 8192, 1, 8192}, + {MIN_BUFFERS_INPUT, ENC|DEC, HEIC, 0, 64, 1, 1, + V4L2_CID_MIN_BUFFERS_FOR_OUTPUT}, + {MIN_BUFFERS_OUTPUT, ENC|DEC, HEIC, + 0, 64, 1, 1, + V4L2_CID_MIN_BUFFERS_FOR_CAPTURE, + HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + {PIX_FMTS, ENC, HEIC, + MSM_VIDC_FMT_NV12, + MSM_VIDC_FMT_P010, + MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_P010, + MSM_VIDC_FMT_NV12, + 0, 0, + CAP_FLAG_ROOT, + {0}, + {PROFILE}}, + {MBPF, ENC, HEIC, 64, 262144, 262144}, /* ((8192x8192)/256) */ + {MBPF, DEC, HEIC, 36, 1048576, 1, 1048576}, /* ((16384x16384)/256) */ + {MBPS, ENC, HEIC, 64, 262144, 262144}, /* ((8192x8192)/256)@1fps */ + {MBPS, DEC, HEIC, 36, 1048576, 1, 1048576}, /* ((16384x16384)/256)@1fps */ + {BITRATE_MODE, ENC, HEIC, + V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, + V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CQ), + V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, + V4L2_CID_MPEG_VIDEO_BITRATE_MODE, + HFI_PROP_RATE_CONTROL, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {0}, + {TIME_DELTA_BASED_RC, CONSTANT_QUALITY}, + msm_vidc_adjust_bitrate_mode, msm_vidc_set_u32_enum}, + {TIME_DELTA_BASED_RC, ENC, HEIC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_TIME_DELTA_BASED_RC, + HFI_PROP_TIME_DELTA_BASED_RATE_CONTROL, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + {BITRATE_MODE}, {0}, + msm_vidc_adjust_delta_based_rc, msm_vidc_set_u32}, + {GRID, ENC, HEIC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_ENABLE, + 0, + HFI_PROP_HEIC_GRID_ENABLE, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + {0}, {0}, + NULL, msm_vidc_set_u32}, + {GOP_SIZE, ENC, HEIC, + 0, INT_MAX, 1, 0 /* all intra */, + V4L2_CID_MPEG_VIDEO_GOP_SIZE, + HFI_PROP_MAX_GOP_FRAMES, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + NULL, msm_vidc_set_u32}, + {B_FRAME, ENC, HEIC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDEO_B_FRAMES, + HFI_PROP_MAX_B_FRAMES, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + {0}, {0}, + NULL, msm_vidc_set_u32}, + {PROFILE, ENC|DEC, HEIC, + V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE, + V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE, + BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE), + V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE, + V4L2_CID_MPEG_VIDEO_HEVC_PROFILE, + HFI_PROP_PROFILE, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {PIX_FMTS}, + {0}, + msm_vidc_adjust_profile, msm_vidc_set_u32_enum}, }; /* diff --git a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c index 2f9afe02fa..1226d33c66 100644 --- a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c @@ -50,7 +50,7 @@ static u32 msm_vidc_decoder_bin_size_iris2(struct msm_vidc_inst *inst) if (inst->codec == MSM_VIDC_H264) HFI_BUFFER_BIN_H264D(size, width, height, is_interlaced, vpp_delay, num_vpp_pipes); - else if (inst->codec == MSM_VIDC_HEVC) + else if (inst->codec == MSM_VIDC_HEVC || inst->codec == MSM_VIDC_HEIC) HFI_BUFFER_BIN_H265D(size, width, height, 0, vpp_delay, num_vpp_pipes); else if (inst->codec == MSM_VIDC_VP9) @@ -84,7 +84,7 @@ static u32 msm_vidc_decoder_comv_size_iris2(struct msm_vidc_inst* inst) if (inst->codec == MSM_VIDC_H264) HFI_BUFFER_COMV_H264D(size, width, height, out_min_count); - else if (inst->codec == MSM_VIDC_HEVC) + else if (inst->codec == MSM_VIDC_HEVC || inst->codec == MSM_VIDC_HEIC) HFI_BUFFER_COMV_H265D(size, width, height, out_min_count); i_vpr_l(inst, "%s: size %d\n", __func__, size); @@ -115,7 +115,7 @@ static u32 msm_vidc_decoder_non_comv_size_iris2(struct msm_vidc_inst* inst) if (inst->codec == MSM_VIDC_H264) HFI_BUFFER_NON_COMV_H264D(size, width, height, num_vpp_pipes); - else if (inst->codec == MSM_VIDC_HEVC) + else if (inst->codec == MSM_VIDC_HEVC || inst->codec == MSM_VIDC_HEIC) HFI_BUFFER_NON_COMV_H265D(size, width, height, num_vpp_pipes); i_vpr_l(inst, "%s: size %d\n", __func__, size); @@ -167,7 +167,7 @@ static u32 msm_vidc_decoder_line_size_iris2(struct msm_vidc_inst *inst) if (inst->codec == MSM_VIDC_H264) HFI_BUFFER_LINE_H264D(size, width, height, is_opb, num_vpp_pipes); - else if (inst->codec == MSM_VIDC_HEVC) + else if (inst->codec == MSM_VIDC_HEVC || inst->codec == MSM_VIDC_HEIC) HFI_BUFFER_LINE_H265D(size, width, height, is_opb, num_vpp_pipes); else if (inst->codec == MSM_VIDC_VP9) @@ -189,7 +189,7 @@ static u32 msm_vidc_decoder_persist_size_iris2(struct msm_vidc_inst *inst) if (inst->codec == MSM_VIDC_H264) HFI_BUFFER_PERSIST_H264D(size); - else if (inst->codec == MSM_VIDC_HEVC) + else if (inst->codec == MSM_VIDC_HEVC || inst->codec == MSM_VIDC_HEIC) HFI_BUFFER_PERSIST_H265D(size); else if (inst->codec == MSM_VIDC_VP9) HFI_BUFFER_PERSIST_VP9D(size); @@ -269,7 +269,7 @@ static u32 msm_vidc_encoder_bin_size_iris2(struct msm_vidc_inst *inst) if (inst->codec == MSM_VIDC_H264) HFI_BUFFER_BIN_H264E(size, inst->hfi_rc_type, width, height, stage, num_vpp_pipes); - else if (inst->codec == MSM_VIDC_HEVC) + else if (inst->codec == MSM_VIDC_HEVC || inst->codec == MSM_VIDC_HEIC) HFI_BUFFER_BIN_H265E(size, inst->hfi_rc_type, width, height, stage, num_vpp_pipes); @@ -298,7 +298,7 @@ static u32 msm_vidc_encoder_comv_size_iris2(struct msm_vidc_inst* inst) HFI_CODEC_ENCODE_AVC); num_ref = num_recon - 1; HFI_BUFFER_COMV_H264E(size, width, height, num_ref); - } else if (inst->codec == MSM_VIDC_HEVC) { + } else if (inst->codec == MSM_VIDC_HEVC || inst->codec == MSM_VIDC_HEIC) { // TODO: replace zeros with appropriate variables HFI_IRIS2_ENC_RECON_BUF_COUNT(num_recon, 0, 0, 0, 0, 0, HFI_CODEC_ENCODE_HEVC); @@ -333,7 +333,7 @@ static u32 msm_vidc_encoder_non_comv_size_iris2(struct msm_vidc_inst* inst) if (inst->codec == MSM_VIDC_H264) HFI_BUFFER_NON_COMV_H264E(size, width, height, num_vpp_pipes); - else if (inst->codec == MSM_VIDC_HEVC) + else if (inst->codec == MSM_VIDC_HEVC || inst->codec == MSM_VIDC_HEIC) HFI_BUFFER_NON_COMV_H265E(size, width, height, num_vpp_pipes); i_vpr_l(inst, "%s: size %d\n", __func__, size); @@ -371,7 +371,7 @@ static u32 msm_vidc_encoder_line_size_iris2(struct msm_vidc_inst *inst) if (inst->codec == MSM_VIDC_H264) HFI_BUFFER_LINE_H264E(size, width, height, is_tenbit, num_vpp_pipes); - else if (inst->codec == MSM_VIDC_HEVC) + else if (inst->codec == MSM_VIDC_HEVC || inst->codec == MSM_VIDC_HEIC) HFI_BUFFER_LINE_H265E(size, width, height, is_tenbit, num_vpp_pipes); i_vpr_l(inst, "%s: size %d\n", __func__, size); @@ -402,7 +402,7 @@ static u32 msm_vidc_encoder_dpb_size_iris2(struct msm_vidc_inst *inst) if (inst->codec == MSM_VIDC_H264) HFI_BUFFER_DPB_H264E(size, width, height); - else if (inst->codec == MSM_VIDC_HEVC) + else if (inst->codec == MSM_VIDC_HEVC || inst->codec == MSM_VIDC_HEIC) HFI_BUFFER_DPB_H265E(size, width, height, is_tenbit); i_vpr_l(inst, "%s: size %d\n", __func__, size); @@ -534,7 +534,7 @@ static int msm_buffer_encoder_dpb_count(struct msm_vidc_inst *inst) // TODO: replace zeros with appropriate variables HFI_IRIS2_ENC_RECON_BUF_COUNT(count, 0, 0, 0, 0, 0, HFI_CODEC_ENCODE_AVC); - } else if (inst->codec == MSM_VIDC_HEVC) { + } else if (inst->codec == MSM_VIDC_HEVC || inst->codec == MSM_VIDC_HEIC) { // TODO: replace zeros with appropriate variables HFI_IRIS2_ENC_RECON_BUF_COUNT(count, 0, 0, 0, 0, 0, HFI_CODEC_ENCODE_HEVC); diff --git a/driver/variant/iris2/src/msm_vidc_power_iris2.c b/driver/variant/iris2/src/msm_vidc_power_iris2.c index d9aa38ab84..bdba6cf42c 100644 --- a/driver/variant/iris2/src/msm_vidc_power_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_power_iris2.c @@ -214,6 +214,7 @@ static u64 __calculate_decoder(struct vidc_bus_vote_data *d) num_vpp_pipes = d->num_vpp_pipes; if (d->codec == MSM_VIDC_HEVC || + d->codec == MSM_VIDC_HEIC || d->codec == MSM_VIDC_VP9) { /* H264, VP8, MPEG2 use the same settings */ /* HEVC, VP9 use the same setting */ diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index dfef8e16e5..11e83ec3a1 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -13,6 +13,7 @@ #include "msm_vidc_inst.h" #define MSM_VIDC_SESSION_INACTIVE_THRESHOLD_MS 1000 +#define HEIC_GRID_DIMENSION 512 static inline is_decode_session(struct msm_vidc_inst *inst) { @@ -24,6 +25,21 @@ static inline is_encode_session(struct msm_vidc_inst *inst) return inst->domain == MSM_VIDC_ENCODER; } +static inline is_image_encode_session(struct msm_vidc_inst *inst) +{ + return inst->codec == MSM_VIDC_HEIC && inst->domain == MSM_VIDC_ENCODER; +} + +static inline is_image_decode_session(struct msm_vidc_inst *inst) +{ + return inst->codec == MSM_VIDC_HEIC && inst->domain == MSM_VIDC_DECODER; +} + +static inline is_image_session(struct msm_vidc_inst *inst) +{ + return inst->codec == MSM_VIDC_HEIC; +} + static inline is_secure_session(struct msm_vidc_inst *inst) { return !!(inst->capabilities->cap[SECURE_MODE].value); @@ -331,5 +347,7 @@ int msm_vidc_deinit_core_caps(struct msm_vidc_core* core); int msm_vidc_deinit_instance_caps(struct msm_vidc_core* core); int msm_vidc_update_debug_str(struct msm_vidc_inst *inst); bool msm_vidc_allow_decode_batch(struct msm_vidc_inst *inst); +int msm_vidc_check_session_supported(struct msm_vidc_inst *inst); +int msm_vidc_check_scaling_supported(struct msm_vidc_inst *inst); #endif // _MSM_VIDC_DRIVER_H_ diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 638458b7dc..5f5d6c44b4 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -115,6 +115,7 @@ enum msm_vidc_codec_type { MSM_VIDC_H264 = BIT(0), MSM_VIDC_HEVC = BIT(1), MSM_VIDC_VP9 = BIT(2), + MSM_VIDC_HEIC = BIT(3), }; enum msm_vidc_colorformat_type { @@ -295,13 +296,9 @@ enum msm_vidc_inst_capability_type { FRAME_WIDTH, LOSSLESS_FRAME_WIDTH, SECURE_FRAME_WIDTH, - HEVC_IMAGE_FRAME_WIDTH, - HEIC_IMAGE_FRAME_WIDTH, FRAME_HEIGHT, LOSSLESS_FRAME_HEIGHT, SECURE_FRAME_HEIGHT, - HEVC_IMAGE_FRAME_HEIGHT, - HEIC_IMAGE_FRAME_HEIGHT, PIX_FMTS, MIN_BUFFERS_INPUT, MIN_BUFFERS_OUTPUT, @@ -346,7 +343,7 @@ enum msm_vidc_inst_capability_type { BLUR_RESOLUTION, CSC, CSC_CUSTOM_MATRIX, - HEIC, + GRID, LOWLATENCY_MODE, LTR_COUNT, USE_LTR, diff --git a/driver/vidc/src/hfi_packet.c b/driver/vidc/src/hfi_packet.c index fb7770be46..3158764e71 100644 --- a/driver/vidc/src/hfi_packet.c +++ b/driver/vidc/src/hfi_packet.c @@ -206,6 +206,7 @@ u32 get_hfi_codec(struct msm_vidc_inst *inst) else return HFI_CODEC_DECODE_AVC; case MSM_VIDC_HEVC: + case MSM_VIDC_HEIC: if (inst->domain == MSM_VIDC_ENCODER) return HFI_CODEC_ENCODE_HEVC; else diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 7c2e9ac072..4b01268b56 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -371,7 +371,9 @@ static int msm_vdec_set_colorspace(struct msm_vidc_inst *inst, return -EINVAL; } - if (inst->codec != MSM_VIDC_H264 && inst->codec != MSM_VIDC_HEVC) + if (inst->codec != MSM_VIDC_H264 && + inst->codec != MSM_VIDC_HEVC && + inst->codec != MSM_VIDC_HEIC) return 0; if (inst->fmts[port].fmt.pix_mp.colorspace != V4L2_COLORSPACE_DEFAULT || @@ -997,7 +999,7 @@ static int msm_vdec_subscribe_input_port_settings_change(struct msm_vidc_inst *i if (inst->codec == MSM_VIDC_H264) { subscribe_psc_size = ARRAY_SIZE(msm_vdec_subscribe_for_psc_avc); psc = msm_vdec_subscribe_for_psc_avc; - } else if (inst->codec == MSM_VIDC_HEVC) { + } else if (inst->codec == MSM_VIDC_HEVC || inst->codec == MSM_VIDC_HEIC) { subscribe_psc_size = ARRAY_SIZE(msm_vdec_subscribe_for_psc_hevc); psc = msm_vdec_subscribe_for_psc_hevc; } else if (inst->codec == MSM_VIDC_VP9) { @@ -1448,10 +1450,11 @@ int msm_vdec_streamon_input(struct msm_vidc_inst *inst) return -EINVAL; } - //rc = msm_vidc_check_session_supported(inst); + rc = msm_vidc_check_session_supported(inst); if (rc) goto error; - //rc = msm_vidc_check_scaling_supported(inst); + + rc = msm_vidc_check_scaling_supported(inst); if (rc) goto error; @@ -1578,7 +1581,7 @@ static int msm_vdec_subscribe_output_port_settings_change(struct msm_vidc_inst * if (inst->codec == MSM_VIDC_H264) { subscribe_psc_size = ARRAY_SIZE(msm_vdec_subscribe_for_psc_avc); psc = msm_vdec_subscribe_for_psc_avc; - } else if (inst->codec == MSM_VIDC_HEVC) { + } else if (inst->codec == MSM_VIDC_HEVC || inst->codec == MSM_VIDC_HEIC) { subscribe_psc_size = ARRAY_SIZE(msm_vdec_subscribe_for_psc_hevc); psc = msm_vdec_subscribe_for_psc_hevc; } else if (inst->codec == MSM_VIDC_VP9) { @@ -1779,7 +1782,7 @@ static int msm_vdec_qbuf_batch(struct msm_vidc_inst *inst, i_vpr_e(inst, "%s: qbuf not allowed\n", __func__); return -EINVAL; } else if (allow == MSM_VIDC_DEFER) { - print_vidc_buffer(VIDC_HIGH, "high", "qbuf deferred", inst, buf); + print_vidc_buffer(VIDC_LOW, "high", "qbuf deferred", inst, buf); return 0; } @@ -1787,7 +1790,7 @@ static int msm_vdec_qbuf_batch(struct msm_vidc_inst *inst, if (inst->power.buffer_counter > SKIP_BATCH_WINDOW) { count = msm_vidc_num_buffers(inst, MSM_VIDC_BUF_OUTPUT, MSM_VIDC_ATTR_DEFERRED); if (count < inst->decode_batch.size) { - print_vidc_buffer(VIDC_HIGH, "high", "batch-qbuf deferred", inst, buf); + print_vidc_buffer(VIDC_LOW, "high", "batch-qbuf deferred", inst, buf); schedule_batch_work(inst); return 0; } @@ -1880,7 +1883,7 @@ int msm_vdec_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) int rc = 0; struct msm_vidc_core *core; struct v4l2_format *fmt; - u32 codec_align; + u32 codec_align, pix_fmt; if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); @@ -2007,8 +2010,8 @@ int msm_vdec_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) } inst->buffers.output.size = fmt->fmt.pix_mp.plane_fmt[0].sizeimage; - inst->capabilities->cap[PIX_FMTS].value = - v4l2_colorformat_to_driver(f->fmt.pix_mp.pixelformat, __func__); + pix_fmt = v4l2_colorformat_to_driver(f->fmt.pix_mp.pixelformat, __func__); + msm_vidc_update_cap_value(inst, PIX_FMTS, pix_fmt, __func__); //rc = msm_vidc_check_session_supported(inst); if (rc) goto err_invalid_fmt; diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index bc6a737dc0..64d94ec952 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -873,10 +873,11 @@ int msm_venc_streamon_input(struct msm_vidc_inst *inst) return -EINVAL; } - //rc = msm_vidc_check_session_supported(inst); + rc = msm_vidc_check_session_supported(inst); if (rc) goto error; - //rc = msm_vidc_check_scaling_supported(inst); + + rc = msm_vidc_check_scaling_supported(inst); if (rc) goto error; @@ -1070,7 +1071,7 @@ static int msm_venc_s_fmt_output(struct msm_vidc_inst *inst, struct v4l2_format struct msm_vidc_core *core; u32 codec_align; - if (!inst || !inst->core) { + if (!inst || !inst->core || !f) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -1087,11 +1088,14 @@ static int msm_venc_s_fmt_output(struct msm_vidc_inst *inst, struct v4l2_format } fmt->type = OUTPUT_MPLANE; - codec_align = f->fmt.pix_mp.pixelformat == - V4L2_PIX_FMT_HEVC ? 32 : 16; + codec_align = (f->fmt.pix_mp.pixelformat == V4L2_PIX_FMT_HEVC || + f->fmt.pix_mp.pixelformat == V4L2_PIX_FMT_HEIC) ? 32 : 16; /* width, height is readonly for client */ fmt->fmt.pix_mp.width = ALIGN(inst->crop.width, codec_align); fmt->fmt.pix_mp.height = ALIGN(inst->crop.height, codec_align); + /* use grid dimension for image session */ + if (is_image_session(inst)) + fmt->fmt.pix_mp.width = fmt->fmt.pix_mp.height = HEIC_GRID_DIMENSION; fmt->fmt.pix_mp.pixelformat = f->fmt.pix_mp.pixelformat; fmt->fmt.pix_mp.num_planes = 1; fmt->fmt.pix_mp.plane_fmt[0].bytesperline = 0; @@ -1173,6 +1177,7 @@ static int msm_venc_s_fmt_input(struct msm_vidc_inst *inst, struct v4l2_format * int rc = 0; struct v4l2_format *fmt; struct msm_vidc_core *core; + u32 pix_fmt; if (!inst || !inst->core || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); @@ -1183,6 +1188,8 @@ static int msm_venc_s_fmt_input(struct msm_vidc_inst *inst, struct v4l2_format * fmt = &inst->fmts[INPUT_PORT]; fmt->type = INPUT_MPLANE; fmt->fmt.pix_mp.pixelformat = f->fmt.pix_mp.pixelformat; + pix_fmt = v4l2_colorformat_to_driver(f->fmt.pix_mp.pixelformat, __func__); + msm_vidc_update_cap_value(inst, PIX_FMTS, pix_fmt, __func__); fmt->fmt.pix_mp.width = VIDEO_Y_STRIDE_PIX(fmt->fmt.pix_mp.pixelformat, f->fmt.pix_mp.width); fmt->fmt.pix_mp.height = VIDEO_Y_SCANLINES(fmt->fmt.pix_mp.pixelformat, diff --git a/driver/vidc/src/msm_vidc_buffer.c b/driver/vidc/src/msm_vidc_buffer.c index 8b2f9df4e5..59cd986cb4 100644 --- a/driver/vidc/src/msm_vidc_buffer.c +++ b/driver/vidc/src/msm_vidc_buffer.c @@ -31,7 +31,7 @@ u32 msm_vidc_input_min_count(struct msm_vidc_inst* inst) return 0; } - if (is_thumbnail_session(inst)) + if (is_thumbnail_session(inst) || is_image_session(inst)) input_min_count = 1; //if (is_grid_session(inst)) @@ -58,7 +58,7 @@ u32 msm_vidc_output_min_count(struct msm_vidc_inst *inst) if (!is_decode_session(inst) && !is_encode_session(inst)) return 0; - if (is_thumbnail_session(inst)) + if (is_thumbnail_session(inst) || is_image_session(inst)) return 1; if (is_decode_session(inst)) { @@ -70,6 +70,9 @@ u32 msm_vidc_output_min_count(struct msm_vidc_inst *inst) case MSM_VIDC_VP9: output_min_count = 9; break; + case MSM_VIDC_HEIC: + output_min_count = 1; + break; default: output_min_count = 4; } @@ -102,7 +105,7 @@ u32 msm_vidc_input_extra_count(struct msm_vidc_inst *inst) * no extra buffers for thumbnail session because * neither dcvs nor batching will be enabled */ - if (is_thumbnail_session(inst)) + if (is_thumbnail_session(inst) || is_image_session(inst)) return 0; if (is_decode_session(inst)) { @@ -140,7 +143,7 @@ u32 msm_vidc_output_extra_count(struct msm_vidc_inst *inst) * no extra buffers for thumbnail session because * neither dcvs nor batching will be enabled */ - if (is_thumbnail_session(inst)) + if (is_thumbnail_session(inst) || is_image_session(inst)) return 0; if (is_decode_session(inst)) { @@ -180,8 +183,9 @@ u32 msm_vidc_internal_buffer_count(struct msm_vidc_inst *inst, count = 1; } else if (buffer_type == MSM_VIDC_BUF_COMV || buffer_type == MSM_VIDC_BUF_NON_COMV) { - if (inst->codec == MSM_VIDC_HEVC || - inst->codec == MSM_VIDC_H264) + if (inst->codec == MSM_VIDC_H264 || + inst->codec == MSM_VIDC_HEVC || + inst->codec == MSM_VIDC_HEIC) count = 1; else count = 0; @@ -241,19 +245,18 @@ u32 msm_vidc_decoder_input_size(struct msm_vidc_inst *inst) if (is_secure_session(inst)) div_factor = div_factor << 1; - /* For HEIF image, use the actual resolution to calc buffer size */ - /* TODO: fix me - if (is_heif_decoder(inst)) { + /* For image session, use the actual resolution to calc buffer size */ + if (is_image_session(inst)) { base_res_mbs = num_mbs; div_factor = 1; } - */ frame_size = base_res_mbs * MB_SIZE_IN_PIXEL * 3 / 2 / div_factor; /* multiply by 10/8 (1.25) to get size for 10 bit case */ if (f->fmt.pix_mp.pixelformat == V4L2_PIX_FMT_VP9 || - f->fmt.pix_mp.pixelformat == V4L2_PIX_FMT_HEVC) + f->fmt.pix_mp.pixelformat == V4L2_PIX_FMT_HEVC || + f->fmt.pix_mp.pixelformat == V4L2_PIX_FMT_HEIC) frame_size = frame_size + (frame_size >> 2); i_vpr_h(inst, "set input buffer size to %d\n", frame_size); @@ -319,6 +322,10 @@ u32 msm_vidc_encoder_output_size(struct msm_vidc_inst *inst) mbs_per_frame = NUM_MBS_PER_FRAME(width, height); frame_size = (width * height * 3); + /* Image session: 2 x yuv size */ + if (is_image_session(inst)) + goto skip_calc; + if (mbs_per_frame < NUM_MBS_720P) frame_size = frame_size << 1; else if (mbs_per_frame <= NUM_MBS_4k) @@ -333,8 +340,10 @@ u32 msm_vidc_encoder_output_size(struct msm_vidc_inst *inst) if (inst->rc_type == RATE_CONTROL_LOSSLESS) frame_size = (width * height * 9) >> 2; */ +skip_calc: /* multiply by 10/8 (1.25) to get size for 10 bit case */ - if (f->fmt.pix_mp.pixelformat == V4L2_PIX_FMT_HEVC) + if (f->fmt.pix_mp.pixelformat == V4L2_PIX_FMT_HEVC || + f->fmt.pix_mp.pixelformat == V4L2_PIX_FMT_HEIC) frame_size = frame_size + (frame_size >> 2); return ALIGN(frame_size, SZ_4K); diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index e10e0112a3..5b32defb72 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -279,7 +279,7 @@ static int msm_vidc_adjust_hevc_qp(struct msm_vidc_inst *inst, capability = inst->capabilities; - if (inst->codec != MSM_VIDC_HEVC) { + if (!(inst->codec == MSM_VIDC_HEVC || inst->codec == MSM_VIDC_HEIC)) { i_vpr_e(inst, "%s: incorrect entry in database for cap %d. fix the database\n", __func__, cap_id); @@ -734,7 +734,7 @@ int msm_vidc_adjust_bitrate_mode(void *instance, struct v4l2_ctrl *ctrl) goto update; } - if (!frame_rc) { + if (!frame_rc && !is_image_session(inst)) { hfi_value = HFI_RC_OFF; goto update; } @@ -1562,6 +1562,9 @@ int msm_vidc_set_u32(void *instance, hfi_value = inst->capabilities->cap[cap_id].value; } + i_vpr_h(inst, "set cap: name: %24s, value: %#10x, hfi: %#10x\n", cap_name(cap_id), + inst->capabilities->cap[cap_id].value, hfi_value); + rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32, &hfi_value, sizeof(u32), __func__); @@ -1584,6 +1587,9 @@ int msm_vidc_set_u32_enum(void *instance, if (rc) return -EINVAL; + i_vpr_h(inst, "set cap: name: %24s, value: %#10x, hfi: %#10x\n", cap_name(cap_id), + inst->capabilities->cap[cap_id].value, hfi_value); + rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32_ENUM, &hfi_value, sizeof(u32), __func__); diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index c1cea19e86..cfc670482d 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -45,13 +45,9 @@ static const struct msm_vidc_cap_name cap_name_arr[] = { {FRAME_WIDTH, "FRAME_WIDTH" }, {LOSSLESS_FRAME_WIDTH, "LOSSLESS_FRAME_WIDTH" }, {SECURE_FRAME_WIDTH, "SECURE_FRAME_WIDTH" }, - {HEVC_IMAGE_FRAME_WIDTH, "HEVC_IMAGE_FRAME_WIDTH" }, - {HEIC_IMAGE_FRAME_WIDTH, "HEIC_IMAGE_FRAME_WIDTH" }, {FRAME_HEIGHT, "FRAME_HEIGHT" }, {LOSSLESS_FRAME_HEIGHT, "LOSSLESS_FRAME_HEIGHT" }, {SECURE_FRAME_HEIGHT, "SECURE_FRAME_HEIGHT" }, - {HEVC_IMAGE_FRAME_HEIGHT, "HEVC_IMAGE_FRAME_HEIGHT" }, - {HEIC_IMAGE_FRAME_HEIGHT, "HEIC_IMAGE_FRAME_HEIGHT" }, {PIX_FMTS, "PIX_FMTS" }, {MIN_BUFFERS_INPUT, "MIN_BUFFERS_INPUT" }, {MIN_BUFFERS_OUTPUT, "MIN_BUFFERS_OUTPUT" }, @@ -96,7 +92,7 @@ static const struct msm_vidc_cap_name cap_name_arr[] = { {BLUR_RESOLUTION, "BLUR_RESOLUTION" }, {CSC, "CSC" }, {CSC_CUSTOM_MATRIX, "CSC_CUSTOM_MATRIX" }, - {HEIC, "HEIC" }, + {GRID, "GRID" }, {LOWLATENCY_MODE, "LOWLATENCY_MODE" }, {LTR_COUNT, "LTR_COUNT" }, {USE_LTR, "USE_LTR" }, @@ -374,6 +370,9 @@ enum msm_vidc_codec_type v4l2_codec_to_driver(u32 v4l2_codec, const char *func) case V4L2_PIX_FMT_VP9: codec = MSM_VIDC_VP9; break; + case V4L2_PIX_FMT_HEIC: + codec = MSM_VIDC_HEIC; + break; default: d_vpr_e("%s: invalid v4l2 codec %#x\n", func, v4l2_codec); break; @@ -395,6 +394,9 @@ u32 v4l2_codec_from_driver(enum msm_vidc_codec_type codec, const char *func) case MSM_VIDC_VP9: v4l2_codec = V4L2_PIX_FMT_VP9; break; + case MSM_VIDC_HEIC: + v4l2_codec = V4L2_PIX_FMT_HEIC; + break; default: d_vpr_e("%s: invalid driver codec %#x\n", func, codec); break; @@ -2013,6 +2015,12 @@ bool msm_vidc_allow_decode_batch(struct msm_vidc_inst *inst) goto exit; } + allow = !is_image_session(inst); + if (!allow) { + i_vpr_h(inst, "%s: image session\n", __func__); + goto exit; + } + allow = is_realtime_session(inst); if (!allow) { i_vpr_h(inst, "%s: non-realtime session\n", __func__); @@ -2127,7 +2135,7 @@ int msm_vidc_queue_buffer_single(struct msm_vidc_inst *inst, struct vb2_buffer * i_vpr_e(inst, "%s: qbuf not allowed\n", __func__); return -EINVAL; } else if (allow == MSM_VIDC_DEFER) { - print_vidc_buffer(VIDC_HIGH, "high", "qbuf deferred", inst, buf); + print_vidc_buffer(VIDC_LOW, "high", "qbuf deferred", inst, buf); return 0; } @@ -2686,15 +2694,20 @@ int msm_vidc_add_session(struct msm_vidc_inst *inst) } core = inst->core; + if (!core->capabilities) { + i_vpr_e(inst, "%s: invalid params\n", __func__); + return -EINVAL; + } + core_lock(core, __func__); list_for_each_entry(i, &core->instances, list) count++; - if (count < 0xffffff /*TODO: MAX_SUPPORTED_INSTANCES*/) { + if (count < core->capabilities[MAX_SESSION_COUNT].value) { list_add_tail(&inst->list, &core->instances); } else { i_vpr_e(inst, "%s: total sessions %d exceeded max limit %d\n", - __func__, count, MAX_SUPPORTED_INSTANCES); + __func__, count, core->capabilities[MAX_SESSION_COUNT].value); rc = -EINVAL; } core_unlock(core, __func__); @@ -3752,6 +3765,7 @@ static const char *get_codec_str(enum msm_vidc_codec_type type) case MSM_VIDC_H264: return "h264"; case MSM_VIDC_HEVC: return "h265"; case MSM_VIDC_VP9: return " vp9"; + case MSM_VIDC_HEIC: return "heic"; } return "...."; @@ -3786,3 +3800,182 @@ int msm_vidc_update_debug_str(struct msm_vidc_inst *inst) return 0; } + +static int msm_vidc_check_mbps_supported(struct msm_vidc_inst *inst) +{ + u32 mbps = 0; + struct msm_vidc_core *core; + struct msm_vidc_inst *instance; + + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + core = inst->core; + + core_lock(core, __func__); + list_for_each_entry(instance, &core->instances, list) { + /* ignore invalid/error session */ + if (instance->state == MSM_VIDC_ERROR) + continue; + + /* ignore thumbnail, image, and non realtime sessions */ + if (is_thumbnail_session(instance) || + is_image_session(instance) || + !is_realtime_session(instance)) + continue; + + mbps += msm_vidc_get_inst_load(instance, LOAD_ADMISSION_CONTROL); + } + core_unlock(core, __func__); + + if (mbps > core->capabilities[MAX_MBPS].value) { + /* todo: print running instances */ + //msm_vidc_print_running_insts(inst->core); + return -ENOMEM; + } + + return 0; +} + +static int msm_vidc_check_mbpf_supported(struct msm_vidc_inst *inst) +{ + u32 mbpf = 0; + struct msm_vidc_core *core; + struct msm_vidc_inst *instance; + + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + core = inst->core; + + core_lock(core, __func__); + list_for_each_entry(instance, &core->instances, list) { + /* ignore invalid/error session */ + if (instance->state == MSM_VIDC_ERROR) + continue; + + /* ignore thumbnail, image, and non realtime sessions */ + if (is_thumbnail_session(instance) || + is_image_session(instance) || + !is_realtime_session(instance)) + continue; + + mbpf += msm_vidc_get_mbs_per_frame(instance); + } + core_unlock(core, __func__); + + if (mbpf > core->capabilities[MAX_MBPF].value) { + /* todo: print running instances */ + //msm_vidc_print_running_insts(inst->core); + return -ENOMEM; + } + + return 0; +} + +int msm_vidc_check_session_supported(struct msm_vidc_inst *inst) +{ + struct msm_vidc_inst_capability *capability; + struct v4l2_format *fmt; + bool allow = false; + int rc = 0; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + /* todo: enable checks for all session type */ + if (!is_image_session(inst)) + return 0; + + if (is_image_encode_session(inst)) { + /* is linear color fmt */ + allow = is_linear_colorformat(capability->cap[PIX_FMTS].value); + if (!allow) { + i_vpr_e(inst, "%s: compressed fmt: %#x\n", __func__, + capability->cap[PIX_FMTS].value); + goto exit; + } + + /* is output grid dimension */ + fmt = &inst->fmts[OUTPUT_PORT]; + allow = fmt->fmt.pix_mp.width == HEIC_GRID_DIMENSION; + allow &= fmt->fmt.pix_mp.height == HEIC_GRID_DIMENSION; + if (!allow) { + i_vpr_e(inst, "%s: output is not a grid dimension: %u x %u\n", __func__, + fmt->fmt.pix_mp.width, fmt->fmt.pix_mp.height); + goto exit; + } + + /* is bitrate mode CQ */ + allow = capability->cap[BITRATE_MODE].value == HFI_RC_CQ; + if (!allow) { + i_vpr_e(inst, "%s: bitrate mode is not CQ: %#x\n", __func__, + capability->cap[BITRATE_MODE].value); + goto exit; + } + + /* is all intra */ + allow = !capability->cap[GOP_SIZE].value; + allow &= !capability->cap[B_FRAME].value; + if (!allow) { + i_vpr_e(inst, "%s: not all intra: gop: %u, bframe: %u\n", __func__, + capability->cap[GOP_SIZE].value, capability->cap[B_FRAME].value); + goto exit; + } + + /* is time delta based rc disabled */ + allow = !capability->cap[TIME_DELTA_BASED_RC].value; + if (!allow) { + i_vpr_e(inst, "%s: time delta based rc not disabled: %#x\n", __func__, + capability->cap[TIME_DELTA_BASED_RC].value); + goto exit; + } + + /* is profile type Still Pic */ + allow = (capability->cap[PROFILE].value == + V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE); + if (!allow) { + i_vpr_e(inst, "%s: profile is not still pic type: %#x\n", __func__, + capability->cap[PROFILE].value); + goto exit; + } + } + + rc = msm_vidc_check_mbps_supported(inst); + if (rc) + goto exit; + + rc = msm_vidc_check_mbpf_supported(inst); + if (rc) + goto exit; + + /* todo: add additional checks related to capabilities */ + + return 0; + +exit: + i_vpr_e(inst, "%s: current session not supported\n", __func__); + return -EINVAL; +} + +int msm_vidc_check_scaling_supported(struct msm_vidc_inst *inst) +{ + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (is_image_session(inst) || is_decode_session(inst)) { + i_vpr_h(inst, "%s: Scaling is supported for encode session only\n", __func__); + return 0; + } + + /* todo: add scaling check for encode session */ + return 0; +} + diff --git a/driver/vidc/src/msm_vidc_memory.c b/driver/vidc/src/msm_vidc_memory.c index ff362febb5..fb26cb3d9c 100644 --- a/driver/vidc/src/msm_vidc_memory.c +++ b/driver/vidc/src/msm_vidc_memory.c @@ -27,7 +27,7 @@ struct context_bank_info *get_context_bank(struct msm_vidc_core *core, static const struct msm_vidc_buf_region_name buf_region_name[] = { {MSM_VIDC_REGION_NONE, "none" }, {MSM_VIDC_NON_SECURE, "venus_ns" }, - {MSM_VIDC_NON_SECURE_PIXEL, "venus_ns_pixel" }, + {MSM_VIDC_NON_SECURE_PIXEL, "venus_ns_pixel" }, {MSM_VIDC_SECURE_PIXEL, "venus_sec_pixel" }, {MSM_VIDC_SECURE_NONPIXEL, "venus_sec_non_pixel" }, {MSM_VIDC_SECURE_BITSTREAM, "venus_sec_bitstream" }, diff --git a/driver/vidc/src/msm_vidc_power.c b/driver/vidc/src/msm_vidc_power.c index 5d3badaaf5..0b89b1f7ff 100644 --- a/driver/vidc/src/msm_vidc_power.c +++ b/driver/vidc/src/msm_vidc_power.c @@ -97,18 +97,19 @@ int msm_vidc_get_inst_load(struct msm_vidc_inst *inst, * | Power Request Load = | * | res * max(op, fps)| * ----------------|----------------------------| - * NON-REALTIME/ | Admission Control Load = 0 | - * THUMBNAIL | Power Request Load = | - * | res * max(op, fps)| + * NON-REALTIME/ | Admission Control Load = 0 | + * THUMBNAIL/ | Power Request Load = | + * IMAGE | res * max(op, fps)| + * | | * ----------------|----------------------------| */ - if (is_thumbnail_session(inst) || - (!is_realtime_session(inst) && - quirks == LOAD_ADMISSION_CONTROL)) { - load = 0; - } else { - load = msm_vidc_get_mbps(inst, quirks); - } + if (is_thumbnail_session(inst) || is_image_session(inst)) + goto exit; + + if (!is_realtime_session(inst) && quirks == LOAD_ADMISSION_CONTROL) + goto exit; + + load = msm_vidc_get_mbps(inst, quirks); exit: return load; @@ -228,7 +229,7 @@ int msm_vidc_scale_buses(struct msm_vidc_inst *inst) return 0; vote_data->power_mode = VIDC_POWER_NORMAL; - if (inst->power.buffer_counter < DCVS_FTB_WINDOW) + if (inst->power.buffer_counter < DCVS_FTB_WINDOW || is_image_session(inst)) vote_data->power_mode = VIDC_POWER_TURBO; if (msm_vidc_clock_voting) vote_data->power_mode = VIDC_POWER_TURBO; @@ -419,7 +420,7 @@ static int msm_vidc_apply_dcvs(struct msm_vidc_inst *inst) return -EINVAL; } - if (!inst->power.dcvs_mode || inst->decode_batch.enable) { + if (!inst->power.dcvs_mode || inst->decode_batch.enable || is_image_session(inst)) { i_vpr_l(inst, "Skip DCVS (dcvs %d, batching %d)\n", inst->power.dcvs_mode, inst->decode_batch.enable); inst->power.dcvs_flags = 0; @@ -491,7 +492,7 @@ int msm_vidc_scale_clocks(struct msm_vidc_inst *inst) return 0; //todo: add turbo session check - if (inst->power.buffer_counter < DCVS_FTB_WINDOW) { + if (inst->power.buffer_counter < DCVS_FTB_WINDOW || is_image_session(inst)) { inst->power.min_freq = msm_vidc_max_freq(inst); inst->power.dcvs_flags = 0; } else if (msm_vidc_clock_voting) { diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index 8332370c8b..483455cdb9 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -1322,8 +1322,7 @@ static int handle_system_response(struct msm_vidc_core *core, int rc = 0; struct hfi_packet *packet; u8 *pkt, *start_pkt; - bool parsed = false; - int i, j, k; + int i, j; static const struct msm_vidc_core_hfi_range be[] = { {HFI_SYSTEM_ERROR_BEGIN, HFI_SYSTEM_ERROR_END, handle_system_error }, {HFI_PROP_BEGIN, HFI_PROP_END, handle_system_property }, @@ -1335,25 +1334,11 @@ static int handle_system_response(struct msm_vidc_core *core, pkt = start_pkt; for (j = 0; j < hdr->num_packets; j++) { packet = (struct hfi_packet *)pkt; - parsed = false; if (in_range(be[i], packet->type)) { - parsed = true; rc = be[i].handle(core, packet); if (rc) return -EINVAL; } - - /* is pkt type unknown ? */ - if (!parsed) { - for (k = 0; k < ARRAY_SIZE(be); k++) - if (in_range(be[k], packet->type)) - parsed |= true; - - if (!parsed) - d_vpr_e("%s: unknown packet received %#x\n", - __func__, packet->type); - } - pkt += packet->size; } } @@ -1367,8 +1352,8 @@ static int __handle_session_response(struct msm_vidc_inst *inst, int rc = 0; struct hfi_packet *packet; u8 *pkt, *start_pkt; - bool dequeue = false, parsed = false; - int i, j, k; + bool dequeue = false; + int i, j; static const struct msm_vidc_inst_hfi_range be[] = { {HFI_SESSION_ERROR_BEGIN, HFI_SESSION_ERROR_END, handle_session_error }, {HFI_INFORMATION_BEGIN, HFI_INFORMATION_END, handle_session_info }, @@ -1382,26 +1367,12 @@ static int __handle_session_response(struct msm_vidc_inst *inst, pkt = start_pkt; for (j = 0; j < hdr->num_packets; j++) { packet = (struct hfi_packet *)pkt; - parsed = false; if (in_range(be[i], packet->type)) { - parsed = true; dequeue |= (packet->type == HFI_CMD_BUFFER); rc = be[i].handle(inst, packet); if (rc) goto exit; } - - /* is pkt type unknown ? */ - if (!parsed) { - for (k = 0; k < ARRAY_SIZE(be); k++) - if (in_range(be[k], packet->type)) - parsed |= true; - - if (!parsed) - d_vpr_e("%s: unknown packet received %#x\n", - __func__, packet->type); - } - pkt += packet->size; } } From b3ddb4f102e5f9824ba85e39282c3349ec4f1a78 Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Mon, 15 Mar 2021 17:11:40 -0700 Subject: [PATCH 0177/1061] video: driver: modify s_fmt for decoder read input width and height and update output resolution based on client set color format. Change-Id: I5605eb875ca679c671d083ca691b046769279ce5 Signed-off-by: Darshana Patil --- driver/vidc/src/msm_vdec.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 7c2e9ac072..1705dae8da 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -1976,8 +1976,8 @@ int msm_vdec_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) fmt = &inst->fmts[OUTPUT_PORT]; fmt->type = OUTPUT_MPLANE; if (inst->vb2q[INPUT_PORT].streaming) { - f->fmt.pix_mp.height = fmt->fmt.pix_mp.height; - f->fmt.pix_mp.width = fmt->fmt.pix_mp.width; + f->fmt.pix_mp.height = inst->fmts[INPUT_PORT].fmt.pix_mp.height; + f->fmt.pix_mp.width = inst->fmts[INPUT_PORT].fmt.pix_mp.width; } fmt->fmt.pix_mp.pixelformat = f->fmt.pix_mp.pixelformat; fmt->fmt.pix_mp.width = VIDEO_Y_STRIDE_PIX( From 3dc0696b1d7b5217da598461b30de6df078808f4 Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Wed, 10 Mar 2021 18:30:34 -0800 Subject: [PATCH 0178/1061] video: driver: enable thumbnail mode enable thumbnail mode depending upon the thumbnail capability in database. Change-Id: I2f3a36ae0ee785e73a009cfc385290c983a43e29 Signed-off-by: Darshana Patil --- driver/platform/waipio/src/msm_vidc_waipio.c | 3 ++- driver/vidc/inc/msm_vidc_driver.h | 3 +-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 3b0fad34d8..c785567de6 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -1062,7 +1062,8 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 0, HFI_PROP_DEC_START_FROM_RAP_FRAME, CAP_FLAG_INPUT_PORT, - {THUMBNAIL_MODE}}, + {0}, {0}, + NULL, NULL}, {SEQ_CHANGE_AT_SYNC_FRAME, DEC, CODECS_ALL, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 11e83ec3a1..bb9a36d5c5 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -163,8 +163,7 @@ static inline bool is_secondary_output_mode(struct msm_vidc_inst *inst) static inline bool is_thumbnail_session(struct msm_vidc_inst *inst) { - return false; - // todo: return !!(inst->capabilities->cap[THUMBNAIL_MODE].value); + return !!(inst->capabilities->cap[THUMBNAIL_MODE].value); } static inline bool is_low_power_session(struct msm_vidc_inst *inst) From 479023c98cea647da69689f8c8f6214e1632a371 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Mon, 8 Mar 2021 13:34:10 -0800 Subject: [PATCH 0179/1061] video: driver: Align buffer macros file with hfi file CI: 29354708 Align hfi_buffer_iris2.h file with hfi interface file hfi_lx_mem_v1.0_doc.h. Change-Id: Ie3811f58a94798d135ccfa1cb15d24900c2629d3 Signed-off-by: Akshata Sahukar --- driver/variant/iris2/inc/hfi_buffer_iris2.h | 416 ++++-------------- .../variant/iris2/src/msm_vidc_buffer_iris2.c | 8 +- driver/vidc/src/msm_venc.c | 16 +- 3 files changed, 93 insertions(+), 347 deletions(-) diff --git a/driver/variant/iris2/inc/hfi_buffer_iris2.h b/driver/variant/iris2/inc/hfi_buffer_iris2.h index 9c12ec1dc2..93f49151e1 100644 --- a/driver/variant/iris2/inc/hfi_buffer_iris2.h +++ b/driver/variant/iris2/inc/hfi_buffer_iris2.h @@ -26,9 +26,6 @@ typedef HFI_U32 HFI_BOOL; #define MAX(x, y) (((x) > (y)) ? (x) : (y)) #endif -/* - * Default buffer size alignment value - */ #define HFI_ALIGNMENT_4096 (4096) #define BUF_SIZE_ALIGN_16 (16) @@ -39,37 +36,15 @@ typedef HFI_U32 HFI_BOOL; #define BUF_SIZE_ALIGN_512 (512) #define BUF_SIZE_ALIGN_4096 (4096) -/* - * Macro to align a to b - */ #define HFI_ALIGN(a, b) (((b) & ((b) - 1)) ? (((a) + (b) - 1) / \ (b) * (b)) : (((a) + (b) - 1) & (~((b) - 1)))) +#define HFI_WORKMODE_1 1 +#define HFI_WORKMODE_2 2 -#define HFI_WORKMODE_1 1 /* stage 1 */ -#define HFI_WORKMODE_2 2 /* stage 2 */ - -/* - * Default ubwc metadata buffer stride and height alignment values - */ #define HFI_DEFAULT_METADATA_STRIDE_MULTIPLE (64) #define HFI_DEFAULT_METADATA_BUFFERHEIGHT_MULTIPLE (16) -/* - * Level 2 Comment: "Default Parameters for Firmware " - * This section defines all the default constants used by Firmware - * for any encoding session: - * 1. Bitstream Restriction VUI: TRUE - * 2. Picture Order Count: 2 (for all profiles except B frame case) - * 3. Constrained intra pred flag : TRUE (if Intra-refresh (IR) is enabled) - */ - -/* - * Level 2 Comment: "Tile dimensions(in pixels) macros for - * different color formats" - * @datatypes - * @sa - */ #define HFI_COLOR_FORMAT_YUV420_NV12_UBWC_Y_TILE_HEIGHT (8) #define HFI_COLOR_FORMAT_YUV420_NV12_UBWC_Y_TILE_WIDTH (32) #define HFI_COLOR_FORMAT_YUV420_NV12_UBWC_UV_TILE_HEIGHT (8) @@ -81,80 +56,33 @@ typedef HFI_U32 HFI_BOOL; #define HFI_COLOR_FORMAT_RGBA8888_UBWC_TILE_HEIGHT (4) #define HFI_COLOR_FORMAT_RGBA8888_UBWC_TILE_WIDTH (16) -/* - * Level 2 Comment: "Macros to calculate YUV strides and size" - * @datatypes - * HFI_UNCOMPRESSED_FORMAT_SUPPORTED_TYPE - * HFI_UNCOMPRESSED_PLANE_INFO_TYPE - * HFI_UNCOMPRESSED_PLANE_CONSTRAINTS_TYPE - * @sa - * HFI_PROPERTY_PARAM_UNCOMPRESSED_FORMAT_SUPPORTED - */ - -/* - * Luma stride calculation for YUV420, NV12/NV21, NV12_UBWC color format - * Stride arrived at here is the minimum required stride. Host may - * set a stride higher than the one calculated here, till the stride - * is a multiple of "nStrideMultiples" in - * HFI_UNCOMPRESSED_PLANE_CONSTRAINTS_TYPE - */ #define HFI_NV12_IL_CALC_Y_STRIDE(stride, frame_width, stride_multiple) \ stride = HFI_ALIGN(frame_width, stride_multiple) -/* - * Luma plane height calculation for YUV420 NV12/NV21, NV12_UBWC color format - * Luma plane height used by the host needs to be either equal - * to higher than the value calculated here - */ #define HFI_NV12_IL_CALC_Y_BUFHEIGHT(buf_height, frame_height, \ min_buf_height_multiple) buf_height = HFI_ALIGN(frame_height, \ min_buf_height_multiple) -/* - * Chroma stride calculation for NV12/NV21, NV12_UBWC color format - */ #define HFI_NV12_IL_CALC_UV_STRIDE(stride, frame_width, stride_multiple) \ stride = HFI_ALIGN(frame_width, stride_multiple) -/* - * Chroma plane height calculation for NV12/NV21, NV12_UBWC color format - */ #define HFI_NV12_IL_CALC_UV_BUFHEIGHT(buf_height, frame_height, \ min_buf_height_multiple) buf_height = HFI_ALIGN(((frame_height + 1) \ >> 1), min_buf_height_multiple) -/* - * Minimum buffer size that needs to be allocated for current - * frame dimensions for NV12/N21 Linear format - * (calcualtion includes both luma and chroma plane) - */ #define HFI_NV12_IL_CALC_BUF_SIZE(buf_size, y_bufSize, y_stride, y_buf_height, \ uv_buf_size, uv_stride, uv_buf_height) \ y_bufSize = (y_stride * y_buf_height); \ uv_buf_size = (uv_stride * uv_buf_height); \ buf_size = HFI_ALIGN(y_bufSize + uv_buf_size, HFI_ALIGNMENT_4096) -/* - * Minimum Luma buffer size that needs to be allocated for current - * frame dimensions NV12_UBWC format - */ #define HFI_NV12_UBWC_IL_CALC_Y_BUF_SIZE(y_bufSize, y_stride, y_buf_height) \ y_bufSize = HFI_ALIGN(y_stride * y_buf_height, HFI_ALIGNMENT_4096) -/* - * Minimum chroma buffer size that needs to be allocated for current - * frame dimensions NV12_UBWC format - */ #define HFI_NV12_UBWC_IL_CALC_UV_BUF_SIZE(uv_buf_size, \ uv_stride, uv_buf_height) \ uv_buf_size = HFI_ALIGN(uv_stride * uv_buf_height, HFI_ALIGNMENT_4096) -/* - * This is for sdm845 onwards: - * Ver2.0: Minimum buffer size that needs to be allocated for current - * frame dimensions NV12_UBWC format (including interlace UBWC) - * (calculation includes all data & metadata planes) - */ #define HFI_NV12_UBWC_IL_CALC_BUF_SIZE_V2(buf_size,\ frame_width, frame_height, y_stride_multiple,\ y_buffer_height_multiple, uv_stride_multiple, \ @@ -196,73 +124,37 @@ typedef HFI_U32 HFI_BOOL; uv_meta_size) << 1;\ } while (0) -/* - * Luma stride calculation for YUV420_TP10 color format - * Stride arrived at here is the minimum required stride. Host may - * set a stride higher than the one calculated here, till the stride - * is a multiple of "nStrideMultiples" in - * HFI_UNCOMPRESSED_PLANE_CONSTRAINTS_TYPE - */ #define HFI_YUV420_TP10_CALC_Y_STRIDE(stride, frame_width, stride_multiple) \ stride = HFI_ALIGN(frame_width, 192); \ stride = HFI_ALIGN(stride * 4 / 3, stride_multiple) -/* - * Luma plane height calculation for YUV420_TP10 linear & UBWC color format - * Luma plane height used by the host needs to be either equal - * to higher than the value calculated here - */ #define HFI_YUV420_TP10_CALC_Y_BUFHEIGHT(buf_height, frame_height, \ min_buf_height_multiple) \ buf_height = HFI_ALIGN(frame_height, min_buf_height_multiple) -/* - * Chroma stride calculation for YUV420_TP10 linear & UBWC color format - */ #define HFI_YUV420_TP10_CALC_UV_STRIDE(stride, frame_width, stride_multiple) \ stride = HFI_ALIGN(frame_width, 192); \ stride = HFI_ALIGN(stride * 4 / 3, stride_multiple) -/* - * Chroma plane height calculation for YUV420_TP10 linear & UBWC color format - */ #define HFI_YUV420_TP10_CALC_UV_BUFHEIGHT(buf_height, frame_height, \ min_buf_height_multiple) \ buf_height = HFI_ALIGN(((frame_height + 1) >> 1), \ min_buf_height_multiple) -/* - * Minimum buffer size that needs to be allocated for current - * frame dimensions for YUV420_TP10 linear format - * (calcualtion includes both luma and chroma plane) - */ #define HFI_YUV420_TP10_CALC_BUF_SIZE(buf_size, y_buf_size, y_stride,\ y_buf_height, uv_buf_size, uv_stride, uv_buf_height) \ y_buf_size = (y_stride * y_buf_height); \ uv_buf_size = (uv_stride * uv_buf_height); \ buf_size = y_buf_size + uv_buf_size -/* - * Minimum Luma data buffer size that needs to be allocated for current - * frame dimensions YUV420_TP10_UBWC format - */ #define HFI_YUV420_TP10_UBWC_CALC_Y_BUF_SIZE(y_buf_size, y_stride, \ y_buf_height) \ y_buf_size = HFI_ALIGN(y_stride * y_buf_height, HFI_ALIGNMENT_4096) -/* - * Minimum chroma data buffer size that needs to be allocated for current - * frame dimensions YUV420_TP10_UBWC format - */ #define HFI_YUV420_TP10_UBWC_CALC_UV_BUF_SIZE(uv_buf_size, uv_stride, \ uv_buf_height) \ uv_buf_size = HFI_ALIGN(uv_stride * uv_buf_height, HFI_ALIGNMENT_4096) -/* - * Minimum buffer size that needs to be allocated for current - * frame dimensions NV12_UBWC format - * (calculation includes all data & metadata planes) - */ #define HFI_YUV420_TP10_UBWC_CALC_BUF_SIZE(buf_size, y_stride, y_buf_height, \ uv_stride, uv_buf_height, y_md_stride, y_md_height, uv_md_stride, \ uv_md_height)\ @@ -281,45 +173,21 @@ typedef HFI_U32 HFI_BOOL; uv_md_size; \ } while (0) -/* - * Luma stride calculation for YUV420_P010 color format - * Stride arrived at here is the minimum required stride. Host may - * set a stride higher than the one calculated here, till the stride - * is a multiple of "nStrideMultiples" in - * HFI_UNCOMPRESSED_PLANE_CONSTRAINTS_TYPE - */ - #define HFI_YUV420_P010_CALC_Y_STRIDE(stride, frame_width, stride_multiple) \ stride = HFI_ALIGN(frame_width * 2, stride_multiple) -/* - * Luma plane height calculation for YUV420_P010 linear color format - * Luma plane height used by the host needs to be either equal - * to higher than the value calculated here - */ #define HFI_YUV420_P010_CALC_Y_BUFHEIGHT(buf_height, frame_height, \ min_buf_height_multiple) \ buf_height = HFI_ALIGN(frame_height, min_buf_height_multiple) -/* - * Chroma stride calculation for YUV420_P010 linear color format - */ #define HFI_YUV420_P010_CALC_UV_STRIDE(stride, frame_width, stride_multiple) \ stride = HFI_ALIGN(frame_width * 2, stride_multiple) -/* - * Chroma plane height calculation for YUV420_P010 linear color format - */ #define HFI_YUV420_P010_CALC_UV_BUFHEIGHT(buf_height, frame_height, \ min_buf_height_multiple) \ buf_height = HFI_ALIGN(((frame_height + 1) >> 1), \ min_buf_height_multiple) -/* - * Minimum buffer size that needs to be allocated for current - * frame dimensions for YUV420_P010 linear format - * (calculation includes both luma and chroma plane) - */ #define HFI_YUV420_P010_CALC_BUF_SIZE(buf_size, y_data_size, y_stride, \ y_buf_height, uv_data_size, uv_stride, uv_buf_height) \ do \ @@ -331,69 +199,32 @@ typedef HFI_U32 HFI_BOOL; buf_size = y_data_size + uv_data_size; \ } while (0) -/* - * Plane stride calculation for RGB888/BGR888 color format - * Stride arrived at here is the minimum required stride. Host may - * set a stride higher than the one calculated here, till the stride - * is a multiple of "nStrideMultiples" in - * HFI_UNCOMPRESSED_PLANE_CONSTRAINTS_TYPE - */ #define HFI_RGB888_CALC_STRIDE(stride, frame_width, stride_multiple) \ stride = ((frame_width * 3) + stride_multiple - 1) & \ (0xffffffff - (stride_multiple - 1)) -/* - * Plane height calculation for RGB888/BGR888 color format - * Luma plane height used by the host needs to be either equal - * to higher than the value calculated here - */ #define HFI_RGB888_CALC_BUFHEIGHT(buf_height, frame_height, \ min_buf_height_multiple) \ buf_height = ((frame_height + min_buf_height_multiple - 1) & \ (0xffffffff - (min_buf_height_multiple - 1))) -/* - * Minimum buffer size that needs to be allocated for current - * frame dimensions for RGB888/BGR888 format - */ #define HFI_RGB888_CALC_BUF_SIZE(buf_size, stride, buf_height) \ buf_size = ((stride) * (buf_height)) -/* - * Plane stride calculation for RGBA8888 color format - * Stride arrived at here is the minimum required stride. Host may - * set a stride higher than the one calculated here, till the stride - * is a multiple of "nStrideMultiples" in - * HFI_UNCOMPRESSED_PLANE_CONSTRAINTS_TYPE - */ #define HFI_RGBA8888_CALC_STRIDE(stride, frame_width, stride_multiple) \ stride = HFI_ALIGN((frame_width << 2), stride_multiple) -/* - * Plane height calculation for RGBA8888 color format - * Luma plane height used by the host needs to be either equal - * to higher than the value calculated here - */ + #define HFI_RGBA8888_CALC_BUFHEIGHT(buf_height, frame_height, \ min_buf_height_multiple) \ buf_height = HFI_ALIGN(frame_height, min_buf_height_multiple) -/* - * Minimum buffer size that needs to be allocated for current - * frame dimensions for RGBA8888 format - */ + #define HFI_RGBA8888_CALC_BUF_SIZE(buf_size, stride, buf_height) \ buf_size = (stride) * (buf_height) -/* - * Minimum buffer size that needs to be allocated for current - * frame dimensions for data plane of RGBA8888_UBWC format - */ + #define HFI_RGBA8888_UBWC_CALC_DATA_PLANE_BUF_SIZE(buf_size, stride, \ buf_height) \ buf_size = HFI_ALIGN((stride) * (buf_height), HFI_ALIGNMENT_4096) -/* - * Minimum buffer size that needs to be allocated for current - * frame dimensions for of RGBA8888_UBWC format - */ #define HFI_RGBA8888_UBWC_BUF_SIZE(buf_size, data_buf_size, \ metadata_buffer_size, stride, buf_height, _metadata_tride, \ _metadata_buf_height) \ @@ -403,73 +234,34 @@ typedef HFI_U32 HFI_BOOL; _metadata_tride, _metadata_buf_height); \ buf_size = data_buf_size + metadata_buffer_size -/* - * Metadata plane stride calculation for all UBWC color formats - * Should be used for Y metadata Plane & all single plane color - * formats. Stride arrived at here is the minimum required - * stride. Host may set a stride higher than the one calculated - * here, till the stride is a multiple of - * "_metadata_trideMultiple" in - * HFI_UNCOMPRESSED_PLANE_CONSTRAINTS_TYPE Default - * metadataDataStrideMultiple = 64 - */ #define HFI_UBWC_CALC_METADATA_PLANE_STRIDE(metadata_stride, frame_width,\ metadata_stride_multiple, tile_width_in_pels) \ metadata_stride = HFI_ALIGN(((frame_width + (tile_width_in_pels - 1)) /\ tile_width_in_pels), metadata_stride_multiple) -/* - * Metadata plane height calculation for all UBWC color formats - * Should be used for Y metadata Plane & all single plane color - * formats. Plane height used by the host needs to be either - * equal to higher than the value calculated here - * Default metadataHeightMultiple = 16 - */ #define HFI_UBWC_METADATA_PLANE_BUFHEIGHT(metadata_buf_height, frame_height, \ metadata_height_multiple, tile_height_in_pels) \ metadata_buf_height = HFI_ALIGN(((frame_height + \ (tile_height_in_pels - 1)) / tile_height_in_pels), \ metadata_height_multiple) -/* - * UV Metadata plane stride calculation for NV12_UBWC color - * format. Stride arrived at here is the minimum required - * stride. Host may set a stride higher than the one calculated - * here, till the stride is a multiple of - * "_metadata_trideMultiple" in - * HFI_UNCOMPRESSED_PLANE_CONSTRAINTS_TYPE Default - * metadataDataStrideMultiple = 64 - */ #define HFI_UBWC_UV_METADATA_PLANE_STRIDE(metadata_stride, frame_width, \ metadata_stride_multiple, tile_width_in_pels) \ metadata_stride = HFI_ALIGN(((((frame_width + 1) >> 1) +\ (tile_width_in_pels - 1)) / tile_width_in_pels), \ metadata_stride_multiple) -/* - * UV Metadata plane height calculation for NV12_UBWC color - * format. Plane height used by the host needs to be either - * equal to higher than the value calculated here Default - * metadata_height_multiple = 16 - */ #define HFI_UBWC_UV_METADATA_PLANE_BUFHEIGHT(metadata_buf_height, frame_height,\ metadata_height_multiple, tile_height_in_pels) \ metadata_buf_height = HFI_ALIGN(((((frame_height + 1) >> 1) + \ (tile_height_in_pels - 1)) / tile_height_in_pels), \ metadata_height_multiple) -/* - * Minimum metadata buffer size that needs to be allocated for - * current frame dimensions for each metadata plane. - * This macro applies to all UBWC color format - */ #define HFI_UBWC_METADATA_PLANE_BUFFER_SIZE(buffer_size, _metadata_tride, \ _metadata_buf_height) \ buffer_size = HFI_ALIGN(_metadata_tride * _metadata_buf_height, \ HFI_ALIGNMENT_4096) - - #define BUFFER_ALIGNMENT_512_BYTES 512 #define BUFFER_ALIGNMENT_256_BYTES 256 #define BUFFER_ALIGNMENT_128_BYTES 128 @@ -496,27 +288,7 @@ typedef HFI_U32 HFI_BOOL; #define MAX_PE_NBR_DATA_LCU32_LINE_BUFFER_SIZE (32 * 2 * 3) #define MAX_PE_NBR_DATA_LCU16_LINE_BUFFER_SIZE (16 * 2 * 3) -/* Begin of IRIS2 */ - -/* - * VPSS internal buffer definition - * Only for 1:1 DS ratio case - */ -#define MAX_TILE_COLUMNS 32 /* 8K/256 */ - -/* - * For all buffer size calculators using num_vpp_pipes, - * use per chipset "static" pipe count. - * Note that this applies to all use-cases, - * e.g. buffer sizes for interlace decode - * will be calculated using 4 vpp pipes on Kona, - * even though interlace decode uses single vpp pipe. - * __________________________________________________________ - * |_____________Target_____________|_______numVPPpipes_______| - * | IRIS2(e.g. Kona) | 4 | - * | IRIS2(e.g. Cedros) | 2 | - * |_______IRIS2(e.g. Bitra)________|___________1_____________| - */ +#define MAX_TILE_COLUMNS 32 #define SIZE_VPSS_LB(Size, frame_width, frame_height, num_vpp_pipes) \ do \ @@ -554,20 +326,15 @@ typedef HFI_U32 HFI_BOOL; opb_lb_wr_llb_y_buffer_size; \ } while (0) -/* - * H264d internal buffer definition - */ #define VPP_CMD_MAX_SIZE (1 << 20) #define NUM_HW_PIC_BUF 32 #define BIN_BUFFER_THRESHOLD (1280 * 736) #define H264D_MAX_SLICE 1800 -#define SIZE_H264D_BUFTAB_T (256) /* sizeof(h264d_buftab_t) aligned to 256 */ -#define SIZE_H264D_HW_PIC_T (1 << 11) /* sizeof(h264d_hw_pic_t) 32 aligned */ +#define SIZE_H264D_BUFTAB_T (256) +#define SIZE_H264D_HW_PIC_T (1 << 11) #define SIZE_H264D_BSE_CMD_PER_BUF (32 * 4) #define SIZE_H264D_VPP_CMD_PER_BUF (512) -/* Line Buffer definitions */ -/* one for luma and 1/2 for each chroma */ #define SIZE_H264D_LB_FE_TOP_DATA(frame_width, frame_height) \ (MAX_FE_NBR_DATA_LUMA_LINE_BUFFER_SIZE * HFI_ALIGN(frame_width, 16) * 3) @@ -600,7 +367,7 @@ typedef HFI_U32 HFI_BOOL; #define SIZE_H264D_BSE_CMD_BUF(_size, frame_width, frame_height) \ do \ - { /* this could change alignment */ \ + { \ HFI_U32 _height = HFI_ALIGN(frame_height, \ BUFFER_ALIGNMENT_32_BYTES); \ _size = MIN((((_height + 15) >> 4) * 3 * 4), H264D_MAX_SLICE) *\ @@ -609,7 +376,7 @@ typedef HFI_U32 HFI_BOOL; #define SIZE_H264D_VPP_CMD_BUF(_size, frame_width, frame_height) \ do \ - { /* this could change alignment */ \ + { \ HFI_U32 _height = HFI_ALIGN(frame_height, \ BUFFER_ALIGNMENT_32_BYTES); \ _size = MIN((((_height + 15) >> 4) * 3 * 4), H264D_MAX_SLICE) * \ @@ -699,10 +466,7 @@ typedef HFI_U32 HFI_BOOL; #define H264_CABAC_HDR_RATIO_HD_TOT 1 #define H264_CABAC_RES_RATIO_HD_TOT 3 -/* - * some content need more bin buffer, - * but limit buffer size for high resolution - */ + #define SIZE_H264D_HW_BIN_BUFFER(_size, frame_width, frame_height, \ delay, num_vpp_pipes) \ do \ @@ -751,9 +515,6 @@ typedef HFI_U32 HFI_BOOL; _size = HFI_ALIGN((SIZE_SLIST_BUF_H264 * NUM_SLIST_BUF_H264 + \ NUM_HW_PIC_BUF * SIZE_SEI_USERDATA), VENUS_DMA_ALIGNMENT) -/* - * H265d internal buffer definition - */ #define LCU_MAX_SIZE_PELS 64 #define LCU_MIN_SIZE_PELS 16 @@ -841,7 +602,6 @@ typedef HFI_U32 HFI_BOOL; #define HDR10_HIST_EXTRADATA_SIZE (4 * 1024) -/* c2 divide this into NON_COMV and LINE */ #define HFI_BUFFER_NON_COMV_H265D(_size, frame_width, frame_height, \ num_vpp_pipes) \ do \ @@ -903,10 +663,7 @@ typedef HFI_U32 HFI_BOOL; #define H265_CABAC_HDR_RATIO_HD_TOT 2 #define H265_CABAC_RES_RATIO_HD_TOT 2 -/* - * some content need more bin buffer, - * but limit buffer size for high resolution - */ + #define SIZE_H265D_HW_BIN_BUFFER(_size, frame_width, frame_height, \ delay, num_vpp_pipes) \ do \ @@ -959,9 +716,6 @@ typedef HFI_U32 HFI_BOOL; H265_NUM_TILE * sizeof(HFI_U32) + NUM_HW_PIC_BUF * SIZE_SEI_USERDATA),\ VENUS_DMA_ALIGNMENT) -/* - * VPxd internal buffer definition - */ #define SIZE_VPXD_LB_FE_LEFT_CTRL(frame_width, frame_height) \ MAX(((frame_height + 15) >> 4) * \ MAX_FE_NBR_CTRL_LCU16_LINE_BUFFER_SIZE, \ @@ -969,7 +723,7 @@ typedef HFI_U32 HFI_BOOL; MAX_FE_NBR_CTRL_LCU32_LINE_BUFFER_SIZE, \ ((frame_height + 63) >> 6) * MAX_FE_NBR_CTRL_LCU64_LINE_BUFFER_SIZE)) #define SIZE_VPXD_LB_FE_TOP_CTRL(frame_width, frame_height) \ - (((HFI_ALIGN(frame_width, 64) + 8) * 10 * 2)) /* + small line */ + (((HFI_ALIGN(frame_width, 64) + 8) * 10 * 2)) #define SIZE_VPXD_LB_SE_TOP_CTRL(frame_width, frame_height) \ (((frame_width + 15) >> 4) * MAX_FE_NBR_CTRL_LCU16_LINE_BUFFER_SIZE) #define SIZE_VPXD_LB_SE_LEFT_CTRL(frame_width, frame_height) \ @@ -994,7 +748,6 @@ typedef HFI_U32 HFI_BOOL; #define SIZE_VP9D_LB_VSP_TOP(frame_width, frame_height) \ ((((HFI_ALIGN(HFI_ALIGN(frame_width, 8), 64) >> 6) * 64 * 8) + 256)) -/* sizeof(VP9_COL_MV_BUFFER) */ #define HFI_IRIS2_VP9D_COMV_SIZE \ ((((8192 + 63) >> 6) * ((4320 + 63) >> 6) * 8 * 8 * 2 * 8)) @@ -1019,9 +772,6 @@ typedef HFI_U32 HFI_BOOL; VENUS_DMA_ALIGNMENT); \ } while (0) -/* _yuv_bufcount_min = MAX(Min YUV Buffer count, - * (HFI_PROPERTY_PARAM_VDEC_VPP_DELAY + 1)) - */ #define HFI_BUFFER_LINE_VP9D(_size, frame_width, frame_height, \ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ do \ @@ -1051,7 +801,6 @@ typedef HFI_U32 HFI_BOOL; HFI_ALIGN(frame_height, BUFFER_ALIGNMENT_16_BYTES) * 3 / 2; \ if (!is_interlaced) \ { \ - /* binbuffer1_size + binbufer2_size */ \ _size = HFI_ALIGN(((MAX(_size_yuv, \ ((BIN_BUFFER_THRESHOLD * 3) >> 1)) * \ VPX_DECODER_FRAME_BIN_HDR_BUDGET_RATIO * \ @@ -1085,9 +834,6 @@ typedef HFI_U32 HFI_BOOL; VENUS_DMA_ALIGNMENT) + HFI_ALIGN(VP9_NUM_FRAME_INFO_BUF * \ CCE_TILE_OFFSET_SIZE, VENUS_DMA_ALIGNMENT) -/* - * MP2d internal buffer definition - */ #define HFI_BUFFER_LINE_MP2D(_size, frame_width, frame_height, \ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ do \ @@ -1123,13 +869,6 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define HFI_BUFFER_PERSIST_MP2D(_size) \ _size = QMATRIX_SIZE + MP2D_QPDUMP_SIZE; -/* Begin of IRIS2 Encoder */ - -/* - * Encoder Output Bitstream Buffer definition - * To match with driver Calculation, - * the output bitstream = YUV/4 for larger than 4K size. - */ #define HFI_BUFFER_BITSTREAM_ENC(size, frame_width, frame_height, \ rc_type, is_ten_bit) \ do \ @@ -1177,9 +916,6 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ height_in_lcus * 2 + 256; \ } while (0) -/* - * Encoder Input Extradata Buffer definition - */ #define HFI_BUFFER_INPUT_METADATA_ENC(size, frame_width, frame_height, \ is_roi_enabled, lcu_size) \ do \ @@ -1216,9 +952,6 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ size = 204800; \ } while (0) -/* - * Encoder Scratch Buffer definition - */ #define HFI_MAX_COL_FRAME 6 #define HFI_VENUS_VENC_TRE_WB_BUFF_SIZE (65 << 4) // bytes #define HFI_VENUS_VENC_DB_LINE_BUFF_PER_MB 512 @@ -1233,11 +966,6 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define SYSTEM_LAL_TILE10 192 #endif -/* - * Host uses following macro to calculate num_ref for encoder - * Here: _total_hp_layers = HFI_PROPERTY_PARAM_VENC_HIER_P_MAX_NUM_ENH_LAYER + 1 - * Here: _total_hb_layers = HFI_PROPERTY_PARAM_VENC_HIER_B_MAX_NUM_ENH_LAYER + 1 - */ #define HFI_IRIS2_ENC_RECON_BUF_COUNT(num_recon, n_bframe, ltr_count, \ _total_hp_layers, _total_hb_layers, hybrid_hp, codec_standard) \ do \ @@ -1245,32 +973,28 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ HFI_U32 num_ref = 1; \ if (n_bframe) \ num_ref = 2; \ - if (ltr_count) \ - /* B and LTR can't be at same time */\ - num_ref = num_ref + ltr_count; \ - if (_total_hp_layers) \ + if (_total_hp_layers > 1) \ { \ if (hybrid_hp) \ - /* LTR and B-frame not supported with hybrid HP */\ - num_ref = (_total_hp_layers - 1); \ - if (codec_standard == HFI_CODEC_ENCODE_HEVC) \ - num_ref = (_total_hp_layers + 1) / 2 + \ - ltr_count; \ + num_ref = (_total_hp_layers + 1) >> 1; \ + else if (codec_standard == HFI_CODEC_ENCODE_HEVC) \ + num_ref = (_total_hp_layers + 1) >> 1; \ else if (codec_standard == HFI_CODEC_ENCODE_AVC && \ - _total_hp_layers <= 4) \ - num_ref = (2 ^ (_total_hp_layers - 1)) - 1 + \ - ltr_count; \ + _total_hp_layers < 4) \ + num_ref = (_total_hp_layers - 1); \ else \ - /* AVC normal HP and TotalHPLayer>4.*/ \ - /* This is NPOR. uses MMCO. */ \ - num_ref = (_total_hp_layers + 1) / 2 + \ - ltr_count; \ + num_ref = _total_hp_layers; \ } \ - if (_total_hb_layers >= 2) \ + if (ltr_count) \ + num_ref = num_ref + ltr_count; \ + if (_total_hb_layers > 1) \ { \ - num_ref = (2 ^ (_total_hb_layers - 1)) / 2 + 1; \ + if (codec_standard == HFI_CODEC_ENCODE_HEVC) \ + num_ref = (_total_hb_layers); \ + else if (codec_standard == HFI_CODEC_ENCODE_AVC) \ + num_ref = (1 << (_total_hb_layers - 2)) + 1; \ } \ - num_recon = num_ref + 1; \ + num_recon = num_ref + 1; \ } while (0) #define SIZE_BIN_BITSTREAM_ENC(_size, rc_type, frame_width, frame_height, \ @@ -1285,22 +1009,29 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ { \ if ((rc_type == HFI_RC_CQ) || (rc_type == HFI_RC_OFF)) \ { \ - bitstream_size_eval = (((size_aligned_width)* (size_aligned_height)* 3) >> 1); \ + bitstream_size_eval = (((size_aligned_width) * \ + (size_aligned_height) * 3) >> 1); \ } \ else \ { \ - bitstream_size_eval = (((size_aligned_width) * \ - (size_aligned_height)*3 * 5) >> 2); \ - if (size_aligned_width * size_aligned_height > \ + bitstream_size_eval = ((size_aligned_width) * \ + (size_aligned_height) * 3); \ + if (rc_type == HFI_RC_LOSSLESS) \ + { \ + bitstream_size_eval = (bitstream_size_eval * 3 >> 2); \ + } \ + else if ((size_aligned_width * size_aligned_height) > \ (4096 * 2176)) \ { \ - bitstream_size_eval = \ - (bitstream_size_eval >> 3); \ + bitstream_size_eval >>= 3; \ } \ - else if (size_aligned_width * size_aligned_height > (352 * 288 * 4)) \ + else if ((size_aligned_width * size_aligned_height) > (480 * 320)) \ { \ - bitstream_size_eval = \ - (bitstream_size_eval >> 2); \ + bitstream_size_eval >>= 2; \ + } \ + if (lcu_size == 32) \ + { \ + bitstream_size_eval = (bitstream_size_eval * 5 >> 2); \ } \ } \ } \ @@ -1312,13 +1043,32 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ _size = HFI_ALIGN(bitstream_size_eval, VENUS_DMA_ALIGNMENT); \ } while (0) -#define SIZE_ENC_SINGLE_PIPE(size, bitbin_size, num_vpp_pipes, \ - frame_height, frame_width) \ +#define SIZE_ENC_SINGLE_PIPE(size, rc_type, bitbin_size, num_vpp_pipes, \ + frame_width, frame_height, lcu_size) \ do \ { \ HFI_U32 size_single_pipe_eval = 0, sao_bin_buffer_size = 0, \ _padded_bin_sz = 0; \ - if (num_vpp_pipes > 2) \ + HFI_U32 size_aligned_width = 0, size_aligned_height = 0; \ + size_aligned_width = HFI_ALIGN((frame_width), lcu_size); \ + size_aligned_height = HFI_ALIGN((frame_height), lcu_size); \ + if ((size_aligned_width * size_aligned_height) > \ + (3840 * 2160)) \ + { \ + if (num_vpp_pipes == 4) \ + { \ + size_single_pipe_eval = bitbin_size / 4; \ + } \ + else if (num_vpp_pipes == 2) \ + { \ + size_single_pipe_eval = bitbin_size / 2; \ + } \ + else if (num_vpp_pipes == 1) \ + { \ + size_single_pipe_eval = bitbin_size; \ + } \ + } \ + else if (num_vpp_pipes > 2) \ { \ size_single_pipe_eval = bitbin_size / 2; \ } \ @@ -1326,8 +1076,10 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ { \ size_single_pipe_eval = bitbin_size; \ } \ - size_single_pipe_eval = HFI_ALIGN(size_single_pipe_eval, \ - VENUS_DMA_ALIGNMENT); \ + if (rc_type == HFI_RC_LOSSLESS) \ + { \ + size_single_pipe_eval = (size_single_pipe_eval << 1); \ + } \ sao_bin_buffer_size = (64 * ((((frame_width) + \ BUFFER_ALIGNMENT_32_BYTES) * ((frame_height) +\ BUFFER_ALIGNMENT_32_BYTES)) >> 10)) + 384; \ @@ -1354,13 +1106,13 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ bitbin_size = HFI_ALIGN(bitbin_size, \ VENUS_DMA_ALIGNMENT); \ } \ - else \ + else if ((lcu_size == 16) || (num_vpp_pipes > 1)) \ { \ total_bitbin_buffers = 1; \ bitbin_size = bitstream_size; \ } \ - SIZE_ENC_SINGLE_PIPE(size_single_pipe, bitbin_size, \ - num_vpp_pipes, frame_height, frame_width); \ + SIZE_ENC_SINGLE_PIPE(size_single_pipe, rc_type, bitbin_size, \ + num_vpp_pipes, frame_width, frame_height, lcu_size); \ bitbin_size = size_single_pipe * num_vpp_pipes; \ _size = HFI_ALIGN(bitbin_size, VENUS_DMA_ALIGNMENT) * \ total_bitbin_buffers + 512; \ @@ -1484,11 +1236,11 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ _size = (standard == HFI_CODEC_ENCODE_HEVC) ? (256 + 16 * \ (14 + ((((frame_height_coded) >> 5) + 7) >> 3))) : \ (256 + 16 * (14 + ((((frame_height_coded) >> 4) + 7) >> 3))); \ - _size *= 6; /* multiply by max numtilescol */ \ + _size *= 6; \ if (num_vpp_pipes_enc > 1) \ { \ - _size = HFI_ALIGN(_size, VENUS_DMA_ALIGNMENT) \ - * num_vpp_pipes_enc;\ + _size = HFI_ALIGN(_size, VENUS_DMA_ALIGNMENT) * \ + num_vpp_pipes_enc;\ } \ _size = HFI_ALIGN(_size, BUFFER_ALIGNMENT_512_BYTES) * \ HFI_MAX_COL_FRAME; \ @@ -1606,7 +1358,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ } while (0) #define HFI_BUFFER_COMV_ENC(_size, frame_width, frame_height, lcu_size, \ - num_ref, standard) \ + num_recon, standard) \ do \ { \ HFI_U32 size_colloc_mv = 0, size_colloc_rc = 0; \ @@ -1622,25 +1374,25 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ (3 * 16 * (width_in_lcus * height_in_lcus +\ BUFFER_ALIGNMENT_32_BYTES)); \ size_colloc_mv = HFI_ALIGN(size_colloc_mv, \ - VENUS_DMA_ALIGNMENT) * (num_ref + 1); \ + VENUS_DMA_ALIGNMENT) * num_recon; \ size_colloc_rc = (((mb_width + 7) >> 3) * 16 * 2 * mb_height); \ size_colloc_rc = HFI_ALIGN(size_colloc_rc, \ VENUS_DMA_ALIGNMENT) * HFI_MAX_COL_FRAME; \ _size = size_colloc_mv + size_colloc_rc; \ } while (0) -#define HFI_BUFFER_COMV_H264E(_size, frame_width, frame_height, num_ref) \ +#define HFI_BUFFER_COMV_H264E(_size, frame_width, frame_height, num_recon) \ do \ { \ HFI_BUFFER_COMV_ENC(_size, frame_width, frame_height, 16, \ - num_ref, HFI_CODEC_ENCODE_AVC); \ + num_recon, HFI_CODEC_ENCODE_AVC); \ } while (0) -#define HFI_BUFFER_COMV_H265E(_size, frame_width, frame_height, num_ref) \ +#define HFI_BUFFER_COMV_H265E(_size, frame_width, frame_height, num_recon) \ do \ { \ HFI_BUFFER_COMV_ENC(_size, frame_width, frame_height, 32,\ - num_ref, HFI_CODEC_ENCODE_HEVC); \ + num_recon, HFI_CODEC_ENCODE_HEVC); \ } while (0) #define HFI_BUFFER_NON_COMV_ENC(_size, frame_width, frame_height, \ @@ -1737,9 +1489,6 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ size = ref_buf_size; \ } while (0) -/* - * Encoder Scratch2 Buffer definition - */ #define HFI_BUFFER_DPB_ENC(_size, frame_width, frame_height, is_ten_bit) \ do \ { \ @@ -1822,5 +1571,4 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ } \ } while (0) -/* End of IRIS2 */ #endif /* __HFI_BUFFER_IRIS2__ */ diff --git a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c index 1226d33c66..1841b7742e 100644 --- a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c @@ -280,7 +280,7 @@ static u32 msm_vidc_encoder_bin_size_iris2(struct msm_vidc_inst *inst) static u32 msm_vidc_encoder_comv_size_iris2(struct msm_vidc_inst* inst) { u32 size = 0; - u32 width, height, num_ref = 0, num_recon = 0; + u32 width, height, num_recon = 0; struct v4l2_format* f; if (!inst || !inst->core) { @@ -296,14 +296,12 @@ static u32 msm_vidc_encoder_comv_size_iris2(struct msm_vidc_inst* inst) // TODO: replace zeros with appropriate variables HFI_IRIS2_ENC_RECON_BUF_COUNT(num_recon, 0, 0, 0, 0, 0, HFI_CODEC_ENCODE_AVC); - num_ref = num_recon - 1; - HFI_BUFFER_COMV_H264E(size, width, height, num_ref); + HFI_BUFFER_COMV_H264E(size, width, height, num_recon); } else if (inst->codec == MSM_VIDC_HEVC || inst->codec == MSM_VIDC_HEIC) { // TODO: replace zeros with appropriate variables HFI_IRIS2_ENC_RECON_BUF_COUNT(num_recon, 0, 0, 0, 0, 0, HFI_CODEC_ENCODE_HEVC); - num_ref = num_recon - 1; - HFI_BUFFER_COMV_H265E(size, width, height, num_ref); + HFI_BUFFER_COMV_H265E(size, width, height, num_recon); } i_vpr_l(inst, "%s: size %d\n", __func__, size); diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index 64d94ec952..2321498a44 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -1016,6 +1016,14 @@ int msm_venc_streamon_output(struct msm_vidc_inst *inst) return -EINVAL; } + rc = msm_vidc_adjust_v4l2_properties(inst); + if (rc) + goto error; + + rc = msm_vidc_set_v4l2_properties(inst); + if (rc) + goto error; + rc = msm_venc_set_output_properties(inst); if (rc) goto error; @@ -1032,14 +1040,6 @@ int msm_venc_streamon_output(struct msm_vidc_inst *inst) if (rc) goto error; - rc = msm_vidc_adjust_v4l2_properties(inst); - if (rc) - goto error; - - rc = msm_vidc_set_v4l2_properties(inst); - if (rc) - goto error; - rc = msm_venc_set_internal_properties(inst); if (rc) goto error; From 1147530e8cb51069d874145a7595952c4e649005 Mon Sep 17 00:00:00 2001 From: Elliot Berman Date: Tue, 16 Mar 2021 10:33:26 -0700 Subject: [PATCH 0180/1061] video: format: Add bounds check Add bounds check on fmtdesc index to prevent out-of-bounds array access. Change-Id: I52873426714c8a15c0fe7b0971fe5737a549c691 Signed-off-by: Elliot Berman --- driver/vidc/src/msm_vdec.c | 21 +++++++++++---------- driver/vidc/src/msm_venc.c | 23 ++++++++++++----------- 2 files changed, 23 insertions(+), 21 deletions(-) diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 0bfc4e1a17..7f2e55e6d0 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -2248,9 +2248,10 @@ int msm_vdec_enum_fmt(struct msm_vidc_inst *inst, struct v4l2_fmtdesc *f) int rc = 0; struct msm_vidc_core *core; u32 array[32] = {0}; - u32 i = 0, idx = 0; + u32 i = 0; - if (!inst || !inst->core || !inst->capabilities || !f) { + if (!inst || !inst->core || !inst->capabilities || !f || + f->index >= ARRAY_SIZE(array)) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -2258,15 +2259,15 @@ int msm_vdec_enum_fmt(struct msm_vidc_inst *inst, struct v4l2_fmtdesc *f) if (f->type == INPUT_MPLANE) { u32 codecs = core->capabilities[DEC_CODECS].value; + u32 idx = 0; - while (codecs) { - if (i > 31) - break; + for (i = 0; i <= 31; i++) { if (codecs & BIT(i)) { + if (idx >= ARRAY_SIZE(array)) + break; array[idx] = codecs & BIT(i); idx++; } - i++; } f->pixelformat = v4l2_codec_from_driver(array[f->index], __func__); @@ -2276,18 +2277,18 @@ int msm_vdec_enum_fmt(struct msm_vidc_inst *inst, struct v4l2_fmtdesc *f) strlcpy(f->description, "codec", sizeof(f->description)); } else if (f->type == OUTPUT_MPLANE) { u32 formats = inst->capabilities->cap[PIX_FMTS].step_or_mask; + u32 idx = 0; - while (formats) { - if (i > 31) - break; + for (i = 0; i <= 31; i++) { if (formats & BIT(i)) { + if (idx >= ARRAY_SIZE(array)) + break; if (msm_vdec_check_colorformat_supported(inst, formats & BIT(i))) { array[idx] = formats & BIT(i); idx++; } } - i++; } f->pixelformat = v4l2_colorformat_from_driver(array[f->index], __func__); diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index 64d94ec952..a5d47c103b 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -1630,25 +1630,26 @@ int msm_venc_enum_fmt(struct msm_vidc_inst *inst, struct v4l2_fmtdesc *f) int rc = 0; struct msm_vidc_core *core; u32 array[32] = {0}; - u32 i = 0, idx = 0; + u32 i = 0; - if (!inst || !inst->core || !inst->capabilities || !f) { + if (!inst || !inst->core || !inst->capabilities || !f || + f->index >= ARRAY_SIZE(array)) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } core = inst->core; if (f->type == OUTPUT_MPLANE) { - u32 codecs = core->capabilities[DEC_CODECS].value; + u32 codecs = core->capabilities[ENC_CODECS].value; + u32 idx = 0; - while (codecs) { - if (i > 31) - break; + for (i = 0; i <= 31; i++) { if (codecs & BIT(i)) { + if (idx >= ARRAY_SIZE(array)) + break; array[idx] = codecs & BIT(i); idx++; } - i++; } f->pixelformat = v4l2_codec_from_driver(array[f->index], __func__); @@ -1658,15 +1659,15 @@ int msm_venc_enum_fmt(struct msm_vidc_inst *inst, struct v4l2_fmtdesc *f) strlcpy(f->description, "codec", sizeof(f->description)); } else if (f->type == INPUT_MPLANE) { u32 formats = inst->capabilities->cap[PIX_FMTS].step_or_mask; + u32 idx = 0; - while (formats) { - if (idx > 31) - break; + for (i = 0; i <= 31; i++) { if (formats & BIT(i)) { + if (idx >= ARRAY_SIZE(array)) + break; array[idx] = formats & BIT(i); idx++; } - i++; } f->pixelformat = v4l2_colorformat_from_driver(array[f->index], __func__); From 4bb73456073b3688d90329c8de8594922eb5b707 Mon Sep 17 00:00:00 2001 From: Manikanta Kanamarlapudi Date: Sun, 7 Mar 2021 22:58:34 +0530 Subject: [PATCH 0181/1061] video: driver: Adjust input meta buffer queue size Adjust input meta buffer queue size as per the super frame count. Change-Id: Ie1fc10bd13b0daa09b171fb2532beb1f22d93811 --- driver/vidc/src/msm_vidc_vb2.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/driver/vidc/src/msm_vidc_vb2.c b/driver/vidc/src/msm_vidc_vb2.c index 06bae86f1a..5f1c275b78 100644 --- a/driver/vidc/src/msm_vidc_vb2.c +++ b/driver/vidc/src/msm_vidc_vb2.c @@ -130,8 +130,14 @@ int msm_vidc_queue_setup(struct vb2_queue *q, if (port == INPUT_PORT || port == OUTPUT_PORT) sizes[0] = inst->fmts[port].fmt.pix_mp.plane_fmt[0].sizeimage; - else if (port == INPUT_META_PORT || port == OUTPUT_META_PORT) + else if (port == OUTPUT_META_PORT) sizes[0] = inst->fmts[port].fmt.meta.buffersize; + else if (port == INPUT_META_PORT) + if (inst->capabilities->cap[SUPER_FRAME].value) + sizes[0] = inst->capabilities->cap[SUPER_FRAME].value * + inst->fmts[port].fmt.meta.buffersize; + else + sizes[0] = inst->fmts[port].fmt.meta.buffersize; i_vpr_h(inst, "queue_setup: type %d num_buffers %d sizes[0] %d\n", From fd68015bc7f6d826022bb73ba13fae26f9139861 Mon Sep 17 00:00:00 2001 From: Mihir Ganu Date: Thu, 18 Mar 2021 09:41:52 -0700 Subject: [PATCH 0182/1061] video: driver: Allow dynamic setting for CODEC_CONFIG Set dynamic flag for CODEC_CONFIG cap to allow dynamic setting. Change-Id: Ie49b60508b0633b34b38e4c17b8e214e7e4159a5 Signed-off-by: Mihir Ganu --- driver/platform/waipio/src/msm_vidc_waipio.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index c785567de6..417e83e404 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -1039,7 +1039,8 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { HFI_PROP_LUMA_CHROMA_BIT_DEPTH}, {CODEC_CONFIG, DEC, H264|HEVC|HEIC, 0, 1, 1, 0, - V4L2_CID_MPEG_VIDC_CODEC_CONFIG}, + V4L2_CID_MPEG_VIDC_CODEC_CONFIG, 0, + CAP_FLAG_DYNAMIC_ALLOWED}, {BITSTREAM_SIZE_OVERWRITE, DEC, CODECS_ALL, 0, INT_MAX, 1, 0, V4L2_CID_MPEG_VIDC_MIN_BITSTREAM_SIZE_OVERWRITE}, From ca83b4c74c23cc2877bd7e00a429114e8bf0e827 Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Thu, 18 Mar 2021 14:14:16 -0700 Subject: [PATCH 0183/1061] video: driver: fix driver tip compilation add braces to avoid dangling else. Change-Id: I910112cf67a8d3f9ac05e17dbbf3a9f6865e2433 Signed-off-by: Darshana Patil --- driver/vidc/src/msm_vidc_vb2.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/driver/vidc/src/msm_vidc_vb2.c b/driver/vidc/src/msm_vidc_vb2.c index 5f1c275b78..677350e989 100644 --- a/driver/vidc/src/msm_vidc_vb2.c +++ b/driver/vidc/src/msm_vidc_vb2.c @@ -128,16 +128,17 @@ int msm_vidc_queue_setup(struct vb2_queue *q, inst->buffers.output_meta.actual_count = *num_buffers; } - if (port == INPUT_PORT || port == OUTPUT_PORT) + if (port == INPUT_PORT || port == OUTPUT_PORT) { sizes[0] = inst->fmts[port].fmt.pix_mp.plane_fmt[0].sizeimage; - else if (port == OUTPUT_META_PORT) + } else if (port == OUTPUT_META_PORT) { sizes[0] = inst->fmts[port].fmt.meta.buffersize; - else if (port == INPUT_META_PORT) + } else if (port == INPUT_META_PORT) { if (inst->capabilities->cap[SUPER_FRAME].value) sizes[0] = inst->capabilities->cap[SUPER_FRAME].value * inst->fmts[port].fmt.meta.buffersize; else sizes[0] = inst->fmts[port].fmt.meta.buffersize; + } i_vpr_h(inst, "queue_setup: type %d num_buffers %d sizes[0] %d\n", From 98e799da295c94468dfec00a4d236b195c9bd963 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Thu, 11 Mar 2021 13:21:21 -0800 Subject: [PATCH 0184/1061] video: driver: Add support to handle GOP and its dependencies Add support to below mentioned properties: - HFI_PROP_LAYER_ENCODING_TYPE - HFI_PROP_LAYER_COUNT - HFI_PROP_MAX_GOP_FRAMES - HFI_PROP_MAX_B_FRAMES. Change-Id: I3be975a48dc668d0ec83f6ff13837488fc570b78 Signed-off-by: Akshata Sahukar --- driver/platform/waipio/src/msm_vidc_waipio.c | 64 ++-- .../variant/iris2/src/msm_vidc_buffer_iris2.c | 58 ++-- driver/vidc/inc/msm_vidc_control.h | 7 + driver/vidc/inc/msm_vidc_inst.h | 1 + driver/vidc/inc/msm_vidc_internal.h | 14 +- driver/vidc/src/msm_venc.c | 12 + driver/vidc/src/msm_vidc_control.c | 322 +++++++++++++++++- driver/vidc/src/msm_vidc_driver.c | 9 +- 8 files changed, 423 insertions(+), 64 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 417e83e404..8fd04dcd2e 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -60,6 +60,7 @@ static struct msm_platform_core_capability core_data_waipio[] = { {MAX_MBPS_HQ, 489600}, /* ((1920x1088)/256)@60fps */ {MAX_MBPF_B_FRAME, 32640}, /* 3840x2176/256 */ {MAX_MBPS_B_FRAME, 1958400}, /* 3840x2176/256 MBs@60fps */ + {MAX_ENH_LAYER_COUNT, 5}, {NUM_VPP_PIPE, 4}, {SW_PC, 1}, {SW_PC_DELAY, 20000}, /* 20000 ms (>HW_RESPONSE_TIMEOUT)*/ @@ -193,12 +194,6 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {SCALE_X, DEC, H264|HEVC|VP9, 65536, 65536, 1, 65536}, {SCALE_Y, ENC, H264|HEVC, 8192, 65536, 1, 8192}, {SCALE_Y, DEC, H264|HEVC|VP9, 65536, 65536, 1, 65536}, - {B_FRAME, ENC, H264|HEVC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDEO_B_FRAMES, - HFI_PROP_MAX_B_FRAMES, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, {MB_CYCLES_VSP, ENC, CODECS_ALL, 25, 25, 1, 25}, {MB_CYCLES_VSP, DEC, CODECS_ALL, 25, 25, 1, 25}, @@ -328,7 +323,8 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { HFI_PROP_RATE_CONTROL, CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, - {LTR_COUNT, IR_RANDOM, TIME_DELTA_BASED_RC, I_FRAME_QP}, + {LTR_COUNT, IR_RANDOM, TIME_DELTA_BASED_RC, I_FRAME_QP, + ENH_LAYER_COUNT}, msm_vidc_adjust_bitrate_mode, msm_vidc_set_u32_enum}, {BITRATE_MODE, ENC, HEVC, @@ -343,7 +339,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {LTR_COUNT, IR_RANDOM, TIME_DELTA_BASED_RC, - I_FRAME_QP, CONSTANT_QUALITY}, + I_FRAME_QP, CONSTANT_QUALITY, ENH_LAYER_COUNT}, msm_vidc_adjust_bitrate_mode, msm_vidc_set_u32_enum}, {LOSSLESS, ENC, HEVC|HEIC, @@ -375,14 +371,14 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {BITRATE_MODE}, {0}, NULL, msm_vidc_set_constant_quality}, - // TODO: GOP dependencies {GOP_SIZE, ENC, CODECS_ALL, 0, INT_MAX, 1, 2 * DEFAULT_FPS - 1, V4L2_CID_MPEG_VIDEO_GOP_SIZE, HFI_PROP_MAX_GOP_FRAMES, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - NULL, msm_vidc_set_u32}, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, + {ENH_LAYER_COUNT}, + {0}, + msm_vidc_adjust_gop_size, msm_vidc_set_gop_size}, {GOP_CLOSURE, ENC, H264|HEVC, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, @@ -390,6 +386,15 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_CID_MPEG_VIDEO_GOP_CLOSURE, 0}, + {B_FRAME, ENC, H264|HEVC, + 0, 7, 1, 0, + V4L2_CID_MPEG_VIDEO_B_FRAMES, + HFI_PROP_MAX_B_FRAMES, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, + {ENH_LAYER_COUNT}, + {0}, + msm_vidc_adjust_b_frame, msm_vidc_set_u32}, + {BLUR_TYPES, ENC, CODECS_ALL, VIDC_BLUR_NONE, VIDC_BLUR_ADAPTIVE, 1, VIDC_BLUR_NONE, V4L2_CID_MPEG_VIDC_VIDEO_BLUR_TYPES, @@ -662,8 +667,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { HFI_PROP_QP_PACKED, CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, - // TODO: Enable while reveiwing support for layer encoding - {HIER_CODING_TYPE, ENC, HEVC, + {LAYER_TYPE, ENC, HEVC, V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B, V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P, BIT(V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B) | @@ -671,12 +675,9 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P, V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE, HFI_PROP_LAYER_ENCODING_TYPE, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, {0}, - NULL, NULL}, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - /* TODO(AS) - ctrl init failing. Need to fix - {HIER_CODING_TYPE, ENC, H264, + {LAYER_TYPE, ENC, H264, V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_B, V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P, BIT(V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_B) | @@ -684,29 +685,32 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P, V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_TYPE, HFI_PROP_LAYER_ENCODING_TYPE, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - */ + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - //TODO (AS) - {HIER_CODING, ENC, H264, + {LAYER_ENABLE, ENC, H264, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING, HFI_PROP_LAYER_ENCODING_TYPE, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + CAP_FLAG_OUTPUT_PORT}, - // TODO: add relationship with GOP_SIZE in caps - {HIER_CODING_LAYER, ENC, HEVC, + {ENH_LAYER_COUNT, ENC, HEVC, 0, 5, 1, 0, V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER, HFI_PROP_LAYER_COUNT, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, + {BITRATE_MODE}, + {GOP_SIZE, B_FRAME}, + msm_vidc_adjust_layer_count, msm_vidc_set_layer_count_and_type}, - {HIER_CODING_LAYER, ENC, H264, - 0, 6, 1, 0, + {ENH_LAYER_COUNT, ENC, H264, + 0, 5, 1, 0, V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_LAYER, HFI_PROP_LAYER_COUNT, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, + {BITRATE_MODE}, + {GOP_SIZE, B_FRAME}, + msm_vidc_adjust_layer_count, msm_vidc_set_layer_count_and_type}, {L0_BR, ENC, HEVC, 1, 220000000, 1, 20000000, diff --git a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c index 1841b7742e..8cf25feb12 100644 --- a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c @@ -277,13 +277,42 @@ static u32 msm_vidc_encoder_bin_size_iris2(struct msm_vidc_inst *inst) return size; } +static u32 msm_vidc_get_recon_buf_count(struct msm_vidc_inst *inst) +{ + u32 num_buf_recon = 0; + s32 n_bframe, ltr_count, hp_layers = 0, hb_layers = 0; + bool is_hybrid_hp = false; + u32 hfi_codec = 0; + + n_bframe = inst->capabilities->cap[B_FRAME].value; + ltr_count = inst->capabilities->cap[LTR_COUNT].value; + + if (inst->hfi_layer_type == HFI_HIER_B) { + hb_layers = inst->capabilities->cap[ENH_LAYER_COUNT].value + 1; + } else { + hp_layers = inst->capabilities->cap[ENH_LAYER_COUNT].value + 1; + if (inst->hfi_layer_type == HFI_HIER_P_HYBRID_LTR) + is_hybrid_hp = true; + } + + if (inst->codec == MSM_VIDC_H264) + hfi_codec = HFI_CODEC_ENCODE_AVC; + else if (inst->codec == MSM_VIDC_HEVC || inst->codec == MSM_VIDC_HEIC) + hfi_codec = HFI_CODEC_ENCODE_HEVC; + + HFI_IRIS2_ENC_RECON_BUF_COUNT(num_buf_recon, n_bframe, ltr_count, + hp_layers, hb_layers, is_hybrid_hp, hfi_codec); + + return num_buf_recon; +} + static u32 msm_vidc_encoder_comv_size_iris2(struct msm_vidc_inst* inst) { u32 size = 0; u32 width, height, num_recon = 0; struct v4l2_format* f; - if (!inst || !inst->core) { + if (!inst || !inst->core || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); return size; } @@ -292,17 +321,11 @@ static u32 msm_vidc_encoder_comv_size_iris2(struct msm_vidc_inst* inst) width = f->fmt.pix_mp.width; height = f->fmt.pix_mp.height; - if (inst->codec == MSM_VIDC_H264) { - // TODO: replace zeros with appropriate variables - HFI_IRIS2_ENC_RECON_BUF_COUNT(num_recon, 0, 0, 0, 0, 0, - HFI_CODEC_ENCODE_AVC); + num_recon = msm_vidc_get_recon_buf_count(inst); + if (inst->codec == MSM_VIDC_H264) HFI_BUFFER_COMV_H264E(size, width, height, num_recon); - } else if (inst->codec == MSM_VIDC_HEVC || inst->codec == MSM_VIDC_HEIC) { - // TODO: replace zeros with appropriate variables - HFI_IRIS2_ENC_RECON_BUF_COUNT(num_recon, 0, 0, 0, 0, 0, - HFI_CODEC_ENCODE_HEVC); + else if (inst->codec == MSM_VIDC_HEVC || inst->codec == MSM_VIDC_HEIC) HFI_BUFFER_COMV_H265E(size, width, height, num_recon); - } i_vpr_l(inst, "%s: size %d\n", __func__, size); return size; @@ -521,23 +544,12 @@ int msm_buffer_size_iris2(struct msm_vidc_inst *inst, static int msm_buffer_encoder_dpb_count(struct msm_vidc_inst *inst) { - int count = 0; - - if (!inst) { + if (!inst || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); return 0; } - if (inst->codec == MSM_VIDC_H264) { - // TODO: replace zeros with appropriate variables - HFI_IRIS2_ENC_RECON_BUF_COUNT(count, 0, 0, 0, 0, 0, - HFI_CODEC_ENCODE_AVC); - } else if (inst->codec == MSM_VIDC_HEVC || inst->codec == MSM_VIDC_HEIC) { - // TODO: replace zeros with appropriate variables - HFI_IRIS2_ENC_RECON_BUF_COUNT(count, 0, 0, 0, 0, 0, - HFI_CODEC_ENCODE_HEVC); - } - return count; + return msm_vidc_get_recon_buf_count(inst); } static int msm_buffer_decoder_dpb_count(struct msm_vidc_inst *inst) diff --git a/driver/vidc/inc/msm_vidc_control.h b/driver/vidc/inc/msm_vidc_control.h index 0d7fd8a574..125aee6111 100644 --- a/driver/vidc/inc/msm_vidc_control.h +++ b/driver/vidc/inc/msm_vidc_control.h @@ -28,6 +28,9 @@ int msm_vidc_adjust_mark_ltr(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_ir_random(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_delta_based_rc(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_transform_8x8(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_layer_count(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_gop_size(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_b_frame(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_hevc_min_qp(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_hevc_max_qp(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_hevc_frame_qp(void *instance, struct v4l2_ctrl *ctrl); @@ -49,6 +52,10 @@ int msm_vidc_set_chroma_qp_index_offset(void *instance, enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_slice_count(void* instance, enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_layer_count_and_type(void *instance, + enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_gop_size(void *instance, + enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_u32(void *instance, enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_u32_enum(void *instance, diff --git a/driver/vidc/inc/msm_vidc_inst.h b/driver/vidc/inc/msm_vidc_inst.h index 4b8459a6fa..0b2a9e3bf4 100644 --- a/driver/vidc/inc/msm_vidc_inst.h +++ b/driver/vidc/inc/msm_vidc_inst.h @@ -103,6 +103,7 @@ struct msm_vidc_inst { struct msm_vidc_inst_cap_entry children; struct msm_vidc_inst_cap_entry firmware; enum hfi_rate_control hfi_rc_type; + enum hfi_layer_encoding_type hfi_layer_type; bool request; struct vb2_queue vb2q[MAX_PORT]; struct msm_vidc_rectangle crop; diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 5f5d6c44b4..8cdc6e64ef 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -50,6 +50,11 @@ #define BIT_DEPTH_10 (10 << 16 | 10) #define CODED_FRAMES_PROGRESSIVE 0x0 #define CODED_FRAMES_INTERLACE 0x1 +/* TODO: move below macros to waipio.c */ +#define MAX_ENH_LAYER_HB 3 +#define MAX_HEVC_ENH_LAYER_SLIDING_WINDOW 5 +#define MAX_AVC_ENH_LAYER_SLIDING_WINDOW 3 +#define MAX_AVC_ENH_LAYER_HYBRID_HP 5 /* TODO * #define MAX_SUPERFRAME_COUNT 32 @@ -269,6 +274,7 @@ enum msm_vidc_core_capability_type { MAX_MBPS_HQ, MAX_MBPF_B_FRAME, MAX_MBPS_B_FRAME, + MAX_ENH_LAYER_COUNT, NUM_VPP_PIPE, SW_PC, SW_PC_DELAY, @@ -313,7 +319,6 @@ enum msm_vidc_inst_capability_type { OPERATING_RATE, SCALE_X, SCALE_Y, - B_FRAME, MB_CYCLES_VSP, MB_CYCLES_VPP, MB_CYCLES_LP, @@ -339,6 +344,7 @@ enum msm_vidc_inst_capability_type { CONSTANT_QUALITY, GOP_SIZE, GOP_CLOSURE, + B_FRAME, BLUR_TYPES, BLUR_RESOLUTION, CSC, @@ -374,9 +380,9 @@ enum msm_vidc_inst_capability_type { L4_QP, L5_QP, HIER_LAYER_QP, - HIER_CODING_TYPE, - HIER_CODING, - HIER_CODING_LAYER, + LAYER_TYPE, + LAYER_ENABLE, + ENH_LAYER_COUNT, L0_BR, L1_BR, L2_BR, diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index 563e81c311..cd3c8e27d5 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -986,12 +986,23 @@ int msm_venc_process_cmd(struct msm_vidc_inst *inst, u32 cmd) int msm_venc_streamoff_output(struct msm_vidc_inst *inst) { int rc = 0; + struct msm_vidc_core *core; if (!inst || !inst->core || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } + core = inst->core; + if (!core->capabilities) { + i_vpr_e(inst, "%s: core capabilities is NULL\n", __func__); + return -EINVAL; + } + + /* restore LAYER_COUNT max allowed value */ + inst->capabilities->cap[ENH_LAYER_COUNT].max = + core->capabilities[MAX_ENH_LAYER_COUNT].value; + rc = msm_vidc_session_streamoff(inst, OUTPUT_PORT); if (rc) return rc; @@ -1774,6 +1785,7 @@ int msm_venc_inst_init(struct msm_vidc_inst *inst) inst->buffers.input_meta.size = 0; inst->hfi_rc_type = HFI_RC_VBR_CFR; + inst->hfi_layer_type = HFI_HIER_P_SLIDING_WINDOW; rc = msm_venc_codec_change(inst, inst->fmts[OUTPUT_PORT].fmt.pix_mp.pixelformat); diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 5b32defb72..4c6505c662 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -18,6 +18,8 @@ static bool is_priv_ctrl(u32 id) { + bool private = false; + if (IS_PRIV_CTRL(id)) return true; @@ -25,8 +27,21 @@ static bool is_priv_ctrl(u32 id) * Treat below standard controls as private because * we have added custom values to the controls */ + switch (id) { + /* + * TODO: V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_TYPE is + * std ctrl. But needs some fixes in v4l2-ctrls.c. Hence, + * make this as private ctrl for time being + */ + case V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_TYPE: + private = true; + break; + default: + private = false; + break; + } - return false; + return private; } static bool is_meta_ctrl(u32 id) @@ -75,6 +90,12 @@ static const char *const mpeg_video_blur_types[] = { NULL, }; +static const char *const mpeg_video_avc_coding_layer[] = { + "B", + "P", + NULL, +}; + static const char *const roi_map_type[] = { "None", "2-bit", @@ -112,6 +133,8 @@ static const char * const * msm_vidc_get_qmenu_type( return mpeg_video_stream_format; case V4L2_CID_MPEG_VIDC_VIDEO_BLUR_TYPES: return mpeg_video_blur_types; + case V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_TYPE: + return mpeg_video_avc_coding_layer; default: i_vpr_e(inst, "%s: No available qmenu for ctrl %#x\n", __func__, control_id); @@ -257,10 +280,17 @@ static int msm_vidc_get_parent_value(struct msm_vidc_inst* inst, int rc = 0; if (is_parent_available(inst, cap, parent)) { - if (parent == BITRATE_MODE) + switch (parent) { + case BITRATE_MODE: *value = inst->hfi_rc_type; - else + break; + case LAYER_TYPE: + *value = inst->hfi_layer_type; + break; + default: *value = inst->capabilities->cap[parent].value; + break; + } } else { i_vpr_e(inst, "%s: missing parent %d for cap %d, please correct database\n", @@ -994,6 +1024,219 @@ int msm_vidc_adjust_transform_8x8(void *instance, struct v4l2_ctrl *ctrl) return 0; } +static int msm_vidc_adjust_static_layer_count_and_type(struct msm_vidc_inst *inst, + s32 layer_count) +{ + bool hb_requested = false; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (!layer_count) { + i_vpr_h(inst, "client not enabled layer encoding\n"); + goto exit; + } + + if (inst->hfi_rc_type == HFI_RC_CQ) { + i_vpr_h(inst, "rc type is CQ, disabling layer encoding\n"); + layer_count = 0; + goto exit; + } + + if (inst->codec == MSM_VIDC_H264) { + if (!inst->capabilities->cap[LAYER_ENABLE].value) { + layer_count = 0; + goto exit; + } + + hb_requested = (inst->capabilities->cap[LAYER_TYPE].value == + V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_B) ? + true : false; + } else if (inst->codec == MSM_VIDC_HEVC) { + hb_requested = (inst->capabilities->cap[LAYER_TYPE].value == + V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B) ? + true : false; + } + + if (hb_requested && inst->hfi_rc_type != HFI_RC_VBR_CFR) { + i_vpr_h(inst, + "%s: HB layer encoding is supported for VBR rc only\n", + __func__); + layer_count = 0; + goto exit; + } + + /* decide hfi layer type */ + if (hb_requested) { + inst->hfi_layer_type = HFI_HIER_B; + } else { + /* HP requested */ + inst->hfi_layer_type = HFI_HIER_P_SLIDING_WINDOW; + if (inst->codec == MSM_VIDC_H264 && + inst->hfi_rc_type == HFI_RC_VBR_CFR) + inst->hfi_layer_type = HFI_HIER_P_HYBRID_LTR; + } + + /* sanitize layer count based on layer type and codec */ + if (inst->hfi_layer_type == HFI_HIER_B) { + if (layer_count > MAX_ENH_LAYER_HB) + layer_count = MAX_ENH_LAYER_HB; + } else if (inst->hfi_layer_type == HFI_HIER_P_HYBRID_LTR) { + if (layer_count > MAX_AVC_ENH_LAYER_HYBRID_HP) + layer_count = MAX_AVC_ENH_LAYER_HYBRID_HP; + } else if (inst->hfi_layer_type == HFI_HIER_P_SLIDING_WINDOW) { + if (inst->codec == MSM_VIDC_H264) { + if (layer_count > MAX_AVC_ENH_LAYER_SLIDING_WINDOW) + layer_count = MAX_AVC_ENH_LAYER_SLIDING_WINDOW; + } else { + if (layer_count > MAX_HEVC_ENH_LAYER_SLIDING_WINDOW) + layer_count = MAX_HEVC_ENH_LAYER_SLIDING_WINDOW; + } + } + +exit: + msm_vidc_update_cap_value(inst, ENH_LAYER_COUNT, + layer_count, __func__); + inst->capabilities->cap[ENH_LAYER_COUNT].max = layer_count; + return 0; +} + +int msm_vidc_adjust_layer_count(void *instance, struct v4l2_ctrl *ctrl) +{ + int rc = 0; + struct msm_vidc_inst_capability *capability; + s32 client_layer_count; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + client_layer_count = ctrl ? ctrl->val : + capability->cap[ENH_LAYER_COUNT].value; + + if (!is_parent_available(inst, ENH_LAYER_COUNT, BITRATE_MODE)) { + i_vpr_e(inst, "%s: missing parent %d in database", + __func__, BITRATE_MODE); + return -EINVAL; + } + + if (!inst->vb2q[OUTPUT_PORT].streaming) { + rc = msm_vidc_adjust_static_layer_count_and_type(inst, + client_layer_count); + if (rc) + goto exit; + } else { + if (inst->hfi_layer_type == HFI_HIER_P_HYBRID_LTR || + inst->hfi_layer_type == HFI_HIER_P_SLIDING_WINDOW) { + /* dynamic layer count change is only supported for HP */ + if (client_layer_count > + inst->capabilities->cap[ENH_LAYER_COUNT].max) + client_layer_count = + inst->capabilities->cap[ENH_LAYER_COUNT].max; + + msm_vidc_update_cap_value(inst, ENH_LAYER_COUNT, + client_layer_count, __func__); + } + } + +exit: + return rc; +} + +/* + * 1. GOP calibration is only done for HP layer encoding type. + * 2. Dynamic GOP size should not exceed static GOP size + * 3. For HB case, or when layer encoding is not enabled, + * client set GOP size is directly set to FW. + */ +int msm_vidc_adjust_gop_size(void *instance, struct v4l2_ctrl *ctrl) +{ + struct msm_vidc_inst_capability *capability; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; + s32 adjusted_value, enh_layer_count = -1; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + adjusted_value = ctrl ? ctrl->val : capability->cap[GOP_SIZE].value; + + if (msm_vidc_get_parent_value(inst, GOP_SIZE, + ENH_LAYER_COUNT, &enh_layer_count, __func__)) + return -EINVAL; + + if (!enh_layer_count) + goto exit; + + /* calibrate GOP size */ + if (inst->hfi_layer_type == HFI_HIER_P_SLIDING_WINDOW || + inst->hfi_layer_type == HFI_HIER_P_HYBRID_LTR) { + /* + * Layer encoding needs GOP size to be multiple of subgop size + * And subgop size is 2 ^ number of enhancement layers. + */ + u32 min_gop_size; + u32 num_subgops; + + /* v4l2 layer count is the number of enhancement layers */ + min_gop_size = 1 << enh_layer_count; + num_subgops = (adjusted_value + (min_gop_size >> 1)) / + min_gop_size; + if (num_subgops) + adjusted_value = num_subgops * min_gop_size; + else + adjusted_value = min_gop_size; + } + +exit: + msm_vidc_update_cap_value(inst, GOP_SIZE, adjusted_value, __func__); + return 0; +} + +int msm_vidc_adjust_b_frame(void *instance, struct v4l2_ctrl *ctrl) +{ + struct msm_vidc_inst_capability *capability; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; + s32 adjusted_value, enh_layer_count = -1; + const u32 max_bframe_size = 7; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + if (inst->vb2q[OUTPUT_PORT].streaming) + return 0; + + adjusted_value = ctrl ? ctrl->val : capability->cap[B_FRAME].value; + + if (msm_vidc_get_parent_value(inst, B_FRAME, + ENH_LAYER_COUNT, &enh_layer_count, __func__)) + return -EINVAL; + + if (!enh_layer_count || inst->hfi_layer_type != HFI_HIER_B) { + adjusted_value = 0; + goto exit; + } + + adjusted_value = (2 << enh_layer_count) - 1; + /* Allowed Bframe values are 0, 1, 3, 7 */ + if (adjusted_value > max_bframe_size) + adjusted_value = max_bframe_size; + +exit: + msm_vidc_update_cap_value(inst, B_FRAME, adjusted_value, __func__); + return 0; +} + int msm_vidc_adjust_hevc_min_qp(void *instance, struct v4l2_ctrl *ctrl) { int rc = 0; @@ -1493,6 +1736,79 @@ int msm_vidc_set_nal_length(void* instance, return rc; } +int msm_vidc_set_layer_count_and_type(void *instance, + enum msm_vidc_inst_capability_type cap_id) +{ + int rc = 0; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; + u32 hfi_layer_count, hfi_layer_type = 0; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (!inst->vb2q[OUTPUT_PORT].streaming) { + /* set layer type */ + hfi_layer_type = inst->hfi_layer_type; + cap_id = LAYER_TYPE; + + rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32_ENUM, + &hfi_layer_type, sizeof(u32), __func__); + if (rc) + goto exit; + } else { + if (inst->hfi_layer_type == HFI_HIER_B) { + i_vpr_l(inst, + "%s: HB dyn layers change is not supported\n", + __func__); + return 0; + } + } + + /* set layer count */ + cap_id = ENH_LAYER_COUNT; + /* hfi baselayer starts from 1 */ + hfi_layer_count = inst->capabilities->cap[ENH_LAYER_COUNT].value + 1; + + rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32, + &hfi_layer_count, sizeof(u32), __func__); + if (rc) + goto exit; + +exit: + return rc; +} + +int msm_vidc_set_gop_size(void *instance, + enum msm_vidc_inst_capability_type cap_id) +{ + int rc = 0; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; + u32 hfi_value; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (inst->vb2q[OUTPUT_PORT].streaming) { + if (inst->hfi_layer_type == HFI_HIER_B) { + i_vpr_l(inst, + "%s: HB dyn GOP setting is not supported\n", + __func__); + return 0; + } + } + + hfi_value = inst->capabilities->cap[GOP_SIZE].value; + + rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32, + &hfi_value, sizeof(u32), __func__); + + return rc; +} + /* TODO int msm_vidc_set_flip(void *instance, enum msm_vidc_inst_capability_type cap_id) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index cfc670482d..c99ef91f91 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -62,7 +62,6 @@ static const struct msm_vidc_cap_name cap_name_arr[] = { {OPERATING_RATE, "OPERATING_RATE" }, {SCALE_X, "SCALE_X" }, {SCALE_Y, "SCALE_Y" }, - {B_FRAME, "B_FRAME" }, {MB_CYCLES_VSP, "MB_CYCLES_VSP" }, {MB_CYCLES_VPP, "MB_CYCLES_VPP" }, {MB_CYCLES_LP, "MB_CYCLES_LP" }, @@ -88,6 +87,7 @@ static const struct msm_vidc_cap_name cap_name_arr[] = { {CONSTANT_QUALITY, "CONSTANT_QUALITY" }, {GOP_SIZE, "GOP_SIZE" }, {GOP_CLOSURE, "GOP_CLOSURE" }, + {B_FRAME, "B_FRAME" }, {BLUR_TYPES, "BLUR_TYPES" }, {BLUR_RESOLUTION, "BLUR_RESOLUTION" }, {CSC, "CSC" }, @@ -123,9 +123,9 @@ static const struct msm_vidc_cap_name cap_name_arr[] = { {L4_QP, "L4_QP" }, {L5_QP, "L5_QP" }, {HIER_LAYER_QP, "HIER_LAYER_QP" }, - {HIER_CODING_TYPE, "HIER_CODING_TYPE" }, - {HIER_CODING, "HIER_CODING" }, - {HIER_CODING_LAYER, "HIER_CODING_LAYER" }, + {LAYER_TYPE, "LAYER_TYPE" }, + {LAYER_ENABLE, "LAYER_ENABLE" }, + {ENH_LAYER_COUNT, "ENH_LAYER_COUNT" }, {L0_BR, "L0_BR" }, {L1_BR, "L1_BR" }, {L2_BR, "L2_BR" }, @@ -1063,6 +1063,7 @@ bool msm_vidc_allow_s_ctrl(struct msm_vidc_inst *inst, u32 id) case V4L2_CID_VFLIP: case V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP: case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER: + case V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_LAYER: case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L0_BR: case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L1_BR: case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L2_BR: From 47c0c2603d6204c5c59cc775b0f239db8a2e0492 Mon Sep 17 00:00:00 2001 From: Maheshwar Ajja Date: Fri, 19 Mar 2021 13:50:43 -0700 Subject: [PATCH 0185/1061] video: driver: add resume before unload firmware Add resume function call to power on the device before unloading the firmware. Change-Id: Ic2e4e74d01f9e5e61353a0ff07955ebd1358efc4 Signed-off-by: Maheshwar Ajja --- driver/vidc/src/venus_hfi.c | 1 + 1 file changed, 1 insertion(+) diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index 8c1dd7d633..ec8378a7ee 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -2737,6 +2737,7 @@ int venus_hfi_core_deinit(struct msm_vidc_core *core) } d_vpr_h("%s(): core %pK\n", __func__, core); __strict_check(core); + __resume(core); __flush_debug_queue(core, core->packet, core->packet_size); __disable_subcaches(core); __interface_queues_deinit(core); From 4ef2b8899d7e493e4115892a2d0e14b7e9a4d98f Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Fri, 19 Mar 2021 11:10:08 -0700 Subject: [PATCH 0186/1061] video: driver: Block HB layer encoding type Allow only HP layer encoding type until fw fatal error is resolved Change-Id: Id35e78bbb5feaab0c9d4ad94c94d5b7e47733b69 Signed-off-by: Akshata Sahukar --- driver/platform/waipio/src/msm_vidc_waipio.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 8fd04dcd2e..392c30b1eb 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -667,10 +667,10 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { HFI_PROP_QP_PACKED, CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + /* TODO: Allow only HP until fw fatal error for HB type is resolved */ {LAYER_TYPE, ENC, HEVC, - V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B, V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P, - BIT(V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B) | + V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P, BIT(V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P), V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P, V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE, @@ -678,9 +678,8 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, {LAYER_TYPE, ENC, H264, - V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_B, V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P, - BIT(V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_B) | + V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P, BIT(V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P), V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P, V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_TYPE, From 007b8136fbb3b0137428b05648a0b0dd44738a5f Mon Sep 17 00:00:00 2001 From: Maheshwar Ajja Date: Thu, 18 Mar 2021 19:17:00 -0700 Subject: [PATCH 0187/1061] video: driver: add qti dma-mapping header Use qti dma mapping header file to use qti specific dma attributes. Change-Id: If755c0df22a59af764d2b55a236dfe18bc265f54 Signed-off-by: Maheshwar Ajja --- driver/vidc/src/msm_vidc_memory.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/driver/vidc/src/msm_vidc_memory.c b/driver/vidc/src/msm_vidc_memory.c index fb26cb3d9c..3316eb46d5 100644 --- a/driver/vidc/src/msm_vidc_memory.c +++ b/driver/vidc/src/msm_vidc_memory.c @@ -5,6 +5,8 @@ #include #include +#include +#include #include #include From 7a9d3462ddb4587303dc34c6bd481690cae99721 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Fri, 19 Mar 2021 16:18:42 -0700 Subject: [PATCH 0188/1061] video: driver: fix colorspace subscribe params initialization Initialize subscribe params for colorspace using OUTPUT port params and use right mapper function Change-Id: Ie6be50c1de20e351bad0fc4b015bcc4d72d1711b Signed-off-by: Akshata Sahukar --- driver/vidc/inc/msm_vidc_driver.h | 12 ++++----- driver/vidc/src/msm_vdec.c | 30 +++++++++++----------- driver/vidc/src/msm_venc.c | 10 ++++---- driver/vidc/src/msm_vidc_driver.c | 41 +++++++++++++++++-------------- 4 files changed, 49 insertions(+), 44 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index bb9a36d5c5..fa70bdba2d 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -220,17 +220,17 @@ enum msm_vidc_colorformat_type v4l2_colorformat_to_driver(u32 colorformat, u32 v4l2_colorformat_from_driver(enum msm_vidc_colorformat_type colorformat, const char *func); u32 v4l2_color_primaries_to_driver(struct msm_vidc_inst *inst, - u32 v4l2_primaries); + u32 v4l2_primaries, const char *func); u32 v4l2_color_primaries_from_driver(struct msm_vidc_inst *inst, - u32 vidc_color_primaries); + u32 vidc_color_primaries, const char *func); u32 v4l2_transfer_char_to_driver(struct msm_vidc_inst *inst, - u32 v4l2_transfer_char); + u32 v4l2_transfer_char, const char *func); u32 v4l2_transfer_char_from_driver(struct msm_vidc_inst *inst, - u32 vidc_transfer_char); + u32 vidc_transfer_char, const char *func); u32 v4l2_matrix_coeff_to_driver(struct msm_vidc_inst *inst, - u32 v4l2_matrix_coeff); + u32 v4l2_matrix_coeff, const char *func); u32 v4l2_matrix_coeff_from_driver(struct msm_vidc_inst *inst, - u32 vidc_matrix_coeff); + u32 vidc_matrix_coeff, const char *func); int v4l2_type_to_driver_port(struct msm_vidc_inst *inst, u32 type, const char *func); const char *state_name(enum msm_vidc_inst_state state); diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 7f2e55e6d0..07bb5ce85e 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -377,16 +377,16 @@ static int msm_vdec_set_colorspace(struct msm_vidc_inst *inst, return 0; if (inst->fmts[port].fmt.pix_mp.colorspace != V4L2_COLORSPACE_DEFAULT || - inst->fmts[port].fmt.pix_mp.ycbcr_enc != V4L2_XFER_FUNC_DEFAULT || - inst->fmts[port].fmt.pix_mp.xfer_func != V4L2_YCBCR_ENC_DEFAULT) { + inst->fmts[port].fmt.pix_mp.ycbcr_enc != V4L2_YCBCR_ENC_DEFAULT || + inst->fmts[port].fmt.pix_mp.xfer_func != V4L2_XFER_FUNC_DEFAULT) { colour_description_present_flag = 1; video_signal_type_present_flag = 1; primaries = v4l2_color_primaries_to_driver(inst, - inst->fmts[port].fmt.pix_mp.colorspace); + inst->fmts[port].fmt.pix_mp.colorspace, __func__); matrix_coeff = v4l2_matrix_coeff_to_driver(inst, - inst->fmts[port].fmt.pix_mp.ycbcr_enc); + inst->fmts[port].fmt.pix_mp.ycbcr_enc, __func__); transfer_char = v4l2_transfer_char_to_driver(inst, - inst->fmts[port].fmt.pix_mp.xfer_func); + inst->fmts[port].fmt.pix_mp.xfer_func, __func__); } if (inst->fmts[port].fmt.pix_mp.quantization != @@ -1235,13 +1235,13 @@ int msm_vdec_init_input_subcr_params(struct msm_vidc_inst *inst) subsc_params->fw_min_count = inst->buffers.output.min_count; - primaries = v4l2_color_primaries_from_driver(inst, - inst->fmts[INPUT_PORT].fmt.pix_mp.colorspace); - matrix_coeff = v4l2_matrix_coeff_from_driver(inst, - inst->fmts[INPUT_PORT].fmt.pix_mp.ycbcr_enc); - transfer_char = v4l2_transfer_char_from_driver(inst, - inst->fmts[INPUT_PORT].fmt.pix_mp.xfer_func); - full_range = inst->fmts[INPUT_PORT].fmt.pix_mp.quantization == + primaries = v4l2_color_primaries_to_driver(inst, + inst->fmts[OUTPUT_PORT].fmt.pix_mp.colorspace, __func__); + matrix_coeff = v4l2_matrix_coeff_to_driver(inst, + inst->fmts[OUTPUT_PORT].fmt.pix_mp.ycbcr_enc, __func__); + transfer_char = v4l2_transfer_char_to_driver(inst, + inst->fmts[OUTPUT_PORT].fmt.pix_mp.xfer_func, __func__); + full_range = inst->fmts[OUTPUT_PORT].fmt.pix_mp.quantization == V4L2_QUANTIZATION_FULL_RANGE ? 1 : 0; subsc_params->color_info = (matrix_coeff & 0xFF) | @@ -1324,11 +1324,11 @@ static int msm_vdec_read_input_subcr_params(struct msm_vidc_inst *inst) V4L2_QUANTIZATION_LIM_RANGE; if (colour_description_present_flag) { inst->fmts[OUTPUT_PORT].fmt.pix_mp.colorspace = - v4l2_color_primaries_from_driver(inst, primaries); + v4l2_color_primaries_from_driver(inst, primaries, __func__); inst->fmts[OUTPUT_PORT].fmt.pix_mp.xfer_func = - v4l2_transfer_char_from_driver(inst, transfer_char); + v4l2_transfer_char_from_driver(inst, transfer_char, __func__); inst->fmts[OUTPUT_PORT].fmt.pix_mp.ycbcr_enc = - v4l2_matrix_coeff_from_driver(inst, matrix_coeff); + v4l2_matrix_coeff_from_driver(inst, matrix_coeff, __func__); } else { i_vpr_h(inst, "%s: color description flag is not present\n", diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index cd3c8e27d5..c0e82b9980 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -304,16 +304,16 @@ static int msm_venc_set_colorspace(struct msm_vidc_inst* inst, } if (inst->fmts[port].fmt.pix_mp.colorspace != V4L2_COLORSPACE_DEFAULT || - inst->fmts[port].fmt.pix_mp.ycbcr_enc != V4L2_XFER_FUNC_DEFAULT || - inst->fmts[port].fmt.pix_mp.xfer_func != V4L2_YCBCR_ENC_DEFAULT) { + inst->fmts[port].fmt.pix_mp.ycbcr_enc != V4L2_YCBCR_ENC_DEFAULT || + inst->fmts[port].fmt.pix_mp.xfer_func != V4L2_XFER_FUNC_DEFAULT) { colour_description_present_flag = 1; video_signal_type_present_flag = 1; primaries = v4l2_color_primaries_to_driver(inst, - inst->fmts[port].fmt.pix_mp.colorspace); + inst->fmts[port].fmt.pix_mp.colorspace, __func__); matrix_coeff = v4l2_matrix_coeff_to_driver(inst, - inst->fmts[port].fmt.pix_mp.ycbcr_enc); + inst->fmts[port].fmt.pix_mp.ycbcr_enc, __func__); transfer_char = v4l2_transfer_char_to_driver(inst, - inst->fmts[port].fmt.pix_mp.xfer_func); + inst->fmts[port].fmt.pix_mp.xfer_func, __func__); } if (inst->fmts[port].fmt.pix_mp.quantization != diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index c99ef91f91..78e5f0c2f7 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -469,7 +469,7 @@ u32 v4l2_colorformat_from_driver(enum msm_vidc_colorformat_type colorformat, } u32 v4l2_color_primaries_to_driver(struct msm_vidc_inst *inst, - u32 v4l2_primaries) + u32 v4l2_primaries, const char *func) { u32 vidc_color_primaries = MSM_VIDC_PRIMARIES_RESERVED; @@ -508,8 +508,8 @@ u32 v4l2_color_primaries_to_driver(struct msm_vidc_inst *inst, vidc_color_primaries = MSM_VIDC_PRIMARIES_SMPTE_EBU_TECH; break; default: - i_vpr_e(inst, "%s: invalid color primaries %d\n", - __func__, v4l2_primaries); + i_vpr_e(inst, "%s: invalid v4l2 color primaries %d\n", + func, v4l2_primaries); break; } @@ -517,7 +517,7 @@ u32 v4l2_color_primaries_to_driver(struct msm_vidc_inst *inst, } u32 v4l2_color_primaries_from_driver(struct msm_vidc_inst *inst, - u32 vidc_color_primaries) + u32 vidc_color_primaries, const char *func) { u32 v4l2_primaries = V4L2_COLORSPACE_DEFAULT; @@ -557,8 +557,7 @@ u32 v4l2_color_primaries_from_driver(struct msm_vidc_inst *inst, break; default: i_vpr_e(inst, "%s: invalid hfi color primaries %d\n", - __func__, vidc_color_primaries); - v4l2_primaries = V4L2_COLORSPACE_DEFAULT; + func, vidc_color_primaries); break; } @@ -566,7 +565,7 @@ u32 v4l2_color_primaries_from_driver(struct msm_vidc_inst *inst, } u32 v4l2_transfer_char_to_driver(struct msm_vidc_inst *inst, - u32 v4l2_transfer_char) + u32 v4l2_transfer_char, const char *func) { u32 vidc_transfer_char = MSM_VIDC_TRANSFER_RESERVED; @@ -614,8 +613,8 @@ u32 v4l2_transfer_char_to_driver(struct msm_vidc_inst *inst, vidc_transfer_char = MSM_VIDC_TRANSFER_BT2100_2_HLG; break; default: - i_vpr_e(inst, "%s: invalid transfer char %d\n", - __func__, v4l2_transfer_char); + i_vpr_e(inst, "%s: invalid v4l2 transfer char %d\n", + func, v4l2_transfer_char); break; } @@ -623,7 +622,7 @@ u32 v4l2_transfer_char_to_driver(struct msm_vidc_inst *inst, } u32 v4l2_transfer_char_from_driver(struct msm_vidc_inst *inst, - u32 vidc_transfer_char) + u32 vidc_transfer_char, const char *func) { u32 v4l2_transfer_char = V4L2_XFER_FUNC_DEFAULT; @@ -672,8 +671,8 @@ u32 v4l2_transfer_char_from_driver(struct msm_vidc_inst *inst, v4l2_transfer_char = V4L2_XFER_FUNC_VIDC_HLG; break; default: - i_vpr_e(inst, "%s: invalid transfer char %d\n", - __func__, vidc_transfer_char); + i_vpr_e(inst, "%s: invalid hfi transfer char %d\n", + func, vidc_transfer_char); break; } @@ -681,11 +680,14 @@ u32 v4l2_transfer_char_from_driver(struct msm_vidc_inst *inst, } u32 v4l2_matrix_coeff_to_driver(struct msm_vidc_inst *inst, - u32 v4l2_matrix_coeff) + u32 v4l2_matrix_coeff, const char *func) { u32 vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_RESERVED; switch(v4l2_matrix_coeff) { + case V4L2_YCBCR_ENC_DEFAULT: + vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_RESERVED; + break; case V4L2_YCBCR_VIDC_SRGB_OR_SMPTE_ST428: vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_SRGB_SMPTE_ST428_1; break; @@ -712,8 +714,8 @@ u32 v4l2_matrix_coeff_to_driver(struct msm_vidc_inst *inst, vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_BT2020_CONSTANT; break; default: - i_vpr_e(inst, "%s: invalid matrix coeff %d\n", - __func__, v4l2_matrix_coeff); + i_vpr_e(inst, "%s: invalid v4l2 matrix coeff %d\n", + func, v4l2_matrix_coeff); break; } @@ -721,7 +723,7 @@ u32 v4l2_matrix_coeff_to_driver(struct msm_vidc_inst *inst, } u32 v4l2_matrix_coeff_from_driver(struct msm_vidc_inst *inst, - u32 vidc_matrix_coeff) + u32 vidc_matrix_coeff, const char *func) { u32 v4l2_matrix_coeff = V4L2_YCBCR_ENC_DEFAULT; @@ -732,6 +734,9 @@ u32 v4l2_matrix_coeff_from_driver(struct msm_vidc_inst *inst, case MSM_VIDC_MATRIX_COEFF_BT709: v4l2_matrix_coeff = V4L2_YCBCR_ENC_709; break; + case MSM_VIDC_MATRIX_COEFF_UNSPECIFIED: + v4l2_matrix_coeff = V4L2_YCBCR_ENC_DEFAULT; + break; case MSM_VIDC_MATRIX_COEFF_FCC_TITLE_47: v4l2_matrix_coeff = V4L2_YCBCR_VIDC_FCC47_73_682; break; @@ -751,8 +756,8 @@ u32 v4l2_matrix_coeff_from_driver(struct msm_vidc_inst *inst, v4l2_matrix_coeff = V4L2_YCBCR_ENC_BT2020_CONST_LUM; break; default: - i_vpr_e(inst, "%s: invalid matrix coeff %d\n", - __func__, vidc_matrix_coeff); + i_vpr_e(inst, "%s: invalid hfi matrix coeff %d\n", + func, vidc_matrix_coeff); break; } From d238d03c1bfc65629234215ce47c9c7aa92bd1aa Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Thu, 18 Mar 2021 23:39:23 +0530 Subject: [PATCH 0189/1061] video: driver: refine image session handling Amended below logics for image session. - set constant quality - set tier: V4L2_MPEG_VIDEO_HEVC_TIER_MAIN - frame_rate: 1 - enable subframe metadata - stage: - image encode: 2 stage - image decode: 1 stage - pipe: 4(work_route) - power mode: max_quality. Change-Id: I67acd5284910e7cbe26446b5dfc526d002b98981 Signed-off-by: Govindaraj Rajagopal --- driver/platform/waipio/src/msm_vidc_waipio.c | 42 +++++++- .../variant/iris2/src/msm_vidc_buffer_iris2.c | 97 +++++++------------ driver/variant/iris2/src/msm_vidc_iris2.c | 21 +++- driver/vidc/inc/msm_vidc_internal.h | 1 + driver/vidc/src/msm_venc.c | 7 +- driver/vidc/src/msm_vidc_buffer.c | 3 + driver/vidc/src/msm_vidc_control.c | 62 ++++++++++-- driver/vidc/src/msm_vidc_driver.c | 17 ++-- driver/vidc/src/venus_hfi_response.c | 24 ++++- 9 files changed, 187 insertions(+), 87 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 392c30b1eb..83dd0e9622 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -305,7 +305,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { /* Enc: Keeping CABAC and CAVLC as same bitrate. * Dec: there's no use of Bitrate cap */ - {BIT_RATE, ENC, CODECS_ALL, + {BIT_RATE, ENC, H264|HEVC, 1, 220000000, 1, 20000000, V4L2_CID_MPEG_VIDEO_BITRATE, HFI_PROP_TOTAL_BITRATE, @@ -363,7 +363,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 1, V4L2_MPEG_MSM_VIDC_ENABLE, V4L2_CID_MPEG_VIDEO_FRAME_RC_ENABLE}, - {CONSTANT_QUALITY, ENC, HEVC|HEIC, + {CONSTANT_QUALITY, ENC, HEVC, 1, MAX_CONSTANT_QUALITY, 1, 90, V4L2_CID_MPEG_VIDEO_CONSTANT_QUALITY, HFI_PROP_CONSTANT_QUALITY, @@ -884,7 +884,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { * go/videogki */ - {HEVC_TIER, ENC|DEC, HEVC|HEIC, + {HEVC_TIER, ENC|DEC, HEVC, V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, V4L2_MPEG_VIDEO_HEVC_TIER_HIGH, BIT(V4L2_MPEG_VIDEO_HEVC_TIER_MAIN) | @@ -1230,6 +1230,13 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, {BITRATE_MODE}, {0}, msm_vidc_adjust_delta_based_rc, msm_vidc_set_u32}, + {CONSTANT_QUALITY, ENC, HEIC, + 1, MAX_CONSTANT_QUALITY, 1, 100, + V4L2_CID_MPEG_VIDEO_CONSTANT_QUALITY, + HFI_PROP_CONSTANT_QUALITY, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, + {BITRATE_MODE}, {0}, + NULL, msm_vidc_set_constant_quality}, {GRID, ENC, HEIC, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_ENABLE, @@ -1255,8 +1262,9 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { NULL, msm_vidc_set_u32}, {PROFILE, ENC|DEC, HEIC, V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE, - V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE, - BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE), + V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10, + BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE) | + BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10), V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE, V4L2_CID_MPEG_VIDEO_HEVC_PROFILE, HFI_PROP_PROFILE, @@ -1264,6 +1272,30 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {PIX_FMTS}, {0}, msm_vidc_adjust_profile, msm_vidc_set_u32_enum}, + {HEVC_TIER, ENC|DEC, HEIC, + V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, + V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, + BIT(V4L2_MPEG_VIDEO_HEVC_TIER_MAIN), + V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, + V4L2_CID_MPEG_VIDEO_HEVC_TIER, + HFI_PROP_TIER, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {0}, + {0}, + NULL, msm_vidc_set_u32_enum}, + {FRAME_RATE, ENC, HEIC, + (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), + 1, (MINIMUM_FPS << 16), + 0, + HFI_PROP_FRAME_RATE, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + {0}, {0}, + NULL, msm_vidc_set_q16}, + {META_SUBFRAME_OUTPUT, ENC, HEIC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_SUBFRAME_OUTPUT, + HFI_PROP_SUBFRAME_OUTPUT}, }; /* diff --git a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c index 8cf25feb12..c5df3607c6 100644 --- a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c @@ -542,17 +542,7 @@ int msm_buffer_size_iris2(struct msm_vidc_inst *inst, return size; } -static int msm_buffer_encoder_dpb_count(struct msm_vidc_inst *inst) -{ - if (!inst || !inst->capabilities) { - d_vpr_e("%s: invalid params\n", __func__); - return 0; - } - - return msm_vidc_get_recon_buf_count(inst); -} - -static int msm_buffer_decoder_dpb_count(struct msm_vidc_inst *inst) +static int msm_buffer_dpb_count(struct msm_vidc_inst *inst) { int count = 0; u32 color_fmt; @@ -562,11 +552,17 @@ static int msm_buffer_decoder_dpb_count(struct msm_vidc_inst *inst) return 0; } - color_fmt = inst->capabilities->cap[PIX_FMTS].value; - if (is_linear_colorformat(color_fmt)) - count = inst->buffers.output.min_count; + /* decoder dpb buffer count */ + if (is_decode_session(inst)) { + color_fmt = inst->capabilities->cap[PIX_FMTS].value; + if (is_linear_colorformat(color_fmt)) + count = inst->buffers.output.min_count; - return count; + return count; + } + + /* encoder dpb buffer count */ + return msm_vidc_get_recon_buf_count(inst); } int msm_buffer_min_count_iris2(struct msm_vidc_inst *inst, @@ -579,54 +575,32 @@ int msm_buffer_min_count_iris2(struct msm_vidc_inst *inst, return 0; } - if (is_decode_session(inst)) { - switch (buffer_type) { - case MSM_VIDC_BUF_INPUT: - case MSM_VIDC_BUF_INPUT_META: - count = msm_vidc_input_min_count(inst); - break; - case MSM_VIDC_BUF_OUTPUT: - case MSM_VIDC_BUF_OUTPUT_META: - count = msm_vidc_output_min_count(inst); - break; - case MSM_VIDC_BUF_BIN: - case MSM_VIDC_BUF_COMV: - case MSM_VIDC_BUF_NON_COMV: - case MSM_VIDC_BUF_LINE: - case MSM_VIDC_BUF_PERSIST: - count = msm_vidc_internal_buffer_count(inst, buffer_type); - break; - case MSM_VIDC_BUF_DPB: - count = msm_buffer_decoder_dpb_count(inst); - break; - default: - break; - } - } else if (is_encode_session(inst)) { - switch (buffer_type) { - case MSM_VIDC_BUF_INPUT: - case MSM_VIDC_BUF_INPUT_META: - count = msm_vidc_input_min_count(inst); - break; - case MSM_VIDC_BUF_OUTPUT: - case MSM_VIDC_BUF_OUTPUT_META: - count = msm_vidc_output_min_count(inst); - break; - case MSM_VIDC_BUF_BIN: - case MSM_VIDC_BUF_COMV: - case MSM_VIDC_BUF_NON_COMV: - case MSM_VIDC_BUF_LINE: - case MSM_VIDC_BUF_ARP: - case MSM_VIDC_BUF_VPSS: - count = 1; - break; - case MSM_VIDC_BUF_DPB: - count = msm_buffer_encoder_dpb_count(inst); - default: - break; - } + switch (buffer_type) { + case MSM_VIDC_BUF_INPUT: + case MSM_VIDC_BUF_INPUT_META: + count = msm_vidc_input_min_count(inst); + break; + case MSM_VIDC_BUF_OUTPUT: + case MSM_VIDC_BUF_OUTPUT_META: + count = msm_vidc_output_min_count(inst); + break; + case MSM_VIDC_BUF_BIN: + case MSM_VIDC_BUF_COMV: + case MSM_VIDC_BUF_NON_COMV: + case MSM_VIDC_BUF_LINE: + case MSM_VIDC_BUF_PERSIST: + case MSM_VIDC_BUF_ARP: + case MSM_VIDC_BUF_VPSS: + count = msm_vidc_internal_buffer_count(inst, buffer_type); + break; + case MSM_VIDC_BUF_DPB: + count = msm_buffer_dpb_count(inst); + break; + default: + break; } + i_vpr_l(inst, "%s: type %u, count %u\n", __func__, buffer_type, count); return count; } @@ -653,5 +627,6 @@ int msm_buffer_extra_count_iris2(struct msm_vidc_inst *inst, break; } + i_vpr_l(inst, "%s: type %u, count %u\n", __func__, buffer_type, count); return count; } diff --git a/driver/variant/iris2/src/msm_vidc_iris2.c b/driver/variant/iris2/src/msm_vidc_iris2.c index 92ba209b86..9a29e9b15b 100644 --- a/driver/variant/iris2/src/msm_vidc_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_iris2.c @@ -532,6 +532,12 @@ int msm_vidc_decide_work_mode_iris2(struct msm_vidc_inst* inst) out_f = &inst->fmts[OUTPUT_PORT]; inp_f = &inst->fmts[INPUT_PORT]; + if (is_image_decode_session(inst)) + work_mode = MSM_VIDC_STAGE_1; + + if (is_image_session(inst)) + goto exit; + if (is_decode_session(inst)) { height = out_f->fmt.pix_mp.height; width = out_f->fmt.pix_mp.width; @@ -563,6 +569,7 @@ int msm_vidc_decide_work_mode_iris2(struct msm_vidc_inst* inst) return -EINVAL; } +exit: i_vpr_h(inst, "Configuring work mode = %u low latency = %u", work_mode, lowlatency); msm_vidc_update_cap_value(inst, STAGE, work_mode, __func__); @@ -587,6 +594,9 @@ int msm_vidc_decide_work_route_iris2(struct msm_vidc_inst* inst) core = inst->core; work_route = core->capabilities[NUM_VPP_PIPE].value; + if (is_image_session(inst)) + goto exit; + if (is_decode_session(inst)) { if (inst->capabilities->cap[CODED_FRAMES].value == CODED_FRAMES_INTERLACE) @@ -609,6 +619,7 @@ int msm_vidc_decide_work_route_iris2(struct msm_vidc_inst* inst) return -EINVAL; } +exit: i_vpr_h(inst, "Configuring work route = %u", work_route); msm_vidc_update_cap_value(inst, PIPE, work_route, __func__); @@ -620,7 +631,7 @@ int msm_vidc_decide_quality_mode_iris2(struct msm_vidc_inst* inst) struct msm_vidc_inst_capability* capability = NULL; struct msm_vidc_core *core; u32 mbpf, mbps, max_hq_mbpf, max_hq_mbps; - u32 mode; + u32 mode = MSM_VIDC_POWER_SAVE_MODE; if (!inst || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); @@ -632,7 +643,12 @@ int msm_vidc_decide_quality_mode_iris2(struct msm_vidc_inst* inst) if (!is_encode_session(inst)) return 0; - mode = MSM_VIDC_POWER_SAVE_MODE; + /* image session always runs at quality mode */ + if (is_image_session(inst)) { + mode = MSM_VIDC_MAX_QUALITY_MODE; + goto exit; + } + mbpf = msm_vidc_get_mbs_per_frame(inst); mbps = mbpf * msm_vidc_get_fps(inst); core = inst->core; @@ -644,6 +660,7 @@ int msm_vidc_decide_quality_mode_iris2(struct msm_vidc_inst* inst) (mbpf <= max_hq_mbpf && mbps <= max_hq_mbps)) mode = MSM_VIDC_MAX_QUALITY_MODE; +exit: msm_vidc_update_cap_value(inst, QUALITY_MODE, mode, __func__); return 0; diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 8cdc6e64ef..d8ab9494a1 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -674,6 +674,7 @@ struct msm_vidc_hfi_frame_info { u32 cr; u32 cf; u32 data_corrupt; + u32 overflow; }; struct msm_vidc_decode_vpp_delay { diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index c0e82b9980..efb93f7293 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -123,7 +123,7 @@ static int msm_venc_set_colorformat(struct msm_vidc_inst *inst, return 0; } -static int msm_venc_set_linear_alignment_factor(struct msm_vidc_inst *inst, +static int msm_venc_set_stride_scanline(struct msm_vidc_inst *inst, enum msm_vidc_port_type port) { int rc = 0; @@ -240,6 +240,9 @@ static int msm_venc_set_crop_offsets(struct msm_vidc_inst *inst, bottom_offset = (inst->fmts[port].fmt.pix_mp.height - inst->crop.height); + if (is_image_session(inst)) + right_offset = bottom_offset = 0; + crop[0] = left_offset << 16 | top_offset; crop[1] = right_offset << 16 | bottom_offset; i_vpr_h(inst, "%s: left_offset: %d top_offset: %d " @@ -475,7 +478,7 @@ static int msm_venc_set_input_properties(struct msm_vidc_inst *inst) static const struct msm_venc_prop_type_handle prop_type_handle_arr[] = { {HFI_PROP_COLOR_FORMAT, msm_venc_set_colorformat }, {HFI_PROP_RAW_RESOLUTION, msm_venc_set_raw_resolution }, - {HFI_PROP_LINEAR_STRIDE_SCANLINE, msm_venc_set_linear_alignment_factor }, + {HFI_PROP_LINEAR_STRIDE_SCANLINE, msm_venc_set_stride_scanline }, {HFI_PROP_BUFFER_HOST_MAX_COUNT, msm_venc_set_host_max_buf_count }, {HFI_PROP_SIGNAL_COLOR_INFO, msm_venc_set_colorspace }, }; diff --git a/driver/vidc/src/msm_vidc_buffer.c b/driver/vidc/src/msm_vidc_buffer.c index 59cd986cb4..41e607f4ed 100644 --- a/driver/vidc/src/msm_vidc_buffer.c +++ b/driver/vidc/src/msm_vidc_buffer.c @@ -176,6 +176,9 @@ u32 msm_vidc_internal_buffer_count(struct msm_vidc_inst *inst, return 0; } + if (is_encode_session(inst)) + return 1; + if (is_decode_session(inst)) { if (buffer_type == MSM_VIDC_BUF_BIN || buffer_type == MSM_VIDC_BUF_LINE || diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 4c6505c662..cccb9bf549 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -817,8 +817,12 @@ int msm_vidc_adjust_profile(void *instance, struct v4l2_ctrl *ctrl) adjusted_value = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10; } else { /* 8 bit profile for 8 bit color format */ - if (adjusted_value == V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10) - adjusted_value = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN; + if (adjusted_value == V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10) { + if (is_image_session(inst)) + adjusted_value = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE; + else + adjusted_value = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN; + } } msm_vidc_update_cap_value(inst, PROFILE, @@ -1367,13 +1371,14 @@ int msm_vidc_set_header_mode(void *instance, else if (header_mode == V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME) hfi_value |= HFI_SEQ_HEADER_JOINED_WITH_1ST_FRAME; - if (prepend_sps_pps) { + if (prepend_sps_pps) hfi_value |= HFI_SEQ_HEADER_PREFIX_WITH_SYNC_FRAME; - } - if (hdr_metadata) { + if (hdr_metadata) hfi_value |= HFI_SEQ_HEADER_METADATA; - } + + i_vpr_h(inst, "set cap: name: %24s, value: %#10x, hfi: %#10x\n", cap_name(cap_id), + inst->capabilities->cap[cap_id].value, hfi_value); rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32_ENUM, &hfi_value, sizeof(u32), __func__); @@ -1402,8 +1407,11 @@ int msm_vidc_set_deblock_mode(void *instance, beta = inst->capabilities->cap[LF_BETA].value + lf_offset; alpha = inst->capabilities->cap[LF_ALPHA].value + lf_offset; - hfi_value = (alpha << 16) | (beta << 8) | lf_mode; + + i_vpr_h(inst, "set cap: name: %24s, value: %#10x, hfi: %#10x\n", cap_name(cap_id), + inst->capabilities->cap[cap_id].value, hfi_value); + rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_32_PACKED, &hfi_value, sizeof(u32), __func__); @@ -1432,6 +1440,9 @@ int msm_vidc_set_constant_quality(void *instance, hfi_value = inst->capabilities->cap[cap_id].value; + i_vpr_h(inst, "set cap: name: %24s, value: %#10x, hfi: %#10x\n", cap_name(cap_id), + inst->capabilities->cap[cap_id].value, hfi_value); + rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32, &hfi_value, sizeof(u32), __func__); @@ -1455,6 +1466,9 @@ int msm_vidc_set_use_and_mark_ltr(void *instance, hfi_value = inst->capabilities->cap[cap_id].value; + i_vpr_h(inst, "set cap: name: %24s, value: %#10x, hfi: %#10x\n", cap_name(cap_id), + inst->capabilities->cap[cap_id].value, hfi_value); + rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32, &hfi_value, sizeof(u32), __func__); @@ -1510,6 +1524,10 @@ int msm_vidc_set_min_qp(void *instance, hfi_value = i_frame_qp | p_frame_qp << 8 | b_frame_qp << 16 | client_qp_enable << 24; + + i_vpr_h(inst, "set cap: name: %24s, value: %#10x, hfi: %#10x\n", cap_name(cap_id), + inst->capabilities->cap[cap_id].value, hfi_value); + rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_32_PACKED, &hfi_value, sizeof(u32), __func__); @@ -1565,6 +1583,10 @@ int msm_vidc_set_max_qp(void *instance, hfi_value = i_frame_qp | p_frame_qp << 8 | b_frame_qp << 16 | client_qp_enable << 24; + + i_vpr_h(inst, "set cap: name: %24s, value: %#10x, hfi: %#10x\n", cap_name(cap_id), + inst->capabilities->cap[cap_id].value, hfi_value); + rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_32_PACKED, &hfi_value, sizeof(u32), __func__); @@ -1618,6 +1640,10 @@ int msm_vidc_set_frame_qp(void *instance, hfi_value = i_frame_qp | p_frame_qp << 8 | b_frame_qp << 16 | client_qp_enable << 24; + + i_vpr_h(inst, "set cap: name: %24s, value: %#10x, hfi: %#10x\n", cap_name(cap_id), + inst->capabilities->cap[cap_id].value, hfi_value); + rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_32_PACKED, &hfi_value, sizeof(u32), __func__); @@ -1643,6 +1669,9 @@ int msm_vidc_set_req_sync_frame(void *instance, else hfi_value = HFI_SYNC_FRAME_REQUEST_WITHOUT_SEQ_HDR; + i_vpr_h(inst, "set cap: name: %24s, value: %#10x, hfi: %#10x\n", cap_name(cap_id), + inst->capabilities->cap[cap_id].value, hfi_value); + rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32_ENUM, &hfi_value, sizeof(u32), __func__); @@ -1670,6 +1699,9 @@ int msm_vidc_set_chroma_qp_index_offset(void *instance, chroma_qp = inst->capabilities->cap[cap_id].value + offset; hfi_value = chroma_qp_offset_mode | chroma_qp << 8 | chroma_qp << 16 ; + i_vpr_h(inst, "set cap: name: %24s, value: %#10x, hfi: %#10x\n", cap_name(cap_id), + inst->capabilities->cap[cap_id].value, hfi_value); + rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_32_PACKED, &hfi_value, sizeof(u32), __func__); @@ -1703,6 +1735,8 @@ int msm_vidc_set_slice_count(void* instance, hfi_value = inst->capabilities->cap[SLICE_MAX_BYTES].value; set_cap_id = SLICE_MAX_BYTES; } + i_vpr_h(inst, "set cap: name: %24s, value: %#10x, hfi: %#10x\n", cap_name(cap_id), + inst->capabilities->cap[cap_id].value, hfi_value); rc = msm_vidc_packetize_control(inst, set_cap_id, HFI_PAYLOAD_U32, &hfi_value, sizeof(u32), __func__); @@ -1729,6 +1763,8 @@ int msm_vidc_set_nal_length(void* instance, if (rc) return -EINVAL; } + i_vpr_h(inst, "set cap: name: %24s, value: %#10x, hfi: %#10x\n", cap_name(cap_id), + inst->capabilities->cap[cap_id].value, hfi_value); rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32_ENUM, &hfi_value, sizeof(u32), __func__); @@ -1831,6 +1867,9 @@ int msm_vidc_set_flip(void *instance, if (vflip) hfi_value |= HFI_VERTICAL_FLIP; + i_vpr_h(inst, "set cap: name: %24s, value: %#10x, hfi: %#10x\n", cap_name(cap_id), + inst->capabilities->cap[cap_id].value, hfi_value); + rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32_ENUM, &hfi_value, sizeof(u32), __func__); @@ -1852,6 +1891,9 @@ int msm_vidc_set_q16(void *instance, hfi_value = inst->capabilities->cap[cap_id].value; + i_vpr_h(inst, "set cap: name: %24s, value: %#10x, hfi: %#10x\n", cap_name(cap_id), + inst->capabilities->cap[cap_id].value, hfi_value); + rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_Q16, &hfi_value, sizeof(u32), __func__); @@ -1877,7 +1919,6 @@ int msm_vidc_set_u32(void *instance, } else { hfi_value = inst->capabilities->cap[cap_id].value; } - i_vpr_h(inst, "set cap: name: %24s, value: %#10x, hfi: %#10x\n", cap_name(cap_id), inst->capabilities->cap[cap_id].value, hfi_value); @@ -1923,8 +1964,11 @@ int msm_vidc_set_s32(void *instance, d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - hfi_value = inst->capabilities->cap[cap_id].value; + + i_vpr_h(inst, "set cap: name: %24s, value: %#10x, hfi: %#10x\n", cap_name(cap_id), + inst->capabilities->cap[cap_id].value, hfi_value); + rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_S32, &hfi_value, sizeof(s32), __func__); diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 78e5f0c2f7..0e83ca2355 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -3885,6 +3885,7 @@ int msm_vidc_check_session_supported(struct msm_vidc_inst *inst) { struct msm_vidc_inst_capability *capability; struct v4l2_format *fmt; + u32 pix_fmt, profile; bool allow = false; int rc = 0; @@ -3898,12 +3899,14 @@ int msm_vidc_check_session_supported(struct msm_vidc_inst *inst) if (!is_image_session(inst)) return 0; + pix_fmt = capability->cap[PIX_FMTS].value; + profile = capability->cap[PROFILE].value; + if (is_image_encode_session(inst)) { /* is linear color fmt */ - allow = is_linear_colorformat(capability->cap[PIX_FMTS].value); + allow = is_linear_colorformat(pix_fmt); if (!allow) { - i_vpr_e(inst, "%s: compressed fmt: %#x\n", __func__, - capability->cap[PIX_FMTS].value); + i_vpr_e(inst, "%s: compressed fmt: %#x\n", __func__, pix_fmt); goto exit; } @@ -3943,10 +3946,12 @@ int msm_vidc_check_session_supported(struct msm_vidc_inst *inst) } /* is profile type Still Pic */ - allow = (capability->cap[PROFILE].value == - V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE); + if (is_10bit_colorformat(pix_fmt)) + allow = profile == V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10; + else + allow = profile == V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE; if (!allow) { - i_vpr_e(inst, "%s: profile is not still pic type: %#x\n", __func__, + i_vpr_e(inst, "%s: profile not valid: %#x\n", __func__, capability->cap[PROFILE].value); goto exit; } diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index 483455cdb9..f1b4a89008 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -462,6 +462,9 @@ static int get_driver_buffer_flags(struct msm_vidc_inst *inst, u32 hfi_flags) if (inst->hfi_frame_info.data_corrupt) driver_flags |= MSM_VIDC_BUF_FLAG_ERROR; + if (inst->hfi_frame_info.overflow) + driver_flags |= MSM_VIDC_BUF_FLAG_ERROR; + if (inst->hfi_frame_info.no_output) { if (inst->capabilities->cap[META_BUF_TAG].value && !(hfi_flags & HFI_BUF_FW_FLAG_CODEC_CONFIG)) @@ -544,7 +547,7 @@ static int handle_output_buffer(struct msm_vidc_inst *inst, int rc = 0; struct msm_vidc_buffers *buffers; struct msm_vidc_buffer *buf; - bool found; + bool found, fatal = false; buffers = msm_vidc_get_buffers(inst, MSM_VIDC_BUF_OUTPUT, __func__); if (!buffers) @@ -573,8 +576,25 @@ static int handle_output_buffer(struct msm_vidc_inst *inst, /* encoder output is not expected to be corrupted */ if (inst->hfi_frame_info.data_corrupt) { i_vpr_e(inst, "%s: encode output is corrupted\n", __func__); - msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); + fatal = true; } + if (inst->hfi_frame_info.overflow) { + /* overflow not expected for image session */ + if (is_image_session(inst)) { + i_vpr_e(inst, "%s: overflow detected for an image session\n", + __func__); + fatal = true; + } + + /* overflow not expected for cbr_cfr session */ + if (!buffer->data_size && inst->hfi_rc_type == HFI_RC_CBR_CFR) { + i_vpr_e(inst, "%s: overflow detected for cbr_cfr session\n", + __func__); + fatal = true; + } + } + if (fatal) + msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); } /* From 6d7120a4d39028b1986c68996ed75ebc2e21d55b Mon Sep 17 00:00:00 2001 From: Chinmay Sawarkar Date: Thu, 11 Mar 2021 12:34:29 -0800 Subject: [PATCH 0190/1061] video: driver: Add ctrl for encoder input cr Add new control to set Encoder Input Compression Ratio. Change-Id: I4a68aead33c40e848ed354c51356e4084190290d Signed-off-by: Chinmay Sawarkar --- include/uapi/vidc/media/v4l2_vidc_extensions.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/include/uapi/vidc/media/v4l2_vidc_extensions.h b/include/uapi/vidc/media/v4l2_vidc_extensions.h index a546ccc02e..ac4a821310 100644 --- a/include/uapi/vidc/media/v4l2_vidc_extensions.h +++ b/include/uapi/vidc/media/v4l2_vidc_extensions.h @@ -145,6 +145,9 @@ enum v4l2_mpeg_vidc_blur_types { /* Metadata DPB Tag List*/ #define V4L2_CID_MPEG_VIDC_METADATA_DPB_TAG_LIST \ (V4L2_CID_MPEG_VIDC_BASE + 0x2B) +/* Encoder Input Compression Ratio control */ +#define V4L2_CID_MPEG_VIDC_ENC_INPUT_COMPRESSION_RATIO \ + (V4L2_CID_MPEG_VIDC_BASE + 0x2C) enum v4l2_mpeg_vidc_metapayload_header_flags { METADATA_FLAGS_NONE = 0, From 48912aee84e60f86d29c9bdf31201f24883e2b5f Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Fri, 19 Mar 2021 10:08:35 -0700 Subject: [PATCH 0191/1061] video: driver: add RGBA format support add RGBA and RGBA_UBWC color format support for encoder. Change-Id: I3e179ae9769d851afc5a6f11e1afb14d96e92073 Signed-off-by: Darshana Patil --- driver/platform/waipio/src/msm_vidc_waipio.c | 6 ++- driver/vidc/inc/msm_media_info.h | 12 ++++- driver/vidc/inc/msm_vidc_driver.h | 6 +++ driver/vidc/src/msm_venc.c | 54 +++++++++++++------ driver/vidc/src/msm_vidc_driver.c | 6 +++ .../uapi/vidc/media/v4l2_vidc_extensions.h | 5 +- 6 files changed, 65 insertions(+), 24 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 83dd0e9622..77c6de3789 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -111,13 +111,15 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {PIX_FMTS, ENC, H264, MSM_VIDC_FMT_NV12, MSM_VIDC_FMT_NV12C, - MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C, + MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C | + MSM_VIDC_FMT_RGBA8888 | MSM_VIDC_FMT_RGBA8888C, MSM_VIDC_FMT_NV12C}, {PIX_FMTS, ENC, HEVC|HEIC, MSM_VIDC_FMT_NV12, MSM_VIDC_FMT_TP10C, MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C | - MSM_VIDC_FMT_P010 | MSM_VIDC_FMT_TP10C, + MSM_VIDC_FMT_P010 | MSM_VIDC_FMT_TP10C | + MSM_VIDC_FMT_RGBA8888 | MSM_VIDC_FMT_RGBA8888C, MSM_VIDC_FMT_NV12C, 0, 0, CAP_FLAG_ROOT, diff --git a/driver/vidc/inc/msm_media_info.h b/driver/vidc/inc/msm_media_info.h index 444759891e..dd26941b42 100644 --- a/driver/vidc/inc/msm_media_info.h +++ b/driver/vidc/inc/msm_media_info.h @@ -384,7 +384,8 @@ static inline unsigned int VIDEO_RGB_STRIDE_BYTES(unsigned int v4l2_fmt, switch (v4l2_fmt) { case V4L2_PIX_FMT_VIDC_ARGB32C: - alignment = 64; + case V4L2_PIX_FMT_RGBA32: + alignment = 256; break; default: goto invalid_input; @@ -414,6 +415,7 @@ static inline unsigned int VIDEO_RGB_SCANLINES(unsigned int v4l2_fmt, switch (v4l2_fmt) { case V4L2_PIX_FMT_VIDC_ARGB32C: + case V4L2_PIX_FMT_RGBA32: alignment = 16; break; default: @@ -436,6 +438,7 @@ static inline unsigned int VIDEO_RGB_META_STRIDE(unsigned int v4l2_fmt, switch (v4l2_fmt) { case V4L2_PIX_FMT_VIDC_ARGB32C: + case V4L2_PIX_FMT_RGBA32: rgb_tile_width = 16; break; default: @@ -459,6 +462,7 @@ static inline unsigned int VIDEO_RGB_META_SCANLINES(unsigned int v4l2_fmt, switch (v4l2_fmt) { case V4L2_PIX_FMT_VIDC_ARGB32C: + case V4L2_PIX_FMT_RGBA32: rgb_tile_height = 4; break; default: @@ -483,7 +487,7 @@ static inline unsigned int VIDEO_RAW_BUFFER_SIZE(unsigned int v4l2_fmt, unsigned int uv_meta_stride = 0, uv_meta_scanlines = 0; unsigned int y_meta_plane = 0, uv_meta_plane = 0; unsigned int rgb_stride = 0, rgb_scanlines = 0; - unsigned int rgb_ubwc_plane = 0, rgb_meta_plane = 0; + unsigned int rgb_plane = 0, rgb_ubwc_plane = 0, rgb_meta_plane = 0; unsigned int rgb_meta_stride = 0, rgb_meta_scanlines = 0; if (!pix_width || !pix_height) @@ -588,6 +592,10 @@ static inline unsigned int VIDEO_RAW_BUFFER_SIZE(unsigned int v4l2_fmt, rgb_meta_scanlines, 4096); size = rgb_ubwc_plane + rgb_meta_plane; break; + case V4L2_PIX_FMT_RGBA32: + rgb_plane = MSM_MEDIA_ALIGN(rgb_stride * rgb_scanlines, 4096); + size = rgb_plane; + break; default: break; } diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index fa70bdba2d..74b60d2351 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -156,6 +156,12 @@ static inline bool is_8bit_colorformat(enum msm_vidc_colorformat_type colorforma colorformat == MSM_VIDC_FMT_RGBA8888C; } +static inline bool is_rgba_colorformat(enum msm_vidc_colorformat_type colorformat) +{ + return colorformat == MSM_VIDC_FMT_RGBA8888 || + colorformat == MSM_VIDC_FMT_RGBA8888C; +} + static inline bool is_secondary_output_mode(struct msm_vidc_inst *inst) { return false; // TODO: inst->stream_output_mode == HAL_VIDEO_DECODER_SECONDARY; diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index efb93f7293..9d1faa4f0d 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -127,7 +127,8 @@ static int msm_venc_set_stride_scanline(struct msm_vidc_inst *inst, enum msm_vidc_port_type port) { int rc = 0; - u32 pixelformat, stride_y, scanline_y, stride_uv, scanline_uv; + u32 color_format, stride_y, scanline_y; + u32 stride_uv = 0, scanline_uv = 0; u32 payload[2]; if (port != INPUT_PORT) { @@ -135,9 +136,8 @@ static int msm_venc_set_stride_scanline(struct msm_vidc_inst *inst, return -EINVAL; } - pixelformat = inst->fmts[INPUT_PORT].fmt.pix_mp.pixelformat; - if (pixelformat != V4L2_PIX_FMT_NV12 && - pixelformat != V4L2_PIX_FMT_VIDC_P010) { + color_format = inst->capabilities->cap[PIX_FMTS].value; + if (!is_linear_colorformat(color_format)) { i_vpr_e(inst, "%s: not a linear color fmt, property is not set\n", __func__); @@ -146,8 +146,11 @@ static int msm_venc_set_stride_scanline(struct msm_vidc_inst *inst, stride_y = inst->fmts[INPUT_PORT].fmt.pix_mp.width; scanline_y = inst->fmts[INPUT_PORT].fmt.pix_mp.height; - stride_uv = stride_y; - scanline_uv = scanline_y / 2; + if (color_format == MSM_VIDC_FMT_NV12 || + color_format == MSM_VIDC_FMT_P010) { + stride_uv = stride_y; + scanline_uv = scanline_y / 2; + } payload[0] = stride_y << 16 | scanline_y; payload[1] = stride_uv << 16 | scanline_uv; @@ -1192,6 +1195,7 @@ static int msm_venc_s_fmt_input(struct msm_vidc_inst *inst, struct v4l2_format * struct v4l2_format *fmt; struct msm_vidc_core *core; u32 pix_fmt; + u32 crop_width, crop_height; if (!inst || !inst->core || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); @@ -1204,15 +1208,33 @@ static int msm_venc_s_fmt_input(struct msm_vidc_inst *inst, struct v4l2_format * fmt->fmt.pix_mp.pixelformat = f->fmt.pix_mp.pixelformat; pix_fmt = v4l2_colorformat_to_driver(f->fmt.pix_mp.pixelformat, __func__); msm_vidc_update_cap_value(inst, PIX_FMTS, pix_fmt, __func__); - fmt->fmt.pix_mp.width = VIDEO_Y_STRIDE_PIX(fmt->fmt.pix_mp.pixelformat, - f->fmt.pix_mp.width); - fmt->fmt.pix_mp.height = VIDEO_Y_SCANLINES(fmt->fmt.pix_mp.pixelformat, - f->fmt.pix_mp.height); + if (is_rgba_colorformat(pix_fmt)) { + fmt->fmt.pix_mp.width = VIDEO_RGB_STRIDE_PIX(fmt->fmt.pix_mp.pixelformat, + f->fmt.pix_mp.width); + fmt->fmt.pix_mp.height = VIDEO_RGB_SCANLINES(fmt->fmt.pix_mp.pixelformat, + f->fmt.pix_mp.height); + fmt->fmt.pix_mp.plane_fmt[0].bytesperline = + VIDEO_RGB_STRIDE_BYTES(fmt->fmt.pix_mp.pixelformat, + f->fmt.pix_mp.width); + crop_width = VIDEO_RGB_STRIDE_PIX( + fmt->fmt.pix_mp.pixelformat, inst->crop.width); + crop_height = VIDEO_RGB_SCANLINES( + fmt->fmt.pix_mp.pixelformat, inst->crop.height); + } else { + fmt->fmt.pix_mp.width = VIDEO_Y_STRIDE_PIX(fmt->fmt.pix_mp.pixelformat, + f->fmt.pix_mp.width); + fmt->fmt.pix_mp.height = VIDEO_Y_SCANLINES(fmt->fmt.pix_mp.pixelformat, + f->fmt.pix_mp.height); + fmt->fmt.pix_mp.plane_fmt[0].bytesperline = + VIDEO_Y_STRIDE_BYTES(fmt->fmt.pix_mp.pixelformat, + f->fmt.pix_mp.width); + crop_width = VIDEO_Y_STRIDE_PIX( + fmt->fmt.pix_mp.pixelformat, inst->crop.width); + crop_height = VIDEO_Y_SCANLINES( + fmt->fmt.pix_mp.pixelformat, inst->crop.height); + } fmt->fmt.pix_mp.num_planes = 1; - fmt->fmt.pix_mp.plane_fmt[0].bytesperline = - VIDEO_Y_STRIDE_BYTES(fmt->fmt.pix_mp.pixelformat, - f->fmt.pix_mp.width); fmt->fmt.pix_mp.plane_fmt[0].sizeimage = call_session_op(core, buffer_size, inst, MSM_VIDC_BUF_INPUT); fmt->fmt.pix_mp.colorspace = f->fmt.pix_mp.colorspace; @@ -1233,10 +1255,8 @@ static int msm_venc_s_fmt_input(struct msm_vidc_inst *inst, struct v4l2_format * inst->buffers.input.size = fmt->fmt.pix_mp.plane_fmt[0].sizeimage; - if (fmt->fmt.pix_mp.width != VIDEO_Y_STRIDE_PIX( - fmt->fmt.pix_mp.pixelformat, inst->crop.width) || - fmt->fmt.pix_mp.height != VIDEO_Y_SCANLINES( - fmt->fmt.pix_mp.pixelformat, inst->crop.height)) { + if (fmt->fmt.pix_mp.width != crop_width || + fmt->fmt.pix_mp.height != crop_height) { /* reset crop dimensions with updated resolution */ inst->crop.top = inst->crop.left = 0; diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 0e83ca2355..74f5a379b8 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -422,6 +422,9 @@ enum msm_vidc_colorformat_type v4l2_colorformat_to_driver(u32 v4l2_colorformat, case V4L2_PIX_FMT_VIDC_TP10C: colorformat = MSM_VIDC_FMT_TP10C; break; + case V4L2_PIX_FMT_RGBA32: + colorformat = MSM_VIDC_FMT_RGBA8888; + break; case V4L2_PIX_FMT_VIDC_ARGB32C: colorformat = MSM_VIDC_FMT_RGBA8888C; break; @@ -454,6 +457,9 @@ u32 v4l2_colorformat_from_driver(enum msm_vidc_colorformat_type colorformat, case MSM_VIDC_FMT_TP10C: v4l2_colorformat = V4L2_PIX_FMT_VIDC_TP10C; break; + case MSM_VIDC_FMT_RGBA8888: + v4l2_colorformat = V4L2_PIX_FMT_RGBA32; + break; case MSM_VIDC_FMT_RGBA8888C: v4l2_colorformat = V4L2_PIX_FMT_VIDC_ARGB32C; break; diff --git a/include/uapi/vidc/media/v4l2_vidc_extensions.h b/include/uapi/vidc/media/v4l2_vidc_extensions.h index a546ccc02e..9d61ab0e6f 100644 --- a/include/uapi/vidc/media/v4l2_vidc_extensions.h +++ b/include/uapi/vidc/media/v4l2_vidc_extensions.h @@ -12,8 +12,7 @@ /* * supported standard color formats * V4L2_PIX_FMT_NV12 Y/CbCr 4:2:0 - * NV21?? // TODO: jdas - * V4L2_PIX_FMT_ARGB32 ARGB-8-8-8-8 + * V4L2_PIX_FMT_RGBA32 RGBA-8-8-8-8 */ /* Below are additional color formats */ /* 12 Y/CbCr 4:2:0 compressed */ @@ -22,7 +21,7 @@ #define V4L2_PIX_FMT_VIDC_TP10C v4l2_fourcc('Q', '1', '0', 'C') /* Y/CbCr 4:2:0, 10 bits per channel */ #define V4L2_PIX_FMT_VIDC_P010 v4l2_fourcc('P', '0', '1', '0') -/* 32 ARGB-8-8-8-8 compressed */ +/* 32 RGBA-8-8-8-8 compressed */ #define V4L2_PIX_FMT_VIDC_ARGB32C v4l2_fourcc('Q', '2', '4', 'C') #define V4L2_META_FMT_VIDC v4l2_fourcc('Q', 'M', 'E', 'T') /* HEIC encoder and decoder */ From 7b9c3cb048fda35ce0fbf7a65fc27ba3315fbb58 Mon Sep 17 00:00:00 2001 From: Chinmay Sawarkar Date: Tue, 9 Mar 2021 13:16:21 -0800 Subject: [PATCH 0192/1061] video: driver: Enable encoder input CR stats Enable encoder input Compression Ratio (CR) stats. Input CR stats are provided by clients for each input buffer and used in bandwidth calculations. Change-Id: Ibd910118837148b0b9dcc288069237f9a2d8f225 Signed-off-by: Chinmay Sawarkar Signed-off-by: Mihir Ganu --- driver/platform/waipio/src/msm_vidc_waipio.c | 5 +++ driver/vidc/inc/msm_vidc_internal.h | 1 + driver/vidc/src/msm_vidc.c | 1 + driver/vidc/src/msm_vidc_driver.c | 44 ++++++++++++++++++++ driver/vidc/src/msm_vidc_power.c | 8 +++- 5 files changed, 58 insertions(+), 1 deletion(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 83dd0e9622..06ea5e3f02 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -1084,6 +1084,11 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {0}, {0}, NULL, NULL}, + {ENC_IP_CR, ENC, CODECS_ALL, + 0, S32_MAX, 1, 0, + V4L2_CID_MPEG_VIDC_ENC_INPUT_COMPRESSION_RATIO, + 0, CAP_FLAG_DYNAMIC_ALLOWED}, + {META_LTR_MARK_USE, ENC, H264|HEVC, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index d8ab9494a1..10e20e9f03 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -419,6 +419,7 @@ enum msm_vidc_inst_capability_type { RAP_FRAME, SEQ_CHANGE_AT_SYNC_FRAME, PRIORITY, + ENC_IP_CR, META_LTR_MARK_USE, META_DPB_MISR, META_OPB_MISR, diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index 65a7f65d87..868a2cbcde 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -777,6 +777,7 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) INIT_LIST_HEAD(&inst->mappings.vpss.list); INIT_LIST_HEAD(&inst->children.list); INIT_LIST_HEAD(&inst->firmware.list); + INIT_LIST_HEAD(&inst->enc_input_crs); for (i = 0; i < MAX_SIGNAL; i++) init_completion(&inst->completions[i]); diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 0e83ca2355..5a5305d352 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -162,6 +162,7 @@ static const struct msm_vidc_cap_name cap_name_arr[] = { {RAP_FRAME, "RAP_FRAME" }, {SEQ_CHANGE_AT_SYNC_FRAME, "SEQ_CHANGE_AT_SYNC_FRAME" }, {PRIORITY, "PRIORITY" }, + {ENC_IP_CR, "ENC_IP_CR" }, {META_LTR_MARK_USE, "META_LTR_MARK_USE" }, {META_DPB_MISR, "META_DPB_MISR" }, {META_OPB_MISR, "META_OPB_MISR" }, @@ -1082,6 +1083,7 @@ bool msm_vidc_allow_s_ctrl(struct msm_vidc_inst *inst, u32 id) case V4L2_CID_MPEG_VIDC_VIDEO_BLUR_TYPES: case V4L2_CID_MPEG_VIDC_VIDEO_BLUR_RESOLUTION: case V4L2_CID_MPEG_VIDEO_CONSTANT_QUALITY: + case V4L2_CID_MPEG_VIDC_ENC_INPUT_COMPRESSION_RATIO: allow = true; break; default: @@ -2121,11 +2123,47 @@ int msm_vidc_queue_buffer_batch(struct msm_vidc_inst *inst) return 0; } +void msm_vidc_update_input_cr(struct msm_vidc_inst *inst, u32 idx, u32 cr) +{ + struct msm_vidc_input_cr_data *temp, *next; + bool found = false; + + list_for_each_entry_safe(temp, next, &inst->enc_input_crs, list) { + if (temp->index == idx) { + temp->input_cr = cr; + found = true; + break; + } + } + if (!found) { + temp = kzalloc(sizeof(*temp), GFP_KERNEL); + if (!temp) { + i_vpr_e(inst, "%s: malloc failure.\n", __func__); + return; + } + temp->index = idx; + temp->input_cr = cr; + list_add_tail(&temp->list, &inst->enc_input_crs); + } +} + +void msm_vidc_free_input_cr_list(struct msm_vidc_inst *inst) +{ + struct msm_vidc_input_cr_data *temp, *next; + + list_for_each_entry_safe(temp, next, &inst->enc_input_crs, list) { + list_del(&temp->list); + kfree(temp); + } + INIT_LIST_HEAD(&inst->enc_input_crs); +} + int msm_vidc_queue_buffer_single(struct msm_vidc_inst *inst, struct vb2_buffer *vb2) { int rc = 0; struct msm_vidc_buffer *buf; enum msm_vidc_allow allow; + u32 cr = 0; if (!inst || !vb2) { d_vpr_e("%s: invalid params\n", __func__); @@ -2146,6 +2184,11 @@ int msm_vidc_queue_buffer_single(struct msm_vidc_inst *inst, struct vb2_buffer * } if (buf->type == MSM_VIDC_BUF_INPUT) { + if (is_encode_session(inst)) { + cr = inst->capabilities->cap[ENC_IP_CR].value; + msm_vidc_update_input_cr(inst, vb2->index, cr); + inst->capabilities->cap[ENC_IP_CR].value = 0; + } inst->power.buffer_counter++; msm_vidc_scale_power(inst, true); } @@ -3583,6 +3626,7 @@ static void msm_vidc_close_helper(struct kref *kref) msm_vdec_inst_deinit(inst); else if (is_encode_session(inst)) msm_venc_inst_deinit(inst); + msm_vidc_free_input_cr_list(inst); kfree(inst->capabilities); if (inst->response_workq) destroy_workqueue(inst->response_workq); diff --git a/driver/vidc/src/msm_vidc_power.c b/driver/vidc/src/msm_vidc_power.c index 0b89b1f7ff..81cf6b0b26 100644 --- a/driver/vidc/src/msm_vidc_power.c +++ b/driver/vidc/src/msm_vidc_power.c @@ -118,6 +118,7 @@ exit: static int fill_dynamic_stats(struct msm_vidc_inst *inst, struct vidc_bus_vote_data *vote_data) { + struct msm_vidc_input_cr_data *temp, *next; u32 max_cr = MSM_VIDC_MIN_UBWC_COMPRESSION_RATIO; u32 max_cf = MSM_VIDC_MIN_UBWC_COMPLEXITY_FACTOR; u32 max_input_cr = MSM_VIDC_MIN_UBWC_COMPRESSION_RATIO; @@ -129,7 +130,12 @@ static int fill_dynamic_stats(struct msm_vidc_inst *inst, min_cr = inst->power.fw_cr; max_cf = inst->power.fw_cf; max_cf = max_cf / ((msm_vidc_get_mbs_per_frame(inst)) / (32 * 8) * 3) / 2; - // Todo: min_input_cr = 0; + + list_for_each_entry_safe(temp, next, &inst->enc_input_crs, list) { + min_input_cr = min(min_input_cr, temp->input_cr); + max_input_cr = max(max_input_cr, temp->input_cr); + } + /* Sanitize CF values from HW */ max_cf = min_t(u32, max_cf, MSM_VIDC_MAX_UBWC_COMPLEXITY_FACTOR); From c148cf0bb5dd7aeec583acb10e087c036df472e3 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Mon, 22 Mar 2021 18:12:01 +0530 Subject: [PATCH 0193/1061] video: driver: add heic 10bit image encoding support - fix 10bit internal buffer allocation handling - profile: MAIN_10 - pixfmt: linear 10bit(MSM_VIDC_FMT_P010). Change-Id: I49ffd221927e5eb59915405ff62c038ae05b84f3 Signed-off-by: Govindaraj Rajagopal --- driver/platform/waipio/src/msm_vidc_waipio.c | 20 ++++----- .../variant/iris2/src/msm_vidc_buffer_iris2.c | 41 +++++++------------ 2 files changed, 25 insertions(+), 36 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 83dd0e9622..bb70437b37 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -113,7 +113,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { MSM_VIDC_FMT_NV12C, MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C, MSM_VIDC_FMT_NV12C}, - {PIX_FMTS, ENC, HEVC|HEIC, + {PIX_FMTS, ENC, HEVC, MSM_VIDC_FMT_NV12, MSM_VIDC_FMT_TP10C, MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C | @@ -1198,15 +1198,6 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_CID_MIN_BUFFERS_FOR_CAPTURE, HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT, CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, - {PIX_FMTS, ENC, HEIC, - MSM_VIDC_FMT_NV12, - MSM_VIDC_FMT_P010, - MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_P010, - MSM_VIDC_FMT_NV12, - 0, 0, - CAP_FLAG_ROOT, - {0}, - {PROFILE}}, {MBPF, ENC, HEIC, 64, 262144, 262144}, /* ((8192x8192)/256) */ {MBPF, DEC, HEIC, 36, 1048576, 1, 1048576}, /* ((16384x16384)/256) */ {MBPS, ENC, HEIC, 64, 262144, 262144}, /* ((8192x8192)/256)@1fps */ @@ -1260,6 +1251,15 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, {0}, {0}, NULL, msm_vidc_set_u32}, + {PIX_FMTS, ENC, HEIC, + MSM_VIDC_FMT_NV12, + MSM_VIDC_FMT_P010, + MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_P010, + MSM_VIDC_FMT_NV12, + 0, 0, + CAP_FLAG_ROOT, + {0}, + {PROFILE}}, {PROFILE, ENC|DEC, HEIC, V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE, V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10, diff --git a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c index c5df3607c6..38e13edc29 100644 --- a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c @@ -365,7 +365,7 @@ static u32 msm_vidc_encoder_line_size_iris2(struct msm_vidc_inst *inst) { struct msm_vidc_core *core; u32 size = 0; - u32 width, height, pixelformat, num_vpp_pipes; + u32 width, height, pixfmt, num_vpp_pipes; bool is_tenbit = false; struct v4l2_format *f; @@ -374,21 +374,17 @@ static u32 msm_vidc_encoder_line_size_iris2(struct msm_vidc_inst *inst) return size; } core = inst->core; - if (!core->capabilities) { - i_vpr_e(inst, "%s: invalid core capabilities\n", __func__); + if (!core->capabilities || !inst->capabilities) { + i_vpr_e(inst, "%s: invalid capabilities\n", __func__); return size; } num_vpp_pipes = core->capabilities[NUM_VPP_PIPE].value; + pixfmt = inst->capabilities->cap[PIX_FMTS].value; f = &inst->fmts[OUTPUT_PORT]; width = f->fmt.pix_mp.width; height = f->fmt.pix_mp.height; - pixelformat = f->fmt.pix_mp.pixelformat; - if (pixelformat == MSM_VIDC_FMT_P010 || - pixelformat == MSM_VIDC_FMT_TP10C) - is_tenbit = true; - else - is_tenbit = false; + is_tenbit = (pixfmt == MSM_VIDC_FMT_P010 || pixfmt == MSM_VIDC_FMT_TP10C); if (inst->codec == MSM_VIDC_H264) HFI_BUFFER_LINE_H264E(size, width, height, is_tenbit, num_vpp_pipes); @@ -402,11 +398,11 @@ static u32 msm_vidc_encoder_line_size_iris2(struct msm_vidc_inst *inst) static u32 msm_vidc_encoder_dpb_size_iris2(struct msm_vidc_inst *inst) { u32 size = 0; - u32 width, height, pixelformat; + u32 width, height, pixfmt; struct v4l2_format *f; bool is_tenbit; - if (!inst || !inst->core) { + if (!inst || !inst->core || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); return 0; } @@ -414,12 +410,9 @@ static u32 msm_vidc_encoder_dpb_size_iris2(struct msm_vidc_inst *inst) f = &inst->fmts[OUTPUT_PORT]; width = f->fmt.pix_mp.width; height = f->fmt.pix_mp.height; - pixelformat = f->fmt.pix_mp.pixelformat; - if (pixelformat == MSM_VIDC_FMT_P010 || - pixelformat == MSM_VIDC_FMT_TP10C) - is_tenbit = true; - else - is_tenbit = false; + + pixfmt = inst->capabilities->cap[PIX_FMTS].value; + is_tenbit = (pixfmt == MSM_VIDC_FMT_P010 || pixfmt == MSM_VIDC_FMT_TP10C); if (inst->codec == MSM_VIDC_H264) HFI_BUFFER_DPB_H264E(size, width, height); @@ -448,27 +441,23 @@ static u32 msm_vidc_encoder_vpss_size_iris2(struct msm_vidc_inst* inst) { u32 size = 0; bool ds_enable, rot_enable, flip_enable, is_tenbit; - u32 width, height, pixelformat; + u32 width, height, pixfmt; struct v4l2_format* f; - if (!inst || !inst->core) { + if (!inst || !inst->core || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); return 0; } ds_enable = false; // TODO: fixme rot_enable = false; // TODO: fixme flip_enable = false; // TODO: fixme - is_tenbit = false; f = &inst->fmts[OUTPUT_PORT]; width = f->fmt.pix_mp.width; height = f->fmt.pix_mp.height; - pixelformat = f->fmt.pix_mp.pixelformat; - if (pixelformat == MSM_VIDC_FMT_P010 || - pixelformat == MSM_VIDC_FMT_TP10C) - is_tenbit = true; - else - is_tenbit = false; + + pixfmt = inst->capabilities->cap[PIX_FMTS].value; + is_tenbit = (pixfmt == MSM_VIDC_FMT_P010 || pixfmt == MSM_VIDC_FMT_TP10C); HFI_BUFFER_VPSS_ENC(size, width, height, ds_enable, rot_enable, flip_enable, is_tenbit); From fb6421e3e9200a287286a0a9dceb58038bd7b3e6 Mon Sep 17 00:00:00 2001 From: Sebastian Dang Date: Wed, 24 Feb 2021 09:06:56 -0800 Subject: [PATCH 0194/1061] video: driver: Add mmrm api Add mmrm apis to driver. Replace clk_set_rate with mmrm client set value. Scale branch clock values. Change-Id: I8ea35b668e4c7d6157c9c4f7120e6a4237cf65de Signed-off-by: Sebastian Dang --- Android.mk | 4 ++ Kbuild | 2 + driver/vidc/inc/msm_vidc_dt.h | 3 + driver/vidc/src/msm_vidc_dt.c | 21 ++++++- driver/vidc/src/msm_vidc_power.c | 12 ++++ driver/vidc/src/msm_vidc_probe.c | 2 +- driver/vidc/src/venus_hfi.c | 103 +++++++++++++++++++++++++++++-- 7 files changed, 141 insertions(+), 6 deletions(-) diff --git a/Android.mk b/Android.mk index 529f50ee2b..e01148148e 100644 --- a/Android.mk +++ b/Android.mk @@ -12,6 +12,7 @@ KBUILD_OPTIONS += MODNAME=msm_video KBUILD_OPTIONS += BOARD_PLATFORM=$(TARGET_BOARD_PLATFORM) KBUILD_OPTIONS += $(VIDEO_SELECT) +KBUILD_OPTIONS += KBUILD_EXTRA_SYMBOLS=$(shell pwd)/$(call intermediates-dir-for,DLKM,mmrm-module-symvers)/Module.symvers ########################################################### DLKM_DIR := device/qcom/common/dlkm @@ -27,6 +28,9 @@ LOCAL_MODULE_TAGS := optional LOCAL_MODULE_DEBUG_ENABLE := true LOCAL_MODULE_PATH := $(KERNEL_MODULES_OUT) +LOCAL_REQUIRED_MODULES := mmrm-module-symvers +LOCAL_ADDITIONAL_DEPENDENCIES := $(call intermediates-dir-for,DLKM,mmrm-module-symvers)/Module.symvers + # Include kp_module.ko in the /vendor/lib/modules (vendor.img) # BOARD_VENDOR_KERNEL_MODULES += $(LOCAL_MODULE_PATH)/$(LOCAL_MODULE) include $(DLKM_DIR)/Build_external_kernelmodule.mk diff --git a/Kbuild b/Kbuild index a37c9cf097..c17d85401f 100644 --- a/Kbuild +++ b/Kbuild @@ -2,6 +2,8 @@ include $(VIDEO_ROOT)/config/waipio_video.conf +KBUILD_CPPFLAGS += -DCONFIG_MSM_MMRM=1 + LINUXINCLUDE += -include $(VIDEO_ROOT)/config/waipio_video.h LINUXINCLUDE += -I$(VIDEO_ROOT)/driver/vidc/inc \ diff --git a/driver/vidc/inc/msm_vidc_dt.h b/driver/vidc/inc/msm_vidc_dt.h index 04b58a8451..c646fe8932 100644 --- a/driver/vidc/inc/msm_vidc_dt.h +++ b/driver/vidc/inc/msm_vidc_dt.h @@ -8,6 +8,7 @@ #include #include +#include #include "msm_vidc_internal.h" @@ -133,11 +134,13 @@ struct regulator_set { struct clock_info { const char *name; + u32 clk_id; struct clk *clk; u32 count; bool has_scaling; bool has_mem_retention; u64 prev; + struct mmrm_client *mmrm_client; }; struct clock_set { diff --git a/driver/vidc/src/msm_vidc_dt.c b/driver/vidc/src/msm_vidc_dt.c index a2d9c1ea38..282b90d2de 100644 --- a/driver/vidc/src/msm_vidc_dt.c +++ b/driver/vidc/src/msm_vidc_dt.c @@ -551,6 +551,7 @@ static int msm_vidc_load_clock_table(struct msm_vidc_core *core) int rc = 0, num_clocks = 0, c = 0; struct platform_device *pdev = core->pdev; struct msm_vidc_dt *dt = core->dt; + int *clock_ids = NULL; int *clock_props = NULL; struct clock_set *clocks = &dt->clock_set; @@ -563,6 +564,22 @@ static int msm_vidc_load_clock_table(struct msm_vidc_core *core) goto err_load_clk_table_fail; } + clock_ids = devm_kzalloc(&pdev->dev, num_clocks * + sizeof(*clock_ids), GFP_KERNEL); + if (!clock_ids) { + d_vpr_e("No memory to read clock ids\n"); + rc = -ENOMEM; + goto err_load_clk_table_fail; + } + + rc = of_property_read_u32_array(pdev->dev.of_node, + "clock-ids", clock_ids, + num_clocks); + if (rc) { + d_vpr_e("Failed to read clock ids: %d\n", rc); + goto err_load_clk_prop_fail; + } + clock_props = devm_kzalloc(&pdev->dev, num_clocks * sizeof(*clock_props), GFP_KERNEL); if (!clock_props) { @@ -596,6 +613,8 @@ static int msm_vidc_load_clock_table(struct msm_vidc_core *core) of_property_read_string_index(pdev->dev.of_node, "clock-names", c, &vc->name); + vc->clk_id = clock_ids[c]; + if (clock_props[c] & CLOCK_PROP_HAS_SCALING) { vc->has_scaling = true; } else { @@ -976,4 +995,4 @@ int msm_vidc_init_dt(struct platform_device *pdev) return rc; return 0; -} \ No newline at end of file +} diff --git a/driver/vidc/src/msm_vidc_power.c b/driver/vidc/src/msm_vidc_power.c index 81cf6b0b26..67e36b894a 100644 --- a/driver/vidc/src/msm_vidc_power.c +++ b/driver/vidc/src/msm_vidc_power.c @@ -20,6 +20,9 @@ #define MSM_VIDC_MIN_UBWC_COMPRESSION_RATIO (1 << 16) #define MSM_VIDC_MAX_UBWC_COMPRESSION_RATIO (5 << 16) +/* TODO: Move to dtsi OR use source clock instead of branch clock.*/ +#define MSM_VIDC_CLOCK_SOURCE_SCALING_RATIO 3 + u64 msm_vidc_max_freq(struct msm_vidc_inst *inst) { struct msm_vidc_core* core; @@ -408,6 +411,15 @@ int msm_vidc_set_clocks(struct msm_vidc_inst* inst) __func__, rate, freq, increment, decrement); mutex_unlock(&core->lock); + /* + * This conversion is necessary since we are scaling clock values based on + * the branch clock. However, mmrm driver expects source clock to be registered + * and used for scaling. + * TODO: Remove this scaling if using source clock instead of branch clock. + */ + rate = rate * MSM_VIDC_CLOCK_SOURCE_SCALING_RATIO; + i_vpr_h(inst, "%s: scaled clock rate %lu\n", __func__, rate); + rc = venus_hfi_scale_clocks(inst, rate); if (rc) return rc; diff --git a/driver/vidc/src/msm_vidc_probe.c b/driver/vidc/src/msm_vidc_probe.c index 6955846806..0024015af2 100644 --- a/driver/vidc/src/msm_vidc_probe.c +++ b/driver/vidc/src/msm_vidc_probe.c @@ -492,5 +492,5 @@ static void __exit msm_vidc_exit(void) module_init(msm_vidc_init); module_exit(msm_vidc_exit); -MODULE_SOFTDEP("pre: subsys-pil-tz"); +MODULE_SOFTDEP("pre: subsys-pil-tz msm-mmrm"); MODULE_LICENSE("GPL v2"); diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index ec8378a7ee..119df4a8f0 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -572,14 +572,22 @@ static int __set_clk_rate(struct msm_vidc_core *core, struct clock_info *cl, u64 rate) { int rc = 0; - struct clk *clk = cl->clk; + // struct clk *clk = cl->clk; + struct mmrm_client_data client_data; + struct mmrm_client *client = cl->mmrm_client; + + /* not registered */ + if (!client) + return -EINVAL; /* bail early if requested clk rate is not changed */ if (rate == cl->prev) return 0; d_vpr_p("Scaling clock %s to %llu, prev %llu\n", cl->name, rate, cl->prev); - rc = clk_set_rate(clk, rate); + /* TODO: Set num_hw_blocks based on encoder or decoder */ + memset(&client_data, 0, sizeof(client_data)); + rc = mmrm_client_set_value(client, &client_data, rate); if (rc) { d_vpr_e("%s: Failed to set clock rate %llu %s: %d\n", __func__, rate, cl->name, rc); @@ -1301,6 +1309,83 @@ err_clk_get: return rc; } +static void __deregister_mmrm(struct msm_vidc_core *core) +{ + struct clock_info *cl; + + venus_hfi_for_each_clock(core, cl) { + if (cl->has_scaling && cl->mmrm_client) { + mmrm_client_deregister(cl->mmrm_client); + cl->mmrm_client = NULL; + } + } +} + +static int __register_mmrm(struct msm_vidc_core *core) +{ + int rc = 0; + struct clock_info *cl; + + venus_hfi_for_each_clock(core, cl) { + struct mmrm_client_desc desc; + char *name = (char *)desc.client_info.desc.name; + + // TODO: set notifier data vals + struct mmrm_client_notifier_data notifier_data = { + MMRM_CLIENT_RESOURCE_VALUE_CHANGE, + {{0, 0}}, + NULL}; + + // TODO: add callback fn + desc.notifier_callback_fn = NULL; + + if (!cl->has_scaling) + continue; + + if (IS_ERR_OR_NULL(cl->clk)) { + d_vpr_e("%s: Invalid clock: %s\n", __func__, cl->name); + rc = PTR_ERR(cl->clk) ? PTR_ERR(cl->clk) : -EINVAL; + goto err_register_mmrm; + } + + desc.client_type = MMRM_CLIENT_CLOCK; + desc.client_info.desc.client_domain = MMRM_CLIENT_DOMAIN_VIDEO; + desc.client_info.desc.client_id = cl->clk_id; + strlcpy(name, cl->name, sizeof(desc.client_info.desc.name)); + desc.client_info.desc.clk = cl->clk; + desc.priority = MMRM_CLIENT_PRIOR_LOW; + desc.pvt_data = notifier_data.pvt_data; + + d_vpr_h("%s: domain(%d) cid(%d) name(%s) clk(%pK)\n", + __func__, + desc.client_info.desc.client_domain, + desc.client_info.desc.client_id, + desc.client_info.desc.name, + desc.client_info.desc.clk); + + d_vpr_h("%s: type(%d) pri(%d) pvt(%pK) notifier(%pK)\n", + __func__, + desc.client_type, + desc.priority, + desc.pvt_data, + desc.notifier_callback_fn); + + cl->mmrm_client = mmrm_client_register(&desc); + if (!cl->mmrm_client) { + d_vpr_e("%s: Failed to register clk(%s): %d\n", + __func__, cl->name, rc); + rc = -EINVAL; + goto err_register_mmrm; + } + } + + return 0; + +err_register_mmrm: + __deregister_mmrm(core); + return rc; +} + static int __handle_reset_clk(struct msm_vidc_core *core, int reset_index, enum reset_state state) { @@ -1639,6 +1724,13 @@ static int __init_resources(struct msm_vidc_core *core) goto err_init_clocks; } + rc = __register_mmrm(core); + if (rc) { + d_vpr_e("Failed to register mmrm\n"); + rc = -ENODEV; + goto err_init_mmrm; + } + for (i = 0; i < core->dt->reset_set.count; i++) { rc = __handle_reset_clk(core, i, INIT); if (rc) { @@ -1662,6 +1754,8 @@ static int __init_resources(struct msm_vidc_core *core) err_init_reset_clk: err_init_bus: + __deregister_mmrm(core); +err_init_mmrm: __deinit_clocks(core); err_init_clocks: __deinit_regulators(core); @@ -1672,6 +1766,7 @@ static void __deinit_resources(struct msm_vidc_core *core) { __deinit_subcaches(core); __deinit_bus(core); + __deregister_mmrm(core); __deinit_clocks(core); __deinit_regulators(core); } @@ -1954,7 +2049,7 @@ static int __set_subcaches(struct msm_vidc_core *core) rc = __iface_cmdq_write(core, core->packet); if (rc) goto err_fail_set_subacaches; - + venus_hfi_for_each_subcache(core, sinfo) { if (sinfo->isactive) { sinfo->isset = true; @@ -1963,7 +2058,7 @@ static int __set_subcaches(struct msm_vidc_core *core) sinfo->subcache->slice_size); } } - + core->dt->sys_cache_res_set = true; return 0; From 2480013ad9f8bdb25cfddfa6c88730b2f72d1621 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Wed, 24 Mar 2021 16:48:04 +0530 Subject: [PATCH 0195/1061] video: driver: add 512 alignment support for image session Added 512 alignment support for image encode session. - 8bit(NV12): - stride: ALIGN(width, 512) - scanline: ALIGN(height, 512) - buffer_size: yuv_size - 10bit(P010): - stride: 2 * ALIGN(width, 512) - scanline: ALIGN(height, 512) - buffer_size: 2 * yuv_size. Change-Id: Ie9b71a7f85435ccbe0428c4f98d537c8c677251b Signed-off-by: Govindaraj Rajagopal --- driver/vidc/src/msm_venc.c | 72 +++++++++++++++---------------- driver/vidc/src/msm_vidc_driver.c | 10 +++++ 2 files changed, 46 insertions(+), 36 deletions(-) diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index 9d1faa4f0d..7e60b45ed2 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -1194,49 +1194,50 @@ static int msm_venc_s_fmt_input(struct msm_vidc_inst *inst, struct v4l2_format * int rc = 0; struct v4l2_format *fmt; struct msm_vidc_core *core; - u32 pix_fmt; - u32 crop_width, crop_height; + u32 pix_fmt, width, height, size, bytesperline, + crop_width, crop_height; if (!inst || !inst->core || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } core = inst->core; + pix_fmt = v4l2_colorformat_to_driver(f->fmt.pix_mp.pixelformat, __func__); + msm_vidc_update_cap_value(inst, PIX_FMTS, pix_fmt, __func__); + + if (is_rgba_colorformat(pix_fmt)) { + width = VIDEO_RGB_STRIDE_PIX(f->fmt.pix_mp.pixelformat, f->fmt.pix_mp.width); + height = VIDEO_RGB_SCANLINES(f->fmt.pix_mp.pixelformat, f->fmt.pix_mp.height); + crop_width = VIDEO_RGB_STRIDE_PIX(f->fmt.pix_mp.pixelformat, inst->crop.width); + crop_height = VIDEO_RGB_SCANLINES(f->fmt.pix_mp.pixelformat, inst->crop.height); + bytesperline = + VIDEO_RGB_STRIDE_BYTES(f->fmt.pix_mp.pixelformat, f->fmt.pix_mp.width); + } else if (is_image_session(inst)) { + width = ALIGN(f->fmt.pix_mp.width, HEIC_GRID_DIMENSION); + height = ALIGN(f->fmt.pix_mp.height, HEIC_GRID_DIMENSION); + crop_width = ALIGN(inst->crop.width, HEIC_GRID_DIMENSION); + crop_height = ALIGN(inst->crop.height, HEIC_GRID_DIMENSION); + bytesperline = width * (is_10bit_colorformat(pix_fmt) ? 2 : 1); + } else { + width = VIDEO_Y_STRIDE_PIX(f->fmt.pix_mp.pixelformat, f->fmt.pix_mp.width); + height = VIDEO_Y_SCANLINES(f->fmt.pix_mp.pixelformat, f->fmt.pix_mp.height); + crop_width = VIDEO_Y_STRIDE_PIX(f->fmt.pix_mp.pixelformat, inst->crop.width); + crop_height = VIDEO_Y_SCANLINES(f->fmt.pix_mp.pixelformat, inst->crop.height); + bytesperline = VIDEO_Y_STRIDE_BYTES(f->fmt.pix_mp.pixelformat, f->fmt.pix_mp.width); + } fmt = &inst->fmts[INPUT_PORT]; fmt->type = INPUT_MPLANE; - fmt->fmt.pix_mp.pixelformat = f->fmt.pix_mp.pixelformat; - pix_fmt = v4l2_colorformat_to_driver(f->fmt.pix_mp.pixelformat, __func__); - msm_vidc_update_cap_value(inst, PIX_FMTS, pix_fmt, __func__); - if (is_rgba_colorformat(pix_fmt)) { - fmt->fmt.pix_mp.width = VIDEO_RGB_STRIDE_PIX(fmt->fmt.pix_mp.pixelformat, - f->fmt.pix_mp.width); - fmt->fmt.pix_mp.height = VIDEO_RGB_SCANLINES(fmt->fmt.pix_mp.pixelformat, - f->fmt.pix_mp.height); - fmt->fmt.pix_mp.plane_fmt[0].bytesperline = - VIDEO_RGB_STRIDE_BYTES(fmt->fmt.pix_mp.pixelformat, - f->fmt.pix_mp.width); - crop_width = VIDEO_RGB_STRIDE_PIX( - fmt->fmt.pix_mp.pixelformat, inst->crop.width); - crop_height = VIDEO_RGB_SCANLINES( - fmt->fmt.pix_mp.pixelformat, inst->crop.height); - } else { - fmt->fmt.pix_mp.width = VIDEO_Y_STRIDE_PIX(fmt->fmt.pix_mp.pixelformat, - f->fmt.pix_mp.width); - fmt->fmt.pix_mp.height = VIDEO_Y_SCANLINES(fmt->fmt.pix_mp.pixelformat, - f->fmt.pix_mp.height); - fmt->fmt.pix_mp.plane_fmt[0].bytesperline = - VIDEO_Y_STRIDE_BYTES(fmt->fmt.pix_mp.pixelformat, - f->fmt.pix_mp.width); - crop_width = VIDEO_Y_STRIDE_PIX( - fmt->fmt.pix_mp.pixelformat, inst->crop.width); - crop_height = VIDEO_Y_SCANLINES( - fmt->fmt.pix_mp.pixelformat, inst->crop.height); - } - + fmt->fmt.pix_mp.width = width; + fmt->fmt.pix_mp.height = height; fmt->fmt.pix_mp.num_planes = 1; - fmt->fmt.pix_mp.plane_fmt[0].sizeimage = call_session_op(core, - buffer_size, inst, MSM_VIDC_BUF_INPUT); + fmt->fmt.pix_mp.pixelformat = f->fmt.pix_mp.pixelformat; + fmt->fmt.pix_mp.plane_fmt[0].bytesperline = bytesperline; + if (is_image_session(inst)) + size = bytesperline * height * 3 / 2; + else + size = call_session_op(core, buffer_size, inst, MSM_VIDC_BUF_INPUT); + fmt->fmt.pix_mp.plane_fmt[0].sizeimage = size; fmt->fmt.pix_mp.colorspace = f->fmt.pix_mp.colorspace; fmt->fmt.pix_mp.xfer_func = f->fmt.pix_mp.xfer_func; fmt->fmt.pix_mp.ycbcr_enc = f->fmt.pix_mp.ycbcr_enc; @@ -1252,8 +1253,7 @@ static int msm_venc_s_fmt_input(struct msm_vidc_inst *inst, struct v4l2_format * inst->buffers.input.min_count + inst->buffers.input.extra_count; } - inst->buffers.input.size = - fmt->fmt.pix_mp.plane_fmt[0].sizeimage; + inst->buffers.input.size = size; if (fmt->fmt.pix_mp.width != crop_width || fmt->fmt.pix_mp.height != crop_height) { @@ -1264,7 +1264,7 @@ static int msm_venc_s_fmt_input(struct msm_vidc_inst *inst, struct v4l2_format * inst->crop.height = f->fmt.pix_mp.height; /* reset compose dimensions with updated resolution */ - inst->compose.top = inst->crop.left = 0; + inst->compose.top = inst->compose.left = 0; inst->compose.width = f->fmt.pix_mp.width; inst->compose.height = f->fmt.pix_mp.height; diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 08b46e4e2f..b07bbc438e 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -3960,6 +3960,16 @@ int msm_vidc_check_session_supported(struct msm_vidc_inst *inst) goto exit; } + /* is input grid aligned */ + fmt = &inst->fmts[INPUT_PORT]; + allow = IS_ALIGNED(fmt->fmt.pix_mp.width, HEIC_GRID_DIMENSION); + allow &= IS_ALIGNED(fmt->fmt.pix_mp.height, HEIC_GRID_DIMENSION); + if (!allow) { + i_vpr_e(inst, "%s: input is not grid aligned: %u x %u\n", __func__, + fmt->fmt.pix_mp.width, fmt->fmt.pix_mp.height); + goto exit; + } + /* is output grid dimension */ fmt = &inst->fmts[OUTPUT_PORT]; allow = fmt->fmt.pix_mp.width == HEIC_GRID_DIMENSION; From 74b6d6720533cfbe2f7b1f472d2783fe08171263 Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Wed, 24 Mar 2021 12:29:45 -0700 Subject: [PATCH 0196/1061] video: driver: remove release of dpb buffers remove release of dpb buffers as part of start of output port. handle watchdog interrupt incase of page fault Change-Id: Idaccbcaa92d4835dea2da3d8b6f645114baa338a Signed-off-by: Darshana Patil --- driver/vidc/inc/venus_hfi_response.h | 4 ++++ driver/vidc/src/msm_vdec.c | 16 ---------------- driver/vidc/src/venus_hfi.c | 3 +++ driver/vidc/src/venus_hfi_response.c | 2 +- 4 files changed, 8 insertions(+), 17 deletions(-) diff --git a/driver/vidc/inc/venus_hfi_response.h b/driver/vidc/inc/venus_hfi_response.h index bd87e513d3..f699022dfb 100644 --- a/driver/vidc/inc/venus_hfi_response.h +++ b/driver/vidc/inc/venus_hfi_response.h @@ -6,6 +6,8 @@ #ifndef __VENUS_HFI_RESPONSE_H__ #define __VENUS_HFI_RESPONSE_H__ +#include "hfi_packet.h" + int handle_response(struct msm_vidc_core *core, void *response); int validate_packet(u8 *response_pkt, u8 *core_resp_pkt, @@ -17,5 +19,7 @@ bool is_valid_hfi_buffer_type(struct msm_vidc_inst *inst, void handle_session_response_work_handler(struct work_struct *work); int handle_session_response_work(struct msm_vidc_inst *inst, struct response_work *work); +int handle_system_error(struct msm_vidc_core *core, + struct hfi_packet *pkt); #endif // __VENUS_HFI_RESPONSE_H__ diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 07bb5ce85e..95cb2fd42a 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -954,18 +954,6 @@ static int msm_vdec_release_input_internal_buffers(struct msm_vidc_inst *inst) return 0; } -static int msm_vdec_release_output_internal_buffers(struct msm_vidc_inst *inst) -{ - int rc = 0; - - i_vpr_h(inst, "%s()\n",__func__); - rc = msm_vidc_release_internal_buffers(inst, MSM_VIDC_BUF_DPB); - if (rc) - return rc; - - return 0; -} - static int msm_vdec_subscribe_input_port_settings_change(struct msm_vidc_inst *inst, enum msm_vidc_port_type port) { @@ -1735,10 +1723,6 @@ int msm_vdec_streamon_output(struct msm_vidc_inst *inst) if (rc) goto error; - rc = msm_vdec_release_output_internal_buffers(inst); - if (rc) - goto error; - rc = msm_vdec_create_output_internal_buffers(inst); if (rc) goto error; diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index ec8378a7ee..d8cbf09238 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -2522,6 +2522,9 @@ static int __response_handler(struct msm_vidc_core *core) { int rc = 0; + if (call_venus_op(core, watchdog, core, core->intr_status)) + return handle_system_error(core, NULL); + memset(core->response_packet, 0, core->packet_size); while (!__iface_msgq_read(core, core->response_packet)) { rc = handle_response(core, core->response_packet); diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index f1b4a89008..8cbc836b5c 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -310,7 +310,7 @@ static int handle_session_error(struct msm_vidc_inst *inst, return rc; } -static int handle_system_error(struct msm_vidc_core *core, +int handle_system_error(struct msm_vidc_core *core, struct hfi_packet *pkt) { d_vpr_e("%s: system error received\n", __func__); From a7bdc410ef81e69cb376c8ee6307bd6bf7dfb06b Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Thu, 25 Mar 2021 16:03:15 +0530 Subject: [PATCH 0197/1061] video: driver: add support to print noc error log registers Added support to print noc error log registers at below places. - smmu_fault_handler path - handle_system_error path. Change-Id: I9e195bd82a2058f533df8713368e61f57b537b87 Signed-off-by: Govindaraj Rajagopal --- driver/variant/iris2/src/msm_vidc_iris2.c | 10 +++++---- driver/vidc/inc/venus_hfi.h | 1 + driver/vidc/src/msm_vidc_driver.c | 3 +++ driver/vidc/src/venus_hfi.c | 25 +++++++++++++++++++++++ driver/vidc/src/venus_hfi_response.c | 1 + 5 files changed, 36 insertions(+), 4 deletions(-) diff --git a/driver/variant/iris2/src/msm_vidc_iris2.c b/driver/variant/iris2/src/msm_vidc_iris2.c index 9a29e9b15b..96ec45aa80 100644 --- a/driver/variant/iris2/src/msm_vidc_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_iris2.c @@ -387,8 +387,12 @@ static int __noc_error_info_iris2(struct msm_vidc_core *vidc_core) return -EINVAL; } - //if (core->res->vpu_ver == VPU_VERSION_IRIS2_1) - // return; + /* check ErrLog registers contain valid info */ + if (!__read_register(core, VCODEC_NOC_ERL_MAIN_ERRVLD_LOW)) { + d_vpr_e("%s: VCODEC_NOC_ERL_MAIN_ERRVLD_LOW bit not-set\n", __func__); + /* todo: uncomment below line after validation */ + //return 0; + } val = __read_register(core, VCODEC_NOC_ERL_MAIN_SWID_LOW); d_vpr_e("VCODEC_NOC_ERL_MAIN_SWID_LOW: %#x\n", val); @@ -396,8 +400,6 @@ static int __noc_error_info_iris2(struct msm_vidc_core *vidc_core) d_vpr_e("VCODEC_NOC_ERL_MAIN_SWID_HIGH: %#x\n", val); val = __read_register(core, VCODEC_NOC_ERL_MAIN_MAINCTL_LOW); d_vpr_e("VCODEC_NOC_ERL_MAIN_MAINCTL_LOW: %#x\n", val); - val = __read_register(core, VCODEC_NOC_ERL_MAIN_ERRVLD_LOW); - d_vpr_e("VCODEC_NOC_ERL_MAIN_ERRVLD_LOW: %#x\n", val); val = __read_register(core, VCODEC_NOC_ERL_MAIN_ERRCLR_LOW); d_vpr_e("VCODEC_NOC_ERL_MAIN_ERRCLR_LOW: %#x\n", val); val = __read_register(core, VCODEC_NOC_ERL_MAIN_ERRLOG0_LOW); diff --git a/driver/vidc/inc/venus_hfi.h b/driver/vidc/inc/venus_hfi.h index 5273edbe50..6a52b80240 100644 --- a/driver/vidc/inc/venus_hfi.h +++ b/driver/vidc/inc/venus_hfi.h @@ -46,6 +46,7 @@ int venus_hfi_session_open(struct msm_vidc_inst *inst); int venus_hfi_session_set_codec(struct msm_vidc_inst *inst); int venus_hfi_core_init(struct msm_vidc_core *core); int venus_hfi_core_deinit(struct msm_vidc_core *core); +int venus_print_noc_error_info(struct msm_vidc_core *core); int venus_hfi_suspend(struct msm_vidc_core *core); int venus_hfi_scale_clocks(struct msm_vidc_inst* inst, u64 freq); int venus_hfi_scale_buses(struct msm_vidc_inst* inst, u64 bw_ddr, u64 bw_llcc); diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 08b46e4e2f..5a862076e3 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -3410,6 +3410,9 @@ void msm_vidc_smmu_fault_work_handler(struct work_struct *work) return; } + /* print noc error log registers */ + venus_print_noc_error_info(core); + core_lock(core, __func__); list_for_each_entry(inst, &core->instances, list) instances[num_instances++] = inst; diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index 119df4a8f0..31d93ebe2e 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -2844,6 +2844,31 @@ int venus_hfi_core_deinit(struct msm_vidc_core *core) return 0; } +int venus_print_noc_error_info(struct msm_vidc_core *core) +{ + if (!core) { + d_vpr_e("%s: Invalid parameters: %pK\n", + __func__, core); + return -EINVAL; + } + + if (!core->capabilities[NON_FATAL_FAULTS].value) + return 0; + + core_lock(core, __func__); + /* resume venus before accessing noc registers */ + if (__resume(core)) { + d_vpr_e("%s: Power on failed\n", __func__); + goto unlock; + } + + call_venus_op(core, noc_error_info, core); + +unlock: + core_unlock(core, __func__); + return 0; +} + int venus_hfi_suspend(struct msm_vidc_core *core) { int rc = 0; diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index f1b4a89008..8e223d9e6e 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -315,6 +315,7 @@ static int handle_system_error(struct msm_vidc_core *core, { d_vpr_e("%s: system error received\n", __func__); print_sfr_message(core); + venus_print_noc_error_info(core); msm_vidc_core_deinit(core, true); return 0; } From 2abe166e6b157422a8d839a43add30e9b3e281aa Mon Sep 17 00:00:00 2001 From: Qiwei Liu Date: Thu, 25 Mar 2021 22:16:59 +0800 Subject: [PATCH 0198/1061] msm: vidc: fix bus undervoting issues Fix bus undervoting when turbo mode enabled. Remove kbps_to_icc conversion as the calculated bandwidth is already kBps. Fix log printing for bandwidth unit. Change-Id: I18a384f6d2f8914839af3eba84fd92953db3986c Signed-off-by: Qiwei Liu --- driver/vidc/src/msm_vidc_power.c | 2 +- driver/vidc/src/venus_hfi.c | 10 +++++----- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/driver/vidc/src/msm_vidc_power.c b/driver/vidc/src/msm_vidc_power.c index 67e36b894a..c887defc49 100644 --- a/driver/vidc/src/msm_vidc_power.c +++ b/driver/vidc/src/msm_vidc_power.c @@ -318,11 +318,11 @@ int msm_vidc_scale_buses(struct msm_vidc_inst *inst) call_session_op(core, calc_bw, inst, vote_data); - inst->power.power_mode = vote_data->power_mode; inst->power.ddr_bw = vote_data->calc_bw_ddr; inst->power.sys_cache_bw = vote_data->calc_bw_llcc; set_buses: + inst->power.power_mode = vote_data->power_mode; rc = msm_vidc_set_buses(inst); if (rc) return rc; diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index 119df4a8f0..f13e290b1d 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -479,11 +479,11 @@ static int __vote_bandwidth(struct bus_info *bus, { int rc = 0; - d_vpr_p("Voting bus %s to ab %llu kbps\n", bus->name, kbps_to_icc(bw_kbps)); - rc = icc_set_bw(bus->path, kbps_to_icc(bw_kbps), 0); + d_vpr_p("Voting bus %s to ab %llu kBps\n", bus->name, bw_kbps); + rc = icc_set_bw(bus->path, bw_kbps, 0); if (rc) d_vpr_e("Failed voting bus %s to ab %llu, rc=%d\n", - bus->name, kbps_to_icc(bw_kbps), rc); + bus->name, bw_kbps, rc); return rc; } @@ -535,8 +535,8 @@ static int __vote_buses(struct msm_vidc_core *core, bus->range[0], bus->range[1]); if (TRIVIAL_BW_CHANGE(bw_kbps, bw_prev) && bw_prev) { - d_vpr_l("Skip voting bus %s to %llu bps\n", - bus->name, bw_kbps * 1000); + d_vpr_l("Skip voting bus %s to %llu kBps\n", + bus->name, bw_kbps); continue; } From 14efc2a0bca4f556590a5075ec2c1a7cea3a5fa5 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Tue, 23 Mar 2021 12:10:12 -0700 Subject: [PATCH 0199/1061] video: driver: Add support to advanced bitrate ctrls Add support to below properties: - HFI_PROP_BITRATE_BOOST - HFI_PROP_CONTENT_ADAPTIVE_CODING - HFI_PROP_MAINTAIN_MIN_QUALITY - HFI_PROP_VBV_DELAY - HFI_PROP_TOTAL_PEAK_BITRATE - HFI_PROP_BITRATE_LAYERx. Change-Id: I1072f97c7c202c7f4fc38c26e0ab9274ae06fce0 Signed-off-by: Akshata Sahukar --- driver/platform/waipio/src/msm_vidc_waipio.c | 189 ++++++++----- driver/vidc/inc/msm_vidc_control.h | 8 + driver/vidc/inc/msm_vidc_internal.h | 9 +- driver/vidc/src/msm_vidc_control.c | 253 ++++++++++++++++++ driver/vidc/src/msm_vidc_driver.c | 8 +- .../uapi/vidc/media/v4l2_vidc_extensions.h | 2 + 6 files changed, 395 insertions(+), 74 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index dc3442112a..67396caa76 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -19,6 +19,7 @@ #define MIN_CHROMA_QP_OFFSET -12 #define MAX_CHROMA_QP_OFFSET 0 #define MAX_BITRATE 220000000 +#define DEFAULT_BITRATE 20000000 #define MIN_QP_10BIT -12 #define MIN_QP_8BIT 0 #define MAX_QP 51 @@ -308,12 +309,12 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { * Dec: there's no use of Bitrate cap */ {BIT_RATE, ENC, H264|HEVC, - 1, 220000000, 1, 20000000, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_BITRATE, HFI_PROP_TOTAL_BITRATE, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - NULL, msm_vidc_set_u32}, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, + {ENH_LAYER_COUNT, BITRATE_MODE}, {PEAK_BITRATE}, + msm_vidc_adjust_bitrate, msm_vidc_set_bitrate}, {BITRATE_MODE, ENC, H264, V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, @@ -326,7 +327,8 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {LTR_COUNT, IR_RANDOM, TIME_DELTA_BASED_RC, I_FRAME_QP, - ENH_LAYER_COUNT}, + ENH_LAYER_COUNT, BIT_RATE, CONTENT_ADAPTIVE_CODING, + BITRATE_BOOST, MIN_QUALITY, VBV_DELAY, PEAK_BITRATE}, msm_vidc_adjust_bitrate_mode, msm_vidc_set_u32_enum}, {BITRATE_MODE, ENC, HEVC, @@ -340,8 +342,11 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { HFI_PROP_RATE_CONTROL, CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, - {LTR_COUNT, IR_RANDOM, TIME_DELTA_BASED_RC, - I_FRAME_QP, CONSTANT_QUALITY, ENH_LAYER_COUNT}, + {LTR_COUNT, IR_RANDOM, TIME_DELTA_BASED_RC, I_FRAME_QP, + CONSTANT_QUALITY, ENH_LAYER_COUNT, + CONTENT_ADAPTIVE_CODING, BIT_RATE, + BITRATE_BOOST, MIN_QUALITY, VBV_DELAY, + PEAK_BITRATE}, msm_vidc_adjust_bitrate_mode, msm_vidc_set_u32_enum}, {LOSSLESS, ENC, HEVC|HEIC, @@ -496,17 +501,49 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 1, V4L2_MPEG_MSM_VIDC_ENABLE, V4L2_CID_MPEG_VIDC_CONTENT_ADAPTIVE_CODING, HFI_PROP_CONTENT_ADAPTIVE_CODING, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + CAP_FLAG_OUTPUT_PORT, + {BITRATE_MODE}, {0}, + NULL, msm_vidc_set_vbr_related_properties}, {BITRATE_BOOST, ENC, H264|HEVC, - 0, 100, 25, 25, + 0, 50, 25, 25, V4L2_CID_MPEG_VIDC_QUALITY_BITRATE_BOOST, HFI_PROP_BITRATE_BOOST, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + CAP_FLAG_OUTPUT_PORT, + {BITRATE_MODE}, + {0}, + NULL, msm_vidc_set_vbr_related_properties}, + + {MIN_QUALITY, ENC, H264|HEVC, + 0, 80, 80, 80, + V4L2_CID_MPEG_VIDC_MIN_QUALITY, + HFI_PROP_MAINTAIN_MIN_QUALITY, + CAP_FLAG_OUTPUT_PORT, + {BITRATE_MODE}, + {0}, + NULL, msm_vidc_set_vbr_related_properties}, {VBV_DELAY, ENC, H264|HEVC, - 0, 1000, 500, 0, - V4L2_CID_MPEG_VIDEO_VBV_DELAY}, + 500, 2000, 500, 500, + V4L2_CID_MPEG_VIDEO_VBV_DELAY, + HFI_PROP_VBV_DELAY, + CAP_FLAG_OUTPUT_PORT, + {BITRATE_MODE}, + {0}, + NULL, msm_vidc_set_cbr_related_properties}, + + {PEAK_BITRATE, ENC, H264|HEVC, + /* default peak bitrate is 10% larger than avrg bitrate */ + 1, MAX_BITRATE, 1, + (DEFAULT_BITRATE + + (DEFAULT_BITRATE / PERCENT_PEAK_BITRATE_INCREASED)), + V4L2_CID_MPEG_VIDEO_BITRATE_PEAK, + HFI_PROP_TOTAL_PEAK_BITRATE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, + {BITRATE_MODE, BIT_RATE}, + {0}, + msm_vidc_adjust_peak_bitrate, + msm_vidc_set_cbr_related_properties}, {MIN_FRAME_QP, ENC, H264, MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, @@ -627,42 +664,6 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { MIN_QP_8BIT, MAX_QP, 1, DEFAULT_QP, V4L2_CID_MPEG_VIDEO_H264_B_FRAME_QP}, - {L0_QP, ENC, HEVC, - 0, 51, 1, 20, - V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L0_QP, - HFI_PROP_QP_PACKED, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, - - {L1_QP, ENC, HEVC, - 0, 51, 1, 20, - V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L1_QP, - HFI_PROP_QP_PACKED, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, - - {L2_QP, ENC, HEVC, - 0, 51, 1, 20, - V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L2_QP, - HFI_PROP_QP_PACKED, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, - - {L3_QP, ENC, HEVC, - 0, 51, 1, 20, - V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L3_QP, - HFI_PROP_QP_PACKED, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, - - {L4_QP, ENC, HEVC, - 0, 51, 1, 20, - V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L4_QP, - HFI_PROP_QP_PACKED, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, - - {L5_QP, ENC, HEVC, - 0, 51, 1, 20, - V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L5_QP, - HFI_PROP_QP_PACKED, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, - {HIER_LAYER_QP, ENC, H264, 0, 0x0060033, 1, 20, V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_LAYER_QP, @@ -701,7 +702,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { HFI_PROP_LAYER_COUNT, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, {BITRATE_MODE}, - {GOP_SIZE, B_FRAME}, + {GOP_SIZE, B_FRAME, BIT_RATE}, msm_vidc_adjust_layer_count, msm_vidc_set_layer_count_and_type}, {ENH_LAYER_COUNT, ENC, H264, @@ -710,44 +711,108 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { HFI_PROP_LAYER_COUNT, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, {BITRATE_MODE}, - {GOP_SIZE, B_FRAME}, + {GOP_SIZE, B_FRAME, BIT_RATE}, msm_vidc_adjust_layer_count, msm_vidc_set_layer_count_and_type}, + /* + * layer bitrate is treated as BIT_RATE cap sibling and + * is handled in bitrate adjust and set functions + */ {L0_BR, ENC, HEVC, - 1, 220000000, 1, 20000000, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L0_BR, HFI_PROP_BITRATE_LAYER1, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + msm_vidc_adjust_bitrate, msm_vidc_set_bitrate}, {L1_BR, ENC, HEVC, - 1, 220000000, 1, 20000000, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L1_BR, HFI_PROP_BITRATE_LAYER2, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + msm_vidc_adjust_bitrate, msm_vidc_set_bitrate}, {L2_BR, ENC, HEVC, - 1, 220000000, 1, 20000000, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L2_BR, HFI_PROP_BITRATE_LAYER3, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + msm_vidc_adjust_bitrate, msm_vidc_set_bitrate}, {L3_BR, ENC, HEVC, - 1, 220000000, 1, 20000000, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L3_BR, HFI_PROP_BITRATE_LAYER4, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + msm_vidc_adjust_bitrate, msm_vidc_set_bitrate}, {L4_BR, ENC, HEVC, - 1, 220000000, 1, 20000000, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L4_BR, HFI_PROP_BITRATE_LAYER5, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + msm_vidc_adjust_bitrate, msm_vidc_set_bitrate}, {L5_BR, ENC, HEVC, - 1, 220000000, 1, 20000000, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L5_BR, HFI_PROP_BITRATE_LAYER6, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + msm_vidc_adjust_bitrate, msm_vidc_set_bitrate}, + + {L0_BR, ENC, H264, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L0_BR, + HFI_PROP_BITRATE_LAYER1, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + msm_vidc_adjust_bitrate, msm_vidc_set_bitrate}, + + {L1_BR, ENC, H264, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L1_BR, + HFI_PROP_BITRATE_LAYER2, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + msm_vidc_adjust_bitrate, msm_vidc_set_bitrate}, + + {L2_BR, ENC, H264, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L2_BR, + HFI_PROP_BITRATE_LAYER3, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + msm_vidc_adjust_bitrate, msm_vidc_set_bitrate}, + + {L3_BR, ENC, H264, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L3_BR, + HFI_PROP_BITRATE_LAYER4, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + msm_vidc_adjust_bitrate, msm_vidc_set_bitrate}, + + {L4_BR, ENC, H264, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L4_BR, + HFI_PROP_BITRATE_LAYER5, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + msm_vidc_adjust_bitrate, msm_vidc_set_bitrate}, + + {L5_BR, ENC, H264, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L5_BR, + HFI_PROP_BITRATE_LAYER6, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + msm_vidc_adjust_bitrate, msm_vidc_set_bitrate}, {ENTROPY_MODE, ENC, H264, V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC, diff --git a/driver/vidc/inc/msm_vidc_control.h b/driver/vidc/inc/msm_vidc_control.h index 125aee6111..be8a307604 100644 --- a/driver/vidc/inc/msm_vidc_control.h +++ b/driver/vidc/inc/msm_vidc_control.h @@ -31,6 +31,8 @@ int msm_vidc_adjust_transform_8x8(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_layer_count(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_gop_size(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_b_frame(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_bitrate(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_peak_bitrate(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_hevc_min_qp(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_hevc_max_qp(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_hevc_frame_qp(void *instance, struct v4l2_ctrl *ctrl); @@ -56,12 +58,18 @@ int msm_vidc_set_layer_count_and_type(void *instance, enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_gop_size(void *instance, enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_bitrate(void *instance, + enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_u32(void *instance, enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_u32_enum(void *instance, enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_constant_quality(void *instance, enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_vbr_related_properties( + void *instance, enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_cbr_related_properties(void *instance, + enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_use_and_mark_ltr(void *instance, enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_nal_length(void* instance, diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 10e20e9f03..10b0ac9b7d 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -55,6 +55,7 @@ #define MAX_HEVC_ENH_LAYER_SLIDING_WINDOW 5 #define MAX_AVC_ENH_LAYER_SLIDING_WINDOW 3 #define MAX_AVC_ENH_LAYER_HYBRID_HP 5 +#define PERCENT_PEAK_BITRATE_INCREASED 10 /* TODO * #define MAX_SUPERFRAME_COUNT 32 @@ -360,7 +361,9 @@ enum msm_vidc_inst_capability_type { TIME_DELTA_BASED_RC, CONTENT_ADAPTIVE_CODING, BITRATE_BOOST, + MIN_QUALITY, VBV_DELAY, + PEAK_BITRATE, MIN_FRAME_QP, I_FRAME_MIN_QP, P_FRAME_MIN_QP, @@ -373,12 +376,6 @@ enum msm_vidc_inst_capability_type { I_FRAME_QP, P_FRAME_QP, B_FRAME_QP, - L0_QP, - L1_QP, - L2_QP, - L3_QP, - L4_QP, - L5_QP, HIER_LAYER_QP, LAYER_TYPE, LAYER_ENABLE, diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index cccb9bf549..904def341c 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -1241,6 +1241,135 @@ exit: return 0; } +int msm_vidc_adjust_bitrate(void *instance, struct v4l2_ctrl *ctrl) +{ + int i; + struct msm_vidc_inst_capability *capability; + s32 adjusted_value; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + s32 rc_type = -1, enh_layer_count = -1; + u32 cap_id = 0, cumulative_bitrate = 0; + bool layer_bitrate_set = false; + u32 layer_br_caps[6] = {L0_BR, L1_BR, L2_BR, L3_BR, L4_BR, L5_BR}; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + adjusted_value = ctrl ? ctrl->val : + capability->cap[BIT_RATE].value; + + /* ignore layer bitrate when total bitrate is set */ + if (capability->cap[BIT_RATE].flags & CAP_FLAG_CLIENT_SET) + goto exit; + + if (msm_vidc_get_parent_value(inst, BIT_RATE, + ENH_LAYER_COUNT, &enh_layer_count, __func__)) + return -EINVAL; + + if (msm_vidc_get_parent_value(inst, BIT_RATE, + BITRATE_MODE, &rc_type, __func__)) + return -EINVAL; + + /* + * ENH_LAYER_COUNT cap max is positive only if + * layer encoding is enabled for static setting + */ + if (capability->cap[ENH_LAYER_COUNT].max) { + layer_bitrate_set = true; + for (i = 0; i <= enh_layer_count; i++) { + if (i >= ARRAY_SIZE(layer_br_caps)) + break; + cap_id = layer_br_caps[i]; + if (!(capability->cap[cap_id].flags & CAP_FLAG_CLIENT_SET)) { + layer_bitrate_set = false; + break; + } + cumulative_bitrate += capability->cap[cap_id].value; + } + + /* layer bitrate supported only for CBR rc */ + if (layer_bitrate_set && + (rc_type == HFI_RC_CBR_CFR || rc_type == HFI_RC_CBR_VFR)) { + if (cumulative_bitrate > capability->cap[BIT_RATE].max) + cumulative_bitrate = + capability->cap[BIT_RATE].max; + adjusted_value = cumulative_bitrate; + i_vpr_h(inst, + "%s: update BIT_RATE with cumulative bitrate\n", + __func__); + } + } else { + for (i = 0; i < sizeof(layer_br_caps) / sizeof(u32); i++) { + if (i >= ARRAY_SIZE(layer_br_caps)) + break; + cap_id = layer_br_caps[i]; + /* + * layer bitrate cannot be set + * when layer encoding is disabled + */ + if (capability->cap[cap_id].flags & + CAP_FLAG_CLIENT_SET) { + i_vpr_e(inst, + "%s: invalid layer bitrate set\n", + __func__); + return -EINVAL; + } + } + } + +exit: + msm_vidc_update_cap_value(inst, BIT_RATE, + adjusted_value, __func__); + return 0; +} + +int msm_vidc_adjust_peak_bitrate(void *instance, struct v4l2_ctrl *ctrl) +{ + struct msm_vidc_inst_capability *capability; + s32 adjusted_value; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + s32 rc_type = -1, bitrate = -1; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + adjusted_value = ctrl ? ctrl->val : + capability->cap[PEAK_BITRATE].value; + + if (msm_vidc_get_parent_value(inst, PEAK_BITRATE, + BITRATE_MODE, &rc_type, __func__)) + return -EINVAL; + + if (rc_type != HFI_RC_CBR_CFR && + rc_type != HFI_RC_CBR_VFR) + return 0; + + if (msm_vidc_get_parent_value(inst, PEAK_BITRATE, + BIT_RATE, &bitrate, __func__)) + return -EINVAL; + + /* Peak Bitrate should be larger than or equal to avg bitrate */ + if (capability->cap[PEAK_BITRATE].flags & CAP_FLAG_CLIENT_SET) { + if (adjusted_value < bitrate) + adjusted_value = bitrate; + } else { + adjusted_value = capability->cap[BIT_RATE].value + + (capability->cap[BIT_RATE].value / + PERCENT_PEAK_BITRATE_INCREASED); + } + + msm_vidc_update_cap_value(inst, PEAK_BITRATE, + adjusted_value, __func__); + + return 0; +} + int msm_vidc_adjust_hevc_min_qp(void *instance, struct v4l2_ctrl *ctrl) { int rc = 0; @@ -1449,6 +1578,63 @@ int msm_vidc_set_constant_quality(void *instance, return rc; } +int msm_vidc_set_vbr_related_properties(void *instance, + enum msm_vidc_inst_capability_type cap_id) +{ + int rc = 0; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; + u32 hfi_value = 0; + s32 rc_type = -1; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (msm_vidc_get_parent_value(inst, cap_id, + BITRATE_MODE, &rc_type, __func__)) + return -EINVAL; + + if (rc_type != HFI_RC_VBR_CFR) + return 0; + + hfi_value = inst->capabilities->cap[cap_id].value; + + rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32, + &hfi_value, sizeof(u32), __func__); + + return rc; +} + +int msm_vidc_set_cbr_related_properties(void *instance, + enum msm_vidc_inst_capability_type cap_id) +{ + int rc = 0; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; + u32 hfi_value = 0; + s32 rc_type = -1; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (msm_vidc_get_parent_value(inst, cap_id, + BITRATE_MODE, &rc_type, __func__)) + return -EINVAL; + + if (rc_type != HFI_RC_CBR_VFR && + rc_type != HFI_RC_CBR_CFR) + return 0; + + hfi_value = inst->capabilities->cap[cap_id].value; + + rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32, + &hfi_value, sizeof(u32), __func__); + + return rc; +} + int msm_vidc_set_use_and_mark_ltr(void *instance, enum msm_vidc_inst_capability_type cap_id) { @@ -1845,6 +2031,73 @@ int msm_vidc_set_gop_size(void *instance, return rc; } +int msm_vidc_set_bitrate(void *instance, + enum msm_vidc_inst_capability_type cap_id) +{ + int rc = 0, i; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; + u32 hfi_value = 0; + s32 rc_type = -1, enh_layer_count = -1; + u32 layer_br_caps[6] = {L0_BR, L1_BR, L2_BR, L3_BR, L4_BR, L5_BR}; + bool layer_bitrate_set = false; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + /* set Total Bitrate */ + if (inst->capabilities->cap[BIT_RATE].flags & CAP_FLAG_CLIENT_SET) + goto set_total_bitrate; + + if (msm_vidc_get_parent_value(inst, BIT_RATE, + ENH_LAYER_COUNT, &enh_layer_count, __func__)) + return -EINVAL; + + if (msm_vidc_get_parent_value(inst, BIT_RATE, + BITRATE_MODE, &rc_type, __func__)) + return -EINVAL; + + if (inst->capabilities->cap[ENH_LAYER_COUNT].max && + (rc_type == HFI_RC_CBR_CFR || + rc_type == HFI_RC_CBR_VFR)) { + layer_bitrate_set = true; + for (i = 0; i <= enh_layer_count; i++) { + if (i >= ARRAY_SIZE(layer_br_caps)) + break; + cap_id = layer_br_caps[i]; + if (!(inst->capabilities->cap[cap_id].flags & + CAP_FLAG_CLIENT_SET)) { + layer_bitrate_set = false; + break; + } + } + + if (layer_bitrate_set) { + /* set Layer Bitrate */ + for (i = 0; i <= enh_layer_count; i++) { + if (i >= ARRAY_SIZE(layer_br_caps)) + break; + cap_id = layer_br_caps[i]; + hfi_value = inst->capabilities->cap[cap_id].value; + rc = msm_vidc_packetize_control(inst, cap_id, + HFI_PAYLOAD_U32, &hfi_value, + sizeof(u32), __func__); + if (rc) + return rc; + } + goto exit; + } + } + +set_total_bitrate: + hfi_value = inst->capabilities->cap[BIT_RATE].value; + rc = msm_vidc_packetize_control(inst, BIT_RATE, HFI_PAYLOAD_U32, + &hfi_value, sizeof(u32), __func__); +exit: + return rc; +} + /* TODO int msm_vidc_set_flip(void *instance, enum msm_vidc_inst_capability_type cap_id) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index bedd77c8c6..4af49b9b30 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -103,7 +103,9 @@ static const struct msm_vidc_cap_name cap_name_arr[] = { {TIME_DELTA_BASED_RC, "TIME_DELTA_BASED_RC" }, {CONTENT_ADAPTIVE_CODING, "CONTENT_ADAPTIVE_CODING" }, {BITRATE_BOOST, "BITRATE_BOOST" }, + {MIN_QUALITY, "MIN_QUALITY" }, {VBV_DELAY, "VBV_DELAY" }, + {PEAK_BITRATE, "PEAK_BITRATE" }, {MIN_FRAME_QP, "MIN_FRAME_QP" }, {I_FRAME_MIN_QP, "I_FRAME_MIN_QP" }, {P_FRAME_MIN_QP, "P_FRAME_MIN_QP" }, @@ -116,12 +118,6 @@ static const struct msm_vidc_cap_name cap_name_arr[] = { {I_FRAME_QP, "I_FRAME_QP" }, {P_FRAME_QP, "P_FRAME_QP" }, {B_FRAME_QP, "B_FRAME_QP" }, - {L0_QP, "L0_QP" }, - {L1_QP, "L1_QP" }, - {L2_QP, "L2_QP" }, - {L3_QP, "L3_QP" }, - {L4_QP, "L4_QP" }, - {L5_QP, "L5_QP" }, {HIER_LAYER_QP, "HIER_LAYER_QP" }, {LAYER_TYPE, "LAYER_TYPE" }, {LAYER_ENABLE, "LAYER_ENABLE" }, diff --git a/include/uapi/vidc/media/v4l2_vidc_extensions.h b/include/uapi/vidc/media/v4l2_vidc_extensions.h index f363ae6c00..b8b7bfd8ee 100644 --- a/include/uapi/vidc/media/v4l2_vidc_extensions.h +++ b/include/uapi/vidc/media/v4l2_vidc_extensions.h @@ -147,6 +147,8 @@ enum v4l2_mpeg_vidc_blur_types { /* Encoder Input Compression Ratio control */ #define V4L2_CID_MPEG_VIDC_ENC_INPUT_COMPRESSION_RATIO \ (V4L2_CID_MPEG_VIDC_BASE + 0x2C) +#define V4L2_CID_MPEG_VIDC_MIN_QUALITY \ + (V4L2_CID_MPEG_VIDC_BASE + 0x2D) enum v4l2_mpeg_vidc_metapayload_header_flags { METADATA_FLAGS_NONE = 0, From 1524ddc4452c91cc52d7640bc6127da2aaefb7ee Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Fri, 26 Mar 2021 16:09:24 +0530 Subject: [PATCH 0200/1061] video: driver: remove smmu_fault_work_handler Remove separate fault_work_handler and print all needed debug info as part of smmu_fault_handler callback itself, to avoid race between fault handler invocation and core deinit sequence. Change-Id: Ib47e3d457a5a3e33497c71d5920382cb43baed79 Signed-off-by: Govindaraj Rajagopal --- driver/variant/iris2/src/msm_vidc_iris2.c | 9 ++------- driver/vidc/inc/msm_vidc_core.h | 1 - driver/vidc/inc/msm_vidc_driver.h | 2 +- driver/vidc/inc/venus_hfi.h | 2 +- driver/vidc/src/msm_vidc_driver.c | 17 ++++++----------- driver/vidc/src/msm_vidc_probe.c | 1 - driver/vidc/src/venus_hfi.c | 7 +++++-- driver/vidc/src/venus_hfi_response.c | 2 +- 8 files changed, 16 insertions(+), 25 deletions(-) diff --git a/driver/variant/iris2/src/msm_vidc_iris2.c b/driver/variant/iris2/src/msm_vidc_iris2.c index 96ec45aa80..15b52c4b45 100644 --- a/driver/variant/iris2/src/msm_vidc_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_iris2.c @@ -387,19 +387,14 @@ static int __noc_error_info_iris2(struct msm_vidc_core *vidc_core) return -EINVAL; } - /* check ErrLog registers contain valid info */ - if (!__read_register(core, VCODEC_NOC_ERL_MAIN_ERRVLD_LOW)) { - d_vpr_e("%s: VCODEC_NOC_ERL_MAIN_ERRVLD_LOW bit not-set\n", __func__); - /* todo: uncomment below line after validation */ - //return 0; - } - val = __read_register(core, VCODEC_NOC_ERL_MAIN_SWID_LOW); d_vpr_e("VCODEC_NOC_ERL_MAIN_SWID_LOW: %#x\n", val); val = __read_register(core, VCODEC_NOC_ERL_MAIN_SWID_HIGH); d_vpr_e("VCODEC_NOC_ERL_MAIN_SWID_HIGH: %#x\n", val); val = __read_register(core, VCODEC_NOC_ERL_MAIN_MAINCTL_LOW); d_vpr_e("VCODEC_NOC_ERL_MAIN_MAINCTL_LOW: %#x\n", val); + val = __read_register(core, VCODEC_NOC_ERL_MAIN_ERRVLD_LOW); + d_vpr_e("VCODEC_NOC_ERL_MAIN_ERRVLD_LOW: %#x\n", val); val = __read_register(core, VCODEC_NOC_ERL_MAIN_ERRCLR_LOW); d_vpr_e("VCODEC_NOC_ERL_MAIN_ERRCLR_LOW: %#x\n", val); val = __read_register(core, VCODEC_NOC_ERL_MAIN_ERRLOG0_LOW); diff --git a/driver/vidc/inc/msm_vidc_core.h b/driver/vidc/inc/msm_vidc_core.h index a55b8a2fc7..5b4f0bae36 100644 --- a/driver/vidc/inc/msm_vidc_core.h +++ b/driver/vidc/inc/msm_vidc_core.h @@ -84,7 +84,6 @@ struct msm_vidc_core { struct msm_vidc_mem_addr iface_q_table; struct msm_vidc_iface_q_info iface_queues[VIDC_IFACEQ_NUMQ]; struct work_struct device_work; - struct work_struct smmu_fault_work; struct workqueue_struct *device_workq; struct delayed_work pm_work; struct workqueue_struct *pm_workq; diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 74b60d2351..4ed1f9cc0f 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -272,7 +272,7 @@ int msm_vidc_core_init(struct msm_vidc_core *core); int msm_vidc_core_deinit(struct msm_vidc_core *core, bool force); int msm_vidc_core_timeout(struct msm_vidc_core *core); int msm_vidc_print_inst_info(struct msm_vidc_inst *inst); -void msm_vidc_smmu_fault_work_handler(struct work_struct *work); +void msm_vidc_print_core_info(struct msm_vidc_core *core); int msm_vidc_smmu_fault_handler(struct iommu_domain *domain, struct device *dev, unsigned long iova, int flags, void *data); int msm_vidc_trigger_ssr(struct msm_vidc_core *core, diff --git a/driver/vidc/inc/venus_hfi.h b/driver/vidc/inc/venus_hfi.h index 6a52b80240..4d51b5beab 100644 --- a/driver/vidc/inc/venus_hfi.h +++ b/driver/vidc/inc/venus_hfi.h @@ -46,7 +46,7 @@ int venus_hfi_session_open(struct msm_vidc_inst *inst); int venus_hfi_session_set_codec(struct msm_vidc_inst *inst); int venus_hfi_core_init(struct msm_vidc_core *core); int venus_hfi_core_deinit(struct msm_vidc_core *core); -int venus_print_noc_error_info(struct msm_vidc_core *core); +int venus_hfi_noc_error_info(struct msm_vidc_core *core); int venus_hfi_suspend(struct msm_vidc_core *core); int venus_hfi_scale_clocks(struct msm_vidc_inst* inst, u64 freq); int venus_hfi_scale_buses(struct msm_vidc_inst* inst, u64 bw_ddr, u64 bw_llcc); diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index bedd77c8c6..cdc0534a00 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -3397,22 +3397,17 @@ int msm_vidc_print_inst_info(struct msm_vidc_inst *inst) return 0; } -void msm_vidc_smmu_fault_work_handler(struct work_struct *work) +void msm_vidc_print_core_info(struct msm_vidc_core *core) { - struct msm_vidc_core *core; struct msm_vidc_inst *inst = NULL; struct msm_vidc_inst *instances[MAX_SUPPORTED_INSTANCES]; s32 num_instances = 0; - core = container_of(work, struct msm_vidc_core, smmu_fault_work); if (!core) { d_vpr_e("%s: invalid params\n", __func__); return; } - /* print noc error log registers */ - venus_print_noc_error_info(core); - core_lock(core, __func__); list_for_each_entry(inst, &core->instances, list) instances[num_instances++] = inst; @@ -3453,11 +3448,11 @@ int msm_vidc_smmu_fault_handler(struct iommu_domain *domain, d_vpr_e("%s: faulting address: %lx\n", __func__, iova); core->smmu_fault_handled = true; - /** - * Fault handler shouldn't be blocked for longtime. So offload work - * to device_workq to print buffer and memory consumption details. - */ - queue_work(core->device_workq, &core->smmu_fault_work); + + /* print noc error log registers */ + venus_hfi_noc_error_info(core); + + msm_vidc_print_core_info(core); /* * Return -ENOSYS to elicit the default behaviour of smmu driver. * If we return -ENOSYS, then smmu driver assumes page fault handler diff --git a/driver/vidc/src/msm_vidc_probe.c b/driver/vidc/src/msm_vidc_probe.c index 0024015af2..a24e01fb55 100644 --- a/driver/vidc/src/msm_vidc_probe.c +++ b/driver/vidc/src/msm_vidc_probe.c @@ -234,7 +234,6 @@ static int msm_vidc_initialize_core(struct msm_vidc_core *core) INIT_LIST_HEAD(&core->dangling_instances); INIT_WORK(&core->device_work, venus_hfi_work_handler); - INIT_WORK(&core->smmu_fault_work, msm_vidc_smmu_fault_work_handler); INIT_DELAYED_WORK(&core->pm_work, venus_hfi_pm_work_handler); INIT_DELAYED_WORK(&core->fw_unload_work, msm_vidc_fw_unload_handler); INIT_WORK(&core->ssr_work, msm_vidc_ssr_handler); diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index bad69312c3..5f12904f5d 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -2847,9 +2847,9 @@ int venus_hfi_core_deinit(struct msm_vidc_core *core) return 0; } -int venus_print_noc_error_info(struct msm_vidc_core *core) +int venus_hfi_noc_error_info(struct msm_vidc_core *core) { - if (!core) { + if (!core || !core->capabilities) { d_vpr_e("%s: Invalid parameters: %pK\n", __func__, core); return -EINVAL; @@ -2859,6 +2859,9 @@ int venus_print_noc_error_info(struct msm_vidc_core *core) return 0; core_lock(core, __func__); + if (core->state == MSM_VIDC_CORE_DEINIT) + goto unlock; + /* resume venus before accessing noc registers */ if (__resume(core)) { d_vpr_e("%s: Power on failed\n", __func__); diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index 186774ac73..521a7934ce 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -315,7 +315,7 @@ int handle_system_error(struct msm_vidc_core *core, { d_vpr_e("%s: system error received\n", __func__); print_sfr_message(core); - venus_print_noc_error_info(core); + venus_hfi_noc_error_info(core); msm_vidc_core_deinit(core, true); return 0; } From 47847faa11a9394ba955248c49b52c58e1db22c2 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Fri, 26 Mar 2021 12:13:46 -0700 Subject: [PATCH 0201/1061] video: driver: Use upstream ctrls Remove usage of private ctrls and use upstream ctrls. Change-Id: I137855872030822f0d6b2cd59babca3f0cc591d4 Signed-off-by: Akshata Sahukar --- driver/platform/waipio/src/msm_vidc_waipio.c | 22 ++++++++++---------- driver/vidc/src/msm_vidc_driver.c | 8 +++++-- 2 files changed, 17 insertions(+), 13 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index dc3442112a..3388b488c3 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -460,7 +460,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {BASELAYER_PRIORITY, ENC, H264, 0, MAX_BASE_LAYER_PRIORITY_ID, 1, 0, - V4L2_CID_MPEG_VIDC_BASELAYER_PRIORITY, + V4L2_CID_MPEG_VIDEO_BASELAYER_PRIORITY_ID, HFI_PROP_BASELAYER_PRIORITYID, CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, @@ -530,7 +530,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {I_FRAME_MIN_QP, ENC, HEVC|HEIC, MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, - V4L2_CID_MPEG_VIDC_HEVC_I_FRAME_MIN_QP}, + V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_MIN_QP}, {P_FRAME_MIN_QP, ENC, H264, MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, @@ -538,15 +538,15 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {P_FRAME_MIN_QP, ENC, HEVC|HEIC, MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, - V4L2_CID_MPEG_VIDC_HEVC_P_FRAME_MIN_QP}, + V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_MIN_QP}, {B_FRAME_MIN_QP, ENC, H264, MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, - V4L2_CID_MPEG_VIDC_B_FRAME_MIN_QP}, + V4L2_CID_MPEG_VIDEO_H264_B_FRAME_MIN_QP}, {B_FRAME_MIN_QP, ENC, HEVC|HEIC, MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, - V4L2_CID_MPEG_VIDC_B_FRAME_MIN_QP}, + V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_MIN_QP}, {MAX_FRAME_QP, ENC, H264, MIN_QP_8BIT, MAX_QP, 1, MAX_QP, @@ -570,7 +570,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {I_FRAME_MAX_QP, ENC, HEVC|HEIC, MIN_QP_10BIT, MAX_QP, 1, MAX_QP, - V4L2_CID_MPEG_VIDC_HEVC_I_FRAME_MAX_QP}, + V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_MAX_QP}, {P_FRAME_MAX_QP, ENC, H264, MIN_QP_8BIT, MAX_QP, 1, MAX_QP, @@ -578,15 +578,15 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {P_FRAME_MAX_QP, ENC, HEVC|HEIC, MIN_QP_10BIT, MAX_QP, 1, MAX_QP, - V4L2_CID_MPEG_VIDC_HEVC_P_FRAME_MAX_QP}, + V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_MAX_QP}, {B_FRAME_MAX_QP, ENC, H264, MIN_QP_8BIT, MAX_QP, 1, MAX_QP, - V4L2_CID_MPEG_VIDC_B_FRAME_MAX_QP}, + V4L2_CID_MPEG_VIDEO_H264_B_FRAME_MAX_QP}, {B_FRAME_MAX_QP, ENC, HEVC|HEIC, MIN_QP_10BIT, MAX_QP, 1, MAX_QP, - V4L2_CID_MPEG_VIDC_B_FRAME_MAX_QP}, + V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_MAX_QP}, {HEVC_HIER_QP, ENC, HEVC|HEIC, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, @@ -599,7 +599,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { MIN_QP_10BIT, MAX_QP, 1, DEFAULT_QP, V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP, HFI_PROP_QP_PACKED, - CAP_FLAG_OUTPUT_PORT, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, {PIX_FMTS, BITRATE_MODE}, {0}, msm_vidc_adjust_hevc_frame_qp, msm_vidc_set_frame_qp}, @@ -607,7 +607,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { MIN_QP_8BIT, MAX_QP, 1, DEFAULT_QP, V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP, HFI_PROP_QP_PACKED, - CAP_FLAG_OUTPUT_PORT, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, {BITRATE_MODE}, {0}, NULL, msm_vidc_set_frame_qp}, diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index bedd77c8c6..a62d4da234 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -1082,8 +1082,12 @@ bool msm_vidc_allow_s_ctrl(struct msm_vidc_inst *inst, u32 id) case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L3_BR: case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L4_BR: case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L5_BR: - case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L6_BR: - case V4L2_CID_MPEG_VIDC_BASELAYER_PRIORITY: + case V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L0_BR: + case V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L1_BR: + case V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L2_BR: + case V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L3_BR: + case V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L4_BR: + case V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L5_BR: case V4L2_CID_MPEG_VIDC_USELTRFRAME: case V4L2_CID_MPEG_VIDC_MARKLTRFRAME: case V4L2_CID_MPEG_VIDC_VIDEO_BLUR_TYPES: From 0017afac21f0cae081d0b5a4a707c8155c0153c5 Mon Sep 17 00:00:00 2001 From: Vikash Garodia Date: Wed, 17 Mar 2021 22:28:17 +0530 Subject: [PATCH 0202/1061] video: driver: Add handling for session priority Following changes are added with this: 1. Handle and adjust session priority. 2. Session addmission based on priority. 3. Power (clock and bus) scaling based on priority. 4. Handle s_parm influence on priority. Change-Id: I12dec5fb03d733f07b0b0a24b4d74d1ccd4bf791 Signed-off-by: Vikash Garodia --- driver/platform/waipio/src/msm_vidc_waipio.c | 13 +++- .../variant/iris2/src/msm_vidc_power_iris2.c | 21 +++++- driver/vidc/inc/hfi_property.h | 2 +- driver/vidc/inc/msm_vidc_control.h | 3 + driver/vidc/inc/msm_vidc_driver.h | 3 +- driver/vidc/inc/msm_vidc_inst.h | 1 + driver/vidc/inc/msm_vidc_internal.h | 10 +-- driver/vidc/inc/msm_vidc_platform.h | 1 + driver/vidc/inc/msm_vidc_power.h | 3 +- driver/vidc/src/msm_vdec.c | 57 +++++++-------- driver/vidc/src/msm_venc.c | 22 ++++++ driver/vidc/src/msm_vidc_control.c | 73 +++++++++++++++++++ driver/vidc/src/msm_vidc_driver.c | 4 +- driver/vidc/src/msm_vidc_power.c | 55 ++++++-------- 14 files changed, 186 insertions(+), 82 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index eb71a37032..899fe5f060 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -1146,10 +1146,10 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {PRIORITY, DEC|ENC, CODECS_ALL, 0, 2, 1, 1, V4L2_CID_MPEG_VIDC_PRIORITY, - HFI_PROP_REALTIME, - CAP_FLAG_ROOT, + HFI_PROP_SESSION_PRIORITY, + CAP_FLAG_ROOT | CAP_FLAG_DYNAMIC_ALLOWED, {0}, {0}, - NULL, NULL}, + msm_vidc_adjust_session_priority, msm_vidc_set_session_priority}, {ENC_IP_CR, ENC, CODECS_ALL, 0, S32_MAX, 1, 0, @@ -1395,6 +1395,12 @@ static struct msm_vidc_ubwc_config_data ubwc_config_waipio[] = { UBWC_CONFIG(8, 32, 16, 0, 1, 1, 1), }; +/* Default bus bandwidth for non_real time session based on priority */ +static u32 bus_bw_nrt[] = { + 15000000, + 11000000, +}; + static struct msm_vidc_platform_data waipio_data = { .core_data = core_data_waipio, .core_data_size = ARRAY_SIZE(core_data_waipio), @@ -1404,6 +1410,7 @@ static struct msm_vidc_platform_data waipio_data = { .csc_data.vpe_csc_custom_matrix_coeff = vpe_csc_custom_matrix_coeff, .csc_data.vpe_csc_custom_limit_coeff = vpe_csc_custom_limit_coeff, .ubwc_config = ubwc_config_waipio, + .bus_bw_nrt = bus_bw_nrt, }; static int msm_vidc_init_data(struct msm_vidc_core *core) diff --git a/driver/variant/iris2/src/msm_vidc_power_iris2.c b/driver/variant/iris2/src/msm_vidc_power_iris2.c index bdba6cf42c..e7619512eb 100644 --- a/driver/variant/iris2/src/msm_vidc_power_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_power_iris2.c @@ -8,6 +8,7 @@ #include "msm_vidc_core.h" #include "msm_vidc_driver.h" #include "msm_vidc_debug.h" +#include "msm_vidc_dt.h" u64 msm_vidc_calc_freq_iris2(struct msm_vidc_inst *inst, u32 data_size) { @@ -21,15 +22,29 @@ u64 msm_vidc_calc_freq_iris2(struct msm_vidc_inst *inst, u32 data_size) u32 operating_rate, vsp_factor_num = 1, vsp_factor_den = 1; u32 base_cycles = 0; u32 fps; + u32 prio_val; if (!inst || !inst->core || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); return freq; } - core = inst->core; - power = &inst->power; - mbs_per_second = msm_vidc_get_inst_load(inst, LOAD_POWER); + power = &inst->power; + core = inst->core; + if (!core->dt) { + d_vpr_e("%s: invalid params\n", __func__); + return freq; + } + + if (!is_realtime_session(inst)) { + prio_val = inst->capabilities->cap[PRIORITY].value; + if (!prio_val || prio_val > core->dt->allowed_clks_tbl_size) + prio_val = core->dt->allowed_clks_tbl_size; + + return core->dt->allowed_clks_tbl[prio_val-1].clock_rate; + } + + mbs_per_second = msm_vidc_get_inst_load(inst); fps = msm_vidc_get_fps(inst); /* diff --git a/driver/vidc/inc/hfi_property.h b/driver/vidc/inc/hfi_property.h index e89d5f3b35..a6cb9ad6cf 100644 --- a/driver/vidc/inc/hfi_property.h +++ b/driver/vidc/inc/hfi_property.h @@ -83,7 +83,7 @@ enum hfi_color_format { #define HFI_BITMASK_CROP_TOP_OFFSET 0x0000ffff #define HFI_PROP_CROP_OFFSETS 0x03000105 -#define HFI_PROP_REALTIME 0x03000106 +#define HFI_PROP_SESSION_PRIORITY 0x03000106 enum hfi_avc_profile_type { HFI_AVC_PROFILE_BASELINE = 0, diff --git a/driver/vidc/inc/msm_vidc_control.h b/driver/vidc/inc/msm_vidc_control.h index be8a307604..383f9a1252 100644 --- a/driver/vidc/inc/msm_vidc_control.h +++ b/driver/vidc/inc/msm_vidc_control.h @@ -37,6 +37,7 @@ int msm_vidc_adjust_hevc_min_qp(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_hevc_max_qp(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_hevc_frame_qp(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_v4l2_properties(struct msm_vidc_inst *inst); +int msm_vidc_adjust_session_priority(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_set_header_mode(void *instance, enum msm_vidc_inst_capability_type cap_id); @@ -74,6 +75,8 @@ int msm_vidc_set_use_and_mark_ltr(void *instance, enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_nal_length(void* instance, enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_session_priority(void *instance, + enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_s32(void *instance, enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_array(void *instance, diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 4ed1f9cc0f..522626a743 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -180,7 +180,7 @@ static inline bool is_low_power_session(struct msm_vidc_inst *inst) static inline bool is_realtime_session(struct msm_vidc_inst *inst) { - return !inst->capabilities->cap[PRIORITY].value; + return inst->capabilities->cap[PRIORITY].value == 0 ? true : false; } static inline bool is_lowlatency_session(struct msm_vidc_inst *inst) @@ -353,6 +353,7 @@ int msm_vidc_deinit_instance_caps(struct msm_vidc_core* core); int msm_vidc_update_debug_str(struct msm_vidc_inst *inst); bool msm_vidc_allow_decode_batch(struct msm_vidc_inst *inst); int msm_vidc_check_session_supported(struct msm_vidc_inst *inst); +int msm_vidc_check_mbps_supported(struct msm_vidc_inst *inst); int msm_vidc_check_scaling_supported(struct msm_vidc_inst *inst); #endif // _MSM_VIDC_DRIVER_H_ diff --git a/driver/vidc/inc/msm_vidc_inst.h b/driver/vidc/inc/msm_vidc_inst.h index 0b2a9e3bf4..ec172220f7 100644 --- a/driver/vidc/inc/msm_vidc_inst.h +++ b/driver/vidc/inc/msm_vidc_inst.h @@ -136,6 +136,7 @@ struct msm_vidc_inst { struct debug_buf_count debug_count; struct msm_vidc_inst_capability *capabilities; struct completion completions[MAX_SIGNAL]; + enum priority_level priority_level; bool active; u64 last_qbuf_time_ns; bool vb2q_init; diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 10b0ac9b7d..bba38613cc 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -124,6 +124,11 @@ enum msm_vidc_codec_type { MSM_VIDC_HEIC = BIT(3), }; +enum priority_level { + MSM_VIDC_PRIORITY_LOW, + MSM_VIDC_PRIORITY_HIGH, +}; + enum msm_vidc_colorformat_type { MSM_VIDC_FMT_NONE = 0, MSM_VIDC_FMT_NV12 = BIT(0), @@ -686,11 +691,6 @@ struct msm_vidc_decode_batch { struct delayed_work work; }; -enum load_calc_quirks { - LOAD_POWER = 0, - LOAD_ADMISSION_CONTROL = 1, -}; - enum msm_vidc_power_mode { VIDC_POWER_NORMAL = 0, VIDC_POWER_LOW, diff --git a/driver/vidc/inc/msm_vidc_platform.h b/driver/vidc/inc/msm_vidc_platform.h index 08e225dc56..28bf5e11cb 100644 --- a/driver/vidc/inc/msm_vidc_platform.h +++ b/driver/vidc/inc/msm_vidc_platform.h @@ -68,6 +68,7 @@ struct msm_vidc_platform_data { u32 allowed_clks_tbl_size; struct msm_vidc_csc_coeff csc_data; struct msm_vidc_ubwc_config_data *ubwc_config; + u32 *bus_bw_nrt; }; struct msm_vidc_platform { diff --git a/driver/vidc/inc/msm_vidc_power.h b/driver/vidc/inc/msm_vidc_power.h index 7848b3477a..744c9a75d2 100644 --- a/driver/vidc/inc/msm_vidc_power.h +++ b/driver/vidc/inc/msm_vidc_power.h @@ -247,8 +247,7 @@ static inline int __bpp(enum msm_vidc_colorformat_type f) } u64 msm_vidc_max_freq(struct msm_vidc_inst* inst); -int msm_vidc_get_inst_load(struct msm_vidc_inst* inst, - enum load_calc_quirks quirks); +int msm_vidc_get_inst_load(struct msm_vidc_inst *inst); int msm_vidc_scale_power(struct msm_vidc_inst *inst, bool scale_buses); #endif diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 95cb2fd42a..f5aecee6c5 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -681,32 +681,6 @@ static int msm_vdec_set_thumbnail_mode(struct msm_vidc_inst *inst, return rc; } -static int msm_vdec_set_realtime(struct msm_vidc_inst *inst, - enum msm_vidc_port_type port) -{ - int rc = 0; - u32 realtime = 1; //todo - - if (port != INPUT_PORT) { - i_vpr_e(inst, "%s: invalid port %d\n", __func__, port); - return -EINVAL; - } - - realtime = inst->capabilities->cap[PRIORITY].value; - i_vpr_h(inst, "%s: priority: %d", __func__, realtime); - rc = venus_hfi_session_property(inst, - HFI_PROP_REALTIME, - HFI_HOST_FLAGS_NONE, - get_hfi_port(inst, port), - HFI_PAYLOAD_U32, - &realtime, - sizeof(u32)); - if (rc) - i_vpr_e(inst, "%s: set property failed\n", __func__); - - return rc; -} - static int msm_vdec_set_conceal_color_8bit(struct msm_vidc_inst *inst, enum msm_vidc_port_type port) { @@ -786,10 +760,6 @@ static int msm_vdec_set_input_properties(struct msm_vidc_inst *inst) if (rc) return rc; - rc = msm_vdec_set_realtime(inst, INPUT_PORT); - if (rc) - return rc; - rc = msm_vdec_set_conceal_color_8bit(inst, INPUT_PORT); if (rc) return rc; @@ -2158,13 +2128,36 @@ int msm_vdec_s_param(struct msm_vidc_inst *inst, set_default: q16_rate = (u32)input_rate << 16; - i_vpr_h(inst, "%s: type %u value %#x\n", - __func__, s_parm->type, q16_rate); + i_vpr_h(inst, "%s: %s value %d\n", + __func__, is_frame_rate ? "frame rate" : "operating rate", input_rate); msm_vidc_update_cap_value(inst, is_frame_rate ? FRAME_RATE : OPERATING_RATE, q16_rate, __func__); + if ((s_parm->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE && + inst->vb2q[INPUT_PORT].streaming) || + (s_parm->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE && + inst->vb2q[OUTPUT_PORT].streaming)) { + if (msm_vidc_check_mbps_supported(inst)) { + i_vpr_e(inst, + "%s: Unsupported load with rate %d, setting default rate %d\n", + __func__, input_rate, default_rate); + msm_vidc_update_cap_value(inst, + is_frame_rate ? FRAME_RATE : OPERATING_RATE, + default_rate << 16, __func__); + return -ENOMEM; + } + } + + if (!is_realtime_session(inst)) + inst->priority_level = MSM_VIDC_PRIORITY_HIGH; + + if (is_frame_rate) + capability->cap[FRAME_RATE].flags |= CAP_FLAG_CLIENT_SET; + else + capability->cap[OPERATING_RATE].flags |= CAP_FLAG_CLIENT_SET; + exit: return rc; } diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index 7e60b45ed2..6d0e1b5fe0 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -1603,6 +1603,28 @@ set_default: is_frame_rate ? FRAME_RATE : OPERATING_RATE, q16_rate, __func__); + if ((s_parm->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE && + inst->vb2q[INPUT_PORT].streaming) || + (s_parm->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE && + inst->vb2q[OUTPUT_PORT].streaming)) { + if (msm_vidc_check_mbps_supported(inst)) { + i_vpr_e(inst, + "%s: Unsupported load with rate %d, setting default rate %d\n", + __func__, input_rate, default_rate); + msm_vidc_update_cap_value(inst, + is_frame_rate ? FRAME_RATE : OPERATING_RATE, + default_rate << 16, __func__); + return -ENOMEM; + } + } + + if (!is_realtime_session(inst)) + inst->priority_level = MSM_VIDC_PRIORITY_HIGH; + + if (is_frame_rate) + capability->cap[FRAME_RATE].flags |= CAP_FLAG_CLIENT_SET; + else + capability->cap[OPERATING_RATE].flags |= CAP_FLAG_CLIENT_SET; /* * In static case, frame rate is set via * inst database set function mentioned in diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 904def341c..22617ef04e 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -655,6 +655,13 @@ int msm_v4l2_op_s_ctrl(struct v4l2_ctrl *ctrl) if (rc) return rc; } + + if (ctrl->id == V4L2_CID_MPEG_VIDC_PRIORITY) { + rc = msm_vidc_adjust_session_priority(inst, ctrl); + if (rc) + return rc; + } + if (is_meta_ctrl(ctrl->id)) { rc = msm_vidc_update_meta_port_settings(inst); if (rc) @@ -1421,6 +1428,52 @@ int msm_vidc_adjust_hevc_frame_qp(void *instance, struct v4l2_ctrl *ctrl) return rc; } +int msm_vidc_adjust_session_priority(void *instance, struct v4l2_ctrl *ctrl) +{ + int rc = 0; + int adjusted_value; + bool rate_by_client = false; + struct msm_vidc_inst_capability *capability; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + adjusted_value = ctrl ? ctrl->val : + capability->cap[PRIORITY].value; + + if (capability->cap[FRAME_RATE].flags & CAP_FLAG_CLIENT_SET || + capability->cap[OPERATING_RATE].flags & CAP_FLAG_CLIENT_SET) + rate_by_client = true; + + /* + * For RT, check for resource feasability if rate is set by client. + * For RT, move to NRT, if rate is not set by client. + * For NRT, sessions with rate set by client takes higher order + * among NRT sessions. They are constraint RT or low priority RT. + */ + if (adjusted_value == 0 && rate_by_client) { + rc = msm_vidc_check_mbps_supported(inst); + if (rc) { + d_vpr_e("%s: priority 0 not feasible due to resource\n", __func__); + return rc; + } + } + if (adjusted_value == 0 && !rate_by_client) { + adjusted_value = 1; + inst->priority_level = MSM_VIDC_PRIORITY_LOW; + } + + if (adjusted_value > 0 && rate_by_client) + inst->priority_level = MSM_VIDC_PRIORITY_HIGH; + + msm_vidc_update_cap_value(inst, PRIORITY, adjusted_value, __func__); + + return rc; +} + /* * Loop over instance capabilities with CAP_FLAG_ROOT * and call adjust function, where @@ -2098,6 +2151,26 @@ exit: return rc; } +int msm_vidc_set_session_priority(void *instance, + enum msm_vidc_inst_capability_type cap_id) +{ + int rc = 0; + u32 hfi_value = 0; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + hfi_value = (inst->capabilities->cap[cap_id].value * 2) + inst->priority_level; + + rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32, + &hfi_value, sizeof(u32), __func__); + + return rc; +} + /* TODO int msm_vidc_set_flip(void *instance, enum msm_vidc_inst_capability_type cap_id) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 9f6e66d959..45c71a5492 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -3855,7 +3855,7 @@ int msm_vidc_update_debug_str(struct msm_vidc_inst *inst) return 0; } -static int msm_vidc_check_mbps_supported(struct msm_vidc_inst *inst) +int msm_vidc_check_mbps_supported(struct msm_vidc_inst *inst) { u32 mbps = 0; struct msm_vidc_core *core; @@ -3879,7 +3879,7 @@ static int msm_vidc_check_mbps_supported(struct msm_vidc_inst *inst) !is_realtime_session(instance)) continue; - mbps += msm_vidc_get_inst_load(instance, LOAD_ADMISSION_CONTROL); + mbps += msm_vidc_get_inst_load(instance); } core_unlock(core, __func__); diff --git a/driver/vidc/src/msm_vidc_power.c b/driver/vidc/src/msm_vidc_power.c index c887defc49..8158268433 100644 --- a/driver/vidc/src/msm_vidc_power.c +++ b/driver/vidc/src/msm_vidc_power.c @@ -45,8 +45,7 @@ u64 msm_vidc_max_freq(struct msm_vidc_inst *inst) return freq; } -static int msm_vidc_get_mbps(struct msm_vidc_inst *inst, - enum load_calc_quirks quirks) +static int msm_vidc_get_mbps(struct msm_vidc_inst *inst) { int input_port_mbs, output_port_mbs; int fps, operating_rate, frame_rate; @@ -63,11 +62,7 @@ static int msm_vidc_get_mbps(struct msm_vidc_inst *inst, frame_rate = inst->capabilities->cap[FRAME_RATE].value; operating_rate = inst->capabilities->cap[OPERATING_RATE].value; - fps = frame_rate; - - /* For admission control operating rate is ignored */ - if (quirks == LOAD_POWER) - fps = max(operating_rate, frame_rate); + fps = max(operating_rate, frame_rate); /* In case of fps < 1 we assume 1 */ fps = max(fps >> 16, 1); @@ -75,8 +70,7 @@ static int msm_vidc_get_mbps(struct msm_vidc_inst *inst, return max(input_port_mbs, output_port_mbs) * fps; } -int msm_vidc_get_inst_load(struct msm_vidc_inst *inst, - enum load_calc_quirks quirks) +int msm_vidc_get_inst_load(struct msm_vidc_inst *inst) { int load = 0; @@ -85,34 +79,18 @@ int msm_vidc_get_inst_load(struct msm_vidc_inst *inst, return -EINVAL; } - if (inst->state == MSM_VIDC_OPEN || - inst->state == MSM_VIDC_ERROR) + if (inst->state == MSM_VIDC_ERROR) goto exit; /* - * Clock and Load calculations for REALTIME/NON-REALTIME - * Operating rate will either Default or Client value. - * Session admission control will be based on Load. - * Power requests based of calculated Clock/Freq. - * ----------------|----------------------------| - * REALTIME | Admission Control Load = | - * | res * fps | - * | Power Request Load = | - * | res * max(op, fps)| - * ----------------|----------------------------| - * NON-REALTIME/ | Admission Control Load = 0 | - * THUMBNAIL/ | Power Request Load = | - * IMAGE | res * max(op, fps)| - * | | - * ----------------|----------------------------| + * NRT sessions - clock scaling is based on OPP table. + * - No load based rejection. + * RT sessions - clock scaling and session admission based on load. */ - if (is_thumbnail_session(inst) || is_image_session(inst)) - goto exit; - - if (!is_realtime_session(inst) && quirks == LOAD_ADMISSION_CONTROL) - goto exit; - - load = msm_vidc_get_mbps(inst, quirks); + if (is_thumbnail_session(inst) || !is_realtime_session(inst)) + load = 0; + else + load = msm_vidc_get_mbps(inst); exit: return load; @@ -174,7 +152,12 @@ static int msm_vidc_set_buses(struct msm_vidc_inst* inst) d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } + core = inst->core; + if (!core || !core->platform || !core->platform->data.bus_bw_nrt) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } mutex_lock(&core->lock); curr_time_ns = ktime_get_ns(); @@ -198,6 +181,12 @@ static int msm_vidc_set_buses(struct msm_vidc_inst* inst) total_bw_ddr = total_bw_llcc = INT_MAX; break; } + + if (!is_realtime_session(inst)) { + temp->power.ddr_bw = core->platform->data.bus_bw_nrt[0]; + temp->power.sys_cache_bw = 0; + } + total_bw_ddr += temp->power.ddr_bw; total_bw_llcc += temp->power.sys_cache_bw; } From 113c10c489a30c9305b269e5b2aff19008b51b0d Mon Sep 17 00:00:00 2001 From: Mihir Ganu Date: Fri, 26 Mar 2021 11:27:53 -0700 Subject: [PATCH 0203/1061] video: driver: Enable Subsystem Restart (SSR) testing Enable Subsystem Restart test support. Clients can trigger SSR through debugfs as follows: echo > /d/msm_vidc/core/trigger_ssr u64 trigger_val provides: /* * ssr_type: 0-3 bits * sub_client_id: 4-7 bits * reserved: 8-31 bits * test_addr: 32-63 bits */ Change-Id: If23fce3084de00461f1e5cc57884e10d15ad66a9 Signed-off-by: Mihir Ganu --- driver/vidc/inc/msm_vidc_driver.h | 2 +- driver/vidc/inc/msm_vidc_internal.h | 2 + driver/vidc/inc/venus_hfi.h | 2 + driver/vidc/src/msm_vidc_debug.c | 2 +- driver/vidc/src/msm_vidc_driver.c | 60 ++++++++++++++++++++++++++++- driver/vidc/src/venus_hfi.c | 43 +++++++++++++++++++++ 6 files changed, 108 insertions(+), 3 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 4ed1f9cc0f..379588082c 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -276,7 +276,7 @@ void msm_vidc_print_core_info(struct msm_vidc_core *core); int msm_vidc_smmu_fault_handler(struct iommu_domain *domain, struct device *dev, unsigned long iova, int flags, void *data); int msm_vidc_trigger_ssr(struct msm_vidc_core *core, - enum msm_vidc_ssr_trigger_type type); + u64 trigger_ssr_val); void msm_vidc_ssr_handler(struct work_struct *work); void msm_vidc_pm_work_handler(struct work_struct *work); void msm_vidc_fw_unload_handler(struct work_struct *work); diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 10b0ac9b7d..aa120cedd5 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -815,6 +815,8 @@ struct response_work { struct msm_vidc_ssr { bool trigger; enum msm_vidc_ssr_trigger_type ssr_type; + u32 sub_client_id; + u32 test_addr; }; struct msm_vidc_sfr { diff --git a/driver/vidc/inc/venus_hfi.h b/driver/vidc/inc/venus_hfi.h index 4d51b5beab..cb97b2fa9a 100644 --- a/driver/vidc/inc/venus_hfi.h +++ b/driver/vidc/inc/venus_hfi.h @@ -48,6 +48,8 @@ int venus_hfi_core_init(struct msm_vidc_core *core); int venus_hfi_core_deinit(struct msm_vidc_core *core); int venus_hfi_noc_error_info(struct msm_vidc_core *core); int venus_hfi_suspend(struct msm_vidc_core *core); +int venus_hfi_trigger_ssr(struct msm_vidc_core *core, u32 type, + u32 client_id, u32 addr); int venus_hfi_scale_clocks(struct msm_vidc_inst* inst, u64 freq); int venus_hfi_scale_buses(struct msm_vidc_inst* inst, u64 bw_ddr, u64 bw_llcc); diff --git a/driver/vidc/src/msm_vidc_debug.c b/driver/vidc/src/msm_vidc_debug.c index 91c38a4c14..81b3cdc8fc 100644 --- a/driver/vidc/src/msm_vidc_debug.c +++ b/driver/vidc/src/msm_vidc_debug.c @@ -11,7 +11,7 @@ #include "msm_vidc_inst.h" #include "msm_vidc_internal.h" -#define MAX_SSR_STRING_LEN 10 +#define MAX_SSR_STRING_LEN 64 #define MAX_DEBUG_LEVEL_STRING_LEN 15 int msm_vidc_debug = VIDC_ERR | VIDC_PRINTK | FW_ERROR | FW_FATAL; diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 9f6e66d959..1309836e96 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -30,6 +30,13 @@ extern struct msm_vidc_core *g_core; } \ } +#define SSR_TYPE 0x0000000F +#define SSR_TYPE_SHIFT 0 +#define SSR_SUB_CLIENT_ID 0x000000F0 +#define SSR_SUB_CLIENT_ID_SHIFT 4 +#define SSR_ADDR_ID 0xFFFFFFFF00000000 +#define SSR_ADDR_SHIFT 32 + struct msm_vidc_buf_type_name { enum msm_vidc_buffer_type type; char *name; @@ -3463,13 +3470,64 @@ int msm_vidc_smmu_fault_handler(struct iommu_domain *domain, } int msm_vidc_trigger_ssr(struct msm_vidc_core *core, - enum msm_vidc_ssr_trigger_type type) + u64 trigger_ssr_val) { + struct msm_vidc_ssr *ssr; + + if (!core) { + d_vpr_e("%s: Invalid parameters\n", __func__); + return -EINVAL; + } + ssr = &core->ssr; + /* + * + * ssr_type: 0-3 bits + * sub_client_id: 4-7 bits + * reserved: 8-31 bits + * test_addr: 32-63 bits + */ + ssr->ssr_type = (trigger_ssr_val & + (unsigned long)SSR_TYPE) >> SSR_TYPE_SHIFT; + ssr->sub_client_id = (trigger_ssr_val & + (unsigned long)SSR_SUB_CLIENT_ID) >> SSR_SUB_CLIENT_ID_SHIFT; + ssr->test_addr = (trigger_ssr_val & + (unsigned long)SSR_ADDR_ID) >> SSR_ADDR_SHIFT; + schedule_work(&core->ssr_work); return 0; } void msm_vidc_ssr_handler(struct work_struct *work) { + int rc; + struct msm_vidc_core *core; + struct msm_vidc_ssr *ssr; + + core = container_of(work, struct msm_vidc_core, ssr_work); + if (!core) { + d_vpr_e("%s: invalid params %pK\n", __func__, core); + return; + } + ssr = &core->ssr; + + core_lock(core, __func__); + if (core->state == MSM_VIDC_CORE_INIT) { + /* + * In current implementation, user-initiated SSR triggers + * a fatal error from hardware. However, there is no way + * to know if fatal error is due to SSR or not. Handle + * user SSR as non-fatal. + */ + core->ssr.trigger = true; + rc = venus_hfi_trigger_ssr(core, ssr->ssr_type, + ssr->sub_client_id, ssr->test_addr); + if (rc) { + d_vpr_e("%s: trigger_ssr failed\n", __func__); + core->ssr.trigger = false; + } + } else { + d_vpr_e("%s: video core not initialized\n", __func__); + } + core_unlock(core, __func__); } void msm_vidc_pm_work_handler(struct work_struct *work) diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index 5f12904f5d..f19855ea03 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -2897,6 +2897,49 @@ int venus_hfi_suspend(struct msm_vidc_core *core) return rc; } +int venus_hfi_trigger_ssr(struct msm_vidc_core *core, u32 type, + u32 client_id, u32 addr) +{ + int rc = 0; + u32 payload[2]; + + if (!core || !core->packet) { + d_vpr_e("%s: Invalid params\n", __func__); + return -EINVAL; + } + + payload[0] = client_id << 4 | type; + payload[1] = addr; + + rc = hfi_create_header(core->packet, core->packet_size, + 0 /*session_id*/, + core->header_id++); + if (rc) + goto err_ssr_pkt; + + /* HFI_CMD_SSR */ + rc = hfi_create_packet(core->packet, core->packet_size, + HFI_CMD_SSR, + HFI_HOST_FLAGS_RESPONSE_REQUIRED | + HFI_HOST_FLAGS_INTR_REQUIRED, + HFI_PAYLOAD_U64, + HFI_PORT_NONE, + core->packet_id++, + &payload, sizeof(u64)); + if (rc) + goto err_ssr_pkt; + + rc = __iface_cmdq_write(core, core->packet); + if (rc) + return rc; + + return 0; + +err_ssr_pkt: + d_vpr_e("%s: create packet failed\n", __func__); + return rc; +} + int venus_hfi_session_open(struct msm_vidc_inst *inst) { int rc = 0; From 359b3bd6282ae2b8cd02f4e7e2e40c6e0989f106 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Fri, 26 Mar 2021 13:25:20 -0700 Subject: [PATCH 0204/1061] video: driver: Deprecate upstreamed private ctrls Deprecate ctrls that are now available in upstream. Change-Id: Id1c99d3d6c9b9eebc15216786298a4693ab574e4 Signed-off-by: Akshata Sahukar --- include/uapi/vidc/media/v4l2_vidc_extensions.h | 15 --------------- 1 file changed, 15 deletions(-) diff --git a/include/uapi/vidc/media/v4l2_vidc_extensions.h b/include/uapi/vidc/media/v4l2_vidc_extensions.h index b8b7bfd8ee..07d2302468 100644 --- a/include/uapi/vidc/media/v4l2_vidc_extensions.h +++ b/include/uapi/vidc/media/v4l2_vidc_extensions.h @@ -57,15 +57,10 @@ #define V4L2_CID_MPEG_VIDC_LOWLATENCY_REQUEST (V4L2_CID_MPEG_VIDC_BASE + 0x3) /* FIXme: */ #define V4L2_CID_MPEG_VIDC_CODEC_CONFIG (V4L2_CID_MPEG_VIDC_BASE + 0x4) -/* B frame min/max qp */ -#define V4L2_CID_MPEG_VIDC_B_FRAME_MIN_QP (V4L2_CID_MPEG_VIDC_BASE + 0x5) -#define V4L2_CID_MPEG_VIDC_B_FRAME_MAX_QP (V4L2_CID_MPEG_VIDC_BASE + 0x6) /* LTR controls */ #define V4L2_CID_MPEG_VIDC_LTRCOUNT (V4L2_CID_MPEG_VIDC_BASE + 0x7) #define V4L2_CID_MPEG_VIDC_USELTRFRAME (V4L2_CID_MPEG_VIDC_BASE + 0x8) #define V4L2_CID_MPEG_VIDC_MARKLTRFRAME (V4L2_CID_MPEG_VIDC_BASE + 0x9) -/* Base layer priority id value */ -#define V4L2_CID_MPEG_VIDC_BASELAYER_PRIORITY (V4L2_CID_MPEG_VIDC_BASE + 0xA) /* Encoder Intra refresh period */ #define V4L2_CID_MPEG_VIDC_INTRA_REFRESH_PERIOD (V4L2_CID_MPEG_VIDC_BASE + 0xB) #define V4L2_CID_MPEG_VIDC_AU_DELIMITER (V4L2_CID_MPEG_VIDC_BASE + 0xC) @@ -125,16 +120,6 @@ enum v4l2_mpeg_vidc_blur_types { #define V4L2_CID_MPEG_VIDC_MIN_BITSTREAM_SIZE_OVERWRITE \ (V4L2_CID_MPEG_VIDC_BASE + 0x23) -/* Deprecate below controls once they are available in upstream */ -#define V4L2_CID_MPEG_VIDC_HEVC_I_FRAME_MIN_QP \ - (V4L2_CID_MPEG_VIDC_BASE + 0x24) -#define V4L2_CID_MPEG_VIDC_HEVC_P_FRAME_MIN_QP \ - (V4L2_CID_MPEG_VIDC_BASE + 0x25) -#define V4L2_CID_MPEG_VIDC_HEVC_I_FRAME_MAX_QP \ - (V4L2_CID_MPEG_VIDC_BASE + 0x26) -#define V4L2_CID_MPEG_VIDC_HEVC_P_FRAME_MAX_QP \ - (V4L2_CID_MPEG_VIDC_BASE + 0x27) - /* Encoder Super frame control */ #define V4L2_CID_MPEG_VIDC_SUPERFRAME (V4L2_CID_MPEG_VIDC_BASE + 0x28) /* Thumbnail Mode control */ From f3298d2fe6a6aadcc4253ebb2681e62fbfdb0432 Mon Sep 17 00:00:00 2001 From: Dikshita Agarwal Date: Thu, 25 Feb 2021 10:47:28 +0530 Subject: [PATCH 0205/1061] video: driver: use module_param for debug logs Introduce module_param to enable debug logs. For general debug, use below commad: echo 0x103f101f > /sys/module/msm_video/parameters/msm_vidc_debug To further print bus-related logs, use below command: echo 0x103f103f > /sys/module/msm_video/parameters/msm_vidc_debug Change-Id: Iab735d3e7157cd78a8e5d99c4cdbb290fb36421a Signed-off-by: Maheshwar Ajja --- driver/vidc/inc/msm_vidc_debug.h | 4 ++- driver/vidc/src/msm_vidc_debug.c | 62 +------------------------------- 2 files changed, 4 insertions(+), 62 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_debug.h b/driver/vidc/inc/msm_vidc_debug.h index aa41d63599..08522d4d0b 100644 --- a/driver/vidc/inc/msm_vidc_debug.h +++ b/driver/vidc/inc/msm_vidc_debug.h @@ -9,6 +9,8 @@ #include #include #include +#include +#include #ifndef VIDC_DBG_LABEL #define VIDC_DBG_LABEL "msm_vidc" @@ -35,7 +37,7 @@ extern int msm_vidc_clock_voting; /* To enable messages OR these values and * echo the result to debugfs file. * - * To enable all messages set debug_level = 0x101F + * To enable all messages set msm_vidc_debug = 0x101F */ enum vidc_msg_prio { diff --git a/driver/vidc/src/msm_vidc_debug.c b/driver/vidc/src/msm_vidc_debug.c index 81b3cdc8fc..f7740bd801 100644 --- a/driver/vidc/src/msm_vidc_debug.c +++ b/driver/vidc/src/msm_vidc_debug.c @@ -15,7 +15,7 @@ #define MAX_DEBUG_LEVEL_STRING_LEN 15 int msm_vidc_debug = VIDC_ERR | VIDC_PRINTK | FW_ERROR | FW_FATAL; -EXPORT_SYMBOL(msm_vidc_debug); +module_param(msm_vidc_debug, int, 0644); bool msm_vidc_lossless_encode = !true; EXPORT_SYMBOL(msm_vidc_lossless_encode); @@ -141,61 +141,6 @@ static const struct file_operations ssr_fops = { .write = trigger_ssr_write, }; -static ssize_t debug_level_write(struct file* filp, const char __user* buf, - size_t count, loff_t* ppos) -{ - int rc = 0; - struct msm_vidc_core* core = filp->private_data; - char kbuf[MAX_DEBUG_LEVEL_STRING_LEN] = { 0 }; - - /* filter partial writes and invalid commands */ - if (*ppos != 0 || count >= sizeof(kbuf) || count == 0) { - d_vpr_e("returning error - pos %d, count %d\n", *ppos, count); - rc = -EINVAL; - } - - rc = simple_write_to_buffer(kbuf, sizeof(kbuf) - 1, ppos, buf, count); - if (rc < 0) { - d_vpr_e("%s: User memory fault\n", __func__); - rc = -EFAULT; - goto exit; - } - - rc = kstrtoint(kbuf, 0, &msm_vidc_debug); - if (rc) { - d_vpr_e("returning error err %d\n", rc); - rc = -EINVAL; - goto exit; - } - rc = count; - if (core->capabilities) { - core->capabilities[HW_RESPONSE_TIMEOUT].value = - ((msm_vidc_debug & 0xFF) > - (VIDC_ERR | VIDC_HIGH)) ? 1500 : 1000; - d_vpr_h("debug timeout updated to - %d ms\n", - core->capabilities[HW_RESPONSE_TIMEOUT].value); - } - -exit: - return rc; -} - -static ssize_t debug_level_read(struct file* file, char __user* buf, - size_t count, loff_t* ppos) -{ - size_t len; - char kbuf[MAX_DEBUG_LEVEL_STRING_LEN]; - - len = scnprintf(kbuf, sizeof(kbuf), "0x%08x\n", msm_vidc_debug); - return simple_read_from_buffer(buf, count, ppos, kbuf, len); -} - -static const struct file_operations debug_level_fops = { - .open = simple_open, - .write = debug_level_write, - .read = debug_level_read, -}; - struct dentry* msm_vidc_debugfs_init_drv() { struct dentry *dir = NULL; @@ -251,11 +196,6 @@ struct dentry *msm_vidc_debugfs_init_core(void *core_in) d_vpr_e("debugfs_create_file: fail\n"); goto failed_create_dir; } - if (!debugfs_create_file("debug_level", 0644, - parent, core, &debug_level_fops)) { - d_vpr_e("debugfs_create_file: fail\n"); - goto failed_create_dir; - } failed_create_dir: return dir; } From 78b1491ee1d49107a2087ecff005ff861e684585 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Tue, 30 Mar 2021 20:41:07 +0530 Subject: [PATCH 0206/1061] video: driver: enable dcvs - power feature Enable/disable dcvs based on below settings. - core supports dcvs - core_clock_voting is set: disable - encode_batching(superframe): disable - decode_batching: disable - thumbnail session: disable - image session: disable Handle below items as part of dcvs enablement. - skip clock scaling for inactive session. - reset dcvs flags to 0, for encoder at dcvs_window. Change-Id: I84e6710946bca3fa8c83178f29745d4b9afd4697 Signed-off-by: Govindaraj Rajagopal --- driver/platform/waipio/src/msm_vidc_waipio.c | 2 +- driver/vidc/inc/msm_vidc_driver.h | 1 + driver/vidc/inc/msm_vidc_internal.h | 7 +- driver/vidc/inc/msm_vidc_power.h | 2 +- driver/vidc/src/msm_vdec.c | 13 ++-- driver/vidc/src/msm_venc.c | 6 ++ driver/vidc/src/msm_vidc.c | 2 + driver/vidc/src/msm_vidc_driver.c | 61 +++++++++++++++- driver/vidc/src/msm_vidc_power.c | 75 ++++++++++---------- driver/vidc/src/msm_vidc_vb2.c | 9 ++- 10 files changed, 123 insertions(+), 55 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 899fe5f060..9787afb38c 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -241,7 +241,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, {SUPER_FRAME, ENC, H264|HEVC, - 0, 16, 1, 0, + 0, 32, 1, 0, V4L2_CID_MPEG_VIDC_SUPERFRAME, 0}, diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 0328a5a637..c226aad219 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -351,6 +351,7 @@ int msm_vidc_init_instance_caps(struct msm_vidc_core* core); int msm_vidc_deinit_core_caps(struct msm_vidc_core* core); int msm_vidc_deinit_instance_caps(struct msm_vidc_core* core); int msm_vidc_update_debug_str(struct msm_vidc_inst *inst); +void msm_vidc_allow_dcvs(struct msm_vidc_inst *inst); bool msm_vidc_allow_decode_batch(struct msm_vidc_inst *inst); int msm_vidc_check_session_supported(struct msm_vidc_inst *inst); int msm_vidc_check_mbps_supported(struct msm_vidc_inst *inst); diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 7a30bd9acb..82f69bb0ba 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -57,12 +57,7 @@ #define MAX_AVC_ENH_LAYER_HYBRID_HP 5 #define PERCENT_PEAK_BITRATE_INCREASED 10 -/* TODO - * #define MAX_SUPERFRAME_COUNT 32 -*/ - -/* Maintains the number of FTB's between each FBD over a window */ -#define DCVS_FTB_WINDOW 16 +#define DCVS_WINDOW 16 /* Superframe can have maximum of 32 frames */ #define VIDC_SUPERFRAME_MAX 32 #define COLOR_RANGE_UNSPECIFIED (-1) diff --git a/driver/vidc/inc/msm_vidc_power.h b/driver/vidc/inc/msm_vidc_power.h index 744c9a75d2..322936fa04 100644 --- a/driver/vidc/inc/msm_vidc_power.h +++ b/driver/vidc/inc/msm_vidc_power.h @@ -249,5 +249,5 @@ static inline int __bpp(enum msm_vidc_colorformat_type f) u64 msm_vidc_max_freq(struct msm_vidc_inst* inst); int msm_vidc_get_inst_load(struct msm_vidc_inst *inst); int msm_vidc_scale_power(struct msm_vidc_inst *inst, bool scale_buses); - +void msm_vidc_power_data_reset(struct msm_vidc_inst *inst); #endif diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index f5aecee6c5..1977708ab3 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -15,6 +15,7 @@ #include "msm_vidc_platform.h" #include "msm_vidc_control.h" #include "msm_vidc_debug.h" +#include "msm_vidc_power.h" #include "msm_vidc_control.h" #include "venus_hfi.h" #include "hfi_packet.h" @@ -1322,8 +1323,6 @@ static int msm_vdec_read_input_subcr_params(struct msm_vidc_inst *inst) else msm_vidc_update_cap_value(inst, CODED_FRAMES, CODED_FRAMES_INTERLACE, __func__); - inst->decode_batch.enable = msm_vidc_allow_decode_batch(inst); - return 0; } @@ -1463,8 +1462,6 @@ int msm_vdec_streamon_input(struct msm_vidc_inst *inst) if (rc) goto error; - inst->decode_batch.enable = msm_vidc_allow_decode_batch(inst); - return 0; error: @@ -1705,8 +1702,6 @@ int msm_vdec_streamon_output(struct msm_vidc_inst *inst) if (rc) goto error; - inst->decode_batch.enable = msm_vidc_allow_decode_batch(inst); - return 0; error: @@ -1813,6 +1808,12 @@ int msm_vdec_process_cmd(struct msm_vidc_inst *inst, u32 cmd) port = (inst->state == MSM_VIDC_DRAIN_LAST_FLAG) ? INPUT_PORT : OUTPUT_PORT; vb2_clear_last_buffer_dequeued(&inst->vb2q[OUTPUT_META_PORT]); vb2_clear_last_buffer_dequeued(&inst->vb2q[OUTPUT_PORT]); + + /* tune power features */ + inst->decode_batch.enable = msm_vidc_allow_decode_batch(inst); + msm_vidc_allow_dcvs(inst); + msm_vidc_power_data_reset(inst); + rc = msm_vidc_state_change_start(inst); if (rc) return rc; diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index 6d0e1b5fe0..c85ea24166 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -14,6 +14,7 @@ #include "msm_vidc_platform.h" #include "msm_vidc_control.h" #include "msm_vidc_debug.h" +#include "msm_vidc_power.h" #include "venus_hfi.h" #include "hfi_packet.h" @@ -971,6 +972,11 @@ int msm_venc_process_cmd(struct msm_vidc_inst *inst, u32 cmd) return -EBUSY; vb2_clear_last_buffer_dequeued(&inst->vb2q[OUTPUT_META_PORT]); vb2_clear_last_buffer_dequeued(&inst->vb2q[OUTPUT_PORT]); + + /* tune power features */ + msm_vidc_allow_dcvs(inst); + msm_vidc_power_data_reset(inst); + rc = msm_vidc_state_change_start(inst); if (rc) return rc; diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index 868a2cbcde..93d52f7489 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -453,6 +453,8 @@ int msm_vidc_qbuf(void *instance, struct media_device *mdev, goto unlock; } + inst->last_qbuf_time_ns = ktime_get_ns(); + rc = vb2_qbuf(q, mdev, b); if (rc) i_vpr_e(inst, "%s: failed with %d\n", __func__, rc); diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 8818732a06..cc1f35a375 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -1995,6 +1995,60 @@ static bool is_single_session(struct msm_vidc_inst *inst) return count == 1; } +void msm_vidc_allow_dcvs(struct msm_vidc_inst *inst) +{ + bool allow = false; + struct msm_vidc_core *core; + + if (!inst || !inst->core) { + d_vpr_e("%s: Invalid args: %pK\n", __func__, inst); + return; + } + core = inst->core; + + allow = !msm_vidc_clock_voting; + if (!allow) { + i_vpr_h(inst, "%s: core_clock_voting is set\n", __func__); + goto exit; + } + + allow = core->capabilities[DCVS].value; + if (!allow) { + i_vpr_h(inst, "%s: core doesn't support dcvs\n", __func__); + goto exit; + } + + allow = !inst->decode_batch.enable; + if (!allow) { + i_vpr_h(inst, "%s: decode_batching enabled\n", __func__); + goto exit; + } + + allow = !msm_vidc_is_super_buffer(inst); + if (!allow) { + i_vpr_h(inst, "%s: encode_batching(super_buffer) enabled\n", __func__); + goto exit; + } + + allow = !is_thumbnail_session(inst); + if (!allow) { + i_vpr_h(inst, "%s: thumbnail session\n", __func__); + goto exit; + } + + allow = !is_image_session(inst); + if (!allow) { + i_vpr_h(inst, "%s: image session\n", __func__); + goto exit; + } + +exit: + i_vpr_h(inst, "%s: dcvs: %s\n", __func__, allow ? "enabled" : "disabled"); + + inst->power.dcvs_flags = 0; + inst->power.dcvs_mode = allow; +} + bool msm_vidc_allow_decode_batch(struct msm_vidc_inst *inst) { struct msm_vidc_core *core; @@ -2002,7 +2056,7 @@ bool msm_vidc_allow_decode_batch(struct msm_vidc_inst *inst) if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; + return false; } core = inst->core; @@ -2055,7 +2109,7 @@ bool msm_vidc_allow_decode_batch(struct msm_vidc_inst *inst) } exit: - i_vpr_h(inst, "%s: batching %s\n", __func__, allow ? "enabled" : "disabled"); + i_vpr_h(inst, "%s: batching: %s\n", __func__, allow ? "enabled" : "disabled"); return allow; } @@ -2203,9 +2257,10 @@ int msm_vidc_queue_buffer_single(struct msm_vidc_inst *inst, struct vb2_buffer * inst->capabilities->cap[ENC_IP_CR].value = 0; } inst->power.buffer_counter++; - msm_vidc_scale_power(inst, true); } + msm_vidc_scale_power(inst, is_input_buffer(buf->type)); + rc = msm_vidc_queue_buffer(inst, buf); if (rc) return rc; diff --git a/driver/vidc/src/msm_vidc_power.c b/driver/vidc/src/msm_vidc_power.c index 8158268433..8412834568 100644 --- a/driver/vidc/src/msm_vidc_power.c +++ b/driver/vidc/src/msm_vidc_power.c @@ -227,7 +227,7 @@ int msm_vidc_scale_buses(struct msm_vidc_inst *inst) return 0; vote_data->power_mode = VIDC_POWER_NORMAL; - if (inst->power.buffer_counter < DCVS_FTB_WINDOW || is_image_session(inst)) + if (inst->power.buffer_counter < DCVS_WINDOW || is_image_session(inst)) vote_data->power_mode = VIDC_POWER_TURBO; if (msm_vidc_clock_voting) vote_data->power_mode = VIDC_POWER_TURBO; @@ -422,17 +422,15 @@ static int msm_vidc_apply_dcvs(struct msm_vidc_inst *inst) int bufs_with_fw = 0; struct msm_vidc_power *power; - if (!inst || !inst->core) { + if (!inst) { d_vpr_e("%s: invalid params %pK\n", __func__, inst); return -EINVAL; } - if (!inst->power.dcvs_mode || inst->decode_batch.enable || is_image_session(inst)) { - i_vpr_l(inst, "Skip DCVS (dcvs %d, batching %d)\n", - inst->power.dcvs_mode, inst->decode_batch.enable); - inst->power.dcvs_flags = 0; + /* skip dcvs */ + if (!inst->power.dcvs_mode) return 0; - } + power = &inst->power; if (is_decode_session(inst)) { @@ -458,22 +456,36 @@ static int msm_vidc_apply_dcvs(struct msm_vidc_inst *inst) * FW is slow and will impact pipeline, Increase clock. * 2) When pending buffers with FW are less than FW requested, * pipeline has cushion to absorb FW slowness, Decrease clocks. - * 3) When DCVS has engaged(Inc or Dec) and pending buffers with FW - * transitions past the nom_threshold, switch to calculated load. - * This smoothens the clock transitions. + * 3) When DCVS has engaged(Inc or Dec): + * For decode: + * - Pending buffers with FW transitions past the nom_threshold, + * switch to calculated load, this smoothens the clock transitions. + * For encode: + * - Always switch to calculated load. * 4) Otherwise maintain previous Load config. */ if (bufs_with_fw >= power->max_threshold) { power->dcvs_flags = MSM_VIDC_DCVS_INCR; + goto exit; } else if (bufs_with_fw < power->min_threshold) { power->dcvs_flags = MSM_VIDC_DCVS_DECR; - } else if ((power->dcvs_flags & MSM_VIDC_DCVS_DECR && - bufs_with_fw >= power->nom_threshold) || - (power->dcvs_flags & MSM_VIDC_DCVS_INCR && - bufs_with_fw <= power->nom_threshold)) - power->dcvs_flags = 0; + goto exit; + } - i_vpr_p(inst, "DCVS: bufs_with_fw %d th[%d %d %d] flags %#x\n", + /* encoder: dcvs window handling */ + if (is_encode_session(inst)) { + power->dcvs_flags = 0; + goto exit; + } + + /* decoder: dcvs window handling */ + if ((power->dcvs_flags & MSM_VIDC_DCVS_DECR && bufs_with_fw >= power->nom_threshold) || + (power->dcvs_flags & MSM_VIDC_DCVS_INCR && bufs_with_fw <= power->nom_threshold)) { + power->dcvs_flags = 0; + } + +exit: + i_vpr_p(inst, "dcvs: bufs_with_fw %d th[%d %d %d] flags %#x\n", bufs_with_fw, power->min_threshold, power->nom_threshold, power->max_threshold, power->dcvs_flags); @@ -498,8 +510,7 @@ int msm_vidc_scale_clocks(struct msm_vidc_inst *inst) if (!data_size) return 0; - //todo: add turbo session check - if (inst->power.buffer_counter < DCVS_FTB_WINDOW || is_image_session(inst)) { + if (inst->power.buffer_counter < DCVS_WINDOW || is_image_session(inst)) { inst->power.min_freq = msm_vidc_max_freq(inst); inst->power.dcvs_flags = 0; } else if (msm_vidc_clock_voting) { @@ -524,7 +535,6 @@ int msm_vidc_scale_power(struct msm_vidc_inst *inst, bool scale_buses) d_vpr_e("%s: invalid params %pK\n", __func__, inst); return -EINVAL; } - core = inst->core; if (!inst->active) { @@ -553,7 +563,7 @@ int msm_vidc_scale_power(struct msm_vidc_inst *inst, bool scale_buses) void msm_vidc_dcvs_data_reset(struct msm_vidc_inst *inst) { struct msm_vidc_power *dcvs; - u32 min_count, actual_count; + u32 min_count, actual_count, max_count; if (!inst) { d_vpr_e("%s: invalid params\n", __func__); @@ -561,12 +571,14 @@ void msm_vidc_dcvs_data_reset(struct msm_vidc_inst *inst) } dcvs = &inst->power; - if (inst->domain == MSM_VIDC_ENCODER) { + if (is_encode_session(inst)) { min_count = inst->buffers.input.min_count; actual_count = inst->buffers.input.actual_count; - } else if (inst->domain == MSM_VIDC_DECODER) { + max_count = min((min_count + DCVS_ENC_EXTRA_INPUT_BUFFERS), actual_count); + } else if (is_decode_session(inst)) { min_count = inst->buffers.output.min_count; actual_count = inst->buffers.output.actual_count; + max_count = min((min_count + DCVS_DEC_EXTRA_OUTPUT_BUFFERS), actual_count); } else { i_vpr_e(inst, "%s: invalid domain type %d\n", __func__, inst->domain); @@ -574,23 +586,12 @@ void msm_vidc_dcvs_data_reset(struct msm_vidc_inst *inst) } dcvs->min_threshold = min_count; - if (inst->domain == MSM_VIDC_ENCODER) - dcvs->max_threshold = min((min_count + DCVS_ENC_EXTRA_INPUT_BUFFERS), - actual_count); - else - dcvs->max_threshold = min((min_count + DCVS_DEC_EXTRA_OUTPUT_BUFFERS), - actual_count); - - dcvs->dcvs_window = - dcvs->max_threshold < dcvs->min_threshold ? 0 : - dcvs->max_threshold - dcvs->min_threshold; - dcvs->nom_threshold = dcvs->min_threshold + - (dcvs->dcvs_window ? - (dcvs->dcvs_window / 2) : 0); - + dcvs->max_threshold = max_count; + dcvs->dcvs_window = min_count < max_count ? max_count - min_count : 0; + dcvs->nom_threshold = dcvs->min_threshold + (dcvs->dcvs_window / 2); dcvs->dcvs_flags = 0; - i_vpr_p(inst, "%s: DCVS: thresholds [%d %d %d] flags %#x\n", + i_vpr_p(inst, "%s: dcvs: thresholds [%d %d %d] flags %#x\n", __func__, dcvs->min_threshold, dcvs->nom_threshold, dcvs->max_threshold, dcvs->dcvs_flags); diff --git a/driver/vidc/src/msm_vidc_vb2.c b/driver/vidc/src/msm_vidc_vb2.c index 677350e989..eb0cbb101f 100644 --- a/driver/vidc/src/msm_vidc_vb2.c +++ b/driver/vidc/src/msm_vidc_vb2.c @@ -8,6 +8,7 @@ #include "msm_vidc_inst.h" #include "msm_vidc_internal.h" #include "msm_vidc_driver.h" +#include "msm_vidc_power.h" #include "msm_vdec.h" #include "msm_venc.h" #include "msm_vidc_debug.h" @@ -204,6 +205,12 @@ int msm_vidc_start_streaming(struct vb2_queue *q, unsigned int count) } } + if (is_decode_session(inst)) + inst->decode_batch.enable = msm_vidc_allow_decode_batch(inst); + + msm_vidc_allow_dcvs(inst); + msm_vidc_power_data_reset(inst); + if (q->type == INPUT_MPLANE) { if (is_decode_session(inst)) rc = msm_vdec_streamon_input(inst); @@ -222,9 +229,9 @@ int msm_vidc_start_streaming(struct vb2_queue *q, unsigned int count) i_vpr_e(inst, "%s: invalid type %d\n", q->type); goto error; } - if (!rc) i_vpr_h(inst, "Streamon: %d successful\n", q->type); + return rc; error: From 6368b78d5f849abeff1ce35fbfa9259d23a6aad8 Mon Sep 17 00:00:00 2001 From: Mihir Ganu Date: Tue, 30 Mar 2021 13:12:29 -0700 Subject: [PATCH 0207/1061] video: driver: Align buffer macros with HFI file CI: 29670767 Align hfi_buffer_iris2.h file with hfi interface file hfi_lx_mem_v1.0_doc.h. Change-Id: Ie44ee4be1ae5df440906411c7cdfa4b8a8a01194 Signed-off-by: Mihir Ganu --- driver/variant/iris2/inc/hfi_buffer_iris2.h | 27 +++++++++------------ 1 file changed, 11 insertions(+), 16 deletions(-) diff --git a/driver/variant/iris2/inc/hfi_buffer_iris2.h b/driver/variant/iris2/inc/hfi_buffer_iris2.h index 93f49151e1..d049dbafb8 100644 --- a/driver/variant/iris2/inc/hfi_buffer_iris2.h +++ b/driver/variant/iris2/inc/hfi_buffer_iris2.h @@ -785,7 +785,7 @@ typedef HFI_U32 HFI_BOOL; SIZE_VPSS_LB(vpss_lb_size, frame_width, frame_height, \ num_vpp_pipes); \ } \ - _size = _lb_size + vpss_lb_size + HDR10_HIST_EXTRADATA_SIZE; \ + _size = _lb_size + vpss_lb_size; \ } while (0) #define VPX_DECODER_FRAME_CONCURENCY_LVL (2) @@ -832,7 +832,8 @@ typedef HFI_U32 HFI_BOOL; VENUS_DMA_ALIGNMENT) + HFI_ALIGN(MAX_SUPERFRAME_HEADER_LEN, \ VENUS_DMA_ALIGNMENT) + HFI_ALIGN(VP9_UDC_HEADER_BUF_SIZE, \ VENUS_DMA_ALIGNMENT) + HFI_ALIGN(VP9_NUM_FRAME_INFO_BUF * \ - CCE_TILE_OFFSET_SIZE, VENUS_DMA_ALIGNMENT) + CCE_TILE_OFFSET_SIZE, VENUS_DMA_ALIGNMENT) + \ + HDR10_HIST_EXTRADATA_SIZE #define HFI_BUFFER_LINE_MP2D(_size, frame_width, frame_height, \ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ @@ -967,14 +968,12 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #endif #define HFI_IRIS2_ENC_RECON_BUF_COUNT(num_recon, n_bframe, ltr_count, \ - _total_hp_layers, _total_hb_layers, hybrid_hp, codec_standard) \ - do \ - { \ + _total_hp_layers, _total_hb_layers, hybrid_hp, codec_standard) \ + do { \ HFI_U32 num_ref = 1; \ if (n_bframe) \ num_ref = 2; \ - if (_total_hp_layers > 1) \ - { \ + if (_total_hp_layers > 1) { \ if (hybrid_hp) \ num_ref = (_total_hp_layers + 1) >> 1; \ else if (codec_standard == HFI_CODEC_ENCODE_HEVC) \ @@ -987,8 +986,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ } \ if (ltr_count) \ num_ref = num_ref + ltr_count; \ - if (_total_hb_layers > 1) \ - { \ + if (_total_hb_layers > 1) { \ if (codec_standard == HFI_CODEC_ENCODE_HEVC) \ num_ref = (_total_hb_layers); \ else if (codec_standard == HFI_CODEC_ENCODE_AVC) \ @@ -998,15 +996,13 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ } while (0) #define SIZE_BIN_BITSTREAM_ENC(_size, rc_type, frame_width, frame_height, \ - work_mode, lcu_size) \ - do \ - { \ + work_mode, lcu_size) \ + do { \ HFI_U32 size_aligned_width = 0, size_aligned_height = 0; \ HFI_U32 bitstream_size_eval = 0; \ size_aligned_width = HFI_ALIGN((frame_width), lcu_size); \ size_aligned_height = HFI_ALIGN((frame_height), lcu_size); \ - if (work_mode == HFI_WORKMODE_2) \ - { \ + if (work_mode == HFI_WORKMODE_2) { \ if ((rc_type == HFI_RC_CQ) || (rc_type == HFI_RC_OFF)) \ { \ bitstream_size_eval = (((size_aligned_width) * \ @@ -1045,8 +1041,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define SIZE_ENC_SINGLE_PIPE(size, rc_type, bitbin_size, num_vpp_pipes, \ frame_width, frame_height, lcu_size) \ - do \ - { \ + do { \ HFI_U32 size_single_pipe_eval = 0, sao_bin_buffer_size = 0, \ _padded_bin_sz = 0; \ HFI_U32 size_aligned_width = 0, size_aligned_height = 0; \ From 925c0b1a58e5ca4348cbb042879172a2267a651f Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Tue, 30 Mar 2021 10:49:16 -0700 Subject: [PATCH 0208/1061] video: driver: Allow HB layer encoding type - Allow HB layer encoding type - fix dynamic setting of I Frame QP and Peak Bitrate. This reverts commit 4ef2b8899d7e493e4115892a2d0e14b7e9a4d98f. Change-Id: I4d63dd424c68d388709684c649ef492ce2489caa --- driver/platform/waipio/src/msm_vidc_waipio.c | 7 ++++--- driver/vidc/src/msm_vidc_control.c | 12 ++++++++++++ driver/vidc/src/msm_vidc_driver.c | 1 + 3 files changed, 17 insertions(+), 3 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 9787afb38c..e9375eeca2 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -670,10 +670,10 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { HFI_PROP_QP_PACKED, CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, - /* TODO: Allow only HP until fw fatal error for HB type is resolved */ {LAYER_TYPE, ENC, HEVC, + V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B, V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P, - V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P, + BIT(V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B) | BIT(V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P), V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P, V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE, @@ -681,8 +681,9 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, {LAYER_TYPE, ENC, H264, + V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_B, V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P, - V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P, + BIT(V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_B) | BIT(V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P), V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P, V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_TYPE, diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 22617ef04e..20f3d8ab73 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -1389,6 +1389,10 @@ int msm_vidc_adjust_hevc_min_qp(void *instance, struct v4l2_ctrl *ctrl) } capability = inst->capabilities; + if (ctrl) + msm_vidc_update_cap_value(inst, MIN_FRAME_QP, + ctrl->val, __func__); + rc = msm_vidc_adjust_hevc_qp(inst, MIN_FRAME_QP); return rc; @@ -1406,6 +1410,10 @@ int msm_vidc_adjust_hevc_max_qp(void *instance, struct v4l2_ctrl *ctrl) } capability = inst->capabilities; + if (ctrl) + msm_vidc_update_cap_value(inst, MAX_FRAME_QP, + ctrl->val, __func__); + rc = msm_vidc_adjust_hevc_qp(inst, MAX_FRAME_QP); return rc; @@ -1423,6 +1431,10 @@ int msm_vidc_adjust_hevc_frame_qp(void *instance, struct v4l2_ctrl *ctrl) } capability = inst->capabilities; + if (ctrl) + msm_vidc_update_cap_value(inst, I_FRAME_QP, + ctrl->val, __func__); + rc = msm_vidc_adjust_hevc_qp(inst, I_FRAME_QP); return rc; diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index cc1f35a375..2862f7cce6 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -1097,6 +1097,7 @@ bool msm_vidc_allow_s_ctrl(struct msm_vidc_inst *inst, u32 id) case V4L2_CID_MPEG_VIDC_VIDEO_BLUR_RESOLUTION: case V4L2_CID_MPEG_VIDEO_CONSTANT_QUALITY: case V4L2_CID_MPEG_VIDC_ENC_INPUT_COMPRESSION_RATIO: + case V4L2_CID_MPEG_VIDEO_BITRATE_PEAK: allow = true; break; default: From e1af4fd098797cd5b2bbc7d1fe4adf303ad3e623 Mon Sep 17 00:00:00 2001 From: Maheshwar Ajja Date: Tue, 30 Mar 2021 14:51:40 -0700 Subject: [PATCH 0209/1061] video: driver: access buffers list under lock only Do not access buffers list of an instance without acquiring its instance lock in msm_vidc_set_clocks() and msm_vidc_set_buses(). Change-Id: Ic7e8e15eaddca3b77bd4eccc6b728de20d3bcc78 Signed-off-by: Maheshwar Ajja --- driver/vidc/inc/msm_vidc_inst.h | 1 + driver/vidc/src/msm_vidc_power.c | 22 +++++++--------------- 2 files changed, 8 insertions(+), 15 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_inst.h b/driver/vidc/inc/msm_vidc_inst.h index ec172220f7..dc850bfb93 100644 --- a/driver/vidc/inc/msm_vidc_inst.h +++ b/driver/vidc/inc/msm_vidc_inst.h @@ -140,6 +140,7 @@ struct msm_vidc_inst { bool active; u64 last_qbuf_time_ns; bool vb2q_init; + u32 max_input_data_size; }; #endif // _MSM_VIDC_INST_H_ diff --git a/driver/vidc/src/msm_vidc_power.c b/driver/vidc/src/msm_vidc_power.c index 8412834568..ac3ab2356e 100644 --- a/driver/vidc/src/msm_vidc_power.c +++ b/driver/vidc/src/msm_vidc_power.c @@ -162,13 +162,8 @@ static int msm_vidc_set_buses(struct msm_vidc_inst* inst) mutex_lock(&core->lock); curr_time_ns = ktime_get_ns(); list_for_each_entry(temp, &core->instances, list) { - struct msm_vidc_buffer *vbuf, *next; - u32 data_size = 0; - - /* TODO: accessing temp without lock */ - list_for_each_entry_safe(vbuf, next, &temp->buffers.input.list, list) - data_size = max(data_size, vbuf->data_size); - if (!data_size) + /* skip no input data sessions */ + if (!temp->max_input_data_size) continue; /* skip inactive session bus bandwidth */ @@ -223,6 +218,7 @@ int msm_vidc_scale_buses(struct msm_vidc_inst *inst) list_for_each_entry(vbuf, &inst->buffers.input.list, list) data_size = max(data_size, vbuf->data_size); + inst->max_input_data_size = data_size; if (!data_size) return 0; @@ -325,8 +321,7 @@ int msm_vidc_set_clocks(struct msm_vidc_inst* inst) struct msm_vidc_core* core; struct msm_vidc_inst* temp; u64 freq; - u64 rate = 0; - u32 data_size; + u64 rate = 0; bool increment, decrement; u64 curr_time_ns; int i = 0; @@ -347,12 +342,8 @@ int msm_vidc_set_clocks(struct msm_vidc_inst* inst) freq = 0; curr_time_ns = ktime_get_ns(); list_for_each_entry(temp, &core->instances, list) { - struct msm_vidc_buffer* vbuf, *next; - - data_size = 0; - list_for_each_entry_safe(vbuf, next, &temp->buffers.input.list, list) - data_size = max(data_size, vbuf->data_size); - if (!data_size) + /* skip no input data sessions */ + if (!temp->max_input_data_size) continue; /* skip inactive session clock rate */ @@ -507,6 +498,7 @@ int msm_vidc_scale_clocks(struct msm_vidc_inst *inst) list_for_each_entry(vbuf, &inst->buffers.input.list, list) data_size = max(data_size, vbuf->data_size); + inst->max_input_data_size = data_size; if (!data_size) return 0; From 10ac73594ffc5509377ed14c7b0b7c020ad6ec2c Mon Sep 17 00:00:00 2001 From: Maheshwar Ajja Date: Wed, 31 Mar 2021 18:35:46 -0700 Subject: [PATCH 0210/1061] video: driver: skip zero length internal buffers allocation Few internal buffers size can be zero based on configuration (such as BIN buffers size is zero for interlace bitstream) and hence skip allocation instead of returning error. Change-Id: Id157115d8d6eb3f64154f3b18ec3843f289164ef Signed-off-by: Maheshwar Ajja --- driver/vidc/src/msm_vidc_driver.c | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 2862f7cce6..2aa484687e 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -2403,11 +2403,9 @@ int msm_vidc_create_internal_buffer(struct msm_vidc_inst *inst, if (!mappings) return -EINVAL; - if (!buffers->size) { - i_vpr_e(inst, "%s: invalid buffer %#x\n", - __func__, buffer_type); - return -EINVAL; - } + if (!buffers->size) + return 0; + buffer = kzalloc(sizeof(struct msm_vidc_buffer), GFP_KERNEL); if (!buffer) { i_vpr_e(inst, "%s: buf alloc failed\n", __func__); From 89e7e48231c84f5e5dcb9f5fd7f7ec61413365ab Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Wed, 31 Mar 2021 14:39:51 -0700 Subject: [PATCH 0211/1061] video: driver: Add support to deliver HFI_PROP_BUFFER_TAG via FTB Add support to deliver HFI_PROP_BUFFER_TAG via FTB metadata buffer to receive HFI_PROP_DPB_TAG_LIST from fw via FBD metadata buffer. Change-Id: Id9eeee26135379975f55923505d9c91905fa0b9e Signed-off-by: Akshata Sahukar --- driver/platform/waipio/src/msm_vidc_waipio.c | 6 +++ driver/vidc/inc/msm_vidc_driver.h | 2 + driver/vidc/inc/msm_vidc_internal.h | 1 + driver/vidc/src/msm_vdec.c | 43 ++++++++++++++----- driver/vidc/src/msm_vidc_control.c | 13 ++++++ driver/vidc/src/msm_vidc_driver.c | 28 ++++++++++++ .../uapi/vidc/media/v4l2_vidc_extensions.h | 1 + 7 files changed, 84 insertions(+), 10 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index e9375eeca2..6ce0dca31d 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -1241,6 +1241,12 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_CID_MPEG_VIDC_METADATA_DPB_TAG_LIST, HFI_PROP_DPB_TAG_LIST}, + {META_OUTPUT_BUF_TAG, DEC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, + HFI_PROP_BUFFER_TAG}, + {META_SUBFRAME_OUTPUT, DEC, CODECS_ALL, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index c226aad219..a4db8b968f 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -106,6 +106,7 @@ static inline bool is_output_meta_enabled(struct msm_vidc_inst *inst) inst->capabilities->cap[META_SEI_MASTERING_DISP].value || inst->capabilities->cap[META_SEI_CLL].value || inst->capabilities->cap[META_BUF_TAG].value || + inst->capabilities->cap[META_DPB_TAG_LIST].value || inst->capabilities->cap[META_SUBFRAME_OUTPUT].value); } else if (is_encode_session(inst)) { enabled = inst->capabilities->cap[META_BUF_TAG].value ? @@ -318,6 +319,7 @@ struct msm_vidc_inst *get_inst(struct msm_vidc_core *core, void put_inst(struct msm_vidc_inst *inst); bool msm_vidc_allow_s_fmt(struct msm_vidc_inst *inst, u32 type); bool msm_vidc_allow_s_ctrl(struct msm_vidc_inst *inst, u32 id); +bool msm_vidc_allow_metadata(struct msm_vidc_inst *inst, u32 cap_id); bool msm_vidc_allow_reqbufs(struct msm_vidc_inst *inst, u32 type); enum msm_vidc_allow msm_vidc_allow_stop(struct msm_vidc_inst *inst); bool msm_vidc_allow_start(struct msm_vidc_inst *inst); diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 82f69bb0ba..9abc4eccec 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -430,6 +430,7 @@ enum msm_vidc_inst_capability_type { META_EVA_STATS, META_BUF_TAG, META_DPB_TAG_LIST, + META_OUTPUT_BUF_TAG, META_SUBFRAME_OUTPUT, META_ENC_QP_METADATA, META_ROI_INFO, diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 1977708ab3..d4ec0e5048 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -1072,7 +1072,7 @@ static int msm_vdec_subscribe_metadata(struct msm_vidc_inst *inst, META_SUBFRAME_OUTPUT, }; - if (!inst || !inst->core) { + if (!inst || !inst->core || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -1082,7 +1082,8 @@ static int msm_vdec_subscribe_metadata(struct msm_vidc_inst *inst, capability = inst->capabilities; payload[0] = HFI_MODE_METADATA; for (i = 0; i < ARRAY_SIZE(metadata_list); i++) { - if (capability->cap[metadata_list[i]].value) { + if (capability->cap[metadata_list[i]].value && + msm_vidc_allow_metadata(inst, metadata_list[i])) { payload[count + 1] = capability->cap[metadata_list[i]].hfi_id; count++; @@ -1110,11 +1111,14 @@ static int msm_vdec_set_delivery_mode_metadata(struct msm_vidc_inst *inst, u32 payload[32] = {0}; u32 i, count = 0; struct msm_vidc_inst_capability *capability; - static const u32 metadata_list[] = { + static const u32 metadata_input_list[] = { META_BUF_TAG, }; + static const u32 metadata_output_list[] = { + META_OUTPUT_BUF_TAG, + }; - if (!inst || !inst->core) { + if (!inst || !inst->core || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -1123,13 +1127,28 @@ static int msm_vdec_set_delivery_mode_metadata(struct msm_vidc_inst *inst, capability = inst->capabilities; payload[0] = HFI_MODE_METADATA; - for (i = 0; i < ARRAY_SIZE(metadata_list); i++) { - if (capability->cap[metadata_list[i]].value) { - payload[count + 1] = - capability->cap[metadata_list[i]].hfi_id; - count++; + + if (port == INPUT_PORT) { + for (i = 0; i < ARRAY_SIZE(metadata_input_list); i++) { + if (capability->cap[metadata_input_list[i]].value) { + payload[count + 1] = + capability->cap[metadata_input_list[i]].hfi_id; + count++; + } } - }; + } else if (port == OUTPUT_PORT) { + for (i = 0; i < ARRAY_SIZE(metadata_output_list); i++) { + if (capability->cap[metadata_output_list[i]].value && + msm_vidc_allow_metadata(inst, metadata_output_list[i])) { + payload[count + 1] = + capability->cap[metadata_output_list[i]].hfi_id; + count++; + } + } + } else { + i_vpr_e(inst, "%s: invalid port: %d\n", __func__, port); + return -EINVAL; + } if (!count) return 0; @@ -1686,6 +1705,10 @@ int msm_vdec_streamon_output(struct msm_vidc_inst *inst) if (rc) goto error; + rc = msm_vdec_set_delivery_mode_metadata(inst, OUTPUT_PORT); + if (rc) + return rc; + rc = msm_vdec_get_output_internal_buffers(inst); if (rc) goto error; diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 20f3d8ab73..028ccbfa33 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -58,6 +58,7 @@ static bool is_meta_ctrl(u32 id) id == V4L2_CID_MPEG_VIDC_METADATA_HDR10PLUS || id == V4L2_CID_MPEG_VIDC_METADATA_EVA_STATS || id == V4L2_CID_MPEG_VIDC_METADATA_BUFFER_TAG || + id == V4L2_CID_MPEG_VIDC_METADATA_DPB_TAG_LIST || id == V4L2_CID_MPEG_VIDC_METADATA_SUBFRAME_OUTPUT || id == V4L2_CID_MPEG_VIDC_METADATA_ROI_INFO || id == V4L2_CID_MPEG_VIDC_METADATA_TIMESTAMP || @@ -663,6 +664,18 @@ int msm_v4l2_op_s_ctrl(struct v4l2_ctrl *ctrl) } if (is_meta_ctrl(ctrl->id)) { + if (cap_id == META_DPB_TAG_LIST) { + /* + * To subscribe HFI_PROP_DPB_TAG_LIST + * data in FBD, HFI_PROP_BUFFER_TAG data + * must be delivered via FTB. Hence, update + * META_OUTPUT_BUF_TAG when META_DPB_TAG_LIST + * is updated. + */ + msm_vidc_update_cap_value(inst, META_OUTPUT_BUF_TAG, + ctrl->val, __func__); + } + rc = msm_vidc_update_meta_port_settings(inst); if (rc) return rc; diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 2862f7cce6..23cdd110ef 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -179,6 +179,7 @@ static const struct msm_vidc_cap_name cap_name_arr[] = { {META_EVA_STATS, "META_EVA_STATS" }, {META_BUF_TAG, "META_BUF_TAG" }, {META_DPB_TAG_LIST, "META_DPB_TAG_LIST" }, + {META_OUTPUT_BUF_TAG, "META_OUTPUT_BUF_TAG" }, {META_SUBFRAME_OUTPUT, "META_SUBFRAME_OUTPUT" }, {META_ENC_QP_METADATA, "META_ENC_QP_METADATA" }, {META_ROI_INFO, "META_ROI_INFO" }, @@ -1114,6 +1115,33 @@ exit: return allow; } +bool msm_vidc_allow_metadata(struct msm_vidc_inst *inst, u32 cap_id) +{ + bool is_allowed = true; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return false; + } + + switch (cap_id) { + case META_OUTPUT_BUF_TAG: + case META_DPB_TAG_LIST: + if (!is_ubwc_colorformat(inst->capabilities->cap[PIX_FMTS].value)) { + i_vpr_h(inst, + "%s: cap: %24s not allowed for split mode\n", + __func__, cap_name(cap_id)); + is_allowed = false; + } + break; + default: + is_allowed = true; + break; + } + + return is_allowed; +} + bool msm_vidc_allow_reqbufs(struct msm_vidc_inst *inst, u32 type) { bool allow = false; diff --git a/include/uapi/vidc/media/v4l2_vidc_extensions.h b/include/uapi/vidc/media/v4l2_vidc_extensions.h index 07d2302468..3817bef95d 100644 --- a/include/uapi/vidc/media/v4l2_vidc_extensions.h +++ b/include/uapi/vidc/media/v4l2_vidc_extensions.h @@ -171,6 +171,7 @@ enum v4l2_mpeg_vidc_metadata { METADATA_SUBFRAME_OUTPUT = 0x0300016d, METADATA_ENC_QP_METADATA = 0x0300016e, METADATA_ROI_INFO = 0x03000173, + METADATA_DPB_TAG_LIST = 0x03000179, }; enum meta_interlace_info { META_INTERLACE_INFO_NONE = 0x00000000, From 19cdce171100ef2abd2b9f8189e144a2afed72f1 Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Fri, 26 Mar 2021 13:26:35 -0700 Subject: [PATCH 0212/1061] video: driver: skip lazy unmap for dec output buffers - add support to skip lazy unmapping for decoder output buffers only. Map twice for these buffers. - v4l2 client owned RO SMMU mapped buffers are maintained separately in read_only list. - For FBD with RO flag from fw, add buffer to read_only list. Else remove from this list. - During FTB, if buffer present in read_only list, add RO flag to hfi buffer and queue to fw. - During streamoff output, unmap all buffers except those present in read_only list. - During close, unmap completely and clean up read_only list, output list. Change-Id: Iacee7d298dfbff0b9cb6f17dff27ad98574b489b Signed-off-by: Darshana Patil --- driver/vidc/inc/msm_vidc_driver.h | 2 + driver/vidc/inc/msm_vidc_inst.h | 1 + driver/vidc/inc/msm_vidc_internal.h | 2 + driver/vidc/inc/msm_vidc_memory.h | 2 + driver/vidc/src/msm_vidc.c | 1 + driver/vidc/src/msm_vidc_driver.c | 360 ++++++++++++++++++--------- driver/vidc/src/msm_vidc_memory.c | 52 +++- driver/vidc/src/venus_hfi_response.c | 101 ++++++-- 8 files changed, 376 insertions(+), 145 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index a4db8b968f..d9f1aa96a2 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -310,6 +310,8 @@ int msm_vidc_destroy_internal_buffer(struct msm_vidc_inst *inst, void msm_vidc_destroy_buffers(struct msm_vidc_inst *inst); int msm_vidc_flush_buffers(struct msm_vidc_inst* inst, enum msm_vidc_buffer_type type); +int msm_vidc_flush_delayed_unmap_buffers(struct msm_vidc_inst *inst, + enum msm_vidc_buffer_type type); struct msm_vidc_buffer *get_meta_buffer(struct msm_vidc_inst *inst, struct msm_vidc_buffer *vbuf); struct msm_vidc_inst *get_inst_ref(struct msm_vidc_core *core, diff --git a/driver/vidc/inc/msm_vidc_inst.h b/driver/vidc/inc/msm_vidc_inst.h index dc850bfb93..e8577be7a6 100644 --- a/driver/vidc/inc/msm_vidc_inst.h +++ b/driver/vidc/inc/msm_vidc_inst.h @@ -56,6 +56,7 @@ struct msm_vidc_mappings_info { struct msm_vidc_buffers_info { struct msm_vidc_buffers input; struct msm_vidc_buffers output; + struct msm_vidc_buffers read_only; struct msm_vidc_buffers input_meta; struct msm_vidc_buffers output_meta; struct msm_vidc_buffers bin; diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 9abc4eccec..487e8a3e50 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -141,6 +141,7 @@ enum msm_vidc_buffer_type { MSM_VIDC_BUF_OUTPUT = 2, MSM_VIDC_BUF_INPUT_META = 3, MSM_VIDC_BUF_OUTPUT_META = 4, + MSM_VIDC_BUF_READ_ONLY = 5, MSM_VIDC_BUF_QUEUE = 10, MSM_VIDC_BUF_BIN = 20, MSM_VIDC_BUF_ARP = 21, @@ -757,6 +758,7 @@ struct msm_vidc_map { u64 device_addr; struct sg_table *table; struct dma_buf_attachment *attach; + u32 skip_delayed_unmap:1; }; struct msm_vidc_mappings { diff --git a/driver/vidc/inc/msm_vidc_memory.h b/driver/vidc/inc/msm_vidc_memory.h index cb183ad3f9..7522792de6 100644 --- a/driver/vidc/inc/msm_vidc_memory.h +++ b/driver/vidc/inc/msm_vidc_memory.h @@ -17,6 +17,8 @@ int msm_vidc_memory_map(struct msm_vidc_core *core, struct msm_vidc_map *map); int msm_vidc_memory_unmap(struct msm_vidc_core *core, struct msm_vidc_map *map); +int msm_vidc_memory_unmap_completely(struct msm_vidc_core *core, + struct msm_vidc_map *map); struct dma_buf *msm_vidc_memory_get_dmabuf(int fd); void msm_vidc_memory_put_dmabuf(void *dmabuf); diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index 93d52f7489..82d245ca83 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -749,6 +749,7 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) INIT_LIST_HEAD(&inst->buffers.input_meta.list); INIT_LIST_HEAD(&inst->buffers.output.list); INIT_LIST_HEAD(&inst->buffers.output_meta.list); + INIT_LIST_HEAD(&inst->buffers.read_only.list); INIT_LIST_HEAD(&inst->buffers.bin.list); INIT_LIST_HEAD(&inst->buffers.arp.list); INIT_LIST_HEAD(&inst->buffers.comv.list); diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 9cc7817039..302bd5a222 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -881,6 +881,8 @@ struct msm_vidc_buffers *msm_vidc_get_buffers( return &inst->buffers.output; case MSM_VIDC_BUF_OUTPUT_META: return &inst->buffers.output_meta; + case MSM_VIDC_BUF_READ_ONLY: + return &inst->buffers.read_only; case MSM_VIDC_BUF_BIN: return &inst->buffers.bin; case MSM_VIDC_BUF_ARP: @@ -1747,6 +1749,65 @@ static int vb2_buffer_to_driver(struct vb2_buffer *vb2, return rc; } +int msm_vidc_process_readonly_buffers(struct msm_vidc_inst *inst, + struct msm_vidc_buffer *buf) +{ + int rc = 0; + struct msm_vidc_buffer *ro_buf, *dummy; + struct msm_vidc_buffers *ro_buffers; + + if (!inst || !buf) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (!is_decode_session(inst) || !is_output_buffer(buf->type)) + return 0; + + ro_buffers = msm_vidc_get_buffers(inst, MSM_VIDC_BUF_READ_ONLY, __func__); + if (!ro_buffers) + return -EINVAL; + + /* + * check if buffer present in ro_buffers list + * if present: add ro flag to buf and remove from ro_buffers list + * if not present: do nothing + */ + list_for_each_entry_safe(ro_buf, dummy, &ro_buffers->list, list) { + if (ro_buf->device_addr == buf->device_addr) { + buf->attr |= MSM_VIDC_ATTR_READ_ONLY; + print_vidc_buffer(VIDC_LOW, "low", "ro buf removed", inst, ro_buf); + list_del(&ro_buf->list); + kfree(ro_buf); + break; + } + } + return rc; +} + +int msm_vidc_unmap_buffers(struct msm_vidc_inst *inst, + enum msm_vidc_buffer_type type) +{ + int rc = 0; + struct msm_vidc_mappings *mappings; + struct msm_vidc_map *map, *dummy; + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + mappings = msm_vidc_get_mappings(inst, type, __func__); + if (!mappings) + return -EINVAL; + + list_for_each_entry_safe(map, dummy, &mappings->list, list) { + msm_vidc_memory_unmap_completely(inst->core, map); + } + + return rc; +} + int msm_vidc_unmap_driver_buf(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buf) { @@ -1786,8 +1847,76 @@ int msm_vidc_unmap_driver_buf(struct msm_vidc_inst *inst, if (!map->refcount) { list_del(&map->list); kfree(map); + map = NULL; + } else { + /* we should not be here except decoder output buffer */ + if (!is_decode_session(inst) || !is_output_buffer(buf->type)) { + print_vidc_buffer(VIDC_ERR, "err ", "non zero refcount found", inst, buf); + return -EINVAL; + } } + return rc; +} + +int msm_vidc_map_driver_buf(struct msm_vidc_inst *inst, + struct msm_vidc_buffer *buf) +{ + int rc = 0; + struct msm_vidc_mappings *mappings; + struct msm_vidc_map *map; + bool found = false; + + if (!inst || !buf) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + mappings = msm_vidc_get_mappings(inst, buf->type, __func__); + if (!mappings) + return -EINVAL; + + /* + * new buffer: map twice for lazy unmap feature sake + * existing buffer: map once + */ + list_for_each_entry(map, &mappings->list, list) { + if (map->dmabuf == buf->dmabuf) { + found = true; + break; + } + } + if (!found) { + /* new buffer case */ + map = kzalloc(sizeof(struct msm_vidc_map), GFP_KERNEL); + if (!map) { + i_vpr_e(inst, "%s: alloc failed\n", __func__); + return -ENOMEM; + } + INIT_LIST_HEAD(&map->list); + map->type = buf->type; + map->dmabuf = msm_vidc_memory_get_dmabuf(buf->fd); + if (!map->dmabuf) + return -EINVAL; + map->region = msm_vidc_get_buffer_region(inst, buf->type, __func__); + /* lazy unmap feature not needed for decoder output buffers */ + if (is_decode_session(inst) && is_output_buffer(buf->type)) { + map->skip_delayed_unmap = 1; + rc = msm_vidc_memory_map(inst->core, map); + if (rc) { + msm_vidc_memory_put_dmabuf(map->dmabuf); + kfree(map); + return rc; + } + } + list_add_tail(&map->list, &mappings->list); + } + rc = msm_vidc_memory_map(inst->core, map); + if (rc) + return rc; + + buf->device_addr = map->device_addr; + return 0; } @@ -1801,9 +1930,7 @@ int msm_vidc_put_driver_buf(struct msm_vidc_inst *inst, return -EINVAL; } - rc = msm_vidc_unmap_driver_buf(inst, buf); - if (rc) - return rc; + msm_vidc_unmap_driver_buf(inst, buf); msm_vidc_memory_put_dmabuf(buf->dmabuf); @@ -1811,61 +1938,7 @@ int msm_vidc_put_driver_buf(struct msm_vidc_inst *inst, list_del(&buf->list); kfree(buf); - return 0; -} - -int msm_vidc_map_driver_buf(struct msm_vidc_inst *inst, - struct msm_vidc_buffer *buf) -{ - int rc = 0; - struct msm_vidc_mappings *mappings; - struct msm_vidc_map *map = NULL; - bool found = false; - - if (!inst || !buf) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - mappings = msm_vidc_get_mappings(inst, buf->type, __func__); - if (!mappings) - return -EINVAL; - - /* check if it is an existing one */ - list_for_each_entry(map, &mappings->list, list) { - if (map->dmabuf == buf->dmabuf) { - found = true; - break; - } - } - if (found) { - /* skip mapping for RO buffer */ - if (!(buf->attr & MSM_VIDC_ATTR_READ_ONLY)) { - rc = msm_vidc_memory_map(inst->core, map); - if (rc) - return -ENOMEM; - buf->device_addr = map->device_addr; - } - return 0; - } - map = kzalloc(sizeof(struct msm_vidc_map), GFP_KERNEL); - if (!map) { - i_vpr_e(inst, "%s: alloc failed\n", __func__); - return -ENOMEM; - } - INIT_LIST_HEAD(&map->list); - map->type = buf->type; - map->dmabuf = buf->dmabuf; - map->region = msm_vidc_get_buffer_region(inst, buf->type, __func__); - rc = msm_vidc_memory_map(inst->core, map); - if (rc) { - kfree(map); - return -ENOMEM; - } - buf->device_addr = map->device_addr; - list_add_tail(&map->list, &mappings->list); - - return 0; + return rc; } struct msm_vidc_buffer *msm_vidc_get_driver_buf(struct msm_vidc_inst *inst, @@ -1874,9 +1947,7 @@ struct msm_vidc_buffer *msm_vidc_get_driver_buf(struct msm_vidc_inst *inst, int rc = 0; struct msm_vidc_buffer *buf = NULL; struct msm_vidc_buffers *buffers; - struct dma_buf *dmabuf; enum msm_vidc_buffer_type buf_type; - bool found = false; if (!inst || !vb2) { d_vpr_e("%s: invalid params\n", __func__); @@ -1891,58 +1962,25 @@ struct msm_vidc_buffer *msm_vidc_get_driver_buf(struct msm_vidc_inst *inst, if (!buffers) return NULL; - dmabuf = msm_vidc_memory_get_dmabuf(vb2->planes[0].m.fd); - if (!dmabuf) + buf = kzalloc(sizeof(struct msm_vidc_buffer), GFP_KERNEL); + if (!buf) { + i_vpr_e(inst, "%s: alloc failed\n", __func__); return NULL; - - /* check if it is an existing buffer */ - list_for_each_entry(buf, &buffers->list, list) { - if (buf->dmabuf == dmabuf && - buf->data_offset == vb2->planes[0].data_offset) { - found = true; - break; - } } - if (found) { - /* only YUV buffers are allowed to repeat */ - if ((is_decode_session(inst) && vb2->type != OUTPUT_MPLANE) || - (is_encode_session(inst) && vb2->type != INPUT_MPLANE)) { - print_vidc_buffer(VIDC_ERR, "err ", - "existing buffer", inst, buf); - goto error; - } - /* for decoder, YUV with RO flag are allowed to repeat */ - if (is_decode_session(inst) && - !(buf->attr & MSM_VIDC_ATTR_READ_ONLY)) { - print_vidc_buffer(VIDC_ERR, "err ", - "existing buffer without RO flag", inst, buf); - goto error; - } - /* for encoder, treat the repeated buffer as new buffer */ - if (is_encode_session(inst) && vb2->type == INPUT_MPLANE) - found = false; - } - if (!found) { - buf = kzalloc(sizeof(struct msm_vidc_buffer), GFP_KERNEL); - if (!buf) { - i_vpr_e(inst, "%s: alloc failed\n", __func__); - goto error; - } - buf->dmabuf = dmabuf; - INIT_LIST_HEAD(&buf->list); - list_add_tail(&buf->list, &buffers->list); - } else { - /* reset all attributes except read only */ - buf->attr &= MSM_VIDC_ATTR_READ_ONLY; - } - - /* treat every buffer as deferred buffer initially */ - buf->attr |= MSM_VIDC_ATTR_DEFERRED; + INIT_LIST_HEAD(&buf->list); + list_add_tail(&buf->list, &buffers->list); rc = vb2_buffer_to_driver(vb2, buf); if (rc) goto error; + buf->dmabuf = msm_vidc_memory_get_dmabuf(buf->fd); + if (!buf->dmabuf) + goto error; + + /* treat every buffer as deferred buffer initially */ + buf->attr |= MSM_VIDC_ATTR_DEFERRED; + rc = msm_vidc_map_driver_buf(inst, buf); if (rc) goto error; @@ -1950,9 +1988,9 @@ struct msm_vidc_buffer *msm_vidc_get_driver_buf(struct msm_vidc_inst *inst, return buf; error: - msm_vidc_memory_put_dmabuf(dmabuf); - if (!found) - kfree(buf); + msm_vidc_memory_put_dmabuf(buf->dmabuf); + list_del(&buf->list); + kfree(buf); return NULL; } @@ -2159,6 +2197,12 @@ static int msm_vidc_queue_buffer(struct msm_vidc_inst *inst, struct msm_vidc_buf msm_vidc_update_cap_value(inst, CODEC_CONFIG, 0, __func__); } + if (is_decode_session(inst) && is_output_buffer(buf->type)) { + rc = msm_vidc_process_readonly_buffers(inst, buf); + if (rc) + return rc; + } + print_vidc_buffer(VIDC_HIGH, "high", "qbuf", inst, buf); meta = get_meta_buffer(inst, buf); if (meta) @@ -3039,6 +3083,7 @@ int msm_vidc_session_streamoff(struct msm_vidc_inst *inst, /* flush deferred buffers */ msm_vidc_flush_buffers(inst, buffer_type); + msm_vidc_flush_delayed_unmap_buffers(inst, buffer_type); return 0; error: @@ -3694,7 +3739,7 @@ int msm_vidc_flush_buffers(struct msm_vidc_inst* inst, buffer_type[1] = MSM_VIDC_BUF_OUTPUT; } else { i_vpr_h(inst, "%s: invalid buffer type %d\n", - __func__, type); + __func__, type); return -EINVAL; } @@ -3706,8 +3751,9 @@ int msm_vidc_flush_buffers(struct msm_vidc_inst* inst, list_for_each_entry_safe(buf, dummy, &buffers->list, list) { if (buf->attr & MSM_VIDC_ATTR_QUEUED || buf->attr & MSM_VIDC_ATTR_DEFERRED) { - print_vidc_buffer(VIDC_ERR, "err ", "flushing buffer", inst, buf); - msm_vidc_vb2_buffer_done(inst, buf); + print_vidc_buffer(VIDC_HIGH, "high", "flushing buffer", inst, buf); + if (!(buf->attr & MSM_VIDC_ATTR_BUFFER_DONE)) + msm_vidc_vb2_buffer_done(inst, buf); msm_vidc_put_driver_buf(inst, buf); } } @@ -3716,15 +3762,75 @@ int msm_vidc_flush_buffers(struct msm_vidc_inst* inst, return rc; } +int msm_vidc_flush_delayed_unmap_buffers(struct msm_vidc_inst *inst, + enum msm_vidc_buffer_type type) +{ + int rc = 0; + struct msm_vidc_mappings *maps; + struct msm_vidc_map *map, *dummy; + struct msm_vidc_buffer *ro_buf, *ro_dummy; + enum msm_vidc_buffer_type buffer_type[2]; + int i; + bool found = false; + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (type == MSM_VIDC_BUF_INPUT) { + buffer_type[0] = MSM_VIDC_BUF_INPUT_META; + buffer_type[1] = MSM_VIDC_BUF_INPUT; + } else if (type == MSM_VIDC_BUF_OUTPUT) { + buffer_type[0] = MSM_VIDC_BUF_OUTPUT_META; + buffer_type[1] = MSM_VIDC_BUF_OUTPUT; + } else { + i_vpr_h(inst, "%s: invalid buffer type %d\n", + __func__, type); + return -EINVAL; + } + + for (i = 0; i < ARRAY_SIZE(buffer_type); i++) { + maps = msm_vidc_get_mappings(inst, buffer_type[i], __func__); + if (!maps) + return -EINVAL; + + list_for_each_entry_safe(map, dummy, &maps->list, list) { + /* + * decoder output bufs will have skip_delayed_unmap = true + * unmap all decoder output buffers except those present in + * read_only buffers list + */ + if (!map->skip_delayed_unmap) + continue; + found = false; + list_for_each_entry_safe(ro_buf, ro_dummy, + &inst->buffers.read_only.list, list) { + if (map->dmabuf == ro_buf->dmabuf) { + found = true; + break; + } + } + /* completely unmap */ + if (!found) + msm_vidc_memory_unmap_completely(inst->core, map); + } + } + + return rc; +} + void msm_vidc_destroy_buffers(struct msm_vidc_inst *inst) { struct msm_vidc_buffers *buffers; struct msm_vidc_buffer *buf, *dummy; - static const enum msm_vidc_buffer_type buf_types[] = { + static const enum msm_vidc_buffer_type ext_buf_types[] = { MSM_VIDC_BUF_INPUT, MSM_VIDC_BUF_OUTPUT, MSM_VIDC_BUF_INPUT_META, MSM_VIDC_BUF_OUTPUT_META, + }; + static const enum msm_vidc_buffer_type internal_buf_types[] = { MSM_VIDC_BUF_BIN, MSM_VIDC_BUF_ARP, MSM_VIDC_BUF_COMV, @@ -3741,19 +3847,35 @@ void msm_vidc_destroy_buffers(struct msm_vidc_inst *inst) return; } - for (i = 0; i < ARRAY_SIZE(buf_types); i++) { - buffers = msm_vidc_get_buffers(inst, buf_types[i], __func__); + for (i = 0; i < ARRAY_SIZE(internal_buf_types); i++) { + buffers = msm_vidc_get_buffers(inst, internal_buf_types[i], __func__); if (!buffers) continue; list_for_each_entry_safe(buf, dummy, &buffers->list, list) { i_vpr_h(inst, - "destroying buffer: type %d idx %d fd %d addr %#x size %d\n", + "destroying internal buffer: type %d idx %d fd %d addr %#x size %d\n", buf->type, buf->index, buf->fd, buf->device_addr, buf->buffer_size); - if (is_internal_buffer(buf->type)) - msm_vidc_destroy_internal_buffer(inst, buf); - else - msm_vidc_put_driver_buf(inst, buf); + msm_vidc_destroy_internal_buffer(inst, buf); } + msm_vidc_unmap_buffers(inst, internal_buf_types[i]); + } + + for (i = 0; i < ARRAY_SIZE(ext_buf_types); i++) { + buffers = msm_vidc_get_buffers(inst, ext_buf_types[i], __func__); + if (!buffers) + continue; + + list_for_each_entry_safe(buf, dummy, &buffers->list, list) { + print_vidc_buffer(VIDC_ERR, "err", "destroying ", inst, buf); + msm_vidc_put_driver_buf(inst, buf); + } + msm_vidc_unmap_buffers(inst, ext_buf_types[i]); + } + + list_for_each_entry_safe(buf, dummy, &inst->buffers.read_only.list, list) { + print_vidc_buffer(VIDC_ERR, "err", "destroying ro buffer", inst, buf); + list_del(&buf->list); + kfree(buf); } } diff --git a/driver/vidc/src/msm_vidc_memory.c b/driver/vidc/src/msm_vidc_memory.c index 3316eb46d5..4218196e0c 100644 --- a/driver/vidc/src/msm_vidc_memory.c +++ b/driver/vidc/src/msm_vidc_memory.c @@ -116,11 +116,14 @@ int msm_vidc_memory_map(struct msm_vidc_core *core, struct msm_vidc_map *map) goto error_attach; } - /* - * Get the scatterlist for the given attachment - * Mapping of sg is taken care by map attachment - */ - attach->dma_map_attrs = DMA_ATTR_DELAYED_UNMAP; + if (!map->skip_delayed_unmap) { + /* + * Get the scatterlist for the given attachment + * Mapping of sg is taken care by map attachment + */ + attach->dma_map_attrs |= DMA_ATTR_DELAYED_UNMAP; + } + /* * We do not need dma_map function to perform cache operations * on the whole buffer size and hence pass skip sync flag. @@ -148,6 +151,11 @@ int msm_vidc_memory_map(struct msm_vidc_core *core, struct msm_vidc_map *map) map->table = table; map->attach = attach; map->refcount++; + + d_vpr_l( + "%s: type %d device_addr %#x refcount %d region %d\n", + __func__, map->type, map->device_addr, map->refcount, map->region); + return 0; error_sg: @@ -159,7 +167,8 @@ error_cb: return rc; } -int msm_vidc_memory_unmap(struct msm_vidc_core *core, struct msm_vidc_map *map) +int msm_vidc_memory_unmap(struct msm_vidc_core *core, + struct msm_vidc_map *map) { int rc = 0; @@ -178,6 +187,10 @@ int msm_vidc_memory_unmap(struct msm_vidc_core *core, struct msm_vidc_map *map) if (map->refcount) goto exit; + d_vpr_l( + "%s: type %d device_addr %#x refcount %d region %d\n", + __func__, map->type, map->device_addr, map->refcount, map->region); + dma_buf_unmap_attachment(map->attach, map->table, DMA_BIDIRECTIONAL); dma_buf_detach(map->dmabuf, map->attach); @@ -190,6 +203,33 @@ exit: return rc; } +int msm_vidc_memory_unmap_completely(struct msm_vidc_core *core, + struct msm_vidc_map *map) +{ + int rc = 0; + + if (!core || !map) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (!map->refcount) + return 0; + + while (map->refcount) { + rc = msm_vidc_memory_unmap(core, map); + if (rc) + break; + if (!map->refcount) { + list_del(&map->list); + kfree(map); + map = NULL; + break; + } + } + return rc; +} + int msm_vidc_memory_alloc(struct msm_vidc_core *core, struct msm_vidc_alloc *mem) { int rc = 0; diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index 521a7934ce..a9a3a7d640 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -481,6 +481,61 @@ static int get_driver_buffer_flags(struct msm_vidc_inst *inst, u32 hfi_flags) return driver_flags; } +static int handle_read_only_buffer(struct msm_vidc_inst *inst, + struct msm_vidc_buffer *buffer) +{ + struct msm_vidc_buffer *ro_buf; + struct msm_vidc_buffers *ro_buffers; + bool found = false; + + if (!inst || !buffer) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (!is_decode_session(inst) || !is_output_buffer(buffer->type)) + return 0; + + ro_buffers = msm_vidc_get_buffers(inst, MSM_VIDC_BUF_READ_ONLY, __func__); + if (!ro_buffers) + return -EINVAL; + + list_for_each_entry(ro_buf, &ro_buffers->list, list) { + if (ro_buf->device_addr == buffer->device_addr) { + found = true; + break; + } + } + + /* + * RO flag: add to read_only list if buffer is not present + * if present, do nothing + * Without RO flag: remove buffer from read_only list if present + * if not present, do not error out + */ + if (buffer->attr & MSM_VIDC_ATTR_READ_ONLY) { + if (!found) { + ro_buf = kmemdup(buffer, sizeof(struct msm_vidc_buffer), GFP_KERNEL); + if (!ro_buf) { + i_vpr_e(inst, "%s: buffer alloc failed\n", __func__); + return -ENOMEM; + } + INIT_LIST_HEAD(&ro_buf->list); + list_add_tail(&ro_buf->list, &ro_buffers->list); + print_vidc_buffer(VIDC_LOW, "low", "ro buf added", inst, ro_buf); + } + } else { + if (found) { + print_vidc_buffer(VIDC_LOW, "low", "ro buf deleted", inst, ro_buf); + list_del(&ro_buf->list); + kfree(ro_buf); + ro_buf = NULL; + } + } + + return 0; +} + static int handle_input_buffer(struct msm_vidc_inst *inst, struct hfi_buffer *buffer) { @@ -502,14 +557,15 @@ static int handle_input_buffer(struct msm_vidc_inst *inst, found = false; list_for_each_entry(buf, &buffers->list, list) { - if (buf->device_addr == buffer->base_address) { + if (buf->index == buffer->index) { found = true; break; } } if (!found) { - i_vpr_e(inst, "%s: buffer not found for idx %d addr %#x\n", - __func__, buffer->index, buffer->base_address); + i_vpr_e(inst, "%s: invalid buffer idx %d addr %#x data_offset %d\n", + __func__, buffer->index, buffer->base_address, + buffer->data_offset); return -EINVAL; } @@ -556,14 +612,15 @@ static int handle_output_buffer(struct msm_vidc_inst *inst, found = false; list_for_each_entry(buf, &buffers->list, list) { - if (buf->device_addr == buffer->base_address) { + if (buf->index == buffer->index) { found = true; break; } } if (!found) { - i_vpr_e(inst, "%s: invalid idx %d daddr %#x\n", - __func__, buffer->index, buffer->base_address); + i_vpr_e(inst, "%s: invalid idx %d daddr %#x data_offset %d\n", + __func__, buffer->index, buffer->base_address, + buffer->data_offset); return -EINVAL; } buf->data_offset = buffer->data_offset; @@ -615,11 +672,15 @@ static int handle_output_buffer(struct msm_vidc_inst *inst, } } - if (buffer->flags & HFI_BUF_FW_FLAG_READONLY) - buf->attr |= MSM_VIDC_ATTR_READ_ONLY; - else - buf->attr &= ~MSM_VIDC_ATTR_READ_ONLY; - + if (is_decode_session(inst)) { + if (buffer->flags & HFI_BUF_FW_FLAG_READONLY) + buf->attr |= MSM_VIDC_ATTR_READ_ONLY; + else + buf->attr &= ~MSM_VIDC_ATTR_READ_ONLY; + rc = handle_read_only_buffer(inst, buf); + if (rc) + return rc; + } buf->flags = 0; buf->flags = get_driver_buffer_flags(inst, buffer->flags); @@ -651,14 +712,15 @@ static int handle_input_metadata_buffer(struct msm_vidc_inst *inst, found = false; list_for_each_entry(buf, &buffers->list, list) { - if (buf->device_addr == buffer->base_address) { + if (buf->index == buffer->index) { found = true; break; } } if (!found) { - i_vpr_e(inst, "%s: invalid idx %d daddr %#x\n", - __func__, buffer->index, buffer->base_address); + i_vpr_e(inst, "%s: invalid idx %d daddr %#x data_offset %d\n", + __func__, buffer->index, buffer->base_address, + buffer->data_offset); return -EINVAL; } /* attach dequeued flag for, only last frame in the batch */ @@ -701,14 +763,15 @@ static int handle_output_metadata_buffer(struct msm_vidc_inst *inst, found = false; list_for_each_entry(buf, &buffers->list, list) { - if (buf->device_addr == buffer->base_address) { + if (buf->index == buffer->index) { found = true; break; } } if (!found) { - i_vpr_e(inst, "%s: invalid idx %d daddr %#x\n", - __func__, buffer->index, buffer->base_address); + i_vpr_e(inst, "%s: invalid idx %d daddr %#x data_offset %d\n", + __func__, buffer->index, buffer->base_address, + buffer->data_offset); return -EINVAL; } @@ -756,9 +819,7 @@ static int handle_dequeue_buffers(struct msm_vidc_inst* inst) buf->attr |= MSM_VIDC_ATTR_BUFFER_DONE; msm_vidc_vb2_buffer_done(inst, buf); } - /* do not unmap / delete read only buffer */ - if (!(buf->attr & MSM_VIDC_ATTR_READ_ONLY)) - msm_vidc_put_driver_buf(inst, buf); + msm_vidc_put_driver_buf(inst, buf); } } } From 34ed55ecd12a18a76645a58fa1b046ae30336b74 Mon Sep 17 00:00:00 2001 From: Shi Zhongbo Date: Tue, 30 Mar 2021 09:53:31 +0800 Subject: [PATCH 0213/1061] video: driver: optimize thumbnail input buffer count Update thumbnail input buffer count to 1 after recieving thumbnail enable control. Change-Id: I9341d34d3427c00fd6792f47c947bf4b12966a39 Signed-off-by: Shi Zhongbo --- driver/vidc/inc/msm_vidc_driver.h | 1 + driver/vidc/src/msm_vidc_control.c | 7 ++- driver/vidc/src/msm_vidc_driver.c | 74 ++++++++++++++++++++++++++++++ 3 files changed, 80 insertions(+), 2 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index d9f1aa96a2..31d9d44318 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -348,6 +348,7 @@ void inst_unlock(struct msm_vidc_inst *inst, const char *function); bool inst_lock_check(struct msm_vidc_inst *inst, const char *function); int msm_vidc_update_bitstream_buffer_size(struct msm_vidc_inst *inst); int msm_vidc_update_meta_port_settings(struct msm_vidc_inst *inst); +int msm_vidc_update_buffer_count(struct msm_vidc_inst *inst, u32 port); void msm_vidc_schedule_core_deinit(struct msm_vidc_core *core); bool msm_vidc_is_super_buffer(struct msm_vidc_inst *inst); int msm_vidc_init_core_caps(struct msm_vidc_core* core); diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 028ccbfa33..b21dc3f9f2 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -656,13 +656,16 @@ int msm_v4l2_op_s_ctrl(struct v4l2_ctrl *ctrl) if (rc) return rc; } - if (ctrl->id == V4L2_CID_MPEG_VIDC_PRIORITY) { rc = msm_vidc_adjust_session_priority(inst, ctrl); if (rc) return rc; } - + if (ctrl->id == V4L2_CID_MPEG_VIDC_THUMBNAIL_MODE) { + rc = msm_vidc_update_buffer_count(inst, INPUT_PORT); + if (rc) + return rc; + } if (is_meta_ctrl(ctrl->id)) { if (cap_id == META_DPB_TAG_LIST) { /* diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 302bd5a222..9c46328e9a 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -4056,6 +4056,80 @@ int msm_vidc_update_meta_port_settings(struct msm_vidc_inst *inst) return 0; } +int msm_vidc_update_buffer_count(struct msm_vidc_inst *inst, u32 port) +{ + struct msm_vidc_core *core; + + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + core = inst->core; + + switch (port) { + case INPUT_PORT: + inst->buffers.input.min_count = call_session_op(core, + min_count, inst, MSM_VIDC_BUF_INPUT); + inst->buffers.input.extra_count = call_session_op(core, + extra_count, inst, MSM_VIDC_BUF_INPUT); + if (inst->buffers.input.actual_count < + inst->buffers.input.min_count + + inst->buffers.input.extra_count) { + inst->buffers.input.actual_count = + inst->buffers.input.min_count + + inst->buffers.input.extra_count; + } + if (is_input_meta_enabled(inst)) { + inst->buffers.input_meta.min_count = + inst->buffers.input.min_count; + inst->buffers.input_meta.extra_count = + inst->buffers.input.extra_count; + inst->buffers.input_meta.actual_count = + inst->buffers.input.actual_count; + } else { + inst->buffers.input_meta.min_count = 0; + inst->buffers.input_meta.extra_count = 0; + inst->buffers.input_meta.actual_count = 0; + } + d_vpr_h("update input min buffer to %u\n", + inst->buffers.input.min_count); + break; + case OUTPUT_PORT: + if (!inst->vb2q[INPUT_PORT].streaming) + inst->buffers.output.min_count = call_session_op(core, + min_count, inst, MSM_VIDC_BUF_OUTPUT); + inst->buffers.output.extra_count = call_session_op(core, + extra_count, inst, MSM_VIDC_BUF_OUTPUT); + if (inst->buffers.output.actual_count < + inst->buffers.output.min_count + + inst->buffers.output.extra_count) { + inst->buffers.output.actual_count = + inst->buffers.output.min_count + + inst->buffers.output.extra_count; + } + if (is_output_meta_enabled(inst)) { + inst->buffers.output_meta.min_count = + inst->buffers.output.min_count; + inst->buffers.output_meta.extra_count = + inst->buffers.output.extra_count; + inst->buffers.output_meta.actual_count = + inst->buffers.output.actual_count; + } else { + inst->buffers.output_meta.min_count = 0; + inst->buffers.output_meta.extra_count = 0; + inst->buffers.output_meta.actual_count = 0; + } + d_vpr_h("update output min buffer to %u\n", + inst->buffers.output.min_count); + break; + default: + d_vpr_e("%s unknown port %d\n", __func__, port); + return -EINVAL; + } + + return 0; +} + void msm_vidc_schedule_core_deinit(struct msm_vidc_core *core) { if (!core) From 459b93d5f3d17fdbd36afe02dc96d22511666c75 Mon Sep 17 00:00:00 2001 From: Maheshwar Ajja Date: Fri, 2 Apr 2021 11:12:17 -0700 Subject: [PATCH 0214/1061] video: driver: amend get and put dmabuf calls Call get dmabuf before adding to buffers and maps list similarly call put dmabuf before remvong from buffers and maps list. Change-Id: I6875ffb0ed8a144993db0dfdef84333a49521999 Signed-off-by: Maheshwar Ajja --- driver/vidc/src/msm_vidc_driver.c | 17 +++++++++-------- driver/vidc/src/msm_vidc_memory.c | 2 +- 2 files changed, 10 insertions(+), 9 deletions(-) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 302bd5a222..8c5dba84b2 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -1845,15 +1845,10 @@ int msm_vidc_unmap_driver_buf(struct msm_vidc_inst *inst, /* finally delete if refcount is zero */ if (!map->refcount) { + msm_vidc_memory_put_dmabuf(map->dmabuf); list_del(&map->list); kfree(map); map = NULL; - } else { - /* we should not be here except decoder output buffer */ - if (!is_decode_session(inst) || !is_output_buffer(buf->type)) { - print_vidc_buffer(VIDC_ERR, "err ", "non zero refcount found", inst, buf); - return -EINVAL; - } } return rc; @@ -3812,8 +3807,15 @@ int msm_vidc_flush_delayed_unmap_buffers(struct msm_vidc_inst *inst, } } /* completely unmap */ - if (!found) + if (!found) { + if (map->refcount > 1) { + i_vpr_e(inst, + "%s: unexpected map refcount: %u device addr %#x\n", + __func__, map->refcount, map->device_addr); + msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); + } msm_vidc_memory_unmap_completely(inst->core, map); + } } } @@ -3857,7 +3859,6 @@ void msm_vidc_destroy_buffers(struct msm_vidc_inst *inst) buf->type, buf->index, buf->fd, buf->device_addr, buf->buffer_size); msm_vidc_destroy_internal_buffer(inst, buf); } - msm_vidc_unmap_buffers(inst, internal_buf_types[i]); } for (i = 0; i < ARRAY_SIZE(ext_buf_types); i++) { diff --git a/driver/vidc/src/msm_vidc_memory.c b/driver/vidc/src/msm_vidc_memory.c index 4218196e0c..9fe531fbfb 100644 --- a/driver/vidc/src/msm_vidc_memory.c +++ b/driver/vidc/src/msm_vidc_memory.c @@ -195,7 +195,6 @@ int msm_vidc_memory_unmap(struct msm_vidc_core *core, dma_buf_detach(map->dmabuf, map->attach); map->device_addr = 0x0; - map->dmabuf = NULL; map->attach = NULL; map->table = NULL; @@ -221,6 +220,7 @@ int msm_vidc_memory_unmap_completely(struct msm_vidc_core *core, if (rc) break; if (!map->refcount) { + msm_vidc_memory_put_dmabuf(map->dmabuf); list_del(&map->list); kfree(map); map = NULL; From d6890cd14a21def7c199257117de256f2c543406 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Thu, 1 Apr 2021 19:56:16 +0530 Subject: [PATCH 0215/1061] video: driver: print buffer_name instead of hex value Handled below items as part of this change. - print buffer_name instead of hex value. - enable dcvs only for realtime sessions. - enhanced max_input_data_size handling at msm_vidc_scale_power. Change-Id: If5ac810f4e020bee54364161596c5547af94161a Signed-off-by: Govindaraj Rajagopal --- .../variant/iris2/src/msm_vidc_buffer_iris2.c | 15 +- driver/vidc/inc/msm_vidc_driver.h | 2 + driver/vidc/inc/msm_vidc_internal.h | 29 ++- driver/vidc/src/msm_vdec.c | 34 +--- driver/vidc/src/msm_venc.c | 27 +-- driver/vidc/src/msm_vidc_buffer.c | 16 +- driver/vidc/src/msm_vidc_control.c | 20 +- driver/vidc/src/msm_vidc_driver.c | 176 +++++++++++------- driver/vidc/src/msm_vidc_memory.c | 18 +- driver/vidc/src/msm_vidc_power.c | 40 ++-- driver/vidc/src/msm_vidc_vb2.c | 18 +- driver/vidc/src/venus_hfi.c | 4 +- driver/vidc/src/venus_hfi_response.c | 3 +- 13 files changed, 201 insertions(+), 201 deletions(-) diff --git a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c index 38e13edc29..19a16385fa 100644 --- a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c @@ -473,8 +473,8 @@ struct msm_vidc_buf_type_handle { int msm_buffer_size_iris2(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type buffer_type) { - int i, size = 0; - u32 buf_type_handle_size = 0; + int i; + u32 size = 0, buf_type_handle_size = 0; const struct msm_vidc_buf_type_handle *buf_type_handle_arr = NULL; static const struct msm_vidc_buf_type_handle dec_buf_type_handle[] = { {MSM_VIDC_BUF_INPUT, msm_vidc_decoder_input_size }, @@ -525,9 +525,14 @@ int msm_buffer_size_iris2(struct msm_vidc_inst *inst, } /* handle unknown buffer type */ - if (i == buf_type_handle_size) + if (i == buf_type_handle_size) { i_vpr_e(inst, "%s: unknown buffer type %#x\n", __func__, buffer_type); + goto exit; + } + i_vpr_l(inst, "buffer_size: type: %11s, size: %9u\n", buf_name(buffer_type), size); + +exit: return size; } @@ -589,7 +594,7 @@ int msm_buffer_min_count_iris2(struct msm_vidc_inst *inst, break; } - i_vpr_l(inst, "%s: type %u, count %u\n", __func__, buffer_type, count); + i_vpr_l(inst, " min_count: type: %11s, count: %9u\n", buf_name(buffer_type), count); return count; } @@ -616,6 +621,6 @@ int msm_buffer_extra_count_iris2(struct msm_vidc_inst *inst, break; } - i_vpr_l(inst, "%s: type %u, count %u\n", __func__, buffer_type, count); + i_vpr_l(inst, "extra_count: type: %11s, count: %9u\n", buf_name(buffer_type), count); return count; } diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index d9f1aa96a2..0c86c8779a 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -272,6 +272,7 @@ int msm_vidc_change_core_state(struct msm_vidc_core *core, int msm_vidc_core_init(struct msm_vidc_core *core); int msm_vidc_core_deinit(struct msm_vidc_core *core, bool force); int msm_vidc_core_timeout(struct msm_vidc_core *core); +int msm_vidc_print_buffer_info(struct msm_vidc_inst *inst); int msm_vidc_print_inst_info(struct msm_vidc_inst *inst); void msm_vidc_print_core_info(struct msm_vidc_core *core); int msm_vidc_smmu_fault_handler(struct iommu_domain *domain, @@ -360,5 +361,6 @@ bool msm_vidc_allow_decode_batch(struct msm_vidc_inst *inst); int msm_vidc_check_session_supported(struct msm_vidc_inst *inst); int msm_vidc_check_mbps_supported(struct msm_vidc_inst *inst); int msm_vidc_check_scaling_supported(struct msm_vidc_inst *inst); +const char *buf_name(enum msm_vidc_buffer_type type); #endif // _MSM_VIDC_DRIVER_H_ diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 487e8a3e50..9949c6da75 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -136,21 +136,20 @@ enum msm_vidc_colorformat_type { }; enum msm_vidc_buffer_type { - MSM_VIDC_BUF_NONE = 0, - MSM_VIDC_BUF_INPUT = 1, - MSM_VIDC_BUF_OUTPUT = 2, - MSM_VIDC_BUF_INPUT_META = 3, - MSM_VIDC_BUF_OUTPUT_META = 4, - MSM_VIDC_BUF_READ_ONLY = 5, - MSM_VIDC_BUF_QUEUE = 10, - MSM_VIDC_BUF_BIN = 20, - MSM_VIDC_BUF_ARP = 21, - MSM_VIDC_BUF_COMV = 22, - MSM_VIDC_BUF_NON_COMV = 23, - MSM_VIDC_BUF_LINE = 24, - MSM_VIDC_BUF_DPB = 25, - MSM_VIDC_BUF_PERSIST = 26, - MSM_VIDC_BUF_VPSS = 27, + MSM_VIDC_BUF_INPUT = 1, + MSM_VIDC_BUF_OUTPUT = 2, + MSM_VIDC_BUF_INPUT_META = 3, + MSM_VIDC_BUF_OUTPUT_META = 4, + MSM_VIDC_BUF_READ_ONLY = 5, + MSM_VIDC_BUF_QUEUE = 6, + MSM_VIDC_BUF_BIN = 7, + MSM_VIDC_BUF_ARP = 8, + MSM_VIDC_BUF_COMV = 9, + MSM_VIDC_BUF_NON_COMV = 10, + MSM_VIDC_BUF_LINE = 11, + MSM_VIDC_BUF_DPB = 12, + MSM_VIDC_BUF_PERSIST = 13, + MSM_VIDC_BUF_VPSS = 14, }; /* always match with v4l2 flags V4L2_BUF_FLAG_* */ diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index d4ec0e5048..402021d19c 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -816,24 +816,6 @@ static int msm_vdec_get_input_internal_buffers(struct msm_vidc_inst *inst) return rc; } - i_vpr_h(inst, "input internal buffer: min size reuse\n"); - i_vpr_h(inst, "bin buffer: %d %d %d\n", - inst->buffers.bin.min_count, - inst->buffers.bin.size, - inst->buffers.bin.reuse); - i_vpr_h(inst, "comv buffer: %d %d %d\n", - inst->buffers.comv.min_count, - inst->buffers.comv.size, - inst->buffers.comv.reuse); - i_vpr_h(inst, "non_comv buffer: %d %d %d\n", - inst->buffers.non_comv.min_count, - inst->buffers.non_comv.size, - inst->buffers.non_comv.reuse); - i_vpr_h(inst, "line buffer: %d %d %d\n", - inst->buffers.line.min_count, - inst->buffers.line.size, - inst->buffers.line.reuse); - return rc; } @@ -850,12 +832,6 @@ static int msm_vdec_get_output_internal_buffers(struct msm_vidc_inst *inst) if (rc) return rc; - i_vpr_h(inst, "output internal buffer: min size reuse\n"); - i_vpr_h(inst, "dpb buffer: %d %d %d\n", - inst->buffers.dpb.min_count, - inst->buffers.dpb.size, - inst->buffers.dpb.reuse); - return rc; } @@ -1832,14 +1808,18 @@ int msm_vdec_process_cmd(struct msm_vidc_inst *inst, u32 cmd) vb2_clear_last_buffer_dequeued(&inst->vb2q[OUTPUT_META_PORT]); vb2_clear_last_buffer_dequeued(&inst->vb2q[OUTPUT_PORT]); + rc = msm_vidc_state_change_start(inst); + if (rc) + return rc; + /* tune power features */ inst->decode_batch.enable = msm_vidc_allow_decode_batch(inst); msm_vidc_allow_dcvs(inst); msm_vidc_power_data_reset(inst); - rc = msm_vidc_state_change_start(inst); - if (rc) - return rc; + /* print final buffer counts & size details */ + msm_vidc_print_buffer_info(inst); + rc = venus_hfi_session_command(inst, HFI_CMD_RESUME, port, diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index c85ea24166..1c0382216c 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -653,23 +653,6 @@ static int msm_venc_get_output_internal_buffers(struct msm_vidc_inst *inst) return rc; } - i_vpr_h(inst, "internal buffer: min size\n"); - i_vpr_h(inst, "bin buffer: %d %d\n", - inst->buffers.bin.min_count, - inst->buffers.bin.size); - i_vpr_h(inst, "comv buffer: %d %d\n", - inst->buffers.comv.min_count, - inst->buffers.comv.size); - i_vpr_h(inst, "non_comv buffer: %d %d\n", - inst->buffers.non_comv.min_count, - inst->buffers.non_comv.size); - i_vpr_h(inst, "line buffer: %d %d\n", - inst->buffers.line.min_count, - inst->buffers.line.size); - i_vpr_h(inst, "dpb buffer: %d %d\n", - inst->buffers.dpb.min_count, - inst->buffers.dpb.size); - return rc; } @@ -973,13 +956,17 @@ int msm_venc_process_cmd(struct msm_vidc_inst *inst, u32 cmd) vb2_clear_last_buffer_dequeued(&inst->vb2q[OUTPUT_META_PORT]); vb2_clear_last_buffer_dequeued(&inst->vb2q[OUTPUT_PORT]); + rc = msm_vidc_state_change_start(inst); + if (rc) + return rc; + /* tune power features */ msm_vidc_allow_dcvs(inst); msm_vidc_power_data_reset(inst); - rc = msm_vidc_state_change_start(inst); - if (rc) - return rc; + /* print final buffer counts & size details */ + msm_vidc_print_buffer_info(inst); + rc = venus_hfi_session_command(inst, HFI_CMD_RESUME, INPUT_PORT, diff --git a/driver/vidc/src/msm_vidc_buffer.c b/driver/vidc/src/msm_vidc_buffer.c index 41e607f4ed..e0e7fb2374 100644 --- a/driver/vidc/src/msm_vidc_buffer.c +++ b/driver/vidc/src/msm_vidc_buffer.c @@ -34,15 +34,6 @@ u32 msm_vidc_input_min_count(struct msm_vidc_inst* inst) if (is_thumbnail_session(inst) || is_image_session(inst)) input_min_count = 1; - //if (is_grid_session(inst)) - // input_min_count = 2; - - //if (is_hier_b_session(inst)) { - //max_layer = get_ctrl(inst, - // V4L2_CID_MPEG_VIDC_VIDEO_HEVC_MAX_HIER_CODING_LAYER); - //input_min_count = (1 << (max_layer->val - 1)) + 2; - //} - return input_min_count; } @@ -193,8 +184,8 @@ u32 msm_vidc_internal_buffer_count(struct msm_vidc_inst *inst, else count = 0; } else { - i_vpr_e(inst, "%s: unsupported buffer type %#x\n", - __func__, buffer_type); + i_vpr_e(inst, "%s: unsupported buffer type %s\n", + __func__, buf_name(buffer_type)); count = 0; } } @@ -317,9 +308,6 @@ u32 msm_vidc_encoder_output_size(struct msm_vidc_inst *inst) * Initially frame_size = YUVsize * 2; */ - /* if (is_grid_session(inst)) { - f->fmt.pix_mp.width = f->fmt.pix_mp.height = HEIC_GRID_DIMENSION; - } */ width = ALIGN(f->fmt.pix_mp.width, BUFFER_ALIGNMENT_SIZE(32)); height = ALIGN(f->fmt.pix_mp.height, BUFFER_ALIGNMENT_SIZE(32)); mbs_per_frame = NUM_MBS_PER_FRAME(width, height); diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 028ccbfa33..ae5d541c04 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -266,7 +266,7 @@ int msm_vidc_update_cap_value(struct msm_vidc_inst *inst, u32 cap, if (inst->capabilities->cap[cap].value != adjusted_val) i_vpr_h(inst, - "%s: updated database: name %s, value %#x -> %#x\n", + "%s: updated database: name: %s, value: %#x -> %#x\n", func, cap_name(cap), inst->capabilities->cap[cap].value, adjusted_val); @@ -1678,6 +1678,9 @@ int msm_vidc_set_vbr_related_properties(void *instance, hfi_value = inst->capabilities->cap[cap_id].value; + i_vpr_h(inst, "set cap: name: %24s, value: %#10x, hfi: %#10x\n", cap_name(cap_id), + inst->capabilities->cap[cap_id].value, hfi_value); + rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32, &hfi_value, sizeof(u32), __func__); @@ -1707,6 +1710,9 @@ int msm_vidc_set_cbr_related_properties(void *instance, hfi_value = inst->capabilities->cap[cap_id].value; + i_vpr_h(inst, "set cap: name: %24s, value: %#10x, hfi: %#10x\n", cap_name(cap_id), + inst->capabilities->cap[cap_id].value, hfi_value); + rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32, &hfi_value, sizeof(u32), __func__); @@ -2071,6 +2077,9 @@ int msm_vidc_set_layer_count_and_type(void *instance, /* hfi baselayer starts from 1 */ hfi_layer_count = inst->capabilities->cap[ENH_LAYER_COUNT].value + 1; + i_vpr_h(inst, "set cap: name: %24s, value: %#10x, hfi: %#10x\n", cap_name(cap_id), + inst->capabilities->cap[cap_id].value, hfi_layer_count); + rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32, &hfi_layer_count, sizeof(u32), __func__); if (rc) @@ -2102,6 +2111,8 @@ int msm_vidc_set_gop_size(void *instance, } hfi_value = inst->capabilities->cap[GOP_SIZE].value; + i_vpr_h(inst, "set cap: name: %24s, value: %#10x, hfi: %#10x\n", cap_name(cap_id), + inst->capabilities->cap[cap_id].value, hfi_value); rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32, &hfi_value, sizeof(u32), __func__); @@ -2170,6 +2181,10 @@ int msm_vidc_set_bitrate(void *instance, set_total_bitrate: hfi_value = inst->capabilities->cap[BIT_RATE].value; + + i_vpr_h(inst, "set cap: name: %24s, value: %#10x, hfi: %#10x\n", cap_name(cap_id), + inst->capabilities->cap[cap_id].value, hfi_value); + rc = msm_vidc_packetize_control(inst, BIT_RATE, HFI_PAYLOAD_U32, &hfi_value, sizeof(u32), __func__); exit: @@ -2190,6 +2205,9 @@ int msm_vidc_set_session_priority(void *instance, hfi_value = (inst->capabilities->cap[cap_id].value * 2) + inst->priority_level; + i_vpr_h(inst, "set cap: name: %24s, value: %#10x, hfi: %#10x\n", cap_name(cap_id), + inst->capabilities->cap[cap_id].value, hfi_value); + rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32, &hfi_value, sizeof(u32), __func__); diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 302bd5a222..d09168a275 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -37,11 +37,6 @@ extern struct msm_vidc_core *g_core; #define SSR_ADDR_ID 0xFFFFFFFF00000000 #define SSR_ADDR_SHIFT 32 -struct msm_vidc_buf_type_name { - enum msm_vidc_buffer_type type; - char *name; -}; - struct msm_vidc_cap_name { enum msm_vidc_inst_capability_type cap; char *name; @@ -202,6 +197,44 @@ exit: return name; } +struct msm_vidc_buf_type_name { + enum msm_vidc_buffer_type type; + char *name; +}; + +static const struct msm_vidc_buf_type_name buf_type_name_arr[] = { + {MSM_VIDC_BUF_INPUT, "INPUT" }, + {MSM_VIDC_BUF_OUTPUT, "OUTPUT" }, + {MSM_VIDC_BUF_INPUT_META, "INPUT_META" }, + {MSM_VIDC_BUF_OUTPUT_META, "OUTPUT_META" }, + {MSM_VIDC_BUF_READ_ONLY, "READ_ONLY" }, + {MSM_VIDC_BUF_QUEUE, "QUEUE" }, + {MSM_VIDC_BUF_BIN, "BIN" }, + {MSM_VIDC_BUF_ARP, "ARP" }, + {MSM_VIDC_BUF_COMV, "COMV" }, + {MSM_VIDC_BUF_NON_COMV, "NON_COMV" }, + {MSM_VIDC_BUF_LINE, "LINE" }, + {MSM_VIDC_BUF_DPB, "DPB" }, + {MSM_VIDC_BUF_PERSIST, "PERSIST" }, + {MSM_VIDC_BUF_VPSS, "VPSS" }, +}; + +const char *buf_name(enum msm_vidc_buffer_type type) +{ + const char *name = "UNKNOWN BUF"; + + if (!type || type > ARRAY_SIZE(buf_type_name_arr)) + goto exit; + + if (buf_type_name_arr[type - 1].type != type) + goto exit; + + name = buf_type_name_arr[type - 1].name; + +exit: + return name; +} + struct msm_vidc_inst_state_name { enum msm_vidc_inst_state state; char *name; @@ -270,22 +303,12 @@ void print_vidc_buffer(u32 tag, const char *tag_str, const char *str, struct msm if (!(tag & msm_vidc_debug) || !inst || !vbuf || !tag_str || !str) return; - if (vbuf->type == MSM_VIDC_BUF_INPUT || vbuf->type == MSM_VIDC_BUF_OUTPUT) { - dprintk_inst(tag, tag_str, inst, - "%s: %s: idx %2d fd %3d off %d daddr %#llx size %d filled %d flags %#x ts %lld attr %#x\n", - str, vbuf->type == MSM_VIDC_BUF_INPUT ? "INPUT" : "OUTPUT", - vbuf->index, vbuf->fd, vbuf->data_offset, - vbuf->device_addr, vbuf->buffer_size, vbuf->data_size, - vbuf->flags, vbuf->timestamp, vbuf->attr); - } else if (vbuf->type == MSM_VIDC_BUF_INPUT_META || - vbuf->type == MSM_VIDC_BUF_OUTPUT_META) { - dprintk_inst(tag, tag_str, inst, - "%s: %s: idx %2d fd %3d off %d daddr %#llx size %d filled %d flags %#x ts %lld attr %#x\n", - str, vbuf->type == MSM_VIDC_BUF_INPUT_META ? "INPUT_META" : "OUTPUT_META", - vbuf->index, vbuf->fd, vbuf->data_offset, - vbuf->device_addr, vbuf->buffer_size, vbuf->data_size, - vbuf->flags, vbuf->timestamp, vbuf->attr); - } + dprintk_inst(tag, tag_str, inst, + "%s: %s: idx %2d fd %3d off %d daddr %#llx size %d filled %d flags %#x ts %lld attr %#x\n", + str, buf_name(vbuf->type), + vbuf->index, vbuf->fd, vbuf->data_offset, + vbuf->device_addr, vbuf->buffer_size, vbuf->data_size, + vbuf->flags, vbuf->timestamp, vbuf->attr); } void print_vb2_buffer(const char *str, struct msm_vidc_inst *inst, @@ -899,6 +922,8 @@ struct msm_vidc_buffers *msm_vidc_get_buffers( return &inst->buffers.persist; case MSM_VIDC_BUF_VPSS: return &inst->buffers.vpss; + case MSM_VIDC_BUF_QUEUE: + return NULL; default: i_vpr_e(inst, "%s: invalid driver buffer type %d\n", func, buffer_type); @@ -2103,6 +2128,12 @@ void msm_vidc_allow_dcvs(struct msm_vidc_inst *inst) goto exit; } + allow = is_realtime_session(inst); + if (!allow) { + i_vpr_h(inst, "%s: non-realtime session\n", __func__); + goto exit; + } + allow = !is_image_session(inst); if (!allow) { i_vpr_h(inst, "%s: image session\n", __func__); @@ -2327,7 +2358,7 @@ int msm_vidc_queue_buffer_single(struct msm_vidc_inst *inst, struct vb2_buffer * if (is_encode_session(inst)) { cr = inst->capabilities->cap[ENC_IP_CR].value; msm_vidc_update_input_cr(inst, vb2->index, cr); - inst->capabilities->cap[ENC_IP_CR].value = 0; + msm_vidc_update_cap_value(inst, ENC_IP_CR, 0, __func__); } inst->power.buffer_counter++; } @@ -2357,15 +2388,13 @@ int msm_vidc_destroy_internal_buffer(struct msm_vidc_inst *inst, } if (!is_internal_buffer(buffer->type)) { - i_vpr_e(inst, "%s: buffer type %#x is not internal\n", - __func__, buffer->type); + i_vpr_e(inst, "%s: type: %s is not internal\n", + __func__, buf_name(buffer->type)); return 0; } - i_vpr_h(inst, - "%s: destroy buffer_type %#x, size %d device_addr %#x\n", - __func__, buffer->type, buffer->buffer_size, - buffer->device_addr); + i_vpr_h(inst, "%s: destroy: type: %8s, size: %9u, device_addr %#x\n", __func__, + buf_name(buffer->type), buffer->buffer_size, buffer->device_addr); buffers = msm_vidc_get_buffers(inst, buffer->type, __func__); if (!buffers) @@ -2460,8 +2489,8 @@ int msm_vidc_create_internal_buffer(struct msm_vidc_inst *inst, return -EINVAL; } if (!is_internal_buffer(buffer_type)) { - i_vpr_e(inst, "%s: buffer type %#x is not internal\n", - __func__, buffer_type); + i_vpr_e(inst, "%s: type %s is not internal\n", + __func__, buf_name(buffer_type)); return 0; } @@ -2522,10 +2551,8 @@ int msm_vidc_create_internal_buffer(struct msm_vidc_inst *inst, buffer->dmabuf = alloc->dmabuf; buffer->device_addr = map->device_addr; - i_vpr_h(inst, - "%s: created buffer_type %#x, size %d device_addr %#x\n", - __func__, buffer_type, buffers->size, - buffer->device_addr); + i_vpr_h(inst, "%s: create: type: %8s, size: %9u, device_addr %#x\n", __func__, + buf_name(buffer_type), buffers->size, buffer->device_addr); return 0; } @@ -2547,8 +2574,7 @@ int msm_vidc_create_internal_buffers(struct msm_vidc_inst *inst, return -EINVAL; if (buffers->reuse) { - i_vpr_l(inst, "%s: reuse enabled for buffer type %#x\n", - __func__, buffer_type); + i_vpr_l(inst, "%s: reuse enabled for %s\n", __func__, buf_name(buffer_type)); return 0; } @@ -2573,8 +2599,7 @@ int msm_vidc_queue_internal_buffers(struct msm_vidc_inst *inst, return -EINVAL; } if (!is_internal_buffer(buffer_type)) { - i_vpr_e(inst, "%s: buffer type %#x is not internal\n", - __func__, buffer_type); + i_vpr_e(inst, "%s: %s is not internal\n", __func__, buf_name(buffer_type)); return 0; } @@ -2583,8 +2608,8 @@ int msm_vidc_queue_internal_buffers(struct msm_vidc_inst *inst, return -EINVAL; if (buffers->reuse) { - i_vpr_l(inst, "%s: reuse enabled for buffer type %#x\n", - __func__, buffer_type); + i_vpr_l(inst, "%s: reuse enabled for %s buf\n", + __func__, buf_name(buffer_type)); return 0; } @@ -2601,8 +2626,8 @@ int msm_vidc_queue_internal_buffers(struct msm_vidc_inst *inst, /* mark queued */ buffer->attr |= MSM_VIDC_ATTR_QUEUED; - i_vpr_h(inst, "%s: queued buffer_type %#x, size %d\n", - __func__, buffer_type, buffers->size); + i_vpr_h(inst, "%s: queue: type: %8s, size: %9u, device_addr %#x\n", __func__, + buf_name(buffer->type), buffer->buffer_size, buffer->device_addr); } return 0; @@ -2620,8 +2645,8 @@ int msm_vidc_alloc_and_queue_session_internal_buffers(struct msm_vidc_inst *inst if (buffer_type != MSM_VIDC_BUF_ARP && buffer_type != MSM_VIDC_BUF_PERSIST) { - i_vpr_e(inst, "%s: invalid buffer type: %d\n", - __func__, buffer_type); + i_vpr_e(inst, "%s: invalid buffer type: %s\n", + __func__, buf_name(buffer_type)); rc = -EINVAL; goto exit; } @@ -2654,8 +2679,8 @@ int msm_vidc_release_internal_buffers(struct msm_vidc_inst *inst, return -EINVAL; } if (!is_internal_buffer(buffer_type)) { - i_vpr_e(inst, "%s: buffer type %#x is not internal\n", - __func__, buffer_type); + i_vpr_e(inst, "%s: %s is not internal\n", + __func__, buf_name(buffer_type)); return 0; } @@ -2664,8 +2689,8 @@ int msm_vidc_release_internal_buffers(struct msm_vidc_inst *inst, return -EINVAL; if (buffers->reuse) { - i_vpr_l(inst, "%s: reuse enabled for buffer type %#x\n", - __func__, buffer_type); + i_vpr_l(inst, "%s: reuse enabled for %s buf\n", + __func__, buf_name(buffer_type)); return 0; } @@ -2682,8 +2707,8 @@ int msm_vidc_release_internal_buffers(struct msm_vidc_inst *inst, /* mark pending release */ buffer->attr |= MSM_VIDC_ATTR_PENDING_RELEASE; - i_vpr_h(inst, "%s: released buffer_type %#x, size %d\n", - __func__, buffer_type, buffers->size); + i_vpr_h(inst, "%s: release: type: %8s, size: %9u, device_addr %#x\n", __func__, + buf_name(buffer->type), buffer->buffer_size, buffer->device_addr); } return 0; @@ -3461,6 +3486,31 @@ int msm_vidc_core_timeout(struct msm_vidc_core *core) return msm_vidc_core_deinit(core, true); } +int msm_vidc_print_buffer_info(struct msm_vidc_inst *inst) +{ + struct msm_vidc_buffers *buffers; + int i; + + if (!inst) { + i_vpr_e(inst, "%s: invalid params\n", __func__); + return -EINVAL; + } + + /* Print buffer details */ + for (i = 0; i < ARRAY_SIZE(buf_type_name_arr); i++) { + buffers = msm_vidc_get_buffers(inst, buf_type_name_arr[i].type, __func__); + if (!buffers) + continue; + + i_vpr_h(inst, "buf: type: %11s, count %2d, extra %2d, actual %2d, size %9u\n", + buf_type_name_arr[i].name, buffers->min_count, + buffers->extra_count, buffers->actual_count, + buffers->size); + } + + return 0; +} + int msm_vidc_print_inst_info(struct msm_vidc_inst *inst) { struct msm_vidc_buffers *buffers; @@ -3471,20 +3521,6 @@ int msm_vidc_print_inst_info(struct msm_vidc_inst *inst) struct dma_buf *dbuf; int i = 0; - static const struct msm_vidc_buf_type_name buf_type_name[] = { - {MSM_VIDC_BUF_INPUT, "INPUT" }, - {MSM_VIDC_BUF_OUTPUT, "OUTPUT" }, - {MSM_VIDC_BUF_INPUT_META, "IN_META" }, - {MSM_VIDC_BUF_OUTPUT_META, "OUT_META" }, - {MSM_VIDC_BUF_BIN, "BIN" }, - {MSM_VIDC_BUF_ARP, "ARP" }, - {MSM_VIDC_BUF_COMV, "COMV" }, - {MSM_VIDC_BUF_NON_COMV, "NON_COMV" }, - {MSM_VIDC_BUF_LINE, "LINE" }, - {MSM_VIDC_BUF_PERSIST, "PERSIST" }, - {MSM_VIDC_BUF_VPSS, "VPSS" }, - }; - if (!inst || !inst->capabilities) { i_vpr_e(inst, "%s: invalid params\n", __func__); return -EINVAL; @@ -3506,13 +3542,13 @@ int msm_vidc_print_inst_info(struct msm_vidc_inst *inst) frame_rate, bit_rate, bit_depth); /* Print buffer details */ - for (i = 0; i < ARRAY_SIZE(buf_type_name); i++) { - buffers = msm_vidc_get_buffers(inst, buf_type_name[i].type, __func__); + for (i = 0; i < ARRAY_SIZE(buf_type_name_arr); i++) { + buffers = msm_vidc_get_buffers(inst, buf_type_name_arr[i].type, __func__); if (!buffers) continue; - i_vpr_e(inst, "count: type: %8s, min: %2d, extra: %2d, actual: %2d\n", - buf_type_name[i].name, buffers->min_count, + i_vpr_e(inst, "count: type: %11s, min: %2d, extra: %2d, actual: %2d\n", + buf_type_name_arr[i].name, buffers->min_count, buffers->extra_count, buffers->actual_count); list_for_each_entry(buf, &buffers->list, list) { @@ -3520,8 +3556,8 @@ int msm_vidc_print_inst_info(struct msm_vidc_inst *inst) continue; dbuf = (struct dma_buf *)buf->dmabuf; i_vpr_e(inst, - "buf: type: %8s, index: %2d, fd: %4d, size: %9u, off: %8u, filled: %9u, iova: %8x, inode: %9ld, flags: %8x, ts: %16lld, attr: %8x\n", - buf_type_name[i].name, buf->index, buf->fd, buf->buffer_size, + "buf: type: %11s, index: %2d, fd: %4d, size: %9u, off: %8u, filled: %9u, iova: %8x, inode: %9ld, flags: %8x, ts: %16lld, attr: %8x\n", + buf_type_name_arr[i].name, buf->index, buf->fd, buf->buffer_size, buf->data_offset, buf->data_size, buf->device_addr, file_inode(dbuf->file)->i_ino, buf->flags, buf->timestamp, buf->attr); diff --git a/driver/vidc/src/msm_vidc_memory.c b/driver/vidc/src/msm_vidc_memory.c index 4218196e0c..f905e3c88d 100644 --- a/driver/vidc/src/msm_vidc_memory.c +++ b/driver/vidc/src/msm_vidc_memory.c @@ -13,6 +13,7 @@ #include "msm_vidc_memory.h" #include "msm_vidc_debug.h" #include "msm_vidc_internal.h" +#include "msm_vidc_driver.h" #include "msm_vidc_dt.h" #include "msm_vidc_core.h" @@ -153,8 +154,8 @@ int msm_vidc_memory_map(struct msm_vidc_core *core, struct msm_vidc_map *map) map->refcount++; d_vpr_l( - "%s: type %d device_addr %#x refcount %d region %d\n", - __func__, map->type, map->device_addr, map->refcount, map->region); + "%s: type %11s, device_addr %#x, refcount %d, region %d\n", + __func__, buf_name(map->type), map->device_addr, map->refcount, map->region); return 0; @@ -188,8 +189,8 @@ int msm_vidc_memory_unmap(struct msm_vidc_core *core, goto exit; d_vpr_l( - "%s: type %d device_addr %#x refcount %d region %d\n", - __func__, map->type, map->device_addr, map->refcount, map->region); + "%s: type %11s, device_addr %#x, refcount %d, region %d\n", + __func__, buf_name(map->type), map->device_addr, map->refcount, map->region); dma_buf_unmap_attachment(map->attach, map->table, DMA_BIDIRECTIONAL); dma_buf_detach(map->dmabuf, map->attach); @@ -281,8 +282,8 @@ int msm_vidc_memory_alloc(struct msm_vidc_core *core, struct msm_vidc_alloc *mem } d_vpr_h( - "%s: dmabuf = %pK, size = %d, kvaddr = %pK, buffer_type = %#x secure %d region %d\n", - __func__, mem->dmabuf, mem->size, mem->kvaddr, mem->type, + "%s: dmabuf %pK, size %d, kvaddr %pK, buffer_type %s, secure %d, region %d\n", + __func__, mem->dmabuf, mem->size, mem->kvaddr, buf_name(mem->type), mem->secure, mem->region); return 0; @@ -301,8 +302,9 @@ int msm_vidc_memory_free(struct msm_vidc_core *core, struct msm_vidc_alloc *mem) } d_vpr_h( - "%s: dmabuf = %pK, size = %d, kvaddr = %pK, buffer_type = %#x\n", - __func__, mem->dmabuf, mem->size, mem->kvaddr, mem->type); + "%s: dmabuf %pK, size %d, kvaddr %pK, buffer_type %s, secure %d, region %d\n", + __func__, mem->dmabuf, mem->size, mem->kvaddr, buf_name(mem->type), + mem->secure, mem->region); if (mem->kvaddr) { dma_buf_vunmap(mem->dmabuf, mem->kvaddr); diff --git a/driver/vidc/src/msm_vidc_power.c b/driver/vidc/src/msm_vidc_power.c index ac3ab2356e..c86b67e649 100644 --- a/driver/vidc/src/msm_vidc_power.c +++ b/driver/vidc/src/msm_vidc_power.c @@ -162,10 +162,6 @@ static int msm_vidc_set_buses(struct msm_vidc_inst* inst) mutex_lock(&core->lock); curr_time_ns = ktime_get_ns(); list_for_each_entry(temp, &core->instances, list) { - /* skip no input data sessions */ - if (!temp->max_input_data_size) - continue; - /* skip inactive session bus bandwidth */ if (!is_active_session(temp->last_qbuf_time_ns, curr_time_ns)) { temp->active = false; @@ -201,8 +197,6 @@ int msm_vidc_scale_buses(struct msm_vidc_inst *inst) struct vidc_bus_vote_data *vote_data; struct v4l2_format *out_f; struct v4l2_format *inp_f; - struct msm_vidc_buffer *vbuf; - u32 data_size = 0; int codec = 0, frame_rate; if (!inst || !inst->core || !inst->capabilities) { @@ -216,12 +210,6 @@ int msm_vidc_scale_buses(struct msm_vidc_inst *inst) } vote_data = &inst->bus_data; - list_for_each_entry(vbuf, &inst->buffers.input.list, list) - data_size = max(data_size, vbuf->data_size); - inst->max_input_data_size = data_size; - if (!data_size) - return 0; - vote_data->power_mode = VIDC_POWER_NORMAL; if (inst->power.buffer_counter < DCVS_WINDOW || is_image_session(inst)) vote_data->power_mode = VIDC_POWER_TURBO; @@ -275,7 +263,7 @@ int msm_vidc_scale_buses(struct msm_vidc_inst *inst) u32 color_format; vote_data->domain = MSM_VIDC_DECODER; - vote_data->bitrate = data_size * vote_data->fps * 8; + vote_data->bitrate = inst->max_input_data_size * vote_data->fps * 8; color_format = v4l2_colorformat_to_driver( inst->fmts[OUTPUT_PORT].fmt.pix_mp.pixelformat, __func__); if (is_linear_colorformat(color_format)) { @@ -342,10 +330,6 @@ int msm_vidc_set_clocks(struct msm_vidc_inst* inst) freq = 0; curr_time_ns = ktime_get_ns(); list_for_each_entry(temp, &core->instances, list) { - /* skip no input data sessions */ - if (!temp->max_input_data_size) - continue; - /* skip inactive session clock rate */ if (!is_active_session(temp->last_qbuf_time_ns, curr_time_ns)) { temp->active = false; @@ -398,7 +382,7 @@ int msm_vidc_set_clocks(struct msm_vidc_inst* inst) * TODO: Remove this scaling if using source clock instead of branch clock. */ rate = rate * MSM_VIDC_CLOCK_SOURCE_SCALING_RATIO; - i_vpr_h(inst, "%s: scaled clock rate %lu\n", __func__, rate); + i_vpr_l(inst, "%s: scaled clock rate %lu\n", __func__, rate); rc = venus_hfi_scale_clocks(inst, rate); if (rc) @@ -487,8 +471,6 @@ exit: int msm_vidc_scale_clocks(struct msm_vidc_inst *inst) { struct msm_vidc_core* core; - struct msm_vidc_buffer *vbuf; - u32 data_size = 0; if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); @@ -496,12 +478,6 @@ int msm_vidc_scale_clocks(struct msm_vidc_inst *inst) } core = inst->core; - list_for_each_entry(vbuf, &inst->buffers.input.list, list) - data_size = max(data_size, vbuf->data_size); - inst->max_input_data_size = data_size; - if (!data_size) - return 0; - if (inst->power.buffer_counter < DCVS_WINDOW || is_image_session(inst)) { inst->power.min_freq = msm_vidc_max_freq(inst); inst->power.dcvs_flags = 0; @@ -510,7 +486,7 @@ int msm_vidc_scale_clocks(struct msm_vidc_inst *inst) inst->power.dcvs_flags = 0; } else { inst->power.min_freq = - call_session_op(core, calc_freq, inst, data_size); + call_session_op(core, calc_freq, inst, inst->max_input_data_size); msm_vidc_apply_dcvs(inst); } inst->power.curr_freq = inst->power.min_freq; @@ -522,6 +498,8 @@ int msm_vidc_scale_clocks(struct msm_vidc_inst *inst) int msm_vidc_scale_power(struct msm_vidc_inst *inst, bool scale_buses) { struct msm_vidc_core *core; + struct msm_vidc_buffer *vbuf; + u32 data_size = 0; if (!inst || !inst->core) { d_vpr_e("%s: invalid params %pK\n", __func__, inst); @@ -535,6 +513,14 @@ int msm_vidc_scale_power(struct msm_vidc_inst *inst, bool scale_buses) inst->active = true; } + list_for_each_entry(vbuf, &inst->buffers.input.list, list) + data_size = max(data_size, vbuf->data_size); + inst->max_input_data_size = data_size; + + /* no pending inputs - skip scale power */ + if (!inst->max_input_data_size) + return 0; + if (msm_vidc_scale_clocks(inst)) i_vpr_e(inst, "failed to scale clock\n"); diff --git a/driver/vidc/src/msm_vidc_vb2.c b/driver/vidc/src/msm_vidc_vb2.c index eb0cbb101f..77f069cf4a 100644 --- a/driver/vidc/src/msm_vidc_vb2.c +++ b/driver/vidc/src/msm_vidc_vb2.c @@ -184,10 +184,6 @@ int msm_vidc_start_streaming(struct vb2_queue *q, unsigned int count) MSM_VIDC_BUF_ARP); if (rc) goto error; - i_vpr_h(inst, "session internal buffer: min size\n"); - i_vpr_h(inst, "arp buffer: %d %d\n", - inst->buffers.arp.min_count, - inst->buffers.arp.size); } else if(is_decode_session(inst)) { rc = msm_vidc_session_set_default_header(inst); if (rc) @@ -197,11 +193,6 @@ int msm_vidc_start_streaming(struct vb2_queue *q, unsigned int count) MSM_VIDC_BUF_PERSIST); if (rc) goto error; - i_vpr_h(inst, "session internal buffer: min size reuse\n"); - i_vpr_h(inst, "persist buffer: %d %d %d\n", - inst->buffers.persist.min_count, - inst->buffers.persist.size, - inst->buffers.persist.reuse); } } @@ -229,8 +220,13 @@ int msm_vidc_start_streaming(struct vb2_queue *q, unsigned int count) i_vpr_e(inst, "%s: invalid type %d\n", q->type); goto error; } - if (!rc) - i_vpr_h(inst, "Streamon: %d successful\n", q->type); + if (rc) + goto error; + + /* print final buffer counts & size details */ + msm_vidc_print_buffer_info(inst); + + i_vpr_h(inst, "Streamon: %d successful\n", q->type); return rc; diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index f19855ea03..dda50bc9b4 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -3438,8 +3438,8 @@ int venus_hfi_release_buffer(struct msm_vidc_inst *inst, } if (!is_internal_buffer(buffer->type)) { - i_vpr_e(inst, "release not allowed for buffer type %d\n", - buffer->type); + i_vpr_e(inst, "release not allowed for buffer_type %s\n", + buf_name(buffer->type)); goto unlock; } core = inst->core; diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index a9a3a7d640..ac2829aaf3 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -584,6 +584,7 @@ static int handle_input_buffer(struct msm_vidc_inst *inst, return 0; } } + buf->data_offset = buffer->data_offset; buf->data_size = buffer->data_size; buf->attr &= ~MSM_VIDC_ATTR_QUEUED; @@ -1274,7 +1275,7 @@ static int handle_session_property(struct msm_vidc_inst *inst, u32 port; u32 *payload_ptr; - i_vpr_h(inst, "%s: property type %#x\n", __func__, pkt->type); + i_vpr_l(inst, "%s: property type %#x\n", __func__, pkt->type); port = vidc_port_from_hfi(inst, pkt->port); if (port >= MAX_PORT) { From 712640a1a8cce07e17a8cfd1a34a3f1d87696bd4 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Thu, 1 Apr 2021 16:26:44 -0700 Subject: [PATCH 0216/1061] video: driver: Modify decode order and some misc changes - Account for V4L2_CID_MPEG_MFC51_VIDEO_DECODER_H264_DISPLAY_DELAY ctrl value to decide HFI_PROP_DECODE_ORDER_OUTPUT property value. - Set encoder run time properties on raw port - Some logging changes. Change-Id: I5eef81b484e81b69031854a3a8665de4be7f98f9 Signed-off-by: Akshata Sahukar --- driver/platform/waipio/src/msm_vidc_waipio.c | 83 +++---- driver/vidc/inc/msm_vidc_control.h | 2 - driver/vidc/inc/msm_vidc_internal.h | 2 - driver/vidc/src/msm_vdec.c | 7 +- driver/vidc/src/msm_vidc_control.c | 220 +++++++------------ driver/vidc/src/msm_vidc_driver.c | 2 - 6 files changed, 136 insertions(+), 180 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 6ce0dca31d..1d9b4b2e20 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -312,7 +312,8 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 1, MAX_BITRATE, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_BITRATE, HFI_PROP_TOTAL_BITRATE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, {ENH_LAYER_COUNT, BITRATE_MODE}, {PEAK_BITRATE}, msm_vidc_adjust_bitrate, msm_vidc_set_bitrate}, @@ -374,7 +375,8 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 1, MAX_CONSTANT_QUALITY, 1, 90, V4L2_CID_MPEG_VIDEO_CONSTANT_QUALITY, HFI_PROP_CONSTANT_QUALITY, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, {BITRATE_MODE}, {0}, NULL, msm_vidc_set_constant_quality}, @@ -382,7 +384,8 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 0, INT_MAX, 1, 2 * DEFAULT_FPS - 1, V4L2_CID_MPEG_VIDEO_GOP_SIZE, HFI_PROP_MAX_GOP_FRAMES, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, {ENH_LAYER_COUNT}, {0}, msm_vidc_adjust_gop_size, msm_vidc_set_gop_size}, @@ -539,7 +542,8 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { (DEFAULT_BITRATE / PERCENT_PEAK_BITRATE_INCREASED)), V4L2_CID_MPEG_VIDEO_BITRATE_PEAK, HFI_PROP_TOTAL_PEAK_BITRATE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, {BITRATE_MODE, BIT_RATE}, {0}, msm_vidc_adjust_peak_bitrate, @@ -625,18 +629,12 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { MIN_QP_10BIT, MAX_QP, 1, MAX_QP, V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_MAX_QP}, - {HEVC_HIER_QP, ENC, HEVC|HEIC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDEO_HEVC_HIER_QP, - HFI_PROP_QP_PACKED, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, - {I_FRAME_QP, ENC, HEVC|HEIC, MIN_QP_10BIT, MAX_QP, 1, DEFAULT_QP, V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP, HFI_PROP_QP_PACKED, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, {PIX_FMTS, BITRATE_MODE}, {0}, msm_vidc_adjust_hevc_frame_qp, msm_vidc_set_frame_qp}, @@ -644,7 +642,8 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { MIN_QP_8BIT, MAX_QP, 1, DEFAULT_QP, V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP, HFI_PROP_QP_PACKED, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, {BITRATE_MODE}, {0}, NULL, msm_vidc_set_frame_qp}, @@ -664,12 +663,6 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { MIN_QP_8BIT, MAX_QP, 1, DEFAULT_QP, V4L2_CID_MPEG_VIDEO_H264_B_FRAME_QP}, - {HIER_LAYER_QP, ENC, H264, - 0, 0x0060033, 1, 20, - V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_LAYER_QP, - HFI_PROP_QP_PACKED, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, - {LAYER_TYPE, ENC, HEVC, V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B, V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P, @@ -701,7 +694,8 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 0, 5, 1, 0, V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER, HFI_PROP_LAYER_COUNT, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, {BITRATE_MODE}, {GOP_SIZE, B_FRAME, BIT_RATE}, msm_vidc_adjust_layer_count, msm_vidc_set_layer_count_and_type}, @@ -710,7 +704,8 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 0, 5, 1, 0, V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_LAYER, HFI_PROP_LAYER_COUNT, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, {BITRATE_MODE}, {GOP_SIZE, B_FRAME, BIT_RATE}, msm_vidc_adjust_layer_count, msm_vidc_set_layer_count_and_type}, @@ -723,7 +718,8 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 1, MAX_BITRATE, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L0_BR, HFI_PROP_BITRATE_LAYER1, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, {0}, {0}, msm_vidc_adjust_bitrate, msm_vidc_set_bitrate}, @@ -731,7 +727,8 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 1, MAX_BITRATE, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L1_BR, HFI_PROP_BITRATE_LAYER2, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, {0}, {0}, msm_vidc_adjust_bitrate, msm_vidc_set_bitrate}, @@ -739,7 +736,8 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 1, MAX_BITRATE, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L2_BR, HFI_PROP_BITRATE_LAYER3, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, {0}, {0}, msm_vidc_adjust_bitrate, msm_vidc_set_bitrate}, @@ -747,7 +745,8 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 1, MAX_BITRATE, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L3_BR, HFI_PROP_BITRATE_LAYER4, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, {0}, {0}, msm_vidc_adjust_bitrate, msm_vidc_set_bitrate}, @@ -755,7 +754,8 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 1, MAX_BITRATE, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L4_BR, HFI_PROP_BITRATE_LAYER5, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, {0}, {0}, msm_vidc_adjust_bitrate, msm_vidc_set_bitrate}, @@ -763,7 +763,8 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 1, MAX_BITRATE, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L5_BR, HFI_PROP_BITRATE_LAYER6, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, {0}, {0}, msm_vidc_adjust_bitrate, msm_vidc_set_bitrate}, @@ -771,7 +772,8 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 1, MAX_BITRATE, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L0_BR, HFI_PROP_BITRATE_LAYER1, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, {0}, {0}, msm_vidc_adjust_bitrate, msm_vidc_set_bitrate}, @@ -779,7 +781,8 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 1, MAX_BITRATE, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L1_BR, HFI_PROP_BITRATE_LAYER2, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, {0}, {0}, msm_vidc_adjust_bitrate, msm_vidc_set_bitrate}, @@ -787,7 +790,8 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 1, MAX_BITRATE, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L2_BR, HFI_PROP_BITRATE_LAYER3, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, {0}, {0}, msm_vidc_adjust_bitrate, msm_vidc_set_bitrate}, @@ -795,7 +799,8 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 1, MAX_BITRATE, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L3_BR, HFI_PROP_BITRATE_LAYER4, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, {0}, {0}, msm_vidc_adjust_bitrate, msm_vidc_set_bitrate}, @@ -803,7 +808,8 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 1, MAX_BITRATE, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L4_BR, HFI_PROP_BITRATE_LAYER5, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, {0}, {0}, msm_vidc_adjust_bitrate, msm_vidc_set_bitrate}, @@ -811,7 +817,8 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 1, MAX_BITRATE, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L5_BR, HFI_PROP_BITRATE_LAYER6, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, {0}, {0}, msm_vidc_adjust_bitrate, msm_vidc_set_bitrate}, @@ -1063,13 +1070,13 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_MFC51_VIDEO_DECODER_H264_DISPLAY_DELAY_ENABLE, HFI_PROP_DECODE_ORDER_OUTPUT, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + CAP_FLAG_ROOT | CAP_FLAG_INPUT_PORT}, {DISPLAY_DELAY, DEC, H264|HEVC|VP9, 0, 1, 1, 0, V4L2_CID_MPEG_MFC51_VIDEO_DECODER_H264_DISPLAY_DELAY, HFI_PROP_DECODE_ORDER_OUTPUT, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + CAP_FLAG_ROOT | CAP_FLAG_INPUT_PORT}, /* conceal color */ {CONCEAL_COLOR_8BIT, DEC, CODECS_ALL, 0x0, 0xff3fcff, 1, @@ -1304,7 +1311,8 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 1, MAX_CONSTANT_QUALITY, 1, 100, V4L2_CID_MPEG_VIDEO_CONSTANT_QUALITY, HFI_PROP_CONSTANT_QUALITY, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, {BITRATE_MODE}, {0}, NULL, msm_vidc_set_constant_quality}, {GRID, ENC, HEIC, @@ -1319,7 +1327,8 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 0, INT_MAX, 1, 0 /* all intra */, V4L2_CID_MPEG_VIDEO_GOP_SIZE, HFI_PROP_MAX_GOP_FRAMES, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, {0}, {0}, NULL, msm_vidc_set_u32}, {B_FRAME, ENC, HEIC, diff --git a/driver/vidc/inc/msm_vidc_control.h b/driver/vidc/inc/msm_vidc_control.h index 383f9a1252..80859bc2c9 100644 --- a/driver/vidc/inc/msm_vidc_control.h +++ b/driver/vidc/inc/msm_vidc_control.h @@ -79,8 +79,6 @@ int msm_vidc_set_session_priority(void *instance, enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_s32(void *instance, enum msm_vidc_inst_capability_type cap_id); -int msm_vidc_set_array(void *instance, - enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_q16(void *instance, enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_v4l2_properties(struct msm_vidc_inst *inst); diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 9949c6da75..4af13ed14e 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -372,11 +372,9 @@ enum msm_vidc_inst_capability_type { I_FRAME_MAX_QP, P_FRAME_MAX_QP, B_FRAME_MAX_QP, - HEVC_HIER_QP, I_FRAME_QP, P_FRAME_QP, B_FRAME_QP, - HIER_LAYER_QP, LAYER_TYPE, LAYER_ENABLE, ENH_LAYER_COUNT, diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 402021d19c..b068aa48be 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -588,14 +588,17 @@ static int msm_vdec_set_output_order(struct msm_vidc_inst *inst, enum msm_vidc_port_type port) { int rc = 0; - u32 output_order; + u32 output_order = 0; if (port != INPUT_PORT) { i_vpr_e(inst, "%s: invalid port %d\n", __func__, port); return -EINVAL; } - output_order = inst->capabilities->cap[DISPLAY_DELAY_ENABLE].value; + if (inst->capabilities->cap[DISPLAY_DELAY_ENABLE].value && + !inst->capabilities->cap[DISPLAY_DELAY].value) + output_order = 1; + i_vpr_h(inst, "%s: output order: %d", __func__, output_order); rc = venus_hfi_session_property(inst, HFI_PROP_DECODE_ORDER_OUTPUT, diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index ae5d541c04..21a625b9d0 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -111,11 +111,12 @@ static u32 msm_vidc_get_port_info(struct msm_vidc_inst *inst, if (capability->cap[cap_id].flags & CAP_FLAG_INPUT_PORT && capability->cap[cap_id].flags & CAP_FLAG_OUTPUT_PORT) { - i_vpr_e(inst, - "%s: both ports enabled. Default port set: BITSTREAM\n", - __func__); - return HFI_PORT_BITSTREAM; + if (inst->vb2q[OUTPUT_PORT].streaming) + return get_hfi_port(inst, INPUT_PORT); + else + return get_hfi_port(inst, OUTPUT_PORT); } + if (capability->cap[cap_id].flags & CAP_FLAG_INPUT_PORT) return get_hfi_port(inst, INPUT_PORT); else if (capability->cap[cap_id].flags & CAP_FLAG_OUTPUT_PORT) @@ -149,9 +150,9 @@ static int msm_vidc_packetize_control(struct msm_vidc_inst *inst, { int rc = 0; - i_vpr_l(inst, - "%s: hfi_id: %#x, value: %#x\n", func, - inst->capabilities->cap[cap_id].hfi_id, + i_vpr_h(inst, + "set cap: name: %24s, cap value: %#10x, hfi: %#10x\n", + cap_name(cap_id), inst->capabilities->cap[cap_id].value, *(s64 *)hfi_val); rc = venus_hfi_session_property(inst, @@ -163,8 +164,8 @@ static int msm_vidc_packetize_control(struct msm_vidc_inst *inst, sizeof(payload_size)); if (rc) i_vpr_e(inst, - "%s: failed to set cap_id: %d to fw\n", - __func__, cap_id); + "%s: failed to set cap[%d] %s to fw\n", + __func__, cap_id, cap_name(cap_id)); return rc; } @@ -199,8 +200,8 @@ static int msm_vidc_add_capid_to_list(struct msm_vidc_inst *inst, list_for_each_entry(curr_node, &inst->firmware.list, list) { if (curr_node->cap_id == cap_id) { i_vpr_l(inst, - "%s: cap %d already present in FW_LIST\n", - __func__, cap_id); + "%s: cap[%d] %s already present in FW_LIST\n", + __func__, cap_id, cap_name(cap_id)); return 0; } } @@ -294,8 +295,8 @@ static int msm_vidc_get_parent_value(struct msm_vidc_inst* inst, } } else { i_vpr_e(inst, - "%s: missing parent %d for cap %d, please correct database\n", - func, parent, cap); + "%s: missing parent %d for cap[%d] %s, fix database\n", + func, parent, cap, cap_name(cap)); rc = -EINVAL; } @@ -312,8 +313,8 @@ static int msm_vidc_adjust_hevc_qp(struct msm_vidc_inst *inst, if (!(inst->codec == MSM_VIDC_HEVC || inst->codec == MSM_VIDC_HEIC)) { i_vpr_e(inst, - "%s: incorrect entry in database for cap %d. fix the database\n", - __func__, cap_id); + "%s: incorrect cap[%d] %s entry in database, fix database\n", + __func__, cap_id, cap_name(cap_id)); return -EINVAL; } @@ -394,8 +395,8 @@ static int msm_vidc_adjust_dynamic_property(struct msm_vidc_inst *inst, */ if (!(capability->cap[cap_id].flags & CAP_FLAG_DYNAMIC_ALLOWED)) { i_vpr_e(inst, - "%s: dynamic setting of cap_id %d is not allowed\n", - __func__, cap_id); + "%s: dynamic setting of cap[%d] %s is not allowed\n", + __func__, cap_id, cap_name(cap_id)); msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); return -EINVAL; } @@ -406,8 +407,9 @@ static int msm_vidc_adjust_dynamic_property(struct msm_vidc_inst *inst, */ if (!ctrl && !capability->cap[cap_id].adjust) { i_vpr_e(inst, - "%s: child cap %d must have ajdust function\n", - __func__, capability->cap[cap_id].cap); + "%s: child cap[%d] %s must have ajdust function\n", + __func__, capability->cap[cap_id].cap, + cap_name(capability->cap[cap_id].cap)); return -EINVAL; } prev_value = capability->cap[cap_id].value; @@ -512,8 +514,8 @@ int msm_vidc_ctrl_init(struct msm_vidc_inst *inst) goto error; } i_vpr_h(inst, - "%s: cap idx %d, value %d min %d max %d step_or_mask %#x flags %#x v4l2_id %#x hfi_id %#x\n", - __func__, idx, + "%s: cap[%d] %24s, value %d min %d max %d step_or_mask %#x flags %#x v4l2_id %#x hfi_id %#x\n", + __func__, idx, cap_name(idx), capability->cap[idx].value, capability->cap[idx].min, capability->cap[idx].max, @@ -687,8 +689,8 @@ int msm_v4l2_op_s_ctrl(struct v4l2_ctrl *ctrl) if (inst->vb2q[OUTPUT_PORT].streaming && !(capability->cap[cap_id].flags & CAP_FLAG_DYNAMIC_ALLOWED)) { i_vpr_e(inst, - "%s: dynamic setting of cap_id %d is not allowed\n", - __func__, cap_id); + "%s: dynamic setting of cap[%d] %s is not allowed\n", + __func__, cap_id, cap_name(cap_id)); return -EBUSY; } @@ -1584,11 +1586,10 @@ int msm_vidc_set_header_mode(void *instance, if (hdr_metadata) hfi_value |= HFI_SEQ_HEADER_METADATA; - i_vpr_h(inst, "set cap: name: %24s, value: %#10x, hfi: %#10x\n", cap_name(cap_id), - inst->capabilities->cap[cap_id].value, hfi_value); - rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32_ENUM, &hfi_value, sizeof(u32), __func__); + if (rc) + return rc; return rc; } @@ -1616,11 +1617,10 @@ int msm_vidc_set_deblock_mode(void *instance, alpha = inst->capabilities->cap[LF_ALPHA].value + lf_offset; hfi_value = (alpha << 16) | (beta << 8) | lf_mode; - i_vpr_h(inst, "set cap: name: %24s, value: %#10x, hfi: %#10x\n", cap_name(cap_id), - inst->capabilities->cap[cap_id].value, hfi_value); - rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_32_PACKED, &hfi_value, sizeof(u32), __func__); + if (rc) + return rc; return rc; } @@ -1647,11 +1647,10 @@ int msm_vidc_set_constant_quality(void *instance, hfi_value = inst->capabilities->cap[cap_id].value; - i_vpr_h(inst, "set cap: name: %24s, value: %#10x, hfi: %#10x\n", cap_name(cap_id), - inst->capabilities->cap[cap_id].value, hfi_value); - rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32, &hfi_value, sizeof(u32), __func__); + if (rc) + return rc; return rc; } @@ -1678,11 +1677,10 @@ int msm_vidc_set_vbr_related_properties(void *instance, hfi_value = inst->capabilities->cap[cap_id].value; - i_vpr_h(inst, "set cap: name: %24s, value: %#10x, hfi: %#10x\n", cap_name(cap_id), - inst->capabilities->cap[cap_id].value, hfi_value); - rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32, &hfi_value, sizeof(u32), __func__); + if (rc) + return rc; return rc; } @@ -1710,11 +1708,10 @@ int msm_vidc_set_cbr_related_properties(void *instance, hfi_value = inst->capabilities->cap[cap_id].value; - i_vpr_h(inst, "set cap: name: %24s, value: %#10x, hfi: %#10x\n", cap_name(cap_id), - inst->capabilities->cap[cap_id].value, hfi_value); - rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32, &hfi_value, sizeof(u32), __func__); + if (rc) + return rc; return rc; } @@ -1731,16 +1728,18 @@ int msm_vidc_set_use_and_mark_ltr(void *instance, return -EINVAL; } - if (!inst->capabilities->cap[LTR_COUNT].value) + if (!inst->capabilities->cap[LTR_COUNT].value) { + i_vpr_h(inst, "%s: ltr count is 0, cap %s is not set\n", + __func__, cap_name(cap_id)); return 0; + } hfi_value = inst->capabilities->cap[cap_id].value; - i_vpr_h(inst, "set cap: name: %24s, value: %#10x, hfi: %#10x\n", cap_name(cap_id), - inst->capabilities->cap[cap_id].value, hfi_value); - rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32, &hfi_value, sizeof(u32), __func__); + if (rc) + return rc; return rc; } @@ -1772,8 +1771,12 @@ int msm_vidc_set_min_qp(void *instance, capability->cap[B_FRAME_MIN_QP].flags & CAP_FLAG_CLIENT_SET; client_qp_enable = i_qp_enable | p_qp_enable << 1 | b_qp_enable << 2; - if (!client_qp_enable) + if (!client_qp_enable) { + i_vpr_h(inst, + "%s: client did not set min qp, cap %s is not set\n", + __func__, cap_name(cap_id)); return 0; + } if (is_10bit_colorformat(capability->cap[PIX_FMTS].value)) offset = 12; @@ -1795,11 +1798,10 @@ int msm_vidc_set_min_qp(void *instance, hfi_value = i_frame_qp | p_frame_qp << 8 | b_frame_qp << 16 | client_qp_enable << 24; - i_vpr_h(inst, "set cap: name: %24s, value: %#10x, hfi: %#10x\n", cap_name(cap_id), - inst->capabilities->cap[cap_id].value, hfi_value); - rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_32_PACKED, &hfi_value, sizeof(u32), __func__); + if (rc) + return rc; return rc; } @@ -1831,8 +1833,12 @@ int msm_vidc_set_max_qp(void *instance, capability->cap[B_FRAME_MIN_QP].flags & CAP_FLAG_CLIENT_SET; client_qp_enable = i_qp_enable | p_qp_enable << 1 | b_qp_enable << 2; - if (!client_qp_enable) + if (!client_qp_enable) { + i_vpr_h(inst, + "%s: client did not set max qp, cap %s is not set\n", + __func__, cap_name(cap_id)); return 0; + } if (is_10bit_colorformat(capability->cap[PIX_FMTS].value)) offset = 12; @@ -1854,11 +1860,10 @@ int msm_vidc_set_max_qp(void *instance, hfi_value = i_frame_qp | p_frame_qp << 8 | b_frame_qp << 16 | client_qp_enable << 24; - i_vpr_h(inst, "set cap: name: %24s, value: %#10x, hfi: %#10x\n", cap_name(cap_id), - inst->capabilities->cap[cap_id].value, hfi_value); - rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_32_PACKED, &hfi_value, sizeof(u32), __func__); + if (rc) + return rc; return rc; } @@ -1898,8 +1903,12 @@ int msm_vidc_set_frame_qp(void *instance, } client_qp_enable = i_qp_enable | p_qp_enable << 1 | b_qp_enable << 2; - if (!client_qp_enable) + if (!client_qp_enable) { + i_vpr_h(inst, + "%s: client did not set frame qp, cap %s is not set\n", + __func__, cap_name(cap_id)); return 0; + } if (is_10bit_colorformat(capab->cap[PIX_FMTS].value)) offset = 12; @@ -1911,11 +1920,10 @@ int msm_vidc_set_frame_qp(void *instance, hfi_value = i_frame_qp | p_frame_qp << 8 | b_frame_qp << 16 | client_qp_enable << 24; - i_vpr_h(inst, "set cap: name: %24s, value: %#10x, hfi: %#10x\n", cap_name(cap_id), - inst->capabilities->cap[cap_id].value, hfi_value); - rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_32_PACKED, &hfi_value, sizeof(u32), __func__); + if (rc) + return rc; return rc; } @@ -1939,11 +1947,10 @@ int msm_vidc_set_req_sync_frame(void *instance, else hfi_value = HFI_SYNC_FRAME_REQUEST_WITHOUT_SEQ_HDR; - i_vpr_h(inst, "set cap: name: %24s, value: %#10x, hfi: %#10x\n", cap_name(cap_id), - inst->capabilities->cap[cap_id].value, hfi_value); - rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32_ENUM, &hfi_value, sizeof(u32), __func__); + if (rc) + return rc; return rc; } @@ -1969,11 +1976,10 @@ int msm_vidc_set_chroma_qp_index_offset(void *instance, chroma_qp = inst->capabilities->cap[cap_id].value + offset; hfi_value = chroma_qp_offset_mode | chroma_qp << 8 | chroma_qp << 16 ; - i_vpr_h(inst, "set cap: name: %24s, value: %#10x, hfi: %#10x\n", cap_name(cap_id), - inst->capabilities->cap[cap_id].value, hfi_value); - rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_32_PACKED, &hfi_value, sizeof(u32), __func__); + if (rc) + return rc; return rc; } @@ -1994,7 +2000,7 @@ int msm_vidc_set_slice_count(void* instance, slice_mode = inst->capabilities->cap[SLICE_MODE].value; if (slice_mode == V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE) { - i_vpr_l(inst, "%s: slice mode is: %u, ignore setting to fw\n", + i_vpr_h(inst, "%s: slice mode is: %u, ignore setting to fw\n", __func__, slice_mode); return 0; } @@ -2005,11 +2011,11 @@ int msm_vidc_set_slice_count(void* instance, hfi_value = inst->capabilities->cap[SLICE_MAX_BYTES].value; set_cap_id = SLICE_MAX_BYTES; } - i_vpr_h(inst, "set cap: name: %24s, value: %#10x, hfi: %#10x\n", cap_name(cap_id), - inst->capabilities->cap[cap_id].value, hfi_value); rc = msm_vidc_packetize_control(inst, set_cap_id, HFI_PAYLOAD_U32, &hfi_value, sizeof(u32), __func__); + if (rc) + return rc; return rc; } @@ -2033,11 +2039,11 @@ int msm_vidc_set_nal_length(void* instance, if (rc) return -EINVAL; } - i_vpr_h(inst, "set cap: name: %24s, value: %#10x, hfi: %#10x\n", cap_name(cap_id), - inst->capabilities->cap[cap_id].value, hfi_value); rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32_ENUM, &hfi_value, sizeof(u32), __func__); + if (rc) + return rc; return rc; } @@ -2077,9 +2083,6 @@ int msm_vidc_set_layer_count_and_type(void *instance, /* hfi baselayer starts from 1 */ hfi_layer_count = inst->capabilities->cap[ENH_LAYER_COUNT].value + 1; - i_vpr_h(inst, "set cap: name: %24s, value: %#10x, hfi: %#10x\n", cap_name(cap_id), - inst->capabilities->cap[cap_id].value, hfi_layer_count); - rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32, &hfi_layer_count, sizeof(u32), __func__); if (rc) @@ -2111,11 +2114,11 @@ int msm_vidc_set_gop_size(void *instance, } hfi_value = inst->capabilities->cap[GOP_SIZE].value; - i_vpr_h(inst, "set cap: name: %24s, value: %#10x, hfi: %#10x\n", cap_name(cap_id), - inst->capabilities->cap[cap_id].value, hfi_value); rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32, &hfi_value, sizeof(u32), __func__); + if (rc) + return rc; return rc; } @@ -2181,12 +2184,10 @@ int msm_vidc_set_bitrate(void *instance, set_total_bitrate: hfi_value = inst->capabilities->cap[BIT_RATE].value; - - i_vpr_h(inst, "set cap: name: %24s, value: %#10x, hfi: %#10x\n", cap_name(cap_id), - inst->capabilities->cap[cap_id].value, hfi_value); - rc = msm_vidc_packetize_control(inst, BIT_RATE, HFI_PAYLOAD_U32, &hfi_value, sizeof(u32), __func__); + if (rc) + return rc; exit: return rc; } @@ -2205,11 +2206,10 @@ int msm_vidc_set_session_priority(void *instance, hfi_value = (inst->capabilities->cap[cap_id].value * 2) + inst->priority_level; - i_vpr_h(inst, "set cap: name: %24s, value: %#10x, hfi: %#10x\n", cap_name(cap_id), - inst->capabilities->cap[cap_id].value, hfi_value); - rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32, &hfi_value, sizeof(u32), __func__); + if (rc) + return rc; return rc; } @@ -2260,11 +2260,10 @@ int msm_vidc_set_q16(void *instance, hfi_value = inst->capabilities->cap[cap_id].value; - i_vpr_h(inst, "set cap: name: %24s, value: %#10x, hfi: %#10x\n", cap_name(cap_id), - inst->capabilities->cap[cap_id].value, hfi_value); - rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_Q16, &hfi_value, sizeof(u32), __func__); + if (rc) + return rc; return rc; } @@ -2288,11 +2287,11 @@ int msm_vidc_set_u32(void *instance, } else { hfi_value = inst->capabilities->cap[cap_id].value; } - i_vpr_h(inst, "set cap: name: %24s, value: %#10x, hfi: %#10x\n", cap_name(cap_id), - inst->capabilities->cap[cap_id].value, hfi_value); rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32, &hfi_value, sizeof(u32), __func__); + if (rc) + return rc; return rc; } @@ -2313,11 +2312,10 @@ int msm_vidc_set_u32_enum(void *instance, if (rc) return -EINVAL; - i_vpr_h(inst, "set cap: name: %24s, value: %#10x, hfi: %#10x\n", cap_name(cap_id), - inst->capabilities->cap[cap_id].value, hfi_value); - rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32_ENUM, &hfi_value, sizeof(u32), __func__); + if (rc) + return rc; return rc; } @@ -2335,58 +2333,10 @@ int msm_vidc_set_s32(void *instance, } hfi_value = inst->capabilities->cap[cap_id].value; - i_vpr_h(inst, "set cap: name: %24s, value: %#10x, hfi: %#10x\n", cap_name(cap_id), - inst->capabilities->cap[cap_id].value, hfi_value); - rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_S32, &hfi_value, sizeof(s32), __func__); - - return rc; -} - -/* Please ignore this function for now. TO DO*/ -int msm_vidc_set_array(void *instance, - enum msm_vidc_inst_capability_type cap_id) -{ - int rc = 0; - struct msm_vidc_inst_capability *capability; - struct msm_vidc_core *core; - - struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; - - if (!inst || !inst->core || !inst->capabilities) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - capability = inst->capabilities; - core = (struct msm_vidc_core *)inst->core; - - switch (cap_id) { - /* - * Needed if any control needs to be packed into a structure - * and sent for packetization. - * payload types may be: - * STRUCTURE, BLOB, STRING, PACKED, ARRAY, - * - case BITRATE_MODE: - i_vpr_h(inst, "%s: %d\n", __func__, hfi_value); - hfi_create_packet(inst->packet, inst->packet_size, - offset, - capability->cap[cap_id].hfi_id, - HFI_HOST_FLAGS_NONE, HFI_PAYLOAD_ENUM, - HFI_PORT_NONE, core->packet_id++, - &capability->cap[PROFILE].value, sizeof(u32)); - break; - } - */ - default: - i_vpr_e(inst, - "%s: Unknown cap id %d, cannot set to fw\n", - __func__, cap_id); - rc = -EINVAL; - break; - } + if (rc) + return rc; return rc; } diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index d09168a275..f751742ce0 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -116,11 +116,9 @@ static const struct msm_vidc_cap_name cap_name_arr[] = { {I_FRAME_MAX_QP, "I_FRAME_MAX_QP" }, {P_FRAME_MAX_QP, "P_FRAME_MAX_QP" }, {B_FRAME_MAX_QP, "B_FRAME_MAX_QP" }, - {HEVC_HIER_QP, "HEVC_HIER_QP" }, {I_FRAME_QP, "I_FRAME_QP" }, {P_FRAME_QP, "P_FRAME_QP" }, {B_FRAME_QP, "B_FRAME_QP" }, - {HIER_LAYER_QP, "HIER_LAYER_QP" }, {LAYER_TYPE, "LAYER_TYPE" }, {LAYER_ENABLE, "LAYER_ENABLE" }, {ENH_LAYER_COUNT, "ENH_LAYER_COUNT" }, From 376e52f50c8c8138413a7f9030936838e7e78789 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Fri, 2 Apr 2021 14:41:01 -0700 Subject: [PATCH 0217/1061] video: driver: Always set metadata delivery/subcribe commands to fw Set metadata delivery/subscribe commands to fw even when delivery/subcribe metadata list is empty to ensure disabling of needless metadata. Change-Id: Ifbc8cfbe8911bf3318c6f85f0f6823243f7c6e67 Signed-off-by: Akshata Sahukar --- driver/vidc/src/msm_vdec.c | 6 ------ 1 file changed, 6 deletions(-) diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index d4ec0e5048..cdf577b343 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -1090,9 +1090,6 @@ static int msm_vdec_subscribe_metadata(struct msm_vidc_inst *inst, } }; - if (!count) - return 0; - rc = venus_hfi_session_command(inst, HFI_CMD_SUBSCRIBE_MODE, port, @@ -1150,9 +1147,6 @@ static int msm_vdec_set_delivery_mode_metadata(struct msm_vidc_inst *inst, return -EINVAL; } - if (!count) - return 0; - rc = venus_hfi_session_command(inst, HFI_CMD_DELIVERY_MODE, port, From a13f0e14164492f9222081ff388e444c82ff510a Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Mon, 5 Apr 2021 18:09:02 +0530 Subject: [PATCH 0218/1061] video: driver: enable buffer pool for mostly used structures Enabled recycling for below structure types. - struct msm_vidc_buffer - struct msm_vidc_alloc - struct msm_vidc_map. Change-Id: I062abef85db24385745119b821f87e5b72a4e835 Signed-off-by: Govindaraj Rajagopal --- driver/vidc/inc/msm_vidc_driver.h | 9 + driver/vidc/inc/msm_vidc_inst.h | 7 + driver/vidc/inc/msm_vidc_internal.h | 7 +- driver/vidc/inc/msm_vidc_memory.h | 2 - driver/vidc/src/msm_vidc.c | 3 + driver/vidc/src/msm_vidc_driver.c | 249 ++++++++++++++++++++++++--- driver/vidc/src/msm_vidc_memory.c | 28 --- driver/vidc/src/venus_hfi_response.c | 6 +- 8 files changed, 254 insertions(+), 57 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index d9f1aa96a2..706ad5870a 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -255,6 +255,15 @@ int msm_vidc_release_internal_buffers(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type buffer_type); int msm_vidc_vb2_buffer_done(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buf); +struct msm_vidc_buffer *msm_vidc_get_vidc_buffer(struct msm_vidc_inst *inst); +struct msm_vidc_alloc *msm_vidc_get_alloc_buffer(struct msm_vidc_inst *inst); +struct msm_vidc_map *msm_vidc_get_map_buffer(struct msm_vidc_inst *inst); +int msm_vidc_put_vidc_buffer(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buf); +int msm_vidc_put_alloc_buffer(struct msm_vidc_inst *inst, struct msm_vidc_alloc *alloc); +int msm_vidc_put_map_buffer(struct msm_vidc_inst *inst, struct msm_vidc_map *map); +int msm_vidc_destroy_vidc_buffer(struct msm_vidc_inst *inst); +int msm_vidc_destroy_alloc_buffer(struct msm_vidc_inst *inst); +int msm_vidc_destroy_map_buffer(struct msm_vidc_inst *inst); int msm_vidc_remove_session(struct msm_vidc_inst *inst); int msm_vidc_add_session(struct msm_vidc_inst *inst); int msm_vidc_session_open(struct msm_vidc_inst *inst); diff --git a/driver/vidc/inc/msm_vidc_inst.h b/driver/vidc/inc/msm_vidc_inst.h index e8577be7a6..c62fe592c5 100644 --- a/driver/vidc/inc/msm_vidc_inst.h +++ b/driver/vidc/inc/msm_vidc_inst.h @@ -27,6 +27,12 @@ struct msm_vidc_session_ops { int (*extra_count)(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type type); }; +struct msm_vidc_pool_info { + struct msm_vidc_pool allocations; + struct msm_vidc_pool mappings; + struct msm_vidc_pool buffers; +}; + struct msm_vidc_allocations_info { struct msm_vidc_allocations bin; struct msm_vidc_allocations arp; @@ -111,6 +117,7 @@ struct msm_vidc_inst { struct msm_vidc_rectangle compose; struct msm_vidc_power power; struct vidc_bus_vote_data bus_data; + struct msm_vidc_pool_info pool; struct msm_vidc_buffers_info buffers; struct msm_vidc_mappings_info mappings; struct msm_vidc_allocations_info allocations; diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 487e8a3e50..7ee7d1ded7 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -750,7 +750,6 @@ struct msm_vidc_allocations { struct msm_vidc_map { struct list_head list; - bool valid; enum msm_vidc_buffer_type type; enum msm_vidc_buffer_region region; struct dma_buf *dmabuf; @@ -767,7 +766,6 @@ struct msm_vidc_mappings { struct msm_vidc_buffer { struct list_head list; - bool valid; enum msm_vidc_buffer_type type; u32 index; int fd; @@ -790,6 +788,11 @@ struct msm_vidc_buffers { bool reuse; }; +struct msm_vidc_pool { + struct list_head list; + u32 count; +}; + enum msm_vidc_allow { MSM_VIDC_DISALLOW = 0, MSM_VIDC_ALLOW, diff --git a/driver/vidc/inc/msm_vidc_memory.h b/driver/vidc/inc/msm_vidc_memory.h index 7522792de6..cb183ad3f9 100644 --- a/driver/vidc/inc/msm_vidc_memory.h +++ b/driver/vidc/inc/msm_vidc_memory.h @@ -17,8 +17,6 @@ int msm_vidc_memory_map(struct msm_vidc_core *core, struct msm_vidc_map *map); int msm_vidc_memory_unmap(struct msm_vidc_core *core, struct msm_vidc_map *map); -int msm_vidc_memory_unmap_completely(struct msm_vidc_core *core, - struct msm_vidc_map *map); struct dma_buf *msm_vidc_memory_get_dmabuf(int fd); void msm_vidc_memory_put_dmabuf(void *dmabuf); diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index 82d245ca83..eac500eb0d 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -745,6 +745,9 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) handle_session_response_work_handler); INIT_LIST_HEAD(&inst->response_works); + INIT_LIST_HEAD(&inst->pool.buffers.list); + INIT_LIST_HEAD(&inst->pool.mappings.list); + INIT_LIST_HEAD(&inst->pool.allocations.list); INIT_LIST_HEAD(&inst->buffers.input.list); INIT_LIST_HEAD(&inst->buffers.input_meta.list); INIT_LIST_HEAD(&inst->buffers.output.list); diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 8c5dba84b2..f580171b73 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -1735,7 +1735,6 @@ static int vb2_buffer_to_driver(struct vb2_buffer *vb2, return -EINVAL; } - buf->valid = true; buf->type = v4l2_type_to_driver(vb2->type, __func__); if (!buf->type) return -EINVAL; @@ -1778,13 +1777,217 @@ int msm_vidc_process_readonly_buffers(struct msm_vidc_inst *inst, buf->attr |= MSM_VIDC_ATTR_READ_ONLY; print_vidc_buffer(VIDC_LOW, "low", "ro buf removed", inst, ro_buf); list_del(&ro_buf->list); - kfree(ro_buf); + msm_vidc_put_vidc_buffer(inst, ro_buf); break; } } return rc; } +int msm_vidc_memory_unmap_completely(struct msm_vidc_inst *inst, + struct msm_vidc_map *map) +{ + int rc = 0; + + if (!inst || !map) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (!map->refcount) + return 0; + + while (map->refcount) { + rc = msm_vidc_memory_unmap(inst->core, map); + if (rc) + break; + if (!map->refcount) { + msm_vidc_memory_put_dmabuf(map->dmabuf); + list_del(&map->list); + msm_vidc_put_map_buffer(inst, map); + break; + } + } + return rc; +} + +struct msm_vidc_buffer *msm_vidc_get_vidc_buffer(struct msm_vidc_inst *inst) +{ + struct msm_vidc_buffer *buf = NULL; + + if (!inst) { + d_vpr_e("%s: Invalid params\n", __func__); + return NULL; + } + + if (!list_empty(&inst->pool.buffers.list)) { + buf = list_first_entry(&inst->pool.buffers.list, struct msm_vidc_buffer, list); + inst->pool.buffers.count--; + list_del(&buf->list); + memset(buf, 0, sizeof(struct msm_vidc_buffer)); + return buf; + } + + buf = kzalloc(sizeof(struct msm_vidc_buffer), GFP_KERNEL); + if (!buf) { + i_vpr_e(inst, "%s: buf failed\n", __func__); + return NULL; + } + + return buf; +} + +int msm_vidc_put_vidc_buffer(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buf) +{ + if (!inst || !buf) { + d_vpr_e("%s: Invalid params\n", __func__); + return -EINVAL; + } + + inst->pool.buffers.count++; + list_add_tail(&buf->list, &inst->pool.buffers.list); + + return 0; +} + +int msm_vidc_destroy_vidc_buffer(struct msm_vidc_inst *inst) +{ + struct msm_vidc_buffer *buf, *dummy; + + if (!inst) { + d_vpr_e("%s: Invalid params\n", __func__); + return -EINVAL; + } + + i_vpr_h(inst, "%s: pool: buffer count %u\n", __func__, inst->pool.buffers.count); + + /* free all buffers from pool */ + list_for_each_entry_safe(buf, dummy, &inst->pool.buffers.list, list) { + list_del(&buf->list); + kfree(buf); + } + + return 0; +} + +struct msm_vidc_alloc *msm_vidc_get_alloc_buffer(struct msm_vidc_inst *inst) +{ + struct msm_vidc_alloc *alloc = NULL; + + if (!inst) { + d_vpr_e("%s: Invalid params\n", __func__); + return NULL; + } + + if (!list_empty(&inst->pool.allocations.list)) { + alloc = list_first_entry(&inst->pool.allocations.list, struct msm_vidc_alloc, list); + inst->pool.allocations.count--; + list_del(&alloc->list); + memset(alloc, 0, sizeof(struct msm_vidc_alloc)); + return alloc; + } + + alloc = kzalloc(sizeof(struct msm_vidc_alloc), GFP_KERNEL); + if (!alloc) { + i_vpr_e(inst, "%s: alloc failed\n", __func__); + return NULL; + } + + return alloc; +} + +int msm_vidc_put_alloc_buffer(struct msm_vidc_inst *inst, struct msm_vidc_alloc *alloc) +{ + if (!inst || !alloc) { + d_vpr_e("%s: Invalid params\n", __func__); + return -EINVAL; + } + + list_add_tail(&alloc->list, &inst->pool.allocations.list); + inst->pool.allocations.count++; + + return 0; +} + +int msm_vidc_destroy_alloc_buffer(struct msm_vidc_inst *inst) +{ + struct msm_vidc_alloc *alloc, *dummy; + + if (!inst) { + d_vpr_e("%s: Invalid params\n", __func__); + return -EINVAL; + } + + i_vpr_h(inst, "%s: pool: allocations count %u\n", __func__, inst->pool.allocations.count); + + /* free all allocations from pool */ + list_for_each_entry_safe(alloc, dummy, &inst->pool.allocations.list, list) { + list_del(&alloc->list); + kfree(alloc); + } + + return 0; +} + +struct msm_vidc_map *msm_vidc_get_map_buffer(struct msm_vidc_inst *inst) +{ + struct msm_vidc_map *map = NULL; + + if (!inst) { + d_vpr_e("%s: Invalid params\n", __func__); + return NULL; + } + + if (!list_empty(&inst->pool.mappings.list)) { + map = list_first_entry(&inst->pool.mappings.list, struct msm_vidc_map, list); + inst->pool.mappings.count--; + list_del(&map->list); + memset(map, 0, sizeof(struct msm_vidc_map)); + return map; + } + + map = kzalloc(sizeof(struct msm_vidc_map), GFP_KERNEL); + if (!map) { + i_vpr_e(inst, "%s: map failed\n", __func__); + return NULL; + } + + return map; +} + +int msm_vidc_put_map_buffer(struct msm_vidc_inst *inst, struct msm_vidc_map *map) +{ + if (!inst || !map) { + d_vpr_e("%s: Invalid params\n", __func__); + return -EINVAL; + } + + list_add_tail(&map->list, &inst->pool.mappings.list); + inst->pool.mappings.count++; + + return 0; +} + +int msm_vidc_destroy_map_buffer(struct msm_vidc_inst *inst) +{ + struct msm_vidc_map *map, *dummy; + + if (!inst) { + d_vpr_e("%s: Invalid params\n", __func__); + return -EINVAL; + } + + i_vpr_h(inst, "%s: pool: mappings count %u\n", __func__, inst->pool.mappings.count); + + /* free all mappings from pool */ + list_for_each_entry_safe(map, dummy, &inst->pool.mappings.list, list) { + list_del(&map->list); + kfree(map); + } + + return 0; +} + int msm_vidc_unmap_buffers(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type type) { @@ -1802,7 +2005,7 @@ int msm_vidc_unmap_buffers(struct msm_vidc_inst *inst, return -EINVAL; list_for_each_entry_safe(map, dummy, &mappings->list, list) { - msm_vidc_memory_unmap_completely(inst->core, map); + msm_vidc_memory_unmap_completely(inst, map); } return rc; @@ -1847,8 +2050,7 @@ int msm_vidc_unmap_driver_buf(struct msm_vidc_inst *inst, if (!map->refcount) { msm_vidc_memory_put_dmabuf(map->dmabuf); list_del(&map->list); - kfree(map); - map = NULL; + msm_vidc_put_map_buffer(inst, map); } return rc; @@ -1883,7 +2085,7 @@ int msm_vidc_map_driver_buf(struct msm_vidc_inst *inst, } if (!found) { /* new buffer case */ - map = kzalloc(sizeof(struct msm_vidc_map), GFP_KERNEL); + map = msm_vidc_get_map_buffer(inst); if (!map) { i_vpr_e(inst, "%s: alloc failed\n", __func__); return -ENOMEM; @@ -1900,7 +2102,7 @@ int msm_vidc_map_driver_buf(struct msm_vidc_inst *inst, rc = msm_vidc_memory_map(inst->core, map); if (rc) { msm_vidc_memory_put_dmabuf(map->dmabuf); - kfree(map); + msm_vidc_put_map_buffer(inst, map); return rc; } } @@ -1931,7 +2133,7 @@ int msm_vidc_put_driver_buf(struct msm_vidc_inst *inst, /* delete the buffer from buffers->list */ list_del(&buf->list); - kfree(buf); + msm_vidc_put_vidc_buffer(inst, buf); return rc; } @@ -1957,7 +2159,7 @@ struct msm_vidc_buffer *msm_vidc_get_driver_buf(struct msm_vidc_inst *inst, if (!buffers) return NULL; - buf = kzalloc(sizeof(struct msm_vidc_buffer), GFP_KERNEL); + buf = msm_vidc_get_vidc_buffer(inst); if (!buf) { i_vpr_e(inst, "%s: alloc failed\n", __func__); return NULL; @@ -1985,7 +2187,7 @@ struct msm_vidc_buffer *msm_vidc_get_driver_buf(struct msm_vidc_inst *inst, error: msm_vidc_memory_put_dmabuf(buf->dmabuf); list_del(&buf->list); - kfree(buf); + msm_vidc_put_vidc_buffer(inst, buf); return NULL; } @@ -2011,8 +2213,6 @@ struct msm_vidc_buffer *get_meta_buffer(struct msm_vidc_inst *inst, return NULL; } list_for_each_entry(mbuf, &buffers->list, list) { - if (!mbuf->valid) - continue; if (mbuf->index == buf->index) { found = true; break; @@ -2376,7 +2576,7 @@ int msm_vidc_destroy_internal_buffer(struct msm_vidc_inst *inst, if (map->dmabuf == buffer->dmabuf) { msm_vidc_memory_unmap(inst->core, map); list_del(&map->list); - kfree(map); + msm_vidc_put_map_buffer(inst, map); break; } } @@ -2385,7 +2585,7 @@ int msm_vidc_destroy_internal_buffer(struct msm_vidc_inst *inst, if (alloc->dmabuf == buffer->dmabuf) { msm_vidc_memory_free(inst->core, alloc); list_del(&alloc->list); - kfree(alloc); + msm_vidc_put_alloc_buffer(inst, alloc); break; } } @@ -2393,7 +2593,7 @@ int msm_vidc_destroy_internal_buffer(struct msm_vidc_inst *inst, list_for_each_entry_safe(buf, dummy, &buffers->list, list) { if (buf->dmabuf == buffer->dmabuf) { list_del(&buf->list); - kfree(buf); + msm_vidc_put_vidc_buffer(inst, buf); break; } } @@ -2473,19 +2673,18 @@ int msm_vidc_create_internal_buffer(struct msm_vidc_inst *inst, if (!buffers->size) return 0; - buffer = kzalloc(sizeof(struct msm_vidc_buffer), GFP_KERNEL); + buffer = msm_vidc_get_vidc_buffer(inst); if (!buffer) { i_vpr_e(inst, "%s: buf alloc failed\n", __func__); return -ENOMEM; } INIT_LIST_HEAD(&buffer->list); - buffer->valid = true; buffer->type = buffer_type; buffer->index = index; buffer->buffer_size = buffers->size; list_add_tail(&buffer->list, &buffers->list); - alloc = kzalloc(sizeof(struct msm_vidc_alloc), GFP_KERNEL); + alloc = msm_vidc_get_alloc_buffer(inst); if (!alloc) { i_vpr_e(inst, "%s: alloc failed\n", __func__); return -ENOMEM; @@ -2501,7 +2700,7 @@ int msm_vidc_create_internal_buffer(struct msm_vidc_inst *inst, return -ENOMEM; list_add_tail(&alloc->list, &allocations->list); - map = kzalloc(sizeof(struct msm_vidc_map), GFP_KERNEL); + map = msm_vidc_get_map_buffer(inst); if (!map) { i_vpr_e(inst, "%s: map alloc failed\n", __func__); return -ENOMEM; @@ -3511,7 +3710,7 @@ int msm_vidc_print_inst_info(struct msm_vidc_inst *inst) buffers->extra_count, buffers->actual_count); list_for_each_entry(buf, &buffers->list, list) { - if (!buf->valid || !buf->dmabuf) + if (!buf->dmabuf) continue; dbuf = (struct dma_buf *)buf->dmabuf; i_vpr_e(inst, @@ -3814,7 +4013,7 @@ int msm_vidc_flush_delayed_unmap_buffers(struct msm_vidc_inst *inst, __func__, map->refcount, map->device_addr); msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); } - msm_vidc_memory_unmap_completely(inst->core, map); + msm_vidc_memory_unmap_completely(inst, map); } } } @@ -3876,8 +4075,14 @@ void msm_vidc_destroy_buffers(struct msm_vidc_inst *inst) list_for_each_entry_safe(buf, dummy, &inst->buffers.read_only.list, list) { print_vidc_buffer(VIDC_ERR, "err", "destroying ro buffer", inst, buf); list_del(&buf->list); - kfree(buf); + msm_vidc_put_vidc_buffer(inst, buf); } + + /* destroy buffers from pool */ + msm_vidc_destroy_vidc_buffer(inst); + msm_vidc_destroy_alloc_buffer(inst); + msm_vidc_destroy_map_buffer(inst); + } static void msm_vidc_close_helper(struct kref *kref) diff --git a/driver/vidc/src/msm_vidc_memory.c b/driver/vidc/src/msm_vidc_memory.c index 9fe531fbfb..2db0867f3e 100644 --- a/driver/vidc/src/msm_vidc_memory.c +++ b/driver/vidc/src/msm_vidc_memory.c @@ -202,34 +202,6 @@ exit: return rc; } -int msm_vidc_memory_unmap_completely(struct msm_vidc_core *core, - struct msm_vidc_map *map) -{ - int rc = 0; - - if (!core || !map) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - if (!map->refcount) - return 0; - - while (map->refcount) { - rc = msm_vidc_memory_unmap(core, map); - if (rc) - break; - if (!map->refcount) { - msm_vidc_memory_put_dmabuf(map->dmabuf); - list_del(&map->list); - kfree(map); - map = NULL; - break; - } - } - return rc; -} - int msm_vidc_memory_alloc(struct msm_vidc_core *core, struct msm_vidc_alloc *mem) { int rc = 0; diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index a9a3a7d640..e63d52b75d 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -515,11 +515,12 @@ static int handle_read_only_buffer(struct msm_vidc_inst *inst, */ if (buffer->attr & MSM_VIDC_ATTR_READ_ONLY) { if (!found) { - ro_buf = kmemdup(buffer, sizeof(struct msm_vidc_buffer), GFP_KERNEL); + ro_buf = msm_vidc_get_vidc_buffer(inst); if (!ro_buf) { i_vpr_e(inst, "%s: buffer alloc failed\n", __func__); return -ENOMEM; } + memcpy(ro_buf, buffer, sizeof(struct msm_vidc_buffer)); INIT_LIST_HEAD(&ro_buf->list); list_add_tail(&ro_buf->list, &ro_buffers->list); print_vidc_buffer(VIDC_LOW, "low", "ro buf added", inst, ro_buf); @@ -528,8 +529,7 @@ static int handle_read_only_buffer(struct msm_vidc_inst *inst, if (found) { print_vidc_buffer(VIDC_LOW, "low", "ro buf deleted", inst, ro_buf); list_del(&ro_buf->list); - kfree(ro_buf); - ro_buf = NULL; + msm_vidc_put_vidc_buffer(inst, ro_buf); } } From 691131156dcba027b08908db240b51a9ee431bd4 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Mon, 5 Apr 2021 18:33:52 -0700 Subject: [PATCH 0219/1061] video: driver: Define upstream controls Define upstream controls if any control is currently not availble in gki or gsi bionic header file. Change-Id: I370c58712479cb3e8f6f4e5650a8c35cefe59c4f Signed-off-by: Akshata Sahukar --- .../uapi/vidc/media/v4l2_vidc_extensions.h | 90 +++++++++++++++++++ 1 file changed, 90 insertions(+) diff --git a/include/uapi/vidc/media/v4l2_vidc_extensions.h b/include/uapi/vidc/media/v4l2_vidc_extensions.h index 3817bef95d..13a6c30374 100644 --- a/include/uapi/vidc/media/v4l2_vidc_extensions.h +++ b/include/uapi/vidc/media/v4l2_vidc_extensions.h @@ -135,6 +135,96 @@ enum v4l2_mpeg_vidc_blur_types { #define V4L2_CID_MPEG_VIDC_MIN_QUALITY \ (V4L2_CID_MPEG_VIDC_BASE + 0x2D) +/* Deprecate below controls once availble in gki and gsi bionic header */ +#ifndef V4L2_CID_MPEG_VIDEO_BASELAYER_PRIORITY_ID +#define V4L2_CID_MPEG_VIDEO_BASELAYER_PRIORITY_ID \ + (V4L2_CID_MPEG_BASE + 230) +#endif +#ifndef V4L2_CID_MPEG_VIDEO_AU_DELIMITER +#define V4L2_CID_MPEG_VIDEO_AU_DELIMITER \ + (V4L2_CID_MPEG_BASE + 231) +#endif +#ifndef V4L2_CID_MPEG_VIDEO_LTR_COUNT +#define V4L2_CID_MPEG_VIDEO_LTR_COUNT \ + (V4L2_CID_MPEG_BASE + 232) +#endif +#ifndef V4L2_CID_MPEG_VIDEO_FRAME_LTR_INDEX +#define V4L2_CID_MPEG_VIDEO_FRAME_LTR_INDEX \ + (V4L2_CID_MPEG_BASE + 233) +#endif +#ifndef V4L2_CID_MPEG_VIDEO_USE_LTR_FRAMES +#define V4L2_CID_MPEG_VIDEO_USE_LTR_FRAMES \ + (V4L2_CID_MPEG_BASE + 234) +#endif +#ifndef V4L2_CID_MPEG_VIDEO_H264_B_FRAME_MIN_QP +#define V4L2_CID_MPEG_VIDEO_H264_B_FRAME_MIN_QP \ + (V4L2_CID_MPEG_BASE + 389) +#endif +#ifndef V4L2_CID_MPEG_VIDEO_H264_B_FRAME_MAX_QP +#define V4L2_CID_MPEG_VIDEO_H264_B_FRAME_MAX_QP \ + (V4L2_CID_MPEG_BASE + 390) +#endif +#ifndef V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L0_BR +#define V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L0_BR \ + (V4L2_CID_MPEG_BASE + 391) +#endif +#ifndef V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L1_BR +#define V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L1_BR \ + (V4L2_CID_MPEG_BASE + 392) +#endif +#ifndef V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L2_BR +#define V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L2_BR \ + (V4L2_CID_MPEG_BASE + 393) +#endif +#ifndef V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L3_BR +#define V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L3_BR \ + (V4L2_CID_MPEG_BASE + 394) +#endif +#ifndef V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L4_BR +#define V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L4_BR \ + (V4L2_CID_MPEG_BASE + 395) +#endif +#ifndef V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L5_BR +#define V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L5_BR \ + (V4L2_CID_MPEG_BASE + 396) +#endif +#ifndef V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L6_BR +#define V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L6_BR \ + (V4L2_CID_MPEG_BASE + 397) +#endif +#ifndef V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_MIN_QP +#define V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_MIN_QP \ + (V4L2_CID_MPEG_BASE + 647) +#endif +#ifndef V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_MAX_QP +#define V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_MAX_QP \ + (V4L2_CID_MPEG_BASE + 648) +#endif +#ifndef V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_MIN_QP +#define V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_MIN_QP \ + (V4L2_CID_MPEG_BASE + 649) +#endif +#ifndef V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_MAX_QP +#define V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_MAX_QP \ + (V4L2_CID_MPEG_BASE + 650) +#endif +#ifndef V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_MIN_QP +#define V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_MIN_QP \ + (V4L2_CID_MPEG_BASE + 651) +#endif +#ifndef V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_MAX_QP +#define V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_MAX_QP \ + (V4L2_CID_MPEG_BASE + 652) +#endif +#ifndef V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY +#define V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY \ + (V4L2_CID_MPEG_BASE + 653) +#endif +#ifndef V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY_ENABLE +#define V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY_ENABLE \ + (V4L2_CID_MPEG_BASE + 654) +#endif + enum v4l2_mpeg_vidc_metapayload_header_flags { METADATA_FLAGS_NONE = 0, METADATA_FLAGS_TOP_FIELD = (1 << 0), From e6e1004dd59fa43858779c7d3ac1e26602d14bc3 Mon Sep 17 00:00:00 2001 From: Maheshwar Ajja Date: Tue, 6 Apr 2021 11:19:08 -0700 Subject: [PATCH 0220/1061] video: driver: skip core deinit if deinited already Do not try to deinitialize core if core was already in deinited. Also in failed cases skip calling venus_hfi_core_deinit() from within venus_hfi_core_init() as the caller will anyway call venus_hfi_core_deinit(). Change-Id: Idda3d989a8eb500b0d5392a1eac65109e3d73b81 Signed-off-by: Maheshwar Ajja --- driver/vidc/src/venus_hfi.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index dda50bc9b4..82c057b441 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -2823,7 +2823,6 @@ int venus_hfi_core_init(struct msm_vidc_core *core) error: d_vpr_h("%s(): failed\n", __func__); - venus_hfi_core_deinit(core); return rc; } @@ -2835,6 +2834,8 @@ int venus_hfi_core_deinit(struct msm_vidc_core *core) } d_vpr_h("%s(): core %pK\n", __func__, core); __strict_check(core); + if (core->state == MSM_VIDC_CORE_DEINIT) + return 0; __resume(core); __flush_debug_queue(core, core->packet, core->packet_size); __disable_subcaches(core); From ceab7d9dab8b858b18b1bed48dd2c4f9e87f4323 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Tue, 6 Apr 2021 11:23:01 -0700 Subject: [PATCH 0221/1061] video: driver: Do not combine PREPEND_SPSPPS_TO_IDR with SEPARATE/JOINED_WITH_1ST_FRAME Combination of PREPEND_SPSPPS_TO_IDR with V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE or V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME is not supported. Hence, prioritize PREPEND_SPSPPS_TO_IDR over SEPARATE/JOINED_WITH_1ST_FRAME to set to fw. Change-Id: Ia23569c046c95889d5eabbe2142d6fd2c69d032a Signed-off-by: Akshata Sahukar --- driver/vidc/src/msm_vidc_control.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 0ec744ddc3..5084cc493e 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -1578,13 +1578,13 @@ int msm_vidc_set_header_mode(void *instance, prepend_sps_pps = capability->cap[PREPEND_SPSPPS_TO_IDR].value; hdr_metadata = capability->cap[META_SEQ_HDR_NAL].value; - if (header_mode == V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE) - hfi_value |= HFI_SEQ_HEADER_SEPERATE_FRAME; - else if (header_mode == V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME) - hfi_value |= HFI_SEQ_HEADER_JOINED_WITH_1ST_FRAME; - + /* prioritize PREPEND_SPSPPS_TO_IDR mode over other header modes */ if (prepend_sps_pps) - hfi_value |= HFI_SEQ_HEADER_PREFIX_WITH_SYNC_FRAME; + hfi_value = HFI_SEQ_HEADER_PREFIX_WITH_SYNC_FRAME; + else if (header_mode == V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME) + hfi_value = HFI_SEQ_HEADER_JOINED_WITH_1ST_FRAME; + else + hfi_value = HFI_SEQ_HEADER_SEPERATE_FRAME; if (hdr_metadata) hfi_value |= HFI_SEQ_HEADER_METADATA; From c446124753c2888fc694efa66e04beaa86623e2a Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Tue, 6 Apr 2021 15:55:08 +0530 Subject: [PATCH 0222/1061] video: driver: add frame interval enum support. Added support for VIDIOC_ENUM_FRAMEINTERVALS to provide supported frame intervals range for a given resolution. Change-Id: I51174634739dd1141d308ba9bfd1cf3720b6ca42 Signed-off-by: Govindaraj Rajagopal --- driver/vidc/inc/msm_vidc.h | 1 + driver/vidc/inc/msm_vidc_v4l2.h | 2 + driver/vidc/src/msm_vidc.c | 71 +++++++++++++++++++++++++++++ driver/vidc/src/msm_vidc_platform.c | 1 + driver/vidc/src/msm_vidc_v4l2.c | 8 ++++ 5 files changed, 83 insertions(+) diff --git a/driver/vidc/inc/msm_vidc.h b/driver/vidc/inc/msm_vidc.h index 40990d2207..9f3d3d33c3 100644 --- a/driver/vidc/inc/msm_vidc.h +++ b/driver/vidc/inc/msm_vidc.h @@ -49,4 +49,5 @@ int msm_vidc_unsubscribe_event(void *instance, int msm_vidc_dqevent(void *instance, struct v4l2_event *event); int msm_vidc_g_crop(void *instance, struct v4l2_crop *a); int msm_vidc_enum_framesizes(void *instance, struct v4l2_frmsizeenum *fsize); +int msm_vidc_enum_frameintervals(void *instance, struct v4l2_frmivalenum *fival); #endif diff --git a/driver/vidc/inc/msm_vidc_v4l2.h b/driver/vidc/inc/msm_vidc_v4l2.h index 018bedc784..65ac6af676 100644 --- a/driver/vidc/inc/msm_vidc_v4l2.h +++ b/driver/vidc/inc/msm_vidc_v4l2.h @@ -54,6 +54,8 @@ int msm_v4l2_encoder_cmd(struct file *file, void *fh, struct v4l2_encoder_cmd *enc); int msm_v4l2_enum_framesizes(struct file *file, void *fh, struct v4l2_frmsizeenum *fsize); +int msm_v4l2_enum_frameintervals(struct file *file, void *fh, + struct v4l2_frmivalenum *fival); int msm_v4l2_queryctrl(struct file *file, void *fh, struct v4l2_queryctrl *ctrl); int msm_v4l2_querymenu(struct file *file, void *fh, diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index eac500eb0d..ecdd22c150 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -603,6 +603,7 @@ int msm_vidc_enum_framesizes(void *instance, struct v4l2_frmsizeenum *fsize) { struct msm_vidc_inst *inst = instance; struct msm_vidc_inst_capability *capability; + enum msm_vidc_colorformat_type colorfmt; if (!inst || !fsize) { d_vpr_e("%s: invalid params: %pK %pK\n", @@ -614,6 +615,18 @@ int msm_vidc_enum_framesizes(void *instance, struct v4l2_frmsizeenum *fsize) return -EINVAL; } capability = inst->capabilities; + + /* only index 0 allowed as per v4l2 spec */ + if (fsize->index) + return -EINVAL; + + /* validate pixel format */ + colorfmt = v4l2_colorformat_to_driver(fsize->pixel_format, __func__); + if (colorfmt == MSM_VIDC_FMT_NONE) { + i_vpr_e(inst, "%s: unsupported pix fmt %#x\n", __func__, fsize->pixel_format); + return -EINVAL; + } + fsize->type = V4L2_FRMSIZE_TYPE_STEPWISE; fsize->stepwise.min_width = capability->cap[FRAME_WIDTH].min; fsize->stepwise.max_width = capability->cap[FRAME_WIDTH].max; @@ -628,6 +641,64 @@ int msm_vidc_enum_framesizes(void *instance, struct v4l2_frmsizeenum *fsize) } EXPORT_SYMBOL(msm_vidc_enum_framesizes); +int msm_vidc_enum_frameintervals(void *instance, struct v4l2_frmivalenum *fival) +{ + struct msm_vidc_inst *inst = instance; + struct msm_vidc_core *core; + struct msm_vidc_inst_capability *capability; + enum msm_vidc_colorformat_type colorfmt; + u32 fps, mbpf; + + if (!inst || !fival) { + d_vpr_e("%s: invalid params: %pK %pK\n", + __func__, inst, fival); + return -EINVAL; + } + core = inst->core; + + if (!inst->capabilities || !core->capabilities) { + i_vpr_e(inst, "capabilities not available\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + /* only index 0 allowed as per v4l2 spec */ + if (fival->index) + return -EINVAL; + + /* validate pixel format */ + colorfmt = v4l2_colorformat_to_driver(fival->pixel_format, __func__); + if (colorfmt == MSM_VIDC_FMT_NONE) { + i_vpr_e(inst, "%s: unsupported pix fmt %#x\n", __func__, fival->pixel_format); + return -EINVAL; + } + + /* validate resolution */ + if (fival->width > capability->cap[FRAME_WIDTH].max || + fival->width < capability->cap[FRAME_WIDTH].min || + fival->height > capability->cap[FRAME_HEIGHT].max || + fival->height < capability->cap[FRAME_HEIGHT].min) { + i_vpr_e(inst, "%s: unsupported resolution %u x %u\n", __func__, + fival->width, fival->height); + return -EINVAL; + } + + /* calculate max supported fps for a given resolution */ + mbpf = NUM_MBS_PER_FRAME(fival->height, fival->width); + fps = core->capabilities[MAX_MBPS].value / mbpf; + + fival->type = V4L2_FRMIVAL_TYPE_STEPWISE; + fival->stepwise.min.numerator = 1; + fival->stepwise.min.denominator = min_t(u32, fps, MAXIMUM_FPS); + fival->stepwise.max.numerator = 1; + fival->stepwise.max.denominator = 1; + fival->stepwise.step.numerator = 1; + fival->stepwise.step.denominator = MAXIMUM_FPS; + + return 0; +} +EXPORT_SYMBOL(msm_vidc_enum_frameintervals); + int msm_vidc_subscribe_event(void *instance, const struct v4l2_event_subscription *sub) { diff --git a/driver/vidc/src/msm_vidc_platform.c b/driver/vidc/src/msm_vidc_platform.c index 0c3831b5b8..d1da9f3155 100644 --- a/driver/vidc/src/msm_vidc_platform.c +++ b/driver/vidc/src/msm_vidc_platform.c @@ -27,6 +27,7 @@ static struct v4l2_ioctl_ops msm_v4l2_ioctl_ops = { .vidioc_enum_fmt_vid_cap = msm_v4l2_enum_fmt, .vidioc_enum_fmt_vid_out = msm_v4l2_enum_fmt, .vidioc_enum_framesizes = msm_v4l2_enum_framesizes, + .vidioc_enum_frameintervals = msm_v4l2_enum_frameintervals, .vidioc_s_fmt_vid_cap = msm_v4l2_s_fmt, .vidioc_s_fmt_vid_out = msm_v4l2_s_fmt, .vidioc_s_fmt_vid_cap_mplane = msm_v4l2_s_fmt, diff --git a/driver/vidc/src/msm_vidc_v4l2.c b/driver/vidc/src/msm_vidc_v4l2.c index fb4d1785ef..7d57e440d4 100644 --- a/driver/vidc/src/msm_vidc_v4l2.c +++ b/driver/vidc/src/msm_vidc_v4l2.c @@ -215,6 +215,14 @@ int msm_v4l2_enum_framesizes(struct file *file, void *fh, return msm_vidc_enum_framesizes((void *)vidc_inst, fsize); } +int msm_v4l2_enum_frameintervals(struct file *file, void *fh, + struct v4l2_frmivalenum *fival) +{ + struct msm_vidc_inst *vidc_inst = get_vidc_inst(file, fh); + + return msm_vidc_enum_frameintervals((void *)vidc_inst, fival); +} + int msm_v4l2_queryctrl(struct file *file, void *fh, struct v4l2_queryctrl *ctrl) { From d77900d9ab80e5bf6be0e74fade5ecb47a2da84f Mon Sep 17 00:00:00 2001 From: Manikanta Kanamarlapudi Date: Tue, 6 Apr 2021 07:47:19 -0700 Subject: [PATCH 0223/1061] video: Fix QP issues For max-qp, set_min_qp is called, correct the same. Change-Id: I2ff7d6557a033fa45343b131fd68cae1eaf6d796 Signed-off-by: Manikanta Kanamarlapudi --- driver/platform/waipio/src/msm_vidc_waipio.c | 4 ++-- driver/vidc/src/msm_vidc_control.c | 6 +++--- 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 1d9b4b2e20..35c78bf958 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -595,7 +595,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { HFI_PROP_MAX_QP_PACKED, CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, {0}, {0}, - NULL, msm_vidc_set_min_qp}, + NULL, msm_vidc_set_max_qp}, {MAX_FRAME_QP, ENC, HEVC|HEIC, MIN_QP_10BIT, MAX_QP, 1, MAX_QP, @@ -603,7 +603,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { HFI_PROP_MAX_QP_PACKED, CAP_FLAG_OUTPUT_PORT, {PIX_FMTS}, {0}, - msm_vidc_adjust_hevc_max_qp, msm_vidc_set_min_qp}, + msm_vidc_adjust_hevc_max_qp, msm_vidc_set_max_qp}, {I_FRAME_MAX_QP, ENC, H264, MIN_QP_8BIT, MAX_QP, 1, MAX_QP, diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 5084cc493e..22d6e12cdb 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -1829,11 +1829,11 @@ int msm_vidc_set_max_qp(void *instance, capability->cap[MAX_FRAME_QP].flags & CAP_FLAG_CLIENT_SET; i_qp_enable = max_qp_enable || - capability->cap[I_FRAME_MIN_QP].flags & CAP_FLAG_CLIENT_SET; + capability->cap[I_FRAME_MAX_QP].flags & CAP_FLAG_CLIENT_SET; p_qp_enable = max_qp_enable || - capability->cap[P_FRAME_MIN_QP].flags & CAP_FLAG_CLIENT_SET; + capability->cap[P_FRAME_MAX_QP].flags & CAP_FLAG_CLIENT_SET; b_qp_enable = max_qp_enable || - capability->cap[B_FRAME_MIN_QP].flags & CAP_FLAG_CLIENT_SET; + capability->cap[B_FRAME_MAX_QP].flags & CAP_FLAG_CLIENT_SET; client_qp_enable = i_qp_enable | p_qp_enable << 1 | b_qp_enable << 2; if (!client_qp_enable) { From 7c612dd0333dd5923512576587e7d8e53eacc2f2 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Mon, 5 Apr 2021 19:44:06 -0700 Subject: [PATCH 0224/1061] video: driver: Deprecate private ctrls and use upstream ctrls Remove private ctrl definitions, and use upstream ctrls in source code. Change-Id: Ib12cae5b78be69936bf0f97ca09483f5baa60350 Signed-off-by: Akshata Sahukar --- driver/platform/waipio/src/msm_vidc_waipio.c | 12 ++++++------ driver/vidc/src/msm_venc.c | 2 +- driver/vidc/src/msm_vidc_control.c | 10 ++++++++++ driver/vidc/src/msm_vidc_driver.c | 4 ++-- include/uapi/vidc/media/v4l2_vidc_extensions.h | 5 ----- 5 files changed, 19 insertions(+), 14 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 35c78bf958..ec5b44548b 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -444,7 +444,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {LTR_COUNT, ENC, H264|HEVC, 0, 2, 1, 0, - V4L2_CID_MPEG_VIDC_LTRCOUNT, + V4L2_CID_MPEG_VIDEO_LTR_COUNT, HFI_PROP_LTR_COUNT, CAP_FLAG_OUTPUT_PORT, {BITRATE_MODE}, {USE_LTR, MARK_LTR}, @@ -452,7 +452,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {USE_LTR, ENC, H264|HEVC, 0, ((1 << MAX_LTR_FRAME_COUNT) - 1), 1, 0, - V4L2_CID_MPEG_VIDC_USELTRFRAME, + V4L2_CID_MPEG_VIDEO_USE_LTR_FRAMES, HFI_PROP_LTR_USE, CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, {LTR_COUNT}, {0}, @@ -460,7 +460,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {MARK_LTR, ENC, H264|HEVC, 0, (MAX_LTR_FRAME_COUNT - 1), 1, 0, - V4L2_CID_MPEG_VIDC_MARKLTRFRAME, + V4L2_CID_MPEG_VIDEO_FRAME_LTR_INDEX, HFI_PROP_LTR_MARK, CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, {LTR_COUNT}, {0}, @@ -484,7 +484,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_AU_DELIMITER, + V4L2_CID_MPEG_VIDEO_AU_DELIMITER, HFI_PROP_AUD, CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, {0}, {0}, @@ -1068,13 +1068,13 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {DISPLAY_DELAY_ENABLE, DEC, H264|HEVC|VP9, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_MFC51_VIDEO_DECODER_H264_DISPLAY_DELAY_ENABLE, + V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY_ENABLE, HFI_PROP_DECODE_ORDER_OUTPUT, CAP_FLAG_ROOT | CAP_FLAG_INPUT_PORT}, {DISPLAY_DELAY, DEC, H264|HEVC|VP9, 0, 1, 1, 0, - V4L2_CID_MPEG_MFC51_VIDEO_DECODER_H264_DISPLAY_DELAY, + V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY, HFI_PROP_DECODE_ORDER_OUTPUT, CAP_FLAG_ROOT | CAP_FLAG_INPUT_PORT}, diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index 1c0382216c..5ce16e41bf 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -139,7 +139,7 @@ static int msm_venc_set_stride_scanline(struct msm_vidc_inst *inst, color_format = inst->capabilities->cap[PIX_FMTS].value; if (!is_linear_colorformat(color_format)) { - i_vpr_e(inst, + i_vpr_h(inst, "%s: not a linear color fmt, property is not set\n", __func__); return 0; diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 22d6e12cdb..05f68dc706 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -34,6 +34,16 @@ static bool is_priv_ctrl(u32 id) * make this as private ctrl for time being */ case V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_TYPE: + /* + * TODO: treat below std ctrls as private ctrls until + * all below ctrls are available in upstream + */ + case V4L2_CID_MPEG_VIDEO_AU_DELIMITER: + case V4L2_CID_MPEG_VIDEO_LTR_COUNT: + case V4L2_CID_MPEG_VIDEO_FRAME_LTR_INDEX: + case V4L2_CID_MPEG_VIDEO_USE_LTR_FRAMES: + case V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY: + case V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY_ENABLE: private = true; break; default: diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index fcbed50f31..01890e51bd 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -1117,8 +1117,8 @@ bool msm_vidc_allow_s_ctrl(struct msm_vidc_inst *inst, u32 id) case V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L3_BR: case V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L4_BR: case V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L5_BR: - case V4L2_CID_MPEG_VIDC_USELTRFRAME: - case V4L2_CID_MPEG_VIDC_MARKLTRFRAME: + case V4L2_CID_MPEG_VIDEO_USE_LTR_FRAMES: + case V4L2_CID_MPEG_VIDEO_FRAME_LTR_INDEX: case V4L2_CID_MPEG_VIDC_VIDEO_BLUR_TYPES: case V4L2_CID_MPEG_VIDC_VIDEO_BLUR_RESOLUTION: case V4L2_CID_MPEG_VIDEO_CONSTANT_QUALITY: diff --git a/include/uapi/vidc/media/v4l2_vidc_extensions.h b/include/uapi/vidc/media/v4l2_vidc_extensions.h index 13a6c30374..59e9708bb9 100644 --- a/include/uapi/vidc/media/v4l2_vidc_extensions.h +++ b/include/uapi/vidc/media/v4l2_vidc_extensions.h @@ -57,13 +57,8 @@ #define V4L2_CID_MPEG_VIDC_LOWLATENCY_REQUEST (V4L2_CID_MPEG_VIDC_BASE + 0x3) /* FIXme: */ #define V4L2_CID_MPEG_VIDC_CODEC_CONFIG (V4L2_CID_MPEG_VIDC_BASE + 0x4) -/* LTR controls */ -#define V4L2_CID_MPEG_VIDC_LTRCOUNT (V4L2_CID_MPEG_VIDC_BASE + 0x7) -#define V4L2_CID_MPEG_VIDC_USELTRFRAME (V4L2_CID_MPEG_VIDC_BASE + 0x8) -#define V4L2_CID_MPEG_VIDC_MARKLTRFRAME (V4L2_CID_MPEG_VIDC_BASE + 0x9) /* Encoder Intra refresh period */ #define V4L2_CID_MPEG_VIDC_INTRA_REFRESH_PERIOD (V4L2_CID_MPEG_VIDC_BASE + 0xB) -#define V4L2_CID_MPEG_VIDC_AU_DELIMITER (V4L2_CID_MPEG_VIDC_BASE + 0xC) #define V4L2_CID_MPEG_VIDC_TIME_DELTA_BASED_RC (V4L2_CID_MPEG_VIDC_BASE + 0xD) /* Encoder quality controls */ #define V4L2_CID_MPEG_VIDC_CONTENT_ADAPTIVE_CODING \ From ae79a4b1817a65c7eb11f53d74d9a39fe84fe4dc Mon Sep 17 00:00:00 2001 From: Maheshwar Ajja Date: Thu, 8 Apr 2021 12:48:16 -0700 Subject: [PATCH 0225/1061] video: driver: power collapse only if no sessions present Skip power collapse if any sessions are present in driver. Change-Id: I40003c118b815d2cd07ce44e06bfa3c08182ab3f Signed-off-by: Maheshwar Ajja --- driver/vidc/src/venus_hfi.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index 82c057b441..0a87e8481c 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -2686,6 +2686,7 @@ void venus_hfi_pm_work_handler(struct work_struct *work) return; } + d_vpr_h("%s\n", __func__); /* * It is ok to check this variable outside the lock since * it is being updated in this context only @@ -2699,6 +2700,15 @@ void venus_hfi_pm_work_handler(struct work_struct *work) } core_lock(core, __func__); + + /* power collapse only if no session is present */ + if (!list_empty(&core->instances)) { + d_vpr_h( + "%s: sessions available, skip power collapse\n", + __func__); + goto unlock; + } + rc = __power_collapse(core, false); switch (rc) { case 0: @@ -2722,6 +2732,7 @@ void venus_hfi_pm_work_handler(struct work_struct *work) d_vpr_e("%s: power collapse failed\n", __func__); break; } +unlock: core_unlock(core, __func__); } From 1b42ed0a6765381fd3fdcc497b6554c9d63a4489 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Wed, 7 Apr 2021 14:16:40 -0700 Subject: [PATCH 0226/1061] video: driver: adjust/set mark/use ltr dynamically only Avoid adjusting, sanitizing, and setting mark and use ltr controls to fw for input port static case. Change-Id: I8ac7fd9537ff0c5ddce0ff0f4d0337cb19dd83d2 Signed-off-by: Akshata Sahukar --- driver/platform/waipio/src/msm_vidc_waipio.c | 14 +++-- driver/vidc/inc/msm_vidc_internal.h | 1 + driver/vidc/src/msm_vidc_control.c | 63 ++++++++++++-------- 3 files changed, 49 insertions(+), 29 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index ec5b44548b..be35a5bb68 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -447,23 +447,27 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_CID_MPEG_VIDEO_LTR_COUNT, HFI_PROP_LTR_COUNT, CAP_FLAG_OUTPUT_PORT, - {BITRATE_MODE}, {USE_LTR, MARK_LTR}, + {BITRATE_MODE}, {0}, msm_vidc_adjust_ltr_count, msm_vidc_set_u32}, {USE_LTR, ENC, H264|HEVC, - 0, ((1 << MAX_LTR_FRAME_COUNT) - 1), 1, 0, + INVALID_DEFAULT_MARK_OR_USE_LTR, + ((1 << MAX_LTR_FRAME_COUNT) - 1), + 1, INVALID_DEFAULT_MARK_OR_USE_LTR, V4L2_CID_MPEG_VIDEO_USE_LTR_FRAMES, HFI_PROP_LTR_USE, CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, - {LTR_COUNT}, {0}, + {0}, {0}, msm_vidc_adjust_use_ltr, msm_vidc_set_use_and_mark_ltr}, {MARK_LTR, ENC, H264|HEVC, - 0, (MAX_LTR_FRAME_COUNT - 1), 1, 0, + INVALID_DEFAULT_MARK_OR_USE_LTR, + (MAX_LTR_FRAME_COUNT - 1), + 1, INVALID_DEFAULT_MARK_OR_USE_LTR, V4L2_CID_MPEG_VIDEO_FRAME_LTR_INDEX, HFI_PROP_LTR_MARK, CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, - {LTR_COUNT}, {0}, + {0}, {0}, msm_vidc_adjust_mark_ltr, msm_vidc_set_use_and_mark_ltr}, {BASELAYER_PRIORITY, ENC, H264, diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index c0244deb0c..24a53dc730 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -56,6 +56,7 @@ #define MAX_AVC_ENH_LAYER_SLIDING_WINDOW 3 #define MAX_AVC_ENH_LAYER_HYBRID_HP 5 #define PERCENT_PEAK_BITRATE_INCREASED 10 +#define INVALID_DEFAULT_MARK_OR_USE_LTR -1 #define DCVS_WINDOW 16 /* Superframe can have maximum of 32 frames */ diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 05f68dc706..357b538639 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -899,9 +899,8 @@ int msm_vidc_adjust_ltr_count(void *instance, struct v4l2_ctrl *ctrl) int msm_vidc_adjust_use_ltr(void *instance, struct v4l2_ctrl *ctrl) { struct msm_vidc_inst_capability *capability; - s32 adjusted_value; + s32 adjusted_value, ltr_count; struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - s32 ltr_count = -1; if (!inst || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); @@ -911,18 +910,25 @@ int msm_vidc_adjust_use_ltr(void *instance, struct v4l2_ctrl *ctrl) adjusted_value = ctrl ? ctrl->val : capability->cap[USE_LTR].value; - if (msm_vidc_get_parent_value(inst, USE_LTR, LTR_COUNT, - <r_count, __func__)) - return -EINVAL; + /* + * Since USE_LTR is only set dynamically, and LTR_COUNT is static + * control, no need to make LTR_COUNT as parent for USE_LTR as + * LTR_COUNT value will always be updated when dynamically USE_LTR + * is set + */ + ltr_count = capability->cap[LTR_COUNT].value; + if (!ltr_count) + return 0; - if (!ltr_count) { - adjusted_value = 0; - } else if (adjusted_value <= 0 || - adjusted_value >= (1 << ltr_count)) { - /* USE_LTR value should be > 0 and < (2 ^ LTR_COUNT) */ + if (adjusted_value <= 0 || + adjusted_value > ((1 << ltr_count) - 1)) { + /* + * USE_LTR is bitmask value, hence should be + * > 0 and <= (2 ^ LTR_COUNT) - 1 + */ i_vpr_e(inst, "%s: invalid value %d\n", __func__, adjusted_value); - return -EINVAL; + return 0; } /* USE_LTR value is a bitmask value */ @@ -935,9 +941,8 @@ int msm_vidc_adjust_use_ltr(void *instance, struct v4l2_ctrl *ctrl) int msm_vidc_adjust_mark_ltr(void *instance, struct v4l2_ctrl *ctrl) { struct msm_vidc_inst_capability *capability; - s32 adjusted_value; + s32 adjusted_value, ltr_count; struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - s32 ltr_count = -1; if (!inst || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); @@ -947,18 +952,22 @@ int msm_vidc_adjust_mark_ltr(void *instance, struct v4l2_ctrl *ctrl) adjusted_value = ctrl ? ctrl->val : capability->cap[MARK_LTR].value; - if (msm_vidc_get_parent_value(inst, MARK_LTR, LTR_COUNT, - <r_count, __func__)) - return -EINVAL; + /* + * Since MARK_LTR is only set dynamically, and LTR_COUNT is static + * control, no need to make LTR_COUNT as parent for MARK_LTR as + * LTR_COUNT value will always be updated when dynamically MARK_LTR + * is set + */ + ltr_count = capability->cap[LTR_COUNT].value; + if (!ltr_count) + return 0; - if (!ltr_count) { - adjusted_value = 0; - } else if (adjusted_value < 0 || + if (adjusted_value < 0 || adjusted_value > (ltr_count - 1)) { - /* MARK_LTR value should be > 0 and <= (LTR_COUNT - 1) */ + /* MARK_LTR value should be >= 0 and <= (LTR_COUNT - 1) */ i_vpr_e(inst, "%s: invalid value %d\n", __func__, adjusted_value); - return -EINVAL; + return 0; } msm_vidc_update_cap_value(inst, MARK_LTR, @@ -1741,9 +1750,15 @@ int msm_vidc_set_use_and_mark_ltr(void *instance, return -EINVAL; } - if (!inst->capabilities->cap[LTR_COUNT].value) { - i_vpr_h(inst, "%s: ltr count is 0, cap %s is not set\n", - __func__, cap_name(cap_id)); + if (!inst->capabilities->cap[LTR_COUNT].value || + (inst->capabilities->cap[cap_id].value == + INVALID_DEFAULT_MARK_OR_USE_LTR)) { + i_vpr_h(inst, + "%s: LTR_COUNT: %d %s: %d, cap %s is not set\n", + __func__, inst->capabilities->cap[LTR_COUNT].value, + cap_name(cap_id), + inst->capabilities->cap[cap_id].value, + cap_name(cap_id)); return 0; } From d0730ea5867264ee50b793f6700eb6a376ddcbbb Mon Sep 17 00:00:00 2001 From: Maheshwar Ajja Date: Thu, 8 Apr 2021 16:14:10 -0700 Subject: [PATCH 0227/1061] video: driver: follow recommended reset sequence Assert all the reset clocks and then deassert. Also increase sleep time between assert and deassert. Change-Id: If5f76c677cd01a3fe37bf2704b7a1c210f6e9fec Signed-off-by: Maheshwar Ajja --- driver/vidc/src/venus_hfi.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index 82c057b441..2dfb27fa4c 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -1484,8 +1484,10 @@ int __reset_ahb2axi_bridge(struct msm_vidc_core *core) } /* wait for deassert */ - usleep_range(400, 500); + usleep_range(1000, 1100); + } + for (i = 0; i < core->dt->reset_set.count; i++) { rc = __handle_reset_clk(core, i, DEASSERT); if (rc) { d_vpr_e("failed to deassert reset clocks\n"); From f6642e3e67a9ccd7329d913cd3b1f44b82d1e331 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Wed, 7 Apr 2021 11:36:59 +0530 Subject: [PATCH 0228/1061] video: driver: add support to register custom handler. Need to increase debug timeout incase more debug logs were enabled. This is to avoid sync cmd timeout. module_param_cb supports to register custom set/get callbacks. So using this feature to increase various timeout values, incase more logs were enabled. Change-Id: I194c077c2ba00af2403d487a3dcfbb48f119b478 Signed-off-by: Govindaraj Rajagopal --- driver/platform/waipio/src/msm_vidc_waipio.c | 6 +- driver/vidc/inc/msm_vidc_debug.h | 2 +- driver/vidc/inc/msm_vidc_internal.h | 5 ++ driver/vidc/src/msm_vidc_debug.c | 62 +++++++++++++++++++- 4 files changed, 69 insertions(+), 6 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index be35a5bb68..6893685fc7 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -64,10 +64,10 @@ static struct msm_platform_core_capability core_data_waipio[] = { {MAX_ENH_LAYER_COUNT, 5}, {NUM_VPP_PIPE, 4}, {SW_PC, 1}, - {SW_PC_DELAY, 20000}, /* 20000 ms (>HW_RESPONSE_TIMEOUT)*/ {FW_UNLOAD, 0}, - {FW_UNLOAD_DELAY, 25000}, /* 25000 ms (>PC_DELAY)*/ - {HW_RESPONSE_TIMEOUT, 15000}, /* 1000 ms */ + {HW_RESPONSE_TIMEOUT, HW_RESPONSE_TIMEOUT_VALUE}, /* 1000 ms */ + {SW_PC_DELAY, SW_PC_DELAY_VALUE }, /* 1500 ms (>HW_RESPONSE_TIMEOUT)*/ + {FW_UNLOAD_DELAY, FW_UNLOAD_DELAY_VALUE }, /* 3000 ms (>SW_PC_DELAY)*/ {DEBUG_TIMEOUT, 0}, // TODO: review below entries, and if required rename as PREFETCH {PREFIX_BUF_COUNT_PIX, 18}, diff --git a/driver/vidc/inc/msm_vidc_debug.h b/driver/vidc/inc/msm_vidc_debug.h index 08522d4d0b..f127deb662 100644 --- a/driver/vidc/inc/msm_vidc_debug.h +++ b/driver/vidc/inc/msm_vidc_debug.h @@ -29,7 +29,7 @@ #define MSM_VIDC_EMPTY_BRACE {}, #endif -extern int msm_vidc_debug; +extern unsigned int msm_vidc_debug; extern bool msm_vidc_lossless_encode; extern bool msm_vidc_syscache_disable; extern int msm_vidc_clock_voting; diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 24a53dc730..90db18063d 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -108,6 +108,11 @@ #define Q16_INT(q) ((q) >> 16) #define Q16_FRAC(q) ((((q) & 0xFFFF) * 100) >> 16) +/* define timeout values */ +#define HW_RESPONSE_TIMEOUT_VALUE (1000) +#define SW_PC_DELAY_VALUE (HW_RESPONSE_TIMEOUT_VALUE + 500) +#define FW_UNLOAD_DELAY_VALUE (SW_PC_DELAY_VALUE + 1500) + enum msm_vidc_domain_type { MSM_VIDC_ENCODER = BIT(0), MSM_VIDC_DECODER = BIT(1), diff --git a/driver/vidc/src/msm_vidc_debug.c b/driver/vidc/src/msm_vidc_debug.c index f7740bd801..f32d03962b 100644 --- a/driver/vidc/src/msm_vidc_debug.c +++ b/driver/vidc/src/msm_vidc_debug.c @@ -11,11 +11,69 @@ #include "msm_vidc_inst.h" #include "msm_vidc_internal.h" +extern struct msm_vidc_core *g_core; + #define MAX_SSR_STRING_LEN 64 #define MAX_DEBUG_LEVEL_STRING_LEN 15 -int msm_vidc_debug = VIDC_ERR | VIDC_PRINTK | FW_ERROR | FW_FATAL; -module_param(msm_vidc_debug, int, 0644); +unsigned int msm_vidc_debug = VIDC_ERR | VIDC_PRINTK | FW_ERROR | FW_FATAL; + +static int debug_level_set(const char *val, + const struct kernel_param *kp) +{ + struct msm_vidc_core *core = NULL; + unsigned int dvalue; + int ret; + + if (!kp || !kp->arg || !val) { + d_vpr_e("%s: Invalid params\n", __func__); + return -EINVAL; + } + core = *(struct msm_vidc_core **)kp->arg; + + if (!core || !core->capabilities) { + d_vpr_e("%s: Invalid core/capabilities\n", __func__); + return -EINVAL; + } + + ret = kstrtouint(val, 0, &dvalue); + if (ret) + return ret; + + msm_vidc_debug = dvalue; + + /* check only driver logmask */ + if ((dvalue & 0xFF) > (VIDC_ERR | VIDC_HIGH)) { + core->capabilities[HW_RESPONSE_TIMEOUT].value = 2 * HW_RESPONSE_TIMEOUT_VALUE; + core->capabilities[SW_PC_DELAY].value = 2 * SW_PC_DELAY_VALUE; + core->capabilities[FW_UNLOAD_DELAY].value = 2 * FW_UNLOAD_DELAY_VALUE; + } else { + /* reset timeout values, if user reduces the logging */ + core->capabilities[HW_RESPONSE_TIMEOUT].value = HW_RESPONSE_TIMEOUT_VALUE; + core->capabilities[SW_PC_DELAY].value = SW_PC_DELAY_VALUE; + core->capabilities[FW_UNLOAD_DELAY].value = FW_UNLOAD_DELAY_VALUE; + } + + d_vpr_h("timeout updated: hw_response %u, sw_pc %u, fw_unload %u, debug_level %#x\n", + core->capabilities[HW_RESPONSE_TIMEOUT].value, + core->capabilities[SW_PC_DELAY].value, + core->capabilities[FW_UNLOAD_DELAY].value, + msm_vidc_debug); + + return 0; +} + +static int debug_level_get(char *buffer, const struct kernel_param *kp) +{ + return scnprintf(buffer, PAGE_SIZE, "%#x", msm_vidc_debug); +} + +static const struct kernel_param_ops msm_vidc_debug_fops = { + .set = debug_level_set, + .get = debug_level_get, +}; + +module_param_cb(msm_vidc_debug, &msm_vidc_debug_fops, &g_core, 0644); bool msm_vidc_lossless_encode = !true; EXPORT_SYMBOL(msm_vidc_lossless_encode); From d336ae5365034421566f91fb898c137f7320491b Mon Sep 17 00:00:00 2001 From: Vikash Garodia Date: Fri, 9 Apr 2021 10:50:57 +0530 Subject: [PATCH 0229/1061] msm: vidc: Fix LLCC bandwidth for non realtime session For non real time sessions, LLCC bandwidth should be voted to maximum bandwidth. CRs-Fixed: 2919988 Change-Id: I37217e71634aed298c59533b7cc2f0aa32697752 Signed-off-by: Vikash Garodia --- driver/vidc/src/msm_vidc_power.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/driver/vidc/src/msm_vidc_power.c b/driver/vidc/src/msm_vidc_power.c index c86b67e649..8ac2408e00 100644 --- a/driver/vidc/src/msm_vidc_power.c +++ b/driver/vidc/src/msm_vidc_power.c @@ -175,7 +175,7 @@ static int msm_vidc_set_buses(struct msm_vidc_inst* inst) if (!is_realtime_session(inst)) { temp->power.ddr_bw = core->platform->data.bus_bw_nrt[0]; - temp->power.sys_cache_bw = 0; + temp->power.sys_cache_bw = core->platform->data.bus_bw_nrt[0]; } total_bw_ddr += temp->power.ddr_bw; From 6791a8119707a86034b49cd7ec9e8ed00a3e8a69 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Fri, 9 Apr 2021 11:20:52 +0530 Subject: [PATCH 0230/1061] video: driver: refine max_host_buffer count logic - added max_host_buffer_count for decoder input & output. - increased buffer count for image_session & encode batching case. Change-Id: I4edf1c3a0953e38d6f84f554ab78e624d39a7306 Signed-off-by: Govindaraj Rajagopal --- driver/vidc/inc/msm_vidc_internal.h | 5 ++--- driver/vidc/src/msm_vdec.c | 30 +++++++++++++++++++++++++++++ driver/vidc/src/msm_venc.c | 11 +++-------- 3 files changed, 35 insertions(+), 11 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 24a53dc730..faec7726d0 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -43,9 +43,8 @@ #define MAX_CAP_CHILDREN 16 #define DEFAULT_BITSTREM_ALIGNMENT 16 #define H265_BITSTREM_ALIGNMENT 32 -#define DEFAULT_MAX_HOST_ENC_BUF_COUNT 64 -#define DEFAULT_MAX_HOST_DEC_BUF_COUNT 64 -#define DEFAULT_MAX_HOST_ENC_SUPER_BUF_COUNT 256 +#define DEFAULT_MAX_HOST_BUF_COUNT 64 +#define DEFAULT_MAX_HOST_BURST_BUF_COUNT 256 #define BIT_DEPTH_8 (8 << 16 | 8) #define BIT_DEPTH_10 (10 << 16 | 10) #define CODED_FRAMES_PROGRESSIVE 0x0 diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index c1c654c5d5..10c007d243 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -739,6 +739,28 @@ static int msm_vdec_set_conceal_color_10bit(struct msm_vidc_inst *inst, return rc; } +static int msm_vdec_set_host_max_buf_count(struct msm_vidc_inst *inst, + enum msm_vidc_port_type port) +{ + int rc = 0; + u32 count = DEFAULT_MAX_HOST_BUF_COUNT; + + if (is_image_session(inst)) + count = DEFAULT_MAX_HOST_BURST_BUF_COUNT; + + i_vpr_h(inst, "%s: count: %u port: %u\n", __func__, count, port); + rc = venus_hfi_session_property(inst, + HFI_PROP_BUFFER_HOST_MAX_COUNT, + HFI_HOST_FLAGS_NONE, + get_hfi_port(inst, port), + HFI_PAYLOAD_U32, + &count, + sizeof(u32)); + if (rc) + return rc; + return 0; +} + static int msm_vdec_set_input_properties(struct msm_vidc_inst *inst) { int rc = 0; @@ -772,6 +794,10 @@ static int msm_vdec_set_input_properties(struct msm_vidc_inst *inst) if (rc) return rc; + rc = msm_vdec_set_host_max_buf_count(inst, INPUT_PORT); + if (rc) + return rc; + return rc; } @@ -800,6 +826,10 @@ static int msm_vdec_set_output_properties(struct msm_vidc_inst *inst) if (rc) return rc; + rc = msm_vdec_set_host_max_buf_count(inst, OUTPUT_PORT); + if (rc) + return rc; + return rc; } diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index 5ce16e41bf..4ad5330cb1 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -269,15 +269,10 @@ static int msm_venc_set_host_max_buf_count(struct msm_vidc_inst *inst, enum msm_vidc_port_type port) { int rc = 0; - u32 count = DEFAULT_MAX_HOST_ENC_BUF_COUNT; + u32 count = DEFAULT_MAX_HOST_BUF_COUNT; - if (port != INPUT_PORT && port != OUTPUT_PORT) { - i_vpr_e(inst, "%s: invalid port %d\n", __func__, port); - return -EINVAL; - } - - if (msm_vidc_is_super_buffer(inst)) - count = DEFAULT_MAX_HOST_ENC_SUPER_BUF_COUNT; + if (msm_vidc_is_super_buffer(inst) || is_image_session(inst)) + count = DEFAULT_MAX_HOST_BURST_BUF_COUNT; i_vpr_h(inst, "%s: count: %u port: %u\n", __func__, count, port); rc = venus_hfi_session_property(inst, From 58ce6211a70b466e55ca61620a52c5749695157f Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Fri, 9 Apr 2021 11:38:25 +0530 Subject: [PATCH 0231/1061] video: driver: fix buffer tracking logic at reverse path fw sent FBD with RO and host didn't requeue same buffer again, but firmware still holds RO reference. In that case, if stop cmd issued at output port, firmware will FBD once again w/o RO. So at that time wrong buffer will be picked from list, if tracking is based on index. To handle that special case, for decoder alone using device addr & data_offset for identifying the node in reverse path. Change-Id: I3d8cb0b4b100fd44be30e576ae602950650747a4 Signed-off-by: Govindaraj Rajagopal --- driver/vidc/src/venus_hfi_response.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index 76aaeb83fa..6b045944a7 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -613,10 +613,14 @@ static int handle_output_buffer(struct msm_vidc_inst *inst, found = false; list_for_each_entry(buf, &buffers->list, list) { - if (buf->index == buffer->index) { - found = true; + if (is_decode_session(inst)) + found = (buf->device_addr == buffer->base_address && + buf->data_offset == buffer->data_offset); + else + found = (buf->index == buffer->index); + + if (found) break; - } } if (!found) { i_vpr_e(inst, "%s: invalid idx %d daddr %#x data_offset %d\n", From 29f8295bae405fa8cc8c047bf8002475bf1237d0 Mon Sep 17 00:00:00 2001 From: Chinmay Sawarkar Date: Tue, 6 Apr 2021 22:13:03 -0700 Subject: [PATCH 0232/1061] video: driver: Fix buffer type and region mapping Fixed incorrect mapping and restructured code for readability. Change-Id: Iaef5e780d168883ff2cc7b243b1bf3aa094e3df2 Signed-off-by: Chinmay Sawarkar --- driver/vidc/src/msm_vidc_driver.c | 31 +++++++++++++++++++------------ 1 file changed, 19 insertions(+), 12 deletions(-) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index fcbed50f31..a9b4d8ab7f 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -835,17 +835,27 @@ u32 msm_vidc_get_buffer_region(struct msm_vidc_inst *inst, region = MSM_VIDC_NON_SECURE; break; case MSM_VIDC_BUF_OUTPUT: - if (is_decode_session(inst)) - region = MSM_VIDC_NON_SECURE_PIXEL; - else + if (is_encode_session(inst)) region = MSM_VIDC_NON_SECURE; + else + region = MSM_VIDC_NON_SECURE_PIXEL; break; case MSM_VIDC_BUF_DPB: region = MSM_VIDC_NON_SECURE_PIXEL; break; - default: + case MSM_VIDC_BUF_INPUT_META: + case MSM_VIDC_BUF_OUTPUT_META: + case MSM_VIDC_BUF_BIN: + case MSM_VIDC_BUF_COMV: + case MSM_VIDC_BUF_NON_COMV: + case MSM_VIDC_BUF_LINE: + case MSM_VIDC_BUF_PERSIST: + case MSM_VIDC_BUF_VPSS: region = MSM_VIDC_NON_SECURE; break; + default: + i_vpr_e(inst, "%s: invalid driver buffer type %d\n", + func, buffer_type); } } else { switch (buffer_type) { @@ -865,19 +875,16 @@ u32 msm_vidc_get_buffer_region(struct msm_vidc_inst *inst, case MSM_VIDC_BUF_OUTPUT_META: region = MSM_VIDC_NON_SECURE; break; - case MSM_VIDC_BUF_BIN: - region = MSM_VIDC_SECURE_BITSTREAM; + case MSM_VIDC_BUF_DPB: + case MSM_VIDC_BUF_VPSS: + region = MSM_VIDC_SECURE_PIXEL; break; + case MSM_VIDC_BUF_BIN: + case MSM_VIDC_BUF_ARP: case MSM_VIDC_BUF_COMV: case MSM_VIDC_BUF_NON_COMV: case MSM_VIDC_BUF_LINE: - region = MSM_VIDC_SECURE_NONPIXEL; - break; - case MSM_VIDC_BUF_DPB: - region = MSM_VIDC_SECURE_PIXEL; - break; case MSM_VIDC_BUF_PERSIST: - case MSM_VIDC_BUF_ARP: region = MSM_VIDC_SECURE_NONPIXEL; break; default: From 23605ffffb2f198394d487a92d6d7777fda24ebd Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Fri, 2 Apr 2021 16:50:52 -0700 Subject: [PATCH 0233/1061] video: driver: handle dpb list property - subscribe for dpb list property in combined mode on output port. - copy dpb list property payload from fw to static array. - using this array, mark read_only list buffers as non-reference if not part of array. if count of such buffers is greater than output min count, send to fw for release. - once fw returns them, destroy these buffers. - unmap stale output mappings due to lazy unmap feature. - unify release internal functions into common function. Change-Id: Id32f04efb19eecaff453cc4383ee8296a0246263 Signed-off-by: Darshana Patil --- driver/platform/waipio/src/msm_vidc_waipio.c | 9 + driver/vidc/inc/msm_vdec.h | 2 + driver/vidc/inc/msm_vidc_driver.h | 3 + driver/vidc/inc/msm_vidc_inst.h | 3 +- driver/vidc/inc/msm_vidc_internal.h | 18 + driver/vidc/src/msm_vdec.c | 175 +++++++- driver/vidc/src/msm_vidc.c | 1 + driver/vidc/src/msm_vidc_driver.c | 65 +++ driver/vidc/src/venus_hfi.c | 9 +- driver/vidc/src/venus_hfi_response.c | 447 ++++++++----------- 10 files changed, 450 insertions(+), 282 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 6893685fc7..ba2253867c 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -1168,6 +1168,15 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_CID_MPEG_VIDC_ENC_INPUT_COMPRESSION_RATIO, 0, CAP_FLAG_DYNAMIC_ALLOWED}, + {DPB_LIST, DEC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, + HFI_PROP_DPB_LIST, + CAP_FLAG_OUTPUT_PORT, + {0}, {0}, + NULL, NULL}, + {META_LTR_MARK_USE, ENC, H264|HEVC, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, diff --git a/driver/vidc/inc/msm_vdec.h b/driver/vidc/inc/msm_vdec.h index 0926cf1e23..7b2c724907 100644 --- a/driver/vidc/inc/msm_vdec.h +++ b/driver/vidc/inc/msm_vdec.h @@ -30,5 +30,7 @@ int msm_vdec_input_port_settings_change(struct msm_vidc_inst *inst); int msm_vdec_output_port_settings_change(struct msm_vidc_inst *inst); int msm_vdec_process_cmd(struct msm_vidc_inst *inst, u32 cmd); int msm_vidc_queue_buffer_batch(struct msm_vidc_inst *inst); +int msm_vdec_handle_release_buffer(struct msm_vidc_inst *inst, + struct msm_vidc_buffer *buf); #endif // _MSM_VDEC_H_ diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 45e699cd56..4da4fe70f7 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -332,6 +332,9 @@ void put_inst(struct msm_vidc_inst *inst); bool msm_vidc_allow_s_fmt(struct msm_vidc_inst *inst, u32 type); bool msm_vidc_allow_s_ctrl(struct msm_vidc_inst *inst, u32 id); bool msm_vidc_allow_metadata(struct msm_vidc_inst *inst, u32 cap_id); +bool msm_vidc_allow_property(struct msm_vidc_inst *inst, u32 hfi_id); +int msm_vidc_update_property_cap(struct msm_vidc_inst *inst, u32 hfi_id, + bool allow); bool msm_vidc_allow_reqbufs(struct msm_vidc_inst *inst, u32 type); enum msm_vidc_allow msm_vidc_allow_stop(struct msm_vidc_inst *inst); bool msm_vidc_allow_start(struct msm_vidc_inst *inst); diff --git a/driver/vidc/inc/msm_vidc_inst.h b/driver/vidc/inc/msm_vidc_inst.h index c62fe592c5..9304c61d44 100644 --- a/driver/vidc/inc/msm_vidc_inst.h +++ b/driver/vidc/inc/msm_vidc_inst.h @@ -63,6 +63,7 @@ struct msm_vidc_buffers_info { struct msm_vidc_buffers input; struct msm_vidc_buffers output; struct msm_vidc_buffers read_only; + struct msm_vidc_buffers release; struct msm_vidc_buffers input_meta; struct msm_vidc_buffers output_meta; struct msm_vidc_buffers bin; @@ -149,6 +150,6 @@ struct msm_vidc_inst { u64 last_qbuf_time_ns; bool vb2q_init; u32 max_input_data_size; + u32 dpb_list_payload[MAX_DPB_LIST_ARRAY_SIZE]; }; - #endif // _MSM_VIDC_INST_H_ diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 4250c32d5e..77d06f386c 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -111,6 +111,23 @@ #define HW_RESPONSE_TIMEOUT_VALUE (1000) #define SW_PC_DELAY_VALUE (HW_RESPONSE_TIMEOUT_VALUE + 500) #define FW_UNLOAD_DELAY_VALUE (SW_PC_DELAY_VALUE + 1500) +/* + * MAX_MAPPED_OUTPUT_COUNT: maximum mappings which can + * be present in output map list with refcount 1. These + * mappings exist due to lazy unmap feature. Current + * threshold is kept as 50 to handle vpp usecases + * which might have many output buffers. + */ +#define MAX_MAPPED_OUTPUT_COUNT 50 + /* + * max dpb count = 16 + * each dpb: 4 words - + * dpb list array size = 16 * 4 + * dpb payload size = 16 * 4 * 4 + */ +#define MAX_DPB_COUNT 16 +#define MAX_DPB_LIST_ARRAY_SIZE (MAX_DPB_COUNT * 4) +#define MAX_DPB_LIST_PAYLOAD_SIZE (MAX_DPB_COUNT * 4 * 4) enum msm_vidc_domain_type { MSM_VIDC_ENCODER = BIT(0), @@ -420,6 +437,7 @@ enum msm_vidc_inst_capability_type { SEQ_CHANGE_AT_SYNC_FRAME, PRIORITY, ENC_IP_CR, + DPB_LIST, META_LTR_MARK_USE, META_DPB_MISR, META_OPB_MISR, diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 10c007d243..0d481e02c0 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -17,6 +17,7 @@ #include "msm_vidc_debug.h" #include "msm_vidc_power.h" #include "msm_vidc_control.h" +#include "msm_vidc_memory.h" #include "venus_hfi.h" #include "hfi_packet.h" /* TODO: update based on clips */ @@ -63,6 +64,7 @@ static const u32 msm_vdec_output_subscribe_for_properties[] = { HFI_PROP_WORST_COMPRESSION_RATIO, HFI_PROP_WORST_COMPLEXITY_FACTOR, HFI_PROP_PICTURE_TYPE, + HFI_PROP_DPB_LIST, }; static const u32 msm_vdec_internal_buffer_type[] = { @@ -1021,8 +1023,8 @@ static int msm_vdec_subscribe_property(struct msm_vidc_inst *inst, int rc = 0; struct msm_vidc_core *core; u32 payload[32] = {0}; - u32 i; - u32 payload_size = 0; + u32 i, count = 0; + bool allow = false; if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); @@ -1034,15 +1036,21 @@ static int msm_vdec_subscribe_property(struct msm_vidc_inst *inst, payload[0] = HFI_MODE_PROPERTY; if (port == INPUT_PORT) { - for (i = 0; i < ARRAY_SIZE(msm_vdec_input_subscribe_for_properties); i++) - payload[i + 1] = msm_vdec_input_subscribe_for_properties[i]; - payload_size = (ARRAY_SIZE(msm_vdec_input_subscribe_for_properties) + 1) * - sizeof(u32); + for (i = 0; i < ARRAY_SIZE(msm_vdec_input_subscribe_for_properties); i++) { + payload[count + 1] = msm_vdec_input_subscribe_for_properties[i]; + count++; + } } else if (port == OUTPUT_PORT) { - for (i = 0; i < ARRAY_SIZE(msm_vdec_output_subscribe_for_properties); i++) - payload[i + 1] = msm_vdec_output_subscribe_for_properties[i]; - payload_size = (ARRAY_SIZE(msm_vdec_output_subscribe_for_properties) + 1) * - sizeof(u32); + for (i = 0; i < ARRAY_SIZE(msm_vdec_output_subscribe_for_properties); i++) { + allow = msm_vidc_allow_property(inst, + msm_vdec_output_subscribe_for_properties[i]); + if (allow) { + payload[count + 1] = msm_vdec_output_subscribe_for_properties[i]; + count++; + } + msm_vidc_update_property_cap(inst, + msm_vdec_output_subscribe_for_properties[i], allow); + } } else { i_vpr_e(inst, "%s: invalid port: %d\n", __func__, port); return -EINVAL; @@ -1053,7 +1061,7 @@ static int msm_vdec_subscribe_property(struct msm_vidc_inst *inst, port, HFI_PAYLOAD_U32_ARRAY, &payload[0], - payload_size); + (count + 1) * sizeof(u32)); return rc; } @@ -1780,15 +1788,158 @@ static int msm_vdec_qbuf_batch(struct msm_vidc_inst *inst, return rc; } +static int msm_vdec_release_nonref_buffers(struct msm_vidc_inst *inst) +{ + int rc = 0; + u32 fw_ro_count = 0, nonref_ro_count = 0; + struct msm_vidc_buffer *ro_buf, *rel_buf, *dummy; + int i = 0; + bool found = false; + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + /* count num buffers in read_only list */ + list_for_each_entry(ro_buf, &inst->buffers.read_only.list, list) + fw_ro_count++; + + if (fw_ro_count <= MAX_DPB_COUNT) + return 0; + + /* + * Mark those buffers present in read_only list as non-reference + * if that buffer is not part of dpb_list_payload + * count such non-ref read only buffers as nonref_ro_count + * dpb_list_payload details: + * payload[0-1] : 64 bits base_address of DPB-1 + * payload[2] : 32 bits addr_offset of DPB-1 + * payload[3] : 32 bits data_offset of DPB-1 + */ + list_for_each_entry(ro_buf, &inst->buffers.read_only.list, list) { + found = false; + for (i = 0; (i + 3) < MAX_DPB_LIST_ARRAY_SIZE; i = i + 4) { + if (ro_buf->device_addr == inst->dpb_list_payload[i] && + ro_buf->data_offset == inst->dpb_list_payload[i + 3]) { + found = true; + break; + } + } + if (!found) { + ro_buf->attr &= ~MSM_VIDC_ATTR_READ_ONLY; + nonref_ro_count++; + } + } + + if (nonref_ro_count <= inst->buffers.output.min_count) + return 0; + + i_vpr_l(inst, "%s: fw ro buf count %d, non-ref ro count %d\n", + __func__, fw_ro_count, nonref_ro_count); + /* + * move non-ref read only buffers from read_only list to + * release list + */ + list_for_each_entry_safe(ro_buf, dummy, &inst->buffers.read_only.list, list) { + if (!(ro_buf->attr & MSM_VIDC_ATTR_READ_ONLY)) { + list_del(&ro_buf->list); + INIT_LIST_HEAD(&ro_buf->list); + list_add_tail(&ro_buf->list, &inst->buffers.release.list); + } + } + + /* send release flag along with read only flag for release list bufs*/ + list_for_each_entry(rel_buf, &inst->buffers.release.list, list) { + /* fw needs RO flag for FTB release buffer */ + rel_buf->attr |= MSM_VIDC_ATTR_READ_ONLY; + print_vidc_buffer(VIDC_HIGH, "high", "release buf", inst, rel_buf); + rc = venus_hfi_release_buffer(inst, rel_buf); + if (rc) + return rc; + } + + return rc; +} + +int msm_vdec_handle_release_buffer(struct msm_vidc_inst *inst, + struct msm_vidc_buffer *buf) +{ + int rc = 0; + + if (!inst || !buf) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + print_vidc_buffer(VIDC_HIGH, "high", "release done", inst, buf); + msm_vidc_unmap_driver_buf(inst, buf); + + /* delete the buffer from release list */ + list_del(&buf->list); + msm_vidc_put_vidc_buffer(inst, buf); + + return rc; +} + +static int msm_vidc_unmap_excessive_mappings(struct msm_vidc_inst *inst) +{ + int rc = 0; + struct msm_vidc_map *map; + u32 refcount_one_bufs_count = 0; + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + /* + * count entries from map list whose refcount is 1 + * these are excess mappings present due to lazy + * unmap feature. + */ + list_for_each_entry(map, &inst->mappings.output.list, list) { + if (map->refcount == 1) + refcount_one_bufs_count++; + } + + if (refcount_one_bufs_count <= MAX_MAPPED_OUTPUT_COUNT) + return 0; + + /* unmap these buffers as they are stale entries */ + list_for_each_entry(map, &inst->mappings.output.list, list) { + if (map->refcount == 1) { + d_vpr_h( + "%s: type %11s, device_addr %#x, refcount %d, region %d\n", + __func__, buf_name(map->type), map->device_addr, map->refcount, + map->region); + msm_vidc_memory_unmap(inst->core, map); + } + } + return rc; +} + int msm_vdec_qbuf(struct msm_vidc_inst *inst, struct vb2_buffer *vb2) { int rc = 0; - if (!inst || !vb2) { + if (!inst || !vb2 || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } + if (vb2->type == OUTPUT_MPLANE) { + if (inst->capabilities->cap[DPB_LIST].value) { + rc = msm_vdec_release_nonref_buffers(inst); + if (rc) + return rc; + } + + rc = msm_vidc_unmap_excessive_mappings(inst); + if (rc) + return rc; + } + /* batch decoder output & meta buffer only */ if (inst->decode_batch.enable && vb2->type == OUTPUT_MPLANE) rc = msm_vdec_qbuf_batch(inst, vb2); diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index ecdd22c150..342bd71fe8 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -824,6 +824,7 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) INIT_LIST_HEAD(&inst->buffers.output.list); INIT_LIST_HEAD(&inst->buffers.output_meta.list); INIT_LIST_HEAD(&inst->buffers.read_only.list); + INIT_LIST_HEAD(&inst->buffers.release.list); INIT_LIST_HEAD(&inst->buffers.bin.list); INIT_LIST_HEAD(&inst->buffers.arp.list); INIT_LIST_HEAD(&inst->buffers.comv.list); diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index e3f740b2ce..9b9798aec3 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -159,6 +159,7 @@ static const struct msm_vidc_cap_name cap_name_arr[] = { {SEQ_CHANGE_AT_SYNC_FRAME, "SEQ_CHANGE_AT_SYNC_FRAME" }, {PRIORITY, "PRIORITY" }, {ENC_IP_CR, "ENC_IP_CR" }, + {DPB_LIST, "DPB_LIST" }, {META_LTR_MARK_USE, "META_LTR_MARK_USE" }, {META_DPB_MISR, "META_DPB_MISR" }, {META_OPB_MISR, "META_OPB_MISR" }, @@ -1174,6 +1175,64 @@ bool msm_vidc_allow_metadata(struct msm_vidc_inst *inst, u32 cap_id) return is_allowed; } +bool msm_vidc_allow_property(struct msm_vidc_inst *inst, u32 hfi_id) +{ + bool is_allowed = true; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return false; + } + + switch (hfi_id) { + case HFI_PROP_WORST_COMPRESSION_RATIO: + case HFI_PROP_WORST_COMPLEXITY_FACTOR: + case HFI_PROP_PICTURE_TYPE: + is_allowed = true; + break; + case HFI_PROP_DPB_LIST: + if (!is_ubwc_colorformat(inst->capabilities->cap[PIX_FMTS].value)) { + i_vpr_h(inst, + "%s: cap: %24s not allowed for split mode\n", + __func__, cap_name(DPB_LIST)); + is_allowed = false; + } + break; + default: + is_allowed = true; + break; + } + + return is_allowed; +} + +int msm_vidc_update_property_cap(struct msm_vidc_inst *inst, u32 hfi_id, + bool allow) +{ + int rc = 0; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + switch (hfi_id) { + case HFI_PROP_WORST_COMPRESSION_RATIO: + case HFI_PROP_WORST_COMPLEXITY_FACTOR: + case HFI_PROP_PICTURE_TYPE: + break; + case HFI_PROP_DPB_LIST: + if (!allow) + memset(inst->dpb_list_payload, 0, MAX_DPB_LIST_ARRAY_SIZE); + msm_vidc_update_cap_value(inst, DPB_LIST, allow, __func__); + break; + default: + break; + } + + return rc; +} + bool msm_vidc_allow_reqbufs(struct msm_vidc_inst *inst, u32 type) { bool allow = false; @@ -4119,6 +4178,12 @@ void msm_vidc_destroy_buffers(struct msm_vidc_inst *inst) msm_vidc_put_vidc_buffer(inst, buf); } + list_for_each_entry_safe(buf, dummy, &inst->buffers.release.list, list) { + print_vidc_buffer(VIDC_ERR, "err", "destroying release buffer", inst, buf); + list_del(&buf->list); + msm_vidc_put_vidc_buffer(inst, buf); + } + /* destroy buffers from pool */ msm_vidc_destroy_vidc_buffer(inst); msm_vidc_destroy_alloc_buffer(inst); diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index 2dfb27fa4c..ce6fb1a6b2 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -3440,18 +3440,11 @@ int venus_hfi_release_buffer(struct msm_vidc_inst *inst, goto unlock; } - if (!is_internal_buffer(buffer->type)) { - i_vpr_e(inst, "release not allowed for buffer_type %s\n", - buf_name(buffer->type)); - goto unlock; - } - core = inst->core; - rc = get_hfi_buffer(inst, buffer, &hfi_buffer); if (rc) goto unlock; - /* add pending release flag */ + /* add release flag */ hfi_buffer.flags |= HFI_BUF_HOST_FLAG_RELEASE; rc = hfi_create_header(inst->packet, inst->packet_size, diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index 6b045944a7..d2c10840f3 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -482,7 +482,55 @@ static int get_driver_buffer_flags(struct msm_vidc_inst *inst, u32 hfi_flags) } static int handle_read_only_buffer(struct msm_vidc_inst *inst, - struct msm_vidc_buffer *buffer) + struct msm_vidc_buffer *buf) +{ + struct msm_vidc_buffer *ro_buf; + struct msm_vidc_buffers *ro_buffers; + bool found = false; + + if (!inst || !buf) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (!is_decode_session(inst) || !is_output_buffer(buf->type)) + return 0; + + if (!(buf->attr & MSM_VIDC_ATTR_READ_ONLY)) + return 0; + + ro_buffers = msm_vidc_get_buffers(inst, MSM_VIDC_BUF_READ_ONLY, __func__); + if (!ro_buffers) + return -EINVAL; + + list_for_each_entry(ro_buf, &ro_buffers->list, list) { + if (ro_buf->device_addr == buf->device_addr) { + found = true; + break; + } + } + /* + * RO flag: add to read_only list if buffer is not present + * if present, do nothing + */ + if (!found) { + ro_buf = msm_vidc_get_vidc_buffer(inst); + if (!ro_buf) { + i_vpr_e(inst, "%s: buffer alloc failed\n", __func__); + return -ENOMEM; + } + memcpy(ro_buf, buf, sizeof(struct msm_vidc_buffer)); + INIT_LIST_HEAD(&ro_buf->list); + list_add_tail(&ro_buf->list, &ro_buffers->list); + print_vidc_buffer(VIDC_LOW, "low", "ro buf added", inst, ro_buf); + } + ro_buf->attr |= MSM_VIDC_ATTR_READ_ONLY; + + return 0; +} + +static int handle_non_read_only_buffer(struct msm_vidc_inst *inst, + struct hfi_buffer *buffer) { struct msm_vidc_buffer *ro_buf; struct msm_vidc_buffers *ro_buffers; @@ -493,7 +541,10 @@ static int handle_read_only_buffer(struct msm_vidc_inst *inst, return -EINVAL; } - if (!is_decode_session(inst) || !is_output_buffer(buffer->type)) + if (!is_decode_session(inst) || buffer->type != HFI_BUFFER_RAW) + return 0; + + if (buffer->flags & HFI_BUF_FW_FLAG_READONLY) return 0; ro_buffers = msm_vidc_get_buffers(inst, MSM_VIDC_BUF_READ_ONLY, __func__); @@ -501,36 +552,20 @@ static int handle_read_only_buffer(struct msm_vidc_inst *inst, return -EINVAL; list_for_each_entry(ro_buf, &ro_buffers->list, list) { - if (ro_buf->device_addr == buffer->device_addr) { + if (ro_buf->device_addr == buffer->base_address) { found = true; break; } } /* - * RO flag: add to read_only list if buffer is not present - * if present, do nothing * Without RO flag: remove buffer from read_only list if present * if not present, do not error out */ - if (buffer->attr & MSM_VIDC_ATTR_READ_ONLY) { - if (!found) { - ro_buf = msm_vidc_get_vidc_buffer(inst); - if (!ro_buf) { - i_vpr_e(inst, "%s: buffer alloc failed\n", __func__); - return -ENOMEM; - } - memcpy(ro_buf, buffer, sizeof(struct msm_vidc_buffer)); - INIT_LIST_HEAD(&ro_buf->list); - list_add_tail(&ro_buf->list, &ro_buffers->list); - print_vidc_buffer(VIDC_LOW, "low", "ro buf added", inst, ro_buf); - } - } else { - if (found) { - print_vidc_buffer(VIDC_LOW, "low", "ro buf deleted", inst, ro_buf); - list_del(&ro_buf->list); - msm_vidc_put_vidc_buffer(inst, ro_buf); - } + if (found) { + print_vidc_buffer(VIDC_LOW, "low", "ro buf deleted", inst, ro_buf); + list_del(&ro_buf->list); + msm_vidc_put_vidc_buffer(inst, ro_buf); } return 0; @@ -607,6 +642,19 @@ static int handle_output_buffer(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buf; bool found, fatal = false; + if (!inst || !inst->capabilities) { + d_vpr_e("%s: Invalid params\n", __func__); + return -EINVAL; + } + + if (is_decode_session(inst)) { + if (!(buffer->flags & HFI_BUF_FW_FLAG_READONLY)) { + rc = handle_non_read_only_buffer(inst, buffer); + if (rc) + msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); + } + } + buffers = msm_vidc_get_buffers(inst, MSM_VIDC_BUF_OUTPUT, __func__); if (!buffers) return -EINVAL; @@ -622,12 +670,9 @@ static int handle_output_buffer(struct msm_vidc_inst *inst, if (found) break; } - if (!found) { - i_vpr_e(inst, "%s: invalid idx %d daddr %#x data_offset %d\n", - __func__, buffer->index, buffer->base_address, - buffer->data_offset); - return -EINVAL; - } + if (!found) + return 0; + buf->data_offset = buffer->data_offset; buf->data_size = buffer->data_size; buf->timestamp = buffer->timestamp; @@ -678,13 +723,22 @@ static int handle_output_buffer(struct msm_vidc_inst *inst, } if (is_decode_session(inst)) { - if (buffer->flags & HFI_BUF_FW_FLAG_READONLY) + /* RO flag is not expected for linear colorformat */ + if (is_linear_colorformat(inst->capabilities->cap[PIX_FMTS].value) && + (buffer->flags & HFI_BUF_FW_FLAG_READONLY)) { + buffer->flags &= ~HFI_BUF_FW_FLAG_READONLY; + print_vidc_buffer( + VIDC_HIGH, "err", "RO flag in linear colorformat", inst, buf); + } + + if (buffer->flags & HFI_BUF_FW_FLAG_READONLY) { buf->attr |= MSM_VIDC_ATTR_READ_ONLY; - else + rc = handle_read_only_buffer(inst, buf); + if (rc) + msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); + } else { buf->attr &= ~MSM_VIDC_ATTR_READ_ONLY; - rc = handle_read_only_buffer(inst, buf); - if (rc) - return rc; + } } buf->flags = 0; @@ -832,8 +886,7 @@ static int handle_dequeue_buffers(struct msm_vidc_inst* inst) return rc; } -/* todo: remove below funcs once fw supports rel done flag for internl buf*/ -static int handle_dpb_buffer(struct msm_vidc_inst *inst, +static int handle_release_internal_buffer(struct msm_vidc_inst *inst, struct hfi_buffer *buffer) { int rc = 0; @@ -841,211 +894,8 @@ static int handle_dpb_buffer(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buf; bool found; - buffers = msm_vidc_get_buffers(inst, MSM_VIDC_BUF_DPB, __func__); - if (!buffers) - return -EINVAL; - - found = false; - list_for_each_entry(buf, &buffers->list, list) { - if (buf->device_addr == buffer->base_address) { - found = true; - break; - } - } - if (found) { - rc = msm_vidc_destroy_internal_buffer(inst, buf); - } else { - i_vpr_e(inst, "%s: invalid idx %d daddr %#x\n", - __func__, buffer->index, buffer->base_address); - return -EINVAL; - } - return rc; -} - -static int handle_persist_buffer(struct msm_vidc_inst *inst, - struct hfi_buffer *buffer) -{ - int rc = 0; - struct msm_vidc_buffers *buffers; - struct msm_vidc_buffer *buf; - bool found; - - buffers = msm_vidc_get_buffers(inst, MSM_VIDC_BUF_PERSIST, __func__); - if (!buffers) - return -EINVAL; - - found = false; - list_for_each_entry(buf, &buffers->list, list) { - if (buf->device_addr == buffer->base_address) { - found = true; - break; - } - } - if (found) { - rc = msm_vidc_destroy_internal_buffer(inst, buf); - } else { - i_vpr_e(inst, "%s: invalid idx %d daddr %#x\n", - __func__, buffer->index, buffer->base_address); - return -EINVAL; - } - return rc; -} - -static int handle_line_buffer(struct msm_vidc_inst *inst, - struct hfi_buffer *buffer) -{ - int rc = 0; - struct msm_vidc_buffers *buffers; - struct msm_vidc_buffer *buf; - bool found; - - buffers = msm_vidc_get_buffers(inst, MSM_VIDC_BUF_LINE, __func__); - if (!buffers) - return -EINVAL; - - found = false; - list_for_each_entry(buf, &buffers->list, list) { - if (buf->device_addr == buffer->base_address) { - found = true; - break; - } - } - if (found) { - rc = msm_vidc_destroy_internal_buffer(inst, buf); - } else { - i_vpr_e(inst, "%s: invalid idx %d daddr %#x\n", - __func__, buffer->index, buffer->base_address); - return -EINVAL; - } - return rc; -} - -static int handle_non_comv_buffer(struct msm_vidc_inst *inst, - struct hfi_buffer *buffer) -{ - int rc = 0; - struct msm_vidc_buffers *buffers; - struct msm_vidc_buffer *buf; - bool found; - - buffers = msm_vidc_get_buffers(inst, MSM_VIDC_BUF_NON_COMV, __func__); - if (!buffers) - return -EINVAL; - - found = false; - list_for_each_entry(buf, &buffers->list, list) { - if (buf->device_addr == buffer->base_address) { - found = true; - break; - } - } - if (found) { - rc = msm_vidc_destroy_internal_buffer(inst, buf); - } else { - i_vpr_e(inst, "%s: invalid idx %d daddr %#x\n", - __func__, buffer->index, buffer->base_address); - return -EINVAL; - } - return rc; -} - -static int handle_comv_buffer(struct msm_vidc_inst *inst, - struct hfi_buffer *buffer) -{ - int rc = 0; - struct msm_vidc_buffers *buffers; - struct msm_vidc_buffer *buf; - bool found; - - buffers = msm_vidc_get_buffers(inst, MSM_VIDC_BUF_COMV, __func__); - if (!buffers) - return -EINVAL; - - found = false; - list_for_each_entry(buf, &buffers->list, list) { - if (buf->device_addr == buffer->base_address) { - found = true; - break; - } - } - if (found) { - rc = msm_vidc_destroy_internal_buffer(inst, buf); - } else { - i_vpr_e(inst, "%s: invalid idx %d daddr %#x\n", - __func__, buffer->index, buffer->base_address); - return -EINVAL; - } - return rc; -} - -static int handle_bin_buffer(struct msm_vidc_inst *inst, - struct hfi_buffer *buffer) -{ - int rc = 0; - struct msm_vidc_buffers *buffers; - struct msm_vidc_buffer *buf; - bool found; - - buffers = msm_vidc_get_buffers(inst, MSM_VIDC_BUF_BIN, __func__); - if (!buffers) - return -EINVAL; - - found = false; - list_for_each_entry(buf, &buffers->list, list) { - if (buf->device_addr == buffer->base_address) { - found = true; - break; - } - } - if (found) { - rc = msm_vidc_destroy_internal_buffer(inst, buf); - } else { - i_vpr_e(inst, "%s: invalid idx %d daddr %#x\n", - __func__, buffer->index, buffer->base_address); - return -EINVAL; - } - return rc; -} - -static int handle_arp_buffer(struct msm_vidc_inst *inst, - struct hfi_buffer *buffer) -{ - int rc = 0; - struct msm_vidc_buffers *buffers; - struct msm_vidc_buffer *buf; - bool found; - - buffers = msm_vidc_get_buffers(inst, MSM_VIDC_BUF_ARP, __func__); - if (!buffers) - return -EINVAL; - - found = false; - list_for_each_entry(buf, &buffers->list, list) { - if (buf->device_addr == buffer->base_address) { - found = true; - break; - } - } - if (found) { - rc = msm_vidc_destroy_internal_buffer(inst, buf); - } else { - i_vpr_e(inst, "%s: invalid idx %d daddr %#x\n", - __func__, buffer->index, buffer->base_address); - return -EINVAL; - } - return rc; -} - -static int handle_release_buffer(struct msm_vidc_inst *inst, - struct hfi_buffer *buffer, enum hfi_packet_port_type port_type) -{ - int rc = 0; - struct msm_vidc_buffers *buffers; - struct msm_vidc_buffer *buf; - bool found; - buffers = msm_vidc_get_buffers(inst, hfi_buf_type_to_driver(inst->domain, - buffer->type, port_type), __func__); + buffer->type, HFI_PORT_NONE), __func__); if (!buffers) return -EINVAL; @@ -1056,15 +906,42 @@ static int handle_release_buffer(struct msm_vidc_inst *inst, break; } } + + if (!is_internal_buffer(buf->type)) + return 0; + + if (found) { + rc = msm_vidc_destroy_internal_buffer(inst, buf); + if (rc) + return rc; + } else { + i_vpr_e(inst, "%s: invalid idx %d daddr %#x\n", + __func__, buffer->index, buffer->base_address); + return -EINVAL; + } + return rc; +} + +static int handle_release_output_buffer(struct msm_vidc_inst *inst, + struct hfi_buffer *buffer, enum hfi_packet_port_type port_type) +{ + int rc = 0; + struct msm_vidc_buffer *buf; + bool found = false; + + list_for_each_entry(buf, &inst->buffers.release.list, list) { + if (buf->device_addr == buffer->base_address) { + found = true; + break; + } + } if (!found) { i_vpr_e(inst, "%s: invalid idx %d daddr %#x\n", __func__, buffer->index, buffer->base_address); return -EINVAL; } - if (is_internal_buffer(buf->type)) - rc = msm_vidc_destroy_internal_buffer(inst, buf); - else - rc = msm_vidc_put_driver_buf(inst, buf); + + rc = msm_vdec_handle_release_buffer(inst, buf); if (rc) return rc; @@ -1085,26 +962,26 @@ static int handle_session_buffer(struct msm_vidc_inst *inst, static const struct msm_vidc_hfi_buffer_handle enc_output_hfi_handle[] = { {HFI_BUFFER_METADATA, handle_output_metadata_buffer }, {HFI_BUFFER_BITSTREAM, handle_output_buffer }, - {HFI_BUFFER_BIN, handle_bin_buffer }, - {HFI_BUFFER_COMV, handle_comv_buffer }, - {HFI_BUFFER_NON_COMV, handle_non_comv_buffer }, - {HFI_BUFFER_LINE, handle_line_buffer }, - {HFI_BUFFER_ARP, handle_arp_buffer }, - {HFI_BUFFER_DPB, handle_dpb_buffer }, + {HFI_BUFFER_BIN, handle_release_internal_buffer }, + {HFI_BUFFER_COMV, handle_release_internal_buffer }, + {HFI_BUFFER_NON_COMV, handle_release_internal_buffer }, + {HFI_BUFFER_LINE, handle_release_internal_buffer }, + {HFI_BUFFER_ARP, handle_release_internal_buffer }, + {HFI_BUFFER_DPB, handle_release_internal_buffer }, }; static const struct msm_vidc_hfi_buffer_handle dec_input_hfi_handle[] = { {HFI_BUFFER_METADATA, handle_input_metadata_buffer }, {HFI_BUFFER_BITSTREAM, handle_input_buffer }, - {HFI_BUFFER_BIN, handle_bin_buffer }, - {HFI_BUFFER_COMV, handle_comv_buffer }, - {HFI_BUFFER_NON_COMV, handle_non_comv_buffer }, - {HFI_BUFFER_LINE, handle_line_buffer }, - {HFI_BUFFER_PERSIST, handle_persist_buffer }, + {HFI_BUFFER_BIN, handle_release_internal_buffer }, + {HFI_BUFFER_COMV, handle_release_internal_buffer }, + {HFI_BUFFER_NON_COMV, handle_release_internal_buffer }, + {HFI_BUFFER_LINE, handle_release_internal_buffer }, + {HFI_BUFFER_PERSIST, handle_release_internal_buffer }, }; static const struct msm_vidc_hfi_buffer_handle dec_output_hfi_handle[] = { {HFI_BUFFER_METADATA, handle_output_metadata_buffer }, {HFI_BUFFER_RAW, handle_output_buffer }, - {HFI_BUFFER_DPB, handle_dpb_buffer }, + {HFI_BUFFER_DPB, handle_release_internal_buffer }, }; if (pkt->flags & HFI_FW_FLAGS_SESSION_ERROR) { @@ -1129,8 +1006,9 @@ static int handle_session_buffer(struct msm_vidc_inst *inst, msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); return 0; } - if (buffer->flags & HFI_BUF_FW_FLAG_RELEASE_DONE) - return handle_release_buffer(inst, buffer, pkt->port); + if (is_decode_session(inst) && buffer->type == HFI_BUFFER_RAW && + buffer->flags & HFI_BUF_FW_FLAG_RELEASE_DONE) + return handle_release_output_buffer(inst, buffer, pkt->port); if (is_encode_session(inst)) { if (pkt->port == HFI_PORT_RAW) { @@ -1272,6 +1150,36 @@ static int handle_session_command(struct msm_vidc_inst *inst, return 0; } +static int handle_dpb_list_property(struct msm_vidc_inst *inst, + struct hfi_packet *pkt) +{ + u32 payload_size, num_words_in_payload; + u8 *payload_start; + int i = 0; + + payload_size = pkt->size - sizeof(struct hfi_packet); + num_words_in_payload = payload_size / 4; + payload_start = (u8 *)((u8 *)pkt + sizeof(struct hfi_packet)); + memset(inst->dpb_list_payload, 0, MAX_DPB_LIST_ARRAY_SIZE); + + if (payload_size > MAX_DPB_LIST_PAYLOAD_SIZE) { + i_vpr_e(inst, + "%s: dpb list payload size %d exceeds expected max size %d\n", + __func__, payload_size, MAX_DPB_LIST_PAYLOAD_SIZE); + msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); + } + memcpy(inst->dpb_list_payload, payload_start, payload_size); + + for (i = 0; (i + 3) < num_words_in_payload; i = i + 4) { + i_vpr_l(inst, + "%s: base addr %#x %#x, addr offset %#x, data offset %#x\n", + __func__, inst->dpb_list_payload[i], inst->dpb_list_payload[i + 1], + inst->dpb_list_payload[i + 2], inst->dpb_list_payload[i + 3]); + } + + return 0; +} + static int handle_session_property(struct msm_vidc_inst *inst, struct hfi_packet *pkt) { @@ -1279,6 +1187,11 @@ static int handle_session_property(struct msm_vidc_inst *inst, u32 port; u32 *payload_ptr; + if (!inst || !inst->capabilities) { + d_vpr_e("%s: Invalid params\n", __func__); + return -EINVAL; + } + i_vpr_l(inst, "%s: property type %#x\n", __func__, pkt->type); port = vidc_port_from_hfi(inst, pkt->port); @@ -1327,7 +1240,6 @@ static int handle_session_property(struct msm_vidc_inst *inst, break; case HFI_PROP_NO_OUTPUT: if (port != INPUT_PORT) { - rc = -EINVAL; i_vpr_e(inst, "%s: invalid port: %d for property %#x\n", __func__, pkt->port, pkt->type); @@ -1341,10 +1253,23 @@ static int handle_session_property(struct msm_vidc_inst *inst, case HFI_PROP_WORST_COMPLEXITY_FACTOR: inst->power.fw_cf = payload_ptr[0]; break; + case HFI_PROP_DPB_LIST: + if (is_decode_session(inst) && port == OUTPUT_PORT && + inst->capabilities->cap[DPB_LIST].value) { + rc = handle_dpb_list_property(inst, pkt); + if (rc) + break; + } else { + i_vpr_e(inst, + "%s: invalid property %#x for %s port %d dpb cap value %d\n", + __func__, is_decode_session(inst) ? "decode" : "encode", + port, inst->capabilities->cap[DPB_LIST].value); + } + break; default: - i_vpr_e(inst, "%s: invalid port settings property %#x\n", + i_vpr_e(inst, "%s: invalid property %#x\n", __func__, pkt->type); - return -EINVAL; + break; } return rc; From 1a9ffe6b327a2e1ee984f929a1b3f9806532745c Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Mon, 12 Apr 2021 17:53:32 -0700 Subject: [PATCH 0234/1061] video: driver: Add null pointer check for inst Check for null pointer for instance before deferencing the instance. Change-Id: I9236305dcde87e50732aa006a3a47a585bcf096b Signed-off-by: Akshata Sahukar --- driver/vidc/src/hfi_packet.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/driver/vidc/src/hfi_packet.c b/driver/vidc/src/hfi_packet.c index 3158764e71..ac0bfb5d49 100644 --- a/driver/vidc/src/hfi_packet.c +++ b/driver/vidc/src/hfi_packet.c @@ -15,6 +15,11 @@ u32 get_hfi_port(struct msm_vidc_inst *inst, { u32 hfi_port = HFI_PORT_NONE; + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return hfi_port; + } + if (is_decode_session(inst)) { switch(port) { case INPUT_PORT: @@ -58,6 +63,11 @@ u32 get_hfi_port_from_buffer_type(struct msm_vidc_inst *inst, { u32 hfi_port = HFI_PORT_NONE; + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return hfi_port; + } + if (is_decode_session(inst)) { switch(buffer_type) { case MSM_VIDC_BUF_INPUT: @@ -199,6 +209,11 @@ u32 hfi_buf_type_to_driver(enum msm_vidc_domain_type domain, u32 get_hfi_codec(struct msm_vidc_inst *inst) { + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return 0; + } + switch (inst->codec) { case MSM_VIDC_H264: if (inst->domain == MSM_VIDC_ENCODER) @@ -225,6 +240,11 @@ u32 get_hfi_colorformat(struct msm_vidc_inst *inst, { u32 hfi_colorformat = HFI_COLOR_FMT_NV12_UBWC; + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return hfi_colorformat; + } + switch(colorformat) { case MSM_VIDC_FMT_NV12: hfi_colorformat = HFI_COLOR_FMT_NV12; From a15a1ac976d0b8d0a2de7573f99b42cf7122557a Mon Sep 17 00:00:00 2001 From: Mihir Ganu Date: Mon, 12 Apr 2021 14:47:39 -0700 Subject: [PATCH 0235/1061] video: driver: Reduce log level for non-fatal logs Reduce the log level for non-fatal logs to avoid log flood. Change-Id: I170102d6ed457a1fb88dd8b81fc631eddc17a235 Signed-off-by: Mihir Ganu --- driver/vidc/src/msm_vidc.c | 2 +- driver/vidc/src/venus_hfi.c | 16 ---------------- 2 files changed, 1 insertion(+), 17 deletions(-) diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index 342bd71fe8..dd2427c0cf 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -488,7 +488,7 @@ int msm_vidc_dqbuf(void *instance, struct v4l2_buffer *b) if (rc == -EAGAIN) { goto unlock; } else if (rc) { - i_vpr_e(inst, "%s: failed with %d\n", __func__, rc); + i_vpr_l(inst, "%s: failed with %d\n", __func__, rc); goto unlock; } diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index 168a6b6237..b05c1f7976 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -1460,10 +1460,6 @@ void __disable_unprepare_clks(struct msm_vidc_core *core) clk_disable_unprepare(cl->clk); cl->prev = 0; - - if (__clk_is_enabled(cl->clk)) - d_vpr_e("%s: clock %s not disabled\n", - __func__, cl->name); } } @@ -1521,10 +1517,6 @@ static int __prepare_enable_clks(struct msm_vidc_core *core) __set_clk_rate(core, cl, clk_round_rate(cl->clk, 0)); - if (__clk_is_enabled(cl->clk)) - d_vpr_e("%s: clock %s already enabled\n", - __func__, cl->name); - rc = clk_prepare_enable(cl->clk); if (rc) { d_vpr_e("Failed to enable clocks\n"); @@ -1812,10 +1804,6 @@ static int __disable_regulator(struct regulator_info *rinfo, goto disable_regulator_failed; } - if (regulator_is_enabled(rinfo->regulator)) - d_vpr_e("%s: regulator %s not disabled\n", - __func__, rinfo->name); - return 0; disable_regulator_failed: @@ -1844,10 +1832,6 @@ static int __enable_regulators(struct msm_vidc_core *core) d_vpr_h("Enabling regulators\n"); venus_hfi_for_each_regulator(core, rinfo) { - if (regulator_is_enabled(rinfo->regulator)) - d_vpr_e("%s: regulator %s already enabled\n", - __func__, rinfo->name); - rc = regulator_enable(rinfo->regulator); if (rc) { d_vpr_e("Failed to enable %s: %d\n", From 00d95963133d4669556da257d01ddf75b0c42397 Mon Sep 17 00:00:00 2001 From: Mihir Ganu Date: Tue, 6 Apr 2021 11:17:50 -0700 Subject: [PATCH 0236/1061] video: driver: Enable CR/CF UBWC stats Use firmware values of Compression Ratio (CR) and Complexity Factor (CF) for bandwidth calculations. Change-Id: Ia6d3c45afc834bc872ac4e0597a2ecb95eb81682 Signed-off-by: Mihir Ganu --- driver/vidc/src/msm_vidc_power.c | 47 ++++++++++++++-------------- driver/vidc/src/venus_hfi_response.c | 11 +++++-- 2 files changed, 32 insertions(+), 26 deletions(-) diff --git a/driver/vidc/src/msm_vidc_power.c b/driver/vidc/src/msm_vidc_power.c index 8ac2408e00..eb2160601d 100644 --- a/driver/vidc/src/msm_vidc_power.c +++ b/driver/vidc/src/msm_vidc_power.c @@ -100,37 +100,36 @@ static int fill_dynamic_stats(struct msm_vidc_inst *inst, struct vidc_bus_vote_data *vote_data) { struct msm_vidc_input_cr_data *temp, *next; - u32 max_cr = MSM_VIDC_MIN_UBWC_COMPRESSION_RATIO; - u32 max_cf = MSM_VIDC_MIN_UBWC_COMPLEXITY_FACTOR; - u32 max_input_cr = MSM_VIDC_MIN_UBWC_COMPRESSION_RATIO; - u32 min_cf = MSM_VIDC_MAX_UBWC_COMPLEXITY_FACTOR; - u32 min_input_cr = MSM_VIDC_MAX_UBWC_COMPRESSION_RATIO; - u32 min_cr = MSM_VIDC_MAX_UBWC_COMPRESSION_RATIO; + u32 cf = MSM_VIDC_MAX_UBWC_COMPLEXITY_FACTOR; + u32 cr = MSM_VIDC_MIN_UBWC_COMPRESSION_RATIO; + u32 input_cr = MSM_VIDC_MIN_UBWC_COMPRESSION_RATIO; - /* TODO: get ubwc stats from firmware */ - min_cr = inst->power.fw_cr; - max_cf = inst->power.fw_cf; - max_cf = max_cf / ((msm_vidc_get_mbs_per_frame(inst)) / (32 * 8) * 3) / 2; + if (inst->power.fw_cr) + cr = inst->power.fw_cr; - list_for_each_entry_safe(temp, next, &inst->enc_input_crs, list) { - min_input_cr = min(min_input_cr, temp->input_cr); - max_input_cr = max(max_input_cr, temp->input_cr); + if (inst->power.fw_cf) { + cf = inst->power.fw_cf; + cf = cf / ((msm_vidc_get_mbs_per_frame(inst)) / (32 * 8) * 3) / 2; } + list_for_each_entry_safe(temp, next, &inst->enc_input_crs, list) + input_cr = min(input_cr, temp->input_cr); + + vote_data->compression_ratio = cr; + vote_data->complexity_factor = cf; + vote_data->input_cr = input_cr; /* Sanitize CF values from HW */ - max_cf = min_t(u32, max_cf, MSM_VIDC_MAX_UBWC_COMPLEXITY_FACTOR); - min_cf = max_t(u32, min_cf, MSM_VIDC_MIN_UBWC_COMPLEXITY_FACTOR); - max_cr = min_t(u32, max_cr, MSM_VIDC_MAX_UBWC_COMPRESSION_RATIO); - min_cr = max_t(u32, min_cr, MSM_VIDC_MIN_UBWC_COMPRESSION_RATIO); - max_input_cr = min_t(u32, - max_input_cr, MSM_VIDC_MAX_UBWC_COMPRESSION_RATIO); - min_input_cr = max_t(u32, - min_input_cr, MSM_VIDC_MIN_UBWC_COMPRESSION_RATIO); + cf = clamp_t(u32, cf, MSM_VIDC_MIN_UBWC_COMPLEXITY_FACTOR, + MSM_VIDC_MAX_UBWC_COMPLEXITY_FACTOR); + cr = clamp_t(u32, cr, MSM_VIDC_MIN_UBWC_COMPRESSION_RATIO, + MSM_VIDC_MAX_UBWC_COMPRESSION_RATIO); + input_cr = clamp_t(u32, input_cr, MSM_VIDC_MIN_UBWC_COMPRESSION_RATIO, + MSM_VIDC_MAX_UBWC_COMPRESSION_RATIO); - vote_data->compression_ratio = min_cr; - vote_data->complexity_factor = max_cf; - vote_data->input_cr = min_input_cr; + vote_data->compression_ratio = cr; + vote_data->complexity_factor = cf; + vote_data->input_cr = input_cr; i_vpr_l(inst, "Input CR = %d Recon CR = %d Complexity Factor = %d\n", diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index d2c10840f3..57937b2101 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -744,6 +744,13 @@ static int handle_output_buffer(struct msm_vidc_inst *inst, buf->flags = 0; buf->flags = get_driver_buffer_flags(inst, buffer->flags); + if (is_decode_session(inst)) { + inst->power.fw_cr = inst->hfi_frame_info.cr; + inst->power.fw_cf = inst->hfi_frame_info.cf; + } else { + inst->power.fw_cr = inst->hfi_frame_info.cr; + } + print_vidc_buffer(VIDC_HIGH, "high", "dqbuf", inst, buf); msm_vidc_debugfs_update(inst, MSM_VIDC_DEBUGFS_EVENT_FBD); @@ -1248,10 +1255,10 @@ static int handle_session_property(struct msm_vidc_inst *inst, inst->hfi_frame_info.no_output = 1; break; case HFI_PROP_WORST_COMPRESSION_RATIO: - inst->power.fw_cr = payload_ptr[0]; + inst->hfi_frame_info.cr = payload_ptr[0]; break; case HFI_PROP_WORST_COMPLEXITY_FACTOR: - inst->power.fw_cf = payload_ptr[0]; + inst->hfi_frame_info.cf = payload_ptr[0]; break; case HFI_PROP_DPB_LIST: if (is_decode_session(inst) && port == OUTPUT_PORT && From bce0861f13de20db6aaa1f1f27ae7d3e64bb3dd0 Mon Sep 17 00:00:00 2001 From: Mihir Ganu Date: Tue, 13 Apr 2021 12:16:24 -0700 Subject: [PATCH 0237/1061] video: driver: Use cabac for power calculation When cabac_session property is subscribed, fw updates this session info. This should be used to adjust power caculations. Change-Id: Ica4d2ee664f2a0a9ea41ec4d74bd2b21e9116931 Signed-off-by: Chinmay Sawarkar Signed-off-by: Mihir Ganu --- driver/vidc/src/msm_vdec.c | 2 +- driver/vidc/src/venus_hfi_response.c | 10 ++++++++++ 2 files changed, 11 insertions(+), 1 deletion(-) diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 0d481e02c0..248ff4e602 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -57,7 +57,6 @@ static const u32 msm_vdec_subscribe_for_psc_vp9[] = { static const u32 msm_vdec_input_subscribe_for_properties[] = { HFI_PROP_NO_OUTPUT, - HFI_PROP_CABAC_SESSION, }; static const u32 msm_vdec_output_subscribe_for_properties[] = { @@ -65,6 +64,7 @@ static const u32 msm_vdec_output_subscribe_for_properties[] = { HFI_PROP_WORST_COMPLEXITY_FACTOR, HFI_PROP_PICTURE_TYPE, HFI_PROP_DPB_LIST, + HFI_PROP_CABAC_SESSION, }; static const u32 msm_vdec_internal_buffer_type[] = { diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index d2c10840f3..930187deea 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -9,6 +9,7 @@ #include "msm_vidc_debug.h" #include "msm_vidc_driver.h" #include "msm_vdec.h" +#include "msm_vidc_control.h" #define in_range(range, val) (((range.begin) < (val)) && ((range.end) > (val))) @@ -1253,6 +1254,15 @@ static int handle_session_property(struct msm_vidc_inst *inst, case HFI_PROP_WORST_COMPLEXITY_FACTOR: inst->power.fw_cf = payload_ptr[0]; break; + case HFI_PROP_CABAC_SESSION: + if (payload_ptr[0] == 1) + msm_vidc_update_cap_value(inst, ENTROPY_MODE, + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, + __func__); + else + msm_vidc_update_cap_value(inst, ENTROPY_MODE, + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC, + __func__); case HFI_PROP_DPB_LIST: if (is_decode_session(inst) && port == OUTPUT_PORT && inst->capabilities->cap[DPB_LIST].value) { From 5a2b2ee39930aae6ce4c991be25099ac94e42bc0 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Mon, 12 Apr 2021 13:09:40 -0700 Subject: [PATCH 0238/1061] video: driver: Add support to adjust slice mode Add support to adjust slice mode. Change-Id: Id09e951b3085c55cc5bc6b15a2ce002645923435 Signed-off-by: Akshata Sahukar --- driver/platform/waipio/src/msm_vidc_waipio.c | 21 ++-- driver/vidc/inc/msm_vidc_control.h | 1 + driver/vidc/inc/msm_vidc_internal.h | 9 ++ driver/vidc/src/msm_venc.c | 21 +++- driver/vidc/src/msm_vidc_control.c | 110 ++++++++++++++++++- 5 files changed, 152 insertions(+), 10 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index ba2253867c..1063978798 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -25,6 +25,11 @@ #define MAX_QP 51 #define DEFAULT_QP 20 #define MAX_CONSTANT_QUALITY 100 +#define MIN_SLICE_BYTE_SIZE 512 +#define MAX_SLICE_BYTE_SIZE \ + ((MAX_BITRATE) >> 3) +#define MAX_SLICE_MB_SIZE \ + (((4096 + 15) >> 4) * ((2304 + 15) >> 4)) #define UBWC_CONFIG(mc, ml, hbb, bs1, bs2, bs3, bsp) \ { \ @@ -329,7 +334,8 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {0}, {LTR_COUNT, IR_RANDOM, TIME_DELTA_BASED_RC, I_FRAME_QP, ENH_LAYER_COUNT, BIT_RATE, CONTENT_ADAPTIVE_CODING, - BITRATE_BOOST, MIN_QUALITY, VBV_DELAY, PEAK_BITRATE}, + BITRATE_BOOST, MIN_QUALITY, VBV_DELAY, PEAK_BITRATE, + SLICE_MODE}, msm_vidc_adjust_bitrate_mode, msm_vidc_set_u32_enum}, {BITRATE_MODE, ENC, HEVC, @@ -347,7 +353,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { CONSTANT_QUALITY, ENH_LAYER_COUNT, CONTENT_ADAPTIVE_CODING, BIT_RATE, BITRATE_BOOST, MIN_QUALITY, VBV_DELAY, - PEAK_BITRATE}, + PEAK_BITRATE, SLICE_MODE}, msm_vidc_adjust_bitrate_mode, msm_vidc_set_u32_enum}, {LOSSLESS, ENC, HEVC|HEIC, @@ -1027,18 +1033,19 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE, 0, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, {0}, - NULL, msm_vidc_set_slice_count}, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {BITRATE_MODE}, {0}, + msm_vidc_adjust_slice_count, msm_vidc_set_slice_count}, {SLICE_MAX_BYTES, ENC, H264|HEVC|HEIC, - 1, INT_MAX, 1, INT_MAX, + MIN_SLICE_BYTE_SIZE, MAX_SLICE_BYTE_SIZE, + 1, MIN_SLICE_BYTE_SIZE, V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES, HFI_PROP_MULTI_SLICE_BYTES_COUNT, CAP_FLAG_OUTPUT_PORT}, {SLICE_MAX_MB, ENC, H264|HEVC|HEIC, - 1, INT_MAX, 1, INT_MAX, + 1, MAX_SLICE_MB_SIZE, 1, 1, V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB, HFI_PROP_MULTI_SLICE_MB_COUNT, CAP_FLAG_OUTPUT_PORT}, diff --git a/driver/vidc/inc/msm_vidc_control.h b/driver/vidc/inc/msm_vidc_control.h index 80859bc2c9..484d16e494 100644 --- a/driver/vidc/inc/msm_vidc_control.h +++ b/driver/vidc/inc/msm_vidc_control.h @@ -28,6 +28,7 @@ int msm_vidc_adjust_mark_ltr(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_ir_random(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_delta_based_rc(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_transform_8x8(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_slice_count(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_layer_count(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_gop_size(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_b_frame(void *instance, struct v4l2_ctrl *ctrl); diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 77d06f386c..14a11fb655 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -56,6 +56,15 @@ #define MAX_AVC_ENH_LAYER_HYBRID_HP 5 #define PERCENT_PEAK_BITRATE_INCREASED 10 #define INVALID_DEFAULT_MARK_OR_USE_LTR -1 +#define MAX_SLICES_PER_FRAME 10 +#define MAX_SLICES_FRAME_RATE 60 +#define MAX_MB_SLICE_WIDTH 4096 +#define MAX_MB_SLICE_HEIGHT 2160 +#define MAX_BYTES_SLICE_WIDTH 1920 +#define MAX_BYTES_SLICE_HEIGHT 1088 +#define MIN_HEVC_SLICE_WIDTH 384 +#define MIN_AVC_SLICE_WIDTH 192 +#define MIN_SLICE_HEIGHT 128 #define DCVS_WINDOW 16 /* Superframe can have maximum of 32 frames */ diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index 4ad5330cb1..a1e7b80b28 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -1245,6 +1245,7 @@ static int msm_venc_s_fmt_input(struct msm_vidc_inst *inst, struct v4l2_format * if (fmt->fmt.pix_mp.width != crop_width || fmt->fmt.pix_mp.height != crop_height) { + struct v4l2_format *output_fmt; /* reset crop dimensions with updated resolution */ inst->crop.top = inst->crop.left = 0; @@ -1256,9 +1257,17 @@ static int msm_venc_s_fmt_input(struct msm_vidc_inst *inst, struct v4l2_format * inst->compose.width = f->fmt.pix_mp.width; inst->compose.height = f->fmt.pix_mp.height; - rc = msm_venc_s_fmt_output(inst, &inst->fmts[OUTPUT_PORT]); + output_fmt = &inst->fmts[OUTPUT_PORT]; + rc = msm_venc_s_fmt_output(inst, output_fmt); if (rc) return rc; + + i_vpr_h(inst, + "%s: type %d: format %#x width %d height %d size %d\n", + __func__, output_fmt->type, output_fmt->fmt.pix_mp.pixelformat, + output_fmt->fmt.pix_mp.width, + output_fmt->fmt.pix_mp.height, + output_fmt->fmt.pix_mp.plane_fmt[0].sizeimage); } //rc = msm_vidc_check_session_supported(inst); @@ -1385,6 +1394,7 @@ int msm_venc_g_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) int msm_venc_s_selection(struct msm_vidc_inst* inst, struct v4l2_selection* s) { int rc = 0; + struct v4l2_format *output_fmt; if (!inst || !s) { d_vpr_e("%s: invalid params\n", __func__); @@ -1431,9 +1441,16 @@ int msm_venc_s_selection(struct msm_vidc_inst* inst, struct v4l2_selection* s) if (inst->compose.height > inst->crop.height) inst->compose.height = inst->crop.height; /* update output format based on new crop dimensions */ - rc = msm_venc_s_fmt_output(inst, &inst->fmts[OUTPUT_PORT]); + output_fmt = &inst->fmts[OUTPUT_PORT]; + rc = msm_venc_s_fmt_output(inst, output_fmt); if (rc) return rc; + i_vpr_h(inst, + "%s: type %d: format %#x width %d height %d size %d\n", + __func__, output_fmt->type, output_fmt->fmt.pix_mp.pixelformat, + output_fmt->fmt.pix_mp.width, + output_fmt->fmt.pix_mp.height, + output_fmt->fmt.pix_mp.plane_fmt[0].sizeimage); break; case V4L2_SEL_TGT_COMPOSE_BOUNDS: case V4L2_SEL_TGT_COMPOSE_PADDED: diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 357b538639..576c72186b 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -1072,6 +1072,112 @@ int msm_vidc_adjust_transform_8x8(void *instance, struct v4l2_ctrl *ctrl) return 0; } +int msm_vidc_adjust_slice_count(void *instance, struct v4l2_ctrl *ctrl) +{ + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + struct msm_vidc_inst_capability *capability; + struct v4l2_format *output_fmt; + s32 adjusted_value, rc_type = -1, slice_mode; + u32 slice_val, mbpf = 0, mbps = 0, max_mbpf = 0, max_mbps = 0; + u32 update_cap, max_avg_slicesize, output_width, output_height; + u32 min_width, min_height, max_width, max_height, fps; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + slice_mode = ctrl ? ctrl->val : + capability->cap[SLICE_MODE].value; + + if (msm_vidc_get_parent_value(inst, SLICE_MODE, + BITRATE_MODE, &rc_type, __func__)) + return -EINVAL; + + if (slice_mode == V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE) + return 0; + + fps = capability->cap[FRAME_RATE].value >> 16; + if (fps > MAX_SLICES_FRAME_RATE || + (rc_type != HFI_RC_OFF && + rc_type != HFI_RC_CBR_CFR && + rc_type != HFI_RC_CBR_VFR)) { + adjusted_value = V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE; + update_cap = SLICE_MODE; + i_vpr_h(inst, + "%s: slice unsupported, fps: %u, rc_type: %#x\n", + __func__, fps, rc_type); + goto exit; + } + + output_fmt = &inst->fmts[OUTPUT_PORT]; + output_width = output_fmt->fmt.pix_mp.width; + output_height = output_fmt->fmt.pix_mp.height; + + max_width = (slice_mode == V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_MB) ? + MAX_MB_SLICE_WIDTH : MAX_BYTES_SLICE_WIDTH; + max_height = (slice_mode == V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_MB) ? + MAX_MB_SLICE_HEIGHT : MAX_BYTES_SLICE_HEIGHT; + min_width = (inst->codec == MSM_VIDC_HEVC) ? + MIN_HEVC_SLICE_WIDTH : MIN_AVC_SLICE_WIDTH; + min_height = MIN_SLICE_HEIGHT; + + /* + * For V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_MB: + * - width >= 384 and height >= 128 + * - width and height <= 4096 + * For V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_BYTES: + * - width >= 192 and height >= 128 + * - width and height <= 1920 + */ + if (output_width < min_width || output_height < min_height || + output_width > max_width || output_height > max_width) { + adjusted_value = V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE; + update_cap = SLICE_MODE; + i_vpr_h(inst, + "%s: slice unsupported, codec: %#x wxh: [%dx%d]\n", + __func__, inst->codec, output_width, output_height); + goto exit; + } + + mbpf = NUM_MBS_PER_FRAME(output_height, output_width); + mbps = NUM_MBS_PER_SEC(output_height, output_width, fps); + max_mbpf = NUM_MBS_PER_FRAME(max_height, max_width); + max_mbps = NUM_MBS_PER_SEC(max_height, max_width, fps); + + if (mbpf > max_mbpf || mbps > max_mbps) { + adjusted_value = V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE; + update_cap = SLICE_MODE; + i_vpr_h(inst, + "%s: Unsupported, mbpf[%u] > max[%u], mbps[%u] > max[%u]\n", + __func__, mbpf, max_mbpf, mbps, max_mbps); + goto exit; + } + + if (slice_mode == V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_MB) { + update_cap = SLICE_MAX_MB; + slice_val = capability->cap[SLICE_MAX_MB].value; + slice_val = max(slice_val, mbpf / MAX_SLICES_PER_FRAME); + } else { + slice_val = capability->cap[SLICE_MAX_BYTES].value; + update_cap = SLICE_MAX_BYTES; + if (rc_type != HFI_RC_OFF) { + max_avg_slicesize = ((capability->cap[BIT_RATE].value / + fps) / 8) / + MAX_SLICES_PER_FRAME; + slice_val = max(slice_val, max_avg_slicesize); + } + } + adjusted_value = slice_val; + +exit: + msm_vidc_update_cap_value(inst, update_cap, + adjusted_value, __func__); + + return 0; +} + static int msm_vidc_adjust_static_layer_count_and_type(struct msm_vidc_inst *inst, s32 layer_count) { @@ -2033,7 +2139,9 @@ int msm_vidc_set_slice_count(void* instance, return 0; } if (slice_mode == V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_MB) { - hfi_value = inst->capabilities->cap[SLICE_MAX_MB].value; + hfi_value = (inst->codec == MSM_VIDC_HEVC) ? + ((inst->capabilities->cap[SLICE_MAX_MB].value + 3) / 4) : + inst->capabilities->cap[SLICE_MAX_MB].value; set_cap_id = SLICE_MAX_MB; } else if (slice_mode == V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_BYTES) { hfi_value = inst->capabilities->cap[SLICE_MAX_BYTES].value; From b1fbc46396f498fc03fe7841f95b09889b89e35c Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Mon, 12 Apr 2021 17:16:53 +0530 Subject: [PATCH 0239/1061] video: driver: select target and vpu variant based on dtsi - enable conditional compilation based on defconfig - compile only needed files based target & vpu variant - enabled stubs to avoid compilation issues, for all target variant and vpu types - add support for qcv(same lunch combo) for different PT & VT chipsets. Change-Id: Ic446349fd1532885d7a2e94895d807c62f1ab6e4 Signed-off-by: Govindaraj Rajagopal --- Kbuild | 21 ++-- config/waipio_video.conf | 3 +- config/waipio_video.h | 5 +- driver/platform/waipio/inc/msm_vidc_waipio.h | 15 ++- driver/platform/waipio/src/msm_vidc_waipio.c | 4 +- driver/variant/iris2/inc/msm_vidc_iris2.h | 23 ++-- driver/vidc/src/msm_vidc_platform.c | 125 ++++++++++++++++--- 7 files changed, 155 insertions(+), 41 deletions(-) diff --git a/Kbuild b/Kbuild index c17d85401f..ab3c3278cf 100644 --- a/Kbuild +++ b/Kbuild @@ -1,10 +1,11 @@ # SPDX-License-Identifier: GPL-2.0-only -include $(VIDEO_ROOT)/config/waipio_video.conf - KBUILD_CPPFLAGS += -DCONFIG_MSM_MMRM=1 +ifeq ($(CONFIG_ARCH_WAIPIO), y) +include $(VIDEO_ROOT)/config/waipio_video.conf LINUXINCLUDE += -include $(VIDEO_ROOT)/config/waipio_video.h +endif LINUXINCLUDE += -I$(VIDEO_ROOT)/driver/vidc/inc \ -I$(VIDEO_ROOT)/include/uapi/vidc \ @@ -16,6 +17,16 @@ USERINCLUDE += -I$(VIDEO_ROOT)/include/uapi/vidc/media \ obj-m += msm_video.o +ifeq ($(CONFIG_MSM_VIDC_WAIPIO), y) +msm_video-objs += driver/platform/waipio/src/msm_vidc_waipio.o +endif + +ifeq ($(CONFIG_MSM_VIDC_IRIS2), y) +msm_video-objs += driver/variant/iris2/src/msm_vidc_buffer_iris2.o \ + driver/variant/iris2/src/msm_vidc_power_iris2.o \ + driver/variant/iris2/src/msm_vidc_iris2.o +endif + msm_video-objs += driver/vidc/src/msm_vidc_v4l2.o \ driver/vidc/src/msm_vidc_vb2.o \ driver/vidc/src/msm_vidc.o \ @@ -32,8 +43,4 @@ msm_video-objs += driver/vidc/src/msm_vidc_v4l2.o \ driver/vidc/src/msm_vidc_memory.o \ driver/vidc/src/venus_hfi.o \ driver/vidc/src/hfi_packet.o \ - driver/vidc/src/venus_hfi_response.o \ - driver/variant/iris2/src/msm_vidc_buffer_iris2.o \ - driver/variant/iris2/src/msm_vidc_power_iris2.o \ - driver/variant/iris2/src/msm_vidc_iris2.o \ - driver/platform/waipio/src/msm_vidc_waipio.o + driver/vidc/src/venus_hfi_response.o diff --git a/config/waipio_video.conf b/config/waipio_video.conf index efb4eedfb7..227440fb21 100644 --- a/config/waipio_video.conf +++ b/config/waipio_video.conf @@ -1 +1,2 @@ -export CONFIG_MSM_VIDC_V4L2=y +export CONFIG_MSM_VIDC_WAIPIO=y +export CONFIG_MSM_VIDC_IRIS2=y diff --git a/config/waipio_video.h b/config/waipio_video.h index 8660ddf8bb..238fc3268d 100644 --- a/config/waipio_video.h +++ b/config/waipio_video.h @@ -3,6 +3,5 @@ * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. */ -#define CONFIG_MSM_VIDC_V4L2 1 -#define CONFIG_MSM_VIDC_IRIS2 1 -#define CONFIG_MSM_VIDC_WAIPIO 1 +#define CONFIG_MSM_VIDC_WAIPIO 1 +#define CONFIG_MSM_VIDC_IRIS2 1 diff --git a/driver/platform/waipio/inc/msm_vidc_waipio.h b/driver/platform/waipio/inc/msm_vidc_waipio.h index 9f5b371d54..e934c144cb 100644 --- a/driver/platform/waipio/inc/msm_vidc_waipio.h +++ b/driver/platform/waipio/inc/msm_vidc_waipio.h @@ -8,7 +8,18 @@ #include "msm_vidc_core.h" -int msm_vidc_init_platform_waipio(struct msm_vidc_core *core); -int msm_vidc_deinit_platform_waipio(struct msm_vidc_core *core); +#if defined(CONFIG_MSM_VIDC_WAIPIO) +int msm_vidc_init_platform_waipio(struct msm_vidc_core *core, struct device *dev); +int msm_vidc_deinit_platform_waipio(struct msm_vidc_core *core, struct device *dev); +#else +int msm_vidc_init_platform_waipio(struct msm_vidc_core *core, struct device *dev) +{ + return -EINVAL; +} +int msm_vidc_deinit_platform_waipio(struct msm_vidc_core *core, struct device *dev) +{ + return -EINVAL; +} +#endif #endif // _MSM_VIDC_WAIPIO_H_ diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 1063978798..d2288691de 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -1464,7 +1464,7 @@ static int msm_vidc_init_data(struct msm_vidc_core *core) return rc; } -int msm_vidc_init_platform_waipio(struct msm_vidc_core *core) +int msm_vidc_init_platform_waipio(struct msm_vidc_core *core, struct device *dev) { int rc = 0; @@ -1475,7 +1475,7 @@ int msm_vidc_init_platform_waipio(struct msm_vidc_core *core) return 0; } -int msm_vidc_deinit_platform_waipio(struct msm_vidc_core *core) +int msm_vidc_deinit_platform_waipio(struct msm_vidc_core *core, struct device *dev) { /* do nothing */ return 0; diff --git a/driver/variant/iris2/inc/msm_vidc_iris2.h b/driver/variant/iris2/inc/msm_vidc_iris2.h index 7f8f7b9d69..1d0ee44d91 100644 --- a/driver/variant/iris2/inc/msm_vidc_iris2.h +++ b/driver/variant/iris2/inc/msm_vidc_iris2.h @@ -3,14 +3,23 @@ * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. */ +#ifndef _MSM_VIDC_IRIS2_H_ +#define _MSM_VIDC_IRIS2_H_ + #include "msm_vidc_core.h" -//#if defined(CONFIG_MSM_VIDC_IRIS2) +#if defined(CONFIG_MSM_VIDC_IRIS2) int msm_vidc_init_iris2(struct msm_vidc_core *core); -//#else -//static inline int msm_vidc_init_iris2(struct msm_vidc_core *core) -//{ -// return -EINVAL; -//} -//#endif int msm_vidc_deinit_iris2(struct msm_vidc_core *core); +#else +static inline int msm_vidc_init_iris2(struct msm_vidc_core *core) +{ + return -EINVAL; +} +static inline int msm_vidc_deinit_iris2(struct msm_vidc_core *core) +{ + return -EINVAL; +} +#endif + +#endif // _MSM_VIDC_IRIS2_H_ diff --git a/driver/vidc/src/msm_vidc_platform.c b/driver/vidc/src/msm_vidc_platform.c index d1da9f3155..2299052e4c 100644 --- a/driver/vidc/src/msm_vidc_platform.c +++ b/driver/vidc/src/msm_vidc_platform.c @@ -4,15 +4,13 @@ */ #include - -#include "msm_vidc_waipio.h" - #include "msm_vidc_platform.h" -#include "msm_vidc_iris2.h" #include "msm_vidc_debug.h" #include "msm_vidc_v4l2.h" #include "msm_vidc_vb2.h" #include "msm_vidc_control.h" +#include "msm_vidc_waipio.h" +#include "msm_vidc_iris2.h" static struct v4l2_file_operations msm_v4l2_file_operations = { .owner = THIS_MODULE, @@ -97,6 +95,102 @@ static int msm_vidc_init_ops(struct msm_vidc_core *core) return 0; } +static int msm_vidc_deinit_platform_variant(struct msm_vidc_core *core, struct device *dev) +{ + int rc = 0; + + if (!core || !dev) { + d_vpr_e("%s: Invalid params\n", __func__); + return -EINVAL; + } + + d_vpr_h("%s()\n", __func__); + + if (of_device_is_compatible(dev->of_node, "qcom,msm-vidc-waipio")) { + rc = msm_vidc_deinit_platform_waipio(core, dev); + } else { + d_vpr_e("%s(): unknown platform\n", __func__); + rc = -EINVAL; + } + + if (rc) + d_vpr_e("%s: failed with %d\n", __func__, rc); + + return rc; +} + +static int msm_vidc_init_platform_variant(struct msm_vidc_core *core, struct device *dev) +{ + int rc = 0; + + if (!core || !dev) { + d_vpr_e("%s: Invalid params\n", __func__); + return -EINVAL; + } + + d_vpr_h("%s()\n", __func__); + + if (of_device_is_compatible(dev->of_node, "qcom,msm-vidc-waipio")) { + rc = msm_vidc_init_platform_waipio(core, dev); + } else { + d_vpr_e("%s(): unknown platform\n", __func__); + rc = -EINVAL; + } + + if (rc) + d_vpr_e("%s: failed with %d\n", __func__, rc); + + return rc; +} + +static int msm_vidc_deinit_vpu(struct msm_vidc_core *core, struct device *dev) +{ + int rc = 0; + + if (!core || !dev) { + d_vpr_e("%s: Invalid params\n", __func__); + return -EINVAL; + } + + d_vpr_h("%s()\n", __func__); + + if (of_device_is_compatible(dev->of_node, "qcom,msm-vidc-iris2")) { + rc = msm_vidc_deinit_iris2(core); + } else { + d_vpr_e("%s(): unknown vpu\n", __func__); + rc = -EINVAL; + } + + if (rc) + d_vpr_e("%s: failed with %d\n", __func__, rc); + + return rc; +} + +static int msm_vidc_init_vpu(struct msm_vidc_core *core, struct device *dev) +{ + int rc = 0; + + if (!core || !dev) { + d_vpr_e("%s: Invalid params\n", __func__); + return -EINVAL; + } + + d_vpr_h("%s()\n", __func__); + + if (of_device_is_compatible(dev->of_node, "qcom,msm-vidc-iris2")) { + rc = msm_vidc_init_iris2(core); + } else { + d_vpr_e("%s(): unknown vpu\n", __func__); + rc = -EINVAL; + } + + if (rc) + d_vpr_e("%s: failed with %d\n", __func__, rc); + + return rc; +} + int msm_vidc_deinit_platform(struct platform_device *pdev) { struct msm_vidc_core *core; @@ -115,11 +209,8 @@ int msm_vidc_deinit_platform(struct platform_device *pdev) d_vpr_h("%s()\n", __func__); - if (of_device_is_compatible(pdev->dev.of_node, "qcom,msm-vidc")) - msm_vidc_deinit_iris2(core); - - if (of_device_is_compatible(pdev->dev.of_node, "qcom,msm-vidc")) - msm_vidc_deinit_platform_waipio(core); + msm_vidc_deinit_vpu(core, &pdev->dev); + msm_vidc_deinit_platform_variant(core, &pdev->dev); kfree(core->platform); return 0; @@ -157,17 +248,13 @@ int msm_vidc_init_platform(struct platform_device *pdev) if (rc) return rc; - if (of_device_is_compatible(pdev->dev.of_node, "qcom,msm-vidc")) { // "qcom,msm-vidc-waipio" - rc = msm_vidc_init_platform_waipio(core); - if (rc) - return rc; - } + rc = msm_vidc_init_platform_variant(core, &pdev->dev); + if (rc) + return rc; - if (of_device_is_compatible(pdev->dev.of_node, "qcom,msm-vidc")) { // "qcom,msm-vidc-iris2" - rc = msm_vidc_init_iris2(core); - if (rc) - return rc; - } + rc = msm_vidc_init_vpu(core, &pdev->dev); + if (rc) + return rc; return rc; } From 3d6ff3ea8e0d341bceb052273d9a5ccf895a4b3b Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Thu, 15 Apr 2021 19:54:24 +0530 Subject: [PATCH 0240/1061] video: driver: add fix to avoid race condition in session close Some clients attempt to invoke streamoff & driver fd close (msm_vidc_close) sequence concurrently. So there might be chances some commands willbe posted to command queue even after closing hfi session(HFI_CMD_CLOSE) completed. So due to invalid session_id firmware asserts. Added change to avoid above mentioned issue and also amended minor logging changes. Change-Id: I2896567916cf5d18eb5b2a148efccf9bf07af3ea Signed-off-by: Govindaraj Rajagopal --- driver/vidc/src/hfi_packet.c | 2 +- driver/vidc/src/msm_vdec.c | 4 ++-- driver/vidc/src/msm_vidc_driver.c | 33 +++++++++++++++++----------- driver/vidc/src/venus_hfi.c | 18 +++++++-------- driver/vidc/src/venus_hfi_response.c | 6 ++--- 5 files changed, 35 insertions(+), 28 deletions(-) diff --git a/driver/vidc/src/hfi_packet.c b/driver/vidc/src/hfi_packet.c index ac0bfb5d49..230c2ff6b0 100644 --- a/driver/vidc/src/hfi_packet.c +++ b/driver/vidc/src/hfi_packet.c @@ -657,7 +657,7 @@ int hfi_packet_session_command(struct msm_vidc_inst *inst, int rc = 0; struct msm_vidc_core *core; - if (!inst || !inst->core) { + if (!inst || !inst->core || !inst->packet) { d_vpr_e("%s: Invalid params\n", __func__); return -EINVAL; } diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 248ff4e602..45ecc5c1a5 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -1765,7 +1765,7 @@ static int msm_vdec_qbuf_batch(struct msm_vidc_inst *inst, i_vpr_e(inst, "%s: qbuf not allowed\n", __func__); return -EINVAL; } else if (allow == MSM_VIDC_DEFER) { - print_vidc_buffer(VIDC_LOW, "high", "qbuf deferred", inst, buf); + print_vidc_buffer(VIDC_LOW, "low ", "qbuf deferred", inst, buf); return 0; } @@ -1773,7 +1773,7 @@ static int msm_vdec_qbuf_batch(struct msm_vidc_inst *inst, if (inst->power.buffer_counter > SKIP_BATCH_WINDOW) { count = msm_vidc_num_buffers(inst, MSM_VIDC_BUF_OUTPUT, MSM_VIDC_ATTR_DEFERRED); if (count < inst->decode_batch.size) { - print_vidc_buffer(VIDC_LOW, "high", "batch-qbuf deferred", inst, buf); + print_vidc_buffer(VIDC_LOW, "low ", "batch-qbuf deferred", inst, buf); schedule_batch_work(inst); return 0; } diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 9b9798aec3..cc17c9d27d 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -1009,9 +1009,9 @@ int msm_vidc_change_core_state(struct msm_vidc_core *core, return -EINVAL; } - d_vpr_h("%s: core state changed from %s to %s\n", - func, core_state_name(core->state), - core_state_name(request_state)); + d_vpr_h("%s: core state changed to %s from %s\n", + func, core_state_name(request_state), + core_state_name(core->state)); core->state = request_state; return 0; } @@ -1036,9 +1036,15 @@ int msm_vidc_change_inst_state(struct msm_vidc_inst *inst, return 0; } - i_vpr_h(inst, "%s: state changed from %s to %s\n", - func, state_name(inst->state), state_name(request_state)); + if (request_state == MSM_VIDC_ERROR) + i_vpr_e(inst, "%s: state changed to %s from %s\n", + func, state_name(request_state), state_name(inst->state)); + else + i_vpr_h(inst, "%s: state changed to %s from %s\n", + func, state_name(request_state), state_name(inst->state)); + inst->state = request_state; + return 0; } @@ -1864,7 +1870,7 @@ int msm_vidc_process_readonly_buffers(struct msm_vidc_inst *inst, list_for_each_entry_safe(ro_buf, dummy, &ro_buffers->list, list) { if (ro_buf->device_addr == buf->device_addr) { buf->attr |= MSM_VIDC_ATTR_READ_ONLY; - print_vidc_buffer(VIDC_LOW, "low", "ro buf removed", inst, ro_buf); + print_vidc_buffer(VIDC_LOW, "low ", "ro buf removed", inst, ro_buf); list_del(&ro_buf->list); msm_vidc_put_vidc_buffer(inst, ro_buf); break; @@ -2609,7 +2615,7 @@ int msm_vidc_queue_buffer_single(struct msm_vidc_inst *inst, struct vb2_buffer * i_vpr_e(inst, "%s: qbuf not allowed\n", __func__); return -EINVAL; } else if (allow == MSM_VIDC_DEFER) { - print_vidc_buffer(VIDC_LOW, "high", "qbuf deferred", inst, buf); + print_vidc_buffer(VIDC_LOW, "low ", "qbuf deferred", inst, buf); return 0; } @@ -3389,6 +3395,11 @@ int msm_vidc_session_close(struct msm_vidc_inst *inst) if (rc) return rc; + /* we are not supposed to send any more commands after close */ + i_vpr_h(inst, "%s: free session packet data\n", __func__); + kfree(inst->packet); + inst->packet = NULL; + core = inst->core; i_vpr_h(inst, "%s: wait on close for time: %d ms\n", __func__, core->capabilities[HW_RESPONSE_TIMEOUT].value); @@ -3409,10 +3420,6 @@ int msm_vidc_session_close(struct msm_vidc_inst *inst) msm_vidc_remove_session(inst); - i_vpr_h(inst, "%s: free session packet data\n", __func__); - kfree(inst->packet); - inst->packet = NULL; - return rc; } @@ -4173,13 +4180,13 @@ void msm_vidc_destroy_buffers(struct msm_vidc_inst *inst) } list_for_each_entry_safe(buf, dummy, &inst->buffers.read_only.list, list) { - print_vidc_buffer(VIDC_ERR, "err", "destroying ro buffer", inst, buf); + print_vidc_buffer(VIDC_ERR, "err ", "destroying ro buffer", inst, buf); list_del(&buf->list); msm_vidc_put_vidc_buffer(inst, buf); } list_for_each_entry_safe(buf, dummy, &inst->buffers.release.list, list) { - print_vidc_buffer(VIDC_ERR, "err", "destroying release buffer", inst, buf); + print_vidc_buffer(VIDC_ERR, "err ", "destroying release buffer", inst, buf); list_del(&buf->list); msm_vidc_put_vidc_buffer(inst, buf); } diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index b05c1f7976..d2e4e4c808 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -2943,7 +2943,7 @@ int venus_hfi_session_open(struct msm_vidc_inst *inst) int rc = 0; struct msm_vidc_core *core; - if (!inst || !inst->core) { + if (!inst || !inst->core || !inst->packet) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -2985,7 +2985,7 @@ int venus_hfi_session_set_codec(struct msm_vidc_inst *inst) struct msm_vidc_core *core; u32 codec; - if (!inst || !inst->core) { + if (!inst || !inst->core || !inst->packet) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -3030,7 +3030,7 @@ int venus_hfi_session_property(struct msm_vidc_inst *inst, int rc = 0; struct msm_vidc_core *core; - if (!inst || !inst->core) { + if (!inst || !inst->core || !inst->packet) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -3103,7 +3103,7 @@ int venus_hfi_start(struct msm_vidc_inst *inst, enum msm_vidc_port_type port) int rc = 0; struct msm_vidc_core* core; - if (!inst || !inst->core) { + if (!inst || !inst->core || !inst->packet) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -3146,7 +3146,7 @@ int venus_hfi_stop(struct msm_vidc_inst *inst, enum msm_vidc_port_type port) int rc = 0; struct msm_vidc_core* core; - if (!inst || !inst->core) { + if (!inst || !inst->core || !inst->packet) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -3192,7 +3192,7 @@ int venus_hfi_session_command(struct msm_vidc_inst *inst, int rc = 0; struct msm_vidc_core *core; - if (!inst || !inst->core) { + if (!inst || !inst->core || !inst->packet) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -3242,7 +3242,7 @@ int venus_hfi_queue_super_buffer(struct msm_vidc_inst *inst, u32 frame_size, meta_size, batch_size, cnt = 0; u64 ts_delta_us; - if (!inst || !inst->core || !inst->capabilities) { + if (!inst || !inst->core || !inst->capabilities || !inst->packet) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -3357,7 +3357,7 @@ int venus_hfi_queue_buffer(struct msm_vidc_inst *inst, struct msm_vidc_core *core; struct hfi_buffer hfi_buffer; - if (!inst || !inst->core) { + if (!inst || !inst->core || !inst->packet) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -3423,7 +3423,7 @@ int venus_hfi_release_buffer(struct msm_vidc_inst *inst, struct msm_vidc_core *core; struct hfi_buffer hfi_buffer; - if (!inst || !inst->core || !buffer) { + if (!inst || !inst->core || !inst->packet || !buffer) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index bd2dd0f259..1c2d95ae67 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -523,7 +523,7 @@ static int handle_read_only_buffer(struct msm_vidc_inst *inst, memcpy(ro_buf, buf, sizeof(struct msm_vidc_buffer)); INIT_LIST_HEAD(&ro_buf->list); list_add_tail(&ro_buf->list, &ro_buffers->list); - print_vidc_buffer(VIDC_LOW, "low", "ro buf added", inst, ro_buf); + print_vidc_buffer(VIDC_LOW, "low ", "ro buf added", inst, ro_buf); } ro_buf->attr |= MSM_VIDC_ATTR_READ_ONLY; @@ -564,7 +564,7 @@ static int handle_non_read_only_buffer(struct msm_vidc_inst *inst, * if not present, do not error out */ if (found) { - print_vidc_buffer(VIDC_LOW, "low", "ro buf deleted", inst, ro_buf); + print_vidc_buffer(VIDC_LOW, "low ", "ro buf deleted", inst, ro_buf); list_del(&ro_buf->list); msm_vidc_put_vidc_buffer(inst, ro_buf); } @@ -729,7 +729,7 @@ static int handle_output_buffer(struct msm_vidc_inst *inst, (buffer->flags & HFI_BUF_FW_FLAG_READONLY)) { buffer->flags &= ~HFI_BUF_FW_FLAG_READONLY; print_vidc_buffer( - VIDC_HIGH, "err", "RO flag in linear colorformat", inst, buf); + VIDC_HIGH, "high", "RO flag in linear colorformat", inst, buf); } if (buffer->flags & HFI_BUF_FW_FLAG_READONLY) { From 6f281973aa1fa60be468abba70e03b8c8a8c3b97 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Thu, 15 Apr 2021 17:55:44 +0530 Subject: [PATCH 0241/1061] video: driver: add fix to return all buffers back to client If client attempts streamoff and msm_vidc_close sequence concurrently, then all buffers not returned back to client, i.e leading to warnon at vb2_queue_cancel at vb2 layer. So added change to send vb2_buffer_done at driver fd close sequence. Change-Id: I43d779000501907d12d5ba8e90e007bdf5b8b801 Signed-off-by: Govindaraj Rajagopal --- driver/vidc/src/msm_vidc_driver.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 9b9798aec3..a491485e8e 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -4166,7 +4166,9 @@ void msm_vidc_destroy_buffers(struct msm_vidc_inst *inst) continue; list_for_each_entry_safe(buf, dummy, &buffers->list, list) { - print_vidc_buffer(VIDC_ERR, "err", "destroying ", inst, buf); + print_vidc_buffer(VIDC_ERR, "err ", "destroying ", inst, buf); + if (!(buf->attr & MSM_VIDC_ATTR_BUFFER_DONE)) + msm_vidc_vb2_buffer_done(inst, buf); msm_vidc_put_driver_buf(inst, buf); } msm_vidc_unmap_buffers(inst, ext_buf_types[i]); From 8c7c63ec2d6229e0fd481e9ccbbd5e13fad790e6 Mon Sep 17 00:00:00 2001 From: Manikanta Kanamarlapudi Date: Wed, 14 Apr 2021 12:50:47 -0700 Subject: [PATCH 0242/1061] video: driver: Allow priority control in streaming state Allow priority control in streaming state Change-Id: I98a0983026fdb37f6a5b94fb73082032158a7743 Signed-off-by: Manikanta Kanamarlapudi --- driver/vidc/src/msm_vidc_driver.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 9b9798aec3..eb71851578 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -1095,6 +1095,7 @@ bool msm_vidc_allow_s_ctrl(struct msm_vidc_inst *inst, u32 id) if (inst->vb2q[INPUT_PORT].streaming) { switch (id) { case V4L2_CID_MPEG_VIDC_CODEC_CONFIG: + case V4L2_CID_MPEG_VIDC_PRIORITY: allow = true; break; default: @@ -1132,6 +1133,7 @@ bool msm_vidc_allow_s_ctrl(struct msm_vidc_inst *inst, u32 id) case V4L2_CID_MPEG_VIDEO_CONSTANT_QUALITY: case V4L2_CID_MPEG_VIDC_ENC_INPUT_COMPRESSION_RATIO: case V4L2_CID_MPEG_VIDEO_BITRATE_PEAK: + case V4L2_CID_MPEG_VIDC_PRIORITY: allow = true; break; default: From d0fa618b52c45c1aa61036f641f8b9116c338579 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Thu, 15 Apr 2021 13:10:43 -0700 Subject: [PATCH 0243/1061] video: driver: Enable META_LTR_MARK_USE for enc o/p port META_LTR_MARK_USE is enc output metadata. Hence, avoid enabling encoder input metadata for META_LTR_MARK_USE. Change-Id: I667f2f1a74e73b753447fc2dc9709cb1983c2249 Signed-off-by: Akshata Sahukar --- driver/vidc/inc/msm_vidc_driver.h | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 4da4fe70f7..febced5113 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -85,8 +85,7 @@ static inline bool is_input_meta_enabled(struct msm_vidc_inst *inst) enabled = inst->capabilities->cap[META_BUF_TAG].value ? true : false; } else if (is_encode_session(inst)) { - enabled = (inst->capabilities->cap[META_LTR_MARK_USE].value || - inst->capabilities->cap[META_SEQ_HDR_NAL].value || + enabled = (inst->capabilities->cap[META_SEQ_HDR_NAL].value || inst->capabilities->cap[META_EVA_STATS].value || inst->capabilities->cap[META_BUF_TAG].value); } @@ -109,8 +108,8 @@ static inline bool is_output_meta_enabled(struct msm_vidc_inst *inst) inst->capabilities->cap[META_DPB_TAG_LIST].value || inst->capabilities->cap[META_SUBFRAME_OUTPUT].value); } else if (is_encode_session(inst)) { - enabled = inst->capabilities->cap[META_BUF_TAG].value ? - true : false; + enabled = (inst->capabilities->cap[META_LTR_MARK_USE].value || + inst->capabilities->cap[META_BUF_TAG].value); } return enabled; } From 9dfd5287428838f7227bb8ba475266e77be3d6d8 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Wed, 14 Apr 2021 14:02:59 -0700 Subject: [PATCH 0244/1061] video: driver: packet size sanity checking - Payload ptr is dereferenced even when response packet does not contain any payload. Avoid the same. - Fw may send HFI_FW_FLAGS_INFORMATION for property packet whenever benign error occurred in fw for the sent property. Print the same instead of considering the property as invalid port property. Change-Id: I0c61861c14fefa689d342f991693c33da289c572 Signed-off-by: Akshata Sahukar --- driver/vidc/src/venus_hfi_response.c | 83 +++++++++++++++++++++++++++- 1 file changed, 80 insertions(+), 3 deletions(-) diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index 1c2d95ae67..551968dae2 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -196,9 +196,15 @@ int validate_packet(u8 *response_pkt, u8 *core_resp_pkt, return -EINVAL; } + if (response_pkt_size < sizeof(struct hfi_packet)) { + d_vpr_e("%s: invalid packet size %d\n", + func, response_pkt_size); + return -EINVAL; + } + if (response_pkt + response_pkt_size > response_limit) { d_vpr_e("%s: invalid packet size %d\n", - func, *(u32 *)response_pkt); + func, response_pkt_size); return -EINVAL; } return 0; @@ -216,6 +222,11 @@ static int validate_hdr_packet(struct msm_vidc_core *core, return -EINVAL; } + if (hdr->size < sizeof(struct hfi_header) + sizeof(struct hfi_packet)) { + d_vpr_e("%s: invalid header size %d\n", __func__, hdr->size); + return -EINVAL; + } + pkt = (u8 *)((u8 *)hdr + sizeof(struct hfi_header)); /* validate all packets */ @@ -231,6 +242,54 @@ static int validate_hdr_packet(struct msm_vidc_core *core, return 0; } +static bool check_for_packet_payload(struct msm_vidc_inst *inst, + struct hfi_packet *pkt, const char *func) +{ + u32 payload_size = 0; + + if (!inst || !pkt) { + d_vpr_e("%s: invalid params %d\n", __func__); + return false; + } + + if (pkt->payload_info == HFI_PAYLOAD_NONE) { + i_vpr_h(inst, "%s: no playload available for packet %#x\n", + func, pkt->type); + return false; + } + + switch (pkt->payload_info) { + case HFI_PAYLOAD_U32: + case HFI_PAYLOAD_S32: + case HFI_PAYLOAD_Q16: + case HFI_PAYLOAD_U32_ENUM: + case HFI_PAYLOAD_32_PACKED: + payload_size = 4; + break; + case HFI_PAYLOAD_U64: + case HFI_PAYLOAD_S64: + case HFI_PAYLOAD_64_PACKED: + payload_size = 8; + break; + case HFI_PAYLOAD_STRUCTURE: + if (pkt->type == HFI_CMD_BUFFER) + payload_size = sizeof(struct hfi_buffer); + break; + default: + payload_size = 0; + break; + } + + if (pkt->size < sizeof(struct hfi_packet) + payload_size) { + i_vpr_e(inst, + "%s: invalid payload size %u payload type %#x for packet %#x\n", + func, pkt->size, pkt->payload_info, pkt->type); + return false; + } + + return true; +} + static bool check_last_flag(struct msm_vidc_inst *inst, struct hfi_packet *pkt) { @@ -1004,6 +1063,11 @@ static int handle_session_buffer(struct msm_vidc_inst *inst, return 0; } + if (!check_for_packet_payload(inst, pkt, __func__)) { + msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); + return 0; + } + buffer = (struct hfi_buffer *)((u8 *)pkt + sizeof(struct hfi_packet)); if (!is_valid_hfi_buffer_type(inst, buffer->type, __func__)) { msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); @@ -1193,7 +1257,7 @@ static int handle_session_property(struct msm_vidc_inst *inst, { int rc = 0; u32 port; - u32 *payload_ptr; + u32 *payload_ptr = NULL; if (!inst || !inst->capabilities) { d_vpr_e("%s: Invalid params\n", __func__); @@ -1209,7 +1273,20 @@ static int handle_session_property(struct msm_vidc_inst *inst, __func__, pkt->port, pkt->type); return -EINVAL; } - payload_ptr = (u32 *)((u8 *)pkt + sizeof(struct hfi_packet)); + + if (pkt->payload_info != HFI_PAYLOAD_NONE) { + if (!check_for_packet_payload(inst, pkt, __func__)) + return 0; + + payload_ptr = (u32 *)((u8 *)pkt + sizeof(struct hfi_packet)); + } + + if (pkt->flags & HFI_FW_FLAGS_INFORMATION) { + i_vpr_h(inst, + "%s: information flag received for property %#x packet\n", + __func__, pkt->type); + return 0; + } switch (pkt->type) { case HFI_PROP_BITSTREAM_RESOLUTION: From 2c0cab51463409af2ba55da2fccdd48180973057 Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Wed, 14 Apr 2021 06:42:50 -0700 Subject: [PATCH 0245/1061] video: driver: add ROI metadata support add extra size for input meta buffer when ROI metadata is enabled. add dependency of rate control and color format. Change-Id: Icefd3f9e319d596f88090cee331417c0b2946180 Signed-off-by: Darshana Patil --- driver/platform/waipio/src/msm_vidc_waipio.c | 18 ++++++--- driver/vidc/inc/msm_vidc_control.h | 1 + driver/vidc/inc/msm_vidc_driver.h | 3 +- driver/vidc/src/msm_vidc_buffer.c | 40 +++++++++++++++++++- driver/vidc/src/msm_vidc_control.c | 32 ++++++++++++++++ 5 files changed, 87 insertions(+), 7 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index d2288691de..0272b12e2e 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -119,7 +119,11 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { MSM_VIDC_FMT_NV12C, MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C | MSM_VIDC_FMT_RGBA8888 | MSM_VIDC_FMT_RGBA8888C, - MSM_VIDC_FMT_NV12C}, + MSM_VIDC_FMT_NV12C, + 0, 0, + CAP_FLAG_ROOT, + {0}, + {META_ROI_INFO}}, {PIX_FMTS, ENC, HEVC, MSM_VIDC_FMT_NV12, MSM_VIDC_FMT_TP10C, @@ -130,7 +134,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 0, 0, CAP_FLAG_ROOT, {0}, - {PROFILE, MIN_FRAME_QP, MAX_FRAME_QP, I_FRAME_QP}}, + {PROFILE, MIN_FRAME_QP, MAX_FRAME_QP, I_FRAME_QP, META_ROI_INFO}}, {PIX_FMTS, DEC, HEVC|HEIC, MSM_VIDC_FMT_NV12, @@ -335,7 +339,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {LTR_COUNT, IR_RANDOM, TIME_DELTA_BASED_RC, I_FRAME_QP, ENH_LAYER_COUNT, BIT_RATE, CONTENT_ADAPTIVE_CODING, BITRATE_BOOST, MIN_QUALITY, VBV_DELAY, PEAK_BITRATE, - SLICE_MODE}, + SLICE_MODE, META_ROI_INFO}, msm_vidc_adjust_bitrate_mode, msm_vidc_set_u32_enum}, {BITRATE_MODE, ENC, HEVC, @@ -353,7 +357,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { CONSTANT_QUALITY, ENH_LAYER_COUNT, CONTENT_ADAPTIVE_CODING, BIT_RATE, BITRATE_BOOST, MIN_QUALITY, VBV_DELAY, - PEAK_BITRATE, SLICE_MODE}, + PEAK_BITRATE, SLICE_MODE, META_ROI_INFO}, msm_vidc_adjust_bitrate_mode, msm_vidc_set_u32_enum}, {LOSSLESS, ENC, HEVC|HEIC, @@ -1290,7 +1294,11 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_ROI_INFO, - HFI_PROP_ROI_INFO}, + HFI_PROP_ROI_INFO, + CAP_FLAG_INPUT_PORT, + {BITRATE_MODE, PIX_FMTS}, + {0}, + msm_vidc_adjust_roi_info, NULL}, /* configure image properties */ {FRAME_WIDTH, ENC, HEIC, 512, 16384, 1, 16384}, diff --git a/driver/vidc/inc/msm_vidc_control.h b/driver/vidc/inc/msm_vidc_control.h index 484d16e494..45356d23df 100644 --- a/driver/vidc/inc/msm_vidc_control.h +++ b/driver/vidc/inc/msm_vidc_control.h @@ -39,6 +39,7 @@ int msm_vidc_adjust_hevc_max_qp(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_hevc_frame_qp(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_v4l2_properties(struct msm_vidc_inst *inst); int msm_vidc_adjust_session_priority(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_roi_info(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_set_header_mode(void *instance, enum msm_vidc_inst_capability_type cap_id); diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index febced5113..3851703c14 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -87,7 +87,8 @@ static inline bool is_input_meta_enabled(struct msm_vidc_inst *inst) } else if (is_encode_session(inst)) { enabled = (inst->capabilities->cap[META_SEQ_HDR_NAL].value || inst->capabilities->cap[META_EVA_STATS].value || - inst->capabilities->cap[META_BUF_TAG].value); + inst->capabilities->cap[META_BUF_TAG].value || + inst->capabilities->cap[META_ROI_INFO].value); } return enabled; } diff --git a/driver/vidc/src/msm_vidc_buffer.c b/driver/vidc/src/msm_vidc_buffer.c index e0e7fb2374..865c3c8e5a 100644 --- a/driver/vidc/src/msm_vidc_buffer.c +++ b/driver/vidc/src/msm_vidc_buffer.c @@ -340,9 +340,47 @@ skip_calc: return ALIGN(frame_size, SZ_4K); } +static inline u32 ROI_METADATA_SIZE( + u32 width, u32 height, u32 lcu_size) { + u32 lcu_width = 0; + u32 lcu_height = 0; + u32 n_shift = 0; + + while (lcu_size && !(lcu_size & 0x1)) { + n_shift++; + lcu_size = lcu_size >> 1; + } + lcu_width = (width + (lcu_size - 1)) >> n_shift; + lcu_height = (height + (lcu_size - 1)) >> n_shift; + + return (((lcu_width + 7) >> 3) << 3) * lcu_height * 2; +} + u32 msm_vidc_encoder_input_meta_size(struct msm_vidc_inst *inst) { - return ALIGN(1 * 1024 * 1024, SZ_4K); + u32 size = 0; + u32 lcu_size = 0; + struct v4l2_format *f; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return 0; + } + + size = ALIGN(16 * 1024, SZ_4K); + + if (inst->capabilities->cap[META_ROI_INFO].value) { + lcu_size = 16; + + f = &inst->fmts[OUTPUT_PORT]; + if (f->fmt.pix_mp.pixelformat == V4L2_PIX_FMT_HEVC) + lcu_size = 32; + + f = &inst->fmts[INPUT_PORT]; + size += ROI_METADATA_SIZE(f->fmt.pix_mp.width, + f->fmt.pix_mp.height, lcu_size); + } + return size; } u32 msm_vidc_encoder_output_meta_size(struct msm_vidc_inst *inst) diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 576c72186b..dbf2392e6a 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -1629,6 +1629,38 @@ int msm_vidc_adjust_session_priority(void *instance, struct v4l2_ctrl *ctrl) return rc; } +int msm_vidc_adjust_roi_info(void *instance, struct v4l2_ctrl *ctrl) +{ + struct msm_vidc_inst_capability *capability; + s32 adjusted_value; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + s32 rc_type = -1, pix_fmt = -1; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + adjusted_value = ctrl ? ctrl->val : capability->cap[META_ROI_INFO].value; + + if (msm_vidc_get_parent_value(inst, META_ROI_INFO, BITRATE_MODE, + &rc_type, __func__)) + return -EINVAL; + + if (msm_vidc_get_parent_value(inst, META_ROI_INFO, PIX_FMTS, + &pix_fmt, __func__)) + return -EINVAL; + + if (rc_type != HFI_RC_VBR_CFR || !is_8bit_colorformat(pix_fmt)) + adjusted_value = 0; + + msm_vidc_update_cap_value(inst, META_ROI_INFO, + adjusted_value, __func__); + + return 0; +} + /* * Loop over instance capabilities with CAP_FLAG_ROOT * and call adjust function, where From bdd7a33bfbf39b8b0dce06126f70e0aac46f5bb8 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Fri, 16 Apr 2021 14:33:34 +0530 Subject: [PATCH 0246/1061] video: driver: refine refcount handling for release buffer If current qbuf entry is already present in release buffer list, then as part of release done, refcount will get decremented and for current qbuf, there is 2 possibilities of outputs from fw. FBD with RO and wo RO. So if firmware gives FBD with RO, we are currently decrementing refcount from 1 -> 0. So mapping gets destroyed. But firmware is still holding RO referrence and leading to smmu fault issues. So added hadling to increment recount by 1, if current buffer(qbuf) is already present in release buf list. Change-Id: Icbe8ce0b1c9b47c4450d17650b63a575e1037ce3 Signed-off-by: Govindaraj Rajagopal --- driver/vidc/src/msm_vidc_driver.c | 11 +++++++++++ driver/vidc/src/venus_hfi_response.c | 2 +- 2 files changed, 12 insertions(+), 1 deletion(-) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 84178e080f..4592d78224 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -2159,6 +2159,7 @@ int msm_vidc_map_driver_buf(struct msm_vidc_inst *inst, int rc = 0; struct msm_vidc_mappings *mappings; struct msm_vidc_map *map; + struct msm_vidc_buffer *rel_buf; bool found = false; if (!inst || !buf) { @@ -2204,6 +2205,16 @@ int msm_vidc_map_driver_buf(struct msm_vidc_inst *inst, } } list_add_tail(&map->list, &mappings->list); + } else { + /* increment map ref_count, if buf already present in release list */ + list_for_each_entry(rel_buf, &inst->buffers.release.list, list) { + if (rel_buf->device_addr == buf->device_addr) { + rc = msm_vidc_memory_map(inst->core, map); + if (rc) + return rc; + break; + } + } } rc = msm_vidc_memory_map(inst->core, map); if (rc) diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index 551968dae2..035bfc722e 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -1356,7 +1356,7 @@ static int handle_session_property(struct msm_vidc_inst *inst, } else { i_vpr_e(inst, "%s: invalid property %#x for %s port %d dpb cap value %d\n", - __func__, is_decode_session(inst) ? "decode" : "encode", + __func__, pkt->type, is_decode_session(inst) ? "decode" : "encode", port, inst->capabilities->cap[DPB_LIST].value); } break; From a4905e8bfd0a2378ae3c973b5d12a1bc679e2a66 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Fri, 16 Apr 2021 22:02:34 +0530 Subject: [PATCH 0247/1061] video: driver: update device_addr for comparison Compare buffer with release list only after updating buffer device_addr field. Change-Id: Ie1c21fd9496fb4deb735938efeff61b90b96362f Signed-off-by: Govindaraj Rajagopal --- driver/vidc/src/msm_vidc_driver.c | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 4592d78224..c1472fa9ec 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -2205,16 +2205,6 @@ int msm_vidc_map_driver_buf(struct msm_vidc_inst *inst, } } list_add_tail(&map->list, &mappings->list); - } else { - /* increment map ref_count, if buf already present in release list */ - list_for_each_entry(rel_buf, &inst->buffers.release.list, list) { - if (rel_buf->device_addr == buf->device_addr) { - rc = msm_vidc_memory_map(inst->core, map); - if (rc) - return rc; - break; - } - } } rc = msm_vidc_memory_map(inst->core, map); if (rc) @@ -2222,6 +2212,16 @@ int msm_vidc_map_driver_buf(struct msm_vidc_inst *inst, buf->device_addr = map->device_addr; + /* increment map ref_count, if buf already present in release list */ + list_for_each_entry(rel_buf, &inst->buffers.release.list, list) { + if (rel_buf->device_addr == buf->device_addr) { + rc = msm_vidc_memory_map(inst->core, map); + if (rc) + return rc; + break; + } + } + return 0; } From 7611922612fdeb9e4bd2deac9c2bcedd586d5576 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Fri, 16 Apr 2021 11:48:24 -0700 Subject: [PATCH 0248/1061] video: driver: Add support for enc downscaling Add support to encode bitstream with downscaled resolution. Change-Id: I04ab289758e1d1566924ec4b017e6d081c8f01aa Signed-off-by: Akshata Sahukar --- driver/vidc/src/msm_venc.c | 79 +++++++++++++++++++++++++++++++------- 1 file changed, 65 insertions(+), 14 deletions(-) diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index a1e7b80b28..39ff6a5e9d 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -29,6 +29,7 @@ static const u32 msm_venc_input_set_prop[] = { static const u32 msm_venc_output_set_prop[] = { HFI_PROP_BITSTREAM_RESOLUTION, HFI_PROP_CROP_OFFSETS, + HFI_PROP_SCALAR, HFI_PROP_BUFFER_HOST_MAX_COUNT, HFI_PROP_CSC, }; @@ -237,12 +238,12 @@ static int msm_venc_set_crop_offsets(struct msm_vidc_inst *inst, return -EINVAL; } - left_offset = inst->crop.left; - top_offset = inst->crop.top; + left_offset = inst->compose.left; + top_offset = inst->compose.top; right_offset = (inst->fmts[port].fmt.pix_mp.width - - inst->crop.width); + inst->compose.width); bottom_offset = (inst->fmts[port].fmt.pix_mp.height - - inst->crop.height); + inst->compose.height); if (is_image_session(inst)) right_offset = bottom_offset = 0; @@ -265,6 +266,43 @@ static int msm_venc_set_crop_offsets(struct msm_vidc_inst *inst, return 0; } +static int msm_venc_set_scalar(struct msm_vidc_inst *inst, + enum msm_vidc_port_type port) +{ + int rc = 0; + u32 scalar = 0; + + if (port != OUTPUT_PORT) { + i_vpr_e(inst, "%s: invalid port %d\n", __func__, port); + return -EINVAL; + } + + if (inst->crop.left != inst->compose.left || + inst->crop.top != inst->compose.top || + inst->crop.width != inst->compose.width || + inst->crop.height != inst->compose.height) { + scalar = 1; + i_vpr_h(inst, + "%s: crop: l %d t %d w %d h %d compose: l %d t %d w %d h %d\n", + __func__, inst->crop.left, inst->crop.top, + inst->crop.width, inst->crop.height, + inst->compose.left, inst->compose.top, + inst->compose.width, inst->compose.height); + } + + i_vpr_h(inst, "%s: scalar: %d\n", __func__, scalar); + rc = venus_hfi_session_property(inst, + HFI_PROP_SCALAR, + HFI_HOST_FLAGS_NONE, + get_hfi_port(inst, port), + HFI_PAYLOAD_64_PACKED, + &scalar, + sizeof(u64)); + if (rc) + return rc; + return 0; +} + static int msm_venc_set_host_max_buf_count(struct msm_vidc_inst *inst, enum msm_vidc_port_type port) { @@ -515,6 +553,7 @@ static int msm_venc_set_output_properties(struct msm_vidc_inst *inst) static const struct msm_venc_prop_type_handle prop_type_handle_arr[] = { {HFI_PROP_BITSTREAM_RESOLUTION, msm_venc_set_bitstream_resolution }, {HFI_PROP_CROP_OFFSETS, msm_venc_set_crop_offsets }, + {HFI_PROP_SCALAR, msm_venc_set_scalar }, {HFI_PROP_BUFFER_HOST_MAX_COUNT, msm_venc_set_host_max_buf_count }, {HFI_PROP_CSC, msm_venc_set_csc }, }; @@ -1096,8 +1135,8 @@ static int msm_venc_s_fmt_output(struct msm_vidc_inst *inst, struct v4l2_format codec_align = (f->fmt.pix_mp.pixelformat == V4L2_PIX_FMT_HEVC || f->fmt.pix_mp.pixelformat == V4L2_PIX_FMT_HEIC) ? 32 : 16; /* width, height is readonly for client */ - fmt->fmt.pix_mp.width = ALIGN(inst->crop.width, codec_align); - fmt->fmt.pix_mp.height = ALIGN(inst->crop.height, codec_align); + fmt->fmt.pix_mp.width = ALIGN(inst->compose.width, codec_align); + fmt->fmt.pix_mp.height = ALIGN(inst->compose.height, codec_align); /* use grid dimension for image session */ if (is_image_session(inst)) fmt->fmt.pix_mp.width = fmt->fmt.pix_mp.height = HEIC_GRID_DIMENSION; @@ -1432,14 +1471,10 @@ int msm_venc_s_selection(struct msm_vidc_inst* inst, struct v4l2_selection* s) inst->crop.width = s->r.width; inst->crop.height = s->r.height; /* adjust compose such that it is within crop */ - if (inst->compose.left < inst->crop.left) - inst->compose.left = inst->crop.left; - if (inst->compose.top < inst->crop.top) - inst->compose.top = inst->crop.top; - if (inst->compose.width > inst->crop.width) - inst->compose.width = inst->crop.width; - if (inst->compose.height > inst->crop.height) - inst->compose.height = inst->crop.height; + inst->compose.left = inst->crop.left; + inst->compose.top = inst->crop.top; + inst->compose.width = inst->crop.width; + inst->compose.height = inst->crop.height; /* update output format based on new crop dimensions */ output_fmt = &inst->fmts[OUTPUT_PORT]; rc = msm_venc_s_fmt_output(inst, output_fmt); @@ -1484,6 +1519,18 @@ int msm_venc_s_selection(struct msm_vidc_inst* inst, struct v4l2_selection* s) inst->compose.top = s->r.top; inst->compose.width = s->r.width; inst->compose.height= s->r.height; + + /* update output format based on new compose dimensions */ + output_fmt = &inst->fmts[OUTPUT_PORT]; + rc = msm_venc_s_fmt_output(inst, output_fmt); + if (rc) + return rc; + i_vpr_h(inst, + "%s: type %d: format %#x width %d height %d size %d\n", + __func__, output_fmt->type, output_fmt->fmt.pix_mp.pixelformat, + output_fmt->fmt.pix_mp.width, + output_fmt->fmt.pix_mp.height, + output_fmt->fmt.pix_mp.plane_fmt[0].sizeimage); break; default: i_vpr_e(inst, "%s: invalid target %d\n", @@ -1790,6 +1837,10 @@ int msm_venc_inst_init(struct msm_vidc_inst *inst) inst->crop.width = f->fmt.pix_mp.width; inst->crop.height = f->fmt.pix_mp.height; + inst->compose.left = inst->compose.top = 0; + inst->compose.width = f->fmt.pix_mp.width; + inst->compose.height = f->fmt.pix_mp.height; + f = &inst->fmts[OUTPUT_META_PORT]; f->type = OUTPUT_META_PLANE; f->fmt.meta.dataformat = V4L2_META_FMT_VIDC; From 3964d13a63e0602bc16857a4d51993e872ce2f23 Mon Sep 17 00:00:00 2001 From: Chinmay Sawarkar Date: Mon, 12 Apr 2021 21:46:49 -0700 Subject: [PATCH 0249/1061] video: driver: Fix bin buffer allocation in secure usecase In Secure session, BIN buffer should be allocated from Secure Bitstream region. Allocated buffer must be hypassigned using the DMA buffer Lend call. Change-Id: If5303e78975aab55ac7475ca3ac9f6272585a44b Signed-off-by: Chinmay Sawarkar --- driver/vidc/src/msm_vidc_driver.c | 2 ++ driver/vidc/src/msm_vidc_memory.c | 25 +++++++++++++++++++++++-- 2 files changed, 25 insertions(+), 2 deletions(-) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 84178e080f..2c9569db9b 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -881,6 +881,8 @@ u32 msm_vidc_get_buffer_region(struct msm_vidc_inst *inst, region = MSM_VIDC_SECURE_PIXEL; break; case MSM_VIDC_BUF_BIN: + region = MSM_VIDC_SECURE_BITSTREAM; + break; case MSM_VIDC_BUF_ARP: case MSM_VIDC_BUF_COMV: case MSM_VIDC_BUF_NON_COMV: diff --git a/driver/vidc/src/msm_vidc_memory.c b/driver/vidc/src/msm_vidc_memory.c index 8eeb77d3dd..f5fdb4a884 100644 --- a/driver/vidc/src/msm_vidc_memory.c +++ b/driver/vidc/src/msm_vidc_memory.c @@ -7,8 +7,8 @@ #include #include #include -#include -#include +#include +#include #include "msm_vidc_memory.h" #include "msm_vidc_debug.h" @@ -209,6 +209,9 @@ int msm_vidc_memory_alloc(struct msm_vidc_core *core, struct msm_vidc_alloc *mem int size = 0; struct dma_heap *heap; char *heap_name = NULL; + struct mem_buf_lend_kernel_arg lend_arg; + int vmids[1]; + int perms[1]; if (!mem) { d_vpr_e("%s: invalid params\n", __func__); @@ -226,6 +229,8 @@ int msm_vidc_memory_alloc(struct msm_vidc_core *core, struct msm_vidc_alloc *mem heap_name = "qcom,secure-non-pixel"; break; case MSM_VIDC_SECURE_BITSTREAM: + heap_name = "qcom,system"; + break; default: d_vpr_e("invalid secure region : %#x\n", mem->region); return -EINVAL; @@ -243,6 +248,22 @@ int msm_vidc_memory_alloc(struct msm_vidc_core *core, struct msm_vidc_alloc *mem goto error; } + if (mem->secure && mem->type == MSM_VIDC_BUF_BIN) + { + vmids[0] = VMID_CP_BITSTREAM; + perms[0] = PERM_READ | PERM_WRITE; + + lend_arg.nr_acl_entries = ARRAY_SIZE(vmids); + lend_arg.vmids = vmids; + lend_arg.perms = perms; + + rc = mem_buf_lend(mem->dmabuf, &lend_arg); + if (rc) { + d_vpr_e("%s: BIN dmabuf %pK LEND failed, rc %d heap %s\n", + __func__, mem->dmabuf, rc, heap_name); + } + } + if (mem->map_kernel) { dma_buf_begin_cpu_access(mem->dmabuf, DMA_BIDIRECTIONAL); mem->kvaddr = dma_buf_vmap(mem->dmabuf); From 0f066190b1758f7311473aaf524f90c95afe49d2 Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Fri, 16 Apr 2021 20:49:04 -0700 Subject: [PATCH 0250/1061] video: driver: handle release during batching Before output buffer is queued to FW, checking if it is pending release and refcount accordingly. The check needs to be added just before queueing to FW to handle batch usecase as well. Change-Id: I2d394b5642ed8fa916e86ebc59ea414300415fab Signed-off-by: Darshana Patil --- driver/vidc/src/msm_vidc_driver.c | 37 +++++++++++++++++++++---------- driver/vidc/src/msm_vidc_memory.c | 11 +++++---- 2 files changed, 30 insertions(+), 18 deletions(-) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index c1472fa9ec..5bb649254c 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -2159,7 +2159,6 @@ int msm_vidc_map_driver_buf(struct msm_vidc_inst *inst, int rc = 0; struct msm_vidc_mappings *mappings; struct msm_vidc_map *map; - struct msm_vidc_buffer *rel_buf; bool found = false; if (!inst || !buf) { @@ -2212,16 +2211,6 @@ int msm_vidc_map_driver_buf(struct msm_vidc_inst *inst, buf->device_addr = map->device_addr; - /* increment map ref_count, if buf already present in release list */ - list_for_each_entry(rel_buf, &inst->buffers.release.list, list) { - if (rel_buf->device_addr == buf->device_addr) { - rc = msm_vidc_memory_map(inst->core, map); - if (rc) - return rc; - break; - } - } - return 0; } @@ -2492,8 +2481,10 @@ exit: static int msm_vidc_queue_buffer(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buf) { - struct msm_vidc_buffer *meta; + struct msm_vidc_buffer *meta, *rel_buf; + struct msm_vidc_map *map; int rc = 0; + bool found = false; if (!inst || !buf || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); @@ -2510,6 +2501,28 @@ static int msm_vidc_queue_buffer(struct msm_vidc_inst *inst, struct msm_vidc_buf rc = msm_vidc_process_readonly_buffers(inst, buf); if (rc) return rc; + + list_for_each_entry(map, &inst->mappings.output.list, list) { + if (map->dmabuf == buf->dmabuf) { + found = true; + break; + } + } + + if (!found) { + print_vidc_buffer(VIDC_ERR, "err ", "missing map", inst, buf); + return -EINVAL; + } + + /* increment map ref_count, if buf already present in release list */ + list_for_each_entry(rel_buf, &inst->buffers.release.list, list) { + if (rel_buf->device_addr == buf->device_addr) { + rc = msm_vidc_memory_map(inst->core, map); + if (rc) + return rc; + break; + } + } } print_vidc_buffer(VIDC_HIGH, "high", "qbuf", inst, buf); diff --git a/driver/vidc/src/msm_vidc_memory.c b/driver/vidc/src/msm_vidc_memory.c index 8eeb77d3dd..c4fc709fd1 100644 --- a/driver/vidc/src/msm_vidc_memory.c +++ b/driver/vidc/src/msm_vidc_memory.c @@ -98,7 +98,7 @@ int msm_vidc_memory_map(struct msm_vidc_core *core, struct msm_vidc_map *map) if (map->refcount) { map->refcount++; - return 0; + goto exit; } cb = get_context_bank(core, map->region); @@ -153,12 +153,11 @@ int msm_vidc_memory_map(struct msm_vidc_core *core, struct msm_vidc_map *map) map->attach = attach; map->refcount++; +exit: d_vpr_l( "%s: type %11s, device_addr %#x, refcount %d, region %d\n", __func__, buf_name(map->type), map->device_addr, map->refcount, map->region); - return 0; - error_sg: dma_buf_unmap_attachment(attach, table, DMA_BIDIRECTIONAL); error_table: @@ -185,13 +184,13 @@ int msm_vidc_memory_unmap(struct msm_vidc_core *core, return -EINVAL; } - if (map->refcount) - goto exit; - d_vpr_l( "%s: type %11s, device_addr %#x, refcount %d, region %d\n", __func__, buf_name(map->type), map->device_addr, map->refcount, map->region); + if (map->refcount) + goto exit; + dma_buf_unmap_attachment(map->attach, map->table, DMA_BIDIRECTIONAL); dma_buf_detach(map->dmabuf, map->attach); From abe44a0089e3bd266624ca049557ed95f7b7bde7 Mon Sep 17 00:00:00 2001 From: Maheshwar Ajja Date: Mon, 19 Apr 2021 15:25:59 -0700 Subject: [PATCH 0251/1061] Revert "video: driver: handle release during batching" This reverts commit 0f066190b1758f7311473aaf524f90c95afe49d2. --- driver/vidc/src/msm_vidc_driver.c | 37 ++++++++++--------------------- driver/vidc/src/msm_vidc_memory.c | 11 ++++----- 2 files changed, 18 insertions(+), 30 deletions(-) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 8f7a28f7bc..abd0c69ad0 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -2161,6 +2161,7 @@ int msm_vidc_map_driver_buf(struct msm_vidc_inst *inst, int rc = 0; struct msm_vidc_mappings *mappings; struct msm_vidc_map *map; + struct msm_vidc_buffer *rel_buf; bool found = false; if (!inst || !buf) { @@ -2213,6 +2214,16 @@ int msm_vidc_map_driver_buf(struct msm_vidc_inst *inst, buf->device_addr = map->device_addr; + /* increment map ref_count, if buf already present in release list */ + list_for_each_entry(rel_buf, &inst->buffers.release.list, list) { + if (rel_buf->device_addr == buf->device_addr) { + rc = msm_vidc_memory_map(inst->core, map); + if (rc) + return rc; + break; + } + } + return 0; } @@ -2483,10 +2494,8 @@ exit: static int msm_vidc_queue_buffer(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buf) { - struct msm_vidc_buffer *meta, *rel_buf; - struct msm_vidc_map *map; + struct msm_vidc_buffer *meta; int rc = 0; - bool found = false; if (!inst || !buf || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); @@ -2503,28 +2512,6 @@ static int msm_vidc_queue_buffer(struct msm_vidc_inst *inst, struct msm_vidc_buf rc = msm_vidc_process_readonly_buffers(inst, buf); if (rc) return rc; - - list_for_each_entry(map, &inst->mappings.output.list, list) { - if (map->dmabuf == buf->dmabuf) { - found = true; - break; - } - } - - if (!found) { - print_vidc_buffer(VIDC_ERR, "err ", "missing map", inst, buf); - return -EINVAL; - } - - /* increment map ref_count, if buf already present in release list */ - list_for_each_entry(rel_buf, &inst->buffers.release.list, list) { - if (rel_buf->device_addr == buf->device_addr) { - rc = msm_vidc_memory_map(inst->core, map); - if (rc) - return rc; - break; - } - } } print_vidc_buffer(VIDC_HIGH, "high", "qbuf", inst, buf); diff --git a/driver/vidc/src/msm_vidc_memory.c b/driver/vidc/src/msm_vidc_memory.c index fee620d48a..f5fdb4a884 100644 --- a/driver/vidc/src/msm_vidc_memory.c +++ b/driver/vidc/src/msm_vidc_memory.c @@ -98,7 +98,7 @@ int msm_vidc_memory_map(struct msm_vidc_core *core, struct msm_vidc_map *map) if (map->refcount) { map->refcount++; - goto exit; + return 0; } cb = get_context_bank(core, map->region); @@ -153,11 +153,12 @@ int msm_vidc_memory_map(struct msm_vidc_core *core, struct msm_vidc_map *map) map->attach = attach; map->refcount++; -exit: d_vpr_l( "%s: type %11s, device_addr %#x, refcount %d, region %d\n", __func__, buf_name(map->type), map->device_addr, map->refcount, map->region); + return 0; + error_sg: dma_buf_unmap_attachment(attach, table, DMA_BIDIRECTIONAL); error_table: @@ -184,13 +185,13 @@ int msm_vidc_memory_unmap(struct msm_vidc_core *core, return -EINVAL; } + if (map->refcount) + goto exit; + d_vpr_l( "%s: type %11s, device_addr %#x, refcount %d, region %d\n", __func__, buf_name(map->type), map->device_addr, map->refcount, map->region); - if (map->refcount) - goto exit; - dma_buf_unmap_attachment(map->attach, map->table, DMA_BIDIRECTIONAL); dma_buf_detach(map->dmabuf, map->attach); From ebf199bf2fe4ed3d4b117d133089d1820b689f60 Mon Sep 17 00:00:00 2001 From: Maheshwar Ajja Date: Mon, 19 Apr 2021 15:26:24 -0700 Subject: [PATCH 0252/1061] Revert "video: driver: update device_addr for comparison" This reverts commit a4905e8bfd0a2378ae3c973b5d12a1bc679e2a66. --- driver/vidc/src/msm_vidc_driver.c | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index abd0c69ad0..0d9740383b 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -2207,6 +2207,16 @@ int msm_vidc_map_driver_buf(struct msm_vidc_inst *inst, } } list_add_tail(&map->list, &mappings->list); + } else { + /* increment map ref_count, if buf already present in release list */ + list_for_each_entry(rel_buf, &inst->buffers.release.list, list) { + if (rel_buf->device_addr == buf->device_addr) { + rc = msm_vidc_memory_map(inst->core, map); + if (rc) + return rc; + break; + } + } } rc = msm_vidc_memory_map(inst->core, map); if (rc) @@ -2214,16 +2224,6 @@ int msm_vidc_map_driver_buf(struct msm_vidc_inst *inst, buf->device_addr = map->device_addr; - /* increment map ref_count, if buf already present in release list */ - list_for_each_entry(rel_buf, &inst->buffers.release.list, list) { - if (rel_buf->device_addr == buf->device_addr) { - rc = msm_vidc_memory_map(inst->core, map); - if (rc) - return rc; - break; - } - } - return 0; } From da6943c26a8fa2d7ee3d7c1041b1c1327e09da47 Mon Sep 17 00:00:00 2001 From: Maheshwar Ajja Date: Mon, 19 Apr 2021 15:26:37 -0700 Subject: [PATCH 0253/1061] Revert "video: driver: refine refcount handling for release buffer" This reverts commit bdd7a33bfbf39b8b0dce06126f70e0aac46f5bb8. --- driver/vidc/src/msm_vidc_driver.c | 11 ----------- driver/vidc/src/venus_hfi_response.c | 2 +- 2 files changed, 1 insertion(+), 12 deletions(-) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 0d9740383b..2c9569db9b 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -2161,7 +2161,6 @@ int msm_vidc_map_driver_buf(struct msm_vidc_inst *inst, int rc = 0; struct msm_vidc_mappings *mappings; struct msm_vidc_map *map; - struct msm_vidc_buffer *rel_buf; bool found = false; if (!inst || !buf) { @@ -2207,16 +2206,6 @@ int msm_vidc_map_driver_buf(struct msm_vidc_inst *inst, } } list_add_tail(&map->list, &mappings->list); - } else { - /* increment map ref_count, if buf already present in release list */ - list_for_each_entry(rel_buf, &inst->buffers.release.list, list) { - if (rel_buf->device_addr == buf->device_addr) { - rc = msm_vidc_memory_map(inst->core, map); - if (rc) - return rc; - break; - } - } } rc = msm_vidc_memory_map(inst->core, map); if (rc) diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index 035bfc722e..551968dae2 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -1356,7 +1356,7 @@ static int handle_session_property(struct msm_vidc_inst *inst, } else { i_vpr_e(inst, "%s: invalid property %#x for %s port %d dpb cap value %d\n", - __func__, pkt->type, is_decode_session(inst) ? "decode" : "encode", + __func__, is_decode_session(inst) ? "decode" : "encode", port, inst->capabilities->cap[DPB_LIST].value); } break; From 09356ed279da8eb325de89b9c61f3c3546c0e99b Mon Sep 17 00:00:00 2001 From: Maheshwar Ajja Date: Mon, 19 Apr 2021 18:03:32 -0700 Subject: [PATCH 0254/1061] video: driver: amend delayed unmap feature Due to delayed unmap feature on decoder output buffers, refcount will become one when no one uses the buffer in driver. In release done functonality, remove the buffer from maps list only if refcount equal to one. If refcount is more than one indicates the buffer is being used, so do not remove from maps list. There are chances that same decoder output buffer might be queued by the client in which case we are not supposed to unmap it from maps list in release done. Change-Id: I69250c3efa89d77055e89770fd441af1fb50b755 Signed-off-by: Maheshwar Ajja --- driver/vidc/inc/msm_vidc_driver.h | 4 +++ driver/vidc/inc/msm_vidc_internal.h | 2 +- driver/vidc/src/msm_vdec.c | 25 +++++++++++-- driver/vidc/src/msm_vidc_driver.c | 53 +++++++++++++++++++++++++--- driver/vidc/src/msm_vidc_memory.c | 9 ++--- driver/vidc/src/venus_hfi_response.c | 2 +- 6 files changed, 83 insertions(+), 12 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 3851703c14..36a308c80b 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -314,6 +314,10 @@ int msm_vidc_map_driver_buf(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buf); int msm_vidc_put_driver_buf(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buf); +int msm_vidc_get_delayed_unmap(struct msm_vidc_inst *inst, + struct msm_vidc_map *map); +int msm_vidc_put_delayed_unmap(struct msm_vidc_inst *inst, + struct msm_vidc_map *map); int msm_vidc_queue_buffer_single(struct msm_vidc_inst *inst, struct vb2_buffer *vb2); int msm_vidc_destroy_internal_buffer(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buffer); diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 14a11fb655..649ac36262 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -123,7 +123,7 @@ /* * MAX_MAPPED_OUTPUT_COUNT: maximum mappings which can * be present in output map list with refcount 1. These - * mappings exist due to lazy unmap feature. Current + * mappings exist due to delayed unmap feature. Current * threshold is kept as 50 to handle vpp usecases * which might have many output buffers. */ diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 45ecc5c1a5..5f227d70b6 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -1866,6 +1866,8 @@ int msm_vdec_handle_release_buffer(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buf) { int rc = 0; + struct msm_vidc_map *map; + bool found; if (!inst || !buf) { d_vpr_e("%s: invalid params\n", __func__); @@ -1873,7 +1875,26 @@ int msm_vdec_handle_release_buffer(struct msm_vidc_inst *inst, } print_vidc_buffer(VIDC_HIGH, "high", "release done", inst, buf); - msm_vidc_unmap_driver_buf(inst, buf); + + found = false; + list_for_each_entry(map, &inst->mappings.output.list, list) { + if (map->device_addr == buf->device_addr) { + found = true; + break; + } + } + if (found) { + /* + * finally remove mappings if no one using it. + * refcount will be more than 1 if anyone using it. + */ + if (map->refcount == 1) { + rc = msm_vidc_put_delayed_unmap(inst, map); + if (rc) + print_vidc_buffer(VIDC_ERR, "err ", + "delayed unmap failed", inst, buf); + } + } /* delete the buffer from release list */ list_del(&buf->list); @@ -1895,7 +1916,7 @@ static int msm_vidc_unmap_excessive_mappings(struct msm_vidc_inst *inst) /* * count entries from map list whose refcount is 1 - * these are excess mappings present due to lazy + * these are excess mappings present due to delayed * unmap feature. */ list_for_each_entry(map, &inst->mappings.output.list, list) { diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 2c9569db9b..e5e9beba3f 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -2067,6 +2067,52 @@ int msm_vidc_put_map_buffer(struct msm_vidc_inst *inst, struct msm_vidc_map *map return 0; } +int msm_vidc_get_delayed_unmap(struct msm_vidc_inst *inst, struct msm_vidc_map *map) +{ + int rc = 0; + + if (!inst || !map) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + map->skip_delayed_unmap = 1; + rc = msm_vidc_memory_map(inst->core, map); + if (rc) + return rc; + + return 0; +} + +int msm_vidc_put_delayed_unmap(struct msm_vidc_inst *inst, struct msm_vidc_map *map) +{ + int rc = 0; + + if (!inst || !map) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (!map->skip_delayed_unmap) { + i_vpr_e(inst, "%s: no delayed unmap, addr %#x\n", + __func__, map->device_addr); + return -EINVAL; + } + + map->skip_delayed_unmap = 0; + rc = msm_vidc_memory_unmap(inst->core, map); + if (rc) + i_vpr_e(inst, "%s: unmap failed\n", __func__); + + if (!map->refcount) { + msm_vidc_memory_put_dmabuf(map->dmabuf); + list_del(&map->list); + msm_vidc_put_map_buffer(inst, map); + } + + return rc; +} + int msm_vidc_destroy_map_buffer(struct msm_vidc_inst *inst) { struct msm_vidc_map *map, *dummy; @@ -2173,7 +2219,7 @@ int msm_vidc_map_driver_buf(struct msm_vidc_inst *inst, return -EINVAL; /* - * new buffer: map twice for lazy unmap feature sake + * new buffer: map twice for delayed unmap feature sake * existing buffer: map once */ list_for_each_entry(map, &mappings->list, list) { @@ -2195,10 +2241,9 @@ int msm_vidc_map_driver_buf(struct msm_vidc_inst *inst, if (!map->dmabuf) return -EINVAL; map->region = msm_vidc_get_buffer_region(inst, buf->type, __func__); - /* lazy unmap feature not needed for decoder output buffers */ + /* delayed unmap feature needed for decoder output buffers */ if (is_decode_session(inst) && is_output_buffer(buf->type)) { - map->skip_delayed_unmap = 1; - rc = msm_vidc_memory_map(inst->core, map); + rc = msm_vidc_get_delayed_unmap(inst, map); if (rc) { msm_vidc_memory_put_dmabuf(map->dmabuf); msm_vidc_put_map_buffer(inst, map); diff --git a/driver/vidc/src/msm_vidc_memory.c b/driver/vidc/src/msm_vidc_memory.c index f5fdb4a884..0048b8c2f8 100644 --- a/driver/vidc/src/msm_vidc_memory.c +++ b/driver/vidc/src/msm_vidc_memory.c @@ -98,7 +98,7 @@ int msm_vidc_memory_map(struct msm_vidc_core *core, struct msm_vidc_map *map) if (map->refcount) { map->refcount++; - return 0; + goto exit; } cb = get_context_bank(core, map->region); @@ -153,6 +153,7 @@ int msm_vidc_memory_map(struct msm_vidc_core *core, struct msm_vidc_map *map) map->attach = attach; map->refcount++; +exit: d_vpr_l( "%s: type %11s, device_addr %#x, refcount %d, region %d\n", __func__, buf_name(map->type), map->device_addr, map->refcount, map->region); @@ -185,13 +186,13 @@ int msm_vidc_memory_unmap(struct msm_vidc_core *core, return -EINVAL; } - if (map->refcount) - goto exit; - d_vpr_l( "%s: type %11s, device_addr %#x, refcount %d, region %d\n", __func__, buf_name(map->type), map->device_addr, map->refcount, map->region); + if (map->refcount) + goto exit; + dma_buf_unmap_attachment(map->attach, map->table, DMA_BIDIRECTIONAL); dma_buf_detach(map->dmabuf, map->attach); diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index 551968dae2..035bfc722e 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -1356,7 +1356,7 @@ static int handle_session_property(struct msm_vidc_inst *inst, } else { i_vpr_e(inst, "%s: invalid property %#x for %s port %d dpb cap value %d\n", - __func__, is_decode_session(inst) ? "decode" : "encode", + __func__, pkt->type, is_decode_session(inst) ? "decode" : "encode", port, inst->capabilities->cap[DPB_LIST].value); } break; From 30d2ef55b44f8401f068730d5c0ef59725da67bd Mon Sep 17 00:00:00 2001 From: Maheshwar Ajja Date: Mon, 19 Apr 2021 10:27:22 -0700 Subject: [PATCH 0255/1061] video: driver: increase max buffer count Increase max buffer count to release the buffers, Change-Id: I34774a8e99c7a5c78f79e8ca101e6135a22e7f30 Signed-off-by: Maheshwar Ajja --- driver/vidc/inc/msm_vidc_internal.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 14a11fb655..e21dbd06ae 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -127,14 +127,14 @@ * threshold is kept as 50 to handle vpp usecases * which might have many output buffers. */ -#define MAX_MAPPED_OUTPUT_COUNT 50 +#define MAX_MAPPED_OUTPUT_COUNT 64 /* * max dpb count = 16 * each dpb: 4 words - * dpb list array size = 16 * 4 * dpb payload size = 16 * 4 * 4 */ -#define MAX_DPB_COUNT 16 +#define MAX_DPB_COUNT 64 #define MAX_DPB_LIST_ARRAY_SIZE (MAX_DPB_COUNT * 4) #define MAX_DPB_LIST_PAYLOAD_SIZE (MAX_DPB_COUNT * 4 * 4) From 03c7742be564e392ea51066d303b9b4372b5f329 Mon Sep 17 00:00:00 2001 From: Maheshwar Ajja Date: Wed, 21 Apr 2021 17:39:30 -0700 Subject: [PATCH 0256/1061] video: driver: handle core init failure cases Core init failure is handled properly in order to avoid undefined or unexpected errors while doing core deinitialized. Change-Id: I89e234e6d9286b993547080551ba54ee7e643e59 Signed-off-by: Maheshwar Ajja --- driver/vidc/src/venus_hfi.c | 47 ++++++++++++++++++++++++++++++++++--- 1 file changed, 44 insertions(+), 3 deletions(-) diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index d2e4e4c808..23b36f99fd 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -368,6 +368,12 @@ static int __acquire_regulator(struct msm_vidc_core *core, int rc = 0; if (rinfo->has_hw_power_collapse) { + if (!rinfo->regulator) { + d_vpr_e("%s: invalid regulator\n", __func__); + rc = -EINVAL; + goto exit; + } + if (regulator_get_mode(rinfo->regulator) == REGULATOR_MODE_NORMAL) { d_vpr_h("Skip acquire regulator %s\n", rinfo->name); @@ -409,6 +415,11 @@ static int __hand_off_regulator(struct msm_vidc_core *core, int rc = 0; if (rinfo->has_hw_power_collapse) { + if (!rinfo->regulator) { + d_vpr_e("%s: invalid regulator\n", __func__); + return -EINVAL; + } + rc = regulator_set_mode(rinfo->regulator, REGULATOR_MODE_FAST); if (rc) { @@ -479,6 +490,11 @@ static int __vote_bandwidth(struct bus_info *bus, { int rc = 0; + if (!bus->path) { + d_vpr_e("%s: invalid bus\n", __func__); + return -EINVAL; + } + d_vpr_p("Voting bus %s to ab %llu kBps\n", bus->name, bw_kbps); rc = icc_set_bw(bus->path, bw_kbps, 0); if (rc) @@ -1451,6 +1467,8 @@ void __disable_unprepare_clks(struct msm_vidc_core *core) } venus_hfi_for_each_clock_reverse(core, cl) { + if (!cl->clk) + continue; d_vpr_h("Clock: %s disable and unprepare\n", cl->name); @@ -1508,6 +1526,11 @@ static int __prepare_enable_clks(struct msm_vidc_core *core) } venus_hfi_for_each_clock(core, cl) { + if (!cl->clk) { + d_vpr_e("%s: invalid clock\n", __func__); + rc = -EINVAL; + goto fail_clk_enable; + } /* * For the clocks we control, set the rate prior to preparing * them. Since we don't really have a load at this point, scale @@ -1537,6 +1560,8 @@ static int __prepare_enable_clks(struct msm_vidc_core *core) fail_clk_enable: venus_hfi_for_each_clock_reverse_continue(core, cl, c) { + if (!cl->clk) + continue; d_vpr_e("Clock: %s disable and unprepare\n", cl->name); clk_disable_unprepare(cl->clk); @@ -1557,6 +1582,8 @@ static void __deinit_bus(struct msm_vidc_core *core) core->power.bw_llcc = 0; venus_hfi_for_each_bus_reverse(core, bus) { + if (!bus->path) + continue; icc_put(bus->path); bus->path = NULL; } @@ -1770,6 +1797,11 @@ static int __disable_regulator(struct regulator_info *rinfo, { int rc = 0; + if (!rinfo->regulator) { + d_vpr_e("%s: invalid regulator\n", __func__); + return -EINVAL; + } + d_vpr_h("Disabling regulator %s\n", rinfo->name); /* @@ -1832,6 +1864,12 @@ static int __enable_regulators(struct msm_vidc_core *core) d_vpr_h("Enabling regulators\n"); venus_hfi_for_each_regulator(core, rinfo) { + if (!rinfo->regulator) { + d_vpr_e("%s: invalid regulator\n", __func__); + rc = -EINVAL; + goto err_reg_enable_failed; + } + rc = regulator_enable(rinfo->regulator); if (rc) { d_vpr_e("Failed to enable %s: %d\n", @@ -1851,8 +1889,11 @@ static int __enable_regulators(struct msm_vidc_core *core) return 0; err_reg_enable_failed: - venus_hfi_for_each_regulator_reverse_continue(core, rinfo, c) + venus_hfi_for_each_regulator_reverse_continue(core, rinfo, c) { + if (!rinfo->regulator) + continue; __disable_regulator(rinfo, core); + } return rc; } @@ -2783,7 +2824,7 @@ int venus_hfi_core_init(struct msm_vidc_core *core) rc = __load_fw(core); if (rc) - return rc; + goto error; rc = __interface_queues_init(core); if (rc) @@ -2819,7 +2860,7 @@ int venus_hfi_core_init(struct msm_vidc_core *core) return 0; error: - d_vpr_h("%s(): failed\n", __func__); + d_vpr_e("%s(): failed\n", __func__); return rc; } From cf3fd457b3fab2d99964aa5f93368574fb40e546 Mon Sep 17 00:00:00 2001 From: Mihir Ganu Date: Wed, 21 Apr 2021 16:11:45 -0700 Subject: [PATCH 0257/1061] video: driver: Enable flip and rotation Enable encoder flip and rotation preprocessing features. Change-Id: Icb0448c2d09fbe9504e3f58701cd2653dc4559b0 Signed-off-by: Mihir Ganu Signed-off-by: Akshata Sahukar --- driver/platform/waipio/src/msm_vidc_waipio.c | 17 +- .../variant/iris2/src/msm_vidc_buffer_iris2.c | 30 ++-- driver/vidc/inc/msm_venc.h | 1 + driver/vidc/inc/msm_vidc_control.h | 4 + driver/vidc/inc/msm_vidc_driver.h | 8 + driver/vidc/src/hfi_packet.c | 4 + driver/vidc/src/msm_venc.c | 151 +++++++++--------- driver/vidc/src/msm_vidc_control.c | 48 +++++- driver/vidc/src/venus_hfi_response.c | 4 +- 9 files changed, 170 insertions(+), 97 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 0272b12e2e..fdec88710a 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -233,7 +233,11 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_HFLIP, HFI_PROP_FLIP, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, + {0}, + {0}, + NULL, msm_vidc_set_flip}, {VFLIP, ENC, CODECS_ALL, V4L2_MPEG_MSM_VIDC_DISABLE, @@ -241,13 +245,20 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_VFLIP, HFI_PROP_FLIP, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {0}, + {0}, + NULL, msm_vidc_set_flip}, {ROTATION, ENC, CODECS_ALL, 0, 270, 90, 0, V4L2_CID_ROTATE, HFI_PROP_ROTATION, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + {0}, + {0}, + NULL, msm_vidc_set_rotation}, {SUPER_FRAME, ENC, H264|HEVC, 0, 32, 1, 0, diff --git a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c index 19a16385fa..6248993519 100644 --- a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c @@ -13,6 +13,7 @@ #include "msm_vidc_driver.h" #include "msm_vidc_debug.h" #include "msm_media_info.h" +#include "msm_vidc_control.h" static u32 msm_vidc_decoder_bin_size_iris2(struct msm_vidc_inst *inst) { @@ -440,27 +441,34 @@ static u32 msm_vidc_encoder_arp_size_iris2(struct msm_vidc_inst *inst) static u32 msm_vidc_encoder_vpss_size_iris2(struct msm_vidc_inst* inst) { u32 size = 0; - bool ds_enable, rot_enable, flip_enable, is_tenbit; - u32 width, height, pixfmt; + bool ds_enable = false, is_tenbit = false; + u32 rotation_val = HFI_ROTATION_NONE; + u32 flip_val = HFI_DISABLE_FLIP; + u32 width, height, driver_colorfmt; struct v4l2_format* f; if (!inst || !inst->core || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); return 0; } - ds_enable = false; // TODO: fixme - rot_enable = false; // TODO: fixme - flip_enable = false; // TODO: fixme - f = &inst->fmts[OUTPUT_PORT]; - width = f->fmt.pix_mp.width; - height = f->fmt.pix_mp.height; + ds_enable = is_scaling_enabled(inst); + msm_vidc_v4l2_to_hfi_enum(inst, ROTATION, &rotation_val); + if (inst->capabilities->cap[HFLIP].value) + flip_val |= HFI_HORIZONTAL_FLIP; + if (inst->capabilities->cap[VFLIP].value) + flip_val = HFI_VERTICAL_FLIP; - pixfmt = inst->capabilities->cap[PIX_FMTS].value; - is_tenbit = (pixfmt == MSM_VIDC_FMT_P010 || pixfmt == MSM_VIDC_FMT_TP10C); + width = inst->compose.width; + height = inst->compose.height; + + f = &inst->fmts[INPUT_PORT]; + driver_colorfmt = v4l2_colorformat_to_driver( + f->fmt.pix_mp.pixelformat, __func__); + is_tenbit = is_10bit_colorformat(driver_colorfmt); HFI_BUFFER_VPSS_ENC(size, width, height, ds_enable, - rot_enable, flip_enable, is_tenbit); + rotation_val, flip_val, is_tenbit); i_vpr_l(inst, "%s: size %d\n", __func__, size); return size; } diff --git a/driver/vidc/inc/msm_venc.h b/driver/vidc/inc/msm_venc.h index af55a3c350..e10889ab69 100644 --- a/driver/vidc/inc/msm_venc.h +++ b/driver/vidc/inc/msm_venc.h @@ -16,6 +16,7 @@ int msm_venc_streamon_output(struct msm_vidc_inst *inst); int msm_venc_qbuf(struct msm_vidc_inst *inst, struct vb2_buffer *vb2); int msm_venc_process_cmd(struct msm_vidc_inst *inst, u32 cmd); int msm_venc_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f); +int msm_venc_s_fmt_output(struct msm_vidc_inst *inst, struct v4l2_format *f); int msm_venc_g_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f); int msm_venc_s_selection(struct msm_vidc_inst* inst, struct v4l2_selection* s); int msm_venc_g_selection(struct msm_vidc_inst* inst, struct v4l2_selection* s); diff --git a/driver/vidc/inc/msm_vidc_control.h b/driver/vidc/inc/msm_vidc_control.h index 45356d23df..7cc0635476 100644 --- a/driver/vidc/inc/msm_vidc_control.h +++ b/driver/vidc/inc/msm_vidc_control.h @@ -79,6 +79,10 @@ int msm_vidc_set_nal_length(void* instance, enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_session_priority(void *instance, enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_flip(void *instance, + enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_rotation(void *instance, + enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_s32(void *instance, enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_q16(void *instance, diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 36a308c80b..9b9ae32780 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -65,6 +65,14 @@ static inline is_output_meta_buffer(enum msm_vidc_buffer_type buffer_type) return buffer_type == MSM_VIDC_BUF_OUTPUT_META; } +static inline is_scaling_enabled(struct msm_vidc_inst *inst) +{ + return inst->crop.left != inst->compose.left || + inst->crop.top != inst->compose.top || + inst->crop.width != inst->compose.width || + inst->crop.height != inst->compose.height; +} + static inline is_internal_buffer(enum msm_vidc_buffer_type buffer_type) { return buffer_type == MSM_VIDC_BUF_BIN || diff --git a/driver/vidc/src/hfi_packet.c b/driver/vidc/src/hfi_packet.c index 230c2ff6b0..07f9c6d13f 100644 --- a/driver/vidc/src/hfi_packet.c +++ b/driver/vidc/src/hfi_packet.c @@ -154,6 +154,8 @@ u32 hfi_buf_type_from_driver(enum msm_vidc_domain_type domain, return HFI_BUFFER_DPB; case MSM_VIDC_BUF_PERSIST: return HFI_BUFFER_PERSIST; + case MSM_VIDC_BUF_VPSS: + return HFI_BUFFER_VPSS; default: d_vpr_e("invalid buffer type %d\n", buffer_type); @@ -200,6 +202,8 @@ u32 hfi_buf_type_to_driver(enum msm_vidc_domain_type domain, return MSM_VIDC_BUF_DPB; case HFI_BUFFER_PERSIST: return MSM_VIDC_BUF_PERSIST; + case HFI_BUFFER_VPSS: + return MSM_VIDC_BUF_VPSS; default: d_vpr_e("invalid buffer type %d\n", buffer_type); diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index 39ff6a5e9d..633ae356b6 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -29,7 +29,6 @@ static const u32 msm_venc_input_set_prop[] = { static const u32 msm_venc_output_set_prop[] = { HFI_PROP_BITSTREAM_RESOLUTION, HFI_PROP_CROP_OFFSETS, - HFI_PROP_SCALAR, HFI_PROP_BUFFER_HOST_MAX_COUNT, HFI_PROP_CSC, }; @@ -44,7 +43,7 @@ static const u32 msm_venc_output_subscribe_for_properties[] = { HFI_PROP_WORST_COMPRESSION_RATIO, }; -static const u32 msm_venc_internal_buffer_type[] = { +static const u32 msm_venc_output_internal_buffer_type[] = { MSM_VIDC_BUF_BIN, MSM_VIDC_BUF_COMV, MSM_VIDC_BUF_NON_COMV, @@ -52,6 +51,10 @@ static const u32 msm_venc_internal_buffer_type[] = { MSM_VIDC_BUF_DPB, }; +static const u32 msm_venc_input_internal_buffer_type[] = { + MSM_VIDC_BUF_VPSS, +}; + struct msm_venc_prop_type_handle { u32 type; int (*handle)(struct msm_vidc_inst *inst, enum msm_vidc_port_type port); @@ -232,6 +235,7 @@ static int msm_venc_set_crop_offsets(struct msm_vidc_inst *inst, int rc = 0; u32 left_offset, top_offset, right_offset, bottom_offset; u32 crop[2] = {0}; + u32 width, height; if (port != OUTPUT_PORT) { i_vpr_e(inst, "%s: invalid port %d\n", __func__, port); @@ -240,10 +244,17 @@ static int msm_venc_set_crop_offsets(struct msm_vidc_inst *inst, left_offset = inst->compose.left; top_offset = inst->compose.top; - right_offset = (inst->fmts[port].fmt.pix_mp.width - - inst->compose.width); - bottom_offset = (inst->fmts[port].fmt.pix_mp.height - - inst->compose.height); + + width = inst->compose.width; + height = inst->compose.height; + if (inst->capabilities->cap[ROTATION].value == 90 || + inst->capabilities->cap[ROTATION].value == 270) { + width = inst->compose.height; + height = inst->compose.width; + } + + right_offset = (inst->fmts[port].fmt.pix_mp.width - width); + bottom_offset = (inst->fmts[port].fmt.pix_mp.height - height); if (is_image_session(inst)) right_offset = bottom_offset = 0; @@ -266,43 +277,6 @@ static int msm_venc_set_crop_offsets(struct msm_vidc_inst *inst, return 0; } -static int msm_venc_set_scalar(struct msm_vidc_inst *inst, - enum msm_vidc_port_type port) -{ - int rc = 0; - u32 scalar = 0; - - if (port != OUTPUT_PORT) { - i_vpr_e(inst, "%s: invalid port %d\n", __func__, port); - return -EINVAL; - } - - if (inst->crop.left != inst->compose.left || - inst->crop.top != inst->compose.top || - inst->crop.width != inst->compose.width || - inst->crop.height != inst->compose.height) { - scalar = 1; - i_vpr_h(inst, - "%s: crop: l %d t %d w %d h %d compose: l %d t %d w %d h %d\n", - __func__, inst->crop.left, inst->crop.top, - inst->crop.width, inst->crop.height, - inst->compose.left, inst->compose.top, - inst->compose.width, inst->compose.height); - } - - i_vpr_h(inst, "%s: scalar: %d\n", __func__, scalar); - rc = venus_hfi_session_property(inst, - HFI_PROP_SCALAR, - HFI_HOST_FLAGS_NONE, - get_hfi_port(inst, port), - HFI_PAYLOAD_64_PACKED, - &scalar, - sizeof(u64)); - if (rc) - return rc; - return 0; -} - static int msm_venc_set_host_max_buf_count(struct msm_vidc_inst *inst, enum msm_vidc_port_type port) { @@ -553,7 +527,6 @@ static int msm_venc_set_output_properties(struct msm_vidc_inst *inst) static const struct msm_venc_prop_type_handle prop_type_handle_arr[] = { {HFI_PROP_BITSTREAM_RESOLUTION, msm_venc_set_bitstream_resolution }, {HFI_PROP_CROP_OFFSETS, msm_venc_set_crop_offsets }, - {HFI_PROP_SCALAR, msm_venc_set_scalar }, {HFI_PROP_BUFFER_HOST_MAX_COUNT, msm_venc_set_host_max_buf_count }, {HFI_PROP_CSC, msm_venc_set_csc }, }; @@ -613,8 +586,7 @@ static int msm_venc_set_internal_properties(struct msm_vidc_inst *inst) static int msm_venc_get_input_internal_buffers(struct msm_vidc_inst *inst) { - int rc = 0; -/* TODO: VPSS + int i, rc = 0; struct msm_vidc_core *core; if (!inst || !inst->core) { @@ -623,50 +595,51 @@ static int msm_venc_get_input_internal_buffers(struct msm_vidc_inst *inst) } core = inst->core; - inst->buffers.vpss.size = call_session_op(core, buffer_size, - inst, MSM_VIDC_BUF_VPSS) + 100000000; + for (i = 0; i < ARRAY_SIZE(msm_venc_input_internal_buffer_type); i++) { + rc = msm_vidc_get_internal_buffers(inst, + msm_venc_input_internal_buffer_type[i]); + if (rc) + return rc; + } - inst->buffers.dpb.min_count = call_session_op(core, min_count, - inst, MSM_VIDC_BUF_VPSS); - - i_vpr_h(inst, "%s: internal buffer: min size\n", __func__); - i_vpr_h(inst, "vpss buffer: %d %d\n", - inst->buffers.vpss.min_count, - inst->buffers.vpss.size); -*/ return rc; } static int msm_venc_create_input_internal_buffers(struct msm_vidc_inst *inst) { - int rc = 0; -/* TODO: VPSS + int i, rc = 0; + if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - rc = msm_vidc_create_internal_buffers(inst, MSM_VIDC_BUF_VPSS); - if (rc) - return rc; -*/ + for (i = 0; i < ARRAY_SIZE(msm_venc_input_internal_buffer_type); i++) { + rc = msm_vidc_create_internal_buffers(inst, + msm_venc_input_internal_buffer_type[i]); + if (rc) + return rc; + } + return rc; } static int msm_venc_queue_input_internal_buffers(struct msm_vidc_inst *inst) { - int rc = 0; + int i, rc = 0; -/* TODO: VPSS if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - rc = msm_vidc_queue_internal_buffers(inst, MSM_VIDC_BUF_VPSS); - if (rc) - return rc; -*/ + for (i = 0; i < ARRAY_SIZE(msm_venc_input_internal_buffer_type); i++) { + rc = msm_vidc_queue_internal_buffers(inst, + msm_venc_input_internal_buffer_type[i]); + if (rc) + return rc; + } + return rc; } @@ -681,8 +654,9 @@ static int msm_venc_get_output_internal_buffers(struct msm_vidc_inst *inst) } core = inst->core; - for (i = 0; i < ARRAY_SIZE(msm_venc_internal_buffer_type); i++) { - rc = msm_vidc_get_internal_buffers(inst, msm_venc_internal_buffer_type[i]); + for (i = 0; i < ARRAY_SIZE(msm_venc_output_internal_buffer_type); i++) { + rc = msm_vidc_get_internal_buffers(inst, + msm_venc_output_internal_buffer_type[i]); if (rc) return rc; } @@ -699,8 +673,9 @@ static int msm_venc_create_output_internal_buffers(struct msm_vidc_inst *inst) return -EINVAL; } - for (i = 0; i < ARRAY_SIZE(msm_venc_internal_buffer_type); i++) { - rc = msm_vidc_create_internal_buffers(inst, msm_venc_internal_buffer_type[i]); + for (i = 0; i < ARRAY_SIZE(msm_venc_output_internal_buffer_type); i++) { + rc = msm_vidc_create_internal_buffers(inst, + msm_venc_output_internal_buffer_type[i]); if (rc) return rc; } @@ -717,8 +692,9 @@ static int msm_venc_queue_output_internal_buffers(struct msm_vidc_inst *inst) return -EINVAL; } - for (i = 0; i < ARRAY_SIZE(msm_venc_internal_buffer_type); i++) { - rc = msm_vidc_queue_internal_buffers(inst, msm_venc_internal_buffer_type[i]); + for (i = 0; i < ARRAY_SIZE(msm_venc_output_internal_buffer_type); i++) { + rc = msm_vidc_queue_internal_buffers(inst, + msm_venc_output_internal_buffer_type[i]); if (rc) return rc; } @@ -1108,12 +1084,13 @@ error: return rc; } -static int msm_venc_s_fmt_output(struct msm_vidc_inst *inst, struct v4l2_format *f) +int msm_venc_s_fmt_output(struct msm_vidc_inst *inst, struct v4l2_format *f) { int rc = 0; struct v4l2_format *fmt; struct msm_vidc_core *core; u32 codec_align; + u32 width, height; if (!inst || !inst->core || !f) { d_vpr_e("%s: invalid params\n", __func__); @@ -1134,9 +1111,17 @@ static int msm_venc_s_fmt_output(struct msm_vidc_inst *inst, struct v4l2_format codec_align = (f->fmt.pix_mp.pixelformat == V4L2_PIX_FMT_HEVC || f->fmt.pix_mp.pixelformat == V4L2_PIX_FMT_HEIC) ? 32 : 16; + /* use rotated width height if rotation is enabled */ + width = inst->compose.width; + height = inst->compose.height; + if (inst->capabilities->cap[ROTATION].value == 90 || + inst->capabilities->cap[ROTATION].value == 270) { + width = inst->compose.height; + height = inst->compose.width; + } /* width, height is readonly for client */ - fmt->fmt.pix_mp.width = ALIGN(inst->compose.width, codec_align); - fmt->fmt.pix_mp.height = ALIGN(inst->compose.height, codec_align); + fmt->fmt.pix_mp.width = ALIGN(width, codec_align); + fmt->fmt.pix_mp.height = ALIGN(height, codec_align); /* use grid dimension for image session */ if (is_image_session(inst)) fmt->fmt.pix_mp.width = fmt->fmt.pix_mp.height = HEIC_GRID_DIMENSION; @@ -1520,6 +1505,18 @@ int msm_venc_s_selection(struct msm_vidc_inst* inst, struct v4l2_selection* s) inst->compose.width = s->r.width; inst->compose.height= s->r.height; + if (inst->crop.left != inst->compose.left || + inst->crop.top != inst->compose.top || + inst->crop.width != inst->compose.width || + inst->crop.height != inst->compose.height) { + i_vpr_h(inst, + "%s: scaling enabled, crop: l %d t %d w %d h %d compose: l %d t %d w %d h %d\n", + __func__, inst->crop.left, inst->crop.top, + inst->crop.width, inst->crop.height, + inst->compose.left, inst->compose.top, + inst->compose.width, inst->compose.height); + } + /* update output format based on new compose dimensions */ output_fmt = &inst->fmts[OUTPUT_PORT]; rc = msm_venc_s_fmt_output(inst, output_fmt); diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index dbf2392e6a..eb70116349 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -10,6 +10,7 @@ #include "venus_hfi.h" #include "msm_vidc_internal.h" #include "msm_vidc_driver.h" +#include "msm_venc.h" #define CAP_TO_8BIT_QP(a) { \ if ((a) < 0) \ @@ -663,6 +664,24 @@ int msm_v4l2_op_s_ctrl(struct v4l2_ctrl *ctrl) if (!inst->vb2q[OUTPUT_PORT].streaming) { msm_vidc_update_cap_value(inst, cap_id, ctrl->val, __func__); + if (ctrl->id == V4L2_CID_ROTATE) { + if (ctrl->val == 90 || ctrl->val == 270) { + struct v4l2_format *output_fmt; + + output_fmt = &inst->fmts[OUTPUT_PORT]; + rc = msm_venc_s_fmt_output(inst, output_fmt); + if (rc) + return rc; + + i_vpr_h(inst, + "%s: type %d: format %#x width %d height %d size %d\n", + __func__, output_fmt->type, output_fmt->fmt.pix_mp.pixelformat, + output_fmt->fmt.pix_mp.width, + output_fmt->fmt.pix_mp.height, + output_fmt->fmt.pix_mp.plane_fmt[0].sizeimage); + } + } + if (ctrl->id == V4L2_CID_MPEG_VIDC_MIN_BITSTREAM_SIZE_OVERWRITE) { rc = msm_vidc_update_bitstream_buffer_size(inst); if (rc) @@ -2382,7 +2401,6 @@ int msm_vidc_set_session_priority(void *instance, return rc; } -/* TODO int msm_vidc_set_flip(void *instance, enum msm_vidc_inst_capability_type cap_id) { @@ -2404,15 +2422,35 @@ int msm_vidc_set_flip(void *instance, if (vflip) hfi_value |= HFI_VERTICAL_FLIP; - i_vpr_h(inst, "set cap: name: %24s, value: %#10x, hfi: %#10x\n", cap_name(cap_id), - inst->capabilities->cap[cap_id].value, hfi_value); - rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32_ENUM, &hfi_value, sizeof(u32), __func__); return rc; } -*/ + +int msm_vidc_set_rotation(void *instance, + enum msm_vidc_inst_capability_type cap_id) +{ + int rc = 0; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; + u32 hfi_value; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + rc = msm_vidc_v4l2_to_hfi_enum(inst, cap_id, &hfi_value); + if (rc) + return -EINVAL; + + rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32, + &hfi_value, sizeof(u32), __func__); + if (rc) + return rc; + + return rc; +} int msm_vidc_set_q16(void *instance, enum msm_vidc_inst_capability_type cap_id) diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index 035bfc722e..d4beecf216 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -156,7 +156,8 @@ bool is_valid_hfi_buffer_type(struct msm_vidc_inst *inst, buffer_type != HFI_BUFFER_NON_COMV && buffer_type != HFI_BUFFER_LINE && buffer_type != HFI_BUFFER_DPB && - buffer_type != HFI_BUFFER_PERSIST) { + buffer_type != HFI_BUFFER_PERSIST && + buffer_type != HFI_BUFFER_VPSS) { i_vpr_e(inst, "%s: invalid buffer type %#x\n", func, buffer_type); return false; @@ -1035,6 +1036,7 @@ static int handle_session_buffer(struct msm_vidc_inst *inst, {HFI_BUFFER_LINE, handle_release_internal_buffer }, {HFI_BUFFER_ARP, handle_release_internal_buffer }, {HFI_BUFFER_DPB, handle_release_internal_buffer }, + {HFI_BUFFER_VPSS, handle_release_internal_buffer }, }; static const struct msm_vidc_hfi_buffer_handle dec_input_hfi_handle[] = { {HFI_BUFFER_METADATA, handle_input_metadata_buffer }, From 90658c5592592537afa50f392c3108e5658820b5 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Wed, 21 Apr 2021 18:04:44 -0700 Subject: [PATCH 0258/1061] video: driver: Add support to print decode/encode stats Add support to calculate and print encode and decode time, and average time consumption per fbd sample. Change-Id: I5e867833d1d88285bfebc8c9b9a593e3ed975ed5 Signed-off-by: Akshata Sahukar --- driver/vidc/inc/msm_vidc_debug.h | 1 + driver/vidc/inc/msm_vidc_internal.h | 8 +++---- driver/vidc/src/msm_vidc.c | 1 + driver/vidc/src/msm_vidc_debug.c | 35 ++++++++++++++++++++++++++--- 4 files changed, 38 insertions(+), 7 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_debug.h b/driver/vidc/inc/msm_vidc_debug.h index f127deb662..72401092c6 100644 --- a/driver/vidc/inc/msm_vidc_debug.h +++ b/driver/vidc/inc/msm_vidc_debug.h @@ -135,5 +135,6 @@ void msm_vidc_debugfs_deinit_inst(void *inst); void msm_vidc_debugfs_update(void *inst, enum msm_vidc_debugfs_event e); int msm_vidc_check_ratelimit(void); +void msm_vidc_show_stats(void *inst); #endif diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 6c5b48f5e6..d5997fd74e 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -637,12 +637,12 @@ struct buf_count { }; struct profile_data { - u32 start; - u32 stop; - u32 cumulative; + u64 start; + u64 stop; + u64 cumulative; char name[64]; u32 sampling; - u32 average; + u64 average; }; struct msm_vidc_debug { diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index dd2427c0cf..46f5a9e469 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -917,6 +917,7 @@ int msm_vidc_close(void *instance) msm_vidc_remove_session(inst); msm_vidc_destroy_buffers(inst); mutex_unlock(&inst->lock); + msm_vidc_show_stats(inst); put_inst(inst); msm_vidc_schedule_core_deinit(core); diff --git a/driver/vidc/src/msm_vidc_debug.c b/driver/vidc/src/msm_vidc_debug.c index f32d03962b..0a0c7f4868 100644 --- a/driver/vidc/src/msm_vidc_debug.c +++ b/driver/vidc/src/msm_vidc_debug.c @@ -91,16 +91,45 @@ struct core_inst_pair { }; /* debug fs support */ - static inline void tic(struct msm_vidc_inst *i, enum profiling_points p, char *b) { - return; + if (!i->debug.pdata[p].name[0]) + memcpy(i->debug.pdata[p].name, b, 64); + if (i->debug.pdata[p].sampling) { + i->debug.pdata[p].start = ktime_get_ns() / 1000 / 1000; + i->debug.pdata[p].sampling = false; + } } static inline void toc(struct msm_vidc_inst *i, enum profiling_points p) { - return; + if (!i->debug.pdata[p].sampling) { + i->debug.pdata[p].stop = ktime_get_ns() / 1000 / 1000; + i->debug.pdata[p].cumulative += i->debug.pdata[p].stop - + i->debug.pdata[p].start; + i->debug.pdata[p].sampling = true; + } +} + +void msm_vidc_show_stats(void *inst) +{ + int x; + struct msm_vidc_inst *i = (struct msm_vidc_inst *) inst; + + for (x = 0; x < MAX_PROFILING_POINTS; x++) { + if (i->debug.pdata[x].name[0]) { + if (i->debug.samples) { + i_vpr_p(i, "%s averaged %d ms/sample\n", + i->debug.pdata[x].name, + i->debug.pdata[x].cumulative / + i->debug.samples); + } + + i_vpr_p(i, "%s Samples: %d\n", + i->debug.pdata[x].name, i->debug.samples); + } + } } static u32 write_str(char *buffer, From 5a374e3ed46565a4efe8e6577db3615df8105d20 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Tue, 27 Apr 2021 11:07:42 +0530 Subject: [PATCH 0259/1061] video: driver: reduce output buffer count for thumbnail usecase Update output buffer min & extracount, if thumbnail mode is set and also tune extracount at input psc sequence. Change-Id: I77b28198257d127454ee3e9b2a307e1931547e8f Signed-off-by: Govindaraj Rajagopal --- driver/vidc/src/msm_vdec.c | 2 ++ driver/vidc/src/msm_vidc_control.c | 3 +++ driver/vidc/src/msm_vidc_driver.c | 12 ++++++++---- 3 files changed, 13 insertions(+), 4 deletions(-) diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 5f227d70b6..77ca96c107 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -1329,6 +1329,8 @@ static int msm_vdec_read_input_subcr_params(struct msm_vidc_inst *inst) } inst->buffers.output.min_count = subsc_params.fw_min_count; + inst->buffers.output.extra_count = call_session_op(core, + extra_count, inst, MSM_VIDC_BUF_OUTPUT); if (is_thumbnail_session(inst) && inst->codec != MSM_VIDC_VP9) { if (inst->buffers.output.min_count != 1) { i_vpr_e(inst, "%s: invalid min count %d in thumbnail case\n", diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index eb70116349..107d5ad819 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -696,6 +696,9 @@ int msm_v4l2_op_s_ctrl(struct v4l2_ctrl *ctrl) rc = msm_vidc_update_buffer_count(inst, INPUT_PORT); if (rc) return rc; + rc = msm_vidc_update_buffer_count(inst, OUTPUT_PORT); + if (rc) + return rc; } if (is_meta_ctrl(ctrl->id)) { if (cap_id == META_DPB_TAG_LIST) { diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index e5e9beba3f..e9b8d3ba68 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -4461,8 +4461,10 @@ int msm_vidc_update_buffer_count(struct msm_vidc_inst *inst, u32 port) inst->buffers.input_meta.extra_count = 0; inst->buffers.input_meta.actual_count = 0; } - d_vpr_h("update input min buffer to %u\n", - inst->buffers.input.min_count); + i_vpr_h(inst, "%s: type: INPUT, count: min %u, extra %u, actual %u\n", __func__, + inst->buffers.input.min_count, + inst->buffers.input.extra_count, + inst->buffers.input.actual_count); break; case OUTPUT_PORT: if (!inst->vb2q[INPUT_PORT].streaming) @@ -4489,8 +4491,10 @@ int msm_vidc_update_buffer_count(struct msm_vidc_inst *inst, u32 port) inst->buffers.output_meta.extra_count = 0; inst->buffers.output_meta.actual_count = 0; } - d_vpr_h("update output min buffer to %u\n", - inst->buffers.output.min_count); + i_vpr_h(inst, "%s: type: OUTPUT, count: min %u, extra %u, actual %u\n", __func__, + inst->buffers.output.min_count, + inst->buffers.output.extra_count, + inst->buffers.output.actual_count); break; default: d_vpr_e("%s unknown port %d\n", __func__, port); From 803defe0e702ec0cbdb2a77bafa56e1c21cdba91 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Tue, 27 Apr 2021 11:53:13 +0530 Subject: [PATCH 0260/1061] Revert "video: driver: reset last_buffer_dequeued flag for streamoff case" This reverts commit 816f15fbcf18070b925ad0914c0723f1e845a2fe. Change-Id: I686627e75ba9dc79b857159e85f142d3fc211745 Signed-off-by: Govindaraj Rajagopal --- driver/vidc/src/msm_vidc_vb2.c | 6 ------ 1 file changed, 6 deletions(-) diff --git a/driver/vidc/src/msm_vidc_vb2.c b/driver/vidc/src/msm_vidc_vb2.c index 77f069cf4a..4f45cc3928 100644 --- a/driver/vidc/src/msm_vidc_vb2.c +++ b/driver/vidc/src/msm_vidc_vb2.c @@ -261,12 +261,6 @@ void msm_vidc_stop_streaming(struct vb2_queue *q) } i_vpr_h(inst, "Streamoff: %d\n", q->type); - /** - * Clear q->last_buffer_dequeued flag to facilitate - * userspace dqbuf on output port after last_flag FBD. - */ - vb2_clear_last_buffer_dequeued(&inst->vb2q[OUTPUT_META_PORT]); - vb2_clear_last_buffer_dequeued(&inst->vb2q[OUTPUT_PORT]); if (q->type == INPUT_MPLANE) { if (is_decode_session(inst)) rc = msm_vdec_streamoff_input(inst); From e0637a30b81c8975f5a2aa48113b2c6d4bde36eb Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Tue, 27 Apr 2021 18:45:09 +0530 Subject: [PATCH 0261/1061] video: driver: refine power settings Added change to address below 2 issues. [1] buffer_counter is not getting incremented for batching usecase, it always runs with max clk and bus votes. So moved buffer_counter increment logic to msm_vidc_queue_buffer, so that it will be used for all usecases. [2] iris2 clock calculations were using core->capabilities but all needed infos were present in inst->capabilities. So junk values from core->capabilities was used in clock calculations and values always shooting to highest corner. Change-Id: I0927899244b5de2bd46d238100fdaecd78c6fe28 Signed-off-by: Govindaraj Rajagopal --- .../variant/iris2/src/msm_vidc_power_iris2.c | 18 ++-- driver/vidc/src/msm_vidc_driver.c | 90 +++++++++---------- 2 files changed, 54 insertions(+), 54 deletions(-) diff --git a/driver/variant/iris2/src/msm_vidc_power_iris2.c b/driver/variant/iris2/src/msm_vidc_power_iris2.c index e7619512eb..4b7a67172a 100644 --- a/driver/variant/iris2/src/msm_vidc_power_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_power_iris2.c @@ -52,13 +52,13 @@ u64 msm_vidc_calc_freq_iris2(struct msm_vidc_inst *inst, u32 data_size) * Even though, most part is common now, in future it may change * between them. */ - fw_cycles = fps * core->capabilities[MB_CYCLES_FW].value; - fw_vpp_cycles = fps * core->capabilities[MB_CYCLES_FW_VPP].value; + fw_cycles = fps * inst->capabilities->cap[MB_CYCLES_FW].value; + fw_vpp_cycles = fps * inst->capabilities->cap[MB_CYCLES_FW_VPP].value; if (inst->domain == MSM_VIDC_ENCODER) { vpp_cycles_per_mb = is_low_power_session(inst) ? - core->capabilities[MB_CYCLES_LP].value : - core->capabilities[MB_CYCLES_VPP].value; + inst->capabilities->cap[MB_CYCLES_LP].value : + inst->capabilities->cap[MB_CYCLES_VPP].value; vpp_cycles = mbs_per_second * vpp_cycles_per_mb / inst->capabilities->cap[PIPE].value; @@ -90,7 +90,7 @@ u64 msm_vidc_calc_freq_iris2(struct msm_vidc_inst *inst, u32 data_size) vsp_cycles = div_u64(((u64)inst->capabilities->cap[BIT_RATE].value * vsp_factor_num), vsp_factor_den); - base_cycles = core->capabilities[MB_CYCLES_VSP].value; + base_cycles = inst->capabilities->cap[MB_CYCLES_VSP].value; if (inst->codec == MSM_VIDC_VP9) { vsp_cycles = div_u64(vsp_cycles * 170, 100); } else if (inst->capabilities->cap[ENTROPY_MODE].value == @@ -110,7 +110,7 @@ u64 msm_vidc_calc_freq_iris2(struct msm_vidc_inst *inst, u32 data_size) } else if (inst->domain == MSM_VIDC_DECODER) { /* VPP */ - vpp_cycles = mbs_per_second * core->capabilities[MB_CYCLES_VPP].value / + vpp_cycles = mbs_per_second * inst->capabilities->cap[MB_CYCLES_VPP].value / inst->capabilities->cap[PIPE].value; /* 21 / 20 is minimum overhead factor */ vpp_cycles += max(vpp_cycles / 20, fw_vpp_cycles); @@ -119,7 +119,7 @@ u64 msm_vidc_calc_freq_iris2(struct msm_vidc_inst *inst, u32 data_size) vpp_cycles += div_u64(vpp_cycles * 59, 1000); /* VSP */ - base_cycles = core->capabilities[MB_CYCLES_VSP].value; + base_cycles = inst->capabilities->cap[MB_CYCLES_VSP].value; vsp_cycles = fps * data_size * 8; if (inst->codec == MSM_VIDC_VP9) { @@ -147,8 +147,8 @@ u64 msm_vidc_calc_freq_iris2(struct msm_vidc_inst *inst, u32 data_size) freq = max(vpp_cycles, vsp_cycles); freq = max(freq, fw_cycles); - i_vpr_p(inst, "%s: inst %pK: filled len %d required freq %llu\n", - __func__, inst, data_size, freq); + i_vpr_p(inst, "%s: filled len %d required freq %llu\n", + __func__, data_size, freq); return freq; } diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index e5e9beba3f..86abc0e57c 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -2526,16 +2526,58 @@ exit: return allow; } +static void msm_vidc_update_input_cr(struct msm_vidc_inst *inst, u32 idx, u32 cr) +{ + struct msm_vidc_input_cr_data *temp, *next; + bool found = false; + + list_for_each_entry_safe(temp, next, &inst->enc_input_crs, list) { + if (temp->index == idx) { + temp->input_cr = cr; + found = true; + break; + } + } + if (!found) { + temp = kzalloc(sizeof(*temp), GFP_KERNEL); + if (!temp) { + i_vpr_e(inst, "%s: malloc failure.\n", __func__); + return; + } + temp->index = idx; + temp->input_cr = cr; + list_add_tail(&temp->list, &inst->enc_input_crs); + } +} + +static void msm_vidc_free_input_cr_list(struct msm_vidc_inst *inst) +{ + struct msm_vidc_input_cr_data *temp, *next; + + list_for_each_entry_safe(temp, next, &inst->enc_input_crs, list) { + list_del(&temp->list); + kfree(temp); + } + INIT_LIST_HEAD(&inst->enc_input_crs); +} + static int msm_vidc_queue_buffer(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buf) { struct msm_vidc_buffer *meta; int rc = 0; + u32 cr = 0; if (!inst || !buf || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } + if (is_encode_session(inst) && is_input_buffer(buf->type)) { + cr = inst->capabilities->cap[ENC_IP_CR].value; + msm_vidc_update_input_cr(inst, buf->index, cr); + msm_vidc_update_cap_value(inst, ENC_IP_CR, 0, __func__); + } + if (is_decode_session(inst) && is_input_buffer(buf->type) && inst->capabilities->cap[CODEC_CONFIG].value) { buf->flags |= MSM_VIDC_BUF_FLAG_CODECCONFIG; @@ -2572,6 +2614,9 @@ static int msm_vidc_queue_buffer(struct msm_vidc_inst *inst, struct msm_vidc_buf meta->attr |= MSM_VIDC_ATTR_QUEUED; } + if (is_input_buffer(buf->type)) + inst->power.buffer_counter++; + if (buf->type == MSM_VIDC_BUF_INPUT) msm_vidc_debugfs_update(inst, MSM_VIDC_DEBUGFS_EVENT_ETB); else if (buf->type == MSM_VIDC_BUF_OUTPUT) @@ -2608,47 +2653,11 @@ int msm_vidc_queue_buffer_batch(struct msm_vidc_inst *inst) return 0; } -void msm_vidc_update_input_cr(struct msm_vidc_inst *inst, u32 idx, u32 cr) -{ - struct msm_vidc_input_cr_data *temp, *next; - bool found = false; - - list_for_each_entry_safe(temp, next, &inst->enc_input_crs, list) { - if (temp->index == idx) { - temp->input_cr = cr; - found = true; - break; - } - } - if (!found) { - temp = kzalloc(sizeof(*temp), GFP_KERNEL); - if (!temp) { - i_vpr_e(inst, "%s: malloc failure.\n", __func__); - return; - } - temp->index = idx; - temp->input_cr = cr; - list_add_tail(&temp->list, &inst->enc_input_crs); - } -} - -void msm_vidc_free_input_cr_list(struct msm_vidc_inst *inst) -{ - struct msm_vidc_input_cr_data *temp, *next; - - list_for_each_entry_safe(temp, next, &inst->enc_input_crs, list) { - list_del(&temp->list); - kfree(temp); - } - INIT_LIST_HEAD(&inst->enc_input_crs); -} - int msm_vidc_queue_buffer_single(struct msm_vidc_inst *inst, struct vb2_buffer *vb2) { int rc = 0; struct msm_vidc_buffer *buf; enum msm_vidc_allow allow; - u32 cr = 0; if (!inst || !vb2) { d_vpr_e("%s: invalid params\n", __func__); @@ -2668,15 +2677,6 @@ int msm_vidc_queue_buffer_single(struct msm_vidc_inst *inst, struct vb2_buffer * return 0; } - if (buf->type == MSM_VIDC_BUF_INPUT) { - if (is_encode_session(inst)) { - cr = inst->capabilities->cap[ENC_IP_CR].value; - msm_vidc_update_input_cr(inst, vb2->index, cr); - msm_vidc_update_cap_value(inst, ENC_IP_CR, 0, __func__); - } - inst->power.buffer_counter++; - } - msm_vidc_scale_power(inst, is_input_buffer(buf->type)); rc = msm_vidc_queue_buffer(inst, buf); From 450a9e0e204150143fca359e24a87990e04ef462 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Mon, 26 Apr 2021 18:35:06 -0700 Subject: [PATCH 0262/1061] video: driver: Modify default values for VBV Delay and Peak Bitrate Modify cap values for below properties: [1] VBV Dealy: default as 300, min as 100, and max as 300 [2] Peak bitrate: default as avg bitrate set by client. Change-Id: Ic9533e8a40e789128e5baa975bf1a0355e373e08 Signed-off-by: Akshata Sahukar --- driver/platform/waipio/src/msm_vidc_waipio.c | 6 ++---- driver/vidc/inc/msm_vidc_internal.h | 1 - driver/vidc/src/msm_vidc_control.c | 4 +--- 3 files changed, 3 insertions(+), 8 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index fdec88710a..88e0b97397 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -552,7 +552,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { NULL, msm_vidc_set_vbr_related_properties}, {VBV_DELAY, ENC, H264|HEVC, - 500, 2000, 500, 500, + 100, 300, 100, 300, V4L2_CID_MPEG_VIDEO_VBV_DELAY, HFI_PROP_VBV_DELAY, CAP_FLAG_OUTPUT_PORT, @@ -562,9 +562,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {PEAK_BITRATE, ENC, H264|HEVC, /* default peak bitrate is 10% larger than avrg bitrate */ - 1, MAX_BITRATE, 1, - (DEFAULT_BITRATE + - (DEFAULT_BITRATE / PERCENT_PEAK_BITRATE_INCREASED)), + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_BITRATE_PEAK, HFI_PROP_TOTAL_PEAK_BITRATE, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 6c5b48f5e6..64e65203ee 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -54,7 +54,6 @@ #define MAX_HEVC_ENH_LAYER_SLIDING_WINDOW 5 #define MAX_AVC_ENH_LAYER_SLIDING_WINDOW 3 #define MAX_AVC_ENH_LAYER_HYBRID_HP 5 -#define PERCENT_PEAK_BITRATE_INCREASED 10 #define INVALID_DEFAULT_MARK_OR_USE_LTR -1 #define MAX_SLICES_PER_FRAME 10 #define MAX_SLICES_FRAME_RATE 60 diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index eb70116349..8eadf81aee 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -1528,9 +1528,7 @@ int msm_vidc_adjust_peak_bitrate(void *instance, struct v4l2_ctrl *ctrl) if (adjusted_value < bitrate) adjusted_value = bitrate; } else { - adjusted_value = capability->cap[BIT_RATE].value + - (capability->cap[BIT_RATE].value / - PERCENT_PEAK_BITRATE_INCREASED); + adjusted_value = capability->cap[BIT_RATE].value; } msm_vidc_update_cap_value(inst, PEAK_BITRATE, From 550a5599b94e1ae6b116a45c90030cec27f073e4 Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Tue, 27 Apr 2021 04:25:04 -0700 Subject: [PATCH 0263/1061] video: driver: fix decode conceal colour fix decode conceal colour Change-Id: I2db138d68459a1e2c929acab31ff41c3b316e3b6 Signed-off-by: Darshana Patil --- driver/vidc/src/msm_vdec.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 77ca96c107..8493f4d05c 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -725,7 +725,7 @@ static int msm_vdec_set_conceal_color_10bit(struct msm_vidc_inst *inst, return -EINVAL; } - conceal_color_10bit = inst->capabilities->cap[CONCEAL_COLOR_8BIT].value; + conceal_color_10bit = inst->capabilities->cap[CONCEAL_COLOR_10BIT].value; i_vpr_h(inst, "%s: conceal color 10bit: %#x", __func__, conceal_color_10bit); rc = venus_hfi_session_property(inst, From 1f2e561f7c58bc907f0448ed0c3c7c3da0acbcea Mon Sep 17 00:00:00 2001 From: Mihir Ganu Date: Tue, 20 Apr 2021 10:30:47 -0700 Subject: [PATCH 0264/1061] Revert "video: driver: power collapse only if no sessions present" This reverts commit ae79a4b1817a65c7eb11f53d74d9a39fe84fe4dc. Change-Id: I4d064975d91a061cb0e94e06be1f8bf87255dac2 Signed-off-by: Mihir Ganu --- driver/vidc/src/venus_hfi.c | 11 ----------- 1 file changed, 11 deletions(-) diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index 23b36f99fd..2150a06139 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -2713,7 +2713,6 @@ void venus_hfi_pm_work_handler(struct work_struct *work) return; } - d_vpr_h("%s\n", __func__); /* * It is ok to check this variable outside the lock since * it is being updated in this context only @@ -2727,15 +2726,6 @@ void venus_hfi_pm_work_handler(struct work_struct *work) } core_lock(core, __func__); - - /* power collapse only if no session is present */ - if (!list_empty(&core->instances)) { - d_vpr_h( - "%s: sessions available, skip power collapse\n", - __func__); - goto unlock; - } - rc = __power_collapse(core, false); switch (rc) { case 0: @@ -2759,7 +2749,6 @@ void venus_hfi_pm_work_handler(struct work_struct *work) d_vpr_e("%s: power collapse failed\n", __func__); break; } -unlock: core_unlock(core, __func__); } From 1c5f23e13bba6cc4013d5b9e243f1afdecc2d85e Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Tue, 27 Apr 2021 17:26:17 -0700 Subject: [PATCH 0265/1061] video: driver: Add support to blur property [1] Add support to adjust and set blur type and blur resolution. [2] Modify flip to not allow dynamic flip enablement when external blur is enabled. Change-Id: I730f452c143ba8c8e15402d1c1ec3a0617bd583c Signed-off-by: Akshata Sahukar --- driver/platform/waipio/src/msm_vidc_waipio.c | 30 ++-- driver/vidc/inc/msm_vidc_control.h | 6 + driver/vidc/src/msm_vidc_control.c | 164 +++++++++++++++++++ 3 files changed, 189 insertions(+), 11 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 88e0b97397..5bc96bb904 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -134,7 +134,8 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 0, 0, CAP_FLAG_ROOT, {0}, - {PROFILE, MIN_FRAME_QP, MAX_FRAME_QP, I_FRAME_QP, META_ROI_INFO}}, + {PROFILE, MIN_FRAME_QP, MAX_FRAME_QP, I_FRAME_QP, META_ROI_INFO, + BLUR_TYPES}}, {PIX_FMTS, DEC, HEVC|HEIC, MSM_VIDC_FMT_NV12, @@ -236,7 +237,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, {0}, - {0}, + {BLUR_TYPES}, NULL, msm_vidc_set_flip}, {VFLIP, ENC, CODECS_ALL, @@ -257,7 +258,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { HFI_PROP_ROTATION, CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, {0}, - {0}, + {BLUR_TYPES}, NULL, msm_vidc_set_rotation}, {SUPER_FRAME, ENC, H264|HEVC, @@ -350,7 +351,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {LTR_COUNT, IR_RANDOM, TIME_DELTA_BASED_RC, I_FRAME_QP, ENH_LAYER_COUNT, BIT_RATE, CONTENT_ADAPTIVE_CODING, BITRATE_BOOST, MIN_QUALITY, VBV_DELAY, PEAK_BITRATE, - SLICE_MODE, META_ROI_INFO}, + SLICE_MODE, META_ROI_INFO, BLUR_TYPES}, msm_vidc_adjust_bitrate_mode, msm_vidc_set_u32_enum}, {BITRATE_MODE, ENC, HEVC, @@ -368,7 +369,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { CONSTANT_QUALITY, ENH_LAYER_COUNT, CONTENT_ADAPTIVE_CODING, BIT_RATE, BITRATE_BOOST, MIN_QUALITY, VBV_DELAY, - PEAK_BITRATE, SLICE_MODE, META_ROI_INFO}, + PEAK_BITRATE, SLICE_MODE, META_ROI_INFO, BLUR_TYPES}, msm_vidc_adjust_bitrate_mode, msm_vidc_set_u32_enum}, {LOSSLESS, ENC, HEVC|HEIC, @@ -427,18 +428,24 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { msm_vidc_adjust_b_frame, msm_vidc_set_u32}, {BLUR_TYPES, ENC, CODECS_ALL, - VIDC_BLUR_NONE, VIDC_BLUR_ADAPTIVE, 1, VIDC_BLUR_NONE, + VIDC_BLUR_NONE, VIDC_BLUR_ADAPTIVE, 1, VIDC_BLUR_ADAPTIVE, V4L2_CID_MPEG_VIDC_VIDEO_BLUR_TYPES, HFI_PROP_BLUR_TYPES, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, - {0}, {0}, - NULL, msm_vidc_set_u32_enum}, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, + {PIX_FMTS, ROTATION, HFLIP, BITRATE_MODE, + CONTENT_ADAPTIVE_CODING}, + {BLUR_RESOLUTION}, + msm_vidc_adjust_blur_type, msm_vidc_set_blur_type}, {BLUR_RESOLUTION, ENC, CODECS_ALL, 0, S32_MAX, 1, 0, V4L2_CID_MPEG_VIDC_VIDEO_BLUR_RESOLUTION, HFI_PROP_BLUR_RESOLUTION, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {BLUR_TYPES}, + {0}, + msm_vidc_adjust_blur_resolution, msm_vidc_set_blur_resolution}, {CSC, ENC, CODECS_ALL, V4L2_MPEG_MSM_VIDC_DISABLE, @@ -530,7 +537,8 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_CID_MPEG_VIDC_CONTENT_ADAPTIVE_CODING, HFI_PROP_CONTENT_ADAPTIVE_CODING, CAP_FLAG_OUTPUT_PORT, - {BITRATE_MODE}, {0}, + {BITRATE_MODE}, + {BLUR_TYPES}, NULL, msm_vidc_set_vbr_related_properties}, {BITRATE_BOOST, ENC, H264|HEVC, diff --git a/driver/vidc/inc/msm_vidc_control.h b/driver/vidc/inc/msm_vidc_control.h index 7cc0635476..895cacf003 100644 --- a/driver/vidc/inc/msm_vidc_control.h +++ b/driver/vidc/inc/msm_vidc_control.h @@ -37,6 +37,8 @@ int msm_vidc_adjust_peak_bitrate(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_hevc_min_qp(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_hevc_max_qp(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_hevc_frame_qp(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_blur_type(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_blur_resolution(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_v4l2_properties(struct msm_vidc_inst *inst); int msm_vidc_adjust_session_priority(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_roi_info(void *instance, struct v4l2_ctrl *ctrl); @@ -83,6 +85,10 @@ int msm_vidc_set_flip(void *instance, enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_rotation(void *instance, enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_blur_type(void *instance, + enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_blur_resolution(void *instance, + enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_s32(void *instance, enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_q16(void *instance, diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 14b783a9f4..b36e6f516b 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -1603,6 +1603,90 @@ int msm_vidc_adjust_hevc_frame_qp(void *instance, struct v4l2_ctrl *ctrl) return rc; } +int msm_vidc_adjust_blur_type(void *instance, struct v4l2_ctrl *ctrl) +{ + struct msm_vidc_inst_capability *capability; + s32 adjusted_value; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + s32 rc_type = -1, rotation = -1, hflip = -1, vflip = -1, cac = -1; + s32 pix_fmts = -1; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + if (inst->vb2q[OUTPUT_PORT].streaming) + return 0; + + adjusted_value = ctrl ? ctrl->val : + capability->cap[BLUR_TYPES].value; + + if (adjusted_value == VIDC_BLUR_NONE) + return 0; + + if (msm_vidc_get_parent_value(inst, BLUR_TYPES, BITRATE_MODE, + &rc_type, __func__) || + msm_vidc_get_parent_value(inst, BLUR_TYPES, ROTATION, + &rotation, __func__) || + msm_vidc_get_parent_value(inst, BLUR_TYPES, + CONTENT_ADAPTIVE_CODING, &cac, __func__) || + msm_vidc_get_parent_value(inst, BLUR_TYPES, HFLIP, + &hflip, __func__) || + msm_vidc_get_parent_value(inst, BLUR_TYPES, PIX_FMTS, + &pix_fmts, __func__)) + return -EINVAL; + + vflip = capability->cap[VFLIP].value; + + if (adjusted_value == VIDC_BLUR_EXTERNAL) { + if (rotation || hflip || vflip || is_scaling_enabled(inst)) { + adjusted_value = VIDC_BLUR_NONE; + } + } else if (adjusted_value == VIDC_BLUR_ADAPTIVE) { + if (rotation || hflip || vflip || is_scaling_enabled(inst) || + (rc_type != HFI_RC_VBR_CFR) || + !cac || is_10bit_colorformat(pix_fmts)) { + adjusted_value = VIDC_BLUR_NONE; + } + } + + msm_vidc_update_cap_value(inst, BLUR_TYPES, + adjusted_value, __func__); + + return 0; +} + +int msm_vidc_adjust_blur_resolution(void *instance, struct v4l2_ctrl *ctrl) +{ + struct msm_vidc_inst_capability *capability; + s32 adjusted_value; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + s32 blur_type = -1; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + adjusted_value = ctrl ? ctrl->val : + capability->cap[BLUR_RESOLUTION].value; + + if (msm_vidc_get_parent_value(inst, BLUR_RESOLUTION, BLUR_TYPES, + &blur_type, __func__)) + return -EINVAL; + + if (blur_type != VIDC_BLUR_EXTERNAL) + return 0; + + msm_vidc_update_cap_value(inst, BLUR_RESOLUTION, + adjusted_value, __func__); + + return 0; +} + int msm_vidc_adjust_session_priority(void *instance, struct v4l2_ctrl *ctrl) { int rc = 0; @@ -2423,8 +2507,19 @@ int msm_vidc_set_flip(void *instance, if (vflip) hfi_value |= HFI_VERTICAL_FLIP; + if (inst->vb2q[OUTPUT_PORT].streaming) { + if (hfi_value != HFI_DISABLE_FLIP) { + rc = msm_vidc_set_req_sync_frame(inst, + REQUEST_I_FRAME); + if (rc) + return rc; + } + } + rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32_ENUM, &hfi_value, sizeof(u32), __func__); + if (rc) + return rc; return rc; } @@ -2453,6 +2548,75 @@ int msm_vidc_set_rotation(void *instance, return rc; } +int msm_vidc_set_blur_type(void *instance, + enum msm_vidc_inst_capability_type cap_id) +{ + int rc = 0; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; + u32 hfi_value; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (inst->vb2q[OUTPUT_PORT].streaming) + return 0; + + rc = msm_vidc_v4l2_to_hfi_enum(inst, cap_id, &hfi_value); + if (rc) + return -EINVAL; + + rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32_ENUM, + &hfi_value, sizeof(u32), __func__); + if (rc) + return rc; + + return rc; +} + +int msm_vidc_set_blur_resolution(void *instance, + enum msm_vidc_inst_capability_type cap_id) +{ + int rc = 0; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; + s32 blur_type = -1; + u32 hfi_value, blur_width, blur_height; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (msm_vidc_get_parent_value(inst, cap_id, + BLUR_TYPES, &blur_type, __func__)) + return -EINVAL; + + if (blur_type != VIDC_BLUR_EXTERNAL) + return 0; + + hfi_value = inst->capabilities->cap[cap_id].value; + + blur_width = (hfi_value & 0xFFFF0000) >> 16; + blur_height = hfi_value & 0xFFFF; + + if (blur_width > inst->compose.width || + blur_height > inst->compose.height) { + i_vpr_e(inst, + "%s: blur wxh: %dx%d exceeds compose wxh: %dx%d\n", + __func__, blur_width, blur_height, + inst->compose.width, inst->compose.height); + hfi_value = (inst->compose.width << 16) | inst->compose.height; + } + + rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_32_PACKED, + &hfi_value, sizeof(u32), __func__); + if (rc) + return rc; + + return rc; +} + int msm_vidc_set_q16(void *instance, enum msm_vidc_inst_capability_type cap_id) { From 429e6efffd49c8e61bd33f1a44ce5fd6383eb86d Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Wed, 28 Apr 2021 15:41:16 +0530 Subject: [PATCH 0266/1061] video: driver: fix system_error handling Do not process next packet, if system_error is received. As part of system_error handling core>respose_pkt will be freed. So parsing beyond system_error packet might lead to use-after-free issues. So added change to avoid processing next set of pkts, if system_error is received. Change-Id: Ibb767a5664e38cb720cba6416b6080f0aea4d919 Signed-off-by: Govindaraj Rajagopal --- driver/vidc/src/venus_hfi_response.c | 99 +++++++++------------------- 1 file changed, 32 insertions(+), 67 deletions(-) diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index d4beecf216..f1cb8bb80a 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -365,7 +365,8 @@ static int handle_session_error(struct msm_vidc_inst *inst, break; } - i_vpr_e(inst, "session error (%#x): %s\n", pkt->type, error); + i_vpr_e(inst, "%s: session error received %#x: %s\n", + __func__, pkt->type, error); rc = msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); return rc; @@ -384,11 +385,6 @@ int handle_system_error(struct msm_vidc_core *core, static int handle_system_init(struct msm_vidc_core *core, struct hfi_packet *pkt) { - if (pkt->flags & HFI_FW_FLAGS_SYSTEM_ERROR) { - d_vpr_e("%s: received system error\n", __func__); - return 0; - } - if (pkt->flags & HFI_FW_FLAGS_SUCCESS) { d_vpr_h("%s: successful\n", __func__); complete(&core->init_done); @@ -402,12 +398,6 @@ static int handle_system_init(struct msm_vidc_core *core, static int handle_session_open(struct msm_vidc_inst *inst, struct hfi_packet *pkt) { - if (pkt->flags & HFI_FW_FLAGS_SESSION_ERROR) { - i_vpr_e(inst, "%s: received session error\n", __func__); - msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); - return 0; - } - if (pkt->flags & HFI_FW_FLAGS_SUCCESS) i_vpr_h(inst, "%s: successful\n", __func__); @@ -417,11 +407,6 @@ static int handle_session_open(struct msm_vidc_inst *inst, static int handle_session_close(struct msm_vidc_inst *inst, struct hfi_packet *pkt) { - if (pkt->flags & HFI_FW_FLAGS_SESSION_ERROR) { - i_vpr_e(inst, "%s: received session error\n", __func__); - msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); - } - if (pkt->flags & HFI_FW_FLAGS_SUCCESS) i_vpr_h(inst, "%s: successful\n", __func__); @@ -432,12 +417,6 @@ static int handle_session_close(struct msm_vidc_inst *inst, static int handle_session_start(struct msm_vidc_inst *inst, struct hfi_packet *pkt) { - if (pkt->flags & HFI_FW_FLAGS_SESSION_ERROR) { - i_vpr_e(inst, "%s: received session error\n", __func__); - msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); - return 0; - } - if (pkt->flags & HFI_FW_FLAGS_SUCCESS) i_vpr_h(inst, "%s: successful for port %d\n", __func__, pkt->port); @@ -449,11 +428,6 @@ static int handle_session_stop(struct msm_vidc_inst *inst, { int signal_type = -1; - if (pkt->flags & HFI_FW_FLAGS_SESSION_ERROR) { - i_vpr_e(inst, "%s: received session error\n", __func__); - msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); - } - if (pkt->flags & HFI_FW_FLAGS_SUCCESS) i_vpr_h(inst, "%s: successful for port %d\n", __func__, pkt->port); @@ -491,12 +465,6 @@ static int handle_session_stop(struct msm_vidc_inst *inst, static int handle_session_drain(struct msm_vidc_inst *inst, struct hfi_packet *pkt) { - if (pkt->flags & HFI_FW_FLAGS_SESSION_ERROR) { - i_vpr_e(inst, "%s: received session error\n", __func__); - msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); - return 0; - } - if (pkt->flags & HFI_FW_FLAGS_SUCCESS) i_vpr_h(inst, "%s: successful\n", __func__); return 0; @@ -1053,12 +1021,6 @@ static int handle_session_buffer(struct msm_vidc_inst *inst, {HFI_BUFFER_DPB, handle_release_internal_buffer }, }; - if (pkt->flags & HFI_FW_FLAGS_SESSION_ERROR) { - i_vpr_e(inst, "%s: received session error\n", __func__); - msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); - return 0; - } - if (pkt->payload_info == HFI_PAYLOAD_NONE) { i_vpr_h(inst, "%s: received hfi buffer packet without payload\n", __func__); @@ -1152,11 +1114,6 @@ static int handle_port_settings_change(struct msm_vidc_inst *inst, static int handle_session_subscribe_mode(struct msm_vidc_inst *inst, struct hfi_packet *pkt) { - if (pkt->flags & HFI_FW_FLAGS_SESSION_ERROR) { - i_vpr_e(inst, "%s: received session error\n", __func__); - msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); - } - if (pkt->flags & HFI_FW_FLAGS_SUCCESS) i_vpr_h(inst, "%s: successful\n", __func__); return 0; @@ -1165,11 +1122,6 @@ static int handle_session_subscribe_mode(struct msm_vidc_inst *inst, static int handle_session_delivery_mode(struct msm_vidc_inst *inst, struct hfi_packet *pkt) { - if (pkt->flags & HFI_FW_FLAGS_SESSION_ERROR) { - i_vpr_e(inst, "%s: received session error\n", __func__); - msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); - } - if (pkt->flags & HFI_FW_FLAGS_SUCCESS) i_vpr_h(inst, "%s: successful\n", __func__); return 0; @@ -1178,11 +1130,6 @@ static int handle_session_delivery_mode(struct msm_vidc_inst *inst, static int handle_session_resume(struct msm_vidc_inst *inst, struct hfi_packet *pkt) { - if (pkt->flags & HFI_FW_FLAGS_SESSION_ERROR) { - i_vpr_e(inst, "%s: received session error\n", __func__); - msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); - } - if (pkt->flags & HFI_FW_FLAGS_SUCCESS) i_vpr_h(inst, "%s: successful\n", __func__); return 0; @@ -1406,12 +1353,6 @@ static int handle_system_property(struct msm_vidc_core *core, { int rc = 0; - if (pkt->flags & HFI_FW_FLAGS_SYSTEM_ERROR) { - d_vpr_e("%s: received system error for property type %#x\n", - __func__, pkt->type); - return handle_system_error(core, pkt); - } - switch (pkt->type) { case HFI_PROP_IMAGE_VERSION: rc = handle_image_version_property(core, pkt); @@ -1442,16 +1383,32 @@ static int handle_system_response(struct msm_vidc_core *core, pkt = start_pkt; for (j = 0; j < hdr->num_packets; j++) { packet = (struct hfi_packet *)pkt; + /* handle system error */ + if (packet->flags & HFI_FW_FLAGS_SYSTEM_ERROR) { + d_vpr_e("%s: received system error %#x\n", + __func__, packet->type); + rc = handle_system_error(core, packet); + if (rc) + goto exit; + goto exit; + } if (in_range(be[i], packet->type)) { rc = be[i].handle(core, packet); if (rc) - return -EINVAL; + goto exit; + + /* skip processing anymore packets after system error */ + if (!i) { + d_vpr_e("%s: skip processing anymore packets\n", __func__); + goto exit; + } } pkt += packet->size; } } - return 0; +exit: + return rc; } static int __handle_session_response(struct msm_vidc_inst *inst, @@ -1475,6 +1432,15 @@ static int __handle_session_response(struct msm_vidc_inst *inst, pkt = start_pkt; for (j = 0; j < hdr->num_packets; j++) { packet = (struct hfi_packet *)pkt; + /* handle session error */ + if (packet->flags & HFI_FW_FLAGS_SESSION_ERROR) { + i_vpr_e(inst, "%s: received session error %#x\n", + __func__, packet->type); + rc = handle_session_error(inst, packet); + if (rc) + goto exit; + continue; + } if (in_range(be[i], packet->type)) { dequeue |= (packet->type == HFI_CMD_BUFFER); rc = be[i].handle(inst, packet); @@ -1484,15 +1450,14 @@ static int __handle_session_response(struct msm_vidc_inst *inst, pkt += packet->size; } } +exit: + memset(&inst->hfi_frame_info, 0, sizeof(struct msm_vidc_hfi_frame_info)); if (dequeue) { rc = handle_dequeue_buffers(inst); if (rc) - goto exit; + return rc; } -exit: - memset(&inst->hfi_frame_info, 0, sizeof(struct msm_vidc_hfi_frame_info)); - return rc; } From 6ec3f9e960806082b44eb0978464bdf776b64c55 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Thu, 29 Apr 2021 10:44:51 -0700 Subject: [PATCH 0267/1061] video: driver: Align buffer interface file with CL: 30395412 Align driver buffer macro interface file with firmware file. Change-Id: I5f3d2a581150452f9becb2dec871040ced6803c5 Signed-off-by: Akshata Sahukar --- driver/variant/iris2/inc/hfi_buffer_iris2.h | 40 +++++++++---------- .../variant/iris2/src/msm_vidc_buffer_iris2.c | 7 +--- 2 files changed, 19 insertions(+), 28 deletions(-) diff --git a/driver/variant/iris2/inc/hfi_buffer_iris2.h b/driver/variant/iris2/inc/hfi_buffer_iris2.h index d049dbafb8..02ca6e325e 100644 --- a/driver/variant/iris2/inc/hfi_buffer_iris2.h +++ b/driver/variant/iris2/inc/hfi_buffer_iris2.h @@ -973,7 +973,8 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ HFI_U32 num_ref = 1; \ if (n_bframe) \ num_ref = 2; \ - if (_total_hp_layers > 1) { \ + if (_total_hp_layers > 1) \ + { \ if (hybrid_hp) \ num_ref = (_total_hp_layers + 1) >> 1; \ else if (codec_standard == HFI_CODEC_ENCODE_HEVC) \ @@ -986,7 +987,8 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ } \ if (ltr_count) \ num_ref = num_ref + ltr_count; \ - if (_total_hb_layers > 1) { \ + if (_total_hb_layers > 1) \ + { \ if (codec_standard == HFI_CODEC_ENCODE_HEVC) \ num_ref = (_total_hb_layers); \ else if (codec_standard == HFI_CODEC_ENCODE_AVC) \ @@ -997,12 +999,14 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define SIZE_BIN_BITSTREAM_ENC(_size, rc_type, frame_width, frame_height, \ work_mode, lcu_size) \ - do { \ + do \ + { \ HFI_U32 size_aligned_width = 0, size_aligned_height = 0; \ HFI_U32 bitstream_size_eval = 0; \ size_aligned_width = HFI_ALIGN((frame_width), lcu_size); \ size_aligned_height = HFI_ALIGN((frame_height), lcu_size); \ - if (work_mode == HFI_WORKMODE_2) { \ + if (work_mode == HFI_WORKMODE_2) \ + { \ if ((rc_type == HFI_RC_CQ) || (rc_type == HFI_RC_OFF)) \ { \ bitstream_size_eval = (((size_aligned_width) * \ @@ -1041,7 +1045,8 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define SIZE_ENC_SINGLE_PIPE(size, rc_type, bitbin_size, num_vpp_pipes, \ frame_width, frame_height, lcu_size) \ - do { \ + do \ + { \ HFI_U32 size_single_pipe_eval = 0, sao_bin_buffer_size = 0, \ _padded_bin_sz = 0; \ HFI_U32 size_aligned_width = 0, size_aligned_height = 0; \ @@ -1537,32 +1542,23 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ HFI_BUFFER_DPB_ENC(_size, frame_width, frame_height, is_ten_bit); \ } while (0) -#define HFI_BUFFER_VPSS_ENC(vpss_size, frame_width, frame_height, ds_enable, \ - rot_enable, flip_enable, is_ten_bit) \ +#define HFI_BUFFER_VPSS_ENC(vpss_size, bitstream_framewidth, bitstream_frameheight, ds_enable, \ + rotation, is_ten_bit) \ do \ { \ - HFI_U32 vpss_size = 0; \ + vpss_size = 0; \ if (ds_enable) \ { \ - if (rot_enable) \ + if (rotation == HFI_ROTATION_90 || rotation == HFI_ROTATION_270 ) \ { \ - HFI_BUFFER_DPB_ENC(vpss_size, frame_height, \ - frame_width, is_ten_bit); \ - } \ - else if (flip_enable) \ - { \ - HFI_BUFFER_DPB_ENC(vpss_size, frame_width, \ - frame_height, is_ten_bit); \ + HFI_BUFFER_DPB_ENC(vpss_size, bitstream_frameheight, \ + bitstream_framewidth, is_ten_bit); \ } \ else \ { \ - vpss_size = 0; \ + HFI_BUFFER_DPB_ENC(vpss_size, bitstream_framewidth, \ + bitstream_frameheight, is_ten_bit); \ } \ - vpss_size = vpss_size; \ - } \ - else \ - { \ - vpss_size = vpss_size; \ } \ } while (0) diff --git a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c index 6248993519..073ba69aab 100644 --- a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c @@ -443,7 +443,6 @@ static u32 msm_vidc_encoder_vpss_size_iris2(struct msm_vidc_inst* inst) u32 size = 0; bool ds_enable = false, is_tenbit = false; u32 rotation_val = HFI_ROTATION_NONE; - u32 flip_val = HFI_DISABLE_FLIP; u32 width, height, driver_colorfmt; struct v4l2_format* f; @@ -454,10 +453,6 @@ static u32 msm_vidc_encoder_vpss_size_iris2(struct msm_vidc_inst* inst) ds_enable = is_scaling_enabled(inst); msm_vidc_v4l2_to_hfi_enum(inst, ROTATION, &rotation_val); - if (inst->capabilities->cap[HFLIP].value) - flip_val |= HFI_HORIZONTAL_FLIP; - if (inst->capabilities->cap[VFLIP].value) - flip_val = HFI_VERTICAL_FLIP; width = inst->compose.width; height = inst->compose.height; @@ -468,7 +463,7 @@ static u32 msm_vidc_encoder_vpss_size_iris2(struct msm_vidc_inst* inst) is_tenbit = is_10bit_colorformat(driver_colorfmt); HFI_BUFFER_VPSS_ENC(size, width, height, ds_enable, - rotation_val, flip_val, is_tenbit); + rotation_val, is_tenbit); i_vpr_l(inst, "%s: size %d\n", __func__, size); return size; } From 18e731edaa7ad8261b5be4264b28e4731c7d7155 Mon Sep 17 00:00:00 2001 From: Mihir Ganu Date: Thu, 29 Apr 2021 18:15:46 -0700 Subject: [PATCH 0268/1061] video: driver: Check failures during session close Check if cmd queue write failed and return the error code during session close. Change-Id: Iaa4579cdb8ad5f622623c957a781ab0a9104153d Signed-off-by: Mihir Ganu --- driver/vidc/src/venus_hfi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index 23b36f99fd..b668a915ec 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -3134,7 +3134,7 @@ int venus_hfi_session_close(struct msm_vidc_inst *inst) NULL, 0); if (!rc) - __iface_cmdq_write(inst->core, inst->packet); + rc = __iface_cmdq_write(inst->core, inst->packet); return rc; } From 35b7d3442955474bc3eb0f88dc412e49272bd82b Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Thu, 29 Apr 2021 16:10:34 +0530 Subject: [PATCH 0269/1061] video: driver: tune image_encode_session settings [1] Increase min_output buffer_count from 1 to 4. [2] Enable FRAME_RC_ENABLE cap for image session. default - RC_CQ mode. Change-Id: Iad3166fe37733e9d9ccde1dca29af8c7b825cc98 Signed-off-by: Govindaraj Rajagopal --- driver/platform/waipio/src/msm_vidc_waipio.c | 7 +------ driver/vidc/src/msm_vidc_buffer.c | 15 ++------------- 2 files changed, 3 insertions(+), 19 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 88e0b97397..6c238b1684 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -387,7 +387,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 0, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - {FRAME_RC_ENABLE, ENC, H264|HEVC, + {FRAME_RC_ENABLE, ENC, H264|HEVC|HEIC, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_ENABLE, V4L2_CID_MPEG_VIDEO_FRAME_RC_ENABLE}, @@ -1316,11 +1316,6 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {FRAME_HEIGHT, DEC, HEIC, 512, 8192, 1, 8192}, {MIN_BUFFERS_INPUT, ENC|DEC, HEIC, 0, 64, 1, 1, V4L2_CID_MIN_BUFFERS_FOR_OUTPUT}, - {MIN_BUFFERS_OUTPUT, ENC|DEC, HEIC, - 0, 64, 1, 1, - V4L2_CID_MIN_BUFFERS_FOR_CAPTURE, - HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, {MBPF, ENC, HEIC, 64, 262144, 262144}, /* ((8192x8192)/256) */ {MBPF, DEC, HEIC, 36, 1048576, 1, 1048576}, /* ((16384x16384)/256) */ {MBPS, ENC, HEIC, 64, 262144, 262144}, /* ((8192x8192)/256)@1fps */ diff --git a/driver/vidc/src/msm_vidc_buffer.c b/driver/vidc/src/msm_vidc_buffer.c index 865c3c8e5a..46cf0c8370 100644 --- a/driver/vidc/src/msm_vidc_buffer.c +++ b/driver/vidc/src/msm_vidc_buffer.c @@ -14,7 +14,6 @@ u32 msm_vidc_input_min_count(struct msm_vidc_inst* inst) { u32 input_min_count = 0; - //struct v4l2_ctrl *max_layer = NULL; if (!inst) { d_vpr_e("%s: invalid params\n", __func__); @@ -49,7 +48,7 @@ u32 msm_vidc_output_min_count(struct msm_vidc_inst *inst) if (!is_decode_session(inst) && !is_encode_session(inst)) return 0; - if (is_thumbnail_session(inst) || is_image_session(inst)) + if (is_thumbnail_session(inst)) return 1; if (is_decode_session(inst)) { @@ -69,15 +68,9 @@ u32 msm_vidc_output_min_count(struct msm_vidc_inst *inst) } } else { output_min_count = MIN_ENC_OUTPUT_BUFFERS; + //todo: reduce heic count to 2, once HAL side cushion is added } - //if (is_vpp_delay_allowed(inst)) { - // output_min_count = - // max(output_min_count, (u32)MAX_BSE_VPP_DELAY); - // output_min_count = - // max(output_min_count, (u32)(msm_vidc_vpp_delay & 0x1F)); - //} - return output_min_count; } @@ -149,9 +142,6 @@ u32 msm_vidc_output_extra_count(struct msm_vidc_inst *inst) count < inst->decode_batch.size) count = inst->decode_batch.size; - } else if (is_encode_session(inst)) { - /* add heif buffers */ - //count = 8 } return count; @@ -189,7 +179,6 @@ u32 msm_vidc_internal_buffer_count(struct msm_vidc_inst *inst, count = 0; } } - //todo: add enc support if needed return count; } From 3c72173fec5104237347e427f7afc5d39592f6d7 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Fri, 30 Apr 2021 11:52:14 -0700 Subject: [PATCH 0270/1061] video: driver: fix to allocate enc VPSS buffers in CB7 Allocate VPSS buffers in venus_ns_pixel region instead of venus_ns to avoid bitstream corruption for downscale plus rotation usecases. Change-Id: Iab03f23d30c8476c90e958411944db058582a9fb Signed-off-by: Akshata Sahukar --- driver/vidc/src/msm_vidc_driver.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 55146f375a..434dc2affb 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -842,6 +842,7 @@ u32 msm_vidc_get_buffer_region(struct msm_vidc_inst *inst, region = MSM_VIDC_NON_SECURE_PIXEL; break; case MSM_VIDC_BUF_DPB: + case MSM_VIDC_BUF_VPSS: region = MSM_VIDC_NON_SECURE_PIXEL; break; case MSM_VIDC_BUF_INPUT_META: @@ -851,7 +852,6 @@ u32 msm_vidc_get_buffer_region(struct msm_vidc_inst *inst, case MSM_VIDC_BUF_NON_COMV: case MSM_VIDC_BUF_LINE: case MSM_VIDC_BUF_PERSIST: - case MSM_VIDC_BUF_VPSS: region = MSM_VIDC_NON_SECURE; break; default: From ce09f77e44e7d311ca4ef3f17e94116f98a3abf4 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Fri, 30 Apr 2021 17:08:09 -0700 Subject: [PATCH 0271/1061] video: driver: free children and firmware list memory To avoid memory leakage, clean children and firmware lists at session close, error cases, and at the end of each usage. Change-Id: I1eadbf81da207bd987c50428c0c7cf4967a8885f Signed-off-by: Akshata Sahukar --- driver/vidc/inc/msm_vidc_control.h | 5 ----- driver/vidc/inc/msm_vidc_driver.h | 2 ++ driver/vidc/inc/msm_vidc_internal.h | 5 +++++ driver/vidc/src/msm_vidc_control.c | 8 ++++++++ driver/vidc/src/msm_vidc_driver.c | 26 ++++++++++++++++++++++++++ 5 files changed, 41 insertions(+), 5 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_control.h b/driver/vidc/inc/msm_vidc_control.h index 895cacf003..fba78b166c 100644 --- a/driver/vidc/inc/msm_vidc_control.h +++ b/driver/vidc/inc/msm_vidc_control.h @@ -10,11 +10,6 @@ #include "msm_vidc_inst.h" #include "msm_vidc_internal.h" -enum msm_vidc_ctrl_list_type { - CHILD_LIST = BIT(0), - FW_LIST = BIT(1), -}; - int msm_vidc_ctrl_init(struct msm_vidc_inst *inst); int msm_vidc_ctrl_deinit(struct msm_vidc_inst *inst); int msm_v4l2_op_s_ctrl(struct v4l2_ctrl *ctrl); diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 9b9ae32780..5c044c0b18 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -387,5 +387,7 @@ int msm_vidc_check_session_supported(struct msm_vidc_inst *inst); int msm_vidc_check_mbps_supported(struct msm_vidc_inst *inst); int msm_vidc_check_scaling_supported(struct msm_vidc_inst *inst); const char *buf_name(enum msm_vidc_buffer_type type); +void msm_vidc_free_capabililty_list(struct msm_vidc_inst *inst, + enum msm_vidc_ctrl_list_type list_type); #endif // _MSM_VIDC_DRIVER_H_ diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 4fa2f96cbb..337895df30 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -292,6 +292,11 @@ enum msm_vidc_matrix_coefficients { MSM_VIDC_MATRIX_COEFF_BT2100 = 14, }; +enum msm_vidc_ctrl_list_type { + CHILD_LIST = BIT(0), + FW_LIST = BIT(1), +}; + enum msm_vidc_core_capability_type { CORE_CAP_NONE = 0, ENC_CODECS, diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index b36e6f516b..6f26819883 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -757,6 +757,9 @@ int msm_v4l2_op_s_ctrl(struct v4l2_ctrl *ctrl) } exit: + if (rc) + msm_vidc_free_capabililty_list(inst, CHILD_LIST | FW_LIST); + return rc; } @@ -1817,6 +1820,9 @@ int msm_vidc_adjust_v4l2_properties(struct msm_vidc_inst *inst) } exit: + if (rc) + msm_vidc_free_capabililty_list(inst, CHILD_LIST | FW_LIST); + return rc; } @@ -2742,6 +2748,8 @@ int msm_vidc_set_v4l2_properties(struct msm_vidc_inst *inst) } exit: + msm_vidc_free_capabililty_list(inst, FW_LIST); + return rc; } diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 55146f375a..f3a7cfb648 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -2561,6 +2561,31 @@ static void msm_vidc_free_input_cr_list(struct msm_vidc_inst *inst) INIT_LIST_HEAD(&inst->enc_input_crs); } +void msm_vidc_free_capabililty_list(struct msm_vidc_inst *inst, + enum msm_vidc_ctrl_list_type list_type) +{ + struct msm_vidc_inst_cap_entry *temp = NULL, *next = NULL; + + if (list_type & CHILD_LIST) { + list_for_each_entry_safe(temp, next, &inst->children.list, list) { + list_del(&temp->list); + kfree(temp); + } + INIT_LIST_HEAD(&inst->children.list); + } + + temp = NULL; + next = NULL; + + if (list_type & FW_LIST) { + list_for_each_entry_safe(temp, next, &inst->firmware.list, list) { + list_del(&temp->list); + kfree(temp); + } + INIT_LIST_HEAD(&inst->firmware.list); + } +} + static int msm_vidc_queue_buffer(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buf) { struct msm_vidc_buffer *meta; @@ -4263,6 +4288,7 @@ static void msm_vidc_close_helper(struct kref *kref) else if (is_encode_session(inst)) msm_venc_inst_deinit(inst); msm_vidc_free_input_cr_list(inst); + msm_vidc_free_capabililty_list(inst, CHILD_LIST | FW_LIST); kfree(inst->capabilities); if (inst->response_workq) destroy_workqueue(inst->response_workq); From b0997af91067f216035a7c50eb6999b8d3821698 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Mon, 3 May 2021 18:20:05 +0530 Subject: [PATCH 0272/1061] video: driver: avoid race between core_timeout and handle_response In fwd thread, for sync cmd timeout, core->response_packet willbe freed as part of venus_hfi_core_deinit. So i.e leading to a crash at reverse thread, which is, in the middle of processing response packet as part of handle_response api. So added change to avoid this race issue. Change-Id: Ice7e52c46e8858c89439c17213a08d01b358fe9d Signed-off-by: Govindaraj Rajagopal --- driver/vidc/src/msm_vidc_probe.c | 25 +++++++++++++++++++++++++ driver/vidc/src/venus_hfi.c | 19 ------------------- driver/vidc/src/venus_hfi_response.c | 1 - 3 files changed, 25 insertions(+), 20 deletions(-) diff --git a/driver/vidc/src/msm_vidc_probe.c b/driver/vidc/src/msm_vidc_probe.c index a24e01fb55..c1b7e06282 100644 --- a/driver/vidc/src/msm_vidc_probe.c +++ b/driver/vidc/src/msm_vidc_probe.c @@ -180,6 +180,11 @@ static int msm_vidc_deinitialize_core(struct msm_vidc_core *core) mutex_destroy(&core->lock); msm_vidc_change_core_state(core, MSM_VIDC_CORE_DEINIT, __func__); + kfree(core->response_packet); + kfree(core->packet); + core->response_packet = NULL; + core->packet = NULL; + if (core->batch_workq) destroy_workqueue(core->batch_workq); @@ -229,6 +234,22 @@ static int msm_vidc_initialize_core(struct msm_vidc_core *core) goto exit; } + core->packet_size = 4096; + core->packet = kzalloc(core->packet_size, GFP_KERNEL); + if (!core->packet) { + d_vpr_e("%s(): core packet allocation failed\n", __func__); + rc = -ENOMEM; + goto exit; + } + + core->response_packet = kzalloc(core->packet_size, GFP_KERNEL); + if (!core->response_packet) { + d_vpr_e("%s(): core response packet allocation failed\n", + __func__); + rc = -ENOMEM; + goto exit; + } + mutex_init(&core->lock); INIT_LIST_HEAD(&core->instances); INIT_LIST_HEAD(&core->dangling_instances); @@ -240,6 +261,10 @@ static int msm_vidc_initialize_core(struct msm_vidc_core *core) return 0; exit: + kfree(core->response_packet); + kfree(core->packet); + core->response_packet = NULL; + core->packet = NULL; if (core->batch_workq) destroy_workqueue(core->batch_workq); if (core->pm_workq) diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index b668a915ec..131fef5585 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -2805,21 +2805,6 @@ int venus_hfi_core_init(struct msm_vidc_core *core) __strict_check(core); - core->packet_size = 4096; - core->packet = kzalloc(core->packet_size, GFP_KERNEL); - if (!core->packet) { - d_vpr_e("%s(): core packet allocation failed\n", __func__); - return -ENOMEM; - } - - core->response_packet = kzalloc(core->packet_size, GFP_KERNEL); - if (!core->response_packet) { - d_vpr_e("%s(): core response packet allocation failed\n", - __func__); - kfree(core->packet); - return -ENOMEM; - } - core->handoff_done = 0; rc = __load_fw(core); @@ -2879,10 +2864,6 @@ int venus_hfi_core_deinit(struct msm_vidc_core *core) __disable_subcaches(core); __interface_queues_deinit(core); __unload_fw(core); - kfree(core->response_packet); - core->response_packet = NULL; - kfree(core->packet); - core->packet = NULL; return 0; } diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index f1cb8bb80a..ec93e7c0c9 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -1439,7 +1439,6 @@ static int __handle_session_response(struct msm_vidc_inst *inst, rc = handle_session_error(inst, packet); if (rc) goto exit; - continue; } if (in_range(be[i], packet->type)) { dequeue |= (packet->type == HFI_CMD_BUFFER); From 78bd0f54eb9aeeda3db149c66aff8522521215ac Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Wed, 28 Apr 2021 17:50:34 -0700 Subject: [PATCH 0273/1061] video: driver: fix layer bitrate dynamic setting Fix the issue where bitrate cap database value is incorrectly updated to dynamically client set layer bitrate value when layer bitarte is not set. Change-Id: I0f66c056c8ea0d053f8347dd003b61193258687e Signed-off-by: Akshata Sahukar --- driver/platform/waipio/src/msm_vidc_waipio.c | 36 +- driver/vidc/inc/msm_vidc_control.h | 4 +- driver/vidc/src/msm_vidc_control.c | 349 ++++++++++++++----- 3 files changed, 293 insertions(+), 96 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 8a3d2692ef..99d178bb87 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -752,7 +752,8 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, {0}, {0}, - msm_vidc_adjust_bitrate, msm_vidc_set_bitrate}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, {L1_BR, ENC, HEVC, 1, MAX_BITRATE, 1, DEFAULT_BITRATE, @@ -761,7 +762,8 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, {0}, {0}, - msm_vidc_adjust_bitrate, msm_vidc_set_bitrate}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, {L2_BR, ENC, HEVC, 1, MAX_BITRATE, 1, DEFAULT_BITRATE, @@ -770,7 +772,8 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, {0}, {0}, - msm_vidc_adjust_bitrate, msm_vidc_set_bitrate}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, {L3_BR, ENC, HEVC, 1, MAX_BITRATE, 1, DEFAULT_BITRATE, @@ -779,7 +782,8 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, {0}, {0}, - msm_vidc_adjust_bitrate, msm_vidc_set_bitrate}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, {L4_BR, ENC, HEVC, 1, MAX_BITRATE, 1, DEFAULT_BITRATE, @@ -788,7 +792,8 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, {0}, {0}, - msm_vidc_adjust_bitrate, msm_vidc_set_bitrate}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, {L5_BR, ENC, HEVC, 1, MAX_BITRATE, 1, DEFAULT_BITRATE, @@ -797,7 +802,8 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, {0}, {0}, - msm_vidc_adjust_bitrate, msm_vidc_set_bitrate}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, {L0_BR, ENC, H264, 1, MAX_BITRATE, 1, DEFAULT_BITRATE, @@ -806,7 +812,8 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, {0}, {0}, - msm_vidc_adjust_bitrate, msm_vidc_set_bitrate}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, {L1_BR, ENC, H264, 1, MAX_BITRATE, 1, DEFAULT_BITRATE, @@ -815,7 +822,8 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, {0}, {0}, - msm_vidc_adjust_bitrate, msm_vidc_set_bitrate}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, {L2_BR, ENC, H264, 1, MAX_BITRATE, 1, DEFAULT_BITRATE, @@ -824,7 +832,8 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, {0}, {0}, - msm_vidc_adjust_bitrate, msm_vidc_set_bitrate}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, {L3_BR, ENC, H264, 1, MAX_BITRATE, 1, DEFAULT_BITRATE, @@ -833,7 +842,8 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, {0}, {0}, - msm_vidc_adjust_bitrate, msm_vidc_set_bitrate}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, {L4_BR, ENC, H264, 1, MAX_BITRATE, 1, DEFAULT_BITRATE, @@ -842,7 +852,8 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, {0}, {0}, - msm_vidc_adjust_bitrate, msm_vidc_set_bitrate}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, {L5_BR, ENC, H264, 1, MAX_BITRATE, 1, DEFAULT_BITRATE, @@ -851,7 +862,8 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, {0}, {0}, - msm_vidc_adjust_bitrate, msm_vidc_set_bitrate}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, {ENTROPY_MODE, ENC, H264, V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC, diff --git a/driver/vidc/inc/msm_vidc_control.h b/driver/vidc/inc/msm_vidc_control.h index 895cacf003..f26220bd6f 100644 --- a/driver/vidc/inc/msm_vidc_control.h +++ b/driver/vidc/inc/msm_vidc_control.h @@ -19,6 +19,7 @@ int msm_vidc_ctrl_init(struct msm_vidc_inst *inst); int msm_vidc_ctrl_deinit(struct msm_vidc_inst *inst); int msm_v4l2_op_s_ctrl(struct v4l2_ctrl *ctrl); int msm_vidc_adjust_bitrate(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_dynamic_layer_bitrate(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_bitrate_mode(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_entropy_mode(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_profile(void *instance, struct v4l2_ctrl *ctrl); @@ -32,7 +33,6 @@ int msm_vidc_adjust_slice_count(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_layer_count(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_gop_size(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_b_frame(void *instance, struct v4l2_ctrl *ctrl); -int msm_vidc_adjust_bitrate(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_peak_bitrate(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_hevc_min_qp(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_hevc_max_qp(void *instance, struct v4l2_ctrl *ctrl); @@ -65,6 +65,8 @@ int msm_vidc_set_gop_size(void *instance, enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_bitrate(void *instance, enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_dynamic_layer_bitrate(void *instance, + enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_u32(void *instance, enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_u32_enum(void *instance, diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index b36e6f516b..880150a09b 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -1413,15 +1413,54 @@ exit: return 0; } -int msm_vidc_adjust_bitrate(void *instance, struct v4l2_ctrl *ctrl) +static bool msm_vidc_check_all_layer_bitrate_set(struct msm_vidc_inst *inst) +{ + bool layer_bitrate_set = true; + u32 cap_id = 0, i, enh_layer_count; + u32 layer_br_caps[6] = {L0_BR, L1_BR, L2_BR, L3_BR, L4_BR, L5_BR}; + + enh_layer_count = inst->capabilities->cap[ENH_LAYER_COUNT].value; + + for (i = 0; i <= enh_layer_count; i++) { + if (i >= ARRAY_SIZE(layer_br_caps)) + break; + cap_id = layer_br_caps[i]; + if (!(inst->capabilities->cap[cap_id].flags & CAP_FLAG_CLIENT_SET)) { + layer_bitrate_set = false; + break; + } + } + + return layer_bitrate_set; +} + +static u32 msm_vidc_get_cumulative_bitrate(struct msm_vidc_inst *inst) { int i; - struct msm_vidc_inst_capability *capability; - s32 adjusted_value; + u32 cap_id = 0; + u32 cumulative_br = 0; + s32 enh_layer_count; + u32 layer_br_caps[6] = {L0_BR, L1_BR, L2_BR, L3_BR, L4_BR, L5_BR}; + + enh_layer_count = inst->capabilities->cap[ENH_LAYER_COUNT].value; + + for (i = 0; i <= enh_layer_count; i++) { + if (i >= ARRAY_SIZE(layer_br_caps)) + break; + cap_id = layer_br_caps[i]; + cumulative_br += inst->capabilities->cap[cap_id].value; + } + + return cumulative_br; +} + +int msm_vidc_adjust_bitrate(void *instance, struct v4l2_ctrl *ctrl) +{ + int i, rc = 0; struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - s32 rc_type = -1, enh_layer_count = -1; - u32 cap_id = 0, cumulative_bitrate = 0; - bool layer_bitrate_set = false; + struct msm_vidc_inst_capability *capability; + s32 adjusted_value, max_bitrate, enh_layer_count; + u32 cumulative_bitrate = 0, cap_id = 0, cap_value = 0; u32 layer_br_caps[6] = {L0_BR, L1_BR, L2_BR, L3_BR, L4_BR, L5_BR}; if (!inst || !inst->capabilities) { @@ -1430,72 +1469,150 @@ int msm_vidc_adjust_bitrate(void *instance, struct v4l2_ctrl *ctrl) } capability = inst->capabilities; - adjusted_value = ctrl ? ctrl->val : - capability->cap[BIT_RATE].value; - /* ignore layer bitrate when total bitrate is set */ - if (capability->cap[BIT_RATE].flags & CAP_FLAG_CLIENT_SET) - goto exit; + if (capability->cap[BIT_RATE].flags & CAP_FLAG_CLIENT_SET) { + /* + * For static case, ctrl is null. + * For dynamic case, only BIT_RATE cap uses this adjust function. + * Hence, no need to check for ctrl id to be BIT_RATE control, and not + * any of layer bitrate controls. + */ + adjusted_value = ctrl ? ctrl->val : capability->cap[BIT_RATE].value; + msm_vidc_update_cap_value(inst, BIT_RATE, adjusted_value, __func__); + + return 0; + } + + if (inst->vb2q[OUTPUT_PORT].streaming) + return 0; if (msm_vidc_get_parent_value(inst, BIT_RATE, ENH_LAYER_COUNT, &enh_layer_count, __func__)) return -EINVAL; - if (msm_vidc_get_parent_value(inst, BIT_RATE, - BITRATE_MODE, &rc_type, __func__)) - return -EINVAL; + max_bitrate = inst->capabilities->cap[BIT_RATE].max; /* * ENH_LAYER_COUNT cap max is positive only if - * layer encoding is enabled for static setting + * layer encoding is enabled during streamon. */ if (capability->cap[ENH_LAYER_COUNT].max) { - layer_bitrate_set = true; - for (i = 0; i <= enh_layer_count; i++) { - if (i >= ARRAY_SIZE(layer_br_caps)) - break; - cap_id = layer_br_caps[i]; - if (!(capability->cap[cap_id].flags & CAP_FLAG_CLIENT_SET)) { - layer_bitrate_set = false; - break; - } - cumulative_bitrate += capability->cap[cap_id].value; + if (!msm_vidc_check_all_layer_bitrate_set(inst)) { + i_vpr_h(inst, + "%s: client did not set all layer bitrates\n", + __func__); + return 0; } - /* layer bitrate supported only for CBR rc */ - if (layer_bitrate_set && - (rc_type == HFI_RC_CBR_CFR || rc_type == HFI_RC_CBR_VFR)) { - if (cumulative_bitrate > capability->cap[BIT_RATE].max) - cumulative_bitrate = - capability->cap[BIT_RATE].max; - adjusted_value = cumulative_bitrate; - i_vpr_h(inst, - "%s: update BIT_RATE with cumulative bitrate\n", - __func__); - } - } else { - for (i = 0; i < sizeof(layer_br_caps) / sizeof(u32); i++) { - if (i >= ARRAY_SIZE(layer_br_caps)) - break; - cap_id = layer_br_caps[i]; - /* - * layer bitrate cannot be set - * when layer encoding is disabled - */ - if (capability->cap[cap_id].flags & - CAP_FLAG_CLIENT_SET) { - i_vpr_e(inst, - "%s: invalid layer bitrate set\n", - __func__); - return -EINVAL; + cumulative_bitrate = msm_vidc_get_cumulative_bitrate(inst); + + /* cap layer bitrates to max supported bitrate */ + if (cumulative_bitrate > max_bitrate) { + u32 decrement_in_value = 0; + u32 decrement_in_percent = ((cumulative_bitrate - max_bitrate) * 100) / + max_bitrate; + + cumulative_bitrate = 0; + for (i = 0; i <= enh_layer_count; i++) { + if (i >= ARRAY_SIZE(layer_br_caps)) + break; + cap_id = layer_br_caps[i]; + cap_value = inst->capabilities->cap[cap_id].value; + + decrement_in_value = (cap_value * + decrement_in_percent) / 100; + cumulative_bitrate += (cap_value - decrement_in_value); + + /* + * cap value for the L*_BR is changed. Hence, update cap, + * and add to FW_LIST to set new values to firmware. + */ + msm_vidc_update_cap_value(inst, cap_id, + (cap_value - decrement_in_value), __func__); } } + + i_vpr_h(inst, + "%s: update BIT_RATE with cumulative bitrate\n", + __func__); + msm_vidc_update_cap_value(inst, BIT_RATE, + cumulative_bitrate, __func__); } -exit: + return rc; +} + +int msm_vidc_adjust_dynamic_layer_bitrate(void *instance, struct v4l2_ctrl *ctrl) +{ + int rc = 0; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + struct msm_vidc_inst_capability *capability; + u32 cumulative_bitrate = 0; + u32 client_set_cap_id = INST_CAP_NONE; + u32 old_br = 0, new_br = 0, exceeded_br = 0; + s32 max_bitrate; + + if (!inst || !inst->capabilities || !ctrl) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + /* ignore layer bitrate when total bitrate is set */ + if (capability->cap[BIT_RATE].flags & CAP_FLAG_CLIENT_SET) + return 0; + + if (!inst->vb2q[OUTPUT_PORT].streaming) + return 0; + + /* + * ENH_LAYER_COUNT cap max is positive only if + * layer encoding is enabled during streamon. + */ + if (!capability->cap[ENH_LAYER_COUNT].max) { + i_vpr_e(inst, "%s: layers not enabled\n", __func__); + return -EINVAL; + } + + if (!msm_vidc_check_all_layer_bitrate_set(inst)) { + i_vpr_h(inst, + "%s: client did not set all layer bitrates\n", + __func__); + return 0; + } + + client_set_cap_id = msm_vidc_get_cap_id(inst, ctrl->id); + if (client_set_cap_id == INST_CAP_NONE) { + i_vpr_e(inst, "%s: could not find cap_id for ctrl %s\n", + __func__, ctrl->name); + return -EINVAL; + } + + cumulative_bitrate = msm_vidc_get_cumulative_bitrate(inst); + max_bitrate = inst->capabilities->cap[BIT_RATE].max; + old_br = capability->cap[client_set_cap_id].value; + new_br = ctrl->val; + + /* + * new bitrate is not supposed to cause cumulative bitrate to + * exceed max supported bitrate + */ + + if ((cumulative_bitrate - old_br + new_br) > max_bitrate) { + /* adjust new bitrate */ + exceeded_br = (cumulative_bitrate - old_br + new_br) - max_bitrate; + new_br = ctrl->val - exceeded_br; + } + msm_vidc_update_cap_value(inst, client_set_cap_id, new_br, __func__); + + /* adjust totol bitrate cap */ + i_vpr_h(inst, + "%s: update BIT_RATE with cumulative bitrate\n", + __func__); msm_vidc_update_cap_value(inst, BIT_RATE, - adjusted_value, __func__); - return 0; + msm_vidc_get_cumulative_bitrate(inst), __func__); + + return rc; } int msm_vidc_adjust_peak_bitrate(void *instance, struct v4l2_ctrl *ctrl) @@ -2403,7 +2520,6 @@ int msm_vidc_set_bitrate(void *instance, u32 hfi_value = 0; s32 rc_type = -1, enh_layer_count = -1; u32 layer_br_caps[6] = {L0_BR, L1_BR, L2_BR, L3_BR, L4_BR, L5_BR}; - bool layer_bitrate_set = false; if (!inst || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); @@ -2414,44 +2530,50 @@ int msm_vidc_set_bitrate(void *instance, if (inst->capabilities->cap[BIT_RATE].flags & CAP_FLAG_CLIENT_SET) goto set_total_bitrate; - if (msm_vidc_get_parent_value(inst, BIT_RATE, - ENH_LAYER_COUNT, &enh_layer_count, __func__)) - return -EINVAL; + /* + * During runtime, if BIT_RATE cap CLIENT_SET flag is not set, + * then this function will be called due to change in ENH_LAYER_COUNT. + * In this case, client did not change bitrate, hence, no need to set + * to fw. + */ + if (inst->vb2q[OUTPUT_PORT].streaming) + return 0; if (msm_vidc_get_parent_value(inst, BIT_RATE, BITRATE_MODE, &rc_type, __func__)) return -EINVAL; - if (inst->capabilities->cap[ENH_LAYER_COUNT].max && - (rc_type == HFI_RC_CBR_CFR || - rc_type == HFI_RC_CBR_VFR)) { - layer_bitrate_set = true; + if (rc_type != HFI_RC_CBR_CFR && rc_type != HFI_RC_CBR_VFR) { + i_vpr_h(inst, "%s: set total bitrate for non CBR rc type\n", + __func__); + goto set_total_bitrate; + } + + if (msm_vidc_get_parent_value(inst, BIT_RATE, + ENH_LAYER_COUNT, &enh_layer_count, __func__)) + return -EINVAL; + + /* + * ENH_LAYER_COUNT cap max is positive only if + * layer encoding is enabled during streamon. + */ + if (inst->capabilities->cap[ENH_LAYER_COUNT].max) { + if (!msm_vidc_check_all_layer_bitrate_set(inst)) + goto set_total_bitrate; + + /* set Layer Bitrate */ for (i = 0; i <= enh_layer_count; i++) { if (i >= ARRAY_SIZE(layer_br_caps)) break; cap_id = layer_br_caps[i]; - if (!(inst->capabilities->cap[cap_id].flags & - CAP_FLAG_CLIENT_SET)) { - layer_bitrate_set = false; - break; - } - } - - if (layer_bitrate_set) { - /* set Layer Bitrate */ - for (i = 0; i <= enh_layer_count; i++) { - if (i >= ARRAY_SIZE(layer_br_caps)) - break; - cap_id = layer_br_caps[i]; - hfi_value = inst->capabilities->cap[cap_id].value; - rc = msm_vidc_packetize_control(inst, cap_id, - HFI_PAYLOAD_U32, &hfi_value, - sizeof(u32), __func__); - if (rc) - return rc; - } - goto exit; + hfi_value = inst->capabilities->cap[cap_id].value; + rc = msm_vidc_packetize_control(inst, cap_id, + HFI_PAYLOAD_U32, &hfi_value, + sizeof(u32), __func__); + if (rc) + return rc; } + goto exit; } set_total_bitrate: @@ -2464,6 +2586,67 @@ exit: return rc; } +int msm_vidc_set_dynamic_layer_bitrate(void *instance, + enum msm_vidc_inst_capability_type cap_id) +{ + int rc = 0; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; + u32 hfi_value = 0; + s32 rc_type = -1; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (!inst->vb2q[OUTPUT_PORT].streaming) + return 0; + + /* set Total Bitrate */ + if (inst->capabilities->cap[BIT_RATE].flags & CAP_FLAG_CLIENT_SET) { + i_vpr_h(inst, + "%s: Total bitrate is set, ignore layer bitrate\n", + __func__); + return 0; + } + + /* + * ENH_LAYER_COUNT cap max is positive only if + * layer encoding is enabled during streamon. + */ + if (!inst->capabilities->cap[ENH_LAYER_COUNT].max || + !msm_vidc_check_all_layer_bitrate_set(inst)) { + i_vpr_h(inst, + "%s: invalid layer bitrate, ignore setting to fw\n", + __func__); + return 0; + } + + if (inst->hfi_rc_type == HFI_RC_CBR_CFR || + rc_type == HFI_RC_CBR_VFR) { + /* set layer bitrate for the client set layer */ + hfi_value = inst->capabilities->cap[cap_id].value; + rc = msm_vidc_packetize_control(inst, cap_id, + HFI_PAYLOAD_U32, &hfi_value, + sizeof(u32), __func__); + if (rc) + return rc; + } else { + /* + * All layer bitartes set for unsupported rc type. + * Hence accept layer bitrates, but set total bitrate prop + * with cumulative bitrate. + */ + hfi_value = inst->capabilities->cap[BIT_RATE].value; + rc = msm_vidc_packetize_control(inst, BIT_RATE, HFI_PAYLOAD_U32, + &hfi_value, sizeof(u32), __func__); + if (rc) + return rc; + } + + return rc; +} + int msm_vidc_set_session_priority(void *instance, enum msm_vidc_inst_capability_type cap_id) { From 8b019a5057f1c5d5658225335782e7e6e1aae2f8 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Tue, 4 May 2021 11:30:18 +0530 Subject: [PATCH 0274/1061] video: driver: tune bitdepth settings if any one of the luma/chroma is not 8 bit, then treat as 10 bit content. So expose only 10-bit colorfmts for such contents during enumFmt ioctl. Change-Id: Ied6bacae25aa900918744730807a476f5762d49d Signed-off-by: Govindaraj Rajagopal --- driver/vidc/src/msm_vdec.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 8493f4d05c..1ec521e917 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -1349,7 +1349,10 @@ static int msm_vdec_read_input_subcr_params(struct msm_vidc_inst *inst) msm_vidc_update_cap_value(inst, LEVEL, subsc_params.level, __func__); msm_vidc_update_cap_value(inst, HEVC_TIER, subsc_params.tier, __func__); msm_vidc_update_cap_value(inst, POC, subsc_params.pic_order_cnt, __func__); - msm_vidc_update_cap_value(inst, BIT_DEPTH, subsc_params.bit_depth, __func__); + if (subsc_params.bit_depth == BIT_DEPTH_8) + msm_vidc_update_cap_value(inst, BIT_DEPTH, BIT_DEPTH_8, __func__); + else + msm_vidc_update_cap_value(inst, BIT_DEPTH, BIT_DEPTH_10, __func__); if (subsc_params.coded_frames & HFI_BITMASK_FRAME_MBS_ONLY_FLAG) msm_vidc_update_cap_value(inst, CODED_FRAMES, CODED_FRAMES_PROGRESSIVE, __func__); else From 03db3bfd7fd9c58f14e35f2e0a42fab42d6c6076 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Mon, 3 May 2021 16:54:43 +0530 Subject: [PATCH 0275/1061] video: driver: add check_session_supported for session admission - check total mbps is within range(including current session) - check total mbpf is within range(including current session) - image session: - decode: Only non-secure allowed - encode: check basic image_encode requirements - wxh should be within allowed cap range - only linear fmt - input & output is 512 aligned - only CQ bitrate mode - GOP size should be zero - b-frame count is zero - timedelta based RC disabled - still-pic profile for 8bit and main10 for 10bit - interlace resolution should be less than (1920*1088)/256. - reject odd input or output resolution - output resolution is with in inst->cap [min, max] range. - current session mbpf is less than inst->cap[MBPF].max Change-Id: I81c46950a8ef5b64bf5ac94564613998b1079b52 Signed-off-by: Govindaraj Rajagopal Signed-off-by: Mihir Ganu --- driver/platform/waipio/src/msm_vidc_waipio.c | 10 +- driver/vidc/inc/msm_vidc_power.h | 1 + driver/vidc/src/msm_vdec.c | 17 -- driver/vidc/src/msm_venc.c | 18 -- driver/vidc/src/msm_vidc_driver.c | 257 +++++++++++++------ driver/vidc/src/msm_vidc_power.c | 2 +- 6 files changed, 188 insertions(+), 117 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 99d178bb87..b1ea1b24a0 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -1331,15 +1331,13 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { /* configure image properties */ {FRAME_WIDTH, ENC, HEIC, 512, 16384, 1, 16384}, - {FRAME_WIDTH, DEC, HEIC, 512, 8192, 1, 8192}, {FRAME_HEIGHT, ENC, HEIC, 512, 16384, 1, 16384}, - {FRAME_HEIGHT, DEC, HEIC, 512, 8192, 1, 8192}, {MIN_BUFFERS_INPUT, ENC|DEC, HEIC, 0, 64, 1, 1, V4L2_CID_MIN_BUFFERS_FOR_OUTPUT}, - {MBPF, ENC, HEIC, 64, 262144, 262144}, /* ((8192x8192)/256) */ - {MBPF, DEC, HEIC, 36, 1048576, 1, 1048576}, /* ((16384x16384)/256) */ - {MBPS, ENC, HEIC, 64, 262144, 262144}, /* ((8192x8192)/256)@1fps */ - {MBPS, DEC, HEIC, 36, 1048576, 1, 1048576}, /* ((16384x16384)/256)@1fps */ + {MBPF, DEC, HEIC, 64, 262144, 1, 262144 }, /* ((8192x8192)/256) */ + {MBPF, ENC, HEIC, 36, 1048576, 1, 1048576}, /* ((16384x16384)/256) */ + {MBPS, DEC, HEIC, 64, 262144, 1, 262144 }, /* ((8192x8192)/256)@1fps */ + {MBPS, ENC, HEIC, 36, 1048576, 1, 1048576}, /* ((16384x16384)/256)@1fps */ {BITRATE_MODE, ENC, HEIC, V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, diff --git a/driver/vidc/inc/msm_vidc_power.h b/driver/vidc/inc/msm_vidc_power.h index 322936fa04..4bcabbec49 100644 --- a/driver/vidc/inc/msm_vidc_power.h +++ b/driver/vidc/inc/msm_vidc_power.h @@ -248,6 +248,7 @@ static inline int __bpp(enum msm_vidc_colorformat_type f) u64 msm_vidc_max_freq(struct msm_vidc_inst* inst); int msm_vidc_get_inst_load(struct msm_vidc_inst *inst); +int msm_vidc_get_mbps(struct msm_vidc_inst *inst); int msm_vidc_scale_power(struct msm_vidc_inst *inst, bool scale_buses); void msm_vidc_power_data_reset(struct msm_vidc_inst *inst); #endif diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 1ec521e917..88c7570c1b 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -1465,10 +1465,6 @@ int msm_vdec_streamon_input(struct msm_vidc_inst *inst) if (rc) goto error; - //msm_vidc_update_dcvs(inst); - //msm_vidc_update_batching(inst); - //msm_vidc_scale_power(inst); - rc = msm_vdec_create_input_internal_buffers(inst); if (rc) goto error; @@ -2094,12 +2090,6 @@ int msm_vdec_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) inst->crop.left = inst->crop.top = 0; inst->crop.width = f->fmt.pix_mp.width; inst->crop.height = f->fmt.pix_mp.height; - - //rc = msm_vidc_check_session_supported(inst); - if (rc) - goto err_invalid_fmt; - //update_log_ctxt(inst->sid, inst->session_type, - // mplane->pixelformat); i_vpr_h(inst, "%s: input: codec %#x width %d height %d size %d min_count %d extra_count %d\n", __func__, f->fmt.pix_mp.pixelformat, f->fmt.pix_mp.width, @@ -2107,10 +2097,6 @@ int msm_vdec_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) fmt->fmt.pix_mp.plane_fmt[0].sizeimage, inst->buffers.input.min_count, inst->buffers.input.extra_count); - - //msm_vidc_update_dcvs(inst); - //msm_vidc_update_batching(inst); - } else if (f->type == INPUT_META_PLANE) { fmt = &inst->fmts[INPUT_META_PORT]; fmt->type = INPUT_META_PLANE; @@ -2174,9 +2160,6 @@ int msm_vdec_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) fmt->fmt.pix_mp.plane_fmt[0].sizeimage; pix_fmt = v4l2_colorformat_to_driver(f->fmt.pix_mp.pixelformat, __func__); msm_vidc_update_cap_value(inst, PIX_FMTS, pix_fmt, __func__); - //rc = msm_vidc_check_session_supported(inst); - if (rc) - goto err_invalid_fmt; i_vpr_h(inst, "%s: output: format %#x width %d height %d size %d min_count %d extra_count %d\n", __func__, fmt->fmt.pix_mp.pixelformat, fmt->fmt.pix_mp.width, diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index 633ae356b6..a632c36714 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -1151,14 +1151,6 @@ int msm_venc_s_fmt_output(struct msm_vidc_inst *inst, struct v4l2_format *f) } inst->buffers.output.size = fmt->fmt.pix_mp.plane_fmt[0].sizeimage; - - //rc = msm_vidc_check_session_supported(inst); - if (rc) - return rc; - - //update_log_ctxt(inst->sid, inst->session_type, - // mplane->pixelformat); - memcpy(f, fmt, sizeof(struct v4l2_format)); return rc; @@ -1293,16 +1285,6 @@ static int msm_venc_s_fmt_input(struct msm_vidc_inst *inst, struct v4l2_format * output_fmt->fmt.pix_mp.height, output_fmt->fmt.pix_mp.plane_fmt[0].sizeimage); } - - //rc = msm_vidc_check_session_supported(inst); - if (rc) - return rc; - //update_log_ctxt(inst->sid, inst->session_type, - // mplane->pixelformat); - - //msm_vidc_update_dcvs(inst); - //msm_vidc_update_batching(inst); - memcpy(f, fmt, sizeof(struct v4l2_format)); return rc; diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index d5d7d08fd1..e58e9be471 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -13,6 +13,7 @@ #include "msm_vidc_internal.h" #include "msm_vidc_control.h" #include "msm_vidc_memory.h" +#include "msm_vidc_power.h" #include "msm_vidc_debug.h" #include "msm_vidc_power.h" #include "msm_vidc.h" @@ -23,6 +24,8 @@ #include "hfi_packet.h" extern struct msm_vidc_core *g_core; +#define is_odd(val) ((val) % 2 == 1) +#define in_range(val, min, max) (((min) <= (val)) && ((val) <= (max))) #define COUNT_BITS(a, out) { \ while ((a) >= 1) { \ (out) += (a) & (1); \ @@ -4665,12 +4668,119 @@ static int msm_vidc_check_mbpf_supported(struct msm_vidc_inst *inst) return 0; } +static bool msm_vidc_allow_image_encode_session(struct msm_vidc_inst *inst) +{ + struct msm_vidc_inst_capability *capability; + struct v4l2_format *fmt; + u32 min_width, min_height, max_width, max_height, pix_fmt, profile; + bool allow = false; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return false; + } + capability = inst->capabilities; + + if (!is_image_encode_session(inst)) { + i_vpr_e(inst, "%s: not an image encode session\n", __func__); + return false; + } + + pix_fmt = capability->cap[PIX_FMTS].value; + profile = capability->cap[PROFILE].value; + + /* is input with & height is in allowed range */ + min_width = capability->cap[FRAME_WIDTH].min; + max_width = capability->cap[FRAME_WIDTH].max; + min_height = capability->cap[FRAME_HEIGHT].min; + max_height = capability->cap[FRAME_HEIGHT].max; + fmt = &inst->fmts[INPUT_PORT]; + if (!in_range(fmt->fmt.pix_mp.width, min_width, max_width) || + !in_range(fmt->fmt.pix_mp.height, min_height, max_height)) { + i_vpr_e(inst, "unsupported wxh [%u x %u], allowed [%u x %u] to [%u x %u]\n", + fmt->fmt.pix_mp.width, fmt->fmt.pix_mp.height, + min_width, min_height, max_width, max_height); + allow = false; + goto exit; + } + + /* is linear color fmt */ + allow = is_linear_colorformat(pix_fmt); + if (!allow) { + i_vpr_e(inst, "%s: compressed fmt: %#x\n", __func__, pix_fmt); + goto exit; + } + + /* is input grid aligned */ + fmt = &inst->fmts[INPUT_PORT]; + allow = IS_ALIGNED(fmt->fmt.pix_mp.width, HEIC_GRID_DIMENSION); + allow &= IS_ALIGNED(fmt->fmt.pix_mp.height, HEIC_GRID_DIMENSION); + if (!allow) { + i_vpr_e(inst, "%s: input is not grid aligned: %u x %u\n", __func__, + fmt->fmt.pix_mp.width, fmt->fmt.pix_mp.height); + goto exit; + } + + /* is output grid dimension */ + fmt = &inst->fmts[OUTPUT_PORT]; + allow = fmt->fmt.pix_mp.width == HEIC_GRID_DIMENSION; + allow &= fmt->fmt.pix_mp.height == HEIC_GRID_DIMENSION; + if (!allow) { + i_vpr_e(inst, "%s: output is not a grid dimension: %u x %u\n", __func__, + fmt->fmt.pix_mp.width, fmt->fmt.pix_mp.height); + goto exit; + } + + /* is bitrate mode CQ */ + allow = capability->cap[BITRATE_MODE].value == HFI_RC_CQ; + if (!allow) { + i_vpr_e(inst, "%s: bitrate mode is not CQ: %#x\n", __func__, + capability->cap[BITRATE_MODE].value); + goto exit; + } + + /* is all intra */ + allow = !capability->cap[GOP_SIZE].value; + allow &= !capability->cap[B_FRAME].value; + if (!allow) { + i_vpr_e(inst, "%s: not all intra: gop: %u, bframe: %u\n", __func__, + capability->cap[GOP_SIZE].value, capability->cap[B_FRAME].value); + goto exit; + } + + /* is time delta based rc disabled */ + allow = !capability->cap[TIME_DELTA_BASED_RC].value; + if (!allow) { + i_vpr_e(inst, "%s: time delta based rc not disabled: %#x\n", __func__, + capability->cap[TIME_DELTA_BASED_RC].value); + goto exit; + } + + /* is profile type Still Pic */ + if (is_10bit_colorformat(pix_fmt)) + allow = profile == V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10; + else + allow = profile == V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE; + if (!allow) { + i_vpr_e(inst, "%s: profile not valid: %#x\n", __func__, + capability->cap[PROFILE].value); + goto exit; + } + + return true; + +exit: + i_vpr_e(inst, "%s: current session not allowed\n", __func__); + return allow; +} + int msm_vidc_check_session_supported(struct msm_vidc_inst *inst) { struct msm_vidc_inst_capability *capability; struct v4l2_format *fmt; - u32 pix_fmt, profile; - bool allow = false; + u32 iwidth, owidth, iheight, oheight, min_width, min_height, + max_width, max_height, mbpf, max_mbpf; + bool allow = false, is_interlaced = false; int rc = 0; if (!inst || !inst->capabilities) { @@ -4679,78 +4789,6 @@ int msm_vidc_check_session_supported(struct msm_vidc_inst *inst) } capability = inst->capabilities; - /* todo: enable checks for all session type */ - if (!is_image_session(inst)) - return 0; - - pix_fmt = capability->cap[PIX_FMTS].value; - profile = capability->cap[PROFILE].value; - - if (is_image_encode_session(inst)) { - /* is linear color fmt */ - allow = is_linear_colorformat(pix_fmt); - if (!allow) { - i_vpr_e(inst, "%s: compressed fmt: %#x\n", __func__, pix_fmt); - goto exit; - } - - /* is input grid aligned */ - fmt = &inst->fmts[INPUT_PORT]; - allow = IS_ALIGNED(fmt->fmt.pix_mp.width, HEIC_GRID_DIMENSION); - allow &= IS_ALIGNED(fmt->fmt.pix_mp.height, HEIC_GRID_DIMENSION); - if (!allow) { - i_vpr_e(inst, "%s: input is not grid aligned: %u x %u\n", __func__, - fmt->fmt.pix_mp.width, fmt->fmt.pix_mp.height); - goto exit; - } - - /* is output grid dimension */ - fmt = &inst->fmts[OUTPUT_PORT]; - allow = fmt->fmt.pix_mp.width == HEIC_GRID_DIMENSION; - allow &= fmt->fmt.pix_mp.height == HEIC_GRID_DIMENSION; - if (!allow) { - i_vpr_e(inst, "%s: output is not a grid dimension: %u x %u\n", __func__, - fmt->fmt.pix_mp.width, fmt->fmt.pix_mp.height); - goto exit; - } - - /* is bitrate mode CQ */ - allow = capability->cap[BITRATE_MODE].value == HFI_RC_CQ; - if (!allow) { - i_vpr_e(inst, "%s: bitrate mode is not CQ: %#x\n", __func__, - capability->cap[BITRATE_MODE].value); - goto exit; - } - - /* is all intra */ - allow = !capability->cap[GOP_SIZE].value; - allow &= !capability->cap[B_FRAME].value; - if (!allow) { - i_vpr_e(inst, "%s: not all intra: gop: %u, bframe: %u\n", __func__, - capability->cap[GOP_SIZE].value, capability->cap[B_FRAME].value); - goto exit; - } - - /* is time delta based rc disabled */ - allow = !capability->cap[TIME_DELTA_BASED_RC].value; - if (!allow) { - i_vpr_e(inst, "%s: time delta based rc not disabled: %#x\n", __func__, - capability->cap[TIME_DELTA_BASED_RC].value); - goto exit; - } - - /* is profile type Still Pic */ - if (is_10bit_colorformat(pix_fmt)) - allow = profile == V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10; - else - allow = profile == V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE; - if (!allow) { - i_vpr_e(inst, "%s: profile not valid: %#x\n", __func__, - capability->cap[PROFILE].value); - goto exit; - } - } - rc = msm_vidc_check_mbps_supported(inst); if (rc) goto exit; @@ -4759,7 +4797,76 @@ int msm_vidc_check_session_supported(struct msm_vidc_inst *inst) if (rc) goto exit; - /* todo: add additional checks related to capabilities */ + if (is_image_session(inst) && is_secure_session(inst)) { + i_vpr_e(inst, "%s: secure image session not supported\n", __func__); + goto exit; + } + + /* check image capabilities */ + if (is_image_encode_session(inst)) { + allow = msm_vidc_allow_image_encode_session(inst); + if (!allow) + goto exit; + return 0; + } + + fmt = &inst->fmts[INPUT_PORT]; + iwidth = fmt->fmt.pix_mp.width; + iheight = fmt->fmt.pix_mp.height; + + fmt = &inst->fmts[OUTPUT_PORT]; + owidth = fmt->fmt.pix_mp.width; + oheight = fmt->fmt.pix_mp.height; + + if (is_secure_session(inst)) { + min_width = capability->cap[SECURE_FRAME_WIDTH].min; + max_width = capability->cap[SECURE_FRAME_WIDTH].max; + min_height = capability->cap[SECURE_FRAME_HEIGHT].min; + max_height = capability->cap[SECURE_FRAME_HEIGHT].max; + max_mbpf = capability->cap[SECURE_MBPF].max; + } else if (is_encode_session(inst) && capability->cap[LOSSLESS].value) { + min_width = capability->cap[LOSSLESS_FRAME_WIDTH].min; + max_width = capability->cap[LOSSLESS_FRAME_WIDTH].max; + min_height = capability->cap[LOSSLESS_FRAME_HEIGHT].min; + max_height = capability->cap[LOSSLESS_FRAME_HEIGHT].max; + max_mbpf = capability->cap[LOSSLESS_MBPF].max; + } else { + min_width = capability->cap[FRAME_WIDTH].min; + max_width = capability->cap[FRAME_WIDTH].max; + min_height = capability->cap[FRAME_HEIGHT].min; + max_height = capability->cap[FRAME_HEIGHT].max; + max_mbpf = capability->cap[MBPF].max; + } + + /* check interlace supported resolution */ + is_interlaced = capability->cap[CODED_FRAMES].value == CODED_FRAMES_INTERLACE; + if (is_interlaced && (owidth > INTERLACE_WIDTH_MAX || oheight > INTERLACE_HEIGHT_MAX || + NUM_MBS_PER_FRAME(owidth, oheight) > INTERLACE_MB_PER_FRAME_MAX)) { + i_vpr_e(inst, "unsupported interlace wxh [%u x %u], max [%u x %u]\n", + owidth, oheight, INTERLACE_WIDTH_MAX, INTERLACE_HEIGHT_MAX); + goto exit; + } + + /* reject odd resolution session */ + if (is_odd(iwidth) || is_odd(iheight) || is_odd(owidth) || is_odd(oheight)) { + i_vpr_e(inst, "resolution is not even. input [%u x %u], output [%u x %u]\n", + iwidth, iheight, owidth, oheight); + goto exit; + } + + /* check width and height is in supported range */ + if (!in_range(owidth, min_width, max_width) || !in_range(oheight, min_height, max_height)) { + i_vpr_e(inst, "unsupported wxh [%u x %u], allowed range: [%u x %u] to [%u x %u]\n", + owidth, oheight, min_width, min_height, max_width, max_height); + goto exit; + } + + /* check current session mbpf */ + mbpf = msm_vidc_get_mbs_per_frame(inst); + if (mbpf > max_mbpf) { + i_vpr_e(inst, "unsupported mbpf %u, max %u\n", mbpf, max_mbpf); + goto exit; + } return 0; diff --git a/driver/vidc/src/msm_vidc_power.c b/driver/vidc/src/msm_vidc_power.c index eb2160601d..879115566f 100644 --- a/driver/vidc/src/msm_vidc_power.c +++ b/driver/vidc/src/msm_vidc_power.c @@ -45,7 +45,7 @@ u64 msm_vidc_max_freq(struct msm_vidc_inst *inst) return freq; } -static int msm_vidc_get_mbps(struct msm_vidc_inst *inst) +int msm_vidc_get_mbps(struct msm_vidc_inst *inst) { int input_port_mbs, output_port_mbs; int fps, operating_rate, frame_rate; From f05007686da7ba411ddcfa4cb2c8e4c3323f7f95 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Tue, 4 May 2021 15:06:01 +0530 Subject: [PATCH 0276/1061] video: driver: add support for main10StillPic profile Added support for V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE. It willbe used in 10bit image encoding usecases. Change-Id: I14877547f1f4792eefb0ea6bcecf2643627c125a Signed-off-by: Govindaraj Rajagopal --- driver/platform/waipio/src/msm_vidc_waipio.c | 11 +++++---- driver/vidc/inc/hfi_property.h | 7 +++--- driver/vidc/src/msm_vidc_control.c | 24 ++++++++++++++++--- driver/vidc/src/msm_vidc_driver.c | 2 +- .../uapi/vidc/media/v4l2_vidc_extensions.h | 3 +++ 5 files changed, 35 insertions(+), 12 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index b1ea1b24a0..0b85042450 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -920,12 +920,13 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {ENTROPY_MODE}, NULL, msm_vidc_set_u32_enum}, - {PROFILE, ENC|DEC, HEVC|HEIC, + {PROFILE, ENC|DEC, HEVC, V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN, - V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10, + V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE, BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN) | BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE) | - BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10), + BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10) | + BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE), V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN, V4L2_CID_MPEG_VIDEO_HEVC_PROFILE, HFI_PROP_PROFILE, @@ -1400,9 +1401,9 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {PROFILE}}, {PROFILE, ENC|DEC, HEIC, V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE, - V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10, + V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE, BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE) | - BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10), + BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE), V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE, V4L2_CID_MPEG_VIDEO_HEVC_PROFILE, HFI_PROP_PROFILE, diff --git a/driver/vidc/inc/hfi_property.h b/driver/vidc/inc/hfi_property.h index a6cb9ad6cf..5c4b0df988 100644 --- a/driver/vidc/inc/hfi_property.h +++ b/driver/vidc/inc/hfi_property.h @@ -94,9 +94,10 @@ enum hfi_avc_profile_type { }; enum hfi_hevc_profile_type { - HFI_H265_PROFILE_MAIN = 0, - HFI_H265_PROFILE_MAIN_STILL_PICTURE = 1, - HFI_H265_PROFILE_MAIN_10 = 2, + HFI_H265_PROFILE_MAIN = 0, + HFI_H265_PROFILE_MAIN_STILL_PICTURE = 1, + HFI_H265_PROFILE_MAIN_10 = 2, + HFI_H265_PROFILE_MAIN_10_STILL_PICTURE = 3, }; enum hfi_vp9_profile_type { diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 33935209c9..ee834726db 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -29,6 +29,12 @@ static bool is_priv_ctrl(u32 id) * we have added custom values to the controls */ switch (id) { + /* + * TODO: V4L2_CID_MPEG_VIDEO_HEVC_PROFILE is std ctrl. But + * V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE support is not + * available yet. Hence, make this as private ctrl for time being + */ + case V4L2_CID_MPEG_VIDEO_HEVC_PROFILE: /* * TODO: V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_TYPE is * std ctrl. But needs some fixes in v4l2-ctrls.c. Hence, @@ -108,6 +114,14 @@ static const char *const mpeg_video_avc_coding_layer[] = { NULL, }; +static const char *const mpeg_video_hevc_profile[] = { + "Main", + "Main Still Picture", + "Main 10", + "Main 10 Still Picture", + NULL, +}; + static const char *const roi_map_type[] = { "None", "2-bit", @@ -148,6 +162,8 @@ static const char * const * msm_vidc_get_qmenu_type( return mpeg_video_blur_types; case V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_TYPE: return mpeg_video_avc_coding_layer; + case V4L2_CID_MPEG_VIDEO_HEVC_PROFILE: + return mpeg_video_hevc_profile; default: i_vpr_e(inst, "%s: No available qmenu for ctrl %#x\n", __func__, control_id); @@ -872,9 +888,11 @@ int msm_vidc_adjust_profile(void *instance, struct v4l2_ctrl *ctrl) return -EINVAL; /* 10 bit profile for 10 bit color format */ - if (pix_fmt == MSM_VIDC_FMT_TP10C || - pix_fmt == MSM_VIDC_FMT_P010) { - adjusted_value = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10; + if (pix_fmt == MSM_VIDC_FMT_TP10C || pix_fmt == MSM_VIDC_FMT_P010) { + if (is_image_session(inst)) + adjusted_value = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE; + else + adjusted_value = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10; } else { /* 8 bit profile for 8 bit color format */ if (adjusted_value == V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10) { diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index e58e9be471..813577a598 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -4758,7 +4758,7 @@ static bool msm_vidc_allow_image_encode_session(struct msm_vidc_inst *inst) /* is profile type Still Pic */ if (is_10bit_colorformat(pix_fmt)) - allow = profile == V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10; + allow = profile == V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE; else allow = profile == V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE; if (!allow) { diff --git a/include/uapi/vidc/media/v4l2_vidc_extensions.h b/include/uapi/vidc/media/v4l2_vidc_extensions.h index 59e9708bb9..b2f825021e 100644 --- a/include/uapi/vidc/media/v4l2_vidc_extensions.h +++ b/include/uapi/vidc/media/v4l2_vidc_extensions.h @@ -46,6 +46,9 @@ #define V4L2_YCBCR_VIDC_FCC47_73_682 302 /* end of vidc specific colorspace definitions */ +#ifndef V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE +#define V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE (3) +#endif /* vendor controls start */ #define V4L2_CID_MPEG_VIDC_BASE (V4L2_CTRL_CLASS_MPEG | 0x2000) From 1739ce7b92c21f3e398a053b21b7c39dee47a35b Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Thu, 6 May 2021 13:44:10 -0700 Subject: [PATCH 0277/1061] video: driver: modify blur resolution setting and fix b_frames [1] External blur is disbled to firmware if either blur width or blur height exceeds driver crop width or crop height. Also, it is disabled when both blur width and blur height is equal to blur width and blur height. [2] fix b_frame adjustment calculation formula. Change-Id: I71458b72095542f12c31094f7b9fc3bd34a7c66b Signed-off-by: Akshata Sahukar --- driver/vidc/src/msm_vidc_control.c | 21 +++++++++++++++------ 1 file changed, 15 insertions(+), 6 deletions(-) diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 33935209c9..a34d890743 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -1406,7 +1406,7 @@ int msm_vidc_adjust_b_frame(void *instance, struct v4l2_ctrl *ctrl) goto exit; } - adjusted_value = (2 << enh_layer_count) - 1; + adjusted_value = (1 << enh_layer_count) - 1; /* Allowed Bframe values are 0, 1, 3, 7 */ if (adjusted_value > max_bframe_size) adjusted_value = max_bframe_size; @@ -2789,13 +2789,22 @@ int msm_vidc_set_blur_resolution(void *instance, blur_width = (hfi_value & 0xFFFF0000) >> 16; blur_height = hfi_value & 0xFFFF; - if (blur_width > inst->compose.width || - blur_height > inst->compose.height) { + if (blur_width > inst->crop.width || + blur_height > inst->crop.height) { i_vpr_e(inst, - "%s: blur wxh: %dx%d exceeds compose wxh: %dx%d\n", + "%s: blur wxh: %dx%d exceeds crop wxh: %dx%d\n", __func__, blur_width, blur_height, - inst->compose.width, inst->compose.height); - hfi_value = (inst->compose.width << 16) | inst->compose.height; + inst->crop.width, inst->crop.height); + hfi_value = 0; + } + + if (blur_width == inst->crop.width && + blur_height == inst->crop.height) { + i_vpr_e(inst, + "%s: blur wxh: %dx%d is equal to crop wxh: %dx%d\n", + __func__, blur_width, blur_height, + inst->crop.width, inst->crop.height); + hfi_value = 0; } rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_32_PACKED, From 0995dfc2151ce5defda51c659e9949d6dd459fb2 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Fri, 7 May 2021 14:19:45 +0530 Subject: [PATCH 0278/1061] video: driver: add frame_skip mode control setting for heic Added V4L2_CID_MPEG_VIDEO_FRAME_SKIP_MODE support for heic codec type. Change-Id: I4eaca697729c45ebf72067a9d34a7dc8d607f0fa Signed-off-by: Govindaraj Rajagopal --- driver/platform/waipio/src/msm_vidc_waipio.c | 2 +- driver/vidc/src/msm_vidc_driver.c | 8 ++++++++ 2 files changed, 9 insertions(+), 1 deletion(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 0b85042450..1498a4d035 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -377,7 +377,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU}, - {FRAME_SKIP_MODE, ENC, H264|HEVC, + {FRAME_SKIP_MODE, ENC, H264|HEVC|HEIC, V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED, V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT, BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED) | diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 813577a598..b7745fd8f1 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -4756,6 +4756,14 @@ static bool msm_vidc_allow_image_encode_session(struct msm_vidc_inst *inst) goto exit; } + /* is frame skip mode disabled */ + allow = !capability->cap[FRAME_SKIP_MODE].value; + if (!allow) { + i_vpr_e(inst, "%s: frame skip mode not disabled: %#x\n", __func__, + capability->cap[FRAME_SKIP_MODE].value); + goto exit; + } + /* is profile type Still Pic */ if (is_10bit_colorformat(pix_fmt)) allow = profile == V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE; From 2e2fbdb7e59431c0080686968662f4e4fef30069 Mon Sep 17 00:00:00 2001 From: Qiwei Liu Date: Tue, 27 Apr 2021 20:38:13 +0800 Subject: [PATCH 0279/1061] video: driver: support non-zero data_offset In V4L2 definition, bytesused contains both data_offset and actual payload size, whereas in HFI definition, data_size only contain actual payload size after data_offset. Add conversions to correctly support non-zero data_offset. Change-Id: Ib581e942e39e0adbb673c53d1b31e669bdb2b998 Signed-off-by: Qiwei Liu --- driver/vidc/src/msm_vidc_driver.c | 4 ++-- driver/vidc/src/venus_hfi_response.c | 1 - 2 files changed, 2 insertions(+), 3 deletions(-) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 813577a598..0f020209a3 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -1843,7 +1843,7 @@ static int vb2_buffer_to_driver(struct vb2_buffer *vb2, buf->index = vb2->index; buf->fd = vb2->planes[0].m.fd; buf->data_offset = vb2->planes[0].data_offset; - buf->data_size = vb2->planes[0].bytesused; + buf->data_size = vb2->planes[0].bytesused - vb2->planes[0].data_offset; buf->buffer_size = vb2->planes[0].length; buf->timestamp = vb2->timestamp; @@ -3098,7 +3098,7 @@ int msm_vidc_vb2_buffer_done(struct msm_vidc_inst *inst, vbuf = to_vb2_v4l2_buffer(vb2); vbuf->flags = buf->flags; vb2->timestamp = buf->timestamp; - vb2->planes[0].bytesused = buf->data_size; + vb2->planes[0].bytesused = buf->data_size + vb2->planes[0].data_offset; vb2_buffer_done(vb2, VB2_BUF_STATE_DONE); return 0; diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index ec93e7c0c9..64357ee126 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -649,7 +649,6 @@ static int handle_input_buffer(struct msm_vidc_inst *inst, } } - buf->data_offset = buffer->data_offset; buf->data_size = buffer->data_size; buf->attr &= ~MSM_VIDC_ATTR_QUEUED; buf->attr |= MSM_VIDC_ATTR_DEQUEUED; From 57180ce6f2ad4a4f9838870c33252f4d0b170b78 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Fri, 7 May 2021 21:34:42 +0530 Subject: [PATCH 0280/1061] video: driver: update proper state in vb2_buffer_done V4l2 clears buffer state related flags. So for driver errors send state as error to avoid skipping V4L2_BUF_FLAG_ERROR flag at v4l2 side. Change-Id: Ifcb96d390746a71e8dbcf261f718439ef9ecfc91 Signed-off-by: Govindaraj Rajagopal --- driver/vidc/src/msm_vidc_driver.c | 14 ++++++++++++-- 1 file changed, 12 insertions(+), 2 deletions(-) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 0f020209a3..eac402e375 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -3058,7 +3058,7 @@ int msm_vidc_release_internal_buffers(struct msm_vidc_inst *inst, int msm_vidc_vb2_buffer_done(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buf) { - int type, port; + int type, port, state; struct vb2_queue *q; struct vb2_buffer *vb2; struct vb2_v4l2_buffer *vbuf; @@ -3095,11 +3095,21 @@ int msm_vidc_vb2_buffer_done(struct msm_vidc_inst *inst, print_vidc_buffer(VIDC_ERR, "err ", "vb2 not found for", inst, buf); return -EINVAL; } + /** + * v4l2 clears buffer state related flags. For driver errors + * send state as error to avoid skipping V4L2_BUF_FLAG_ERROR + * flag at v4l2 side. + */ + if (buf->flags & MSM_VIDC_BUF_FLAG_ERROR) + state = VB2_BUF_STATE_ERROR; + else + state = VB2_BUF_STATE_DONE; + vbuf = to_vb2_v4l2_buffer(vb2); vbuf->flags = buf->flags; vb2->timestamp = buf->timestamp; vb2->planes[0].bytesused = buf->data_size + vb2->planes[0].data_offset; - vb2_buffer_done(vb2, VB2_BUF_STATE_DONE); + vb2_buffer_done(vb2, state); return 0; } From 9a7e929dfee38ba9504f08abe5e634189e714203 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Mon, 10 May 2021 14:19:37 +0530 Subject: [PATCH 0281/1061] video: driver: handle race condition in msm_vidc_core_init Core is moved to init state before completing full init sequence. So subsequent new open request assumes core is already inited and attempts to initiate a hfi_session with firmware, which is not correct and core_init is a sync cmd, so core->lock() is released, so that reverse thread can issue sys_init_done. But new session is acquiring core->lock() and corroupting core->init_done.task_list completion structure variable i.e leading to list_corruption issues. So added change to address these issues. Change-Id: I0b983a06b8ea58134ea93831246309c9ccbdf0d1 Signed-off-by: Govindaraj Rajagopal --- driver/vidc/inc/msm_vidc_core.h | 3 +- driver/vidc/src/msm_vidc_driver.c | 69 ++++++++++++++++++++++++++++--- driver/vidc/src/venus_hfi.c | 2 +- 3 files changed, 67 insertions(+), 7 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_core.h b/driver/vidc/inc/msm_vidc_core.h index 5b4f0bae36..55adc570d5 100644 --- a/driver/vidc/inc/msm_vidc_core.h +++ b/driver/vidc/inc/msm_vidc_core.h @@ -56,7 +56,8 @@ struct msm_vidc_core_power { enum msm_vidc_core_state { MSM_VIDC_CORE_DEINIT = 0, - MSM_VIDC_CORE_INIT = 1, + MSM_VIDC_CORE_INIT_WAIT = 1, + MSM_VIDC_CORE_INIT = 2, }; struct msm_vidc_core { diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 0f020209a3..2e31a72025 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -280,6 +280,7 @@ struct msm_vidc_core_state_name { static const struct msm_vidc_core_state_name core_state_name_arr[] = { {MSM_VIDC_CORE_DEINIT, "CORE_DEINIT" }, + {MSM_VIDC_CORE_INIT_WAIT, "CORE_INIT_WAIT" }, {MSM_VIDC_CORE_INIT, "CORE_INIT" }, }; @@ -3776,6 +3777,61 @@ unlock: return rc; } +static void __fatal_error(struct msm_vidc_core *core, bool fatal) +{ + return; + fatal &= core->capabilities[HW_RESPONSE_TIMEOUT].value; + MSM_VIDC_ERROR(fatal); +} + +static void __strict_check(struct msm_vidc_core *core) +{ + __fatal_error(core, !mutex_is_locked(&core->lock)); +} + +static int msm_vidc_core_init_wait(struct msm_vidc_core *core) +{ + static const int interval = 40; + int max_tries, count = 0, rc = 0; + + if (!core || !core->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + __strict_check(core); + + if (core->state != MSM_VIDC_CORE_INIT_WAIT) + return 0; + + d_vpr_h("%s(): waiting for state change\n", __func__); + max_tries = core->capabilities[HW_RESPONSE_TIMEOUT].value / interval; + /** + * attempt one more time to ensure triggering init_done + * timeout sequence for 1st session, incase response not + * received in reverse thread. + */ + while (count < max_tries + 1) { + if (core->state != MSM_VIDC_CORE_INIT_WAIT) + break; + + core_unlock(core, __func__); + msleep_interruptible(interval); + core_lock(core, __func__); + count++; + } + d_vpr_h("%s: state %s, interval %u, count %u, max_tries %u\n", __func__, + core_state_name(core->state), interval, count, max_tries); + + /* treat as fatal and fail session_open */ + if (core->state == MSM_VIDC_CORE_INIT_WAIT) { + d_vpr_e("%s: state change failed\n", __func__); + rc = -EINVAL; + } + + return rc; +} + int msm_vidc_core_init(struct msm_vidc_core *core) { int rc = 0; @@ -3786,12 +3842,14 @@ int msm_vidc_core_init(struct msm_vidc_core *core) } core_lock(core, __func__); - if (core->state == MSM_VIDC_CORE_INIT) { - rc = 0; + rc = msm_vidc_core_init_wait(core); + if (rc) goto unlock; - } - msm_vidc_change_core_state(core, MSM_VIDC_CORE_INIT, __func__); + if (core->state == MSM_VIDC_CORE_INIT) + goto unlock; + + msm_vidc_change_core_state(core, MSM_VIDC_CORE_INIT_WAIT, __func__); init_completion(&core->init_done); core->smmu_fault_handled = false; core->ssr.trigger = false; @@ -3812,6 +3870,7 @@ int msm_vidc_core_init(struct msm_vidc_core *core) d_vpr_e("%s: core init timed out\n", __func__); rc = -ETIMEDOUT; } else { + msm_vidc_change_core_state(core, MSM_VIDC_CORE_INIT, __func__); d_vpr_h("%s: system init wait completed\n", __func__); rc = 0; } @@ -4015,7 +4074,7 @@ void msm_vidc_ssr_handler(struct work_struct *work) ssr = &core->ssr; core_lock(core, __func__); - if (core->state == MSM_VIDC_CORE_INIT) { + if (core->state != MSM_VIDC_CORE_DEINIT) { /* * In current implementation, user-initiated SSR triggers * a fatal error from hardware. However, there is no way diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index 2b52fb3f39..6958d42cd1 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -189,7 +189,7 @@ static void __strict_check(struct msm_vidc_core *core) bool __core_in_valid_state(struct msm_vidc_core *core) { - return core->state == MSM_VIDC_CORE_INIT; + return core->state != MSM_VIDC_CORE_DEINIT; } bool is_sys_cache_present(struct msm_vidc_core *core) From 4a81629d7cbd4c283937468f4d54811bbba4a16e Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Mon, 10 May 2021 15:18:27 -0700 Subject: [PATCH 0282/1061] video: driver: report system error when packet validation fails Report system error when packet validation fails to avoid unpredictable failures. Change-Id: I196c21aba1d19846fe766585e4955b3aca3fd59e Signed-off-by: Akshata Sahukar --- driver/vidc/src/venus_hfi_response.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index 64357ee126..ae495b52e2 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -1655,7 +1655,7 @@ int handle_response(struct msm_vidc_core *core, void *response) rc = validate_hdr_packet(core, hdr, __func__); if (rc) { d_vpr_e("%s: hdr pkt validation failed\n", __func__); - return -EINVAL; + return handle_system_error(core, NULL); } if (!hdr->session_id) From 967d049715d641e2f632c2089920d9eb86015466 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Tue, 11 May 2021 12:55:45 -0700 Subject: [PATCH 0283/1061] video: driver: Support max 1 enh HB layer when cvp is disabled Allow max 1 enh layers when cvp metadata is disabled for HB layer type. Change-Id: If6e33462e8be36a4ca1fb1f253875678b697c05a Signed-off-by: Akshata Sahukar --- driver/platform/waipio/src/msm_vidc_waipio.c | 9 ++++-- driver/vidc/src/msm_vidc_control.c | 29 +++++++++++++------- 2 files changed, 25 insertions(+), 13 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 1498a4d035..75eaa68bf6 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -727,7 +727,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { HFI_PROP_LAYER_COUNT, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, - {BITRATE_MODE}, + {BITRATE_MODE, META_EVA_STATS}, {GOP_SIZE, B_FRAME, BIT_RATE}, msm_vidc_adjust_layer_count, msm_vidc_set_layer_count_and_type}, @@ -737,7 +737,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { HFI_PROP_LAYER_COUNT, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, - {BITRATE_MODE}, + {BITRATE_MODE, META_EVA_STATS}, {GOP_SIZE, B_FRAME, BIT_RATE}, msm_vidc_adjust_layer_count, msm_vidc_set_layer_count_and_type}, @@ -1288,7 +1288,10 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_EVA_STATS, - HFI_PROP_EVA_STAT_INFO}, + HFI_PROP_EVA_STAT_INFO, + CAP_FLAG_ROOT, + {0}, + {ENH_LAYER_COUNT}}, {META_BUF_TAG, DEC | ENC, CODECS_ALL, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 92b552fb74..f4e9f55710 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -268,7 +268,7 @@ static int msm_vidc_add_children(struct msm_vidc_inst *inst, } static bool is_parent_available(struct msm_vidc_inst* inst, - u32 cap, u32 check_parent) + u32 cap, u32 check_parent, const char* func) { int i = 0; u32 cap_parent; @@ -281,6 +281,10 @@ static bool is_parent_available(struct msm_vidc_inst* inst, } i++; } + + i_vpr_e(inst, + "%s: missing parent %s for %s\n", + func, cap_name(check_parent), cap_name(cap)); return false; } @@ -308,7 +312,7 @@ static int msm_vidc_get_parent_value(struct msm_vidc_inst* inst, { int rc = 0; - if (is_parent_available(inst, cap, parent)) { + if (is_parent_available(inst, cap, parent, __func__)) { switch (parent) { case BITRATE_MODE: *value = inst->hfi_rc_type; @@ -321,9 +325,6 @@ static int msm_vidc_get_parent_value(struct msm_vidc_inst* inst, break; } } else { - i_vpr_e(inst, - "%s: missing parent %d for cap[%d] %s, fix database\n", - func, parent, cap, cap_name(cap)); rc = -EINVAL; } @@ -1037,7 +1038,7 @@ int msm_vidc_adjust_ir_random(void *instance, struct v4l2_ctrl *ctrl) * BITRATE_MODE dependency is NOT common across all chipsets. * Hence, do not return error if not specified as one of the parent. */ - if (is_parent_available(inst, IR_RANDOM, BITRATE_MODE) && + if (is_parent_available(inst, IR_RANDOM, BITRATE_MODE, __func__) && inst->hfi_rc_type != HFI_RC_CBR_CFR && inst->hfi_rc_type != HFI_RC_CBR_VFR) adjusted_value = 0; @@ -1265,6 +1266,14 @@ static int msm_vidc_adjust_static_layer_count_and_type(struct msm_vidc_inst *ins goto exit; } + if (!inst->capabilities->cap[META_EVA_STATS].value && + hb_requested && (layer_count > 1)) { + layer_count = 1; + i_vpr_h(inst, + "%s: cvp disable supports only one enh layer HB\n", + __func__); + } + /* decide hfi layer type */ if (hb_requested) { inst->hfi_layer_type = HFI_HIER_B; @@ -1316,11 +1325,11 @@ int msm_vidc_adjust_layer_count(void *instance, struct v4l2_ctrl *ctrl) client_layer_count = ctrl ? ctrl->val : capability->cap[ENH_LAYER_COUNT].value; - if (!is_parent_available(inst, ENH_LAYER_COUNT, BITRATE_MODE)) { - i_vpr_e(inst, "%s: missing parent %d in database", - __func__, BITRATE_MODE); + if (!is_parent_available(inst, ENH_LAYER_COUNT, + BITRATE_MODE, __func__) || + !is_parent_available(inst, ENH_LAYER_COUNT, + META_EVA_STATS, __func__)) return -EINVAL; - } if (!inst->vb2q[OUTPUT_PORT].streaming) { rc = msm_vidc_adjust_static_layer_count_and_type(inst, From 003d8a79faa0c3bf09e274ebedcf828c8ca3a06d Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Fri, 23 Apr 2021 15:46:13 +0530 Subject: [PATCH 0284/1061] msm: vidc: Add support of timestamps based frame rate Add timestamp based frame rate detection. Change-Id: Id0c522e01769ea6cf214c7b84c11faae6049e2ef Signed-off-by: Vikash Garodia Signed-off-by: Govindaraj Rajagopal --- .../variant/iris2/src/msm_vidc_power_iris2.c | 5 + driver/vidc/inc/msm_vidc_driver.h | 6 + driver/vidc/inc/msm_vidc_inst.h | 2 + driver/vidc/inc/msm_vidc_internal.h | 23 +- driver/vidc/src/msm_vdec.c | 8 + driver/vidc/src/msm_venc.c | 2 + driver/vidc/src/msm_vidc.c | 4 + driver/vidc/src/msm_vidc_driver.c | 218 +++++++++++++++++- driver/vidc/src/venus_hfi.c | 4 + driver/vidc/src/venus_hfi_response.c | 4 + 10 files changed, 266 insertions(+), 10 deletions(-) diff --git a/driver/variant/iris2/src/msm_vidc_power_iris2.c b/driver/variant/iris2/src/msm_vidc_power_iris2.c index 4b7a67172a..a5ed1a088a 100644 --- a/driver/variant/iris2/src/msm_vidc_power_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_power_iris2.c @@ -23,6 +23,7 @@ u64 msm_vidc_calc_freq_iris2(struct msm_vidc_inst *inst, u32 data_size) u32 base_cycles = 0; u32 fps; u32 prio_val; + u32 ts_fps; if (!inst || !inst->core || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); @@ -47,6 +48,10 @@ u64 msm_vidc_calc_freq_iris2(struct msm_vidc_inst *inst, u32 data_size) mbs_per_second = msm_vidc_get_inst_load(inst); fps = msm_vidc_get_fps(inst); + ts_fps = msm_vidc_calc_framerate(inst); + if (ts_fps > fps) + i_vpr_l(inst, "%s: ts_rate %d set rate %d\n", __func__, ts_fps, fps); + /* * Calculate vpp, vsp, fw cycles separately for encoder and decoder. * Even though, most part is common now, in future it may change diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 5c044c0b18..c7ad93d483 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -266,12 +266,15 @@ int msm_vidc_vb2_buffer_done(struct msm_vidc_inst *inst, struct msm_vidc_buffer *msm_vidc_get_vidc_buffer(struct msm_vidc_inst *inst); struct msm_vidc_alloc *msm_vidc_get_alloc_buffer(struct msm_vidc_inst *inst); struct msm_vidc_map *msm_vidc_get_map_buffer(struct msm_vidc_inst *inst); +struct msm_vidc_timestamp *msm_vidc_get_ts(struct msm_vidc_inst *inst); int msm_vidc_put_vidc_buffer(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buf); int msm_vidc_put_alloc_buffer(struct msm_vidc_inst *inst, struct msm_vidc_alloc *alloc); int msm_vidc_put_map_buffer(struct msm_vidc_inst *inst, struct msm_vidc_map *map); +int msm_vidc_put_ts(struct msm_vidc_inst *inst, struct msm_vidc_timestamp *ts); int msm_vidc_destroy_vidc_buffer(struct msm_vidc_inst *inst); int msm_vidc_destroy_alloc_buffer(struct msm_vidc_inst *inst); int msm_vidc_destroy_map_buffer(struct msm_vidc_inst *inst); +int msm_vidc_destroy_ts(struct msm_vidc_inst *inst); int msm_vidc_remove_session(struct msm_vidc_inst *inst); int msm_vidc_add_session(struct msm_vidc_inst *inst); int msm_vidc_session_open(struct msm_vidc_inst *inst); @@ -386,6 +389,9 @@ bool msm_vidc_allow_decode_batch(struct msm_vidc_inst *inst); int msm_vidc_check_session_supported(struct msm_vidc_inst *inst); int msm_vidc_check_mbps_supported(struct msm_vidc_inst *inst); int msm_vidc_check_scaling_supported(struct msm_vidc_inst *inst); +int msm_vidc_update_timestamp(struct msm_vidc_inst *inst, u64 timestamp); +int msm_vidc_calc_framerate(struct msm_vidc_inst *inst); +int msm_vidc_flush_ts(struct msm_vidc_inst *inst); const char *buf_name(enum msm_vidc_buffer_type type); void msm_vidc_free_capabililty_list(struct msm_vidc_inst *inst, enum msm_vidc_ctrl_list_type list_type); diff --git a/driver/vidc/inc/msm_vidc_inst.h b/driver/vidc/inc/msm_vidc_inst.h index 9304c61d44..36d7096e0f 100644 --- a/driver/vidc/inc/msm_vidc_inst.h +++ b/driver/vidc/inc/msm_vidc_inst.h @@ -31,6 +31,7 @@ struct msm_vidc_pool_info { struct msm_vidc_pool allocations; struct msm_vidc_pool mappings; struct msm_vidc_pool buffers; + struct msm_vidc_pool timestamps; }; struct msm_vidc_allocations_info { @@ -122,6 +123,7 @@ struct msm_vidc_inst { struct msm_vidc_buffers_info buffers; struct msm_vidc_mappings_info mappings; struct msm_vidc_allocations_info allocations; + struct msm_vidc_timestamps timestamps; bool subscribed_input_psc; bool subscribed_output_psc; bool subscribed_input_prop; diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 337895df30..57d972ddc5 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -662,13 +662,6 @@ struct msm_vidc_input_cr_data { u32 input_cr; }; -struct msm_vidc_timestamps { - struct list_head list; - u64 timestamp_us; - u32 framerate; - bool is_valid; -}; - struct msm_vidc_session_idle { bool idle; u64 last_activity_time_ns; @@ -821,6 +814,22 @@ struct msm_vidc_buffers { bool reuse; }; +struct msm_vidc_sort { + struct list_head list; + u64 val; +}; + +struct msm_vidc_timestamp { + struct msm_vidc_sort sort; + u64 rank; +}; + +struct msm_vidc_timestamps { + struct list_head list; + u32 count; + u32 rank; +}; + struct msm_vidc_pool { struct list_head list; u32 count; diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 88c7570c1b..f5a7f9dadd 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -1422,6 +1422,8 @@ int msm_vdec_streamoff_input(struct msm_vidc_inst *inst) if (rc) return rc; + msm_vidc_flush_ts(inst); + return 0; } @@ -1493,6 +1495,10 @@ int msm_vdec_streamon_input(struct msm_vidc_inst *inst) if (rc) goto error; + rc = msm_vidc_flush_ts(inst); + if (rc) + goto error; + return 0; error: @@ -1983,6 +1989,7 @@ int msm_vdec_process_cmd(struct msm_vidc_inst *inst, u32 cmd) } if (cmd == V4L2_DEC_CMD_STOP) { + i_vpr_h(inst, "received cmd: drain\n"); allow = msm_vidc_allow_stop(inst); if (allow == MSM_VIDC_DISALLOW) return -EBUSY; @@ -2002,6 +2009,7 @@ int msm_vdec_process_cmd(struct msm_vidc_inst *inst, u32 cmd) if (rc) return rc; } else if (cmd == V4L2_DEC_CMD_START) { + i_vpr_h(inst, "received cmd: resume\n"); if (!msm_vidc_allow_start(inst)) return -EBUSY; port = (inst->state == MSM_VIDC_DRAIN_LAST_FLAG) ? INPUT_PORT : OUTPUT_PORT; diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index a632c36714..529b15332d 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -942,6 +942,7 @@ int msm_venc_process_cmd(struct msm_vidc_inst *inst, u32 cmd) } if (cmd == V4L2_ENC_CMD_STOP) { + i_vpr_h(inst, "received cmd: drain\n"); allow = msm_vidc_allow_stop(inst); if (allow == MSM_VIDC_DISALLOW) return -EBUSY; @@ -961,6 +962,7 @@ int msm_venc_process_cmd(struct msm_vidc_inst *inst, u32 cmd) if (rc) return rc; } else if (cmd == V4L2_ENC_CMD_START) { + i_vpr_h(inst, "received cmd: resume\n"); if (!msm_vidc_allow_start(inst)) return -EBUSY; vb2_clear_last_buffer_dequeued(&inst->vb2q[OUTPUT_META_PORT]); diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index 46f5a9e469..8736160aa8 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -594,6 +594,8 @@ int msm_vidc_cmd(void *instance, union msm_v4l2_cmd *cmd) enc = (struct v4l2_encoder_cmd *)cmd; rc = msm_venc_process_cmd(inst, enc->cmd); } + if (rc) + return rc; return 0; } @@ -819,6 +821,8 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) INIT_LIST_HEAD(&inst->pool.buffers.list); INIT_LIST_HEAD(&inst->pool.mappings.list); INIT_LIST_HEAD(&inst->pool.allocations.list); + INIT_LIST_HEAD(&inst->pool.timestamps.list); + INIT_LIST_HEAD(&inst->timestamps.list); INIT_LIST_HEAD(&inst->buffers.input.list); INIT_LIST_HEAD(&inst->buffers.input_meta.list); INIT_LIST_HEAD(&inst->buffers.output.list); diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 1f5f180c73..0704ac04b2 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -1914,6 +1914,210 @@ int msm_vidc_memory_unmap_completely(struct msm_vidc_inst *inst, return rc; } +int msm_vidc_calc_framerate(struct msm_vidc_inst *inst) +{ + struct msm_vidc_timestamp *ts; + struct msm_vidc_timestamp *prev = NULL; + u32 counter = 0; + u64 ts_ms = 0; + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + list_for_each_entry(ts, &inst->timestamps.list, sort.list) { + if (prev) { + if (ts->sort.val == prev->sort.val) + continue; + + ts_ms += div_u64(ts->sort.val - prev->sort.val, 1000000); + counter++; + } + prev = ts; + } + + return ts_ms ? (1000 * counter) / ts_ms : 0; +} + +static int msm_vidc_insert_sort(struct list_head *head, + struct msm_vidc_sort *entry) +{ + struct msm_vidc_sort *first, *node; + struct msm_vidc_sort *prev = NULL; + bool is_inserted = false; + + if (!head || !entry) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (list_empty(head)) { + list_add(&entry->list, head); + return 0; + } + + first = list_first_entry(head, struct msm_vidc_sort, list); + if (entry->val < first->val) { + list_add(&entry->list, head); + return 0; + } + + list_for_each_entry(node, head, list) { + if (prev && + entry->val >= prev->val && entry->val <= node->val) { + list_add(&entry->list, &prev->list); + is_inserted = true; + break; + } + prev = node; + } + + if (!is_inserted) + list_add(&entry->list, &prev->list); + + return 0; +} + +static struct msm_vidc_timestamp *msm_vidc_get_least_rank_ts(struct msm_vidc_inst *inst) +{ + struct msm_vidc_timestamp *ts, *final = NULL; + u64 least_rank = INT_MAX; + + if (!inst) { + d_vpr_e("%s: Invalid params\n", __func__); + return NULL; + } + + list_for_each_entry(ts, &inst->timestamps.list, sort.list) { + if (ts->rank < least_rank) { + least_rank = ts->rank; + final = ts; + } + } + + return final; +} + +int msm_vidc_flush_ts(struct msm_vidc_inst *inst) +{ + struct msm_vidc_timestamp *temp, *ts = NULL; + + if (!inst) { + d_vpr_e("%s: Invalid params\n", __func__); + return -EINVAL; + } + + list_for_each_entry_safe(ts, temp, &inst->timestamps.list, sort.list) { + i_vpr_l(inst, "%s: flushing ts: val %lld, rank %%lld\n", + __func__, ts->sort.val, ts->rank); + list_del(&ts->sort.list); + msm_vidc_put_ts(inst, ts); + } + inst->timestamps.count = 0; + + return 0; +} + +int msm_vidc_update_timestamp(struct msm_vidc_inst *inst, u64 timestamp) +{ + struct msm_vidc_timestamp *ts; + int rc = 0; + + if (!inst) { + d_vpr_e("%s: Invalid params\n", __func__); + return -EINVAL; + } + + ts = msm_vidc_get_ts(inst); + if (!ts) { + i_vpr_e(inst, "%s: ts alloc failed\n", __func__); + return -ENOMEM; + } + + INIT_LIST_HEAD(&ts->sort.list); + ts->sort.val = timestamp; + ts->rank = inst->timestamps.rank++; + rc = msm_vidc_insert_sort(&inst->timestamps.list, &ts->sort); + if (rc) + return rc; + inst->timestamps.count++; + + /* keep sliding window of 10 ts nodes */ + if (inst->timestamps.count > 10) { + ts = msm_vidc_get_least_rank_ts(inst); + if (!ts) { + i_vpr_e(inst, "%s: least rank ts is NULL\n", __func__); + return -EINVAL; + } + inst->timestamps.count--; + list_del(&ts->sort.list); + msm_vidc_put_ts(inst, ts); + } + + return 0; +} + +struct msm_vidc_timestamp *msm_vidc_get_ts(struct msm_vidc_inst *inst) +{ + struct msm_vidc_timestamp *ts = NULL; + + if (!inst) { + d_vpr_e("%s: Invalid params\n", __func__); + return NULL; + } + + if (!list_empty(&inst->pool.timestamps.list)) { + ts = list_first_entry(&inst->pool.timestamps.list, + struct msm_vidc_timestamp, sort.list); + inst->pool.timestamps.count--; + list_del(&ts->sort.list); + memset(ts, 0, sizeof(struct msm_vidc_timestamp)); + return ts; + } + + ts = kzalloc(sizeof(struct msm_vidc_timestamp), GFP_KERNEL); + if (!ts) { + i_vpr_e(inst, "%s: ts failed\n", __func__); + return NULL; + } + + return ts; +} + +int msm_vidc_put_ts(struct msm_vidc_inst *inst, struct msm_vidc_timestamp *ts) +{ + if (!inst || !ts) { + d_vpr_e("%s: Invalid params\n", __func__); + return -EINVAL; + } + + inst->pool.timestamps.count++; + list_add_tail(&ts->sort.list, &inst->pool.timestamps.list); + + return 0; +} + +int msm_vidc_destroy_ts(struct msm_vidc_inst *inst) +{ + struct msm_vidc_timestamp *ts, *temp; + + if (!inst) { + d_vpr_e("%s: Invalid params\n", __func__); + return -EINVAL; + } + + i_vpr_h(inst, "%s: pool: ts count %u\n", __func__, inst->pool.timestamps.count); + + /* free all timestamps from pool */ + list_for_each_entry_safe(ts, temp, &inst->pool.timestamps.list, sort.list) { + list_del(&ts->sort.list); + kfree(ts); + } + + return 0; +} + struct msm_vidc_buffer *msm_vidc_get_vidc_buffer(struct msm_vidc_inst *inst) { struct msm_vidc_buffer *buf = NULL; @@ -3801,7 +4005,7 @@ static void __strict_check(struct msm_vidc_core *core) static int msm_vidc_core_init_wait(struct msm_vidc_core *core) { - static const int interval = 40; + const int interval = 40; int max_tries, count = 0, rc = 0; if (!core || !core->capabilities) { @@ -4084,7 +4288,7 @@ void msm_vidc_ssr_handler(struct work_struct *work) ssr = &core->ssr; core_lock(core, __func__); - if (core->state != MSM_VIDC_CORE_DEINIT) { + if (core->state == MSM_VIDC_CORE_INIT) { /* * In current implementation, user-initiated SSR triggers * a fatal error from hardware. However, there is no way @@ -4278,6 +4482,7 @@ void msm_vidc_destroy_buffers(struct msm_vidc_inst *inst) { struct msm_vidc_buffers *buffers; struct msm_vidc_buffer *buf, *dummy; + struct msm_vidc_timestamp *ts, *dummy_ts; static const enum msm_vidc_buffer_type ext_buf_types[] = { MSM_VIDC_BUF_INPUT, MSM_VIDC_BUF_OUTPUT, @@ -4339,11 +4544,18 @@ void msm_vidc_destroy_buffers(struct msm_vidc_inst *inst) msm_vidc_put_vidc_buffer(inst, buf); } + list_for_each_entry_safe(ts, dummy_ts, &inst->timestamps.list, sort.list) { + i_vpr_e(inst, "%s: removing ts: val %lld, rank %%lld\n", + __func__, ts->sort.val, ts->rank); + list_del(&ts->sort.list); + msm_vidc_put_ts(inst, ts); + } + /* destroy buffers from pool */ msm_vidc_destroy_vidc_buffer(inst); msm_vidc_destroy_alloc_buffer(inst); msm_vidc_destroy_map_buffer(inst); - + msm_vidc_destroy_ts(inst); } static void msm_vidc_close_helper(struct kref *kref) diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index 6958d42cd1..fafb990b69 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -3317,6 +3317,7 @@ int venus_hfi_queue_super_buffer(struct msm_vidc_inst *inst, /* Create yuv packet */ update_offset(hfi_buffer.addr_offset, (cnt ? frame_size : 0u)); update_timestamp(hfi_buffer.timestamp, (cnt ? ts_delta_us : 0u)); + msm_vidc_update_timestamp(inst, hfi_buffer.timestamp); rc = hfi_create_packet(inst->packet, inst->packet_size, HFI_CMD_BUFFER, @@ -3384,6 +3385,9 @@ int venus_hfi_queue_buffer(struct msm_vidc_inst *inst, if (rc) goto unlock; + if (is_encode_session(inst) && is_input_buffer(buffer->type)) + msm_vidc_update_timestamp(inst, hfi_buffer.timestamp); + rc = hfi_create_header(inst->packet, inst->packet_size, inst->session_id, core->header_id++); if (rc) diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index ae495b52e2..0b658350f1 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -779,6 +779,9 @@ static int handle_output_buffer(struct msm_vidc_inst *inst, inst->power.fw_cr = inst->hfi_frame_info.cr; } + if (is_decode_session(inst) && buf->data_size) + msm_vidc_update_timestamp(inst, buf->timestamp); + print_vidc_buffer(VIDC_HIGH, "high", "dqbuf", inst, buf); msm_vidc_debugfs_update(inst, MSM_VIDC_DEBUGFS_EVENT_FBD); @@ -1278,6 +1281,7 @@ static int handle_session_property(struct msm_vidc_inst *inst, __func__, pkt->port, pkt->type); break; } + i_vpr_e(inst, "received prop_no_output attached input\n"); inst->hfi_frame_info.no_output = 1; break; case HFI_PROP_WORST_COMPRESSION_RATIO: From af0c91ca4c02d995bfe06dd35ef7567809e23c3d Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Thu, 13 May 2021 15:38:42 -0700 Subject: [PATCH 0285/1061] video-driver: update min resolution for secure session update minimum resolution for secure decode sessions as 96x96. Change-Id: I7a0bee2330a235498179f490a9343ff1fa655737 Signed-off-by: Darshana Patil --- driver/platform/waipio/src/msm_vidc_waipio.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 75eaa68bf6..b98e583c82 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -109,11 +109,13 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {FRAME_WIDTH, DEC, CODECS_ALL, 96, 8192, 1, 1920}, {FRAME_WIDTH, ENC, CODECS_ALL, 128, 8192, 1, 1920}, {LOSSLESS_FRAME_WIDTH, ENC, H264|HEVC, 128, 4096, 1, 1920}, - {SECURE_FRAME_WIDTH, ENC|DEC, H264|HEVC|VP9, 128, 4096, 1, 1920}, + {SECURE_FRAME_WIDTH, DEC, H264|HEVC|VP9, 96, 4096, 1, 1920}, + {SECURE_FRAME_WIDTH, ENC, H264|HEVC, 128, 4096, 1, 1920}, {FRAME_HEIGHT, DEC, CODECS_ALL, 96, 8192, 1, 1080}, {FRAME_HEIGHT, ENC, CODECS_ALL, 128, 8192, 1, 1080}, {LOSSLESS_FRAME_HEIGHT, ENC, H264|HEVC, 128, 4096, 1, 1080}, - {SECURE_FRAME_HEIGHT, ENC|DEC, H264|HEVC|VP9, 128, 4096, 1, 1080}, + {SECURE_FRAME_HEIGHT, DEC, H264|HEVC|VP9, 96, 4096, 1, 1080}, + {SECURE_FRAME_HEIGHT, ENC, H264|HEVC, 128, 4096, 1, 1080}, {PIX_FMTS, ENC, H264, MSM_VIDC_FMT_NV12, MSM_VIDC_FMT_NV12C, From 75ecec1bb554c3ab5b411e9f6c0be6330445283c Mon Sep 17 00:00:00 2001 From: Vikash Garodia Date: Tue, 27 Apr 2021 19:34:18 +0530 Subject: [PATCH 0286/1061] video: driver: Add support dynamic low latency for decoder Latency property is set to firmware during streamon output port, if set as part of initial configuration by client. During runtime, the property is set as and when configured by client. 1. Make the latency property dynamic for decoder. 2. For encoder, the same gets set to firmware with regular v4l2 set properties. 3. For decoder, set the property explicitly during streamon output port. Change-Id: I35990614b95e57f113ddacfc2272cad6ae0dde82 Signed-off-by: Vikash Garodia --- driver/platform/waipio/src/msm_vidc_waipio.c | 18 +++++++++-- driver/vidc/inc/msm_vidc_control.h | 2 ++ driver/vidc/src/msm_vdec.c | 31 +----------------- driver/vidc/src/msm_venc.c | 33 -------------------- driver/vidc/src/msm_vidc_control.c | 30 ++++++++++++++++++ driver/vidc/src/msm_vidc_driver.c | 1 + 6 files changed, 49 insertions(+), 66 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index b98e583c82..27bf9acfbf 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -465,12 +465,19 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { HFI_PROP_CSC_MATRIX, CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, */ - {LOWLATENCY_MODE, ENC|DEC, H264|HEVC|VP9, + {LOWLATENCY_MODE, ENC, H264 | HEVC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_LOWLATENCY_REQUEST}, + + {LOWLATENCY_MODE, DEC, H264|HEVC|VP9, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDC_LOWLATENCY_REQUEST, HFI_PROP_STAGE, - CAP_FLAG_ROOT}, + CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + NULL, msm_vidc_set_stage}, {LTR_COUNT, ENC, H264|HEVC, 0, 2, 1, 0, @@ -1142,7 +1149,12 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {STAGE, DEC|ENC, CODECS_ALL, MSM_VIDC_STAGE_1, MSM_VIDC_STAGE_2, 1, - MSM_VIDC_STAGE_2}, + MSM_VIDC_STAGE_2, + 0, + HFI_PROP_STAGE, + CAP_FLAG_ROOT, + {0}, {0}, + NULL, msm_vidc_set_stage}, {PIPE, DEC|ENC, CODECS_ALL, MSM_VIDC_PIPE_1, MSM_VIDC_PIPE_4, 1, diff --git a/driver/vidc/inc/msm_vidc_control.h b/driver/vidc/inc/msm_vidc_control.h index b92216695b..0b2a1ce105 100644 --- a/driver/vidc/inc/msm_vidc_control.h +++ b/driver/vidc/inc/msm_vidc_control.h @@ -86,6 +86,8 @@ int msm_vidc_set_blur_type(void *instance, enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_blur_resolution(void *instance, enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_stage(void *instance, + enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_s32(void *instance, enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_q16(void *instance, diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 88c7570c1b..7de78b7a78 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -528,35 +528,6 @@ static int msm_vdec_set_colorformat(struct msm_vidc_inst *inst) return rc; } -static int msm_vdec_set_stage(struct msm_vidc_inst *inst) -{ - int rc = 0; - u32 stage = 0; - struct msm_vidc_core *core = inst->core; - struct msm_vidc_inst_capability *capability = inst->capabilities; - - rc = call_session_op(core, decide_work_mode, inst); - if (rc) { - i_vpr_e(inst, "%s: decide_work_mode failed %d\n", - __func__); - return -EINVAL; - } - - stage = capability->cap[STAGE].value; - i_vpr_h(inst, "%s: stage: %d", __func__, stage); - rc = venus_hfi_session_property(inst, - HFI_PROP_STAGE, - HFI_HOST_FLAGS_NONE, - HFI_PORT_NONE, - HFI_PAYLOAD_U32, - &stage, - sizeof(u32)); - if (rc) - i_vpr_e(inst, "%s: set property failed\n", __func__); - - return rc; -} - static int msm_vdec_set_pipe(struct msm_vidc_inst *inst) { int rc = 0; @@ -816,7 +787,7 @@ static int msm_vdec_set_output_properties(struct msm_vidc_inst *inst) if (rc) return rc; - rc = msm_vdec_set_stage(inst); + rc = msm_vidc_set_stage(inst, STAGE); if (rc) return rc; diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index a632c36714..c5c03e055f 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -399,34 +399,6 @@ static int msm_venc_set_csc(struct msm_vidc_inst* inst, return 0; } -static int msm_venc_set_stage(struct msm_vidc_inst *inst) -{ - int rc = 0; - struct msm_vidc_core *core = inst->core; - struct msm_vidc_inst_capability *capability = inst->capabilities; - u32 stage; - - rc = call_session_op(core, decide_work_mode, inst); - if (rc) { - i_vpr_e(inst, "%s: decide_work_mode failed\n", - __func__); - return -EINVAL; - } - - stage = capability->cap[STAGE].value; - i_vpr_h(inst, "%s: stage: %u\n", __func__, stage); - rc = venus_hfi_session_property(inst, - HFI_PROP_STAGE, - HFI_HOST_FLAGS_NONE, - HFI_PORT_NONE, - HFI_PAYLOAD_U32, - &stage, - sizeof(u32)); - if (rc) - return rc; - return 0; -} - static int msm_venc_set_pipe(struct msm_vidc_inst *inst) { int rc = 0; @@ -568,11 +540,6 @@ static int msm_venc_set_internal_properties(struct msm_vidc_inst *inst) } i_vpr_h(inst, "%s()\n", __func__); - //TODO: set HFI_PORT_NONE properties at master port streamon. - rc = msm_venc_set_stage(inst); - if (rc) - return rc; - rc = msm_venc_set_pipe(inst); if (rc) return rc; diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index f4e9f55710..2bc821886c 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -3113,3 +3113,33 @@ set_default: capability->cap[cap_id].v4l2_id, *value); return 0; } + +int msm_vidc_set_stage(void *instance, + enum msm_vidc_inst_capability_type cap_id) +{ + int rc = 0; + u32 stage = 0; + struct msm_vidc_core *core; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; + + if (!inst || !inst->capabilities || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + core = inst->core; + + rc = call_session_op(core, decide_work_mode, inst); + if (rc) { + i_vpr_e(inst, "%s: decide_work_mode failed\n", __func__); + return -EINVAL; + } + + stage = inst->capabilities->cap[STAGE].value; + + rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32, + &stage, sizeof(u32), __func__); + if (rc) + return rc; + + return rc; +} diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 1f5f180c73..2697ce02d7 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -1108,6 +1108,7 @@ bool msm_vidc_allow_s_ctrl(struct msm_vidc_inst *inst, u32 id) switch (id) { case V4L2_CID_MPEG_VIDC_CODEC_CONFIG: case V4L2_CID_MPEG_VIDC_PRIORITY: + case V4L2_CID_MPEG_VIDC_LOWLATENCY_REQUEST: allow = true; break; default: From 90d7de565824609e0df7d2da37714bd4801264b4 Mon Sep 17 00:00:00 2001 From: Vikash Garodia Date: Thu, 29 Apr 2021 11:35:57 +0530 Subject: [PATCH 0287/1061] video: driver: define hfi setter for configuring pipe Deprecate custom pipe setting and use the hfi setter to configure it alongwith other configurations. Change-Id: Iffbd25df89f43cf77c1fa85ffa97601a31998410 Signed-off-by: Vikash Garodia --- driver/platform/waipio/src/msm_vidc_waipio.c | 7 ++++- driver/vidc/inc/msm_vidc_control.h | 2 ++ driver/vidc/src/msm_vdec.c | 31 +------------------ driver/vidc/src/msm_venc.c | 32 -------------------- driver/vidc/src/msm_vidc_control.c | 30 ++++++++++++++++++ 5 files changed, 39 insertions(+), 63 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 27bf9acfbf..65e8b183c6 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -1158,7 +1158,12 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {PIPE, DEC|ENC, CODECS_ALL, MSM_VIDC_PIPE_1, MSM_VIDC_PIPE_4, 1, - MSM_VIDC_PIPE_4}, + MSM_VIDC_PIPE_4, + 0, + HFI_PROP_PIPE, + CAP_FLAG_ROOT, + {0}, {0}, + NULL, msm_vidc_set_pipe}, {POC, DEC, H264, 0, 18, 1, 1}, {QUALITY_MODE, ENC, CODECS_ALL, MSM_VIDC_MAX_QUALITY_MODE, diff --git a/driver/vidc/inc/msm_vidc_control.h b/driver/vidc/inc/msm_vidc_control.h index 0b2a1ce105..50ce7c2cb9 100644 --- a/driver/vidc/inc/msm_vidc_control.h +++ b/driver/vidc/inc/msm_vidc_control.h @@ -88,6 +88,8 @@ int msm_vidc_set_blur_resolution(void *instance, enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_stage(void *instance, enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_pipe(void *instance, + enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_s32(void *instance, enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_q16(void *instance, diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 7de78b7a78..8ceb6683d1 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -528,35 +528,6 @@ static int msm_vdec_set_colorformat(struct msm_vidc_inst *inst) return rc; } -static int msm_vdec_set_pipe(struct msm_vidc_inst *inst) -{ - int rc = 0; - u32 pipe; - struct msm_vidc_core *core = inst->core; - struct msm_vidc_inst_capability *capability = inst->capabilities; - - rc = call_session_op(core, decide_work_route, inst); - if (rc) { - i_vpr_e(inst, "%s: decide_work_route failed\n", - __func__); - return -EINVAL; - } - - pipe = capability->cap[PIPE].value; - i_vpr_h(inst, "%s: pipe: %d", __func__, pipe); - rc = venus_hfi_session_property(inst, - HFI_PROP_PIPE, - HFI_HOST_FLAGS_NONE, - HFI_PORT_NONE, - HFI_PAYLOAD_U32, - &pipe, - sizeof(u32)); - if (rc) - i_vpr_e(inst, "%s: set property failed\n", __func__); - - return rc; -} - static int msm_vdec_set_output_order(struct msm_vidc_inst *inst, enum msm_vidc_port_type port) { @@ -791,7 +762,7 @@ static int msm_vdec_set_output_properties(struct msm_vidc_inst *inst) if (rc) return rc; - rc = msm_vdec_set_pipe(inst); + rc = msm_vidc_set_pipe(inst, PIPE); if (rc) return rc; diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index c5c03e055f..c2f9d4fee8 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -399,34 +399,6 @@ static int msm_venc_set_csc(struct msm_vidc_inst* inst, return 0; } -static int msm_venc_set_pipe(struct msm_vidc_inst *inst) -{ - int rc = 0; - struct msm_vidc_core *core = inst->core; - struct msm_vidc_inst_capability *capability = inst->capabilities; - u32 pipe; - - rc = call_session_op(core, decide_work_route, inst); - if (rc) { - i_vpr_e(inst, "%s: decide_work_route failed\n", - __func__); - return -EINVAL; - } - - pipe = capability->cap[PIPE].value; - i_vpr_h(inst, "%s: pipe: %u\n", __func__, pipe); - rc = venus_hfi_session_property(inst, - HFI_PROP_PIPE, - HFI_HOST_FLAGS_NONE, - HFI_PORT_NONE, - HFI_PAYLOAD_U32, - &pipe, - sizeof(u32)); - if (rc) - return rc; - return 0; -} - static int msm_venc_set_quality_mode(struct msm_vidc_inst *inst) { int rc = 0; @@ -540,10 +512,6 @@ static int msm_venc_set_internal_properties(struct msm_vidc_inst *inst) } i_vpr_h(inst, "%s()\n", __func__); - rc = msm_venc_set_pipe(inst); - if (rc) - return rc; - rc = msm_venc_set_quality_mode(inst); if (rc) return rc; diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 2bc821886c..f757379505 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -3143,3 +3143,33 @@ int msm_vidc_set_stage(void *instance, return rc; } + +int msm_vidc_set_pipe(void *instance, + enum msm_vidc_inst_capability_type cap_id) +{ + int rc = 0; + u32 pipe; + struct msm_vidc_core *core; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; + + if (!inst || !inst->capabilities || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + core = inst->core; + + rc = call_session_op(core, decide_work_route, inst); + if (rc) { + i_vpr_e(inst, "%s: decide_work_route failed\n", + __func__); + return -EINVAL; + } + + pipe = inst->capabilities->cap[PIPE].value; + rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32, + &pipe, sizeof(u32), __func__); + if (rc) + return rc; + + return rc; +} From e7c7a2fb0295e504397f8d3f41dba617dd14e42a Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Wed, 12 May 2021 13:08:08 -0700 Subject: [PATCH 0288/1061] video-driver: add decode QP metadata support add v4l2 extension and necassary support for decoder QP metadata. Change-Id: I364ef9b7b3a63bef0a59c955018bc8456f12d03f Signed-off-by: Darshana Patil --- driver/platform/waipio/src/msm_vidc_waipio.c | 6 ++++++ driver/vidc/inc/msm_vidc_internal.h | 1 + driver/vidc/src/msm_vdec.c | 1 + driver/vidc/src/msm_vidc_driver.c | 1 + include/uapi/vidc/media/v4l2_vidc_extensions.h | 3 +++ 5 files changed, 12 insertions(+) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index b98e583c82..275df89721 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -1335,6 +1335,12 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {0}, msm_vidc_adjust_roi_info, NULL}, + {META_DEC_QP_METADATA, DEC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_DEC_QP_METADATA, + HFI_PROP_DEC_QP_METADATA}, + /* configure image properties */ {FRAME_WIDTH, ENC, HEIC, 512, 16384, 1, 16384}, {FRAME_HEIGHT, ENC, HEIC, 512, 16384, 1, 16384}, diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 337895df30..754819d34d 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -468,6 +468,7 @@ enum msm_vidc_inst_capability_type { META_SUBFRAME_OUTPUT, META_ENC_QP_METADATA, META_ROI_INFO, + META_DEC_QP_METADATA, INST_CAP_MAX, }; diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 88c7570c1b..057c9f1e1c 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -1087,6 +1087,7 @@ static int msm_vdec_subscribe_metadata(struct msm_vidc_inst *inst, META_BUF_TAG, META_DPB_TAG_LIST, META_SUBFRAME_OUTPUT, + META_DEC_QP_METADATA, }; if (!inst || !inst->core || !inst->capabilities) { diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 1f5f180c73..9829bcf2dc 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -180,6 +180,7 @@ static const struct msm_vidc_cap_name cap_name_arr[] = { {META_SUBFRAME_OUTPUT, "META_SUBFRAME_OUTPUT" }, {META_ENC_QP_METADATA, "META_ENC_QP_METADATA" }, {META_ROI_INFO, "META_ROI_INFO" }, + {META_DEC_QP_METADATA, "META_DEC_QP_METADATA" }, {INST_CAP_MAX, "INST_CAP_MAX" }, }; diff --git a/include/uapi/vidc/media/v4l2_vidc_extensions.h b/include/uapi/vidc/media/v4l2_vidc_extensions.h index b2f825021e..fa9bf8fc8f 100644 --- a/include/uapi/vidc/media/v4l2_vidc_extensions.h +++ b/include/uapi/vidc/media/v4l2_vidc_extensions.h @@ -132,6 +132,8 @@ enum v4l2_mpeg_vidc_blur_types { (V4L2_CID_MPEG_VIDC_BASE + 0x2C) #define V4L2_CID_MPEG_VIDC_MIN_QUALITY \ (V4L2_CID_MPEG_VIDC_BASE + 0x2D) +#define V4L2_CID_MPEG_VIDC_METADATA_DEC_QP_METADATA \ + (V4L2_CID_MPEG_VIDC_BASE + 0x2E) /* Deprecate below controls once availble in gki and gsi bionic header */ #ifndef V4L2_CID_MPEG_VIDEO_BASELAYER_PRIORITY_ID @@ -258,6 +260,7 @@ enum v4l2_mpeg_vidc_metadata { METADATA_BUFFER_TAG = 0x0300016b, METADATA_SUBFRAME_OUTPUT = 0x0300016d, METADATA_ENC_QP_METADATA = 0x0300016e, + METADATA_DEC_QP_METADATA = 0x0300016f, METADATA_ROI_INFO = 0x03000173, METADATA_DPB_TAG_LIST = 0x03000179, }; From 3f52f1e3921b4763a42065d6cb8897da6969748c Mon Sep 17 00:00:00 2001 From: Mihir Ganu Date: Fri, 14 May 2021 11:07:45 -0700 Subject: [PATCH 0289/1061] video: driver: Add index check in enum format Add index check in enum fmt call and add the missing break statement in handle_session_property. Change-Id: Ida294f9ad4b8fa5c86d73b0e5bbd5297d8dbcd1b Signed-off-by: Mihir Ganu --- driver/vidc/src/msm_vdec.c | 4 ++++ driver/vidc/src/msm_venc.c | 4 ++++ driver/vidc/src/venus_hfi_response.c | 1 + 3 files changed, 9 insertions(+) diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 88c7570c1b..1223d75648 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -2437,6 +2437,8 @@ int msm_vdec_enum_fmt(struct msm_vidc_inst *inst, struct v4l2_fmtdesc *f) idx++; } } + if (!array[f->index]) + return -EINVAL; f->pixelformat = v4l2_codec_from_driver(array[f->index], __func__); if (!f->pixelformat) @@ -2458,6 +2460,8 @@ int msm_vdec_enum_fmt(struct msm_vidc_inst *inst, struct v4l2_fmtdesc *f) } } } + if (!array[f->index]) + return -EINVAL; f->pixelformat = v4l2_colorformat_from_driver(array[f->index], __func__); if (!f->pixelformat) diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index a632c36714..3468eee8a6 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -1738,6 +1738,8 @@ int msm_venc_enum_fmt(struct msm_vidc_inst *inst, struct v4l2_fmtdesc *f) idx++; } } + if (!array[f->index]) + return -EINVAL; f->pixelformat = v4l2_codec_from_driver(array[f->index], __func__); if (!f->pixelformat) @@ -1756,6 +1758,8 @@ int msm_venc_enum_fmt(struct msm_vidc_inst *inst, struct v4l2_fmtdesc *f) idx++; } } + if (!array[f->index]) + return -EINVAL; f->pixelformat = v4l2_colorformat_from_driver(array[f->index], __func__); if (!f->pixelformat) diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index ae495b52e2..ec1adf28a5 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -1295,6 +1295,7 @@ static int handle_session_property(struct msm_vidc_inst *inst, msm_vidc_update_cap_value(inst, ENTROPY_MODE, V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC, __func__); + break; case HFI_PROP_DPB_LIST: if (is_decode_session(inst) && port == OUTPUT_PORT && inst->capabilities->cap[DPB_LIST].value) { From 724e5f525e75c6896d91d9f5159ff614fad47f3f Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Wed, 12 May 2021 16:04:59 -0700 Subject: [PATCH 0290/1061] video: driver: hb layer buf count and hfi buffer macro CL:30683524 changes [1] Update enc input min count buffers count when HB layer encoding is enabled. [2] Also align hfi buffer macro file with CL: 30683524. [3] This change also fixes VPSS buffer size mismatch issue. Change-Id: I63d91ff204f1e11e71e3c0633b582c47c5e9b102 Signed-off-by: Akshata Sahukar --- driver/variant/iris2/inc/hfi_buffer_iris2.h | 27 ++++----- .../variant/iris2/src/msm_vidc_buffer_iris2.c | 54 ++++++++++++++++-- driver/vidc/inc/msm_vidc_driver.h | 10 ++++ driver/vidc/src/msm_vidc_buffer.c | 14 ++++- driver/vidc/src/msm_vidc_control.c | 55 ++++++++++++++++--- 5 files changed, 133 insertions(+), 27 deletions(-) diff --git a/driver/variant/iris2/inc/hfi_buffer_iris2.h b/driver/variant/iris2/inc/hfi_buffer_iris2.h index 02ca6e325e..ab617ae8ae 100644 --- a/driver/variant/iris2/inc/hfi_buffer_iris2.h +++ b/driver/variant/iris2/inc/hfi_buffer_iris2.h @@ -969,7 +969,8 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define HFI_IRIS2_ENC_RECON_BUF_COUNT(num_recon, n_bframe, ltr_count, \ _total_hp_layers, _total_hb_layers, hybrid_hp, codec_standard) \ - do { \ + do \ + { \ HFI_U32 num_ref = 1; \ if (n_bframe) \ num_ref = 2; \ @@ -1542,24 +1543,24 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ HFI_BUFFER_DPB_ENC(_size, frame_width, frame_height, is_ten_bit); \ } while (0) -#define HFI_BUFFER_VPSS_ENC(vpss_size, bitstream_framewidth, bitstream_frameheight, ds_enable, \ - rotation, is_ten_bit) \ +#define HFI_BUFFER_VPSS_ENC(vpss_size, dswidth, dsheight, ds_enable, is_ten_bit) \ do \ { \ vpss_size = 0; \ if (ds_enable) \ { \ - if (rotation == HFI_ROTATION_90 || rotation == HFI_ROTATION_270 ) \ - { \ - HFI_BUFFER_DPB_ENC(vpss_size, bitstream_frameheight, \ - bitstream_framewidth, is_ten_bit); \ - } \ - else \ - { \ - HFI_BUFFER_DPB_ENC(vpss_size, bitstream_framewidth, \ - bitstream_frameheight, is_ten_bit); \ - } \ + HFI_BUFFER_DPB_ENC(vpss_size, dswidth, dsheight, is_ten_bit); \ } \ } while (0) +#define HFI_IRIS2_ENC_MIN_INPUT_BUF_COUNT(numInput, TotalHBLayers) \ + do \ + { \ + numInput = 3; \ + if (TotalHBLayers >= 2) \ + { \ + numInput = (1 << (TotalHBLayers - 1)) + 2; \ + } \ + } while (0) + #endif /* __HFI_BUFFER_IRIS2__ */ diff --git a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c index 073ba69aab..faff09f519 100644 --- a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c @@ -454,16 +454,27 @@ static u32 msm_vidc_encoder_vpss_size_iris2(struct msm_vidc_inst* inst) ds_enable = is_scaling_enabled(inst); msm_vidc_v4l2_to_hfi_enum(inst, ROTATION, &rotation_val); - width = inst->compose.width; - height = inst->compose.height; + f = &inst->fmts[OUTPUT_PORT]; + if (inst->capabilities->cap[ROTATION].value == 90 || + inst->capabilities->cap[ROTATION].value == 270) { + /* + * output width and height are rotated, + * so unrotate them to use as arguments to + * HFI_BUFFER_VPSS_ENC. + */ + width = f->fmt.pix_mp.height; + height = f->fmt.pix_mp.width; + } else { + width = f->fmt.pix_mp.width; + height = f->fmt.pix_mp.height; + } f = &inst->fmts[INPUT_PORT]; driver_colorfmt = v4l2_colorformat_to_driver( f->fmt.pix_mp.pixelformat, __func__); is_tenbit = is_10bit_colorformat(driver_colorfmt); - HFI_BUFFER_VPSS_ENC(size, width, height, ds_enable, - rotation_val, is_tenbit); + HFI_BUFFER_VPSS_ENC(size, width, height, ds_enable, is_tenbit); i_vpr_l(inst, "%s: size %d\n", __func__, size); return size; } @@ -539,6 +550,39 @@ exit: return size; } +static int msm_vidc_input_min_count_iris2(struct msm_vidc_inst* inst) +{ + u32 input_min_count = 0; + u32 total_hb_layer = 0; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return 0; + } + + if (is_decode_session(inst)) { + input_min_count = MIN_DEC_INPUT_BUFFERS; + } else if (is_encode_session(inst)) { + total_hb_layer = is_hierb_requested(inst) ? + inst->capabilities->cap[ENH_LAYER_COUNT].value + 1 : 0; + if (inst->codec == MSM_VIDC_H264 && + !inst->capabilities->cap[LAYER_ENABLE].value) { + total_hb_layer = 0; + } + HFI_IRIS2_ENC_MIN_INPUT_BUF_COUNT(input_min_count, + total_hb_layer); + } else { + i_vpr_e(inst, "%s: invalid domain\n", + __func__, inst->domain); + return 0; + } + + if (is_thumbnail_session(inst) || is_image_session(inst)) + input_min_count = 1; + + return input_min_count; +} + static int msm_buffer_dpb_count(struct msm_vidc_inst *inst) { int count = 0; @@ -575,7 +619,7 @@ int msm_buffer_min_count_iris2(struct msm_vidc_inst *inst, switch (buffer_type) { case MSM_VIDC_BUF_INPUT: case MSM_VIDC_BUF_INPUT_META: - count = msm_vidc_input_min_count(inst); + count = msm_vidc_input_min_count_iris2(inst); break; case MSM_VIDC_BUF_OUTPUT: case MSM_VIDC_BUF_OUTPUT_META: diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 5c044c0b18..8adff2906c 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -197,6 +197,16 @@ static inline bool is_lowlatency_session(struct msm_vidc_inst *inst) return !!(inst->capabilities->cap[LOWLATENCY_MODE].value); } +static inline bool is_hierb_requested(struct msm_vidc_inst *inst) +{ + return (inst->codec == MSM_VIDC_H264 && + inst->capabilities->cap[LAYER_TYPE].value == + V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_B) || + (inst->codec == MSM_VIDC_HEVC && + inst->capabilities->cap[LAYER_TYPE].value == + V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B); +} + static inline bool is_active_session(u64 prev, u64 curr) { u64 ts_delta; diff --git a/driver/vidc/src/msm_vidc_buffer.c b/driver/vidc/src/msm_vidc_buffer.c index 46cf0c8370..56546f7912 100644 --- a/driver/vidc/src/msm_vidc_buffer.c +++ b/driver/vidc/src/msm_vidc_buffer.c @@ -11,11 +11,13 @@ #include "msm_vidc_debug.h" #include "msm_vidc_internal.h" +/* Generic function for all targets. Not being used for iris2 */ u32 msm_vidc_input_min_count(struct msm_vidc_inst* inst) { u32 input_min_count = 0; + u32 hb_enh_layer = 0; - if (!inst) { + if (!inst || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); return 0; } @@ -24,6 +26,16 @@ u32 msm_vidc_input_min_count(struct msm_vidc_inst* inst) input_min_count = MIN_DEC_INPUT_BUFFERS; } else if (is_encode_session(inst)) { input_min_count = MIN_ENC_INPUT_BUFFERS; + if (is_hierb_requested(inst)) { + hb_enh_layer = + inst->capabilities->cap[ENH_LAYER_COUNT].value; + if (inst->codec == MSM_VIDC_H264 && + !inst->capabilities->cap[LAYER_ENABLE].value) { + hb_enh_layer = 0; + } + if (hb_enh_layer) + input_min_count = (1 << hb_enh_layer) + 2; + } } else { i_vpr_e(inst, "%s: invalid domain\n", __func__, inst->domain); diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index f757379505..eb0bc6b8cf 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -637,6 +637,49 @@ error: return rc; } +static int msm_vidc_update_buffer_count_if_needed(struct msm_vidc_inst* inst, + struct v4l2_ctrl *ctrl) +{ + int rc = 0; + bool update_input_port = false, update_output_port = false; + + if (!inst || !inst->capabilities || !ctrl) { + d_vpr_e("%s: invalid parameters\n", __func__); + return -EINVAL; + } + + switch (ctrl->id) { + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE: + case V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_TYPE: + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER: + case V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING: + case V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_LAYER: + update_input_port = true; + break; + case V4L2_CID_MPEG_VIDC_THUMBNAIL_MODE: + update_input_port = true; + update_output_port = true; + break; + default: + update_input_port = false; + update_output_port = false; + break; + } + + if (update_input_port) { + rc = msm_vidc_update_buffer_count(inst, INPUT_PORT); + if (rc) + return rc; + } + if (update_output_port) { + rc = msm_vidc_update_buffer_count(inst, OUTPUT_PORT); + if (rc) + return rc; + } + + return rc; +} + int msm_v4l2_op_s_ctrl(struct v4l2_ctrl *ctrl) { int rc = 0; @@ -709,14 +752,6 @@ int msm_v4l2_op_s_ctrl(struct v4l2_ctrl *ctrl) if (rc) return rc; } - if (ctrl->id == V4L2_CID_MPEG_VIDC_THUMBNAIL_MODE) { - rc = msm_vidc_update_buffer_count(inst, INPUT_PORT); - if (rc) - return rc; - rc = msm_vidc_update_buffer_count(inst, OUTPUT_PORT); - if (rc) - return rc; - } if (is_meta_ctrl(ctrl->id)) { if (cap_id == META_DPB_TAG_LIST) { /* @@ -734,6 +769,10 @@ int msm_v4l2_op_s_ctrl(struct v4l2_ctrl *ctrl) if (rc) return rc; } + rc = msm_vidc_update_buffer_count_if_needed(inst, ctrl); + if (rc) + return rc; + return 0; } From d9518d91825f06c21cbc43ffa0cb32783fdc0d06 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Mon, 17 May 2021 14:09:08 +0530 Subject: [PATCH 0291/1061] video: driver: fix list usage without init If workqueue creation fails, driver is accessing buffer lists in session close sequence, which is not yet inited and leading to NULL ptr dereferrence issue, while traversing uninitialized list. So added change to avoid accessing list without init completion. Change-Id: Icb3aa6b7edaf27e73873ec289d6a921a2613e77e Signed-off-by: Govindaraj Rajagopal --- driver/vidc/inc/msm_vidc_internal.h | 2 +- driver/vidc/src/msm_vdec.c | 2 -- driver/vidc/src/msm_vidc.c | 33 +++++++++++++--------------- driver/vidc/src/msm_vidc_driver.c | 7 ++++-- driver/vidc/src/msm_vidc_vb2.c | 13 ++++++----- driver/vidc/src/venus_hfi_response.c | 2 +- 6 files changed, 29 insertions(+), 30 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 5a52a01101..fbf7152057 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -828,7 +828,7 @@ struct msm_vidc_timestamp { struct msm_vidc_timestamps { struct list_head list; u32 count; - u32 rank; + u64 rank; }; struct msm_vidc_pool { diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index e21e64df10..54524bb68c 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -1365,8 +1365,6 @@ int msm_vdec_streamoff_input(struct msm_vidc_inst *inst) if (rc) return rc; - msm_vidc_flush_ts(inst); - return 0; } diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index 8736160aa8..53ed8193ee 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -799,24 +799,6 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) msm_vidc_update_debug_str(inst); i_vpr_h(inst, "Opening video instance: %d\n", session_type); - - inst->response_workq = create_singlethread_workqueue("response_workq"); - if (!inst->response_workq) { - i_vpr_e(inst, "%s: create input_psc_workq failed\n", __func__); - goto error; - } - - inst->capabilities = kzalloc( - sizeof(struct msm_vidc_inst_capability), GFP_KERNEL); - if (!inst->capabilities) { - i_vpr_e(inst, - "%s: inst capability allocation failed\n", __func__); - goto error; - } - - INIT_DELAYED_WORK(&inst->response_work, - handle_session_response_work_handler); - INIT_LIST_HEAD(&inst->response_works); INIT_LIST_HEAD(&inst->pool.buffers.list); INIT_LIST_HEAD(&inst->pool.mappings.list); @@ -863,6 +845,21 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) for (i = 0; i < MAX_SIGNAL; i++) init_completion(&inst->completions[i]); + inst->response_workq = create_singlethread_workqueue("response_workq"); + if (!inst->response_workq) { + i_vpr_e(inst, "%s: create input_psc_workq failed\n", __func__); + goto error; + } + + INIT_DELAYED_WORK(&inst->response_work, handle_session_response_work_handler); + + inst->capabilities = kzalloc(sizeof(struct msm_vidc_inst_capability), GFP_KERNEL); + if (!inst->capabilities) { + i_vpr_e(inst, + "%s: inst capability allocation failed\n", __func__); + goto error; + } + if (is_decode_session(inst)) rc = msm_vdec_inst_init(inst); else if (is_encode_session(inst)) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index b0a38ac787..b75c47b3f4 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -40,6 +40,8 @@ extern struct msm_vidc_core *g_core; #define SSR_ADDR_ID 0xFFFFFFFF00000000 #define SSR_ADDR_SHIFT 32 +#define FPS_WINDOW 10 + struct msm_vidc_cap_name { enum msm_vidc_inst_capability_type cap; char *name; @@ -2017,6 +2019,7 @@ int msm_vidc_flush_ts(struct msm_vidc_inst *inst) msm_vidc_put_ts(inst, ts); } inst->timestamps.count = 0; + inst->timestamps.rank = 0; return 0; } @@ -2046,7 +2049,7 @@ int msm_vidc_update_timestamp(struct msm_vidc_inst *inst, u64 timestamp) inst->timestamps.count++; /* keep sliding window of 10 ts nodes */ - if (inst->timestamps.count > 10) { + if (inst->timestamps.count > FPS_WINDOW) { ts = msm_vidc_get_least_rank_ts(inst); if (!ts) { i_vpr_e(inst, "%s: least rank ts is NULL\n", __func__); @@ -4547,7 +4550,7 @@ void msm_vidc_destroy_buffers(struct msm_vidc_inst *inst) } list_for_each_entry_safe(ts, dummy_ts, &inst->timestamps.list, sort.list) { - i_vpr_e(inst, "%s: removing ts: val %lld, rank %%lld\n", + i_vpr_e(inst, "%s: removing ts: val %lld, rank %lld\n", __func__, ts->sort.val, ts->rank); list_del(&ts->sort.list); msm_vidc_put_ts(inst, ts); diff --git a/driver/vidc/src/msm_vidc_vb2.c b/driver/vidc/src/msm_vidc_vb2.c index 4f45cc3928..7b35ceaf01 100644 --- a/driver/vidc/src/msm_vidc_vb2.c +++ b/driver/vidc/src/msm_vidc_vb2.c @@ -266,22 +266,23 @@ void msm_vidc_stop_streaming(struct vb2_queue *q) rc = msm_vdec_streamoff_input(inst); else if (is_encode_session(inst)) rc = msm_venc_streamoff_input(inst); - else - goto error; } else if (q->type == OUTPUT_MPLANE) { if (is_decode_session(inst)) rc = msm_vdec_streamoff_output(inst); else if (is_encode_session(inst)) rc = msm_venc_streamoff_output(inst); - else - goto error; } else { i_vpr_e(inst, "%s: invalid type %d\n", q->type); goto error; } + if (rc) + goto error; - if (!rc) - i_vpr_h(inst, "Streamoff: %d successful\n", q->type); + /* Input port streamoff - flush timestamps list*/ + if (q->type == INPUT_MPLANE) + msm_vidc_flush_ts(inst); + + i_vpr_h(inst, "Streamoff: %d successful\n", q->type); return; error: diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index 63405ae3be..c24f7bd98c 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -1281,7 +1281,7 @@ static int handle_session_property(struct msm_vidc_inst *inst, __func__, pkt->port, pkt->type); break; } - i_vpr_e(inst, "received prop_no_output attached input\n"); + i_vpr_h(inst, "received no_output property\n"); inst->hfi_frame_info.no_output = 1; break; case HFI_PROP_WORST_COMPRESSION_RATIO: From da09aa48edc2211a9b6cbf1003cdab9b7e788bd8 Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Mon, 17 May 2021 17:11:52 -0700 Subject: [PATCH 0292/1061] video: driver: modify unmap excess mappings Unmap only those entries with refcount 1 and which are not present in read_only buffers list. Change-Id: I0bc918c3f5c1fe1a1ed62a0c16b578155a8e6d6e Signed-off-by: Darshana Patil --- driver/vidc/src/msm_vdec.c | 34 +++++++++++++++++++++++++++++++--- 1 file changed, 31 insertions(+), 3 deletions(-) diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index e21e64df10..5effa56eda 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -1853,6 +1853,33 @@ int msm_vdec_handle_release_buffer(struct msm_vidc_inst *inst, return rc; } +static bool is_valid_removable_buffer(struct msm_vidc_inst *inst, + struct msm_vidc_map *map) +{ + bool found = false; + struct msm_vidc_buffer *ro_buf; + + if (!inst || !map) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (map->refcount != 1) + return false; + + list_for_each_entry(ro_buf, &inst->buffers.read_only.list, list) { + if (map->device_addr == ro_buf->device_addr) { + found = true; + break; + } + } + + if (!found) + return true; + + return false; +} + static int msm_vidc_unmap_excessive_mappings(struct msm_vidc_inst *inst) { int rc = 0; @@ -1865,12 +1892,13 @@ static int msm_vidc_unmap_excessive_mappings(struct msm_vidc_inst *inst) } /* - * count entries from map list whose refcount is 1 + * count entries from map list which are not present in + * read_only buffers list and whose refcount is 1. * these are excess mappings present due to delayed * unmap feature. */ list_for_each_entry(map, &inst->mappings.output.list, list) { - if (map->refcount == 1) + if (is_valid_removable_buffer(inst, map)) refcount_one_bufs_count++; } @@ -1879,7 +1907,7 @@ static int msm_vidc_unmap_excessive_mappings(struct msm_vidc_inst *inst) /* unmap these buffers as they are stale entries */ list_for_each_entry(map, &inst->mappings.output.list, list) { - if (map->refcount == 1) { + if (is_valid_removable_buffer(inst, map)) { d_vpr_h( "%s: type %11s, device_addr %#x, refcount %d, region %d\n", __func__, buf_name(map->type), map->device_addr, map->refcount, From cad8267eca816625bc7fd1bfdc1e2910a56b9cf0 Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Mon, 17 May 2021 15:52:31 -0700 Subject: [PATCH 0293/1061] video: driver: modify bytesused if DPB tag list enabled vb2 is not allowing client to pass data in output meta plane. adjust the bytesused as client will send buffer tag metadata in output meta plane if DPB_TAG_LIST metadata enabled. Change-Id: I2d99d0acf559c4b92e0610d518f6cfbdd54a2c19 Signed-off-by: Darshana Patil --- driver/vidc/src/msm_vdec.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index e21e64df10..e6a14fb31b 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -1911,6 +1911,18 @@ int msm_vdec_qbuf(struct msm_vidc_inst *inst, struct vb2_buffer *vb2) return rc; } + if (vb2->type == OUTPUT_META_PLANE) { + if (inst->capabilities->cap[META_DPB_TAG_LIST].value) { + /* + * vb2 is not allowing client to pass data in output meta plane. + * adjust the bytesused as client will send buffer tag metadata + * in output meta plane if DPB_TAG_LIST metadata enabled. + */ + if (!vb2->planes[0].bytesused) + vb2->planes[0].bytesused = 1024; + } + } + /* batch decoder output & meta buffer only */ if (inst->decode_batch.enable && vb2->type == OUTPUT_MPLANE) rc = msm_vdec_qbuf_batch(inst, vb2); From 6a6a3cba5c21e73e41c0c8800459deddcccbb9f6 Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Thu, 13 May 2021 17:03:40 -0700 Subject: [PATCH 0294/1061] video: driver: update alignment for p010 update alignment to 128 for stride in pixel calculation for p010 color format. Change-Id: I0fda66f06409bb9947c88a60a88a9ea8f70505a5 Signed-off-by: Darshana Patil --- driver/vidc/inc/msm_media_info.h | 10 ++-------- 1 file changed, 2 insertions(+), 8 deletions(-) diff --git a/driver/vidc/inc/msm_media_info.h b/driver/vidc/inc/msm_media_info.h index dd26941b42..294cf2761a 100644 --- a/driver/vidc/inc/msm_media_info.h +++ b/driver/vidc/inc/msm_media_info.h @@ -81,6 +81,7 @@ static inline unsigned int VIDEO_Y_STRIDE_PIX(unsigned int v4l2_fmt, case V4L2_PIX_FMT_NV12: case V4L2_PIX_FMT_NV21: case V4L2_PIX_FMT_VIDC_NV12C: + case V4L2_PIX_FMT_VIDC_P010: alignment = 128; stride = MSM_MEDIA_ALIGN(width, alignment); break; @@ -88,10 +89,6 @@ static inline unsigned int VIDEO_Y_STRIDE_PIX(unsigned int v4l2_fmt, alignment = 192; stride = MSM_MEDIA_ALIGN(width, alignment); break; - case V4L2_PIX_FMT_VIDC_P010: - alignment = 256; - stride = MSM_MEDIA_ALIGN(width, alignment); - break; default: break; } @@ -156,6 +153,7 @@ static inline unsigned int VIDEO_UV_STRIDE_PIX(unsigned int v4l2_fmt, case V4L2_PIX_FMT_NV21: case V4L2_PIX_FMT_NV12: case V4L2_PIX_FMT_VIDC_NV12C: + case V4L2_PIX_FMT_VIDC_P010: alignment = 128; stride = MSM_MEDIA_ALIGN(width, alignment); break; @@ -163,10 +161,6 @@ static inline unsigned int VIDEO_UV_STRIDE_PIX(unsigned int v4l2_fmt, alignment = 192; stride = MSM_MEDIA_ALIGN(width, alignment); break; - case V4L2_PIX_FMT_VIDC_P010: - alignment = 256; - stride = MSM_MEDIA_ALIGN(width, alignment); - break; default: break; } From 945883602de6892d3423de3123045dfab15a927c Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Mon, 17 May 2021 18:38:47 -0700 Subject: [PATCH 0295/1061] video: driver: add support to set csc coefficients Add support to honor client enablement of csc custom matrix and set csc coeff to video firmware. Change-Id: I14d702eb7033541aa439bebe11df7fc4aa49ffdb Signed-off-by: Akshata Sahukar --- driver/platform/waipio/src/msm_vidc_waipio.c | 7 +- driver/vidc/inc/msm_vidc_control.h | 2 + driver/vidc/src/msm_venc.c | 6 +- driver/vidc/src/msm_vidc_control.c | 120 +++++++++++++++++++ 4 files changed, 129 insertions(+), 6 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 3ba87d8474..91edd95641 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -456,14 +456,15 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 0, HFI_PROP_CSC}, - /* Needed for control initialization. TODO */ - /* {CSC_CUSTOM_MATRIX, ENC, CODECS_ALL, + {CSC_CUSTOM_MATRIX, ENC, CODECS_ALL, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDC_VIDEO_VPE_CSC_CUSTOM_MATRIX, HFI_PROP_CSC_MATRIX, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, */ + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + {0}, {0}, + NULL, msm_vidc_set_csc_custom_matrix}, {LOWLATENCY_MODE, ENC, H264 | HEVC, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, diff --git a/driver/vidc/inc/msm_vidc_control.h b/driver/vidc/inc/msm_vidc_control.h index 50ce7c2cb9..30515f2965 100644 --- a/driver/vidc/inc/msm_vidc_control.h +++ b/driver/vidc/inc/msm_vidc_control.h @@ -90,6 +90,8 @@ int msm_vidc_set_stage(void *instance, enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_pipe(void *instance, enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_csc_custom_matrix(void *instance, + enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_s32(void *instance, enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_q16(void *instance, diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index 689c60ded6..ce6afaebf3 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -364,7 +364,7 @@ static bool msm_venc_csc_required(struct msm_vidc_inst* inst) /* video hardware supports conversion to REC709 CSC only */ if (in_fmt->fmt.pix_mp.colorspace != out_fmt->fmt.pix_mp.colorspace && - out_fmt->fmt.pix_mp.colorspace == V4L2_COLORSPACE_REC709) + out_fmt->fmt.pix_mp.colorspace == V4L2_COLORSPACE_REC709) return true; return false; @@ -977,11 +977,11 @@ int msm_venc_streamon_output(struct msm_vidc_inst *inst) if (rc) goto error; - rc = msm_vidc_set_v4l2_properties(inst); + rc = msm_venc_set_output_properties(inst); if (rc) goto error; - rc = msm_venc_set_output_properties(inst); + rc = msm_vidc_set_v4l2_properties(inst); if (rc) goto error; diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index eb0bc6b8cf..059c31b72f 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -11,6 +11,7 @@ #include "msm_vidc_internal.h" #include "msm_vidc_driver.h" #include "msm_venc.h" +#include "msm_vidc_platform.h" #define CAP_TO_8BIT_QP(a) { \ if ((a) < 0) \ @@ -2881,6 +2882,125 @@ int msm_vidc_set_blur_resolution(void *instance, return rc; } +static msm_venc_set_csc_coeff(struct msm_vidc_inst *inst, + const char *prop_name, u32 hfi_id, void *payload, + u32 payload_size, u32 row_count, u32 column_count) +{ + int rc = 0; + + i_vpr_h(inst, + "set cap: name: %24s, hard coded %dx%d matrix array\n", + prop_name, row_count, column_count); + rc = venus_hfi_session_property(inst, + hfi_id, + HFI_HOST_FLAGS_NONE, + HFI_PORT_BITSTREAM, + HFI_PAYLOAD_S32_ARRAY, + payload, + payload_size); + if (rc) { + i_vpr_e(inst, + "%s: failed to set %s to fw\n", + __func__, prop_name); + } + + return rc; +} +int msm_vidc_set_csc_custom_matrix(void *instance, + enum msm_vidc_inst_capability_type cap_id) +{ + int rc = 0; + int i; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; + struct msm_vidc_core *core; + struct msm_vidc_csc_coeff *csc_coeff; + s32 matrix_payload[MAX_MATRIX_COEFFS + 2]; + s32 csc_bias_payload[MAX_BIAS_COEFFS + 2]; + s32 csc_limit_payload[MAX_LIMIT_COEFFS + 2]; + + if (!inst || !inst->capabilities || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + core = inst->core; + if (!core->platform) { + d_vpr_e("%s: invalid core platform\n", __func__); + return -EINVAL; + } + csc_coeff = &core->platform->data.csc_data; + + if (!inst->capabilities->cap[cap_id].value || + !inst->capabilities->cap[CSC].value) { + i_vpr_h(inst, + "%s: ignored as custom martix %u, csc %u\n", + __func__, inst->capabilities->cap[cap_id].value, + inst->capabilities->cap[CSC].value); + return 0; + } + + /* + * first 2 u32's of payload in each case are for + * row and column count, next remaining u32's are + * for the actual payload values. + */ + + /* set custom matrix */ + matrix_payload[0] = 3; + matrix_payload[1] = 3; + + for(i = 0; i < MAX_MATRIX_COEFFS; i++) { + if ((i + 2) >= ARRAY_SIZE(matrix_payload)) + break; + matrix_payload[i + 2] = + csc_coeff->vpe_csc_custom_matrix_coeff[i]; + } + + rc = msm_venc_set_csc_coeff(inst, "CSC_CUSTOM_MATRIX", + HFI_PROP_CSC_MATRIX, &matrix_payload[0], + ARRAY_SIZE(matrix_payload) * sizeof(s32), + matrix_payload[0], matrix_payload[1]); + if (rc) + return rc; + + /* set csc bias */ + csc_bias_payload[0] = 1; + csc_bias_payload[1] = 3; + + for(i = 0; i < MAX_BIAS_COEFFS; i++) { + if ((i + 2) >= ARRAY_SIZE(csc_bias_payload)) + break; + csc_bias_payload[i + 2] = + csc_coeff->vpe_csc_custom_bias_coeff[i]; + } + + rc = msm_venc_set_csc_coeff(inst, "CSC_BIAS", + HFI_PROP_CSC_BIAS, &csc_bias_payload[0], + ARRAY_SIZE(csc_bias_payload) * sizeof(s32), + csc_bias_payload[0], csc_bias_payload[1]); + if (rc) + return rc; + + /* set csc limit */ + csc_limit_payload[0] = 1; + csc_limit_payload[1] = 6; + + for(i = 0; i < MAX_LIMIT_COEFFS; i++) { + if ((i + 2) >= ARRAY_SIZE(csc_limit_payload)) + break; + csc_limit_payload[i + 2] = + csc_coeff->vpe_csc_custom_limit_coeff[i]; + } + + rc = msm_venc_set_csc_coeff(inst, "CSC_LIMIT", + HFI_PROP_CSC_LIMIT, &csc_limit_payload[0], + ARRAY_SIZE(csc_limit_payload) * sizeof(s32), + csc_limit_payload[0], csc_limit_payload[1]); + if (rc) + return rc; + + return rc; +} + int msm_vidc_set_q16(void *instance, enum msm_vidc_inst_capability_type cap_id) { From cc037ae3dedef82f3b6cfb23481e998cda59fecc Mon Sep 17 00:00:00 2001 From: Vikash Garodia Date: Wed, 19 May 2021 14:10:06 +0530 Subject: [PATCH 0296/1061] waipio: driver: Fix decoder log during low latency In low latency mode, for a decode session, low latency is being configured properly. But the log still indicates that low latency is not enabled. The change fixes the same. Change-Id: I65a88fb6dff639dd78522316e839fc05d43ec39c Signed-off-by: Vikash Garodia --- driver/variant/iris2/src/msm_vidc_iris2.c | 10 +--------- 1 file changed, 1 insertion(+), 9 deletions(-) diff --git a/driver/variant/iris2/src/msm_vidc_iris2.c b/driver/variant/iris2/src/msm_vidc_iris2.c index 15b52c4b45..53f71c9c61 100644 --- a/driver/variant/iris2/src/msm_vidc_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_iris2.c @@ -518,7 +518,6 @@ int msm_vidc_decide_work_mode_iris2(struct msm_vidc_inst* inst) struct v4l2_format* inp_f; u32 width, height; bool res_ok = false; - bool lowlatency = false; if (!inst || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); @@ -552,13 +551,10 @@ int msm_vidc_decide_work_mode_iris2(struct msm_vidc_inst* inst) if (res_ok && (inst->capabilities->cap[LOWLATENCY_MODE].value)) { work_mode = MSM_VIDC_STAGE_1; - /* For WORK_MODE_1, set Low Latency mode by default */ - lowlatency = true; } if (inst->capabilities->cap[LOSSLESS].value) { /*TODO Set 2 stage in case of ALL INTRA */ work_mode = MSM_VIDC_STAGE_2; - lowlatency = false; } } else { @@ -568,13 +564,9 @@ int msm_vidc_decide_work_mode_iris2(struct msm_vidc_inst* inst) exit: i_vpr_h(inst, "Configuring work mode = %u low latency = %u", - work_mode, lowlatency); + work_mode, inst->capabilities->cap[LOWLATENCY_MODE].value); msm_vidc_update_cap_value(inst, STAGE, work_mode, __func__); - /* TODO If Encode then Set Low Latency (Enable/Disable) - * and Update internal cap struct - */ - return 0; } From 53578c8ec2b2984b73f1e50a03af74694455ee3e Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Wed, 19 May 2021 12:18:58 +0530 Subject: [PATCH 0297/1061] video: driver: fix core lock acquire and release sequence [1] Added return type to strict_check() api and bail out if strict_check fails. [2] Fix all the failures with #1. [3] Added WARN_ON() for strict_check failure. [4] Ensured &core->lock is acquired before calling below api's. - __write_register - __write_register_masked - __iface_cmdq_write_relaxed - __suspend - __resume - venus_hfi_core_init - venus_hfi_core_deinit. Change-Id: I7f0a3ca6c2aec2758220c90bff9260367f10820b Signed-off-by: Govindaraj Rajagopal --- driver/platform/waipio/src/msm_vidc_waipio.c | 1 - driver/variant/iris2/src/msm_vidc_iris2.c | 108 ++++++++++---- driver/vidc/inc/msm_vidc_debug.h | 5 - driver/vidc/inc/msm_vidc_internal.h | 1 - driver/vidc/inc/venus_hfi.h | 2 +- driver/vidc/src/msm_vidc_driver.c | 33 +++-- driver/vidc/src/msm_vidc_probe.c | 2 +- driver/vidc/src/venus_hfi.c | 146 ++++++++++++------- 8 files changed, 194 insertions(+), 104 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 91edd95641..d4f5cb15ad 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -73,7 +73,6 @@ static struct msm_platform_core_capability core_data_waipio[] = { {HW_RESPONSE_TIMEOUT, HW_RESPONSE_TIMEOUT_VALUE}, /* 1000 ms */ {SW_PC_DELAY, SW_PC_DELAY_VALUE }, /* 1500 ms (>HW_RESPONSE_TIMEOUT)*/ {FW_UNLOAD_DELAY, FW_UNLOAD_DELAY_VALUE }, /* 3000 ms (>SW_PC_DELAY)*/ - {DEBUG_TIMEOUT, 0}, // TODO: review below entries, and if required rename as PREFETCH {PREFIX_BUF_COUNT_PIX, 18}, {PREFIX_BUF_SIZE_PIX, 13434880}, /* Calculated by VIDEO_RAW_BUFFER_SIZE for 4096x2160 UBWC */ diff --git a/driver/variant/iris2/src/msm_vidc_iris2.c b/driver/variant/iris2/src/msm_vidc_iris2.c index 15b52c4b45..8659de1aa8 100644 --- a/driver/variant/iris2/src/msm_vidc_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_iris2.c @@ -153,8 +153,9 @@ static int __interrupt_init_iris2(struct msm_vidc_core *vidc_core) { - u32 mask_val = 0; struct msm_vidc_core *core = vidc_core; + u32 mask_val = 0; + int rc = 0; if (!core) { d_vpr_e("%s: invalid params\n", __func__); @@ -167,7 +168,9 @@ static int __interrupt_init_iris2(struct msm_vidc_core *vidc_core) /* Write 0 to unmask CPU and WD interrupts */ mask_val &= ~(WRAPPER_INTR_MASK_A2HWD_BMSK_IRIS2| WRAPPER_INTR_MASK_A2HCPU_BMSK_IRIS2); - __write_register(core, WRAPPER_INTR_MASK_IRIS2, mask_val); + rc = __write_register(core, WRAPPER_INTR_MASK_IRIS2, mask_val); + if (rc) + return rc; return 0; } @@ -175,27 +178,50 @@ static int __interrupt_init_iris2(struct msm_vidc_core *vidc_core) static int __setup_ucregion_memory_map_iris2(struct msm_vidc_core *vidc_core) { struct msm_vidc_core *core = vidc_core; + u32 value; + int rc = 0; if (!core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - __write_register(core, UC_REGION_ADDR_IRIS2, - (u32)core->iface_q_table.align_device_addr); - __write_register(core, UC_REGION_SIZE_IRIS2, SHARED_QSIZE); - __write_register(core, QTBL_ADDR_IRIS2, - (u32)core->iface_q_table.align_device_addr); - __write_register(core, QTBL_INFO_IRIS2, 0x01); - /* update queues vaddr for debug purpose */ - __write_register(core, CPU_CS_VCICMDARG0_IRIS2, - (u32)((u64)core->iface_q_table.align_virtual_addr)); - __write_register(core, CPU_CS_VCICMDARG1_IRIS2, - (u32)((u64)core->iface_q_table.align_virtual_addr >> 32)); + value = (u32)core->iface_q_table.align_device_addr; + rc = __write_register(core, UC_REGION_ADDR_IRIS2, value); + if (rc) + return rc; - if(core->sfr.align_device_addr) - __write_register(core, SFR_ADDR_IRIS2, - (u32)core->sfr.align_device_addr + VIDEO_ARCH_LX); + value = SHARED_QSIZE; + rc = __write_register(core, UC_REGION_SIZE_IRIS2, value); + if (rc) + return rc; + + value = (u32)core->iface_q_table.align_device_addr; + rc = __write_register(core, QTBL_ADDR_IRIS2, value); + if (rc) + return rc; + + rc = __write_register(core, QTBL_INFO_IRIS2, 0x01); + if (rc) + return rc; + + /* update queues vaddr for debug purpose */ + value = (u32)((u64)core->iface_q_table.align_virtual_addr); + rc = __write_register(core, CPU_CS_VCICMDARG0_IRIS2, value); + if (rc) + return rc; + + value = (u32)((u64)core->iface_q_table.align_virtual_addr >> 32); + rc = __write_register(core, CPU_CS_VCICMDARG1_IRIS2, value); + if (rc) + return rc; + + if (core->sfr.align_device_addr) { + value = (u32)core->sfr.align_device_addr + VIDEO_ARCH_LX; + rc = __write_register(core, SFR_ADDR_IRIS2, value); + if (rc) + return rc; + } return 0; } @@ -204,6 +230,7 @@ static int __power_off_iris2(struct msm_vidc_core *vidc_core) { u32 lpi_status, reg_status = 0, count = 0, max_count = 10; struct msm_vidc_core *core = vidc_core; + int rc = 0; if (!core) { d_vpr_e("%s: invalid params\n", __func__); @@ -218,13 +245,18 @@ static int __power_off_iris2(struct msm_vidc_core *vidc_core) core->intr_status = 0; /* HPG 6.1.2 Step 1 */ - __write_register(core, CPU_CS_X2RPMh_IRIS2, 0x3); + rc = __write_register(core, CPU_CS_X2RPMh_IRIS2, 0x3); + if (rc) + return rc; /* HPG 6.1.2 Step 2, noc to low power */ //if (core->res->vpu_ver == VPU_VERSION_IRIS2_1) // goto skip_aon_mvp_noc; - __write_register(core, AON_WRAPPER_MVP_NOC_LPI_CONTROL, 0x1); + rc = __write_register(core, AON_WRAPPER_MVP_NOC_LPI_CONTROL, 0x1); + if (rc) + return rc; + while (!reg_status && count < max_count) { lpi_status = __read_register(core, @@ -240,8 +272,10 @@ static int __power_off_iris2(struct msm_vidc_core *vidc_core) //skip_aon_mvp_noc: /* HPG 6.1.2 Step 3, debug bridge to low power */ - __write_register(core, - WRAPPER_DEBUG_BRIDGE_LPI_CONTROL_IRIS2, 0x7); + rc = __write_register(core, WRAPPER_DEBUG_BRIDGE_LPI_CONTROL_IRIS2, 0x7); + if (rc) + return rc; + reg_status = 0; count = 0; while ((reg_status != 0x7) && count < max_count) { @@ -257,8 +291,10 @@ static int __power_off_iris2(struct msm_vidc_core *vidc_core) d_vpr_e("DBLP Set: status %d\n", reg_status); /* HPG 6.1.2 Step 4, debug bridge to lpi release */ - __write_register(core, - WRAPPER_DEBUG_BRIDGE_LPI_CONTROL_IRIS2, 0x0); + rc = __write_register(core, WRAPPER_DEBUG_BRIDGE_LPI_CONTROL_IRIS2, 0x0); + if (rc) + return rc; + lpi_status = 0x1; count = 0; while (lpi_status && count < max_count) { @@ -348,14 +384,17 @@ skip_power_off: static int __raise_interrupt_iris2(struct msm_vidc_core *vidc_core) { struct msm_vidc_core *core = vidc_core; + int rc = 0; if (!core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - __write_register(core, CPU_IC_SOFTINT_IRIS2, - 1 << CPU_IC_SOFTINT_H2A_SHFT_IRIS2); + rc = __write_register(core, CPU_IC_SOFTINT_IRIS2, 1 << CPU_IC_SOFTINT_H2A_SHFT_IRIS2); + if (rc) + return rc; + return 0; } @@ -419,8 +458,9 @@ static int __noc_error_info_iris2(struct msm_vidc_core *vidc_core) static int __clear_interrupt_iris2(struct msm_vidc_core *vidc_core) { - u32 intr_status = 0, mask = 0; struct msm_vidc_core *core = vidc_core; + u32 intr_status = 0, mask = 0; + int rc = 0; if (!core) { d_vpr_e("%s: NULL core\n", __func__); @@ -441,7 +481,9 @@ static int __clear_interrupt_iris2(struct msm_vidc_core *vidc_core) core->spur_count++; } - __write_register(core, CPU_CS_A2HSOFTINTCLR_IRIS2, 1); + rc = __write_register(core, CPU_CS_A2HSOFTINTCLR_IRIS2, 1); + if (rc) + return rc; return 0; } @@ -459,7 +501,10 @@ static int __boot_firmware_iris2(struct msm_vidc_core *vidc_core) ctrl_init_val = BIT(0); - __write_register(core, CTRL_INIT_IRIS2, ctrl_init_val); + rc = __write_register(core, CTRL_INIT_IRIS2, ctrl_init_val); + if (rc) + return rc; + while (!ctrl_status && count < max_tries) { ctrl_status = __read_register(core, CTRL_STATUS_IRIS2); if ((ctrl_status & CTRL_ERROR_STATUS__M_IRIS2) == 0x4) { @@ -477,8 +522,13 @@ static int __boot_firmware_iris2(struct msm_vidc_core *vidc_core) } /* Enable interrupt before sending commands to venus */ - __write_register(core, CPU_CS_H2XSOFTINTEN_IRIS2, 0x1); - __write_register(core, CPU_CS_X2RPMh_IRIS2, 0x0); + rc = __write_register(core, CPU_CS_H2XSOFTINTEN_IRIS2, 0x1); + if (rc) + return rc; + + rc = __write_register(core, CPU_CS_X2RPMh_IRIS2, 0x0); + if (rc) + return rc; return rc; } diff --git a/driver/vidc/inc/msm_vidc_debug.h b/driver/vidc/inc/msm_vidc_debug.h index 72401092c6..1203cb17a6 100644 --- a/driver/vidc/inc/msm_vidc_debug.h +++ b/driver/vidc/inc/msm_vidc_debug.h @@ -115,11 +115,6 @@ enum vidc_msg_prio { } \ } while (0) -#define MSM_VIDC_ERROR(value) \ - do { if (value) \ - d_vpr_e("BugOn"); \ - } while (0) - enum msm_vidc_debugfs_event { MSM_VIDC_DEBUGFS_EVENT_ETB, MSM_VIDC_DEBUGFS_EVENT_EBD, diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index fbf7152057..ff6b76f3a3 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -317,7 +317,6 @@ enum msm_vidc_core_capability_type { FW_UNLOAD, FW_UNLOAD_DELAY, HW_RESPONSE_TIMEOUT, - DEBUG_TIMEOUT, PREFIX_BUF_COUNT_PIX, PREFIX_BUF_SIZE_PIX, PREFIX_BUF_COUNT_NON_PIX, diff --git a/driver/vidc/inc/venus_hfi.h b/driver/vidc/inc/venus_hfi.h index cb97b2fa9a..1557ad3312 100644 --- a/driver/vidc/inc/venus_hfi.h +++ b/driver/vidc/inc/venus_hfi.h @@ -57,7 +57,7 @@ void venus_hfi_work_handler(struct work_struct *work); void venus_hfi_pm_work_handler(struct work_struct *work); irqreturn_t venus_hfi_isr(int irq, void *data); -void __write_register(struct msm_vidc_core *core, +int __write_register(struct msm_vidc_core *core, u32 reg, u32 value); int __read_register(struct msm_vidc_core *core, u32 reg); int __iface_cmdq_write(struct msm_vidc_core *core, diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index b75c47b3f4..ab54e5e0aa 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -340,6 +340,23 @@ void print_vb2_buffer(const char *str, struct msm_vidc_inst *inst, } } +static void __fatal_error(bool fatal) +{ + WARN_ON(fatal); +} + +static int __strict_check(struct msm_vidc_core *core, const char *function) +{ + bool fatal = !mutex_is_locked(&core->lock); + + __fatal_error(fatal); + + if (fatal) + d_vpr_e("%s: strict check failed\n", function); + + return fatal ? -EINVAL : 0; +} + enum msm_vidc_buffer_type v4l2_type_to_driver(u32 type, const char *func) { enum msm_vidc_buffer_type buffer_type = 0; @@ -3996,18 +4013,6 @@ unlock: return rc; } -static void __fatal_error(struct msm_vidc_core *core, bool fatal) -{ - return; - fatal &= core->capabilities[HW_RESPONSE_TIMEOUT].value; - MSM_VIDC_ERROR(fatal); -} - -static void __strict_check(struct msm_vidc_core *core) -{ - __fatal_error(core, !mutex_is_locked(&core->lock)); -} - static int msm_vidc_core_init_wait(struct msm_vidc_core *core) { const int interval = 40; @@ -4018,7 +4023,9 @@ static int msm_vidc_core_init_wait(struct msm_vidc_core *core) return -EINVAL; } - __strict_check(core); + rc = __strict_check(core, __func__); + if (rc) + return rc; if (core->state != MSM_VIDC_CORE_INIT_WAIT) return 0; diff --git a/driver/vidc/src/msm_vidc_probe.c b/driver/vidc/src/msm_vidc_probe.c index c1b7e06282..5f7b5956fa 100644 --- a/driver/vidc/src/msm_vidc_probe.c +++ b/driver/vidc/src/msm_vidc_probe.c @@ -478,7 +478,7 @@ static int msm_vidc_probe(struct platform_device *pdev) } /* How did we end up here? */ - MSM_VIDC_ERROR(1); + WARN_ON(1); return -EINVAL; } diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index fafb990b69..eeda1b792b 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -175,16 +175,21 @@ static void __dump_packet(u8 *packet, const char *function, void *qinfo) } } -static void __fatal_error(struct msm_vidc_core *core, bool fatal) +static void __fatal_error(bool fatal) { - return; - fatal &= core->capabilities[HW_RESPONSE_TIMEOUT].value; - MSM_VIDC_ERROR(fatal); + WARN_ON(fatal); } -static void __strict_check(struct msm_vidc_core *core) +static int __strict_check(struct msm_vidc_core *core, const char *function) { - __fatal_error(core, !mutex_is_locked(&core->lock)); + bool fatal = !mutex_is_locked(&core->lock); + + __fatal_error(fatal); + + if (fatal) + d_vpr_e("%s: strict check failed\n", function); + + return fatal ? -EINVAL : 0; } bool __core_in_valid_state(struct msm_vidc_core *core) @@ -202,11 +207,14 @@ static bool __valdiate_session(struct msm_vidc_core *core, { bool valid = false; struct msm_vidc_inst *temp; + int rc = 0; if (!core || !inst) return false; - __strict_check(core); + rc = __strict_check(core, __func__); + if (rc) + return false; list_for_each_entry(temp, &core->instances, list) { if (temp == inst) { @@ -220,23 +228,25 @@ static bool __valdiate_session(struct msm_vidc_core *core, return valid; } -void __write_register(struct msm_vidc_core *core, +int __write_register(struct msm_vidc_core *core, u32 reg, u32 value) { u32 hwiosymaddr = reg; u8 *base_addr; + int rc = 0; if (!core) { d_vpr_e("%s: invalid params\n", __func__); - return; + return -EINVAL; } - __strict_check(core); + rc = __strict_check(core, __func__); + if (rc) + return rc; if (!core->power_enabled) { d_vpr_e("HFI Write register failed : Power is OFF\n"); - __fatal_error(core, true); - return; + return -EINVAL; } base_addr = core->register_base_addr; @@ -249,6 +259,8 @@ void __write_register(struct msm_vidc_core *core, * Memory barrier to make sure value is written into the register. */ wmb(); + + return rc; } /* @@ -256,24 +268,26 @@ void __write_register(struct msm_vidc_core *core, * only bits 0 & 4 will be updated with corresponding bits from value. To update * entire register with value, set mask = 0xFFFFFFFF. */ -void __write_register_masked(struct msm_vidc_core *core, +static int __write_register_masked(struct msm_vidc_core *core, u32 reg, u32 value, u32 mask) { u32 prev_val, new_val; u8 *base_addr; + int rc = 0; if (!core) { d_vpr_e("%s: invalid params\n", __func__); - return; + return -EINVAL; } - __strict_check(core); + rc = __strict_check(core, __func__); + if (rc) + return rc; if (!core->power_enabled) { d_vpr_e("%s: register write failed, power is off\n", __func__); - __fatal_error(core, true); - return; + return -EINVAL; } base_addr = core->register_base_addr; @@ -294,6 +308,8 @@ void __write_register_masked(struct msm_vidc_core *core, * Memory barrier to make sure value is written into the register. */ wmb(); + + return rc; } int __read_register(struct msm_vidc_core *core, u32 reg) @@ -306,11 +322,8 @@ int __read_register(struct msm_vidc_core *core, u32 reg) return -EINVAL; } - __strict_check(core); - if (!core->power_enabled) { d_vpr_e("HFI Read register failed : Power is OFF\n"); - __fatal_error(core, true); return -EINVAL; } @@ -401,7 +414,7 @@ static int __acquire_regulator(struct msm_vidc_core *core, if (!regulator_is_enabled(rinfo->regulator)) { d_vpr_e("%s: Regulator is not enabled %s\n", __func__, rinfo->name); - __fatal_error(core, true); + __fatal_error(true); } } @@ -436,7 +449,7 @@ static int __hand_off_regulator(struct msm_vidc_core *core, if (!regulator_is_enabled(rinfo->regulator)) { d_vpr_e("%s: Regulator is not enabled %s\n", __func__, rinfo->name); - __fatal_error(core, true); + __fatal_error(true); } } @@ -467,22 +480,26 @@ err_reg_handoff_failed: return rc; } -static void __set_registers(struct msm_vidc_core *core) +static int __set_registers(struct msm_vidc_core *core) { struct reg_set *reg_set; - int i; + int i, rc = 0; if (!core || !core->dt) { d_vpr_e("core resources null, cannot set registers\n"); - return; + return -EINVAL; } reg_set = &core->dt->reg_set; for (i = 0; i < reg_set->count; i++) { - __write_register_masked(core, reg_set->reg_tbl[i].reg, + rc = __write_register_masked(core, reg_set->reg_tbl[i].reg, reg_set->reg_tbl[i].value, reg_set->reg_tbl[i].mask); + if (rc) + return rc; } + + return rc; } static int __vote_bandwidth(struct bus_info *bus, @@ -864,7 +881,7 @@ static int __iface_cmdq_write_relaxed(struct msm_vidc_core *core, { struct msm_vidc_iface_q_info *q_info; //struct vidc_hal_cmd_pkt_hdr *cmd_packet; - int result = -E2BIG; + int rc = -E2BIG; if (!core || !pkt) { d_vpr_e("%s: invalid params %pK %pK\n", @@ -872,11 +889,13 @@ static int __iface_cmdq_write_relaxed(struct msm_vidc_core *core, return -EINVAL; } - __strict_check(core); + rc = __strict_check(core, __func__); + if (rc) + return rc; if (!__core_in_valid_state(core)) { d_vpr_e("%s: fw not in init state\n", __func__); - result = -EINVAL; + rc = -EINVAL; goto err_q_null; } @@ -891,7 +910,7 @@ static int __iface_cmdq_write_relaxed(struct msm_vidc_core *core, if (!q_info->q_array.align_virtual_addr) { d_vpr_e("cannot write to shared CMD Q's\n"); - result = -ENODATA; + rc = -ENODATA; goto err_q_null; } @@ -902,14 +921,14 @@ static int __iface_cmdq_write_relaxed(struct msm_vidc_core *core, if (!__write_queue(q_info, (u8 *)pkt, requires_interrupt)) { __schedule_power_collapse_work(core); - result = 0; + rc = 0; } else { d_vpr_e("__iface_cmdq_write: queue full\n"); } err_q_write: err_q_null: - return result; + return rc; } int __iface_cmdq_write(struct msm_vidc_core *core, @@ -947,8 +966,6 @@ int __iface_msgq_read(struct msm_vidc_core *core, void *pkt) return -EINVAL; } - __strict_check(core); - if (!__core_in_valid_state(core)) { d_vpr_e("%s: fw not in init state\n", __func__); rc = -EINVAL; @@ -989,8 +1006,6 @@ int __iface_dbgq_read(struct msm_vidc_core *core, void *pkt) return -EINVAL; } - __strict_check(core); - q_info = &core->iface_queues[VIDC_IFACEQ_DBGQ_IDX]; if (!q_info->q_array.align_virtual_addr) { d_vpr_e("cannot read from shared DBG Q's\n"); @@ -1840,7 +1855,7 @@ static int __disable_regulator(struct regulator_info *rinfo, disable_regulator_failed: /* Bring attention to this issue */ - __fatal_error(core, true); + __fatal_error(true); return rc; } @@ -2010,7 +2025,7 @@ static int __enable_subcaches(struct msm_vidc_core *core) if (rc) { d_vpr_e("Failed to activate %s: %d\n", sinfo->name, rc); - __fatal_error(core, true); + __fatal_error(true); goto err_activate_fail; } sinfo->isactive = true; @@ -2209,6 +2224,10 @@ static int __suspend(struct msm_vidc_core *core) return 0; } + rc = __strict_check(core, __func__); + if (rc) + return rc; + d_vpr_h("Entering suspend\n"); rc = __tzbsp_set_video_state(TZBSP_VIDEO_STATE_SUSPEND); @@ -2241,6 +2260,10 @@ static int __resume(struct msm_vidc_core *core) return -EINVAL; } + rc = __strict_check(core, __func__); + if (rc) + return rc; + d_vpr_h("Resuming from power collapse\n"); rc = __venus_power_on(core); if (rc) { @@ -2698,6 +2721,7 @@ void venus_hfi_work_handler(struct work_struct *work) num_responses = __response_handler(core); err_no_work: + if (!call_venus_op(core, watchdog, core, core->intr_status)) enable_irq(core->dt->irq); } @@ -2792,7 +2816,9 @@ int venus_hfi_core_init(struct msm_vidc_core *core) } d_vpr_h("%s(): core %pK\n", __func__, core); - __strict_check(core); + rc = __strict_check(core, __func__); + if (rc) + return rc; core->handoff_done = 0; @@ -2840,12 +2866,17 @@ error: int venus_hfi_core_deinit(struct msm_vidc_core *core) { + int rc = 0; + if (!core) { d_vpr_h("%s(): invalid params\n", __func__); return -EINVAL; } d_vpr_h("%s(): core %pK\n", __func__, core); - __strict_check(core); + rc = __strict_check(core, __func__); + if (rc) + return rc; + if (core->state == MSM_VIDC_CORE_DEINIT) return 0; __resume(core); @@ -2917,6 +2948,7 @@ int venus_hfi_trigger_ssr(struct msm_vidc_core *core, u32 type, return -EINVAL; } + core_lock(core, __func__); payload[0] = client_id << 4 | type; payload[1] = addr; @@ -2924,7 +2956,7 @@ int venus_hfi_trigger_ssr(struct msm_vidc_core *core, u32 type, 0 /*session_id*/, core->header_id++); if (rc) - goto err_ssr_pkt; + goto unlock; /* HFI_CMD_SSR */ rc = hfi_create_packet(core->packet, core->packet_size, @@ -2936,16 +2968,17 @@ int venus_hfi_trigger_ssr(struct msm_vidc_core *core, u32 type, core->packet_id++, &payload, sizeof(u64)); if (rc) - goto err_ssr_pkt; + goto unlock; rc = __iface_cmdq_write(core, core->packet); if (rc) - return rc; + goto unlock; - return 0; +unlock: + core_unlock(core, __func__); + if (rc) + d_vpr_e("%s(): failed\n", __func__); -err_ssr_pkt: - d_vpr_e("%s: create packet failed\n", __func__); return rc; } @@ -2987,7 +3020,7 @@ int venus_hfi_session_open(struct msm_vidc_inst *inst) unlock: core_unlock(core, __func__); - return 0; + return rc; } int venus_hfi_session_set_codec(struct msm_vidc_inst *inst) @@ -3087,11 +3120,12 @@ int venus_hfi_session_close(struct msm_vidc_inst *inst) return -EINVAL; } core = inst->core; + core_lock(core, __func__); - __strict_check(core); - - if (!__valdiate_session(core, inst, __func__)) - return -EINVAL; + if (!__valdiate_session(core, inst, __func__)) { + rc = -EINVAL; + goto unlock; + } rc = hfi_packet_session_command(inst, HFI_CMD_CLOSE, @@ -3103,9 +3137,15 @@ int venus_hfi_session_close(struct msm_vidc_inst *inst) HFI_PAYLOAD_NONE, NULL, 0); - if (!rc) - rc = __iface_cmdq_write(inst->core, inst->packet); + if (rc) + goto unlock; + rc = __iface_cmdq_write(inst->core, inst->packet); + if (rc) + goto unlock; + +unlock: + core_unlock(core, __func__); return rc; } From 7f084e9a182e6ccffb6d89a331eff2c79b542302 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Thu, 20 May 2021 15:07:51 +0530 Subject: [PATCH 0298/1061] video: driver: add additional profile support for image session Added main & main10 profile support for HEIC image session. Change-Id: I738c6e55c361bdccac7c4d1165abcf9363d80eb7 Signed-off-by: Govindaraj Rajagopal --- driver/platform/waipio/src/msm_vidc_waipio.c | 14 +------------- driver/vidc/src/msm_vidc_control.c | 10 ++++------ 2 files changed, 5 insertions(+), 19 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 91edd95641..61df7a851c 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -930,7 +930,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {ENTROPY_MODE}, NULL, msm_vidc_set_u32_enum}, - {PROFILE, ENC|DEC, HEVC, + {PROFILE, ENC|DEC, HEVC|HEIC, V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN, V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE, BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN) | @@ -1428,18 +1428,6 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { CAP_FLAG_ROOT, {0}, {PROFILE}}, - {PROFILE, ENC|DEC, HEIC, - V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE, - V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE, - BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE) | - BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE), - V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE, - V4L2_CID_MPEG_VIDEO_HEVC_PROFILE, - HFI_PROP_PROFILE, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {PIX_FMTS}, - {0}, - msm_vidc_adjust_profile, msm_vidc_set_u32_enum}, {HEVC_TIER, ENC|DEC, HEIC, V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 059c31b72f..3a9572972c 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -936,12 +936,10 @@ int msm_vidc_adjust_profile(void *instance, struct v4l2_ctrl *ctrl) adjusted_value = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10; } else { /* 8 bit profile for 8 bit color format */ - if (adjusted_value == V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10) { - if (is_image_session(inst)) - adjusted_value = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE; - else - adjusted_value = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN; - } + if (is_image_session(inst)) + adjusted_value = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE; + else + adjusted_value = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN; } msm_vidc_update_cap_value(inst, PROFILE, From 4eda00e068fce9a3dc0414c9d41c1bebff9ee2d1 Mon Sep 17 00:00:00 2001 From: Mihir Ganu Date: Wed, 19 May 2021 15:20:47 -0700 Subject: [PATCH 0299/1061] video: driver: Update MBPF session admission check Update session admission check to enforce max MBPF limit by considering both realtime and non-realtime sessions. Change-Id: I2556a6d7e4220f3151406febef3f0ebde9b4a20b Signed-off-by: Mihir Ganu --- driver/vidc/src/msm_vidc_driver.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index b75c47b3f4..983975ccdb 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -4935,10 +4935,9 @@ static int msm_vidc_check_mbpf_supported(struct msm_vidc_inst *inst) if (instance->state == MSM_VIDC_ERROR) continue; - /* ignore thumbnail, image, and non realtime sessions */ + /* ignore thumbnail and image sessions */ if (is_thumbnail_session(instance) || - is_image_session(instance) || - !is_realtime_session(instance)) + is_image_session(instance)) continue; mbpf += msm_vidc_get_mbs_per_frame(instance); From ec5c6643a3f3d36da20fa9df7b5894c6f2af208e Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Tue, 18 May 2021 17:33:50 -0700 Subject: [PATCH 0300/1061] video: driver: update removable buffer condition added condition that a buffer should not be present in release list while removing excessive mappings. Change-Id: Ib74396ab20720399f4a077fbbc23b97f11f439d7 Signed-off-by: Darshana Patil --- driver/vidc/src/msm_vdec.c | 23 ++++++++++++++++------- 1 file changed, 16 insertions(+), 7 deletions(-) diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index d2683511f0..76d3aab3ea 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -1855,7 +1855,7 @@ static bool is_valid_removable_buffer(struct msm_vidc_inst *inst, struct msm_vidc_map *map) { bool found = false; - struct msm_vidc_buffer *ro_buf; + struct msm_vidc_buffer *buf; if (!inst || !map) { d_vpr_e("%s: invalid params\n", __func__); @@ -1865,8 +1865,15 @@ static bool is_valid_removable_buffer(struct msm_vidc_inst *inst, if (map->refcount != 1) return false; - list_for_each_entry(ro_buf, &inst->buffers.read_only.list, list) { - if (map->device_addr == ro_buf->device_addr) { + list_for_each_entry(buf, &inst->buffers.read_only.list, list) { + if (map->device_addr == buf->device_addr) { + found = true; + break; + } + } + + list_for_each_entry(buf, &inst->buffers.release.list, list) { + if (map->device_addr == buf->device_addr) { found = true; break; } @@ -1891,9 +1898,9 @@ static int msm_vidc_unmap_excessive_mappings(struct msm_vidc_inst *inst) /* * count entries from map list which are not present in - * read_only buffers list and whose refcount is 1. - * these are excess mappings present due to delayed - * unmap feature. + * read_only buffers list, not present in release list + * and whose refcount is 1.these are excess mappings + * present due to delayed unmap feature. */ list_for_each_entry(map, &inst->mappings.output.list, list) { if (is_valid_removable_buffer(inst, map)) @@ -1910,7 +1917,9 @@ static int msm_vidc_unmap_excessive_mappings(struct msm_vidc_inst *inst) "%s: type %11s, device_addr %#x, refcount %d, region %d\n", __func__, buf_name(map->type), map->device_addr, map->refcount, map->region); - msm_vidc_memory_unmap(inst->core, map); + rc = msm_vidc_put_delayed_unmap(inst, map); + if (rc) + return rc; } } return rc; From c897e250bd2cacb1d0d4094836c324c076d94c9a Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Thu, 20 May 2021 17:44:29 -0700 Subject: [PATCH 0301/1061] video: driver: reject odd resolution for encode sessions reject odd resolution for encode session only. Change-Id: I197688edb9e7f40d8b43524f7423ba52bb738cc2 Signed-off-by: Darshana Patil --- driver/vidc/src/msm_vidc_driver.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index b75c47b3f4..1a4bb2970a 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -5142,7 +5142,8 @@ int msm_vidc_check_session_supported(struct msm_vidc_inst *inst) } /* reject odd resolution session */ - if (is_odd(iwidth) || is_odd(iheight) || is_odd(owidth) || is_odd(oheight)) { + if (is_encode_session(inst) && + (is_odd(iwidth) || is_odd(iheight) || is_odd(owidth) || is_odd(oheight))) { i_vpr_e(inst, "resolution is not even. input [%u x %u], output [%u x %u]\n", iwidth, iheight, owidth, oheight); goto exit; From 2fa47b832d8453318abc603d59ede3088add5eff Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Thu, 20 May 2021 17:49:42 -0700 Subject: [PATCH 0302/1061] video: driver: printk fault from __load_fw_to_memory fix printk fault from __load_fw_to_memory. Change-Id: I50a8594f99b478cb5e9d6859c2212afd238cf1e8 Signed-off-by: Darshana Patil --- driver/vidc/src/venus_hfi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index fafb990b69..a8304b1bd7 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -2513,7 +2513,7 @@ static int __load_fw_to_memory(struct platform_device *pdev, rc = request_firmware(&firmware, firmware_name, &pdev->dev); if (rc) { d_vpr_e("%s: failed to request fw \"%s\", error %d\n", - __func__, rc, firmware_name); + __func__, firmware_name, rc); goto exit; } From edce8f49c939f58584037df17a94493d1ca80332 Mon Sep 17 00:00:00 2001 From: Vikash Garodia Date: Fri, 21 May 2021 10:44:52 +0530 Subject: [PATCH 0303/1061] driver: waipio: allow higher fps rate Driver would allow clients to set any value for rate during static state. In dynamic state, if the rate value is such that it crosses the maximum supported load, the setting is rejeceted. Again the rejection is only for realtime session. Change-Id: Iaeb786243fe4ca61f9e6f671a24a09dc98eaabfa Signed-off-by: Vikash Garodia --- driver/vidc/src/msm_vdec.c | 9 --------- 1 file changed, 9 deletions(-) diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index d2683511f0..9a064a5fa2 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -2297,15 +2297,6 @@ int msm_vdec_s_param(struct msm_vidc_inst *inst, input_rate = (u64)USEC_PER_SEC; do_div(input_rate, us_per_frame); - /* Check max allowed rate */ - if (input_rate > max_rate) { - i_vpr_e(inst, - "%s: Unsupported rate %llu, max_fps %u, type: %u\n", - __func__, input_rate, max_rate, s_parm->type); - rc = -ENOTSUPP; - goto exit; - } - set_default: q16_rate = (u32)input_rate << 16; i_vpr_h(inst, "%s: %s value %d\n", From d538a9ff9965a1694c35680aad82a21313ea6200 Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Thu, 20 May 2021 16:55:37 -0700 Subject: [PATCH 0304/1061] video: driver: optimise release buffer function Do not unmap buffers when firmware sends release done. Only delete these buffers from release list. Unmap buffers when removing stale entries from mappings list. update max dpb count to 32 and host buf count to 128. Change-Id: I71fc3f722f068d8f2eeeb81041d4e495092c254f Signed-off-by: Darshana Patil --- driver/vidc/inc/msm_vidc_internal.h | 10 +++--- driver/vidc/src/msm_vdec.c | 51 +++++++++-------------------- 2 files changed, 21 insertions(+), 40 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index ff6b76f3a3..10efeee36e 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -43,7 +43,7 @@ #define MAX_CAP_CHILDREN 16 #define DEFAULT_BITSTREM_ALIGNMENT 16 #define H265_BITSTREM_ALIGNMENT 32 -#define DEFAULT_MAX_HOST_BUF_COUNT 64 +#define DEFAULT_MAX_HOST_BUF_COUNT 128 #define DEFAULT_MAX_HOST_BURST_BUF_COUNT 256 #define BIT_DEPTH_8 (8 << 16 | 8) #define BIT_DEPTH_10 (10 << 16 | 10) @@ -127,15 +127,15 @@ * which might have many output buffers. */ #define MAX_MAPPED_OUTPUT_COUNT 64 +#define MAX_DPB_COUNT 32 /* - * max dpb count = 16 + * max dpb count in firmware = 16 * each dpb: 4 words - * dpb list array size = 16 * 4 * dpb payload size = 16 * 4 * 4 */ -#define MAX_DPB_COUNT 64 -#define MAX_DPB_LIST_ARRAY_SIZE (MAX_DPB_COUNT * 4) -#define MAX_DPB_LIST_PAYLOAD_SIZE (MAX_DPB_COUNT * 4 * 4) +#define MAX_DPB_LIST_ARRAY_SIZE (16 * 4) +#define MAX_DPB_LIST_PAYLOAD_SIZE (16 * 4 * 4) enum msm_vidc_domain_type { MSM_VIDC_ENCODER = BIT(0), diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 76d3aab3ea..9c453007b2 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -1801,7 +1801,7 @@ static int msm_vdec_release_nonref_buffers(struct msm_vidc_inst *inst) list_for_each_entry(rel_buf, &inst->buffers.release.list, list) { /* fw needs RO flag for FTB release buffer */ rel_buf->attr |= MSM_VIDC_ATTR_READ_ONLY; - print_vidc_buffer(VIDC_HIGH, "high", "release buf", inst, rel_buf); + print_vidc_buffer(VIDC_LOW, "low ", "release buf", inst, rel_buf); rc = venus_hfi_release_buffer(inst, rel_buf); if (rc) return rc; @@ -1814,36 +1814,13 @@ int msm_vdec_handle_release_buffer(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buf) { int rc = 0; - struct msm_vidc_map *map; - bool found; if (!inst || !buf) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - print_vidc_buffer(VIDC_HIGH, "high", "release done", inst, buf); - - found = false; - list_for_each_entry(map, &inst->mappings.output.list, list) { - if (map->device_addr == buf->device_addr) { - found = true; - break; - } - } - if (found) { - /* - * finally remove mappings if no one using it. - * refcount will be more than 1 if anyone using it. - */ - if (map->refcount == 1) { - rc = msm_vidc_put_delayed_unmap(inst, map); - if (rc) - print_vidc_buffer(VIDC_ERR, "err ", - "delayed unmap failed", inst, buf); - } - } - + print_vidc_buffer(VIDC_LOW, "low ", "release done", inst, buf); /* delete the buffer from release list */ list_del(&buf->list); msm_vidc_put_vidc_buffer(inst, buf); @@ -1888,7 +1865,7 @@ static bool is_valid_removable_buffer(struct msm_vidc_inst *inst, static int msm_vidc_unmap_excessive_mappings(struct msm_vidc_inst *inst) { int rc = 0; - struct msm_vidc_map *map; + struct msm_vidc_map *map, *temp; u32 refcount_one_bufs_count = 0; if (!inst) { @@ -1911,12 +1888,12 @@ static int msm_vidc_unmap_excessive_mappings(struct msm_vidc_inst *inst) return 0; /* unmap these buffers as they are stale entries */ - list_for_each_entry(map, &inst->mappings.output.list, list) { + list_for_each_entry_safe(map, temp, &inst->mappings.output.list, list) { if (is_valid_removable_buffer(inst, map)) { - d_vpr_h( + i_vpr_l(inst, "%s: type %11s, device_addr %#x, refcount %d, region %d\n", - __func__, buf_name(map->type), map->device_addr, map->refcount, - map->region); + __func__, buf_name(map->type), map->device_addr, + map->refcount, map->region); rc = msm_vidc_put_delayed_unmap(inst, map); if (rc) return rc; @@ -1940,10 +1917,6 @@ int msm_vdec_qbuf(struct msm_vidc_inst *inst, struct vb2_buffer *vb2) if (rc) return rc; } - - rc = msm_vidc_unmap_excessive_mappings(inst); - if (rc) - return rc; } if (vb2->type == OUTPUT_META_PLANE) { @@ -1963,6 +1936,14 @@ int msm_vdec_qbuf(struct msm_vidc_inst *inst, struct vb2_buffer *vb2) rc = msm_vdec_qbuf_batch(inst, vb2); else rc = msm_vidc_queue_buffer_single(inst, vb2); + if (rc) + return rc; + + if (vb2->type == OUTPUT_MPLANE) { + rc = msm_vidc_unmap_excessive_mappings(inst); + if (rc) + return rc; + } return rc; } @@ -2585,4 +2566,4 @@ int msm_vdec_inst_deinit(struct msm_vidc_inst *inst) rc = msm_vidc_ctrl_deinit(inst); return rc; -} +} \ No newline at end of file From e54ba4a1300276f0eef25e07eae879a65625a3c9 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Fri, 21 May 2021 10:49:44 -0700 Subject: [PATCH 0305/1061] video: driver: Align hfi buffer macro file with CL: 30790445 Remove SE stats Buffer calculation to align hfi buffer macro file with CL: 30790445. Change-Id: Ia5db786e5ba1fddafe6c25555b3f45ea915b389e Signed-off-by: Akshata Sahukar --- driver/variant/iris2/inc/hfi_buffer_iris2.h | 58 ++++++--------------- 1 file changed, 15 insertions(+), 43 deletions(-) diff --git a/driver/variant/iris2/inc/hfi_buffer_iris2.h b/driver/variant/iris2/inc/hfi_buffer_iris2.h index ab617ae8ae..afc89b0764 100644 --- a/driver/variant/iris2/inc/hfi_buffer_iris2.h +++ b/driver/variant/iris2/inc/hfi_buffer_iris2.h @@ -1056,18 +1056,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ if ((size_aligned_width * size_aligned_height) > \ (3840 * 2160)) \ { \ - if (num_vpp_pipes == 4) \ - { \ - size_single_pipe_eval = bitbin_size / 4; \ - } \ - else if (num_vpp_pipes == 2) \ - { \ - size_single_pipe_eval = bitbin_size / 2; \ - } \ - else if (num_vpp_pipes == 1) \ - { \ - size_single_pipe_eval = bitbin_size; \ - } \ + size_single_pipe_eval = (bitbin_size / num_vpp_pipes); \ } \ else if (num_vpp_pipes > 2) \ { \ @@ -1112,11 +1101,19 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ total_bitbin_buffers = 1; \ bitbin_size = bitstream_size; \ } \ - SIZE_ENC_SINGLE_PIPE(size_single_pipe, rc_type, bitbin_size, \ - num_vpp_pipes, frame_width, frame_height, lcu_size); \ - bitbin_size = size_single_pipe * num_vpp_pipes; \ - _size = HFI_ALIGN(bitbin_size, VENUS_DMA_ALIGNMENT) * \ - total_bitbin_buffers + 512; \ + if (total_bitbin_buffers > 0) \ + { \ + SIZE_ENC_SINGLE_PIPE(size_single_pipe, rc_type, bitbin_size, \ + num_vpp_pipes, frame_width, frame_height, lcu_size); \ + bitbin_size = size_single_pipe * num_vpp_pipes; \ + _size = HFI_ALIGN(bitbin_size, VENUS_DMA_ALIGNMENT) * \ + total_bitbin_buffers + 512; \ + } \ + else \ + /* Avoid 512 Bytes allocation in case of 1Pipe HEVC Direct Mode*/\ + { \ + _size = 0; \ + } \ } while (0) #define HFI_BUFFER_BIN_H264E(_size, rc_type, frame_width, frame_height, \ @@ -1254,27 +1251,6 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define SIZE_LINE_BUF_SDE(frame_width_coded) HFI_ALIGN((256 + \ (16 * ((frame_width_coded) >> 4))), VENUS_DMA_ALIGNMENT) -#define SIZE_SE_STATS_BUF(_size, frame_width_coded, frame_height_coded, \ - num_lcu_in_frame) \ - do \ - { \ - if (((frame_width_coded) * (frame_height_coded)) > \ - (4096 * 2160)) \ - { \ - _size = 0; \ - } \ - else if (((frame_width_coded) * (frame_height_coded)) > \ - (1920 * 1088)) \ - { \ - _size = (40 * 4 * num_lcu_in_frame + 256 + 256); \ - } \ - else \ - { \ - _size = (1024 * num_lcu_in_frame + 256 + 256); \ - } \ - _size = HFI_ALIGN(se_stats_buf_size, VENUS_DMA_ALIGNMENT) * 2; \ - } while (0) - #define SIZE_BSE_SLICE_CMD_BUF ((((8192 << 2) + 7) & (~7)) * 6) #define SIZE_BSE_REG_BUF ((((512 << 3) + 7) & (~7)) * 4) #define SIZE_VPP_REG_BUF ((((HFI_VENUS_VPPSG_MAX_REGISTERS << 3) +\ @@ -1403,8 +1379,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ HFI_U32 width_in_lcus = 0, height_in_lcus = 0, \ frame_width_coded = 0, frame_height_coded = 0, \ num_lcu_in_frame = 0, num_lcumb = 0; \ - HFI_U32 frame_rc_buf_size = 0, \ - se_stats_buf_size = 0; \ + HFI_U32 frame_rc_buf_size = 0; \ width_in_lcus = ((frame_width) + (lcu_size)-1) / (lcu_size); \ height_in_lcus = ((frame_height) + (lcu_size)-1) / (lcu_size); \ num_lcu_in_frame = width_in_lcus * height_in_lcus; \ @@ -1414,15 +1389,12 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ ((frame_width_coded + lcu_size * 8) / lcu_size); \ SIZE_FRAME_RC_BUF_SIZE(frame_rc_buf_size, standard, \ frame_height_coded, num_vpp_pipes_enc); \ - SIZE_SE_STATS_BUF(se_stats_buf_size, frame_width_coded, \ - frame_height_coded, num_lcu_in_frame); \ _size = SIZE_ENC_SLICE_INFO_BUF(num_lcu_in_frame) + \ SIZE_SLICE_CMD_BUFFER + \ SIZE_SPS_PPS_SLICE_HDR + \ frame_rc_buf_size + \ ENC_BITCNT_BUF_SIZE(num_lcu_in_frame) + \ ENC_BITMAP_BUF_SIZE(num_lcu_in_frame) + \ - se_stats_buf_size + \ SIZE_BSE_SLICE_CMD_BUF + \ SIZE_BSE_REG_BUF + \ SIZE_VPP_REG_BUF + \ From 4e4e404c321d22c28e9ff7c0e9c8f1bffc0fdb2d Mon Sep 17 00:00:00 2001 From: Maheshwar Ajja Date: Fri, 21 May 2021 18:48:20 -0700 Subject: [PATCH 0306/1061] video: driver: avoid integer overflow issue Use u32 instead of int to avoid interger overflow. Change-Id: I4e2971a11074539d49d612a9ef1bda0502970afa Signed-off-by: Maheshwar Ajja --- driver/vidc/src/msm_vidc_power.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/driver/vidc/src/msm_vidc_power.c b/driver/vidc/src/msm_vidc_power.c index 879115566f..14a2cc7638 100644 --- a/driver/vidc/src/msm_vidc_power.c +++ b/driver/vidc/src/msm_vidc_power.c @@ -47,8 +47,8 @@ u64 msm_vidc_max_freq(struct msm_vidc_inst *inst) int msm_vidc_get_mbps(struct msm_vidc_inst *inst) { - int input_port_mbs, output_port_mbs; - int fps, operating_rate, frame_rate; + u32 input_port_mbs, output_port_mbs; + u32 fps, operating_rate, frame_rate; struct v4l2_format *f; f = &inst->fmts[INPUT_PORT]; @@ -65,7 +65,7 @@ int msm_vidc_get_mbps(struct msm_vidc_inst *inst) fps = max(operating_rate, frame_rate); /* In case of fps < 1 we assume 1 */ - fps = max(fps >> 16, 1); + fps = max(fps >> 16, (u32)1); return max(input_port_mbs, output_port_mbs) * fps; } From 702fe54c210c6b012445b754498540816435f7cc Mon Sep 17 00:00:00 2001 From: Mihir Ganu Date: Mon, 24 May 2021 11:52:18 -0700 Subject: [PATCH 0307/1061] video: driver: Always raise interrupt request Skip optimizations in read/write queues and always raise interrupt request. Change-Id: I36457e92f0a54b73af6d20748c9bb50bccdd6610 Signed-off-by: Mihir Ganu --- driver/vidc/src/venus_hfi.c | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index 9d4da155a0..5f1c1297cc 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -745,7 +745,7 @@ static int __write_queue(struct msm_vidc_iface_q_info *qinfo, u8 *packet, mb(); queue->qhdr_write_idx = new_write_idx; if (rx_req_is_set) - *rx_req_is_set = queue->qhdr_rx_req == 1; + *rx_req_is_set = true; /* * Memory barrier to make sure write index is updated before an * interrupt is raised on venus. @@ -853,10 +853,7 @@ static int __read_queue(struct msm_vidc_iface_q_info *qinfo, u8 *packet, rc = -ENODATA; } - if (new_read_idx != write_idx) - queue->qhdr_rx_req = 0; - else - queue->qhdr_rx_req = receive_request; + queue->qhdr_rx_req = receive_request; queue->qhdr_read_idx = new_read_idx; /* From e5ec6843e8b61732d8c51e9ee36881cf6fc6e2a1 Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Fri, 21 May 2021 10:42:31 -0700 Subject: [PATCH 0308/1061] video: driver: modify max mapped output count adjust MAX_MAP_OUTPUT_COUNT based on resolution to enhance performance and reduce memory pressure. - For 8K session: count = 20 - For 4K session: count = 32 - For 1080p session: count = 48 - For all remaining sessions: count = 64 reduce MAX_DPB_COUNT to 32. reduce DEFAULT_MAX_HOST_BUF_COUNT to 64. Change-Id: I0e6d25121947524b843e9cce96b75871aba174af Signed-off-by: Darshana Patil --- driver/variant/iris2/src/msm_vidc_iris2.c | 28 -------------- driver/vidc/inc/msm_vidc_driver.h | 4 ++ driver/vidc/inc/msm_vidc_inst.h | 1 + driver/vidc/inc/msm_vidc_internal.h | 12 ++---- driver/vidc/src/msm_vdec.c | 45 ++++++++++++++++++++++- driver/vidc/src/msm_vidc_driver.c | 28 ++++++++++++++ 6 files changed, 80 insertions(+), 38 deletions(-) diff --git a/driver/variant/iris2/src/msm_vidc_iris2.c b/driver/variant/iris2/src/msm_vidc_iris2.c index a6c5c36979..4f71d901bc 100644 --- a/driver/variant/iris2/src/msm_vidc_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_iris2.c @@ -533,34 +533,6 @@ static int __boot_firmware_iris2(struct msm_vidc_core *vidc_core) return rc; } -bool res_is_greater_than(u32 width, u32 height, - u32 ref_width, u32 ref_height) -{ - u32 num_mbs = NUM_MBS_PER_FRAME(height, width); - u32 max_side = max(ref_width, ref_height); - - if (num_mbs > NUM_MBS_PER_FRAME(ref_height, ref_width) || - width > max_side || - height > max_side) - return true; - else - return false; -} - -bool res_is_less_than_or_equal_to(u32 width, u32 height, - u32 ref_width, u32 ref_height) -{ - u32 num_mbs = NUM_MBS_PER_FRAME(height, width); - u32 max_side = max(ref_width, ref_height); - - if (num_mbs <= NUM_MBS_PER_FRAME(ref_height, ref_width) && - width <= max_side && - height <= max_side) - return true; - else - return false; -} - int msm_vidc_decide_work_mode_iris2(struct msm_vidc_inst* inst) { u32 work_mode; diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 2e77dcb7cf..9af63f97ee 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -405,5 +405,9 @@ int msm_vidc_flush_ts(struct msm_vidc_inst *inst); const char *buf_name(enum msm_vidc_buffer_type type); void msm_vidc_free_capabililty_list(struct msm_vidc_inst *inst, enum msm_vidc_ctrl_list_type list_type); +bool res_is_greater_than(u32 width, u32 height, + u32 ref_width, u32 ref_height); +bool res_is_less_than_or_equal_to(u32 width, u32 height, + u32 ref_width, u32 ref_height); #endif // _MSM_VIDC_DRIVER_H_ diff --git a/driver/vidc/inc/msm_vidc_inst.h b/driver/vidc/inc/msm_vidc_inst.h index 36d7096e0f..a666580500 100644 --- a/driver/vidc/inc/msm_vidc_inst.h +++ b/driver/vidc/inc/msm_vidc_inst.h @@ -153,5 +153,6 @@ struct msm_vidc_inst { bool vb2q_init; u32 max_input_data_size; u32 dpb_list_payload[MAX_DPB_LIST_ARRAY_SIZE]; + u32 max_map_output_count; }; #endif // _MSM_VIDC_INST_H_ diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 10efeee36e..556c6733b9 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -43,7 +43,7 @@ #define MAX_CAP_CHILDREN 16 #define DEFAULT_BITSTREM_ALIGNMENT 16 #define H265_BITSTREM_ALIGNMENT 32 -#define DEFAULT_MAX_HOST_BUF_COUNT 128 +#define DEFAULT_MAX_HOST_BUF_COUNT 64 #define DEFAULT_MAX_HOST_BURST_BUF_COUNT 256 #define BIT_DEPTH_8 (8 << 16 | 8) #define BIT_DEPTH_10 (10 << 16 | 10) @@ -119,14 +119,8 @@ #define HW_RESPONSE_TIMEOUT_VALUE (1000) #define SW_PC_DELAY_VALUE (HW_RESPONSE_TIMEOUT_VALUE + 500) #define FW_UNLOAD_DELAY_VALUE (SW_PC_DELAY_VALUE + 1500) -/* - * MAX_MAPPED_OUTPUT_COUNT: maximum mappings which can - * be present in output map list with refcount 1. These - * mappings exist due to delayed unmap feature. Current - * threshold is kept as 50 to handle vpp usecases - * which might have many output buffers. - */ -#define MAX_MAPPED_OUTPUT_COUNT 64 + +#define MAX_MAP_OUTPUT_COUNT 64 #define MAX_DPB_COUNT 32 /* * max dpb count in firmware = 16 diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index e27b94dc46..33d7deb82c 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -1625,6 +1625,44 @@ static int msm_vdec_subscribe_output_port_settings_change(struct msm_vidc_inst * return rc; } +static int msm_vdec_update_max_map_output_count(struct msm_vidc_inst *inst) +{ + int rc = 0; + struct v4l2_format *f; + u32 width, height, count; + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + f = &inst->fmts[OUTPUT_PORT]; + width = f->fmt.pix_mp.width; + height = f->fmt.pix_mp.height; + + /* + * adjust max map output count based on resolution + * to enhance performance. + * For 8K session: count = 20 + * For 4K session: count = 32 + * For 1080p session: count = 48 + * For all remaining sessions: count = 64 + */ + if (res_is_greater_than(width, height, 4096, 2160)) + count = 20; + else if (res_is_greater_than(width, height, 1920, 1080)) + count = 32; + else if (res_is_greater_than(width, height, 1280, 720)) + count = 48; + else + count = 64; + + inst->max_map_output_count = count; + i_vpr_h(inst, "%s: count: %d\n", __func__, inst->max_map_output_count); + + return rc; +} + int msm_vdec_streamon_output(struct msm_vidc_inst *inst) { int rc = 0; @@ -1642,6 +1680,10 @@ int msm_vdec_streamon_output(struct msm_vidc_inst *inst) return -EINVAL; } + rc = msm_vdec_update_max_map_output_count(inst); + if (rc) + return rc; + rc = msm_vdec_set_output_properties(inst); if (rc) goto error; @@ -1884,7 +1926,7 @@ static int msm_vidc_unmap_excessive_mappings(struct msm_vidc_inst *inst) refcount_one_bufs_count++; } - if (refcount_one_bufs_count <= MAX_MAPPED_OUTPUT_COUNT) + if (refcount_one_bufs_count <= inst->max_map_output_count) return 0; /* unmap these buffers as they are stale entries */ @@ -2528,6 +2570,7 @@ int msm_vdec_inst_init(struct msm_vidc_inst *inst) inst->buffers.output.min_count + inst->buffers.output.extra_count; inst->buffers.output.size = f->fmt.pix_mp.plane_fmt[0].sizeimage; + inst->max_map_output_count = MAX_MAP_OUTPUT_COUNT; f = &inst->fmts[OUTPUT_META_PORT]; f->type = OUTPUT_META_PLANE; diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 6019e44bc8..94aba9d51f 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -1027,6 +1027,34 @@ struct msm_vidc_allocations *msm_vidc_get_allocations( } } +bool res_is_greater_than(u32 width, u32 height, + u32 ref_width, u32 ref_height) +{ + u32 num_mbs = NUM_MBS_PER_FRAME(height, width); + u32 max_side = max(ref_width, ref_height); + + if (num_mbs > NUM_MBS_PER_FRAME(ref_height, ref_width) || + width > max_side || + height > max_side) + return true; + else + return false; +} + +bool res_is_less_than_or_equal_to(u32 width, u32 height, + u32 ref_width, u32 ref_height) +{ + u32 num_mbs = NUM_MBS_PER_FRAME(height, width); + u32 max_side = max(ref_width, ref_height); + + if (num_mbs <= NUM_MBS_PER_FRAME(ref_height, ref_width) && + width <= max_side && + height <= max_side) + return true; + else + return false; +} + int msm_vidc_change_core_state(struct msm_vidc_core *core, enum msm_vidc_core_state request_state, const char *func) { From 252625c6d0efa83d8f416ebd58211cab77b2f48a Mon Sep 17 00:00:00 2001 From: Vikash Garodia Date: Tue, 25 May 2021 14:39:39 +0530 Subject: [PATCH 0309/1061] driver: waipio: set static priority configuration to firmware Existing video driver expects session priority to be set explicitly during static configuration. CAP_ROOT is not enabled for decoders, hence explicit setting is needed. Change-Id: Id754b38f15e9e045d31797557a4a7aa7a296346e Signed-off-by: Vikash Garodia --- driver/vidc/inc/msm_vidc_control.h | 2 ++ driver/vidc/src/msm_vdec.c | 4 ++++ 2 files changed, 6 insertions(+) diff --git a/driver/vidc/inc/msm_vidc_control.h b/driver/vidc/inc/msm_vidc_control.h index 30515f2965..90db0b245b 100644 --- a/driver/vidc/inc/msm_vidc_control.h +++ b/driver/vidc/inc/msm_vidc_control.h @@ -92,6 +92,8 @@ int msm_vidc_set_pipe(void *instance, enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_csc_custom_matrix(void *instance, enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_session_priority(void* instance, + enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_s32(void *instance, enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_q16(void *instance, diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index e27b94dc46..8846a6a9c1 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -774,6 +774,10 @@ static int msm_vdec_set_output_properties(struct msm_vidc_inst *inst) if (rc) return rc; + rc = msm_vidc_set_session_priority(inst, PRIORITY); + if (rc) + return rc; + return rc; } From 079b161c6642c46295beb430a603bb4e40be57d5 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Tue, 25 May 2021 18:38:57 -0700 Subject: [PATCH 0310/1061] video: driver: modify VBV delay min value to 200 min VBV delay value supported is changed from 100 to 200 in firmware. Pick up the change in driver. Change-Id: I200bdd4c35aa463d64baee0fa2ca330dc1eb0ad2 Signed-off-by: Akshata Sahukar --- driver/platform/waipio/src/msm_vidc_waipio.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 2c2682231d..29fcfff1c3 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -569,7 +569,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { NULL, msm_vidc_set_vbr_related_properties}, {VBV_DELAY, ENC, H264|HEVC, - 100, 300, 100, 300, + 200, 300, 100, 300, V4L2_CID_MPEG_VIDEO_VBV_DELAY, HFI_PROP_VBV_DELAY, CAP_FLAG_OUTPUT_PORT, From b0e9eab96d6a438bf68c2508e10a1e08a9eb5620 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Wed, 26 May 2021 12:08:02 +0530 Subject: [PATCH 0311/1061] video: driver: treat sesion_open and session_close failure as fatal do core_deinit for sesion_open and session_close failures, to handle recurring clock prepare failure. Change-Id: I1c305f9e6269f7176b8283dbe91712f9e31448f5 Signed-off-by: Govindaraj Rajagopal --- driver/vidc/src/msm_vidc.c | 4 ++- driver/vidc/src/msm_vidc_driver.c | 2 +- driver/vidc/src/venus_hfi.c | 55 +++++++++++++++++++++---------- 3 files changed, 41 insertions(+), 20 deletions(-) diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index 53ed8193ee..34cb80e348 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -883,8 +883,10 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) msm_vidc_scale_power(inst, true); rc = msm_vidc_session_open(inst); - if (rc) + if (rc) { + msm_vidc_core_deinit(core, true); goto error; + } inst->debugfs_root = msm_vidc_debugfs_init_inst(inst, core->debugfs_root); diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 94aba9d51f..49d3a513ea 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -4032,7 +4032,7 @@ int msm_vidc_core_deinit(struct msm_vidc_core *core, bool force) /* unlink all sessions from core, if any */ list_for_each_entry_safe(inst, dummy, &core->instances, list) { msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); - list_del(&inst->list); + list_del_init(&inst->list); } msm_vidc_change_core_state(core, MSM_VIDC_CORE_DEINIT, __func__); diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index 5f1c1297cc..09dd851e9a 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -911,7 +911,8 @@ static int __iface_cmdq_write_relaxed(struct msm_vidc_core *core, goto err_q_null; } - if (__resume(core)) { + rc = __resume(core); + if (rc) { d_vpr_e("%s: Power on failed\n", __func__); goto err_q_write; } @@ -1092,14 +1093,18 @@ static int __sys_set_debug(struct msm_vidc_core *core, u32 debug) rc = hfi_packet_sys_debug_config(core, core->packet, core->packet_size, debug); - if (rc) { - d_vpr_e("Debug mode setting to FW failed\n"); - return -ENOTEMPTY; - } + if (rc) + goto exit; - if (__iface_cmdq_write(core, core->packet)) - return -ENOTEMPTY; - return 0; + rc = __iface_cmdq_write(core, core->packet); + if (rc) + goto exit; + +exit: + if (rc) + d_vpr_e("Debug mode setting to FW failed\n"); + + return rc; } /* static int __sys_set_coverage(struct msm_vidc_core *core, @@ -1529,7 +1534,7 @@ failed_to_reset: static int __prepare_enable_clks(struct msm_vidc_core *core) { - struct clock_info *cl = NULL, *cl_fail = NULL; + struct clock_info *cl = NULL; int rc = 0, c = 0; if (!core) { @@ -1555,7 +1560,6 @@ static int __prepare_enable_clks(struct msm_vidc_core *core) rc = clk_prepare_enable(cl->clk); if (rc) { d_vpr_e("Failed to enable clocks\n"); - cl_fail = cl; goto fail_clk_enable; } @@ -2697,7 +2701,7 @@ irqreturn_t venus_hfi_isr(int irq, void *data) void venus_hfi_work_handler(struct work_struct *work) { struct msm_vidc_core *core; - int num_responses = 0; + int num_responses = 0, rc = 0; d_vpr_l("%s()\n", __func__); core = container_of(work, struct msm_vidc_core, device_work); @@ -2707,7 +2711,8 @@ void venus_hfi_work_handler(struct work_struct *work) } core_lock(core, __func__); - if (__resume(core)) { + rc = __resume(core); + if (rc) { d_vpr_e("%s: Power on failed\n", __func__); core_unlock(core, __func__); goto err_no_work; @@ -2718,7 +2723,6 @@ void venus_hfi_work_handler(struct work_struct *work) num_responses = __response_handler(core); err_no_work: - if (!call_venus_op(core, watchdog, core, core->intr_status)) enable_irq(core->dt->irq); } @@ -2886,6 +2890,8 @@ int venus_hfi_core_deinit(struct msm_vidc_core *core) int venus_hfi_noc_error_info(struct msm_vidc_core *core) { + int rc = 0; + if (!core || !core->capabilities) { d_vpr_e("%s: Invalid parameters: %pK\n", __func__, core); @@ -2900,7 +2906,8 @@ int venus_hfi_noc_error_info(struct msm_vidc_core *core) goto unlock; /* resume venus before accessing noc registers */ - if (__resume(core)) { + rc = __resume(core); + if (rc) { d_vpr_e("%s: Power on failed\n", __func__); goto unlock; } @@ -2909,7 +2916,7 @@ int venus_hfi_noc_error_info(struct msm_vidc_core *core) unlock: core_unlock(core, __func__); - return 0; + return rc; } int venus_hfi_suspend(struct msm_vidc_core *core) @@ -3533,12 +3540,15 @@ int venus_hfi_scale_clocks(struct msm_vidc_inst* inst, u64 freq) core = inst->core; core_lock(core, __func__); - if (__resume(core)) { - i_vpr_e(inst, "Resume from power collapse failed\n"); - rc = -EINVAL; + rc = __resume(core); + if (rc) { + i_vpr_e(inst, "%s: Resume from power collapse failed\n", __func__); goto exit; } rc = __set_clocks(core, freq); + if (rc) + goto exit; + exit: core_unlock(core, __func__); @@ -3557,7 +3567,16 @@ int venus_hfi_scale_buses(struct msm_vidc_inst *inst, u64 bw_ddr, u64 bw_llcc) core = inst->core; core_lock(core, __func__); + rc = __resume(core); + if (rc) { + i_vpr_e(inst, "%s: Resume from power collapse failed\n", __func__); + goto exit; + } rc = __vote_buses(core, bw_ddr, bw_llcc); + if (rc) + goto exit; + +exit: core_unlock(core, __func__); return rc; From 63a42011b27c9e7f77e520f6ef681bdd1748864c Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Wed, 26 May 2021 09:40:55 +0530 Subject: [PATCH 0312/1061] video: driver: tune dcvs and batching buffer count [1] add dcvs cushion buffers, only if core supports dcvs [2] update buffer_count for dcvs & batching for priority static control. [3] add max_fps & max_mbpf checks to disable decode_batching. [4] add low_latency check in msm_vidc_allow_dcvs api. Change-Id: Iafb7ad4aa601a0a3753e30475a8709f261719b0c Signed-off-by: Govindaraj Rajagopal --- driver/vidc/src/msm_vdec.c | 2 ++ driver/vidc/src/msm_venc.c | 4 ++++ driver/vidc/src/msm_vidc_buffer.c | 10 ++++++---- driver/vidc/src/msm_vidc_control.c | 14 +++++++++++++- driver/vidc/src/msm_vidc_driver.c | 29 +++++++++++++++++++++++++++-- 5 files changed, 52 insertions(+), 7 deletions(-) diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 45c135d4e8..7125b2282c 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -2516,6 +2516,8 @@ int msm_vdec_inst_init(struct msm_vidc_inst *inst) inst->decode_batch.enable = true; inst->decode_batch.size = MAX_DEC_BATCH_SIZE; } + if (core->capabilities[DCVS].value) + inst->power.dcvs_mode = true; f = &inst->fmts[INPUT_PORT]; f->type = INPUT_MPLANE; diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index ce6afaebf3..38cee30ec3 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -1731,6 +1731,10 @@ int msm_venc_inst_init(struct msm_vidc_inst *inst) i_vpr_h(inst, "%s()\n", __func__); core = inst->core; + + if (core->capabilities[DCVS].value) + inst->power.dcvs_mode = true; + f = &inst->fmts[OUTPUT_PORT]; f->type = OUTPUT_MPLANE; f->fmt.pix_mp.width = DEFAULT_WIDTH; diff --git a/driver/vidc/src/msm_vidc_buffer.c b/driver/vidc/src/msm_vidc_buffer.c index 56546f7912..c444b27c08 100644 --- a/driver/vidc/src/msm_vidc_buffer.c +++ b/driver/vidc/src/msm_vidc_buffer.c @@ -117,8 +117,9 @@ u32 msm_vidc_input_extra_count(struct msm_vidc_inst *inst) } } } else if (is_encode_session(inst)) { - /* add dcvs buffers */ - count = DCVS_ENC_EXTRA_INPUT_BUFFERS; + /* add dcvs buffers, if platform supports dcvs */ + if (core->capabilities[DCVS].value) + count = DCVS_ENC_EXTRA_INPUT_BUFFERS; } return count; @@ -143,8 +144,9 @@ u32 msm_vidc_output_extra_count(struct msm_vidc_inst *inst) return 0; if (is_decode_session(inst)) { - /* add dcvs buffers */ - count = DCVS_DEC_EXTRA_OUTPUT_BUFFERS; + /* add dcvs buffers, if platform supports dcvs */ + if (core->capabilities[DCVS].value) + count = DCVS_DEC_EXTRA_OUTPUT_BUFFERS; /* * if decode batching enabled, ensure minimum batch size * count of extra output buffers added on output port diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 3a9572972c..3407d6a361 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -644,7 +644,7 @@ static int msm_vidc_update_buffer_count_if_needed(struct msm_vidc_inst* inst, int rc = 0; bool update_input_port = false, update_output_port = false; - if (!inst || !inst->capabilities || !ctrl) { + if (!inst || !ctrl) { d_vpr_e("%s: invalid parameters\n", __func__); return -EINVAL; } @@ -658,6 +658,7 @@ static int msm_vidc_update_buffer_count_if_needed(struct msm_vidc_inst* inst, update_input_port = true; break; case V4L2_CID_MPEG_VIDC_THUMBNAIL_MODE: + case V4L2_CID_MPEG_VIDC_PRIORITY: update_input_port = true; update_output_port = true; break; @@ -752,6 +753,17 @@ int msm_v4l2_op_s_ctrl(struct v4l2_ctrl *ctrl) rc = msm_vidc_adjust_session_priority(inst, ctrl); if (rc) return rc; + + /** + * This is the last static s_ctrl from client(commit point). So update + * input & output counts to reflect final buffer counts based on dcvs + * & decoder_batching enable/disable. So client is expected to query + * for final counts after setting priority control. + */ + if (is_decode_session(inst)) + inst->decode_batch.enable = msm_vidc_allow_decode_batch(inst); + + msm_vidc_allow_dcvs(inst); } if (is_meta_ctrl(ctrl->id)) { if (cap_id == META_DPB_TAG_LIST) { diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 94aba9d51f..72e79250a4 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -2712,6 +2712,12 @@ void msm_vidc_allow_dcvs(struct msm_vidc_inst *inst) goto exit; } + allow = !is_lowlatency_session(inst); + if (!allow) { + i_vpr_h(inst, "%s: lowlatency session\n", __func__); + goto exit; + } + exit: i_vpr_h(inst, "%s: dcvs: %s\n", __func__, allow ? "enabled" : "disabled"); @@ -2721,14 +2727,17 @@ exit: bool msm_vidc_allow_decode_batch(struct msm_vidc_inst *inst) { + struct msm_vidc_inst_capability *capability; struct msm_vidc_core *core; bool allow = false; + u32 value = 0; - if (!inst || !inst->core) { + if (!inst || !inst->core || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); return false; } core = inst->core; + capability = inst->capabilities; allow = inst->decode_batch.enable; if (!allow) { @@ -2778,6 +2787,22 @@ bool msm_vidc_allow_decode_batch(struct msm_vidc_inst *inst) goto exit; } + value = msm_vidc_get_fps(inst); + allow = value < capability->cap[BATCH_FPS].value; + if (!allow) { + i_vpr_h(inst, "%s: unsupported fps %u, max %u\n", __func__, + value, capability->cap[BATCH_FPS].value); + goto exit; + } + + value = msm_vidc_get_mbs_per_frame(inst); + allow = value < capability->cap[BATCH_MBPF].value; + if (!allow) { + i_vpr_h(inst, "%s: unsupported mbpf %u, max %u\n", __func__, + value, capability->cap[BATCH_MBPF].value); + goto exit; + } + exit: i_vpr_h(inst, "%s: batching: %s\n", __func__, allow ? "enabled" : "disabled"); @@ -4090,7 +4115,7 @@ int msm_vidc_core_init(struct msm_vidc_core *core) { int rc = 0; - if (!core || !core->platform) { + if (!core || !core->capabilities) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } From 9c7b87835975de29bc9030249e96acbd68368e97 Mon Sep 17 00:00:00 2001 From: Mihir Ganu Date: Wed, 26 May 2021 11:31:10 -0700 Subject: [PATCH 0313/1061] video: driver: Add missing H264 levels Add the missing H264 levels supported currently. Change-Id: Iea071aef46ea6be6f6f10c3a799b7f8aba26c08f Signed-off-by: Mihir Ganu --- driver/platform/waipio/src/msm_vidc_waipio.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 29fcfff1c3..fb6c65bc27 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -959,7 +959,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {LEVEL, ENC|DEC, H264, V4L2_MPEG_VIDEO_H264_LEVEL_1_0, - V4L2_MPEG_VIDEO_H264_LEVEL_5_1, + V4L2_MPEG_VIDEO_H264_LEVEL_6_2, BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_0) | BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1B) | BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_1) | @@ -975,8 +975,12 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_1) | BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_2) | BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_1), - V4L2_MPEG_VIDEO_H264_LEVEL_5_1, + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_2), + V4L2_MPEG_VIDEO_H264_LEVEL_6_2, V4L2_CID_MPEG_VIDEO_H264_LEVEL, HFI_PROP_LEVEL, CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, From b35579ad54a33d0dbde55579f9442064a7e0c883 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Tue, 25 May 2021 12:57:47 -0700 Subject: [PATCH 0314/1061] video: driver: always caliberate gop size [1] Irrespective of layer encoding type P or B, always caliberate gop size to have gop size multiple of sub gop size. [2] Do not cap enh layer count value to max 1 value when cvp is disabled. Change-Id: I10f602202ce007707c0fee76d9f847db70798754 Signed-off-by: Akshata Sahukar --- driver/platform/waipio/src/msm_vidc_waipio.c | 9 ++-- driver/vidc/src/msm_vidc_control.c | 49 ++++++-------------- 2 files changed, 17 insertions(+), 41 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 29fcfff1c3..01a12aaac1 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -736,7 +736,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { HFI_PROP_LAYER_COUNT, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, - {BITRATE_MODE, META_EVA_STATS}, + {BITRATE_MODE}, {GOP_SIZE, B_FRAME, BIT_RATE}, msm_vidc_adjust_layer_count, msm_vidc_set_layer_count_and_type}, @@ -746,7 +746,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { HFI_PROP_LAYER_COUNT, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, - {BITRATE_MODE, META_EVA_STATS}, + {BITRATE_MODE}, {GOP_SIZE, B_FRAME, BIT_RATE}, msm_vidc_adjust_layer_count, msm_vidc_set_layer_count_and_type}, @@ -1307,10 +1307,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_EVA_STATS, - HFI_PROP_EVA_STAT_INFO, - CAP_FLAG_ROOT, - {0}, - {ENH_LAYER_COUNT}}, + HFI_PROP_EVA_STAT_INFO}, {META_BUF_TAG, DEC | ENC, CODECS_ALL, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 3407d6a361..ebe787f880 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -1316,14 +1316,6 @@ static int msm_vidc_adjust_static_layer_count_and_type(struct msm_vidc_inst *ins goto exit; } - if (!inst->capabilities->cap[META_EVA_STATS].value && - hb_requested && (layer_count > 1)) { - layer_count = 1; - i_vpr_h(inst, - "%s: cvp disable supports only one enh layer HB\n", - __func__); - } - /* decide hfi layer type */ if (hb_requested) { inst->hfi_layer_type = HFI_HIER_B; @@ -1376,9 +1368,7 @@ int msm_vidc_adjust_layer_count(void *instance, struct v4l2_ctrl *ctrl) capability->cap[ENH_LAYER_COUNT].value; if (!is_parent_available(inst, ENH_LAYER_COUNT, - BITRATE_MODE, __func__) || - !is_parent_available(inst, ENH_LAYER_COUNT, - META_EVA_STATS, __func__)) + BITRATE_MODE, __func__)) return -EINVAL; if (!inst->vb2q[OUTPUT_PORT].streaming) { @@ -1404,17 +1394,12 @@ exit: return rc; } -/* - * 1. GOP calibration is only done for HP layer encoding type. - * 2. Dynamic GOP size should not exceed static GOP size - * 3. For HB case, or when layer encoding is not enabled, - * client set GOP size is directly set to FW. - */ int msm_vidc_adjust_gop_size(void *instance, struct v4l2_ctrl *ctrl) { struct msm_vidc_inst_capability *capability; struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; s32 adjusted_value, enh_layer_count = -1; + u32 min_gop_size, num_subgops; if (!inst || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); @@ -1431,25 +1416,19 @@ int msm_vidc_adjust_gop_size(void *instance, struct v4l2_ctrl *ctrl) if (!enh_layer_count) goto exit; - /* calibrate GOP size */ - if (inst->hfi_layer_type == HFI_HIER_P_SLIDING_WINDOW || - inst->hfi_layer_type == HFI_HIER_P_HYBRID_LTR) { - /* - * Layer encoding needs GOP size to be multiple of subgop size - * And subgop size is 2 ^ number of enhancement layers. - */ - u32 min_gop_size; - u32 num_subgops; + /* + * Layer encoding needs GOP size to be multiple of subgop size + * And subgop size is 2 ^ number of enhancement layers. + */ - /* v4l2 layer count is the number of enhancement layers */ - min_gop_size = 1 << enh_layer_count; - num_subgops = (adjusted_value + (min_gop_size >> 1)) / - min_gop_size; - if (num_subgops) - adjusted_value = num_subgops * min_gop_size; - else - adjusted_value = min_gop_size; - } + /* v4l2 layer count is the number of enhancement layers */ + min_gop_size = 1 << enh_layer_count; + num_subgops = (adjusted_value + (min_gop_size >> 1)) / + min_gop_size; + if (num_subgops) + adjusted_value = num_subgops * min_gop_size; + else + adjusted_value = min_gop_size; exit: msm_vidc_update_cap_value(inst, GOP_SIZE, adjusted_value, __func__); From 6e9150c232063c7e21bdaba451aee872de5827ee Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Wed, 26 May 2021 12:48:26 -0700 Subject: [PATCH 0315/1061] video: driver: Enable low latency mode for CBR rc type Enable low latency mode for CBR rc type. Change-Id: I80230e5d2acab94820b1401ffa6e6fe372398397 Signed-off-by: Akshata Sahukar --- driver/platform/waipio/src/msm_vidc_waipio.c | 24 ++++++++++++++-- driver/variant/iris2/src/msm_vidc_iris2.c | 6 ++-- driver/vidc/inc/msm_vidc_control.h | 1 + driver/vidc/src/msm_vidc_control.c | 30 ++++++++++++++++++++ 4 files changed, 54 insertions(+), 7 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 01a12aaac1..a94fcd8d23 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -352,7 +352,8 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {LTR_COUNT, IR_RANDOM, TIME_DELTA_BASED_RC, I_FRAME_QP, ENH_LAYER_COUNT, BIT_RATE, CONTENT_ADAPTIVE_CODING, BITRATE_BOOST, MIN_QUALITY, VBV_DELAY, PEAK_BITRATE, - SLICE_MODE, META_ROI_INFO, BLUR_TYPES}, + SLICE_MODE, META_ROI_INFO, BLUR_TYPES, + LOWLATENCY_MODE}, msm_vidc_adjust_bitrate_mode, msm_vidc_set_u32_enum}, {BITRATE_MODE, ENC, HEVC, @@ -370,7 +371,8 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { CONSTANT_QUALITY, ENH_LAYER_COUNT, CONTENT_ADAPTIVE_CODING, BIT_RATE, BITRATE_BOOST, MIN_QUALITY, VBV_DELAY, - PEAK_BITRATE, SLICE_MODE, META_ROI_INFO, BLUR_TYPES}, + PEAK_BITRATE, SLICE_MODE, META_ROI_INFO, BLUR_TYPES, + LOWLATENCY_MODE}, msm_vidc_adjust_bitrate_mode, msm_vidc_set_u32_enum}, {LOSSLESS, ENC, HEVC|HEIC, @@ -468,7 +470,12 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {LOWLATENCY_MODE, ENC, H264 | HEVC, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_LOWLATENCY_REQUEST}, + V4L2_CID_MPEG_VIDC_LOWLATENCY_REQUEST, + 0, + CAP_FLAG_NONE, + {BITRATE_MODE}, + {STAGE}, + msm_vidc_adjust_lowlatency_mode, NULL}, {LOWLATENCY_MODE, DEC, H264|HEVC|VP9, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, @@ -1155,6 +1162,17 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { CAP_FLAG_ROOT, {0}, {0}, NULL, msm_vidc_set_stage}, + + {STAGE, ENC, H264 | HEVC, + MSM_VIDC_STAGE_1, + MSM_VIDC_STAGE_2, 1, + MSM_VIDC_STAGE_2, + 0, + HFI_PROP_STAGE, + CAP_FLAG_NONE, + {LOWLATENCY_MODE}, {0}, + NULL, msm_vidc_set_stage}, + {PIPE, DEC|ENC, CODECS_ALL, MSM_VIDC_PIPE_1, MSM_VIDC_PIPE_4, 1, diff --git a/driver/variant/iris2/src/msm_vidc_iris2.c b/driver/variant/iris2/src/msm_vidc_iris2.c index 4f71d901bc..f2f701591d 100644 --- a/driver/variant/iris2/src/msm_vidc_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_iris2.c @@ -537,7 +537,6 @@ int msm_vidc_decide_work_mode_iris2(struct msm_vidc_inst* inst) { u32 work_mode; struct v4l2_format* out_f; - struct v4l2_format* inp_f; u32 width, height; bool res_ok = false; @@ -548,7 +547,6 @@ int msm_vidc_decide_work_mode_iris2(struct msm_vidc_inst* inst) work_mode = MSM_VIDC_STAGE_2; out_f = &inst->fmts[OUTPUT_PORT]; - inp_f = &inst->fmts[INPUT_PORT]; if (is_image_decode_session(inst)) work_mode = MSM_VIDC_STAGE_1; @@ -567,8 +565,8 @@ int msm_vidc_decide_work_mode_iris2(struct msm_vidc_inst* inst) work_mode = MSM_VIDC_STAGE_1; } } else if (is_encode_session(inst)) { - height = inp_f->fmt.pix_mp.height; - width = inp_f->fmt.pix_mp.width; + height = inst->crop.height; + width = inst->crop.width; res_ok = !res_is_greater_than(width, height, 4096, 2160); if (res_ok && (inst->capabilities->cap[LOWLATENCY_MODE].value)) { diff --git a/driver/vidc/inc/msm_vidc_control.h b/driver/vidc/inc/msm_vidc_control.h index 90db0b245b..9595717963 100644 --- a/driver/vidc/inc/msm_vidc_control.h +++ b/driver/vidc/inc/msm_vidc_control.h @@ -34,6 +34,7 @@ int msm_vidc_adjust_hevc_max_qp(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_hevc_frame_qp(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_blur_type(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_blur_resolution(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_lowlatency_mode(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_v4l2_properties(struct msm_vidc_inst *inst); int msm_vidc_adjust_session_priority(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_roi_info(void *instance, struct v4l2_ctrl *ctrl); diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index ebe787f880..d41214c136 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -1863,6 +1863,36 @@ int msm_vidc_adjust_blur_resolution(void *instance, struct v4l2_ctrl *ctrl) return 0; } +int msm_vidc_adjust_lowlatency_mode(void *instance, struct v4l2_ctrl *ctrl) +{ + struct msm_vidc_inst_capability *capability; + s32 adjusted_value; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + s32 rc_type = -1; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + adjusted_value = ctrl ? ctrl->val : + capability->cap[LOWLATENCY_MODE].value; + + if (msm_vidc_get_parent_value(inst, LOWLATENCY_MODE, BITRATE_MODE, + &rc_type, __func__)) + return -EINVAL; + + if (rc_type == HFI_RC_CBR_CFR || + rc_type == HFI_RC_CBR_VFR) + adjusted_value = 1; + + msm_vidc_update_cap_value(inst, LOWLATENCY_MODE, + adjusted_value, __func__); + + return 0; +} + int msm_vidc_adjust_session_priority(void *instance, struct v4l2_ctrl *ctrl) { int rc = 0; From 4e5c57950d55b322602e1b1e61ed10c9ba526562 Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Wed, 26 May 2021 15:58:18 -0700 Subject: [PATCH 0316/1061] video: driver: reject unsupported resolution in output streamon For decoder, reject unsupported session during output port streamon. Change-Id: I048bf86cce1357a8db6c4ed5fc15508db1382916 Signed-off-by: Darshana Patil --- driver/vidc/src/msm_vdec.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 45c135d4e8..074dc94efb 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -1684,6 +1684,10 @@ int msm_vdec_streamon_output(struct msm_vidc_inst *inst) return -EINVAL; } + rc = msm_vidc_check_session_supported(inst); + if (rc) + return rc; + rc = msm_vdec_update_max_map_output_count(inst); if (rc) return rc; From 75597419c8dde8ac2cd27df121590016e4733e33 Mon Sep 17 00:00:00 2001 From: Mahesh Kumar Sharma Date: Wed, 26 May 2021 17:34:47 -0700 Subject: [PATCH 0317/1061] video: driver: Update stage & pipe before sending resume Before sending HFI_CMD_RESUME to firmware ensure to update stage & pipe. Change-Id: I279aaf387076a8355d73480c6b02cc79df112306 Signed-off-by: Mahesh Kumar Sharma --- driver/vidc/src/msm_vdec.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 7125b2282c..b9cc6df31e 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -2045,6 +2045,14 @@ int msm_vdec_process_cmd(struct msm_vidc_inst *inst, u32 cmd) /* print final buffer counts & size details */ msm_vidc_print_buffer_info(inst); + rc = msm_vidc_set_stage(inst, STAGE); + if (rc) + return rc; + + rc = msm_vidc_set_pipe(inst, PIPE); + if (rc) + return rc; + rc = venus_hfi_session_command(inst, HFI_CMD_RESUME, port, From d0af60e0086bb8360816f4aa59c8bf23b16e2a9e Mon Sep 17 00:00:00 2001 From: Maheshwar Ajja Date: Tue, 25 May 2021 21:16:25 -0700 Subject: [PATCH 0318/1061] video: driver: deinit core from a valid session only Occationally when multiple sessions are waiting for firmware response and at the same time if there was a system error received which will deinitalize the core and remove all sessions from core list. If client opened new session which will initialize the core and start the new session. As there will be no response for old sessions, eventually, they will timeout and try to deinitialize the core which will reset new session also which is not correct. So check if timed out session is valid (present in core list) before deintializing the core from timeout session. This change also addresses below race condition issue - If client is opening multiple new sessions and multiple old sessions are also timedout at the same time and all are waiting for core lock to be acquired. The new session does init_completion(&core->init_done); and release core lock before waiting for completion event. As core lock was released the timed out session will acquire the core lock and deinit the core and release core lock. As core was deinited, another new session will do init_completion(&core->init_done); on which the previous session was waiting for completion event. doing init_completion again on an already waiting completion event will result in list corruption issues. Change-Id: I94766ead8b3ecad7d0b87f4b999608f435d0cee2 Signed-off-by: Maheshwar Ajja --- driver/vidc/inc/msm_vidc_driver.h | 2 +- driver/vidc/src/msm_vidc_driver.c | 91 ++++++++++++++++++++++++++----- driver/vidc/src/venus_hfi.c | 10 ++-- 3 files changed, 81 insertions(+), 22 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 9af63f97ee..dbb40284ca 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -301,7 +301,7 @@ int msm_vidc_change_core_state(struct msm_vidc_core *core, enum msm_vidc_core_state request_state, const char *func); int msm_vidc_core_init(struct msm_vidc_core *core); int msm_vidc_core_deinit(struct msm_vidc_core *core, bool force); -int msm_vidc_core_timeout(struct msm_vidc_core *core); +int msm_vidc_inst_timeout(struct msm_vidc_inst *inst); int msm_vidc_print_buffer_info(struct msm_vidc_inst *inst); int msm_vidc_print_inst_info(struct msm_vidc_inst *inst); void msm_vidc_print_core_info(struct msm_vidc_core *core); diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index a13e0d245e..6032c0e511 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -3715,7 +3715,7 @@ int msm_vidc_session_streamoff(struct msm_vidc_inst *inst, i_vpr_e(inst, "%s: session stop timed out for port: %d\n", __func__, port); rc = -ETIMEDOUT; - msm_vidc_core_timeout(inst->core); + msm_vidc_inst_timeout(inst); } else { rc = 0; } @@ -3778,7 +3778,7 @@ int msm_vidc_session_close(struct msm_vidc_inst *inst) if (!rc) { i_vpr_e(inst, "%s: session close timed out\n", __func__); rc = -ETIMEDOUT; - msm_vidc_core_timeout(inst->core); + msm_vidc_inst_timeout(inst); } else { rc = 0; i_vpr_h(inst, "%s: close successful\n", __func__); @@ -4033,7 +4033,7 @@ error: return rc; } -int msm_vidc_core_deinit(struct msm_vidc_core *core, bool force) +int msm_vidc_core_deinit_locked(struct msm_vidc_core *core, bool force) { int rc = 0; struct msm_vidc_inst *inst, *dummy; @@ -4043,14 +4043,26 @@ int msm_vidc_core_deinit(struct msm_vidc_core *core, bool force) return -EINVAL; } - core_lock(core, __func__); - d_vpr_h("%s(): force %u\n", __func__, force); - if (core->state == MSM_VIDC_CORE_DEINIT) - goto unlock; + rc = __strict_check(core, __func__); + if (rc) { + d_vpr_e("%s(): core was not locked\n", __func__); + return rc; + } - if (!force) - if (!list_empty(&core->instances)) - goto unlock; + if (core->state == MSM_VIDC_CORE_DEINIT) + return 0; + + if (force) { + d_vpr_e("%s(): force deinit core\n", __func__); + } else { + /* in normal case, deinit core only if no session present */ + if (!list_empty(&core->instances)) { + d_vpr_h("%s(): skip deinit\n", __func__); + return 0; + } else { + d_vpr_h("%s(): deinit core\n", __func__); + } + } venus_hfi_core_deinit(core); @@ -4061,8 +4073,21 @@ int msm_vidc_core_deinit(struct msm_vidc_core *core, bool force) } msm_vidc_change_core_state(core, MSM_VIDC_CORE_DEINIT, __func__); -unlock: + return rc; +} + +int msm_vidc_core_deinit(struct msm_vidc_core *core, bool force) +{ + int rc = 0; + if (!core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + core_lock(core, __func__); + rc = msm_vidc_core_deinit_locked(core, force); core_unlock(core, __func__); + return rc; } @@ -4147,6 +4172,7 @@ int msm_vidc_core_init(struct msm_vidc_core *core) core_lock(core, __func__); if (!rc) { d_vpr_e("%s: core init timed out\n", __func__); + msm_vidc_core_deinit_locked(core, true); rc = -ETIMEDOUT; } else { msm_vidc_change_core_state(core, MSM_VIDC_CORE_INIT, __func__); @@ -4156,14 +4182,49 @@ int msm_vidc_core_init(struct msm_vidc_core *core) unlock: core_unlock(core, __func__); - if (rc) - msm_vidc_core_deinit(core, true); return rc; } -int msm_vidc_core_timeout(struct msm_vidc_core *core) +int msm_vidc_inst_timeout(struct msm_vidc_inst *inst) { - return msm_vidc_core_deinit(core, true); + int rc = 0; + struct msm_vidc_core *core; + struct msm_vidc_inst *instance; + bool found; + + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + core = inst->core; + + core_lock(core, __func__); + /* + * All sessions will be removed from core list in core deinit, + * do not deinit core from a session which is not present in + * core list. + */ + found = false; + list_for_each_entry(instance, &core->instances, list) { + if (instance == inst) { + found = true; + break; + } + } + if (!found) { + i_vpr_e(inst, + "%s: session not available in core list\n", __func__); + rc = -EINVAL; + goto unlock; + } + + /* call core deinit for a valid instance timeout case */ + msm_vidc_core_deinit_locked(core, true); + +unlock: + core_unlock(core, __func__); + + return rc; } int msm_vidc_print_buffer_info(struct msm_vidc_inst *inst) diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index 09dd851e9a..e45643cc59 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -2952,7 +2952,6 @@ int venus_hfi_trigger_ssr(struct msm_vidc_core *core, u32 type, return -EINVAL; } - core_lock(core, __func__); payload[0] = client_id << 4 | type; payload[1] = addr; @@ -2960,7 +2959,7 @@ int venus_hfi_trigger_ssr(struct msm_vidc_core *core, u32 type, 0 /*session_id*/, core->header_id++); if (rc) - goto unlock; + goto exit; /* HFI_CMD_SSR */ rc = hfi_create_packet(core->packet, core->packet_size, @@ -2972,14 +2971,13 @@ int venus_hfi_trigger_ssr(struct msm_vidc_core *core, u32 type, core->packet_id++, &payload, sizeof(u64)); if (rc) - goto unlock; + goto exit; rc = __iface_cmdq_write(core, core->packet); if (rc) - goto unlock; + goto exit; -unlock: - core_unlock(core, __func__); +exit: if (rc) d_vpr_e("%s(): failed\n", __func__); From b4b2a856e3bdc90da27a61ed0af84fc8d4f0b894 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Wed, 26 May 2021 18:37:58 -0700 Subject: [PATCH 0319/1061] video: driver: allow main and main 10 profiles for heic enc allow main and main 10 profiles for heic enc. Change-Id: I5ce6f24fede3d7b2267a97a0aaf01e19e9894ba3 Signed-off-by: Akshata Sahukar --- driver/vidc/src/msm_vidc_driver.c | 11 ----------- 1 file changed, 11 deletions(-) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index a13e0d245e..fe242c9d98 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -5109,17 +5109,6 @@ static bool msm_vidc_allow_image_encode_session(struct msm_vidc_inst *inst) goto exit; } - /* is profile type Still Pic */ - if (is_10bit_colorformat(pix_fmt)) - allow = profile == V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE; - else - allow = profile == V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE; - if (!allow) { - i_vpr_e(inst, "%s: profile not valid: %#x\n", __func__, - capability->cap[PROFILE].value); - goto exit; - } - return true; exit: From 8d81cd480bb066ad39098c2e2307744d6ff85ad7 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Wed, 26 May 2021 16:44:16 +0530 Subject: [PATCH 0320/1061] video: driver: tune clock and bus vote calculation Use bitstream fps in clock and bus vote calculation, if bitstream detected fps is higher than client set rate. Change-Id: I58fa1a8725086c112796b3ce5172a39f322e178e Signed-off-by: Govindaraj Rajagopal --- .../variant/iris2/src/msm_vidc_power_iris2.c | 18 ++++++----- driver/vidc/src/msm_vidc_power.c | 31 +++++++------------ 2 files changed, 22 insertions(+), 27 deletions(-) diff --git a/driver/variant/iris2/src/msm_vidc_power_iris2.c b/driver/variant/iris2/src/msm_vidc_power_iris2.c index a5ed1a088a..32c389d207 100644 --- a/driver/variant/iris2/src/msm_vidc_power_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_power_iris2.c @@ -23,7 +23,7 @@ u64 msm_vidc_calc_freq_iris2(struct msm_vidc_inst *inst, u32 data_size) u32 base_cycles = 0; u32 fps; u32 prio_val; - u32 ts_fps; + u32 buf_timetamps_fps, mbpf; if (!inst || !inst->core || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); @@ -45,12 +45,16 @@ u64 msm_vidc_calc_freq_iris2(struct msm_vidc_inst *inst, u32 data_size) return core->dt->allowed_clks_tbl[prio_val-1].clock_rate; } - mbs_per_second = msm_vidc_get_inst_load(inst); + mbpf = msm_vidc_get_mbs_per_frame(inst); fps = msm_vidc_get_fps(inst); - ts_fps = msm_vidc_calc_framerate(inst); - if (ts_fps > fps) - i_vpr_l(inst, "%s: ts_rate %d set rate %d\n", __func__, ts_fps, fps); + buf_timetamps_fps = msm_vidc_calc_framerate(inst); + + /* use buffer detected fps instead of client set value */ + if (fps < buf_timetamps_fps) + fps = buf_timetamps_fps; + + mbs_per_second = mbpf * fps; /* * Calculate vpp, vsp, fw cycles separately for encoder and decoder. @@ -152,8 +156,8 @@ u64 msm_vidc_calc_freq_iris2(struct msm_vidc_inst *inst, u32 data_size) freq = max(vpp_cycles, vsp_cycles); freq = max(freq, fw_cycles); - i_vpr_p(inst, "%s: filled len %d required freq %llu\n", - __func__, data_size, freq); + i_vpr_p(inst, "%s: filled len %d, required freq %llu, fps %u, mbpf %u\n", + __func__, data_size, freq, fps, mbpf); return freq; } diff --git a/driver/vidc/src/msm_vidc_power.c b/driver/vidc/src/msm_vidc_power.c index 14a2cc7638..d4830edd28 100644 --- a/driver/vidc/src/msm_vidc_power.c +++ b/driver/vidc/src/msm_vidc_power.c @@ -47,27 +47,12 @@ u64 msm_vidc_max_freq(struct msm_vidc_inst *inst) int msm_vidc_get_mbps(struct msm_vidc_inst *inst) { - u32 input_port_mbs, output_port_mbs; - u32 fps, operating_rate, frame_rate; - struct v4l2_format *f; + u32 mbpf, fps; - f = &inst->fmts[INPUT_PORT]; - input_port_mbs = NUM_MBS_PER_FRAME(f->fmt.pix_mp.width, - f->fmt.pix_mp.height); + mbpf = msm_vidc_get_mbs_per_frame(inst); + fps = msm_vidc_get_fps(inst); - f = &inst->fmts[OUTPUT_PORT]; - output_port_mbs = NUM_MBS_PER_FRAME(f->fmt.pix_mp.width, - f->fmt.pix_mp.height); - - frame_rate = inst->capabilities->cap[FRAME_RATE].value; - operating_rate = inst->capabilities->cap[OPERATING_RATE].value; - - fps = max(operating_rate, frame_rate); - - /* In case of fps < 1 we assume 1 */ - fps = max(fps >> 16, (u32)1); - - return max(input_port_mbs, output_port_mbs) * fps; + return mbpf * fps; } int msm_vidc_get_inst_load(struct msm_vidc_inst *inst) @@ -196,7 +181,7 @@ int msm_vidc_scale_buses(struct msm_vidc_inst *inst) struct vidc_bus_vote_data *vote_data; struct v4l2_format *out_f; struct v4l2_format *inp_f; - int codec = 0, frame_rate; + int codec = 0, frame_rate, buf_ts_fps; if (!inst || !inst->core || !inst->capabilities) { d_vpr_e("%s: invalid params: %pK\n", __func__, inst); @@ -242,6 +227,12 @@ int msm_vidc_scale_buses(struct msm_vidc_inst *inst) vote_data->lcu_size = (codec == V4L2_PIX_FMT_HEVC || codec == V4L2_PIX_FMT_VP9) ? 32 : 16; vote_data->fps = msm_vidc_get_fps(inst); + buf_ts_fps = msm_vidc_calc_framerate(inst); + if (buf_ts_fps > vote_data->fps) { + i_vpr_l(inst, "%s: bitstream: fps %d, client rate %u\n", __func__, + buf_ts_fps, vote_data->fps); + vote_data->fps = buf_ts_fps; + } if (inst->domain == MSM_VIDC_ENCODER) { vote_data->domain = MSM_VIDC_ENCODER; From 69e6b8c0ca3c73fa99925243674708a0a065a8e5 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Wed, 26 May 2021 20:32:28 +0530 Subject: [PATCH 0321/1061] video: driver: fix race between streamoff and ipsc During input port streamoff, state is changed from START_INPUT to OPEN and then sent CMD_STOP to firmware. So reverse thread acquired the lock and trying to process IPSC. Since IPSC is not allowed in OPEN state, driver treats that as a fatal issue and moves inst->state to ERROR state. Added change to avoid above mentioned issue. Change-Id: If0e18f01b6ecac3c810c0dab878ae392c48ffc27 Signed-off-by: Govindaraj Rajagopal --- driver/vidc/inc/msm_vidc_internal.h | 1 + driver/vidc/src/msm_vidc_driver.c | 5 +++++ driver/vidc/src/venus_hfi_response.c | 3 +++ 3 files changed, 9 insertions(+) diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 556c6733b9..60ea8f063c 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -833,6 +833,7 @@ enum msm_vidc_allow { MSM_VIDC_DISALLOW = 0, MSM_VIDC_ALLOW, MSM_VIDC_DEFER, + MSM_VIDC_DISCARD, MSM_VIDC_IGNORE, }; diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index e11c2fd47f..9b035e0f83 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -1487,6 +1487,11 @@ enum msm_vidc_allow msm_vidc_allow_input_psc(struct msm_vidc_inst *inst) i_vpr_h(inst, "%s: defer input psc, inst state %s\n", __func__, state_name(inst->state)); allow = MSM_VIDC_DEFER; + } else if (inst->state == MSM_VIDC_OPEN || + inst->state == MSM_VIDC_START_OUTPUT) { + i_vpr_h(inst, "%s: discard input psc, inst state %s\n", + __func__, state_name(inst->state)); + allow = MSM_VIDC_DISCARD; } else { i_vpr_e(inst, "%s: input psc in wrong state %s\n", __func__, state_name(inst->state)); diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index c24f7bd98c..03164c3754 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -1517,6 +1517,9 @@ void handle_session_response_work_handler(struct work_struct *work) } else if (allow == MSM_VIDC_DEFER) { /* continue to next entry processing */ continue; + } else if (allow == MSM_VIDC_DISCARD) { + /* discard current entry processing */ + break; } else if (allow == MSM_VIDC_ALLOW) { rc = handle_session_response_work(inst, resp_work); if (!rc) From c1bf1d2bc958bbcf5add04998cc7f9ecf92183e5 Mon Sep 17 00:00:00 2001 From: Vikash Garodia Date: Fri, 28 May 2021 15:28:52 +0530 Subject: [PATCH 0322/1061] video: driver: Set proper HFI during low latency for decoder Decoder supports dynamic low latency. When client configures the video session in low latency mode, driver would configure the firmware such that HFI_CMD_SETTINGS_CHANGE is triggerred on sync frame boundary. Change-Id: Ie70eaaeb8ad420db926f0d99f77723476deee400 Signed-off-by: Vikash Garodia --- driver/platform/waipio/src/msm_vidc_waipio.c | 6 +++--- driver/vidc/inc/msm_vidc_control.h | 2 ++ driver/vidc/src/msm_vdec.c | 4 ++++ driver/vidc/src/msm_vidc_control.c | 21 ++++++++++++++++++++ 4 files changed, 30 insertions(+), 3 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 7c48727cc9..e83b7ff608 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -481,10 +481,10 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDC_LOWLATENCY_REQUEST, - HFI_PROP_STAGE, - CAP_FLAG_DYNAMIC_ALLOWED, + HFI_PROP_SEQ_CHANGE_AT_SYNC_FRAME, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, {0}, {0}, - NULL, msm_vidc_set_stage}, + NULL, msm_vidc_set_seq_change_at_sync_frame}, {LTR_COUNT, ENC, H264|HEVC, 0, 2, 1, 0, diff --git a/driver/vidc/inc/msm_vidc_control.h b/driver/vidc/inc/msm_vidc_control.h index 9595717963..f0aebcc2de 100644 --- a/driver/vidc/inc/msm_vidc_control.h +++ b/driver/vidc/inc/msm_vidc_control.h @@ -95,6 +95,8 @@ int msm_vidc_set_csc_custom_matrix(void *instance, enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_session_priority(void* instance, enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_seq_change_at_sync_frame(void* instance, + enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_s32(void *instance, enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_q16(void *instance, diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index afdaeb82af..f0f17d09f6 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -778,6 +778,10 @@ static int msm_vdec_set_output_properties(struct msm_vidc_inst *inst) if (rc) return rc; + rc = msm_vidc_set_seq_change_at_sync_frame(inst, LOWLATENCY_MODE); + if (rc) + return rc; + return rc; } diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index d41214c136..4d948e79f1 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -3351,3 +3351,24 @@ int msm_vidc_set_pipe(void *instance, return rc; } + +int msm_vidc_set_seq_change_at_sync_frame(void* instance, + enum msm_vidc_inst_capability_type cap_id) +{ + int rc = 0; + u32 payload; + struct msm_vidc_inst* inst = (struct msm_vidc_inst*)instance; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + payload = inst->capabilities->cap[LOWLATENCY_MODE].value; + rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32, + &payload, sizeof(u32), __func__); + if (rc) + return rc; + + return rc; +} \ No newline at end of file From b2e9fada313cb27e44c0121cf58886e90d375eb5 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Fri, 28 May 2021 20:29:44 +0530 Subject: [PATCH 0323/1061] video: driver: restrict image load to 16K x 16K Add strict check in msm_vidc_check_mbpf_supported() to reject image session, if total image load exceeds 16K. Added msm_vidc_print_insts_info() support to print all running instance info, if new session is rejected due to mbpf/mbps checks. Change-Id: I98bab985fcf4f4d20c6f263c48e0c701ec86ab6f Signed-off-by: Govindaraj Rajagopal --- driver/platform/waipio/src/msm_vidc_waipio.c | 1 + driver/vidc/inc/msm_vidc_driver.h | 17 +- driver/vidc/inc/msm_vidc_internal.h | 1 + driver/vidc/src/msm_vdec.c | 2 +- driver/vidc/src/msm_venc.c | 2 +- driver/vidc/src/msm_vidc_control.c | 2 +- driver/vidc/src/msm_vidc_driver.c | 219 +++++++++++++------ 7 files changed, 173 insertions(+), 71 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index e83b7ff608..59caab05ea 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -62,6 +62,7 @@ static struct msm_platform_core_capability core_data_waipio[] = { * which is greater than 4096x2176@120fps, * 8192x4320@48fps */ + {MAX_IMAGE_MBPF, 1048576}, /* (16384x16384)/256 */ {MAX_MBPF_HQ, 8160}, /* ((1920x1088)/256) */ {MAX_MBPS_HQ, 489600}, /* ((1920x1088)/256)@60fps */ {MAX_MBPF_B_FRAME, 32640}, /* 3840x2176/256 */ diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index dbb40284ca..5e44a77fc1 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -135,12 +135,21 @@ static inline bool is_meta_enabled(struct msm_vidc_inst *inst, unsigned int type return enabled; } -static inline bool is_linear_colorformat(enum msm_vidc_colorformat_type colorformat) +static inline bool is_linear_yuv_colorformat(enum msm_vidc_colorformat_type colorformat) { return colorformat == MSM_VIDC_FMT_NV12 || colorformat == MSM_VIDC_FMT_NV21 || - colorformat == MSM_VIDC_FMT_P010 || - colorformat == MSM_VIDC_FMT_RGBA8888; + colorformat == MSM_VIDC_FMT_P010; +} + +static inline bool is_linear_rgba_colorformat(enum msm_vidc_colorformat_type colorformat) +{ + return colorformat == MSM_VIDC_FMT_RGBA8888; +} + +static inline bool is_linear_colorformat(enum msm_vidc_colorformat_type colorformat) +{ + return is_linear_yuv_colorformat(colorformat) || is_linear_rgba_colorformat(colorformat); } static inline bool is_ubwc_colorformat(enum msm_vidc_colorformat_type colorformat) @@ -397,7 +406,7 @@ int msm_vidc_update_debug_str(struct msm_vidc_inst *inst); void msm_vidc_allow_dcvs(struct msm_vidc_inst *inst); bool msm_vidc_allow_decode_batch(struct msm_vidc_inst *inst); int msm_vidc_check_session_supported(struct msm_vidc_inst *inst); -int msm_vidc_check_mbps_supported(struct msm_vidc_inst *inst); +int msm_vidc_check_core_mbps(struct msm_vidc_inst *inst); int msm_vidc_check_scaling_supported(struct msm_vidc_inst *inst); int msm_vidc_update_timestamp(struct msm_vidc_inst *inst, u64 timestamp); int msm_vidc_calc_framerate(struct msm_vidc_inst *inst); diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 60ea8f063c..c3402c7ef0 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -300,6 +300,7 @@ enum msm_vidc_core_capability_type { MAX_LOAD, MAX_MBPF, MAX_MBPS, + MAX_IMAGE_MBPF, MAX_MBPF_HQ, MAX_MBPS_HQ, MAX_MBPF_B_FRAME, diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index f0f17d09f6..17e42b1e66 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -2362,7 +2362,7 @@ set_default: inst->vb2q[INPUT_PORT].streaming) || (s_parm->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE && inst->vb2q[OUTPUT_PORT].streaming)) { - if (msm_vidc_check_mbps_supported(inst)) { + if (msm_vidc_check_core_mbps(inst)) { i_vpr_e(inst, "%s: Unsupported load with rate %d, setting default rate %d\n", __func__, input_rate, default_rate); diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index 38cee30ec3..308a0acd0f 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -1575,7 +1575,7 @@ set_default: inst->vb2q[INPUT_PORT].streaming) || (s_parm->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE && inst->vb2q[OUTPUT_PORT].streaming)) { - if (msm_vidc_check_mbps_supported(inst)) { + if (msm_vidc_check_core_mbps(inst)) { i_vpr_e(inst, "%s: Unsupported load with rate %d, setting default rate %d\n", __func__, input_rate, default_rate); diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 4d948e79f1..435923e8fd 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -1920,7 +1920,7 @@ int msm_vidc_adjust_session_priority(void *instance, struct v4l2_ctrl *ctrl) * among NRT sessions. They are constraint RT or low priority RT. */ if (adjusted_value == 0 && rate_by_client) { - rc = msm_vidc_check_mbps_supported(inst); + rc = msm_vidc_check_core_mbps(inst); if (rc) { d_vpr_e("%s: priority 0 not feasible due to resource\n", __func__); return rc; diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 9b035e0f83..8e0dcc83c2 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -5006,7 +5006,49 @@ int msm_vidc_update_debug_str(struct msm_vidc_inst *inst) return 0; } -int msm_vidc_check_mbps_supported(struct msm_vidc_inst *inst) +static int msm_vidc_print_insts_info(struct msm_vidc_core *core) +{ + struct msm_vidc_inst *inst; + u32 height, width, fps, orate; + struct msm_vidc_inst_capability *capability; + struct v4l2_format *out_f; + struct v4l2_format *inp_f; + char prop[64]; + + d_vpr_e("Print all running instances\n"); + d_vpr_e("%6s | %6s | %5s | %5s | %5s\n", "width", "height", "fps", "orate", "prop"); + + core_lock(core, __func__); + list_for_each_entry(inst, &core->instances, list) { + out_f = &inst->fmts[OUTPUT_PORT]; + inp_f = &inst->fmts[INPUT_PORT]; + capability = inst->capabilities; + memset(&prop, 0, sizeof(prop)); + + width = max(out_f->fmt.pix_mp.width, inp_f->fmt.pix_mp.width); + height = max(out_f->fmt.pix_mp.height, inp_f->fmt.pix_mp.height); + fps = capability->cap[FRAME_RATE].value >> 16; + orate = capability->cap[OPERATING_RATE].value >> 16; + + if (is_realtime_session(inst)) + strlcat(prop, "RT ", sizeof(prop)); + else + strlcat(prop, "NRT", sizeof(prop)); + + if (is_thumbnail_session(inst)) + strlcat(prop, "+THUMB", sizeof(prop)); + + if (is_image_session(inst)) + strlcat(prop, "+IMAGE", sizeof(prop)); + + i_vpr_e(inst, "%6u | %6u | %5u | %5u | %5s\n", width, height, fps, orate, prop); + } + core_unlock(core, __func__); + + return 0; +} + +int msm_vidc_check_core_mbps(struct msm_vidc_inst *inst) { u32 mbps = 0; struct msm_vidc_core *core; @@ -5035,17 +5077,17 @@ int msm_vidc_check_mbps_supported(struct msm_vidc_inst *inst) core_unlock(core, __func__); if (mbps > core->capabilities[MAX_MBPS].value) { - /* todo: print running instances */ - //msm_vidc_print_running_insts(inst->core); + i_vpr_e(inst, "%s: Hardware overloaded. needed %u, max %u", __func__, + mbps, core->capabilities[MAX_MBPS].value); return -ENOMEM; } return 0; } -static int msm_vidc_check_mbpf_supported(struct msm_vidc_inst *inst) +static int msm_vidc_check_core_mbpf(struct msm_vidc_inst *inst) { - u32 mbpf = 0; + u32 video_mbpf = 0, image_mbpf = 0; struct msm_vidc_core *core; struct msm_vidc_inst *instance; @@ -5061,18 +5103,55 @@ static int msm_vidc_check_mbpf_supported(struct msm_vidc_inst *inst) if (instance->state == MSM_VIDC_ERROR) continue; - /* ignore thumbnail and image sessions */ - if (is_thumbnail_session(instance) || - is_image_session(instance)) + /* ignore thumbnail session */ + if (is_thumbnail_session(instance)) continue; - mbpf += msm_vidc_get_mbs_per_frame(instance); + if (is_image_session(instance)) + image_mbpf += msm_vidc_get_mbs_per_frame(instance); + else + video_mbpf += msm_vidc_get_mbs_per_frame(instance); } core_unlock(core, __func__); - if (mbpf > core->capabilities[MAX_MBPF].value) { - /* todo: print running instances */ - //msm_vidc_print_running_insts(inst->core); + if (video_mbpf > core->capabilities[MAX_MBPF].value) { + i_vpr_e(inst, "%s: video overloaded. needed %u, max %u", __func__, + video_mbpf, core->capabilities[MAX_MBPF].value); + return -ENOMEM; + } + + if (image_mbpf > core->capabilities[MAX_IMAGE_MBPF].value) { + i_vpr_e(inst, "%s: image overloaded. needed %u, max %u", __func__, + image_mbpf, core->capabilities[MAX_IMAGE_MBPF].value); + return -ENOMEM; + } + + return 0; +} + +static int msm_vidc_check_inst_mbpf(struct msm_vidc_inst *inst) +{ + u32 mbpf = 0, max_mbpf = 0; + struct msm_vidc_inst_capability *capability; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + if (is_secure_session(inst)) + max_mbpf = capability->cap[SECURE_MBPF].max; + else if (is_encode_session(inst) && capability->cap[LOSSLESS].value) + max_mbpf = capability->cap[LOSSLESS_MBPF].max; + else + max_mbpf = capability->cap[MBPF].max; + + /* check current session mbpf */ + mbpf = msm_vidc_get_mbs_per_frame(inst); + if (mbpf > max_mbpf) { + i_vpr_e(inst, "%s: session overloaded. needed %u, max %u", __func__, + mbpf, max_mbpf); return -ENOMEM; } @@ -5115,8 +5194,8 @@ static bool msm_vidc_allow_image_encode_session(struct msm_vidc_inst *inst) goto exit; } - /* is linear color fmt */ - allow = is_linear_colorformat(pix_fmt); + /* is linear yuv color fmt */ + allow = is_linear_yuv_colorformat(pix_fmt); if (!allow) { i_vpr_e(inst, "%s: compressed fmt: %#x\n", __func__, pix_fmt); goto exit; @@ -5175,10 +5254,10 @@ static bool msm_vidc_allow_image_encode_session(struct msm_vidc_inst *inst) goto exit; } - return true; - exit: - i_vpr_e(inst, "%s: current session not allowed\n", __func__); + if (!allow) + i_vpr_e(inst, "%s: current session not allowed\n", __func__); + return allow; } @@ -5187,7 +5266,7 @@ int msm_vidc_check_session_supported(struct msm_vidc_inst *inst) struct msm_vidc_inst_capability *capability; struct v4l2_format *fmt; u32 iwidth, owidth, iheight, oheight, min_width, min_height, - max_width, max_height, mbpf, max_mbpf; + max_width, max_height; bool allow = false, is_interlaced = false; int rc = 0; @@ -5197,26 +5276,23 @@ int msm_vidc_check_session_supported(struct msm_vidc_inst *inst) } capability = inst->capabilities; - rc = msm_vidc_check_mbps_supported(inst); - if (rc) - goto exit; - - rc = msm_vidc_check_mbpf_supported(inst); - if (rc) - goto exit; - if (is_image_session(inst) && is_secure_session(inst)) { i_vpr_e(inst, "%s: secure image session not supported\n", __func__); + rc = -EINVAL; goto exit; } - /* check image capabilities */ - if (is_image_encode_session(inst)) { - allow = msm_vidc_allow_image_encode_session(inst); - if (!allow) - goto exit; - return 0; - } + rc = msm_vidc_check_core_mbps(inst); + if (rc) + goto exit; + + rc = msm_vidc_check_core_mbpf(inst); + if (rc) + goto exit; + + rc = msm_vidc_check_inst_mbpf(inst); + if (rc) + goto exit; fmt = &inst->fmts[INPUT_PORT]; iwidth = fmt->fmt.pix_mp.width; @@ -5231,57 +5307,72 @@ int msm_vidc_check_session_supported(struct msm_vidc_inst *inst) max_width = capability->cap[SECURE_FRAME_WIDTH].max; min_height = capability->cap[SECURE_FRAME_HEIGHT].min; max_height = capability->cap[SECURE_FRAME_HEIGHT].max; - max_mbpf = capability->cap[SECURE_MBPF].max; } else if (is_encode_session(inst) && capability->cap[LOSSLESS].value) { min_width = capability->cap[LOSSLESS_FRAME_WIDTH].min; max_width = capability->cap[LOSSLESS_FRAME_WIDTH].max; min_height = capability->cap[LOSSLESS_FRAME_HEIGHT].min; max_height = capability->cap[LOSSLESS_FRAME_HEIGHT].max; - max_mbpf = capability->cap[LOSSLESS_MBPF].max; } else { min_width = capability->cap[FRAME_WIDTH].min; max_width = capability->cap[FRAME_WIDTH].max; min_height = capability->cap[FRAME_HEIGHT].min; max_height = capability->cap[FRAME_HEIGHT].max; - max_mbpf = capability->cap[MBPF].max; + } + + /* reject odd resolution session */ + if (is_encode_session(inst) && + (is_odd(iwidth) || is_odd(iheight) || is_odd(owidth) || is_odd(oheight))) { + i_vpr_e(inst, "%s: resolution is not even. input [%u x %u], output [%u x %u]\n", + __func__, iwidth, iheight, owidth, oheight); + rc = -EINVAL; + goto exit; + } + + /* check input width and height is in supported range */ + if (!in_range(iwidth, min_width, max_width) || !in_range(iheight, min_height, max_height)) { + i_vpr_e(inst, + "%s: unsupported input wxh [%u x %u], allowed range: [%u x %u] to [%u x %u]\n", + __func__, iwidth, iheight, min_width, min_height, max_width, max_height); + rc = -EINVAL; + goto exit; + } + + /* check output width and height is in supported range */ + if (!in_range(owidth, min_width, max_width) || !in_range(oheight, min_height, max_height)) { + i_vpr_e(inst, + "%s: unsupported output wxh [%u x %u], allowed range: [%u x %u] to [%u x %u]\n", + __func__, owidth, oheight, min_width, min_height, max_width, max_height); + rc = -EINVAL; + goto exit; + } + + /* check image capabilities */ + if (is_image_encode_session(inst)) { + allow = msm_vidc_allow_image_encode_session(inst); + if (!allow) { + rc = -EINVAL; + goto exit; + } + return 0; } /* check interlace supported resolution */ is_interlaced = capability->cap[CODED_FRAMES].value == CODED_FRAMES_INTERLACE; if (is_interlaced && (owidth > INTERLACE_WIDTH_MAX || oheight > INTERLACE_HEIGHT_MAX || NUM_MBS_PER_FRAME(owidth, oheight) > INTERLACE_MB_PER_FRAME_MAX)) { - i_vpr_e(inst, "unsupported interlace wxh [%u x %u], max [%u x %u]\n", - owidth, oheight, INTERLACE_WIDTH_MAX, INTERLACE_HEIGHT_MAX); + i_vpr_e(inst, "%s: unsupported interlace wxh [%u x %u], max [%u x %u]\n", + __func__, owidth, oheight, INTERLACE_WIDTH_MAX, INTERLACE_HEIGHT_MAX); + rc = -EINVAL; goto exit; } - /* reject odd resolution session */ - if (is_encode_session(inst) && - (is_odd(iwidth) || is_odd(iheight) || is_odd(owidth) || is_odd(oheight))) { - i_vpr_e(inst, "resolution is not even. input [%u x %u], output [%u x %u]\n", - iwidth, iheight, owidth, oheight); - goto exit; - } - - /* check width and height is in supported range */ - if (!in_range(owidth, min_width, max_width) || !in_range(oheight, min_height, max_height)) { - i_vpr_e(inst, "unsupported wxh [%u x %u], allowed range: [%u x %u] to [%u x %u]\n", - owidth, oheight, min_width, min_height, max_width, max_height); - goto exit; - } - - /* check current session mbpf */ - mbpf = msm_vidc_get_mbs_per_frame(inst); - if (mbpf > max_mbpf) { - i_vpr_e(inst, "unsupported mbpf %u, max %u\n", mbpf, max_mbpf); - goto exit; - } - - return 0; - exit: - i_vpr_e(inst, "%s: current session not supported\n", __func__); - return -EINVAL; + if (rc) { + i_vpr_e(inst, "%s: current session not supported\n", __func__); + msm_vidc_print_insts_info(inst->core); + } + + return rc; } int msm_vidc_check_scaling_supported(struct msm_vidc_inst *inst) From 65636fd2ad2c5fa3adaf0f33e68f51b200ba5d06 Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Fri, 28 May 2021 12:52:22 -0700 Subject: [PATCH 0324/1061] Revert "video: driver: always caliberate gop size" This reverts commit b35579ad54a33d0dbde55579f9442064a7e0c883. Change-Id: I5ba0b244f53068ae6f0d3225b278e1ddafc360c5 Signed-off-by: Darshana Patil --- driver/platform/waipio/src/msm_vidc_waipio.c | 9 ++++++--- driver/vidc/src/msm_vidc_control.c | 14 ++++++++++++-- 2 files changed, 18 insertions(+), 5 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 59caab05ea..c168aeded7 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -744,7 +744,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { HFI_PROP_LAYER_COUNT, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, - {BITRATE_MODE}, + {BITRATE_MODE, META_EVA_STATS}, {GOP_SIZE, B_FRAME, BIT_RATE}, msm_vidc_adjust_layer_count, msm_vidc_set_layer_count_and_type}, @@ -754,7 +754,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { HFI_PROP_LAYER_COUNT, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, - {BITRATE_MODE}, + {BITRATE_MODE, META_EVA_STATS}, {GOP_SIZE, B_FRAME, BIT_RATE}, msm_vidc_adjust_layer_count, msm_vidc_set_layer_count_and_type}, @@ -1330,7 +1330,10 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_EVA_STATS, - HFI_PROP_EVA_STAT_INFO}, + HFI_PROP_EVA_STAT_INFO, + CAP_FLAG_ROOT, + {0}, + {ENH_LAYER_COUNT}}, {META_BUF_TAG, DEC | ENC, CODECS_ALL, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 435923e8fd..a36de94ad2 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -1316,6 +1316,14 @@ static int msm_vidc_adjust_static_layer_count_and_type(struct msm_vidc_inst *ins goto exit; } + if (!inst->capabilities->cap[META_EVA_STATS].value && + hb_requested && (layer_count > 1)) { + layer_count = 1; + i_vpr_h(inst, + "%s: cvp disable supports only one enh layer HB\n", + __func__); + } + /* decide hfi layer type */ if (hb_requested) { inst->hfi_layer_type = HFI_HIER_B; @@ -1368,7 +1376,9 @@ int msm_vidc_adjust_layer_count(void *instance, struct v4l2_ctrl *ctrl) capability->cap[ENH_LAYER_COUNT].value; if (!is_parent_available(inst, ENH_LAYER_COUNT, - BITRATE_MODE, __func__)) + BITRATE_MODE, __func__) || + !is_parent_available(inst, ENH_LAYER_COUNT, + META_EVA_STATS, __func__)) return -EINVAL; if (!inst->vb2q[OUTPUT_PORT].streaming) { @@ -1419,7 +1429,7 @@ int msm_vidc_adjust_gop_size(void *instance, struct v4l2_ctrl *ctrl) /* * Layer encoding needs GOP size to be multiple of subgop size * And subgop size is 2 ^ number of enhancement layers. - */ + */ /* v4l2 layer count is the number of enhancement layers */ min_gop_size = 1 << enh_layer_count; From a33041f79952a01412fdc65527d4399011e53662 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Mon, 31 May 2021 15:49:12 +0530 Subject: [PATCH 0325/1061] video: driver: add scaling checks for encode session Encoder supports downscale with scaling ratio upto 1/8 of width and 1/8 of height. So added necessary scaling checks at streamon. Change-Id: I3a29b43c79cf4e693ba2c0d9f98ec24410d50fbd Signed-off-by: Govindaraj Rajagopal --- driver/platform/waipio/src/msm_vidc_waipio.c | 5 +-- .../variant/iris2/src/msm_vidc_buffer_iris2.c | 3 +- driver/vidc/inc/msm_vidc_driver.h | 6 ++++ driver/vidc/inc/msm_vidc_internal.h | 3 +- driver/vidc/src/msm_vdec.c | 4 --- driver/vidc/src/msm_venc.c | 11 ++---- driver/vidc/src/msm_vidc_driver.c | 34 ++++++++++++++++--- 7 files changed, 42 insertions(+), 24 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index c168aeded7..b331acc744 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -205,10 +205,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {OPERATING_RATE, ENC|DEC, CODECS_ALL, 1, INT_MAX, 1, (DEFAULT_FPS << 16)}, - {SCALE_X, ENC, H264|HEVC, 8192, 65536, 1, 8192}, - {SCALE_X, DEC, H264|HEVC|VP9, 65536, 65536, 1, 65536}, - {SCALE_Y, ENC, H264|HEVC, 8192, 65536, 1, 8192}, - {SCALE_Y, DEC, H264|HEVC|VP9, 65536, 65536, 1, 65536}, + {SCALE_FACTOR, ENC, H264|HEVC, 1, 8, 1, 8}, {MB_CYCLES_VSP, ENC, CODECS_ALL, 25, 25, 1, 25}, {MB_CYCLES_VSP, DEC, CODECS_ALL, 25, 25, 1, 25}, diff --git a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c index faff09f519..9219cc16cb 100644 --- a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c @@ -455,8 +455,7 @@ static u32 msm_vidc_encoder_vpss_size_iris2(struct msm_vidc_inst* inst) msm_vidc_v4l2_to_hfi_enum(inst, ROTATION, &rotation_val); f = &inst->fmts[OUTPUT_PORT]; - if (inst->capabilities->cap[ROTATION].value == 90 || - inst->capabilities->cap[ROTATION].value == 270) { + if (is_rotation_90_or_270(inst)) { /* * output width and height are rotated, * so unrotate them to use as arguments to diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 5e44a77fc1..b33fc70ca7 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -73,6 +73,12 @@ static inline is_scaling_enabled(struct msm_vidc_inst *inst) inst->crop.height != inst->compose.height; } +static inline is_rotation_90_or_270(struct msm_vidc_inst *inst) +{ + return inst->capabilities->cap[ROTATION].value == 90 || + inst->capabilities->cap[ROTATION].value == 270; +} + static inline is_internal_buffer(enum msm_vidc_buffer_type buffer_type) { return buffer_type == MSM_VIDC_BUF_BIN || diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index c3402c7ef0..bc77845c1d 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -347,8 +347,7 @@ enum msm_vidc_inst_capability_type { POWER_SAVE_MBPS, FRAME_RATE, OPERATING_RATE, - SCALE_X, - SCALE_Y, + SCALE_FACTOR, MB_CYCLES_VSP, MB_CYCLES_VPP, MB_CYCLES_LP, diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 17e42b1e66..b9f9f94381 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -1397,10 +1397,6 @@ int msm_vdec_streamon_input(struct msm_vidc_inst *inst) if (rc) goto error; - rc = msm_vidc_check_scaling_supported(inst); - if (rc) - goto error; - rc = msm_vdec_set_input_properties(inst); if (rc) goto error; diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index 308a0acd0f..caeb1d84f7 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -247,8 +247,7 @@ static int msm_venc_set_crop_offsets(struct msm_vidc_inst *inst, width = inst->compose.width; height = inst->compose.height; - if (inst->capabilities->cap[ROTATION].value == 90 || - inst->capabilities->cap[ROTATION].value == 270) { + if (is_rotation_90_or_270(inst)) { width = inst->compose.height; height = inst->compose.width; } @@ -1051,8 +1050,7 @@ int msm_venc_s_fmt_output(struct msm_vidc_inst *inst, struct v4l2_format *f) /* use rotated width height if rotation is enabled */ width = inst->compose.width; height = inst->compose.height; - if (inst->capabilities->cap[ROTATION].value == 90 || - inst->capabilities->cap[ROTATION].value == 270) { + if (is_rotation_90_or_270(inst)) { width = inst->compose.height; height = inst->compose.width; } @@ -1424,10 +1422,7 @@ int msm_venc_s_selection(struct msm_vidc_inst* inst, struct v4l2_selection* s) inst->compose.width = s->r.width; inst->compose.height= s->r.height; - if (inst->crop.left != inst->compose.left || - inst->crop.top != inst->compose.top || - inst->crop.width != inst->compose.width || - inst->crop.height != inst->compose.height) { + if (is_scaling_enabled(inst)) { i_vpr_h(inst, "%s: scaling enabled, crop: l %d t %d w %d h %d compose: l %d t %d w %d h %d\n", __func__, inst->crop.left, inst->crop.top, diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 8e0dcc83c2..38a0f049a6 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -67,8 +67,7 @@ static const struct msm_vidc_cap_name cap_name_arr[] = { {POWER_SAVE_MBPS, "POWER_SAVE_MBPS" }, {FRAME_RATE, "FRAME_RATE" }, {OPERATING_RATE, "OPERATING_RATE" }, - {SCALE_X, "SCALE_X" }, - {SCALE_Y, "SCALE_Y" }, + {SCALE_FACTOR, "SCALE_FACTOR" }, {MB_CYCLES_VSP, "MB_CYCLES_VSP" }, {MB_CYCLES_VPP, "MB_CYCLES_VPP" }, {MB_CYCLES_LP, "MB_CYCLES_LP" }, @@ -5377,7 +5376,9 @@ exit: int msm_vidc_check_scaling_supported(struct msm_vidc_inst *inst) { - if (!inst) { + u32 iwidth, owidth, iheight, oheight, ds_factor; + + if (!inst || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -5387,7 +5388,32 @@ int msm_vidc_check_scaling_supported(struct msm_vidc_inst *inst) return 0; } - /* todo: add scaling check for encode session */ + if (!is_scaling_enabled(inst)) { + i_vpr_h(inst, "%s: Scaling not enabled. skip scaling check\n", __func__); + return 0; + } + + iwidth = inst->crop.width; + iheight = inst->crop.height; + owidth = inst->compose.width; + oheight = inst->compose.height; + ds_factor = inst->capabilities->cap[SCALE_FACTOR].value; + + /* upscaling: encoder doesnot support upscaling */ + if (owidth > iwidth || oheight > iheight) { + i_vpr_e(inst, "%s: upscale not supported: input [%u x %u], output [%u x %u]\n", + __func__, iwidth, iheight, owidth, oheight); + return -EINVAL; + } + + /* downscaling: only supported upto 1/8 of width & 1/8 of height */ + if (iwidth > owidth * ds_factor || iheight > oheight * ds_factor) { + i_vpr_e(inst, + "%s: unsupported ratio: input [%u x %u], output [%u x %u], ratio %u\n", + __func__, iwidth, iheight, owidth, oheight, ds_factor); + return -EINVAL; + } + return 0; } From 31012cd79ed98eec94e37856cf3e3d23e3f661fc Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Tue, 1 Jun 2021 13:20:24 +0530 Subject: [PATCH 0326/1061] video: driver: queue pending buffers at streamon qbuf will be deferred on all ports before streamon, So explicitly queue pending buffers at the time of streamon. Change-Id: I673a14f0d43563184aac887f5f23b63ed13d59df Signed-off-by: Govindaraj Rajagopal --- driver/vidc/inc/msm_vdec.h | 1 - driver/vidc/inc/msm_vidc_driver.h | 7 ++++++- driver/vidc/src/msm_vdec.c | 2 +- driver/vidc/src/msm_vidc_driver.c | 8 ++++---- driver/vidc/src/msm_vidc_vb2.c | 10 ++++++++++ 5 files changed, 21 insertions(+), 7 deletions(-) diff --git a/driver/vidc/inc/msm_vdec.h b/driver/vidc/inc/msm_vdec.h index 7b2c724907..90e795ca3e 100644 --- a/driver/vidc/inc/msm_vdec.h +++ b/driver/vidc/inc/msm_vdec.h @@ -29,7 +29,6 @@ int msm_vdec_init_input_subcr_params(struct msm_vidc_inst *inst); int msm_vdec_input_port_settings_change(struct msm_vidc_inst *inst); int msm_vdec_output_port_settings_change(struct msm_vidc_inst *inst); int msm_vdec_process_cmd(struct msm_vidc_inst *inst, u32 cmd); -int msm_vidc_queue_buffer_batch(struct msm_vidc_inst *inst); int msm_vdec_handle_release_buffer(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buf); diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 5e44a77fc1..419e1d9abe 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -348,7 +348,12 @@ int msm_vidc_get_delayed_unmap(struct msm_vidc_inst *inst, struct msm_vidc_map *map); int msm_vidc_put_delayed_unmap(struct msm_vidc_inst *inst, struct msm_vidc_map *map); -int msm_vidc_queue_buffer_single(struct msm_vidc_inst *inst, struct vb2_buffer *vb2); +enum msm_vidc_buffer_type v4l2_type_to_driver(u32 type, + const char *func); +int msm_vidc_queue_buffer_single(struct msm_vidc_inst *inst, + struct vb2_buffer *vb2); +int msm_vidc_queue_deferred_buffers(struct msm_vidc_inst *inst, + enum msm_vidc_buffer_type buf_type); int msm_vidc_destroy_internal_buffer(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buffer); void msm_vidc_destroy_buffers(struct msm_vidc_inst *inst); diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 17e42b1e66..43105a2a38 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -1783,7 +1783,7 @@ static int msm_vdec_qbuf_batch(struct msm_vidc_inst *inst, cancel_batch_work(inst); } - rc = msm_vidc_queue_buffer_batch(inst); + rc = msm_vidc_queue_deferred_buffers(inst, MSM_VIDC_BUF_OUTPUT); if (rc) return rc; diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 8e0dcc83c2..425f42ffe7 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -2938,18 +2938,18 @@ static int msm_vidc_queue_buffer(struct msm_vidc_inst *inst, struct msm_vidc_buf return 0; } -int msm_vidc_queue_buffer_batch(struct msm_vidc_inst *inst) +int msm_vidc_queue_deferred_buffers(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type buf_type) { struct msm_vidc_buffers *buffers; struct msm_vidc_buffer *buf; int rc = 0; - if (!inst) { + if (!inst || !buf_type) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - buffers = msm_vidc_get_buffers(inst, MSM_VIDC_BUF_OUTPUT, __func__); + buffers = msm_vidc_get_buffers(inst, buf_type, __func__); if (!buffers) return -EINVAL; @@ -4488,7 +4488,7 @@ void msm_vidc_batch_handler(struct work_struct *work) } i_vpr_h(inst, "%s: queue pending batch buffers\n", __func__); - rc = msm_vidc_queue_buffer_batch(inst); + rc = msm_vidc_queue_deferred_buffers(inst, MSM_VIDC_BUF_OUTPUT); if (rc) { i_vpr_e(inst, "%s: batch qbufs failed\n", __func__); msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); diff --git a/driver/vidc/src/msm_vidc_vb2.c b/driver/vidc/src/msm_vidc_vb2.c index 7b35ceaf01..3a509bf295 100644 --- a/driver/vidc/src/msm_vidc_vb2.c +++ b/driver/vidc/src/msm_vidc_vb2.c @@ -151,6 +151,7 @@ int msm_vidc_start_streaming(struct vb2_queue *q, unsigned int count) { int rc = 0; struct msm_vidc_inst *inst; + enum msm_vidc_buffer_type buf_type; if (!q || !q->drv_priv) { d_vpr_e("%s: invalid input, q = %pK\n", q); @@ -226,6 +227,15 @@ int msm_vidc_start_streaming(struct vb2_queue *q, unsigned int count) /* print final buffer counts & size details */ msm_vidc_print_buffer_info(inst); + buf_type = v4l2_type_to_driver(q->type, __func__); + if (!buf_type) + goto error; + + /* queue pending buffers */ + rc = msm_vidc_queue_deferred_buffers(inst, buf_type); + if (rc) + goto error; + i_vpr_h(inst, "Streamon: %d successful\n", q->type); return rc; From 5a9c41e69da65e06d382dd8930341e2cb4d68683 Mon Sep 17 00:00:00 2001 From: Shi Zhongbo Date: Wed, 2 Jun 2021 15:18:53 +0800 Subject: [PATCH 0327/1061] video: driver: update metadata buffer size Update metadata buffer size after port resolution changes. Change-Id: Ieb9ce986500b4f06b5b0a324b4cd42ebae5c4d9e Signed-off-by: Shi Zhongbo --- driver/vidc/src/msm_venc.c | 8 +++++++- driver/vidc/src/msm_vidc_buffer.c | 1 + 2 files changed, 8 insertions(+), 1 deletion(-) diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index 308a0acd0f..2bf914d316 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -1090,6 +1090,9 @@ int msm_venc_s_fmt_output(struct msm_vidc_inst *inst, struct v4l2_format *f) fmt->fmt.pix_mp.plane_fmt[0].sizeimage; memcpy(f, fmt, sizeof(struct v4l2_format)); + /* reset metadata buffer size with updated resolution*/ + msm_vidc_update_meta_port_settings(inst); + return rc; } @@ -1224,6 +1227,9 @@ static int msm_venc_s_fmt_input(struct msm_vidc_inst *inst, struct v4l2_format * } memcpy(f, fmt, sizeof(struct v4l2_format)); + /* reset metadata buffer size with updated resolution*/ + msm_vidc_update_meta_port_settings(inst); + return rc; } @@ -1244,7 +1250,7 @@ static int msm_venc_s_fmt_input_meta(struct msm_vidc_inst *inst, struct v4l2_for fmt->fmt.meta.dataformat = V4L2_META_FMT_VIDC; if (is_input_meta_enabled(inst)) { fmt->fmt.meta.buffersize = call_session_op(core, - buffer_size, inst, MSM_VIDC_BUF_OUTPUT_META); + buffer_size, inst, MSM_VIDC_BUF_INPUT_META); inst->buffers.input_meta.min_count = inst->buffers.input.min_count; inst->buffers.input_meta.extra_count = diff --git a/driver/vidc/src/msm_vidc_buffer.c b/driver/vidc/src/msm_vidc_buffer.c index c444b27c08..46f799fae3 100644 --- a/driver/vidc/src/msm_vidc_buffer.c +++ b/driver/vidc/src/msm_vidc_buffer.c @@ -382,6 +382,7 @@ u32 msm_vidc_encoder_input_meta_size(struct msm_vidc_inst *inst) f = &inst->fmts[INPUT_PORT]; size += ROI_METADATA_SIZE(f->fmt.pix_mp.width, f->fmt.pix_mp.height, lcu_size); + size = ALIGN(size, SZ_4K); } return size; } From 5996ceb8d2e6900e09f76c154816d7d4d7f8a577 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Wed, 2 Jun 2021 14:48:32 +0530 Subject: [PATCH 0328/1061] video: driver: fix race between driver fd close and ioctl calls Userspace is allowed to close driver fd at anytime, even in middle of ongoing session. So it will create a problem, if multiple ioctls were waiting for &inst->lock() and msm_vidc_close() acquired the &inst->lock and cleaned up all session specific resources including vb2 queues, v4l2_fh file handles and all buffers and finally frees inst itself, as part of put_inst(). So once that is done, other enties waiting on &inst->lock will get chance, but by that time, everything is freed. So proceeding that cmd will completely lead to undefined behaviour and target reset will happen. Added change to avoid above mentioned scenario by Incrementing inst refcount everytime before proceeding any ioctls and acquired &inst->lock to avoid concurrent access between ioctls. Currently &inst->lock was not acquired except for reqbuf, qbuf, dqbuf ioctls. But it is good to acquire lock at every ioctl types. This will help avoid corner cases, such as during ipsc, all port setting were updated to inst structure, So if userspace attempts any ioctl(like g_ctrl) without lock, it might get intermittent value, which is wrong. Change-Id: Ic4bdf562f7036f3796019fe45d1cdc392045878a Signed-off-by: Govindaraj Rajagopal --- driver/vidc/src/msm_vidc.c | 70 ++-- driver/vidc/src/msm_vidc_driver.c | 14 +- driver/vidc/src/msm_vidc_v4l2.c | 506 ++++++++++++++++++++++----- driver/vidc/src/venus_hfi_response.c | 16 +- 4 files changed, 470 insertions(+), 136 deletions(-) diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index 34cb80e348..87e3966693 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -267,10 +267,10 @@ int msm_vidc_g_fmt(void *instance, struct v4l2_format *f) } EXPORT_SYMBOL(msm_vidc_g_fmt); -int msm_vidc_s_selection(void* instance, struct v4l2_selection* s) +int msm_vidc_s_selection(void *instance, struct v4l2_selection *s) { int rc = 0; - struct msm_vidc_inst* inst = instance; + struct msm_vidc_inst *inst = instance; if (!inst || !s) { d_vpr_e("%s: invalid params\n", __func__); @@ -286,10 +286,10 @@ int msm_vidc_s_selection(void* instance, struct v4l2_selection* s) } EXPORT_SYMBOL(msm_vidc_s_selection); -int msm_vidc_g_selection(void* instance, struct v4l2_selection* s) +int msm_vidc_g_selection(void *instance, struct v4l2_selection *s) { int rc = 0; - struct msm_vidc_inst* inst = instance; + struct msm_vidc_inst *inst = instance; if (!inst || !s) { d_vpr_e("%s: invalid params\n", __func__); @@ -402,28 +402,25 @@ int msm_vidc_reqbufs(void *instance, struct v4l2_requestbuffers *b) return -EINVAL; } - mutex_lock(&inst->lock); - if (!msm_vidc_allow_reqbufs(inst, b->type)) { rc = -EBUSY; - goto unlock; + goto exit; } port = v4l2_type_to_driver_port(inst, b->type, __func__); if (port < 0) { rc = -EINVAL; - goto unlock; + goto exit; } rc = vb2_reqbufs(&inst->vb2q[port], b); if (rc) { i_vpr_e(inst, "%s: vb2_reqbufs(%d) failed, %d\n", __func__, b->type, rc); - goto unlock; + goto exit; } -unlock: - mutex_unlock(&inst->lock); +exit: return rc; } EXPORT_SYMBOL(msm_vidc_reqbufs); @@ -440,27 +437,23 @@ int msm_vidc_qbuf(void *instance, struct media_device *mdev, return -EINVAL; } - mutex_lock(&inst->lock); - if (is_session_error(inst)) { rc = -EBUSY; - goto unlock; + goto exit; } q = msm_vidc_get_vb2q(inst, b->type, __func__); if (!q) { rc = -EINVAL; - goto unlock; + goto exit; } - inst->last_qbuf_time_ns = ktime_get_ns(); rc = vb2_qbuf(q, mdev, b); if (rc) i_vpr_e(inst, "%s: failed with %d\n", __func__, rc); -unlock: - mutex_unlock(&inst->lock); +exit: return rc; } EXPORT_SYMBOL(msm_vidc_qbuf); @@ -476,24 +469,21 @@ int msm_vidc_dqbuf(void *instance, struct v4l2_buffer *b) return -EINVAL; } - mutex_lock(&inst->lock); - q = msm_vidc_get_vb2q(inst, b->type, __func__); if (!q) { rc = -EINVAL; - goto unlock; + goto exit; } rc = vb2_dqbuf(q, b, true); if (rc == -EAGAIN) { - goto unlock; + goto exit; } else if (rc) { i_vpr_l(inst, "%s: failed with %d\n", __func__, rc); - goto unlock; + goto exit; } -unlock: - mutex_unlock(&inst->lock); +exit: return rc; } EXPORT_SYMBOL(msm_vidc_dqbuf); @@ -509,20 +499,18 @@ int msm_vidc_streamon(void *instance, enum v4l2_buf_type type) return -EINVAL; } - mutex_lock(&inst->lock); - if (!msm_vidc_allow_streamon(inst, type)) { rc = -EBUSY; - goto unlock; + goto exit; } rc = msm_vidc_state_change_streamon(inst, type); if (rc) - goto unlock; + goto exit; port = v4l2_type_to_driver_port(inst, type, __func__); if (port < 0) { rc = -EINVAL; - goto unlock; + goto exit; } rc = vb2_streamon(&inst->vb2q[port], type); @@ -530,11 +518,10 @@ int msm_vidc_streamon(void *instance, enum v4l2_buf_type type) i_vpr_e(inst, "%s: vb2_streamon(%d) failed, %d\n", __func__, type, rc); msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); - goto unlock; + goto exit; } -unlock: - mutex_unlock(&inst->lock); +exit: return rc; } EXPORT_SYMBOL(msm_vidc_streamon); @@ -550,20 +537,18 @@ int msm_vidc_streamoff(void *instance, enum v4l2_buf_type type) return -EINVAL; } - mutex_lock(&inst->lock); - if (!msm_vidc_allow_streamoff(inst, type)) { rc = -EBUSY; - goto unlock; + goto exit; } rc = msm_vidc_state_change_streamoff(inst, type); if (rc) - goto unlock; + goto exit; port = v4l2_type_to_driver_port(inst, type, __func__); if (port < 0) { rc = -EINVAL; - goto unlock; + goto exit; } rc = vb2_streamoff(&inst->vb2q[port], type); @@ -571,11 +556,10 @@ int msm_vidc_streamoff(void *instance, enum v4l2_buf_type type) i_vpr_e(inst, "%s: vb2_streamoff(%d) failed, %d\n", __func__, type, rc); msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); - goto unlock; + goto exit; } -unlock: - mutex_unlock(&inst->lock); +exit: return rc; } EXPORT_SYMBOL(msm_vidc_streamoff); @@ -915,11 +899,11 @@ int msm_vidc_close(void *instance) core = inst->core; i_vpr_h(inst, "%s()\n", __func__); - mutex_lock(&inst->lock); + inst_lock(inst, __func__); msm_vidc_session_close(inst); msm_vidc_remove_session(inst); msm_vidc_destroy_buffers(inst); - mutex_unlock(&inst->lock); + inst_unlock(inst, __func__); msm_vidc_show_stats(inst); put_inst(inst); msm_vidc_schedule_core_deinit(core); diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 8e0dcc83c2..b6e3c72b56 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -3711,7 +3711,7 @@ int msm_vidc_session_streamoff(struct msm_vidc_inst *inst, core = inst->core; i_vpr_h(inst, "%s: wait on port: %d for time: %d ms\n", __func__, port, core->capabilities[HW_RESPONSE_TIMEOUT].value); - mutex_unlock(&inst->lock); + inst_unlock(inst, __func__); rc = wait_for_completion_timeout( &inst->completions[signal_type], msecs_to_jiffies( @@ -3724,7 +3724,7 @@ int msm_vidc_session_streamoff(struct msm_vidc_inst *inst, } else { rc = 0; } - mutex_lock(&inst->lock); + inst_lock(inst, __func__); if(rc) goto error; @@ -3775,7 +3775,7 @@ int msm_vidc_session_close(struct msm_vidc_inst *inst) core = inst->core; i_vpr_h(inst, "%s: wait on close for time: %d ms\n", __func__, core->capabilities[HW_RESPONSE_TIMEOUT].value); - mutex_unlock(&inst->lock); + inst_unlock(inst, __func__); rc = wait_for_completion_timeout( &inst->completions[SIGNAL_CMD_CLOSE], msecs_to_jiffies( @@ -3788,7 +3788,7 @@ int msm_vidc_session_close(struct msm_vidc_inst *inst) rc = 0; i_vpr_h(inst, "%s: close successful\n", __func__); } - mutex_lock(&inst->lock); + inst_lock(inst, __func__); msm_vidc_remove_session(inst); @@ -4499,7 +4499,7 @@ exit: put_inst(inst); } -int msm_vidc_flush_buffers(struct msm_vidc_inst* inst, +int msm_vidc_flush_buffers(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type type) { int rc = 0; @@ -4766,7 +4766,7 @@ void put_inst(struct msm_vidc_inst *inst) kref_put(&inst->kref, msm_vidc_close_helper); } -bool core_lock_check(struct msm_vidc_core *core, const char* func) +bool core_lock_check(struct msm_vidc_core *core, const char *func) { return mutex_is_locked(&core->lock); } @@ -4781,7 +4781,7 @@ void core_unlock(struct msm_vidc_core *core, const char *function) mutex_unlock(&core->lock); } -bool inst_lock_check(struct msm_vidc_inst *inst, const char* func) +bool inst_lock_check(struct msm_vidc_inst *inst, const char *func) { return mutex_is_locked(&inst->lock); } diff --git a/driver/vidc/src/msm_vidc_v4l2.c b/driver/vidc/src/msm_vidc_v4l2.c index 7d57e440d4..c7cdcc2053 100644 --- a/driver/vidc/src/msm_vidc_v4l2.c +++ b/driver/vidc/src/msm_vidc_v4l2.c @@ -8,8 +8,11 @@ #include "msm_vidc_core.h" #include "msm_vidc_inst.h" #include "msm_vidc_debug.h" +#include "msm_vidc_driver.h" #include "msm_vidc.h" +extern struct msm_vidc_core *g_core; + static struct msm_vidc_inst *get_vidc_inst(struct file *filp, void *fh) { if (!filp || !filp->private_data) @@ -20,9 +23,9 @@ static struct msm_vidc_inst *get_vidc_inst(struct file *filp, void *fh) unsigned int msm_v4l2_poll(struct file *filp, struct poll_table_struct *pt) { - struct msm_vidc_inst *vidc_inst = get_vidc_inst(filp, NULL); + struct msm_vidc_inst *inst = get_vidc_inst(filp, NULL); - return msm_vidc_poll((void *)vidc_inst, filp, pt); + return msm_vidc_poll((void *)inst, filp, pt); } int msm_v4l2_open(struct file *filp) @@ -31,27 +34,27 @@ int msm_v4l2_open(struct file *filp) struct msm_video_device *vid_dev = container_of(vdev, struct msm_video_device, vdev); struct msm_vidc_core *core = video_drvdata(filp); - struct msm_vidc_inst *vidc_inst; + struct msm_vidc_inst *inst; - vidc_inst = msm_vidc_open(core, vid_dev->type); - if (!vidc_inst) { + inst = msm_vidc_open(core, vid_dev->type); + if (!inst) { d_vpr_e("Failed to create instance, type = %d\n", vid_dev->type); return -ENOMEM; } clear_bit(V4L2_FL_USES_V4L2_FH, &vdev->flags); - filp->private_data = &(vidc_inst->event_handler); + filp->private_data = &(inst->event_handler); return 0; } int msm_v4l2_close(struct file *filp) { int rc = 0; - struct msm_vidc_inst *vidc_inst; + struct msm_vidc_inst *inst; - vidc_inst = get_vidc_inst(filp, NULL); + inst = get_vidc_inst(filp, NULL); - rc = msm_vidc_close(vidc_inst); + rc = msm_vidc_close(inst); filp->private_data = NULL; return rc; } @@ -59,182 +62,529 @@ int msm_v4l2_close(struct file *filp) int msm_v4l2_querycap(struct file *filp, void *fh, struct v4l2_capability *cap) { - struct msm_vidc_inst *vidc_inst = get_vidc_inst(filp, fh); + struct msm_vidc_inst *inst = get_vidc_inst(filp, fh); + int rc = 0; - return msm_vidc_querycap((void *)vidc_inst, cap); + inst = get_inst_ref(g_core, inst); + if (!inst) { + d_vpr_e("%s: invalid instance\n", __func__); + return -EINVAL; + } + + inst_lock(inst, __func__); + rc = msm_vidc_querycap((void *)inst, cap); + if (rc) + i_vpr_e(inst, "%s: failed with %d\n", __func__, rc); + inst_unlock(inst, __func__); + + put_inst(inst); + + return rc; } -int msm_v4l2_enum_fmt(struct file *file, void *fh, +int msm_v4l2_enum_fmt(struct file *filp, void *fh, struct v4l2_fmtdesc *f) { - struct msm_vidc_inst *vidc_inst = get_vidc_inst(file, fh); + struct msm_vidc_inst *inst = get_vidc_inst(filp, fh); + int rc = 0; - return msm_vidc_enum_fmt((void *)vidc_inst, f); + inst = get_inst_ref(g_core, inst); + if (!inst) { + d_vpr_e("%s: invalid instance\n", __func__); + return -EINVAL; + } + + inst_lock(inst, __func__); + rc = msm_vidc_enum_fmt((void *)inst, f); + if (rc) + i_vpr_e(inst, "%s: failed with %d\n", __func__, rc); + inst_unlock(inst, __func__); + + put_inst(inst); + + return rc; } -int msm_v4l2_s_fmt(struct file *file, void *fh, +int msm_v4l2_s_fmt(struct file *filp, void *fh, struct v4l2_format *f) { - struct msm_vidc_inst *vidc_inst = get_vidc_inst(file, fh); + struct msm_vidc_inst *inst = get_vidc_inst(filp, fh); + int rc = 0; - return msm_vidc_s_fmt((void *)vidc_inst, f); + inst = get_inst_ref(g_core, inst); + if (!inst) { + d_vpr_e("%s: invalid instance\n", __func__); + return -EINVAL; + } + + inst_lock(inst, __func__); + rc = msm_vidc_s_fmt((void *)inst, f); + if (rc) + i_vpr_e(inst, "%s: failed with %d\n", __func__, rc); + inst_unlock(inst, __func__); + + put_inst(inst); + + return rc; } -int msm_v4l2_g_fmt(struct file *file, void *fh, +int msm_v4l2_g_fmt(struct file *filp, void *fh, struct v4l2_format *f) { - struct msm_vidc_inst *vidc_inst = get_vidc_inst(file, fh); + struct msm_vidc_inst *inst = get_vidc_inst(filp, fh); + int rc = 0; - return msm_vidc_g_fmt((void *)vidc_inst, f); + inst = get_inst_ref(g_core, inst); + if (!inst) { + d_vpr_e("%s: invalid instance\n", __func__); + return -EINVAL; + } + + inst_lock(inst, __func__); + rc = msm_vidc_g_fmt((void *)inst, f); + if (rc) + i_vpr_e(inst, "%s: failed with %d\n", __func__, rc); + inst_unlock(inst, __func__); + + put_inst(inst); + + return rc; } -int msm_v4l2_s_selection(struct file* file, void* fh, - struct v4l2_selection* s) +int msm_v4l2_s_selection(struct file *filp, void *fh, + struct v4l2_selection *s) { - struct msm_vidc_inst* vidc_inst = get_vidc_inst(file, fh); + struct msm_vidc_inst *inst = get_vidc_inst(filp, fh); + int rc = 0; - return msm_vidc_s_selection((void*)vidc_inst, s); + inst = get_inst_ref(g_core, inst); + if (!inst) { + d_vpr_e("%s: invalid instance\n", __func__); + return -EINVAL; + } + + inst_lock(inst, __func__); + rc = msm_vidc_s_selection((void *)inst, s); + if (rc) + i_vpr_e(inst, "%s: failed with %d\n", __func__, rc); + inst_unlock(inst, __func__); + + put_inst(inst); + + return rc; } -int msm_v4l2_g_selection(struct file* file, void* fh, - struct v4l2_selection* s) +int msm_v4l2_g_selection(struct file *filp, void *fh, + struct v4l2_selection *s) { - struct msm_vidc_inst* vidc_inst = get_vidc_inst(file, fh); + struct msm_vidc_inst *inst = get_vidc_inst(filp, fh); + int rc = 0; - return msm_vidc_g_selection((void*)vidc_inst, s); + inst = get_inst_ref(g_core, inst); + if (!inst) { + d_vpr_e("%s: invalid instance\n", __func__); + return -EINVAL; + } + + inst_lock(inst, __func__); + rc = msm_vidc_g_selection((void *)inst, s); + if (rc) + i_vpr_e(inst, "%s: failed with %d\n", __func__, rc); + inst_unlock(inst, __func__); + + put_inst(inst); + + return rc; } -int msm_v4l2_s_parm(struct file *file, void *fh, +int msm_v4l2_s_parm(struct file *filp, void *fh, struct v4l2_streamparm *a) { - struct msm_vidc_inst *vidc_inst = get_vidc_inst(file, fh); + struct msm_vidc_inst *inst = get_vidc_inst(filp, fh); + int rc = 0; - return msm_vidc_s_param((void *)vidc_inst, a); + inst = get_inst_ref(g_core, inst); + if (!inst) { + d_vpr_e("%s: invalid instance\n", __func__); + return -EINVAL; + } + + inst_lock(inst, __func__); + rc = msm_vidc_s_param((void *)inst, a); + if (rc) + i_vpr_e(inst, "%s: failed with %d\n", __func__, rc); + inst_unlock(inst, __func__); + + put_inst(inst); + + return rc; } -int msm_v4l2_g_parm(struct file *file, void *fh, +int msm_v4l2_g_parm(struct file *filp, void *fh, struct v4l2_streamparm *a) { - struct msm_vidc_inst *vidc_inst = get_vidc_inst(file, fh); + struct msm_vidc_inst *inst = get_vidc_inst(filp, fh); + int rc = 0; - return msm_vidc_g_param((void *)vidc_inst, a); + inst = get_inst_ref(g_core, inst); + if (!inst) { + d_vpr_e("%s: invalid instance\n", __func__); + return -EINVAL; + } + + inst_lock(inst, __func__); + rc = msm_vidc_g_param((void *)inst, a); + if (rc) + i_vpr_e(inst, "%s: failed with %d\n", __func__, rc); + inst_unlock(inst, __func__); + + put_inst(inst); + + return rc; } -int msm_v4l2_s_ctrl(struct file *file, void *fh, +int msm_v4l2_s_ctrl(struct file *filp, void *fh, struct v4l2_control *a) { - struct msm_vidc_inst *vidc_inst = get_vidc_inst(file, fh); + struct msm_vidc_inst *inst = get_vidc_inst(filp, fh); + int rc = 0; - return msm_vidc_s_ctrl((void *)vidc_inst, a); + inst = get_inst_ref(g_core, inst); + if (!inst) { + d_vpr_e("%s: invalid instance\n", __func__); + return -EINVAL; + } + + inst_lock(inst, __func__); + rc = msm_vidc_s_ctrl((void *)inst, a); + if (rc) + i_vpr_e(inst, "%s: failed with %d\n", __func__, rc); + inst_unlock(inst, __func__); + + put_inst(inst); + + return rc; } -int msm_v4l2_g_ctrl(struct file *file, void *fh, +int msm_v4l2_g_ctrl(struct file *filp, void *fh, struct v4l2_control *a) { - struct msm_vidc_inst *vidc_inst = get_vidc_inst(file, fh); + struct msm_vidc_inst *inst = get_vidc_inst(filp, fh); + int rc = 0; - return msm_vidc_g_ctrl((void *)vidc_inst, a); + inst = get_inst_ref(g_core, inst); + if (!inst) { + d_vpr_e("%s: invalid instance\n", __func__); + return -EINVAL; + } + + inst_lock(inst, __func__); + rc = msm_vidc_g_ctrl((void *)inst, a); + if (rc) + i_vpr_e(inst, "%s: failed with %d\n", __func__, rc); + inst_unlock(inst, __func__); + + put_inst(inst); + + return rc; } -int msm_v4l2_reqbufs(struct file *file, void *fh, +int msm_v4l2_reqbufs(struct file *filp, void *fh, struct v4l2_requestbuffers *b) { - struct msm_vidc_inst *vidc_inst = get_vidc_inst(file, fh); + struct msm_vidc_inst *inst = get_vidc_inst(filp, fh); + int rc = 0; - return msm_vidc_reqbufs((void *)vidc_inst, b); + inst = get_inst_ref(g_core, inst); + if (!inst) { + d_vpr_e("%s: invalid instance\n", __func__); + return -EINVAL; + } + + inst_lock(inst, __func__); + rc = msm_vidc_reqbufs((void *)inst, b); + if (rc) + i_vpr_e(inst, "%s: failed with %d\n", __func__, rc); + inst_unlock(inst, __func__); + + put_inst(inst); + + return rc; } -int msm_v4l2_qbuf(struct file *file, void *fh, +int msm_v4l2_qbuf(struct file *filp, void *fh, struct v4l2_buffer *b) { - struct video_device *vdev = video_devdata(file); - return msm_vidc_qbuf(get_vidc_inst(file, fh), vdev->v4l2_dev->mdev, b); + struct msm_vidc_inst *inst = get_vidc_inst(filp, fh); + struct video_device *vdev = video_devdata(filp); + int rc = 0; + + inst = get_inst_ref(g_core, inst); + if (!inst) { + d_vpr_e("%s: invalid instance\n", __func__); + return -EINVAL; + } + + inst_lock(inst, __func__); + rc = msm_vidc_qbuf(inst, vdev->v4l2_dev->mdev, b); + if (rc) + i_vpr_e(inst, "%s: failed with %d\n", __func__, rc); + inst_unlock(inst, __func__); + + put_inst(inst); + + return rc; } -int msm_v4l2_dqbuf(struct file *file, void *fh, +int msm_v4l2_dqbuf(struct file *filp, void *fh, struct v4l2_buffer *b) { - return msm_vidc_dqbuf(get_vidc_inst(file, fh), b); + struct msm_vidc_inst *inst = get_vidc_inst(filp, fh); + int rc = 0; + + inst = get_inst_ref(g_core, inst); + if (!inst) { + d_vpr_e("%s: invalid instance\n", __func__); + return -EINVAL; + } + + inst_lock(inst, __func__); + rc = msm_vidc_dqbuf(inst, b); + inst_unlock(inst, __func__); + + put_inst(inst); + + return rc; } -int msm_v4l2_streamon(struct file *file, void *fh, +int msm_v4l2_streamon(struct file *filp, void *fh, enum v4l2_buf_type i) { - struct msm_vidc_inst *vidc_inst = get_vidc_inst(file, fh); + struct msm_vidc_inst *inst = get_vidc_inst(filp, fh); + int rc = 0; - return msm_vidc_streamon((void *)vidc_inst, i); + inst = get_inst_ref(g_core, inst); + if (!inst) { + d_vpr_e("%s: invalid instance\n", __func__); + return -EINVAL; + } + + inst_lock(inst, __func__); + rc = msm_vidc_streamon((void *)inst, i); + if (rc) + i_vpr_e(inst, "%s: failed with %d\n", __func__, rc); + inst_unlock(inst, __func__); + + put_inst(inst); + + return rc; } -int msm_v4l2_streamoff(struct file *file, void *fh, +int msm_v4l2_streamoff(struct file *filp, void *fh, enum v4l2_buf_type i) { - struct msm_vidc_inst *vidc_inst = get_vidc_inst(file, fh); + struct msm_vidc_inst *inst = get_vidc_inst(filp, fh); + int rc = 0; - return msm_vidc_streamoff((void *)vidc_inst, i); + inst = get_inst_ref(g_core, inst); + if (!inst) { + d_vpr_e("%s: invalid instance\n", __func__); + return -EINVAL; + } + + inst_lock(inst, __func__); + rc = msm_vidc_streamoff((void *)inst, i); + if (rc) + i_vpr_e(inst, "%s: failed with %d\n", __func__, rc); + inst_unlock(inst, __func__); + + put_inst(inst); + + return rc; } int msm_v4l2_subscribe_event(struct v4l2_fh *fh, const struct v4l2_event_subscription *sub) { - struct msm_vidc_inst *vidc_inst = container_of(fh, - struct msm_vidc_inst, event_handler); + struct msm_vidc_inst *inst; + int rc = 0; - return msm_vidc_subscribe_event((void *)vidc_inst, sub); + inst = container_of(fh, struct msm_vidc_inst, event_handler); + inst = get_inst_ref(g_core, inst); + if (!inst) { + d_vpr_e("%s: invalid instance\n", __func__); + return -EINVAL; + } + + inst_lock(inst, __func__); + rc = msm_vidc_subscribe_event((void *)inst, sub); + if (rc) + i_vpr_e(inst, "%s: failed with %d\n", __func__, rc); + inst_unlock(inst, __func__); + + put_inst(inst); + + return rc; } int msm_v4l2_unsubscribe_event(struct v4l2_fh *fh, const struct v4l2_event_subscription *sub) { - struct msm_vidc_inst *vidc_inst = container_of(fh, - struct msm_vidc_inst, event_handler); + struct msm_vidc_inst *inst; + int rc = 0; - return msm_vidc_unsubscribe_event((void *)vidc_inst, sub); + inst = container_of(fh, struct msm_vidc_inst, event_handler); + inst = get_inst_ref(g_core, inst); + if (!inst) { + d_vpr_e("%s: invalid instance\n", __func__); + return -EINVAL; + } + + inst_lock(inst, __func__); + rc = msm_vidc_unsubscribe_event((void *)inst, sub); + if (rc) + i_vpr_e(inst, "%s: failed with %d\n", __func__, rc); + inst_unlock(inst, __func__); + + put_inst(inst); + + return rc; } -int msm_v4l2_decoder_cmd(struct file *file, void *fh, +int msm_v4l2_decoder_cmd(struct file *filp, void *fh, struct v4l2_decoder_cmd *dec) { - struct msm_vidc_inst *vidc_inst = get_vidc_inst(file, fh); + struct msm_vidc_inst *inst = get_vidc_inst(filp, fh); + int rc = 0; - return msm_vidc_cmd((void *)vidc_inst, (union msm_v4l2_cmd *)dec); + inst = get_inst_ref(g_core, inst); + if (!inst) { + d_vpr_e("%s: invalid instance\n", __func__); + return -EINVAL; + } + + inst_lock(inst, __func__); + rc = msm_vidc_cmd((void *)inst, (union msm_v4l2_cmd *)dec); + if (rc) + i_vpr_e(inst, "%s: failed with %d\n", __func__, rc); + inst_unlock(inst, __func__); + + put_inst(inst); + + return rc; } -int msm_v4l2_encoder_cmd(struct file *file, void *fh, +int msm_v4l2_encoder_cmd(struct file *filp, void *fh, struct v4l2_encoder_cmd *enc) { - struct msm_vidc_inst *vidc_inst = get_vidc_inst(file, fh); + struct msm_vidc_inst *inst = get_vidc_inst(filp, fh); + int rc = 0; - return msm_vidc_cmd((void *)vidc_inst, (union msm_v4l2_cmd *)enc); + inst = get_inst_ref(g_core, inst); + if (!inst) { + d_vpr_e("%s: invalid instance\n", __func__); + return -EINVAL; + } + + inst_lock(inst, __func__); + rc = msm_vidc_cmd((void *)inst, (union msm_v4l2_cmd *)enc); + if (rc) + i_vpr_e(inst, "%s: failed with %d\n", __func__, rc); + inst_unlock(inst, __func__); + + put_inst(inst); + + return rc; } -int msm_v4l2_enum_framesizes(struct file *file, void *fh, +int msm_v4l2_enum_framesizes(struct file *filp, void *fh, struct v4l2_frmsizeenum *fsize) { - struct msm_vidc_inst *vidc_inst = get_vidc_inst(file, fh); + struct msm_vidc_inst *inst = get_vidc_inst(filp, fh); + int rc = 0; - return msm_vidc_enum_framesizes((void *)vidc_inst, fsize); + inst = get_inst_ref(g_core, inst); + if (!inst) { + d_vpr_e("%s: invalid instance\n", __func__); + return -EINVAL; + } + + inst_lock(inst, __func__); + rc = msm_vidc_enum_framesizes((void *)inst, fsize); + if (rc) + i_vpr_e(inst, "%s: failed with %d\n", __func__, rc); + inst_unlock(inst, __func__); + + put_inst(inst); + + return rc; } -int msm_v4l2_enum_frameintervals(struct file *file, void *fh, +int msm_v4l2_enum_frameintervals(struct file *filp, void *fh, struct v4l2_frmivalenum *fival) { - struct msm_vidc_inst *vidc_inst = get_vidc_inst(file, fh); + struct msm_vidc_inst *inst = get_vidc_inst(filp, fh); + int rc = 0; - return msm_vidc_enum_frameintervals((void *)vidc_inst, fival); + inst = get_inst_ref(g_core, inst); + if (!inst) { + d_vpr_e("%s: invalid instance\n", __func__); + return -EINVAL; + } + + inst_lock(inst, __func__); + rc = msm_vidc_enum_frameintervals((void *)inst, fival); + if (rc) + i_vpr_e(inst, "%s: failed with %d\n", __func__, rc); + inst_unlock(inst, __func__); + + put_inst(inst); + + return rc; } -int msm_v4l2_queryctrl(struct file *file, void *fh, +int msm_v4l2_queryctrl(struct file *filp, void *fh, struct v4l2_queryctrl *ctrl) { - struct msm_vidc_inst *vidc_inst = get_vidc_inst(file, fh); + struct msm_vidc_inst *inst = get_vidc_inst(filp, fh); + int rc = 0; - return msm_vidc_query_ctrl((void *)vidc_inst, ctrl); + inst = get_inst_ref(g_core, inst); + if (!inst) { + d_vpr_e("%s: invalid instance\n", __func__); + return -EINVAL; + } + + inst_lock(inst, __func__); + rc = msm_vidc_query_ctrl((void *)inst, ctrl); + if (rc) + i_vpr_e(inst, "%s: failed with %d\n", __func__, rc); + inst_unlock(inst, __func__); + + put_inst(inst); + + return rc; } -int msm_v4l2_querymenu(struct file *file, void *fh, +int msm_v4l2_querymenu(struct file *filp, void *fh, struct v4l2_querymenu *qmenu) { - struct msm_vidc_inst *vidc_inst = get_vidc_inst(file, fh); + struct msm_vidc_inst *inst = get_vidc_inst(filp, fh); + int rc = 0; - return msm_vidc_query_menu((void *)vidc_inst, qmenu); + inst = get_inst_ref(g_core, inst); + if (!inst) { + d_vpr_e("%s: invalid instance\n", __func__); + return -EINVAL; + } + + inst_lock(inst, __func__); + rc = msm_vidc_query_menu((void *)inst, qmenu); + if (rc) + i_vpr_e(inst, "%s: failed with %d\n", __func__, rc); + inst_unlock(inst, __func__); + + put_inst(inst); + + return rc; } diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index 03164c3754..b916a66794 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -883,13 +883,13 @@ static int handle_output_metadata_buffer(struct msm_vidc_inst *inst, return rc; } -static int handle_dequeue_buffers(struct msm_vidc_inst* inst) +static int handle_dequeue_buffers(struct msm_vidc_inst *inst) { int rc = 0; int i; - struct msm_vidc_buffers* buffers; - struct msm_vidc_buffer* buf; - struct msm_vidc_buffer* dummy; + struct msm_vidc_buffers *buffers; + struct msm_vidc_buffer *buf; + struct msm_vidc_buffer *dummy; static const enum msm_vidc_buffer_type buffer_type[] = { MSM_VIDC_BUF_INPUT_META, MSM_VIDC_BUF_INPUT, @@ -1503,7 +1503,7 @@ void handle_session_response_work_handler(struct work_struct *work) return; } - mutex_lock(&inst->lock); + inst_lock(inst, __func__); list_for_each_entry_safe(resp_work, dummy, &inst->response_works, list) { switch (resp_work->type) { case RESP_WORK_INPUT_PSC: @@ -1556,7 +1556,7 @@ void handle_session_response_work_handler(struct work_struct *work) kfree(resp_work->data); kfree(resp_work); } - mutex_unlock(&inst->lock); + inst_unlock(inst, __func__); put_inst(inst); } @@ -1603,7 +1603,7 @@ static int handle_session_response(struct msm_vidc_core *core, return -EINVAL; } - mutex_lock(&inst->lock); + inst_lock(inst, __func__); /* search for special pkt */ pkt = (u8 *)((u8 *)hdr + sizeof(struct hfi_header)); for (i = 0; i < hdr->num_packets; i++) { @@ -1644,7 +1644,7 @@ static int handle_session_response(struct msm_vidc_core *core, goto exit; exit: - mutex_unlock(&inst->lock); + inst_unlock(inst, __func__); put_inst(inst); return rc; } From d0267842f10c6b06195b3e34766c9a477e566867 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Wed, 2 Jun 2021 16:34:20 +0530 Subject: [PATCH 0329/1061] video: driver: add error handling for lend failure Added error handling for mem_buf_lend failure. Change-Id: I6ca0a575f8324e3f6eaf1cd114e9bf96608eff3d Signed-off-by: Govindaraj Rajagopal --- driver/vidc/src/msm_vidc_memory.c | 1 + 1 file changed, 1 insertion(+) diff --git a/driver/vidc/src/msm_vidc_memory.c b/driver/vidc/src/msm_vidc_memory.c index 0048b8c2f8..d532b7b263 100644 --- a/driver/vidc/src/msm_vidc_memory.c +++ b/driver/vidc/src/msm_vidc_memory.c @@ -262,6 +262,7 @@ int msm_vidc_memory_alloc(struct msm_vidc_core *core, struct msm_vidc_alloc *mem if (rc) { d_vpr_e("%s: BIN dmabuf %pK LEND failed, rc %d heap %s\n", __func__, mem->dmabuf, rc, heap_name); + goto error; } } From 58207fc7d8fbea699fab45ef9ee9dbad04cf1452 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Wed, 2 Jun 2021 17:46:34 +0530 Subject: [PATCH 0330/1061] video: driver: add error handling at event_queue_deinit sequence If msm_vidc_open() sequence fails before calling event_queue_init() then it calls msm_vidc_close as part of cleanup. So event_queue_deinit will attempt to call v4l2_fh_del without completing v4l2_fh_init & v4l2_fh_add. So i.e leading to NULL ptr dereferrence issue at v4l2_fh_del api. Added change to avoid calling event_queue_deinit() sequence, if event_queue_init is not completed. Change-Id: Ia2732c39be819247379d955d40dddccaba7c00eb Signed-off-by: Govindaraj Rajagopal --- driver/vidc/src/msm_vidc_driver.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 8e0dcc83c2..f34ba191ea 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -3433,6 +3433,12 @@ int msm_vidc_event_queue_deinit(struct msm_vidc_inst *inst) return -EINVAL; } + /* do not deinit, if not already inited */ + if (!inst->event_handler.vdev) { + i_vpr_e(inst, "%s: already not inited\n", __func__); + return 0; + } + v4l2_fh_del(&inst->event_handler); v4l2_fh_exit(&inst->event_handler); From 8d33375a96b22ffebec57ef05f8035640370bd52 Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Wed, 2 Jun 2021 12:57:06 -0700 Subject: [PATCH 0331/1061] video: driver: modify priority level enum modify priority level enum values to set correct values to fw. Change-Id: Ifd33b17db58b06d281ad930f7629d9a4575d0956 Signed-off-by: Darshana Patil --- driver/vidc/inc/msm_vidc_internal.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index c3402c7ef0..e3041726d5 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -144,8 +144,8 @@ enum msm_vidc_codec_type { }; enum priority_level { - MSM_VIDC_PRIORITY_LOW, - MSM_VIDC_PRIORITY_HIGH, + MSM_VIDC_PRIORITY_HIGH = 0, + MSM_VIDC_PRIORITY_LOW = 1, }; enum msm_vidc_colorformat_type { From 7cf3193b1064de3f215f81b11ee0a38a76312a65 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Thu, 3 Jun 2021 14:37:40 +0530 Subject: [PATCH 0332/1061] video: driver: check for session_error at ioctl entry point Currently session_error check is scattered at multiple places, So check for session error at ioctl entry point itself(for set type controls only). Cleanup &inst->response_works.list as part of session close to avoid leaks and remove unused variables from inst struct. Change-Id: I349ec845cc71814b33a94ac07c7628304ddae564 Signed-off-by: Govindaraj Rajagopal --- driver/vidc/inc/msm_vidc_inst.h | 2 - driver/vidc/src/msm_vidc.c | 7 +-- driver/vidc/src/msm_vidc_control.c | 6 --- driver/vidc/src/msm_vidc_driver.c | 17 ++++--- driver/vidc/src/msm_vidc_power.c | 4 -- driver/vidc/src/msm_vidc_v4l2.c | 72 ++++++++++++++++++++++++++---- 6 files changed, 74 insertions(+), 34 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_inst.h b/driver/vidc/inc/msm_vidc_inst.h index a666580500..684147c5fd 100644 --- a/driver/vidc/inc/msm_vidc_inst.h +++ b/driver/vidc/inc/msm_vidc_inst.h @@ -136,9 +136,7 @@ struct msm_vidc_inst { struct delayed_work response_work; struct workqueue_struct *response_workq; struct list_head response_works; /* list of struct response_work */ - struct list_head input_ts; struct list_head enc_input_crs; - struct list_head decode_bitrate_data; bool once_per_session_set; bool ipsc_properties_set; bool opsc_properties_set; diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index 87e3966693..336fe27e14 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -71,7 +71,7 @@ int msm_vidc_poll(void *instance, struct file *filp, d_vpr_e("%s: invalid params\n", __func__); return POLLERR; } - if (inst->state == MSM_VIDC_ERROR) { + if (is_session_error(inst)) { i_vpr_e(inst, "%s: inst in error state\n", __func__); return POLLERR; } @@ -437,11 +437,6 @@ int msm_vidc_qbuf(void *instance, struct media_device *mdev, return -EINVAL; } - if (is_session_error(inst)) { - rc = -EBUSY; - goto exit; - } - q = msm_vidc_get_vb2q(inst, b->type, __func__); if (!q) { rc = -EINVAL; diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index a36de94ad2..9966ff79ae 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -703,12 +703,6 @@ int msm_v4l2_op_s_ctrl(struct v4l2_ctrl *ctrl) return -EINVAL; } - if (inst->state == MSM_VIDC_ERROR) { - i_vpr_e(inst, "%s: set ctrl not allowed in error state\n"); - /* (error name TBD); */ - return -EINVAL; - } - capability = inst->capabilities; i_vpr_h(inst, "%s: state %d, name %s, id 0x%x value %d\n", diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 0210601983..c2c074f959 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -1082,7 +1082,7 @@ int msm_vidc_change_inst_state(struct msm_vidc_inst *inst, return -EINVAL; } - if (inst->state == MSM_VIDC_ERROR) { + if (is_session_error(inst)) { i_vpr_h(inst, "%s: inst is in bad state, can not change state to %s\n", func, state_name(request_state)); @@ -1429,10 +1429,6 @@ enum msm_vidc_allow msm_vidc_allow_qbuf(struct msm_vidc_inst *inst, u32 type) d_vpr_e("%s: invalid params\n", __func__); return MSM_VIDC_DISALLOW; } - if (inst->state == MSM_VIDC_ERROR) { - i_vpr_e(inst, "%s: inst in error state\n", __func__); - return MSM_VIDC_DISALLOW; - } port = v4l2_type_to_driver_port(inst, type, __func__); if (port < 0) @@ -4619,6 +4615,7 @@ void msm_vidc_destroy_buffers(struct msm_vidc_inst *inst) struct msm_vidc_buffers *buffers; struct msm_vidc_buffer *buf, *dummy; struct msm_vidc_timestamp *ts, *dummy_ts; + struct response_work *work, *dummy_work = NULL; static const enum msm_vidc_buffer_type ext_buf_types[] = { MSM_VIDC_BUF_INPUT, MSM_VIDC_BUF_OUTPUT, @@ -4687,6 +4684,12 @@ void msm_vidc_destroy_buffers(struct msm_vidc_inst *inst) msm_vidc_put_ts(inst, ts); } + list_for_each_entry_safe(work, dummy_work, &inst->response_works, list) { + list_del(&work->list); + kfree(work->data); + kfree(work); + } + /* destroy buffers from pool */ msm_vidc_destroy_vidc_buffer(inst); msm_vidc_destroy_alloc_buffer(inst); @@ -5068,7 +5071,7 @@ int msm_vidc_check_core_mbps(struct msm_vidc_inst *inst) core_lock(core, __func__); list_for_each_entry(instance, &core->instances, list) { /* ignore invalid/error session */ - if (instance->state == MSM_VIDC_ERROR) + if (is_session_error(instance)) continue; /* ignore thumbnail, image, and non realtime sessions */ @@ -5105,7 +5108,7 @@ static int msm_vidc_check_core_mbpf(struct msm_vidc_inst *inst) core_lock(core, __func__); list_for_each_entry(instance, &core->instances, list) { /* ignore invalid/error session */ - if (instance->state == MSM_VIDC_ERROR) + if (is_session_error(instance)) continue; /* ignore thumbnail session */ diff --git a/driver/vidc/src/msm_vidc_power.c b/driver/vidc/src/msm_vidc_power.c index d4830edd28..3f7fe40473 100644 --- a/driver/vidc/src/msm_vidc_power.c +++ b/driver/vidc/src/msm_vidc_power.c @@ -64,9 +64,6 @@ int msm_vidc_get_inst_load(struct msm_vidc_inst *inst) return -EINVAL; } - if (inst->state == MSM_VIDC_ERROR) - goto exit; - /* * NRT sessions - clock scaling is based on OPP table. * - No load based rejection. @@ -77,7 +74,6 @@ int msm_vidc_get_inst_load(struct msm_vidc_inst *inst) else load = msm_vidc_get_mbps(inst); -exit: return load; } diff --git a/driver/vidc/src/msm_vidc_v4l2.c b/driver/vidc/src/msm_vidc_v4l2.c index c7cdcc2053..e752f16181 100644 --- a/driver/vidc/src/msm_vidc_v4l2.c +++ b/driver/vidc/src/msm_vidc_v4l2.c @@ -118,11 +118,17 @@ int msm_v4l2_s_fmt(struct file *filp, void *fh, } inst_lock(inst, __func__); + if (is_session_error(inst)) { + i_vpr_e(inst, "%s: inst in error state\n", __func__); + rc = -EBUSY; + goto unlock; + } rc = msm_vidc_s_fmt((void *)inst, f); if (rc) i_vpr_e(inst, "%s: failed with %d\n", __func__, rc); - inst_unlock(inst, __func__); +unlock: + inst_unlock(inst, __func__); put_inst(inst); return rc; @@ -164,11 +170,17 @@ int msm_v4l2_s_selection(struct file *filp, void *fh, } inst_lock(inst, __func__); + if (is_session_error(inst)) { + i_vpr_e(inst, "%s: inst in error state\n", __func__); + rc = -EBUSY; + goto unlock; + } rc = msm_vidc_s_selection((void *)inst, s); if (rc) i_vpr_e(inst, "%s: failed with %d\n", __func__, rc); - inst_unlock(inst, __func__); +unlock: + inst_unlock(inst, __func__); put_inst(inst); return rc; @@ -210,11 +222,17 @@ int msm_v4l2_s_parm(struct file *filp, void *fh, } inst_lock(inst, __func__); + if (is_session_error(inst)) { + i_vpr_e(inst, "%s: inst in error state\n", __func__); + rc = -EBUSY; + goto unlock; + } rc = msm_vidc_s_param((void *)inst, a); if (rc) i_vpr_e(inst, "%s: failed with %d\n", __func__, rc); - inst_unlock(inst, __func__); +unlock: + inst_unlock(inst, __func__); put_inst(inst); return rc; @@ -256,11 +274,17 @@ int msm_v4l2_s_ctrl(struct file *filp, void *fh, } inst_lock(inst, __func__); + if (is_session_error(inst)) { + i_vpr_e(inst, "%s: inst in error state\n", __func__); + rc = -EBUSY; + goto unlock; + } rc = msm_vidc_s_ctrl((void *)inst, a); if (rc) i_vpr_e(inst, "%s: failed with %d\n", __func__, rc); - inst_unlock(inst, __func__); +unlock: + inst_unlock(inst, __func__); put_inst(inst); return rc; @@ -326,11 +350,17 @@ int msm_v4l2_qbuf(struct file *filp, void *fh, } inst_lock(inst, __func__); + if (is_session_error(inst)) { + i_vpr_e(inst, "%s: inst in error state\n", __func__); + rc = -EBUSY; + goto unlock; + } rc = msm_vidc_qbuf(inst, vdev->v4l2_dev->mdev, b); if (rc) i_vpr_e(inst, "%s: failed with %d\n", __func__, rc); - inst_unlock(inst, __func__); +unlock: + inst_unlock(inst, __func__); put_inst(inst); return rc; @@ -370,11 +400,17 @@ int msm_v4l2_streamon(struct file *filp, void *fh, } inst_lock(inst, __func__); + if (is_session_error(inst)) { + i_vpr_e(inst, "%s: inst in error state\n", __func__); + rc = -EBUSY; + goto unlock; + } rc = msm_vidc_streamon((void *)inst, i); if (rc) i_vpr_e(inst, "%s: failed with %d\n", __func__, rc); - inst_unlock(inst, __func__); +unlock: + inst_unlock(inst, __func__); put_inst(inst); return rc; @@ -417,11 +453,17 @@ int msm_v4l2_subscribe_event(struct v4l2_fh *fh, } inst_lock(inst, __func__); + if (is_session_error(inst)) { + i_vpr_e(inst, "%s: inst in error state\n", __func__); + rc = -EBUSY; + goto unlock; + } rc = msm_vidc_subscribe_event((void *)inst, sub); if (rc) i_vpr_e(inst, "%s: failed with %d\n", __func__, rc); - inst_unlock(inst, __func__); +unlock: + inst_unlock(inst, __func__); put_inst(inst); return rc; @@ -464,11 +506,17 @@ int msm_v4l2_decoder_cmd(struct file *filp, void *fh, } inst_lock(inst, __func__); + if (is_session_error(inst)) { + i_vpr_e(inst, "%s: inst in error state\n", __func__); + rc = -EBUSY; + goto unlock; + } rc = msm_vidc_cmd((void *)inst, (union msm_v4l2_cmd *)dec); if (rc) i_vpr_e(inst, "%s: failed with %d\n", __func__, rc); - inst_unlock(inst, __func__); +unlock: + inst_unlock(inst, __func__); put_inst(inst); return rc; @@ -487,11 +535,17 @@ int msm_v4l2_encoder_cmd(struct file *filp, void *fh, } inst_lock(inst, __func__); + if (is_session_error(inst)) { + i_vpr_e(inst, "%s: inst in error state\n", __func__); + rc = -EBUSY; + goto unlock; + } rc = msm_vidc_cmd((void *)inst, (union msm_v4l2_cmd *)enc); if (rc) i_vpr_e(inst, "%s: failed with %d\n", __func__, rc); - inst_unlock(inst, __func__); +unlock: + inst_unlock(inst, __func__); put_inst(inst); return rc; From 6b548ba181fc3660a734a733b9dba374e6a7c467 Mon Sep 17 00:00:00 2001 From: Mihir Ganu Date: Thu, 3 Jun 2021 10:29:41 -0700 Subject: [PATCH 0333/1061] video: driver: Update VP9 Line buffer size for QP metadata Update VP9 decoder Line buffer size by considering VP9 frame QP Metadadta. Change-Id: I9b7b5ed32378af19fa3dd1106515b05974ab1a83 Signed-off-by: Mihir Ganu --- driver/variant/iris2/inc/hfi_buffer_iris2.h | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/driver/variant/iris2/inc/hfi_buffer_iris2.h b/driver/variant/iris2/inc/hfi_buffer_iris2.h index afc89b0764..524d76b2f8 100644 --- a/driver/variant/iris2/inc/hfi_buffer_iris2.h +++ b/driver/variant/iris2/inc/hfi_buffer_iris2.h @@ -751,6 +751,9 @@ typedef HFI_U32 HFI_BOOL; #define HFI_IRIS2_VP9D_COMV_SIZE \ ((((8192 + 63) >> 6) * ((4320 + 63) >> 6) * 8 * 8 * 2 * 8)) +#define SIZE_VP9D_QP(frame_width, frame_height) \ + SIZE_H264D_QP(frame_width, frame_height) + #define HFI_IRIS2_VP9D_LB_SIZE(_size, frame_width, frame_height, num_vpp_pipes)\ do \ { \ @@ -769,6 +772,8 @@ typedef HFI_U32 HFI_BOOL; HFI_ALIGN(SIZE_VP9D_LB_PE_TOP_DATA(frame_width, frame_height), \ VENUS_DMA_ALIGNMENT) + \ HFI_ALIGN(SIZE_VP9D_LB_FE_TOP_DATA(frame_width, frame_height), \ + VENUS_DMA_ALIGNMENT) + \ + HFI_ALIGN(SIZE_VP9D_QP(frame_width, frame_height), \ VENUS_DMA_ALIGNMENT); \ } while (0) From 5b276d076e12f23cc49c3cff09d446dea6fa3ee9 Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Wed, 2 Jun 2021 15:39:10 -0700 Subject: [PATCH 0334/1061] video: driver: encoder fix for frame qp and level - misc fix for setting frame qp, min qp, max qp. - seperate LEVEL database entry for encoder and decoder as max level supported by encoder is 6_0, but decoder supports upto 6_2. Change-Id: Ia0a0a717e73e55a8b6933421e3eb55c3831524b2 Signed-off-by: Darshana Patil --- driver/platform/waipio/src/msm_vidc_waipio.c | 55 +++++++++++++- driver/vidc/inc/msm_vidc_control.h | 2 + driver/vidc/src/msm_vidc_control.c | 79 ++++++++++++++------ 3 files changed, 112 insertions(+), 24 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index b331acc744..92da0bfcca 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -962,7 +962,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {0}, NULL, msm_vidc_set_u32_enum}, - {LEVEL, ENC|DEC, H264, + {LEVEL, DEC, H264, V4L2_MPEG_VIDEO_H264_LEVEL_1_0, V4L2_MPEG_VIDEO_H264_LEVEL_6_2, BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_0) | @@ -993,7 +993,36 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {0}, NULL, msm_vidc_set_u32_enum}, - {LEVEL, ENC|DEC, HEVC|HEIC, + {LEVEL, ENC, H264, + V4L2_MPEG_VIDEO_H264_LEVEL_1_0, + V4L2_MPEG_VIDEO_H264_LEVEL_6_0, + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1B) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_3) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_0), + V4L2_MPEG_VIDEO_H264_LEVEL_5_0, + V4L2_CID_MPEG_VIDEO_H264_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {0}, + {0}, + NULL, msm_vidc_set_u32_enum}, + + {LEVEL, DEC, HEVC|HEIC, V4L2_MPEG_VIDEO_HEVC_LEVEL_1, V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2, BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_1) | @@ -1017,6 +1046,28 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {0}, NULL, msm_vidc_set_u32_enum}, + {LEVEL, ENC, HEVC|HEIC, + V4L2_MPEG_VIDEO_HEVC_LEVEL_1, + V4L2_MPEG_VIDEO_HEVC_LEVEL_6, + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6), + V4L2_MPEG_VIDEO_HEVC_LEVEL_5, + V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {0}, + {0}, + NULL, msm_vidc_set_u32_enum}, + /* TODO: Bring the VP9 Level upstream GKI change, and level cap here: * go/videogki */ diff --git a/driver/vidc/inc/msm_vidc_control.h b/driver/vidc/inc/msm_vidc_control.h index f0aebcc2de..b09c884165 100644 --- a/driver/vidc/inc/msm_vidc_control.h +++ b/driver/vidc/inc/msm_vidc_control.h @@ -97,6 +97,8 @@ int msm_vidc_set_session_priority(void* instance, enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_seq_change_at_sync_frame(void* instance, enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_level(void *instance, + enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_s32(void *instance, enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_q16(void *instance, diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index a36de94ad2..35e67a7ce4 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -2249,15 +2249,18 @@ int msm_vidc_set_min_qp(void *instance, } capability = inst->capabilities; - min_qp_enable = - capability->cap[MIN_FRAME_QP].flags & CAP_FLAG_CLIENT_SET; + if (capability->cap[MIN_FRAME_QP].flags & CAP_FLAG_CLIENT_SET) + min_qp_enable = 1; - i_qp_enable = min_qp_enable || - capability->cap[I_FRAME_MIN_QP].flags & CAP_FLAG_CLIENT_SET; - p_qp_enable = min_qp_enable || - capability->cap[P_FRAME_MIN_QP].flags & CAP_FLAG_CLIENT_SET; - b_qp_enable = min_qp_enable || - capability->cap[B_FRAME_MIN_QP].flags & CAP_FLAG_CLIENT_SET; + if (min_qp_enable || + (capability->cap[I_FRAME_MIN_QP].flags & CAP_FLAG_CLIENT_SET)) + i_qp_enable = 1; + if (min_qp_enable || + (capability->cap[P_FRAME_MIN_QP].flags & CAP_FLAG_CLIENT_SET)) + p_qp_enable = 1; + if (min_qp_enable || + (capability->cap[B_FRAME_MIN_QP].flags & CAP_FLAG_CLIENT_SET)) + b_qp_enable = 1; client_qp_enable = i_qp_enable | p_qp_enable << 1 | b_qp_enable << 2; if (!client_qp_enable) { @@ -2311,15 +2314,18 @@ int msm_vidc_set_max_qp(void *instance, } capability = inst->capabilities; - max_qp_enable = - capability->cap[MAX_FRAME_QP].flags & CAP_FLAG_CLIENT_SET; + if (capability->cap[MAX_FRAME_QP].flags & CAP_FLAG_CLIENT_SET) + max_qp_enable = 1; - i_qp_enable = max_qp_enable || - capability->cap[I_FRAME_MAX_QP].flags & CAP_FLAG_CLIENT_SET; - p_qp_enable = max_qp_enable || - capability->cap[P_FRAME_MAX_QP].flags & CAP_FLAG_CLIENT_SET; - b_qp_enable = max_qp_enable || - capability->cap[B_FRAME_MAX_QP].flags & CAP_FLAG_CLIENT_SET; + if (max_qp_enable || + (capability->cap[I_FRAME_MAX_QP].flags & CAP_FLAG_CLIENT_SET)) + i_qp_enable = 1; + if (max_qp_enable || + (capability->cap[P_FRAME_MAX_QP].flags & CAP_FLAG_CLIENT_SET)) + p_qp_enable = 1; + if (max_qp_enable || + (capability->cap[B_FRAME_MAX_QP].flags & CAP_FLAG_CLIENT_SET)) + b_qp_enable = 1; client_qp_enable = i_qp_enable | p_qp_enable << 1 | b_qp_enable << 2; if (!client_qp_enable) { @@ -2383,12 +2389,12 @@ int msm_vidc_set_frame_qp(void *instance, i_qp_enable = p_qp_enable = b_qp_enable = 1; } else { /* Set only if client has set for NON rc off case */ - i_qp_enable = - capab->cap[I_FRAME_QP].flags & CAP_FLAG_CLIENT_SET; - p_qp_enable = - capab->cap[P_FRAME_QP].flags & CAP_FLAG_CLIENT_SET; - b_qp_enable = - capab->cap[B_FRAME_QP].flags & CAP_FLAG_CLIENT_SET; + if (capab->cap[I_FRAME_QP].flags & CAP_FLAG_CLIENT_SET) + i_qp_enable = 1; + if (capab->cap[P_FRAME_QP].flags & CAP_FLAG_CLIENT_SET) + p_qp_enable = 1; + if (capab->cap[B_FRAME_QP].flags & CAP_FLAG_CLIENT_SET) + b_qp_enable = 1; } client_qp_enable = i_qp_enable | p_qp_enable << 1 | b_qp_enable << 2; @@ -3030,6 +3036,35 @@ int msm_vidc_set_csc_custom_matrix(void *instance, return rc; } +/* + * TODO: currently fw does not accept HFI_LEVEL_NONE. + * Use this function for encoder level setting once + * fw issue is fixed. + */ +int msm_vidc_set_level(void *instance, + enum msm_vidc_inst_capability_type cap_id) +{ + int rc = 0; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; + u32 hfi_value = 0; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + hfi_value = inst->capabilities->cap[cap_id].value; + if (!(inst->capabilities->cap[cap_id].flags & CAP_FLAG_CLIENT_SET)) + hfi_value = HFI_LEVEL_NONE; + + rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32_ENUM, + &hfi_value, sizeof(u32), __func__); + if (rc) + return rc; + + return rc; +} + int msm_vidc_set_q16(void *instance, enum msm_vidc_inst_capability_type cap_id) { From 1f46168b9fc2338519558cec0922e6b2b3c5005c Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Thu, 3 Jun 2021 20:41:52 +0530 Subject: [PATCH 0335/1061] video: driver: print more info on debug logs Currently driver prints hex values for codec type, pixel format and port number. So added change to print strings instead of hex values. Removed unnecessary logs to avoid overlogging timeout issues. Change-Id: Ia44401990797dc20eae0a35631e9ed6a0b094c20 Signed-off-by: Govindaraj Rajagopal --- driver/variant/iris2/src/msm_vidc_iris2.c | 6 +- driver/vidc/inc/msm_vidc_debug.h | 3 + driver/vidc/inc/msm_vidc_driver.h | 2 + driver/vidc/src/hfi_packet.c | 7 +- driver/vidc/src/msm_vdec.c | 38 ++++---- driver/vidc/src/msm_venc.c | 108 +++++++++++----------- driver/vidc/src/msm_vidc.c | 18 ++-- driver/vidc/src/msm_vidc_control.c | 9 +- driver/vidc/src/msm_vidc_driver.c | 39 +++++++- driver/vidc/src/msm_vidc_power.c | 4 +- driver/vidc/src/msm_vidc_v4l2.c | 88 ++++++++++-------- driver/vidc/src/msm_vidc_vb2.c | 24 ++--- driver/vidc/src/venus_hfi.c | 6 +- 13 files changed, 199 insertions(+), 153 deletions(-) diff --git a/driver/variant/iris2/src/msm_vidc_iris2.c b/driver/variant/iris2/src/msm_vidc_iris2.c index f2f701591d..2361b04357 100644 --- a/driver/variant/iris2/src/msm_vidc_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_iris2.c @@ -262,7 +262,7 @@ static int __power_off_iris2(struct msm_vidc_core *vidc_core) __read_register(core, AON_WRAPPER_MVP_NOC_LPI_STATUS); reg_status = lpi_status & BIT(0); - d_vpr_h("Noc: lpi_status %d noc_status %d (count %d)\n", + d_vpr_l("Noc: lpi_status %d noc_status %d (count %d)\n", lpi_status, reg_status, count); usleep_range(50, 100); count++; @@ -282,7 +282,7 @@ static int __power_off_iris2(struct msm_vidc_core *vidc_core) lpi_status = __read_register(core, WRAPPER_DEBUG_BRIDGE_LPI_STATUS_IRIS2); reg_status = lpi_status & 0x7; - d_vpr_h("DBLP Set : lpi_status %d reg_status %d (count %d)\n", + d_vpr_l("DBLP Set : lpi_status %d reg_status %d (count %d)\n", lpi_status, reg_status, count); usleep_range(50, 100); count++; @@ -300,7 +300,7 @@ static int __power_off_iris2(struct msm_vidc_core *vidc_core) while (lpi_status && count < max_count) { lpi_status = __read_register(core, WRAPPER_DEBUG_BRIDGE_LPI_STATUS_IRIS2); - d_vpr_h("DBLP Release: lpi_status %d(count %d)\n", + d_vpr_l("DBLP Release: lpi_status %d(count %d)\n", lpi_status, count); usleep_range(50, 100); count++; diff --git a/driver/vidc/inc/msm_vidc_debug.h b/driver/vidc/inc/msm_vidc_debug.h index 1203cb17a6..6858b7e653 100644 --- a/driver/vidc/inc/msm_vidc_debug.h +++ b/driver/vidc/inc/msm_vidc_debug.h @@ -81,6 +81,9 @@ enum vidc_msg_prio { #define i_vpr_t(inst, __fmt, ...) dprintk_inst(VIDC_PKT, "pkt ", inst, __fmt, ##__VA_ARGS__) #define i_vpr_b(inst, __fmt, ...) dprintk_inst(VIDC_BUS, "bus ", inst, __fmt, ##__VA_ARGS__) +#define i_vpr_hp(inst, __fmt, ...) \ + dprintk_inst(VIDC_HIGH | VIDC_PERF, "high", inst, __fmt, ##__VA_ARGS__) + #define dprintk_core(__level, __level_str, __fmt, ...) \ do { \ if (msm_vidc_debug & __level) { \ diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index e4f12ca632..31a7ecd0b6 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -247,6 +247,8 @@ static inline bool is_secure_region(enum msm_vidc_buffer_region region) } const char *cap_name(enum msm_vidc_inst_capability_type cap); +const char *v4l2_pixelfmt_name(u32 pixelfmt); +const char *v4l2_type_name(u32 port); void print_vidc_buffer(u32 tag, const char *tag_str, const char *str, struct msm_vidc_inst *inst, struct msm_vidc_buffer *vbuf); void print_vb2_buffer(const char *str, struct msm_vidc_inst *inst, diff --git a/driver/vidc/src/hfi_packet.c b/driver/vidc/src/hfi_packet.c index 07f9c6d13f..100cbc6a5e 100644 --- a/driver/vidc/src/hfi_packet.c +++ b/driver/vidc/src/hfi_packet.c @@ -646,11 +646,10 @@ int hfi_packet_sys_debug_config(struct msm_vidc_core *core, if (rc) goto err_debug; - d_vpr_h("Debug packet created\n"); - return rc; - err_debug: - d_vpr_e("%s: create packet failed\n", __func__); + if (rc) + d_vpr_e("%s: create packet failed\n", __func__); + return rc; } diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index f128e19a79..79d8cf8891 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -86,8 +86,9 @@ static int msm_vdec_codec_change(struct msm_vidc_inst *inst, u32 v4l2_codec) if (inst->codec && inst->fmts[INPUT_PORT].fmt.pix_mp.pixelformat == v4l2_codec) return 0; - i_vpr_h(inst, "%s: codec changed from %#x to %#x\n", - __func__, inst->fmts[INPUT_PORT].fmt.pix_mp.pixelformat, v4l2_codec); + i_vpr_h(inst, "%s: codec changed from %s to %s\n", + __func__, v4l2_pixelfmt_name(inst->fmts[INPUT_PORT].fmt.pix_mp.pixelformat), + v4l2_pixelfmt_name(v4l2_codec)); inst->codec = v4l2_codec_to_driver(v4l2_codec, __func__); rc = msm_vidc_update_debug_str(inst); @@ -2089,10 +2090,6 @@ int msm_vdec_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) if (f->type == INPUT_MPLANE) { if (inst->fmts[INPUT_PORT].fmt.pix_mp.pixelformat != f->fmt.pix_mp.pixelformat) { - i_vpr_h(inst, - "%s: codec changed from %#x to %#x\n", __func__, - inst->fmts[INPUT_PORT].fmt.pix_mp.pixelformat, - f->fmt.pix_mp.pixelformat); rc = msm_vdec_codec_change(inst, f->fmt.pix_mp.pixelformat); if (rc) goto err_invalid_fmt; @@ -2128,9 +2125,9 @@ int msm_vdec_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) inst->crop.width = f->fmt.pix_mp.width; inst->crop.height = f->fmt.pix_mp.height; i_vpr_h(inst, - "%s: input: codec %#x width %d height %d size %d min_count %d extra_count %d\n", - __func__, f->fmt.pix_mp.pixelformat, f->fmt.pix_mp.width, - f->fmt.pix_mp.height, + "%s: type: INPUT, codec %s width %d height %d size %u min_count %d extra_count %d\n", + __func__, v4l2_pixelfmt_name(f->fmt.pix_mp.pixelformat), + f->fmt.pix_mp.width, f->fmt.pix_mp.height, fmt->fmt.pix_mp.plane_fmt[0].sizeimage, inst->buffers.input.min_count, inst->buffers.input.extra_count); @@ -2156,7 +2153,7 @@ int msm_vdec_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) inst->buffers.input_meta.size = 0; } i_vpr_h(inst, - "%s: input meta: size %d min_count %d extra_count %d\n", + "%s: type: INPUT_META, size %u min_count %d extra_count %d\n", __func__, fmt->fmt.meta.buffersize, inst->buffers.input_meta.min_count, inst->buffers.input_meta.extra_count); @@ -2198,9 +2195,9 @@ int msm_vdec_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) pix_fmt = v4l2_colorformat_to_driver(f->fmt.pix_mp.pixelformat, __func__); msm_vidc_update_cap_value(inst, PIX_FMTS, pix_fmt, __func__); i_vpr_h(inst, - "%s: output: format %#x width %d height %d size %d min_count %d extra_count %d\n", - __func__, fmt->fmt.pix_mp.pixelformat, fmt->fmt.pix_mp.width, - fmt->fmt.pix_mp.height, + "%s: type: OUTPUT, format %s width %d height %d size %u min_count %d extra_count %d\n", + __func__, v4l2_pixelfmt_name(fmt->fmt.pix_mp.pixelformat), + fmt->fmt.pix_mp.width, fmt->fmt.pix_mp.height, fmt->fmt.pix_mp.plane_fmt[0].sizeimage, inst->buffers.output.min_count, inst->buffers.output.extra_count); @@ -2226,7 +2223,7 @@ int msm_vdec_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) inst->buffers.output_meta.size = 0; } i_vpr_h(inst, - "%s: output meta: size %d min_count %d extra_count %d\n", + "%s: type: OUTPUT_META, size %u min_count %d extra_count %d\n", __func__, fmt->fmt.meta.buffersize, inst->buffers.output_meta.min_count, inst->buffers.output_meta.extra_count); @@ -2291,8 +2288,8 @@ int msm_vdec_g_selection(struct msm_vidc_inst* inst, struct v4l2_selection* s) s->r.height = inst->crop.height; break; } - i_vpr_h(inst, "%s: type %d target %d, r [%d, %d, %d, %d]\n", - __func__, s->type, s->target, s->r.top, s->r.left, + i_vpr_h(inst, "%s: target %d, r [%d, %d, %d, %d]\n", + __func__, s->target, s->r.top, s->r.left, s->r.width, s->r.height); return 0; } @@ -2505,9 +2502,8 @@ int msm_vdec_enum_fmt(struct msm_vidc_inst *inst, struct v4l2_fmtdesc *f) } memset(f->reserved, 0, sizeof(f->reserved)); - i_vpr_h(inst, "%s: index %d, %s : %#x, flags %#x, driver colorfmt %#x\n", - __func__, f->index, f->description, f->pixelformat, f->flags, - v4l2_colorformat_to_driver(f->pixelformat, __func__)); + i_vpr_h(inst, "%s: index %d, %s: %s, flags %#x\n", + __func__, f->index, f->description, v4l2_pixelfmt_name(f->pixelformat), f->flags); return rc; } @@ -2601,6 +2597,8 @@ int msm_vdec_inst_init(struct msm_vidc_inst *inst) rc = msm_vdec_codec_change(inst, inst->fmts[INPUT_PORT].fmt.pix_mp.pixelformat); + if (rc) + return rc; return rc; } @@ -2616,6 +2614,8 @@ int msm_vdec_inst_deinit(struct msm_vidc_inst *inst) /* cancel pending batch work */ cancel_batch_work(inst); rc = msm_vidc_ctrl_deinit(inst); + if (rc) + return rc; return rc; } diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index b2b111c020..5e512689a5 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -67,8 +67,9 @@ static int msm_venc_codec_change(struct msm_vidc_inst *inst, u32 v4l2_codec) if (inst->codec && inst->fmts[OUTPUT_PORT].fmt.pix_mp.pixelformat == v4l2_codec) return 0; - i_vpr_h(inst, "%s: codec changed from %#x to %#x\n", - __func__, inst->fmts[OUTPUT_PORT].fmt.pix_mp.pixelformat, v4l2_codec); + i_vpr_h(inst, "%s: codec changed from %s to %s\n", + __func__, v4l2_pixelfmt_name(inst->fmts[OUTPUT_PORT].fmt.pix_mp.pixelformat), + v4l2_pixelfmt_name(v4l2_codec)); inst->codec = v4l2_codec_to_driver(v4l2_codec, __func__); rc = msm_vidc_update_debug_str(inst); @@ -108,8 +109,8 @@ static int msm_venc_set_colorformat(struct msm_vidc_inst *inst, pixelformat = inst->fmts[INPUT_PORT].fmt.pix_mp.pixelformat; colorformat = v4l2_colorformat_to_driver(pixelformat, __func__); if (!(colorformat & inst->capabilities->cap[PIX_FMTS].step_or_mask)) { - i_vpr_e(inst, "%s: invalid pixelformat %#x\n", - __func__, pixelformat); + i_vpr_e(inst, "%s: invalid pixelformat %s\n", + __func__, v4l2_pixelfmt_name(pixelformat)); return -EINVAL; } @@ -1036,9 +1037,6 @@ int msm_venc_s_fmt_output(struct msm_vidc_inst *inst, struct v4l2_format *f) fmt = &inst->fmts[OUTPUT_PORT]; if (fmt->fmt.pix_mp.pixelformat != f->fmt.pix_mp.pixelformat) { - i_vpr_h(inst, - "%s: codec changed from %#x to %#x\n", __func__, - fmt->fmt.pix_mp.pixelformat, f->fmt.pix_mp.pixelformat); rc = msm_venc_codec_change(inst, f->fmt.pix_mp.pixelformat); if (rc) return rc; @@ -1091,6 +1089,14 @@ int msm_venc_s_fmt_output(struct msm_vidc_inst *inst, struct v4l2_format *f) /* reset metadata buffer size with updated resolution*/ msm_vidc_update_meta_port_settings(inst); + i_vpr_h(inst, + "%s: type: OUTPUT, codec %s width %d height %d size %u min_count %d extra_count %d\n", + __func__, v4l2_pixelfmt_name(fmt->fmt.pix_mp.pixelformat), + fmt->fmt.pix_mp.width, fmt->fmt.pix_mp.height, + fmt->fmt.pix_mp.plane_fmt[0].sizeimage, + inst->buffers.output.min_count, + inst->buffers.output.extra_count); + return rc; } @@ -1128,6 +1134,12 @@ static int msm_venc_s_fmt_output_meta(struct msm_vidc_inst *inst, struct v4l2_fo } memcpy(f, fmt, sizeof(struct v4l2_format)); + + i_vpr_h(inst, "%s: type: OUTPUT_META, size %u min_count %d extra_count %d\n", + __func__, fmt->fmt.meta.buffersize, + inst->buffers.output_meta.min_count, + inst->buffers.output_meta.extra_count); + return rc; } @@ -1215,19 +1227,20 @@ static int msm_venc_s_fmt_input(struct msm_vidc_inst *inst, struct v4l2_format * rc = msm_venc_s_fmt_output(inst, output_fmt); if (rc) return rc; - - i_vpr_h(inst, - "%s: type %d: format %#x width %d height %d size %d\n", - __func__, output_fmt->type, output_fmt->fmt.pix_mp.pixelformat, - output_fmt->fmt.pix_mp.width, - output_fmt->fmt.pix_mp.height, - output_fmt->fmt.pix_mp.plane_fmt[0].sizeimage); } memcpy(f, fmt, sizeof(struct v4l2_format)); /* reset metadata buffer size with updated resolution*/ msm_vidc_update_meta_port_settings(inst); + i_vpr_h(inst, + "%s: type: INPUT, format %s width %d height %d size %u min_count %d extra_count %d\n", + __func__, v4l2_pixelfmt_name(fmt->fmt.pix_mp.pixelformat), + fmt->fmt.pix_mp.width, fmt->fmt.pix_mp.height, + fmt->fmt.pix_mp.plane_fmt[0].sizeimage, + inst->buffers.input.min_count, + inst->buffers.input.extra_count); + return rc; } @@ -1265,14 +1278,18 @@ static int msm_venc_s_fmt_input_meta(struct msm_vidc_inst *inst, struct v4l2_for } memcpy(f, fmt, sizeof(struct v4l2_format)); + + i_vpr_h(inst, "%s: type: INPUT_META, size %u min_count %d extra_count %d\n", + __func__, fmt->fmt.meta.buffersize, + inst->buffers.input_meta.min_count, + inst->buffers.input_meta.extra_count); + return rc; } -// TODO: use PIX_FMTS caps to check supported color format int msm_venc_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) { int rc = 0; - struct v4l2_format *fmt = NULL; if (!inst) { d_vpr_e("%s: invalid params\n", __func__); @@ -1280,41 +1297,30 @@ int msm_venc_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) } if (f->type == INPUT_MPLANE) { - fmt = &inst->fmts[INPUT_PORT]; rc = msm_venc_s_fmt_input(inst, f); if (rc) - return rc; + goto exit; } else if (f->type == INPUT_META_PLANE) { - fmt = &inst->fmts[INPUT_META_PORT]; rc = msm_venc_s_fmt_input_meta(inst, f); if (rc) - return rc; + goto exit; } else if (f->type == OUTPUT_MPLANE) { - fmt = &inst->fmts[OUTPUT_PORT]; rc = msm_venc_s_fmt_output(inst, f); if (rc) - return rc; + goto exit; } else if (f->type == OUTPUT_META_PLANE) { - fmt = &inst->fmts[OUTPUT_META_PORT]; rc = msm_venc_s_fmt_output_meta(inst, f); if (rc) - return rc; + goto exit; } else { i_vpr_e(inst, "%s: invalid type %d\n", __func__, f->type); - return rc; + rc = -EINVAL; + goto exit; } - if (f->type == INPUT_MPLANE || f->type == OUTPUT_MPLANE) { - i_vpr_h(inst, - "%s: type %d: format %#x width %d height %d size %d\n", - __func__, f->type, fmt->fmt.pix_mp.pixelformat, - fmt->fmt.pix_mp.width, - fmt->fmt.pix_mp.height, - fmt->fmt.pix_mp.plane_fmt[0].sizeimage); - } else { - i_vpr_h(inst, "%s: type %d: size %d\n", - __func__, f->type, fmt->fmt.meta.buffersize); - } +exit: + if (rc) + i_vpr_e(inst, "%s: failed\n", __func__); return rc; } @@ -1388,12 +1394,6 @@ int msm_venc_s_selection(struct msm_vidc_inst* inst, struct v4l2_selection* s) rc = msm_venc_s_fmt_output(inst, output_fmt); if (rc) return rc; - i_vpr_h(inst, - "%s: type %d: format %#x width %d height %d size %d\n", - __func__, output_fmt->type, output_fmt->fmt.pix_mp.pixelformat, - output_fmt->fmt.pix_mp.width, - output_fmt->fmt.pix_mp.height, - output_fmt->fmt.pix_mp.plane_fmt[0].sizeimage); break; case V4L2_SEL_TGT_COMPOSE_BOUNDS: case V4L2_SEL_TGT_COMPOSE_PADDED: @@ -1442,12 +1442,6 @@ int msm_venc_s_selection(struct msm_vidc_inst* inst, struct v4l2_selection* s) rc = msm_venc_s_fmt_output(inst, output_fmt); if (rc) return rc; - i_vpr_h(inst, - "%s: type %d: format %#x width %d height %d size %d\n", - __func__, output_fmt->type, output_fmt->fmt.pix_mp.pixelformat, - output_fmt->fmt.pix_mp.width, - output_fmt->fmt.pix_mp.height, - output_fmt->fmt.pix_mp.plane_fmt[0].sizeimage); break; default: i_vpr_e(inst, "%s: invalid target %d\n", @@ -1565,8 +1559,8 @@ int msm_venc_s_param(struct msm_vidc_inst *inst, set_default: q16_rate = (u32)input_rate << 16; - i_vpr_h(inst, "%s: type %u value %#x\n", - __func__, s_parm->type, q16_rate); + i_vpr_h(inst, "%s: type %s, value %#x\n", + __func__, v4l2_type_name(s_parm->type), q16_rate); msm_vidc_update_cap_value(inst, is_frame_rate ? FRAME_RATE : OPERATING_RATE, @@ -1644,8 +1638,8 @@ int msm_venc_g_param(struct msm_vidc_inst *inst, capability->cap[FRAME_RATE].value >> 16; } - i_vpr_h(inst, "%s: type %u, num %u denom %u\n", - __func__, s_parm->type, timeperframe->numerator, + i_vpr_h(inst, "%s: type %s, num %u denom %u\n", + __func__, v4l2_type_name(s_parm->type), timeperframe->numerator, timeperframe->denominator); return 0; } @@ -1713,9 +1707,9 @@ int msm_venc_enum_fmt(struct msm_vidc_inst *inst, struct v4l2_fmtdesc *f) } memset(f->reserved, 0, sizeof(f->reserved)); - i_vpr_h(inst, "%s: index %d, %s : %#x, flags %#x, driver colorfmt %#x\n", - __func__, f->index, f->description, f->pixelformat, f->flags, - v4l2_colorformat_to_driver(f->pixelformat, __func__)); + i_vpr_h(inst, "%s: index %d, %s: %s, flags %#x\n", + __func__, f->index, f->description, + v4l2_pixelfmt_name(f->pixelformat), f->flags); return rc; } @@ -1815,6 +1809,8 @@ int msm_venc_inst_init(struct msm_vidc_inst *inst) rc = msm_venc_codec_change(inst, inst->fmts[OUTPUT_PORT].fmt.pix_mp.pixelformat); + if (rc) + return rc; return rc; } @@ -1828,6 +1824,8 @@ int msm_venc_inst_deinit(struct msm_vidc_inst *inst) return -EINVAL; } rc = msm_vidc_ctrl_deinit(inst); + if (rc) + return rc; return rc; } diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index 336fe27e14..4b3a35a61d 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -248,21 +248,23 @@ int msm_vidc_g_fmt(void *instance, struct v4l2_format *f) return -EINVAL; } - if (inst->domain == MSM_VIDC_DECODER) + if (is_decode_session(inst)) rc = msm_vdec_g_fmt(inst, f); - if (inst->domain == MSM_VIDC_ENCODER) + if (is_encode_session(inst)) rc = msm_venc_g_fmt(inst, f); if (rc) return rc; if (f->type == INPUT_MPLANE || f->type == OUTPUT_MPLANE) - i_vpr_h(inst, - "%s: type %d format %#x width %d height %d size %d\n", - __func__, f->type, f->fmt.pix_mp.pixelformat, f->fmt.pix_mp.width, - f->fmt.pix_mp.height, f->fmt.pix_mp.plane_fmt[0].sizeimage); + i_vpr_h(inst, "%s: type %s format %s width %d height %d size %d\n", + __func__, v4l2_type_name(f->type), + v4l2_pixelfmt_name(f->fmt.pix_mp.pixelformat), + f->fmt.pix_mp.width, f->fmt.pix_mp.height, + f->fmt.pix_mp.plane_fmt[0].sizeimage); else if (f->type == INPUT_META_PLANE || f->type == OUTPUT_META_PLANE) - i_vpr_h(inst, "%s: meta type %d size %d\n", - __func__, f->type, f->fmt.meta.buffersize); + i_vpr_h(inst, "%s: type %s size %d\n", + __func__, v4l2_type_name(f->type), f->fmt.meta.buffersize); + return 0; } EXPORT_SYMBOL(msm_vidc_g_fmt); diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index a6945842b3..fcfd2f86e7 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -542,7 +542,7 @@ int msm_vidc_ctrl_init(struct msm_vidc_inst *inst) rc = -EINVAL; goto error; } - i_vpr_h(inst, + i_vpr_l(inst, "%s: cap[%d] %24s, value %d min %d max %d step_or_mask %#x flags %#x v4l2_id %#x hfi_id %#x\n", __func__, idx, cap_name(idx), capability->cap[idx].value, @@ -728,13 +728,6 @@ int msm_v4l2_op_s_ctrl(struct v4l2_ctrl *ctrl) rc = msm_venc_s_fmt_output(inst, output_fmt); if (rc) return rc; - - i_vpr_h(inst, - "%s: type %d: format %#x width %d height %d size %d\n", - __func__, output_fmt->type, output_fmt->fmt.pix_mp.pixelformat, - output_fmt->fmt.pix_mp.width, - output_fmt->fmt.pix_mp.height, - output_fmt->fmt.pix_mp.plane_fmt[0].sizeimage); } } diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index c2c074f959..c0b08737b1 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -302,6 +302,41 @@ exit: return name; } +const char *v4l2_type_name(u32 port) +{ + switch (port) { + case INPUT_MPLANE: return "INPUT"; + case OUTPUT_MPLANE: return "OUTPUT"; + case INPUT_META_PLANE: return "INPUT_META"; + case OUTPUT_META_PLANE: return "OUTPUT_META"; + } + + return "UNKNOWN"; +} + +const char *v4l2_pixelfmt_name(u32 pixfmt) +{ + switch (pixfmt) { + /* raw port: color format */ + case V4L2_PIX_FMT_NV12: return "NV12"; + case V4L2_PIX_FMT_NV21: return "NV21"; + case V4L2_PIX_FMT_VIDC_NV12C: return "NV12C"; + case V4L2_PIX_FMT_VIDC_P010: return "P010"; + case V4L2_PIX_FMT_VIDC_TP10C: return "TP10C"; + case V4L2_PIX_FMT_RGBA32: return "RGBA"; + case V4L2_PIX_FMT_VIDC_ARGB32C: return "RGBAC"; + /* bitstream port: codec type */ + case V4L2_PIX_FMT_H264: return "AVC"; + case V4L2_PIX_FMT_HEVC: return "HEVC"; + case V4L2_PIX_FMT_HEIC: return "HEIC"; + case V4L2_PIX_FMT_VP9: return "VP9"; + /* meta port */ + case V4L2_META_FMT_VIDC: return "META"; + } + + return "UNKNOWN"; +} + void print_vidc_buffer(u32 tag, const char *tag_str, const char *str, struct msm_vidc_inst *inst, struct msm_vidc_buffer *vbuf) { @@ -2719,7 +2754,7 @@ void msm_vidc_allow_dcvs(struct msm_vidc_inst *inst) } exit: - i_vpr_h(inst, "%s: dcvs: %s\n", __func__, allow ? "enabled" : "disabled"); + i_vpr_hp(inst, "%s: dcvs: %s\n", __func__, allow ? "enabled" : "disabled"); inst->power.dcvs_flags = 0; inst->power.dcvs_mode = allow; @@ -2804,7 +2839,7 @@ bool msm_vidc_allow_decode_batch(struct msm_vidc_inst *inst) } exit: - i_vpr_h(inst, "%s: batching: %s\n", __func__, allow ? "enabled" : "disabled"); + i_vpr_hp(inst, "%s: batching: %s\n", __func__, allow ? "enabled" : "disabled"); return allow; } diff --git a/driver/vidc/src/msm_vidc_power.c b/driver/vidc/src/msm_vidc_power.c index 3f7fe40473..9978c77e58 100644 --- a/driver/vidc/src/msm_vidc_power.c +++ b/driver/vidc/src/msm_vidc_power.c @@ -515,7 +515,7 @@ int msm_vidc_scale_power(struct msm_vidc_inst *inst, bool scale_buses) i_vpr_e(inst, "failed to scale bus\n"); } - i_vpr_h(inst, + i_vpr_hp(inst, "power: inst: clk %lld ddr %d llcc %d dcvs flags %#x, core: clk %lld ddr %lld llcc %lld\n", inst->power.curr_freq, inst->power.ddr_bw, inst->power.sys_cache_bw, inst->power.dcvs_flags, @@ -569,7 +569,7 @@ void msm_vidc_power_data_reset(struct msm_vidc_inst *inst) d_vpr_e("%s: invalid params\n", __func__); return; } - i_vpr_h(inst, "%s\n", __func__); + i_vpr_hp(inst, "%s\n", __func__); msm_vidc_dcvs_data_reset(inst); diff --git a/driver/vidc/src/msm_vidc_v4l2.c b/driver/vidc/src/msm_vidc_v4l2.c index e752f16181..cf37cd4bc9 100644 --- a/driver/vidc/src/msm_vidc_v4l2.c +++ b/driver/vidc/src/msm_vidc_v4l2.c @@ -74,9 +74,10 @@ int msm_v4l2_querycap(struct file *filp, void *fh, inst_lock(inst, __func__); rc = msm_vidc_querycap((void *)inst, cap); if (rc) - i_vpr_e(inst, "%s: failed with %d\n", __func__, rc); - inst_unlock(inst, __func__); + goto unlock; +unlock: + inst_unlock(inst, __func__); put_inst(inst); return rc; @@ -97,9 +98,10 @@ int msm_v4l2_enum_fmt(struct file *filp, void *fh, inst_lock(inst, __func__); rc = msm_vidc_enum_fmt((void *)inst, f); if (rc) - i_vpr_e(inst, "%s: failed with %d\n", __func__, rc); - inst_unlock(inst, __func__); + goto unlock; +unlock: + inst_unlock(inst, __func__); put_inst(inst); return rc; @@ -125,7 +127,7 @@ int msm_v4l2_s_fmt(struct file *filp, void *fh, } rc = msm_vidc_s_fmt((void *)inst, f); if (rc) - i_vpr_e(inst, "%s: failed with %d\n", __func__, rc); + goto unlock; unlock: inst_unlock(inst, __func__); @@ -149,9 +151,10 @@ int msm_v4l2_g_fmt(struct file *filp, void *fh, inst_lock(inst, __func__); rc = msm_vidc_g_fmt((void *)inst, f); if (rc) - i_vpr_e(inst, "%s: failed with %d\n", __func__, rc); - inst_unlock(inst, __func__); + goto unlock; +unlock: + inst_unlock(inst, __func__); put_inst(inst); return rc; @@ -177,7 +180,7 @@ int msm_v4l2_s_selection(struct file *filp, void *fh, } rc = msm_vidc_s_selection((void *)inst, s); if (rc) - i_vpr_e(inst, "%s: failed with %d\n", __func__, rc); + goto unlock; unlock: inst_unlock(inst, __func__); @@ -201,9 +204,10 @@ int msm_v4l2_g_selection(struct file *filp, void *fh, inst_lock(inst, __func__); rc = msm_vidc_g_selection((void *)inst, s); if (rc) - i_vpr_e(inst, "%s: failed with %d\n", __func__, rc); - inst_unlock(inst, __func__); + goto unlock; +unlock: + inst_unlock(inst, __func__); put_inst(inst); return rc; @@ -229,7 +233,7 @@ int msm_v4l2_s_parm(struct file *filp, void *fh, } rc = msm_vidc_s_param((void *)inst, a); if (rc) - i_vpr_e(inst, "%s: failed with %d\n", __func__, rc); + goto unlock; unlock: inst_unlock(inst, __func__); @@ -253,9 +257,10 @@ int msm_v4l2_g_parm(struct file *filp, void *fh, inst_lock(inst, __func__); rc = msm_vidc_g_param((void *)inst, a); if (rc) - i_vpr_e(inst, "%s: failed with %d\n", __func__, rc); - inst_unlock(inst, __func__); + goto unlock; +unlock: + inst_unlock(inst, __func__); put_inst(inst); return rc; @@ -281,7 +286,7 @@ int msm_v4l2_s_ctrl(struct file *filp, void *fh, } rc = msm_vidc_s_ctrl((void *)inst, a); if (rc) - i_vpr_e(inst, "%s: failed with %d\n", __func__, rc); + goto unlock; unlock: inst_unlock(inst, __func__); @@ -305,9 +310,10 @@ int msm_v4l2_g_ctrl(struct file *filp, void *fh, inst_lock(inst, __func__); rc = msm_vidc_g_ctrl((void *)inst, a); if (rc) - i_vpr_e(inst, "%s: failed with %d\n", __func__, rc); - inst_unlock(inst, __func__); + goto unlock; +unlock: + inst_unlock(inst, __func__); put_inst(inst); return rc; @@ -328,9 +334,10 @@ int msm_v4l2_reqbufs(struct file *filp, void *fh, inst_lock(inst, __func__); rc = msm_vidc_reqbufs((void *)inst, b); if (rc) - i_vpr_e(inst, "%s: failed with %d\n", __func__, rc); - inst_unlock(inst, __func__); + goto unlock; +unlock: + inst_unlock(inst, __func__); put_inst(inst); return rc; @@ -357,7 +364,7 @@ int msm_v4l2_qbuf(struct file *filp, void *fh, } rc = msm_vidc_qbuf(inst, vdev->v4l2_dev->mdev, b); if (rc) - i_vpr_e(inst, "%s: failed with %d\n", __func__, rc); + goto unlock; unlock: inst_unlock(inst, __func__); @@ -380,8 +387,11 @@ int msm_v4l2_dqbuf(struct file *filp, void *fh, inst_lock(inst, __func__); rc = msm_vidc_dqbuf(inst, b); - inst_unlock(inst, __func__); + if (rc) + goto unlock; +unlock: + inst_unlock(inst, __func__); put_inst(inst); return rc; @@ -407,7 +417,7 @@ int msm_v4l2_streamon(struct file *filp, void *fh, } rc = msm_vidc_streamon((void *)inst, i); if (rc) - i_vpr_e(inst, "%s: failed with %d\n", __func__, rc); + goto unlock; unlock: inst_unlock(inst, __func__); @@ -431,9 +441,10 @@ int msm_v4l2_streamoff(struct file *filp, void *fh, inst_lock(inst, __func__); rc = msm_vidc_streamoff((void *)inst, i); if (rc) - i_vpr_e(inst, "%s: failed with %d\n", __func__, rc); - inst_unlock(inst, __func__); + goto unlock; +unlock: + inst_unlock(inst, __func__); put_inst(inst); return rc; @@ -460,7 +471,7 @@ int msm_v4l2_subscribe_event(struct v4l2_fh *fh, } rc = msm_vidc_subscribe_event((void *)inst, sub); if (rc) - i_vpr_e(inst, "%s: failed with %d\n", __func__, rc); + goto unlock; unlock: inst_unlock(inst, __func__); @@ -485,9 +496,10 @@ int msm_v4l2_unsubscribe_event(struct v4l2_fh *fh, inst_lock(inst, __func__); rc = msm_vidc_unsubscribe_event((void *)inst, sub); if (rc) - i_vpr_e(inst, "%s: failed with %d\n", __func__, rc); - inst_unlock(inst, __func__); + goto unlock; +unlock: + inst_unlock(inst, __func__); put_inst(inst); return rc; @@ -513,7 +525,7 @@ int msm_v4l2_decoder_cmd(struct file *filp, void *fh, } rc = msm_vidc_cmd((void *)inst, (union msm_v4l2_cmd *)dec); if (rc) - i_vpr_e(inst, "%s: failed with %d\n", __func__, rc); + goto unlock; unlock: inst_unlock(inst, __func__); @@ -542,7 +554,7 @@ int msm_v4l2_encoder_cmd(struct file *filp, void *fh, } rc = msm_vidc_cmd((void *)inst, (union msm_v4l2_cmd *)enc); if (rc) - i_vpr_e(inst, "%s: failed with %d\n", __func__, rc); + goto unlock; unlock: inst_unlock(inst, __func__); @@ -566,9 +578,10 @@ int msm_v4l2_enum_framesizes(struct file *filp, void *fh, inst_lock(inst, __func__); rc = msm_vidc_enum_framesizes((void *)inst, fsize); if (rc) - i_vpr_e(inst, "%s: failed with %d\n", __func__, rc); - inst_unlock(inst, __func__); + goto unlock; +unlock: + inst_unlock(inst, __func__); put_inst(inst); return rc; @@ -589,9 +602,10 @@ int msm_v4l2_enum_frameintervals(struct file *filp, void *fh, inst_lock(inst, __func__); rc = msm_vidc_enum_frameintervals((void *)inst, fival); if (rc) - i_vpr_e(inst, "%s: failed with %d\n", __func__, rc); - inst_unlock(inst, __func__); + goto unlock; +unlock: + inst_unlock(inst, __func__); put_inst(inst); return rc; @@ -612,9 +626,10 @@ int msm_v4l2_queryctrl(struct file *filp, void *fh, inst_lock(inst, __func__); rc = msm_vidc_query_ctrl((void *)inst, ctrl); if (rc) - i_vpr_e(inst, "%s: failed with %d\n", __func__, rc); - inst_unlock(inst, __func__); + goto unlock; +unlock: + inst_unlock(inst, __func__); put_inst(inst); return rc; @@ -635,9 +650,10 @@ int msm_v4l2_querymenu(struct file *filp, void *fh, inst_lock(inst, __func__); rc = msm_vidc_query_menu((void *)inst, qmenu); if (rc) - i_vpr_e(inst, "%s: failed with %d\n", __func__, rc); - inst_unlock(inst, __func__); + goto unlock; +unlock: + inst_unlock(inst, __func__); put_inst(inst); return rc; diff --git a/driver/vidc/src/msm_vidc_vb2.c b/driver/vidc/src/msm_vidc_vb2.c index 3a509bf295..f7972639ef 100644 --- a/driver/vidc/src/msm_vidc_vb2.c +++ b/driver/vidc/src/msm_vidc_vb2.c @@ -142,8 +142,8 @@ int msm_vidc_queue_setup(struct vb2_queue *q, } i_vpr_h(inst, - "queue_setup: type %d num_buffers %d sizes[0] %d\n", - q->type, *num_buffers, sizes[0]); + "queue_setup: type %s num_buffers %d sizes[0] %d\n", + v4l2_type_name(q->type), *num_buffers, sizes[0]); return rc; } @@ -163,8 +163,8 @@ int msm_vidc_start_streaming(struct vb2_queue *q, unsigned int count) return -EINVAL; } if (q->type == INPUT_META_PLANE || q->type == OUTPUT_META_PLANE) { - i_vpr_h(inst, "%s: nothing to start on meta port %d\n", - __func__, q->type); + i_vpr_h(inst, "%s: nothing to start on %s\n", + __func__, v4l2_type_name(q->type)); return 0; } if (!is_decode_session(inst) && !is_encode_session(inst)) { @@ -172,7 +172,7 @@ int msm_vidc_start_streaming(struct vb2_queue *q, unsigned int count) __func__, inst->domain); return -EINVAL; } - i_vpr_h(inst, "Streamon: %d\n", q->type); + i_vpr_h(inst, "Streamon: %s\n", v4l2_type_name(q->type)); if (!inst->once_per_session_set) { inst->once_per_session_set = true; @@ -236,12 +236,12 @@ int msm_vidc_start_streaming(struct vb2_queue *q, unsigned int count) if (rc) goto error; - i_vpr_h(inst, "Streamon: %d successful\n", q->type); + i_vpr_h(inst, "Streamon: %s successful\n", v4l2_type_name(q->type)); return rc; error: - i_vpr_h(inst, "Streamon: %d failed\n", q->type); + i_vpr_h(inst, "Streamon: %s failed\n", v4l2_type_name(q->type)); return -EINVAL; } @@ -260,8 +260,8 @@ void msm_vidc_stop_streaming(struct vb2_queue *q) return; } if (q->type == INPUT_META_PLANE || q->type == OUTPUT_META_PLANE) { - i_vpr_h(inst, "%s: nothing to stop on meta port %d\n", - __func__, q->type); + i_vpr_h(inst, "%s: nothing to stop on %s\n", + __func__, v4l2_type_name(q->type)); return; } if (!is_decode_session(inst) && !is_encode_session(inst)) { @@ -269,7 +269,7 @@ void msm_vidc_stop_streaming(struct vb2_queue *q) __func__, inst->domain); return; } - i_vpr_h(inst, "Streamoff: %d\n", q->type); + i_vpr_h(inst, "Streamoff: %s\n", v4l2_type_name(q->type)); if (q->type == INPUT_MPLANE) { if (is_decode_session(inst)) @@ -292,11 +292,11 @@ void msm_vidc_stop_streaming(struct vb2_queue *q) if (q->type == INPUT_MPLANE) msm_vidc_flush_ts(inst); - i_vpr_h(inst, "Streamoff: %d successful\n", q->type); + i_vpr_h(inst, "Streamoff: %s successful\n", v4l2_type_name(q->type)); return; error: - i_vpr_e(inst, "Streamoff: %d failed\n", q->type); + i_vpr_e(inst, "Streamoff: %s failed\n", v4l2_type_name(q->type)); return; } diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index e45643cc59..1aaaa79816 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -250,8 +250,7 @@ int __write_register(struct msm_vidc_core *core, } base_addr = core->register_base_addr; - d_vpr_l("Base addr: %pK, writing to: %#x, Value: %#x...\n", - base_addr, hwiosymaddr, value); + d_vpr_l("regwrite(%pK + %#x) = %#x\n", base_addr, hwiosymaddr, value); base_addr += hwiosymaddr; writel_relaxed(value, base_addr); @@ -335,8 +334,7 @@ int __read_register(struct msm_vidc_core *core, u32 reg) * register. */ rmb(); - d_vpr_l("Base addr: %pK, read from: %#x, value: %#x...\n", - base_addr, reg, rc); + d_vpr_l("regread(%pK + %#x) = %#x\n", base_addr, reg, rc); return rc; } From e923948da6f156886b9e0bdf2293cbc0e0170f67 Mon Sep 17 00:00:00 2001 From: Vikash Garodia Date: Tue, 1 Jun 2021 17:45:12 +0530 Subject: [PATCH 0336/1061] msm: vidc: Fix priority level determination Priority level was not determined at few sequences. Determine the priority level and set to firmware, if there is a change in driver and firmware priority. Change-Id: I97861fd4ce8cfb7cf828a8da9a5ce8ba900280ef Signed-off-by: Vikash Garodia --- .../variant/iris2/src/msm_vidc_power_iris2.c | 9 +++++++-- driver/vidc/inc/msm_vidc_inst.h | 1 + driver/vidc/src/msm_vdec.c | 9 +++++++-- driver/vidc/src/msm_venc.c | 14 ++++++++++++-- driver/vidc/src/msm_vidc_control.c | 19 +++++++++++-------- 5 files changed, 38 insertions(+), 14 deletions(-) diff --git a/driver/variant/iris2/src/msm_vidc_power_iris2.c b/driver/variant/iris2/src/msm_vidc_power_iris2.c index 32c389d207..dc53085630 100644 --- a/driver/variant/iris2/src/msm_vidc_power_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_power_iris2.c @@ -50,9 +50,14 @@ u64 msm_vidc_calc_freq_iris2(struct msm_vidc_inst *inst, u32 data_size) buf_timetamps_fps = msm_vidc_calc_framerate(inst); - /* use buffer detected fps instead of client set value */ - if (fps < buf_timetamps_fps) + /* + * when buffer detected fps is more than client set value by 10%, + * utilize buffer detected fps to scale clock. + */ + if (div_u64(fps * 11, 10) < buf_timetamps_fps) { fps = buf_timetamps_fps; + inst->priority_level = MSM_VIDC_PRIORITY_LOW; + } mbs_per_second = mbpf * fps; diff --git a/driver/vidc/inc/msm_vidc_inst.h b/driver/vidc/inc/msm_vidc_inst.h index 684147c5fd..d8aed7cd21 100644 --- a/driver/vidc/inc/msm_vidc_inst.h +++ b/driver/vidc/inc/msm_vidc_inst.h @@ -146,6 +146,7 @@ struct msm_vidc_inst { struct msm_vidc_inst_capability *capabilities; struct completion completions[MAX_SIGNAL]; enum priority_level priority_level; + u32 firmware_priority; bool active; u64 last_qbuf_time_ns; bool vb2q_init; diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index f128e19a79..312226c9bb 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -1981,6 +1981,10 @@ int msm_vdec_qbuf(struct msm_vidc_inst *inst, struct vb2_buffer *vb2) } } + if (inst->firmware_priority != (inst->priority_level + + inst->capabilities->cap[PRIORITY].value * 2)) + msm_vidc_set_session_priority(inst, PRIORITY); + /* batch decoder output & meta buffer only */ if (inst->decode_batch.enable && vb2->type == OUTPUT_MPLANE) rc = msm_vdec_qbuf_batch(inst, vb2); @@ -2369,8 +2373,7 @@ set_default: } } - if (!is_realtime_session(inst)) - inst->priority_level = MSM_VIDC_PRIORITY_HIGH; + inst->priority_level = MSM_VIDC_PRIORITY_HIGH; if (is_frame_rate) capability->cap[FRAME_RATE].flags |= CAP_FLAG_CLIENT_SET; @@ -2599,6 +2602,8 @@ int msm_vdec_inst_init(struct msm_vidc_inst *inst) inst->buffers.output_meta.actual_count = 0; inst->buffers.output_meta.size = 0; + inst->priority_level = MSM_VIDC_PRIORITY_LOW; + rc = msm_vdec_codec_change(inst, inst->fmts[INPUT_PORT].fmt.pix_mp.pixelformat); diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index b2b111c020..c4d2eae674 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -858,6 +858,15 @@ int msm_venc_qbuf(struct msm_vidc_inst *inst, struct vb2_buffer *vb2) { int rc = 0; + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (inst->firmware_priority != (inst->priority_level + + inst->capabilities->cap[PRIORITY].value * 2)) + msm_vidc_set_session_priority(inst, PRIORITY); + rc = msm_vidc_queue_buffer_single(inst, vb2); if (rc) return rc; @@ -1587,8 +1596,7 @@ set_default: } } - if (!is_realtime_session(inst)) - inst->priority_level = MSM_VIDC_PRIORITY_HIGH; + inst->priority_level = MSM_VIDC_PRIORITY_HIGH; if (is_frame_rate) capability->cap[FRAME_RATE].flags |= CAP_FLAG_CLIENT_SET; @@ -1810,6 +1818,8 @@ int msm_venc_inst_init(struct msm_vidc_inst *inst) inst->buffers.input_meta.actual_count = 0; inst->buffers.input_meta.size = 0; + inst->priority_level = MSM_VIDC_PRIORITY_LOW; + inst->hfi_rc_type = HFI_RC_VBR_CFR; inst->hfi_layer_type = HFI_HIER_P_SLIDING_WINDOW; diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 9966ff79ae..9d6914c6bf 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -1901,7 +1901,7 @@ int msm_vidc_adjust_session_priority(void *instance, struct v4l2_ctrl *ctrl) { int rc = 0; int adjusted_value; - bool rate_by_client = false; + bool rate_by_client; struct msm_vidc_inst_capability *capability; struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; @@ -1914,8 +1914,13 @@ int msm_vidc_adjust_session_priority(void *instance, struct v4l2_ctrl *ctrl) capability->cap[PRIORITY].value; if (capability->cap[FRAME_RATE].flags & CAP_FLAG_CLIENT_SET || - capability->cap[OPERATING_RATE].flags & CAP_FLAG_CLIENT_SET) + capability->cap[OPERATING_RATE].flags & CAP_FLAG_CLIENT_SET) { rate_by_client = true; + inst->priority_level = MSM_VIDC_PRIORITY_HIGH; + } else { + rate_by_client = false; + inst->priority_level = MSM_VIDC_PRIORITY_LOW; + } /* * For RT, check for resource feasability if rate is set by client. @@ -1930,13 +1935,9 @@ int msm_vidc_adjust_session_priority(void *instance, struct v4l2_ctrl *ctrl) return rc; } } - if (adjusted_value == 0 && !rate_by_client) { - adjusted_value = 1; - inst->priority_level = MSM_VIDC_PRIORITY_LOW; - } - if (adjusted_value > 0 && rate_by_client) - inst->priority_level = MSM_VIDC_PRIORITY_HIGH; + if (adjusted_value == 0 && !rate_by_client) + adjusted_value = 1; msm_vidc_update_cap_value(inst, PRIORITY, adjusted_value, __func__); @@ -2762,6 +2763,8 @@ int msm_vidc_set_session_priority(void *instance, if (rc) return rc; + inst->firmware_priority = hfi_value; + return rc; } From 3a7632ca4d647c71a3532a5634f7626737173391 Mon Sep 17 00:00:00 2001 From: Mihir Ganu Date: Fri, 4 Jun 2021 11:00:57 -0700 Subject: [PATCH 0337/1061] video: driver: Update session admission and work modes - To determine if session is admissible, check only the decoder input width/height and encoder crop width/height. - Update session MBPF Calculations. - Amend work mode setting to consider decoder input width, height and GOP size. Change-Id: If4053c222de2a55ad5b85a8ab96c12c47b145aa3 Signed-off-by: Mihir Ganu --- driver/platform/waipio/src/msm_vidc_waipio.c | 4 +- driver/variant/iris2/src/msm_vidc_iris2.c | 25 ++--- driver/vidc/inc/msm_vidc_driver.h | 2 + driver/vidc/src/msm_vidc_driver.c | 99 ++++++++++++-------- 4 files changed, 79 insertions(+), 51 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 92da0bfcca..46a03f8af7 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -1430,8 +1430,8 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { HFI_PROP_DEC_QP_METADATA}, /* configure image properties */ - {FRAME_WIDTH, ENC, HEIC, 512, 16384, 1, 16384}, - {FRAME_HEIGHT, ENC, HEIC, 512, 16384, 1, 16384}, + {FRAME_WIDTH, ENC, HEIC, 128, 16384, 1, 16384}, + {FRAME_HEIGHT, ENC, HEIC, 128, 16384, 1, 16384}, {MIN_BUFFERS_INPUT, ENC|DEC, HEIC, 0, 64, 1, 1, V4L2_CID_MIN_BUFFERS_FOR_OUTPUT}, {MBPF, DEC, HEIC, 64, 262144, 1, 262144 }, /* ((8192x8192)/256) */ diff --git a/driver/variant/iris2/src/msm_vidc_iris2.c b/driver/variant/iris2/src/msm_vidc_iris2.c index f2f701591d..161b015097 100644 --- a/driver/variant/iris2/src/msm_vidc_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_iris2.c @@ -536,7 +536,7 @@ static int __boot_firmware_iris2(struct msm_vidc_core *vidc_core) int msm_vidc_decide_work_mode_iris2(struct msm_vidc_inst* inst) { u32 work_mode; - struct v4l2_format* out_f; + struct v4l2_format *inp_f; u32 width, height; bool res_ok = false; @@ -546,7 +546,7 @@ int msm_vidc_decide_work_mode_iris2(struct msm_vidc_inst* inst) } work_mode = MSM_VIDC_STAGE_2; - out_f = &inst->fmts[OUTPUT_PORT]; + inp_f = &inst->fmts[INPUT_PORT]; if (is_image_decode_session(inst)) work_mode = MSM_VIDC_STAGE_1; @@ -555,9 +555,9 @@ int msm_vidc_decide_work_mode_iris2(struct msm_vidc_inst* inst) goto exit; if (is_decode_session(inst)) { - height = out_f->fmt.pix_mp.height; - width = out_f->fmt.pix_mp.width; - res_ok = res_is_less_than_or_equal_to(width, height, 1280, 720); + height = inp_f->fmt.pix_mp.height; + width = inp_f->fmt.pix_mp.width; + res_ok = res_is_less_than(width, height, 1280, 720); if (inst->capabilities->cap[CODED_FRAMES].value == CODED_FRAMES_INTERLACE || inst->capabilities->cap[LOWLATENCY_MODE].value || @@ -572,19 +572,20 @@ int msm_vidc_decide_work_mode_iris2(struct msm_vidc_inst* inst) (inst->capabilities->cap[LOWLATENCY_MODE].value)) { work_mode = MSM_VIDC_STAGE_1; } - if (inst->capabilities->cap[LOSSLESS].value) { - /*TODO Set 2 stage in case of ALL INTRA */ + if (inst->capabilities->cap[LOSSLESS].value) work_mode = MSM_VIDC_STAGE_2; - } - } - else { + + if (!inst->capabilities->cap[GOP_SIZE].value) + work_mode = MSM_VIDC_STAGE_2; + } else { i_vpr_e(inst, "%s: invalid session type\n", __func__); return -EINVAL; } exit: - i_vpr_h(inst, "Configuring work mode = %u low latency = %u", - work_mode, inst->capabilities->cap[LOWLATENCY_MODE].value); + i_vpr_h(inst, "Configuring work mode = %u low latency = %u, gop size = %u\n", + work_mode, inst->capabilities->cap[LOWLATENCY_MODE].value, + inst->capabilities->cap[GOP_SIZE].value); msm_vidc_update_cap_value(inst, STAGE, work_mode, __func__); return 0; diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index e4f12ca632..bda9021be2 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -427,6 +427,8 @@ void msm_vidc_free_capabililty_list(struct msm_vidc_inst *inst, enum msm_vidc_ctrl_list_type list_type); bool res_is_greater_than(u32 width, u32 height, u32 ref_width, u32 ref_height); +bool res_is_less_than(u32 width, u32 height, + u32 ref_width, u32 ref_height); bool res_is_less_than_or_equal_to(u32 width, u32 height, u32 ref_width, u32 ref_height); #endif // _MSM_VIDC_DRIVER_H_ diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index c2c074f959..f9c4a92b34 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -1040,6 +1040,20 @@ bool res_is_greater_than(u32 width, u32 height, return false; } +bool res_is_less_than(u32 width, u32 height, + u32 ref_width, u32 ref_height) +{ + u32 num_mbs = NUM_MBS_PER_FRAME(height, width); + u32 max_side = max(ref_width, ref_height); + + if (num_mbs < NUM_MBS_PER_FRAME(ref_height, ref_width) && + width < max_side && + height < max_side) + return true; + else + return false; +} + bool res_is_less_than_or_equal_to(u32 width, u32 height, u32 ref_width, u32 ref_height) { @@ -1809,16 +1823,17 @@ int msm_vidc_get_control(struct msm_vidc_inst *inst, struct v4l2_ctrl *ctrl) int msm_vidc_get_mbs_per_frame(struct msm_vidc_inst *inst) { - int height, width; - struct v4l2_format *out_f; + int height = 0, width = 0; struct v4l2_format *inp_f; - out_f = &inst->fmts[OUTPUT_PORT]; - inp_f = &inst->fmts[INPUT_PORT]; - height = max(out_f->fmt.pix_mp.height, - inp_f->fmt.pix_mp.height); - width = max(out_f->fmt.pix_mp.width, - inp_f->fmt.pix_mp.width); + if (is_decode_session(inst)) { + inp_f = &inst->fmts[INPUT_PORT]; + width = inp_f->fmt.pix_mp.width; + height = inp_f->fmt.pix_mp.height; + } else if (is_encode_session(inst)) { + width = inst->crop.width; + height = inst->crop.height; + } return NUM_MBS_PER_FRAME(height, width); } @@ -5272,8 +5287,7 @@ exit: int msm_vidc_check_session_supported(struct msm_vidc_inst *inst) { struct msm_vidc_inst_capability *capability; - struct v4l2_format *fmt; - u32 iwidth, owidth, iheight, oheight, min_width, min_height, + u32 width = 0, height = 0, min_width, min_height, max_width, max_height; bool allow = false, is_interlaced = false; int rc = 0; @@ -5302,13 +5316,13 @@ int msm_vidc_check_session_supported(struct msm_vidc_inst *inst) if (rc) goto exit; - fmt = &inst->fmts[INPUT_PORT]; - iwidth = fmt->fmt.pix_mp.width; - iheight = fmt->fmt.pix_mp.height; - - fmt = &inst->fmts[OUTPUT_PORT]; - owidth = fmt->fmt.pix_mp.width; - oheight = fmt->fmt.pix_mp.height; + if (is_decode_session(inst)) { + width = inst->fmts[INPUT_PORT].fmt.pix_mp.width; + height = inst->fmts[INPUT_PORT].fmt.pix_mp.height; + } else if (is_encode_session(inst)) { + width = inst->crop.width; + height = inst->crop.height; + } if (is_secure_session(inst)) { min_width = capability->cap[SECURE_FRAME_WIDTH].min; @@ -5329,29 +5343,40 @@ int msm_vidc_check_session_supported(struct msm_vidc_inst *inst) /* reject odd resolution session */ if (is_encode_session(inst) && - (is_odd(iwidth) || is_odd(iheight) || is_odd(owidth) || is_odd(oheight))) { - i_vpr_e(inst, "%s: resolution is not even. input [%u x %u], output [%u x %u]\n", - __func__, iwidth, iheight, owidth, oheight); + (is_odd(width) || is_odd(height) || + is_odd(inst->compose.width) || + is_odd(inst->compose.height))) { + i_vpr_e(inst, "%s: resolution is not even. wxh [%u x %u], compose [%u x %u]\n", + __func__, width, height, inst->compose.width, + inst->compose.height); rc = -EINVAL; goto exit; } - /* check input width and height is in supported range */ - if (!in_range(iwidth, min_width, max_width) || !in_range(iheight, min_height, max_height)) { - i_vpr_e(inst, - "%s: unsupported input wxh [%u x %u], allowed range: [%u x %u] to [%u x %u]\n", - __func__, iwidth, iheight, min_width, min_height, max_width, max_height); - rc = -EINVAL; - goto exit; + /* check decoder input width and height is in supported range */ + if (is_decode_session(inst)) { + if (!in_range(width, min_width, max_width) || + !in_range(height, min_height, max_height)) { + i_vpr_e(inst, + "%s: unsupported input wxh [%u x %u], allowed range: [%u x %u] to [%u x %u]\n", + __func__, width, height, min_width, + min_height, max_width, max_height); + rc = -EINVAL; + goto exit; + } } - /* check output width and height is in supported range */ - if (!in_range(owidth, min_width, max_width) || !in_range(oheight, min_height, max_height)) { - i_vpr_e(inst, - "%s: unsupported output wxh [%u x %u], allowed range: [%u x %u] to [%u x %u]\n", - __func__, owidth, oheight, min_width, min_height, max_width, max_height); - rc = -EINVAL; - goto exit; + /* check encoder crop width and height is in supported range */ + if (is_encode_session(inst)) { + if (!in_range(width, min_width, max_width) || + !in_range(height, min_height, max_height)) { + i_vpr_e(inst, + "%s: unsupported wxh [%u x %u], allowed range: [%u x %u] to [%u x %u]\n", + __func__, width, height, min_width, + min_height, max_width, max_height); + rc = -EINVAL; + goto exit; + } } /* check image capabilities */ @@ -5366,10 +5391,10 @@ int msm_vidc_check_session_supported(struct msm_vidc_inst *inst) /* check interlace supported resolution */ is_interlaced = capability->cap[CODED_FRAMES].value == CODED_FRAMES_INTERLACE; - if (is_interlaced && (owidth > INTERLACE_WIDTH_MAX || oheight > INTERLACE_HEIGHT_MAX || - NUM_MBS_PER_FRAME(owidth, oheight) > INTERLACE_MB_PER_FRAME_MAX)) { + if (is_interlaced && (width > INTERLACE_WIDTH_MAX || height > INTERLACE_HEIGHT_MAX || + NUM_MBS_PER_FRAME(width, height) > INTERLACE_MB_PER_FRAME_MAX)) { i_vpr_e(inst, "%s: unsupported interlace wxh [%u x %u], max [%u x %u]\n", - __func__, owidth, oheight, INTERLACE_WIDTH_MAX, INTERLACE_HEIGHT_MAX); + __func__, width, height, INTERLACE_WIDTH_MAX, INTERLACE_HEIGHT_MAX); rc = -EINVAL; goto exit; } From 83f9b26441a2e42a3830d2f1c65b4a676e93b869 Mon Sep 17 00:00:00 2001 From: Chinmay Sawarkar Date: Fri, 4 Jun 2021 17:54:42 -0700 Subject: [PATCH 0338/1061] video: driver: Set secure mode in encoder Enable HFI_PROP_SECURE when secure session is enabled in encoder. Same behaviour as Decoder. Change-Id: I5edfe3d735fda8edea9e491ae17546945b4431a1 Signed-off-by: Chinmay Sawarkar --- driver/platform/waipio/src/msm_vidc_waipio.c | 2 +- driver/vidc/inc/msm_vidc_driver.h | 1 + driver/vidc/inc/venus_hfi.h | 1 + driver/vidc/src/msm_vdec.c | 25 ----------- driver/vidc/src/msm_vidc_driver.c | 16 +++++++ driver/vidc/src/msm_vidc_vb2.c | 4 ++ driver/vidc/src/venus_hfi.c | 44 ++++++++++++++++++++ 7 files changed, 67 insertions(+), 26 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index b331acc744..7b16772344 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -222,7 +222,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDC_SECURE, HFI_PROP_SECURE, - CAP_FLAG_ROOT, + CAP_FLAG_NONE, {0}, {0}, NULL, msm_vidc_set_u32}, diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index e4f12ca632..4397e7e4f8 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -304,6 +304,7 @@ int msm_vidc_remove_session(struct msm_vidc_inst *inst); int msm_vidc_add_session(struct msm_vidc_inst *inst); int msm_vidc_session_open(struct msm_vidc_inst *inst); int msm_vidc_session_set_codec(struct msm_vidc_inst *inst); +int msm_vidc_session_set_secure_mode(struct msm_vidc_inst *inst); int msm_vidc_session_set_default_header(struct msm_vidc_inst *inst); int msm_vidc_session_streamon(struct msm_vidc_inst *inst, enum msm_vidc_port_type port); diff --git a/driver/vidc/inc/venus_hfi.h b/driver/vidc/inc/venus_hfi.h index 1557ad3312..969971948d 100644 --- a/driver/vidc/inc/venus_hfi.h +++ b/driver/vidc/inc/venus_hfi.h @@ -44,6 +44,7 @@ int venus_hfi_stop(struct msm_vidc_inst *inst, enum msm_vidc_port_type port); int venus_hfi_session_close(struct msm_vidc_inst *inst); int venus_hfi_session_open(struct msm_vidc_inst *inst); int venus_hfi_session_set_codec(struct msm_vidc_inst *inst); +int venus_hfi_session_set_secure_mode(struct msm_vidc_inst *inst); int venus_hfi_core_init(struct msm_vidc_core *core); int venus_hfi_core_deinit(struct msm_vidc_core *core); int venus_hfi_noc_error_info(struct msm_vidc_core *core); diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index f128e19a79..bd6b6ab716 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -557,27 +557,6 @@ static int msm_vdec_set_output_order(struct msm_vidc_inst *inst, return rc; } -static int msm_vdec_set_secure_mode(struct msm_vidc_inst *inst, - enum msm_vidc_port_type port) -{ - int rc = 0; - u32 secure_mode; - - secure_mode = inst->capabilities->cap[SECURE_MODE].value; - i_vpr_h(inst, "%s: secure mode: %d", __func__, secure_mode); - rc = venus_hfi_session_property(inst, - HFI_PROP_SECURE, - HFI_HOST_FLAGS_NONE, - HFI_PORT_NONE, - HFI_PAYLOAD_U32, - &secure_mode, - sizeof(u32)); - if (rc) - i_vpr_e(inst, "%s: set property failed\n", __func__); - - return rc; -} - static int msm_vdec_set_rap_frame(struct msm_vidc_inst *inst, enum msm_vidc_port_type port) { @@ -718,10 +697,6 @@ static int msm_vdec_set_input_properties(struct msm_vidc_inst *inst) if (rc) return rc; - rc = msm_vdec_set_secure_mode(inst, INPUT_PORT); - if (rc) - return rc; - rc = msm_vdec_set_thumbnail_mode(inst, INPUT_PORT); if (rc) return rc; diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 0210601983..13b9290161 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -3641,6 +3641,22 @@ int msm_vidc_session_set_codec(struct msm_vidc_inst *inst) return 0; } +int msm_vidc_session_set_secure_mode(struct msm_vidc_inst *inst) +{ + int rc = 0; + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + rc = venus_hfi_session_set_secure_mode(inst); + if (rc) + return rc; + + return 0; +} + int msm_vidc_session_set_default_header(struct msm_vidc_inst *inst) { int rc = 0; diff --git a/driver/vidc/src/msm_vidc_vb2.c b/driver/vidc/src/msm_vidc_vb2.c index 3a509bf295..6e217bc417 100644 --- a/driver/vidc/src/msm_vidc_vb2.c +++ b/driver/vidc/src/msm_vidc_vb2.c @@ -180,6 +180,10 @@ int msm_vidc_start_streaming(struct vb2_queue *q, unsigned int count) if (rc) return rc; + rc = msm_vidc_session_set_secure_mode(inst); + if (rc) + return rc; + if (is_encode_session(inst)) { rc = msm_vidc_alloc_and_queue_session_internal_buffers(inst, MSM_VIDC_BUF_ARP); diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index e45643cc59..0d5fb2d7b0 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -3069,6 +3069,50 @@ unlock: return rc; } +int venus_hfi_session_set_secure_mode(struct msm_vidc_inst *inst) +{ + int rc = 0; + struct msm_vidc_core *core; + u32 secure_mode; + + if (!inst || !inst->core || !inst->packet) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + core = inst->core; + core_lock(core, __func__); + + if (!__valdiate_session(core, inst, __func__)) { + rc = -EINVAL; + goto unlock; + } + + rc = hfi_create_header(inst->packet, inst->packet_size, + inst->session_id, core->header_id++); + if (rc) + goto unlock; + + secure_mode = inst->capabilities->cap[SECURE_MODE].value; + rc = hfi_create_packet(inst->packet, inst->packet_size, + HFI_PROP_SECURE, + HFI_HOST_FLAGS_NONE, + HFI_PAYLOAD_U32, + HFI_PORT_NONE, + core->packet_id++, + &secure_mode, + sizeof(u32)); + if (rc) + goto unlock; + + rc = __iface_cmdq_write(inst->core, inst->packet); + if (rc) + goto unlock; + +unlock: + core_unlock(core, __func__); + return rc; +} + int venus_hfi_session_property(struct msm_vidc_inst *inst, u32 pkt_type, u32 flags, u32 port, u32 payload_type, void *payload, u32 payload_size) From e5a2546752b9d4d12fb89261409e989e10c574b0 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Mon, 7 Jun 2021 17:47:00 +0530 Subject: [PATCH 0339/1061] video: driver: do core_deinit for power_collapse failure if skip_pc_count reaches VIDC_MAX_PC_SKIP_COUNT, that means something wrong with hardware. So call core_deinit to reset the hardware, so that atleast next session willbe proper. Change-Id: I320fcc2917825a2ff79889b8183e2842257f3569 Signed-off-by: Govindaraj Rajagopal --- driver/vidc/src/venus_hfi.c | 16 ++++++++++------ 1 file changed, 10 insertions(+), 6 deletions(-) diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index 463bf472bd..f3015c0444 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -1178,12 +1178,12 @@ static int __power_collapse(struct msm_vidc_core *core, bool force) return -EINVAL; } + __flush_debug_queue(core, core->packet, core->packet_size); + rc = call_venus_op(core, prepare_pc, core); if (rc) goto skip_power_off; - __flush_debug_queue(core, core->packet, core->packet_size); - rc = __suspend(core); if (rc) d_vpr_e("Failed __suspend\n"); @@ -2647,9 +2647,6 @@ void __unload_fw(struct msm_vidc_core *core) return; cancel_delayed_work(&core->pm_work); - if (core->state != MSM_VIDC_CORE_DEINIT) - flush_workqueue(core->pm_workq); - rc = qcom_scm_pas_shutdown(core->dt->fw_cookie); if (rc) d_vpr_e("Firmware unload failed rc=%d\n", rc); @@ -2744,11 +2741,17 @@ void venus_hfi_pm_work_handler(struct work_struct *work) d_vpr_e("Failed to PC for %d times\n", core->skip_pc_count); core->skip_pc_count = 0; - //__process_fatal_error(core); + msm_vidc_core_deinit(core, true); return; } core_lock(core, __func__); + /* core already deinited - skip power collapse */ + if (core->state == MSM_VIDC_CORE_DEINIT) { + d_vpr_e("%s: core is already de-inited\n", __func__); + goto unlock; + } + rc = __power_collapse(core, false); switch (rc) { case 0: @@ -2772,6 +2775,7 @@ void venus_hfi_pm_work_handler(struct work_struct *work) d_vpr_e("%s: power collapse failed\n", __func__); break; } +unlock: core_unlock(core, __func__); } From 5ace31f6b80f0466ba744bea9d9dccdc01b0d449 Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Tue, 8 Jun 2021 10:33:52 -0700 Subject: [PATCH 0340/1061] video: driver: modify rgba scanlines alignment to 32 modify scanlines alignment for linear rgba color format to 32. Change-Id: Ide64322bc872bfda64d8f48474ef2d37a4f314b7 Signed-off-by: Darshana Patil --- driver/vidc/inc/msm_media_info.h | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/driver/vidc/inc/msm_media_info.h b/driver/vidc/inc/msm_media_info.h index 294cf2761a..3443c8aa89 100644 --- a/driver/vidc/inc/msm_media_info.h +++ b/driver/vidc/inc/msm_media_info.h @@ -409,9 +409,11 @@ static inline unsigned int VIDEO_RGB_SCANLINES(unsigned int v4l2_fmt, switch (v4l2_fmt) { case V4L2_PIX_FMT_VIDC_ARGB32C: - case V4L2_PIX_FMT_RGBA32: alignment = 16; break; + case V4L2_PIX_FMT_RGBA32: + alignment = 32; + break; default: goto invalid_input; } From 87452bbf1766279715b38ef2d0b632a8014891fe Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Tue, 8 Jun 2021 17:21:08 -0700 Subject: [PATCH 0341/1061] video: driver: encoder default level as HFI_LEVEL_NONE set encoder default level as HFI_LEVEL_NONE Change-Id: Ibe566a50c9c09a337fdf75f80bd3c37c7a5d0d4e Signed-off-by: Darshana Patil --- driver/platform/waipio/src/msm_vidc_waipio.c | 4 ++-- driver/vidc/src/msm_vidc_control.c | 5 ----- 2 files changed, 2 insertions(+), 7 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index dedf2520a2..3a79df5afc 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -1020,7 +1020,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {0}, - NULL, msm_vidc_set_u32_enum}, + NULL, msm_vidc_set_level}, {LEVEL, DEC, HEVC|HEIC, V4L2_MPEG_VIDEO_HEVC_LEVEL_1, @@ -1066,7 +1066,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {0}, - NULL, msm_vidc_set_u32_enum}, + NULL, msm_vidc_set_level}, /* TODO: Bring the VP9 Level upstream GKI change, and level cap here: * go/videogki diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 3bb8c0bf11..ec3df2714d 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -3026,11 +3026,6 @@ int msm_vidc_set_csc_custom_matrix(void *instance, return rc; } -/* - * TODO: currently fw does not accept HFI_LEVEL_NONE. - * Use this function for encoder level setting once - * fw issue is fixed. - */ int msm_vidc_set_level(void *instance, enum msm_vidc_inst_capability_type cap_id) { From 2c0d2faefa01210c4c1a04f91bd6ca87fc068097 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Tue, 8 Jun 2021 13:17:24 +0530 Subject: [PATCH 0342/1061] video: driver: limit vp9 max spec to 4K@60 Added change to limit VP9 decode max spec is upto 4K@60. Change-Id: I5939a8cf6cd227d2cced5adb3628b36493b7b1fc Signed-off-by: Govindaraj Rajagopal --- driver/platform/waipio/src/msm_vidc_waipio.c | 17 ++++- driver/vidc/inc/msm_vidc_internal.h | 1 + driver/vidc/src/msm_vdec.c | 57 +++++++++------- driver/vidc/src/msm_venc.c | 69 ++++++++++---------- driver/vidc/src/msm_vidc_control.c | 21 +++++- 5 files changed, 101 insertions(+), 64 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 3a79df5afc..91f257e4ba 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -107,11 +107,13 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { */ {FRAME_WIDTH, DEC, CODECS_ALL, 96, 8192, 1, 1920}, + {FRAME_WIDTH, DEC, VP9, 96, 4096, 1, 1920}, {FRAME_WIDTH, ENC, CODECS_ALL, 128, 8192, 1, 1920}, {LOSSLESS_FRAME_WIDTH, ENC, H264|HEVC, 128, 4096, 1, 1920}, {SECURE_FRAME_WIDTH, DEC, H264|HEVC|VP9, 96, 4096, 1, 1920}, {SECURE_FRAME_WIDTH, ENC, H264|HEVC, 128, 4096, 1, 1920}, {FRAME_HEIGHT, DEC, CODECS_ALL, 96, 8192, 1, 1080}, + {FRAME_HEIGHT, DEC, VP9, 96, 4096, 1, 1080}, {FRAME_HEIGHT, ENC, CODECS_ALL, 128, 8192, 1, 1080}, {LOSSLESS_FRAME_HEIGHT, ENC, H264|HEVC, 128, 4096, 1, 1080}, {SECURE_FRAME_HEIGHT, DEC, H264|HEVC|VP9, 96, 4096, 1, 1080}, @@ -175,6 +177,8 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {MBPF, ENC, CODECS_ALL, 64, 138240, 1, 138240}, {MBPF, DEC, CODECS_ALL, 36, 138240, 1, 138240}, /* (4096 * 2304) / 256 */ + {MBPF, DEC, VP9, 36, 36864, 1, 36864}, + /* (4096 * 2304) / 256 */ {LOSSLESS_MBPF, ENC, H264|HEVC, 64, 36864, 1, 36864}, /* Batch Mode Decode */ /* TODO: update with new values based on updated voltage corner */ @@ -186,6 +190,8 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {MBPS, ENC, CODECS_ALL, 64, 3916800, 1, 3916800}, /* ((1920 * 1088) / 256) * 960 fps */ {MBPS, DEC, CODECS_ALL, 64, 7833600, 1, 7833600}, + /* ((4096 * 2304) / 256) * 60 */ + {MBPS, DEC, VP9, 36, 2211840, 1, 2211840}, /* ((4096 * 2304) / 256) * 60 fps */ {POWER_SAVE_MBPS, ENC, CODECS_ALL, 0, 2211840, 1, 2211840}, @@ -202,8 +208,17 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), 1, (DEFAULT_FPS << 16)}, + {FRAME_RATE, DEC, VP9, + (MINIMUM_FPS << 16), (MAXIMUM_VP9_FPS << 16), + 1, (DEFAULT_FPS << 16)}, + {OPERATING_RATE, ENC|DEC, CODECS_ALL, - 1, INT_MAX, 1, (DEFAULT_FPS << 16)}, + (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), + 1, (DEFAULT_FPS << 16)}, + + {OPERATING_RATE, DEC, VP9, + (MINIMUM_FPS << 16), (MAXIMUM_VP9_FPS << 16), + 1, (DEFAULT_FPS << 16)}, {SCALE_FACTOR, ENC, H264|HEVC, 1, 8, 1, 8}, diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 8b4f158170..739755b98f 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -32,6 +32,7 @@ #define DEFAULT_FPS 30 #define MINIMUM_FPS 1 #define MAXIMUM_FPS 960 +#define MAXIMUM_VP9_FPS 60 #define SINGLE_INPUT_BUFFER 1 #define SINGLE_OUTPUT_BUFFER 1 #define MAX_NUM_INPUT_BUFFERS VIDEO_MAX_FRAME // same as VB2_MAX_FRAME diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 87c90d409e..47ee38256e 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -2296,14 +2296,13 @@ int msm_vdec_s_param(struct msm_vidc_inst *inst, is_frame_rate = true; } else { timeperframe = &s_parm->parm.capture.timeperframe; - max_rate = capability->cap[OPERATING_RATE].max; + max_rate = capability->cap[OPERATING_RATE].max >> 16; default_rate = capability->cap[OPERATING_RATE].value >> 16; } if (!timeperframe->denominator || !timeperframe->numerator) { - i_vpr_e(inst, - "%s: invalid rate for type %u\n", - __func__, s_parm->type); + i_vpr_e(inst, "%s: type %s, invalid rate\n", __func__, + v4l2_type_name(s_parm->type)); input_rate = default_rate; goto set_default; } @@ -2312,8 +2311,7 @@ int msm_vdec_s_param(struct msm_vidc_inst *inst, do_div(us_per_frame, timeperframe->denominator); if (!us_per_frame) { - i_vpr_e(inst, "%s: us_per_frame is zero\n", - __func__); + i_vpr_e(inst, "%s: us_per_frame is zero\n", __func__); rc = -EINVAL; goto exit; } @@ -2322,29 +2320,29 @@ int msm_vdec_s_param(struct msm_vidc_inst *inst, do_div(input_rate, us_per_frame); set_default: + i_vpr_h(inst, "%s: type %s, %s value %d\n", + __func__, v4l2_type_name(s_parm->type), + is_frame_rate ? "frame rate" : "operating rate", input_rate); + q16_rate = (u32)input_rate << 16; - i_vpr_h(inst, "%s: %s value %d\n", - __func__, is_frame_rate ? "frame rate" : "operating rate", input_rate); - - msm_vidc_update_cap_value(inst, - is_frame_rate ? FRAME_RATE : OPERATING_RATE, + msm_vidc_update_cap_value(inst, is_frame_rate ? FRAME_RATE : OPERATING_RATE, q16_rate, __func__); - - if ((s_parm->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE && - inst->vb2q[INPUT_PORT].streaming) || - (s_parm->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE && - inst->vb2q[OUTPUT_PORT].streaming)) { - if (msm_vidc_check_core_mbps(inst)) { - i_vpr_e(inst, - "%s: Unsupported load with rate %d, setting default rate %d\n", - __func__, input_rate, default_rate); - msm_vidc_update_cap_value(inst, - is_frame_rate ? FRAME_RATE : OPERATING_RATE, - default_rate << 16, __func__); - return -ENOMEM; + if (is_realtime_session(inst) && + ((s_parm->type == INPUT_MPLANE && inst->vb2q[INPUT_PORT].streaming) || + (s_parm->type == OUTPUT_MPLANE && inst->vb2q[OUTPUT_PORT].streaming))) { + rc = msm_vidc_check_core_mbps(inst); + if (rc) { + i_vpr_e(inst, "%s: unsupported load\n", __func__); + goto reset_rate; + } + rc = input_rate > max_rate; + if (rc) { + i_vpr_e(inst, "%s: unsupported rate %u, max %u\n", __func__, + input_rate, max_rate); + rc = -ENOMEM; + goto reset_rate; } } - inst->priority_level = MSM_VIDC_PRIORITY_HIGH; if (is_frame_rate) @@ -2352,6 +2350,15 @@ set_default: else capability->cap[OPERATING_RATE].flags |= CAP_FLAG_CLIENT_SET; + return 0; + +reset_rate: + if (rc) { + i_vpr_e(inst, "%s: setting rate %u failed, reset to %u\n", __func__, + input_rate, default_rate); + msm_vidc_update_cap_value(inst, is_frame_rate ? FRAME_RATE : OPERATING_RATE, + default_rate << 16, __func__); + } exit: return rc; } diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index ab1fe5a309..6c1b94f645 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -1527,7 +1527,7 @@ int msm_venc_s_param(struct msm_vidc_inst *inst, if (s_parm->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) { timeperframe = &s_parm->parm.output.timeperframe; - max_rate = capability->cap[OPERATING_RATE].max; + max_rate = capability->cap[OPERATING_RATE].max >> 16; default_rate = capability->cap[OPERATING_RATE].value >> 16; } else { timeperframe = &s_parm->parm.capture.timeperframe; @@ -1537,9 +1537,8 @@ int msm_venc_s_param(struct msm_vidc_inst *inst, } if (!timeperframe->denominator || !timeperframe->numerator) { - i_vpr_e(inst, - "%s: invalid rate for type %u\n", - __func__, s_parm->type); + i_vpr_e(inst, "%s: type %s, invalid rate\n", __func__, + v4l2_type_name(s_parm->type)); input_rate = default_rate; goto set_default; } @@ -1548,8 +1547,7 @@ int msm_venc_s_param(struct msm_vidc_inst *inst, do_div(us_per_frame, timeperframe->denominator); if (!us_per_frame) { - i_vpr_e(inst, "%s: us_per_frame is zero\n", - __func__); + i_vpr_e(inst, "%s: us_per_frame is zero\n", __func__); rc = -EINVAL; goto exit; } @@ -1557,39 +1555,30 @@ int msm_venc_s_param(struct msm_vidc_inst *inst, input_rate = (u64)USEC_PER_SEC; do_div(input_rate, us_per_frame); - /* Check max allowed rate */ - if (input_rate > max_rate) { - i_vpr_e(inst, - "%s: Unsupported rate %llu, max_fps %u, type: %u\n", - __func__, input_rate, max_rate, s_parm->type); - rc = -ENOTSUPP; - goto exit; - } - set_default: + i_vpr_h(inst, "%s: type %s, %s value %d\n", + __func__, v4l2_type_name(s_parm->type), + is_frame_rate ? "frame rate" : "operating rate", input_rate); + q16_rate = (u32)input_rate << 16; - i_vpr_h(inst, "%s: type %s, value %#x\n", - __func__, v4l2_type_name(s_parm->type), q16_rate); - - msm_vidc_update_cap_value(inst, - is_frame_rate ? FRAME_RATE : OPERATING_RATE, + msm_vidc_update_cap_value(inst, is_frame_rate ? FRAME_RATE : OPERATING_RATE, q16_rate, __func__); - - if ((s_parm->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE && - inst->vb2q[INPUT_PORT].streaming) || - (s_parm->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE && - inst->vb2q[OUTPUT_PORT].streaming)) { - if (msm_vidc_check_core_mbps(inst)) { - i_vpr_e(inst, - "%s: Unsupported load with rate %d, setting default rate %d\n", - __func__, input_rate, default_rate); - msm_vidc_update_cap_value(inst, - is_frame_rate ? FRAME_RATE : OPERATING_RATE, - default_rate << 16, __func__); - return -ENOMEM; + if (is_realtime_session(inst) && + ((s_parm->type == INPUT_MPLANE && inst->vb2q[INPUT_PORT].streaming) || + (s_parm->type == OUTPUT_MPLANE && inst->vb2q[OUTPUT_PORT].streaming))) { + rc = msm_vidc_check_core_mbps(inst); + if (rc) { + i_vpr_e(inst, "%s: unsupported load\n", __func__); + goto reset_rate; + } + rc = input_rate > max_rate; + if (rc) { + i_vpr_e(inst, "%s: unsupported rate %u, max %u\n", __func__, + input_rate, max_rate); + rc = -ENOMEM; + goto reset_rate; } } - inst->priority_level = MSM_VIDC_PRIORITY_HIGH; if (is_frame_rate) @@ -1612,12 +1601,20 @@ set_default: sizeof(u32)); if (rc) { i_vpr_e(inst, - "%s: failed to set frame rate to fw\n", - __func__); + "%s: failed to set frame rate to fw\n", __func__); goto exit; } } + return 0; + +reset_rate: + if (rc) { + i_vpr_e(inst, "%s: setting rate %u failed, reset to %u\n", __func__, + input_rate, default_rate); + msm_vidc_update_cap_value(inst, is_frame_rate ? FRAME_RATE : OPERATING_RATE, + default_rate << 16, __func__); + } exit: return rc; } diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index ec3df2714d..9cd5814ab4 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -1924,8 +1924,24 @@ int msm_vidc_adjust_session_priority(void *instance, struct v4l2_ctrl *ctrl) if (adjusted_value == 0 && rate_by_client) { rc = msm_vidc_check_core_mbps(inst); if (rc) { - d_vpr_e("%s: priority 0 not feasible due to resource\n", __func__); - return rc; + i_vpr_e(inst, "%s: unsupported load\n", __func__); + goto exit; + } + rc = capability->cap[FRAME_RATE].value > capability->cap[FRAME_RATE].max; + if (rc) { + i_vpr_e(inst, "%s: unsupported FRAME_RATE %u, max %u\n", __func__, + capability->cap[FRAME_RATE].value >> 16, + capability->cap[FRAME_RATE].max >> 16); + rc = -ENOMEM; + goto exit; + } + rc = capability->cap[OPERATING_RATE].value > capability->cap[OPERATING_RATE].max; + if (rc) { + i_vpr_e(inst, "%s: unsupported OPERATING_RATE %u, max %u\n", __func__, + capability->cap[OPERATING_RATE].value >> 16, + capability->cap[OPERATING_RATE].max >> 16); + rc = -ENOMEM; + goto exit; } } @@ -1934,6 +1950,7 @@ int msm_vidc_adjust_session_priority(void *instance, struct v4l2_ctrl *ctrl) msm_vidc_update_cap_value(inst, PRIORITY, adjusted_value, __func__); +exit: return rc; } From c2b39b905655bf6c3a390ef4145523430c6fd7ae Mon Sep 17 00:00:00 2001 From: Maheshwar Ajja Date: Tue, 8 Jun 2021 22:56:47 -0700 Subject: [PATCH 0343/1061] video: driver: amend power on and power off sequences Amend power on and off sequences for iris2 video hardware. Change-Id: Icada0b95ba5990a6911803ee9fa650a296c357db Signed-off-by: Maheshwar Ajja --- driver/variant/iris2/src/msm_vidc_iris2.c | 605 +++++++++++++++++++--- driver/vidc/inc/msm_vidc_core.h | 4 +- driver/vidc/inc/venus_hfi.h | 17 + driver/vidc/src/venus_hfi.c | 186 ++++--- 4 files changed, 636 insertions(+), 176 deletions(-) diff --git a/driver/variant/iris2/src/msm_vidc_iris2.c b/driver/variant/iris2/src/msm_vidc_iris2.c index e78949717b..b462f9136e 100644 --- a/driver/variant/iris2/src/msm_vidc_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_iris2.c @@ -3,8 +3,6 @@ * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. */ -#include - #include "msm_vidc_iris2.h" #include "msm_vidc_buffer_iris2.h" #include "msm_vidc_power_iris2.h" @@ -20,7 +18,8 @@ #define VIDEO_ARCH_LX 1 -#define VBIF_BASE_OFFS_IRIS2 0x00080000 +#define VCODEC_BASE_OFFS_IRIS2 0x00000000 +#define AON_MVP_NOC_RESET 0x0001F000 #define CPU_BASE_OFFS_IRIS2 0x000A0000 #define AON_BASE_OFFS 0x000E0000 #define CPU_CS_BASE_OFFS_IRIS2 (CPU_BASE_OFFS_IRIS2) @@ -65,6 +64,9 @@ /* UC_REGION_ADDR */ #define CPU_CS_SCIBARG2_IRIS2 (CPU_CS_BASE_OFFS_IRIS2 + 0x68) +#define CPU_CS_AHB_BRIDGE_SYNC_RESET (CPU_CS_BASE_OFFS_IRIS2 + 0x160) +#define CPU_CS_AHB_BRIDGE_SYNC_RESET_STATUS (CPU_CS_BASE_OFFS_IRIS2 + 0x164) + /* FAL10 Feature Control */ #define CPU_CS_X2RPMh_IRIS2 (CPU_CS_BASE_OFFS_IRIS2 + 0x168) #define CPU_CS_X2RPMh_MASK0_BMSK_IRIS2 0x1 @@ -77,6 +79,14 @@ #define CPU_IC_SOFTINT_IRIS2 (CPU_IC_BASE_OFFS_IRIS2 + 0x150) #define CPU_IC_SOFTINT_H2A_SHFT_IRIS2 0x0 +/* + * -------------------------------------------------------------------------- + * MODULE: AON_MVP_NOC_RESET_REGISTERS + * -------------------------------------------------------------------------- + */ +#define AON_WRAPPER_MVP_NOC_RESET_REQ (AON_MVP_NOC_RESET + 0x000) +#define AON_WRAPPER_MVP_NOC_RESET_ACK (AON_MVP_NOC_RESET + 0x004) + /* * -------------------------------------------------------------------------- * MODULE: wrapper @@ -97,6 +107,8 @@ #define WRAPPER_DEBUG_BRIDGE_LPI_CONTROL_IRIS2 (WRAPPER_BASE_OFFS_IRIS2 + 0x54) #define WRAPPER_DEBUG_BRIDGE_LPI_STATUS_IRIS2 (WRAPPER_BASE_OFFS_IRIS2 + 0x58) +#define WRAPPER_CORE_CLOCK_CONFIG_IRIS2 (WRAPPER_BASE_OFFS_IRIS2 + 0x88) + /* * -------------------------------------------------------------------------- * MODULE: tz_wrapper @@ -131,6 +143,13 @@ #define AON_WRAPPER_MVP_NOC_LPI_CONTROL (AON_BASE_OFFS) #define AON_WRAPPER_MVP_NOC_LPI_STATUS (AON_BASE_OFFS + 0x4) +/* + * -------------------------------------------------------------------------- + * MODULE: VCODEC_SS registers + * -------------------------------------------------------------------------- + */ +#define VCODEC_SS_IDLE_STATUSn (VCODEC_BASE_OFFS_IRIS2 + 0x70) + /* * -------------------------------------------------------------------------- * MODULE: vcodec noc error log registers (iris2) @@ -151,6 +170,190 @@ #define VCODEC_NOC_ERL_MAIN_ERRLOG3_LOW 0x00011238 #define VCODEC_NOC_ERL_MAIN_ERRLOG3_HIGH 0x0001123C + +static int __disable_unprepare_clock_iris2(struct msm_vidc_core *core, + const char *clk_name) +{ + int rc = 0; + struct clock_info *cl; + bool found; + + if (!core || !clk_name) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + found = false; + venus_hfi_for_each_clock(core, cl) { + if (!cl->clk) { + d_vpr_e("%s: invalid clock %s\n", __func__, cl->name); + return -EINVAL; + } + if (strcmp(cl->name, clk_name)) + continue; + found = true; + + clk_disable_unprepare(cl->clk); + cl->prev = 0; + d_vpr_h("%s: clock %s disable unprepared\n", __func__, cl->name); + break; + } + if (!found) { + d_vpr_e("%s: clock %s not found\n", __func__, clk_name); + return -EINVAL; + } + + return rc; +} + +static int __prepare_enable_clock_iris2(struct msm_vidc_core *core, + const char *clk_name) +{ + int rc = 0; + struct clock_info *cl; + bool found; + + if (!core || !clk_name) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + found = false; + venus_hfi_for_each_clock(core, cl) { + if (!cl->clk) { + d_vpr_e("%s: invalid clock\n", __func__); + return -EINVAL; + } + if (strcmp(cl->name, clk_name)) + continue; + found = true; + /* + * For the clocks we control, set the rate prior to preparing + * them. Since we don't really have a load at this point, scale + * it to the lowest frequency possible + */ + if (cl->has_scaling) + __set_clk_rate(core, cl, clk_round_rate(cl->clk, 0)); + + rc = clk_prepare_enable(cl->clk); + if (rc) { + d_vpr_e("%s: failed to enable clock %s\n", + __func__, cl->name); + return rc; + } + if (!__clk_is_enabled(cl->clk)) { + d_vpr_e("%s: clock %s not enabled\n", + __func__, cl->name); + clk_disable_unprepare(cl->clk); + return -EINVAL; + } + d_vpr_h("%s: clock %s prepare enabled\n", __func__, cl->name); + break; + } + if (!found) { + d_vpr_e("%s: clock %s not found\n", __func__, clk_name); + return -EINVAL; + } + + return rc; +} + +static int __disable_regulator_iris2(struct msm_vidc_core *core, + const char *reg_name) +{ + int rc = 0; + struct regulator_info *rinfo; + bool found; + + if (!core || !reg_name) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + found = false; + venus_hfi_for_each_regulator(core, rinfo) { + if (!rinfo->regulator) { + d_vpr_e("%s: invalid regulator %s\n", + __func__, rinfo->name); + return -EINVAL; + } + if (strcmp(rinfo->name, reg_name)) + continue; + found = true; + + rc = __acquire_regulator(core, rinfo); + if (rc) { + d_vpr_e("%s: failed to acquire %s, rc = %d\n", + rinfo->name, rc); + /* Bring attention to this issue */ + WARN_ON(true); + return rc; + } + core->handoff_done = false; + + rc = regulator_disable(rinfo->regulator); + if (rc) { + d_vpr_e("%s: failed to disable %s, rc = %d\n", + rinfo->name, rc); + return rc; + } + d_vpr_h("%s: disabled regulator %s\n", __func__, rinfo->name); + break; + } + if (!found) { + d_vpr_e("%s: regulator %s not found\n", __func__, reg_name); + return -EINVAL; + } + + return rc; +} + +static int __enable_regulator_iris2(struct msm_vidc_core *core, + const char *reg_name) +{ + int rc = 0; + struct regulator_info *rinfo; + bool found; + + if (!core || !reg_name) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + found = false; + venus_hfi_for_each_regulator(core, rinfo) { + if (!rinfo->regulator) { + d_vpr_e("%s: invalid regulator %s\n", + __func__, rinfo->name); + return -EINVAL; + } + if (strcmp(rinfo->name, reg_name)) + continue; + found = true; + + rc = regulator_enable(rinfo->regulator); + if (rc) { + d_vpr_e("%s: failed to enable %s, rc = %d\n", + __func__, rinfo->name, rc); + return rc; + } + if (!regulator_is_enabled(rinfo->regulator)) { + d_vpr_e("%s: regulator %s not enabled\n", + __func__, rinfo->name); + regulator_disable(rinfo->regulator); + return -EINVAL; + } + d_vpr_h("%s: enabled regulator %s\n", __func__, rinfo->name); + break; + } + if (!found) { + d_vpr_e("%s: regulator %s not found\n", __func__, reg_name); + return -EINVAL; + } + + return rc; +} + static int __interrupt_init_iris2(struct msm_vidc_core *vidc_core) { struct msm_vidc_core *core = vidc_core; @@ -226,13 +429,213 @@ static int __setup_ucregion_memory_map_iris2(struct msm_vidc_core *vidc_core) return 0; } -static int __power_off_iris2(struct msm_vidc_core *vidc_core) +static int __power_off_iris2_hardware(struct msm_vidc_core *core) +{ + int rc = 0, i; + u32 value = 0, count = 0; + const u32 max_count = 10; + + if (core->hw_power_control) { + d_vpr_h("%s: hardware power control enabled\n", __func__); + goto disable_power; + } + + /* + * check to make sure core clock branch enabled else + * we cannot read vcodec top idle register + */ + value = __read_register(core, WRAPPER_CORE_CLOCK_CONFIG_IRIS2); + if (value) { + d_vpr_h( + "%s: core clock config not enabled, enabling it to read vcodec registers\n", + __func__); + rc = __write_register(core, WRAPPER_CORE_CLOCK_CONFIG_IRIS2, 0); + if (rc) + return rc; + } + + /* + * add MNoC idle check before collapsing MVS0 per HPG update + * poll for NoC DMA idle -> HPG 6.1.1 + */ + for (i = 0; i < core->capabilities[NUM_VPP_PIPE].value; i++) { + count = 0; + do { + value = __read_register(core, + VCODEC_SS_IDLE_STATUSn + 4*i); + if (value & 0x400000) + break; + else + usleep_range(1000, 2000); + count++; + } while (count < max_count); + + if (count == max_count) + d_vpr_e( + "%s: VCODEC_SS_IDLE_STATUSn (%d) is not idle (%#x)\n", + __func__, i, value); + } + + /* Apply partial reset on MSF interface and wait for ACK */ + rc = __write_register(core, AON_WRAPPER_MVP_NOC_RESET_REQ, 0x3); + if (rc) + return rc; + count = 0; + do { + value = __read_register(core, AON_WRAPPER_MVP_NOC_RESET_ACK); + if ((value & 0x3) == 0x3) + break; + else + usleep_range(100, 200); + count++; + } while (count < max_count); + if (count == max_count) + d_vpr_e("%s: AON_WRAPPER_MVP_NOC_RESET assert failed\n", + __func__); + + /* De-assert partial reset on MSF interface and wait for ACK */ + rc = __write_register(core, AON_WRAPPER_MVP_NOC_RESET_REQ, 0x0); + if (rc) + return rc; + count = 0; + do { + value = __read_register(core, AON_WRAPPER_MVP_NOC_RESET_ACK); + if ((value & 0x3) == 0x0) + break; + else + usleep_range(100, 200); + count++; + } while (count < max_count); + if (count == max_count) + d_vpr_e("%s: AON_WRAPPER_MVP_NOC_RESET de-assert failed\n", + __func__); + + /* + * Reset both sides of 2 ahb2ahb_bridges (TZ and non-TZ) + * do we need to check status register here? + */ + rc = __write_register(core, CPU_CS_AHB_BRIDGE_SYNC_RESET, 0x3); + if (rc) + return rc; + rc = __write_register(core, CPU_CS_AHB_BRIDGE_SYNC_RESET, 0x2); + if (rc) + return rc; + rc = __write_register(core, CPU_CS_AHB_BRIDGE_SYNC_RESET, 0x0); + if (rc) + return rc; + +disable_power: + /* power down process */ + rc = __disable_regulator_iris2(core, "vcodec"); + if (rc) { + d_vpr_e("%s: disable regulator vcodec failed\n", __func__); + rc = 0; + } + rc = __disable_unprepare_clock_iris2(core, "vcodec_clk"); + if (rc) { + d_vpr_e("%s: disable unprepare vcodec_clk failed\n", __func__); + rc = 0; + } + + return rc; +} + +static int __power_off_iris2_controller(struct msm_vidc_core *core) +{ + int rc = 0; + u32 value = 0, count = 0; + const u32 max_count = 10; + + /* + * mask fal10_veto QLPAC error since fal10_veto can go 1 + * when pwwait == 0 and clamped to 0 -> HPG 6.1.2 + */ + rc = __write_register(core, CPU_CS_X2RPMh_IRIS2, 0x3); + if (rc) + return rc; + + /* set MNoC to low power, set PD_NOC_QREQ (bit 0) */ + rc = __write_register_masked(core, AON_WRAPPER_MVP_NOC_LPI_CONTROL, + 0x1, BIT(0)); + if (rc) + return rc; + count = 0; + do { + value = __read_register(core, AON_WRAPPER_MVP_NOC_LPI_STATUS); + if ((value & 0x1) == 0x1) + break; + else + usleep_range(100, 200); + count++; + } while (count < max_count); + if (count == max_count) + d_vpr_e("%s: AON_WRAPPER_MVP_NOC_LPI_CONTROL failed\n", + __func__); + + /* Set Debug bridge Low power */ + rc = __write_register(core, WRAPPER_DEBUG_BRIDGE_LPI_CONTROL_IRIS2, 0x7); + if (rc) + return rc; + count = 0; + do { + value = __read_register(core, + WRAPPER_DEBUG_BRIDGE_LPI_STATUS_IRIS2); + if ((value & 0x7) == 0x7) + break; + else + usleep_range(100, 200); + count++; + } while (count < max_count); + if (count == max_count) + d_vpr_e("%s: debug bridge low power failed\n", __func__); + + /* Debug bridge LPI release */ + rc = __write_register(core, WRAPPER_DEBUG_BRIDGE_LPI_CONTROL_IRIS2, 0x0); + if (rc) + return rc; + + count = 0; + do { + value = __read_register(core, + WRAPPER_DEBUG_BRIDGE_LPI_STATUS_IRIS2); + if (value == 0x0) + break; + else + usleep_range(100, 200); + count++; + } while (count < max_count); + if (count == max_count) + d_vpr_e("%s: debug bridge release failed\n", __func__); + + /* power down process */ + rc = __disable_regulator_iris2(core, "iris-ctl"); + if (rc) { + d_vpr_e("%s: disable regulator iris-ctl failed\n", __func__); + rc = 0; + } + + /* Disable GCC_VIDEO_AXI0_CLK clock */ + rc = __disable_unprepare_clock_iris2(core, "gcc_video_axi0"); + if (rc) { + d_vpr_e("%s: disable unprepare gcc_video_axi0 failed\n", __func__); + rc = 0; + } + + /* Turn off MVP MVS0C core clock */ + rc = __disable_unprepare_clock_iris2(core, "core_clk"); + if (rc) { + d_vpr_e("%s: disable unprepare core_clk failed\n", __func__); + rc = 0; + } + + return rc; +} + +static int __power_off_iris2(struct msm_vidc_core *core) { - u32 lpi_status, reg_status = 0, count = 0, max_count = 10; - struct msm_vidc_core *core = vidc_core; int rc = 0; - if (!core) { + if (!core || !core->capabilities) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -240,86 +643,127 @@ static int __power_off_iris2(struct msm_vidc_core *vidc_core) if (!core->power_enabled) return 0; + if (__power_off_iris2_hardware(core)) + d_vpr_e("%s: failed to power off hardware\n", __func__); + + if (__power_off_iris2_controller(core)) + d_vpr_e("%s: failed to power off controller\n", __func__); + + if (__unvote_buses(core)) + d_vpr_e("%s: failed to unvote buses\n", __func__); + if (!(core->intr_status & WRAPPER_INTR_STATUS_A2HWD_BMSK_IRIS2)) disable_irq_nosync(core->dt->irq); core->intr_status = 0; - /* HPG 6.1.2 Step 1 */ - rc = __write_register(core, CPU_CS_X2RPMh_IRIS2, 0x3); - if (rc) - return rc; - - /* HPG 6.1.2 Step 2, noc to low power */ - //if (core->res->vpu_ver == VPU_VERSION_IRIS2_1) - // goto skip_aon_mvp_noc; - - rc = __write_register(core, AON_WRAPPER_MVP_NOC_LPI_CONTROL, 0x1); - if (rc) - return rc; - - while (!reg_status && count < max_count) { - lpi_status = - __read_register(core, - AON_WRAPPER_MVP_NOC_LPI_STATUS); - reg_status = lpi_status & BIT(0); - d_vpr_l("Noc: lpi_status %d noc_status %d (count %d)\n", - lpi_status, reg_status, count); - usleep_range(50, 100); - count++; - } - if (count == max_count) - d_vpr_e("NOC not in qaccept status %d\n", reg_status); - -//skip_aon_mvp_noc: - /* HPG 6.1.2 Step 3, debug bridge to low power */ - rc = __write_register(core, WRAPPER_DEBUG_BRIDGE_LPI_CONTROL_IRIS2, 0x7); - if (rc) - return rc; - - reg_status = 0; - count = 0; - while ((reg_status != 0x7) && count < max_count) { - lpi_status = __read_register(core, - WRAPPER_DEBUG_BRIDGE_LPI_STATUS_IRIS2); - reg_status = lpi_status & 0x7; - d_vpr_l("DBLP Set : lpi_status %d reg_status %d (count %d)\n", - lpi_status, reg_status, count); - usleep_range(50, 100); - count++; - } - if (count == max_count) - d_vpr_e("DBLP Set: status %d\n", reg_status); - - /* HPG 6.1.2 Step 4, debug bridge to lpi release */ - rc = __write_register(core, WRAPPER_DEBUG_BRIDGE_LPI_CONTROL_IRIS2, 0x0); - if (rc) - return rc; - - lpi_status = 0x1; - count = 0; - while (lpi_status && count < max_count) { - lpi_status = __read_register(core, - WRAPPER_DEBUG_BRIDGE_LPI_STATUS_IRIS2); - d_vpr_l("DBLP Release: lpi_status %d(count %d)\n", - lpi_status, count); - usleep_range(50, 100); - count++; - } - if (count == max_count) - d_vpr_e("DBLP Release: lpi_status %d\n", lpi_status); - - /* HPG 6.1.2 Step 6 */ - __disable_unprepare_clks(core); - - /* HPG 6.1.2 Step 5 */ - if (__disable_regulators(core)) - d_vpr_e("%s: Failed to disable regulators\n", __func__); - - if (__unvote_buses(core)) - d_vpr_e("%s: Failed to unvote for buses\n", __func__); core->power_enabled = false; + return rc; +} + +static int __power_on_iris2_controller(struct msm_vidc_core *core) +{ + int rc = 0; + + rc = __enable_regulator_iris2(core, "iris-ctl"); + if (rc) + goto fail_regulator; + + rc = call_venus_op(core, reset_ahb2axi_bridge, core); + if (rc) + goto fail_reset_ahb2axi; + + rc = __prepare_enable_clock_iris2(core, "gcc_video_axi0"); + if (rc) + goto fail_clk_axi; + + rc = __prepare_enable_clock_iris2(core, "core_clk"); + if (rc) + goto fail_clk_controller; + return 0; + +fail_clk_controller: + __disable_unprepare_clock_iris2(core, "gcc_video_axi0"); +fail_clk_axi: +fail_reset_ahb2axi: + __disable_regulator_iris2(core, "iris-ctl"); +fail_regulator: + return rc; +} + +static int __power_on_iris2_hardware(struct msm_vidc_core *core) +{ + int rc = 0; + + rc = __enable_regulator_iris2(core, "vcodec"); + if (rc) + goto fail_regulator; + + rc = __prepare_enable_clock_iris2(core, "vcodec_clk"); + if (rc) + goto fail_clk_controller; + + return 0; + +fail_clk_controller: + __disable_regulator_iris2(core, "vcodec"); +fail_regulator: + return rc; +} + +static int __power_on_iris2(struct msm_vidc_core *core) +{ + int rc = 0; + + if (core->power_enabled) + return 0; + + /* Vote for all hardware resources */ + rc = __vote_buses(core, INT_MAX, INT_MAX); + if (rc) { + d_vpr_e("%s: failed to vote buses, rc %d\n", __func__, rc); + goto fail_vote_buses; + } + + rc = __power_on_iris2_controller(core); + if (rc) { + d_vpr_e("%s: failed to power on iris2 controller\n", __func__); + goto fail_power_on_controller; + } + + rc = __power_on_iris2_hardware(core); + if (rc) { + d_vpr_e("%s: failed to power on iris2 hardware\n", __func__); + goto fail_power_on_hardware; + } + /* video controller and hardware powered on successfully */ + core->power_enabled = true; + + rc = __scale_clocks(core); + if (rc) { + d_vpr_e("%s: failed to scale clocks\n", __func__); + rc = 0; + } + /* + * Re-program all of the registers that get reset as a result of + * regulator_disable() and _enable() + */ + __set_registers(core); + + call_venus_op(core, interrupt_init, core); + core->intr_status = 0; + enable_irq(core->dt->irq); + + return rc; + +fail_power_on_hardware: + __power_off_iris2_controller(core); +fail_power_on_controller: + __unvote_buses(core); +fail_vote_buses: + core->power_enabled = false; + return rc; } static int __prepare_pc_iris2(struct msm_vidc_core *vidc_core) @@ -684,6 +1128,7 @@ static struct msm_vidc_venus_ops iris2_ops = { .setup_ucregion_memmap = __setup_ucregion_memory_map_iris2, .clock_config_on_enable = NULL, .reset_ahb2axi_bridge = __reset_ahb2axi_bridge, + .power_on = __power_on_iris2, .power_off = __power_off_iris2, .prepare_pc = __prepare_pc_iris2, .watchdog = __watchdog_iris2, diff --git a/driver/vidc/inc/msm_vidc_core.h b/driver/vidc/inc/msm_vidc_core.h index 55adc570d5..f1d6b9c96c 100644 --- a/driver/vidc/inc/msm_vidc_core.h +++ b/driver/vidc/inc/msm_vidc_core.h @@ -25,6 +25,7 @@ struct msm_vidc_venus_ops { int (*raise_interrupt)(struct msm_vidc_core *core); int (*clear_interrupt)(struct msm_vidc_core *core); int (*prepare_pc)(struct msm_vidc_core *core); + int (*power_on)(struct msm_vidc_core *core); int (*power_off)(struct msm_vidc_core *core); int (*watchdog)(struct msm_vidc_core *core, u32 intr_status); int (*noc_error_info)(struct msm_vidc_core *core); @@ -110,7 +111,8 @@ struct msm_vidc_core { u32 header_id; u32 packet_id; struct completion init_done; - u32 handoff_done; + bool handoff_done; + bool hw_power_control; }; #endif // _MSM_VIDC_CORE_H_ diff --git a/driver/vidc/inc/venus_hfi.h b/driver/vidc/inc/venus_hfi.h index 969971948d..0e464bd97e 100644 --- a/driver/vidc/inc/venus_hfi.h +++ b/driver/vidc/inc/venus_hfi.h @@ -7,7 +7,11 @@ #define _VENUS_HFI_H_ #include +#include +#include +#include +#include "msm_vidc_dt.h" #include "msm_vidc_internal.h" #include "msm_vidc_inst.h" #include "msm_vidc_core.h" @@ -58,6 +62,8 @@ void venus_hfi_work_handler(struct work_struct *work); void venus_hfi_pm_work_handler(struct work_struct *work); irqreturn_t venus_hfi_isr(int irq, void *data); +int __write_register_masked(struct msm_vidc_core *core, + u32 reg, u32 value, u32 mask); int __write_register(struct msm_vidc_core *core, u32 reg, u32 value); int __read_register(struct msm_vidc_core *core, u32 reg); @@ -65,16 +71,27 @@ int __iface_cmdq_write(struct msm_vidc_core *core, void *pkt); int __iface_msgq_read(struct msm_vidc_core *core, void *pkt); int __iface_dbgq_read(struct msm_vidc_core *core, void *pkt); +int __scale_clocks(struct msm_vidc_core *core); +int __set_clk_rate(struct msm_vidc_core *core, + struct clock_info *cl, u64 rate); void __disable_unprepare_clks(struct msm_vidc_core *core); +int __prepare_enable_clks(struct msm_vidc_core *core); int __disable_regulators(struct msm_vidc_core *core); +int __enable_regulators(struct msm_vidc_core *core); +int __acquire_regulator(struct msm_vidc_core *core, + struct regulator_info *rinfo); int __unvote_buses(struct msm_vidc_core *core); +int __vote_buses(struct msm_vidc_core *core, unsigned long bw_ddr, + unsigned long bw_llcc); int __prepare_pc(struct msm_vidc_core *core); +int __set_registers(struct msm_vidc_core *core); int __reset_ahb2axi_bridge(struct msm_vidc_core *core); int __clock_config_on_enable(struct msm_vidc_core *core); int __interrupt_init(struct msm_vidc_core *core); int __setup_ucregion_memmap(struct msm_vidc_core *core); int __raise_interrupt(struct msm_vidc_core *core); +int __power_on(struct msm_vidc_core *core); int __power_off(struct msm_vidc_core *core); bool __core_in_valid_state(struct msm_vidc_core *core); int __load_fw(struct msm_vidc_core *core); diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index 463bf472bd..f23d1e041c 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -3,9 +3,6 @@ * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. */ -#include -#include -#include #include #include #include @@ -21,7 +18,6 @@ #include "venus_hfi.h" #include "msm_vidc_core.h" #include "msm_vidc_power.h" -#include "msm_vidc_dt.h" #include "msm_vidc_platform.h" #include "msm_vidc_memory.h" #include "msm_vidc_driver.h" @@ -267,7 +263,7 @@ int __write_register(struct msm_vidc_core *core, * only bits 0 & 4 will be updated with corresponding bits from value. To update * entire register with value, set mask = 0xFFFFFFFF. */ -static int __write_register_masked(struct msm_vidc_core *core, +int __write_register_masked(struct msm_vidc_core *core, u32 reg, u32 value, u32 mask) { u32 prev_val, new_val; @@ -373,11 +369,16 @@ static void __cancel_power_collapse_work(struct msm_vidc_core *core) cancel_delayed_work(&core->pm_work); } -static int __acquire_regulator(struct msm_vidc_core *core, +int __acquire_regulator(struct msm_vidc_core *core, struct regulator_info *rinfo) { int rc = 0; + if (!core || !rinfo) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + if (rinfo->has_hw_power_collapse) { if (!rinfo->regulator) { d_vpr_e("%s: invalid regulator\n", __func__); @@ -387,6 +388,7 @@ static int __acquire_regulator(struct msm_vidc_core *core, if (regulator_get_mode(rinfo->regulator) == REGULATOR_MODE_NORMAL) { + core->handoff_done = false; d_vpr_h("Skip acquire regulator %s\n", rinfo->name); goto exit; } @@ -403,7 +405,7 @@ static int __acquire_regulator(struct msm_vidc_core *core, rinfo->name); goto exit; } else { - + core->handoff_done = false; d_vpr_h("Acquired regulator control from HW: %s\n", rinfo->name); @@ -420,6 +422,17 @@ exit: return rc; } +static int __acquire_regulators(struct msm_vidc_core *core) +{ + int rc = 0; + struct regulator_info *rinfo; + + venus_hfi_for_each_regulator(core, rinfo) + __acquire_regulator(core, rinfo); + + return rc; +} + static int __hand_off_regulator(struct msm_vidc_core *core, struct regulator_info *rinfo) { @@ -434,12 +447,11 @@ static int __hand_off_regulator(struct msm_vidc_core *core, rc = regulator_set_mode(rinfo->regulator, REGULATOR_MODE_FAST); if (rc) { - core->handoff_done = 0; d_vpr_e("Failed to hand off regulator control: %s\n", rinfo->name); return rc; } else { - core->handoff_done = 1; + core->handoff_done = true; d_vpr_h("Hand off regulator control to HW: %s\n", rinfo->name); } @@ -478,7 +490,7 @@ err_reg_handoff_failed: return rc; } -static int __set_registers(struct msm_vidc_core *core) +int __set_registers(struct msm_vidc_core *core) { struct reg_set *reg_set; int i, rc = 0; @@ -524,6 +536,11 @@ int __unvote_buses(struct msm_vidc_core *core) int rc = 0; struct bus_info *bus = NULL; + if (!core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + core->power.bw_ddr = 0; core->power.bw_llcc = 0; @@ -537,7 +554,7 @@ err_unknown_device: return rc; } -static int __vote_buses(struct msm_vidc_core *core, +int __vote_buses(struct msm_vidc_core *core, unsigned long bw_ddr, unsigned long bw_llcc) { int rc = 0; @@ -545,6 +562,11 @@ static int __vote_buses(struct msm_vidc_core *core, unsigned long bw_kbps = 0, bw_prev = 0; enum vidc_bus_type type; + if (!core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + venus_hfi_for_each_bus(core, bus) { if (bus && bus->path) { type = get_type_frm_name(bus->name); @@ -599,17 +621,19 @@ static int __tzbsp_set_video_state(enum tzbsp_video_state state) return 0; } -static int __set_clk_rate(struct msm_vidc_core *core, +int __set_clk_rate(struct msm_vidc_core *core, struct clock_info *cl, u64 rate) { int rc = 0; - // struct clk *clk = cl->clk; struct mmrm_client_data client_data; - struct mmrm_client *client = cl->mmrm_client; + struct mmrm_client *client; /* not registered */ - if (!client) + if (!core || !cl || !cl->mmrm_client) { + d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; + } + client = cl->mmrm_client; /* bail early if requested clk rate is not changed */ if (rate == cl->prev) @@ -644,12 +668,17 @@ static int __set_clocks(struct msm_vidc_core *core, u32 freq) return 0; } -static int __scale_clocks(struct msm_vidc_core *core) +int __scale_clocks(struct msm_vidc_core *core) { int rc = 0; struct allowed_clock_rates_table *allowed_clks_tbl; u32 freq = 0; + if (!core || !core->dt) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + allowed_clks_tbl = core->dt->allowed_clks_tbl; freq = core->power.clk_freq ? core->power.clk_freq : allowed_clks_tbl[0].clock_rate; @@ -1128,10 +1157,14 @@ static int __sys_set_power_control(struct msm_vidc_core *core, bool enable) { int rc = 0; - if (!core->handoff_done) + if (!core->handoff_done) { + d_vpr_e("%s: skipping as power control hanfoff was not done\n", + __func__); return rc; + } - rc = hfi_packet_sys_intraframe_powercollapse(core, core->packet, core->packet_size, enable); + rc = hfi_packet_sys_intraframe_powercollapse(core, + core->packet, core->packet_size, enable); if (rc) return rc; @@ -1139,6 +1172,9 @@ static int __sys_set_power_control(struct msm_vidc_core *core, bool enable) if (rc) return rc; + core->hw_power_control = true; + d_vpr_h("%s: set hardware power control successful\n", __func__); + return rc; } @@ -1530,7 +1566,7 @@ failed_to_reset: return rc; } -static int __prepare_enable_clks(struct msm_vidc_core *core) +int __prepare_enable_clks(struct msm_vidc_core *core) { struct clock_info *cl = NULL; int rc = 0, c = 0; @@ -1837,8 +1873,6 @@ static int __disable_regulator(struct regulator_info *rinfo, goto disable_regulator_failed; } - core->handoff_done = 0; - if (!regulator_is_enabled(rinfo->regulator)) d_vpr_e("%s: regulator %s already disabled\n", __func__, rinfo->name); @@ -1858,23 +1892,15 @@ disable_regulator_failed: return rc; } -static int __enable_hw_power_collapse(struct msm_vidc_core *core) -{ - int rc = 0; - - rc = __hand_off_regulators(core); - if (rc) - d_vpr_e("%s: Failed to enable HW power collapse %d\n", - __func__, rc); - - return rc; -} - -static int __enable_regulators(struct msm_vidc_core *core) +int __enable_regulators(struct msm_vidc_core *core) { int rc = 0, c = 0; struct regulator_info *rinfo; + if (!core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } d_vpr_h("Enabling regulators\n"); venus_hfi_for_each_regulator(core, rinfo) { @@ -2153,61 +2179,16 @@ static int __venus_power_on(struct msm_vidc_core *core) { int rc = 0; - if (core->power_enabled) { - d_vpr_e("%s: Skip power on, core already enabled.\n", __func__); + if (core->power_enabled) return 0; - } + rc = call_venus_op(core, power_on, core); + if (rc) { + d_vpr_e("Failed to power on, err: %d\n", rc); + return rc; + } core->power_enabled = true; - /* Vote for all hardware resources */ - rc = __vote_buses(core, INT_MAX, INT_MAX); - if (rc) { - d_vpr_e("Failed to vote buses, err: %d\n", rc); - goto fail_vote_buses; - } - rc = __enable_regulators(core); - if (rc) { - d_vpr_e("Failed to enable GDSC, err = %d\n", rc); - goto fail_enable_gdsc; - } - - rc = call_venus_op(core, reset_ahb2axi_bridge, core); - if (rc) { - d_vpr_e("Failed to reset ahb2axi: %d\n", rc); - goto fail_enable_clks; - } - - rc = __prepare_enable_clks(core); - if (rc) { - d_vpr_e("Failed to enable clocks: %d\n", rc); - goto fail_enable_clks; - } - - rc = __scale_clocks(core); - if (rc) { - d_vpr_e("Failed to scale clocks, performance might be affected\n"); - rc = 0; - } - - /* - * Re-program all of the registers that get reset as a result of - * regulator_disable() and _enable() - */ - __set_registers(core); - - call_venus_op(core, interrupt_init, core); - core->intr_status = 0; - enable_irq(core->dt->irq); - - return rc; - -fail_enable_clks: - __disable_regulators(core); -fail_enable_gdsc: - __unvote_buses(core); -fail_vote_buses: - core->power_enabled = false; return rc; } @@ -2237,7 +2218,7 @@ static int __suspend(struct msm_vidc_core *core) __disable_subcaches(core); - call_venus_op(core, power_off, core); + __venus_power_off(core); d_vpr_h("Venus power off\n"); return rc; @@ -2264,6 +2245,9 @@ static int __resume(struct msm_vidc_core *core) return rc; d_vpr_h("Resuming from power collapse\n"); + core->handoff_done = false; + core->hw_power_control = false; + rc = __venus_power_on(core); if (rc) { d_vpr_e("Failed to power on venus\n"); @@ -2283,8 +2267,7 @@ static int __resume(struct msm_vidc_core *core) * (s/w triggered) to fast (HW triggered) unless the h/w vote is * present. */ - if (__enable_hw_power_collapse(core)) - d_vpr_e("Failed to enabled inter-frame PC\n"); + __hand_off_regulators(core); call_venus_op(core, setup_ucregion_memmap, core); @@ -2304,7 +2287,12 @@ static int __resume(struct msm_vidc_core *core) } __set_subcaches(core); - __sys_set_power_control(core, true); + rc = __sys_set_power_control(core, true); + if (rc) { + d_vpr_e("%s: set power control failed\n", __func__); + __acquire_regulators(core); + rc = 0; + } d_vpr_h("Resumed from power collapse\n"); exit: @@ -2315,7 +2303,7 @@ exit: err_reset_core: __tzbsp_set_video_state(TZBSP_VIDEO_STATE_SUSPEND); err_set_video_state: - call_venus_op(core, power_off, core); + __venus_power_off(core); err_venus_power_on: d_vpr_e("Failed to resume from power collapse\n"); return rc; @@ -2588,6 +2576,10 @@ int __load_fw(struct msm_vidc_core *core) { int rc = 0; + d_vpr_h("%s\n", __func__); + core->handoff_done = false; + core->hw_power_control = false; + rc = __init_resources(core); if (rc) { d_vpr_e("%s: Failed to init resources: %d\n", __func__, rc); @@ -2624,7 +2616,7 @@ int __load_fw(struct msm_vidc_core *core) * (s/w triggered) to fast (HW triggered) unless the h/w vote is * present. */ - __enable_hw_power_collapse(core); + __hand_off_regulators(core); return rc; fail_protect_mem: @@ -2632,7 +2624,7 @@ fail_protect_mem: qcom_scm_pas_shutdown(core->dt->fw_cookie); core->dt->fw_cookie = 0; fail_load_fw: - call_venus_op(core, power_off, core); + __venus_power_off(core); fail_venus_power_on: __deinit_resources(core); fail_init_res: @@ -2736,6 +2728,7 @@ void venus_hfi_pm_work_handler(struct work_struct *work) return; } + d_vpr_h("%s: try power collapse\n", __func__); /* * It is ok to check this variable outside the lock since * it is being updated in this context only @@ -2819,8 +2812,6 @@ int venus_hfi_core_init(struct msm_vidc_core *core) if (rc) return rc; - core->handoff_done = 0; - rc = __load_fw(core); if (rc) goto error; @@ -2853,7 +2844,12 @@ int venus_hfi_core_init(struct msm_vidc_core *core) if (rc) goto error; - __sys_set_power_control(core, true); + rc = __sys_set_power_control(core, true); + if (rc) { + d_vpr_e("%s: set power control failed\n", __func__); + __acquire_regulators(core); + rc = 0; + } d_vpr_h("%s(): successful\n", __func__); return 0; From 0c062d5a2a9ef657dc63eda718bbe64d64b4d601 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Fri, 4 Jun 2021 23:15:52 +0530 Subject: [PATCH 0344/1061] video: driver: utilize mod_delayed_work functionality mod_delayed_work() is a replacement for cancel_delayed_work() + queue_delayed_work(). It will update only timer value, instead of completely cancelling and queueing a new delayed work. Change-Id: Id07d54e025c5a2e82f29160ae6d249d44f00bb15 Signed-off-by: Govindaraj Rajagopal --- driver/vidc/src/msm_vdec.c | 3 +-- driver/vidc/src/venus_hfi.c | 6 ++---- 2 files changed, 3 insertions(+), 6 deletions(-) diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 47ee38256e..018577440d 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -1437,8 +1437,7 @@ static int schedule_batch_work(struct msm_vidc_inst *inst) return -EINVAL; } core = inst->core; - cancel_delayed_work(&inst->decode_batch.work); - queue_delayed_work(core->batch_workq, &inst->decode_batch.work, + mod_delayed_work(core->batch_workq, &inst->decode_batch.work, msecs_to_jiffies(core->capabilities[DECODE_BATCH_TIMEOUT].value)); return 0; diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index 226f7a523b..3e603e6447 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -346,10 +346,8 @@ static void __schedule_power_collapse_work(struct msm_vidc_core *core) return; } - cancel_delayed_work(&core->pm_work); - if (!queue_delayed_work(core->pm_workq, - &core->pm_work, msecs_to_jiffies( - core->capabilities[SW_PC_DELAY].value))) { + if (!mod_delayed_work(core->pm_workq, &core->pm_work, + msecs_to_jiffies(core->capabilities[SW_PC_DELAY].value))) { d_vpr_e("power collapse already scheduled\n"); } else { d_vpr_l("power collapse scheduled for %d ms\n", From 72699f7278f91118c1da9f0405d41ec43c4bb43f Mon Sep 17 00:00:00 2001 From: Vikash Garodia Date: Sat, 5 Jun 2021 14:51:22 +0530 Subject: [PATCH 0345/1061] video: driver: Add encoder complexity to decide power mode Client can choose to run an encode session to acheive maximum performance rather than maximum quality. Add the handling to configure video core accordingly for the configured video session. Such configuration is only applicable for non-realtime session. Change-Id: Ife290b377c844e5b1d3be93b2509c787f8e05c59 Signed-off-by: Vikash Garodia --- driver/platform/waipio/src/msm_vidc_waipio.c | 4 ++++ driver/variant/iris2/src/msm_vidc_iris2.c | 8 ++++++++ driver/vidc/inc/msm_vidc_internal.h | 1 + driver/vidc/src/msm_vidc_driver.c | 1 + include/uapi/vidc/media/v4l2_vidc_extensions.h | 3 +++ 5 files changed, 17 insertions(+) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 91f257e4ba..1aa927293e 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -1537,6 +1537,10 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_SUBFRAME_OUTPUT, HFI_PROP_SUBFRAME_OUTPUT}, + {COMPLEXITY, ENC, H264 | HEVC, + 0, 100, + 1, 100, + V4L2_CID_MPEG_VIDC_VENC_COMPLEXITY}, }; /* diff --git a/driver/variant/iris2/src/msm_vidc_iris2.c b/driver/variant/iris2/src/msm_vidc_iris2.c index b462f9136e..a35e943298 100644 --- a/driver/variant/iris2/src/msm_vidc_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_iris2.c @@ -1109,6 +1109,14 @@ int msm_vidc_decide_quality_mode_iris2(struct msm_vidc_inst* inst) max_hq_mbpf = core->capabilities[MAX_MBPF_HQ].value;; max_hq_mbps = core->capabilities[MAX_MBPS_HQ].value;; + /* NRT session to have max quality unless client configures least complexity */ + if (!is_realtime_session(inst) && mbpf <= max_hq_mbpf) { + mode = MSM_VIDC_MAX_QUALITY_MODE; + if (!capability->cap[COMPLEXITY].value) + mode = MSM_VIDC_POWER_SAVE_MODE; + goto exit; + } + /* Power saving always disabled for CQ and LOSSLESS RC modes. */ if (capability->cap[LOSSLESS].value || (mbpf <= max_hq_mbpf && mbps <= max_hq_mbps)) diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 739755b98f..cd6afa2a69 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -463,6 +463,7 @@ enum msm_vidc_inst_capability_type { META_ENC_QP_METADATA, META_ROI_INFO, META_DEC_QP_METADATA, + COMPLEXITY, INST_CAP_MAX, }; diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 083c901702..66ee0fb224 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -182,6 +182,7 @@ static const struct msm_vidc_cap_name cap_name_arr[] = { {META_ENC_QP_METADATA, "META_ENC_QP_METADATA" }, {META_ROI_INFO, "META_ROI_INFO" }, {META_DEC_QP_METADATA, "META_DEC_QP_METADATA" }, + {COMPLEXITY, "COMPLEXITY" }, {INST_CAP_MAX, "INST_CAP_MAX" }, }; diff --git a/include/uapi/vidc/media/v4l2_vidc_extensions.h b/include/uapi/vidc/media/v4l2_vidc_extensions.h index fa9bf8fc8f..68968375c7 100644 --- a/include/uapi/vidc/media/v4l2_vidc_extensions.h +++ b/include/uapi/vidc/media/v4l2_vidc_extensions.h @@ -134,6 +134,9 @@ enum v4l2_mpeg_vidc_blur_types { (V4L2_CID_MPEG_VIDC_BASE + 0x2D) #define V4L2_CID_MPEG_VIDC_METADATA_DEC_QP_METADATA \ (V4L2_CID_MPEG_VIDC_BASE + 0x2E) +/* Encoder Complexity control */ +#define V4L2_CID_MPEG_VIDC_VENC_COMPLEXITY \ + (V4L2_CID_MPEG_VIDC_BASE + 0x2F) /* Deprecate below controls once availble in gki and gsi bionic header */ #ifndef V4L2_CID_MPEG_VIDEO_BASELAYER_PRIORITY_ID From 973d1f0b388106341a2efe0c6a0d1d126e192333 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Thu, 10 Jun 2021 11:58:05 -0700 Subject: [PATCH 0346/1061] video: driver: allow adaptive/external blur along with rotation/flip [1] Allow adaptive/external blur along with rotation/flip. [2] Update HFI_BUFFER_VPSS_ENC macro to align with CL: 30984523. Change-Id: Ibca9f273da4a8204f586e952aeb9b2e78b5ff941 Signed-off-by: Akshata Sahukar --- driver/platform/waipio/src/msm_vidc_waipio.c | 7 +++---- driver/variant/iris2/inc/hfi_buffer_iris2.h | 4 ++-- driver/variant/iris2/src/msm_vidc_buffer_iris2.c | 6 ++++-- driver/vidc/src/msm_vidc_control.c | 13 +++---------- 4 files changed, 12 insertions(+), 18 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 91f257e4ba..ef648a5d4f 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -251,7 +251,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, {0}, - {BLUR_TYPES}, + {0}, NULL, msm_vidc_set_flip}, {VFLIP, ENC, CODECS_ALL, @@ -272,7 +272,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { HFI_PROP_ROTATION, CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, {0}, - {BLUR_TYPES}, + {0}, NULL, msm_vidc_set_rotation}, {SUPER_FRAME, ENC, H264|HEVC, @@ -448,8 +448,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_CID_MPEG_VIDC_VIDEO_BLUR_TYPES, HFI_PROP_BLUR_TYPES, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, - {PIX_FMTS, ROTATION, HFLIP, BITRATE_MODE, - CONTENT_ADAPTIVE_CODING}, + {PIX_FMTS, BITRATE_MODE, CONTENT_ADAPTIVE_CODING}, {BLUR_RESOLUTION}, msm_vidc_adjust_blur_type, msm_vidc_set_blur_type}, diff --git a/driver/variant/iris2/inc/hfi_buffer_iris2.h b/driver/variant/iris2/inc/hfi_buffer_iris2.h index 524d76b2f8..cdfd6103b3 100644 --- a/driver/variant/iris2/inc/hfi_buffer_iris2.h +++ b/driver/variant/iris2/inc/hfi_buffer_iris2.h @@ -1520,11 +1520,11 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ HFI_BUFFER_DPB_ENC(_size, frame_width, frame_height, is_ten_bit); \ } while (0) -#define HFI_BUFFER_VPSS_ENC(vpss_size, dswidth, dsheight, ds_enable, is_ten_bit) \ +#define HFI_BUFFER_VPSS_ENC(vpss_size, dswidth, dsheight, ds_enable, blur, is_ten_bit) \ do \ { \ vpss_size = 0; \ - if (ds_enable) \ + if (ds_enable || blur) \ { \ HFI_BUFFER_DPB_ENC(vpss_size, dswidth, dsheight, is_ten_bit); \ } \ diff --git a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c index 9219cc16cb..bdbe7facdf 100644 --- a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c @@ -441,7 +441,7 @@ static u32 msm_vidc_encoder_arp_size_iris2(struct msm_vidc_inst *inst) static u32 msm_vidc_encoder_vpss_size_iris2(struct msm_vidc_inst* inst) { u32 size = 0; - bool ds_enable = false, is_tenbit = false; + bool ds_enable = false, is_tenbit = false, blur = false; u32 rotation_val = HFI_ROTATION_NONE; u32 width, height, driver_colorfmt; struct v4l2_format* f; @@ -472,8 +472,10 @@ static u32 msm_vidc_encoder_vpss_size_iris2(struct msm_vidc_inst* inst) driver_colorfmt = v4l2_colorformat_to_driver( f->fmt.pix_mp.pixelformat, __func__); is_tenbit = is_10bit_colorformat(driver_colorfmt); + if (inst->capabilities->cap[BLUR_TYPES].value != VIDC_BLUR_NONE) + blur = true; - HFI_BUFFER_VPSS_ENC(size, width, height, ds_enable, is_tenbit); + HFI_BUFFER_VPSS_ENC(size, width, height, ds_enable, blur, is_tenbit); i_vpr_l(inst, "%s: size %d\n", __func__, size); return size; } diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 9cd5814ab4..d7c3913a9d 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -1781,7 +1781,7 @@ int msm_vidc_adjust_blur_type(void *instance, struct v4l2_ctrl *ctrl) struct msm_vidc_inst_capability *capability; s32 adjusted_value; struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - s32 rc_type = -1, rotation = -1, hflip = -1, vflip = -1, cac = -1; + s32 rc_type = -1, cac = -1; s32 pix_fmts = -1; if (!inst || !inst->capabilities) { @@ -1801,25 +1801,18 @@ int msm_vidc_adjust_blur_type(void *instance, struct v4l2_ctrl *ctrl) if (msm_vidc_get_parent_value(inst, BLUR_TYPES, BITRATE_MODE, &rc_type, __func__) || - msm_vidc_get_parent_value(inst, BLUR_TYPES, ROTATION, - &rotation, __func__) || msm_vidc_get_parent_value(inst, BLUR_TYPES, CONTENT_ADAPTIVE_CODING, &cac, __func__) || - msm_vidc_get_parent_value(inst, BLUR_TYPES, HFLIP, - &hflip, __func__) || msm_vidc_get_parent_value(inst, BLUR_TYPES, PIX_FMTS, &pix_fmts, __func__)) return -EINVAL; - vflip = capability->cap[VFLIP].value; - if (adjusted_value == VIDC_BLUR_EXTERNAL) { - if (rotation || hflip || vflip || is_scaling_enabled(inst)) { + if (is_scaling_enabled(inst)) { adjusted_value = VIDC_BLUR_NONE; } } else if (adjusted_value == VIDC_BLUR_ADAPTIVE) { - if (rotation || hflip || vflip || is_scaling_enabled(inst) || - (rc_type != HFI_RC_VBR_CFR) || + if (is_scaling_enabled(inst) || (rc_type != HFI_RC_VBR_CFR) || !cac || is_10bit_colorformat(pix_fmts)) { adjusted_value = VIDC_BLUR_NONE; } From b08d4769f81034c0fc77a0b2ace0a77d8bcabafb Mon Sep 17 00:00:00 2001 From: Dikshita Agarwal Date: Fri, 12 Feb 2021 11:28:11 +0530 Subject: [PATCH 0347/1061] video: drive: add support to dump FW region Add support to dump video FW region during FW crash using devcoredump helpers. Change-Id: I64c47160f04644223f4e831c35f7a059d38f7d83 Signed-off-by: Dikshita Agarwal Signed-off-by: Govindaraj Rajagopal --- driver/vidc/inc/msm_vidc_debug.h | 1 + driver/vidc/src/msm_vidc_debug.c | 5 +++ driver/vidc/src/venus_hfi_response.c | 50 ++++++++++++++++++++++++++++ 3 files changed, 56 insertions(+) diff --git a/driver/vidc/inc/msm_vidc_debug.h b/driver/vidc/inc/msm_vidc_debug.h index 6858b7e653..392411d46e 100644 --- a/driver/vidc/inc/msm_vidc_debug.h +++ b/driver/vidc/inc/msm_vidc_debug.h @@ -33,6 +33,7 @@ extern unsigned int msm_vidc_debug; extern bool msm_vidc_lossless_encode; extern bool msm_vidc_syscache_disable; extern int msm_vidc_clock_voting; +extern bool msm_vidc_fw_dump; /* To enable messages OR these values and * echo the result to debugfs file. diff --git a/driver/vidc/src/msm_vidc_debug.c b/driver/vidc/src/msm_vidc_debug.c index 0a0c7f4868..df2c3ed954 100644 --- a/driver/vidc/src/msm_vidc_debug.c +++ b/driver/vidc/src/msm_vidc_debug.c @@ -83,6 +83,9 @@ EXPORT_SYMBOL(msm_vidc_syscache_disable); int msm_vidc_clock_voting = !1; +bool msm_vidc_fw_dump = !true; +EXPORT_SYMBOL(msm_vidc_fw_dump); + #define MAX_DBG_BUF_SIZE 4096 struct core_inst_pair { @@ -244,6 +247,8 @@ struct dentry* msm_vidc_debugfs_init_drv() &msm_vidc_syscache_disable); debugfs_create_bool("lossless_encoding", 0644, dir, &msm_vidc_lossless_encode); + debugfs_create_bool("msm_vidc_fw_dump", 0644, dir, + &msm_vidc_fw_dump); return dir; diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index b916a66794..734214593e 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -3,6 +3,8 @@ * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. */ +#include +#include #include "hfi_packet.h" #include "venus_hfi.h" #include "venus_hfi_response.h" @@ -372,13 +374,61 @@ static int handle_session_error(struct msm_vidc_inst *inst, return rc; } +static void fw_coredump(struct platform_device *pdev) +{ + int rc = 0; + struct device_node *node = NULL; + struct resource res = {0}; + phys_addr_t mem_phys = 0; + size_t res_size = 0; + void *mem_va = NULL; + void *data = NULL; + + node = of_parse_phandle(pdev->dev.of_node, "memory-region", 0); + if (!node) { + d_vpr_e("%s: DT error getting \"memory-region\" property\n", + __func__); + return; + } + + rc = of_address_to_resource(node, 0, &res); + if (rc) { + d_vpr_e("%s: error %d while getting \"memory-region\" resource\n", + __func__, rc); + return; + } + + mem_phys = res.start; + res_size = (size_t)resource_size(&res); + + mem_va = memremap(mem_phys, res_size, MEMREMAP_WC); + if (!mem_va) { + d_vpr_e("%s: unable to remap firmware memory\n", __func__); + return; + } + + data = vmalloc(res_size); + if (!data) { + memunmap(mem_va); + return; + } + + memcpy(data, mem_va, res_size); + memunmap(mem_va); + dev_coredumpv(&pdev->dev, data, res_size, GFP_KERNEL); +} + int handle_system_error(struct msm_vidc_core *core, struct hfi_packet *pkt) { d_vpr_e("%s: system error received\n", __func__); + print_sfr_message(core); venus_hfi_noc_error_info(core); msm_vidc_core_deinit(core, true); + if (msm_vidc_fw_dump) + fw_coredump(core->pdev); + return 0; } From 36a497139220b7cc5eb2b84519b533c27dc3b00a Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Mon, 14 Jun 2021 13:25:26 -0700 Subject: [PATCH 0348/1061] video: driver: Add enc vbr min quality restrictions Do not support vbr min quality with below configs: - HEVC 10bit - Bitstream fps > 60 - ROI enabled/support - HP encoding - External Blur - Resolution beyond 1080P. Change-Id: I5e4a420abdd0c6fee4342c3c097684ef69bb0597 Signed-off-by: Akshata Sahukar --- driver/platform/waipio/src/msm_vidc_waipio.c | 67 +++-- .../variant/iris2/src/msm_vidc_buffer_iris2.c | 2 +- driver/vidc/inc/msm_vidc_control.h | 5 +- driver/vidc/inc/msm_vidc_driver.h | 2 +- driver/vidc/inc/msm_vidc_internal.h | 2 + driver/vidc/src/msm_vidc_buffer.c | 2 +- driver/vidc/src/msm_vidc_control.c | 253 +++++++++++++++--- .../uapi/vidc/media/v4l2_vidc_extensions.h | 2 - 8 files changed, 271 insertions(+), 64 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 19ac6cd2c0..5dbb14ae26 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -139,7 +139,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { CAP_FLAG_ROOT, {0}, {PROFILE, MIN_FRAME_QP, MAX_FRAME_QP, I_FRAME_QP, META_ROI_INFO, - BLUR_TYPES}}, + BLUR_TYPES, MIN_QUALITY}}, {PIX_FMTS, DEC, HEVC|HEIC, MSM_VIDC_FMT_NV12, @@ -438,7 +438,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 0, 7, 1, 0, V4L2_CID_MPEG_VIDEO_B_FRAMES, HFI_PROP_MAX_B_FRAMES, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, + CAP_FLAG_OUTPUT_PORT, {ENH_LAYER_COUNT}, {0}, msm_vidc_adjust_b_frame, msm_vidc_set_u32}, @@ -447,10 +447,19 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { VIDC_BLUR_NONE, VIDC_BLUR_ADAPTIVE, 1, VIDC_BLUR_ADAPTIVE, V4L2_CID_MPEG_VIDC_VIDEO_BLUR_TYPES, HFI_PROP_BLUR_TYPES, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, + CAP_FLAG_OUTPUT_PORT, {PIX_FMTS, BITRATE_MODE, CONTENT_ADAPTIVE_CODING}, {BLUR_RESOLUTION}, - msm_vidc_adjust_blur_type, msm_vidc_set_blur_type}, + msm_vidc_adjust_blur_type, msm_vidc_set_u32_enum}, + + {BLUR_TYPES, ENC, H264|HEVC, + VIDC_BLUR_NONE, VIDC_BLUR_ADAPTIVE, 1, VIDC_BLUR_ADAPTIVE, + V4L2_CID_MPEG_VIDC_VIDEO_BLUR_TYPES, + HFI_PROP_BLUR_TYPES, + CAP_FLAG_OUTPUT_PORT, + {PIX_FMTS, BITRATE_MODE, CONTENT_ADAPTIVE_CODING, MIN_QUALITY}, + {BLUR_RESOLUTION}, + msm_vidc_adjust_blur_type, msm_vidc_set_u32_enum}, {BLUR_RESOLUTION, ENC, CODECS_ALL, 0, S32_MAX, 1, 0, @@ -565,27 +574,41 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_CID_MPEG_VIDC_CONTENT_ADAPTIVE_CODING, HFI_PROP_CONTENT_ADAPTIVE_CODING, CAP_FLAG_OUTPUT_PORT, - {BITRATE_MODE}, + {BITRATE_MODE, MIN_QUALITY}, {BLUR_TYPES}, - NULL, msm_vidc_set_vbr_related_properties}, + msm_vidc_adjust_cac, + msm_vidc_set_vbr_related_properties}, {BITRATE_BOOST, ENC, H264|HEVC, - 0, 50, 25, 25, + 0, MAX_BITRATE_BOOST, 25, MAX_BITRATE_BOOST, V4L2_CID_MPEG_VIDC_QUALITY_BITRATE_BOOST, HFI_PROP_BITRATE_BOOST, CAP_FLAG_OUTPUT_PORT, - {BITRATE_MODE}, + {BITRATE_MODE, MIN_QUALITY}, {0}, - NULL, msm_vidc_set_vbr_related_properties}, + msm_vidc_adjust_bitrate_boost, + msm_vidc_set_vbr_related_properties}, - {MIN_QUALITY, ENC, H264|HEVC, - 0, 80, 80, 80, - V4L2_CID_MPEG_VIDC_MIN_QUALITY, + {MIN_QUALITY, ENC, H264, + 0, MAX_SUPPORTED_MIN_QUALITY, 70, MAX_SUPPORTED_MIN_QUALITY, + 0, HFI_PROP_MAINTAIN_MIN_QUALITY, CAP_FLAG_OUTPUT_PORT, - {BITRATE_MODE}, - {0}, - NULL, msm_vidc_set_vbr_related_properties}, + {BITRATE_MODE, ENH_LAYER_COUNT, META_ROI_INFO}, + {CONTENT_ADAPTIVE_CODING, BITRATE_BOOST, BLUR_TYPES}, + msm_vidc_adjust_min_quality, + msm_vidc_set_vbr_related_properties}, + + {MIN_QUALITY, ENC, HEVC, + 0, MAX_SUPPORTED_MIN_QUALITY, 70, MAX_SUPPORTED_MIN_QUALITY, + 0, + HFI_PROP_MAINTAIN_MIN_QUALITY, + CAP_FLAG_OUTPUT_PORT, + {BITRATE_MODE, PIX_FMTS, ENH_LAYER_COUNT, + META_ROI_INFO}, + {CONTENT_ADAPTIVE_CODING, BITRATE_BOOST, BLUR_TYPES}, + msm_vidc_adjust_min_quality, + msm_vidc_set_vbr_related_properties}, {VBV_DELAY, ENC, H264|HEVC, 200, 300, 100, 300, @@ -756,7 +779,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, {BITRATE_MODE, META_EVA_STATS}, - {GOP_SIZE, B_FRAME, BIT_RATE}, + {GOP_SIZE, B_FRAME, BIT_RATE, MIN_QUALITY}, msm_vidc_adjust_layer_count, msm_vidc_set_layer_count_and_type}, {ENH_LAYER_COUNT, ENC, H264, @@ -766,7 +789,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, {BITRATE_MODE, META_EVA_STATS}, - {GOP_SIZE, B_FRAME, BIT_RATE}, + {GOP_SIZE, B_FRAME, BIT_RATE, MIN_QUALITY}, msm_vidc_adjust_layer_count, msm_vidc_set_layer_count_and_type}, /* @@ -1437,6 +1460,16 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {0}, msm_vidc_adjust_roi_info, NULL}, + {META_ROI_INFO, ENC, H264|HEVC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_ROI_INFO, + HFI_PROP_ROI_INFO, + CAP_FLAG_INPUT_PORT, + {BITRATE_MODE, PIX_FMTS}, + {MIN_QUALITY}, + msm_vidc_adjust_roi_info, NULL}, + {META_DEC_QP_METADATA, DEC, CODECS_ALL, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, diff --git a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c index bdbe7facdf..2344cd65bd 100644 --- a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c @@ -564,7 +564,7 @@ static int msm_vidc_input_min_count_iris2(struct msm_vidc_inst* inst) if (is_decode_session(inst)) { input_min_count = MIN_DEC_INPUT_BUFFERS; } else if (is_encode_session(inst)) { - total_hb_layer = is_hierb_requested(inst) ? + total_hb_layer = is_hierb_type_requested(inst) ? inst->capabilities->cap[ENH_LAYER_COUNT].value + 1 : 0; if (inst->codec == MSM_VIDC_H264 && !inst->capabilities->cap[LAYER_ENABLE].value) { diff --git a/driver/vidc/inc/msm_vidc_control.h b/driver/vidc/inc/msm_vidc_control.h index b09c884165..72c283e226 100644 --- a/driver/vidc/inc/msm_vidc_control.h +++ b/driver/vidc/inc/msm_vidc_control.h @@ -34,6 +34,9 @@ int msm_vidc_adjust_hevc_max_qp(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_hevc_frame_qp(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_blur_type(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_blur_resolution(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_cac(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_bitrate_boost(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_min_quality(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_lowlatency_mode(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_v4l2_properties(struct msm_vidc_inst *inst); int msm_vidc_adjust_session_priority(void *instance, struct v4l2_ctrl *ctrl); @@ -83,8 +86,6 @@ int msm_vidc_set_flip(void *instance, enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_rotation(void *instance, enum msm_vidc_inst_capability_type cap_id); -int msm_vidc_set_blur_type(void *instance, - enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_blur_resolution(void *instance, enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_stage(void *instance, diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index cad6d3e072..7b700e4792 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -212,7 +212,7 @@ static inline bool is_lowlatency_session(struct msm_vidc_inst *inst) return !!(inst->capabilities->cap[LOWLATENCY_MODE].value); } -static inline bool is_hierb_requested(struct msm_vidc_inst *inst) +static inline bool is_hierb_type_requested(struct msm_vidc_inst *inst) { return (inst->codec == MSM_VIDC_H264 && inst->capabilities->cap[LAYER_TYPE].value == diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index cd6afa2a69..36e7addf28 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -65,6 +65,8 @@ #define MIN_HEVC_SLICE_WIDTH 384 #define MIN_AVC_SLICE_WIDTH 192 #define MIN_SLICE_HEIGHT 128 +#define MAX_BITRATE_BOOST 25 +#define MAX_SUPPORTED_MIN_QUALITY 70 #define DCVS_WINDOW 16 /* Superframe can have maximum of 32 frames */ diff --git a/driver/vidc/src/msm_vidc_buffer.c b/driver/vidc/src/msm_vidc_buffer.c index 46f799fae3..c0881dd1cf 100644 --- a/driver/vidc/src/msm_vidc_buffer.c +++ b/driver/vidc/src/msm_vidc_buffer.c @@ -26,7 +26,7 @@ u32 msm_vidc_input_min_count(struct msm_vidc_inst* inst) input_min_count = MIN_DEC_INPUT_BUFFERS; } else if (is_encode_session(inst)) { input_min_count = MIN_ENC_INPUT_BUFFERS; - if (is_hierb_requested(inst)) { + if (is_hierb_type_requested(inst)) { hb_enh_layer = inst->capabilities->cap[ENH_LAYER_COUNT].value; if (inst->codec == MSM_VIDC_H264 && diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index d7c3913a9d..6d1a010f22 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -423,11 +423,10 @@ static int msm_vidc_adjust_dynamic_property(struct msm_vidc_inst *inst, * adjustment is allowed for its children. */ if (!(capability->cap[cap_id].flags & CAP_FLAG_DYNAMIC_ALLOWED)) { - i_vpr_e(inst, + i_vpr_h(inst, "%s: dynamic setting of cap[%d] %s is not allowed\n", __func__, cap_id, cap_name(cap_id)); - msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); - return -EINVAL; + return 0; } /* @@ -1445,9 +1444,6 @@ int msm_vidc_adjust_b_frame(void *instance, struct v4l2_ctrl *ctrl) } capability = inst->capabilities; - if (inst->vb2q[OUTPUT_PORT].streaming) - return 0; - adjusted_value = ctrl ? ctrl->val : capability->cap[B_FRAME].value; if (msm_vidc_get_parent_value(inst, B_FRAME, @@ -1782,7 +1778,7 @@ int msm_vidc_adjust_blur_type(void *instance, struct v4l2_ctrl *ctrl) s32 adjusted_value; struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; s32 rc_type = -1, cac = -1; - s32 pix_fmts = -1; + s32 pix_fmts = -1, min_quality = -1; if (!inst || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); @@ -1790,9 +1786,6 @@ int msm_vidc_adjust_blur_type(void *instance, struct v4l2_ctrl *ctrl) } capability = inst->capabilities; - if (inst->vb2q[OUTPUT_PORT].streaming) - return 0; - adjusted_value = ctrl ? ctrl->val : capability->cap[BLUR_TYPES].value; @@ -1804,15 +1797,18 @@ int msm_vidc_adjust_blur_type(void *instance, struct v4l2_ctrl *ctrl) msm_vidc_get_parent_value(inst, BLUR_TYPES, CONTENT_ADAPTIVE_CODING, &cac, __func__) || msm_vidc_get_parent_value(inst, BLUR_TYPES, PIX_FMTS, - &pix_fmts, __func__)) + &pix_fmts, __func__) || + msm_vidc_get_parent_value(inst, BLUR_TYPES, MIN_QUALITY, + &min_quality, __func__)) return -EINVAL; if (adjusted_value == VIDC_BLUR_EXTERNAL) { - if (is_scaling_enabled(inst)) { + if (is_scaling_enabled(inst) || min_quality) { adjusted_value = VIDC_BLUR_NONE; } } else if (adjusted_value == VIDC_BLUR_ADAPTIVE) { - if (is_scaling_enabled(inst) || (rc_type != HFI_RC_VBR_CFR) || + if (is_scaling_enabled(inst) || min_quality || + (rc_type != HFI_RC_VBR_CFR) || !cac || is_10bit_colorformat(pix_fmts)) { adjusted_value = VIDC_BLUR_NONE; } @@ -1853,6 +1849,210 @@ int msm_vidc_adjust_blur_resolution(void *instance, struct v4l2_ctrl *ctrl) return 0; } +int msm_vidc_adjust_cac(void *instance, struct v4l2_ctrl *ctrl) +{ + struct msm_vidc_inst_capability *capability; + s32 adjusted_value; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + s32 min_quality = -1, rc_type = -1; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + adjusted_value = ctrl ? ctrl->val : + capability->cap[CONTENT_ADAPTIVE_CODING].value; + + if (inst->vb2q[OUTPUT_PORT].streaming) + return 0; + + if (msm_vidc_get_parent_value(inst, CONTENT_ADAPTIVE_CODING, + MIN_QUALITY, &min_quality, __func__) || + msm_vidc_get_parent_value(inst, CONTENT_ADAPTIVE_CODING, + BITRATE_MODE, &rc_type, __func__)) + return -EINVAL; + + /* + * CAC is supported only for VBR rc type. + * Hence, do not adjust or set to firmware for non VBR rc's + */ + if (rc_type != HFI_RC_VBR_CFR) { + adjusted_value = 0; + goto adjust; + } + + if (min_quality) { + adjusted_value = 1; + goto adjust; + } + +adjust: + msm_vidc_update_cap_value(inst, CONTENT_ADAPTIVE_CODING, + adjusted_value, __func__); + + return 0; +} + +int msm_vidc_adjust_bitrate_boost(void *instance, struct v4l2_ctrl *ctrl) +{ + struct msm_vidc_inst_capability *capability; + s32 adjusted_value; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + s32 min_quality = -1, rc_type = -1; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + adjusted_value = ctrl ? ctrl->val : + capability->cap[BITRATE_BOOST].value; + + if (inst->vb2q[OUTPUT_PORT].streaming) + return 0; + + if (msm_vidc_get_parent_value(inst, BITRATE_BOOST, + MIN_QUALITY, &min_quality, __func__) || + msm_vidc_get_parent_value(inst, BITRATE_BOOST, + BITRATE_MODE, &rc_type, __func__)) + return -EINVAL; + + /* + * Bitrate Boost are supported only for VBR rc type. + * Hence, do not adjust or set to firmware for non VBR rc's + */ + if (rc_type != HFI_RC_VBR_CFR) { + adjusted_value = 0; + goto adjust; + } + + if (min_quality) { + adjusted_value = MAX_BITRATE_BOOST; + goto adjust; + } + +adjust: + msm_vidc_update_cap_value(inst, BITRATE_BOOST, + adjusted_value, __func__); + + return 0; +} + +int msm_vidc_adjust_min_quality(void *instance, struct v4l2_ctrl *ctrl) +{ + struct msm_vidc_inst_capability *capability; + s32 adjusted_value; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + s32 roi_enable = -1, rc_type = -1, enh_layer_count = -1, pix_fmts = -1; + u32 width, height, frame_rate; + struct v4l2_format *f; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + adjusted_value = ctrl ? ctrl->val : capability->cap[MIN_QUALITY].value; + + /* + * Although MIN_QUALITY is static, one of its parents, + * ENH_LAYER_COUNT is dynamic cap. Hence, dynamic call + * may be made for MIN_QUALITY via ENH_LAYER_COUNT. + * Therefore, below streaming check is required to avoid + * runtime modification of MIN_QUALITY. + */ + if (inst->vb2q[OUTPUT_PORT].streaming) + return 0; + + if (msm_vidc_get_parent_value(inst, MIN_QUALITY, + BITRATE_MODE, &rc_type, __func__) || + msm_vidc_get_parent_value(inst, MIN_QUALITY, + META_ROI_INFO, &roi_enable, __func__) || + msm_vidc_get_parent_value(inst, MIN_QUALITY, + ENH_LAYER_COUNT, &enh_layer_count, __func__)) + return -EINVAL; + + /* + * Min Quality is supported only for VBR rc type. + * Hence, do not adjust or set to firmware for non VBR rc's + */ + if (rc_type != HFI_RC_VBR_CFR) { + adjusted_value = 0; + goto update_and_exit; + } + + frame_rate = inst->capabilities->cap[FRAME_RATE].value >> 16; + f = &inst->fmts[OUTPUT_PORT]; + width = f->fmt.pix_mp.width; + height = f->fmt.pix_mp.height; + + /* + * VBR Min Quality not supported for: + * - HEVC 10bit + * - ROI support + * - HP encoding + * - External Blur + * - Resolution beyond 1080P + * (It will fall back to CQCAC 25% or 0% (CAC) or CQCAC-OFF) + */ + if (inst->codec == MSM_VIDC_HEVC) { + if (msm_vidc_get_parent_value(inst, MIN_QUALITY, + PIX_FMTS, &pix_fmts, __func__)) + return -EINVAL; + + if (is_10bit_colorformat(pix_fmts)) { + i_vpr_h(inst, + "%s: min quality is supported only for 8 bit\n", + __func__); + adjusted_value = 0; + goto update_and_exit; + } + } + + if (res_is_greater_than(width, height, 1920, 1080)) { + i_vpr_h(inst, "%s: unsupported res, wxh %ux%u\n", + __func__, width, height); + adjusted_value = 0; + goto update_and_exit; + } + + if (frame_rate > 60) { + i_vpr_h(inst, "%s: unsupported fps %u\n", + __func__, frame_rate); + adjusted_value = 0; + goto update_and_exit; + } + + if (roi_enable) { + i_vpr_h(inst, + "%s: min quality not supported with roi metadata\n", + __func__); + adjusted_value = 0; + goto update_and_exit; + } + + if (enh_layer_count && inst->hfi_layer_type != HFI_HIER_B) { + i_vpr_h(inst, + "%s: min quality not supported for HP encoding\n", + __func__); + adjusted_value = 0; + goto update_and_exit; + } + + /* Above conditions are met. Hence enable min quality */ + adjusted_value = MAX_SUPPORTED_MIN_QUALITY; + +update_and_exit: + msm_vidc_update_cap_value(inst, MIN_QUALITY, + adjusted_value, __func__); + + return 0; +} + int msm_vidc_adjust_lowlatency_mode(void *instance, struct v4l2_ctrl *ctrl) { struct msm_vidc_inst_capability *capability; @@ -2839,33 +3039,6 @@ int msm_vidc_set_rotation(void *instance, return rc; } -int msm_vidc_set_blur_type(void *instance, - enum msm_vidc_inst_capability_type cap_id) -{ - int rc = 0; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; - u32 hfi_value; - - if (!inst || !inst->capabilities) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - if (inst->vb2q[OUTPUT_PORT].streaming) - return 0; - - rc = msm_vidc_v4l2_to_hfi_enum(inst, cap_id, &hfi_value); - if (rc) - return -EINVAL; - - rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32_ENUM, - &hfi_value, sizeof(u32), __func__); - if (rc) - return rc; - - return rc; -} - int msm_vidc_set_blur_resolution(void *instance, enum msm_vidc_inst_capability_type cap_id) { diff --git a/include/uapi/vidc/media/v4l2_vidc_extensions.h b/include/uapi/vidc/media/v4l2_vidc_extensions.h index 68968375c7..95c29c50ab 100644 --- a/include/uapi/vidc/media/v4l2_vidc_extensions.h +++ b/include/uapi/vidc/media/v4l2_vidc_extensions.h @@ -130,8 +130,6 @@ enum v4l2_mpeg_vidc_blur_types { /* Encoder Input Compression Ratio control */ #define V4L2_CID_MPEG_VIDC_ENC_INPUT_COMPRESSION_RATIO \ (V4L2_CID_MPEG_VIDC_BASE + 0x2C) -#define V4L2_CID_MPEG_VIDC_MIN_QUALITY \ - (V4L2_CID_MPEG_VIDC_BASE + 0x2D) #define V4L2_CID_MPEG_VIDC_METADATA_DEC_QP_METADATA \ (V4L2_CID_MPEG_VIDC_BASE + 0x2E) /* Encoder Complexity control */ From 7ada486d2801ab3ec5fc1e4a8e84a4cd6ad5362a Mon Sep 17 00:00:00 2001 From: Qiwei Liu Date: Wed, 16 Jun 2021 21:21:31 +0800 Subject: [PATCH 0349/1061] video: driver: refine log level checking Refine log level checking, to avoid some logs are always printed if multiple level specified. Change-Id: I151a5b8cce8d234d6d22450c43cf50d3b0065286 Signed-off-by: Qiwei Liu --- driver/vidc/inc/msm_vidc_debug.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_debug.h b/driver/vidc/inc/msm_vidc_debug.h index 392411d46e..5b3dcf5978 100644 --- a/driver/vidc/inc/msm_vidc_debug.h +++ b/driver/vidc/inc/msm_vidc_debug.h @@ -66,7 +66,7 @@ enum vidc_msg_prio { #define dprintk_inst(__level, __level_str, inst, __fmt, ...) \ do { \ - if (inst && (msm_vidc_debug & __level)) { \ + if (inst && (msm_vidc_debug & (__level))) { \ pr_info(VIDC_DBG_TAG_INST __fmt, \ __level_str, \ inst->debug_str, \ @@ -87,7 +87,7 @@ enum vidc_msg_prio { #define dprintk_core(__level, __level_str, __fmt, ...) \ do { \ - if (msm_vidc_debug & __level) { \ + if (msm_vidc_debug & (__level)) { \ pr_info(VIDC_DBG_TAG_CORE __fmt, \ __level_str, \ DEFAULT_SID, \ From 3e4248dfb07bdd893c12e9afd80a4aaa5f2c7cc9 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Mon, 7 Jun 2021 14:37:02 +0530 Subject: [PATCH 0350/1061] video: driver: optimize buffer pool implementation - Maintain free & busy pool to track buffers separately - track double-free cases during msm_memory_free() - track memory leak, by checking busy pool buffer count. it is expected to be zero at the end of a session. - maintain common api's to init, alloc, free, destroy for all below buffer types. - struct msm_vidc_buffer - struct msm_vidc_alloc - struct msm_vidc_map - struct msm_vidc_timestamp. Change-Id: Ib8655047c3883ea6601344661058d7a629ffd5bd Signed-off-by: Govindaraj Rajagopal --- driver/vidc/inc/msm_vidc_driver.h | 12 -- driver/vidc/inc/msm_vidc_inst.h | 10 +- driver/vidc/inc/msm_vidc_internal.h | 5 - driver/vidc/inc/msm_vidc_memory.h | 31 ++- driver/vidc/src/msm_vdec.c | 2 +- driver/vidc/src/msm_vidc.c | 13 +- driver/vidc/src/msm_vidc_driver.c | 284 +++------------------------ driver/vidc/src/msm_vidc_memory.c | 166 ++++++++++++++++ driver/vidc/src/venus_hfi_response.c | 5 +- 9 files changed, 232 insertions(+), 296 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 7b700e4792..6e3a77f96a 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -290,18 +290,6 @@ int msm_vidc_release_internal_buffers(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type buffer_type); int msm_vidc_vb2_buffer_done(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buf); -struct msm_vidc_buffer *msm_vidc_get_vidc_buffer(struct msm_vidc_inst *inst); -struct msm_vidc_alloc *msm_vidc_get_alloc_buffer(struct msm_vidc_inst *inst); -struct msm_vidc_map *msm_vidc_get_map_buffer(struct msm_vidc_inst *inst); -struct msm_vidc_timestamp *msm_vidc_get_ts(struct msm_vidc_inst *inst); -int msm_vidc_put_vidc_buffer(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buf); -int msm_vidc_put_alloc_buffer(struct msm_vidc_inst *inst, struct msm_vidc_alloc *alloc); -int msm_vidc_put_map_buffer(struct msm_vidc_inst *inst, struct msm_vidc_map *map); -int msm_vidc_put_ts(struct msm_vidc_inst *inst, struct msm_vidc_timestamp *ts); -int msm_vidc_destroy_vidc_buffer(struct msm_vidc_inst *inst); -int msm_vidc_destroy_alloc_buffer(struct msm_vidc_inst *inst); -int msm_vidc_destroy_map_buffer(struct msm_vidc_inst *inst); -int msm_vidc_destroy_ts(struct msm_vidc_inst *inst); int msm_vidc_remove_session(struct msm_vidc_inst *inst); int msm_vidc_add_session(struct msm_vidc_inst *inst); int msm_vidc_session_open(struct msm_vidc_inst *inst); diff --git a/driver/vidc/inc/msm_vidc_inst.h b/driver/vidc/inc/msm_vidc_inst.h index d8aed7cd21..67551caba9 100644 --- a/driver/vidc/inc/msm_vidc_inst.h +++ b/driver/vidc/inc/msm_vidc_inst.h @@ -7,6 +7,7 @@ #define _MSM_VIDC_INST_H_ #include "msm_vidc_internal.h" +#include "msm_vidc_memory.h" #include "hfi_property.h" struct msm_vidc_inst; @@ -27,13 +28,6 @@ struct msm_vidc_session_ops { int (*extra_count)(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type type); }; -struct msm_vidc_pool_info { - struct msm_vidc_pool allocations; - struct msm_vidc_pool mappings; - struct msm_vidc_pool buffers; - struct msm_vidc_pool timestamps; -}; - struct msm_vidc_allocations_info { struct msm_vidc_allocations bin; struct msm_vidc_allocations arp; @@ -119,7 +113,7 @@ struct msm_vidc_inst { struct msm_vidc_rectangle compose; struct msm_vidc_power power; struct vidc_bus_vote_data bus_data; - struct msm_vidc_pool_info pool; + struct msm_memory_pool pool[MSM_MEM_POOL_MAX]; struct msm_vidc_buffers_info buffers; struct msm_vidc_mappings_info mappings; struct msm_vidc_allocations_info allocations; diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 36e7addf28..23f56b357f 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -828,11 +828,6 @@ struct msm_vidc_timestamps { u64 rank; }; -struct msm_vidc_pool { - struct list_head list; - u32 count; -}; - enum msm_vidc_allow { MSM_VIDC_DISALLOW = 0, MSM_VIDC_ALLOW, diff --git a/driver/vidc/inc/msm_vidc_memory.h b/driver/vidc/inc/msm_vidc_memory.h index cb183ad3f9..04eef96d56 100644 --- a/driver/vidc/inc/msm_vidc_memory.h +++ b/driver/vidc/inc/msm_vidc_memory.h @@ -7,7 +7,30 @@ #define _MSM_VIDC_MEMORY_H_ #include "msm_vidc_internal.h" -#include "msm_vidc_core.h" + +struct msm_vidc_core; +struct msm_vidc_inst; + +enum msm_memory_pool_type { + MSM_MEM_POOL_BUFFER = 0, + MSM_MEM_POOL_MAP, + MSM_MEM_POOL_ALLOC, + MSM_MEM_POOL_TIMESTAMP, + MSM_MEM_POOL_MAX, +}; + +struct msm_memory_alloc_header { + struct list_head list; + void *buf; +}; + +struct msm_memory_pool { + u32 type; + u32 size; + char *name; + struct list_head free_pool; /* list of struct msm_memory_alloc_header */ + struct list_head busy_pool; /* list of struct msm_memory_alloc_header */ +}; int msm_vidc_memory_alloc(struct msm_vidc_core *core, struct msm_vidc_alloc *alloc); @@ -19,5 +42,11 @@ int msm_vidc_memory_unmap(struct msm_vidc_core *core, struct msm_vidc_map *map); struct dma_buf *msm_vidc_memory_get_dmabuf(int fd); void msm_vidc_memory_put_dmabuf(void *dmabuf); +int msm_memory_pools_init(struct msm_vidc_inst *inst); +void msm_memory_pools_deinit(struct msm_vidc_inst *inst); +void *msm_memory_alloc(struct msm_vidc_inst *inst, + enum msm_memory_pool_type type); +void msm_memory_free(struct msm_vidc_inst *inst, + enum msm_memory_pool_type type, void *vidc_buf); #endif // _MSM_VIDC_MEMORY_H_ \ No newline at end of file diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 018577440d..e453b2e4be 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -1848,7 +1848,7 @@ int msm_vdec_handle_release_buffer(struct msm_vidc_inst *inst, print_vidc_buffer(VIDC_LOW, "low ", "release done", inst, buf); /* delete the buffer from release list */ list_del(&buf->list); - msm_vidc_put_vidc_buffer(inst, buf); + msm_memory_free(inst, MSM_MEM_POOL_BUFFER, buf); return rc; } diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index 4b3a35a61d..a5599296df 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -17,6 +17,7 @@ #include "msm_vidc_debug.h" #include "msm_vidc_control.h" #include "msm_vidc_power.h" +#include "msm_vidc_memory.h" #include "venus_hfi_response.h" #define MSM_VIDC_DRV_NAME "msm_vidc_driver" @@ -778,13 +779,15 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) kref_init(&inst->kref); mutex_init(&inst->lock); msm_vidc_update_debug_str(inst); - i_vpr_h(inst, "Opening video instance: %d\n", session_type); + + rc = msm_memory_pools_init(inst); + if (rc) { + i_vpr_e(inst, "%s: failed to init pool buffers\n", __func__); + kfree(inst); + return NULL; + } INIT_LIST_HEAD(&inst->response_works); - INIT_LIST_HEAD(&inst->pool.buffers.list); - INIT_LIST_HEAD(&inst->pool.mappings.list); - INIT_LIST_HEAD(&inst->pool.allocations.list); - INIT_LIST_HEAD(&inst->pool.timestamps.list); INIT_LIST_HEAD(&inst->timestamps.list); INIT_LIST_HEAD(&inst->buffers.input.list); INIT_LIST_HEAD(&inst->buffers.input_meta.list); diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 66ee0fb224..8161a2cc8b 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -1980,7 +1980,7 @@ int msm_vidc_process_readonly_buffers(struct msm_vidc_inst *inst, buf->attr |= MSM_VIDC_ATTR_READ_ONLY; print_vidc_buffer(VIDC_LOW, "low ", "ro buf removed", inst, ro_buf); list_del(&ro_buf->list); - msm_vidc_put_vidc_buffer(inst, ro_buf); + msm_memory_free(inst, MSM_MEM_POOL_BUFFER, ro_buf); break; } } @@ -2007,7 +2007,7 @@ int msm_vidc_memory_unmap_completely(struct msm_vidc_inst *inst, if (!map->refcount) { msm_vidc_memory_put_dmabuf(map->dmabuf); list_del(&map->list); - msm_vidc_put_map_buffer(inst, map); + msm_memory_free(inst, MSM_MEM_POOL_MAP, map); break; } } @@ -2112,7 +2112,7 @@ int msm_vidc_flush_ts(struct msm_vidc_inst *inst) i_vpr_l(inst, "%s: flushing ts: val %lld, rank %%lld\n", __func__, ts->sort.val, ts->rank); list_del(&ts->sort.list); - msm_vidc_put_ts(inst, ts); + msm_memory_free(inst, MSM_MEM_POOL_TIMESTAMP, ts); } inst->timestamps.count = 0; inst->timestamps.rank = 0; @@ -2130,7 +2130,7 @@ int msm_vidc_update_timestamp(struct msm_vidc_inst *inst, u64 timestamp) return -EINVAL; } - ts = msm_vidc_get_ts(inst); + ts = msm_memory_alloc(inst, MSM_MEM_POOL_TIMESTAMP); if (!ts) { i_vpr_e(inst, "%s: ts alloc failed\n", __func__); return -ENOMEM; @@ -2153,229 +2153,12 @@ int msm_vidc_update_timestamp(struct msm_vidc_inst *inst, u64 timestamp) } inst->timestamps.count--; list_del(&ts->sort.list); - msm_vidc_put_ts(inst, ts); + msm_memory_free(inst, MSM_MEM_POOL_TIMESTAMP, ts); } return 0; } -struct msm_vidc_timestamp *msm_vidc_get_ts(struct msm_vidc_inst *inst) -{ - struct msm_vidc_timestamp *ts = NULL; - - if (!inst) { - d_vpr_e("%s: Invalid params\n", __func__); - return NULL; - } - - if (!list_empty(&inst->pool.timestamps.list)) { - ts = list_first_entry(&inst->pool.timestamps.list, - struct msm_vidc_timestamp, sort.list); - inst->pool.timestamps.count--; - list_del(&ts->sort.list); - memset(ts, 0, sizeof(struct msm_vidc_timestamp)); - return ts; - } - - ts = kzalloc(sizeof(struct msm_vidc_timestamp), GFP_KERNEL); - if (!ts) { - i_vpr_e(inst, "%s: ts failed\n", __func__); - return NULL; - } - - return ts; -} - -int msm_vidc_put_ts(struct msm_vidc_inst *inst, struct msm_vidc_timestamp *ts) -{ - if (!inst || !ts) { - d_vpr_e("%s: Invalid params\n", __func__); - return -EINVAL; - } - - inst->pool.timestamps.count++; - list_add_tail(&ts->sort.list, &inst->pool.timestamps.list); - - return 0; -} - -int msm_vidc_destroy_ts(struct msm_vidc_inst *inst) -{ - struct msm_vidc_timestamp *ts, *temp; - - if (!inst) { - d_vpr_e("%s: Invalid params\n", __func__); - return -EINVAL; - } - - i_vpr_h(inst, "%s: pool: ts count %u\n", __func__, inst->pool.timestamps.count); - - /* free all timestamps from pool */ - list_for_each_entry_safe(ts, temp, &inst->pool.timestamps.list, sort.list) { - list_del(&ts->sort.list); - kfree(ts); - } - - return 0; -} - -struct msm_vidc_buffer *msm_vidc_get_vidc_buffer(struct msm_vidc_inst *inst) -{ - struct msm_vidc_buffer *buf = NULL; - - if (!inst) { - d_vpr_e("%s: Invalid params\n", __func__); - return NULL; - } - - if (!list_empty(&inst->pool.buffers.list)) { - buf = list_first_entry(&inst->pool.buffers.list, struct msm_vidc_buffer, list); - inst->pool.buffers.count--; - list_del(&buf->list); - memset(buf, 0, sizeof(struct msm_vidc_buffer)); - return buf; - } - - buf = kzalloc(sizeof(struct msm_vidc_buffer), GFP_KERNEL); - if (!buf) { - i_vpr_e(inst, "%s: buf failed\n", __func__); - return NULL; - } - - return buf; -} - -int msm_vidc_put_vidc_buffer(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buf) -{ - if (!inst || !buf) { - d_vpr_e("%s: Invalid params\n", __func__); - return -EINVAL; - } - - inst->pool.buffers.count++; - list_add_tail(&buf->list, &inst->pool.buffers.list); - - return 0; -} - -int msm_vidc_destroy_vidc_buffer(struct msm_vidc_inst *inst) -{ - struct msm_vidc_buffer *buf, *dummy; - - if (!inst) { - d_vpr_e("%s: Invalid params\n", __func__); - return -EINVAL; - } - - i_vpr_h(inst, "%s: pool: buffer count %u\n", __func__, inst->pool.buffers.count); - - /* free all buffers from pool */ - list_for_each_entry_safe(buf, dummy, &inst->pool.buffers.list, list) { - list_del(&buf->list); - kfree(buf); - } - - return 0; -} - -struct msm_vidc_alloc *msm_vidc_get_alloc_buffer(struct msm_vidc_inst *inst) -{ - struct msm_vidc_alloc *alloc = NULL; - - if (!inst) { - d_vpr_e("%s: Invalid params\n", __func__); - return NULL; - } - - if (!list_empty(&inst->pool.allocations.list)) { - alloc = list_first_entry(&inst->pool.allocations.list, struct msm_vidc_alloc, list); - inst->pool.allocations.count--; - list_del(&alloc->list); - memset(alloc, 0, sizeof(struct msm_vidc_alloc)); - return alloc; - } - - alloc = kzalloc(sizeof(struct msm_vidc_alloc), GFP_KERNEL); - if (!alloc) { - i_vpr_e(inst, "%s: alloc failed\n", __func__); - return NULL; - } - - return alloc; -} - -int msm_vidc_put_alloc_buffer(struct msm_vidc_inst *inst, struct msm_vidc_alloc *alloc) -{ - if (!inst || !alloc) { - d_vpr_e("%s: Invalid params\n", __func__); - return -EINVAL; - } - - list_add_tail(&alloc->list, &inst->pool.allocations.list); - inst->pool.allocations.count++; - - return 0; -} - -int msm_vidc_destroy_alloc_buffer(struct msm_vidc_inst *inst) -{ - struct msm_vidc_alloc *alloc, *dummy; - - if (!inst) { - d_vpr_e("%s: Invalid params\n", __func__); - return -EINVAL; - } - - i_vpr_h(inst, "%s: pool: allocations count %u\n", __func__, inst->pool.allocations.count); - - /* free all allocations from pool */ - list_for_each_entry_safe(alloc, dummy, &inst->pool.allocations.list, list) { - list_del(&alloc->list); - kfree(alloc); - } - - return 0; -} - -struct msm_vidc_map *msm_vidc_get_map_buffer(struct msm_vidc_inst *inst) -{ - struct msm_vidc_map *map = NULL; - - if (!inst) { - d_vpr_e("%s: Invalid params\n", __func__); - return NULL; - } - - if (!list_empty(&inst->pool.mappings.list)) { - map = list_first_entry(&inst->pool.mappings.list, struct msm_vidc_map, list); - inst->pool.mappings.count--; - list_del(&map->list); - memset(map, 0, sizeof(struct msm_vidc_map)); - return map; - } - - map = kzalloc(sizeof(struct msm_vidc_map), GFP_KERNEL); - if (!map) { - i_vpr_e(inst, "%s: map failed\n", __func__); - return NULL; - } - - return map; -} - -int msm_vidc_put_map_buffer(struct msm_vidc_inst *inst, struct msm_vidc_map *map) -{ - if (!inst || !map) { - d_vpr_e("%s: Invalid params\n", __func__); - return -EINVAL; - } - - list_add_tail(&map->list, &inst->pool.mappings.list); - inst->pool.mappings.count++; - - return 0; -} - int msm_vidc_get_delayed_unmap(struct msm_vidc_inst *inst, struct msm_vidc_map *map) { int rc = 0; @@ -2416,32 +2199,12 @@ int msm_vidc_put_delayed_unmap(struct msm_vidc_inst *inst, struct msm_vidc_map * if (!map->refcount) { msm_vidc_memory_put_dmabuf(map->dmabuf); list_del(&map->list); - msm_vidc_put_map_buffer(inst, map); + msm_memory_free(inst, MSM_MEM_POOL_MAP, map); } return rc; } -int msm_vidc_destroy_map_buffer(struct msm_vidc_inst *inst) -{ - struct msm_vidc_map *map, *dummy; - - if (!inst) { - d_vpr_e("%s: Invalid params\n", __func__); - return -EINVAL; - } - - i_vpr_h(inst, "%s: pool: mappings count %u\n", __func__, inst->pool.mappings.count); - - /* free all mappings from pool */ - list_for_each_entry_safe(map, dummy, &inst->pool.mappings.list, list) { - list_del(&map->list); - kfree(map); - } - - return 0; -} - int msm_vidc_unmap_buffers(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type type) { @@ -2504,7 +2267,7 @@ int msm_vidc_unmap_driver_buf(struct msm_vidc_inst *inst, if (!map->refcount) { msm_vidc_memory_put_dmabuf(map->dmabuf); list_del(&map->list); - msm_vidc_put_map_buffer(inst, map); + msm_memory_free(inst, MSM_MEM_POOL_MAP, map); } return rc; @@ -2539,7 +2302,7 @@ int msm_vidc_map_driver_buf(struct msm_vidc_inst *inst, } if (!found) { /* new buffer case */ - map = msm_vidc_get_map_buffer(inst); + map = msm_memory_alloc(inst, MSM_MEM_POOL_MAP); if (!map) { i_vpr_e(inst, "%s: alloc failed\n", __func__); return -ENOMEM; @@ -2555,7 +2318,7 @@ int msm_vidc_map_driver_buf(struct msm_vidc_inst *inst, rc = msm_vidc_get_delayed_unmap(inst, map); if (rc) { msm_vidc_memory_put_dmabuf(map->dmabuf); - msm_vidc_put_map_buffer(inst, map); + msm_memory_free(inst, MSM_MEM_POOL_MAP, map); return rc; } } @@ -2586,7 +2349,7 @@ int msm_vidc_put_driver_buf(struct msm_vidc_inst *inst, /* delete the buffer from buffers->list */ list_del(&buf->list); - msm_vidc_put_vidc_buffer(inst, buf); + msm_memory_free(inst, MSM_MEM_POOL_BUFFER, buf); return rc; } @@ -2612,7 +2375,7 @@ struct msm_vidc_buffer *msm_vidc_get_driver_buf(struct msm_vidc_inst *inst, if (!buffers) return NULL; - buf = msm_vidc_get_vidc_buffer(inst); + buf = msm_memory_alloc(inst, MSM_MEM_POOL_BUFFER); if (!buf) { i_vpr_e(inst, "%s: alloc failed\n", __func__); return NULL; @@ -2640,7 +2403,7 @@ struct msm_vidc_buffer *msm_vidc_get_driver_buf(struct msm_vidc_inst *inst, error: msm_vidc_memory_put_dmabuf(buf->dmabuf); list_del(&buf->list); - msm_vidc_put_vidc_buffer(inst, buf); + msm_memory_free(inst, MSM_MEM_POOL_BUFFER, buf); return NULL; } @@ -3083,7 +2846,7 @@ int msm_vidc_destroy_internal_buffer(struct msm_vidc_inst *inst, if (map->dmabuf == buffer->dmabuf) { msm_vidc_memory_unmap(inst->core, map); list_del(&map->list); - msm_vidc_put_map_buffer(inst, map); + msm_memory_free(inst, MSM_MEM_POOL_MAP, map); break; } } @@ -3092,7 +2855,7 @@ int msm_vidc_destroy_internal_buffer(struct msm_vidc_inst *inst, if (alloc->dmabuf == buffer->dmabuf) { msm_vidc_memory_free(inst->core, alloc); list_del(&alloc->list); - msm_vidc_put_alloc_buffer(inst, alloc); + msm_memory_free(inst, MSM_MEM_POOL_ALLOC, alloc); break; } } @@ -3100,7 +2863,7 @@ int msm_vidc_destroy_internal_buffer(struct msm_vidc_inst *inst, list_for_each_entry_safe(buf, dummy, &buffers->list, list) { if (buf->dmabuf == buffer->dmabuf) { list_del(&buf->list); - msm_vidc_put_vidc_buffer(inst, buf); + msm_memory_free(inst, MSM_MEM_POOL_BUFFER, buf); break; } } @@ -3180,7 +2943,7 @@ int msm_vidc_create_internal_buffer(struct msm_vidc_inst *inst, if (!buffers->size) return 0; - buffer = msm_vidc_get_vidc_buffer(inst); + buffer = msm_memory_alloc(inst, MSM_MEM_POOL_BUFFER); if (!buffer) { i_vpr_e(inst, "%s: buf alloc failed\n", __func__); return -ENOMEM; @@ -3191,7 +2954,7 @@ int msm_vidc_create_internal_buffer(struct msm_vidc_inst *inst, buffer->buffer_size = buffers->size; list_add_tail(&buffer->list, &buffers->list); - alloc = msm_vidc_get_alloc_buffer(inst); + alloc = msm_memory_alloc(inst, MSM_MEM_POOL_ALLOC); if (!alloc) { i_vpr_e(inst, "%s: alloc failed\n", __func__); return -ENOMEM; @@ -3207,7 +2970,7 @@ int msm_vidc_create_internal_buffer(struct msm_vidc_inst *inst, return -ENOMEM; list_add_tail(&alloc->list, &allocations->list); - map = msm_vidc_get_map_buffer(inst); + map = msm_memory_alloc(inst, MSM_MEM_POOL_MAP); if (!map) { i_vpr_e(inst, "%s: map alloc failed\n", __func__); return -ENOMEM; @@ -4735,20 +4498,20 @@ void msm_vidc_destroy_buffers(struct msm_vidc_inst *inst) list_for_each_entry_safe(buf, dummy, &inst->buffers.read_only.list, list) { print_vidc_buffer(VIDC_ERR, "err ", "destroying ro buffer", inst, buf); list_del(&buf->list); - msm_vidc_put_vidc_buffer(inst, buf); + msm_memory_free(inst, MSM_MEM_POOL_BUFFER, buf); } list_for_each_entry_safe(buf, dummy, &inst->buffers.release.list, list) { print_vidc_buffer(VIDC_ERR, "err ", "destroying release buffer", inst, buf); list_del(&buf->list); - msm_vidc_put_vidc_buffer(inst, buf); + msm_memory_free(inst, MSM_MEM_POOL_BUFFER, buf); } list_for_each_entry_safe(ts, dummy_ts, &inst->timestamps.list, sort.list) { i_vpr_e(inst, "%s: removing ts: val %lld, rank %lld\n", __func__, ts->sort.val, ts->rank); list_del(&ts->sort.list); - msm_vidc_put_ts(inst, ts); + msm_memory_free(inst, MSM_MEM_POOL_TIMESTAMP, ts); } list_for_each_entry_safe(work, dummy_work, &inst->response_works, list) { @@ -4758,10 +4521,7 @@ void msm_vidc_destroy_buffers(struct msm_vidc_inst *inst) } /* destroy buffers from pool */ - msm_vidc_destroy_vidc_buffer(inst); - msm_vidc_destroy_alloc_buffer(inst); - msm_vidc_destroy_map_buffer(inst); - msm_vidc_destroy_ts(inst); + msm_memory_pools_deinit(inst); } static void msm_vidc_close_helper(struct kref *kref) diff --git a/driver/vidc/src/msm_vidc_memory.c b/driver/vidc/src/msm_vidc_memory.c index d532b7b263..bf18aba39b 100644 --- a/driver/vidc/src/msm_vidc_memory.c +++ b/driver/vidc/src/msm_vidc_memory.c @@ -314,6 +314,172 @@ int msm_vidc_memory_free(struct msm_vidc_core *core, struct msm_vidc_alloc *mem) return rc; }; + +void *msm_memory_alloc(struct msm_vidc_inst *inst, enum msm_memory_pool_type type) +{ + struct msm_memory_alloc_header *hdr; + struct msm_memory_pool *pool; + + if (!inst || type < 0 || type >= MSM_MEM_POOL_MAX) { + d_vpr_e("%s: Invalid params\n", __func__); + return NULL; + } + pool = &inst->pool[type]; + + if (!list_empty(&pool->free_pool)) { + /* get 1st node from free pool */ + hdr = list_first_entry(&pool->free_pool, + struct msm_memory_alloc_header, list); + list_del_init(&hdr->list); + + /* reset existing data */ + memset((char *)hdr->buf, 0, pool->size); + + /* add to busy pool */ + list_add_tail(&hdr->list, &pool->busy_pool); + + return hdr->buf; + } + + hdr = kzalloc(pool->size + sizeof(struct msm_memory_alloc_header), GFP_KERNEL); + if (!hdr) { + i_vpr_e(inst, "%s: buffer allocation failed\n", __func__); + return NULL; + } + INIT_LIST_HEAD(&hdr->list); + hdr->buf = (void *)(hdr + 1); + list_add_tail(&hdr->list, &pool->busy_pool); + + return hdr->buf; +} + +void msm_memory_free(struct msm_vidc_inst *inst, enum msm_memory_pool_type type, + void *vidc_buf) +{ + struct msm_memory_alloc_header *hdr; + struct msm_memory_pool *pool; + bool found = false; + + if (!inst || !vidc_buf || type < 0 || type >= MSM_MEM_POOL_MAX) { + d_vpr_e("%s: Invalid params\n", __func__); + return; + } + pool = &inst->pool[type]; + + /* sanitize buffer addr */ + list_for_each_entry(hdr, &pool->busy_pool, list) { + if (hdr->buf == vidc_buf) { + found = true; + break; + } + } + if (!found) { + i_vpr_e(inst, "%s: invalid buf addr %#x\n", __func__, vidc_buf); + return; + } + + /* remove from busy pool */ + list_del_init(&hdr->list); + + /* add to free pool */ + list_add_tail(&hdr->list, &pool->free_pool); +} + +static void msm_vidc_destroy_pool_buffers(struct msm_vidc_inst *inst, + enum msm_memory_pool_type type) +{ + struct msm_memory_alloc_header *hdr, *dummy; + struct msm_memory_pool *pool; + u32 fcount = 0, bcount = 0; + + if (!inst || type < 0 || type >= MSM_MEM_POOL_MAX) { + d_vpr_e("%s: Invalid params\n", __func__); + return; + } + pool = &inst->pool[type]; + + /* detect memleak: busy pool is expected to be empty here */ + if (!list_empty(&pool->busy_pool)) + i_vpr_e(inst, "%s: destroy request on active buffer. type %s\n", + __func__, pool->name); + + /* destroy all free buffers */ + list_for_each_entry_safe(hdr, dummy, &pool->free_pool, list) { + list_del(&hdr->list); + kfree(hdr); + fcount++; + } + + /* destroy all busy buffers */ + list_for_each_entry_safe(hdr, dummy, &pool->busy_pool, list) { + list_del(&hdr->list); + kfree(hdr); + bcount++; + } + + i_vpr_h(inst, "%s: type: %23s, count: free %2u, busy %2u\n", + __func__, pool->name, fcount, bcount); +} + +void msm_memory_pools_deinit(struct msm_vidc_inst *inst) +{ + u32 i = 0; + + if (!inst) { + d_vpr_e("%s: Invalid params\n", __func__); + return; + } + + /* destroy all buffers from all pool types */ + for (i = 0; i < MSM_MEM_POOL_MAX; i++) + msm_vidc_destroy_pool_buffers(inst, i); +} + +struct msm_vidc_type_size_name { + enum msm_memory_pool_type type; + u32 size; + char *name; +}; + +static struct msm_vidc_type_size_name buftype_size_name_arr[] = { + {MSM_MEM_POOL_BUFFER, sizeof(struct msm_vidc_buffer), "MSM_MEM_POOL_BUFFER" }, + {MSM_MEM_POOL_MAP, sizeof(struct msm_vidc_map), "MSM_MEM_POOL_MAP" }, + {MSM_MEM_POOL_ALLOC, sizeof(struct msm_vidc_alloc), "MSM_MEM_POOL_ALLOC" }, + {MSM_MEM_POOL_TIMESTAMP, sizeof(struct msm_vidc_timestamp), "MSM_MEM_POOL_TIMESTAMP" }, +}; + +int msm_memory_pools_init(struct msm_vidc_inst *inst) +{ + u32 i; + + if (!inst) { + d_vpr_e("%s: Invalid params\n", __func__); + return -EINVAL; + } + + if (ARRAY_SIZE(buftype_size_name_arr) != MSM_MEM_POOL_MAX) { + i_vpr_e(inst, "%s: num elements mismatch %u %u\n", __func__, + ARRAY_SIZE(buftype_size_name_arr), MSM_MEM_POOL_MAX); + return -EINVAL; + } + + for (i = 0; i < MSM_MEM_POOL_MAX; i++) { + if (i != buftype_size_name_arr[i].type) { + i_vpr_e(inst, "%s: type mismatch %u %u\n", __func__, + i, buftype_size_name_arr[i].type); + return -EINVAL; + } + + inst->pool[i].type = buftype_size_name_arr[i].type; + inst->pool[i].size = buftype_size_name_arr[i].size; + inst->pool[i].name = buftype_size_name_arr[i].name; + INIT_LIST_HEAD(&inst->pool[i].free_pool); + INIT_LIST_HEAD(&inst->pool[i].busy_pool); + } + + return 0; +} + /* int msm_memory_cache_operations(struct msm_vidc_inst *inst, struct dma_buf *dbuf, enum smem_cache_ops cache_op, diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index 734214593e..6b4499f17c 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -12,6 +12,7 @@ #include "msm_vidc_driver.h" #include "msm_vdec.h" #include "msm_vidc_control.h" +#include "msm_vidc_memory.h" #define in_range(range, val) (((range.begin) < (val)) && ((range.end) > (val))) @@ -593,7 +594,7 @@ static int handle_read_only_buffer(struct msm_vidc_inst *inst, * if present, do nothing */ if (!found) { - ro_buf = msm_vidc_get_vidc_buffer(inst); + ro_buf = msm_memory_alloc(inst, MSM_MEM_POOL_BUFFER); if (!ro_buf) { i_vpr_e(inst, "%s: buffer alloc failed\n", __func__); return -ENOMEM; @@ -644,7 +645,7 @@ static int handle_non_read_only_buffer(struct msm_vidc_inst *inst, if (found) { print_vidc_buffer(VIDC_LOW, "low ", "ro buf deleted", inst, ro_buf); list_del(&ro_buf->list); - msm_vidc_put_vidc_buffer(inst, ro_buf); + msm_memory_free(inst, MSM_MEM_POOL_BUFFER, ro_buf); } return 0; From e61b55879bbed7d29ae98440e95e18c2655c9978 Mon Sep 17 00:00:00 2001 From: Priyanka Gujjula Date: Thu, 17 Jun 2021 22:53:27 +0530 Subject: [PATCH 0351/1061] video: driver: Add support for enc auto framerate 1. Calculate framerate based on buffer timestamp 2. If framerate changed and stable for 2 frames, update it to firmware and in driver internally. Change-Id: I7feda86dec8fcfc1dff6defac8c15a97c1b8393e Signed-off-by: Priyanka Gujjula --- driver/platform/waipio/src/msm_vidc_waipio.c | 1 + .../variant/iris2/src/msm_vidc_power_iris2.c | 2 +- driver/vidc/inc/msm_vidc_driver.h | 3 +- driver/vidc/inc/msm_vidc_inst.h | 1 + driver/vidc/inc/msm_vidc_internal.h | 3 + driver/vidc/src/msm_venc.c | 1 + driver/vidc/src/msm_vidc.c | 8 ++ driver/vidc/src/msm_vidc_driver.c | 74 +++++++++++++++++-- driver/vidc/src/msm_vidc_power.c | 2 +- driver/vidc/src/venus_hfi.c | 4 - 10 files changed, 87 insertions(+), 12 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 5dbb14ae26..505bded567 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -93,6 +93,7 @@ static struct msm_platform_core_capability core_data_waipio[] = { {DECODE_BATCH_TIMEOUT, 200}, {AV_SYNC_WINDOW_SIZE, 40}, {NON_FATAL_FAULTS, 1}, + {ENC_AUTO_FRAMERATE, 1}, }; static struct msm_platform_inst_capability instance_data_waipio[] = { diff --git a/driver/variant/iris2/src/msm_vidc_power_iris2.c b/driver/variant/iris2/src/msm_vidc_power_iris2.c index dc53085630..acbaff0fef 100644 --- a/driver/variant/iris2/src/msm_vidc_power_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_power_iris2.c @@ -48,7 +48,7 @@ u64 msm_vidc_calc_freq_iris2(struct msm_vidc_inst *inst, u32 data_size) mbpf = msm_vidc_get_mbs_per_frame(inst); fps = msm_vidc_get_fps(inst); - buf_timetamps_fps = msm_vidc_calc_framerate(inst); + buf_timetamps_fps = msm_vidc_calc_window_avg_framerate(inst); /* * when buffer detected fps is more than client set value by 10%, diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 7b700e4792..15b420484a 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -423,7 +423,8 @@ int msm_vidc_check_session_supported(struct msm_vidc_inst *inst); int msm_vidc_check_core_mbps(struct msm_vidc_inst *inst); int msm_vidc_check_scaling_supported(struct msm_vidc_inst *inst); int msm_vidc_update_timestamp(struct msm_vidc_inst *inst, u64 timestamp); -int msm_vidc_calc_framerate(struct msm_vidc_inst *inst); +int msm_vidc_set_auto_framerate(struct msm_vidc_inst *inst, u64 timestamp); +int msm_vidc_calc_window_avg_framerate(struct msm_vidc_inst *inst); int msm_vidc_flush_ts(struct msm_vidc_inst *inst); const char *buf_name(enum msm_vidc_buffer_type type); void msm_vidc_free_capabililty_list(struct msm_vidc_inst *inst, diff --git a/driver/vidc/inc/msm_vidc_inst.h b/driver/vidc/inc/msm_vidc_inst.h index d8aed7cd21..130da6c9b8 100644 --- a/driver/vidc/inc/msm_vidc_inst.h +++ b/driver/vidc/inc/msm_vidc_inst.h @@ -153,5 +153,6 @@ struct msm_vidc_inst { u32 max_input_data_size; u32 dpb_list_payload[MAX_DPB_LIST_ARRAY_SIZE]; u32 max_map_output_count; + u32 auto_framerate; }; #endif // _MSM_VIDC_INST_H_ diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 36e7addf28..a448b205a9 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -69,6 +69,8 @@ #define MAX_SUPPORTED_MIN_QUALITY 70 #define DCVS_WINDOW 16 +#define ENC_FPS_WINDOW 3 +#define DEC_FPS_WINDOW 10 /* Superframe can have maximum of 32 frames */ #define VIDC_SUPERFRAME_MAX 32 #define COLOR_RANGE_UNSPECIFIED (-1) @@ -327,6 +329,7 @@ enum msm_vidc_core_capability_type { AV_SYNC_WINDOW_SIZE, CLK_FREQ_THRESHOLD, NON_FATAL_FAULTS, + ENC_AUTO_FRAMERATE, CORE_CAP_MAX, }; diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index 6c1b94f645..01784ab76d 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -1604,6 +1604,7 @@ set_default: "%s: failed to set frame rate to fw\n", __func__); goto exit; } + inst->auto_framerate = q16_rate; } return 0; diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index 4b3a35a61d..c9cfbab470 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -433,6 +433,7 @@ int msm_vidc_qbuf(void *instance, struct media_device *mdev, int rc = 0; struct msm_vidc_inst *inst = instance; struct vb2_queue *q; + u64 timestamp_us = 0; if (!inst || !inst->core || !b || !valid_v4l2_buffer(b, inst)) { d_vpr_e("%s: invalid params %pK %pK\n", __func__, inst, b); @@ -444,6 +445,12 @@ int msm_vidc_qbuf(void *instance, struct media_device *mdev, rc = -EINVAL; goto exit; } + + if (is_encode_session(inst) && b->type == INPUT_MPLANE) { + timestamp_us = (u64)((b->timestamp.tv_sec * USEC_PER_SEC) + + b->timestamp.tv_usec); + msm_vidc_set_auto_framerate(inst, timestamp_us); + } inst->last_qbuf_time_ns = ktime_get_ns(); rc = vb2_qbuf(q, mdev, b); @@ -775,6 +782,7 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) inst->request = false; inst->ipsc_properties_set = false; inst->opsc_properties_set = false; + inst->auto_framerate = DEFAULT_FPS << 16; kref_init(&inst->kref); mutex_init(&inst->lock); msm_vidc_update_debug_str(inst); diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 66ee0fb224..3e296f3acf 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -40,8 +40,6 @@ extern struct msm_vidc_core *g_core; #define SSR_ADDR_ID 0xFFFFFFFF00000000 #define SSR_ADDR_SHIFT 32 -#define FPS_WINDOW 10 - struct msm_vidc_cap_name { enum msm_vidc_inst_capability_type cap; char *name; @@ -2014,7 +2012,67 @@ int msm_vidc_memory_unmap_completely(struct msm_vidc_inst *inst, return rc; } -int msm_vidc_calc_framerate(struct msm_vidc_inst *inst) +int msm_vidc_set_auto_framerate(struct msm_vidc_inst *inst, u64 timestamp) +{ + struct msm_vidc_core *core; + struct msm_vidc_timestamp *ts; + struct msm_vidc_timestamp *prev = NULL; + u32 counter = 0, prev_fr = 0, curr_fr = 0; + u64 ts_ms = 0; + int rc = 0; + + if (!inst || !inst->core || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + core = inst->core; + if (!core->capabilities[ENC_AUTO_FRAMERATE].value || + is_image_session(inst) || msm_vidc_is_super_buffer(inst)) + goto exit; + + rc = msm_vidc_update_timestamp(inst, timestamp); + if (rc) + goto exit; + + list_for_each_entry(ts, &inst->timestamps.list, sort.list) { + if (prev) { + ts_ms = div_u64(ts->sort.val - prev->sort.val, 1000); + prev_fr = curr_fr; + curr_fr = ts_ms ? div_u64(MSEC_PER_SEC, ts_ms) << 16 : + inst->auto_framerate; + if (curr_fr > inst->capabilities->cap[FRAME_RATE].max) + curr_fr = inst->capabilities->cap[FRAME_RATE].max; + } + prev = ts; + counter++; + } + + if (counter < ENC_FPS_WINDOW) + goto exit; + + /* if framerate changed and stable for 2 frames, set to firmware */ + if (curr_fr == prev_fr && curr_fr != inst->auto_framerate) { + i_vpr_l(inst, "%s: updated fps to %u\n", __func__, curr_fr >> 16); + rc = venus_hfi_session_property(inst, + HFI_PROP_FRAME_RATE, + HFI_HOST_FLAGS_NONE, + HFI_PORT_BITSTREAM, + HFI_PAYLOAD_Q16, + &curr_fr, + sizeof(u32)); + if (rc) { + i_vpr_e(inst, "%s: set auto frame rate failed\n", + __func__); + goto exit; + } + inst->auto_framerate = curr_fr; + } +exit: + return rc; +} + +int msm_vidc_calc_window_avg_framerate(struct msm_vidc_inst *inst) { struct msm_vidc_timestamp *ts; struct msm_vidc_timestamp *prev = NULL; @@ -2124,6 +2182,7 @@ int msm_vidc_update_timestamp(struct msm_vidc_inst *inst, u64 timestamp) { struct msm_vidc_timestamp *ts; int rc = 0; + u32 window_size = 0; if (!inst) { d_vpr_e("%s: Invalid params\n", __func__); @@ -2144,8 +2203,13 @@ int msm_vidc_update_timestamp(struct msm_vidc_inst *inst, u64 timestamp) return rc; inst->timestamps.count++; - /* keep sliding window of 10 ts nodes */ - if (inst->timestamps.count > FPS_WINDOW) { + if (is_encode_session(inst)) + window_size = ENC_FPS_WINDOW; + else + window_size = DEC_FPS_WINDOW; + + /* keep sliding window */ + if (inst->timestamps.count > window_size) { ts = msm_vidc_get_least_rank_ts(inst); if (!ts) { i_vpr_e(inst, "%s: least rank ts is NULL\n", __func__); diff --git a/driver/vidc/src/msm_vidc_power.c b/driver/vidc/src/msm_vidc_power.c index 9978c77e58..4d84d36e0c 100644 --- a/driver/vidc/src/msm_vidc_power.c +++ b/driver/vidc/src/msm_vidc_power.c @@ -223,7 +223,7 @@ int msm_vidc_scale_buses(struct msm_vidc_inst *inst) vote_data->lcu_size = (codec == V4L2_PIX_FMT_HEVC || codec == V4L2_PIX_FMT_VP9) ? 32 : 16; vote_data->fps = msm_vidc_get_fps(inst); - buf_ts_fps = msm_vidc_calc_framerate(inst); + buf_ts_fps = msm_vidc_calc_window_avg_framerate(inst); if (buf_ts_fps > vote_data->fps) { i_vpr_l(inst, "%s: bitstream: fps %d, client rate %u\n", __func__, buf_ts_fps, vote_data->fps); diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index 3e603e6447..c45a4a912f 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -3399,7 +3399,6 @@ int venus_hfi_queue_super_buffer(struct msm_vidc_inst *inst, /* Create yuv packet */ update_offset(hfi_buffer.addr_offset, (cnt ? frame_size : 0u)); update_timestamp(hfi_buffer.timestamp, (cnt ? ts_delta_us : 0u)); - msm_vidc_update_timestamp(inst, hfi_buffer.timestamp); rc = hfi_create_packet(inst->packet, inst->packet_size, HFI_CMD_BUFFER, @@ -3467,9 +3466,6 @@ int venus_hfi_queue_buffer(struct msm_vidc_inst *inst, if (rc) goto unlock; - if (is_encode_session(inst) && is_input_buffer(buffer->type)) - msm_vidc_update_timestamp(inst, hfi_buffer.timestamp); - rc = hfi_create_header(inst->packet, inst->packet_size, inst->session_id, core->header_id++); if (rc) From 04e17860d7518228694602027b0b43730ec35a7b Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Wed, 16 Jun 2021 17:38:36 -0700 Subject: [PATCH 0352/1061] video: driver: Fix to move enc driver state to DRAIN_LAST_FLAG For encoder, driver state is not moved from DRAIN to DRAIN_LAST_FLAG after receiving LAST_FLAG from firmware. This causes RESUME command failure for v4l2 client. Fix the same. Change-Id: I2c64e9fa85e970e1d0feafdbd865dad61a6d21e9 Signed-off-by: Akshata Sahukar --- driver/vidc/src/venus_hfi_response.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index 734214593e..a80644eec0 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -1668,12 +1668,14 @@ static int handle_session_response(struct msm_vidc_core *core, type = RESP_WORK_OUTPUT_PSC; } } else if (packet->type == HFI_CMD_BUFFER && - packet->port == HFI_PORT_RAW) { + vidc_port_from_hfi(inst, packet->port) == + OUTPUT_PORT) { if (check_last_flag(inst, packet)) { offload = true; type = RESP_WORK_LAST_FLAG; } } + if (offload) break; From bd41af8c212b0181671336a22a885570641e161a Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Wed, 16 Jun 2021 10:44:52 -0700 Subject: [PATCH 0353/1061] video: driver: handle dynamic qp setting - make B and P frame QP controls as dynamic. - enable I/P/B QP to fw as and when these controls are set to the driver. - remove HEIC qp support. Change-Id: I7f45ab0bda75df8128bbbdfcebe66c2cae208b06 Signed-off-by: Darshana Patil --- driver/platform/waipio/src/msm_vidc_waipio.c | 50 ++++++++++----- driver/vidc/inc/msm_vidc_control.h | 4 +- driver/vidc/inc/msm_vidc_internal.h | 4 +- driver/vidc/src/msm_vidc_control.c | 64 ++++++++++++++++++-- driver/vidc/src/msm_vidc_driver.c | 7 ++- 5 files changed, 105 insertions(+), 24 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 5dbb14ae26..952ddeb521 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -138,8 +138,8 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 0, 0, CAP_FLAG_ROOT, {0}, - {PROFILE, MIN_FRAME_QP, MAX_FRAME_QP, I_FRAME_QP, META_ROI_INFO, - BLUR_TYPES, MIN_QUALITY}}, + {PROFILE, MIN_FRAME_QP, MAX_FRAME_QP, I_FRAME_QP, P_FRAME_QP, + B_FRAME_QP, META_ROI_INFO, BLUR_TYPES, MIN_QUALITY}}, {PIX_FMTS, DEC, HEVC|HEIC, MSM_VIDC_FMT_NV12, @@ -363,10 +363,10 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {LTR_COUNT, IR_RANDOM, TIME_DELTA_BASED_RC, I_FRAME_QP, - ENH_LAYER_COUNT, BIT_RATE, CONTENT_ADAPTIVE_CODING, - BITRATE_BOOST, MIN_QUALITY, VBV_DELAY, PEAK_BITRATE, - SLICE_MODE, META_ROI_INFO, BLUR_TYPES, - LOWLATENCY_MODE}, + P_FRAME_QP, B_FRAME_QP, ENH_LAYER_COUNT, BIT_RATE, + CONTENT_ADAPTIVE_CODING, BITRATE_BOOST, MIN_QUALITY, + VBV_DELAY, PEAK_BITRATE,SLICE_MODE, META_ROI_INFO, + BLUR_TYPES, LOWLATENCY_MODE}, msm_vidc_adjust_bitrate_mode, msm_vidc_set_u32_enum}, {BITRATE_MODE, ENC, HEVC, @@ -381,7 +381,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {LTR_COUNT, IR_RANDOM, TIME_DELTA_BASED_RC, I_FRAME_QP, - CONSTANT_QUALITY, ENH_LAYER_COUNT, + P_FRAME_QP, B_FRAME_QP, CONSTANT_QUALITY, ENH_LAYER_COUNT, CONTENT_ADAPTIVE_CODING, BIT_RATE, BITRATE_BOOST, MIN_QUALITY, VBV_DELAY, PEAK_BITRATE, SLICE_MODE, META_ROI_INFO, BLUR_TYPES, @@ -711,14 +711,14 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { MIN_QP_10BIT, MAX_QP, 1, MAX_QP, V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_MAX_QP}, - {I_FRAME_QP, ENC, HEVC|HEIC, + {I_FRAME_QP, ENC, HEVC, MIN_QP_10BIT, MAX_QP, 1, DEFAULT_QP, V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP, HFI_PROP_QP_PACKED, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, {PIX_FMTS, BITRATE_MODE}, {0}, - msm_vidc_adjust_hevc_frame_qp, msm_vidc_set_frame_qp}, + msm_vidc_adjust_hevc_i_frame_qp, msm_vidc_set_frame_qp}, {I_FRAME_QP, ENC, H264, MIN_QP_8BIT, MAX_QP, 1, DEFAULT_QP, @@ -729,21 +729,41 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {BITRATE_MODE}, {0}, NULL, msm_vidc_set_frame_qp}, - {P_FRAME_QP, ENC, HEVC|HEIC, + {P_FRAME_QP, ENC, HEVC, MIN_QP_10BIT, MAX_QP, 1, DEFAULT_QP, - V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP}, + V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {PIX_FMTS, BITRATE_MODE}, {0}, + msm_vidc_adjust_hevc_p_frame_qp, msm_vidc_set_frame_qp}, {P_FRAME_QP, ENC, H264, MIN_QP_8BIT, MAX_QP, 1, DEFAULT_QP, - V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP}, + V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {BITRATE_MODE}, {0}, + NULL, msm_vidc_set_frame_qp}, - {B_FRAME_QP, ENC, HEVC|HEIC, + {B_FRAME_QP, ENC, HEVC, MIN_QP_10BIT, MAX_QP, 1, DEFAULT_QP, - V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP}, + V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {PIX_FMTS, BITRATE_MODE}, {0}, + msm_vidc_adjust_hevc_b_frame_qp, msm_vidc_set_frame_qp}, {B_FRAME_QP, ENC, H264, MIN_QP_8BIT, MAX_QP, 1, DEFAULT_QP, - V4L2_CID_MPEG_VIDEO_H264_B_FRAME_QP}, + V4L2_CID_MPEG_VIDEO_H264_B_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {BITRATE_MODE}, {0}, + NULL, msm_vidc_set_frame_qp}, {LAYER_TYPE, ENC, HEVC, V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B, diff --git a/driver/vidc/inc/msm_vidc_control.h b/driver/vidc/inc/msm_vidc_control.h index 72c283e226..dd35e7534d 100644 --- a/driver/vidc/inc/msm_vidc_control.h +++ b/driver/vidc/inc/msm_vidc_control.h @@ -31,7 +31,9 @@ int msm_vidc_adjust_b_frame(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_peak_bitrate(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_hevc_min_qp(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_hevc_max_qp(void *instance, struct v4l2_ctrl *ctrl); -int msm_vidc_adjust_hevc_frame_qp(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_hevc_i_frame_qp(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_hevc_p_frame_qp(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_hevc_b_frame_qp(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_blur_type(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_blur_resolution(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_cac(void *instance, struct v4l2_ctrl *ctrl); diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 36e7addf28..c7305719e8 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -40,8 +40,8 @@ #define MAX_SUPPORTED_INSTANCES 16 #define MAX_BSE_VPP_DELAY 6 #define DEFAULT_BSE_VPP_DELAY 2 -#define MAX_CAP_PARENTS 16 -#define MAX_CAP_CHILDREN 16 +#define MAX_CAP_PARENTS 20 +#define MAX_CAP_CHILDREN 20 #define DEFAULT_BITSTREM_ALIGNMENT 16 #define H265_BITSTREM_ALIGNMENT 32 #define DEFAULT_MAX_HOST_BUF_COUNT 64 diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 6d1a010f22..de343daf9c 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -363,9 +363,6 @@ static int msm_vidc_adjust_hevc_qp(struct msm_vidc_inst *inst, CAP_TO_8BIT_QP(capability->cap[I_FRAME_MAX_QP].value); CAP_TO_8BIT_QP(capability->cap[P_FRAME_MAX_QP].value); CAP_TO_8BIT_QP(capability->cap[B_FRAME_MAX_QP].value); - } else if (cap_id == I_FRAME_QP) { - CAP_TO_8BIT_QP(capability->cap[P_FRAME_QP].value); - CAP_TO_8BIT_QP(capability->cap[B_FRAME_QP].value); } exit: @@ -1751,7 +1748,7 @@ int msm_vidc_adjust_hevc_max_qp(void *instance, struct v4l2_ctrl *ctrl) return rc; } -int msm_vidc_adjust_hevc_frame_qp(void *instance, struct v4l2_ctrl *ctrl) +int msm_vidc_adjust_hevc_i_frame_qp(void *instance, struct v4l2_ctrl *ctrl) { int rc = 0; struct msm_vidc_inst_capability *capability; @@ -1768,6 +1765,54 @@ int msm_vidc_adjust_hevc_frame_qp(void *instance, struct v4l2_ctrl *ctrl) ctrl->val, __func__); rc = msm_vidc_adjust_hevc_qp(inst, I_FRAME_QP); + if (rc) + return rc; + + return rc; +} + +int msm_vidc_adjust_hevc_p_frame_qp(void *instance, struct v4l2_ctrl *ctrl) +{ + int rc = 0; + struct msm_vidc_inst_capability *capability; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + if (ctrl) + msm_vidc_update_cap_value(inst, P_FRAME_QP, + ctrl->val, __func__); + + rc = msm_vidc_adjust_hevc_qp(inst, P_FRAME_QP); + if (rc) + return rc; + + return rc; +} + +int msm_vidc_adjust_hevc_b_frame_qp(void *instance, struct v4l2_ctrl *ctrl) +{ + int rc = 0; + struct msm_vidc_inst_capability *capability; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + if (ctrl) + msm_vidc_update_cap_value(inst, B_FRAME_QP, + ctrl->val, __func__); + + rc = msm_vidc_adjust_hevc_qp(inst, B_FRAME_QP); + if (rc) + return rc; return rc; } @@ -2578,10 +2623,19 @@ int msm_vidc_set_frame_qp(void *instance, } capab = inst->capabilities; - if (msm_vidc_get_parent_value(inst, I_FRAME_QP, + if (msm_vidc_get_parent_value(inst, cap_id, BITRATE_MODE, &rc_type, __func__)) return -EINVAL; + if (inst->vb2q[OUTPUT_PORT].streaming) { + if (rc_type != HFI_RC_OFF) { + i_vpr_h(inst, + "%s: dynamic qp not allowed for rc type %d\n", + __func__, rc_type); + return 0; + } + } + if (rc_type == HFI_RC_OFF) { /* Mandatorily set for rc off case */ i_qp_enable = p_qp_enable = b_qp_enable = 1; diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 66ee0fb224..38d275657e 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -1222,6 +1222,11 @@ bool msm_vidc_allow_s_ctrl(struct msm_vidc_inst *inst, u32 id) case V4L2_CID_HFLIP: case V4L2_CID_VFLIP: case V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP: + case V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP: + case V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP: + case V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP: + case V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP: + case V4L2_CID_MPEG_VIDEO_H264_B_FRAME_QP: case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER: case V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_LAYER: case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L0_BR: @@ -1255,7 +1260,7 @@ bool msm_vidc_allow_s_ctrl(struct msm_vidc_inst *inst, u32 id) exit: if (!allow) - i_vpr_e(inst, "%s: id %d not allowed in state %s\n", + i_vpr_e(inst, "%s: id %#x not allowed in state %s\n", __func__, id, state_name(inst->state)); return allow; } From 2fc3c64665598c07b2047287623d15098e566b7c Mon Sep 17 00:00:00 2001 From: Maheshwar Ajja Date: Fri, 18 Jun 2021 15:45:18 -0700 Subject: [PATCH 0354/1061] video: driver: remove noc error log registers reading Accessing vcodec subsystem registers without video core clock enabled will result in register access errors. Core clock might have been already disabled by video firmware as part of inter frame power collapse. So do not read vcodec noc error log registers from video driver. Change-Id: I19a32c377c661aa848fbd463ae59159cca4cfe04 Signed-off-by: Maheshwar Ajja --- driver/variant/iris2/src/msm_vidc_iris2.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/driver/variant/iris2/src/msm_vidc_iris2.c b/driver/variant/iris2/src/msm_vidc_iris2.c index a35e943298..4d076682c4 100644 --- a/driver/variant/iris2/src/msm_vidc_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_iris2.c @@ -862,7 +862,6 @@ static int __watchdog_iris2(struct msm_vidc_core *vidc_core, u32 intr_status) static int __noc_error_info_iris2(struct msm_vidc_core *vidc_core) { - u32 val = 0; struct msm_vidc_core *core = vidc_core; if (!core) { @@ -870,6 +869,14 @@ static int __noc_error_info_iris2(struct msm_vidc_core *vidc_core) return -EINVAL; } + /* + * we are not supposed to access vcodec subsystem registers + * unless vcodec core clock WRAPPER_CORE_CLOCK_CONFIG_IRIS2 is enabled. + * core clock might have been disabled by video firmware as part of + * inter frame power collapse (power plane control feature). + */ + + /* val = __read_register(core, VCODEC_NOC_ERL_MAIN_SWID_LOW); d_vpr_e("VCODEC_NOC_ERL_MAIN_SWID_LOW: %#x\n", val); val = __read_register(core, VCODEC_NOC_ERL_MAIN_SWID_HIGH); @@ -896,6 +903,7 @@ static int __noc_error_info_iris2(struct msm_vidc_core *vidc_core) d_vpr_e("VCODEC_NOC_ERL_MAIN_ERRLOG3_LOW: %#x\n", val); val = __read_register(core, VCODEC_NOC_ERL_MAIN_ERRLOG3_HIGH); d_vpr_e("VCODEC_NOC_ERL_MAIN_ERRLOG3_HIGH: %#x\n", val); + */ return 0; } From bf8e7db0e7dd9dde27e7c0089ba2f9c23f424aed Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Mon, 21 Jun 2021 16:07:05 -0700 Subject: [PATCH 0355/1061] video: driver: Enable Interlace for enc input buffer size calc Gralloc / Camera allocates encoder input buffers calculated assuming interlace enbalement. This causes driver and gralloc enc input buffer size mismatch. Modify driver for time being, as wrokaround to calulate enc input buffer size assuming interlace is enabled. Change-Id: I5f2726d46e301178d9f6bc505a27b37460aa8f41 Signed-off-by: Akshata Sahukar --- driver/vidc/src/msm_vidc_buffer.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/driver/vidc/src/msm_vidc_buffer.c b/driver/vidc/src/msm_vidc_buffer.c index c0881dd1cf..bd3e85653f 100644 --- a/driver/vidc/src/msm_vidc_buffer.c +++ b/driver/vidc/src/msm_vidc_buffer.c @@ -291,7 +291,7 @@ u32 msm_vidc_encoder_input_size(struct msm_vidc_inst *inst) f = &inst->fmts[INPUT_PORT]; size = VIDEO_RAW_BUFFER_SIZE(f->fmt.pix_mp.pixelformat, f->fmt.pix_mp.width, - f->fmt.pix_mp.height, false); + f->fmt.pix_mp.height, true); return size; } From 0a95a2915746027ec7b9300746248f95b84bde6b Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Tue, 22 Jun 2021 16:20:41 +0530 Subject: [PATCH 0356/1061] video: driver: increase output buffer count for HEIF decode Increase output buffer min count value from 1 -> 3 to avoid COMV buffer size calculation mismatch between driver and firmware. Change-Id: I9e5b011c8d1bb221dbc3c12797fc64831c0e1cec Signed-off-by: Govindaraj Rajagopal --- driver/vidc/src/msm_vidc_buffer.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/driver/vidc/src/msm_vidc_buffer.c b/driver/vidc/src/msm_vidc_buffer.c index c0881dd1cf..b9843df4d1 100644 --- a/driver/vidc/src/msm_vidc_buffer.c +++ b/driver/vidc/src/msm_vidc_buffer.c @@ -73,7 +73,7 @@ u32 msm_vidc_output_min_count(struct msm_vidc_inst *inst) output_min_count = 9; break; case MSM_VIDC_HEIC: - output_min_count = 1; + output_min_count = 3; break; default: output_min_count = 4; From 9e8a13389a1eb513e9d2ef954e038e6b6c602b62 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Tue, 22 Jun 2021 19:14:22 +0530 Subject: [PATCH 0357/1061] video: driver: add special handling for obsolete instances Currently inst struct is managed by core->instances list and it gets unlinked during system_error and inst close sequence. So if there a target reset situation under stability testing, it is difficult to catch inst handle in t32 debugging. So added such obsolete instances into core->dangling_instances, so that it willbe helpful in debugging, it gets removed before inst free. Change-Id: Ide9961f7c82e27406752afeb8a1f2ac86b9fa0ba Signed-off-by: Govindaraj Rajagopal --- driver/vidc/src/msm_vidc_driver.c | 34 ++++++++++++++++++++++++++++++- 1 file changed, 33 insertions(+), 1 deletion(-) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 20d274913f..4dabe7dc43 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -3464,6 +3464,7 @@ int msm_vidc_remove_session(struct msm_vidc_inst *inst) list_for_each_entry_safe(i, temp, &core->instances, list) { if (i->session_id == inst->session_id) { list_del_init(&i->list); + list_add_tail(&i->list, &core->dangling_instances); i_vpr_h(inst, "%s: removed session %#x\n", __func__, i->session_id); } @@ -3476,6 +3477,35 @@ int msm_vidc_remove_session(struct msm_vidc_inst *inst) return 0; } +static int msm_vidc_remove_dangling_session(struct msm_vidc_inst *inst) +{ + struct msm_vidc_inst *i, *temp; + struct msm_vidc_core *core; + u32 count = 0; + + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + core = inst->core; + + core_lock(core, __func__); + list_for_each_entry_safe(i, temp, &core->dangling_instances, list) { + if (i->session_id == inst->session_id) { + list_del_init(&i->list); + i_vpr_h(inst, "%s: removed dangling session %#x\n", + __func__, i->session_id); + break; + } + } + list_for_each_entry(i, &core->dangling_instances, list) + count++; + i_vpr_h(inst, "%s: remaining dangling sessions %d\n", __func__, count); + core_unlock(core, __func__); + + return 0; +} + int msm_vidc_session_open(struct msm_vidc_inst *inst) { int rc = 0; @@ -3975,6 +4005,7 @@ int msm_vidc_core_deinit_locked(struct msm_vidc_core *core, bool force) list_for_each_entry_safe(inst, dummy, &core->instances, list) { msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); list_del_init(&inst->list); + list_add_tail(&inst->list, &core->dangling_instances); } msm_vidc_change_core_state(core, MSM_VIDC_CORE_DEINIT, __func__); @@ -4608,9 +4639,10 @@ static void msm_vidc_close_helper(struct kref *kref) msm_venc_inst_deinit(inst); msm_vidc_free_input_cr_list(inst); msm_vidc_free_capabililty_list(inst, CHILD_LIST | FW_LIST); - kfree(inst->capabilities); if (inst->response_workq) destroy_workqueue(inst->response_workq); + msm_vidc_remove_dangling_session(inst); + kfree(inst->capabilities); kfree(inst); } From 0144963551a121f327f24444790f988e19b1888a Mon Sep 17 00:00:00 2001 From: Praveen Chavan Date: Tue, 22 Jun 2021 12:29:57 -0700 Subject: [PATCH 0358/1061] video: driver: compilation fixes for host-linux x86_64 Include errno.h explicitly and fix the order of includes Test: compile on Android for arm64 compile off-target on host-linux for x86_64 Change-Id: I77e2469f576369d4dcea672f40413ec21ff7f3f9 Signed-off-by: Praveen Chavan --- driver/vidc/inc/msm_vidc_debug.h | 1 + driver/vidc/src/msm_vidc.c | 2 +- driver/vidc/src/msm_vidc_dt.c | 2 +- 3 files changed, 3 insertions(+), 2 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_debug.h b/driver/vidc/inc/msm_vidc_debug.h index 5b3dcf5978..d20116d252 100644 --- a/driver/vidc/inc/msm_vidc_debug.h +++ b/driver/vidc/inc/msm_vidc_debug.h @@ -6,6 +6,7 @@ #ifndef __MSM_VIDC_DEBUG__ #define __MSM_VIDC_DEBUG__ +#include #include #include #include diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index fec47342b9..90d9c09680 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -5,7 +5,6 @@ #include #include -#include "msm_vidc.h" #include "msm_vidc_core.h" #include "msm_vidc_inst.h" #include "msm_vdec.h" @@ -19,6 +18,7 @@ #include "msm_vidc_power.h" #include "msm_vidc_memory.h" #include "venus_hfi_response.h" +#include "msm_vidc.h" #define MSM_VIDC_DRV_NAME "msm_vidc_driver" /* kernel/msm-4.19 */ diff --git a/driver/vidc/src/msm_vidc_dt.c b/driver/vidc/src/msm_vidc_dt.c index 282b90d2de..fe615a44d8 100644 --- a/driver/vidc/src/msm_vidc_dt.c +++ b/driver/vidc/src/msm_vidc_dt.c @@ -8,10 +8,10 @@ #include #include +#include "msm_vidc_debug.h" #include "msm_vidc_dt.h" #include "msm_vidc_internal.h" #include "msm_vidc_core.h" -#include "msm_vidc_debug.h" #include "msm_vidc_driver.h" static size_t get_u32_array_num_elements(struct device_node *np, From 6072a60cdc862ac8aa5d74d93760e73cea477dc6 Mon Sep 17 00:00:00 2001 From: Vikash Garodia Date: Tue, 8 Jun 2021 18:15:08 +0530 Subject: [PATCH 0359/1061] driver: video: Migrate from split binaries to single binary firmware Migrate from mdt way of loading split firmware binaries to single image file i.e mbn. With firmware memory carved out, there is no benefit of keeping firmware files as split. Loading is improved to 6ms with single image binary. MODULE_FIRMWARE can be introduced with single binary name to provide info of the firmware associated with video module. Change-Id: I7126705e4a32913166eb0671a8dc0d4db5ad8955 Signed-off-by: Vikash Garodia --- driver/vidc/src/venus_hfi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index c45a4a912f..a01be84d70 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -2493,7 +2493,7 @@ static int __load_fw_to_memory(struct platform_device *pdev, d_vpr_e("%s: Invalid fw name\n", __func__); return -EINVAL; } - scnprintf(firmware_name, ARRAY_SIZE(firmware_name), "%s.mdt", fw_name); + scnprintf(firmware_name, ARRAY_SIZE(firmware_name), "%s.mbn", fw_name); rc = of_property_read_u32(pdev->dev.of_node, "pas-id", &pas_id); if (rc) { From 542929c7af6fd987037000e6e1c59a31052817a0 Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Tue, 22 Jun 2021 16:49:27 +0530 Subject: [PATCH 0360/1061] video: driver: reject zero filledlen INPUT buffers Reject zero filledlen INPUT qbuf ioctls. Expecting non-zero filledlen. Change-Id: I662acc72430acf8e2474b6ea26a1f2d0cb1fb6ae Signed-off-by: Govindaraj Rajagopal --- driver/vidc/src/msm_vidc.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index 90d9c09680..93c5b4b9af 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -441,6 +441,13 @@ int msm_vidc_qbuf(void *instance, struct media_device *mdev, return -EINVAL; } + /* Expecting non-zero filledlen on INPUT port */ + if (b->type == INPUT_MPLANE && !b->m.planes[0].bytesused) { + i_vpr_e(inst, + "%s: zero bytesused input buffer not supported\n", __func__); + return -EINVAL; + } + q = msm_vidc_get_vb2q(inst, b->type, __func__); if (!q) { rc = -EINVAL; From 659ec598884bd736da031500d5d1c913f85d4de7 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Tue, 15 Jun 2021 18:23:15 +0530 Subject: [PATCH 0361/1061] video: driver: dump queues for system error Add support to dump all queues(cmd, msg, dbg) as part of handle_system_error using devcoredump framework. Change-Id: Ia1b011a29e6bc657eb002dbba09deab62dc0b2b2 Signed-off-by: Govindaraj Rajagopal --- driver/vidc/inc/msm_vidc_internal.h | 1 + driver/vidc/inc/venus_hfi_response.h | 1 + driver/vidc/src/venus_hfi.c | 13 +++++++++---- driver/vidc/src/venus_hfi_response.c | 24 ++++++++++++++++++------ 4 files changed, 29 insertions(+), 10 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index eddb52dfac..a0ebd13dd9 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -633,6 +633,7 @@ struct hfi_queue_header { #define ALIGNED_QUEUE_SIZE ALIGN(QUEUE_SIZE, SZ_4K) #define SHARED_QSIZE ALIGN(ALIGNED_SFR_SIZE + ALIGNED_QUEUE_SIZE + \ ALIGNED_QDSS_SIZE, SZ_1M) +#define TOTAL_QSIZE (SHARED_QSIZE - ALIGNED_SFR_SIZE - ALIGNED_QDSS_SIZE) struct buf_count { u32 etb; diff --git a/driver/vidc/inc/venus_hfi_response.h b/driver/vidc/inc/venus_hfi_response.h index f699022dfb..1a47d08e63 100644 --- a/driver/vidc/inc/venus_hfi_response.h +++ b/driver/vidc/inc/venus_hfi_response.h @@ -21,5 +21,6 @@ int handle_session_response_work(struct msm_vidc_inst *inst, struct response_work *work); int handle_system_error(struct msm_vidc_core *core, struct hfi_packet *pkt); +void fw_coredump(struct msm_vidc_core *core); #endif // __VENUS_HFI_RESPONSE_H__ diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index a01be84d70..70ceeeca4a 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -2356,16 +2356,14 @@ static int __interface_queues_init(struct msm_vidc_core *core) struct msm_vidc_alloc alloc; struct msm_vidc_map map; int offset = 0; - u32 q_size; u32 i; d_vpr_h("%s()\n", __func__); - q_size = SHARED_QSIZE - ALIGNED_SFR_SIZE - ALIGNED_QDSS_SIZE; memset(&alloc, 0, sizeof(alloc)); alloc.type = MSM_VIDC_BUF_QUEUE; alloc.region = MSM_VIDC_NON_SECURE; - alloc.size = q_size; + alloc.size = TOTAL_QSIZE; alloc.secure = false; alloc.map_kernel = true; rc = msm_vidc_memory_alloc(core, &alloc); @@ -2879,8 +2877,15 @@ int venus_hfi_core_deinit(struct msm_vidc_core *core) __resume(core); __flush_debug_queue(core, core->packet, core->packet_size); __disable_subcaches(core); - __interface_queues_deinit(core); __unload_fw(core); + /** + * coredump need to be called after firmware unload, coredump also + * copying queues memory. So need to be called before queues deinit. + */ + if (msm_vidc_fw_dump) + fw_coredump(core); + __interface_queues_deinit(core); + return 0; } diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index bdd6b3453b..1af365d46b 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -375,15 +375,23 @@ static int handle_session_error(struct msm_vidc_inst *inst, return rc; } -static void fw_coredump(struct platform_device *pdev) +void fw_coredump(struct msm_vidc_core *core) { int rc = 0; + struct platform_device *pdev; struct device_node *node = NULL; struct resource res = {0}; phys_addr_t mem_phys = 0; size_t res_size = 0; void *mem_va = NULL; - void *data = NULL; + char *data = NULL; + u64 total_size; + + if (!core) { + d_vpr_e("%s: invalid params\n", __func__); + return; + } + pdev = core->pdev; node = of_parse_phandle(pdev->dev.of_node, "memory-region", 0); if (!node) { @@ -407,16 +415,22 @@ static void fw_coredump(struct platform_device *pdev) d_vpr_e("%s: unable to remap firmware memory\n", __func__); return; } + total_size = res_size + TOTAL_QSIZE; - data = vmalloc(res_size); + data = vmalloc(total_size); if (!data) { memunmap(mem_va); return; } + /* copy firmware dump */ memcpy(data, mem_va, res_size); memunmap(mem_va); - dev_coredumpv(&pdev->dev, data, res_size, GFP_KERNEL); + + /* copy queues(cmd, msg, dbg) dump(along with headers) */ + memcpy(data + res_size, (char *)core->iface_q_table.align_virtual_addr, TOTAL_QSIZE); + + dev_coredumpv(&pdev->dev, data, total_size, GFP_KERNEL); } int handle_system_error(struct msm_vidc_core *core, @@ -427,8 +441,6 @@ int handle_system_error(struct msm_vidc_core *core, print_sfr_message(core); venus_hfi_noc_error_info(core); msm_vidc_core_deinit(core, true); - if (msm_vidc_fw_dump) - fw_coredump(core->pdev); return 0; } From 7f0c2442c54d8011af532a7e8986bc7b48b75eb6 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Fri, 18 Jun 2021 22:15:42 +0530 Subject: [PATCH 0362/1061] video: driver: track dma buffer leak Track dmabuf refcount during dma_buf_get() and dma_buf_put(). So if any dmabuf present with non-zero refcount during close, then i.e a dmabuf leak. So during session close print error and call dma_buf_put_refcount_completely() api to recursively reduce the count to zero and will call dma_buf_put() to avoid dmabuf leak from video driver side. Change-Id: I2028c18ca067977eac3cdf0ce7d6cc4200739408 Signed-off-by: Govindaraj Rajagopal --- driver/vidc/inc/msm_vidc_inst.h | 1 + driver/vidc/inc/msm_vidc_memory.h | 15 ++++- driver/vidc/src/msm_vidc.c | 1 + driver/vidc/src/msm_vidc_driver.c | 23 ++++--- driver/vidc/src/msm_vidc_memory.c | 103 ++++++++++++++++++++++++++++-- 5 files changed, 126 insertions(+), 17 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_inst.h b/driver/vidc/inc/msm_vidc_inst.h index bc21633cad..acb4dc3825 100644 --- a/driver/vidc/inc/msm_vidc_inst.h +++ b/driver/vidc/inc/msm_vidc_inst.h @@ -131,6 +131,7 @@ struct msm_vidc_inst { struct workqueue_struct *response_workq; struct list_head response_works; /* list of struct response_work */ struct list_head enc_input_crs; + struct list_head dmabuf_tracker; /* list of struct msm_memory_dmabuf */ bool once_per_session_set; bool ipsc_properties_set; bool opsc_properties_set; diff --git a/driver/vidc/inc/msm_vidc_memory.h b/driver/vidc/inc/msm_vidc_memory.h index 04eef96d56..3bfc4e934b 100644 --- a/driver/vidc/inc/msm_vidc_memory.h +++ b/driver/vidc/inc/msm_vidc_memory.h @@ -11,11 +11,18 @@ struct msm_vidc_core; struct msm_vidc_inst; +struct msm_memory_dmabuf { + struct list_head list; + struct dma_buf *dmabuf; + u32 refcount; +}; + enum msm_memory_pool_type { MSM_MEM_POOL_BUFFER = 0, MSM_MEM_POOL_MAP, MSM_MEM_POOL_ALLOC, MSM_MEM_POOL_TIMESTAMP, + MSM_MEM_POOL_DMABUF, MSM_MEM_POOL_MAX, }; @@ -40,8 +47,12 @@ int msm_vidc_memory_map(struct msm_vidc_core *core, struct msm_vidc_map *map); int msm_vidc_memory_unmap(struct msm_vidc_core *core, struct msm_vidc_map *map); -struct dma_buf *msm_vidc_memory_get_dmabuf(int fd); -void msm_vidc_memory_put_dmabuf(void *dmabuf); +struct dma_buf *msm_vidc_memory_get_dmabuf(struct msm_vidc_inst *inst, + int fd); +void msm_vidc_memory_put_dmabuf(struct msm_vidc_inst *inst, + struct dma_buf *dmabuf); +void msm_vidc_memory_put_dmabuf_completely(struct msm_vidc_inst *inst, + struct msm_memory_dmabuf *buf); int msm_memory_pools_init(struct msm_vidc_inst *inst); void msm_memory_pools_deinit(struct msm_vidc_inst *inst); void *msm_memory_alloc(struct msm_vidc_inst *inst, diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index 93c5b4b9af..5f332bb29d 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -841,6 +841,7 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) INIT_LIST_HEAD(&inst->children.list); INIT_LIST_HEAD(&inst->firmware.list); INIT_LIST_HEAD(&inst->enc_input_crs); + INIT_LIST_HEAD(&inst->dmabuf_tracker); for (i = 0; i < MAX_SIGNAL; i++) init_completion(&inst->completions[i]); diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 4dabe7dc43..98dd909f3b 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -2008,7 +2008,7 @@ int msm_vidc_memory_unmap_completely(struct msm_vidc_inst *inst, if (rc) break; if (!map->refcount) { - msm_vidc_memory_put_dmabuf(map->dmabuf); + msm_vidc_memory_put_dmabuf(inst, map->dmabuf); list_del(&map->list); msm_memory_free(inst, MSM_MEM_POOL_MAP, map); break; @@ -2266,7 +2266,7 @@ int msm_vidc_put_delayed_unmap(struct msm_vidc_inst *inst, struct msm_vidc_map * i_vpr_e(inst, "%s: unmap failed\n", __func__); if (!map->refcount) { - msm_vidc_memory_put_dmabuf(map->dmabuf); + msm_vidc_memory_put_dmabuf(inst, map->dmabuf); list_del(&map->list); msm_memory_free(inst, MSM_MEM_POOL_MAP, map); } @@ -2334,7 +2334,7 @@ int msm_vidc_unmap_driver_buf(struct msm_vidc_inst *inst, /* finally delete if refcount is zero */ if (!map->refcount) { - msm_vidc_memory_put_dmabuf(map->dmabuf); + msm_vidc_memory_put_dmabuf(inst, map->dmabuf); list_del(&map->list); msm_memory_free(inst, MSM_MEM_POOL_MAP, map); } @@ -2378,7 +2378,7 @@ int msm_vidc_map_driver_buf(struct msm_vidc_inst *inst, } INIT_LIST_HEAD(&map->list); map->type = buf->type; - map->dmabuf = msm_vidc_memory_get_dmabuf(buf->fd); + map->dmabuf = msm_vidc_memory_get_dmabuf(inst, buf->fd); if (!map->dmabuf) return -EINVAL; map->region = msm_vidc_get_buffer_region(inst, buf->type, __func__); @@ -2386,7 +2386,7 @@ int msm_vidc_map_driver_buf(struct msm_vidc_inst *inst, if (is_decode_session(inst) && is_output_buffer(buf->type)) { rc = msm_vidc_get_delayed_unmap(inst, map); if (rc) { - msm_vidc_memory_put_dmabuf(map->dmabuf); + msm_vidc_memory_put_dmabuf(inst, map->dmabuf); msm_memory_free(inst, MSM_MEM_POOL_MAP, map); return rc; } @@ -2414,7 +2414,7 @@ int msm_vidc_put_driver_buf(struct msm_vidc_inst *inst, msm_vidc_unmap_driver_buf(inst, buf); - msm_vidc_memory_put_dmabuf(buf->dmabuf); + msm_vidc_memory_put_dmabuf(inst, buf->dmabuf); /* delete the buffer from buffers->list */ list_del(&buf->list); @@ -2456,7 +2456,7 @@ struct msm_vidc_buffer *msm_vidc_get_driver_buf(struct msm_vidc_inst *inst, if (rc) goto error; - buf->dmabuf = msm_vidc_memory_get_dmabuf(buf->fd); + buf->dmabuf = msm_vidc_memory_get_dmabuf(inst, buf->fd); if (!buf->dmabuf) goto error; @@ -2470,7 +2470,7 @@ struct msm_vidc_buffer *msm_vidc_get_driver_buf(struct msm_vidc_inst *inst, return buf; error: - msm_vidc_memory_put_dmabuf(buf->dmabuf); + msm_vidc_memory_put_dmabuf(inst, buf->dmabuf); list_del(&buf->list); msm_memory_free(inst, MSM_MEM_POOL_BUFFER, buf); return NULL; @@ -4545,6 +4545,7 @@ void msm_vidc_destroy_buffers(struct msm_vidc_inst *inst) struct msm_vidc_buffers *buffers; struct msm_vidc_buffer *buf, *dummy; struct msm_vidc_timestamp *ts, *dummy_ts; + struct msm_memory_dmabuf *dbuf, *dummy_dbuf; struct response_work *work, *dummy_work = NULL; static const enum msm_vidc_buffer_type ext_buf_types[] = { MSM_VIDC_BUF_INPUT, @@ -4614,6 +4615,12 @@ void msm_vidc_destroy_buffers(struct msm_vidc_inst *inst) msm_memory_free(inst, MSM_MEM_POOL_TIMESTAMP, ts); } + list_for_each_entry_safe(dbuf, dummy_dbuf, &inst->dmabuf_tracker, list) { + i_vpr_e(inst, "%s: removing dma_buf %#x, refcount %u\n", + __func__, dbuf->dmabuf, dbuf->refcount); + msm_vidc_memory_put_dmabuf_completely(inst, dbuf); + } + list_for_each_entry_safe(work, dummy_work, &inst->response_works, list) { list_del(&work->list); kfree(work->data); diff --git a/driver/vidc/src/msm_vidc_memory.c b/driver/vidc/src/msm_vidc_memory.c index bf18aba39b..17f3a558c3 100644 --- a/driver/vidc/src/msm_vidc_memory.c +++ b/driver/vidc/src/msm_vidc_memory.c @@ -60,28 +60,116 @@ exit: return NULL; } -struct dma_buf *msm_vidc_memory_get_dmabuf(int fd) +struct dma_buf *msm_vidc_memory_get_dmabuf(struct msm_vidc_inst *inst, int fd) { - struct dma_buf *dmabuf; + struct msm_memory_dmabuf *buf = NULL; + struct dma_buf *dmabuf = NULL; + bool found = false; + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return NULL; + } + + /* get local dmabuf ref for tracking */ dmabuf = dma_buf_get(fd); if (IS_ERR_OR_NULL(dmabuf)) { d_vpr_e("Failed to get dmabuf for %d, error %ld\n", fd, PTR_ERR(dmabuf)); - dmabuf = NULL; + return NULL; } + /* track dmabuf - inc refcount if already present */ + list_for_each_entry(buf, &inst->dmabuf_tracker, list) { + if (buf->dmabuf == dmabuf) { + buf->refcount++; + found = true; + break; + } + } + if (found) { + /* put local dmabuf ref */ + dma_buf_put(dmabuf); + return dmabuf; + } + + /* get tracker instance from pool */ + buf = msm_memory_alloc(inst, MSM_MEM_POOL_DMABUF); + if (!buf) { + i_vpr_e(inst, "%s: dmabuf alloc failed\n", __func__); + dma_buf_put(dmabuf); + return NULL; + } + /* hold dmabuf strong ref in tracker */ + buf->dmabuf = dmabuf; + buf->refcount = 1; + INIT_LIST_HEAD(&buf->list); + + /* add new dmabuf entry to tracker */ + list_add_tail(&buf->list, &inst->dmabuf_tracker); + return dmabuf; } -void msm_vidc_memory_put_dmabuf(void *dmabuf) +void msm_vidc_memory_put_dmabuf(struct msm_vidc_inst *inst, struct dma_buf *dmabuf) { - if (!dmabuf) { - d_vpr_e("%s: NULL dmabuf\n", __func__); + struct msm_memory_dmabuf *buf = NULL; + bool found = false; + + if (!inst || !dmabuf) { + d_vpr_e("%s: invalid params\n", __func__); return; } - dma_buf_put((struct dma_buf *)dmabuf); + /* track dmabuf - dec refcount if already present */ + list_for_each_entry(buf, &inst->dmabuf_tracker, list) { + if (buf->dmabuf == dmabuf) { + buf->refcount--; + found = true; + break; + } + } + if (!found) { + i_vpr_e(inst, "%s: invalid dmabuf %#x\n", __func__, dmabuf); + return; + } + + /* non-zero refcount - do nothing */ + if (buf->refcount) + return; + + /* remove dmabuf entry from tracker */ + list_del(&buf->list); + + /* release dmabuf strong ref from tracker */ + dma_buf_put(buf->dmabuf); + + /* put tracker instance back to pool */ + msm_memory_free(inst, MSM_MEM_POOL_DMABUF, buf); +} + +void msm_vidc_memory_put_dmabuf_completely(struct msm_vidc_inst *inst, + struct msm_memory_dmabuf *buf) +{ + if (!inst || !buf) { + d_vpr_e("%s: invalid params\n", __func__); + return; + } + + while (buf->refcount) { + buf->refcount--; + if (!buf->refcount) { + /* remove dmabuf entry from tracker */ + list_del(&buf->list); + + /* release dmabuf strong ref from tracker */ + dma_buf_put(buf->dmabuf); + + /* put tracker instance back to pool */ + msm_memory_free(inst, MSM_MEM_POOL_DMABUF, buf); + break; + } + } } int msm_vidc_memory_map(struct msm_vidc_core *core, struct msm_vidc_map *map) @@ -446,6 +534,7 @@ static struct msm_vidc_type_size_name buftype_size_name_arr[] = { {MSM_MEM_POOL_MAP, sizeof(struct msm_vidc_map), "MSM_MEM_POOL_MAP" }, {MSM_MEM_POOL_ALLOC, sizeof(struct msm_vidc_alloc), "MSM_MEM_POOL_ALLOC" }, {MSM_MEM_POOL_TIMESTAMP, sizeof(struct msm_vidc_timestamp), "MSM_MEM_POOL_TIMESTAMP" }, + {MSM_MEM_POOL_DMABUF, sizeof(struct msm_memory_dmabuf), "MSM_MEM_POOL_DMABUF" }, }; int msm_memory_pools_init(struct msm_vidc_inst *inst) From 1d8d7ac788edcb02dce187fef516a2bdf0af5e76 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Thu, 24 Jun 2021 18:19:14 +0530 Subject: [PATCH 0363/1061] video: driver: optimize buffer pool design Added change to avoid unnecessary list iteration during msm_memory_free also added logic to catch double free request. Change-Id: Ie3fb8019fd039e95ea75ba8f3fbd266af515e5cd Signed-off-by: Govindaraj Rajagopal --- driver/vidc/inc/msm_vidc_memory.h | 6 ++-- driver/vidc/src/msm_vdec.c | 2 +- driver/vidc/src/msm_vidc_driver.c | 30 ++++++++++---------- driver/vidc/src/msm_vidc_memory.c | 42 +++++++++++++++++----------- driver/vidc/src/venus_hfi_response.c | 2 +- 5 files changed, 46 insertions(+), 36 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_memory.h b/driver/vidc/inc/msm_vidc_memory.h index 3bfc4e934b..733f73b158 100644 --- a/driver/vidc/inc/msm_vidc_memory.h +++ b/driver/vidc/inc/msm_vidc_memory.h @@ -28,11 +28,12 @@ enum msm_memory_pool_type { struct msm_memory_alloc_header { struct list_head list; + u32 type; + bool busy; void *buf; }; struct msm_memory_pool { - u32 type; u32 size; char *name; struct list_head free_pool; /* list of struct msm_memory_alloc_header */ @@ -57,7 +58,6 @@ int msm_memory_pools_init(struct msm_vidc_inst *inst); void msm_memory_pools_deinit(struct msm_vidc_inst *inst); void *msm_memory_alloc(struct msm_vidc_inst *inst, enum msm_memory_pool_type type); -void msm_memory_free(struct msm_vidc_inst *inst, - enum msm_memory_pool_type type, void *vidc_buf); +void msm_memory_free(struct msm_vidc_inst *inst, void *vidc_buf); #endif // _MSM_VIDC_MEMORY_H_ \ No newline at end of file diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index e453b2e4be..65d36540a5 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -1848,7 +1848,7 @@ int msm_vdec_handle_release_buffer(struct msm_vidc_inst *inst, print_vidc_buffer(VIDC_LOW, "low ", "release done", inst, buf); /* delete the buffer from release list */ list_del(&buf->list); - msm_memory_free(inst, MSM_MEM_POOL_BUFFER, buf); + msm_memory_free(inst, buf); return rc; } diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 98dd909f3b..738b551ced 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -1983,7 +1983,7 @@ int msm_vidc_process_readonly_buffers(struct msm_vidc_inst *inst, buf->attr |= MSM_VIDC_ATTR_READ_ONLY; print_vidc_buffer(VIDC_LOW, "low ", "ro buf removed", inst, ro_buf); list_del(&ro_buf->list); - msm_memory_free(inst, MSM_MEM_POOL_BUFFER, ro_buf); + msm_memory_free(inst, ro_buf); break; } } @@ -2010,7 +2010,7 @@ int msm_vidc_memory_unmap_completely(struct msm_vidc_inst *inst, if (!map->refcount) { msm_vidc_memory_put_dmabuf(inst, map->dmabuf); list_del(&map->list); - msm_memory_free(inst, MSM_MEM_POOL_MAP, map); + msm_memory_free(inst, map); break; } } @@ -2175,7 +2175,7 @@ int msm_vidc_flush_ts(struct msm_vidc_inst *inst) i_vpr_l(inst, "%s: flushing ts: val %lld, rank %%lld\n", __func__, ts->sort.val, ts->rank); list_del(&ts->sort.list); - msm_memory_free(inst, MSM_MEM_POOL_TIMESTAMP, ts); + msm_memory_free(inst, ts); } inst->timestamps.count = 0; inst->timestamps.rank = 0; @@ -2222,7 +2222,7 @@ int msm_vidc_update_timestamp(struct msm_vidc_inst *inst, u64 timestamp) } inst->timestamps.count--; list_del(&ts->sort.list); - msm_memory_free(inst, MSM_MEM_POOL_TIMESTAMP, ts); + msm_memory_free(inst, ts); } return 0; @@ -2268,7 +2268,7 @@ int msm_vidc_put_delayed_unmap(struct msm_vidc_inst *inst, struct msm_vidc_map * if (!map->refcount) { msm_vidc_memory_put_dmabuf(inst, map->dmabuf); list_del(&map->list); - msm_memory_free(inst, MSM_MEM_POOL_MAP, map); + msm_memory_free(inst, map); } return rc; @@ -2336,7 +2336,7 @@ int msm_vidc_unmap_driver_buf(struct msm_vidc_inst *inst, if (!map->refcount) { msm_vidc_memory_put_dmabuf(inst, map->dmabuf); list_del(&map->list); - msm_memory_free(inst, MSM_MEM_POOL_MAP, map); + msm_memory_free(inst, map); } return rc; @@ -2387,7 +2387,7 @@ int msm_vidc_map_driver_buf(struct msm_vidc_inst *inst, rc = msm_vidc_get_delayed_unmap(inst, map); if (rc) { msm_vidc_memory_put_dmabuf(inst, map->dmabuf); - msm_memory_free(inst, MSM_MEM_POOL_MAP, map); + msm_memory_free(inst, map); return rc; } } @@ -2418,7 +2418,7 @@ int msm_vidc_put_driver_buf(struct msm_vidc_inst *inst, /* delete the buffer from buffers->list */ list_del(&buf->list); - msm_memory_free(inst, MSM_MEM_POOL_BUFFER, buf); + msm_memory_free(inst, buf); return rc; } @@ -2472,7 +2472,7 @@ struct msm_vidc_buffer *msm_vidc_get_driver_buf(struct msm_vidc_inst *inst, error: msm_vidc_memory_put_dmabuf(inst, buf->dmabuf); list_del(&buf->list); - msm_memory_free(inst, MSM_MEM_POOL_BUFFER, buf); + msm_memory_free(inst, buf); return NULL; } @@ -2915,7 +2915,7 @@ int msm_vidc_destroy_internal_buffer(struct msm_vidc_inst *inst, if (map->dmabuf == buffer->dmabuf) { msm_vidc_memory_unmap(inst->core, map); list_del(&map->list); - msm_memory_free(inst, MSM_MEM_POOL_MAP, map); + msm_memory_free(inst, map); break; } } @@ -2924,7 +2924,7 @@ int msm_vidc_destroy_internal_buffer(struct msm_vidc_inst *inst, if (alloc->dmabuf == buffer->dmabuf) { msm_vidc_memory_free(inst->core, alloc); list_del(&alloc->list); - msm_memory_free(inst, MSM_MEM_POOL_ALLOC, alloc); + msm_memory_free(inst, alloc); break; } } @@ -2932,7 +2932,7 @@ int msm_vidc_destroy_internal_buffer(struct msm_vidc_inst *inst, list_for_each_entry_safe(buf, dummy, &buffers->list, list) { if (buf->dmabuf == buffer->dmabuf) { list_del(&buf->list); - msm_memory_free(inst, MSM_MEM_POOL_BUFFER, buf); + msm_memory_free(inst, buf); break; } } @@ -4599,20 +4599,20 @@ void msm_vidc_destroy_buffers(struct msm_vidc_inst *inst) list_for_each_entry_safe(buf, dummy, &inst->buffers.read_only.list, list) { print_vidc_buffer(VIDC_ERR, "err ", "destroying ro buffer", inst, buf); list_del(&buf->list); - msm_memory_free(inst, MSM_MEM_POOL_BUFFER, buf); + msm_memory_free(inst, buf); } list_for_each_entry_safe(buf, dummy, &inst->buffers.release.list, list) { print_vidc_buffer(VIDC_ERR, "err ", "destroying release buffer", inst, buf); list_del(&buf->list); - msm_memory_free(inst, MSM_MEM_POOL_BUFFER, buf); + msm_memory_free(inst, buf); } list_for_each_entry_safe(ts, dummy_ts, &inst->timestamps.list, sort.list) { i_vpr_e(inst, "%s: removing ts: val %lld, rank %lld\n", __func__, ts->sort.val, ts->rank); list_del(&ts->sort.list); - msm_memory_free(inst, MSM_MEM_POOL_TIMESTAMP, ts); + msm_memory_free(inst, ts); } list_for_each_entry_safe(dbuf, dummy_dbuf, &inst->dmabuf_tracker, list) { diff --git a/driver/vidc/src/msm_vidc_memory.c b/driver/vidc/src/msm_vidc_memory.c index 17f3a558c3..ff2d1fc431 100644 --- a/driver/vidc/src/msm_vidc_memory.c +++ b/driver/vidc/src/msm_vidc_memory.c @@ -145,7 +145,7 @@ void msm_vidc_memory_put_dmabuf(struct msm_vidc_inst *inst, struct dma_buf *dmab dma_buf_put(buf->dmabuf); /* put tracker instance back to pool */ - msm_memory_free(inst, MSM_MEM_POOL_DMABUF, buf); + msm_memory_free(inst, buf); } void msm_vidc_memory_put_dmabuf_completely(struct msm_vidc_inst *inst, @@ -166,7 +166,7 @@ void msm_vidc_memory_put_dmabuf_completely(struct msm_vidc_inst *inst, dma_buf_put(buf->dmabuf); /* put tracker instance back to pool */ - msm_memory_free(inst, MSM_MEM_POOL_DMABUF, buf); + msm_memory_free(inst, buf); break; } } @@ -426,6 +426,9 @@ void *msm_memory_alloc(struct msm_vidc_inst *inst, enum msm_memory_pool_type typ /* add to busy pool */ list_add_tail(&hdr->list, &pool->busy_pool); + /* set busy flag to true. This is to catch double free request */ + hdr->busy = true; + return hdr->buf; } @@ -435,37 +438,46 @@ void *msm_memory_alloc(struct msm_vidc_inst *inst, enum msm_memory_pool_type typ return NULL; } INIT_LIST_HEAD(&hdr->list); + hdr->type = type; + hdr->busy = true; hdr->buf = (void *)(hdr + 1); list_add_tail(&hdr->list, &pool->busy_pool); return hdr->buf; } -void msm_memory_free(struct msm_vidc_inst *inst, enum msm_memory_pool_type type, - void *vidc_buf) +void msm_memory_free(struct msm_vidc_inst *inst, void *vidc_buf) { struct msm_memory_alloc_header *hdr; struct msm_memory_pool *pool; - bool found = false; - if (!inst || !vidc_buf || type < 0 || type >= MSM_MEM_POOL_MAX) { + if (!inst || !vidc_buf) { d_vpr_e("%s: Invalid params\n", __func__); return; } - pool = &inst->pool[type]; + hdr = (struct msm_memory_alloc_header *)vidc_buf - 1; /* sanitize buffer addr */ - list_for_each_entry(hdr, &pool->busy_pool, list) { - if (hdr->buf == vidc_buf) { - found = true; - break; - } - } - if (!found) { + if (hdr->buf != vidc_buf) { i_vpr_e(inst, "%s: invalid buf addr %#x\n", __func__, vidc_buf); return; } + /* sanitize pool type */ + if (hdr->type < 0 || hdr->type >= MSM_MEM_POOL_MAX) { + i_vpr_e(inst, "%s: invalid pool type %#x\n", __func__, hdr->type); + return; + } + pool = &inst->pool[hdr->type]; + + /* catch double-free request */ + if (!hdr->busy) { + i_vpr_e(inst, "%s: double free request. type %s, addr %#x\n", __func__, + pool->name, vidc_buf); + return; + } + hdr->busy = false; + /* remove from busy pool */ list_del_init(&hdr->list); @@ -558,8 +570,6 @@ int msm_memory_pools_init(struct msm_vidc_inst *inst) i, buftype_size_name_arr[i].type); return -EINVAL; } - - inst->pool[i].type = buftype_size_name_arr[i].type; inst->pool[i].size = buftype_size_name_arr[i].size; inst->pool[i].name = buftype_size_name_arr[i].name; INIT_LIST_HEAD(&inst->pool[i].free_pool); diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index 1af365d46b..45e45d396f 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -657,7 +657,7 @@ static int handle_non_read_only_buffer(struct msm_vidc_inst *inst, if (found) { print_vidc_buffer(VIDC_LOW, "low ", "ro buf deleted", inst, ro_buf); list_del(&ro_buf->list); - msm_memory_free(inst, MSM_MEM_POOL_BUFFER, ro_buf); + msm_memory_free(inst, ro_buf); } return 0; From 55795168af3125b335ee82d423e5d105d0eab501 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Fri, 25 Jun 2021 15:51:05 +0530 Subject: [PATCH 0364/1061] video: driver: force flush debug queue packets in error scenario During power_collapse & core_deinit sequence, always flush debug queue irrespective of firmware logmask, to get more info about failure. Change-Id: I4ef328d27a77eb0807df6dc33fe0b2b92bf1feda Signed-off-by: Govindaraj Rajagopal --- driver/vidc/inc/venus_hfi.h | 2 +- driver/vidc/src/msm_vidc_driver.c | 2 +- driver/vidc/src/venus_hfi.c | 6 +++--- 3 files changed, 5 insertions(+), 5 deletions(-) diff --git a/driver/vidc/inc/venus_hfi.h b/driver/vidc/inc/venus_hfi.h index 0e464bd97e..81532e7984 100644 --- a/driver/vidc/inc/venus_hfi.h +++ b/driver/vidc/inc/venus_hfi.h @@ -50,7 +50,7 @@ int venus_hfi_session_open(struct msm_vidc_inst *inst); int venus_hfi_session_set_codec(struct msm_vidc_inst *inst); int venus_hfi_session_set_secure_mode(struct msm_vidc_inst *inst); int venus_hfi_core_init(struct msm_vidc_core *core); -int venus_hfi_core_deinit(struct msm_vidc_core *core); +int venus_hfi_core_deinit(struct msm_vidc_core *core, bool force); int venus_hfi_noc_error_info(struct msm_vidc_core *core); int venus_hfi_suspend(struct msm_vidc_core *core); int venus_hfi_trigger_ssr(struct msm_vidc_core *core, u32 type, diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 98dd909f3b..ff817c966d 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -3999,7 +3999,7 @@ int msm_vidc_core_deinit_locked(struct msm_vidc_core *core, bool force) } } - venus_hfi_core_deinit(core); + venus_hfi_core_deinit(core, force); /* unlink all sessions from core, if any */ list_for_each_entry_safe(inst, dummy, &core->instances, list) { diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index 70ceeeca4a..ba733c2089 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -1212,7 +1212,7 @@ static int __power_collapse(struct msm_vidc_core *core, bool force) return -EINVAL; } - __flush_debug_queue(core, core->packet, core->packet_size); + __flush_debug_queue(core, (!force ? core->packet : NULL), core->packet_size); rc = call_venus_op(core, prepare_pc, core); if (rc) @@ -2859,7 +2859,7 @@ error: return rc; } -int venus_hfi_core_deinit(struct msm_vidc_core *core) +int venus_hfi_core_deinit(struct msm_vidc_core *core, bool force) { int rc = 0; @@ -2875,7 +2875,7 @@ int venus_hfi_core_deinit(struct msm_vidc_core *core) if (core->state == MSM_VIDC_CORE_DEINIT) return 0; __resume(core); - __flush_debug_queue(core, core->packet, core->packet_size); + __flush_debug_queue(core, (!force ? core->packet : NULL), core->packet_size); __disable_subcaches(core); __unload_fw(core); /** From 5cf62d3aa0f4b8d86ca8c7a4a11f91fdd34e422d Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Fri, 25 Jun 2021 19:31:37 +0530 Subject: [PATCH 0365/1061] video: driver: update buffer counts during codec change At the time of codec change, only properties related to that particular port gets updated. So other port is still referring default values from previous codec type, which is not correct. So added change to properly update buffer count during codec change. Change-Id: I320a0916cbf48f06448a959b07e13b74ebb0fd1c Signed-off-by: Govindaraj Rajagopal --- driver/vidc/src/msm_vdec.c | 8 ++++++++ driver/vidc/src/msm_venc.c | 8 ++++++++ 2 files changed, 16 insertions(+) diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index e453b2e4be..b1727c6443 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -107,6 +107,14 @@ static int msm_vdec_codec_change(struct msm_vidc_inst *inst, u32 v4l2_codec) if(rc) goto exit; + rc = msm_vidc_update_buffer_count(inst, INPUT_PORT); + if (rc) + return rc; + + rc = msm_vidc_update_buffer_count(inst, OUTPUT_PORT); + if (rc) + return rc; + exit: return rc; } diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index 01784ab76d..27083d9aa5 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -88,6 +88,14 @@ static int msm_venc_codec_change(struct msm_vidc_inst *inst, u32 v4l2_codec) if (rc) goto exit; + rc = msm_vidc_update_buffer_count(inst, INPUT_PORT); + if (rc) + return rc; + + rc = msm_vidc_update_buffer_count(inst, OUTPUT_PORT); + if (rc) + return rc; + exit: return rc; } From 728d12fac80f3013d2d9e7f9efdd356347dae5e3 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Mon, 28 Jun 2021 22:21:50 +0530 Subject: [PATCH 0366/1061] video: driver: do core_deinit for venus_hfi_core_init failure Currently core->state is not moved to deinit for venus_hfi_core_init failure, so it stays remains at init_wait state and rejecting all subsequent open requests. Since core->state is in init_wait, all subsequent requests goes for polling to move state to init, which will never happen and all session opens will fail always. Change-Id: Ia7e30bd8559be00022c68f907341fd0f7fdad422 Signed-off-by: Govindaraj Rajagopal --- driver/vidc/src/msm_vidc_driver.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 6d782f9608..2fd0e128d8 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -4108,7 +4108,6 @@ int msm_vidc_core_init(struct msm_vidc_core *core) core_lock(core, __func__); if (!rc) { d_vpr_e("%s: core init timed out\n", __func__); - msm_vidc_core_deinit_locked(core, true); rc = -ETIMEDOUT; } else { msm_vidc_change_core_state(core, MSM_VIDC_CORE_INIT, __func__); @@ -4117,6 +4116,8 @@ int msm_vidc_core_init(struct msm_vidc_core *core) } unlock: + if (rc) + msm_vidc_core_deinit_locked(core, true); core_unlock(core, __func__); return rc; } From c80c5b8bbb3644c057d70ae49dbdc3d43454fa5e Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Tue, 29 Jun 2021 13:51:26 -0700 Subject: [PATCH 0367/1061] video: driver: update cycle count requirement of B frames Decoder base cycle requirement of B frames has increased to 80. Also, updated cycle count requirement for Encoder HIER B usecase. Pulled from CL: 3302650. Change-Id: I0f56166b7261e161630feeb8793473491dacccd7 Signed-off-by: Darshana Patil --- driver/variant/iris2/src/msm_vidc_power_iris2.c | 10 +++++++--- driver/vidc/inc/msm_vidc_inst.h | 1 + driver/vidc/src/msm_vidc.c | 1 + driver/vidc/src/venus_hfi_response.c | 2 ++ 4 files changed, 11 insertions(+), 3 deletions(-) diff --git a/driver/variant/iris2/src/msm_vidc_power_iris2.c b/driver/variant/iris2/src/msm_vidc_power_iris2.c index acbaff0fef..cc3b04be88 100644 --- a/driver/variant/iris2/src/msm_vidc_power_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_power_iris2.c @@ -76,8 +76,11 @@ u64 msm_vidc_calc_freq_iris2(struct msm_vidc_inst *inst, u32 data_size) vpp_cycles = mbs_per_second * vpp_cycles_per_mb / inst->capabilities->cap[PIPE].value; - /* 1.25 factor for IBP GOP structure */ - if (inst->capabilities->cap[B_FRAME].value) + + /* Factor 1.25 for IbP and 1.375 for I1B2b1P GOP structure */ + if (inst->capabilities->cap[B_FRAME].value > 1) + vpp_cycles += (vpp_cycles / 4) + (vpp_cycles / 8); + else if (inst->capabilities->cap[B_FRAME].value) vpp_cycles += vpp_cycles / 4; /* 21 / 20 is minimum overhead factor */ vpp_cycles += max(div_u64(vpp_cycles, 20), fw_vpp_cycles); @@ -133,7 +136,8 @@ u64 msm_vidc_calc_freq_iris2(struct msm_vidc_inst *inst, u32 data_size) vpp_cycles += div_u64(vpp_cycles * 59, 1000); /* VSP */ - base_cycles = inst->capabilities->cap[MB_CYCLES_VSP].value; + base_cycles = inst->has_bframe ? + 80 : inst->capabilities->cap[MB_CYCLES_VSP].value; vsp_cycles = fps * data_size * 8; if (inst->codec == MSM_VIDC_VP9) { diff --git a/driver/vidc/inc/msm_vidc_inst.h b/driver/vidc/inc/msm_vidc_inst.h index acb4dc3825..e07c26ced8 100644 --- a/driver/vidc/inc/msm_vidc_inst.h +++ b/driver/vidc/inc/msm_vidc_inst.h @@ -149,5 +149,6 @@ struct msm_vidc_inst { u32 dpb_list_payload[MAX_DPB_LIST_ARRAY_SIZE]; u32 max_map_output_count; u32 auto_framerate; + bool has_bframe; }; #endif // _MSM_VIDC_INST_H_ diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index 5f332bb29d..b4785592c3 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -790,6 +790,7 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) inst->request = false; inst->ipsc_properties_set = false; inst->opsc_properties_set = false; + inst->has_bframe = false; inst->auto_framerate = DEFAULT_FPS << 16; kref_init(&inst->kref); mutex_init(&inst->lock); diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index 45e45d396f..2c04a3c60d 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -1336,6 +1336,8 @@ static int handle_session_property(struct msm_vidc_inst *inst, break; case HFI_PROP_PICTURE_TYPE: inst->hfi_frame_info.picture_type = payload_ptr[0]; + if (inst->hfi_frame_info.picture_type & HFI_PICTURE_B) + inst->has_bframe = true; break; case HFI_PROP_NO_OUTPUT: if (port != INPUT_PORT) { From 892f8c664747e65fedd47bc612ac1d1639f4d83e Mon Sep 17 00:00:00 2001 From: Priyanka Gujjula Date: Thu, 1 Jul 2021 09:10:45 +0530 Subject: [PATCH 0368/1061] msm: vidc: update iris2 clock calculation As per vperf sheet, VSP FW Overhead factor(1.05) needs to be applied to both entropy mode CABAC & CAVLC. Change-Id: I93dc00137e0633ac2a79862c58970ba43b515ad6 Signed-off-by: Govindaraj Rajagopal Signed-off-by: Priyanka Gujjula --- driver/variant/iris2/src/msm_vidc_power_iris2.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/driver/variant/iris2/src/msm_vidc_power_iris2.c b/driver/variant/iris2/src/msm_vidc_power_iris2.c index cc3b04be88..c3fd27c95f 100644 --- a/driver/variant/iris2/src/msm_vidc_power_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_power_iris2.c @@ -116,9 +116,9 @@ u64 msm_vidc_calc_freq_iris2(struct msm_vidc_inst *inst, u32 data_size) } else { base_cycles = 0; vsp_cycles = div_u64(vsp_cycles, 2); - /* VSP FW Overhead 1.05 */ - vsp_cycles = div_u64(vsp_cycles * 21, 20); } + /* VSP FW Overhead 1.05 */ + vsp_cycles = div_u64(vsp_cycles * 21, 20); if (inst->capabilities->cap[STAGE].value == MSM_VIDC_STAGE_1) vsp_cycles = vsp_cycles * 3; @@ -148,9 +148,9 @@ u64 msm_vidc_calc_freq_iris2(struct msm_vidc_inst *inst, u32 data_size) } else { base_cycles = 0; vsp_cycles = div_u64(vsp_cycles, 2); - /* VSP FW overhead 1.05 */ - vsp_cycles = div_u64(vsp_cycles * 21, 20); } + /* VSP FW overhead 1.05 */ + vsp_cycles = div_u64(vsp_cycles * 21, 20); if (inst->capabilities->cap[STAGE].value == MSM_VIDC_STAGE_1) vsp_cycles = vsp_cycles * 3; From d388f8b5cd41886b51a2825ae7a6b41b529717bf Mon Sep 17 00:00:00 2001 From: Priyanka Gujjula Date: Thu, 1 Jul 2021 09:17:13 +0530 Subject: [PATCH 0369/1061] msm: vidc: Increase vpp cycles for 960fps use case Increase vpp cycles to bump frequency to 366MHz for encoder 960fps use case. Change-Id: If0f9d0f084dfcefa9f8614ec6774588dec6b7007 Signed-off-by: Mihir Ganu Signed-off-by: Priyanka Gujjula --- driver/variant/iris2/src/msm_vidc_power_iris2.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/driver/variant/iris2/src/msm_vidc_power_iris2.c b/driver/variant/iris2/src/msm_vidc_power_iris2.c index c3fd27c95f..f6d38036f0 100644 --- a/driver/variant/iris2/src/msm_vidc_power_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_power_iris2.c @@ -95,6 +95,13 @@ u64 msm_vidc_calc_freq_iris2(struct msm_vidc_inst *inst, u32 data_size) if (fps == 480) vpp_cycles += div_u64(vpp_cycles * 2, 100); + /* + * Add 5 percent extra for 720p@960fps use case + * to bump it to next level (366MHz). + */ + if (fps == 960) + vpp_cycles += div_u64(vpp_cycles * 5, 100); + /* VSP */ /* bitrate is based on fps, scale it using operating rate */ operating_rate = inst->capabilities->cap[OPERATING_RATE].value >> 16; From a3eed1e747b79bf077e45d2462f5fa3bed21bffb Mon Sep 17 00:00:00 2001 From: Priyanka Gujjula Date: Thu, 1 Jul 2021 09:34:59 +0530 Subject: [PATCH 0370/1061] msm: vidc: fix BW overvote due to wrong worst_cf in fbd For worst complexity factor received in fbd, also need to divide it by frame_size, otherwise will cause bus BW overvote. Change-Id: Ibb20103c4ab8e3830eea8cf8a04b32f421b60362 Signed-off-by: Qiwei Liu Signed-off-by: Priyanka Gujjula --- driver/vidc/src/msm_vidc_power.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/driver/vidc/src/msm_vidc_power.c b/driver/vidc/src/msm_vidc_power.c index 4d84d36e0c..e6d7b95c69 100644 --- a/driver/vidc/src/msm_vidc_power.c +++ b/driver/vidc/src/msm_vidc_power.c @@ -84,13 +84,16 @@ static int fill_dynamic_stats(struct msm_vidc_inst *inst, u32 cf = MSM_VIDC_MAX_UBWC_COMPLEXITY_FACTOR; u32 cr = MSM_VIDC_MIN_UBWC_COMPRESSION_RATIO; u32 input_cr = MSM_VIDC_MIN_UBWC_COMPRESSION_RATIO; + u32 frame_size; if (inst->power.fw_cr) cr = inst->power.fw_cr; if (inst->power.fw_cf) { cf = inst->power.fw_cf; - cf = cf / ((msm_vidc_get_mbs_per_frame(inst)) / (32 * 8) * 3) / 2; + frame_size = (msm_vidc_get_mbs_per_frame(inst) / (32 * 8) * 3) / 2; + if (frame_size) + cf = cf / frame_size; } list_for_each_entry_safe(temp, next, &inst->enc_input_crs, list) From fc3bb7608f31945e3ff7f48aa2453247726c599e Mon Sep 17 00:00:00 2001 From: Dikshita Agarwal Date: Fri, 28 May 2021 16:33:55 +0530 Subject: [PATCH 0371/1061] video: driver: fill required fields in capability struct MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit - Bus_info in caps shouldn’t be empty and the name should have valid prefix. - Update MSM_VIDC_VERSION to ((5 << 16) + (10 << 8) + 0). Partially Fixes: v4l2-compliance: testCap (VIDIOC_QUERYCAP). Change-Id: I2405d1154fbb0e71f859a26169a09ed77ffa330e Signed-off-by: Dikshita Agarwal --- driver/vidc/src/msm_vidc.c | 12 ++++-------- 1 file changed, 4 insertions(+), 8 deletions(-) diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index b4785592c3..4ce1ae4b54 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -21,8 +21,10 @@ #include "msm_vidc.h" #define MSM_VIDC_DRV_NAME "msm_vidc_driver" +#define MSM_VIDC_BUS_NAME "platform:msm_vidc_bus" + /* kernel/msm-4.19 */ -#define MSM_VIDC_VERSION ((0 << 16) + (4 << 8) + 19) +#define MSM_VIDC_VERSION ((5 << 16) + (10 << 8) + 0) #define MAX_EVENTS 30 @@ -105,14 +107,8 @@ int msm_vidc_querycap(void *instance, struct v4l2_capability *cap) } strlcpy(cap->driver, MSM_VIDC_DRV_NAME, sizeof(cap->driver)); - cap->bus_info[0] = 0; + strlcpy(cap->bus_info, MSM_VIDC_BUS_NAME, sizeof(cap->bus_info)); cap->version = MSM_VIDC_VERSION; - cap->device_caps = V4L2_CAP_VIDEO_CAPTURE_MPLANE | - V4L2_CAP_VIDEO_OUTPUT_MPLANE | - V4L2_CAP_META_CAPTURE | - V4L2_CAP_META_OUTPUT | - V4L2_CAP_STREAMING; - cap->capabilities = cap->device_caps | V4L2_CAP_DEVICE_CAPS; memset(cap->reserved, 0, sizeof(cap->reserved)); From 9619e7336d6b51b716f6af86644ad657db36b93a Mon Sep 17 00:00:00 2001 From: Vikash Garodia Date: Thu, 1 Jul 2021 06:22:42 +0530 Subject: [PATCH 0372/1061] driver: retain real time priority even if rate is not set There are few apk which does not set the rate. As per the design, video sessions should run in non real time mode for such sessions. It is leading to high power as the resources are clocked to max in non realtime mode. Keeping the mode as real time for such sessions. Change-Id: I072b33038b1169788f37711ebf6cb069d0f07381 Signed-off-by: Vikash Garodia --- driver/vidc/src/msm_vidc_control.c | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index de343daf9c..4dda2b7a4b 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -2154,12 +2154,11 @@ int msm_vidc_adjust_session_priority(void *instance, struct v4l2_ctrl *ctrl) } /* - * For RT, check for resource feasability if rate is set by client. - * For RT, move to NRT, if rate is not set by client. + * For RT, check for resource feasability. * For NRT, sessions with rate set by client takes higher order * among NRT sessions. They are constraint RT or low priority RT. */ - if (adjusted_value == 0 && rate_by_client) { + if (adjusted_value == 0) { rc = msm_vidc_check_core_mbps(inst); if (rc) { i_vpr_e(inst, "%s: unsupported load\n", __func__); @@ -2183,9 +2182,6 @@ int msm_vidc_adjust_session_priority(void *instance, struct v4l2_ctrl *ctrl) } } - if (adjusted_value == 0 && !rate_by_client) - adjusted_value = 1; - msm_vidc_update_cap_value(inst, PRIORITY, adjusted_value, __func__); exit: From 3b67d6b2f94fecfd45936f546400a42d0ffb8ed4 Mon Sep 17 00:00:00 2001 From: Vikash Garodia Date: Thu, 1 Jul 2021 14:48:53 +0530 Subject: [PATCH 0373/1061] driver: video: Reset sequence change request property only during psc handling Sequence change property would configure firmware to generate psc at every key frame. This property is configured based on low latency settings from the client. For cases, when client sets low latency from 1 to 0, the hardware would continue to run in direct mode (low latency mode). Since the sequence change property gets disabled, there would not be psc from firmware to change the mode to 2 stage. Hence the sequence change property to be reset only during psc handling. Change-Id: Ie8e17e44c921f036763f6f390397d4d812120e23 Signed-off-by: Vikash Garodia --- driver/platform/waipio/src/msm_vidc_waipio.c | 4 +--- driver/vidc/inc/msm_vidc_control.h | 3 +-- driver/vidc/src/msm_vdec.c | 6 +++++- driver/vidc/src/msm_vidc_control.c | 13 ++++++++++--- 4 files changed, 17 insertions(+), 9 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index ddf870c667..72f0cf934f 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -504,9 +504,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDC_LOWLATENCY_REQUEST, HFI_PROP_SEQ_CHANGE_AT_SYNC_FRAME, - CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - NULL, msm_vidc_set_seq_change_at_sync_frame}, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, {LTR_COUNT, ENC, H264|HEVC, 0, 2, 1, 0, diff --git a/driver/vidc/inc/msm_vidc_control.h b/driver/vidc/inc/msm_vidc_control.h index dd35e7534d..336ca4b1e0 100644 --- a/driver/vidc/inc/msm_vidc_control.h +++ b/driver/vidc/inc/msm_vidc_control.h @@ -98,8 +98,7 @@ int msm_vidc_set_csc_custom_matrix(void *instance, enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_session_priority(void* instance, enum msm_vidc_inst_capability_type cap_id); -int msm_vidc_set_seq_change_at_sync_frame(void* instance, - enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_seq_change_at_sync_frame(void *instance); int msm_vidc_set_level(void *instance, enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_s32(void *instance, diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 630dde4aab..78f704367f 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -762,7 +762,7 @@ static int msm_vdec_set_output_properties(struct msm_vidc_inst *inst) if (rc) return rc; - rc = msm_vidc_set_seq_change_at_sync_frame(inst, LOWLATENCY_MODE); + rc = msm_vidc_set_seq_change_at_sync_frame(inst); if (rc) return rc; @@ -2044,6 +2044,10 @@ int msm_vdec_process_cmd(struct msm_vidc_inst *inst, u32 cmd) if (rc) return rc; + rc = msm_vidc_set_seq_change_at_sync_frame(inst); + if (rc) + return rc; + rc = venus_hfi_session_command(inst, HFI_CMD_RESUME, port, diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index de343daf9c..56e2a2e9d6 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -808,6 +808,14 @@ int msm_v4l2_op_s_ctrl(struct v4l2_ctrl *ctrl) goto exit; } + if (ctrl->id == V4L2_CID_MPEG_VIDC_LOWLATENCY_REQUEST) { + if (ctrl->val == V4L2_MPEG_MSM_VIDC_ENABLE) { + rc = msm_vidc_set_seq_change_at_sync_frame(inst); + if (rc) + return rc; + } + } + exit: if (rc) msm_vidc_free_capabililty_list(inst, CHILD_LIST | FW_LIST); @@ -3619,8 +3627,7 @@ int msm_vidc_set_pipe(void *instance, return rc; } -int msm_vidc_set_seq_change_at_sync_frame(void* instance, - enum msm_vidc_inst_capability_type cap_id) +int msm_vidc_set_seq_change_at_sync_frame(void *instance) { int rc = 0; u32 payload; @@ -3632,7 +3639,7 @@ int msm_vidc_set_seq_change_at_sync_frame(void* instance, } payload = inst->capabilities->cap[LOWLATENCY_MODE].value; - rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32, + rc = msm_vidc_packetize_control(inst, LOWLATENCY_MODE, HFI_PAYLOAD_U32, &payload, sizeof(u32), __func__); if (rc) return rc; From e186efc310caa9e3da8374edc53d57e5f22fa9c9 Mon Sep 17 00:00:00 2001 From: Priyanka Gujjula Date: Fri, 2 Jul 2021 11:20:06 +0530 Subject: [PATCH 0374/1061] msm: vidc: Force nominal for high bitrate decode usecases Force the clocks to NOM if bitrate nears or exceeds maximum supported for VP9 usecases. Change-Id: I917b0f6c624837403fd9f1499a68812acb00b568 Signed-off-by: Chinmay Sawarkar Signed-off-by: Priyanka Gujjula --- driver/variant/iris2/src/msm_vidc_power_iris2.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/driver/variant/iris2/src/msm_vidc_power_iris2.c b/driver/variant/iris2/src/msm_vidc_power_iris2.c index f6d38036f0..4db925eaf4 100644 --- a/driver/variant/iris2/src/msm_vidc_power_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_power_iris2.c @@ -16,7 +16,7 @@ u64 msm_vidc_calc_freq_iris2(struct msm_vidc_inst *inst, u32 data_size) struct msm_vidc_core* core; struct msm_vidc_power* power; u64 vsp_cycles = 0, vpp_cycles = 0, fw_cycles = 0; - u64 fw_vpp_cycles = 0; + u64 fw_vpp_cycles = 0, bitrate = 0; u32 vpp_cycles_per_mb; u32 mbs_per_second; u32 operating_rate, vsp_factor_num = 1, vsp_factor_den = 1; @@ -145,7 +145,8 @@ u64 msm_vidc_calc_freq_iris2(struct msm_vidc_inst *inst, u32 data_size) /* VSP */ base_cycles = inst->has_bframe ? 80 : inst->capabilities->cap[MB_CYCLES_VSP].value; - vsp_cycles = fps * data_size * 8; + bitrate = fps * data_size * 8; + vsp_cycles = bitrate; if (inst->codec == MSM_VIDC_VP9) { vsp_cycles = div_u64(vsp_cycles * 170, 100); @@ -164,6 +165,12 @@ u64 msm_vidc_calc_freq_iris2(struct msm_vidc_inst *inst, u32 data_size) vsp_cycles += mbs_per_second * base_cycles; + if (inst->codec == MSM_VIDC_VP9 && + inst->capabilities->cap[STAGE].value == + MSM_VIDC_STAGE_2 && + inst->capabilities->cap[PIPE].value == 4 && + bitrate > 90000000) + vsp_cycles = msm_vidc_max_freq(inst); } else { i_vpr_e(inst, "%s: Unknown session type\n", __func__); return msm_vidc_max_freq(inst); From 48dff0980dfa58c88e4124d87bc57a2853030c64 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Fri, 2 Jul 2021 20:59:34 +0530 Subject: [PATCH 0375/1061] driver: video: disable dynamic fps detection logic for image session Image session should run as fast as possible mode and dynamic framerate detection is not applicable for image session. So added change to disable that feature for image decode session. Change-Id: Ifcfeb24d1f70009ba48e9ade77bd765c1b0e8fd7 Signed-off-by: Govindaraj Rajagopal --- driver/variant/iris2/src/msm_vidc_iris2.c | 16 ++++++---------- driver/vidc/src/venus_hfi_response.c | 2 +- 2 files changed, 7 insertions(+), 11 deletions(-) diff --git a/driver/variant/iris2/src/msm_vidc_iris2.c b/driver/variant/iris2/src/msm_vidc_iris2.c index 4d076682c4..4e0a6e78ba 100644 --- a/driver/variant/iris2/src/msm_vidc_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_iris2.c @@ -471,8 +471,7 @@ static int __power_off_iris2_hardware(struct msm_vidc_core *core) } while (count < max_count); if (count == max_count) - d_vpr_e( - "%s: VCODEC_SS_IDLE_STATUSn (%d) is not idle (%#x)\n", + d_vpr_h("%s: VCODEC_SS_IDLE_STATUSn (%d) is not idle (%#x)\n", __func__, i, value); } @@ -490,8 +489,7 @@ static int __power_off_iris2_hardware(struct msm_vidc_core *core) count++; } while (count < max_count); if (count == max_count) - d_vpr_e("%s: AON_WRAPPER_MVP_NOC_RESET assert failed\n", - __func__); + d_vpr_h("%s: AON_WRAPPER_MVP_NOC_RESET assert failed\n", __func__); /* De-assert partial reset on MSF interface and wait for ACK */ rc = __write_register(core, AON_WRAPPER_MVP_NOC_RESET_REQ, 0x0); @@ -507,8 +505,7 @@ static int __power_off_iris2_hardware(struct msm_vidc_core *core) count++; } while (count < max_count); if (count == max_count) - d_vpr_e("%s: AON_WRAPPER_MVP_NOC_RESET de-assert failed\n", - __func__); + d_vpr_h("%s: AON_WRAPPER_MVP_NOC_RESET de-assert failed\n", __func__); /* * Reset both sides of 2 ahb2ahb_bridges (TZ and non-TZ) @@ -569,8 +566,7 @@ static int __power_off_iris2_controller(struct msm_vidc_core *core) count++; } while (count < max_count); if (count == max_count) - d_vpr_e("%s: AON_WRAPPER_MVP_NOC_LPI_CONTROL failed\n", - __func__); + d_vpr_h("%s: AON_WRAPPER_MVP_NOC_LPI_CONTROL failed\n", __func__); /* Set Debug bridge Low power */ rc = __write_register(core, WRAPPER_DEBUG_BRIDGE_LPI_CONTROL_IRIS2, 0x7); @@ -587,7 +583,7 @@ static int __power_off_iris2_controller(struct msm_vidc_core *core) count++; } while (count < max_count); if (count == max_count) - d_vpr_e("%s: debug bridge low power failed\n", __func__); + d_vpr_h("%s: debug bridge low power failed\n", __func__); /* Debug bridge LPI release */ rc = __write_register(core, WRAPPER_DEBUG_BRIDGE_LPI_CONTROL_IRIS2, 0x0); @@ -605,7 +601,7 @@ static int __power_off_iris2_controller(struct msm_vidc_core *core) count++; } while (count < max_count); if (count == max_count) - d_vpr_e("%s: debug bridge release failed\n", __func__); + d_vpr_h("%s: debug bridge release failed\n", __func__); /* power down process */ rc = __disable_regulator_iris2(core, "iris-ctl"); diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index 2c04a3c60d..209da2e31d 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -842,7 +842,7 @@ static int handle_output_buffer(struct msm_vidc_inst *inst, inst->power.fw_cr = inst->hfi_frame_info.cr; } - if (is_decode_session(inst) && buf->data_size) + if (!is_image_session(inst) && is_decode_session(inst) && buf->data_size) msm_vidc_update_timestamp(inst, buf->timestamp); print_vidc_buffer(VIDC_HIGH, "high", "dqbuf", inst, buf); From 167aebba8c6c76777fbdf817932658d85ba4a6de Mon Sep 17 00:00:00 2001 From: Dikshita Agarwal Date: Mon, 31 May 2021 16:57:57 +0530 Subject: [PATCH 0376/1061] video: driver:: handle NULL value of ctrl In case, when control id passed by client is 0, ctrl ref will be NULL. handle such NULL ctrl by returning -EINVAL from driver. Fix: v4l2-compliance: testSimpleControls: Invalid Control. Change-Id: Ie7dfe96775dd5fe71a4e467539dd261e4ba9efaf Signed-off-by: Dikshita Agarwal --- driver/vidc/src/msm_vidc.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index 4ce1ae4b54..4eb19d2dc4 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -379,7 +379,11 @@ int msm_vidc_g_ctrl(void *instance, struct v4l2_control *control) rc = msm_vidc_get_control(inst, ctrl); if (!rc) control->value = ctrl->val; + } else { + i_vpr_e(inst, "%s: invalid control\n", __func__); + return -EINVAL; } + if (rc) i_vpr_e(inst, "%s: failed for control id %#x\n", __func__, control->id); From d12888856260ebd7fed1b7c3f5dfc824c00e1ea4 Mon Sep 17 00:00:00 2001 From: Dikshita Agarwal Date: Wed, 2 Jun 2021 15:39:07 +0530 Subject: [PATCH 0377/1061] video: driver: retun error for VIDIOC_ENUM_FRAMEINTERVALS from decoder M2M devices don't support VIDIOC_ENUM_FRAMEINTERVALS, except for stateful encoders. Fixes: v4l2-compliance: testEnumFormats (VIDIOC_ENUM_FMT/FRAMESIZES/FRAMEINTERVALS). Change-Id: I94cf3b332f7474457d8b45427ca58c1cbfb1e73d Signed-off-by: Dikshita Agarwal --- driver/vidc/src/msm_vidc.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index 4eb19d2dc4..4208623431 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -652,6 +652,12 @@ int msm_vidc_enum_frameintervals(void *instance, struct v4l2_frmivalenum *fival) __func__, inst, fival); return -EINVAL; } + + if (is_decode_session(inst)) { + i_vpr_e(inst, "%s: not supported by decoder\n", __func__); + return -ENOTTY; + } + core = inst->core; if (!inst->capabilities || !core->capabilities) { From 9a47e9a4497a48fcd345846740f6ab94c759de59 Mon Sep 17 00:00:00 2001 From: Dikshita Agarwal Date: Thu, 3 Jun 2021 16:53:43 +0530 Subject: [PATCH 0378/1061] video: driver: update required fields of format struct The driver should update field variable of format structure with a value other than V4L2_FIELD_ANY. Update it with V4L2_FIELD_NONE. Fixes: v4l2-compliance: testGetFormats(VIDIOC_G_FMT). Change-Id: I2338c867b543b2964c0c6a84f76cfad6862a935f Signed-off-by: Dikshita Agarwal --- driver/vidc/src/msm_vdec.c | 2 ++ driver/vidc/src/msm_venc.c | 2 ++ 2 files changed, 4 insertions(+) diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 78f704367f..3d091df567 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -2532,6 +2532,7 @@ int msm_vdec_inst_init(struct msm_vidc_inst *inst) f->fmt.pix_mp.plane_fmt[0].bytesperline = 0; f->fmt.pix_mp.plane_fmt[0].sizeimage = call_session_op(core, buffer_size, inst, MSM_VIDC_BUF_INPUT); + f->fmt.pix_mp.field = V4L2_FIELD_NONE; inst->buffers.input.min_count = call_session_op(core, min_count, inst, MSM_VIDC_BUF_INPUT); inst->buffers.input.extra_count = call_session_op(core, @@ -2568,6 +2569,7 @@ int msm_vdec_inst_init(struct msm_vidc_inst *inst) DEFAULT_WIDTH); f->fmt.pix_mp.plane_fmt[0].sizeimage = call_session_op(core, buffer_size, inst, MSM_VIDC_BUF_OUTPUT); + f->fmt.pix_mp.field = V4L2_FIELD_NONE; f->fmt.pix_mp.colorspace = V4L2_COLORSPACE_DEFAULT; f->fmt.pix_mp.xfer_func = V4L2_XFER_FUNC_DEFAULT; f->fmt.pix_mp.ycbcr_enc = V4L2_YCBCR_ENC_DEFAULT; diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index 27083d9aa5..0e00050348 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -1753,6 +1753,7 @@ int msm_venc_inst_init(struct msm_vidc_inst *inst) f->fmt.pix_mp.plane_fmt[0].bytesperline = 0; f->fmt.pix_mp.plane_fmt[0].sizeimage = call_session_op(core, buffer_size, inst, MSM_VIDC_BUF_OUTPUT); + f->fmt.pix_mp.field = V4L2_FIELD_NONE; f->fmt.pix_mp.colorspace = V4L2_COLORSPACE_DEFAULT; f->fmt.pix_mp.xfer_func = V4L2_XFER_FUNC_DEFAULT; f->fmt.pix_mp.ycbcr_enc = V4L2_YCBCR_ENC_DEFAULT; @@ -1796,6 +1797,7 @@ int msm_venc_inst_init(struct msm_vidc_inst *inst) DEFAULT_WIDTH); f->fmt.pix_mp.plane_fmt[0].sizeimage = call_session_op(core, buffer_size, inst, MSM_VIDC_BUF_INPUT); + f->fmt.pix_mp.field = V4L2_FIELD_NONE; f->fmt.pix_mp.colorspace = V4L2_COLORSPACE_DEFAULT; f->fmt.pix_mp.xfer_func = V4L2_XFER_FUNC_DEFAULT; f->fmt.pix_mp.ycbcr_enc = V4L2_YCBCR_ENC_DEFAULT; From 7616a6bdad4f5bdf40752a975c37de1170096f20 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Wed, 7 Jul 2021 10:49:21 -0700 Subject: [PATCH 0379/1061] video: driver: ignore input/output port streamoff if already streamed off Ignore input port or output port streamoff if corresponding port is already streamed off. Change-Id: I708126b24758ee0f76bc2646527d1baee59e5178 Signed-off-by: Akshata Sahukar --- driver/vidc/inc/msm_vidc_driver.h | 3 +- driver/vidc/src/msm_vidc.c | 9 ++++- driver/vidc/src/msm_vidc_driver.c | 64 +++++++++++++++++++++++-------- 3 files changed, 58 insertions(+), 18 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 4ffba2d36f..92be3669f7 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -275,6 +275,7 @@ u32 v4l2_matrix_coeff_from_driver(struct msm_vidc_inst *inst, u32 vidc_matrix_coeff, const char *func); int v4l2_type_to_driver_port(struct msm_vidc_inst *inst, u32 type, const char *func); +const char *allow_name(enum msm_vidc_allow allow); const char *state_name(enum msm_vidc_inst_state state); int msm_vidc_change_inst_state(struct msm_vidc_inst *inst, enum msm_vidc_inst_state request_state, const char *func); @@ -375,7 +376,7 @@ bool msm_vidc_allow_reqbufs(struct msm_vidc_inst *inst, u32 type); enum msm_vidc_allow msm_vidc_allow_stop(struct msm_vidc_inst *inst); bool msm_vidc_allow_start(struct msm_vidc_inst *inst); bool msm_vidc_allow_streamon(struct msm_vidc_inst *inst, u32 type); -bool msm_vidc_allow_streamoff(struct msm_vidc_inst *inst, u32 type); +enum msm_vidc_allow msm_vidc_allow_streamoff(struct msm_vidc_inst *inst, u32 type); enum msm_vidc_allow msm_vidc_allow_qbuf(struct msm_vidc_inst *inst, u32 type); enum msm_vidc_allow msm_vidc_allow_input_psc(struct msm_vidc_inst *inst); bool msm_vidc_allow_last_flag(struct msm_vidc_inst *inst); diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index 4eb19d2dc4..206d405229 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -543,15 +543,22 @@ int msm_vidc_streamoff(void *instance, enum v4l2_buf_type type) int rc = 0; struct msm_vidc_inst *inst = instance; int port; + enum msm_vidc_allow allow; if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - if (!msm_vidc_allow_streamoff(inst, type)) { + allow = msm_vidc_allow_streamoff(inst, type); + if (allow == MSM_VIDC_DISALLOW) { rc = -EBUSY; goto exit; + } else if (allow == MSM_VIDC_IGNORE) { + goto exit; + } else if (allow != MSM_VIDC_ALLOW) { + rc = -EINVAL; + goto exit; } rc = msm_vidc_state_change_streamoff(inst, type); if (rc) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 2fd0e128d8..f00a536fd9 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -238,6 +238,35 @@ exit: return name; } +struct msm_vidc_allow_name { + enum msm_vidc_allow allow; + char *name; +}; + +static const struct msm_vidc_allow_name inst_allow_name_arr[] = { + {MSM_VIDC_DISALLOW, "MSM_VIDC_DISALLOW" }, + {MSM_VIDC_ALLOW, "MSM_VIDC_ALLOW" }, + {MSM_VIDC_DEFER, "MSM_VIDC_DEFER" }, + {MSM_VIDC_DISCARD, "MSM_VIDC_DISCARD" }, + {MSM_VIDC_IGNORE, "MSM_VIDC_IGNORE" }, +}; + +const char *allow_name(enum msm_vidc_allow allow) +{ + const char *name = "UNKNOWN"; + + if (allow > ARRAY_SIZE(inst_allow_name_arr)) + goto exit; + + if (inst_allow_name_arr[allow].allow != allow) + goto exit; + + name = inst_allow_name_arr[allow].name; + +exit: + return name; +} + struct msm_vidc_inst_state_name { enum msm_vidc_inst_state state; char *name; @@ -1444,32 +1473,35 @@ bool msm_vidc_allow_streamon(struct msm_vidc_inst *inst, u32 type) return false; } -bool msm_vidc_allow_streamoff(struct msm_vidc_inst *inst, u32 type) +enum msm_vidc_allow msm_vidc_allow_streamoff(struct msm_vidc_inst *inst, u32 type) { - bool allow = true; + enum msm_vidc_allow allow = MSM_VIDC_ALLOW; if (!inst) { d_vpr_e("%s: invalid params\n", __func__); - return false; + return MSM_VIDC_DISALLOW; } if (type == INPUT_MPLANE) { - if (inst->state == MSM_VIDC_OPEN || - inst->state == MSM_VIDC_START_OUTPUT) - allow = false; + if (!inst->vb2q[INPUT_PORT].streaming) + allow = MSM_VIDC_IGNORE; } else if (type == INPUT_META_PLANE) { - if (inst->state == MSM_VIDC_START_INPUT) - allow = false; + if (inst->vb2q[INPUT_PORT].streaming) + allow = MSM_VIDC_DISALLOW; + else if (!inst->vb2q[INPUT_META_PORT].streaming) + allow = MSM_VIDC_IGNORE; } else if (type == OUTPUT_MPLANE) { - if (inst->state == MSM_VIDC_OPEN || - inst->state == MSM_VIDC_START_INPUT) - allow = false; + if (!inst->vb2q[OUTPUT_PORT].streaming) + allow = MSM_VIDC_IGNORE; } else if (type == OUTPUT_META_PLANE) { - if (inst->state == MSM_VIDC_START_OUTPUT) - allow = false; + if (inst->vb2q[OUTPUT_PORT].streaming) + allow = MSM_VIDC_DISALLOW; + else if (!inst->vb2q[OUTPUT_META_PORT].streaming) + allow = MSM_VIDC_IGNORE; } - if (!allow) - i_vpr_e(inst, "%s: type %d not allowed in state %s\n", - __func__, type, state_name(inst->state)); + if (allow != MSM_VIDC_ALLOW) + i_vpr_e(inst, "%s: type %d is %s in state %s\n", + __func__, type, allow_name(allow), + state_name(inst->state)); return allow; } From 423459fcfc1dd912d26ad6c3c06c4ff64b1226aa Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Fri, 2 Jul 2021 15:45:33 -0700 Subject: [PATCH 0380/1061] video: driver: enumerate color format based on preference Enumerate supported color formats based on preference. Compressed format should be populated first, then linear formats. Change-Id: I82ebd9b9386098575c257b193be37e07ab476d9a Signed-off-by: Akshata Sahukar --- driver/vidc/inc/msm_vidc_internal.h | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index a0ebd13dd9..2e42bc9fc0 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -154,14 +154,14 @@ enum priority_level { }; enum msm_vidc_colorformat_type { - MSM_VIDC_FMT_NONE = 0, - MSM_VIDC_FMT_NV12 = BIT(0), - MSM_VIDC_FMT_NV21 = BIT(1), - MSM_VIDC_FMT_NV12C = BIT(2), - MSM_VIDC_FMT_P010 = BIT(3), - MSM_VIDC_FMT_TP10C = BIT(4), - MSM_VIDC_FMT_RGBA8888 = BIT(5), - MSM_VIDC_FMT_RGBA8888C = BIT(6), + MSM_VIDC_FMT_NONE = 0, + MSM_VIDC_FMT_NV12C = BIT(0), + MSM_VIDC_FMT_NV12 = BIT(1), + MSM_VIDC_FMT_NV21 = BIT(2), + MSM_VIDC_FMT_TP10C = BIT(3), + MSM_VIDC_FMT_P010 = BIT(4), + MSM_VIDC_FMT_RGBA8888C = BIT(5), + MSM_VIDC_FMT_RGBA8888 = BIT(6), }; enum msm_vidc_buffer_type { From 9fc813b9c46ee88479b650bfe2b3aab795ffdfc5 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Thu, 8 Jul 2021 20:01:11 +0530 Subject: [PATCH 0381/1061] video: driver: queue deferred buffers during IPSC Queue pending buffers from decode_batch during ipsc to avoid reconfig latency. So added change to queue all pending buffers, if inst->state is not in START state. Change-Id: I09eab9c1f4708ec4390486230579fab2ef216a46 Signed-off-by: Govindaraj Rajagopal --- driver/vidc/src/msm_vdec.c | 47 +++++++++++++++++++++++++++++--------- 1 file changed, 36 insertions(+), 11 deletions(-) diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 3d091df567..6851bc0928 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -1725,12 +1725,38 @@ error: return rc; } +static inline enum msm_vidc_allow msm_vdec_allow_queue_deferred_buffers( + struct msm_vidc_inst *inst) +{ + int count; + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return MSM_VIDC_DISALLOW; + } + + /* do not defer buffers initially to avoid latency issues */ + if (inst->power.buffer_counter <= SKIP_BATCH_WINDOW) + return MSM_VIDC_ALLOW; + + /* do not defer, if client waiting for last flag FBD */ + if (inst->state != MSM_VIDC_START) + return MSM_VIDC_ALLOW; + + /* defer qbuf, if pending buffers count less than batch size */ + count = msm_vidc_num_buffers(inst, MSM_VIDC_BUF_OUTPUT, MSM_VIDC_ATTR_DEFERRED); + if (count < inst->decode_batch.size) + return MSM_VIDC_DEFER; + + return MSM_VIDC_ALLOW; +} + static int msm_vdec_qbuf_batch(struct msm_vidc_inst *inst, struct vb2_buffer *vb2) { struct msm_vidc_buffer *buf; enum msm_vidc_allow allow; - int count, rc; + int rc; if (!inst || !vb2 || !inst->decode_batch.size) { d_vpr_e("%s: invalid params\n", __func__); @@ -1750,18 +1776,17 @@ static int msm_vdec_qbuf_batch(struct msm_vidc_inst *inst, return 0; } - /* do not defer buffers initially to avoid latency issues */ - if (inst->power.buffer_counter > SKIP_BATCH_WINDOW) { - count = msm_vidc_num_buffers(inst, MSM_VIDC_BUF_OUTPUT, MSM_VIDC_ATTR_DEFERRED); - if (count < inst->decode_batch.size) { - print_vidc_buffer(VIDC_LOW, "low ", "batch-qbuf deferred", inst, buf); - schedule_batch_work(inst); - return 0; - } - - cancel_batch_work(inst); + allow = msm_vdec_allow_queue_deferred_buffers(inst); + if (allow == MSM_VIDC_DISALLOW) { + i_vpr_e(inst, "%s: queue deferred buffers not allowed\n", __func__); + return -EINVAL; + } else if (allow == MSM_VIDC_DEFER) { + print_vidc_buffer(VIDC_LOW, "low ", "batch-qbuf deferred", inst, buf); + schedule_batch_work(inst); + return 0; } + cancel_batch_work(inst); rc = msm_vidc_queue_deferred_buffers(inst, MSM_VIDC_BUF_OUTPUT); if (rc) return rc; From 975c7beb5e6fcee6140c989c9f727b3f77d5e147 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Thu, 1 Jul 2021 17:53:19 -0700 Subject: [PATCH 0382/1061] video: driver: move state to ERROR instead of just returning -EINVAL move driver state to ERROR if any session pkt processing failed. Change-Id: Id9c653eb01a0845d6d25cf16383f34707d76ba96 Signed-off-by: Akshata Sahukar --- driver/vidc/src/msm_venc.c | 18 ++++++++---------- driver/vidc/src/venus_hfi_response.c | 14 +++++++------- 2 files changed, 15 insertions(+), 17 deletions(-) diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index 0e00050348..b4691dfcf6 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -683,6 +683,8 @@ static int msm_venc_property_subscription(struct msm_vidc_inst *inst, HFI_PAYLOAD_U32_ARRAY, &payload[0], payload_size); + if (rc) + return rc; return rc; } @@ -719,11 +721,7 @@ static int msm_venc_metadata_delivery(struct msm_vidc_inst *inst, capability->cap[metadata_list[i]].hfi_id; count++; } - }; - - // TODO: remove below check later - if (!count) - return 0; + } rc = venus_hfi_session_command(inst, HFI_CMD_DELIVERY_MODE, @@ -731,6 +729,8 @@ static int msm_venc_metadata_delivery(struct msm_vidc_inst *inst, HFI_PAYLOAD_U32_ARRAY, &payload[0], (count + 1) * sizeof(u32)); + if (rc) + return rc; return rc; } @@ -767,11 +767,7 @@ static int msm_venc_metadata_subscription(struct msm_vidc_inst *inst, capability->cap[metadata_list[i]].hfi_id; count++; } - }; - - // TODO: remove below check later - if (!count) - return 0; + } rc = venus_hfi_session_command(inst, HFI_CMD_SUBSCRIBE_MODE, @@ -779,6 +775,8 @@ static int msm_venc_metadata_subscription(struct msm_vidc_inst *inst, HFI_PAYLOAD_U32_ARRAY, &payload[0], (count + 1) * sizeof(u32)); + if (rc) + return rc; return rc; } diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index 209da2e31d..469c27a7d4 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -1059,6 +1059,7 @@ static int handle_session_buffer(struct msm_vidc_inst *inst, static const struct msm_vidc_hfi_buffer_handle enc_input_hfi_handle[] = { {HFI_BUFFER_METADATA, handle_input_metadata_buffer }, {HFI_BUFFER_RAW, handle_input_buffer }, + {HFI_BUFFER_VPSS, handle_release_internal_buffer }, }; static const struct msm_vidc_hfi_buffer_handle enc_output_hfi_handle[] = { {HFI_BUFFER_METADATA, handle_output_metadata_buffer }, @@ -1069,7 +1070,6 @@ static int handle_session_buffer(struct msm_vidc_inst *inst, {HFI_BUFFER_LINE, handle_release_internal_buffer }, {HFI_BUFFER_ARP, handle_release_internal_buffer }, {HFI_BUFFER_DPB, handle_release_internal_buffer }, - {HFI_BUFFER_VPSS, handle_release_internal_buffer }, }; static const struct msm_vidc_hfi_buffer_handle dec_input_hfi_handle[] = { {HFI_BUFFER_METADATA, handle_input_metadata_buffer }, @@ -1146,9 +1146,11 @@ static int handle_session_buffer(struct msm_vidc_inst *inst, } /* handle unknown buffer type */ - if (i == hfi_handle_size) + if (i == hfi_handle_size) { i_vpr_e(inst, "%s: port %u, unknown buffer type %#x\n", __func__, pkt->port, buffer->type); + return -EINVAL; + } return rc; } @@ -1505,20 +1507,18 @@ static int __handle_session_response(struct msm_vidc_inst *inst, if (packet->flags & HFI_FW_FLAGS_SESSION_ERROR) { i_vpr_e(inst, "%s: received session error %#x\n", __func__, packet->type); - rc = handle_session_error(inst, packet); - if (rc) - goto exit; + handle_session_error(inst, packet); } if (in_range(be[i], packet->type)) { dequeue |= (packet->type == HFI_CMD_BUFFER); rc = be[i].handle(inst, packet); if (rc) - goto exit; + msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); } pkt += packet->size; } } -exit: + memset(&inst->hfi_frame_info, 0, sizeof(struct msm_vidc_hfi_frame_info)); if (dequeue) { rc = handle_dequeue_buffers(inst); From 40ae39388e4c0be5dc856c5ba67e481f39a2edbb Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Thu, 8 Jul 2021 17:54:35 -0700 Subject: [PATCH 0383/1061] video: driver: Enable decode order for thumbnail mode Enable decode order for thumbnail mode. Change-Id: If0c7b304369d4fb1aaedccb7fe1919ab8b6077a5 Signed-off-by: Akshata Sahukar --- driver/vidc/src/msm_vdec.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 6851bc0928..9dda0ca172 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -548,8 +548,9 @@ static int msm_vdec_set_output_order(struct msm_vidc_inst *inst, return -EINVAL; } - if (inst->capabilities->cap[DISPLAY_DELAY_ENABLE].value && - !inst->capabilities->cap[DISPLAY_DELAY].value) + if (inst->capabilities->cap[THUMBNAIL_MODE].value || + (inst->capabilities->cap[DISPLAY_DELAY_ENABLE].value && + !inst->capabilities->cap[DISPLAY_DELAY].value)) output_order = 1; i_vpr_h(inst, "%s: output order: %d", __func__, output_order); From 5e9c1e75faa8c66d43a61df90e3d77d1d7f96e92 Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Thu, 8 Jul 2021 17:39:30 -0700 Subject: [PATCH 0384/1061] video: driver: amend ipsc discard handling when client does stream on and stream off on input port, and if ipsc is raised by fw at the same time, the ipsc is discarded by driver and this race condition results in incorrect port setting properties used by the driver. To resolve this, driver will resubscribe for port settings during the following input port streamon and fw will reraise ipsc and new properties will be used. Signed-off-by: Darshana Patil Change-Id: Id777f9c039a089846e65406e007501b62a571a25 --- driver/vidc/src/venus_hfi_response.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index 209da2e31d..9bb3a3c35f 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -1583,6 +1583,8 @@ void handle_session_response_work_handler(struct work_struct *work) /* continue to next entry processing */ continue; } else if (allow == MSM_VIDC_DISCARD) { + /* if ipsc is discarded then override the psc properties again */ + inst->ipsc_properties_set = false; /* discard current entry processing */ break; } else if (allow == MSM_VIDC_ALLOW) { From 314053e08e294f1c445cd400cfde1d0545d98683 Mon Sep 17 00:00:00 2001 From: Karthikeyan Periasamy Date: Fri, 9 Jul 2021 14:52:22 -0700 Subject: [PATCH 0385/1061] techpack-video: Variant build support Added binary artifacts support for variant build Change-Id: I3ec23c80bc7d5be2222d44c6e7200136dcab6e42 Signed-off-by: Karthikeyan Periasamy --- video_kernel_board.mk | 2 ++ 1 file changed, 2 insertions(+) diff --git a/video_kernel_board.mk b/video_kernel_board.mk index 59c58749d6..dabe527d9f 100644 --- a/video_kernel_board.mk +++ b/video_kernel_board.mk @@ -3,5 +3,7 @@ ifneq ($(TARGET_BOARD_AUTO),true) ifeq ($(call is-board-platform-in-list,$(TARGET_BOARD_PLATFORM)),true) BOARD_VENDOR_KERNEL_MODULES += $(KERNEL_MODULES_OUT)/msm_video.ko + +BUILD_VIDEO_TECHPACK_SOURCE := true endif endif From 63614e76b898f35a38c4455e472fae4257b61d5a Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Fri, 9 Jul 2021 15:59:10 +0530 Subject: [PATCH 0386/1061] video: driver: add support to bugon for requested types Added change to enable bugon at handle_system_error for error types requested via debugfs property. Fatal: adb shell "echo 0x1 > /d/msm_vidc/enable_bugon" NoC: adb shell "echo 0x2 > /d/msm_vidc/enable_bugon" WD Timeout: adb shell "echo 0x4 > /d/msm_vidc/enable_bugon". Change-Id: Iecc1b076c7ca53acee837d68e1a7446dbaef6e94 Signed-off-by: Govindaraj Rajagopal --- driver/vidc/inc/msm_vidc_debug.h | 15 +++++++++++++++ driver/vidc/src/msm_vidc_debug.c | 5 +++++ driver/vidc/src/venus_hfi_response.c | 17 ++++++++++++++++- 3 files changed, 36 insertions(+), 1 deletion(-) diff --git a/driver/vidc/inc/msm_vidc_debug.h b/driver/vidc/inc/msm_vidc_debug.h index d20116d252..2f5aa14812 100644 --- a/driver/vidc/inc/msm_vidc_debug.h +++ b/driver/vidc/inc/msm_vidc_debug.h @@ -35,6 +35,7 @@ extern bool msm_vidc_lossless_encode; extern bool msm_vidc_syscache_disable; extern int msm_vidc_clock_voting; extern bool msm_vidc_fw_dump; +extern unsigned int msm_vidc_enable_bugon; /* To enable messages OR these values and * echo the result to debugfs file. @@ -120,6 +121,14 @@ enum vidc_msg_prio { } \ } while (0) +#define MSM_VIDC_FATAL(value) \ + do { \ + if (value) { \ + d_vpr_e("bug on\n"); \ + BUG_ON(value); \ + } \ + } while (0) + enum msm_vidc_debugfs_event { MSM_VIDC_DEBUGFS_EVENT_ETB, MSM_VIDC_DEBUGFS_EVENT_EBD, @@ -127,6 +136,12 @@ enum msm_vidc_debugfs_event { MSM_VIDC_DEBUGFS_EVENT_FBD, }; +enum msm_vidc_bug_on_error { + MSM_VIDC_BUG_ON_FATAL = BIT(0), + MSM_VIDC_BUG_ON_NOC = BIT(1), + MSM_VIDC_BUG_ON_WD_TIMEOUT = BIT(2), +}; + struct dentry *msm_vidc_debugfs_init_drv(void); struct dentry *msm_vidc_debugfs_init_core(void *core); struct dentry *msm_vidc_debugfs_init_inst(void *inst, diff --git a/driver/vidc/src/msm_vidc_debug.c b/driver/vidc/src/msm_vidc_debug.c index df2c3ed954..51108c23a2 100644 --- a/driver/vidc/src/msm_vidc_debug.c +++ b/driver/vidc/src/msm_vidc_debug.c @@ -86,6 +86,9 @@ int msm_vidc_clock_voting = !1; bool msm_vidc_fw_dump = !true; EXPORT_SYMBOL(msm_vidc_fw_dump); +unsigned int msm_vidc_enable_bugon = !1; +EXPORT_SYMBOL(msm_vidc_enable_bugon); + #define MAX_DBG_BUF_SIZE 4096 struct core_inst_pair { @@ -249,6 +252,8 @@ struct dentry* msm_vidc_debugfs_init_drv() &msm_vidc_lossless_encode); debugfs_create_bool("msm_vidc_fw_dump", 0644, dir, &msm_vidc_fw_dump); + debugfs_create_u32("enable_bugon", 0644, dir, + &msm_vidc_enable_bugon); return dir; diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index 4205c28c21..0a9f821084 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -436,10 +436,25 @@ void fw_coredump(struct msm_vidc_core *core) int handle_system_error(struct msm_vidc_core *core, struct hfi_packet *pkt) { - d_vpr_e("%s: system error received\n", __func__); + bool bug_on = false; + d_vpr_e("%s: system error received\n", __func__); print_sfr_message(core); venus_hfi_noc_error_info(core); + + /* enable force bugon for requested type */ + if (pkt->type == HFI_SYS_ERROR_FATAL) + bug_on = !!(msm_vidc_enable_bugon & MSM_VIDC_BUG_ON_FATAL); + else if (pkt->type == HFI_SYS_ERROR_NOC) + bug_on = !!(msm_vidc_enable_bugon & MSM_VIDC_BUG_ON_NOC); + else if (pkt->type == HFI_SYS_ERROR_WD_TIMEOUT) + bug_on = !!(msm_vidc_enable_bugon & MSM_VIDC_BUG_ON_WD_TIMEOUT); + + if (bug_on) { + d_vpr_e("%s: force bugon for type %#x\n", __func__, pkt->type); + MSM_VIDC_FATAL(true); + } + msm_vidc_core_deinit(core, true); return 0; From 3aaf56bebe768a11b33bc8f333bd3296087577d0 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Mon, 12 Jul 2021 17:39:33 -0700 Subject: [PATCH 0387/1061] video: driver: set RGBA enc session input default color space as BT709 LR If client fails to configure color aspects to driver, driver does not set required color space flags to firmware. For RGBA enc session, there is implicit CSC. Hence, resultant color space should be BT709 LR. But firmware fails to generate this color space info assuming that color space info is not required. Hence, fix this by setting BT709 LR as default color space info for RGBA enc session. Change-Id: I6f9fa0986dd8657b1d6bcc2c86286aa51813f518 Signed-off-by: Akshata Sahukar --- driver/vidc/src/msm_venc.c | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index b4691dfcf6..6f13f7fd88 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -314,17 +314,22 @@ static int msm_venc_set_colorspace(struct msm_vidc_inst* inst, u32 primaries = MSM_VIDC_PRIMARIES_RESERVED; u32 matrix_coeff = MSM_VIDC_MATRIX_COEFF_RESERVED; u32 transfer_char = MSM_VIDC_TRANSFER_RESERVED; - u32 full_range = V4L2_QUANTIZATION_DEFAULT; + u32 full_range = 0; u32 colour_description_present_flag = 0; u32 video_signal_type_present_flag = 0, payload = 0; /* Unspecified video format */ u32 video_format = 5; + struct v4l2_format *input_fmt; + u32 pix_fmt; if (port != INPUT_PORT) { i_vpr_e(inst, "%s: invalid port %d\n", __func__, port); return -EINVAL; } + input_fmt = &inst->fmts[INPUT_PORT]; + pix_fmt = v4l2_colorformat_to_driver( + input_fmt->fmt.pix_mp.pixelformat, __func__); if (inst->fmts[port].fmt.pix_mp.colorspace != V4L2_COLORSPACE_DEFAULT || inst->fmts[port].fmt.pix_mp.ycbcr_enc != V4L2_YCBCR_ENC_DEFAULT || inst->fmts[port].fmt.pix_mp.xfer_func != V4L2_XFER_FUNC_DEFAULT) { @@ -336,6 +341,13 @@ static int msm_venc_set_colorspace(struct msm_vidc_inst* inst, inst->fmts[port].fmt.pix_mp.ycbcr_enc, __func__); transfer_char = v4l2_transfer_char_to_driver(inst, inst->fmts[port].fmt.pix_mp.xfer_func, __func__); + } else if (is_rgba_colorformat(pix_fmt)) { + colour_description_present_flag = 1; + video_signal_type_present_flag = 1; + primaries = MSM_VIDC_PRIMARIES_BT709; + matrix_coeff = MSM_VIDC_MATRIX_COEFF_BT709; + transfer_char = MSM_VIDC_TRANSFER_BT709; + full_range = 0; } if (inst->fmts[port].fmt.pix_mp.quantization != From 142d7813b67482e6f9715861957bbd89d730a962 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Fri, 9 Jul 2021 20:02:11 +0530 Subject: [PATCH 0388/1061] video: driver: add support to dump subsystem memory Added support to dump subsystem region along with firmware region and queues. Change-Id: If032553f23195b3c9ddc9d6e18854319452558c7 Signed-off-by: Govindaraj Rajagopal --- driver/vidc/src/venus_hfi_response.c | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-) diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index 4205c28c21..fabb0d4412 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -384,7 +384,7 @@ void fw_coredump(struct msm_vidc_core *core) phys_addr_t mem_phys = 0; size_t res_size = 0; void *mem_va = NULL; - char *data = NULL; + char *data = NULL, *dump = NULL; u64 total_size; if (!core) { @@ -415,22 +415,28 @@ void fw_coredump(struct msm_vidc_core *core) d_vpr_e("%s: unable to remap firmware memory\n", __func__); return; } - total_size = res_size + TOTAL_QSIZE; + total_size = res_size + TOTAL_QSIZE + ALIGNED_SFR_SIZE; data = vmalloc(total_size); if (!data) { memunmap(mem_va); return; } + dump = data; /* copy firmware dump */ memcpy(data, mem_va, res_size); memunmap(mem_va); /* copy queues(cmd, msg, dbg) dump(along with headers) */ - memcpy(data + res_size, (char *)core->iface_q_table.align_virtual_addr, TOTAL_QSIZE); + data += res_size; + memcpy(data, (char *)core->iface_q_table.align_virtual_addr, TOTAL_QSIZE); - dev_coredumpv(&pdev->dev, data, total_size, GFP_KERNEL); + /* copy sfr dump */ + data += TOTAL_QSIZE; + memcpy(data, (char *)core->sfr.align_virtual_addr, ALIGNED_SFR_SIZE); + + dev_coredumpv(&pdev->dev, dump, total_size, GFP_KERNEL); } int handle_system_error(struct msm_vidc_core *core, From 44f4a9fab3e844d52afae161ff07a39c155902ab Mon Sep 17 00:00:00 2001 From: Dikshita Agarwal Date: Tue, 22 Jun 2021 15:26:33 +0530 Subject: [PATCH 0389/1061] video: driver: add proper handling of VIDIOC_ENUM_FRAMESIZES VIDIOC_ENUM_FRAMESIZES was not handled for OUTPUT_MPLANE. Fixes: v4l2-compliance: testFrameSize(VIDIOC_ENUM_FRAMESIZES) on encoder. Change-Id: I9031e018c13ebae94e516be1b5558d30c68b2862 Signed-off-by: Dikshita Agarwal --- driver/vidc/src/msm_vidc.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index 202def015d..8c5f1aa1ac 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -609,6 +609,7 @@ int msm_vidc_enum_framesizes(void *instance, struct v4l2_frmsizeenum *fsize) struct msm_vidc_inst *inst = instance; struct msm_vidc_inst_capability *capability; enum msm_vidc_colorformat_type colorfmt; + enum msm_vidc_codec_type codec; if (!inst || !fsize) { d_vpr_e("%s: invalid params: %pK %pK\n", @@ -626,10 +627,13 @@ int msm_vidc_enum_framesizes(void *instance, struct v4l2_frmsizeenum *fsize) return -EINVAL; /* validate pixel format */ - colorfmt = v4l2_colorformat_to_driver(fsize->pixel_format, __func__); - if (colorfmt == MSM_VIDC_FMT_NONE) { - i_vpr_e(inst, "%s: unsupported pix fmt %#x\n", __func__, fsize->pixel_format); - return -EINVAL; + codec = v4l2_codec_to_driver(fsize->pixel_format, __func__); + if (!codec) { + colorfmt = v4l2_colorformat_to_driver(fsize->pixel_format, __func__); + if (colorfmt == MSM_VIDC_FMT_NONE) { + i_vpr_e(inst, "%s: unsupported pix fmt %#x\n", __func__, fsize->pixel_format); + return -EINVAL; + } } fsize->type = V4L2_FRMSIZE_TYPE_STEPWISE; From 942f406c42e3fcd651ee4a70bbe498b42173f410 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Wed, 14 Jul 2021 18:35:07 -0700 Subject: [PATCH 0390/1061] video: driver: Cap chroma qp offset value other than -12 as 0 Cap chroma qp offset value other than -12 as 0. Change-Id: I0ca9c4844ab835a9365e695f38deff90768191aa Signed-off-by: Akshata Sahukar --- driver/platform/waipio/src/msm_vidc_waipio.c | 5 ++-- driver/vidc/inc/msm_vidc_control.h | 2 ++ driver/vidc/inc/msm_vidc_internal.h | 2 ++ driver/vidc/src/msm_vidc_control.c | 25 ++++++++++++++++++++ 4 files changed, 31 insertions(+), 3 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 72f0cf934f..53621bfd81 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -16,8 +16,6 @@ #define DEFAULT_VIDEO_CONCEAL_COLOR_BLACK 0x8020010 #define MAX_LTR_FRAME_COUNT 2 #define MAX_BASE_LAYER_PRIORITY_ID 63 -#define MIN_CHROMA_QP_OFFSET -12 -#define MAX_CHROMA_QP_OFFSET 0 #define MAX_BITRATE 220000000 #define DEFAULT_BITRATE 20000000 #define MIN_QP_10BIT -12 @@ -1233,7 +1231,8 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { HFI_PROP_CHROMA_QP_OFFSET, CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, {0}, {0}, - NULL, msm_vidc_set_chroma_qp_index_offset}, + msm_vidc_adjust_chroma_qp_index_offset, + msm_vidc_set_chroma_qp_index_offset}, {DISPLAY_DELAY_ENABLE, DEC, H264|HEVC|VP9, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, diff --git a/driver/vidc/inc/msm_vidc_control.h b/driver/vidc/inc/msm_vidc_control.h index 336ca4b1e0..fd57280d45 100644 --- a/driver/vidc/inc/msm_vidc_control.h +++ b/driver/vidc/inc/msm_vidc_control.h @@ -24,6 +24,8 @@ int msm_vidc_adjust_mark_ltr(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_ir_random(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_delta_based_rc(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_transform_8x8(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_chroma_qp_index_offset(void *instance, + struct v4l2_ctrl *ctrl); int msm_vidc_adjust_slice_count(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_layer_count(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_gop_size(void *instance, struct v4l2_ctrl *ctrl); diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 2e42bc9fc0..04cd31c4d6 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -67,6 +67,8 @@ #define MIN_SLICE_HEIGHT 128 #define MAX_BITRATE_BOOST 25 #define MAX_SUPPORTED_MIN_QUALITY 70 +#define MIN_CHROMA_QP_OFFSET -12 +#define MAX_CHROMA_QP_OFFSET 0 #define DCVS_WINDOW 16 #define ENC_FPS_WINDOW 3 diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 42495327a4..2c0778356b 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -1157,6 +1157,31 @@ int msm_vidc_adjust_transform_8x8(void *instance, struct v4l2_ctrl *ctrl) return 0; } +int msm_vidc_adjust_chroma_qp_index_offset(void *instance, + struct v4l2_ctrl *ctrl) +{ + struct msm_vidc_inst_capability *capability; + s32 adjusted_value; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + adjusted_value = ctrl ? ctrl->val : + capability->cap[CHROMA_QP_INDEX_OFFSET].value; + + if (adjusted_value != MIN_CHROMA_QP_OFFSET) + adjusted_value = MAX_CHROMA_QP_OFFSET; + + msm_vidc_update_cap_value(inst, CHROMA_QP_INDEX_OFFSET, + adjusted_value, __func__); + + return 0; +} + int msm_vidc_adjust_slice_count(void *instance, struct v4l2_ctrl *ctrl) { struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; From 3fc922e53d2c5b36ad62c692047f0a84ae2839d3 Mon Sep 17 00:00:00 2001 From: Gaviraju Doddabettahalli Bettegowda Date: Fri, 16 Jul 2021 19:35:35 +0530 Subject: [PATCH 0391/1061] video: driver: Enable firmware error and fatal logs by default Added change to enable firmware logs by default. Change-Id: Ie3363e72503264929bd5fb749ad7c2af45831bb2 Signed-off-by: Gaviraju Doddabettahalli Bettegowda --- driver/vidc/src/msm_vidc_debug.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/driver/vidc/src/msm_vidc_debug.c b/driver/vidc/src/msm_vidc_debug.c index 51108c23a2..ac3eaf1d28 100644 --- a/driver/vidc/src/msm_vidc_debug.c +++ b/driver/vidc/src/msm_vidc_debug.c @@ -16,7 +16,7 @@ extern struct msm_vidc_core *g_core; #define MAX_SSR_STRING_LEN 64 #define MAX_DEBUG_LEVEL_STRING_LEN 15 -unsigned int msm_vidc_debug = VIDC_ERR | VIDC_PRINTK | FW_ERROR | FW_FATAL; +unsigned int msm_vidc_debug = VIDC_ERR | VIDC_PRINTK | FW_ERROR | FW_FATAL | FW_PRINTK; static int debug_level_set(const char *val, const struct kernel_param *kp) From d9696271a099083ac1724507af079fe3f4a0a12b Mon Sep 17 00:00:00 2001 From: Priyanka Gujjula Date: Fri, 16 Jul 2021 19:50:25 +0530 Subject: [PATCH 0392/1061] video: driver: Migrate to threaded irq Migrate to threaded IRQ from workqueue based IRQ handling. Change-Id: I5cf2ecaa6d9b8d67698bbaf41e8d5ff77249ab1c Signed-off-by: Priyanka Gujjula --- driver/vidc/inc/msm_vidc_core.h | 2 -- driver/vidc/inc/venus_hfi.h | 2 +- driver/vidc/src/msm_vidc_probe.c | 23 ++++------------------- driver/vidc/src/venus_hfi.c | 21 +++++++++------------ 4 files changed, 14 insertions(+), 34 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_core.h b/driver/vidc/inc/msm_vidc_core.h index f1d6b9c96c..ff8b9e2ac1 100644 --- a/driver/vidc/inc/msm_vidc_core.h +++ b/driver/vidc/inc/msm_vidc_core.h @@ -85,8 +85,6 @@ struct msm_vidc_core { struct msm_vidc_mem_addr sfr; struct msm_vidc_mem_addr iface_q_table; struct msm_vidc_iface_q_info iface_queues[VIDC_IFACEQ_NUMQ]; - struct work_struct device_work; - struct workqueue_struct *device_workq; struct delayed_work pm_work; struct workqueue_struct *pm_workq; struct workqueue_struct *batch_workq; diff --git a/driver/vidc/inc/venus_hfi.h b/driver/vidc/inc/venus_hfi.h index 81532e7984..2049fe0903 100644 --- a/driver/vidc/inc/venus_hfi.h +++ b/driver/vidc/inc/venus_hfi.h @@ -58,9 +58,9 @@ int venus_hfi_trigger_ssr(struct msm_vidc_core *core, u32 type, int venus_hfi_scale_clocks(struct msm_vidc_inst* inst, u64 freq); int venus_hfi_scale_buses(struct msm_vidc_inst* inst, u64 bw_ddr, u64 bw_llcc); -void venus_hfi_work_handler(struct work_struct *work); void venus_hfi_pm_work_handler(struct work_struct *work); irqreturn_t venus_hfi_isr(int irq, void *data); +irqreturn_t venus_hfi_isr_handler(int irq, void *data); int __write_register_masked(struct msm_vidc_core *core, u32 reg, u32 value, u32 mask); diff --git a/driver/vidc/src/msm_vidc_probe.c b/driver/vidc/src/msm_vidc_probe.c index 5f7b5956fa..934bc31a37 100644 --- a/driver/vidc/src/msm_vidc_probe.c +++ b/driver/vidc/src/msm_vidc_probe.c @@ -64,10 +64,10 @@ static int msm_vidc_init_irq(struct msm_vidc_core *core) goto exit; } - rc = request_irq(dt->irq, venus_hfi_isr, IRQF_TRIGGER_HIGH, - "msm_vidc", core); - if (unlikely(rc)) { - d_vpr_e("%s: request_irq failed\n", __func__); + rc = devm_request_threaded_irq(&core->pdev->dev, dt->irq, venus_hfi_isr, + venus_hfi_isr_handler, IRQF_TRIGGER_HIGH, "msm-vidc", core); + if (rc) { + d_vpr_e("%s: Failed to allocate venus IRQ\n", __func__); goto exit; } disable_irq_nosync(dt->irq); @@ -191,12 +191,8 @@ static int msm_vidc_deinitialize_core(struct msm_vidc_core *core) if (core->pm_workq) destroy_workqueue(core->pm_workq); - if (core->device_workq) - destroy_workqueue(core->device_workq); - core->batch_workq = NULL; core->pm_workq = NULL; - core->device_workq = NULL; return rc; } @@ -213,13 +209,6 @@ static int msm_vidc_initialize_core(struct msm_vidc_core *core) msm_vidc_change_core_state(core, MSM_VIDC_CORE_DEINIT, __func__); - core->device_workq = create_singlethread_workqueue("device_workq"); - if (!core->device_workq) { - d_vpr_e("%s: create device workq failed\n", __func__); - rc = -EINVAL; - goto exit; - } - core->pm_workq = create_singlethread_workqueue("pm_workq"); if (!core->pm_workq) { d_vpr_e("%s: create pm workq failed\n", __func__); @@ -254,7 +243,6 @@ static int msm_vidc_initialize_core(struct msm_vidc_core *core) INIT_LIST_HEAD(&core->instances); INIT_LIST_HEAD(&core->dangling_instances); - INIT_WORK(&core->device_work, venus_hfi_work_handler); INIT_DELAYED_WORK(&core->pm_work, venus_hfi_pm_work_handler); INIT_DELAYED_WORK(&core->fw_unload_work, msm_vidc_fw_unload_handler); INIT_WORK(&core->ssr_work, msm_vidc_ssr_handler); @@ -269,11 +257,8 @@ exit: destroy_workqueue(core->batch_workq); if (core->pm_workq) destroy_workqueue(core->pm_workq); - if (core->device_workq) - destroy_workqueue(core->device_workq); core->batch_workq = NULL; core->pm_workq = NULL; - core->device_workq = NULL; return rc; } diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index ba733c2089..24d3beb1d5 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -2673,24 +2673,19 @@ static int __response_handler(struct msm_vidc_core *core) irqreturn_t venus_hfi_isr(int irq, void *data) { - struct msm_vidc_core *core = data; - disable_irq_nosync(irq); - queue_work(core->device_workq, &core->device_work); - - return IRQ_HANDLED; + return IRQ_WAKE_THREAD; } -void venus_hfi_work_handler(struct work_struct *work) +irqreturn_t venus_hfi_isr_handler(int irq, void *data) { - struct msm_vidc_core *core; + struct msm_vidc_core *core = data; int num_responses = 0, rc = 0; d_vpr_l("%s()\n", __func__); - core = container_of(work, struct msm_vidc_core, device_work); if (!core) { d_vpr_e("%s: invalid params\n", __func__); - return; + return IRQ_NONE; } core_lock(core, __func__); @@ -2698,16 +2693,18 @@ void venus_hfi_work_handler(struct work_struct *work) if (rc) { d_vpr_e("%s: Power on failed\n", __func__); core_unlock(core, __func__); - goto err_no_work; + goto exit; } call_venus_op(core, clear_interrupt, core); core_unlock(core, __func__); num_responses = __response_handler(core); -err_no_work: +exit: if (!call_venus_op(core, watchdog, core, core->intr_status)) - enable_irq(core->dt->irq); + enable_irq(irq); + + return IRQ_HANDLED; } void venus_hfi_pm_work_handler(struct work_struct *work) From c533b923619a76dcc5a92259a0e8f96707113a8b Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Fri, 16 Jul 2021 15:56:30 -0700 Subject: [PATCH 0393/1061] video: driver: Disable RGBA/RGBAC encoder Since CTSEncodeDecode test cannot handle BT 709LR, disabled HW RGBA encoding. Change-Id: Ic451d8444a2ec502ded7fba008233b2e288826bf Signed-off-by: Akshata Sahukar --- driver/platform/waipio/src/msm_vidc_waipio.c | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 53621bfd81..7b8138c4c4 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -120,8 +120,11 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {PIX_FMTS, ENC, H264, MSM_VIDC_FMT_NV12, MSM_VIDC_FMT_NV12C, - MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C | - MSM_VIDC_FMT_RGBA8888 | MSM_VIDC_FMT_RGBA8888C, + MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C, + /* Since CTSEncodeDecode test cannot handle BT 709LR, + * disabled HW RGBA encoding. + * | MSM_VIDC_FMT_RGBA8888 | MSM_VIDC_FMT_RGBA8888C, + */ MSM_VIDC_FMT_NV12C, 0, 0, CAP_FLAG_ROOT, @@ -131,8 +134,11 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { MSM_VIDC_FMT_NV12, MSM_VIDC_FMT_TP10C, MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C | - MSM_VIDC_FMT_P010 | MSM_VIDC_FMT_TP10C | - MSM_VIDC_FMT_RGBA8888 | MSM_VIDC_FMT_RGBA8888C, + MSM_VIDC_FMT_P010 | MSM_VIDC_FMT_TP10C, + /* Since CTSEncodeDecode test cannot handle BT 709LR, + * disabled HW RGBA encoding. + * | MSM_VIDC_FMT_RGBA8888 | MSM_VIDC_FMT_RGBA8888C, + */ MSM_VIDC_FMT_NV12C, 0, 0, CAP_FLAG_ROOT, From 371fcbad4ef15e60720f84e9c9915501faa85b14 Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Wed, 21 Jul 2021 12:55:45 -0700 Subject: [PATCH 0394/1061] video: driver: null check in handling sys error add null check for pkt before accessing pkt type in handle_system_error function. Change-Id: If2c3d4c789fed16ed5c385258edc20e122bf1ea9 Signed-off-by: Darshana Patil --- driver/vidc/src/venus_hfi_response.c | 22 ++++++++++++---------- 1 file changed, 12 insertions(+), 10 deletions(-) diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index f1c3d6b356..d28a49aa02 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -448,17 +448,19 @@ int handle_system_error(struct msm_vidc_core *core, print_sfr_message(core); venus_hfi_noc_error_info(core); - /* enable force bugon for requested type */ - if (pkt->type == HFI_SYS_ERROR_FATAL) - bug_on = !!(msm_vidc_enable_bugon & MSM_VIDC_BUG_ON_FATAL); - else if (pkt->type == HFI_SYS_ERROR_NOC) - bug_on = !!(msm_vidc_enable_bugon & MSM_VIDC_BUG_ON_NOC); - else if (pkt->type == HFI_SYS_ERROR_WD_TIMEOUT) - bug_on = !!(msm_vidc_enable_bugon & MSM_VIDC_BUG_ON_WD_TIMEOUT); + if (pkt) { + /* enable force bugon for requested type */ + if (pkt->type == HFI_SYS_ERROR_FATAL) + bug_on = !!(msm_vidc_enable_bugon & MSM_VIDC_BUG_ON_FATAL); + else if (pkt->type == HFI_SYS_ERROR_NOC) + bug_on = !!(msm_vidc_enable_bugon & MSM_VIDC_BUG_ON_NOC); + else if (pkt->type == HFI_SYS_ERROR_WD_TIMEOUT) + bug_on = !!(msm_vidc_enable_bugon & MSM_VIDC_BUG_ON_WD_TIMEOUT); - if (bug_on) { - d_vpr_e("%s: force bugon for type %#x\n", __func__, pkt->type); - MSM_VIDC_FATAL(true); + if (bug_on) { + d_vpr_e("%s: force bugon for type %#x\n", __func__, pkt->type); + MSM_VIDC_FATAL(true); + } } msm_vidc_core_deinit(core, true); From 5c297b7d261366ee6abf567128fe9c682d623222 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Mon, 19 Jul 2021 19:09:49 +0530 Subject: [PATCH 0395/1061] video: driver: print buffer statistics once at every sec - Added change to print buffer statistics like total and avg etb, ebd, ftb, fbd counts, client set fps, actual fps, bitrate values in 1 sec window and these stats currently configured to print at every 1sec boundary. - Convert meta buffer prints to low level logs. Change-Id: I1c93eea90fbd5460eb51bbf133c513157003d51e Signed-off-by: Govindaraj Rajagopal --- driver/platform/waipio/src/msm_vidc_waipio.c | 1 + driver/vidc/inc/msm_vidc_driver.h | 7 ++ driver/vidc/inc/msm_vidc_inst.h | 2 + driver/vidc/inc/msm_vidc_internal.h | 23 ++-- driver/vidc/inc/venus_hfi_response.h | 1 + driver/vidc/src/msm_vidc.c | 3 + driver/vidc/src/msm_vidc_driver.c | 115 +++++++++++++++++-- driver/vidc/src/msm_vidc_vb2.c | 9 ++ driver/vidc/src/venus_hfi_response.c | 31 ++++- 9 files changed, 166 insertions(+), 26 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 7b8138c4c4..416cef545e 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -89,6 +89,7 @@ static struct msm_platform_core_capability core_data_waipio[] = { {DCVS, 1}, {DECODE_BATCH, 1}, {DECODE_BATCH_TIMEOUT, 200}, + {STATS_TIMEOUT, 2000}, {AV_SYNC_WINDOW_SIZE, 40}, {NON_FATAL_FAULTS, 1}, {ENC_AUTO_FRAMERATE, 1}, diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 92be3669f7..d4bdea95be 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -15,6 +15,8 @@ #define MSM_VIDC_SESSION_INACTIVE_THRESHOLD_MS 1000 #define HEIC_GRID_DIMENSION 512 +enum msm_vidc_debugfs_event; + static inline is_decode_session(struct msm_vidc_inst *inst) { return inst->domain == MSM_VIDC_DECODER; @@ -346,6 +348,11 @@ int msm_vidc_get_delayed_unmap(struct msm_vidc_inst *inst, struct msm_vidc_map *map); int msm_vidc_put_delayed_unmap(struct msm_vidc_inst *inst, struct msm_vidc_map *map); +void msm_vidc_update_stats(struct msm_vidc_inst *inst, + struct msm_vidc_buffer *buf, enum msm_vidc_debugfs_event etype); +void msm_vidc_stats_handler(struct work_struct *work); +int schedule_stats_work(struct msm_vidc_inst *inst); +int cancel_stats_work(struct msm_vidc_inst *inst); enum msm_vidc_buffer_type v4l2_type_to_driver(u32 type, const char *func); int msm_vidc_queue_buffer_single(struct msm_vidc_inst *inst, diff --git a/driver/vidc/inc/msm_vidc_inst.h b/driver/vidc/inc/msm_vidc_inst.h index e07c26ced8..0a9ed474c6 100644 --- a/driver/vidc/inc/msm_vidc_inst.h +++ b/driver/vidc/inc/msm_vidc_inst.h @@ -128,6 +128,7 @@ struct msm_vidc_inst { struct msm_vidc_decode_vpp_delay decode_vpp_delay; struct msm_vidc_session_idle session_idle; struct delayed_work response_work; + struct delayed_work stats_work; struct workqueue_struct *response_workq; struct list_head response_works; /* list of struct response_work */ struct list_head enc_input_crs; @@ -138,6 +139,7 @@ struct msm_vidc_inst { struct dentry *debugfs_root; struct msm_vidc_debug debug; struct debug_buf_count debug_count; + struct msm_vidc_statistics stats; struct msm_vidc_inst_capability *capabilities; struct completion completions[MAX_SIGNAL]; enum priority_level priority_level; diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 04cd31c4d6..5d46ee028b 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -328,6 +328,7 @@ enum msm_vidc_core_capability_type { DCVS, DECODE_BATCH, DECODE_BATCH_TIMEOUT, + STATS_TIMEOUT, AV_SYNC_WINDOW_SIZE, CLK_FREQ_THRESHOLD, NON_FATAL_FAULTS, @@ -519,10 +520,16 @@ struct msm_vidc_inst_cap_entry { }; struct debug_buf_count { - int etb; - int ftb; - int fbd; - int ebd; + u64 etb; + u64 ftb; + u64 fbd; + u64 ebd; +}; + +struct msm_vidc_statistics { + struct debug_buf_count count; + u64 data_size; + u64 time_ms; }; enum efuse_purpose { @@ -637,13 +644,6 @@ struct hfi_queue_header { ALIGNED_QDSS_SIZE, SZ_1M) #define TOTAL_QSIZE (SHARED_QSIZE - ALIGNED_SFR_SIZE - ALIGNED_QDSS_SIZE) -struct buf_count { - u32 etb; - u32 ftb; - u32 fbd; - u32 ebd; -}; - struct profile_data { u64 start; u64 stop; @@ -657,7 +657,6 @@ struct msm_vidc_debug { struct profile_data pdata[MAX_PROFILING_POINTS]; u32 profile; u32 samples; - struct buf_count count; }; struct msm_vidc_input_cr_data { diff --git a/driver/vidc/inc/venus_hfi_response.h b/driver/vidc/inc/venus_hfi_response.h index 1a47d08e63..23189c4beb 100644 --- a/driver/vidc/inc/venus_hfi_response.h +++ b/driver/vidc/inc/venus_hfi_response.h @@ -19,6 +19,7 @@ bool is_valid_hfi_buffer_type(struct msm_vidc_inst *inst, void handle_session_response_work_handler(struct work_struct *work); int handle_session_response_work(struct msm_vidc_inst *inst, struct response_work *work); +int cancel_response_work(struct msm_vidc_inst *inst); int handle_system_error(struct msm_vidc_core *core, struct hfi_packet *pkt); void fw_coredump(struct msm_vidc_core *core); diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index 202def015d..bbb52d6e2d 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -866,6 +866,7 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) } INIT_DELAYED_WORK(&inst->response_work, handle_session_response_work_handler); + INIT_DELAYED_WORK(&inst->stats_work, msm_vidc_stats_handler); inst->capabilities = kzalloc(sizeof(struct msm_vidc_inst_capability), GFP_KERNEL); if (!inst->capabilities) { @@ -930,6 +931,8 @@ int msm_vidc_close(void *instance) i_vpr_h(inst, "%s()\n", __func__); inst_lock(inst, __func__); + cancel_response_work(inst); + cancel_stats_work(inst); msm_vidc_session_close(inst); msm_vidc_remove_session(inst); msm_vidc_destroy_buffers(inst); diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index f00a536fd9..50ecaf53d9 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -2055,7 +2055,7 @@ int msm_vidc_set_auto_framerate(struct msm_vidc_inst *inst, u64 timestamp) struct msm_vidc_timestamp *ts; struct msm_vidc_timestamp *prev = NULL; u32 counter = 0, prev_fr = 0, curr_fr = 0; - u64 ts_ms = 0; + u64 time_ms = 0; int rc = 0; if (!inst || !inst->core || !inst->capabilities) { @@ -2074,9 +2074,9 @@ int msm_vidc_set_auto_framerate(struct msm_vidc_inst *inst, u64 timestamp) list_for_each_entry(ts, &inst->timestamps.list, sort.list) { if (prev) { - ts_ms = div_u64(ts->sort.val - prev->sort.val, 1000); + time_ms = div_u64(ts->sort.val - prev->sort.val, 1000); prev_fr = curr_fr; - curr_fr = ts_ms ? div_u64(MSEC_PER_SEC, ts_ms) << 16 : + curr_fr = time_ms ? div_u64(MSEC_PER_SEC, time_ms) << 16 : inst->auto_framerate; if (curr_fr > inst->capabilities->cap[FRAME_RATE].max) curr_fr = inst->capabilities->cap[FRAME_RATE].max; @@ -2784,9 +2784,106 @@ void msm_vidc_free_capabililty_list(struct msm_vidc_inst *inst, } } +void msm_vidc_update_stats(struct msm_vidc_inst *inst, + struct msm_vidc_buffer *buf, enum msm_vidc_debugfs_event etype) +{ + if (!inst || !buf || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return; + } + + if ((is_decode_session(inst) && etype == MSM_VIDC_DEBUGFS_EVENT_ETB) || + (is_encode_session(inst) && etype == MSM_VIDC_DEBUGFS_EVENT_FBD)) + inst->stats.data_size += buf->data_size; + + msm_vidc_debugfs_update(inst, etype); +} + +static void msm_vidc_print_stats(struct msm_vidc_inst *inst) +{ + u32 frame_rate, operating_rate, achieved_fps, priority, etb, ebd, ftb, fbd, dt_ms; + u64 bitrate_kbps = 0, time_ms = ktime_get_ns() / 1000 / 1000; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return; + } + + etb = inst->debug_count.etb - inst->stats.count.etb; + ebd = inst->debug_count.ebd - inst->stats.count.ebd; + ftb = inst->debug_count.ftb - inst->stats.count.ftb; + fbd = inst->debug_count.fbd - inst->stats.count.fbd; + frame_rate = inst->capabilities->cap[FRAME_RATE].value >> 16; + operating_rate = inst->capabilities->cap[OPERATING_RATE].value >> 16; + priority = inst->capabilities->cap[PRIORITY].value; + + dt_ms = time_ms - inst->stats.time_ms; + achieved_fps = (fbd * 1000) / dt_ms; + bitrate_kbps = (inst->stats.data_size * 8 * 1000) / (dt_ms * 1024); + + i_vpr_hp(inst, + "stats: counts (etb,ebd,ftb,fbd): %u %u %u %u (total %u %u %u %u), achieved bitrate %lldKbps fps %u/s, frame rate %u, operating rate %u, priority %u, dt %ums\n", + etb, ebd, ftb, fbd, inst->debug_count.etb, inst->debug_count.ebd, + inst->debug_count.ftb, inst->debug_count.fbd, + bitrate_kbps, achieved_fps, frame_rate, operating_rate, priority, dt_ms); + + inst->stats.count = inst->debug_count; + inst->stats.data_size = 0; + inst->stats.time_ms = time_ms; +} + +int schedule_stats_work(struct msm_vidc_inst *inst) +{ + struct msm_vidc_core *core; + + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + core = inst->core; + mod_delayed_work(inst->response_workq, &inst->stats_work, + msecs_to_jiffies(core->capabilities[STATS_TIMEOUT].value)); + + return 0; +} + +int cancel_stats_work(struct msm_vidc_inst *inst) +{ + if (!inst) { + d_vpr_e("%s: Invalid arguments\n", __func__); + return -EINVAL; + } + cancel_delayed_work(&inst->stats_work); + + /* print final stats */ + msm_vidc_print_stats(inst); + + return 0; +} + +void msm_vidc_stats_handler(struct work_struct *work) +{ + struct msm_vidc_inst *inst; + + inst = container_of(work, struct msm_vidc_inst, stats_work.work); + inst = get_inst_ref(g_core, inst); + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return; + } + + inst_lock(inst, __func__); + msm_vidc_print_stats(inst); + schedule_stats_work(inst); + inst_unlock(inst, __func__); + + put_inst(inst); +} + static int msm_vidc_queue_buffer(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buf) { struct msm_vidc_buffer *meta; + enum msm_vidc_debugfs_event etype; int rc = 0; u32 cr = 0; @@ -2816,7 +2913,7 @@ static int msm_vidc_queue_buffer(struct msm_vidc_inst *inst, struct msm_vidc_buf print_vidc_buffer(VIDC_HIGH, "high", "qbuf", inst, buf); meta = get_meta_buffer(inst, buf); if (meta) - print_vidc_buffer(VIDC_HIGH, "high", "qbuf", inst, meta); + print_vidc_buffer(VIDC_LOW, "low ", "qbuf", inst, meta); if (!meta && is_meta_enabled(inst, buf->type)) { print_vidc_buffer(VIDC_ERR, "err ", "missing meta for", inst, buf); @@ -2840,10 +2937,12 @@ static int msm_vidc_queue_buffer(struct msm_vidc_inst *inst, struct msm_vidc_buf if (is_input_buffer(buf->type)) inst->power.buffer_counter++; - if (buf->type == MSM_VIDC_BUF_INPUT) - msm_vidc_debugfs_update(inst, MSM_VIDC_DEBUGFS_EVENT_ETB); - else if (buf->type == MSM_VIDC_BUF_OUTPUT) - msm_vidc_debugfs_update(inst, MSM_VIDC_DEBUGFS_EVENT_FTB); + if (is_input_buffer(buf->type)) + etype = MSM_VIDC_DEBUGFS_EVENT_ETB; + else + etype = MSM_VIDC_DEBUGFS_EVENT_FTB; + + msm_vidc_update_stats(inst, buf, etype); return 0; } diff --git a/driver/vidc/src/msm_vidc_vb2.c b/driver/vidc/src/msm_vidc_vb2.c index 002ff5d7b7..0549d3f204 100644 --- a/driver/vidc/src/msm_vidc_vb2.c +++ b/driver/vidc/src/msm_vidc_vb2.c @@ -240,6 +240,15 @@ int msm_vidc_start_streaming(struct vb2_queue *q, unsigned int count) if (rc) goto error; + /* initialize statistics timer(one time) */ + if (!inst->stats.time_ms) + inst->stats.time_ms = ktime_get_ns() / 1000 / 1000; + + /* schedule to print buffer statistics */ + rc = schedule_stats_work(inst); + if (rc) + goto error; + i_vpr_h(inst, "Streamon: %s successful\n", v4l2_type_name(q->type)); return rc; diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index d28a49aa02..d772e82156 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -729,7 +729,7 @@ static int handle_input_buffer(struct msm_vidc_inst *inst, return -EINVAL; } if (buffer->addr_offset / frame_size < batch_size - 1) { - i_vpr_h(inst, "%s: superframe last buffer not reached: %u, %u, %u\n", + i_vpr_l(inst, "%s: superframe last buffer not reached: %u, %u, %u\n", __func__, buffer->addr_offset, frame_size, batch_size); return 0; } @@ -743,7 +743,7 @@ static int handle_input_buffer(struct msm_vidc_inst *inst, buf->flags = get_driver_buffer_flags(inst, buffer->flags); print_vidc_buffer(VIDC_HIGH, "high", "dqbuf", inst, buf); - msm_vidc_debugfs_update(inst, MSM_VIDC_DEBUGFS_EVENT_EBD); + msm_vidc_update_stats(inst, buf, MSM_VIDC_DEBUGFS_EVENT_EBD); return rc; } @@ -869,7 +869,7 @@ static int handle_output_buffer(struct msm_vidc_inst *inst, msm_vidc_update_timestamp(inst, buf->timestamp); print_vidc_buffer(VIDC_HIGH, "high", "dqbuf", inst, buf); - msm_vidc_debugfs_update(inst, MSM_VIDC_DEBUGFS_EVENT_FBD); + msm_vidc_update_stats(inst, buf, MSM_VIDC_DEBUGFS_EVENT_FBD); return rc; } @@ -916,7 +916,7 @@ static int handle_input_metadata_buffer(struct msm_vidc_inst *inst, return -EINVAL; } if (buffer->addr_offset / frame_size < batch_size - 1) { - i_vpr_h(inst, "%s: superframe last buffer not reached: %u, %u, %u\n", + i_vpr_l(inst, "%s: superframe last buffer not reached: %u, %u, %u\n", __func__, buffer->addr_offset, frame_size, batch_size); return 0; } @@ -928,7 +928,7 @@ static int handle_input_metadata_buffer(struct msm_vidc_inst *inst, if (buffer->flags & HFI_BUF_FW_FLAG_LAST) buf->flags |= MSM_VIDC_BUF_FLAG_LAST; - print_vidc_buffer(VIDC_HIGH, "high", "dqbuf", inst, buf); + print_vidc_buffer(VIDC_LOW, "low ", "dqbuf", inst, buf); return rc; } @@ -965,7 +965,7 @@ static int handle_output_metadata_buffer(struct msm_vidc_inst *inst, if (buffer->flags & HFI_BUF_FW_FLAG_LAST) buf->flags |= MSM_VIDC_BUF_FLAG_LAST; - print_vidc_buffer(VIDC_HIGH, "high", "dqbuf", inst, buf); + print_vidc_buffer(VIDC_LOW, "low ", "dqbuf", inst, buf); return rc; } @@ -1672,6 +1672,25 @@ static int queue_response_work(struct msm_vidc_inst *inst, return 0; } +int cancel_response_work(struct msm_vidc_inst *inst) +{ + struct response_work *work, *dummy_work = NULL; + + if (!inst) { + d_vpr_e("%s: Invalid arguments\n", __func__); + return -EINVAL; + } + cancel_delayed_work(&inst->response_work); + + list_for_each_entry_safe(work, dummy_work, &inst->response_works, list) { + list_del(&work->list); + kfree(work->data); + kfree(work); + } + + return 0; +} + static int handle_session_response(struct msm_vidc_core *core, struct hfi_header *hdr) { From 79ac405a32ab1a41a5a0695164afd87badb83d2b Mon Sep 17 00:00:00 2001 From: Dikshita Agarwal Date: Mon, 28 Jun 2021 12:31:19 +0530 Subject: [PATCH 0396/1061] video: driver: update required fields of stream parm struct - Set capability for capture and output plane. - Update denominator and numerator of timeperframe structure to default values if set with zero. Fixes: v4l2-compliance: testParm(VIDIOC_S/G_PARM) for encoder. Change-Id: Ib9d92f07fc526a11253ac5d1adc1b639eef3632e Signed-off-by: Dikshita Agarwal --- driver/vidc/src/msm_venc.c | 15 ++++++++++----- 1 file changed, 10 insertions(+), 5 deletions(-) diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index b4691dfcf6..6a0ab7028f 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -1535,18 +1535,22 @@ int msm_venc_s_param(struct msm_vidc_inst *inst, timeperframe = &s_parm->parm.output.timeperframe; max_rate = capability->cap[OPERATING_RATE].max >> 16; default_rate = capability->cap[OPERATING_RATE].value >> 16; + s_parm->parm.output.capability = V4L2_CAP_TIMEPERFRAME; } else { timeperframe = &s_parm->parm.capture.timeperframe; is_frame_rate = true; max_rate = capability->cap[FRAME_RATE].max >> 16; default_rate = capability->cap[FRAME_RATE].value >> 16; + s_parm->parm.capture.capability = V4L2_CAP_TIMEPERFRAME; } if (!timeperframe->denominator || !timeperframe->numerator) { - i_vpr_e(inst, "%s: type %s, invalid rate\n", __func__, - v4l2_type_name(s_parm->type)); - input_rate = default_rate; - goto set_default; + i_vpr_e(inst, "%s: type %s, invalid rate, update with default\n", + __func__, v4l2_type_name(s_parm->type)); + if (!timeperframe->numerator) + timeperframe->numerator = 1; + if (!timeperframe->denominator) + timeperframe->denominator = default_rate; } us_per_frame = timeperframe->numerator * (u64)USEC_PER_SEC; @@ -1561,7 +1565,6 @@ int msm_venc_s_param(struct msm_vidc_inst *inst, input_rate = (u64)USEC_PER_SEC; do_div(input_rate, us_per_frame); -set_default: i_vpr_h(inst, "%s: type %s, %s value %d\n", __func__, v4l2_type_name(s_parm->type), is_frame_rate ? "frame rate" : "operating rate", input_rate); @@ -1643,11 +1646,13 @@ int msm_venc_g_param(struct msm_vidc_inst *inst, timeperframe->numerator = 1; timeperframe->denominator = capability->cap[OPERATING_RATE].value >> 16; + s_parm->parm.output.capability = V4L2_CAP_TIMEPERFRAME; } else { timeperframe = &s_parm->parm.capture.timeperframe; timeperframe->numerator = 1; timeperframe->denominator = capability->cap[FRAME_RATE].value >> 16; + s_parm->parm.capture.capability = V4L2_CAP_TIMEPERFRAME; } i_vpr_h(inst, "%s: type %s, num %u denom %u\n", From 40c0938c201ea2ecadf89c306edc4c6fb1c2d455 Mon Sep 17 00:00:00 2001 From: Dikshita Agarwal Date: Tue, 27 Jul 2021 14:49:59 +0530 Subject: [PATCH 0397/1061] video: driver: remove unsupported selection targets for encoder - CROP should be supported only for V4L2_SEL_TGT_CROP selection target. - Compose should be supported only for V4L2_SEL_TGT_COMPOSE selecion target. Fixes: v4l2-compliance: testCrop/testCompose (VIDIOC_S_SELECTION) on encoder. Change-Id: Iaada9e0078602ab5ddcdd25d94c9abb29c053811 Signed-off-by: Dikshita Agarwal --- driver/vidc/src/msm_venc.c | 5 ----- 1 file changed, 5 deletions(-) diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index b4691dfcf6..be099644eb 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -1374,8 +1374,6 @@ int msm_venc_s_selection(struct msm_vidc_inst* inst, struct v4l2_selection* s) } switch (s->target) { - case V4L2_SEL_TGT_CROP_BOUNDS: - case V4L2_SEL_TGT_CROP_DEFAULT: case V4L2_SEL_TGT_CROP: if (s->r.left || s->r.top) { i_vpr_h(inst, "%s: unsupported top %d or left %d\n", @@ -1410,9 +1408,6 @@ int msm_venc_s_selection(struct msm_vidc_inst* inst, struct v4l2_selection* s) if (rc) return rc; break; - case V4L2_SEL_TGT_COMPOSE_BOUNDS: - case V4L2_SEL_TGT_COMPOSE_PADDED: - case V4L2_SEL_TGT_COMPOSE_DEFAULT: case V4L2_SEL_TGT_COMPOSE: if (s->r.left < inst->crop.left) { i_vpr_e(inst, From 77ac864dc5c033f804c35106b36f3aad5b564c09 Mon Sep 17 00:00:00 2001 From: Dikshita Agarwal Date: Tue, 27 Jul 2021 14:52:30 +0530 Subject: [PATCH 0398/1061] video: driver: report unsupported for invalid selection setting - Decoder should support G_SELECTION on capture plane only, so return -EINVAL for other buffer types. - Return -EINVAL for unsupported/invalid selection target. Fixes: v4l2-compliance: testLegacyCrop(VIDIOC_G_SELECTION) on decoder. Change-Id: I790f0fb95cb5f1d0e5b2132f4e580b7fa1b68c51 Signed-off-by: Dikshita Agarwal --- driver/vidc/src/msm_vdec.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 9dda0ca172..395d57eb4a 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -2288,6 +2288,10 @@ int msm_vdec_g_selection(struct msm_vidc_inst* inst, struct v4l2_selection* s) d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } + if (s->type != OUTPUT_MPLANE && s->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) { + i_vpr_e(inst, "%s: invalid type %d\n", __func__, s->type); + return -EINVAL; + } switch (s->target) { case V4L2_SEL_TGT_CROP_BOUNDS: @@ -2297,12 +2301,15 @@ int msm_vdec_g_selection(struct msm_vidc_inst* inst, struct v4l2_selection* s) case V4L2_SEL_TGT_COMPOSE_PADDED: case V4L2_SEL_TGT_COMPOSE_DEFAULT: case V4L2_SEL_TGT_COMPOSE: - default: s->r.left = inst->crop.left; s->r.top = inst->crop.top; s->r.width = inst->crop.width; s->r.height = inst->crop.height; break; + default: + i_vpr_e(inst, "%s: invalid target %d\n", + __func__, s->target); + return -EINVAL; } i_vpr_h(inst, "%s: target %d, r [%d, %d, %d, %d]\n", __func__, s->target, s->r.top, s->r.left, From fdf0894ad186302bbcb5e542492748e31a87cfa0 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Thu, 29 Jul 2021 10:29:37 -0700 Subject: [PATCH 0399/1061] video: driver: Align buffer macro file with CL: 32091493 Align driver buffer macro file with fw file of CL: 32091493 to pick HFI_BUFFER_NON_COMV_ENC buffer optimization changes. Change-Id: If312f3c97708f32b890fd14bcd8b461bb39083d5 Signed-off-by: Akshata Sahukar --- driver/variant/iris2/inc/hfi_buffer_iris2.h | 10 +++------- 1 file changed, 3 insertions(+), 7 deletions(-) diff --git a/driver/variant/iris2/inc/hfi_buffer_iris2.h b/driver/variant/iris2/inc/hfi_buffer_iris2.h index cdfd6103b3..1331c9bb70 100644 --- a/driver/variant/iris2/inc/hfi_buffer_iris2.h +++ b/driver/variant/iris2/inc/hfi_buffer_iris2.h @@ -1239,7 +1239,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ _size = (standard == HFI_CODEC_ENCODE_HEVC) ? (256 + 16 * \ (14 + ((((frame_height_coded) >> 5) + 7) >> 3))) : \ (256 + 16 * (14 + ((((frame_height_coded) >> 4) + 7) >> 3))); \ - _size *= 6; \ + _size *= 11; \ if (num_vpp_pipes_enc > 1) \ { \ _size = HFI_ALIGN(_size, VENUS_DMA_ALIGNMENT) * \ @@ -1256,10 +1256,8 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define SIZE_LINE_BUF_SDE(frame_width_coded) HFI_ALIGN((256 + \ (16 * ((frame_width_coded) >> 4))), VENUS_DMA_ALIGNMENT) -#define SIZE_BSE_SLICE_CMD_BUF ((((8192 << 2) + 7) & (~7)) * 6) -#define SIZE_BSE_REG_BUF ((((512 << 3) + 7) & (~7)) * 4) -#define SIZE_VPP_REG_BUF ((((HFI_VENUS_VPPSG_MAX_REGISTERS << 3) +\ - 31) & (~31)) * 10) +#define SIZE_BSE_SLICE_CMD_BUF ((((8192 << 2) + 7) & (~7)) * 3) + #define SIZE_LAMBDA_LUT (256 * 11) #define SIZE_OVERRIDE_BUF(num_lcumb) (HFI_ALIGN(((16 * (((num_lcumb) + 7)\ >> 3))), VENUS_DMA_ALIGNMENT) * 2) @@ -1401,8 +1399,6 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ ENC_BITCNT_BUF_SIZE(num_lcu_in_frame) + \ ENC_BITMAP_BUF_SIZE(num_lcu_in_frame) + \ SIZE_BSE_SLICE_CMD_BUF + \ - SIZE_BSE_REG_BUF + \ - SIZE_VPP_REG_BUF + \ SIZE_LAMBDA_LUT + \ SIZE_OVERRIDE_BUF(num_lcumb) + \ SIZE_IR_BUF(num_lcu_in_frame); \ From a7ce77cfc7805d919ba46c6bd1b5e14675d245a1 Mon Sep 17 00:00:00 2001 From: Dikshita Agarwal Date: Mon, 21 Jun 2021 18:35:15 +0530 Subject: [PATCH 0400/1061] video: driver: implement TRY_FMT for encoder and decoder Any video device which supports capture multiplanar buf type should implement VIDIOC_TRY_FMT. Fixes: v4l2-compliance: testTryFormats (VIDIOC_TRY_FMT). Change-Id: Id7ec171115c9374c6173fcf74a609382c3acf2d0 Signed-off-by: Dikshita Agarwal --- driver/vidc/inc/msm_vdec.h | 1 + driver/vidc/inc/msm_venc.h | 1 + driver/vidc/inc/msm_vidc.h | 1 + driver/vidc/inc/msm_vidc_v4l2.h | 5 ++- driver/vidc/src/msm_vdec.c | 50 +++++++++++++++++++++++++++++ driver/vidc/src/msm_venc.c | 46 ++++++++++++++++++++++++++ driver/vidc/src/msm_vidc.c | 25 +++++++++++++++ driver/vidc/src/msm_vidc_platform.c | 2 ++ driver/vidc/src/msm_vidc_v4l2.c | 28 ++++++++++++++++ 9 files changed, 158 insertions(+), 1 deletion(-) diff --git a/driver/vidc/inc/msm_vdec.h b/driver/vidc/inc/msm_vdec.h index 90e795ca3e..dc538907a4 100644 --- a/driver/vidc/inc/msm_vdec.h +++ b/driver/vidc/inc/msm_vdec.h @@ -14,6 +14,7 @@ int msm_vdec_streamon_input(struct msm_vidc_inst *inst); int msm_vdec_streamoff_output(struct msm_vidc_inst *inst); int msm_vdec_streamon_output(struct msm_vidc_inst *inst); int msm_vdec_qbuf(struct msm_vidc_inst *inst, struct vb2_buffer *vb2); +int msm_vdec_try_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f); int msm_vdec_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f); int msm_vdec_g_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f); int msm_vdec_s_selection(struct msm_vidc_inst* inst, struct v4l2_selection* s); diff --git a/driver/vidc/inc/msm_venc.h b/driver/vidc/inc/msm_venc.h index e10889ab69..f259ff7a7b 100644 --- a/driver/vidc/inc/msm_venc.h +++ b/driver/vidc/inc/msm_venc.h @@ -15,6 +15,7 @@ int msm_venc_streamoff_output(struct msm_vidc_inst *inst); int msm_venc_streamon_output(struct msm_vidc_inst *inst); int msm_venc_qbuf(struct msm_vidc_inst *inst, struct vb2_buffer *vb2); int msm_venc_process_cmd(struct msm_vidc_inst *inst, u32 cmd); +int msm_venc_try_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f); int msm_venc_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f); int msm_venc_s_fmt_output(struct msm_vidc_inst *inst, struct v4l2_format *f); int msm_venc_g_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f); diff --git a/driver/vidc/inc/msm_vidc.h b/driver/vidc/inc/msm_vidc.h index 9f3d3d33c3..e8e0def8a6 100644 --- a/driver/vidc/inc/msm_vidc.h +++ b/driver/vidc/inc/msm_vidc.h @@ -19,6 +19,7 @@ int msm_vidc_close(void *instance); int msm_vidc_suspend(int core_id); int msm_vidc_querycap(void *instance, struct v4l2_capability *cap); int msm_vidc_enum_fmt(void *instance, struct v4l2_fmtdesc *f); +int msm_vidc_try_fmt(void *instance, struct v4l2_format *f); int msm_vidc_s_fmt(void *instance, struct v4l2_format *f); int msm_vidc_g_fmt(void *instance, struct v4l2_format *f); int msm_vidc_s_selection(void* instance, struct v4l2_selection* s); diff --git a/driver/vidc/inc/msm_vidc_v4l2.h b/driver/vidc/inc/msm_vidc_v4l2.h index 65ac6af676..579b2d349f 100644 --- a/driver/vidc/inc/msm_vidc_v4l2.h +++ b/driver/vidc/inc/msm_vidc_v4l2.h @@ -18,6 +18,8 @@ int msm_v4l2_querycap(struct file *filp, void *fh, struct v4l2_capability *cap); int msm_v4l2_enum_fmt(struct file *file, void *fh, struct v4l2_fmtdesc *f); +int msm_v4l2_try_fmt(struct file *file, void *fh, + struct v4l2_format *f); int msm_v4l2_s_fmt(struct file *file, void *fh, struct v4l2_format *f); int msm_v4l2_g_fmt(struct file *file, void *fh, @@ -62,4 +64,5 @@ int msm_v4l2_querymenu(struct file *file, void *fh, struct v4l2_querymenu *qmenu); unsigned int msm_v4l2_poll(struct file *filp, struct poll_table_struct *pt); -#endif // _MSM_VIDC_V4L2_H_ \ No newline at end of file + +#endif // _MSM_VIDC_V4L2_H_ diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 9dda0ca172..86a030ad3d 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -2090,6 +2090,56 @@ int msm_vdec_process_cmd(struct msm_vidc_inst *inst, u32 cmd) return 0; } +int msm_vdec_try_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) +{ + int rc = 0; + struct msm_vidc_core *core; + struct v4l2_pix_format_mplane *pixmp = &f->fmt.pix_mp; + u32 pix_fmt; + + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + core = inst->core; + + memset(pixmp->reserved, 0, sizeof(pixmp->reserved)); + if (f->type == INPUT_MPLANE) { + pix_fmt = v4l2_codec_to_driver(f->fmt.pix_mp.pixelformat, __func__); + if (!pix_fmt) { + i_vpr_h(inst, "%s: unsupported codec, set default params\n", __func__); + f->fmt.pix_mp.width = DEFAULT_WIDTH; + f->fmt.pix_mp.height = DEFAULT_HEIGHT; + f->fmt.pix_mp.pixelformat = V4L2_PIX_FMT_H264; + pix_fmt = v4l2_codec_to_driver(f->fmt.pix_mp.pixelformat, __func__); + } + } else if (f->type == OUTPUT_MPLANE) { + if (inst->vb2q[INPUT_PORT].streaming) { + f->fmt.pix_mp.height = inst->fmts[INPUT_PORT].fmt.pix_mp.height; + f->fmt.pix_mp.width = inst->fmts[INPUT_PORT].fmt.pix_mp.width; + } + pix_fmt = v4l2_colorformat_to_driver(f->fmt.pix_mp.pixelformat, __func__); + if (!pix_fmt) { + i_vpr_h(inst, "%s: unsupported format, set default params\n", __func__); + f->fmt.pix_mp.pixelformat = V4L2_PIX_FMT_VIDC_NV12C; + f->fmt.pix_mp.width = VIDEO_Y_STRIDE_PIX(f->fmt.pix_mp.pixelformat, + DEFAULT_WIDTH); + f->fmt.pix_mp.height = VIDEO_Y_SCANLINES(f->fmt.pix_mp.pixelformat, + DEFAULT_HEIGHT); + pix_fmt = v4l2_colorformat_to_driver(f->fmt.pix_mp.pixelformat, __func__); + } + } else { + i_vpr_e(inst, "%s: invalid type %d\n", __func__, f->type); + return -EINVAL; + } + + if (pixmp->field == V4L2_FIELD_ANY) + pixmp->field = V4L2_FIELD_NONE; + + pixmp->num_planes = 1; + return rc; +} + int msm_vdec_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) { int rc = 0; diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index b4691dfcf6..9f45bcb7ec 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -1036,6 +1036,52 @@ error: return rc; } +int msm_venc_try_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) +{ + int rc = 0; + struct msm_vidc_core *core; + struct v4l2_pix_format_mplane *pixmp = &f->fmt.pix_mp; + u32 pix_fmt; + + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + core = inst->core; + + memset(pixmp->reserved, 0, sizeof(pixmp->reserved)); + + if (f->type == INPUT_MPLANE) { + pix_fmt = v4l2_colorformat_to_driver(f->fmt.pix_mp.pixelformat, __func__); + if (!pix_fmt) { + i_vpr_h(inst, "%s: unsupported format, set default params\n", __func__); + f->fmt.pix_mp.pixelformat = V4L2_PIX_FMT_VIDC_NV12C; + f->fmt.pix_mp.width = VIDEO_Y_STRIDE_PIX(f->fmt.pix_mp.pixelformat, + DEFAULT_WIDTH); + f->fmt.pix_mp.height = VIDEO_Y_SCANLINES(f->fmt.pix_mp.pixelformat, + DEFAULT_HEIGHT); + } + } else if (f->type == OUTPUT_MPLANE) { + pix_fmt = v4l2_codec_to_driver(f->fmt.pix_mp.pixelformat, __func__); + if (!pix_fmt) { + i_vpr_h(inst, "%s: unsupported codec, set default params\n", __func__); + f->fmt.pix_mp.width = DEFAULT_WIDTH; + f->fmt.pix_mp.height = DEFAULT_HEIGHT; + f->fmt.pix_mp.pixelformat = V4L2_PIX_FMT_H264; + pix_fmt = v4l2_colorformat_to_driver(f->fmt.pix_mp.pixelformat, __func__); + } + } else { + i_vpr_e(inst, "%s: invalid type %d\n", __func__, f->type); + return -EINVAL; + } + + if (pixmp->field == V4L2_FIELD_ANY) + pixmp->field = V4L2_FIELD_NONE; + pixmp->num_planes = 1; + + return rc; +} + int msm_venc_s_fmt_output(struct msm_vidc_inst *inst, struct v4l2_format *f) { int rc = 0; diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index 202def015d..485552679d 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -210,6 +210,31 @@ int msm_vidc_query_menu(void *instance, struct v4l2_querymenu *qmenu) } EXPORT_SYMBOL(msm_vidc_query_menu); +int msm_vidc_try_fmt(void *instance, struct v4l2_format *f) +{ + int rc = 0; + struct msm_vidc_inst *inst = instance; + + if (!inst || !f) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (!msm_vidc_allow_s_fmt(inst, f->type)) + return -EBUSY; + + if (inst->domain == MSM_VIDC_DECODER) + rc = msm_vdec_try_fmt(inst, f); + if (inst->domain == MSM_VIDC_ENCODER) + rc = msm_venc_try_fmt(inst, f); + + if (rc) + i_vpr_e(inst, "%s: try_fmt(%d) failed %d\n", + __func__, f->type, rc); + return rc; +} +EXPORT_SYMBOL(msm_vidc_try_fmt); + int msm_vidc_s_fmt(void *instance, struct v4l2_format *f) { int rc = 0; diff --git a/driver/vidc/src/msm_vidc_platform.c b/driver/vidc/src/msm_vidc_platform.c index 2299052e4c..1fe226e3fe 100644 --- a/driver/vidc/src/msm_vidc_platform.c +++ b/driver/vidc/src/msm_vidc_platform.c @@ -26,6 +26,8 @@ static struct v4l2_ioctl_ops msm_v4l2_ioctl_ops = { .vidioc_enum_fmt_vid_out = msm_v4l2_enum_fmt, .vidioc_enum_framesizes = msm_v4l2_enum_framesizes, .vidioc_enum_frameintervals = msm_v4l2_enum_frameintervals, + .vidioc_try_fmt_vid_cap_mplane = msm_v4l2_try_fmt, + .vidioc_try_fmt_vid_out_mplane = msm_v4l2_try_fmt, .vidioc_s_fmt_vid_cap = msm_v4l2_s_fmt, .vidioc_s_fmt_vid_out = msm_v4l2_s_fmt, .vidioc_s_fmt_vid_cap_mplane = msm_v4l2_s_fmt, diff --git a/driver/vidc/src/msm_vidc_v4l2.c b/driver/vidc/src/msm_vidc_v4l2.c index cf37cd4bc9..b8fd2f242a 100644 --- a/driver/vidc/src/msm_vidc_v4l2.c +++ b/driver/vidc/src/msm_vidc_v4l2.c @@ -107,6 +107,34 @@ unlock: return rc; } +int msm_v4l2_try_fmt(struct file *filp, void *fh, struct v4l2_format *f) +{ + struct msm_vidc_inst *inst = get_vidc_inst(filp, fh); + int rc = 0; + + inst = get_inst_ref(g_core, inst); + if (!inst) { + d_vpr_e("%s: invalid instance\n", __func__); + return -EINVAL; + } + + inst_lock(inst, __func__); + if (is_session_error(inst)) { + i_vpr_e(inst, "%s: inst in error state\n", __func__); + rc = -EBUSY; + goto unlock; + } + rc = msm_vidc_try_fmt((void *)inst, f); + if (rc) + goto unlock; + +unlock: + inst_unlock(inst, __func__); + put_inst(inst); + + return rc; +} + int msm_v4l2_s_fmt(struct file *filp, void *fh, struct v4l2_format *f) { From 034d732cc7fd536318f7945c9a6782a1ee23cb11 Mon Sep 17 00:00:00 2001 From: Dikshita Agarwal Date: Tue, 29 Jun 2021 15:43:25 +0530 Subject: [PATCH 0401/1061] video: driver: remove unsupported ioctls from ioctls ops Decoder is not supposed to support VIDIOC_ENCODER_CMD. Encoder is not supposed to support VIDIOC_DECODER_CMD. To do the same define separate ioctl ops for encoder and decoder and remove unsupported ops. Fixes: v4l2-compliance: testEncoder(VIDIOC_(TRY_)ENCODER_CMD) on decoder. testDecoder(VIDIOC_(TRY_)DECODER_CMD) on encoder. Change-Id: I1560bd2f64c5df1e4b4f125d5b6d542eb9eb42e3 Signed-off-by: Dikshita Agarwal --- driver/vidc/inc/msm_vidc_core.h | 3 +- driver/vidc/src/msm_vidc_platform.c | 44 +++++++++++++++++++++++++++-- driver/vidc/src/msm_vidc_probe.c | 5 +++- 3 files changed, 47 insertions(+), 5 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_core.h b/driver/vidc/inc/msm_vidc_core.h index f1d6b9c96c..03321a7812 100644 --- a/driver/vidc/inc/msm_vidc_core.h +++ b/driver/vidc/inc/msm_vidc_core.h @@ -101,7 +101,8 @@ struct msm_vidc_core { u32 packet_size; u8 *response_packet; struct v4l2_file_operations *v4l2_file_ops; - struct v4l2_ioctl_ops *v4l2_ioctl_ops; + struct v4l2_ioctl_ops *v4l2_ioctl_ops_enc; + struct v4l2_ioctl_ops *v4l2_ioctl_ops_dec; struct v4l2_ctrl_ops *v4l2_ctrl_ops; struct vb2_ops *vb2_ops; struct vb2_mem_ops *vb2_mem_ops; diff --git a/driver/vidc/src/msm_vidc_platform.c b/driver/vidc/src/msm_vidc_platform.c index 1fe226e3fe..c18f2c4b96 100644 --- a/driver/vidc/src/msm_vidc_platform.c +++ b/driver/vidc/src/msm_vidc_platform.c @@ -20,7 +20,45 @@ static struct v4l2_file_operations msm_v4l2_file_operations = { .poll = msm_v4l2_poll, }; -static struct v4l2_ioctl_ops msm_v4l2_ioctl_ops = { +static struct v4l2_ioctl_ops msm_v4l2_ioctl_ops_enc = { + .vidioc_querycap = msm_v4l2_querycap, + .vidioc_enum_fmt_vid_cap = msm_v4l2_enum_fmt, + .vidioc_enum_fmt_vid_out = msm_v4l2_enum_fmt, + .vidioc_enum_framesizes = msm_v4l2_enum_framesizes, + .vidioc_enum_frameintervals = msm_v4l2_enum_frameintervals, + .vidioc_try_fmt_vid_cap_mplane = msm_v4l2_try_fmt, + .vidioc_try_fmt_vid_out_mplane = msm_v4l2_try_fmt, + .vidioc_s_fmt_vid_cap = msm_v4l2_s_fmt, + .vidioc_s_fmt_vid_out = msm_v4l2_s_fmt, + .vidioc_s_fmt_vid_cap_mplane = msm_v4l2_s_fmt, + .vidioc_s_fmt_vid_out_mplane = msm_v4l2_s_fmt, + .vidioc_s_fmt_meta_out = msm_v4l2_s_fmt, + .vidioc_s_fmt_meta_cap = msm_v4l2_s_fmt, + .vidioc_g_fmt_vid_cap = msm_v4l2_g_fmt, + .vidioc_g_fmt_vid_out = msm_v4l2_g_fmt, + .vidioc_g_fmt_vid_cap_mplane = msm_v4l2_g_fmt, + .vidioc_g_fmt_vid_out_mplane = msm_v4l2_g_fmt, + .vidioc_g_fmt_meta_out = msm_v4l2_g_fmt, + .vidioc_g_fmt_meta_cap = msm_v4l2_g_fmt, + .vidioc_g_selection = msm_v4l2_g_selection, + .vidioc_s_selection = msm_v4l2_s_selection, + .vidioc_s_parm = msm_v4l2_s_parm, + .vidioc_g_parm = msm_v4l2_g_parm, + .vidioc_reqbufs = msm_v4l2_reqbufs, + .vidioc_qbuf = msm_v4l2_qbuf, + .vidioc_dqbuf = msm_v4l2_dqbuf, + .vidioc_streamon = msm_v4l2_streamon, + .vidioc_streamoff = msm_v4l2_streamoff, + .vidioc_s_ctrl = msm_v4l2_s_ctrl, + .vidioc_g_ctrl = msm_v4l2_g_ctrl, + .vidioc_queryctrl = msm_v4l2_queryctrl, + .vidioc_querymenu = msm_v4l2_querymenu, + .vidioc_subscribe_event = msm_v4l2_subscribe_event, + .vidioc_unsubscribe_event = msm_v4l2_unsubscribe_event, + .vidioc_encoder_cmd = msm_v4l2_encoder_cmd, +}; + +static struct v4l2_ioctl_ops msm_v4l2_ioctl_ops_dec = { .vidioc_querycap = msm_v4l2_querycap, .vidioc_enum_fmt_vid_cap = msm_v4l2_enum_fmt, .vidioc_enum_fmt_vid_out = msm_v4l2_enum_fmt, @@ -56,7 +94,6 @@ static struct v4l2_ioctl_ops msm_v4l2_ioctl_ops = { .vidioc_subscribe_event = msm_v4l2_subscribe_event, .vidioc_unsubscribe_event = msm_v4l2_unsubscribe_event, .vidioc_decoder_cmd = msm_v4l2_decoder_cmd, - .vidioc_encoder_cmd = msm_v4l2_encoder_cmd, }; static struct v4l2_ctrl_ops msm_v4l2_ctrl_ops = { @@ -89,7 +126,8 @@ static int msm_vidc_init_ops(struct msm_vidc_core *core) d_vpr_h("%s: initialize ops\n", __func__); core->v4l2_file_ops = &msm_v4l2_file_operations; - core->v4l2_ioctl_ops = &msm_v4l2_ioctl_ops; + core->v4l2_ioctl_ops_enc = &msm_v4l2_ioctl_ops_enc; + core->v4l2_ioctl_ops_dec = &msm_v4l2_ioctl_ops_dec; core->v4l2_ctrl_ops = &msm_v4l2_ctrl_ops; core->vb2_ops = &msm_vb2_ops; core->vb2_mem_ops = &msm_vb2_mem_ops; diff --git a/driver/vidc/src/msm_vidc_probe.c b/driver/vidc/src/msm_vidc_probe.c index 5f7b5956fa..d8890529cf 100644 --- a/driver/vidc/src/msm_vidc_probe.c +++ b/driver/vidc/src/msm_vidc_probe.c @@ -140,7 +140,10 @@ static int msm_vidc_register_video_device(struct msm_vidc_core *core, core->vdev[index].vdev.release = msm_vidc_release_video_device; core->vdev[index].vdev.fops = core->v4l2_file_ops; - core->vdev[index].vdev.ioctl_ops = core->v4l2_ioctl_ops; + if (type == MSM_VIDC_DECODER) + core->vdev[index].vdev.ioctl_ops = core->v4l2_ioctl_ops_dec; + else + core->vdev[index].vdev.ioctl_ops = core->v4l2_ioctl_ops_enc; core->vdev[index].vdev.vfl_dir = VFL_DIR_M2M; core->vdev[index].type = type; core->vdev[index].vdev.v4l2_dev = &core->v4l2_dev; From c24d458399c066e5e1f01b7a1fd79053d5c95851 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Wed, 4 Aug 2021 13:13:02 +0530 Subject: [PATCH 0402/1061] video: driver: fix stack stack-out-of-bounds issue In msm_vidc_packetize_control api, there is a stack-out-of-bounds possibility. So added change to fix this issue. Change-Id: I9c9a0217b55dd2586cfd6f814401c80ddb0c011f Signed-off-by: Govindaraj Rajagopal --- driver/vidc/src/msm_vidc_control.c | 33 ++++++++++++++++++++++-------- 1 file changed, 24 insertions(+), 9 deletions(-) diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 2c0778356b..a1e042792c 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -177,11 +177,25 @@ static int msm_vidc_packetize_control(struct msm_vidc_inst *inst, void *hfi_val, u32 payload_size, const char *func) { int rc = 0; + u64 payload = 0; - i_vpr_h(inst, - "set cap: name: %24s, cap value: %#10x, hfi: %#10x\n", - cap_name(cap_id), inst->capabilities->cap[cap_id].value, - *(s64 *)hfi_val); + if (payload_size == sizeof(u32)) + payload = *(u32 *)hfi_val; + else if (payload_size == sizeof(u64)) + payload = *(u64 *)hfi_val; + else if (payload_size == sizeof(u8)) + payload = *(u8 *)hfi_val; + else if (payload_size == sizeof(u16)) + payload = *(u16 *)hfi_val; + + if (payload_size <= sizeof(u64)) + i_vpr_h(inst, + "set cap: name: %24s, cap value: %#10x, hfi: %#10x\n", + cap_name(cap_id), inst->capabilities->cap[cap_id].value, payload); + else + i_vpr_h(inst, + "set cap: name: %24s, hfi payload size %d\n", + cap_name(cap_id), payload_size); rc = venus_hfi_session_property(inst, inst->capabilities->cap[cap_id].hfi_id, @@ -189,13 +203,14 @@ static int msm_vidc_packetize_control(struct msm_vidc_inst *inst, msm_vidc_get_port_info(inst, cap_id), payload_type, hfi_val, - sizeof(payload_size)); - if (rc) - i_vpr_e(inst, - "%s: failed to set cap[%d] %s to fw\n", + payload_size); + if (rc) { + i_vpr_e(inst, "%s: failed to set cap[%d] %s to fw\n", __func__, cap_id, cap_name(cap_id)); + return rc; + } - return rc; + return 0; } static enum msm_vidc_inst_capability_type msm_vidc_get_cap_id( From 756a01af024794ad8f9afd1ff77cacd6005773f2 Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Thu, 5 Aug 2021 17:07:38 -0700 Subject: [PATCH 0403/1061] video: driver: Set default value for number of hw blocks Set default value for number of hw blocks as 1 for video client. Change-Id: I64927db72abc9b8ad4be9ff6d125ca9424787372 Signed-off-by: Darshana Patil --- driver/vidc/src/venus_hfi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index 24d3beb1d5..44c98b0a57 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -638,8 +638,8 @@ int __set_clk_rate(struct msm_vidc_core *core, return 0; d_vpr_p("Scaling clock %s to %llu, prev %llu\n", cl->name, rate, cl->prev); - /* TODO: Set num_hw_blocks based on encoder or decoder */ memset(&client_data, 0, sizeof(client_data)); + client_data.num_hw_blocks = 1; rc = mmrm_client_set_value(client, &client_data, rate); if (rc) { d_vpr_e("%s: Failed to set clock rate %llu %s: %d\n", From 05270719fb26a4c8d301a77e9eae908547da80a5 Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Tue, 3 Aug 2021 16:52:47 -0700 Subject: [PATCH 0404/1061] video: driver: add max num reorder frames support add support for HFI_PROP_MAX_NUM_REORDER_FRAMES. add ctrl for this metadata for avc and hevc. Change-Id: I9a7b95f130e58f810255aff23e9b605304841072 Signed-off-by: Darshana Patil --- driver/platform/waipio/src/msm_vidc_waipio.c | 5 ++ driver/vidc/inc/msm_vidc_driver.h | 3 +- driver/vidc/inc/msm_vidc_internal.h | 1 + driver/vidc/src/msm_vdec.c | 76 ++++++++++++++----- driver/vidc/src/msm_vidc_driver.c | 1 + driver/vidc/src/venus_hfi_response.c | 7 +- .../uapi/vidc/media/v4l2_vidc_extensions.h | 4 + 7 files changed, 74 insertions(+), 23 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 416cef545e..0608f9c9a1 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -1598,6 +1598,11 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 0, 100, 1, 100, V4L2_CID_MPEG_VIDC_VENC_COMPLEXITY}, + {META_MAX_NUM_REORDER_FRAMES, DEC, HEVC | H264, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_MAX_NUM_REORDER_FRAMES, + HFI_PROP_MAX_NUM_REORDER_FRAMES}, }; /* diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index d4bdea95be..02833daeb6 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -123,7 +123,8 @@ static inline bool is_output_meta_enabled(struct msm_vidc_inst *inst) inst->capabilities->cap[META_SEI_CLL].value || inst->capabilities->cap[META_BUF_TAG].value || inst->capabilities->cap[META_DPB_TAG_LIST].value || - inst->capabilities->cap[META_SUBFRAME_OUTPUT].value); + inst->capabilities->cap[META_SUBFRAME_OUTPUT].value || + inst->capabilities->cap[META_MAX_NUM_REORDER_FRAMES].value); } else if (is_encode_session(inst)) { enabled = (inst->capabilities->cap[META_LTR_MARK_USE].value || inst->capabilities->cap[META_BUF_TAG].value); diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 5d46ee028b..a350053eaa 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -472,6 +472,7 @@ enum msm_vidc_inst_capability_type { META_ROI_INFO, META_DEC_QP_METADATA, COMPLEXITY, + META_MAX_NUM_REORDER_FRAMES, INST_CAP_MAX, }; diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 395d57eb4a..d9d9296b37 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -138,8 +138,10 @@ static int msm_vdec_set_bitstream_resolution(struct msm_vidc_inst *inst, HFI_PAYLOAD_U32, &resolution, sizeof(u32)); - if (rc) + if (rc) { i_vpr_e(inst, "%s: set property failed\n", __func__); + return rc; + } return rc; } @@ -173,8 +175,10 @@ static int msm_vdec_set_linear_stride_scanline(struct msm_vidc_inst *inst) HFI_PAYLOAD_U64, &payload, sizeof(u64)); - if (rc) + if (rc) { i_vpr_e(inst, "%s: set property failed\n", __func__); + return rc; + } return rc; } @@ -215,8 +219,10 @@ static int msm_vdec_set_crop_offsets(struct msm_vidc_inst *inst, HFI_PAYLOAD_64_PACKED, &payload, sizeof(u64)); - if (rc) + if (rc) { i_vpr_e(inst, "%s: set property failed\n", __func__); + return rc; + } return rc; } @@ -248,8 +254,10 @@ static int msm_vdec_set_bit_depth(struct msm_vidc_inst *inst, HFI_PAYLOAD_U32, &bitdepth, sizeof(u32)); - if (rc) + if (rc) { i_vpr_e(inst, "%s: set property failed\n", __func__); + return rc; + } return rc; } @@ -305,8 +313,10 @@ static int msm_vdec_set_coded_frames(struct msm_vidc_inst *inst, HFI_PAYLOAD_U32, &coded_frames, sizeof(u32)); - if (rc) + if (rc) { i_vpr_e(inst, "%s: set property failed\n", __func__); + return rc; + } return rc; } @@ -333,9 +343,10 @@ static int msm_vdec_set_min_output_count(struct msm_vidc_inst *inst, HFI_PAYLOAD_U32, &min_output, sizeof(u32)); - if (rc) + if (rc) { i_vpr_e(inst, "%s: set property failed\n", __func__); - + return rc; + } return rc; } @@ -359,8 +370,10 @@ static int msm_vdec_set_picture_order_count(struct msm_vidc_inst *inst, HFI_PAYLOAD_U32, &poc, sizeof(u32)); - if (rc) + if (rc) { i_vpr_e(inst, "%s: set property failed\n", __func__); + return rc; + } return rc; } @@ -425,8 +438,10 @@ static int msm_vdec_set_colorspace(struct msm_vidc_inst *inst, HFI_PAYLOAD_32_PACKED, &color_info, sizeof(u32)); - if (rc) + if (rc) { i_vpr_e(inst, "%s: set property failed\n", __func__); + return rc; + } return rc; } @@ -452,8 +467,10 @@ static int msm_vdec_set_profile(struct msm_vidc_inst *inst, HFI_PAYLOAD_U32_ENUM, &profile, sizeof(u32)); - if (rc) + if (rc) { i_vpr_e(inst, "%s: set property failed\n", __func__); + return rc; + } return rc; } @@ -479,8 +496,10 @@ static int msm_vdec_set_level(struct msm_vidc_inst *inst, HFI_PAYLOAD_U32_ENUM, &level, sizeof(u32)); - if (rc) + if (rc) { i_vpr_e(inst, "%s: set property failed\n", __func__); + return rc; + } return rc; } @@ -506,8 +525,10 @@ static int msm_vdec_set_tier(struct msm_vidc_inst *inst, HFI_PAYLOAD_U32_ENUM, &tier, sizeof(u32)); - if (rc) + if (rc) { i_vpr_e(inst, "%s: set property failed\n", __func__); + return rc; + } return rc; } @@ -531,8 +552,10 @@ static int msm_vdec_set_colorformat(struct msm_vidc_inst *inst) HFI_PAYLOAD_U32, &hfi_colorformat, sizeof(u32)); - if (rc) + if (rc) { i_vpr_e(inst, "%s: set property failed\n", __func__); + return rc; + } return rc; } @@ -561,8 +584,10 @@ static int msm_vdec_set_output_order(struct msm_vidc_inst *inst, HFI_PAYLOAD_U32, &output_order, sizeof(u32)); - if (rc) + if (rc) { i_vpr_e(inst, "%s: set property failed\n", __func__); + return rc; + } return rc; } @@ -587,8 +612,11 @@ static int msm_vdec_set_rap_frame(struct msm_vidc_inst *inst, HFI_PAYLOAD_U32, &rap_frame, sizeof(u32)); - if (rc) + if (rc) { i_vpr_e(inst, "%s: set property failed\n", __func__); + return rc; + } + return rc; } @@ -612,8 +640,10 @@ static int msm_vdec_set_thumbnail_mode(struct msm_vidc_inst *inst, HFI_PAYLOAD_U32, &thumbnail_mode, sizeof(u32)); - if (rc) + if (rc) { i_vpr_e(inst, "%s: set property failed\n", __func__); + return rc; + } return rc; } @@ -639,8 +669,10 @@ static int msm_vdec_set_conceal_color_8bit(struct msm_vidc_inst *inst, HFI_PAYLOAD_32_PACKED, &conceal_color_8bit, sizeof(u32)); - if (rc) + if (rc) { i_vpr_e(inst, "%s: set property failed\n", __func__); + return rc; + } return rc; } @@ -666,8 +698,10 @@ static int msm_vdec_set_conceal_color_10bit(struct msm_vidc_inst *inst, HFI_PAYLOAD_32_PACKED, &conceal_color_10bit, sizeof(u32)); - if (rc) + if (rc) { i_vpr_e(inst, "%s: set property failed\n", __func__); + return rc; + } return rc; } @@ -689,8 +723,11 @@ static int msm_vdec_set_host_max_buf_count(struct msm_vidc_inst *inst, HFI_PAYLOAD_U32, &count, sizeof(u32)); - if (rc) + if (rc) { + i_vpr_e(inst, "%s: set property failed\n", __func__); return rc; + } + return 0; } @@ -1023,6 +1060,7 @@ static int msm_vdec_subscribe_metadata(struct msm_vidc_inst *inst, META_DPB_TAG_LIST, META_SUBFRAME_OUTPUT, META_DEC_QP_METADATA, + META_MAX_NUM_REORDER_FRAMES, }; if (!inst || !inst->core || !inst->capabilities) { diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 50ecaf53d9..b10004b976 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -181,6 +181,7 @@ static const struct msm_vidc_cap_name cap_name_arr[] = { {META_ROI_INFO, "META_ROI_INFO" }, {META_DEC_QP_METADATA, "META_DEC_QP_METADATA" }, {COMPLEXITY, "COMPLEXITY" }, + {META_MAX_NUM_REORDER_FRAMES, "META_MAX_NUM_REORDER_FRAMES"}, {INST_CAP_MAX, "INST_CAP_MAX" }, }; diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index d772e82156..4e1c081c9c 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -46,9 +46,10 @@ void print_psc_properties(const char *str, struct msm_vidc_inst *inst, return; i_vpr_h(inst, - "%s: resolution %#x, crop offsets[0] %#x, crop offsets[1] %#x, bit depth %#x, coded frames %d " - "fw min count %d, poc %d, color info %d, profile %d, level %d, tier %d ", - str, subsc_params.bitstream_resolution, + "%s: width %d, height %d, crop offsets[0] %#x, crop offsets[1] %#x, bit depth %#x, coded frames %d " + "fw min count %d, poc %d, color info %d, profile %d, level %d, tier %d\n", + str, (subsc_params.bitstream_resolution & HFI_BITMASK_BITSTREAM_WIDTH) >> 16, + (subsc_params.bitstream_resolution & HFI_BITMASK_BITSTREAM_HEIGHT), subsc_params.crop_offsets[0], subsc_params.crop_offsets[1], subsc_params.bit_depth, subsc_params.coded_frames, subsc_params.fw_min_count, subsc_params.pic_order_cnt, diff --git a/include/uapi/vidc/media/v4l2_vidc_extensions.h b/include/uapi/vidc/media/v4l2_vidc_extensions.h index 95c29c50ab..fac7c2d113 100644 --- a/include/uapi/vidc/media/v4l2_vidc_extensions.h +++ b/include/uapi/vidc/media/v4l2_vidc_extensions.h @@ -135,6 +135,9 @@ enum v4l2_mpeg_vidc_blur_types { /* Encoder Complexity control */ #define V4L2_CID_MPEG_VIDC_VENC_COMPLEXITY \ (V4L2_CID_MPEG_VIDC_BASE + 0x2F) +/* Decoder Max Number of Reorder Frames */ +#define V4L2_CID_MPEG_VIDC_METADATA_MAX_NUM_REORDER_FRAMES \ + (V4L2_CID_MPEG_VIDC_BASE + 0x30) /* Deprecate below controls once availble in gki and gsi bionic header */ #ifndef V4L2_CID_MPEG_VIDEO_BASELAYER_PRIORITY_ID @@ -264,6 +267,7 @@ enum v4l2_mpeg_vidc_metadata { METADATA_DEC_QP_METADATA = 0x0300016f, METADATA_ROI_INFO = 0x03000173, METADATA_DPB_TAG_LIST = 0x03000179, + METADATA_MAX_NUM_REORDER_FRAMES = 0x03000127, }; enum meta_interlace_info { META_INTERLACE_INFO_NONE = 0x00000000, From a626d5c731344956f10d722c8c46d1615909b634 Mon Sep 17 00:00:00 2001 From: Chandrakant I Viraktamath Date: Wed, 9 Jun 2021 16:30:46 +0530 Subject: [PATCH 0405/1061] video: driver: Add checks for fw configured session params Query final values of session params like stage, pipe and quality mode from FW and check if they are the same intended values as configured by the driver. Change-Id: I1a504401a599860ab971e34e1e184e67631d6120 Signed-off-by: Chandrakant I Viraktamath --- driver/vidc/inc/msm_vidc_driver.h | 1 + driver/vidc/inc/msm_vidc_internal.h | 1 + driver/vidc/src/msm_vidc_driver.c | 46 ++++++++++++++++++++++++++++ driver/vidc/src/msm_vidc_vb2.c | 7 +++++ driver/vidc/src/venus_hfi_response.c | 25 +++++++++++++++ 5 files changed, 80 insertions(+) diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 02833daeb6..9a6901bf59 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -432,5 +432,6 @@ bool res_is_less_than(u32 width, u32 height, u32 ref_width, u32 ref_height); bool res_is_less_than_or_equal_to(u32 width, u32 height, u32 ref_width, u32 ref_height); +int msm_vidc_get_properties(struct msm_vidc_inst *inst); #endif // _MSM_VIDC_DRIVER_H_ diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index a350053eaa..729abc62f6 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -217,6 +217,7 @@ enum msm_vidc_port_type { OUTPUT_PORT, INPUT_META_PORT, OUTPUT_META_PORT, + PORT_NONE, MAX_PORT, }; diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index b10004b976..302a2b5856 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -5504,3 +5504,49 @@ int msm_vidc_check_scaling_supported(struct msm_vidc_inst *inst) return 0; } +struct msm_vidc_fw_query_params { + u32 hfi_prop_name; + u32 port; +}; + +int msm_vidc_get_properties(struct msm_vidc_inst *inst) +{ + int rc = 0; + int i; + + static const struct msm_vidc_fw_query_params fw_query_params[] = { + {HFI_PROP_STAGE, HFI_PORT_NONE}, + {HFI_PROP_PIPE, HFI_PORT_NONE}, + {HFI_PROP_QUALITY_MODE, HFI_PORT_BITSTREAM} + }; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + for (i = 0; i < ARRAY_SIZE(fw_query_params); i++) { + + if (is_decode_session(inst)) { + if (fw_query_params[i].hfi_prop_name == HFI_PROP_QUALITY_MODE) + continue; + } + + i_vpr_l(inst, "%s: querying fw for property %#x\n", __func__, + fw_query_params[i].hfi_prop_name); + + rc = venus_hfi_session_property(inst, + fw_query_params[i].hfi_prop_name, + (HFI_HOST_FLAGS_RESPONSE_REQUIRED | + HFI_HOST_FLAGS_INTR_REQUIRED | + HFI_HOST_FLAGS_GET_PROPERTY), + fw_query_params[i].port, + HFI_PAYLOAD_NONE, + NULL, + 0); + if (rc) + return rc; + } + + return 0; +} diff --git a/driver/vidc/src/msm_vidc_vb2.c b/driver/vidc/src/msm_vidc_vb2.c index 0549d3f204..2298ea9e88 100644 --- a/driver/vidc/src/msm_vidc_vb2.c +++ b/driver/vidc/src/msm_vidc_vb2.c @@ -249,6 +249,13 @@ int msm_vidc_start_streaming(struct vb2_queue *q, unsigned int count) if (rc) goto error; + if ((q->type == INPUT_MPLANE && inst->vb2q[OUTPUT_PORT].streaming) || + (q->type == OUTPUT_MPLANE && inst->vb2q[INPUT_PORT].streaming)) { + rc = msm_vidc_get_properties(inst); + if (rc) + goto error; + } + i_vpr_h(inst, "Streamon: %s successful\n", v4l2_type_name(q->type)); return rc; diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index 4e1c081c9c..d3a522b8db 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -93,6 +93,9 @@ u32 vidc_port_from_hfi(struct msm_vidc_inst *inst, case HFI_PORT_RAW: port = OUTPUT_PORT; break; + case HFI_PORT_NONE: + port = PORT_NONE; + break; default: i_vpr_e(inst, "%s: invalid hfi port type %d\n", __func__, hfi_port); @@ -106,6 +109,9 @@ u32 vidc_port_from_hfi(struct msm_vidc_inst *inst, case HFI_PORT_BITSTREAM: port = OUTPUT_PORT; break; + case HFI_PORT_NONE: + port = PORT_NONE; + break; default: i_vpr_e(inst, "%s: invalid hfi port type %d\n", __func__, hfi_port); @@ -1404,6 +1410,25 @@ static int handle_session_property(struct msm_vidc_inst *inst, port, inst->capabilities->cap[DPB_LIST].value); } break; + case HFI_PROP_QUALITY_MODE: + if (inst->capabilities->cap[QUALITY_MODE].value != payload_ptr[0]) + i_vpr_e(inst, + "%s: fw quality mode(%d) not matching the capability value(%d)\n", + __func__, payload_ptr[0], + inst->capabilities->cap[QUALITY_MODE].value); + break; + case HFI_PROP_STAGE: + if (inst->capabilities->cap[STAGE].value != payload_ptr[0]) + i_vpr_e(inst, + "%s: fw stage mode(%d) not matching the capability value(%d)\n", + __func__, payload_ptr[0], inst->capabilities->cap[STAGE].value); + break; + case HFI_PROP_PIPE: + if (inst->capabilities->cap[PIPE].value != payload_ptr[0]) + i_vpr_e(inst, + "%s: fw pipe mode(%d) not matching the capability value(%d)\n", + __func__, payload_ptr[0], inst->capabilities->cap[PIPE].value); + break; default: i_vpr_e(inst, "%s: invalid property %#x\n", __func__, pkt->type); From 10a6e51ef2712229799e976e5a5f4e2182ae13f8 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Tue, 10 Aug 2021 21:02:03 +0530 Subject: [PATCH 0406/1061] video: driver: use readl_relaxed_poll_timeout instead of register_read Upstream recommends to use readl_relaxed_poll_timeout instead of reading register in a loop with sleep. So replaced with readl_relaxed_poll_timeout in all possible places. Change-Id: Ide1758314128751a6876678d4265bb77c52de25f Signed-off-by: Govindaraj Rajagopal --- driver/variant/iris2/src/msm_vidc_iris2.c | 119 +++++++--------------- driver/vidc/inc/venus_hfi.h | 2 + driver/vidc/src/venus_hfi.c | 34 +++++++ 3 files changed, 72 insertions(+), 83 deletions(-) diff --git a/driver/variant/iris2/src/msm_vidc_iris2.c b/driver/variant/iris2/src/msm_vidc_iris2.c index 4e0a6e78ba..947f9606b4 100644 --- a/driver/variant/iris2/src/msm_vidc_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_iris2.c @@ -432,8 +432,7 @@ static int __setup_ucregion_memory_map_iris2(struct msm_vidc_core *vidc_core) static int __power_off_iris2_hardware(struct msm_vidc_core *core) { int rc = 0, i; - u32 value = 0, count = 0; - const u32 max_count = 10; + u32 value = 0; if (core->hw_power_control) { d_vpr_h("%s: hardware power control enabled\n", __func__); @@ -459,18 +458,9 @@ static int __power_off_iris2_hardware(struct msm_vidc_core *core) * poll for NoC DMA idle -> HPG 6.1.1 */ for (i = 0; i < core->capabilities[NUM_VPP_PIPE].value; i++) { - count = 0; - do { - value = __read_register(core, - VCODEC_SS_IDLE_STATUSn + 4*i); - if (value & 0x400000) - break; - else - usleep_range(1000, 2000); - count++; - } while (count < max_count); - - if (count == max_count) + rc = __read_register_with_poll_timeout(core, VCODEC_SS_IDLE_STATUSn + 4*i, + 0x400000, 0x400000, 2000, 20000); + if (rc) d_vpr_h("%s: VCODEC_SS_IDLE_STATUSn (%d) is not idle (%#x)\n", __func__, i, value); } @@ -479,32 +469,20 @@ static int __power_off_iris2_hardware(struct msm_vidc_core *core) rc = __write_register(core, AON_WRAPPER_MVP_NOC_RESET_REQ, 0x3); if (rc) return rc; - count = 0; - do { - value = __read_register(core, AON_WRAPPER_MVP_NOC_RESET_ACK); - if ((value & 0x3) == 0x3) - break; - else - usleep_range(100, 200); - count++; - } while (count < max_count); - if (count == max_count) + + rc = __read_register_with_poll_timeout(core, AON_WRAPPER_MVP_NOC_RESET_ACK, + 0x3, 0x3, 200, 2000); + if (rc) d_vpr_h("%s: AON_WRAPPER_MVP_NOC_RESET assert failed\n", __func__); /* De-assert partial reset on MSF interface and wait for ACK */ rc = __write_register(core, AON_WRAPPER_MVP_NOC_RESET_REQ, 0x0); if (rc) return rc; - count = 0; - do { - value = __read_register(core, AON_WRAPPER_MVP_NOC_RESET_ACK); - if ((value & 0x3) == 0x0) - break; - else - usleep_range(100, 200); - count++; - } while (count < max_count); - if (count == max_count) + + rc = __read_register_with_poll_timeout(core, AON_WRAPPER_MVP_NOC_RESET_ACK, + 0x3, 0x0, 200, 2000); + if (rc) d_vpr_h("%s: AON_WRAPPER_MVP_NOC_RESET de-assert failed\n", __func__); /* @@ -540,8 +518,6 @@ disable_power: static int __power_off_iris2_controller(struct msm_vidc_core *core) { int rc = 0; - u32 value = 0, count = 0; - const u32 max_count = 10; /* * mask fal10_veto QLPAC error since fal10_veto can go 1 @@ -556,33 +532,20 @@ static int __power_off_iris2_controller(struct msm_vidc_core *core) 0x1, BIT(0)); if (rc) return rc; - count = 0; - do { - value = __read_register(core, AON_WRAPPER_MVP_NOC_LPI_STATUS); - if ((value & 0x1) == 0x1) - break; - else - usleep_range(100, 200); - count++; - } while (count < max_count); - if (count == max_count) + + rc = __read_register_with_poll_timeout(core, AON_WRAPPER_MVP_NOC_LPI_STATUS, + 0x1, 0x1, 200, 2000); + if (rc) d_vpr_h("%s: AON_WRAPPER_MVP_NOC_LPI_CONTROL failed\n", __func__); /* Set Debug bridge Low power */ rc = __write_register(core, WRAPPER_DEBUG_BRIDGE_LPI_CONTROL_IRIS2, 0x7); if (rc) return rc; - count = 0; - do { - value = __read_register(core, - WRAPPER_DEBUG_BRIDGE_LPI_STATUS_IRIS2); - if ((value & 0x7) == 0x7) - break; - else - usleep_range(100, 200); - count++; - } while (count < max_count); - if (count == max_count) + + rc = __read_register_with_poll_timeout(core, WRAPPER_DEBUG_BRIDGE_LPI_STATUS_IRIS2, + 0x7, 0x7, 200, 2000); + if (rc) d_vpr_h("%s: debug bridge low power failed\n", __func__); /* Debug bridge LPI release */ @@ -590,17 +553,9 @@ static int __power_off_iris2_controller(struct msm_vidc_core *core) if (rc) return rc; - count = 0; - do { - value = __read_register(core, - WRAPPER_DEBUG_BRIDGE_LPI_STATUS_IRIS2); - if (value == 0x0) - break; - else - usleep_range(100, 200); - count++; - } while (count < max_count); - if (count == max_count) + rc = __read_register_with_poll_timeout(core, WRAPPER_DEBUG_BRIDGE_LPI_STATUS_IRIS2, + 0xffffffff, 0x0, 200, 2000); + if (rc) d_vpr_h("%s: debug bridge release failed\n", __func__); /* power down process */ @@ -767,8 +722,6 @@ static int __prepare_pc_iris2(struct msm_vidc_core *vidc_core) int rc = 0; u32 wfi_status = 0, idle_status = 0, pc_ready = 0; u32 ctrl_status = 0; - int count = 0; - const int max_tries = 10; struct msm_vidc_core *core = vidc_core; if (!core) { @@ -797,25 +750,25 @@ static int __prepare_pc_iris2(struct msm_vidc_core *vidc_core) goto skip_power_off; } - while (count < max_tries) { - wfi_status = BIT(0) & __read_register(core, - WRAPPER_TZ_CPU_STATUS); - ctrl_status = __read_register(core, - CTRL_STATUS_IRIS2); - if (wfi_status && (ctrl_status & CTRL_STATUS_PC_READY_IRIS2)) - break; - usleep_range(150, 250); - count++; - } - - if (count == max_tries) { - d_vpr_e("Skip PC. Core is not in right state\n"); + rc = __read_register_with_poll_timeout(core, CTRL_STATUS_IRIS2, + CTRL_STATUS_PC_READY_IRIS2, CTRL_STATUS_PC_READY_IRIS2, 250, 2500); + if (rc) { + d_vpr_e("%s: Skip PC. Ctrl status not set\n", __func__); goto skip_power_off; } + rc = __read_register_with_poll_timeout(core, WRAPPER_TZ_CPU_STATUS, + BIT(0), 0x1, 250, 2500); + if (rc) { + d_vpr_e("%s: Skip PC. Wfi status not set\n", __func__); + goto skip_power_off; + } return rc; skip_power_off: + wfi_status = BIT(0) & __read_register(core, WRAPPER_TZ_CPU_STATUS); + ctrl_status = __read_register(core, CTRL_STATUS_IRIS2); + d_vpr_e("Skip PC, wfi=%#x, idle=%#x, pcr=%#x, ctrl=%#x)\n", wfi_status, idle_status, pc_ready, ctrl_status); return -EAGAIN; diff --git a/driver/vidc/inc/venus_hfi.h b/driver/vidc/inc/venus_hfi.h index 2049fe0903..67ede90468 100644 --- a/driver/vidc/inc/venus_hfi.h +++ b/driver/vidc/inc/venus_hfi.h @@ -67,6 +67,8 @@ int __write_register_masked(struct msm_vidc_core *core, int __write_register(struct msm_vidc_core *core, u32 reg, u32 value); int __read_register(struct msm_vidc_core *core, u32 reg); +int __read_register_with_poll_timeout(struct msm_vidc_core *core, + u32 reg, u32 mask, u32 exp_val, u32 sleep_us, u32 timeout_us); int __iface_cmdq_write(struct msm_vidc_core *core, void *pkt); int __iface_msgq_read(struct msm_vidc_core *core, void *pkt); diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index 44c98b0a57..bcc0a6808d 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -14,6 +14,7 @@ #include #include #include +#include #include "venus_hfi.h" #include "msm_vidc_core.h" @@ -335,6 +336,39 @@ int __read_register(struct msm_vidc_core *core, u32 reg) return rc; } +int __read_register_with_poll_timeout(struct msm_vidc_core *core, + u32 reg, u32 mask, u32 exp_val, u32 sleep_us, u32 timeout_us) +{ + int rc = 0; + u32 val = 0; + u8 *addr; + + if (!core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (!core->power_enabled) { + d_vpr_e("%s failed: Power is OFF\n", __func__); + return -EINVAL; + } + + addr = (u8 *)core->register_base_addr + reg; + + rc = readl_relaxed_poll_timeout(addr, val, ((val & mask) == exp_val), sleep_us, timeout_us); + /* + * Memory barrier to make sure value is read correctly from the + * register. + */ + rmb(); + d_vpr_l( + "regread(%pK + %#x) = %#x. rc %d, mask %#x, exp_val %#x, cond %u, sleep %u, timeout %u\n", + core->register_base_addr, reg, val, rc, mask, exp_val, + ((val & mask) == exp_val), sleep_us, timeout_us); + + return rc; +} + static void __schedule_power_collapse_work(struct msm_vidc_core *core) { if (!core || !core->capabilities) { From 33f263995d96b4b58e6e4e03291a53f05196ae3d Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Fri, 13 Aug 2021 14:50:06 +0530 Subject: [PATCH 0407/1061] video: driver: reject invalid buffer mapping request Reject non-secure mapping request for a secure buffer(or vice versa). These combinations will lead to transaction fault later. So it is better to reject this buffer mappings upfront. Change-Id: Iaac851b235707dde8d303fb581ba0ae7c8768b85 Signed-off-by: Govindaraj Rajagopal --- driver/vidc/src/msm_vidc_memory.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/driver/vidc/src/msm_vidc_memory.c b/driver/vidc/src/msm_vidc_memory.c index ff2d1fc431..7b22dec0cd 100644 --- a/driver/vidc/src/msm_vidc_memory.c +++ b/driver/vidc/src/msm_vidc_memory.c @@ -172,6 +172,11 @@ void msm_vidc_memory_put_dmabuf_completely(struct msm_vidc_inst *inst, } } +static bool is_non_secure_buffer(struct dma_buf *dmabuf) +{ + return mem_buf_dma_buf_exclusive_owner(dmabuf); +} + int msm_vidc_memory_map(struct msm_vidc_core *core, struct msm_vidc_map *map) { int rc = 0; @@ -189,6 +194,21 @@ int msm_vidc_memory_map(struct msm_vidc_core *core, struct msm_vidc_map *map) goto exit; } + /* reject non-secure mapping request for a secure buffer(or vice versa) */ + if (map->region == MSM_VIDC_NON_SECURE || map->region == MSM_VIDC_NON_SECURE_PIXEL) { + if (!is_non_secure_buffer(map->dmabuf)) { + d_vpr_e("%s: secure buffer mapping to non-secure region %d not allowed\n", + __func__, map->region); + return -EINVAL; + } + } else { + if (is_non_secure_buffer(map->dmabuf)) { + d_vpr_e("%s: non-secure buffer mapping to secure region %d not allowed\n", + __func__, map->region); + return -EINVAL; + } + } + cb = get_context_bank(core, map->region); if (!cb) { d_vpr_e("%s: Failed to get context bank device\n", From 6ace5b422754e4937c700b6efcf89c8ccf49f84b Mon Sep 17 00:00:00 2001 From: Manikanta Kanamarlapudi Date: Mon, 16 Aug 2021 11:10:36 +0530 Subject: [PATCH 0408/1061] msm: vidc: update capabilities as per PRD update profile/level capabilities as per PRD. Change-Id: If1c4ff304a5febaeb3a567416d7c66eaca0f47c4 Signed-off-by: Manikanta Kanamarlapudi --- driver/platform/waipio/src/msm_vidc_waipio.c | 33 ++++++++++++++++---- 1 file changed, 27 insertions(+), 6 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 0608f9c9a1..70df147b1c 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -1023,6 +1023,29 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {0}, NULL, msm_vidc_set_u32_enum}, + {LEVEL, DEC, VP9, + V4L2_MPEG_VIDEO_VP9_LEVEL_1_0, + V4L2_MPEG_VIDEO_VP9_LEVEL_6_0, + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_1_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_1_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_2_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_3_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_4_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_2) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_6_0), + V4L2_MPEG_VIDEO_VP9_LEVEL_6_0, + V4L2_CID_MPEG_VIDEO_VP9_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {0}, + {0}, + NULL, msm_vidc_set_u32_enum}, + {LEVEL, DEC, H264, V4L2_MPEG_VIDEO_H264_LEVEL_1_0, V4L2_MPEG_VIDEO_H264_LEVEL_6_2, @@ -1044,9 +1067,8 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_1) | BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_2) | BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_2), - V4L2_MPEG_VIDEO_H264_LEVEL_6_2, + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_1), + V4L2_MPEG_VIDEO_H264_LEVEL_6_1, V4L2_CID_MPEG_VIDEO_H264_LEVEL, HFI_PROP_LEVEL, CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, @@ -1097,9 +1119,8 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1) | BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2) | BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2), - V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2, + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1), + V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1, V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, HFI_PROP_LEVEL, CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, From 394ad13850029e1ef6b1d4124f7425820653dcd2 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Fri, 13 Aug 2021 15:05:31 +0530 Subject: [PATCH 0409/1061] video: driver: include error session load in admission control Currently error session loads were ignored at admission control checks. So concurrent scenarios, there are chances that multiple sessions were in error state and yet to be closed by client. If those sessions were 8K sessions, then allowing new sessions will lead to OOM issues. Because error scenario, client might take more time to cleanup(to close driver fd). So it is better to include those sessions load as well in admission control checks to avoid OOM issues. Change-Id: I5d8f009b289f7f7cfb79a9e9197bfa4781f2fce3 Signed-off-by: Govindaraj Rajagopal --- driver/vidc/src/msm_vidc_driver.c | 4 ---- 1 file changed, 4 deletions(-) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index b10004b976..02e43963ca 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -5175,10 +5175,6 @@ static int msm_vidc_check_core_mbpf(struct msm_vidc_inst *inst) core_lock(core, __func__); list_for_each_entry(instance, &core->instances, list) { - /* ignore invalid/error session */ - if (is_session_error(instance)) - continue; - /* ignore thumbnail session */ if (is_thumbnail_session(instance)) continue; From 0c9ebb04c16bd0e1b76b7d1da7ee163f3aaf1e95 Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Fri, 13 Aug 2021 12:15:41 -0700 Subject: [PATCH 0410/1061] video: driver: add interlace with non-ubwc condition Non-ubwc color format with interlace is unsupported. add condition to check this during streamon and resume commands. Change-Id: I76310b0860d4d113194b8c691698ea0dc800a879 Signed-off-by: Darshana Patil --- driver/vidc/src/msm_vdec.c | 25 +++++++++++++++++++++++-- 1 file changed, 23 insertions(+), 2 deletions(-) diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 1999e054a4..fa21f9f91d 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -1692,11 +1692,13 @@ static int msm_vdec_update_max_map_output_count(struct msm_vidc_inst *inst) int msm_vdec_streamon_output(struct msm_vidc_inst *inst) { int rc = 0; + struct msm_vidc_inst_capability *capability; - if (!inst || !inst->core) { + if (!inst || !inst->core || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } + capability = inst->capabilities; if (is_output_meta_enabled(inst) && !inst->vb2q[OUTPUT_META_PORT].streaming) { @@ -1706,6 +1708,14 @@ int msm_vdec_streamon_output(struct msm_vidc_inst *inst) return -EINVAL; } + if (capability->cap[CODED_FRAMES].value == CODED_FRAMES_INTERLACE && + !is_ubwc_colorformat(capability->cap[PIX_FMTS].value)) { + i_vpr_e(inst, + "%s: interlace with non-ubwc color format is unsupported\n", + __func__); + return -EINVAL; + } + rc = msm_vidc_check_session_supported(inst); if (rc) return rc; @@ -2054,11 +2064,13 @@ int msm_vdec_process_cmd(struct msm_vidc_inst *inst, u32 cmd) int rc = 0; enum msm_vidc_allow allow = MSM_VIDC_DISALLOW; enum msm_vidc_port_type port; + struct msm_vidc_inst_capability *capability; - if (!inst || !inst->core) { + if (!inst || !inst->core || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } + capability = inst->capabilities; if (cmd == V4L2_DEC_CMD_STOP) { i_vpr_h(inst, "received cmd: drain\n"); @@ -2082,6 +2094,15 @@ int msm_vdec_process_cmd(struct msm_vidc_inst *inst, u32 cmd) return rc; } else if (cmd == V4L2_DEC_CMD_START) { i_vpr_h(inst, "received cmd: resume\n"); + + if (capability->cap[CODED_FRAMES].value == CODED_FRAMES_INTERLACE && + !is_ubwc_colorformat(capability->cap[PIX_FMTS].value)) { + i_vpr_e(inst, + "%s: interlace with non-ubwc color format is unsupported\n", + __func__); + return -EINVAL; + } + if (!msm_vidc_allow_start(inst)) return -EBUSY; port = (inst->state == MSM_VIDC_DRAIN_LAST_FLAG) ? INPUT_PORT : OUTPUT_PORT; From d14a7087e2c7cb201b63027dc00499bfc4131a9a Mon Sep 17 00:00:00 2001 From: Gaviraju Doddabettahalli Bettegowda Date: Tue, 17 Aug 2021 14:39:34 +0530 Subject: [PATCH 0411/1061] video: driver: Add changes to calculate auto framerate Currently, there is a precision loss while calculating framerate, this will result in updating framerate multiple times to firmware. So added change to avoid precision loss in framerate calculation. Change-Id: I9748e7ad6913eb4790e24468b60f39823857f5c4 Signed-off-by: Gaviraju Doddabettahalli Bettegowda --- driver/vidc/src/msm_vidc_driver.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 2a109dc869..119726a4ce 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -2056,7 +2056,7 @@ int msm_vidc_set_auto_framerate(struct msm_vidc_inst *inst, u64 timestamp) struct msm_vidc_timestamp *ts; struct msm_vidc_timestamp *prev = NULL; u32 counter = 0, prev_fr = 0, curr_fr = 0; - u64 time_ms = 0; + u64 time_us = 0; int rc = 0; if (!inst || !inst->core || !inst->capabilities) { @@ -2075,9 +2075,9 @@ int msm_vidc_set_auto_framerate(struct msm_vidc_inst *inst, u64 timestamp) list_for_each_entry(ts, &inst->timestamps.list, sort.list) { if (prev) { - time_ms = div_u64(ts->sort.val - prev->sort.val, 1000); + time_us = ts->sort.val - prev->sort.val; prev_fr = curr_fr; - curr_fr = time_ms ? div_u64(MSEC_PER_SEC, time_ms) << 16 : + curr_fr = time_us ? DIV64_U64_ROUND_CLOSEST(USEC_PER_SEC, time_us) << 16 : inst->auto_framerate; if (curr_fr > inst->capabilities->cap[FRAME_RATE].max) curr_fr = inst->capabilities->cap[FRAME_RATE].max; @@ -2091,7 +2091,8 @@ int msm_vidc_set_auto_framerate(struct msm_vidc_inst *inst, u64 timestamp) /* if framerate changed and stable for 2 frames, set to firmware */ if (curr_fr == prev_fr && curr_fr != inst->auto_framerate) { - i_vpr_l(inst, "%s: updated fps to %u\n", __func__, curr_fr >> 16); + i_vpr_l(inst, "%s: updated fps: %u -> %u\n", __func__, + inst->auto_framerate >> 16, curr_fr >> 16); rc = venus_hfi_session_property(inst, HFI_PROP_FRAME_RATE, HFI_HOST_FLAGS_NONE, From 3b246bd0bde0cb1f98234bb1799bdb10f2b39329 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Tue, 17 Aug 2021 16:03:58 -0700 Subject: [PATCH 0412/1061] video: driver: Limit secure sessions allowed by max supported Check for max supported secure sessions before allowing any new secure session to limit secure sessions count by max supported value. Change-Id: I72d22c5e592eeb662d18018f6d880104992d570b Signed-off-by: Akshata Sahukar --- driver/vidc/src/msm_vidc_control.c | 46 ++++++++++++++++++++++++++++++ 1 file changed, 46 insertions(+) diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index a1e042792c..a22642e9f7 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -693,6 +693,44 @@ static int msm_vidc_update_buffer_count_if_needed(struct msm_vidc_inst* inst, return rc; } +static int msm_vidc_allow_secure_session(struct msm_vidc_inst *inst) +{ + int rc = 0; + struct msm_vidc_inst *i; + struct msm_vidc_core *core; + u32 count = 0; + + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + core = inst->core; + + if (!core->capabilities) { + i_vpr_e(inst, "%s: invalid params\n", __func__); + return -EINVAL; + } + + core_lock(core, __func__); + list_for_each_entry(i, &core->instances, list) { + if (i->capabilities) { + if (i->capabilities->cap[SECURE_MODE].value) + count++; + } + } + + if (count > core->capabilities[MAX_SECURE_SESSION_COUNT].value) { + i_vpr_e(inst, + "%s: total secure sessions %d exceeded max limit %d\n", + __func__, count, + core->capabilities[MAX_SECURE_SESSION_COUNT].value); + rc = -EINVAL; + } + core_unlock(core, __func__); + + return rc; +} + int msm_v4l2_op_s_ctrl(struct v4l2_ctrl *ctrl) { int rc = 0; @@ -731,6 +769,14 @@ int msm_v4l2_op_s_ctrl(struct v4l2_ctrl *ctrl) if (!inst->vb2q[OUTPUT_PORT].streaming) { msm_vidc_update_cap_value(inst, cap_id, ctrl->val, __func__); + if (ctrl->id == V4L2_CID_MPEG_VIDC_SECURE) { + if (ctrl->val) { + rc = msm_vidc_allow_secure_session(inst); + if (rc) + return rc; + } + } + if (ctrl->id == V4L2_CID_ROTATE) { if (ctrl->val == 90 || ctrl->val == 270) { struct v4l2_format *output_fmt; From 3d9556402bdd44d8d66dbaaeb0f6030db5fbabce Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Wed, 18 Aug 2021 08:33:30 +0530 Subject: [PATCH 0413/1061] video: driver: improve error handling on read_register Currently video driver ignoring error value returned by __read_register() api. So added changes to improve error handling. Change-Id: Ia3968f0f900915b46b96c5e790af9be02389e841 Signed-off-by: Govindaraj Rajagopal --- driver/variant/iris2/src/msm_vidc_iris2.c | 42 +++++++++++++++++------ driver/vidc/inc/venus_hfi.h | 2 +- driver/vidc/src/venus_hfi.c | 8 ++--- 3 files changed, 36 insertions(+), 16 deletions(-) diff --git a/driver/variant/iris2/src/msm_vidc_iris2.c b/driver/variant/iris2/src/msm_vidc_iris2.c index 947f9606b4..43058830d5 100644 --- a/driver/variant/iris2/src/msm_vidc_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_iris2.c @@ -366,7 +366,9 @@ static int __interrupt_init_iris2(struct msm_vidc_core *vidc_core) } /* All interrupts should be disabled initially 0x1F6 : Reset value */ - mask_val = __read_register(core, WRAPPER_INTR_MASK_IRIS2); + rc = __read_register(core, WRAPPER_INTR_MASK_IRIS2, &mask_val); + if (rc) + return rc; /* Write 0 to unmask CPU and WD interrupts */ mask_val &= ~(WRAPPER_INTR_MASK_A2HWD_BMSK_IRIS2| @@ -443,10 +445,12 @@ static int __power_off_iris2_hardware(struct msm_vidc_core *core) * check to make sure core clock branch enabled else * we cannot read vcodec top idle register */ - value = __read_register(core, WRAPPER_CORE_CLOCK_CONFIG_IRIS2); + rc = __read_register(core, WRAPPER_CORE_CLOCK_CONFIG_IRIS2, &value); + if (rc) + return rc; + if (value) { - d_vpr_h( - "%s: core clock config not enabled, enabling it to read vcodec registers\n", + d_vpr_h("%s: core clock config not enabled, enabling it to read vcodec registers\n", __func__); rc = __write_register(core, WRAPPER_CORE_CLOCK_CONFIG_IRIS2, 0); if (rc) @@ -729,7 +733,10 @@ static int __prepare_pc_iris2(struct msm_vidc_core *vidc_core) return -EINVAL; } - ctrl_status = __read_register(core, CTRL_STATUS_IRIS2); + rc = __read_register(core, CTRL_STATUS_IRIS2, &ctrl_status); + if (rc) + return rc; + pc_ready = ctrl_status & CTRL_STATUS_PC_READY_IRIS2; idle_status = ctrl_status & BIT(30); @@ -737,8 +744,11 @@ static int __prepare_pc_iris2(struct msm_vidc_core *vidc_core) d_vpr_h("Already in pc_ready state\n"); return 0; } + rc = __read_register(core, WRAPPER_TZ_CPU_STATUS, &wfi_status); + if (rc) + return rc; - wfi_status = BIT(0) & __read_register(core, WRAPPER_TZ_CPU_STATUS); + wfi_status &= BIT(0); if (!wfi_status || !idle_status) { d_vpr_e("Skipping PC, wfi status not set\n"); goto skip_power_off; @@ -766,9 +776,13 @@ static int __prepare_pc_iris2(struct msm_vidc_core *vidc_core) return rc; skip_power_off: - wfi_status = BIT(0) & __read_register(core, WRAPPER_TZ_CPU_STATUS); - ctrl_status = __read_register(core, CTRL_STATUS_IRIS2); - + rc = __read_register(core, CTRL_STATUS_IRIS2, &ctrl_status); + if (rc) + return rc; + rc = __read_register(core, WRAPPER_TZ_CPU_STATUS, &wfi_status); + if (rc) + return rc; + wfi_status &= BIT(0); d_vpr_e("Skip PC, wfi=%#x, idle=%#x, pcr=%#x, ctrl=%#x)\n", wfi_status, idle_status, pc_ready, ctrl_status); return -EAGAIN; @@ -868,7 +882,10 @@ static int __clear_interrupt_iris2(struct msm_vidc_core *vidc_core) return 0; } - intr_status = __read_register(core, WRAPPER_INTR_STATUS_IRIS2); + rc = __read_register(core, WRAPPER_INTR_STATUS_IRIS2, &intr_status); + if (rc) + return rc; + mask = (WRAPPER_INTR_STATUS_A2H_BMSK_IRIS2| WRAPPER_INTR_STATUS_A2HWD_BMSK_IRIS2| CTRL_INIT_IDLE_MSG_BMSK_IRIS2); @@ -907,7 +924,10 @@ static int __boot_firmware_iris2(struct msm_vidc_core *vidc_core) return rc; while (!ctrl_status && count < max_tries) { - ctrl_status = __read_register(core, CTRL_STATUS_IRIS2); + rc = __read_register(core, CTRL_STATUS_IRIS2, &ctrl_status); + if (rc) + return rc; + if ((ctrl_status & CTRL_ERROR_STATUS__M_IRIS2) == 0x4) { d_vpr_e("invalid setting for UC_REGION\n"); break; diff --git a/driver/vidc/inc/venus_hfi.h b/driver/vidc/inc/venus_hfi.h index 67ede90468..865cd0069e 100644 --- a/driver/vidc/inc/venus_hfi.h +++ b/driver/vidc/inc/venus_hfi.h @@ -66,7 +66,7 @@ int __write_register_masked(struct msm_vidc_core *core, u32 reg, u32 value, u32 mask); int __write_register(struct msm_vidc_core *core, u32 reg, u32 value); -int __read_register(struct msm_vidc_core *core, u32 reg); +int __read_register(struct msm_vidc_core *core, u32 reg, u32 *value); int __read_register_with_poll_timeout(struct msm_vidc_core *core, u32 reg, u32 mask, u32 exp_val, u32 sleep_us, u32 timeout_us); int __iface_cmdq_write(struct msm_vidc_core *core, diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index bcc0a6808d..6a9bf160af 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -308,12 +308,12 @@ int __write_register_masked(struct msm_vidc_core *core, return rc; } -int __read_register(struct msm_vidc_core *core, u32 reg) +int __read_register(struct msm_vidc_core *core, u32 reg, u32 *value) { int rc = 0; u8 *base_addr; - if (!core) { + if (!core || !value) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -325,13 +325,13 @@ int __read_register(struct msm_vidc_core *core, u32 reg) base_addr = core->register_base_addr; - rc = readl_relaxed(base_addr + reg); + *value = readl_relaxed(base_addr + reg); /* * Memory barrier to make sure value is read correctly from the * register. */ rmb(); - d_vpr_l("regread(%pK + %#x) = %#x\n", base_addr, reg, rc); + d_vpr_l("regread(%pK + %#x) = %#x\n", base_addr, reg, *value); return rc; } From ec7093a322db8535d9cbce05a9da1dc81f43f89a Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Wed, 18 Aug 2021 11:03:58 -0700 Subject: [PATCH 0414/1061] video: driver: return bootup timeout error return bootup timeout error Change-Id: I0123bdd8c9f23b4d680085c1bb8dd2620312c60f Signed-off-by: Darshana Patil --- driver/variant/iris2/src/msm_vidc_iris2.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/driver/variant/iris2/src/msm_vidc_iris2.c b/driver/variant/iris2/src/msm_vidc_iris2.c index 947f9606b4..2201dd18c4 100644 --- a/driver/variant/iris2/src/msm_vidc_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_iris2.c @@ -919,7 +919,7 @@ static int __boot_firmware_iris2(struct msm_vidc_core *vidc_core) if (count >= max_tries) { d_vpr_e("Error booting up vidc firmware\n"); - rc = -ETIME; + return -ETIME; } /* Enable interrupt before sending commands to venus */ From 871b8812ef39b8ef0cd23d2d7d3658d5418670df Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Thu, 19 Aug 2021 18:08:16 -0700 Subject: [PATCH 0415/1061] video: driver: fix to allow 16 concurrent video instances Currently allowing 15 concurrent video instances instead of 16. Fix this to allow 16 instances. Change-Id: I515625e47e324cd1c7ba5a83c1363705bca64721 Signed-off-by: Akshata Sahukar --- driver/vidc/src/msm_vidc_driver.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 119726a4ce..ba5c6ab3ea 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -3569,7 +3569,7 @@ int msm_vidc_add_session(struct msm_vidc_inst *inst) list_for_each_entry(i, &core->instances, list) count++; - if (count < core->capabilities[MAX_SESSION_COUNT].value) { + if (count <= core->capabilities[MAX_SESSION_COUNT].value) { list_add_tail(&inst->list, &core->instances); } else { i_vpr_e(inst, "%s: total sessions %d exceeded max limit %d\n", From 8e1ba950f0b806b58f297dc32623c6528fc55aee Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Fri, 20 Aug 2021 11:42:20 -0700 Subject: [PATCH 0416/1061] video: driver: fix bus vote data with correct color format Fill correct opb color format for bus voting. Change-Id: I219172492563d10582233c54578115ab48b9b1ff Signed-off-by: Darshana Patil --- driver/vidc/src/msm_vidc_power.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/driver/vidc/src/msm_vidc_power.c b/driver/vidc/src/msm_vidc_power.c index e6d7b95c69..47568bdd8a 100644 --- a/driver/vidc/src/msm_vidc_power.c +++ b/driver/vidc/src/msm_vidc_power.c @@ -266,7 +266,7 @@ int msm_vidc_scale_buses(struct msm_vidc_inst *inst) } else { vote_data->color_formats[0] = MSM_VIDC_FMT_NV12; } - vote_data->color_formats[0] = color_format; + vote_data->color_formats[1] = color_format; } else { vote_data->num_formats = 1; vote_data->color_formats[0] = color_format; From b965b9307f8c2048c5c5841e4144b98a414bfd51 Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Mon, 23 Aug 2021 11:53:06 -0700 Subject: [PATCH 0417/1061] video: driver: allow two 8k sessions support Allow one 8k + one 4k realtime sessions. Maximum allow two 8K sessions which includes RT and NRT sessions. Change-Id: I68acfc4942c5c930bed7d9584cd82f2667010136 Signed-off-by: Darshana Patil --- driver/platform/waipio/src/msm_vidc_waipio.c | 3 ++- driver/vidc/inc/msm_vidc_internal.h | 1 + driver/vidc/src/msm_vidc_driver.c | 20 +++++++++++++++++++- 3 files changed, 22 insertions(+), 2 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 70df147b1c..a2fbc024bd 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -54,7 +54,8 @@ static struct msm_platform_core_capability core_data_waipio[] = { {DEC_CODECS, H264|HEVC|VP9|HEIC}, {MAX_SESSION_COUNT, 16}, {MAX_SECURE_SESSION_COUNT, 3}, - {MAX_MBPF, 173056}, /* (8192x4320)/256 + (4096x2176)/256*/ + {MAX_RT_MBPF, 173056}, /* (8192x4320)/256 + (4096x2176)/256*/ + {MAX_MBPF, 276480}, /* ((8192x4320)/256) * 2 */ {MAX_MBPS, 7833600}, /* max_load * 7680x4320@60fps or 3840x2176@240fps * which is greater than 4096x2176@120fps, diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 729abc62f6..8af6f21368 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -306,6 +306,7 @@ enum msm_vidc_core_capability_type { MAX_SESSION_COUNT, MAX_SECURE_SESSION_COUNT, MAX_LOAD, + MAX_RT_MBPF, MAX_MBPF, MAX_MBPS, MAX_IMAGE_MBPF, diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index ba5c6ab3ea..2f2e61612a 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -5164,7 +5164,7 @@ int msm_vidc_check_core_mbps(struct msm_vidc_inst *inst) static int msm_vidc_check_core_mbpf(struct msm_vidc_inst *inst) { - u32 video_mbpf = 0, image_mbpf = 0; + u32 video_mbpf = 0, image_mbpf = 0, video_rt_mbpf = 0; struct msm_vidc_core *core; struct msm_vidc_inst *instance; @@ -5199,6 +5199,24 @@ static int msm_vidc_check_core_mbpf(struct msm_vidc_inst *inst) return -ENOMEM; } + core_lock(core, __func__); + /* check real-time video sessions max limit */ + list_for_each_entry(instance, &core->instances, list) { + if (is_thumbnail_session(instance) || + is_image_session(instance) || + !is_realtime_session(instance)) + continue; + + video_rt_mbpf += msm_vidc_get_mbs_per_frame(instance); + } + core_unlock(core, __func__); + + if (video_rt_mbpf > core->capabilities[MAX_RT_MBPF].value) { + i_vpr_e(inst, "%s: real-time video overloaded. needed %u, max %u", + __func__, video_rt_mbpf, core->capabilities[MAX_RT_MBPF].value); + return -ENOMEM; + } + return 0; } From e17abd45c1fd6af33e8e5b76425e8078d9a0eb30 Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Mon, 23 Aug 2021 15:50:33 -0700 Subject: [PATCH 0418/1061] video: driver: limit max number of sessions based on resolution add checks to limit max number of sessions supported based on resolution. max number of 720P sessions: 16 max number of 1080P sessions: 8 max number of 4K sessions: 4 max number of 8K sessions: 2 Change-Id: I2a784a0d28ba050923bdc7f42a21ee9801d01d86 Signed-off-by: Darshana Patil --- driver/platform/waipio/src/msm_vidc_waipio.c | 4 + driver/vidc/inc/msm_vidc_driver.h | 2 + driver/vidc/inc/msm_vidc_internal.h | 4 + driver/vidc/src/msm_vidc_driver.c | 210 ++++++++++++++----- 4 files changed, 170 insertions(+), 50 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 70df147b1c..bf6b8e182e 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -53,6 +53,10 @@ static struct msm_platform_core_capability core_data_waipio[] = { {ENC_CODECS, H264|HEVC|HEIC}, {DEC_CODECS, H264|HEVC|VP9|HEIC}, {MAX_SESSION_COUNT, 16}, + {MAX_NUM_720P_SESSIONS, 16}, + {MAX_NUM_1080P_SESSIONS, 8}, + {MAX_NUM_4K_SESSIONS, 4}, + {MAX_NUM_8K_SESSIONS, 2}, {MAX_SECURE_SESSION_COUNT, 3}, {MAX_MBPF, 173056}, /* (8192x4320)/256 + (4096x2176)/256*/ {MAX_MBPS, 7833600}, /* max_load diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 9a6901bf59..b40e2b02a8 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -428,6 +428,8 @@ void msm_vidc_free_capabililty_list(struct msm_vidc_inst *inst, enum msm_vidc_ctrl_list_type list_type); bool res_is_greater_than(u32 width, u32 height, u32 ref_width, u32 ref_height); +bool res_is_greater_than_or_equal_to(u32 width, u32 height, + u32 ref_width, u32 ref_height); bool res_is_less_than(u32 width, u32 height, u32 ref_width, u32 ref_height); bool res_is_less_than_or_equal_to(u32 width, u32 height, diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 729abc62f6..b16e91fe5d 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -304,6 +304,10 @@ enum msm_vidc_core_capability_type { ENC_CODECS, DEC_CODECS, MAX_SESSION_COUNT, + MAX_NUM_720P_SESSIONS, + MAX_NUM_1080P_SESSIONS, + MAX_NUM_4K_SESSIONS, + MAX_NUM_8K_SESSIONS, MAX_SECURE_SESSION_COUNT, MAX_LOAD, MAX_MBPF, diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index ba5c6ab3ea..4ade7bee37 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -1104,6 +1104,20 @@ bool res_is_greater_than(u32 width, u32 height, return false; } +bool res_is_greater_than_or_equal_to(u32 width, u32 height, + u32 ref_width, u32 ref_height) +{ + u32 num_mbs = NUM_MBS_PER_FRAME(height, width); + u32 max_side = max(ref_width, ref_height); + + if (num_mbs >= NUM_MBS_PER_FRAME(ref_height, ref_width) || + width >= max_side || + height >= max_side) + return true; + else + return false; +} + bool res_is_less_than(u32 width, u32 height, u32 ref_width, u32 ref_height) { @@ -5334,13 +5348,12 @@ exit: return allow; } -int msm_vidc_check_session_supported(struct msm_vidc_inst *inst) +static int msm_vidc_check_resolution_supported(struct msm_vidc_inst *inst) { struct msm_vidc_inst_capability *capability; u32 width = 0, height = 0, min_width, min_height, max_width, max_height; - bool allow = false, is_interlaced = false; - int rc = 0; + bool is_interlaced = false; if (!inst || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); @@ -5348,24 +5361,6 @@ int msm_vidc_check_session_supported(struct msm_vidc_inst *inst) } capability = inst->capabilities; - if (is_image_session(inst) && is_secure_session(inst)) { - i_vpr_e(inst, "%s: secure image session not supported\n", __func__); - rc = -EINVAL; - goto exit; - } - - rc = msm_vidc_check_core_mbps(inst); - if (rc) - goto exit; - - rc = msm_vidc_check_core_mbpf(inst); - if (rc) - goto exit; - - rc = msm_vidc_check_inst_mbpf(inst); - if (rc) - goto exit; - if (is_decode_session(inst)) { width = inst->fmts[INPUT_PORT].fmt.pix_mp.width; height = inst->fmts[INPUT_PORT].fmt.pix_mp.height; @@ -5399,56 +5394,171 @@ int msm_vidc_check_session_supported(struct msm_vidc_inst *inst) i_vpr_e(inst, "%s: resolution is not even. wxh [%u x %u], compose [%u x %u]\n", __func__, width, height, inst->compose.width, inst->compose.height); - rc = -EINVAL; - goto exit; + return -EINVAL; } - /* check decoder input width and height is in supported range */ - if (is_decode_session(inst)) { + /* check if input width and height is in supported range */ + if (is_decode_session(inst) || is_encode_session(inst)) { if (!in_range(width, min_width, max_width) || !in_range(height, min_height, max_height)) { i_vpr_e(inst, "%s: unsupported input wxh [%u x %u], allowed range: [%u x %u] to [%u x %u]\n", __func__, width, height, min_width, min_height, max_width, max_height); - rc = -EINVAL; - goto exit; + return -EINVAL; } } - /* check encoder crop width and height is in supported range */ - if (is_encode_session(inst)) { - if (!in_range(width, min_width, max_width) || - !in_range(height, min_height, max_height)) { - i_vpr_e(inst, - "%s: unsupported wxh [%u x %u], allowed range: [%u x %u] to [%u x %u]\n", - __func__, width, height, min_width, - min_height, max_width, max_height); - rc = -EINVAL; - goto exit; - } - } - - /* check image capabilities */ - if (is_image_encode_session(inst)) { - allow = msm_vidc_allow_image_encode_session(inst); - if (!allow) { - rc = -EINVAL; - goto exit; - } - return 0; - } - /* check interlace supported resolution */ is_interlaced = capability->cap[CODED_FRAMES].value == CODED_FRAMES_INTERLACE; if (is_interlaced && (width > INTERLACE_WIDTH_MAX || height > INTERLACE_HEIGHT_MAX || NUM_MBS_PER_FRAME(width, height) > INTERLACE_MB_PER_FRAME_MAX)) { i_vpr_e(inst, "%s: unsupported interlace wxh [%u x %u], max [%u x %u]\n", __func__, width, height, INTERLACE_WIDTH_MAX, INTERLACE_HEIGHT_MAX); + return -EINVAL; + } + + return 0; +} + +static int msm_vidc_check_max_sessions(struct msm_vidc_inst *inst) +{ + u32 width = 0, height = 0; + u32 num_720p_sessions = 0, num_1080p_sessions = 0; + u32 num_4k_sessions = 0, num_8k_sessions = 0; + struct msm_vidc_inst *i; + struct msm_vidc_core *core; + + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + core = inst->core; + + if (!core->capabilities) { + i_vpr_e(inst, "%s: invalid params\n", __func__); + return -EINVAL; + } + + core_lock(core, __func__); + list_for_each_entry(i, &core->instances, list) { + /* skip image sessions count */ + if (is_image_session(inst)) + continue; + + if (is_decode_session(i)) { + width = i->fmts[INPUT_PORT].fmt.pix_mp.width; + height = i->fmts[INPUT_PORT].fmt.pix_mp.height; + } else if (is_encode_session(i)) { + width = i->crop.width; + height = i->crop.height; + } + + /* + * one 8k session equals to 64 720p sessions in reality. + * So for one 8k session the number of 720p sessions will + * exceed max supported session count(16), hence one 8k session + * will be rejected as well. + * Therefore, treat one 8k session equal to two 4k sessions and + * one 4k session equal to two 1080p sessions and + * one 1080p session equal to two 720p sessions. This equation + * will make one 8k session equal to eight 720p sessions + * which looks good. + */ + if (res_is_greater_than(width, height, 4096, 2176)) { + num_8k_sessions += 1; + num_4k_sessions += 2; + num_1080p_sessions += 4; + num_720p_sessions += 8; + } else if (res_is_greater_than(width, height, 1920, 1088)) { + num_4k_sessions += 1; + num_1080p_sessions += 2; + num_720p_sessions += 4; + } else if (res_is_greater_than(width, height, 1280, 736)) { + num_1080p_sessions += 1; + num_720p_sessions += 2; + } else { + num_720p_sessions += 1; + } + } + core_unlock(core, __func__); + + if (num_8k_sessions > core->capabilities[MAX_NUM_8K_SESSIONS].value) { + i_vpr_e(inst, "%s: total 8k sessions %d, exceeded max limit %d\n", + __func__, num_8k_sessions, + core->capabilities[MAX_NUM_8K_SESSIONS].value); + return -ENOMEM; + } + + if (num_4k_sessions > core->capabilities[MAX_NUM_4K_SESSIONS].value) { + i_vpr_e(inst, "%s: total 4K sessions %d, exceeded max limit %d\n", + __func__, num_4k_sessions, + core->capabilities[MAX_NUM_4K_SESSIONS].value); + return -ENOMEM; + } + + if (num_1080p_sessions > core->capabilities[MAX_NUM_1080P_SESSIONS].value) { + i_vpr_e(inst, "%s: total 1080p sessions %d, exceeded max limit %d\n", + __func__, num_1080p_sessions, + core->capabilities[MAX_NUM_1080P_SESSIONS].value); + return -ENOMEM; + } + + if (num_720p_sessions > core->capabilities[MAX_NUM_720P_SESSIONS].value) { + i_vpr_e(inst, "%s: total sessions(<=720p) %d, exceeded max limit %d\n", + __func__, num_720p_sessions, + core->capabilities[MAX_NUM_720P_SESSIONS].value); + return -ENOMEM; + } + + return 0; +} + +int msm_vidc_check_session_supported(struct msm_vidc_inst *inst) +{ + bool allow = false; + int rc = 0; + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (is_image_session(inst) && is_secure_session(inst)) { + i_vpr_e(inst, "%s: secure image session not supported\n", __func__); rc = -EINVAL; goto exit; } + rc = msm_vidc_check_core_mbps(inst); + if (rc) + goto exit; + + rc = msm_vidc_check_core_mbpf(inst); + if (rc) + goto exit; + + rc = msm_vidc_check_inst_mbpf(inst); + if (rc) + goto exit; + + rc = msm_vidc_check_resolution_supported(inst); + if (rc) + goto exit; + + /* check image capabilities */ + if (is_image_encode_session(inst)) { + allow = msm_vidc_allow_image_encode_session(inst); + if (!allow) { + rc = -EINVAL; + goto exit; + } + } + + rc = msm_vidc_check_max_sessions(inst); + if (rc) + goto exit; + exit: if (rc) { i_vpr_e(inst, "%s: current session not supported\n", __func__); From 4a0e4b65c2ef66411b143c73f337fa49533eaa99 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Thu, 26 Aug 2021 19:56:29 -0700 Subject: [PATCH 0419/1061] video: driver: fix CTS V2 media DecoderColorAspectsTest color mismatch issue Since ycbcr_enc is u8 member varible, 302 value exceeds its memory range resulting in storage of incorrect matrix coefficents, and passing the same to HAL. As a result, incorrect color space info is propagated to client resulting into color mismatch issue and failing the CTS testcase. Fixed this. Change-Id: I66424c033bb4c4ad7d7528974a45a6a4b2740327 Signed-off-by: Akshata Sahukar --- include/uapi/vidc/media/v4l2_vidc_extensions.h | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/include/uapi/vidc/media/v4l2_vidc_extensions.h b/include/uapi/vidc/media/v4l2_vidc_extensions.h index fac7c2d113..5268b22d4a 100644 --- a/include/uapi/vidc/media/v4l2_vidc_extensions.h +++ b/include/uapi/vidc/media/v4l2_vidc_extensions.h @@ -42,8 +42,9 @@ #define V4L2_XFER_FUNC_VIDC_ST428 208 #define V4L2_XFER_FUNC_VIDC_HLG 209 -#define V4L2_YCBCR_VIDC_SRGB_OR_SMPTE_ST428 301 -#define V4L2_YCBCR_VIDC_FCC47_73_682 302 +/* should be 255 or below due to u8 limitation */ +#define V4L2_YCBCR_VIDC_SRGB_OR_SMPTE_ST428 241 +#define V4L2_YCBCR_VIDC_FCC47_73_682 242 /* end of vidc specific colorspace definitions */ #ifndef V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE From 7af8e29f9eb9276f13ad5d6cef5e83fcd631e338 Mon Sep 17 00:00:00 2001 From: Maheshwar Ajja Date: Thu, 26 Aug 2021 16:37:28 -0700 Subject: [PATCH 0420/1061] video: driver: discard ipsc after stop input port Driver is discarding input port settings change (ipsc) event before sending stop input to firmware and also in case of input port is still in streamoff state while processing pending events. There is a chance that driver may not discard ipsc event if firmware raised ipsc after sending stop input and also driver may not discard the pending ipsc if client quickly streamon the input port before pending events processing scheduled. So discard pending ipsc in the streamoff input port after stop input to firmware and wait for stop done is successful. Change-Id: I518cebe1142235463b1ccd851ac151ad80036f95 Signed-off-by: Maheshwar Ajja Signed-off-by: Akshata Sahukar --- driver/vidc/src/msm_vidc_driver.c | 46 +++++++++++++++++++++++-------- 1 file changed, 34 insertions(+), 12 deletions(-) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 8f57115b3a..894468485f 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -1612,6 +1612,37 @@ bool msm_vidc_allow_last_flag(struct msm_vidc_inst *inst) return false; } +static int msm_vidc_discard_pending_ipsc(struct msm_vidc_inst *inst) +{ + struct response_work *resp_work, *dummy = NULL; + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (list_empty(&inst->response_works)) + return 0; + + /* discard pending port settings change if any */ + list_for_each_entry_safe(resp_work, dummy, + &inst->response_works, list) { + if (resp_work->type == RESP_WORK_INPUT_PSC) { + i_vpr_h(inst, + "%s: discard pending input psc\n", __func__); + + /* override the psc properties again if ipsc discarded */ + inst->ipsc_properties_set = false; + + list_del(&resp_work->list); + kfree(resp_work->data); + kfree(resp_work); + } + } + + return 0; +} + static int msm_vidc_process_pending_ipsc(struct msm_vidc_inst *inst, enum msm_vidc_inst_state *new_state) { @@ -1697,7 +1728,6 @@ int msm_vidc_state_change_streamoff(struct msm_vidc_inst *inst, u32 type) { int rc = 0; enum msm_vidc_inst_state new_state = MSM_VIDC_ERROR; - struct response_work *resp_work, *dummy; if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); @@ -1720,17 +1750,6 @@ int msm_vidc_state_change_streamoff(struct msm_vidc_inst *inst, u32 type) inst->state == MSM_VIDC_DRC_DRAIN_LAST_FLAG || inst->state == MSM_VIDC_DRAIN_START_INPUT) { new_state = MSM_VIDC_START_OUTPUT; - /* discard pending port settings change if any */ - list_for_each_entry_safe(resp_work, dummy, - &inst->response_works, list) { - if (resp_work->type == RESP_WORK_INPUT_PSC) { - i_vpr_h(inst, - "%s: discard pending input psc\n", __func__); - list_del(&resp_work->list); - kfree(resp_work->data); - kfree(resp_work); - } - } } } else if (type == OUTPUT_MPLANE) { if (inst->state == MSM_VIDC_START_OUTPUT) { @@ -3819,6 +3838,9 @@ int msm_vidc_session_streamoff(struct msm_vidc_inst *inst, goto error; } + /* discard pending port settings change if any */ + msm_vidc_discard_pending_ipsc(inst); + /* flush deferred buffers */ msm_vidc_flush_buffers(inst, buffer_type); msm_vidc_flush_delayed_unmap_buffers(inst, buffer_type); From 03471f2f11bbd76ea2537855adfc13019db15bd5 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Thu, 2 Sep 2021 14:36:42 +0530 Subject: [PATCH 0421/1061] video: driver: set clk_rate to zero before clk_disable Video driver clk scaling is through mmrm. So without informing to mmrm if we disable_clk, then mmrm will hold stale peak_current values and that will lead to incorrect calculations at mmrm side. So always request to set lowest clk corner to mmrm before calling clk_disable_unprepare() api. Change-Id: I3e54249430ec4e886afb42f5af6863c7e40686c4 Signed-off-by: Govindaraj Rajagopal --- driver/variant/iris2/src/msm_vidc_iris2.c | 5 ++++- driver/vidc/src/venus_hfi.c | 4 ++++ 2 files changed, 8 insertions(+), 1 deletion(-) diff --git a/driver/variant/iris2/src/msm_vidc_iris2.c b/driver/variant/iris2/src/msm_vidc_iris2.c index 1b8261435d..202eb81523 100644 --- a/driver/variant/iris2/src/msm_vidc_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_iris2.c @@ -192,8 +192,9 @@ static int __disable_unprepare_clock_iris2(struct msm_vidc_core *core, if (strcmp(cl->name, clk_name)) continue; found = true; - clk_disable_unprepare(cl->clk); + if (cl->has_scaling) + __set_clk_rate(core, cl, 0); cl->prev = 0; d_vpr_h("%s: clock %s disable unprepared\n", __func__, cl->name); break; @@ -245,6 +246,8 @@ static int __prepare_enable_clock_iris2(struct msm_vidc_core *core, d_vpr_e("%s: clock %s not enabled\n", __func__, cl->name); clk_disable_unprepare(cl->clk); + if (cl->has_scaling) + __set_clk_rate(core, cl, 0); return -EINVAL; } d_vpr_h("%s: clock %s prepare enabled\n", __func__, cl->name); diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index 6a9bf160af..661a43ef66 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -1560,6 +1560,8 @@ void __disable_unprepare_clks(struct msm_vidc_core *core) __func__, cl->name); clk_disable_unprepare(cl->clk); + if (cl->has_scaling) + __set_clk_rate(core, cl, 0); cl->prev = 0; } } @@ -1647,6 +1649,8 @@ fail_clk_enable: d_vpr_e("Clock: %s disable and unprepare\n", cl->name); clk_disable_unprepare(cl->clk); + if (cl->has_scaling) + __set_clk_rate(core, cl, 0); cl->prev = 0; } From 9110a87846a9716c633af0e6ce61e438ce085089 Mon Sep 17 00:00:00 2001 From: Gaviraju Doddabettahalli Bettegowda Date: Wed, 8 Sep 2021 15:55:16 +0530 Subject: [PATCH 0422/1061] video: driver: Update msm_vidc statistics delay from command-line Currently, statistics is printing for every 2 second And these delay is hardcoded. So changes added to update the statistics delay from the command-line. - adb shell "echo 200 > /d/msm_vidc/core/stats_delay_ms" - adb shell cat /d/msm_vidc/core/stats_delay_ms Use above command to update & read statistics delay. Change-Id: I523a870203ee460d1dba8208b798f28253407e73 Signed-off-by: Gaviraju Doddabettahalli Bettegowda --- driver/platform/waipio/src/msm_vidc_waipio.c | 2 +- driver/vidc/inc/msm_vidc_internal.h | 2 +- driver/vidc/src/msm_vidc_debug.c | 58 ++++++++++++++++++++ driver/vidc/src/msm_vidc_driver.c | 2 +- 4 files changed, 61 insertions(+), 3 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index d5ea95e3df..896c2a508a 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -94,7 +94,7 @@ static struct msm_platform_core_capability core_data_waipio[] = { {DCVS, 1}, {DECODE_BATCH, 1}, {DECODE_BATCH_TIMEOUT, 200}, - {STATS_TIMEOUT, 2000}, + {STATS_TIMEOUT_MS, 2000}, {AV_SYNC_WINDOW_SIZE, 40}, {NON_FATAL_FAULTS, 1}, {ENC_AUTO_FRAMERATE, 1}, diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index cc98d27f96..2017f63a14 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -334,7 +334,7 @@ enum msm_vidc_core_capability_type { DCVS, DECODE_BATCH, DECODE_BATCH_TIMEOUT, - STATS_TIMEOUT, + STATS_TIMEOUT_MS, AV_SYNC_WINDOW_SIZE, CLK_FREQ_THRESHOLD, NON_FATAL_FAULTS, diff --git a/driver/vidc/src/msm_vidc_debug.c b/driver/vidc/src/msm_vidc_debug.c index ac3eaf1d28..8fb044fb78 100644 --- a/driver/vidc/src/msm_vidc_debug.c +++ b/driver/vidc/src/msm_vidc_debug.c @@ -15,6 +15,8 @@ extern struct msm_vidc_core *g_core; #define MAX_SSR_STRING_LEN 64 #define MAX_DEBUG_LEVEL_STRING_LEN 15 +#define MSM_VIDC_MIN_STATS_DELAY_MS 200 +#define MSM_VIDC_MAX_STATS_DELAY_MS 10000 unsigned int msm_vidc_debug = VIDC_ERR | VIDC_PRINTK | FW_ERROR | FW_FATAL | FW_PRINTK; @@ -192,6 +194,58 @@ static const struct file_operations core_info_fops = { .read = core_info_read, }; +static ssize_t stats_delay_write_ms(struct file *filp, const char __user *buf, + size_t count, loff_t *ppos) +{ + int rc = 0; + struct msm_vidc_core *core = filp->private_data; + char kbuf[MAX_DEBUG_LEVEL_STRING_LEN] = {0}; + u32 delay_ms = 0; + + /* filter partial writes and invalid commands */ + if (*ppos != 0 || count >= sizeof(kbuf) || count == 0) { + d_vpr_e("returning error - pos %d, count %d\n", *ppos, count); + rc = -EINVAL; + } + + rc = simple_write_to_buffer(kbuf, sizeof(kbuf) - 1, ppos, buf, count); + if (rc < 0) { + d_vpr_e("%s: User memory fault\n", __func__); + rc = -EFAULT; + goto exit; + } + + rc = kstrtoint(kbuf, 0, &delay_ms); + if (rc) { + d_vpr_e("returning error err %d\n", rc); + rc = -EINVAL; + goto exit; + } + delay_ms = clamp_t(u32, delay_ms, MSM_VIDC_MIN_STATS_DELAY_MS, MSM_VIDC_MAX_STATS_DELAY_MS); + core->capabilities[STATS_TIMEOUT_MS].value = delay_ms; + d_vpr_h("Stats delay is updated to - %d ms\n", delay_ms); + +exit: + return rc; +} + +static ssize_t stats_delay_read_ms(struct file *file, char __user *buf, + size_t count, loff_t *ppos) +{ + size_t len; + char kbuf[MAX_DEBUG_LEVEL_STRING_LEN]; + struct msm_vidc_core *core = file->private_data; + + len = scnprintf(kbuf, sizeof(kbuf), "%u\n", core->capabilities[STATS_TIMEOUT_MS].value); + return simple_read_from_buffer(buf, count, ppos, kbuf, len); +} + +static const struct file_operations stats_delay_fops = { + .open = simple_open, + .write = stats_delay_write_ms, + .read = stats_delay_read_ms, +}; + static ssize_t trigger_ssr_write(struct file* filp, const char __user* buf, size_t count, loff_t* ppos) { @@ -293,6 +347,10 @@ struct dentry *msm_vidc_debugfs_init_core(void *core_in) d_vpr_e("debugfs_create_file: fail\n"); goto failed_create_dir; } + if (!debugfs_create_file("stats_delay_ms", 0644, dir, core, &stats_delay_fops)) { + d_vpr_e("debugfs_create_file: fail\n"); + goto failed_create_dir; + } failed_create_dir: return dir; } diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 894468485f..0aa9c75442 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -2877,7 +2877,7 @@ int schedule_stats_work(struct msm_vidc_inst *inst) } core = inst->core; mod_delayed_work(inst->response_workq, &inst->stats_work, - msecs_to_jiffies(core->capabilities[STATS_TIMEOUT].value)); + msecs_to_jiffies(core->capabilities[STATS_TIMEOUT_MS].value)); return 0; } From d9f26e4dfe51655096a729c4a1017143deb9b31f Mon Sep 17 00:00:00 2001 From: Karthikeyan Periasamy Date: Wed, 15 Sep 2021 15:34:46 -0700 Subject: [PATCH 0423/1061] Kalama-BU: add QMAA compliance to video dlkms CRs-Fixed: 2836558 Change-Id: Ife5e89d8921bf9bb5abc3fdc73581c9c24f62e86 Signed-off-by: Mulugeta Engdaw Signed-off-by: Karthikeyan Periasamy --- video_kernel_board.mk | 2 ++ 1 file changed, 2 insertions(+) diff --git a/video_kernel_board.mk b/video_kernel_board.mk index dabe527d9f..362468f81e 100644 --- a/video_kernel_board.mk +++ b/video_kernel_board.mk @@ -1,5 +1,6 @@ # SPDX-License-Identifier: GPL-2.0-only # Build video kernel driver +ifneq ($(TARGET_USES_QMAA),true) ifneq ($(TARGET_BOARD_AUTO),true) ifeq ($(call is-board-platform-in-list,$(TARGET_BOARD_PLATFORM)),true) BOARD_VENDOR_KERNEL_MODULES += $(KERNEL_MODULES_OUT)/msm_video.ko @@ -7,3 +8,4 @@ BOARD_VENDOR_KERNEL_MODULES += $(KERNEL_MODULES_OUT)/msm_video.ko BUILD_VIDEO_TECHPACK_SOURCE := true endif endif +endif From 9d5ba49ad06207584e749819025966b748054b99 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Wed, 15 Sep 2021 15:29:47 -0700 Subject: [PATCH 0424/1061] video: driver: reject opening 17th video instance Reject opening 17th video instance. Change-Id: Iebc6f8c915c2594e218acbabf4f8e6b70a5ce11d Signed-off-by: Akshata Sahukar --- driver/vidc/src/msm_vidc_driver.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 0aa9c75442..1be2ebd1b7 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -3602,11 +3602,11 @@ int msm_vidc_add_session(struct msm_vidc_inst *inst) list_for_each_entry(i, &core->instances, list) count++; - if (count <= core->capabilities[MAX_SESSION_COUNT].value) { + if (count < core->capabilities[MAX_SESSION_COUNT].value) { list_add_tail(&inst->list, &core->instances); } else { - i_vpr_e(inst, "%s: total sessions %d exceeded max limit %d\n", - __func__, count, core->capabilities[MAX_SESSION_COUNT].value); + i_vpr_e(inst, "%s: max limit %d already running %d sessions\n", + __func__, core->capabilities[MAX_SESSION_COUNT].value, count); rc = -EINVAL; } core_unlock(core, __func__); From 566791bd824515b9a390216095ced71e2779aa55 Mon Sep 17 00:00:00 2001 From: Gaviraju Doddabettahalli Bettegowda Date: Tue, 7 Sep 2021 17:07:53 +0530 Subject: [PATCH 0425/1061] video: driver: print frame-number for each ETB, EBD, FTB, FBD - Added changes to print frame-number for each ETB, EBD, FTB, FBD. - framenumber will be helpful to detect logdrop in perf analysis. Change-Id: I1b6c8fdbeb2f2003e69d02cd5d871535e8e73c42 Signed-off-by: Gaviraju Doddabettahalli Bettegowda --- driver/vidc/src/msm_vidc_driver.c | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 0aa9c75442..c2f5b0faa4 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -369,15 +369,21 @@ const char *v4l2_pixelfmt_name(u32 pixfmt) void print_vidc_buffer(u32 tag, const char *tag_str, const char *str, struct msm_vidc_inst *inst, struct msm_vidc_buffer *vbuf) { + struct dma_buf *dbuf; + if (!(tag & msm_vidc_debug) || !inst || !vbuf || !tag_str || !str) return; + dbuf = (struct dma_buf *)vbuf->dmabuf; + dprintk_inst(tag, tag_str, inst, - "%s: %s: idx %2d fd %3d off %d daddr %#llx size %d filled %d flags %#x ts %lld attr %#x\n", + "%s: %s: idx %2d fd %3d off %d daddr %#llx inode %8lu ref %2ld size %8d filled %8d flags %#x ts %8lld attr %#x counts(etb ebd ftb fbd) %4llu %4llu %4llu %4llu\n", str, buf_name(vbuf->type), vbuf->index, vbuf->fd, vbuf->data_offset, - vbuf->device_addr, vbuf->buffer_size, vbuf->data_size, - vbuf->flags, vbuf->timestamp, vbuf->attr); + vbuf->device_addr, (dbuf ? file_inode(dbuf->file)->i_ino : -1), + (dbuf ? file_count(dbuf->file) : -1), vbuf->buffer_size, vbuf->data_size, + vbuf->flags, vbuf->timestamp, vbuf->attr, inst->debug_count.etb, + inst->debug_count.ebd, inst->debug_count.ftb, inst->debug_count.fbd); } void print_vb2_buffer(const char *str, struct msm_vidc_inst *inst, @@ -2857,7 +2863,7 @@ static void msm_vidc_print_stats(struct msm_vidc_inst *inst) bitrate_kbps = (inst->stats.data_size * 8 * 1000) / (dt_ms * 1024); i_vpr_hp(inst, - "stats: counts (etb,ebd,ftb,fbd): %u %u %u %u (total %u %u %u %u), achieved bitrate %lldKbps fps %u/s, frame rate %u, operating rate %u, priority %u, dt %ums\n", + "stats: counts (etb,ebd,ftb,fbd): %u %u %u %u (total %llu %llu %llu %llu), achieved bitrate %lldKbps fps %u/s, frame rate %u, operating rate %u, priority %u, dt %ums\n", etb, ebd, ftb, fbd, inst->debug_count.etb, inst->debug_count.ebd, inst->debug_count.ftb, inst->debug_count.fbd, bitrate_kbps, achieved_fps, frame_rate, operating_rate, priority, dt_ms); From e2ec45b2e0eba7a2e4ff72abc341cb9cdeb054a0 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Thu, 16 Sep 2021 11:23:22 -0700 Subject: [PATCH 0426/1061] video: driver: reject 7th VP9 decoder session reject 7th VP9 decoder session. Change-Id: I2b739be0aff5492bd10d00c3068aa44e0895ee09 Signed-off-by: Akshata Sahukar --- driver/vidc/inc/msm_vidc_internal.h | 1 + driver/vidc/src/msm_vdec.c | 32 ++++++++++++++++++++++++++++- driver/vidc/src/msm_venc.c | 2 +- 3 files changed, 33 insertions(+), 2 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 2017f63a14..8f7c700b39 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -50,6 +50,7 @@ #define BIT_DEPTH_10 (10 << 16 | 10) #define CODED_FRAMES_PROGRESSIVE 0x0 #define CODED_FRAMES_INTERLACE 0x1 +#define MAX_VP9D_INST_COUNT 6 /* TODO: move below macros to waipio.c */ #define MAX_ENH_LAYER_HB 3 #define MAX_HEVC_ENH_LAYER_SLIDING_WINDOW 5 diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index fa21f9f91d..c22e3d807e 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -91,6 +91,7 @@ static int msm_vdec_codec_change(struct msm_vidc_inst *inst, u32 v4l2_codec) v4l2_pixelfmt_name(v4l2_codec)); inst->codec = v4l2_codec_to_driver(v4l2_codec, __func__); + inst->fmts[INPUT_PORT].fmt.pix_mp.pixelformat = v4l2_codec; rc = msm_vidc_update_debug_str(inst); if (rc) goto exit; @@ -2199,6 +2200,25 @@ int msm_vdec_try_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) return rc; } +static bool msm_vidc_check_max_sessions_vp9d(struct msm_vidc_core *core) +{ + u32 vp9d_instance_count = 0; + struct msm_vidc_inst *inst = NULL; + + core_lock(core, __func__); + list_for_each_entry(inst, &core->instances, list) { + if (is_decode_session(inst) && + inst->fmts[INPUT_PORT].fmt.pix_mp.pixelformat == + V4L2_PIX_FMT_VP9) + vp9d_instance_count++; + } + core_unlock(core, __func__); + + if (vp9d_instance_count > MAX_VP9D_INST_COUNT) + return true; + return false; +} + int msm_vdec_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) { int rc = 0; @@ -2219,6 +2239,17 @@ int msm_vdec_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) if (rc) goto err_invalid_fmt; } + + if (f->fmt.pix_mp.pixelformat == V4L2_PIX_FMT_VP9) { + if (msm_vidc_check_max_sessions_vp9d(inst->core)) { + i_vpr_e(inst, + "%s: vp9d sessions exceeded max limit %d\n", + __func__, MAX_VP9D_INST_COUNT); + rc = -ENOMEM; + goto err_invalid_fmt; + } + } + fmt = &inst->fmts[INPUT_PORT]; fmt->type = INPUT_MPLANE; @@ -2226,7 +2257,6 @@ int msm_vdec_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) V4L2_PIX_FMT_HEVC ? 32 : 16; fmt->fmt.pix_mp.width = ALIGN(f->fmt.pix_mp.width, codec_align); fmt->fmt.pix_mp.height = ALIGN(f->fmt.pix_mp.height, codec_align); - fmt->fmt.pix_mp.pixelformat = f->fmt.pix_mp.pixelformat; fmt->fmt.pix_mp.num_planes = 1; fmt->fmt.pix_mp.plane_fmt[0].bytesperline = 0; fmt->fmt.pix_mp.plane_fmt[0].sizeimage = call_session_op(core, diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index 5e1d3bf5f2..1eca54e623 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -72,6 +72,7 @@ static int msm_venc_codec_change(struct msm_vidc_inst *inst, u32 v4l2_codec) v4l2_pixelfmt_name(v4l2_codec)); inst->codec = v4l2_codec_to_driver(v4l2_codec, __func__); + inst->fmts[OUTPUT_PORT].fmt.pix_mp.pixelformat = v4l2_codec; rc = msm_vidc_update_debug_str(inst); if (rc) goto exit; @@ -1131,7 +1132,6 @@ int msm_venc_s_fmt_output(struct msm_vidc_inst *inst, struct v4l2_format *f) /* use grid dimension for image session */ if (is_image_session(inst)) fmt->fmt.pix_mp.width = fmt->fmt.pix_mp.height = HEIC_GRID_DIMENSION; - fmt->fmt.pix_mp.pixelformat = f->fmt.pix_mp.pixelformat; fmt->fmt.pix_mp.num_planes = 1; fmt->fmt.pix_mp.plane_fmt[0].bytesperline = 0; fmt->fmt.pix_mp.plane_fmt[0].sizeimage = call_session_op(core, From 98dfab85840a22bed1a753053edbec28c0077a17 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Fri, 17 Sep 2021 14:12:27 -0700 Subject: [PATCH 0427/1061] video: driver: prioritize MIN_QUALITY adjustment over BLUR_TYPES MIN_QUALITY is parent of BLUR_TYPES, hence prioritize MIN_QUALITY control adjustment over BLUR_TYPES. Change-Id: I8498760d7b3ecd1546c2be43d2ae945781d4a84d Signed-off-by: Akshata Sahukar --- driver/platform/waipio/src/msm_vidc_waipio.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 896c2a508a..af7e2bae6c 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -149,8 +149,13 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 0, 0, CAP_FLAG_ROOT, {0}, - {PROFILE, MIN_FRAME_QP, MAX_FRAME_QP, I_FRAME_QP, P_FRAME_QP, - B_FRAME_QP, META_ROI_INFO, BLUR_TYPES, MIN_QUALITY}}, + {/* Do not change order of META_ROI_INFO, MIN_QUALITY, BLUR_TYPES + * Since parent -> children relationship for these cap_ids is + * as follows: + * META_ROI_INFO -> MIN_QUALITY -> BLUR_TYPES + */ + PROFILE, MIN_FRAME_QP, MAX_FRAME_QP, I_FRAME_QP, P_FRAME_QP, + B_FRAME_QP, META_ROI_INFO, MIN_QUALITY, BLUR_TYPES}}, {PIX_FMTS, DEC, HEVC|HEIC, MSM_VIDC_FMT_NV12, From 23796052b7ae11cebe1d3f1699f4202e07619a37 Mon Sep 17 00:00:00 2001 From: Karthikeyan Periasamy Date: Thu, 23 Sep 2021 23:26:50 -0700 Subject: [PATCH 0428/1061] Kalama-BU: add DLKM compliance to video dlkms Change-Id: I833edaa05b48f2493ae9c228a8e8ca3bde7844bc Signed-off-by: Karthikeyan Periasamy --- video_kernel_board.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/video_kernel_board.mk b/video_kernel_board.mk index 362468f81e..109b098a85 100644 --- a/video_kernel_board.mk +++ b/video_kernel_board.mk @@ -1,6 +1,6 @@ # SPDX-License-Identifier: GPL-2.0-only # Build video kernel driver -ifneq ($(TARGET_USES_QMAA),true) +ifneq ($(TARGET_KERNEL_DLKM_DISABLE),true) ifneq ($(TARGET_BOARD_AUTO),true) ifeq ($(call is-board-platform-in-list,$(TARGET_BOARD_PLATFORM)),true) BOARD_VENDOR_KERNEL_MODULES += $(KERNEL_MODULES_OUT)/msm_video.ko From 91c6dccf94e5c89ce7230c0babce157eca7b3987 Mon Sep 17 00:00:00 2001 From: Gaviraju Doddabettahalli Bettegowda Date: Mon, 16 Aug 2021 10:04:49 +0530 Subject: [PATCH 0429/1061] video: driver: Enable msm_vidc_events trace Enable tracing by adding trace function definitions. Commands for collecting msm_vidc_events traces: - adb shell "echo 10240 > /sys/kernel/tracing/buffer_size_kb" - adb shell "echo 0 > /sys/kernel/tracing/tracing_on" - adb shell "echo nop > /sys/kernel/tracing/current_tracer" - adb shell "echo > /sys/kernel/tracing/set_event" - adb shell "echo 1 > /sys/kernel/tracing/events/msm_vidc_events/enable" - adb shell "echo 1 > /sys/kernel/tracing/tracing_on" - adb shell "cat /sys/kernel/tracing/trace_pipe > /data/trace_log.txt" - adb pull /data/trace_log.txt Events: - msm_v4l2_vidc_fw_load - msm_v4l2_vidc_open - msm_v4l2_vidc_close - msm_vidc_dma_buffer - msm_v4l2_vidc_buffer_event_log - msm_vidc_perf_power_scale - msm_vidc_common_state_change - venus_hfi_var_done These are the events registered. Change-Id: Iab6952bb84df102f36a2776fdf9ef5133034c5a0 Signed-off-by: Gaviraju Doddabettahalli Bettegowda --- driver/vidc/inc/msm_vidc_events.h | 298 ++++++++++++++++++++++++++++++ driver/vidc/src/msm_vidc_debug.c | 3 +- driver/vidc/src/msm_vidc_driver.c | 12 +- driver/vidc/src/msm_vidc_memory.c | 7 + driver/vidc/src/msm_vidc_power.c | 5 + driver/vidc/src/msm_vidc_v4l2.c | 6 + driver/vidc/src/venus_hfi.c | 8 + 7 files changed, 337 insertions(+), 2 deletions(-) create mode 100644 driver/vidc/inc/msm_vidc_events.h diff --git a/driver/vidc/inc/msm_vidc_events.h b/driver/vidc/inc/msm_vidc_events.h new file mode 100644 index 0000000000..8ffbc964d6 --- /dev/null +++ b/driver/vidc/inc/msm_vidc_events.h @@ -0,0 +1,298 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) 2012-2021, The Linux Foundation. All rights reserved. + */ + +#if !defined(_TRACE_MSM_VIDC_H) || defined(TRACE_HEADER_MULTI_READ) +#define _TRACE_MSM_VIDC_H + +#undef TRACE_SYSTEM +#define TRACE_SYSTEM msm_vidc_events +#undef TRACE_INCLUDE_PATH +#define TRACE_INCLUDE_PATH . +#undef TRACE_INCLUDE_FILE +#define TRACE_INCLUDE_FILE msm_vidc_events + +#include +#include "msm_vidc_inst.h" + +DECLARE_EVENT_CLASS(msm_v4l2_vidc_inst, + + TP_PROTO(char *dummy, struct msm_vidc_inst *inst), + + TP_ARGS(dummy, inst), + + TP_STRUCT__entry( + __field(char *, dummy) + __field(const char *, debug_str) + ), + + TP_fast_assign( + __entry->dummy = dummy; + __entry->debug_str = inst ? inst->debug_str : (u8 *)""; + ), + + TP_printk("%s: %s\n", __entry->dummy, __entry->debug_str) +); + +DEFINE_EVENT(msm_v4l2_vidc_inst, msm_v4l2_vidc_open, + + TP_PROTO(char *dummy, struct msm_vidc_inst *inst), + + TP_ARGS(dummy, inst) +); + +DEFINE_EVENT(msm_v4l2_vidc_inst, msm_v4l2_vidc_close, + + TP_PROTO(char *dummy, struct msm_vidc_inst *inst), + + TP_ARGS(dummy, inst) +); + +DECLARE_EVENT_CLASS(msm_v4l2_vidc_fw_load, + + TP_PROTO(char *dummy), + + TP_ARGS(dummy), + + TP_STRUCT__entry( + __field(char *, dummy) + ), + + TP_fast_assign( + __entry->dummy = dummy; + ), + + TP_printk("%s\n", __entry->dummy) +); + +DEFINE_EVENT(msm_v4l2_vidc_fw_load, msm_v4l2_vidc_fw_load, + + TP_PROTO(char *dummy), + + TP_ARGS(dummy) +); + +DECLARE_EVENT_CLASS(msm_vidc_driver, + + TP_PROTO(struct msm_vidc_inst *inst, const char *func, + const char *old_state, const char *new_state), + + TP_ARGS(inst, func, old_state, new_state), + + TP_STRUCT__entry( + __field(const char *, debug_str) + __field(const char *, func) + __field(const char *, old_state) + __field(const char *, new_state) + ), + + TP_fast_assign( + __entry->debug_str = inst ? inst->debug_str : (u8 *)""; + __entry->func = func; + __entry->old_state = old_state; + __entry->new_state = new_state; + ), + + TP_printk("%s: %s: state changed to %s from %s\n", + __entry->debug_str, + __entry->func, + __entry->new_state, + __entry->old_state) +); + +DEFINE_EVENT(msm_vidc_driver, msm_vidc_common_state_change, + + TP_PROTO(struct msm_vidc_inst *inst, const char *func, + const char *old_state, const char *new_state), + + TP_ARGS(inst, func, old_state, new_state) +); + +DECLARE_EVENT_CLASS(venus_hfi_var, + + TP_PROTO(u32 cp_start, u32 cp_size, + u32 cp_nonpixel_start, u32 cp_nonpixel_size), + + TP_ARGS(cp_start, cp_size, cp_nonpixel_start, cp_nonpixel_size), + + TP_STRUCT__entry( + __field(u32, cp_start) + __field(u32, cp_size) + __field(u32, cp_nonpixel_start) + __field(u32, cp_nonpixel_size) + ), + + TP_fast_assign( + __entry->cp_start = cp_start; + __entry->cp_size = cp_size; + __entry->cp_nonpixel_start = cp_nonpixel_start; + __entry->cp_nonpixel_size = cp_nonpixel_size; + ), + + TP_printk( + "TZBSP_MEM_PROTECT_VIDEO_VAR done, cp_start : 0x%x, cp_size : 0x%x, cp_nonpixel_start : 0x%x, cp_nonpixel_size : 0x%x\n", + __entry->cp_start, + __entry->cp_size, + __entry->cp_nonpixel_start, + __entry->cp_nonpixel_size) +); + +DEFINE_EVENT(venus_hfi_var, venus_hfi_var_done, + + TP_PROTO(u32 cp_start, u32 cp_size, + u32 cp_nonpixel_start, u32 cp_nonpixel_size), + + TP_ARGS(cp_start, cp_size, cp_nonpixel_start, cp_nonpixel_size) +); + +DECLARE_EVENT_CLASS(msm_v4l2_vidc_buffer_events, + + TP_PROTO(struct msm_vidc_inst *inst, const char *str, const char *buf_type, + struct msm_vidc_buffer *vbuf, unsigned long inode, long ref_count), + + TP_ARGS(inst, str, buf_type, vbuf, inode, ref_count), + + TP_STRUCT__entry( + __field(u8 *, debug_str) + __field(const char *, str) + __field(const char *, buf_type) + __field(u32, index) + __field(int, fd) + __field(u32, data_offset) + __field(u64, device_addr) + __field(unsigned long, inode) + __field(long, ref_count) + __field(u32, buffer_size) + __field(u32, data_size) + __field(u32, flags) + __field(u64, timestamp) + __field(int, attr) + __field(u64, etb) + __field(u64, ebd) + __field(u64, ftb) + __field(u64, fbd) + ), + + TP_fast_assign( + __entry->debug_str = inst ? inst->debug_str : (u8 *)""; + __entry->str = str; + __entry->buf_type = buf_type; + __entry->index = vbuf ? vbuf->index : -1; + __entry->fd = vbuf ? vbuf->fd : 0; + __entry->data_offset = vbuf ? vbuf->data_offset : 0; + __entry->device_addr = vbuf ? vbuf->device_addr : 0; + __entry->inode = inode; + __entry->ref_count = ref_count; + __entry->buffer_size = vbuf ? vbuf->buffer_size : 0; + __entry->data_size = vbuf ? vbuf->data_size : 0; + __entry->flags = vbuf ? vbuf->flags : 0; + __entry->timestamp = vbuf ? vbuf->timestamp : 0; + __entry->attr = vbuf ? vbuf->attr : 0; + __entry->etb = inst ? inst->debug_count.etb : 0; + __entry->ebd = inst ? inst->debug_count.ebd : 0; + __entry->ftb = inst ? inst->debug_count.ftb : 0; + __entry->fbd = inst ? inst->debug_count.fbd : 0; + ), + + TP_printk( + "%s: %s: %s: idx %2d fd %3d off %d daddr %#llx inode %8lu ref %2ld size %8d filled %8d flags %#x ts %8lld attr %#x counts(etb ebd ftb fbd) %4llu %4llu %4llu %4llu\n", + __entry->debug_str, __entry->str, __entry->buf_type, __entry->index, __entry->fd, + __entry->data_offset, __entry->device_addr, __entry->inode, __entry->ref_count, + __entry->buffer_size, __entry->data_size, __entry->flags, __entry->timestamp, + __entry->attr, __entry->etb, __entry->ebd, __entry->ftb, __entry->fbd) +); + +DEFINE_EVENT(msm_v4l2_vidc_buffer_events, msm_v4l2_vidc_buffer_event_log, + + TP_PROTO(struct msm_vidc_inst *inst, const char *str, const char *buf_type, + struct msm_vidc_buffer *vbuf, unsigned long inode, long ref_count), + + TP_ARGS(inst, str, buf_type, vbuf, inode, ref_count) +); + +DECLARE_EVENT_CLASS(msm_vidc_perf, + + TP_PROTO(struct msm_vidc_inst *inst, u64 clk_freq, u64 bw_ddr, u64 bw_llcc), + + TP_ARGS(inst, clk_freq, bw_ddr, bw_llcc), + + TP_STRUCT__entry( + __field(u8 *, debug_str) + __field(u64, curr_freq) + __field(u32, ddr_bw) + __field(u32, sys_cache_bw) + __field(u32, dcvs_flags) + __field(u64, clk_freq) + __field(u64, bw_ddr) + __field(u64, bw_llcc) + ), + + TP_fast_assign( + __entry->debug_str = inst ? inst->debug_str : (u8 *)""; + __entry->curr_freq = inst ? inst->power.curr_freq : 0; + __entry->ddr_bw = inst ? inst->power.ddr_bw : 0; + __entry->sys_cache_bw = inst ? inst->power.sys_cache_bw : 0; + __entry->dcvs_flags = inst ? inst->power.dcvs_flags : 0; + __entry->clk_freq = clk_freq; + __entry->bw_ddr = bw_ddr; + __entry->bw_llcc = bw_llcc; + ), + + TP_printk("%s: power: inst: clk %lld ddr %d llcc %d dcvs flags %#x, core: clk %lld ddr %lld llcc %lld\n", + __entry->debug_str, __entry->curr_freq, __entry->ddr_bw, __entry->sys_cache_bw, + __entry->dcvs_flags, __entry->clk_freq, __entry->bw_ddr, __entry->bw_llcc) +); + +DEFINE_EVENT(msm_vidc_perf, msm_vidc_perf_power_scale, + + TP_PROTO(struct msm_vidc_inst *inst, u64 clk_freq, u64 bw_ddr, u64 bw_llcc), + + TP_ARGS(inst, clk_freq, bw_ddr, bw_llcc) +); + +DECLARE_EVENT_CLASS(msm_vidc_buffer_dma_ops, + + TP_PROTO(const char *buffer_op, void *dmabuf, u8 size, void *kvaddr, + const char *buf_name, u8 secure, u32 region), + + TP_ARGS(buffer_op, dmabuf, size, kvaddr, buf_name, secure, region), + + TP_STRUCT__entry( + __field(const char *, buffer_op) + __field(void *, dmabuf) + __field(u8, size) + __field(void *, kvaddr) + __field(const char *, buf_name) + __field(u8, secure) + __field(u32, region) + ), + + TP_fast_assign( + __entry->buffer_op = buffer_op; + __entry->dmabuf = dmabuf; + __entry->size = size; + __entry->kvaddr = kvaddr; + __entry->buf_name = buf_name; + __entry->secure = secure; + __entry->region = region; + ), + + TP_printk( + "%s: dmabuf %pK, size %d, kvaddr %pK, buffer_type %s, secure %d, region %d\n", + __entry->buffer_op, __entry->dmabuf, __entry->size, __entry->kvaddr, + __entry->buf_name, __entry->secure, __entry->region) +); + +DEFINE_EVENT(msm_vidc_buffer_dma_ops, msm_vidc_dma_buffer, + + TP_PROTO(const char *buffer_op, void *dmabuf, u8 size, void *kvaddr, + const char *buf_name, u8 secure, u32 region), + + TP_ARGS(buffer_op, dmabuf, size, kvaddr, buf_name, secure, region) +); + +#endif + +/* This part must be outside protection */ +#include diff --git a/driver/vidc/src/msm_vidc_debug.c b/driver/vidc/src/msm_vidc_debug.c index 8fb044fb78..31aedd4bb1 100644 --- a/driver/vidc/src/msm_vidc_debug.c +++ b/driver/vidc/src/msm_vidc_debug.c @@ -2,7 +2,7 @@ /* * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. */ - +#define CREATE_TRACE_POINTS #include "msm_vidc_debug.h" #include "msm_vidc_driver.h" #include "msm_vidc_dt.h" @@ -10,6 +10,7 @@ #include "msm_vidc_core.h" #include "msm_vidc_inst.h" #include "msm_vidc_internal.h" +#include "msm_vidc_events.h" extern struct msm_vidc_core *g_core; diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 0e089e8718..b937bb8917 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -22,6 +22,8 @@ #include "venus_hfi.h" #include "venus_hfi_response.h" #include "hfi_packet.h" +#include "msm_vidc_events.h" + extern struct msm_vidc_core *g_core; #define is_odd(val) ((val) % 2 == 1) @@ -371,7 +373,7 @@ void print_vidc_buffer(u32 tag, const char *tag_str, const char *str, struct msm { struct dma_buf *dbuf; - if (!(tag & msm_vidc_debug) || !inst || !vbuf || !tag_str || !str) + if (!inst || !vbuf || !tag_str || !str) return; dbuf = (struct dma_buf *)vbuf->dmabuf; @@ -384,6 +386,11 @@ void print_vidc_buffer(u32 tag, const char *tag_str, const char *str, struct msm (dbuf ? file_count(dbuf->file) : -1), vbuf->buffer_size, vbuf->data_size, vbuf->flags, vbuf->timestamp, vbuf->attr, inst->debug_count.etb, inst->debug_count.ebd, inst->debug_count.ftb, inst->debug_count.fbd); + + trace_msm_v4l2_vidc_buffer_event_log(inst, str, buf_name(vbuf->type), vbuf, + (dbuf ? file_inode(dbuf->file)->i_ino : -1), (dbuf ? file_count(dbuf->file) : -1)); + + } void print_vb2_buffer(const char *str, struct msm_vidc_inst *inst, @@ -1194,6 +1201,9 @@ int msm_vidc_change_inst_state(struct msm_vidc_inst *inst, i_vpr_h(inst, "%s: state changed to %s from %s\n", func, state_name(request_state), state_name(inst->state)); + trace_msm_vidc_common_state_change(inst, func, state_name(inst->state), + state_name(request_state)); + inst->state = request_state; return 0; diff --git a/driver/vidc/src/msm_vidc_memory.c b/driver/vidc/src/msm_vidc_memory.c index 7b22dec0cd..f33cb36f86 100644 --- a/driver/vidc/src/msm_vidc_memory.c +++ b/driver/vidc/src/msm_vidc_memory.c @@ -16,6 +16,7 @@ #include "msm_vidc_driver.h" #include "msm_vidc_dt.h" #include "msm_vidc_core.h" +#include "msm_vidc_events.h" struct msm_vidc_buf_region_name { enum msm_vidc_buffer_region region; @@ -388,6 +389,9 @@ int msm_vidc_memory_alloc(struct msm_vidc_core *core, struct msm_vidc_alloc *mem "%s: dmabuf %pK, size %d, kvaddr %pK, buffer_type %s, secure %d, region %d\n", __func__, mem->dmabuf, mem->size, mem->kvaddr, buf_name(mem->type), mem->secure, mem->region); + trace_msm_vidc_dma_buffer("ALLOC", mem->dmabuf, mem->size, mem->kvaddr, + buf_name(mem->type), mem->secure, mem->region); + return 0; error: @@ -409,6 +413,9 @@ int msm_vidc_memory_free(struct msm_vidc_core *core, struct msm_vidc_alloc *mem) __func__, mem->dmabuf, mem->size, mem->kvaddr, buf_name(mem->type), mem->secure, mem->region); + trace_msm_vidc_dma_buffer("FREE", mem->dmabuf, mem->size, mem->kvaddr, + buf_name(mem->type), mem->secure, mem->region); + if (mem->kvaddr) { dma_buf_vunmap(mem->dmabuf, mem->kvaddr); mem->kvaddr = NULL; diff --git a/driver/vidc/src/msm_vidc_power.c b/driver/vidc/src/msm_vidc_power.c index 47568bdd8a..4440ec1f24 100644 --- a/driver/vidc/src/msm_vidc_power.c +++ b/driver/vidc/src/msm_vidc_power.c @@ -13,6 +13,7 @@ #include "msm_vidc_platform.h" #include "msm_vidc_buffer.h" #include "venus_hfi.h" +#include "msm_vidc_events.h" /* Q16 Format */ #define MSM_VIDC_MIN_UBWC_COMPLEXITY_FACTOR (1 << 16) @@ -524,6 +525,10 @@ int msm_vidc_scale_power(struct msm_vidc_inst *inst, bool scale_buses) inst->power.sys_cache_bw, inst->power.dcvs_flags, core->power.clk_freq, core->power.bw_ddr, core->power.bw_llcc); + + trace_msm_vidc_perf_power_scale(inst, core->power.clk_freq, + core->power.bw_ddr, core->power.bw_llcc); + return 0; } diff --git a/driver/vidc/src/msm_vidc_v4l2.c b/driver/vidc/src/msm_vidc_v4l2.c index b8fd2f242a..fa978eeffc 100644 --- a/driver/vidc/src/msm_vidc_v4l2.c +++ b/driver/vidc/src/msm_vidc_v4l2.c @@ -10,6 +10,7 @@ #include "msm_vidc_debug.h" #include "msm_vidc_driver.h" #include "msm_vidc.h" +#include "msm_vidc_events.h" extern struct msm_vidc_core *g_core; @@ -36,14 +37,17 @@ int msm_v4l2_open(struct file *filp) struct msm_vidc_core *core = video_drvdata(filp); struct msm_vidc_inst *inst; + trace_msm_v4l2_vidc_open("START", NULL); inst = msm_vidc_open(core, vid_dev->type); if (!inst) { d_vpr_e("Failed to create instance, type = %d\n", vid_dev->type); + trace_msm_v4l2_vidc_open("END", NULL); return -ENOMEM; } clear_bit(V4L2_FL_USES_V4L2_FH, &vdev->flags); filp->private_data = &(inst->event_handler); + trace_msm_v4l2_vidc_open("END", inst); return 0; } @@ -53,9 +57,11 @@ int msm_v4l2_close(struct file *filp) struct msm_vidc_inst *inst; inst = get_vidc_inst(filp, NULL); + trace_msm_v4l2_vidc_close("START", inst); rc = msm_vidc_close(inst); filp->private_data = NULL; + trace_msm_v4l2_vidc_close("END", NULL); return rc; } diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index 661a43ef66..8dd3a53f70 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -25,6 +25,7 @@ #include "msm_vidc_debug.h" #include "hfi_packet.h" #include "venus_hfi_response.h" +#include "msm_vidc_events.h" #define MIN_PAYLOAD_SIZE 3 @@ -1303,6 +1304,10 @@ static int __protect_cp_mem(struct msm_vidc_core *core) if (rc) d_vpr_e("Failed to protect memory(%d)\n", rc); + trace_venus_hfi_var_done( + memprot.cp_start, memprot.cp_size, + memprot.cp_nonpixel_start, memprot.cp_nonpixel_size); + return rc; } #if 0 // TODO @@ -2614,6 +2619,7 @@ int __load_fw(struct msm_vidc_core *core) core->handoff_done = false; core->hw_power_control = false; + trace_msm_v4l2_vidc_fw_load("START"); rc = __init_resources(core); if (rc) { d_vpr_e("%s: Failed to init resources: %d\n", __func__, rc); @@ -2651,6 +2657,7 @@ int __load_fw(struct msm_vidc_core *core) * present. */ __hand_off_regulators(core); + trace_msm_v4l2_vidc_fw_load("END"); return rc; fail_protect_mem: @@ -2662,6 +2669,7 @@ fail_load_fw: fail_venus_power_on: __deinit_resources(core); fail_init_res: + trace_msm_v4l2_vidc_fw_load("END"); return rc; } From 7e75edbeebd0ec00f2080715622c36810263a326 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Mon, 27 Sep 2021 11:53:44 -0700 Subject: [PATCH 0430/1061] video: driver: Avoid setting same GOP size to fw dynamically Avoid setting same GOP size to fw dynamically to avoid unnecessary generation of IDR frame from firmware. Change-Id: I50c61e9f86ebc9c8a3834fbceb525666b7b194bb Signed-off-by: Akshata Sahukar --- driver/vidc/src/msm_vidc_control.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index a22642e9f7..c18ffee94f 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -469,6 +469,14 @@ static int msm_vidc_adjust_dynamic_property(struct msm_vidc_inst *inst, goto exit; } + if (capability->cap[cap_id].value == prev_value && cap_id == GOP_SIZE) { + /* + * Ignore setting same GOP size value to firmware to avoid + * unnecessary generation of IDR frame. + */ + goto exit; + } + /* add cap_id to firmware list always */ rc = msm_vidc_add_capid_to_list(inst, cap_id, FW_LIST); if (rc) From caeaca6ccdb6ec96da4311c262f2b06eb312b545 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Tue, 28 Sep 2021 18:40:54 +0530 Subject: [PATCH 0431/1061] video: driver: disable and unprepare clock source to update MMRM count [1] Currently enable/disable clock(video_cc_mvs0_clk_src) not called. So updating clock reset value to MMRM is getting skipped. So MMRM has high projection [2] __scale_clocks() api is not considering scaling factor, while setting clock rate. Added change to address above 2 issues. Change-Id: I4e96556f9b9d659c436e77d03f8d0dd471a50226 Signed-off-by: Govindaraj Rajagopal --- driver/variant/iris2/src/msm_vidc_iris2.c | 26 +++++++++++++++++++++-- driver/vidc/inc/msm_vidc_power.h | 3 +++ driver/vidc/src/msm_vidc_power.c | 12 ----------- driver/vidc/src/venus_hfi.c | 22 ++++++++++++++++--- 4 files changed, 46 insertions(+), 17 deletions(-) diff --git a/driver/variant/iris2/src/msm_vidc_iris2.c b/driver/variant/iris2/src/msm_vidc_iris2.c index 202eb81523..9e953b0a65 100644 --- a/driver/variant/iris2/src/msm_vidc_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_iris2.c @@ -213,6 +213,7 @@ static int __prepare_enable_clock_iris2(struct msm_vidc_core *core, int rc = 0; struct clock_info *cl; bool found; + u64 rate = 0; if (!core || !clk_name) { d_vpr_e("%s: invalid params\n", __func__); @@ -233,8 +234,16 @@ static int __prepare_enable_clock_iris2(struct msm_vidc_core *core, * them. Since we don't really have a load at this point, scale * it to the lowest frequency possible */ - if (cl->has_scaling) - __set_clk_rate(core, cl, clk_round_rate(cl->clk, 0)); + if (cl->has_scaling) { + rate = clk_round_rate(cl->clk, 0); + /** + * source clock is already multipled with scaling ratio and __set_clk_rate + * attempts to multiply again. So divide scaling ratio before calling + * __set_clk_rate. + */ + rate = rate / MSM_VIDC_CLOCK_SOURCE_SCALING_RATIO; + __set_clk_rate(core, cl, rate); + } rc = clk_prepare_enable(cl->clk); if (rc) { @@ -586,6 +595,13 @@ static int __power_off_iris2_controller(struct msm_vidc_core *core) rc = 0; } + /* Turn off MVP MVS0 SRC clock */ + rc = __disable_unprepare_clock_iris2(core, "video_cc_mvs0_clk_src"); + if (rc) { + d_vpr_e("%s: disable unprepare video_cc_mvs0_clk_src failed\n", __func__); + rc = 0; + } + return rc; } @@ -639,8 +655,14 @@ static int __power_on_iris2_controller(struct msm_vidc_core *core) if (rc) goto fail_clk_controller; + rc = __prepare_enable_clock_iris2(core, "video_cc_mvs0_clk_src"); + if (rc) + goto fail_clk_src; + return 0; +fail_clk_src: + __disable_unprepare_clock_iris2(core, "core_clk"); fail_clk_controller: __disable_unprepare_clock_iris2(core, "gcc_video_axi0"); fail_clk_axi: diff --git a/driver/vidc/inc/msm_vidc_power.h b/driver/vidc/inc/msm_vidc_power.h index 4bcabbec49..85564205f3 100644 --- a/driver/vidc/inc/msm_vidc_power.h +++ b/driver/vidc/inc/msm_vidc_power.h @@ -13,6 +13,9 @@ #define COMPRESSION_RATIO_MAX 5 +/* TODO: Move to dtsi OR use source clock instead of branch clock.*/ +#define MSM_VIDC_CLOCK_SOURCE_SCALING_RATIO 3 + enum vidc_bus_type { PERF, DDR, diff --git a/driver/vidc/src/msm_vidc_power.c b/driver/vidc/src/msm_vidc_power.c index 4440ec1f24..176772e5df 100644 --- a/driver/vidc/src/msm_vidc_power.c +++ b/driver/vidc/src/msm_vidc_power.c @@ -21,9 +21,6 @@ #define MSM_VIDC_MIN_UBWC_COMPRESSION_RATIO (1 << 16) #define MSM_VIDC_MAX_UBWC_COMPRESSION_RATIO (5 << 16) -/* TODO: Move to dtsi OR use source clock instead of branch clock.*/ -#define MSM_VIDC_CLOCK_SOURCE_SCALING_RATIO 3 - u64 msm_vidc_max_freq(struct msm_vidc_inst *inst) { struct msm_vidc_core* core; @@ -365,15 +362,6 @@ int msm_vidc_set_clocks(struct msm_vidc_inst* inst) __func__, rate, freq, increment, decrement); mutex_unlock(&core->lock); - /* - * This conversion is necessary since we are scaling clock values based on - * the branch clock. However, mmrm driver expects source clock to be registered - * and used for scaling. - * TODO: Remove this scaling if using source clock instead of branch clock. - */ - rate = rate * MSM_VIDC_CLOCK_SOURCE_SCALING_RATIO; - i_vpr_l(inst, "%s: scaled clock rate %lu\n", __func__, rate); - rc = venus_hfi_scale_clocks(inst, rate); if (rc) return rc; diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index 8dd3a53f70..dd0237310b 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -668,6 +668,14 @@ int __set_clk_rate(struct msm_vidc_core *core, } client = cl->mmrm_client; + /* + * This conversion is necessary since we are scaling clock values based on + * the branch clock. However, mmrm driver expects source clock to be registered + * and used for scaling. + * TODO: Remove this scaling if using source clock instead of branch clock. + */ + rate = rate * MSM_VIDC_CLOCK_SOURCE_SCALING_RATIO; + /* bail early if requested clk rate is not changed */ if (rate == cl->prev) return 0; @@ -1609,6 +1617,7 @@ int __prepare_enable_clks(struct msm_vidc_core *core) { struct clock_info *cl = NULL; int rc = 0, c = 0; + u64 rate = 0; if (!core) { d_vpr_e("%s: invalid params\n", __func__); @@ -1626,9 +1635,16 @@ int __prepare_enable_clks(struct msm_vidc_core *core) * them. Since we don't really have a load at this point, scale * it to the lowest frequency possible */ - if (cl->has_scaling) - __set_clk_rate(core, cl, - clk_round_rate(cl->clk, 0)); + if (cl->has_scaling) { + rate = clk_round_rate(cl->clk, 0); + /** + * source clock is already multipled with scaling ratio and __set_clk_rate + * attempts to multiply again. So divide scaling ratio before calling + * __set_clk_rate. + */ + rate = rate / MSM_VIDC_CLOCK_SOURCE_SCALING_RATIO; + __set_clk_rate(core, cl, rate); + } rc = clk_prepare_enable(cl->clk); if (rc) { From ffc21eaaf011e4f02a481a181c5b14c08c127ec9 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Wed, 29 Sep 2021 13:22:52 -0700 Subject: [PATCH 0432/1061] video: driver: fix null pointer dereference issues fix null pointer dereference issues causing KW issues. Change-Id: I7d9bb05d77d632b3ff479940ecb2163e6e68fd56 Signed-off-by: Akshata Sahukar --- driver/vidc/src/msm_vidc_debug.c | 5 +++++ driver/vidc/src/msm_vidc_driver.c | 2 +- driver/vidc/src/venus_hfi_response.c | 9 ++++++--- 3 files changed, 12 insertions(+), 4 deletions(-) diff --git a/driver/vidc/src/msm_vidc_debug.c b/driver/vidc/src/msm_vidc_debug.c index 31aedd4bb1..25c6111f32 100644 --- a/driver/vidc/src/msm_vidc_debug.c +++ b/driver/vidc/src/msm_vidc_debug.c @@ -126,6 +126,11 @@ void msm_vidc_show_stats(void *inst) int x; struct msm_vidc_inst *i = (struct msm_vidc_inst *) inst; + if (!i) { + d_vpr_e("%s: invalid params\n", __func__); + return; + } + for (x = 0; x < MAX_PROFILING_POINTS; x++) { if (i->debug.pdata[x].name[0]) { if (i->debug.samples) { diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index b937bb8917..f55ed40338 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -2219,7 +2219,7 @@ static int msm_vidc_insert_sort(struct list_head *head, prev = node; } - if (!is_inserted) + if (!is_inserted && prev) list_add(&entry->list, &prev->list); return 0; diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index d3a522b8db..8df57314b2 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -1411,20 +1411,23 @@ static int handle_session_property(struct msm_vidc_inst *inst, } break; case HFI_PROP_QUALITY_MODE: - if (inst->capabilities->cap[QUALITY_MODE].value != payload_ptr[0]) + if (payload_ptr && + inst->capabilities->cap[QUALITY_MODE].value != payload_ptr[0]) i_vpr_e(inst, "%s: fw quality mode(%d) not matching the capability value(%d)\n", __func__, payload_ptr[0], inst->capabilities->cap[QUALITY_MODE].value); break; case HFI_PROP_STAGE: - if (inst->capabilities->cap[STAGE].value != payload_ptr[0]) + if (payload_ptr && + inst->capabilities->cap[STAGE].value != payload_ptr[0]) i_vpr_e(inst, "%s: fw stage mode(%d) not matching the capability value(%d)\n", __func__, payload_ptr[0], inst->capabilities->cap[STAGE].value); break; case HFI_PROP_PIPE: - if (inst->capabilities->cap[PIPE].value != payload_ptr[0]) + if (payload_ptr && + inst->capabilities->cap[PIPE].value != payload_ptr[0]) i_vpr_e(inst, "%s: fw pipe mode(%d) not matching the capability value(%d)\n", __func__, payload_ptr[0], inst->capabilities->cap[PIPE].value); From 9f22d1b8bc8c65b975d05d3a43bb182b55166f3c Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Mon, 27 Sep 2021 15:37:59 -0700 Subject: [PATCH 0433/1061] video: driver: bump clockrate and bandwidth for 960FPS increase clockrate and bandwidth by 25percent for 960fps decode session and disable dcvs. Change-Id: I40aef0a9b8f0950b559ee301549869e20e881a40 Signed-off-by: Darshana Patil --- driver/variant/iris2/src/msm_vidc_power_iris2.c | 10 ++++++++++ driver/vidc/src/msm_vidc_driver.c | 8 ++++++++ 2 files changed, 18 insertions(+) diff --git a/driver/variant/iris2/src/msm_vidc_power_iris2.c b/driver/variant/iris2/src/msm_vidc_power_iris2.c index 4db925eaf4..2d1a60348a 100644 --- a/driver/variant/iris2/src/msm_vidc_power_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_power_iris2.c @@ -165,6 +165,10 @@ u64 msm_vidc_calc_freq_iris2(struct msm_vidc_inst *inst, u32 data_size) vsp_cycles += mbs_per_second * base_cycles; + /* Add 25 percent extra for 960fps use case */ + if (fps >= MAXIMUM_FPS) + vsp_cycles += div_u64(vpp_cycles * 25, 100); + if (inst->codec == MSM_VIDC_VP9 && inst->capabilities->cap[STAGE].value == MSM_VIDC_STAGE_2 && @@ -367,6 +371,12 @@ static u64 __calculate_decoder(struct vidc_bus_vote_data *d) llc.total = llc.dpb_read + llc.line_buffer_read + llc.line_buffer_write + ddr.total; + /* Add 25 percent extra for 960fps use case */ + if (fps >= MAXIMUM_FPS) { + ddr.total += div_u64(ddr.total * 25, 100); + llc.total += div_u64(llc.total * 25, 100); + } + /* Dump all the variables for easier debugging */ if (msm_vidc_debug & VIDC_BUS) { struct dump dump[] = { diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index b937bb8917..a7b9f22871 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -2629,6 +2629,7 @@ void msm_vidc_allow_dcvs(struct msm_vidc_inst *inst) { bool allow = false; struct msm_vidc_core *core; + u32 fps; if (!inst || !inst->core) { d_vpr_e("%s: Invalid args: %pK\n", __func__, inst); @@ -2684,6 +2685,13 @@ void msm_vidc_allow_dcvs(struct msm_vidc_inst *inst) goto exit; } + fps = msm_vidc_get_fps(inst); + if (is_decode_session(inst) && fps >= MAXIMUM_FPS) { + allow = false; + i_vpr_h(inst, "%s: unsupported fps %d\n", __func__, fps); + goto exit; + } + exit: i_vpr_hp(inst, "%s: dcvs: %s\n", __func__, allow ? "enabled" : "disabled"); From 535dba47c0f2f20926f4edfc79c823eae0be8950 Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Wed, 29 Sep 2021 15:04:05 -0700 Subject: [PATCH 0434/1061] video: driver: debugfs update for clockrate,bandwidth setting /d/msm_vidc/core_clock_voting will modify only clock rate and not ddr and llc bandwidth. example usage: adb shell "echo 444000000 > /d/msm_vidc/core_clock_voting". introduction of /d/msm_vidc/ddr_bw and /d/msm_vidc/llcc_bw which will modify ddr and llc bandwidth respectively. example usage: adb shell "echo 5000000 > /d/msm_vidc/ddr_bw_kbps". adb shell "echo 7000000 > /d/msm_vidc/llc_bw_kbps". Change-Id: If4aca728cae212630928dda69a38310d8268b5e1 Signed-off-by: Darshana Patil --- driver/vidc/inc/msm_vidc_debug.h | 2 ++ driver/vidc/src/msm_vidc_debug.c | 6 ++++++ driver/vidc/src/msm_vidc_power.c | 12 ++++++++++-- 3 files changed, 18 insertions(+), 2 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_debug.h b/driver/vidc/inc/msm_vidc_debug.h index 2f5aa14812..89f61f62a6 100644 --- a/driver/vidc/inc/msm_vidc_debug.h +++ b/driver/vidc/inc/msm_vidc_debug.h @@ -34,6 +34,8 @@ extern unsigned int msm_vidc_debug; extern bool msm_vidc_lossless_encode; extern bool msm_vidc_syscache_disable; extern int msm_vidc_clock_voting; +extern int msm_vidc_ddr_bw; +extern int msm_vidc_llc_bw; extern bool msm_vidc_fw_dump; extern unsigned int msm_vidc_enable_bugon; diff --git a/driver/vidc/src/msm_vidc_debug.c b/driver/vidc/src/msm_vidc_debug.c index 31aedd4bb1..93f8812dbb 100644 --- a/driver/vidc/src/msm_vidc_debug.c +++ b/driver/vidc/src/msm_vidc_debug.c @@ -85,6 +85,8 @@ bool msm_vidc_syscache_disable = !true; EXPORT_SYMBOL(msm_vidc_syscache_disable); int msm_vidc_clock_voting = !1; +int msm_vidc_ddr_bw = !1; +int msm_vidc_llc_bw = !1; bool msm_vidc_fw_dump = !true; EXPORT_SYMBOL(msm_vidc_fw_dump); @@ -301,6 +303,10 @@ struct dentry* msm_vidc_debugfs_init_drv() debugfs_create_u32("core_clock_voting", 0644, dir, &msm_vidc_clock_voting); + debugfs_create_u32("ddr_bw_kbps", 0644, dir, + &msm_vidc_ddr_bw); + debugfs_create_u32("llc_bw_kbps", 0644, dir, + &msm_vidc_llc_bw); debugfs_create_bool("disable_video_syscache", 0644, dir, &msm_vidc_syscache_disable); debugfs_create_bool("lossless_encoding", 0644, dir, diff --git a/driver/vidc/src/msm_vidc_power.c b/driver/vidc/src/msm_vidc_power.c index 4440ec1f24..7e13aee978 100644 --- a/driver/vidc/src/msm_vidc_power.c +++ b/driver/vidc/src/msm_vidc_power.c @@ -167,6 +167,16 @@ static int msm_vidc_set_buses(struct msm_vidc_inst* inst) } mutex_unlock(&core->lock); + if (msm_vidc_ddr_bw) { + d_vpr_l("msm_vidc_ddr_bw %d\n", msm_vidc_ddr_bw); + total_bw_ddr = msm_vidc_ddr_bw; + } + + if (msm_vidc_llc_bw) { + d_vpr_l("msm_vidc_llc_bw %d\n", msm_vidc_llc_bw); + total_bw_llcc = msm_vidc_llc_bw; + } + rc = venus_hfi_scale_buses(inst, total_bw_ddr, total_bw_llcc); if (rc) return rc; @@ -197,8 +207,6 @@ int msm_vidc_scale_buses(struct msm_vidc_inst *inst) vote_data->power_mode = VIDC_POWER_NORMAL; if (inst->power.buffer_counter < DCVS_WINDOW || is_image_session(inst)) vote_data->power_mode = VIDC_POWER_TURBO; - if (msm_vidc_clock_voting) - vote_data->power_mode = VIDC_POWER_TURBO; if (vote_data->power_mode == VIDC_POWER_TURBO) goto set_buses; From 11c3efeb47bbef6e8e89363dec131de2581daae1 Mon Sep 17 00:00:00 2001 From: Gaviraju Doddabettahalli Bettegowda Date: Thu, 30 Sep 2021 13:39:07 +0530 Subject: [PATCH 0435/1061] video: driver: Power collapse Log level change Currently, the below info printing as a error. "msm_vidc: err : ffffffff: codec: power collapse already scheduled" When multiple session is running, the above log will print multiple times & this is not an error, so added change to print above log as info. Change-Id: Iad961c29212579ee46a4cea47f7762f714c5e7ba Signed-off-by: Gaviraju Doddabettahalli Bettegowda --- driver/vidc/src/venus_hfi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index dd0237310b..e35e6aef52 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -383,7 +383,7 @@ static void __schedule_power_collapse_work(struct msm_vidc_core *core) if (!mod_delayed_work(core->pm_workq, &core->pm_work, msecs_to_jiffies(core->capabilities[SW_PC_DELAY].value))) { - d_vpr_e("power collapse already scheduled\n"); + d_vpr_h("power collapse already scheduled\n"); } else { d_vpr_l("power collapse scheduled for %d ms\n", core->capabilities[SW_PC_DELAY].value); From 6df2a1bfcd46fee26d0cb8fb33c7d39aeb459c30 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Fri, 1 Oct 2021 10:27:52 -0700 Subject: [PATCH 0436/1061] video: driver: enable lossless encoding via debuf fs property enable lossless encoding via debuf fs property "lossless_encoding". Change-Id: Ic7f7341ecf3ad07e55434339a0c5789334bf7929 Signed-off-by: Akshata Sahukar --- driver/platform/waipio/src/msm_vidc_waipio.c | 2 +- driver/vidc/src/msm_vidc_control.c | 3 ++- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index af7e2bae6c..c259392faf 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -404,7 +404,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { LOWLATENCY_MODE}, msm_vidc_adjust_bitrate_mode, msm_vidc_set_u32_enum}, - {LOSSLESS, ENC, HEVC|HEIC, + {LOSSLESS, ENC, HEVC, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU}, diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index c18ffee94f..4d547334c9 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -948,7 +948,8 @@ int msm_vidc_adjust_bitrate_mode(void *instance, struct v4l2_ctrl *ctrl) frame_rc = capability->cap[FRAME_RC_ENABLE].value; frame_skip = capability->cap[FRAME_SKIP_MODE].value; - if (lossless) { + if (lossless || (msm_vidc_lossless_encode && + inst->codec == MSM_VIDC_HEVC)) { hfi_value = HFI_RC_LOSSLESS; goto update; } From fc6c35e8deaa902a00928947c18014621bc26dbe Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Fri, 24 Sep 2021 12:02:55 -0700 Subject: [PATCH 0437/1061] video: driver: add all intra encoding support add ALL_INTRA database entry and its dependencies. implement adjust functions. Change-Id: Ib4522666b6c2ef7dcb5adf9110a2fd5d2daf4654 Signed-off-by: Darshana Patil --- driver/platform/waipio/src/msm_vidc_waipio.c | 21 +++-- driver/vidc/inc/msm_vidc_control.h | 1 + driver/vidc/inc/msm_vidc_internal.h | 2 + driver/vidc/src/msm_vidc_control.c | 89 +++++++++++++++++--- driver/vidc/src/msm_vidc_driver.c | 1 + 5 files changed, 99 insertions(+), 15 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index af7e2bae6c..5ae0d27c15 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -70,6 +70,7 @@ static struct msm_platform_core_capability core_data_waipio[] = { {MAX_MBPS_HQ, 489600}, /* ((1920x1088)/256)@60fps */ {MAX_MBPF_B_FRAME, 32640}, /* 3840x2176/256 */ {MAX_MBPS_B_FRAME, 1958400}, /* 3840x2176/256 MBs@60fps */ + {MAX_MBPS_ALL_INTRA, 1958400}, /* 3840x2176/256 MBs@60fps */ {MAX_ENH_LAYER_COUNT, 5}, {NUM_VPP_PIPE, 4}, {SW_PC, 1}, @@ -441,7 +442,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, {ENH_LAYER_COUNT}, - {0}, + {ALL_INTRA}, msm_vidc_adjust_gop_size, msm_vidc_set_gop_size}, {GOP_CLOSURE, ENC, H264|HEVC, @@ -456,7 +457,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { HFI_PROP_MAX_B_FRAMES, CAP_FLAG_OUTPUT_PORT, {ENH_LAYER_COUNT}, - {0}, + {ALL_INTRA}, msm_vidc_adjust_b_frame, msm_vidc_set_u32}, {BLUR_TYPES, ENC, CODECS_ALL, @@ -526,7 +527,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_CID_MPEG_VIDEO_LTR_COUNT, HFI_PROP_LTR_COUNT, CAP_FLAG_OUTPUT_PORT, - {BITRATE_MODE}, {0}, + {BITRATE_MODE, ALL_INTRA}, {0}, msm_vidc_adjust_ltr_count, msm_vidc_set_u32}, {USE_LTR, ENC, H264|HEVC, @@ -560,7 +561,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_CID_MPEG_VIDC_INTRA_REFRESH_PERIOD, HFI_PROP_IR_RANDOM_PERIOD, CAP_FLAG_OUTPUT_PORT, - {BITRATE_MODE}, {0}, + {BITRATE_MODE, ALL_INTRA}, {0}, msm_vidc_adjust_ir_random, msm_vidc_set_u32}, {AU_DELIMITER, ENC, H264|HEVC, @@ -1229,7 +1230,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE, 0, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {BITRATE_MODE}, {0}, + {BITRATE_MODE, ALL_INTRA}, {0}, msm_vidc_adjust_slice_count, msm_vidc_set_slice_count}, {SLICE_MAX_BYTES, ENC, H264|HEVC|HEIC, @@ -1401,6 +1402,16 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {0}, {0}, NULL, NULL}, + {ALL_INTRA, ENC, H264|HEVC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, + 0, + CAP_FLAG_OUTPUT_PORT, + {GOP_SIZE, B_FRAME}, + {LTR_COUNT, IR_RANDOM, SLICE_MODE}, + msm_vidc_adjust_all_intra, NULL}, + {META_LTR_MARK_USE, ENC, H264|HEVC, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, diff --git a/driver/vidc/inc/msm_vidc_control.h b/driver/vidc/inc/msm_vidc_control.h index fd57280d45..1f6a3ded26 100644 --- a/driver/vidc/inc/msm_vidc_control.h +++ b/driver/vidc/inc/msm_vidc_control.h @@ -45,6 +45,7 @@ int msm_vidc_adjust_lowlatency_mode(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_v4l2_properties(struct msm_vidc_inst *inst); int msm_vidc_adjust_session_priority(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_roi_info(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_all_intra(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_set_header_mode(void *instance, enum msm_vidc_inst_capability_type cap_id); diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 8f7c700b39..a41d66a7a4 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -319,6 +319,7 @@ enum msm_vidc_core_capability_type { MAX_MBPS_HQ, MAX_MBPF_B_FRAME, MAX_MBPS_B_FRAME, + MAX_MBPS_ALL_INTRA, MAX_ENH_LAYER_COUNT, NUM_VPP_PIPE, SW_PC, @@ -460,6 +461,7 @@ enum msm_vidc_inst_capability_type { PRIORITY, ENC_IP_CR, DPB_LIST, + ALL_INTRA, META_LTR_MARK_USE, META_DPB_MISR, META_OPB_MISR, diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index c18ffee94f..dbece7b557 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -1025,7 +1025,7 @@ int msm_vidc_adjust_ltr_count(void *instance, struct v4l2_ctrl *ctrl) struct msm_vidc_inst_capability *capability; s32 adjusted_value; struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - s32 rc_type = -1; + s32 rc_type = -1, all_intra = 0; if (!inst || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); @@ -1036,13 +1036,20 @@ int msm_vidc_adjust_ltr_count(void *instance, struct v4l2_ctrl *ctrl) adjusted_value = ctrl ? ctrl->val : capability->cap[LTR_COUNT].value; if (msm_vidc_get_parent_value(inst, LTR_COUNT, BITRATE_MODE, - &rc_type, __func__)) + &rc_type, __func__) || + msm_vidc_get_parent_value(inst, LTR_COUNT, ALL_INTRA, + &all_intra, __func__)) return -EINVAL; - if (rc_type != HFI_RC_OFF && + if ((rc_type != HFI_RC_OFF && rc_type != HFI_RC_CBR_CFR && - rc_type != HFI_RC_CBR_VFR) + rc_type != HFI_RC_CBR_VFR) || + all_intra) { adjusted_value = 0; + i_vpr_h(inst, + "%s: ltr count unsupported, rc_type: %#x, all_intra %d\n", + __func__,rc_type, all_intra); + } msm_vidc_update_cap_value(inst, LTR_COUNT, adjusted_value, __func__); @@ -1133,7 +1140,7 @@ int msm_vidc_adjust_mark_ltr(void *instance, struct v4l2_ctrl *ctrl) int msm_vidc_adjust_ir_random(void *instance, struct v4l2_ctrl *ctrl) { struct msm_vidc_inst_capability *capability; - s32 adjusted_value; + s32 adjusted_value, all_intra = 0; struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; if (!inst || !inst->capabilities) { @@ -1144,6 +1151,17 @@ int msm_vidc_adjust_ir_random(void *instance, struct v4l2_ctrl *ctrl) adjusted_value = ctrl ? ctrl->val : capability->cap[IR_RANDOM].value; + if (msm_vidc_get_parent_value(inst, IR_RANDOM, ALL_INTRA, + &all_intra, __func__)) + return -EINVAL; + + if (all_intra) { + adjusted_value = 0; + i_vpr_h(inst, "%s: IR unsupported, all intra: %d\n", + __func__, all_intra); + goto exit; + } + /* * BITRATE_MODE dependency is NOT common across all chipsets. * Hence, do not return error if not specified as one of the parent. @@ -1153,6 +1171,7 @@ int msm_vidc_adjust_ir_random(void *instance, struct v4l2_ctrl *ctrl) inst->hfi_rc_type != HFI_RC_CBR_VFR) adjusted_value = 0; +exit: msm_vidc_update_cap_value(inst, IR_RANDOM, adjusted_value, __func__); @@ -1256,7 +1275,7 @@ int msm_vidc_adjust_slice_count(void *instance, struct v4l2_ctrl *ctrl) struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; struct msm_vidc_inst_capability *capability; struct v4l2_format *output_fmt; - s32 adjusted_value, rc_type = -1, slice_mode; + s32 adjusted_value, rc_type = -1, slice_mode, all_intra = 0; u32 slice_val, mbpf = 0, mbps = 0, max_mbpf = 0, max_mbps = 0; u32 update_cap, max_avg_slicesize, output_width, output_height; u32 min_width, min_height, max_width, max_height, fps; @@ -1271,7 +1290,9 @@ int msm_vidc_adjust_slice_count(void *instance, struct v4l2_ctrl *ctrl) capability->cap[SLICE_MODE].value; if (msm_vidc_get_parent_value(inst, SLICE_MODE, - BITRATE_MODE, &rc_type, __func__)) + BITRATE_MODE, &rc_type, __func__) || + msm_vidc_get_parent_value(inst, SLICE_MODE, + ALL_INTRA, &all_intra, __func__)) return -EINVAL; if (slice_mode == V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE) @@ -1281,12 +1302,13 @@ int msm_vidc_adjust_slice_count(void *instance, struct v4l2_ctrl *ctrl) if (fps > MAX_SLICES_FRAME_RATE || (rc_type != HFI_RC_OFF && rc_type != HFI_RC_CBR_CFR && - rc_type != HFI_RC_CBR_VFR)) { + rc_type != HFI_RC_CBR_VFR) || + all_intra) { adjusted_value = V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE; update_cap = SLICE_MODE; i_vpr_h(inst, - "%s: slice unsupported, fps: %u, rc_type: %#x\n", - __func__, fps, rc_type); + "%s: slice unsupported, fps: %u, rc_type: %#x, all_intra %d\n", + __func__, fps, rc_type, all_intra); goto exit; } @@ -1967,6 +1989,53 @@ int msm_vidc_adjust_blur_type(void *instance, struct v4l2_ctrl *ctrl) return 0; } +int msm_vidc_adjust_all_intra(void *instance, struct v4l2_ctrl *ctrl) +{ + struct msm_vidc_inst_capability *capability; + s32 adjusted_value; + struct msm_vidc_core *core; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + s32 gop_size = -1, bframe = -1; + u32 width, height, fps, mbps, max_mbps; + + if (!inst || !inst->capabilities || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + adjusted_value = capability->cap[ALL_INTRA].value; + + if (msm_vidc_get_parent_value(inst, ALL_INTRA, GOP_SIZE, + &gop_size, __func__) || + msm_vidc_get_parent_value(inst, ALL_INTRA, B_FRAME, + &bframe, __func__)) + return -EINVAL; + + width = inst->crop.width; + height = inst->crop.height; + fps = msm_vidc_get_fps(inst); + mbps = NUM_MBS_PER_SEC(height, width, fps); + core = inst->core; + max_mbps = core->capabilities[MAX_MBPS_ALL_INTRA].value; + + if (mbps > max_mbps) { + adjusted_value = 0; + i_vpr_h(inst, "%s: mbps %d exceeds max supported mbps %d\n", + __func__, mbps, max_mbps); + goto exit; + } + + if (!gop_size && !bframe) + adjusted_value = 1; + +exit: + msm_vidc_update_cap_value(inst, ALL_INTRA, + adjusted_value, __func__); + + return 0; +} + int msm_vidc_adjust_blur_resolution(void *instance, struct v4l2_ctrl *ctrl) { struct msm_vidc_inst_capability *capability; diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 03ae8b38e7..ce0fb116ae 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -164,6 +164,7 @@ static const struct msm_vidc_cap_name cap_name_arr[] = { {PRIORITY, "PRIORITY" }, {ENC_IP_CR, "ENC_IP_CR" }, {DPB_LIST, "DPB_LIST" }, + {ALL_INTRA, "ALL_INTRA" }, {META_LTR_MARK_USE, "META_LTR_MARK_USE" }, {META_DPB_MISR, "META_DPB_MISR" }, {META_OPB_MISR, "META_OPB_MISR" }, From 1763bbebca006ba8f2fcb53475cf3245474103cc Mon Sep 17 00:00:00 2001 From: Manikanta Kanamarlapudi Date: Mon, 4 Oct 2021 16:00:39 +0530 Subject: [PATCH 0438/1061] video: driver: Error handling for HW overload scenarios - send error '-EAGAIN' when there are no inactive sessions, HAL will retry with low priority. - send error '-ENOMEM' when there are inactive sessions, Frameworks will close the inactive sessions Change-Id: Id28a6f3c5f9d537a2789ef1522505b6ebedccc0b Signed-off-by: Manikanta Kanamarlapudi --- driver/vidc/src/msm_vidc_driver.c | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 03ae8b38e7..803b488109 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -5187,15 +5187,18 @@ static int msm_vidc_print_insts_info(struct msm_vidc_core *core) int msm_vidc_check_core_mbps(struct msm_vidc_inst *inst) { - u32 mbps = 0; + u32 mbps = 0, num_inactive_sessions = 0; struct msm_vidc_core *core; struct msm_vidc_inst *instance; + u64 curr_time_ns; + int rc = 0; if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } core = inst->core; + curr_time_ns = ktime_get_ns(); core_lock(core, __func__); list_for_each_entry(instance, &core->instances, list) { @@ -5203,6 +5206,10 @@ int msm_vidc_check_core_mbps(struct msm_vidc_inst *inst) if (is_session_error(instance)) continue; + if (!is_active_session(instance->last_qbuf_time_ns, curr_time_ns)) { + num_inactive_sessions++; + } + /* ignore thumbnail, image, and non realtime sessions */ if (is_thumbnail_session(instance) || is_image_session(instance) || @@ -5214,9 +5221,10 @@ int msm_vidc_check_core_mbps(struct msm_vidc_inst *inst) core_unlock(core, __func__); if (mbps > core->capabilities[MAX_MBPS].value) { + rc = num_inactive_sessions ? -ENOMEM : -EAGAIN; i_vpr_e(inst, "%s: Hardware overloaded. needed %u, max %u", __func__, mbps, core->capabilities[MAX_MBPS].value); - return -ENOMEM; + return rc; } return 0; From f6a9744ff2f00b5d3546fdb23bc232a33f34645e Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Tue, 5 Oct 2021 13:07:31 -0700 Subject: [PATCH 0439/1061] video: driver: modify FW i/p o/p buffers starve condition Host needs to ensure FW atleast have 2 buffers available always, one for HW processing and another for fw processing in parallel to avoid FW starving for buffers. Change-Id: I244e0170944b0b7ec342aa9b1b141b30af5bf606 Signed-off-by: Akshata Sahukar --- driver/vidc/src/msm_vidc_debug.c | 42 ++++++++++++++++++++++++-------- 1 file changed, 32 insertions(+), 10 deletions(-) diff --git a/driver/vidc/src/msm_vidc_debug.c b/driver/vidc/src/msm_vidc_debug.c index c00ddbc909..f0da8894c9 100644 --- a/driver/vidc/src/msm_vidc_debug.c +++ b/driver/vidc/src/msm_vidc_debug.c @@ -578,13 +578,24 @@ void msm_vidc_debugfs_update(void *instance, break; case MSM_VIDC_DEBUGFS_EVENT_EBD: inst->debug_count.ebd++; - if (inst->debug_count.ebd && - inst->debug_count.ebd == inst->debug_count.etb) { + /* + * Host needs to ensure FW atleast have 2 buffers available always + * one for HW processing and another for fw processing in parallel + * to avoid FW starving for buffers + */ + if (inst->debug_count.etb < (inst->debug_count.ebd + 2)) { toc(inst, FRAME_PROCESSING); - i_vpr_p(inst, "EBD: FW needs input buffers\n"); + i_vpr_p(inst, + "EBD: FW needs input buffers. Processed etb %llu ebd %llu ftb %llu fbd %llu\n", + inst->debug_count.etb, inst->debug_count.ebd, + inst->debug_count.ftb, inst->debug_count.fbd); } - if (inst->debug_count.ftb == inst->debug_count.fbd) - i_vpr_p(inst, "EBD: FW needs output buffers\n"); + if (inst->debug_count.fbd && + inst->debug_count.ftb < (inst->debug_count.fbd + 2)) + i_vpr_p(inst, + "EBD: FW needs output buffers. Processed etb %llu ebd %llu ftb %llu fbd %llu\n", + inst->debug_count.etb, inst->debug_count.ebd, + inst->debug_count.ftb, inst->debug_count.fbd); break; case MSM_VIDC_DEBUGFS_EVENT_FTB: inst->debug_count.ftb++; @@ -597,13 +608,24 @@ void msm_vidc_debugfs_update(void *instance, case MSM_VIDC_DEBUGFS_EVENT_FBD: inst->debug_count.fbd++; inst->debug.samples++; - if (inst->debug_count.fbd && - inst->debug_count.fbd == inst->debug_count.ftb) { + /* + * Host needs to ensure FW atleast have 2 buffers available always + * one for HW processing and another for fw processing in parallel + * to avoid FW starving for buffers + */ + if (inst->debug_count.ftb < (inst->debug_count.fbd + 2)) { toc(inst, FRAME_PROCESSING); - i_vpr_p(inst, "FBD: FW needs output buffers\n"); + i_vpr_p(inst, + "FBD: FW needs output buffers. Processed etb %llu ebd %llu ftb %llu fbd %llu\n", + inst->debug_count.etb, inst->debug_count.ebd, + inst->debug_count.ftb, inst->debug_count.fbd); } - if (inst->debug_count.etb == inst->debug_count.ebd) - i_vpr_p(inst, "FBD: FW needs input buffers\n"); + if (inst->debug_count.ebd && + inst->debug_count.etb < (inst->debug_count.ebd + 2)) + i_vpr_p(inst, + "FBD: FW needs input buffers. Processed etb %llu ebd %llu ftb %llu fbd %llu\n", + inst->debug_count.etb, inst->debug_count.ebd, + inst->debug_count.ftb, inst->debug_count.fbd); break; default: i_vpr_e(inst, "invalid event in debugfs: %d\n", e); From 10990e39f944885552c9ea1551bf7dc26cbad723 Mon Sep 17 00:00:00 2001 From: Gaviraju Doddabettahalli Bettegowda Date: Wed, 6 Oct 2021 19:37:59 +0530 Subject: [PATCH 0440/1061] video: driver: add error handling in print_vidc_buffer api Possiblity of invalid ptr dereference in release_buffer_done sequence. So added changes to handle this scenario. Change-Id: I0f45e07d709d0fd300a172b564031e40eb07ff00 Signed-off-by: Gaviraju Doddabettahalli Bettegowda --- driver/vidc/src/msm_vidc_driver.c | 30 ++++++++++++++++++++++++------ 1 file changed, 24 insertions(+), 6 deletions(-) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 03ae8b38e7..fa20a5cd1e 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -372,23 +372,32 @@ void print_vidc_buffer(u32 tag, const char *tag_str, const char *str, struct msm struct msm_vidc_buffer *vbuf) { struct dma_buf *dbuf; + struct inode *f_inode; + unsigned long inode_num = 0; + long ref_count = -1; if (!inst || !vbuf || !tag_str || !str) return; dbuf = (struct dma_buf *)vbuf->dmabuf; + if (dbuf && dbuf->file) { + f_inode = file_inode(dbuf->file); + if (f_inode) { + inode_num = f_inode->i_ino; + ref_count = file_count(dbuf->file); + } + } dprintk_inst(tag, tag_str, inst, "%s: %s: idx %2d fd %3d off %d daddr %#llx inode %8lu ref %2ld size %8d filled %8d flags %#x ts %8lld attr %#x counts(etb ebd ftb fbd) %4llu %4llu %4llu %4llu\n", str, buf_name(vbuf->type), vbuf->index, vbuf->fd, vbuf->data_offset, - vbuf->device_addr, (dbuf ? file_inode(dbuf->file)->i_ino : -1), - (dbuf ? file_count(dbuf->file) : -1), vbuf->buffer_size, vbuf->data_size, + vbuf->device_addr, inode_num, ref_count, vbuf->buffer_size, vbuf->data_size, vbuf->flags, vbuf->timestamp, vbuf->attr, inst->debug_count.etb, inst->debug_count.ebd, inst->debug_count.ftb, inst->debug_count.fbd); trace_msm_v4l2_vidc_buffer_event_log(inst, str, buf_name(vbuf->type), vbuf, - (dbuf ? file_inode(dbuf->file)->i_ino : -1), (dbuf ? file_count(dbuf->file) : -1)); + inode_num, ref_count); } @@ -4390,6 +4399,9 @@ int msm_vidc_print_inst_info(struct msm_vidc_inst *inst) bool is_secure, is_decode; u32 bit_depth, bit_rate, frame_rate, width, height; struct dma_buf *dbuf; + struct inode *f_inode; + unsigned long inode_num = 0; + long ref_count = -1; int i = 0; if (!inst || !inst->capabilities) { @@ -4426,12 +4438,18 @@ int msm_vidc_print_inst_info(struct msm_vidc_inst *inst) if (!buf->dmabuf) continue; dbuf = (struct dma_buf *)buf->dmabuf; + if (dbuf && dbuf->file) { + f_inode = file_inode(dbuf->file); + if (f_inode) { + inode_num = f_inode->i_ino; + ref_count = file_count(dbuf->file); + } + } i_vpr_e(inst, - "buf: type: %11s, index: %2d, fd: %4d, size: %9u, off: %8u, filled: %9u, iova: %8x, inode: %9ld, flags: %8x, ts: %16lld, attr: %8x\n", + "buf: type: %11s, index: %2d, fd: %4d, size: %9u, off: %8u, filled: %9u, daddr: %#llx, inode: %8lu, ref: %2ld, flags: %8x, ts: %16lld, attr: %8x\n", buf_type_name_arr[i].name, buf->index, buf->fd, buf->buffer_size, buf->data_offset, buf->data_size, buf->device_addr, - file_inode(dbuf->file)->i_ino, - buf->flags, buf->timestamp, buf->attr); + inode_num, ref_count, buf->flags, buf->timestamp, buf->attr); } } From 2eb56724634388baab92d9eb7c9495aceb6f367e Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Tue, 12 Oct 2021 16:54:37 +0530 Subject: [PATCH 0441/1061] video: driver: fix race issues with msm_vidc_stats_handler api There are 2 possible race issues with msm_vidc_stats_handler. [1] msm_vidc_close acquired inst->lock and called cancel_delayed_work, by that time stats_handler already fired and incremented inst->kref via get_inst_ref. Close sequence releases the lock and called put_inst(). So now inst strong ref is held by stats_handler, which will acquire inst->lock and schedules new stats_work and does put_inst. inst->kref count reaches zero and it will free inst struct(using close_helper). So that will lead to use-after-free crash at core kernel side. [2] msm_vidc_close acquired inst->lock and called cancel_delayed_work, by that time stats_handler is scheduled. So process_one_work() from workqueue is ready to call stats_handler api. But before it invokes stats handler(context switch), msm_vidc_close sequence continued to run and completed the close sequence and called put_inst. So inst struct got freed up(because inst->kref count reached to zero). Now if core kernel(workqueue) attempts to invoke stats_handler by calling worker->current_func(work), will lead to again use-after-free crash. Added changes to avoid above mentioned issues. Change-Id: I55bc33a753f4dbae4a8cdc6373b5465d183da3bc Signed-off-by: Govindaraj Rajagopal --- driver/vidc/inc/msm_vidc_driver.h | 3 ++- driver/vidc/src/msm_vidc.c | 4 +++- driver/vidc/src/msm_vidc_driver.c | 21 ++++++++++++++------- 3 files changed, 19 insertions(+), 9 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index b40e2b02a8..1c15d4450d 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -353,7 +353,8 @@ void msm_vidc_update_stats(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buf, enum msm_vidc_debugfs_event etype); void msm_vidc_stats_handler(struct work_struct *work); int schedule_stats_work(struct msm_vidc_inst *inst); -int cancel_stats_work(struct msm_vidc_inst *inst); +int cancel_stats_work_sync(struct msm_vidc_inst *inst); +void msm_vidc_print_stats(struct msm_vidc_inst *inst); enum msm_vidc_buffer_type v4l2_type_to_driver(u32 type, const char *func); int msm_vidc_queue_buffer_single(struct msm_vidc_inst *inst, diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index 8098993e57..3b91c66d53 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -961,11 +961,13 @@ int msm_vidc_close(void *instance) i_vpr_h(inst, "%s()\n", __func__); inst_lock(inst, __func__); cancel_response_work(inst); - cancel_stats_work(inst); + /* print final stats */ + msm_vidc_print_stats(inst); msm_vidc_session_close(inst); msm_vidc_remove_session(inst); msm_vidc_destroy_buffers(inst); inst_unlock(inst, __func__); + cancel_stats_work_sync(inst); msm_vidc_show_stats(inst); put_inst(inst); msm_vidc_schedule_core_deinit(core); diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 01ea0f5ecc..174a91ed20 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -2868,7 +2868,7 @@ void msm_vidc_update_stats(struct msm_vidc_inst *inst, msm_vidc_debugfs_update(inst, etype); } -static void msm_vidc_print_stats(struct msm_vidc_inst *inst) +void msm_vidc_print_stats(struct msm_vidc_inst *inst) { u32 frame_rate, operating_rate, achieved_fps, priority, etb, ebd, ftb, fbd, dt_ms; u64 bitrate_kbps = 0, time_ms = ktime_get_ns() / 1000 / 1000; @@ -2909,6 +2909,16 @@ int schedule_stats_work(struct msm_vidc_inst *inst) d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } + + /** + * Hfi session is already closed and inst also going to be + * closed soon. So skip scheduling new stats_work to avoid + * use-after-free issues with close sequence. + */ + if (!inst->packet) { + i_vpr_e(inst, "skip scheduling stats_work\n"); + return 0; + } core = inst->core; mod_delayed_work(inst->response_workq, &inst->stats_work, msecs_to_jiffies(core->capabilities[STATS_TIMEOUT_MS].value)); @@ -2916,16 +2926,13 @@ int schedule_stats_work(struct msm_vidc_inst *inst) return 0; } -int cancel_stats_work(struct msm_vidc_inst *inst) +int cancel_stats_work_sync(struct msm_vidc_inst *inst) { if (!inst) { d_vpr_e("%s: Invalid arguments\n", __func__); return -EINVAL; } - cancel_delayed_work(&inst->stats_work); - - /* print final stats */ - msm_vidc_print_stats(inst); + cancel_delayed_work_sync(&inst->stats_work); return 0; } @@ -2936,7 +2943,7 @@ void msm_vidc_stats_handler(struct work_struct *work) inst = container_of(work, struct msm_vidc_inst, stats_work.work); inst = get_inst_ref(g_core, inst); - if (!inst) { + if (!inst || !inst->packet) { d_vpr_e("%s: invalid params\n", __func__); return; } From d11e2381576e388166f8db710200e7a72a7dfdad Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Tue, 12 Oct 2021 18:25:51 +0530 Subject: [PATCH 0442/1061] video: driver: alter stage, pipe setting sequence to avoid vcodec hung Currently stage and pipe is configured from output port start/resume sequence. During VSP processing FW has no clue about stage, so default it picked 2 stage. Later host sets 1(due to < 720p) stage at output port. VSP is already started operating on input frames. So this mismatch in stage settings was leading to vcodec HW hung issues. Setting STAGE, PIPE settings at input port start/resume to avoid above mentioned issues. Change-Id: I7febe46d45c8e30a29b58d725d5298220fdbd8b2 Signed-off-by: Govindaraj Rajagopal --- driver/vidc/src/msm_vdec.c | 32 ++++++++++++++++---------------- 1 file changed, 16 insertions(+), 16 deletions(-) diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index c22e3d807e..f90a577150 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -741,6 +741,14 @@ static int msm_vdec_set_input_properties(struct msm_vidc_inst *inst) return -EINVAL; } + rc = msm_vidc_set_stage(inst, STAGE); + if (rc) + return rc; + + rc = msm_vidc_set_pipe(inst, PIPE); + if (rc) + return rc; + rc = msm_vdec_set_output_order(inst, INPUT_PORT); if (rc) return rc; @@ -781,14 +789,6 @@ static int msm_vdec_set_output_properties(struct msm_vidc_inst *inst) if (rc) return rc; - rc = msm_vidc_set_stage(inst, STAGE); - if (rc) - return rc; - - rc = msm_vidc_set_pipe(inst, PIPE); - if (rc) - return rc; - rc = msm_vdec_set_linear_stride_scanline(inst); if (rc) return rc; @@ -1371,6 +1371,14 @@ int msm_vdec_input_port_settings_change(struct msm_vidc_inst *inst) if (rc) return rc; + rc = msm_vidc_set_stage(inst, STAGE); + if (rc) + return rc; + + rc = msm_vidc_set_pipe(inst, PIPE); + if (rc) + return rc; + rc = msm_vdec_session_resume(inst, INPUT_PORT); if (rc) return rc; @@ -2122,14 +2130,6 @@ int msm_vdec_process_cmd(struct msm_vidc_inst *inst, u32 cmd) /* print final buffer counts & size details */ msm_vidc_print_buffer_info(inst); - rc = msm_vidc_set_stage(inst, STAGE); - if (rc) - return rc; - - rc = msm_vidc_set_pipe(inst, PIPE); - if (rc) - return rc; - rc = msm_vidc_set_seq_change_at_sync_frame(inst); if (rc) return rc; From 38da39c7eeff02f004f81f2f30affde5cc954180 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Wed, 22 Sep 2021 17:16:41 +0530 Subject: [PATCH 0443/1061] video: driver: acquire and release wakelock during fw_load Acquire wakelock to prevent system suspend during firmware load sequence to avoid firmware load request failure. Change-Id: I320db4a02b310acf5b5d9dd9a4f304b94e1c2f5b Signed-off-by: Govindaraj Rajagopal --- driver/vidc/src/venus_hfi.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index e35e6aef52..2f14d60aad 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -2597,8 +2597,11 @@ static int __load_fw_to_memory(struct platform_device *pdev, return -ENOMEM; } + /* prevent system suspend during fw_load */ + pm_stay_awake(pdev->dev.parent); rc = qcom_mdt_load(&pdev->dev, firmware, firmware_name, pas_id, virt, phys, res_size, NULL); + pm_relax(pdev->dev.parent); if (rc) { d_vpr_e("%s: error %d loading fw \"%s\"\n", __func__, rc, firmware_name); From 784a4c92800b5b2245e508828bba4d23253a7966 Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Wed, 6 Oct 2021 15:52:50 -0700 Subject: [PATCH 0444/1061] video: driver: add power suspend and resume add power suspend and resume implementations. Change-Id: I785b5b05f37ed5ed656d2cbc04f5d429ff543260 Signed-off-by: Darshana Patil --- driver/vidc/inc/msm_vidc.h | 1 - driver/vidc/inc/msm_vidc_driver.h | 1 + driver/vidc/src/msm_vidc_driver.c | 16 ++++++++++++ driver/vidc/src/msm_vidc_probe.c | 42 +++++++++++++++++++++++++++++++ 4 files changed, 59 insertions(+), 1 deletion(-) diff --git a/driver/vidc/inc/msm_vidc.h b/driver/vidc/inc/msm_vidc.h index e8e0def8a6..9ea2ee435f 100644 --- a/driver/vidc/inc/msm_vidc.h +++ b/driver/vidc/inc/msm_vidc.h @@ -16,7 +16,6 @@ union msm_v4l2_cmd { void *msm_vidc_open(void *core, u32 session_type); int msm_vidc_close(void *instance); -int msm_vidc_suspend(int core_id); int msm_vidc_querycap(void *instance, struct v4l2_capability *cap); int msm_vidc_enum_fmt(void *instance, struct v4l2_fmtdesc *f); int msm_vidc_try_fmt(void *instance, struct v4l2_format *f); diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 1c15d4450d..d223484fe2 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -322,6 +322,7 @@ int msm_vidc_trigger_ssr(struct msm_vidc_core *core, void msm_vidc_ssr_handler(struct work_struct *work); void msm_vidc_pm_work_handler(struct work_struct *work); void msm_vidc_fw_unload_handler(struct work_struct *work); +int msm_vidc_suspend(struct msm_vidc_core *core); void msm_vidc_batch_handler(struct work_struct *work); int msm_vidc_event_queue_init(struct msm_vidc_inst *inst); int msm_vidc_event_queue_deinit(struct msm_vidc_inst *inst); diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 174a91ed20..d6182460f9 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -4612,6 +4612,22 @@ void msm_vidc_fw_unload_handler(struct work_struct *work) } +int msm_vidc_suspend(struct msm_vidc_core *core) +{ + int rc = 0; + + if (!core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + rc = venus_hfi_suspend(core); + if (rc) + return rc; + + return rc; +} + void msm_vidc_batch_handler(struct work_struct *work) { struct msm_vidc_inst *inst; diff --git a/driver/vidc/src/msm_vidc_probe.c b/driver/vidc/src/msm_vidc_probe.c index 5ed9980700..794c3f77c0 100644 --- a/driver/vidc/src/msm_vidc_probe.c +++ b/driver/vidc/src/msm_vidc_probe.c @@ -470,12 +470,54 @@ static int msm_vidc_probe(struct platform_device *pdev) return -EINVAL; } +static int msm_vidc_pm_suspend(struct device *dev) +{ + int rc = 0; + struct msm_vidc_core *core; + + d_vpr_h("%s\n", __func__); + /* + * Bail out if + * - driver possibly not probed yet + * - not the main device. We don't support power management on + * subdevices (e.g. context banks) + */ + if (!dev || !dev->driver || + !of_device_is_compatible(dev->of_node, "qcom,msm-vidc")) + return 0; + + core = dev_get_drvdata(dev); + if (!core) { + d_vpr_e("%s: invalid core\n", __func__); + return -EINVAL; + } + + rc = msm_vidc_suspend(core); + if (rc == -ENOTSUPP) + rc = 0; + else if (rc) + d_vpr_e("Failed to suspend: %d\n", rc); + + return rc; +} + +static int msm_vidc_pm_resume(struct device *dev) +{ + d_vpr_h("%s\n", __func__); + return 0; +} + +static const struct dev_pm_ops msm_vidc_pm_ops = { + SET_SYSTEM_SLEEP_PM_OPS(msm_vidc_pm_suspend, msm_vidc_pm_resume) +}; + struct platform_driver msm_vidc_driver = { .probe = msm_vidc_probe, .remove = msm_vidc_remove, .driver = { .name = "msm_vidc_v4l2", .of_match_table = msm_vidc_dt_match, + .pm = &msm_vidc_pm_ops, }, }; From 839a329864a074c1ed1e2108c762c9530b6ad47a Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Thu, 21 Oct 2021 13:47:47 +0530 Subject: [PATCH 0445/1061] video: driver: add dpb buffer handling for b2b ipsc cases Currently MSM_VIDC_BUF_DPB buffer allocated and queued to firmware as part of output port streamon. Sometimes firmware raises b2b ipsc with only change in fw_min_count. So client will not follow port reconfig sequence and calls directly HFI_CMD_RESUME on output port. So firmware holds only prev set of DPB buffers, which is not sufficient and it continues to wait for further DPB buffers and that is leading to stall and testcase fails. So added change to requeue new set of DPB buffers, incase of b2b ipsc(with only change in count). Change-Id: I213c752be4ca9dc16f838ab2990c996c4d78e95f Signed-off-by: Govindaraj Rajagopal --- driver/vidc/inc/msm_vidc_driver.h | 2 + driver/vidc/src/msm_vdec.c | 65 ++++++++++++++++++++++++++----- 2 files changed, 58 insertions(+), 9 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index d223484fe2..610837ca04 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -282,6 +282,8 @@ const char *allow_name(enum msm_vidc_allow allow); const char *state_name(enum msm_vidc_inst_state state); int msm_vidc_change_inst_state(struct msm_vidc_inst *inst, enum msm_vidc_inst_state request_state, const char *func); +int msm_vidc_create_internal_buffer(struct msm_vidc_inst *inst, + enum msm_vidc_buffer_type buffer_type, u32 index); int msm_vidc_get_internal_buffers(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type buffer_type); int msm_vidc_create_internal_buffers(struct msm_vidc_inst *inst, diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index f90a577150..2815e6b794 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -2068,6 +2068,52 @@ int msm_vdec_qbuf(struct msm_vidc_inst *inst, struct vb2_buffer *vb2) return rc; } +static msm_vdec_alloc_and_queue_additional_dpb_buffers(struct msm_vidc_inst *inst) +{ + struct msm_vidc_buffers *buffers; + struct msm_vidc_buffer *buffer = NULL; + int i, cur_min_count = 0, rc = 0; + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + /* get latest min_count and size */ + rc = msm_vidc_get_internal_buffers(inst, MSM_VIDC_BUF_DPB); + if (rc) + return rc; + + buffers = msm_vidc_get_buffers(inst, MSM_VIDC_BUF_DPB, __func__); + if (!buffers) + return -EINVAL; + + /* get current min_count */ + list_for_each_entry(buffer, &buffers->list, list) + cur_min_count++; + + /* skip alloc and queue */ + if (cur_min_count >= buffers->min_count) + return 0; + + i_vpr_h(inst, "%s: dpb buffer count increased from %u -> %u\n", + __func__, cur_min_count, buffers->min_count); + + /* allocate additional DPB buffers */ + for (i = cur_min_count; i < buffers->min_count; i++) { + rc = msm_vidc_create_internal_buffer(inst, MSM_VIDC_BUF_DPB, i); + if (rc) + return rc; + } + + /* queue additional DPB buffers */ + rc = msm_vidc_queue_internal_buffers(inst, MSM_VIDC_BUF_DPB); + if (rc) + return rc; + + return 0; +} + int msm_vdec_process_cmd(struct msm_vidc_inst *inst, u32 cmd) { int rc = 0; @@ -2127,21 +2173,22 @@ int msm_vdec_process_cmd(struct msm_vidc_inst *inst, u32 cmd) msm_vidc_allow_dcvs(inst); msm_vidc_power_data_reset(inst); - /* print final buffer counts & size details */ - msm_vidc_print_buffer_info(inst); - rc = msm_vidc_set_seq_change_at_sync_frame(inst); if (rc) return rc; - rc = venus_hfi_session_command(inst, - HFI_CMD_RESUME, - port, - HFI_PAYLOAD_NONE, - NULL, - 0); + /* allocate and queue extra dpb buffers */ + rc = msm_vdec_alloc_and_queue_additional_dpb_buffers(inst); if (rc) return rc; + + /* print final buffer counts & size details */ + msm_vidc_print_buffer_info(inst); + + rc = msm_vdec_session_resume(inst, port); + if (rc) + return rc; + } else { i_vpr_e(inst, "%s: unknown cmd %d\n", __func__, cmd); return -EINVAL; From 0a135fec382b339b06b0cd235c4827b5d9a66f31 Mon Sep 17 00:00:00 2001 From: Priyanka Gujjula Date: Wed, 20 Oct 2021 00:38:28 +0530 Subject: [PATCH 0446/1061] video: driver: Cancel batch work in case of pm_suspend Cancel batch work when core is suspended due to pm suspend. Change-Id: I5c6e4f0eb0883a9c3cd2711f65e0d74a6cced310 Signed-off-by: Priyanka Gujjula --- driver/vidc/inc/msm_vidc_core.h | 1 + driver/vidc/src/msm_vidc_driver.c | 10 +++++++++- driver/vidc/src/msm_vidc_probe.c | 23 ++++++++++++++++++++++- 3 files changed, 32 insertions(+), 2 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_core.h b/driver/vidc/inc/msm_vidc_core.h index ab15c75e75..f4d66a4f1e 100644 --- a/driver/vidc/inc/msm_vidc_core.h +++ b/driver/vidc/inc/msm_vidc_core.h @@ -112,6 +112,7 @@ struct msm_vidc_core { struct completion init_done; bool handoff_done; bool hw_power_control; + bool pm_suspended; }; #endif // _MSM_VIDC_CORE_H_ diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index d6182460f9..728e4a36f5 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -4303,6 +4303,7 @@ int msm_vidc_core_init(struct msm_vidc_core *core) init_completion(&core->init_done); core->smmu_fault_handled = false; core->ssr.trigger = false; + core->pm_suspended = false; rc = venus_hfi_core_init(core); if (rc) { @@ -4632,21 +4633,28 @@ void msm_vidc_batch_handler(struct work_struct *work) { struct msm_vidc_inst *inst; enum msm_vidc_allow allow; + struct msm_vidc_core *core; int rc = 0; inst = container_of(work, struct msm_vidc_inst, decode_batch.work.work); inst = get_inst_ref(g_core, inst); - if (!inst) { + if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return; } + core = inst->core; inst_lock(inst, __func__); if (is_session_error(inst)) { i_vpr_e(inst, "%s: failled. Session error\n", __func__); goto exit; } + if (core->pm_suspended) { + i_vpr_h(inst, "%s: device in pm suspend state\n", __func__); + goto exit; + } + allow = msm_vidc_allow_qbuf(inst, OUTPUT_MPLANE); if (allow != MSM_VIDC_ALLOW) { i_vpr_e(inst, "%s: not allowed in state: %s\n", __func__, diff --git a/driver/vidc/src/msm_vidc_probe.c b/driver/vidc/src/msm_vidc_probe.c index 794c3f77c0..5344ea7c56 100644 --- a/driver/vidc/src/msm_vidc_probe.c +++ b/driver/vidc/src/msm_vidc_probe.c @@ -475,7 +475,6 @@ static int msm_vidc_pm_suspend(struct device *dev) int rc = 0; struct msm_vidc_core *core; - d_vpr_h("%s\n", __func__); /* * Bail out if * - driver possibly not probed yet @@ -492,18 +491,40 @@ static int msm_vidc_pm_suspend(struct device *dev) return -EINVAL; } + d_vpr_h("%s\n", __func__); rc = msm_vidc_suspend(core); if (rc == -ENOTSUPP) rc = 0; else if (rc) d_vpr_e("Failed to suspend: %d\n", rc); + else + core->pm_suspended = true; return rc; } static int msm_vidc_pm_resume(struct device *dev) { + struct msm_vidc_core *core; + + /* + * Bail out if + * - driver possibly not probed yet + * - not the main device. We don't support power management on + * subdevices (e.g. context banks) + */ + if (!dev || !dev->driver || + !of_device_is_compatible(dev->of_node, "qcom,msm-vidc")) + return 0; + + core = dev_get_drvdata(dev); + if (!core) { + d_vpr_e("%s: invalid core\n", __func__); + return -EINVAL; + } + d_vpr_h("%s\n", __func__); + core->pm_suspended = false; return 0; } From 1de4ced5231533af7fc1026207a6672a38958dcc Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Thu, 21 Oct 2021 12:20:07 +0530 Subject: [PATCH 0447/1061] video: driver: fix enable_bugon debugfs property for WD timeout Currently enable_bugon debugfs feature not working for WD timeout cases. So added change to support that usecase. Change-Id: I0cb3e6ed34d58c7969c727dea77f4fa695923c25 Signed-off-by: Govindaraj Rajagopal --- driver/vidc/src/venus_hfi.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index 2f14d60aad..1397d30c35 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -2716,8 +2716,11 @@ static int __response_handler(struct msm_vidc_core *core) { int rc = 0; - if (call_venus_op(core, watchdog, core, core->intr_status)) - return handle_system_error(core, NULL); + if (call_venus_op(core, watchdog, core, core->intr_status)) { + struct hfi_packet pkt = {.type = HFI_SYS_ERROR_WD_TIMEOUT}; + + return handle_system_error(core, &pkt); + } memset(core->response_packet, 0, core->packet_size); while (!__iface_msgq_read(core, core->response_packet)) { From 4970193ad18dd75810ccfb7295d39e60887f7cd4 Mon Sep 17 00:00:00 2001 From: Priyanka Gujjula Date: Tue, 12 Oct 2021 22:45:14 +0530 Subject: [PATCH 0448/1061] video-driver: add mmrm query support [1] Disable MMRM if platform feature does not support. [2] Query for scaling support from mmrm driver and enable/disable based on queried support accordingly. Change-Id: I34cf9a9e150b0823828507e3f5d680aae6eb14d4 Signed-off-by: Priyanka Gujjula --- driver/platform/waipio/src/msm_vidc_waipio.c | 1 + driver/vidc/inc/msm_vidc_internal.h | 1 + driver/vidc/src/msm_vidc_probe.c | 29 +++++++++++ driver/vidc/src/venus_hfi.c | 55 ++++++++++++++++---- 4 files changed, 77 insertions(+), 9 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index fbd3bc22d7..dd539b92e3 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -99,6 +99,7 @@ static struct msm_platform_core_capability core_data_waipio[] = { {AV_SYNC_WINDOW_SIZE, 40}, {NON_FATAL_FAULTS, 1}, {ENC_AUTO_FRAMERATE, 1}, + {MMRM, 1}, }; static struct msm_platform_inst_capability instance_data_waipio[] = { diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index a41d66a7a4..5fa6a87b75 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -341,6 +341,7 @@ enum msm_vidc_core_capability_type { CLK_FREQ_THRESHOLD, NON_FATAL_FAULTS, ENC_AUTO_FRAMERATE, + MMRM, CORE_CAP_MAX, }; diff --git a/driver/vidc/src/msm_vidc_probe.c b/driver/vidc/src/msm_vidc_probe.c index 794c3f77c0..ebb1da6b2c 100644 --- a/driver/vidc/src/msm_vidc_probe.c +++ b/driver/vidc/src/msm_vidc_probe.c @@ -170,6 +170,29 @@ static int msm_vidc_register_video_device(struct msm_vidc_core *core, return 0; } +static int msm_vidc_check_mmrm_support(struct msm_vidc_core *core) +{ + int rc = 0; + + if (!core || !core->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (!core->capabilities[MMRM].value) + goto exit; + + /* Todo: Dependency on MMRM driver changes */ + // if (!mmrm_client_check_scaling_supported(MMRM_CLIENT_CLOCK, 0)) { + // d_vpr_e("%s: MMRM not supported\n", __func__); + // core->capabilities[MMRM].value = 0; + // } + +exit: + d_vpr_h("%s: %d\n", __func__, core->capabilities[MMRM].value); + return rc; +} + static int msm_vidc_deinitialize_core(struct msm_vidc_core *core) { int rc = 0; @@ -393,6 +416,12 @@ static int msm_vidc_probe_video_device(struct platform_device *pdev) goto enc_reg_failed; } + rc = msm_vidc_check_mmrm_support(core); + if (rc) { + d_vpr_e("Failed to check MMRM scaling support\n"); + rc = 0; /* Ignore error */ + } + core->debugfs_root = msm_vidc_debugfs_init_core(core); if (!core->debugfs_root) d_vpr_h("Failed to init debugfs core\n"); diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index 2f14d60aad..8dae9007b0 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -662,11 +662,15 @@ int __set_clk_rate(struct msm_vidc_core *core, struct mmrm_client *client; /* not registered */ - if (!core || !cl || !cl->mmrm_client) { + if (!core || !cl || !core->capabilities) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - client = cl->mmrm_client; + + if (core->capabilities[MMRM].value && !cl->mmrm_client) { + d_vpr_e("%s: invalid mmrm client\n", __func__); + return -EINVAL; + } /* * This conversion is necessary since we are scaling clock values based on @@ -681,13 +685,26 @@ int __set_clk_rate(struct msm_vidc_core *core, return 0; d_vpr_p("Scaling clock %s to %llu, prev %llu\n", cl->name, rate, cl->prev); - memset(&client_data, 0, sizeof(client_data)); - client_data.num_hw_blocks = 1; - rc = mmrm_client_set_value(client, &client_data, rate); - if (rc) { - d_vpr_e("%s: Failed to set clock rate %llu %s: %d\n", - __func__, rate, cl->name, rc); - return rc; + + if (core->capabilities[MMRM].value) { + /* set clock rate to mmrm driver */ + client = cl->mmrm_client; + memset(&client_data, 0, sizeof(client_data)); + client_data.num_hw_blocks = 1; + rc = mmrm_client_set_value(client, &client_data, rate); + if (rc) { + d_vpr_e("%s: Failed to set mmrm clock rate %llu %s: %d\n", + __func__, rate, cl->name, rc); + return rc; + } + } else { + /* set clock rate to clock driver */ + rc = clk_set_rate(cl->clk, rate); + if (rc) { + d_vpr_e("%s: Failed to set clock rate %llu %s: %d\n", + __func__, rate, cl->name, rc); + return rc; + } } cl->prev = rate; return rc; @@ -1425,6 +1442,16 @@ static void __deregister_mmrm(struct msm_vidc_core *core) { struct clock_info *cl; + if (!core || !core->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return; + } + + if (!core->capabilities[MMRM].value) { + d_vpr_h("%s: MMRM not supported\n", __func__); + return; + } + venus_hfi_for_each_clock(core, cl) { if (cl->has_scaling && cl->mmrm_client) { mmrm_client_deregister(cl->mmrm_client); @@ -1438,6 +1465,16 @@ static int __register_mmrm(struct msm_vidc_core *core) int rc = 0; struct clock_info *cl; + if (!core ||!core->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (!core->capabilities[MMRM].value) { + d_vpr_h("%s: MMRM not supported\n", __func__); + return 0; + } + venus_hfi_for_each_clock(core, cl) { struct mmrm_client_desc desc; char *name = (char *)desc.client_info.desc.name; From f257df52e055ffc0e6d481bb76d1dfd9db9169fc Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Thu, 21 Oct 2021 10:59:18 -0700 Subject: [PATCH 0449/1061] video: driver: update resolution check for max session support Treat resolutions above (4K + half 4k) as 8k session instead of simply treating above 4k resolutions as 8k sessions. Similar update for 1080p and 720p resolutions as well.Based on above conditions, support or reject a session. Change-Id: I7be70b4c2b6e96ced6da2443f85e440c45fb616c Signed-off-by: Darshana Patil --- driver/vidc/src/msm_vidc_driver.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index d6182460f9..160588b317 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -5578,17 +5578,20 @@ static int msm_vidc_check_max_sessions(struct msm_vidc_inst *inst) * one 1080p session equal to two 720p sessions. This equation * will make one 8k session equal to eight 720p sessions * which looks good. + * + * Do not treat resolutions above 4k as 8k session instead + * treat (4K + half 4k) above as 8k session */ - if (res_is_greater_than(width, height, 4096, 2176)) { + if (res_is_greater_than(width, height, 4096 + (4096 >> 1), 2176 + (2176 >> 1))) { num_8k_sessions += 1; num_4k_sessions += 2; num_1080p_sessions += 4; num_720p_sessions += 8; - } else if (res_is_greater_than(width, height, 1920, 1088)) { + } else if (res_is_greater_than(width, height, 1920 + (1920 >> 1), 1088 + (1088 >> 1))) { num_4k_sessions += 1; num_1080p_sessions += 2; num_720p_sessions += 4; - } else if (res_is_greater_than(width, height, 1280, 736)) { + } else if (res_is_greater_than(width, height, 1280 + (1280 >> 1), 736 + (736 >> 1))) { num_1080p_sessions += 1; num_720p_sessions += 2; } else { From 5ec009352f135609b33342657c96775b9855c361 Mon Sep 17 00:00:00 2001 From: Maheshwar Ajja Date: Fri, 22 Oct 2021 09:07:50 -0700 Subject: [PATCH 0450/1061] video: driver: update decoder load calculation Calculate video decoder load based on max of crop and input port resolution as few clients might not set resolution on input port in which case load is not proper before streaming started. Change-Id: Id95d42e4cb3d992f759ce3388a8aeb55fadf16d7 Signed-off-by: Maheshwar Ajja --- driver/vidc/src/msm_vdec.c | 16 ++++++++-------- driver/vidc/src/msm_vidc_driver.c | 7 +++++-- driver/vidc/src/msm_vidc_vb2.c | 2 +- 3 files changed, 14 insertions(+), 11 deletions(-) diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index f90a577150..1438b50f39 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -191,14 +191,6 @@ static int msm_vdec_set_crop_offsets(struct msm_vidc_inst *inst, u32 left_offset, top_offset, right_offset, bottom_offset; u32 payload[2] = {0}; - if (inst->fmts[INPUT_PORT].fmt.pix_mp.width < - inst->crop.width) - return -EINVAL; - - if (inst->fmts[INPUT_PORT].fmt.pix_mp.height < - inst->crop.height) - return -EINVAL; - left_offset = inst->crop.left; top_offset = inst->crop.top; right_offset = (inst->fmts[INPUT_PORT].fmt.pix_mp.width - @@ -2349,6 +2341,14 @@ int msm_vdec_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) fmt->fmt.pix_mp.plane_fmt[0].sizeimage; pix_fmt = v4l2_colorformat_to_driver(f->fmt.pix_mp.pixelformat, __func__); msm_vidc_update_cap_value(inst, PIX_FMTS, pix_fmt, __func__); + + /* update crop while input port is not streaming */ + if (!inst->vb2q[INPUT_PORT].streaming) { + inst->crop.top = 0; + inst->crop.left = 0; + inst->crop.width = f->fmt.pix_mp.width; + inst->crop.height = f->fmt.pix_mp.height; + } i_vpr_h(inst, "%s: type: OUTPUT, format %s width %d height %d size %u min_count %d extra_count %d\n", __func__, v4l2_pixelfmt_name(fmt->fmt.pix_mp.pixelformat), diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index a7a32ce1fd..58eda79033 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -1959,8 +1959,8 @@ int msm_vidc_get_mbs_per_frame(struct msm_vidc_inst *inst) if (is_decode_session(inst)) { inp_f = &inst->fmts[INPUT_PORT]; - width = inp_f->fmt.pix_mp.width; - height = inp_f->fmt.pix_mp.height; + width = max(inp_f->fmt.pix_mp.width, inst->crop.width); + height = max(inp_f->fmt.pix_mp.height, inst->crop.height); } else if (is_encode_session(inst)) { width = inst->crop.width; height = inst->crop.height; @@ -5275,6 +5275,9 @@ int msm_vidc_check_core_mbps(struct msm_vidc_inst *inst) i_vpr_e(inst, "%s: Hardware overloaded. needed %u, max %u", __func__, mbps, core->capabilities[MAX_MBPS].value); return rc; + } else { + i_vpr_h(inst, "%s: HW load needed %u is within max %u", __func__, + mbps, core->capabilities[MAX_MBPS].value); } return 0; diff --git a/driver/vidc/src/msm_vidc_vb2.c b/driver/vidc/src/msm_vidc_vb2.c index 2298ea9e88..ae14605dfc 100644 --- a/driver/vidc/src/msm_vidc_vb2.c +++ b/driver/vidc/src/msm_vidc_vb2.c @@ -261,7 +261,7 @@ int msm_vidc_start_streaming(struct vb2_queue *q, unsigned int count) return rc; error: - i_vpr_h(inst, "Streamon: %s failed\n", v4l2_type_name(q->type)); + i_vpr_e(inst, "Streamon: %s failed\n", v4l2_type_name(q->type)); return -EINVAL; } From e786da48eb74f2d453890029bb504f768b7e33d7 Mon Sep 17 00:00:00 2001 From: Priyanka Gujjula Date: Mon, 25 Oct 2021 21:36:44 +0530 Subject: [PATCH 0451/1061] video: driver: Use max fps from inst caps Use maximum framerate from published instance caps to make it platform agnostic. Change-Id: I319768e722774969287abb9e782ddbece7593ff9 Signed-off-by: Priyanka Gujjula --- driver/platform/waipio/src/msm_vidc_waipio.c | 2 ++ driver/variant/iris2/src/msm_vidc_power_iris2.c | 4 ++-- driver/vidc/inc/msm_vidc_internal.h | 2 -- driver/vidc/src/msm_vidc.c | 5 +++-- driver/vidc/src/msm_vidc_driver.c | 5 +++-- 5 files changed, 10 insertions(+), 8 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index dd539b92e3..b00ae7eafa 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -18,6 +18,8 @@ #define MAX_BASE_LAYER_PRIORITY_ID 63 #define MAX_BITRATE 220000000 #define DEFAULT_BITRATE 20000000 +#define MINIMUM_FPS 1 +#define MAXIMUM_FPS 960 #define MIN_QP_10BIT -12 #define MIN_QP_8BIT 0 #define MAX_QP 51 diff --git a/driver/variant/iris2/src/msm_vidc_power_iris2.c b/driver/variant/iris2/src/msm_vidc_power_iris2.c index 2d1a60348a..88f9ad7f9f 100644 --- a/driver/variant/iris2/src/msm_vidc_power_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_power_iris2.c @@ -166,7 +166,7 @@ u64 msm_vidc_calc_freq_iris2(struct msm_vidc_inst *inst, u32 data_size) vsp_cycles += mbs_per_second * base_cycles; /* Add 25 percent extra for 960fps use case */ - if (fps >= MAXIMUM_FPS) + if (fps >= 960) vsp_cycles += div_u64(vpp_cycles * 25, 100); if (inst->codec == MSM_VIDC_VP9 && @@ -372,7 +372,7 @@ static u64 __calculate_decoder(struct vidc_bus_vote_data *d) llc.line_buffer_write + ddr.total; /* Add 25 percent extra for 960fps use case */ - if (fps >= MAXIMUM_FPS) { + if (fps >= 960) { ddr.total += div_u64(ddr.total * 25, 100); llc.total += div_u64(llc.total * 25, 100); } diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 5fa6a87b75..833e9e40f5 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -30,8 +30,6 @@ #define MIN_SUPPORTED_WIDTH 32 #define MIN_SUPPORTED_HEIGHT 32 #define DEFAULT_FPS 30 -#define MINIMUM_FPS 1 -#define MAXIMUM_FPS 960 #define MAXIMUM_VP9_FPS 60 #define SINGLE_INPUT_BUFFER 1 #define SINGLE_OUTPUT_BUFFER 1 diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index 3b91c66d53..81924a65a4 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -729,11 +729,12 @@ int msm_vidc_enum_frameintervals(void *instance, struct v4l2_frmivalenum *fival) fival->type = V4L2_FRMIVAL_TYPE_STEPWISE; fival->stepwise.min.numerator = 1; - fival->stepwise.min.denominator = min_t(u32, fps, MAXIMUM_FPS); + fival->stepwise.min.denominator = + min_t(u32, fps, capability->cap[FRAME_RATE].max); fival->stepwise.max.numerator = 1; fival->stepwise.max.denominator = 1; fival->stepwise.step.numerator = 1; - fival->stepwise.step.denominator = MAXIMUM_FPS; + fival->stepwise.step.denominator = capability->cap[FRAME_RATE].max; return 0; } diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index a7a32ce1fd..ba876c14cd 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -2641,7 +2641,7 @@ void msm_vidc_allow_dcvs(struct msm_vidc_inst *inst) struct msm_vidc_core *core; u32 fps; - if (!inst || !inst->core) { + if (!inst || !inst->core || !inst->capabilities) { d_vpr_e("%s: Invalid args: %pK\n", __func__, inst); return; } @@ -2696,7 +2696,8 @@ void msm_vidc_allow_dcvs(struct msm_vidc_inst *inst) } fps = msm_vidc_get_fps(inst); - if (is_decode_session(inst) && fps >= MAXIMUM_FPS) { + if (is_decode_session(inst) && + fps >= inst->capabilities->cap[FRAME_RATE].max) { allow = false; i_vpr_h(inst, "%s: unsupported fps %d\n", __func__, fps); goto exit; From cad2ed9de0f2c373724ba893fe185478d0650925 Mon Sep 17 00:00:00 2001 From: Priyanka Gujjula Date: Tue, 26 Oct 2021 22:47:53 +0530 Subject: [PATCH 0452/1061] video: driver: enable mmrm query support Enable MMRM query support from mmrm driver API along with internal core caps. Change-Id: I997e8005e31a1bc3a8223de8cecc45fcaffdeeca Signed-off-by: Priyanka Gujjula --- driver/vidc/src/msm_vidc_probe.c | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/driver/vidc/src/msm_vidc_probe.c b/driver/vidc/src/msm_vidc_probe.c index 9e08850da8..daf1a14263 100644 --- a/driver/vidc/src/msm_vidc_probe.c +++ b/driver/vidc/src/msm_vidc_probe.c @@ -182,11 +182,10 @@ static int msm_vidc_check_mmrm_support(struct msm_vidc_core *core) if (!core->capabilities[MMRM].value) goto exit; - /* Todo: Dependency on MMRM driver changes */ - // if (!mmrm_client_check_scaling_supported(MMRM_CLIENT_CLOCK, 0)) { - // d_vpr_e("%s: MMRM not supported\n", __func__); - // core->capabilities[MMRM].value = 0; - // } + if (!mmrm_client_check_scaling_supported(MMRM_CLIENT_CLOCK, 0)) { + d_vpr_e("%s: MMRM not supported\n", __func__); + core->capabilities[MMRM].value = 0; + } exit: d_vpr_h("%s: %d\n", __func__, core->capabilities[MMRM].value); From e3ea015659532453908f8e98681e827b41a818a2 Mon Sep 17 00:00:00 2001 From: Maheshwar Ajja Date: Thu, 7 Oct 2021 18:05:04 -0700 Subject: [PATCH 0453/1061] video: driver: use QMAA flags for video driver compilation Control video driver compilation based on QMAA flags. Change-Id: I2cac1184538a7e7c0ef5c17eece59fd3f9e5b727 Signed-off-by: Maheshwar Ajja --- Android.mk | 4 ++++ video_kernel_board.mk | 4 ++++ video_kernel_product.mk | 4 ++++ 3 files changed, 12 insertions(+) diff --git a/Android.mk b/Android.mk index e01148148e..b0a9e2216b 100644 --- a/Android.mk +++ b/Android.mk @@ -1,5 +1,7 @@ # SPDX-License-Identifier: GPL-2.0-only +ifeq ($(TARGET_USES_QMAA),false) +ifeq ($(TARGET_USES_QMAA_OVERRIDE_VIDEO),true) VIDEO_BLD_DIR := $(shell pwd)/vendor/qcom/opensource/video-driver VIDEO_SELECT := CONFIG_MSM_VIDC_V4L2=m @@ -34,3 +36,5 @@ LOCAL_ADDITIONAL_DEPENDENCIES := $(call intermediates-dir-for,DLKM,mmrm-module-s # Include kp_module.ko in the /vendor/lib/modules (vendor.img) # BOARD_VENDOR_KERNEL_MODULES += $(LOCAL_MODULE_PATH)/$(LOCAL_MODULE) include $(DLKM_DIR)/Build_external_kernelmodule.mk +endif +endif diff --git a/video_kernel_board.mk b/video_kernel_board.mk index 109b098a85..551ce0f72f 100644 --- a/video_kernel_board.mk +++ b/video_kernel_board.mk @@ -1,5 +1,7 @@ # SPDX-License-Identifier: GPL-2.0-only # Build video kernel driver +ifeq ($(TARGET_USES_QMAA),false) +ifeq ($(TARGET_USES_QMAA_OVERRIDE_VIDEO),true) ifneq ($(TARGET_KERNEL_DLKM_DISABLE),true) ifneq ($(TARGET_BOARD_AUTO),true) ifeq ($(call is-board-platform-in-list,$(TARGET_BOARD_PLATFORM)),true) @@ -9,3 +11,5 @@ BUILD_VIDEO_TECHPACK_SOURCE := true endif endif endif +endif +endif diff --git a/video_kernel_product.mk b/video_kernel_product.mk index 6cad4ca521..6900093826 100644 --- a/video_kernel_product.mk +++ b/video_kernel_product.mk @@ -1,2 +1,6 @@ # SPDX-License-Identifier: GPL-2.0-only +ifeq ($(TARGET_USES_QMAA),false) +ifeq ($(TARGET_USES_QMAA_OVERRIDE_VIDEO),true) PRODUCT_PACKAGES += msm_video.ko +endif +endif From c3440c6ade7fdd9afe319675265343e52fe07fd8 Mon Sep 17 00:00:00 2001 From: Priyanka Gujjula Date: Thu, 9 Sep 2021 12:12:47 +0530 Subject: [PATCH 0454/1061] video: driver: Add support for diwali variant Add support for diwali variants. Change-Id: Idf322e674818642a9c886fe8707e5ff8f64c4db5 Signed-off-by: Ankush Mitra Signed-off-by: Priyanka Gujjula --- Kbuild | 20 +- config/diwali_video.conf | 4 + config/diwali_video.h | 7 + driver/platform/diwali/inc/msm_vidc_diwali.h | 26 + driver/platform/diwali/src/msm_vidc_diwali.c | 1672 ++++++++++++++++++ driver/vidc/src/msm_vidc_platform.c | 79 +- 6 files changed, 1771 insertions(+), 37 deletions(-) create mode 100644 config/diwali_video.conf create mode 100644 config/diwali_video.h create mode 100644 driver/platform/diwali/inc/msm_vidc_diwali.h create mode 100644 driver/platform/diwali/src/msm_vidc_diwali.c diff --git a/Kbuild b/Kbuild index ab3c3278cf..b4ab16ddce 100644 --- a/Kbuild +++ b/Kbuild @@ -4,13 +4,18 @@ KBUILD_CPPFLAGS += -DCONFIG_MSM_MMRM=1 ifeq ($(CONFIG_ARCH_WAIPIO), y) include $(VIDEO_ROOT)/config/waipio_video.conf -LINUXINCLUDE += -include $(VIDEO_ROOT)/config/waipio_video.h +LINUXINCLUDE += -include $(VIDEO_ROOT)/config/waipio_video.h \ + -I$(VIDEO_ROOT)/driver/platform/waipio/inc +endif + +ifeq ($(CONFIG_ARCH_DIWALI), y) +include $(VIDEO_ROOT)/config/diwali_video.conf +LINUXINCLUDE += -include $(VIDEO_ROOT)/config/diwali_video.h \ + -I$(VIDEO_ROOT)/driver/platform/diwali/inc endif LINUXINCLUDE += -I$(VIDEO_ROOT)/driver/vidc/inc \ - -I$(VIDEO_ROOT)/include/uapi/vidc \ - -I$(VIDEO_ROOT)/driver/platform/waipio/inc \ - -I$(VIDEO_ROOT)/driver/variant/iris2/inc + -I$(VIDEO_ROOT)/include/uapi/vidc USERINCLUDE += -I$(VIDEO_ROOT)/include/uapi/vidc/media \ -I$(VIDEO_ROOT)/include/uapi/vidc @@ -21,7 +26,12 @@ ifeq ($(CONFIG_MSM_VIDC_WAIPIO), y) msm_video-objs += driver/platform/waipio/src/msm_vidc_waipio.o endif +ifeq ($(CONFIG_MSM_VIDC_DIWALI), y) +msm_video-objs += driver/platform/diwali/src/msm_vidc_diwali.o +endif + ifeq ($(CONFIG_MSM_VIDC_IRIS2), y) +LINUXINCLUDE += -I$(VIDEO_ROOT)/driver/variant/iris2/inc msm_video-objs += driver/variant/iris2/src/msm_vidc_buffer_iris2.o \ driver/variant/iris2/src/msm_vidc_power_iris2.o \ driver/variant/iris2/src/msm_vidc_iris2.o @@ -43,4 +53,4 @@ msm_video-objs += driver/vidc/src/msm_vidc_v4l2.o \ driver/vidc/src/msm_vidc_memory.o \ driver/vidc/src/venus_hfi.o \ driver/vidc/src/hfi_packet.o \ - driver/vidc/src/venus_hfi_response.o + driver/vidc/src/venus_hfi_response.o \ No newline at end of file diff --git a/config/diwali_video.conf b/config/diwali_video.conf new file mode 100644 index 0000000000..07ec494289 --- /dev/null +++ b/config/diwali_video.conf @@ -0,0 +1,4 @@ +# SPDX-License-Identifier: GPL-2.0-only + +export CONFIG_MSM_VIDC_DIWALI=y +export CONFIG_MSM_VIDC_IRIS2=y \ No newline at end of file diff --git a/config/diwali_video.h b/config/diwali_video.h new file mode 100644 index 0000000000..cc48c7248d --- /dev/null +++ b/config/diwali_video.h @@ -0,0 +1,7 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. + */ + +#define CONFIG_MSM_VIDC_DIWALI 1 +#define CONFIG_MSM_VIDC_IRIS2 1 \ No newline at end of file diff --git a/driver/platform/diwali/inc/msm_vidc_diwali.h b/driver/platform/diwali/inc/msm_vidc_diwali.h new file mode 100644 index 0000000000..ce904fb52c --- /dev/null +++ b/driver/platform/diwali/inc/msm_vidc_diwali.h @@ -0,0 +1,26 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. + */ + +#ifndef _MSM_VIDC_DIWALI_H_ +#define _MSM_VIDC_DIWALI_H_ + +#include "msm_vidc_core.h" + +#if defined(CONFIG_MSM_VIDC_DIWALI) +int msm_vidc_init_platform_diwali(struct msm_vidc_core *core, struct device *dev); +int msm_vidc_deinit_platform_diwali(struct msm_vidc_core *core, struct device *dev); +#else +int msm_vidc_init_platform_diwali(struct msm_vidc_core *core, struct device *dev) +{ + return -EINVAL; +} +int msm_vidc_deinit_platform_diwali(struct msm_vidc_core *core, struct device *dev) +{ + return -EINVAL; +} +#endif + +#endif // _MSM_VIDC_DIWALI_H_ diff --git a/driver/platform/diwali/src/msm_vidc_diwali.c b/driver/platform/diwali/src/msm_vidc_diwali.c new file mode 100644 index 0000000000..be9e9a6737 --- /dev/null +++ b/driver/platform/diwali/src/msm_vidc_diwali.c @@ -0,0 +1,1672 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. + */ + +#include + +#include "msm_vidc_diwali.h" +#include "msm_vidc_platform.h" +#include "msm_vidc_debug.h" +#include "msm_vidc_internal.h" +#include "msm_vidc_core.h" +#include "msm_vidc_control.h" +#include "hfi_property.h" + +#define DEFAULT_VIDEO_CONCEAL_COLOR_BLACK 0x8020010 +#define MINIMUM_FPS 1 +#define MAXIMUM_FPS 480 +#define MAX_LTR_FRAME_COUNT 2 +#define MAX_BASE_LAYER_PRIORITY_ID 63 +#define MIN_CHROMA_QP_OFFSET -12 +#define MAX_CHROMA_QP_OFFSET 0 +#define MAX_BITRATE 220000000 +#define DEFAULT_BITRATE 20000000 +#define MIN_QP_10BIT -12 +#define MIN_QP_8BIT 0 +#define MAX_QP 51 +#define DEFAULT_QP 20 +#define MAX_CONSTANT_QUALITY 100 +#define MIN_SLICE_BYTE_SIZE 512 +#define MAX_SLICE_BYTE_SIZE \ + ((MAX_BITRATE) >> 3) +#define MAX_SLICE_MB_SIZE \ + (((4096 + 15) >> 4) * ((2304 + 15) >> 4)) + +#define UBWC_CONFIG(mc, ml, hbb, bs1, bs2, bs3, bsp) \ +{ \ + .max_channels = mc, \ + .mal_length = ml, \ + .highest_bank_bit = hbb, \ + .bank_swzl_level = bs1, \ + .bank_swz2_level = bs2, \ + .bank_swz3_level = bs3, \ + .bank_spreading = bsp, \ +} + +#define ENC MSM_VIDC_ENCODER +#define DEC MSM_VIDC_DECODER +#define H264 MSM_VIDC_H264 +#define HEVC MSM_VIDC_HEVC +#define VP9 MSM_VIDC_VP9 +#define HEIC MSM_VIDC_HEIC +#define CODECS_ALL (H264 | HEVC | VP9 | HEIC) + +static struct msm_platform_core_capability core_data_diwali[] = { + /* {type, value} */ + {ENC_CODECS, H264|HEVC|HEIC}, + {DEC_CODECS, H264|HEVC|VP9|HEIC}, + /* TODO (AM) : concurrency spec needs to be verified for diwali */ + {MAX_SESSION_COUNT, 16}, + {MAX_NUM_720P_SESSIONS, 16}, + {MAX_NUM_1080P_SESSIONS, 8}, + {MAX_NUM_4K_SESSIONS, 4}, + {MAX_NUM_8K_SESSIONS, 1}, + {MAX_SECURE_SESSION_COUNT, 3}, + {MAX_MBPF, 138240}, /* ((8192x4320)/256) */ + {MAX_MBPS, 4147200},/* max_load + *(3840x2176)/256)@120fps decode, + *(8192x4320)/256)@30fps decode + */ + {MAX_IMAGE_MBPF, 1048576}, /* (16384x16384)/256 */ + {MAX_MBPF_HQ, 8160}, /* ((1920x1088)/256) */ + {MAX_MBPS_HQ, 489600}, /* ((1920x1088)/256)@60fps */ + {MAX_MBPF_B_FRAME, 32640}, /* 3840x2176/256 */ + {MAX_MBPS_B_FRAME, 1958400}, /* 3840x2176/256 MBs@60fps */ + {MAX_ENH_LAYER_COUNT, 5}, + {NUM_VPP_PIPE, 2}, + {SW_PC, 1}, + {FW_UNLOAD, 0}, + {HW_RESPONSE_TIMEOUT, HW_RESPONSE_TIMEOUT_VALUE}, /* 1000 ms */ + {SW_PC_DELAY, SW_PC_DELAY_VALUE }, /* 1500 ms (>HW_RESPONSE_TIMEOUT)*/ + {FW_UNLOAD_DELAY, FW_UNLOAD_DELAY_VALUE }, /* 3000 ms (>SW_PC_DELAY)*/ + // TODO: review below entries, and if required rename as PREFETCH + {PREFIX_BUF_COUNT_PIX, 18}, + {PREFIX_BUF_SIZE_PIX, 13434880}, /* Calculated by VIDEO_RAW_BUFFER_SIZE for 4096x2160 UBWC */ + {PREFIX_BUF_COUNT_NON_PIX, 1}, + {PREFIX_BUF_SIZE_NON_PIX, 209715200}, /* + * Internal buffer size is calculated for secure decode session + * of resolution 4k (4096x2160) + * Internal buf size = calculate_scratch_size() + + * calculate_scratch1_size() + calculate_persist1_size() + * Take maximum between VP9 10bit, HEVC 10bit, AVC secure + * decoder sessions + */ + {PAGEFAULT_NON_FATAL, 1}, + {PAGETABLE_CACHING, 0}, + {DCVS, 1}, + {DECODE_BATCH, 1}, + {DECODE_BATCH_TIMEOUT, 200}, + {AV_SYNC_WINDOW_SIZE, 40}, + {NON_FATAL_FAULTS, 1}, + {ENC_AUTO_FRAMERATE, 1}, +}; + +static struct msm_platform_inst_capability instance_data_diwali[] = { + /* {cap, domain, codec, + * min, max, step_or_mask, value, + * v4l2_id, + * hfi_id, + * flags, + * parents, + * children, + * adjust, set} + */ + + {FRAME_WIDTH, DEC, CODECS_ALL, 96, 8192, 1, 1920}, + {FRAME_WIDTH, DEC, VP9, 96, 4096, 1, 1920}, + {FRAME_WIDTH, ENC, CODECS_ALL, 128, 8192, 1, 1920}, + {LOSSLESS_FRAME_WIDTH, ENC, H264|HEVC, 128, 4096, 1, 1920}, + {SECURE_FRAME_WIDTH, DEC, H264|HEVC|VP9, 96, 4096, 1, 1920}, + {SECURE_FRAME_WIDTH, ENC, H264|HEVC, 128, 4096, 1, 1920}, + {FRAME_HEIGHT, DEC, CODECS_ALL, 96, 8192, 1, 1080}, + {FRAME_HEIGHT, DEC, VP9, 96, 4096, 1, 1080}, + {FRAME_HEIGHT, ENC, CODECS_ALL, 128, 8192, 1, 1080}, + {LOSSLESS_FRAME_HEIGHT, ENC, H264|HEVC, 128, 4096, 1, 1080}, + {SECURE_FRAME_HEIGHT, DEC, H264|HEVC|VP9, 96, 4096, 1, 1080}, + {SECURE_FRAME_HEIGHT, ENC, H264|HEVC, 128, 4096, 1, 1080}, + {PIX_FMTS, ENC, H264, + MSM_VIDC_FMT_NV12, + MSM_VIDC_FMT_NV12C, + MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C | + MSM_VIDC_FMT_RGBA8888 | MSM_VIDC_FMT_RGBA8888C, + MSM_VIDC_FMT_NV12C, + 0, 0, + CAP_FLAG_ROOT, + {0}, + {META_ROI_INFO}}, + {PIX_FMTS, ENC, HEVC, + MSM_VIDC_FMT_NV12, + MSM_VIDC_FMT_TP10C, + MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C | + MSM_VIDC_FMT_P010 | MSM_VIDC_FMT_TP10C | + MSM_VIDC_FMT_RGBA8888 | MSM_VIDC_FMT_RGBA8888C, + MSM_VIDC_FMT_NV12C, + 0, 0, + CAP_FLAG_ROOT, + {0}, + {PROFILE, MIN_FRAME_QP, MAX_FRAME_QP, I_FRAME_QP, P_FRAME_QP, + B_FRAME_QP, META_ROI_INFO, BLUR_TYPES, MIN_QUALITY}}, + + {PIX_FMTS, DEC, HEVC|HEIC, + MSM_VIDC_FMT_NV12, + MSM_VIDC_FMT_TP10C, + MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C | + MSM_VIDC_FMT_P010 | MSM_VIDC_FMT_TP10C, + MSM_VIDC_FMT_NV12C, + 0, 0, + CAP_FLAG_ROOT, + {0}, + {PROFILE}}, + + {PIX_FMTS, DEC, H264, + MSM_VIDC_FMT_NV12, + MSM_VIDC_FMT_NV12C, + MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C, + MSM_VIDC_FMT_NV12C}, + + {PIX_FMTS, DEC, VP9, + MSM_VIDC_FMT_NV12, + MSM_VIDC_FMT_TP10C, + MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C | + MSM_VIDC_FMT_P010 | MSM_VIDC_FMT_TP10C, + MSM_VIDC_FMT_NV12C}, + + {MIN_BUFFERS_INPUT, ENC|DEC, CODECS_ALL, 0, 64, 1, 4, + V4L2_CID_MIN_BUFFERS_FOR_OUTPUT}, + {MIN_BUFFERS_OUTPUT, ENC|DEC, CODECS_ALL, + 0, 64, 1, 4, + V4L2_CID_MIN_BUFFERS_FOR_CAPTURE, + HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + /* TODO (AM): review requied for encode/decode spec */ + /* (8192 * 4320) / 256 */ + {MBPF, ENC, CODECS_ALL, 64, 138240, 1, 138240}, + {MBPF, DEC, CODECS_ALL, 64, 138240, 1, 138240}, + + /* (4096 * 2304) / 256 */ + {MBPF, DEC, VP9, 36, 36864, 1, 36864}, + /* (4096 * 2304) / 256 */ + {LOSSLESS_MBPF, ENC, H264|HEVC, 64, 36864, 1, 36864}, + /* Batch Mode Decode */ + /* TODO: update with new values based on updated voltage corner */ + {BATCH_MBPF, DEC, H264|HEVC|VP9, 64, 8160, 1, 34816}, + /* (4096 * 2304) / 256 */ + {BATCH_FPS, DEC, H264|HEVC|VP9, 1, 60, 1, 60}, + {SECURE_MBPF, ENC|DEC, H264|HEVC|VP9, 64, 36864, 1, 8160}, + /* ((1920 * 1088) / 256) * 480 fps */ + {MBPS, ENC, CODECS_ALL, 64, 3916800, 1, 3916800}, + /* ((1920 * 1088) / 256) * 960 fps */ + {MBPS, DEC, CODECS_ALL, 64, 7833600, 1, 7833600}, + /* ((4096 * 2304) / 256) * 60 */ + {MBPS, DEC, VP9, 36, 2211840, 1, 2211840}, + /* ((4096 * 2304) / 256) * 60 fps */ + {POWER_SAVE_MBPS, ENC, CODECS_ALL, 0, 2211840, 1, 2211840}, + + /* (8192 * 4320) / 256 */ + + /* Encode spec - 4K@60 */ + /* ((3840 * 2176) / 256) * 60 fps */ + {MBPS, ENC, CODECS_ALL, 64, 1958400, 1, 489600}, + {MBPS, DEC, CODECS_ALL, 64, 1958400, 1, 489600}, + + /* Decode spec - 8K@30, 4k@120*/ + /* ((8192 * 4320) / 256) * 30 fps */ + {MBPS, DEC, CODECS_ALL, 64, 4147200, 1, 979200}, + + {FRAME_RATE, ENC, CODECS_ALL, + (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), + 1, (DEFAULT_FPS << 16), + 0, + HFI_PROP_FRAME_RATE, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + {0}, {0}, + NULL, msm_vidc_set_q16}, + + {FRAME_RATE, DEC, CODECS_ALL, + (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), + 1, (DEFAULT_FPS << 16)}, + + {FRAME_RATE, DEC, VP9, + (MINIMUM_FPS << 16), (MAXIMUM_VP9_FPS << 16), + 1, (DEFAULT_FPS << 16)}, + + {OPERATING_RATE, ENC|DEC, CODECS_ALL, + (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), + 1, (DEFAULT_FPS << 16)}, + + {OPERATING_RATE, DEC, VP9, + (MINIMUM_FPS << 16), (MAXIMUM_VP9_FPS << 16), + 1, (DEFAULT_FPS << 16)}, + + {SCALE_FACTOR, ENC, H264|HEVC, 1, 8, 1, 8}, + + /* TODO (AM): review requied for VSP/VPP cycle */ + {MB_CYCLES_VSP, ENC, CODECS_ALL, 25, 25, 1, 25}, + {MB_CYCLES_VSP, DEC, CODECS_ALL, 25, 25, 1, 25}, + {MB_CYCLES_VSP, DEC, VP9, 60, 60, 1, 60}, + {MB_CYCLES_VPP, ENC, CODECS_ALL, 675, 675, 1, 675}, + {MB_CYCLES_VPP, DEC, CODECS_ALL, 200, 200, 1, 200}, + {MB_CYCLES_LP, ENC, CODECS_ALL, 320, 320, 1, 320}, + {MB_CYCLES_LP, DEC, CODECS_ALL, 200, 200, 1, 200}, + {MB_CYCLES_FW, ENC|DEC, CODECS_ALL, 326389, 326389, 1, 326389}, + {MB_CYCLES_FW_VPP, ENC|DEC, CODECS_ALL, 44156, 44156, 1, 44156}, + + {SECURE_MODE, ENC|DEC, H264|HEVC|VP9, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_SECURE, + HFI_PROP_SECURE, + CAP_FLAG_NONE, + {0}, + {0}, + NULL, msm_vidc_set_u32}, + + {HFLIP, ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_HFLIP, + HFI_PROP_FLIP, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, + {0}, + {0}, + NULL, msm_vidc_set_flip}, + + {VFLIP, ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_VFLIP, + HFI_PROP_FLIP, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {0}, + {0}, + NULL, msm_vidc_set_flip}, + + {ROTATION, ENC, CODECS_ALL, + 0, 270, 90, 0, + V4L2_CID_ROTATE, + HFI_PROP_ROTATION, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + {0}, + {0}, + NULL, msm_vidc_set_rotation}, + + {SUPER_FRAME, ENC, H264|HEVC, + 0, 32, 1, 0, + V4L2_CID_MPEG_VIDC_SUPERFRAME, + 0}, + + {SLICE_INTERFACE, DEC, CODECS_ALL, + 0, 0, 0, 0, + V4L2_CID_MPEG_VIDEO_DECODER_SLICE_INTERFACE, + 0}, + + {HEADER_MODE, ENC, CODECS_ALL, + V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE, + V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME, + BIT(V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE) | + BIT(V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME), + V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE, + V4L2_CID_MPEG_VIDEO_HEADER_MODE, + HFI_PROP_SEQ_HEADER_MODE, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {0}, {0}, + NULL, msm_vidc_set_header_mode}, + + {PREPEND_SPSPPS_TO_IDR, ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDEO_PREPEND_SPSPPS_TO_IDR}, + + {META_SEQ_HDR_NAL, ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_SEQ_HEADER_NAL}, + + {WITHOUT_STARTCODE, ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE, + HFI_PROP_NAL_LENGTH_FIELD, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + {0}, {0}, + NULL, msm_vidc_set_nal_length}, + + {NAL_LENGTH_FIELD, ENC, CODECS_ALL, + V4L2_MPEG_VIDEO_HEVC_SIZE_0, + V4L2_MPEG_VIDEO_HEVC_SIZE_4, + BIT(V4L2_MPEG_VIDEO_HEVC_SIZE_0) | + BIT(V4L2_MPEG_VIDEO_HEVC_SIZE_4), + V4L2_MPEG_VIDEO_HEVC_SIZE_0, + V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD, + HFI_PROP_NAL_LENGTH_FIELD, + CAP_FLAG_MENU | CAP_FLAG_OUTPUT_PORT}, + + /* TODO: Firmware introduced enumeration type for this + * with and without seq header. + */ + {REQUEST_I_FRAME, ENC, H264|HEVC, + 0, 0, 0, 0, + V4L2_CID_MPEG_VIDEO_FORCE_KEY_FRAME, + HFI_PROP_REQUEST_SYNC_FRAME, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + NULL, msm_vidc_set_req_sync_frame}, + + /* Enc: Keeping CABAC and CAVLC as same bitrate. + * Dec: there's no use of Bitrate cap + */ + {BIT_RATE, ENC, H264|HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_BITRATE, + HFI_PROP_TOTAL_BITRATE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {ENH_LAYER_COUNT, BITRATE_MODE}, {PEAK_BITRATE}, + msm_vidc_adjust_bitrate, msm_vidc_set_bitrate}, + + {BITRATE_MODE, ENC, H264, + V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, + V4L2_MPEG_VIDEO_BITRATE_MODE_CBR, + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_VBR) | + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CBR), + V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, + V4L2_CID_MPEG_VIDEO_BITRATE_MODE, + HFI_PROP_RATE_CONTROL, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {0}, + {LTR_COUNT, IR_RANDOM, TIME_DELTA_BASED_RC, I_FRAME_QP, + P_FRAME_QP, B_FRAME_QP, ENH_LAYER_COUNT, BIT_RATE, + CONTENT_ADAPTIVE_CODING, BITRATE_BOOST, MIN_QUALITY, + VBV_DELAY, PEAK_BITRATE,SLICE_MODE, META_ROI_INFO, + BLUR_TYPES, LOWLATENCY_MODE}, + msm_vidc_adjust_bitrate_mode, msm_vidc_set_u32_enum}, + + {BITRATE_MODE, ENC, HEVC, + V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, + V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_VBR) | + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CBR) | + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CQ), + V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, + V4L2_CID_MPEG_VIDEO_BITRATE_MODE, + HFI_PROP_RATE_CONTROL, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {0}, + {LTR_COUNT, IR_RANDOM, TIME_DELTA_BASED_RC, I_FRAME_QP, + P_FRAME_QP, B_FRAME_QP, CONSTANT_QUALITY, ENH_LAYER_COUNT, + CONTENT_ADAPTIVE_CODING, BIT_RATE, + BITRATE_BOOST, MIN_QUALITY, VBV_DELAY, + PEAK_BITRATE, SLICE_MODE, META_ROI_INFO, BLUR_TYPES, + LOWLATENCY_MODE}, + msm_vidc_adjust_bitrate_mode, msm_vidc_set_u32_enum}, + + {LOSSLESS, ENC, HEVC|HEIC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU}, + + {FRAME_SKIP_MODE, ENC, H264|HEVC|HEIC, + V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED, + V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT, + BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED) | + BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_LEVEL_LIMIT) | + BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT), + V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED, + V4L2_CID_MPEG_VIDEO_FRAME_SKIP_MODE, + 0, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {FRAME_RC_ENABLE, ENC, H264|HEVC|HEIC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_ENABLE, + V4L2_CID_MPEG_VIDEO_FRAME_RC_ENABLE}, + + {CONSTANT_QUALITY, ENC, HEVC, + 1, MAX_CONSTANT_QUALITY, 1, 90, + V4L2_CID_MPEG_VIDEO_CONSTANT_QUALITY, + HFI_PROP_CONSTANT_QUALITY, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {BITRATE_MODE}, {0}, + NULL, msm_vidc_set_constant_quality}, + + {GOP_SIZE, ENC, CODECS_ALL, + 0, INT_MAX, 1, 2 * DEFAULT_FPS - 1, + V4L2_CID_MPEG_VIDEO_GOP_SIZE, + HFI_PROP_MAX_GOP_FRAMES, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {ENH_LAYER_COUNT}, + {0}, + msm_vidc_adjust_gop_size, msm_vidc_set_gop_size}, + + {GOP_CLOSURE, ENC, H264|HEVC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_ENABLE, + V4L2_CID_MPEG_VIDEO_GOP_CLOSURE, + 0}, + + {B_FRAME, ENC, H264|HEVC, + 0, 7, 1, 0, + V4L2_CID_MPEG_VIDEO_B_FRAMES, + HFI_PROP_MAX_B_FRAMES, + CAP_FLAG_OUTPUT_PORT, + {ENH_LAYER_COUNT}, + {0}, + msm_vidc_adjust_b_frame, msm_vidc_set_u32}, + + {BLUR_TYPES, ENC, CODECS_ALL, + VIDC_BLUR_NONE, VIDC_BLUR_ADAPTIVE, 1, VIDC_BLUR_ADAPTIVE, + V4L2_CID_MPEG_VIDC_VIDEO_BLUR_TYPES, + HFI_PROP_BLUR_TYPES, + CAP_FLAG_OUTPUT_PORT, + {PIX_FMTS, BITRATE_MODE, CONTENT_ADAPTIVE_CODING}, + {BLUR_RESOLUTION}, + msm_vidc_adjust_blur_type, msm_vidc_set_u32_enum}, + + {BLUR_TYPES, ENC, H264|HEVC, + VIDC_BLUR_NONE, VIDC_BLUR_ADAPTIVE, 1, VIDC_BLUR_ADAPTIVE, + V4L2_CID_MPEG_VIDC_VIDEO_BLUR_TYPES, + HFI_PROP_BLUR_TYPES, + CAP_FLAG_OUTPUT_PORT, + {PIX_FMTS, BITRATE_MODE, CONTENT_ADAPTIVE_CODING, MIN_QUALITY}, + {BLUR_RESOLUTION}, + msm_vidc_adjust_blur_type, msm_vidc_set_u32_enum}, + + {BLUR_RESOLUTION, ENC, CODECS_ALL, + 0, S32_MAX, 1, 0, + V4L2_CID_MPEG_VIDC_VIDEO_BLUR_RESOLUTION, + HFI_PROP_BLUR_RESOLUTION, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {BLUR_TYPES}, + {0}, + msm_vidc_adjust_blur_resolution, msm_vidc_set_blur_resolution}, + + {CSC, ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, + HFI_PROP_CSC}, + + {CSC_CUSTOM_MATRIX, ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_VIDEO_VPE_CSC_CUSTOM_MATRIX, + HFI_PROP_CSC_MATRIX, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + {0}, {0}, + NULL, msm_vidc_set_csc_custom_matrix}, + + {LOWLATENCY_MODE, ENC, H264 | HEVC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_LOWLATENCY_REQUEST, + 0, + CAP_FLAG_NONE, + {BITRATE_MODE}, + {STAGE}, + msm_vidc_adjust_lowlatency_mode, NULL}, + + {LOWLATENCY_MODE, DEC, H264|HEVC|VP9, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_LOWLATENCY_REQUEST, + HFI_PROP_SEQ_CHANGE_AT_SYNC_FRAME, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {LTR_COUNT, ENC, H264|HEVC, + 0, 2, 1, 0, + V4L2_CID_MPEG_VIDEO_LTR_COUNT, + HFI_PROP_LTR_COUNT, + CAP_FLAG_OUTPUT_PORT, + {BITRATE_MODE}, {0}, + msm_vidc_adjust_ltr_count, msm_vidc_set_u32}, + + {USE_LTR, ENC, H264|HEVC, + INVALID_DEFAULT_MARK_OR_USE_LTR, + ((1 << MAX_LTR_FRAME_COUNT) - 1), + 1, INVALID_DEFAULT_MARK_OR_USE_LTR, + V4L2_CID_MPEG_VIDEO_USE_LTR_FRAMES, + HFI_PROP_LTR_USE, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + msm_vidc_adjust_use_ltr, msm_vidc_set_use_and_mark_ltr}, + + {MARK_LTR, ENC, H264|HEVC, + INVALID_DEFAULT_MARK_OR_USE_LTR, + (MAX_LTR_FRAME_COUNT - 1), + 1, INVALID_DEFAULT_MARK_OR_USE_LTR, + V4L2_CID_MPEG_VIDEO_FRAME_LTR_INDEX, + HFI_PROP_LTR_MARK, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + msm_vidc_adjust_mark_ltr, msm_vidc_set_use_and_mark_ltr}, + + {BASELAYER_PRIORITY, ENC, H264, + 0, MAX_BASE_LAYER_PRIORITY_ID, 1, 0, + V4L2_CID_MPEG_VIDEO_BASELAYER_PRIORITY_ID, + HFI_PROP_BASELAYER_PRIORITYID, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + + {IR_RANDOM, ENC, H264|HEVC, + 0, INT_MAX, 1, 0, + V4L2_CID_MPEG_VIDC_INTRA_REFRESH_PERIOD, + HFI_PROP_IR_RANDOM_PERIOD, + CAP_FLAG_OUTPUT_PORT, + {BITRATE_MODE}, {0}, + msm_vidc_adjust_ir_random, msm_vidc_set_u32}, + + {AU_DELIMITER, ENC, H264|HEVC, + V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDEO_AU_DELIMITER, + HFI_PROP_AUD, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + {0}, {0}, + NULL, msm_vidc_set_u32}, + + {TIME_DELTA_BASED_RC, ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_ENABLE, + V4L2_CID_MPEG_VIDC_TIME_DELTA_BASED_RC, + HFI_PROP_TIME_DELTA_BASED_RATE_CONTROL, + CAP_FLAG_OUTPUT_PORT, + {BITRATE_MODE}, {0}, + msm_vidc_adjust_delta_based_rc, msm_vidc_set_u32}, + + {CONTENT_ADAPTIVE_CODING, ENC, H264|HEVC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_ENABLE, + V4L2_CID_MPEG_VIDC_CONTENT_ADAPTIVE_CODING, + HFI_PROP_CONTENT_ADAPTIVE_CODING, + CAP_FLAG_OUTPUT_PORT, + {BITRATE_MODE, MIN_QUALITY}, + {BLUR_TYPES}, + msm_vidc_adjust_cac, + msm_vidc_set_vbr_related_properties}, + + /* TODO (AM): review requied for bitrate boost margin */ + {BITRATE_BOOST, ENC, H264|HEVC, + 0, MAX_BITRATE_BOOST, 25, MAX_BITRATE_BOOST, + V4L2_CID_MPEG_VIDC_QUALITY_BITRATE_BOOST, + HFI_PROP_BITRATE_BOOST, + CAP_FLAG_OUTPUT_PORT, + {BITRATE_MODE, MIN_QUALITY}, + {0}, + msm_vidc_adjust_bitrate_boost, + msm_vidc_set_vbr_related_properties}, + + {MIN_QUALITY, ENC, H264, + 0, MAX_SUPPORTED_MIN_QUALITY, 70, MAX_SUPPORTED_MIN_QUALITY, + 0, + HFI_PROP_MAINTAIN_MIN_QUALITY, + CAP_FLAG_OUTPUT_PORT, + {BITRATE_MODE, ENH_LAYER_COUNT, META_ROI_INFO}, + {CONTENT_ADAPTIVE_CODING, BITRATE_BOOST, BLUR_TYPES}, + msm_vidc_adjust_min_quality, + msm_vidc_set_vbr_related_properties}, + + {MIN_QUALITY, ENC, HEVC, + 0, MAX_SUPPORTED_MIN_QUALITY, 70, MAX_SUPPORTED_MIN_QUALITY, + 0, + HFI_PROP_MAINTAIN_MIN_QUALITY, + CAP_FLAG_OUTPUT_PORT, + {BITRATE_MODE, PIX_FMTS, ENH_LAYER_COUNT, + META_ROI_INFO}, + {CONTENT_ADAPTIVE_CODING, BITRATE_BOOST, BLUR_TYPES}, + msm_vidc_adjust_min_quality, + msm_vidc_set_vbr_related_properties}, + + {VBV_DELAY, ENC, H264|HEVC, + 200, 300, 100, 300, + V4L2_CID_MPEG_VIDEO_VBV_DELAY, + HFI_PROP_VBV_DELAY, + CAP_FLAG_OUTPUT_PORT, + {BITRATE_MODE}, + {0}, + NULL, msm_vidc_set_cbr_related_properties}, + + {PEAK_BITRATE, ENC, H264|HEVC, + /* default peak bitrate is 10% larger than avrg bitrate */ + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_BITRATE_PEAK, + HFI_PROP_TOTAL_PEAK_BITRATE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {BITRATE_MODE, BIT_RATE}, + {0}, + msm_vidc_adjust_peak_bitrate, + msm_vidc_set_cbr_related_properties}, + + {MIN_FRAME_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, + V4L2_CID_MPEG_VIDEO_H264_MIN_QP, + HFI_PROP_MIN_QP_PACKED, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + {0}, {0}, + NULL, msm_vidc_set_min_qp}, + + {MIN_FRAME_QP, ENC, HEVC|HEIC, + MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, + V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP, + HFI_PROP_MIN_QP_PACKED, + CAP_FLAG_OUTPUT_PORT, + {PIX_FMTS}, {0}, + msm_vidc_adjust_hevc_min_qp, msm_vidc_set_min_qp}, + + {I_FRAME_MIN_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, + V4L2_CID_MPEG_VIDEO_H264_I_FRAME_MIN_QP}, + + {I_FRAME_MIN_QP, ENC, HEVC|HEIC, + MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, + V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_MIN_QP}, + + {P_FRAME_MIN_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, + V4L2_CID_MPEG_VIDEO_H264_P_FRAME_MIN_QP}, + + {P_FRAME_MIN_QP, ENC, HEVC|HEIC, + MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, + V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_MIN_QP}, + + {B_FRAME_MIN_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, + V4L2_CID_MPEG_VIDEO_H264_B_FRAME_MIN_QP}, + + {B_FRAME_MIN_QP, ENC, HEVC|HEIC, + MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, + V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_MIN_QP}, + + {MAX_FRAME_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_H264_MAX_QP, + HFI_PROP_MAX_QP_PACKED, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + {0}, {0}, + NULL, msm_vidc_set_max_qp}, + + {MAX_FRAME_QP, ENC, HEVC|HEIC, + MIN_QP_10BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP, + HFI_PROP_MAX_QP_PACKED, + CAP_FLAG_OUTPUT_PORT, + {PIX_FMTS}, {0}, + msm_vidc_adjust_hevc_max_qp, msm_vidc_set_max_qp}, + + {I_FRAME_MAX_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_H264_I_FRAME_MAX_QP}, + + {I_FRAME_MAX_QP, ENC, HEVC|HEIC, + MIN_QP_10BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_MAX_QP}, + + {P_FRAME_MAX_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_H264_P_FRAME_MAX_QP}, + + {P_FRAME_MAX_QP, ENC, HEVC|HEIC, + MIN_QP_10BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_MAX_QP}, + + {B_FRAME_MAX_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_H264_B_FRAME_MAX_QP}, + + {B_FRAME_MAX_QP, ENC, HEVC|HEIC, + MIN_QP_10BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_MAX_QP}, + + {I_FRAME_QP, ENC, HEVC, + MIN_QP_10BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {PIX_FMTS, BITRATE_MODE}, {0}, + msm_vidc_adjust_hevc_i_frame_qp, msm_vidc_set_frame_qp}, + + {I_FRAME_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {BITRATE_MODE}, {0}, + NULL, msm_vidc_set_frame_qp}, + + {P_FRAME_QP, ENC, HEVC, + MIN_QP_10BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {PIX_FMTS, BITRATE_MODE}, {0}, + msm_vidc_adjust_hevc_p_frame_qp, msm_vidc_set_frame_qp}, + + {P_FRAME_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {BITRATE_MODE}, {0}, + NULL, msm_vidc_set_frame_qp}, + + {B_FRAME_QP, ENC, HEVC, + MIN_QP_10BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {PIX_FMTS, BITRATE_MODE}, {0}, + msm_vidc_adjust_hevc_b_frame_qp, msm_vidc_set_frame_qp}, + + {B_FRAME_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_H264_B_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {BITRATE_MODE}, {0}, + NULL, msm_vidc_set_frame_qp}, + + {LAYER_TYPE, ENC, HEVC, + V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B, + V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P, + BIT(V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B) | + BIT(V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P), + V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE, + HFI_PROP_LAYER_ENCODING_TYPE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LAYER_TYPE, ENC, H264, + V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_B, + V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P, + BIT(V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_B) | + BIT(V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P), + V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P, + V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_TYPE, + HFI_PROP_LAYER_ENCODING_TYPE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LAYER_ENABLE, ENC, H264, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING, + HFI_PROP_LAYER_ENCODING_TYPE, + CAP_FLAG_OUTPUT_PORT}, + + {ENH_LAYER_COUNT, ENC, HEVC, + 0, 5, 1, 0, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER, + HFI_PROP_LAYER_COUNT, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {BITRATE_MODE, META_EVA_STATS}, + {GOP_SIZE, B_FRAME, BIT_RATE, MIN_QUALITY}, + msm_vidc_adjust_layer_count, msm_vidc_set_layer_count_and_type}, + + {ENH_LAYER_COUNT, ENC, H264, + 0, 5, 1, 0, + V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_LAYER, + HFI_PROP_LAYER_COUNT, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {BITRATE_MODE, META_EVA_STATS}, + {GOP_SIZE, B_FRAME, BIT_RATE, MIN_QUALITY}, + msm_vidc_adjust_layer_count, msm_vidc_set_layer_count_and_type}, + + /* + * layer bitrate is treated as BIT_RATE cap sibling and + * is handled in bitrate adjust and set functions + */ + {L0_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L0_BR, + HFI_PROP_BITRATE_LAYER1, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, + + {L1_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L1_BR, + HFI_PROP_BITRATE_LAYER2, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, + + {L2_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L2_BR, + HFI_PROP_BITRATE_LAYER3, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, + + {L3_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L3_BR, + HFI_PROP_BITRATE_LAYER4, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, + + {L4_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L4_BR, + HFI_PROP_BITRATE_LAYER5, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, + + {L5_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L5_BR, + HFI_PROP_BITRATE_LAYER6, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, + + {L0_BR, ENC, H264, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L0_BR, + HFI_PROP_BITRATE_LAYER1, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, + + {L1_BR, ENC, H264, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L1_BR, + HFI_PROP_BITRATE_LAYER2, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, + + {L2_BR, ENC, H264, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L2_BR, + HFI_PROP_BITRATE_LAYER3, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, + + {L3_BR, ENC, H264, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L3_BR, + HFI_PROP_BITRATE_LAYER4, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, + + {L4_BR, ENC, H264, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L4_BR, + HFI_PROP_BITRATE_LAYER5, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, + + {L5_BR, ENC, H264, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L5_BR, + HFI_PROP_BITRATE_LAYER6, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, + + {ENTROPY_MODE, ENC, H264, + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC, + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, + BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC) | + BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC), + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, + V4L2_CID_MPEG_VIDEO_H264_ENTROPY_MODE, + HFI_PROP_CABAC_SESSION, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {PROFILE}, + {0}, + msm_vidc_adjust_entropy_mode, msm_vidc_set_u32}, + + {ENTROPY_MODE, DEC, H264|HEVC|VP9, + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC, + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, + BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC) | + BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC), + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, + 0, + HFI_PROP_CABAC_SESSION}, + + /* H264 does not support 10 bit, PIX_FMTS would not be a Parent for this */ + {PROFILE, ENC, H264, + V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE, + V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH, + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_BASELINE) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_MAIN) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_HIGH), + V4L2_MPEG_VIDEO_H264_PROFILE_HIGH, + V4L2_CID_MPEG_VIDEO_H264_PROFILE, + HFI_PROP_PROFILE, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {0}, + {ENTROPY_MODE, TRANSFORM_8X8}, + NULL, msm_vidc_set_u32_enum}, + + {PROFILE, DEC, H264, + V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE, + V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH, + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_BASELINE) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_MAIN) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_HIGH), + V4L2_MPEG_VIDEO_H264_PROFILE_HIGH, + V4L2_CID_MPEG_VIDEO_H264_PROFILE, + HFI_PROP_PROFILE, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {0}, + {ENTROPY_MODE}, + NULL, msm_vidc_set_u32_enum}, + + {PROFILE, ENC|DEC, HEVC|HEIC, + V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN, + V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE, + BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN) | + BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE) | + BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10) | + BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE), + V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN, + V4L2_CID_MPEG_VIDEO_HEVC_PROFILE, + HFI_PROP_PROFILE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {PIX_FMTS}, + {0}, + msm_vidc_adjust_profile, msm_vidc_set_u32_enum}, + + {PROFILE, DEC, VP9, + V4L2_MPEG_VIDEO_VP9_PROFILE_0, + V4L2_MPEG_VIDEO_VP9_PROFILE_2, + BIT(V4L2_MPEG_VIDEO_VP9_PROFILE_0) | + BIT(V4L2_MPEG_VIDEO_VP9_PROFILE_2), + V4L2_MPEG_VIDEO_VP9_PROFILE_0, + V4L2_CID_MPEG_VIDEO_VP9_PROFILE, + HFI_PROP_PROFILE, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {0}, + {0}, + NULL, msm_vidc_set_u32_enum}, + + {LEVEL, DEC, H264, + V4L2_MPEG_VIDEO_H264_LEVEL_1_0, + V4L2_MPEG_VIDEO_H264_LEVEL_5_0, + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1B) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_3) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_2), + V4L2_MPEG_VIDEO_H264_LEVEL_4_0, + V4L2_CID_MPEG_VIDEO_H264_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {0}, + {0}, + NULL, msm_vidc_set_u32_enum}, + + {LEVEL, ENC, H264, + V4L2_MPEG_VIDEO_H264_LEVEL_1_0, + V4L2_MPEG_VIDEO_H264_LEVEL_5_0, + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1B) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_3) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_2), + V4L2_MPEG_VIDEO_H264_LEVEL_4_0, + V4L2_CID_MPEG_VIDEO_H264_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {0}, + {0}, + NULL, msm_vidc_set_u32_enum}, + + {LEVEL, DEC, HEVC|HEIC, + V4L2_MPEG_VIDEO_HEVC_LEVEL_1, + V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1, + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4), + V4L2_MPEG_VIDEO_HEVC_LEVEL_4, + V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {0}, + {0}, + NULL, msm_vidc_set_u32_enum}, + + {LEVEL, ENC, HEVC|HEIC, + V4L2_MPEG_VIDEO_HEVC_LEVEL_1, + V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1, + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4), + V4L2_MPEG_VIDEO_HEVC_LEVEL_4, + V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {0}, + {0}, + NULL, msm_vidc_set_u32_enum}, + + + /* TODO: Bring the VP9 Level upstream GKI change, and level cap here: + * go/videogki + */ + + {HEVC_TIER, ENC|DEC, HEVC, + V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, + V4L2_MPEG_VIDEO_HEVC_TIER_HIGH, + BIT(V4L2_MPEG_VIDEO_HEVC_TIER_MAIN) | + BIT(V4L2_MPEG_VIDEO_HEVC_TIER_HIGH), + V4L2_MPEG_VIDEO_HEVC_TIER_HIGH, + V4L2_CID_MPEG_VIDEO_HEVC_TIER, + HFI_PROP_TIER, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {0}, + {0}, + NULL, msm_vidc_set_u32_enum}, + + {LF_MODE, ENC, H264, + V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED, + DB_H264_DISABLE_SLICE_BOUNDARY, + BIT(V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED) | + BIT(V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_DISABLED) | + BIT(DB_H264_DISABLE_SLICE_BOUNDARY), + V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED, + V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_MODE, + HFI_PROP_DEBLOCKING_MODE, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {0}, {0}, + NULL, msm_vidc_set_deblock_mode}, + + {LF_MODE, ENC, HEVC|HEIC, + V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_DISABLED, + DB_HEVC_DISABLE_SLICE_BOUNDARY, + BIT(V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_DISABLED) | + BIT(V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_ENABLED) | + BIT(DB_HEVC_DISABLE_SLICE_BOUNDARY), + V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_ENABLED, + V4L2_CID_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE, + HFI_PROP_DEBLOCKING_MODE, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {0}, {0}, + NULL, msm_vidc_set_deblock_mode}, + + {LF_ALPHA, ENC, H264, + -6, 6, 1, 0, + V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_ALPHA}, + + {LF_ALPHA, ENC, HEVC|HEIC, + -6, 6, 1, 0, + V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2}, + + {LF_BETA, ENC, H264, + -6, 6, 1, 0, + V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_BETA}, + + {LF_BETA, ENC, HEVC|HEIC, + -6, 6, 1, 0, + V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2}, + + {SLICE_MODE, ENC, H264|HEVC|HEIC, + V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, + V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_BYTES, + BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE) | + BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_MB) | + BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_BYTES), + V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, + V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE, + 0, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {BITRATE_MODE}, {0}, + msm_vidc_adjust_slice_count, msm_vidc_set_slice_count}, + + {SLICE_MAX_BYTES, ENC, H264|HEVC|HEIC, + MIN_SLICE_BYTE_SIZE, MAX_SLICE_BYTE_SIZE, + 1, MIN_SLICE_BYTE_SIZE, + V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES, + HFI_PROP_MULTI_SLICE_BYTES_COUNT, + CAP_FLAG_OUTPUT_PORT}, + + {SLICE_MAX_MB, ENC, H264|HEVC|HEIC, + 1, MAX_SLICE_MB_SIZE, 1, 1, + V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB, + HFI_PROP_MULTI_SLICE_MB_COUNT, + CAP_FLAG_OUTPUT_PORT}, + + // TODO: MB level RC - mapping + {MB_RC, ENC, H264|HEVC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_ENABLE, + V4L2_CID_MPEG_VIDEO_MB_RC_ENABLE, + 0, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + + {TRANSFORM_8X8, ENC, H264, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_ENABLE, + V4L2_CID_MPEG_VIDEO_H264_8X8_TRANSFORM, + HFI_PROP_8X8_TRANSFORM, + CAP_FLAG_OUTPUT_PORT, + {PROFILE}, {0}, + msm_vidc_adjust_transform_8x8, msm_vidc_set_u32}, + + {CHROMA_QP_INDEX_OFFSET, ENC, HEVC, + MIN_CHROMA_QP_OFFSET, MAX_CHROMA_QP_OFFSET, + 1, MAX_CHROMA_QP_OFFSET, + V4L2_CID_MPEG_VIDEO_H264_CHROMA_QP_INDEX_OFFSET, + HFI_PROP_CHROMA_QP_OFFSET, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + {0}, {0}, + NULL, msm_vidc_set_chroma_qp_index_offset}, + + {DISPLAY_DELAY_ENABLE, DEC, H264|HEVC|VP9, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY_ENABLE, + HFI_PROP_DECODE_ORDER_OUTPUT, + CAP_FLAG_ROOT | CAP_FLAG_INPUT_PORT}, + + {DISPLAY_DELAY, DEC, H264|HEVC|VP9, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY, + HFI_PROP_DECODE_ORDER_OUTPUT, + CAP_FLAG_ROOT | CAP_FLAG_INPUT_PORT}, + + /* conceal color */ + {CONCEAL_COLOR_8BIT, DEC, CODECS_ALL, 0x0, 0xff3fcff, 1, + DEFAULT_VIDEO_CONCEAL_COLOR_BLACK, + V4L2_CID_MPEG_VIDEO_MUTE_YUV, + HFI_PROP_CONCEAL_COLOR_8BIT, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + + {CONCEAL_COLOR_10BIT, DEC, CODECS_ALL, 0x0, 0x3fffffff, 1, + DEFAULT_VIDEO_CONCEAL_COLOR_BLACK, + V4L2_CID_MPEG_VIDEO_MUTE_YUV, + HFI_PROP_CONCEAL_COLOR_10BIT, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + + // TODO + {STAGE, DEC|ENC, CODECS_ALL, + MSM_VIDC_STAGE_1, + MSM_VIDC_STAGE_2, 1, + MSM_VIDC_STAGE_2, + 0, + HFI_PROP_STAGE, + CAP_FLAG_ROOT, + {0}, {0}, + NULL, msm_vidc_set_stage}, + + {STAGE, ENC, H264 | HEVC, + MSM_VIDC_STAGE_1, + MSM_VIDC_STAGE_2, 1, + MSM_VIDC_STAGE_2, + 0, + HFI_PROP_STAGE, + CAP_FLAG_NONE, + {LOWLATENCY_MODE}, {0}, + NULL, msm_vidc_set_stage}, + + {PIPE, DEC|ENC, CODECS_ALL, + MSM_VIDC_PIPE_1, + MSM_VIDC_PIPE_2, 1, + MSM_VIDC_PIPE_2, + 0, + HFI_PROP_PIPE, + CAP_FLAG_ROOT, + {0}, {0}, + NULL, msm_vidc_set_pipe}, + {POC, DEC, H264, 0, 18, 1, 1}, + {QUALITY_MODE, ENC, CODECS_ALL, + MSM_VIDC_MAX_QUALITY_MODE, + MSM_VIDC_POWER_SAVE_MODE, 1, + MSM_VIDC_POWER_SAVE_MODE}, + + {CODED_FRAMES, DEC, H264|HEVC|HEIC, + CODED_FRAMES_PROGRESSIVE, CODED_FRAMES_INTERLACE, + 1, CODED_FRAMES_PROGRESSIVE, + 0, + HFI_PROP_CODED_FRAMES}, + + {BIT_DEPTH, DEC, CODECS_ALL, BIT_DEPTH_8, BIT_DEPTH_10, 1, BIT_DEPTH_8, + 0, + HFI_PROP_LUMA_CHROMA_BIT_DEPTH}, + + {CODEC_CONFIG, DEC, H264|HEVC|HEIC, 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_CODEC_CONFIG, 0, + CAP_FLAG_DYNAMIC_ALLOWED}, + + {BITSTREAM_SIZE_OVERWRITE, DEC, CODECS_ALL, 0, INT_MAX, 1, 0, + V4L2_CID_MPEG_VIDC_MIN_BITSTREAM_SIZE_OVERWRITE}, + + {THUMBNAIL_MODE, DEC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_THUMBNAIL_MODE, + HFI_PROP_THUMBNAIL_MODE}, + + {DEFAULT_HEADER, DEC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, + HFI_PROP_DEC_DEFAULT_HEADER}, + + {RAP_FRAME, DEC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_ENABLE, + 0, + HFI_PROP_DEC_START_FROM_RAP_FRAME, + CAP_FLAG_INPUT_PORT, + {0}, {0}, + NULL, NULL}, + + {SEQ_CHANGE_AT_SYNC_FRAME, DEC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_ENABLE, + 0, + HFI_PROP_SEQ_CHANGE_AT_SYNC_FRAME, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {PRIORITY, DEC|ENC, CODECS_ALL, + 0, 2, 1, 1, + V4L2_CID_MPEG_VIDC_PRIORITY, + HFI_PROP_SESSION_PRIORITY, + CAP_FLAG_ROOT | CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + msm_vidc_adjust_session_priority, msm_vidc_set_session_priority}, + + {ENC_IP_CR, ENC, CODECS_ALL, + 0, S32_MAX, 1, 0, + V4L2_CID_MPEG_VIDC_ENC_INPUT_COMPRESSION_RATIO, + 0, CAP_FLAG_DYNAMIC_ALLOWED}, + + {DPB_LIST, DEC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, + HFI_PROP_DPB_LIST, + CAP_FLAG_OUTPUT_PORT, + {0}, {0}, + NULL, NULL}, + + {META_LTR_MARK_USE, ENC, H264|HEVC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_LTR_MARK_USE_DETAILS, + HFI_PROP_LTR_MARK_USE_DETAILS}, + + {META_SEQ_HDR_NAL, ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_SEQ_HEADER_NAL, + HFI_PROP_METADATA_SEQ_HEADER_NAL}, + + {META_DPB_MISR, DEC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_DPB_LUMA_CHROMA_MISR, + HFI_PROP_DPB_LUMA_CHROMA_MISR}, + + {META_OPB_MISR, DEC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_OPB_LUMA_CHROMA_MISR, + HFI_PROP_OPB_LUMA_CHROMA_MISR}, + + {META_INTERLACE, DEC, H264, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_INTERLACE, + HFI_PROP_INTERLACE_INFO}, + + {META_TIMESTAMP, DEC | ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_TIMESTAMP, + HFI_PROP_TIMESTAMP}, + + {META_CONCEALED_MB_CNT, DEC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_CONCEALED_MB_COUNT, + HFI_PROP_CONEALED_MB_COUNT}, + + {META_HIST_INFO, DEC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_HISTOGRAM_INFO, + HFI_PROP_HISTOGRAM_INFO}, + + {META_SEI_MASTERING_DISP, DEC|ENC, HEVC|HEIC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_SEI_MASTERING_DISPLAY_COLOUR, + HFI_PROP_SEI_MASTERING_DISPLAY_COLOUR}, + + {META_SEI_CLL, DEC|ENC, HEVC|HEIC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_SEI_CONTENT_LIGHT_LEVEL, + HFI_PROP_SEI_CONTENT_LIGHT_LEVEL}, + + {META_HDR10PLUS, DEC | ENC, HEVC|HEIC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_HDR10PLUS, + HFI_PROP_SEI_HDR10PLUS_USERDATA}, + + {META_EVA_STATS, ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_EVA_STATS, + HFI_PROP_EVA_STAT_INFO, + CAP_FLAG_ROOT, + {0}, + {ENH_LAYER_COUNT}}, + + {META_BUF_TAG, DEC | ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_BUFFER_TAG, + HFI_PROP_BUFFER_TAG}, + + {META_DPB_TAG_LIST, DEC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_DPB_TAG_LIST, + HFI_PROP_DPB_TAG_LIST}, + + {META_OUTPUT_BUF_TAG, DEC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, + HFI_PROP_BUFFER_TAG}, + + {META_SUBFRAME_OUTPUT, DEC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_SUBFRAME_OUTPUT, + HFI_PROP_SUBFRAME_OUTPUT}, + + {META_ENC_QP_METADATA, ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_ENC_QP_METADATA, + HFI_PROP_ENC_QP_METADATA}, + + {META_ROI_INFO, ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_ROI_INFO, + HFI_PROP_ROI_INFO, + CAP_FLAG_INPUT_PORT, + {BITRATE_MODE, PIX_FMTS}, + {0}, + msm_vidc_adjust_roi_info, NULL}, + + {META_ROI_INFO, ENC, H264|HEVC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_ROI_INFO, + HFI_PROP_ROI_INFO, + CAP_FLAG_INPUT_PORT, + {BITRATE_MODE, PIX_FMTS}, + {MIN_QUALITY}, + msm_vidc_adjust_roi_info, NULL}, + + {META_DEC_QP_METADATA, DEC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_DEC_QP_METADATA, + HFI_PROP_DEC_QP_METADATA}, + + /* configure image properties */ + /* TODO (AM): review requied for image properties */ + {FRAME_WIDTH, ENC, HEIC, 512, 16384, 1, 16384}, + {FRAME_HEIGHT, ENC, HEIC, 512, 16384, 1, 16384}, + + {MIN_BUFFERS_INPUT, ENC|DEC, HEIC, 0, 64, 1, 1, + V4L2_CID_MIN_BUFFERS_FOR_OUTPUT}, + {MBPF, DEC, HEIC, 36, 34816, 1, 8160 }, /* ((8192x8192)/256) */ + {MBPF, ENC, HEIC, 36, 34816, 1, 8160}, /* ((16384x16384)/256) */ + {MBPS, DEC, HEIC, 64, 1958400, 1, 489600 }, /* ((8192x8192)/256)@1fps */ + {MBPS, ENC, HEIC, 64, 1958400, 1, 489600}, /* ((16384x16384)/256)@1fps */ + {BITRATE_MODE, ENC, HEIC, + V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, + V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CQ), + V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, + V4L2_CID_MPEG_VIDEO_BITRATE_MODE, + HFI_PROP_RATE_CONTROL, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {0}, + {TIME_DELTA_BASED_RC, CONSTANT_QUALITY}, + msm_vidc_adjust_bitrate_mode, msm_vidc_set_u32_enum}, + {TIME_DELTA_BASED_RC, ENC, HEIC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_TIME_DELTA_BASED_RC, + HFI_PROP_TIME_DELTA_BASED_RATE_CONTROL, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + {BITRATE_MODE}, {0}, + msm_vidc_adjust_delta_based_rc, msm_vidc_set_u32}, + {CONSTANT_QUALITY, ENC, HEIC, + 1, MAX_CONSTANT_QUALITY, 1, 100, + V4L2_CID_MPEG_VIDEO_CONSTANT_QUALITY, + HFI_PROP_CONSTANT_QUALITY, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {BITRATE_MODE}, {0}, + NULL, msm_vidc_set_constant_quality}, + {GRID, ENC, HEIC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_ENABLE, + 0, + HFI_PROP_HEIC_GRID_ENABLE, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + {0}, {0}, + NULL, msm_vidc_set_u32}, + {GOP_SIZE, ENC, HEIC, + 0, INT_MAX, 1, 0 /* all intra */, + V4L2_CID_MPEG_VIDEO_GOP_SIZE, + HFI_PROP_MAX_GOP_FRAMES, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + NULL, msm_vidc_set_u32}, + {B_FRAME, ENC, HEIC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDEO_B_FRAMES, + HFI_PROP_MAX_B_FRAMES, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + {0}, {0}, + NULL, msm_vidc_set_u32}, + {PIX_FMTS, ENC, HEIC, + MSM_VIDC_FMT_NV12, + MSM_VIDC_FMT_P010, + MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_P010, + MSM_VIDC_FMT_NV12, + 0, 0, + CAP_FLAG_ROOT, + {0}, + {PROFILE}}, + {HEVC_TIER, ENC|DEC, HEIC, + V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, + V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, + BIT(V4L2_MPEG_VIDEO_HEVC_TIER_MAIN), + V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, + V4L2_CID_MPEG_VIDEO_HEVC_TIER, + HFI_PROP_TIER, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {0}, + {0}, + NULL, msm_vidc_set_u32_enum}, + {FRAME_RATE, ENC, HEIC, + (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), + 1, (MINIMUM_FPS << 16), + 0, + HFI_PROP_FRAME_RATE, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + {0}, {0}, + NULL, msm_vidc_set_q16}, + {META_SUBFRAME_OUTPUT, ENC, HEIC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_SUBFRAME_OUTPUT, + HFI_PROP_SUBFRAME_OUTPUT}, + {COMPLEXITY, ENC, H264 | HEVC, + 0, 100, + 1, 100, + V4L2_CID_MPEG_VIDC_VENC_COMPLEXITY}, +}; + +/* + * Custom conversion coefficients for resolution: 176x144 negative + * coeffs are converted to s4.9 format + * (e.g. -22 converted to ((1 << 13) - 22) + * 3x3 transformation matrix coefficients in s4.9 fixed point format + */ +static u32 vpe_csc_custom_matrix_coeff[MAX_MATRIX_COEFFS] = { + 440, 8140, 8098, 0, 460, 52, 0, 34, 463 +}; + +/* offset coefficients in s9 fixed point format */ +static u32 vpe_csc_custom_bias_coeff[MAX_BIAS_COEFFS] = { + 53, 0, 4 +}; + +/* clamping value for Y/U/V([min,max] for Y/U/V) */ +static u32 vpe_csc_custom_limit_coeff[MAX_LIMIT_COEFFS] = { + 16, 235, 16, 240, 16, 240 +}; + +/* Default UBWC config for LPDDR5 */ +static struct msm_vidc_ubwc_config_data ubwc_config_diwali[] = { + UBWC_CONFIG(8, 32, 15, 0, 1, 1, 1), +}; + +/* Default bus bandwidth for non_real time session based on priority */ +static u32 bus_bw_nrt[] = { + 15000000, + 11000000, +}; + +static struct msm_vidc_platform_data diwali_data = { + .core_data = core_data_diwali, + .core_data_size = ARRAY_SIZE(core_data_diwali), + .instance_data = instance_data_diwali, + .instance_data_size = ARRAY_SIZE(instance_data_diwali), + .csc_data.vpe_csc_custom_bias_coeff = vpe_csc_custom_bias_coeff, + .csc_data.vpe_csc_custom_matrix_coeff = vpe_csc_custom_matrix_coeff, + .csc_data.vpe_csc_custom_limit_coeff = vpe_csc_custom_limit_coeff, + .ubwc_config = ubwc_config_diwali, + .bus_bw_nrt = bus_bw_nrt, +}; + +static int msm_vidc_init_data(struct msm_vidc_core *core) +{ + int rc = 0; + + if (!core || !core->platform) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + d_vpr_h("%s: initialize diwali data\n", __func__); + + core->platform->data = diwali_data; + + return rc; +} + +int msm_vidc_init_platform_diwali(struct msm_vidc_core *core, struct device *dev) +{ + int rc = 0; + + rc = msm_vidc_init_data(core); + if (rc) + return rc; + + return 0; +} + +int msm_vidc_deinit_platform_diwali(struct msm_vidc_core *core, struct device *dev) +{ + /* do nothing */ + return 0; +} diff --git a/driver/vidc/src/msm_vidc_platform.c b/driver/vidc/src/msm_vidc_platform.c index c18f2c4b96..c2a1055bb1 100644 --- a/driver/vidc/src/msm_vidc_platform.c +++ b/driver/vidc/src/msm_vidc_platform.c @@ -9,8 +9,15 @@ #include "msm_vidc_v4l2.h" #include "msm_vidc_vb2.h" #include "msm_vidc_control.h" +#if defined(CONFIG_MSM_VIDC_WAIPIO) #include "msm_vidc_waipio.h" +#endif +#if defined(CONFIG_MSM_VIDC_DIWALI) +#include "msm_vidc_diwali.h" +#endif +#if defined(CONFIG_MSM_VIDC_IRIS2) #include "msm_vidc_iris2.h" +#endif static struct v4l2_file_operations msm_v4l2_file_operations = { .owner = THIS_MODULE, @@ -137,7 +144,7 @@ static int msm_vidc_init_ops(struct msm_vidc_core *core) static int msm_vidc_deinit_platform_variant(struct msm_vidc_core *core, struct device *dev) { - int rc = 0; + int rc = -EINVAL; if (!core || !dev) { d_vpr_e("%s: Invalid params\n", __func__); @@ -146,22 +153,30 @@ static int msm_vidc_deinit_platform_variant(struct msm_vidc_core *core, struct d d_vpr_h("%s()\n", __func__); +#if defined(CONFIG_MSM_VIDC_WAIPIO) if (of_device_is_compatible(dev->of_node, "qcom,msm-vidc-waipio")) { rc = msm_vidc_deinit_platform_waipio(core, dev); - } else { - d_vpr_e("%s(): unknown platform\n", __func__); - rc = -EINVAL; + if (rc) + d_vpr_e("%s: failed with %d\n", __func__, rc); + goto end_target_config; } +#endif +#if defined(CONFIG_MSM_VIDC_DIWALI) + if (of_device_is_compatible(dev->of_node, "qcom,msm-vidc-diwali")) { + rc = msm_vidc_deinit_platform_diwali(core, dev); + if (rc) + d_vpr_e("%s: failed with %d\n", __func__, rc); + goto end_target_config; + } +#endif - if (rc) - d_vpr_e("%s: failed with %d\n", __func__, rc); - +end_target_config: return rc; } static int msm_vidc_init_platform_variant(struct msm_vidc_core *core, struct device *dev) { - int rc = 0; + int rc = -EINVAL; if (!core || !dev) { d_vpr_e("%s: Invalid params\n", __func__); @@ -170,22 +185,30 @@ static int msm_vidc_init_platform_variant(struct msm_vidc_core *core, struct dev d_vpr_h("%s()\n", __func__); +#if defined(CONFIG_MSM_VIDC_WAIPIO) if (of_device_is_compatible(dev->of_node, "qcom,msm-vidc-waipio")) { rc = msm_vidc_init_platform_waipio(core, dev); - } else { - d_vpr_e("%s(): unknown platform\n", __func__); - rc = -EINVAL; + if (rc) + d_vpr_e("%s: failed with %d\n", __func__, rc); + goto end_target_config; } +#endif +#if defined(CONFIG_MSM_VIDC_DIWALI) + if (of_device_is_compatible(dev->of_node, "qcom,msm-vidc-diwali")) { + rc = msm_vidc_init_platform_diwali(core, dev); + if (rc) + d_vpr_e("%s: failed with %d\n", __func__, rc); + goto end_target_config; + } +#endif - if (rc) - d_vpr_e("%s: failed with %d\n", __func__, rc); - +end_target_config: return rc; } static int msm_vidc_deinit_vpu(struct msm_vidc_core *core, struct device *dev) { - int rc = 0; + int rc = -EINVAL; if (!core || !dev) { d_vpr_e("%s: Invalid params\n", __func__); @@ -194,40 +217,32 @@ static int msm_vidc_deinit_vpu(struct msm_vidc_core *core, struct device *dev) d_vpr_h("%s()\n", __func__); +#if defined(CONFIG_MSM_VIDC_IRIS2) if (of_device_is_compatible(dev->of_node, "qcom,msm-vidc-iris2")) { rc = msm_vidc_deinit_iris2(core); - } else { - d_vpr_e("%s(): unknown vpu\n", __func__); - rc = -EINVAL; + if (rc) + d_vpr_e("%s: failed with %d\n", __func__, rc); } - - if (rc) - d_vpr_e("%s: failed with %d\n", __func__, rc); - +#endif return rc; } static int msm_vidc_init_vpu(struct msm_vidc_core *core, struct device *dev) { - int rc = 0; + int rc = -EINVAL; if (!core || !dev) { d_vpr_e("%s: Invalid params\n", __func__); return -EINVAL; } - d_vpr_h("%s()\n", __func__); - +#if defined(CONFIG_MSM_VIDC_IRIS2) if (of_device_is_compatible(dev->of_node, "qcom,msm-vidc-iris2")) { rc = msm_vidc_init_iris2(core); - } else { - d_vpr_e("%s(): unknown vpu\n", __func__); - rc = -EINVAL; + if (rc) + d_vpr_e("%s: failed with %d\n", __func__, rc); } - - if (rc) - d_vpr_e("%s: failed with %d\n", __func__, rc); - +#endif return rc; } From e710c6f97430f527030db20450129b85f72b5fb1 Mon Sep 17 00:00:00 2001 From: Priyanka Gujjula Date: Tue, 26 Oct 2021 11:29:00 +0530 Subject: [PATCH 0455/1061] video: driver: diwali: Configure hbb value Configure hbb value as '14' for lp4 ddr variant. Change-Id: Id3fa3028f38dabb81d1b1fc5b117c6d10e4d45b5 Signed-off-by: Priyanka Gujjula --- driver/platform/diwali/src/msm_vidc_diwali.c | 28 ++++++++++++++++++++ driver/vidc/src/msm_vidc_platform.c | 18 ++++++++----- 2 files changed, 40 insertions(+), 6 deletions(-) diff --git a/driver/platform/diwali/src/msm_vidc_diwali.c b/driver/platform/diwali/src/msm_vidc_diwali.c index be9e9a6737..ee7bb83a3e 100644 --- a/driver/platform/diwali/src/msm_vidc_diwali.c +++ b/driver/platform/diwali/src/msm_vidc_diwali.c @@ -45,6 +45,11 @@ .bank_spreading = bsp, \ } +#define DDR_TYPE_LPDDR4 0x6 +#define DDR_TYPE_LPDDR4X 0x7 +#define DDR_TYPE_LPDDR5 0x8 +#define DDR_TYPE_LPDDR5X 0x9 + #define ENC MSM_VIDC_ENCODER #define DEC MSM_VIDC_DECODER #define H264 MSM_VIDC_H264 @@ -1639,6 +1644,26 @@ static struct msm_vidc_platform_data diwali_data = { .bus_bw_nrt = bus_bw_nrt, }; +static void msm_vidc_ddr_ubwc_config( + struct msm_vidc_platform_data *platform_data, u32 hbb_override_val) +{ + uint32_t ddr_type = DDR_TYPE_LPDDR5; + + ddr_type = of_fdt_get_ddrtype(); + if (ddr_type == -ENOENT) { + d_vpr_e("Failed to get ddr type, use LPDDR5\n"); + } + + if (platform_data->ubwc_config && + (ddr_type == DDR_TYPE_LPDDR4 || + ddr_type == DDR_TYPE_LPDDR4X)) + platform_data->ubwc_config->highest_bank_bit = hbb_override_val; + + d_vpr_h("DDR Type 0x%x hbb 0x%x\n", + ddr_type, platform_data->ubwc_config ? + platform_data->ubwc_config->highest_bank_bit : -1); +} + static int msm_vidc_init_data(struct msm_vidc_core *core) { int rc = 0; @@ -1651,6 +1676,9 @@ static int msm_vidc_init_data(struct msm_vidc_core *core) core->platform->data = diwali_data; + /* Check for DDR variant */ + msm_vidc_ddr_ubwc_config(&core->platform->data, 0xe); + return rc; } diff --git a/driver/vidc/src/msm_vidc_platform.c b/driver/vidc/src/msm_vidc_platform.c index c2a1055bb1..d976f75550 100644 --- a/driver/vidc/src/msm_vidc_platform.c +++ b/driver/vidc/src/msm_vidc_platform.c @@ -157,7 +157,8 @@ static int msm_vidc_deinit_platform_variant(struct msm_vidc_core *core, struct d if (of_device_is_compatible(dev->of_node, "qcom,msm-vidc-waipio")) { rc = msm_vidc_deinit_platform_waipio(core, dev); if (rc) - d_vpr_e("%s: failed with %d\n", __func__, rc); + d_vpr_e("%s: failed msm-vidc-waipio with %d\n", + __func__, rc); goto end_target_config; } #endif @@ -165,7 +166,8 @@ static int msm_vidc_deinit_platform_variant(struct msm_vidc_core *core, struct d if (of_device_is_compatible(dev->of_node, "qcom,msm-vidc-diwali")) { rc = msm_vidc_deinit_platform_diwali(core, dev); if (rc) - d_vpr_e("%s: failed with %d\n", __func__, rc); + d_vpr_e("%s: failed msm-vidc-diwali with %d\n", + __func__, rc); goto end_target_config; } #endif @@ -189,7 +191,8 @@ static int msm_vidc_init_platform_variant(struct msm_vidc_core *core, struct dev if (of_device_is_compatible(dev->of_node, "qcom,msm-vidc-waipio")) { rc = msm_vidc_init_platform_waipio(core, dev); if (rc) - d_vpr_e("%s: failed with %d\n", __func__, rc); + d_vpr_e("%s: failed msm-vidc-waipio with %d\n", + __func__, rc); goto end_target_config; } #endif @@ -197,7 +200,8 @@ static int msm_vidc_init_platform_variant(struct msm_vidc_core *core, struct dev if (of_device_is_compatible(dev->of_node, "qcom,msm-vidc-diwali")) { rc = msm_vidc_init_platform_diwali(core, dev); if (rc) - d_vpr_e("%s: failed with %d\n", __func__, rc); + d_vpr_e("%s: failed msm-vidc-diwali with %d\n", + __func__, rc); goto end_target_config; } #endif @@ -221,7 +225,8 @@ static int msm_vidc_deinit_vpu(struct msm_vidc_core *core, struct device *dev) if (of_device_is_compatible(dev->of_node, "qcom,msm-vidc-iris2")) { rc = msm_vidc_deinit_iris2(core); if (rc) - d_vpr_e("%s: failed with %d\n", __func__, rc); + d_vpr_e("%s: failed msm-vidc-iris2 with %d\n", + __func__, rc); } #endif return rc; @@ -240,7 +245,8 @@ static int msm_vidc_init_vpu(struct msm_vidc_core *core, struct device *dev) if (of_device_is_compatible(dev->of_node, "qcom,msm-vidc-iris2")) { rc = msm_vidc_init_iris2(core); if (rc) - d_vpr_e("%s: failed with %d\n", __func__, rc); + d_vpr_e("%s: failed msm-vidc-iris2 with %d\n", + __func__, rc); } #endif return rc; From f352311f44e05e85646668cf33703daad0a5e9c2 Mon Sep 17 00:00:00 2001 From: Priyanka Gujjula Date: Fri, 29 Oct 2021 21:39:41 +0530 Subject: [PATCH 0456/1061] video: driver: Add diwali SKU's Add support for diwali AA/AB(v1) & AC(v2) SKU. Change-Id: I8afdf0529016e9cdbe72da8e57d7f35194cf9026 Signed-off-by: Priyanka Gujjula --- driver/platform/diwali/src/msm_vidc_diwali.c | 118 ++++++++++++++++++- driver/vidc/inc/msm_vidc_dt.h | 1 - driver/vidc/inc/msm_vidc_platform.h | 5 +- driver/vidc/src/msm_vidc_dt.c | 20 ---- 4 files changed, 116 insertions(+), 28 deletions(-) diff --git a/driver/platform/diwali/src/msm_vidc_diwali.c b/driver/platform/diwali/src/msm_vidc_diwali.c index ee7bb83a3e..0304bedb48 100644 --- a/driver/platform/diwali/src/msm_vidc_diwali.c +++ b/driver/platform/diwali/src/msm_vidc_diwali.c @@ -5,6 +5,7 @@ */ #include +#include #include "msm_vidc_diwali.h" #include "msm_vidc_platform.h" @@ -45,6 +46,15 @@ .bank_spreading = bsp, \ } +#define EFUSE_ENTRY(sa, s, m, sh, p) \ +{ \ + .start_address = sa, \ + .size = s, \ + .mask = m, \ + .shift = sh, \ + .purpose = p \ +} + #define DDR_TYPE_LPDDR4 0x6 #define DDR_TYPE_LPDDR4X 0x7 #define DDR_TYPE_LPDDR5 0x8 @@ -58,7 +68,7 @@ #define HEIC MSM_VIDC_HEIC #define CODECS_ALL (H264 | HEVC | VP9 | HEIC) -static struct msm_platform_core_capability core_data_diwali[] = { +static struct msm_platform_core_capability core_data_diwali_v0[] = { /* {type, value} */ {ENC_CODECS, H264|HEVC|HEIC}, {DEC_CODECS, H264|HEVC|VP9|HEIC}, @@ -108,7 +118,13 @@ static struct msm_platform_core_capability core_data_diwali[] = { {ENC_AUTO_FRAMERATE, 1}, }; -static struct msm_platform_inst_capability instance_data_diwali[] = { +static struct msm_platform_core_capability core_data_diwali_v1[] = { +}; + +static struct msm_platform_core_capability core_data_diwali_v2[] = { +}; + +static struct msm_platform_inst_capability instance_data_diwali_v0[] = { /* {cap, domain, codec, * min, max, step_or_mask, value, * v4l2_id, @@ -1601,6 +1617,12 @@ static struct msm_platform_inst_capability instance_data_diwali[] = { V4L2_CID_MPEG_VIDC_VENC_COMPLEXITY}, }; +static struct msm_platform_inst_capability instance_data_diwali_v1[] = { +}; + +static struct msm_platform_inst_capability instance_data_diwali_v2[] = { +}; + /* * Custom conversion coefficients for resolution: 176x144 negative * coeffs are converted to s4.9 format @@ -1632,18 +1654,77 @@ static u32 bus_bw_nrt[] = { 11000000, }; +static struct msm_vidc_efuse_data efuse_data_diwali[] = { + /* IRIS_4K60_FMAX_LIMIT_EFUSE - max 4K@60 */ + EFUSE_ENTRY(0x221C0274, 4, 0x8000000000, 0x27, SKU_VERSION), + /* IRIS_MULTIPIPE_DISABLE - max 4K@30 */ + EFUSE_ENTRY(0x221C0270, 4, 0x0000000080, 0x06, SKU_VERSION), +}; + static struct msm_vidc_platform_data diwali_data = { - .core_data = core_data_diwali, - .core_data_size = ARRAY_SIZE(core_data_diwali), - .instance_data = instance_data_diwali, - .instance_data_size = ARRAY_SIZE(instance_data_diwali), + .core_data = core_data_diwali_v0, + .core_data_size = ARRAY_SIZE(core_data_diwali_v0), + .instance_data = instance_data_diwali_v0, + .instance_data_size = ARRAY_SIZE(instance_data_diwali_v0), .csc_data.vpe_csc_custom_bias_coeff = vpe_csc_custom_bias_coeff, .csc_data.vpe_csc_custom_matrix_coeff = vpe_csc_custom_matrix_coeff, .csc_data.vpe_csc_custom_limit_coeff = vpe_csc_custom_limit_coeff, .ubwc_config = ubwc_config_diwali, .bus_bw_nrt = bus_bw_nrt, + .efuse_data = efuse_data_diwali, + .efuse_data_size = ARRAY_SIZE(efuse_data_diwali), + .sku_version = 0, }; +static int msm_vidc_read_efuse(struct msm_vidc_core *core) +{ + int rc = 0; + void __iomem *base; + u32 i = 0, efuse = 0, efuse_data_count = 0; + struct msm_vidc_efuse_data *efuse_data = NULL; + struct msm_vidc_platform_data *platform_data; + + if (!core || !core->platform || !core->pdev) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + platform_data = &core->platform->data; + efuse_data = platform_data->efuse_data; + efuse_data_count = platform_data->efuse_data_size; + + if (!efuse_data) + return 0; + + for (i = 0; i < efuse_data_count; i++) { + switch ((efuse_data[i]).purpose) { + case SKU_VERSION: + base = devm_ioremap(&core->pdev->dev, (efuse_data[i]).start_address, + (efuse_data[i]).size); + if (!base) { + d_vpr_e("failed efuse: start %#x, size %d\n", + (efuse_data[i]).start_address, + (efuse_data[i]).size); + return -EINVAL; + } else { + efuse = readl_relaxed(base); + platform_data->sku_version = + (efuse & (efuse_data[i]).mask) >> + (efuse_data[i]).shift; + } + break; + default: + break; + } + if (platform_data->sku_version) { + d_vpr_h("efuse 0x%x, platform version 0x%x\n", + efuse, platform_data->sku_version); + break; + } + } + return rc; +} + static void msm_vidc_ddr_ubwc_config( struct msm_vidc_platform_data *platform_data, u32 hbb_override_val) { @@ -1667,6 +1748,7 @@ static void msm_vidc_ddr_ubwc_config( static int msm_vidc_init_data(struct msm_vidc_core *core) { int rc = 0; + struct msm_vidc_platform_data *platform_data = NULL; if (!core || !core->platform) { d_vpr_e("%s: invalid params\n", __func__); @@ -1675,6 +1757,30 @@ static int msm_vidc_init_data(struct msm_vidc_core *core) d_vpr_h("%s: initialize diwali data\n", __func__); core->platform->data = diwali_data; + platform_data = &core->platform->data; + + /* Check for sku version */ + rc = msm_vidc_read_efuse(core); + if (rc) { + d_vpr_e("%s: Failed to read efuse\n", __func__); + return rc; + } + + if (platform_data->sku_version == SKU_VERSION_1) { + platform_data->core_data = core_data_diwali_v1; + platform_data->core_data_size = + ARRAY_SIZE(core_data_diwali_v1); + platform_data->instance_data = instance_data_diwali_v1; + platform_data->instance_data_size = + ARRAY_SIZE(instance_data_diwali_v1); + } else if (platform_data->sku_version == SKU_VERSION_2) { + platform_data->core_data = core_data_diwali_v2; + platform_data->core_data_size = + ARRAY_SIZE(core_data_diwali_v2); + platform_data->instance_data = instance_data_diwali_v2; + platform_data->instance_data_size = + ARRAY_SIZE(instance_data_diwali_v2); + } /* Check for DDR variant */ msm_vidc_ddr_ubwc_config(&core->platform->data, 0xe); diff --git a/driver/vidc/inc/msm_vidc_dt.h b/driver/vidc/inc/msm_vidc_dt.h index c646fe8932..6f6c70b195 100644 --- a/driver/vidc/inc/msm_vidc_dt.h +++ b/driver/vidc/inc/msm_vidc_dt.h @@ -203,7 +203,6 @@ struct msm_vidc_dt { phys_addr_t register_base; u32 register_size; u32 irq; - u32 sku_version; struct allowed_clock_rates_table *allowed_clks_tbl; u32 allowed_clks_tbl_size; struct clock_freq_table clock_freq_tbl; diff --git a/driver/vidc/inc/msm_vidc_platform.h b/driver/vidc/inc/msm_vidc_platform.h index 28bf5e11cb..d2d3b7bd76 100644 --- a/driver/vidc/inc/msm_vidc_platform.h +++ b/driver/vidc/inc/msm_vidc_platform.h @@ -44,7 +44,7 @@ struct msm_vidc_csc_coeff { struct msm_vidc_efuse_data { u32 start_address; u32 size; - u32 mask; + unsigned long mask; u32 shift; enum efuse_purpose purpose; }; @@ -69,6 +69,9 @@ struct msm_vidc_platform_data { struct msm_vidc_csc_coeff csc_data; struct msm_vidc_ubwc_config_data *ubwc_config; u32 *bus_bw_nrt; + struct msm_vidc_efuse_data *efuse_data; + unsigned int efuse_data_size; + unsigned int sku_version; }; struct msm_vidc_platform { diff --git a/driver/vidc/src/msm_vidc_dt.c b/driver/vidc/src/msm_vidc_dt.c index fe615a44d8..f6c55b5ee0 100644 --- a/driver/vidc/src/msm_vidc_dt.c +++ b/driver/vidc/src/msm_vidc_dt.c @@ -671,22 +671,6 @@ static int msm_vidc_load_reset_table(struct msm_vidc_core *core) return 0; } -static int msm_decide_dt_node(struct msm_vidc_core *core) -{ - int rc = 0; - struct platform_device *pdev = core->pdev; - u32 sku_index = 0; - - rc = of_property_read_u32(pdev->dev.of_node, "sku-index", - &sku_index); - if (rc) { - d_vpr_h("'sku_index' not found in node\n"); - return 0; - } - - return 0; -} - static int msm_vidc_read_resources_from_dt(struct platform_device *pdev) { int rc = 0; @@ -707,10 +691,6 @@ static int msm_vidc_read_resources_from_dt(struct platform_device *pdev) } dt = core->dt; - rc = msm_decide_dt_node(core); - if (rc) - return rc; - INIT_LIST_HEAD(&dt->context_banks); kres = platform_get_resource(pdev, IORESOURCE_MEM, 0); From 043ab4c9f72ef8a3077333dfd485b3ed5e9875ce Mon Sep 17 00:00:00 2001 From: Priyanka Gujjula Date: Fri, 29 Oct 2021 22:21:04 +0530 Subject: [PATCH 0457/1061] video: driver: diwali: Add SKU clock data Add clock corners for diwali v1 and v2 variants. Change-Id: I1322dada7dafed10cb17b9ab4bcef45f102d371c Signed-off-by: Priyanka Gujjula --- driver/platform/diwali/src/msm_vidc_diwali.c | 27 ++++++++++++++++++-- driver/vidc/inc/msm_vidc_platform.h | 2 -- 2 files changed, 25 insertions(+), 4 deletions(-) diff --git a/driver/platform/diwali/src/msm_vidc_diwali.c b/driver/platform/diwali/src/msm_vidc_diwali.c index 0304bedb48..7344b472fa 100644 --- a/driver/platform/diwali/src/msm_vidc_diwali.c +++ b/driver/platform/diwali/src/msm_vidc_diwali.c @@ -14,6 +14,7 @@ #include "msm_vidc_core.h" #include "msm_vidc_control.h" #include "hfi_property.h" +#include "msm_vidc_dt.h" #define DEFAULT_VIDEO_CONCEAL_COLOR_BLACK 0x8020010 #define MINIMUM_FPS 1 @@ -1623,6 +1624,14 @@ static struct msm_platform_inst_capability instance_data_diwali_v1[] = { static struct msm_platform_inst_capability instance_data_diwali_v2[] = { }; +static struct allowed_clock_rates_table clock_data_diwali_v1[] = { + {240000000}, {338000000}, {366000000} +}; + +static struct allowed_clock_rates_table clock_data_diwali_v2[] = { + {200000000} +}; + /* * Custom conversion coefficients for resolution: 176x144 negative * coeffs are converted to s4.9 format @@ -1747,10 +1756,10 @@ static void msm_vidc_ddr_ubwc_config( static int msm_vidc_init_data(struct msm_vidc_core *core) { - int rc = 0; + int rc = 0, i = 0; struct msm_vidc_platform_data *platform_data = NULL; - if (!core || !core->platform) { + if (!core || !core->platform || !core->dt) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -1773,6 +1782,10 @@ static int msm_vidc_init_data(struct msm_vidc_core *core) platform_data->instance_data = instance_data_diwali_v1; platform_data->instance_data_size = ARRAY_SIZE(instance_data_diwali_v1); + /* Overide with SKU clock data into dt */ + core->dt->allowed_clks_tbl = clock_data_diwali_v1; + core->dt->allowed_clks_tbl_size = + ARRAY_SIZE(clock_data_diwali_v1); } else if (platform_data->sku_version == SKU_VERSION_2) { platform_data->core_data = core_data_diwali_v2; platform_data->core_data_size = @@ -1780,6 +1793,16 @@ static int msm_vidc_init_data(struct msm_vidc_core *core) platform_data->instance_data = instance_data_diwali_v2; platform_data->instance_data_size = ARRAY_SIZE(instance_data_diwali_v2); + /* Overide with SKU clock data into dt */ + core->dt->allowed_clks_tbl = clock_data_diwali_v2; + core->dt->allowed_clks_tbl_size = + ARRAY_SIZE(clock_data_diwali_v2); + } + + if (platform_data->sku_version) { + d_vpr_h("Updated allowed clock rates\n"); + for (i = 0; i < core->dt->allowed_clks_tbl_size; i++) + d_vpr_h(" %d\n", core->dt->allowed_clks_tbl[i]); } /* Check for DDR variant */ diff --git a/driver/vidc/inc/msm_vidc_platform.h b/driver/vidc/inc/msm_vidc_platform.h index d2d3b7bd76..2d4e4436f7 100644 --- a/driver/vidc/inc/msm_vidc_platform.h +++ b/driver/vidc/inc/msm_vidc_platform.h @@ -64,8 +64,6 @@ struct msm_vidc_platform_data { u32 core_data_size; struct msm_platform_inst_capability *instance_data; u32 instance_data_size; - struct allowed_clock_rates_table *allowed_clks_tbl; - u32 allowed_clks_tbl_size; struct msm_vidc_csc_coeff csc_data; struct msm_vidc_ubwc_config_data *ubwc_config; u32 *bus_bw_nrt; From 41d0edcaa222e7da2b8d691ff123a72f135d1b75 Mon Sep 17 00:00:00 2001 From: Priyanka Gujjula Date: Tue, 2 Nov 2021 13:32:11 +0530 Subject: [PATCH 0458/1061] video: driver: diwali: Add core caps Add core caps for all diwali variants Change-Id: I8917c574becd5923b7767404f81c01341ba29276 Signed-off-by: Priyanka Gujjula --- driver/platform/diwali/src/msm_vidc_diwali.c | 115 +++++++++++++++++-- 1 file changed, 105 insertions(+), 10 deletions(-) diff --git a/driver/platform/diwali/src/msm_vidc_diwali.c b/driver/platform/diwali/src/msm_vidc_diwali.c index 7344b472fa..864f3f399f 100644 --- a/driver/platform/diwali/src/msm_vidc_diwali.c +++ b/driver/platform/diwali/src/msm_vidc_diwali.c @@ -23,7 +23,7 @@ #define MAX_BASE_LAYER_PRIORITY_ID 63 #define MIN_CHROMA_QP_OFFSET -12 #define MAX_CHROMA_QP_OFFSET 0 -#define MAX_BITRATE 220000000 +#define MAX_BITRATE 100000000 #define DEFAULT_BITRATE 20000000 #define MIN_QP_10BIT -12 #define MIN_QP_8BIT 0 @@ -73,23 +73,24 @@ static struct msm_platform_core_capability core_data_diwali_v0[] = { /* {type, value} */ {ENC_CODECS, H264|HEVC|HEIC}, {DEC_CODECS, H264|HEVC|VP9|HEIC}, - /* TODO (AM) : concurrency spec needs to be verified for diwali */ {MAX_SESSION_COUNT, 16}, {MAX_NUM_720P_SESSIONS, 16}, {MAX_NUM_1080P_SESSIONS, 8}, {MAX_NUM_4K_SESSIONS, 4}, {MAX_NUM_8K_SESSIONS, 1}, {MAX_SECURE_SESSION_COUNT, 3}, - {MAX_MBPF, 138240}, /* ((8192x4320)/256) */ - {MAX_MBPS, 4147200},/* max_load - *(3840x2176)/256)@120fps decode, - *(8192x4320)/256)@30fps decode - */ - {MAX_IMAGE_MBPF, 1048576}, /* (16384x16384)/256 */ + {MAX_RT_MBPF, 138240}, /* ((8192x4320)/256) */ + {MAX_MBPF, 173056}, /* (8192x4320)/256 + (4096x2176)/256*/ + {MAX_MBPS, 4177920}, /* max_load + * 4096x2176@120fps which is greater than + * 8192x4320@30fps + */ + {MAX_IMAGE_MBPF, 1048576}, /* (16384x16384)/256 */ {MAX_MBPF_HQ, 8160}, /* ((1920x1088)/256) */ - {MAX_MBPS_HQ, 489600}, /* ((1920x1088)/256)@60fps */ + {MAX_MBPS_HQ, 244800}, /* ((1920x1088)/256)@30fps */ {MAX_MBPF_B_FRAME, 32640}, /* 3840x2176/256 */ - {MAX_MBPS_B_FRAME, 1958400}, /* 3840x2176/256 MBs@60fps */ + {MAX_MBPS_B_FRAME, 979200}, /* 3840x2176/256 MBs@30fps */ + {MAX_MBPS_ALL_INTRA, 489600}, /* ((1920x1088)/256)@60fps */ {MAX_ENH_LAYER_COUNT, 5}, {NUM_VPP_PIPE, 2}, {SW_PC, 1}, @@ -114,15 +115,109 @@ static struct msm_platform_core_capability core_data_diwali_v0[] = { {DCVS, 1}, {DECODE_BATCH, 1}, {DECODE_BATCH_TIMEOUT, 200}, + {STATS_TIMEOUT_MS, 2000}, {AV_SYNC_WINDOW_SIZE, 40}, {NON_FATAL_FAULTS, 1}, {ENC_AUTO_FRAMERATE, 1}, + {MMRM, 0}, }; static struct msm_platform_core_capability core_data_diwali_v1[] = { + /* {type, value} */ + {ENC_CODECS, H264|HEVC|HEIC}, + {DEC_CODECS, H264|HEVC|VP9|HEIC}, + {MAX_SESSION_COUNT, 16}, + {MAX_NUM_720P_SESSIONS, 16}, + {MAX_NUM_1080P_SESSIONS, 8}, + {MAX_NUM_4K_SESSIONS, 4}, + {MAX_SECURE_SESSION_COUNT, 3}, + {MAX_RT_MBPF, 130560}, /* ((3840x2176)/256) x 4 */ + {MAX_MBPF, 139264}, /* ((4096x2176)/256) x 4 */ + {MAX_MBPS, 2088960}, /* 4096x2176@60fps */ + {MAX_IMAGE_MBPF, 1048576}, /* (16384x16384)/256 */ + {MAX_MBPF_HQ, 8160}, /* ((1920x1088)/256) */ + {MAX_MBPS_HQ, 244800}, /* ((1920x1088)/256)@30fps */ + {MAX_MBPF_B_FRAME, 32640}, /* 3840x2176/256 */ + {MAX_MBPS_B_FRAME, 979200}, /* 3840x2176/256 MBs@30fps */ + {MAX_MBPS_ALL_INTRA, 489600}, /* ((1920x1088)/256)@60fps */ + {MAX_ENH_LAYER_COUNT, 5}, + {NUM_VPP_PIPE, 2}, + {SW_PC, 1}, + {FW_UNLOAD, 0}, + {HW_RESPONSE_TIMEOUT, HW_RESPONSE_TIMEOUT_VALUE}, /* 1000 ms */ + {SW_PC_DELAY, SW_PC_DELAY_VALUE }, /* 1500 ms (>HW_RESPONSE_TIMEOUT)*/ + {FW_UNLOAD_DELAY, FW_UNLOAD_DELAY_VALUE }, /* 3000 ms (>SW_PC_DELAY)*/ + // TODO: review below entries, and if required rename as PREFETCH + {PREFIX_BUF_COUNT_PIX, 18}, + {PREFIX_BUF_SIZE_PIX, 13434880}, /* Calculated by VIDEO_RAW_BUFFER_SIZE for 4096x2160 UBWC */ + {PREFIX_BUF_COUNT_NON_PIX, 1}, + {PREFIX_BUF_SIZE_NON_PIX, 209715200}, /* + * Internal buffer size is calculated for secure decode session + * of resolution 4k (4096x2160) + * Internal buf size = calculate_scratch_size() + + * calculate_scratch1_size() + calculate_persist1_size() + * Take maximum between VP9 10bit, HEVC 10bit, AVC secure + * decoder sessions + */ + {PAGEFAULT_NON_FATAL, 1}, + {PAGETABLE_CACHING, 0}, + {DCVS, 1}, + {DECODE_BATCH, 1}, + {DECODE_BATCH_TIMEOUT, 200}, + {STATS_TIMEOUT_MS, 2000}, + {AV_SYNC_WINDOW_SIZE, 40}, + {NON_FATAL_FAULTS, 1}, + {ENC_AUTO_FRAMERATE, 1}, + {MMRM, 0}, }; static struct msm_platform_core_capability core_data_diwali_v2[] = { + /* {type, value} */ + {ENC_CODECS, H264|HEVC|HEIC}, + {DEC_CODECS, H264|HEVC|VP9|HEIC}, + {MAX_SESSION_COUNT, 16}, + {MAX_NUM_720P_SESSIONS, 16}, + {MAX_NUM_1080P_SESSIONS, 8}, + {MAX_NUM_4K_SESSIONS, 4}, + {MAX_SECURE_SESSION_COUNT, 3}, + {MAX_RT_MBPF, 130560}, /* ((3840x2176)/256) x 3 */ + {MAX_MBPF, 104448}, /* ((4096x2176)/256) x 3 */ + {MAX_MBPS, 1044480}, /* 4096x2176@30fps */ + {MAX_IMAGE_MBPF, 1048576}, /* (16384x16384)/256 */ + {MAX_MBPF_HQ, 8160}, /* ((1920x1088)/256) */ + {MAX_MBPS_HQ, 244800}, /* ((1920x1088)/256)@30fps */ + {MAX_MBPF_B_FRAME, 32640}, /* 3840x2176/256 */ + {MAX_MBPS_B_FRAME, 979200}, /* 3840x2176/256 MBs@30fps */ + {MAX_MBPS_ALL_INTRA, 489600}, /* ((1920x1088)/256)@60fps */ + {MAX_ENH_LAYER_COUNT, 5}, + {NUM_VPP_PIPE, 2}, + {SW_PC, 1}, + {FW_UNLOAD, 0}, + {HW_RESPONSE_TIMEOUT, HW_RESPONSE_TIMEOUT_VALUE}, /* 1000 ms */ + {SW_PC_DELAY, SW_PC_DELAY_VALUE }, /* 1500 ms (>HW_RESPONSE_TIMEOUT)*/ + {FW_UNLOAD_DELAY, FW_UNLOAD_DELAY_VALUE }, /* 3000 ms (>SW_PC_DELAY)*/ + // TODO: review below entries, and if required rename as PREFETCH + {PREFIX_BUF_COUNT_PIX, 18}, + {PREFIX_BUF_SIZE_PIX, 13434880}, /* Calculated by VIDEO_RAW_BUFFER_SIZE for 4096x2160 UBWC */ + {PREFIX_BUF_COUNT_NON_PIX, 1}, + {PREFIX_BUF_SIZE_NON_PIX, 209715200}, /* + * Internal buffer size is calculated for secure decode session + * of resolution 4k (4096x2160) + * Internal buf size = calculate_scratch_size() + + * calculate_scratch1_size() + calculate_persist1_size() + * Take maximum between VP9 10bit, HEVC 10bit, AVC secure + * decoder sessions + */ + {PAGEFAULT_NON_FATAL, 1}, + {PAGETABLE_CACHING, 0}, + {DCVS, 1}, + {DECODE_BATCH, 1}, + {DECODE_BATCH_TIMEOUT, 200}, + {STATS_TIMEOUT_MS, 2000}, + {AV_SYNC_WINDOW_SIZE, 40}, + {NON_FATAL_FAULTS, 1}, + {ENC_AUTO_FRAMERATE, 1}, + {MMRM, 0}, }; static struct msm_platform_inst_capability instance_data_diwali_v0[] = { From 767c8ad13d72821e00f710b96d8805f6dbb4d2af Mon Sep 17 00:00:00 2001 From: Mahesh Kumar Sharma Date: Fri, 22 Oct 2021 17:57:17 -0700 Subject: [PATCH 0459/1061] video: driver: Fix dlkm compilation 1.) New dma_buf_vmap() returns SUCCESS or FAIL unlike legacy dma_buf_vmap() which return type is vmap address. dma_buf_vmap() takes two arguments now. Now it returns vmap address in pointer passed as second argument. 2.) If defined, use V4L2_CTRL_CLASS_CODEC else use V4L2_CTRL_CLASS_MPEG. 3.) iommu_dma_enable_best_fit_algo is commented temporary. 4.) remove subsystem_resart.h Change-Id: I73c6a840fa6028f021debff33b88178ac74dcef9 Signed-off-by: Mahesh Kumar Sharma --- driver/vidc/inc/msm_vidc_internal.h | 6 ++++++ driver/vidc/src/msm_vidc_dt.c | 9 ++++++++- driver/vidc/src/msm_vidc_memory.c | 4 ++-- driver/vidc/src/venus_hfi.c | 1 - include/uapi/vidc/media/v4l2_vidc_extensions.h | 6 +++++- 5 files changed, 21 insertions(+), 5 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 8f7c700b39..634ec38845 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -97,9 +97,15 @@ #define NUM_MBS_PER_FRAME(__height, __width) \ ((ALIGN(__height, 16) / 16) * (ALIGN(__width, 16) / 16)) +#ifdef V4L2_CTRL_CLASS_CODEC +#define IS_PRIV_CTRL(idx) ( \ + (V4L2_CTRL_ID2WHICH(idx) == V4L2_CTRL_CLASS_CODEC) && \ + V4L2_CTRL_DRIVER_PRIV(idx)) +#else #define IS_PRIV_CTRL(idx) ( \ (V4L2_CTRL_ID2WHICH(idx) == V4L2_CTRL_CLASS_MPEG) && \ V4L2_CTRL_DRIVER_PRIV(idx)) +#endif #define BUFFER_ALIGNMENT_SIZE(x) x #define NUM_MBS_720P (((1280 + 15) >> 4) * ((720 + 15) >> 4)) diff --git a/driver/vidc/src/msm_vidc_dt.c b/driver/vidc/src/msm_vidc_dt.c index fe615a44d8..bf6950fe39 100644 --- a/driver/vidc/src/msm_vidc_dt.c +++ b/driver/vidc/src/msm_vidc_dt.c @@ -823,7 +823,14 @@ static int msm_vidc_setup_context_bank(struct msm_vidc_core *core, * When memory is fragmented, below configuration increases the * possibility to get a mapping for buffer in the configured CB. */ - iommu_dma_enable_best_fit_algo(cb->dev); + + /* + * TBD: iommu_dma_enable_best_fit_algo is commented temoprarily to enable dlkm + * compilation once headers are availbale when the GKI branch for Kailua (android13-5.next) + * branches out + */ + + /*iommu_dma_enable_best_fit_algo(cb->dev);*/ /* * configure device segment size and segment boundary to ensure diff --git a/driver/vidc/src/msm_vidc_memory.c b/driver/vidc/src/msm_vidc_memory.c index f33cb36f86..7b4bec9f1f 100644 --- a/driver/vidc/src/msm_vidc_memory.c +++ b/driver/vidc/src/msm_vidc_memory.c @@ -377,8 +377,8 @@ int msm_vidc_memory_alloc(struct msm_vidc_core *core, struct msm_vidc_alloc *mem if (mem->map_kernel) { dma_buf_begin_cpu_access(mem->dmabuf, DMA_BIDIRECTIONAL); - mem->kvaddr = dma_buf_vmap(mem->dmabuf); - if (!mem->kvaddr) { + rc = dma_buf_vmap(mem->dmabuf, mem->kvaddr); + if (rc) { d_vpr_e("%s: kernel map failed\n", __func__); rc = -EIO; goto error; diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index e35e6aef52..8776c0ae64 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -9,7 +9,6 @@ #include #include #include -#include #include #include #include diff --git a/include/uapi/vidc/media/v4l2_vidc_extensions.h b/include/uapi/vidc/media/v4l2_vidc_extensions.h index 5268b22d4a..93c9271eed 100644 --- a/include/uapi/vidc/media/v4l2_vidc_extensions.h +++ b/include/uapi/vidc/media/v4l2_vidc_extensions.h @@ -52,7 +52,11 @@ #endif /* vendor controls start */ -#define V4L2_CID_MPEG_VIDC_BASE (V4L2_CTRL_CLASS_MPEG | 0x2000) +#ifdef V4L2_CTRL_CLASS_CODEC +#define V4L2_CID_MPEG_VIDC_BASE (V4L2_CTRL_CLASS_CODEC | 0x2000) +#else +#define V4L2_CID_MPEG_VIDC_BASE (V4L2_CTRL_CLASS_MPEG | 0x2000) +#endif #define V4L2_MPEG_MSM_VIDC_DISABLE 0 #define V4L2_MPEG_MSM_VIDC_ENABLE 1 From f84053a13b91af404fa7ffa01e327d65c78d1a98 Mon Sep 17 00:00:00 2001 From: Manikanta Kanamarlapudi Date: Fri, 29 Oct 2021 20:17:06 +0530 Subject: [PATCH 0460/1061] video-driver: check max mbpf check max mbpf as well while allowing the real time session. Change-Id: I1091582a02e01a4daa9c58ec5b50400b7d856610 Signed-off-by: Manikanta Kanamarlapudi --- driver/vidc/inc/msm_vidc_driver.h | 1 + driver/vidc/src/msm_vidc_control.c | 6 ++++++ driver/vidc/src/msm_vidc_driver.c | 2 +- 3 files changed, 8 insertions(+), 1 deletion(-) diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 610837ca04..ae6ac8c0f0 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -422,6 +422,7 @@ void msm_vidc_allow_dcvs(struct msm_vidc_inst *inst); bool msm_vidc_allow_decode_batch(struct msm_vidc_inst *inst); int msm_vidc_check_session_supported(struct msm_vidc_inst *inst); int msm_vidc_check_core_mbps(struct msm_vidc_inst *inst); +int msm_vidc_check_core_mbpf(struct msm_vidc_inst *inst); int msm_vidc_check_scaling_supported(struct msm_vidc_inst *inst); int msm_vidc_update_timestamp(struct msm_vidc_inst *inst, u64 timestamp); int msm_vidc_set_auto_framerate(struct msm_vidc_inst *inst, u64 timestamp); diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 3963595f90..fbfcc2b714 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -2352,6 +2352,12 @@ int msm_vidc_adjust_session_priority(void *instance, struct v4l2_ctrl *ctrl) rc = -ENOMEM; goto exit; } + + rc = msm_vidc_check_core_mbpf(inst); + if (rc) { + i_vpr_e(inst, "%s: unsupported load\n", __func__); + goto exit; + } } msm_vidc_update_cap_value(inst, PRIORITY, adjusted_value, __func__); diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 9934cacb12..3ce8901bb0 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -5284,7 +5284,7 @@ int msm_vidc_check_core_mbps(struct msm_vidc_inst *inst) return 0; } -static int msm_vidc_check_core_mbpf(struct msm_vidc_inst *inst) +int msm_vidc_check_core_mbpf(struct msm_vidc_inst *inst) { u32 video_mbpf = 0, image_mbpf = 0, video_rt_mbpf = 0; struct msm_vidc_core *core; From 721d946dedfd5de229f32561215a8f226fa6b95a Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Fri, 5 Nov 2021 12:18:29 -0700 Subject: [PATCH 0461/1061] video: driver: reject any unknown buffer received from fw Reject any unknown buffer received from fw. Change-Id: Icfc639cce364566a5479f5c12e13f7cb4fc06b00 Signed-off-by: Akshata Sahukar --- driver/vidc/src/venus_hfi_response.c | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index 8df57314b2..4f328a0261 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -742,6 +742,11 @@ static int handle_input_buffer(struct msm_vidc_inst *inst, } } + if (!(buf->attr & MSM_VIDC_ATTR_QUEUED)) { + print_vidc_buffer(VIDC_ERR, "err ", "not queued", inst, buf); + return 0; + } + buf->data_size = buffer->data_size; buf->attr &= ~MSM_VIDC_ATTR_QUEUED; buf->attr |= MSM_VIDC_ATTR_DEQUEUED; @@ -794,6 +799,11 @@ static int handle_output_buffer(struct msm_vidc_inst *inst, if (!found) return 0; + if (!(buf->attr & MSM_VIDC_ATTR_QUEUED)) { + print_vidc_buffer(VIDC_ERR, "err ", "not queued", inst, buf); + return 0; + } + buf->data_offset = buffer->data_offset; buf->data_size = buffer->data_size; buf->timestamp = buffer->timestamp; @@ -928,6 +938,12 @@ static int handle_input_metadata_buffer(struct msm_vidc_inst *inst, return 0; } } + + if (!(buf->attr & MSM_VIDC_ATTR_QUEUED)) { + print_vidc_buffer(VIDC_ERR, "err ", "not queued", inst, buf); + return 0; + } + buf->data_size = buffer->data_size; buf->attr &= ~MSM_VIDC_ATTR_QUEUED; buf->attr |= MSM_VIDC_ATTR_DEQUEUED; @@ -965,6 +981,11 @@ static int handle_output_metadata_buffer(struct msm_vidc_inst *inst, return -EINVAL; } + if (!(buf->attr & MSM_VIDC_ATTR_QUEUED)) { + print_vidc_buffer(VIDC_ERR, "err ", "not queued", inst, buf); + return 0; + } + buf->data_size = buffer->data_size; buf->attr &= ~MSM_VIDC_ATTR_QUEUED; buf->attr |= MSM_VIDC_ATTR_DEQUEUED; From dcaf028bf8b50bdd86e23948d07a9bd4e9e3ad9a Mon Sep 17 00:00:00 2001 From: Priyanka Gujjula Date: Mon, 8 Nov 2021 09:00:12 +0530 Subject: [PATCH 0462/1061] video: driver: diwali_v0: Update inst caps Correct instance data for diwali_v0. Change-Id: Ibeae49fd7f10ebfd8ab7c939666ffbff106a7efe Signed-off-by: Priyanka Gujjula --- driver/platform/diwali/src/msm_vidc_diwali.c | 190 ++++++++++++------- 1 file changed, 119 insertions(+), 71 deletions(-) diff --git a/driver/platform/diwali/src/msm_vidc_diwali.c b/driver/platform/diwali/src/msm_vidc_diwali.c index 7344b472fa..b90765825a 100644 --- a/driver/platform/diwali/src/msm_vidc_diwali.c +++ b/driver/platform/diwali/src/msm_vidc_diwali.c @@ -138,21 +138,24 @@ static struct msm_platform_inst_capability instance_data_diwali_v0[] = { {FRAME_WIDTH, DEC, CODECS_ALL, 96, 8192, 1, 1920}, {FRAME_WIDTH, DEC, VP9, 96, 4096, 1, 1920}, - {FRAME_WIDTH, ENC, CODECS_ALL, 128, 8192, 1, 1920}, + {FRAME_WIDTH, ENC, CODECS_ALL, 128, 4096, 1, 1920}, {LOSSLESS_FRAME_WIDTH, ENC, H264|HEVC, 128, 4096, 1, 1920}, {SECURE_FRAME_WIDTH, DEC, H264|HEVC|VP9, 96, 4096, 1, 1920}, {SECURE_FRAME_WIDTH, ENC, H264|HEVC, 128, 4096, 1, 1920}, {FRAME_HEIGHT, DEC, CODECS_ALL, 96, 8192, 1, 1080}, {FRAME_HEIGHT, DEC, VP9, 96, 4096, 1, 1080}, - {FRAME_HEIGHT, ENC, CODECS_ALL, 128, 8192, 1, 1080}, + {FRAME_HEIGHT, ENC, CODECS_ALL, 128, 4096, 1, 1080}, {LOSSLESS_FRAME_HEIGHT, ENC, H264|HEVC, 128, 4096, 1, 1080}, {SECURE_FRAME_HEIGHT, DEC, H264|HEVC|VP9, 96, 4096, 1, 1080}, {SECURE_FRAME_HEIGHT, ENC, H264|HEVC, 128, 4096, 1, 1080}, {PIX_FMTS, ENC, H264, MSM_VIDC_FMT_NV12, MSM_VIDC_FMT_NV12C, - MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C | - MSM_VIDC_FMT_RGBA8888 | MSM_VIDC_FMT_RGBA8888C, + MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C, + /* Since CTSEncodeDecode test cannot handle BT 709LR, + * disabled HW RGBA encoding. + * | MSM_VIDC_FMT_RGBA8888 | MSM_VIDC_FMT_RGBA8888C, + */ MSM_VIDC_FMT_NV12C, 0, 0, CAP_FLAG_ROOT, @@ -162,14 +165,22 @@ static struct msm_platform_inst_capability instance_data_diwali_v0[] = { MSM_VIDC_FMT_NV12, MSM_VIDC_FMT_TP10C, MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C | - MSM_VIDC_FMT_P010 | MSM_VIDC_FMT_TP10C | - MSM_VIDC_FMT_RGBA8888 | MSM_VIDC_FMT_RGBA8888C, + MSM_VIDC_FMT_P010 | MSM_VIDC_FMT_TP10C, + /* Since CTSEncodeDecode test cannot handle BT 709LR, + * disabled HW RGBA encoding. + * | MSM_VIDC_FMT_RGBA8888 | MSM_VIDC_FMT_RGBA8888C, + */ MSM_VIDC_FMT_NV12C, 0, 0, CAP_FLAG_ROOT, {0}, - {PROFILE, MIN_FRAME_QP, MAX_FRAME_QP, I_FRAME_QP, P_FRAME_QP, - B_FRAME_QP, META_ROI_INFO, BLUR_TYPES, MIN_QUALITY}}, + {/* Do not change order of META_ROI_INFO, MIN_QUALITY, BLUR_TYPES + * Since parent -> children relationship for these cap_ids is + * as follows: + * META_ROI_INFO -> MIN_QUALITY -> BLUR_TYPES + */ + PROFILE, MIN_FRAME_QP, MAX_FRAME_QP, I_FRAME_QP, P_FRAME_QP, + B_FRAME_QP, META_ROI_INFO, MIN_QUALITY, BLUR_TYPES}}, {PIX_FMTS, DEC, HEVC|HEIC, MSM_VIDC_FMT_NV12, @@ -202,40 +213,30 @@ static struct msm_platform_inst_capability instance_data_diwali_v0[] = { V4L2_CID_MIN_BUFFERS_FOR_CAPTURE, HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT, CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, - /* TODO (AM): review requied for encode/decode spec */ - /* (8192 * 4320) / 256 */ - {MBPF, ENC, CODECS_ALL, 64, 138240, 1, 138240}, - {MBPF, DEC, CODECS_ALL, 64, 138240, 1, 138240}, - /* (4096 * 2304) / 256 */ - {MBPF, DEC, VP9, 36, 36864, 1, 36864}, - /* (4096 * 2304) / 256 */ - {LOSSLESS_MBPF, ENC, H264|HEVC, 64, 36864, 1, 36864}, + /* (4096 * 2176) / 256 */ + {MBPF, ENC, CODECS_ALL, 64, 34816, 1, 34816}, + /* (8192 * 4320) / 256 */ + {MBPF, DEC, CODECS_ALL, 36, 138240, 1, 138240}, + /* (4096 * 2176) / 256 */ + {MBPF, DEC, VP9, 36, 34816, 1, 34816}, + /* (4096 * 2176) / 256 */ + {LOSSLESS_MBPF, ENC, H264|HEVC, 64, 34816, 1, 34816}, /* Batch Mode Decode */ /* TODO: update with new values based on updated voltage corner */ - {BATCH_MBPF, DEC, H264|HEVC|VP9, 64, 8160, 1, 34816}, - /* (4096 * 2304) / 256 */ + /* (1920 * 1088) / 256 */ + {BATCH_MBPF, DEC, H264|HEVC|VP9, 64, 8160, 1, 8160}, {BATCH_FPS, DEC, H264|HEVC|VP9, 1, 60, 1, 60}, - {SECURE_MBPF, ENC|DEC, H264|HEVC|VP9, 64, 36864, 1, 8160}, - /* ((1920 * 1088) / 256) * 480 fps */ - {MBPS, ENC, CODECS_ALL, 64, 3916800, 1, 3916800}, - /* ((1920 * 1088) / 256) * 960 fps */ - {MBPS, DEC, CODECS_ALL, 64, 7833600, 1, 7833600}, - /* ((4096 * 2304) / 256) * 60 */ - {MBPS, DEC, VP9, 36, 2211840, 1, 2211840}, - /* ((4096 * 2304) / 256) * 60 fps */ - {POWER_SAVE_MBPS, ENC, CODECS_ALL, 0, 2211840, 1, 2211840}, - - /* (8192 * 4320) / 256 */ - - /* Encode spec - 4K@60 */ - /* ((3840 * 2176) / 256) * 60 fps */ - {MBPS, ENC, CODECS_ALL, 64, 1958400, 1, 489600}, - {MBPS, DEC, CODECS_ALL, 64, 1958400, 1, 489600}, - - /* Decode spec - 8K@30, 4k@120*/ - /* ((8192 * 4320) / 256) * 30 fps */ - {MBPS, DEC, CODECS_ALL, 64, 4147200, 1, 979200}, + /* (4096 * 2176) / 256 */ + {SECURE_MBPF, ENC|DEC, H264|HEVC|VP9, 64, 34816, 1, 34816}, + /* ((4096 * 2176) / 256) * 60 fps */ + {MBPS, ENC, CODECS_ALL, 64, 2088960, 1, 2088960}, + /* ((4096 * 2176) / 256) * 120 fps */ + {MBPS, DEC, CODECS_ALL, 36, 4147200, 1, 4147200}, + /* ((4096 * 2176) / 256) * 60 */ + {MBPS, DEC, VP9, 36, 2088960, 1, 2088960}, + /* ((1920 * 1088) / 256) * 30 fps */ + {POWER_SAVE_MBPS, ENC, CODECS_ALL, 0, 244800, 1, 244800}, {FRAME_RATE, ENC, CODECS_ALL, (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), @@ -264,7 +265,6 @@ static struct msm_platform_inst_capability instance_data_diwali_v0[] = { {SCALE_FACTOR, ENC, H264|HEVC, 1, 8, 1, 8}, - /* TODO (AM): review requied for VSP/VPP cycle */ {MB_CYCLES_VSP, ENC, CODECS_ALL, 25, 25, 1, 25}, {MB_CYCLES_VSP, DEC, CODECS_ALL, 25, 25, 1, 25}, {MB_CYCLES_VSP, DEC, VP9, 60, 60, 1, 60}, @@ -431,7 +431,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v0[] = { LOWLATENCY_MODE}, msm_vidc_adjust_bitrate_mode, msm_vidc_set_u32_enum}, - {LOSSLESS, ENC, HEVC|HEIC, + {LOSSLESS, ENC, HEVC, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU}, @@ -468,7 +468,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v0[] = { CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, {ENH_LAYER_COUNT}, - {0}, + {ALL_INTRA}, msm_vidc_adjust_gop_size, msm_vidc_set_gop_size}, {GOP_CLOSURE, ENC, H264|HEVC, @@ -483,7 +483,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v0[] = { HFI_PROP_MAX_B_FRAMES, CAP_FLAG_OUTPUT_PORT, {ENH_LAYER_COUNT}, - {0}, + {ALL_INTRA}, msm_vidc_adjust_b_frame, msm_vidc_set_u32}, {BLUR_TYPES, ENC, CODECS_ALL, @@ -553,7 +553,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v0[] = { V4L2_CID_MPEG_VIDEO_LTR_COUNT, HFI_PROP_LTR_COUNT, CAP_FLAG_OUTPUT_PORT, - {BITRATE_MODE}, {0}, + {BITRATE_MODE, ALL_INTRA}, {0}, msm_vidc_adjust_ltr_count, msm_vidc_set_u32}, {USE_LTR, ENC, H264|HEVC, @@ -587,7 +587,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v0[] = { V4L2_CID_MPEG_VIDC_INTRA_REFRESH_PERIOD, HFI_PROP_IR_RANDOM_PERIOD, CAP_FLAG_OUTPUT_PORT, - {BITRATE_MODE}, {0}, + {BITRATE_MODE, ALL_INTRA}, {0}, msm_vidc_adjust_ir_random, msm_vidc_set_u32}, {AU_DELIMITER, ENC, H264|HEVC, @@ -620,7 +620,6 @@ static struct msm_platform_inst_capability instance_data_diwali_v0[] = { msm_vidc_adjust_cac, msm_vidc_set_vbr_related_properties}, - /* TODO (AM): review requied for bitrate boost margin */ {BITRATE_BOOST, ENC, H264|HEVC, 0, MAX_BITRATE_BOOST, 25, MAX_BITRATE_BOOST, V4L2_CID_MPEG_VIDC_QUALITY_BITRATE_BOOST, @@ -1061,9 +1060,30 @@ static struct msm_platform_inst_capability instance_data_diwali_v0[] = { {0}, NULL, msm_vidc_set_u32_enum}, + {LEVEL, DEC, VP9, + V4L2_MPEG_VIDEO_VP9_LEVEL_1_0, + V4L2_MPEG_VIDEO_VP9_LEVEL_5_1, + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_1_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_1_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_2_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_3_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_4_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_1), + V4L2_MPEG_VIDEO_VP9_LEVEL_5_1, + V4L2_CID_MPEG_VIDEO_VP9_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {0}, + {0}, + NULL, msm_vidc_set_u32_enum}, + {LEVEL, DEC, H264, V4L2_MPEG_VIDEO_H264_LEVEL_1_0, - V4L2_MPEG_VIDEO_H264_LEVEL_5_0, + V4L2_MPEG_VIDEO_H264_LEVEL_6_0, BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_0) | BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1B) | BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_1) | @@ -1077,8 +1097,12 @@ static struct msm_platform_inst_capability instance_data_diwali_v0[] = { BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_2) | BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_0) | BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_2), - V4L2_MPEG_VIDEO_H264_LEVEL_4_0, + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_0), + V4L2_MPEG_VIDEO_H264_LEVEL_6_0, V4L2_CID_MPEG_VIDEO_H264_LEVEL, HFI_PROP_LEVEL, CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, @@ -1088,7 +1112,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v0[] = { {LEVEL, ENC, H264, V4L2_MPEG_VIDEO_H264_LEVEL_1_0, - V4L2_MPEG_VIDEO_H264_LEVEL_5_0, + V4L2_MPEG_VIDEO_H264_LEVEL_5_2, BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_0) | BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1B) | BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_1) | @@ -1102,25 +1126,33 @@ static struct msm_platform_inst_capability instance_data_diwali_v0[] = { BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_2) | BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_0) | BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_2), - V4L2_MPEG_VIDEO_H264_LEVEL_4_0, + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_2), + V4L2_MPEG_VIDEO_H264_LEVEL_5_2, V4L2_CID_MPEG_VIDEO_H264_LEVEL, HFI_PROP_LEVEL, CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {0}, - NULL, msm_vidc_set_u32_enum}, + NULL, msm_vidc_set_level}, {LEVEL, DEC, HEVC|HEIC, V4L2_MPEG_VIDEO_HEVC_LEVEL_1, - V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1, + V4L2_MPEG_VIDEO_HEVC_LEVEL_6, BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_1) | BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2) | BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1) | BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3) | BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4), - V4L2_MPEG_VIDEO_HEVC_LEVEL_4, + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6), + V4L2_MPEG_VIDEO_HEVC_LEVEL_6, V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, HFI_PROP_LEVEL, CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, @@ -1128,23 +1160,25 @@ static struct msm_platform_inst_capability instance_data_diwali_v0[] = { {0}, NULL, msm_vidc_set_u32_enum}, - {LEVEL, ENC, HEVC|HEIC, + {LEVEL, ENC, HEVC|HEIC, V4L2_MPEG_VIDEO_HEVC_LEVEL_1, - V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1, + V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1, BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_1) | BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2) | BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1) | BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3) | BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4), - V4L2_MPEG_VIDEO_HEVC_LEVEL_4, + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1), + V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1, V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, HFI_PROP_LEVEL, CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {0}, - NULL, msm_vidc_set_u32_enum}, - + NULL, msm_vidc_set_level}, /* TODO: Bring the VP9 Level upstream GKI change, and level cap here: * go/videogki @@ -1215,7 +1249,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v0[] = { V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE, 0, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {BITRATE_MODE}, {0}, + {BITRATE_MODE, ALL_INTRA}, {0}, msm_vidc_adjust_slice_count, msm_vidc_set_slice_count}, {SLICE_MAX_BYTES, ENC, H264|HEVC|HEIC, @@ -1255,7 +1289,8 @@ static struct msm_platform_inst_capability instance_data_diwali_v0[] = { HFI_PROP_CHROMA_QP_OFFSET, CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, {0}, {0}, - NULL, msm_vidc_set_chroma_qp_index_offset}, + msm_vidc_adjust_chroma_qp_index_offset, + msm_vidc_set_chroma_qp_index_offset}, {DISPLAY_DELAY_ENABLE, DEC, H264|HEVC|VP9, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, @@ -1386,6 +1421,16 @@ static struct msm_platform_inst_capability instance_data_diwali_v0[] = { {0}, {0}, NULL, NULL}, + {ALL_INTRA, ENC, H264|HEVC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, + 0, + CAP_FLAG_OUTPUT_PORT, + {GOP_SIZE, B_FRAME}, + {LTR_COUNT, IR_RANDOM, SLICE_MODE}, + msm_vidc_adjust_all_intra, NULL}, + {META_LTR_MARK_USE, ENC, H264|HEVC, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, @@ -1518,16 +1563,14 @@ static struct msm_platform_inst_capability instance_data_diwali_v0[] = { HFI_PROP_DEC_QP_METADATA}, /* configure image properties */ - /* TODO (AM): review requied for image properties */ - {FRAME_WIDTH, ENC, HEIC, 512, 16384, 1, 16384}, - {FRAME_HEIGHT, ENC, HEIC, 512, 16384, 1, 16384}, - + {FRAME_WIDTH, ENC, HEIC, 128, 16384, 1, 16384}, + {FRAME_HEIGHT, ENC, HEIC, 128, 16384, 1, 16384}, {MIN_BUFFERS_INPUT, ENC|DEC, HEIC, 0, 64, 1, 1, V4L2_CID_MIN_BUFFERS_FOR_OUTPUT}, - {MBPF, DEC, HEIC, 36, 34816, 1, 8160 }, /* ((8192x8192)/256) */ - {MBPF, ENC, HEIC, 36, 34816, 1, 8160}, /* ((16384x16384)/256) */ - {MBPS, DEC, HEIC, 64, 1958400, 1, 489600 }, /* ((8192x8192)/256)@1fps */ - {MBPS, ENC, HEIC, 64, 1958400, 1, 489600}, /* ((16384x16384)/256)@1fps */ + {MBPF, DEC, HEIC, 36, 262144, 1, 262144 }, /* ((8192x8192)/256) */ + {MBPF, ENC, HEIC, 64, 1048576, 1, 1048576}, /* ((16384x16384)/256) */ + {MBPS, DEC, HEIC, 36, 262144, 1, 262144 }, /* ((8192x8192)/256)@1fps */ + {MBPS, ENC, HEIC, 64, 1048576, 1, 1048576}, /* ((16384x16384)/256)@1fps */ {BITRATE_MODE, ENC, HEIC, V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, @@ -1616,6 +1659,11 @@ static struct msm_platform_inst_capability instance_data_diwali_v0[] = { 0, 100, 1, 100, V4L2_CID_MPEG_VIDC_VENC_COMPLEXITY}, + {META_MAX_NUM_REORDER_FRAMES, DEC, HEVC | H264, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_MAX_NUM_REORDER_FRAMES, + HFI_PROP_MAX_NUM_REORDER_FRAMES}, }; static struct msm_platform_inst_capability instance_data_diwali_v1[] = { From 9c57700ac929ddd00fe7c74f78ecd0b4200fcf4e Mon Sep 17 00:00:00 2001 From: Priyanka Gujjula Date: Mon, 8 Nov 2021 11:53:14 +0530 Subject: [PATCH 0463/1061] video: driver: diwali: Add v1 & v2 inst caps Add instance data for v1 and v2 sku's. Change-Id: I13a03ebb55d2ccb9044ac667054fc3aadbd2977f Signed-off-by: Priyanka Gujjula --- driver/platform/diwali/src/msm_vidc_diwali.c | 3056 ++++++++++++++++++ 1 file changed, 3056 insertions(+) diff --git a/driver/platform/diwali/src/msm_vidc_diwali.c b/driver/platform/diwali/src/msm_vidc_diwali.c index 7344b472fa..ae8c4b7ac8 100644 --- a/driver/platform/diwali/src/msm_vidc_diwali.c +++ b/driver/platform/diwali/src/msm_vidc_diwali.c @@ -19,6 +19,7 @@ #define DEFAULT_VIDEO_CONCEAL_COLOR_BLACK 0x8020010 #define MINIMUM_FPS 1 #define MAXIMUM_FPS 480 +#define MAXIMUM_FPS_V2 240 #define MAX_LTR_FRAME_COUNT 2 #define MAX_BASE_LAYER_PRIORITY_ID 63 #define MIN_CHROMA_QP_OFFSET -12 @@ -1619,9 +1620,3064 @@ static struct msm_platform_inst_capability instance_data_diwali_v0[] = { }; static struct msm_platform_inst_capability instance_data_diwali_v1[] = { + /* {cap, domain, codec, + * min, max, step_or_mask, value, + * v4l2_id, + * hfi_id, + * flags, + * parents, + * children, + * adjust, set} + */ + + {FRAME_WIDTH, DEC, CODECS_ALL, 96, 4096, 1, 1920}, + {FRAME_WIDTH, ENC, CODECS_ALL, 128, 4096, 1, 1920}, + {LOSSLESS_FRAME_WIDTH, ENC, H264|HEVC, 128, 4096, 1, 1920}, + {SECURE_FRAME_WIDTH, DEC, H264|HEVC|VP9, 96, 4096, 1, 1920}, + {SECURE_FRAME_WIDTH, ENC, H264|HEVC, 128, 4096, 1, 1920}, + {FRAME_HEIGHT, DEC, CODECS_ALL, 96, 4096, 1, 1080}, + {FRAME_HEIGHT, ENC, CODECS_ALL, 128, 4096, 1, 1080}, + {LOSSLESS_FRAME_HEIGHT, ENC, H264|HEVC, 128, 4096, 1, 1080}, + {SECURE_FRAME_HEIGHT, DEC, H264|HEVC|VP9, 96, 4096, 1, 1080}, + {SECURE_FRAME_HEIGHT, ENC, H264|HEVC, 128, 4096, 1, 1080}, + {PIX_FMTS, ENC, H264, + MSM_VIDC_FMT_NV12, + MSM_VIDC_FMT_NV12C, + MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C, + /* Since CTSEncodeDecode test cannot handle BT 709LR, + * disabled HW RGBA encoding. + * | MSM_VIDC_FMT_RGBA8888 | MSM_VIDC_FMT_RGBA8888C, + */ + MSM_VIDC_FMT_NV12C, + 0, 0, + CAP_FLAG_ROOT, + {0}, + {META_ROI_INFO}}, + {PIX_FMTS, ENC, HEVC, + MSM_VIDC_FMT_NV12, + MSM_VIDC_FMT_TP10C, + MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C | + MSM_VIDC_FMT_P010 | MSM_VIDC_FMT_TP10C, + /* Since CTSEncodeDecode test cannot handle BT 709LR, + * disabled HW RGBA encoding. + * | MSM_VIDC_FMT_RGBA8888 | MSM_VIDC_FMT_RGBA8888C, + */ + MSM_VIDC_FMT_NV12C, + 0, 0, + CAP_FLAG_ROOT, + {0}, + {/* Do not change order of META_ROI_INFO, MIN_QUALITY, BLUR_TYPES + * Since parent -> children relationship for these cap_ids is + * as follows: + * META_ROI_INFO -> MIN_QUALITY -> BLUR_TYPES + */ + PROFILE, MIN_FRAME_QP, MAX_FRAME_QP, I_FRAME_QP, P_FRAME_QP, + B_FRAME_QP, META_ROI_INFO, MIN_QUALITY, BLUR_TYPES}}, + + {PIX_FMTS, DEC, HEVC|HEIC, + MSM_VIDC_FMT_NV12, + MSM_VIDC_FMT_TP10C, + MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C | + MSM_VIDC_FMT_P010 | MSM_VIDC_FMT_TP10C, + MSM_VIDC_FMT_NV12C, + 0, 0, + CAP_FLAG_ROOT, + {0}, + {PROFILE}}, + + {PIX_FMTS, DEC, H264, + MSM_VIDC_FMT_NV12, + MSM_VIDC_FMT_NV12C, + MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C, + MSM_VIDC_FMT_NV12C}, + + {PIX_FMTS, DEC, VP9, + MSM_VIDC_FMT_NV12, + MSM_VIDC_FMT_TP10C, + MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C | + MSM_VIDC_FMT_P010 | MSM_VIDC_FMT_TP10C, + MSM_VIDC_FMT_NV12C}, + + {MIN_BUFFERS_INPUT, ENC|DEC, CODECS_ALL, 0, 64, 1, 4, + V4L2_CID_MIN_BUFFERS_FOR_OUTPUT}, + {MIN_BUFFERS_OUTPUT, ENC|DEC, CODECS_ALL, + 0, 64, 1, 4, + V4L2_CID_MIN_BUFFERS_FOR_CAPTURE, + HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + + /* (4096 * 2176) / 256 */ + {MBPF, ENC, CODECS_ALL, 64, 34816, 1, 34816}, + /* (4096 * 2176) / 256 */ + {MBPF, DEC, CODECS_ALL, 36, 34816, 1, 34816}, + /* (4096 * 2176) / 256 */ + {LOSSLESS_MBPF, ENC, H264|HEVC, 64, 34816, 1, 34816}, + /* Batch Mode Decode */ + /* TODO: update with new values based on updated voltage corner */ + /* (1920 * 1088) / 256 */ + {BATCH_MBPF, DEC, H264|HEVC|VP9, 64, 8160, 1, 8160}, + {BATCH_FPS, DEC, H264|HEVC|VP9, 1, 60, 1, 60}, + /* (4096 * 2176) / 256 */ + {SECURE_MBPF, ENC|DEC, H264|HEVC|VP9, 64, 34816, 1, 34816}, + /* ((4096 * 2176) / 256) * 60 fps */ + {MBPS, ENC, CODECS_ALL, 64, 2088960, 1, 2088960}, + /* ((4096 * 2176) / 256) * 60 fps */ + {MBPS, DEC, CODECS_ALL, 36, 2088960, 1, 2088960}, + /* ((1920 * 1088) / 256) * 30 fps */ + {POWER_SAVE_MBPS, ENC, CODECS_ALL, 0, 244800, 1, 244800}, + + {FRAME_RATE, ENC, CODECS_ALL, + (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), + 1, (DEFAULT_FPS << 16), + 0, + HFI_PROP_FRAME_RATE, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + {0}, {0}, + NULL, msm_vidc_set_q16}, + + {FRAME_RATE, DEC, CODECS_ALL, + (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), + 1, (DEFAULT_FPS << 16)}, + + {FRAME_RATE, DEC, VP9, + (MINIMUM_FPS << 16), (MAXIMUM_VP9_FPS << 16), + 1, (DEFAULT_FPS << 16)}, + + {OPERATING_RATE, ENC|DEC, CODECS_ALL, + (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), + 1, (DEFAULT_FPS << 16)}, + + {OPERATING_RATE, DEC, VP9, + (MINIMUM_FPS << 16), (MAXIMUM_VP9_FPS << 16), + 1, (DEFAULT_FPS << 16)}, + + {SCALE_FACTOR, ENC, H264|HEVC, 1, 8, 1, 8}, + + {MB_CYCLES_VSP, ENC, CODECS_ALL, 25, 25, 1, 25}, + {MB_CYCLES_VSP, DEC, CODECS_ALL, 25, 25, 1, 25}, + {MB_CYCLES_VSP, DEC, VP9, 60, 60, 1, 60}, + {MB_CYCLES_VPP, ENC, CODECS_ALL, 675, 675, 1, 675}, + {MB_CYCLES_VPP, DEC, CODECS_ALL, 200, 200, 1, 200}, + {MB_CYCLES_LP, ENC, CODECS_ALL, 320, 320, 1, 320}, + {MB_CYCLES_LP, DEC, CODECS_ALL, 200, 200, 1, 200}, + {MB_CYCLES_FW, ENC|DEC, CODECS_ALL, 326389, 326389, 1, 326389}, + {MB_CYCLES_FW_VPP, ENC|DEC, CODECS_ALL, 44156, 44156, 1, 44156}, + + {SECURE_MODE, ENC|DEC, H264|HEVC|VP9, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_SECURE, + HFI_PROP_SECURE, + CAP_FLAG_NONE, + {0}, + {0}, + NULL, msm_vidc_set_u32}, + + {HFLIP, ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_HFLIP, + HFI_PROP_FLIP, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, + {0}, + {0}, + NULL, msm_vidc_set_flip}, + + {VFLIP, ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_VFLIP, + HFI_PROP_FLIP, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {0}, + {0}, + NULL, msm_vidc_set_flip}, + + {ROTATION, ENC, CODECS_ALL, + 0, 270, 90, 0, + V4L2_CID_ROTATE, + HFI_PROP_ROTATION, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + {0}, + {0}, + NULL, msm_vidc_set_rotation}, + + {SUPER_FRAME, ENC, H264|HEVC, + 0, 32, 1, 0, + V4L2_CID_MPEG_VIDC_SUPERFRAME, + 0}, + + {SLICE_INTERFACE, DEC, CODECS_ALL, + 0, 0, 0, 0, + V4L2_CID_MPEG_VIDEO_DECODER_SLICE_INTERFACE, + 0}, + + {HEADER_MODE, ENC, CODECS_ALL, + V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE, + V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME, + BIT(V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE) | + BIT(V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME), + V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE, + V4L2_CID_MPEG_VIDEO_HEADER_MODE, + HFI_PROP_SEQ_HEADER_MODE, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {0}, {0}, + NULL, msm_vidc_set_header_mode}, + + {PREPEND_SPSPPS_TO_IDR, ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDEO_PREPEND_SPSPPS_TO_IDR}, + + {META_SEQ_HDR_NAL, ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_SEQ_HEADER_NAL}, + + {WITHOUT_STARTCODE, ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE, + HFI_PROP_NAL_LENGTH_FIELD, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + {0}, {0}, + NULL, msm_vidc_set_nal_length}, + + {NAL_LENGTH_FIELD, ENC, CODECS_ALL, + V4L2_MPEG_VIDEO_HEVC_SIZE_0, + V4L2_MPEG_VIDEO_HEVC_SIZE_4, + BIT(V4L2_MPEG_VIDEO_HEVC_SIZE_0) | + BIT(V4L2_MPEG_VIDEO_HEVC_SIZE_4), + V4L2_MPEG_VIDEO_HEVC_SIZE_0, + V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD, + HFI_PROP_NAL_LENGTH_FIELD, + CAP_FLAG_MENU | CAP_FLAG_OUTPUT_PORT}, + + /* TODO: Firmware introduced enumeration type for this + * with and without seq header. + */ + {REQUEST_I_FRAME, ENC, H264|HEVC, + 0, 0, 0, 0, + V4L2_CID_MPEG_VIDEO_FORCE_KEY_FRAME, + HFI_PROP_REQUEST_SYNC_FRAME, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + NULL, msm_vidc_set_req_sync_frame}, + + /* Enc: Keeping CABAC and CAVLC as same bitrate. + * Dec: there's no use of Bitrate cap + */ + {BIT_RATE, ENC, H264|HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_BITRATE, + HFI_PROP_TOTAL_BITRATE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {ENH_LAYER_COUNT, BITRATE_MODE}, {PEAK_BITRATE}, + msm_vidc_adjust_bitrate, msm_vidc_set_bitrate}, + + {BITRATE_MODE, ENC, H264, + V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, + V4L2_MPEG_VIDEO_BITRATE_MODE_CBR, + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_VBR) | + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CBR), + V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, + V4L2_CID_MPEG_VIDEO_BITRATE_MODE, + HFI_PROP_RATE_CONTROL, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {0}, + {LTR_COUNT, IR_RANDOM, TIME_DELTA_BASED_RC, I_FRAME_QP, + P_FRAME_QP, B_FRAME_QP, ENH_LAYER_COUNT, BIT_RATE, + CONTENT_ADAPTIVE_CODING, BITRATE_BOOST, MIN_QUALITY, + VBV_DELAY, PEAK_BITRATE,SLICE_MODE, META_ROI_INFO, + BLUR_TYPES, LOWLATENCY_MODE}, + msm_vidc_adjust_bitrate_mode, msm_vidc_set_u32_enum}, + + {BITRATE_MODE, ENC, HEVC, + V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, + V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_VBR) | + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CBR) | + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CQ), + V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, + V4L2_CID_MPEG_VIDEO_BITRATE_MODE, + HFI_PROP_RATE_CONTROL, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {0}, + {LTR_COUNT, IR_RANDOM, TIME_DELTA_BASED_RC, I_FRAME_QP, + P_FRAME_QP, B_FRAME_QP, CONSTANT_QUALITY, ENH_LAYER_COUNT, + CONTENT_ADAPTIVE_CODING, BIT_RATE, + BITRATE_BOOST, MIN_QUALITY, VBV_DELAY, + PEAK_BITRATE, SLICE_MODE, META_ROI_INFO, BLUR_TYPES, + LOWLATENCY_MODE}, + msm_vidc_adjust_bitrate_mode, msm_vidc_set_u32_enum}, + + {LOSSLESS, ENC, HEVC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU}, + + {FRAME_SKIP_MODE, ENC, H264|HEVC|HEIC, + V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED, + V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT, + BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED) | + BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_LEVEL_LIMIT) | + BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT), + V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED, + V4L2_CID_MPEG_VIDEO_FRAME_SKIP_MODE, + 0, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {FRAME_RC_ENABLE, ENC, H264|HEVC|HEIC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_ENABLE, + V4L2_CID_MPEG_VIDEO_FRAME_RC_ENABLE}, + + {CONSTANT_QUALITY, ENC, HEVC, + 1, MAX_CONSTANT_QUALITY, 1, 90, + V4L2_CID_MPEG_VIDEO_CONSTANT_QUALITY, + HFI_PROP_CONSTANT_QUALITY, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {BITRATE_MODE}, {0}, + NULL, msm_vidc_set_constant_quality}, + + {GOP_SIZE, ENC, CODECS_ALL, + 0, INT_MAX, 1, 2 * DEFAULT_FPS - 1, + V4L2_CID_MPEG_VIDEO_GOP_SIZE, + HFI_PROP_MAX_GOP_FRAMES, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {ENH_LAYER_COUNT}, + {ALL_INTRA}, + msm_vidc_adjust_gop_size, msm_vidc_set_gop_size}, + + {GOP_CLOSURE, ENC, H264|HEVC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_ENABLE, + V4L2_CID_MPEG_VIDEO_GOP_CLOSURE, + 0}, + + {B_FRAME, ENC, H264|HEVC, + 0, 7, 1, 0, + V4L2_CID_MPEG_VIDEO_B_FRAMES, + HFI_PROP_MAX_B_FRAMES, + CAP_FLAG_OUTPUT_PORT, + {ENH_LAYER_COUNT}, + {ALL_INTRA}, + msm_vidc_adjust_b_frame, msm_vidc_set_u32}, + + {BLUR_TYPES, ENC, CODECS_ALL, + VIDC_BLUR_NONE, VIDC_BLUR_ADAPTIVE, 1, VIDC_BLUR_ADAPTIVE, + V4L2_CID_MPEG_VIDC_VIDEO_BLUR_TYPES, + HFI_PROP_BLUR_TYPES, + CAP_FLAG_OUTPUT_PORT, + {PIX_FMTS, BITRATE_MODE, CONTENT_ADAPTIVE_CODING}, + {BLUR_RESOLUTION}, + msm_vidc_adjust_blur_type, msm_vidc_set_u32_enum}, + + {BLUR_TYPES, ENC, H264|HEVC, + VIDC_BLUR_NONE, VIDC_BLUR_ADAPTIVE, 1, VIDC_BLUR_ADAPTIVE, + V4L2_CID_MPEG_VIDC_VIDEO_BLUR_TYPES, + HFI_PROP_BLUR_TYPES, + CAP_FLAG_OUTPUT_PORT, + {PIX_FMTS, BITRATE_MODE, CONTENT_ADAPTIVE_CODING, MIN_QUALITY}, + {BLUR_RESOLUTION}, + msm_vidc_adjust_blur_type, msm_vidc_set_u32_enum}, + + {BLUR_RESOLUTION, ENC, CODECS_ALL, + 0, S32_MAX, 1, 0, + V4L2_CID_MPEG_VIDC_VIDEO_BLUR_RESOLUTION, + HFI_PROP_BLUR_RESOLUTION, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {BLUR_TYPES}, + {0}, + msm_vidc_adjust_blur_resolution, msm_vidc_set_blur_resolution}, + + {CSC, ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, + HFI_PROP_CSC}, + + {CSC_CUSTOM_MATRIX, ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_VIDEO_VPE_CSC_CUSTOM_MATRIX, + HFI_PROP_CSC_MATRIX, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + {0}, {0}, + NULL, msm_vidc_set_csc_custom_matrix}, + + {LOWLATENCY_MODE, ENC, H264 | HEVC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_LOWLATENCY_REQUEST, + 0, + CAP_FLAG_NONE, + {BITRATE_MODE}, + {STAGE}, + msm_vidc_adjust_lowlatency_mode, NULL}, + + {LOWLATENCY_MODE, DEC, H264|HEVC|VP9, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_LOWLATENCY_REQUEST, + HFI_PROP_SEQ_CHANGE_AT_SYNC_FRAME, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {LTR_COUNT, ENC, H264|HEVC, + 0, 2, 1, 0, + V4L2_CID_MPEG_VIDEO_LTR_COUNT, + HFI_PROP_LTR_COUNT, + CAP_FLAG_OUTPUT_PORT, + {BITRATE_MODE, ALL_INTRA}, {0}, + msm_vidc_adjust_ltr_count, msm_vidc_set_u32}, + + {USE_LTR, ENC, H264|HEVC, + INVALID_DEFAULT_MARK_OR_USE_LTR, + ((1 << MAX_LTR_FRAME_COUNT) - 1), + 1, INVALID_DEFAULT_MARK_OR_USE_LTR, + V4L2_CID_MPEG_VIDEO_USE_LTR_FRAMES, + HFI_PROP_LTR_USE, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + msm_vidc_adjust_use_ltr, msm_vidc_set_use_and_mark_ltr}, + + {MARK_LTR, ENC, H264|HEVC, + INVALID_DEFAULT_MARK_OR_USE_LTR, + (MAX_LTR_FRAME_COUNT - 1), + 1, INVALID_DEFAULT_MARK_OR_USE_LTR, + V4L2_CID_MPEG_VIDEO_FRAME_LTR_INDEX, + HFI_PROP_LTR_MARK, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + msm_vidc_adjust_mark_ltr, msm_vidc_set_use_and_mark_ltr}, + + {BASELAYER_PRIORITY, ENC, H264, + 0, MAX_BASE_LAYER_PRIORITY_ID, 1, 0, + V4L2_CID_MPEG_VIDEO_BASELAYER_PRIORITY_ID, + HFI_PROP_BASELAYER_PRIORITYID, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + + {IR_RANDOM, ENC, H264|HEVC, + 0, INT_MAX, 1, 0, + V4L2_CID_MPEG_VIDC_INTRA_REFRESH_PERIOD, + HFI_PROP_IR_RANDOM_PERIOD, + CAP_FLAG_OUTPUT_PORT, + {BITRATE_MODE, ALL_INTRA}, {0}, + msm_vidc_adjust_ir_random, msm_vidc_set_u32}, + + {AU_DELIMITER, ENC, H264|HEVC, + V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDEO_AU_DELIMITER, + HFI_PROP_AUD, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + {0}, {0}, + NULL, msm_vidc_set_u32}, + + {TIME_DELTA_BASED_RC, ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_ENABLE, + V4L2_CID_MPEG_VIDC_TIME_DELTA_BASED_RC, + HFI_PROP_TIME_DELTA_BASED_RATE_CONTROL, + CAP_FLAG_OUTPUT_PORT, + {BITRATE_MODE}, {0}, + msm_vidc_adjust_delta_based_rc, msm_vidc_set_u32}, + + {CONTENT_ADAPTIVE_CODING, ENC, H264|HEVC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_ENABLE, + V4L2_CID_MPEG_VIDC_CONTENT_ADAPTIVE_CODING, + HFI_PROP_CONTENT_ADAPTIVE_CODING, + CAP_FLAG_OUTPUT_PORT, + {BITRATE_MODE, MIN_QUALITY}, + {BLUR_TYPES}, + msm_vidc_adjust_cac, + msm_vidc_set_vbr_related_properties}, + + {BITRATE_BOOST, ENC, H264|HEVC, + 0, MAX_BITRATE_BOOST, 25, MAX_BITRATE_BOOST, + V4L2_CID_MPEG_VIDC_QUALITY_BITRATE_BOOST, + HFI_PROP_BITRATE_BOOST, + CAP_FLAG_OUTPUT_PORT, + {BITRATE_MODE, MIN_QUALITY}, + {0}, + msm_vidc_adjust_bitrate_boost, + msm_vidc_set_vbr_related_properties}, + + {MIN_QUALITY, ENC, H264, + 0, MAX_SUPPORTED_MIN_QUALITY, 70, MAX_SUPPORTED_MIN_QUALITY, + 0, + HFI_PROP_MAINTAIN_MIN_QUALITY, + CAP_FLAG_OUTPUT_PORT, + {BITRATE_MODE, ENH_LAYER_COUNT, META_ROI_INFO}, + {CONTENT_ADAPTIVE_CODING, BITRATE_BOOST, BLUR_TYPES}, + msm_vidc_adjust_min_quality, + msm_vidc_set_vbr_related_properties}, + + {MIN_QUALITY, ENC, HEVC, + 0, MAX_SUPPORTED_MIN_QUALITY, 70, MAX_SUPPORTED_MIN_QUALITY, + 0, + HFI_PROP_MAINTAIN_MIN_QUALITY, + CAP_FLAG_OUTPUT_PORT, + {BITRATE_MODE, PIX_FMTS, ENH_LAYER_COUNT, + META_ROI_INFO}, + {CONTENT_ADAPTIVE_CODING, BITRATE_BOOST, BLUR_TYPES}, + msm_vidc_adjust_min_quality, + msm_vidc_set_vbr_related_properties}, + + {VBV_DELAY, ENC, H264|HEVC, + 200, 300, 100, 300, + V4L2_CID_MPEG_VIDEO_VBV_DELAY, + HFI_PROP_VBV_DELAY, + CAP_FLAG_OUTPUT_PORT, + {BITRATE_MODE}, + {0}, + NULL, msm_vidc_set_cbr_related_properties}, + + {PEAK_BITRATE, ENC, H264|HEVC, + /* default peak bitrate is 10% larger than avrg bitrate */ + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_BITRATE_PEAK, + HFI_PROP_TOTAL_PEAK_BITRATE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {BITRATE_MODE, BIT_RATE}, + {0}, + msm_vidc_adjust_peak_bitrate, + msm_vidc_set_cbr_related_properties}, + + {MIN_FRAME_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, + V4L2_CID_MPEG_VIDEO_H264_MIN_QP, + HFI_PROP_MIN_QP_PACKED, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + {0}, {0}, + NULL, msm_vidc_set_min_qp}, + + {MIN_FRAME_QP, ENC, HEVC|HEIC, + MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, + V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP, + HFI_PROP_MIN_QP_PACKED, + CAP_FLAG_OUTPUT_PORT, + {PIX_FMTS}, {0}, + msm_vidc_adjust_hevc_min_qp, msm_vidc_set_min_qp}, + + {I_FRAME_MIN_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, + V4L2_CID_MPEG_VIDEO_H264_I_FRAME_MIN_QP}, + + {I_FRAME_MIN_QP, ENC, HEVC|HEIC, + MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, + V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_MIN_QP}, + + {P_FRAME_MIN_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, + V4L2_CID_MPEG_VIDEO_H264_P_FRAME_MIN_QP}, + + {P_FRAME_MIN_QP, ENC, HEVC|HEIC, + MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, + V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_MIN_QP}, + + {B_FRAME_MIN_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, + V4L2_CID_MPEG_VIDEO_H264_B_FRAME_MIN_QP}, + + {B_FRAME_MIN_QP, ENC, HEVC|HEIC, + MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, + V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_MIN_QP}, + + {MAX_FRAME_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_H264_MAX_QP, + HFI_PROP_MAX_QP_PACKED, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + {0}, {0}, + NULL, msm_vidc_set_max_qp}, + + {MAX_FRAME_QP, ENC, HEVC|HEIC, + MIN_QP_10BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP, + HFI_PROP_MAX_QP_PACKED, + CAP_FLAG_OUTPUT_PORT, + {PIX_FMTS}, {0}, + msm_vidc_adjust_hevc_max_qp, msm_vidc_set_max_qp}, + + {I_FRAME_MAX_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_H264_I_FRAME_MAX_QP}, + + {I_FRAME_MAX_QP, ENC, HEVC|HEIC, + MIN_QP_10BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_MAX_QP}, + + {P_FRAME_MAX_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_H264_P_FRAME_MAX_QP}, + + {P_FRAME_MAX_QP, ENC, HEVC|HEIC, + MIN_QP_10BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_MAX_QP}, + + {B_FRAME_MAX_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_H264_B_FRAME_MAX_QP}, + + {B_FRAME_MAX_QP, ENC, HEVC|HEIC, + MIN_QP_10BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_MAX_QP}, + + {I_FRAME_QP, ENC, HEVC, + MIN_QP_10BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {PIX_FMTS, BITRATE_MODE}, {0}, + msm_vidc_adjust_hevc_i_frame_qp, msm_vidc_set_frame_qp}, + + {I_FRAME_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {BITRATE_MODE}, {0}, + NULL, msm_vidc_set_frame_qp}, + + {P_FRAME_QP, ENC, HEVC, + MIN_QP_10BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {PIX_FMTS, BITRATE_MODE}, {0}, + msm_vidc_adjust_hevc_p_frame_qp, msm_vidc_set_frame_qp}, + + {P_FRAME_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {BITRATE_MODE}, {0}, + NULL, msm_vidc_set_frame_qp}, + + {B_FRAME_QP, ENC, HEVC, + MIN_QP_10BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {PIX_FMTS, BITRATE_MODE}, {0}, + msm_vidc_adjust_hevc_b_frame_qp, msm_vidc_set_frame_qp}, + + {B_FRAME_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_H264_B_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {BITRATE_MODE}, {0}, + NULL, msm_vidc_set_frame_qp}, + + {LAYER_TYPE, ENC, HEVC, + V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B, + V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P, + BIT(V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B) | + BIT(V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P), + V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE, + HFI_PROP_LAYER_ENCODING_TYPE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LAYER_TYPE, ENC, H264, + V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_B, + V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P, + BIT(V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_B) | + BIT(V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P), + V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P, + V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_TYPE, + HFI_PROP_LAYER_ENCODING_TYPE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LAYER_ENABLE, ENC, H264, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING, + HFI_PROP_LAYER_ENCODING_TYPE, + CAP_FLAG_OUTPUT_PORT}, + + {ENH_LAYER_COUNT, ENC, HEVC, + 0, 5, 1, 0, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER, + HFI_PROP_LAYER_COUNT, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {BITRATE_MODE, META_EVA_STATS}, + {GOP_SIZE, B_FRAME, BIT_RATE, MIN_QUALITY}, + msm_vidc_adjust_layer_count, msm_vidc_set_layer_count_and_type}, + + {ENH_LAYER_COUNT, ENC, H264, + 0, 5, 1, 0, + V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_LAYER, + HFI_PROP_LAYER_COUNT, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {BITRATE_MODE, META_EVA_STATS}, + {GOP_SIZE, B_FRAME, BIT_RATE, MIN_QUALITY}, + msm_vidc_adjust_layer_count, msm_vidc_set_layer_count_and_type}, + + /* + * layer bitrate is treated as BIT_RATE cap sibling and + * is handled in bitrate adjust and set functions + */ + {L0_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L0_BR, + HFI_PROP_BITRATE_LAYER1, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, + + {L1_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L1_BR, + HFI_PROP_BITRATE_LAYER2, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, + + {L2_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L2_BR, + HFI_PROP_BITRATE_LAYER3, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, + + {L3_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L3_BR, + HFI_PROP_BITRATE_LAYER4, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, + + {L4_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L4_BR, + HFI_PROP_BITRATE_LAYER5, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, + + {L5_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L5_BR, + HFI_PROP_BITRATE_LAYER6, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, + + {L0_BR, ENC, H264, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L0_BR, + HFI_PROP_BITRATE_LAYER1, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, + + {L1_BR, ENC, H264, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L1_BR, + HFI_PROP_BITRATE_LAYER2, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, + + {L2_BR, ENC, H264, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L2_BR, + HFI_PROP_BITRATE_LAYER3, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, + + {L3_BR, ENC, H264, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L3_BR, + HFI_PROP_BITRATE_LAYER4, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, + + {L4_BR, ENC, H264, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L4_BR, + HFI_PROP_BITRATE_LAYER5, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, + + {L5_BR, ENC, H264, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L5_BR, + HFI_PROP_BITRATE_LAYER6, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, + + {ENTROPY_MODE, ENC, H264, + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC, + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, + BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC) | + BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC), + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, + V4L2_CID_MPEG_VIDEO_H264_ENTROPY_MODE, + HFI_PROP_CABAC_SESSION, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {PROFILE}, + {0}, + msm_vidc_adjust_entropy_mode, msm_vidc_set_u32}, + + {ENTROPY_MODE, DEC, H264|HEVC|VP9, + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC, + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, + BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC) | + BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC), + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, + 0, + HFI_PROP_CABAC_SESSION}, + + /* H264 does not support 10 bit, PIX_FMTS would not be a Parent for this */ + {PROFILE, ENC, H264, + V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE, + V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH, + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_BASELINE) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_MAIN) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_HIGH), + V4L2_MPEG_VIDEO_H264_PROFILE_HIGH, + V4L2_CID_MPEG_VIDEO_H264_PROFILE, + HFI_PROP_PROFILE, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {0}, + {ENTROPY_MODE, TRANSFORM_8X8}, + NULL, msm_vidc_set_u32_enum}, + + {PROFILE, DEC, H264, + V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE, + V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH, + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_BASELINE) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_MAIN) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_HIGH), + V4L2_MPEG_VIDEO_H264_PROFILE_HIGH, + V4L2_CID_MPEG_VIDEO_H264_PROFILE, + HFI_PROP_PROFILE, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {0}, + {ENTROPY_MODE}, + NULL, msm_vidc_set_u32_enum}, + + {PROFILE, ENC|DEC, HEVC|HEIC, + V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN, + V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE, + BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN) | + BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE) | + BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10) | + BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE), + V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN, + V4L2_CID_MPEG_VIDEO_HEVC_PROFILE, + HFI_PROP_PROFILE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {PIX_FMTS}, + {0}, + msm_vidc_adjust_profile, msm_vidc_set_u32_enum}, + + {PROFILE, DEC, VP9, + V4L2_MPEG_VIDEO_VP9_PROFILE_0, + V4L2_MPEG_VIDEO_VP9_PROFILE_2, + BIT(V4L2_MPEG_VIDEO_VP9_PROFILE_0) | + BIT(V4L2_MPEG_VIDEO_VP9_PROFILE_2), + V4L2_MPEG_VIDEO_VP9_PROFILE_0, + V4L2_CID_MPEG_VIDEO_VP9_PROFILE, + HFI_PROP_PROFILE, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {0}, + {0}, + NULL, msm_vidc_set_u32_enum}, + + {LEVEL, DEC, VP9, + V4L2_MPEG_VIDEO_VP9_LEVEL_1_0, + V4L2_MPEG_VIDEO_VP9_LEVEL_5_1, + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_1_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_1_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_2_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_3_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_4_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_1), + V4L2_MPEG_VIDEO_VP9_LEVEL_5_1, + V4L2_CID_MPEG_VIDEO_VP9_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {0}, + {0}, + NULL, msm_vidc_set_u32_enum}, + + {LEVEL, DEC, H264, + V4L2_MPEG_VIDEO_H264_LEVEL_1_0, + V4L2_MPEG_VIDEO_H264_LEVEL_5_2, + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1B) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_3) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_2), + V4L2_MPEG_VIDEO_H264_LEVEL_6_0, + V4L2_CID_MPEG_VIDEO_H264_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {0}, + {0}, + NULL, msm_vidc_set_u32_enum}, + + {LEVEL, ENC, H264, + V4L2_MPEG_VIDEO_H264_LEVEL_1_0, + V4L2_MPEG_VIDEO_H264_LEVEL_5_2, + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1B) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_3) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_2), + V4L2_MPEG_VIDEO_H264_LEVEL_5_2, + V4L2_CID_MPEG_VIDEO_H264_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {0}, + {0}, + NULL, msm_vidc_set_level}, + + {LEVEL, DEC, HEVC|HEIC, + V4L2_MPEG_VIDEO_HEVC_LEVEL_1, + V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1, + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1), + V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1, + V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {0}, + {0}, + NULL, msm_vidc_set_u32_enum}, + + {LEVEL, ENC, HEVC|HEIC, + V4L2_MPEG_VIDEO_HEVC_LEVEL_1, + V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1, + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1), + V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1, + V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {0}, + {0}, + NULL, msm_vidc_set_level}, + + /* TODO: Bring the VP9 Level upstream GKI change, and level cap here: + * go/videogki + */ + + {HEVC_TIER, ENC|DEC, HEVC, + V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, + V4L2_MPEG_VIDEO_HEVC_TIER_HIGH, + BIT(V4L2_MPEG_VIDEO_HEVC_TIER_MAIN) | + BIT(V4L2_MPEG_VIDEO_HEVC_TIER_HIGH), + V4L2_MPEG_VIDEO_HEVC_TIER_HIGH, + V4L2_CID_MPEG_VIDEO_HEVC_TIER, + HFI_PROP_TIER, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {0}, + {0}, + NULL, msm_vidc_set_u32_enum}, + + {LF_MODE, ENC, H264, + V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED, + DB_H264_DISABLE_SLICE_BOUNDARY, + BIT(V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED) | + BIT(V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_DISABLED) | + BIT(DB_H264_DISABLE_SLICE_BOUNDARY), + V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED, + V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_MODE, + HFI_PROP_DEBLOCKING_MODE, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {0}, {0}, + NULL, msm_vidc_set_deblock_mode}, + + {LF_MODE, ENC, HEVC|HEIC, + V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_DISABLED, + DB_HEVC_DISABLE_SLICE_BOUNDARY, + BIT(V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_DISABLED) | + BIT(V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_ENABLED) | + BIT(DB_HEVC_DISABLE_SLICE_BOUNDARY), + V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_ENABLED, + V4L2_CID_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE, + HFI_PROP_DEBLOCKING_MODE, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {0}, {0}, + NULL, msm_vidc_set_deblock_mode}, + + {LF_ALPHA, ENC, H264, + -6, 6, 1, 0, + V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_ALPHA}, + + {LF_ALPHA, ENC, HEVC|HEIC, + -6, 6, 1, 0, + V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2}, + + {LF_BETA, ENC, H264, + -6, 6, 1, 0, + V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_BETA}, + + {LF_BETA, ENC, HEVC|HEIC, + -6, 6, 1, 0, + V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2}, + + {SLICE_MODE, ENC, H264|HEVC|HEIC, + V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, + V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_BYTES, + BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE) | + BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_MB) | + BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_BYTES), + V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, + V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE, + 0, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {BITRATE_MODE, ALL_INTRA}, {0}, + msm_vidc_adjust_slice_count, msm_vidc_set_slice_count}, + + {SLICE_MAX_BYTES, ENC, H264|HEVC|HEIC, + MIN_SLICE_BYTE_SIZE, MAX_SLICE_BYTE_SIZE, + 1, MIN_SLICE_BYTE_SIZE, + V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES, + HFI_PROP_MULTI_SLICE_BYTES_COUNT, + CAP_FLAG_OUTPUT_PORT}, + + {SLICE_MAX_MB, ENC, H264|HEVC|HEIC, + 1, MAX_SLICE_MB_SIZE, 1, 1, + V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB, + HFI_PROP_MULTI_SLICE_MB_COUNT, + CAP_FLAG_OUTPUT_PORT}, + + // TODO: MB level RC - mapping + {MB_RC, ENC, H264|HEVC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_ENABLE, + V4L2_CID_MPEG_VIDEO_MB_RC_ENABLE, + 0, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + + {TRANSFORM_8X8, ENC, H264, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_ENABLE, + V4L2_CID_MPEG_VIDEO_H264_8X8_TRANSFORM, + HFI_PROP_8X8_TRANSFORM, + CAP_FLAG_OUTPUT_PORT, + {PROFILE}, {0}, + msm_vidc_adjust_transform_8x8, msm_vidc_set_u32}, + + {CHROMA_QP_INDEX_OFFSET, ENC, HEVC, + MIN_CHROMA_QP_OFFSET, MAX_CHROMA_QP_OFFSET, + 1, MAX_CHROMA_QP_OFFSET, + V4L2_CID_MPEG_VIDEO_H264_CHROMA_QP_INDEX_OFFSET, + HFI_PROP_CHROMA_QP_OFFSET, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + {0}, {0}, + msm_vidc_adjust_chroma_qp_index_offset, + msm_vidc_set_chroma_qp_index_offset}, + + {DISPLAY_DELAY_ENABLE, DEC, H264|HEVC|VP9, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY_ENABLE, + HFI_PROP_DECODE_ORDER_OUTPUT, + CAP_FLAG_ROOT | CAP_FLAG_INPUT_PORT}, + + {DISPLAY_DELAY, DEC, H264|HEVC|VP9, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY, + HFI_PROP_DECODE_ORDER_OUTPUT, + CAP_FLAG_ROOT | CAP_FLAG_INPUT_PORT}, + + /* conceal color */ + {CONCEAL_COLOR_8BIT, DEC, CODECS_ALL, 0x0, 0xff3fcff, 1, + DEFAULT_VIDEO_CONCEAL_COLOR_BLACK, + V4L2_CID_MPEG_VIDEO_MUTE_YUV, + HFI_PROP_CONCEAL_COLOR_8BIT, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + + {CONCEAL_COLOR_10BIT, DEC, CODECS_ALL, 0x0, 0x3fffffff, 1, + DEFAULT_VIDEO_CONCEAL_COLOR_BLACK, + V4L2_CID_MPEG_VIDEO_MUTE_YUV, + HFI_PROP_CONCEAL_COLOR_10BIT, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + + // TODO + {STAGE, DEC|ENC, CODECS_ALL, + MSM_VIDC_STAGE_1, + MSM_VIDC_STAGE_2, 1, + MSM_VIDC_STAGE_2, + 0, + HFI_PROP_STAGE, + CAP_FLAG_ROOT, + {0}, {0}, + NULL, msm_vidc_set_stage}, + + {STAGE, ENC, H264 | HEVC, + MSM_VIDC_STAGE_1, + MSM_VIDC_STAGE_2, 1, + MSM_VIDC_STAGE_2, + 0, + HFI_PROP_STAGE, + CAP_FLAG_NONE, + {LOWLATENCY_MODE}, {0}, + NULL, msm_vidc_set_stage}, + + {PIPE, DEC|ENC, CODECS_ALL, + MSM_VIDC_PIPE_1, + MSM_VIDC_PIPE_2, 1, + MSM_VIDC_PIPE_2, + 0, + HFI_PROP_PIPE, + CAP_FLAG_ROOT, + {0}, {0}, + NULL, msm_vidc_set_pipe}, + {POC, DEC, H264, 0, 18, 1, 1}, + {QUALITY_MODE, ENC, CODECS_ALL, + MSM_VIDC_MAX_QUALITY_MODE, + MSM_VIDC_POWER_SAVE_MODE, 1, + MSM_VIDC_POWER_SAVE_MODE}, + + {CODED_FRAMES, DEC, H264|HEVC|HEIC, + CODED_FRAMES_PROGRESSIVE, CODED_FRAMES_INTERLACE, + 1, CODED_FRAMES_PROGRESSIVE, + 0, + HFI_PROP_CODED_FRAMES}, + + {BIT_DEPTH, DEC, CODECS_ALL, BIT_DEPTH_8, BIT_DEPTH_10, 1, BIT_DEPTH_8, + 0, + HFI_PROP_LUMA_CHROMA_BIT_DEPTH}, + + {CODEC_CONFIG, DEC, H264|HEVC|HEIC, 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_CODEC_CONFIG, 0, + CAP_FLAG_DYNAMIC_ALLOWED}, + + {BITSTREAM_SIZE_OVERWRITE, DEC, CODECS_ALL, 0, INT_MAX, 1, 0, + V4L2_CID_MPEG_VIDC_MIN_BITSTREAM_SIZE_OVERWRITE}, + + {THUMBNAIL_MODE, DEC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_THUMBNAIL_MODE, + HFI_PROP_THUMBNAIL_MODE}, + + {DEFAULT_HEADER, DEC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, + HFI_PROP_DEC_DEFAULT_HEADER}, + + {RAP_FRAME, DEC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_ENABLE, + 0, + HFI_PROP_DEC_START_FROM_RAP_FRAME, + CAP_FLAG_INPUT_PORT, + {0}, {0}, + NULL, NULL}, + + {SEQ_CHANGE_AT_SYNC_FRAME, DEC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_ENABLE, + 0, + HFI_PROP_SEQ_CHANGE_AT_SYNC_FRAME, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {PRIORITY, DEC|ENC, CODECS_ALL, + 0, 2, 1, 1, + V4L2_CID_MPEG_VIDC_PRIORITY, + HFI_PROP_SESSION_PRIORITY, + CAP_FLAG_ROOT | CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + msm_vidc_adjust_session_priority, msm_vidc_set_session_priority}, + + {ENC_IP_CR, ENC, CODECS_ALL, + 0, S32_MAX, 1, 0, + V4L2_CID_MPEG_VIDC_ENC_INPUT_COMPRESSION_RATIO, + 0, CAP_FLAG_DYNAMIC_ALLOWED}, + + {DPB_LIST, DEC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, + HFI_PROP_DPB_LIST, + CAP_FLAG_OUTPUT_PORT, + {0}, {0}, + NULL, NULL}, + + {ALL_INTRA, ENC, H264|HEVC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, + 0, + CAP_FLAG_OUTPUT_PORT, + {GOP_SIZE, B_FRAME}, + {LTR_COUNT, IR_RANDOM, SLICE_MODE}, + msm_vidc_adjust_all_intra, NULL}, + + {META_LTR_MARK_USE, ENC, H264|HEVC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_LTR_MARK_USE_DETAILS, + HFI_PROP_LTR_MARK_USE_DETAILS}, + + {META_SEQ_HDR_NAL, ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_SEQ_HEADER_NAL, + HFI_PROP_METADATA_SEQ_HEADER_NAL}, + + {META_DPB_MISR, DEC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_DPB_LUMA_CHROMA_MISR, + HFI_PROP_DPB_LUMA_CHROMA_MISR}, + + {META_OPB_MISR, DEC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_OPB_LUMA_CHROMA_MISR, + HFI_PROP_OPB_LUMA_CHROMA_MISR}, + + {META_INTERLACE, DEC, H264, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_INTERLACE, + HFI_PROP_INTERLACE_INFO}, + + {META_TIMESTAMP, DEC | ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_TIMESTAMP, + HFI_PROP_TIMESTAMP}, + + {META_CONCEALED_MB_CNT, DEC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_CONCEALED_MB_COUNT, + HFI_PROP_CONEALED_MB_COUNT}, + + {META_HIST_INFO, DEC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_HISTOGRAM_INFO, + HFI_PROP_HISTOGRAM_INFO}, + + {META_SEI_MASTERING_DISP, DEC|ENC, HEVC|HEIC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_SEI_MASTERING_DISPLAY_COLOUR, + HFI_PROP_SEI_MASTERING_DISPLAY_COLOUR}, + + {META_SEI_CLL, DEC|ENC, HEVC|HEIC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_SEI_CONTENT_LIGHT_LEVEL, + HFI_PROP_SEI_CONTENT_LIGHT_LEVEL}, + + {META_HDR10PLUS, DEC | ENC, HEVC|HEIC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_HDR10PLUS, + HFI_PROP_SEI_HDR10PLUS_USERDATA}, + + {META_EVA_STATS, ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_EVA_STATS, + HFI_PROP_EVA_STAT_INFO, + CAP_FLAG_ROOT, + {0}, + {ENH_LAYER_COUNT}}, + + {META_BUF_TAG, DEC | ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_BUFFER_TAG, + HFI_PROP_BUFFER_TAG}, + + {META_DPB_TAG_LIST, DEC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_DPB_TAG_LIST, + HFI_PROP_DPB_TAG_LIST}, + + {META_OUTPUT_BUF_TAG, DEC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, + HFI_PROP_BUFFER_TAG}, + + {META_SUBFRAME_OUTPUT, DEC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_SUBFRAME_OUTPUT, + HFI_PROP_SUBFRAME_OUTPUT}, + + {META_ENC_QP_METADATA, ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_ENC_QP_METADATA, + HFI_PROP_ENC_QP_METADATA}, + + {META_ROI_INFO, ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_ROI_INFO, + HFI_PROP_ROI_INFO, + CAP_FLAG_INPUT_PORT, + {BITRATE_MODE, PIX_FMTS}, + {0}, + msm_vidc_adjust_roi_info, NULL}, + + {META_ROI_INFO, ENC, H264|HEVC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_ROI_INFO, + HFI_PROP_ROI_INFO, + CAP_FLAG_INPUT_PORT, + {BITRATE_MODE, PIX_FMTS}, + {MIN_QUALITY}, + msm_vidc_adjust_roi_info, NULL}, + + {META_DEC_QP_METADATA, DEC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_DEC_QP_METADATA, + HFI_PROP_DEC_QP_METADATA}, + + /* configure image properties */ + {FRAME_WIDTH, ENC, HEIC, 128, 16384, 1, 16384}, + {FRAME_HEIGHT, ENC, HEIC, 128, 16384, 1, 16384}, + {MIN_BUFFERS_INPUT, ENC|DEC, HEIC, 0, 64, 1, 1, + V4L2_CID_MIN_BUFFERS_FOR_OUTPUT}, + {MBPF, DEC, HEIC, 36, 262144, 1, 262144 }, /* ((8192x8192)/256) */ + {MBPF, ENC, HEIC, 64, 1048576, 1, 1048576}, /* ((16384x16384)/256) */ + {MBPS, DEC, HEIC, 36, 262144, 1, 262144 }, /* ((8192x8192)/256)@1fps */ + {MBPS, ENC, HEIC, 64, 1048576, 1, 1048576}, /* ((16384x16384)/256)@1fps */ + {BITRATE_MODE, ENC, HEIC, + V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, + V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CQ), + V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, + V4L2_CID_MPEG_VIDEO_BITRATE_MODE, + HFI_PROP_RATE_CONTROL, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {0}, + {TIME_DELTA_BASED_RC, CONSTANT_QUALITY}, + msm_vidc_adjust_bitrate_mode, msm_vidc_set_u32_enum}, + {TIME_DELTA_BASED_RC, ENC, HEIC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_TIME_DELTA_BASED_RC, + HFI_PROP_TIME_DELTA_BASED_RATE_CONTROL, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + {BITRATE_MODE}, {0}, + msm_vidc_adjust_delta_based_rc, msm_vidc_set_u32}, + {CONSTANT_QUALITY, ENC, HEIC, + 1, MAX_CONSTANT_QUALITY, 1, 100, + V4L2_CID_MPEG_VIDEO_CONSTANT_QUALITY, + HFI_PROP_CONSTANT_QUALITY, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {BITRATE_MODE}, {0}, + NULL, msm_vidc_set_constant_quality}, + {GRID, ENC, HEIC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_ENABLE, + 0, + HFI_PROP_HEIC_GRID_ENABLE, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + {0}, {0}, + NULL, msm_vidc_set_u32}, + {GOP_SIZE, ENC, HEIC, + 0, INT_MAX, 1, 0 /* all intra */, + V4L2_CID_MPEG_VIDEO_GOP_SIZE, + HFI_PROP_MAX_GOP_FRAMES, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + NULL, msm_vidc_set_u32}, + {B_FRAME, ENC, HEIC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDEO_B_FRAMES, + HFI_PROP_MAX_B_FRAMES, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + {0}, {0}, + NULL, msm_vidc_set_u32}, + {PIX_FMTS, ENC, HEIC, + MSM_VIDC_FMT_NV12, + MSM_VIDC_FMT_P010, + MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_P010, + MSM_VIDC_FMT_NV12, + 0, 0, + CAP_FLAG_ROOT, + {0}, + {PROFILE}}, + {HEVC_TIER, ENC|DEC, HEIC, + V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, + V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, + BIT(V4L2_MPEG_VIDEO_HEVC_TIER_MAIN), + V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, + V4L2_CID_MPEG_VIDEO_HEVC_TIER, + HFI_PROP_TIER, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {0}, + {0}, + NULL, msm_vidc_set_u32_enum}, + {FRAME_RATE, ENC, HEIC, + (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), + 1, (MINIMUM_FPS << 16), + 0, + HFI_PROP_FRAME_RATE, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + {0}, {0}, + NULL, msm_vidc_set_q16}, + {META_SUBFRAME_OUTPUT, ENC, HEIC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_SUBFRAME_OUTPUT, + HFI_PROP_SUBFRAME_OUTPUT}, + {COMPLEXITY, ENC, H264 | HEVC, + 0, 100, + 1, 100, + V4L2_CID_MPEG_VIDC_VENC_COMPLEXITY}, + {META_MAX_NUM_REORDER_FRAMES, DEC, HEVC | H264, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_MAX_NUM_REORDER_FRAMES, + HFI_PROP_MAX_NUM_REORDER_FRAMES}, }; static struct msm_platform_inst_capability instance_data_diwali_v2[] = { + /* {cap, domain, codec, + * min, max, step_or_mask, value, + * v4l2_id, + * hfi_id, + * flags, + * parents, + * children, + * adjust, set} + */ + + {FRAME_WIDTH, DEC, CODECS_ALL, 96, 4096, 1, 1920}, + {FRAME_WIDTH, ENC, CODECS_ALL, 128, 4096, 1, 1920}, + {LOSSLESS_FRAME_WIDTH, ENC, H264|HEVC, 128, 4096, 1, 1920}, + {SECURE_FRAME_WIDTH, DEC, H264|HEVC|VP9, 96, 4096, 1, 1920}, + {SECURE_FRAME_WIDTH, ENC, H264|HEVC, 128, 4096, 1, 1920}, + {FRAME_HEIGHT, DEC, CODECS_ALL, 96, 4096, 1, 1080}, + {FRAME_HEIGHT, ENC, CODECS_ALL, 128, 4096, 1, 1080}, + {LOSSLESS_FRAME_HEIGHT, ENC, H264|HEVC, 128, 4096, 1, 1080}, + {SECURE_FRAME_HEIGHT, DEC, H264|HEVC|VP9, 96, 4096, 1, 1080}, + {SECURE_FRAME_HEIGHT, ENC, H264|HEVC, 128, 4096, 1, 1080}, + {PIX_FMTS, ENC, H264, + MSM_VIDC_FMT_NV12, + MSM_VIDC_FMT_NV12C, + MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C, + /* Since CTSEncodeDecode test cannot handle BT 709LR, + * disabled HW RGBA encoding. + * | MSM_VIDC_FMT_RGBA8888 | MSM_VIDC_FMT_RGBA8888C, + */ + MSM_VIDC_FMT_NV12C, + 0, 0, + CAP_FLAG_ROOT, + {0}, + {META_ROI_INFO}}, + {PIX_FMTS, ENC, HEVC, + MSM_VIDC_FMT_NV12, + MSM_VIDC_FMT_TP10C, + MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C | + MSM_VIDC_FMT_P010 | MSM_VIDC_FMT_TP10C, + /* Since CTSEncodeDecode test cannot handle BT 709LR, + * disabled HW RGBA encoding. + * | MSM_VIDC_FMT_RGBA8888 | MSM_VIDC_FMT_RGBA8888C, + */ + MSM_VIDC_FMT_NV12C, + 0, 0, + CAP_FLAG_ROOT, + {0}, + {/* Do not change order of META_ROI_INFO, MIN_QUALITY, BLUR_TYPES + * Since parent -> children relationship for these cap_ids is + * as follows: + * META_ROI_INFO -> MIN_QUALITY -> BLUR_TYPES + */ + PROFILE, MIN_FRAME_QP, MAX_FRAME_QP, I_FRAME_QP, P_FRAME_QP, + B_FRAME_QP, META_ROI_INFO, MIN_QUALITY, BLUR_TYPES}}, + + {PIX_FMTS, DEC, HEVC|HEIC, + MSM_VIDC_FMT_NV12, + MSM_VIDC_FMT_TP10C, + MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C | + MSM_VIDC_FMT_P010 | MSM_VIDC_FMT_TP10C, + MSM_VIDC_FMT_NV12C, + 0, 0, + CAP_FLAG_ROOT, + {0}, + {PROFILE}}, + + {PIX_FMTS, DEC, H264, + MSM_VIDC_FMT_NV12, + MSM_VIDC_FMT_NV12C, + MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C, + MSM_VIDC_FMT_NV12C}, + + {PIX_FMTS, DEC, VP9, + MSM_VIDC_FMT_NV12, + MSM_VIDC_FMT_TP10C, + MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C | + MSM_VIDC_FMT_P010 | MSM_VIDC_FMT_TP10C, + MSM_VIDC_FMT_NV12C}, + + {MIN_BUFFERS_INPUT, ENC|DEC, CODECS_ALL, 0, 64, 1, 4, + V4L2_CID_MIN_BUFFERS_FOR_OUTPUT}, + {MIN_BUFFERS_OUTPUT, ENC|DEC, CODECS_ALL, + 0, 64, 1, 4, + V4L2_CID_MIN_BUFFERS_FOR_CAPTURE, + HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + + /* (4096 * 2176) / 256 */ + {MBPF, ENC, CODECS_ALL, 64, 34816, 1, 34816}, + /* (4096 * 2176) / 256 */ + {MBPF, DEC, CODECS_ALL, 36, 34816, 1, 34816}, + /* (4096 * 2176) / 256 */ + {LOSSLESS_MBPF, ENC, H264|HEVC, 64, 34816, 1, 34816}, + /* Batch Mode Decode */ + /* TODO: update with new values based on updated voltage corner */ + /* (1920 * 1088) / 256 */ + {BATCH_MBPF, DEC, H264|HEVC|VP9, 64, 8160, 1, 8160}, + {BATCH_FPS, DEC, H264|HEVC|VP9, 1, 30, 1, 60}, + /* (4096 * 2176) / 256 */ + {SECURE_MBPF, ENC|DEC, H264|HEVC|VP9, 64, 34816, 1, 34816}, + /* ((4096 * 2176) / 256) * 30 fps */ + {MBPS, ENC, CODECS_ALL, 64, 1044480, 1, 1044480}, + /* ((4096 * 2176) / 256) * 30 fps */ + {MBPS, DEC, CODECS_ALL, 36, 1044480, 1, 1044480}, + /* ((1920 * 1088) / 256) * 30 fps */ + {POWER_SAVE_MBPS, ENC, CODECS_ALL, 0, 244800, 1, 244800}, + + {FRAME_RATE, ENC, CODECS_ALL, + (MINIMUM_FPS<< 16), (MAXIMUM_FPS_V2 << 16), + 1, (DEFAULT_FPS << 16), + 0, + HFI_PROP_FRAME_RATE, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + {0}, {0}, + NULL, msm_vidc_set_q16}, + + {FRAME_RATE, DEC, CODECS_ALL, + (MINIMUM_FPS << 16), (MAXIMUM_FPS_V2 << 16), + 1, (DEFAULT_FPS << 16)}, + + {FRAME_RATE, DEC, VP9, + (MINIMUM_FPS << 16), (MAXIMUM_VP9_FPS << 16), + 1, (DEFAULT_FPS << 16)}, + + {OPERATING_RATE, ENC|DEC, CODECS_ALL, + (MINIMUM_FPS<< 16), (MAXIMUM_FPS_V2 << 16), + 1, (DEFAULT_FPS << 16)}, + + {OPERATING_RATE, DEC, VP9, + (MINIMUM_FPS << 16), (MAXIMUM_VP9_FPS << 16), + 1, (DEFAULT_FPS << 16)}, + + {SCALE_FACTOR, ENC, H264|HEVC, 1, 8, 1, 8}, + + {MB_CYCLES_VSP, ENC, CODECS_ALL, 25, 25, 1, 25}, + {MB_CYCLES_VSP, DEC, CODECS_ALL, 25, 25, 1, 25}, + {MB_CYCLES_VSP, DEC, VP9, 60, 60, 1, 60}, + {MB_CYCLES_VPP, ENC, CODECS_ALL, 675, 675, 1, 675}, + {MB_CYCLES_VPP, DEC, CODECS_ALL, 200, 200, 1, 200}, + {MB_CYCLES_LP, ENC, CODECS_ALL, 320, 320, 1, 320}, + {MB_CYCLES_LP, DEC, CODECS_ALL, 200, 200, 1, 200}, + {MB_CYCLES_FW, ENC|DEC, CODECS_ALL, 326389, 326389, 1, 326389}, + {MB_CYCLES_FW_VPP, ENC|DEC, CODECS_ALL, 44156, 44156, 1, 44156}, + + {SECURE_MODE, ENC|DEC, H264|HEVC|VP9, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_SECURE, + HFI_PROP_SECURE, + CAP_FLAG_NONE, + {0}, + {0}, + NULL, msm_vidc_set_u32}, + + {HFLIP, ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_HFLIP, + HFI_PROP_FLIP, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, + {0}, + {0}, + NULL, msm_vidc_set_flip}, + + {VFLIP, ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_VFLIP, + HFI_PROP_FLIP, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {0}, + {0}, + NULL, msm_vidc_set_flip}, + + {ROTATION, ENC, CODECS_ALL, + 0, 270, 90, 0, + V4L2_CID_ROTATE, + HFI_PROP_ROTATION, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + {0}, + {0}, + NULL, msm_vidc_set_rotation}, + + {SUPER_FRAME, ENC, H264|HEVC, + 0, 32, 1, 0, + V4L2_CID_MPEG_VIDC_SUPERFRAME, + 0}, + + {SLICE_INTERFACE, DEC, CODECS_ALL, + 0, 0, 0, 0, + V4L2_CID_MPEG_VIDEO_DECODER_SLICE_INTERFACE, + 0}, + + {HEADER_MODE, ENC, CODECS_ALL, + V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE, + V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME, + BIT(V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE) | + BIT(V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME), + V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE, + V4L2_CID_MPEG_VIDEO_HEADER_MODE, + HFI_PROP_SEQ_HEADER_MODE, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {0}, {0}, + NULL, msm_vidc_set_header_mode}, + + {PREPEND_SPSPPS_TO_IDR, ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDEO_PREPEND_SPSPPS_TO_IDR}, + + {META_SEQ_HDR_NAL, ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_SEQ_HEADER_NAL}, + + {WITHOUT_STARTCODE, ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE, + HFI_PROP_NAL_LENGTH_FIELD, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + {0}, {0}, + NULL, msm_vidc_set_nal_length}, + + {NAL_LENGTH_FIELD, ENC, CODECS_ALL, + V4L2_MPEG_VIDEO_HEVC_SIZE_0, + V4L2_MPEG_VIDEO_HEVC_SIZE_4, + BIT(V4L2_MPEG_VIDEO_HEVC_SIZE_0) | + BIT(V4L2_MPEG_VIDEO_HEVC_SIZE_4), + V4L2_MPEG_VIDEO_HEVC_SIZE_0, + V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD, + HFI_PROP_NAL_LENGTH_FIELD, + CAP_FLAG_MENU | CAP_FLAG_OUTPUT_PORT}, + + /* TODO: Firmware introduced enumeration type for this + * with and without seq header. + */ + {REQUEST_I_FRAME, ENC, H264|HEVC, + 0, 0, 0, 0, + V4L2_CID_MPEG_VIDEO_FORCE_KEY_FRAME, + HFI_PROP_REQUEST_SYNC_FRAME, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + NULL, msm_vidc_set_req_sync_frame}, + + /* Enc: Keeping CABAC and CAVLC as same bitrate. + * Dec: there's no use of Bitrate cap + */ + {BIT_RATE, ENC, H264|HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_BITRATE, + HFI_PROP_TOTAL_BITRATE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {ENH_LAYER_COUNT, BITRATE_MODE}, {PEAK_BITRATE}, + msm_vidc_adjust_bitrate, msm_vidc_set_bitrate}, + + {BITRATE_MODE, ENC, H264, + V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, + V4L2_MPEG_VIDEO_BITRATE_MODE_CBR, + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_VBR) | + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CBR), + V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, + V4L2_CID_MPEG_VIDEO_BITRATE_MODE, + HFI_PROP_RATE_CONTROL, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {0}, + {LTR_COUNT, IR_RANDOM, TIME_DELTA_BASED_RC, I_FRAME_QP, + P_FRAME_QP, B_FRAME_QP, ENH_LAYER_COUNT, BIT_RATE, + CONTENT_ADAPTIVE_CODING, BITRATE_BOOST, MIN_QUALITY, + VBV_DELAY, PEAK_BITRATE,SLICE_MODE, META_ROI_INFO, + BLUR_TYPES, LOWLATENCY_MODE}, + msm_vidc_adjust_bitrate_mode, msm_vidc_set_u32_enum}, + + {BITRATE_MODE, ENC, HEVC, + V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, + V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_VBR) | + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CBR) | + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CQ), + V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, + V4L2_CID_MPEG_VIDEO_BITRATE_MODE, + HFI_PROP_RATE_CONTROL, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {0}, + {LTR_COUNT, IR_RANDOM, TIME_DELTA_BASED_RC, I_FRAME_QP, + P_FRAME_QP, B_FRAME_QP, CONSTANT_QUALITY, ENH_LAYER_COUNT, + CONTENT_ADAPTIVE_CODING, BIT_RATE, + BITRATE_BOOST, MIN_QUALITY, VBV_DELAY, + PEAK_BITRATE, SLICE_MODE, META_ROI_INFO, BLUR_TYPES, + LOWLATENCY_MODE}, + msm_vidc_adjust_bitrate_mode, msm_vidc_set_u32_enum}, + + {LOSSLESS, ENC, HEVC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU}, + + {FRAME_SKIP_MODE, ENC, H264|HEVC|HEIC, + V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED, + V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT, + BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED) | + BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_LEVEL_LIMIT) | + BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT), + V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED, + V4L2_CID_MPEG_VIDEO_FRAME_SKIP_MODE, + 0, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {FRAME_RC_ENABLE, ENC, H264|HEVC|HEIC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_ENABLE, + V4L2_CID_MPEG_VIDEO_FRAME_RC_ENABLE}, + + {CONSTANT_QUALITY, ENC, HEVC, + 1, MAX_CONSTANT_QUALITY, 1, 90, + V4L2_CID_MPEG_VIDEO_CONSTANT_QUALITY, + HFI_PROP_CONSTANT_QUALITY, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {BITRATE_MODE}, {0}, + NULL, msm_vidc_set_constant_quality}, + + {GOP_SIZE, ENC, CODECS_ALL, + 0, INT_MAX, 1, 2 * DEFAULT_FPS - 1, + V4L2_CID_MPEG_VIDEO_GOP_SIZE, + HFI_PROP_MAX_GOP_FRAMES, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {ENH_LAYER_COUNT}, + {ALL_INTRA}, + msm_vidc_adjust_gop_size, msm_vidc_set_gop_size}, + + {GOP_CLOSURE, ENC, H264|HEVC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_ENABLE, + V4L2_CID_MPEG_VIDEO_GOP_CLOSURE, + 0}, + + {B_FRAME, ENC, H264|HEVC, + 0, 7, 1, 0, + V4L2_CID_MPEG_VIDEO_B_FRAMES, + HFI_PROP_MAX_B_FRAMES, + CAP_FLAG_OUTPUT_PORT, + {ENH_LAYER_COUNT}, + {ALL_INTRA}, + msm_vidc_adjust_b_frame, msm_vidc_set_u32}, + + {BLUR_TYPES, ENC, CODECS_ALL, + VIDC_BLUR_NONE, VIDC_BLUR_ADAPTIVE, 1, VIDC_BLUR_ADAPTIVE, + V4L2_CID_MPEG_VIDC_VIDEO_BLUR_TYPES, + HFI_PROP_BLUR_TYPES, + CAP_FLAG_OUTPUT_PORT, + {PIX_FMTS, BITRATE_MODE, CONTENT_ADAPTIVE_CODING}, + {BLUR_RESOLUTION}, + msm_vidc_adjust_blur_type, msm_vidc_set_u32_enum}, + + {BLUR_TYPES, ENC, H264|HEVC, + VIDC_BLUR_NONE, VIDC_BLUR_ADAPTIVE, 1, VIDC_BLUR_ADAPTIVE, + V4L2_CID_MPEG_VIDC_VIDEO_BLUR_TYPES, + HFI_PROP_BLUR_TYPES, + CAP_FLAG_OUTPUT_PORT, + {PIX_FMTS, BITRATE_MODE, CONTENT_ADAPTIVE_CODING, MIN_QUALITY}, + {BLUR_RESOLUTION}, + msm_vidc_adjust_blur_type, msm_vidc_set_u32_enum}, + + {BLUR_RESOLUTION, ENC, CODECS_ALL, + 0, S32_MAX, 1, 0, + V4L2_CID_MPEG_VIDC_VIDEO_BLUR_RESOLUTION, + HFI_PROP_BLUR_RESOLUTION, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {BLUR_TYPES}, + {0}, + msm_vidc_adjust_blur_resolution, msm_vidc_set_blur_resolution}, + + {CSC, ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, + HFI_PROP_CSC}, + + {CSC_CUSTOM_MATRIX, ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_VIDEO_VPE_CSC_CUSTOM_MATRIX, + HFI_PROP_CSC_MATRIX, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + {0}, {0}, + NULL, msm_vidc_set_csc_custom_matrix}, + + {LOWLATENCY_MODE, ENC, H264 | HEVC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_LOWLATENCY_REQUEST, + 0, + CAP_FLAG_NONE, + {BITRATE_MODE}, + {STAGE}, + msm_vidc_adjust_lowlatency_mode, NULL}, + + {LOWLATENCY_MODE, DEC, H264|HEVC|VP9, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_LOWLATENCY_REQUEST, + HFI_PROP_SEQ_CHANGE_AT_SYNC_FRAME, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {LTR_COUNT, ENC, H264|HEVC, + 0, 2, 1, 0, + V4L2_CID_MPEG_VIDEO_LTR_COUNT, + HFI_PROP_LTR_COUNT, + CAP_FLAG_OUTPUT_PORT, + {BITRATE_MODE, ALL_INTRA}, {0}, + msm_vidc_adjust_ltr_count, msm_vidc_set_u32}, + + {USE_LTR, ENC, H264|HEVC, + INVALID_DEFAULT_MARK_OR_USE_LTR, + ((1 << MAX_LTR_FRAME_COUNT) - 1), + 1, INVALID_DEFAULT_MARK_OR_USE_LTR, + V4L2_CID_MPEG_VIDEO_USE_LTR_FRAMES, + HFI_PROP_LTR_USE, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + msm_vidc_adjust_use_ltr, msm_vidc_set_use_and_mark_ltr}, + + {MARK_LTR, ENC, H264|HEVC, + INVALID_DEFAULT_MARK_OR_USE_LTR, + (MAX_LTR_FRAME_COUNT - 1), + 1, INVALID_DEFAULT_MARK_OR_USE_LTR, + V4L2_CID_MPEG_VIDEO_FRAME_LTR_INDEX, + HFI_PROP_LTR_MARK, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + msm_vidc_adjust_mark_ltr, msm_vidc_set_use_and_mark_ltr}, + + {BASELAYER_PRIORITY, ENC, H264, + 0, MAX_BASE_LAYER_PRIORITY_ID, 1, 0, + V4L2_CID_MPEG_VIDEO_BASELAYER_PRIORITY_ID, + HFI_PROP_BASELAYER_PRIORITYID, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + + {IR_RANDOM, ENC, H264|HEVC, + 0, INT_MAX, 1, 0, + V4L2_CID_MPEG_VIDC_INTRA_REFRESH_PERIOD, + HFI_PROP_IR_RANDOM_PERIOD, + CAP_FLAG_OUTPUT_PORT, + {BITRATE_MODE, ALL_INTRA}, {0}, + msm_vidc_adjust_ir_random, msm_vidc_set_u32}, + + {AU_DELIMITER, ENC, H264|HEVC, + V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDEO_AU_DELIMITER, + HFI_PROP_AUD, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + {0}, {0}, + NULL, msm_vidc_set_u32}, + + {TIME_DELTA_BASED_RC, ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_ENABLE, + V4L2_CID_MPEG_VIDC_TIME_DELTA_BASED_RC, + HFI_PROP_TIME_DELTA_BASED_RATE_CONTROL, + CAP_FLAG_OUTPUT_PORT, + {BITRATE_MODE}, {0}, + msm_vidc_adjust_delta_based_rc, msm_vidc_set_u32}, + + {CONTENT_ADAPTIVE_CODING, ENC, H264|HEVC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_ENABLE, + V4L2_CID_MPEG_VIDC_CONTENT_ADAPTIVE_CODING, + HFI_PROP_CONTENT_ADAPTIVE_CODING, + CAP_FLAG_OUTPUT_PORT, + {BITRATE_MODE, MIN_QUALITY}, + {BLUR_TYPES}, + msm_vidc_adjust_cac, + msm_vidc_set_vbr_related_properties}, + + {BITRATE_BOOST, ENC, H264|HEVC, + 0, MAX_BITRATE_BOOST, 25, MAX_BITRATE_BOOST, + V4L2_CID_MPEG_VIDC_QUALITY_BITRATE_BOOST, + HFI_PROP_BITRATE_BOOST, + CAP_FLAG_OUTPUT_PORT, + {BITRATE_MODE, MIN_QUALITY}, + {0}, + msm_vidc_adjust_bitrate_boost, + msm_vidc_set_vbr_related_properties}, + + {MIN_QUALITY, ENC, H264, + 0, MAX_SUPPORTED_MIN_QUALITY, 70, MAX_SUPPORTED_MIN_QUALITY, + 0, + HFI_PROP_MAINTAIN_MIN_QUALITY, + CAP_FLAG_OUTPUT_PORT, + {BITRATE_MODE, ENH_LAYER_COUNT, META_ROI_INFO}, + {CONTENT_ADAPTIVE_CODING, BITRATE_BOOST, BLUR_TYPES}, + msm_vidc_adjust_min_quality, + msm_vidc_set_vbr_related_properties}, + + {MIN_QUALITY, ENC, HEVC, + 0, MAX_SUPPORTED_MIN_QUALITY, 70, MAX_SUPPORTED_MIN_QUALITY, + 0, + HFI_PROP_MAINTAIN_MIN_QUALITY, + CAP_FLAG_OUTPUT_PORT, + {BITRATE_MODE, PIX_FMTS, ENH_LAYER_COUNT, + META_ROI_INFO}, + {CONTENT_ADAPTIVE_CODING, BITRATE_BOOST, BLUR_TYPES}, + msm_vidc_adjust_min_quality, + msm_vidc_set_vbr_related_properties}, + + {VBV_DELAY, ENC, H264|HEVC, + 200, 300, 100, 300, + V4L2_CID_MPEG_VIDEO_VBV_DELAY, + HFI_PROP_VBV_DELAY, + CAP_FLAG_OUTPUT_PORT, + {BITRATE_MODE}, + {0}, + NULL, msm_vidc_set_cbr_related_properties}, + + {PEAK_BITRATE, ENC, H264|HEVC, + /* default peak bitrate is 10% larger than avrg bitrate */ + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_BITRATE_PEAK, + HFI_PROP_TOTAL_PEAK_BITRATE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {BITRATE_MODE, BIT_RATE}, + {0}, + msm_vidc_adjust_peak_bitrate, + msm_vidc_set_cbr_related_properties}, + + {MIN_FRAME_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, + V4L2_CID_MPEG_VIDEO_H264_MIN_QP, + HFI_PROP_MIN_QP_PACKED, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + {0}, {0}, + NULL, msm_vidc_set_min_qp}, + + {MIN_FRAME_QP, ENC, HEVC|HEIC, + MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, + V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP, + HFI_PROP_MIN_QP_PACKED, + CAP_FLAG_OUTPUT_PORT, + {PIX_FMTS}, {0}, + msm_vidc_adjust_hevc_min_qp, msm_vidc_set_min_qp}, + + {I_FRAME_MIN_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, + V4L2_CID_MPEG_VIDEO_H264_I_FRAME_MIN_QP}, + + {I_FRAME_MIN_QP, ENC, HEVC|HEIC, + MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, + V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_MIN_QP}, + + {P_FRAME_MIN_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, + V4L2_CID_MPEG_VIDEO_H264_P_FRAME_MIN_QP}, + + {P_FRAME_MIN_QP, ENC, HEVC|HEIC, + MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, + V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_MIN_QP}, + + {B_FRAME_MIN_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, + V4L2_CID_MPEG_VIDEO_H264_B_FRAME_MIN_QP}, + + {B_FRAME_MIN_QP, ENC, HEVC|HEIC, + MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, + V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_MIN_QP}, + + {MAX_FRAME_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_H264_MAX_QP, + HFI_PROP_MAX_QP_PACKED, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + {0}, {0}, + NULL, msm_vidc_set_max_qp}, + + {MAX_FRAME_QP, ENC, HEVC|HEIC, + MIN_QP_10BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP, + HFI_PROP_MAX_QP_PACKED, + CAP_FLAG_OUTPUT_PORT, + {PIX_FMTS}, {0}, + msm_vidc_adjust_hevc_max_qp, msm_vidc_set_max_qp}, + + {I_FRAME_MAX_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_H264_I_FRAME_MAX_QP}, + + {I_FRAME_MAX_QP, ENC, HEVC|HEIC, + MIN_QP_10BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_MAX_QP}, + + {P_FRAME_MAX_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_H264_P_FRAME_MAX_QP}, + + {P_FRAME_MAX_QP, ENC, HEVC|HEIC, + MIN_QP_10BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_MAX_QP}, + + {B_FRAME_MAX_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_H264_B_FRAME_MAX_QP}, + + {B_FRAME_MAX_QP, ENC, HEVC|HEIC, + MIN_QP_10BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_MAX_QP}, + + {I_FRAME_QP, ENC, HEVC, + MIN_QP_10BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {PIX_FMTS, BITRATE_MODE}, {0}, + msm_vidc_adjust_hevc_i_frame_qp, msm_vidc_set_frame_qp}, + + {I_FRAME_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {BITRATE_MODE}, {0}, + NULL, msm_vidc_set_frame_qp}, + + {P_FRAME_QP, ENC, HEVC, + MIN_QP_10BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {PIX_FMTS, BITRATE_MODE}, {0}, + msm_vidc_adjust_hevc_p_frame_qp, msm_vidc_set_frame_qp}, + + {P_FRAME_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {BITRATE_MODE}, {0}, + NULL, msm_vidc_set_frame_qp}, + + {B_FRAME_QP, ENC, HEVC, + MIN_QP_10BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {PIX_FMTS, BITRATE_MODE}, {0}, + msm_vidc_adjust_hevc_b_frame_qp, msm_vidc_set_frame_qp}, + + {B_FRAME_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_H264_B_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {BITRATE_MODE}, {0}, + NULL, msm_vidc_set_frame_qp}, + + {LAYER_TYPE, ENC, HEVC, + V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B, + V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P, + BIT(V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B) | + BIT(V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P), + V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE, + HFI_PROP_LAYER_ENCODING_TYPE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LAYER_TYPE, ENC, H264, + V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_B, + V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P, + BIT(V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_B) | + BIT(V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P), + V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P, + V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_TYPE, + HFI_PROP_LAYER_ENCODING_TYPE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LAYER_ENABLE, ENC, H264, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING, + HFI_PROP_LAYER_ENCODING_TYPE, + CAP_FLAG_OUTPUT_PORT}, + + {ENH_LAYER_COUNT, ENC, HEVC, + 0, 5, 1, 0, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER, + HFI_PROP_LAYER_COUNT, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {BITRATE_MODE, META_EVA_STATS}, + {GOP_SIZE, B_FRAME, BIT_RATE, MIN_QUALITY}, + msm_vidc_adjust_layer_count, msm_vidc_set_layer_count_and_type}, + + {ENH_LAYER_COUNT, ENC, H264, + 0, 5, 1, 0, + V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_LAYER, + HFI_PROP_LAYER_COUNT, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {BITRATE_MODE, META_EVA_STATS}, + {GOP_SIZE, B_FRAME, BIT_RATE, MIN_QUALITY}, + msm_vidc_adjust_layer_count, msm_vidc_set_layer_count_and_type}, + + /* + * layer bitrate is treated as BIT_RATE cap sibling and + * is handled in bitrate adjust and set functions + */ + {L0_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L0_BR, + HFI_PROP_BITRATE_LAYER1, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, + + {L1_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L1_BR, + HFI_PROP_BITRATE_LAYER2, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, + + {L2_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L2_BR, + HFI_PROP_BITRATE_LAYER3, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, + + {L3_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L3_BR, + HFI_PROP_BITRATE_LAYER4, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, + + {L4_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L4_BR, + HFI_PROP_BITRATE_LAYER5, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, + + {L5_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L5_BR, + HFI_PROP_BITRATE_LAYER6, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, + + {L0_BR, ENC, H264, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L0_BR, + HFI_PROP_BITRATE_LAYER1, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, + + {L1_BR, ENC, H264, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L1_BR, + HFI_PROP_BITRATE_LAYER2, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, + + {L2_BR, ENC, H264, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L2_BR, + HFI_PROP_BITRATE_LAYER3, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, + + {L3_BR, ENC, H264, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L3_BR, + HFI_PROP_BITRATE_LAYER4, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, + + {L4_BR, ENC, H264, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L4_BR, + HFI_PROP_BITRATE_LAYER5, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, + + {L5_BR, ENC, H264, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L5_BR, + HFI_PROP_BITRATE_LAYER6, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, + + {ENTROPY_MODE, ENC, H264, + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC, + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, + BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC) | + BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC), + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, + V4L2_CID_MPEG_VIDEO_H264_ENTROPY_MODE, + HFI_PROP_CABAC_SESSION, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {PROFILE}, + {0}, + msm_vidc_adjust_entropy_mode, msm_vidc_set_u32}, + + {ENTROPY_MODE, DEC, H264|HEVC|VP9, + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC, + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, + BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC) | + BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC), + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, + 0, + HFI_PROP_CABAC_SESSION}, + + /* H264 does not support 10 bit, PIX_FMTS would not be a Parent for this */ + {PROFILE, ENC, H264, + V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE, + V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH, + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_BASELINE) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_MAIN) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_HIGH), + V4L2_MPEG_VIDEO_H264_PROFILE_HIGH, + V4L2_CID_MPEG_VIDEO_H264_PROFILE, + HFI_PROP_PROFILE, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {0}, + {ENTROPY_MODE, TRANSFORM_8X8}, + NULL, msm_vidc_set_u32_enum}, + + {PROFILE, DEC, H264, + V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE, + V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH, + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_BASELINE) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_MAIN) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_HIGH), + V4L2_MPEG_VIDEO_H264_PROFILE_HIGH, + V4L2_CID_MPEG_VIDEO_H264_PROFILE, + HFI_PROP_PROFILE, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {0}, + {ENTROPY_MODE}, + NULL, msm_vidc_set_u32_enum}, + + {PROFILE, ENC|DEC, HEVC|HEIC, + V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN, + V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE, + BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN) | + BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE) | + BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10) | + BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE), + V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN, + V4L2_CID_MPEG_VIDEO_HEVC_PROFILE, + HFI_PROP_PROFILE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {PIX_FMTS}, + {0}, + msm_vidc_adjust_profile, msm_vidc_set_u32_enum}, + + {PROFILE, DEC, VP9, + V4L2_MPEG_VIDEO_VP9_PROFILE_0, + V4L2_MPEG_VIDEO_VP9_PROFILE_2, + BIT(V4L2_MPEG_VIDEO_VP9_PROFILE_0) | + BIT(V4L2_MPEG_VIDEO_VP9_PROFILE_2), + V4L2_MPEG_VIDEO_VP9_PROFILE_0, + V4L2_CID_MPEG_VIDEO_VP9_PROFILE, + HFI_PROP_PROFILE, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {0}, + {0}, + NULL, msm_vidc_set_u32_enum}, + + {LEVEL, DEC, VP9, + V4L2_MPEG_VIDEO_VP9_LEVEL_1_0, + V4L2_MPEG_VIDEO_VP9_LEVEL_5_0, + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_1_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_1_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_2_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_3_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_4_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_0), + V4L2_MPEG_VIDEO_VP9_LEVEL_5_0, + V4L2_CID_MPEG_VIDEO_VP9_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {0}, + {0}, + NULL, msm_vidc_set_u32_enum}, + + {LEVEL, DEC, H264, + V4L2_MPEG_VIDEO_H264_LEVEL_1_0, + V4L2_MPEG_VIDEO_H264_LEVEL_5_2, + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1B) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_3) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_2), + V4L2_MPEG_VIDEO_H264_LEVEL_6_0, + V4L2_CID_MPEG_VIDEO_H264_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {0}, + {0}, + NULL, msm_vidc_set_u32_enum}, + + {LEVEL, ENC, H264, + V4L2_MPEG_VIDEO_H264_LEVEL_1_0, + V4L2_MPEG_VIDEO_H264_LEVEL_5_2, + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1B) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_3) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_2), + V4L2_MPEG_VIDEO_H264_LEVEL_5_2, + V4L2_CID_MPEG_VIDEO_H264_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {0}, + {0}, + NULL, msm_vidc_set_level}, + + {LEVEL, DEC, HEVC|HEIC, + V4L2_MPEG_VIDEO_HEVC_LEVEL_1, + V4L2_MPEG_VIDEO_HEVC_LEVEL_5, + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5), + V4L2_MPEG_VIDEO_HEVC_LEVEL_5, + V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {0}, + {0}, + NULL, msm_vidc_set_u32_enum}, + + {LEVEL, ENC, HEVC|HEIC, + V4L2_MPEG_VIDEO_HEVC_LEVEL_1, + V4L2_MPEG_VIDEO_HEVC_LEVEL_5, + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5), + V4L2_MPEG_VIDEO_HEVC_LEVEL_5, + V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {0}, + {0}, + NULL, msm_vidc_set_level}, + + /* TODO: Bring the VP9 Level upstream GKI change, and level cap here: + * go/videogki + */ + + {HEVC_TIER, ENC|DEC, HEVC, + V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, + V4L2_MPEG_VIDEO_HEVC_TIER_HIGH, + BIT(V4L2_MPEG_VIDEO_HEVC_TIER_MAIN) | + BIT(V4L2_MPEG_VIDEO_HEVC_TIER_HIGH), + V4L2_MPEG_VIDEO_HEVC_TIER_HIGH, + V4L2_CID_MPEG_VIDEO_HEVC_TIER, + HFI_PROP_TIER, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {0}, + {0}, + NULL, msm_vidc_set_u32_enum}, + + {LF_MODE, ENC, H264, + V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED, + DB_H264_DISABLE_SLICE_BOUNDARY, + BIT(V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED) | + BIT(V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_DISABLED) | + BIT(DB_H264_DISABLE_SLICE_BOUNDARY), + V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED, + V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_MODE, + HFI_PROP_DEBLOCKING_MODE, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {0}, {0}, + NULL, msm_vidc_set_deblock_mode}, + + {LF_MODE, ENC, HEVC|HEIC, + V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_DISABLED, + DB_HEVC_DISABLE_SLICE_BOUNDARY, + BIT(V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_DISABLED) | + BIT(V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_ENABLED) | + BIT(DB_HEVC_DISABLE_SLICE_BOUNDARY), + V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_ENABLED, + V4L2_CID_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE, + HFI_PROP_DEBLOCKING_MODE, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {0}, {0}, + NULL, msm_vidc_set_deblock_mode}, + + {LF_ALPHA, ENC, H264, + -6, 6, 1, 0, + V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_ALPHA}, + + {LF_ALPHA, ENC, HEVC|HEIC, + -6, 6, 1, 0, + V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2}, + + {LF_BETA, ENC, H264, + -6, 6, 1, 0, + V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_BETA}, + + {LF_BETA, ENC, HEVC|HEIC, + -6, 6, 1, 0, + V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2}, + + {SLICE_MODE, ENC, H264|HEVC|HEIC, + V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, + V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_BYTES, + BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE) | + BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_MB) | + BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_BYTES), + V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, + V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE, + 0, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {BITRATE_MODE, ALL_INTRA}, {0}, + msm_vidc_adjust_slice_count, msm_vidc_set_slice_count}, + + {SLICE_MAX_BYTES, ENC, H264|HEVC|HEIC, + MIN_SLICE_BYTE_SIZE, MAX_SLICE_BYTE_SIZE, + 1, MIN_SLICE_BYTE_SIZE, + V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES, + HFI_PROP_MULTI_SLICE_BYTES_COUNT, + CAP_FLAG_OUTPUT_PORT}, + + {SLICE_MAX_MB, ENC, H264|HEVC|HEIC, + 1, MAX_SLICE_MB_SIZE, 1, 1, + V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB, + HFI_PROP_MULTI_SLICE_MB_COUNT, + CAP_FLAG_OUTPUT_PORT}, + + // TODO: MB level RC - mapping + {MB_RC, ENC, H264|HEVC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_ENABLE, + V4L2_CID_MPEG_VIDEO_MB_RC_ENABLE, + 0, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + + {TRANSFORM_8X8, ENC, H264, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_ENABLE, + V4L2_CID_MPEG_VIDEO_H264_8X8_TRANSFORM, + HFI_PROP_8X8_TRANSFORM, + CAP_FLAG_OUTPUT_PORT, + {PROFILE}, {0}, + msm_vidc_adjust_transform_8x8, msm_vidc_set_u32}, + + {CHROMA_QP_INDEX_OFFSET, ENC, HEVC, + MIN_CHROMA_QP_OFFSET, MAX_CHROMA_QP_OFFSET, + 1, MAX_CHROMA_QP_OFFSET, + V4L2_CID_MPEG_VIDEO_H264_CHROMA_QP_INDEX_OFFSET, + HFI_PROP_CHROMA_QP_OFFSET, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + {0}, {0}, + msm_vidc_adjust_chroma_qp_index_offset, + msm_vidc_set_chroma_qp_index_offset}, + + {DISPLAY_DELAY_ENABLE, DEC, H264|HEVC|VP9, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY_ENABLE, + HFI_PROP_DECODE_ORDER_OUTPUT, + CAP_FLAG_ROOT | CAP_FLAG_INPUT_PORT}, + + {DISPLAY_DELAY, DEC, H264|HEVC|VP9, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY, + HFI_PROP_DECODE_ORDER_OUTPUT, + CAP_FLAG_ROOT | CAP_FLAG_INPUT_PORT}, + + /* conceal color */ + {CONCEAL_COLOR_8BIT, DEC, CODECS_ALL, 0x0, 0xff3fcff, 1, + DEFAULT_VIDEO_CONCEAL_COLOR_BLACK, + V4L2_CID_MPEG_VIDEO_MUTE_YUV, + HFI_PROP_CONCEAL_COLOR_8BIT, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + + {CONCEAL_COLOR_10BIT, DEC, CODECS_ALL, 0x0, 0x3fffffff, 1, + DEFAULT_VIDEO_CONCEAL_COLOR_BLACK, + V4L2_CID_MPEG_VIDEO_MUTE_YUV, + HFI_PROP_CONCEAL_COLOR_10BIT, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + + // TODO + {STAGE, DEC|ENC, CODECS_ALL, + MSM_VIDC_STAGE_1, + MSM_VIDC_STAGE_2, 1, + MSM_VIDC_STAGE_2, + 0, + HFI_PROP_STAGE, + CAP_FLAG_ROOT, + {0}, {0}, + NULL, msm_vidc_set_stage}, + + {STAGE, ENC, H264 | HEVC, + MSM_VIDC_STAGE_1, + MSM_VIDC_STAGE_2, 1, + MSM_VIDC_STAGE_2, + 0, + HFI_PROP_STAGE, + CAP_FLAG_NONE, + {LOWLATENCY_MODE}, {0}, + NULL, msm_vidc_set_stage}, + + {PIPE, DEC|ENC, CODECS_ALL, + MSM_VIDC_PIPE_1, + MSM_VIDC_PIPE_2, 1, + MSM_VIDC_PIPE_2, + 0, + HFI_PROP_PIPE, + CAP_FLAG_ROOT, + {0}, {0}, + NULL, msm_vidc_set_pipe}, + {POC, DEC, H264, 0, 18, 1, 1}, + {QUALITY_MODE, ENC, CODECS_ALL, + MSM_VIDC_MAX_QUALITY_MODE, + MSM_VIDC_POWER_SAVE_MODE, 1, + MSM_VIDC_POWER_SAVE_MODE}, + + {CODED_FRAMES, DEC, H264|HEVC|HEIC, + CODED_FRAMES_PROGRESSIVE, CODED_FRAMES_INTERLACE, + 1, CODED_FRAMES_PROGRESSIVE, + 0, + HFI_PROP_CODED_FRAMES}, + + {BIT_DEPTH, DEC, CODECS_ALL, BIT_DEPTH_8, BIT_DEPTH_10, 1, BIT_DEPTH_8, + 0, + HFI_PROP_LUMA_CHROMA_BIT_DEPTH}, + + {CODEC_CONFIG, DEC, H264|HEVC|HEIC, 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_CODEC_CONFIG, 0, + CAP_FLAG_DYNAMIC_ALLOWED}, + + {BITSTREAM_SIZE_OVERWRITE, DEC, CODECS_ALL, 0, INT_MAX, 1, 0, + V4L2_CID_MPEG_VIDC_MIN_BITSTREAM_SIZE_OVERWRITE}, + + {THUMBNAIL_MODE, DEC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_THUMBNAIL_MODE, + HFI_PROP_THUMBNAIL_MODE}, + + {DEFAULT_HEADER, DEC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, + HFI_PROP_DEC_DEFAULT_HEADER}, + + {RAP_FRAME, DEC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_ENABLE, + 0, + HFI_PROP_DEC_START_FROM_RAP_FRAME, + CAP_FLAG_INPUT_PORT, + {0}, {0}, + NULL, NULL}, + + {SEQ_CHANGE_AT_SYNC_FRAME, DEC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_ENABLE, + 0, + HFI_PROP_SEQ_CHANGE_AT_SYNC_FRAME, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {PRIORITY, DEC|ENC, CODECS_ALL, + 0, 2, 1, 1, + V4L2_CID_MPEG_VIDC_PRIORITY, + HFI_PROP_SESSION_PRIORITY, + CAP_FLAG_ROOT | CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + msm_vidc_adjust_session_priority, msm_vidc_set_session_priority}, + + {ENC_IP_CR, ENC, CODECS_ALL, + 0, S32_MAX, 1, 0, + V4L2_CID_MPEG_VIDC_ENC_INPUT_COMPRESSION_RATIO, + 0, CAP_FLAG_DYNAMIC_ALLOWED}, + + {DPB_LIST, DEC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, + HFI_PROP_DPB_LIST, + CAP_FLAG_OUTPUT_PORT, + {0}, {0}, + NULL, NULL}, + + {ALL_INTRA, ENC, H264|HEVC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, + 0, + CAP_FLAG_OUTPUT_PORT, + {GOP_SIZE, B_FRAME}, + {LTR_COUNT, IR_RANDOM, SLICE_MODE}, + msm_vidc_adjust_all_intra, NULL}, + + {META_LTR_MARK_USE, ENC, H264|HEVC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_LTR_MARK_USE_DETAILS, + HFI_PROP_LTR_MARK_USE_DETAILS}, + + {META_SEQ_HDR_NAL, ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_SEQ_HEADER_NAL, + HFI_PROP_METADATA_SEQ_HEADER_NAL}, + + {META_DPB_MISR, DEC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_DPB_LUMA_CHROMA_MISR, + HFI_PROP_DPB_LUMA_CHROMA_MISR}, + + {META_OPB_MISR, DEC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_OPB_LUMA_CHROMA_MISR, + HFI_PROP_OPB_LUMA_CHROMA_MISR}, + + {META_INTERLACE, DEC, H264, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_INTERLACE, + HFI_PROP_INTERLACE_INFO}, + + {META_TIMESTAMP, DEC | ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_TIMESTAMP, + HFI_PROP_TIMESTAMP}, + + {META_CONCEALED_MB_CNT, DEC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_CONCEALED_MB_COUNT, + HFI_PROP_CONEALED_MB_COUNT}, + + {META_HIST_INFO, DEC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_HISTOGRAM_INFO, + HFI_PROP_HISTOGRAM_INFO}, + + {META_SEI_MASTERING_DISP, DEC|ENC, HEVC|HEIC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_SEI_MASTERING_DISPLAY_COLOUR, + HFI_PROP_SEI_MASTERING_DISPLAY_COLOUR}, + + {META_SEI_CLL, DEC|ENC, HEVC|HEIC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_SEI_CONTENT_LIGHT_LEVEL, + HFI_PROP_SEI_CONTENT_LIGHT_LEVEL}, + + {META_HDR10PLUS, DEC | ENC, HEVC|HEIC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_HDR10PLUS, + HFI_PROP_SEI_HDR10PLUS_USERDATA}, + + {META_EVA_STATS, ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_EVA_STATS, + HFI_PROP_EVA_STAT_INFO, + CAP_FLAG_ROOT, + {0}, + {ENH_LAYER_COUNT}}, + + {META_BUF_TAG, DEC | ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_BUFFER_TAG, + HFI_PROP_BUFFER_TAG}, + + {META_DPB_TAG_LIST, DEC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_DPB_TAG_LIST, + HFI_PROP_DPB_TAG_LIST}, + + {META_OUTPUT_BUF_TAG, DEC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, + HFI_PROP_BUFFER_TAG}, + + {META_SUBFRAME_OUTPUT, DEC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_SUBFRAME_OUTPUT, + HFI_PROP_SUBFRAME_OUTPUT}, + + {META_ENC_QP_METADATA, ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_ENC_QP_METADATA, + HFI_PROP_ENC_QP_METADATA}, + + {META_ROI_INFO, ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_ROI_INFO, + HFI_PROP_ROI_INFO, + CAP_FLAG_INPUT_PORT, + {BITRATE_MODE, PIX_FMTS}, + {0}, + msm_vidc_adjust_roi_info, NULL}, + + {META_ROI_INFO, ENC, H264|HEVC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_ROI_INFO, + HFI_PROP_ROI_INFO, + CAP_FLAG_INPUT_PORT, + {BITRATE_MODE, PIX_FMTS}, + {MIN_QUALITY}, + msm_vidc_adjust_roi_info, NULL}, + + {META_DEC_QP_METADATA, DEC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_DEC_QP_METADATA, + HFI_PROP_DEC_QP_METADATA}, + + /* configure image properties */ + {FRAME_WIDTH, ENC, HEIC, 128, 16384, 1, 16384}, + {FRAME_HEIGHT, ENC, HEIC, 128, 16384, 1, 16384}, + {MIN_BUFFERS_INPUT, ENC|DEC, HEIC, 0, 64, 1, 1, + V4L2_CID_MIN_BUFFERS_FOR_OUTPUT}, + {MBPF, DEC, HEIC, 36, 262144, 1, 262144 }, /* ((8192x8192)/256) */ + {MBPF, ENC, HEIC, 64, 1048576, 1, 1048576}, /* ((16384x16384)/256) */ + {MBPS, DEC, HEIC, 36, 262144, 1, 262144 }, /* ((8192x8192)/256)@1fps */ + {MBPS, ENC, HEIC, 64, 1048576, 1, 1048576}, /* ((16384x16384)/256)@1fps */ + {BITRATE_MODE, ENC, HEIC, + V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, + V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CQ), + V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, + V4L2_CID_MPEG_VIDEO_BITRATE_MODE, + HFI_PROP_RATE_CONTROL, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {0}, + {TIME_DELTA_BASED_RC, CONSTANT_QUALITY}, + msm_vidc_adjust_bitrate_mode, msm_vidc_set_u32_enum}, + {TIME_DELTA_BASED_RC, ENC, HEIC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_TIME_DELTA_BASED_RC, + HFI_PROP_TIME_DELTA_BASED_RATE_CONTROL, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + {BITRATE_MODE}, {0}, + msm_vidc_adjust_delta_based_rc, msm_vidc_set_u32}, + {CONSTANT_QUALITY, ENC, HEIC, + 1, MAX_CONSTANT_QUALITY, 1, 100, + V4L2_CID_MPEG_VIDEO_CONSTANT_QUALITY, + HFI_PROP_CONSTANT_QUALITY, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {BITRATE_MODE}, {0}, + NULL, msm_vidc_set_constant_quality}, + {GRID, ENC, HEIC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_ENABLE, + 0, + HFI_PROP_HEIC_GRID_ENABLE, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + {0}, {0}, + NULL, msm_vidc_set_u32}, + {GOP_SIZE, ENC, HEIC, + 0, INT_MAX, 1, 0 /* all intra */, + V4L2_CID_MPEG_VIDEO_GOP_SIZE, + HFI_PROP_MAX_GOP_FRAMES, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + NULL, msm_vidc_set_u32}, + {B_FRAME, ENC, HEIC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDEO_B_FRAMES, + HFI_PROP_MAX_B_FRAMES, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + {0}, {0}, + NULL, msm_vidc_set_u32}, + {PIX_FMTS, ENC, HEIC, + MSM_VIDC_FMT_NV12, + MSM_VIDC_FMT_P010, + MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_P010, + MSM_VIDC_FMT_NV12, + 0, 0, + CAP_FLAG_ROOT, + {0}, + {PROFILE}}, + {HEVC_TIER, ENC|DEC, HEIC, + V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, + V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, + BIT(V4L2_MPEG_VIDEO_HEVC_TIER_MAIN), + V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, + V4L2_CID_MPEG_VIDEO_HEVC_TIER, + HFI_PROP_TIER, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {0}, + {0}, + NULL, msm_vidc_set_u32_enum}, + {FRAME_RATE, ENC, HEIC, + (MINIMUM_FPS << 16), (MAXIMUM_FPS_V2 << 16), + 1, (MINIMUM_FPS << 16), + 0, + HFI_PROP_FRAME_RATE, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + {0}, {0}, + NULL, msm_vidc_set_q16}, + {META_SUBFRAME_OUTPUT, ENC, HEIC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_SUBFRAME_OUTPUT, + HFI_PROP_SUBFRAME_OUTPUT}, + {COMPLEXITY, ENC, H264 | HEVC, + 0, 100, + 1, 100, + V4L2_CID_MPEG_VIDC_VENC_COMPLEXITY}, + {META_MAX_NUM_REORDER_FRAMES, DEC, HEVC | H264, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_MAX_NUM_REORDER_FRAMES, + HFI_PROP_MAX_NUM_REORDER_FRAMES}, }; static struct allowed_clock_rates_table clock_data_diwali_v1[] = { From cf52dc1e6c113f9e3c3599619a6af44b947d5b20 Mon Sep 17 00:00:00 2001 From: Priyanka Gujjula Date: Wed, 10 Nov 2021 12:04:08 +0530 Subject: [PATCH 0464/1061] video: driver: Correct max mbps calc for slicing Max mbps has to be calculated using max fps. Change-Id: Ic0e3b337c7327e9a9bd4ada6b2008ccb6fa1be04 Signed-off-by: Priyanka Gujjula --- driver/vidc/src/msm_vidc_control.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 3963595f90..33b0689f8d 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -1346,7 +1346,7 @@ int msm_vidc_adjust_slice_count(void *instance, struct v4l2_ctrl *ctrl) mbpf = NUM_MBS_PER_FRAME(output_height, output_width); mbps = NUM_MBS_PER_SEC(output_height, output_width, fps); max_mbpf = NUM_MBS_PER_FRAME(max_height, max_width); - max_mbps = NUM_MBS_PER_SEC(max_height, max_width, fps); + max_mbps = NUM_MBS_PER_SEC(max_height, max_width, MAX_SLICES_FRAME_RATE); if (mbpf > max_mbpf || mbps > max_mbps) { adjusted_value = V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE; From 4b9c19e5e523b2c9b11f0c3ad3da6d585318da23 Mon Sep 17 00:00:00 2001 From: Priyanka Gujjula Date: Wed, 10 Nov 2021 14:21:16 +0530 Subject: [PATCH 0465/1061] video: driver: diwali: read efuse from sw_range4 HLOS doesnot have access to raw region. Instead, read from sw_range4 region which are sense registers for raw region. Change-Id: I662266b6557756d9bf6ef687f81b7869a792e7f7 Signed-off-by: Priyanka Gujjula --- driver/platform/diwali/src/msm_vidc_diwali.c | 4 ++-- driver/vidc/inc/msm_vidc_platform.h | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/driver/platform/diwali/src/msm_vidc_diwali.c b/driver/platform/diwali/src/msm_vidc_diwali.c index 7344b472fa..a072ee7767 100644 --- a/driver/platform/diwali/src/msm_vidc_diwali.c +++ b/driver/platform/diwali/src/msm_vidc_diwali.c @@ -1665,9 +1665,9 @@ static u32 bus_bw_nrt[] = { static struct msm_vidc_efuse_data efuse_data_diwali[] = { /* IRIS_4K60_FMAX_LIMIT_EFUSE - max 4K@60 */ - EFUSE_ENTRY(0x221C0274, 4, 0x8000000000, 0x27, SKU_VERSION), + EFUSE_ENTRY(0x221C811C, 4, 0x80, 0x7, SKU_VERSION), /* IRIS_MULTIPIPE_DISABLE - max 4K@30 */ - EFUSE_ENTRY(0x221C0270, 4, 0x0000000080, 0x06, SKU_VERSION), + EFUSE_ENTRY(0x221C8118, 4, 0x80, 0x6, SKU_VERSION), }; static struct msm_vidc_platform_data diwali_data = { diff --git a/driver/vidc/inc/msm_vidc_platform.h b/driver/vidc/inc/msm_vidc_platform.h index 2d4e4436f7..3ce27f775e 100644 --- a/driver/vidc/inc/msm_vidc_platform.h +++ b/driver/vidc/inc/msm_vidc_platform.h @@ -44,7 +44,7 @@ struct msm_vidc_csc_coeff { struct msm_vidc_efuse_data { u32 start_address; u32 size; - unsigned long mask; + u32 mask; u32 shift; enum efuse_purpose purpose; }; From 814107162dde69626c12501b577e9e59f753acce Mon Sep 17 00:00:00 2001 From: Maheshwar Ajja Date: Thu, 11 Nov 2021 12:19:45 -0800 Subject: [PATCH 0466/1061] video: driver: check kernel version to differentiate api dma_buf_vmap() api changed from kernel version 5.15 and hence check kernel version to use the updated api. Change-Id: I05b7c72199cedfe9c33a8888fffb5e38da875f7e Signed-off-by: Maheshwar Ajja --- driver/vidc/src/msm_vidc_memory.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/driver/vidc/src/msm_vidc_memory.c b/driver/vidc/src/msm_vidc_memory.c index 7b4bec9f1f..3c6c8ba21e 100644 --- a/driver/vidc/src/msm_vidc_memory.c +++ b/driver/vidc/src/msm_vidc_memory.c @@ -3,6 +3,7 @@ * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. */ +#include #include #include #include @@ -377,12 +378,22 @@ int msm_vidc_memory_alloc(struct msm_vidc_core *core, struct msm_vidc_alloc *mem if (mem->map_kernel) { dma_buf_begin_cpu_access(mem->dmabuf, DMA_BIDIRECTIONAL); + +#if (LINUX_VERSION_CODE < KERNEL_VERSION(5,15,0)) + mem->kvaddr = dma_buf_vmap(mem->dmabuf); + if (!mem->kvaddr) { + d_vpr_e("%s: kernel map failed\n", __func__); + rc = -EIO; + goto error; + } +#else rc = dma_buf_vmap(mem->dmabuf, mem->kvaddr); if (rc) { d_vpr_e("%s: kernel map failed\n", __func__); rc = -EIO; goto error; } +#endif } d_vpr_h( From 5645c4fa4532668a047c7ac479ed449b3c9a3a99 Mon Sep 17 00:00:00 2001 From: Priyanka Gujjula Date: Wed, 10 Nov 2021 16:48:51 +0530 Subject: [PATCH 0467/1061] video: driver: diwali: Correct H264 dec level Publish h264 decode level value with in the supported level. Change-Id: Id1cecdfda0336eec3fdba7ad994d2381351065c5 Signed-off-by: Priyanka Gujjula --- driver/platform/diwali/src/msm_vidc_diwali.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/driver/platform/diwali/src/msm_vidc_diwali.c b/driver/platform/diwali/src/msm_vidc_diwali.c index 225864e22b..beec81f835 100644 --- a/driver/platform/diwali/src/msm_vidc_diwali.c +++ b/driver/platform/diwali/src/msm_vidc_diwali.c @@ -2732,7 +2732,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v1[] = { BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_0) | BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_1) | BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_2), - V4L2_MPEG_VIDEO_H264_LEVEL_6_0, + V4L2_MPEG_VIDEO_H264_LEVEL_5_2, V4L2_CID_MPEG_VIDEO_H264_LEVEL, HFI_PROP_LEVEL, CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, @@ -4263,7 +4263,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v2[] = { BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_0) | BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_1) | BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_2), - V4L2_MPEG_VIDEO_H264_LEVEL_6_0, + V4L2_MPEG_VIDEO_H264_LEVEL_5_2, V4L2_CID_MPEG_VIDEO_H264_LEVEL, HFI_PROP_LEVEL, CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, From 6eacf50e785bdee34066107027ffffda2e5f6ffa Mon Sep 17 00:00:00 2001 From: Priyanka Gujjula Date: Wed, 17 Nov 2021 17:44:00 +0530 Subject: [PATCH 0468/1061] video-driver: Fix compilation errors for parrot Fix compilation errors on parrot which has a different lunch combo other than taro/diwali. Change-Id: I35aee69bc8e18d50395a01b97d282c21e75da193 Signed-off-by: Priyanka Gujjula --- driver/vidc/src/msm_vidc_platform.c | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-) diff --git a/driver/vidc/src/msm_vidc_platform.c b/driver/vidc/src/msm_vidc_platform.c index d976f75550..7872470440 100644 --- a/driver/vidc/src/msm_vidc_platform.c +++ b/driver/vidc/src/msm_vidc_platform.c @@ -9,6 +9,7 @@ #include "msm_vidc_v4l2.h" #include "msm_vidc_vb2.h" #include "msm_vidc_control.h" +#include "msm_vidc_core.h" #if defined(CONFIG_MSM_VIDC_WAIPIO) #include "msm_vidc_waipio.h" #endif @@ -159,7 +160,7 @@ static int msm_vidc_deinit_platform_variant(struct msm_vidc_core *core, struct d if (rc) d_vpr_e("%s: failed msm-vidc-waipio with %d\n", __func__, rc); - goto end_target_config; + return rc; } #endif #if defined(CONFIG_MSM_VIDC_DIWALI) @@ -168,11 +169,10 @@ static int msm_vidc_deinit_platform_variant(struct msm_vidc_core *core, struct d if (rc) d_vpr_e("%s: failed msm-vidc-diwali with %d\n", __func__, rc); - goto end_target_config; + return rc; } #endif -end_target_config: return rc; } @@ -193,7 +193,7 @@ static int msm_vidc_init_platform_variant(struct msm_vidc_core *core, struct dev if (rc) d_vpr_e("%s: failed msm-vidc-waipio with %d\n", __func__, rc); - goto end_target_config; + return rc; } #endif #if defined(CONFIG_MSM_VIDC_DIWALI) @@ -202,11 +202,10 @@ static int msm_vidc_init_platform_variant(struct msm_vidc_core *core, struct dev if (rc) d_vpr_e("%s: failed msm-vidc-diwali with %d\n", __func__, rc); - goto end_target_config; + return rc; } #endif -end_target_config: return rc; } From d0dcdf317193656e02fc3dbb73e7e3d6a1d9d368 Mon Sep 17 00:00:00 2001 From: Priyanka Gujjula Date: Thu, 18 Nov 2021 21:51:56 +0530 Subject: [PATCH 0469/1061] video-driver: diwali: Update batching spec Update batching spec to 1080p@120 for diwali v0, v1 & disable batching for v2. Change-Id: I57f8b33bddc4cd6ee2a637a6d64683fc1b37ab33 Signed-off-by: Priyanka Gujjula --- driver/platform/diwali/src/msm_vidc_diwali.c | 13 +++---------- 1 file changed, 3 insertions(+), 10 deletions(-) diff --git a/driver/platform/diwali/src/msm_vidc_diwali.c b/driver/platform/diwali/src/msm_vidc_diwali.c index beec81f835..77d4e03ffa 100644 --- a/driver/platform/diwali/src/msm_vidc_diwali.c +++ b/driver/platform/diwali/src/msm_vidc_diwali.c @@ -212,7 +212,7 @@ static struct msm_platform_core_capability core_data_diwali_v2[] = { {PAGEFAULT_NON_FATAL, 1}, {PAGETABLE_CACHING, 0}, {DCVS, 1}, - {DECODE_BATCH, 1}, + {DECODE_BATCH, 0}, {DECODE_BATCH_TIMEOUT, 200}, {STATS_TIMEOUT_MS, 2000}, {AV_SYNC_WINDOW_SIZE, 40}, @@ -319,10 +319,9 @@ static struct msm_platform_inst_capability instance_data_diwali_v0[] = { /* (4096 * 2176) / 256 */ {LOSSLESS_MBPF, ENC, H264|HEVC, 64, 34816, 1, 34816}, /* Batch Mode Decode */ - /* TODO: update with new values based on updated voltage corner */ /* (1920 * 1088) / 256 */ {BATCH_MBPF, DEC, H264|HEVC|VP9, 64, 8160, 1, 8160}, - {BATCH_FPS, DEC, H264|HEVC|VP9, 1, 60, 1, 60}, + {BATCH_FPS, DEC, H264|HEVC|VP9, 1, 120, 1, 60}, /* (4096 * 2176) / 256 */ {SECURE_MBPF, ENC|DEC, H264|HEVC|VP9, 64, 34816, 1, 34816}, /* ((4096 * 2176) / 256) * 60 fps */ @@ -1856,10 +1855,9 @@ static struct msm_platform_inst_capability instance_data_diwali_v1[] = { /* (4096 * 2176) / 256 */ {LOSSLESS_MBPF, ENC, H264|HEVC, 64, 34816, 1, 34816}, /* Batch Mode Decode */ - /* TODO: update with new values based on updated voltage corner */ /* (1920 * 1088) / 256 */ {BATCH_MBPF, DEC, H264|HEVC|VP9, 64, 8160, 1, 8160}, - {BATCH_FPS, DEC, H264|HEVC|VP9, 1, 60, 1, 60}, + {BATCH_FPS, DEC, H264|HEVC|VP9, 1, 120, 1, 60}, /* (4096 * 2176) / 256 */ {SECURE_MBPF, ENC|DEC, H264|HEVC|VP9, 64, 34816, 1, 34816}, /* ((4096 * 2176) / 256) * 60 fps */ @@ -3387,11 +3385,6 @@ static struct msm_platform_inst_capability instance_data_diwali_v2[] = { {MBPF, DEC, CODECS_ALL, 36, 34816, 1, 34816}, /* (4096 * 2176) / 256 */ {LOSSLESS_MBPF, ENC, H264|HEVC, 64, 34816, 1, 34816}, - /* Batch Mode Decode */ - /* TODO: update with new values based on updated voltage corner */ - /* (1920 * 1088) / 256 */ - {BATCH_MBPF, DEC, H264|HEVC|VP9, 64, 8160, 1, 8160}, - {BATCH_FPS, DEC, H264|HEVC|VP9, 1, 30, 1, 60}, /* (4096 * 2176) / 256 */ {SECURE_MBPF, ENC|DEC, H264|HEVC|VP9, 64, 34816, 1, 34816}, /* ((4096 * 2176) / 256) * 30 fps */ From 9456cc40fbb4ed55de5dfcdb4a650fa88f692281 Mon Sep 17 00:00:00 2001 From: Mihir Ganu Date: Tue, 16 Nov 2021 21:08:23 -0800 Subject: [PATCH 0470/1061] video: driver: Add support for kalama/iris3 platform Add the required config and platform files to enable kalama platform with iris3 VPU. Change-Id: Ia65d2212b946d0d37fc99e30e25fe408882bdec3 Signed-off-by: Mihir Ganu --- Kbuild | 26 +- config/kalama_video.conf | 2 + config/kalama_video.h | 8 + driver/platform/kalama/inc/msm_vidc_kalama.h | 26 + driver/platform/kalama/src/msm_vidc_kalama.c | 1713 +++++++++++++++++ driver/variant/iris3/inc/hfi_buffer_iris3.h | 1540 +++++++++++++++ .../variant/iris3/inc/msm_vidc_buffer_iris3.h | 18 + driver/variant/iris3/inc/msm_vidc_iris3.h | 26 + .../variant/iris3/inc/msm_vidc_power_iris3.h | 17 + .../variant/iris3/src/msm_vidc_buffer_iris3.c | 675 +++++++ driver/variant/iris3/src/msm_vidc_iris3.c | 1178 ++++++++++++ .../variant/iris3/src/msm_vidc_power_iris3.c | 739 +++++++ driver/vidc/src/msm_vidc_platform.c | 101 +- 13 files changed, 6035 insertions(+), 34 deletions(-) create mode 100644 config/kalama_video.conf create mode 100644 config/kalama_video.h create mode 100644 driver/platform/kalama/inc/msm_vidc_kalama.h create mode 100644 driver/platform/kalama/src/msm_vidc_kalama.c create mode 100644 driver/variant/iris3/inc/hfi_buffer_iris3.h create mode 100644 driver/variant/iris3/inc/msm_vidc_buffer_iris3.h create mode 100644 driver/variant/iris3/inc/msm_vidc_iris3.h create mode 100644 driver/variant/iris3/inc/msm_vidc_power_iris3.h create mode 100644 driver/variant/iris3/src/msm_vidc_buffer_iris3.c create mode 100644 driver/variant/iris3/src/msm_vidc_iris3.c create mode 100644 driver/variant/iris3/src/msm_vidc_power_iris3.c diff --git a/Kbuild b/Kbuild index ab3c3278cf..b5adf3228f 100644 --- a/Kbuild +++ b/Kbuild @@ -4,13 +4,19 @@ KBUILD_CPPFLAGS += -DCONFIG_MSM_MMRM=1 ifeq ($(CONFIG_ARCH_WAIPIO), y) include $(VIDEO_ROOT)/config/waipio_video.conf -LINUXINCLUDE += -include $(VIDEO_ROOT)/config/waipio_video.h +LINUXINCLUDE += -include $(VIDEO_ROOT)/config/waipio_video.h \ + -I$(VIDEO_ROOT)/driver/platform/waipio/inc endif +ifeq ($(CONFIG_ARCH_KALAMA), y) +include $(VIDEO_ROOT)/config/kalama_video.conf +LINUXINCLUDE += -include $(VIDEO_ROOT)/config/kalama_video.h \ + -I$(VIDEO_ROOT)/driver/platform/kalama/inc +endif + + LINUXINCLUDE += -I$(VIDEO_ROOT)/driver/vidc/inc \ - -I$(VIDEO_ROOT)/include/uapi/vidc \ - -I$(VIDEO_ROOT)/driver/platform/waipio/inc \ - -I$(VIDEO_ROOT)/driver/variant/iris2/inc + -I$(VIDEO_ROOT)/include/uapi/vidc USERINCLUDE += -I$(VIDEO_ROOT)/include/uapi/vidc/media \ -I$(VIDEO_ROOT)/include/uapi/vidc @@ -21,12 +27,24 @@ ifeq ($(CONFIG_MSM_VIDC_WAIPIO), y) msm_video-objs += driver/platform/waipio/src/msm_vidc_waipio.o endif +ifeq ($(CONFIG_MSM_VIDC_KALAMA), y) +msm_video-objs += driver/platform/kalama/src/msm_vidc_kalama.o +endif + ifeq ($(CONFIG_MSM_VIDC_IRIS2), y) +LINUXINCLUDE += -I$(VIDEO_ROOT)/driver/variant/iris2/inc msm_video-objs += driver/variant/iris2/src/msm_vidc_buffer_iris2.o \ driver/variant/iris2/src/msm_vidc_power_iris2.o \ driver/variant/iris2/src/msm_vidc_iris2.o endif +ifeq ($(CONFIG_MSM_VIDC_IRIS3), y) +LINUXINCLUDE += -I$(VIDEO_ROOT)/driver/variant/iris3/inc +msm_video-objs += driver/variant/iris3/src/msm_vidc_buffer_iris3.o \ + driver/variant/iris3/src/msm_vidc_power_iris3.o \ + driver/variant/iris3/src/msm_vidc_iris3.o +endif + msm_video-objs += driver/vidc/src/msm_vidc_v4l2.o \ driver/vidc/src/msm_vidc_vb2.o \ driver/vidc/src/msm_vidc.o \ diff --git a/config/kalama_video.conf b/config/kalama_video.conf new file mode 100644 index 0000000000..311ddbf314 --- /dev/null +++ b/config/kalama_video.conf @@ -0,0 +1,2 @@ +export CONFIG_MSM_VIDC_KALAMA=y +export CONFIG_MSM_VIDC_IRIS3=y diff --git a/config/kalama_video.h b/config/kalama_video.h new file mode 100644 index 0000000000..e61c0b3081 --- /dev/null +++ b/config/kalama_video.h @@ -0,0 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. + * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#define CONFIG_MSM_VIDC_KALAMA 1 +#define CONFIG_MSM_VIDC_IRIS3 1 diff --git a/driver/platform/kalama/inc/msm_vidc_kalama.h b/driver/platform/kalama/inc/msm_vidc_kalama.h new file mode 100644 index 0000000000..9d004502e1 --- /dev/null +++ b/driver/platform/kalama/inc/msm_vidc_kalama.h @@ -0,0 +1,26 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. + * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#ifndef _MSM_VIDC_KALAMA_H_ +#define _MSM_VIDC_KALAMA_H_ + +#include "msm_vidc_core.h" + +#if defined(CONFIG_MSM_VIDC_KALAMA) +int msm_vidc_init_platform_kalama(struct msm_vidc_core *core, struct device *dev); +int msm_vidc_deinit_platform_kalama(struct msm_vidc_core *core, struct device *dev); +#else +int msm_vidc_init_platform_kalama(struct msm_vidc_core *core, struct device *dev) +{ + return -EINVAL; +} +int msm_vidc_deinit_platform_kalama(struct msm_vidc_core *core, struct device *dev) +{ + return -EINVAL; +} +#endif + +#endif // _MSM_VIDC_KALAMA_H_ diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c new file mode 100644 index 0000000000..6c97a3c7d6 --- /dev/null +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -0,0 +1,1713 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. + * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include + +#include "msm_vidc_kalama.h" +#include "msm_vidc_platform.h" +#include "msm_vidc_debug.h" +#include "msm_vidc_internal.h" +#include "msm_vidc_core.h" +#include "msm_vidc_control.h" +#include "hfi_property.h" + +#define DEFAULT_VIDEO_CONCEAL_COLOR_BLACK 0x8020010 +#define MAX_LTR_FRAME_COUNT 2 +#define MAX_BASE_LAYER_PRIORITY_ID 63 +#define MAX_BITRATE 220000000 +#define DEFAULT_BITRATE 20000000 +#define MIN_QP_10BIT -12 +#define MIN_QP_8BIT 0 +#define MAX_QP 51 +#define DEFAULT_QP 20 +#define MAX_CONSTANT_QUALITY 100 +#define MIN_SLICE_BYTE_SIZE 512 +#define MAX_SLICE_BYTE_SIZE \ + ((MAX_BITRATE) >> 3) +#define MAX_SLICE_MB_SIZE \ + (((4096 + 15) >> 4) * ((2304 + 15) >> 4)) + +#define UBWC_CONFIG(mc, ml, hbb, bs1, bs2, bs3, bsp) \ +{ \ + .max_channels = mc, \ + .mal_length = ml, \ + .highest_bank_bit = hbb, \ + .bank_swzl_level = bs1, \ + .bank_swz2_level = bs2, \ + .bank_swz3_level = bs3, \ + .bank_spreading = bsp, \ +} + +#define ENC MSM_VIDC_ENCODER +#define DEC MSM_VIDC_DECODER +#define H264 MSM_VIDC_H264 +#define HEVC MSM_VIDC_HEVC +#define VP9 MSM_VIDC_VP9 +#define HEIC MSM_VIDC_HEIC +#define CODECS_ALL (H264 | HEVC | VP9 | HEIC) + +static struct msm_platform_core_capability core_data_kalama[] = { + /* {type, value} */ + {ENC_CODECS, H264|HEVC|HEIC}, + {DEC_CODECS, H264|HEVC|VP9|HEIC}, + {MAX_SESSION_COUNT, 16}, + {MAX_NUM_720P_SESSIONS, 16}, + {MAX_NUM_1080P_SESSIONS, 8}, + {MAX_NUM_4K_SESSIONS, 4}, + {MAX_NUM_8K_SESSIONS, 2}, + {MAX_SECURE_SESSION_COUNT, 3}, + {MAX_RT_MBPF, 173056}, /* (8192x4320)/256 + (4096x2176)/256*/ + {MAX_MBPF, 276480}, /* ((8192x4320)/256) * 2 */ + {MAX_MBPS, 7833600}, /* max_load + * 7680x4320@60fps or 3840x2176@240fps + * which is greater than 4096x2176@120fps, + * 8192x4320@48fps + */ + {MAX_IMAGE_MBPF, 1048576}, /* (16384x16384)/256 */ + {MAX_MBPF_HQ, 8160}, /* ((1920x1088)/256) */ + {MAX_MBPS_HQ, 489600}, /* ((1920x1088)/256)@60fps */ + {MAX_MBPF_B_FRAME, 32640}, /* 3840x2176/256 */ + {MAX_MBPS_B_FRAME, 1958400}, /* 3840x2176/256 MBs@60fps */ + {MAX_ENH_LAYER_COUNT, 5}, + {NUM_VPP_PIPE, 4}, + {SW_PC, 1}, + {FW_UNLOAD, 0}, + {HW_RESPONSE_TIMEOUT, HW_RESPONSE_TIMEOUT_VALUE}, /* 1000 ms */ + {SW_PC_DELAY, SW_PC_DELAY_VALUE }, /* 1500 ms (>HW_RESPONSE_TIMEOUT)*/ + {FW_UNLOAD_DELAY, FW_UNLOAD_DELAY_VALUE }, /* 3000 ms (>SW_PC_DELAY)*/ + // TODO: review below entries, and if required rename as PREFETCH + {PREFIX_BUF_COUNT_PIX, 18}, + {PREFIX_BUF_SIZE_PIX, 13434880}, /* Calculated by VIDEO_RAW_BUFFER_SIZE for 4096x2160 UBWC */ + {PREFIX_BUF_COUNT_NON_PIX, 1}, + {PREFIX_BUF_SIZE_NON_PIX, 209715200}, /* + * Internal buffer size is calculated for secure decode session + * of resolution 4k (4096x2160) + * Internal buf size = calculate_scratch_size() + + * calculate_scratch1_size() + calculate_persist1_size() + * Take maximum between VP9 10bit, HEVC 10bit, AVC secure + * decoder sessions + */ + {PAGEFAULT_NON_FATAL, 1}, + {PAGETABLE_CACHING, 0}, + {DCVS, 1}, + {DECODE_BATCH, 1}, + {DECODE_BATCH_TIMEOUT, 200}, + {STATS_TIMEOUT_MS, 2000}, + {AV_SYNC_WINDOW_SIZE, 40}, + {NON_FATAL_FAULTS, 1}, + {ENC_AUTO_FRAMERATE, 1}, +}; + +static struct msm_platform_inst_capability instance_data_kalama[] = { + /* {cap, domain, codec, + * min, max, step_or_mask, value, + * v4l2_id, + * hfi_id, + * flags, + * parents, + * children, + * adjust, set} + */ + + {FRAME_WIDTH, DEC, CODECS_ALL, 96, 8192, 1, 1920}, + {FRAME_WIDTH, DEC, VP9, 96, 4096, 1, 1920}, + {FRAME_WIDTH, ENC, CODECS_ALL, 128, 8192, 1, 1920}, + {LOSSLESS_FRAME_WIDTH, ENC, H264|HEVC, 128, 4096, 1, 1920}, + {SECURE_FRAME_WIDTH, DEC, H264|HEVC|VP9, 96, 4096, 1, 1920}, + {SECURE_FRAME_WIDTH, ENC, H264|HEVC, 128, 4096, 1, 1920}, + {FRAME_HEIGHT, DEC, CODECS_ALL, 96, 8192, 1, 1080}, + {FRAME_HEIGHT, DEC, VP9, 96, 4096, 1, 1080}, + {FRAME_HEIGHT, ENC, CODECS_ALL, 128, 8192, 1, 1080}, + {LOSSLESS_FRAME_HEIGHT, ENC, H264|HEVC, 128, 4096, 1, 1080}, + {SECURE_FRAME_HEIGHT, DEC, H264|HEVC|VP9, 96, 4096, 1, 1080}, + {SECURE_FRAME_HEIGHT, ENC, H264|HEVC, 128, 4096, 1, 1080}, + {PIX_FMTS, ENC, H264, + MSM_VIDC_FMT_NV12, + MSM_VIDC_FMT_NV12C, + MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C, + /* Since CTSEncodeDecode test cannot handle BT 709LR, + * disabled HW RGBA encoding. + * | MSM_VIDC_FMT_RGBA8888 | MSM_VIDC_FMT_RGBA8888C, + */ + MSM_VIDC_FMT_NV12C, + 0, 0, + CAP_FLAG_ROOT, + {0}, + {META_ROI_INFO}}, + {PIX_FMTS, ENC, HEVC, + MSM_VIDC_FMT_NV12, + MSM_VIDC_FMT_TP10C, + MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C | + MSM_VIDC_FMT_P010 | MSM_VIDC_FMT_TP10C, + /* Since CTSEncodeDecode test cannot handle BT 709LR, + * disabled HW RGBA encoding. + * | MSM_VIDC_FMT_RGBA8888 | MSM_VIDC_FMT_RGBA8888C, + */ + MSM_VIDC_FMT_NV12C, + 0, 0, + CAP_FLAG_ROOT, + {0}, + {/* Do not change order of META_ROI_INFO, MIN_QUALITY, BLUR_TYPES + * Since parent -> children relationship for these cap_ids is + * as follows: + * META_ROI_INFO -> MIN_QUALITY -> BLUR_TYPES + */ + PROFILE, MIN_FRAME_QP, MAX_FRAME_QP, I_FRAME_QP, P_FRAME_QP, + B_FRAME_QP, META_ROI_INFO, MIN_QUALITY, BLUR_TYPES}}, + + {PIX_FMTS, DEC, HEVC|HEIC, + MSM_VIDC_FMT_NV12, + MSM_VIDC_FMT_TP10C, + MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C | + MSM_VIDC_FMT_P010 | MSM_VIDC_FMT_TP10C, + MSM_VIDC_FMT_NV12C, + 0, 0, + CAP_FLAG_ROOT, + {0}, + {PROFILE}}, + + {PIX_FMTS, DEC, H264, + MSM_VIDC_FMT_NV12, + MSM_VIDC_FMT_NV12C, + MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C, + MSM_VIDC_FMT_NV12C}, + + {PIX_FMTS, DEC, VP9, + MSM_VIDC_FMT_NV12, + MSM_VIDC_FMT_TP10C, + MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C | + MSM_VIDC_FMT_P010 | MSM_VIDC_FMT_TP10C, + MSM_VIDC_FMT_NV12C}, + + {MIN_BUFFERS_INPUT, ENC|DEC, CODECS_ALL, 0, 64, 1, 4, + V4L2_CID_MIN_BUFFERS_FOR_OUTPUT}, + {MIN_BUFFERS_OUTPUT, ENC|DEC, CODECS_ALL, + 0, 64, 1, 4, + V4L2_CID_MIN_BUFFERS_FOR_CAPTURE, + HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + + /* (8192 * 4320) / 256 */ + {MBPF, ENC, CODECS_ALL, 64, 138240, 1, 138240}, + {MBPF, DEC, CODECS_ALL, 36, 138240, 1, 138240}, + /* (4096 * 2304) / 256 */ + {MBPF, DEC, VP9, 36, 36864, 1, 36864}, + /* (4096 * 2304) / 256 */ + {LOSSLESS_MBPF, ENC, H264|HEVC, 64, 36864, 1, 36864}, + /* Batch Mode Decode */ + /* TODO: update with new values based on updated voltage corner */ + {BATCH_MBPF, DEC, H264|HEVC|VP9, 64, 34816, 1, 34816}, + /* (4096 * 2304) / 256 */ + {BATCH_FPS, DEC, H264|HEVC|VP9, 1, 120, 1, 120}, + {SECURE_MBPF, ENC|DEC, H264|HEVC|VP9, 64, 36864, 1, 36864}, + /* ((1920 * 1088) / 256) * 480 fps */ + {MBPS, ENC, CODECS_ALL, 64, 3916800, 1, 3916800}, + /* ((1920 * 1088) / 256) * 960 fps */ + {MBPS, DEC, CODECS_ALL, 64, 7833600, 1, 7833600}, + /* ((4096 * 2304) / 256) * 60 */ + {MBPS, DEC, VP9, 36, 2211840, 1, 2211840}, + /* ((4096 * 2304) / 256) * 60 fps */ + {POWER_SAVE_MBPS, ENC, CODECS_ALL, 0, 2211840, 1, 2211840}, + + {FRAME_RATE, ENC, CODECS_ALL, + (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), + 1, (DEFAULT_FPS << 16), + 0, + HFI_PROP_FRAME_RATE, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + {0}, {0}, + NULL, msm_vidc_set_q16}, + + {FRAME_RATE, DEC, CODECS_ALL, + (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), + 1, (DEFAULT_FPS << 16)}, + + {FRAME_RATE, DEC, VP9, + (MINIMUM_FPS << 16), (MAXIMUM_VP9_FPS << 16), + 1, (DEFAULT_FPS << 16)}, + + {OPERATING_RATE, ENC|DEC, CODECS_ALL, + (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), + 1, (DEFAULT_FPS << 16)}, + + {OPERATING_RATE, DEC, VP9, + (MINIMUM_FPS << 16), (MAXIMUM_VP9_FPS << 16), + 1, (DEFAULT_FPS << 16)}, + + {SCALE_FACTOR, ENC, H264|HEVC, 1, 8, 1, 8}, + + {MB_CYCLES_VSP, ENC, CODECS_ALL, 25, 25, 1, 25}, + {MB_CYCLES_VSP, DEC, CODECS_ALL, 25, 25, 1, 25}, + {MB_CYCLES_VSP, DEC, VP9, 60, 60, 1, 60}, + {MB_CYCLES_VPP, ENC, CODECS_ALL, 675, 675, 1, 675}, + {MB_CYCLES_VPP, DEC, CODECS_ALL, 200, 200, 1, 200}, + {MB_CYCLES_LP, ENC, CODECS_ALL, 320, 320, 1, 320}, + {MB_CYCLES_LP, DEC, CODECS_ALL, 200, 200, 1, 200}, + {MB_CYCLES_FW, ENC|DEC, CODECS_ALL, 326389, 326389, 1, 326389}, + {MB_CYCLES_FW_VPP, ENC|DEC, CODECS_ALL, 44156, 44156, 1, 44156}, + + {SECURE_MODE, ENC|DEC, H264|HEVC|VP9, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_SECURE, + HFI_PROP_SECURE, + CAP_FLAG_NONE, + {0}, + {0}, + NULL, msm_vidc_set_u32}, + + {HFLIP, ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_HFLIP, + HFI_PROP_FLIP, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, + {0}, + {0}, + NULL, msm_vidc_set_flip}, + + {VFLIP, ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_VFLIP, + HFI_PROP_FLIP, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {0}, + {0}, + NULL, msm_vidc_set_flip}, + + {ROTATION, ENC, CODECS_ALL, + 0, 270, 90, 0, + V4L2_CID_ROTATE, + HFI_PROP_ROTATION, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + {0}, + {0}, + NULL, msm_vidc_set_rotation}, + + {SUPER_FRAME, ENC, H264|HEVC, + 0, 32, 1, 0, + V4L2_CID_MPEG_VIDC_SUPERFRAME, + 0}, + + {SLICE_INTERFACE, DEC, CODECS_ALL, + 0, 0, 0, 0, + V4L2_CID_MPEG_VIDEO_DECODER_SLICE_INTERFACE, + 0}, + + {HEADER_MODE, ENC, CODECS_ALL, + V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE, + V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME, + BIT(V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE) | + BIT(V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME), + V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE, + V4L2_CID_MPEG_VIDEO_HEADER_MODE, + HFI_PROP_SEQ_HEADER_MODE, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {0}, {0}, + NULL, msm_vidc_set_header_mode}, + + {PREPEND_SPSPPS_TO_IDR, ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDEO_PREPEND_SPSPPS_TO_IDR}, + + {META_SEQ_HDR_NAL, ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_SEQ_HEADER_NAL}, + + {WITHOUT_STARTCODE, ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE, + HFI_PROP_NAL_LENGTH_FIELD, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + {0}, {0}, + NULL, msm_vidc_set_nal_length}, + + {NAL_LENGTH_FIELD, ENC, CODECS_ALL, + V4L2_MPEG_VIDEO_HEVC_SIZE_0, + V4L2_MPEG_VIDEO_HEVC_SIZE_4, + BIT(V4L2_MPEG_VIDEO_HEVC_SIZE_0) | + BIT(V4L2_MPEG_VIDEO_HEVC_SIZE_4), + V4L2_MPEG_VIDEO_HEVC_SIZE_0, + V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD, + HFI_PROP_NAL_LENGTH_FIELD, + CAP_FLAG_MENU | CAP_FLAG_OUTPUT_PORT}, + + /* TODO: Firmware introduced enumeration type for this + * with and without seq header. + */ + {REQUEST_I_FRAME, ENC, H264|HEVC, + 0, 0, 0, 0, + V4L2_CID_MPEG_VIDEO_FORCE_KEY_FRAME, + HFI_PROP_REQUEST_SYNC_FRAME, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + NULL, msm_vidc_set_req_sync_frame}, + + /* Enc: Keeping CABAC and CAVLC as same bitrate. + * Dec: there's no use of Bitrate cap + */ + {BIT_RATE, ENC, H264|HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_BITRATE, + HFI_PROP_TOTAL_BITRATE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {ENH_LAYER_COUNT, BITRATE_MODE}, {PEAK_BITRATE}, + msm_vidc_adjust_bitrate, msm_vidc_set_bitrate}, + + {BITRATE_MODE, ENC, H264, + V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, + V4L2_MPEG_VIDEO_BITRATE_MODE_CBR, + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_VBR) | + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CBR), + V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, + V4L2_CID_MPEG_VIDEO_BITRATE_MODE, + HFI_PROP_RATE_CONTROL, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {0}, + {LTR_COUNT, IR_RANDOM, TIME_DELTA_BASED_RC, I_FRAME_QP, + P_FRAME_QP, B_FRAME_QP, ENH_LAYER_COUNT, BIT_RATE, + CONTENT_ADAPTIVE_CODING, BITRATE_BOOST, MIN_QUALITY, + VBV_DELAY, PEAK_BITRATE,SLICE_MODE, META_ROI_INFO, + BLUR_TYPES, LOWLATENCY_MODE}, + msm_vidc_adjust_bitrate_mode, msm_vidc_set_u32_enum}, + + {BITRATE_MODE, ENC, HEVC, + V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, + V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_VBR) | + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CBR) | + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CQ), + V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, + V4L2_CID_MPEG_VIDEO_BITRATE_MODE, + HFI_PROP_RATE_CONTROL, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {0}, + {LTR_COUNT, IR_RANDOM, TIME_DELTA_BASED_RC, I_FRAME_QP, + P_FRAME_QP, B_FRAME_QP, CONSTANT_QUALITY, ENH_LAYER_COUNT, + CONTENT_ADAPTIVE_CODING, BIT_RATE, + BITRATE_BOOST, MIN_QUALITY, VBV_DELAY, + PEAK_BITRATE, SLICE_MODE, META_ROI_INFO, BLUR_TYPES, + LOWLATENCY_MODE}, + msm_vidc_adjust_bitrate_mode, msm_vidc_set_u32_enum}, + + {LOSSLESS, ENC, HEVC|HEIC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU}, + + {FRAME_SKIP_MODE, ENC, H264|HEVC|HEIC, + V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED, + V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT, + BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED) | + BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_LEVEL_LIMIT) | + BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT), + V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED, + V4L2_CID_MPEG_VIDEO_FRAME_SKIP_MODE, + 0, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {FRAME_RC_ENABLE, ENC, H264|HEVC|HEIC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_ENABLE, + V4L2_CID_MPEG_VIDEO_FRAME_RC_ENABLE}, + + {CONSTANT_QUALITY, ENC, HEVC, + 1, MAX_CONSTANT_QUALITY, 1, 90, + V4L2_CID_MPEG_VIDEO_CONSTANT_QUALITY, + HFI_PROP_CONSTANT_QUALITY, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {BITRATE_MODE}, {0}, + NULL, msm_vidc_set_constant_quality}, + + {GOP_SIZE, ENC, CODECS_ALL, + 0, INT_MAX, 1, 2 * DEFAULT_FPS - 1, + V4L2_CID_MPEG_VIDEO_GOP_SIZE, + HFI_PROP_MAX_GOP_FRAMES, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {ENH_LAYER_COUNT}, + {0}, + msm_vidc_adjust_gop_size, msm_vidc_set_gop_size}, + + {GOP_CLOSURE, ENC, H264|HEVC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_ENABLE, + V4L2_CID_MPEG_VIDEO_GOP_CLOSURE, + 0}, + + {B_FRAME, ENC, H264|HEVC, + 0, 7, 1, 0, + V4L2_CID_MPEG_VIDEO_B_FRAMES, + HFI_PROP_MAX_B_FRAMES, + CAP_FLAG_OUTPUT_PORT, + {ENH_LAYER_COUNT}, + {0}, + msm_vidc_adjust_b_frame, msm_vidc_set_u32}, + + {BLUR_TYPES, ENC, CODECS_ALL, + VIDC_BLUR_NONE, VIDC_BLUR_ADAPTIVE, 1, VIDC_BLUR_ADAPTIVE, + V4L2_CID_MPEG_VIDC_VIDEO_BLUR_TYPES, + HFI_PROP_BLUR_TYPES, + CAP_FLAG_OUTPUT_PORT, + {PIX_FMTS, BITRATE_MODE, CONTENT_ADAPTIVE_CODING}, + {BLUR_RESOLUTION}, + msm_vidc_adjust_blur_type, msm_vidc_set_u32_enum}, + + {BLUR_TYPES, ENC, H264|HEVC, + VIDC_BLUR_NONE, VIDC_BLUR_ADAPTIVE, 1, VIDC_BLUR_ADAPTIVE, + V4L2_CID_MPEG_VIDC_VIDEO_BLUR_TYPES, + HFI_PROP_BLUR_TYPES, + CAP_FLAG_OUTPUT_PORT, + {PIX_FMTS, BITRATE_MODE, CONTENT_ADAPTIVE_CODING, MIN_QUALITY}, + {BLUR_RESOLUTION}, + msm_vidc_adjust_blur_type, msm_vidc_set_u32_enum}, + + {BLUR_RESOLUTION, ENC, CODECS_ALL, + 0, S32_MAX, 1, 0, + V4L2_CID_MPEG_VIDC_VIDEO_BLUR_RESOLUTION, + HFI_PROP_BLUR_RESOLUTION, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {BLUR_TYPES}, + {0}, + msm_vidc_adjust_blur_resolution, msm_vidc_set_blur_resolution}, + + {CSC, ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, + HFI_PROP_CSC}, + + {CSC_CUSTOM_MATRIX, ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_VIDEO_VPE_CSC_CUSTOM_MATRIX, + HFI_PROP_CSC_MATRIX, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + {0}, {0}, + NULL, msm_vidc_set_csc_custom_matrix}, + + {LOWLATENCY_MODE, ENC, H264 | HEVC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_LOWLATENCY_REQUEST, + 0, + CAP_FLAG_NONE, + {BITRATE_MODE}, + {STAGE}, + msm_vidc_adjust_lowlatency_mode, NULL}, + + {LOWLATENCY_MODE, DEC, H264|HEVC|VP9, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_LOWLATENCY_REQUEST, + HFI_PROP_SEQ_CHANGE_AT_SYNC_FRAME, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {LTR_COUNT, ENC, H264|HEVC, + 0, 2, 1, 0, + V4L2_CID_MPEG_VIDEO_LTR_COUNT, + HFI_PROP_LTR_COUNT, + CAP_FLAG_OUTPUT_PORT, + {BITRATE_MODE}, {0}, + msm_vidc_adjust_ltr_count, msm_vidc_set_u32}, + + {USE_LTR, ENC, H264|HEVC, + INVALID_DEFAULT_MARK_OR_USE_LTR, + ((1 << MAX_LTR_FRAME_COUNT) - 1), + 1, INVALID_DEFAULT_MARK_OR_USE_LTR, + V4L2_CID_MPEG_VIDEO_USE_LTR_FRAMES, + HFI_PROP_LTR_USE, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + msm_vidc_adjust_use_ltr, msm_vidc_set_use_and_mark_ltr}, + + {MARK_LTR, ENC, H264|HEVC, + INVALID_DEFAULT_MARK_OR_USE_LTR, + (MAX_LTR_FRAME_COUNT - 1), + 1, INVALID_DEFAULT_MARK_OR_USE_LTR, + V4L2_CID_MPEG_VIDEO_FRAME_LTR_INDEX, + HFI_PROP_LTR_MARK, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + msm_vidc_adjust_mark_ltr, msm_vidc_set_use_and_mark_ltr}, + + {BASELAYER_PRIORITY, ENC, H264, + 0, MAX_BASE_LAYER_PRIORITY_ID, 1, 0, + V4L2_CID_MPEG_VIDEO_BASELAYER_PRIORITY_ID, + HFI_PROP_BASELAYER_PRIORITYID, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + + {IR_RANDOM, ENC, H264|HEVC, + 0, INT_MAX, 1, 0, + V4L2_CID_MPEG_VIDC_INTRA_REFRESH_PERIOD, + HFI_PROP_IR_RANDOM_PERIOD, + CAP_FLAG_OUTPUT_PORT, + {BITRATE_MODE}, {0}, + msm_vidc_adjust_ir_random, msm_vidc_set_u32}, + + {AU_DELIMITER, ENC, H264|HEVC, + V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDEO_AU_DELIMITER, + HFI_PROP_AUD, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + {0}, {0}, + NULL, msm_vidc_set_u32}, + + {TIME_DELTA_BASED_RC, ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_ENABLE, + V4L2_CID_MPEG_VIDC_TIME_DELTA_BASED_RC, + HFI_PROP_TIME_DELTA_BASED_RATE_CONTROL, + CAP_FLAG_OUTPUT_PORT, + {BITRATE_MODE}, {0}, + msm_vidc_adjust_delta_based_rc, msm_vidc_set_u32}, + + {CONTENT_ADAPTIVE_CODING, ENC, H264|HEVC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_ENABLE, + V4L2_CID_MPEG_VIDC_CONTENT_ADAPTIVE_CODING, + HFI_PROP_CONTENT_ADAPTIVE_CODING, + CAP_FLAG_OUTPUT_PORT, + {BITRATE_MODE, MIN_QUALITY}, + {BLUR_TYPES}, + msm_vidc_adjust_cac, + msm_vidc_set_vbr_related_properties}, + + {BITRATE_BOOST, ENC, H264|HEVC, + 0, MAX_BITRATE_BOOST, 25, MAX_BITRATE_BOOST, + V4L2_CID_MPEG_VIDC_QUALITY_BITRATE_BOOST, + HFI_PROP_BITRATE_BOOST, + CAP_FLAG_OUTPUT_PORT, + {BITRATE_MODE, MIN_QUALITY}, + {0}, + msm_vidc_adjust_bitrate_boost, + msm_vidc_set_vbr_related_properties}, + + {MIN_QUALITY, ENC, H264, + 0, MAX_SUPPORTED_MIN_QUALITY, 70, MAX_SUPPORTED_MIN_QUALITY, + 0, + HFI_PROP_MAINTAIN_MIN_QUALITY, + CAP_FLAG_OUTPUT_PORT, + {BITRATE_MODE, ENH_LAYER_COUNT, META_ROI_INFO}, + {CONTENT_ADAPTIVE_CODING, BITRATE_BOOST, BLUR_TYPES}, + msm_vidc_adjust_min_quality, + msm_vidc_set_vbr_related_properties}, + + {MIN_QUALITY, ENC, HEVC, + 0, MAX_SUPPORTED_MIN_QUALITY, 70, MAX_SUPPORTED_MIN_QUALITY, + 0, + HFI_PROP_MAINTAIN_MIN_QUALITY, + CAP_FLAG_OUTPUT_PORT, + {BITRATE_MODE, PIX_FMTS, ENH_LAYER_COUNT, + META_ROI_INFO}, + {CONTENT_ADAPTIVE_CODING, BITRATE_BOOST, BLUR_TYPES}, + msm_vidc_adjust_min_quality, + msm_vidc_set_vbr_related_properties}, + + {VBV_DELAY, ENC, H264|HEVC, + 200, 300, 100, 300, + V4L2_CID_MPEG_VIDEO_VBV_DELAY, + HFI_PROP_VBV_DELAY, + CAP_FLAG_OUTPUT_PORT, + {BITRATE_MODE}, + {0}, + NULL, msm_vidc_set_cbr_related_properties}, + + {PEAK_BITRATE, ENC, H264|HEVC, + /* default peak bitrate is 10% larger than avrg bitrate */ + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_BITRATE_PEAK, + HFI_PROP_TOTAL_PEAK_BITRATE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {BITRATE_MODE, BIT_RATE}, + {0}, + msm_vidc_adjust_peak_bitrate, + msm_vidc_set_cbr_related_properties}, + + {MIN_FRAME_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, + V4L2_CID_MPEG_VIDEO_H264_MIN_QP, + HFI_PROP_MIN_QP_PACKED, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + {0}, {0}, + NULL, msm_vidc_set_min_qp}, + + {MIN_FRAME_QP, ENC, HEVC|HEIC, + MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, + V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP, + HFI_PROP_MIN_QP_PACKED, + CAP_FLAG_OUTPUT_PORT, + {PIX_FMTS}, {0}, + msm_vidc_adjust_hevc_min_qp, msm_vidc_set_min_qp}, + + {I_FRAME_MIN_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, + V4L2_CID_MPEG_VIDEO_H264_I_FRAME_MIN_QP}, + + {I_FRAME_MIN_QP, ENC, HEVC|HEIC, + MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, + V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_MIN_QP}, + + {P_FRAME_MIN_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, + V4L2_CID_MPEG_VIDEO_H264_P_FRAME_MIN_QP}, + + {P_FRAME_MIN_QP, ENC, HEVC|HEIC, + MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, + V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_MIN_QP}, + + {B_FRAME_MIN_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, + V4L2_CID_MPEG_VIDEO_H264_B_FRAME_MIN_QP}, + + {B_FRAME_MIN_QP, ENC, HEVC|HEIC, + MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, + V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_MIN_QP}, + + {MAX_FRAME_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_H264_MAX_QP, + HFI_PROP_MAX_QP_PACKED, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + {0}, {0}, + NULL, msm_vidc_set_max_qp}, + + {MAX_FRAME_QP, ENC, HEVC|HEIC, + MIN_QP_10BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP, + HFI_PROP_MAX_QP_PACKED, + CAP_FLAG_OUTPUT_PORT, + {PIX_FMTS}, {0}, + msm_vidc_adjust_hevc_max_qp, msm_vidc_set_max_qp}, + + {I_FRAME_MAX_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_H264_I_FRAME_MAX_QP}, + + {I_FRAME_MAX_QP, ENC, HEVC|HEIC, + MIN_QP_10BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_MAX_QP}, + + {P_FRAME_MAX_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_H264_P_FRAME_MAX_QP}, + + {P_FRAME_MAX_QP, ENC, HEVC|HEIC, + MIN_QP_10BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_MAX_QP}, + + {B_FRAME_MAX_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_H264_B_FRAME_MAX_QP}, + + {B_FRAME_MAX_QP, ENC, HEVC|HEIC, + MIN_QP_10BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_MAX_QP}, + + {I_FRAME_QP, ENC, HEVC, + MIN_QP_10BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {PIX_FMTS, BITRATE_MODE}, {0}, + msm_vidc_adjust_hevc_i_frame_qp, msm_vidc_set_frame_qp}, + + {I_FRAME_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {BITRATE_MODE}, {0}, + NULL, msm_vidc_set_frame_qp}, + + {P_FRAME_QP, ENC, HEVC, + MIN_QP_10BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {PIX_FMTS, BITRATE_MODE}, {0}, + msm_vidc_adjust_hevc_p_frame_qp, msm_vidc_set_frame_qp}, + + {P_FRAME_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {BITRATE_MODE}, {0}, + NULL, msm_vidc_set_frame_qp}, + + {B_FRAME_QP, ENC, HEVC, + MIN_QP_10BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {PIX_FMTS, BITRATE_MODE}, {0}, + msm_vidc_adjust_hevc_b_frame_qp, msm_vidc_set_frame_qp}, + + {B_FRAME_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_H264_B_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {BITRATE_MODE}, {0}, + NULL, msm_vidc_set_frame_qp}, + + {LAYER_TYPE, ENC, HEVC, + V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B, + V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P, + BIT(V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B) | + BIT(V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P), + V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE, + HFI_PROP_LAYER_ENCODING_TYPE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LAYER_TYPE, ENC, H264, + V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_B, + V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P, + BIT(V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_B) | + BIT(V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P), + V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P, + V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_TYPE, + HFI_PROP_LAYER_ENCODING_TYPE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LAYER_ENABLE, ENC, H264, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING, + HFI_PROP_LAYER_ENCODING_TYPE, + CAP_FLAG_OUTPUT_PORT}, + + {ENH_LAYER_COUNT, ENC, HEVC, + 0, 5, 1, 0, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER, + HFI_PROP_LAYER_COUNT, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {BITRATE_MODE, META_EVA_STATS}, + {GOP_SIZE, B_FRAME, BIT_RATE, MIN_QUALITY}, + msm_vidc_adjust_layer_count, msm_vidc_set_layer_count_and_type}, + + {ENH_LAYER_COUNT, ENC, H264, + 0, 5, 1, 0, + V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_LAYER, + HFI_PROP_LAYER_COUNT, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {BITRATE_MODE, META_EVA_STATS}, + {GOP_SIZE, B_FRAME, BIT_RATE, MIN_QUALITY}, + msm_vidc_adjust_layer_count, msm_vidc_set_layer_count_and_type}, + + /* + * layer bitrate is treated as BIT_RATE cap sibling and + * is handled in bitrate adjust and set functions + */ + {L0_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L0_BR, + HFI_PROP_BITRATE_LAYER1, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, + + {L1_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L1_BR, + HFI_PROP_BITRATE_LAYER2, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, + + {L2_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L2_BR, + HFI_PROP_BITRATE_LAYER3, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, + + {L3_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L3_BR, + HFI_PROP_BITRATE_LAYER4, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, + + {L4_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L4_BR, + HFI_PROP_BITRATE_LAYER5, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, + + {L5_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L5_BR, + HFI_PROP_BITRATE_LAYER6, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, + + {L0_BR, ENC, H264, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L0_BR, + HFI_PROP_BITRATE_LAYER1, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, + + {L1_BR, ENC, H264, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L1_BR, + HFI_PROP_BITRATE_LAYER2, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, + + {L2_BR, ENC, H264, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L2_BR, + HFI_PROP_BITRATE_LAYER3, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, + + {L3_BR, ENC, H264, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L3_BR, + HFI_PROP_BITRATE_LAYER4, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, + + {L4_BR, ENC, H264, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L4_BR, + HFI_PROP_BITRATE_LAYER5, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, + + {L5_BR, ENC, H264, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L5_BR, + HFI_PROP_BITRATE_LAYER6, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, + + {ENTROPY_MODE, ENC, H264, + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC, + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, + BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC) | + BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC), + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, + V4L2_CID_MPEG_VIDEO_H264_ENTROPY_MODE, + HFI_PROP_CABAC_SESSION, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {PROFILE}, + {0}, + msm_vidc_adjust_entropy_mode, msm_vidc_set_u32}, + + {ENTROPY_MODE, DEC, H264|HEVC|VP9, + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC, + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, + BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC) | + BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC), + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, + 0, + HFI_PROP_CABAC_SESSION}, + + /* H264 does not support 10 bit, PIX_FMTS would not be a Parent for this */ + {PROFILE, ENC, H264, + V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE, + V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH, + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_BASELINE) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_MAIN) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_HIGH), + V4L2_MPEG_VIDEO_H264_PROFILE_HIGH, + V4L2_CID_MPEG_VIDEO_H264_PROFILE, + HFI_PROP_PROFILE, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {0}, + {ENTROPY_MODE, TRANSFORM_8X8}, + NULL, msm_vidc_set_u32_enum}, + + {PROFILE, DEC, H264, + V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE, + V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH, + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_BASELINE) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_MAIN) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_HIGH), + V4L2_MPEG_VIDEO_H264_PROFILE_HIGH, + V4L2_CID_MPEG_VIDEO_H264_PROFILE, + HFI_PROP_PROFILE, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {0}, + {ENTROPY_MODE}, + NULL, msm_vidc_set_u32_enum}, + + {PROFILE, ENC|DEC, HEVC|HEIC, + V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN, + V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE, + BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN) | + BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE) | + BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10) | + BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE), + V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN, + V4L2_CID_MPEG_VIDEO_HEVC_PROFILE, + HFI_PROP_PROFILE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {PIX_FMTS}, + {0}, + msm_vidc_adjust_profile, msm_vidc_set_u32_enum}, + + {PROFILE, DEC, VP9, + V4L2_MPEG_VIDEO_VP9_PROFILE_0, + V4L2_MPEG_VIDEO_VP9_PROFILE_2, + BIT(V4L2_MPEG_VIDEO_VP9_PROFILE_0) | + BIT(V4L2_MPEG_VIDEO_VP9_PROFILE_2), + V4L2_MPEG_VIDEO_VP9_PROFILE_0, + V4L2_CID_MPEG_VIDEO_VP9_PROFILE, + HFI_PROP_PROFILE, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {0}, + {0}, + NULL, msm_vidc_set_u32_enum}, + + {LEVEL, DEC, VP9, + V4L2_MPEG_VIDEO_VP9_LEVEL_1_0, + V4L2_MPEG_VIDEO_VP9_LEVEL_6_0, + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_1_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_1_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_2_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_3_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_4_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_2) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_6_0), + V4L2_MPEG_VIDEO_VP9_LEVEL_6_0, + V4L2_CID_MPEG_VIDEO_VP9_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {0}, + {0}, + NULL, msm_vidc_set_u32_enum}, + + {LEVEL, DEC, H264, + V4L2_MPEG_VIDEO_H264_LEVEL_1_0, + V4L2_MPEG_VIDEO_H264_LEVEL_6_2, + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1B) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_3) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_1), + V4L2_MPEG_VIDEO_H264_LEVEL_6_1, + V4L2_CID_MPEG_VIDEO_H264_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {0}, + {0}, + NULL, msm_vidc_set_u32_enum}, + + {LEVEL, ENC, H264, + V4L2_MPEG_VIDEO_H264_LEVEL_1_0, + V4L2_MPEG_VIDEO_H264_LEVEL_6_0, + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1B) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_3) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_0), + V4L2_MPEG_VIDEO_H264_LEVEL_5_0, + V4L2_CID_MPEG_VIDEO_H264_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {0}, + {0}, + NULL, msm_vidc_set_level}, + + {LEVEL, DEC, HEVC|HEIC, + V4L2_MPEG_VIDEO_HEVC_LEVEL_1, + V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2, + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1), + V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1, + V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {0}, + {0}, + NULL, msm_vidc_set_u32_enum}, + + {LEVEL, ENC, HEVC|HEIC, + V4L2_MPEG_VIDEO_HEVC_LEVEL_1, + V4L2_MPEG_VIDEO_HEVC_LEVEL_6, + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6), + V4L2_MPEG_VIDEO_HEVC_LEVEL_5, + V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {0}, + {0}, + NULL, msm_vidc_set_level}, + + /* + * TODO: Bring the VP9 Level upstream GKI change, and level cap here + */ + + {HEVC_TIER, ENC|DEC, HEVC, + V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, + V4L2_MPEG_VIDEO_HEVC_TIER_HIGH, + BIT(V4L2_MPEG_VIDEO_HEVC_TIER_MAIN) | + BIT(V4L2_MPEG_VIDEO_HEVC_TIER_HIGH), + V4L2_MPEG_VIDEO_HEVC_TIER_HIGH, + V4L2_CID_MPEG_VIDEO_HEVC_TIER, + HFI_PROP_TIER, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {0}, + {0}, + NULL, msm_vidc_set_u32_enum}, + + {LF_MODE, ENC, H264, + V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED, + DB_H264_DISABLE_SLICE_BOUNDARY, + BIT(V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED) | + BIT(V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_DISABLED) | + BIT(DB_H264_DISABLE_SLICE_BOUNDARY), + V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED, + V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_MODE, + HFI_PROP_DEBLOCKING_MODE, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {0}, {0}, + NULL, msm_vidc_set_deblock_mode}, + + {LF_MODE, ENC, HEVC|HEIC, + V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_DISABLED, + DB_HEVC_DISABLE_SLICE_BOUNDARY, + BIT(V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_DISABLED) | + BIT(V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_ENABLED) | + BIT(DB_HEVC_DISABLE_SLICE_BOUNDARY), + V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_ENABLED, + V4L2_CID_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE, + HFI_PROP_DEBLOCKING_MODE, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {0}, {0}, + NULL, msm_vidc_set_deblock_mode}, + + {LF_ALPHA, ENC, H264, + -6, 6, 1, 0, + V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_ALPHA}, + + {LF_ALPHA, ENC, HEVC|HEIC, + -6, 6, 1, 0, + V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2}, + + {LF_BETA, ENC, H264, + -6, 6, 1, 0, + V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_BETA}, + + {LF_BETA, ENC, HEVC|HEIC, + -6, 6, 1, 0, + V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2}, + + {SLICE_MODE, ENC, H264|HEVC|HEIC, + V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, + V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_BYTES, + BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE) | + BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_MB) | + BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_BYTES), + V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, + V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE, + 0, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {BITRATE_MODE}, {0}, + msm_vidc_adjust_slice_count, msm_vidc_set_slice_count}, + + {SLICE_MAX_BYTES, ENC, H264|HEVC|HEIC, + MIN_SLICE_BYTE_SIZE, MAX_SLICE_BYTE_SIZE, + 1, MIN_SLICE_BYTE_SIZE, + V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES, + HFI_PROP_MULTI_SLICE_BYTES_COUNT, + CAP_FLAG_OUTPUT_PORT}, + + {SLICE_MAX_MB, ENC, H264|HEVC|HEIC, + 1, MAX_SLICE_MB_SIZE, 1, 1, + V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB, + HFI_PROP_MULTI_SLICE_MB_COUNT, + CAP_FLAG_OUTPUT_PORT}, + + // TODO: MB level RC - mapping + {MB_RC, ENC, H264|HEVC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_ENABLE, + V4L2_CID_MPEG_VIDEO_MB_RC_ENABLE, + 0, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + + {TRANSFORM_8X8, ENC, H264, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_ENABLE, + V4L2_CID_MPEG_VIDEO_H264_8X8_TRANSFORM, + HFI_PROP_8X8_TRANSFORM, + CAP_FLAG_OUTPUT_PORT, + {PROFILE}, {0}, + msm_vidc_adjust_transform_8x8, msm_vidc_set_u32}, + + {CHROMA_QP_INDEX_OFFSET, ENC, HEVC, + MIN_CHROMA_QP_OFFSET, MAX_CHROMA_QP_OFFSET, + 1, MAX_CHROMA_QP_OFFSET, + V4L2_CID_MPEG_VIDEO_H264_CHROMA_QP_INDEX_OFFSET, + HFI_PROP_CHROMA_QP_OFFSET, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + {0}, {0}, + msm_vidc_adjust_chroma_qp_index_offset, + msm_vidc_set_chroma_qp_index_offset}, + + {DISPLAY_DELAY_ENABLE, DEC, H264|HEVC|VP9, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY_ENABLE, + HFI_PROP_DECODE_ORDER_OUTPUT, + CAP_FLAG_ROOT | CAP_FLAG_INPUT_PORT}, + + {DISPLAY_DELAY, DEC, H264|HEVC|VP9, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY, + HFI_PROP_DECODE_ORDER_OUTPUT, + CAP_FLAG_ROOT | CAP_FLAG_INPUT_PORT}, + + /* conceal color */ + {CONCEAL_COLOR_8BIT, DEC, CODECS_ALL, 0x0, 0xff3fcff, 1, + DEFAULT_VIDEO_CONCEAL_COLOR_BLACK, + V4L2_CID_MPEG_VIDEO_MUTE_YUV, + HFI_PROP_CONCEAL_COLOR_8BIT, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + + {CONCEAL_COLOR_10BIT, DEC, CODECS_ALL, 0x0, 0x3fffffff, 1, + DEFAULT_VIDEO_CONCEAL_COLOR_BLACK, + V4L2_CID_MPEG_VIDEO_MUTE_YUV, + HFI_PROP_CONCEAL_COLOR_10BIT, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + + // TODO + {STAGE, DEC|ENC, CODECS_ALL, + MSM_VIDC_STAGE_1, + MSM_VIDC_STAGE_2, 1, + MSM_VIDC_STAGE_2, + 0, + HFI_PROP_STAGE, + CAP_FLAG_ROOT, + {0}, {0}, + NULL, msm_vidc_set_stage}, + + {STAGE, ENC, H264 | HEVC, + MSM_VIDC_STAGE_1, + MSM_VIDC_STAGE_2, 1, + MSM_VIDC_STAGE_2, + 0, + HFI_PROP_STAGE, + CAP_FLAG_NONE, + {LOWLATENCY_MODE}, {0}, + NULL, msm_vidc_set_stage}, + + {PIPE, DEC|ENC, CODECS_ALL, + MSM_VIDC_PIPE_1, + MSM_VIDC_PIPE_4, 1, + MSM_VIDC_PIPE_4, + 0, + HFI_PROP_PIPE, + CAP_FLAG_ROOT, + {0}, {0}, + NULL, msm_vidc_set_pipe}, + {POC, DEC, H264, 0, 18, 1, 1}, + {QUALITY_MODE, ENC, CODECS_ALL, + MSM_VIDC_MAX_QUALITY_MODE, + MSM_VIDC_POWER_SAVE_MODE, 1, + MSM_VIDC_POWER_SAVE_MODE}, + + {CODED_FRAMES, DEC, H264|HEVC|HEIC, + CODED_FRAMES_PROGRESSIVE, CODED_FRAMES_INTERLACE, + 1, CODED_FRAMES_PROGRESSIVE, + 0, + HFI_PROP_CODED_FRAMES}, + + {BIT_DEPTH, DEC, CODECS_ALL, BIT_DEPTH_8, BIT_DEPTH_10, 1, BIT_DEPTH_8, + 0, + HFI_PROP_LUMA_CHROMA_BIT_DEPTH}, + + {CODEC_CONFIG, DEC, H264|HEVC|HEIC, 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_CODEC_CONFIG, 0, + CAP_FLAG_DYNAMIC_ALLOWED}, + + {BITSTREAM_SIZE_OVERWRITE, DEC, CODECS_ALL, 0, INT_MAX, 1, 0, + V4L2_CID_MPEG_VIDC_MIN_BITSTREAM_SIZE_OVERWRITE}, + + {THUMBNAIL_MODE, DEC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_THUMBNAIL_MODE, + HFI_PROP_THUMBNAIL_MODE}, + + {DEFAULT_HEADER, DEC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, + HFI_PROP_DEC_DEFAULT_HEADER}, + + {RAP_FRAME, DEC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_ENABLE, + 0, + HFI_PROP_DEC_START_FROM_RAP_FRAME, + CAP_FLAG_INPUT_PORT, + {0}, {0}, + NULL, NULL}, + + {SEQ_CHANGE_AT_SYNC_FRAME, DEC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_ENABLE, + 0, + HFI_PROP_SEQ_CHANGE_AT_SYNC_FRAME, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {PRIORITY, DEC|ENC, CODECS_ALL, + 0, 2, 1, 1, + V4L2_CID_MPEG_VIDC_PRIORITY, + HFI_PROP_SESSION_PRIORITY, + CAP_FLAG_ROOT | CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + msm_vidc_adjust_session_priority, msm_vidc_set_session_priority}, + + {ENC_IP_CR, ENC, CODECS_ALL, + 0, S32_MAX, 1, 0, + V4L2_CID_MPEG_VIDC_ENC_INPUT_COMPRESSION_RATIO, + 0, CAP_FLAG_DYNAMIC_ALLOWED}, + + {DPB_LIST, DEC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, + HFI_PROP_DPB_LIST, + CAP_FLAG_OUTPUT_PORT, + {0}, {0}, + NULL, NULL}, + + {META_LTR_MARK_USE, ENC, H264|HEVC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_LTR_MARK_USE_DETAILS, + HFI_PROP_LTR_MARK_USE_DETAILS}, + + {META_SEQ_HDR_NAL, ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_SEQ_HEADER_NAL, + HFI_PROP_METADATA_SEQ_HEADER_NAL}, + + {META_DPB_MISR, DEC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_DPB_LUMA_CHROMA_MISR, + HFI_PROP_DPB_LUMA_CHROMA_MISR}, + + {META_OPB_MISR, DEC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_OPB_LUMA_CHROMA_MISR, + HFI_PROP_OPB_LUMA_CHROMA_MISR}, + + {META_INTERLACE, DEC, H264, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_INTERLACE, + HFI_PROP_INTERLACE_INFO}, + + {META_TIMESTAMP, DEC | ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_TIMESTAMP, + HFI_PROP_TIMESTAMP}, + + {META_CONCEALED_MB_CNT, DEC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_CONCEALED_MB_COUNT, + HFI_PROP_CONEALED_MB_COUNT}, + + {META_HIST_INFO, DEC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_HISTOGRAM_INFO, + HFI_PROP_HISTOGRAM_INFO}, + + {META_SEI_MASTERING_DISP, DEC|ENC, HEVC|HEIC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_SEI_MASTERING_DISPLAY_COLOUR, + HFI_PROP_SEI_MASTERING_DISPLAY_COLOUR}, + + {META_SEI_CLL, DEC|ENC, HEVC|HEIC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_SEI_CONTENT_LIGHT_LEVEL, + HFI_PROP_SEI_CONTENT_LIGHT_LEVEL}, + + {META_HDR10PLUS, DEC | ENC, HEVC|HEIC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_HDR10PLUS, + HFI_PROP_SEI_HDR10PLUS_USERDATA}, + + {META_EVA_STATS, ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_EVA_STATS, + HFI_PROP_EVA_STAT_INFO, + CAP_FLAG_ROOT, + {0}, + {ENH_LAYER_COUNT}}, + + {META_BUF_TAG, DEC | ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_BUFFER_TAG, + HFI_PROP_BUFFER_TAG}, + + {META_DPB_TAG_LIST, DEC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_DPB_TAG_LIST, + HFI_PROP_DPB_TAG_LIST}, + + {META_OUTPUT_BUF_TAG, DEC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, + HFI_PROP_BUFFER_TAG}, + + {META_SUBFRAME_OUTPUT, DEC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_SUBFRAME_OUTPUT, + HFI_PROP_SUBFRAME_OUTPUT}, + + {META_ENC_QP_METADATA, ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_ENC_QP_METADATA, + HFI_PROP_ENC_QP_METADATA}, + + {META_ROI_INFO, ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_ROI_INFO, + HFI_PROP_ROI_INFO, + CAP_FLAG_INPUT_PORT, + {BITRATE_MODE, PIX_FMTS}, + {0}, + msm_vidc_adjust_roi_info, NULL}, + + {META_ROI_INFO, ENC, H264|HEVC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_ROI_INFO, + HFI_PROP_ROI_INFO, + CAP_FLAG_INPUT_PORT, + {BITRATE_MODE, PIX_FMTS}, + {MIN_QUALITY}, + msm_vidc_adjust_roi_info, NULL}, + + {META_DEC_QP_METADATA, DEC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_DEC_QP_METADATA, + HFI_PROP_DEC_QP_METADATA}, + + /* configure image properties */ + {FRAME_WIDTH, ENC, HEIC, 128, 16384, 1, 16384}, + {FRAME_HEIGHT, ENC, HEIC, 128, 16384, 1, 16384}, + {MIN_BUFFERS_INPUT, ENC|DEC, HEIC, 0, 64, 1, 1, + V4L2_CID_MIN_BUFFERS_FOR_OUTPUT}, + {MBPF, DEC, HEIC, 64, 262144, 1, 262144 }, /* ((8192x8192)/256) */ + {MBPF, ENC, HEIC, 36, 1048576, 1, 1048576}, /* ((16384x16384)/256) */ + {MBPS, DEC, HEIC, 64, 262144, 1, 262144 }, /* ((8192x8192)/256)@1fps */ + {MBPS, ENC, HEIC, 36, 1048576, 1, 1048576}, /* ((16384x16384)/256)@1fps */ + {BITRATE_MODE, ENC, HEIC, + V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, + V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CQ), + V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, + V4L2_CID_MPEG_VIDEO_BITRATE_MODE, + HFI_PROP_RATE_CONTROL, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {0}, + {TIME_DELTA_BASED_RC, CONSTANT_QUALITY}, + msm_vidc_adjust_bitrate_mode, msm_vidc_set_u32_enum}, + {TIME_DELTA_BASED_RC, ENC, HEIC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_TIME_DELTA_BASED_RC, + HFI_PROP_TIME_DELTA_BASED_RATE_CONTROL, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + {BITRATE_MODE}, {0}, + msm_vidc_adjust_delta_based_rc, msm_vidc_set_u32}, + {CONSTANT_QUALITY, ENC, HEIC, + 1, MAX_CONSTANT_QUALITY, 1, 100, + V4L2_CID_MPEG_VIDEO_CONSTANT_QUALITY, + HFI_PROP_CONSTANT_QUALITY, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {BITRATE_MODE}, {0}, + NULL, msm_vidc_set_constant_quality}, + {GRID, ENC, HEIC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_ENABLE, + 0, + HFI_PROP_HEIC_GRID_ENABLE, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + {0}, {0}, + NULL, msm_vidc_set_u32}, + {GOP_SIZE, ENC, HEIC, + 0, INT_MAX, 1, 0 /* all intra */, + V4L2_CID_MPEG_VIDEO_GOP_SIZE, + HFI_PROP_MAX_GOP_FRAMES, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + NULL, msm_vidc_set_u32}, + {B_FRAME, ENC, HEIC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDEO_B_FRAMES, + HFI_PROP_MAX_B_FRAMES, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + {0}, {0}, + NULL, msm_vidc_set_u32}, + {PIX_FMTS, ENC, HEIC, + MSM_VIDC_FMT_NV12, + MSM_VIDC_FMT_P010, + MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_P010, + MSM_VIDC_FMT_NV12, + 0, 0, + CAP_FLAG_ROOT, + {0}, + {PROFILE}}, + {HEVC_TIER, ENC|DEC, HEIC, + V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, + V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, + BIT(V4L2_MPEG_VIDEO_HEVC_TIER_MAIN), + V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, + V4L2_CID_MPEG_VIDEO_HEVC_TIER, + HFI_PROP_TIER, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {0}, + {0}, + NULL, msm_vidc_set_u32_enum}, + {FRAME_RATE, ENC, HEIC, + (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), + 1, (MINIMUM_FPS << 16), + 0, + HFI_PROP_FRAME_RATE, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + {0}, {0}, + NULL, msm_vidc_set_q16}, + {META_SUBFRAME_OUTPUT, ENC, HEIC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_SUBFRAME_OUTPUT, + HFI_PROP_SUBFRAME_OUTPUT}, + {COMPLEXITY, ENC, H264 | HEVC, + 0, 100, + 1, 100, + V4L2_CID_MPEG_VIDC_VENC_COMPLEXITY}, + {META_MAX_NUM_REORDER_FRAMES, DEC, HEVC | H264, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_MAX_NUM_REORDER_FRAMES, + HFI_PROP_MAX_NUM_REORDER_FRAMES}, +}; + +/* + * Custom conversion coefficients for resolution: 176x144 negative + * coeffs are converted to s4.9 format + * (e.g. -22 converted to ((1 << 13) - 22) + * 3x3 transformation matrix coefficients in s4.9 fixed point format + */ +static u32 vpe_csc_custom_matrix_coeff[MAX_MATRIX_COEFFS] = { + 440, 8140, 8098, 0, 460, 52, 0, 34, 463 +}; + +/* offset coefficients in s9 fixed point format */ +static u32 vpe_csc_custom_bias_coeff[MAX_BIAS_COEFFS] = { + 53, 0, 4 +}; + +/* clamping value for Y/U/V([min,max] for Y/U/V) */ +static u32 vpe_csc_custom_limit_coeff[MAX_LIMIT_COEFFS] = { + 16, 235, 16, 240, 16, 240 +}; + +/* Default UBWC config for LPDDR5 */ +static struct msm_vidc_ubwc_config_data ubwc_config_kalama[] = { + UBWC_CONFIG(8, 32, 16, 0, 1, 1, 1), +}; + +/* Default bus bandwidth for non_real time session based on priority */ +static u32 bus_bw_nrt[] = { + 15000000, + 11000000, +}; + +static struct msm_vidc_platform_data kalama_data = { + .core_data = core_data_kalama, + .core_data_size = ARRAY_SIZE(core_data_kalama), + .instance_data = instance_data_kalama, + .instance_data_size = ARRAY_SIZE(instance_data_kalama), + .csc_data.vpe_csc_custom_bias_coeff = vpe_csc_custom_bias_coeff, + .csc_data.vpe_csc_custom_matrix_coeff = vpe_csc_custom_matrix_coeff, + .csc_data.vpe_csc_custom_limit_coeff = vpe_csc_custom_limit_coeff, + .ubwc_config = ubwc_config_kalama, + .bus_bw_nrt = bus_bw_nrt, +}; + +static int msm_vidc_init_data(struct msm_vidc_core *core) +{ + int rc = 0; + + if (!core || !core->platform) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + d_vpr_h("%s: initialize kalama data\n", __func__); + + core->platform->data = kalama_data; + + return rc; +} + +int msm_vidc_init_platform_kalama(struct msm_vidc_core *core, struct device *dev) +{ + int rc = 0; + + rc = msm_vidc_init_data(core); + if (rc) + return rc; + + return 0; +} + +int msm_vidc_deinit_platform_kalama(struct msm_vidc_core *core, struct device *dev) +{ + /* do nothing */ + return 0; +} diff --git a/driver/variant/iris3/inc/hfi_buffer_iris3.h b/driver/variant/iris3/inc/hfi_buffer_iris3.h new file mode 100644 index 0000000000..15ebf70eb9 --- /dev/null +++ b/driver/variant/iris3/inc/hfi_buffer_iris3.h @@ -0,0 +1,1540 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. + * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#ifndef __HFI_BUFFER_IRIS3__ +#define __HFI_BUFFER_IRIS3__ + +#include +#include "hfi_property.h" + +typedef u8 HFI_U8; +typedef s8 HFI_S8; +typedef u16 HFI_U16; +typedef s16 HFI_S16; +typedef u32 HFI_U32; +typedef s32 HFI_S32; +typedef u64 HFI_U64; +typedef HFI_U32 HFI_BOOL; + +#ifndef MIN +#define MIN(x, y) (((x) < (y)) ? (x) : (y)) +#endif + +#ifndef MAX +#define MAX(x, y) (((x) > (y)) ? (x) : (y)) +#endif + +#define HFI_ALIGNMENT_4096 (4096) + +#define BUF_SIZE_ALIGN_16 (16) +#define BUF_SIZE_ALIGN_32 (32) +#define BUF_SIZE_ALIGN_64 (64) +#define BUF_SIZE_ALIGN_128 (128) +#define BUF_SIZE_ALIGN_256 (256) +#define BUF_SIZE_ALIGN_512 (512) +#define BUF_SIZE_ALIGN_4096 (4096) + +#define HFI_ALIGN(a, b) (((b) & ((b) - 1)) ? (((a) + (b) - 1) / \ + (b) * (b)) : (((a) + (b) - 1) & (~((b) - 1)))) + +#define HFI_WORKMODE_1 1 +#define HFI_WORKMODE_2 2 + +#define HFI_DEFAULT_METADATA_STRIDE_MULTIPLE (64) +#define HFI_DEFAULT_METADATA_BUFFERHEIGHT_MULTIPLE (16) + +#define HFI_COLOR_FORMAT_YUV420_NV12_UBWC_Y_TILE_HEIGHT (8) +#define HFI_COLOR_FORMAT_YUV420_NV12_UBWC_Y_TILE_WIDTH (32) +#define HFI_COLOR_FORMAT_YUV420_NV12_UBWC_UV_TILE_HEIGHT (8) +#define HFI_COLOR_FORMAT_YUV420_NV12_UBWC_UV_TILE_WIDTH (16) +#define HFI_COLOR_FORMAT_YUV420_TP10_UBWC_Y_TILE_HEIGHT (4) +#define HFI_COLOR_FORMAT_YUV420_TP10_UBWC_Y_TILE_WIDTH (48) +#define HFI_COLOR_FORMAT_YUV420_TP10_UBWC_UV_TILE_HEIGHT (4) +#define HFI_COLOR_FORMAT_YUV420_TP10_UBWC_UV_TILE_WIDTH (24) +#define HFI_COLOR_FORMAT_RGBA8888_UBWC_TILE_HEIGHT (4) +#define HFI_COLOR_FORMAT_RGBA8888_UBWC_TILE_WIDTH (16) + +#define HFI_NV12_IL_CALC_Y_STRIDE(stride, frame_width, stride_multiple) \ + stride = HFI_ALIGN(frame_width, stride_multiple) + +#define HFI_NV12_IL_CALC_Y_BUFHEIGHT(buf_height, frame_height, \ + min_buf_height_multiple) buf_height = HFI_ALIGN(frame_height, \ + min_buf_height_multiple) + +#define HFI_NV12_IL_CALC_UV_STRIDE(stride, frame_width, stride_multiple) \ + stride = HFI_ALIGN(frame_width, stride_multiple) + +#define HFI_NV12_IL_CALC_UV_BUFHEIGHT(buf_height, frame_height, \ + min_buf_height_multiple) buf_height = HFI_ALIGN(((frame_height + 1) \ + >> 1), min_buf_height_multiple) + +#define HFI_NV12_IL_CALC_BUF_SIZE(buf_size, y_bufSize, y_stride, y_buf_height, \ + uv_buf_size, uv_stride, uv_buf_height) \ + y_bufSize = (y_stride * y_buf_height); \ + uv_buf_size = (uv_stride * uv_buf_height); \ + buf_size = HFI_ALIGN(y_bufSize + uv_buf_size, HFI_ALIGNMENT_4096) + +#define HFI_NV12_UBWC_IL_CALC_Y_BUF_SIZE(y_bufSize, y_stride, y_buf_height) \ + y_bufSize = HFI_ALIGN(y_stride * y_buf_height, HFI_ALIGNMENT_4096) + +#define HFI_NV12_UBWC_IL_CALC_UV_BUF_SIZE(uv_buf_size, \ + uv_stride, uv_buf_height) \ + uv_buf_size = HFI_ALIGN(uv_stride * uv_buf_height, HFI_ALIGNMENT_4096) + +#define HFI_NV12_UBWC_IL_CALC_BUF_SIZE_V2(buf_size,\ + frame_width, frame_height, y_stride_multiple,\ + y_buffer_height_multiple, uv_stride_multiple, \ + uv_buffer_height_multiple, y_metadata_stride_multiple, \ + y_metadata_buffer_height_multiple, \ + uv_metadata_stride_multiple, uv_metadata_buffer_height_multiple) \ + do \ + { \ + HFI_U32 y_buf_size, uv_buf_size, y_meta_size, uv_meta_size; \ + HFI_U32 stride, _height; \ + HFI_U32 half_height = (frame_height + 1) >> 1; \ + HFI_NV12_IL_CALC_Y_STRIDE(stride, frame_width,\ + y_stride_multiple); \ + HFI_NV12_IL_CALC_Y_BUFHEIGHT(_height, half_height,\ + y_buffer_height_multiple); \ + HFI_NV12_UBWC_IL_CALC_Y_BUF_SIZE(y_buf_size, stride, _height);\ + HFI_NV12_IL_CALC_UV_STRIDE(stride, frame_width, \ + uv_stride_multiple); \ + HFI_NV12_IL_CALC_UV_BUFHEIGHT(_height, half_height, \ + uv_buffer_height_multiple); \ + HFI_NV12_UBWC_IL_CALC_UV_BUF_SIZE(uv_buf_size, stride, _height);\ + HFI_UBWC_CALC_METADATA_PLANE_STRIDE(stride, frame_width,\ + y_metadata_stride_multiple, \ + HFI_COLOR_FORMAT_YUV420_NV12_UBWC_Y_TILE_WIDTH);\ + HFI_UBWC_METADATA_PLANE_BUFHEIGHT(_height, half_height, \ + y_metadata_buffer_height_multiple,\ + HFI_COLOR_FORMAT_YUV420_NV12_UBWC_Y_TILE_HEIGHT);\ + HFI_UBWC_METADATA_PLANE_BUFFER_SIZE(y_meta_size, stride, \ + _height); \ + HFI_UBWC_UV_METADATA_PLANE_STRIDE(stride, frame_width,\ + uv_metadata_stride_multiple, \ + HFI_COLOR_FORMAT_YUV420_NV12_UBWC_UV_TILE_WIDTH); \ + HFI_UBWC_UV_METADATA_PLANE_BUFHEIGHT(_height, half_height,\ + uv_metadata_buffer_height_multiple,\ + HFI_COLOR_FORMAT_YUV420_NV12_UBWC_UV_TILE_HEIGHT);\ + HFI_UBWC_METADATA_PLANE_BUFFER_SIZE(uv_meta_size, stride, \ + _height); \ + buf_size = (y_buf_size + uv_buf_size + y_meta_size + \ + uv_meta_size) << 1;\ + } while (0) + +#define HFI_YUV420_TP10_CALC_Y_STRIDE(stride, frame_width, stride_multiple) \ + stride = HFI_ALIGN(frame_width, 192); \ + stride = HFI_ALIGN(stride * 4 / 3, stride_multiple) + +#define HFI_YUV420_TP10_CALC_Y_BUFHEIGHT(buf_height, frame_height, \ + min_buf_height_multiple) \ + buf_height = HFI_ALIGN(frame_height, min_buf_height_multiple) + +#define HFI_YUV420_TP10_CALC_UV_STRIDE(stride, frame_width, stride_multiple) \ + stride = HFI_ALIGN(frame_width, 192); \ + stride = HFI_ALIGN(stride * 4 / 3, stride_multiple) + +#define HFI_YUV420_TP10_CALC_UV_BUFHEIGHT(buf_height, frame_height, \ + min_buf_height_multiple) \ + buf_height = HFI_ALIGN(((frame_height + 1) >> 1), \ + min_buf_height_multiple) + +#define HFI_YUV420_TP10_CALC_BUF_SIZE(buf_size, y_buf_size, y_stride,\ + y_buf_height, uv_buf_size, uv_stride, uv_buf_height) \ + y_buf_size = (y_stride * y_buf_height); \ + uv_buf_size = (uv_stride * uv_buf_height); \ + buf_size = y_buf_size + uv_buf_size + +#define HFI_YUV420_TP10_UBWC_CALC_Y_BUF_SIZE(y_buf_size, y_stride, \ + y_buf_height) \ + y_buf_size = HFI_ALIGN(y_stride * y_buf_height, HFI_ALIGNMENT_4096) + +#define HFI_YUV420_TP10_UBWC_CALC_UV_BUF_SIZE(uv_buf_size, uv_stride, \ + uv_buf_height) \ + uv_buf_size = HFI_ALIGN(uv_stride * uv_buf_height, HFI_ALIGNMENT_4096) + +#define HFI_YUV420_TP10_UBWC_CALC_BUF_SIZE(buf_size, y_stride, y_buf_height, \ + uv_stride, uv_buf_height, y_md_stride, y_md_height, uv_md_stride, \ + uv_md_height)\ + do \ + { \ + HFI_U32 y_data_size, uv_data_size, y_md_size, uv_md_size; \ + HFI_YUV420_TP10_UBWC_CALC_Y_BUF_SIZE(y_data_size, y_stride,\ + y_buf_height); \ + HFI_YUV420_TP10_UBWC_CALC_UV_BUF_SIZE(uv_data_size, uv_stride, \ + uv_buf_height); \ + HFI_UBWC_METADATA_PLANE_BUFFER_SIZE(y_md_size, y_md_stride, \ + y_md_height); \ + HFI_UBWC_METADATA_PLANE_BUFFER_SIZE(uv_md_size, uv_md_stride, \ + uv_md_height); \ + buf_size = y_data_size + uv_data_size + y_md_size + \ + uv_md_size; \ + } while (0) + +#define HFI_YUV420_P010_CALC_Y_STRIDE(stride, frame_width, stride_multiple) \ + stride = HFI_ALIGN(frame_width * 2, stride_multiple) + +#define HFI_YUV420_P010_CALC_Y_BUFHEIGHT(buf_height, frame_height, \ + min_buf_height_multiple) \ + buf_height = HFI_ALIGN(frame_height, min_buf_height_multiple) + +#define HFI_YUV420_P010_CALC_UV_STRIDE(stride, frame_width, stride_multiple) \ + stride = HFI_ALIGN(frame_width * 2, stride_multiple) + +#define HFI_YUV420_P010_CALC_UV_BUFHEIGHT(buf_height, frame_height, \ + min_buf_height_multiple) \ + buf_height = HFI_ALIGN(((frame_height + 1) >> 1), \ + min_buf_height_multiple) + +#define HFI_YUV420_P010_CALC_BUF_SIZE(buf_size, y_data_size, y_stride, \ + y_buf_height, uv_data_size, uv_stride, uv_buf_height) \ + do \ + { \ + y_data_size = HFI_ALIGN(y_stride * y_buf_height, \ + HFI_ALIGNMENT_4096);\ + uv_data_size = HFI_ALIGN(uv_stride * uv_buf_height, \ + HFI_ALIGNMENT_4096); \ + buf_size = y_data_size + uv_data_size; \ + } while (0) + +#define HFI_RGB888_CALC_STRIDE(stride, frame_width, stride_multiple) \ + stride = ((frame_width * 3) + stride_multiple - 1) & \ + (0xffffffff - (stride_multiple - 1)) + +#define HFI_RGB888_CALC_BUFHEIGHT(buf_height, frame_height, \ + min_buf_height_multiple) \ + buf_height = ((frame_height + min_buf_height_multiple - 1) & \ + (0xffffffff - (min_buf_height_multiple - 1))) + +#define HFI_RGB888_CALC_BUF_SIZE(buf_size, stride, buf_height) \ + buf_size = ((stride) * (buf_height)) + +#define HFI_RGBA8888_CALC_STRIDE(stride, frame_width, stride_multiple) \ + stride = HFI_ALIGN((frame_width << 2), stride_multiple) + +#define HFI_RGBA8888_CALC_BUFHEIGHT(buf_height, frame_height, \ + min_buf_height_multiple) \ + buf_height = HFI_ALIGN(frame_height, min_buf_height_multiple) + +#define HFI_RGBA8888_CALC_BUF_SIZE(buf_size, stride, buf_height) \ + buf_size = (stride) * (buf_height) + +#define HFI_RGBA8888_UBWC_CALC_DATA_PLANE_BUF_SIZE(buf_size, stride, \ + buf_height) \ + buf_size = HFI_ALIGN((stride) * (buf_height), HFI_ALIGNMENT_4096) + +#define HFI_RGBA8888_UBWC_BUF_SIZE(buf_size, data_buf_size, \ + metadata_buffer_size, stride, buf_height, _metadata_tride, \ + _metadata_buf_height) \ + HFI_RGBA8888_UBWC_CALC_DATA_PLANE_BUF_SIZE(data_buf_size, \ + stride, buf_height); \ + HFI_UBWC_METADATA_PLANE_BUFFER_SIZE(metadata_buffer_size, \ + _metadata_tride, _metadata_buf_height); \ + buf_size = data_buf_size + metadata_buffer_size + +#define HFI_UBWC_CALC_METADATA_PLANE_STRIDE(metadata_stride, frame_width,\ + metadata_stride_multiple, tile_width_in_pels) \ + metadata_stride = HFI_ALIGN(((frame_width + (tile_width_in_pels - 1)) /\ + tile_width_in_pels), metadata_stride_multiple) + +#define HFI_UBWC_METADATA_PLANE_BUFHEIGHT(metadata_buf_height, frame_height, \ + metadata_height_multiple, tile_height_in_pels) \ + metadata_buf_height = HFI_ALIGN(((frame_height + \ + (tile_height_in_pels - 1)) / tile_height_in_pels), \ + metadata_height_multiple) + +#define HFI_UBWC_UV_METADATA_PLANE_STRIDE(metadata_stride, frame_width, \ + metadata_stride_multiple, tile_width_in_pels) \ + metadata_stride = HFI_ALIGN(((((frame_width + 1) >> 1) +\ + (tile_width_in_pels - 1)) / tile_width_in_pels), \ + metadata_stride_multiple) + +#define HFI_UBWC_UV_METADATA_PLANE_BUFHEIGHT(metadata_buf_height, frame_height,\ + metadata_height_multiple, tile_height_in_pels) \ + metadata_buf_height = HFI_ALIGN(((((frame_height + 1) >> 1) + \ + (tile_height_in_pels - 1)) / tile_height_in_pels), \ + metadata_height_multiple) + +#define HFI_UBWC_METADATA_PLANE_BUFFER_SIZE(buffer_size, _metadata_tride, \ + _metadata_buf_height) \ + buffer_size = HFI_ALIGN(_metadata_tride * _metadata_buf_height, \ + HFI_ALIGNMENT_4096) + +#define BUFFER_ALIGNMENT_512_BYTES 512 +#define BUFFER_ALIGNMENT_256_BYTES 256 +#define BUFFER_ALIGNMENT_128_BYTES 128 +#define BUFFER_ALIGNMENT_64_BYTES 64 +#define BUFFER_ALIGNMENT_32_BYTES 32 +#define BUFFER_ALIGNMENT_16_BYTES 16 +#define BUFFER_ALIGNMENT_8_BYTES 8 +#define BUFFER_ALIGNMENT_4_BYTES 4 + +#define VENUS_DMA_ALIGNMENT BUFFER_ALIGNMENT_256_BYTES + +#define MAX_FE_NBR_CTRL_LCU64_LINE_BUFFER_SIZE 64 +#define MAX_FE_NBR_CTRL_LCU32_LINE_BUFFER_SIZE 64 +#define MAX_FE_NBR_CTRL_LCU16_LINE_BUFFER_SIZE 64 +#define MAX_FE_NBR_DATA_LUMA_LINE_BUFFER_SIZE 640 +#define MAX_FE_NBR_DATA_CB_LINE_BUFFER_SIZE 320 +#define MAX_FE_NBR_DATA_CR_LINE_BUFFER_SIZE 320 + +#define MAX_SE_NBR_CTRL_LCU64_LINE_BUFFER_SIZE (128 / 8) +#define MAX_SE_NBR_CTRL_LCU32_LINE_BUFFER_SIZE (128 / 8) +#define MAX_SE_NBR_CTRL_LCU16_LINE_BUFFER_SIZE (128 / 8) + +#define MAX_PE_NBR_DATA_LCU64_LINE_BUFFER_SIZE (64 * 2 * 3) +#define MAX_PE_NBR_DATA_LCU32_LINE_BUFFER_SIZE (32 * 2 * 3) +#define MAX_PE_NBR_DATA_LCU16_LINE_BUFFER_SIZE (16 * 2 * 3) + +#define MAX_TILE_COLUMNS 32 + +#define SIZE_VPSS_LB(Size, frame_width, frame_height, num_vpp_pipes) \ + do \ + { \ + HFI_U32 vpss_4tap_top_buffer_size, vpss_div2_top_buffer_size, \ + vpss_4tap_left_buffer_size, vpss_div2_left_buffer_size; \ + HFI_U32 opb_wr_top_line_luma_buffer_size, \ + opb_wr_top_line_chroma_buffer_size, \ + opb_lb_wr_llb_y_buffer_size,\ + opb_lb_wr_llb_uv_buffer_size; \ + HFI_U32 macrotiling_size; \ + vpss_4tap_top_buffer_size = vpss_div2_top_buffer_size = \ + vpss_4tap_left_buffer_size = vpss_div2_left_buffer_size = 0; \ + macrotiling_size = 32; \ + opb_wr_top_line_luma_buffer_size = HFI_ALIGN(frame_width, \ + macrotiling_size) / macrotiling_size * 256; \ + opb_wr_top_line_luma_buffer_size = \ + HFI_ALIGN(opb_wr_top_line_luma_buffer_size, \ + VENUS_DMA_ALIGNMENT) + (MAX_TILE_COLUMNS - 1) * 256; \ + opb_wr_top_line_luma_buffer_size = \ + MAX(opb_wr_top_line_luma_buffer_size, (32 * \ + HFI_ALIGN(frame_height, 8))); \ + opb_wr_top_line_chroma_buffer_size = \ + opb_wr_top_line_luma_buffer_size;\ + opb_lb_wr_llb_uv_buffer_size = opb_lb_wr_llb_y_buffer_size = \ + HFI_ALIGN((HFI_ALIGN(frame_height, 8) / (4 / 2)) * 64,\ + BUFFER_ALIGNMENT_32_BYTES); \ + Size = num_vpp_pipes * 2 * (vpss_4tap_top_buffer_size + \ + vpss_div2_top_buffer_size) + \ + 2 * (vpss_4tap_left_buffer_size + \ + vpss_div2_left_buffer_size) + \ + opb_wr_top_line_luma_buffer_size + \ + opb_wr_top_line_chroma_buffer_size + \ + opb_lb_wr_llb_uv_buffer_size + \ + opb_lb_wr_llb_y_buffer_size; \ + } while (0) + +#define VPP_CMD_MAX_SIZE (1 << 20) +#define NUM_HW_PIC_BUF 32 +#define BIN_BUFFER_THRESHOLD (1280 * 736) +#define H264D_MAX_SLICE 1800 +#define SIZE_H264D_BUFTAB_T (256) +#define SIZE_H264D_HW_PIC_T (1 << 11) +#define SIZE_H264D_BSE_CMD_PER_BUF (32 * 4) +#define SIZE_H264D_VPP_CMD_PER_BUF (512) + +#define SIZE_H264D_LB_FE_TOP_DATA(frame_width, frame_height) \ + (MAX_FE_NBR_DATA_LUMA_LINE_BUFFER_SIZE * HFI_ALIGN(frame_width, 16) * 3) + +#define SIZE_H264D_LB_FE_TOP_CTRL(frame_width, frame_height) \ + (MAX_FE_NBR_CTRL_LCU64_LINE_BUFFER_SIZE * ((frame_width + 15) >> 4)) + +#define SIZE_H264D_LB_FE_LEFT_CTRL(frame_width, frame_height) \ + (MAX_FE_NBR_CTRL_LCU64_LINE_BUFFER_SIZE * ((frame_height + 15) >> 4)) + +#define SIZE_H264D_LB_SE_TOP_CTRL(frame_width, frame_height) \ + (MAX_SE_NBR_CTRL_LCU64_LINE_BUFFER_SIZE * ((frame_width + 15) >> 4)) + +#define SIZE_H264D_LB_SE_LEFT_CTRL(frame_width, frame_height) \ + (MAX_SE_NBR_CTRL_LCU64_LINE_BUFFER_SIZE * ((frame_height + 15) >> 4)) + +#define SIZE_H264D_LB_PE_TOP_DATA(frame_width, frame_height) \ + (MAX_PE_NBR_DATA_LCU64_LINE_BUFFER_SIZE * ((frame_width + 15) >> 4)) + +#define SIZE_H264D_LB_VSP_TOP(frame_width, frame_height) \ + ((((frame_width + 15) >> 4) << 7)) + +#define SIZE_H264D_LB_RECON_DMA_METADATA_WR(frame_width, frame_height) \ + (HFI_ALIGN(frame_height, 16) * 32) + +#define SIZE_H264D_QP(frame_width, frame_height) \ + (((frame_width + 63) >> 6) * ((frame_height + 63) >> 6) * 128) + +#define SIZE_HW_PIC(size_per_buf) \ + (NUM_HW_PIC_BUF * size_per_buf) + +#define SIZE_H264D_BSE_CMD_BUF(_size, frame_width, frame_height) \ + do \ + { \ + HFI_U32 _height = HFI_ALIGN(frame_height, \ + BUFFER_ALIGNMENT_32_BYTES); \ + _size = MIN((((_height + 15) >> 4) * 3 * 4), H264D_MAX_SLICE) *\ + SIZE_H264D_BSE_CMD_PER_BUF; \ + } while (0) + +#define SIZE_H264D_VPP_CMD_BUF(_size, frame_width, frame_height) \ + do \ + { \ + HFI_U32 _height = HFI_ALIGN(frame_height, \ + BUFFER_ALIGNMENT_32_BYTES); \ + _size = MIN((((_height + 15) >> 4) * 3 * 4), H264D_MAX_SLICE) * \ + SIZE_H264D_VPP_CMD_PER_BUF; \ + if (_size > VPP_CMD_MAX_SIZE) { _size = VPP_CMD_MAX_SIZE; } \ + } while (0) + +#define HFI_BUFFER_COMV_H264D(coMV_size, frame_width, \ + frame_height, _yuv_bufcount_min) \ + do \ + { \ + HFI_U32 frame_width_in_mbs = ((frame_width + 15) >> 4); \ + HFI_U32 frame_height_in_mbs = ((frame_height + 15) >> 4); \ + HFI_U32 col_mv_aligned_width = (frame_width_in_mbs << 7); \ + HFI_U32 col_zero_aligned_width = (frame_width_in_mbs << 2); \ + HFI_U32 col_zero_size = 0, size_colloc = 0; \ + col_mv_aligned_width = HFI_ALIGN(col_mv_aligned_width, \ + BUFFER_ALIGNMENT_16_BYTES); \ + col_zero_aligned_width = HFI_ALIGN(col_zero_aligned_width, \ + BUFFER_ALIGNMENT_16_BYTES); \ + col_zero_size = col_zero_aligned_width * \ + ((frame_height_in_mbs + 1) >> 1); \ + col_zero_size = HFI_ALIGN(col_zero_size, \ + BUFFER_ALIGNMENT_64_BYTES); \ + col_zero_size <<= 1; \ + col_zero_size = HFI_ALIGN(col_zero_size, \ + BUFFER_ALIGNMENT_512_BYTES); \ + size_colloc = col_mv_aligned_width * ((frame_height_in_mbs + \ + 1) >> 1); \ + size_colloc = HFI_ALIGN(size_colloc, \ + BUFFER_ALIGNMENT_64_BYTES); \ + size_colloc <<= 1; \ + size_colloc = HFI_ALIGN(size_colloc, \ + BUFFER_ALIGNMENT_512_BYTES); \ + size_colloc += (col_zero_size + SIZE_H264D_BUFTAB_T * 2); \ + coMV_size = size_colloc * (_yuv_bufcount_min); \ + coMV_size += BUFFER_ALIGNMENT_512_BYTES; \ + } while (0) + +#define HFI_BUFFER_NON_COMV_H264D(_size, frame_width, frame_height, \ + num_vpp_pipes) \ + do \ + { \ + HFI_U32 _size_bse, _size_vpp; \ + SIZE_H264D_BSE_CMD_BUF(_size_bse, frame_width, frame_height); \ + SIZE_H264D_VPP_CMD_BUF(_size_vpp, frame_width, frame_height); \ + _size = HFI_ALIGN(_size_bse, VENUS_DMA_ALIGNMENT) + \ + HFI_ALIGN(_size_vpp, VENUS_DMA_ALIGNMENT) + \ + HFI_ALIGN(SIZE_HW_PIC(SIZE_H264D_HW_PIC_T), \ + VENUS_DMA_ALIGNMENT); \ + _size = HFI_ALIGN(_size, VENUS_DMA_ALIGNMENT); \ + } while (0) + +#define HFI_BUFFER_LINE_H264D(_size, frame_width, frame_height, \ + is_opb, num_vpp_pipes) \ + do \ + { \ + HFI_U32 vpss_lb_size = 0; \ + _size = HFI_ALIGN(SIZE_H264D_LB_FE_TOP_DATA(frame_width, \ + frame_height), VENUS_DMA_ALIGNMENT) + \ + HFI_ALIGN(SIZE_H264D_LB_FE_TOP_CTRL(frame_width, \ + frame_height), VENUS_DMA_ALIGNMENT) + \ + HFI_ALIGN(SIZE_H264D_LB_FE_LEFT_CTRL(frame_width, \ + frame_height), VENUS_DMA_ALIGNMENT) * num_vpp_pipes + \ + HFI_ALIGN(SIZE_H264D_LB_SE_TOP_CTRL(frame_width, \ + frame_height), VENUS_DMA_ALIGNMENT) + \ + HFI_ALIGN(SIZE_H264D_LB_SE_LEFT_CTRL(frame_width, \ + frame_height), VENUS_DMA_ALIGNMENT) * \ + num_vpp_pipes + \ + HFI_ALIGN(SIZE_H264D_LB_PE_TOP_DATA(frame_width, \ + frame_height), VENUS_DMA_ALIGNMENT) + \ + HFI_ALIGN(SIZE_H264D_LB_VSP_TOP(frame_width, \ + frame_height), VENUS_DMA_ALIGNMENT) + \ + HFI_ALIGN(SIZE_H264D_LB_RECON_DMA_METADATA_WR\ + (frame_width, frame_height), \ + VENUS_DMA_ALIGNMENT) * 2 + HFI_ALIGN(SIZE_H264D_QP\ + (frame_width, frame_height), VENUS_DMA_ALIGNMENT); \ + _size = HFI_ALIGN(_size, VENUS_DMA_ALIGNMENT); \ + if (is_opb) \ + { \ + SIZE_VPSS_LB(vpss_lb_size, frame_width, frame_height, \ + num_vpp_pipes); \ + } \ + _size = HFI_ALIGN((_size + vpss_lb_size), \ + VENUS_DMA_ALIGNMENT); \ + } while (0) + +#define H264_CABAC_HDR_RATIO_HD_TOT 1 +#define H264_CABAC_RES_RATIO_HD_TOT 3 + +#define SIZE_H264D_HW_BIN_BUFFER(_size, frame_width, frame_height, \ + delay, num_vpp_pipes) \ + do \ + { \ + HFI_U32 size_yuv, size_bin_hdr, size_bin_res; \ + size_yuv = ((frame_width * frame_height) <= \ + BIN_BUFFER_THRESHOLD) ?\ + ((BIN_BUFFER_THRESHOLD * 3) >> 1) : \ + ((frame_width * frame_height * 3) >> 1); \ + size_bin_hdr = size_yuv * H264_CABAC_HDR_RATIO_HD_TOT; \ + size_bin_res = size_yuv * H264_CABAC_RES_RATIO_HD_TOT; \ + size_bin_hdr = size_bin_hdr * (((((HFI_U32)(delay)) & 31) /\ + 10) + 2) / 2; \ + size_bin_res = size_bin_res * (((((HFI_U32)(delay)) & 31) /\ + 10) + 2) / 2; \ + size_bin_hdr = HFI_ALIGN(size_bin_hdr / num_vpp_pipes,\ + VENUS_DMA_ALIGNMENT) * num_vpp_pipes; \ + size_bin_res = HFI_ALIGN(size_bin_res / num_vpp_pipes, \ + VENUS_DMA_ALIGNMENT) * num_vpp_pipes; \ + _size = size_bin_hdr + size_bin_res; \ + } while (0) + +#define HFI_BUFFER_BIN_H264D(_size, frame_width, frame_height, is_interlaced, \ + delay, num_vpp_pipes) \ + do \ + { \ + HFI_U32 n_aligned_w = HFI_ALIGN(frame_width, \ + BUFFER_ALIGNMENT_16_BYTES);\ + HFI_U32 n_aligned_h = HFI_ALIGN(frame_height, \ + BUFFER_ALIGNMENT_16_BYTES); \ + if (!is_interlaced) \ + { \ + SIZE_H264D_HW_BIN_BUFFER(_size, n_aligned_w, \ + n_aligned_h, delay, num_vpp_pipes); \ + } \ + else \ + { \ + _size = 0; \ + } \ + } while (0) + +#define NUM_SLIST_BUF_H264 (256 + 32) +#define SIZE_SLIST_BUF_H264 (512) +#define SIZE_SEI_USERDATA (4096) +#define HFI_BUFFER_PERSIST_H264D(_size) \ + _size = HFI_ALIGN((SIZE_SLIST_BUF_H264 * NUM_SLIST_BUF_H264 + \ + NUM_HW_PIC_BUF * SIZE_SEI_USERDATA), VENUS_DMA_ALIGNMENT) + +#define LCU_MAX_SIZE_PELS 64 +#define LCU_MIN_SIZE_PELS 16 + +#define H265D_MAX_SLICE 1200 +#define SIZE_H265D_HW_PIC_T SIZE_H264D_HW_PIC_T +#define SIZE_H265D_BSE_CMD_PER_BUF (16 * sizeof(HFI_U32)) +#define SIZE_H265D_VPP_CMD_PER_BUF (256) + +#define SIZE_H265D_LB_FE_TOP_DATA(frame_width, frame_height) \ + (MAX_FE_NBR_DATA_LUMA_LINE_BUFFER_SIZE * \ + (HFI_ALIGN(frame_width, 64) + 8) * 2) + +#define SIZE_H265D_LB_FE_TOP_CTRL(frame_width, frame_height) \ + (MAX_FE_NBR_CTRL_LCU64_LINE_BUFFER_SIZE * \ + (HFI_ALIGN(frame_width, LCU_MAX_SIZE_PELS) / LCU_MIN_SIZE_PELS)) + +#define SIZE_H265D_LB_FE_LEFT_CTRL(frame_width, frame_height) \ + (MAX_FE_NBR_CTRL_LCU64_LINE_BUFFER_SIZE * \ + (HFI_ALIGN(frame_height, LCU_MAX_SIZE_PELS) / LCU_MIN_SIZE_PELS)) + +#define SIZE_H265D_LB_SE_TOP_CTRL(frame_width, frame_height) \ + ((LCU_MAX_SIZE_PELS / 8 * (128 / 8)) * ((frame_width + 15) >> 4)) + +#define SIZE_H265D_LB_SE_LEFT_CTRL(frame_width, frame_height) \ + (MAX(((frame_height + 16 - 1) / 8) * \ + MAX_SE_NBR_CTRL_LCU16_LINE_BUFFER_SIZE, \ + MAX(((frame_height + 32 - 1) / 8) * \ + MAX_SE_NBR_CTRL_LCU32_LINE_BUFFER_SIZE, \ + ((frame_height + 64 - 1) / 8) * \ + MAX_SE_NBR_CTRL_LCU64_LINE_BUFFER_SIZE))) + +#define SIZE_H265D_LB_PE_TOP_DATA(frame_width, frame_height) \ + (MAX_PE_NBR_DATA_LCU64_LINE_BUFFER_SIZE * (HFI_ALIGN(frame_width, \ + LCU_MIN_SIZE_PELS) / LCU_MIN_SIZE_PELS)) + +#define SIZE_H265D_LB_VSP_TOP(frame_width, frame_height) \ + (((frame_width + 63) >> 6) * 128) + +#define SIZE_H265D_LB_VSP_LEFT(frame_width, frame_height) \ + (((frame_height + 63) >> 6) * 128) + +#define SIZE_H265D_LB_RECON_DMA_METADATA_WR(frame_width, frame_height) \ + SIZE_H264D_LB_RECON_DMA_METADATA_WR(frame_width, frame_height) + +#define SIZE_H265D_QP(frame_width, frame_height) \ + SIZE_H264D_QP(frame_width, frame_height) + +#define SIZE_H265D_BSE_CMD_BUF(_size, frame_width, frame_height)\ + do \ + { \ + _size = HFI_ALIGN(((HFI_ALIGN(frame_width, \ + LCU_MAX_SIZE_PELS) / LCU_MIN_SIZE_PELS) * \ + (HFI_ALIGN(frame_height, LCU_MAX_SIZE_PELS) /\ + LCU_MIN_SIZE_PELS)) * NUM_HW_PIC_BUF, VENUS_DMA_ALIGNMENT); \ + _size = MIN(_size, H265D_MAX_SLICE + 1); \ + _size = 2 * _size * SIZE_H265D_BSE_CMD_PER_BUF; \ + } while (0) + +#define SIZE_H265D_VPP_CMD_BUF(_size, frame_width, frame_height) \ + do \ + { \ + _size = HFI_ALIGN(((HFI_ALIGN(frame_width, LCU_MAX_SIZE_PELS) /\ + LCU_MIN_SIZE_PELS) * (HFI_ALIGN(frame_height, \ + LCU_MAX_SIZE_PELS) / LCU_MIN_SIZE_PELS)) * \ + NUM_HW_PIC_BUF, VENUS_DMA_ALIGNMENT); \ + _size = MIN(_size, H265D_MAX_SLICE + 1); \ + _size = HFI_ALIGN(_size, 4); \ + _size = 2 * _size * SIZE_H265D_VPP_CMD_PER_BUF; \ + if (_size > VPP_CMD_MAX_SIZE) \ + { \ + _size = VPP_CMD_MAX_SIZE; \ + } \ + } while (0) + +#define HFI_BUFFER_COMV_H265D(_size, frame_width, frame_height, \ + _yuv_bufcount_min) \ + do \ + { \ + _size = HFI_ALIGN(((((frame_width + 15) >> 4) * \ + ((frame_height + 15) >> 4)) << 8), \ + BUFFER_ALIGNMENT_512_BYTES); \ + _size *= _yuv_bufcount_min; \ + _size += BUFFER_ALIGNMENT_512_BYTES; \ + } while (0) + +#define HDR10_HIST_EXTRADATA_SIZE (4 * 1024) + +#define HFI_BUFFER_NON_COMV_H265D(_size, frame_width, frame_height, \ + num_vpp_pipes) \ + do \ + { \ + HFI_U32 _size_bse, _size_vpp; \ + SIZE_H265D_BSE_CMD_BUF(_size_bse, frame_width, \ + frame_height); \ + SIZE_H265D_VPP_CMD_BUF(_size_vpp, frame_width, \ + frame_height); \ + _size = HFI_ALIGN(_size_bse, VENUS_DMA_ALIGNMENT) + \ + HFI_ALIGN(_size_vpp, VENUS_DMA_ALIGNMENT) + \ + HFI_ALIGN(NUM_HW_PIC_BUF * 20 * 22 * 4, \ + VENUS_DMA_ALIGNMENT) + \ + HFI_ALIGN(2 * sizeof(HFI_U16) * \ + (HFI_ALIGN(frame_width, LCU_MAX_SIZE_PELS) / \ + LCU_MIN_SIZE_PELS) * (HFI_ALIGN(frame_height, \ + LCU_MAX_SIZE_PELS) / LCU_MIN_SIZE_PELS), \ + VENUS_DMA_ALIGNMENT) + \ + HFI_ALIGN(SIZE_HW_PIC(SIZE_H265D_HW_PIC_T), \ + VENUS_DMA_ALIGNMENT) + \ + HDR10_HIST_EXTRADATA_SIZE; \ + _size = HFI_ALIGN(_size, VENUS_DMA_ALIGNMENT); \ + } while (0) + +#define HFI_BUFFER_LINE_H265D(_size, frame_width, frame_height, \ + is_opb, num_vpp_pipes) \ + do \ + { \ + HFI_U32 vpss_lb_size = 0; \ + _size = HFI_ALIGN(SIZE_H265D_LB_FE_TOP_DATA(frame_width, \ + frame_height), VENUS_DMA_ALIGNMENT) + \ + HFI_ALIGN(SIZE_H265D_LB_FE_TOP_CTRL(frame_width, \ + frame_height), VENUS_DMA_ALIGNMENT) + \ + HFI_ALIGN(SIZE_H265D_LB_FE_LEFT_CTRL(frame_width, \ + frame_height), VENUS_DMA_ALIGNMENT) * num_vpp_pipes + \ + HFI_ALIGN(SIZE_H265D_LB_SE_LEFT_CTRL(frame_width, \ + frame_height), VENUS_DMA_ALIGNMENT) * num_vpp_pipes + \ + HFI_ALIGN(SIZE_H265D_LB_SE_TOP_CTRL(frame_width, \ + frame_height), VENUS_DMA_ALIGNMENT) + \ + HFI_ALIGN(SIZE_H265D_LB_PE_TOP_DATA(frame_width, \ + frame_height), VENUS_DMA_ALIGNMENT) + \ + HFI_ALIGN(SIZE_H265D_LB_VSP_TOP(frame_width, \ + frame_height), VENUS_DMA_ALIGNMENT) + \ + HFI_ALIGN(SIZE_H265D_LB_VSP_LEFT(frame_width, \ + frame_height), VENUS_DMA_ALIGNMENT) * num_vpp_pipes + \ + HFI_ALIGN(SIZE_H265D_LB_RECON_DMA_METADATA_WR\ + (frame_width, frame_height), \ + VENUS_DMA_ALIGNMENT) * 4 + \ + HFI_ALIGN(SIZE_H265D_QP(frame_width, frame_height),\ + VENUS_DMA_ALIGNMENT); \ + if (is_opb) \ + { \ + SIZE_VPSS_LB(vpss_lb_size, frame_width, frame_height,\ + num_vpp_pipes); \ + } \ + _size = HFI_ALIGN((_size + vpss_lb_size), \ + VENUS_DMA_ALIGNMENT); \ + } while (0) + +#define H265_CABAC_HDR_RATIO_HD_TOT 2 +#define H265_CABAC_RES_RATIO_HD_TOT 2 + +#define SIZE_H265D_HW_BIN_BUFFER(_size, frame_width, frame_height, \ + delay, num_vpp_pipes) \ + do \ + { \ + HFI_U32 size_yuv, size_bin_hdr, size_bin_res; \ + size_yuv = ((frame_width * frame_height) <= \ + BIN_BUFFER_THRESHOLD) ? \ + ((BIN_BUFFER_THRESHOLD * 3) >> 1) : \ + ((frame_width * frame_height * 3) >> 1); \ + size_bin_hdr = size_yuv * H265_CABAC_HDR_RATIO_HD_TOT; \ + size_bin_res = size_yuv * H265_CABAC_RES_RATIO_HD_TOT; \ + size_bin_hdr = size_bin_hdr * \ + (((((HFI_U32)(delay)) & 31) / 10) + 2) / 2; \ + size_bin_res = size_bin_res * \ + (((((HFI_U32)(delay)) & 31) / 10) + 2) / 2; \ + size_bin_hdr = HFI_ALIGN(size_bin_hdr / \ + num_vpp_pipes, VENUS_DMA_ALIGNMENT) * \ + num_vpp_pipes; \ + size_bin_res = HFI_ALIGN(size_bin_res / num_vpp_pipes,\ + VENUS_DMA_ALIGNMENT) * num_vpp_pipes; \ + _size = size_bin_hdr + size_bin_res; \ + } while (0) + +#define HFI_BUFFER_BIN_H265D(_size, frame_width, frame_height, \ + is_interlaced, delay, num_vpp_pipes) \ + do \ + { \ + HFI_U32 n_aligned_w = HFI_ALIGN(frame_width, \ + BUFFER_ALIGNMENT_16_BYTES); \ + HFI_U32 n_aligned_h = HFI_ALIGN(frame_height, \ + BUFFER_ALIGNMENT_16_BYTES); \ + if (!is_interlaced) \ + { \ + SIZE_H265D_HW_BIN_BUFFER(_size, n_aligned_w, \ + n_aligned_h, delay, num_vpp_pipes); \ + } \ + else \ + { \ + _size = 0; \ + } \ + } while (0) + +#define SIZE_SLIST_BUF_H265 (1 << 10) +#define NUM_SLIST_BUF_H265 (80 + 20) +#define H265_NUM_TILE_COL 32 +#define H265_NUM_TILE_ROW 128 +#define H265_NUM_TILE (H265_NUM_TILE_ROW * H265_NUM_TILE_COL + 1) +#define HFI_BUFFER_PERSIST_H265D(_size) \ + _size = HFI_ALIGN((SIZE_SLIST_BUF_H265 * NUM_SLIST_BUF_H265 + \ + H265_NUM_TILE * sizeof(HFI_U32) + NUM_HW_PIC_BUF * SIZE_SEI_USERDATA),\ + VENUS_DMA_ALIGNMENT) + +#define SIZE_VPXD_LB_FE_LEFT_CTRL(frame_width, frame_height) \ + MAX(((frame_height + 15) >> 4) * \ + MAX_FE_NBR_CTRL_LCU16_LINE_BUFFER_SIZE, \ + MAX(((frame_height + 31) >> 5) * \ + MAX_FE_NBR_CTRL_LCU32_LINE_BUFFER_SIZE, \ + ((frame_height + 63) >> 6) * MAX_FE_NBR_CTRL_LCU64_LINE_BUFFER_SIZE)) +#define SIZE_VPXD_LB_FE_TOP_CTRL(frame_width, frame_height) \ + (((HFI_ALIGN(frame_width, 64) + 8) * 10 * 2)) +#define SIZE_VPXD_LB_SE_TOP_CTRL(frame_width, frame_height) \ + (((frame_width + 15) >> 4) * MAX_FE_NBR_CTRL_LCU16_LINE_BUFFER_SIZE) +#define SIZE_VPXD_LB_SE_LEFT_CTRL(frame_width, frame_height) \ + MAX(((frame_height + 15) >> 4) * \ + MAX_SE_NBR_CTRL_LCU16_LINE_BUFFER_SIZE,\ + MAX(((frame_height + 31) >> 5) * \ + MAX_SE_NBR_CTRL_LCU32_LINE_BUFFER_SIZE, \ + ((frame_height + 63) >> 6) * MAX_SE_NBR_CTRL_LCU64_LINE_BUFFER_SIZE)) +#define SIZE_VPXD_LB_RECON_DMA_METADATA_WR(frame_width, frame_height) \ + HFI_ALIGN((HFI_ALIGN(frame_height, 8) / (4 / 2)) * 64,\ + BUFFER_ALIGNMENT_32_BYTES) +#define SIZE_MP2D_LB_FE_TOP_DATA(frame_width, frame_height) \ + ((HFI_ALIGN(frame_width, 16) + 8) * 10 * 2) +#define SIZE_VP9D_LB_FE_TOP_DATA(frame_width, frame_height) \ + ((HFI_ALIGN(HFI_ALIGN(frame_width, 8), 64) + 8) * 10 * 2) +#define SIZE_MP2D_LB_PE_TOP_DATA(frame_width, frame_height) \ + ((HFI_ALIGN(frame_width, 16) >> 4) * 64) +#define SIZE_VP9D_LB_PE_TOP_DATA(frame_width, frame_height) \ + ((HFI_ALIGN(HFI_ALIGN(frame_width, 8), 64) >> 6) * 176) +#define SIZE_MP2D_LB_VSP_TOP(frame_width, frame_height) \ + (((HFI_ALIGN(frame_width, 16) >> 4) * 64 / 2) + 256) +#define SIZE_VP9D_LB_VSP_TOP(frame_width, frame_height) \ + ((((HFI_ALIGN(HFI_ALIGN(frame_width, 8), 64) >> 6) * 64 * 8) + 256)) + +#define HFI_IRIS3_VP9D_COMV_SIZE \ + ((((8192 + 63) >> 6) * ((4320 + 63) >> 6) * 8 * 8 * 2 * 8)) + +#define SIZE_VP9D_QP(frame_width, frame_height) \ + SIZE_H264D_QP(frame_width, frame_height) + +#define HFI_IRIS3_VP9D_LB_SIZE(_size, frame_width, frame_height, num_vpp_pipes)\ + do \ + { \ + _size = HFI_ALIGN(SIZE_VPXD_LB_FE_LEFT_CTRL(frame_width, \ + frame_height),VENUS_DMA_ALIGNMENT) * num_vpp_pipes + \ + HFI_ALIGN(SIZE_VPXD_LB_SE_LEFT_CTRL(frame_width, frame_height),\ + VENUS_DMA_ALIGNMENT) * num_vpp_pipes + \ + HFI_ALIGN(SIZE_VP9D_LB_VSP_TOP(frame_width, frame_height), \ + VENUS_DMA_ALIGNMENT) + \ + HFI_ALIGN(SIZE_VPXD_LB_FE_TOP_CTRL(frame_width, frame_height), \ + VENUS_DMA_ALIGNMENT) + 2 * \ + HFI_ALIGN(SIZE_VPXD_LB_RECON_DMA_METADATA_WR \ + (frame_width, frame_height), VENUS_DMA_ALIGNMENT) + \ + HFI_ALIGN(SIZE_VPXD_LB_SE_TOP_CTRL(frame_width, frame_height), \ + VENUS_DMA_ALIGNMENT) + \ + HFI_ALIGN(SIZE_VP9D_LB_PE_TOP_DATA(frame_width, frame_height), \ + VENUS_DMA_ALIGNMENT) + \ + HFI_ALIGN(SIZE_VP9D_LB_FE_TOP_DATA(frame_width, frame_height), \ + VENUS_DMA_ALIGNMENT) + \ + HFI_ALIGN(SIZE_VP9D_QP(frame_width, frame_height), \ + VENUS_DMA_ALIGNMENT); \ + } while (0) + +#define HFI_BUFFER_LINE_VP9D(_size, frame_width, frame_height, \ + _yuv_bufcount_min, is_opb, num_vpp_pipes) \ + do \ + { \ + HFI_U32 _lb_size = 0; \ + HFI_U32 vpss_lb_size = 0; \ + HFI_IRIS3_VP9D_LB_SIZE(_lb_size, frame_width, frame_height,\ + num_vpp_pipes); \ + if (is_opb) \ + { \ + SIZE_VPSS_LB(vpss_lb_size, frame_width, frame_height, \ + num_vpp_pipes); \ + } \ + _size = _lb_size + vpss_lb_size; \ + } while (0) + +#define VPX_DECODER_FRAME_CONCURENCY_LVL (2) +#define VPX_DECODER_FRAME_BIN_HDR_BUDGET_RATIO 1 / 2 +#define VPX_DECODER_FRAME_BIN_RES_BUDGET_RATIO 3 / 2 + +#define HFI_BUFFER_BIN_VP9D(_size, frame_width, frame_height, \ + is_interlaced, num_vpp_pipes) \ + do \ + { \ + HFI_U32 _size_yuv = HFI_ALIGN(frame_width, \ + BUFFER_ALIGNMENT_16_BYTES) *\ + HFI_ALIGN(frame_height, BUFFER_ALIGNMENT_16_BYTES) * 3 / 2; \ + if (!is_interlaced) \ + { \ + _size = HFI_ALIGN(((MAX(_size_yuv, \ + ((BIN_BUFFER_THRESHOLD * 3) >> 1)) * \ + VPX_DECODER_FRAME_BIN_HDR_BUDGET_RATIO * \ + VPX_DECODER_FRAME_CONCURENCY_LVL) / num_vpp_pipes), \ + VENUS_DMA_ALIGNMENT) + HFI_ALIGN(((MAX(_size_yuv, \ + ((BIN_BUFFER_THRESHOLD * 3) >> 1)) * \ + VPX_DECODER_FRAME_BIN_RES_BUDGET_RATIO * \ + VPX_DECODER_FRAME_CONCURENCY_LVL) / num_vpp_pipes), \ + VENUS_DMA_ALIGNMENT); \ + _size = _size * num_vpp_pipes; \ + } \ + else \ + { \ + _size = 0; \ + } \ + } while (0) + +#define VP9_NUM_FRAME_INFO_BUF 32 +#define VP9_NUM_PROBABILITY_TABLE_BUF (VP9_NUM_FRAME_INFO_BUF + 4) +#define VP9_PROB_TABLE_SIZE (3840) + +#define VP9_UDC_HEADER_BUF_SIZE (3 * 128) +#define MAX_SUPERFRAME_HEADER_LEN (34) +#define CCE_TILE_OFFSET_SIZE HFI_ALIGN(32 * 4 * 4, BUFFER_ALIGNMENT_32_BYTES) + +#define HFI_BUFFER_PERSIST_VP9D(_size) \ + _size = HFI_ALIGN(VP9_NUM_PROBABILITY_TABLE_BUF * VP9_PROB_TABLE_SIZE, \ + VENUS_DMA_ALIGNMENT) + HFI_ALIGN(HFI_IRIS3_VP9D_COMV_SIZE, \ + VENUS_DMA_ALIGNMENT) + HFI_ALIGN(MAX_SUPERFRAME_HEADER_LEN, \ + VENUS_DMA_ALIGNMENT) + HFI_ALIGN(VP9_UDC_HEADER_BUF_SIZE, \ + VENUS_DMA_ALIGNMENT) + HFI_ALIGN(VP9_NUM_FRAME_INFO_BUF * \ + CCE_TILE_OFFSET_SIZE, VENUS_DMA_ALIGNMENT) + \ + HDR10_HIST_EXTRADATA_SIZE + +#define HFI_BUFFER_LINE_MP2D(_size, frame_width, frame_height, \ +_yuv_bufcount_min, is_opb, num_vpp_pipes) \ + do \ + { \ + HFI_U32 vpss_lb_size = 0; \ + _size = HFI_ALIGN(SIZE_VPXD_LB_FE_LEFT_CTRL(frame_width, \ + frame_height), VENUS_DMA_ALIGNMENT) * num_vpp_pipes + \ + HFI_ALIGN(SIZE_VPXD_LB_SE_LEFT_CTRL(frame_width, frame_height),\ + VENUS_DMA_ALIGNMENT) * num_vpp_pipes + \ + HFI_ALIGN(SIZE_MP2D_LB_VSP_TOP(frame_width, frame_height),\ + VENUS_DMA_ALIGNMENT) + HFI_ALIGN(SIZE_VPXD_LB_FE_TOP_CTRL\ + (frame_width, frame_height), VENUS_DMA_ALIGNMENT) + \ + 2 * HFI_ALIGN(SIZE_VPXD_LB_RECON_DMA_METADATA_WR(frame_width,\ + frame_height), VENUS_DMA_ALIGNMENT) + \ + HFI_ALIGN(SIZE_VPXD_LB_SE_TOP_CTRL(frame_width, frame_height),\ + VENUS_DMA_ALIGNMENT) + \ + HFI_ALIGN(SIZE_MP2D_LB_PE_TOP_DATA(frame_width, frame_height), \ + VENUS_DMA_ALIGNMENT) + \ + HFI_ALIGN(SIZE_MP2D_LB_FE_TOP_DATA(frame_width, frame_height), \ + VENUS_DMA_ALIGNMENT); \ + if (is_opb) \ + { \ + SIZE_VPSS_LB(vpss_lb_size, frame_width, frame_height, \ + num_vpp_pipes); \ + } \ + _size += vpss_lb_size; \ + } while (0) + +#define HFI_BUFFER_BIN_MP2D(_size, frame_width, frame_height, is_interlaced) 0 + +#define QMATRIX_SIZE (sizeof(HFI_U32) * 128 + 256) +#define MP2D_QPDUMP_SIZE 115200 +#define HFI_BUFFER_PERSIST_MP2D(_size) \ + _size = QMATRIX_SIZE + MP2D_QPDUMP_SIZE; + +#define HFI_BUFFER_BITSTREAM_ENC(size, frame_width, frame_height, \ + rc_type, is_ten_bit) \ + do \ + { \ + HFI_U32 aligned_width, aligned_height, bitstream_size; \ + aligned_width = HFI_ALIGN(frame_width, 32); \ + aligned_height = HFI_ALIGN(frame_height, 32); \ + bitstream_size = aligned_width * aligned_height * 3; \ + if (aligned_width * aligned_height > (4096 * 2176)) \ + { \ + bitstream_size = (bitstream_size >> 3); \ + } \ + else if (bitstream_size > (1280 * 720)) \ + { \ + bitstream_size = (bitstream_size >> 2); \ + } \ + else \ + { \ + bitstream_size = (bitstream_size << 1);\ + } \ + if ((rc_type == HFI_RC_CQ) || (rc_type == HFI_RC_OFF)) \ + { \ + bitstream_size = (bitstream_size << 1);\ + } \ + if (is_ten_bit) \ + { \ + bitstream_size = (bitstream_size) + \ + (bitstream_size >> 2); \ + } \ + size = HFI_ALIGN(bitstream_size, HFI_ALIGNMENT_4096); \ + } while (0) + +#define SIZE_ROI_METADATA_ENC(size_roi, frame_width, frame_height, lcu_size)\ + do \ + { \ + HFI_U32 width_in_lcus = 0, height_in_lcus = 0, n_shift = 0; \ + while (lcu_size && !(lcu_size & 0x1)) \ + { \ + n_shift++; \ + lcu_size = lcu_size >> 1; \ + } \ + width_in_lcus = (frame_width + (lcu_size - 1)) >> n_shift; \ + height_in_lcus = (frame_height + (lcu_size - 1)) >> n_shift; \ + size_roi = (((width_in_lcus + 7) >> 3) << 3) * \ + height_in_lcus * 2 + 256; \ + } while (0) + +#define HFI_BUFFER_INPUT_METADATA_ENC(size, frame_width, frame_height, \ + is_roi_enabled, lcu_size) \ + do \ + { \ + HFI_U32 roi_size = 0; \ + if (is_roi_enabled) \ + { \ + SIZE_ROI_METADATA_ENC(roi_size, frame_width, \ + frame_height, lcu_size); \ + } \ + size = roi_size + 16384; \ + size = HFI_ALIGN(size, HFI_ALIGNMENT_4096); \ + } while (0) + +#define HFI_BUFFER_INPUT_METADATA_H264E(size_metadata, frame_width, \ + frame_height, is_roi_enabled) \ + do \ + { \ + HFI_BUFFER_INPUT_METADATA_ENC(size_metadata, frame_width, \ + frame_height, is_roi_enabled, 16); \ + }while (0) + +#define HFI_BUFFER_INPUT_METADATA_H265E(size_metadata, frame_width, \ + frame_height, is_roi_enabled) \ + do \ + { \ + HFI_BUFFER_INPUT_METADATA_ENC(size_metadata, frame_width, \ + frame_height, is_roi_enabled, 32); \ + } while (0) + +#define HFI_BUFFER_ARP_ENC(size) \ + do \ + { \ + size = 204800; \ + } while (0) + +#define HFI_MAX_COL_FRAME 6 +#define HFI_VENUS_VENC_TRE_WB_BUFF_SIZE (65 << 4) // bytes +#define HFI_VENUS_VENC_DB_LINE_BUFF_PER_MB 512 +#define HFI_VENUS_VPPSG_MAX_REGISTERS 2048 +#define HFI_VENUS_WIDTH_ALIGNMENT 128 +#define HFI_VENUS_WIDTH_TEN_BIT_ALIGNMENT 192 +#define HFI_VENUS_HEIGHT_ALIGNMENT 32 +#define VENUS_METADATA_STRIDE_MULTIPLE 64 +#define VENUS_METADATA_HEIGHT_MULTIPLE 16 + +#ifndef SYSTEM_LAL_TILE10 +#define SYSTEM_LAL_TILE10 192 +#endif + +#define HFI_IRIS3_ENC_RECON_BUF_COUNT(num_recon, n_bframe, ltr_count, \ + _total_hp_layers, _total_hb_layers, hybrid_hp, codec_standard) \ + do \ + { \ + HFI_U32 num_ref = 1; \ + if (n_bframe) \ + num_ref = 2; \ + if (_total_hp_layers > 1) \ + { \ + if (hybrid_hp) \ + num_ref = (_total_hp_layers + 1) >> 1; \ + else if (codec_standard == HFI_CODEC_ENCODE_HEVC) \ + num_ref = (_total_hp_layers + 1) >> 1; \ + else if (codec_standard == HFI_CODEC_ENCODE_AVC && \ + _total_hp_layers < 4) \ + num_ref = (_total_hp_layers - 1); \ + else \ + num_ref = _total_hp_layers; \ + } \ + if (ltr_count) \ + num_ref = num_ref + ltr_count; \ + if (_total_hb_layers > 1) \ + { \ + if (codec_standard == HFI_CODEC_ENCODE_HEVC) \ + num_ref = (_total_hb_layers); \ + else if (codec_standard == HFI_CODEC_ENCODE_AVC) \ + num_ref = (1 << (_total_hb_layers - 2)) + 1; \ + } \ + num_recon = num_ref + 1; \ + } while (0) + +#define SIZE_BIN_BITSTREAM_ENC(_size, rc_type, frame_width, frame_height, \ + work_mode, lcu_size) \ + do \ + { \ + HFI_U32 size_aligned_width = 0, size_aligned_height = 0; \ + HFI_U32 bitstream_size_eval = 0; \ + size_aligned_width = HFI_ALIGN((frame_width), lcu_size); \ + size_aligned_height = HFI_ALIGN((frame_height), lcu_size); \ + if (work_mode == HFI_WORKMODE_2) \ + { \ + if ((rc_type == HFI_RC_CQ) || (rc_type == HFI_RC_OFF)) \ + { \ + bitstream_size_eval = (((size_aligned_width) * \ + (size_aligned_height) * 3) >> 1); \ + } \ + else \ + { \ + bitstream_size_eval = ((size_aligned_width) * \ + (size_aligned_height) * 3); \ + if (rc_type == HFI_RC_LOSSLESS) \ + { \ + bitstream_size_eval = (bitstream_size_eval * 3 >> 2); \ + } \ + else if ((size_aligned_width * size_aligned_height) > \ + (4096 * 2176)) \ + { \ + bitstream_size_eval >>= 3; \ + } \ + else if ((size_aligned_width * size_aligned_height) > (480 * 320)) \ + { \ + bitstream_size_eval >>= 2; \ + } \ + if (lcu_size == 32) \ + { \ + bitstream_size_eval = (bitstream_size_eval * 5 >> 2); \ + } \ + } \ + } \ + else \ + { \ + bitstream_size_eval = size_aligned_width * \ + size_aligned_height * 3; \ + } \ + _size = HFI_ALIGN(bitstream_size_eval, VENUS_DMA_ALIGNMENT); \ + } while (0) + +#define SIZE_ENC_SINGLE_PIPE(size, rc_type, bitbin_size, num_vpp_pipes, \ + frame_width, frame_height, lcu_size) \ + do \ + { \ + HFI_U32 size_single_pipe_eval = 0, sao_bin_buffer_size = 0, \ + _padded_bin_sz = 0; \ + HFI_U32 size_aligned_width = 0, size_aligned_height = 0; \ + size_aligned_width = HFI_ALIGN((frame_width), lcu_size); \ + size_aligned_height = HFI_ALIGN((frame_height), lcu_size); \ + if ((size_aligned_width * size_aligned_height) > \ + (3840 * 2160)) \ + { \ + size_single_pipe_eval = (bitbin_size / num_vpp_pipes); \ + } \ + else if (num_vpp_pipes > 2) \ + { \ + size_single_pipe_eval = bitbin_size / 2; \ + } \ + else \ + { \ + size_single_pipe_eval = bitbin_size; \ + } \ + if (rc_type == HFI_RC_LOSSLESS) \ + { \ + size_single_pipe_eval = (size_single_pipe_eval << 1); \ + } \ + sao_bin_buffer_size = (64 * ((((frame_width) + \ + BUFFER_ALIGNMENT_32_BYTES) * ((frame_height) +\ + BUFFER_ALIGNMENT_32_BYTES)) >> 10)) + 384; \ + _padded_bin_sz = HFI_ALIGN(size_single_pipe_eval, \ + VENUS_DMA_ALIGNMENT);\ + size_single_pipe_eval = sao_bin_buffer_size + _padded_bin_sz; \ + size_single_pipe_eval = HFI_ALIGN(size_single_pipe_eval, \ + VENUS_DMA_ALIGNMENT); \ + size = size_single_pipe_eval; \ + } while (0) + +#define HFI_BUFFER_BIN_ENC(_size, rc_type, frame_width, frame_height, lcu_size, \ + work_mode, num_vpp_pipes) \ + do \ + { \ + HFI_U32 bitstream_size = 0, total_bitbin_buffers = 0, \ + size_single_pipe = 0, bitbin_size = 0; \ + SIZE_BIN_BITSTREAM_ENC(bitstream_size, rc_type, frame_width, \ + frame_height, work_mode, lcu_size); \ + if (work_mode == HFI_WORKMODE_2) \ + { \ + total_bitbin_buffers = 3; \ + bitbin_size = bitstream_size * 17 / 10; \ + bitbin_size = HFI_ALIGN(bitbin_size, \ + VENUS_DMA_ALIGNMENT); \ + } \ + else if ((lcu_size == 16) || (num_vpp_pipes > 1)) \ + { \ + total_bitbin_buffers = 1; \ + bitbin_size = bitstream_size; \ + } \ + if (total_bitbin_buffers > 0) \ + { \ + SIZE_ENC_SINGLE_PIPE(size_single_pipe, rc_type, bitbin_size, \ + num_vpp_pipes, frame_width, frame_height, lcu_size); \ + bitbin_size = size_single_pipe * num_vpp_pipes; \ + _size = HFI_ALIGN(bitbin_size, VENUS_DMA_ALIGNMENT) * \ + total_bitbin_buffers + 512; \ + } \ + else \ + /* Avoid 512 Bytes allocation in case of 1Pipe HEVC Direct Mode*/\ + { \ + _size = 0; \ + } \ + } while (0) + +#define HFI_BUFFER_BIN_H264E(_size, rc_type, frame_width, frame_height, \ + work_mode, num_vpp_pipes) \ + do \ + { \ + HFI_BUFFER_BIN_ENC(_size, rc_type, frame_width, frame_height, 16, \ + work_mode, num_vpp_pipes); \ + } while (0) + +#define HFI_BUFFER_BIN_H265E(_size, rc_type, frame_width, frame_height, \ + work_mode, num_vpp_pipes) \ + do \ + { \ + HFI_BUFFER_BIN_ENC(_size, rc_type, frame_width, frame_height, 32,\ + work_mode, num_vpp_pipes); \ + } while (0) + +#define SIZE_ENC_SLICE_INFO_BUF(num_lcu_in_frame) HFI_ALIGN((256 + \ + (num_lcu_in_frame << 4)), VENUS_DMA_ALIGNMENT) +#define SIZE_LINE_BUF_CTRL(frame_width_coded) \ + HFI_ALIGN(frame_width_coded, VENUS_DMA_ALIGNMENT) +#define SIZE_LINE_BUF_CTRL_ID2(frame_width_coded) \ + HFI_ALIGN(frame_width_coded, VENUS_DMA_ALIGNMENT) + +#define SIZE_LINEBUFF_DATA(_size, is_ten_bit, frame_width_coded) \ + do \ + { \ + _size = is_ten_bit ? (((((10 * (frame_width_coded) +\ + 1024) + (VENUS_DMA_ALIGNMENT - 1)) & \ + (~(VENUS_DMA_ALIGNMENT - 1))) * 1) + \ + (((((10 * (frame_width_coded) + 1024) >> 1) + \ + (VENUS_DMA_ALIGNMENT - 1)) & (~(VENUS_DMA_ALIGNMENT - 1))) * \ + 2)) : (((((8 * (frame_width_coded) + 1024) + \ + (VENUS_DMA_ALIGNMENT - 1)) \ + & (~(VENUS_DMA_ALIGNMENT - 1))) * 1) + \ + (((((8 * (frame_width_coded) +\ + 1024) >> 1) + (VENUS_DMA_ALIGNMENT - 1)) & \ + (~(VENUS_DMA_ALIGNMENT - 1))) * 2)); \ + } while (0) + +#define SIZE_LEFT_LINEBUFF_CTRL(_size, standard, frame_height_coded, \ + num_vpp_pipes_enc) \ + do \ + { \ + _size = (standard == HFI_CODEC_ENCODE_HEVC) ? \ + (((frame_height_coded) + \ + (BUF_SIZE_ALIGN_32)) / BUF_SIZE_ALIGN_32 * 4 * 16) : \ + (((frame_height_coded) + 15) / 16 * 5 * 16); \ + if ((num_vpp_pipes_enc) > 1) \ + { \ + _size += BUFFER_ALIGNMENT_512_BYTES; \ + _size = HFI_ALIGN(_size, BUFFER_ALIGNMENT_512_BYTES) *\ + (num_vpp_pipes_enc); \ + } \ + _size = HFI_ALIGN(_size, VENUS_DMA_ALIGNMENT); \ + } while (0) + +#define SIZE_LEFT_LINEBUFF_RECON_PIX(_size, is_ten_bit, frame_height_coded, \ + num_vpp_pipes_enc) \ + do \ + { \ + _size = (((is_ten_bit + 1) * 2 * (frame_height_coded) + \ + VENUS_DMA_ALIGNMENT) + \ + (VENUS_DMA_ALIGNMENT << (num_vpp_pipes_enc - 1)) - 1) & \ + (~((VENUS_DMA_ALIGNMENT << (num_vpp_pipes_enc - 1)) - 1)) * 1; \ + } while (0) + +#define SIZE_TOP_LINEBUFF_CTRL_FE(_size, frame_width_coded, standard) \ + do \ + { \ + _size = (standard == HFI_CODEC_ENCODE_HEVC) ? (64 * \ + ((frame_width_coded) >> 5)) : (VENUS_DMA_ALIGNMENT + 16 * \ + ((frame_width_coded) >> 4)); \ + _size = HFI_ALIGN(_size, VENUS_DMA_ALIGNMENT); \ + } while (0) + +#define SIZE_LEFT_LINEBUFF_CTRL_FE(frame_height_coded, num_vpp_pipes_enc) \ + ((((VENUS_DMA_ALIGNMENT + 64 * ((frame_height_coded) >> 4)) + \ + (VENUS_DMA_ALIGNMENT << (num_vpp_pipes_enc - 1)) - 1) & \ + (~((VENUS_DMA_ALIGNMENT << (num_vpp_pipes_enc - 1)) - 1)) * 1) * \ + num_vpp_pipes_enc) + +#define SIZE_LEFT_LINEBUFF_METADATA_RECON_Y(_size, frame_height_coded, \ + is_ten_bit, num_vpp_pipes_enc) \ + do \ + { \ + _size = ((VENUS_DMA_ALIGNMENT + 64 * ((frame_height_coded) / \ + (8 * (is_ten_bit ? 4 : 8))))); \ + _size = HFI_ALIGN(_size, VENUS_DMA_ALIGNMENT); \ + _size = (_size * num_vpp_pipes_enc); \ + } while (0) + +#define SIZE_LEFT_LINEBUFF_METADATA_RECON_UV(_size, frame_height_coded, \ + is_ten_bit, num_vpp_pipes_enc) \ + do \ + { \ + _size = ((VENUS_DMA_ALIGNMENT + 64 * ((frame_height_coded) / \ + (4 * (is_ten_bit ? 4 : 8))))); \ + _size = HFI_ALIGN(_size, VENUS_DMA_ALIGNMENT); \ + _size = (_size * num_vpp_pipes_enc); \ + } while (0) + +#define SIZE_LINEBUFF_RECON_PIX(_size, is_ten_bit, frame_width_coded) \ + do \ + { \ + _size = ((is_ten_bit ? 3 : 2) * (frame_width_coded)); \ + _size = HFI_ALIGN(_size, VENUS_DMA_ALIGNMENT); \ + } while (0) + +#define SIZE_SLICE_CMD_BUFFER (HFI_ALIGN(20480, VENUS_DMA_ALIGNMENT)) +#define SIZE_SPS_PPS_SLICE_HDR (2048 + 4096) + +#define SIZE_FRAME_RC_BUF_SIZE(_size, standard, frame_height_coded, \ + num_vpp_pipes_enc) \ + do \ + { \ + _size = (standard == HFI_CODEC_ENCODE_HEVC) ? (256 + 16 * \ + (14 + ((((frame_height_coded) >> 5) + 7) >> 3))) : \ + (256 + 16 * (14 + ((((frame_height_coded) >> 4) + 7) >> 3))); \ + _size *= 11; \ + if (num_vpp_pipes_enc > 1) \ + { \ + _size = HFI_ALIGN(_size, VENUS_DMA_ALIGNMENT) * \ + num_vpp_pipes_enc;\ + } \ + _size = HFI_ALIGN(_size, BUFFER_ALIGNMENT_512_BYTES) * \ + HFI_MAX_COL_FRAME; \ + } while (0) + +#define ENC_BITCNT_BUF_SIZE(num_lcu_in_frame) HFI_ALIGN((256 + \ + (4 * (num_lcu_in_frame))), VENUS_DMA_ALIGNMENT) +#define ENC_BITMAP_BUF_SIZE(num_lcu_in_frame) HFI_ALIGN((256 + \ + ((num_lcu_in_frame) >> 3)), VENUS_DMA_ALIGNMENT) +#define SIZE_LINE_BUF_SDE(frame_width_coded) HFI_ALIGN((256 + \ + (16 * ((frame_width_coded) >> 4))), VENUS_DMA_ALIGNMENT) + +#define SIZE_BSE_SLICE_CMD_BUF ((((8192 << 2) + 7) & (~7)) * 3) + +#define SIZE_LAMBDA_LUT (256 * 11) +#define SIZE_OVERRIDE_BUF(num_lcumb) (HFI_ALIGN(((16 * (((num_lcumb) + 7)\ + >> 3))), VENUS_DMA_ALIGNMENT) * 2) +#define SIZE_IR_BUF(num_lcu_in_frame) HFI_ALIGN((((((num_lcu_in_frame) << 1) + 7) &\ + (~7)) * 3), VENUS_DMA_ALIGNMENT) + +#define SIZE_VPSS_LINE_BUF(num_vpp_pipes_enc, frame_height_coded, \ + frame_width_coded) \ + (HFI_ALIGN(((((((8192) >> 2) << 5) * (num_vpp_pipes_enc)) + 64) + \ + (((((MAX((frame_width_coded), (frame_height_coded)) + 3) >> 2) << 5) +\ + 256) * 16)), VENUS_DMA_ALIGNMENT)) + +#define SIZE_TOP_LINE_BUF_FIRST_STG_SAO(frame_width_coded) \ + HFI_ALIGN((16 * ((frame_width_coded) >> 5)), VENUS_DMA_ALIGNMENT) + +#define HFI_BUFFER_LINE_ENC(_size, frame_width, frame_height, is_ten_bit, \ + num_vpp_pipes_enc, lcu_size, standard) \ + do \ + { \ + HFI_U32 width_in_lcus = 0, height_in_lcus = 0, \ + frame_width_coded = 0, frame_height_coded = 0; \ + HFI_U32 line_buff_data_size = 0, left_line_buff_ctrl_size = 0, \ + left_line_buff_recon_pix_size = 0, \ + top_line_buff_ctrl_fe_size = 0; \ + HFI_U32 left_line_buff_metadata_recon__y__size = 0, \ + left_line_buff_metadata_recon__uv__size = 0, \ + line_buff_recon_pix_size = 0; \ + width_in_lcus = ((frame_width) + (lcu_size)-1) / (lcu_size); \ + height_in_lcus = ((frame_height) + (lcu_size)-1) / (lcu_size); \ + frame_width_coded = width_in_lcus * (lcu_size); \ + frame_height_coded = height_in_lcus * (lcu_size); \ + SIZE_LINEBUFF_DATA(line_buff_data_size, is_ten_bit, \ + frame_width_coded);\ + SIZE_LEFT_LINEBUFF_CTRL(left_line_buff_ctrl_size, standard, \ + frame_height_coded, num_vpp_pipes_enc); \ + SIZE_LEFT_LINEBUFF_RECON_PIX(left_line_buff_recon_pix_size, \ + is_ten_bit, frame_height_coded, num_vpp_pipes_enc); \ + SIZE_TOP_LINEBUFF_CTRL_FE(top_line_buff_ctrl_fe_size, \ + frame_width_coded, standard); \ + SIZE_LEFT_LINEBUFF_METADATA_RECON_Y\ + (left_line_buff_metadata_recon__y__size, \ + frame_height_coded, is_ten_bit, num_vpp_pipes_enc); \ + SIZE_LEFT_LINEBUFF_METADATA_RECON_UV\ + (left_line_buff_metadata_recon__uv__size, \ + frame_height_coded, is_ten_bit, num_vpp_pipes_enc); \ + SIZE_LINEBUFF_RECON_PIX(line_buff_recon_pix_size, is_ten_bit,\ + frame_width_coded); \ + _size = SIZE_LINE_BUF_CTRL(frame_width_coded) + \ + SIZE_LINE_BUF_CTRL_ID2(frame_width_coded) + \ + line_buff_data_size + \ + left_line_buff_ctrl_size + \ + left_line_buff_recon_pix_size + \ + top_line_buff_ctrl_fe_size + \ + left_line_buff_metadata_recon__y__size + \ + left_line_buff_metadata_recon__uv__size + \ + line_buff_recon_pix_size + \ + SIZE_LEFT_LINEBUFF_CTRL_FE(frame_height_coded, \ + num_vpp_pipes_enc) + SIZE_LINE_BUF_SDE(frame_width_coded) + \ + SIZE_VPSS_LINE_BUF(num_vpp_pipes_enc, frame_height_coded, \ + frame_width_coded) + \ + SIZE_TOP_LINE_BUF_FIRST_STG_SAO(frame_width_coded); \ + } while (0) + +#define HFI_BUFFER_LINE_H264E(_size, frame_width, frame_height, is_ten_bit, \ + num_vpp_pipes) \ + do \ + { \ + HFI_BUFFER_LINE_ENC(_size, frame_width, frame_height, 0, \ + num_vpp_pipes, 16, HFI_CODEC_ENCODE_AVC); \ + } while (0) + +#define HFI_BUFFER_LINE_H265E(_size, frame_width, frame_height, is_ten_bit, \ + num_vpp_pipes) \ + do \ + { \ + HFI_BUFFER_LINE_ENC(_size, frame_width, frame_height, \ + is_ten_bit, num_vpp_pipes, 32, HFI_CODEC_ENCODE_HEVC); \ + } while (0) + +#define HFI_BUFFER_COMV_ENC(_size, frame_width, frame_height, lcu_size, \ + num_recon, standard) \ + do \ + { \ + HFI_U32 size_colloc_mv = 0, size_colloc_rc = 0; \ + HFI_U32 mb_width = ((frame_width) + 15) >> 4; \ + HFI_U32 mb_height = ((frame_height) + 15) >> 4; \ + HFI_U32 width_in_lcus = ((frame_width) + (lcu_size)-1) /\ + (lcu_size); \ + HFI_U32 height_in_lcus = ((frame_height) + (lcu_size)-1) / \ + (lcu_size); \ + HFI_U32 num_lcu_in_frame = width_in_lcus * height_in_lcus; \ + size_colloc_mv = (standard == HFI_CODEC_ENCODE_HEVC) ? \ + (16 * ((num_lcu_in_frame << 2) + BUFFER_ALIGNMENT_32_BYTES)) : \ + (3 * 16 * (width_in_lcus * height_in_lcus +\ + BUFFER_ALIGNMENT_32_BYTES)); \ + size_colloc_mv = HFI_ALIGN(size_colloc_mv, \ + VENUS_DMA_ALIGNMENT) * num_recon; \ + size_colloc_rc = (((mb_width + 7) >> 3) * 16 * 2 * mb_height); \ + size_colloc_rc = HFI_ALIGN(size_colloc_rc, \ + VENUS_DMA_ALIGNMENT) * HFI_MAX_COL_FRAME; \ + _size = size_colloc_mv + size_colloc_rc; \ + } while (0) + +#define HFI_BUFFER_COMV_H264E(_size, frame_width, frame_height, num_recon) \ + do \ + { \ + HFI_BUFFER_COMV_ENC(_size, frame_width, frame_height, 16, \ + num_recon, HFI_CODEC_ENCODE_AVC); \ + } while (0) + +#define HFI_BUFFER_COMV_H265E(_size, frame_width, frame_height, num_recon) \ + do \ + { \ + HFI_BUFFER_COMV_ENC(_size, frame_width, frame_height, 32,\ + num_recon, HFI_CODEC_ENCODE_HEVC); \ + } while (0) + +#define HFI_BUFFER_NON_COMV_ENC(_size, frame_width, frame_height, \ + num_vpp_pipes_enc, lcu_size, standard) \ + do \ + { \ + HFI_U32 width_in_lcus = 0, height_in_lcus = 0, \ + frame_width_coded = 0, frame_height_coded = 0, \ + num_lcu_in_frame = 0, num_lcumb = 0; \ + HFI_U32 frame_rc_buf_size = 0; \ + width_in_lcus = ((frame_width) + (lcu_size)-1) / (lcu_size); \ + height_in_lcus = ((frame_height) + (lcu_size)-1) / (lcu_size); \ + num_lcu_in_frame = width_in_lcus * height_in_lcus; \ + frame_width_coded = width_in_lcus * (lcu_size); \ + frame_height_coded = height_in_lcus * (lcu_size); \ + num_lcumb = (frame_height_coded / lcu_size) * \ + ((frame_width_coded + lcu_size * 8) / lcu_size); \ + SIZE_FRAME_RC_BUF_SIZE(frame_rc_buf_size, standard, \ + frame_height_coded, num_vpp_pipes_enc); \ + _size = SIZE_ENC_SLICE_INFO_BUF(num_lcu_in_frame) + \ + SIZE_SLICE_CMD_BUFFER + \ + SIZE_SPS_PPS_SLICE_HDR + \ + frame_rc_buf_size + \ + ENC_BITCNT_BUF_SIZE(num_lcu_in_frame) + \ + ENC_BITMAP_BUF_SIZE(num_lcu_in_frame) + \ + SIZE_BSE_SLICE_CMD_BUF + \ + SIZE_LAMBDA_LUT + \ + SIZE_OVERRIDE_BUF(num_lcumb) + \ + SIZE_IR_BUF(num_lcu_in_frame); \ + } while (0) + +#define HFI_BUFFER_NON_COMV_H264E(_size, frame_width, frame_height, \ + num_vpp_pipes_enc) \ + do \ + { \ + HFI_BUFFER_NON_COMV_ENC(_size, frame_width, frame_height, \ + num_vpp_pipes_enc, 16, HFI_CODEC_ENCODE_AVC); \ + } while (0) + +#define HFI_BUFFER_NON_COMV_H265E(_size, frame_width, frame_height, \ + num_vpp_pipes_enc) \ + do \ + { \ + HFI_BUFFER_NON_COMV_ENC(_size, frame_width, frame_height, \ + num_vpp_pipes_enc, 32, HFI_CODEC_ENCODE_HEVC); \ + } while (0) + +#define SIZE_ENC_REF_BUFFER(size, frame_width, frame_height) \ + do \ + { \ + HFI_U32 u_buffer_width = 0, u_buffer_height = 0, \ + u_chroma_buffer_height = 0; \ + u_buffer_height = HFI_ALIGN(frame_height, \ + HFI_VENUS_HEIGHT_ALIGNMENT); \ + u_chroma_buffer_height = frame_height >> 1; \ + u_chroma_buffer_height = HFI_ALIGN(u_chroma_buffer_height, \ + HFI_VENUS_HEIGHT_ALIGNMENT); \ + u_buffer_width = HFI_ALIGN(frame_width, \ + HFI_VENUS_WIDTH_ALIGNMENT); \ + size = (u_buffer_height + u_chroma_buffer_height) * \ + u_buffer_width; \ + } while (0) + +#define SIZE_ENC_TEN_BIT_REF_BUFFER(size, frame_width, frame_height) \ + do \ + { \ + HFI_U32 ref_buf_height = 0, ref_luma_stride_in_bytes = 0, \ + u_ref_stride = 0, luma_size = 0, ref_chrm_height_in_bytes = 0, \ + chroma_size = 0, ref_buf_size = 0; \ + ref_buf_height = (frame_height + \ + (HFI_VENUS_HEIGHT_ALIGNMENT - 1)) \ + & (~(HFI_VENUS_HEIGHT_ALIGNMENT - 1)); \ + ref_luma_stride_in_bytes = ((frame_width + \ + SYSTEM_LAL_TILE10 - 1) / SYSTEM_LAL_TILE10) * \ + SYSTEM_LAL_TILE10; \ + u_ref_stride = 4 * (ref_luma_stride_in_bytes / 3); \ + u_ref_stride = (u_ref_stride + (BUF_SIZE_ALIGN_128 - 1)) &\ + (~(BUF_SIZE_ALIGN_128 - 1)); \ + luma_size = ref_buf_height * u_ref_stride; \ + ref_chrm_height_in_bytes = (((frame_height + 1) >> 1) + \ + (BUF_SIZE_ALIGN_32 - 1)) & (~(BUF_SIZE_ALIGN_32 - 1)); \ + chroma_size = u_ref_stride * ref_chrm_height_in_bytes; \ + luma_size = (luma_size + (BUF_SIZE_ALIGN_4096 - 1)) & \ + (~(BUF_SIZE_ALIGN_4096 - 1)); \ + chroma_size = (chroma_size + (BUF_SIZE_ALIGN_4096 - 1)) & \ + (~(BUF_SIZE_ALIGN_4096 - 1)); \ + ref_buf_size = luma_size + chroma_size; \ + size = ref_buf_size; \ + } while (0) + +#define HFI_BUFFER_DPB_ENC(_size, frame_width, frame_height, is_ten_bit) \ + do \ + { \ + HFI_U32 metadata_stride, metadata_buf_height, meta_size_y, \ + meta_size_c; \ + HFI_U32 ten_bit_ref_buf_size = 0, ref_buf_size = 0; \ + if (!is_ten_bit) \ + { \ + SIZE_ENC_REF_BUFFER(ref_buf_size, frame_width, \ + frame_height); \ + HFI_UBWC_CALC_METADATA_PLANE_STRIDE(metadata_stride, \ + (frame_width), 64, \ + HFI_COLOR_FORMAT_YUV420_NV12_UBWC_Y_TILE_WIDTH); \ + HFI_UBWC_METADATA_PLANE_BUFHEIGHT(metadata_buf_height, \ + (frame_height), 16, \ + HFI_COLOR_FORMAT_YUV420_NV12_UBWC_Y_TILE_HEIGHT); \ + HFI_UBWC_METADATA_PLANE_BUFFER_SIZE(meta_size_y, \ + metadata_stride, metadata_buf_height); \ + HFI_UBWC_METADATA_PLANE_BUFFER_SIZE(meta_size_c, \ + metadata_stride, metadata_buf_height); \ + _size = ref_buf_size + meta_size_y + meta_size_c; \ + } \ + else \ + { \ + SIZE_ENC_TEN_BIT_REF_BUFFER(ten_bit_ref_buf_size, \ + frame_width, frame_height); \ + HFI_UBWC_CALC_METADATA_PLANE_STRIDE(metadata_stride, \ + frame_width, VENUS_METADATA_STRIDE_MULTIPLE, \ + HFI_COLOR_FORMAT_YUV420_TP10_UBWC_Y_TILE_WIDTH); \ + HFI_UBWC_METADATA_PLANE_BUFHEIGHT(metadata_buf_height, \ + frame_height, VENUS_METADATA_HEIGHT_MULTIPLE, \ + HFI_COLOR_FORMAT_YUV420_TP10_UBWC_Y_TILE_HEIGHT); \ + HFI_UBWC_METADATA_PLANE_BUFFER_SIZE(meta_size_y, \ + metadata_stride, metadata_buf_height); \ + HFI_UBWC_METADATA_PLANE_BUFFER_SIZE(meta_size_c, \ + metadata_stride, metadata_buf_height); \ + _size = ten_bit_ref_buf_size + meta_size_y + \ + meta_size_c; \ + } \ + } while (0) + +#define HFI_BUFFER_DPB_H264E(_size, frame_width, frame_height) \ + do \ + { \ + HFI_BUFFER_DPB_ENC(_size, frame_width, frame_height, 0); \ + } while (0) + +#define HFI_BUFFER_DPB_H265E(_size, frame_width, frame_height, is_ten_bit) \ + do \ + { \ + HFI_BUFFER_DPB_ENC(_size, frame_width, frame_height, is_ten_bit); \ + } while (0) + +#define HFI_BUFFER_VPSS_ENC(vpss_size, dswidth, dsheight, ds_enable, blur, is_ten_bit) \ + do \ + { \ + vpss_size = 0; \ + if (ds_enable || blur) \ + { \ + HFI_BUFFER_DPB_ENC(vpss_size, dswidth, dsheight, is_ten_bit); \ + } \ + } while (0) + +#define HFI_IRIS3_ENC_MIN_INPUT_BUF_COUNT(numInput, TotalHBLayers) \ + do \ + { \ + numInput = 3; \ + if (TotalHBLayers >= 2) \ + { \ + numInput = (1 << (TotalHBLayers - 1)) + 2; \ + } \ + } while (0) + +#endif /* __HFI_BUFFER_IRIS3__ */ diff --git a/driver/variant/iris3/inc/msm_vidc_buffer_iris3.h b/driver/variant/iris3/inc/msm_vidc_buffer_iris3.h new file mode 100644 index 0000000000..a013e0e225 --- /dev/null +++ b/driver/variant/iris3/inc/msm_vidc_buffer_iris3.h @@ -0,0 +1,18 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. + * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#ifndef __H_MSM_VIDC_BUFFER_IRIS3_H__ +#define __H_MSM_VIDC_BUFFER_IRIS3_H__ + +#include "msm_vidc_inst.h" + +int msm_buffer_size_iris3(struct msm_vidc_inst *inst, + enum msm_vidc_buffer_type buffer_type); +int msm_buffer_min_count_iris3(struct msm_vidc_inst *inst, + enum msm_vidc_buffer_type buffer_type); +int msm_buffer_extra_count_iris3(struct msm_vidc_inst *inst, + enum msm_vidc_buffer_type buffer_type); +#endif // __H_MSM_VIDC_BUFFER_IRIS3_H__ diff --git a/driver/variant/iris3/inc/msm_vidc_iris3.h b/driver/variant/iris3/inc/msm_vidc_iris3.h new file mode 100644 index 0000000000..cc955e01a4 --- /dev/null +++ b/driver/variant/iris3/inc/msm_vidc_iris3.h @@ -0,0 +1,26 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. + * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#ifndef _MSM_VIDC_IRIS3_H_ +#define _MSM_VIDC_IRIS3_H_ + +#include "msm_vidc_core.h" + +#if defined(CONFIG_MSM_VIDC_IRIS3) +int msm_vidc_init_iris3(struct msm_vidc_core *core); +int msm_vidc_deinit_iris3(struct msm_vidc_core *core); +#else +static inline int msm_vidc_init_iris3(struct msm_vidc_core *core) +{ + return -EINVAL; +} +static inline int msm_vidc_deinit_iris3(struct msm_vidc_core *core) +{ + return -EINVAL; +} +#endif + +#endif // _MSM_VIDC_IRIS3_H_ diff --git a/driver/variant/iris3/inc/msm_vidc_power_iris3.h b/driver/variant/iris3/inc/msm_vidc_power_iris3.h new file mode 100644 index 0000000000..e4ae63f9e1 --- /dev/null +++ b/driver/variant/iris3/inc/msm_vidc_power_iris3.h @@ -0,0 +1,17 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. + * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#ifndef __H_MSM_VIDC_POWER_IRIS3_H__ +#define __H_MSM_VIDC_POWER_IRIS3_H__ + +#include "msm_vidc_power.h" +#include "msm_vidc_inst.h" + +u64 msm_vidc_calc_freq_iris3(struct msm_vidc_inst* inst, u32 data_size); +int msm_vidc_calc_bw_iris3(struct msm_vidc_inst* inst, + struct vidc_bus_vote_data* vote_data); + +#endif diff --git a/driver/variant/iris3/src/msm_vidc_buffer_iris3.c b/driver/variant/iris3/src/msm_vidc_buffer_iris3.c new file mode 100644 index 0000000000..711c9059bd --- /dev/null +++ b/driver/variant/iris3/src/msm_vidc_buffer_iris3.c @@ -0,0 +1,675 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. + * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include "hfi_property.h" +#include "hfi_buffer_iris3.h" +#include "msm_vidc_buffer_iris3.h" +#include "msm_vidc_buffer.h" +#include "msm_vidc_inst.h" +#include "msm_vidc_core.h" +#include "msm_vidc_platform.h" +#include "msm_vidc_driver.h" +#include "msm_vidc_debug.h" +#include "msm_media_info.h" +#include "msm_vidc_control.h" + +static u32 msm_vidc_decoder_bin_size_iris3(struct msm_vidc_inst *inst) +{ + struct msm_vidc_core *core; + u32 size = 0; + u32 width, height, num_vpp_pipes; + struct v4l2_format *f; + bool is_interlaced; + u32 vpp_delay; + + if (!inst || !inst->core || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return size; + } + core = inst->core; + + if (!core->capabilities) { + i_vpr_e(inst, "%s: invalid capabilities\n", __func__); + return size; + } + num_vpp_pipes = core->capabilities[NUM_VPP_PIPE].value; + if (inst->decode_vpp_delay.enable) + vpp_delay = inst->decode_vpp_delay.size; + else + vpp_delay = DEFAULT_BSE_VPP_DELAY; + if (inst->capabilities->cap[CODED_FRAMES].value == + CODED_FRAMES_PROGRESSIVE) + is_interlaced = false; + else + is_interlaced = true; + f = &inst->fmts[INPUT_PORT]; + width = f->fmt.pix_mp.width; + height = f->fmt.pix_mp.height; + + if (inst->codec == MSM_VIDC_H264) + HFI_BUFFER_BIN_H264D(size, width, height, + is_interlaced, vpp_delay, num_vpp_pipes); + else if (inst->codec == MSM_VIDC_HEVC || inst->codec == MSM_VIDC_HEIC) + HFI_BUFFER_BIN_H265D(size, width, height, + 0, vpp_delay, num_vpp_pipes); + else if (inst->codec == MSM_VIDC_VP9) + HFI_BUFFER_BIN_VP9D(size, width, height, + 0, num_vpp_pipes); + + i_vpr_l(inst, "%s: size %d\n", __func__, size); + return size; +} + +static u32 msm_vidc_decoder_comv_size_iris3(struct msm_vidc_inst* inst) +{ + u32 size = 0; + u32 width, height, out_min_count, vpp_delay; + struct v4l2_format* f; + + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return size; + } + + f = &inst->fmts[INPUT_PORT]; + width = f->fmt.pix_mp.width; + height = f->fmt.pix_mp.height; + if (inst->decode_vpp_delay.enable) + vpp_delay = inst->decode_vpp_delay.size; + else + vpp_delay = DEFAULT_BSE_VPP_DELAY; + out_min_count = inst->buffers.output.min_count; + out_min_count = max(vpp_delay + 1, out_min_count); + + if (inst->codec == MSM_VIDC_H264) + HFI_BUFFER_COMV_H264D(size, width, height, out_min_count); + else if (inst->codec == MSM_VIDC_HEVC || inst->codec == MSM_VIDC_HEIC) + HFI_BUFFER_COMV_H265D(size, width, height, out_min_count); + + i_vpr_l(inst, "%s: size %d\n", __func__, size); + return size; +} + +static u32 msm_vidc_decoder_non_comv_size_iris3(struct msm_vidc_inst* inst) +{ + u32 size = 0; + u32 width, height, num_vpp_pipes; + struct msm_vidc_core* core; + struct v4l2_format* f; + + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return size; + } + core = inst->core; + if (!core->capabilities) { + i_vpr_e(inst, "%s: invalid core capabilities\n", __func__); + return size; + } + num_vpp_pipes = core->capabilities[NUM_VPP_PIPE].value; + + f = &inst->fmts[INPUT_PORT]; + width = f->fmt.pix_mp.width; + height = f->fmt.pix_mp.height; + + if (inst->codec == MSM_VIDC_H264) + HFI_BUFFER_NON_COMV_H264D(size, width, height, num_vpp_pipes); + else if (inst->codec == MSM_VIDC_HEVC || inst->codec == MSM_VIDC_HEIC) + HFI_BUFFER_NON_COMV_H265D(size, width, height, num_vpp_pipes); + + i_vpr_l(inst, "%s: size %d\n", __func__, size); + return size; +} + +static u32 msm_vidc_decoder_line_size_iris3(struct msm_vidc_inst *inst) +{ + struct msm_vidc_core *core; + u32 size = 0; + u32 width, height, out_min_count, num_vpp_pipes, vpp_delay; + struct v4l2_format *f; + bool is_opb; + u32 color_fmt; + + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return size; + } + core = inst->core; + if (!core->capabilities) { + i_vpr_e(inst, "%s: invalid capabilities\n", __func__); + return size; + } + num_vpp_pipes = core->capabilities[NUM_VPP_PIPE].value; + + color_fmt = v4l2_colorformat_to_driver( + inst->fmts[OUTPUT_PORT].fmt.pix_mp.pixelformat, __func__); + if (is_linear_colorformat(color_fmt)) + is_opb = true; + else + is_opb = false; + /* + * assume worst case, since color format is unknown at this + * time + */ + is_opb = true; + + if (inst->decode_vpp_delay.enable) + vpp_delay = inst->decode_vpp_delay.size; + else + vpp_delay = DEFAULT_BSE_VPP_DELAY; + + f = &inst->fmts[INPUT_PORT]; + width = f->fmt.pix_mp.width; + height = f->fmt.pix_mp.height; + out_min_count = inst->buffers.output.min_count; + out_min_count = max(vpp_delay + 1, out_min_count); + if (inst->codec == MSM_VIDC_H264) + HFI_BUFFER_LINE_H264D(size, width, height, is_opb, + num_vpp_pipes); + else if (inst->codec == MSM_VIDC_HEVC || inst->codec == MSM_VIDC_HEIC) + HFI_BUFFER_LINE_H265D(size, width, height, is_opb, + num_vpp_pipes); + else if (inst->codec == MSM_VIDC_VP9) + HFI_BUFFER_LINE_VP9D(size, width, height, out_min_count, + is_opb, num_vpp_pipes); + + i_vpr_l(inst, "%s: size %d\n", __func__, size); + return size; +} + +static u32 msm_vidc_decoder_persist_size_iris3(struct msm_vidc_inst *inst) +{ + u32 size = 0; + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return size; + } + + if (inst->codec == MSM_VIDC_H264) + HFI_BUFFER_PERSIST_H264D(size); + else if (inst->codec == MSM_VIDC_HEVC || inst->codec == MSM_VIDC_HEIC) + HFI_BUFFER_PERSIST_H265D(size); + else if (inst->codec == MSM_VIDC_VP9) + HFI_BUFFER_PERSIST_VP9D(size); + + i_vpr_l(inst, "%s: size %d\n", __func__, size); + return size; +} + +static u32 msm_vidc_decoder_dpb_size_iris3(struct msm_vidc_inst *inst) +{ + + u32 size = 0; + u32 color_fmt, v4l2_fmt; + u32 width, height; + struct v4l2_format *f; + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return size; + } + + color_fmt = inst->capabilities->cap[PIX_FMTS].value; + if (!is_linear_colorformat(color_fmt)) + return size; + + f = &inst->fmts[OUTPUT_PORT]; + width = f->fmt.pix_mp.width; + height = f->fmt.pix_mp.height; + + if (color_fmt == MSM_VIDC_FMT_NV12) { + v4l2_fmt = V4L2_PIX_FMT_VIDC_NV12C; + HFI_NV12_UBWC_IL_CALC_BUF_SIZE_V2(size, width, height, + VIDEO_Y_STRIDE_BYTES(v4l2_fmt, width), VIDEO_Y_SCANLINES(v4l2_fmt, height), + VIDEO_UV_STRIDE_BYTES(v4l2_fmt, width), VIDEO_UV_SCANLINES(v4l2_fmt, height), + VIDEO_Y_META_STRIDE(v4l2_fmt, width), VIDEO_Y_META_SCANLINES(v4l2_fmt, + height), + VIDEO_UV_META_STRIDE(v4l2_fmt, width), VIDEO_UV_META_SCANLINES(v4l2_fmt, + height)); + } else if (color_fmt == MSM_VIDC_FMT_P010) { + v4l2_fmt = V4L2_PIX_FMT_VIDC_TP10C; + HFI_YUV420_TP10_UBWC_CALC_BUF_SIZE(size, + VIDEO_Y_STRIDE_BYTES(v4l2_fmt, width), VIDEO_Y_SCANLINES(v4l2_fmt, height), + VIDEO_UV_STRIDE_BYTES(v4l2_fmt, width), VIDEO_UV_SCANLINES(v4l2_fmt, height), + VIDEO_Y_META_STRIDE(v4l2_fmt, width), VIDEO_Y_META_SCANLINES(v4l2_fmt, + height), + VIDEO_UV_META_STRIDE(v4l2_fmt, width), VIDEO_UV_META_SCANLINES(v4l2_fmt, + height)); + } + + i_vpr_l(inst, "%s: size %d\n", __func__, size); + return size; +} + +/* encoder internal buffers */ +static u32 msm_vidc_encoder_bin_size_iris3(struct msm_vidc_inst *inst) +{ + struct msm_vidc_core *core; + u32 size = 0; + u32 width, height, num_vpp_pipes, stage; + struct v4l2_format *f; + + if (!inst || !inst->core || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return size; + } + core = inst->core; + if (!core->capabilities) { + i_vpr_e(inst, "%s: invalid core capabilities\n", __func__); + return size; + } + num_vpp_pipes = core->capabilities[NUM_VPP_PIPE].value; + stage = inst->capabilities->cap[STAGE].value; + f = &inst->fmts[OUTPUT_PORT]; + width = f->fmt.pix_mp.width; + height = f->fmt.pix_mp.height; + + if (inst->codec == MSM_VIDC_H264) + HFI_BUFFER_BIN_H264E(size, inst->hfi_rc_type, width, + height, stage, num_vpp_pipes); + else if (inst->codec == MSM_VIDC_HEVC || inst->codec == MSM_VIDC_HEIC) + HFI_BUFFER_BIN_H265E(size, inst->hfi_rc_type, width, + height, stage, num_vpp_pipes); + + i_vpr_l(inst, "%s: size %d\n", __func__, size); + return size; +} + +static u32 msm_vidc_get_recon_buf_count(struct msm_vidc_inst *inst) +{ + u32 num_buf_recon = 0; + s32 n_bframe, ltr_count, hp_layers = 0, hb_layers = 0; + bool is_hybrid_hp = false; + u32 hfi_codec = 0; + + n_bframe = inst->capabilities->cap[B_FRAME].value; + ltr_count = inst->capabilities->cap[LTR_COUNT].value; + + if (inst->hfi_layer_type == HFI_HIER_B) { + hb_layers = inst->capabilities->cap[ENH_LAYER_COUNT].value + 1; + } else { + hp_layers = inst->capabilities->cap[ENH_LAYER_COUNT].value + 1; + if (inst->hfi_layer_type == HFI_HIER_P_HYBRID_LTR) + is_hybrid_hp = true; + } + + if (inst->codec == MSM_VIDC_H264) + hfi_codec = HFI_CODEC_ENCODE_AVC; + else if (inst->codec == MSM_VIDC_HEVC || inst->codec == MSM_VIDC_HEIC) + hfi_codec = HFI_CODEC_ENCODE_HEVC; + + HFI_IRIS3_ENC_RECON_BUF_COUNT(num_buf_recon, n_bframe, ltr_count, + hp_layers, hb_layers, is_hybrid_hp, hfi_codec); + + return num_buf_recon; +} + +static u32 msm_vidc_encoder_comv_size_iris3(struct msm_vidc_inst* inst) +{ + u32 size = 0; + u32 width, height, num_recon = 0; + struct v4l2_format* f; + + if (!inst || !inst->core || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return size; + } + + f = &inst->fmts[OUTPUT_PORT]; + width = f->fmt.pix_mp.width; + height = f->fmt.pix_mp.height; + + num_recon = msm_vidc_get_recon_buf_count(inst); + if (inst->codec == MSM_VIDC_H264) + HFI_BUFFER_COMV_H264E(size, width, height, num_recon); + else if (inst->codec == MSM_VIDC_HEVC || inst->codec == MSM_VIDC_HEIC) + HFI_BUFFER_COMV_H265E(size, width, height, num_recon); + + i_vpr_l(inst, "%s: size %d\n", __func__, size); + return size; +} + +static u32 msm_vidc_encoder_non_comv_size_iris3(struct msm_vidc_inst* inst) +{ + struct msm_vidc_core* core; + u32 size = 0; + u32 width, height, num_vpp_pipes; + struct v4l2_format* f; + + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return size; + } + core = inst->core; + if (!core->capabilities) { + i_vpr_e(inst, "%s: invalid core capabilities\n", __func__); + return size; + } + num_vpp_pipes = core->capabilities[NUM_VPP_PIPE].value; + f = &inst->fmts[OUTPUT_PORT]; + width = f->fmt.pix_mp.width; + height = f->fmt.pix_mp.height; + + if (inst->codec == MSM_VIDC_H264) + HFI_BUFFER_NON_COMV_H264E(size, width, height, num_vpp_pipes); + else if (inst->codec == MSM_VIDC_HEVC || inst->codec == MSM_VIDC_HEIC) + HFI_BUFFER_NON_COMV_H265E(size, width, height, num_vpp_pipes); + + i_vpr_l(inst, "%s: size %d\n", __func__, size); + return size; +} + +static u32 msm_vidc_encoder_line_size_iris3(struct msm_vidc_inst *inst) +{ + struct msm_vidc_core *core; + u32 size = 0; + u32 width, height, pixfmt, num_vpp_pipes; + bool is_tenbit = false; + struct v4l2_format *f; + + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return size; + } + core = inst->core; + if (!core->capabilities || !inst->capabilities) { + i_vpr_e(inst, "%s: invalid capabilities\n", __func__); + return size; + } + num_vpp_pipes = core->capabilities[NUM_VPP_PIPE].value; + pixfmt = inst->capabilities->cap[PIX_FMTS].value; + + f = &inst->fmts[OUTPUT_PORT]; + width = f->fmt.pix_mp.width; + height = f->fmt.pix_mp.height; + is_tenbit = (pixfmt == MSM_VIDC_FMT_P010 || pixfmt == MSM_VIDC_FMT_TP10C); + + if (inst->codec == MSM_VIDC_H264) + HFI_BUFFER_LINE_H264E(size, width, height, is_tenbit, num_vpp_pipes); + else if (inst->codec == MSM_VIDC_HEVC || inst->codec == MSM_VIDC_HEIC) + HFI_BUFFER_LINE_H265E(size, width, height, is_tenbit, num_vpp_pipes); + + i_vpr_l(inst, "%s: size %d\n", __func__, size); + return size; +} + +static u32 msm_vidc_encoder_dpb_size_iris3(struct msm_vidc_inst *inst) +{ + u32 size = 0; + u32 width, height, pixfmt; + struct v4l2_format *f; + bool is_tenbit; + + if (!inst || !inst->core || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return 0; + } + + f = &inst->fmts[OUTPUT_PORT]; + width = f->fmt.pix_mp.width; + height = f->fmt.pix_mp.height; + + pixfmt = inst->capabilities->cap[PIX_FMTS].value; + is_tenbit = (pixfmt == MSM_VIDC_FMT_P010 || pixfmt == MSM_VIDC_FMT_TP10C); + + if (inst->codec == MSM_VIDC_H264) + HFI_BUFFER_DPB_H264E(size, width, height); + else if (inst->codec == MSM_VIDC_HEVC || inst->codec == MSM_VIDC_HEIC) + HFI_BUFFER_DPB_H265E(size, width, height, is_tenbit); + + i_vpr_l(inst, "%s: size %d\n", __func__, size); + return size; +} + +static u32 msm_vidc_encoder_arp_size_iris3(struct msm_vidc_inst *inst) +{ + u32 size = 0; + + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return 0; + } + + HFI_BUFFER_ARP_ENC(size); + i_vpr_l(inst, "%s: size %d\n", __func__, size); + return size; +} + +static u32 msm_vidc_encoder_vpss_size_iris3(struct msm_vidc_inst* inst) +{ + u32 size = 0; + bool ds_enable = false, is_tenbit = false, blur = false; + u32 rotation_val = HFI_ROTATION_NONE; + u32 width, height, driver_colorfmt; + struct v4l2_format* f; + + if (!inst || !inst->core || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return 0; + } + + ds_enable = is_scaling_enabled(inst); + msm_vidc_v4l2_to_hfi_enum(inst, ROTATION, &rotation_val); + + f = &inst->fmts[OUTPUT_PORT]; + if (is_rotation_90_or_270(inst)) { + /* + * output width and height are rotated, + * so unrotate them to use as arguments to + * HFI_BUFFER_VPSS_ENC. + */ + width = f->fmt.pix_mp.height; + height = f->fmt.pix_mp.width; + } else { + width = f->fmt.pix_mp.width; + height = f->fmt.pix_mp.height; + } + + f = &inst->fmts[INPUT_PORT]; + driver_colorfmt = v4l2_colorformat_to_driver( + f->fmt.pix_mp.pixelformat, __func__); + is_tenbit = is_10bit_colorformat(driver_colorfmt); + if (inst->capabilities->cap[BLUR_TYPES].value != VIDC_BLUR_NONE) + blur = true; + + HFI_BUFFER_VPSS_ENC(size, width, height, ds_enable, blur, is_tenbit); + i_vpr_l(inst, "%s: size %d\n", __func__, size); + return size; +} + +struct msm_vidc_buf_type_handle { + enum msm_vidc_buffer_type type; + u32 (*handle)(struct msm_vidc_inst *inst); +}; + +int msm_buffer_size_iris3(struct msm_vidc_inst *inst, + enum msm_vidc_buffer_type buffer_type) +{ + int i; + u32 size = 0, buf_type_handle_size = 0; + const struct msm_vidc_buf_type_handle *buf_type_handle_arr = NULL; + static const struct msm_vidc_buf_type_handle dec_buf_type_handle[] = { + {MSM_VIDC_BUF_INPUT, msm_vidc_decoder_input_size }, + {MSM_VIDC_BUF_OUTPUT, msm_vidc_decoder_output_size }, + {MSM_VIDC_BUF_INPUT_META, msm_vidc_decoder_input_meta_size }, + {MSM_VIDC_BUF_OUTPUT_META, msm_vidc_decoder_output_meta_size }, + {MSM_VIDC_BUF_BIN, msm_vidc_decoder_bin_size_iris3 }, + {MSM_VIDC_BUF_COMV, msm_vidc_decoder_comv_size_iris3 }, + {MSM_VIDC_BUF_NON_COMV, msm_vidc_decoder_non_comv_size_iris3 }, + {MSM_VIDC_BUF_LINE, msm_vidc_decoder_line_size_iris3 }, + {MSM_VIDC_BUF_PERSIST, msm_vidc_decoder_persist_size_iris3 }, + {MSM_VIDC_BUF_DPB, msm_vidc_decoder_dpb_size_iris3 }, + }; + static const struct msm_vidc_buf_type_handle enc_buf_type_handle[] = { + {MSM_VIDC_BUF_INPUT, msm_vidc_encoder_input_size }, + {MSM_VIDC_BUF_OUTPUT, msm_vidc_encoder_output_size }, + {MSM_VIDC_BUF_INPUT_META, msm_vidc_encoder_input_meta_size }, + {MSM_VIDC_BUF_OUTPUT_META, msm_vidc_encoder_output_meta_size }, + {MSM_VIDC_BUF_BIN, msm_vidc_encoder_bin_size_iris3 }, + {MSM_VIDC_BUF_COMV, msm_vidc_encoder_comv_size_iris3 }, + {MSM_VIDC_BUF_NON_COMV, msm_vidc_encoder_non_comv_size_iris3 }, + {MSM_VIDC_BUF_LINE, msm_vidc_encoder_line_size_iris3 }, + {MSM_VIDC_BUF_DPB, msm_vidc_encoder_dpb_size_iris3 }, + {MSM_VIDC_BUF_ARP, msm_vidc_encoder_arp_size_iris3 }, + {MSM_VIDC_BUF_VPSS, msm_vidc_encoder_vpss_size_iris3 }, + }; + + if (is_decode_session(inst)) { + buf_type_handle_size = ARRAY_SIZE(dec_buf_type_handle); + buf_type_handle_arr = dec_buf_type_handle; + } else if (is_encode_session(inst)) { + buf_type_handle_size = ARRAY_SIZE(enc_buf_type_handle); + buf_type_handle_arr = enc_buf_type_handle; + } + + /* handle invalid session */ + if (!buf_type_handle_arr || !buf_type_handle_size) { + i_vpr_e(inst, "%s: invalid session %d\n", __func__, inst->domain); + return size; + } + + /* fetch buffer size */ + for (i = 0; i < buf_type_handle_size; i++) { + if (buf_type_handle_arr[i].type == buffer_type) { + size = buf_type_handle_arr[i].handle(inst); + break; + } + } + + /* handle unknown buffer type */ + if (i == buf_type_handle_size) { + i_vpr_e(inst, "%s: unknown buffer type %#x\n", __func__, buffer_type); + goto exit; + } + + i_vpr_l(inst, "buffer_size: type: %11s, size: %9u\n", buf_name(buffer_type), size); + +exit: + return size; +} + +static int msm_vidc_input_min_count_iris3(struct msm_vidc_inst* inst) +{ + u32 input_min_count = 0; + u32 total_hb_layer = 0; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return 0; + } + + if (is_decode_session(inst)) { + input_min_count = MIN_DEC_INPUT_BUFFERS; + } else if (is_encode_session(inst)) { + total_hb_layer = is_hierb_type_requested(inst) ? + inst->capabilities->cap[ENH_LAYER_COUNT].value + 1 : 0; + if (inst->codec == MSM_VIDC_H264 && + !inst->capabilities->cap[LAYER_ENABLE].value) { + total_hb_layer = 0; + } + HFI_IRIS3_ENC_MIN_INPUT_BUF_COUNT(input_min_count, + total_hb_layer); + } else { + i_vpr_e(inst, "%s: invalid domain\n", + __func__, inst->domain); + return 0; + } + + if (is_thumbnail_session(inst) || is_image_session(inst)) + input_min_count = 1; + + return input_min_count; +} + +static int msm_buffer_dpb_count(struct msm_vidc_inst *inst) +{ + int count = 0; + u32 color_fmt; + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return 0; + } + + /* decoder dpb buffer count */ + if (is_decode_session(inst)) { + color_fmt = inst->capabilities->cap[PIX_FMTS].value; + if (is_linear_colorformat(color_fmt)) + count = inst->buffers.output.min_count; + + return count; + } + + /* encoder dpb buffer count */ + return msm_vidc_get_recon_buf_count(inst); +} + +int msm_buffer_min_count_iris3(struct msm_vidc_inst *inst, + enum msm_vidc_buffer_type buffer_type) +{ + int count = 0; + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return 0; + } + + switch (buffer_type) { + case MSM_VIDC_BUF_INPUT: + case MSM_VIDC_BUF_INPUT_META: + count = msm_vidc_input_min_count_iris3(inst); + break; + case MSM_VIDC_BUF_OUTPUT: + case MSM_VIDC_BUF_OUTPUT_META: + count = msm_vidc_output_min_count(inst); + break; + case MSM_VIDC_BUF_BIN: + case MSM_VIDC_BUF_COMV: + case MSM_VIDC_BUF_NON_COMV: + case MSM_VIDC_BUF_LINE: + case MSM_VIDC_BUF_PERSIST: + case MSM_VIDC_BUF_ARP: + case MSM_VIDC_BUF_VPSS: + count = msm_vidc_internal_buffer_count(inst, buffer_type); + break; + case MSM_VIDC_BUF_DPB: + count = msm_buffer_dpb_count(inst); + break; + default: + break; + } + + i_vpr_l(inst, " min_count: type: %11s, count: %9u\n", buf_name(buffer_type), count); + return count; +} + +int msm_buffer_extra_count_iris3(struct msm_vidc_inst *inst, + enum msm_vidc_buffer_type buffer_type) +{ + int count = 0; + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return 0; + } + + switch (buffer_type) { + case MSM_VIDC_BUF_INPUT: + case MSM_VIDC_BUF_INPUT_META: + count = msm_vidc_input_extra_count(inst); + break; + case MSM_VIDC_BUF_OUTPUT: + case MSM_VIDC_BUF_OUTPUT_META: + count = msm_vidc_output_extra_count(inst); + break; + default: + break; + } + + i_vpr_l(inst, "extra_count: type: %11s, count: %9u\n", buf_name(buffer_type), count); + return count; +} diff --git a/driver/variant/iris3/src/msm_vidc_iris3.c b/driver/variant/iris3/src/msm_vidc_iris3.c new file mode 100644 index 0000000000..1ce11804b7 --- /dev/null +++ b/driver/variant/iris3/src/msm_vidc_iris3.c @@ -0,0 +1,1178 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. + * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include "msm_vidc_iris3.h" +#include "msm_vidc_buffer_iris3.h" +#include "msm_vidc_power_iris3.h" +#include "venus_hfi.h" +#include "msm_vidc_inst.h" +#include "msm_vidc_core.h" +#include "msm_vidc_driver.h" +#include "msm_vidc_control.h" +#include "msm_vidc_dt.h" +#include "msm_vidc_internal.h" +#include "msm_vidc_buffer.h" +#include "msm_vidc_debug.h" + +#define VIDEO_ARCH_LX 1 + +#define VCODEC_BASE_OFFS_IRIS3 0x00000000 +#define AON_MVP_NOC_RESET 0x0001F000 +#define CPU_BASE_OFFS_IRIS3 0x000A0000 +#define AON_BASE_OFFS 0x000E0000 +#define CPU_CS_BASE_OFFS_IRIS3 (CPU_BASE_OFFS_IRIS3) +#define CPU_IC_BASE_OFFS_IRIS3 (CPU_BASE_OFFS_IRIS3) + +#define CPU_CS_A2HSOFTINTCLR_IRIS3 (CPU_CS_BASE_OFFS_IRIS3 + 0x1C) +#define CPU_CS_VCICMD_IRIS3 (CPU_CS_BASE_OFFS_IRIS3 + 0x20) +#define CPU_CS_VCICMDARG0_IRIS3 (CPU_CS_BASE_OFFS_IRIS3 + 0x24) +#define CPU_CS_VCICMDARG1_IRIS3 (CPU_CS_BASE_OFFS_IRIS3 + 0x28) +#define CPU_CS_VCICMDARG2_IRIS3 (CPU_CS_BASE_OFFS_IRIS3 + 0x2C) +#define CPU_CS_VCICMDARG3_IRIS3 (CPU_CS_BASE_OFFS_IRIS3 + 0x30) +#define CPU_CS_VMIMSG_IRIS3 (CPU_CS_BASE_OFFS_IRIS3 + 0x34) +#define CPU_CS_VMIMSGAG0_IRIS3 (CPU_CS_BASE_OFFS_IRIS3 + 0x38) +#define CPU_CS_VMIMSGAG1_IRIS3 (CPU_CS_BASE_OFFS_IRIS3 + 0x3C) +#define CPU_CS_SCIACMD_IRIS3 (CPU_CS_BASE_OFFS_IRIS3 + 0x48) +#define CPU_CS_H2XSOFTINTEN_IRIS3 (CPU_CS_BASE_OFFS_IRIS3 + 0x148) + +/* HFI_CTRL_STATUS */ +#define CPU_CS_SCIACMDARG0_IRIS3 (CPU_CS_BASE_OFFS_IRIS3 + 0x4C) +#define CPU_CS_SCIACMDARG0_HFI_CTRL_ERROR_STATUS_BMSK_IRIS3 0xfe +#define CPU_CS_SCIACMDARG0_HFI_CTRL_PC_READY_IRIS3 0x100 +#define CPU_CS_SCIACMDARG0_HFI_CTRL_INIT_IDLE_MSG_BMSK_IRIS3 0x40000000 + +/* HFI_QTBL_INFO */ +#define CPU_CS_SCIACMDARG1_IRIS3 (CPU_CS_BASE_OFFS_IRIS3 + 0x50) + +/* HFI_QTBL_ADDR */ +#define CPU_CS_SCIACMDARG2_IRIS3 (CPU_CS_BASE_OFFS_IRIS3 + 0x54) + +/* HFI_VERSION_INFO */ +#define CPU_CS_SCIACMDARG3_IRIS3 (CPU_CS_BASE_OFFS_IRIS3 + 0x58) + +/* SFR_ADDR */ +#define CPU_CS_SCIBCMD_IRIS3 (CPU_CS_BASE_OFFS_IRIS3 + 0x5C) + +/* MMAP_ADDR */ +#define CPU_CS_SCIBCMDARG0_IRIS3 (CPU_CS_BASE_OFFS_IRIS3 + 0x60) + +/* UC_REGION_ADDR */ +#define CPU_CS_SCIBARG1_IRIS3 (CPU_CS_BASE_OFFS_IRIS3 + 0x64) + +/* UC_REGION_ADDR */ +#define CPU_CS_SCIBARG2_IRIS3 (CPU_CS_BASE_OFFS_IRIS3 + 0x68) + +#define CPU_CS_AHB_BRIDGE_SYNC_RESET (CPU_CS_BASE_OFFS_IRIS3 + 0x160) +#define CPU_CS_AHB_BRIDGE_SYNC_RESET_STATUS (CPU_CS_BASE_OFFS_IRIS3 + 0x164) + +/* FAL10 Feature Control */ +#define CPU_CS_X2RPMh_IRIS3 (CPU_CS_BASE_OFFS_IRIS3 + 0x168) +#define CPU_CS_X2RPMh_MASK0_BMSK_IRIS3 0x1 +#define CPU_CS_X2RPMh_MASK0_SHFT_IRIS3 0x0 +#define CPU_CS_X2RPMh_MASK1_BMSK_IRIS3 0x2 +#define CPU_CS_X2RPMh_MASK1_SHFT_IRIS3 0x1 +#define CPU_CS_X2RPMh_SWOVERRIDE_BMSK_IRIS3 0x4 +#define CPU_CS_X2RPMh_SWOVERRIDE_SHFT_IRIS3 0x3 + +#define CPU_IC_SOFTINT_IRIS3 (CPU_IC_BASE_OFFS_IRIS3 + 0x150) +#define CPU_IC_SOFTINT_H2A_SHFT_IRIS3 0x0 + +/* + * -------------------------------------------------------------------------- + * MODULE: AON_MVP_NOC_RESET_REGISTERS + * -------------------------------------------------------------------------- + */ +#define AON_WRAPPER_MVP_NOC_RESET_REQ (AON_MVP_NOC_RESET + 0x000) +#define AON_WRAPPER_MVP_NOC_RESET_ACK (AON_MVP_NOC_RESET + 0x004) + +/* + * -------------------------------------------------------------------------- + * MODULE: wrapper + * -------------------------------------------------------------------------- + */ +#define WRAPPER_BASE_OFFS_IRIS3 0x000B0000 +#define WRAPPER_INTR_STATUS_IRIS3 (WRAPPER_BASE_OFFS_IRIS3 + 0x0C) +#define WRAPPER_INTR_STATUS_A2HWD_BMSK_IRIS3 0x8 +#define WRAPPER_INTR_STATUS_A2H_BMSK_IRIS3 0x4 + +#define WRAPPER_INTR_MASK_IRIS3 (WRAPPER_BASE_OFFS_IRIS3 + 0x10) +#define WRAPPER_INTR_MASK_A2HWD_BMSK_IRIS3 0x8 +#define WRAPPER_INTR_MASK_A2HCPU_BMSK_IRIS3 0x4 + +#define WRAPPER_CPU_CLOCK_CONFIG_IRIS3 (WRAPPER_BASE_OFFS_IRIS3 + 0x2000) +#define WRAPPER_CPU_CGC_DIS_IRIS3 (WRAPPER_BASE_OFFS_IRIS3 + 0x2010) +#define WRAPPER_CPU_STATUS_IRIS3 (WRAPPER_BASE_OFFS_IRIS3 + 0x2014) + +#define WRAPPER_DEBUG_BRIDGE_LPI_CONTROL_IRIS3 (WRAPPER_BASE_OFFS_IRIS3 + 0x54) +#define WRAPPER_DEBUG_BRIDGE_LPI_STATUS_IRIS3 (WRAPPER_BASE_OFFS_IRIS3 + 0x58) +#define WRAPPER_CORE_CLOCK_CONFIG_IRIS3 (WRAPPER_BASE_OFFS_IRIS3 + 0x88) + +/* + * -------------------------------------------------------------------------- + * MODULE: tz_wrapper + * -------------------------------------------------------------------------- + */ +#define WRAPPER_TZ_BASE_OFFS 0x000C0000 +#define WRAPPER_TZ_CPU_CLOCK_CONFIG (WRAPPER_TZ_BASE_OFFS) +#define WRAPPER_TZ_CPU_STATUS (WRAPPER_TZ_BASE_OFFS + 0x10) + +#define CTRL_INIT_IRIS3 CPU_CS_SCIACMD_IRIS3 + +#define CTRL_STATUS_IRIS3 CPU_CS_SCIACMDARG0_IRIS3 +#define CTRL_ERROR_STATUS__M_IRIS3 \ + CPU_CS_SCIACMDARG0_HFI_CTRL_ERROR_STATUS_BMSK_IRIS3 +#define CTRL_INIT_IDLE_MSG_BMSK_IRIS3 \ + CPU_CS_SCIACMDARG0_HFI_CTRL_INIT_IDLE_MSG_BMSK_IRIS3 +#define CTRL_STATUS_PC_READY_IRIS3 \ + CPU_CS_SCIACMDARG0_HFI_CTRL_PC_READY_IRIS3 + + +#define QTBL_INFO_IRIS3 CPU_CS_SCIACMDARG1_IRIS3 + +#define QTBL_ADDR_IRIS3 CPU_CS_SCIACMDARG2_IRIS3 + +#define VERSION_INFO_IRIS3 CPU_CS_SCIACMDARG3_IRIS3 + +#define SFR_ADDR_IRIS3 CPU_CS_SCIBCMD_IRIS3 +#define MMAP_ADDR_IRIS3 CPU_CS_SCIBCMDARG0_IRIS3 +#define UC_REGION_ADDR_IRIS3 CPU_CS_SCIBARG1_IRIS3 +#define UC_REGION_SIZE_IRIS3 CPU_CS_SCIBARG2_IRIS3 + +#define AON_WRAPPER_MVP_NOC_LPI_CONTROL (AON_BASE_OFFS) +#define AON_WRAPPER_MVP_NOC_LPI_STATUS (AON_BASE_OFFS + 0x4) + +/* + * -------------------------------------------------------------------------- + * MODULE: VCODEC_SS registers + * -------------------------------------------------------------------------- + */ +#define VCODEC_SS_IDLE_STATUSn (VCODEC_BASE_OFFS_IRIS3 + 0x70) + +/* + * -------------------------------------------------------------------------- + * MODULE: vcodec noc error log registers (iris3) + * -------------------------------------------------------------------------- + */ +#define VCODEC_NOC_VIDEO_A_NOC_BASE_OFFS 0x00010000 +#define VCODEC_NOC_ERL_MAIN_SWID_LOW 0x00011200 +#define VCODEC_NOC_ERL_MAIN_SWID_HIGH 0x00011204 +#define VCODEC_NOC_ERL_MAIN_MAINCTL_LOW 0x00011208 +#define VCODEC_NOC_ERL_MAIN_ERRVLD_LOW 0x00011210 +#define VCODEC_NOC_ERL_MAIN_ERRCLR_LOW 0x00011218 +#define VCODEC_NOC_ERL_MAIN_ERRLOG0_LOW 0x00011220 +#define VCODEC_NOC_ERL_MAIN_ERRLOG0_HIGH 0x00011224 +#define VCODEC_NOC_ERL_MAIN_ERRLOG1_LOW 0x00011228 +#define VCODEC_NOC_ERL_MAIN_ERRLOG1_HIGH 0x0001122C +#define VCODEC_NOC_ERL_MAIN_ERRLOG2_LOW 0x00011230 +#define VCODEC_NOC_ERL_MAIN_ERRLOG2_HIGH 0x00011234 +#define VCODEC_NOC_ERL_MAIN_ERRLOG3_LOW 0x00011238 +#define VCODEC_NOC_ERL_MAIN_ERRLOG3_HIGH 0x0001123C + + +static int __disable_unprepare_clock_iris3(struct msm_vidc_core *core, + const char *clk_name) +{ + int rc = 0; + struct clock_info *cl; + bool found; + + if (!core || !clk_name) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + found = false; + venus_hfi_for_each_clock(core, cl) { + if (!cl->clk) { + d_vpr_e("%s: invalid clock %s\n", __func__, cl->name); + return -EINVAL; + } + if (strcmp(cl->name, clk_name)) + continue; + found = true; + clk_disable_unprepare(cl->clk); + if (cl->has_scaling) + __set_clk_rate(core, cl, 0); + cl->prev = 0; + d_vpr_h("%s: clock %s disable unprepared\n", __func__, cl->name); + break; + } + if (!found) { + d_vpr_e("%s: clock %s not found\n", __func__, clk_name); + return -EINVAL; + } + + return rc; +} + +static int __prepare_enable_clock_iris3(struct msm_vidc_core *core, + const char *clk_name) +{ + int rc = 0; + struct clock_info *cl; + bool found; + u64 rate = 0; + + if (!core || !clk_name) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + found = false; + venus_hfi_for_each_clock(core, cl) { + if (!cl->clk) { + d_vpr_e("%s: invalid clock\n", __func__); + return -EINVAL; + } + if (strcmp(cl->name, clk_name)) + continue; + found = true; + /* + * For the clocks we control, set the rate prior to preparing + * them. Since we don't really have a load at this point, scale + * it to the lowest frequency possible + */ + if (cl->has_scaling) { + rate = clk_round_rate(cl->clk, 0); + /** + * source clock is already multipled with scaling ratio and __set_clk_rate + * attempts to multiply again. So divide scaling ratio before calling + * __set_clk_rate. + */ + rate = rate / MSM_VIDC_CLOCK_SOURCE_SCALING_RATIO; + __set_clk_rate(core, cl, rate); + } + + rc = clk_prepare_enable(cl->clk); + if (rc) { + d_vpr_e("%s: failed to enable clock %s\n", + __func__, cl->name); + return rc; + } + if (!__clk_is_enabled(cl->clk)) { + d_vpr_e("%s: clock %s not enabled\n", + __func__, cl->name); + clk_disable_unprepare(cl->clk); + if (cl->has_scaling) + __set_clk_rate(core, cl, 0); + return -EINVAL; + } + d_vpr_h("%s: clock %s prepare enabled\n", __func__, cl->name); + break; + } + if (!found) { + d_vpr_e("%s: clock %s not found\n", __func__, clk_name); + return -EINVAL; + } + + return rc; +} + +static int __disable_regulator_iris3(struct msm_vidc_core *core, + const char *reg_name) +{ + int rc = 0; + struct regulator_info *rinfo; + bool found; + + if (!core || !reg_name) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + found = false; + venus_hfi_for_each_regulator(core, rinfo) { + if (!rinfo->regulator) { + d_vpr_e("%s: invalid regulator %s\n", + __func__, rinfo->name); + return -EINVAL; + } + if (strcmp(rinfo->name, reg_name)) + continue; + found = true; + + rc = __acquire_regulator(core, rinfo); + if (rc) { + d_vpr_e("%s: failed to acquire %s, rc = %d\n", + rinfo->name, rc); + /* Bring attention to this issue */ + WARN_ON(true); + return rc; + } + core->handoff_done = false; + + rc = regulator_disable(rinfo->regulator); + if (rc) { + d_vpr_e("%s: failed to disable %s, rc = %d\n", + rinfo->name, rc); + return rc; + } + d_vpr_h("%s: disabled regulator %s\n", __func__, rinfo->name); + break; + } + if (!found) { + d_vpr_e("%s: regulator %s not found\n", __func__, reg_name); + return -EINVAL; + } + + return rc; +} + +static int __enable_regulator_iris3(struct msm_vidc_core *core, + const char *reg_name) +{ + int rc = 0; + struct regulator_info *rinfo; + bool found; + + if (!core || !reg_name) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + found = false; + venus_hfi_for_each_regulator(core, rinfo) { + if (!rinfo->regulator) { + d_vpr_e("%s: invalid regulator %s\n", + __func__, rinfo->name); + return -EINVAL; + } + if (strcmp(rinfo->name, reg_name)) + continue; + found = true; + + rc = regulator_enable(rinfo->regulator); + if (rc) { + d_vpr_e("%s: failed to enable %s, rc = %d\n", + __func__, rinfo->name, rc); + return rc; + } + if (!regulator_is_enabled(rinfo->regulator)) { + d_vpr_e("%s: regulator %s not enabled\n", + __func__, rinfo->name); + regulator_disable(rinfo->regulator); + return -EINVAL; + } + d_vpr_h("%s: enabled regulator %s\n", __func__, rinfo->name); + break; + } + if (!found) { + d_vpr_e("%s: regulator %s not found\n", __func__, reg_name); + return -EINVAL; + } + + return rc; +} + +static int __interrupt_init_iris3(struct msm_vidc_core *vidc_core) +{ + struct msm_vidc_core *core = vidc_core; + u32 mask_val = 0; + int rc = 0; + + if (!core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + /* All interrupts should be disabled initially 0x1F6 : Reset value */ + rc = __read_register(core, WRAPPER_INTR_MASK_IRIS3, &mask_val); + if (rc) + return rc; + + /* Write 0 to unmask CPU and WD interrupts */ + mask_val &= ~(WRAPPER_INTR_MASK_A2HWD_BMSK_IRIS3| + WRAPPER_INTR_MASK_A2HCPU_BMSK_IRIS3); + rc = __write_register(core, WRAPPER_INTR_MASK_IRIS3, mask_val); + if (rc) + return rc; + + return 0; +} + +static int __setup_ucregion_memory_map_iris3(struct msm_vidc_core *vidc_core) +{ + struct msm_vidc_core *core = vidc_core; + u32 value; + int rc = 0; + + if (!core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + value = (u32)core->iface_q_table.align_device_addr; + rc = __write_register(core, UC_REGION_ADDR_IRIS3, value); + if (rc) + return rc; + + value = SHARED_QSIZE; + rc = __write_register(core, UC_REGION_SIZE_IRIS3, value); + if (rc) + return rc; + + value = (u32)core->iface_q_table.align_device_addr; + rc = __write_register(core, QTBL_ADDR_IRIS3, value); + if (rc) + return rc; + + rc = __write_register(core, QTBL_INFO_IRIS3, 0x01); + if (rc) + return rc; + + /* update queues vaddr for debug purpose */ + value = (u32)((u64)core->iface_q_table.align_virtual_addr); + rc = __write_register(core, CPU_CS_VCICMDARG0_IRIS3, value); + if (rc) + return rc; + + value = (u32)((u64)core->iface_q_table.align_virtual_addr >> 32); + rc = __write_register(core, CPU_CS_VCICMDARG1_IRIS3, value); + if (rc) + return rc; + + if (core->sfr.align_device_addr) { + value = (u32)core->sfr.align_device_addr + VIDEO_ARCH_LX; + rc = __write_register(core, SFR_ADDR_IRIS3, value); + if (rc) + return rc; + } + + return 0; +} + +static int __power_off_iris3_hardware(struct msm_vidc_core *core) +{ + int rc = 0, i; + u32 value = 0; + + if (core->hw_power_control) { + d_vpr_h("%s: hardware power control enabled\n", __func__); + goto disable_power; + } + + /* + * check to make sure core clock branch enabled else + * we cannot read vcodec top idle register + */ + rc = __read_register(core, WRAPPER_CORE_CLOCK_CONFIG_IRIS3, &value); + if (rc) + return rc; + + if (value) { + d_vpr_h("%s: core clock config not enabled, enabling it to read vcodec registers\n", + __func__); + rc = __write_register(core, WRAPPER_CORE_CLOCK_CONFIG_IRIS3, 0); + if (rc) + return rc; + } + + /* + * add MNoC idle check before collapsing MVS0 per HPG update + * poll for NoC DMA idle -> HPG 6.1.1 + */ + for (i = 0; i < core->capabilities[NUM_VPP_PIPE].value; i++) { + rc = __read_register_with_poll_timeout(core, VCODEC_SS_IDLE_STATUSn + 4*i, + 0x400000, 0x400000, 2000, 20000); + if (rc) + d_vpr_h("%s: VCODEC_SS_IDLE_STATUSn (%d) is not idle (%#x)\n", + __func__, i, value); + } + + /* Apply partial reset on MSF interface and wait for ACK */ + rc = __write_register(core, AON_WRAPPER_MVP_NOC_RESET_REQ, 0x3); + if (rc) + return rc; + + rc = __read_register_with_poll_timeout(core, AON_WRAPPER_MVP_NOC_RESET_ACK, + 0x3, 0x3, 200, 2000); + if (rc) + d_vpr_h("%s: AON_WRAPPER_MVP_NOC_RESET assert failed\n", __func__); + + /* De-assert partial reset on MSF interface and wait for ACK */ + rc = __write_register(core, AON_WRAPPER_MVP_NOC_RESET_REQ, 0x0); + if (rc) + return rc; + + rc = __read_register_with_poll_timeout(core, AON_WRAPPER_MVP_NOC_RESET_ACK, + 0x3, 0x0, 200, 2000); + if (rc) + d_vpr_h("%s: AON_WRAPPER_MVP_NOC_RESET de-assert failed\n", __func__); + + /* + * Reset both sides of 2 ahb2ahb_bridges (TZ and non-TZ) + * do we need to check status register here? + */ + rc = __write_register(core, CPU_CS_AHB_BRIDGE_SYNC_RESET, 0x3); + if (rc) + return rc; + rc = __write_register(core, CPU_CS_AHB_BRIDGE_SYNC_RESET, 0x2); + if (rc) + return rc; + rc = __write_register(core, CPU_CS_AHB_BRIDGE_SYNC_RESET, 0x0); + if (rc) + return rc; + +disable_power: + /* power down process */ + rc = __disable_regulator_iris3(core, "vcodec"); + if (rc) { + d_vpr_e("%s: disable regulator vcodec failed\n", __func__); + rc = 0; + } + rc = __disable_unprepare_clock_iris3(core, "vcodec_clk"); + if (rc) { + d_vpr_e("%s: disable unprepare vcodec_clk failed\n", __func__); + rc = 0; + } + + return rc; +} + +static int __power_off_iris3_controller(struct msm_vidc_core *core) +{ + int rc = 0; + + /* + * mask fal10_veto QLPAC error since fal10_veto can go 1 + * when pwwait == 0 and clamped to 0 -> HPG 6.1.2 + */ + rc = __write_register(core, CPU_CS_X2RPMh_IRIS3, 0x3); + if (rc) + return rc; + + /* set MNoC to low power, set PD_NOC_QREQ (bit 0) */ + rc = __write_register_masked(core, AON_WRAPPER_MVP_NOC_LPI_CONTROL, + 0x1, BIT(0)); + if (rc) + return rc; + + rc = __read_register_with_poll_timeout(core, AON_WRAPPER_MVP_NOC_LPI_STATUS, + 0x1, 0x1, 200, 2000); + if (rc) + d_vpr_h("%s: AON_WRAPPER_MVP_NOC_LPI_CONTROL failed\n", __func__); + + /* Set Debug bridge Low power */ + rc = __write_register(core, WRAPPER_DEBUG_BRIDGE_LPI_CONTROL_IRIS3, 0x7); + if (rc) + return rc; + + rc = __read_register_with_poll_timeout(core, WRAPPER_DEBUG_BRIDGE_LPI_STATUS_IRIS3, + 0x7, 0x7, 200, 2000); + if (rc) + d_vpr_h("%s: debug bridge low power failed\n", __func__); + + /* Debug bridge LPI release */ + rc = __write_register(core, WRAPPER_DEBUG_BRIDGE_LPI_CONTROL_IRIS3, 0x0); + if (rc) + return rc; + + rc = __read_register_with_poll_timeout(core, WRAPPER_DEBUG_BRIDGE_LPI_STATUS_IRIS3, + 0xffffffff, 0x0, 200, 2000); + if (rc) + d_vpr_h("%s: debug bridge release failed\n", __func__); + + /* power down process */ + rc = __disable_regulator_iris3(core, "iris-ctl"); + if (rc) { + d_vpr_e("%s: disable regulator iris-ctl failed\n", __func__); + rc = 0; + } + + /* Disable GCC_VIDEO_AXI0_CLK clock */ + rc = __disable_unprepare_clock_iris3(core, "gcc_video_axi0"); + if (rc) { + d_vpr_e("%s: disable unprepare gcc_video_axi0 failed\n", __func__); + rc = 0; + } + + /* Turn off MVP MVS0C core clock */ + rc = __disable_unprepare_clock_iris3(core, "core_clk"); + if (rc) { + d_vpr_e("%s: disable unprepare core_clk failed\n", __func__); + rc = 0; + } + + /* Turn off MVP MVS0 SRC clock */ + rc = __disable_unprepare_clock_iris3(core, "video_cc_mvs0_clk_src"); + if (rc) { + d_vpr_e("%s: disable unprepare video_cc_mvs0_clk_src failed\n", __func__); + rc = 0; + } + + return rc; +} + +static int __power_off_iris3(struct msm_vidc_core *core) +{ + int rc = 0; + + if (!core || !core->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (!core->power_enabled) + return 0; + + if (__power_off_iris3_hardware(core)) + d_vpr_e("%s: failed to power off hardware\n", __func__); + + if (__power_off_iris3_controller(core)) + d_vpr_e("%s: failed to power off controller\n", __func__); + + if (__unvote_buses(core)) + d_vpr_e("%s: failed to unvote buses\n", __func__); + + if (!(core->intr_status & WRAPPER_INTR_STATUS_A2HWD_BMSK_IRIS3)) + disable_irq_nosync(core->dt->irq); + core->intr_status = 0; + + core->power_enabled = false; + + return rc; +} + +static int __power_on_iris3_controller(struct msm_vidc_core *core) +{ + int rc = 0; + + rc = __enable_regulator_iris3(core, "iris-ctl"); + if (rc) + goto fail_regulator; + + rc = call_venus_op(core, reset_ahb2axi_bridge, core); + if (rc) + goto fail_reset_ahb2axi; + + rc = __prepare_enable_clock_iris3(core, "gcc_video_axi0"); + if (rc) + goto fail_clk_axi; + + rc = __prepare_enable_clock_iris3(core, "core_clk"); + if (rc) + goto fail_clk_controller; + + rc = __prepare_enable_clock_iris3(core, "video_cc_mvs0_clk_src"); + if (rc) + goto fail_clk_src; + + return 0; + +fail_clk_src: + __disable_unprepare_clock_iris3(core, "core_clk"); +fail_clk_controller: + __disable_unprepare_clock_iris3(core, "gcc_video_axi0"); +fail_clk_axi: +fail_reset_ahb2axi: + __disable_regulator_iris3(core, "iris-ctl"); +fail_regulator: + return rc; +} + +static int __power_on_iris3_hardware(struct msm_vidc_core *core) +{ + int rc = 0; + + rc = __enable_regulator_iris3(core, "vcodec"); + if (rc) + goto fail_regulator; + + rc = __prepare_enable_clock_iris3(core, "vcodec_clk"); + if (rc) + goto fail_clk_controller; + + return 0; + +fail_clk_controller: + __disable_regulator_iris3(core, "vcodec"); +fail_regulator: + return rc; +} + +static int __power_on_iris3(struct msm_vidc_core *core) +{ + int rc = 0; + + if (core->power_enabled) + return 0; + + /* Vote for all hardware resources */ + rc = __vote_buses(core, INT_MAX, INT_MAX); + if (rc) { + d_vpr_e("%s: failed to vote buses, rc %d\n", __func__, rc); + goto fail_vote_buses; + } + + rc = __power_on_iris3_controller(core); + if (rc) { + d_vpr_e("%s: failed to power on iris3 controller\n", __func__); + goto fail_power_on_controller; + } + + rc = __power_on_iris3_hardware(core); + if (rc) { + d_vpr_e("%s: failed to power on iris3 hardware\n", __func__); + goto fail_power_on_hardware; + } + /* video controller and hardware powered on successfully */ + core->power_enabled = true; + + rc = __scale_clocks(core); + if (rc) { + d_vpr_e("%s: failed to scale clocks\n", __func__); + rc = 0; + } + /* + * Re-program all of the registers that get reset as a result of + * regulator_disable() and _enable() + */ + __set_registers(core); + + call_venus_op(core, interrupt_init, core); + core->intr_status = 0; + enable_irq(core->dt->irq); + + return rc; + +fail_power_on_hardware: + __power_off_iris3_controller(core); +fail_power_on_controller: + __unvote_buses(core); +fail_vote_buses: + core->power_enabled = false; + return rc; +} + +static int __prepare_pc_iris3(struct msm_vidc_core *vidc_core) +{ + int rc = 0; + u32 wfi_status = 0, idle_status = 0, pc_ready = 0; + u32 ctrl_status = 0; + struct msm_vidc_core *core = vidc_core; + + if (!core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + rc = __read_register(core, CTRL_STATUS_IRIS3, &ctrl_status); + if (rc) + return rc; + + pc_ready = ctrl_status & CTRL_STATUS_PC_READY_IRIS3; + idle_status = ctrl_status & BIT(30); + + if (pc_ready) { + d_vpr_h("Already in pc_ready state\n"); + return 0; + } + rc = __read_register(core, WRAPPER_TZ_CPU_STATUS, &wfi_status); + if (rc) + return rc; + + wfi_status &= BIT(0); + if (!wfi_status || !idle_status) { + d_vpr_e("Skipping PC, wfi status not set\n"); + goto skip_power_off; + } + + rc = __prepare_pc(core); + if (rc) { + d_vpr_e("Failed __prepare_pc %d\n", rc); + goto skip_power_off; + } + + rc = __read_register_with_poll_timeout(core, CTRL_STATUS_IRIS3, + CTRL_STATUS_PC_READY_IRIS3, CTRL_STATUS_PC_READY_IRIS3, 250, 2500); + if (rc) { + d_vpr_e("%s: Skip PC. Ctrl status not set\n", __func__); + goto skip_power_off; + } + + rc = __read_register_with_poll_timeout(core, WRAPPER_TZ_CPU_STATUS, + BIT(0), 0x1, 250, 2500); + if (rc) { + d_vpr_e("%s: Skip PC. Wfi status not set\n", __func__); + goto skip_power_off; + } + return rc; + +skip_power_off: + rc = __read_register(core, CTRL_STATUS_IRIS3, &ctrl_status); + if (rc) + return rc; + rc = __read_register(core, WRAPPER_TZ_CPU_STATUS, &wfi_status); + if (rc) + return rc; + wfi_status &= BIT(0); + d_vpr_e("Skip PC, wfi=%#x, idle=%#x, pcr=%#x, ctrl=%#x)\n", + wfi_status, idle_status, pc_ready, ctrl_status); + return -EAGAIN; +} + +static int __raise_interrupt_iris3(struct msm_vidc_core *vidc_core) +{ + struct msm_vidc_core *core = vidc_core; + int rc = 0; + + if (!core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + rc = __write_register(core, CPU_IC_SOFTINT_IRIS3, 1 << CPU_IC_SOFTINT_H2A_SHFT_IRIS3); + if (rc) + return rc; + + return 0; +} + +static int __watchdog_iris3(struct msm_vidc_core *vidc_core, u32 intr_status) +{ + int rc = 0; + struct msm_vidc_core *core = vidc_core; + + if (!core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (intr_status & WRAPPER_INTR_STATUS_A2HWD_BMSK_IRIS3) { + d_vpr_e("%s: received watchdog interrupt\n", __func__); + rc = 1; + } + + return rc; +} + +static int __noc_error_info_iris3(struct msm_vidc_core *vidc_core) +{ + struct msm_vidc_core *core = vidc_core; + + if (!core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + /* + * we are not supposed to access vcodec subsystem registers + * unless vcodec core clock WRAPPER_CORE_CLOCK_CONFIG_IRIS3 is enabled. + * core clock might have been disabled by video firmware as part of + * inter frame power collapse (power plane control feature). + */ + + /* + val = __read_register(core, VCODEC_NOC_ERL_MAIN_SWID_LOW); + d_vpr_e("VCODEC_NOC_ERL_MAIN_SWID_LOW: %#x\n", val); + val = __read_register(core, VCODEC_NOC_ERL_MAIN_SWID_HIGH); + d_vpr_e("VCODEC_NOC_ERL_MAIN_SWID_HIGH: %#x\n", val); + val = __read_register(core, VCODEC_NOC_ERL_MAIN_MAINCTL_LOW); + d_vpr_e("VCODEC_NOC_ERL_MAIN_MAINCTL_LOW: %#x\n", val); + val = __read_register(core, VCODEC_NOC_ERL_MAIN_ERRVLD_LOW); + d_vpr_e("VCODEC_NOC_ERL_MAIN_ERRVLD_LOW: %#x\n", val); + val = __read_register(core, VCODEC_NOC_ERL_MAIN_ERRCLR_LOW); + d_vpr_e("VCODEC_NOC_ERL_MAIN_ERRCLR_LOW: %#x\n", val); + val = __read_register(core, VCODEC_NOC_ERL_MAIN_ERRLOG0_LOW); + d_vpr_e("VCODEC_NOC_ERL_MAIN_ERRLOG0_LOW: %#x\n", val); + val = __read_register(core, VCODEC_NOC_ERL_MAIN_ERRLOG0_HIGH); + d_vpr_e("VCODEC_NOC_ERL_MAIN_ERRLOG0_HIGH: %#x\n", val); + val = __read_register(core, VCODEC_NOC_ERL_MAIN_ERRLOG1_LOW); + d_vpr_e("VCODEC_NOC_ERL_MAIN_ERRLOG1_LOW: %#x\n", val); + val = __read_register(core, VCODEC_NOC_ERL_MAIN_ERRLOG1_HIGH); + d_vpr_e("VCODEC_NOC_ERL_MAIN_ERRLOG1_HIGH: %#x\n", val); + val = __read_register(core, VCODEC_NOC_ERL_MAIN_ERRLOG2_LOW); + d_vpr_e("VCODEC_NOC_ERL_MAIN_ERRLOG2_LOW: %#x\n", val); + val = __read_register(core, VCODEC_NOC_ERL_MAIN_ERRLOG2_HIGH); + d_vpr_e("VCODEC_NOC_ERL_MAIN_ERRLOG2_HIGH: %#x\n", val); + val = __read_register(core, VCODEC_NOC_ERL_MAIN_ERRLOG3_LOW); + d_vpr_e("VCODEC_NOC_ERL_MAIN_ERRLOG3_LOW: %#x\n", val); + val = __read_register(core, VCODEC_NOC_ERL_MAIN_ERRLOG3_HIGH); + d_vpr_e("VCODEC_NOC_ERL_MAIN_ERRLOG3_HIGH: %#x\n", val); + */ + + return 0; +} + +static int __clear_interrupt_iris3(struct msm_vidc_core *vidc_core) +{ + struct msm_vidc_core *core = vidc_core; + u32 intr_status = 0, mask = 0; + int rc = 0; + + if (!core) { + d_vpr_e("%s: NULL core\n", __func__); + return 0; + } + + rc = __read_register(core, WRAPPER_INTR_STATUS_IRIS3, &intr_status); + if (rc) + return rc; + + mask = (WRAPPER_INTR_STATUS_A2H_BMSK_IRIS3| + WRAPPER_INTR_STATUS_A2HWD_BMSK_IRIS3| + CTRL_INIT_IDLE_MSG_BMSK_IRIS3); + + if (intr_status & mask) { + core->intr_status |= intr_status; + core->reg_count++; + d_vpr_l("INTERRUPT: times: %d interrupt_status: %d\n", + core->reg_count, intr_status); + } else { + core->spur_count++; + } + + rc = __write_register(core, CPU_CS_A2HSOFTINTCLR_IRIS3, 1); + if (rc) + return rc; + + return 0; +} + +static int __boot_firmware_iris3(struct msm_vidc_core *vidc_core) +{ + int rc = 0; + u32 ctrl_init_val = 0, ctrl_status = 0, count = 0, max_tries = 1000; + struct msm_vidc_core *core = vidc_core; + + if (!core) { + d_vpr_e("%s: NULL core\n", __func__); + return 0; + } + + ctrl_init_val = BIT(0); + + rc = __write_register(core, CTRL_INIT_IRIS3, ctrl_init_val); + if (rc) + return rc; + + while (!ctrl_status && count < max_tries) { + rc = __read_register(core, CTRL_STATUS_IRIS3, &ctrl_status); + if (rc) + return rc; + + if ((ctrl_status & CTRL_ERROR_STATUS__M_IRIS3) == 0x4) { + d_vpr_e("invalid setting for UC_REGION\n"); + break; + } + + usleep_range(50, 100); + count++; + } + + if (count >= max_tries) { + d_vpr_e("Error booting up vidc firmware\n"); + return -ETIME; + } + + /* Enable interrupt before sending commands to venus */ + rc = __write_register(core, CPU_CS_H2XSOFTINTEN_IRIS3, 0x1); + if (rc) + return rc; + + rc = __write_register(core, CPU_CS_X2RPMh_IRIS3, 0x0); + if (rc) + return rc; + + return rc; +} + +int msm_vidc_decide_work_mode_iris3(struct msm_vidc_inst* inst) +{ + u32 work_mode; + struct v4l2_format *inp_f; + u32 width, height; + bool res_ok = false; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + work_mode = MSM_VIDC_STAGE_2; + inp_f = &inst->fmts[INPUT_PORT]; + + if (is_image_decode_session(inst)) + work_mode = MSM_VIDC_STAGE_1; + + if (is_image_session(inst)) + goto exit; + + if (is_decode_session(inst)) { + height = inp_f->fmt.pix_mp.height; + width = inp_f->fmt.pix_mp.width; + res_ok = res_is_less_than(width, height, 1280, 720); + if (inst->capabilities->cap[CODED_FRAMES].value == + CODED_FRAMES_INTERLACE || + inst->capabilities->cap[LOWLATENCY_MODE].value || + res_ok) { + work_mode = MSM_VIDC_STAGE_1; + } + } else if (is_encode_session(inst)) { + height = inst->crop.height; + width = inst->crop.width; + res_ok = !res_is_greater_than(width, height, 4096, 2160); + if (res_ok && + (inst->capabilities->cap[LOWLATENCY_MODE].value)) { + work_mode = MSM_VIDC_STAGE_1; + } + if (inst->capabilities->cap[LOSSLESS].value) + work_mode = MSM_VIDC_STAGE_2; + + if (!inst->capabilities->cap[GOP_SIZE].value) + work_mode = MSM_VIDC_STAGE_2; + } else { + i_vpr_e(inst, "%s: invalid session type\n", __func__); + return -EINVAL; + } + +exit: + i_vpr_h(inst, "Configuring work mode = %u low latency = %u, gop size = %u\n", + work_mode, inst->capabilities->cap[LOWLATENCY_MODE].value, + inst->capabilities->cap[GOP_SIZE].value); + msm_vidc_update_cap_value(inst, STAGE, work_mode, __func__); + + return 0; +} + +int msm_vidc_decide_work_route_iris3(struct msm_vidc_inst* inst) +{ + u32 work_route; + struct msm_vidc_core* core; + + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + core = inst->core; + work_route = core->capabilities[NUM_VPP_PIPE].value; + + if (is_image_session(inst)) + goto exit; + + if (is_decode_session(inst)) { + if (inst->capabilities->cap[CODED_FRAMES].value == + CODED_FRAMES_INTERLACE) + work_route = MSM_VIDC_PIPE_1; + } else if (is_encode_session(inst)) { + u32 slice_mode, width, height; + struct v4l2_format* f; + + f = &inst->fmts[INPUT_PORT]; + height = f->fmt.pix_mp.height; + width = f->fmt.pix_mp.width; + slice_mode = inst->capabilities->cap[SLICE_MODE].value; + + /*TODO Pipe=1 for legacy CBR*/ + if (slice_mode == V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_BYTES) + work_route = MSM_VIDC_PIPE_1; + + } else { + i_vpr_e(inst, "%s: invalid session type\n", __func__); + return -EINVAL; + } + +exit: + i_vpr_h(inst, "Configuring work route = %u", work_route); + msm_vidc_update_cap_value(inst, PIPE, work_route, __func__); + + return 0; +} + +int msm_vidc_decide_quality_mode_iris3(struct msm_vidc_inst* inst) +{ + struct msm_vidc_inst_capability* capability = NULL; + struct msm_vidc_core *core; + u32 mbpf, mbps, max_hq_mbpf, max_hq_mbps; + u32 mode = MSM_VIDC_POWER_SAVE_MODE; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + capability = inst->capabilities; + + if (!is_encode_session(inst)) + return 0; + + /* image session always runs at quality mode */ + if (is_image_session(inst)) { + mode = MSM_VIDC_MAX_QUALITY_MODE; + goto exit; + } + + mbpf = msm_vidc_get_mbs_per_frame(inst); + mbps = mbpf * msm_vidc_get_fps(inst); + core = inst->core; + max_hq_mbpf = core->capabilities[MAX_MBPF_HQ].value;; + max_hq_mbps = core->capabilities[MAX_MBPS_HQ].value;; + + /* NRT session to have max quality unless client configures least complexity */ + if (!is_realtime_session(inst) && mbpf <= max_hq_mbpf) { + mode = MSM_VIDC_MAX_QUALITY_MODE; + if (!capability->cap[COMPLEXITY].value) + mode = MSM_VIDC_POWER_SAVE_MODE; + goto exit; + } + + /* Power saving always disabled for CQ and LOSSLESS RC modes. */ + if (capability->cap[LOSSLESS].value || + (mbpf <= max_hq_mbpf && mbps <= max_hq_mbps)) + mode = MSM_VIDC_MAX_QUALITY_MODE; + +exit: + msm_vidc_update_cap_value(inst, QUALITY_MODE, mode, __func__); + + return 0; +} + +static struct msm_vidc_venus_ops iris3_ops = { + .boot_firmware = __boot_firmware_iris3, + .interrupt_init = __interrupt_init_iris3, + .raise_interrupt = __raise_interrupt_iris3, + .clear_interrupt = __clear_interrupt_iris3, + .setup_ucregion_memmap = __setup_ucregion_memory_map_iris3, + .clock_config_on_enable = NULL, + .reset_ahb2axi_bridge = __reset_ahb2axi_bridge, + .power_on = __power_on_iris3, + .power_off = __power_off_iris3, + .prepare_pc = __prepare_pc_iris3, + .watchdog = __watchdog_iris3, + .noc_error_info = __noc_error_info_iris3, +}; + +static struct msm_vidc_session_ops msm_session_ops = { + .buffer_size = msm_buffer_size_iris3, + .min_count = msm_buffer_min_count_iris3, + .extra_count = msm_buffer_extra_count_iris3, + .calc_freq = msm_vidc_calc_freq_iris3, + .calc_bw = msm_vidc_calc_bw_iris3, + .decide_work_route = msm_vidc_decide_work_route_iris3, + .decide_work_mode = msm_vidc_decide_work_mode_iris3, + .decide_quality_mode = msm_vidc_decide_quality_mode_iris3, +}; + +int msm_vidc_init_iris3(struct msm_vidc_core *core) +{ + if (!core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + d_vpr_h("%s()\n", __func__); + core->venus_ops = &iris3_ops; + core->session_ops = &msm_session_ops; + + return 0; +} + +int msm_vidc_deinit_iris3(struct msm_vidc_core *core) +{ + /* do nothing */ + return 0; +} diff --git a/driver/variant/iris3/src/msm_vidc_power_iris3.c b/driver/variant/iris3/src/msm_vidc_power_iris3.c new file mode 100644 index 0000000000..2fee9eaaae --- /dev/null +++ b/driver/variant/iris3/src/msm_vidc_power_iris3.c @@ -0,0 +1,739 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. + * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include "msm_vidc_power_iris3.h" +#include "msm_vidc_inst.h" +#include "msm_vidc_core.h" +#include "msm_vidc_driver.h" +#include "msm_vidc_debug.h" +#include "msm_vidc_dt.h" + +u64 msm_vidc_calc_freq_iris3(struct msm_vidc_inst *inst, u32 data_size) +{ + u64 freq = 0; + struct msm_vidc_core* core; + struct msm_vidc_power* power; + u64 vsp_cycles = 0, vpp_cycles = 0, fw_cycles = 0; + u64 fw_vpp_cycles = 0, bitrate = 0; + u32 vpp_cycles_per_mb; + u32 mbs_per_second; + u32 operating_rate, vsp_factor_num = 1, vsp_factor_den = 1; + u32 base_cycles = 0; + u32 fps; + u32 prio_val; + u32 buf_timetamps_fps, mbpf; + + if (!inst || !inst->core || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return freq; + } + + power = &inst->power; + core = inst->core; + if (!core->dt) { + d_vpr_e("%s: invalid params\n", __func__); + return freq; + } + + if (!is_realtime_session(inst)) { + prio_val = inst->capabilities->cap[PRIORITY].value; + if (!prio_val || prio_val > core->dt->allowed_clks_tbl_size) + prio_val = core->dt->allowed_clks_tbl_size; + + return core->dt->allowed_clks_tbl[prio_val-1].clock_rate; + } + + mbpf = msm_vidc_get_mbs_per_frame(inst); + fps = msm_vidc_get_fps(inst); + + buf_timetamps_fps = msm_vidc_calc_window_avg_framerate(inst); + + /* + * when buffer detected fps is more than client set value by 10%, + * utilize buffer detected fps to scale clock. + */ + if (div_u64(fps * 11, 10) < buf_timetamps_fps) { + fps = buf_timetamps_fps; + inst->priority_level = MSM_VIDC_PRIORITY_LOW; + } + + mbs_per_second = mbpf * fps; + + /* + * Calculate vpp, vsp, fw cycles separately for encoder and decoder. + * Even though, most part is common now, in future it may change + * between them. + */ + fw_cycles = fps * inst->capabilities->cap[MB_CYCLES_FW].value; + fw_vpp_cycles = fps * inst->capabilities->cap[MB_CYCLES_FW_VPP].value; + + if (inst->domain == MSM_VIDC_ENCODER) { + vpp_cycles_per_mb = is_low_power_session(inst) ? + inst->capabilities->cap[MB_CYCLES_LP].value : + inst->capabilities->cap[MB_CYCLES_VPP].value; + + vpp_cycles = mbs_per_second * vpp_cycles_per_mb / + inst->capabilities->cap[PIPE].value; + + /* Factor 1.25 for IbP and 1.375 for I1B2b1P GOP structure */ + if (inst->capabilities->cap[B_FRAME].value > 1) + vpp_cycles += (vpp_cycles / 4) + (vpp_cycles / 8); + else if (inst->capabilities->cap[B_FRAME].value) + vpp_cycles += vpp_cycles / 4; + /* 21 / 20 is minimum overhead factor */ + vpp_cycles += max(div_u64(vpp_cycles, 20), fw_vpp_cycles); + /* 1.01 is multi-pipe overhead */ + if (inst->capabilities->cap[PIPE].value > 1) + vpp_cycles += div_u64(vpp_cycles, 100); + /* + * 1080p@480fps usecase needs exactly 338MHz + * without any margin left. Hence, adding 2 percent + * extra to bump it to next level (366MHz). + */ + if (fps == 480) + vpp_cycles += div_u64(vpp_cycles * 2, 100); + + /* + * Add 5 percent extra for 720p@960fps use case + * to bump it to next level (366MHz). + */ + if (fps == 960) + vpp_cycles += div_u64(vpp_cycles * 5, 100); + + /* VSP */ + /* bitrate is based on fps, scale it using operating rate */ + operating_rate = inst->capabilities->cap[OPERATING_RATE].value >> 16; + if (operating_rate > + (inst->capabilities->cap[FRAME_RATE].value >> 16) && + (inst->capabilities->cap[FRAME_RATE].value >> 16)) { + vsp_factor_num = operating_rate; + vsp_factor_den = inst->capabilities->cap[FRAME_RATE].value >> 16; + } + vsp_cycles = div_u64(((u64)inst->capabilities->cap[BIT_RATE].value * + vsp_factor_num), vsp_factor_den); + + base_cycles = inst->capabilities->cap[MB_CYCLES_VSP].value; + if (inst->codec == MSM_VIDC_VP9) { + vsp_cycles = div_u64(vsp_cycles * 170, 100); + } else if (inst->capabilities->cap[ENTROPY_MODE].value == + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC) { + vsp_cycles = div_u64(vsp_cycles * 135, 100); + } else { + base_cycles = 0; + vsp_cycles = div_u64(vsp_cycles, 2); + } + /* VSP FW Overhead 1.05 */ + vsp_cycles = div_u64(vsp_cycles * 21, 20); + + if (inst->capabilities->cap[STAGE].value == MSM_VIDC_STAGE_1) + vsp_cycles = vsp_cycles * 3; + + vsp_cycles += mbs_per_second * base_cycles; + + } else if (inst->domain == MSM_VIDC_DECODER) { + /* VPP */ + vpp_cycles = mbs_per_second * inst->capabilities->cap[MB_CYCLES_VPP].value / + inst->capabilities->cap[PIPE].value; + /* 21 / 20 is minimum overhead factor */ + vpp_cycles += max(vpp_cycles / 20, fw_vpp_cycles); + /* 1.059 is multi-pipe overhead */ + if (inst->capabilities->cap[PIPE].value > 1) + vpp_cycles += div_u64(vpp_cycles * 59, 1000); + + /* VSP */ + base_cycles = inst->has_bframe ? + 80 : inst->capabilities->cap[MB_CYCLES_VSP].value; + bitrate = fps * data_size * 8; + vsp_cycles = bitrate; + + if (inst->codec == MSM_VIDC_VP9) { + vsp_cycles = div_u64(vsp_cycles * 170, 100); + } else if (inst->capabilities->cap[ENTROPY_MODE].value == + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC) { + vsp_cycles = div_u64(vsp_cycles * 135, 100); + } else { + base_cycles = 0; + vsp_cycles = div_u64(vsp_cycles, 2); + } + /* VSP FW overhead 1.05 */ + vsp_cycles = div_u64(vsp_cycles * 21, 20); + + if (inst->capabilities->cap[STAGE].value == MSM_VIDC_STAGE_1) + vsp_cycles = vsp_cycles * 3; + + vsp_cycles += mbs_per_second * base_cycles; + + /* Add 25 percent extra for 960fps use case */ + if (fps >= MAXIMUM_FPS) + vsp_cycles += div_u64(vpp_cycles * 25, 100); + + if (inst->codec == MSM_VIDC_VP9 && + inst->capabilities->cap[STAGE].value == + MSM_VIDC_STAGE_2 && + inst->capabilities->cap[PIPE].value == 4 && + bitrate > 90000000) + vsp_cycles = msm_vidc_max_freq(inst); + } else { + i_vpr_e(inst, "%s: Unknown session type\n", __func__); + return msm_vidc_max_freq(inst); + } + + freq = max(vpp_cycles, vsp_cycles); + freq = max(freq, fw_cycles); + + i_vpr_p(inst, "%s: filled len %d, required freq %llu, fps %u, mbpf %u\n", + __func__, data_size, freq, fps, mbpf); + + return freq; +} + +static u64 __calculate_decoder(struct vidc_bus_vote_data *d) +{ + /* + * XXX: Don't fool around with any of the hardcoded numbers unless you + * know /exactly/ what you're doing. Many of these numbers are + * measured heuristics and hardcoded numbers taken from the firmware. + */ + /* Decoder parameters */ + int width, height, lcu_size, fps, dpb_bpp; + bool unified_dpb_opb, dpb_compression_enabled = true, + opb_compression_enabled = false, + llc_ref_read_l2_cache_enabled = false, + llc_top_line_buf_enabled = false; + fp_t dpb_read_compression_factor, dpb_opb_scaling_ratio, + dpb_write_compression_factor, opb_write_compression_factor, + qsmmu_bw_overhead_factor; + bool is_h264_category = true; + + /* Derived parameters */ + int lcu_per_frame, collocated_bytes_per_lcu, tnbr_per_lcu; + unsigned long bitrate; + unsigned int num_vpp_pipes; + + fp_t bins_to_bit_factor, vsp_read_factor, vsp_write_factor, + dpb_factor, dpb_write_factor, y_bw_no_ubwc_8bpp; + fp_t y_bw_no_ubwc_10bpp = 0, y_bw_10bpp_p010 = 0, + motion_vector_complexity = 0; + fp_t dpb_total = 0; + + /* Output parameters */ + struct { + fp_t vsp_read, vsp_write, collocated_read, collocated_write, + dpb_read, dpb_write, opb_read, opb_write, + line_buffer_read, line_buffer_write, + total; + } ddr = {0}; + + struct { + fp_t dpb_read, line_buffer_read, line_buffer_write, total; + } llc = {0}; + + unsigned long ret = 0; + unsigned int integer_part, frac_part; + + width = max(d->input_width, BASELINE_DIMENSIONS.width); + height = max(d->input_height, BASELINE_DIMENSIONS.height); + + fps = d->fps; + + lcu_size = d->lcu_size; + + dpb_bpp = __bpp(d->color_formats[0]); + + unified_dpb_opb = d->num_formats == 1; + + dpb_opb_scaling_ratio = fp_div(FP_INT(d->input_width * d->input_height), + FP_INT(d->output_width * d->output_height)); + + opb_compression_enabled = d->num_formats >= 2 && + __ubwc(d->color_formats[1]); + + integer_part = Q16_INT(d->compression_ratio); + frac_part = Q16_FRAC(d->compression_ratio); + dpb_read_compression_factor = FP(integer_part, frac_part, 100); + + integer_part = Q16_INT(d->complexity_factor); + frac_part = Q16_FRAC(d->complexity_factor); + motion_vector_complexity = FP(integer_part, frac_part, 100); + + dpb_write_compression_factor = dpb_read_compression_factor; + opb_write_compression_factor = opb_compression_enabled ? + dpb_write_compression_factor : FP_ONE; + + num_vpp_pipes = d->num_vpp_pipes; + + if (d->codec == MSM_VIDC_HEVC || + d->codec == MSM_VIDC_HEIC || + d->codec == MSM_VIDC_VP9) { + /* H264, VP8, MPEG2 use the same settings */ + /* HEVC, VP9 use the same setting */ + is_h264_category = false; + } + if (d->use_sys_cache) { + llc_ref_read_l2_cache_enabled = true; + if (is_h264_category) + llc_top_line_buf_enabled = true; + } + + /* Derived parameters setup */ + lcu_per_frame = DIV_ROUND_UP(width, lcu_size) * + DIV_ROUND_UP(height, lcu_size); + + bitrate = DIV_ROUND_UP(d->bitrate, 1000000); + + bins_to_bit_factor = FP_INT(4); + + vsp_write_factor = bins_to_bit_factor; + vsp_read_factor = bins_to_bit_factor + FP_INT(2); + + collocated_bytes_per_lcu = lcu_size == 16 ? 16 : + lcu_size == 32 ? 64 : 256; + + dpb_factor = FP(1, 50, 100); + dpb_write_factor = FP(1, 5, 100); + + tnbr_per_lcu = lcu_size == 16 ? 128 : + lcu_size == 32 ? 64 : 128; + + /* .... For DDR & LLC ...... */ + ddr.vsp_read = fp_div(fp_mult(FP_INT(bitrate), + vsp_read_factor), FP_INT(8)); + ddr.vsp_write = fp_div(fp_mult(FP_INT(bitrate), + vsp_write_factor), FP_INT(8)); + + ddr.collocated_read = fp_div(FP_INT(lcu_per_frame * + collocated_bytes_per_lcu * fps), FP_INT(bps(1))); + ddr.collocated_write = ddr.collocated_read; + + y_bw_no_ubwc_8bpp = fp_div(FP_INT(width * height * fps), + FP_INT(1000 * 1000)); + + if (dpb_bpp != 8) { + y_bw_no_ubwc_10bpp = + fp_div(fp_mult(y_bw_no_ubwc_8bpp, FP_INT(256)), + FP_INT(192)); + y_bw_10bpp_p010 = y_bw_no_ubwc_8bpp * 2; + } + + ddr.dpb_read = dpb_bpp == 8 ? y_bw_no_ubwc_8bpp : y_bw_no_ubwc_10bpp; + ddr.dpb_read = fp_div(fp_mult(ddr.dpb_read, + fp_mult(dpb_factor, motion_vector_complexity)), + dpb_read_compression_factor); + + ddr.dpb_write = dpb_bpp == 8 ? y_bw_no_ubwc_8bpp : y_bw_no_ubwc_10bpp; + ddr.dpb_write = fp_div(fp_mult(ddr.dpb_write, + fp_mult(dpb_factor, dpb_write_factor)), + dpb_write_compression_factor); + + dpb_total = ddr.dpb_read + ddr.dpb_write; + + if (llc_ref_read_l2_cache_enabled) { + ddr.dpb_read = fp_div(ddr.dpb_read, is_h264_category ? + FP(1, 30, 100) : FP(1, 14, 100)); + llc.dpb_read = dpb_total - ddr.dpb_write - ddr.dpb_read; + } + + ddr.opb_read = FP_ZERO; + ddr.opb_write = unified_dpb_opb ? FP_ZERO : (dpb_bpp == 8 ? + y_bw_no_ubwc_8bpp : (opb_compression_enabled ? + y_bw_no_ubwc_10bpp : y_bw_10bpp_p010)); + ddr.opb_write = fp_div(fp_mult(dpb_factor, ddr.opb_write), + fp_mult(dpb_opb_scaling_ratio, opb_write_compression_factor)); + + ddr.line_buffer_read = + fp_div(FP_INT(tnbr_per_lcu * lcu_per_frame * fps), + FP_INT(bps(1))); + /* This change is applicable for all IRIS3 targets, + * but currently being done for IRIS3 with 2 pipes + * only due to timeline constraints. + */ + if((num_vpp_pipes == 2) && (is_h264_category)) + ddr.line_buffer_write = fp_div(ddr.line_buffer_read,FP_INT(2)); + else + ddr.line_buffer_write = ddr.line_buffer_read; + if (llc_top_line_buf_enabled) { + llc.line_buffer_read = ddr.line_buffer_read; + llc.line_buffer_write = ddr.line_buffer_write; + ddr.line_buffer_write = ddr.line_buffer_read = FP_ZERO; + } + + ddr.total = ddr.vsp_read + ddr.vsp_write + + ddr.collocated_read + ddr.collocated_write + + ddr.dpb_read + ddr.dpb_write + + ddr.opb_read + ddr.opb_write + + ddr.line_buffer_read + ddr.line_buffer_write; + + qsmmu_bw_overhead_factor = FP(1, 3, 100); + + ddr.total = fp_mult(ddr.total, qsmmu_bw_overhead_factor); + llc.total = llc.dpb_read + llc.line_buffer_read + + llc.line_buffer_write + ddr.total; + + /* Add 25 percent extra for 960fps use case */ + if (fps >= MAXIMUM_FPS) { + ddr.total += div_u64(ddr.total * 25, 100); + llc.total += div_u64(llc.total * 25, 100); + } + + /* Dump all the variables for easier debugging */ + if (msm_vidc_debug & VIDC_BUS) { + struct dump dump[] = { + {"DECODER PARAMETERS", "", DUMP_HEADER_MAGIC}, + {"lcu size", "%d", lcu_size}, + {"dpb bitdepth", "%d", dpb_bpp}, + {"frame rate", "%d", fps}, + {"dpb/opb unified", "%d", unified_dpb_opb}, + {"dpb/opb downscaling ratio", DUMP_FP_FMT, + dpb_opb_scaling_ratio}, + {"dpb compression", "%d", dpb_compression_enabled}, + {"opb compression", "%d", opb_compression_enabled}, + {"dpb read compression factor", DUMP_FP_FMT, + dpb_read_compression_factor}, + {"dpb write compression factor", DUMP_FP_FMT, + dpb_write_compression_factor}, + {"frame width", "%d", width}, + {"frame height", "%d", height}, + {"llc ref read l2 cache enabled", "%d", + llc_ref_read_l2_cache_enabled}, + {"llc top line buf enabled", "%d", + llc_top_line_buf_enabled}, + + {"DERIVED PARAMETERS (1)", "", DUMP_HEADER_MAGIC}, + {"lcus/frame", "%d", lcu_per_frame}, + {"bitrate (Mbit/sec)", "%d", bitrate}, + {"bins to bit factor", DUMP_FP_FMT, bins_to_bit_factor}, + {"dpb write factor", DUMP_FP_FMT, dpb_write_factor}, + {"vsp read factor", DUMP_FP_FMT, vsp_read_factor}, + {"vsp write factor", DUMP_FP_FMT, vsp_write_factor}, + {"tnbr/lcu", "%d", tnbr_per_lcu}, + {"collocated bytes/LCU", "%d", collocated_bytes_per_lcu}, + {"bw for NV12 8bpc)", DUMP_FP_FMT, y_bw_no_ubwc_8bpp}, + {"bw for NV12 10bpc)", DUMP_FP_FMT, y_bw_no_ubwc_10bpp}, + + {"DERIVED PARAMETERS (2)", "", DUMP_HEADER_MAGIC}, + {"mv complexity", DUMP_FP_FMT, motion_vector_complexity}, + {"qsmmu_bw_overhead_factor", DUMP_FP_FMT, + qsmmu_bw_overhead_factor}, + + {"INTERMEDIATE DDR B/W", "", DUMP_HEADER_MAGIC}, + {"vsp read", DUMP_FP_FMT, ddr.vsp_read}, + {"vsp write", DUMP_FP_FMT, ddr.vsp_write}, + {"collocated read", DUMP_FP_FMT, ddr.collocated_read}, + {"collocated write", DUMP_FP_FMT, ddr.collocated_write}, + {"line buffer read", DUMP_FP_FMT, ddr.line_buffer_read}, + {"line buffer write", DUMP_FP_FMT, ddr.line_buffer_write}, + {"opb read", DUMP_FP_FMT, ddr.opb_read}, + {"opb write", DUMP_FP_FMT, ddr.opb_write}, + {"dpb read", DUMP_FP_FMT, ddr.dpb_read}, + {"dpb write", DUMP_FP_FMT, ddr.dpb_write}, + {"dpb total", DUMP_FP_FMT, dpb_total}, + {"INTERMEDIATE LLC B/W", "", DUMP_HEADER_MAGIC}, + {"llc dpb read", DUMP_FP_FMT, llc.dpb_read}, + {"llc line buffer read", DUMP_FP_FMT, llc.line_buffer_read}, + {"llc line buffer write", DUMP_FP_FMT, llc.line_buffer_write}, + + }; + __dump(dump, ARRAY_SIZE(dump)); + } + + d->calc_bw_ddr = kbps(fp_round(ddr.total)); + d->calc_bw_llcc = kbps(fp_round(llc.total)); + + return ret; +} + +static u64 __calculate_encoder(struct vidc_bus_vote_data *d) +{ + /* + * XXX: Don't fool around with any of the hardcoded numbers unless you + * know /exactly/ what you're doing. Many of these numbers are + * measured heuristics and hardcoded numbers taken from the firmware. + */ + /* Encoder Parameters */ + int width, height, fps, lcu_size, bitrate, lcu_per_frame, + collocated_bytes_per_lcu, tnbr_per_lcu, dpb_bpp, + original_color_format, vertical_tile_width, rotation; + bool work_mode_1, original_compression_enabled, + low_power, cropping_or_scaling, + b_frames_enabled = false, + llc_ref_chroma_cache_enabled = false, + llc_top_line_buf_enabled = false, + llc_vpss_rot_line_buf_enabled = false; + + unsigned int bins_to_bit_factor; + fp_t dpb_compression_factor, + original_compression_factor, + original_compression_factor_y, + y_bw_no_ubwc_8bpp, y_bw_no_ubwc_10bpp = 0, y_bw_10bpp_p010 = 0, + input_compression_factor, + downscaling_ratio, + ref_y_read_bw_factor, ref_cbcr_read_bw_factor, + recon_write_bw_factor, + total_ref_read_crcb, + qsmmu_bw_overhead_factor; + fp_t integer_part, frac_part; + unsigned long ret = 0; + + /* Output parameters */ + struct { + fp_t vsp_read, vsp_write, collocated_read, collocated_write, + ref_read_y, ref_read_crcb, ref_write, + ref_write_overlap, orig_read, + line_buffer_read, line_buffer_write, + total; + } ddr = {0}; + + struct { + fp_t ref_read_crcb, line_buffer, total; + } llc = {0}; + + /* Encoder Parameters setup */ + rotation = d->rotation; + cropping_or_scaling = false; + vertical_tile_width = 960; + /* + * recon_write_bw_factor varies according to resolution and bit-depth, + * here use 1.08(1.075) for worst case. + * Similar for ref_y_read_bw_factor, it can reach 1.375 for worst case, + * here use 1.3 for average case, and can somewhat balance the + * worst case assumption for UBWC CR factors. + */ + recon_write_bw_factor = FP(1, 8, 100); + ref_y_read_bw_factor = FP(1, 30, 100); + ref_cbcr_read_bw_factor = FP(1, 50, 100); + + + /* Derived Parameters */ + fps = d->fps; + width = max(d->output_width, BASELINE_DIMENSIONS.width); + height = max(d->output_height, BASELINE_DIMENSIONS.height); + downscaling_ratio = fp_div(FP_INT(d->input_width * d->input_height), + FP_INT(d->output_width * d->output_height)); + downscaling_ratio = max(downscaling_ratio, FP_ONE); + bitrate = d->bitrate > 0 ? DIV_ROUND_UP(d->bitrate, 1000000) : + __lut(width, height, fps)->bitrate; + lcu_size = d->lcu_size; + lcu_per_frame = DIV_ROUND_UP(width, lcu_size) * + DIV_ROUND_UP(height, lcu_size); + tnbr_per_lcu = 16; + + dpb_bpp = __bpp(d->color_formats[0]); + + y_bw_no_ubwc_8bpp = fp_div(FP_INT(width * height * fps), + FP_INT(1000 * 1000)); + + if (dpb_bpp != 8) { + y_bw_no_ubwc_10bpp = fp_div(fp_mult(y_bw_no_ubwc_8bpp, + FP_INT(256)), FP_INT(192)); + y_bw_10bpp_p010 = y_bw_no_ubwc_8bpp * 2; + } + + b_frames_enabled = d->b_frames_enabled; + original_color_format = d->num_formats >= 1 ? + d->color_formats[0] : MSM_VIDC_FMT_NV12C; + + original_compression_enabled = __ubwc(original_color_format); + + work_mode_1 = d->work_mode == MSM_VIDC_STAGE_1; + low_power = d->power_mode == VIDC_POWER_LOW; + bins_to_bit_factor = 4; + + if (d->use_sys_cache) { + llc_ref_chroma_cache_enabled = true; + llc_top_line_buf_enabled = true, + llc_vpss_rot_line_buf_enabled = true; + } + + integer_part = Q16_INT(d->compression_ratio); + frac_part = Q16_FRAC(d->compression_ratio); + dpb_compression_factor = FP(integer_part, frac_part, 100); + + integer_part = Q16_INT(d->input_cr); + frac_part = Q16_FRAC(d->input_cr); + input_compression_factor = FP(integer_part, frac_part, 100); + + original_compression_factor = original_compression_factor_y = + !original_compression_enabled ? FP_ONE : + __compression_ratio(__lut(width, height, fps), dpb_bpp); + /* use input cr if it is valid (not 1), otherwise use lut */ + if (original_compression_enabled && + input_compression_factor != FP_ONE) { + original_compression_factor = input_compression_factor; + /* Luma usually has lower compression factor than Chroma, + * input cf is overall cf, add 1.08 factor for Luma cf + */ + original_compression_factor_y = + input_compression_factor > FP(1, 8, 100) ? + fp_div(input_compression_factor, FP(1, 8, 100)) : + input_compression_factor; + } + + ddr.vsp_read = fp_div(FP_INT(bitrate * bins_to_bit_factor), FP_INT(8)); + ddr.vsp_write = ddr.vsp_read + fp_div(FP_INT(bitrate), FP_INT(8)); + + collocated_bytes_per_lcu = lcu_size == 16 ? 16 : + lcu_size == 32 ? 64 : 256; + + ddr.collocated_read = fp_div(FP_INT(lcu_per_frame * + collocated_bytes_per_lcu * fps), FP_INT(bps(1))); + + ddr.collocated_write = ddr.collocated_read; + + ddr.ref_read_y = dpb_bpp == 8 ? + y_bw_no_ubwc_8bpp : y_bw_no_ubwc_10bpp; + if (b_frames_enabled) + ddr.ref_read_y = ddr.ref_read_y * 2; + ddr.ref_read_y = fp_div(ddr.ref_read_y, dpb_compression_factor); + + ddr.ref_read_crcb = fp_mult((ddr.ref_read_y / 2), + ref_cbcr_read_bw_factor); + + if (width > vertical_tile_width) { + ddr.ref_read_y = fp_mult(ddr.ref_read_y, + ref_y_read_bw_factor); + } + + if (llc_ref_chroma_cache_enabled) { + total_ref_read_crcb = ddr.ref_read_crcb; + ddr.ref_read_crcb = fp_div(ddr.ref_read_crcb, + ref_cbcr_read_bw_factor); + llc.ref_read_crcb = total_ref_read_crcb - ddr.ref_read_crcb; + } + + ddr.ref_write = dpb_bpp == 8 ? y_bw_no_ubwc_8bpp : y_bw_no_ubwc_10bpp; + ddr.ref_write = fp_div(fp_mult(ddr.ref_write, FP(1, 50, 100)), + dpb_compression_factor); + + if (width > vertical_tile_width) { + ddr.ref_write_overlap = fp_mult(ddr.ref_write, + (recon_write_bw_factor - FP_ONE)); + ddr.ref_write = fp_mult(ddr.ref_write, recon_write_bw_factor); + } + + ddr.orig_read = dpb_bpp == 8 ? y_bw_no_ubwc_8bpp : + (original_compression_enabled ? y_bw_no_ubwc_10bpp : + y_bw_10bpp_p010); + ddr.orig_read = fp_div(fp_mult(fp_mult(ddr.orig_read, FP(1, 50, 100)), + downscaling_ratio), original_compression_factor); + if (rotation == 90 || rotation == 270) + ddr.orig_read *= lcu_size == 32 ? (dpb_bpp == 8 ? 1 : 3) : 2; + + ddr.line_buffer_read = + fp_div(FP_INT(tnbr_per_lcu * lcu_per_frame * fps), + FP_INT(bps(1))); + + ddr.line_buffer_write = ddr.line_buffer_read; + if (llc_top_line_buf_enabled) { + llc.line_buffer = ddr.line_buffer_read + ddr.line_buffer_write; + ddr.line_buffer_read = ddr.line_buffer_write = FP_ZERO; + } + + ddr.total = ddr.vsp_read + ddr.vsp_write + + ddr.collocated_read + ddr.collocated_write + + ddr.ref_read_y + ddr.ref_read_crcb + + ddr.ref_write + ddr.ref_write_overlap + + ddr.orig_read + + ddr.line_buffer_read + ddr.line_buffer_write; + + qsmmu_bw_overhead_factor = FP(1, 3, 100); + ddr.total = fp_mult(ddr.total, qsmmu_bw_overhead_factor); + llc.total = llc.ref_read_crcb + llc.line_buffer + ddr.total; + + if (msm_vidc_debug & VIDC_BUS) { + struct dump dump[] = { + {"ENCODER PARAMETERS", "", DUMP_HEADER_MAGIC}, + {"width", "%d", width}, + {"height", "%d", height}, + {"fps", "%d", fps}, + {"dpb bitdepth", "%d", dpb_bpp}, + {"input downscaling ratio", DUMP_FP_FMT, downscaling_ratio}, + {"rotation", "%d", rotation}, + {"cropping or scaling", "%d", cropping_or_scaling}, + {"low power mode", "%d", low_power}, + {"work Mode", "%d", work_mode_1}, + {"B frame enabled", "%d", b_frames_enabled}, + {"original frame format", "%#x", original_color_format}, + {"original compression enabled", "%d", + original_compression_enabled}, + {"dpb compression factor", DUMP_FP_FMT, + dpb_compression_factor}, + {"input compression factor", DUMP_FP_FMT, + input_compression_factor}, + {"llc ref chroma cache enabled", DUMP_FP_FMT, + llc_ref_chroma_cache_enabled}, + {"llc top line buf enabled", DUMP_FP_FMT, + llc_top_line_buf_enabled}, + {"llc vpss rot line buf enabled ", DUMP_FP_FMT, + llc_vpss_rot_line_buf_enabled}, + + {"DERIVED PARAMETERS", "", DUMP_HEADER_MAGIC}, + {"lcu size", "%d", lcu_size}, + {"bitrate (Mbit/sec)", "%lu", bitrate}, + {"bins to bit factor", "%u", bins_to_bit_factor}, + {"original compression factor", DUMP_FP_FMT, + original_compression_factor}, + {"original compression factor y", DUMP_FP_FMT, + original_compression_factor_y}, + {"qsmmu_bw_overhead_factor", + DUMP_FP_FMT, qsmmu_bw_overhead_factor}, + {"bw for NV12 8bpc)", DUMP_FP_FMT, y_bw_no_ubwc_8bpp}, + {"bw for NV12 10bpc)", DUMP_FP_FMT, y_bw_no_ubwc_10bpp}, + + {"INTERMEDIATE B/W DDR", "", DUMP_HEADER_MAGIC}, + {"vsp read", DUMP_FP_FMT, ddr.vsp_read}, + {"vsp write", DUMP_FP_FMT, ddr.vsp_write}, + {"collocated read", DUMP_FP_FMT, ddr.collocated_read}, + {"collocated write", DUMP_FP_FMT, ddr.collocated_write}, + {"ref read y", DUMP_FP_FMT, ddr.ref_read_y}, + {"ref read crcb", DUMP_FP_FMT, ddr.ref_read_crcb}, + {"ref write", DUMP_FP_FMT, ddr.ref_write}, + {"ref write overlap", DUMP_FP_FMT, ddr.ref_write_overlap}, + {"original read", DUMP_FP_FMT, ddr.orig_read}, + {"line buffer read", DUMP_FP_FMT, ddr.line_buffer_read}, + {"line buffer write", DUMP_FP_FMT, ddr.line_buffer_write}, + {"INTERMEDIATE LLC B/W", "", DUMP_HEADER_MAGIC}, + {"llc ref read crcb", DUMP_FP_FMT, llc.ref_read_crcb}, + {"llc line buffer", DUMP_FP_FMT, llc.line_buffer}, + }; + __dump(dump, ARRAY_SIZE(dump)); + } + + d->calc_bw_ddr = kbps(fp_round(ddr.total)); + d->calc_bw_llcc = kbps(fp_round(llc.total)); + + return ret; +} + +static u64 __calculate(struct msm_vidc_inst* inst, struct vidc_bus_vote_data *d) +{ + u64 value = 0; + + switch (d->domain) { + case MSM_VIDC_ENCODER: + value = __calculate_encoder(d); + break; + case MSM_VIDC_DECODER: + value = __calculate_decoder(d); + break; + default: + i_vpr_e(inst, "%s: Unknown Domain %#x", __func__, d->domain); + } + + return value; +} + +int msm_vidc_calc_bw_iris3(struct msm_vidc_inst *inst, + struct vidc_bus_vote_data *vidc_data) +{ + int value = 0; + + if (!vidc_data) + return value; + + value = __calculate(inst, vidc_data); + + return value; +} diff --git a/driver/vidc/src/msm_vidc_platform.c b/driver/vidc/src/msm_vidc_platform.c index c18f2c4b96..1309bb7ecf 100644 --- a/driver/vidc/src/msm_vidc_platform.c +++ b/driver/vidc/src/msm_vidc_platform.c @@ -1,6 +1,7 @@ // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. + * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved. */ #include @@ -9,8 +10,18 @@ #include "msm_vidc_v4l2.h" #include "msm_vidc_vb2.h" #include "msm_vidc_control.h" +#if defined(CONFIG_MSM_VIDC_WAIPIO) #include "msm_vidc_waipio.h" +#endif +#if defined(CONFIG_MSM_VIDC_KALAMA) +#include "msm_vidc_kalama.h" +#endif +#if defined(CONFIG_MSM_VIDC_IRIS2) #include "msm_vidc_iris2.h" +#endif +#if defined(CONFIG_MSM_VIDC_IRIS3) +#include "msm_vidc_iris3.h" +#endif static struct v4l2_file_operations msm_v4l2_file_operations = { .owner = THIS_MODULE, @@ -137,7 +148,7 @@ static int msm_vidc_init_ops(struct msm_vidc_core *core) static int msm_vidc_deinit_platform_variant(struct msm_vidc_core *core, struct device *dev) { - int rc = 0; + int rc = -EINVAL; if (!core || !dev) { d_vpr_e("%s: Invalid params\n", __func__); @@ -146,22 +157,30 @@ static int msm_vidc_deinit_platform_variant(struct msm_vidc_core *core, struct d d_vpr_h("%s()\n", __func__); +#if defined(CONFIG_MSM_VIDC_WAIPIO) if (of_device_is_compatible(dev->of_node, "qcom,msm-vidc-waipio")) { rc = msm_vidc_deinit_platform_waipio(core, dev); - } else { - d_vpr_e("%s(): unknown platform\n", __func__); - rc = -EINVAL; + if (rc) + d_vpr_e("%s: failed with %d\n", __func__, rc); + goto end_target_config; } +#endif +#if defined(CONFIG_MSM_VIDC_KALAMA) + if (of_device_is_compatible(dev->of_node, "qcom,msm-vidc-kalama")) { + rc = msm_vidc_deinit_platform_kalama(core, dev); + if (rc) + d_vpr_e("%s: failed with %d\n", __func__, rc); + goto end_target_config; + } +#endif - if (rc) - d_vpr_e("%s: failed with %d\n", __func__, rc); - +end_target_config: return rc; } static int msm_vidc_init_platform_variant(struct msm_vidc_core *core, struct device *dev) { - int rc = 0; + int rc = -EINVAL; if (!core || !dev) { d_vpr_e("%s: Invalid params\n", __func__); @@ -170,22 +189,30 @@ static int msm_vidc_init_platform_variant(struct msm_vidc_core *core, struct dev d_vpr_h("%s()\n", __func__); +#if defined(CONFIG_MSM_VIDC_WAIPIO) if (of_device_is_compatible(dev->of_node, "qcom,msm-vidc-waipio")) { rc = msm_vidc_init_platform_waipio(core, dev); - } else { - d_vpr_e("%s(): unknown platform\n", __func__); - rc = -EINVAL; + if (rc) + d_vpr_e("%s: failed with %d\n", __func__, rc); + goto end_target_config; } +#endif +#if defined(CONFIG_MSM_VIDC_KALAMA) + if (of_device_is_compatible(dev->of_node, "qcom,msm-vidc-kalama")) { + rc = msm_vidc_init_platform_kalama(core, dev); + if (rc) + d_vpr_e("%s: failed with %d\n", __func__, rc); + goto end_target_config; + } +#endif - if (rc) - d_vpr_e("%s: failed with %d\n", __func__, rc); - +end_target_config: return rc; } static int msm_vidc_deinit_vpu(struct msm_vidc_core *core, struct device *dev) { - int rc = 0; + int rc = -EINVAL; if (!core || !dev) { d_vpr_e("%s: Invalid params\n", __func__); @@ -194,40 +221,54 @@ static int msm_vidc_deinit_vpu(struct msm_vidc_core *core, struct device *dev) d_vpr_h("%s()\n", __func__); +#if defined(CONFIG_MSM_VIDC_IRIS2) if (of_device_is_compatible(dev->of_node, "qcom,msm-vidc-iris2")) { rc = msm_vidc_deinit_iris2(core); - } else { - d_vpr_e("%s(): unknown vpu\n", __func__); - rc = -EINVAL; + if (rc) + d_vpr_e("%s: failed with %d\n", __func__, rc); + goto end_of_iris_config; } +#endif +#if defined(CONFIG_MSM_VIDC_IRIS3) + if (of_device_is_compatible(dev->of_node, "qcom,msm-vidc-iris3")) { + rc = msm_vidc_deinit_iris3(core); + if (rc) + d_vpr_e("%s: failed with %d\n", __func__, rc); + goto end_of_iris_config; + } +#endif - if (rc) - d_vpr_e("%s: failed with %d\n", __func__, rc); - +end_of_iris_config: return rc; } static int msm_vidc_init_vpu(struct msm_vidc_core *core, struct device *dev) { - int rc = 0; + int rc = -EINVAL; if (!core || !dev) { d_vpr_e("%s: Invalid params\n", __func__); return -EINVAL; } - d_vpr_h("%s()\n", __func__); - +#if defined(CONFIG_MSM_VIDC_IRIS2) if (of_device_is_compatible(dev->of_node, "qcom,msm-vidc-iris2")) { rc = msm_vidc_init_iris2(core); - } else { - d_vpr_e("%s(): unknown vpu\n", __func__); - rc = -EINVAL; + if (rc) + d_vpr_e("%s: failed with %d\n", __func__, rc); + goto end_of_iris_config; } +#endif +#if defined(CONFIG_MSM_VIDC_IRIS3) + if (of_device_is_compatible(dev->of_node, "qcom,msm-vidc-iris3")) { + rc = msm_vidc_init_iris3(core); + if (rc) + d_vpr_e("%s: failed with %d\n", __func__, rc); + goto end_of_iris_config; + } +#endif - if (rc) - d_vpr_e("%s: failed with %d\n", __func__, rc); - +end_of_iris_config: return rc; } From 2a7cf79509ac041649c9b847d9efb28e4319462d Mon Sep 17 00:00:00 2001 From: Mahesh Kumar Sharma Date: Thu, 7 Oct 2021 19:25:19 -0700 Subject: [PATCH 0471/1061] video: driver: Add AV1 codec, profile and level in UAPI Add AV1 codec, profile and level defintions and controls in UAPI. Add these controls as private controls in video driver. Change-Id: I58edec2d7fabceaa405708c99a75997c9f454022 Signed-off-by: Mahesh Kumar Sharma --- driver/vidc/src/msm_vidc_control.c | 47 +++++++++++++++++++ .../uapi/vidc/media/v4l2_vidc_extensions.h | 44 ++++++++++++++++- 2 files changed, 90 insertions(+), 1 deletion(-) diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 21d3543a43..e5c1b7cb96 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -130,6 +130,47 @@ static const char *const roi_map_type[] = { NULL, }; +static const char * const av1_profile[] = { + "Main", + "High", + "Professional", + NULL, +}; + +static const char * const av1_level[] = { + "2.0", + "2.1", + "2.2", + "2.3", + "3.0", + "3.1", + "3.2", + "3.3", + "4.0", + "4.1", + "4.2", + "4.3", + "5.0", + "5.1", + "5.2", + "5.3", + "6.0", + "6.1", + "6.2", + "6.3", + "7.0", + "7.1", + "7.2", + "7.3", + NULL, +}; + +static const char * const av1_tier[] = { + "Main", + "High", + NULL, +}; + static u32 msm_vidc_get_port_info(struct msm_vidc_inst *inst, enum msm_vidc_inst_capability_type cap_id) { @@ -165,6 +206,12 @@ static const char * const * msm_vidc_get_qmenu_type( return mpeg_video_avc_coding_layer; case V4L2_CID_MPEG_VIDEO_HEVC_PROFILE: return mpeg_video_hevc_profile; + case V4L2_CID_MPEG_VIDEO_AV1_PROFILE: + return av1_profile; + case V4L2_CID_MPEG_VIDEO_AV1_LEVEL: + return av1_level; + case V4L2_CID_MPEG_VIDEO_AV1_TIER: + return av1_tier; default: i_vpr_e(inst, "%s: No available qmenu for ctrl %#x\n", __func__, control_id); diff --git a/include/uapi/vidc/media/v4l2_vidc_extensions.h b/include/uapi/vidc/media/v4l2_vidc_extensions.h index 93c9271eed..a3c05a5d14 100644 --- a/include/uapi/vidc/media/v4l2_vidc_extensions.h +++ b/include/uapi/vidc/media/v4l2_vidc_extensions.h @@ -26,7 +26,8 @@ #define V4L2_META_FMT_VIDC v4l2_fourcc('Q', 'M', 'E', 'T') /* HEIC encoder and decoder */ #define V4L2_PIX_FMT_HEIC v4l2_fourcc('H', 'E', 'I', 'C') - +/* AV1 */ +#define V4L2_PIX_FMT_AV1 v4l2_fourcc('A', 'V', '1', '0') /* start of vidc specific colorspace definitions */ #define V4L2_COLORSPACE_VIDC_GENERIC_FILM 101 #define V4L2_COLORSPACE_VIDC_EG431 102 @@ -143,6 +144,47 @@ enum v4l2_mpeg_vidc_blur_types { /* Decoder Max Number of Reorder Frames */ #define V4L2_CID_MPEG_VIDC_METADATA_MAX_NUM_REORDER_FRAMES \ (V4L2_CID_MPEG_VIDC_BASE + 0x30) +/* Control IDs for AV1 */ +#define V4L2_CID_MPEG_VIDEO_AV1_PROFILE (V4L2_CID_MPEG_VIDC_BASE + 0x31) +enum v4l2_mpeg_video_av1_profile { + V4L2_MPEG_VIDEO_AV1_PROFILE_MAIN = 0, + V4L2_MPEG_VIDEO_AV1_PROFILE_HIGH = 1, + V4L2_MPEG_VIDEO_AV1_PROFILE_PROFESSIONAL = 2, +}; + +#define V4L2_CID_MPEG_VIDEO_AV1_LEVEL (V4L2_CID_MPEG_VIDC_BASE + 0x32) +enum v4l2_mpeg_video_av1_level { + V4L2_MPEG_VIDEO_AV1_LEVEL_2_0 = 0, + V4L2_MPEG_VIDEO_AV1_LEVEL_2_1 = 1, + V4L2_MPEG_VIDEO_AV1_LEVEL_2_2 = 2, + V4L2_MPEG_VIDEO_AV1_LEVEL_2_3 = 3, + V4L2_MPEG_VIDEO_AV1_LEVEL_3_0 = 4, + V4L2_MPEG_VIDEO_AV1_LEVEL_3_1 = 5, + V4L2_MPEG_VIDEO_AV1_LEVEL_3_2 = 6, + V4L2_MPEG_VIDEO_AV1_LEVEL_3_3 = 7, + V4L2_MPEG_VIDEO_AV1_LEVEL_4_0 = 8, + V4L2_MPEG_VIDEO_AV1_LEVEL_4_1 = 9, + V4L2_MPEG_VIDEO_AV1_LEVEL_4_2 = 10, + V4L2_MPEG_VIDEO_AV1_LEVEL_4_3 = 11, + V4L2_MPEG_VIDEO_AV1_LEVEL_5_0 = 12, + V4L2_MPEG_VIDEO_AV1_LEVEL_5_1 = 13, + V4L2_MPEG_VIDEO_AV1_LEVEL_5_2 = 14, + V4L2_MPEG_VIDEO_AV1_LEVEL_5_3 = 15, + V4L2_MPEG_VIDEO_AV1_LEVEL_6_0 = 16, + V4L2_MPEG_VIDEO_AV1_LEVEL_6_1 = 17, + V4L2_MPEG_VIDEO_AV1_LEVEL_6_2 = 18, + V4L2_MPEG_VIDEO_AV1_LEVEL_6_3 = 19, + V4L2_MPEG_VIDEO_AV1_LEVEL_7_0 = 20, + V4L2_MPEG_VIDEO_AV1_LEVEL_7_1 = 21, + V4L2_MPEG_VIDEO_AV1_LEVEL_7_2 = 22, + V4L2_MPEG_VIDEO_AV1_LEVEL_7_3 = 23, +}; + +#define V4L2_CID_MPEG_VIDEO_AV1_TIER (V4L2_CID_MPEG_VIDC_BASE + 0x33) +enum v4l2_mpeg_video_av1_tier { + V4L2_MPEG_VIDEO_AV1_TIER_MAIN = 0, + V4L2_MPEG_VIDEO_AV1_TIER_HIGH = 1, +}; /* Deprecate below controls once availble in gki and gsi bionic header */ #ifndef V4L2_CID_MPEG_VIDEO_BASELAYER_PRIORITY_ID From 3c17bb9c3d0356ca3d6fc16a8fea7b392744b852 Mon Sep 17 00:00:00 2001 From: Mihir Ganu Date: Wed, 1 Dec 2021 10:01:28 -0800 Subject: [PATCH 0472/1061] video: driver: Use correct macros for fps calculations Use correct macros and values for fps calculations in kalama platform files. Change-Id: Ib58903228032b1107363a98ce21b3bcb95aca0f5 Signed-off-by: Mihir Ganu --- driver/platform/kalama/src/msm_vidc_kalama.c | 2 ++ driver/variant/iris3/src/msm_vidc_power_iris3.c | 4 ++-- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index 6c97a3c7d6..e3631ec3d0 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -19,6 +19,8 @@ #define MAX_BASE_LAYER_PRIORITY_ID 63 #define MAX_BITRATE 220000000 #define DEFAULT_BITRATE 20000000 +#define MINIMUM_FPS 1 +#define MAXIMUM_FPS 960 #define MIN_QP_10BIT -12 #define MIN_QP_8BIT 0 #define MAX_QP 51 diff --git a/driver/variant/iris3/src/msm_vidc_power_iris3.c b/driver/variant/iris3/src/msm_vidc_power_iris3.c index 2fee9eaaae..a3ab8c8d9f 100644 --- a/driver/variant/iris3/src/msm_vidc_power_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_power_iris3.c @@ -167,7 +167,7 @@ u64 msm_vidc_calc_freq_iris3(struct msm_vidc_inst *inst, u32 data_size) vsp_cycles += mbs_per_second * base_cycles; /* Add 25 percent extra for 960fps use case */ - if (fps >= MAXIMUM_FPS) + if (fps >= 960) vsp_cycles += div_u64(vpp_cycles * 25, 100); if (inst->codec == MSM_VIDC_VP9 && @@ -373,7 +373,7 @@ static u64 __calculate_decoder(struct vidc_bus_vote_data *d) llc.line_buffer_write + ddr.total; /* Add 25 percent extra for 960fps use case */ - if (fps >= MAXIMUM_FPS) { + if (fps >= 960) { ddr.total += div_u64(ddr.total * 25, 100); llc.total += div_u64(llc.total * 25, 100); } From aa49b0d94de0503ef61982e1cc51d1dfff4bf66a Mon Sep 17 00:00:00 2001 From: Chinmay Sawarkar Date: Thu, 2 Dec 2021 11:15:24 -0800 Subject: [PATCH 0473/1061] video: driver: Enable mmrm in kailua Enable MMRM in Kailua core data. Change-Id: Ibf1f1cbdde46419d4d033d68a452668d68acb3fc Signed-off-by: Chinmay Sawarkar --- driver/platform/kalama/src/msm_vidc_kalama.c | 1 + 1 file changed, 1 insertion(+) diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index 6c97a3c7d6..d96ba3e35d 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -99,6 +99,7 @@ static struct msm_platform_core_capability core_data_kalama[] = { {AV_SYNC_WINDOW_SIZE, 40}, {NON_FATAL_FAULTS, 1}, {ENC_AUTO_FRAMERATE, 1}, + {MMRM, 1}, }; static struct msm_platform_inst_capability instance_data_kalama[] = { From 1c5f469b71c3f6bc2dbb972cb09b2c37f837ec77 Mon Sep 17 00:00:00 2001 From: Mihir Ganu Date: Thu, 2 Dec 2021 11:45:35 -0800 Subject: [PATCH 0474/1061] video: driver: Add HFI changes for AV1 Decoder Add the required codec properties and HFI definitions to enable AV1D. Change-Id: Ib098ed17f8b8e1fe9403f966a2dab97a3c9f96de Signed-off-by: Mihir Ganu --- driver/variant/iris3/inc/hfi_buffer_iris3.h | 270 ++++++++++++++++++++ driver/vidc/inc/hfi_property.h | 49 ++++ 2 files changed, 319 insertions(+) diff --git a/driver/variant/iris3/inc/hfi_buffer_iris3.h b/driver/variant/iris3/inc/hfi_buffer_iris3.h index 15ebf70eb9..68c017e9a5 100644 --- a/driver/variant/iris3/inc/hfi_buffer_iris3.h +++ b/driver/variant/iris3/inc/hfi_buffer_iris3.h @@ -876,6 +876,276 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define HFI_BUFFER_PERSIST_MP2D(_size) \ _size = QMATRIX_SIZE + MP2D_QPDUMP_SIZE; +#define AV1D_LCU_MAX_SIZE_PELS 128 +#define AV1D_LCU_MIN_SIZE_PELS 64 +#define AV1D_MAX_TILE_COLS 64 + +#define SIZE_AV1D_LB_FE_TOP_DATA(frame_width, frame_height) \ + (HFI_ALIGN(frame_width, AV1D_LCU_MAX_SIZE_PELS) * ((16 * 10) >> 3) + \ + HFI_ALIGN(frame_width, AV1D_LCU_MAX_SIZE_PELS) / 2 * ((16 * 6) >> 3) * 2) + +#define SIZE_AV1D_LB_FE_LEFT_DATA(frame_width, frame_height) \ + (32 * (HFI_ALIGN(frame_height, AV1D_LCU_MAX_SIZE_PELS) + \ + HFI_ALIGN(frame_height, AV1D_LCU_MAX_SIZE_PELS) / \ + AV1D_LCU_MIN_SIZE_PELS * 16) + \ + 16 * (HFI_ALIGN(frame_height, AV1D_LCU_MAX_SIZE_PELS) / 2 + \ + HFI_ALIGN(frame_height, AV1D_LCU_MAX_SIZE_PELS) / \ + AV1D_LCU_MIN_SIZE_PELS * 8) * 2 + \ + 24 * (HFI_ALIGN(frame_height, AV1D_LCU_MAX_SIZE_PELS) + \ + HFI_ALIGN(frame_height, AV1D_LCU_MAX_SIZE_PELS) / \ + AV1D_LCU_MIN_SIZE_PELS * 16) + \ + 24 * (HFI_ALIGN(frame_height, AV1D_LCU_MAX_SIZE_PELS) / 2 + \ + HFI_ALIGN(frame_height, AV1D_LCU_MAX_SIZE_PELS) / \ + AV1D_LCU_MIN_SIZE_PELS * 12) * 2 + \ + 24 * (HFI_ALIGN(frame_height, AV1D_LCU_MAX_SIZE_PELS) + \ + HFI_ALIGN(frame_height, AV1D_LCU_MAX_SIZE_PELS) / \ + AV1D_LCU_MIN_SIZE_PELS * 16) + \ + 16 * (HFI_ALIGN(frame_height, AV1D_LCU_MAX_SIZE_PELS) + \ + HFI_ALIGN(frame_height, AV1D_LCU_MAX_SIZE_PELS) / \ + AV1D_LCU_MIN_SIZE_PELS * 16) + \ + 16 * (HFI_ALIGN(frame_height, AV1D_LCU_MAX_SIZE_PELS) / 2 + \ + HFI_ALIGN(frame_height, AV1D_LCU_MAX_SIZE_PELS) / \ + AV1D_LCU_MIN_SIZE_PELS * 12) * 2) + +#define SIZE_AV1D_LB_FE_TOP_CTRL(frame_width, frame_height) \ + (10 * ((frame_width + AV1D_LCU_MIN_SIZE_PELS - 1) / \ + AV1D_LCU_MIN_SIZE_PELS) * 128 / 8) + +#define SIZE_AV1D_LB_FE_LEFT_CTRL(frame_width, frame_height) \ + (16 * ((HFI_ALIGN(frame_height, AV1D_LCU_MAX_SIZE_PELS) / 16) + \ + (HFI_ALIGN(frame_height, AV1D_LCU_MAX_SIZE_PELS) / \ + AV1D_LCU_MIN_SIZE_PELS)) + \ + 3 * 16 * (HFI_ALIGN(frame_height, AV1D_LCU_MAX_SIZE_PELS) / \ + AV1D_LCU_MIN_SIZE_PELS)) + +#define SIZE_AV1D_LB_SE_TOP_CTRL(frame_width, frame_height) \ + (((frame_width + 7) / 8) * 16) + +#define SIZE_AV1D_LB_SE_LEFT_CTRL(frame_width, frame_height) \ + (MAX(((frame_height + 15) / 16) * MAX_SE_NBR_CTRL_LCU16_LINE_BUFFER_SIZE, \ + MAX(((frame_height + 31) / 32) * MAX_SE_NBR_CTRL_LCU32_LINE_BUFFER_SIZE, \ + ((frame_height + 63) / 64) * MAX_SE_NBR_CTRL_LCU64_LINE_BUFFER_SIZE))) + +#define SIZE_AV1D_LB_PE_TOP_DATA(frame_width, frame_height) \ + (MAX(((frame_width + 15) / 16) * MAX_PE_NBR_DATA_LCU16_LINE_BUFFER_SIZE, \ + MAX(((frame_width + 31) / 32) * MAX_PE_NBR_DATA_LCU32_LINE_BUFFER_SIZE, \ + ((frame_width + 63) / 64) * MAX_PE_NBR_DATA_LCU64_LINE_BUFFER_SIZE))) + +#define SIZE_AV1D_LB_VSP_TOP(frame_width, frame_height) \ + (MAX(((frame_width + 63) / 64) * 1280, ((frame_width + 127) / 128) * 2304)) + +#define SIZE_AV1D_LB_RECON_DMA_METADATA_WR(frame_width, frame_height) \ + ((HFI_ALIGN(frame_height, 8) / (4 / 2)) * 64) + +#define SIZE_AV1D_QP(frame_width, frame_height) \ + SIZE_H264D_QP(frame_width, frame_height) + +#define SIZE_AV1D_LB_OPB_WR1_NV12_UBWC(_size, frame_width, frame_height) \ + do \ + { \ + HFI_U32 y_width, y_width_a = 128; \ + HFI_NV12_IL_CALC_Y_STRIDE(y_width, frame_width, y_width_a); \ + _size = (256 * ((y_width + 31) / 32 + (AV1D_MAX_TILE_COLS - 1))); \ + } while (0) + +#define SIZE_AV1D_LB_OPB_WR1_TP10_UBWC(_size, frame_width, frame_height) \ + do \ + { \ + HFI_U32 y_width, y_width_a = 256; \ + HFI_YUV420_TP10_CALC_Y_STRIDE(y_width, frame_width, y_width_a); \ + _size = (256 * ((y_width + 47) / 48 + (AV1D_MAX_TILE_COLS - 1))); \ + } while (0) + +#define SIZE_AV1D_IBC_NV12_UBWC(_size, frame_width, frame_height) \ + do \ + { \ + HFI_U32 y_width_a = 128, y_height_a = 32; \ + HFI_U32 uv_width_a = 128, uv_height_a = 32; \ + HFI_U32 yBufSize, uvBufSize, y_width, y_height, uv_width, uv_height; \ + HFI_NV12_IL_CALC_Y_STRIDE(y_width, frame_width, y_width_a); \ + HFI_NV12_IL_CALC_Y_BUFHEIGHT(y_height, frame_height, y_height_a); \ + HFI_NV12_IL_CALC_UV_STRIDE(uv_width, frame_width, uv_width_a); \ + HFI_NV12_IL_CALC_UV_BUFHEIGHT(uv_height, frame_height, uv_height_a); \ + HFI_NV12_UBWC_IL_CALC_Y_BUF_SIZE(yBufSize, y_width, y_height); \ + HFI_NV12_UBWC_IL_CALC_UV_BUF_SIZE(uvBufSize, uv_width, uv_height); \ + _size = yBufSize + uvBufSize; \ + HFI_U32 y_meta_width_a = 64, y_meta_height_a = 16; \ + HFI_U32 uv_meta_width_a = 64, uv_meta_height_a = 16; \ + HFI_U32 meta_height, meta_stride, meta_size; \ + HFI_U32 tile_width_y = HFI_COLOR_FORMAT_YUV420_NV12_UBWC_Y_TILE_WIDTH; \ + HFI_U32 tile_height_y = HFI_COLOR_FORMAT_YUV420_NV12_UBWC_Y_TILE_HEIGHT; \ + HFI_U32 tile_width_uv = HFI_COLOR_FORMAT_YUV420_NV12_UBWC_UV_TILE_WIDTH; \ + HFI_U32 tile_height_uv = \ + HFI_COLOR_FORMAT_YUV420_NV12_UBWC_UV_TILE_HEIGHT; \ + HFI_UBWC_CALC_METADATA_PLANE_STRIDE(meta_stride, frame_width, \ + y_meta_width_a, tile_width_y); \ + HFI_UBWC_METADATA_PLANE_BUFHEIGHT(meta_height, frame_height, \ + y_meta_height_a, tile_height_y); \ + HFI_UBWC_METADATA_PLANE_BUFFER_SIZE(meta_size, \ + meta_stride, meta_height); \ + _size += meta_size; \ + HFI_UBWC_UV_METADATA_PLANE_STRIDE(meta_stride, frame_width, \ + uv_meta_width_a, tile_width_uv); \ + HFI_UBWC_UV_METADATA_PLANE_BUFHEIGHT(meta_height, frame_height, \ + uv_meta_height_a, tile_height_uv); \ + HFI_UBWC_METADATA_PLANE_BUFFER_SIZE(meta_size, \ + meta_stride, meta_height); \ + _size += meta_size; \ + } while (0) + +#define SIZE_AV1D_IBC_TP10_UBWC(_size, frame_width, frame_height) \ + do \ + { \ + HFI_U32 y_width_a = 256, y_height_a = 16, \ + uv_width_a = 256, uv_height_a = 16; \ + HFI_U32 yBufSize, uvBufSize, y_width, y_height, uv_width, uv_height; \ + HFI_YUV420_TP10_CALC_Y_STRIDE(y_width, frame_width, y_width_a); \ + HFI_YUV420_TP10_CALC_Y_BUFHEIGHT(y_height, frame_height, y_height_a); \ + HFI_YUV420_TP10_CALC_UV_STRIDE(uv_width, frame_width, uv_width_a); \ + HFI_YUV420_TP10_CALC_UV_BUFHEIGHT(uv_height, frame_height, \ + uv_height_a); \ + HFI_YUV420_TP10_UBWC_CALC_Y_BUF_SIZE(yBufSize, y_width, y_height); \ + HFI_YUV420_TP10_UBWC_CALC_UV_BUF_SIZE(uvBufSize, uv_width, uv_height); \ + _size = yBufSize + uvBufSize; \ + HFI_U32 y_meta_width_a = 64, y_meta_height_a = 16, \ + uv_meta_width_a = 64, uv_meta_height_a = 16; \ + HFI_U32 meta_height, meta_stride, meta_size; \ + HFI_U32 tile_width_y = HFI_COLOR_FORMAT_YUV420_TP10_UBWC_Y_TILE_WIDTH; \ + HFI_U32 tile_height_y = HFI_COLOR_FORMAT_YUV420_TP10_UBWC_Y_TILE_HEIGHT; \ + HFI_U32 tile_width_uv = HFI_COLOR_FORMAT_YUV420_TP10_UBWC_UV_TILE_WIDTH; \ + HFI_U32 tile_height_uv = \ + HFI_COLOR_FORMAT_YUV420_TP10_UBWC_UV_TILE_HEIGHT; \ + HFI_UBWC_CALC_METADATA_PLANE_STRIDE(meta_stride, frame_width, \ + y_meta_width_a, tile_width_y); \ + HFI_UBWC_METADATA_PLANE_BUFHEIGHT(meta_height, frame_height, \ + y_meta_height_a, tile_height_y); \ + HFI_UBWC_METADATA_PLANE_BUFFER_SIZE(meta_size, \ + meta_stride, meta_height); \ + _size += meta_size; \ + HFI_UBWC_UV_METADATA_PLANE_STRIDE(meta_stride, frame_width, \ + uv_meta_width_a, tile_width_uv); \ + HFI_UBWC_UV_METADATA_PLANE_BUFHEIGHT(meta_height, frame_height, \ + uv_meta_height_a, tile_height_uv); \ + HFI_UBWC_METADATA_PLANE_BUFFER_SIZE(meta_size, \ + meta_stride, meta_height); \ + _size += meta_size; \ + } while (0) + +#define HFI_BUFFER_LINE_AV1D(_size, frame_width, frame_height, isOPB, \ + num_vpp_pipes) \ + do \ + { \ + HFI_U32 vpssLBSize, ibcBufSize, opbwr1BufSize, \ + opbwr8, opbwr10, ibc8, ibc10; \ + _size = HFI_ALIGN(SIZE_AV1D_LB_FE_TOP_DATA(frame_width, frame_height), \ + VENUS_DMA_ALIGNMENT) + \ + HFI_ALIGN(SIZE_AV1D_LB_FE_TOP_CTRL(frame_width, frame_height), \ + VENUS_DMA_ALIGNMENT) + \ + HFI_ALIGN(SIZE_AV1D_LB_FE_LEFT_DATA(frame_width, frame_height), \ + VENUS_DMA_ALIGNMENT) * num_vpp_pipes + \ + HFI_ALIGN(SIZE_AV1D_LB_FE_LEFT_CTRL(frame_width, frame_height), \ + VENUS_DMA_ALIGNMENT) * num_vpp_pipes + \ + HFI_ALIGN(SIZE_AV1D_LB_SE_LEFT_CTRL(frame_width, frame_height), \ + VENUS_DMA_ALIGNMENT) * num_vpp_pipes + \ + HFI_ALIGN(SIZE_AV1D_LB_SE_TOP_CTRL(frame_width, frame_height), \ + VENUS_DMA_ALIGNMENT) + \ + HFI_ALIGN(SIZE_AV1D_LB_PE_TOP_DATA(frame_width, frame_height), \ + VENUS_DMA_ALIGNMENT) + \ + HFI_ALIGN(SIZE_AV1D_LB_VSP_TOP(frame_width, frame_height), \ + VENUS_DMA_ALIGNMENT) + \ + HFI_ALIGN(SIZE_AV1D_LB_RECON_DMA_METADATA_WR(frame_width, \ + frame_height), \ + VENUS_DMA_ALIGNMENT) * 2 + \ + HFI_ALIGN(SIZE_AV1D_QP(frame_width, frame_height), \ + VENUS_DMA_ALIGNMENT); \ + SIZE_AV1D_LB_OPB_WR1_NV12_UBWC(opbwr8, frame_width, frame_height); \ + SIZE_AV1D_LB_OPB_WR1_TP10_UBWC(opbwr10, frame_width, frame_height); \ + opbwr1BufSize = MAX(opbwr8, opbwr10); \ + _size = HFI_ALIGN((_size + opbwr1BufSize), VENUS_DMA_ALIGNMENT); \ + if (isOPB) \ + { \ + SIZE_VPSS_LB(vpssLBSize, frame_width, frame_height, num_vpp_pipes); \ + _size = HFI_ALIGN((_size + vpssLBSize), VENUS_DMA_ALIGNMENT); \ + } \ + else \ + { \ + SIZE_AV1D_IBC_NV12_UBWC(ibc8, frame_width, frame_height); \ + SIZE_AV1D_IBC_TP10_UBWC(ibc10, frame_width, frame_height); \ + ibcBufSize = MAX(ibc8, ibc10); \ + _size = HFI_ALIGN((_size + ibcBufSize), VENUS_DMA_ALIGNMENT); \ + } \ + } while (0) + +#define AV1_CABAC_HDR_RATIO_HD_TOT 2 +#define AV1_CABAC_RES_RATIO_HD_TOT 2 +/* some content need more bin buffer, + * but limit buffer size for high resolution */ +#define SIZE_AV1D_HW_BIN_BUFFER(_size, frame_width, frame_height, delay, \ + num_vpp_pipes) \ + do \ + { \ + HFI_U32 size_yuv, size_bin_hdr, size_bin_res; \ + size_yuv = ((frame_width * frame_height) <= BIN_BUFFER_THRESHOLD) ? \ + ((BIN_BUFFER_THRESHOLD * 3) >> 1) : \ + ((frame_width * frame_height * 3) >> 1); \ + size_bin_hdr = size_yuv * AV1_CABAC_HDR_RATIO_HD_TOT; \ + size_bin_res = size_yuv * AV1_CABAC_RES_RATIO_HD_TOT; \ + size_bin_hdr = size_bin_hdr * \ + (((((HFI_U32)(delay)) & 31) / 10) + 2) / 2; \ + size_bin_res = size_bin_res * \ + (((((HFI_U32)(delay)) & 31) / 10) + 2) / 2; \ + size_bin_hdr = HFI_ALIGN(size_bin_hdr / num_vpp_pipes, \ + VENUS_DMA_ALIGNMENT) * num_vpp_pipes; \ + size_bin_res = HFI_ALIGN(size_bin_res / num_vpp_pipes, \ + VENUS_DMA_ALIGNMENT) * num_vpp_pipes; \ + _size = size_bin_hdr + size_bin_res; \ + } while (0) + +#define HFI_BUFFER_BIN_AV1D(_size, frame_width, frame_height, isInterlaced, \ + delay, num_vpp_pipes) \ + do \ + { \ + HFI_U32 nAlignedW = HFI_ALIGN(frame_width, BUFFER_ALIGNMENT_16_BYTES); \ + HFI_U32 nAlignedH = HFI_ALIGN(frame_height, BUFFER_ALIGNMENT_16_BYTES); \ + if (!isInterlaced) \ + { \ + SIZE_AV1D_HW_BIN_BUFFER(_size, nAlignedW, nAlignedH, \ + delay, num_vpp_pipes); \ + } \ + else \ + { \ + _size = 0; \ + } \ + } while (0) + +#define AV1D_NUM_HW_PIC_BUF 16 +#define AV1D_NUM_FRAME_HEADERS 16 + +#define SIZE_AV1D_SEQUENCE_HEADER 768 +#define SIZE_AV1D_METADATA 512 +#define SIZE_AV1D_FRAME_HEADER 1280 +#define SIZE_AV1D_TILE_OFFSET 65536 +#define SIZE_AV1D_QM 3328 +#define SIZE_AV1D_PROB_TABLE 22784 + +#define AV1D_SIZE_BSE_COL_MV_64x64 512 +#define AV1D_SIZE_BSE_COL_MV_128x128 2816 +#define SIZE_AV1D_COL_MV MAX((((8192 + 63) / 64) * ((4352 + 63) / 64) * \ + AV1D_SIZE_BSE_COL_MV_64x64), \ + (((8192 + 127) / 128) * ((4352 + 127) / 128) * \ + AV1D_SIZE_BSE_COL_MV_128x128)) + +#define HFI_BUFFER_PERSIST_AV1D(_size) \ + do \ + { \ + _size = HFI_ALIGN(SIZE_AV1D_SEQUENCE_HEADER * 2 + \ + SIZE_AV1D_METADATA + \ + AV1D_NUM_HW_PIC_BUF * (SIZE_AV1D_TILE_OFFSET + SIZE_AV1D_QM) + \ + AV1D_NUM_FRAME_HEADERS * (SIZE_AV1D_FRAME_HEADER + \ + 2 * SIZE_AV1D_PROB_TABLE) + \ + AV1D_NUM_HW_PIC_BUF * 2 * SIZE_AV1D_COL_MV, VENUS_DMA_ALIGNMENT); \ + } while (0) + #define HFI_BUFFER_BITSTREAM_ENC(size, frame_width, frame_height, \ rc_type, is_ten_bit) \ do \ diff --git a/driver/vidc/inc/hfi_property.h b/driver/vidc/inc/hfi_property.h index 5c4b0df988..1e4eadb4f9 100644 --- a/driver/vidc/inc/hfi_property.h +++ b/driver/vidc/inc/hfi_property.h @@ -52,6 +52,7 @@ enum hfi_codec_type { HFI_CODEC_ENCODE_HEVC = 4, HFI_CODEC_DECODE_VP9 = 5, HFI_CODEC_DECODE_MPEG2 = 6, + HFI_CODEC_DECODE_AV1 = 7, }; #define HFI_PROP_CODEC 0x03000100 @@ -112,6 +113,12 @@ enum hfi_mpeg2_profile_type { HFI_MP2_PROFILE_MAIN = 1, }; +enum hfi_av1_profile_type { + HFI_AV1_PROFILE_MAIN = 0, + HFI_AV1_PROFILE_HIGH = 1, + HFI_AV1_PROFILE_PROF = 2, +}; + #define HFI_PROP_PROFILE 0x03000107 enum hfi_avc_level_type { @@ -175,6 +182,34 @@ enum hfi_mpeg2_level_type { HFI_MP2_LEVEL_HIGH = 3, }; +enum hfi_av1_level_type { + HFI_AV1_LEVEL_2_0 = 0, + HFI_AV1_LEVEL_2_1 = 1, + HFI_AV1_LEVEL_2_2 = 2, + HFI_AV1_LEVEL_2_3 = 3, + HFI_AV1_LEVEL_3_0 = 4, + HFI_AV1_LEVEL_3_1 = 5, + HFI_AV1_LEVEL_3_2 = 6, + HFI_AV1_LEVEL_3_3 = 7, + HFI_AV1_LEVEL_4_0 = 8, + HFI_AV1_LEVEL_4_1 = 9, + HFI_AV1_LEVEL_4_2 = 10, + HFI_AV1_LEVEL_4_3 = 11, + HFI_AV1_LEVEL_5_0 = 12, + HFI_AV1_LEVEL_5_1 = 13, + HFI_AV1_LEVEL_5_2 = 14, + HFI_AV1_LEVEL_5_3 = 15, + HFI_AV1_LEVEL_6_0 = 16, + HFI_AV1_LEVEL_6_1 = 17, + HFI_AV1_LEVEL_6_2 = 18, + HFI_AV1_LEVEL_6_3 = 19, + HFI_AV1_LEVEL_7_0 = 20, + HFI_AV1_LEVEL_7_1 = 21, + HFI_AV1_LEVEL_7_2 = 22, + HFI_AV1_LEVEL_7_3 = 23, + HFI_AV1_LEVEL_MAX = 31, +}; + enum hfi_codec_level_type { HFI_LEVEL_NONE = 0xFFFFFFFF, }; @@ -185,6 +220,12 @@ enum hfi_hevc_tier_type { HFI_H265_TIER_MAIN = 0, HFI_H265_TIER_HIGH = 1, }; + +enum hfi_av1_tier_type { + HFI_AV1_TIER_MAIN = 0, + HFI_AV1_TIER_HIGH = 1, +}; + #define HFI_PROP_TIER 0x03000109 #define HFI_PROP_STAGE 0x0300010a @@ -491,6 +532,14 @@ enum hfi_nal_length_field_type { #define HFI_PROP_MAINTAIN_MIN_QUALITY 0x0300017D +#define HFI_PROP_AV1_FILM_GRAIN_PRESENT 0x03000180 + +#define HFI_PROP_AV1_SUPER_BLOCK_ENABLED 0x03000181 + +#define HFI_PROP_AV1_OP_POINT 0x03000182 + +#define HFI_PROP_OPB_ENABLE 0x03000184 + #define HFI_PROP_END 0x03FFFFFF #define HFI_SESSION_ERROR_BEGIN 0x04000000 From 79505f878d7f0eaf5413a380b06ed2ca2cc239a9 Mon Sep 17 00:00:00 2001 From: Mihir Ganu Date: Thu, 2 Dec 2021 20:39:13 -0800 Subject: [PATCH 0475/1061] video: driver: compile video driver Add compilation checks and compile video driver based on flags. Change-Id: Ia4712b411eb86e0ef7d153ab04461de9c2f909f9 Signed-off-by: Mihir Ganu --- Android.mk | 9 +++++++-- video_kernel_board.mk | 10 ++++++++-- video_kernel_product.mk | 8 +++++++- 3 files changed, 22 insertions(+), 5 deletions(-) diff --git a/Android.mk b/Android.mk index b0a9e2216b..960785856b 100644 --- a/Android.mk +++ b/Android.mk @@ -1,7 +1,13 @@ # SPDX-License-Identifier: GPL-2.0-only - +TARGET_VIDC_ENABLE := false ifeq ($(TARGET_USES_QMAA),false) +TARGET_VIDC_ENABLE := true +endif ifeq ($(TARGET_USES_QMAA_OVERRIDE_VIDEO),true) +TARGET_VIDC_ENABLE := true +endif + +ifeq ($(TARGET_VIDC_ENABLE),true) VIDEO_BLD_DIR := $(shell pwd)/vendor/qcom/opensource/video-driver VIDEO_SELECT := CONFIG_MSM_VIDC_V4L2=m @@ -37,4 +43,3 @@ LOCAL_ADDITIONAL_DEPENDENCIES := $(call intermediates-dir-for,DLKM,mmrm-module-s # BOARD_VENDOR_KERNEL_MODULES += $(LOCAL_MODULE_PATH)/$(LOCAL_MODULE) include $(DLKM_DIR)/Build_external_kernelmodule.mk endif -endif diff --git a/video_kernel_board.mk b/video_kernel_board.mk index 551ce0f72f..fe75d02f68 100644 --- a/video_kernel_board.mk +++ b/video_kernel_board.mk @@ -1,7 +1,14 @@ # SPDX-License-Identifier: GPL-2.0-only -# Build video kernel driver +TARGET_VIDC_ENABLE := false ifeq ($(TARGET_USES_QMAA),false) +TARGET_VIDC_ENABLE := true +endif ifeq ($(TARGET_USES_QMAA_OVERRIDE_VIDEO),true) +TARGET_VIDC_ENABLE := true +endif + +# Build video kernel driver +ifeq ($(TARGET_VIDC_ENABLE),true) ifneq ($(TARGET_KERNEL_DLKM_DISABLE),true) ifneq ($(TARGET_BOARD_AUTO),true) ifeq ($(call is-board-platform-in-list,$(TARGET_BOARD_PLATFORM)),true) @@ -12,4 +19,3 @@ endif endif endif endif -endif diff --git a/video_kernel_product.mk b/video_kernel_product.mk index 6900093826..913d055755 100644 --- a/video_kernel_product.mk +++ b/video_kernel_product.mk @@ -1,6 +1,12 @@ # SPDX-License-Identifier: GPL-2.0-only +TARGET_VIDC_ENABLE := false ifeq ($(TARGET_USES_QMAA),false) +TARGET_VIDC_ENABLE := true +endif ifeq ($(TARGET_USES_QMAA_OVERRIDE_VIDEO),true) +TARGET_VIDC_ENABLE := true +endif + +ifeq ($(TARGET_VIDC_ENABLE),true) PRODUCT_PACKAGES += msm_video.ko endif -endif From 1068661f6dc28d39ac0fd314c5014d91c9b86247 Mon Sep 17 00:00:00 2001 From: Chinmay Sawarkar Date: Tue, 30 Nov 2021 19:33:55 -0800 Subject: [PATCH 0476/1061] video: driver: Fix dma_buf_vmap arguments New dma_buf_vmap api takes dma_buf_map struct as argument, instead of kvaddr. Change-Id: I2843a28b2c0c2de2d9cd1bfa96fb1a86ffba6059 Signed-off-by: Chinmay Sawarkar --- driver/vidc/inc/msm_vidc_internal.h | 4 ++++ driver/vidc/src/msm_vidc_memory.c | 8 ++++++-- 2 files changed, 10 insertions(+), 2 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 036efda329..91b3b59dbe 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -6,6 +6,7 @@ #ifndef _MSM_VIDC_INTERNAL_H_ #define _MSM_VIDC_INTERNAL_H_ +#include #include #include #include @@ -785,6 +786,9 @@ struct msm_vidc_alloc { u8 secure:1; u8 map_kernel:1; struct dma_buf *dmabuf; +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5,15,0)) + struct dma_buf_map dmabuf_map; +#endif void *kvaddr; }; diff --git a/driver/vidc/src/msm_vidc_memory.c b/driver/vidc/src/msm_vidc_memory.c index 3c6c8ba21e..a713e1878f 100644 --- a/driver/vidc/src/msm_vidc_memory.c +++ b/driver/vidc/src/msm_vidc_memory.c @@ -3,7 +3,6 @@ * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. */ -#include #include #include #include @@ -387,12 +386,13 @@ int msm_vidc_memory_alloc(struct msm_vidc_core *core, struct msm_vidc_alloc *mem goto error; } #else - rc = dma_buf_vmap(mem->dmabuf, mem->kvaddr); + rc = dma_buf_vmap(mem->dmabuf, &mem->dmabuf_map); if (rc) { d_vpr_e("%s: kernel map failed\n", __func__); rc = -EIO; goto error; } + mem->kvaddr = mem->dmabuf_map.vaddr; #endif } @@ -428,7 +428,11 @@ int msm_vidc_memory_free(struct msm_vidc_core *core, struct msm_vidc_alloc *mem) buf_name(mem->type), mem->secure, mem->region); if (mem->kvaddr) { +#if (LINUX_VERSION_CODE < KERNEL_VERSION(5,15,0)) dma_buf_vunmap(mem->dmabuf, mem->kvaddr); +#else + dma_buf_vunmap(mem->dmabuf, &mem->dmabuf_map); +#endif mem->kvaddr = NULL; dma_buf_end_cpu_access(mem->dmabuf, DMA_BIDIRECTIONAL); } From ad2c274bbe963b25884a2c2b17768b528d15f507 Mon Sep 17 00:00:00 2001 From: Vikash Garodia Date: Fri, 19 Nov 2021 12:06:14 +0530 Subject: [PATCH 0477/1061] video: driver: update power collapse sequence Following changes are done in power collapse sequence 1. AXI2AHB bridge is reset during power collapse. 2. controller regulator is disabled after disabling the clocks. 3. disable core clock before axi clock. Change-Id: I8be672728f349620deea22950597ca7766078697 Signed-off-by: Vikash Garodia --- driver/variant/iris2/src/msm_vidc_iris2.c | 26 ++++++++++++++--------- 1 file changed, 16 insertions(+), 10 deletions(-) diff --git a/driver/variant/iris2/src/msm_vidc_iris2.c b/driver/variant/iris2/src/msm_vidc_iris2.c index 9e953b0a65..b29adf14e9 100644 --- a/driver/variant/iris2/src/msm_vidc_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_iris2.c @@ -574,10 +574,10 @@ static int __power_off_iris2_controller(struct msm_vidc_core *core) if (rc) d_vpr_h("%s: debug bridge release failed\n", __func__); - /* power down process */ - rc = __disable_regulator_iris2(core, "iris-ctl"); + /* Turn off MVP MVS0C core clock */ + rc = __disable_unprepare_clock_iris2(core, "core_clk"); if (rc) { - d_vpr_e("%s: disable regulator iris-ctl failed\n", __func__); + d_vpr_e("%s: disable unprepare core_clk failed\n", __func__); rc = 0; } @@ -588,13 +588,6 @@ static int __power_off_iris2_controller(struct msm_vidc_core *core) rc = 0; } - /* Turn off MVP MVS0C core clock */ - rc = __disable_unprepare_clock_iris2(core, "core_clk"); - if (rc) { - d_vpr_e("%s: disable unprepare core_clk failed\n", __func__); - rc = 0; - } - /* Turn off MVP MVS0 SRC clock */ rc = __disable_unprepare_clock_iris2(core, "video_cc_mvs0_clk_src"); if (rc) { @@ -602,6 +595,19 @@ static int __power_off_iris2_controller(struct msm_vidc_core *core) rc = 0; } + rc = call_venus_op(core, reset_ahb2axi_bridge, core); + if (rc) { + d_vpr_e("%s: reset ahb2axi bridge failed\n", __func__); + rc = 0; + } + + /* power down process */ + rc = __disable_regulator_iris2(core, "iris-ctl"); + if (rc) { + d_vpr_e("%s: disable regulator iris-ctl failed\n", __func__); + rc = 0; + } + return rc; } From 3693d8b27c59c8beb7e0ec65fc83206939d1cd38 Mon Sep 17 00:00:00 2001 From: Vikash Garodia Date: Tue, 7 Dec 2021 12:07:26 +0530 Subject: [PATCH 0478/1061] video: driver: skip prepare/unprepare for video_cc_mvs0_clk_src The clock video_cc_mvs0_clk_src will be automatically prepared and unprepared when video core cpu clock is prepared and unprepared. So skip explicit prepare/unprepare video_cc_mvs0_clk_src from video driver. Change-Id: Ibe41b0b4ecfce27959c29d8024c91af8c1162aa7 Signed-off-by: Vikash Garodia --- driver/variant/iris2/src/msm_vidc_iris2.c | 13 ------------- 1 file changed, 13 deletions(-) diff --git a/driver/variant/iris2/src/msm_vidc_iris2.c b/driver/variant/iris2/src/msm_vidc_iris2.c index b29adf14e9..4de6df7114 100644 --- a/driver/variant/iris2/src/msm_vidc_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_iris2.c @@ -588,13 +588,6 @@ static int __power_off_iris2_controller(struct msm_vidc_core *core) rc = 0; } - /* Turn off MVP MVS0 SRC clock */ - rc = __disable_unprepare_clock_iris2(core, "video_cc_mvs0_clk_src"); - if (rc) { - d_vpr_e("%s: disable unprepare video_cc_mvs0_clk_src failed\n", __func__); - rc = 0; - } - rc = call_venus_op(core, reset_ahb2axi_bridge, core); if (rc) { d_vpr_e("%s: reset ahb2axi bridge failed\n", __func__); @@ -661,14 +654,8 @@ static int __power_on_iris2_controller(struct msm_vidc_core *core) if (rc) goto fail_clk_controller; - rc = __prepare_enable_clock_iris2(core, "video_cc_mvs0_clk_src"); - if (rc) - goto fail_clk_src; - return 0; -fail_clk_src: - __disable_unprepare_clock_iris2(core, "core_clk"); fail_clk_controller: __disable_unprepare_clock_iris2(core, "gcc_video_axi0"); fail_clk_axi: From f3ff48e82f609d104b9c78ecc74e9e5cb27548f1 Mon Sep 17 00:00:00 2001 From: Vikash Garodia Date: Tue, 7 Dec 2021 12:12:50 +0530 Subject: [PATCH 0479/1061] video: driver: reset video_cc_mvs0_clk_src clock_rate Reset video_cc_mvs0_clk_src value to resolve MMRM high video clock projection issue. Change-Id: I0c549d7537a82792e9de708c96c265f0dce5908d Signed-off-by: Vikash Garodia --- driver/variant/iris2/src/msm_vidc_iris2.c | 8 ++++++++ driver/vidc/inc/venus_hfi.h | 1 + driver/vidc/src/venus_hfi.c | 2 +- 3 files changed, 10 insertions(+), 1 deletion(-) diff --git a/driver/variant/iris2/src/msm_vidc_iris2.c b/driver/variant/iris2/src/msm_vidc_iris2.c index 4de6df7114..76cbc22e5c 100644 --- a/driver/variant/iris2/src/msm_vidc_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_iris2.c @@ -616,6 +616,14 @@ static int __power_off_iris2(struct msm_vidc_core *core) if (!core->power_enabled) return 0; + /** + * Reset video_cc_mvs0_clk_src value to resolve MMRM high video + * clock projection issue. + */ + rc = __set_clocks(core, 0); + if (rc) + d_vpr_e("%s: resetting clocks failed\n", __func__); + if (__power_off_iris2_hardware(core)) d_vpr_e("%s: failed to power off hardware\n", __func__); diff --git a/driver/vidc/inc/venus_hfi.h b/driver/vidc/inc/venus_hfi.h index 865cd0069e..c5fd3236dc 100644 --- a/driver/vidc/inc/venus_hfi.h +++ b/driver/vidc/inc/venus_hfi.h @@ -73,6 +73,7 @@ int __iface_cmdq_write(struct msm_vidc_core *core, void *pkt); int __iface_msgq_read(struct msm_vidc_core *core, void *pkt); int __iface_dbgq_read(struct msm_vidc_core *core, void *pkt); +int __set_clocks(struct msm_vidc_core *core, u32 freq); int __scale_clocks(struct msm_vidc_core *core); int __set_clk_rate(struct msm_vidc_core *core, struct clock_info *cl, u64 rate); diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index 9a7fcb2ca6..55dc6d3b29 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -709,7 +709,7 @@ int __set_clk_rate(struct msm_vidc_core *core, return rc; } -static int __set_clocks(struct msm_vidc_core *core, u32 freq) +int __set_clocks(struct msm_vidc_core *core, u32 freq) { int rc = 0; struct clock_info *cl; From 04304a466fc9eed8a06da2b994e35f3322e3951d Mon Sep 17 00:00:00 2001 From: Mihir Ganu Date: Fri, 3 Dec 2021 13:27:39 -0800 Subject: [PATCH 0480/1061] video: driver: Add changes to enable AV1 Decoder Add definitions, controls and codec-specific handling to enable AV1 Decoder. Change-Id: Ica2f4e298e43aa713188d3374f8705688d0ed912 Signed-off-by: Mihir Ganu --- driver/platform/kalama/src/msm_vidc_kalama.c | 102 +++++++++++++++--- .../variant/iris3/src/msm_vidc_buffer_iris3.c | 11 +- driver/vidc/inc/msm_vidc_internal.h | 6 ++ driver/vidc/src/hfi_packet.c | 2 + driver/vidc/src/msm_vdec.c | 96 +++++++++++++++++ driver/vidc/src/msm_vidc_buffer.c | 5 + driver/vidc/src/msm_vidc_control.c | 3 + driver/vidc/src/msm_vidc_driver.c | 9 ++ driver/vidc/src/venus_hfi_response.c | 13 ++- 9 files changed, 227 insertions(+), 20 deletions(-) diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index 1abff22ba7..dc0aeee905 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -48,13 +48,14 @@ #define H264 MSM_VIDC_H264 #define HEVC MSM_VIDC_HEVC #define VP9 MSM_VIDC_VP9 +#define AV1 MSM_VIDC_AV1 #define HEIC MSM_VIDC_HEIC -#define CODECS_ALL (H264 | HEVC | VP9 | HEIC) +#define CODECS_ALL (H264 | HEVC | VP9 | HEIC | AV1) static struct msm_platform_core_capability core_data_kalama[] = { /* {type, value} */ {ENC_CODECS, H264|HEVC|HEIC}, - {DEC_CODECS, H264|HEVC|VP9|HEIC}, + {DEC_CODECS, H264|HEVC|VP9|AV1|HEIC}, {MAX_SESSION_COUNT, 16}, {MAX_NUM_720P_SESSIONS, 16}, {MAX_NUM_1080P_SESSIONS, 8}, @@ -185,6 +186,13 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { MSM_VIDC_FMT_P010 | MSM_VIDC_FMT_TP10C, MSM_VIDC_FMT_NV12C}, + {PIX_FMTS, DEC, AV1, + MSM_VIDC_FMT_NV12, + MSM_VIDC_FMT_TP10C, + MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C | + MSM_VIDC_FMT_P010 | MSM_VIDC_FMT_TP10C, + MSM_VIDC_FMT_NV12C}, + {MIN_BUFFERS_INPUT, ENC|DEC, CODECS_ALL, 0, 64, 1, 4, V4L2_CID_MIN_BUFFERS_FOR_OUTPUT}, {MIN_BUFFERS_OUTPUT, ENC|DEC, CODECS_ALL, @@ -202,10 +210,10 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { {LOSSLESS_MBPF, ENC, H264|HEVC, 64, 36864, 1, 36864}, /* Batch Mode Decode */ /* TODO: update with new values based on updated voltage corner */ - {BATCH_MBPF, DEC, H264|HEVC|VP9, 64, 34816, 1, 34816}, + {BATCH_MBPF, DEC, H264|HEVC|VP9|AV1, 64, 34816, 1, 34816}, /* (4096 * 2304) / 256 */ - {BATCH_FPS, DEC, H264|HEVC|VP9, 1, 120, 1, 120}, - {SECURE_MBPF, ENC|DEC, H264|HEVC|VP9, 64, 36864, 1, 36864}, + {BATCH_FPS, DEC, H264|HEVC|VP9|AV1, 1, 120, 1, 120}, + {SECURE_MBPF, ENC|DEC, H264|HEVC|VP9|AV1, 64, 36864, 1, 36864}, /* ((1920 * 1088) / 256) * 480 fps */ {MBPS, ENC, CODECS_ALL, 64, 3916800, 1, 3916800}, /* ((1920 * 1088) / 256) * 960 fps */ @@ -252,7 +260,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { {MB_CYCLES_FW, ENC|DEC, CODECS_ALL, 326389, 326389, 1, 326389}, {MB_CYCLES_FW_VPP, ENC|DEC, CODECS_ALL, 44156, 44156, 1, 44156}, - {SECURE_MODE, ENC|DEC, H264|HEVC|VP9, + {SECURE_MODE, ENC|DEC, H264|HEVC|VP9|AV1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDC_SECURE, @@ -518,7 +526,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { {STAGE}, msm_vidc_adjust_lowlatency_mode, NULL}, - {LOWLATENCY_MODE, DEC, H264|HEVC|VP9, + {LOWLATENCY_MODE, DEC, H264|HEVC|VP9|AV1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDC_LOWLATENCY_REQUEST, @@ -967,7 +975,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { {0}, msm_vidc_adjust_entropy_mode, msm_vidc_set_u32}, - {ENTROPY_MODE, DEC, H264|HEVC|VP9, + {ENTROPY_MODE, DEC, H264|HEVC|VP9|AV1, V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC, V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC) | @@ -1060,6 +1068,60 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { {0}, NULL, msm_vidc_set_u32_enum}, + {PROFILE, DEC, AV1, + V4L2_MPEG_VIDEO_AV1_PROFILE_MAIN, + V4L2_MPEG_VIDEO_AV1_PROFILE_MAIN, + BIT(V4L2_MPEG_VIDEO_AV1_PROFILE_MAIN), + V4L2_MPEG_VIDEO_AV1_PROFILE_MAIN, + V4L2_CID_MPEG_VIDEO_AV1_PROFILE, + HFI_PROP_PROFILE, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {0}, + {0}, + NULL, msm_vidc_set_u32_enum}, + + {LEVEL, DEC, AV1, + V4L2_MPEG_VIDEO_AV1_LEVEL_2_0, + V4L2_MPEG_VIDEO_AV1_LEVEL_6_1, + BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_2_0) | + BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_2_2) | + BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_2_3) | + BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_3_0) | + BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_3_2) | + BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_3_3) | + BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_4_0) | + BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_4_2) | + BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_4_3) | + BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_5_0) | + BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_5_1) | + BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_5_2) | + BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_5_3) | + BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_6_0) | + BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_6_1), + V4L2_MPEG_VIDEO_AV1_LEVEL_6_1, + V4L2_CID_MPEG_VIDEO_AV1_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {0}, + {0}, + NULL, msm_vidc_set_u32_enum}, + + {AV1_TIER, DEC, AV1, + V4L2_MPEG_VIDEO_AV1_TIER_MAIN, + V4L2_MPEG_VIDEO_AV1_TIER_HIGH, + BIT(V4L2_MPEG_VIDEO_AV1_TIER_MAIN) | + BIT(V4L2_MPEG_VIDEO_AV1_TIER_HIGH), + V4L2_MPEG_VIDEO_AV1_TIER_HIGH, + V4L2_CID_MPEG_VIDEO_AV1_TIER, + HFI_PROP_TIER, + CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {0}, + {0}, + NULL, msm_vidc_set_u32_enum}, + {LEVEL, DEC, H264, V4L2_MPEG_VIDEO_H264_LEVEL_1_0, V4L2_MPEG_VIDEO_H264_LEVEL_6_2, @@ -1276,14 +1338,14 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { msm_vidc_adjust_chroma_qp_index_offset, msm_vidc_set_chroma_qp_index_offset}, - {DISPLAY_DELAY_ENABLE, DEC, H264|HEVC|VP9, + {DISPLAY_DELAY_ENABLE, DEC, H264|HEVC|VP9|AV1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY_ENABLE, HFI_PROP_DECODE_ORDER_OUTPUT, CAP_FLAG_ROOT | CAP_FLAG_INPUT_PORT}, - {DISPLAY_DELAY, DEC, H264|HEVC|VP9, + {DISPLAY_DELAY, DEC, H264|HEVC|VP9|AV1, 0, 1, 1, 0, V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY, HFI_PROP_DECODE_ORDER_OUTPUT, @@ -1348,7 +1410,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { 0, HFI_PROP_LUMA_CHROMA_BIT_DEPTH}, - {CODEC_CONFIG, DEC, H264|HEVC|HEIC, 0, 1, 1, 0, + {CODEC_CONFIG, DEC, H264|HEVC|HEIC|AV1, 0, 1, 1, 0, V4L2_CID_MPEG_VIDC_CODEC_CONFIG, 0, CAP_FLAG_DYNAMIC_ALLOWED}, @@ -1405,6 +1467,18 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { {0}, {0}, NULL, NULL}, + {FILM_GRAIN, DEC, AV1, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, + HFI_PROP_AV1_FILM_GRAIN_PRESENT}, + + {SUPER_BLOCK, DEC, AV1, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, + HFI_PROP_AV1_SUPER_BLOCK_ENABLED}, + {META_LTR_MARK_USE, ENC, H264|HEVC, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, @@ -1453,19 +1527,19 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { V4L2_CID_MPEG_VIDC_METADATA_HISTOGRAM_INFO, HFI_PROP_HISTOGRAM_INFO}, - {META_SEI_MASTERING_DISP, DEC|ENC, HEVC|HEIC, + {META_SEI_MASTERING_DISP, DEC|ENC, HEVC|HEIC|AV1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_SEI_MASTERING_DISPLAY_COLOUR, HFI_PROP_SEI_MASTERING_DISPLAY_COLOUR}, - {META_SEI_CLL, DEC|ENC, HEVC|HEIC, + {META_SEI_CLL, DEC|ENC, HEVC|HEIC|AV1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_SEI_CONTENT_LIGHT_LEVEL, HFI_PROP_SEI_CONTENT_LIGHT_LEVEL}, - {META_HDR10PLUS, DEC | ENC, HEVC|HEIC, + {META_HDR10PLUS, DEC | ENC, HEVC|HEIC|AV1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_HDR10PLUS, diff --git a/driver/variant/iris3/src/msm_vidc_buffer_iris3.c b/driver/variant/iris3/src/msm_vidc_buffer_iris3.c index 711c9059bd..aeca3bbe11 100644 --- a/driver/variant/iris3/src/msm_vidc_buffer_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_buffer_iris3.c @@ -58,7 +58,9 @@ static u32 msm_vidc_decoder_bin_size_iris3(struct msm_vidc_inst *inst) else if (inst->codec == MSM_VIDC_VP9) HFI_BUFFER_BIN_VP9D(size, width, height, 0, num_vpp_pipes); - + else if (inst->codec == MSM_VIDC_AV1) + HFI_BUFFER_BIN_AV1D(size, width, height, is_interlaced, + 0, num_vpp_pipes); i_vpr_l(inst, "%s: size %d\n", __func__, size); return size; } @@ -175,7 +177,9 @@ static u32 msm_vidc_decoder_line_size_iris3(struct msm_vidc_inst *inst) else if (inst->codec == MSM_VIDC_VP9) HFI_BUFFER_LINE_VP9D(size, width, height, out_min_count, is_opb, num_vpp_pipes); - + else if (inst->codec == MSM_VIDC_AV1) + HFI_BUFFER_LINE_AV1D(size, width, height, is_opb, + num_vpp_pipes); i_vpr_l(inst, "%s: size %d\n", __func__, size); return size; } @@ -195,7 +199,8 @@ static u32 msm_vidc_decoder_persist_size_iris3(struct msm_vidc_inst *inst) HFI_BUFFER_PERSIST_H265D(size); else if (inst->codec == MSM_VIDC_VP9) HFI_BUFFER_PERSIST_VP9D(size); - + else if (inst->codec == MSM_VIDC_AV1) + HFI_BUFFER_PERSIST_AV1D(size); i_vpr_l(inst, "%s: size %d\n", __func__, size); return size; } diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 91b3b59dbe..eda6bb5468 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -154,6 +154,7 @@ enum msm_vidc_codec_type { MSM_VIDC_HEVC = BIT(1), MSM_VIDC_VP9 = BIT(2), MSM_VIDC_HEIC = BIT(3), + MSM_VIDC_AV1 = BIT(4), }; enum priority_level { @@ -439,6 +440,7 @@ enum msm_vidc_inst_capability_type { PROFILE, LEVEL, HEVC_TIER, + AV1_TIER, LF_MODE, LF_ALPHA, LF_BETA, @@ -467,6 +469,8 @@ enum msm_vidc_inst_capability_type { PRIORITY, ENC_IP_CR, DPB_LIST, + FILM_GRAIN, + SUPER_BLOCK, ALL_INTRA, META_LTR_MARK_USE, META_DPB_MISR, @@ -711,6 +715,8 @@ struct msm_vidc_subscription_params { u32 profile; u32 level; u32 tier; + u32 av1_film_grain_present; + u32 av1_super_block_enabled; }; struct msm_vidc_hfi_frame_info { diff --git a/driver/vidc/src/hfi_packet.c b/driver/vidc/src/hfi_packet.c index 100cbc6a5e..3e234841c5 100644 --- a/driver/vidc/src/hfi_packet.c +++ b/driver/vidc/src/hfi_packet.c @@ -232,6 +232,8 @@ u32 get_hfi_codec(struct msm_vidc_inst *inst) return HFI_CODEC_DECODE_HEVC; case MSM_VIDC_VP9: return HFI_CODEC_DECODE_VP9; + case MSM_VIDC_AV1: + return HFI_CODEC_DECODE_AV1; default: i_vpr_e(inst, "invalid codec %d, domain %d\n", inst->codec, inst->domain); diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 628746e824..ce121369c1 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -55,6 +55,18 @@ static const u32 msm_vdec_subscribe_for_psc_vp9[] = { HFI_PROP_LEVEL, }; +static const u32 msm_vdec_subscribe_for_psc_av1[] = { + HFI_PROP_BITSTREAM_RESOLUTION, + HFI_PROP_CROP_OFFSETS, + HFI_PROP_LUMA_CHROMA_BIT_DEPTH, + HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT, + HFI_PROP_AV1_FILM_GRAIN_PRESENT, + HFI_PROP_AV1_SUPER_BLOCK_ENABLED, + HFI_PROP_PROFILE, + HFI_PROP_LEVEL, + HFI_PROP_TIER, +}; + static const u32 msm_vdec_input_subscribe_for_properties[] = { HFI_PROP_NO_OUTPUT, }; @@ -526,6 +538,66 @@ static int msm_vdec_set_tier(struct msm_vidc_inst *inst, return rc; } +static int msm_vdec_set_av1_film_grain_present(struct msm_vidc_inst *inst, + enum msm_vidc_port_type port) +{ + int rc = 0; + u32 fg_present; + + if (port != INPUT_PORT && port != OUTPUT_PORT) { + i_vpr_e(inst, "%s: invalid port %d\n", __func__, port); + return -EINVAL; + } + + inst->subcr_params[port].av1_film_grain_present = + inst->capabilities->cap[FILM_GRAIN].value; + fg_present = inst->subcr_params[port].av1_film_grain_present; + i_vpr_h(inst, "%s: film grain present: %d", __func__, fg_present); + rc = venus_hfi_session_property(inst, + HFI_PROP_AV1_FILM_GRAIN_PRESENT, + HFI_HOST_FLAGS_NONE, + get_hfi_port(inst, port), + HFI_PAYLOAD_U32_ENUM, + &fg_present, + sizeof(u32)); + if (rc) { + i_vpr_e(inst, "%s: set property failed\n", __func__); + return rc; + } + + return rc; +} + +static int msm_vdec_set_av1_superblock_enabled(struct msm_vidc_inst *inst, + enum msm_vidc_port_type port) +{ + int rc = 0; + u32 sb_enabled; + + if (port != INPUT_PORT && port != OUTPUT_PORT) { + i_vpr_e(inst, "%s: invalid port %d\n", __func__, port); + return -EINVAL; + } + + inst->subcr_params[port].av1_super_block_enabled = + inst->capabilities->cap[SUPER_BLOCK].value; + sb_enabled = inst->subcr_params[port].av1_super_block_enabled; + i_vpr_h(inst, "%s: super block enabled: %d", __func__, sb_enabled); + rc = venus_hfi_session_property(inst, + HFI_PROP_AV1_SUPER_BLOCK_ENABLED, + HFI_HOST_FLAGS_NONE, + get_hfi_port(inst, port), + HFI_PAYLOAD_U32_ENUM, + &sb_enabled, + sizeof(u32)); + if (rc) { + i_vpr_e(inst, "%s: set property failed\n", __func__); + return rc; + } + + return rc; +} + static int msm_vdec_set_colorformat(struct msm_vidc_inst *inst) { int rc = 0; @@ -921,6 +993,8 @@ static int msm_vdec_subscribe_input_port_settings_change(struct msm_vidc_inst *i {HFI_PROP_PROFILE, msm_vdec_set_profile }, {HFI_PROP_LEVEL, msm_vdec_set_level }, {HFI_PROP_TIER, msm_vdec_set_tier }, + {HFI_PROP_AV1_FILM_GRAIN_PRESENT, msm_vdec_set_av1_film_grain_present }, + {HFI_PROP_AV1_SUPER_BLOCK_ENABLED, msm_vdec_set_av1_superblock_enabled }, }; if (!inst || !inst->core) { @@ -940,6 +1014,9 @@ static int msm_vdec_subscribe_input_port_settings_change(struct msm_vidc_inst *i } else if (inst->codec == MSM_VIDC_VP9) { subscribe_psc_size = ARRAY_SIZE(msm_vdec_subscribe_for_psc_vp9); psc = msm_vdec_subscribe_for_psc_vp9; + } else if (inst->codec == MSM_VIDC_AV1) { + subscribe_psc_size = ARRAY_SIZE(msm_vdec_subscribe_for_psc_av1); + psc = msm_vdec_subscribe_for_psc_av1; } else { i_vpr_e(inst, "%s: unsupported codec: %d\n", __func__, inst->codec); psc = NULL; @@ -1324,6 +1401,12 @@ static int msm_vdec_read_input_subcr_params(struct msm_vidc_inst *inst) msm_vidc_update_cap_value(inst, CODED_FRAMES, CODED_FRAMES_PROGRESSIVE, __func__); else msm_vidc_update_cap_value(inst, CODED_FRAMES, CODED_FRAMES_INTERLACE, __func__); + if (inst->codec == MSM_VIDC_AV1) { + msm_vidc_update_cap_value(inst, FILM_GRAIN, + subsc_params.av1_film_grain_present, __func__); + msm_vidc_update_cap_value(inst, SUPER_BLOCK, + subsc_params.av1_super_block_enabled, __func__); + } return 0; } @@ -1547,6 +1630,9 @@ static int msm_vdec_subscribe_output_port_settings_change(struct msm_vidc_inst * } else if (inst->codec == MSM_VIDC_VP9) { subscribe_psc_size = ARRAY_SIZE(msm_vdec_subscribe_for_psc_vp9); psc = msm_vdec_subscribe_for_psc_vp9; + } else if (inst->codec == MSM_VIDC_AV1) { + subscribe_psc_size = ARRAY_SIZE(msm_vdec_subscribe_for_psc_av1); + psc = msm_vdec_subscribe_for_psc_av1; } else { i_vpr_e(inst, "%s: unsupported codec: %d\n", __func__, inst->codec); psc = NULL; @@ -1629,6 +1715,16 @@ static int msm_vdec_subscribe_output_port_settings_change(struct msm_vidc_inst * payload_size = sizeof(u32); payload_type = HFI_PAYLOAD_U32; break; + case HFI_PROP_AV1_FILM_GRAIN_PRESENT: + payload[0] = subsc_params.av1_film_grain_present; + payload_size = sizeof(u32); + payload_type = HFI_PAYLOAD_U32; + break; + case HFI_PROP_AV1_SUPER_BLOCK_ENABLED: + payload[0] = subsc_params.av1_super_block_enabled; + payload_size = sizeof(u32); + payload_type = HFI_PAYLOAD_U32; + break; default: i_vpr_e(inst, "%s: unknown property %#x\n", __func__, prop_type); diff --git a/driver/vidc/src/msm_vidc_buffer.c b/driver/vidc/src/msm_vidc_buffer.c index 0d105f631c..437a30dcbd 100644 --- a/driver/vidc/src/msm_vidc_buffer.c +++ b/driver/vidc/src/msm_vidc_buffer.c @@ -72,6 +72,10 @@ u32 msm_vidc_output_min_count(struct msm_vidc_inst *inst) case MSM_VIDC_VP9: output_min_count = 9; break; + case MSM_VIDC_AV1: + // TODO: needs review + output_min_count = 11; + break; case MSM_VIDC_HEIC: output_min_count = 3; break; @@ -252,6 +256,7 @@ u32 msm_vidc_decoder_input_size(struct msm_vidc_inst *inst) /* multiply by 10/8 (1.25) to get size for 10 bit case */ if (f->fmt.pix_mp.pixelformat == V4L2_PIX_FMT_VP9 || + f->fmt.pix_mp.pixelformat == V4L2_PIX_FMT_AV1 || f->fmt.pix_mp.pixelformat == V4L2_PIX_FMT_HEVC || f->fmt.pix_mp.pixelformat == V4L2_PIX_FMT_HEIC) frame_size = frame_size + (frame_size >> 2); diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index e5c1b7cb96..7a6366a5b3 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -3684,9 +3684,12 @@ int msm_vidc_v4l2_to_hfi_enum(struct msm_vidc_inst *inst, case V4L2_CID_MPEG_VIDEO_HEVC_PROFILE: case V4L2_CID_MPEG_VIDEO_H264_PROFILE: case V4L2_CID_MPEG_VIDEO_VP9_PROFILE: + case V4L2_CID_MPEG_VIDEO_AV1_PROFILE: case V4L2_CID_MPEG_VIDEO_HEVC_LEVEL: case V4L2_CID_MPEG_VIDEO_H264_LEVEL: + case V4L2_CID_MPEG_VIDEO_AV1_LEVEL: case V4L2_CID_MPEG_VIDEO_HEVC_TIER: + case V4L2_CID_MPEG_VIDEO_AV1_TIER: case V4L2_CID_MPEG_VIDC_VIDEO_BLUR_TYPES: *value = capability->cap[cap_id].value; return 0; diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 3ce8901bb0..cd1345006d 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -136,6 +136,7 @@ static const struct msm_vidc_cap_name cap_name_arr[] = { {PROFILE, "PROFILE" }, {LEVEL, "LEVEL" }, {HEVC_TIER, "HEVC_TIER" }, + {AV1_TIER, "AV1_TIER" }, {LF_MODE, "LF_MODE" }, {LF_ALPHA, "LF_ALPHA" }, {LF_BETA, "LF_BETA" }, @@ -362,6 +363,7 @@ const char *v4l2_pixelfmt_name(u32 pixfmt) case V4L2_PIX_FMT_HEVC: return "HEVC"; case V4L2_PIX_FMT_HEIC: return "HEIC"; case V4L2_PIX_FMT_VP9: return "VP9"; + case V4L2_PIX_FMT_AV1: return "AV1"; /* meta port */ case V4L2_META_FMT_VIDC: return "META"; } @@ -507,6 +509,9 @@ enum msm_vidc_codec_type v4l2_codec_to_driver(u32 v4l2_codec, const char *func) case V4L2_PIX_FMT_VP9: codec = MSM_VIDC_VP9; break; + case V4L2_PIX_FMT_AV1: + codec = MSM_VIDC_AV1; + break; case V4L2_PIX_FMT_HEIC: codec = MSM_VIDC_HEIC; break; @@ -531,6 +536,9 @@ u32 v4l2_codec_from_driver(enum msm_vidc_codec_type codec, const char *func) case MSM_VIDC_VP9: v4l2_codec = V4L2_PIX_FMT_VP9; break; + case MSM_VIDC_AV1: + v4l2_codec = V4L2_PIX_FMT_AV1; + break; case MSM_VIDC_HEIC: v4l2_codec = V4L2_PIX_FMT_HEIC; break; @@ -5158,6 +5166,7 @@ static const char *get_codec_str(enum msm_vidc_codec_type type) case MSM_VIDC_H264: return "h264"; case MSM_VIDC_HEVC: return "h265"; case MSM_VIDC_VP9: return " vp9"; + case MSM_VIDC_AV1: return " av1"; case MSM_VIDC_HEIC: return "heic"; } diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index 4f328a0261..b8b7fe212d 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -47,14 +47,15 @@ void print_psc_properties(const char *str, struct msm_vidc_inst *inst, i_vpr_h(inst, "%s: width %d, height %d, crop offsets[0] %#x, crop offsets[1] %#x, bit depth %#x, coded frames %d " - "fw min count %d, poc %d, color info %d, profile %d, level %d, tier %d\n", + "fw min count %d, poc %d, color info %d, profile %d, level %d, tier %d, fg present %d, sb enabled %d\n", str, (subsc_params.bitstream_resolution & HFI_BITMASK_BITSTREAM_WIDTH) >> 16, (subsc_params.bitstream_resolution & HFI_BITMASK_BITSTREAM_HEIGHT), subsc_params.crop_offsets[0], subsc_params.crop_offsets[1], subsc_params.bit_depth, subsc_params.coded_frames, subsc_params.fw_min_count, subsc_params.pic_order_cnt, subsc_params.color_info, subsc_params.profile, subsc_params.level, - subsc_params.tier); + subsc_params.tier, subsc_params.av1_film_grain_present, + subsc_params.av1_super_block_enabled); } static void print_sfr_message(struct msm_vidc_core *core) @@ -574,7 +575,7 @@ static int get_driver_buffer_flags(struct msm_vidc_inst *inst, u32 hfi_flags) } else if (inst->hfi_frame_info.picture_type & HFI_PICTURE_B) { driver_flags |= MSM_VIDC_BUF_FLAG_BFRAME; } else if (inst->hfi_frame_info.picture_type & HFI_PICTURE_I) { - if (inst->codec == MSM_VIDC_VP9) + if (inst->codec == MSM_VIDC_VP9 || inst->codec == MSM_VIDC_AV1) driver_flags |= MSM_VIDC_BUF_FLAG_KEYFRAME; } else if (inst->hfi_frame_info.picture_type & HFI_PICTURE_CRA) { driver_flags |= MSM_VIDC_BUF_FLAG_KEYFRAME; @@ -1387,6 +1388,12 @@ static int handle_session_property(struct msm_vidc_inst *inst, case HFI_PROP_TIER: inst->subcr_params[port].tier = payload_ptr[0]; break; + case HFI_PROP_AV1_FILM_GRAIN_PRESENT: + inst->subcr_params[port].av1_film_grain_present = payload_ptr[0]; + break; + case HFI_PROP_AV1_SUPER_BLOCK_ENABLED: + inst->subcr_params[port].av1_super_block_enabled = payload_ptr[0]; + break; case HFI_PROP_PICTURE_TYPE: inst->hfi_frame_info.picture_type = payload_ptr[0]; if (inst->hfi_frame_info.picture_type & HFI_PICTURE_B) From a723e35a03c2139cbec8f73cea17abd17bf93e60 Mon Sep 17 00:00:00 2001 From: Mihir Ganu Date: Sun, 12 Dec 2021 21:07:02 -0800 Subject: [PATCH 0481/1061] video: driver: Add support to set AV1 bitstream format Add support to set AV1 decoder bitstream format (low-overhead or Annex-B). Change-Id: Ie36eefe0488bf33af91802c0bee51b3fec2024ac Signed-off-by: Mihir Ganu --- driver/platform/kalama/src/msm_vidc_kalama.c | 6 ++++ driver/vidc/src/msm_vdec.c | 36 ++++++++++++++++++++ driver/vidc/src/msm_vidc_driver.c | 2 ++ 3 files changed, 44 insertions(+) diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index dc0aeee905..11d7fc5046 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -347,6 +347,12 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { {0}, {0}, NULL, msm_vidc_set_nal_length}, + {WITHOUT_STARTCODE, DEC, AV1, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_DISABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE, + HFI_PROP_NAL_LENGTH_FIELD}, + {NAL_LENGTH_FIELD, ENC, CODECS_ALL, V4L2_MPEG_VIDEO_HEVC_SIZE_0, V4L2_MPEG_VIDEO_HEVC_SIZE_4, diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index ce121369c1..b53778d37b 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -796,6 +796,38 @@ static int msm_vdec_set_host_max_buf_count(struct msm_vidc_inst *inst, return 0; } +static int msm_vdec_set_av1_bitstream_format(struct msm_vidc_inst *inst, + enum msm_vidc_port_type port) +{ + int rc = 0; + u32 annex_b; + + if (inst->codec != MSM_VIDC_AV1) + return 0; + + if (inst->capabilities->cap[WITHOUT_STARTCODE].value) { + i_vpr_e(inst, + "%s: Annex-B format is not supported\n", __func__); + return -EINVAL; + } + + annex_b = 0; + i_vpr_h(inst, "%s: annex_b: %u\n", __func__, annex_b); + rc = venus_hfi_session_property(inst, + HFI_PROP_NAL_LENGTH_FIELD, + HFI_HOST_FLAGS_NONE, + get_hfi_port(inst, port), + HFI_PAYLOAD_U32, + &annex_b, + sizeof(u32)); + if (rc) { + i_vpr_e(inst, "%s: set property failed\n", __func__); + return rc; + } + + return rc; +} + static int msm_vdec_set_input_properties(struct msm_vidc_inst *inst) { int rc = 0; @@ -837,6 +869,10 @@ static int msm_vdec_set_input_properties(struct msm_vidc_inst *inst) if (rc) return rc; + rc = msm_vdec_set_av1_bitstream_format(inst, INPUT_PORT); + if (rc) + return rc; + return rc; } diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index cd1345006d..cb0b452f79 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -156,6 +156,8 @@ static const struct msm_vidc_cap_name cap_name_arr[] = { {QUALITY_MODE, "QUALITY_MODE" }, {CODED_FRAMES, "CODED_FRAMES" }, {BIT_DEPTH, "BIT_DEPTH" }, + {FILM_GRAIN, "FILM_GRAIN" }, + {SUPER_BLOCK, "SUPER_BLOCK" }, {CODEC_CONFIG, "CODEC_CONFIG" }, {BITSTREAM_SIZE_OVERWRITE, "BITSTREAM_SIZE_OVERWRITE" }, {THUMBNAIL_MODE, "THUMBNAIL_MODE" }, From 2f7df152f28c2bf6884dd39200c49a8bf8c23430 Mon Sep 17 00:00:00 2001 From: Mihir Ganu Date: Thu, 16 Dec 2021 14:33:22 -0800 Subject: [PATCH 0482/1061] video: driver: Add support to set AV1 operating point Add support to set AV1 operating point to firmware. Change-Id: If0f31c2bf04cb6d4f783264fb3ce706b1bf98261 Signed-off-by: Mihir Ganu --- driver/platform/kalama/src/msm_vidc_kalama.c | 6 ++++ driver/vidc/src/msm_vdec.c | 30 ++++++++++++++++++++ driver/vidc/src/msm_vidc_driver.c | 4 +-- 3 files changed, 38 insertions(+), 2 deletions(-) diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index 11d7fc5046..cafaf8e8f3 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -17,6 +17,7 @@ #define DEFAULT_VIDEO_CONCEAL_COLOR_BLACK 0x8020010 #define MAX_LTR_FRAME_COUNT 2 #define MAX_BASE_LAYER_PRIORITY_ID 63 +#define MAX_OP_POINT 31 #define MAX_BITRATE 220000000 #define DEFAULT_BITRATE 20000000 #define MINIMUM_FPS 1 @@ -844,6 +845,11 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { {GOP_SIZE, B_FRAME, BIT_RATE, MIN_QUALITY}, msm_vidc_adjust_layer_count, msm_vidc_set_layer_count_and_type}, + {ENH_LAYER_COUNT, DEC, AV1, + 0, MAX_OP_POINT, 1, 0, + 0, + HFI_PROP_AV1_OP_POINT}, + /* * layer bitrate is treated as BIT_RATE cap sibling and * is handled in bitrate adjust and set functions diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index b53778d37b..9bf3a354bd 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -828,6 +828,32 @@ static int msm_vdec_set_av1_bitstream_format(struct msm_vidc_inst *inst, return rc; } +static int msm_vdec_set_av1_operating_point(struct msm_vidc_inst *inst, + enum msm_vidc_port_type port) +{ + int rc = 0; + u32 op_point; + + if (inst->codec != MSM_VIDC_AV1) + return 0; + + op_point = inst->capabilities->cap[ENH_LAYER_COUNT].value; + i_vpr_h(inst, "%s: op_point: %u\n", __func__, op_point); + rc = venus_hfi_session_property(inst, + HFI_PROP_AV1_OP_POINT, + HFI_HOST_FLAGS_NONE, + get_hfi_port(inst, port), + HFI_PAYLOAD_U32, + &op_point, + sizeof(u32)); + if (rc) { + i_vpr_e(inst, "%s: set property failed\n", __func__); + return rc; + } + + return rc; +} + static int msm_vdec_set_input_properties(struct msm_vidc_inst *inst) { int rc = 0; @@ -873,6 +899,10 @@ static int msm_vdec_set_input_properties(struct msm_vidc_inst *inst) if (rc) return rc; + rc = msm_vdec_set_av1_operating_point(inst, INPUT_PORT); + if (rc) + return rc; + return rc; } diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index cb0b452f79..6008548815 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -156,8 +156,6 @@ static const struct msm_vidc_cap_name cap_name_arr[] = { {QUALITY_MODE, "QUALITY_MODE" }, {CODED_FRAMES, "CODED_FRAMES" }, {BIT_DEPTH, "BIT_DEPTH" }, - {FILM_GRAIN, "FILM_GRAIN" }, - {SUPER_BLOCK, "SUPER_BLOCK" }, {CODEC_CONFIG, "CODEC_CONFIG" }, {BITSTREAM_SIZE_OVERWRITE, "BITSTREAM_SIZE_OVERWRITE" }, {THUMBNAIL_MODE, "THUMBNAIL_MODE" }, @@ -167,6 +165,8 @@ static const struct msm_vidc_cap_name cap_name_arr[] = { {PRIORITY, "PRIORITY" }, {ENC_IP_CR, "ENC_IP_CR" }, {DPB_LIST, "DPB_LIST" }, + {FILM_GRAIN, "FILM_GRAIN" }, + {SUPER_BLOCK, "SUPER_BLOCK" }, {ALL_INTRA, "ALL_INTRA" }, {META_LTR_MARK_USE, "META_LTR_MARK_USE" }, {META_DPB_MISR, "META_DPB_MISR" }, From 8d0f720028cc39255785bba1c44a356b2c59fa2b Mon Sep 17 00:00:00 2001 From: Dikshita Agarwal Date: Wed, 15 Dec 2021 15:15:15 +0530 Subject: [PATCH 0483/1061] video: driver: fix usage of v4l2_fh - Do not clear V4L2_FL_USES_V4L2_FH flag because this flag indicates that file->private_data points to &struct v4l2_fh. - Initialize v4l2 ctrl handler with driver ctrl handler. - Add ctrl ops for g_volatile_ctrl to return updated value of volatile ctrls from driver. Fixes: v4l2-compliance: testPrio (VIDIOC_G/S_PRIORITY). testQueryControls (VIDIOC_QUERYCTRL). Change-Id: Ibe4b6fa67d2c02a5afeb627f2060e4761c5ef717 Signed-off-by: Dikshita Agarwal --- driver/vidc/inc/msm_vidc.h | 2 -- driver/vidc/inc/msm_vidc_control.h | 1 + driver/vidc/inc/msm_vidc_v4l2.h | 4 --- driver/vidc/src/msm_vidc.c | 44 ----------------------- driver/vidc/src/msm_vidc_control.c | 42 ++++++++++++++++++++++ driver/vidc/src/msm_vidc_driver.c | 5 ++- driver/vidc/src/msm_vidc_platform.c | 5 +-- driver/vidc/src/msm_vidc_v4l2.c | 54 ----------------------------- 8 files changed, 48 insertions(+), 109 deletions(-) diff --git a/driver/vidc/inc/msm_vidc.h b/driver/vidc/inc/msm_vidc.h index 9ea2ee435f..2cd6bc6e8c 100644 --- a/driver/vidc/inc/msm_vidc.h +++ b/driver/vidc/inc/msm_vidc.h @@ -25,10 +25,8 @@ int msm_vidc_s_selection(void* instance, struct v4l2_selection* s); int msm_vidc_g_selection(void* instance, struct v4l2_selection* s); int msm_vidc_s_param(void *instance, struct v4l2_streamparm *sp); int msm_vidc_g_param(void *instance, struct v4l2_streamparm *sp); -int msm_vidc_s_ctrl(void *instance, struct v4l2_control *a); int msm_vidc_s_ext_ctrl(void *instance, struct v4l2_ext_controls *a); int msm_vidc_g_ext_ctrl(void *instance, struct v4l2_ext_controls *a); -int msm_vidc_g_ctrl(void *instance, struct v4l2_control *a); int msm_vidc_reqbufs(void *instance, struct v4l2_requestbuffers *b); int msm_vidc_release_buffer(void *instance, int buffer_type, unsigned int buffer_index); diff --git a/driver/vidc/inc/msm_vidc_control.h b/driver/vidc/inc/msm_vidc_control.h index 1f6a3ded26..d85577fd10 100644 --- a/driver/vidc/inc/msm_vidc_control.h +++ b/driver/vidc/inc/msm_vidc_control.h @@ -13,6 +13,7 @@ int msm_vidc_ctrl_init(struct msm_vidc_inst *inst); int msm_vidc_ctrl_deinit(struct msm_vidc_inst *inst); int msm_v4l2_op_s_ctrl(struct v4l2_ctrl *ctrl); +int msm_v4l2_op_g_volatile_ctrl(struct v4l2_ctrl *ctrl); int msm_vidc_adjust_bitrate(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_dynamic_layer_bitrate(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_bitrate_mode(void *instance, struct v4l2_ctrl *ctrl); diff --git a/driver/vidc/inc/msm_vidc_v4l2.h b/driver/vidc/inc/msm_vidc_v4l2.h index 579b2d349f..4adbad56e6 100644 --- a/driver/vidc/inc/msm_vidc_v4l2.h +++ b/driver/vidc/inc/msm_vidc_v4l2.h @@ -32,10 +32,6 @@ int msm_v4l2_s_parm(struct file *file, void *fh, struct v4l2_streamparm *a); int msm_v4l2_g_parm(struct file *file, void *fh, struct v4l2_streamparm *a); -int msm_v4l2_s_ctrl(struct file *file, void *fh, - struct v4l2_control *a); -int msm_v4l2_g_ctrl(struct file *file, void *fh, - struct v4l2_control *a); int msm_v4l2_reqbufs(struct file *file, void *fh, struct v4l2_requestbuffers *b); int msm_v4l2_qbuf(struct file *file, void *fh, diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index 81924a65a4..ef77d08d22 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -375,50 +375,6 @@ int msm_vidc_g_param(void *instance, struct v4l2_streamparm *param) } EXPORT_SYMBOL(msm_vidc_g_param); -int msm_vidc_s_ctrl(void *instance, struct v4l2_control *control) -{ - struct msm_vidc_inst *inst = instance; - - if (!inst || !control) - return -EINVAL; - - if (!msm_vidc_allow_s_ctrl(inst, control->id)) - return -EBUSY; - - return v4l2_s_ctrl(NULL, &inst->ctrl_handler, control); -} -EXPORT_SYMBOL(msm_vidc_s_ctrl); - -int msm_vidc_g_ctrl(void *instance, struct v4l2_control *control) -{ - struct msm_vidc_inst *inst = instance; - struct v4l2_ctrl *ctrl = NULL; - int rc = 0; - - if (!inst || !control) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - ctrl = v4l2_ctrl_find(&inst->ctrl_handler, control->id); - if (ctrl) { - rc = msm_vidc_get_control(inst, ctrl); - if (!rc) - control->value = ctrl->val; - } else { - i_vpr_e(inst, "%s: invalid control\n", __func__); - return -EINVAL; - } - - if (rc) - i_vpr_e(inst, "%s: failed for control id %#x\n", - __func__, control->id); - else - i_vpr_h(inst, "%s: control id %#x, value %d\n", - __func__, control->id, control->value); - return rc; -} -EXPORT_SYMBOL(msm_vidc_g_ctrl); - int msm_vidc_reqbufs(void *instance, struct v4l2_requestbuffers *b) { int rc = 0; diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 7a6366a5b3..6d6c7e4011 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -535,6 +535,13 @@ exit: return rc; } +void msm_vidc_add_volatile_flag(struct v4l2_ctrl *ctrl) +{ + if (ctrl->id == V4L2_CID_MIN_BUFFERS_FOR_OUTPUT || + ctrl->id == V4L2_CID_MIN_BUFFERS_FOR_CAPTURE) + ctrl->flags |= V4L2_CTRL_FLAG_VOLATILE; +} + int msm_vidc_ctrl_deinit(struct msm_vidc_inst *inst) { if (!inst) { @@ -690,6 +697,7 @@ int msm_vidc_ctrl_init(struct msm_vidc_inst *inst) * TODO(AS) * ctrl->flags |= capability->cap[idx].flags; */ + msm_vidc_add_volatile_flag(ctrl); ctrl->flags |= V4L2_CTRL_FLAG_EXECUTE_ON_WRITE; inst->ctrls[ctrl_idx] = ctrl; ctrl_idx++; @@ -786,6 +794,34 @@ static int msm_vidc_allow_secure_session(struct msm_vidc_inst *inst) return rc; } +int msm_v4l2_op_g_volatile_ctrl(struct v4l2_ctrl *ctrl) +{ + int rc = 0; + struct msm_vidc_inst *inst; + + if (!ctrl) { + d_vpr_e("%s: invalid ctrl parameter\n", __func__); + return -EINVAL; + } + + inst = container_of(ctrl->handler, + struct msm_vidc_inst, ctrl_handler); + if (!inst) { + d_vpr_e("%s: could not find inst for ctrl %s id %#x\n", __func__, ctrl->name, ctrl->id); + return -EINVAL; + } + + rc = msm_vidc_get_control(inst, ctrl); + if (rc) + i_vpr_e(inst, "%s: failed for ctrl %s id %#x\n", + __func__, ctrl->name, ctrl->id); + else + i_vpr_h(inst, "%s: ctrl %s id %#x, value %d\n", + __func__, ctrl->name, ctrl->id, ctrl->val); + + return rc; +} + int msm_v4l2_op_s_ctrl(struct v4l2_ctrl *ctrl) { int rc = 0; @@ -812,6 +848,12 @@ int msm_v4l2_op_s_ctrl(struct v4l2_ctrl *ctrl) i_vpr_h(inst, "%s: state %d, name %s, id 0x%x value %d\n", __func__, inst->state, ctrl->name, ctrl->id, ctrl->val); + if (!msm_vidc_allow_s_ctrl(inst, ctrl->id)) { + i_vpr_e(inst, "%s: state %d, name %s, id %#x not allowed\n", + __func__, inst->state, ctrl->name, ctrl->id, ctrl->val); + return -EBUSY; + } + cap_id = msm_vidc_get_cap_id(inst, ctrl->id); if (cap_id == INST_CAP_NONE) { i_vpr_e(inst, "%s: could not find cap_id for ctrl %s\n", diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index cd1345006d..906c448d4b 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -1954,7 +1954,9 @@ int msm_vidc_get_control(struct msm_vidc_inst *inst, struct v4l2_ctrl *ctrl) i_vpr_h(inst, "g_min: input buffers %d\n", ctrl->val); break; default: - break; + i_vpr_e(inst, "invalid ctrl %s id %d\n", + ctrl->name, ctrl->id); + return -EINVAL; } return rc; @@ -3513,6 +3515,7 @@ int msm_vidc_event_queue_init(struct msm_vidc_inst *inst) return -EINVAL; v4l2_fh_init(&inst->event_handler, &core->vdev[index].vdev); + inst->event_handler.ctrl_handler = &inst->ctrl_handler; v4l2_fh_add(&inst->event_handler); return rc; diff --git a/driver/vidc/src/msm_vidc_platform.c b/driver/vidc/src/msm_vidc_platform.c index 90e7da28dc..692691f2d1 100644 --- a/driver/vidc/src/msm_vidc_platform.c +++ b/driver/vidc/src/msm_vidc_platform.c @@ -64,8 +64,6 @@ static struct v4l2_ioctl_ops msm_v4l2_ioctl_ops_enc = { .vidioc_dqbuf = msm_v4l2_dqbuf, .vidioc_streamon = msm_v4l2_streamon, .vidioc_streamoff = msm_v4l2_streamoff, - .vidioc_s_ctrl = msm_v4l2_s_ctrl, - .vidioc_g_ctrl = msm_v4l2_g_ctrl, .vidioc_queryctrl = msm_v4l2_queryctrl, .vidioc_querymenu = msm_v4l2_querymenu, .vidioc_subscribe_event = msm_v4l2_subscribe_event, @@ -102,8 +100,6 @@ static struct v4l2_ioctl_ops msm_v4l2_ioctl_ops_dec = { .vidioc_dqbuf = msm_v4l2_dqbuf, .vidioc_streamon = msm_v4l2_streamon, .vidioc_streamoff = msm_v4l2_streamoff, - .vidioc_s_ctrl = msm_v4l2_s_ctrl, - .vidioc_g_ctrl = msm_v4l2_g_ctrl, .vidioc_queryctrl = msm_v4l2_queryctrl, .vidioc_querymenu = msm_v4l2_querymenu, .vidioc_subscribe_event = msm_v4l2_subscribe_event, @@ -113,6 +109,7 @@ static struct v4l2_ioctl_ops msm_v4l2_ioctl_ops_dec = { static struct v4l2_ctrl_ops msm_v4l2_ctrl_ops = { .s_ctrl = msm_v4l2_op_s_ctrl, + .g_volatile_ctrl = msm_v4l2_op_g_volatile_ctrl, }; static struct vb2_ops msm_vb2_ops = { diff --git a/driver/vidc/src/msm_vidc_v4l2.c b/driver/vidc/src/msm_vidc_v4l2.c index fa978eeffc..3b30cd8716 100644 --- a/driver/vidc/src/msm_vidc_v4l2.c +++ b/driver/vidc/src/msm_vidc_v4l2.c @@ -45,7 +45,6 @@ int msm_v4l2_open(struct file *filp) trace_msm_v4l2_vidc_open("END", NULL); return -ENOMEM; } - clear_bit(V4L2_FL_USES_V4L2_FH, &vdev->flags); filp->private_data = &(inst->event_handler); trace_msm_v4l2_vidc_open("END", inst); return 0; @@ -300,59 +299,6 @@ unlock: return rc; } -int msm_v4l2_s_ctrl(struct file *filp, void *fh, - struct v4l2_control *a) -{ - struct msm_vidc_inst *inst = get_vidc_inst(filp, fh); - int rc = 0; - - inst = get_inst_ref(g_core, inst); - if (!inst) { - d_vpr_e("%s: invalid instance\n", __func__); - return -EINVAL; - } - - inst_lock(inst, __func__); - if (is_session_error(inst)) { - i_vpr_e(inst, "%s: inst in error state\n", __func__); - rc = -EBUSY; - goto unlock; - } - rc = msm_vidc_s_ctrl((void *)inst, a); - if (rc) - goto unlock; - -unlock: - inst_unlock(inst, __func__); - put_inst(inst); - - return rc; -} - -int msm_v4l2_g_ctrl(struct file *filp, void *fh, - struct v4l2_control *a) -{ - struct msm_vidc_inst *inst = get_vidc_inst(filp, fh); - int rc = 0; - - inst = get_inst_ref(g_core, inst); - if (!inst) { - d_vpr_e("%s: invalid instance\n", __func__); - return -EINVAL; - } - - inst_lock(inst, __func__); - rc = msm_vidc_g_ctrl((void *)inst, a); - if (rc) - goto unlock; - -unlock: - inst_unlock(inst, __func__); - put_inst(inst); - - return rc; -} - int msm_v4l2_reqbufs(struct file *filp, void *fh, struct v4l2_requestbuffers *b) { From c790532a9b0c6b7e536c6ea71dc46fa0fc211f70 Mon Sep 17 00:00:00 2001 From: Dikshita Agarwal Date: Tue, 29 Jun 2021 11:14:20 +0530 Subject: [PATCH 0484/1061] video: driver: add support for VIDIOC_TRY_DECODER/ENCODER_CMD Decoder needs to support VIDIOC_TRY_DECODER_CMD and Encoder needs to be support VIDIOC_TRY_ENCODER_CMD. Partially Fixes: V4l2-complience: testDecoder(VIDIOC_(TRY)_DECODER_CMD) for decoder. testEncoder(VIDIOC_(TRY)_ENCODER_CMD) for encoder. Change-Id: Ia68587412ed316f0c871397da83d6c56665cfbb5 Signed-off-by: Dikshita Agarwal --- driver/vidc/inc/msm_vidc.h | 1 + driver/vidc/inc/msm_vidc_v4l2.h | 4 ++ driver/vidc/src/msm_vidc.c | 31 +++++++++++++++ driver/vidc/src/msm_vidc_platform.c | 2 + driver/vidc/src/msm_vidc_v4l2.c | 58 +++++++++++++++++++++++++++++ 5 files changed, 96 insertions(+) diff --git a/driver/vidc/inc/msm_vidc.h b/driver/vidc/inc/msm_vidc.h index 9ea2ee435f..f8be2b787e 100644 --- a/driver/vidc/inc/msm_vidc.h +++ b/driver/vidc/inc/msm_vidc.h @@ -39,6 +39,7 @@ int msm_vidc_streamon(void *instance, enum v4l2_buf_type i); int msm_vidc_query_ctrl(void *instance, struct v4l2_queryctrl *ctrl); int msm_vidc_query_menu(void *instance, struct v4l2_querymenu *qmenu); int msm_vidc_streamoff(void *instance, enum v4l2_buf_type i); +int msm_vidc_try_cmd(void *instance, union msm_v4l2_cmd *cmd); int msm_vidc_cmd(void *instance, union msm_v4l2_cmd *cmd); int msm_vidc_poll(void *instance, struct file *filp, struct poll_table_struct *pt); diff --git a/driver/vidc/inc/msm_vidc_v4l2.h b/driver/vidc/inc/msm_vidc_v4l2.h index 579b2d349f..d4f387198c 100644 --- a/driver/vidc/inc/msm_vidc_v4l2.h +++ b/driver/vidc/inc/msm_vidc_v4l2.h @@ -50,8 +50,12 @@ int msm_v4l2_subscribe_event(struct v4l2_fh *fh, const struct v4l2_event_subscription *sub); int msm_v4l2_unsubscribe_event(struct v4l2_fh *fh, const struct v4l2_event_subscription *sub); +int msm_v4l2_try_decoder_cmd(struct file *file, void *fh, + struct v4l2_decoder_cmd *enc); int msm_v4l2_decoder_cmd(struct file *file, void *fh, struct v4l2_decoder_cmd *dec); +int msm_v4l2_try_encoder_cmd(struct file *file, void *fh, + struct v4l2_encoder_cmd *enc); int msm_v4l2_encoder_cmd(struct file *file, void *fh, struct v4l2_encoder_cmd *enc); int msm_v4l2_enum_framesizes(struct file *file, void *fh, diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index 81924a65a4..55420647b3 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -608,6 +608,37 @@ exit: } EXPORT_SYMBOL(msm_vidc_streamoff); +int msm_vidc_try_cmd(void *instance, union msm_v4l2_cmd *cmd) +{ + int rc = 0; + struct msm_vidc_inst *inst = instance; + struct v4l2_decoder_cmd *dec = NULL; + struct v4l2_encoder_cmd *enc = NULL; + + if (is_decode_session(inst)) { + dec = (struct v4l2_decoder_cmd *)cmd; + i_vpr_h(inst, "%s: cmd %d\n", __func__, dec->cmd); + if (dec->cmd != V4L2_DEC_CMD_STOP && dec->cmd != V4L2_DEC_CMD_START) + return -EINVAL; + dec->flags = 0; + if (dec->cmd == V4L2_DEC_CMD_STOP) { + dec->stop.pts = 0; + } else if (dec->cmd == V4L2_DEC_CMD_START) { + dec->start.speed = 0; + dec->start.format = V4L2_DEC_START_FMT_NONE; + } + } else if (is_encode_session(inst)) { + enc = (struct v4l2_encoder_cmd *)cmd; + i_vpr_h(inst, "%s: cmd %d\n", __func__, enc->cmd); + if (enc->cmd != V4L2_ENC_CMD_STOP && enc->cmd != V4L2_ENC_CMD_START) + return -EINVAL; + enc->flags = 0; + } + + return rc; +} +EXPORT_SYMBOL(msm_vidc_try_cmd); + int msm_vidc_cmd(void *instance, union msm_v4l2_cmd *cmd) { int rc = 0; diff --git a/driver/vidc/src/msm_vidc_platform.c b/driver/vidc/src/msm_vidc_platform.c index 90e7da28dc..1f441e4a0f 100644 --- a/driver/vidc/src/msm_vidc_platform.c +++ b/driver/vidc/src/msm_vidc_platform.c @@ -70,6 +70,7 @@ static struct v4l2_ioctl_ops msm_v4l2_ioctl_ops_enc = { .vidioc_querymenu = msm_v4l2_querymenu, .vidioc_subscribe_event = msm_v4l2_subscribe_event, .vidioc_unsubscribe_event = msm_v4l2_unsubscribe_event, + .vidioc_try_encoder_cmd = msm_v4l2_try_encoder_cmd, .vidioc_encoder_cmd = msm_v4l2_encoder_cmd, }; @@ -108,6 +109,7 @@ static struct v4l2_ioctl_ops msm_v4l2_ioctl_ops_dec = { .vidioc_querymenu = msm_v4l2_querymenu, .vidioc_subscribe_event = msm_v4l2_subscribe_event, .vidioc_unsubscribe_event = msm_v4l2_unsubscribe_event, + .vidioc_try_decoder_cmd = msm_v4l2_try_decoder_cmd, .vidioc_decoder_cmd = msm_v4l2_decoder_cmd, }; diff --git a/driver/vidc/src/msm_vidc_v4l2.c b/driver/vidc/src/msm_vidc_v4l2.c index fa978eeffc..31dfac4c9f 100644 --- a/driver/vidc/src/msm_vidc_v4l2.c +++ b/driver/vidc/src/msm_vidc_v4l2.c @@ -539,6 +539,35 @@ unlock: return rc; } +int msm_v4l2_try_decoder_cmd(struct file *filp, void *fh, + struct v4l2_decoder_cmd *dec) +{ + struct msm_vidc_inst *inst = get_vidc_inst(filp, fh); + int rc = 0; + + inst = get_inst_ref(g_core, inst); + if (!inst) { + d_vpr_e("%s: invalid instance\n", __func__); + return -EINVAL; + } + + inst_lock(inst, __func__); + if (is_session_error(inst)) { + i_vpr_e(inst, "%s: inst in error state\n", __func__); + rc = -EBUSY; + goto unlock; + } + rc = msm_vidc_try_cmd(inst, (union msm_v4l2_cmd *)dec); + if (rc) + goto unlock; + +unlock: + inst_unlock(inst, __func__); + put_inst(inst); + + return rc; +} + int msm_v4l2_decoder_cmd(struct file *filp, void *fh, struct v4l2_decoder_cmd *dec) { @@ -568,6 +597,35 @@ unlock: return rc; } +int msm_v4l2_try_encoder_cmd(struct file *filp, void *fh, + struct v4l2_encoder_cmd *enc) +{ + struct msm_vidc_inst *inst = get_vidc_inst(filp, fh); + int rc = 0; + + inst = get_inst_ref(g_core, inst); + if (!inst) { + d_vpr_e("%s: invalid instance\n", __func__); + return -EINVAL; + } + + inst_lock(inst, __func__); + if (is_session_error(inst)) { + i_vpr_e(inst, "%s: inst in error state\n", __func__); + rc = -EBUSY; + goto unlock; + } + rc = msm_vidc_try_cmd(inst, (union msm_v4l2_cmd *)enc); + if (rc) + goto unlock; + +unlock: + inst_unlock(inst, __func__); + put_inst(inst); + + return rc; +} + int msm_v4l2_encoder_cmd(struct file *filp, void *fh, struct v4l2_encoder_cmd *enc) { From a939a0621e35201868b99ed1ba2c7885d3053d0e Mon Sep 17 00:00:00 2001 From: Dikshita Agarwal Date: Mon, 2 Aug 2021 13:38:11 +0530 Subject: [PATCH 0485/1061] video: driver: handle drain in open state Currently driver doesn't support CMD_STOP in open state. But according to v4l2 std, the call to VIDIOC_DECODER/ENCODER_CMD() should not fail even if any of the queues is not streaming, but at the same time it will not initiate the Drain sequence. So with this fix, not rejecting CMD_STOP in open state but at the same time not initiating drain sequence. Fixes: v4l2-compliance : VIDIOC_(TRY_)DECODER_CMD on decoder. VIDIOC_(TRY_)ENCODER_CMD on encoder. Change-Id: Ie94288cca88009a8a945bd7bca70d04239a4678c Signed-off-by: Dikshita Agarwal --- driver/vidc/src/msm_vidc_driver.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index cd1345006d..5304a3d9e6 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -1472,7 +1472,8 @@ enum msm_vidc_allow msm_vidc_allow_stop(struct msm_vidc_inst *inst) inst->state == MSM_VIDC_DRC_LAST_FLAG || inst->state == MSM_VIDC_DRC_DRAIN) { allow = MSM_VIDC_ALLOW; - } else if (inst->state == MSM_VIDC_START_INPUT) { + } else if (inst->state == MSM_VIDC_START_INPUT || + inst->state == MSM_VIDC_OPEN) { allow = MSM_VIDC_IGNORE; i_vpr_e(inst, "%s: stop ignored in state %s\n", __func__, state_name(inst->state)); From 1b5a6b1d6f99ec84d1ebc1a7427ea79a25f1404a Mon Sep 17 00:00:00 2001 From: Mihir Ganu Date: Fri, 3 Dec 2021 15:16:38 -0800 Subject: [PATCH 0486/1061] video: driver: Add support for AV1 dynamic frame resolution change AV1 bitstream frames can have different resolutions than sequence resolutions. Subscribe to BITSTREAM_RESOLUTION and CROP_OFFSETS metadatas and exopose them to clients so that clients can receive per-frame resolution and crop. Change-Id: I7c0503f25ddde201979d13ff18028681f685d649 Signed-off-by: Mihir Ganu --- driver/platform/kalama/src/msm_vidc_kalama.c | 12 ++++++++++++ driver/vidc/inc/msm_vidc_driver.h | 4 +++- driver/vidc/inc/msm_vidc_internal.h | 2 ++ driver/vidc/src/msm_vdec.c | 2 ++ driver/vidc/src/msm_vidc_control.c | 4 +++- driver/vidc/src/msm_vidc_driver.c | 2 ++ include/uapi/vidc/media/v4l2_vidc_extensions.h | 6 ++++++ 7 files changed, 30 insertions(+), 2 deletions(-) diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index cafaf8e8f3..722717f59a 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -1491,6 +1491,18 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { 0, HFI_PROP_AV1_SUPER_BLOCK_ENABLED}, + {META_BITSTREAM_RESOLUTION, DEC, AV1, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_BITSTREAM_RESOLUTION, + HFI_PROP_BITSTREAM_RESOLUTION}, + + {META_CROP_OFFSETS, DEC, AV1, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_CROP_OFFSETS, + HFI_PROP_CROP_OFFSETS}, + {META_LTR_MARK_USE, ENC, H264|HEVC, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index ae6ac8c0f0..3d72792bdd 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -114,7 +114,9 @@ static inline bool is_output_meta_enabled(struct msm_vidc_inst *inst) bool enabled = false; if (is_decode_session(inst)) { - enabled = (inst->capabilities->cap[META_DPB_MISR].value || + enabled = (inst->capabilities->cap[META_BITSTREAM_RESOLUTION].value || + inst->capabilities->cap[META_CROP_OFFSETS].value || + inst->capabilities->cap[META_DPB_MISR].value || inst->capabilities->cap[META_OPB_MISR].value || inst->capabilities->cap[META_INTERLACE].value || inst->capabilities->cap[META_CONCEALED_MB_CNT].value || diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index eda6bb5468..401019e60e 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -472,6 +472,8 @@ enum msm_vidc_inst_capability_type { FILM_GRAIN, SUPER_BLOCK, ALL_INTRA, + META_BITSTREAM_RESOLUTION, + META_CROP_OFFSETS, META_LTR_MARK_USE, META_DPB_MISR, META_OPB_MISR, diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 9bf3a354bd..fedeec5346 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -1183,6 +1183,8 @@ static int msm_vdec_subscribe_metadata(struct msm_vidc_inst *inst, u32 i, count = 0; struct msm_vidc_inst_capability *capability; static const u32 metadata_list[] = { + META_BITSTREAM_RESOLUTION, + META_CROP_OFFSETS, META_DPB_MISR, META_OPB_MISR, META_INTERLACE, diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 7a6366a5b3..b00730e3ee 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -80,7 +80,9 @@ static bool is_meta_ctrl(u32 id) id == V4L2_CID_MPEG_VIDC_METADATA_SUBFRAME_OUTPUT || id == V4L2_CID_MPEG_VIDC_METADATA_ROI_INFO || id == V4L2_CID_MPEG_VIDC_METADATA_TIMESTAMP || - id == V4L2_CID_MPEG_VIDC_METADATA_ENC_QP_METADATA); + id == V4L2_CID_MPEG_VIDC_METADATA_ENC_QP_METADATA || + id == V4L2_CID_MPEG_VIDC_METADATA_BITSTREAM_RESOLUTION || + id == V4L2_CID_MPEG_VIDC_METADATA_CROP_OFFSETS); } static const char *const mpeg_video_rate_control[] = { diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 6008548815..061369dd16 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -168,6 +168,8 @@ static const struct msm_vidc_cap_name cap_name_arr[] = { {FILM_GRAIN, "FILM_GRAIN" }, {SUPER_BLOCK, "SUPER_BLOCK" }, {ALL_INTRA, "ALL_INTRA" }, + {META_BITSTREAM_RESOLUTION, "META_BITSTREAM_RESOLUTION" }, + {META_CROP_OFFSETS, "META_CROP_OFFSETS" }, {META_LTR_MARK_USE, "META_LTR_MARK_USE" }, {META_DPB_MISR, "META_DPB_MISR" }, {META_OPB_MISR, "META_OPB_MISR" }, diff --git a/include/uapi/vidc/media/v4l2_vidc_extensions.h b/include/uapi/vidc/media/v4l2_vidc_extensions.h index a3c05a5d14..36f4785168 100644 --- a/include/uapi/vidc/media/v4l2_vidc_extensions.h +++ b/include/uapi/vidc/media/v4l2_vidc_extensions.h @@ -123,6 +123,10 @@ enum v4l2_mpeg_vidc_blur_types { (V4L2_CID_MPEG_VIDC_BASE + 0x22) #define V4L2_CID_MPEG_VIDC_MIN_BITSTREAM_SIZE_OVERWRITE \ (V4L2_CID_MPEG_VIDC_BASE + 0x23) +#define V4L2_CID_MPEG_VIDC_METADATA_BITSTREAM_RESOLUTION \ + (V4L2_CID_MPEG_VIDC_BASE + 0x24) +#define V4L2_CID_MPEG_VIDC_METADATA_CROP_OFFSETS \ + (V4L2_CID_MPEG_VIDC_BASE + 0x25) /* Encoder Super frame control */ #define V4L2_CID_MPEG_VIDC_SUPERFRAME (V4L2_CID_MPEG_VIDC_BASE + 0x28) @@ -296,6 +300,8 @@ struct msm_vidc_metapayload_header { __u32 reserved[3]; }; enum v4l2_mpeg_vidc_metadata { + METADATA_BITSTREAM_RESOLUTION = 0x03000103, + METADATA_CROP_OFFSETS = 0x03000105, METADATA_LTR_MARK_USE_DETAILS = 0x03000137, METADATA_SEQ_HEADER_NAL = 0x0300014a, METADATA_DPB_LUMA_CHROMA_MISR = 0x03000153, From 2d5a106e01c3caf2a327858ea3daca804e50bccb Mon Sep 17 00:00:00 2001 From: Maheshwar Ajja Date: Tue, 4 Jan 2022 08:39:49 -0800 Subject: [PATCH 0487/1061] video: driver: flush pending last flag buffers in streamoff When client called streamoff on capture port, driver needs to flush out pending last flag buffers, if any, to avoid session errors. Change-Id: I733ba1a39374f38a1d63a876fb4d2fc06aa6daf7 Signed-off-by: Maheshwar Ajja --- driver/vidc/src/msm_vidc_driver.c | 75 +++++++++++++++++++++++++++++-- 1 file changed, 72 insertions(+), 3 deletions(-) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 3b7d59e425..acfb78b2dc 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -1649,6 +1649,67 @@ bool msm_vidc_allow_last_flag(struct msm_vidc_inst *inst) return false; } +static int msm_vidc_flush_pending_last_flag(struct msm_vidc_inst *inst) +{ + int rc = 0; + struct response_work *resp_work, *dummy = NULL; + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (list_empty(&inst->response_works)) + return 0; + + /* flush pending last flag buffers if any */ + list_for_each_entry_safe(resp_work, dummy, + &inst->response_works, list) { + if (resp_work->type == RESP_WORK_LAST_FLAG) { + i_vpr_h(inst, "%s: flush pending last flag buffer\n", + __func__); + rc = handle_session_response_work(inst, resp_work); + if (rc) { + msm_vidc_change_inst_state(inst, + MSM_VIDC_ERROR, __func__); + return rc; + } + list_del(&resp_work->list); + kfree(resp_work->data); + kfree(resp_work); + } + } + + return 0; +} + +static int msm_vidc_discard_pending_opsc(struct msm_vidc_inst *inst) +{ + struct response_work *resp_work, *dummy = NULL; + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (list_empty(&inst->response_works)) + return 0; + + /* discard pending port settings change if any */ + list_for_each_entry_safe(resp_work, dummy, + &inst->response_works, list) { + if (resp_work->type == RESP_WORK_OUTPUT_PSC) { + i_vpr_h(inst, + "%s: discard pending output psc\n", __func__); + list_del(&resp_work->list); + kfree(resp_work->data); + kfree(resp_work); + } + } + + return 0; +} + static int msm_vidc_discard_pending_ipsc(struct msm_vidc_inst *inst) { struct response_work *resp_work, *dummy = NULL; @@ -3881,6 +3942,17 @@ int msm_vidc_session_streamoff(struct msm_vidc_inst *inst, if(rc) goto error; + /* discard pending input port settings change if any */ + if (port == INPUT_PORT) + msm_vidc_discard_pending_ipsc(inst); + + if (port == OUTPUT_PORT) { + /* discard pending opsc if any*/ + msm_vidc_discard_pending_opsc(inst); + /* flush out pending last flag buffers if any */ + msm_vidc_flush_pending_last_flag(inst); + } + /* no more queued buffers after streamoff */ count = msm_vidc_num_buffers(inst, buffer_type, MSM_VIDC_ATTR_QUEUED); if (!count) { @@ -3894,9 +3966,6 @@ int msm_vidc_session_streamoff(struct msm_vidc_inst *inst, goto error; } - /* discard pending port settings change if any */ - msm_vidc_discard_pending_ipsc(inst); - /* flush deferred buffers */ msm_vidc_flush_buffers(inst, buffer_type); msm_vidc_flush_delayed_unmap_buffers(inst, buffer_type); From e8a948045a9e7b1f8c5f71afdf05265bc70d76b4 Mon Sep 17 00:00:00 2001 From: Mihir Ganu Date: Wed, 12 Jan 2022 11:11:43 -0800 Subject: [PATCH 0488/1061] video: driver: Update AV1D Line buffer calculation For legacy codecs, the line buffers are calculated by assuming OPB size (worst-case). However, for AV1D, the line buffer size can be smaller than required if OPB is assumed. Hence, add an exception for AV1D. Change-Id: I25b6ae630994e8c4c216499c10d7c217ad550d2b Signed-off-by: Mihir Ganu --- driver/variant/iris3/src/msm_vidc_buffer_iris3.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/driver/variant/iris3/src/msm_vidc_buffer_iris3.c b/driver/variant/iris3/src/msm_vidc_buffer_iris3.c index aeca3bbe11..680222db76 100644 --- a/driver/variant/iris3/src/msm_vidc_buffer_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_buffer_iris3.c @@ -154,9 +154,11 @@ static u32 msm_vidc_decoder_line_size_iris3(struct msm_vidc_inst *inst) is_opb = false; /* * assume worst case, since color format is unknown at this - * time + * time. The exception is AV1D, where line buffer size is larger + * in DPB-only mode. */ - is_opb = true; + if (inst->codec != MSM_VIDC_AV1) + is_opb = true; if (inst->decode_vpp_delay.enable) vpp_delay = inst->decode_vpp_delay.size; From 9f70e5b5e3d8e277083fba246d8420140b53ed70 Mon Sep 17 00:00:00 2001 From: DEEPA GUTHYAPPA MADIVALARA Date: Fri, 7 Jan 2022 10:35:15 -0800 Subject: [PATCH 0489/1061] video: driver: update max 4k sessions allowed Increasing the allowed 4k sessions to 6 inorder to support concurrent 5 UHD instance Change-Id: Icd3b0b2d5eb3d2ff0d7ca5f86f1c60f91c85f621 Signed-off-by: DEEPA GUTHYAPPA MADIVALARA --- driver/platform/kalama/src/msm_vidc_kalama.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index 722717f59a..d04f32ccdc 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -60,7 +60,7 @@ static struct msm_platform_core_capability core_data_kalama[] = { {MAX_SESSION_COUNT, 16}, {MAX_NUM_720P_SESSIONS, 16}, {MAX_NUM_1080P_SESSIONS, 8}, - {MAX_NUM_4K_SESSIONS, 4}, + {MAX_NUM_4K_SESSIONS, 6}, {MAX_NUM_8K_SESSIONS, 2}, {MAX_SECURE_SESSION_COUNT, 3}, {MAX_RT_MBPF, 173056}, /* (8192x4320)/256 + (4096x2176)/256*/ From 58a111c2124fc55a838bec2714971cac362983c7 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Fri, 19 Nov 2021 10:28:36 +0530 Subject: [PATCH 0490/1061] video: driver: fix invalid ptr dereference issue with struct v4l2_buffer qbuf call for actual bitstream and yuv buffer 'struct v4l2_buffer' length field indicates numplanes and for metadata buffers, length field indicates capacity. So always check length field before accessing/ dereferencing b->m.planes or b->m.fd. Change-Id: I409b28e0a66bd5c031b2c98c6d7614da99164a6c Signed-off-by: Govindaraj Rajagopal --- driver/vidc/src/msm_vidc.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index 1f2a4e2e19..214bfdcf0d 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -28,10 +28,15 @@ #define MAX_EVENTS 30 -bool valid_v4l2_buffer(struct v4l2_buffer *b, +static inline bool valid_v4l2_buffer(struct v4l2_buffer *b, struct msm_vidc_inst *inst) { - return true; + if (b->type == INPUT_MPLANE || b->type == OUTPUT_MPLANE) + return b->length > 0; + else if (b->type == INPUT_META_PLANE || b->type == OUTPUT_META_PLANE) + return true; + + return false; } static int get_poll_flags(struct msm_vidc_inst *inst, u32 port) From 0dec23c1bd9d24285b99ff8c6cb6d8ec5bb0b74a Mon Sep 17 00:00:00 2001 From: Priyanka Gujjula Date: Fri, 19 Nov 2021 21:58:15 +0530 Subject: [PATCH 0491/1061] video-driver: diwali: Sort clock corners Sort allowed clock corners for diwali v1 & v2 variants. Change-Id: Ic561cd4a0e7abcb0f239b294fa81807621f3ebdb Signed-off-by: Priyanka Gujjula --- driver/platform/diwali/src/msm_vidc_diwali.c | 3 +++ driver/vidc/inc/msm_vidc_dt.h | 8 ++++++++ driver/vidc/src/msm_vidc_dt.c | 8 -------- 3 files changed, 11 insertions(+), 8 deletions(-) diff --git a/driver/platform/diwali/src/msm_vidc_diwali.c b/driver/platform/diwali/src/msm_vidc_diwali.c index 77d4e03ffa..dee054a645 100644 --- a/driver/platform/diwali/src/msm_vidc_diwali.c +++ b/driver/platform/diwali/src/msm_vidc_diwali.c @@ -6,6 +6,7 @@ #include #include +#include #include "msm_vidc_diwali.h" #include "msm_vidc_platform.h" @@ -4992,6 +4993,8 @@ static int msm_vidc_init_data(struct msm_vidc_core *core) } if (platform_data->sku_version) { + sort(core->dt->allowed_clks_tbl, core->dt->allowed_clks_tbl_size, + sizeof(*core->dt->allowed_clks_tbl), cmp, NULL); d_vpr_h("Updated allowed clock rates\n"); for (i = 0; i < core->dt->allowed_clks_tbl_size; i++) d_vpr_h(" %d\n", core->dt->allowed_clks_tbl[i]); diff --git a/driver/vidc/inc/msm_vidc_dt.h b/driver/vidc/inc/msm_vidc_dt.h index 6f6c70b195..1ae0a0bb22 100644 --- a/driver/vidc/inc/msm_vidc_dt.h +++ b/driver/vidc/inc/msm_vidc_dt.h @@ -226,4 +226,12 @@ int msm_vidc_init_dt(struct platform_device *pdev); int msm_vidc_read_context_bank_resources_from_dt(struct platform_device *pdev); void msm_vidc_deinit_dt(struct platform_device *pdev); +/* A comparator to compare loads (needed later on) */ +static inline int cmp(const void *a, const void *b) +{ + /* want to sort in reverse so flip the comparison */ + return ((struct allowed_clock_rates_table *)b)->clock_rate - + ((struct allowed_clock_rates_table *)a)->clock_rate; +} + #endif // _MSM_VIDC_DT_H_ diff --git a/driver/vidc/src/msm_vidc_dt.c b/driver/vidc/src/msm_vidc_dt.c index 01821d2a01..128b1452ac 100644 --- a/driver/vidc/src/msm_vidc_dt.c +++ b/driver/vidc/src/msm_vidc_dt.c @@ -91,14 +91,6 @@ static int msm_vidc_load_u32_table(struct platform_device *pdev, return rc; } -/* A comparator to compare loads (needed later on) */ -static int cmp(const void *a, const void *b) -{ - /* want to sort in reverse so flip the comparison */ - return ((struct allowed_clock_rates_table *)b)->clock_rate - - ((struct allowed_clock_rates_table *)a)->clock_rate; -} - static void msm_vidc_free_allowed_clocks_table(struct msm_vidc_dt *dt) { dt->allowed_clks_tbl = NULL; From a646e757525d1498078ce11f061bebdf7a7b2a7f Mon Sep 17 00:00:00 2001 From: Priyanka Gujjula Date: Mon, 22 Nov 2021 12:16:50 +0530 Subject: [PATCH 0492/1061] video-driver: Optimize enc o/p buffer size Allocate YUV_size * 2 for <=360p Change-Id: I5c7b4ad2d2accf40943e880562f96af2d7c81509 Signed-off-by: Priyanka Gujjula --- driver/vidc/inc/msm_vidc_internal.h | 1 + driver/vidc/src/msm_vidc_buffer.c | 9 +++++---- 2 files changed, 6 insertions(+), 4 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 401019e60e..c4599ae2e7 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -107,6 +107,7 @@ #endif #define BUFFER_ALIGNMENT_SIZE(x) x +#define NUM_MBS_360P (((480 + 15) >> 4) * ((360 + 15) >> 4)) #define NUM_MBS_720P (((1280 + 15) >> 4) * ((720 + 15) >> 4)) #define NUM_MBS_4k (((4096 + 15) >> 4) * ((2304 + 15) >> 4)) #define MB_SIZE_IN_PIXEL (16 * 16) diff --git a/driver/vidc/src/msm_vidc_buffer.c b/driver/vidc/src/msm_vidc_buffer.c index 437a30dcbd..f81ac82612 100644 --- a/driver/vidc/src/msm_vidc_buffer.c +++ b/driver/vidc/src/msm_vidc_buffer.c @@ -310,8 +310,9 @@ u32 msm_vidc_encoder_output_size(struct msm_vidc_inst *inst) f = &inst->fmts[OUTPUT_PORT]; /* * Encoder output size calculation: 32 Align width/height - * For resolution < 720p : YUVsize * 4 - * For resolution > 720p & <= 4K : YUVsize / 2 + * For heic session : YUVsize * 2 + * For resolution <= 480x360p : YUVsize * 2 + * For resolution > 360p & <= 4K : YUVsize / 2 * For resolution > 4k : YUVsize / 4 * Initially frame_size = YUVsize * 2; */ @@ -325,8 +326,8 @@ u32 msm_vidc_encoder_output_size(struct msm_vidc_inst *inst) if (is_image_session(inst)) goto skip_calc; - if (mbs_per_frame < NUM_MBS_720P) - frame_size = frame_size << 1; + if (mbs_per_frame <= NUM_MBS_360P) + (void)frame_size; /* Default frame_size = YUVsize * 2 */ else if (mbs_per_frame <= NUM_MBS_4k) frame_size = frame_size >> 2; else From 25c72537e806d89ac434476c707d2ad2ef109799 Mon Sep 17 00:00:00 2001 From: Zhongbo Shi Date: Fri, 26 Nov 2021 10:17:04 +0800 Subject: [PATCH 0493/1061] Video: Driver: fix crash issue when dumping packet Using session id instead of session debug string when dumping packet for a given session, in case of the instance objest released in the other thread. Change-Id: I1b91c051d510b8beea9d37de87f63f346efda050 Signed-off-by: Zhongbo Shi --- driver/vidc/src/venus_hfi.c | 19 ++----------------- 1 file changed, 2 insertions(+), 17 deletions(-) diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index 55dc6d3b29..7e4d85291a 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -139,36 +139,21 @@ static void __dump_packet(u8 *packet, const char *function, void *qinfo) { u32 c = 0, session_id, packet_size = *(u32 *)packet; const int row_size = 32; - struct msm_vidc_inst *inst = NULL; - bool matches = false; /* * row must contain enough for 0xdeadbaad * 8 to be converted into * "de ad ba ab " * 8 + '\0' */ char row[3 * 32]; - session_id = *((u32 *)packet + 1); - list_for_each_entry(inst, &g_core->instances, list) { - if (inst->session_id == session_id) { - matches = true; - break; - } - } - if (matches) - i_vpr_t(inst, "%s: %pK\n", function, qinfo); - else - d_vpr_t("%s: %pK\n", function, qinfo); + d_vpr_t("%08x: %s: %pK\n", session_id, function, qinfo); for (c = 0; c * row_size < packet_size; ++c) { int bytes_to_read = ((c + 1) * row_size > packet_size) ? packet_size % row_size : row_size; hex_dump_to_buffer(packet + c * row_size, bytes_to_read, row_size, 4, row, sizeof(row), false); - if (matches) - i_vpr_t(inst, "%s\n", row); - else - d_vpr_t("%s\n", row); + d_vpr_t("%08x: %s\n", session_id, row); } } From c9f4e6c3c0b2932749e4dd43307dd634ba4a5721 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Thu, 2 Dec 2021 12:27:10 +0530 Subject: [PATCH 0494/1061] video: driver: fix race issue with seek after EOS HAL received lastflag FBD(for EOS) from reverse(polling) thread, and before it sends SessionContinue(START_CMD) to driver, component thread initiated streamoff on input port. So driver statemachine got changed from DRAIN_LAST_FLAG to START_OUTPUT state. After Streamoff sequence, reverse thread attempting START_CMD will fail due to driver statemachine check. So q->last_buffer_dequeued was never getting reset at v4l2 layer. As a result all subsequent dqbuf ioctl calls will fail and leading to session hung issue. Added change to call vb2_clear_last_buffer_dequeued() before START_CMD rejection at driver side to avoid above mentioned issue. Change-Id: Ic06f555f0c4deaa05c526ba9c0a19396d5a6f289 Signed-off-by: Govindaraj Rajagopal --- driver/vidc/src/msm_vdec.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index fedeec5346..e9273200d7 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -2305,6 +2305,8 @@ int msm_vdec_process_cmd(struct msm_vidc_inst *inst, u32 cmd) return rc; } else if (cmd == V4L2_DEC_CMD_START) { i_vpr_h(inst, "received cmd: resume\n"); + vb2_clear_last_buffer_dequeued(&inst->vb2q[OUTPUT_META_PORT]); + vb2_clear_last_buffer_dequeued(&inst->vb2q[OUTPUT_PORT]); if (capability->cap[CODED_FRAMES].value == CODED_FRAMES_INTERLACE && !is_ubwc_colorformat(capability->cap[PIX_FMTS].value)) { @@ -2317,8 +2319,6 @@ int msm_vdec_process_cmd(struct msm_vidc_inst *inst, u32 cmd) if (!msm_vidc_allow_start(inst)) return -EBUSY; port = (inst->state == MSM_VIDC_DRAIN_LAST_FLAG) ? INPUT_PORT : OUTPUT_PORT; - vb2_clear_last_buffer_dequeued(&inst->vb2q[OUTPUT_META_PORT]); - vb2_clear_last_buffer_dequeued(&inst->vb2q[OUTPUT_PORT]); rc = msm_vidc_state_change_start(inst); if (rc) From 6e916441fc1217c7fee3e7dde06ac0d8074bee84 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Fri, 12 Nov 2021 16:22:43 +0530 Subject: [PATCH 0495/1061] video: driver: Removed unused macro and variable - Removed unused macro - Removed unsed constant variable. Change-Id: I43ff39d498637fb0aa721660fae0ca3dd7073e88 Signed-off-by: Gaviraju Doddabettahalli Bettegowda Signed-off-by: Govindaraj Rajagopal --- driver/vidc/inc/msm_vidc_internal.h | 16 ---------------- driver/vidc/inc/venus_hfi.h | 3 --- driver/vidc/src/msm_vidc_control.c | 7 ------- driver/vidc/src/venus_hfi.c | 2 -- 4 files changed, 28 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index c4599ae2e7..275d060e3e 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -23,26 +23,14 @@ #define MAX_BIAS_COEFFS 3 #define MAX_LIMIT_COEFFS 6 #define MAX_DEBUGFS_NAME 50 -#define DEFAULT_TIMEOUT 3 #define DEFAULT_HEIGHT 240 #define DEFAULT_WIDTH 320 -#define MAX_HEIGHT 4320 -#define MAX_WIDTH 8192 -#define MIN_SUPPORTED_WIDTH 32 -#define MIN_SUPPORTED_HEIGHT 32 #define DEFAULT_FPS 30 #define MAXIMUM_VP9_FPS 60 -#define SINGLE_INPUT_BUFFER 1 -#define SINGLE_OUTPUT_BUFFER 1 -#define MAX_NUM_INPUT_BUFFERS VIDEO_MAX_FRAME // same as VB2_MAX_FRAME -#define MAX_NUM_OUTPUT_BUFFERS VIDEO_MAX_FRAME // same as VB2_MAX_FRAME #define MAX_SUPPORTED_INSTANCES 16 -#define MAX_BSE_VPP_DELAY 6 #define DEFAULT_BSE_VPP_DELAY 2 #define MAX_CAP_PARENTS 20 #define MAX_CAP_CHILDREN 20 -#define DEFAULT_BITSTREM_ALIGNMENT 16 -#define H265_BITSTREM_ALIGNMENT 32 #define DEFAULT_MAX_HOST_BUF_COUNT 64 #define DEFAULT_MAX_HOST_BURST_BUF_COUNT 256 #define BIT_DEPTH_8 (8 << 16 | 8) @@ -73,11 +61,7 @@ #define DCVS_WINDOW 16 #define ENC_FPS_WINDOW 3 #define DEC_FPS_WINDOW 10 -/* Superframe can have maximum of 32 frames */ -#define VIDC_SUPERFRAME_MAX 32 -#define COLOR_RANGE_UNSPECIFIED (-1) -#define V4L2_EVENT_VIDC_BASE 10 #define INPUT_MPLANE V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE #define OUTPUT_MPLANE V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE #define INPUT_META_PLANE V4L2_BUF_TYPE_META_OUTPUT diff --git a/driver/vidc/inc/venus_hfi.h b/driver/vidc/inc/venus_hfi.h index c5fd3236dc..1cb4dab0b2 100644 --- a/driver/vidc/inc/venus_hfi.h +++ b/driver/vidc/inc/venus_hfi.h @@ -16,10 +16,7 @@ #include "msm_vidc_inst.h" #include "msm_vidc_core.h" -#define VIDC_MAX_NAME_LENGTH 64 #define VIDC_MAX_PC_SKIP_COUNT 10 -#define VIDC_MAX_SUBCACHES 4 -#define VIDC_MAX_SUBCACHE_SIZE 52 struct vidc_buffer_addr_info { enum msm_vidc_buffer_type buffer_type; diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 298e8bb002..5e38297837 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -125,13 +125,6 @@ static const char *const mpeg_video_hevc_profile[] = { NULL, }; -static const char *const roi_map_type[] = { - "None", - "2-bit", - "2-bit", - NULL, -}; - static const char * const av1_profile[] = { "Main", "High", diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index 7e4d85291a..c278db734d 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -26,8 +26,6 @@ #include "venus_hfi_response.h" #include "msm_vidc_events.h" -#define MIN_PAYLOAD_SIZE 3 - #define MAX_FIRMWARE_NAME_SIZE 128 #define update_offset(offset, val) ((offset) += (val)) From aeabb39378c05ae91be2ba7090501d96ebcb95ee Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Fri, 12 Nov 2021 15:56:50 +0530 Subject: [PATCH 0496/1061] video: driver: Change format specifier and API clean-up -Removed unwanted functions -Removed unwanted part of code from function definitions -Added proper format specifier according to the data type. Change-Id: I700202f1cf588506b329d202ce3e2729c027dcae Signed-off-by: Gaviraju Doddabettahalli Bettegowda Signed-off-by: Govindaraj Rajagopal --- .../variant/iris2/src/msm_vidc_buffer_iris2.c | 3 +- driver/variant/iris2/src/msm_vidc_iris2.c | 10 +- .../variant/iris2/src/msm_vidc_power_iris2.c | 2 - driver/vidc/inc/msm_vidc_driver.h | 6 - driver/vidc/inc/msm_vidc_dt.h | 5 - driver/vidc/inc/venus_hfi.h | 4 - driver/vidc/src/hfi_packet.c | 26 --- driver/vidc/src/msm_vdec.c | 29 +-- driver/vidc/src/msm_venc.c | 22 +- driver/vidc/src/msm_vidc.c | 6 +- driver/vidc/src/msm_vidc_buffer.c | 4 +- driver/vidc/src/msm_vidc_control.c | 4 +- driver/vidc/src/msm_vidc_debug.c | 2 +- driver/vidc/src/msm_vidc_driver.c | 6 +- driver/vidc/src/msm_vidc_dt.c | 10 +- driver/vidc/src/msm_vidc_memory.c | 2 +- driver/vidc/src/msm_vidc_platform.c | 4 +- driver/vidc/src/msm_vidc_power.c | 4 +- driver/vidc/src/msm_vidc_vb2.c | 10 +- driver/vidc/src/venus_hfi.c | 208 +----------------- driver/vidc/src/venus_hfi_response.c | 4 +- 21 files changed, 51 insertions(+), 320 deletions(-) diff --git a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c index 2344cd65bd..495d5b79e0 100644 --- a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c @@ -573,8 +573,7 @@ static int msm_vidc_input_min_count_iris2(struct msm_vidc_inst* inst) HFI_IRIS2_ENC_MIN_INPUT_BUF_COUNT(input_min_count, total_hb_layer); } else { - i_vpr_e(inst, "%s: invalid domain\n", - __func__, inst->domain); + i_vpr_e(inst, "%s: invalid domain %d\n", __func__, inst->domain); return 0; } diff --git a/driver/variant/iris2/src/msm_vidc_iris2.c b/driver/variant/iris2/src/msm_vidc_iris2.c index 76cbc22e5c..29a59e368b 100644 --- a/driver/variant/iris2/src/msm_vidc_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_iris2.c @@ -296,7 +296,7 @@ static int __disable_regulator_iris2(struct msm_vidc_core *core, rc = __acquire_regulator(core, rinfo); if (rc) { d_vpr_e("%s: failed to acquire %s, rc = %d\n", - rinfo->name, rc); + __func__, rinfo->name, rc); /* Bring attention to this issue */ WARN_ON(true); return rc; @@ -306,7 +306,7 @@ static int __disable_regulator_iris2(struct msm_vidc_core *core, rc = regulator_disable(rinfo->regulator); if (rc) { d_vpr_e("%s: failed to disable %s, rc = %d\n", - rinfo->name, rc); + __func__, rinfo->name, rc); return rc; } d_vpr_h("%s: disabled regulator %s\n", __func__, rinfo->name); @@ -1059,12 +1059,8 @@ int msm_vidc_decide_work_route_iris2(struct msm_vidc_inst* inst) CODED_FRAMES_INTERLACE) work_route = MSM_VIDC_PIPE_1; } else if (is_encode_session(inst)) { - u32 slice_mode, width, height; - struct v4l2_format* f; + u32 slice_mode; - f = &inst->fmts[INPUT_PORT]; - height = f->fmt.pix_mp.height; - width = f->fmt.pix_mp.width; slice_mode = inst->capabilities->cap[SLICE_MODE].value; /*TODO Pipe=1 for legacy CBR*/ diff --git a/driver/variant/iris2/src/msm_vidc_power_iris2.c b/driver/variant/iris2/src/msm_vidc_power_iris2.c index 88f9ad7f9f..2fd805c638 100644 --- a/driver/variant/iris2/src/msm_vidc_power_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_power_iris2.c @@ -14,7 +14,6 @@ u64 msm_vidc_calc_freq_iris2(struct msm_vidc_inst *inst, u32 data_size) { u64 freq = 0; struct msm_vidc_core* core; - struct msm_vidc_power* power; u64 vsp_cycles = 0, vpp_cycles = 0, fw_cycles = 0; u64 fw_vpp_cycles = 0, bitrate = 0; u32 vpp_cycles_per_mb; @@ -30,7 +29,6 @@ u64 msm_vidc_calc_freq_iris2(struct msm_vidc_inst *inst, u32 data_size) return freq; } - power = &inst->power; core = inst->core; if (!core->dt) { d_vpr_e("%s: invalid params\n", __func__); diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 3d72792bdd..9050a561e9 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -191,11 +191,6 @@ static inline bool is_rgba_colorformat(enum msm_vidc_colorformat_type colorforma colorformat == MSM_VIDC_FMT_RGBA8888C; } -static inline bool is_secondary_output_mode(struct msm_vidc_inst *inst) -{ - return false; // TODO: inst->stream_output_mode == HAL_VIDEO_DECODER_SECONDARY; -} - static inline bool is_thumbnail_session(struct msm_vidc_inst *inst) { return !!(inst->capabilities->cap[THUMBNAIL_MODE].value); @@ -324,7 +319,6 @@ int msm_vidc_smmu_fault_handler(struct iommu_domain *domain, int msm_vidc_trigger_ssr(struct msm_vidc_core *core, u64 trigger_ssr_val); void msm_vidc_ssr_handler(struct work_struct *work); -void msm_vidc_pm_work_handler(struct work_struct *work); void msm_vidc_fw_unload_handler(struct work_struct *work); int msm_vidc_suspend(struct msm_vidc_core *core); void msm_vidc_batch_handler(struct work_struct *work); diff --git a/driver/vidc/inc/msm_vidc_dt.h b/driver/vidc/inc/msm_vidc_dt.h index 1ae0a0bb22..d0e31aa49b 100644 --- a/driver/vidc/inc/msm_vidc_dt.h +++ b/driver/vidc/inc/msm_vidc_dt.h @@ -64,11 +64,6 @@ #define venus_hfi_for_each_clock_reverse(__device, __cinfo) \ venus_hfi_for_each_thing_reverse(__device, __cinfo, clock) -#define venus_hfi_for_each_clock_reverse_continue(__device, __rinfo, \ - __from) \ - venus_hfi_for_each_thing_reverse_continue(__device, __rinfo, \ - clock, __from) - /* Bus set helpers */ #define venus_hfi_for_each_bus(__device, __binfo) \ venus_hfi_for_each_thing(__device, __binfo, bus) diff --git a/driver/vidc/inc/venus_hfi.h b/driver/vidc/inc/venus_hfi.h index 1cb4dab0b2..4a7c3ae963 100644 --- a/driver/vidc/inc/venus_hfi.h +++ b/driver/vidc/inc/venus_hfi.h @@ -74,10 +74,6 @@ int __set_clocks(struct msm_vidc_core *core, u32 freq); int __scale_clocks(struct msm_vidc_core *core); int __set_clk_rate(struct msm_vidc_core *core, struct clock_info *cl, u64 rate); -void __disable_unprepare_clks(struct msm_vidc_core *core); -int __prepare_enable_clks(struct msm_vidc_core *core); -int __disable_regulators(struct msm_vidc_core *core); -int __enable_regulators(struct msm_vidc_core *core); int __acquire_regulator(struct msm_vidc_core *core, struct regulator_info *rinfo); int __unvote_buses(struct msm_vidc_core *core); diff --git a/driver/vidc/src/hfi_packet.c b/driver/vidc/src/hfi_packet.c index 3e234841c5..1955573bc1 100644 --- a/driver/vidc/src/hfi_packet.c +++ b/driver/vidc/src/hfi_packet.c @@ -282,32 +282,6 @@ u32 get_hfi_colorformat(struct msm_vidc_inst *inst, return hfi_colorformat; } -u32 get_hfi_quality_mode(struct msm_vidc_inst *inst) -{ - u32 hfi_mode = HFI_MODE_POWER_SAVE; - - if (!inst || !inst->capabilities) { - d_vpr_e("%s: invalid params\n", __func__); - goto exit; - } - - switch(inst->capabilities->cap[QUALITY_MODE].value) { - case MSM_VIDC_MAX_QUALITY_MODE: - hfi_mode = HFI_MODE_MAX_QUALITY; - break; - case MSM_VIDC_POWER_SAVE_MODE: - hfi_mode = HFI_MODE_POWER_SAVE; - break; - default: - i_vpr_e(inst, "%s: invalid qulity mode %d\n", __func__, - inst->capabilities->cap[QUALITY_MODE].value); - break; - } - -exit: - return hfi_mode; -} - int get_hfi_buffer(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buffer, struct hfi_buffer *buf) { diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index e9273200d7..75272781dd 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -1129,16 +1129,14 @@ static int msm_vdec_subscribe_property(struct msm_vidc_inst *inst, enum msm_vidc_port_type port) { int rc = 0; - struct msm_vidc_core *core; u32 payload[32] = {0}; u32 i, count = 0; bool allow = false; - if (!inst || !inst->core) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - core = inst->core; i_vpr_h(inst, "%s()\n", __func__); payload[0] = HFI_MODE_PROPERTY; @@ -1178,7 +1176,6 @@ static int msm_vdec_subscribe_metadata(struct msm_vidc_inst *inst, enum msm_vidc_port_type port) { int rc = 0; - struct msm_vidc_core *core; u32 payload[32] = {0}; u32 i, count = 0; struct msm_vidc_inst_capability *capability; @@ -1201,11 +1198,10 @@ static int msm_vdec_subscribe_metadata(struct msm_vidc_inst *inst, META_MAX_NUM_REORDER_FRAMES, }; - if (!inst || !inst->core || !inst->capabilities) { + if (!inst || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - core = inst->core; i_vpr_h(inst, "%s()\n", __func__); capability = inst->capabilities; @@ -1233,7 +1229,6 @@ static int msm_vdec_set_delivery_mode_metadata(struct msm_vidc_inst *inst, enum msm_vidc_port_type port) { int rc = 0; - struct msm_vidc_core *core; u32 payload[32] = {0}; u32 i, count = 0; struct msm_vidc_inst_capability *capability; @@ -1244,11 +1239,10 @@ static int msm_vdec_set_delivery_mode_metadata(struct msm_vidc_inst *inst, META_OUTPUT_BUF_TAG, }; - if (!inst || !inst->core || !inst->capabilities) { + if (!inst || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - core = inst->core; i_vpr_h(inst, "%s()\n", __func__); capability = inst->capabilities; @@ -1305,18 +1299,16 @@ static int msm_vdec_session_resume(struct msm_vidc_inst *inst, int msm_vdec_init_input_subcr_params(struct msm_vidc_inst *inst) { struct msm_vidc_subscription_params *subsc_params; - struct msm_vidc_core *core; u32 left_offset, top_offset, right_offset, bottom_offset; u32 primaries, matrix_coeff, transfer_char; u32 full_range = 0, video_format = 0; u32 colour_description_present_flag = 0; u32 video_signal_type_present_flag = 0; - if (!inst || !inst->core || !inst->capabilities) { + if (!inst || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - core = inst->core; subsc_params = &inst->subcr_params[INPUT_PORT]; subsc_params->bitstream_resolution = @@ -1373,7 +1365,7 @@ static int msm_vdec_read_input_subcr_params(struct msm_vidc_inst *inst) struct msm_vidc_core *core; u32 width, height; u32 primaries, matrix_coeff, transfer_char; - u32 full_range = 0, video_format = 0; + u32 full_range = 0; u32 colour_description_present_flag = 0; u32 video_signal_type_present_flag = 0; @@ -1418,7 +1410,6 @@ static int msm_vdec_read_input_subcr_params(struct msm_vidc_inst *inst) inst->fmts[OUTPUT_PORT].fmt.pix_mp.quantization = V4L2_QUANTIZATION_DEFAULT; if (video_signal_type_present_flag) { - video_format = (subsc_params.color_info & 0x1C000000) >> 26; inst->fmts[OUTPUT_PORT].fmt.pix_mp.quantization = full_range ? V4L2_QUANTIZATION_FULL_RANGE : @@ -2356,15 +2347,13 @@ int msm_vdec_process_cmd(struct msm_vidc_inst *inst, u32 cmd) int msm_vdec_try_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) { int rc = 0; - struct msm_vidc_core *core; struct v4l2_pix_format_mplane *pixmp = &f->fmt.pix_mp; u32 pix_fmt; - if (!inst || !inst->core) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - core = inst->core; memset(pixmp->reserved, 0, sizeof(pixmp->reserved)); if (f->type == INPUT_MPLANE) { @@ -2714,7 +2703,7 @@ int msm_vdec_s_param(struct msm_vidc_inst *inst, do_div(input_rate, us_per_frame); set_default: - i_vpr_h(inst, "%s: type %s, %s value %d\n", + i_vpr_h(inst, "%s: type %s, %s value %llu\n", __func__, v4l2_type_name(s_parm->type), is_frame_rate ? "frame rate" : "operating rate", input_rate); @@ -2731,7 +2720,7 @@ set_default: } rc = input_rate > max_rate; if (rc) { - i_vpr_e(inst, "%s: unsupported rate %u, max %u\n", __func__, + i_vpr_e(inst, "%s: unsupported rate %llu, max %u\n", __func__, input_rate, max_rate); rc = -ENOMEM; goto reset_rate; @@ -2748,7 +2737,7 @@ set_default: reset_rate: if (rc) { - i_vpr_e(inst, "%s: setting rate %u failed, reset to %u\n", __func__, + i_vpr_e(inst, "%s: setting rate %llu failed, reset to %u\n", __func__, input_rate, default_rate); msm_vidc_update_cap_value(inst, is_frame_rate ? FRAME_RATE : OPERATING_RATE, default_rate << 16, __func__); diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index 1eca54e623..6c7bcb5c12 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -543,13 +543,11 @@ static int msm_venc_set_internal_properties(struct msm_vidc_inst *inst) static int msm_venc_get_input_internal_buffers(struct msm_vidc_inst *inst) { int i, rc = 0; - struct msm_vidc_core *core; - if (!inst || !inst->core) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - core = inst->core; for (i = 0; i < ARRAY_SIZE(msm_venc_input_internal_buffer_type); i++) { rc = msm_vidc_get_internal_buffers(inst, @@ -662,16 +660,14 @@ static int msm_venc_property_subscription(struct msm_vidc_inst *inst, enum msm_vidc_port_type port) { int rc = 0; - struct msm_vidc_core *core; u32 payload[32] = {0}; u32 i; u32 payload_size = 0; - if (!inst || !inst->core) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - core = inst->core; i_vpr_h(inst, "%s()\n", __func__); payload[0] = HFI_MODE_PROPERTY; @@ -752,7 +748,6 @@ static int msm_venc_metadata_subscription(struct msm_vidc_inst *inst, enum msm_vidc_port_type port) { int rc = 0; - struct msm_vidc_core *core; u32 payload[32] = {0}; u32 i, count = 0; struct msm_vidc_inst_capability *capability; @@ -765,11 +760,10 @@ static int msm_venc_metadata_subscription(struct msm_vidc_inst *inst, META_ENC_QP_METADATA, }; - if (!inst || !inst->core) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - core = inst->core; i_vpr_h(inst, "%s()\n", __func__); capability = inst->capabilities; @@ -1052,15 +1046,13 @@ error: int msm_venc_try_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) { int rc = 0; - struct msm_vidc_core *core; struct v4l2_pix_format_mplane *pixmp = &f->fmt.pix_mp; u32 pix_fmt; - if (!inst || !inst->core) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - core = inst->core; memset(pixmp->reserved, 0, sizeof(pixmp->reserved)); @@ -1618,7 +1610,7 @@ int msm_venc_s_param(struct msm_vidc_inst *inst, input_rate = (u64)USEC_PER_SEC; do_div(input_rate, us_per_frame); - i_vpr_h(inst, "%s: type %s, %s value %d\n", + i_vpr_h(inst, "%s: type %s, %s value %llu\n", __func__, v4l2_type_name(s_parm->type), is_frame_rate ? "frame rate" : "operating rate", input_rate); @@ -1635,7 +1627,7 @@ int msm_venc_s_param(struct msm_vidc_inst *inst, } rc = input_rate > max_rate; if (rc) { - i_vpr_e(inst, "%s: unsupported rate %u, max %u\n", __func__, + i_vpr_e(inst, "%s: unsupported rate %llu, max %u\n", __func__, input_rate, max_rate); rc = -ENOMEM; goto reset_rate; @@ -1673,7 +1665,7 @@ int msm_venc_s_param(struct msm_vidc_inst *inst, reset_rate: if (rc) { - i_vpr_e(inst, "%s: setting rate %u failed, reset to %u\n", __func__, + i_vpr_e(inst, "%s: setting rate %llu failed, reset to %u\n", __func__, input_rate, default_rate); msm_vidc_update_cap_value(inst, is_frame_rate ? FRAME_RATE : OPERATING_RATE, default_rate << 16, __func__); diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index 214bfdcf0d..7591da0f23 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -207,7 +207,7 @@ int msm_vidc_query_menu(void *instance, struct v4l2_querymenu *qmenu) rc = -EINVAL; i_vpr_h(inst, - "%s: ctrl: %s: min %d, max %d, menu_skip_mask %#x, qmenu: id %d, index %d, %s\n", + "%s: ctrl: %s: min %lld, max %lld, menu_skip_mask %#x, qmenu: id %u, index %d, %s\n", __func__, ctrl->name, ctrl->minimum, ctrl->maximum, ctrl->menu_skip_mask, qmenu->id, qmenu->index, rc ? "not supported" : "supported"); @@ -634,7 +634,7 @@ int msm_vidc_enum_framesizes(void *instance, struct v4l2_frmsizeenum *fsize) return -EINVAL; } if (!inst->capabilities) { - i_vpr_e(inst, "capabilities not available\n", __func__); + i_vpr_e(inst, "%s: capabilities not available\n", __func__); return -EINVAL; } capability = inst->capabilities; @@ -689,7 +689,7 @@ int msm_vidc_enum_frameintervals(void *instance, struct v4l2_frmivalenum *fival) core = inst->core; if (!inst->capabilities || !core->capabilities) { - i_vpr_e(inst, "capabilities not available\n", __func__); + i_vpr_e(inst, "%s: capabilities not available\n", __func__); return -EINVAL; } capability = inst->capabilities; diff --git a/driver/vidc/src/msm_vidc_buffer.c b/driver/vidc/src/msm_vidc_buffer.c index f81ac82612..8e92c66e55 100644 --- a/driver/vidc/src/msm_vidc_buffer.c +++ b/driver/vidc/src/msm_vidc_buffer.c @@ -37,7 +37,7 @@ u32 msm_vidc_input_min_count(struct msm_vidc_inst* inst) input_min_count = (1 << hb_enh_layer) + 2; } } else { - i_vpr_e(inst, "%s: invalid domain\n", + i_vpr_e(inst, "%s: invalid domain %d\n", __func__, inst->domain); return 0; } @@ -210,7 +210,7 @@ u32 msm_vidc_decoder_input_size(struct msm_vidc_inst *inst) u32 bitstream_size_overwrite = 0; if (!inst || !inst->capabilities) { - d_vpr_e("%s: invalid params\n"); + d_vpr_e("%s: invalid params\n", __func__); return 0; } diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 5e38297837..2547ab1946 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -248,7 +248,7 @@ static int msm_vidc_packetize_control(struct msm_vidc_inst *inst, payload_size); if (rc) { i_vpr_e(inst, "%s: failed to set cap[%d] %s to fw\n", - __func__, cap_id, cap_name(cap_id)); + func, cap_id, cap_name(cap_id)); return rc; } @@ -370,7 +370,7 @@ static int msm_vidc_get_parent_value(struct msm_vidc_inst* inst, { int rc = 0; - if (is_parent_available(inst, cap, parent, __func__)) { + if (is_parent_available(inst, cap, parent, func)) { switch (parent) { case BITRATE_MODE: *value = inst->hfi_rc_type; diff --git a/driver/vidc/src/msm_vidc_debug.c b/driver/vidc/src/msm_vidc_debug.c index f0da8894c9..b1c8b1fc9f 100644 --- a/driver/vidc/src/msm_vidc_debug.c +++ b/driver/vidc/src/msm_vidc_debug.c @@ -212,7 +212,7 @@ static ssize_t stats_delay_write_ms(struct file *filp, const char __user *buf, /* filter partial writes and invalid commands */ if (*ppos != 0 || count >= sizeof(kbuf) || count == 0) { - d_vpr_e("returning error - pos %d, count %d\n", *ppos, count); + d_vpr_e("returning error - pos %lld, count %lu\n", *ppos, count); rc = -EINVAL; } diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 1e44f064e3..6e879767d2 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -2341,7 +2341,7 @@ int msm_vidc_flush_ts(struct msm_vidc_inst *inst) } list_for_each_entry_safe(ts, temp, &inst->timestamps.list, sort.list) { - i_vpr_l(inst, "%s: flushing ts: val %lld, rank %%lld\n", + i_vpr_l(inst, "%s: flushing ts: val %llu, rank %llu\n", __func__, ts->sort.val, ts->rank); list_del(&ts->sort.list); msm_memory_free(inst, ts); @@ -4677,10 +4677,6 @@ void msm_vidc_ssr_handler(struct work_struct *work) core_unlock(core, __func__); } -void msm_vidc_pm_work_handler(struct work_struct *work) -{ -} - void msm_vidc_fw_unload_handler(struct work_struct *work) { struct msm_vidc_core *core = NULL; diff --git a/driver/vidc/src/msm_vidc_dt.c b/driver/vidc/src/msm_vidc_dt.c index 128b1452ac..0d66ebcc34 100644 --- a/driver/vidc/src/msm_vidc_dt.c +++ b/driver/vidc/src/msm_vidc_dt.c @@ -320,7 +320,7 @@ static int msm_vidc_load_allowed_clocks_table( d_vpr_h("Found allowed clock rates\n"); for (i = 0; i < dt->allowed_clks_tbl_size; i++) - d_vpr_h(" %d\n", dt->allowed_clks_tbl[i]); + d_vpr_h(" %d\n", dt->allowed_clks_tbl[i].clock_rate); return 0; } @@ -678,7 +678,7 @@ static int msm_vidc_read_resources_from_dt(struct platform_device *pdev) core = dev_get_drvdata(&pdev->dev); if (!core || !core->dt) { d_vpr_e("%s: core not found in device %s", - dev_name(&pdev->dev)); + __func__, dev_name(&pdev->dev)); return -EINVAL; } dt = core->dt; @@ -927,11 +927,11 @@ void msm_vidc_deinit_dt(struct platform_device *pdev) core = dev_get_drvdata(&pdev->dev); if (!core) { d_vpr_e("%s: core not found in device %s", - dev_name(&pdev->dev)); + __func__, dev_name(&pdev->dev)); return; } else if (!core->dt) { d_vpr_e("%s: invalid dt in device %s", - dev_name(&pdev->dev)); + __func__, dev_name(&pdev->dev)); return; } @@ -958,7 +958,7 @@ int msm_vidc_init_dt(struct platform_device *pdev) core = dev_get_drvdata(&pdev->dev); if (!core) { d_vpr_e("%s: core not found in device %s", - dev_name(&pdev->dev)); + __func__, dev_name(&pdev->dev)); return -EINVAL; } diff --git a/driver/vidc/src/msm_vidc_memory.c b/driver/vidc/src/msm_vidc_memory.c index a713e1878f..723b435f11 100644 --- a/driver/vidc/src/msm_vidc_memory.c +++ b/driver/vidc/src/msm_vidc_memory.c @@ -601,7 +601,7 @@ int msm_memory_pools_init(struct msm_vidc_inst *inst) } if (ARRAY_SIZE(buftype_size_name_arr) != MSM_MEM_POOL_MAX) { - i_vpr_e(inst, "%s: num elements mismatch %u %u\n", __func__, + i_vpr_e(inst, "%s: num elements mismatch %lu %u\n", __func__, ARRAY_SIZE(buftype_size_name_arr), MSM_MEM_POOL_MAX); return -EINVAL; } diff --git a/driver/vidc/src/msm_vidc_platform.c b/driver/vidc/src/msm_vidc_platform.c index c212767100..8fb06d0793 100644 --- a/driver/vidc/src/msm_vidc_platform.c +++ b/driver/vidc/src/msm_vidc_platform.c @@ -303,7 +303,7 @@ int msm_vidc_deinit_platform(struct platform_device *pdev) core = dev_get_drvdata(&pdev->dev); if (!core) { d_vpr_e("%s: core not found in device %s", - dev_name(&pdev->dev)); + __func__, dev_name(&pdev->dev)); return -EINVAL; } @@ -332,7 +332,7 @@ int msm_vidc_init_platform(struct platform_device *pdev) core = dev_get_drvdata(&pdev->dev); if (!core) { d_vpr_e("%s: core not found in device %s", - dev_name(&pdev->dev)); + __func__, dev_name(&pdev->dev)); return -EINVAL; } diff --git a/driver/vidc/src/msm_vidc_power.c b/driver/vidc/src/msm_vidc_power.c index e150fcb7b3..2eb0010375 100644 --- a/driver/vidc/src/msm_vidc_power.c +++ b/driver/vidc/src/msm_vidc_power.c @@ -39,7 +39,7 @@ u64 msm_vidc_max_freq(struct msm_vidc_inst *inst) allowed_clks_tbl = core->dt->allowed_clks_tbl; freq = allowed_clks_tbl[0].clock_rate; - i_vpr_l(inst, "%s: rate = %lu\n", __func__, freq); + i_vpr_l(inst, "%s: rate = %llu\n", __func__, freq); return freq; } @@ -366,7 +366,7 @@ int msm_vidc_set_clocks(struct msm_vidc_inst* inst) } core->power.clk_freq = (u32)rate; - i_vpr_p(inst, "%s: clock rate %lu requested %lu increment %d decrement %d\n", + i_vpr_p(inst, "%s: clock rate %llu requested %llu increment %d decrement %d\n", __func__, rate, freq, increment, decrement); mutex_unlock(&core->lock); diff --git a/driver/vidc/src/msm_vidc_vb2.c b/driver/vidc/src/msm_vidc_vb2.c index ae14605dfc..e11daee1b7 100644 --- a/driver/vidc/src/msm_vidc_vb2.c +++ b/driver/vidc/src/msm_vidc_vb2.c @@ -20,7 +20,7 @@ struct vb2_queue *msm_vidc_get_vb2q(struct msm_vidc_inst *inst, struct vb2_queue *q = NULL; if (!inst) { - d_vpr_e("%s: invalid buffer type %d\n", func); + d_vpr_e("%s: invalid params\n", func); return NULL; } if (type == INPUT_MPLANE) { @@ -154,7 +154,7 @@ int msm_vidc_start_streaming(struct vb2_queue *q, unsigned int count) enum msm_vidc_buffer_type buf_type; if (!q || !q->drv_priv) { - d_vpr_e("%s: invalid input, q = %pK\n", q); + d_vpr_e("%s: invalid input, q = %pK\n", __func__, q); return -EINVAL; } inst = q->drv_priv; @@ -222,7 +222,7 @@ int msm_vidc_start_streaming(struct vb2_queue *q, unsigned int count) else goto error; } else { - i_vpr_e(inst, "%s: invalid type %d\n", q->type); + i_vpr_e(inst, "%s: invalid type %d\n", __func__, q->type); goto error; } if (rc) @@ -271,7 +271,7 @@ void msm_vidc_stop_streaming(struct vb2_queue *q) struct msm_vidc_inst *inst; if (!q || !q->drv_priv) { - d_vpr_e("%s: invalid input, q = %pK\n", q); + d_vpr_e("%s: invalid input, q = %pK\n", __func__, q); return; } inst = q->drv_priv; @@ -302,7 +302,7 @@ void msm_vidc_stop_streaming(struct vb2_queue *q) else if (is_encode_session(inst)) rc = msm_venc_streamoff_output(inst); } else { - i_vpr_e(inst, "%s: invalid type %d\n", q->type); + i_vpr_e(inst, "%s: invalid type %d\n", __func__, q->type); goto error; } if (rc) diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index c278db734d..20a480dae0 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -537,10 +537,10 @@ static int __vote_bandwidth(struct bus_info *bus, return -EINVAL; } - d_vpr_p("Voting bus %s to ab %llu kBps\n", bus->name, bw_kbps); + d_vpr_p("Voting bus %s to ab %lu kBps\n", bus->name, bw_kbps); rc = icc_set_bw(bus->path, bw_kbps, 0); if (rc) - d_vpr_e("Failed voting bus %s to ab %llu, rc=%d\n", + d_vpr_e("Failed voting bus %s to ab %lu, rc=%d\n", bus->name, bw_kbps, rc); return rc; @@ -603,7 +603,7 @@ int __vote_buses(struct msm_vidc_core *core, bus->range[0], bus->range[1]); if (TRIVIAL_BW_CHANGE(bw_kbps, bw_prev) && bw_prev) { - d_vpr_l("Skip voting bus %s to %llu kBps\n", + d_vpr_l("Skip voting bus %s to %lu kBps\n", bus->name, bw_kbps); continue; } @@ -1572,32 +1572,6 @@ failed_to_reset: return rc; } -void __disable_unprepare_clks(struct msm_vidc_core *core) -{ - struct clock_info *cl; - - if (!core) { - d_vpr_e("%s: invalid params\n", __func__); - return; - } - - venus_hfi_for_each_clock_reverse(core, cl) { - if (!cl->clk) - continue; - d_vpr_h("Clock: %s disable and unprepare\n", - cl->name); - - if (!__clk_is_enabled(cl->clk)) - d_vpr_e("%s: clock %s already disabled\n", - __func__, cl->name); - - clk_disable_unprepare(cl->clk); - if (cl->has_scaling) - __set_clk_rate(core, cl, 0); - cl->prev = 0; - } -} - int __reset_ahb2axi_bridge(struct msm_vidc_core *core) { int rc, i; @@ -1632,71 +1606,6 @@ failed_to_reset: return rc; } -int __prepare_enable_clks(struct msm_vidc_core *core) -{ - struct clock_info *cl = NULL; - int rc = 0, c = 0; - u64 rate = 0; - - if (!core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - venus_hfi_for_each_clock(core, cl) { - if (!cl->clk) { - d_vpr_e("%s: invalid clock\n", __func__); - rc = -EINVAL; - goto fail_clk_enable; - } - /* - * For the clocks we control, set the rate prior to preparing - * them. Since we don't really have a load at this point, scale - * it to the lowest frequency possible - */ - if (cl->has_scaling) { - rate = clk_round_rate(cl->clk, 0); - /** - * source clock is already multipled with scaling ratio and __set_clk_rate - * attempts to multiply again. So divide scaling ratio before calling - * __set_clk_rate. - */ - rate = rate / MSM_VIDC_CLOCK_SOURCE_SCALING_RATIO; - __set_clk_rate(core, cl, rate); - } - - rc = clk_prepare_enable(cl->clk); - if (rc) { - d_vpr_e("Failed to enable clocks\n"); - goto fail_clk_enable; - } - - if (!__clk_is_enabled(cl->clk)) - d_vpr_e("%s: clock %s not enabled\n", - __func__, cl->name); - - c++; - d_vpr_h("Clock: %s prepared and enabled\n", cl->name); - } - - call_venus_op(core, clock_config_on_enable, core); - return rc; - -fail_clk_enable: - venus_hfi_for_each_clock_reverse_continue(core, cl, c) { - if (!cl->clk) - continue; - d_vpr_e("Clock: %s disable and unprepare\n", - cl->name); - clk_disable_unprepare(cl->clk); - if (cl->has_scaling) - __set_clk_rate(core, cl, 0); - cl->prev = 0; - } - - return rc; -} - static void __deinit_bus(struct msm_vidc_core *core) { struct bus_info *bus = NULL; @@ -1918,113 +1827,6 @@ static void __deinit_resources(struct msm_vidc_core *core) __deinit_regulators(core); } -static int __disable_regulator(struct regulator_info *rinfo, - struct msm_vidc_core *core) -{ - int rc = 0; - - if (!rinfo->regulator) { - d_vpr_e("%s: invalid regulator\n", __func__); - return -EINVAL; - } - - d_vpr_h("Disabling regulator %s\n", rinfo->name); - - /* - * This call is needed. Driver needs to acquire the control back - * from HW in order to disable the regualtor. Else the behavior - * is unknown. - */ - - rc = __acquire_regulator(core, rinfo); - if (rc) { - /* - * This is somewhat fatal, but nothing we can do - * about it. We can't disable the regulator w/o - * getting it back under s/w control - */ - d_vpr_e("Failed to acquire control on %s\n", - rinfo->name); - - goto disable_regulator_failed; - } - - if (!regulator_is_enabled(rinfo->regulator)) - d_vpr_e("%s: regulator %s already disabled\n", - __func__, rinfo->name); - - rc = regulator_disable(rinfo->regulator); - if (rc) { - d_vpr_e("Failed to disable %s: %d\n", - rinfo->name, rc); - goto disable_regulator_failed; - } - - return 0; -disable_regulator_failed: - - /* Bring attention to this issue */ - __fatal_error(true); - return rc; -} - -int __enable_regulators(struct msm_vidc_core *core) -{ - int rc = 0, c = 0; - struct regulator_info *rinfo; - - if (!core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - d_vpr_h("Enabling regulators\n"); - - venus_hfi_for_each_regulator(core, rinfo) { - if (!rinfo->regulator) { - d_vpr_e("%s: invalid regulator\n", __func__); - rc = -EINVAL; - goto err_reg_enable_failed; - } - - rc = regulator_enable(rinfo->regulator); - if (rc) { - d_vpr_e("Failed to enable %s: %d\n", - rinfo->name, rc); - goto err_reg_enable_failed; - } - - if (!regulator_is_enabled(rinfo->regulator)) - d_vpr_e("%s: regulator %s not enabled\n", - __func__, rinfo->name); - - d_vpr_h("Enabled regulator %s\n", - rinfo->name); - c++; - } - - return 0; - -err_reg_enable_failed: - venus_hfi_for_each_regulator_reverse_continue(core, rinfo, c) { - if (!rinfo->regulator) - continue; - __disable_regulator(rinfo, core); - } - - return rc; -} - -int __disable_regulators(struct msm_vidc_core *core) -{ - struct regulator_info *rinfo; - - d_vpr_h("Disabling regulators\n"); - venus_hfi_for_each_regulator_reverse(core, rinfo) - __disable_regulator(rinfo, core); - - return 0; -} - static int __release_subcaches(struct msm_vidc_core *core) { int rc = 0; @@ -2075,7 +1877,7 @@ static int __release_subcaches(struct msm_vidc_core *core) venus_hfi_for_each_subcache_reverse(core, sinfo) { if (sinfo->isactive) { sinfo->isset = false; - d_vpr_h("Release Subcache id %d size %d done\n", + d_vpr_h("Release Subcache id %d size %lu done\n", sinfo->subcache->slice_id, sinfo->subcache->slice_size); } @@ -2196,7 +1998,7 @@ static int __set_subcaches(struct msm_vidc_core *core) venus_hfi_for_each_subcache(core, sinfo) { if (sinfo->isactive) { sinfo->isset = true; - d_vpr_h("Set Subcache id %d size %d done\n", + d_vpr_h("Set Subcache id %d size %lu done\n", sinfo->subcache->slice_id, sinfo->subcache->slice_size); } diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index b8b7fe212d..79bc8d4f79 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -260,7 +260,7 @@ static bool check_for_packet_payload(struct msm_vidc_inst *inst, u32 payload_size = 0; if (!inst || !pkt) { - d_vpr_e("%s: invalid params %d\n", __func__); + d_vpr_e("%s: invalid params\n", __func__); return false; } @@ -308,7 +308,7 @@ static bool check_last_flag(struct msm_vidc_inst *inst, struct hfi_buffer *buffer; if (!inst || !pkt) { - d_vpr_e("%s: invalid params %d\n", __func__); + d_vpr_e("%s: invalid params\n", __func__); return false; } From 87763b734be973d03716a3f1f12a2d58227b40db Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Tue, 7 Dec 2021 15:52:33 +0530 Subject: [PATCH 0497/1061] video-driver: Add sku_version as device attr Expose sku_version under device attribute. Change-Id: I6800bf321b5678953a2a616fd3d2e85ad977de44 Signed-off-by: Priyanka Gujjula Signed-off-by: Govindaraj Rajagopal --- driver/vidc/src/msm_vidc_probe.c | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/driver/vidc/src/msm_vidc_probe.c b/driver/vidc/src/msm_vidc_probe.c index daf1a14263..7281bb2ac7 100644 --- a/driver/vidc/src/msm_vidc_probe.c +++ b/driver/vidc/src/msm_vidc_probe.c @@ -82,7 +82,33 @@ exit: return rc; } +static ssize_t sku_version_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct msm_vidc_core *core; + + /* + * Default sku version: 0 + * driver possibly not probed yet or not the main device. + */ + if (!dev || !dev->driver || + !of_device_is_compatible(dev->of_node, "qcom,msm-vidc")) + return 0; + + core = dev_get_drvdata(dev); + if (!core || !core->platform) { + d_vpr_e("%s: invalid core\n", __func__); + return 0; + } + + return scnprintf(buf, PAGE_SIZE, "%d", + core->platform->data.sku_version); +} + +static DEVICE_ATTR_RO(sku_version); + static struct attribute *msm_vidc_core_attrs[] = { + &dev_attr_sku_version.attr, NULL }; From dd9dfba57a9183582c5c090b916e2df2ca7d79ec Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Mon, 22 Nov 2021 17:29:57 +0530 Subject: [PATCH 0498/1061] video: driver: fix invalid ptr dereference issue with print_vidc_buffer Release cmd + RO sent to firmware for entries present in &inst->buffers.release.list. After issuing release cmd before getting release done, driver removed excessive mapping entries which holds mapping refcount as 1. So last refcount on underlying dmabuf reaches zero. RO & release list doesnot take dma ref_count using dma_buf_get(). Dmabuf ptr willbe obsolete when its last ref was last. So removed print_vidc_buffer in msm_vdec_handle_release_buffer() to avoid NULL ptr dereferrence inside print_vidc_buffer. Change-Id: I0bdac5e2a398f67b4aac95fa78eaf6f2b816a315 Signed-off-by: Govindaraj Rajagopal --- driver/vidc/src/msm_vdec.c | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-) diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 75272781dd..23ef1cd286 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -2082,8 +2082,19 @@ int msm_vdec_handle_release_buffer(struct msm_vidc_inst *inst, d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - - print_vidc_buffer(VIDC_LOW, "low ", "release done", inst, buf); + /** + * RO & release list doesnot take dma ref_count using dma_buf_get(). + * Dmabuf ptr willbe obsolete when its last ref was last. + * Use direct api to print logs instead of calling print_vidc_buffer() + * api, which will attempt to dereferrence dmabuf ptr. + */ + i_vpr_l(inst, + "release done: %s: idx %2d fd %3d off %d daddr %#llx size %8d filled %8d flags %#x ts %8lld attr %#x counts(etb ebd ftb fbd) %4llu %4llu %4llu %4llu\n", + buf_name(buf->type), + buf->index, buf->fd, buf->data_offset, + buf->device_addr, buf->buffer_size, buf->data_size, + buf->flags, buf->timestamp, buf->attr, inst->debug_count.etb, + inst->debug_count.ebd, inst->debug_count.ftb, inst->debug_count.fbd); /* delete the buffer from release list */ list_del(&buf->list); msm_memory_free(inst, buf); From ae4e77ad42999ec5bcc6f7d7126da17fa30d52bc Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Fri, 3 Dec 2021 21:25:20 +0530 Subject: [PATCH 0499/1061] video: driver: fix deadlock issue with response workqueue Both &inst->stats_work and &inst->response_work both were using &inst->response_workq for scheduling works. From reverse thread handle_session_response_work_handler incremented refcount via get_inst_ref(), at the same time driverfd got closed by HAL. So strongref is held by handle_session_response_work_handler and as part of put_inst(refcount is zero), will attempt to destry &inst->response_workq inside msm_vidc_close_helper. destroy_workqueue() call will wait until all already fired events to complete, which will never happen in this case i.e leading to deadlock situation. It is an attempt to self destruction, which is not allowed. Added changes to avoid above mentioned situation. Change-Id: Ieb26a4b02f87f2bb738027cfd16e4c261b756dc3 Signed-off-by: Govindaraj Rajagopal --- driver/vidc/inc/venus_hfi_response.h | 1 + driver/vidc/src/msm_vidc.c | 2 +- driver/vidc/src/venus_hfi_response.c | 11 +++++++++++ 3 files changed, 13 insertions(+), 1 deletion(-) diff --git a/driver/vidc/inc/venus_hfi_response.h b/driver/vidc/inc/venus_hfi_response.h index 23189c4beb..83e05dd9a9 100644 --- a/driver/vidc/inc/venus_hfi_response.h +++ b/driver/vidc/inc/venus_hfi_response.h @@ -20,6 +20,7 @@ void handle_session_response_work_handler(struct work_struct *work); int handle_session_response_work(struct msm_vidc_inst *inst, struct response_work *work); int cancel_response_work(struct msm_vidc_inst *inst); +int cancel_response_work_sync(struct msm_vidc_inst *inst); int handle_system_error(struct msm_vidc_core *core, struct hfi_packet *pkt); void fw_coredump(struct msm_vidc_core *core); diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index 7591da0f23..10fd4b7ce5 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -953,13 +953,13 @@ int msm_vidc_close(void *instance) i_vpr_h(inst, "%s()\n", __func__); inst_lock(inst, __func__); - cancel_response_work(inst); /* print final stats */ msm_vidc_print_stats(inst); msm_vidc_session_close(inst); msm_vidc_remove_session(inst); msm_vidc_destroy_buffers(inst); inst_unlock(inst, __func__); + cancel_response_work_sync(inst); cancel_stats_work_sync(inst); msm_vidc_show_stats(inst); put_inst(inst); diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index 79bc8d4f79..8dabb9f5bc 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -1748,6 +1748,17 @@ int cancel_response_work(struct msm_vidc_inst *inst) return 0; } +int cancel_response_work_sync(struct msm_vidc_inst *inst) +{ + if (!inst) { + d_vpr_e("%s: Invalid arguments\n", __func__); + return -EINVAL; + } + cancel_delayed_work_sync(&inst->response_work); + + return 0; +} + static int handle_session_response(struct msm_vidc_core *core, struct hfi_header *hdr) { From 60c04ed08da04c13b4e853294b17f9e760522b97 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Fri, 3 Dec 2021 10:22:54 +0530 Subject: [PATCH 0500/1061] video: driver: enable session stability testing Enable session stability test support. Clients can trigger session stability through debugfs as follows: echo > /d/msm_vidc/core/trigger_stability u64 trigger_val provides: stability_type : 0-3 bits(one of the HFI_STABILITY_TYPE_*) sub_client_id : 4-7 bits(1 - CCE, 2 - VSP, 3 - VPP, 4 - CPUSS) reserved : 8-31 bits(Not used) payload : 32-63 bits(depends on stability_type) For e.x, to VCODEC_HUNG on CCE hardware module for 5 consequtive frames. adb shell "echo 0x500000011 > /d/msm_vidc/core/trigger_stability". Change-Id: I604f0430e3ab905504c4f0b7c84b157a5d464958 Signed-off-by: Govindaraj Rajagopal --- driver/vidc/inc/msm_vidc_driver.h | 4 ++ driver/vidc/inc/msm_vidc_inst.h | 2 + driver/vidc/inc/msm_vidc_internal.h | 11 ++++ driver/vidc/inc/venus_hfi.h | 2 + driver/vidc/src/msm_vidc.c | 2 + driver/vidc/src/msm_vidc_debug.c | 46 ++++++++++++++++ driver/vidc/src/msm_vidc_driver.c | 78 ++++++++++++++++++++++++++++ driver/vidc/src/venus_hfi.c | 47 +++++++++++++++++ driver/vidc/src/venus_hfi_response.c | 9 ++++ 9 files changed, 201 insertions(+) diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 9050a561e9..db2322d171 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -319,6 +319,10 @@ int msm_vidc_smmu_fault_handler(struct iommu_domain *domain, int msm_vidc_trigger_ssr(struct msm_vidc_core *core, u64 trigger_ssr_val); void msm_vidc_ssr_handler(struct work_struct *work); +int msm_vidc_trigger_stability(struct msm_vidc_core *core, + u64 trigger_stability_val); +void msm_vidc_stability_handler(struct work_struct *work); +int cancel_stability_work_sync(struct msm_vidc_inst *inst); void msm_vidc_fw_unload_handler(struct work_struct *work); int msm_vidc_suspend(struct msm_vidc_core *core); void msm_vidc_batch_handler(struct work_struct *work); diff --git a/driver/vidc/inc/msm_vidc_inst.h b/driver/vidc/inc/msm_vidc_inst.h index 0a9ed474c6..b18727c21f 100644 --- a/driver/vidc/inc/msm_vidc_inst.h +++ b/driver/vidc/inc/msm_vidc_inst.h @@ -129,6 +129,8 @@ struct msm_vidc_inst { struct msm_vidc_session_idle session_idle; struct delayed_work response_work; struct delayed_work stats_work; + struct work_struct stability_work; + struct msm_vidc_stability stability; struct workqueue_struct *response_workq; struct list_head response_works; /* list of struct response_work */ struct list_head enc_input_crs; diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 275d060e3e..ef93c33351 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -555,6 +555,11 @@ enum msm_vidc_ssr_trigger_type { SSR_HW_WDOG_IRQ, }; +enum msm_vidc_stability_trigger_type { + STABILITY_VCODEC_HUNG = 1, + STABILITY_ENC_BUFFER_FULL, +}; + enum msm_vidc_cache_op { MSM_VIDC_CACHE_CLEAN, MSM_VIDC_CACHE_INVALIDATE, @@ -873,6 +878,12 @@ struct msm_vidc_ssr { u32 test_addr; }; +struct msm_vidc_stability { + enum msm_vidc_stability_trigger_type stability_type; + u32 sub_client_id; + u32 value; +}; + struct msm_vidc_sfr { u32 bufSize; u8 rg_data[1]; diff --git a/driver/vidc/inc/venus_hfi.h b/driver/vidc/inc/venus_hfi.h index 4a7c3ae963..48c9a85235 100644 --- a/driver/vidc/inc/venus_hfi.h +++ b/driver/vidc/inc/venus_hfi.h @@ -52,6 +52,8 @@ int venus_hfi_noc_error_info(struct msm_vidc_core *core); int venus_hfi_suspend(struct msm_vidc_core *core); int venus_hfi_trigger_ssr(struct msm_vidc_core *core, u32 type, u32 client_id, u32 addr); +int venus_hfi_trigger_stability(struct msm_vidc_inst *inst, u32 type, + u32 client_id, u32 val); int venus_hfi_scale_clocks(struct msm_vidc_inst* inst, u64 freq); int venus_hfi_scale_buses(struct msm_vidc_inst* inst, u64 bw_ddr, u64 bw_llcc); diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index 10fd4b7ce5..d25e812415 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -889,6 +889,7 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) INIT_DELAYED_WORK(&inst->response_work, handle_session_response_work_handler); INIT_DELAYED_WORK(&inst->stats_work, msm_vidc_stats_handler); + INIT_WORK(&inst->stability_work, msm_vidc_stability_handler); inst->capabilities = kzalloc(sizeof(struct msm_vidc_inst_capability), GFP_KERNEL); if (!inst->capabilities) { @@ -960,6 +961,7 @@ int msm_vidc_close(void *instance) msm_vidc_destroy_buffers(inst); inst_unlock(inst, __func__); cancel_response_work_sync(inst); + cancel_stability_work_sync(inst); cancel_stats_work_sync(inst); msm_vidc_show_stats(inst); put_inst(inst); diff --git a/driver/vidc/src/msm_vidc_debug.c b/driver/vidc/src/msm_vidc_debug.c index b1c8b1fc9f..3f476ab1ad 100644 --- a/driver/vidc/src/msm_vidc_debug.c +++ b/driver/vidc/src/msm_vidc_debug.c @@ -15,6 +15,7 @@ extern struct msm_vidc_core *g_core; #define MAX_SSR_STRING_LEN 64 +#define MAX_STABILITY_STRING_LEN 64 #define MAX_DEBUG_LEVEL_STRING_LEN 15 #define MSM_VIDC_MIN_STATS_DELAY_MS 200 #define MSM_VIDC_MAX_STATS_DELAY_MS 10000 @@ -296,6 +297,47 @@ static const struct file_operations ssr_fops = { .write = trigger_ssr_write, }; +static ssize_t trigger_stability_write(struct file *filp, const char __user *buf, + size_t count, loff_t *ppos) +{ + unsigned long stability_trigger_val = 0; + int rc = 0; + struct msm_vidc_core *core = filp->private_data; + size_t size = MAX_STABILITY_STRING_LEN; + char kbuf[MAX_STABILITY_STRING_LEN + 1] = { 0 }; + + if (!buf) + return -EINVAL; + + if (!count) + goto exit; + + if (count < size) + size = count; + + if (copy_from_user(kbuf, buf, size)) { + d_vpr_e("%s: User memory fault\n", __func__); + rc = -EFAULT; + goto exit; + } + + rc = kstrtoul(kbuf, 0, &stability_trigger_val); + if (rc) { + d_vpr_e("%s: returning error err %d\n", __func__, rc); + rc = -EINVAL; + } else { + msm_vidc_trigger_stability(core, stability_trigger_val); + rc = count; + } +exit: + return rc; +} + +static const struct file_operations stability_fops = { + .open = simple_open, + .write = trigger_stability_write, +}; + struct dentry* msm_vidc_debugfs_init_drv() { struct dentry *dir = NULL; @@ -359,6 +401,10 @@ struct dentry *msm_vidc_debugfs_init_core(void *core_in) d_vpr_e("debugfs_create_file: fail\n"); goto failed_create_dir; } + if (!debugfs_create_file("trigger_stability", 0200, dir, core, &stability_fops)) { + d_vpr_e("trigger_stability debugfs_create_file: fail\n"); + goto failed_create_dir; + } if (!debugfs_create_file("stats_delay_ms", 0644, dir, core, &stats_delay_fops)) { d_vpr_e("debugfs_create_file: fail\n"); goto failed_create_dir; diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 6e879767d2..c0a6c68f23 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -42,6 +42,13 @@ extern struct msm_vidc_core *g_core; #define SSR_ADDR_ID 0xFFFFFFFF00000000 #define SSR_ADDR_SHIFT 32 +#define STABILITY_TYPE 0x0000000F +#define STABILITY_TYPE_SHIFT 0 +#define STABILITY_SUB_CLIENT_ID 0x000000F0 +#define STABILITY_SUB_CLIENT_ID_SHIFT 4 +#define STABILITY_PAYLOAD_ID 0xFFFFFFFF00000000 +#define STABILITY_PAYLOAD_SHIFT 32 + struct msm_vidc_cap_name { enum msm_vidc_inst_capability_type cap; char *name; @@ -4677,6 +4684,77 @@ void msm_vidc_ssr_handler(struct work_struct *work) core_unlock(core, __func__); } +int msm_vidc_trigger_stability(struct msm_vidc_core *core, + u64 trigger_stability_val) +{ + struct msm_vidc_inst *inst = NULL; + struct msm_vidc_stability stability; + + if (!core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + /* + * + * stability_type: 0-3 bits + * sub_client_id: 4-7 bits + * reserved: 8-31 bits + * payload: 32-63 bits + */ + memset(&stability, 0, sizeof(struct msm_vidc_stability)); + stability.stability_type = (trigger_stability_val & + (unsigned long)STABILITY_TYPE) >> STABILITY_TYPE_SHIFT; + stability.sub_client_id = (trigger_stability_val & + (unsigned long)STABILITY_SUB_CLIENT_ID) >> STABILITY_SUB_CLIENT_ID_SHIFT; + stability.value = (trigger_stability_val & + (unsigned long)STABILITY_PAYLOAD_ID) >> STABILITY_PAYLOAD_SHIFT; + + core_lock(core, __func__); + list_for_each_entry(inst, &core->instances, list) { + memcpy(&inst->stability, &stability, sizeof(struct msm_vidc_stability)); + schedule_work(&inst->stability_work); + } + core_unlock(core, __func__); + + return 0; +} + +void msm_vidc_stability_handler(struct work_struct *work) +{ + int rc; + struct msm_vidc_inst *inst; + struct msm_vidc_stability *stability; + + inst = container_of(work, struct msm_vidc_inst, stability_work); + inst = get_inst_ref(g_core, inst); + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return; + } + + inst_lock(inst, __func__); + stability = &inst->stability; + rc = venus_hfi_trigger_stability(inst, stability->stability_type, + stability->sub_client_id, stability->value); + if (rc) + i_vpr_e(inst, "%s: trigger_stability failed\n", __func__); + inst_unlock(inst, __func__); + + put_inst(inst); +} + +int cancel_stability_work_sync(struct msm_vidc_inst *inst) +{ + if (!inst) { + d_vpr_e("%s: Invalid arguments\n", __func__); + return -EINVAL; + } + cancel_work_sync(&inst->stability_work); + + return 0; +} + void msm_vidc_fw_unload_handler(struct work_struct *work) { struct msm_vidc_core *core = NULL; diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index 20a480dae0..2b1d9fc59d 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -2871,6 +2871,53 @@ exit: return rc; } +int venus_hfi_trigger_stability(struct msm_vidc_inst *inst, u32 type, + u32 client_id, u32 val) +{ + struct msm_vidc_core *core; + u32 payload[2]; + int rc = 0; + + if (!inst || !inst->core || !inst->packet) { + d_vpr_e("%s: Invalid params\n", __func__); + return -EINVAL; + } + core = inst->core; + core_lock(core, __func__); + + if (!__valdiate_session(core, inst, __func__)) { + rc = -EINVAL; + goto unlock; + } + + payload[0] = client_id << 4 | type; + payload[1] = val; + rc = hfi_create_header(inst->packet, inst->packet_size, + inst->session_id, core->header_id++); + if (rc) + goto unlock; + + /* HFI_CMD_STABILITY */ + rc = hfi_create_packet(inst->packet, inst->packet_size, + HFI_CMD_STABILITY, + HFI_HOST_FLAGS_RESPONSE_REQUIRED | + HFI_HOST_FLAGS_INTR_REQUIRED, + HFI_PAYLOAD_U64, + HFI_PORT_NONE, + core->packet_id++, + &payload, sizeof(u64)); + if (rc) + goto unlock; + + rc = __iface_cmdq_write(core, inst->packet); + if (rc) + goto unlock; + +unlock: + core_unlock(core, __func__); + return rc; +} + int venus_hfi_session_open(struct msm_vidc_inst *inst) { int rc = 0; diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index 8dabb9f5bc..6dbadc76d3 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -1254,6 +1254,14 @@ static int handle_session_resume(struct msm_vidc_inst *inst, return 0; } +static int handle_session_stability(struct msm_vidc_inst *inst, + struct hfi_packet *pkt) +{ + if (pkt->flags & HFI_FW_FLAGS_SUCCESS) + i_vpr_h(inst, "%s: successful\n", __func__); + return 0; +} + static int handle_session_command(struct msm_vidc_inst *inst, struct hfi_packet *pkt) { @@ -1269,6 +1277,7 @@ static int handle_session_command(struct msm_vidc_inst *inst, {HFI_CMD_SUBSCRIBE_MODE, handle_session_subscribe_mode }, {HFI_CMD_DELIVERY_MODE, handle_session_delivery_mode }, {HFI_CMD_RESUME, handle_session_resume }, + {HFI_CMD_STABILITY, handle_session_stability }, }; /* handle session pkt */ From 1e55de3d4ae5c0b331ebaf08f7548c8d236094cd Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Thu, 9 Dec 2021 15:41:45 +0530 Subject: [PATCH 0501/1061] video: driver: add support for timestamp reorder Added support for timestamp reorder. It is default disabled. Change-Id: I51a6fc785860081b651fc67f443132cb2675b9fd Signed-off-by: Govindaraj Rajagopal --- driver/platform/diwali/src/msm_vidc_diwali.c | 5 + driver/platform/waipio/src/msm_vidc_waipio.c | 5 + driver/vidc/inc/msm_vidc_driver.h | 10 ++ driver/vidc/inc/msm_vidc_inst.h | 1 + driver/vidc/inc/msm_vidc_internal.h | 1 + driver/vidc/src/msm_vdec.c | 4 + driver/vidc/src/msm_vidc.c | 1 + driver/vidc/src/msm_vidc_driver.c | 111 ++++++++++++++++++ driver/vidc/src/venus_hfi_response.c | 11 ++ .../uapi/vidc/media/v4l2_vidc_extensions.h | 2 + 10 files changed, 151 insertions(+) diff --git a/driver/platform/diwali/src/msm_vidc_diwali.c b/driver/platform/diwali/src/msm_vidc_diwali.c index dee054a645..b912fda01b 100644 --- a/driver/platform/diwali/src/msm_vidc_diwali.c +++ b/driver/platform/diwali/src/msm_vidc_diwali.c @@ -381,6 +381,11 @@ static struct msm_platform_inst_capability instance_data_diwali_v0[] = { {0}, NULL, msm_vidc_set_u32}, + {TS_REORDER, DEC, H264|HEVC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_TS_REORDER}, + {HFLIP, ENC, CODECS_ALL, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index b00ae7eafa..aa1d545763 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -262,6 +262,11 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {0}, NULL, msm_vidc_set_u32}, + {TS_REORDER, DEC, H264|HEVC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_TS_REORDER}, + {HFLIP, ENC, CODECS_ALL, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index db2322d171..572de0f39e 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -67,6 +67,12 @@ static inline is_output_meta_buffer(enum msm_vidc_buffer_type buffer_type) return buffer_type == MSM_VIDC_BUF_OUTPUT_META; } +static inline is_ts_reorder_allowed(struct msm_vidc_inst *inst) +{ + return !!(inst->capabilities->cap[TS_REORDER].value && + is_decode_session(inst) && !is_image_session(inst)); +} + static inline is_scaling_enabled(struct msm_vidc_inst *inst) { return inst->crop.left != inst->compose.left || @@ -428,6 +434,10 @@ int msm_vidc_update_timestamp(struct msm_vidc_inst *inst, u64 timestamp); int msm_vidc_set_auto_framerate(struct msm_vidc_inst *inst, u64 timestamp); int msm_vidc_calc_window_avg_framerate(struct msm_vidc_inst *inst); int msm_vidc_flush_ts(struct msm_vidc_inst *inst); +int msm_vidc_ts_reorder_insert_timestamp(struct msm_vidc_inst *inst, u64 timestamp); +int msm_vidc_ts_reorder_remove_timestamp(struct msm_vidc_inst *inst, u64 timestamp); +int msm_vidc_ts_reorder_get_first_timestamp(struct msm_vidc_inst *inst, u64 *timestamp); +int msm_vidc_ts_reorder_flush(struct msm_vidc_inst *inst); const char *buf_name(enum msm_vidc_buffer_type type); void msm_vidc_free_capabililty_list(struct msm_vidc_inst *inst, enum msm_vidc_ctrl_list_type list_type); diff --git a/driver/vidc/inc/msm_vidc_inst.h b/driver/vidc/inc/msm_vidc_inst.h index b18727c21f..7ed3096e03 100644 --- a/driver/vidc/inc/msm_vidc_inst.h +++ b/driver/vidc/inc/msm_vidc_inst.h @@ -118,6 +118,7 @@ struct msm_vidc_inst { struct msm_vidc_mappings_info mappings; struct msm_vidc_allocations_info allocations; struct msm_vidc_timestamps timestamps; + struct msm_vidc_timestamps ts_reorder; /* list of struct msm_vidc_timestamp */ bool subscribed_input_psc; bool subscribed_output_psc; bool subscribed_input_prop; diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index ef93c33351..b152ba2a43 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -363,6 +363,7 @@ enum msm_vidc_inst_capability_type { MB_CYCLES_FW, MB_CYCLES_FW_VPP, SECURE_MODE, + TS_REORDER, HFLIP, VFLIP, ROTATION, diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 23ef1cd286..0cebe69d1b 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -1610,6 +1610,10 @@ int msm_vdec_streamon_input(struct msm_vidc_inst *inst) if (rc) goto error; + rc = msm_vidc_ts_reorder_flush(inst); + if (rc) + goto error; + return 0; error: diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index d25e812415..0223d0d9d8 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -840,6 +840,7 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) } INIT_LIST_HEAD(&inst->response_works); INIT_LIST_HEAD(&inst->timestamps.list); + INIT_LIST_HEAD(&inst->ts_reorder.list); INIT_LIST_HEAD(&inst->buffers.input.list); INIT_LIST_HEAD(&inst->buffers.input_meta.list); INIT_LIST_HEAD(&inst->buffers.output.list); diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index c0a6c68f23..50c9db53d2 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -81,6 +81,7 @@ static const struct msm_vidc_cap_name cap_name_arr[] = { {MB_CYCLES_FW, "MB_CYCLES_FW" }, {MB_CYCLES_FW_VPP, "MB_CYCLES_FW_VPP" }, {SECURE_MODE, "SECURE_MODE" }, + {TS_REORDER, "TS_REORDER" }, {HFLIP, "HFLIP" }, {VFLIP, "VFLIP" }, {ROTATION, "ROTATION" }, @@ -2404,6 +2405,102 @@ int msm_vidc_update_timestamp(struct msm_vidc_inst *inst, u64 timestamp) return 0; } +int msm_vidc_ts_reorder_insert_timestamp(struct msm_vidc_inst *inst, u64 timestamp) +{ + struct msm_vidc_timestamp *ts; + + if (!inst) { + d_vpr_e("%s: Invalid params\n", __func__); + return -EINVAL; + } + + /* allocate ts from pool */ + ts = msm_memory_alloc(inst, MSM_MEM_POOL_TIMESTAMP); + if (!ts) { + i_vpr_e(inst, "%s: ts alloc failed\n", __func__); + return -ENOMEM; + } + + /* initialize ts node */ + INIT_LIST_HEAD(&ts->sort.list); + ts->sort.val = timestamp; + inst->ts_reorder.count++; + list_add_tail(&ts->sort.list, &inst->ts_reorder.list); + + return 0; +} + +int msm_vidc_ts_reorder_remove_timestamp(struct msm_vidc_inst *inst, u64 timestamp) +{ + struct msm_vidc_timestamp *ts, *temp; + + if (!inst) { + d_vpr_e("%s: Invalid params\n", __func__); + return -EINVAL; + } + + /* remove matching node */ + list_for_each_entry_safe(ts, temp, &inst->ts_reorder.list, sort.list) { + if (ts->sort.val == timestamp) { + list_del_init(&ts->sort.list); + inst->ts_reorder.count--; + msm_memory_free(inst, ts); + break; + } + } + + return 0; +} + +int msm_vidc_ts_reorder_get_first_timestamp(struct msm_vidc_inst *inst, u64 *timestamp) +{ + struct msm_vidc_timestamp *ts; + + if (!inst || !timestamp) { + d_vpr_e("%s: Invalid params\n", __func__); + return -EINVAL; + } + + /* check if list empty */ + if (list_empty(&inst->ts_reorder.list)) { + i_vpr_e(inst, "%s: list empty. ts %lld\n", __func__, timestamp); + return -EINVAL; + } + + /* get 1st node from reorder list */ + ts = list_first_entry(&inst->ts_reorder.list, + struct msm_vidc_timestamp, sort.list); + list_del_init(&ts->sort.list); + + /* copy timestamp */ + *timestamp = ts->sort.val; + + inst->ts_reorder.count--; + msm_memory_free(inst, ts); + + return 0; +} + +int msm_vidc_ts_reorder_flush(struct msm_vidc_inst *inst) +{ + struct msm_vidc_timestamp *temp, *ts = NULL; + + if (!inst) { + d_vpr_e("%s: Invalid params\n", __func__); + return -EINVAL; + } + + /* flush all entries */ + list_for_each_entry_safe(ts, temp, &inst->ts_reorder.list, sort.list) { + i_vpr_l(inst, "%s: flushing ts: val %lld\n", __func__, ts->sort.val); + list_del(&ts->sort.list); + msm_memory_free(inst, ts); + } + inst->ts_reorder.count = 0; + + return 0; +} + int msm_vidc_get_delayed_unmap(struct msm_vidc_inst *inst, struct msm_vidc_map *map) { int rc = 0; @@ -3094,6 +3191,13 @@ static int msm_vidc_queue_buffer(struct msm_vidc_inst *inst, struct msm_vidc_buf meta->attr |= MSM_VIDC_ATTR_QUEUED; } + /* insert timestamp for ts_reorder enable case */ + if (is_ts_reorder_allowed(inst) && is_input_buffer(buf->type)) { + rc = msm_vidc_ts_reorder_insert_timestamp(inst, buf->timestamp); + if (rc) + i_vpr_e(inst, "%s: insert timestamp failed\n", __func__); + } + if (is_input_buffer(buf->type)) inst->power.buffer_counter++; @@ -5019,6 +5123,13 @@ void msm_vidc_destroy_buffers(struct msm_vidc_inst *inst) msm_memory_free(inst, ts); } + list_for_each_entry_safe(ts, dummy_ts, &inst->ts_reorder.list, sort.list) { + i_vpr_e(inst, "%s: removing reorder ts: val %lld\n", + __func__, ts->sort.val); + list_del(&ts->sort.list); + msm_memory_free(inst, ts); + } + list_for_each_entry_safe(dbuf, dummy_dbuf, &inst->dmabuf_tracker, list) { i_vpr_e(inst, "%s: removing dma_buf %#x, refcount %u\n", __func__, dbuf->dmabuf, dbuf->refcount); diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index 6dbadc76d3..e7aa6a32c7 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -755,6 +755,13 @@ static int handle_input_buffer(struct msm_vidc_inst *inst, buf->flags = 0; buf->flags = get_driver_buffer_flags(inst, buffer->flags); + /* handle ts_reorder for no_output prop attached input buffer */ + if (is_ts_reorder_allowed(inst) && inst->hfi_frame_info.no_output) { + i_vpr_h(inst, "%s: received no_output buffer. remove timestamp %lld\n", + __func__, buf->timestamp); + msm_vidc_ts_reorder_remove_timestamp(inst, buf->timestamp); + } + print_vidc_buffer(VIDC_HIGH, "high", "dqbuf", inst, buf); msm_vidc_update_stats(inst, buf, MSM_VIDC_DEBUGFS_EVENT_EBD); @@ -886,6 +893,10 @@ static int handle_output_buffer(struct msm_vidc_inst *inst, if (!is_image_session(inst) && is_decode_session(inst) && buf->data_size) msm_vidc_update_timestamp(inst, buf->timestamp); + /* update output buffer timestamp, if ts_reorder is enabled */ + if (is_ts_reorder_allowed(inst) && buf->data_size) + msm_vidc_ts_reorder_get_first_timestamp(inst, &buf->timestamp); + print_vidc_buffer(VIDC_HIGH, "high", "dqbuf", inst, buf); msm_vidc_update_stats(inst, buf, MSM_VIDC_DEBUGFS_EVENT_FBD); diff --git a/include/uapi/vidc/media/v4l2_vidc_extensions.h b/include/uapi/vidc/media/v4l2_vidc_extensions.h index 36f4785168..6a6b0858b5 100644 --- a/include/uapi/vidc/media/v4l2_vidc_extensions.h +++ b/include/uapi/vidc/media/v4l2_vidc_extensions.h @@ -189,6 +189,8 @@ enum v4l2_mpeg_video_av1_tier { V4L2_MPEG_VIDEO_AV1_TIER_MAIN = 0, V4L2_MPEG_VIDEO_AV1_TIER_HIGH = 1, }; +/* Decoder Timestamp Reorder control */ +#define V4L2_CID_MPEG_VIDC_TS_REORDER (V4L2_CID_MPEG_VIDC_BASE + 0x34) /* Deprecate below controls once availble in gki and gsi bionic header */ #ifndef V4L2_CID_MPEG_VIDEO_BASELAYER_PRIORITY_ID From f101f90626eb46f6cfb5ed1d91eed1558b17ccb9 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Wed, 15 Dec 2021 16:52:59 +0530 Subject: [PATCH 0502/1061] video: driver: alter bitrate_mode child adjust sequence CAC depends on MIN_QUALITY feature, but due to incorrect child adjust sequence(in BITRATE_MODE cap), CAC got adjusted first before MIN_QUALITY. So CAC is getting enabled unnecessarily. Added change to address this issue. Change-Id: I179d66672576faa7dbbbaef53319efcab21fd82b Signed-off-by: Govindaraj Rajagopal --- driver/platform/waipio/src/msm_vidc_waipio.c | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index aa1d545763..84ce225aaa 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -389,8 +389,8 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {0}, {LTR_COUNT, IR_RANDOM, TIME_DELTA_BASED_RC, I_FRAME_QP, P_FRAME_QP, B_FRAME_QP, ENH_LAYER_COUNT, BIT_RATE, - CONTENT_ADAPTIVE_CODING, BITRATE_BOOST, MIN_QUALITY, - VBV_DELAY, PEAK_BITRATE,SLICE_MODE, META_ROI_INFO, + META_ROI_INFO, MIN_QUALITY, BITRATE_BOOST, VBV_DELAY, + PEAK_BITRATE, SLICE_MODE, CONTENT_ADAPTIVE_CODING, BLUR_TYPES, LOWLATENCY_MODE}, msm_vidc_adjust_bitrate_mode, msm_vidc_set_u32_enum}, @@ -407,10 +407,9 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {0}, {LTR_COUNT, IR_RANDOM, TIME_DELTA_BASED_RC, I_FRAME_QP, P_FRAME_QP, B_FRAME_QP, CONSTANT_QUALITY, ENH_LAYER_COUNT, - CONTENT_ADAPTIVE_CODING, BIT_RATE, - BITRATE_BOOST, MIN_QUALITY, VBV_DELAY, - PEAK_BITRATE, SLICE_MODE, META_ROI_INFO, BLUR_TYPES, - LOWLATENCY_MODE}, + BIT_RATE, META_ROI_INFO, MIN_QUALITY, BITRATE_BOOST, VBV_DELAY, + PEAK_BITRATE, SLICE_MODE, CONTENT_ADAPTIVE_CODING, + BLUR_TYPES, LOWLATENCY_MODE}, msm_vidc_adjust_bitrate_mode, msm_vidc_set_u32_enum}, {LOSSLESS, ENC, HEVC, From 91703af2cff0fecae93dc43279768ac87ef8afe0 Mon Sep 17 00:00:00 2001 From: Gaviraju Doddabettahalli Bettegowda Date: Fri, 17 Dec 2021 22:01:35 +0530 Subject: [PATCH 0503/1061] video: driver: update stride and scanline for NV21 color format Added changes to update the proper stride and scanline info to firmware. Change-Id: Ic8e119a48af8c3203fc21a320255d930f5c8585f Signed-off-by: Gaviraju Doddabettahalli Bettegowda --- driver/vidc/src/msm_vdec.c | 4 +++- driver/vidc/src/msm_venc.c | 3 ++- 2 files changed, 5 insertions(+), 2 deletions(-) diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 0cebe69d1b..0d39a9bb55 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -168,7 +168,9 @@ static int msm_vdec_set_linear_stride_scanline(struct msm_vidc_inst *inst) if (inst->fmts[OUTPUT_PORT].fmt.pix_mp.pixelformat != V4L2_PIX_FMT_NV12 && inst->fmts[OUTPUT_PORT].fmt.pix_mp.pixelformat != - V4L2_PIX_FMT_VIDC_P010) + V4L2_PIX_FMT_VIDC_P010 && + inst->fmts[OUTPUT_PORT].fmt.pix_mp.pixelformat != + V4L2_PIX_FMT_NV21) return 0; stride_y = inst->fmts[OUTPUT_PORT].fmt.pix_mp.width; diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index 6c7bcb5c12..b959be39cf 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -162,7 +162,8 @@ static int msm_venc_set_stride_scanline(struct msm_vidc_inst *inst, stride_y = inst->fmts[INPUT_PORT].fmt.pix_mp.width; scanline_y = inst->fmts[INPUT_PORT].fmt.pix_mp.height; if (color_format == MSM_VIDC_FMT_NV12 || - color_format == MSM_VIDC_FMT_P010) { + color_format == MSM_VIDC_FMT_P010 || + color_format == MSM_VIDC_FMT_NV21) { stride_uv = stride_y; scanline_uv = scanline_y / 2; } From dd64dc7cd340d9f42274db12b5d052c2ead1e582 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Thu, 18 Nov 2021 21:39:44 +0530 Subject: [PATCH 0504/1061] video-driver: Update BW calc for diwali Update BSE TLB read calculation for H264 decoder. Change-Id: I7fa715329927ec1c2b43d71d2492a643f26183af Signed-off-by: Priyanka Gujjula Signed-off-by: Govindaraj Rajagopal --- .../variant/iris2/src/msm_vidc_power_iris2.c | 21 ++++++++++--------- 1 file changed, 11 insertions(+), 10 deletions(-) diff --git a/driver/variant/iris2/src/msm_vidc_power_iris2.c b/driver/variant/iris2/src/msm_vidc_power_iris2.c index 2fd805c638..3e830c2c1a 100644 --- a/driver/variant/iris2/src/msm_vidc_power_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_power_iris2.c @@ -292,8 +292,16 @@ static u64 __calculate_decoder(struct vidc_bus_vote_data *d) dpb_factor = FP(1, 50, 100); dpb_write_factor = FP(1, 5, 100); - tnbr_per_lcu = lcu_size == 16 ? 128 : - lcu_size == 32 ? 64 : 128; + /* This change is applicable for all IRIS2 targets, + * But currently being done only for IRIS2 with 2 pipe + * and 1 pipe due to timeline constraints. + */ + if (num_vpp_pipes != 4) + tnbr_per_lcu = lcu_size == 16 ? 64 : + lcu_size == 32 ? 64 : 128; + else + tnbr_per_lcu = lcu_size == 16 ? 128 : + lcu_size == 32 ? 64 : 128; /* .... For DDR & LLC ...... */ ddr.vsp_read = fp_div(fp_mult(FP_INT(bitrate), @@ -343,14 +351,7 @@ static u64 __calculate_decoder(struct vidc_bus_vote_data *d) ddr.line_buffer_read = fp_div(FP_INT(tnbr_per_lcu * lcu_per_frame * fps), FP_INT(bps(1))); - /* This change is applicable for all IRIS2 targets, - * but currently being done for IRIS2 with 2 pipes - * only due to timeline constraints. - */ - if((num_vpp_pipes == 2) && (is_h264_category)) - ddr.line_buffer_write = fp_div(ddr.line_buffer_read,FP_INT(2)); - else - ddr.line_buffer_write = ddr.line_buffer_read; + ddr.line_buffer_write = ddr.line_buffer_read; if (llc_top_line_buf_enabled) { llc.line_buffer_read = ddr.line_buffer_read; llc.line_buffer_write = ddr.line_buffer_write; From 0a59d13e9dfb9c7dcba008d392839998c4f3f4ba Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Thu, 23 Dec 2021 14:19:22 +0530 Subject: [PATCH 0505/1061] video: driver: sort input timestamp for ts_reorder case For timestamp reorder feature, input ts is propagated to output as it is. This is to ensure if app queues linear order ts for bframe enabled case, it will make sure to avoid jumbled output ts(due to DPB reordering). But looks like client requirement is to always get sorted output timestamp. So added change to produce output ts always in sorted order. Change-Id: I1f7778c99e7acfb07103ff226f2bdf306a4c2fb9 Signed-off-by: Govindaraj Rajagopal --- driver/vidc/src/msm_vidc_driver.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 50c9db53d2..ff46b16b46 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -2408,6 +2408,7 @@ int msm_vidc_update_timestamp(struct msm_vidc_inst *inst, u64 timestamp) int msm_vidc_ts_reorder_insert_timestamp(struct msm_vidc_inst *inst, u64 timestamp) { struct msm_vidc_timestamp *ts; + int rc = 0; if (!inst) { d_vpr_e("%s: Invalid params\n", __func__); @@ -2424,8 +2425,10 @@ int msm_vidc_ts_reorder_insert_timestamp(struct msm_vidc_inst *inst, u64 timesta /* initialize ts node */ INIT_LIST_HEAD(&ts->sort.list); ts->sort.val = timestamp; + rc = msm_vidc_insert_sort(&inst->ts_reorder.list, &ts->sort); + if (rc) + return rc; inst->ts_reorder.count++; - list_add_tail(&ts->sort.list, &inst->ts_reorder.list); return 0; } From 6500833abfe5f00691b6539ec351f517539713f2 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Fri, 24 Dec 2021 00:11:34 +0530 Subject: [PATCH 0506/1061] video-driver: diwali: Update bitrate, heic dec spec Update encoder bitrate to 160Mbps and HEIC dec spec to HEVC decode. Change-Id: I7ab3ba47b0f87d2f396cdf05a4dcf3a5e9a14543 Signed-off-by: Priyanka Gujjula Signed-off-by: Govindaraj Rajagopal --- driver/platform/diwali/src/msm_vidc_diwali.c | 73 ++++++++++---------- 1 file changed, 38 insertions(+), 35 deletions(-) diff --git a/driver/platform/diwali/src/msm_vidc_diwali.c b/driver/platform/diwali/src/msm_vidc_diwali.c index b912fda01b..7b743562da 100644 --- a/driver/platform/diwali/src/msm_vidc_diwali.c +++ b/driver/platform/diwali/src/msm_vidc_diwali.c @@ -25,7 +25,8 @@ #define MAX_BASE_LAYER_PRIORITY_ID 63 #define MIN_CHROMA_QP_OFFSET -12 #define MAX_CHROMA_QP_OFFSET 0 -#define MAX_BITRATE 100000000 +#define MAX_BITRATE 160000000 +#define MAX_BITRATE_V1 100000000 #define DEFAULT_BITRATE 20000000 #define MIN_QP_10BIT -12 #define MIN_QP_8BIT 0 @@ -35,6 +36,8 @@ #define MIN_SLICE_BYTE_SIZE 512 #define MAX_SLICE_BYTE_SIZE \ ((MAX_BITRATE) >> 3) +#define MAX_SLICE_BYTE_SIZE_V1 \ + ((MAX_BITRATE_V1) >> 3) #define MAX_SLICE_MB_SIZE \ (((4096 + 15) >> 4) * ((2304 + 15) >> 4)) @@ -2022,7 +2025,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v1[] = { * Dec: there's no use of Bitrate cap */ {BIT_RATE, ENC, H264|HEVC, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_BITRATE, HFI_PROP_TOTAL_BITRATE, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | @@ -2297,7 +2300,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v1[] = { {PEAK_BITRATE, ENC, H264|HEVC, /* default peak bitrate is 10% larger than avrg bitrate */ - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_BITRATE_PEAK, HFI_PROP_TOTAL_PEAK_BITRATE, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | @@ -2493,7 +2496,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v1[] = { * is handled in bitrate adjust and set functions */ {L0_BR, ENC, HEVC, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L0_BR, HFI_PROP_BITRATE_LAYER1, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | @@ -2503,7 +2506,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v1[] = { msm_vidc_set_dynamic_layer_bitrate}, {L1_BR, ENC, HEVC, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L1_BR, HFI_PROP_BITRATE_LAYER2, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | @@ -2513,7 +2516,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v1[] = { msm_vidc_set_dynamic_layer_bitrate}, {L2_BR, ENC, HEVC, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L2_BR, HFI_PROP_BITRATE_LAYER3, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | @@ -2523,7 +2526,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v1[] = { msm_vidc_set_dynamic_layer_bitrate}, {L3_BR, ENC, HEVC, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L3_BR, HFI_PROP_BITRATE_LAYER4, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | @@ -2533,7 +2536,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v1[] = { msm_vidc_set_dynamic_layer_bitrate}, {L4_BR, ENC, HEVC, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L4_BR, HFI_PROP_BITRATE_LAYER5, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | @@ -2543,7 +2546,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v1[] = { msm_vidc_set_dynamic_layer_bitrate}, {L5_BR, ENC, HEVC, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L5_BR, HFI_PROP_BITRATE_LAYER6, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | @@ -2553,7 +2556,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v1[] = { msm_vidc_set_dynamic_layer_bitrate}, {L0_BR, ENC, H264, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L0_BR, HFI_PROP_BITRATE_LAYER1, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | @@ -2563,7 +2566,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v1[] = { msm_vidc_set_dynamic_layer_bitrate}, {L1_BR, ENC, H264, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L1_BR, HFI_PROP_BITRATE_LAYER2, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | @@ -2573,7 +2576,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v1[] = { msm_vidc_set_dynamic_layer_bitrate}, {L2_BR, ENC, H264, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L2_BR, HFI_PROP_BITRATE_LAYER3, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | @@ -2583,7 +2586,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v1[] = { msm_vidc_set_dynamic_layer_bitrate}, {L3_BR, ENC, H264, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L3_BR, HFI_PROP_BITRATE_LAYER4, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | @@ -2593,7 +2596,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v1[] = { msm_vidc_set_dynamic_layer_bitrate}, {L4_BR, ENC, H264, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L4_BR, HFI_PROP_BITRATE_LAYER5, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | @@ -2603,7 +2606,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v1[] = { msm_vidc_set_dynamic_layer_bitrate}, {L5_BR, ENC, H264, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L5_BR, HFI_PROP_BITRATE_LAYER6, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | @@ -2885,7 +2888,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v1[] = { msm_vidc_adjust_slice_count, msm_vidc_set_slice_count}, {SLICE_MAX_BYTES, ENC, H264|HEVC|HEIC, - MIN_SLICE_BYTE_SIZE, MAX_SLICE_BYTE_SIZE, + MIN_SLICE_BYTE_SIZE, MAX_SLICE_BYTE_SIZE_V1, 1, MIN_SLICE_BYTE_SIZE, V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES, HFI_PROP_MULTI_SLICE_BYTES_COUNT, @@ -3199,9 +3202,9 @@ static struct msm_platform_inst_capability instance_data_diwali_v1[] = { {FRAME_HEIGHT, ENC, HEIC, 128, 16384, 1, 16384}, {MIN_BUFFERS_INPUT, ENC|DEC, HEIC, 0, 64, 1, 1, V4L2_CID_MIN_BUFFERS_FOR_OUTPUT}, - {MBPF, DEC, HEIC, 36, 262144, 1, 262144 }, /* ((8192x8192)/256) */ + {MBPF, DEC, HEIC, 36, 65536, 1, 65536 }, /* ((4096x4096)/256) */ {MBPF, ENC, HEIC, 64, 1048576, 1, 1048576}, /* ((16384x16384)/256) */ - {MBPS, DEC, HEIC, 36, 262144, 1, 262144 }, /* ((8192x8192)/256)@1fps */ + {MBPS, DEC, HEIC, 36, 65536, 1, 65536 }, /* ((4096x4096)/256)@1fps */ {MBPS, ENC, HEIC, 64, 1048576, 1, 1048576}, /* ((16384x16384)/256)@1fps */ {BITRATE_MODE, ENC, HEIC, V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, @@ -3549,7 +3552,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v2[] = { * Dec: there's no use of Bitrate cap */ {BIT_RATE, ENC, H264|HEVC, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_BITRATE, HFI_PROP_TOTAL_BITRATE, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | @@ -3824,7 +3827,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v2[] = { {PEAK_BITRATE, ENC, H264|HEVC, /* default peak bitrate is 10% larger than avrg bitrate */ - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_BITRATE_PEAK, HFI_PROP_TOTAL_PEAK_BITRATE, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | @@ -4020,7 +4023,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v2[] = { * is handled in bitrate adjust and set functions */ {L0_BR, ENC, HEVC, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L0_BR, HFI_PROP_BITRATE_LAYER1, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | @@ -4030,7 +4033,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v2[] = { msm_vidc_set_dynamic_layer_bitrate}, {L1_BR, ENC, HEVC, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L1_BR, HFI_PROP_BITRATE_LAYER2, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | @@ -4040,7 +4043,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v2[] = { msm_vidc_set_dynamic_layer_bitrate}, {L2_BR, ENC, HEVC, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L2_BR, HFI_PROP_BITRATE_LAYER3, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | @@ -4050,7 +4053,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v2[] = { msm_vidc_set_dynamic_layer_bitrate}, {L3_BR, ENC, HEVC, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L3_BR, HFI_PROP_BITRATE_LAYER4, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | @@ -4060,7 +4063,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v2[] = { msm_vidc_set_dynamic_layer_bitrate}, {L4_BR, ENC, HEVC, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L4_BR, HFI_PROP_BITRATE_LAYER5, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | @@ -4070,7 +4073,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v2[] = { msm_vidc_set_dynamic_layer_bitrate}, {L5_BR, ENC, HEVC, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L5_BR, HFI_PROP_BITRATE_LAYER6, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | @@ -4080,7 +4083,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v2[] = { msm_vidc_set_dynamic_layer_bitrate}, {L0_BR, ENC, H264, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L0_BR, HFI_PROP_BITRATE_LAYER1, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | @@ -4090,7 +4093,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v2[] = { msm_vidc_set_dynamic_layer_bitrate}, {L1_BR, ENC, H264, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L1_BR, HFI_PROP_BITRATE_LAYER2, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | @@ -4100,7 +4103,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v2[] = { msm_vidc_set_dynamic_layer_bitrate}, {L2_BR, ENC, H264, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L2_BR, HFI_PROP_BITRATE_LAYER3, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | @@ -4110,7 +4113,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v2[] = { msm_vidc_set_dynamic_layer_bitrate}, {L3_BR, ENC, H264, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L3_BR, HFI_PROP_BITRATE_LAYER4, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | @@ -4120,7 +4123,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v2[] = { msm_vidc_set_dynamic_layer_bitrate}, {L4_BR, ENC, H264, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L4_BR, HFI_PROP_BITRATE_LAYER5, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | @@ -4130,7 +4133,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v2[] = { msm_vidc_set_dynamic_layer_bitrate}, {L5_BR, ENC, H264, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L5_BR, HFI_PROP_BITRATE_LAYER6, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | @@ -4409,7 +4412,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v2[] = { msm_vidc_adjust_slice_count, msm_vidc_set_slice_count}, {SLICE_MAX_BYTES, ENC, H264|HEVC|HEIC, - MIN_SLICE_BYTE_SIZE, MAX_SLICE_BYTE_SIZE, + MIN_SLICE_BYTE_SIZE, MAX_SLICE_BYTE_SIZE_V1, 1, MIN_SLICE_BYTE_SIZE, V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES, HFI_PROP_MULTI_SLICE_BYTES_COUNT, @@ -4723,9 +4726,9 @@ static struct msm_platform_inst_capability instance_data_diwali_v2[] = { {FRAME_HEIGHT, ENC, HEIC, 128, 16384, 1, 16384}, {MIN_BUFFERS_INPUT, ENC|DEC, HEIC, 0, 64, 1, 1, V4L2_CID_MIN_BUFFERS_FOR_OUTPUT}, - {MBPF, DEC, HEIC, 36, 262144, 1, 262144 }, /* ((8192x8192)/256) */ + {MBPF, DEC, HEIC, 36, 65536, 1, 65536 }, /* ((4096x4096)/256) */ {MBPF, ENC, HEIC, 64, 1048576, 1, 1048576}, /* ((16384x16384)/256) */ - {MBPS, DEC, HEIC, 36, 262144, 1, 262144 }, /* ((8192x8192)/256)@1fps */ + {MBPS, DEC, HEIC, 36, 65536, 1, 65536 }, /* ((4096x4096)/256)@1fps */ {MBPS, ENC, HEIC, 64, 1048576, 1, 1048576}, /* ((16384x16384)/256)@1fps */ {BITRATE_MODE, ENC, HEIC, V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, From 037ff5f9f867bcecd006de6d56ebce091162420e Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Thu, 23 Dec 2021 23:53:01 +0530 Subject: [PATCH 0507/1061] video-driver: diwali: Add 4096x2304 support Add 4096x2304 resolution support across all diwali sku's. Change-Id: Icebe180db15464c21737be9c17ff9cd2677a6d25 Signed-off-by: Priyanka Gujjula Signed-off-by: Govindaraj Rajagopal --- driver/platform/diwali/src/msm_vidc_diwali.c | 172 ++++++++++--------- 1 file changed, 92 insertions(+), 80 deletions(-) diff --git a/driver/platform/diwali/src/msm_vidc_diwali.c b/driver/platform/diwali/src/msm_vidc_diwali.c index 7b743562da..15888c1273 100644 --- a/driver/platform/diwali/src/msm_vidc_diwali.c +++ b/driver/platform/diwali/src/msm_vidc_diwali.c @@ -85,11 +85,10 @@ static struct msm_platform_core_capability core_data_diwali_v0[] = { {MAX_NUM_8K_SESSIONS, 1}, {MAX_SECURE_SESSION_COUNT, 3}, {MAX_RT_MBPF, 138240}, /* ((8192x4320)/256) */ - {MAX_MBPF, 173056}, /* (8192x4320)/256 + (4096x2176)/256*/ - {MAX_MBPS, 4177920}, /* max_load - * 4096x2176@120fps which is greater than - * 8192x4320@30fps - */ + {MAX_MBPF, 175104}, /* (8192x4320)/256 + (4096x2304)/256*/ + /* max_load 3840x2176@120fps which is greater than 7680x4320@30fps */ + /* Concurrency: UHD@30 decode + uhd@30 encode */ + {MAX_MBPS, 3916800}, {MAX_IMAGE_MBPF, 1048576}, /* (16384x16384)/256 */ {MAX_MBPF_HQ, 8160}, /* ((1920x1088)/256) */ {MAX_MBPS_HQ, 244800}, /* ((1920x1088)/256)@30fps */ @@ -137,8 +136,9 @@ static struct msm_platform_core_capability core_data_diwali_v1[] = { {MAX_NUM_4K_SESSIONS, 4}, {MAX_SECURE_SESSION_COUNT, 3}, {MAX_RT_MBPF, 130560}, /* ((3840x2176)/256) x 4 */ - {MAX_MBPF, 139264}, /* ((4096x2176)/256) x 4 */ - {MAX_MBPS, 2088960}, /* 4096x2176@60fps */ + {MAX_MBPF, 147456}, /* ((4096x2304)/256) x 4 */ + /* Concurrency: UHD@30 decode + uhd@30 encode */ + {MAX_MBPS, 2211840}, /* max_load 4096x2304@60fps */ {MAX_IMAGE_MBPF, 1048576}, /* (16384x16384)/256 */ {MAX_MBPF_HQ, 8160}, /* ((1920x1088)/256) */ {MAX_MBPS_HQ, 244800}, /* ((1920x1088)/256)@30fps */ @@ -185,9 +185,10 @@ static struct msm_platform_core_capability core_data_diwali_v2[] = { {MAX_NUM_1080P_SESSIONS, 8}, {MAX_NUM_4K_SESSIONS, 4}, {MAX_SECURE_SESSION_COUNT, 3}, - {MAX_RT_MBPF, 130560}, /* ((3840x2176)/256) x 3 */ - {MAX_MBPF, 104448}, /* ((4096x2176)/256) x 3 */ - {MAX_MBPS, 1044480}, /* 4096x2176@30fps */ + {MAX_RT_MBPF, 97920}, /* ((3840x2176)/256) x 3 */ + {MAX_MBPF, 110592}, /* ((4096x2304)/256) x 3 */ + /* Concurrency: UHD@30 decode + 1080p@30 encode */ + {MAX_MBPS, 1105920}, /* max_load 4096x2304@30fps*/ {MAX_IMAGE_MBPF, 1048576}, /* (16384x16384)/256 */ {MAX_MBPF_HQ, 8160}, /* ((1920x1088)/256) */ {MAX_MBPS_HQ, 244800}, /* ((1920x1088)/256)@30fps */ @@ -314,26 +315,26 @@ static struct msm_platform_inst_capability instance_data_diwali_v0[] = { HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT, CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, - /* (4096 * 2176) / 256 */ - {MBPF, ENC, CODECS_ALL, 64, 34816, 1, 34816}, + /* (4096 * 2304) / 256 */ + {MBPF, ENC, CODECS_ALL, 64, 36864, 1, 36864}, /* (8192 * 4320) / 256 */ {MBPF, DEC, CODECS_ALL, 36, 138240, 1, 138240}, - /* (4096 * 2176) / 256 */ - {MBPF, DEC, VP9, 36, 34816, 1, 34816}, - /* (4096 * 2176) / 256 */ - {LOSSLESS_MBPF, ENC, H264|HEVC, 64, 34816, 1, 34816}, + /* (4096 * 2304) / 256 */ + {MBPF, DEC, VP9, 36, 36864, 1, 36864}, + /* (4096 * 2304) / 256 */ + {LOSSLESS_MBPF, ENC, H264|HEVC, 64, 36864, 1, 36864}, /* Batch Mode Decode */ /* (1920 * 1088) / 256 */ {BATCH_MBPF, DEC, H264|HEVC|VP9, 64, 8160, 1, 8160}, {BATCH_FPS, DEC, H264|HEVC|VP9, 1, 120, 1, 60}, - /* (4096 * 2176) / 256 */ - {SECURE_MBPF, ENC|DEC, H264|HEVC|VP9, 64, 34816, 1, 34816}, - /* ((4096 * 2176) / 256) * 60 fps */ - {MBPS, ENC, CODECS_ALL, 64, 2088960, 1, 2088960}, - /* ((4096 * 2176) / 256) * 120 fps */ - {MBPS, DEC, CODECS_ALL, 36, 4147200, 1, 4147200}, - /* ((4096 * 2176) / 256) * 60 */ - {MBPS, DEC, VP9, 36, 2088960, 1, 2088960}, + /* (4096 * 2304) / 256 */ + {SECURE_MBPF, ENC|DEC, H264|HEVC|VP9, 64, 36864, 1, 36864}, + /* ((4096 * 2304) / 256) * 60 fps */ + {MBPS, ENC, CODECS_ALL, 64, 2211840, 1, 2211840}, + /* ((3840 * 2176) / 256) * 120 fps */ + {MBPS, DEC, CODECS_ALL, 36, 3916800, 1, 3916800}, + /* ((4096 * 2304) / 256) * 60 */ + {MBPS, DEC, VP9, 36, 2211840, 1, 2211840}, /* ((1920 * 1088) / 256) * 30 fps */ {POWER_SAVE_MBPS, ENC, CODECS_ALL, 0, 244800, 1, 244800}, @@ -1166,7 +1167,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v0[] = { {LEVEL, DEC, VP9, V4L2_MPEG_VIDEO_VP9_LEVEL_1_0, - V4L2_MPEG_VIDEO_VP9_LEVEL_5_1, + V4L2_MPEG_VIDEO_VP9_LEVEL_5_2, BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_1_0) | BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_1_1) | BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_2_0) | @@ -1176,8 +1177,9 @@ static struct msm_platform_inst_capability instance_data_diwali_v0[] = { BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_4_0) | BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_4_1) | BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_0) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_1), - V4L2_MPEG_VIDEO_VP9_LEVEL_5_1, + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_2), + V4L2_MPEG_VIDEO_VP9_LEVEL_5_2, V4L2_CID_MPEG_VIDEO_VP9_LEVEL, HFI_PROP_LEVEL, CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, @@ -1216,7 +1218,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v0[] = { {LEVEL, ENC, H264, V4L2_MPEG_VIDEO_H264_LEVEL_1_0, - V4L2_MPEG_VIDEO_H264_LEVEL_5_2, + V4L2_MPEG_VIDEO_H264_LEVEL_6_0, BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_0) | BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1B) | BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_1) | @@ -1233,8 +1235,9 @@ static struct msm_platform_inst_capability instance_data_diwali_v0[] = { BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_2) | BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_0) | BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_2), - V4L2_MPEG_VIDEO_H264_LEVEL_5_2, + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_0), + V4L2_MPEG_VIDEO_H264_LEVEL_6_0, V4L2_CID_MPEG_VIDEO_H264_LEVEL, HFI_PROP_LEVEL, CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, @@ -1266,7 +1269,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v0[] = { {LEVEL, ENC, HEVC|HEIC, V4L2_MPEG_VIDEO_HEVC_LEVEL_1, - V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1, + V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2, BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_1) | BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2) | BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1) | @@ -1275,8 +1278,9 @@ static struct msm_platform_inst_capability instance_data_diwali_v0[] = { BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4) | BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1) | BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1), - V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1, + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2), + V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2, V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, HFI_PROP_LEVEL, CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, @@ -1857,22 +1861,22 @@ static struct msm_platform_inst_capability instance_data_diwali_v1[] = { HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT, CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, - /* (4096 * 2176) / 256 */ - {MBPF, ENC, CODECS_ALL, 64, 34816, 1, 34816}, - /* (4096 * 2176) / 256 */ - {MBPF, DEC, CODECS_ALL, 36, 34816, 1, 34816}, - /* (4096 * 2176) / 256 */ - {LOSSLESS_MBPF, ENC, H264|HEVC, 64, 34816, 1, 34816}, + /* (4096 * 2304) / 256 */ + {MBPF, ENC, CODECS_ALL, 64, 36864, 1, 36864}, + /* (4096 * 2304) / 256 */ + {MBPF, DEC, CODECS_ALL, 36, 36864, 1, 36864}, + /* (4096 * 2304) / 256 */ + {LOSSLESS_MBPF, ENC, H264|HEVC, 64, 36864, 1, 36864}, /* Batch Mode Decode */ /* (1920 * 1088) / 256 */ {BATCH_MBPF, DEC, H264|HEVC|VP9, 64, 8160, 1, 8160}, {BATCH_FPS, DEC, H264|HEVC|VP9, 1, 120, 1, 60}, - /* (4096 * 2176) / 256 */ - {SECURE_MBPF, ENC|DEC, H264|HEVC|VP9, 64, 34816, 1, 34816}, - /* ((4096 * 2176) / 256) * 60 fps */ - {MBPS, ENC, CODECS_ALL, 64, 2088960, 1, 2088960}, - /* ((4096 * 2176) / 256) * 60 fps */ - {MBPS, DEC, CODECS_ALL, 36, 2088960, 1, 2088960}, + /* (4096 * 2304) / 256 */ + {SECURE_MBPF, ENC|DEC, H264|HEVC|VP9, 64, 36864, 1, 36864}, + /* ((4096 * 2304) / 256) * 60 fps */ + {MBPS, ENC, CODECS_ALL, 64, 2211840, 1, 2211840}, + /* ((4096 * 2304) / 256) * 60 fps */ + {MBPS, DEC, CODECS_ALL, 36, 2211840, 1, 2211840}, /* ((1920 * 1088) / 256) * 30 fps */ {POWER_SAVE_MBPS, ENC, CODECS_ALL, 0, 244800, 1, 244800}, @@ -2700,7 +2704,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v1[] = { {LEVEL, DEC, VP9, V4L2_MPEG_VIDEO_VP9_LEVEL_1_0, - V4L2_MPEG_VIDEO_VP9_LEVEL_5_1, + V4L2_MPEG_VIDEO_VP9_LEVEL_5_2, BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_1_0) | BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_1_1) | BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_2_0) | @@ -2710,8 +2714,9 @@ static struct msm_platform_inst_capability instance_data_diwali_v1[] = { BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_4_0) | BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_4_1) | BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_0) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_1), - V4L2_MPEG_VIDEO_VP9_LEVEL_5_1, + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_2), + V4L2_MPEG_VIDEO_VP9_LEVEL_5_2, V4L2_CID_MPEG_VIDEO_VP9_LEVEL, HFI_PROP_LEVEL, CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, @@ -2721,7 +2726,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v1[] = { {LEVEL, DEC, H264, V4L2_MPEG_VIDEO_H264_LEVEL_1_0, - V4L2_MPEG_VIDEO_H264_LEVEL_5_2, + V4L2_MPEG_VIDEO_H264_LEVEL_6_0, BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_0) | BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1B) | BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_1) | @@ -2738,8 +2743,9 @@ static struct msm_platform_inst_capability instance_data_diwali_v1[] = { BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_2) | BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_0) | BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_2), - V4L2_MPEG_VIDEO_H264_LEVEL_5_2, + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_0), + V4L2_MPEG_VIDEO_H264_LEVEL_6_0, V4L2_CID_MPEG_VIDEO_H264_LEVEL, HFI_PROP_LEVEL, CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, @@ -2749,7 +2755,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v1[] = { {LEVEL, ENC, H264, V4L2_MPEG_VIDEO_H264_LEVEL_1_0, - V4L2_MPEG_VIDEO_H264_LEVEL_5_2, + V4L2_MPEG_VIDEO_H264_LEVEL_6_0, BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_0) | BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1B) | BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_1) | @@ -2766,8 +2772,9 @@ static struct msm_platform_inst_capability instance_data_diwali_v1[] = { BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_2) | BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_0) | BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_2), - V4L2_MPEG_VIDEO_H264_LEVEL_5_2, + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_0), + V4L2_MPEG_VIDEO_H264_LEVEL_6_0, V4L2_CID_MPEG_VIDEO_H264_LEVEL, HFI_PROP_LEVEL, CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, @@ -2777,7 +2784,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v1[] = { {LEVEL, DEC, HEVC|HEIC, V4L2_MPEG_VIDEO_HEVC_LEVEL_1, - V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1, + V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2, BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_1) | BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2) | BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1) | @@ -2786,8 +2793,9 @@ static struct msm_platform_inst_capability instance_data_diwali_v1[] = { BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4) | BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1) | BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1), - V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1, + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2), + V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2, V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, HFI_PROP_LEVEL, CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, @@ -2797,7 +2805,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v1[] = { {LEVEL, ENC, HEVC|HEIC, V4L2_MPEG_VIDEO_HEVC_LEVEL_1, - V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1, + V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2, BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_1) | BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2) | BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1) | @@ -2806,8 +2814,9 @@ static struct msm_platform_inst_capability instance_data_diwali_v1[] = { BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4) | BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1) | BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1), - V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1, + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2), + V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2, V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, HFI_PROP_LEVEL, CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, @@ -3388,18 +3397,18 @@ static struct msm_platform_inst_capability instance_data_diwali_v2[] = { HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT, CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, - /* (4096 * 2176) / 256 */ - {MBPF, ENC, CODECS_ALL, 64, 34816, 1, 34816}, - /* (4096 * 2176) / 256 */ - {MBPF, DEC, CODECS_ALL, 36, 34816, 1, 34816}, - /* (4096 * 2176) / 256 */ - {LOSSLESS_MBPF, ENC, H264|HEVC, 64, 34816, 1, 34816}, - /* (4096 * 2176) / 256 */ - {SECURE_MBPF, ENC|DEC, H264|HEVC|VP9, 64, 34816, 1, 34816}, + /* (4096 * 2304) / 256 */ + {MBPF, ENC, CODECS_ALL, 64, 36864, 1, 36864}, + /* (4096 * 2304) / 256 */ + {MBPF, DEC, CODECS_ALL, 36, 36864, 1, 36864}, + /* (4096 * 2304) / 256 */ + {LOSSLESS_MBPF, ENC, H264|HEVC, 64, 36864, 1, 36864}, + /* (4096 * 2304) / 256 */ + {SECURE_MBPF, ENC|DEC, H264|HEVC|VP9, 64, 36864, 1, 36864}, + /* ((4096 * 2304) / 256) * 30 fps */ + {MBPS, ENC, CODECS_ALL, 64, 1105920, 1, 1105920}, /* ((4096 * 2176) / 256) * 30 fps */ - {MBPS, ENC, CODECS_ALL, 64, 1044480, 1, 1044480}, - /* ((4096 * 2176) / 256) * 30 fps */ - {MBPS, DEC, CODECS_ALL, 36, 1044480, 1, 1044480}, + {MBPS, DEC, CODECS_ALL, 36, 1105920, 1, 1105920}, /* ((1920 * 1088) / 256) * 30 fps */ {POWER_SAVE_MBPS, ENC, CODECS_ALL, 0, 244800, 1, 244800}, @@ -4227,7 +4236,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v2[] = { {LEVEL, DEC, VP9, V4L2_MPEG_VIDEO_VP9_LEVEL_1_0, - V4L2_MPEG_VIDEO_VP9_LEVEL_5_0, + V4L2_MPEG_VIDEO_VP9_LEVEL_5_1, BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_1_0) | BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_1_1) | BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_2_0) | @@ -4236,8 +4245,9 @@ static struct msm_platform_inst_capability instance_data_diwali_v2[] = { BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_3_1) | BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_4_0) | BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_4_1) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_0), - V4L2_MPEG_VIDEO_VP9_LEVEL_5_0, + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_1), + V4L2_MPEG_VIDEO_VP9_LEVEL_5_1, V4L2_CID_MPEG_VIDEO_VP9_LEVEL, HFI_PROP_LEVEL, CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, @@ -4303,7 +4313,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v2[] = { {LEVEL, DEC, HEVC|HEIC, V4L2_MPEG_VIDEO_HEVC_LEVEL_1, - V4L2_MPEG_VIDEO_HEVC_LEVEL_5, + V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1, BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_1) | BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2) | BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1) | @@ -4311,8 +4321,9 @@ static struct msm_platform_inst_capability instance_data_diwali_v2[] = { BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1) | BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4) | BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5), - V4L2_MPEG_VIDEO_HEVC_LEVEL_5, + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1), + V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1, V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, HFI_PROP_LEVEL, CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, @@ -4322,7 +4333,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v2[] = { {LEVEL, ENC, HEVC|HEIC, V4L2_MPEG_VIDEO_HEVC_LEVEL_1, - V4L2_MPEG_VIDEO_HEVC_LEVEL_5, + V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1, BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_1) | BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2) | BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1) | @@ -4330,8 +4341,9 @@ static struct msm_platform_inst_capability instance_data_diwali_v2[] = { BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1) | BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4) | BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5), - V4L2_MPEG_VIDEO_HEVC_LEVEL_5, + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1), + V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1, V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, HFI_PROP_LEVEL, CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, From 830f916172657f41496de22d0abd3f0f6fdef37a Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Wed, 29 Dec 2021 21:13:56 +0530 Subject: [PATCH 0508/1061] video: driver: fix race issue with core_init sequence New session open followed by system_error will attempt to core_init again, at the same time client is attempting to open 2nd session, so core->state is moved to init_wait atate. 1st session core_init request is getting timedout and i.e leading to force core_deinit and core->state also moved to core_deinit state. At the sametime client is attempting to open 3rd session, and unfortunately core is in deinit state, so it bypasses all init_wait check moved ahead and attempted core_init again and moved core state to init_wait and waits for core_init_done with timeout. 2nd session got timedout and attempts deinit and moved &core->state to core_deinit. Client again attempts 4th session open and that will attempt to reinitialize &core->init_done completion struct, on which 3rd session is already waiting for. So that is leading to list corruption failure at core kernel side. Change-Id: Idaf96355c18f34e4204214b18479f067cfc47165 Signed-off-by: Govindaraj Rajagopal --- driver/vidc/src/msm_vidc_driver.c | 3 +-- driver/vidc/src/msm_vidc_probe.c | 3 ++- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index ff46b16b46..d4bcf1dd13 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2022, The Linux Foundation. All rights reserved. */ #include @@ -4500,7 +4500,6 @@ int msm_vidc_core_init(struct msm_vidc_core *core) goto unlock; msm_vidc_change_core_state(core, MSM_VIDC_CORE_INIT_WAIT, __func__); - init_completion(&core->init_done); core->smmu_fault_handled = false; core->ssr.trigger = false; core->pm_suspended = false; diff --git a/driver/vidc/src/msm_vidc_probe.c b/driver/vidc/src/msm_vidc_probe.c index 7281bb2ac7..7d62dbd0dd 100644 --- a/driver/vidc/src/msm_vidc_probe.c +++ b/driver/vidc/src/msm_vidc_probe.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2022, The Linux Foundation. All rights reserved. */ #include @@ -291,6 +291,7 @@ static int msm_vidc_initialize_core(struct msm_vidc_core *core) } mutex_init(&core->lock); + init_completion(&core->init_done); INIT_LIST_HEAD(&core->instances); INIT_LIST_HEAD(&core->dangling_instances); From fb7d323e1c11c2b547ee7e46f1daa868553b5dab Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Mon, 10 Jan 2022 21:07:00 +0530 Subject: [PATCH 0509/1061] video-driver: fix invalid ptr dereference with destroy_buffers read_only and release list does not take dma ref_count using dma_buf_get(). dma_buf ptr will be obselete when its ref_count reaches zero. So print the dma_buf info before releasing the ref count. Change-Id: I8c145a1107b83c7f3b366834feb37171c8614d15 Signed-off-by: Priyanka Gujjula Signed-off-by: Govindaraj Rajagopal --- driver/vidc/src/msm_vidc_driver.c | 28 ++++++++++++++++------------ 1 file changed, 16 insertions(+), 12 deletions(-) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index d4bcf1dd13..8fb9554419 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -5092,6 +5092,22 @@ void msm_vidc_destroy_buffers(struct msm_vidc_inst *inst) } } + /* read_only and release list does not take dma ref_count using dma_buf_get(). + dma_buf ptr will be obselete when its ref_count reaches zero. Hence print + the dma_buf info before releasing the ref count. + */ + list_for_each_entry_safe(buf, dummy, &inst->buffers.read_only.list, list) { + print_vidc_buffer(VIDC_ERR, "err ", "destroying ro buffer", inst, buf); + list_del(&buf->list); + msm_memory_free(inst, buf); + } + + list_for_each_entry_safe(buf, dummy, &inst->buffers.release.list, list) { + print_vidc_buffer(VIDC_ERR, "err ", "destroying release buffer", inst, buf); + list_del(&buf->list); + msm_memory_free(inst, buf); + } + for (i = 0; i < ARRAY_SIZE(ext_buf_types); i++) { buffers = msm_vidc_get_buffers(inst, ext_buf_types[i], __func__); if (!buffers) @@ -5106,18 +5122,6 @@ void msm_vidc_destroy_buffers(struct msm_vidc_inst *inst) msm_vidc_unmap_buffers(inst, ext_buf_types[i]); } - list_for_each_entry_safe(buf, dummy, &inst->buffers.read_only.list, list) { - print_vidc_buffer(VIDC_ERR, "err ", "destroying ro buffer", inst, buf); - list_del(&buf->list); - msm_memory_free(inst, buf); - } - - list_for_each_entry_safe(buf, dummy, &inst->buffers.release.list, list) { - print_vidc_buffer(VIDC_ERR, "err ", "destroying release buffer", inst, buf); - list_del(&buf->list); - msm_memory_free(inst, buf); - } - list_for_each_entry_safe(ts, dummy_ts, &inst->timestamps.list, sort.list) { i_vpr_e(inst, "%s: removing ts: val %lld, rank %lld\n", __func__, ts->sort.val, ts->rank); From 3a05f79ac19a71ca20f0090a19347cde8582a2fb Mon Sep 17 00:00:00 2001 From: Deepa Guthyappa Madivalara Date: Mon, 6 Dec 2021 11:40:14 -0800 Subject: [PATCH 0510/1061] video: driver: add all intra encoding support add ALL_INTRA database entry and its dependecies. impletment adjust functions. imported from waipio. Change-Id: Iaddb6cd59d3c3e69570bb5347ebf396622524875 Signed-off-by: DEEPA GUTHYAPPA MADIVALARA --- driver/platform/kalama/src/msm_vidc_kalama.c | 21 +++++++++++++++----- 1 file changed, 16 insertions(+), 5 deletions(-) diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index d04f32ccdc..206374f6c2 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -75,6 +75,7 @@ static struct msm_platform_core_capability core_data_kalama[] = { {MAX_MBPS_HQ, 489600}, /* ((1920x1088)/256)@60fps */ {MAX_MBPF_B_FRAME, 32640}, /* 3840x2176/256 */ {MAX_MBPS_B_FRAME, 1958400}, /* 3840x2176/256 MBs@60fps */ + {MAX_MBPS_ALL_INTRA, 1958400}, /* 3840x2176/256 MBs@60fps */ {MAX_ENH_LAYER_COUNT, 5}, {NUM_VPP_PIPE, 4}, {SW_PC, 1}, @@ -460,7 +461,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, {ENH_LAYER_COUNT}, - {0}, + {ALL_INTRA}, msm_vidc_adjust_gop_size, msm_vidc_set_gop_size}, {GOP_CLOSURE, ENC, H264|HEVC, @@ -475,7 +476,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { HFI_PROP_MAX_B_FRAMES, CAP_FLAG_OUTPUT_PORT, {ENH_LAYER_COUNT}, - {0}, + {ALL_INTRA}, msm_vidc_adjust_b_frame, msm_vidc_set_u32}, {BLUR_TYPES, ENC, CODECS_ALL, @@ -545,7 +546,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { V4L2_CID_MPEG_VIDEO_LTR_COUNT, HFI_PROP_LTR_COUNT, CAP_FLAG_OUTPUT_PORT, - {BITRATE_MODE}, {0}, + {BITRATE_MODE, ALL_INTRA}, {0}, msm_vidc_adjust_ltr_count, msm_vidc_set_u32}, {USE_LTR, ENC, H264|HEVC, @@ -579,7 +580,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { V4L2_CID_MPEG_VIDC_INTRA_REFRESH_PERIOD, HFI_PROP_IR_RANDOM_PERIOD, CAP_FLAG_OUTPUT_PORT, - {BITRATE_MODE}, {0}, + {BITRATE_MODE, ALL_INTRA}, {0}, msm_vidc_adjust_ir_random, msm_vidc_set_u32}, {AU_DELIMITER, ENC, H264|HEVC, @@ -1307,7 +1308,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE, 0, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {BITRATE_MODE}, {0}, + {BITRATE_MODE, ALL_INTRA}, {0}, msm_vidc_adjust_slice_count, msm_vidc_set_slice_count}, {SLICE_MAX_BYTES, ENC, H264|HEVC|HEIC, @@ -1503,6 +1504,16 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { V4L2_CID_MPEG_VIDC_METADATA_CROP_OFFSETS, HFI_PROP_CROP_OFFSETS}, + {ALL_INTRA, ENC, H264|HEVC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, + 0, + CAP_FLAG_OUTPUT_PORT, + {GOP_SIZE, B_FRAME}, + {LTR_COUNT, IR_RANDOM, SLICE_MODE}, + msm_vidc_adjust_all_intra, NULL}, + {META_LTR_MARK_USE, ENC, H264|HEVC, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, From d1351838e313a266130e7e738a3c6e8e7ef8ab0e Mon Sep 17 00:00:00 2001 From: Mahesh Kumar Sharma Date: Fri, 7 Jan 2022 13:24:44 -0800 Subject: [PATCH 0511/1061] video: driver: CBR and Blur handling enhancements This change is made to support 100ms VBV delay for aggressive rate control in iris3 hw. Video buffer verifer helps to ensure that encoded stream doesn't overflow or underflow the decoder's buffer. iris3 hw is capable to decode data in 100ms VBV buffer window. Adaptive Blur (Internal encoder feature): This is other enhancement which supports adaptive blur feature on iris3 for CBR_VFR (Constant bit rate_Variable frame rate)/CBR_CFR (Constant bit rate_Constant frame rate) rc types apart from already supported VBR_CFR. Unlike iris2, there is no need to enable CAC. Below are the listed scenarios when it is enabled/disabled on iris3- - Supported only for 8 bits encoding (H.264 & H.265). - By default enabled for VBR_CFR/CBR_VFR/CBR_CFR RC without CAC enabled. - No dependency on CAC to be enabled. - Adaptive Blur is disabled if minquality_VBR is enabled - Adaptive Blur is supported for 3 RC types: VBR_CFR, CBR_VFR & CBR_CFR - If any one of the features (scalar/external blur) enabled, encoder disables adaptive-blur. - Static property available to disable adaptive blur feature Below are the listed scenarios when it is enabled/disabled on iris2- - Supported only for 8 bits encoding (H.264 & H.265). - By default enabled for VBR_CFR RC type with CAC enabled. - Dependency on CAC to be enabled. - Adaptive Blur is disabled if CAC is disabled - Adaptive Blur is disabled if minquality_VBR is enabled - Adaptive Blur is not supported for any other RC types except: VBR_CFR - If any one of the features (scalar/external blur) enabled, encoder disables adaptive-blur. - Static property available to disable adaptive blur feature For backward compatibilty: - Removed CAC as parent from msm_vidc_kalama.c. - Removed cac query from msm_vidc_adjust_blur_type in msm_vidc_control.c. - Moved legacy code to newly created function msm_vidc_adjust_blur_type_iris2(). - Added msm_vidc_adjust_blur_type_iris2 in BLUR_TYPES in msm_vidc_waipio.c Change-Id: I49dec7e2574496d1b32babde55c0187866ca21d2 Signed-off-by: Mahesh Kumar Sharma --- driver/platform/kalama/src/msm_vidc_kalama.c | 15 ++---- driver/platform/waipio/inc/msm_vidc_waipio.h | 3 ++ driver/platform/waipio/src/msm_vidc_waipio.c | 11 +---- driver/variant/iris2/inc/msm_vidc_iris2.h | 5 ++ driver/variant/iris2/src/msm_vidc_iris2.c | 52 +++++++++++++++++++- driver/vidc/inc/msm_vidc_control.h | 3 +- driver/vidc/src/msm_vidc_control.c | 12 ++--- 7 files changed, 71 insertions(+), 30 deletions(-) diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index d04f32ccdc..51e5e386cd 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -478,21 +478,12 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { {0}, msm_vidc_adjust_b_frame, msm_vidc_set_u32}, - {BLUR_TYPES, ENC, CODECS_ALL, - VIDC_BLUR_NONE, VIDC_BLUR_ADAPTIVE, 1, VIDC_BLUR_ADAPTIVE, - V4L2_CID_MPEG_VIDC_VIDEO_BLUR_TYPES, - HFI_PROP_BLUR_TYPES, - CAP_FLAG_OUTPUT_PORT, - {PIX_FMTS, BITRATE_MODE, CONTENT_ADAPTIVE_CODING}, - {BLUR_RESOLUTION}, - msm_vidc_adjust_blur_type, msm_vidc_set_u32_enum}, - {BLUR_TYPES, ENC, H264|HEVC, VIDC_BLUR_NONE, VIDC_BLUR_ADAPTIVE, 1, VIDC_BLUR_ADAPTIVE, V4L2_CID_MPEG_VIDC_VIDEO_BLUR_TYPES, HFI_PROP_BLUR_TYPES, CAP_FLAG_OUTPUT_PORT, - {PIX_FMTS, BITRATE_MODE, CONTENT_ADAPTIVE_CODING, MIN_QUALITY}, + {PIX_FMTS, BITRATE_MODE, MIN_QUALITY}, {BLUR_RESOLUTION}, msm_vidc_adjust_blur_type, msm_vidc_set_u32_enum}, @@ -608,7 +599,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { HFI_PROP_CONTENT_ADAPTIVE_CODING, CAP_FLAG_OUTPUT_PORT, {BITRATE_MODE, MIN_QUALITY}, - {BLUR_TYPES}, + {0}, msm_vidc_adjust_cac, msm_vidc_set_vbr_related_properties}, @@ -644,7 +635,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { msm_vidc_set_vbr_related_properties}, {VBV_DELAY, ENC, H264|HEVC, - 200, 300, 100, 300, + 100, 300, 100, 300, V4L2_CID_MPEG_VIDEO_VBV_DELAY, HFI_PROP_VBV_DELAY, CAP_FLAG_OUTPUT_PORT, diff --git a/driver/platform/waipio/inc/msm_vidc_waipio.h b/driver/platform/waipio/inc/msm_vidc_waipio.h index e934c144cb..bfea9a97e3 100644 --- a/driver/platform/waipio/inc/msm_vidc_waipio.h +++ b/driver/platform/waipio/inc/msm_vidc_waipio.h @@ -7,6 +7,9 @@ #define _MSM_VIDC_WAIPIO_H_ #include "msm_vidc_core.h" +#if defined(CONFIG_MSM_VIDC_IRIS2) +#include "msm_vidc_iris2.h" +#endif #if defined(CONFIG_MSM_VIDC_WAIPIO) int msm_vidc_init_platform_waipio(struct msm_vidc_core *core, struct device *dev); diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 84ce225aaa..0c19f9fb3b 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -467,15 +467,6 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {ALL_INTRA}, msm_vidc_adjust_b_frame, msm_vidc_set_u32}, - {BLUR_TYPES, ENC, CODECS_ALL, - VIDC_BLUR_NONE, VIDC_BLUR_ADAPTIVE, 1, VIDC_BLUR_ADAPTIVE, - V4L2_CID_MPEG_VIDC_VIDEO_BLUR_TYPES, - HFI_PROP_BLUR_TYPES, - CAP_FLAG_OUTPUT_PORT, - {PIX_FMTS, BITRATE_MODE, CONTENT_ADAPTIVE_CODING}, - {BLUR_RESOLUTION}, - msm_vidc_adjust_blur_type, msm_vidc_set_u32_enum}, - {BLUR_TYPES, ENC, H264|HEVC, VIDC_BLUR_NONE, VIDC_BLUR_ADAPTIVE, 1, VIDC_BLUR_ADAPTIVE, V4L2_CID_MPEG_VIDC_VIDEO_BLUR_TYPES, @@ -483,7 +474,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { CAP_FLAG_OUTPUT_PORT, {PIX_FMTS, BITRATE_MODE, CONTENT_ADAPTIVE_CODING, MIN_QUALITY}, {BLUR_RESOLUTION}, - msm_vidc_adjust_blur_type, msm_vidc_set_u32_enum}, + msm_vidc_adjust_blur_type_iris2, msm_vidc_set_u32_enum}, {BLUR_RESOLUTION, ENC, CODECS_ALL, 0, S32_MAX, 1, 0, diff --git a/driver/variant/iris2/inc/msm_vidc_iris2.h b/driver/variant/iris2/inc/msm_vidc_iris2.h index 1d0ee44d91..dd6034cba7 100644 --- a/driver/variant/iris2/inc/msm_vidc_iris2.h +++ b/driver/variant/iris2/inc/msm_vidc_iris2.h @@ -11,6 +11,7 @@ #if defined(CONFIG_MSM_VIDC_IRIS2) int msm_vidc_init_iris2(struct msm_vidc_core *core); int msm_vidc_deinit_iris2(struct msm_vidc_core *core); +int msm_vidc_adjust_blur_type_iris2(void *instance, struct v4l2_ctrl *ctrl); #else static inline int msm_vidc_init_iris2(struct msm_vidc_core *core) { @@ -20,6 +21,10 @@ static inline int msm_vidc_deinit_iris2(struct msm_vidc_core *core) { return -EINVAL; } +static inline int msm_vidc_adjust_blur_type_iris2(void *instance, struct v4l2_ctrl *ctrl) +{ + return -EINVAL; +} #endif #endif // _MSM_VIDC_IRIS2_H_ diff --git a/driver/variant/iris2/src/msm_vidc_iris2.c b/driver/variant/iris2/src/msm_vidc_iris2.c index 29a59e368b..07690dbe24 100644 --- a/driver/variant/iris2/src/msm_vidc_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_iris2.c @@ -2,7 +2,6 @@ /* * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. */ - #include "msm_vidc_iris2.h" #include "msm_vidc_buffer_iris2.h" #include "msm_vidc_power_iris2.h" @@ -15,6 +14,7 @@ #include "msm_vidc_internal.h" #include "msm_vidc_buffer.h" #include "msm_vidc_debug.h" +#include "msm_vidc_control.h" #define VIDEO_ARCH_LX 1 @@ -1079,6 +1079,56 @@ exit: return 0; } +int msm_vidc_adjust_blur_type_iris2(void *instance, struct v4l2_ctrl *ctrl) +{ + struct msm_vidc_inst_capability *capability; + s32 adjusted_value; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + s32 rc_type = -1, cac = -1; + s32 pix_fmts = -1, min_quality = -1; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + capability = inst->capabilities; + + adjusted_value = ctrl ? ctrl->val : + capability->cap[BLUR_TYPES].value; + + if (adjusted_value == VIDC_BLUR_NONE) + return 0; + + if (msm_vidc_get_parent_value(inst, BLUR_TYPES, BITRATE_MODE, + &rc_type, __func__) || + msm_vidc_get_parent_value(inst, BLUR_TYPES, + CONTENT_ADAPTIVE_CODING, &cac, __func__) || + msm_vidc_get_parent_value(inst, BLUR_TYPES, PIX_FMTS, + &pix_fmts, __func__) || + msm_vidc_get_parent_value(inst, BLUR_TYPES, MIN_QUALITY, + &min_quality, __func__)) + return -EINVAL; + + if (adjusted_value == VIDC_BLUR_EXTERNAL) { + if (is_scaling_enabled(inst) || min_quality) { + adjusted_value = VIDC_BLUR_NONE; + } + } else if (adjusted_value == VIDC_BLUR_ADAPTIVE) { + if (is_scaling_enabled(inst) || min_quality || + (rc_type != HFI_RC_VBR_CFR) || + !cac || + is_10bit_colorformat(pix_fmts)) { + adjusted_value = VIDC_BLUR_NONE; + } + } + + msm_vidc_update_cap_value(inst, BLUR_TYPES, + adjusted_value, __func__); + + return 0; +} + int msm_vidc_decide_quality_mode_iris2(struct msm_vidc_inst* inst) { struct msm_vidc_inst_capability* capability = NULL; diff --git a/driver/vidc/inc/msm_vidc_control.h b/driver/vidc/inc/msm_vidc_control.h index d85577fd10..60dc8b7a79 100644 --- a/driver/vidc/inc/msm_vidc_control.h +++ b/driver/vidc/inc/msm_vidc_control.h @@ -116,5 +116,6 @@ int msm_vidc_v4l2_to_hfi_enum(struct msm_vidc_inst *inst, enum msm_vidc_inst_capability_type cap_id, u32 *value); int msm_vidc_update_cap_value(struct msm_vidc_inst *inst, u32 cap, s32 adjusted_val, const char *func); - +int msm_vidc_get_parent_value(struct msm_vidc_inst* inst, u32 cap, u32 parent, + s32 *value, const char *func); #endif diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 2547ab1946..eb426efe27 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -365,7 +365,7 @@ int msm_vidc_update_cap_value(struct msm_vidc_inst *inst, u32 cap, return 0; } -static int msm_vidc_get_parent_value(struct msm_vidc_inst* inst, +int msm_vidc_get_parent_value(struct msm_vidc_inst* inst, u32 cap, u32 parent, s32 *value, const char *func) { int rc = 0; @@ -2031,7 +2031,7 @@ int msm_vidc_adjust_blur_type(void *instance, struct v4l2_ctrl *ctrl) struct msm_vidc_inst_capability *capability; s32 adjusted_value; struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - s32 rc_type = -1, cac = -1; + s32 rc_type = -1; s32 pix_fmts = -1, min_quality = -1; if (!inst || !inst->capabilities) { @@ -2048,8 +2048,6 @@ int msm_vidc_adjust_blur_type(void *instance, struct v4l2_ctrl *ctrl) if (msm_vidc_get_parent_value(inst, BLUR_TYPES, BITRATE_MODE, &rc_type, __func__) || - msm_vidc_get_parent_value(inst, BLUR_TYPES, - CONTENT_ADAPTIVE_CODING, &cac, __func__) || msm_vidc_get_parent_value(inst, BLUR_TYPES, PIX_FMTS, &pix_fmts, __func__) || msm_vidc_get_parent_value(inst, BLUR_TYPES, MIN_QUALITY, @@ -2062,8 +2060,10 @@ int msm_vidc_adjust_blur_type(void *instance, struct v4l2_ctrl *ctrl) } } else if (adjusted_value == VIDC_BLUR_ADAPTIVE) { if (is_scaling_enabled(inst) || min_quality || - (rc_type != HFI_RC_VBR_CFR) || - !cac || is_10bit_colorformat(pix_fmts)) { + (rc_type != HFI_RC_VBR_CFR && + rc_type != HFI_RC_CBR_CFR && + rc_type != HFI_RC_CBR_VFR) || + is_10bit_colorformat(pix_fmts)) { adjusted_value = VIDC_BLUR_NONE; } } From 6dff43a31518ae979c6571596a730c3f92ab85ec Mon Sep 17 00:00:00 2001 From: Mihir Ganu Date: Mon, 17 Jan 2022 21:27:03 -0800 Subject: [PATCH 0512/1061] video: driver: Update vb2_mem_ops to match videobuf2 declearations Update driver vb2_mem_ops function declarations to match videobuf2 header declarations. Change-Id: I79cd2cfc42abed2bd659c7a08c3cb1aa3f5cd495 Signed-off-by: Mihir Ganu --- driver/vidc/inc/msm_vidc_vb2.h | 17 ++++++++++++----- driver/vidc/src/msm_vidc_vb2.c | 32 +++++++++++++++++++++++--------- 2 files changed, 35 insertions(+), 14 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_vb2.h b/driver/vidc/inc/msm_vidc_vb2.h index c4c66dfab7..140031c68a 100644 --- a/driver/vidc/inc/msm_vidc_vb2.h +++ b/driver/vidc/inc/msm_vidc_vb2.h @@ -14,14 +14,21 @@ struct vb2_queue *msm_vidc_get_vb2q(struct msm_vidc_inst *inst, u32 type, const char *func); /* vb2_mem_ops */ +#if (LINUX_VERSION_CODE < KERNEL_VERSION(5, 15, 0)) void *msm_vb2_get_userptr(struct device *dev, unsigned long vaddr, unsigned long size, enum dma_data_direction dma_dir); -void msm_vb2_put_userptr(void *buf_priv); -void* msm_vb2_attach_dmabuf(struct device* dev, struct dma_buf* dbuf, +void *msm_vb2_attach_dmabuf(struct device *dev, struct dma_buf *dbuf, unsigned long size, enum dma_data_direction dma_dir); -void msm_vb2_detach_dmabuf(void* buf_priv); -int msm_vb2_map_dmabuf(void* buf_priv); -void msm_vb2_unmap_dmabuf(void* buf_priv); +#else +void *msm_vb2_get_userptr(struct vb2_buffer *vb, struct device *dev, + unsigned long vaddr, unsigned long size); +void *msm_vb2_attach_dmabuf(struct vb2_buffer *vb, struct device *dev, + struct dma_buf *dbuf, unsigned long size); +#endif +void msm_vb2_put_userptr(void *buf_priv); +void msm_vb2_detach_dmabuf(void *buf_priv); +int msm_vb2_map_dmabuf(void *buf_priv); +void msm_vb2_unmap_dmabuf(void *buf_priv); /* vb2_ops */ int msm_vidc_queue_setup(struct vb2_queue *q, diff --git a/driver/vidc/src/msm_vidc_vb2.c b/driver/vidc/src/msm_vidc_vb2.c index e11daee1b7..4cfd2f9816 100644 --- a/driver/vidc/src/msm_vidc_vb2.c +++ b/driver/vidc/src/msm_vidc_vb2.c @@ -38,32 +38,46 @@ struct vb2_queue *msm_vidc_get_vb2q(struct msm_vidc_inst *inst, return q; } +#if (LINUX_VERSION_CODE < KERNEL_VERSION(5, 15, 0)) void *msm_vb2_get_userptr(struct device *dev, unsigned long vaddr, unsigned long size, enum dma_data_direction dma_dir) { return (void *)0xdeadbeef; } +void *msm_vb2_attach_dmabuf(struct device *dev, struct dma_buf *dbuf, + unsigned long size, enum dma_data_direction dma_dir) +{ + return (void *)0xdeadbeef; +} +#else +void *msm_vb2_get_userptr(struct vb2_buffer *vb, struct device *dev, + unsigned long vaddr, unsigned long size) +{ + return (void *)0xdeadbeef; +} + +void *msm_vb2_attach_dmabuf(struct vb2_buffer *vb, struct device *dev, + struct dma_buf *dbuf, unsigned long size) +{ + return (void *)0xdeadbeef; +} +#endif + void msm_vb2_put_userptr(void *buf_priv) { } -void* msm_vb2_attach_dmabuf(struct device* dev, struct dma_buf* dbuf, - unsigned long size, enum dma_data_direction dma_dir) -{ - return (void*)0xdeadbeef; -} - -void msm_vb2_detach_dmabuf(void* buf_priv) +void msm_vb2_detach_dmabuf(void *buf_priv) { } -int msm_vb2_map_dmabuf(void* buf_priv) +int msm_vb2_map_dmabuf(void *buf_priv) { return 0; } -void msm_vb2_unmap_dmabuf(void* buf_priv) +void msm_vb2_unmap_dmabuf(void *buf_priv) { } From 85730716a857ed908098a73c9808b9efb9914537 Mon Sep 17 00:00:00 2001 From: Mihir Ganu Date: Mon, 10 Jan 2022 10:19:30 -0800 Subject: [PATCH 0513/1061] video: driver: Add support for AV1 film grain Add support to handle AV1 bitstreams with flim grain for both UBWC and linear colorformats. Change-Id: Ica07853d992c566c3471dc007ad8c22aba796dd4 Signed-off-by: Mihir Ganu --- driver/platform/kalama/src/msm_vidc_kalama.c | 2 +- .../variant/iris3/src/msm_vidc_buffer_iris3.c | 18 +++++++--- driver/vidc/src/msm_vdec.c | 34 +++++++++++++++++++ driver/vidc/src/msm_vidc_control.c | 3 +- driver/vidc/src/msm_vidc_driver.c | 5 +++ .../uapi/vidc/media/v4l2_vidc_extensions.h | 3 ++ 6 files changed, 59 insertions(+), 6 deletions(-) diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index d04f32ccdc..2476317f8c 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -1482,7 +1482,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { {FILM_GRAIN, DEC, AV1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, - 0, + V4L2_CID_MPEG_VIDC_AV1D_FILM_GRAIN_PRESENT, HFI_PROP_AV1_FILM_GRAIN_PRESENT}, {SUPER_BLOCK, DEC, AV1, diff --git a/driver/variant/iris3/src/msm_vidc_buffer_iris3.c b/driver/variant/iris3/src/msm_vidc_buffer_iris3.c index 680222db76..3d77884927 100644 --- a/driver/variant/iris3/src/msm_vidc_buffer_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_buffer_iris3.c @@ -220,15 +220,22 @@ static u32 msm_vidc_decoder_dpb_size_iris3(struct msm_vidc_inst *inst) return size; } + /* + * For legacy codecs (non-AV1), DPB is calculated only + * for linear formats. For AV1, DPB is needed for film-grain + * enabled bitstreams (UBWC & linear). + */ color_fmt = inst->capabilities->cap[PIX_FMTS].value; - if (!is_linear_colorformat(color_fmt)) + if (!is_linear_colorformat(color_fmt) && + inst->codec != MSM_VIDC_AV1) return size; f = &inst->fmts[OUTPUT_PORT]; width = f->fmt.pix_mp.width; height = f->fmt.pix_mp.height; - if (color_fmt == MSM_VIDC_FMT_NV12) { + if (color_fmt == MSM_VIDC_FMT_NV12 || + color_fmt == MSM_VIDC_FMT_NV12C) { v4l2_fmt = V4L2_PIX_FMT_VIDC_NV12C; HFI_NV12_UBWC_IL_CALC_BUF_SIZE_V2(size, width, height, VIDEO_Y_STRIDE_BYTES(v4l2_fmt, width), VIDEO_Y_SCANLINES(v4l2_fmt, height), @@ -237,7 +244,8 @@ static u32 msm_vidc_decoder_dpb_size_iris3(struct msm_vidc_inst *inst) height), VIDEO_UV_META_STRIDE(v4l2_fmt, width), VIDEO_UV_META_SCANLINES(v4l2_fmt, height)); - } else if (color_fmt == MSM_VIDC_FMT_P010) { + } else if (color_fmt == MSM_VIDC_FMT_P010 || + color_fmt == MSM_VIDC_FMT_TP10C) { v4l2_fmt = V4L2_PIX_FMT_VIDC_TP10C; HFI_YUV420_TP10_UBWC_CALC_BUF_SIZE(size, VIDEO_Y_STRIDE_BYTES(v4l2_fmt, width), VIDEO_Y_SCANLINES(v4l2_fmt, height), @@ -605,7 +613,9 @@ static int msm_buffer_dpb_count(struct msm_vidc_inst *inst) /* decoder dpb buffer count */ if (is_decode_session(inst)) { color_fmt = inst->capabilities->cap[PIX_FMTS].value; - if (is_linear_colorformat(color_fmt)) + if (is_linear_colorformat(color_fmt) || + (inst->codec == MSM_VIDC_AV1 && + (inst->capabilities->cap[FILM_GRAIN].value))) count = inst->buffers.output.min_count; return count; diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 0d39a9bb55..5e0b1a5ac8 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -600,6 +600,36 @@ static int msm_vdec_set_av1_superblock_enabled(struct msm_vidc_inst *inst, return rc; } +static int msm_vdec_set_opb_enable(struct msm_vidc_inst *inst) +{ + int rc = 0; + u32 color_fmt; + u32 opb_enable = 0; + + if (inst->codec != MSM_VIDC_AV1) + return 0; + + color_fmt = inst->capabilities->cap[PIX_FMTS].value; + if (is_linear_colorformat(color_fmt) || + inst->capabilities->cap[FILM_GRAIN].value) + opb_enable = 1; + + i_vpr_h(inst, "%s: OPB enable: %d", __func__, opb_enable); + rc = venus_hfi_session_property(inst, + HFI_PROP_OPB_ENABLE, + HFI_HOST_FLAGS_NONE, + get_hfi_port(inst, OUTPUT_PORT), + HFI_PAYLOAD_U32, + &opb_enable, + sizeof(u32)); + if (rc) { + i_vpr_e(inst, "%s: set property failed\n", __func__); + return rc; + } + + return rc; +} + static int msm_vdec_set_colorformat(struct msm_vidc_inst *inst) { int rc = 0; @@ -917,6 +947,10 @@ static int msm_vdec_set_output_properties(struct msm_vidc_inst *inst) return -EINVAL; } + rc = msm_vdec_set_opb_enable(inst); + if (rc) + return rc; + rc = msm_vdec_set_colorformat(inst); if (rc) return rc; diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 2547ab1946..b8a321d328 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -533,7 +533,8 @@ exit: void msm_vidc_add_volatile_flag(struct v4l2_ctrl *ctrl) { if (ctrl->id == V4L2_CID_MIN_BUFFERS_FOR_OUTPUT || - ctrl->id == V4L2_CID_MIN_BUFFERS_FOR_CAPTURE) + ctrl->id == V4L2_CID_MIN_BUFFERS_FOR_CAPTURE || + ctrl->id == V4L2_CID_MPEG_VIDC_AV1D_FILM_GRAIN_PRESENT) ctrl->flags |= V4L2_CTRL_FLAG_VOLATILE; } diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 8fb9554419..d4b4ac657c 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -2027,6 +2027,11 @@ int msm_vidc_get_control(struct msm_vidc_inst *inst, struct v4l2_ctrl *ctrl) inst->buffers.input.extra_count; i_vpr_h(inst, "g_min: input buffers %d\n", ctrl->val); break; + case V4L2_CID_MPEG_VIDC_AV1D_FILM_GRAIN_PRESENT: + ctrl->val = inst->capabilities->cap[FILM_GRAIN].value; + i_vpr_h(inst, "%s: film grain present: %d\n", + __func__, ctrl->val); + break; default: i_vpr_e(inst, "invalid ctrl %s id %d\n", ctrl->name, ctrl->id); diff --git a/include/uapi/vidc/media/v4l2_vidc_extensions.h b/include/uapi/vidc/media/v4l2_vidc_extensions.h index 6a6b0858b5..1b27358660 100644 --- a/include/uapi/vidc/media/v4l2_vidc_extensions.h +++ b/include/uapi/vidc/media/v4l2_vidc_extensions.h @@ -191,6 +191,9 @@ enum v4l2_mpeg_video_av1_tier { }; /* Decoder Timestamp Reorder control */ #define V4L2_CID_MPEG_VIDC_TS_REORDER (V4L2_CID_MPEG_VIDC_BASE + 0x34) +/* AV1 Decoder Film Grain */ +#define V4L2_CID_MPEG_VIDC_AV1D_FILM_GRAIN_PRESENT \ + (V4L2_CID_MPEG_VIDC_BASE + 0x35) /* Deprecate below controls once availble in gki and gsi bionic header */ #ifndef V4L2_CID_MPEG_VIDEO_BASELAYER_PRIORITY_ID From 9ae3c7b5ac8f713534103e8583ed9b1b70b41757 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Thu, 20 Jan 2022 17:00:56 +0530 Subject: [PATCH 0514/1061] video: driver: alter core_init and deinit sequence Added changes to call do msm_vidc_core_init() inside msm_vidc_probe_video_device() itself. It will uniform core init and deinit as part of insmod and rmmod. follow core_init and core_init_wait for all new session open sequence. Change-Id: I081d5ff3632296b5d2086992e6f3388daedfd1d7 Signed-off-by: Govindaraj Rajagopal --- driver/vidc/inc/msm_vidc_core.h | 2 +- driver/vidc/inc/msm_vidc_driver.h | 2 + driver/vidc/src/hfi_packet.c | 3 +- driver/vidc/src/msm_vidc.c | 4 ++ driver/vidc/src/msm_vidc_driver.c | 70 +++++++++++++--------------- driver/vidc/src/msm_vidc_probe.c | 10 +++- driver/vidc/src/venus_hfi_response.c | 15 +++++- 7 files changed, 63 insertions(+), 43 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_core.h b/driver/vidc/inc/msm_vidc_core.h index f4d66a4f1e..77a5f463d9 100644 --- a/driver/vidc/inc/msm_vidc_core.h +++ b/driver/vidc/inc/msm_vidc_core.h @@ -109,7 +109,7 @@ struct msm_vidc_core { struct msm_vidc_memory_ops *mem_ops; u32 header_id; u32 packet_id; - struct completion init_done; + u32 sys_init_id; bool handoff_done; bool hw_power_control; bool pm_suspended; diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 572de0f39e..af043699f4 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -283,6 +283,7 @@ int v4l2_type_to_driver_port(struct msm_vidc_inst *inst, u32 type, const char *func); const char *allow_name(enum msm_vidc_allow allow); const char *state_name(enum msm_vidc_inst_state state); +const char *core_state_name(enum msm_vidc_core_state state); int msm_vidc_change_inst_state(struct msm_vidc_inst *inst, enum msm_vidc_inst_state request_state, const char *func); int msm_vidc_create_internal_buffer(struct msm_vidc_inst *inst, @@ -315,6 +316,7 @@ int msm_vidc_get_inst_capability(struct msm_vidc_inst *inst); int msm_vidc_change_core_state(struct msm_vidc_core *core, enum msm_vidc_core_state request_state, const char *func); int msm_vidc_core_init(struct msm_vidc_core *core); +int msm_vidc_core_init_wait(struct msm_vidc_core *core); int msm_vidc_core_deinit(struct msm_vidc_core *core, bool force); int msm_vidc_inst_timeout(struct msm_vidc_inst *inst); int msm_vidc_print_buffer_info(struct msm_vidc_inst *inst); diff --git a/driver/vidc/src/hfi_packet.c b/driver/vidc/src/hfi_packet.c index 1955573bc1..d93b2e7458 100644 --- a/driver/vidc/src/hfi_packet.c +++ b/driver/vidc/src/hfi_packet.c @@ -388,6 +388,7 @@ int hfi_packet_sys_init(struct msm_vidc_core *core, /* HFI_CMD_SYSTEM_INIT */ payload = HFI_VIDEO_ARCH_LX; d_vpr_h("%s: arch %d\n", __func__, payload); + core->sys_init_id = core->packet_id++; rc = hfi_create_packet(pkt, pkt_size, HFI_CMD_INIT, (HFI_HOST_FLAGS_RESPONSE_REQUIRED | @@ -395,7 +396,7 @@ int hfi_packet_sys_init(struct msm_vidc_core *core, HFI_HOST_FLAGS_NON_DISCARDABLE), HFI_PAYLOAD_U32, HFI_PORT_NONE, - core->packet_id++, + core->sys_init_id, &payload, sizeof(u32)); if (rc) diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index 0223d0d9d8..8b955a407a 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -812,6 +812,10 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) if (rc) return NULL; + rc = msm_vidc_core_init_wait(core); + if (rc) + return NULL; + inst = kzalloc(sizeof(*inst), GFP_KERNEL); if (!inst) { d_vpr_e("%s: failed to allocate inst memory\n", __func__); diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index d4b4ac657c..665e3558ac 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -3837,6 +3837,12 @@ int msm_vidc_add_session(struct msm_vidc_inst *inst) } core_lock(core, __func__); + if (core->state != MSM_VIDC_CORE_INIT) { + i_vpr_e(inst, "%s: invalid state %s\n", + __func__, core_state_name(core->state)); + rc = -EINVAL; + goto unlock; + } list_for_each_entry(i, &core->instances, list) count++; @@ -3847,6 +3853,7 @@ int msm_vidc_add_session(struct msm_vidc_inst *inst) __func__, core->capabilities[MAX_SESSION_COUNT].value, count); rc = -EINVAL; } +unlock: core_unlock(core, __func__); return rc; @@ -4442,9 +4449,9 @@ int msm_vidc_core_deinit(struct msm_vidc_core *core, bool force) return rc; } -static int msm_vidc_core_init_wait(struct msm_vidc_core *core) +int msm_vidc_core_init_wait(struct msm_vidc_core *core) { - const int interval = 40; + const int interval = 10; int max_tries, count = 0, rc = 0; if (!core || !core->capabilities) { @@ -4452,21 +4459,18 @@ static int msm_vidc_core_init_wait(struct msm_vidc_core *core) return -EINVAL; } - rc = __strict_check(core, __func__); - if (rc) - return rc; - - if (core->state != MSM_VIDC_CORE_INIT_WAIT) - return 0; + core_lock(core, __func__); + if (core->state == MSM_VIDC_CORE_INIT) { + rc = 0; + goto unlock; + } else if (core->state == MSM_VIDC_CORE_DEINIT) { + rc = -EINVAL; + goto unlock; + } d_vpr_h("%s(): waiting for state change\n", __func__); max_tries = core->capabilities[HW_RESPONSE_TIMEOUT].value / interval; - /** - * attempt one more time to ensure triggering init_done - * timeout sequence for 1st session, incase response not - * received in reverse thread. - */ - while (count < max_tries + 1) { + while (count < max_tries) { if (core->state != MSM_VIDC_CORE_INIT_WAIT) break; @@ -4478,12 +4482,20 @@ static int msm_vidc_core_init_wait(struct msm_vidc_core *core) d_vpr_h("%s: state %s, interval %u, count %u, max_tries %u\n", __func__, core_state_name(core->state), interval, count, max_tries); - /* treat as fatal and fail session_open */ - if (core->state == MSM_VIDC_CORE_INIT_WAIT) { - d_vpr_e("%s: state change failed\n", __func__); + if (core->state == MSM_VIDC_CORE_INIT) { + d_vpr_h("%s: sys init successful\n", __func__); + rc = 0; + goto unlock; + } else { + d_vpr_h("%s: sys init wait timedout. state %s\n", + __func__, core_state_name(core->state)); rc = -EINVAL; + goto unlock; } - +unlock: + if (rc) + msm_vidc_core_deinit_locked(core, true); + core_unlock(core, __func__); return rc; } @@ -4497,11 +4509,8 @@ int msm_vidc_core_init(struct msm_vidc_core *core) } core_lock(core, __func__); - rc = msm_vidc_core_init_wait(core); - if (rc) - goto unlock; - - if (core->state == MSM_VIDC_CORE_INIT) + if (core->state == MSM_VIDC_CORE_INIT || + core->state == MSM_VIDC_CORE_INIT_WAIT) goto unlock; msm_vidc_change_core_state(core, MSM_VIDC_CORE_INIT_WAIT, __func__); @@ -4515,21 +4524,6 @@ int msm_vidc_core_init(struct msm_vidc_core *core) goto unlock; } - d_vpr_h("%s(): waiting for sys_init_done, %d ms\n", __func__, - core->capabilities[HW_RESPONSE_TIMEOUT].value); - core_unlock(core, __func__); - rc = wait_for_completion_timeout(&core->init_done, msecs_to_jiffies( - core->capabilities[HW_RESPONSE_TIMEOUT].value)); - core_lock(core, __func__); - if (!rc) { - d_vpr_e("%s: core init timed out\n", __func__); - rc = -ETIMEDOUT; - } else { - msm_vidc_change_core_state(core, MSM_VIDC_CORE_INIT, __func__); - d_vpr_h("%s: system init wait completed\n", __func__); - rc = 0; - } - unlock: if (rc) msm_vidc_core_deinit_locked(core, true); diff --git a/driver/vidc/src/msm_vidc_probe.c b/driver/vidc/src/msm_vidc_probe.c index 7d62dbd0dd..2a7485a679 100644 --- a/driver/vidc/src/msm_vidc_probe.c +++ b/driver/vidc/src/msm_vidc_probe.c @@ -291,7 +291,6 @@ static int msm_vidc_initialize_core(struct msm_vidc_core *core) } mutex_init(&core->lock); - init_completion(&core->init_done); INIT_LIST_HEAD(&core->instances); INIT_LIST_HEAD(&core->dangling_instances); @@ -332,6 +331,7 @@ static int msm_vidc_remove(struct platform_device* pdev) d_vpr_h("%s()\n", __func__); msm_vidc_core_deinit(core, true); + of_platform_depopulate(&pdev->dev); msm_vidc_unregister_video_device(core, MSM_VIDC_ENCODER); msm_vidc_unregister_video_device(core, MSM_VIDC_DECODER); @@ -466,8 +466,16 @@ static int msm_vidc_probe_video_device(struct platform_device *pdev) goto sub_dev_failed; } + rc = msm_vidc_core_init(core); + if (rc) { + d_vpr_e("%s: sys init failed\n", __func__); + goto core_init_failed; + } + return rc; +core_init_failed: + of_platform_depopulate(&pdev->dev); sub_dev_failed: msm_vidc_unregister_video_device(core, MSM_VIDC_ENCODER); enc_reg_failed: diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index e7aa6a32c7..440b4dd666 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -480,8 +480,19 @@ static int handle_system_init(struct msm_vidc_core *core, struct hfi_packet *pkt) { if (pkt->flags & HFI_FW_FLAGS_SUCCESS) { - d_vpr_h("%s: successful\n", __func__); - complete(&core->init_done); + core_lock(core, __func__); + if (core->state == MSM_VIDC_CORE_INIT_WAIT && + pkt->packet_id == core->sys_init_id) { + msm_vidc_change_core_state(core, MSM_VIDC_CORE_INIT, __func__); + d_vpr_h("%s: successful\n", __func__); + } else if (core->state != MSM_VIDC_CORE_INIT_WAIT) { + d_vpr_e("%s: invalid core state %s\n", __func__, + core_state_name(core->state)); + } else if (pkt->packet_id != core->sys_init_id) { + d_vpr_e("%s: invalid pkt id %u, expected %u\n", __func__, + pkt->packet_id, core->sys_init_id); + } + core_unlock(core, __func__); } else { d_vpr_h("%s: unhandled. flags=%d\n", __func__, pkt->flags); } From 74c3b1bb632c7870ac72cbe37f1731ac4f0c7630 Mon Sep 17 00:00:00 2001 From: Maheshwar Ajja Date: Thu, 20 Jan 2022 09:32:00 -0800 Subject: [PATCH 0515/1061] video: driver: allow five 4K resolution video sessions Allow five 4K resolution video sessions to support usecases which needs five 4K sessions. Change-Id: Iaf0d8f46d85f563fe45d4064baf9e9ec712e9241 Signed-off-by: Maheshwar Ajja --- driver/platform/kalama/src/msm_vidc_kalama.c | 4 ++-- driver/vidc/src/msm_vidc_driver.c | 15 +-------------- 2 files changed, 3 insertions(+), 16 deletions(-) diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index 58f8220a28..8015e292a5 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -59,8 +59,8 @@ static struct msm_platform_core_capability core_data_kalama[] = { {DEC_CODECS, H264|HEVC|VP9|AV1|HEIC}, {MAX_SESSION_COUNT, 16}, {MAX_NUM_720P_SESSIONS, 16}, - {MAX_NUM_1080P_SESSIONS, 8}, - {MAX_NUM_4K_SESSIONS, 6}, + {MAX_NUM_1080P_SESSIONS, 10}, + {MAX_NUM_4K_SESSIONS, 5}, {MAX_NUM_8K_SESSIONS, 2}, {MAX_SECURE_SESSION_COUNT, 3}, {MAX_RT_MBPF, 173056}, /* (8192x4320)/256 + (4096x2176)/256*/ diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index d4b4ac657c..954f6c9a5c 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -5832,8 +5832,7 @@ static int msm_vidc_check_resolution_supported(struct msm_vidc_inst *inst) static int msm_vidc_check_max_sessions(struct msm_vidc_inst *inst) { u32 width = 0, height = 0; - u32 num_720p_sessions = 0, num_1080p_sessions = 0; - u32 num_4k_sessions = 0, num_8k_sessions = 0; + u32 num_1080p_sessions = 0, num_4k_sessions = 0, num_8k_sessions = 0; struct msm_vidc_inst *i; struct msm_vidc_core *core; @@ -5880,16 +5879,11 @@ static int msm_vidc_check_max_sessions(struct msm_vidc_inst *inst) num_8k_sessions += 1; num_4k_sessions += 2; num_1080p_sessions += 4; - num_720p_sessions += 8; } else if (res_is_greater_than(width, height, 1920 + (1920 >> 1), 1088 + (1088 >> 1))) { num_4k_sessions += 1; num_1080p_sessions += 2; - num_720p_sessions += 4; } else if (res_is_greater_than(width, height, 1280 + (1280 >> 1), 736 + (736 >> 1))) { num_1080p_sessions += 1; - num_720p_sessions += 2; - } else { - num_720p_sessions += 1; } } core_unlock(core, __func__); @@ -5915,13 +5909,6 @@ static int msm_vidc_check_max_sessions(struct msm_vidc_inst *inst) return -ENOMEM; } - if (num_720p_sessions > core->capabilities[MAX_NUM_720P_SESSIONS].value) { - i_vpr_e(inst, "%s: total sessions(<=720p) %d, exceeded max limit %d\n", - __func__, num_720p_sessions, - core->capabilities[MAX_NUM_720P_SESSIONS].value); - return -ENOMEM; - } - return 0; } From eaa5db314a360a2ae0fad490b82f34a3e2a78849 Mon Sep 17 00:00:00 2001 From: Mahesh Kumar Sharma Date: Fri, 7 Jan 2022 14:05:10 -0800 Subject: [PATCH 0516/1061] video: driver: add 120fps support for VP9 decoder Increase framerate support from 60fps to 120fps with vp9 decoder to allow clients to use vp9 decoder upto 120fps. Change-Id: I1fdceeb6b7bfa96cb74706bba1d81969b1c08ec2 Signed-off-by: Mahesh Kumar Sharma --- driver/platform/kalama/src/msm_vidc_kalama.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index 58f8220a28..657bdb03b4 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -52,6 +52,7 @@ #define AV1 MSM_VIDC_AV1 #define HEIC MSM_VIDC_HEIC #define CODECS_ALL (H264 | HEVC | VP9 | HEIC | AV1) +#define MAXIMUM_OVERRIDE_VP9_FPS 120 static struct msm_platform_core_capability core_data_kalama[] = { /* {type, value} */ @@ -219,8 +220,8 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { {MBPS, ENC, CODECS_ALL, 64, 3916800, 1, 3916800}, /* ((1920 * 1088) / 256) * 960 fps */ {MBPS, DEC, CODECS_ALL, 64, 7833600, 1, 7833600}, - /* ((4096 * 2304) / 256) * 60 */ - {MBPS, DEC, VP9, 36, 2211840, 1, 2211840}, + /* ((4096 * 2304) / 256) * 120 */ + {MBPS, DEC, VP9, 36, 4423680, 1, 4423680}, /* ((4096 * 2304) / 256) * 60 fps */ {POWER_SAVE_MBPS, ENC, CODECS_ALL, 0, 2211840, 1, 2211840}, @@ -238,7 +239,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { 1, (DEFAULT_FPS << 16)}, {FRAME_RATE, DEC, VP9, - (MINIMUM_FPS << 16), (MAXIMUM_VP9_FPS << 16), + (MINIMUM_FPS << 16), (MAXIMUM_OVERRIDE_VP9_FPS << 16), 1, (DEFAULT_FPS << 16)}, {OPERATING_RATE, ENC|DEC, CODECS_ALL, From acc83ca2113a1cda14bbfe31baa2a08cc63cb55c Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Tue, 11 Jan 2022 17:48:20 -0800 Subject: [PATCH 0517/1061] video: driver: request api changes for dynamic controls - Request api allows to synchronize controls along with buffers. - Client allocates a request fd. This request fd is associated with control and set using s_ext_ctrls. Such controls are stored by the framework and not applied immediately. - Request fd is also associated with input qbuf and queued to driver. Following this actual request is queued. Buffers do not enter the queue untill the request is queued. - As part of qbuf, driver call request_setup() which inturn sets the control to driver. Change-Id: I316c4dc2a0091b21059230be5ee5fd6379259456 Signed-off-by: Darshana Patil --- driver/vidc/inc/msm_vidc.h | 2 - driver/vidc/inc/msm_vidc_core.h | 4 + driver/vidc/inc/msm_vidc_inst.h | 9 +- driver/vidc/inc/msm_vidc_internal.h | 1 + driver/vidc/inc/msm_vidc_v4l2.h | 5 +- driver/vidc/inc/msm_vidc_vb2.h | 4 +- driver/vidc/src/msm_vdec.c | 24 ++--- driver/vidc/src/msm_venc.c | 14 +-- driver/vidc/src/msm_vidc.c | 27 +++--- driver/vidc/src/msm_vidc_control.c | 43 ++++----- driver/vidc/src/msm_vidc_debug.c | 2 +- driver/vidc/src/msm_vidc_driver.c | 140 ++++++++++++++++++++++------ driver/vidc/src/msm_vidc_platform.c | 14 +++ driver/vidc/src/msm_vidc_probe.c | 69 ++++++++++++-- driver/vidc/src/msm_vidc_v4l2.c | 27 ++++++ driver/vidc/src/msm_vidc_vb2.c | 52 +++++++++-- 16 files changed, 335 insertions(+), 102 deletions(-) diff --git a/driver/vidc/inc/msm_vidc.h b/driver/vidc/inc/msm_vidc.h index 685e33f5b8..28202fc002 100644 --- a/driver/vidc/inc/msm_vidc.h +++ b/driver/vidc/inc/msm_vidc.h @@ -25,8 +25,6 @@ int msm_vidc_s_selection(void* instance, struct v4l2_selection* s); int msm_vidc_g_selection(void* instance, struct v4l2_selection* s); int msm_vidc_s_param(void *instance, struct v4l2_streamparm *sp); int msm_vidc_g_param(void *instance, struct v4l2_streamparm *sp); -int msm_vidc_s_ext_ctrl(void *instance, struct v4l2_ext_controls *a); -int msm_vidc_g_ext_ctrl(void *instance, struct v4l2_ext_controls *a); int msm_vidc_reqbufs(void *instance, struct v4l2_requestbuffers *b); int msm_vidc_release_buffer(void *instance, int buffer_type, unsigned int buffer_index); diff --git a/driver/vidc/inc/msm_vidc_core.h b/driver/vidc/inc/msm_vidc_core.h index 77a5f463d9..27862c4e6d 100644 --- a/driver/vidc/inc/msm_vidc_core.h +++ b/driver/vidc/inc/msm_vidc_core.h @@ -47,6 +47,7 @@ struct msm_vidc_iface_q_info { struct msm_video_device { enum msm_vidc_domain_type type; struct video_device vdev; + struct v4l2_m2m_dev *m2m_dev; }; struct msm_vidc_core_power { @@ -65,6 +66,7 @@ struct msm_vidc_core { struct platform_device *pdev; struct msm_video_device vdev[2]; struct v4l2_device v4l2_dev; + struct media_device media_dev; struct list_head instances; struct list_head dangling_instances; struct dentry *debugfs_parent; @@ -104,9 +106,11 @@ struct msm_vidc_core { struct v4l2_ctrl_ops *v4l2_ctrl_ops; struct vb2_ops *vb2_ops; struct vb2_mem_ops *vb2_mem_ops; + struct v4l2_m2m_ops *v4l2_m2m_ops; struct msm_vidc_venus_ops *venus_ops; struct msm_vidc_session_ops *session_ops; struct msm_vidc_memory_ops *mem_ops; + struct media_device_ops *media_device_ops; u32 header_id; u32 packet_id; u32 sys_init_id; diff --git a/driver/vidc/inc/msm_vidc_inst.h b/driver/vidc/inc/msm_vidc_inst.h index 7ed3096e03..d990ba844f 100644 --- a/driver/vidc/inc/msm_vidc_inst.h +++ b/driver/vidc/inc/msm_vidc_inst.h @@ -86,9 +86,14 @@ enum msm_vidc_inst_state { MSM_VIDC_ERROR = 12, }; +struct buf_queue { + struct vb2_queue *vb2q; +}; + struct msm_vidc_inst { struct list_head list; struct mutex lock; + struct mutex request_lock; enum msm_vidc_inst_state state; enum msm_vidc_domain_type domain; enum msm_vidc_codec_type codec; @@ -101,6 +106,8 @@ struct msm_vidc_inst { struct v4l2_format fmts[MAX_PORT]; struct v4l2_ctrl_handler ctrl_handler; struct v4l2_fh event_handler; + struct v4l2_m2m_dev *m2m_dev; + struct v4l2_m2m_ctx *m2m_ctx; struct v4l2_ctrl **ctrls; u32 num_ctrls; struct msm_vidc_inst_cap_entry children; @@ -108,7 +115,7 @@ struct msm_vidc_inst { enum hfi_rate_control hfi_rc_type; enum hfi_layer_encoding_type hfi_layer_type; bool request; - struct vb2_queue vb2q[MAX_PORT]; + struct buf_queue bufq[MAX_PORT]; struct msm_vidc_rectangle crop; struct msm_vidc_rectangle compose; struct msm_vidc_power power; diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index b152ba2a43..7ae860fe65 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -14,6 +14,7 @@ #include #include #include +#include #include #include diff --git a/driver/vidc/inc/msm_vidc_v4l2.h b/driver/vidc/inc/msm_vidc_v4l2.h index d283adbe07..d04badf32a 100644 --- a/driver/vidc/inc/msm_vidc_v4l2.h +++ b/driver/vidc/inc/msm_vidc_v4l2.h @@ -64,5 +64,8 @@ int msm_v4l2_querymenu(struct file *file, void *fh, struct v4l2_querymenu *qmenu); unsigned int msm_v4l2_poll(struct file *filp, struct poll_table_struct *pt); - +int msm_v4l2_request_validate(struct media_request *req); +void msm_v4l2_request_queue(struct media_request *req); +void msm_v4l2_m2m_device_run(void *priv); +void msm_v4l2_m2m_job_abort(void *priv); #endif // _MSM_VIDC_V4L2_H_ diff --git a/driver/vidc/inc/msm_vidc_vb2.h b/driver/vidc/inc/msm_vidc_vb2.h index 140031c68a..a1f6aef999 100644 --- a/driver/vidc/inc/msm_vidc_vb2.h +++ b/driver/vidc/inc/msm_vidc_vb2.h @@ -38,4 +38,6 @@ int msm_vidc_start_streaming(struct vb2_queue *q, unsigned int count); void msm_vidc_stop_streaming(struct vb2_queue *q); void msm_vidc_buf_queue(struct vb2_buffer *vb2); void msm_vidc_buf_cleanup(struct vb2_buffer *vb); -#endif // _MSM_VIDC_VB2_H_ \ No newline at end of file +int msm_vidc_buf_out_validate(struct vb2_buffer *vb); +void msm_vidc_buf_request_complete(struct vb2_buffer *vb); +#endif // _MSM_VIDC_VB2_H_ diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 5e0b1a5ac8..3a91ab17bb 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -1511,7 +1511,7 @@ int msm_vdec_input_port_settings_change(struct msm_vidc_inst *inst) u32 rc = 0; struct v4l2_event event = {0}; - if (!inst->vb2q[INPUT_PORT].streaming) { + if (!inst->bufq[INPUT_PORT].vb2q->streaming) { i_vpr_e(inst, "%s: input port not streaming\n", __func__); return 0; @@ -1588,7 +1588,7 @@ int msm_vdec_streamon_input(struct msm_vidc_inst *inst) } if (is_input_meta_enabled(inst) && - !inst->vb2q[INPUT_META_PORT].streaming) { + !inst->bufq[INPUT_META_PORT].vb2q->streaming) { i_vpr_e(inst, "%s: Meta port must be streamed on before data port\n", __func__); @@ -1897,7 +1897,7 @@ int msm_vdec_streamon_output(struct msm_vidc_inst *inst) capability = inst->capabilities; if (is_output_meta_enabled(inst) && - !inst->vb2q[OUTPUT_META_PORT].streaming) { + !inst->bufq[OUTPUT_META_PORT].vb2q->streaming) { i_vpr_e(inst, "%s: Meta port must be streamed on before data port\n", __func__); @@ -2347,8 +2347,8 @@ int msm_vdec_process_cmd(struct msm_vidc_inst *inst, u32 cmd) return rc; } else if (cmd == V4L2_DEC_CMD_START) { i_vpr_h(inst, "received cmd: resume\n"); - vb2_clear_last_buffer_dequeued(&inst->vb2q[OUTPUT_META_PORT]); - vb2_clear_last_buffer_dequeued(&inst->vb2q[OUTPUT_PORT]); + vb2_clear_last_buffer_dequeued(inst->bufq[OUTPUT_META_PORT].vb2q); + vb2_clear_last_buffer_dequeued(inst->bufq[OUTPUT_PORT].vb2q); if (capability->cap[CODED_FRAMES].value == CODED_FRAMES_INTERLACE && !is_ubwc_colorformat(capability->cap[PIX_FMTS].value)) { @@ -2417,7 +2417,7 @@ int msm_vdec_try_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) pix_fmt = v4l2_codec_to_driver(f->fmt.pix_mp.pixelformat, __func__); } } else if (f->type == OUTPUT_MPLANE) { - if (inst->vb2q[INPUT_PORT].streaming) { + if (inst->bufq[INPUT_PORT].vb2q->streaming) { f->fmt.pix_mp.height = inst->fmts[INPUT_PORT].fmt.pix_mp.height; f->fmt.pix_mp.width = inst->fmts[INPUT_PORT].fmt.pix_mp.width; } @@ -2558,7 +2558,7 @@ int msm_vdec_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) } else if (f->type == OUTPUT_MPLANE) { fmt = &inst->fmts[OUTPUT_PORT]; fmt->type = OUTPUT_MPLANE; - if (inst->vb2q[INPUT_PORT].streaming) { + if (inst->bufq[INPUT_PORT].vb2q->streaming) { f->fmt.pix_mp.height = inst->fmts[INPUT_PORT].fmt.pix_mp.height; f->fmt.pix_mp.width = inst->fmts[INPUT_PORT].fmt.pix_mp.width; } @@ -2576,7 +2576,7 @@ int msm_vdec_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) fmt->fmt.pix_mp.plane_fmt[0].sizeimage = call_session_op(core, buffer_size, inst, MSM_VIDC_BUF_OUTPUT); - if (!inst->vb2q[INPUT_PORT].streaming) + if (!inst->bufq[INPUT_PORT].vb2q->streaming) inst->buffers.output.min_count = call_session_op(core, min_count, inst, MSM_VIDC_BUF_OUTPUT); inst->buffers.output.extra_count = call_session_op(core, @@ -2594,7 +2594,7 @@ int msm_vdec_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) msm_vidc_update_cap_value(inst, PIX_FMTS, pix_fmt, __func__); /* update crop while input port is not streaming */ - if (!inst->vb2q[INPUT_PORT].streaming) { + if (!inst->bufq[INPUT_PORT].vb2q->streaming) { inst->crop.top = 0; inst->crop.left = 0; inst->crop.width = f->fmt.pix_mp.width; @@ -2762,8 +2762,8 @@ set_default: msm_vidc_update_cap_value(inst, is_frame_rate ? FRAME_RATE : OPERATING_RATE, q16_rate, __func__); if (is_realtime_session(inst) && - ((s_parm->type == INPUT_MPLANE && inst->vb2q[INPUT_PORT].streaming) || - (s_parm->type == OUTPUT_MPLANE && inst->vb2q[OUTPUT_PORT].streaming))) { + ((s_parm->type == INPUT_MPLANE && inst->bufq[INPUT_PORT].vb2q->streaming) || + (s_parm->type == OUTPUT_MPLANE && inst->bufq[OUTPUT_PORT].vb2q->streaming))) { rc = msm_vidc_check_core_mbps(inst); if (rc) { i_vpr_e(inst, "%s: unsupported load\n", __func__); @@ -2833,7 +2833,7 @@ static int msm_vdec_check_colorformat_supported(struct msm_vidc_inst* inst, bool supported = true; /* do not reject coloformats before streamon */ - if (!inst->vb2q[INPUT_PORT].streaming) + if (!inst->bufq[INPUT_PORT].vb2q->streaming) return true; /* diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index b959be39cf..4751ca96ba 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -815,7 +815,7 @@ int msm_venc_streamon_input(struct msm_vidc_inst *inst) } if (is_input_meta_enabled(inst) && - !inst->vb2q[INPUT_META_PORT].streaming) { + !inst->bufq[INPUT_META_PORT].vb2q->streaming) { i_vpr_e(inst, "%s: Meta port must be streamed on before data port\n", __func__); @@ -923,8 +923,8 @@ int msm_venc_process_cmd(struct msm_vidc_inst *inst, u32 cmd) i_vpr_h(inst, "received cmd: resume\n"); if (!msm_vidc_allow_start(inst)) return -EBUSY; - vb2_clear_last_buffer_dequeued(&inst->vb2q[OUTPUT_META_PORT]); - vb2_clear_last_buffer_dequeued(&inst->vb2q[OUTPUT_PORT]); + vb2_clear_last_buffer_dequeued(inst->bufq[OUTPUT_META_PORT].vb2q); + vb2_clear_last_buffer_dequeued(inst->bufq[OUTPUT_PORT].vb2q); rc = msm_vidc_state_change_start(inst); if (rc) @@ -989,7 +989,7 @@ int msm_venc_streamon_output(struct msm_vidc_inst *inst) } if (is_output_meta_enabled(inst) && - !inst->vb2q[OUTPUT_META_PORT].streaming) { + !inst->bufq[OUTPUT_META_PORT].vb2q->streaming) { i_vpr_e(inst, "%s: Meta port must be streamed on before data port\n", __func__); @@ -1619,8 +1619,8 @@ int msm_venc_s_param(struct msm_vidc_inst *inst, msm_vidc_update_cap_value(inst, is_frame_rate ? FRAME_RATE : OPERATING_RATE, q16_rate, __func__); if (is_realtime_session(inst) && - ((s_parm->type == INPUT_MPLANE && inst->vb2q[INPUT_PORT].streaming) || - (s_parm->type == OUTPUT_MPLANE && inst->vb2q[OUTPUT_PORT].streaming))) { + ((s_parm->type == INPUT_MPLANE && inst->bufq[INPUT_PORT].vb2q->streaming) || + (s_parm->type == OUTPUT_MPLANE && inst->bufq[OUTPUT_PORT].vb2q->streaming))) { rc = msm_vidc_check_core_mbps(inst); if (rc) { i_vpr_e(inst, "%s: unsupported load\n", __func__); @@ -1646,7 +1646,7 @@ int msm_venc_s_param(struct msm_vidc_inst *inst, * FRAME_RATE cap id. * In dynamic case, frame rate is set like below. */ - if (inst->vb2q[OUTPUT_PORT].streaming) { + if (inst->bufq[OUTPUT_PORT].vb2q->streaming) { rc = venus_hfi_session_property(inst, HFI_PROP_FRAME_RATE, HFI_HOST_FLAGS_NONE, diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index 8b955a407a..6c4d7a2a7e 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -51,7 +51,7 @@ static int get_poll_flags(struct msm_vidc_inst *inst, u32 port) __func__, inst, port); return poll; } - q = &inst->vb2q[port]; + q = inst->bufq[port].vb2q; spin_lock_irqsave(&q->done_lock, flags); if (!list_empty(&q->done_list)) @@ -85,10 +85,10 @@ int msm_vidc_poll(void *instance, struct file *filp, } poll_wait(filp, &inst->event_handler.wait, wait); - poll_wait(filp, &inst->vb2q[INPUT_META_PORT].done_wq, wait); - poll_wait(filp, &inst->vb2q[OUTPUT_META_PORT].done_wq, wait); - poll_wait(filp, &inst->vb2q[INPUT_PORT].done_wq, wait); - poll_wait(filp, &inst->vb2q[OUTPUT_PORT].done_wq, wait); + poll_wait(filp, &inst->bufq[INPUT_META_PORT].vb2q->done_wq, wait); + poll_wait(filp, &inst->bufq[OUTPUT_META_PORT].vb2q->done_wq, wait); + poll_wait(filp, &inst->bufq[INPUT_PORT].vb2q->done_wq, wait); + poll_wait(filp, &inst->bufq[OUTPUT_PORT].vb2q->done_wq, wait); if (v4l2_event_pending(&inst->event_handler)) poll |= POLLPRI; @@ -402,7 +402,7 @@ int msm_vidc_reqbufs(void *instance, struct v4l2_requestbuffers *b) goto exit; } - rc = vb2_reqbufs(&inst->vb2q[port], b); + rc = vb2_reqbufs(inst->bufq[port].vb2q, b); if (rc) { i_vpr_e(inst, "%s: vb2_reqbufs(%d) failed, %d\n", __func__, b->type, rc); @@ -511,7 +511,7 @@ int msm_vidc_streamon(void *instance, enum v4l2_buf_type type) goto exit; } - rc = vb2_streamon(&inst->vb2q[port], type); + rc = vb2_streamon(inst->bufq[port].vb2q, type); if (rc) { i_vpr_e(inst, "%s: vb2_streamon(%d) failed, %d\n", __func__, type, rc); @@ -556,7 +556,7 @@ int msm_vidc_streamoff(void *instance, enum v4l2_buf_type type) goto exit; } - rc = vb2_streamoff(&inst->vb2q[port], type); + rc = vb2_streamoff(inst->bufq[port].vb2q, type); if (rc) { i_vpr_e(inst, "%s: vb2_streamoff(%d) failed, %d\n", __func__, type, rc); @@ -833,6 +833,7 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) inst->auto_framerate = DEFAULT_FPS << 16; kref_init(&inst->kref); mutex_init(&inst->lock); + mutex_init(&inst->request_lock); msm_vidc_update_debug_str(inst); i_vpr_h(inst, "Opening video instance: %d\n", session_type); @@ -903,10 +904,7 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) goto error; } - if (is_decode_session(inst)) - rc = msm_vdec_inst_init(inst); - else if (is_encode_session(inst)) - rc = msm_venc_inst_init(inst); + rc = msm_vidc_event_queue_init(inst); if (rc) goto error; @@ -914,7 +912,10 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) if (rc) goto error; - rc = msm_vidc_event_queue_init(inst); + if (is_decode_session(inst)) + rc = msm_vdec_inst_init(inst); + else if (is_encode_session(inst)) + rc = msm_venc_inst_init(inst); if (rc) goto error; diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index cbc67dc0d6..d5c1608829 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -173,7 +173,7 @@ static u32 msm_vidc_get_port_info(struct msm_vidc_inst *inst, if (capability->cap[cap_id].flags & CAP_FLAG_INPUT_PORT && capability->cap[cap_id].flags & CAP_FLAG_OUTPUT_PORT) { - if (inst->vb2q[OUTPUT_PORT].streaming) + if (inst->bufq[OUTPUT_PORT].vb2q->streaming) return get_hfi_port(inst, INPUT_PORT); else return get_hfi_port(inst, OUTPUT_PORT); @@ -844,11 +844,8 @@ int msm_v4l2_op_s_ctrl(struct v4l2_ctrl *ctrl) i_vpr_h(inst, "%s: state %d, name %s, id 0x%x value %d\n", __func__, inst->state, ctrl->name, ctrl->id, ctrl->val); - if (!msm_vidc_allow_s_ctrl(inst, ctrl->id)) { - i_vpr_e(inst, "%s: state %d, name %s, id %#x not allowed\n", - __func__, inst->state, ctrl->name, ctrl->id, ctrl->val); - return -EBUSY; - } + if (!msm_vidc_allow_s_ctrl(inst, ctrl->id)) + return -EINVAL; cap_id = msm_vidc_get_cap_id(inst, ctrl->id); if (cap_id == INST_CAP_NONE) { @@ -859,7 +856,7 @@ int msm_v4l2_op_s_ctrl(struct v4l2_ctrl *ctrl) capability->cap[cap_id].flags |= CAP_FLAG_CLIENT_SET; /* Static setting */ - if (!inst->vb2q[OUTPUT_PORT].streaming) { + if (!inst->bufq[OUTPUT_PORT].vb2q->streaming) { msm_vidc_update_cap_value(inst, cap_id, ctrl->val, __func__); if (ctrl->id == V4L2_CID_MPEG_VIDC_SECURE) { @@ -927,7 +924,7 @@ int msm_v4l2_op_s_ctrl(struct v4l2_ctrl *ctrl) } /* check if dynamic adjustment is allowed */ - if (inst->vb2q[OUTPUT_PORT].streaming && + if (inst->bufq[OUTPUT_PORT].vb2q->streaming && !(capability->cap[cap_id].flags & CAP_FLAG_DYNAMIC_ALLOWED)) { i_vpr_e(inst, "%s: dynamic setting of cap[%d] %s is not allowed\n", @@ -951,8 +948,12 @@ int msm_v4l2_op_s_ctrl(struct v4l2_ctrl *ctrl) } /* dynamic controls with request will be set along with qbuf */ - if (inst->request) + if (inst->request) { + i_vpr_l(inst, + "%s: request api enabled, dynamic ctrls to be set with qbuf\n", + __func__); return 0; + } /* Dynamic set control ASAP */ rc = msm_vidc_set_v4l2_properties(inst); @@ -1574,7 +1575,7 @@ int msm_vidc_adjust_layer_count(void *instance, struct v4l2_ctrl *ctrl) META_EVA_STATS, __func__)) return -EINVAL; - if (!inst->vb2q[OUTPUT_PORT].streaming) { + if (!inst->bufq[OUTPUT_PORT].vb2q->streaming) { rc = msm_vidc_adjust_static_layer_count_and_type(inst, client_layer_count); if (rc) @@ -1742,7 +1743,7 @@ int msm_vidc_adjust_bitrate(void *instance, struct v4l2_ctrl *ctrl) return 0; } - if (inst->vb2q[OUTPUT_PORT].streaming) + if (inst->bufq[OUTPUT_PORT].vb2q->streaming) return 0; if (msm_vidc_get_parent_value(inst, BIT_RATE, @@ -1821,7 +1822,7 @@ int msm_vidc_adjust_dynamic_layer_bitrate(void *instance, struct v4l2_ctrl *ctrl if (capability->cap[BIT_RATE].flags & CAP_FLAG_CLIENT_SET) return 0; - if (!inst->vb2q[OUTPUT_PORT].streaming) + if (!inst->bufq[OUTPUT_PORT].vb2q->streaming) return 0; /* @@ -2167,7 +2168,7 @@ int msm_vidc_adjust_cac(void *instance, struct v4l2_ctrl *ctrl) adjusted_value = ctrl ? ctrl->val : capability->cap[CONTENT_ADAPTIVE_CODING].value; - if (inst->vb2q[OUTPUT_PORT].streaming) + if (inst->bufq[OUTPUT_PORT].vb2q->streaming) return 0; if (msm_vidc_get_parent_value(inst, CONTENT_ADAPTIVE_CODING, @@ -2213,7 +2214,7 @@ int msm_vidc_adjust_bitrate_boost(void *instance, struct v4l2_ctrl *ctrl) adjusted_value = ctrl ? ctrl->val : capability->cap[BITRATE_BOOST].value; - if (inst->vb2q[OUTPUT_PORT].streaming) + if (inst->bufq[OUTPUT_PORT].vb2q->streaming) return 0; if (msm_vidc_get_parent_value(inst, BITRATE_BOOST, @@ -2267,7 +2268,7 @@ int msm_vidc_adjust_min_quality(void *instance, struct v4l2_ctrl *ctrl) * Therefore, below streaming check is required to avoid * runtime modification of MIN_QUALITY. */ - if (inst->vb2q[OUTPUT_PORT].streaming) + if (inst->bufq[OUTPUT_PORT].vb2q->streaming) return 0; if (msm_vidc_get_parent_value(inst, MIN_QUALITY, @@ -2886,7 +2887,7 @@ int msm_vidc_set_frame_qp(void *instance, BITRATE_MODE, &rc_type, __func__)) return -EINVAL; - if (inst->vb2q[OUTPUT_PORT].streaming) { + if (inst->bufq[OUTPUT_PORT].vb2q->streaming) { if (rc_type != HFI_RC_OFF) { i_vpr_h(inst, "%s: dynamic qp not allowed for rc type %d\n", @@ -3068,7 +3069,7 @@ int msm_vidc_set_layer_count_and_type(void *instance, return -EINVAL; } - if (!inst->vb2q[OUTPUT_PORT].streaming) { + if (!inst->bufq[OUTPUT_PORT].vb2q->streaming) { /* set layer type */ hfi_layer_type = inst->hfi_layer_type; cap_id = LAYER_TYPE; @@ -3112,7 +3113,7 @@ int msm_vidc_set_gop_size(void *instance, return -EINVAL; } - if (inst->vb2q[OUTPUT_PORT].streaming) { + if (inst->bufq[OUTPUT_PORT].vb2q->streaming) { if (inst->hfi_layer_type == HFI_HIER_B) { i_vpr_l(inst, "%s: HB dyn GOP setting is not supported\n", @@ -3155,7 +3156,7 @@ int msm_vidc_set_bitrate(void *instance, * In this case, client did not change bitrate, hence, no need to set * to fw. */ - if (inst->vb2q[OUTPUT_PORT].streaming) + if (inst->bufq[OUTPUT_PORT].vb2q->streaming) return 0; if (msm_vidc_get_parent_value(inst, BIT_RATE, @@ -3218,7 +3219,7 @@ int msm_vidc_set_dynamic_layer_bitrate(void *instance, return -EINVAL; } - if (!inst->vb2q[OUTPUT_PORT].streaming) + if (!inst->bufq[OUTPUT_PORT].vb2q->streaming) return 0; /* set Total Bitrate */ @@ -3311,7 +3312,7 @@ int msm_vidc_set_flip(void *instance, if (vflip) hfi_value |= HFI_VERTICAL_FLIP; - if (inst->vb2q[OUTPUT_PORT].streaming) { + if (inst->bufq[OUTPUT_PORT].vb2q->streaming) { if (hfi_value != HFI_DISABLE_FLIP) { rc = msm_vidc_set_req_sync_frame(inst, REQUEST_I_FRAME); diff --git a/driver/vidc/src/msm_vidc_debug.c b/driver/vidc/src/msm_vidc_debug.c index 3f476ab1ad..ac29f02821 100644 --- a/driver/vidc/src/msm_vidc_debug.c +++ b/driver/vidc/src/msm_vidc_debug.c @@ -487,7 +487,7 @@ static ssize_t inst_info_read(struct file *file, char __user *buf, "type: %s\n", i == INPUT_PORT ? "Output" : "Capture"); cur += write_str(cur, end - cur, "count: %u\n", - inst->vb2q[i].num_buffers); + inst->bufq[i].vb2q->num_buffers); for (j = 0; j < f->fmt.pix_mp.num_planes; j++) cur += write_str(cur, end - cur, diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 665e3558ac..2e70e4f4d2 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -1285,11 +1285,11 @@ bool msm_vidc_allow_s_ctrl(struct msm_vidc_inst *inst, u32 id) goto exit; } if (is_decode_session(inst)) { - if (!inst->vb2q[INPUT_PORT].streaming) { + if (!inst->bufq[INPUT_PORT].vb2q->streaming) { allow = true; goto exit; } - if (inst->vb2q[INPUT_PORT].streaming) { + if (inst->bufq[INPUT_PORT].vb2q->streaming) { switch (id) { case V4L2_CID_MPEG_VIDC_CODEC_CONFIG: case V4L2_CID_MPEG_VIDC_PRIORITY: @@ -1544,20 +1544,20 @@ enum msm_vidc_allow msm_vidc_allow_streamoff(struct msm_vidc_inst *inst, u32 typ return MSM_VIDC_DISALLOW; } if (type == INPUT_MPLANE) { - if (!inst->vb2q[INPUT_PORT].streaming) + if (!inst->bufq[INPUT_PORT].vb2q->streaming) allow = MSM_VIDC_IGNORE; } else if (type == INPUT_META_PLANE) { - if (inst->vb2q[INPUT_PORT].streaming) + if (inst->bufq[INPUT_PORT].vb2q->streaming) allow = MSM_VIDC_DISALLOW; - else if (!inst->vb2q[INPUT_META_PORT].streaming) + else if (!inst->bufq[INPUT_META_PORT].vb2q->streaming) allow = MSM_VIDC_IGNORE; } else if (type == OUTPUT_MPLANE) { - if (!inst->vb2q[OUTPUT_PORT].streaming) + if (!inst->bufq[OUTPUT_PORT].vb2q->streaming) allow = MSM_VIDC_IGNORE; } else if (type == OUTPUT_META_PLANE) { - if (inst->vb2q[OUTPUT_PORT].streaming) + if (inst->bufq[OUTPUT_PORT].vb2q->streaming) allow = MSM_VIDC_DISALLOW; - else if (!inst->vb2q[OUTPUT_META_PORT].streaming) + else if (!inst->bufq[OUTPUT_META_PORT].vb2q->streaming) allow = MSM_VIDC_IGNORE; } if (allow != MSM_VIDC_ALLOW) @@ -1582,7 +1582,7 @@ enum msm_vidc_allow msm_vidc_allow_qbuf(struct msm_vidc_inst *inst, u32 type) return MSM_VIDC_DISALLOW; /* defer queuing if streamon not completed */ - if (!inst->vb2q[port].streaming) + if (!inst->bufq[port].vb2q->streaming) return MSM_VIDC_DEFER; if (type == INPUT_META_PLANE || type == OUTPUT_META_PLANE) @@ -3641,7 +3641,7 @@ int msm_vidc_vb2_buffer_done(struct msm_vidc_inst *inst, if (port < 0) return -EINVAL; - q = &inst->vb2q[port]; + q = inst->bufq[port].vb2q; if (!q->streaming) { i_vpr_e(inst, "%s: port %d is not streaming\n", __func__, port); @@ -3675,6 +3675,7 @@ int msm_vidc_vb2_buffer_done(struct msm_vidc_inst *inst, vbuf->flags = buf->flags; vb2->timestamp = buf->timestamp; vb2->planes[0].bytesused = buf->data_size + vb2->planes[0].data_offset; + v4l2_ctrl_request_complete(vb2->req_obj.req, &inst->ctrl_handler); vb2_buffer_done(vb2, state); return 0; @@ -3754,45 +3755,112 @@ static int vb2q_init(struct msm_vidc_inst *inst, return rc; } +static int m2m_queue_init(void *priv, struct vb2_queue *src_vq, + struct vb2_queue *dst_vq) +{ + int rc = 0; + struct msm_vidc_inst *inst = priv; + struct msm_vidc_core *core; + + if (!inst || !inst->core || !src_vq || !dst_vq) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + core = inst->core; + + src_vq->supports_requests = 1; + src_vq->lock = &inst->request_lock; + src_vq->dev = &core->pdev->dev; + rc = vb2q_init(inst, src_vq, INPUT_MPLANE); + if (rc) + goto fail_input_vb2q_init; + inst->bufq[INPUT_PORT].vb2q = src_vq; + + dst_vq->lock = src_vq->lock; + dst_vq->dev = &core->pdev->dev; + rc = vb2q_init(inst, dst_vq, OUTPUT_MPLANE); + if (rc) + goto fail_out_vb2q_init; + inst->bufq[OUTPUT_PORT].vb2q = dst_vq; + return rc; + +fail_out_vb2q_init: + vb2_queue_release(inst->bufq[INPUT_PORT].vb2q); +fail_input_vb2q_init: + return rc; +} + int msm_vidc_vb2_queue_init(struct msm_vidc_inst *inst) { int rc = 0; + struct msm_vidc_core *core; - if (!inst) { - i_vpr_e(inst, "%s: invalid params\n", __func__); + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } + core = inst->core; if (inst->vb2q_init) { i_vpr_h(inst, "%s: vb2q already inited\n", __func__); return 0; } - rc = vb2q_init(inst, &inst->vb2q[INPUT_PORT], INPUT_MPLANE); - if (rc) - goto exit; + inst->m2m_dev = v4l2_m2m_init(core->v4l2_m2m_ops); + if (IS_ERR(inst->m2m_dev)) { + i_vpr_e(inst, "%s: failed to initialize v4l2 m2m device\n", __func__); + rc = PTR_ERR(inst->m2m_dev); + goto fail_m2m_init; + } - rc = vb2q_init(inst, &inst->vb2q[OUTPUT_PORT], OUTPUT_MPLANE); - if (rc) - goto fail_out_vb2q_init; + /* v4l2_m2m_ctx_init will do input & output queues initialization */ + inst->m2m_ctx = v4l2_m2m_ctx_init(inst->m2m_dev, inst, m2m_queue_init); + if (!inst->m2m_ctx) { + i_vpr_e(inst, "%s: v4l2_m2m_ctx_init failed\n", __func__); + goto fail_m2m_ctx_init; + } + inst->event_handler.m2m_ctx = inst->m2m_ctx; - rc = vb2q_init(inst, &inst->vb2q[INPUT_META_PORT], INPUT_META_PLANE); + inst->bufq[INPUT_META_PORT].vb2q = kzalloc(sizeof(struct vb2_queue), GFP_KERNEL); + if (!inst->bufq[INPUT_META_PORT].vb2q) { + i_vpr_e(inst, "%s: queue allocation failed for input meta port\n", __func__); + goto fail_in_meta_alloc; + } + + /* do input meta port queues initialization */ + rc = vb2q_init(inst, inst->bufq[INPUT_META_PORT].vb2q, INPUT_META_PLANE); if (rc) goto fail_in_meta_vb2q_init; - rc = vb2q_init(inst, &inst->vb2q[OUTPUT_META_PORT], OUTPUT_META_PLANE); + inst->bufq[OUTPUT_META_PORT].vb2q = kzalloc(sizeof(struct vb2_queue), GFP_KERNEL); + if (!inst->bufq[OUTPUT_META_PORT].vb2q) { + i_vpr_e(inst, "%s: queue allocation failed for output meta port\n", __func__); + goto fail_out_meta_alloc; + } + + /* do output meta port queues initialization */ + rc = vb2q_init(inst, inst->bufq[OUTPUT_META_PORT].vb2q, OUTPUT_META_PLANE); if (rc) goto fail_out_meta_vb2q_init; inst->vb2q_init = true; return 0; + fail_out_meta_vb2q_init: - vb2_queue_release(&inst->vb2q[INPUT_META_PORT]); + kfree(inst->bufq[OUTPUT_META_PORT].vb2q); + inst->bufq[OUTPUT_META_PORT].vb2q = NULL; +fail_out_meta_alloc: + vb2_queue_release(inst->bufq[INPUT_META_PORT].vb2q); fail_in_meta_vb2q_init: - vb2_queue_release(&inst->vb2q[OUTPUT_PORT]); -fail_out_vb2q_init: - vb2_queue_release(&inst->vb2q[INPUT_PORT]); -exit: + kfree(inst->bufq[INPUT_META_PORT].vb2q); + inst->bufq[INPUT_META_PORT].vb2q = NULL; +fail_in_meta_alloc: + v4l2_m2m_ctx_release(inst->m2m_ctx); + inst->bufq[OUTPUT_PORT].vb2q = NULL; + inst->bufq[INPUT_PORT].vb2q = NULL; +fail_m2m_ctx_init: + v4l2_m2m_release(inst->m2m_dev); +fail_m2m_init: return rc; } @@ -3809,10 +3877,20 @@ int msm_vidc_vb2_queue_deinit(struct msm_vidc_inst *inst) return 0; } - vb2_queue_release(&inst->vb2q[OUTPUT_META_PORT]); - vb2_queue_release(&inst->vb2q[INPUT_META_PORT]); - vb2_queue_release(&inst->vb2q[OUTPUT_PORT]); - vb2_queue_release(&inst->vb2q[INPUT_PORT]); + vb2_queue_release(inst->bufq[OUTPUT_META_PORT].vb2q); + kfree(inst->bufq[OUTPUT_META_PORT].vb2q); + inst->bufq[OUTPUT_META_PORT].vb2q = NULL; + vb2_queue_release(inst->bufq[INPUT_META_PORT].vb2q); + kfree(inst->bufq[INPUT_META_PORT].vb2q); + inst->bufq[INPUT_META_PORT].vb2q = NULL; + /* + * vb2_queue_release() for input and output queues + * is called from v4l2_m2m_ctx_release() + */ + v4l2_m2m_ctx_release(inst->m2m_ctx); + inst->bufq[OUTPUT_PORT].vb2q = NULL; + inst->bufq[INPUT_PORT].vb2q = NULL; + v4l2_m2m_release(inst->m2m_dev); inst->vb2q_init = false; return rc; @@ -5169,6 +5247,8 @@ static void msm_vidc_close_helper(struct kref *kref) if (inst->response_workq) destroy_workqueue(inst->response_workq); msm_vidc_remove_dangling_session(inst); + mutex_destroy(&inst->request_lock); + mutex_destroy(&inst->lock); kfree(inst->capabilities); kfree(inst); } @@ -5371,7 +5451,7 @@ int msm_vidc_update_buffer_count(struct msm_vidc_inst *inst, u32 port) inst->buffers.input.actual_count); break; case OUTPUT_PORT: - if (!inst->vb2q[INPUT_PORT].streaming) + if (!inst->bufq[INPUT_PORT].vb2q->streaming) inst->buffers.output.min_count = call_session_op(core, min_count, inst, MSM_VIDC_BUF_OUTPUT); inst->buffers.output.extra_count = call_session_op(core, diff --git a/driver/vidc/src/msm_vidc_platform.c b/driver/vidc/src/msm_vidc_platform.c index 8fb06d0793..a8757629cc 100644 --- a/driver/vidc/src/msm_vidc_platform.c +++ b/driver/vidc/src/msm_vidc_platform.c @@ -120,6 +120,8 @@ static struct vb2_ops msm_vb2_ops = { .buf_queue = msm_vidc_buf_queue, .buf_cleanup = msm_vidc_buf_cleanup, .stop_streaming = msm_vidc_stop_streaming, + .buf_out_validate = msm_vidc_buf_out_validate, + .buf_request_complete = msm_vidc_buf_request_complete, }; static struct vb2_mem_ops msm_vb2_mem_ops = { @@ -131,6 +133,16 @@ static struct vb2_mem_ops msm_vb2_mem_ops = { .unmap_dmabuf = msm_vb2_unmap_dmabuf, }; +static struct media_device_ops msm_v4l2_media_ops = { + .req_validate = msm_v4l2_request_validate, + .req_queue = msm_v4l2_request_queue, +}; + +static struct v4l2_m2m_ops msm_v4l2_m2m_ops = { + .device_run = msm_v4l2_m2m_device_run, + .job_abort = msm_v4l2_m2m_job_abort, +}; + static int msm_vidc_init_ops(struct msm_vidc_core *core) { if (!core) { @@ -145,6 +157,8 @@ static int msm_vidc_init_ops(struct msm_vidc_core *core) core->v4l2_ctrl_ops = &msm_v4l2_ctrl_ops; core->vb2_ops = &msm_vb2_ops; core->vb2_mem_ops = &msm_vb2_mem_ops; + core->media_device_ops = &msm_v4l2_media_ops; + core->v4l2_m2m_ops = &msm_v4l2_m2m_ops; return 0; } diff --git a/driver/vidc/src/msm_vidc_probe.c b/driver/vidc/src/msm_vidc_probe.c index 2a7485a679..945cb0648b 100644 --- a/driver/vidc/src/msm_vidc_probe.c +++ b/driver/vidc/src/msm_vidc_probe.c @@ -142,6 +142,11 @@ static void msm_vidc_unregister_video_device(struct msm_vidc_core *core, else return; + +#ifdef CONFIG_MEDIA_CONTROLLER + v4l2_m2m_unregister_media_controller(core->vdev[index].m2m_dev); + v4l2_m2m_release(core->vdev[index].m2m_dev); +#endif //rc = device_create_file(&core->vdev[index].vdev.dev, &dev_attr_link_name); video_set_drvdata(&core->vdev[index].vdev, NULL); video_unregister_device(&core->vdev[index].vdev); @@ -152,16 +157,19 @@ static int msm_vidc_register_video_device(struct msm_vidc_core *core, enum msm_vidc_domain_type type, int nr) { int rc = 0; - int index; + int index, media_index; d_vpr_h("%s()\n", __func__); - if (type == MSM_VIDC_DECODER) + if (type == MSM_VIDC_DECODER) { index = 0; - else if (type == MSM_VIDC_ENCODER) + media_index = MEDIA_ENT_F_PROC_VIDEO_DECODER; + } else if (type == MSM_VIDC_ENCODER) { index = 1; - else + media_index = MEDIA_ENT_F_PROC_VIDEO_ENCODER; + } else { return -EINVAL; + } core->vdev[index].vdev.release = msm_vidc_release_video_device; @@ -189,11 +197,34 @@ static int msm_vidc_register_video_device(struct msm_vidc_core *core, //rc = device_create_file(&core->vdev[index].vdev.dev, &dev_attr_link_name); if (rc) { d_vpr_e("Failed to create video device file\n"); - video_unregister_device(&core->vdev[index].vdev); - return rc; + goto video_reg_failed; } +#ifdef CONFIG_MEDIA_CONTROLLER + core->vdev[index].m2m_dev = v4l2_m2m_init(core->v4l2_m2m_ops); + if (IS_ERR(core->vdev[index].m2m_dev)) { + d_vpr_e("Failed to initialize V4L2 M2M device\n"); + rc = PTR_ERR(core->vdev[index].m2m_dev); + goto m2m_init_failed; + } + rc = v4l2_m2m_register_media_controller(core->vdev[index].m2m_dev, + &core->vdev[index].vdev, media_index); + if (rc) { + d_vpr_e("%s: m2m_dev controller register failed for session type %d\n", + __func__, index); + goto m2m_mc_failed; + } +#endif return 0; +#ifdef CONFIG_MEDIA_CONTROLLER +m2m_mc_failed: + v4l2_m2m_release(core->vdev[index].m2m_dev); +m2m_init_failed: +#endif +video_reg_failed: + video_unregister_device(&core->vdev[index].vdev); + + return rc; } static int msm_vidc_check_mmrm_support(struct msm_vidc_core *core) @@ -333,12 +364,18 @@ static int msm_vidc_remove(struct platform_device* pdev) msm_vidc_core_deinit(core, true); of_platform_depopulate(&pdev->dev); +#ifdef CONFIG_MEDIA_CONTROLLER + media_device_unregister(&core->media_dev); +#endif msm_vidc_unregister_video_device(core, MSM_VIDC_ENCODER); msm_vidc_unregister_video_device(core, MSM_VIDC_DECODER); //device_remove_file(&core->vdev[MSM_VIDC_ENCODER].vdev.dev, //&dev_attr_link_name); //device_remove_file(&core->vdev[MSM_VIDC_DECODER].vdev.dev, //&dev_attr_link_name); +#ifdef CONFIG_MEDIA_CONTROLLER + media_device_cleanup(&core->media_dev); +#endif v4l2_device_unregister(&core->v4l2_dev); sysfs_remove_group(&pdev->dev.kobj, &msm_vidc_core_attr_group); @@ -428,6 +465,14 @@ static int msm_vidc_probe_video_device(struct platform_device *pdev) goto v4l2_reg_failed; } +#ifdef CONFIG_MEDIA_CONTROLLER + core->media_dev.dev = &core->pdev->dev; + strscpy(core->media_dev.model, "msm_vidc_media", sizeof(core->media_dev.model)); + media_device_init(&core->media_dev); + core->media_dev.ops = core->media_device_ops; + core->v4l2_dev.mdev = &core->media_dev; +#endif + /* setup the decoder device */ rc = msm_vidc_register_video_device(core, MSM_VIDC_DECODER, nr); if (rc) { @@ -441,7 +486,13 @@ static int msm_vidc_probe_video_device(struct platform_device *pdev) d_vpr_e("Failed to register video encoder\n"); goto enc_reg_failed; } - +#ifdef CONFIG_MEDIA_CONTROLLER + rc = media_device_register(&core->media_dev); + if (rc) { + d_vpr_e("%s: media_device_register failed with %d\n", __func__, rc); + goto media_reg_failed; + } +#endif rc = msm_vidc_check_mmrm_support(core); if (rc) { d_vpr_e("Failed to check MMRM scaling support\n"); @@ -477,6 +528,10 @@ static int msm_vidc_probe_video_device(struct platform_device *pdev) core_init_failed: of_platform_depopulate(&pdev->dev); sub_dev_failed: +#ifdef CONFIG_MEDIA_CONTROLLER + media_device_unregister(&core->media_dev); +media_reg_failed: +#endif msm_vidc_unregister_video_device(core, MSM_VIDC_ENCODER); enc_reg_failed: msm_vidc_unregister_video_device(core, MSM_VIDC_DECODER); diff --git a/driver/vidc/src/msm_vidc_v4l2.c b/driver/vidc/src/msm_vidc_v4l2.c index 8ba23827f0..7dbbf744d4 100644 --- a/driver/vidc/src/msm_vidc_v4l2.c +++ b/driver/vidc/src/msm_vidc_v4l2.c @@ -696,3 +696,30 @@ unlock: return rc; } + +int msm_v4l2_request_validate(struct media_request *req) +{ + return vb2_request_validate(req); +} + +void msm_v4l2_request_queue(struct media_request *req) +{ + v4l2_m2m_request_queue(req); +} + +void msm_v4l2_m2m_device_run(void *priv) +{ + d_vpr_l("%s: \n", __func__); +} + +void msm_v4l2_m2m_job_abort(void *priv) +{ + struct msm_vidc_inst *inst = priv; + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return; + } + i_vpr_h(inst, "%s: m2m job aborted\n", __func__); + v4l2_m2m_job_finish(inst->m2m_dev, inst->m2m_ctx); +} \ No newline at end of file diff --git a/driver/vidc/src/msm_vidc_vb2.c b/driver/vidc/src/msm_vidc_vb2.c index 4cfd2f9816..d05bdeb9af 100644 --- a/driver/vidc/src/msm_vidc_vb2.c +++ b/driver/vidc/src/msm_vidc_vb2.c @@ -24,13 +24,13 @@ struct vb2_queue *msm_vidc_get_vb2q(struct msm_vidc_inst *inst, return NULL; } if (type == INPUT_MPLANE) { - q = &inst->vb2q[INPUT_PORT]; + q = inst->bufq[INPUT_PORT].vb2q; } else if (type == OUTPUT_MPLANE) { - q = &inst->vb2q[OUTPUT_PORT]; + q = inst->bufq[OUTPUT_PORT].vb2q; } else if (type == INPUT_META_PLANE) { - q = &inst->vb2q[INPUT_META_PORT]; + q = inst->bufq[INPUT_META_PORT].vb2q; } else if (type == OUTPUT_META_PLANE) { - q = &inst->vb2q[OUTPUT_META_PORT]; + q = inst->bufq[OUTPUT_META_PORT].vb2q; } else { i_vpr_e(inst, "%s: invalid buffer type %d\n", __func__, type); @@ -263,8 +263,8 @@ int msm_vidc_start_streaming(struct vb2_queue *q, unsigned int count) if (rc) goto error; - if ((q->type == INPUT_MPLANE && inst->vb2q[OUTPUT_PORT].streaming) || - (q->type == OUTPUT_MPLANE && inst->vb2q[INPUT_PORT].streaming)) { + if ((q->type == INPUT_MPLANE && inst->bufq[OUTPUT_PORT].vb2q->streaming) || + (q->type == OUTPUT_MPLANE && inst->bufq[INPUT_PORT].vb2q->streaming)) { rc = msm_vidc_get_properties(inst); if (rc) goto error; @@ -345,6 +345,28 @@ void msm_vidc_buf_queue(struct vb2_buffer *vb2) return; } + /* + * As part of every qbuf initalise request to true. + * If there are any dynamic controls associated with qbuf, + * they will set as part s_ctrl() from v4l2_ctrl_request_setup(). + * Once v4l2_ctrl_request_setup() is done, reset request variable. + * If the buffer does not have any requests with it, then + * v4l2_ctrl_request_setup() will return 0. + */ + inst->request = true; + rc = v4l2_ctrl_request_setup(vb2->req_obj.req, + &inst->ctrl_handler); + if (rc) { + inst->request = false; + i_vpr_e(inst, "%s: request setup failed, error %d\n", + __func__, rc); + msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); + v4l2_ctrl_request_complete(vb2->req_obj.req, &inst->ctrl_handler); + vb2_buffer_done(vb2, VB2_BUF_STATE_ERROR); + return; + } + inst->request = false; + if (is_decode_session(inst)) rc = msm_vdec_qbuf(inst, vb2); else if (is_encode_session(inst)) @@ -355,6 +377,7 @@ void msm_vidc_buf_queue(struct vb2_buffer *vb2) if (rc) { print_vb2_buffer("failed vb2-qbuf", inst, vb2); msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); + v4l2_ctrl_request_complete(vb2->req_obj.req, &inst->ctrl_handler); vb2_buffer_done(vb2, VB2_BUF_STATE_ERROR); } } @@ -362,3 +385,20 @@ void msm_vidc_buf_queue(struct vb2_buffer *vb2) void msm_vidc_buf_cleanup(struct vb2_buffer *vb) { } + +int msm_vidc_buf_out_validate(struct vb2_buffer *vb) +{ + struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); + + vbuf->field = V4L2_FIELD_NONE; + return 0; +} + +void msm_vidc_buf_request_complete(struct vb2_buffer *vb) +{ + struct msm_vidc_inst *inst = vb2_get_drv_priv(vb->vb2_queue); + + i_vpr_l(inst, "%s: vb type %d, index %d\n", + __func__, vb->type, vb->index); + v4l2_ctrl_request_complete(vb->req_obj.req, &inst->ctrl_handler); +} From ea681bed4da912404894343595c5826330979c06 Mon Sep 17 00:00:00 2001 From: Dikshita Agarwal Date: Mon, 20 Dec 2021 16:21:17 +0530 Subject: [PATCH 0518/1061] video: driver: fix subscribe event handling Invoke correct APIs to handle different types of events. Fixes: v4l2-compliance: test VIDIOC_(UN)SUBSCRIBE_EVENT/DQEVENT. Change-Id: I442fae3111d65a9612c73f2d16f9ed8031c77ec0 Signed-off-by: Dikshita Agarwal --- driver/vidc/inc/msm_vdec.h | 2 ++ driver/vidc/inc/msm_venc.h | 2 ++ driver/vidc/inc/msm_vidc_core.h | 2 ++ driver/vidc/src/msm_vdec.c | 31 +++++++++++++++++++++++++++++++ driver/vidc/src/msm_venc.c | 28 ++++++++++++++++++++++++++++ driver/vidc/src/msm_vidc.c | 16 ++++++++-------- 6 files changed, 73 insertions(+), 8 deletions(-) diff --git a/driver/vidc/inc/msm_vdec.h b/driver/vidc/inc/msm_vdec.h index dc538907a4..38983b09b9 100644 --- a/driver/vidc/inc/msm_vdec.h +++ b/driver/vidc/inc/msm_vdec.h @@ -23,6 +23,8 @@ int msm_vdec_s_param(struct msm_vidc_inst *inst, struct v4l2_streamparm *s_parm); int msm_vdec_g_param(struct msm_vidc_inst *inst, struct v4l2_streamparm *s_parm); +int msm_vdec_subscribe_event(struct msm_vidc_inst *inst, + const struct v4l2_event_subscription *sub); int msm_vdec_enum_fmt(struct msm_vidc_inst *inst, struct v4l2_fmtdesc *f); int msm_vdec_inst_init(struct msm_vidc_inst *inst); int msm_vdec_inst_deinit(struct msm_vidc_inst *inst); diff --git a/driver/vidc/inc/msm_venc.h b/driver/vidc/inc/msm_venc.h index f259ff7a7b..b1519f6a82 100644 --- a/driver/vidc/inc/msm_venc.h +++ b/driver/vidc/inc/msm_venc.h @@ -25,6 +25,8 @@ int msm_venc_s_param(struct msm_vidc_inst *inst, struct v4l2_streamparm *s_parm); int msm_venc_g_param(struct msm_vidc_inst *inst, struct v4l2_streamparm *s_parm); +int msm_venc_subscribe_event(struct msm_vidc_inst *inst, + const struct v4l2_event_subscription *sub); int msm_venc_enum_fmt(struct msm_vidc_inst *inst, struct v4l2_fmtdesc *f); int msm_venc_inst_init(struct msm_vidc_inst *inst); int msm_venc_inst_deinit(struct msm_vidc_inst *inst); diff --git a/driver/vidc/inc/msm_vidc_core.h b/driver/vidc/inc/msm_vidc_core.h index 77a5f463d9..6914c2c386 100644 --- a/driver/vidc/inc/msm_vidc_core.h +++ b/driver/vidc/inc/msm_vidc_core.h @@ -12,6 +12,8 @@ struct msm_vidc_core; +#define MAX_EVENTS 30 + #define call_venus_op(d, op, ...) \ (((d) && (d)->venus_ops && (d)->venus_ops->op) ? \ ((d)->venus_ops->op(__VA_ARGS__)):0) diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 5e0b1a5ac8..efe5949c9a 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -2827,6 +2827,37 @@ int msm_vdec_g_param(struct msm_vidc_inst *inst, return 0; } +int msm_vdec_subscribe_event(struct msm_vidc_inst *inst, + const struct v4l2_event_subscription *sub) +{ + int rc = 0; + + if (!inst || !sub) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + switch (sub->type) { + case V4L2_EVENT_EOS: + rc = v4l2_event_subscribe(&inst->event_handler, sub, MAX_EVENTS, NULL); + break; + case V4L2_EVENT_SOURCE_CHANGE: + rc = v4l2_src_change_event_subscribe(&inst->event_handler, sub); + break; + case V4L2_EVENT_CTRL: + rc = v4l2_ctrl_subscribe_event(&inst->event_handler, sub); + break; + default: + i_vpr_e(inst, "%s: invalid type %d id %d\n", __func__, sub->type, sub->id); + return -EINVAL; + } + + if (rc) + i_vpr_e(inst, "%s: failed, type %d id %d\n", + __func__, sub->type, sub->id); + return rc; +} + static int msm_vdec_check_colorformat_supported(struct msm_vidc_inst* inst, enum msm_vidc_colorformat_type colorformat) { diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index b959be39cf..bf0222c4a5 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -1707,6 +1707,34 @@ int msm_venc_g_param(struct msm_vidc_inst *inst, return 0; } +int msm_venc_subscribe_event(struct msm_vidc_inst *inst, + const struct v4l2_event_subscription *sub) +{ + int rc = 0; + + if (!inst || !sub) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + switch (sub->type) { + case V4L2_EVENT_EOS: + rc = v4l2_event_subscribe(&inst->event_handler, sub, MAX_EVENTS, NULL); + break; + case V4L2_EVENT_CTRL: + rc = v4l2_ctrl_subscribe_event(&inst->event_handler, sub); + break; + default: + i_vpr_e(inst, "%s: invalid type %d id %d\n", __func__, sub->type, sub->id); + return -EINVAL; + } + + if (rc) + i_vpr_e(inst, "%s: failed, type %d id %d\n", + __func__, sub->type, sub->id); + return rc; +} + int msm_venc_enum_fmt(struct msm_vidc_inst *inst, struct v4l2_fmtdesc *f) { int rc = 0; diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index 8b955a407a..da5f4e8360 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -26,8 +26,6 @@ /* kernel/msm-4.19 */ #define MSM_VIDC_VERSION ((5 << 16) + (10 << 8) + 0) -#define MAX_EVENTS 30 - static inline bool valid_v4l2_buffer(struct v4l2_buffer *b, struct msm_vidc_inst *inst) { @@ -742,12 +740,14 @@ int msm_vidc_subscribe_event(void *instance, d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } + i_vpr_h(inst, "%s: type %d id %d\n", __func__, sub->type, sub->id); - rc = v4l2_event_subscribe(&inst->event_handler, - sub, MAX_EVENTS, NULL); - if (rc) - i_vpr_e(inst, "%s: fialed, type %d id %d\n", - __func__, sub->type, sub->id); + + if (inst->domain == MSM_VIDC_DECODER) + rc = msm_vdec_subscribe_event(inst, sub); + if (inst->domain == MSM_VIDC_ENCODER) + rc = msm_venc_subscribe_event(inst, sub); + return rc; } EXPORT_SYMBOL(msm_vidc_subscribe_event); @@ -765,7 +765,7 @@ int msm_vidc_unsubscribe_event(void *instance, i_vpr_h(inst, "%s: type %d id %d\n", __func__, sub->type, sub->id); rc = v4l2_event_unsubscribe(&inst->event_handler, sub); if (rc) - i_vpr_e(inst, "%s: fialed, type %d id %d\n", + i_vpr_e(inst, "%s: failed, type %d id %d\n", __func__, sub->type, sub->id); return rc; } From dce0ce7996462c576d8241b12f7ea6d69a279dcb Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Fri, 14 Jan 2022 12:12:21 -0800 Subject: [PATCH 0519/1061] video: driver: add input metadata fd control Added an extension to allow client to send input metadata buffer fd via request api. Change-Id: I8e05e53512b3f5dd31fa16ea64ee5d97ef2de7b4 Signed-off-by: Darshana Patil --- driver/platform/kalama/src/msm_vidc_kalama.c | 8 ++++++++ driver/vidc/inc/msm_vidc_internal.h | 1 + driver/vidc/src/msm_vidc_driver.c | 2 ++ include/uapi/vidc/media/v4l2_vidc_extensions.h | 4 ++++ 4 files changed, 15 insertions(+) diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index de7026afc0..647c4d1c0f 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -1506,6 +1506,14 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { {LTR_COUNT, IR_RANDOM, SLICE_MODE}, msm_vidc_adjust_all_intra, NULL}, + {INPUT_METADATA_FD, ENC|DEC, CODECS_ALL, + -1, INT_MAX, 1, -1, + V4L2_CID_MPEG_VIDC_INPUT_METADATA_FD, + 0, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + NULL, NULL}, + {META_LTR_MARK_USE, ENC, H264|HEVC, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 7ae860fe65..b357ff2a98 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -459,6 +459,7 @@ enum msm_vidc_inst_capability_type { FILM_GRAIN, SUPER_BLOCK, ALL_INTRA, + INPUT_METADATA_FD, META_BITSTREAM_RESOLUTION, META_CROP_OFFSETS, META_LTR_MARK_USE, diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 2e70e4f4d2..e55540f429 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -176,6 +176,7 @@ static const struct msm_vidc_cap_name cap_name_arr[] = { {FILM_GRAIN, "FILM_GRAIN" }, {SUPER_BLOCK, "SUPER_BLOCK" }, {ALL_INTRA, "ALL_INTRA" }, + {INPUT_METADATA_FD, "INPUT_METADATA_FD" }, {META_BITSTREAM_RESOLUTION, "META_BITSTREAM_RESOLUTION" }, {META_CROP_OFFSETS, "META_CROP_OFFSETS" }, {META_LTR_MARK_USE, "META_LTR_MARK_USE" }, @@ -1337,6 +1338,7 @@ bool msm_vidc_allow_s_ctrl(struct msm_vidc_inst *inst, u32 id) case V4L2_CID_MPEG_VIDC_ENC_INPUT_COMPRESSION_RATIO: case V4L2_CID_MPEG_VIDEO_BITRATE_PEAK: case V4L2_CID_MPEG_VIDC_PRIORITY: + case V4L2_CID_MPEG_VIDC_INPUT_METADATA_FD: allow = true; break; default: diff --git a/include/uapi/vidc/media/v4l2_vidc_extensions.h b/include/uapi/vidc/media/v4l2_vidc_extensions.h index 1b27358660..540ef12684 100644 --- a/include/uapi/vidc/media/v4l2_vidc_extensions.h +++ b/include/uapi/vidc/media/v4l2_vidc_extensions.h @@ -194,7 +194,11 @@ enum v4l2_mpeg_video_av1_tier { /* AV1 Decoder Film Grain */ #define V4L2_CID_MPEG_VIDC_AV1D_FILM_GRAIN_PRESENT \ (V4L2_CID_MPEG_VIDC_BASE + 0x35) +/* Control to set input metadata buffer fd */ +#define V4L2_CID_MPEG_VIDC_INPUT_METADATA_FD \ + (V4L2_CID_MPEG_VIDC_BASE + 0x36) +/* add new controls above this line */ /* Deprecate below controls once availble in gki and gsi bionic header */ #ifndef V4L2_CID_MPEG_VIDEO_BASELAYER_PRIORITY_ID #define V4L2_CID_MPEG_VIDEO_BASELAYER_PRIORITY_ID \ From bf0e8166d8bceae36daa6fd72beb48e30eea710d Mon Sep 17 00:00:00 2001 From: Dikshita Agarwal Date: Fri, 28 Jan 2022 11:52:04 +0530 Subject: [PATCH 0520/1061] video: driver: add support for query buf Add handling for VIDIOC_QUERYBUF ioctl in driver. This can be used to query the status of a buffer at any time after buffers have been allocated with the VIDIOC_REQBUFS ioctl. Partially Fixes: v4l2-compliance: test VIDIOC_REQBUFS/CREATE_BUFS/QUERYBUF. Change-Id: Ifd014bd8a8b02ce9fa15c62d7583bc8bcfb6756a Signed-off-by: Dikshita Agarwal --- driver/vidc/inc/msm_vidc.h | 1 + driver/vidc/inc/msm_vidc_v4l2.h | 2 ++ driver/vidc/src/msm_vidc.c | 29 +++++++++++++++++++++++++++++ driver/vidc/src/msm_vidc_platform.c | 2 ++ driver/vidc/src/msm_vidc_v4l2.c | 24 ++++++++++++++++++++++++ 5 files changed, 58 insertions(+) diff --git a/driver/vidc/inc/msm_vidc.h b/driver/vidc/inc/msm_vidc.h index 28202fc002..97b3498979 100644 --- a/driver/vidc/inc/msm_vidc.h +++ b/driver/vidc/inc/msm_vidc.h @@ -26,6 +26,7 @@ int msm_vidc_g_selection(void* instance, struct v4l2_selection* s); int msm_vidc_s_param(void *instance, struct v4l2_streamparm *sp); int msm_vidc_g_param(void *instance, struct v4l2_streamparm *sp); int msm_vidc_reqbufs(void *instance, struct v4l2_requestbuffers *b); +int msm_vidc_querybuf(void *instance, struct v4l2_buffer *b); int msm_vidc_release_buffer(void *instance, int buffer_type, unsigned int buffer_index); int msm_vidc_qbuf(void *instance, struct media_device *mdev, diff --git a/driver/vidc/inc/msm_vidc_v4l2.h b/driver/vidc/inc/msm_vidc_v4l2.h index d04badf32a..c815c97862 100644 --- a/driver/vidc/inc/msm_vidc_v4l2.h +++ b/driver/vidc/inc/msm_vidc_v4l2.h @@ -34,6 +34,8 @@ int msm_v4l2_g_parm(struct file *file, void *fh, struct v4l2_streamparm *a); int msm_v4l2_reqbufs(struct file *file, void *fh, struct v4l2_requestbuffers *b); +int msm_v4l2_querybuf(struct file *file, void *fh, + struct v4l2_buffer *b); int msm_v4l2_qbuf(struct file *file, void *fh, struct v4l2_buffer *b); int msm_v4l2_dqbuf(struct file *file, void *fh, diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index 6c80d5963a..c680cab387 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -412,6 +412,35 @@ exit: } EXPORT_SYMBOL(msm_vidc_reqbufs); +int msm_vidc_querybuf(void *instance, struct v4l2_buffer *b) +{ + int rc = 0; + struct msm_vidc_inst *inst = instance; + int port; + + if (!inst || !b) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + port = v4l2_type_to_driver_port(inst, b->type, __func__); + if (port < 0) { + rc = -EINVAL; + goto exit; + } + + rc = vb2_querybuf(inst->bufq[port].vb2q, b); + if (rc) { + i_vpr_e(inst, "%s: vb2_querybuf(%d) failed, %d\n", + __func__, b->type, rc); + goto exit; + } + +exit: + return rc; +} +EXPORT_SYMBOL(msm_vidc_querybuf); + int msm_vidc_qbuf(void *instance, struct media_device *mdev, struct v4l2_buffer *b) { diff --git a/driver/vidc/src/msm_vidc_platform.c b/driver/vidc/src/msm_vidc_platform.c index a8757629cc..c359ab1923 100644 --- a/driver/vidc/src/msm_vidc_platform.c +++ b/driver/vidc/src/msm_vidc_platform.c @@ -60,6 +60,7 @@ static struct v4l2_ioctl_ops msm_v4l2_ioctl_ops_enc = { .vidioc_s_parm = msm_v4l2_s_parm, .vidioc_g_parm = msm_v4l2_g_parm, .vidioc_reqbufs = msm_v4l2_reqbufs, + .vidioc_querybuf = msm_v4l2_querybuf, .vidioc_qbuf = msm_v4l2_qbuf, .vidioc_dqbuf = msm_v4l2_dqbuf, .vidioc_streamon = msm_v4l2_streamon, @@ -97,6 +98,7 @@ static struct v4l2_ioctl_ops msm_v4l2_ioctl_ops_dec = { .vidioc_s_parm = msm_v4l2_s_parm, .vidioc_g_parm = msm_v4l2_g_parm, .vidioc_reqbufs = msm_v4l2_reqbufs, + .vidioc_querybuf = msm_v4l2_querybuf, .vidioc_qbuf = msm_v4l2_qbuf, .vidioc_dqbuf = msm_v4l2_dqbuf, .vidioc_streamon = msm_v4l2_streamon, diff --git a/driver/vidc/src/msm_vidc_v4l2.c b/driver/vidc/src/msm_vidc_v4l2.c index 7dbbf744d4..7f4877655a 100644 --- a/driver/vidc/src/msm_vidc_v4l2.c +++ b/driver/vidc/src/msm_vidc_v4l2.c @@ -323,6 +323,30 @@ unlock: return rc; } +int msm_v4l2_querybuf(struct file *filp, void *fh, + struct v4l2_buffer *b) +{ + struct msm_vidc_inst *inst = get_vidc_inst(filp, fh); + int rc = 0; + + inst = get_inst_ref(g_core, inst); + if (!inst) { + d_vpr_e("%s: invalid instance\n", __func__); + return -EINVAL; + } + + inst_lock(inst, __func__); + rc = msm_vidc_querybuf((void *)inst, b); + if (rc) + goto unlock; + +unlock: + inst_unlock(inst, __func__); + put_inst(inst); + + return rc; +} + int msm_v4l2_qbuf(struct file *filp, void *fh, struct v4l2_buffer *b) { From 365d8650f251a697d9a5054a2b373c513661f52b Mon Sep 17 00:00:00 2001 From: Dikshita Agarwal Date: Fri, 28 Jan 2022 13:24:36 +0530 Subject: [PATCH 0521/1061] video: driver: add support for create buf Add handling for VIDIOC_CREATE_BUFS ioctl in driver. This ioctl is used to create buffers for memory mapped or DMA buffer I/O. It can be used as an alternative or in addition to the ioctl VIDIOC_REQBUFS ioctl, when a tighter control over buffers is required. This ioctl can be called multiple times to create buffers of different sizes. Partially Fixes: v4l2-compliance: test VIDIOC_REQBUFS/CREATE_BUFS/QUERYBUF. Change-Id: I9dd6c3f48e48e297b3e56fd4c8062869c8b55bee Signed-off-by: Dikshita Agarwal --- driver/vidc/inc/msm_vidc.h | 1 + driver/vidc/inc/msm_vidc_v4l2.h | 2 ++ driver/vidc/src/msm_vidc.c | 31 +++++++++++++++++++++++++++++ driver/vidc/src/msm_vidc_platform.c | 2 ++ driver/vidc/src/msm_vidc_v4l2.c | 24 ++++++++++++++++++++++ 5 files changed, 60 insertions(+) diff --git a/driver/vidc/inc/msm_vidc.h b/driver/vidc/inc/msm_vidc.h index 97b3498979..0e5c837798 100644 --- a/driver/vidc/inc/msm_vidc.h +++ b/driver/vidc/inc/msm_vidc.h @@ -27,6 +27,7 @@ int msm_vidc_s_param(void *instance, struct v4l2_streamparm *sp); int msm_vidc_g_param(void *instance, struct v4l2_streamparm *sp); int msm_vidc_reqbufs(void *instance, struct v4l2_requestbuffers *b); int msm_vidc_querybuf(void *instance, struct v4l2_buffer *b); +int msm_vidc_create_bufs(void *instance, struct v4l2_create_buffers *b); int msm_vidc_release_buffer(void *instance, int buffer_type, unsigned int buffer_index); int msm_vidc_qbuf(void *instance, struct media_device *mdev, diff --git a/driver/vidc/inc/msm_vidc_v4l2.h b/driver/vidc/inc/msm_vidc_v4l2.h index c815c97862..877cf6bcde 100644 --- a/driver/vidc/inc/msm_vidc_v4l2.h +++ b/driver/vidc/inc/msm_vidc_v4l2.h @@ -36,6 +36,8 @@ int msm_v4l2_reqbufs(struct file *file, void *fh, struct v4l2_requestbuffers *b); int msm_v4l2_querybuf(struct file *file, void *fh, struct v4l2_buffer *b); +int msm_v4l2_create_bufs(struct file *filp, void *fh, + struct v4l2_create_buffers *b); int msm_v4l2_qbuf(struct file *file, void *fh, struct v4l2_buffer *b); int msm_v4l2_dqbuf(struct file *file, void *fh, diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index c680cab387..a137dfeac1 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -441,6 +441,37 @@ exit: } EXPORT_SYMBOL(msm_vidc_querybuf); +int msm_vidc_create_bufs(void *instance, struct v4l2_create_buffers *b) +{ + int rc = 0; + struct msm_vidc_inst *inst = instance; + int port; + struct v4l2_format *f; + + if (!inst || !b) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + f = &b->format; + port = v4l2_type_to_driver_port(inst, f->type, __func__); + if (port < 0) { + rc = -EINVAL; + goto exit; + } + + rc = vb2_create_bufs(inst->bufq[port].vb2q, b); + if (rc) { + i_vpr_e(inst, "%s: vb2_create_bufs(%d) failed, %d\n", + __func__, f->type, rc); + goto exit; + } + +exit: + return rc; +} +EXPORT_SYMBOL(msm_vidc_create_bufs); + int msm_vidc_qbuf(void *instance, struct media_device *mdev, struct v4l2_buffer *b) { diff --git a/driver/vidc/src/msm_vidc_platform.c b/driver/vidc/src/msm_vidc_platform.c index c359ab1923..9d78c94a18 100644 --- a/driver/vidc/src/msm_vidc_platform.c +++ b/driver/vidc/src/msm_vidc_platform.c @@ -61,6 +61,7 @@ static struct v4l2_ioctl_ops msm_v4l2_ioctl_ops_enc = { .vidioc_g_parm = msm_v4l2_g_parm, .vidioc_reqbufs = msm_v4l2_reqbufs, .vidioc_querybuf = msm_v4l2_querybuf, + .vidioc_create_bufs = msm_v4l2_create_bufs, .vidioc_qbuf = msm_v4l2_qbuf, .vidioc_dqbuf = msm_v4l2_dqbuf, .vidioc_streamon = msm_v4l2_streamon, @@ -99,6 +100,7 @@ static struct v4l2_ioctl_ops msm_v4l2_ioctl_ops_dec = { .vidioc_g_parm = msm_v4l2_g_parm, .vidioc_reqbufs = msm_v4l2_reqbufs, .vidioc_querybuf = msm_v4l2_querybuf, + .vidioc_create_bufs = msm_v4l2_create_bufs, .vidioc_qbuf = msm_v4l2_qbuf, .vidioc_dqbuf = msm_v4l2_dqbuf, .vidioc_streamon = msm_v4l2_streamon, diff --git a/driver/vidc/src/msm_vidc_v4l2.c b/driver/vidc/src/msm_vidc_v4l2.c index 7f4877655a..c73c2ac2ad 100644 --- a/driver/vidc/src/msm_vidc_v4l2.c +++ b/driver/vidc/src/msm_vidc_v4l2.c @@ -347,6 +347,30 @@ unlock: return rc; } +int msm_v4l2_create_bufs(struct file *filp, void *fh, + struct v4l2_create_buffers *b) +{ + struct msm_vidc_inst *inst = get_vidc_inst(filp, fh); + int rc = 0; + + inst = get_inst_ref(g_core, inst); + if (!inst) { + d_vpr_e("%s: invalid instance\n", __func__); + return -EINVAL; + } + + inst_lock(inst, __func__); + rc = msm_vidc_create_bufs((void *)inst, b); + if (rc) + goto unlock; + +unlock: + inst_unlock(inst, __func__); + put_inst(inst); + + return rc; +} + int msm_v4l2_qbuf(struct file *filp, void *fh, struct v4l2_buffer *b) { From 58e4fd1d8f03ac4df6cd6e8becd438bd32d89dde Mon Sep 17 00:00:00 2001 From: Dikshita Agarwal Date: Tue, 1 Feb 2022 15:07:34 +0530 Subject: [PATCH 0522/1061] video: driver: update OP port setting if rotation is enabled Update the output port setting when set control is called for rotation irrespective of the value of rotation angle. Partially Fixes: v4l2-compliance: encoder: TestSetFormat(VIDIOC_S_FMT) Change-Id: Ic5dce8089820f69fd38ac3b394e1c139d5d76f1b Signed-off-by: Dikshita Agarwal --- driver/vidc/src/msm_vidc_control.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index d5c1608829..dc0643883b 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -868,14 +868,12 @@ int msm_v4l2_op_s_ctrl(struct v4l2_ctrl *ctrl) } if (ctrl->id == V4L2_CID_ROTATE) { - if (ctrl->val == 90 || ctrl->val == 270) { struct v4l2_format *output_fmt; output_fmt = &inst->fmts[OUTPUT_PORT]; rc = msm_venc_s_fmt_output(inst, output_fmt); if (rc) return rc; - } } if (ctrl->id == V4L2_CID_MPEG_VIDC_MIN_BITSTREAM_SIZE_OVERWRITE) { From eee7bd1a5ee16cdf085b78689a859804d9ccafb9 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Fri, 21 Jan 2022 22:14:41 +0530 Subject: [PATCH 0523/1061] video: driver: fix msm_vidc_remove sequence of_platform_depopulate() will attempt to call msm_vidc_remove for each sub device(contextbank) individually. So added support for sub device remove sequence. Change-Id: I74806e30355d69f7d6080db820bad739b556366f Signed-off-by: Govindaraj Rajagopal --- driver/vidc/src/msm_vidc_probe.c | 39 +++++++++++++++++++++++++++++--- 1 file changed, 36 insertions(+), 3 deletions(-) diff --git a/driver/vidc/src/msm_vidc_probe.c b/driver/vidc/src/msm_vidc_probe.c index 945cb0648b..5a84dddd6b 100644 --- a/driver/vidc/src/msm_vidc_probe.c +++ b/driver/vidc/src/msm_vidc_probe.c @@ -34,8 +34,6 @@ static int msm_vidc_deinit_irq(struct msm_vidc_core *core) d_vpr_h("%s: reg_base = %pa, reg_size = %#x\n", __func__, &dt->register_base, dt->register_size); - if (dt->irq) - free_irq(dt->irq, core); dt->irq = 0; if (core->register_base_addr) @@ -345,7 +343,7 @@ exit: return rc; } -static int msm_vidc_remove(struct platform_device* pdev) +static int msm_vidc_remove_video_device(struct platform_device *pdev) { struct msm_vidc_core* core; @@ -362,6 +360,13 @@ static int msm_vidc_remove(struct platform_device* pdev) d_vpr_h("%s()\n", __func__); msm_vidc_core_deinit(core, true); + + d_vpr_h("depopulating sub devices\n"); + /* + * Trigger remove for each sub-device i.e. qcom,msm-vidc,context-bank. + * When msm_vidc_remove is called for each sub-device, destroy + * context-bank mappings. + */ of_platform_depopulate(&pdev->dev); #ifdef CONFIG_MEDIA_CONTROLLER @@ -395,6 +400,33 @@ static int msm_vidc_remove(struct platform_device* pdev) return 0; } +static int msm_vidc_remove_context_bank(struct platform_device *pdev) +{ + d_vpr_h("%s(): Detached %s and destroyed mapping\n", + __func__, dev_name(&pdev->dev)); + + return 0; +} + +static int msm_vidc_remove(struct platform_device *pdev) +{ + /* + * Sub devices remove will be triggered by of_platform_depopulate() + * after core_deinit(). It return immediately after completing + * sub-device remove. + */ + if (of_device_is_compatible(pdev->dev.of_node, "qcom,msm-vidc")) { + return msm_vidc_remove_video_device(pdev); + } else if (of_device_is_compatible(pdev->dev.of_node, + "qcom,msm-vidc,context-bank")) { + return msm_vidc_remove_context_bank(pdev); + } + + /* How did we end up here? */ + WARN_ON(1); + return -EINVAL; +} + static int msm_vidc_probe_video_device(struct platform_device *pdev) { int rc = 0; @@ -522,6 +554,7 @@ static int msm_vidc_probe_video_device(struct platform_device *pdev) d_vpr_e("%s: sys init failed\n", __func__); goto core_init_failed; } + d_vpr_h("%s(): succssful\n", __func__); return rc; From afa424d529a10854783d6b0b8e8ecb8609239e93 Mon Sep 17 00:00:00 2001 From: Zhongbo Shi Date: Mon, 17 Jan 2022 13:24:26 +0800 Subject: [PATCH 0524/1061] video-driver: disable dynamic low latency Dynamic low latency causes decoder input PSC triggered for every IDR frame, leading to clock increasing. And this also causes power higher for VT call. Thus, need the following changes: 1. Disable dynamic low latency when low latency mode is enabled; 2. DO NOT allow config low latency mode after stream on. Change-Id: Ia57f4c75617214b0352b263425ad9b445ff95524 Signed-off-by: Zhongbo Shi --- driver/platform/waipio/src/msm_vidc_waipio.c | 2 +- driver/vidc/inc/msm_vidc_control.h | 1 - driver/vidc/src/msm_vdec.c | 10 +------ driver/vidc/src/msm_vidc_control.c | 30 +------------------- 4 files changed, 3 insertions(+), 40 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 0c19f9fb3b..7ee4964e0e 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -518,7 +518,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDC_LOWLATENCY_REQUEST, HFI_PROP_SEQ_CHANGE_AT_SYNC_FRAME, - CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + CAP_FLAG_INPUT_PORT}, {LTR_COUNT, ENC, H264|HEVC, 0, 2, 1, 0, diff --git a/driver/vidc/inc/msm_vidc_control.h b/driver/vidc/inc/msm_vidc_control.h index 60dc8b7a79..7d6d93f40e 100644 --- a/driver/vidc/inc/msm_vidc_control.h +++ b/driver/vidc/inc/msm_vidc_control.h @@ -102,7 +102,6 @@ int msm_vidc_set_csc_custom_matrix(void *instance, enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_session_priority(void* instance, enum msm_vidc_inst_capability_type cap_id); -int msm_vidc_set_seq_change_at_sync_frame(void *instance); int msm_vidc_set_level(void *instance, enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_s32(void *instance, diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index b3f4f7e419..cee841a8a1 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2022, The Linux Foundation. All rights reserved. */ #include @@ -967,10 +967,6 @@ static int msm_vdec_set_output_properties(struct msm_vidc_inst *inst) if (rc) return rc; - rc = msm_vidc_set_seq_change_at_sync_frame(inst); - if (rc) - return rc; - return rc; } @@ -2371,10 +2367,6 @@ int msm_vdec_process_cmd(struct msm_vidc_inst *inst, u32 cmd) msm_vidc_allow_dcvs(inst); msm_vidc_power_data_reset(inst); - rc = msm_vidc_set_seq_change_at_sync_frame(inst); - if (rc) - return rc; - /* allocate and queue extra dpb buffers */ rc = msm_vdec_alloc_and_queue_additional_dpb_buffers(inst); if (rc) diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index d5c1608829..72091b8d94 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2022, The Linux Foundation. All rights reserved. */ #include "msm_vidc_control.h" @@ -963,14 +963,6 @@ int msm_v4l2_op_s_ctrl(struct v4l2_ctrl *ctrl) goto exit; } - if (ctrl->id == V4L2_CID_MPEG_VIDC_LOWLATENCY_REQUEST) { - if (ctrl->val == V4L2_MPEG_MSM_VIDC_ENABLE) { - rc = msm_vidc_set_seq_change_at_sync_frame(inst); - if (rc) - return rc; - } - } - exit: if (rc) msm_vidc_free_capabililty_list(inst, CHILD_LIST | FW_LIST); @@ -3881,23 +3873,3 @@ int msm_vidc_set_pipe(void *instance, return rc; } - -int msm_vidc_set_seq_change_at_sync_frame(void *instance) -{ - int rc = 0; - u32 payload; - struct msm_vidc_inst* inst = (struct msm_vidc_inst*)instance; - - if (!inst || !inst->capabilities) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - payload = inst->capabilities->cap[LOWLATENCY_MODE].value; - rc = msm_vidc_packetize_control(inst, LOWLATENCY_MODE, HFI_PAYLOAD_U32, - &payload, sizeof(u32), __func__); - if (rc) - return rc; - - return rc; -} From 9bacc5d1247063f0c1f3200e5104720672081eec Mon Sep 17 00:00:00 2001 From: Mihir Ganu Date: Thu, 27 Jan 2022 11:30:09 -0800 Subject: [PATCH 0525/1061] video: driver: Add HFI and internal buffer changes for AV1 DRAP Add changes for AV1 DRAP (Delayed Random Access Point) handling: 1) Add config in kalama database to control DRAP and the HFI property to set DRAP config. 2) Update buffer calculations: - When DRAP is disabled, COMV buffer must be allocated and PERSIST buffer must be allocated with total_ref_count = 0 - When DRAP is enabled, COMV buffer must not be allocated - it is part of PERSIST buffer. Persist buffer must be allocated with the max_width, max_height and total_ref_count configured for DRAP. Change-Id: I2d2e8fd3f63ea8f9fc2845acd0b4e16ba4776a6b Signed-off-by: Mihir Ganu --- driver/platform/kalama/src/msm_vidc_kalama.c | 5 +++ driver/variant/iris3/inc/hfi_buffer_iris3.h | 24 ++++++++--- .../variant/iris3/src/msm_vidc_buffer_iris3.c | 41 +++++++++++++++---- driver/vidc/inc/hfi_property.h | 4 ++ driver/vidc/inc/msm_vidc_internal.h | 1 + driver/vidc/src/msm_vdec.c | 30 ++++++++++++++ driver/vidc/src/msm_vidc_buffer.c | 3 +- driver/vidc/src/msm_vidc_driver.c | 1 + 8 files changed, 95 insertions(+), 14 deletions(-) diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index 541f0edfa3..182731ea2f 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -1484,6 +1484,11 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { 0, HFI_PROP_AV1_SUPER_BLOCK_ENABLED}, + {DRAP, DEC, AV1, + 0, S32_MAX, 1, 0, + 0, + HFI_PROP_AV1_DRAP_CONFIG}, + {META_BITSTREAM_RESOLUTION, DEC, AV1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, diff --git a/driver/variant/iris3/inc/hfi_buffer_iris3.h b/driver/variant/iris3/inc/hfi_buffer_iris3.h index 68c017e9a5..ed93f559fc 100644 --- a/driver/variant/iris3/inc/hfi_buffer_iris3.h +++ b/driver/variant/iris3/inc/hfi_buffer_iris3.h @@ -880,6 +880,17 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define AV1D_LCU_MIN_SIZE_PELS 64 #define AV1D_MAX_TILE_COLS 64 +#define HFI_BUFFER_COMV_AV1D(_size, frame_width, frame_height, \ + _yuv_bufcount_min) \ + do { \ + _size = 2 * HFI_ALIGN(MAX(((frame_width + 63) / 64) * \ + ((frame_height + 63) / 64) * 512, \ + ((frame_width + 127) / 128) * \ + ((frame_height + 127) / 128) * 2816), \ + VENUS_DMA_ALIGNMENT); \ + _size *= _yuv_bufcount_min; \ + } while (0) + #define SIZE_AV1D_LB_FE_TOP_DATA(frame_width, frame_height) \ (HFI_ALIGN(frame_width, AV1D_LCU_MAX_SIZE_PELS) * ((16 * 10) >> 3) + \ HFI_ALIGN(frame_width, AV1D_LCU_MAX_SIZE_PELS) / 2 * ((16 * 6) >> 3) * 2) @@ -1135,15 +1146,18 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ (((8192 + 127) / 128) * ((4352 + 127) / 128) * \ AV1D_SIZE_BSE_COL_MV_128x128)) -#define HFI_BUFFER_PERSIST_AV1D(_size) \ +#define HFI_BUFFER_PERSIST_AV1D(_size, max_width, max_height, total_ref_count) \ do \ { \ - _size = HFI_ALIGN(SIZE_AV1D_SEQUENCE_HEADER * 2 + \ - SIZE_AV1D_METADATA + \ + HFI_U32 comv_size; \ + HFI_BUFFER_COMV_AV1D(comv_size, max_width, max_height, total_ref_count); \ + _size = \ + HFI_ALIGN((SIZE_AV1D_SEQUENCE_HEADER * 2 + \ + SIZE_AV1D_METADATA + \ AV1D_NUM_HW_PIC_BUF * (SIZE_AV1D_TILE_OFFSET + SIZE_AV1D_QM) + \ AV1D_NUM_FRAME_HEADERS * (SIZE_AV1D_FRAME_HEADER + \ - 2 * SIZE_AV1D_PROB_TABLE) + \ - AV1D_NUM_HW_PIC_BUF * 2 * SIZE_AV1D_COL_MV, VENUS_DMA_ALIGNMENT); \ + 2 * SIZE_AV1D_PROB_TABLE) + \ + comv_size), VENUS_DMA_ALIGNMENT); \ } while (0) #define HFI_BUFFER_BITSTREAM_ENC(size, frame_width, frame_height, \ diff --git a/driver/variant/iris3/src/msm_vidc_buffer_iris3.c b/driver/variant/iris3/src/msm_vidc_buffer_iris3.c index 3d77884927..66b77c8005 100644 --- a/driver/variant/iris3/src/msm_vidc_buffer_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_buffer_iris3.c @@ -69,7 +69,7 @@ static u32 msm_vidc_decoder_comv_size_iris3(struct msm_vidc_inst* inst) { u32 size = 0; u32 width, height, out_min_count, vpp_delay; - struct v4l2_format* f; + struct v4l2_format *f; if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); @@ -86,10 +86,21 @@ static u32 msm_vidc_decoder_comv_size_iris3(struct msm_vidc_inst* inst) out_min_count = inst->buffers.output.min_count; out_min_count = max(vpp_delay + 1, out_min_count); - if (inst->codec == MSM_VIDC_H264) + if (inst->codec == MSM_VIDC_H264) { HFI_BUFFER_COMV_H264D(size, width, height, out_min_count); - else if (inst->codec == MSM_VIDC_HEVC || inst->codec == MSM_VIDC_HEIC) + } else if (inst->codec == MSM_VIDC_HEVC || inst->codec == MSM_VIDC_HEIC) { HFI_BUFFER_COMV_H265D(size, width, height, out_min_count); + } else if (inst->codec == MSM_VIDC_AV1) { + /* + * When DRAP is enabled, COMV buffer is part of PERSIST buffer and + * should not be allocated separately. + * When DRAP is disabled, COMV buffer must be allocated. + */ + if (inst->capabilities->cap[DRAP].value) + size = 0; + else + HFI_BUFFER_COMV_AV1D(size, width, height, out_min_count); + } i_vpr_l(inst, "%s: size %d\n", __func__, size); return size; @@ -195,14 +206,28 @@ static u32 msm_vidc_decoder_persist_size_iris3(struct msm_vidc_inst *inst) return size; } - if (inst->codec == MSM_VIDC_H264) + if (inst->codec == MSM_VIDC_H264) { HFI_BUFFER_PERSIST_H264D(size); - else if (inst->codec == MSM_VIDC_HEVC || inst->codec == MSM_VIDC_HEIC) + } else if (inst->codec == MSM_VIDC_HEVC || inst->codec == MSM_VIDC_HEIC) { HFI_BUFFER_PERSIST_H265D(size); - else if (inst->codec == MSM_VIDC_VP9) + } else if (inst->codec == MSM_VIDC_VP9) { HFI_BUFFER_PERSIST_VP9D(size); - else if (inst->codec == MSM_VIDC_AV1) - HFI_BUFFER_PERSIST_AV1D(size); + } else if (inst->codec == MSM_VIDC_AV1) { + /* + * When DRAP is enabled, COMV buffer is part of PERSIST buffer and + * should not be allocated separately. PERSIST buffer should include + * COMV buffer calculated with width, height, refcount. + * When DRAP is disabled, COMV buffer should not be included in PERSIST + * buffer. + */ + if (inst->capabilities->cap[DRAP].value) + HFI_BUFFER_PERSIST_AV1D(size, + inst->capabilities->cap[FRAME_WIDTH].max, + inst->capabilities->cap[FRAME_HEIGHT].max, 16); + else + HFI_BUFFER_PERSIST_AV1D(size, 0, 0, 0); + } + i_vpr_l(inst, "%s: size %d\n", __func__, size); return size; } diff --git a/driver/vidc/inc/hfi_property.h b/driver/vidc/inc/hfi_property.h index 1e4eadb4f9..0ac667a759 100644 --- a/driver/vidc/inc/hfi_property.h +++ b/driver/vidc/inc/hfi_property.h @@ -540,6 +540,8 @@ enum hfi_nal_length_field_type { #define HFI_PROP_OPB_ENABLE 0x03000184 +#define HFI_PROP_AV1_DRAP_CONFIG 0x03000189 + #define HFI_PROP_END 0x03FFFFFF #define HFI_SESSION_ERROR_BEGIN 0x04000000 @@ -556,6 +558,8 @@ enum hfi_nal_length_field_type { #define HFI_ERROR_BUFFER_NOT_SET 0x04000006 +#define HFI_ERROR_DRAP_CONFIG_EXCEED 0x04000007 + #define HFI_SESSION_ERROR_END 0x04FFFFFF #define HFI_SYSTEM_ERROR_BEGIN 0x05000000 diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index b357ff2a98..3d0adb460f 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -458,6 +458,7 @@ enum msm_vidc_inst_capability_type { DPB_LIST, FILM_GRAIN, SUPER_BLOCK, + DRAP, ALL_INTRA, INPUT_METADATA_FD, META_BITSTREAM_RESOLUTION, diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index b3f4f7e419..14268e9c6a 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -886,6 +886,32 @@ static int msm_vdec_set_av1_operating_point(struct msm_vidc_inst *inst, return rc; } +static int msm_vdec_set_av1_drap_config(struct msm_vidc_inst *inst, + enum msm_vidc_port_type port) +{ + int rc = 0; + u32 drap_config; + + if (inst->codec != MSM_VIDC_AV1) + return 0; + + drap_config = inst->capabilities->cap[DRAP].value; + i_vpr_h(inst, "%s: drap_config: %u\n", __func__, drap_config); + rc = venus_hfi_session_property(inst, + HFI_PROP_AV1_DRAP_CONFIG, + HFI_HOST_FLAGS_NONE, + get_hfi_port(inst, port), + HFI_PAYLOAD_U32, + &drap_config, + sizeof(u32)); + if (rc) { + i_vpr_e(inst, "%s: set property failed\n", __func__); + return rc; + } + + return rc; +} + static int msm_vdec_set_input_properties(struct msm_vidc_inst *inst) { int rc = 0; @@ -935,6 +961,10 @@ static int msm_vdec_set_input_properties(struct msm_vidc_inst *inst) if (rc) return rc; + rc = msm_vdec_set_av1_drap_config(inst, INPUT_PORT); + if (rc) + return rc; + return rc; } diff --git a/driver/vidc/src/msm_vidc_buffer.c b/driver/vidc/src/msm_vidc_buffer.c index 8e92c66e55..e4adcfec42 100644 --- a/driver/vidc/src/msm_vidc_buffer.c +++ b/driver/vidc/src/msm_vidc_buffer.c @@ -187,7 +187,8 @@ u32 msm_vidc_internal_buffer_count(struct msm_vidc_inst *inst, buffer_type == MSM_VIDC_BUF_NON_COMV) { if (inst->codec == MSM_VIDC_H264 || inst->codec == MSM_VIDC_HEVC || - inst->codec == MSM_VIDC_HEIC) + inst->codec == MSM_VIDC_HEIC || + inst->codec == MSM_VIDC_AV1) count = 1; else count = 0; diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 96780f1c81..5fa4c8d749 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -175,6 +175,7 @@ static const struct msm_vidc_cap_name cap_name_arr[] = { {DPB_LIST, "DPB_LIST" }, {FILM_GRAIN, "FILM_GRAIN" }, {SUPER_BLOCK, "SUPER_BLOCK" }, + {DRAP, "DRAP" }, {ALL_INTRA, "ALL_INTRA" }, {INPUT_METADATA_FD, "INPUT_METADATA_FD" }, {META_BITSTREAM_RESOLUTION, "META_BITSTREAM_RESOLUTION" }, From d9debeed9e65f1ee1301566e7aba55cdca31448b Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Mon, 31 Jan 2022 21:05:38 +0530 Subject: [PATCH 0526/1061] video-driver: prepare conflict free dependency list Convert multi-parent, multi-child based dependency tree into flattened list. It is organized in such a way that all parents willbe present before self or any child node. For some caps, adjust sequence is called without preparing parent nodes. So that is leading to undefined behaviour. Added change to address these problems. Change-Id: Ib28cae8a4ed7e019c80ecfc06519ef78ffa4dc08 Signed-off-by: Govindaraj Rajagopal --- driver/vidc/inc/msm_vidc_control.h | 3 +- driver/vidc/inc/msm_vidc_inst.h | 3 +- driver/vidc/src/msm_vidc.c | 3 +- driver/vidc/src/msm_vidc_control.c | 234 +++++++++++++++++++++++++++-- driver/vidc/src/msm_vidc_driver.c | 6 + driver/vidc/src/msm_vidc_vb2.c | 6 +- 6 files changed, 240 insertions(+), 15 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_control.h b/driver/vidc/inc/msm_vidc_control.h index 60dc8b7a79..592c25d2f0 100644 --- a/driver/vidc/inc/msm_vidc_control.h +++ b/driver/vidc/inc/msm_vidc_control.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* - * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2022,, The Linux Foundation. All rights reserved. */ #ifndef _MSM_VIDC_CONTROL_H_ @@ -44,6 +44,7 @@ int msm_vidc_adjust_bitrate_boost(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_min_quality(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_lowlatency_mode(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_v4l2_properties(struct msm_vidc_inst *inst); +int msm_vidc_prepare_dependency_list(struct msm_vidc_inst *inst); int msm_vidc_adjust_session_priority(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_roi_info(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_all_intra(void *instance, struct v4l2_ctrl *ctrl); diff --git a/driver/vidc/inc/msm_vidc_inst.h b/driver/vidc/inc/msm_vidc_inst.h index d990ba844f..9e294bcf3f 100644 --- a/driver/vidc/inc/msm_vidc_inst.h +++ b/driver/vidc/inc/msm_vidc_inst.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* - * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2022,, The Linux Foundation. All rights reserved. */ #ifndef _MSM_VIDC_INST_H_ @@ -143,6 +143,7 @@ struct msm_vidc_inst { struct list_head response_works; /* list of struct response_work */ struct list_head enc_input_crs; struct list_head dmabuf_tracker; /* list of struct msm_memory_dmabuf */ + struct list_head caps_list; /* list of struct msm_vidc_inst_cap_entry */ bool once_per_session_set; bool ipsc_properties_set; bool opsc_properties_set; diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index c680cab387..f0de4a9d61 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2022, The Linux Foundation. All rights reserved. */ #include @@ -873,6 +873,7 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) return NULL; } INIT_LIST_HEAD(&inst->response_works); + INIT_LIST_HEAD(&inst->caps_list); INIT_LIST_HEAD(&inst->timestamps.list); INIT_LIST_HEAD(&inst->ts_reorder.list); INIT_LIST_HEAD(&inst->buffers.input.list); diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index d5c1608829..6d1e74546e 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2022, The Linux Foundation. All rights reserved. */ #include "msm_vidc_control.h" @@ -1812,12 +1812,15 @@ int msm_vidc_adjust_dynamic_layer_bitrate(void *instance, struct v4l2_ctrl *ctrl u32 old_br = 0, new_br = 0, exceeded_br = 0; s32 max_bitrate; - if (!inst || !inst->capabilities || !ctrl) { + if (!inst || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } capability = inst->capabilities; + if (!ctrl) + return 0; + /* ignore layer bitrate when total bitrate is set */ if (capability->cap[BIT_RATE].flags & CAP_FLAG_CLIENT_SET) return 0; @@ -2484,8 +2487,219 @@ int msm_vidc_adjust_roi_info(void *instance, struct v4l2_ctrl *ctrl) return 0; } +static inline bool has_parents(struct msm_vidc_inst_cap *cap) +{ + return !!cap->parents[0]; +} + +static inline bool has_childrens(struct msm_vidc_inst_cap *cap) +{ + return !!cap->children[0]; +} + +static inline bool is_root(struct msm_vidc_inst_cap *cap) +{ + return !has_parents(cap); +} + +static inline bool is_valid_cap(struct msm_vidc_inst_cap *cap) +{ + return cap->cap != INST_CAP_NONE; +} + +static inline bool is_all_parents_visited( + struct msm_vidc_inst_cap *cap, bool lookup[INST_CAP_MAX]) { + bool found = true; + int i; + + for (i = 0; i < MAX_CAP_PARENTS; i++) { + if (cap->parents[i] == INST_CAP_NONE) + continue; + + if (!lookup[cap->parents[i]]) { + found = false; + break; + } + } + return found; +} + +static int add_node( + struct list_head *list, struct msm_vidc_inst_cap *rcap, bool lookup[INST_CAP_MAX]) +{ + struct msm_vidc_inst_cap_entry *entry; + + if (lookup[rcap->cap]) + return 0; + + entry = kzalloc(sizeof(struct msm_vidc_inst_cap_entry), GFP_KERNEL); + if (!entry) { + d_vpr_e("%s: msm_vidc_inst_cap_entry alloc failed\n", __func__); + return -EINVAL; + } + + INIT_LIST_HEAD(&entry->list); + entry->cap_id = rcap->cap; + lookup[rcap->cap] = true; + + list_add_tail(&entry->list, list); + return 0; +} + +int msm_vidc_prepare_dependency_list(struct msm_vidc_inst *inst) +{ + struct list_head root_list, opt_list; + struct msm_vidc_inst_capability *capability; + struct msm_vidc_inst_cap *cap, *rcap; + struct msm_vidc_inst_cap_entry *entry = NULL, *temp = NULL; + bool root_visited[INST_CAP_MAX]; + bool opt_visited[INST_CAP_MAX]; + int tmp_count_total, tmp_count, num_nodes = 0; + int i, rc = 0; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + if (!list_empty(&inst->caps_list)) { + i_vpr_h(inst, "%s: dependency list already prepared\n", __func__); + return 0; + } + + /* init local list and lookup table entries */ + INIT_LIST_HEAD(&root_list); + INIT_LIST_HEAD(&opt_list); + memset(&root_visited, 0, sizeof(root_visited)); + memset(&opt_visited, 0, sizeof(opt_visited)); + + /* populate root nodes first */ + for (i = 1; i < INST_CAP_MAX; i++) { + rcap = &capability->cap[i]; + if (!is_valid_cap(rcap)) + continue; + + /* sanitize cap value */ + if (i != rcap->cap) { + i_vpr_e(inst, "%s: cap id mismatch. expected %s, actual %s\n", + __func__, cap_name(i), cap_name(rcap->cap)); + rc = -EINVAL; + goto error; + } + + /* add all root nodes */ + if (is_root(rcap)) { + rc = add_node(&root_list, rcap, root_visited); + if (rc) + goto error; + } + } + + /* add all dependent parents */ + list_for_each_entry_safe(entry, temp, &root_list, list) { + rcap = &capability->cap[entry->cap_id]; + /* skip leaf node */ + if (!has_childrens(rcap)) + continue; + + for (i = 0; i < MAX_CAP_CHILDREN; i++) { + if (!rcap->children[i]) + break; + cap = &capability->cap[rcap->children[i]]; + if (!is_valid_cap(cap)) + continue; + + /** + * if child node is already part of root or optional list + * then no need to add it again. + */ + if (root_visited[cap->cap] || opt_visited[cap->cap]) + continue; + + /** + * if child node's all parents are already present in root list + * then add it to root list else add it to optional list. + */ + if (is_all_parents_visited(cap, root_visited)) { + rc = add_node(&root_list, cap, root_visited); + if (rc) + goto error; + } else { + rc = add_node(&opt_list, cap, opt_visited); + if (rc) + goto error; + } + } + } + + /* find total optional list entries */ + list_for_each_entry(entry, &opt_list, list) + num_nodes++; + + /* used for loop detection */ + tmp_count_total = num_nodes; + tmp_count = num_nodes; + + /* sort final outstanding nodes */ + list_for_each_entry_safe(entry, temp, &opt_list, list) { + /* initially remove entry from opt list */ + list_del_init(&entry->list); + tmp_count--; + cap = &capability->cap[entry->cap_id]; + + /** + * if all parents are visited then add this entry to + * root list else add it to the end of optional list. + */ + if (is_all_parents_visited(cap, root_visited)) { + list_add_tail(&entry->list, &root_list); + root_visited[entry->cap_id] = true; + tmp_count_total--; + } else { + list_add_tail(&entry->list, &opt_list); + } + + /* detect loop */ + if (!tmp_count) { + if (num_nodes == tmp_count_total) { + i_vpr_e(inst, "%s: loop detected in subgraph %d\n", + __func__, num_nodes); + rc = -EINVAL; + goto error; + } + num_nodes = tmp_count_total; + tmp_count = tmp_count_total; + } + } + + /* expecting opt_list to be empty */ + if (!list_empty(&opt_list)) { + i_vpr_e(inst, "%s: opt_list is not empty\n", __func__); + rc = -EINVAL; + goto error; + } + + /* move elements to &inst->caps_list from local */ + list_replace_init(&root_list, &inst->caps_list); + + return 0; +error: + list_for_each_entry_safe(entry, temp, &opt_list, list) { + i_vpr_e(inst, "%s: opt_list: %s\n", __func__, cap_name(entry->cap_id)); + list_del_init(&entry->list); + kfree(entry); + } + list_for_each_entry_safe(entry, temp, &root_list, list) { + i_vpr_e(inst, "%s: root_list: %s\n", __func__, cap_name(entry->cap_id)); + list_del_init(&entry->list); + kfree(entry); + } + return rc; +} + /* - * Loop over instance capabilities with CAP_FLAG_ROOT + * Loop over instance capabilities from caps_list * and call adjust function, where * - adjust current capability value * - update tail of instance children list with capability children @@ -2495,7 +2709,6 @@ int msm_vidc_adjust_roi_info(void *instance, struct v4l2_ctrl *ctrl) int msm_vidc_adjust_v4l2_properties(struct msm_vidc_inst *inst) { int rc = 0; - int i; struct msm_vidc_inst_cap_entry *curr_node = NULL, *tmp_node = NULL; struct msm_vidc_inst_capability *capability; @@ -2506,13 +2719,12 @@ int msm_vidc_adjust_v4l2_properties(struct msm_vidc_inst *inst) capability = inst->capabilities; i_vpr_h(inst, "%s()\n", __func__); - for (i = 0; i < INST_CAP_MAX; i++) { - if (capability->cap[i].flags & CAP_FLAG_ROOT) { - rc = msm_vidc_adjust_property(inst, - capability->cap[i].cap); - if (rc) - goto exit; - } + list_for_each_entry_safe(curr_node, tmp_node, &inst->caps_list, list) { + i_vpr_l(inst, "%s: cap: id %3u, name %s\n", __func__, + curr_node->cap_id, cap_name(curr_node->cap_id)); + rc = msm_vidc_adjust_property(inst, curr_node->cap_id); + if (rc) + goto exit; } /* diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 96780f1c81..eb4d77a8db 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -5136,6 +5136,7 @@ void msm_vidc_destroy_buffers(struct msm_vidc_inst *inst) struct msm_vidc_timestamp *ts, *dummy_ts; struct msm_memory_dmabuf *dbuf, *dummy_dbuf; struct response_work *work, *dummy_work = NULL; + struct msm_vidc_inst_cap_entry *entry, *dummy_entry; static const enum msm_vidc_buffer_type ext_buf_types[] = { MSM_VIDC_BUF_INPUT, MSM_VIDC_BUF_OUTPUT, @@ -5227,6 +5228,11 @@ void msm_vidc_destroy_buffers(struct msm_vidc_inst *inst) kfree(work); } + list_for_each_entry_safe(entry, dummy_entry, &inst->caps_list, list) { + list_del(&entry->list); + kfree(entry); + } + /* destroy buffers from pool */ msm_memory_pools_deinit(inst); } diff --git a/driver/vidc/src/msm_vidc_vb2.c b/driver/vidc/src/msm_vidc_vb2.c index d05bdeb9af..2184e302ef 100644 --- a/driver/vidc/src/msm_vidc_vb2.c +++ b/driver/vidc/src/msm_vidc_vb2.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2022, The Linux Foundation. All rights reserved. */ #include "msm_vidc_vb2.h" @@ -190,6 +190,10 @@ int msm_vidc_start_streaming(struct vb2_queue *q, unsigned int count) if (!inst->once_per_session_set) { inst->once_per_session_set = true; + rc = msm_vidc_prepare_dependency_list(inst); + if (rc) + return rc; + rc = msm_vidc_session_set_codec(inst); if (rc) return rc; From cf1a80943450524c9c669aef62c232d5052abb7e Mon Sep 17 00:00:00 2001 From: Mahesh Kumar Sharma Date: Mon, 31 Jan 2022 17:19:43 -0800 Subject: [PATCH 0527/1061] video: driver: support for VP9 decoder frame rate and operating rate Increase operating rate from 60fps to 120fps with vp9 decoder to allow application to use vp9 decoder upto 120fps on kalama. Support of frame rate and opertaing ratear upto 120fps for waipio T. Change-Id: Ic9149bcb904c3e650f9e97d58080426236a1a4eb Signed-off-by: Mahesh Kumar Sharma --- driver/platform/kalama/src/msm_vidc_kalama.c | 2 +- driver/platform/waipio/src/msm_vidc_waipio.c | 9 +++++---- 2 files changed, 6 insertions(+), 5 deletions(-) diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index 182731ea2f..ab8af3551b 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -248,7 +248,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { 1, (DEFAULT_FPS << 16)}, {OPERATING_RATE, DEC, VP9, - (MINIMUM_FPS << 16), (MAXIMUM_VP9_FPS << 16), + (MINIMUM_FPS << 16), (MAXIMUM_OVERRIDE_VP9_FPS << 16), 1, (DEFAULT_FPS << 16)}, {SCALE_FACTOR, ENC, H264|HEVC, 1, 8, 1, 8}, diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 0c19f9fb3b..856279c883 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -49,6 +49,7 @@ #define VP9 MSM_VIDC_VP9 #define HEIC MSM_VIDC_HEIC #define CODECS_ALL (H264 | HEVC | VP9 | HEIC) +#define MAXIMUM_OVERRIDE_VP9_FPS 120 static struct msm_platform_core_capability core_data_waipio[] = { /* {type, value} */ @@ -210,8 +211,8 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {MBPS, ENC, CODECS_ALL, 64, 3916800, 1, 3916800}, /* ((1920 * 1088) / 256) * 960 fps */ {MBPS, DEC, CODECS_ALL, 64, 7833600, 1, 7833600}, - /* ((4096 * 2304) / 256) * 60 */ - {MBPS, DEC, VP9, 36, 2211840, 1, 2211840}, + /* ((4096 * 2304) / 256) * 120 */ + {MBPS, DEC, VP9, 36, 4423680, 1, 4423680}, /* ((4096 * 2304) / 256) * 60 fps */ {POWER_SAVE_MBPS, ENC, CODECS_ALL, 0, 2211840, 1, 2211840}, @@ -229,7 +230,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 1, (DEFAULT_FPS << 16)}, {FRAME_RATE, DEC, VP9, - (MINIMUM_FPS << 16), (MAXIMUM_VP9_FPS << 16), + (MINIMUM_FPS << 16), (MAXIMUM_OVERRIDE_VP9_FPS << 16), 1, (DEFAULT_FPS << 16)}, {OPERATING_RATE, ENC|DEC, CODECS_ALL, @@ -237,7 +238,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 1, (DEFAULT_FPS << 16)}, {OPERATING_RATE, DEC, VP9, - (MINIMUM_FPS << 16), (MAXIMUM_VP9_FPS << 16), + (MINIMUM_FPS << 16), (MAXIMUM_OVERRIDE_VP9_FPS << 16), 1, (DEFAULT_FPS << 16)}, {SCALE_FACTOR, ENC, H264|HEVC, 1, 8, 1, 8}, From 0ba80e395663fe40738a8d192dd5bea3ad8f558c Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Wed, 2 Feb 2022 17:27:18 +0530 Subject: [PATCH 0528/1061] video: driver: misc video changes [1] Remove CAP_FLAG_ROOT flag. Root willbe identified with has_parents() api. [2] Replace field(struct msm_vidc_inst_cap) cap -> cap_id. [3] Rename below pool apis. msm_memory_alloc -> msm_memory_pool_alloc msm_memory_free -> msm_memory_pool_free [4] Remove struct msm_vidc_inst_cap_entry usage in inst. inst->firmware.list -> inst->firmware_list inst->children.list -> inst->children_list [5] Organize msm_vidc_inst_capability_type enums in such a way that all parents placed first then children. It will save CPU cycles while preparing caps_list. Change-Id: I376f4e6ddec37ce326c393fba133e19ba70bab09 Signed-off-by: Govindaraj Rajagopal --- driver/platform/diwali/src/msm_vidc_diwali.c | 270 +++++++++---------- driver/platform/kalama/src/msm_vidc_kalama.c | 96 +++---- driver/platform/waipio/src/msm_vidc_waipio.c | 90 +++---- driver/vidc/inc/msm_vidc_driver.h | 2 +- driver/vidc/inc/msm_vidc_inst.h | 6 +- driver/vidc/inc/msm_vidc_internal.h | 95 ++++--- driver/vidc/inc/msm_vidc_memory.h | 4 +- driver/vidc/inc/msm_vidc_platform.h | 2 +- driver/vidc/src/msm_vdec.c | 2 +- driver/vidc/src/msm_vidc.c | 4 +- driver/vidc/src/msm_vidc_control.c | 60 ++--- driver/vidc/src/msm_vidc_driver.c | 186 ++++++------- driver/vidc/src/msm_vidc_memory.c | 10 +- driver/vidc/src/venus_hfi_response.c | 4 +- 14 files changed, 415 insertions(+), 416 deletions(-) diff --git a/driver/platform/diwali/src/msm_vidc_diwali.c b/driver/platform/diwali/src/msm_vidc_diwali.c index 15888c1273..723f436f8d 100644 --- a/driver/platform/diwali/src/msm_vidc_diwali.c +++ b/driver/platform/diwali/src/msm_vidc_diwali.c @@ -259,7 +259,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v0[] = { */ MSM_VIDC_FMT_NV12C, 0, 0, - CAP_FLAG_ROOT, + 0, {0}, {META_ROI_INFO}}, {PIX_FMTS, ENC, HEVC, @@ -273,7 +273,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v0[] = { */ MSM_VIDC_FMT_NV12C, 0, 0, - CAP_FLAG_ROOT, + 0, {0}, {/* Do not change order of META_ROI_INFO, MIN_QUALITY, BLUR_TYPES * Since parent -> children relationship for these cap_ids is @@ -290,7 +290,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v0[] = { MSM_VIDC_FMT_P010 | MSM_VIDC_FMT_TP10C, MSM_VIDC_FMT_NV12C, 0, 0, - CAP_FLAG_ROOT, + 0, {0}, {PROFILE}}, @@ -313,7 +313,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v0[] = { 0, 64, 1, 4, V4L2_CID_MIN_BUFFERS_FOR_CAPTURE, HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + CAP_FLAG_OUTPUT_PORT}, /* (4096 * 2304) / 256 */ {MBPF, ENC, CODECS_ALL, 64, 36864, 1, 36864}, @@ -343,7 +343,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v0[] = { 1, (DEFAULT_FPS << 16), 0, HFI_PROP_FRAME_RATE, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + CAP_FLAG_OUTPUT_PORT, {0}, {0}, NULL, msm_vidc_set_q16}, @@ -396,7 +396,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v0[] = { 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_HFLIP, HFI_PROP_FLIP, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, {0}, {0}, @@ -418,7 +418,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v0[] = { 0, 270, 90, 0, V4L2_CID_ROTATE, HFI_PROP_ROTATION, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + CAP_FLAG_OUTPUT_PORT, {0}, {0}, NULL, msm_vidc_set_rotation}, @@ -441,7 +441,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v0[] = { V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE, V4L2_CID_MPEG_VIDEO_HEADER_MODE, HFI_PROP_SEQ_HEADER_MODE, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {0}, NULL, msm_vidc_set_header_mode}, @@ -463,7 +463,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v0[] = { 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE, HFI_PROP_NAL_LENGTH_FIELD, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + CAP_FLAG_OUTPUT_PORT, {0}, {0}, NULL, msm_vidc_set_nal_length}, @@ -508,7 +508,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v0[] = { V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, V4L2_CID_MPEG_VIDEO_BITRATE_MODE, HFI_PROP_RATE_CONTROL, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {LTR_COUNT, IR_RANDOM, TIME_DELTA_BASED_RC, I_FRAME_QP, P_FRAME_QP, B_FRAME_QP, ENH_LAYER_COUNT, BIT_RATE, @@ -526,7 +526,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v0[] = { V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, V4L2_CID_MPEG_VIDEO_BITRATE_MODE, HFI_PROP_RATE_CONTROL, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {LTR_COUNT, IR_RANDOM, TIME_DELTA_BASED_RC, I_FRAME_QP, P_FRAME_QP, B_FRAME_QP, CONSTANT_QUALITY, ENH_LAYER_COUNT, @@ -632,7 +632,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v0[] = { 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDC_VIDEO_VPE_CSC_CUSTOM_MATRIX, HFI_PROP_CSC_MATRIX, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + CAP_FLAG_OUTPUT_PORT, {0}, {0}, NULL, msm_vidc_set_csc_custom_matrix}, @@ -685,7 +685,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v0[] = { 0, MAX_BASE_LAYER_PRIORITY_ID, 1, 0, V4L2_CID_MPEG_VIDEO_BASELAYER_PRIORITY_ID, HFI_PROP_BASELAYER_PRIORITYID, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + CAP_FLAG_OUTPUT_PORT}, {IR_RANDOM, ENC, H264|HEVC, 0, INT_MAX, 1, 0, @@ -701,7 +701,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v0[] = { 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDEO_AU_DELIMITER, HFI_PROP_AUD, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + CAP_FLAG_OUTPUT_PORT, {0}, {0}, NULL, msm_vidc_set_u32}, @@ -781,7 +781,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v0[] = { MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, V4L2_CID_MPEG_VIDEO_H264_MIN_QP, HFI_PROP_MIN_QP_PACKED, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + CAP_FLAG_OUTPUT_PORT, {0}, {0}, NULL, msm_vidc_set_min_qp}, @@ -821,7 +821,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v0[] = { MIN_QP_8BIT, MAX_QP, 1, MAX_QP, V4L2_CID_MPEG_VIDEO_H264_MAX_QP, HFI_PROP_MAX_QP_PACKED, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + CAP_FLAG_OUTPUT_PORT, {0}, {0}, NULL, msm_vidc_set_max_qp}, @@ -1116,7 +1116,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v0[] = { V4L2_MPEG_VIDEO_H264_PROFILE_HIGH, V4L2_CID_MPEG_VIDEO_H264_PROFILE, HFI_PROP_PROFILE, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {ENTROPY_MODE, TRANSFORM_8X8}, NULL, msm_vidc_set_u32_enum}, @@ -1132,7 +1132,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v0[] = { V4L2_MPEG_VIDEO_H264_PROFILE_HIGH, V4L2_CID_MPEG_VIDEO_H264_PROFILE, HFI_PROP_PROFILE, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {ENTROPY_MODE}, NULL, msm_vidc_set_u32_enum}, @@ -1160,7 +1160,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v0[] = { V4L2_MPEG_VIDEO_VP9_PROFILE_0, V4L2_CID_MPEG_VIDEO_VP9_PROFILE, HFI_PROP_PROFILE, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {0}, NULL, msm_vidc_set_u32_enum}, @@ -1182,7 +1182,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v0[] = { V4L2_MPEG_VIDEO_VP9_LEVEL_5_2, V4L2_CID_MPEG_VIDEO_VP9_LEVEL, HFI_PROP_LEVEL, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {0}, NULL, msm_vidc_set_u32_enum}, @@ -1211,7 +1211,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v0[] = { V4L2_MPEG_VIDEO_H264_LEVEL_6_0, V4L2_CID_MPEG_VIDEO_H264_LEVEL, HFI_PROP_LEVEL, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {0}, NULL, msm_vidc_set_u32_enum}, @@ -1240,7 +1240,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v0[] = { V4L2_MPEG_VIDEO_H264_LEVEL_6_0, V4L2_CID_MPEG_VIDEO_H264_LEVEL, HFI_PROP_LEVEL, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {0}, NULL, msm_vidc_set_level}, @@ -1262,7 +1262,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v0[] = { V4L2_MPEG_VIDEO_HEVC_LEVEL_6, V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, HFI_PROP_LEVEL, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {0}, NULL, msm_vidc_set_u32_enum}, @@ -1283,7 +1283,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v0[] = { V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2, V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, HFI_PROP_LEVEL, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {0}, NULL, msm_vidc_set_level}, @@ -1300,7 +1300,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v0[] = { V4L2_MPEG_VIDEO_HEVC_TIER_HIGH, V4L2_CID_MPEG_VIDEO_HEVC_TIER, HFI_PROP_TIER, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {0}, NULL, msm_vidc_set_u32_enum}, @@ -1314,7 +1314,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v0[] = { V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED, V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_MODE, HFI_PROP_DEBLOCKING_MODE, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {0}, NULL, msm_vidc_set_deblock_mode}, @@ -1327,7 +1327,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v0[] = { V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_ENABLED, V4L2_CID_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE, HFI_PROP_DEBLOCKING_MODE, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {0}, NULL, msm_vidc_set_deblock_mode}, @@ -1379,7 +1379,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v0[] = { 1, V4L2_MPEG_MSM_VIDC_ENABLE, V4L2_CID_MPEG_VIDEO_MB_RC_ENABLE, 0, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + CAP_FLAG_OUTPUT_PORT}, {TRANSFORM_8X8, ENC, H264, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, @@ -1395,7 +1395,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v0[] = { 1, MAX_CHROMA_QP_OFFSET, V4L2_CID_MPEG_VIDEO_H264_CHROMA_QP_INDEX_OFFSET, HFI_PROP_CHROMA_QP_OFFSET, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + CAP_FLAG_OUTPUT_PORT, {0}, {0}, msm_vidc_adjust_chroma_qp_index_offset, msm_vidc_set_chroma_qp_index_offset}, @@ -1405,26 +1405,26 @@ static struct msm_platform_inst_capability instance_data_diwali_v0[] = { 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY_ENABLE, HFI_PROP_DECODE_ORDER_OUTPUT, - CAP_FLAG_ROOT | CAP_FLAG_INPUT_PORT}, + CAP_FLAG_INPUT_PORT}, {DISPLAY_DELAY, DEC, H264|HEVC|VP9, 0, 1, 1, 0, V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY, HFI_PROP_DECODE_ORDER_OUTPUT, - CAP_FLAG_ROOT | CAP_FLAG_INPUT_PORT}, + CAP_FLAG_INPUT_PORT}, /* conceal color */ {CONCEAL_COLOR_8BIT, DEC, CODECS_ALL, 0x0, 0xff3fcff, 1, DEFAULT_VIDEO_CONCEAL_COLOR_BLACK, V4L2_CID_MPEG_VIDEO_MUTE_YUV, HFI_PROP_CONCEAL_COLOR_8BIT, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + CAP_FLAG_OUTPUT_PORT}, {CONCEAL_COLOR_10BIT, DEC, CODECS_ALL, 0x0, 0x3fffffff, 1, DEFAULT_VIDEO_CONCEAL_COLOR_BLACK, V4L2_CID_MPEG_VIDEO_MUTE_YUV, HFI_PROP_CONCEAL_COLOR_10BIT, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + CAP_FLAG_OUTPUT_PORT}, // TODO {STAGE, DEC|ENC, CODECS_ALL, @@ -1433,7 +1433,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v0[] = { MSM_VIDC_STAGE_2, 0, HFI_PROP_STAGE, - CAP_FLAG_ROOT, + 0, {0}, {0}, NULL, msm_vidc_set_stage}, @@ -1453,7 +1453,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v0[] = { MSM_VIDC_PIPE_2, 0, HFI_PROP_PIPE, - CAP_FLAG_ROOT, + 0, {0}, {0}, NULL, msm_vidc_set_pipe}, {POC, DEC, H264, 0, 18, 1, 1}, @@ -1511,7 +1511,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v0[] = { 0, 2, 1, 1, V4L2_CID_MPEG_VIDC_PRIORITY, HFI_PROP_SESSION_PRIORITY, - CAP_FLAG_ROOT | CAP_FLAG_DYNAMIC_ALLOWED, + CAP_FLAG_DYNAMIC_ALLOWED, {0}, {0}, msm_vidc_adjust_session_priority, msm_vidc_set_session_priority}, @@ -1610,7 +1610,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v0[] = { 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_EVA_STATS, HFI_PROP_EVA_STAT_INFO, - CAP_FLAG_ROOT, + 0, {0}, {ENH_LAYER_COUNT}}, @@ -1686,7 +1686,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v0[] = { V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, V4L2_CID_MPEG_VIDEO_BITRATE_MODE, HFI_PROP_RATE_CONTROL, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {TIME_DELTA_BASED_RC, CONSTANT_QUALITY}, msm_vidc_adjust_bitrate_mode, msm_vidc_set_u32_enum}, @@ -1695,7 +1695,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v0[] = { 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDC_TIME_DELTA_BASED_RC, HFI_PROP_TIME_DELTA_BASED_RATE_CONTROL, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + CAP_FLAG_OUTPUT_PORT, {BITRATE_MODE}, {0}, msm_vidc_adjust_delta_based_rc, msm_vidc_set_u32}, {CONSTANT_QUALITY, ENC, HEIC, @@ -1711,14 +1711,14 @@ static struct msm_platform_inst_capability instance_data_diwali_v0[] = { 1, V4L2_MPEG_MSM_VIDC_ENABLE, 0, HFI_PROP_HEIC_GRID_ENABLE, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + CAP_FLAG_OUTPUT_PORT, {0}, {0}, NULL, msm_vidc_set_u32}, {GOP_SIZE, ENC, HEIC, 0, INT_MAX, 1, 0 /* all intra */, V4L2_CID_MPEG_VIDEO_GOP_SIZE, HFI_PROP_MAX_GOP_FRAMES, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, {0}, {0}, NULL, msm_vidc_set_u32}, @@ -1727,7 +1727,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v0[] = { 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDEO_B_FRAMES, HFI_PROP_MAX_B_FRAMES, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + CAP_FLAG_OUTPUT_PORT, {0}, {0}, NULL, msm_vidc_set_u32}, {PIX_FMTS, ENC, HEIC, @@ -1736,7 +1736,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v0[] = { MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_P010, MSM_VIDC_FMT_NV12, 0, 0, - CAP_FLAG_ROOT, + 0, {0}, {PROFILE}}, {HEVC_TIER, ENC|DEC, HEIC, @@ -1746,7 +1746,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v0[] = { V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, V4L2_CID_MPEG_VIDEO_HEVC_TIER, HFI_PROP_TIER, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {0}, NULL, msm_vidc_set_u32_enum}, @@ -1755,7 +1755,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v0[] = { 1, (MINIMUM_FPS << 16), 0, HFI_PROP_FRAME_RATE, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + CAP_FLAG_OUTPUT_PORT, {0}, {0}, NULL, msm_vidc_set_q16}, {META_SUBFRAME_OUTPUT, ENC, HEIC, @@ -1805,7 +1805,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v1[] = { */ MSM_VIDC_FMT_NV12C, 0, 0, - CAP_FLAG_ROOT, + 0, {0}, {META_ROI_INFO}}, {PIX_FMTS, ENC, HEVC, @@ -1819,7 +1819,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v1[] = { */ MSM_VIDC_FMT_NV12C, 0, 0, - CAP_FLAG_ROOT, + 0, {0}, {/* Do not change order of META_ROI_INFO, MIN_QUALITY, BLUR_TYPES * Since parent -> children relationship for these cap_ids is @@ -1836,7 +1836,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v1[] = { MSM_VIDC_FMT_P010 | MSM_VIDC_FMT_TP10C, MSM_VIDC_FMT_NV12C, 0, 0, - CAP_FLAG_ROOT, + 0, {0}, {PROFILE}}, @@ -1859,7 +1859,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v1[] = { 0, 64, 1, 4, V4L2_CID_MIN_BUFFERS_FOR_CAPTURE, HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + CAP_FLAG_OUTPUT_PORT}, /* (4096 * 2304) / 256 */ {MBPF, ENC, CODECS_ALL, 64, 36864, 1, 36864}, @@ -1885,7 +1885,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v1[] = { 1, (DEFAULT_FPS << 16), 0, HFI_PROP_FRAME_RATE, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + CAP_FLAG_OUTPUT_PORT, {0}, {0}, NULL, msm_vidc_set_q16}, @@ -1933,7 +1933,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v1[] = { 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_HFLIP, HFI_PROP_FLIP, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, {0}, {0}, @@ -1955,7 +1955,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v1[] = { 0, 270, 90, 0, V4L2_CID_ROTATE, HFI_PROP_ROTATION, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + CAP_FLAG_OUTPUT_PORT, {0}, {0}, NULL, msm_vidc_set_rotation}, @@ -1978,7 +1978,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v1[] = { V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE, V4L2_CID_MPEG_VIDEO_HEADER_MODE, HFI_PROP_SEQ_HEADER_MODE, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {0}, NULL, msm_vidc_set_header_mode}, @@ -2000,7 +2000,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v1[] = { 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE, HFI_PROP_NAL_LENGTH_FIELD, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + CAP_FLAG_OUTPUT_PORT, {0}, {0}, NULL, msm_vidc_set_nal_length}, @@ -2045,7 +2045,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v1[] = { V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, V4L2_CID_MPEG_VIDEO_BITRATE_MODE, HFI_PROP_RATE_CONTROL, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {LTR_COUNT, IR_RANDOM, TIME_DELTA_BASED_RC, I_FRAME_QP, P_FRAME_QP, B_FRAME_QP, ENH_LAYER_COUNT, BIT_RATE, @@ -2063,7 +2063,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v1[] = { V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, V4L2_CID_MPEG_VIDEO_BITRATE_MODE, HFI_PROP_RATE_CONTROL, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {LTR_COUNT, IR_RANDOM, TIME_DELTA_BASED_RC, I_FRAME_QP, P_FRAME_QP, B_FRAME_QP, CONSTANT_QUALITY, ENH_LAYER_COUNT, @@ -2169,7 +2169,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v1[] = { 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDC_VIDEO_VPE_CSC_CUSTOM_MATRIX, HFI_PROP_CSC_MATRIX, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + CAP_FLAG_OUTPUT_PORT, {0}, {0}, NULL, msm_vidc_set_csc_custom_matrix}, @@ -2222,7 +2222,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v1[] = { 0, MAX_BASE_LAYER_PRIORITY_ID, 1, 0, V4L2_CID_MPEG_VIDEO_BASELAYER_PRIORITY_ID, HFI_PROP_BASELAYER_PRIORITYID, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + CAP_FLAG_OUTPUT_PORT}, {IR_RANDOM, ENC, H264|HEVC, 0, INT_MAX, 1, 0, @@ -2238,7 +2238,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v1[] = { 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDEO_AU_DELIMITER, HFI_PROP_AUD, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + CAP_FLAG_OUTPUT_PORT, {0}, {0}, NULL, msm_vidc_set_u32}, @@ -2318,7 +2318,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v1[] = { MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, V4L2_CID_MPEG_VIDEO_H264_MIN_QP, HFI_PROP_MIN_QP_PACKED, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + CAP_FLAG_OUTPUT_PORT, {0}, {0}, NULL, msm_vidc_set_min_qp}, @@ -2358,7 +2358,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v1[] = { MIN_QP_8BIT, MAX_QP, 1, MAX_QP, V4L2_CID_MPEG_VIDEO_H264_MAX_QP, HFI_PROP_MAX_QP_PACKED, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + CAP_FLAG_OUTPUT_PORT, {0}, {0}, NULL, msm_vidc_set_max_qp}, @@ -2653,7 +2653,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v1[] = { V4L2_MPEG_VIDEO_H264_PROFILE_HIGH, V4L2_CID_MPEG_VIDEO_H264_PROFILE, HFI_PROP_PROFILE, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {ENTROPY_MODE, TRANSFORM_8X8}, NULL, msm_vidc_set_u32_enum}, @@ -2669,7 +2669,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v1[] = { V4L2_MPEG_VIDEO_H264_PROFILE_HIGH, V4L2_CID_MPEG_VIDEO_H264_PROFILE, HFI_PROP_PROFILE, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {ENTROPY_MODE}, NULL, msm_vidc_set_u32_enum}, @@ -2697,7 +2697,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v1[] = { V4L2_MPEG_VIDEO_VP9_PROFILE_0, V4L2_CID_MPEG_VIDEO_VP9_PROFILE, HFI_PROP_PROFILE, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {0}, NULL, msm_vidc_set_u32_enum}, @@ -2719,7 +2719,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v1[] = { V4L2_MPEG_VIDEO_VP9_LEVEL_5_2, V4L2_CID_MPEG_VIDEO_VP9_LEVEL, HFI_PROP_LEVEL, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {0}, NULL, msm_vidc_set_u32_enum}, @@ -2748,7 +2748,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v1[] = { V4L2_MPEG_VIDEO_H264_LEVEL_6_0, V4L2_CID_MPEG_VIDEO_H264_LEVEL, HFI_PROP_LEVEL, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {0}, NULL, msm_vidc_set_u32_enum}, @@ -2777,7 +2777,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v1[] = { V4L2_MPEG_VIDEO_H264_LEVEL_6_0, V4L2_CID_MPEG_VIDEO_H264_LEVEL, HFI_PROP_LEVEL, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {0}, NULL, msm_vidc_set_level}, @@ -2798,7 +2798,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v1[] = { V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2, V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, HFI_PROP_LEVEL, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {0}, NULL, msm_vidc_set_u32_enum}, @@ -2819,7 +2819,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v1[] = { V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2, V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, HFI_PROP_LEVEL, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {0}, NULL, msm_vidc_set_level}, @@ -2836,7 +2836,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v1[] = { V4L2_MPEG_VIDEO_HEVC_TIER_HIGH, V4L2_CID_MPEG_VIDEO_HEVC_TIER, HFI_PROP_TIER, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {0}, NULL, msm_vidc_set_u32_enum}, @@ -2850,7 +2850,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v1[] = { V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED, V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_MODE, HFI_PROP_DEBLOCKING_MODE, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {0}, NULL, msm_vidc_set_deblock_mode}, @@ -2863,7 +2863,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v1[] = { V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_ENABLED, V4L2_CID_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE, HFI_PROP_DEBLOCKING_MODE, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {0}, NULL, msm_vidc_set_deblock_mode}, @@ -2915,7 +2915,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v1[] = { 1, V4L2_MPEG_MSM_VIDC_ENABLE, V4L2_CID_MPEG_VIDEO_MB_RC_ENABLE, 0, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + CAP_FLAG_OUTPUT_PORT}, {TRANSFORM_8X8, ENC, H264, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, @@ -2931,7 +2931,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v1[] = { 1, MAX_CHROMA_QP_OFFSET, V4L2_CID_MPEG_VIDEO_H264_CHROMA_QP_INDEX_OFFSET, HFI_PROP_CHROMA_QP_OFFSET, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + CAP_FLAG_OUTPUT_PORT, {0}, {0}, msm_vidc_adjust_chroma_qp_index_offset, msm_vidc_set_chroma_qp_index_offset}, @@ -2941,26 +2941,26 @@ static struct msm_platform_inst_capability instance_data_diwali_v1[] = { 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY_ENABLE, HFI_PROP_DECODE_ORDER_OUTPUT, - CAP_FLAG_ROOT | CAP_FLAG_INPUT_PORT}, + CAP_FLAG_INPUT_PORT}, {DISPLAY_DELAY, DEC, H264|HEVC|VP9, 0, 1, 1, 0, V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY, HFI_PROP_DECODE_ORDER_OUTPUT, - CAP_FLAG_ROOT | CAP_FLAG_INPUT_PORT}, + CAP_FLAG_INPUT_PORT}, /* conceal color */ {CONCEAL_COLOR_8BIT, DEC, CODECS_ALL, 0x0, 0xff3fcff, 1, DEFAULT_VIDEO_CONCEAL_COLOR_BLACK, V4L2_CID_MPEG_VIDEO_MUTE_YUV, HFI_PROP_CONCEAL_COLOR_8BIT, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + CAP_FLAG_OUTPUT_PORT}, {CONCEAL_COLOR_10BIT, DEC, CODECS_ALL, 0x0, 0x3fffffff, 1, DEFAULT_VIDEO_CONCEAL_COLOR_BLACK, V4L2_CID_MPEG_VIDEO_MUTE_YUV, HFI_PROP_CONCEAL_COLOR_10BIT, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + CAP_FLAG_OUTPUT_PORT}, // TODO {STAGE, DEC|ENC, CODECS_ALL, @@ -2969,7 +2969,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v1[] = { MSM_VIDC_STAGE_2, 0, HFI_PROP_STAGE, - CAP_FLAG_ROOT, + 0, {0}, {0}, NULL, msm_vidc_set_stage}, @@ -2989,7 +2989,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v1[] = { MSM_VIDC_PIPE_2, 0, HFI_PROP_PIPE, - CAP_FLAG_ROOT, + 0, {0}, {0}, NULL, msm_vidc_set_pipe}, {POC, DEC, H264, 0, 18, 1, 1}, @@ -3047,7 +3047,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v1[] = { 0, 2, 1, 1, V4L2_CID_MPEG_VIDC_PRIORITY, HFI_PROP_SESSION_PRIORITY, - CAP_FLAG_ROOT | CAP_FLAG_DYNAMIC_ALLOWED, + CAP_FLAG_DYNAMIC_ALLOWED, {0}, {0}, msm_vidc_adjust_session_priority, msm_vidc_set_session_priority}, @@ -3146,7 +3146,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v1[] = { 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_EVA_STATS, HFI_PROP_EVA_STAT_INFO, - CAP_FLAG_ROOT, + 0, {0}, {ENH_LAYER_COUNT}}, @@ -3222,7 +3222,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v1[] = { V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, V4L2_CID_MPEG_VIDEO_BITRATE_MODE, HFI_PROP_RATE_CONTROL, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {TIME_DELTA_BASED_RC, CONSTANT_QUALITY}, msm_vidc_adjust_bitrate_mode, msm_vidc_set_u32_enum}, @@ -3231,7 +3231,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v1[] = { 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDC_TIME_DELTA_BASED_RC, HFI_PROP_TIME_DELTA_BASED_RATE_CONTROL, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + CAP_FLAG_OUTPUT_PORT, {BITRATE_MODE}, {0}, msm_vidc_adjust_delta_based_rc, msm_vidc_set_u32}, {CONSTANT_QUALITY, ENC, HEIC, @@ -3247,14 +3247,14 @@ static struct msm_platform_inst_capability instance_data_diwali_v1[] = { 1, V4L2_MPEG_MSM_VIDC_ENABLE, 0, HFI_PROP_HEIC_GRID_ENABLE, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + CAP_FLAG_OUTPUT_PORT, {0}, {0}, NULL, msm_vidc_set_u32}, {GOP_SIZE, ENC, HEIC, 0, INT_MAX, 1, 0 /* all intra */, V4L2_CID_MPEG_VIDEO_GOP_SIZE, HFI_PROP_MAX_GOP_FRAMES, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, {0}, {0}, NULL, msm_vidc_set_u32}, @@ -3263,7 +3263,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v1[] = { 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDEO_B_FRAMES, HFI_PROP_MAX_B_FRAMES, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + CAP_FLAG_OUTPUT_PORT, {0}, {0}, NULL, msm_vidc_set_u32}, {PIX_FMTS, ENC, HEIC, @@ -3272,7 +3272,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v1[] = { MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_P010, MSM_VIDC_FMT_NV12, 0, 0, - CAP_FLAG_ROOT, + 0, {0}, {PROFILE}}, {HEVC_TIER, ENC|DEC, HEIC, @@ -3282,7 +3282,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v1[] = { V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, V4L2_CID_MPEG_VIDEO_HEVC_TIER, HFI_PROP_TIER, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {0}, NULL, msm_vidc_set_u32_enum}, @@ -3291,7 +3291,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v1[] = { 1, (MINIMUM_FPS << 16), 0, HFI_PROP_FRAME_RATE, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + CAP_FLAG_OUTPUT_PORT, {0}, {0}, NULL, msm_vidc_set_q16}, {META_SUBFRAME_OUTPUT, ENC, HEIC, @@ -3341,7 +3341,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v2[] = { */ MSM_VIDC_FMT_NV12C, 0, 0, - CAP_FLAG_ROOT, + 0, {0}, {META_ROI_INFO}}, {PIX_FMTS, ENC, HEVC, @@ -3355,7 +3355,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v2[] = { */ MSM_VIDC_FMT_NV12C, 0, 0, - CAP_FLAG_ROOT, + 0, {0}, {/* Do not change order of META_ROI_INFO, MIN_QUALITY, BLUR_TYPES * Since parent -> children relationship for these cap_ids is @@ -3372,7 +3372,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v2[] = { MSM_VIDC_FMT_P010 | MSM_VIDC_FMT_TP10C, MSM_VIDC_FMT_NV12C, 0, 0, - CAP_FLAG_ROOT, + 0, {0}, {PROFILE}}, @@ -3395,7 +3395,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v2[] = { 0, 64, 1, 4, V4L2_CID_MIN_BUFFERS_FOR_CAPTURE, HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + CAP_FLAG_OUTPUT_PORT}, /* (4096 * 2304) / 256 */ {MBPF, ENC, CODECS_ALL, 64, 36864, 1, 36864}, @@ -3417,7 +3417,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v2[] = { 1, (DEFAULT_FPS << 16), 0, HFI_PROP_FRAME_RATE, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + CAP_FLAG_OUTPUT_PORT, {0}, {0}, NULL, msm_vidc_set_q16}, @@ -3465,7 +3465,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v2[] = { 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_HFLIP, HFI_PROP_FLIP, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, {0}, {0}, @@ -3487,7 +3487,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v2[] = { 0, 270, 90, 0, V4L2_CID_ROTATE, HFI_PROP_ROTATION, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + CAP_FLAG_OUTPUT_PORT, {0}, {0}, NULL, msm_vidc_set_rotation}, @@ -3510,7 +3510,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v2[] = { V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE, V4L2_CID_MPEG_VIDEO_HEADER_MODE, HFI_PROP_SEQ_HEADER_MODE, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {0}, NULL, msm_vidc_set_header_mode}, @@ -3532,7 +3532,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v2[] = { 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE, HFI_PROP_NAL_LENGTH_FIELD, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + CAP_FLAG_OUTPUT_PORT, {0}, {0}, NULL, msm_vidc_set_nal_length}, @@ -3577,7 +3577,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v2[] = { V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, V4L2_CID_MPEG_VIDEO_BITRATE_MODE, HFI_PROP_RATE_CONTROL, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {LTR_COUNT, IR_RANDOM, TIME_DELTA_BASED_RC, I_FRAME_QP, P_FRAME_QP, B_FRAME_QP, ENH_LAYER_COUNT, BIT_RATE, @@ -3595,7 +3595,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v2[] = { V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, V4L2_CID_MPEG_VIDEO_BITRATE_MODE, HFI_PROP_RATE_CONTROL, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {LTR_COUNT, IR_RANDOM, TIME_DELTA_BASED_RC, I_FRAME_QP, P_FRAME_QP, B_FRAME_QP, CONSTANT_QUALITY, ENH_LAYER_COUNT, @@ -3701,7 +3701,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v2[] = { 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDC_VIDEO_VPE_CSC_CUSTOM_MATRIX, HFI_PROP_CSC_MATRIX, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + CAP_FLAG_OUTPUT_PORT, {0}, {0}, NULL, msm_vidc_set_csc_custom_matrix}, @@ -3754,7 +3754,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v2[] = { 0, MAX_BASE_LAYER_PRIORITY_ID, 1, 0, V4L2_CID_MPEG_VIDEO_BASELAYER_PRIORITY_ID, HFI_PROP_BASELAYER_PRIORITYID, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + CAP_FLAG_OUTPUT_PORT}, {IR_RANDOM, ENC, H264|HEVC, 0, INT_MAX, 1, 0, @@ -3770,7 +3770,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v2[] = { 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDEO_AU_DELIMITER, HFI_PROP_AUD, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + CAP_FLAG_OUTPUT_PORT, {0}, {0}, NULL, msm_vidc_set_u32}, @@ -3850,7 +3850,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v2[] = { MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, V4L2_CID_MPEG_VIDEO_H264_MIN_QP, HFI_PROP_MIN_QP_PACKED, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + CAP_FLAG_OUTPUT_PORT, {0}, {0}, NULL, msm_vidc_set_min_qp}, @@ -3890,7 +3890,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v2[] = { MIN_QP_8BIT, MAX_QP, 1, MAX_QP, V4L2_CID_MPEG_VIDEO_H264_MAX_QP, HFI_PROP_MAX_QP_PACKED, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + CAP_FLAG_OUTPUT_PORT, {0}, {0}, NULL, msm_vidc_set_max_qp}, @@ -4185,7 +4185,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v2[] = { V4L2_MPEG_VIDEO_H264_PROFILE_HIGH, V4L2_CID_MPEG_VIDEO_H264_PROFILE, HFI_PROP_PROFILE, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {ENTROPY_MODE, TRANSFORM_8X8}, NULL, msm_vidc_set_u32_enum}, @@ -4201,7 +4201,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v2[] = { V4L2_MPEG_VIDEO_H264_PROFILE_HIGH, V4L2_CID_MPEG_VIDEO_H264_PROFILE, HFI_PROP_PROFILE, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {ENTROPY_MODE}, NULL, msm_vidc_set_u32_enum}, @@ -4229,7 +4229,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v2[] = { V4L2_MPEG_VIDEO_VP9_PROFILE_0, V4L2_CID_MPEG_VIDEO_VP9_PROFILE, HFI_PROP_PROFILE, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {0}, NULL, msm_vidc_set_u32_enum}, @@ -4250,7 +4250,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v2[] = { V4L2_MPEG_VIDEO_VP9_LEVEL_5_1, V4L2_CID_MPEG_VIDEO_VP9_LEVEL, HFI_PROP_LEVEL, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {0}, NULL, msm_vidc_set_u32_enum}, @@ -4278,7 +4278,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v2[] = { V4L2_MPEG_VIDEO_H264_LEVEL_5_2, V4L2_CID_MPEG_VIDEO_H264_LEVEL, HFI_PROP_LEVEL, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {0}, NULL, msm_vidc_set_u32_enum}, @@ -4306,7 +4306,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v2[] = { V4L2_MPEG_VIDEO_H264_LEVEL_5_2, V4L2_CID_MPEG_VIDEO_H264_LEVEL, HFI_PROP_LEVEL, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {0}, NULL, msm_vidc_set_level}, @@ -4326,7 +4326,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v2[] = { V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1, V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, HFI_PROP_LEVEL, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {0}, NULL, msm_vidc_set_u32_enum}, @@ -4346,7 +4346,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v2[] = { V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1, V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, HFI_PROP_LEVEL, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {0}, NULL, msm_vidc_set_level}, @@ -4363,7 +4363,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v2[] = { V4L2_MPEG_VIDEO_HEVC_TIER_HIGH, V4L2_CID_MPEG_VIDEO_HEVC_TIER, HFI_PROP_TIER, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {0}, NULL, msm_vidc_set_u32_enum}, @@ -4377,7 +4377,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v2[] = { V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED, V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_MODE, HFI_PROP_DEBLOCKING_MODE, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {0}, NULL, msm_vidc_set_deblock_mode}, @@ -4390,7 +4390,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v2[] = { V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_ENABLED, V4L2_CID_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE, HFI_PROP_DEBLOCKING_MODE, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {0}, NULL, msm_vidc_set_deblock_mode}, @@ -4442,7 +4442,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v2[] = { 1, V4L2_MPEG_MSM_VIDC_ENABLE, V4L2_CID_MPEG_VIDEO_MB_RC_ENABLE, 0, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + CAP_FLAG_OUTPUT_PORT}, {TRANSFORM_8X8, ENC, H264, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, @@ -4458,7 +4458,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v2[] = { 1, MAX_CHROMA_QP_OFFSET, V4L2_CID_MPEG_VIDEO_H264_CHROMA_QP_INDEX_OFFSET, HFI_PROP_CHROMA_QP_OFFSET, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + CAP_FLAG_OUTPUT_PORT, {0}, {0}, msm_vidc_adjust_chroma_qp_index_offset, msm_vidc_set_chroma_qp_index_offset}, @@ -4468,26 +4468,26 @@ static struct msm_platform_inst_capability instance_data_diwali_v2[] = { 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY_ENABLE, HFI_PROP_DECODE_ORDER_OUTPUT, - CAP_FLAG_ROOT | CAP_FLAG_INPUT_PORT}, + CAP_FLAG_INPUT_PORT}, {DISPLAY_DELAY, DEC, H264|HEVC|VP9, 0, 1, 1, 0, V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY, HFI_PROP_DECODE_ORDER_OUTPUT, - CAP_FLAG_ROOT | CAP_FLAG_INPUT_PORT}, + CAP_FLAG_INPUT_PORT}, /* conceal color */ {CONCEAL_COLOR_8BIT, DEC, CODECS_ALL, 0x0, 0xff3fcff, 1, DEFAULT_VIDEO_CONCEAL_COLOR_BLACK, V4L2_CID_MPEG_VIDEO_MUTE_YUV, HFI_PROP_CONCEAL_COLOR_8BIT, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + CAP_FLAG_OUTPUT_PORT}, {CONCEAL_COLOR_10BIT, DEC, CODECS_ALL, 0x0, 0x3fffffff, 1, DEFAULT_VIDEO_CONCEAL_COLOR_BLACK, V4L2_CID_MPEG_VIDEO_MUTE_YUV, HFI_PROP_CONCEAL_COLOR_10BIT, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + CAP_FLAG_OUTPUT_PORT}, // TODO {STAGE, DEC|ENC, CODECS_ALL, @@ -4496,7 +4496,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v2[] = { MSM_VIDC_STAGE_2, 0, HFI_PROP_STAGE, - CAP_FLAG_ROOT, + 0, {0}, {0}, NULL, msm_vidc_set_stage}, @@ -4516,7 +4516,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v2[] = { MSM_VIDC_PIPE_2, 0, HFI_PROP_PIPE, - CAP_FLAG_ROOT, + 0, {0}, {0}, NULL, msm_vidc_set_pipe}, {POC, DEC, H264, 0, 18, 1, 1}, @@ -4574,7 +4574,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v2[] = { 0, 2, 1, 1, V4L2_CID_MPEG_VIDC_PRIORITY, HFI_PROP_SESSION_PRIORITY, - CAP_FLAG_ROOT | CAP_FLAG_DYNAMIC_ALLOWED, + CAP_FLAG_DYNAMIC_ALLOWED, {0}, {0}, msm_vidc_adjust_session_priority, msm_vidc_set_session_priority}, @@ -4673,7 +4673,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v2[] = { 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_EVA_STATS, HFI_PROP_EVA_STAT_INFO, - CAP_FLAG_ROOT, + 0, {0}, {ENH_LAYER_COUNT}}, @@ -4749,7 +4749,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v2[] = { V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, V4L2_CID_MPEG_VIDEO_BITRATE_MODE, HFI_PROP_RATE_CONTROL, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {TIME_DELTA_BASED_RC, CONSTANT_QUALITY}, msm_vidc_adjust_bitrate_mode, msm_vidc_set_u32_enum}, @@ -4758,7 +4758,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v2[] = { 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDC_TIME_DELTA_BASED_RC, HFI_PROP_TIME_DELTA_BASED_RATE_CONTROL, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + CAP_FLAG_OUTPUT_PORT, {BITRATE_MODE}, {0}, msm_vidc_adjust_delta_based_rc, msm_vidc_set_u32}, {CONSTANT_QUALITY, ENC, HEIC, @@ -4774,14 +4774,14 @@ static struct msm_platform_inst_capability instance_data_diwali_v2[] = { 1, V4L2_MPEG_MSM_VIDC_ENABLE, 0, HFI_PROP_HEIC_GRID_ENABLE, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + CAP_FLAG_OUTPUT_PORT, {0}, {0}, NULL, msm_vidc_set_u32}, {GOP_SIZE, ENC, HEIC, 0, INT_MAX, 1, 0 /* all intra */, V4L2_CID_MPEG_VIDEO_GOP_SIZE, HFI_PROP_MAX_GOP_FRAMES, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, {0}, {0}, NULL, msm_vidc_set_u32}, @@ -4790,7 +4790,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v2[] = { 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDEO_B_FRAMES, HFI_PROP_MAX_B_FRAMES, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + CAP_FLAG_OUTPUT_PORT, {0}, {0}, NULL, msm_vidc_set_u32}, {PIX_FMTS, ENC, HEIC, @@ -4799,7 +4799,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v2[] = { MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_P010, MSM_VIDC_FMT_NV12, 0, 0, - CAP_FLAG_ROOT, + 0, {0}, {PROFILE}}, {HEVC_TIER, ENC|DEC, HEIC, @@ -4809,7 +4809,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v2[] = { V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, V4L2_CID_MPEG_VIDEO_HEVC_TIER, HFI_PROP_TIER, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {0}, NULL, msm_vidc_set_u32_enum}, @@ -4818,7 +4818,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v2[] = { 1, (MINIMUM_FPS << 16), 0, HFI_PROP_FRAME_RATE, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + CAP_FLAG_OUTPUT_PORT, {0}, {0}, NULL, msm_vidc_set_q16}, {META_SUBFRAME_OUTPUT, ENC, HEIC, diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index 182731ea2f..3661ea221a 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -141,7 +141,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { */ MSM_VIDC_FMT_NV12C, 0, 0, - CAP_FLAG_ROOT, + 0, {0}, {META_ROI_INFO}}, {PIX_FMTS, ENC, HEVC, @@ -155,7 +155,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { */ MSM_VIDC_FMT_NV12C, 0, 0, - CAP_FLAG_ROOT, + 0, {0}, {/* Do not change order of META_ROI_INFO, MIN_QUALITY, BLUR_TYPES * Since parent -> children relationship for these cap_ids is @@ -172,7 +172,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { MSM_VIDC_FMT_P010 | MSM_VIDC_FMT_TP10C, MSM_VIDC_FMT_NV12C, 0, 0, - CAP_FLAG_ROOT, + 0, {0}, {PROFILE}}, @@ -202,7 +202,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { 0, 64, 1, 4, V4L2_CID_MIN_BUFFERS_FOR_CAPTURE, HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + CAP_FLAG_OUTPUT_PORT}, /* (8192 * 4320) / 256 */ {MBPF, ENC, CODECS_ALL, 64, 138240, 1, 138240}, @@ -231,7 +231,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { 1, (DEFAULT_FPS << 16), 0, HFI_PROP_FRAME_RATE, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + CAP_FLAG_OUTPUT_PORT, {0}, {0}, NULL, msm_vidc_set_q16}, @@ -279,7 +279,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_HFLIP, HFI_PROP_FLIP, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, {0}, {0}, @@ -301,7 +301,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { 0, 270, 90, 0, V4L2_CID_ROTATE, HFI_PROP_ROTATION, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + CAP_FLAG_OUTPUT_PORT, {0}, {0}, NULL, msm_vidc_set_rotation}, @@ -324,7 +324,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE, V4L2_CID_MPEG_VIDEO_HEADER_MODE, HFI_PROP_SEQ_HEADER_MODE, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {0}, NULL, msm_vidc_set_header_mode}, @@ -346,7 +346,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE, HFI_PROP_NAL_LENGTH_FIELD, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + CAP_FLAG_OUTPUT_PORT, {0}, {0}, NULL, msm_vidc_set_nal_length}, @@ -397,7 +397,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, V4L2_CID_MPEG_VIDEO_BITRATE_MODE, HFI_PROP_RATE_CONTROL, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {LTR_COUNT, IR_RANDOM, TIME_DELTA_BASED_RC, I_FRAME_QP, P_FRAME_QP, B_FRAME_QP, ENH_LAYER_COUNT, BIT_RATE, @@ -415,7 +415,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, V4L2_CID_MPEG_VIDEO_BITRATE_MODE, HFI_PROP_RATE_CONTROL, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {LTR_COUNT, IR_RANDOM, TIME_DELTA_BASED_RC, I_FRAME_QP, P_FRAME_QP, B_FRAME_QP, CONSTANT_QUALITY, ENH_LAYER_COUNT, @@ -512,7 +512,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDC_VIDEO_VPE_CSC_CUSTOM_MATRIX, HFI_PROP_CSC_MATRIX, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + CAP_FLAG_OUTPUT_PORT, {0}, {0}, NULL, msm_vidc_set_csc_custom_matrix}, @@ -565,7 +565,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { 0, MAX_BASE_LAYER_PRIORITY_ID, 1, 0, V4L2_CID_MPEG_VIDEO_BASELAYER_PRIORITY_ID, HFI_PROP_BASELAYER_PRIORITYID, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + CAP_FLAG_OUTPUT_PORT}, {IR_RANDOM, ENC, H264|HEVC, 0, INT_MAX, 1, 0, @@ -581,7 +581,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDEO_AU_DELIMITER, HFI_PROP_AUD, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + CAP_FLAG_OUTPUT_PORT, {0}, {0}, NULL, msm_vidc_set_u32}, @@ -661,7 +661,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, V4L2_CID_MPEG_VIDEO_H264_MIN_QP, HFI_PROP_MIN_QP_PACKED, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + CAP_FLAG_OUTPUT_PORT, {0}, {0}, NULL, msm_vidc_set_min_qp}, @@ -701,7 +701,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { MIN_QP_8BIT, MAX_QP, 1, MAX_QP, V4L2_CID_MPEG_VIDEO_H264_MAX_QP, HFI_PROP_MAX_QP_PACKED, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + CAP_FLAG_OUTPUT_PORT, {0}, {0}, NULL, msm_vidc_set_max_qp}, @@ -1001,7 +1001,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { V4L2_MPEG_VIDEO_H264_PROFILE_HIGH, V4L2_CID_MPEG_VIDEO_H264_PROFILE, HFI_PROP_PROFILE, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {ENTROPY_MODE, TRANSFORM_8X8}, NULL, msm_vidc_set_u32_enum}, @@ -1017,7 +1017,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { V4L2_MPEG_VIDEO_H264_PROFILE_HIGH, V4L2_CID_MPEG_VIDEO_H264_PROFILE, HFI_PROP_PROFILE, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {ENTROPY_MODE}, NULL, msm_vidc_set_u32_enum}, @@ -1045,7 +1045,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { V4L2_MPEG_VIDEO_VP9_PROFILE_0, V4L2_CID_MPEG_VIDEO_VP9_PROFILE, HFI_PROP_PROFILE, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {0}, NULL, msm_vidc_set_u32_enum}, @@ -1068,7 +1068,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { V4L2_MPEG_VIDEO_VP9_LEVEL_6_0, V4L2_CID_MPEG_VIDEO_VP9_LEVEL, HFI_PROP_LEVEL, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {0}, NULL, msm_vidc_set_u32_enum}, @@ -1080,7 +1080,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { V4L2_MPEG_VIDEO_AV1_PROFILE_MAIN, V4L2_CID_MPEG_VIDEO_AV1_PROFILE, HFI_PROP_PROFILE, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {0}, NULL, msm_vidc_set_u32_enum}, @@ -1109,7 +1109,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { V4L2_MPEG_VIDEO_AV1_LEVEL_6_1, V4L2_CID_MPEG_VIDEO_AV1_LEVEL, HFI_PROP_LEVEL, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {0}, NULL, msm_vidc_set_u32_enum}, @@ -1122,7 +1122,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { V4L2_MPEG_VIDEO_AV1_TIER_HIGH, V4L2_CID_MPEG_VIDEO_AV1_TIER, HFI_PROP_TIER, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {0}, NULL, msm_vidc_set_u32_enum}, @@ -1152,7 +1152,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { V4L2_MPEG_VIDEO_H264_LEVEL_6_1, V4L2_CID_MPEG_VIDEO_H264_LEVEL, HFI_PROP_LEVEL, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {0}, NULL, msm_vidc_set_u32_enum}, @@ -1181,7 +1181,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { V4L2_MPEG_VIDEO_H264_LEVEL_5_0, V4L2_CID_MPEG_VIDEO_H264_LEVEL, HFI_PROP_LEVEL, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {0}, NULL, msm_vidc_set_level}, @@ -1204,7 +1204,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1, V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, HFI_PROP_LEVEL, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {0}, NULL, msm_vidc_set_u32_enum}, @@ -1226,7 +1226,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { V4L2_MPEG_VIDEO_HEVC_LEVEL_5, V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, HFI_PROP_LEVEL, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {0}, NULL, msm_vidc_set_level}, @@ -1243,7 +1243,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { V4L2_MPEG_VIDEO_HEVC_TIER_HIGH, V4L2_CID_MPEG_VIDEO_HEVC_TIER, HFI_PROP_TIER, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {0}, NULL, msm_vidc_set_u32_enum}, @@ -1257,7 +1257,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED, V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_MODE, HFI_PROP_DEBLOCKING_MODE, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {0}, NULL, msm_vidc_set_deblock_mode}, @@ -1270,7 +1270,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_ENABLED, V4L2_CID_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE, HFI_PROP_DEBLOCKING_MODE, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {0}, NULL, msm_vidc_set_deblock_mode}, @@ -1322,7 +1322,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { 1, V4L2_MPEG_MSM_VIDC_ENABLE, V4L2_CID_MPEG_VIDEO_MB_RC_ENABLE, 0, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + CAP_FLAG_OUTPUT_PORT}, {TRANSFORM_8X8, ENC, H264, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, @@ -1338,7 +1338,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { 1, MAX_CHROMA_QP_OFFSET, V4L2_CID_MPEG_VIDEO_H264_CHROMA_QP_INDEX_OFFSET, HFI_PROP_CHROMA_QP_OFFSET, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + CAP_FLAG_OUTPUT_PORT, {0}, {0}, msm_vidc_adjust_chroma_qp_index_offset, msm_vidc_set_chroma_qp_index_offset}, @@ -1348,26 +1348,26 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY_ENABLE, HFI_PROP_DECODE_ORDER_OUTPUT, - CAP_FLAG_ROOT | CAP_FLAG_INPUT_PORT}, + CAP_FLAG_INPUT_PORT}, {DISPLAY_DELAY, DEC, H264|HEVC|VP9|AV1, 0, 1, 1, 0, V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY, HFI_PROP_DECODE_ORDER_OUTPUT, - CAP_FLAG_ROOT | CAP_FLAG_INPUT_PORT}, + CAP_FLAG_INPUT_PORT}, /* conceal color */ {CONCEAL_COLOR_8BIT, DEC, CODECS_ALL, 0x0, 0xff3fcff, 1, DEFAULT_VIDEO_CONCEAL_COLOR_BLACK, V4L2_CID_MPEG_VIDEO_MUTE_YUV, HFI_PROP_CONCEAL_COLOR_8BIT, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + CAP_FLAG_OUTPUT_PORT}, {CONCEAL_COLOR_10BIT, DEC, CODECS_ALL, 0x0, 0x3fffffff, 1, DEFAULT_VIDEO_CONCEAL_COLOR_BLACK, V4L2_CID_MPEG_VIDEO_MUTE_YUV, HFI_PROP_CONCEAL_COLOR_10BIT, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + CAP_FLAG_OUTPUT_PORT}, // TODO {STAGE, DEC|ENC, CODECS_ALL, @@ -1376,7 +1376,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { MSM_VIDC_STAGE_2, 0, HFI_PROP_STAGE, - CAP_FLAG_ROOT, + 0, {0}, {0}, NULL, msm_vidc_set_stage}, @@ -1396,7 +1396,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { MSM_VIDC_PIPE_4, 0, HFI_PROP_PIPE, - CAP_FLAG_ROOT, + 0, {0}, {0}, NULL, msm_vidc_set_pipe}, {POC, DEC, H264, 0, 18, 1, 1}, @@ -1454,7 +1454,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { 0, 2, 1, 1, V4L2_CID_MPEG_VIDC_PRIORITY, HFI_PROP_SESSION_PRIORITY, - CAP_FLAG_ROOT | CAP_FLAG_DYNAMIC_ALLOWED, + CAP_FLAG_DYNAMIC_ALLOWED, {0}, {0}, msm_vidc_adjust_session_priority, msm_vidc_set_session_priority}, @@ -1590,7 +1590,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_EVA_STATS, HFI_PROP_EVA_STAT_INFO, - CAP_FLAG_ROOT, + 0, {0}, {ENH_LAYER_COUNT}}, @@ -1666,7 +1666,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, V4L2_CID_MPEG_VIDEO_BITRATE_MODE, HFI_PROP_RATE_CONTROL, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {TIME_DELTA_BASED_RC, CONSTANT_QUALITY}, msm_vidc_adjust_bitrate_mode, msm_vidc_set_u32_enum}, @@ -1675,7 +1675,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDC_TIME_DELTA_BASED_RC, HFI_PROP_TIME_DELTA_BASED_RATE_CONTROL, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + CAP_FLAG_OUTPUT_PORT, {BITRATE_MODE}, {0}, msm_vidc_adjust_delta_based_rc, msm_vidc_set_u32}, {CONSTANT_QUALITY, ENC, HEIC, @@ -1691,14 +1691,14 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { 1, V4L2_MPEG_MSM_VIDC_ENABLE, 0, HFI_PROP_HEIC_GRID_ENABLE, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + CAP_FLAG_OUTPUT_PORT, {0}, {0}, NULL, msm_vidc_set_u32}, {GOP_SIZE, ENC, HEIC, 0, INT_MAX, 1, 0 /* all intra */, V4L2_CID_MPEG_VIDEO_GOP_SIZE, HFI_PROP_MAX_GOP_FRAMES, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, {0}, {0}, NULL, msm_vidc_set_u32}, @@ -1707,7 +1707,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDEO_B_FRAMES, HFI_PROP_MAX_B_FRAMES, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + CAP_FLAG_OUTPUT_PORT, {0}, {0}, NULL, msm_vidc_set_u32}, {PIX_FMTS, ENC, HEIC, @@ -1716,7 +1716,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_P010, MSM_VIDC_FMT_NV12, 0, 0, - CAP_FLAG_ROOT, + 0, {0}, {PROFILE}}, {HEVC_TIER, ENC|DEC, HEIC, @@ -1726,7 +1726,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, V4L2_CID_MPEG_VIDEO_HEVC_TIER, HFI_PROP_TIER, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {0}, NULL, msm_vidc_set_u32_enum}, @@ -1735,7 +1735,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { 1, (MINIMUM_FPS << 16), 0, HFI_PROP_FRAME_RATE, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + CAP_FLAG_OUTPUT_PORT, {0}, {0}, NULL, msm_vidc_set_q16}, {META_SUBFRAME_OUTPUT, ENC, HEIC, diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 7ee4964e0e..715037c656 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -137,7 +137,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { */ MSM_VIDC_FMT_NV12C, 0, 0, - CAP_FLAG_ROOT, + 0, {0}, {META_ROI_INFO}}, {PIX_FMTS, ENC, HEVC, @@ -151,7 +151,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { */ MSM_VIDC_FMT_NV12C, 0, 0, - CAP_FLAG_ROOT, + 0, {0}, {/* Do not change order of META_ROI_INFO, MIN_QUALITY, BLUR_TYPES * Since parent -> children relationship for these cap_ids is @@ -168,7 +168,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { MSM_VIDC_FMT_P010 | MSM_VIDC_FMT_TP10C, MSM_VIDC_FMT_NV12C, 0, 0, - CAP_FLAG_ROOT, + 0, {0}, {PROFILE}}, @@ -191,7 +191,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 0, 64, 1, 4, V4L2_CID_MIN_BUFFERS_FOR_CAPTURE, HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + CAP_FLAG_OUTPUT_PORT}, /* (8192 * 4320) / 256 */ {MBPF, ENC, CODECS_ALL, 64, 138240, 1, 138240}, @@ -220,7 +220,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 1, (DEFAULT_FPS << 16), 0, HFI_PROP_FRAME_RATE, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + CAP_FLAG_OUTPUT_PORT, {0}, {0}, NULL, msm_vidc_set_q16}, @@ -273,7 +273,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_HFLIP, HFI_PROP_FLIP, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, {0}, {0}, @@ -295,7 +295,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 0, 270, 90, 0, V4L2_CID_ROTATE, HFI_PROP_ROTATION, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + CAP_FLAG_OUTPUT_PORT, {0}, {0}, NULL, msm_vidc_set_rotation}, @@ -318,7 +318,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE, V4L2_CID_MPEG_VIDEO_HEADER_MODE, HFI_PROP_SEQ_HEADER_MODE, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {0}, NULL, msm_vidc_set_header_mode}, @@ -340,7 +340,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE, HFI_PROP_NAL_LENGTH_FIELD, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + CAP_FLAG_OUTPUT_PORT, {0}, {0}, NULL, msm_vidc_set_nal_length}, @@ -385,7 +385,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, V4L2_CID_MPEG_VIDEO_BITRATE_MODE, HFI_PROP_RATE_CONTROL, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {LTR_COUNT, IR_RANDOM, TIME_DELTA_BASED_RC, I_FRAME_QP, P_FRAME_QP, B_FRAME_QP, ENH_LAYER_COUNT, BIT_RATE, @@ -403,7 +403,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, V4L2_CID_MPEG_VIDEO_BITRATE_MODE, HFI_PROP_RATE_CONTROL, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {LTR_COUNT, IR_RANDOM, TIME_DELTA_BASED_RC, I_FRAME_QP, P_FRAME_QP, B_FRAME_QP, CONSTANT_QUALITY, ENH_LAYER_COUNT, @@ -499,7 +499,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDC_VIDEO_VPE_CSC_CUSTOM_MATRIX, HFI_PROP_CSC_MATRIX, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + CAP_FLAG_OUTPUT_PORT, {0}, {0}, NULL, msm_vidc_set_csc_custom_matrix}, @@ -552,7 +552,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 0, MAX_BASE_LAYER_PRIORITY_ID, 1, 0, V4L2_CID_MPEG_VIDEO_BASELAYER_PRIORITY_ID, HFI_PROP_BASELAYER_PRIORITYID, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + CAP_FLAG_OUTPUT_PORT}, {IR_RANDOM, ENC, H264|HEVC, 0, INT_MAX, 1, 0, @@ -568,7 +568,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDEO_AU_DELIMITER, HFI_PROP_AUD, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + CAP_FLAG_OUTPUT_PORT, {0}, {0}, NULL, msm_vidc_set_u32}, @@ -648,7 +648,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, V4L2_CID_MPEG_VIDEO_H264_MIN_QP, HFI_PROP_MIN_QP_PACKED, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + CAP_FLAG_OUTPUT_PORT, {0}, {0}, NULL, msm_vidc_set_min_qp}, @@ -688,7 +688,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { MIN_QP_8BIT, MAX_QP, 1, MAX_QP, V4L2_CID_MPEG_VIDEO_H264_MAX_QP, HFI_PROP_MAX_QP_PACKED, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + CAP_FLAG_OUTPUT_PORT, {0}, {0}, NULL, msm_vidc_set_max_qp}, @@ -983,7 +983,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_MPEG_VIDEO_H264_PROFILE_HIGH, V4L2_CID_MPEG_VIDEO_H264_PROFILE, HFI_PROP_PROFILE, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {ENTROPY_MODE, TRANSFORM_8X8}, NULL, msm_vidc_set_u32_enum}, @@ -999,7 +999,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_MPEG_VIDEO_H264_PROFILE_HIGH, V4L2_CID_MPEG_VIDEO_H264_PROFILE, HFI_PROP_PROFILE, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {ENTROPY_MODE}, NULL, msm_vidc_set_u32_enum}, @@ -1027,7 +1027,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_MPEG_VIDEO_VP9_PROFILE_0, V4L2_CID_MPEG_VIDEO_VP9_PROFILE, HFI_PROP_PROFILE, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {0}, NULL, msm_vidc_set_u32_enum}, @@ -1050,7 +1050,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_MPEG_VIDEO_VP9_LEVEL_6_0, V4L2_CID_MPEG_VIDEO_VP9_LEVEL, HFI_PROP_LEVEL, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {0}, NULL, msm_vidc_set_u32_enum}, @@ -1080,7 +1080,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_MPEG_VIDEO_H264_LEVEL_6_1, V4L2_CID_MPEG_VIDEO_H264_LEVEL, HFI_PROP_LEVEL, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {0}, NULL, msm_vidc_set_u32_enum}, @@ -1109,7 +1109,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_MPEG_VIDEO_H264_LEVEL_5_0, V4L2_CID_MPEG_VIDEO_H264_LEVEL, HFI_PROP_LEVEL, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {0}, NULL, msm_vidc_set_level}, @@ -1132,7 +1132,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1, V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, HFI_PROP_LEVEL, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {0}, NULL, msm_vidc_set_u32_enum}, @@ -1154,7 +1154,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_MPEG_VIDEO_HEVC_LEVEL_5, V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, HFI_PROP_LEVEL, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {0}, NULL, msm_vidc_set_level}, @@ -1171,7 +1171,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_MPEG_VIDEO_HEVC_TIER_HIGH, V4L2_CID_MPEG_VIDEO_HEVC_TIER, HFI_PROP_TIER, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {0}, NULL, msm_vidc_set_u32_enum}, @@ -1185,7 +1185,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED, V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_MODE, HFI_PROP_DEBLOCKING_MODE, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {0}, NULL, msm_vidc_set_deblock_mode}, @@ -1198,7 +1198,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_ENABLED, V4L2_CID_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE, HFI_PROP_DEBLOCKING_MODE, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {0}, NULL, msm_vidc_set_deblock_mode}, @@ -1250,7 +1250,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 1, V4L2_MPEG_MSM_VIDC_ENABLE, V4L2_CID_MPEG_VIDEO_MB_RC_ENABLE, 0, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + CAP_FLAG_OUTPUT_PORT}, {TRANSFORM_8X8, ENC, H264, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, @@ -1266,7 +1266,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 1, MAX_CHROMA_QP_OFFSET, V4L2_CID_MPEG_VIDEO_H264_CHROMA_QP_INDEX_OFFSET, HFI_PROP_CHROMA_QP_OFFSET, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + CAP_FLAG_OUTPUT_PORT, {0}, {0}, msm_vidc_adjust_chroma_qp_index_offset, msm_vidc_set_chroma_qp_index_offset}, @@ -1276,26 +1276,26 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY_ENABLE, HFI_PROP_DECODE_ORDER_OUTPUT, - CAP_FLAG_ROOT | CAP_FLAG_INPUT_PORT}, + CAP_FLAG_INPUT_PORT}, {DISPLAY_DELAY, DEC, H264|HEVC|VP9, 0, 1, 1, 0, V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY, HFI_PROP_DECODE_ORDER_OUTPUT, - CAP_FLAG_ROOT | CAP_FLAG_INPUT_PORT}, + CAP_FLAG_INPUT_PORT}, /* conceal color */ {CONCEAL_COLOR_8BIT, DEC, CODECS_ALL, 0x0, 0xff3fcff, 1, DEFAULT_VIDEO_CONCEAL_COLOR_BLACK, V4L2_CID_MPEG_VIDEO_MUTE_YUV, HFI_PROP_CONCEAL_COLOR_8BIT, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + CAP_FLAG_OUTPUT_PORT}, {CONCEAL_COLOR_10BIT, DEC, CODECS_ALL, 0x0, 0x3fffffff, 1, DEFAULT_VIDEO_CONCEAL_COLOR_BLACK, V4L2_CID_MPEG_VIDEO_MUTE_YUV, HFI_PROP_CONCEAL_COLOR_10BIT, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT}, + CAP_FLAG_OUTPUT_PORT}, // TODO {STAGE, DEC|ENC, CODECS_ALL, @@ -1304,7 +1304,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { MSM_VIDC_STAGE_2, 0, HFI_PROP_STAGE, - CAP_FLAG_ROOT, + 0, {0}, {0}, NULL, msm_vidc_set_stage}, @@ -1324,7 +1324,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { MSM_VIDC_PIPE_4, 0, HFI_PROP_PIPE, - CAP_FLAG_ROOT, + 0, {0}, {0}, NULL, msm_vidc_set_pipe}, {POC, DEC, H264, 0, 18, 1, 1}, @@ -1382,7 +1382,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 0, 2, 1, 1, V4L2_CID_MPEG_VIDC_PRIORITY, HFI_PROP_SESSION_PRIORITY, - CAP_FLAG_ROOT | CAP_FLAG_DYNAMIC_ALLOWED, + CAP_FLAG_DYNAMIC_ALLOWED, {0}, {0}, msm_vidc_adjust_session_priority, msm_vidc_set_session_priority}, @@ -1481,7 +1481,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_EVA_STATS, HFI_PROP_EVA_STAT_INFO, - CAP_FLAG_ROOT, + 0, {0}, {ENH_LAYER_COUNT}}, @@ -1557,7 +1557,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, V4L2_CID_MPEG_VIDEO_BITRATE_MODE, HFI_PROP_RATE_CONTROL, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {TIME_DELTA_BASED_RC, CONSTANT_QUALITY}, msm_vidc_adjust_bitrate_mode, msm_vidc_set_u32_enum}, @@ -1566,7 +1566,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDC_TIME_DELTA_BASED_RC, HFI_PROP_TIME_DELTA_BASED_RATE_CONTROL, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + CAP_FLAG_OUTPUT_PORT, {BITRATE_MODE}, {0}, msm_vidc_adjust_delta_based_rc, msm_vidc_set_u32}, {CONSTANT_QUALITY, ENC, HEIC, @@ -1582,14 +1582,14 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 1, V4L2_MPEG_MSM_VIDC_ENABLE, 0, HFI_PROP_HEIC_GRID_ENABLE, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + CAP_FLAG_OUTPUT_PORT, {0}, {0}, NULL, msm_vidc_set_u32}, {GOP_SIZE, ENC, HEIC, 0, INT_MAX, 1, 0 /* all intra */, V4L2_CID_MPEG_VIDEO_GOP_SIZE, HFI_PROP_MAX_GOP_FRAMES, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, {0}, {0}, NULL, msm_vidc_set_u32}, @@ -1598,7 +1598,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDEO_B_FRAMES, HFI_PROP_MAX_B_FRAMES, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + CAP_FLAG_OUTPUT_PORT, {0}, {0}, NULL, msm_vidc_set_u32}, {PIX_FMTS, ENC, HEIC, @@ -1607,7 +1607,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_P010, MSM_VIDC_FMT_NV12, 0, 0, - CAP_FLAG_ROOT, + 0, {0}, {PROFILE}}, {HEVC_TIER, ENC|DEC, HEIC, @@ -1617,7 +1617,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, V4L2_CID_MPEG_VIDEO_HEVC_TIER, HFI_PROP_TIER, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, {0}, NULL, msm_vidc_set_u32_enum}, @@ -1626,7 +1626,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 1, (MINIMUM_FPS << 16), 0, HFI_PROP_FRAME_RATE, - CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT, + CAP_FLAG_OUTPUT_PORT, {0}, {0}, NULL, msm_vidc_set_q16}, {META_SUBFRAME_OUTPUT, ENC, HEIC, diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index af043699f4..b44dd63416 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -252,7 +252,7 @@ static inline bool is_secure_region(enum msm_vidc_buffer_region region) region == MSM_VIDC_NON_SECURE_PIXEL); } -const char *cap_name(enum msm_vidc_inst_capability_type cap); +const char *cap_name(enum msm_vidc_inst_capability_type cap_id); const char *v4l2_pixelfmt_name(u32 pixelfmt); const char *v4l2_type_name(u32 port); void print_vidc_buffer(u32 tag, const char *tag_str, const char *str, struct msm_vidc_inst *inst, diff --git a/driver/vidc/inc/msm_vidc_inst.h b/driver/vidc/inc/msm_vidc_inst.h index 9e294bcf3f..d1841a9a56 100644 --- a/driver/vidc/inc/msm_vidc_inst.h +++ b/driver/vidc/inc/msm_vidc_inst.h @@ -110,8 +110,6 @@ struct msm_vidc_inst { struct v4l2_m2m_ctx *m2m_ctx; struct v4l2_ctrl **ctrls; u32 num_ctrls; - struct msm_vidc_inst_cap_entry children; - struct msm_vidc_inst_cap_entry firmware; enum hfi_rate_control hfi_rc_type; enum hfi_layer_encoding_type hfi_layer_type; bool request; @@ -143,7 +141,9 @@ struct msm_vidc_inst { struct list_head response_works; /* list of struct response_work */ struct list_head enc_input_crs; struct list_head dmabuf_tracker; /* list of struct msm_memory_dmabuf */ - struct list_head caps_list; /* list of struct msm_vidc_inst_cap_entry */ + struct list_head caps_list; + struct list_head children_list; + struct list_head firmware_list; bool once_per_session_set; bool ipsc_properties_set; bool opsc_properties_set; diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 3d0adb460f..31ac22d028 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -349,9 +349,9 @@ enum msm_vidc_inst_capability_type { MIN_BUFFERS_INPUT, MIN_BUFFERS_OUTPUT, MBPF, - LOSSLESS_MBPF, BATCH_MBPF, BATCH_FPS, + LOSSLESS_MBPF, SECURE_MBPF, MBPS, POWER_SAVE_MBPS, @@ -365,86 +365,59 @@ enum msm_vidc_inst_capability_type { MB_CYCLES_FW_VPP, SECURE_MODE, TS_REORDER, + SLICE_INTERFACE, HFLIP, VFLIP, ROTATION, SUPER_FRAME, - SLICE_INTERFACE, HEADER_MODE, PREPEND_SPSPPS_TO_IDR, META_SEQ_HDR_NAL, WITHOUT_STARTCODE, NAL_LENGTH_FIELD, REQUEST_I_FRAME, - BIT_RATE, BITRATE_MODE, LOSSLESS, FRAME_SKIP_MODE, FRAME_RC_ENABLE, - CONSTANT_QUALITY, - GOP_SIZE, GOP_CLOSURE, - B_FRAME, - BLUR_TYPES, - BLUR_RESOLUTION, CSC, CSC_CUSTOM_MATRIX, - GRID, - LOWLATENCY_MODE, - LTR_COUNT, USE_LTR, MARK_LTR, BASELAYER_PRIORITY, - IR_RANDOM, AU_DELIMITER, - TIME_DELTA_BASED_RC, - CONTENT_ADAPTIVE_CODING, - BITRATE_BOOST, - MIN_QUALITY, - VBV_DELAY, - PEAK_BITRATE, - MIN_FRAME_QP, + GRID, I_FRAME_MIN_QP, P_FRAME_MIN_QP, B_FRAME_MIN_QP, - MAX_FRAME_QP, I_FRAME_MAX_QP, P_FRAME_MAX_QP, B_FRAME_MAX_QP, - I_FRAME_QP, - P_FRAME_QP, - B_FRAME_QP, LAYER_TYPE, LAYER_ENABLE, - ENH_LAYER_COUNT, L0_BR, L1_BR, L2_BR, L3_BR, L4_BR, L5_BR, - ENTROPY_MODE, - PROFILE, LEVEL, HEVC_TIER, AV1_TIER, - LF_MODE, - LF_ALPHA, - LF_BETA, - SLICE_MODE, - SLICE_MAX_BYTES, - SLICE_MAX_MB, - MB_RC, - TRANSFORM_8X8, - CHROMA_QP_INDEX_OFFSET, DISPLAY_DELAY_ENABLE, DISPLAY_DELAY, CONCEAL_COLOR_8BIT, CONCEAL_COLOR_10BIT, - STAGE, + LF_MODE, + LF_ALPHA, + LF_BETA, + SLICE_MAX_BYTES, + SLICE_MAX_MB, + MB_RC, + CHROMA_QP_INDEX_OFFSET, PIPE, POC, - QUALITY_MODE, CODED_FRAMES, BIT_DEPTH, CODEC_CONFIG, @@ -453,20 +426,20 @@ enum msm_vidc_inst_capability_type { DEFAULT_HEADER, RAP_FRAME, SEQ_CHANGE_AT_SYNC_FRAME, + QUALITY_MODE, PRIORITY, - ENC_IP_CR, DPB_LIST, FILM_GRAIN, SUPER_BLOCK, DRAP, - ALL_INTRA, INPUT_METADATA_FD, META_BITSTREAM_RESOLUTION, META_CROP_OFFSETS, - META_LTR_MARK_USE, META_DPB_MISR, META_OPB_MISR, META_INTERLACE, + ENC_IP_CR, + META_LTR_MARK_USE, META_TIMESTAMP, META_CONCEALED_MB_CNT, META_HIST_INFO, @@ -479,25 +452,51 @@ enum msm_vidc_inst_capability_type { META_OUTPUT_BUF_TAG, META_SUBFRAME_OUTPUT, META_ENC_QP_METADATA, - META_ROI_INFO, META_DEC_QP_METADATA, COMPLEXITY, META_MAX_NUM_REORDER_FRAMES, + PROFILE, + MIN_FRAME_QP, + MAX_FRAME_QP, + I_FRAME_QP, + P_FRAME_QP, + B_FRAME_QP, + META_ROI_INFO, + TIME_DELTA_BASED_RC, + CONSTANT_QUALITY, + ENH_LAYER_COUNT, + BIT_RATE, + VBV_DELAY, + PEAK_BITRATE, + LOWLATENCY_MODE, + ENTROPY_MODE, + TRANSFORM_8X8, + GOP_SIZE, + B_FRAME, + BLUR_RESOLUTION, + STAGE, + ALL_INTRA, + MIN_QUALITY, + LTR_COUNT, + IR_RANDOM, + BITRATE_BOOST, + SLICE_MODE, + CONTENT_ADAPTIVE_CODING, + BLUR_TYPES, INST_CAP_MAX, }; enum msm_vidc_inst_capability_flags { CAP_FLAG_NONE = 0, - CAP_FLAG_ROOT = BIT(0), - CAP_FLAG_DYNAMIC_ALLOWED = BIT(1), - CAP_FLAG_MENU = BIT(2), - CAP_FLAG_INPUT_PORT = BIT(3), - CAP_FLAG_OUTPUT_PORT = BIT(4), - CAP_FLAG_CLIENT_SET = BIT(5), + CAP_FLAG_DYNAMIC_ALLOWED = BIT(0), + CAP_FLAG_MENU = BIT(1), + CAP_FLAG_INPUT_PORT = BIT(2), + CAP_FLAG_OUTPUT_PORT = BIT(3), + CAP_FLAG_CLIENT_SET = BIT(4), }; struct msm_vidc_inst_cap { - enum msm_vidc_inst_capability_type cap; + enum msm_vidc_inst_capability_type cap_id; s32 min; s32 max; u32 step_or_mask; diff --git a/driver/vidc/inc/msm_vidc_memory.h b/driver/vidc/inc/msm_vidc_memory.h index 733f73b158..1226205875 100644 --- a/driver/vidc/inc/msm_vidc_memory.h +++ b/driver/vidc/inc/msm_vidc_memory.h @@ -56,8 +56,8 @@ void msm_vidc_memory_put_dmabuf_completely(struct msm_vidc_inst *inst, struct msm_memory_dmabuf *buf); int msm_memory_pools_init(struct msm_vidc_inst *inst); void msm_memory_pools_deinit(struct msm_vidc_inst *inst); -void *msm_memory_alloc(struct msm_vidc_inst *inst, +void *msm_memory_pool_alloc(struct msm_vidc_inst *inst, enum msm_memory_pool_type type); -void msm_memory_free(struct msm_vidc_inst *inst, void *vidc_buf); +void msm_memory_pool_free(struct msm_vidc_inst *inst, void *vidc_buf); #endif // _MSM_VIDC_MEMORY_H_ \ No newline at end of file diff --git a/driver/vidc/inc/msm_vidc_platform.h b/driver/vidc/inc/msm_vidc_platform.h index 3ce27f775e..0e4e40abcc 100644 --- a/driver/vidc/inc/msm_vidc_platform.h +++ b/driver/vidc/inc/msm_vidc_platform.h @@ -17,7 +17,7 @@ struct msm_platform_core_capability { }; struct msm_platform_inst_capability { - enum msm_vidc_inst_capability_type cap; + enum msm_vidc_inst_capability_type cap_id; enum msm_vidc_domain_type domain; enum msm_vidc_codec_type codec; s32 min; diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index f01bc012ec..837f7bd96d 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -2163,7 +2163,7 @@ int msm_vdec_handle_release_buffer(struct msm_vidc_inst *inst, inst->debug_count.ebd, inst->debug_count.ftb, inst->debug_count.fbd); /* delete the buffer from release list */ list_del(&buf->list); - msm_memory_free(inst, buf); + msm_memory_pool_free(inst, buf); return rc; } diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index d24620f0aa..3d09ab5a86 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -941,8 +941,8 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) INIT_LIST_HEAD(&inst->mappings.dpb.list); INIT_LIST_HEAD(&inst->mappings.persist.list); INIT_LIST_HEAD(&inst->mappings.vpss.list); - INIT_LIST_HEAD(&inst->children.list); - INIT_LIST_HEAD(&inst->firmware.list); + INIT_LIST_HEAD(&inst->children_list); + INIT_LIST_HEAD(&inst->firmware_list); INIT_LIST_HEAD(&inst->enc_input_crs); INIT_LIST_HEAD(&inst->dmabuf_tracker); for (i = 0; i < MAX_SIGNAL; i++) diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index e6b4877c76..18a3706005 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -265,7 +265,7 @@ static enum msm_vidc_inst_capability_type msm_vidc_get_cap_id( capability = inst->capabilities; do { if (capability->cap[i].v4l2_id == id) { - cap_id = capability->cap[i].cap; + cap_id = capability->cap[i].cap_id; break; } i++; @@ -282,7 +282,7 @@ static int msm_vidc_add_capid_to_list(struct msm_vidc_inst *inst, /* skip adding if cap_id already present in list */ if (type & FW_LIST) { - list_for_each_entry(curr_node, &inst->firmware.list, list) { + list_for_each_entry(curr_node, &inst->firmware_list, list) { if (curr_node->cap_id == cap_id) { i_vpr_l(inst, "%s: cap[%d] %s already present in FW_LIST\n", @@ -299,9 +299,9 @@ static int msm_vidc_add_capid_to_list(struct msm_vidc_inst *inst, } entry->cap_id = cap_id; if (type & CHILD_LIST) - list_add_tail(&entry->list, &inst->children.list); + list_add_tail(&entry->list, &inst->children_list); if (type & FW_LIST) - list_add_tail(&entry->list, &inst->firmware.list); + list_add_tail(&entry->list, &inst->firmware_list); return 0; } @@ -325,15 +325,15 @@ static int msm_vidc_add_children(struct msm_vidc_inst *inst, return rc; } -static bool is_parent_available(struct msm_vidc_inst* inst, - u32 cap, u32 check_parent, const char* func) +static bool is_parent_available(struct msm_vidc_inst *inst, + u32 cap_id, u32 check_parent, const char *func) { int i = 0; u32 cap_parent; while (i < MAX_CAP_PARENTS && - inst->capabilities->cap[cap].parents[i]) { - cap_parent = inst->capabilities->cap[cap].parents[i]; + inst->capabilities->cap[cap_id].parents[i]) { + cap_parent = inst->capabilities->cap[cap_id].parents[i]; if (cap_parent == check_parent) { return true; } @@ -342,11 +342,11 @@ static bool is_parent_available(struct msm_vidc_inst* inst, i_vpr_e(inst, "%s: missing parent %s for %s\n", - func, cap_name(check_parent), cap_name(cap)); + func, cap_name(check_parent), cap_name(cap_id)); return false; } -int msm_vidc_update_cap_value(struct msm_vidc_inst *inst, u32 cap, +int msm_vidc_update_cap_value(struct msm_vidc_inst *inst, u32 cap_id, s32 adjusted_val, const char *func) { if (!inst || !inst->capabilities) { @@ -354,23 +354,23 @@ int msm_vidc_update_cap_value(struct msm_vidc_inst *inst, u32 cap, return -EINVAL; } - if (inst->capabilities->cap[cap].value != adjusted_val) + if (inst->capabilities->cap[cap_id].value != adjusted_val) i_vpr_h(inst, "%s: updated database: name: %s, value: %#x -> %#x\n", - func, cap_name(cap), - inst->capabilities->cap[cap].value, adjusted_val); + func, cap_name(cap_id), + inst->capabilities->cap[cap_id].value, adjusted_val); - inst->capabilities->cap[cap].value = adjusted_val; + inst->capabilities->cap[cap_id].value = adjusted_val; return 0; } int msm_vidc_get_parent_value(struct msm_vidc_inst* inst, - u32 cap, u32 parent, s32 *value, const char *func) + u32 cap_id, u32 parent, s32 *value, const char *func) { int rc = 0; - if (is_parent_available(inst, cap, parent, func)) { + if (is_parent_available(inst, cap_id, parent, func)) { switch (parent) { case BITRATE_MODE: *value = inst->hfi_rc_type; @@ -438,7 +438,7 @@ static int msm_vidc_adjust_property(struct msm_vidc_inst *inst, * skip for uninitialized cap properties. * Eg: Skip Tramform 8x8 cap that is uninitialized for HEVC codec */ - if (!capability->cap[cap_id].cap) + if (!capability->cap[cap_id].cap_id) return 0; if (capability->cap[cap_id].adjust) { @@ -490,8 +490,8 @@ static int msm_vidc_adjust_dynamic_property(struct msm_vidc_inst *inst, if (!ctrl && !capability->cap[cap_id].adjust) { i_vpr_e(inst, "%s: child cap[%d] %s must have ajdust function\n", - __func__, capability->cap[cap_id].cap, - cap_name(capability->cap[cap_id].cap)); + __func__, capability->cap[cap_id].cap_id, + cap_name(capability->cap[cap_id].cap_id)); return -EINVAL; } prev_value = capability->cap[cap_id].value; @@ -645,7 +645,7 @@ int msm_vidc_ctrl_init(struct msm_vidc_inst *inst) ctrl_cfg.step = capability->cap[idx].step_or_mask; } - ctrl_cfg.name = cap_name(capability->cap[idx].cap); + ctrl_cfg.name = cap_name(capability->cap[idx].cap_id); if (!ctrl_cfg.name) { i_vpr_e(inst, "%s: %#x ctrl name is null\n", __func__, ctrl_cfg.id); @@ -936,7 +936,7 @@ int msm_v4l2_op_s_ctrl(struct v4l2_ctrl *ctrl) /* adjust all children if any */ list_for_each_entry_safe(curr_node, tmp_node, - &inst->children.list, list) { + &inst->children_list, list) { rc = msm_vidc_adjust_dynamic_property( inst, curr_node->cap_id, NULL); if (rc) @@ -2494,7 +2494,7 @@ static inline bool is_root(struct msm_vidc_inst_cap *cap) static inline bool is_valid_cap(struct msm_vidc_inst_cap *cap) { - return cap->cap != INST_CAP_NONE; + return cap->cap_id != INST_CAP_NONE; } static inline bool is_all_parents_visited( @@ -2519,7 +2519,7 @@ static int add_node( { struct msm_vidc_inst_cap_entry *entry; - if (lookup[rcap->cap]) + if (lookup[rcap->cap_id]) return 0; entry = kzalloc(sizeof(struct msm_vidc_inst_cap_entry), GFP_KERNEL); @@ -2529,8 +2529,8 @@ static int add_node( } INIT_LIST_HEAD(&entry->list); - entry->cap_id = rcap->cap; - lookup[rcap->cap] = true; + entry->cap_id = rcap->cap_id; + lookup[rcap->cap_id] = true; list_add_tail(&entry->list, list); return 0; @@ -2571,9 +2571,9 @@ int msm_vidc_prepare_dependency_list(struct msm_vidc_inst *inst) continue; /* sanitize cap value */ - if (i != rcap->cap) { + if (i != rcap->cap_id) { i_vpr_e(inst, "%s: cap id mismatch. expected %s, actual %s\n", - __func__, cap_name(i), cap_name(rcap->cap)); + __func__, cap_name(i), cap_name(rcap->cap_id)); rc = -EINVAL; goto error; } @@ -2604,7 +2604,7 @@ int msm_vidc_prepare_dependency_list(struct msm_vidc_inst *inst) * if child node is already part of root or optional list * then no need to add it again. */ - if (root_visited[cap->cap] || opt_visited[cap->cap]) + if (root_visited[cap->cap_id] || opt_visited[cap->cap_id]) continue; /** @@ -2722,7 +2722,7 @@ int msm_vidc_adjust_v4l2_properties(struct msm_vidc_inst *inst) * added to inst->children list at this point */ list_for_each_entry_safe(curr_node, tmp_node, - &inst->children.list, list) { + &inst->children_list, list) { /* * call adjust for each child. Each child adjust * will also update child list at the tail with @@ -3858,7 +3858,7 @@ int msm_vidc_set_v4l2_properties(struct msm_vidc_inst *inst) capability = inst->capabilities; list_for_each_entry_safe(curr_node, tmp_node, - &inst->firmware.list, list) { + &inst->firmware_list, list) { /* cap_id's like PIX_FMT etc may not have set functions */ if (!capability->cap[curr_node->cap_id].set) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 2c103af88b..9e96d4c329 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -50,7 +50,7 @@ extern struct msm_vidc_core *g_core; #define STABILITY_PAYLOAD_SHIFT 32 struct msm_vidc_cap_name { - enum msm_vidc_inst_capability_type cap; + enum msm_vidc_inst_capability_type cap_id; char *name; }; @@ -66,9 +66,9 @@ static const struct msm_vidc_cap_name cap_name_arr[] = { {MIN_BUFFERS_INPUT, "MIN_BUFFERS_INPUT" }, {MIN_BUFFERS_OUTPUT, "MIN_BUFFERS_OUTPUT" }, {MBPF, "MBPF" }, - {LOSSLESS_MBPF, "LOSSLESS_MBPF" }, {BATCH_MBPF, "BATCH_MBPF" }, {BATCH_FPS, "BATCH_FPS" }, + {LOSSLESS_MBPF, "LOSSLESS_MBPF" }, {SECURE_MBPF, "SECURE_MBPF" }, {MBPS, "MBPS" }, {POWER_SAVE_MBPS, "POWER_SAVE_MBPS" }, @@ -82,86 +82,59 @@ static const struct msm_vidc_cap_name cap_name_arr[] = { {MB_CYCLES_FW_VPP, "MB_CYCLES_FW_VPP" }, {SECURE_MODE, "SECURE_MODE" }, {TS_REORDER, "TS_REORDER" }, + {SLICE_INTERFACE, "SLICE_INTERFACE" }, {HFLIP, "HFLIP" }, {VFLIP, "VFLIP" }, {ROTATION, "ROTATION" }, {SUPER_FRAME, "SUPER_FRAME" }, - {SLICE_INTERFACE, "SLICE_INTERFACE" }, {HEADER_MODE, "HEADER_MODE" }, {PREPEND_SPSPPS_TO_IDR, "PREPEND_SPSPPS_TO_IDR" }, {META_SEQ_HDR_NAL, "META_SEQ_HDR_NAL" }, {WITHOUT_STARTCODE, "WITHOUT_STARTCODE" }, {NAL_LENGTH_FIELD, "NAL_LENGTH_FIELD" }, {REQUEST_I_FRAME, "REQUEST_I_FRAME" }, - {BIT_RATE, "BIT_RATE" }, {BITRATE_MODE, "BITRATE_MODE" }, {LOSSLESS, "LOSSLESS" }, {FRAME_SKIP_MODE, "FRAME_SKIP_MODE" }, {FRAME_RC_ENABLE, "FRAME_RC_ENABLE" }, - {CONSTANT_QUALITY, "CONSTANT_QUALITY" }, - {GOP_SIZE, "GOP_SIZE" }, {GOP_CLOSURE, "GOP_CLOSURE" }, - {B_FRAME, "B_FRAME" }, - {BLUR_TYPES, "BLUR_TYPES" }, - {BLUR_RESOLUTION, "BLUR_RESOLUTION" }, {CSC, "CSC" }, {CSC_CUSTOM_MATRIX, "CSC_CUSTOM_MATRIX" }, - {GRID, "GRID" }, - {LOWLATENCY_MODE, "LOWLATENCY_MODE" }, - {LTR_COUNT, "LTR_COUNT" }, {USE_LTR, "USE_LTR" }, {MARK_LTR, "MARK_LTR" }, {BASELAYER_PRIORITY, "BASELAYER_PRIORITY" }, - {IR_RANDOM, "IR_RANDOM" }, {AU_DELIMITER, "AU_DELIMITER" }, - {TIME_DELTA_BASED_RC, "TIME_DELTA_BASED_RC" }, - {CONTENT_ADAPTIVE_CODING, "CONTENT_ADAPTIVE_CODING" }, - {BITRATE_BOOST, "BITRATE_BOOST" }, - {MIN_QUALITY, "MIN_QUALITY" }, - {VBV_DELAY, "VBV_DELAY" }, - {PEAK_BITRATE, "PEAK_BITRATE" }, - {MIN_FRAME_QP, "MIN_FRAME_QP" }, + {GRID, "GRID" }, {I_FRAME_MIN_QP, "I_FRAME_MIN_QP" }, {P_FRAME_MIN_QP, "P_FRAME_MIN_QP" }, {B_FRAME_MIN_QP, "B_FRAME_MIN_QP" }, - {MAX_FRAME_QP, "MAX_FRAME_QP" }, {I_FRAME_MAX_QP, "I_FRAME_MAX_QP" }, {P_FRAME_MAX_QP, "P_FRAME_MAX_QP" }, {B_FRAME_MAX_QP, "B_FRAME_MAX_QP" }, - {I_FRAME_QP, "I_FRAME_QP" }, - {P_FRAME_QP, "P_FRAME_QP" }, - {B_FRAME_QP, "B_FRAME_QP" }, {LAYER_TYPE, "LAYER_TYPE" }, {LAYER_ENABLE, "LAYER_ENABLE" }, - {ENH_LAYER_COUNT, "ENH_LAYER_COUNT" }, {L0_BR, "L0_BR" }, {L1_BR, "L1_BR" }, {L2_BR, "L2_BR" }, {L3_BR, "L3_BR" }, {L4_BR, "L4_BR" }, {L5_BR, "L5_BR" }, - {ENTROPY_MODE, "ENTROPY_MODE" }, - {PROFILE, "PROFILE" }, {LEVEL, "LEVEL" }, {HEVC_TIER, "HEVC_TIER" }, {AV1_TIER, "AV1_TIER" }, - {LF_MODE, "LF_MODE" }, - {LF_ALPHA, "LF_ALPHA" }, - {LF_BETA, "LF_BETA" }, - {SLICE_MODE, "SLICE_MODE" }, - {SLICE_MAX_BYTES, "SLICE_MAX_BYTES" }, - {SLICE_MAX_MB, "SLICE_MAX_MB" }, - {MB_RC, "MB_RC" }, - {TRANSFORM_8X8, "TRANSFORM_8X8" }, - {CHROMA_QP_INDEX_OFFSET, "CHROMA_QP_INDEX_OFFSET" }, {DISPLAY_DELAY_ENABLE, "DISPLAY_DELAY_ENABLE" }, {DISPLAY_DELAY, "DISPLAY_DELAY" }, {CONCEAL_COLOR_8BIT, "CONCEAL_COLOR_8BIT" }, {CONCEAL_COLOR_10BIT, "CONCEAL_COLOR_10BIT" }, - {STAGE, "STAGE" }, + {LF_MODE, "LF_MODE" }, + {LF_ALPHA, "LF_ALPHA" }, + {LF_BETA, "LF_BETA" }, + {SLICE_MAX_BYTES, "SLICE_MAX_BYTES" }, + {SLICE_MAX_MB, "SLICE_MAX_MB" }, + {MB_RC, "MB_RC" }, + {CHROMA_QP_INDEX_OFFSET, "CHROMA_QP_INDEX_OFFSET" }, {PIPE, "PIPE" }, {POC, "POC" }, - {QUALITY_MODE, "QUALITY_MODE" }, {CODED_FRAMES, "CODED_FRAMES" }, {BIT_DEPTH, "BIT_DEPTH" }, {CODEC_CONFIG, "CODEC_CONFIG" }, @@ -170,20 +143,20 @@ static const struct msm_vidc_cap_name cap_name_arr[] = { {DEFAULT_HEADER, "DEFAULT_HEADER" }, {RAP_FRAME, "RAP_FRAME" }, {SEQ_CHANGE_AT_SYNC_FRAME, "SEQ_CHANGE_AT_SYNC_FRAME" }, + {QUALITY_MODE, "QUALITY_MODE" }, {PRIORITY, "PRIORITY" }, - {ENC_IP_CR, "ENC_IP_CR" }, {DPB_LIST, "DPB_LIST" }, {FILM_GRAIN, "FILM_GRAIN" }, {SUPER_BLOCK, "SUPER_BLOCK" }, {DRAP, "DRAP" }, - {ALL_INTRA, "ALL_INTRA" }, {INPUT_METADATA_FD, "INPUT_METADATA_FD" }, {META_BITSTREAM_RESOLUTION, "META_BITSTREAM_RESOLUTION" }, {META_CROP_OFFSETS, "META_CROP_OFFSETS" }, - {META_LTR_MARK_USE, "META_LTR_MARK_USE" }, {META_DPB_MISR, "META_DPB_MISR" }, {META_OPB_MISR, "META_OPB_MISR" }, {META_INTERLACE, "META_INTERLACE" }, + {ENC_IP_CR, "ENC_IP_CR" }, + {META_LTR_MARK_USE, "META_LTR_MARK_USE" }, {META_TIMESTAMP, "META_TIMESTAMP" }, {META_CONCEALED_MB_CNT, "META_CONCEALED_MB_CNT" }, {META_HIST_INFO, "META_HIST_INFO" }, @@ -196,24 +169,51 @@ static const struct msm_vidc_cap_name cap_name_arr[] = { {META_OUTPUT_BUF_TAG, "META_OUTPUT_BUF_TAG" }, {META_SUBFRAME_OUTPUT, "META_SUBFRAME_OUTPUT" }, {META_ENC_QP_METADATA, "META_ENC_QP_METADATA" }, - {META_ROI_INFO, "META_ROI_INFO" }, {META_DEC_QP_METADATA, "META_DEC_QP_METADATA" }, {COMPLEXITY, "COMPLEXITY" }, {META_MAX_NUM_REORDER_FRAMES, "META_MAX_NUM_REORDER_FRAMES"}, + {PROFILE, "PROFILE" }, + {MIN_FRAME_QP, "MIN_FRAME_QP" }, + {MAX_FRAME_QP, "MAX_FRAME_QP" }, + {I_FRAME_QP, "I_FRAME_QP" }, + {P_FRAME_QP, "P_FRAME_QP" }, + {B_FRAME_QP, "B_FRAME_QP" }, + {META_ROI_INFO, "META_ROI_INFO" }, + {TIME_DELTA_BASED_RC, "TIME_DELTA_BASED_RC" }, + {CONSTANT_QUALITY, "CONSTANT_QUALITY" }, + {ENH_LAYER_COUNT, "ENH_LAYER_COUNT" }, + {BIT_RATE, "BIT_RATE" }, + {VBV_DELAY, "VBV_DELAY" }, + {PEAK_BITRATE, "PEAK_BITRATE" }, + {LOWLATENCY_MODE, "LOWLATENCY_MODE" }, + {ENTROPY_MODE, "ENTROPY_MODE" }, + {TRANSFORM_8X8, "TRANSFORM_8X8" }, + {GOP_SIZE, "GOP_SIZE" }, + {B_FRAME, "B_FRAME" }, + {BLUR_RESOLUTION, "BLUR_RESOLUTION" }, + {STAGE, "STAGE" }, + {ALL_INTRA, "ALL_INTRA" }, + {MIN_QUALITY, "MIN_QUALITY" }, + {LTR_COUNT, "LTR_COUNT" }, + {IR_RANDOM, "IR_RANDOM" }, + {BITRATE_BOOST, "BITRATE_BOOST" }, + {SLICE_MODE, "SLICE_MODE" }, + {CONTENT_ADAPTIVE_CODING, "CONTENT_ADAPTIVE_CODING" }, + {BLUR_TYPES, "BLUR_TYPES" }, {INST_CAP_MAX, "INST_CAP_MAX" }, }; -const char *cap_name(enum msm_vidc_inst_capability_type cap) +const char *cap_name(enum msm_vidc_inst_capability_type cap_id) { const char *name = "UNKNOWN CAP"; - if (cap > ARRAY_SIZE(cap_name_arr)) + if (cap_id > ARRAY_SIZE(cap_name_arr)) goto exit; - if (cap_name_arr[cap].cap != cap) + if (cap_name_arr[cap_id].cap_id != cap_id) goto exit; - name = cap_name_arr[cap].name; + name = cap_name_arr[cap_id].name; exit: return name; @@ -2167,7 +2167,7 @@ int msm_vidc_process_readonly_buffers(struct msm_vidc_inst *inst, buf->attr |= MSM_VIDC_ATTR_READ_ONLY; print_vidc_buffer(VIDC_LOW, "low ", "ro buf removed", inst, ro_buf); list_del(&ro_buf->list); - msm_memory_free(inst, ro_buf); + msm_memory_pool_free(inst, ro_buf); break; } } @@ -2194,7 +2194,7 @@ int msm_vidc_memory_unmap_completely(struct msm_vidc_inst *inst, if (!map->refcount) { msm_vidc_memory_put_dmabuf(inst, map->dmabuf); list_del(&map->list); - msm_memory_free(inst, map); + msm_memory_pool_free(inst, map); break; } } @@ -2360,7 +2360,7 @@ int msm_vidc_flush_ts(struct msm_vidc_inst *inst) i_vpr_l(inst, "%s: flushing ts: val %llu, rank %llu\n", __func__, ts->sort.val, ts->rank); list_del(&ts->sort.list); - msm_memory_free(inst, ts); + msm_memory_pool_free(inst, ts); } inst->timestamps.count = 0; inst->timestamps.rank = 0; @@ -2379,7 +2379,7 @@ int msm_vidc_update_timestamp(struct msm_vidc_inst *inst, u64 timestamp) return -EINVAL; } - ts = msm_memory_alloc(inst, MSM_MEM_POOL_TIMESTAMP); + ts = msm_memory_pool_alloc(inst, MSM_MEM_POOL_TIMESTAMP); if (!ts) { i_vpr_e(inst, "%s: ts alloc failed\n", __func__); return -ENOMEM; @@ -2407,7 +2407,7 @@ int msm_vidc_update_timestamp(struct msm_vidc_inst *inst, u64 timestamp) } inst->timestamps.count--; list_del(&ts->sort.list); - msm_memory_free(inst, ts); + msm_memory_pool_free(inst, ts); } return 0; @@ -2424,7 +2424,7 @@ int msm_vidc_ts_reorder_insert_timestamp(struct msm_vidc_inst *inst, u64 timesta } /* allocate ts from pool */ - ts = msm_memory_alloc(inst, MSM_MEM_POOL_TIMESTAMP); + ts = msm_memory_pool_alloc(inst, MSM_MEM_POOL_TIMESTAMP); if (!ts) { i_vpr_e(inst, "%s: ts alloc failed\n", __func__); return -ENOMEM; @@ -2455,7 +2455,7 @@ int msm_vidc_ts_reorder_remove_timestamp(struct msm_vidc_inst *inst, u64 timesta if (ts->sort.val == timestamp) { list_del_init(&ts->sort.list); inst->ts_reorder.count--; - msm_memory_free(inst, ts); + msm_memory_pool_free(inst, ts); break; } } @@ -2487,7 +2487,7 @@ int msm_vidc_ts_reorder_get_first_timestamp(struct msm_vidc_inst *inst, u64 *tim *timestamp = ts->sort.val; inst->ts_reorder.count--; - msm_memory_free(inst, ts); + msm_memory_pool_free(inst, ts); return 0; } @@ -2505,7 +2505,7 @@ int msm_vidc_ts_reorder_flush(struct msm_vidc_inst *inst) list_for_each_entry_safe(ts, temp, &inst->ts_reorder.list, sort.list) { i_vpr_l(inst, "%s: flushing ts: val %lld\n", __func__, ts->sort.val); list_del(&ts->sort.list); - msm_memory_free(inst, ts); + msm_memory_pool_free(inst, ts); } inst->ts_reorder.count = 0; @@ -2552,7 +2552,7 @@ int msm_vidc_put_delayed_unmap(struct msm_vidc_inst *inst, struct msm_vidc_map * if (!map->refcount) { msm_vidc_memory_put_dmabuf(inst, map->dmabuf); list_del(&map->list); - msm_memory_free(inst, map); + msm_memory_pool_free(inst, map); } return rc; @@ -2620,7 +2620,7 @@ int msm_vidc_unmap_driver_buf(struct msm_vidc_inst *inst, if (!map->refcount) { msm_vidc_memory_put_dmabuf(inst, map->dmabuf); list_del(&map->list); - msm_memory_free(inst, map); + msm_memory_pool_free(inst, map); } return rc; @@ -2655,7 +2655,7 @@ int msm_vidc_map_driver_buf(struct msm_vidc_inst *inst, } if (!found) { /* new buffer case */ - map = msm_memory_alloc(inst, MSM_MEM_POOL_MAP); + map = msm_memory_pool_alloc(inst, MSM_MEM_POOL_MAP); if (!map) { i_vpr_e(inst, "%s: alloc failed\n", __func__); return -ENOMEM; @@ -2671,7 +2671,7 @@ int msm_vidc_map_driver_buf(struct msm_vidc_inst *inst, rc = msm_vidc_get_delayed_unmap(inst, map); if (rc) { msm_vidc_memory_put_dmabuf(inst, map->dmabuf); - msm_memory_free(inst, map); + msm_memory_pool_free(inst, map); return rc; } } @@ -2702,7 +2702,7 @@ int msm_vidc_put_driver_buf(struct msm_vidc_inst *inst, /* delete the buffer from buffers->list */ list_del(&buf->list); - msm_memory_free(inst, buf); + msm_memory_pool_free(inst, buf); return rc; } @@ -2728,7 +2728,7 @@ struct msm_vidc_buffer *msm_vidc_get_driver_buf(struct msm_vidc_inst *inst, if (!buffers) return NULL; - buf = msm_memory_alloc(inst, MSM_MEM_POOL_BUFFER); + buf = msm_memory_pool_alloc(inst, MSM_MEM_POOL_BUFFER); if (!buf) { i_vpr_e(inst, "%s: alloc failed\n", __func__); return NULL; @@ -2756,7 +2756,7 @@ struct msm_vidc_buffer *msm_vidc_get_driver_buf(struct msm_vidc_inst *inst, error: msm_vidc_memory_put_dmabuf(inst, buf->dmabuf); list_del(&buf->list); - msm_memory_free(inst, buf); + msm_memory_pool_free(inst, buf); return NULL; } @@ -3026,22 +3026,22 @@ void msm_vidc_free_capabililty_list(struct msm_vidc_inst *inst, struct msm_vidc_inst_cap_entry *temp = NULL, *next = NULL; if (list_type & CHILD_LIST) { - list_for_each_entry_safe(temp, next, &inst->children.list, list) { + list_for_each_entry_safe(temp, next, &inst->children_list, list) { list_del(&temp->list); kfree(temp); } - INIT_LIST_HEAD(&inst->children.list); + INIT_LIST_HEAD(&inst->children_list); } temp = NULL; next = NULL; if (list_type & FW_LIST) { - list_for_each_entry_safe(temp, next, &inst->firmware.list, list) { + list_for_each_entry_safe(temp, next, &inst->firmware_list, list) { list_del(&temp->list); kfree(temp); } - INIT_LIST_HEAD(&inst->firmware.list); + INIT_LIST_HEAD(&inst->firmware_list); } } @@ -3321,7 +3321,7 @@ int msm_vidc_destroy_internal_buffer(struct msm_vidc_inst *inst, if (map->dmabuf == buffer->dmabuf) { msm_vidc_memory_unmap(inst->core, map); list_del(&map->list); - msm_memory_free(inst, map); + msm_memory_pool_free(inst, map); break; } } @@ -3330,7 +3330,7 @@ int msm_vidc_destroy_internal_buffer(struct msm_vidc_inst *inst, if (alloc->dmabuf == buffer->dmabuf) { msm_vidc_memory_free(inst->core, alloc); list_del(&alloc->list); - msm_memory_free(inst, alloc); + msm_memory_pool_free(inst, alloc); break; } } @@ -3338,7 +3338,7 @@ int msm_vidc_destroy_internal_buffer(struct msm_vidc_inst *inst, list_for_each_entry_safe(buf, dummy, &buffers->list, list) { if (buf->dmabuf == buffer->dmabuf) { list_del(&buf->list); - msm_memory_free(inst, buf); + msm_memory_pool_free(inst, buf); break; } } @@ -3418,7 +3418,7 @@ int msm_vidc_create_internal_buffer(struct msm_vidc_inst *inst, if (!buffers->size) return 0; - buffer = msm_memory_alloc(inst, MSM_MEM_POOL_BUFFER); + buffer = msm_memory_pool_alloc(inst, MSM_MEM_POOL_BUFFER); if (!buffer) { i_vpr_e(inst, "%s: buf alloc failed\n", __func__); return -ENOMEM; @@ -3429,7 +3429,7 @@ int msm_vidc_create_internal_buffer(struct msm_vidc_inst *inst, buffer->buffer_size = buffers->size; list_add_tail(&buffer->list, &buffers->list); - alloc = msm_memory_alloc(inst, MSM_MEM_POOL_ALLOC); + alloc = msm_memory_pool_alloc(inst, MSM_MEM_POOL_ALLOC); if (!alloc) { i_vpr_e(inst, "%s: alloc failed\n", __func__); return -ENOMEM; @@ -3445,7 +3445,7 @@ int msm_vidc_create_internal_buffer(struct msm_vidc_inst *inst, return -ENOMEM; list_add_tail(&alloc->list, &allocations->list); - map = msm_memory_alloc(inst, MSM_MEM_POOL_MAP); + map = msm_memory_pool_alloc(inst, MSM_MEM_POOL_MAP); if (!map) { i_vpr_e(inst, "%s: map alloc failed\n", __func__); return -ENOMEM; @@ -4338,24 +4338,24 @@ static void update_inst_capability(struct msm_platform_inst_capability *in, __func__, in, capability); return; } - if (in->cap < INST_CAP_MAX) { - capability->cap[in->cap].cap = in->cap; - capability->cap[in->cap].min = in->min; - capability->cap[in->cap].max = in->max; - capability->cap[in->cap].step_or_mask = in->step_or_mask; - capability->cap[in->cap].value = in->value; - capability->cap[in->cap].flags = in->flags; - capability->cap[in->cap].v4l2_id = in->v4l2_id; - capability->cap[in->cap].hfi_id = in->hfi_id; - memcpy(capability->cap[in->cap].parents, in->parents, - sizeof(capability->cap[in->cap].parents)); - memcpy(capability->cap[in->cap].children, in->children, - sizeof(capability->cap[in->cap].children)); - capability->cap[in->cap].adjust = in->adjust; - capability->cap[in->cap].set = in->set; + if (in->cap_id < INST_CAP_MAX) { + capability->cap[in->cap_id].cap_id = in->cap_id; + capability->cap[in->cap_id].min = in->min; + capability->cap[in->cap_id].max = in->max; + capability->cap[in->cap_id].step_or_mask = in->step_or_mask; + capability->cap[in->cap_id].value = in->value; + capability->cap[in->cap_id].flags = in->flags; + capability->cap[in->cap_id].v4l2_id = in->v4l2_id; + capability->cap[in->cap_id].hfi_id = in->hfi_id; + memcpy(capability->cap[in->cap_id].parents, in->parents, + sizeof(capability->cap[in->cap_id].parents)); + memcpy(capability->cap[in->cap_id].children, in->children, + sizeof(capability->cap[in->cap_id].children)); + capability->cap[in->cap_id].adjust = in->adjust; + capability->cap[in->cap_id].set = in->set; } else { - d_vpr_e("%s: invalid cap %d\n", - __func__, in->cap); + d_vpr_e("%s: invalid cap id %d\n", + __func__, in->cap_id); } } @@ -5180,13 +5180,13 @@ void msm_vidc_destroy_buffers(struct msm_vidc_inst *inst) list_for_each_entry_safe(buf, dummy, &inst->buffers.read_only.list, list) { print_vidc_buffer(VIDC_ERR, "err ", "destroying ro buffer", inst, buf); list_del(&buf->list); - msm_memory_free(inst, buf); + msm_memory_pool_free(inst, buf); } list_for_each_entry_safe(buf, dummy, &inst->buffers.release.list, list) { print_vidc_buffer(VIDC_ERR, "err ", "destroying release buffer", inst, buf); list_del(&buf->list); - msm_memory_free(inst, buf); + msm_memory_pool_free(inst, buf); } for (i = 0; i < ARRAY_SIZE(ext_buf_types); i++) { @@ -5207,14 +5207,14 @@ void msm_vidc_destroy_buffers(struct msm_vidc_inst *inst) i_vpr_e(inst, "%s: removing ts: val %lld, rank %lld\n", __func__, ts->sort.val, ts->rank); list_del(&ts->sort.list); - msm_memory_free(inst, ts); + msm_memory_pool_free(inst, ts); } list_for_each_entry_safe(ts, dummy_ts, &inst->ts_reorder.list, sort.list) { i_vpr_e(inst, "%s: removing reorder ts: val %lld\n", __func__, ts->sort.val); list_del(&ts->sort.list); - msm_memory_free(inst, ts); + msm_memory_pool_free(inst, ts); } list_for_each_entry_safe(dbuf, dummy_dbuf, &inst->dmabuf_tracker, list) { diff --git a/driver/vidc/src/msm_vidc_memory.c b/driver/vidc/src/msm_vidc_memory.c index 723b435f11..8e54aa8b57 100644 --- a/driver/vidc/src/msm_vidc_memory.c +++ b/driver/vidc/src/msm_vidc_memory.c @@ -95,7 +95,7 @@ struct dma_buf *msm_vidc_memory_get_dmabuf(struct msm_vidc_inst *inst, int fd) } /* get tracker instance from pool */ - buf = msm_memory_alloc(inst, MSM_MEM_POOL_DMABUF); + buf = msm_memory_pool_alloc(inst, MSM_MEM_POOL_DMABUF); if (!buf) { i_vpr_e(inst, "%s: dmabuf alloc failed\n", __func__); dma_buf_put(dmabuf); @@ -146,7 +146,7 @@ void msm_vidc_memory_put_dmabuf(struct msm_vidc_inst *inst, struct dma_buf *dmab dma_buf_put(buf->dmabuf); /* put tracker instance back to pool */ - msm_memory_free(inst, buf); + msm_memory_pool_free(inst, buf); } void msm_vidc_memory_put_dmabuf_completely(struct msm_vidc_inst *inst, @@ -167,7 +167,7 @@ void msm_vidc_memory_put_dmabuf_completely(struct msm_vidc_inst *inst, dma_buf_put(buf->dmabuf); /* put tracker instance back to pool */ - msm_memory_free(inst, buf); + msm_memory_pool_free(inst, buf); break; } } @@ -445,7 +445,7 @@ int msm_vidc_memory_free(struct msm_vidc_core *core, struct msm_vidc_alloc *mem) return rc; }; -void *msm_memory_alloc(struct msm_vidc_inst *inst, enum msm_memory_pool_type type) +void *msm_memory_pool_alloc(struct msm_vidc_inst *inst, enum msm_memory_pool_type type) { struct msm_memory_alloc_header *hdr; struct msm_memory_pool *pool; @@ -488,7 +488,7 @@ void *msm_memory_alloc(struct msm_vidc_inst *inst, enum msm_memory_pool_type typ return hdr->buf; } -void msm_memory_free(struct msm_vidc_inst *inst, void *vidc_buf) +void msm_memory_pool_free(struct msm_vidc_inst *inst, void *vidc_buf) { struct msm_memory_alloc_header *hdr; struct msm_memory_pool *pool; diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index 440b4dd666..2b28a3d90b 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -648,7 +648,7 @@ static int handle_read_only_buffer(struct msm_vidc_inst *inst, * if present, do nothing */ if (!found) { - ro_buf = msm_memory_alloc(inst, MSM_MEM_POOL_BUFFER); + ro_buf = msm_memory_pool_alloc(inst, MSM_MEM_POOL_BUFFER); if (!ro_buf) { i_vpr_e(inst, "%s: buffer alloc failed\n", __func__); return -ENOMEM; @@ -699,7 +699,7 @@ static int handle_non_read_only_buffer(struct msm_vidc_inst *inst, if (found) { print_vidc_buffer(VIDC_LOW, "low ", "ro buf deleted", inst, ro_buf); list_del(&ro_buf->list); - msm_memory_free(inst, ro_buf); + msm_memory_pool_free(inst, ro_buf); } return 0; From ef829ce44f25e249736c708638f87284cfbb4516 Mon Sep 17 00:00:00 2001 From: Maheshwar Ajja Date: Wed, 19 Jan 2022 20:54:17 -0800 Subject: [PATCH 0529/1061] video: driver: add fence support Add fence support for decoder output buffers for the consumer to use it to improve latency. Change-Id: I7384b4a9793248988a2d2d546a535f26636d5bb3 Signed-off-by: Maheshwar Ajja --- Kbuild | 1 + driver/vidc/inc/msm_vidc_fence.h | 21 ++++ driver/vidc/inc/msm_vidc_inst.h | 1 + driver/vidc/inc/msm_vidc_internal.h | 18 +++ driver/vidc/src/msm_vidc.c | 5 + driver/vidc/src/msm_vidc_driver.c | 24 +++- driver/vidc/src/msm_vidc_fence.c | 162 +++++++++++++++++++++++++++ driver/vidc/src/venus_hfi_response.c | 4 + 8 files changed, 233 insertions(+), 3 deletions(-) create mode 100644 driver/vidc/inc/msm_vidc_fence.h create mode 100644 driver/vidc/src/msm_vidc_fence.c diff --git a/Kbuild b/Kbuild index 9739308e2c..a5c21993d5 100644 --- a/Kbuild +++ b/Kbuild @@ -69,6 +69,7 @@ msm_video-objs += driver/vidc/src/msm_vidc_v4l2.o \ driver/vidc/src/msm_vidc_platform.o \ driver/vidc/src/msm_vidc_debug.o \ driver/vidc/src/msm_vidc_memory.o \ + driver/vidc/src/msm_vidc_fence.o \ driver/vidc/src/venus_hfi.o \ driver/vidc/src/hfi_packet.o \ driver/vidc/src/venus_hfi_response.o diff --git a/driver/vidc/inc/msm_vidc_fence.h b/driver/vidc/inc/msm_vidc_fence.h new file mode 100644 index 0000000000..87518cf064 --- /dev/null +++ b/driver/vidc/inc/msm_vidc_fence.h @@ -0,0 +1,21 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#ifndef __H_MSM_VIDC_FENCE_H__ +#define __H_MSM_VIDC_FENCE_H__ + +#include "msm_vidc_inst.h" +#include "msm_vidc_buffer.h" + +int msm_vidc_fence_create(struct msm_vidc_inst *inst, + struct msm_vidc_buffer *buf); +int msm_vidc_fence_signal(struct msm_vidc_inst *inst, + struct msm_vidc_buffer *buf); +void msm_vidc_fence_destroy(struct msm_vidc_inst *inst, + struct msm_vidc_buffer *buf); +int msm_vidc_fence_init(struct msm_vidc_inst *inst); +void msm_vidc_fence_deinit(struct msm_vidc_inst *inst); + +#endif // __H_MSM_VIDC_FENCE_H__ diff --git a/driver/vidc/inc/msm_vidc_inst.h b/driver/vidc/inc/msm_vidc_inst.h index 9e294bcf3f..a579dc4620 100644 --- a/driver/vidc/inc/msm_vidc_inst.h +++ b/driver/vidc/inc/msm_vidc_inst.h @@ -153,6 +153,7 @@ struct msm_vidc_inst { struct msm_vidc_statistics stats; struct msm_vidc_inst_capability *capabilities; struct completion completions[MAX_SIGNAL]; + struct msm_vidc_fence_context fence; enum priority_level priority_level; u32 firmware_priority; bool active; diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 3d0adb460f..2c38f34a21 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -9,6 +9,9 @@ #include #include #include +#include +#include +#include #include #include #include @@ -780,6 +783,20 @@ struct msm_vidc_power { u32 fw_cf; }; +struct msm_vidc_fence_context { + char name[MAX_NAME_LENGTH]; + u64 ctx_num; + u64 seq_num; +}; + +struct msm_vidc_fence { + struct dma_fence dma_fence; + char name[MAX_NAME_LENGTH]; + spinlock_t lock; + struct sync_file *sync_file; + int fd; +}; + struct msm_vidc_alloc { struct list_head list; enum msm_vidc_buffer_type type; @@ -827,6 +844,7 @@ struct msm_vidc_buffer { u32 flags; u64 timestamp; enum msm_vidc_buffer_attributes attr; + struct msm_vidc_fence *fence; }; struct msm_vidc_buffers { diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index d24620f0aa..ef136a6b61 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -16,6 +16,7 @@ #include "msm_vidc_debug.h" #include "msm_vidc_control.h" #include "msm_vidc_power.h" +#include "msm_vidc_fence.h" #include "msm_vidc_memory.h" #include "venus_hfi_response.h" #include "msm_vidc.h" @@ -980,6 +981,10 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) if (rc) goto error; + rc = msm_vidc_fence_init(inst); + if (rc) + goto error; + rc = msm_vidc_add_session(inst); if (rc) { i_vpr_e(inst, "%s: failed to get session id\n", __func__); diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 2c103af88b..e100ca81ec 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -19,6 +19,7 @@ #include "msm_vidc.h" #include "msm_vdec.h" #include "msm_venc.h" +#include "msm_vidc_fence.h" #include "venus_hfi.h" #include "venus_hfi_response.h" #include "hfi_packet.h" @@ -3255,6 +3256,7 @@ int msm_vidc_queue_buffer_single(struct msm_vidc_inst *inst, struct vb2_buffer * int rc = 0; struct msm_vidc_buffer *buf; enum msm_vidc_allow allow; + const int fence_enabled = 0; if (!inst || !vb2) { d_vpr_e("%s: invalid params\n", __func__); @@ -3265,21 +3267,35 @@ int msm_vidc_queue_buffer_single(struct msm_vidc_inst *inst, struct vb2_buffer * if (!buf) return -EINVAL; + if (fence_enabled && is_decode_session(inst) && + is_output_buffer(buf->type)) { + rc = msm_vidc_fence_create(inst, buf); + if (rc) + return rc; + } + allow = msm_vidc_allow_qbuf(inst, vb2->type); if (allow == MSM_VIDC_DISALLOW) { i_vpr_e(inst, "%s: qbuf not allowed\n", __func__); - return -EINVAL; + rc = -EINVAL; + goto exit; } else if (allow == MSM_VIDC_DEFER) { print_vidc_buffer(VIDC_LOW, "low ", "qbuf deferred", inst, buf); - return 0; + rc = 0; + goto exit; } msm_vidc_scale_power(inst, is_input_buffer(buf->type)); rc = msm_vidc_queue_buffer(inst, buf); if (rc) - return rc; + goto exit; +exit: + if (rc) { + i_vpr_e(inst, "%s: qbuf failed\n", __func__); + msm_vidc_fence_destroy(inst, buf); + } return rc; } @@ -5196,6 +5212,7 @@ void msm_vidc_destroy_buffers(struct msm_vidc_inst *inst) list_for_each_entry_safe(buf, dummy, &buffers->list, list) { print_vidc_buffer(VIDC_ERR, "err ", "destroying ", inst, buf); + msm_vidc_fence_destroy(inst, buf); if (!(buf->attr & MSM_VIDC_ATTR_BUFFER_DONE)) msm_vidc_vb2_buffer_done(inst, buf); msm_vidc_put_driver_buf(inst, buf); @@ -5244,6 +5261,7 @@ static void msm_vidc_close_helper(struct kref *kref) struct msm_vidc_inst, kref); i_vpr_h(inst, "%s()\n", __func__); + msm_vidc_fence_deinit(inst); msm_vidc_event_queue_deinit(inst); msm_vidc_vb2_queue_deinit(inst); msm_vidc_debugfs_deinit_inst(inst); diff --git a/driver/vidc/src/msm_vidc_fence.c b/driver/vidc/src/msm_vidc_fence.c new file mode 100644 index 0000000000..b375ba38b8 --- /dev/null +++ b/driver/vidc/src/msm_vidc_fence.c @@ -0,0 +1,162 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include "msm_vidc_fence.h" +#include "msm_vidc_debug.h" + +static const char *msm_vidc_dma_fence_get_driver_name(struct dma_fence *df) +{ + struct msm_vidc_fence *fence; + + if (df) { + fence = container_of(df, struct msm_vidc_fence, dma_fence); + return fence->name; + } + return "msm_vidc_dma_fence_get_driver_name: invalid fence"; +} + +static const char *msm_vidc_dma_fence_get_timeline_name(struct dma_fence *df) +{ + struct msm_vidc_fence *fence; + + if (df) { + fence = container_of(df, struct msm_vidc_fence, dma_fence); + return fence->name; + } + return "msm_vidc_dma_fence_get_timeline_name: invalid fence"; +} + +static void msm_vidc_dma_fence_release(struct dma_fence *df) +{ + struct msm_vidc_fence *fence; + + if (df) { + fence = container_of(df, struct msm_vidc_fence, dma_fence); + d_vpr_l("%s: name %s\n", __func__, fence->name); + kfree(fence); + } else { + d_vpr_e("%s: invalid fence\n", __func__); + } +} + +static const struct dma_fence_ops msm_vidc_dma_fence_ops = { + .get_driver_name = msm_vidc_dma_fence_get_driver_name, + .get_timeline_name = msm_vidc_dma_fence_get_timeline_name, + .release = msm_vidc_dma_fence_release, +}; + +int msm_vidc_fence_create(struct msm_vidc_inst *inst, + struct msm_vidc_buffer *buf) +{ + int rc = 0; + struct msm_vidc_fence *fence; + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + fence = kzalloc(sizeof(*fence), GFP_KERNEL); + if (!fence) + return -ENOMEM; + + spin_lock_init(&fence->lock); + dma_fence_init(&fence->dma_fence, &msm_vidc_dma_fence_ops, + &fence->lock, inst->fence.ctx_num, inst->fence.seq_num++); + snprintf(fence->name, sizeof(fence->name), "%s: %llu", + inst->fence.name, inst->fence.seq_num); + + fence->fd = get_unused_fd_flags(0); + if (fence->fd < 0) { + i_vpr_e(inst, "%s: getting fd (%d) failed\n", __func__, + fence->fd); + rc = -EINVAL; + goto err_fd; + } + fence->sync_file = sync_file_create(&fence->dma_fence); + if (!fence->sync_file) { + i_vpr_e(inst, "%s: sync_file_create failed\n", __func__); + rc = -EINVAL; + goto err_sync_file; + } + fd_install(fence->fd, fence->sync_file->file); + + buf->fence = fence; + i_vpr_h(inst, "%s: created %s\n", __func__, fence->name); + return 0; + +err_sync_file: + put_unused_fd(fence->fd); +err_fd: + dma_fence_put(&fence->dma_fence); + buf->fence = NULL; + return rc; +} + +int msm_vidc_fence_signal(struct msm_vidc_inst *inst, + struct msm_vidc_buffer *buf) +{ + int rc = 0; + + if (!inst || !buf) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + if (!buf->fence) + return 0; + + i_vpr_l(inst, "%s: fence %s\n", __func__, buf->fence->name); + dma_fence_signal(&buf->fence->dma_fence); + dma_fence_put(&buf->fence->dma_fence); + buf->fence = NULL; + + return rc; +} + +void msm_vidc_fence_destroy(struct msm_vidc_inst *inst, + struct msm_vidc_buffer *buf) +{ + if (!inst || !buf) { + d_vpr_e("%s: invalid params\n", __func__); + return; + } + if (!buf->fence) + return; + + i_vpr_e(inst, "%s: fence %s\n", __func__, buf->fence->name); + dma_fence_set_error(&buf->fence->dma_fence, -EINVAL); + dma_fence_signal(&buf->fence->dma_fence); + dma_fence_put(&buf->fence->dma_fence); + buf->fence = NULL; +} + +int msm_vidc_fence_init(struct msm_vidc_inst *inst) +{ + int rc = 0; + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + inst->fence.ctx_num = dma_fence_context_alloc(1); + snprintf(inst->fence.name, sizeof(inst->fence.name), + "msm_vidc_fence: %s: %llu", inst->debug_str, + inst->fence.ctx_num); + i_vpr_h(inst, "%s: %s\n", __func__, inst->fence.name); + + return rc; +} + +void msm_vidc_fence_deinit(struct msm_vidc_inst *inst) +{ + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return; + } + i_vpr_h(inst, "%s: %s\n", __func__, inst->fence.name); + inst->fence.ctx_num = 0; + snprintf(inst->fence.name, sizeof(inst->fence.name), "%s", ""); +} diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index 440b4dd666..4dcac18b7a 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -13,6 +13,7 @@ #include "msm_vdec.h" #include "msm_vidc_control.h" #include "msm_vidc_memory.h" +#include "msm_vidc_fence.h" #define in_range(range, val) (((range.begin) < (val)) && ((range.end) > (val))) @@ -823,6 +824,9 @@ static int handle_output_buffer(struct msm_vidc_inst *inst, return 0; } + /* signal the fence asap */ + msm_vidc_fence_signal(inst, buf); + buf->data_offset = buffer->data_offset; buf->data_size = buffer->data_size; buf->timestamp = buffer->timestamp; From 4a74cbd8bdcb4e90cd6290f6aeae26bd16316cb8 Mon Sep 17 00:00:00 2001 From: Mihir Ganu Date: Thu, 3 Feb 2022 13:01:30 -0800 Subject: [PATCH 0530/1061] video: driver: Update IRIS3 HFI buffer macros Update HFI buffer macros to avoid declaring variables after statements. Change-Id: If7584d14e426be1a2f681dae36334d4913b06a90 Signed-off-by: Mihir Ganu --- driver/variant/iris3/inc/hfi_buffer_iris3.h | 30 ++++++++++----------- 1 file changed, 15 insertions(+), 15 deletions(-) diff --git a/driver/variant/iris3/inc/hfi_buffer_iris3.h b/driver/variant/iris3/inc/hfi_buffer_iris3.h index ed93f559fc..d6bf018377 100644 --- a/driver/variant/iris3/inc/hfi_buffer_iris3.h +++ b/driver/variant/iris3/inc/hfi_buffer_iris3.h @@ -973,13 +973,6 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ HFI_U32 y_width_a = 128, y_height_a = 32; \ HFI_U32 uv_width_a = 128, uv_height_a = 32; \ HFI_U32 yBufSize, uvBufSize, y_width, y_height, uv_width, uv_height; \ - HFI_NV12_IL_CALC_Y_STRIDE(y_width, frame_width, y_width_a); \ - HFI_NV12_IL_CALC_Y_BUFHEIGHT(y_height, frame_height, y_height_a); \ - HFI_NV12_IL_CALC_UV_STRIDE(uv_width, frame_width, uv_width_a); \ - HFI_NV12_IL_CALC_UV_BUFHEIGHT(uv_height, frame_height, uv_height_a); \ - HFI_NV12_UBWC_IL_CALC_Y_BUF_SIZE(yBufSize, y_width, y_height); \ - HFI_NV12_UBWC_IL_CALC_UV_BUF_SIZE(uvBufSize, uv_width, uv_height); \ - _size = yBufSize + uvBufSize; \ HFI_U32 y_meta_width_a = 64, y_meta_height_a = 16; \ HFI_U32 uv_meta_width_a = 64, uv_meta_height_a = 16; \ HFI_U32 meta_height, meta_stride, meta_size; \ @@ -988,6 +981,13 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ HFI_U32 tile_width_uv = HFI_COLOR_FORMAT_YUV420_NV12_UBWC_UV_TILE_WIDTH; \ HFI_U32 tile_height_uv = \ HFI_COLOR_FORMAT_YUV420_NV12_UBWC_UV_TILE_HEIGHT; \ + HFI_NV12_IL_CALC_Y_STRIDE(y_width, frame_width, y_width_a); \ + HFI_NV12_IL_CALC_Y_BUFHEIGHT(y_height, frame_height, y_height_a); \ + HFI_NV12_IL_CALC_UV_STRIDE(uv_width, frame_width, uv_width_a); \ + HFI_NV12_IL_CALC_UV_BUFHEIGHT(uv_height, frame_height, uv_height_a); \ + HFI_NV12_UBWC_IL_CALC_Y_BUF_SIZE(yBufSize, y_width, y_height); \ + HFI_NV12_UBWC_IL_CALC_UV_BUF_SIZE(uvBufSize, uv_width, uv_height); \ + _size = yBufSize + uvBufSize; \ HFI_UBWC_CALC_METADATA_PLANE_STRIDE(meta_stride, frame_width, \ y_meta_width_a, tile_width_y); \ HFI_UBWC_METADATA_PLANE_BUFHEIGHT(meta_height, frame_height, \ @@ -1010,14 +1010,6 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ HFI_U32 y_width_a = 256, y_height_a = 16, \ uv_width_a = 256, uv_height_a = 16; \ HFI_U32 yBufSize, uvBufSize, y_width, y_height, uv_width, uv_height; \ - HFI_YUV420_TP10_CALC_Y_STRIDE(y_width, frame_width, y_width_a); \ - HFI_YUV420_TP10_CALC_Y_BUFHEIGHT(y_height, frame_height, y_height_a); \ - HFI_YUV420_TP10_CALC_UV_STRIDE(uv_width, frame_width, uv_width_a); \ - HFI_YUV420_TP10_CALC_UV_BUFHEIGHT(uv_height, frame_height, \ - uv_height_a); \ - HFI_YUV420_TP10_UBWC_CALC_Y_BUF_SIZE(yBufSize, y_width, y_height); \ - HFI_YUV420_TP10_UBWC_CALC_UV_BUF_SIZE(uvBufSize, uv_width, uv_height); \ - _size = yBufSize + uvBufSize; \ HFI_U32 y_meta_width_a = 64, y_meta_height_a = 16, \ uv_meta_width_a = 64, uv_meta_height_a = 16; \ HFI_U32 meta_height, meta_stride, meta_size; \ @@ -1026,6 +1018,14 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ HFI_U32 tile_width_uv = HFI_COLOR_FORMAT_YUV420_TP10_UBWC_UV_TILE_WIDTH; \ HFI_U32 tile_height_uv = \ HFI_COLOR_FORMAT_YUV420_TP10_UBWC_UV_TILE_HEIGHT; \ + HFI_YUV420_TP10_CALC_Y_STRIDE(y_width, frame_width, y_width_a); \ + HFI_YUV420_TP10_CALC_Y_BUFHEIGHT(y_height, frame_height, y_height_a); \ + HFI_YUV420_TP10_CALC_UV_STRIDE(uv_width, frame_width, uv_width_a); \ + HFI_YUV420_TP10_CALC_UV_BUFHEIGHT(uv_height, frame_height, \ + uv_height_a); \ + HFI_YUV420_TP10_UBWC_CALC_Y_BUF_SIZE(yBufSize, y_width, y_height); \ + HFI_YUV420_TP10_UBWC_CALC_UV_BUF_SIZE(uvBufSize, uv_width, uv_height); \ + _size = yBufSize + uvBufSize; \ HFI_UBWC_CALC_METADATA_PLANE_STRIDE(meta_stride, frame_width, \ y_meta_width_a, tile_width_y); \ HFI_UBWC_METADATA_PLANE_BUFHEIGHT(meta_height, frame_height, \ From 7c4952934b364e01c44a5f14ea20ee66cabc9d47 Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Thu, 27 Jan 2022 12:00:57 -0800 Subject: [PATCH 0531/1061] video: driver: packetize dynamic controls with buffer packetize dynamic controls set via request api along with corresponding input buffer under the same hfi header and queue to FW. Change-Id: I8bf82f7ccb1ab16c42ce02189a208f5f7cb8dc70 Signed-off-by: Darshana Patil --- driver/vidc/inc/msm_vidc_inst.h | 1 + driver/vidc/inc/msm_vidc_memory.h | 3 + driver/vidc/inc/venus_hfi.h | 5 ++ driver/vidc/src/msm_vidc.c | 1 + driver/vidc/src/msm_vidc_control.c | 8 --- driver/vidc/src/msm_vidc_memory.c | 3 + driver/vidc/src/venus_hfi.c | 89 ++++++++++++++++++++++++++++++ 7 files changed, 102 insertions(+), 8 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_inst.h b/driver/vidc/inc/msm_vidc_inst.h index d1841a9a56..c3acb30354 100644 --- a/driver/vidc/inc/msm_vidc_inst.h +++ b/driver/vidc/inc/msm_vidc_inst.h @@ -144,6 +144,7 @@ struct msm_vidc_inst { struct list_head caps_list; struct list_head children_list; struct list_head firmware_list; + struct list_head pending_pkts; /* list of struct hfi_pending_packet */ bool once_per_session_set; bool ipsc_properties_set; bool opsc_properties_set; diff --git a/driver/vidc/inc/msm_vidc_memory.h b/driver/vidc/inc/msm_vidc_memory.h index 1226205875..69c4acf3c8 100644 --- a/driver/vidc/inc/msm_vidc_memory.h +++ b/driver/vidc/inc/msm_vidc_memory.h @@ -11,6 +11,8 @@ struct msm_vidc_core; struct msm_vidc_inst; +#define MSM_MEM_POOL_PACKET_SIZE 1024 + struct msm_memory_dmabuf { struct list_head list; struct dma_buf *dmabuf; @@ -23,6 +25,7 @@ enum msm_memory_pool_type { MSM_MEM_POOL_ALLOC, MSM_MEM_POOL_TIMESTAMP, MSM_MEM_POOL_DMABUF, + MSM_MEM_POOL_PACKET, MSM_MEM_POOL_MAX, }; diff --git a/driver/vidc/inc/venus_hfi.h b/driver/vidc/inc/venus_hfi.h index 48c9a85235..129b66280a 100644 --- a/driver/vidc/inc/venus_hfi.h +++ b/driver/vidc/inc/venus_hfi.h @@ -28,6 +28,11 @@ struct vidc_buffer_addr_info { u32 response_required; }; +struct hfi_pending_packet { + struct list_head list; + void *data; +}; + int venus_hfi_session_property(struct msm_vidc_inst *inst, u32 pkt_type, u32 flags, u32 port, u32 payload_type, void *payload, u32 payload_size); diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index 3d09ab5a86..5c4f632195 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -945,6 +945,7 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) INIT_LIST_HEAD(&inst->firmware_list); INIT_LIST_HEAD(&inst->enc_input_crs); INIT_LIST_HEAD(&inst->dmabuf_tracker); + INIT_LIST_HEAD(&inst->pending_pkts); for (i = 0; i < MAX_SIGNAL; i++) init_completion(&inst->completions[i]); diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 18a3706005..175a547fc9 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -945,14 +945,6 @@ int msm_v4l2_op_s_ctrl(struct v4l2_ctrl *ctrl) kfree(curr_node); } - /* dynamic controls with request will be set along with qbuf */ - if (inst->request) { - i_vpr_l(inst, - "%s: request api enabled, dynamic ctrls to be set with qbuf\n", - __func__); - return 0; - } - /* Dynamic set control ASAP */ rc = msm_vidc_set_v4l2_properties(inst); if (rc) { diff --git a/driver/vidc/src/msm_vidc_memory.c b/driver/vidc/src/msm_vidc_memory.c index 8e54aa8b57..9cf1ff5bf2 100644 --- a/driver/vidc/src/msm_vidc_memory.c +++ b/driver/vidc/src/msm_vidc_memory.c @@ -17,6 +17,7 @@ #include "msm_vidc_dt.h" #include "msm_vidc_core.h" #include "msm_vidc_events.h" +#include "venus_hfi.h" struct msm_vidc_buf_region_name { enum msm_vidc_buffer_region region; @@ -589,6 +590,8 @@ static struct msm_vidc_type_size_name buftype_size_name_arr[] = { {MSM_MEM_POOL_ALLOC, sizeof(struct msm_vidc_alloc), "MSM_MEM_POOL_ALLOC" }, {MSM_MEM_POOL_TIMESTAMP, sizeof(struct msm_vidc_timestamp), "MSM_MEM_POOL_TIMESTAMP" }, {MSM_MEM_POOL_DMABUF, sizeof(struct msm_memory_dmabuf), "MSM_MEM_POOL_DMABUF" }, + {MSM_MEM_POOL_PACKET, sizeof(struct hfi_pending_packet) + MSM_MEM_POOL_PACKET_SIZE, + "MSM_MEM_POOL_PACKET"}, }; int msm_memory_pools_init(struct msm_vidc_inst *inst) diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index 2b1d9fc59d..ed4960d460 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -3047,6 +3047,43 @@ unlock: return rc; } +static int venus_hfi_cache_packet(struct msm_vidc_inst *inst) +{ + int rc = 0; + struct hfi_header *hdr; + struct hfi_pending_packet *packet; + + if (!inst->packet) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + hdr = (struct hfi_header *)inst->packet; + if (hdr->size < sizeof(struct hfi_header)) { + d_vpr_e("%s: invalid hdr size %d\n", __func__, hdr->size); + return -EINVAL; + } + + packet = msm_memory_pool_alloc(inst, MSM_MEM_POOL_PACKET); + if (!packet) { + i_vpr_e(inst, "%s: failed to allocate pending packet\n", __func__); + return -ENOMEM; + } + + INIT_LIST_HEAD(&packet->list); + list_add_tail(&packet->list, &inst->pending_pkts); + packet->data = (u8 *)packet + sizeof(struct hfi_pending_packet); + + if (hdr->size > MSM_MEM_POOL_PACKET_SIZE) { + i_vpr_e(inst, "%s: header size %d exceeds pool packet size %d\n", + __func__, hdr->size, MSM_MEM_POOL_PACKET_SIZE); + return -EINVAL; + } + memcpy(packet->data, inst->packet, hdr->size); + + return rc; +} + int venus_hfi_session_property(struct msm_vidc_inst *inst, u32 pkt_type, u32 flags, u32 port, u32 payload_type, void *payload, u32 payload_size) @@ -3081,6 +3118,12 @@ int venus_hfi_session_property(struct msm_vidc_inst *inst, if (rc) goto unlock; + /* skip sending packet to firmware */ + if (inst->request) { + rc = venus_hfi_cache_packet(inst); + goto unlock; + } + rc = __iface_cmdq_write(inst->core, inst->packet); if (rc) goto unlock; @@ -3381,6 +3424,48 @@ unlock: return rc; } +static int venus_hfi_add_pending_packets(struct msm_vidc_inst *inst) +{ + int rc = 0; + int num_packets = 0; + struct hfi_pending_packet *pkt_info, *dummy; + struct hfi_header *hdr, *src_hdr; + struct hfi_packet *src_pkt; + + if (!inst || !inst->packet) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + hdr = (struct hfi_header *)inst->packet; + if (hdr->size < sizeof(struct hfi_header)) { + i_vpr_e(inst, "%s: invalid hdr size %d\n", + __func__, hdr->size); + return -EINVAL; + } + + list_for_each_entry_safe(pkt_info, dummy, &inst->pending_pkts, list) { + src_hdr = (struct hfi_header *)(pkt_info->data); + num_packets = src_hdr->num_packets; + src_pkt = (struct hfi_packet *)((u8 *)src_hdr + sizeof(struct hfi_header)); + while (num_packets > 0) { + memcpy((u8 *)hdr + hdr->size, (void *)src_pkt, src_pkt->size); + hdr->num_packets++; + hdr->size += src_pkt->size; + num_packets--; + src_pkt = (struct hfi_packet *)((u8 *)src_pkt + src_pkt->size); + if ((u8 *)src_pkt < (u8 *)src_hdr || + (u8 *)src_pkt > (u8 *)src_hdr + hdr->size) { + i_vpr_e(inst, "%s: invalid packet address\n", __func__); + return -EINVAL; + } + } + list_del(&pkt_info->list); + msm_memory_pool_free(inst, pkt_info); + } + return rc; +} + int venus_hfi_queue_buffer(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buffer, struct msm_vidc_buffer *metabuf) { @@ -3438,6 +3523,10 @@ int venus_hfi_queue_buffer(struct msm_vidc_inst *inst, goto unlock; } + rc = venus_hfi_add_pending_packets(inst); + if (rc) + goto unlock; + rc = __iface_cmdq_write(inst->core, inst->packet); if (rc) goto unlock; From 000a10db5697df77705dbdeb1a4c512df15ccdb9 Mon Sep 17 00:00:00 2001 From: Chinmay Sawarkar Date: Thu, 3 Feb 2022 15:26:13 -0800 Subject: [PATCH 0532/1061] video: driver: Port fixes from iris2 to iris3 1. Change format specifier and API clean-up 2. Remove HEIC from Lossless Encoding 3. add support for timestamp reorder 4. alter bitrate_mode child adjust sequence 5. disable dynamic low latency Change-Id: I57d8150bac123cdfd8a0d14a2422246b87b4abfa Signed-off-by: Chinmay Sawarkar --- driver/platform/kalama/src/msm_vidc_kalama.c | 20 +++++++++++-------- .../variant/iris3/src/msm_vidc_buffer_iris3.c | 3 +-- driver/variant/iris3/src/msm_vidc_iris3.c | 10 +++------- .../variant/iris3/src/msm_vidc_power_iris3.c | 2 -- 4 files changed, 16 insertions(+), 19 deletions(-) diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index ab8af3551b..16104365da 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -273,6 +273,11 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { {0}, NULL, msm_vidc_set_u32}, + {TS_REORDER, DEC, H264|HEVC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_TS_REORDER}, + {HFLIP, ENC, CODECS_ALL, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, @@ -401,8 +406,8 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { {0}, {LTR_COUNT, IR_RANDOM, TIME_DELTA_BASED_RC, I_FRAME_QP, P_FRAME_QP, B_FRAME_QP, ENH_LAYER_COUNT, BIT_RATE, - CONTENT_ADAPTIVE_CODING, BITRATE_BOOST, MIN_QUALITY, - VBV_DELAY, PEAK_BITRATE,SLICE_MODE, META_ROI_INFO, + META_ROI_INFO, MIN_QUALITY, BITRATE_BOOST, VBV_DELAY, + PEAK_BITRATE, SLICE_MODE, CONTENT_ADAPTIVE_CODING, BLUR_TYPES, LOWLATENCY_MODE}, msm_vidc_adjust_bitrate_mode, msm_vidc_set_u32_enum}, @@ -419,13 +424,12 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { {0}, {LTR_COUNT, IR_RANDOM, TIME_DELTA_BASED_RC, I_FRAME_QP, P_FRAME_QP, B_FRAME_QP, CONSTANT_QUALITY, ENH_LAYER_COUNT, - CONTENT_ADAPTIVE_CODING, BIT_RATE, - BITRATE_BOOST, MIN_QUALITY, VBV_DELAY, - PEAK_BITRATE, SLICE_MODE, META_ROI_INFO, BLUR_TYPES, - LOWLATENCY_MODE}, + BIT_RATE, META_ROI_INFO, MIN_QUALITY, BITRATE_BOOST, VBV_DELAY, + PEAK_BITRATE, SLICE_MODE, CONTENT_ADAPTIVE_CODING, + BLUR_TYPES, LOWLATENCY_MODE}, msm_vidc_adjust_bitrate_mode, msm_vidc_set_u32_enum}, - {LOSSLESS, ENC, HEVC|HEIC, + {LOSSLESS, ENC, HEVC, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU}, @@ -531,7 +535,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDC_LOWLATENCY_REQUEST, HFI_PROP_SEQ_CHANGE_AT_SYNC_FRAME, - CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + CAP_FLAG_INPUT_PORT}, {LTR_COUNT, ENC, H264|HEVC, 0, 2, 1, 0, diff --git a/driver/variant/iris3/src/msm_vidc_buffer_iris3.c b/driver/variant/iris3/src/msm_vidc_buffer_iris3.c index 66b77c8005..8cf777da6f 100644 --- a/driver/variant/iris3/src/msm_vidc_buffer_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_buffer_iris3.c @@ -614,8 +614,7 @@ static int msm_vidc_input_min_count_iris3(struct msm_vidc_inst* inst) HFI_IRIS3_ENC_MIN_INPUT_BUF_COUNT(input_min_count, total_hb_layer); } else { - i_vpr_e(inst, "%s: invalid domain\n", - __func__, inst->domain); + i_vpr_e(inst, "%s: invalid domain %d\n", __func__, inst->domain); return 0; } diff --git a/driver/variant/iris3/src/msm_vidc_iris3.c b/driver/variant/iris3/src/msm_vidc_iris3.c index 1ce11804b7..2aa9a1979b 100644 --- a/driver/variant/iris3/src/msm_vidc_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_iris3.c @@ -297,7 +297,7 @@ static int __disable_regulator_iris3(struct msm_vidc_core *core, rc = __acquire_regulator(core, rinfo); if (rc) { d_vpr_e("%s: failed to acquire %s, rc = %d\n", - rinfo->name, rc); + __func__, rinfo->name, rc); /* Bring attention to this issue */ WARN_ON(true); return rc; @@ -307,7 +307,7 @@ static int __disable_regulator_iris3(struct msm_vidc_core *core, rc = regulator_disable(rinfo->regulator); if (rc) { d_vpr_e("%s: failed to disable %s, rc = %d\n", - rinfo->name, rc); + __func__, rinfo->name, rc); return rc; } d_vpr_h("%s: disabled regulator %s\n", __func__, rinfo->name); @@ -1059,12 +1059,8 @@ int msm_vidc_decide_work_route_iris3(struct msm_vidc_inst* inst) CODED_FRAMES_INTERLACE) work_route = MSM_VIDC_PIPE_1; } else if (is_encode_session(inst)) { - u32 slice_mode, width, height; - struct v4l2_format* f; + u32 slice_mode; - f = &inst->fmts[INPUT_PORT]; - height = f->fmt.pix_mp.height; - width = f->fmt.pix_mp.width; slice_mode = inst->capabilities->cap[SLICE_MODE].value; /*TODO Pipe=1 for legacy CBR*/ diff --git a/driver/variant/iris3/src/msm_vidc_power_iris3.c b/driver/variant/iris3/src/msm_vidc_power_iris3.c index a3ab8c8d9f..0653e5fe09 100644 --- a/driver/variant/iris3/src/msm_vidc_power_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_power_iris3.c @@ -15,7 +15,6 @@ u64 msm_vidc_calc_freq_iris3(struct msm_vidc_inst *inst, u32 data_size) { u64 freq = 0; struct msm_vidc_core* core; - struct msm_vidc_power* power; u64 vsp_cycles = 0, vpp_cycles = 0, fw_cycles = 0; u64 fw_vpp_cycles = 0, bitrate = 0; u32 vpp_cycles_per_mb; @@ -31,7 +30,6 @@ u64 msm_vidc_calc_freq_iris3(struct msm_vidc_inst *inst, u32 data_size) return freq; } - power = &inst->power; core = inst->core; if (!core->dt) { d_vpr_e("%s: invalid params\n", __func__); From 9df792a982d9ebe4a2737332244a02e3a3416b37 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Fri, 4 Feb 2022 10:33:43 -0800 Subject: [PATCH 0533/1061] video: driver: propagate i/p port color info to o/p port Client may do g_fmt on output port to fetch output port color info. Hence, update output port color info with client set input port color info. Change-Id: Ifa3b16763d7389cd063493e25ce8b266ce1cb8c6 Signed-off-by: Akshata Sahukar --- driver/vidc/src/msm_vdec.c | 23 ++++++++++++++++++++++- driver/vidc/src/msm_venc.c | 14 +++++++++++++- 2 files changed, 35 insertions(+), 2 deletions(-) diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 837f7bd96d..3bb70b0eab 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -1493,6 +1493,16 @@ static int msm_vdec_read_input_subcr_params(struct msm_vidc_inst *inst) __func__); } + /* align input port color info with output port */ + inst->fmts[INPUT_PORT].fmt.pix_mp.colorspace = + inst->fmts[OUTPUT_PORT].fmt.pix_mp.colorspace; + inst->fmts[INPUT_PORT].fmt.pix_mp.xfer_func = + inst->fmts[OUTPUT_PORT].fmt.pix_mp.xfer_func; + inst->fmts[INPUT_PORT].fmt.pix_mp.ycbcr_enc = + inst->fmts[OUTPUT_PORT].fmt.pix_mp.ycbcr_enc; + inst->fmts[INPUT_PORT].fmt.pix_mp.quantization = + inst->fmts[OUTPUT_PORT].fmt.pix_mp.quantization; + inst->buffers.output.min_count = subsc_params.fw_min_count; inst->buffers.output.extra_count = call_session_op(core, extra_count, inst, MSM_VIDC_BUF_OUTPUT); @@ -2488,7 +2498,7 @@ int msm_vdec_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) { int rc = 0; struct msm_vidc_core *core; - struct v4l2_format *fmt; + struct v4l2_format *fmt, *output_fmt; u32 codec_align, pix_fmt; if (!inst || !inst->core) { @@ -2539,6 +2549,17 @@ int msm_vdec_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) } inst->buffers.input.size = fmt->fmt.pix_mp.plane_fmt[0].sizeimage; + /* update input port color info */ + fmt->fmt.pix_mp.colorspace = f->fmt.pix_mp.colorspace; + fmt->fmt.pix_mp.xfer_func = f->fmt.pix_mp.xfer_func; + fmt->fmt.pix_mp.ycbcr_enc = f->fmt.pix_mp.ycbcr_enc; + fmt->fmt.pix_mp.quantization = f->fmt.pix_mp.quantization; + /* update output port color info */ + output_fmt = &inst->fmts[OUTPUT_PORT]; + output_fmt->fmt.pix_mp.colorspace = f->fmt.pix_mp.colorspace; + output_fmt->fmt.pix_mp.xfer_func = f->fmt.pix_mp.xfer_func; + output_fmt->fmt.pix_mp.ycbcr_enc = f->fmt.pix_mp.ycbcr_enc; + output_fmt->fmt.pix_mp.quantization = f->fmt.pix_mp.quantization; /* update crop dimensions */ inst->crop.left = inst->crop.top = 0; diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index 895da9d860..ebde5333b0 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -1212,7 +1212,7 @@ static int msm_venc_s_fmt_output_meta(struct msm_vidc_inst *inst, struct v4l2_fo static int msm_venc_s_fmt_input(struct msm_vidc_inst *inst, struct v4l2_format *f) { int rc = 0; - struct v4l2_format *fmt; + struct v4l2_format *fmt, *output_fmt; struct msm_vidc_core *core; u32 pix_fmt, width, height, size, bytesperline, crop_width, crop_height; @@ -1258,10 +1258,22 @@ static int msm_venc_s_fmt_input(struct msm_vidc_inst *inst, struct v4l2_format * else size = call_session_op(core, buffer_size, inst, MSM_VIDC_BUF_INPUT); fmt->fmt.pix_mp.plane_fmt[0].sizeimage = size; + /* update input port colorspace info */ fmt->fmt.pix_mp.colorspace = f->fmt.pix_mp.colorspace; fmt->fmt.pix_mp.xfer_func = f->fmt.pix_mp.xfer_func; fmt->fmt.pix_mp.ycbcr_enc = f->fmt.pix_mp.ycbcr_enc; fmt->fmt.pix_mp.quantization = f->fmt.pix_mp.quantization; + /* + * Update output port colorspace info. + * NOTE: If client needs CSC, then client needs to ensure setting + * output port color after setting input color info. + */ + output_fmt = &inst->fmts[OUTPUT_PORT]; + output_fmt->fmt.pix_mp.colorspace = fmt->fmt.pix_mp.colorspace; + output_fmt->fmt.pix_mp.xfer_func = fmt->fmt.pix_mp.xfer_func; + output_fmt->fmt.pix_mp.ycbcr_enc = fmt->fmt.pix_mp.ycbcr_enc; + output_fmt->fmt.pix_mp.quantization = fmt->fmt.pix_mp.quantization; + inst->buffers.input.min_count = call_session_op(core, min_count, inst, MSM_VIDC_BUF_INPUT); inst->buffers.input.extra_count = call_session_op(core, From 9978dc376e19c10e7aa4c835a3c2cf485b59ad76 Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Mon, 31 Jan 2022 10:02:43 -0800 Subject: [PATCH 0534/1061] video: driver: add support to send input meta buffer via request Client can enable V4L2_CID_MPEG_VIDC_INPUT_METADATA_VIA_REQUEST_ENABLE control and send input metadata buffer via request. Change-Id: Icccdada8253d1d0291c01e2e539968141f7ddd2c Signed-off-by: Darshana Patil --- driver/platform/kalama/src/msm_vidc_kalama.c | 9 ++ driver/vidc/inc/msm_vidc_driver.h | 2 + driver/vidc/inc/msm_vidc_internal.h | 1 + driver/vidc/src/msm_vdec.c | 18 ++- driver/vidc/src/msm_venc.c | 18 ++- driver/vidc/src/msm_vidc_control.c | 11 ++ driver/vidc/src/msm_vidc_driver.c | 103 +++++++++++++++++- driver/vidc/src/msm_vidc_vb2.c | 32 ++++-- .../uapi/vidc/media/v4l2_vidc_extensions.h | 3 + 9 files changed, 176 insertions(+), 21 deletions(-) diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index 3661ea221a..419c32c67e 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -1519,6 +1519,15 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { {0}, {0}, NULL, NULL}, + {INPUT_META_VIA_REQUEST, ENC|DEC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_INPUT_METADATA_VIA_REQUEST_ENABLE, + 0, + CAP_FLAG_INPUT_PORT, + {0}, {0}, + NULL, NULL}, + {META_LTR_MARK_USE, ENC, H264|HEVC, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index b44dd63416..3f80c8b066 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -452,5 +452,7 @@ bool res_is_less_than(u32 width, u32 height, bool res_is_less_than_or_equal_to(u32 width, u32 height, u32 ref_width, u32 ref_height); int msm_vidc_get_properties(struct msm_vidc_inst *inst); +int msm_vidc_create_input_metadata_buffer(struct msm_vidc_inst *inst, u32 buf_fd); +int msm_vidc_update_input_meta_buffer_index(struct msm_vidc_inst *inst, struct vb2_buffer *vb2); #endif // _MSM_VIDC_DRIVER_H_ diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 31ac22d028..42b4dea299 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -433,6 +433,7 @@ enum msm_vidc_inst_capability_type { SUPER_BLOCK, DRAP, INPUT_METADATA_FD, + INPUT_META_VIA_REQUEST, META_BITSTREAM_RESOLUTION, META_CROP_OFFSETS, META_DPB_MISR, diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 837f7bd96d..5c554a212e 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -1613,12 +1613,18 @@ int msm_vdec_streamon_input(struct msm_vidc_inst *inst) return -EINVAL; } - if (is_input_meta_enabled(inst) && - !inst->bufq[INPUT_META_PORT].vb2q->streaming) { - i_vpr_e(inst, - "%s: Meta port must be streamed on before data port\n", - __func__); - return -EINVAL; + /* + * do not check for input meta port streamon when + * request is enabled + */ + if (!inst->capabilities->cap[INPUT_META_VIA_REQUEST].value) { + if (is_input_meta_enabled(inst) && + !inst->bufq[INPUT_META_PORT].vb2q->streaming) { + i_vpr_e(inst, + "%s: Meta port must be streamed on before data port\n", + __func__); + return -EINVAL; + } } rc = msm_vidc_check_session_supported(inst); diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index 895da9d860..edd9e278fd 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -814,12 +814,18 @@ int msm_venc_streamon_input(struct msm_vidc_inst *inst) return -EINVAL; } - if (is_input_meta_enabled(inst) && - !inst->bufq[INPUT_META_PORT].vb2q->streaming) { - i_vpr_e(inst, - "%s: Meta port must be streamed on before data port\n", - __func__); - return -EINVAL; + /* + * do not check for input meta port streamon when + * request is enabled + */ + if (!inst->capabilities->cap[INPUT_META_VIA_REQUEST].value) { + if (is_input_meta_enabled(inst) && + !inst->bufq[INPUT_META_PORT].vb2q->streaming) { + i_vpr_e(inst, + "%s: Meta port must be streamed on before data port\n", + __func__); + return -EINVAL; + } } rc = msm_vidc_check_session_supported(inst); diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 175a547fc9..cdc66ae768 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -854,6 +854,17 @@ int msm_v4l2_op_s_ctrl(struct v4l2_ctrl *ctrl) return -EINVAL; } + if (ctrl->id == V4L2_CID_MPEG_VIDC_INPUT_METADATA_FD) { + if (!capability->cap[INPUT_META_VIA_REQUEST].value) { + i_vpr_e(inst, + "%s: input metadata not enabled via request\n", __func__); + return -EINVAL; + } + rc = msm_vidc_create_input_metadata_buffer(inst, ctrl->val); + if (rc) + return rc; + } + capability->cap[cap_id].flags |= CAP_FLAG_CLIENT_SET; /* Static setting */ if (!inst->bufq[OUTPUT_PORT].vb2q->streaming) { diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 9e96d4c329..97640c55e8 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -150,6 +150,7 @@ static const struct msm_vidc_cap_name cap_name_arr[] = { {SUPER_BLOCK, "SUPER_BLOCK" }, {DRAP, "DRAP" }, {INPUT_METADATA_FD, "INPUT_METADATA_FD" }, + {INPUT_META_VIA_REQUEST, "INPUT_META_VIA_REQUEST" }, {META_BITSTREAM_RESOLUTION, "META_BITSTREAM_RESOLUTION" }, {META_CROP_OFFSETS, "META_CROP_OFFSETS" }, {META_DPB_MISR, "META_DPB_MISR" }, @@ -1296,6 +1297,7 @@ bool msm_vidc_allow_s_ctrl(struct msm_vidc_inst *inst, u32 id) case V4L2_CID_MPEG_VIDC_CODEC_CONFIG: case V4L2_CID_MPEG_VIDC_PRIORITY: case V4L2_CID_MPEG_VIDC_LOWLATENCY_REQUEST: + case V4L2_CID_MPEG_VIDC_INPUT_METADATA_FD: allow = true; break; default: @@ -3633,7 +3635,7 @@ int msm_vidc_vb2_buffer_done(struct msm_vidc_inst *inst, struct vb2_v4l2_buffer *vbuf; bool found; - if (!inst || !buf) { + if (!inst || !inst->capabilities || !buf) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -3644,6 +3646,14 @@ int msm_vidc_vb2_buffer_done(struct msm_vidc_inst *inst, if (port < 0) return -EINVAL; + /* + * vb2_buffer_done not required if input metadata + * buffer sent via request api + */ + if (buf->type == MSM_VIDC_BUF_INPUT_META && + inst->capabilities->cap[INPUT_META_VIA_REQUEST].value) + return 0; + q = inst->bufq[port].vb2q; if (!q->streaming) { i_vpr_e(inst, "%s: port %d is not streaming\n", @@ -6138,3 +6148,94 @@ int msm_vidc_get_properties(struct msm_vidc_inst *inst) return 0; } + +int msm_vidc_create_input_metadata_buffer(struct msm_vidc_inst *inst, u32 fd) +{ + int rc = 0; + struct msm_vidc_buffer *buf = NULL; + struct msm_vidc_buffers *buffers; + struct dma_buf *dma_buf; + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (fd <= 0) { + i_vpr_e(inst, "%s: invalid input metadata buffer fd %d\n", + __func__, fd); + return -EINVAL; + } + + buffers = msm_vidc_get_buffers(inst, MSM_VIDC_BUF_INPUT_META, __func__); + if (!buffers) + return -EINVAL; + + buf = msm_memory_pool_alloc(inst, MSM_MEM_POOL_BUFFER); + if (!buf) { + i_vpr_e(inst, "%s: buffer pool alloc failed\n", __func__); + return -EINVAL; + } + + INIT_LIST_HEAD(&buf->list); + buf->type = MSM_VIDC_BUF_INPUT_META; + buf->index = INT_MAX; + buf->fd = fd; + dma_buf = msm_vidc_memory_get_dmabuf(inst, fd); + if (!dma_buf) { + rc = -ENOMEM; + goto error_dma_buf; + } + buf->dmabuf = dma_buf; + buf->data_size = dma_buf->size; + buf->buffer_size = dma_buf->size; + buf->attr |= MSM_VIDC_ATTR_DEFERRED; + + rc = msm_vidc_map_driver_buf(inst, buf); + if (rc) + goto error_map; + + list_add_tail(&buf->list, &buffers->list); + return rc; + +error_map: + msm_vidc_memory_put_dmabuf(inst, buf->dmabuf); +error_dma_buf: + msm_memory_pool_free(inst, buf); + return rc; +} + +int msm_vidc_update_input_meta_buffer_index(struct msm_vidc_inst *inst, + struct vb2_buffer *vb2) +{ + int rc = 0; + bool found = false; + struct msm_vidc_buffer *buf = NULL; + struct msm_vidc_buffers *buffers; + + if (!inst || !vb2) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (vb2->type != INPUT_MPLANE) + return 0; + + buffers = msm_vidc_get_buffers(inst, MSM_VIDC_BUF_INPUT_META, __func__); + if (!buffers) + return -EINVAL; + list_for_each_entry(buf, &buffers->list, list) { + if (buf->index == INT_MAX) { + buf->index = vb2->index; + found = true; + break; + } + } + + if (!found) { + i_vpr_e(inst, "%s: missing input metabuffer for index %d\n", + __func__, vb2->index); + rc = -EINVAL; + } + return rc; +} \ No newline at end of file diff --git a/driver/vidc/src/msm_vidc_vb2.c b/driver/vidc/src/msm_vidc_vb2.c index 2184e302ef..496250f756 100644 --- a/driver/vidc/src/msm_vidc_vb2.c +++ b/driver/vidc/src/msm_vidc_vb2.c @@ -172,10 +172,19 @@ int msm_vidc_start_streaming(struct vb2_queue *q, unsigned int count) return -EINVAL; } inst = q->drv_priv; - if (!inst || !inst->core) { + if (!inst || !inst->core || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } + + if (q->type == INPUT_META_PLANE && + inst->capabilities->cap[INPUT_META_VIA_REQUEST].value) { + i_vpr_e(inst, + "%s: invalid input meta port start when request enabled\n", + __func__); + return -EINVAL; + } + if (q->type == INPUT_META_PLANE || q->type == OUTPUT_META_PLANE) { i_vpr_h(inst, "%s: nothing to start on %s\n", __func__, v4l2_type_name(q->type)); @@ -364,13 +373,16 @@ void msm_vidc_buf_queue(struct vb2_buffer *vb2) inst->request = false; i_vpr_e(inst, "%s: request setup failed, error %d\n", __func__, rc); - msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); - v4l2_ctrl_request_complete(vb2->req_obj.req, &inst->ctrl_handler); - vb2_buffer_done(vb2, VB2_BUF_STATE_ERROR); - return; + goto error; } inst->request = false; + if (inst->capabilities->cap[INPUT_META_VIA_REQUEST].value) { + rc = msm_vidc_update_input_meta_buffer_index(inst, vb2); + if (rc) + goto error; + } + if (is_decode_session(inst)) rc = msm_vdec_qbuf(inst, vb2); else if (is_encode_session(inst)) @@ -380,10 +392,14 @@ void msm_vidc_buf_queue(struct vb2_buffer *vb2) if (rc) { print_vb2_buffer("failed vb2-qbuf", inst, vb2); - msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); - v4l2_ctrl_request_complete(vb2->req_obj.req, &inst->ctrl_handler); - vb2_buffer_done(vb2, VB2_BUF_STATE_ERROR); + goto error; } + return; + +error: + msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); + v4l2_ctrl_request_complete(vb2->req_obj.req, &inst->ctrl_handler); + vb2_buffer_done(vb2, VB2_BUF_STATE_ERROR); } void msm_vidc_buf_cleanup(struct vb2_buffer *vb) diff --git a/include/uapi/vidc/media/v4l2_vidc_extensions.h b/include/uapi/vidc/media/v4l2_vidc_extensions.h index 540ef12684..e8a4e5e6f0 100644 --- a/include/uapi/vidc/media/v4l2_vidc_extensions.h +++ b/include/uapi/vidc/media/v4l2_vidc_extensions.h @@ -197,6 +197,9 @@ enum v4l2_mpeg_video_av1_tier { /* Control to set input metadata buffer fd */ #define V4L2_CID_MPEG_VIDC_INPUT_METADATA_FD \ (V4L2_CID_MPEG_VIDC_BASE + 0x36) +/* Control to enable input metadata via request api */ +#define V4L2_CID_MPEG_VIDC_INPUT_METADATA_VIA_REQUEST_ENABLE \ + (V4L2_CID_MPEG_VIDC_BASE + 0x37) /* add new controls above this line */ /* Deprecate below controls once availble in gki and gsi bionic header */ From 784cc63c21d9826a70ae21036f656eb8f83956e6 Mon Sep 17 00:00:00 2001 From: Chinmay Sawarkar Date: Wed, 2 Feb 2022 13:06:35 -0800 Subject: [PATCH 0535/1061] video: driver: reset video_cc_mvs0_clk_src clock_rate Reset video_cc_mvs0_clk_src value to resolve MMRM high video clock projection issue. Change-Id: Ieb937dfdc7d48e1a95a0052a32189d00eeac70cf Signed-off-by: Chinmay Sawarkar --- driver/variant/iris3/src/msm_vidc_iris3.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/driver/variant/iris3/src/msm_vidc_iris3.c b/driver/variant/iris3/src/msm_vidc_iris3.c index 2aa9a1979b..94c79f28a4 100644 --- a/driver/variant/iris3/src/msm_vidc_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_iris3.c @@ -618,6 +618,14 @@ static int __power_off_iris3(struct msm_vidc_core *core) if (!core->power_enabled) return 0; + /** + * Reset video_cc_mvs0_clk_src value to resolve MMRM high video + * clock projection issue. + */ + rc = __set_clocks(core, 0); + if (rc) + d_vpr_e("%s: resetting clocks failed\n", __func__); + if (__power_off_iris3_hardware(core)) d_vpr_e("%s: failed to power off hardware\n", __func__); From f7c4e2fe65bdf285d266666f786ccad2d163c615 Mon Sep 17 00:00:00 2001 From: Chinmay Sawarkar Date: Fri, 4 Feb 2022 15:53:23 -0800 Subject: [PATCH 0536/1061] video: driver: Update power down sequence Copy fixes in power down sequence from Iris2 to Iris3. Change-Id: I0ec94dbe064e10b6c4172b206561d8951c00a26b Signed-off-by: Chinmay Sawarkar --- driver/variant/iris3/src/msm_vidc_iris3.c | 23 ++++++++--------------- 1 file changed, 8 insertions(+), 15 deletions(-) diff --git a/driver/variant/iris3/src/msm_vidc_iris3.c b/driver/variant/iris3/src/msm_vidc_iris3.c index 94c79f28a4..76169626bf 100644 --- a/driver/variant/iris3/src/msm_vidc_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_iris3.c @@ -575,10 +575,10 @@ static int __power_off_iris3_controller(struct msm_vidc_core *core) if (rc) d_vpr_h("%s: debug bridge release failed\n", __func__); - /* power down process */ - rc = __disable_regulator_iris3(core, "iris-ctl"); + /* Turn off MVP MVS0C core clock */ + rc = __disable_unprepare_clock_iris3(core, "core_clk"); if (rc) { - d_vpr_e("%s: disable regulator iris-ctl failed\n", __func__); + d_vpr_e("%s: disable unprepare core_clk failed\n", __func__); rc = 0; } @@ -589,17 +589,16 @@ static int __power_off_iris3_controller(struct msm_vidc_core *core) rc = 0; } - /* Turn off MVP MVS0C core clock */ - rc = __disable_unprepare_clock_iris3(core, "core_clk"); + rc = call_venus_op(core, reset_ahb2axi_bridge, core); if (rc) { - d_vpr_e("%s: disable unprepare core_clk failed\n", __func__); + d_vpr_e("%s: reset ahb2axi bridge failed\n", __func__); rc = 0; } - /* Turn off MVP MVS0 SRC clock */ - rc = __disable_unprepare_clock_iris3(core, "video_cc_mvs0_clk_src"); + /* power down process */ + rc = __disable_regulator_iris3(core, "iris-ctl"); if (rc) { - d_vpr_e("%s: disable unprepare video_cc_mvs0_clk_src failed\n", __func__); + d_vpr_e("%s: disable regulator iris-ctl failed\n", __func__); rc = 0; } @@ -664,14 +663,8 @@ static int __power_on_iris3_controller(struct msm_vidc_core *core) if (rc) goto fail_clk_controller; - rc = __prepare_enable_clock_iris3(core, "video_cc_mvs0_clk_src"); - if (rc) - goto fail_clk_src; - return 0; -fail_clk_src: - __disable_unprepare_clock_iris3(core, "core_clk"); fail_clk_controller: __disable_unprepare_clock_iris3(core, "gcc_video_axi0"); fail_clk_axi: From 4d8dedc0669b842be436d83e6d113c281d658072 Mon Sep 17 00:00:00 2001 From: Dikshita Agarwal Date: Tue, 1 Feb 2022 13:13:22 +0530 Subject: [PATCH 0537/1061] video: driver: handle invalid format in s_fmt Handle invalid format 0xfffff by invoking try_fmt in s_fmt. It is expected from driver to return EINVAL for only unsupported buf type and if color format is unsupported, driver should fill the fmt structure with valid values. Partially Fixes: v4l2-compliance: TestSetFormat(VIDIOC_S_FMT) Change-Id: I27e82866e8ad4a13661431f2a38a66ac3ef7dd80 Signed-off-by: Dikshita Agarwal --- driver/vidc/src/msm_vdec.c | 27 +++++++++++++-------------- driver/vidc/src/msm_venc.c | 24 +++++++++++++----------- 2 files changed, 26 insertions(+), 25 deletions(-) diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index b3f4f7e419..d236d7afe2 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -2410,27 +2410,25 @@ int msm_vdec_try_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) if (f->type == INPUT_MPLANE) { pix_fmt = v4l2_codec_to_driver(f->fmt.pix_mp.pixelformat, __func__); if (!pix_fmt) { - i_vpr_h(inst, "%s: unsupported codec, set default params\n", __func__); - f->fmt.pix_mp.width = DEFAULT_WIDTH; - f->fmt.pix_mp.height = DEFAULT_HEIGHT; - f->fmt.pix_mp.pixelformat = V4L2_PIX_FMT_H264; + i_vpr_e(inst, "%s: unsupported codec, set current params\n", __func__); + f->fmt.pix_mp.width = inst->fmts[INPUT_PORT].fmt.pix_mp.width; + f->fmt.pix_mp.height = inst->fmts[INPUT_PORT].fmt.pix_mp.height; + f->fmt.pix_mp.pixelformat = inst->fmts[INPUT_PORT].fmt.pix_mp.pixelformat; pix_fmt = v4l2_codec_to_driver(f->fmt.pix_mp.pixelformat, __func__); } } else if (f->type == OUTPUT_MPLANE) { + pix_fmt = v4l2_colorformat_to_driver(f->fmt.pix_mp.pixelformat, __func__); + if (!pix_fmt) { + i_vpr_e(inst, "%s: unsupported format, set current params\n", __func__); + f->fmt.pix_mp.pixelformat = inst->fmts[OUTPUT_PORT].fmt.pix_mp.pixelformat; + f->fmt.pix_mp.width = inst->fmts[OUTPUT_PORT].fmt.pix_mp.width; + f->fmt.pix_mp.height = inst->fmts[OUTPUT_PORT].fmt.pix_mp.height; + pix_fmt = v4l2_colorformat_to_driver(f->fmt.pix_mp.pixelformat, __func__); + } if (inst->bufq[INPUT_PORT].vb2q->streaming) { f->fmt.pix_mp.height = inst->fmts[INPUT_PORT].fmt.pix_mp.height; f->fmt.pix_mp.width = inst->fmts[INPUT_PORT].fmt.pix_mp.width; } - pix_fmt = v4l2_colorformat_to_driver(f->fmt.pix_mp.pixelformat, __func__); - if (!pix_fmt) { - i_vpr_h(inst, "%s: unsupported format, set default params\n", __func__); - f->fmt.pix_mp.pixelformat = V4L2_PIX_FMT_VIDC_NV12C; - f->fmt.pix_mp.width = VIDEO_Y_STRIDE_PIX(f->fmt.pix_mp.pixelformat, - DEFAULT_WIDTH); - f->fmt.pix_mp.height = VIDEO_Y_SCANLINES(f->fmt.pix_mp.pixelformat, - DEFAULT_HEIGHT); - pix_fmt = v4l2_colorformat_to_driver(f->fmt.pix_mp.pixelformat, __func__); - } } else { i_vpr_e(inst, "%s: invalid type %d\n", __func__, f->type); return -EINVAL; @@ -2474,6 +2472,7 @@ int msm_vdec_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) return -EINVAL; } core = inst->core; + msm_vdec_try_fmt(inst, f); if (f->type == INPUT_MPLANE) { if (inst->fmts[INPUT_PORT].fmt.pix_mp.pixelformat != diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index 895da9d860..1e269e7ec8 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -1060,21 +1060,20 @@ int msm_venc_try_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) if (f->type == INPUT_MPLANE) { pix_fmt = v4l2_colorformat_to_driver(f->fmt.pix_mp.pixelformat, __func__); if (!pix_fmt) { - i_vpr_h(inst, "%s: unsupported format, set default params\n", __func__); - f->fmt.pix_mp.pixelformat = V4L2_PIX_FMT_VIDC_NV12C; - f->fmt.pix_mp.width = VIDEO_Y_STRIDE_PIX(f->fmt.pix_mp.pixelformat, - DEFAULT_WIDTH); - f->fmt.pix_mp.height = VIDEO_Y_SCANLINES(f->fmt.pix_mp.pixelformat, - DEFAULT_HEIGHT); + i_vpr_e(inst, "%s: unsupported format, set current params\n", __func__); + f->fmt.pix_mp.pixelformat = inst->fmts[INPUT_PORT].fmt.pix_mp.pixelformat; + f->fmt.pix_mp.width = inst->fmts[INPUT_PORT].fmt.pix_mp.width; + f->fmt.pix_mp.height = inst->fmts[INPUT_PORT].fmt.pix_mp.height; + pix_fmt = v4l2_colorformat_to_driver(f->fmt.pix_mp.pixelformat, __func__); } } else if (f->type == OUTPUT_MPLANE) { pix_fmt = v4l2_codec_to_driver(f->fmt.pix_mp.pixelformat, __func__); if (!pix_fmt) { - i_vpr_h(inst, "%s: unsupported codec, set default params\n", __func__); - f->fmt.pix_mp.width = DEFAULT_WIDTH; - f->fmt.pix_mp.height = DEFAULT_HEIGHT; - f->fmt.pix_mp.pixelformat = V4L2_PIX_FMT_H264; - pix_fmt = v4l2_colorformat_to_driver(f->fmt.pix_mp.pixelformat, __func__); + i_vpr_e(inst, "%s: unsupported codec, set current params\n", __func__); + f->fmt.pix_mp.width = inst->fmts[OUTPUT_PORT].fmt.pix_mp.width; + f->fmt.pix_mp.height = inst->fmts[OUTPUT_PORT].fmt.pix_mp.height; + f->fmt.pix_mp.pixelformat = inst->fmts[OUTPUT_PORT].fmt.pix_mp.pixelformat; + pix_fmt = v4l2_codec_to_driver(f->fmt.pix_mp.pixelformat, __func__); } } else { i_vpr_e(inst, "%s: invalid type %d\n", __func__, f->type); @@ -1101,6 +1100,7 @@ int msm_venc_s_fmt_output(struct msm_vidc_inst *inst, struct v4l2_format *f) return -EINVAL; } core = inst->core; + msm_venc_try_fmt(inst, f); fmt = &inst->fmts[OUTPUT_PORT]; if (fmt->fmt.pix_mp.pixelformat != f->fmt.pix_mp.pixelformat) { @@ -1222,6 +1222,8 @@ static int msm_venc_s_fmt_input(struct msm_vidc_inst *inst, struct v4l2_format * return -EINVAL; } core = inst->core; + msm_venc_try_fmt(inst, f); + pix_fmt = v4l2_colorformat_to_driver(f->fmt.pix_mp.pixelformat, __func__); msm_vidc_update_cap_value(inst, PIX_FMTS, pix_fmt, __func__); From 776fb518c89e9b6a11bd40524c50e094cc6df5d8 Mon Sep 17 00:00:00 2001 From: Chinmay Sawarkar Date: Wed, 2 Feb 2022 14:17:45 -0800 Subject: [PATCH 0538/1061] video: driver: update iris3 power collapse sequence 1. Set Iris CPU NoC to Low power 2. Remove Debug bridge Low power 3. Reset MVP QNS4PDXFIFO 4. Remove Disable GCC_VIDEO_AXI0_CLK clock Change-Id: I4a88589cacc894dc5717e8ccb5f731f62e82202d Signed-off-by: Chinmay Sawarkar --- driver/variant/iris3/src/msm_vidc_iris3.c | 45 ++++++++++++++--------- 1 file changed, 27 insertions(+), 18 deletions(-) diff --git a/driver/variant/iris3/src/msm_vidc_iris3.c b/driver/variant/iris3/src/msm_vidc_iris3.c index 76169626bf..d7b9a5adb5 100644 --- a/driver/variant/iris3/src/msm_vidc_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_iris3.c @@ -108,6 +108,8 @@ #define WRAPPER_DEBUG_BRIDGE_LPI_CONTROL_IRIS3 (WRAPPER_BASE_OFFS_IRIS3 + 0x54) #define WRAPPER_DEBUG_BRIDGE_LPI_STATUS_IRIS3 (WRAPPER_BASE_OFFS_IRIS3 + 0x58) +#define WRAPPER_IRIS_CPU_NOC_LPI_CONTROL (WRAPPER_BASE_OFFS_IRIS3 + 0x5C) +#define WRAPPER_IRIS_CPU_NOC_LPI_STATUS (WRAPPER_BASE_OFFS_IRIS3 + 0x60) #define WRAPPER_CORE_CLOCK_CONFIG_IRIS3 (WRAPPER_BASE_OFFS_IRIS3 + 0x88) /* @@ -118,6 +120,8 @@ #define WRAPPER_TZ_BASE_OFFS 0x000C0000 #define WRAPPER_TZ_CPU_CLOCK_CONFIG (WRAPPER_TZ_BASE_OFFS) #define WRAPPER_TZ_CPU_STATUS (WRAPPER_TZ_BASE_OFFS + 0x10) +#define WRAPPER_TZ_CTL_AXI_CLOCK_CONFIG (WRAPPER_TZ_BASE_OFFS + 0x14) +#define WRAPPER_TZ_QNS4PDXFIFO_RESET (WRAPPER_TZ_BASE_OFFS + 0x18) #define CTRL_INIT_IRIS3 CPU_CS_SCIACMD_IRIS3 @@ -555,15 +559,16 @@ static int __power_off_iris3_controller(struct msm_vidc_core *core) if (rc) d_vpr_h("%s: AON_WRAPPER_MVP_NOC_LPI_CONTROL failed\n", __func__); - /* Set Debug bridge Low power */ - rc = __write_register(core, WRAPPER_DEBUG_BRIDGE_LPI_CONTROL_IRIS3, 0x7); + /* Set Iris CPU NoC to Low power */ + rc = __write_register_masked(core, WRAPPER_IRIS_CPU_NOC_LPI_CONTROL, + 0x1, BIT(0)); if (rc) return rc; - rc = __read_register_with_poll_timeout(core, WRAPPER_DEBUG_BRIDGE_LPI_STATUS_IRIS3, - 0x7, 0x7, 200, 2000); + rc = __read_register_with_poll_timeout(core, WRAPPER_IRIS_CPU_NOC_LPI_STATUS, + 0x1, 0x1, 200, 2000); if (rc) - d_vpr_h("%s: debug bridge low power failed\n", __func__); + d_vpr_h("%s: WRAPPER_IRIS_CPU_NOC_LPI_CONTROL failed\n", __func__); /* Debug bridge LPI release */ rc = __write_register(core, WRAPPER_DEBUG_BRIDGE_LPI_CONTROL_IRIS3, 0x0); @@ -575,6 +580,23 @@ static int __power_off_iris3_controller(struct msm_vidc_core *core) if (rc) d_vpr_h("%s: debug bridge release failed\n", __func__); + /* Reset MVP QNS4PDXFIFO */ + rc = __write_register(core, WRAPPER_TZ_CTL_AXI_CLOCK_CONFIG, 0x3); + if (rc) + return rc; + + rc = __write_register(core, WRAPPER_TZ_QNS4PDXFIFO_RESET, 0x1); + if (rc) + return rc; + + rc = __write_register(core, WRAPPER_TZ_QNS4PDXFIFO_RESET, 0x0); + if (rc) + return rc; + + rc = __write_register(core, WRAPPER_TZ_CTL_AXI_CLOCK_CONFIG, 0x0); + if (rc) + return rc; + /* Turn off MVP MVS0C core clock */ rc = __disable_unprepare_clock_iris3(core, "core_clk"); if (rc) { @@ -582,19 +604,6 @@ static int __power_off_iris3_controller(struct msm_vidc_core *core) rc = 0; } - /* Disable GCC_VIDEO_AXI0_CLK clock */ - rc = __disable_unprepare_clock_iris3(core, "gcc_video_axi0"); - if (rc) { - d_vpr_e("%s: disable unprepare gcc_video_axi0 failed\n", __func__); - rc = 0; - } - - rc = call_venus_op(core, reset_ahb2axi_bridge, core); - if (rc) { - d_vpr_e("%s: reset ahb2axi bridge failed\n", __func__); - rc = 0; - } - /* power down process */ rc = __disable_regulator_iris3(core, "iris-ctl"); if (rc) { From 4597327ed8cfd9f011ca232fb3160de3cb59c6ff Mon Sep 17 00:00:00 2001 From: Mahesh Kumar Sharma Date: Fri, 4 Feb 2022 15:08:14 -0800 Subject: [PATCH 0539/1061] video: driver: change maximum frame rate to 480fps In order to avoid performance issues when encoding 1280x720p frames with 960fps, change maximum frame rate to 480fps on Kalama. Change-Id: I0ca44ebf9524583a0a3ffc32423b0bb63acd0d47 Signed-off-by: Mahesh Kumar Sharma --- driver/platform/kalama/src/msm_vidc_kalama.c | 2 +- driver/platform/waipio/src/msm_vidc_waipio.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index d5f3994d4e..72a581c824 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -21,7 +21,7 @@ #define MAX_BITRATE 220000000 #define DEFAULT_BITRATE 20000000 #define MINIMUM_FPS 1 -#define MAXIMUM_FPS 960 +#define MAXIMUM_FPS 480 #define MIN_QP_10BIT -12 #define MIN_QP_8BIT 0 #define MAX_QP 51 diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index e2f1ba5a2b..f15ca8d102 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -19,7 +19,7 @@ #define MAX_BITRATE 220000000 #define DEFAULT_BITRATE 20000000 #define MINIMUM_FPS 1 -#define MAXIMUM_FPS 960 +#define MAXIMUM_FPS 480 #define MIN_QP_10BIT -12 #define MIN_QP_8BIT 0 #define MAX_QP 51 From 18e6df6689e1d73c2b211e193aa977c926f3cbad Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Tue, 8 Feb 2022 17:04:37 -0800 Subject: [PATCH 0540/1061] video: driver: check whether meta buffers dequeued from FW when metadata is enabled check if the meta buffers are dequeued from FW before sending vb2 buffer done on corresponding input or output buffers. Change-Id: Icabeaf08b398b9be0159d5db68c94734351b3a5a Signed-off-by: Darshana Patil --- driver/vidc/src/venus_hfi_response.c | 79 +++++++++++++++++++++++++--- 1 file changed, 71 insertions(+), 8 deletions(-) diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index c3a019cc80..b79b2042cd 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -1024,6 +1024,64 @@ static int handle_output_metadata_buffer(struct msm_vidc_inst *inst, return rc; } +static bool is_metabuffer_dequeued(struct msm_vidc_inst *inst, + struct msm_vidc_buffer *buf) +{ + bool found = false; + struct msm_vidc_buffers *buffers; + struct msm_vidc_buffer *buffer; + enum msm_vidc_buffer_type buffer_type; + + if (is_input_buffer(buf->type) && is_input_meta_enabled(inst)) + buffer_type = MSM_VIDC_BUF_INPUT_META; + else if (is_output_buffer(buf->type) && is_output_meta_enabled(inst)) + buffer_type = MSM_VIDC_BUF_OUTPUT_META; + else + return true; + + buffers = msm_vidc_get_buffers(inst, buffer_type, __func__); + if (!buffers) + return false; + + list_for_each_entry(buffer, &buffers->list, list) { + if (buffer->index == buf->index && + buffer->attr & MSM_VIDC_ATTR_DEQUEUED) { + found = true; + break; + } + } + return found; +} + +static int msm_vidc_check_meta_buffers(struct msm_vidc_inst *inst) +{ + int rc = 0; + int i; + struct msm_vidc_buffers *buffers; + struct msm_vidc_buffer *buf; + const enum msm_vidc_buffer_type buffer_type[] = { + MSM_VIDC_BUF_INPUT, + MSM_VIDC_BUF_OUTPUT, + }; + + for (i = 0; i < ARRAY_SIZE(buffer_type); i++) { + buffers = msm_vidc_get_buffers(inst, buffer_type[i], __func__); + if (!buffers) + return -EINVAL; + + list_for_each_entry(buf, &buffers->list, list) { + if (buf->attr & MSM_VIDC_ATTR_DEQUEUED) { + if (!is_metabuffer_dequeued(inst, buf)) { + print_vidc_buffer(VIDC_ERR, "err ", + "meta not dequeued", inst, buf); + return -EINVAL; + } + } + } + } + return rc; +} + static int handle_dequeue_buffers(struct msm_vidc_inst *inst) { int rc = 0; @@ -1031,13 +1089,18 @@ static int handle_dequeue_buffers(struct msm_vidc_inst *inst) struct msm_vidc_buffers *buffers; struct msm_vidc_buffer *buf; struct msm_vidc_buffer *dummy; - static const enum msm_vidc_buffer_type buffer_type[] = { + const enum msm_vidc_buffer_type buffer_type[] = { MSM_VIDC_BUF_INPUT_META, MSM_VIDC_BUF_INPUT, MSM_VIDC_BUF_OUTPUT_META, MSM_VIDC_BUF_OUTPUT, }; + /* check metabuffers dequeued before sending vb2_buffer_done() */ + rc = msm_vidc_check_meta_buffers(inst); + if (rc) + return rc; + for (i = 0; i < ARRAY_SIZE(buffer_type); i++) { buffers = msm_vidc_get_buffers(inst, buffer_type[i], __func__); if (!buffers) @@ -1134,12 +1197,12 @@ static int handle_session_buffer(struct msm_vidc_inst *inst, struct hfi_buffer *buffer; u32 hfi_handle_size = 0; const struct msm_vidc_hfi_buffer_handle *hfi_handle_arr = NULL; - static const struct msm_vidc_hfi_buffer_handle enc_input_hfi_handle[] = { + const struct msm_vidc_hfi_buffer_handle enc_input_hfi_handle[] = { {HFI_BUFFER_METADATA, handle_input_metadata_buffer }, {HFI_BUFFER_RAW, handle_input_buffer }, {HFI_BUFFER_VPSS, handle_release_internal_buffer }, }; - static const struct msm_vidc_hfi_buffer_handle enc_output_hfi_handle[] = { + const struct msm_vidc_hfi_buffer_handle enc_output_hfi_handle[] = { {HFI_BUFFER_METADATA, handle_output_metadata_buffer }, {HFI_BUFFER_BITSTREAM, handle_output_buffer }, {HFI_BUFFER_BIN, handle_release_internal_buffer }, @@ -1149,7 +1212,7 @@ static int handle_session_buffer(struct msm_vidc_inst *inst, {HFI_BUFFER_ARP, handle_release_internal_buffer }, {HFI_BUFFER_DPB, handle_release_internal_buffer }, }; - static const struct msm_vidc_hfi_buffer_handle dec_input_hfi_handle[] = { + const struct msm_vidc_hfi_buffer_handle dec_input_hfi_handle[] = { {HFI_BUFFER_METADATA, handle_input_metadata_buffer }, {HFI_BUFFER_BITSTREAM, handle_input_buffer }, {HFI_BUFFER_BIN, handle_release_internal_buffer }, @@ -1158,7 +1221,7 @@ static int handle_session_buffer(struct msm_vidc_inst *inst, {HFI_BUFFER_LINE, handle_release_internal_buffer }, {HFI_BUFFER_PERSIST, handle_release_internal_buffer }, }; - static const struct msm_vidc_hfi_buffer_handle dec_output_hfi_handle[] = { + const struct msm_vidc_hfi_buffer_handle dec_output_hfi_handle[] = { {HFI_BUFFER_METADATA, handle_output_metadata_buffer }, {HFI_BUFFER_RAW, handle_output_buffer }, {HFI_BUFFER_DPB, handle_release_internal_buffer }, @@ -1292,7 +1355,7 @@ static int handle_session_command(struct msm_vidc_inst *inst, struct hfi_packet *pkt) { int i, rc; - static const struct msm_vidc_hfi_packet_handle hfi_pkt_handle[] = { + const struct msm_vidc_hfi_packet_handle hfi_pkt_handle[] = { {HFI_CMD_OPEN, handle_session_open }, {HFI_CMD_CLOSE, handle_session_close }, {HFI_CMD_START, handle_session_start }, @@ -1558,7 +1621,7 @@ static int handle_system_response(struct msm_vidc_core *core, struct hfi_packet *packet; u8 *pkt, *start_pkt; int i, j; - static const struct msm_vidc_core_hfi_range be[] = { + const struct msm_vidc_core_hfi_range be[] = { {HFI_SYSTEM_ERROR_BEGIN, HFI_SYSTEM_ERROR_END, handle_system_error }, {HFI_PROP_BEGIN, HFI_PROP_END, handle_system_property }, {HFI_CMD_BEGIN, HFI_CMD_END, handle_system_init }, @@ -1605,7 +1668,7 @@ static int __handle_session_response(struct msm_vidc_inst *inst, u8 *pkt, *start_pkt; bool dequeue = false; int i, j; - static const struct msm_vidc_inst_hfi_range be[] = { + const struct msm_vidc_inst_hfi_range be[] = { {HFI_SESSION_ERROR_BEGIN, HFI_SESSION_ERROR_END, handle_session_error }, {HFI_INFORMATION_BEGIN, HFI_INFORMATION_END, handle_session_info }, {HFI_PROP_BEGIN, HFI_PROP_END, handle_session_property }, From 71f8dcf2f21d1dbce3e415bc580cf1518ffbbce0 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Mon, 31 Jan 2022 15:38:54 -0800 Subject: [PATCH 0541/1061] video: driver: Align hfi property file with CL: 35116137 Align driver hfi property file with fw file of CL: 35116137 Change-Id: Ic5abbb9212b664b55f16afa4c79e00fb0d76ae89 Signed-off-by: Akshata Sahukar --- driver/vidc/inc/hfi_property.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/driver/vidc/inc/hfi_property.h b/driver/vidc/inc/hfi_property.h index 0ac667a759..e2efc74563 100644 --- a/driver/vidc/inc/hfi_property.h +++ b/driver/vidc/inc/hfi_property.h @@ -469,6 +469,7 @@ enum hfi_picture_type { HFI_PICTURE_I = 0x00000008, HFI_PICTURE_CRA = 0x00000010, HFI_PICTURE_BLA = 0x00000020, + HFI_PICTURE_NOSHOW = 0x00000040, }; #define HFI_PROP_PICTURE_TYPE 0x03000162 @@ -542,6 +543,8 @@ enum hfi_nal_length_field_type { #define HFI_PROP_AV1_DRAP_CONFIG 0x03000189 +#define HFI_PROP_FENCE 0x0300018B + #define HFI_PROP_END 0x03FFFFFF #define HFI_SESSION_ERROR_BEGIN 0x04000000 From e5189157f197c601b2e600dfc2b61781dc8c565a Mon Sep 17 00:00:00 2001 From: Deepa Guthyappa Madivalara Date: Wed, 9 Feb 2022 17:19:44 -0800 Subject: [PATCH 0542/1061] video: driver: utilize v4l2_m2m_ioctl_streamon helper function Use v4l2_m2m_ioctl_streamon helper function for input and output ports Change-Id: I20375259321cc5925ccaf7f8eab95a94f55d2821 Signed-off-by: Deepa Guthyappa Madivalara --- driver/vidc/inc/msm_vidc.h | 3 ++- driver/vidc/inc/msm_vidc_vb2.h | 2 +- driver/vidc/src/msm_vidc.c | 12 ++++++++---- driver/vidc/src/msm_vidc_v4l2.c | 2 +- 4 files changed, 12 insertions(+), 7 deletions(-) diff --git a/driver/vidc/inc/msm_vidc.h b/driver/vidc/inc/msm_vidc.h index 0e5c837798..2542a0982b 100644 --- a/driver/vidc/inc/msm_vidc.h +++ b/driver/vidc/inc/msm_vidc.h @@ -33,7 +33,8 @@ int msm_vidc_release_buffer(void *instance, int buffer_type, int msm_vidc_qbuf(void *instance, struct media_device *mdev, struct v4l2_buffer *b); int msm_vidc_dqbuf(void *instance, struct v4l2_buffer *b); -int msm_vidc_streamon(void *instance, enum v4l2_buf_type i); +int msm_vidc_streamon(void *instance, struct file *filp, void *fh, + enum v4l2_buf_type i); int msm_vidc_query_ctrl(void *instance, struct v4l2_queryctrl *ctrl); int msm_vidc_query_menu(void *instance, struct v4l2_querymenu *qmenu); int msm_vidc_streamoff(void *instance, enum v4l2_buf_type i); diff --git a/driver/vidc/inc/msm_vidc_vb2.h b/driver/vidc/inc/msm_vidc_vb2.h index a1f6aef999..3deea03e10 100644 --- a/driver/vidc/inc/msm_vidc_vb2.h +++ b/driver/vidc/inc/msm_vidc_vb2.h @@ -34,7 +34,7 @@ void msm_vb2_unmap_dmabuf(void *buf_priv); int msm_vidc_queue_setup(struct vb2_queue *q, unsigned int *num_buffers, unsigned int *num_planes, unsigned int sizes[], struct device *alloc_devs[]); -int msm_vidc_start_streaming(struct vb2_queue *q, unsigned int count); +int msm_vidc_start_streaming(struct vb2_queue *q, unsigned int i); void msm_vidc_stop_streaming(struct vb2_queue *q); void msm_vidc_buf_queue(struct vb2_buffer *vb2); void msm_vidc_buf_cleanup(struct vb2_buffer *vb); diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index aa7b9b7bc1..0ff70c3d68 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -5,6 +5,7 @@ #include #include +#include #include "msm_vidc_core.h" #include "msm_vidc_inst.h" #include "msm_vdec.h" @@ -545,7 +546,8 @@ exit: } EXPORT_SYMBOL(msm_vidc_dqbuf); -int msm_vidc_streamon(void *instance, enum v4l2_buf_type type) +int msm_vidc_streamon(void *instance, struct file *filp, void *fh, + enum v4l2_buf_type type) { int rc = 0; struct msm_vidc_inst *inst = instance; @@ -569,10 +571,12 @@ int msm_vidc_streamon(void *instance, enum v4l2_buf_type type) rc = -EINVAL; goto exit; } - - rc = vb2_streamon(inst->bufq[port].vb2q, type); + if (port == INPUT_PORT || port == OUTPUT_PORT) + rc = v4l2_m2m_ioctl_streamon(filp, fh, type); + else + rc = vb2_streamon(inst->bufq[port].vb2q, type); if (rc) { - i_vpr_e(inst, "%s: vb2_streamon(%d) failed, %d\n", + i_vpr_e(inst, "%s: streamon(%d) failed, %d\n", __func__, type, rc); msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); goto exit; diff --git a/driver/vidc/src/msm_vidc_v4l2.c b/driver/vidc/src/msm_vidc_v4l2.c index c73c2ac2ad..14688a6b91 100644 --- a/driver/vidc/src/msm_vidc_v4l2.c +++ b/driver/vidc/src/msm_vidc_v4l2.c @@ -443,7 +443,7 @@ int msm_v4l2_streamon(struct file *filp, void *fh, rc = -EBUSY; goto unlock; } - rc = msm_vidc_streamon((void *)inst, i); + rc = msm_vidc_streamon((void *)inst, filp, fh, i); if (rc) goto unlock; From 3552fff0cfe8a669f255f7ac6fa1453af8fab7e1 Mon Sep 17 00:00:00 2001 From: Mahesh Kumar Sharma Date: Tue, 8 Feb 2022 18:50:55 -0800 Subject: [PATCH 0543/1061] video: driver: check proper DDR type Different DDR types are required for different UBWC configs. LPDDR5 and 5X are the only supported DDR types on Kailua. Change-Id: I33e486bef79d919f0d790734acd4be05c51a39e0 Signed-off-by: Mahesh Kumar Sharma --- driver/platform/kalama/src/msm_vidc_kalama.c | 24 +++++++++++++++++++- 1 file changed, 23 insertions(+), 1 deletion(-) diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index 72a581c824..530b0aada7 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -4,7 +4,7 @@ * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved. */ -#include +#include #include "msm_vidc_kalama.h" #include "msm_vidc_platform.h" @@ -54,6 +54,10 @@ #define CODECS_ALL (H264 | HEVC | VP9 | HEIC | AV1) #define MAXIMUM_OVERRIDE_VP9_FPS 120 +/* from of.h */ +#define DDR_TYPE_LPDDR5 0x8 +#define DDR_TYPE_LPDDR5X 0x9 + static struct msm_platform_core_capability core_data_kalama[] = { /* {type, value} */ {ENC_CODECS, H264|HEVC|HEIC}, @@ -1810,6 +1814,21 @@ static struct msm_vidc_platform_data kalama_data = { .bus_bw_nrt = bus_bw_nrt, }; +int msm_vidc_kalama_check_ddr_type(void) +{ + u32 ddr_type; + + ddr_type = of_fdt_get_ddrtype(); + if (ddr_type != DDR_TYPE_LPDDR5 && + ddr_type != DDR_TYPE_LPDDR5X) { + d_vpr_e("%s: wrong ddr type %d\n", __func__, ddr_type); + return -EINVAL; + } else { + d_vpr_h("%s: ddr type %d\n", __func__, ddr_type); + } + return 0; +} + static int msm_vidc_init_data(struct msm_vidc_core *core) { int rc = 0; @@ -1821,6 +1840,9 @@ static int msm_vidc_init_data(struct msm_vidc_core *core) d_vpr_h("%s: initialize kalama data\n", __func__); core->platform->data = kalama_data; + rc = msm_vidc_kalama_check_ddr_type(); + if (rc) + return rc; return rc; } From 0a5549a6a9b96218d9d05c378d55d4218595390e Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Wed, 9 Feb 2022 14:04:30 -0800 Subject: [PATCH 0544/1061] video: driver: decouple fence structure from video buffer Decouple fence structure from video buffer. Also add some misc fence flow setup support. Change-Id: Ia4e223a3a288f0dae3238850685f3a73d4b9400a Signed-off-by: Akshata Sahukar --- driver/platform/kalama/src/msm_vidc_kalama.c | 14 ++ driver/vidc/inc/msm_vidc_fence.h | 10 +- driver/vidc/inc/msm_vidc_inst.h | 3 +- driver/vidc/inc/msm_vidc_internal.h | 16 ++- driver/vidc/src/msm_vidc.c | 1 + driver/vidc/src/msm_vidc_driver.c | 27 ++-- driver/vidc/src/msm_vidc_fence.c | 128 ++++++++++++------ driver/vidc/src/venus_hfi.c | 7 +- driver/vidc/src/venus_hfi_response.c | 18 ++- .../uapi/vidc/media/v4l2_vidc_extensions.h | 12 ++ 10 files changed, 173 insertions(+), 63 deletions(-) diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index 72a581c824..dadf0c23bd 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -273,6 +273,20 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { {0}, NULL, msm_vidc_set_u32}, + {SW_FENCE_ENABLE, DEC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_SW_FENCE_ENABLE, + HFI_PROP_FENCE}, + + {FENCE_ID, DEC, CODECS_ALL, + 0, INT_MAX, 1, 0, + V4L2_CID_MPEG_VIDC_SW_FENCE_ID}, + + {FENCE_FD, DEC, CODECS_ALL, + 0, INT_MAX, 1, 0, + V4L2_CID_MPEG_VIDC_SW_FENCE_FD}, + {TS_REORDER, DEC, H264|HEVC, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, diff --git a/driver/vidc/inc/msm_vidc_fence.h b/driver/vidc/inc/msm_vidc_fence.h index 87518cf064..58999899e2 100644 --- a/driver/vidc/inc/msm_vidc_fence.h +++ b/driver/vidc/inc/msm_vidc_fence.h @@ -9,12 +9,14 @@ #include "msm_vidc_inst.h" #include "msm_vidc_buffer.h" -int msm_vidc_fence_create(struct msm_vidc_inst *inst, - struct msm_vidc_buffer *buf); +struct msm_vidc_fence *msm_vidc_fence_create( + struct msm_vidc_inst *inst); +int msm_vidc_create_fence_fd(struct msm_vidc_inst *inst, + struct msm_vidc_fence *fence); int msm_vidc_fence_signal(struct msm_vidc_inst *inst, - struct msm_vidc_buffer *buf); + u32 fence_id); void msm_vidc_fence_destroy(struct msm_vidc_inst *inst, - struct msm_vidc_buffer *buf); + struct msm_vidc_fence *fence); int msm_vidc_fence_init(struct msm_vidc_inst *inst); void msm_vidc_fence_deinit(struct msm_vidc_inst *inst); diff --git a/driver/vidc/inc/msm_vidc_inst.h b/driver/vidc/inc/msm_vidc_inst.h index 32b75df295..dc944d7077 100644 --- a/driver/vidc/inc/msm_vidc_inst.h +++ b/driver/vidc/inc/msm_vidc_inst.h @@ -145,6 +145,7 @@ struct msm_vidc_inst { struct list_head children_list; struct list_head firmware_list; struct list_head pending_pkts; /* list of struct hfi_pending_packet */ + struct list_head fence_list; /* list of struct msm_vidc_fence */ bool once_per_session_set; bool ipsc_properties_set; bool opsc_properties_set; @@ -154,7 +155,7 @@ struct msm_vidc_inst { struct msm_vidc_statistics stats; struct msm_vidc_inst_capability *capabilities; struct completion completions[MAX_SIGNAL]; - struct msm_vidc_fence_context fence; + struct msm_vidc_fence_context fence_context; enum priority_level priority_level; u32 firmware_priority; bool active; diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 1daaa008dc..9b19a3d15b 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -367,6 +367,9 @@ enum msm_vidc_inst_capability_type { MB_CYCLES_FW, MB_CYCLES_FW_VPP, SECURE_MODE, + SW_FENCE_ENABLE, + FENCE_ID, + FENCE_FD, TS_REORDER, SLICE_INTERFACE, HFLIP, @@ -790,11 +793,12 @@ struct msm_vidc_fence_context { }; struct msm_vidc_fence { - struct dma_fence dma_fence; - char name[MAX_NAME_LENGTH]; - spinlock_t lock; - struct sync_file *sync_file; - int fd; + struct list_head list; + struct dma_fence dma_fence; + char name[MAX_NAME_LENGTH]; + spinlock_t lock; + struct sync_file *sync_file; + int fd; }; struct msm_vidc_alloc { @@ -844,7 +848,7 @@ struct msm_vidc_buffer { u32 flags; u64 timestamp; enum msm_vidc_buffer_attributes attr; - struct msm_vidc_fence *fence; + u64 fence_id; }; struct msm_vidc_buffers { diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index 0ff70c3d68..bb530eac53 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -951,6 +951,7 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) INIT_LIST_HEAD(&inst->enc_input_crs); INIT_LIST_HEAD(&inst->dmabuf_tracker); INIT_LIST_HEAD(&inst->pending_pkts); + INIT_LIST_HEAD(&inst->fence_list); for (i = 0; i < MAX_SIGNAL; i++) init_completion(&inst->completions[i]); diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 1a0a60f8c6..5afa3b0179 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -82,6 +82,9 @@ static const struct msm_vidc_cap_name cap_name_arr[] = { {MB_CYCLES_FW, "MB_CYCLES_FW" }, {MB_CYCLES_FW_VPP, "MB_CYCLES_FW_VPP" }, {SECURE_MODE, "SECURE_MODE" }, + {SW_FENCE_ENABLE, "SW_FENCE_ENABLE" }, + {FENCE_ID, "FENCE_ID" }, + {FENCE_FD, "FENCE_FD" }, {TS_REORDER, "TS_REORDER" }, {SLICE_INTERFACE, "SLICE_INTERFACE" }, {HFLIP, "HFLIP" }, @@ -3257,10 +3260,10 @@ int msm_vidc_queue_buffer_single(struct msm_vidc_inst *inst, struct vb2_buffer * { int rc = 0; struct msm_vidc_buffer *buf; + struct msm_vidc_fence *fence; enum msm_vidc_allow allow; - const int fence_enabled = 0; - if (!inst || !vb2) { + if (!inst || !vb2 || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -3269,11 +3272,12 @@ int msm_vidc_queue_buffer_single(struct msm_vidc_inst *inst, struct vb2_buffer * if (!buf) return -EINVAL; - if (fence_enabled && is_decode_session(inst) && - is_output_buffer(buf->type)) { - rc = msm_vidc_fence_create(inst, buf); - if (rc) + if (inst->capabilities->cap[SW_FENCE_ENABLE].value && + is_output_buffer(buf->type)) { + fence = msm_vidc_fence_create(inst); + if (!fence) return rc; + buf->fence_id = fence->dma_fence.seqno; } allow = msm_vidc_allow_qbuf(inst, vb2->type); @@ -3296,7 +3300,7 @@ int msm_vidc_queue_buffer_single(struct msm_vidc_inst *inst, struct vb2_buffer * exit: if (rc) { i_vpr_e(inst, "%s: qbuf failed\n", __func__); - msm_vidc_fence_destroy(inst, buf); + msm_vidc_fence_destroy(inst, fence); } return rc; } @@ -5164,6 +5168,8 @@ void msm_vidc_destroy_buffers(struct msm_vidc_inst *inst) struct msm_memory_dmabuf *dbuf, *dummy_dbuf; struct response_work *work, *dummy_work = NULL; struct msm_vidc_inst_cap_entry *entry, *dummy_entry; + struct msm_vidc_fence *fence, *dummy_fence; + static const enum msm_vidc_buffer_type ext_buf_types[] = { MSM_VIDC_BUF_INPUT, MSM_VIDC_BUF_OUTPUT, @@ -5222,7 +5228,6 @@ void msm_vidc_destroy_buffers(struct msm_vidc_inst *inst) list_for_each_entry_safe(buf, dummy, &buffers->list, list) { print_vidc_buffer(VIDC_ERR, "err ", "destroying ", inst, buf); - msm_vidc_fence_destroy(inst, buf); if (!(buf->attr & MSM_VIDC_ATTR_BUFFER_DONE)) msm_vidc_vb2_buffer_done(inst, buf); msm_vidc_put_driver_buf(inst, buf); @@ -5261,6 +5266,12 @@ void msm_vidc_destroy_buffers(struct msm_vidc_inst *inst) kfree(entry); } + list_for_each_entry_safe(fence, dummy_fence, &inst->fence_list, list) { + i_vpr_e(inst, "%s: destroying fence id: %llu", + __func__, fence->dma_fence.seqno); + msm_vidc_fence_destroy(inst, fence); + } + /* destroy buffers from pool */ msm_memory_pools_deinit(inst); } diff --git a/driver/vidc/src/msm_vidc_fence.c b/driver/vidc/src/msm_vidc_fence.c index b375ba38b8..6be30251e5 100644 --- a/driver/vidc/src/msm_vidc_fence.c +++ b/driver/vidc/src/msm_vidc_fence.c @@ -47,26 +47,49 @@ static const struct dma_fence_ops msm_vidc_dma_fence_ops = { .release = msm_vidc_dma_fence_release, }; -int msm_vidc_fence_create(struct msm_vidc_inst *inst, - struct msm_vidc_buffer *buf) +struct msm_vidc_fence *msm_vidc_fence_create(struct msm_vidc_inst *inst) { - int rc = 0; struct msm_vidc_fence *fence; if (!inst) { d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; + return NULL; } fence = kzalloc(sizeof(*fence), GFP_KERNEL); - if (!fence) - return -ENOMEM; + if (!fence) { + i_vpr_e(inst, "%s: failed to allocate memory for fence\n", + __func__); + return NULL; + } spin_lock_init(&fence->lock); dma_fence_init(&fence->dma_fence, &msm_vidc_dma_fence_ops, - &fence->lock, inst->fence.ctx_num, inst->fence.seq_num++); + &fence->lock, inst->fence_context.ctx_num, + ++inst->fence_context.seq_num); snprintf(fence->name, sizeof(fence->name), "%s: %llu", - inst->fence.name, inst->fence.seq_num); + inst->fence_context.name, inst->fence_context.seq_num); + + /* reset seqno to avoid going beyond INT_MAX */ + if (inst->fence_context.seq_num >= INT_MAX) + inst->fence_context.seq_num = 0; + + INIT_LIST_HEAD(&fence->list); + list_add_tail(&fence->list, &inst->fence_list); + i_vpr_l(inst, "%s: created %s\n", __func__, fence->name); + + return fence; +} + +int msm_vidc_create_fence_fd(struct msm_vidc_inst *inst, + struct msm_vidc_fence *fence) +{ + int rc = 0; + + if (!inst || !fence) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } fence->fd = get_unused_fd_flags(0); if (fence->fd < 0) { @@ -82,54 +105,78 @@ int msm_vidc_fence_create(struct msm_vidc_inst *inst, goto err_sync_file; } fd_install(fence->fd, fence->sync_file->file); - - buf->fence = fence; - i_vpr_h(inst, "%s: created %s\n", __func__, fence->name); - return 0; + i_vpr_l(inst, "%s: created fd %d for fence %s id: %llu\n", __func__, + fence->fd, fence->name, fence->dma_fence.seqno); err_sync_file: put_unused_fd(fence->fd); err_fd: - dma_fence_put(&fence->dma_fence); - buf->fence = NULL; return rc; } -int msm_vidc_fence_signal(struct msm_vidc_inst *inst, - struct msm_vidc_buffer *buf) +int msm_vidc_fence_signal(struct msm_vidc_inst *inst, u32 fence_id) { int rc = 0; + struct msm_vidc_fence *fence, *dummy_fence; + bool found = false; - if (!inst || !buf) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - if (!buf->fence) - return 0; - i_vpr_l(inst, "%s: fence %s\n", __func__, buf->fence->name); - dma_fence_signal(&buf->fence->dma_fence); - dma_fence_put(&buf->fence->dma_fence); - buf->fence = NULL; + list_for_each_entry_safe(fence, dummy_fence, &inst->fence_list, list) { + if (fence->dma_fence.seqno == (u64)fence_id) { + found = true; + break; + } + } + if (!found) { + i_vpr_e(inst, "%s: no fence available to signal with id: %u", + __func__, fence_id); + rc = -EINVAL; + goto exit; + } + i_vpr_l(inst, "%s: fence %s\n", __func__, fence->name); + dma_fence_signal(&fence->dma_fence); + dma_fence_put(&fence->dma_fence); + list_del_init(&fence->list); + +exit: return rc; } void msm_vidc_fence_destroy(struct msm_vidc_inst *inst, - struct msm_vidc_buffer *buf) + struct msm_vidc_fence *fence_to_destroy) { - if (!inst || !buf) { + struct msm_vidc_fence *fence, *dummy_fence; + bool found = false; + + if (!inst || !fence_to_destroy) { d_vpr_e("%s: invalid params\n", __func__); return; } - if (!buf->fence) - return; - i_vpr_e(inst, "%s: fence %s\n", __func__, buf->fence->name); - dma_fence_set_error(&buf->fence->dma_fence, -EINVAL); - dma_fence_signal(&buf->fence->dma_fence); - dma_fence_put(&buf->fence->dma_fence); - buf->fence = NULL; + list_for_each_entry_safe(fence, dummy_fence, &inst->fence_list, list) { + if (fence->dma_fence.seqno == + fence_to_destroy->dma_fence.seqno) { + found = true; + break; + } + } + + if (!found) { + i_vpr_e(inst, "%s: no fence available to destroy with id: %llu", + __func__, fence_to_destroy->dma_fence.seqno); + return; + } + + i_vpr_e(inst, "%s: fence %s\n", __func__, fence->name); + dma_fence_set_error(&fence->dma_fence, -EINVAL); + dma_fence_signal(&fence->dma_fence); + dma_fence_put(&fence->dma_fence); + list_del_init(&fence->list); } int msm_vidc_fence_init(struct msm_vidc_inst *inst) @@ -141,13 +188,13 @@ int msm_vidc_fence_init(struct msm_vidc_inst *inst) return -EINVAL; } - inst->fence.ctx_num = dma_fence_context_alloc(1); - snprintf(inst->fence.name, sizeof(inst->fence.name), + inst->fence_context.ctx_num = dma_fence_context_alloc(1); + snprintf(inst->fence_context.name, sizeof(inst->fence_context.name), "msm_vidc_fence: %s: %llu", inst->debug_str, - inst->fence.ctx_num); - i_vpr_h(inst, "%s: %s\n", __func__, inst->fence.name); + inst->fence_context.ctx_num); + i_vpr_h(inst, "%s: %s\n", __func__, inst->fence_context.name); - return rc; + return rc; } void msm_vidc_fence_deinit(struct msm_vidc_inst *inst) @@ -156,7 +203,8 @@ void msm_vidc_fence_deinit(struct msm_vidc_inst *inst) d_vpr_e("%s: invalid params\n", __func__); return; } - i_vpr_h(inst, "%s: %s\n", __func__, inst->fence.name); - inst->fence.ctx_num = 0; - snprintf(inst->fence.name, sizeof(inst->fence.name), "%s", ""); + i_vpr_h(inst, "%s: %s\n", __func__, inst->fence_context.name); + inst->fence_context.ctx_num = 0; + snprintf(inst->fence_context.name, sizeof(inst->fence_context.name), + "%s", ""); } diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index ed4960d460..f3886da9df 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -3473,7 +3473,7 @@ int venus_hfi_queue_buffer(struct msm_vidc_inst *inst, struct msm_vidc_core *core; struct hfi_buffer hfi_buffer; - if (!inst || !inst->core || !inst->packet) { + if (!inst || !inst->core || !inst->packet || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -3523,6 +3523,11 @@ int venus_hfi_queue_buffer(struct msm_vidc_inst *inst, goto unlock; } + if (inst->capabilities->cap[SW_FENCE_ENABLE].value && + is_output_buffer(buffer->type)) { + /* TODO(AS): create fence property packet to send to fw */ + } + rc = venus_hfi_add_pending_packets(inst); if (rc) goto unlock; diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index b79b2042cd..f54bdbdaad 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -824,9 +824,6 @@ static int handle_output_buffer(struct msm_vidc_inst *inst, return 0; } - /* signal the fence asap */ - msm_vidc_fence_signal(inst, buf); - buf->data_offset = buffer->data_offset; buf->data_size = buffer->data_size; buf->timestamp = buffer->timestamp; @@ -1424,6 +1421,7 @@ static int handle_session_property(struct msm_vidc_inst *inst, int rc = 0; u32 port; u32 *payload_ptr = NULL; + u32 fence_id = 0; if (!inst || !inst->capabilities) { d_vpr_e("%s: Invalid params\n", __func__); @@ -1558,6 +1556,20 @@ static int handle_session_property(struct msm_vidc_inst *inst, "%s: fw pipe mode(%d) not matching the capability value(%d)\n", __func__, payload_ptr[0], inst->capabilities->cap[PIPE].value); break; + case HFI_PROP_FENCE: + if (inst->capabilities->cap[SW_FENCE_ENABLE].value) { + if (payload_ptr) { + fence_id = payload_ptr[0]; + rc = msm_vidc_fence_signal(inst, fence_id); + } else { + i_vpr_e(inst, "%s: fence payload is null\n", __func__); + rc = -EINVAL; + } + } else { + i_vpr_e(inst, "%s: fence is not enabled for this session\n", + __func__); + } + break; default: i_vpr_e(inst, "%s: invalid property %#x\n", __func__, pkt->type); diff --git a/include/uapi/vidc/media/v4l2_vidc_extensions.h b/include/uapi/vidc/media/v4l2_vidc_extensions.h index e8a4e5e6f0..7d64e8a4e1 100644 --- a/include/uapi/vidc/media/v4l2_vidc_extensions.h +++ b/include/uapi/vidc/media/v4l2_vidc_extensions.h @@ -200,6 +200,18 @@ enum v4l2_mpeg_video_av1_tier { /* Control to enable input metadata via request api */ #define V4L2_CID_MPEG_VIDC_INPUT_METADATA_VIA_REQUEST_ENABLE \ (V4L2_CID_MPEG_VIDC_BASE + 0x37) +/* Control to enable software fence feature */ +#define V4L2_CID_MPEG_VIDC_SW_FENCE_ENABLE \ + (V4L2_CID_MPEG_VIDC_BASE + 0x38) +/* Control to set fence id to driver in order get corresponding fence fd */ +#define V4L2_CID_MPEG_VIDC_SW_FENCE_ID \ + (V4L2_CID_MPEG_VIDC_BASE + 0x39) +/* + * Control to get fence fd from driver for the fence id + * set via V4L2_CID_MPEG_VIDC_SW_FENCE_ID + */ +#define V4L2_CID_MPEG_VIDC_SW_FENCE_FD \ + (V4L2_CID_MPEG_VIDC_BASE + 0x3A) /* add new controls above this line */ /* Deprecate below controls once availble in gki and gsi bionic header */ From 7a278600700ee5a2e9957b78b11b5fd73e57a69d Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Fri, 4 Feb 2022 16:08:35 -0800 Subject: [PATCH 0545/1061] video: driver: add request api controls for metadata - Added an extension to enable sending input metadata via request. - Added an extension for client to send input metadata buffer fd via request api. Change-Id: I503ea2cbfb02831d9cfd475e83c94eee72545836 Signed-off-by: Darshana Patil --- driver/platform/waipio/src/msm_vidc_waipio.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index f15ca8d102..a064b343a7 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -1411,6 +1411,23 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {LTR_COUNT, IR_RANDOM, SLICE_MODE}, msm_vidc_adjust_all_intra, NULL}, + {INPUT_METADATA_FD, ENC|DEC, CODECS_ALL, + -1, INT_MAX, 1, -1, + V4L2_CID_MPEG_VIDC_INPUT_METADATA_FD, + 0, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + NULL, NULL}, + + {INPUT_META_VIA_REQUEST, ENC|DEC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_INPUT_METADATA_VIA_REQUEST_ENABLE, + 0, + CAP_FLAG_INPUT_PORT, + {0}, {0}, + NULL, NULL}, + {META_LTR_MARK_USE, ENC, H264|HEVC, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, From 8ab5854042ba1927ad513528a175de64f745e70e Mon Sep 17 00:00:00 2001 From: Dikshita Agarwal Date: Fri, 4 Feb 2022 11:37:27 +0530 Subject: [PATCH 0546/1061] video: driver: add support for MMAP io mode If a device supports streaming, it should support MMAP streaming mode, as it's the one streaming mode that is always available, so applications can rely on this. Partially Fixes: v4l2-compliance: test VIDIOC_REQBUFS/CREATE_BUFS/QUERYBUF. Change-Id: Ibcb29f75f3fed4e767e05c9d203d611d45f02e8b Signed-off-by: Dikshita Agarwal --- driver/vidc/inc/msm_vidc_vb2.h | 13 +++++++----- driver/vidc/src/msm_vidc_driver.c | 2 +- driver/vidc/src/msm_vidc_platform.c | 5 +++-- driver/vidc/src/msm_vidc_vb2.c | 33 ++++++++++++++++++++++++----- 4 files changed, 40 insertions(+), 13 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_vb2.h b/driver/vidc/inc/msm_vidc_vb2.h index 3deea03e10..23b7a62cb2 100644 --- a/driver/vidc/inc/msm_vidc_vb2.h +++ b/driver/vidc/inc/msm_vidc_vb2.h @@ -15,17 +15,20 @@ struct vb2_queue *msm_vidc_get_vb2q(struct msm_vidc_inst *inst, /* vb2_mem_ops */ #if (LINUX_VERSION_CODE < KERNEL_VERSION(5, 15, 0)) -void *msm_vb2_get_userptr(struct device *dev, unsigned long vaddr, - unsigned long size, enum dma_data_direction dma_dir); +void *msm_vb2_alloc(struct device *dev, unsigned long attrs, + unsigned long size, enum dma_data_direction dma_dir, + gfp_t gfp_flags); void *msm_vb2_attach_dmabuf(struct device *dev, struct dma_buf *dbuf, unsigned long size, enum dma_data_direction dma_dir); #else -void *msm_vb2_get_userptr(struct vb2_buffer *vb, struct device *dev, - unsigned long vaddr, unsigned long size); +void *msm_vb2_alloc(struct vb2_buffer *vb, struct device *dev, + unsigned long size); void *msm_vb2_attach_dmabuf(struct vb2_buffer *vb, struct device *dev, struct dma_buf *dbuf, unsigned long size); #endif -void msm_vb2_put_userptr(void *buf_priv); + +void msm_vb2_put(void *buf_priv); +int msm_vb2_mmap(void *buf_priv, struct vm_area_struct *vma); void msm_vb2_detach_dmabuf(void *buf_priv); int msm_vb2_map_dmabuf(void *buf_priv); void msm_vb2_unmap_dmabuf(void *buf_priv); diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 5afa3b0179..d71a99f326 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -3774,7 +3774,7 @@ static int vb2q_init(struct msm_vidc_inst *inst, core = inst->core; q->type = type; - q->io_modes = VB2_DMABUF; + q->io_modes = VB2_MMAP | VB2_DMABUF; q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY; q->ops = core->vb2_ops; q->mem_ops = core->vb2_mem_ops; diff --git a/driver/vidc/src/msm_vidc_platform.c b/driver/vidc/src/msm_vidc_platform.c index 9d78c94a18..d927a7c404 100644 --- a/driver/vidc/src/msm_vidc_platform.c +++ b/driver/vidc/src/msm_vidc_platform.c @@ -129,8 +129,9 @@ static struct vb2_ops msm_vb2_ops = { }; static struct vb2_mem_ops msm_vb2_mem_ops = { - .get_userptr = msm_vb2_get_userptr, - .put_userptr = msm_vb2_put_userptr, + .alloc = msm_vb2_alloc, + .put = msm_vb2_put, + .mmap = msm_vb2_mmap, .attach_dmabuf = msm_vb2_attach_dmabuf, .detach_dmabuf = msm_vb2_detach_dmabuf, .map_dmabuf = msm_vb2_map_dmabuf, diff --git a/driver/vidc/src/msm_vidc_vb2.c b/driver/vidc/src/msm_vidc_vb2.c index 496250f756..32cbe8761c 100644 --- a/driver/vidc/src/msm_vidc_vb2.c +++ b/driver/vidc/src/msm_vidc_vb2.c @@ -39,8 +39,9 @@ struct vb2_queue *msm_vidc_get_vb2q(struct msm_vidc_inst *inst, } #if (LINUX_VERSION_CODE < KERNEL_VERSION(5, 15, 0)) -void *msm_vb2_get_userptr(struct device *dev, unsigned long vaddr, - unsigned long size, enum dma_data_direction dma_dir) +void *msm_vb2_alloc(struct device *dev, unsigned long attrs, + unsigned long size, enum dma_data_direction dma_dir, + gfp_t gfp_flags) { return (void *)0xdeadbeef; } @@ -50,9 +51,10 @@ void *msm_vb2_attach_dmabuf(struct device *dev, struct dma_buf *dbuf, { return (void *)0xdeadbeef; } + #else -void *msm_vb2_get_userptr(struct vb2_buffer *vb, struct device *dev, - unsigned long vaddr, unsigned long size) +void *msm_vb2_alloc(struct vb2_buffer *vb, struct device *dev, + unsigned long size) { return (void *)0xdeadbeef; } @@ -64,10 +66,15 @@ void *msm_vb2_attach_dmabuf(struct vb2_buffer *vb, struct device *dev, } #endif -void msm_vb2_put_userptr(void *buf_priv) +void msm_vb2_put(void *buf_priv) { } +int msm_vb2_mmap(void *buf_priv, struct vm_area_struct *vma) +{ + return 0; +} + void msm_vb2_detach_dmabuf(void *buf_priv) { } @@ -88,6 +95,7 @@ int msm_vidc_queue_setup(struct vb2_queue *q, int rc = 0; struct msm_vidc_inst *inst; int port; + struct v4l2_format *f; if (!q || !num_buffers || !num_planes || !sizes || !q->drv_priv) { @@ -110,6 +118,21 @@ int msm_vidc_queue_setup(struct vb2_queue *q, if (port < 0) return -EINVAL; + if (*num_planes) { + f = &inst->fmts[port]; + if (*num_planes != f->fmt.pix_mp.num_planes) { + i_vpr_i(inst, "%s: requested num_planes %d not supported\n", + __func__, *num_planes, f->fmt.pix_mp.num_planes); + return -EINVAL; + } + if (sizes[0] < inst->fmts[port].fmt.pix_mp.plane_fmt[0].sizeimage) { + i_vpr_e(inst, "%s: requested size %d not acceptable\n", + __func__, sizes[0]); + return -EINVAL; + } + } + + if (port == INPUT_PORT) { *num_planes = 1; if (*num_buffers < inst->buffers.input.min_count + From 43e71fff42089d24d154cb80e5a66b7f1b9c56d7 Mon Sep 17 00:00:00 2001 From: Deepa Guthyappa Madivalara Date: Wed, 16 Feb 2022 15:46:13 -0800 Subject: [PATCH 0547/1061] Revert "video: driver: utilize v4l2_m2m_ioctl_streamon helper function" This reverts commit e5189157f197c601b2e600dfc2b61781dc8c565a. Change-Id: I33e6e45ea6a08370ef8b80cddce9916bf08e613f Signed-off-by: Deepa Guthyappa Madivalara --- driver/vidc/inc/msm_vidc.h | 3 +-- driver/vidc/inc/msm_vidc_vb2.h | 2 +- driver/vidc/src/msm_vidc.c | 12 ++++-------- driver/vidc/src/msm_vidc_v4l2.c | 2 +- 4 files changed, 7 insertions(+), 12 deletions(-) diff --git a/driver/vidc/inc/msm_vidc.h b/driver/vidc/inc/msm_vidc.h index 2542a0982b..0e5c837798 100644 --- a/driver/vidc/inc/msm_vidc.h +++ b/driver/vidc/inc/msm_vidc.h @@ -33,8 +33,7 @@ int msm_vidc_release_buffer(void *instance, int buffer_type, int msm_vidc_qbuf(void *instance, struct media_device *mdev, struct v4l2_buffer *b); int msm_vidc_dqbuf(void *instance, struct v4l2_buffer *b); -int msm_vidc_streamon(void *instance, struct file *filp, void *fh, - enum v4l2_buf_type i); +int msm_vidc_streamon(void *instance, enum v4l2_buf_type i); int msm_vidc_query_ctrl(void *instance, struct v4l2_queryctrl *ctrl); int msm_vidc_query_menu(void *instance, struct v4l2_querymenu *qmenu); int msm_vidc_streamoff(void *instance, enum v4l2_buf_type i); diff --git a/driver/vidc/inc/msm_vidc_vb2.h b/driver/vidc/inc/msm_vidc_vb2.h index 3deea03e10..a1f6aef999 100644 --- a/driver/vidc/inc/msm_vidc_vb2.h +++ b/driver/vidc/inc/msm_vidc_vb2.h @@ -34,7 +34,7 @@ void msm_vb2_unmap_dmabuf(void *buf_priv); int msm_vidc_queue_setup(struct vb2_queue *q, unsigned int *num_buffers, unsigned int *num_planes, unsigned int sizes[], struct device *alloc_devs[]); -int msm_vidc_start_streaming(struct vb2_queue *q, unsigned int i); +int msm_vidc_start_streaming(struct vb2_queue *q, unsigned int count); void msm_vidc_stop_streaming(struct vb2_queue *q); void msm_vidc_buf_queue(struct vb2_buffer *vb2); void msm_vidc_buf_cleanup(struct vb2_buffer *vb); diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index bb530eac53..f58c71a06b 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -5,7 +5,6 @@ #include #include -#include #include "msm_vidc_core.h" #include "msm_vidc_inst.h" #include "msm_vdec.h" @@ -546,8 +545,7 @@ exit: } EXPORT_SYMBOL(msm_vidc_dqbuf); -int msm_vidc_streamon(void *instance, struct file *filp, void *fh, - enum v4l2_buf_type type) +int msm_vidc_streamon(void *instance, enum v4l2_buf_type type) { int rc = 0; struct msm_vidc_inst *inst = instance; @@ -571,12 +569,10 @@ int msm_vidc_streamon(void *instance, struct file *filp, void *fh, rc = -EINVAL; goto exit; } - if (port == INPUT_PORT || port == OUTPUT_PORT) - rc = v4l2_m2m_ioctl_streamon(filp, fh, type); - else - rc = vb2_streamon(inst->bufq[port].vb2q, type); + + rc = vb2_streamon(inst->bufq[port].vb2q, type); if (rc) { - i_vpr_e(inst, "%s: streamon(%d) failed, %d\n", + i_vpr_e(inst, "%s: vb2_streamon(%d) failed, %d\n", __func__, type, rc); msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); goto exit; diff --git a/driver/vidc/src/msm_vidc_v4l2.c b/driver/vidc/src/msm_vidc_v4l2.c index 14688a6b91..c73c2ac2ad 100644 --- a/driver/vidc/src/msm_vidc_v4l2.c +++ b/driver/vidc/src/msm_vidc_v4l2.c @@ -443,7 +443,7 @@ int msm_v4l2_streamon(struct file *filp, void *fh, rc = -EBUSY; goto unlock; } - rc = msm_vidc_streamon((void *)inst, filp, fh, i); + rc = msm_vidc_streamon((void *)inst, i); if (rc) goto unlock; From 93b88b9d69d9c92523998964d0ad2d56d19c89bc Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Mon, 14 Feb 2022 14:09:58 +0530 Subject: [PATCH 0548/1061] video: driver: re-organize enums and add comments Re-organized enums(msm_vidc_inst_capability_type) in below order. [1] Root(no parents) enums, [2] Intermittent(having both parents & children) enums, [3] Leaf(no children) enums. Also added proper comments in header file. Change-Id: I2bda51b54b6fa6e190098f16dd60090004cfbecf Signed-off-by: Govindaraj Rajagopal --- driver/vidc/inc/msm_vidc_inst.h | 4 +-- driver/vidc/inc/msm_vidc_internal.h | 40 +++++++++++++++++++++-------- driver/vidc/src/msm_vidc_driver.c | 22 ++++++++-------- 3 files changed, 42 insertions(+), 24 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_inst.h b/driver/vidc/inc/msm_vidc_inst.h index dc944d7077..d48c991793 100644 --- a/driver/vidc/inc/msm_vidc_inst.h +++ b/driver/vidc/inc/msm_vidc_inst.h @@ -142,8 +142,8 @@ struct msm_vidc_inst { struct list_head enc_input_crs; struct list_head dmabuf_tracker; /* list of struct msm_memory_dmabuf */ struct list_head caps_list; - struct list_head children_list; - struct list_head firmware_list; + struct list_head children_list; /* struct msm_vidc_inst_cap_entry */ + struct list_head firmware_list; /* struct msm_vidc_inst_cap_entry */ struct list_head pending_pkts; /* list of struct hfi_pending_packet */ struct list_head fence_list; /* list of struct msm_vidc_fence */ bool once_per_session_set; diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 9b19a3d15b..0698dc467f 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -340,6 +340,18 @@ enum msm_vidc_core_capability_type { CORE_CAP_MAX, }; +/** + * msm_vidc_prepare_dependency_list() api will prepare caps_list by looping over + * enums(msm_vidc_inst_capability_type) from 0 to INST_CAP_MAX and arranges the + * node in such a way that parents willbe at the front and dependent children + * in the back. + * + * caps_list preparation may become CPU intensive task, so to save CPU cycles, + * organize enum in proper order(root caps at the beginning and dependent caps + * at back), so that during caps_list preparation num CPU cycles spent will reduce. + * + * Note: It will work, if enum kept at different places, but not efficient. + */ enum msm_vidc_inst_capability_type { INST_CAP_NONE = 0, FRAME_WIDTH, @@ -462,34 +474,40 @@ enum msm_vidc_inst_capability_type { META_DEC_QP_METADATA, COMPLEXITY, META_MAX_NUM_REORDER_FRAMES, + /* place all root(no parent) enums before this line */ + PROFILE, + META_ROI_INFO, + ENH_LAYER_COUNT, + BIT_RATE, + LOWLATENCY_MODE, + GOP_SIZE, + B_FRAME, + ALL_INTRA, + MIN_QUALITY, + CONTENT_ADAPTIVE_CODING, + BLUR_TYPES, + /* place all intermittent(having both parent and child) enums before this line */ + MIN_FRAME_QP, MAX_FRAME_QP, I_FRAME_QP, P_FRAME_QP, B_FRAME_QP, - META_ROI_INFO, TIME_DELTA_BASED_RC, CONSTANT_QUALITY, - ENH_LAYER_COUNT, - BIT_RATE, VBV_DELAY, PEAK_BITRATE, - LOWLATENCY_MODE, ENTROPY_MODE, TRANSFORM_8X8, - GOP_SIZE, - B_FRAME, - BLUR_RESOLUTION, STAGE, - ALL_INTRA, - MIN_QUALITY, LTR_COUNT, IR_RANDOM, BITRATE_BOOST, SLICE_MODE, - CONTENT_ADAPTIVE_CODING, - BLUR_TYPES, + BLUR_RESOLUTION, + /* place all leaf(no child) enums before this line */ + INST_CAP_MAX, }; diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 5afa3b0179..e84c7c99f2 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -178,33 +178,33 @@ static const struct msm_vidc_cap_name cap_name_arr[] = { {COMPLEXITY, "COMPLEXITY" }, {META_MAX_NUM_REORDER_FRAMES, "META_MAX_NUM_REORDER_FRAMES"}, {PROFILE, "PROFILE" }, + {META_ROI_INFO, "META_ROI_INFO" }, + {ENH_LAYER_COUNT, "ENH_LAYER_COUNT" }, + {BIT_RATE, "BIT_RATE" }, + {LOWLATENCY_MODE, "LOWLATENCY_MODE" }, + {GOP_SIZE, "GOP_SIZE" }, + {B_FRAME, "B_FRAME" }, + {ALL_INTRA, "ALL_INTRA" }, + {MIN_QUALITY, "MIN_QUALITY" }, + {CONTENT_ADAPTIVE_CODING, "CONTENT_ADAPTIVE_CODING" }, + {BLUR_TYPES, "BLUR_TYPES" }, {MIN_FRAME_QP, "MIN_FRAME_QP" }, {MAX_FRAME_QP, "MAX_FRAME_QP" }, {I_FRAME_QP, "I_FRAME_QP" }, {P_FRAME_QP, "P_FRAME_QP" }, {B_FRAME_QP, "B_FRAME_QP" }, - {META_ROI_INFO, "META_ROI_INFO" }, {TIME_DELTA_BASED_RC, "TIME_DELTA_BASED_RC" }, {CONSTANT_QUALITY, "CONSTANT_QUALITY" }, - {ENH_LAYER_COUNT, "ENH_LAYER_COUNT" }, - {BIT_RATE, "BIT_RATE" }, {VBV_DELAY, "VBV_DELAY" }, {PEAK_BITRATE, "PEAK_BITRATE" }, - {LOWLATENCY_MODE, "LOWLATENCY_MODE" }, {ENTROPY_MODE, "ENTROPY_MODE" }, {TRANSFORM_8X8, "TRANSFORM_8X8" }, - {GOP_SIZE, "GOP_SIZE" }, - {B_FRAME, "B_FRAME" }, - {BLUR_RESOLUTION, "BLUR_RESOLUTION" }, {STAGE, "STAGE" }, - {ALL_INTRA, "ALL_INTRA" }, - {MIN_QUALITY, "MIN_QUALITY" }, {LTR_COUNT, "LTR_COUNT" }, {IR_RANDOM, "IR_RANDOM" }, {BITRATE_BOOST, "BITRATE_BOOST" }, {SLICE_MODE, "SLICE_MODE" }, - {CONTENT_ADAPTIVE_CODING, "CONTENT_ADAPTIVE_CODING" }, - {BLUR_TYPES, "BLUR_TYPES" }, + {BLUR_RESOLUTION, "BLUR_RESOLUTION" }, {INST_CAP_MAX, "INST_CAP_MAX" }, }; From 22cc24de7f873b3047cbbdd3ede394c8a0a9f9bd Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Mon, 7 Feb 2022 11:45:56 -0800 Subject: [PATCH 0549/1061] video: driver: Enhance fence support - Introduce V4L2_EVENT_VIDC_METADATA to post fence fd returned in ETB metadata done buffer. - V4L2_CID_MPEG_VIDC_SW_FENCE_FD g_ctrl support for client to get fence fd for requested fence id. - Addition of fence delivery and subscribtion support. - Fence property packetization to send to firmware via FTB buffer. Change-Id: Ifb289849e352af2c4729aa95040bd83753979970 Signed-off-by: Akshata Sahukar --- driver/platform/kalama/src/msm_vidc_kalama.c | 19 ++- driver/vidc/inc/msm_vidc_driver.h | 4 +- driver/vidc/inc/msm_vidc_internal.h | 3 +- driver/vidc/src/msm_vdec.c | 113 ++++++++++++++++-- driver/vidc/src/msm_vidc_driver.c | 113 +++++++++++++++++- driver/vidc/src/msm_vidc_fence.c | 1 + driver/vidc/src/venus_hfi.c | 14 ++- driver/vidc/src/venus_hfi_response.c | 4 +- .../uapi/vidc/media/v4l2_vidc_extensions.h | 31 ++++- 9 files changed, 273 insertions(+), 29 deletions(-) diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index 0f6feada87..a6413e5691 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -277,18 +277,29 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { {0}, NULL, msm_vidc_set_u32}, - {SW_FENCE_ENABLE, DEC, CODECS_ALL, + /* + * Client will enable V4L2_CID_MPEG_VIDC_INPUT_METADATA_OUTBUF_FENCE + * to get fence_id in input metadata buffer done. + */ + {INPUT_META_OUTBUF_FENCE, DEC, CODECS_ALL, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_SW_FENCE_ENABLE, + V4L2_CID_MPEG_VIDC_INPUT_METADATA_OUTBUF_FENCE, HFI_PROP_FENCE}, + /* + * Client to do set_ctrl with FENCE_ID to set fence_id + * and then client will do get_ctrl with FENCE_FD to get + * fence_fd corresponding to client set fence_id. + */ {FENCE_ID, DEC, CODECS_ALL, 0, INT_MAX, 1, 0, - V4L2_CID_MPEG_VIDC_SW_FENCE_ID}, + V4L2_CID_MPEG_VIDC_SW_FENCE_ID, + 0, + CAP_FLAG_DYNAMIC_ALLOWED | CAP_FLAG_OUTPUT_PORT}, {FENCE_FD, DEC, CODECS_ALL, - 0, INT_MAX, 1, 0, + INVALID_FD, INT_MAX, 1, INVALID_FD, V4L2_CID_MPEG_VIDC_SW_FENCE_FD}, {TS_REORDER, DEC, H264|HEVC, diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 3f80c8b066..05e9e028d3 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -298,8 +298,8 @@ int msm_vidc_alloc_and_queue_session_internal_buffers(struct msm_vidc_inst *inst enum msm_vidc_buffer_type buffer_type); int msm_vidc_release_internal_buffers(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type buffer_type); -int msm_vidc_vb2_buffer_done(struct msm_vidc_inst *inst, - struct msm_vidc_buffer *buf); +int msm_vidc_buffer_done(struct msm_vidc_inst *inst, + struct msm_vidc_buffer *buf); int msm_vidc_remove_session(struct msm_vidc_inst *inst); int msm_vidc_add_session(struct msm_vidc_inst *inst); int msm_vidc_session_open(struct msm_vidc_inst *inst); diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 0698dc467f..645ae0414a 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -61,6 +61,7 @@ #define MAX_SUPPORTED_MIN_QUALITY 70 #define MIN_CHROMA_QP_OFFSET -12 #define MAX_CHROMA_QP_OFFSET 0 +#define INVALID_FD -1 #define DCVS_WINDOW 16 #define ENC_FPS_WINDOW 3 @@ -379,7 +380,7 @@ enum msm_vidc_inst_capability_type { MB_CYCLES_FW, MB_CYCLES_FW_VPP, SECURE_MODE, - SW_FENCE_ENABLE, + INPUT_META_OUTBUF_FENCE, FENCE_ID, FENCE_FD, TS_REORDER, diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 141b61d45b..ffa866c2c5 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -77,6 +77,7 @@ static const u32 msm_vdec_output_subscribe_for_properties[] = { HFI_PROP_PICTURE_TYPE, HFI_PROP_DPB_LIST, HFI_PROP_CABAC_SESSION, + HFI_PROP_FENCE, }; static const u32 msm_vdec_internal_buffer_type[] = { @@ -1230,6 +1231,8 @@ static int msm_vdec_subscribe_property(struct msm_vidc_inst *inst, HFI_PAYLOAD_U32_ARRAY, &payload[0], (count + 1) * sizeof(u32)); + if (rc) + return rc; return rc; } @@ -1241,7 +1244,15 @@ static int msm_vdec_subscribe_metadata(struct msm_vidc_inst *inst, u32 payload[32] = {0}; u32 i, count = 0; struct msm_vidc_inst_capability *capability; - static const u32 metadata_list[] = { + const u32 metadata_input_list[] = { + INPUT_META_OUTBUF_FENCE, + /* + * when fence enabled, client needs output buffer_tag + * in input metadata buffer done. + */ + META_OUTPUT_BUF_TAG, + }; + const u32 metadata_output_list[] = { META_BITSTREAM_RESOLUTION, META_CROP_OFFSETS, META_DPB_MISR, @@ -1253,6 +1264,9 @@ static int msm_vdec_subscribe_metadata(struct msm_vidc_inst *inst, META_SEI_MASTERING_DISP, META_SEI_CLL, META_HDR10PLUS, + /* + * client needs input buffer tag in output metadata buffer done. + */ META_BUF_TAG, META_DPB_TAG_LIST, META_SUBFRAME_OUTPUT, @@ -1268,14 +1282,28 @@ static int msm_vdec_subscribe_metadata(struct msm_vidc_inst *inst, capability = inst->capabilities; payload[0] = HFI_MODE_METADATA; - for (i = 0; i < ARRAY_SIZE(metadata_list); i++) { - if (capability->cap[metadata_list[i]].value && - msm_vidc_allow_metadata(inst, metadata_list[i])) { - payload[count + 1] = - capability->cap[metadata_list[i]].hfi_id; - count++; + if (port == INPUT_PORT) { + for (i = 0; i < ARRAY_SIZE(metadata_input_list); i++) { + if (capability->cap[metadata_input_list[i]].value && + msm_vidc_allow_metadata(inst, metadata_input_list[i])) { + payload[count + 1] = + capability->cap[metadata_input_list[i]].hfi_id; + count++; + } } - }; + } else if (port == OUTPUT_PORT) { + for (i = 0; i < ARRAY_SIZE(metadata_output_list); i++) { + if (capability->cap[metadata_output_list[i]].value && + msm_vidc_allow_metadata(inst, metadata_output_list[i])) { + payload[count + 1] = + capability->cap[metadata_output_list[i]].hfi_id; + count++; + } + } + } else { + i_vpr_e(inst, "%s: invalid port: %d\n", __func__, port); + return -EINVAL; + } rc = venus_hfi_session_command(inst, HFI_CMD_SUBSCRIBE_MODE, @@ -1283,6 +1311,8 @@ static int msm_vdec_subscribe_metadata(struct msm_vidc_inst *inst, HFI_PAYLOAD_U32_ARRAY, &payload[0], (count + 1) * sizeof(u32)); + if (rc) + return rc; return rc; } @@ -1294,10 +1324,10 @@ static int msm_vdec_set_delivery_mode_metadata(struct msm_vidc_inst *inst, u32 payload[32] = {0}; u32 i, count = 0; struct msm_vidc_inst_capability *capability; - static const u32 metadata_input_list[] = { + const u32 metadata_input_list[] = { META_BUF_TAG, }; - static const u32 metadata_output_list[] = { + const u32 metadata_output_list[] = { META_OUTPUT_BUF_TAG, }; @@ -1338,6 +1368,62 @@ static int msm_vdec_set_delivery_mode_metadata(struct msm_vidc_inst *inst, HFI_PAYLOAD_U32_ARRAY, &payload[0], (count + 1) * sizeof(u32)); + if (rc) + return rc; + + return rc; +} + +static int msm_vdec_set_delivery_mode_property(struct msm_vidc_inst *inst, + enum msm_vidc_port_type port) +{ + int rc = 0; + u32 payload[32] = {0}; + u32 i, count = 0; + struct msm_vidc_inst_capability *capability; + const u32 property_output_list[] = { + INPUT_META_OUTBUF_FENCE, + }; + const u32 property_input_list[] = {}; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + i_vpr_h(inst, "%s()\n", __func__); + + capability = inst->capabilities; + payload[0] = HFI_MODE_PROPERTY; + + if (port == INPUT_PORT) { + for (i = 0; i < ARRAY_SIZE(property_input_list); i++) { + if (capability->cap[property_input_list[i]].value) { + payload[count + 1] = + capability->cap[property_input_list[i]].hfi_id; + count++; + } + } + } else if (port == OUTPUT_PORT) { + for (i = 0; i < ARRAY_SIZE(property_output_list); i++) { + if (capability->cap[property_output_list[i]].value) { + payload[count + 1] = + capability->cap[property_output_list[i]].hfi_id; + count++; + } + } + } else { + i_vpr_e(inst, "%s: invalid port: %d\n", __func__, port); + return -EINVAL; + } + + rc = venus_hfi_session_command(inst, + HFI_CMD_DELIVERY_MODE, + port, + HFI_PAYLOAD_U32_ARRAY, + &payload[0], + (count + 1) * sizeof(u32)); + if (rc) + return rc; return rc; } @@ -1354,6 +1440,8 @@ static int msm_vdec_session_resume(struct msm_vidc_inst *inst, HFI_PAYLOAD_NONE, NULL, 0); + if (rc) + return rc; return rc; } @@ -1984,6 +2072,10 @@ int msm_vdec_streamon_output(struct msm_vidc_inst *inst) if (rc) goto error; + rc = msm_vdec_set_delivery_mode_property(inst, OUTPUT_PORT); + if (rc) + return rc; + rc = msm_vdec_set_delivery_mode_metadata(inst, OUTPUT_PORT); if (rc) return rc; @@ -2887,6 +2979,7 @@ int msm_vdec_subscribe_event(struct msm_vidc_inst *inst, switch (sub->type) { case V4L2_EVENT_EOS: + case V4L2_EVENT_VIDC_METADATA: rc = v4l2_event_subscribe(&inst->event_handler, sub, MAX_EVENTS, NULL); break; case V4L2_EVENT_SOURCE_CHANGE: diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index e84c7c99f2..6b2a51c4b0 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -82,7 +82,7 @@ static const struct msm_vidc_cap_name cap_name_arr[] = { {MB_CYCLES_FW, "MB_CYCLES_FW" }, {MB_CYCLES_FW_VPP, "MB_CYCLES_FW_VPP" }, {SECURE_MODE, "SECURE_MODE" }, - {SW_FENCE_ENABLE, "SW_FENCE_ENABLE" }, + {INPUT_META_OUTBUF_FENCE, "INPUT_META_OUTBUF_FENCE" }, {FENCE_ID, "FENCE_ID" }, {FENCE_FD, "FENCE_FD" }, {TS_REORDER, "TS_REORDER" }, @@ -1412,6 +1412,14 @@ bool msm_vidc_allow_property(struct msm_vidc_inst *inst, u32 hfi_id) is_allowed = false; } break; + case HFI_PROP_FENCE: + if (!inst->capabilities->cap[INPUT_META_OUTBUF_FENCE].value) { + i_vpr_h(inst, + "%s: cap: %24s not enabled, hence not allowed to subscribe\n", + __func__, cap_name(INPUT_META_OUTBUF_FENCE)); + is_allowed = false; + } + break; default: is_allowed = true; break; @@ -2016,6 +2024,46 @@ int msm_vidc_state_change_last_flag(struct msm_vidc_inst *inst) return rc; } +int msm_vidc_get_fence_fd(struct msm_vidc_inst *inst, int *fence_fd) +{ + int rc = 0; + struct msm_vidc_fence *fence, *dummy_fence; + bool found = false; + + *fence_fd = INVALID_FD; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + list_for_each_entry_safe(fence, dummy_fence, &inst->fence_list, list) { + if (fence->dma_fence.seqno == + (u64)inst->capabilities->cap[FENCE_ID].value) { + found = true; + break; + } + } + + if (!found) { + i_vpr_e(inst, "%s: could not find matching fence for fence id: %d\n", + __func__, inst->capabilities->cap[FENCE_ID].value); + rc = -EINVAL; + goto exit; + } + + if (fence->fd == INVALID_FD) { + rc = msm_vidc_create_fence_fd(inst, fence); + if (rc) + goto exit; + } + + *fence_fd = fence->fd; + +exit: + return rc; +} + int msm_vidc_get_control(struct msm_vidc_inst *inst, struct v4l2_ctrl *ctrl) { int rc = 0; @@ -2041,6 +2089,12 @@ int msm_vidc_get_control(struct msm_vidc_inst *inst, struct v4l2_ctrl *ctrl) i_vpr_h(inst, "%s: film grain present: %d\n", __func__, ctrl->val); break; + case V4L2_CID_MPEG_VIDC_SW_FENCE_FD: + rc = msm_vidc_get_fence_fd(inst, &ctrl->val); + if (!rc) + i_vpr_l(inst, "%s: fence fd: %d\n", + __func__, ctrl->val); + break; default: i_vpr_e(inst, "invalid ctrl %s id %d\n", ctrl->name, ctrl->id); @@ -3272,7 +3326,7 @@ int msm_vidc_queue_buffer_single(struct msm_vidc_inst *inst, struct vb2_buffer * if (!buf) return -EINVAL; - if (inst->capabilities->cap[SW_FENCE_ENABLE].value && + if (inst->capabilities->cap[INPUT_META_OUTBUF_FENCE].value && is_output_buffer(buf->type)) { fence = msm_vidc_fence_create(inst); if (!fence) @@ -3646,7 +3700,7 @@ int msm_vidc_release_internal_buffers(struct msm_vidc_inst *inst, return 0; } -int msm_vidc_vb2_buffer_done(struct msm_vidc_inst *inst, +static int msm_vidc_vb2_buffer_done(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buf) { int type, port, state; @@ -3714,6 +3768,53 @@ int msm_vidc_vb2_buffer_done(struct msm_vidc_inst *inst, return 0; } +static int msm_vidc_v4l2_buffer_event(struct msm_vidc_inst *inst, + struct msm_vidc_buffer *buf) +{ + int rc = 0; + struct v4l2_event event = {0}; + struct v4l2_event_vidc_metadata *event_data = NULL; + + if (!inst || !buf) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (buf->type != MSM_VIDC_BUF_INPUT_META) { + i_vpr_e(inst, "%s: unsupported buffer type %s\n", + __func__, buf_name(buf->type)); + return -EINVAL; + } + + event.type = V4L2_EVENT_VIDC_METADATA; + event_data = (struct v4l2_event_vidc_metadata *)event.u.data; + event_data->type = INPUT_META_PLANE; + event_data->fd = buf->fd; + + v4l2_event_queue_fh(&inst->event_handler, &event); + + return rc; +} + +int msm_vidc_buffer_done(struct msm_vidc_inst *inst, + struct msm_vidc_buffer *buf) +{ + if (!inst || !inst->capabilities || !buf) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (buf->type == MSM_VIDC_BUF_INPUT_META && + inst->capabilities->cap[INPUT_META_VIA_REQUEST].value) { + if (inst->capabilities->cap[INPUT_META_OUTBUF_FENCE].value) + return msm_vidc_v4l2_buffer_event(inst, buf); + } else { + return msm_vidc_vb2_buffer_done(inst, buf); + } + + return 0; +} + int msm_vidc_event_queue_init(struct msm_vidc_inst *inst) { int rc = 0; @@ -5086,7 +5187,7 @@ int msm_vidc_flush_buffers(struct msm_vidc_inst *inst, buf->attr & MSM_VIDC_ATTR_DEFERRED) { print_vidc_buffer(VIDC_HIGH, "high", "flushing buffer", inst, buf); if (!(buf->attr & MSM_VIDC_ATTR_BUFFER_DONE)) - msm_vidc_vb2_buffer_done(inst, buf); + msm_vidc_buffer_done(inst, buf); msm_vidc_put_driver_buf(inst, buf); } } @@ -5229,7 +5330,7 @@ void msm_vidc_destroy_buffers(struct msm_vidc_inst *inst) list_for_each_entry_safe(buf, dummy, &buffers->list, list) { print_vidc_buffer(VIDC_ERR, "err ", "destroying ", inst, buf); if (!(buf->attr & MSM_VIDC_ATTR_BUFFER_DONE)) - msm_vidc_vb2_buffer_done(inst, buf); + msm_vidc_buffer_done(inst, buf); msm_vidc_put_driver_buf(inst, buf); } msm_vidc_unmap_buffers(inst, ext_buf_types[i]); @@ -5267,7 +5368,7 @@ void msm_vidc_destroy_buffers(struct msm_vidc_inst *inst) } list_for_each_entry_safe(fence, dummy_fence, &inst->fence_list, list) { - i_vpr_e(inst, "%s: destroying fence id: %llu", + i_vpr_e(inst, "%s: destroying fence id: %llu\n", __func__, fence->dma_fence.seqno); msm_vidc_fence_destroy(inst, fence); } diff --git a/driver/vidc/src/msm_vidc_fence.c b/driver/vidc/src/msm_vidc_fence.c index 6be30251e5..546578167c 100644 --- a/driver/vidc/src/msm_vidc_fence.c +++ b/driver/vidc/src/msm_vidc_fence.c @@ -63,6 +63,7 @@ struct msm_vidc_fence *msm_vidc_fence_create(struct msm_vidc_inst *inst) return NULL; } + fence->fd = INVALID_FD; spin_lock_init(&fence->lock); dma_fence_init(&fence->dma_fence, &msm_vidc_dma_fence_ops, &fence->lock, inst->fence_context.ctx_num, diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index f3886da9df..ebd82c96db 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -3523,9 +3523,19 @@ int venus_hfi_queue_buffer(struct msm_vidc_inst *inst, goto unlock; } - if (inst->capabilities->cap[SW_FENCE_ENABLE].value && + if (inst->capabilities->cap[INPUT_META_OUTBUF_FENCE].value && is_output_buffer(buffer->type)) { - /* TODO(AS): create fence property packet to send to fw */ + rc = hfi_create_packet(inst->packet, + inst->packet_size, + HFI_PROP_FENCE, + 0, + HFI_PAYLOAD_U64, + HFI_PORT_RAW, + core->packet_id++, + &buffer->fence_id, + sizeof(u64)); + if (rc) + goto unlock; } rc = venus_hfi_add_pending_packets(inst); diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index f54bdbdaad..bc70fb53dd 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -1115,7 +1115,7 @@ static int handle_dequeue_buffers(struct msm_vidc_inst *inst) "vb2 done already", inst, buf); } else { buf->attr |= MSM_VIDC_ATTR_BUFFER_DONE; - msm_vidc_vb2_buffer_done(inst, buf); + msm_vidc_buffer_done(inst, buf); } msm_vidc_put_driver_buf(inst, buf); } @@ -1557,7 +1557,7 @@ static int handle_session_property(struct msm_vidc_inst *inst, __func__, payload_ptr[0], inst->capabilities->cap[PIPE].value); break; case HFI_PROP_FENCE: - if (inst->capabilities->cap[SW_FENCE_ENABLE].value) { + if (inst->capabilities->cap[INPUT_META_OUTBUF_FENCE].value) { if (payload_ptr) { fence_id = payload_ptr[0]; rc = msm_vidc_fence_signal(inst, fence_id); diff --git a/include/uapi/vidc/media/v4l2_vidc_extensions.h b/include/uapi/vidc/media/v4l2_vidc_extensions.h index 7d64e8a4e1..555a72f88b 100644 --- a/include/uapi/vidc/media/v4l2_vidc_extensions.h +++ b/include/uapi/vidc/media/v4l2_vidc_extensions.h @@ -200,8 +200,8 @@ enum v4l2_mpeg_video_av1_tier { /* Control to enable input metadata via request api */ #define V4L2_CID_MPEG_VIDC_INPUT_METADATA_VIA_REQUEST_ENABLE \ (V4L2_CID_MPEG_VIDC_BASE + 0x37) -/* Control to enable software fence feature */ -#define V4L2_CID_MPEG_VIDC_SW_FENCE_ENABLE \ +/* Enables Output buffer fence id via input metadata */ +#define V4L2_CID_MPEG_VIDC_INPUT_METADATA_OUTBUF_FENCE \ (V4L2_CID_MPEG_VIDC_BASE + 0x38) /* Control to set fence id to driver in order get corresponding fence fd */ #define V4L2_CID_MPEG_VIDC_SW_FENCE_ID \ @@ -345,6 +345,7 @@ enum v4l2_mpeg_vidc_metadata { METADATA_ROI_INFO = 0x03000173, METADATA_DPB_TAG_LIST = 0x03000179, METADATA_MAX_NUM_REORDER_FRAMES = 0x03000127, + METADATA_FENCE = 0x0300018B, }; enum meta_interlace_info { META_INTERLACE_INFO_NONE = 0x00000000, @@ -358,4 +359,30 @@ enum meta_interlace_info { /* vendor controls end */ +/* vendor events start */ + +/* + * Vendor event structure looks like below (reference videodev2.h) + * struct v4l2_event { + * __u32 type; + * union { + * struct v4l2_event_src_change src_change; + * ... + * / ********** vendor event structure ******** / + * __u8 data[64]; + * } u; + * __u32 pending; + * ... + * } + */ +#define V4L2_EVENT_VIDC_METADATA \ + (V4L2_EVENT_PRIVATE_START + 0x1) + +struct v4l2_event_vidc_metadata { + __u32 type; + __s32 fd; + __u8 reserved[56]; +}; +/* vendor events end */ + #endif From 48f1d09c2fddc6d89a62c7cc350cf2788f521510 Mon Sep 17 00:00:00 2001 From: Chinmay Sawarkar Date: Mon, 31 Jan 2022 18:03:47 -0800 Subject: [PATCH 0550/1061] video: driver: AV1 power changes AV1 power changes. Change-Id: If05c52cb6f30152b773389cc4127bf2514765170 Signed-off-by: Chinmay Sawarkar --- driver/platform/kalama/src/msm_vidc_kalama.c | 7 +++--- .../variant/iris3/src/msm_vidc_power_iris3.c | 22 ++++++++++++++++--- 2 files changed, 23 insertions(+), 6 deletions(-) diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index 0f6feada87..f3a0de34a6 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -259,13 +259,14 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { {MB_CYCLES_VSP, ENC, CODECS_ALL, 25, 25, 1, 25}, {MB_CYCLES_VSP, DEC, CODECS_ALL, 25, 25, 1, 25}, - {MB_CYCLES_VSP, DEC, VP9, 60, 60, 1, 60}, + {MB_CYCLES_VSP, DEC, VP9|AV1, 60, 60, 1, 60}, {MB_CYCLES_VPP, ENC, CODECS_ALL, 675, 675, 1, 675}, {MB_CYCLES_VPP, DEC, CODECS_ALL, 200, 200, 1, 200}, {MB_CYCLES_LP, ENC, CODECS_ALL, 320, 320, 1, 320}, {MB_CYCLES_LP, DEC, CODECS_ALL, 200, 200, 1, 200}, - {MB_CYCLES_FW, ENC|DEC, CODECS_ALL, 326389, 326389, 1, 326389}, - {MB_CYCLES_FW_VPP, ENC|DEC, CODECS_ALL, 44156, 44156, 1, 44156}, + {MB_CYCLES_FW, ENC|DEC, CODECS_ALL, 489583, 489583, 1, 489583}, + {MB_CYCLES_FW_VPP, ENC, CODECS_ALL, 48405, 48405, 1, 48405}, + {MB_CYCLES_FW_VPP, DEC, CODECS_ALL, 66234, 66234, 1, 66234}, {SECURE_MODE, ENC|DEC, H264|HEVC|VP9|AV1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, diff --git a/driver/variant/iris3/src/msm_vidc_power_iris3.c b/driver/variant/iris3/src/msm_vidc_power_iris3.c index 0653e5fe09..a64d67c344 100644 --- a/driver/variant/iris3/src/msm_vidc_power_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_power_iris3.c @@ -137,9 +137,16 @@ u64 msm_vidc_calc_freq_iris3(struct msm_vidc_inst *inst, u32 data_size) inst->capabilities->cap[PIPE].value; /* 21 / 20 is minimum overhead factor */ vpp_cycles += max(vpp_cycles / 20, fw_vpp_cycles); - /* 1.059 is multi-pipe overhead */ - if (inst->capabilities->cap[PIPE].value > 1) - vpp_cycles += div_u64(vpp_cycles * 59, 1000); + /* 1.059 is multi-pipe overhead + * 1.410 AV1 RECOMMENDED TILE 1080P_V2XH1, UHD_V2X2, 8KUHD_V8X2 + * av1d_commer_tile_enable=0 + */ + if (inst->capabilities->cap[PIPE].value > 1) { + if (inst->codec == MSM_VIDC_AV1) + vpp_cycles += div_u64(vpp_cycles * 410, 1000); + else + vpp_cycles += div_u64(vpp_cycles * 59, 1000); + } /* VSP */ base_cycles = inst->has_bframe ? @@ -290,6 +297,15 @@ static u64 __calculate_decoder(struct vidc_bus_vote_data *d) collocated_bytes_per_lcu = lcu_size == 16 ? 16 : lcu_size == 32 ? 64 : 256; + if (d->codec == MSM_VIDC_AV1) { + collocated_bytes_per_lcu = 4 * 512; /* lcu_size = 128 */ + if (lcu_size == 32) { + collocated_bytes_per_lcu = 4 * 512 / (128 * 128 / 32 / 32); + } else if (lcu_size == 64) { + collocated_bytes_per_lcu = 4 * 512 / (128 * 128 / 64 / 64); + } + } + dpb_factor = FP(1, 50, 100); dpb_write_factor = FP(1, 5, 100); From 0fde3a9acaa2ab95bf1292c3797ea568d6737b11 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Fri, 4 Feb 2022 21:16:37 +0530 Subject: [PATCH 0551/1061] video: driver: fix static and dynamic property setting sequence Added changes to reuse caps_list for setting static properties and also modified dynamic property setting sequence. Removed redundant implementations. Change-Id: I5829d3c98b0159916d7794f43e445a6191050182 Signed-off-by: Govindaraj Rajagopal --- driver/vidc/inc/msm_vidc_control.h | 3 +- driver/vidc/inc/msm_vidc_driver.h | 2 - driver/vidc/inc/msm_vidc_internal.h | 5 - driver/vidc/src/msm_venc.c | 6 +- driver/vidc/src/msm_vidc_control.c | 691 +++++++++++++++------------- driver/vidc/src/msm_vidc_driver.c | 38 +- 6 files changed, 384 insertions(+), 361 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_control.h b/driver/vidc/inc/msm_vidc_control.h index 4c062f2078..f9232028be 100644 --- a/driver/vidc/inc/msm_vidc_control.h +++ b/driver/vidc/inc/msm_vidc_control.h @@ -43,7 +43,7 @@ int msm_vidc_adjust_cac(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_bitrate_boost(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_min_quality(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_lowlatency_mode(void *instance, struct v4l2_ctrl *ctrl); -int msm_vidc_adjust_v4l2_properties(struct msm_vidc_inst *inst); +int msm_vidc_adjust_set_v4l2_properties(struct msm_vidc_inst *inst); int msm_vidc_prepare_dependency_list(struct msm_vidc_inst *inst); int msm_vidc_adjust_session_priority(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_roi_info(void *instance, struct v4l2_ctrl *ctrl); @@ -109,7 +109,6 @@ int msm_vidc_set_s32(void *instance, enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_q16(void *instance, enum msm_vidc_inst_capability_type cap_id); -int msm_vidc_set_v4l2_properties(struct msm_vidc_inst *inst); int msm_vidc_v4l2_menu_to_hfi(struct msm_vidc_inst *inst, enum msm_vidc_inst_capability_type cap_id, u32 *value); int msm_vidc_v4l2_to_hfi_enum(struct msm_vidc_inst *inst, diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 05e9e028d3..698e6e08c1 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -441,8 +441,6 @@ int msm_vidc_ts_reorder_remove_timestamp(struct msm_vidc_inst *inst, u64 timesta int msm_vidc_ts_reorder_get_first_timestamp(struct msm_vidc_inst *inst, u64 *timestamp); int msm_vidc_ts_reorder_flush(struct msm_vidc_inst *inst); const char *buf_name(enum msm_vidc_buffer_type type); -void msm_vidc_free_capabililty_list(struct msm_vidc_inst *inst, - enum msm_vidc_ctrl_list_type list_type); bool res_is_greater_than(u32 width, u32 height, u32 ref_width, u32 ref_height); bool res_is_greater_than_or_equal_to(u32 width, u32 height, diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 645ae0414a..3094898cae 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -291,11 +291,6 @@ enum msm_vidc_matrix_coefficients { MSM_VIDC_MATRIX_COEFF_BT2100 = 14, }; -enum msm_vidc_ctrl_list_type { - CHILD_LIST = BIT(0), - FW_LIST = BIT(1), -}; - enum msm_vidc_core_capability_type { CORE_CAP_NONE = 0, ENC_CODECS, diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index ef0519faac..aaf50ea590 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -1002,15 +1002,11 @@ int msm_venc_streamon_output(struct msm_vidc_inst *inst) return -EINVAL; } - rc = msm_vidc_adjust_v4l2_properties(inst); - if (rc) - goto error; - rc = msm_venc_set_output_properties(inst); if (rc) goto error; - rc = msm_vidc_set_v4l2_properties(inst); + rc = msm_vidc_adjust_set_v4l2_properties(inst); if (rc) goto error; diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index cdc66ae768..25f3ddeb29 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -214,6 +214,81 @@ static const char * const * msm_vidc_get_qmenu_type( } } +static inline bool has_parents(struct msm_vidc_inst_cap *cap) +{ + return !!cap->parents[0]; +} + +static inline bool has_childrens(struct msm_vidc_inst_cap *cap) +{ + return !!cap->children[0]; +} + +static inline bool is_root(struct msm_vidc_inst_cap *cap) +{ + return !has_parents(cap); +} + +static inline bool is_valid_cap_id(enum msm_vidc_inst_capability_type cap_id) +{ + return cap_id > INST_CAP_NONE && cap_id < INST_CAP_MAX; +} + +static inline bool is_valid_cap(struct msm_vidc_inst_cap *cap) +{ + return is_valid_cap_id(cap->cap_id); +} + +static inline bool is_all_parents_visited( + struct msm_vidc_inst_cap *cap, bool lookup[INST_CAP_MAX]) { + bool found = true; + int i; + + for (i = 0; i < MAX_CAP_PARENTS; i++) { + if (cap->parents[i] == INST_CAP_NONE) + continue; + + if (!lookup[cap->parents[i]]) { + found = false; + break; + } + } + return found; +} + +static int add_node_list(struct list_head *list, enum msm_vidc_inst_capability_type cap_id) +{ + struct msm_vidc_inst_cap_entry *entry; + + entry = kzalloc(sizeof(struct msm_vidc_inst_cap_entry), GFP_KERNEL); + if (!entry) { + d_vpr_e("%s: msm_vidc_inst_cap_entry alloc failed\n", __func__); + return -EINVAL; + } + + INIT_LIST_HEAD(&entry->list); + entry->cap_id = cap_id; + list_add_tail(&entry->list, list); + + return 0; +} + +static int add_node( + struct list_head *list, struct msm_vidc_inst_cap *rcap, bool lookup[INST_CAP_MAX]) +{ + int rc = 0; + + if (lookup[rcap->cap_id]) + return 0; + + rc = add_node_list(list, rcap->cap_id); + if (rc) + return rc; + + lookup[rcap->cap_id] = true; + return 0; +} + static int msm_vidc_packetize_control(struct msm_vidc_inst *inst, enum msm_vidc_inst_capability_type cap_id, u32 payload_type, void *hfi_val, u32 payload_size, const char *func) @@ -274,34 +349,25 @@ static enum msm_vidc_inst_capability_type msm_vidc_get_cap_id( return cap_id; } -static int msm_vidc_add_capid_to_list(struct msm_vidc_inst *inst, - enum msm_vidc_inst_capability_type cap_id, - enum msm_vidc_ctrl_list_type type) +static int msm_vidc_add_capid_to_fw_list(struct msm_vidc_inst *inst, + enum msm_vidc_inst_capability_type cap_id) { - struct msm_vidc_inst_cap_entry *entry = NULL, *curr_node = NULL; + struct msm_vidc_inst_cap_entry *entry = NULL; + int rc = 0; - /* skip adding if cap_id already present in list */ - if (type & FW_LIST) { - list_for_each_entry(curr_node, &inst->firmware_list, list) { - if (curr_node->cap_id == cap_id) { - i_vpr_l(inst, - "%s: cap[%d] %s already present in FW_LIST\n", - __func__, cap_id, cap_name(cap_id)); - return 0; - } + /* skip adding if cap_id already present in firmware list */ + list_for_each_entry(entry, &inst->firmware_list, list) { + if (entry->cap_id == cap_id) { + i_vpr_l(inst, + "%s: cap[%d] %s already present in fw list\n", + __func__, cap_id, cap_name(cap_id)); + return 0; } } - entry = kzalloc(sizeof(*entry), GFP_ATOMIC); - if (!entry) { - i_vpr_e(inst, "%s: alloc failed\n", __func__); - return -ENOMEM; - } - entry->cap_id = cap_id; - if (type & CHILD_LIST) - list_add_tail(&entry->list, &inst->children_list); - if (type & FW_LIST) - list_add_tail(&entry->list, &inst->firmware_list); + rc = add_node_list(&inst->firmware_list, cap_id); + if (rc) + return rc; return 0; } @@ -309,19 +375,23 @@ static int msm_vidc_add_capid_to_list(struct msm_vidc_inst *inst, static int msm_vidc_add_children(struct msm_vidc_inst *inst, enum msm_vidc_inst_capability_type cap_id) { - int rc = 0; - int i = 0; - struct msm_vidc_inst_capability *capability = inst->capabilities; + struct msm_vidc_inst_cap *cap; + int i, rc = 0; - while (i < MAX_CAP_CHILDREN && - capability->cap[cap_id].children[i]) { - rc = msm_vidc_add_capid_to_list(inst, - capability->cap[cap_id].children[i], - CHILD_LIST); + cap = &inst->capabilities->cap[cap_id]; + + for (i = 0; i < MAX_CAP_CHILDREN; i++) { + if (!cap->children[i]) + break; + + if (!is_valid_cap_id(cap->children[i])) + continue; + + rc = add_node_list(&inst->children_list, cap->children[i]); if (rc) return rc; - i++; } + return rc; } @@ -426,107 +496,208 @@ exit: return 0; } -static int msm_vidc_adjust_property(struct msm_vidc_inst *inst, - enum msm_vidc_inst_capability_type cap_id) +static int msm_vidc_adjust_cap(struct msm_vidc_inst *inst, + enum msm_vidc_inst_capability_type cap_id, + struct v4l2_ctrl *ctrl, const char *func) { + struct msm_vidc_inst_cap *cap; int rc = 0; - struct msm_vidc_inst_capability *capability; - capability = inst->capabilities; - - /* - * skip for uninitialized cap properties. - * Eg: Skip Tramform 8x8 cap that is uninitialized for HEVC codec - */ - if (!capability->cap[cap_id].cap_id) + /* validate cap_id */ + if (!is_valid_cap_id(cap_id)) return 0; - if (capability->cap[cap_id].adjust) { - rc = capability->cap[cap_id].adjust(inst, NULL); - if (rc) - goto exit; + /* validate cap */ + cap = &inst->capabilities->cap[cap_id]; + if (!is_valid_cap(cap)) + return 0; + + /* check if adjust supported */ + if (!cap->adjust) { + if (ctrl) + msm_vidc_update_cap_value(inst, cap_id, ctrl->val, func); + return 0; } - /* add children cap_id's to chidren list */ - rc = msm_vidc_add_children(inst, cap_id); - if (rc) - goto exit; + /* call adjust */ + rc = cap->adjust(inst, ctrl); + if (rc) { + i_vpr_e(inst, "%s: adjust cap failed for %s\n", func, cap_name(cap_id)); + return rc; + } - /* add cap_id to firmware list */ - rc = msm_vidc_add_capid_to_list(inst, cap_id, FW_LIST); - if (rc) - goto exit; + return rc; +} - return 0; +static int msm_vidc_set_cap(struct msm_vidc_inst *inst, + enum msm_vidc_inst_capability_type cap_id, + const char *func) +{ + struct msm_vidc_inst_cap *cap; + int rc = 0; + + /* validate cap_id */ + if (!is_valid_cap_id(cap_id)) + return 0; + + /* validate cap */ + cap = &inst->capabilities->cap[cap_id]; + if (!is_valid_cap(cap)) + return 0; + + /* check if set supported */ + if (!cap->set) + return 0; + + /* call set */ + rc = cap->set(inst, cap_id); + if (rc) { + i_vpr_e(inst, "%s: set cap failed for %s\n", func, cap_name(cap_id)); + return rc; + } -exit: return rc; } static int msm_vidc_adjust_dynamic_property(struct msm_vidc_inst *inst, enum msm_vidc_inst_capability_type cap_id, struct v4l2_ctrl *ctrl) { - int rc = 0; + struct msm_vidc_inst_cap_entry *entry = NULL, *temp = NULL; struct msm_vidc_inst_capability *capability; s32 prev_value; + int rc = 0; + if (!inst || !inst->capabilities || !ctrl) { + d_vpr_e("%s: invalid param\n", __func__); + return -EINVAL; + } capability = inst->capabilities; - /* - * ctrl is NULL for children adjustment calls - * When a dynamic control having children is adjusted, check if dynamic - * adjustment is allowed for its children. - */ + + /* sanitize cap_id */ + if (!is_valid_cap_id(cap_id)) { + i_vpr_e(inst, "%s: invalid cap_id %u\n", __func__, cap_id); + return -EINVAL; + } + if (!(capability->cap[cap_id].flags & CAP_FLAG_DYNAMIC_ALLOWED)) { i_vpr_h(inst, "%s: dynamic setting of cap[%d] %s is not allowed\n", __func__, cap_id, cap_name(cap_id)); - return 0; + return -EBUSY; } + i_vpr_h(inst, "%s: cap[%d] %s\n", __func__, cap_id, cap_name(cap_id)); - /* - * if ctrl is NULL, it is children of some parent, and hence, - * must have an adjust function defined - */ - if (!ctrl && !capability->cap[cap_id].adjust) { - i_vpr_e(inst, - "%s: child cap[%d] %s must have ajdust function\n", - __func__, capability->cap[cap_id].cap_id, - cap_name(capability->cap[cap_id].cap_id)); - return -EINVAL; - } prev_value = capability->cap[cap_id].value; - - if (capability->cap[cap_id].adjust) { - rc = capability->cap[cap_id].adjust(inst, ctrl); - if (rc) - goto exit; - } else if (ctrl) { - msm_vidc_update_cap_value(inst, cap_id, ctrl->val, __func__); - } - - /* add children if cap value modified */ - if (capability->cap[cap_id].value != prev_value) { - rc = msm_vidc_add_children(inst, cap_id); - if (rc) - goto exit; - } + rc = msm_vidc_adjust_cap(inst, cap_id, ctrl, __func__); + if (rc) + return rc; if (capability->cap[cap_id].value == prev_value && cap_id == GOP_SIZE) { /* * Ignore setting same GOP size value to firmware to avoid * unnecessary generation of IDR frame. */ - goto exit; + return 0; } /* add cap_id to firmware list always */ - rc = msm_vidc_add_capid_to_list(inst, cap_id, FW_LIST); + rc = msm_vidc_add_capid_to_fw_list(inst, cap_id); if (rc) - goto exit; + goto error; + + /* add children only if cap value modified */ + if (capability->cap[cap_id].value == prev_value) + return 0; + + rc = msm_vidc_add_children(inst, cap_id); + if (rc) + goto error; + + list_for_each_entry_safe(entry, temp, &inst->children_list, list) { + if (!is_valid_cap_id(entry->cap_id)) { + rc = -EINVAL; + goto error; + } + + if (!capability->cap[entry->cap_id].adjust) { + i_vpr_e(inst, "%s: child cap must have ajdust function %s\n", + __func__, cap_name(entry->cap_id)); + rc = -EINVAL; + goto error; + } + + prev_value = capability->cap[entry->cap_id].value; + rc = msm_vidc_adjust_cap(inst, entry->cap_id, NULL, __func__); + if (rc) + goto error; + + /* add children if cap value modified */ + if (capability->cap[entry->cap_id].value != prev_value) { + /* add cap_id to firmware list always */ + rc = msm_vidc_add_capid_to_fw_list(inst, entry->cap_id); + if (rc) + goto error; + + rc = msm_vidc_add_children(inst, entry->cap_id); + if (rc) + goto error; + } + + list_del_init(&entry->list); + kfree(entry); + } + + /* expecting children_list to be empty */ + if (!list_empty(&inst->children_list)) { + i_vpr_e(inst, "%s: child_list is not empty\n", __func__); + rc = -EINVAL; + goto error; + } return 0; +error: + list_for_each_entry_safe(entry, temp, &inst->children_list, list) { + i_vpr_e(inst, "%s: child list: %s\n", __func__, cap_name(entry->cap_id)); + list_del_init(&entry->list); + kfree(entry); + } + list_for_each_entry_safe(entry, temp, &inst->firmware_list, list) { + i_vpr_e(inst, "%s: fw list: %s\n", __func__, cap_name(entry->cap_id)); + list_del_init(&entry->list); + kfree(entry); + } + + return rc; +} + +static int msm_vidc_set_dynamic_property(struct msm_vidc_inst *inst) +{ + struct msm_vidc_inst_cap_entry *entry = NULL, *temp = NULL; + int rc = 0; + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + i_vpr_h(inst, "%s()\n", __func__); + + list_for_each_entry_safe(entry, temp, &inst->firmware_list, list) { + rc = msm_vidc_set_cap(inst, entry->cap_id, __func__); + if (rc) + goto error; + + list_del_init(&entry->list); + kfree(entry); + } + + return 0; +error: + list_for_each_entry_safe(entry, temp, &inst->firmware_list, list) { + i_vpr_e(inst, "%s: fw list: %s\n", __func__, cap_name(entry->cap_id)); + list_del_init(&entry->list); + kfree(entry); + } -exit: return rc; } @@ -818,12 +989,86 @@ int msm_v4l2_op_g_volatile_ctrl(struct v4l2_ctrl *ctrl) return rc; } +static int msm_vidc_update_static_property(struct msm_vidc_inst *inst, + enum msm_vidc_inst_capability_type cap_id, struct v4l2_ctrl *ctrl) +{ + int rc = 0; + + if (!inst || !ctrl) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + /* update value to db */ + msm_vidc_update_cap_value(inst, cap_id, ctrl->val, __func__); + + if (ctrl->id == V4L2_CID_MPEG_VIDC_SECURE) { + if (ctrl->val) { + rc = msm_vidc_allow_secure_session(inst); + if (rc) + return rc; + } + } + + if (ctrl->id == V4L2_CID_ROTATE) { + struct v4l2_format *output_fmt; + + output_fmt = &inst->fmts[OUTPUT_PORT]; + rc = msm_venc_s_fmt_output(inst, output_fmt); + if (rc) + return rc; + } + + if (ctrl->id == V4L2_CID_MPEG_VIDC_MIN_BITSTREAM_SIZE_OVERWRITE) { + rc = msm_vidc_update_bitstream_buffer_size(inst); + if (rc) + return rc; + } + if (ctrl->id == V4L2_CID_MPEG_VIDC_PRIORITY) { + rc = msm_vidc_adjust_session_priority(inst, ctrl); + if (rc) + return rc; + + /** + * This is the last static s_ctrl from client(commit point). So update + * input & output counts to reflect final buffer counts based on dcvs + * & decoder_batching enable/disable. So client is expected to query + * for final counts after setting priority control. + */ + if (is_decode_session(inst)) + inst->decode_batch.enable = msm_vidc_allow_decode_batch(inst); + + msm_vidc_allow_dcvs(inst); + } + if (is_meta_ctrl(ctrl->id)) { + if (cap_id == META_DPB_TAG_LIST) { + /* + * To subscribe HFI_PROP_DPB_TAG_LIST + * data in FBD, HFI_PROP_BUFFER_TAG data + * must be delivered via FTB. Hence, update + * META_OUTPUT_BUF_TAG when META_DPB_TAG_LIST + * is updated. + */ + msm_vidc_update_cap_value(inst, META_OUTPUT_BUF_TAG, + ctrl->val, __func__); + } + + rc = msm_vidc_update_meta_port_settings(inst); + if (rc) + return rc; + } + rc = msm_vidc_update_buffer_count_if_needed(inst, ctrl); + if (rc) + return rc; + + return rc; +} + int msm_v4l2_op_s_ctrl(struct v4l2_ctrl *ctrl) { int rc = 0; struct msm_vidc_inst *inst; enum msm_vidc_inst_capability_type cap_id; - struct msm_vidc_inst_cap_entry *curr_node = NULL, *tmp_node = NULL; struct msm_vidc_inst_capability *capability; if (!ctrl) { @@ -841,14 +1086,14 @@ int msm_v4l2_op_s_ctrl(struct v4l2_ctrl *ctrl) capability = inst->capabilities; - i_vpr_h(inst, "%s: state %d, name %s, id 0x%x value %d\n", - __func__, inst->state, ctrl->name, ctrl->id, ctrl->val); + i_vpr_h(inst, "%s: state %s, name %s, id 0x%x value %d\n", + __func__, state_name(inst->state), ctrl->name, ctrl->id, ctrl->val); if (!msm_vidc_allow_s_ctrl(inst, ctrl->id)) return -EINVAL; cap_id = msm_vidc_get_cap_id(inst, ctrl->id); - if (cap_id == INST_CAP_NONE) { + if (!is_valid_cap_id(cap_id)) { i_vpr_e(inst, "%s: could not find cap_id for ctrl %s\n", __func__, ctrl->name); return -EINVAL; @@ -865,109 +1110,24 @@ int msm_v4l2_op_s_ctrl(struct v4l2_ctrl *ctrl) return rc; } + /* mark client set flag */ capability->cap[cap_id].flags |= CAP_FLAG_CLIENT_SET; - /* Static setting */ if (!inst->bufq[OUTPUT_PORT].vb2q->streaming) { - msm_vidc_update_cap_value(inst, cap_id, ctrl->val, __func__); - - if (ctrl->id == V4L2_CID_MPEG_VIDC_SECURE) { - if (ctrl->val) { - rc = msm_vidc_allow_secure_session(inst); - if (rc) - return rc; - } - } - - if (ctrl->id == V4L2_CID_ROTATE) { - struct v4l2_format *output_fmt; - - output_fmt = &inst->fmts[OUTPUT_PORT]; - rc = msm_venc_s_fmt_output(inst, output_fmt); - if (rc) - return rc; - } - - if (ctrl->id == V4L2_CID_MPEG_VIDC_MIN_BITSTREAM_SIZE_OVERWRITE) { - rc = msm_vidc_update_bitstream_buffer_size(inst); - if (rc) - return rc; - } - if (ctrl->id == V4L2_CID_MPEG_VIDC_PRIORITY) { - rc = msm_vidc_adjust_session_priority(inst, ctrl); - if (rc) - return rc; - - /** - * This is the last static s_ctrl from client(commit point). So update - * input & output counts to reflect final buffer counts based on dcvs - * & decoder_batching enable/disable. So client is expected to query - * for final counts after setting priority control. - */ - if (is_decode_session(inst)) - inst->decode_batch.enable = msm_vidc_allow_decode_batch(inst); - - msm_vidc_allow_dcvs(inst); - } - if (is_meta_ctrl(ctrl->id)) { - if (cap_id == META_DPB_TAG_LIST) { - /* - * To subscribe HFI_PROP_DPB_TAG_LIST - * data in FBD, HFI_PROP_BUFFER_TAG data - * must be delivered via FTB. Hence, update - * META_OUTPUT_BUF_TAG when META_DPB_TAG_LIST - * is updated. - */ - msm_vidc_update_cap_value(inst, META_OUTPUT_BUF_TAG, - ctrl->val, __func__); - } - - rc = msm_vidc_update_meta_port_settings(inst); - if (rc) - return rc; - } - rc = msm_vidc_update_buffer_count_if_needed(inst, ctrl); + /* static case */ + rc = msm_vidc_update_static_property(inst, cap_id, ctrl); + if (rc) + return rc; + } else { + /* dynamic case */ + rc = msm_vidc_adjust_dynamic_property(inst, cap_id, ctrl); if (rc) return rc; - return 0; - } - - /* check if dynamic adjustment is allowed */ - if (inst->bufq[OUTPUT_PORT].vb2q->streaming && - !(capability->cap[cap_id].flags & CAP_FLAG_DYNAMIC_ALLOWED)) { - i_vpr_e(inst, - "%s: dynamic setting of cap[%d] %s is not allowed\n", - __func__, cap_id, cap_name(cap_id)); - return -EBUSY; - } - - rc = msm_vidc_adjust_dynamic_property(inst, cap_id, ctrl); - if (rc) - goto exit; - - /* adjust all children if any */ - list_for_each_entry_safe(curr_node, tmp_node, - &inst->children_list, list) { - rc = msm_vidc_adjust_dynamic_property( - inst, curr_node->cap_id, NULL); + rc = msm_vidc_set_dynamic_property(inst); if (rc) - goto exit; - list_del(&curr_node->list); - kfree(curr_node); + return rc; } - /* Dynamic set control ASAP */ - rc = msm_vidc_set_v4l2_properties(inst); - if (rc) { - i_vpr_e(inst, "%s: setting %s failed\n", - __func__, ctrl->name); - goto exit; - } - -exit: - if (rc) - msm_vidc_free_capabililty_list(inst, CHILD_LIST | FW_LIST); - return rc; } @@ -2480,65 +2640,6 @@ int msm_vidc_adjust_roi_info(void *instance, struct v4l2_ctrl *ctrl) return 0; } -static inline bool has_parents(struct msm_vidc_inst_cap *cap) -{ - return !!cap->parents[0]; -} - -static inline bool has_childrens(struct msm_vidc_inst_cap *cap) -{ - return !!cap->children[0]; -} - -static inline bool is_root(struct msm_vidc_inst_cap *cap) -{ - return !has_parents(cap); -} - -static inline bool is_valid_cap(struct msm_vidc_inst_cap *cap) -{ - return cap->cap_id != INST_CAP_NONE; -} - -static inline bool is_all_parents_visited( - struct msm_vidc_inst_cap *cap, bool lookup[INST_CAP_MAX]) { - bool found = true; - int i; - - for (i = 0; i < MAX_CAP_PARENTS; i++) { - if (cap->parents[i] == INST_CAP_NONE) - continue; - - if (!lookup[cap->parents[i]]) { - found = false; - break; - } - } - return found; -} - -static int add_node( - struct list_head *list, struct msm_vidc_inst_cap *rcap, bool lookup[INST_CAP_MAX]) -{ - struct msm_vidc_inst_cap_entry *entry; - - if (lookup[rcap->cap_id]) - return 0; - - entry = kzalloc(sizeof(struct msm_vidc_inst_cap_entry), GFP_KERNEL); - if (!entry) { - d_vpr_e("%s: msm_vidc_inst_cap_entry alloc failed\n", __func__); - return -EINVAL; - } - - INIT_LIST_HEAD(&entry->list); - entry->cap_id = rcap->cap_id; - lookup[rcap->cap_id] = true; - - list_add_tail(&entry->list, list); - return 0; -} - int msm_vidc_prepare_dependency_list(struct msm_vidc_inst *inst) { struct list_head root_list, opt_list; @@ -2599,6 +2700,10 @@ int msm_vidc_prepare_dependency_list(struct msm_vidc_inst *inst) for (i = 0; i < MAX_CAP_CHILDREN; i++) { if (!rcap->children[i]) break; + + if (!is_valid_cap_id(rcap->children[i])) + continue; + cap = &capability->cap[rcap->children[i]]; if (!is_valid_cap(cap)) continue; @@ -2693,57 +2798,36 @@ error: /* * Loop over instance capabilities from caps_list - * and call adjust function, where - * - adjust current capability value - * - update tail of instance children list with capability children - * - update instance firmware list with current capability id - * Now, loop over child list and call its adjust function + * and call adjust and set function */ -int msm_vidc_adjust_v4l2_properties(struct msm_vidc_inst *inst) +int msm_vidc_adjust_set_v4l2_properties(struct msm_vidc_inst *inst) { + struct msm_vidc_inst_cap_entry *entry = NULL, *temp = NULL; int rc = 0; - struct msm_vidc_inst_cap_entry *curr_node = NULL, *tmp_node = NULL; - struct msm_vidc_inst_capability *capability; if (!inst || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - capability = inst->capabilities; - i_vpr_h(inst, "%s()\n", __func__); - list_for_each_entry_safe(curr_node, tmp_node, &inst->caps_list, list) { + + /* adjust all possible caps from caps_list */ + list_for_each_entry_safe(entry, temp, &inst->caps_list, list) { i_vpr_l(inst, "%s: cap: id %3u, name %s\n", __func__, - curr_node->cap_id, cap_name(curr_node->cap_id)); - rc = msm_vidc_adjust_property(inst, curr_node->cap_id); + entry->cap_id, cap_name(entry->cap_id)); + + rc = msm_vidc_adjust_cap(inst, entry->cap_id, NULL, __func__); if (rc) - goto exit; + return rc; } - /* - * children of all root controls are already - * added to inst->children list at this point - */ - list_for_each_entry_safe(curr_node, tmp_node, - &inst->children_list, list) { - /* - * call adjust for each child. Each child adjust - * will also update child list at the tail with - * its own children list. - * Also, if current control id value is updated, - * its entry should be added to fw list. - */ - rc = msm_vidc_adjust_property(inst, curr_node->cap_id); + /* set all caps from caps_list */ + list_for_each_entry_safe(entry, temp, &inst->caps_list, list) { + rc = msm_vidc_set_cap(inst, entry->cap_id, __func__); if (rc) - goto exit; - list_del(&curr_node->list); - kfree(curr_node); + return rc; } -exit: - if (rc) - msm_vidc_free_capabililty_list(inst, CHILD_LIST | FW_LIST); - return rc; } @@ -3847,41 +3931,6 @@ int msm_vidc_set_s32(void *instance, return rc; } -int msm_vidc_set_v4l2_properties(struct msm_vidc_inst *inst) -{ - int rc = 0; - struct msm_vidc_inst_capability *capability; - struct msm_vidc_inst_cap_entry *curr_node = NULL, *tmp_node = NULL; - - if (!inst || !inst->capabilities) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - i_vpr_h(inst, "%s()\n", __func__); - capability = inst->capabilities; - - list_for_each_entry_safe(curr_node, tmp_node, - &inst->firmware_list, list) { - - /* cap_id's like PIX_FMT etc may not have set functions */ - if (!capability->cap[curr_node->cap_id].set) - continue; - - rc = capability->cap[curr_node->cap_id].set(inst, - curr_node->cap_id); - if (rc) - goto exit; - - list_del(&curr_node->list); - kfree(curr_node); - } - -exit: - msm_vidc_free_capabililty_list(inst, FW_LIST); - - return rc; -} - int msm_vidc_v4l2_menu_to_hfi(struct msm_vidc_inst *inst, enum msm_vidc_inst_capability_type cap_id, u32 *value) { diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 6b2a51c4b0..9ebcf0177c 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -3080,31 +3080,6 @@ static void msm_vidc_free_input_cr_list(struct msm_vidc_inst *inst) INIT_LIST_HEAD(&inst->enc_input_crs); } -void msm_vidc_free_capabililty_list(struct msm_vidc_inst *inst, - enum msm_vidc_ctrl_list_type list_type) -{ - struct msm_vidc_inst_cap_entry *temp = NULL, *next = NULL; - - if (list_type & CHILD_LIST) { - list_for_each_entry_safe(temp, next, &inst->children_list, list) { - list_del(&temp->list); - kfree(temp); - } - INIT_LIST_HEAD(&inst->children_list); - } - - temp = NULL; - next = NULL; - - if (list_type & FW_LIST) { - list_for_each_entry_safe(temp, next, &inst->firmware_list, list) { - list_del(&temp->list); - kfree(temp); - } - INIT_LIST_HEAD(&inst->firmware_list); - } -} - void msm_vidc_update_stats(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buf, enum msm_vidc_debugfs_event etype) { @@ -5362,6 +5337,18 @@ void msm_vidc_destroy_buffers(struct msm_vidc_inst *inst) kfree(work); } + list_for_each_entry_safe(entry, dummy_entry, &inst->firmware_list, list) { + i_vpr_e(inst, "%s: fw list: %s\n", __func__, cap_name(entry->cap_id)); + list_del(&entry->list); + kfree(entry); + } + + list_for_each_entry_safe(entry, dummy_entry, &inst->children_list, list) { + i_vpr_e(inst, "%s: child list: %s\n", __func__, cap_name(entry->cap_id)); + list_del(&entry->list); + kfree(entry); + } + list_for_each_entry_safe(entry, dummy_entry, &inst->caps_list, list) { list_del(&entry->list); kfree(entry); @@ -5392,7 +5379,6 @@ static void msm_vidc_close_helper(struct kref *kref) else if (is_encode_session(inst)) msm_venc_inst_deinit(inst); msm_vidc_free_input_cr_list(inst); - msm_vidc_free_capabililty_list(inst, CHILD_LIST | FW_LIST); if (inst->response_workq) destroy_workqueue(inst->response_workq); msm_vidc_remove_dangling_session(inst); From 8b8d3ec47aa239e886ee97fe55b20c49031de1b6 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Fri, 18 Feb 2022 19:52:42 +0530 Subject: [PATCH 0552/1061] video: driver: use static const at possible places Use static const at all possible places to improve the performance. Change-Id: Ib9ac9eb7a15735949ae2a8ab727355e0626bc8ef Signed-off-by: Govindaraj Rajagopal --- driver/platform/diwali/src/msm_vidc_diwali.c | 2 +- driver/platform/kalama/src/msm_vidc_kalama.c | 2 +- driver/platform/waipio/src/msm_vidc_waipio.c | 2 +- driver/vidc/src/msm_vdec.c | 12 ++++++------ driver/vidc/src/msm_vidc_memory.c | 2 +- driver/vidc/src/venus_hfi_response.c | 18 +++++++++--------- 6 files changed, 19 insertions(+), 19 deletions(-) diff --git a/driver/platform/diwali/src/msm_vidc_diwali.c b/driver/platform/diwali/src/msm_vidc_diwali.c index 723f436f8d..7c6c89fe08 100644 --- a/driver/platform/diwali/src/msm_vidc_diwali.c +++ b/driver/platform/diwali/src/msm_vidc_diwali.c @@ -4883,7 +4883,7 @@ static struct msm_vidc_efuse_data efuse_data_diwali[] = { EFUSE_ENTRY(0x221C8118, 4, 0x80, 0x6, SKU_VERSION), }; -static struct msm_vidc_platform_data diwali_data = { +static const struct msm_vidc_platform_data diwali_data = { .core_data = core_data_diwali_v0, .core_data_size = ARRAY_SIZE(core_data_diwali_v0), .instance_data = instance_data_diwali_v0, diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index cee65ada86..33199d5608 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -1828,7 +1828,7 @@ static u32 bus_bw_nrt[] = { 11000000, }; -static struct msm_vidc_platform_data kalama_data = { +static const struct msm_vidc_platform_data kalama_data = { .core_data = core_data_kalama, .core_data_size = ARRAY_SIZE(core_data_kalama), .instance_data = instance_data_kalama, diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index a064b343a7..776f537418 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -1694,7 +1694,7 @@ static u32 bus_bw_nrt[] = { 11000000, }; -static struct msm_vidc_platform_data waipio_data = { +static const struct msm_vidc_platform_data waipio_data = { .core_data = core_data_waipio, .core_data_size = ARRAY_SIZE(core_data_waipio), .instance_data = instance_data_waipio, diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index ffa866c2c5..14bb49aeb3 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -1244,7 +1244,7 @@ static int msm_vdec_subscribe_metadata(struct msm_vidc_inst *inst, u32 payload[32] = {0}; u32 i, count = 0; struct msm_vidc_inst_capability *capability; - const u32 metadata_input_list[] = { + static const u32 metadata_input_list[] = { INPUT_META_OUTBUF_FENCE, /* * when fence enabled, client needs output buffer_tag @@ -1252,7 +1252,7 @@ static int msm_vdec_subscribe_metadata(struct msm_vidc_inst *inst, */ META_OUTPUT_BUF_TAG, }; - const u32 metadata_output_list[] = { + static const u32 metadata_output_list[] = { META_BITSTREAM_RESOLUTION, META_CROP_OFFSETS, META_DPB_MISR, @@ -1324,10 +1324,10 @@ static int msm_vdec_set_delivery_mode_metadata(struct msm_vidc_inst *inst, u32 payload[32] = {0}; u32 i, count = 0; struct msm_vidc_inst_capability *capability; - const u32 metadata_input_list[] = { + static const u32 metadata_input_list[] = { META_BUF_TAG, }; - const u32 metadata_output_list[] = { + static const u32 metadata_output_list[] = { META_OUTPUT_BUF_TAG, }; @@ -1381,10 +1381,10 @@ static int msm_vdec_set_delivery_mode_property(struct msm_vidc_inst *inst, u32 payload[32] = {0}; u32 i, count = 0; struct msm_vidc_inst_capability *capability; - const u32 property_output_list[] = { + static const u32 property_output_list[] = { INPUT_META_OUTBUF_FENCE, }; - const u32 property_input_list[] = {}; + static const u32 property_input_list[] = {}; if (!inst || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); diff --git a/driver/vidc/src/msm_vidc_memory.c b/driver/vidc/src/msm_vidc_memory.c index 9cf1ff5bf2..8c5ab53a01 100644 --- a/driver/vidc/src/msm_vidc_memory.c +++ b/driver/vidc/src/msm_vidc_memory.c @@ -584,7 +584,7 @@ struct msm_vidc_type_size_name { char *name; }; -static struct msm_vidc_type_size_name buftype_size_name_arr[] = { +static const struct msm_vidc_type_size_name buftype_size_name_arr[] = { {MSM_MEM_POOL_BUFFER, sizeof(struct msm_vidc_buffer), "MSM_MEM_POOL_BUFFER" }, {MSM_MEM_POOL_MAP, sizeof(struct msm_vidc_map), "MSM_MEM_POOL_MAP" }, {MSM_MEM_POOL_ALLOC, sizeof(struct msm_vidc_alloc), "MSM_MEM_POOL_ALLOC" }, diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index bc70fb53dd..12bf81e170 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -1056,7 +1056,7 @@ static int msm_vidc_check_meta_buffers(struct msm_vidc_inst *inst) int i; struct msm_vidc_buffers *buffers; struct msm_vidc_buffer *buf; - const enum msm_vidc_buffer_type buffer_type[] = { + static const enum msm_vidc_buffer_type buffer_type[] = { MSM_VIDC_BUF_INPUT, MSM_VIDC_BUF_OUTPUT, }; @@ -1086,7 +1086,7 @@ static int handle_dequeue_buffers(struct msm_vidc_inst *inst) struct msm_vidc_buffers *buffers; struct msm_vidc_buffer *buf; struct msm_vidc_buffer *dummy; - const enum msm_vidc_buffer_type buffer_type[] = { + static const enum msm_vidc_buffer_type buffer_type[] = { MSM_VIDC_BUF_INPUT_META, MSM_VIDC_BUF_INPUT, MSM_VIDC_BUF_OUTPUT_META, @@ -1194,12 +1194,12 @@ static int handle_session_buffer(struct msm_vidc_inst *inst, struct hfi_buffer *buffer; u32 hfi_handle_size = 0; const struct msm_vidc_hfi_buffer_handle *hfi_handle_arr = NULL; - const struct msm_vidc_hfi_buffer_handle enc_input_hfi_handle[] = { + static const struct msm_vidc_hfi_buffer_handle enc_input_hfi_handle[] = { {HFI_BUFFER_METADATA, handle_input_metadata_buffer }, {HFI_BUFFER_RAW, handle_input_buffer }, {HFI_BUFFER_VPSS, handle_release_internal_buffer }, }; - const struct msm_vidc_hfi_buffer_handle enc_output_hfi_handle[] = { + static const struct msm_vidc_hfi_buffer_handle enc_output_hfi_handle[] = { {HFI_BUFFER_METADATA, handle_output_metadata_buffer }, {HFI_BUFFER_BITSTREAM, handle_output_buffer }, {HFI_BUFFER_BIN, handle_release_internal_buffer }, @@ -1209,7 +1209,7 @@ static int handle_session_buffer(struct msm_vidc_inst *inst, {HFI_BUFFER_ARP, handle_release_internal_buffer }, {HFI_BUFFER_DPB, handle_release_internal_buffer }, }; - const struct msm_vidc_hfi_buffer_handle dec_input_hfi_handle[] = { + static const struct msm_vidc_hfi_buffer_handle dec_input_hfi_handle[] = { {HFI_BUFFER_METADATA, handle_input_metadata_buffer }, {HFI_BUFFER_BITSTREAM, handle_input_buffer }, {HFI_BUFFER_BIN, handle_release_internal_buffer }, @@ -1218,7 +1218,7 @@ static int handle_session_buffer(struct msm_vidc_inst *inst, {HFI_BUFFER_LINE, handle_release_internal_buffer }, {HFI_BUFFER_PERSIST, handle_release_internal_buffer }, }; - const struct msm_vidc_hfi_buffer_handle dec_output_hfi_handle[] = { + static const struct msm_vidc_hfi_buffer_handle dec_output_hfi_handle[] = { {HFI_BUFFER_METADATA, handle_output_metadata_buffer }, {HFI_BUFFER_RAW, handle_output_buffer }, {HFI_BUFFER_DPB, handle_release_internal_buffer }, @@ -1352,7 +1352,7 @@ static int handle_session_command(struct msm_vidc_inst *inst, struct hfi_packet *pkt) { int i, rc; - const struct msm_vidc_hfi_packet_handle hfi_pkt_handle[] = { + static const struct msm_vidc_hfi_packet_handle hfi_pkt_handle[] = { {HFI_CMD_OPEN, handle_session_open }, {HFI_CMD_CLOSE, handle_session_close }, {HFI_CMD_START, handle_session_start }, @@ -1633,7 +1633,7 @@ static int handle_system_response(struct msm_vidc_core *core, struct hfi_packet *packet; u8 *pkt, *start_pkt; int i, j; - const struct msm_vidc_core_hfi_range be[] = { + static const struct msm_vidc_core_hfi_range be[] = { {HFI_SYSTEM_ERROR_BEGIN, HFI_SYSTEM_ERROR_END, handle_system_error }, {HFI_PROP_BEGIN, HFI_PROP_END, handle_system_property }, {HFI_CMD_BEGIN, HFI_CMD_END, handle_system_init }, @@ -1680,7 +1680,7 @@ static int __handle_session_response(struct msm_vidc_inst *inst, u8 *pkt, *start_pkt; bool dequeue = false; int i, j; - const struct msm_vidc_inst_hfi_range be[] = { + static const struct msm_vidc_inst_hfi_range be[] = { {HFI_SESSION_ERROR_BEGIN, HFI_SESSION_ERROR_END, handle_session_error }, {HFI_INFORMATION_BEGIN, HFI_INFORMATION_END, handle_session_info }, {HFI_PROP_BEGIN, HFI_PROP_END, handle_session_property }, From cf46bf2e540a5a5f37feb6c9a7695e9212e989da Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Fri, 18 Feb 2022 19:07:23 -0800 Subject: [PATCH 0553/1061] video: driver: acquire lock for request queue When client queues buffer via requests using ioctl MEDIA_REQUEST_IOC_QUEUE, vidioc_qbuf callback is not called to driver but instead buf_queue callback is called directly. Video driver is acquiring lock in vidioc_qbuf but not in buf_queue and hence acquiring lock was missing for requests which is leading to errors. Moved lock from vidioc_qbuf to buf_queue callback to resolve the issue. Change-Id: I76e3fcf07b7b24218717075f2c7d4a688ad18e86 Signed-off-by: Darshana Patil --- driver/vidc/src/msm_vidc.c | 15 ---------- driver/vidc/src/msm_vidc_v4l2.c | 19 +++++++------ driver/vidc/src/msm_vidc_vb2.c | 49 +++++++++++++++++++++++++++------ 3 files changed, 50 insertions(+), 33 deletions(-) diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index f58c71a06b..c9e9c60611 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -479,33 +479,18 @@ int msm_vidc_qbuf(void *instance, struct media_device *mdev, int rc = 0; struct msm_vidc_inst *inst = instance; struct vb2_queue *q; - u64 timestamp_us = 0; if (!inst || !inst->core || !b || !valid_v4l2_buffer(b, inst)) { d_vpr_e("%s: invalid params %pK %pK\n", __func__, inst, b); return -EINVAL; } - /* Expecting non-zero filledlen on INPUT port */ - if (b->type == INPUT_MPLANE && !b->m.planes[0].bytesused) { - i_vpr_e(inst, - "%s: zero bytesused input buffer not supported\n", __func__); - return -EINVAL; - } - q = msm_vidc_get_vb2q(inst, b->type, __func__); if (!q) { rc = -EINVAL; goto exit; } - if (is_encode_session(inst) && b->type == INPUT_MPLANE) { - timestamp_us = (u64)((b->timestamp.tv_sec * USEC_PER_SEC) + - b->timestamp.tv_usec); - msm_vidc_set_auto_framerate(inst, timestamp_us); - } - inst->last_qbuf_time_ns = ktime_get_ns(); - rc = vb2_qbuf(q, mdev, b); if (rc) i_vpr_e(inst, "%s: failed with %d\n", __func__, rc); diff --git a/driver/vidc/src/msm_vidc_v4l2.c b/driver/vidc/src/msm_vidc_v4l2.c index c73c2ac2ad..dfddd5f626 100644 --- a/driver/vidc/src/msm_vidc_v4l2.c +++ b/driver/vidc/src/msm_vidc_v4l2.c @@ -384,18 +384,19 @@ int msm_v4l2_qbuf(struct file *filp, void *fh, return -EINVAL; } - inst_lock(inst, __func__); - if (is_session_error(inst)) { - i_vpr_e(inst, "%s: inst in error state\n", __func__); - rc = -EBUSY; - goto unlock; - } + /* + * do not acquire inst lock here. acquire it in msm_vidc_buf_queue. + * for requests, msm_vidc_buf_queue() is not called from here. + * instead it's called as part of msm_v4l2_request_queue(). + * hence acquire the inst lock in common function i.e + * msm_vidc_buf_queue, to handle both requests and non-request + * scenarios. + */ rc = msm_vidc_qbuf(inst, vdev->v4l2_dev->mdev, b); if (rc) - goto unlock; + goto exit; -unlock: - inst_unlock(inst, __func__); +exit: put_inst(inst); return rc; diff --git a/driver/vidc/src/msm_vidc_vb2.c b/driver/vidc/src/msm_vidc_vb2.c index 496250f756..76a4099e63 100644 --- a/driver/vidc/src/msm_vidc_vb2.c +++ b/driver/vidc/src/msm_vidc_vb2.c @@ -14,6 +14,8 @@ #include "msm_vidc_debug.h" #include "msm_vidc_control.h" +extern struct msm_vidc_core *g_core; + struct vb2_queue *msm_vidc_get_vb2q(struct msm_vidc_inst *inst, u32 type, const char *func) { @@ -351,6 +353,7 @@ void msm_vidc_buf_queue(struct vb2_buffer *vb2) { int rc = 0; struct msm_vidc_inst *inst; + u64 timestamp_us = 0; inst = vb2_get_drv_priv(vb2->vb2_queue); if (!inst) { @@ -358,6 +361,32 @@ void msm_vidc_buf_queue(struct vb2_buffer *vb2) return; } + inst = get_inst_ref(g_core, inst); + if (!inst) { + d_vpr_e("%s: invalid instance\n", __func__); + return; + } + + inst_lock(inst, __func__); + if (is_session_error(inst)) { + i_vpr_e(inst, "%s: inst in error state\n", __func__); + rc = -EINVAL; + goto unlock; + } + + /* Expecting non-zero filledlen on INPUT port */ + if (vb2->type == INPUT_MPLANE && !vb2->planes[0].bytesused) { + i_vpr_e(inst, + "%s: zero bytesused input buffer not supported\n", __func__); + rc = -EINVAL; + goto unlock; + } + + if (is_encode_session(inst) && vb2->type == INPUT_MPLANE) { + timestamp_us = vb2->timestamp; + msm_vidc_set_auto_framerate(inst, timestamp_us); + } + inst->last_qbuf_time_ns = ktime_get_ns(); /* * As part of every qbuf initalise request to true. * If there are any dynamic controls associated with qbuf, @@ -373,14 +402,14 @@ void msm_vidc_buf_queue(struct vb2_buffer *vb2) inst->request = false; i_vpr_e(inst, "%s: request setup failed, error %d\n", __func__, rc); - goto error; + goto unlock; } inst->request = false; if (inst->capabilities->cap[INPUT_META_VIA_REQUEST].value) { rc = msm_vidc_update_input_meta_buffer_index(inst, vb2); if (rc) - goto error; + goto unlock; } if (is_decode_session(inst)) @@ -389,17 +418,19 @@ void msm_vidc_buf_queue(struct vb2_buffer *vb2) rc = msm_venc_qbuf(inst, vb2); else rc = -EINVAL; - if (rc) { print_vb2_buffer("failed vb2-qbuf", inst, vb2); - goto error; + goto unlock; } - return; -error: - msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); - v4l2_ctrl_request_complete(vb2->req_obj.req, &inst->ctrl_handler); - vb2_buffer_done(vb2, VB2_BUF_STATE_ERROR); +unlock: + if (rc) { + msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); + v4l2_ctrl_request_complete(vb2->req_obj.req, &inst->ctrl_handler); + vb2_buffer_done(vb2, VB2_BUF_STATE_ERROR); + } + inst_unlock(inst, __func__); + put_inst(inst); } void msm_vidc_buf_cleanup(struct vb2_buffer *vb) From f9a844d745933afcbc94b39e0cd9dffba049ffb8 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Wed, 23 Feb 2022 18:08:48 -0800 Subject: [PATCH 0554/1061] video: driver: fix in header details fix in header comment details. Change-Id: I698b1ee9076a908a2b8f7b9c588c733567f9d8c9 Signed-off-by: Akshata Sahukar --- driver/vidc/inc/msm_vidc_control.h | 3 ++- driver/vidc/inc/msm_vidc_inst.h | 3 ++- driver/vidc/src/msm_vdec.c | 3 ++- driver/vidc/src/msm_vidc.c | 3 ++- driver/vidc/src/msm_vidc_control.c | 3 ++- driver/vidc/src/msm_vidc_vb2.c | 3 ++- 6 files changed, 12 insertions(+), 6 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_control.h b/driver/vidc/inc/msm_vidc_control.h index 4c062f2078..f0953e9c9f 100644 --- a/driver/vidc/inc/msm_vidc_control.h +++ b/driver/vidc/inc/msm_vidc_control.h @@ -1,7 +1,8 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* - * Copyright (c) 2020-2022,, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. */ +/* Copyright (c) 2022. Qualcomm Innovation Center, Inc. All rights reserved. */ #ifndef _MSM_VIDC_CONTROL_H_ #define _MSM_VIDC_CONTROL_H_ diff --git a/driver/vidc/inc/msm_vidc_inst.h b/driver/vidc/inc/msm_vidc_inst.h index d48c991793..4a18c9cad0 100644 --- a/driver/vidc/inc/msm_vidc_inst.h +++ b/driver/vidc/inc/msm_vidc_inst.h @@ -1,7 +1,8 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* - * Copyright (c) 2020-2022,, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. */ +/* Copyright (c) 2022. Qualcomm Innovation Center, Inc. All rights reserved. */ #ifndef _MSM_VIDC_INST_H_ #define _MSM_VIDC_INST_H_ diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index ffa866c2c5..5ccd00fb3b 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -1,7 +1,8 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * Copyright (c) 2020-2022, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. */ +/* Copyright (c) 2022. Qualcomm Innovation Center, Inc. All rights reserved. */ #include #include "msm_media_info.h" diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index f58c71a06b..c1520cbc46 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -1,7 +1,8 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * Copyright (c) 2020-2022, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. */ +/* Copyright (c) 2022. Qualcomm Innovation Center, Inc. All rights reserved. */ #include #include diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index cdc66ae768..70d69c57b1 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -1,7 +1,8 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * Copyright (c) 2020-2022, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. */ +/* Copyright (c) 2022. Qualcomm Innovation Center, Inc. All rights reserved. */ #include "msm_vidc_control.h" #include "msm_vidc_debug.h" diff --git a/driver/vidc/src/msm_vidc_vb2.c b/driver/vidc/src/msm_vidc_vb2.c index 496250f756..b718f9f392 100644 --- a/driver/vidc/src/msm_vidc_vb2.c +++ b/driver/vidc/src/msm_vidc_vb2.c @@ -1,7 +1,8 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * Copyright (c) 2020-2022, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. */ +/* Copyright (c) 2022. Qualcomm Innovation Center, Inc. All rights reserved. */ #include "msm_vidc_vb2.h" #include "msm_vidc_core.h" From e3f2139586c2821ca39bc1f0dfa3a2c06732deb3 Mon Sep 17 00:00:00 2001 From: Mahesh Kumar Sharma Date: Fri, 25 Feb 2022 11:42:56 -0800 Subject: [PATCH 0555/1061] video: driver: decrease heap usage for 24 session support on IRIS3 Originally h26xd and vp9 display buffer was allocated from FW heap. In order to decrease heap usage for 24 session support on IRIS3, FW has moved display buffer from FW heap to persist buffer. Adding this support in driver. Change-Id: If865748e7c0df5fecd26905f7ef343f465f69967 Signed-off-by: Mahesh Kumar Sharma --- driver/variant/iris3/inc/hfi_buffer_iris3.h | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/driver/variant/iris3/inc/hfi_buffer_iris3.h b/driver/variant/iris3/inc/hfi_buffer_iris3.h index d6bf018377..ebfb6b8707 100644 --- a/driver/variant/iris3/inc/hfi_buffer_iris3.h +++ b/driver/variant/iris3/inc/hfi_buffer_iris3.h @@ -512,8 +512,11 @@ typedef HFI_U32 HFI_BOOL; #define NUM_SLIST_BUF_H264 (256 + 32) #define SIZE_SLIST_BUF_H264 (512) #define SIZE_SEI_USERDATA (4096) +#define H264_NUM_FRM_INFO (66) +#define H264_DISPLAY_BUF_SIZE (3328) #define HFI_BUFFER_PERSIST_H264D(_size) \ _size = HFI_ALIGN((SIZE_SLIST_BUF_H264 * NUM_SLIST_BUF_H264 + \ + H264_DISPLAY_BUF_SIZE * H264_NUM_FRM_INFO + \ NUM_HW_PIC_BUF * SIZE_SEI_USERDATA), VENUS_DMA_ALIGNMENT) #define LCU_MAX_SIZE_PELS 64 @@ -712,8 +715,11 @@ typedef HFI_U32 HFI_BOOL; #define H265_NUM_TILE_COL 32 #define H265_NUM_TILE_ROW 128 #define H265_NUM_TILE (H265_NUM_TILE_ROW * H265_NUM_TILE_COL + 1) +#define H265_NUM_FRM_INFO (48) +#define H265_DISPLAY_BUF_SIZE (3072) #define HFI_BUFFER_PERSIST_H265D(_size) \ _size = HFI_ALIGN((SIZE_SLIST_BUF_H265 * NUM_SLIST_BUF_H265 + \ + H265_NUM_FRM_INFO * H265_DISPLAY_BUF_SIZE + \ H265_NUM_TILE * sizeof(HFI_U32) + NUM_HW_PIC_BUF * SIZE_SEI_USERDATA),\ VENUS_DMA_ALIGNMENT) @@ -827,6 +833,7 @@ typedef HFI_U32 HFI_BOOL; #define VP9_NUM_FRAME_INFO_BUF 32 #define VP9_NUM_PROBABILITY_TABLE_BUF (VP9_NUM_FRAME_INFO_BUF + 4) #define VP9_PROB_TABLE_SIZE (3840) +#define VP9_FRAME_INFO_BUF_SIZE (6144) #define VP9_UDC_HEADER_BUF_SIZE (3 * 128) #define MAX_SUPERFRAME_HEADER_LEN (34) @@ -839,7 +846,8 @@ typedef HFI_U32 HFI_BOOL; VENUS_DMA_ALIGNMENT) + HFI_ALIGN(VP9_UDC_HEADER_BUF_SIZE, \ VENUS_DMA_ALIGNMENT) + HFI_ALIGN(VP9_NUM_FRAME_INFO_BUF * \ CCE_TILE_OFFSET_SIZE, VENUS_DMA_ALIGNMENT) + \ - HDR10_HIST_EXTRADATA_SIZE + HFI_ALIGN(VP9_NUM_FRAME_INFO_BUF * VP9_FRAME_INFO_BUF_SIZE, \ + VENUS_DMA_ALIGNMENT) + HDR10_HIST_EXTRADATA_SIZE #define HFI_BUFFER_LINE_MP2D(_size, frame_width, frame_height, \ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ From de4872d103fe14aeb058d3618d12f0670a0b6977 Mon Sep 17 00:00:00 2001 From: Mihir Ganu Date: Mon, 28 Feb 2022 19:47:25 -0800 Subject: [PATCH 0556/1061] video: driver: Update AV1D secure session capabilities Add width and height limits to AV1D secure session capabilities. Change-Id: I8ebdb6818828073ec28597270a2cf72b3669a04b Signed-off-by: Mihir Ganu --- driver/platform/kalama/src/msm_vidc_kalama.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index 33199d5608..88072a95f4 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -126,15 +126,15 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { {FRAME_WIDTH, DEC, CODECS_ALL, 96, 8192, 1, 1920}, {FRAME_WIDTH, DEC, VP9, 96, 4096, 1, 1920}, {FRAME_WIDTH, ENC, CODECS_ALL, 128, 8192, 1, 1920}, - {LOSSLESS_FRAME_WIDTH, ENC, H264|HEVC, 128, 4096, 1, 1920}, - {SECURE_FRAME_WIDTH, DEC, H264|HEVC|VP9, 96, 4096, 1, 1920}, - {SECURE_FRAME_WIDTH, ENC, H264|HEVC, 128, 4096, 1, 1920}, + {LOSSLESS_FRAME_WIDTH, ENC, CODECS_ALL, 128, 4096, 1, 1920}, + {SECURE_FRAME_WIDTH, DEC, CODECS_ALL, 96, 4096, 1, 1920}, + {SECURE_FRAME_WIDTH, ENC, CODECS_ALL, 128, 4096, 1, 1920}, {FRAME_HEIGHT, DEC, CODECS_ALL, 96, 8192, 1, 1080}, {FRAME_HEIGHT, DEC, VP9, 96, 4096, 1, 1080}, {FRAME_HEIGHT, ENC, CODECS_ALL, 128, 8192, 1, 1080}, - {LOSSLESS_FRAME_HEIGHT, ENC, H264|HEVC, 128, 4096, 1, 1080}, - {SECURE_FRAME_HEIGHT, DEC, H264|HEVC|VP9, 96, 4096, 1, 1080}, - {SECURE_FRAME_HEIGHT, ENC, H264|HEVC, 128, 4096, 1, 1080}, + {LOSSLESS_FRAME_HEIGHT, ENC, CODECS_ALL, 128, 4096, 1, 1080}, + {SECURE_FRAME_HEIGHT, DEC, CODECS_ALL, 96, 4096, 1, 1080}, + {SECURE_FRAME_HEIGHT, ENC, CODECS_ALL, 128, 4096, 1, 1080}, {PIX_FMTS, ENC, H264, MSM_VIDC_FMT_NV12, MSM_VIDC_FMT_NV12C, From 4f1180f1a6c84713e7d50b7dd4a31a37b2ca4c4b Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Mon, 7 Mar 2022 17:47:16 +0530 Subject: [PATCH 0557/1061] video: driver: handle static and dynamic properties for decoder Added change at decoder side to use adjust/set functions for static(streamon) and dynamic(s_ctrl) cases. Change-Id: I3d8c32baaf2fa2c3a077cc936a8ff2159ababfe3 Signed-off-by: Govindaraj Rajagopal --- driver/platform/diwali/src/msm_vidc_diwali.c | 228 +++++++++++-- driver/platform/kalama/src/msm_vidc_kalama.c | 92 +++++- driver/platform/waipio/src/msm_vidc_waipio.c | 76 ++++- driver/vidc/inc/msm_vidc_control.h | 5 + driver/vidc/inc/msm_vidc_internal.h | 3 + driver/vidc/src/msm_vdec.c | 317 +------------------ driver/vidc/src/msm_venc.c | 26 -- driver/vidc/src/msm_vidc_control.c | 115 ++++++- driver/vidc/src/msm_vidc_driver.c | 3 + 9 files changed, 478 insertions(+), 387 deletions(-) diff --git a/driver/platform/diwali/src/msm_vidc_diwali.c b/driver/platform/diwali/src/msm_vidc_diwali.c index 7c6c89fe08..1072d7f662 100644 --- a/driver/platform/diwali/src/msm_vidc_diwali.c +++ b/driver/platform/diwali/src/msm_vidc_diwali.c @@ -425,8 +425,11 @@ static struct msm_platform_inst_capability instance_data_diwali_v0[] = { {SUPER_FRAME, ENC, H264|HEVC, 0, 32, 1, 0, - V4L2_CID_MPEG_VIDC_SUPERFRAME, - 0}, + V4L2_CID_MPEG_VIDC_SUPERFRAME, 0, + CAP_FLAG_NONE, + {0}, + {INPUT_BUF_HOST_MAX_COUNT, OUTPUT_BUF_HOST_MAX_COUNT}, + NULL, NULL}, {SLICE_INTERFACE, DEC, CODECS_ALL, 0, 0, 0, 0, @@ -1405,26 +1408,80 @@ static struct msm_platform_inst_capability instance_data_diwali_v0[] = { 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY_ENABLE, HFI_PROP_DECODE_ORDER_OUTPUT, - CAP_FLAG_INPUT_PORT}, + CAP_FLAG_INPUT_PORT, + {0}, {OUTPUT_ORDER}, + NULL, NULL}, {DISPLAY_DELAY, DEC, H264|HEVC|VP9, 0, 1, 1, 0, V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY, HFI_PROP_DECODE_ORDER_OUTPUT, - CAP_FLAG_INPUT_PORT}, + CAP_FLAG_INPUT_PORT, + {0}, {OUTPUT_ORDER}, + NULL, NULL}, + + {OUTPUT_ORDER, DEC, H264|HEVC|VP9, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, + HFI_PROP_DECODE_ORDER_OUTPUT, + CAP_FLAG_INPUT_PORT, + {THUMBNAIL_MODE, DISPLAY_DELAY, DISPLAY_DELAY_ENABLE}, + {0}, + msm_vidc_adjust_output_order, msm_vidc_set_u32}, + + {INPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL, + DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT, + 1, DEFAULT_MAX_HOST_BUF_COUNT, + 0, + HFI_PROP_BUFFER_HOST_MAX_COUNT, + CAP_FLAG_INPUT_PORT, + {0}, {0}, + msm_vidc_adjust_input_buf_host_max_count, msm_vidc_set_u32}, + + {INPUT_BUF_HOST_MAX_COUNT, ENC, H264|HEVC, + DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT, + 1, DEFAULT_MAX_HOST_BUF_COUNT, + 0, + HFI_PROP_BUFFER_HOST_MAX_COUNT, + CAP_FLAG_INPUT_PORT, + {SUPER_FRAME}, {0}, + msm_vidc_adjust_input_buf_host_max_count, msm_vidc_set_u32}, + + {OUTPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL, + DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT, + 1, DEFAULT_MAX_HOST_BUF_COUNT, + 0, + HFI_PROP_BUFFER_HOST_MAX_COUNT, + CAP_FLAG_OUTPUT_PORT, + {0}, {0}, + msm_vidc_adjust_output_buf_host_max_count, msm_vidc_set_u32}, + + {OUTPUT_BUF_HOST_MAX_COUNT, ENC, H264|HEVC, + DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT, + 1, DEFAULT_MAX_HOST_BUF_COUNT, + 0, + HFI_PROP_BUFFER_HOST_MAX_COUNT, + CAP_FLAG_OUTPUT_PORT, + {SUPER_FRAME}, {0}, + msm_vidc_adjust_output_buf_host_max_count, msm_vidc_set_u32}, /* conceal color */ {CONCEAL_COLOR_8BIT, DEC, CODECS_ALL, 0x0, 0xff3fcff, 1, DEFAULT_VIDEO_CONCEAL_COLOR_BLACK, V4L2_CID_MPEG_VIDEO_MUTE_YUV, HFI_PROP_CONCEAL_COLOR_8BIT, - CAP_FLAG_OUTPUT_PORT}, + CAP_FLAG_INPUT_PORT, + {0}, {0}, + NULL, msm_vidc_set_u32_packed}, {CONCEAL_COLOR_10BIT, DEC, CODECS_ALL, 0x0, 0x3fffffff, 1, DEFAULT_VIDEO_CONCEAL_COLOR_BLACK, V4L2_CID_MPEG_VIDEO_MUTE_YUV, HFI_PROP_CONCEAL_COLOR_10BIT, - CAP_FLAG_OUTPUT_PORT}, + CAP_FLAG_INPUT_PORT, + {0}, {0}, + NULL, msm_vidc_set_u32_packed}, // TODO {STAGE, DEC|ENC, CODECS_ALL, @@ -1483,7 +1540,10 @@ static struct msm_platform_inst_capability instance_data_diwali_v0[] = { V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDC_THUMBNAIL_MODE, - HFI_PROP_THUMBNAIL_MODE}, + HFI_PROP_THUMBNAIL_MODE, + CAP_FLAG_INPUT_PORT, + {0}, {OUTPUT_ORDER}, + NULL, msm_vidc_set_u32}, {DEFAULT_HEADER, DEC, CODECS_ALL, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, @@ -1498,7 +1558,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v0[] = { HFI_PROP_DEC_START_FROM_RAP_FRAME, CAP_FLAG_INPUT_PORT, {0}, {0}, - NULL, NULL}, + NULL, msm_vidc_set_u32}, {SEQ_CHANGE_AT_SYNC_FRAME, DEC, CODECS_ALL, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, @@ -1962,8 +2022,11 @@ static struct msm_platform_inst_capability instance_data_diwali_v1[] = { {SUPER_FRAME, ENC, H264|HEVC, 0, 32, 1, 0, - V4L2_CID_MPEG_VIDC_SUPERFRAME, - 0}, + V4L2_CID_MPEG_VIDC_SUPERFRAME, 0, + CAP_FLAG_NONE, + {0}, + {INPUT_BUF_HOST_MAX_COUNT, OUTPUT_BUF_HOST_MAX_COUNT}, + NULL, NULL}, {SLICE_INTERFACE, DEC, CODECS_ALL, 0, 0, 0, 0, @@ -2941,26 +3004,80 @@ static struct msm_platform_inst_capability instance_data_diwali_v1[] = { 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY_ENABLE, HFI_PROP_DECODE_ORDER_OUTPUT, - CAP_FLAG_INPUT_PORT}, + CAP_FLAG_INPUT_PORT, + {0}, {OUTPUT_ORDER}, + NULL, NULL}, {DISPLAY_DELAY, DEC, H264|HEVC|VP9, 0, 1, 1, 0, V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY, HFI_PROP_DECODE_ORDER_OUTPUT, - CAP_FLAG_INPUT_PORT}, + CAP_FLAG_INPUT_PORT, + {0}, {OUTPUT_ORDER}, + NULL, NULL}, + + {OUTPUT_ORDER, DEC, H264|HEVC|VP9, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, + HFI_PROP_DECODE_ORDER_OUTPUT, + CAP_FLAG_INPUT_PORT, + {THUMBNAIL_MODE, DISPLAY_DELAY, DISPLAY_DELAY_ENABLE}, + {0}, + msm_vidc_adjust_output_order, msm_vidc_set_u32}, + + {INPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL, + DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT, + 1, DEFAULT_MAX_HOST_BUF_COUNT, + 0, + HFI_PROP_BUFFER_HOST_MAX_COUNT, + CAP_FLAG_INPUT_PORT, + {0}, {0}, + msm_vidc_adjust_input_buf_host_max_count, msm_vidc_set_u32}, + + {INPUT_BUF_HOST_MAX_COUNT, ENC, H264|HEVC, + DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT, + 1, DEFAULT_MAX_HOST_BUF_COUNT, + 0, + HFI_PROP_BUFFER_HOST_MAX_COUNT, + CAP_FLAG_INPUT_PORT, + {SUPER_FRAME}, {0}, + msm_vidc_adjust_input_buf_host_max_count, msm_vidc_set_u32}, + + {OUTPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL, + DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT, + 1, DEFAULT_MAX_HOST_BUF_COUNT, + 0, + HFI_PROP_BUFFER_HOST_MAX_COUNT, + CAP_FLAG_OUTPUT_PORT, + {0}, {0}, + msm_vidc_adjust_output_buf_host_max_count, msm_vidc_set_u32}, + + {OUTPUT_BUF_HOST_MAX_COUNT, ENC, H264|HEVC, + DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT, + 1, DEFAULT_MAX_HOST_BUF_COUNT, + 0, + HFI_PROP_BUFFER_HOST_MAX_COUNT, + CAP_FLAG_OUTPUT_PORT, + {SUPER_FRAME}, {0}, + msm_vidc_adjust_output_buf_host_max_count, msm_vidc_set_u32}, /* conceal color */ {CONCEAL_COLOR_8BIT, DEC, CODECS_ALL, 0x0, 0xff3fcff, 1, DEFAULT_VIDEO_CONCEAL_COLOR_BLACK, V4L2_CID_MPEG_VIDEO_MUTE_YUV, HFI_PROP_CONCEAL_COLOR_8BIT, - CAP_FLAG_OUTPUT_PORT}, + CAP_FLAG_INPUT_PORT, + {0}, {0}, + NULL, msm_vidc_set_u32_packed}, {CONCEAL_COLOR_10BIT, DEC, CODECS_ALL, 0x0, 0x3fffffff, 1, DEFAULT_VIDEO_CONCEAL_COLOR_BLACK, V4L2_CID_MPEG_VIDEO_MUTE_YUV, HFI_PROP_CONCEAL_COLOR_10BIT, - CAP_FLAG_OUTPUT_PORT}, + CAP_FLAG_INPUT_PORT, + {0}, {0}, + NULL, msm_vidc_set_u32_packed}, // TODO {STAGE, DEC|ENC, CODECS_ALL, @@ -3019,7 +3136,10 @@ static struct msm_platform_inst_capability instance_data_diwali_v1[] = { V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDC_THUMBNAIL_MODE, - HFI_PROP_THUMBNAIL_MODE}, + HFI_PROP_THUMBNAIL_MODE, + CAP_FLAG_INPUT_PORT, + {0}, {OUTPUT_ORDER}, + NULL, msm_vidc_set_u32}, {DEFAULT_HEADER, DEC, CODECS_ALL, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, @@ -3034,7 +3154,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v1[] = { HFI_PROP_DEC_START_FROM_RAP_FRAME, CAP_FLAG_INPUT_PORT, {0}, {0}, - NULL, NULL}, + NULL, msm_vidc_set_u32}, {SEQ_CHANGE_AT_SYNC_FRAME, DEC, CODECS_ALL, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, @@ -3494,8 +3614,11 @@ static struct msm_platform_inst_capability instance_data_diwali_v2[] = { {SUPER_FRAME, ENC, H264|HEVC, 0, 32, 1, 0, - V4L2_CID_MPEG_VIDC_SUPERFRAME, - 0}, + V4L2_CID_MPEG_VIDC_SUPERFRAME, 0, + CAP_FLAG_NONE, + {0}, + {INPUT_BUF_HOST_MAX_COUNT, OUTPUT_BUF_HOST_MAX_COUNT}, + NULL, NULL}, {SLICE_INTERFACE, DEC, CODECS_ALL, 0, 0, 0, 0, @@ -4468,26 +4591,80 @@ static struct msm_platform_inst_capability instance_data_diwali_v2[] = { 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY_ENABLE, HFI_PROP_DECODE_ORDER_OUTPUT, - CAP_FLAG_INPUT_PORT}, + CAP_FLAG_INPUT_PORT, + {0}, {OUTPUT_ORDER}, + NULL, NULL}, {DISPLAY_DELAY, DEC, H264|HEVC|VP9, 0, 1, 1, 0, V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY, HFI_PROP_DECODE_ORDER_OUTPUT, - CAP_FLAG_INPUT_PORT}, + CAP_FLAG_INPUT_PORT, + {0}, {OUTPUT_ORDER}, + NULL, NULL}, + + {OUTPUT_ORDER, DEC, H264|HEVC|VP9, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, + HFI_PROP_DECODE_ORDER_OUTPUT, + CAP_FLAG_INPUT_PORT, + {THUMBNAIL_MODE, DISPLAY_DELAY, DISPLAY_DELAY_ENABLE}, + {0}, + msm_vidc_adjust_output_order, msm_vidc_set_u32}, + + {INPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL, + DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT, + 1, DEFAULT_MAX_HOST_BUF_COUNT, + 0, + HFI_PROP_BUFFER_HOST_MAX_COUNT, + CAP_FLAG_INPUT_PORT, + {0}, {0}, + msm_vidc_adjust_input_buf_host_max_count, msm_vidc_set_u32}, + + {INPUT_BUF_HOST_MAX_COUNT, ENC, H264|HEVC, + DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT, + 1, DEFAULT_MAX_HOST_BUF_COUNT, + 0, + HFI_PROP_BUFFER_HOST_MAX_COUNT, + CAP_FLAG_INPUT_PORT, + {SUPER_FRAME}, {0}, + msm_vidc_adjust_input_buf_host_max_count, msm_vidc_set_u32}, + + {OUTPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL, + DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT, + 1, DEFAULT_MAX_HOST_BUF_COUNT, + 0, + HFI_PROP_BUFFER_HOST_MAX_COUNT, + CAP_FLAG_OUTPUT_PORT, + {0}, {0}, + msm_vidc_adjust_output_buf_host_max_count, msm_vidc_set_u32}, + + {OUTPUT_BUF_HOST_MAX_COUNT, ENC, H264|HEVC, + DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT, + 1, DEFAULT_MAX_HOST_BUF_COUNT, + 0, + HFI_PROP_BUFFER_HOST_MAX_COUNT, + CAP_FLAG_OUTPUT_PORT, + {SUPER_FRAME}, {0}, + msm_vidc_adjust_output_buf_host_max_count, msm_vidc_set_u32}, /* conceal color */ {CONCEAL_COLOR_8BIT, DEC, CODECS_ALL, 0x0, 0xff3fcff, 1, DEFAULT_VIDEO_CONCEAL_COLOR_BLACK, V4L2_CID_MPEG_VIDEO_MUTE_YUV, HFI_PROP_CONCEAL_COLOR_8BIT, - CAP_FLAG_OUTPUT_PORT}, + CAP_FLAG_INPUT_PORT, + {0}, {0}, + NULL, msm_vidc_set_u32_packed}, {CONCEAL_COLOR_10BIT, DEC, CODECS_ALL, 0x0, 0x3fffffff, 1, DEFAULT_VIDEO_CONCEAL_COLOR_BLACK, V4L2_CID_MPEG_VIDEO_MUTE_YUV, HFI_PROP_CONCEAL_COLOR_10BIT, - CAP_FLAG_OUTPUT_PORT}, + CAP_FLAG_INPUT_PORT, + {0}, {0}, + NULL, msm_vidc_set_u32_packed}, // TODO {STAGE, DEC|ENC, CODECS_ALL, @@ -4546,7 +4723,10 @@ static struct msm_platform_inst_capability instance_data_diwali_v2[] = { V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDC_THUMBNAIL_MODE, - HFI_PROP_THUMBNAIL_MODE}, + HFI_PROP_THUMBNAIL_MODE, + CAP_FLAG_INPUT_PORT, + {0}, {OUTPUT_ORDER}, + NULL, msm_vidc_set_u32}, {DEFAULT_HEADER, DEC, CODECS_ALL, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, @@ -4561,7 +4741,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v2[] = { HFI_PROP_DEC_START_FROM_RAP_FRAME, CAP_FLAG_INPUT_PORT, {0}, {0}, - NULL, NULL}, + NULL, msm_vidc_set_u32}, {SEQ_CHANGE_AT_SYNC_FRAME, DEC, CODECS_ALL, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index 88072a95f4..858852b338 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -343,8 +343,11 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { {SUPER_FRAME, ENC, H264|HEVC, 0, 32, 1, 0, - V4L2_CID_MPEG_VIDC_SUPERFRAME, - 0}, + V4L2_CID_MPEG_VIDC_SUPERFRAME, 0, + CAP_FLAG_NONE, + {0}, + {INPUT_BUF_HOST_MAX_COUNT, OUTPUT_BUF_HOST_MAX_COUNT}, + NULL, NULL}, {SLICE_INTERFACE, DEC, CODECS_ALL, 0, 0, 0, 0, @@ -389,7 +392,10 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_DISABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE, - HFI_PROP_NAL_LENGTH_FIELD}, + HFI_PROP_NAL_LENGTH_FIELD, + CAP_FLAG_INPUT_PORT, + {0}, {0}, + NULL, msm_vidc_set_u32}, {NAL_LENGTH_FIELD, ENC, CODECS_ALL, V4L2_MPEG_VIDEO_HEVC_SIZE_0, @@ -875,8 +881,10 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { {ENH_LAYER_COUNT, DEC, AV1, 0, MAX_OP_POINT, 1, 0, 0, - HFI_PROP_AV1_OP_POINT}, - + HFI_PROP_AV1_OP_POINT, + CAP_FLAG_INPUT_PORT, + {0}, {0}, + NULL, msm_vidc_set_u32}, /* * layer bitrate is treated as BIT_RATE cap sibling and * is handled in bitrate adjust and set functions @@ -1382,26 +1390,80 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY_ENABLE, HFI_PROP_DECODE_ORDER_OUTPUT, - CAP_FLAG_INPUT_PORT}, + CAP_FLAG_INPUT_PORT, + {0}, {OUTPUT_ORDER}, + NULL, NULL}, {DISPLAY_DELAY, DEC, H264|HEVC|VP9|AV1, 0, 1, 1, 0, V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY, HFI_PROP_DECODE_ORDER_OUTPUT, - CAP_FLAG_INPUT_PORT}, + CAP_FLAG_INPUT_PORT, + {0}, {OUTPUT_ORDER}, + NULL, NULL}, + + {OUTPUT_ORDER, DEC, H264|HEVC|VP9|AV1, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, + HFI_PROP_DECODE_ORDER_OUTPUT, + CAP_FLAG_INPUT_PORT, + {THUMBNAIL_MODE, DISPLAY_DELAY, DISPLAY_DELAY_ENABLE}, + {0}, + msm_vidc_adjust_output_order, msm_vidc_set_u32}, + + {INPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL, + DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT, + 1, DEFAULT_MAX_HOST_BUF_COUNT, + 0, + HFI_PROP_BUFFER_HOST_MAX_COUNT, + CAP_FLAG_INPUT_PORT, + {0}, {0}, + msm_vidc_adjust_input_buf_host_max_count, msm_vidc_set_u32}, + + {INPUT_BUF_HOST_MAX_COUNT, ENC, H264|HEVC, + DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT, + 1, DEFAULT_MAX_HOST_BUF_COUNT, + 0, + HFI_PROP_BUFFER_HOST_MAX_COUNT, + CAP_FLAG_INPUT_PORT, + {SUPER_FRAME}, {0}, + msm_vidc_adjust_input_buf_host_max_count, msm_vidc_set_u32}, + + {OUTPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL, + DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT, + 1, DEFAULT_MAX_HOST_BUF_COUNT, + 0, + HFI_PROP_BUFFER_HOST_MAX_COUNT, + CAP_FLAG_OUTPUT_PORT, + {0}, {0}, + msm_vidc_adjust_output_buf_host_max_count, msm_vidc_set_u32}, + + {OUTPUT_BUF_HOST_MAX_COUNT, ENC, H264|HEVC, + DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT, + 1, DEFAULT_MAX_HOST_BUF_COUNT, + 0, + HFI_PROP_BUFFER_HOST_MAX_COUNT, + CAP_FLAG_OUTPUT_PORT, + {SUPER_FRAME}, {0}, + msm_vidc_adjust_output_buf_host_max_count, msm_vidc_set_u32}, /* conceal color */ {CONCEAL_COLOR_8BIT, DEC, CODECS_ALL, 0x0, 0xff3fcff, 1, DEFAULT_VIDEO_CONCEAL_COLOR_BLACK, V4L2_CID_MPEG_VIDEO_MUTE_YUV, HFI_PROP_CONCEAL_COLOR_8BIT, - CAP_FLAG_OUTPUT_PORT}, + CAP_FLAG_INPUT_PORT, + {0}, {0}, + NULL, msm_vidc_set_u32_packed}, {CONCEAL_COLOR_10BIT, DEC, CODECS_ALL, 0x0, 0x3fffffff, 1, DEFAULT_VIDEO_CONCEAL_COLOR_BLACK, V4L2_CID_MPEG_VIDEO_MUTE_YUV, HFI_PROP_CONCEAL_COLOR_10BIT, - CAP_FLAG_OUTPUT_PORT}, + CAP_FLAG_INPUT_PORT, + {0}, {0}, + NULL, msm_vidc_set_u32_packed}, // TODO {STAGE, DEC|ENC, CODECS_ALL, @@ -1460,7 +1522,10 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDC_THUMBNAIL_MODE, - HFI_PROP_THUMBNAIL_MODE}, + HFI_PROP_THUMBNAIL_MODE, + CAP_FLAG_INPUT_PORT, + {0}, {OUTPUT_ORDER}, + NULL, msm_vidc_set_u32}, {DEFAULT_HEADER, DEC, CODECS_ALL, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, @@ -1475,7 +1540,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { HFI_PROP_DEC_START_FROM_RAP_FRAME, CAP_FLAG_INPUT_PORT, {0}, {0}, - NULL, NULL}, + NULL, msm_vidc_set_u32}, {SEQ_CHANGE_AT_SYNC_FRAME, DEC, CODECS_ALL, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, @@ -1521,7 +1586,10 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { {DRAP, DEC, AV1, 0, S32_MAX, 1, 0, 0, - HFI_PROP_AV1_DRAP_CONFIG}, + HFI_PROP_AV1_DRAP_CONFIG, + CAP_FLAG_INPUT_PORT, + {0}, {0}, + NULL, msm_vidc_set_u32}, {META_BITSTREAM_RESOLUTION, DEC, AV1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 776f537418..cce12dbb13 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -303,8 +303,11 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {SUPER_FRAME, ENC, H264|HEVC, 0, 32, 1, 0, - V4L2_CID_MPEG_VIDC_SUPERFRAME, - 0}, + V4L2_CID_MPEG_VIDC_SUPERFRAME, 0, + CAP_FLAG_NONE, + {0}, + {INPUT_BUF_HOST_MAX_COUNT, OUTPUT_BUF_HOST_MAX_COUNT}, + NULL, NULL}, {SLICE_INTERFACE, DEC, CODECS_ALL, 0, 0, 0, 0, @@ -1277,26 +1280,80 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY_ENABLE, HFI_PROP_DECODE_ORDER_OUTPUT, - CAP_FLAG_INPUT_PORT}, + CAP_FLAG_INPUT_PORT, + {0}, {OUTPUT_ORDER}, + NULL, NULL}, {DISPLAY_DELAY, DEC, H264|HEVC|VP9, 0, 1, 1, 0, V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY, HFI_PROP_DECODE_ORDER_OUTPUT, - CAP_FLAG_INPUT_PORT}, + CAP_FLAG_INPUT_PORT, + {0}, {OUTPUT_ORDER}, + NULL, NULL}, + + {OUTPUT_ORDER, DEC, H264|HEVC|VP9, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, + HFI_PROP_DECODE_ORDER_OUTPUT, + CAP_FLAG_INPUT_PORT, + {THUMBNAIL_MODE, DISPLAY_DELAY, DISPLAY_DELAY_ENABLE}, + {0}, + msm_vidc_adjust_output_order, msm_vidc_set_u32}, + + {INPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL, + DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT, + 1, DEFAULT_MAX_HOST_BUF_COUNT, + 0, + HFI_PROP_BUFFER_HOST_MAX_COUNT, + CAP_FLAG_INPUT_PORT, + {0}, {0}, + msm_vidc_adjust_input_buf_host_max_count, msm_vidc_set_u32}, + + {INPUT_BUF_HOST_MAX_COUNT, ENC, H264|HEVC, + DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT, + 1, DEFAULT_MAX_HOST_BUF_COUNT, + 0, + HFI_PROP_BUFFER_HOST_MAX_COUNT, + CAP_FLAG_INPUT_PORT, + {SUPER_FRAME}, {0}, + msm_vidc_adjust_input_buf_host_max_count, msm_vidc_set_u32}, + + {OUTPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL, + DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT, + 1, DEFAULT_MAX_HOST_BUF_COUNT, + 0, + HFI_PROP_BUFFER_HOST_MAX_COUNT, + CAP_FLAG_OUTPUT_PORT, + {0}, {0}, + msm_vidc_adjust_output_buf_host_max_count, msm_vidc_set_u32}, + + {OUTPUT_BUF_HOST_MAX_COUNT, ENC, H264|HEVC, + DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT, + 1, DEFAULT_MAX_HOST_BUF_COUNT, + 0, + HFI_PROP_BUFFER_HOST_MAX_COUNT, + CAP_FLAG_OUTPUT_PORT, + {SUPER_FRAME}, {0}, + msm_vidc_adjust_output_buf_host_max_count, msm_vidc_set_u32}, /* conceal color */ {CONCEAL_COLOR_8BIT, DEC, CODECS_ALL, 0x0, 0xff3fcff, 1, DEFAULT_VIDEO_CONCEAL_COLOR_BLACK, V4L2_CID_MPEG_VIDEO_MUTE_YUV, HFI_PROP_CONCEAL_COLOR_8BIT, - CAP_FLAG_OUTPUT_PORT}, + CAP_FLAG_INPUT_PORT, + {0}, {0}, + NULL, msm_vidc_set_u32_packed}, {CONCEAL_COLOR_10BIT, DEC, CODECS_ALL, 0x0, 0x3fffffff, 1, DEFAULT_VIDEO_CONCEAL_COLOR_BLACK, V4L2_CID_MPEG_VIDEO_MUTE_YUV, HFI_PROP_CONCEAL_COLOR_10BIT, - CAP_FLAG_OUTPUT_PORT}, + CAP_FLAG_INPUT_PORT, + {0}, {0}, + NULL, msm_vidc_set_u32_packed}, // TODO {STAGE, DEC|ENC, CODECS_ALL, @@ -1355,7 +1412,10 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDC_THUMBNAIL_MODE, - HFI_PROP_THUMBNAIL_MODE}, + HFI_PROP_THUMBNAIL_MODE, + CAP_FLAG_INPUT_PORT, + {0}, {OUTPUT_ORDER}, + NULL, msm_vidc_set_u32}, {DEFAULT_HEADER, DEC, CODECS_ALL, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, @@ -1370,7 +1430,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { HFI_PROP_DEC_START_FROM_RAP_FRAME, CAP_FLAG_INPUT_PORT, {0}, {0}, - NULL, NULL}, + NULL, msm_vidc_set_u32}, {SEQ_CHANGE_AT_SYNC_FRAME, DEC, CODECS_ALL, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, diff --git a/driver/vidc/inc/msm_vidc_control.h b/driver/vidc/inc/msm_vidc_control.h index 1ae0cf5676..adef833ee2 100644 --- a/driver/vidc/inc/msm_vidc_control.h +++ b/driver/vidc/inc/msm_vidc_control.h @@ -25,6 +25,9 @@ int msm_vidc_adjust_use_ltr(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_mark_ltr(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_ir_random(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_delta_based_rc(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_output_order(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_input_buf_host_max_count(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_output_buf_host_max_count(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_transform_8x8(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_chroma_qp_index_offset(void *instance, struct v4l2_ctrl *ctrl); @@ -76,6 +79,8 @@ int msm_vidc_set_dynamic_layer_bitrate(void *instance, enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_u32(void *instance, enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_u32_packed(void *instance, + enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_u32_enum(void *instance, enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_constant_quality(void *instance, diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 3094898cae..4999e8d306 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -502,6 +502,9 @@ enum msm_vidc_inst_capability_type { BITRATE_BOOST, SLICE_MODE, BLUR_RESOLUTION, + OUTPUT_ORDER, + INPUT_BUF_HOST_MAX_COUNT, + OUTPUT_BUF_HOST_MAX_COUNT, /* place all leaf(no child) enums before this line */ INST_CAP_MAX, diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index a4ef832193..d53e7049b3 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -659,317 +659,6 @@ static int msm_vdec_set_colorformat(struct msm_vidc_inst *inst) return rc; } -static int msm_vdec_set_output_order(struct msm_vidc_inst *inst, - enum msm_vidc_port_type port) -{ - int rc = 0; - u32 output_order = 0; - - if (port != INPUT_PORT) { - i_vpr_e(inst, "%s: invalid port %d\n", __func__, port); - return -EINVAL; - } - - if (inst->capabilities->cap[THUMBNAIL_MODE].value || - (inst->capabilities->cap[DISPLAY_DELAY_ENABLE].value && - !inst->capabilities->cap[DISPLAY_DELAY].value)) - output_order = 1; - - i_vpr_h(inst, "%s: output order: %d", __func__, output_order); - rc = venus_hfi_session_property(inst, - HFI_PROP_DECODE_ORDER_OUTPUT, - HFI_HOST_FLAGS_NONE, - get_hfi_port(inst, port), - HFI_PAYLOAD_U32, - &output_order, - sizeof(u32)); - if (rc) { - i_vpr_e(inst, "%s: set property failed\n", __func__); - return rc; - } - - return rc; -} - -static int msm_vdec_set_rap_frame(struct msm_vidc_inst *inst, - enum msm_vidc_port_type port) -{ - int rc = 0; - u32 rap_frame = true; - - if (port != INPUT_PORT) { - i_vpr_e(inst, "%s: invalid port %d\n", __func__, port); - return -EINVAL; - } - - rap_frame = inst->capabilities->cap[RAP_FRAME].value; - i_vpr_h(inst, "%s: start from rap frame: %d", __func__, rap_frame); - rc = venus_hfi_session_property(inst, - HFI_PROP_DEC_START_FROM_RAP_FRAME, - HFI_HOST_FLAGS_NONE, - get_hfi_port(inst, port), - HFI_PAYLOAD_U32, - &rap_frame, - sizeof(u32)); - if (rc) { - i_vpr_e(inst, "%s: set property failed\n", __func__); - return rc; - } - - return rc; -} - -static int msm_vdec_set_thumbnail_mode(struct msm_vidc_inst *inst, - enum msm_vidc_port_type port) -{ - int rc = 0; - u32 thumbnail_mode = 0; - - if (port != INPUT_PORT) { - i_vpr_e(inst, "%s: invalid port %d\n", __func__, port); - return -EINVAL; - } - - thumbnail_mode = inst->capabilities->cap[THUMBNAIL_MODE].value; - i_vpr_h(inst, "%s: thumbnail mode: %d", __func__, thumbnail_mode); - rc = venus_hfi_session_property(inst, - HFI_PROP_THUMBNAIL_MODE, - HFI_HOST_FLAGS_NONE, - get_hfi_port(inst, port), - HFI_PAYLOAD_U32, - &thumbnail_mode, - sizeof(u32)); - if (rc) { - i_vpr_e(inst, "%s: set property failed\n", __func__); - return rc; - } - - return rc; -} - -static int msm_vdec_set_conceal_color_8bit(struct msm_vidc_inst *inst, - enum msm_vidc_port_type port) -{ - int rc = 0; - u32 conceal_color_8bit; - - if (port != INPUT_PORT) { - i_vpr_e(inst, "%s: invalid port %d\n", __func__, port); - return -EINVAL; - } - - conceal_color_8bit = inst->capabilities->cap[CONCEAL_COLOR_8BIT].value; - i_vpr_h(inst, "%s: conceal color 8bit: %#x", - __func__, conceal_color_8bit); - rc = venus_hfi_session_property(inst, - HFI_PROP_CONCEAL_COLOR_8BIT, - HFI_HOST_FLAGS_NONE, - get_hfi_port(inst, port), - HFI_PAYLOAD_32_PACKED, - &conceal_color_8bit, - sizeof(u32)); - if (rc) { - i_vpr_e(inst, "%s: set property failed\n", __func__); - return rc; - } - - return rc; -} - -static int msm_vdec_set_conceal_color_10bit(struct msm_vidc_inst *inst, - enum msm_vidc_port_type port) -{ - int rc = 0; - u32 conceal_color_10bit; - - if (port != INPUT_PORT) { - i_vpr_e(inst, "%s: invalid port %d\n", __func__, port); - return -EINVAL; - } - - conceal_color_10bit = inst->capabilities->cap[CONCEAL_COLOR_10BIT].value; - i_vpr_h(inst, "%s: conceal color 10bit: %#x", - __func__, conceal_color_10bit); - rc = venus_hfi_session_property(inst, - HFI_PROP_CONCEAL_COLOR_10BIT, - HFI_HOST_FLAGS_NONE, - get_hfi_port(inst, port), - HFI_PAYLOAD_32_PACKED, - &conceal_color_10bit, - sizeof(u32)); - if (rc) { - i_vpr_e(inst, "%s: set property failed\n", __func__); - return rc; - } - - return rc; -} - -static int msm_vdec_set_host_max_buf_count(struct msm_vidc_inst *inst, - enum msm_vidc_port_type port) -{ - int rc = 0; - u32 count = DEFAULT_MAX_HOST_BUF_COUNT; - - if (is_image_session(inst)) - count = DEFAULT_MAX_HOST_BURST_BUF_COUNT; - - i_vpr_h(inst, "%s: count: %u port: %u\n", __func__, count, port); - rc = venus_hfi_session_property(inst, - HFI_PROP_BUFFER_HOST_MAX_COUNT, - HFI_HOST_FLAGS_NONE, - get_hfi_port(inst, port), - HFI_PAYLOAD_U32, - &count, - sizeof(u32)); - if (rc) { - i_vpr_e(inst, "%s: set property failed\n", __func__); - return rc; - } - - return 0; -} - -static int msm_vdec_set_av1_bitstream_format(struct msm_vidc_inst *inst, - enum msm_vidc_port_type port) -{ - int rc = 0; - u32 annex_b; - - if (inst->codec != MSM_VIDC_AV1) - return 0; - - if (inst->capabilities->cap[WITHOUT_STARTCODE].value) { - i_vpr_e(inst, - "%s: Annex-B format is not supported\n", __func__); - return -EINVAL; - } - - annex_b = 0; - i_vpr_h(inst, "%s: annex_b: %u\n", __func__, annex_b); - rc = venus_hfi_session_property(inst, - HFI_PROP_NAL_LENGTH_FIELD, - HFI_HOST_FLAGS_NONE, - get_hfi_port(inst, port), - HFI_PAYLOAD_U32, - &annex_b, - sizeof(u32)); - if (rc) { - i_vpr_e(inst, "%s: set property failed\n", __func__); - return rc; - } - - return rc; -} - -static int msm_vdec_set_av1_operating_point(struct msm_vidc_inst *inst, - enum msm_vidc_port_type port) -{ - int rc = 0; - u32 op_point; - - if (inst->codec != MSM_VIDC_AV1) - return 0; - - op_point = inst->capabilities->cap[ENH_LAYER_COUNT].value; - i_vpr_h(inst, "%s: op_point: %u\n", __func__, op_point); - rc = venus_hfi_session_property(inst, - HFI_PROP_AV1_OP_POINT, - HFI_HOST_FLAGS_NONE, - get_hfi_port(inst, port), - HFI_PAYLOAD_U32, - &op_point, - sizeof(u32)); - if (rc) { - i_vpr_e(inst, "%s: set property failed\n", __func__); - return rc; - } - - return rc; -} - -static int msm_vdec_set_av1_drap_config(struct msm_vidc_inst *inst, - enum msm_vidc_port_type port) -{ - int rc = 0; - u32 drap_config; - - if (inst->codec != MSM_VIDC_AV1) - return 0; - - drap_config = inst->capabilities->cap[DRAP].value; - i_vpr_h(inst, "%s: drap_config: %u\n", __func__, drap_config); - rc = venus_hfi_session_property(inst, - HFI_PROP_AV1_DRAP_CONFIG, - HFI_HOST_FLAGS_NONE, - get_hfi_port(inst, port), - HFI_PAYLOAD_U32, - &drap_config, - sizeof(u32)); - if (rc) { - i_vpr_e(inst, "%s: set property failed\n", __func__); - return rc; - } - - return rc; -} - -static int msm_vdec_set_input_properties(struct msm_vidc_inst *inst) -{ - int rc = 0; - - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - rc = msm_vidc_set_stage(inst, STAGE); - if (rc) - return rc; - - rc = msm_vidc_set_pipe(inst, PIPE); - if (rc) - return rc; - - rc = msm_vdec_set_output_order(inst, INPUT_PORT); - if (rc) - return rc; - - rc = msm_vdec_set_thumbnail_mode(inst, INPUT_PORT); - if (rc) - return rc; - - rc = msm_vdec_set_rap_frame(inst, INPUT_PORT); - if (rc) - return rc; - - rc = msm_vdec_set_conceal_color_8bit(inst, INPUT_PORT); - if (rc) - return rc; - - rc = msm_vdec_set_conceal_color_10bit(inst, INPUT_PORT); - if (rc) - return rc; - - rc = msm_vdec_set_host_max_buf_count(inst, INPUT_PORT); - if (rc) - return rc; - - rc = msm_vdec_set_av1_bitstream_format(inst, INPUT_PORT); - if (rc) - return rc; - - rc = msm_vdec_set_av1_operating_point(inst, INPUT_PORT); - if (rc) - return rc; - - rc = msm_vdec_set_av1_drap_config(inst, INPUT_PORT); - if (rc) - return rc; - - return rc; -} - static int msm_vdec_set_output_properties(struct msm_vidc_inst *inst) { int rc = 0; @@ -991,10 +680,6 @@ static int msm_vdec_set_output_properties(struct msm_vidc_inst *inst) if (rc) return rc; - rc = msm_vdec_set_host_max_buf_count(inst, OUTPUT_PORT); - if (rc) - return rc; - rc = msm_vidc_set_session_priority(inst, PRIORITY); if (rc) return rc; @@ -1730,7 +1415,7 @@ int msm_vdec_streamon_input(struct msm_vidc_inst *inst) if (rc) goto error; - rc = msm_vdec_set_input_properties(inst); + rc = msm_vidc_adjust_set_v4l2_properties(inst); if (rc) goto error; diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index aaf50ea590..d304316c99 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -22,14 +22,12 @@ static const u32 msm_venc_input_set_prop[] = { HFI_PROP_COLOR_FORMAT, HFI_PROP_RAW_RESOLUTION, HFI_PROP_LINEAR_STRIDE_SCANLINE, - HFI_PROP_BUFFER_HOST_MAX_COUNT, HFI_PROP_SIGNAL_COLOR_INFO, }; static const u32 msm_venc_output_set_prop[] = { HFI_PROP_BITSTREAM_RESOLUTION, HFI_PROP_CROP_OFFSETS, - HFI_PROP_BUFFER_HOST_MAX_COUNT, HFI_PROP_CSC, }; @@ -287,28 +285,6 @@ static int msm_venc_set_crop_offsets(struct msm_vidc_inst *inst, return 0; } -static int msm_venc_set_host_max_buf_count(struct msm_vidc_inst *inst, - enum msm_vidc_port_type port) -{ - int rc = 0; - u32 count = DEFAULT_MAX_HOST_BUF_COUNT; - - if (msm_vidc_is_super_buffer(inst) || is_image_session(inst)) - count = DEFAULT_MAX_HOST_BURST_BUF_COUNT; - - i_vpr_h(inst, "%s: count: %u port: %u\n", __func__, count, port); - rc = venus_hfi_session_property(inst, - HFI_PROP_BUFFER_HOST_MAX_COUNT, - HFI_HOST_FLAGS_NONE, - get_hfi_port(inst, port), - HFI_PAYLOAD_U32, - &count, - sizeof(u32)); - if (rc) - return rc; - return 0; -} - static int msm_venc_set_colorspace(struct msm_vidc_inst* inst, enum msm_vidc_port_type port) { @@ -456,7 +432,6 @@ static int msm_venc_set_input_properties(struct msm_vidc_inst *inst) {HFI_PROP_COLOR_FORMAT, msm_venc_set_colorformat }, {HFI_PROP_RAW_RESOLUTION, msm_venc_set_raw_resolution }, {HFI_PROP_LINEAR_STRIDE_SCANLINE, msm_venc_set_stride_scanline }, - {HFI_PROP_BUFFER_HOST_MAX_COUNT, msm_venc_set_host_max_buf_count }, {HFI_PROP_SIGNAL_COLOR_INFO, msm_venc_set_colorspace }, }; @@ -493,7 +468,6 @@ static int msm_venc_set_output_properties(struct msm_vidc_inst *inst) static const struct msm_venc_prop_type_handle prop_type_handle_arr[] = { {HFI_PROP_BITSTREAM_RESOLUTION, msm_venc_set_bitstream_resolution }, {HFI_PROP_CROP_OFFSETS, msm_venc_set_crop_offsets }, - {HFI_PROP_BUFFER_HOST_MAX_COUNT, msm_venc_set_host_max_buf_count }, {HFI_PROP_CSC, msm_venc_set_csc }, }; diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 0c22c48099..990fff35c5 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -1071,6 +1071,7 @@ int msm_v4l2_op_s_ctrl(struct v4l2_ctrl *ctrl) struct msm_vidc_inst *inst; enum msm_vidc_inst_capability_type cap_id; struct msm_vidc_inst_capability *capability; + u32 port; if (!ctrl) { d_vpr_e("%s: invalid ctrl parameter\n", __func__); @@ -1113,7 +1114,9 @@ int msm_v4l2_op_s_ctrl(struct v4l2_ctrl *ctrl) /* mark client set flag */ capability->cap[cap_id].flags |= CAP_FLAG_CLIENT_SET; - if (!inst->bufq[OUTPUT_PORT].vb2q->streaming) { + + port = is_encode_session(inst) ? OUTPUT_PORT : INPUT_PORT; + if (!inst->bufq[port].vb2q->streaming) { /* static case */ rc = msm_vidc_update_static_property(inst, cap_id, ctrl); if (rc) @@ -1449,6 +1452,87 @@ int msm_vidc_adjust_delta_based_rc(void *instance, struct v4l2_ctrl *ctrl) return 0; } +int msm_vidc_adjust_output_order(void *instance, struct v4l2_ctrl *ctrl) +{ + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + struct msm_vidc_inst_capability *capability; + s32 tn_mode = -1, display_delay = -1, display_delay_enable = -1; + u32 adjusted_value; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + adjusted_value = ctrl ? ctrl->val : + capability->cap[OUTPUT_ORDER].value; + + if (msm_vidc_get_parent_value(inst, OUTPUT_ORDER, THUMBNAIL_MODE, + &tn_mode, __func__) || + msm_vidc_get_parent_value(inst, OUTPUT_ORDER, DISPLAY_DELAY, + &display_delay, __func__) || + msm_vidc_get_parent_value(inst, OUTPUT_ORDER, DISPLAY_DELAY_ENABLE, + &display_delay_enable, __func__)) + return -EINVAL; + + if (tn_mode || (display_delay_enable && !display_delay)) + adjusted_value = 1; + + msm_vidc_update_cap_value(inst, OUTPUT_ORDER, + adjusted_value, __func__); + + return 0; +} + +int msm_vidc_adjust_input_buf_host_max_count(void *instance, struct v4l2_ctrl *ctrl) +{ + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + struct msm_vidc_inst_capability *capability; + u32 adjusted_value; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + adjusted_value = ctrl ? ctrl->val : + capability->cap[INPUT_BUF_HOST_MAX_COUNT].value; + + if (msm_vidc_is_super_buffer(inst) || is_image_session(inst)) + adjusted_value = DEFAULT_MAX_HOST_BURST_BUF_COUNT; + + msm_vidc_update_cap_value(inst, INPUT_BUF_HOST_MAX_COUNT, + adjusted_value, __func__); + + return 0; +} + +int msm_vidc_adjust_output_buf_host_max_count(void *instance, struct v4l2_ctrl *ctrl) +{ + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + struct msm_vidc_inst_capability *capability; + u32 adjusted_value; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + adjusted_value = ctrl ? ctrl->val : + capability->cap[OUTPUT_BUF_HOST_MAX_COUNT].value; + + if (msm_vidc_is_super_buffer(inst) || is_image_session(inst)) + adjusted_value = DEFAULT_MAX_HOST_BURST_BUF_COUNT; + + msm_vidc_update_cap_value(inst, OUTPUT_BUF_HOST_MAX_COUNT, + adjusted_value, __func__); + + return 0; +} + int msm_vidc_adjust_transform_8x8(void *instance, struct v4l2_ctrl *ctrl) { struct msm_vidc_inst_capability *capability; @@ -3887,6 +3971,34 @@ int msm_vidc_set_u32(void *instance, return rc; } +int msm_vidc_set_u32_packed(void *instance, + enum msm_vidc_inst_capability_type cap_id) +{ + int rc = 0; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; + u32 hfi_value; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (inst->capabilities->cap[cap_id].flags & CAP_FLAG_MENU) { + rc = msm_vidc_v4l2_menu_to_hfi(inst, cap_id, &hfi_value); + if (rc) + return -EINVAL; + } else { + hfi_value = inst->capabilities->cap[cap_id].value; + } + + rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_32_PACKED, + &hfi_value, sizeof(u32), __func__); + if (rc) + return rc; + + return rc; +} + int msm_vidc_set_u32_enum(void *instance, enum msm_vidc_inst_capability_type cap_id) { @@ -3981,6 +4093,7 @@ int msm_vidc_v4l2_to_hfi_enum(struct msm_vidc_inst *inst, case V4L2_CID_MPEG_VIDEO_AV1_PROFILE: case V4L2_CID_MPEG_VIDEO_HEVC_LEVEL: case V4L2_CID_MPEG_VIDEO_H264_LEVEL: + case V4L2_CID_MPEG_VIDEO_VP9_LEVEL: case V4L2_CID_MPEG_VIDEO_AV1_LEVEL: case V4L2_CID_MPEG_VIDEO_HEVC_TIER: case V4L2_CID_MPEG_VIDEO_AV1_TIER: diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 8ad81f1bd9..790aa09fcb 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -205,6 +205,9 @@ static const struct msm_vidc_cap_name cap_name_arr[] = { {BITRATE_BOOST, "BITRATE_BOOST" }, {SLICE_MODE, "SLICE_MODE" }, {BLUR_RESOLUTION, "BLUR_RESOLUTION" }, + {OUTPUT_ORDER, "OUTPUT_ORDER" }, + {INPUT_BUF_HOST_MAX_COUNT, "INPUT_BUF_HOST_MAX_COUNT" }, + {OUTPUT_BUF_HOST_MAX_COUNT, "OUTPUT_BUF_HOST_MAX_COUNT" }, {INST_CAP_MAX, "INST_CAP_MAX" }, }; From 53447b7da5820a866781b2ba1592e839dfbb82b7 Mon Sep 17 00:00:00 2001 From: Zhongbo Shi Date: Mon, 21 Feb 2022 15:17:46 +0800 Subject: [PATCH 0558/1061] video: driver: disable auto frame rate for WFD Disable auto frame rate when time delta based RC is disabled for WFD encoders. Change-Id: I40dcf7700cfcc0de2538b43f7ede4a168e452310 Signed-off-by: Zhongbo Shi --- driver/vidc/src/msm_vidc_driver.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 8ad81f1bd9..b3306e131e 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -2277,7 +2277,8 @@ int msm_vidc_set_auto_framerate(struct msm_vidc_inst *inst, u64 timestamp) core = inst->core; if (!core->capabilities[ENC_AUTO_FRAMERATE].value || - is_image_session(inst) || msm_vidc_is_super_buffer(inst)) + is_image_session(inst) || msm_vidc_is_super_buffer(inst) || + !inst->capabilities->cap[TIME_DELTA_BASED_RC].value) goto exit; rc = msm_vidc_update_timestamp(inst, timestamp); From ad541ef5fed3eb2a6feaa8a41ea58912ef33c008 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Thu, 10 Mar 2022 12:56:52 -0800 Subject: [PATCH 0559/1061] video: driver: avoid uninitialized variable usage Initialize the fence variable to avoid uninitialized variable usage. Change-Id: I452a12d7dcb7b5778eeee159c96441ae13ed0413 Signed-off-by: Akshata Sahukar --- driver/vidc/src/msm_vidc_driver.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 8ad81f1bd9..4761ff6fb9 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -3289,7 +3289,7 @@ int msm_vidc_queue_buffer_single(struct msm_vidc_inst *inst, struct vb2_buffer * { int rc = 0; struct msm_vidc_buffer *buf; - struct msm_vidc_fence *fence; + struct msm_vidc_fence *fence = NULL; enum msm_vidc_allow allow; if (!inst || !vb2 || !inst->capabilities) { @@ -3329,7 +3329,8 @@ int msm_vidc_queue_buffer_single(struct msm_vidc_inst *inst, struct vb2_buffer * exit: if (rc) { i_vpr_e(inst, "%s: qbuf failed\n", __func__); - msm_vidc_fence_destroy(inst, fence); + if (fence) + msm_vidc_fence_destroy(inst, fence); } return rc; } From 9e1771a0747fb2ba34f57d5887a27ec0fe9c6f3d Mon Sep 17 00:00:00 2001 From: Mahesh Kumar Sharma Date: Tue, 8 Mar 2022 16:24:25 -0800 Subject: [PATCH 0560/1061] video: driver: disable 100ms VBV delay and adaptive blur Disable 100ms VBV delay and apaptive blur. Change-Id: I7a2daa0636dead60d4ceeff9078563ec5f4572a9 Signed-off-by: Mahesh Kumar Sharma --- driver/platform/diwali/src/msm_vidc_diwali.c | 45 ++++++-------------- driver/platform/kalama/src/msm_vidc_kalama.c | 8 ++-- driver/platform/waipio/src/msm_vidc_waipio.c | 6 ++- 3 files changed, 21 insertions(+), 38 deletions(-) diff --git a/driver/platform/diwali/src/msm_vidc_diwali.c b/driver/platform/diwali/src/msm_vidc_diwali.c index 7c6c89fe08..264895ce88 100644 --- a/driver/platform/diwali/src/msm_vidc_diwali.c +++ b/driver/platform/diwali/src/msm_vidc_diwali.c @@ -591,20 +591,13 @@ static struct msm_platform_inst_capability instance_data_diwali_v0[] = { {ALL_INTRA}, msm_vidc_adjust_b_frame, msm_vidc_set_u32}, - {BLUR_TYPES, ENC, CODECS_ALL, - VIDC_BLUR_NONE, VIDC_BLUR_ADAPTIVE, 1, VIDC_BLUR_ADAPTIVE, - V4L2_CID_MPEG_VIDC_VIDEO_BLUR_TYPES, - HFI_PROP_BLUR_TYPES, - CAP_FLAG_OUTPUT_PORT, - {PIX_FMTS, BITRATE_MODE, CONTENT_ADAPTIVE_CODING}, - {BLUR_RESOLUTION}, - msm_vidc_adjust_blur_type, msm_vidc_set_u32_enum}, - {BLUR_TYPES, ENC, H264|HEVC, - VIDC_BLUR_NONE, VIDC_BLUR_ADAPTIVE, 1, VIDC_BLUR_ADAPTIVE, + VIDC_BLUR_NONE, VIDC_BLUR_ADAPTIVE, + BIT(VIDC_BLUR_NONE) | BIT(VIDC_BLUR_EXTERNAL) | BIT(VIDC_BLUR_ADAPTIVE), + VIDC_BLUR_ADAPTIVE, V4L2_CID_MPEG_VIDC_VIDEO_BLUR_TYPES, HFI_PROP_BLUR_TYPES, - CAP_FLAG_OUTPUT_PORT, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {PIX_FMTS, BITRATE_MODE, CONTENT_ADAPTIVE_CODING, MIN_QUALITY}, {BLUR_RESOLUTION}, msm_vidc_adjust_blur_type, msm_vidc_set_u32_enum}, @@ -2128,20 +2121,13 @@ static struct msm_platform_inst_capability instance_data_diwali_v1[] = { {ALL_INTRA}, msm_vidc_adjust_b_frame, msm_vidc_set_u32}, - {BLUR_TYPES, ENC, CODECS_ALL, - VIDC_BLUR_NONE, VIDC_BLUR_ADAPTIVE, 1, VIDC_BLUR_ADAPTIVE, - V4L2_CID_MPEG_VIDC_VIDEO_BLUR_TYPES, - HFI_PROP_BLUR_TYPES, - CAP_FLAG_OUTPUT_PORT, - {PIX_FMTS, BITRATE_MODE, CONTENT_ADAPTIVE_CODING}, - {BLUR_RESOLUTION}, - msm_vidc_adjust_blur_type, msm_vidc_set_u32_enum}, - {BLUR_TYPES, ENC, H264|HEVC, - VIDC_BLUR_NONE, VIDC_BLUR_ADAPTIVE, 1, VIDC_BLUR_ADAPTIVE, + VIDC_BLUR_NONE, VIDC_BLUR_ADAPTIVE, + BIT(VIDC_BLUR_NONE) | BIT(VIDC_BLUR_EXTERNAL) | BIT(VIDC_BLUR_ADAPTIVE), + VIDC_BLUR_ADAPTIVE, V4L2_CID_MPEG_VIDC_VIDEO_BLUR_TYPES, HFI_PROP_BLUR_TYPES, - CAP_FLAG_OUTPUT_PORT, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {PIX_FMTS, BITRATE_MODE, CONTENT_ADAPTIVE_CODING, MIN_QUALITY}, {BLUR_RESOLUTION}, msm_vidc_adjust_blur_type, msm_vidc_set_u32_enum}, @@ -3660,20 +3646,13 @@ static struct msm_platform_inst_capability instance_data_diwali_v2[] = { {ALL_INTRA}, msm_vidc_adjust_b_frame, msm_vidc_set_u32}, - {BLUR_TYPES, ENC, CODECS_ALL, - VIDC_BLUR_NONE, VIDC_BLUR_ADAPTIVE, 1, VIDC_BLUR_ADAPTIVE, - V4L2_CID_MPEG_VIDC_VIDEO_BLUR_TYPES, - HFI_PROP_BLUR_TYPES, - CAP_FLAG_OUTPUT_PORT, - {PIX_FMTS, BITRATE_MODE, CONTENT_ADAPTIVE_CODING}, - {BLUR_RESOLUTION}, - msm_vidc_adjust_blur_type, msm_vidc_set_u32_enum}, - {BLUR_TYPES, ENC, H264|HEVC, - VIDC_BLUR_NONE, VIDC_BLUR_ADAPTIVE, 1, VIDC_BLUR_ADAPTIVE, + VIDC_BLUR_NONE, VIDC_BLUR_ADAPTIVE, + BIT(VIDC_BLUR_NONE) | BIT(VIDC_BLUR_EXTERNAL) | BIT(VIDC_BLUR_ADAPTIVE), + VIDC_BLUR_ADAPTIVE, V4L2_CID_MPEG_VIDC_VIDEO_BLUR_TYPES, HFI_PROP_BLUR_TYPES, - CAP_FLAG_OUTPUT_PORT, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {PIX_FMTS, BITRATE_MODE, CONTENT_ADAPTIVE_CODING, MIN_QUALITY}, {BLUR_RESOLUTION}, msm_vidc_adjust_blur_type, msm_vidc_set_u32_enum}, diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index 88072a95f4..5e7cb0db88 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -515,10 +515,12 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { msm_vidc_adjust_b_frame, msm_vidc_set_u32}, {BLUR_TYPES, ENC, H264|HEVC, - VIDC_BLUR_NONE, VIDC_BLUR_ADAPTIVE, 1, VIDC_BLUR_ADAPTIVE, + VIDC_BLUR_NONE, VIDC_BLUR_EXTERNAL, + BIT(VIDC_BLUR_NONE) | BIT(VIDC_BLUR_EXTERNAL), + VIDC_BLUR_NONE, V4L2_CID_MPEG_VIDC_VIDEO_BLUR_TYPES, HFI_PROP_BLUR_TYPES, - CAP_FLAG_OUTPUT_PORT, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {PIX_FMTS, BITRATE_MODE, MIN_QUALITY}, {BLUR_RESOLUTION}, msm_vidc_adjust_blur_type, msm_vidc_set_u32_enum}, @@ -671,7 +673,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { msm_vidc_set_vbr_related_properties}, {VBV_DELAY, ENC, H264|HEVC, - 100, 300, 100, 300, + 200, 300, 100, 300, V4L2_CID_MPEG_VIDEO_VBV_DELAY, HFI_PROP_VBV_DELAY, CAP_FLAG_OUTPUT_PORT, diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 776f537418..e8b09805ff 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -469,10 +469,12 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { msm_vidc_adjust_b_frame, msm_vidc_set_u32}, {BLUR_TYPES, ENC, H264|HEVC, - VIDC_BLUR_NONE, VIDC_BLUR_ADAPTIVE, 1, VIDC_BLUR_ADAPTIVE, + VIDC_BLUR_NONE, VIDC_BLUR_ADAPTIVE, + BIT(VIDC_BLUR_NONE) | BIT(VIDC_BLUR_EXTERNAL) | BIT(VIDC_BLUR_ADAPTIVE), + VIDC_BLUR_ADAPTIVE, V4L2_CID_MPEG_VIDC_VIDEO_BLUR_TYPES, HFI_PROP_BLUR_TYPES, - CAP_FLAG_OUTPUT_PORT, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {PIX_FMTS, BITRATE_MODE, CONTENT_ADAPTIVE_CODING, MIN_QUALITY}, {BLUR_RESOLUTION}, msm_vidc_adjust_blur_type_iris2, msm_vidc_set_u32_enum}, From eef358cf9ceda2e798a038690a4ef73c66719ce7 Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Thu, 10 Mar 2022 16:59:31 -0800 Subject: [PATCH 0561/1061] video: driver: request api fixes for v4l2-compliance - add support for prepare_buf - check if client has configured invalid fd for metadata buffer fd control. Change-Id: I576d02be05e4692a5ab45286895c34284f08651c Signed-off-by: Darshana Patil --- driver/platform/kalama/src/msm_vidc_kalama.c | 2 +- driver/platform/waipio/src/msm_vidc_waipio.c | 2 +- driver/vidc/inc/msm_vidc.h | 2 ++ driver/vidc/inc/msm_vidc_driver.h | 2 +- driver/vidc/inc/msm_vidc_v4l2.h | 2 ++ driver/vidc/src/msm_vidc.c | 29 ++++++++++++++++++++ driver/vidc/src/msm_vidc_control.c | 6 ++++ driver/vidc/src/msm_vidc_driver.c | 4 +-- driver/vidc/src/msm_vidc_platform.c | 2 ++ driver/vidc/src/msm_vidc_v4l2.c | 29 +++++++++++++++++++- 10 files changed, 74 insertions(+), 6 deletions(-) diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index a7b2644996..12aed91f41 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -1616,7 +1616,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { msm_vidc_adjust_all_intra, NULL}, {INPUT_METADATA_FD, ENC|DEC, CODECS_ALL, - -1, INT_MAX, 1, -1, + INVALID_FD, INT_MAX, 1, INVALID_FD, V4L2_CID_MPEG_VIDC_INPUT_METADATA_FD, 0, CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 49d20188d5..9ad8d93c66 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -1474,7 +1474,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { msm_vidc_adjust_all_intra, NULL}, {INPUT_METADATA_FD, ENC|DEC, CODECS_ALL, - -1, INT_MAX, 1, -1, + INVALID_FD, INT_MAX, 1, INVALID_FD, V4L2_CID_MPEG_VIDC_INPUT_METADATA_FD, 0, CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, diff --git a/driver/vidc/inc/msm_vidc.h b/driver/vidc/inc/msm_vidc.h index 0e5c837798..8ba440ffa3 100644 --- a/driver/vidc/inc/msm_vidc.h +++ b/driver/vidc/inc/msm_vidc.h @@ -28,6 +28,8 @@ int msm_vidc_g_param(void *instance, struct v4l2_streamparm *sp); int msm_vidc_reqbufs(void *instance, struct v4l2_requestbuffers *b); int msm_vidc_querybuf(void *instance, struct v4l2_buffer *b); int msm_vidc_create_bufs(void *instance, struct v4l2_create_buffers *b); +int msm_vidc_prepare_buf(void *instance, struct media_device *mdev, + struct v4l2_buffer *b); int msm_vidc_release_buffer(void *instance, int buffer_type, unsigned int buffer_index); int msm_vidc_qbuf(void *instance, struct media_device *mdev, diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 698e6e08c1..0df8f601b0 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -450,7 +450,7 @@ bool res_is_less_than(u32 width, u32 height, bool res_is_less_than_or_equal_to(u32 width, u32 height, u32 ref_width, u32 ref_height); int msm_vidc_get_properties(struct msm_vidc_inst *inst); -int msm_vidc_create_input_metadata_buffer(struct msm_vidc_inst *inst, u32 buf_fd); +int msm_vidc_create_input_metadata_buffer(struct msm_vidc_inst *inst, int buf_fd); int msm_vidc_update_input_meta_buffer_index(struct msm_vidc_inst *inst, struct vb2_buffer *vb2); #endif // _MSM_VIDC_DRIVER_H_ diff --git a/driver/vidc/inc/msm_vidc_v4l2.h b/driver/vidc/inc/msm_vidc_v4l2.h index 877cf6bcde..f8748aa71c 100644 --- a/driver/vidc/inc/msm_vidc_v4l2.h +++ b/driver/vidc/inc/msm_vidc_v4l2.h @@ -38,6 +38,8 @@ int msm_v4l2_querybuf(struct file *file, void *fh, struct v4l2_buffer *b); int msm_v4l2_create_bufs(struct file *filp, void *fh, struct v4l2_create_buffers *b); +int msm_v4l2_prepare_buf(struct file *filp, void *fh, + struct v4l2_buffer *b); int msm_v4l2_qbuf(struct file *file, void *fh, struct v4l2_buffer *b); int msm_v4l2_dqbuf(struct file *file, void *fh, diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index b2a6441c58..07d128ff9d 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -474,6 +474,35 @@ exit: } EXPORT_SYMBOL(msm_vidc_create_bufs); +int msm_vidc_prepare_buf(void *instance, struct media_device *mdev, + struct v4l2_buffer *b) +{ + int rc = 0; + struct msm_vidc_inst *inst = instance; + struct vb2_queue *q; + + if (!inst || !inst->core || !b || !valid_v4l2_buffer(b, inst)) { + d_vpr_e("%s: invalid params %pK %pK\n", __func__, inst, b); + return -EINVAL; + } + + q = msm_vidc_get_vb2q(inst, b->type, __func__); + if (!q) { + rc = -EINVAL; + goto exit; + } + + rc = vb2_prepare_buf(q, mdev, b); + if (rc) { + i_vpr_e(inst, "%s: failed with %d\n", __func__, rc); + goto exit; + } + +exit: + return rc; +} +EXPORT_SYMBOL(msm_vidc_prepare_buf); + int msm_vidc_qbuf(void *instance, struct media_device *mdev, struct v4l2_buffer *b) { diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 990fff35c5..58a7916e04 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -1102,6 +1102,12 @@ int msm_v4l2_op_s_ctrl(struct v4l2_ctrl *ctrl) } if (ctrl->id == V4L2_CID_MPEG_VIDC_INPUT_METADATA_FD) { + if (ctrl->val == INVALID_FD || ctrl->val == INT_MAX) { + i_vpr_e(inst, + "%s: client configured invalid input metadata fd %d\n", + __func__, ctrl->val); + return 0; + } if (!capability->cap[INPUT_META_VIA_REQUEST].value) { i_vpr_e(inst, "%s: input metadata not enabled via request\n", __func__); diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 1f606f2b7f..6ff133c74f 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -6270,7 +6270,7 @@ int msm_vidc_get_properties(struct msm_vidc_inst *inst) return 0; } -int msm_vidc_create_input_metadata_buffer(struct msm_vidc_inst *inst, u32 fd) +int msm_vidc_create_input_metadata_buffer(struct msm_vidc_inst *inst, int fd) { int rc = 0; struct msm_vidc_buffer *buf = NULL; @@ -6282,7 +6282,7 @@ int msm_vidc_create_input_metadata_buffer(struct msm_vidc_inst *inst, u32 fd) return -EINVAL; } - if (fd <= 0) { + if (fd < 0) { i_vpr_e(inst, "%s: invalid input metadata buffer fd %d\n", __func__, fd); return -EINVAL; diff --git a/driver/vidc/src/msm_vidc_platform.c b/driver/vidc/src/msm_vidc_platform.c index d927a7c404..b6568cb598 100644 --- a/driver/vidc/src/msm_vidc_platform.c +++ b/driver/vidc/src/msm_vidc_platform.c @@ -62,6 +62,7 @@ static struct v4l2_ioctl_ops msm_v4l2_ioctl_ops_enc = { .vidioc_reqbufs = msm_v4l2_reqbufs, .vidioc_querybuf = msm_v4l2_querybuf, .vidioc_create_bufs = msm_v4l2_create_bufs, + .vidioc_prepare_buf = msm_v4l2_prepare_buf, .vidioc_qbuf = msm_v4l2_qbuf, .vidioc_dqbuf = msm_v4l2_dqbuf, .vidioc_streamon = msm_v4l2_streamon, @@ -101,6 +102,7 @@ static struct v4l2_ioctl_ops msm_v4l2_ioctl_ops_dec = { .vidioc_reqbufs = msm_v4l2_reqbufs, .vidioc_querybuf = msm_v4l2_querybuf, .vidioc_create_bufs = msm_v4l2_create_bufs, + .vidioc_prepare_buf = msm_v4l2_prepare_buf, .vidioc_qbuf = msm_v4l2_qbuf, .vidioc_dqbuf = msm_v4l2_dqbuf, .vidioc_streamon = msm_v4l2_streamon, diff --git a/driver/vidc/src/msm_vidc_v4l2.c b/driver/vidc/src/msm_vidc_v4l2.c index dfddd5f626..5a505a8062 100644 --- a/driver/vidc/src/msm_vidc_v4l2.c +++ b/driver/vidc/src/msm_vidc_v4l2.c @@ -371,6 +371,31 @@ unlock: return rc; } +int msm_v4l2_prepare_buf(struct file *filp, void *fh, + struct v4l2_buffer *b) +{ + struct msm_vidc_inst *inst = get_vidc_inst(filp, fh); + struct video_device *vdev = video_devdata(filp); + int rc = 0; + + inst = get_inst_ref(g_core, inst); + if (!inst) { + d_vpr_e("%s: invalid instance\n", __func__); + return -EINVAL; + } + + inst_lock(inst, __func__); + rc = msm_vidc_prepare_buf((void *)inst, vdev->v4l2_dev->mdev, b); + if (rc) + goto unlock; + +unlock: + inst_unlock(inst, __func__); + put_inst(inst); + + return rc; +} + int msm_v4l2_qbuf(struct file *filp, void *fh, struct v4l2_buffer *b) { @@ -748,17 +773,19 @@ unlock: int msm_v4l2_request_validate(struct media_request *req) { + d_vpr_l("%s()\n", __func__); return vb2_request_validate(req); } void msm_v4l2_request_queue(struct media_request *req) { + d_vpr_l("%s()\n", __func__); v4l2_m2m_request_queue(req); } void msm_v4l2_m2m_device_run(void *priv) { - d_vpr_l("%s: \n", __func__); + d_vpr_l("%s()\n", __func__); } void msm_v4l2_m2m_job_abort(void *priv) From 743df51b4bc848ba988c88b1e4d8462b65a9dcb0 Mon Sep 17 00:00:00 2001 From: Renjiang Han Date: Mon, 14 Mar 2022 17:59:51 +0800 Subject: [PATCH 0562/1061] video: driver: ts_reorder for negative timestamps The timestamp in the driver is stored in the U64 type, but if there is a negative value in the timestamp and the timestamp needs to be sorted, using the timestamp value directly to compare the size is to use the U64 type, which will turn the negative timestamp value into a very large positive timestamp value, resulting in the sorting result of timestamp is incorrect. Change-Id: I13ccdb2c0c4d7b4e32999c5e88092c636c1f0b69 Signed-off-by: Renjiang Han --- driver/vidc/inc/msm_vidc_internal.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 4999e8d306..51f8235125 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -879,7 +879,7 @@ struct msm_vidc_buffers { struct msm_vidc_sort { struct list_head list; - u64 val; + s64 val; }; struct msm_vidc_timestamp { From b2d8ec9191531673747df47bea63818c00835e27 Mon Sep 17 00:00:00 2001 From: Shrikara B Date: Tue, 15 Mar 2022 19:25:26 +0530 Subject: [PATCH 0563/1061] video: driver: convert ts scale before calculating auto framerate Convert the vb2 timestamp, which is in nanosec scale to microsec scale before calculating the auto framerate. Auto framerate calculation requires timestamp values in microsec to calculate the framerate correctly. Due to wrong timestamp scale, framerate of 0 was getting set to FW Change-Id: I49b8ae5cfb2ee89dd283f07a2643238989d43d0a Signed-off-by: Shrikara B --- driver/vidc/src/msm_vidc_vb2.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/driver/vidc/src/msm_vidc_vb2.c b/driver/vidc/src/msm_vidc_vb2.c index 38c32c2929..7b9d823376 100644 --- a/driver/vidc/src/msm_vidc_vb2.c +++ b/driver/vidc/src/msm_vidc_vb2.c @@ -407,7 +407,7 @@ void msm_vidc_buf_queue(struct vb2_buffer *vb2) } if (is_encode_session(inst) && vb2->type == INPUT_MPLANE) { - timestamp_us = vb2->timestamp; + timestamp_us = div_u64(vb2->timestamp, 1000); msm_vidc_set_auto_framerate(inst, timestamp_us); } inst->last_qbuf_time_ns = ktime_get_ns(); From 513e0c1c1b2acc6d75c11ecf16dd74d8d7d2d387 Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Tue, 15 Mar 2022 15:56:22 -0700 Subject: [PATCH 0564/1061] video: driver: fix streamon deadlock issue If client queues input buffers before streamon of input port, these buffers are not actually queued to driver but instead held in v4l2 framework. They are queued to driver when input port is streamed on. In this scenario when input port is streamed on, inst lock is acquired and as part of this call, vb2 startes queueing buffers to driver. During this enqueuing, buf_queue also tries to acquire inst lock which leads to deadlock. Hence fixed this issue by moving inst lock acquiring/releasing to start_streaming call for streamon and stop_streamping call for streamoff. Change-Id: I67ed28b4f270ea899c4ace88a368148848b31072 Signed-off-by: Darshana Patil --- driver/vidc/src/msm_vidc.c | 25 -------- driver/vidc/src/msm_vidc_v4l2.c | 17 ++--- driver/vidc/src/msm_vidc_vb2.c | 107 +++++++++++++++++++++++--------- 3 files changed, 83 insertions(+), 66 deletions(-) diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index 07d128ff9d..ccf61aefaa 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -571,14 +571,6 @@ int msm_vidc_streamon(void *instance, enum v4l2_buf_type type) return -EINVAL; } - if (!msm_vidc_allow_streamon(inst, type)) { - rc = -EBUSY; - goto exit; - } - rc = msm_vidc_state_change_streamon(inst, type); - if (rc) - goto exit; - port = v4l2_type_to_driver_port(inst, type, __func__); if (port < 0) { rc = -EINVAL; @@ -589,7 +581,6 @@ int msm_vidc_streamon(void *instance, enum v4l2_buf_type type) if (rc) { i_vpr_e(inst, "%s: vb2_streamon(%d) failed, %d\n", __func__, type, rc); - msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); goto exit; } @@ -603,27 +594,12 @@ int msm_vidc_streamoff(void *instance, enum v4l2_buf_type type) int rc = 0; struct msm_vidc_inst *inst = instance; int port; - enum msm_vidc_allow allow; if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - allow = msm_vidc_allow_streamoff(inst, type); - if (allow == MSM_VIDC_DISALLOW) { - rc = -EBUSY; - goto exit; - } else if (allow == MSM_VIDC_IGNORE) { - goto exit; - } else if (allow != MSM_VIDC_ALLOW) { - rc = -EINVAL; - goto exit; - } - rc = msm_vidc_state_change_streamoff(inst, type); - if (rc) - goto exit; - port = v4l2_type_to_driver_port(inst, type, __func__); if (port < 0) { rc = -EINVAL; @@ -634,7 +610,6 @@ int msm_vidc_streamoff(void *instance, enum v4l2_buf_type type) if (rc) { i_vpr_e(inst, "%s: vb2_streamoff(%d) failed, %d\n", __func__, type, rc); - msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); goto exit; } diff --git a/driver/vidc/src/msm_vidc_v4l2.c b/driver/vidc/src/msm_vidc_v4l2.c index 5a505a8062..809c1627ce 100644 --- a/driver/vidc/src/msm_vidc_v4l2.c +++ b/driver/vidc/src/msm_vidc_v4l2.c @@ -463,18 +463,11 @@ int msm_v4l2_streamon(struct file *filp, void *fh, return -EINVAL; } - inst_lock(inst, __func__); - if (is_session_error(inst)) { - i_vpr_e(inst, "%s: inst in error state\n", __func__); - rc = -EBUSY; - goto unlock; - } rc = msm_vidc_streamon((void *)inst, i); if (rc) - goto unlock; + goto exit; -unlock: - inst_unlock(inst, __func__); +exit: put_inst(inst); return rc; @@ -492,13 +485,11 @@ int msm_v4l2_streamoff(struct file *filp, void *fh, return -EINVAL; } - inst_lock(inst, __func__); rc = msm_vidc_streamoff((void *)inst, i); if (rc) - goto unlock; + goto exit; -unlock: - inst_unlock(inst, __func__); +exit: put_inst(inst); return rc; diff --git a/driver/vidc/src/msm_vidc_vb2.c b/driver/vidc/src/msm_vidc_vb2.c index 38c32c2929..388c42a12c 100644 --- a/driver/vidc/src/msm_vidc_vb2.c +++ b/driver/vidc/src/msm_vidc_vb2.c @@ -198,28 +198,48 @@ int msm_vidc_start_streaming(struct vb2_queue *q, unsigned int count) return -EINVAL; } inst = q->drv_priv; + inst = get_inst_ref(g_core, inst); if (!inst || !inst->core || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } + inst_lock(inst, __func__); + if (is_session_error(inst)) { + i_vpr_e(inst, "%s: inst in error state\n", __func__); + rc = -EBUSY; + goto unlock; + } + + if (!msm_vidc_allow_streamon(inst, q->type)) { + rc = -EBUSY; + goto unlock; + } + + rc = msm_vidc_state_change_streamon(inst, q->type); + if (rc) + goto unlock; + if (q->type == INPUT_META_PLANE && inst->capabilities->cap[INPUT_META_VIA_REQUEST].value) { i_vpr_e(inst, "%s: invalid input meta port start when request enabled\n", __func__); - return -EINVAL; + rc = -EINVAL; + goto unlock; } if (q->type == INPUT_META_PLANE || q->type == OUTPUT_META_PLANE) { i_vpr_h(inst, "%s: nothing to start on %s\n", __func__, v4l2_type_name(q->type)); - return 0; + rc = 0; + goto unlock; } if (!is_decode_session(inst) && !is_encode_session(inst)) { i_vpr_e(inst, "%s: invalid session %d\n", __func__, inst->domain); - return -EINVAL; + rc = -EINVAL; + goto unlock; } i_vpr_h(inst, "Streamon: %s\n", v4l2_type_name(q->type)); @@ -227,30 +247,30 @@ int msm_vidc_start_streaming(struct vb2_queue *q, unsigned int count) inst->once_per_session_set = true; rc = msm_vidc_prepare_dependency_list(inst); if (rc) - return rc; + goto unlock; rc = msm_vidc_session_set_codec(inst); if (rc) - return rc; + goto unlock; rc = msm_vidc_session_set_secure_mode(inst); if (rc) - return rc; + goto unlock; if (is_encode_session(inst)) { rc = msm_vidc_alloc_and_queue_session_internal_buffers(inst, MSM_VIDC_BUF_ARP); if (rc) - goto error; + goto unlock; } else if(is_decode_session(inst)) { rc = msm_vidc_session_set_default_header(inst); if (rc) - return rc; + goto unlock; rc = msm_vidc_alloc_and_queue_session_internal_buffers(inst, MSM_VIDC_BUF_PERSIST); if (rc) - goto error; + goto unlock; } } @@ -266,32 +286,32 @@ int msm_vidc_start_streaming(struct vb2_queue *q, unsigned int count) else if (is_encode_session(inst)) rc = msm_venc_streamon_input(inst); else - goto error; + goto unlock; } else if (q->type == OUTPUT_MPLANE) { if (is_decode_session(inst)) rc = msm_vdec_streamon_output(inst); else if (is_encode_session(inst)) rc = msm_venc_streamon_output(inst); else - goto error; + goto unlock; } else { i_vpr_e(inst, "%s: invalid type %d\n", __func__, q->type); - goto error; + goto unlock; } if (rc) - goto error; + goto unlock; /* print final buffer counts & size details */ msm_vidc_print_buffer_info(inst); buf_type = v4l2_type_to_driver(q->type, __func__); if (!buf_type) - goto error; + goto unlock; /* queue pending buffers */ rc = msm_vidc_queue_deferred_buffers(inst, buf_type); if (rc) - goto error; + goto unlock; /* initialize statistics timer(one time) */ if (!inst->stats.time_ms) @@ -300,47 +320,73 @@ int msm_vidc_start_streaming(struct vb2_queue *q, unsigned int count) /* schedule to print buffer statistics */ rc = schedule_stats_work(inst); if (rc) - goto error; + goto unlock; if ((q->type == INPUT_MPLANE && inst->bufq[OUTPUT_PORT].vb2q->streaming) || (q->type == OUTPUT_MPLANE && inst->bufq[INPUT_PORT].vb2q->streaming)) { rc = msm_vidc_get_properties(inst); if (rc) - goto error; + goto unlock; } i_vpr_h(inst, "Streamon: %s successful\n", v4l2_type_name(q->type)); +unlock: + if (rc) { + i_vpr_e(inst, "Streamon: %s failed\n", v4l2_type_name(q->type)); + msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); + } + inst_unlock(inst, __func__); + put_inst(inst); return rc; - -error: - i_vpr_e(inst, "Streamon: %s failed\n", v4l2_type_name(q->type)); - return -EINVAL; } void msm_vidc_stop_streaming(struct vb2_queue *q) { int rc = 0; struct msm_vidc_inst *inst; + enum msm_vidc_allow allow; if (!q || !q->drv_priv) { d_vpr_e("%s: invalid input, q = %pK\n", __func__, q); return; } inst = q->drv_priv; + inst = get_inst_ref(g_core, inst); if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return; } + + inst_lock(inst, __func__); if (q->type == INPUT_META_PLANE || q->type == OUTPUT_META_PLANE) { i_vpr_h(inst, "%s: nothing to stop on %s\n", __func__, v4l2_type_name(q->type)); - return; + rc = 0; + goto unlock; } + + allow = msm_vidc_allow_streamoff(inst, q->type); + if (allow == MSM_VIDC_DISALLOW) { + rc = -EBUSY; + goto unlock; + } else if (allow == MSM_VIDC_IGNORE) { + rc = 0; + goto unlock; + } else if (allow != MSM_VIDC_ALLOW) { + rc = -EINVAL; + goto unlock; + } + + rc = msm_vidc_state_change_streamoff(inst, q->type); + if (rc) + goto unlock; + if (!is_decode_session(inst) && !is_encode_session(inst)) { i_vpr_e(inst, "%s: invalid session %d\n", __func__, inst->domain); - return; + rc = -EINVAL; + goto unlock; } i_vpr_h(inst, "Streamoff: %s\n", v4l2_type_name(q->type)); @@ -356,20 +402,25 @@ void msm_vidc_stop_streaming(struct vb2_queue *q) rc = msm_venc_streamoff_output(inst); } else { i_vpr_e(inst, "%s: invalid type %d\n", __func__, q->type); - goto error; + rc = -EINVAL; + goto unlock; } if (rc) - goto error; + goto unlock; /* Input port streamoff - flush timestamps list*/ if (q->type == INPUT_MPLANE) msm_vidc_flush_ts(inst); i_vpr_h(inst, "Streamoff: %s successful\n", v4l2_type_name(q->type)); - return; -error: - i_vpr_e(inst, "Streamoff: %s failed\n", v4l2_type_name(q->type)); +unlock: + if (rc) { + i_vpr_e(inst, "Streamoff: %s failed\n", v4l2_type_name(q->type)); + msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); + } + inst_unlock(inst, __func__); + put_inst(inst); return; } From 3673cb87d1690bdf9c21c53d5f0f0c5db6b09b1e Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Wed, 16 Mar 2022 12:24:37 -0700 Subject: [PATCH 0565/1061] video: driver: update device capabilities add V4L2_CAP_VIDEO_M2M_MPLANE capability since driver supports both input and output ports. Change-Id: Ie43b21bbaa2fe995a946e4dbc7b6f03ece4dae23 Signed-off-by: Darshana Patil --- driver/vidc/src/msm_vidc_probe.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/driver/vidc/src/msm_vidc_probe.c b/driver/vidc/src/msm_vidc_probe.c index 5a84dddd6b..46edabf4d0 100644 --- a/driver/vidc/src/msm_vidc_probe.c +++ b/driver/vidc/src/msm_vidc_probe.c @@ -180,10 +180,8 @@ static int msm_vidc_register_video_device(struct msm_vidc_core *core, core->vdev[index].type = type; core->vdev[index].vdev.v4l2_dev = &core->v4l2_dev; core->vdev[index].vdev.device_caps = - V4L2_CAP_VIDEO_CAPTURE_MPLANE | - V4L2_CAP_VIDEO_OUTPUT_MPLANE | + V4L2_CAP_VIDEO_M2M_MPLANE | V4L2_CAP_META_CAPTURE | - V4L2_CAP_META_OUTPUT | V4L2_CAP_STREAMING; rc = video_register_device(&core->vdev[index].vdev, VFL_TYPE_VIDEO, nr); From 96358cee7d733e9f273619b5607f9836a5623ef6 Mon Sep 17 00:00:00 2001 From: Mihir Ganu Date: Wed, 16 Mar 2022 15:37:40 -0700 Subject: [PATCH 0566/1061] video: driver: Add support for AV1D IBC feature Add support for AV1D Intra-Block Copy (IBC) feature. This requires a dedicated internal buffer (HFI_BUFFER_IBC_AV1D), which was previously part of LINE buffer. A new internal buffer type called HFI_BUFFER_PARTIAL_DATA is introduced, and this buffer type holds HFI_BUFFER_IBC_AV1D for AV1D. HFI_BUFFER_PARTIAL_DATA is mapped to NON_SECURE_PIXEL context bank for non-secure and to SECURE_PIXEL context bank for secure use case. Change-Id: If7ae22495f9981f275d54acc342c25ccdfc0c7b9 Signed-off-by: Mihir Ganu --- driver/variant/iris3/inc/hfi_buffer_iris3.h | 18 +++++------ .../variant/iris3/src/msm_vidc_buffer_iris3.c | 30 ++++++++++++++++--- driver/vidc/inc/hfi_command.h | 25 ++++++++-------- driver/vidc/inc/msm_vidc_driver.h | 3 +- driver/vidc/inc/msm_vidc_inst.h | 3 ++ driver/vidc/inc/msm_vidc_internal.h | 1 + driver/vidc/src/hfi_packet.c | 5 ++++ driver/vidc/src/msm_vdec.c | 1 + driver/vidc/src/msm_vidc.c | 3 ++ driver/vidc/src/msm_vidc_buffer.c | 3 +- driver/vidc/src/msm_vidc_driver.c | 10 +++++++ driver/vidc/src/venus_hfi_response.c | 4 ++- 12 files changed, 78 insertions(+), 28 deletions(-) diff --git a/driver/variant/iris3/inc/hfi_buffer_iris3.h b/driver/variant/iris3/inc/hfi_buffer_iris3.h index ebfb6b8707..cba74afde9 100644 --- a/driver/variant/iris3/inc/hfi_buffer_iris3.h +++ b/driver/variant/iris3/inc/hfi_buffer_iris3.h @@ -1054,8 +1054,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ num_vpp_pipes) \ do \ { \ - HFI_U32 vpssLBSize, ibcBufSize, opbwr1BufSize, \ - opbwr8, opbwr10, ibc8, ibc10; \ + HFI_U32 vpssLBSize, opbwr1BufSize, opbwr8, opbwr10; \ _size = HFI_ALIGN(SIZE_AV1D_LB_FE_TOP_DATA(frame_width, frame_height), \ VENUS_DMA_ALIGNMENT) + \ HFI_ALIGN(SIZE_AV1D_LB_FE_TOP_CTRL(frame_width, frame_height), \ @@ -1086,13 +1085,14 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ SIZE_VPSS_LB(vpssLBSize, frame_width, frame_height, num_vpp_pipes); \ _size = HFI_ALIGN((_size + vpssLBSize), VENUS_DMA_ALIGNMENT); \ } \ - else \ - { \ - SIZE_AV1D_IBC_NV12_UBWC(ibc8, frame_width, frame_height); \ - SIZE_AV1D_IBC_TP10_UBWC(ibc10, frame_width, frame_height); \ - ibcBufSize = MAX(ibc8, ibc10); \ - _size = HFI_ALIGN((_size + ibcBufSize), VENUS_DMA_ALIGNMENT); \ - } \ + } while (0) + +#define HFI_BUFFER_IBC_AV1D(_size, frame_width, frame_height) \ + do { \ + HFI_U32 ibc8, ibc10; \ + SIZE_AV1D_IBC_NV12_UBWC(ibc8, frame_width, frame_height); \ + SIZE_AV1D_IBC_TP10_UBWC(ibc10, frame_width, frame_height); \ + _size = HFI_ALIGN(MAX(ibc8, ibc10), VENUS_DMA_ALIGNMENT); \ } while (0) #define AV1_CABAC_HDR_RATIO_HD_TOT 2 diff --git a/driver/variant/iris3/src/msm_vidc_buffer_iris3.c b/driver/variant/iris3/src/msm_vidc_buffer_iris3.c index 8cf777da6f..2ceb29e19e 100644 --- a/driver/variant/iris3/src/msm_vidc_buffer_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_buffer_iris3.c @@ -165,11 +165,9 @@ static u32 msm_vidc_decoder_line_size_iris3(struct msm_vidc_inst *inst) is_opb = false; /* * assume worst case, since color format is unknown at this - * time. The exception is AV1D, where line buffer size is larger - * in DPB-only mode. + * time. */ - if (inst->codec != MSM_VIDC_AV1) - is_opb = true; + is_opb = true; if (inst->decode_vpp_delay.enable) vpp_delay = inst->decode_vpp_delay.size; @@ -197,6 +195,28 @@ static u32 msm_vidc_decoder_line_size_iris3(struct msm_vidc_inst *inst) return size; } +static u32 msm_vidc_decoder_partial_data_size_iris3(struct msm_vidc_inst *inst) +{ + u32 size = 0; + u32 width, height; + struct v4l2_format *f; + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return size; + } + + f = &inst->fmts[INPUT_PORT]; + width = f->fmt.pix_mp.width; + height = f->fmt.pix_mp.height; + + if (inst->codec == MSM_VIDC_AV1) + HFI_BUFFER_IBC_AV1D(size, width, height); + + i_vpr_l(inst, "%s: size %d\n", __func__, size); + return size; +} + static u32 msm_vidc_decoder_persist_size_iris3(struct msm_vidc_inst *inst) { u32 size = 0; @@ -543,6 +563,7 @@ int msm_buffer_size_iris3(struct msm_vidc_inst *inst, {MSM_VIDC_BUF_LINE, msm_vidc_decoder_line_size_iris3 }, {MSM_VIDC_BUF_PERSIST, msm_vidc_decoder_persist_size_iris3 }, {MSM_VIDC_BUF_DPB, msm_vidc_decoder_dpb_size_iris3 }, + {MSM_VIDC_BUF_PARTIAL_DATA, msm_vidc_decoder_partial_data_size_iris3 }, }; static const struct msm_vidc_buf_type_handle enc_buf_type_handle[] = { {MSM_VIDC_BUF_INPUT, msm_vidc_encoder_input_size }, @@ -675,6 +696,7 @@ int msm_buffer_min_count_iris3(struct msm_vidc_inst *inst, case MSM_VIDC_BUF_PERSIST: case MSM_VIDC_BUF_ARP: case MSM_VIDC_BUF_VPSS: + case MSM_VIDC_BUF_PARTIAL_DATA: count = msm_vidc_internal_buffer_count(inst, buffer_type); break; case MSM_VIDC_BUF_DPB: diff --git a/driver/vidc/inc/hfi_command.h b/driver/vidc/inc/hfi_command.h index e7128f3ab9..b88f6571ae 100644 --- a/driver/vidc/inc/hfi_command.h +++ b/driver/vidc/inc/hfi_command.h @@ -88,18 +88,19 @@ enum hfi_packet_port_type { }; enum hfi_buffer_type { - HFI_BUFFER_BITSTREAM = 0x00000001, - HFI_BUFFER_RAW = 0x00000002, - HFI_BUFFER_METADATA = 0x00000003, - HFI_BUFFER_SUBCACHE = 0x00000004, - HFI_BUFFER_DPB = 0x00000006, - HFI_BUFFER_BIN = 0x00000007, - HFI_BUFFER_LINE = 0x00000008, - HFI_BUFFER_ARP = 0x00000009, - HFI_BUFFER_COMV = 0x0000000A, - HFI_BUFFER_NON_COMV = 0x0000000B, - HFI_BUFFER_PERSIST = 0x0000000C, - HFI_BUFFER_VPSS = 0x0000000D, + HFI_BUFFER_BITSTREAM = 0x00000001, + HFI_BUFFER_RAW = 0x00000002, + HFI_BUFFER_METADATA = 0x00000003, + HFI_BUFFER_SUBCACHE = 0x00000004, + HFI_BUFFER_PARTIAL_DATA = 0x00000005, + HFI_BUFFER_DPB = 0x00000006, + HFI_BUFFER_BIN = 0x00000007, + HFI_BUFFER_LINE = 0x00000008, + HFI_BUFFER_ARP = 0x00000009, + HFI_BUFFER_COMV = 0x0000000A, + HFI_BUFFER_NON_COMV = 0x0000000B, + HFI_BUFFER_PERSIST = 0x0000000C, + HFI_BUFFER_VPSS = 0x0000000D, }; enum hfi_buffer_host_flags { diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 698e6e08c1..855160a0ca 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -96,7 +96,8 @@ static inline is_internal_buffer(enum msm_vidc_buffer_type buffer_type) buffer_type == MSM_VIDC_BUF_LINE || buffer_type == MSM_VIDC_BUF_DPB || buffer_type == MSM_VIDC_BUF_PERSIST || - buffer_type == MSM_VIDC_BUF_VPSS; + buffer_type == MSM_VIDC_BUF_VPSS || + buffer_type == MSM_VIDC_BUF_PARTIAL_DATA; } static inline bool is_input_meta_enabled(struct msm_vidc_inst *inst) diff --git a/driver/vidc/inc/msm_vidc_inst.h b/driver/vidc/inc/msm_vidc_inst.h index 4a18c9cad0..934c0019e3 100644 --- a/driver/vidc/inc/msm_vidc_inst.h +++ b/driver/vidc/inc/msm_vidc_inst.h @@ -38,6 +38,7 @@ struct msm_vidc_allocations_info { struct msm_vidc_allocations dpb; struct msm_vidc_allocations persist; struct msm_vidc_allocations vpss; + struct msm_vidc_allocations partial_data; }; struct msm_vidc_mappings_info { @@ -53,6 +54,7 @@ struct msm_vidc_mappings_info { struct msm_vidc_mappings dpb; struct msm_vidc_mappings persist; struct msm_vidc_mappings vpss; + struct msm_vidc_mappings partial_data; }; struct msm_vidc_buffers_info { @@ -70,6 +72,7 @@ struct msm_vidc_buffers_info { struct msm_vidc_buffers dpb; struct msm_vidc_buffers persist; struct msm_vidc_buffers vpss; + struct msm_vidc_buffers partial_data; }; enum msm_vidc_inst_state { diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 4999e8d306..0d583ef151 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -178,6 +178,7 @@ enum msm_vidc_buffer_type { MSM_VIDC_BUF_DPB = 12, MSM_VIDC_BUF_PERSIST = 13, MSM_VIDC_BUF_VPSS = 14, + MSM_VIDC_BUF_PARTIAL_DATA = 15, }; /* always match with v4l2 flags V4L2_BUF_FLAG_* */ diff --git a/driver/vidc/src/hfi_packet.c b/driver/vidc/src/hfi_packet.c index d93b2e7458..ed97776f85 100644 --- a/driver/vidc/src/hfi_packet.c +++ b/driver/vidc/src/hfi_packet.c @@ -76,6 +76,7 @@ u32 get_hfi_port_from_buffer_type(struct msm_vidc_inst *inst, case MSM_VIDC_BUF_COMV: case MSM_VIDC_BUF_NON_COMV: case MSM_VIDC_BUF_LINE: + case MSM_VIDC_BUF_PARTIAL_DATA: hfi_port = HFI_PORT_BITSTREAM; break; case MSM_VIDC_BUF_OUTPUT: @@ -156,6 +157,8 @@ u32 hfi_buf_type_from_driver(enum msm_vidc_domain_type domain, return HFI_BUFFER_PERSIST; case MSM_VIDC_BUF_VPSS: return HFI_BUFFER_VPSS; + case MSM_VIDC_BUF_PARTIAL_DATA: + return HFI_BUFFER_PARTIAL_DATA; default: d_vpr_e("invalid buffer type %d\n", buffer_type); @@ -204,6 +207,8 @@ u32 hfi_buf_type_to_driver(enum msm_vidc_domain_type domain, return MSM_VIDC_BUF_PERSIST; case HFI_BUFFER_VPSS: return MSM_VIDC_BUF_VPSS; + case HFI_BUFFER_PARTIAL_DATA: + return MSM_VIDC_BUF_PARTIAL_DATA; default: d_vpr_e("invalid buffer type %d\n", buffer_type); diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index d53e7049b3..a4b1dd83cc 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -86,6 +86,7 @@ static const u32 msm_vdec_internal_buffer_type[] = { MSM_VIDC_BUF_COMV, MSM_VIDC_BUF_NON_COMV, MSM_VIDC_BUF_LINE, + MSM_VIDC_BUF_PARTIAL_DATA, }; struct msm_vdec_prop_type_handle { diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index b2a6441c58..b4736734da 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -908,6 +908,7 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) INIT_LIST_HEAD(&inst->buffers.dpb.list); INIT_LIST_HEAD(&inst->buffers.persist.list); INIT_LIST_HEAD(&inst->buffers.vpss.list); + INIT_LIST_HEAD(&inst->buffers.partial_data.list); INIT_LIST_HEAD(&inst->allocations.bin.list); INIT_LIST_HEAD(&inst->allocations.arp.list); INIT_LIST_HEAD(&inst->allocations.comv.list); @@ -916,6 +917,7 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) INIT_LIST_HEAD(&inst->allocations.dpb.list); INIT_LIST_HEAD(&inst->allocations.persist.list); INIT_LIST_HEAD(&inst->allocations.vpss.list); + INIT_LIST_HEAD(&inst->allocations.partial_data.list); INIT_LIST_HEAD(&inst->mappings.input.list); INIT_LIST_HEAD(&inst->mappings.input_meta.list); INIT_LIST_HEAD(&inst->mappings.output.list); @@ -928,6 +930,7 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) INIT_LIST_HEAD(&inst->mappings.dpb.list); INIT_LIST_HEAD(&inst->mappings.persist.list); INIT_LIST_HEAD(&inst->mappings.vpss.list); + INIT_LIST_HEAD(&inst->mappings.partial_data.list); INIT_LIST_HEAD(&inst->children_list); INIT_LIST_HEAD(&inst->firmware_list); INIT_LIST_HEAD(&inst->enc_input_crs); diff --git a/driver/vidc/src/msm_vidc_buffer.c b/driver/vidc/src/msm_vidc_buffer.c index e4adcfec42..97cef807d2 100644 --- a/driver/vidc/src/msm_vidc_buffer.c +++ b/driver/vidc/src/msm_vidc_buffer.c @@ -181,7 +181,8 @@ u32 msm_vidc_internal_buffer_count(struct msm_vidc_inst *inst, if (is_decode_session(inst)) { if (buffer_type == MSM_VIDC_BUF_BIN || buffer_type == MSM_VIDC_BUF_LINE || - buffer_type == MSM_VIDC_BUF_PERSIST) { + buffer_type == MSM_VIDC_BUF_PERSIST || + buffer_type == MSM_VIDC_BUF_PARTIAL_DATA) { count = 1; } else if (buffer_type == MSM_VIDC_BUF_COMV || buffer_type == MSM_VIDC_BUF_NON_COMV) { diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 1f606f2b7f..6df49e52a7 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -247,6 +247,7 @@ static const struct msm_vidc_buf_type_name buf_type_name_arr[] = { {MSM_VIDC_BUF_DPB, "DPB" }, {MSM_VIDC_BUF_PERSIST, "PERSIST" }, {MSM_VIDC_BUF_VPSS, "VPSS" }, + {MSM_VIDC_BUF_PARTIAL_DATA, "PARTIAL_DATA" }, }; const char *buf_name(enum msm_vidc_buffer_type type) @@ -983,6 +984,7 @@ u32 msm_vidc_get_buffer_region(struct msm_vidc_inst *inst, break; case MSM_VIDC_BUF_DPB: case MSM_VIDC_BUF_VPSS: + case MSM_VIDC_BUF_PARTIAL_DATA: region = MSM_VIDC_NON_SECURE_PIXEL; break; case MSM_VIDC_BUF_INPUT_META: @@ -1018,6 +1020,7 @@ u32 msm_vidc_get_buffer_region(struct msm_vidc_inst *inst, break; case MSM_VIDC_BUF_DPB: case MSM_VIDC_BUF_VPSS: + case MSM_VIDC_BUF_PARTIAL_DATA: region = MSM_VIDC_SECURE_PIXEL; break; case MSM_VIDC_BUF_BIN: @@ -1070,6 +1073,8 @@ struct msm_vidc_buffers *msm_vidc_get_buffers( return &inst->buffers.persist; case MSM_VIDC_BUF_VPSS: return &inst->buffers.vpss; + case MSM_VIDC_BUF_PARTIAL_DATA: + return &inst->buffers.partial_data; case MSM_VIDC_BUF_QUEUE: return NULL; default: @@ -1108,6 +1113,8 @@ struct msm_vidc_mappings *msm_vidc_get_mappings( return &inst->mappings.persist; case MSM_VIDC_BUF_VPSS: return &inst->mappings.vpss; + case MSM_VIDC_BUF_PARTIAL_DATA: + return &inst->mappings.partial_data; default: i_vpr_e(inst, "%s: invalid driver buffer type %d\n", func, buffer_type); @@ -1136,6 +1143,8 @@ struct msm_vidc_allocations *msm_vidc_get_allocations( return &inst->allocations.persist; case MSM_VIDC_BUF_VPSS: return &inst->allocations.vpss; + case MSM_VIDC_BUF_PARTIAL_DATA: + return &inst->allocations.partial_data; default: i_vpr_e(inst, "%s: invalid driver buffer type %d\n", func, buffer_type); @@ -5266,6 +5275,7 @@ void msm_vidc_destroy_buffers(struct msm_vidc_inst *inst) MSM_VIDC_BUF_DPB, MSM_VIDC_BUF_PERSIST, MSM_VIDC_BUF_VPSS, + MSM_VIDC_BUF_PARTIAL_DATA, }; int i; diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index 12bf81e170..6c2ec98fd8 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -169,7 +169,8 @@ bool is_valid_hfi_buffer_type(struct msm_vidc_inst *inst, buffer_type != HFI_BUFFER_LINE && buffer_type != HFI_BUFFER_DPB && buffer_type != HFI_BUFFER_PERSIST && - buffer_type != HFI_BUFFER_VPSS) { + buffer_type != HFI_BUFFER_VPSS && + buffer_type != HFI_BUFFER_PARTIAL_DATA) { i_vpr_e(inst, "%s: invalid buffer type %#x\n", func, buffer_type); return false; @@ -1217,6 +1218,7 @@ static int handle_session_buffer(struct msm_vidc_inst *inst, {HFI_BUFFER_NON_COMV, handle_release_internal_buffer }, {HFI_BUFFER_LINE, handle_release_internal_buffer }, {HFI_BUFFER_PERSIST, handle_release_internal_buffer }, + {HFI_BUFFER_PARTIAL_DATA, handle_release_internal_buffer }, }; static const struct msm_vidc_hfi_buffer_handle dec_output_hfi_handle[] = { {HFI_BUFFER_METADATA, handle_output_metadata_buffer }, From 8f45e56c576e599c340189626ee497300a23ec9c Mon Sep 17 00:00:00 2001 From: Deepa Guthyappa Madivalara Date: Thu, 17 Mar 2022 10:40:52 -0700 Subject: [PATCH 0567/1061] video: driver: remove support for diwali Diwali chipset is not supported on kernel 5.15, hence removing it. Change-Id: Ibeb69b5f6a4a5377a887c59d98f5571c971792bc Signed-off-by: Deepa Guthyappa Madivalara --- Kbuild | 10 - config/diwali_video.conf | 4 - config/diwali_video.h | 7 - driver/platform/diwali/inc/msm_vidc_diwali.h | 26 - driver/platform/diwali/src/msm_vidc_diwali.c | 5203 ------------------ driver/vidc/src/msm_vidc_platform.c | 23 - 6 files changed, 5273 deletions(-) delete mode 100644 config/diwali_video.conf delete mode 100644 config/diwali_video.h delete mode 100644 driver/platform/diwali/inc/msm_vidc_diwali.h delete mode 100644 driver/platform/diwali/src/msm_vidc_diwali.c diff --git a/Kbuild b/Kbuild index a5c21993d5..d636d128a5 100644 --- a/Kbuild +++ b/Kbuild @@ -8,12 +8,6 @@ LINUXINCLUDE += -include $(VIDEO_ROOT)/config/waipio_video.h \ -I$(VIDEO_ROOT)/driver/platform/waipio/inc endif -ifeq ($(CONFIG_ARCH_DIWALI), y) -include $(VIDEO_ROOT)/config/diwali_video.conf -LINUXINCLUDE += -include $(VIDEO_ROOT)/config/diwali_video.h \ - -I$(VIDEO_ROOT)/driver/platform/diwali/inc -endif - ifeq ($(CONFIG_ARCH_KALAMA), y) include $(VIDEO_ROOT)/config/kalama_video.conf LINUXINCLUDE += -include $(VIDEO_ROOT)/config/kalama_video.h \ @@ -37,10 +31,6 @@ ifeq ($(CONFIG_MSM_VIDC_KALAMA), y) msm_video-objs += driver/platform/kalama/src/msm_vidc_kalama.o endif -ifeq ($(CONFIG_MSM_VIDC_DIWALI), y) -msm_video-objs += driver/platform/diwali/src/msm_vidc_diwali.o -endif - ifeq ($(CONFIG_MSM_VIDC_IRIS2), y) LINUXINCLUDE += -I$(VIDEO_ROOT)/driver/variant/iris2/inc msm_video-objs += driver/variant/iris2/src/msm_vidc_buffer_iris2.o \ diff --git a/config/diwali_video.conf b/config/diwali_video.conf deleted file mode 100644 index 07ec494289..0000000000 --- a/config/diwali_video.conf +++ /dev/null @@ -1,4 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0-only - -export CONFIG_MSM_VIDC_DIWALI=y -export CONFIG_MSM_VIDC_IRIS2=y \ No newline at end of file diff --git a/config/diwali_video.h b/config/diwali_video.h deleted file mode 100644 index cc48c7248d..0000000000 --- a/config/diwali_video.h +++ /dev/null @@ -1,7 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. - */ - -#define CONFIG_MSM_VIDC_DIWALI 1 -#define CONFIG_MSM_VIDC_IRIS2 1 \ No newline at end of file diff --git a/driver/platform/diwali/inc/msm_vidc_diwali.h b/driver/platform/diwali/inc/msm_vidc_diwali.h deleted file mode 100644 index ce904fb52c..0000000000 --- a/driver/platform/diwali/inc/msm_vidc_diwali.h +++ /dev/null @@ -1,26 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved. - * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. - */ - -#ifndef _MSM_VIDC_DIWALI_H_ -#define _MSM_VIDC_DIWALI_H_ - -#include "msm_vidc_core.h" - -#if defined(CONFIG_MSM_VIDC_DIWALI) -int msm_vidc_init_platform_diwali(struct msm_vidc_core *core, struct device *dev); -int msm_vidc_deinit_platform_diwali(struct msm_vidc_core *core, struct device *dev); -#else -int msm_vidc_init_platform_diwali(struct msm_vidc_core *core, struct device *dev) -{ - return -EINVAL; -} -int msm_vidc_deinit_platform_diwali(struct msm_vidc_core *core, struct device *dev) -{ - return -EINVAL; -} -#endif - -#endif // _MSM_VIDC_DIWALI_H_ diff --git a/driver/platform/diwali/src/msm_vidc_diwali.c b/driver/platform/diwali/src/msm_vidc_diwali.c deleted file mode 100644 index 365374581b..0000000000 --- a/driver/platform/diwali/src/msm_vidc_diwali.c +++ /dev/null @@ -1,5203 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved. - * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. - */ - -#include -#include -#include - -#include "msm_vidc_diwali.h" -#include "msm_vidc_platform.h" -#include "msm_vidc_debug.h" -#include "msm_vidc_internal.h" -#include "msm_vidc_core.h" -#include "msm_vidc_control.h" -#include "hfi_property.h" -#include "msm_vidc_dt.h" - -#define DEFAULT_VIDEO_CONCEAL_COLOR_BLACK 0x8020010 -#define MINIMUM_FPS 1 -#define MAXIMUM_FPS 480 -#define MAXIMUM_FPS_V2 240 -#define MAX_LTR_FRAME_COUNT 2 -#define MAX_BASE_LAYER_PRIORITY_ID 63 -#define MIN_CHROMA_QP_OFFSET -12 -#define MAX_CHROMA_QP_OFFSET 0 -#define MAX_BITRATE 160000000 -#define MAX_BITRATE_V1 100000000 -#define DEFAULT_BITRATE 20000000 -#define MIN_QP_10BIT -12 -#define MIN_QP_8BIT 0 -#define MAX_QP 51 -#define DEFAULT_QP 20 -#define MAX_CONSTANT_QUALITY 100 -#define MIN_SLICE_BYTE_SIZE 512 -#define MAX_SLICE_BYTE_SIZE \ - ((MAX_BITRATE) >> 3) -#define MAX_SLICE_BYTE_SIZE_V1 \ - ((MAX_BITRATE_V1) >> 3) -#define MAX_SLICE_MB_SIZE \ - (((4096 + 15) >> 4) * ((2304 + 15) >> 4)) - -#define UBWC_CONFIG(mc, ml, hbb, bs1, bs2, bs3, bsp) \ -{ \ - .max_channels = mc, \ - .mal_length = ml, \ - .highest_bank_bit = hbb, \ - .bank_swzl_level = bs1, \ - .bank_swz2_level = bs2, \ - .bank_swz3_level = bs3, \ - .bank_spreading = bsp, \ -} - -#define EFUSE_ENTRY(sa, s, m, sh, p) \ -{ \ - .start_address = sa, \ - .size = s, \ - .mask = m, \ - .shift = sh, \ - .purpose = p \ -} - -#define DDR_TYPE_LPDDR4 0x6 -#define DDR_TYPE_LPDDR4X 0x7 -#define DDR_TYPE_LPDDR5 0x8 -#define DDR_TYPE_LPDDR5X 0x9 - -#define ENC MSM_VIDC_ENCODER -#define DEC MSM_VIDC_DECODER -#define H264 MSM_VIDC_H264 -#define HEVC MSM_VIDC_HEVC -#define VP9 MSM_VIDC_VP9 -#define HEIC MSM_VIDC_HEIC -#define CODECS_ALL (H264 | HEVC | VP9 | HEIC) - -static struct msm_platform_core_capability core_data_diwali_v0[] = { - /* {type, value} */ - {ENC_CODECS, H264|HEVC|HEIC}, - {DEC_CODECS, H264|HEVC|VP9|HEIC}, - {MAX_SESSION_COUNT, 16}, - {MAX_NUM_720P_SESSIONS, 16}, - {MAX_NUM_1080P_SESSIONS, 8}, - {MAX_NUM_4K_SESSIONS, 4}, - {MAX_NUM_8K_SESSIONS, 1}, - {MAX_SECURE_SESSION_COUNT, 3}, - {MAX_RT_MBPF, 138240}, /* ((8192x4320)/256) */ - {MAX_MBPF, 175104}, /* (8192x4320)/256 + (4096x2304)/256*/ - /* max_load 3840x2176@120fps which is greater than 7680x4320@30fps */ - /* Concurrency: UHD@30 decode + uhd@30 encode */ - {MAX_MBPS, 3916800}, - {MAX_IMAGE_MBPF, 1048576}, /* (16384x16384)/256 */ - {MAX_MBPF_HQ, 8160}, /* ((1920x1088)/256) */ - {MAX_MBPS_HQ, 244800}, /* ((1920x1088)/256)@30fps */ - {MAX_MBPF_B_FRAME, 32640}, /* 3840x2176/256 */ - {MAX_MBPS_B_FRAME, 979200}, /* 3840x2176/256 MBs@30fps */ - {MAX_MBPS_ALL_INTRA, 489600}, /* ((1920x1088)/256)@60fps */ - {MAX_ENH_LAYER_COUNT, 5}, - {NUM_VPP_PIPE, 2}, - {SW_PC, 1}, - {FW_UNLOAD, 0}, - {HW_RESPONSE_TIMEOUT, HW_RESPONSE_TIMEOUT_VALUE}, /* 1000 ms */ - {SW_PC_DELAY, SW_PC_DELAY_VALUE }, /* 1500 ms (>HW_RESPONSE_TIMEOUT)*/ - {FW_UNLOAD_DELAY, FW_UNLOAD_DELAY_VALUE }, /* 3000 ms (>SW_PC_DELAY)*/ - // TODO: review below entries, and if required rename as PREFETCH - {PREFIX_BUF_COUNT_PIX, 18}, - {PREFIX_BUF_SIZE_PIX, 13434880}, /* Calculated by VIDEO_RAW_BUFFER_SIZE for 4096x2160 UBWC */ - {PREFIX_BUF_COUNT_NON_PIX, 1}, - {PREFIX_BUF_SIZE_NON_PIX, 209715200}, /* - * Internal buffer size is calculated for secure decode session - * of resolution 4k (4096x2160) - * Internal buf size = calculate_scratch_size() + - * calculate_scratch1_size() + calculate_persist1_size() - * Take maximum between VP9 10bit, HEVC 10bit, AVC secure - * decoder sessions - */ - {PAGEFAULT_NON_FATAL, 1}, - {PAGETABLE_CACHING, 0}, - {DCVS, 1}, - {DECODE_BATCH, 1}, - {DECODE_BATCH_TIMEOUT, 200}, - {STATS_TIMEOUT_MS, 2000}, - {AV_SYNC_WINDOW_SIZE, 40}, - {NON_FATAL_FAULTS, 1}, - {ENC_AUTO_FRAMERATE, 1}, - {MMRM, 0}, -}; - -static struct msm_platform_core_capability core_data_diwali_v1[] = { - /* {type, value} */ - {ENC_CODECS, H264|HEVC|HEIC}, - {DEC_CODECS, H264|HEVC|VP9|HEIC}, - {MAX_SESSION_COUNT, 16}, - {MAX_NUM_720P_SESSIONS, 16}, - {MAX_NUM_1080P_SESSIONS, 8}, - {MAX_NUM_4K_SESSIONS, 4}, - {MAX_SECURE_SESSION_COUNT, 3}, - {MAX_RT_MBPF, 130560}, /* ((3840x2176)/256) x 4 */ - {MAX_MBPF, 147456}, /* ((4096x2304)/256) x 4 */ - /* Concurrency: UHD@30 decode + uhd@30 encode */ - {MAX_MBPS, 2211840}, /* max_load 4096x2304@60fps */ - {MAX_IMAGE_MBPF, 1048576}, /* (16384x16384)/256 */ - {MAX_MBPF_HQ, 8160}, /* ((1920x1088)/256) */ - {MAX_MBPS_HQ, 244800}, /* ((1920x1088)/256)@30fps */ - {MAX_MBPF_B_FRAME, 32640}, /* 3840x2176/256 */ - {MAX_MBPS_B_FRAME, 979200}, /* 3840x2176/256 MBs@30fps */ - {MAX_MBPS_ALL_INTRA, 489600}, /* ((1920x1088)/256)@60fps */ - {MAX_ENH_LAYER_COUNT, 5}, - {NUM_VPP_PIPE, 2}, - {SW_PC, 1}, - {FW_UNLOAD, 0}, - {HW_RESPONSE_TIMEOUT, HW_RESPONSE_TIMEOUT_VALUE}, /* 1000 ms */ - {SW_PC_DELAY, SW_PC_DELAY_VALUE }, /* 1500 ms (>HW_RESPONSE_TIMEOUT)*/ - {FW_UNLOAD_DELAY, FW_UNLOAD_DELAY_VALUE }, /* 3000 ms (>SW_PC_DELAY)*/ - // TODO: review below entries, and if required rename as PREFETCH - {PREFIX_BUF_COUNT_PIX, 18}, - {PREFIX_BUF_SIZE_PIX, 13434880}, /* Calculated by VIDEO_RAW_BUFFER_SIZE for 4096x2160 UBWC */ - {PREFIX_BUF_COUNT_NON_PIX, 1}, - {PREFIX_BUF_SIZE_NON_PIX, 209715200}, /* - * Internal buffer size is calculated for secure decode session - * of resolution 4k (4096x2160) - * Internal buf size = calculate_scratch_size() + - * calculate_scratch1_size() + calculate_persist1_size() - * Take maximum between VP9 10bit, HEVC 10bit, AVC secure - * decoder sessions - */ - {PAGEFAULT_NON_FATAL, 1}, - {PAGETABLE_CACHING, 0}, - {DCVS, 1}, - {DECODE_BATCH, 1}, - {DECODE_BATCH_TIMEOUT, 200}, - {STATS_TIMEOUT_MS, 2000}, - {AV_SYNC_WINDOW_SIZE, 40}, - {NON_FATAL_FAULTS, 1}, - {ENC_AUTO_FRAMERATE, 1}, - {MMRM, 0}, -}; - -static struct msm_platform_core_capability core_data_diwali_v2[] = { - /* {type, value} */ - {ENC_CODECS, H264|HEVC|HEIC}, - {DEC_CODECS, H264|HEVC|VP9|HEIC}, - {MAX_SESSION_COUNT, 16}, - {MAX_NUM_720P_SESSIONS, 16}, - {MAX_NUM_1080P_SESSIONS, 8}, - {MAX_NUM_4K_SESSIONS, 4}, - {MAX_SECURE_SESSION_COUNT, 3}, - {MAX_RT_MBPF, 97920}, /* ((3840x2176)/256) x 3 */ - {MAX_MBPF, 110592}, /* ((4096x2304)/256) x 3 */ - /* Concurrency: UHD@30 decode + 1080p@30 encode */ - {MAX_MBPS, 1105920}, /* max_load 4096x2304@30fps*/ - {MAX_IMAGE_MBPF, 1048576}, /* (16384x16384)/256 */ - {MAX_MBPF_HQ, 8160}, /* ((1920x1088)/256) */ - {MAX_MBPS_HQ, 244800}, /* ((1920x1088)/256)@30fps */ - {MAX_MBPF_B_FRAME, 32640}, /* 3840x2176/256 */ - {MAX_MBPS_B_FRAME, 979200}, /* 3840x2176/256 MBs@30fps */ - {MAX_MBPS_ALL_INTRA, 489600}, /* ((1920x1088)/256)@60fps */ - {MAX_ENH_LAYER_COUNT, 5}, - {NUM_VPP_PIPE, 2}, - {SW_PC, 1}, - {FW_UNLOAD, 0}, - {HW_RESPONSE_TIMEOUT, HW_RESPONSE_TIMEOUT_VALUE}, /* 1000 ms */ - {SW_PC_DELAY, SW_PC_DELAY_VALUE }, /* 1500 ms (>HW_RESPONSE_TIMEOUT)*/ - {FW_UNLOAD_DELAY, FW_UNLOAD_DELAY_VALUE }, /* 3000 ms (>SW_PC_DELAY)*/ - // TODO: review below entries, and if required rename as PREFETCH - {PREFIX_BUF_COUNT_PIX, 18}, - {PREFIX_BUF_SIZE_PIX, 13434880}, /* Calculated by VIDEO_RAW_BUFFER_SIZE for 4096x2160 UBWC */ - {PREFIX_BUF_COUNT_NON_PIX, 1}, - {PREFIX_BUF_SIZE_NON_PIX, 209715200}, /* - * Internal buffer size is calculated for secure decode session - * of resolution 4k (4096x2160) - * Internal buf size = calculate_scratch_size() + - * calculate_scratch1_size() + calculate_persist1_size() - * Take maximum between VP9 10bit, HEVC 10bit, AVC secure - * decoder sessions - */ - {PAGEFAULT_NON_FATAL, 1}, - {PAGETABLE_CACHING, 0}, - {DCVS, 1}, - {DECODE_BATCH, 0}, - {DECODE_BATCH_TIMEOUT, 200}, - {STATS_TIMEOUT_MS, 2000}, - {AV_SYNC_WINDOW_SIZE, 40}, - {NON_FATAL_FAULTS, 1}, - {ENC_AUTO_FRAMERATE, 1}, - {MMRM, 0}, -}; - -static struct msm_platform_inst_capability instance_data_diwali_v0[] = { - /* {cap, domain, codec, - * min, max, step_or_mask, value, - * v4l2_id, - * hfi_id, - * flags, - * parents, - * children, - * adjust, set} - */ - - {FRAME_WIDTH, DEC, CODECS_ALL, 96, 8192, 1, 1920}, - {FRAME_WIDTH, DEC, VP9, 96, 4096, 1, 1920}, - {FRAME_WIDTH, ENC, CODECS_ALL, 128, 4096, 1, 1920}, - {LOSSLESS_FRAME_WIDTH, ENC, H264|HEVC, 128, 4096, 1, 1920}, - {SECURE_FRAME_WIDTH, DEC, H264|HEVC|VP9, 96, 4096, 1, 1920}, - {SECURE_FRAME_WIDTH, ENC, H264|HEVC, 128, 4096, 1, 1920}, - {FRAME_HEIGHT, DEC, CODECS_ALL, 96, 8192, 1, 1080}, - {FRAME_HEIGHT, DEC, VP9, 96, 4096, 1, 1080}, - {FRAME_HEIGHT, ENC, CODECS_ALL, 128, 4096, 1, 1080}, - {LOSSLESS_FRAME_HEIGHT, ENC, H264|HEVC, 128, 4096, 1, 1080}, - {SECURE_FRAME_HEIGHT, DEC, H264|HEVC|VP9, 96, 4096, 1, 1080}, - {SECURE_FRAME_HEIGHT, ENC, H264|HEVC, 128, 4096, 1, 1080}, - {PIX_FMTS, ENC, H264, - MSM_VIDC_FMT_NV12, - MSM_VIDC_FMT_NV12C, - MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C, - /* Since CTSEncodeDecode test cannot handle BT 709LR, - * disabled HW RGBA encoding. - * | MSM_VIDC_FMT_RGBA8888 | MSM_VIDC_FMT_RGBA8888C, - */ - MSM_VIDC_FMT_NV12C, - 0, 0, - 0, - {0}, - {META_ROI_INFO}}, - {PIX_FMTS, ENC, HEVC, - MSM_VIDC_FMT_NV12, - MSM_VIDC_FMT_TP10C, - MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C | - MSM_VIDC_FMT_P010 | MSM_VIDC_FMT_TP10C, - /* Since CTSEncodeDecode test cannot handle BT 709LR, - * disabled HW RGBA encoding. - * | MSM_VIDC_FMT_RGBA8888 | MSM_VIDC_FMT_RGBA8888C, - */ - MSM_VIDC_FMT_NV12C, - 0, 0, - 0, - {0}, - {/* Do not change order of META_ROI_INFO, MIN_QUALITY, BLUR_TYPES - * Since parent -> children relationship for these cap_ids is - * as follows: - * META_ROI_INFO -> MIN_QUALITY -> BLUR_TYPES - */ - PROFILE, MIN_FRAME_QP, MAX_FRAME_QP, I_FRAME_QP, P_FRAME_QP, - B_FRAME_QP, META_ROI_INFO, MIN_QUALITY, BLUR_TYPES}}, - - {PIX_FMTS, DEC, HEVC|HEIC, - MSM_VIDC_FMT_NV12, - MSM_VIDC_FMT_TP10C, - MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C | - MSM_VIDC_FMT_P010 | MSM_VIDC_FMT_TP10C, - MSM_VIDC_FMT_NV12C, - 0, 0, - 0, - {0}, - {PROFILE}}, - - {PIX_FMTS, DEC, H264, - MSM_VIDC_FMT_NV12, - MSM_VIDC_FMT_NV12C, - MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C, - MSM_VIDC_FMT_NV12C}, - - {PIX_FMTS, DEC, VP9, - MSM_VIDC_FMT_NV12, - MSM_VIDC_FMT_TP10C, - MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C | - MSM_VIDC_FMT_P010 | MSM_VIDC_FMT_TP10C, - MSM_VIDC_FMT_NV12C}, - - {MIN_BUFFERS_INPUT, ENC|DEC, CODECS_ALL, 0, 64, 1, 4, - V4L2_CID_MIN_BUFFERS_FOR_OUTPUT}, - {MIN_BUFFERS_OUTPUT, ENC|DEC, CODECS_ALL, - 0, 64, 1, 4, - V4L2_CID_MIN_BUFFERS_FOR_CAPTURE, - HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT, - CAP_FLAG_OUTPUT_PORT}, - - /* (4096 * 2304) / 256 */ - {MBPF, ENC, CODECS_ALL, 64, 36864, 1, 36864}, - /* (8192 * 4320) / 256 */ - {MBPF, DEC, CODECS_ALL, 36, 138240, 1, 138240}, - /* (4096 * 2304) / 256 */ - {MBPF, DEC, VP9, 36, 36864, 1, 36864}, - /* (4096 * 2304) / 256 */ - {LOSSLESS_MBPF, ENC, H264|HEVC, 64, 36864, 1, 36864}, - /* Batch Mode Decode */ - /* (1920 * 1088) / 256 */ - {BATCH_MBPF, DEC, H264|HEVC|VP9, 64, 8160, 1, 8160}, - {BATCH_FPS, DEC, H264|HEVC|VP9, 1, 120, 1, 60}, - /* (4096 * 2304) / 256 */ - {SECURE_MBPF, ENC|DEC, H264|HEVC|VP9, 64, 36864, 1, 36864}, - /* ((4096 * 2304) / 256) * 60 fps */ - {MBPS, ENC, CODECS_ALL, 64, 2211840, 1, 2211840}, - /* ((3840 * 2176) / 256) * 120 fps */ - {MBPS, DEC, CODECS_ALL, 36, 3916800, 1, 3916800}, - /* ((4096 * 2304) / 256) * 60 */ - {MBPS, DEC, VP9, 36, 2211840, 1, 2211840}, - /* ((1920 * 1088) / 256) * 30 fps */ - {POWER_SAVE_MBPS, ENC, CODECS_ALL, 0, 244800, 1, 244800}, - - {FRAME_RATE, ENC, CODECS_ALL, - (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), - 1, (DEFAULT_FPS << 16), - 0, - HFI_PROP_FRAME_RATE, - CAP_FLAG_OUTPUT_PORT, - {0}, {0}, - NULL, msm_vidc_set_q16}, - - {FRAME_RATE, DEC, CODECS_ALL, - (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), - 1, (DEFAULT_FPS << 16)}, - - {FRAME_RATE, DEC, VP9, - (MINIMUM_FPS << 16), (MAXIMUM_VP9_FPS << 16), - 1, (DEFAULT_FPS << 16)}, - - {OPERATING_RATE, ENC|DEC, CODECS_ALL, - (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), - 1, (DEFAULT_FPS << 16)}, - - {OPERATING_RATE, DEC, VP9, - (MINIMUM_FPS << 16), (MAXIMUM_VP9_FPS << 16), - 1, (DEFAULT_FPS << 16)}, - - {SCALE_FACTOR, ENC, H264|HEVC, 1, 8, 1, 8}, - - {MB_CYCLES_VSP, ENC, CODECS_ALL, 25, 25, 1, 25}, - {MB_CYCLES_VSP, DEC, CODECS_ALL, 25, 25, 1, 25}, - {MB_CYCLES_VSP, DEC, VP9, 60, 60, 1, 60}, - {MB_CYCLES_VPP, ENC, CODECS_ALL, 675, 675, 1, 675}, - {MB_CYCLES_VPP, DEC, CODECS_ALL, 200, 200, 1, 200}, - {MB_CYCLES_LP, ENC, CODECS_ALL, 320, 320, 1, 320}, - {MB_CYCLES_LP, DEC, CODECS_ALL, 200, 200, 1, 200}, - {MB_CYCLES_FW, ENC|DEC, CODECS_ALL, 326389, 326389, 1, 326389}, - {MB_CYCLES_FW_VPP, ENC|DEC, CODECS_ALL, 44156, 44156, 1, 44156}, - - {SECURE_MODE, ENC|DEC, H264|HEVC|VP9, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_SECURE, - HFI_PROP_SECURE, - CAP_FLAG_NONE, - {0}, - {0}, - NULL, msm_vidc_set_u32}, - - {TS_REORDER, DEC, H264|HEVC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_TS_REORDER}, - - {HFLIP, ENC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_HFLIP, - HFI_PROP_FLIP, - CAP_FLAG_OUTPUT_PORT | - CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, - {0}, - {0}, - NULL, msm_vidc_set_flip}, - - {VFLIP, ENC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_VFLIP, - HFI_PROP_FLIP, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {0}, - {0}, - NULL, msm_vidc_set_flip}, - - {ROTATION, ENC, CODECS_ALL, - 0, 270, 90, 0, - V4L2_CID_ROTATE, - HFI_PROP_ROTATION, - CAP_FLAG_OUTPUT_PORT, - {0}, - {0}, - NULL, msm_vidc_set_rotation}, - - {SUPER_FRAME, ENC, H264|HEVC, - 0, 32, 1, 0, - V4L2_CID_MPEG_VIDC_SUPERFRAME, 0, - CAP_FLAG_NONE, - {0}, - {INPUT_BUF_HOST_MAX_COUNT, OUTPUT_BUF_HOST_MAX_COUNT}, - NULL, NULL}, - - {SLICE_INTERFACE, DEC, CODECS_ALL, - 0, 0, 0, 0, - V4L2_CID_MPEG_VIDEO_DECODER_SLICE_INTERFACE, - 0}, - - {HEADER_MODE, ENC, CODECS_ALL, - V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE, - V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME, - BIT(V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE) | - BIT(V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME), - V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE, - V4L2_CID_MPEG_VIDEO_HEADER_MODE, - HFI_PROP_SEQ_HEADER_MODE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, {0}, - NULL, msm_vidc_set_header_mode}, - - {PREPEND_SPSPPS_TO_IDR, ENC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDEO_PREPEND_SPSPPS_TO_IDR}, - - {META_SEQ_HDR_NAL, ENC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_SEQ_HEADER_NAL}, - - {WITHOUT_STARTCODE, ENC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE, - HFI_PROP_NAL_LENGTH_FIELD, - CAP_FLAG_OUTPUT_PORT, - {0}, {0}, - NULL, msm_vidc_set_nal_length}, - - {NAL_LENGTH_FIELD, ENC, CODECS_ALL, - V4L2_MPEG_VIDEO_HEVC_SIZE_0, - V4L2_MPEG_VIDEO_HEVC_SIZE_4, - BIT(V4L2_MPEG_VIDEO_HEVC_SIZE_0) | - BIT(V4L2_MPEG_VIDEO_HEVC_SIZE_4), - V4L2_MPEG_VIDEO_HEVC_SIZE_0, - V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD, - HFI_PROP_NAL_LENGTH_FIELD, - CAP_FLAG_MENU | CAP_FLAG_OUTPUT_PORT}, - - /* TODO: Firmware introduced enumeration type for this - * with and without seq header. - */ - {REQUEST_I_FRAME, ENC, H264|HEVC, - 0, 0, 0, 0, - V4L2_CID_MPEG_VIDEO_FORCE_KEY_FRAME, - HFI_PROP_REQUEST_SYNC_FRAME, - CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - NULL, msm_vidc_set_req_sync_frame}, - - /* Enc: Keeping CABAC and CAVLC as same bitrate. - * Dec: there's no use of Bitrate cap - */ - {BIT_RATE, ENC, H264|HEVC, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_BITRATE, - HFI_PROP_TOTAL_BITRATE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {ENH_LAYER_COUNT, BITRATE_MODE}, {PEAK_BITRATE}, - msm_vidc_adjust_bitrate, msm_vidc_set_bitrate}, - - {BITRATE_MODE, ENC, H264, - V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, - V4L2_MPEG_VIDEO_BITRATE_MODE_CBR, - BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_VBR) | - BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CBR), - V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, - V4L2_CID_MPEG_VIDEO_BITRATE_MODE, - HFI_PROP_RATE_CONTROL, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, - {LTR_COUNT, IR_RANDOM, TIME_DELTA_BASED_RC, I_FRAME_QP, - P_FRAME_QP, B_FRAME_QP, ENH_LAYER_COUNT, BIT_RATE, - CONTENT_ADAPTIVE_CODING, BITRATE_BOOST, MIN_QUALITY, - VBV_DELAY, PEAK_BITRATE,SLICE_MODE, META_ROI_INFO, - BLUR_TYPES, LOWLATENCY_MODE}, - msm_vidc_adjust_bitrate_mode, msm_vidc_set_u32_enum}, - - {BITRATE_MODE, ENC, HEVC, - V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, - V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, - BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_VBR) | - BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CBR) | - BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CQ), - V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, - V4L2_CID_MPEG_VIDEO_BITRATE_MODE, - HFI_PROP_RATE_CONTROL, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, - {LTR_COUNT, IR_RANDOM, TIME_DELTA_BASED_RC, I_FRAME_QP, - P_FRAME_QP, B_FRAME_QP, CONSTANT_QUALITY, ENH_LAYER_COUNT, - CONTENT_ADAPTIVE_CODING, BIT_RATE, - BITRATE_BOOST, MIN_QUALITY, VBV_DELAY, - PEAK_BITRATE, SLICE_MODE, META_ROI_INFO, BLUR_TYPES, - LOWLATENCY_MODE}, - msm_vidc_adjust_bitrate_mode, msm_vidc_set_u32_enum}, - - {LOSSLESS, ENC, HEVC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU}, - - {FRAME_SKIP_MODE, ENC, H264|HEVC|HEIC, - V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED, - V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT, - BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED) | - BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_LEVEL_LIMIT) | - BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT), - V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED, - V4L2_CID_MPEG_VIDEO_FRAME_SKIP_MODE, - 0, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {FRAME_RC_ENABLE, ENC, H264|HEVC|HEIC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_ENABLE, - V4L2_CID_MPEG_VIDEO_FRAME_RC_ENABLE}, - - {CONSTANT_QUALITY, ENC, HEVC, - 1, MAX_CONSTANT_QUALITY, 1, 90, - V4L2_CID_MPEG_VIDEO_CONSTANT_QUALITY, - HFI_PROP_CONSTANT_QUALITY, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {BITRATE_MODE}, {0}, - NULL, msm_vidc_set_constant_quality}, - - {GOP_SIZE, ENC, CODECS_ALL, - 0, INT_MAX, 1, 2 * DEFAULT_FPS - 1, - V4L2_CID_MPEG_VIDEO_GOP_SIZE, - HFI_PROP_MAX_GOP_FRAMES, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {ENH_LAYER_COUNT}, - {ALL_INTRA}, - msm_vidc_adjust_gop_size, msm_vidc_set_gop_size}, - - {GOP_CLOSURE, ENC, H264|HEVC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_ENABLE, - V4L2_CID_MPEG_VIDEO_GOP_CLOSURE, - 0}, - - {B_FRAME, ENC, H264|HEVC, - 0, 7, 1, 0, - V4L2_CID_MPEG_VIDEO_B_FRAMES, - HFI_PROP_MAX_B_FRAMES, - CAP_FLAG_OUTPUT_PORT, - {ENH_LAYER_COUNT}, - {ALL_INTRA}, - msm_vidc_adjust_b_frame, msm_vidc_set_u32}, - - {BLUR_TYPES, ENC, H264|HEVC, - VIDC_BLUR_NONE, VIDC_BLUR_ADAPTIVE, - BIT(VIDC_BLUR_NONE) | BIT(VIDC_BLUR_EXTERNAL) | BIT(VIDC_BLUR_ADAPTIVE), - VIDC_BLUR_ADAPTIVE, - V4L2_CID_MPEG_VIDC_VIDEO_BLUR_TYPES, - HFI_PROP_BLUR_TYPES, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {PIX_FMTS, BITRATE_MODE, CONTENT_ADAPTIVE_CODING, MIN_QUALITY}, - {BLUR_RESOLUTION}, - msm_vidc_adjust_blur_type, msm_vidc_set_u32_enum}, - - {BLUR_RESOLUTION, ENC, CODECS_ALL, - 0, S32_MAX, 1, 0, - V4L2_CID_MPEG_VIDC_VIDEO_BLUR_RESOLUTION, - HFI_PROP_BLUR_RESOLUTION, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {BLUR_TYPES}, - {0}, - msm_vidc_adjust_blur_resolution, msm_vidc_set_blur_resolution}, - - {CSC, ENC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - 0, - HFI_PROP_CSC}, - - {CSC_CUSTOM_MATRIX, ENC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_VIDEO_VPE_CSC_CUSTOM_MATRIX, - HFI_PROP_CSC_MATRIX, - CAP_FLAG_OUTPUT_PORT, - {0}, {0}, - NULL, msm_vidc_set_csc_custom_matrix}, - - {LOWLATENCY_MODE, ENC, H264 | HEVC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_LOWLATENCY_REQUEST, - 0, - CAP_FLAG_NONE, - {BITRATE_MODE}, - {STAGE}, - msm_vidc_adjust_lowlatency_mode, NULL}, - - {LOWLATENCY_MODE, DEC, H264|HEVC|VP9, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_LOWLATENCY_REQUEST, - HFI_PROP_SEQ_CHANGE_AT_SYNC_FRAME, - CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - - {LTR_COUNT, ENC, H264|HEVC, - 0, 2, 1, 0, - V4L2_CID_MPEG_VIDEO_LTR_COUNT, - HFI_PROP_LTR_COUNT, - CAP_FLAG_OUTPUT_PORT, - {BITRATE_MODE, ALL_INTRA}, {0}, - msm_vidc_adjust_ltr_count, msm_vidc_set_u32}, - - {USE_LTR, ENC, H264|HEVC, - INVALID_DEFAULT_MARK_OR_USE_LTR, - ((1 << MAX_LTR_FRAME_COUNT) - 1), - 1, INVALID_DEFAULT_MARK_OR_USE_LTR, - V4L2_CID_MPEG_VIDEO_USE_LTR_FRAMES, - HFI_PROP_LTR_USE, - CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - msm_vidc_adjust_use_ltr, msm_vidc_set_use_and_mark_ltr}, - - {MARK_LTR, ENC, H264|HEVC, - INVALID_DEFAULT_MARK_OR_USE_LTR, - (MAX_LTR_FRAME_COUNT - 1), - 1, INVALID_DEFAULT_MARK_OR_USE_LTR, - V4L2_CID_MPEG_VIDEO_FRAME_LTR_INDEX, - HFI_PROP_LTR_MARK, - CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - msm_vidc_adjust_mark_ltr, msm_vidc_set_use_and_mark_ltr}, - - {BASELAYER_PRIORITY, ENC, H264, - 0, MAX_BASE_LAYER_PRIORITY_ID, 1, 0, - V4L2_CID_MPEG_VIDEO_BASELAYER_PRIORITY_ID, - HFI_PROP_BASELAYER_PRIORITYID, - CAP_FLAG_OUTPUT_PORT}, - - {IR_RANDOM, ENC, H264|HEVC, - 0, INT_MAX, 1, 0, - V4L2_CID_MPEG_VIDC_INTRA_REFRESH_PERIOD, - HFI_PROP_IR_RANDOM_PERIOD, - CAP_FLAG_OUTPUT_PORT, - {BITRATE_MODE, ALL_INTRA}, {0}, - msm_vidc_adjust_ir_random, msm_vidc_set_u32}, - - {AU_DELIMITER, ENC, H264|HEVC, - V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDEO_AU_DELIMITER, - HFI_PROP_AUD, - CAP_FLAG_OUTPUT_PORT, - {0}, {0}, - NULL, msm_vidc_set_u32}, - - {TIME_DELTA_BASED_RC, ENC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_ENABLE, - V4L2_CID_MPEG_VIDC_TIME_DELTA_BASED_RC, - HFI_PROP_TIME_DELTA_BASED_RATE_CONTROL, - CAP_FLAG_OUTPUT_PORT, - {BITRATE_MODE}, {0}, - msm_vidc_adjust_delta_based_rc, msm_vidc_set_u32}, - - {CONTENT_ADAPTIVE_CODING, ENC, H264|HEVC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_ENABLE, - V4L2_CID_MPEG_VIDC_CONTENT_ADAPTIVE_CODING, - HFI_PROP_CONTENT_ADAPTIVE_CODING, - CAP_FLAG_OUTPUT_PORT, - {BITRATE_MODE, MIN_QUALITY}, - {BLUR_TYPES}, - msm_vidc_adjust_cac, - msm_vidc_set_vbr_related_properties}, - - {BITRATE_BOOST, ENC, H264|HEVC, - 0, MAX_BITRATE_BOOST, 25, MAX_BITRATE_BOOST, - V4L2_CID_MPEG_VIDC_QUALITY_BITRATE_BOOST, - HFI_PROP_BITRATE_BOOST, - CAP_FLAG_OUTPUT_PORT, - {BITRATE_MODE, MIN_QUALITY}, - {0}, - msm_vidc_adjust_bitrate_boost, - msm_vidc_set_vbr_related_properties}, - - {MIN_QUALITY, ENC, H264, - 0, MAX_SUPPORTED_MIN_QUALITY, 70, MAX_SUPPORTED_MIN_QUALITY, - 0, - HFI_PROP_MAINTAIN_MIN_QUALITY, - CAP_FLAG_OUTPUT_PORT, - {BITRATE_MODE, ENH_LAYER_COUNT, META_ROI_INFO}, - {CONTENT_ADAPTIVE_CODING, BITRATE_BOOST, BLUR_TYPES}, - msm_vidc_adjust_min_quality, - msm_vidc_set_vbr_related_properties}, - - {MIN_QUALITY, ENC, HEVC, - 0, MAX_SUPPORTED_MIN_QUALITY, 70, MAX_SUPPORTED_MIN_QUALITY, - 0, - HFI_PROP_MAINTAIN_MIN_QUALITY, - CAP_FLAG_OUTPUT_PORT, - {BITRATE_MODE, PIX_FMTS, ENH_LAYER_COUNT, - META_ROI_INFO}, - {CONTENT_ADAPTIVE_CODING, BITRATE_BOOST, BLUR_TYPES}, - msm_vidc_adjust_min_quality, - msm_vidc_set_vbr_related_properties}, - - {VBV_DELAY, ENC, H264|HEVC, - 200, 300, 100, 300, - V4L2_CID_MPEG_VIDEO_VBV_DELAY, - HFI_PROP_VBV_DELAY, - CAP_FLAG_OUTPUT_PORT, - {BITRATE_MODE}, - {0}, - NULL, msm_vidc_set_cbr_related_properties}, - - {PEAK_BITRATE, ENC, H264|HEVC, - /* default peak bitrate is 10% larger than avrg bitrate */ - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_BITRATE_PEAK, - HFI_PROP_TOTAL_PEAK_BITRATE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {BITRATE_MODE, BIT_RATE}, - {0}, - msm_vidc_adjust_peak_bitrate, - msm_vidc_set_cbr_related_properties}, - - {MIN_FRAME_QP, ENC, H264, - MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, - V4L2_CID_MPEG_VIDEO_H264_MIN_QP, - HFI_PROP_MIN_QP_PACKED, - CAP_FLAG_OUTPUT_PORT, - {0}, {0}, - NULL, msm_vidc_set_min_qp}, - - {MIN_FRAME_QP, ENC, HEVC|HEIC, - MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, - V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP, - HFI_PROP_MIN_QP_PACKED, - CAP_FLAG_OUTPUT_PORT, - {PIX_FMTS}, {0}, - msm_vidc_adjust_hevc_min_qp, msm_vidc_set_min_qp}, - - {I_FRAME_MIN_QP, ENC, H264, - MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, - V4L2_CID_MPEG_VIDEO_H264_I_FRAME_MIN_QP}, - - {I_FRAME_MIN_QP, ENC, HEVC|HEIC, - MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, - V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_MIN_QP}, - - {P_FRAME_MIN_QP, ENC, H264, - MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, - V4L2_CID_MPEG_VIDEO_H264_P_FRAME_MIN_QP}, - - {P_FRAME_MIN_QP, ENC, HEVC|HEIC, - MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, - V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_MIN_QP}, - - {B_FRAME_MIN_QP, ENC, H264, - MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, - V4L2_CID_MPEG_VIDEO_H264_B_FRAME_MIN_QP}, - - {B_FRAME_MIN_QP, ENC, HEVC|HEIC, - MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, - V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_MIN_QP}, - - {MAX_FRAME_QP, ENC, H264, - MIN_QP_8BIT, MAX_QP, 1, MAX_QP, - V4L2_CID_MPEG_VIDEO_H264_MAX_QP, - HFI_PROP_MAX_QP_PACKED, - CAP_FLAG_OUTPUT_PORT, - {0}, {0}, - NULL, msm_vidc_set_max_qp}, - - {MAX_FRAME_QP, ENC, HEVC|HEIC, - MIN_QP_10BIT, MAX_QP, 1, MAX_QP, - V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP, - HFI_PROP_MAX_QP_PACKED, - CAP_FLAG_OUTPUT_PORT, - {PIX_FMTS}, {0}, - msm_vidc_adjust_hevc_max_qp, msm_vidc_set_max_qp}, - - {I_FRAME_MAX_QP, ENC, H264, - MIN_QP_8BIT, MAX_QP, 1, MAX_QP, - V4L2_CID_MPEG_VIDEO_H264_I_FRAME_MAX_QP}, - - {I_FRAME_MAX_QP, ENC, HEVC|HEIC, - MIN_QP_10BIT, MAX_QP, 1, MAX_QP, - V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_MAX_QP}, - - {P_FRAME_MAX_QP, ENC, H264, - MIN_QP_8BIT, MAX_QP, 1, MAX_QP, - V4L2_CID_MPEG_VIDEO_H264_P_FRAME_MAX_QP}, - - {P_FRAME_MAX_QP, ENC, HEVC|HEIC, - MIN_QP_10BIT, MAX_QP, 1, MAX_QP, - V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_MAX_QP}, - - {B_FRAME_MAX_QP, ENC, H264, - MIN_QP_8BIT, MAX_QP, 1, MAX_QP, - V4L2_CID_MPEG_VIDEO_H264_B_FRAME_MAX_QP}, - - {B_FRAME_MAX_QP, ENC, HEVC|HEIC, - MIN_QP_10BIT, MAX_QP, 1, MAX_QP, - V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_MAX_QP}, - - {I_FRAME_QP, ENC, HEVC, - MIN_QP_10BIT, MAX_QP, 1, DEFAULT_QP, - V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP, - HFI_PROP_QP_PACKED, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {PIX_FMTS, BITRATE_MODE}, {0}, - msm_vidc_adjust_hevc_i_frame_qp, msm_vidc_set_frame_qp}, - - {I_FRAME_QP, ENC, H264, - MIN_QP_8BIT, MAX_QP, 1, DEFAULT_QP, - V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP, - HFI_PROP_QP_PACKED, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {BITRATE_MODE}, {0}, - NULL, msm_vidc_set_frame_qp}, - - {P_FRAME_QP, ENC, HEVC, - MIN_QP_10BIT, MAX_QP, 1, DEFAULT_QP, - V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP, - HFI_PROP_QP_PACKED, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {PIX_FMTS, BITRATE_MODE}, {0}, - msm_vidc_adjust_hevc_p_frame_qp, msm_vidc_set_frame_qp}, - - {P_FRAME_QP, ENC, H264, - MIN_QP_8BIT, MAX_QP, 1, DEFAULT_QP, - V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP, - HFI_PROP_QP_PACKED, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {BITRATE_MODE}, {0}, - NULL, msm_vidc_set_frame_qp}, - - {B_FRAME_QP, ENC, HEVC, - MIN_QP_10BIT, MAX_QP, 1, DEFAULT_QP, - V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP, - HFI_PROP_QP_PACKED, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {PIX_FMTS, BITRATE_MODE}, {0}, - msm_vidc_adjust_hevc_b_frame_qp, msm_vidc_set_frame_qp}, - - {B_FRAME_QP, ENC, H264, - MIN_QP_8BIT, MAX_QP, 1, DEFAULT_QP, - V4L2_CID_MPEG_VIDEO_H264_B_FRAME_QP, - HFI_PROP_QP_PACKED, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {BITRATE_MODE}, {0}, - NULL, msm_vidc_set_frame_qp}, - - {LAYER_TYPE, ENC, HEVC, - V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B, - V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P, - BIT(V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B) | - BIT(V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P), - V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P, - V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE, - HFI_PROP_LAYER_ENCODING_TYPE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {LAYER_TYPE, ENC, H264, - V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_B, - V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P, - BIT(V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_B) | - BIT(V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P), - V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P, - V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_TYPE, - HFI_PROP_LAYER_ENCODING_TYPE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {LAYER_ENABLE, ENC, H264, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING, - HFI_PROP_LAYER_ENCODING_TYPE, - CAP_FLAG_OUTPUT_PORT}, - - {ENH_LAYER_COUNT, ENC, HEVC, - 0, 5, 1, 0, - V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER, - HFI_PROP_LAYER_COUNT, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {BITRATE_MODE, META_EVA_STATS}, - {GOP_SIZE, B_FRAME, BIT_RATE, MIN_QUALITY}, - msm_vidc_adjust_layer_count, msm_vidc_set_layer_count_and_type}, - - {ENH_LAYER_COUNT, ENC, H264, - 0, 5, 1, 0, - V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_LAYER, - HFI_PROP_LAYER_COUNT, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {BITRATE_MODE, META_EVA_STATS}, - {GOP_SIZE, B_FRAME, BIT_RATE, MIN_QUALITY}, - msm_vidc_adjust_layer_count, msm_vidc_set_layer_count_and_type}, - - /* - * layer bitrate is treated as BIT_RATE cap sibling and - * is handled in bitrate adjust and set functions - */ - {L0_BR, ENC, HEVC, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L0_BR, - HFI_PROP_BITRATE_LAYER1, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, - - {L1_BR, ENC, HEVC, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L1_BR, - HFI_PROP_BITRATE_LAYER2, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, - - {L2_BR, ENC, HEVC, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L2_BR, - HFI_PROP_BITRATE_LAYER3, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, - - {L3_BR, ENC, HEVC, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L3_BR, - HFI_PROP_BITRATE_LAYER4, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, - - {L4_BR, ENC, HEVC, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L4_BR, - HFI_PROP_BITRATE_LAYER5, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, - - {L5_BR, ENC, HEVC, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L5_BR, - HFI_PROP_BITRATE_LAYER6, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, - - {L0_BR, ENC, H264, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L0_BR, - HFI_PROP_BITRATE_LAYER1, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, - - {L1_BR, ENC, H264, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L1_BR, - HFI_PROP_BITRATE_LAYER2, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, - - {L2_BR, ENC, H264, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L2_BR, - HFI_PROP_BITRATE_LAYER3, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, - - {L3_BR, ENC, H264, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L3_BR, - HFI_PROP_BITRATE_LAYER4, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, - - {L4_BR, ENC, H264, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L4_BR, - HFI_PROP_BITRATE_LAYER5, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, - - {L5_BR, ENC, H264, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L5_BR, - HFI_PROP_BITRATE_LAYER6, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, - - {ENTROPY_MODE, ENC, H264, - V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC, - V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, - BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC) | - BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC), - V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, - V4L2_CID_MPEG_VIDEO_H264_ENTROPY_MODE, - HFI_PROP_CABAC_SESSION, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {PROFILE}, - {0}, - msm_vidc_adjust_entropy_mode, msm_vidc_set_u32}, - - {ENTROPY_MODE, DEC, H264|HEVC|VP9, - V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC, - V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, - BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC) | - BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC), - V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, - 0, - HFI_PROP_CABAC_SESSION}, - - /* H264 does not support 10 bit, PIX_FMTS would not be a Parent for this */ - {PROFILE, ENC, H264, - V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE, - V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH, - BIT(V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE) | - BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH) | - BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_BASELINE) | - BIT(V4L2_MPEG_VIDEO_H264_PROFILE_MAIN) | - BIT(V4L2_MPEG_VIDEO_H264_PROFILE_HIGH), - V4L2_MPEG_VIDEO_H264_PROFILE_HIGH, - V4L2_CID_MPEG_VIDEO_H264_PROFILE, - HFI_PROP_PROFILE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, - {ENTROPY_MODE, TRANSFORM_8X8}, - NULL, msm_vidc_set_u32_enum}, - - {PROFILE, DEC, H264, - V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE, - V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH, - BIT(V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE) | - BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH) | - BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_BASELINE) | - BIT(V4L2_MPEG_VIDEO_H264_PROFILE_MAIN) | - BIT(V4L2_MPEG_VIDEO_H264_PROFILE_HIGH), - V4L2_MPEG_VIDEO_H264_PROFILE_HIGH, - V4L2_CID_MPEG_VIDEO_H264_PROFILE, - HFI_PROP_PROFILE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, - {ENTROPY_MODE}, - NULL, msm_vidc_set_u32_enum}, - - {PROFILE, ENC|DEC, HEVC|HEIC, - V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN, - V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE, - BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN) | - BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE) | - BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10) | - BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE), - V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN, - V4L2_CID_MPEG_VIDEO_HEVC_PROFILE, - HFI_PROP_PROFILE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {PIX_FMTS}, - {0}, - msm_vidc_adjust_profile, msm_vidc_set_u32_enum}, - - {PROFILE, DEC, VP9, - V4L2_MPEG_VIDEO_VP9_PROFILE_0, - V4L2_MPEG_VIDEO_VP9_PROFILE_2, - BIT(V4L2_MPEG_VIDEO_VP9_PROFILE_0) | - BIT(V4L2_MPEG_VIDEO_VP9_PROFILE_2), - V4L2_MPEG_VIDEO_VP9_PROFILE_0, - V4L2_CID_MPEG_VIDEO_VP9_PROFILE, - HFI_PROP_PROFILE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, - {0}, - NULL, msm_vidc_set_u32_enum}, - - {LEVEL, DEC, VP9, - V4L2_MPEG_VIDEO_VP9_LEVEL_1_0, - V4L2_MPEG_VIDEO_VP9_LEVEL_5_2, - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_1_0) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_1_1) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_2_0) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_2_1) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_3_0) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_3_1) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_4_0) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_4_1) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_0) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_1) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_2), - V4L2_MPEG_VIDEO_VP9_LEVEL_5_2, - V4L2_CID_MPEG_VIDEO_VP9_LEVEL, - HFI_PROP_LEVEL, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, - {0}, - NULL, msm_vidc_set_u32_enum}, - - {LEVEL, DEC, H264, - V4L2_MPEG_VIDEO_H264_LEVEL_1_0, - V4L2_MPEG_VIDEO_H264_LEVEL_6_0, - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1B) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_3) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_0), - V4L2_MPEG_VIDEO_H264_LEVEL_6_0, - V4L2_CID_MPEG_VIDEO_H264_LEVEL, - HFI_PROP_LEVEL, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, - {0}, - NULL, msm_vidc_set_u32_enum}, - - {LEVEL, ENC, H264, - V4L2_MPEG_VIDEO_H264_LEVEL_1_0, - V4L2_MPEG_VIDEO_H264_LEVEL_6_0, - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1B) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_3) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_0), - V4L2_MPEG_VIDEO_H264_LEVEL_6_0, - V4L2_CID_MPEG_VIDEO_H264_LEVEL, - HFI_PROP_LEVEL, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, - {0}, - NULL, msm_vidc_set_level}, - - {LEVEL, DEC, HEVC|HEIC, - V4L2_MPEG_VIDEO_HEVC_LEVEL_1, - V4L2_MPEG_VIDEO_HEVC_LEVEL_6, - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6), - V4L2_MPEG_VIDEO_HEVC_LEVEL_6, - V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, - HFI_PROP_LEVEL, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, - {0}, - NULL, msm_vidc_set_u32_enum}, - - {LEVEL, ENC, HEVC|HEIC, - V4L2_MPEG_VIDEO_HEVC_LEVEL_1, - V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2, - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2), - V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2, - V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, - HFI_PROP_LEVEL, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, - {0}, - NULL, msm_vidc_set_level}, - - /* TODO: Bring the VP9 Level upstream GKI change, and level cap here: - * go/videogki - */ - - {HEVC_TIER, ENC|DEC, HEVC, - V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, - V4L2_MPEG_VIDEO_HEVC_TIER_HIGH, - BIT(V4L2_MPEG_VIDEO_HEVC_TIER_MAIN) | - BIT(V4L2_MPEG_VIDEO_HEVC_TIER_HIGH), - V4L2_MPEG_VIDEO_HEVC_TIER_HIGH, - V4L2_CID_MPEG_VIDEO_HEVC_TIER, - HFI_PROP_TIER, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, - {0}, - NULL, msm_vidc_set_u32_enum}, - - {LF_MODE, ENC, H264, - V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED, - DB_H264_DISABLE_SLICE_BOUNDARY, - BIT(V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED) | - BIT(V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_DISABLED) | - BIT(DB_H264_DISABLE_SLICE_BOUNDARY), - V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED, - V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_MODE, - HFI_PROP_DEBLOCKING_MODE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, {0}, - NULL, msm_vidc_set_deblock_mode}, - - {LF_MODE, ENC, HEVC|HEIC, - V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_DISABLED, - DB_HEVC_DISABLE_SLICE_BOUNDARY, - BIT(V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_DISABLED) | - BIT(V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_ENABLED) | - BIT(DB_HEVC_DISABLE_SLICE_BOUNDARY), - V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_ENABLED, - V4L2_CID_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE, - HFI_PROP_DEBLOCKING_MODE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, {0}, - NULL, msm_vidc_set_deblock_mode}, - - {LF_ALPHA, ENC, H264, - -6, 6, 1, 0, - V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_ALPHA}, - - {LF_ALPHA, ENC, HEVC|HEIC, - -6, 6, 1, 0, - V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2}, - - {LF_BETA, ENC, H264, - -6, 6, 1, 0, - V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_BETA}, - - {LF_BETA, ENC, HEVC|HEIC, - -6, 6, 1, 0, - V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2}, - - {SLICE_MODE, ENC, H264|HEVC|HEIC, - V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, - V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_BYTES, - BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE) | - BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_MB) | - BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_BYTES), - V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, - V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE, - 0, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {BITRATE_MODE, ALL_INTRA}, {0}, - msm_vidc_adjust_slice_count, msm_vidc_set_slice_count}, - - {SLICE_MAX_BYTES, ENC, H264|HEVC|HEIC, - MIN_SLICE_BYTE_SIZE, MAX_SLICE_BYTE_SIZE, - 1, MIN_SLICE_BYTE_SIZE, - V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES, - HFI_PROP_MULTI_SLICE_BYTES_COUNT, - CAP_FLAG_OUTPUT_PORT}, - - {SLICE_MAX_MB, ENC, H264|HEVC|HEIC, - 1, MAX_SLICE_MB_SIZE, 1, 1, - V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB, - HFI_PROP_MULTI_SLICE_MB_COUNT, - CAP_FLAG_OUTPUT_PORT}, - - // TODO: MB level RC - mapping - {MB_RC, ENC, H264|HEVC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_ENABLE, - V4L2_CID_MPEG_VIDEO_MB_RC_ENABLE, - 0, - CAP_FLAG_OUTPUT_PORT}, - - {TRANSFORM_8X8, ENC, H264, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_ENABLE, - V4L2_CID_MPEG_VIDEO_H264_8X8_TRANSFORM, - HFI_PROP_8X8_TRANSFORM, - CAP_FLAG_OUTPUT_PORT, - {PROFILE}, {0}, - msm_vidc_adjust_transform_8x8, msm_vidc_set_u32}, - - {CHROMA_QP_INDEX_OFFSET, ENC, HEVC, - MIN_CHROMA_QP_OFFSET, MAX_CHROMA_QP_OFFSET, - 1, MAX_CHROMA_QP_OFFSET, - V4L2_CID_MPEG_VIDEO_H264_CHROMA_QP_INDEX_OFFSET, - HFI_PROP_CHROMA_QP_OFFSET, - CAP_FLAG_OUTPUT_PORT, - {0}, {0}, - msm_vidc_adjust_chroma_qp_index_offset, - msm_vidc_set_chroma_qp_index_offset}, - - {DISPLAY_DELAY_ENABLE, DEC, H264|HEVC|VP9, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY_ENABLE, - HFI_PROP_DECODE_ORDER_OUTPUT, - CAP_FLAG_INPUT_PORT, - {0}, {OUTPUT_ORDER}, - NULL, NULL}, - - {DISPLAY_DELAY, DEC, H264|HEVC|VP9, - 0, 1, 1, 0, - V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY, - HFI_PROP_DECODE_ORDER_OUTPUT, - CAP_FLAG_INPUT_PORT, - {0}, {OUTPUT_ORDER}, - NULL, NULL}, - - {OUTPUT_ORDER, DEC, H264|HEVC|VP9, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - 0, - HFI_PROP_DECODE_ORDER_OUTPUT, - CAP_FLAG_INPUT_PORT, - {THUMBNAIL_MODE, DISPLAY_DELAY, DISPLAY_DELAY_ENABLE}, - {0}, - msm_vidc_adjust_output_order, msm_vidc_set_u32}, - - {INPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL, - DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT, - 1, DEFAULT_MAX_HOST_BUF_COUNT, - 0, - HFI_PROP_BUFFER_HOST_MAX_COUNT, - CAP_FLAG_INPUT_PORT, - {0}, {0}, - msm_vidc_adjust_input_buf_host_max_count, msm_vidc_set_u32}, - - {INPUT_BUF_HOST_MAX_COUNT, ENC, H264|HEVC, - DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT, - 1, DEFAULT_MAX_HOST_BUF_COUNT, - 0, - HFI_PROP_BUFFER_HOST_MAX_COUNT, - CAP_FLAG_INPUT_PORT, - {SUPER_FRAME}, {0}, - msm_vidc_adjust_input_buf_host_max_count, msm_vidc_set_u32}, - - {OUTPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL, - DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT, - 1, DEFAULT_MAX_HOST_BUF_COUNT, - 0, - HFI_PROP_BUFFER_HOST_MAX_COUNT, - CAP_FLAG_OUTPUT_PORT, - {0}, {0}, - msm_vidc_adjust_output_buf_host_max_count, msm_vidc_set_u32}, - - {OUTPUT_BUF_HOST_MAX_COUNT, ENC, H264|HEVC, - DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT, - 1, DEFAULT_MAX_HOST_BUF_COUNT, - 0, - HFI_PROP_BUFFER_HOST_MAX_COUNT, - CAP_FLAG_OUTPUT_PORT, - {SUPER_FRAME}, {0}, - msm_vidc_adjust_output_buf_host_max_count, msm_vidc_set_u32}, - - /* conceal color */ - {CONCEAL_COLOR_8BIT, DEC, CODECS_ALL, 0x0, 0xff3fcff, 1, - DEFAULT_VIDEO_CONCEAL_COLOR_BLACK, - V4L2_CID_MPEG_VIDEO_MUTE_YUV, - HFI_PROP_CONCEAL_COLOR_8BIT, - CAP_FLAG_INPUT_PORT, - {0}, {0}, - NULL, msm_vidc_set_u32_packed}, - - {CONCEAL_COLOR_10BIT, DEC, CODECS_ALL, 0x0, 0x3fffffff, 1, - DEFAULT_VIDEO_CONCEAL_COLOR_BLACK, - V4L2_CID_MPEG_VIDEO_MUTE_YUV, - HFI_PROP_CONCEAL_COLOR_10BIT, - CAP_FLAG_INPUT_PORT, - {0}, {0}, - NULL, msm_vidc_set_u32_packed}, - - // TODO - {STAGE, DEC|ENC, CODECS_ALL, - MSM_VIDC_STAGE_1, - MSM_VIDC_STAGE_2, 1, - MSM_VIDC_STAGE_2, - 0, - HFI_PROP_STAGE, - 0, - {0}, {0}, - NULL, msm_vidc_set_stage}, - - {STAGE, ENC, H264 | HEVC, - MSM_VIDC_STAGE_1, - MSM_VIDC_STAGE_2, 1, - MSM_VIDC_STAGE_2, - 0, - HFI_PROP_STAGE, - CAP_FLAG_NONE, - {LOWLATENCY_MODE}, {0}, - NULL, msm_vidc_set_stage}, - - {PIPE, DEC|ENC, CODECS_ALL, - MSM_VIDC_PIPE_1, - MSM_VIDC_PIPE_2, 1, - MSM_VIDC_PIPE_2, - 0, - HFI_PROP_PIPE, - 0, - {0}, {0}, - NULL, msm_vidc_set_pipe}, - {POC, DEC, H264, 0, 18, 1, 1}, - {QUALITY_MODE, ENC, CODECS_ALL, - MSM_VIDC_MAX_QUALITY_MODE, - MSM_VIDC_POWER_SAVE_MODE, 1, - MSM_VIDC_POWER_SAVE_MODE}, - - {CODED_FRAMES, DEC, H264|HEVC|HEIC, - CODED_FRAMES_PROGRESSIVE, CODED_FRAMES_INTERLACE, - 1, CODED_FRAMES_PROGRESSIVE, - 0, - HFI_PROP_CODED_FRAMES}, - - {BIT_DEPTH, DEC, CODECS_ALL, BIT_DEPTH_8, BIT_DEPTH_10, 1, BIT_DEPTH_8, - 0, - HFI_PROP_LUMA_CHROMA_BIT_DEPTH}, - - {CODEC_CONFIG, DEC, H264|HEVC|HEIC, 0, 1, 1, 0, - V4L2_CID_MPEG_VIDC_CODEC_CONFIG, 0, - CAP_FLAG_DYNAMIC_ALLOWED}, - - {BITSTREAM_SIZE_OVERWRITE, DEC, CODECS_ALL, 0, INT_MAX, 1, 0, - V4L2_CID_MPEG_VIDC_MIN_BITSTREAM_SIZE_OVERWRITE}, - - {THUMBNAIL_MODE, DEC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_THUMBNAIL_MODE, - HFI_PROP_THUMBNAIL_MODE, - CAP_FLAG_INPUT_PORT, - {0}, {OUTPUT_ORDER}, - NULL, msm_vidc_set_u32}, - - {DEFAULT_HEADER, DEC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - 0, - HFI_PROP_DEC_DEFAULT_HEADER}, - - {RAP_FRAME, DEC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_ENABLE, - 0, - HFI_PROP_DEC_START_FROM_RAP_FRAME, - CAP_FLAG_INPUT_PORT, - {0}, {0}, - NULL, msm_vidc_set_u32}, - - {SEQ_CHANGE_AT_SYNC_FRAME, DEC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_ENABLE, - 0, - HFI_PROP_SEQ_CHANGE_AT_SYNC_FRAME, - CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - - {PRIORITY, DEC|ENC, CODECS_ALL, - 0, 2, 1, 1, - V4L2_CID_MPEG_VIDC_PRIORITY, - HFI_PROP_SESSION_PRIORITY, - CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - msm_vidc_adjust_session_priority, msm_vidc_set_session_priority}, - - {ENC_IP_CR, ENC, CODECS_ALL, - 0, S32_MAX, 1, 0, - V4L2_CID_MPEG_VIDC_ENC_INPUT_COMPRESSION_RATIO, - 0, CAP_FLAG_DYNAMIC_ALLOWED}, - - {DPB_LIST, DEC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - 0, - HFI_PROP_DPB_LIST, - CAP_FLAG_OUTPUT_PORT, - {0}, {0}, - NULL, NULL}, - - {ALL_INTRA, ENC, H264|HEVC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - 0, - 0, - CAP_FLAG_OUTPUT_PORT, - {GOP_SIZE, B_FRAME}, - {LTR_COUNT, IR_RANDOM, SLICE_MODE}, - msm_vidc_adjust_all_intra, NULL}, - - {META_LTR_MARK_USE, ENC, H264|HEVC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_LTR_MARK_USE_DETAILS, - HFI_PROP_LTR_MARK_USE_DETAILS}, - - {META_SEQ_HDR_NAL, ENC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_SEQ_HEADER_NAL, - HFI_PROP_METADATA_SEQ_HEADER_NAL}, - - {META_DPB_MISR, DEC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_DPB_LUMA_CHROMA_MISR, - HFI_PROP_DPB_LUMA_CHROMA_MISR}, - - {META_OPB_MISR, DEC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_OPB_LUMA_CHROMA_MISR, - HFI_PROP_OPB_LUMA_CHROMA_MISR}, - - {META_INTERLACE, DEC, H264, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_INTERLACE, - HFI_PROP_INTERLACE_INFO}, - - {META_TIMESTAMP, DEC | ENC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_TIMESTAMP, - HFI_PROP_TIMESTAMP}, - - {META_CONCEALED_MB_CNT, DEC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_CONCEALED_MB_COUNT, - HFI_PROP_CONEALED_MB_COUNT}, - - {META_HIST_INFO, DEC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_HISTOGRAM_INFO, - HFI_PROP_HISTOGRAM_INFO}, - - {META_SEI_MASTERING_DISP, DEC|ENC, HEVC|HEIC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_SEI_MASTERING_DISPLAY_COLOUR, - HFI_PROP_SEI_MASTERING_DISPLAY_COLOUR}, - - {META_SEI_CLL, DEC|ENC, HEVC|HEIC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_SEI_CONTENT_LIGHT_LEVEL, - HFI_PROP_SEI_CONTENT_LIGHT_LEVEL}, - - {META_HDR10PLUS, DEC | ENC, HEVC|HEIC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_HDR10PLUS, - HFI_PROP_SEI_HDR10PLUS_USERDATA}, - - {META_EVA_STATS, ENC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_EVA_STATS, - HFI_PROP_EVA_STAT_INFO, - 0, - {0}, - {ENH_LAYER_COUNT}}, - - {META_BUF_TAG, DEC | ENC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_BUFFER_TAG, - HFI_PROP_BUFFER_TAG}, - - {META_DPB_TAG_LIST, DEC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_DPB_TAG_LIST, - HFI_PROP_DPB_TAG_LIST}, - - {META_OUTPUT_BUF_TAG, DEC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - 0, - HFI_PROP_BUFFER_TAG}, - - {META_SUBFRAME_OUTPUT, DEC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_SUBFRAME_OUTPUT, - HFI_PROP_SUBFRAME_OUTPUT}, - - {META_ENC_QP_METADATA, ENC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_ENC_QP_METADATA, - HFI_PROP_ENC_QP_METADATA}, - - {META_ROI_INFO, ENC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_ROI_INFO, - HFI_PROP_ROI_INFO, - CAP_FLAG_INPUT_PORT, - {BITRATE_MODE, PIX_FMTS}, - {0}, - msm_vidc_adjust_roi_info, NULL}, - - {META_ROI_INFO, ENC, H264|HEVC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_ROI_INFO, - HFI_PROP_ROI_INFO, - CAP_FLAG_INPUT_PORT, - {BITRATE_MODE, PIX_FMTS}, - {MIN_QUALITY}, - msm_vidc_adjust_roi_info, NULL}, - - {META_DEC_QP_METADATA, DEC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_DEC_QP_METADATA, - HFI_PROP_DEC_QP_METADATA}, - - /* configure image properties */ - {FRAME_WIDTH, ENC, HEIC, 128, 16384, 1, 16384}, - {FRAME_HEIGHT, ENC, HEIC, 128, 16384, 1, 16384}, - {MIN_BUFFERS_INPUT, ENC|DEC, HEIC, 0, 64, 1, 1, - V4L2_CID_MIN_BUFFERS_FOR_OUTPUT}, - {MBPF, DEC, HEIC, 36, 262144, 1, 262144 }, /* ((8192x8192)/256) */ - {MBPF, ENC, HEIC, 64, 1048576, 1, 1048576}, /* ((16384x16384)/256) */ - {MBPS, DEC, HEIC, 36, 262144, 1, 262144 }, /* ((8192x8192)/256)@1fps */ - {MBPS, ENC, HEIC, 64, 1048576, 1, 1048576}, /* ((16384x16384)/256)@1fps */ - {BITRATE_MODE, ENC, HEIC, - V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, - V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, - BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CQ), - V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, - V4L2_CID_MPEG_VIDEO_BITRATE_MODE, - HFI_PROP_RATE_CONTROL, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, - {TIME_DELTA_BASED_RC, CONSTANT_QUALITY}, - msm_vidc_adjust_bitrate_mode, msm_vidc_set_u32_enum}, - {TIME_DELTA_BASED_RC, ENC, HEIC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_TIME_DELTA_BASED_RC, - HFI_PROP_TIME_DELTA_BASED_RATE_CONTROL, - CAP_FLAG_OUTPUT_PORT, - {BITRATE_MODE}, {0}, - msm_vidc_adjust_delta_based_rc, msm_vidc_set_u32}, - {CONSTANT_QUALITY, ENC, HEIC, - 1, MAX_CONSTANT_QUALITY, 1, 100, - V4L2_CID_MPEG_VIDEO_CONSTANT_QUALITY, - HFI_PROP_CONSTANT_QUALITY, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {BITRATE_MODE}, {0}, - NULL, msm_vidc_set_constant_quality}, - {GRID, ENC, HEIC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_ENABLE, - 0, - HFI_PROP_HEIC_GRID_ENABLE, - CAP_FLAG_OUTPUT_PORT, - {0}, {0}, - NULL, msm_vidc_set_u32}, - {GOP_SIZE, ENC, HEIC, - 0, INT_MAX, 1, 0 /* all intra */, - V4L2_CID_MPEG_VIDEO_GOP_SIZE, - HFI_PROP_MAX_GOP_FRAMES, - CAP_FLAG_OUTPUT_PORT | - CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - NULL, msm_vidc_set_u32}, - {B_FRAME, ENC, HEIC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDEO_B_FRAMES, - HFI_PROP_MAX_B_FRAMES, - CAP_FLAG_OUTPUT_PORT, - {0}, {0}, - NULL, msm_vidc_set_u32}, - {PIX_FMTS, ENC, HEIC, - MSM_VIDC_FMT_NV12, - MSM_VIDC_FMT_P010, - MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_P010, - MSM_VIDC_FMT_NV12, - 0, 0, - 0, - {0}, - {PROFILE}}, - {HEVC_TIER, ENC|DEC, HEIC, - V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, - V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, - BIT(V4L2_MPEG_VIDEO_HEVC_TIER_MAIN), - V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, - V4L2_CID_MPEG_VIDEO_HEVC_TIER, - HFI_PROP_TIER, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, - {0}, - NULL, msm_vidc_set_u32_enum}, - {FRAME_RATE, ENC, HEIC, - (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), - 1, (MINIMUM_FPS << 16), - 0, - HFI_PROP_FRAME_RATE, - CAP_FLAG_OUTPUT_PORT, - {0}, {0}, - NULL, msm_vidc_set_q16}, - {META_SUBFRAME_OUTPUT, ENC, HEIC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_SUBFRAME_OUTPUT, - HFI_PROP_SUBFRAME_OUTPUT}, - {COMPLEXITY, ENC, H264 | HEVC, - 0, 100, - 1, 100, - V4L2_CID_MPEG_VIDC_VENC_COMPLEXITY}, - {META_MAX_NUM_REORDER_FRAMES, DEC, HEVC | H264, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_MAX_NUM_REORDER_FRAMES, - HFI_PROP_MAX_NUM_REORDER_FRAMES}, -}; - -static struct msm_platform_inst_capability instance_data_diwali_v1[] = { - /* {cap, domain, codec, - * min, max, step_or_mask, value, - * v4l2_id, - * hfi_id, - * flags, - * parents, - * children, - * adjust, set} - */ - - {FRAME_WIDTH, DEC, CODECS_ALL, 96, 4096, 1, 1920}, - {FRAME_WIDTH, ENC, CODECS_ALL, 128, 4096, 1, 1920}, - {LOSSLESS_FRAME_WIDTH, ENC, H264|HEVC, 128, 4096, 1, 1920}, - {SECURE_FRAME_WIDTH, DEC, H264|HEVC|VP9, 96, 4096, 1, 1920}, - {SECURE_FRAME_WIDTH, ENC, H264|HEVC, 128, 4096, 1, 1920}, - {FRAME_HEIGHT, DEC, CODECS_ALL, 96, 4096, 1, 1080}, - {FRAME_HEIGHT, ENC, CODECS_ALL, 128, 4096, 1, 1080}, - {LOSSLESS_FRAME_HEIGHT, ENC, H264|HEVC, 128, 4096, 1, 1080}, - {SECURE_FRAME_HEIGHT, DEC, H264|HEVC|VP9, 96, 4096, 1, 1080}, - {SECURE_FRAME_HEIGHT, ENC, H264|HEVC, 128, 4096, 1, 1080}, - {PIX_FMTS, ENC, H264, - MSM_VIDC_FMT_NV12, - MSM_VIDC_FMT_NV12C, - MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C, - /* Since CTSEncodeDecode test cannot handle BT 709LR, - * disabled HW RGBA encoding. - * | MSM_VIDC_FMT_RGBA8888 | MSM_VIDC_FMT_RGBA8888C, - */ - MSM_VIDC_FMT_NV12C, - 0, 0, - 0, - {0}, - {META_ROI_INFO}}, - {PIX_FMTS, ENC, HEVC, - MSM_VIDC_FMT_NV12, - MSM_VIDC_FMT_TP10C, - MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C | - MSM_VIDC_FMT_P010 | MSM_VIDC_FMT_TP10C, - /* Since CTSEncodeDecode test cannot handle BT 709LR, - * disabled HW RGBA encoding. - * | MSM_VIDC_FMT_RGBA8888 | MSM_VIDC_FMT_RGBA8888C, - */ - MSM_VIDC_FMT_NV12C, - 0, 0, - 0, - {0}, - {/* Do not change order of META_ROI_INFO, MIN_QUALITY, BLUR_TYPES - * Since parent -> children relationship for these cap_ids is - * as follows: - * META_ROI_INFO -> MIN_QUALITY -> BLUR_TYPES - */ - PROFILE, MIN_FRAME_QP, MAX_FRAME_QP, I_FRAME_QP, P_FRAME_QP, - B_FRAME_QP, META_ROI_INFO, MIN_QUALITY, BLUR_TYPES}}, - - {PIX_FMTS, DEC, HEVC|HEIC, - MSM_VIDC_FMT_NV12, - MSM_VIDC_FMT_TP10C, - MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C | - MSM_VIDC_FMT_P010 | MSM_VIDC_FMT_TP10C, - MSM_VIDC_FMT_NV12C, - 0, 0, - 0, - {0}, - {PROFILE}}, - - {PIX_FMTS, DEC, H264, - MSM_VIDC_FMT_NV12, - MSM_VIDC_FMT_NV12C, - MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C, - MSM_VIDC_FMT_NV12C}, - - {PIX_FMTS, DEC, VP9, - MSM_VIDC_FMT_NV12, - MSM_VIDC_FMT_TP10C, - MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C | - MSM_VIDC_FMT_P010 | MSM_VIDC_FMT_TP10C, - MSM_VIDC_FMT_NV12C}, - - {MIN_BUFFERS_INPUT, ENC|DEC, CODECS_ALL, 0, 64, 1, 4, - V4L2_CID_MIN_BUFFERS_FOR_OUTPUT}, - {MIN_BUFFERS_OUTPUT, ENC|DEC, CODECS_ALL, - 0, 64, 1, 4, - V4L2_CID_MIN_BUFFERS_FOR_CAPTURE, - HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT, - CAP_FLAG_OUTPUT_PORT}, - - /* (4096 * 2304) / 256 */ - {MBPF, ENC, CODECS_ALL, 64, 36864, 1, 36864}, - /* (4096 * 2304) / 256 */ - {MBPF, DEC, CODECS_ALL, 36, 36864, 1, 36864}, - /* (4096 * 2304) / 256 */ - {LOSSLESS_MBPF, ENC, H264|HEVC, 64, 36864, 1, 36864}, - /* Batch Mode Decode */ - /* (1920 * 1088) / 256 */ - {BATCH_MBPF, DEC, H264|HEVC|VP9, 64, 8160, 1, 8160}, - {BATCH_FPS, DEC, H264|HEVC|VP9, 1, 120, 1, 60}, - /* (4096 * 2304) / 256 */ - {SECURE_MBPF, ENC|DEC, H264|HEVC|VP9, 64, 36864, 1, 36864}, - /* ((4096 * 2304) / 256) * 60 fps */ - {MBPS, ENC, CODECS_ALL, 64, 2211840, 1, 2211840}, - /* ((4096 * 2304) / 256) * 60 fps */ - {MBPS, DEC, CODECS_ALL, 36, 2211840, 1, 2211840}, - /* ((1920 * 1088) / 256) * 30 fps */ - {POWER_SAVE_MBPS, ENC, CODECS_ALL, 0, 244800, 1, 244800}, - - {FRAME_RATE, ENC, CODECS_ALL, - (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), - 1, (DEFAULT_FPS << 16), - 0, - HFI_PROP_FRAME_RATE, - CAP_FLAG_OUTPUT_PORT, - {0}, {0}, - NULL, msm_vidc_set_q16}, - - {FRAME_RATE, DEC, CODECS_ALL, - (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), - 1, (DEFAULT_FPS << 16)}, - - {FRAME_RATE, DEC, VP9, - (MINIMUM_FPS << 16), (MAXIMUM_VP9_FPS << 16), - 1, (DEFAULT_FPS << 16)}, - - {OPERATING_RATE, ENC|DEC, CODECS_ALL, - (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), - 1, (DEFAULT_FPS << 16)}, - - {OPERATING_RATE, DEC, VP9, - (MINIMUM_FPS << 16), (MAXIMUM_VP9_FPS << 16), - 1, (DEFAULT_FPS << 16)}, - - {SCALE_FACTOR, ENC, H264|HEVC, 1, 8, 1, 8}, - - {MB_CYCLES_VSP, ENC, CODECS_ALL, 25, 25, 1, 25}, - {MB_CYCLES_VSP, DEC, CODECS_ALL, 25, 25, 1, 25}, - {MB_CYCLES_VSP, DEC, VP9, 60, 60, 1, 60}, - {MB_CYCLES_VPP, ENC, CODECS_ALL, 675, 675, 1, 675}, - {MB_CYCLES_VPP, DEC, CODECS_ALL, 200, 200, 1, 200}, - {MB_CYCLES_LP, ENC, CODECS_ALL, 320, 320, 1, 320}, - {MB_CYCLES_LP, DEC, CODECS_ALL, 200, 200, 1, 200}, - {MB_CYCLES_FW, ENC|DEC, CODECS_ALL, 326389, 326389, 1, 326389}, - {MB_CYCLES_FW_VPP, ENC|DEC, CODECS_ALL, 44156, 44156, 1, 44156}, - - {SECURE_MODE, ENC|DEC, H264|HEVC|VP9, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_SECURE, - HFI_PROP_SECURE, - CAP_FLAG_NONE, - {0}, - {0}, - NULL, msm_vidc_set_u32}, - - {HFLIP, ENC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_HFLIP, - HFI_PROP_FLIP, - CAP_FLAG_OUTPUT_PORT | - CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, - {0}, - {0}, - NULL, msm_vidc_set_flip}, - - {VFLIP, ENC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_VFLIP, - HFI_PROP_FLIP, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {0}, - {0}, - NULL, msm_vidc_set_flip}, - - {ROTATION, ENC, CODECS_ALL, - 0, 270, 90, 0, - V4L2_CID_ROTATE, - HFI_PROP_ROTATION, - CAP_FLAG_OUTPUT_PORT, - {0}, - {0}, - NULL, msm_vidc_set_rotation}, - - {SUPER_FRAME, ENC, H264|HEVC, - 0, 32, 1, 0, - V4L2_CID_MPEG_VIDC_SUPERFRAME, 0, - CAP_FLAG_NONE, - {0}, - {INPUT_BUF_HOST_MAX_COUNT, OUTPUT_BUF_HOST_MAX_COUNT}, - NULL, NULL}, - - {SLICE_INTERFACE, DEC, CODECS_ALL, - 0, 0, 0, 0, - V4L2_CID_MPEG_VIDEO_DECODER_SLICE_INTERFACE, - 0}, - - {HEADER_MODE, ENC, CODECS_ALL, - V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE, - V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME, - BIT(V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE) | - BIT(V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME), - V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE, - V4L2_CID_MPEG_VIDEO_HEADER_MODE, - HFI_PROP_SEQ_HEADER_MODE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, {0}, - NULL, msm_vidc_set_header_mode}, - - {PREPEND_SPSPPS_TO_IDR, ENC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDEO_PREPEND_SPSPPS_TO_IDR}, - - {META_SEQ_HDR_NAL, ENC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_SEQ_HEADER_NAL}, - - {WITHOUT_STARTCODE, ENC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE, - HFI_PROP_NAL_LENGTH_FIELD, - CAP_FLAG_OUTPUT_PORT, - {0}, {0}, - NULL, msm_vidc_set_nal_length}, - - {NAL_LENGTH_FIELD, ENC, CODECS_ALL, - V4L2_MPEG_VIDEO_HEVC_SIZE_0, - V4L2_MPEG_VIDEO_HEVC_SIZE_4, - BIT(V4L2_MPEG_VIDEO_HEVC_SIZE_0) | - BIT(V4L2_MPEG_VIDEO_HEVC_SIZE_4), - V4L2_MPEG_VIDEO_HEVC_SIZE_0, - V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD, - HFI_PROP_NAL_LENGTH_FIELD, - CAP_FLAG_MENU | CAP_FLAG_OUTPUT_PORT}, - - /* TODO: Firmware introduced enumeration type for this - * with and without seq header. - */ - {REQUEST_I_FRAME, ENC, H264|HEVC, - 0, 0, 0, 0, - V4L2_CID_MPEG_VIDEO_FORCE_KEY_FRAME, - HFI_PROP_REQUEST_SYNC_FRAME, - CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - NULL, msm_vidc_set_req_sync_frame}, - - /* Enc: Keeping CABAC and CAVLC as same bitrate. - * Dec: there's no use of Bitrate cap - */ - {BIT_RATE, ENC, H264|HEVC, - 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_BITRATE, - HFI_PROP_TOTAL_BITRATE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {ENH_LAYER_COUNT, BITRATE_MODE}, {PEAK_BITRATE}, - msm_vidc_adjust_bitrate, msm_vidc_set_bitrate}, - - {BITRATE_MODE, ENC, H264, - V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, - V4L2_MPEG_VIDEO_BITRATE_MODE_CBR, - BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_VBR) | - BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CBR), - V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, - V4L2_CID_MPEG_VIDEO_BITRATE_MODE, - HFI_PROP_RATE_CONTROL, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, - {LTR_COUNT, IR_RANDOM, TIME_DELTA_BASED_RC, I_FRAME_QP, - P_FRAME_QP, B_FRAME_QP, ENH_LAYER_COUNT, BIT_RATE, - CONTENT_ADAPTIVE_CODING, BITRATE_BOOST, MIN_QUALITY, - VBV_DELAY, PEAK_BITRATE,SLICE_MODE, META_ROI_INFO, - BLUR_TYPES, LOWLATENCY_MODE}, - msm_vidc_adjust_bitrate_mode, msm_vidc_set_u32_enum}, - - {BITRATE_MODE, ENC, HEVC, - V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, - V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, - BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_VBR) | - BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CBR) | - BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CQ), - V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, - V4L2_CID_MPEG_VIDEO_BITRATE_MODE, - HFI_PROP_RATE_CONTROL, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, - {LTR_COUNT, IR_RANDOM, TIME_DELTA_BASED_RC, I_FRAME_QP, - P_FRAME_QP, B_FRAME_QP, CONSTANT_QUALITY, ENH_LAYER_COUNT, - CONTENT_ADAPTIVE_CODING, BIT_RATE, - BITRATE_BOOST, MIN_QUALITY, VBV_DELAY, - PEAK_BITRATE, SLICE_MODE, META_ROI_INFO, BLUR_TYPES, - LOWLATENCY_MODE}, - msm_vidc_adjust_bitrate_mode, msm_vidc_set_u32_enum}, - - {LOSSLESS, ENC, HEVC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU}, - - {FRAME_SKIP_MODE, ENC, H264|HEVC|HEIC, - V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED, - V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT, - BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED) | - BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_LEVEL_LIMIT) | - BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT), - V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED, - V4L2_CID_MPEG_VIDEO_FRAME_SKIP_MODE, - 0, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {FRAME_RC_ENABLE, ENC, H264|HEVC|HEIC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_ENABLE, - V4L2_CID_MPEG_VIDEO_FRAME_RC_ENABLE}, - - {CONSTANT_QUALITY, ENC, HEVC, - 1, MAX_CONSTANT_QUALITY, 1, 90, - V4L2_CID_MPEG_VIDEO_CONSTANT_QUALITY, - HFI_PROP_CONSTANT_QUALITY, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {BITRATE_MODE}, {0}, - NULL, msm_vidc_set_constant_quality}, - - {GOP_SIZE, ENC, CODECS_ALL, - 0, INT_MAX, 1, 2 * DEFAULT_FPS - 1, - V4L2_CID_MPEG_VIDEO_GOP_SIZE, - HFI_PROP_MAX_GOP_FRAMES, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {ENH_LAYER_COUNT}, - {ALL_INTRA}, - msm_vidc_adjust_gop_size, msm_vidc_set_gop_size}, - - {GOP_CLOSURE, ENC, H264|HEVC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_ENABLE, - V4L2_CID_MPEG_VIDEO_GOP_CLOSURE, - 0}, - - {B_FRAME, ENC, H264|HEVC, - 0, 7, 1, 0, - V4L2_CID_MPEG_VIDEO_B_FRAMES, - HFI_PROP_MAX_B_FRAMES, - CAP_FLAG_OUTPUT_PORT, - {ENH_LAYER_COUNT}, - {ALL_INTRA}, - msm_vidc_adjust_b_frame, msm_vidc_set_u32}, - - {BLUR_TYPES, ENC, H264|HEVC, - VIDC_BLUR_NONE, VIDC_BLUR_ADAPTIVE, - BIT(VIDC_BLUR_NONE) | BIT(VIDC_BLUR_EXTERNAL) | BIT(VIDC_BLUR_ADAPTIVE), - VIDC_BLUR_ADAPTIVE, - V4L2_CID_MPEG_VIDC_VIDEO_BLUR_TYPES, - HFI_PROP_BLUR_TYPES, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {PIX_FMTS, BITRATE_MODE, CONTENT_ADAPTIVE_CODING, MIN_QUALITY}, - {BLUR_RESOLUTION}, - msm_vidc_adjust_blur_type, msm_vidc_set_u32_enum}, - - {BLUR_RESOLUTION, ENC, CODECS_ALL, - 0, S32_MAX, 1, 0, - V4L2_CID_MPEG_VIDC_VIDEO_BLUR_RESOLUTION, - HFI_PROP_BLUR_RESOLUTION, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {BLUR_TYPES}, - {0}, - msm_vidc_adjust_blur_resolution, msm_vidc_set_blur_resolution}, - - {CSC, ENC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - 0, - HFI_PROP_CSC}, - - {CSC_CUSTOM_MATRIX, ENC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_VIDEO_VPE_CSC_CUSTOM_MATRIX, - HFI_PROP_CSC_MATRIX, - CAP_FLAG_OUTPUT_PORT, - {0}, {0}, - NULL, msm_vidc_set_csc_custom_matrix}, - - {LOWLATENCY_MODE, ENC, H264 | HEVC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_LOWLATENCY_REQUEST, - 0, - CAP_FLAG_NONE, - {BITRATE_MODE}, - {STAGE}, - msm_vidc_adjust_lowlatency_mode, NULL}, - - {LOWLATENCY_MODE, DEC, H264|HEVC|VP9, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_LOWLATENCY_REQUEST, - HFI_PROP_SEQ_CHANGE_AT_SYNC_FRAME, - CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - - {LTR_COUNT, ENC, H264|HEVC, - 0, 2, 1, 0, - V4L2_CID_MPEG_VIDEO_LTR_COUNT, - HFI_PROP_LTR_COUNT, - CAP_FLAG_OUTPUT_PORT, - {BITRATE_MODE, ALL_INTRA}, {0}, - msm_vidc_adjust_ltr_count, msm_vidc_set_u32}, - - {USE_LTR, ENC, H264|HEVC, - INVALID_DEFAULT_MARK_OR_USE_LTR, - ((1 << MAX_LTR_FRAME_COUNT) - 1), - 1, INVALID_DEFAULT_MARK_OR_USE_LTR, - V4L2_CID_MPEG_VIDEO_USE_LTR_FRAMES, - HFI_PROP_LTR_USE, - CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - msm_vidc_adjust_use_ltr, msm_vidc_set_use_and_mark_ltr}, - - {MARK_LTR, ENC, H264|HEVC, - INVALID_DEFAULT_MARK_OR_USE_LTR, - (MAX_LTR_FRAME_COUNT - 1), - 1, INVALID_DEFAULT_MARK_OR_USE_LTR, - V4L2_CID_MPEG_VIDEO_FRAME_LTR_INDEX, - HFI_PROP_LTR_MARK, - CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - msm_vidc_adjust_mark_ltr, msm_vidc_set_use_and_mark_ltr}, - - {BASELAYER_PRIORITY, ENC, H264, - 0, MAX_BASE_LAYER_PRIORITY_ID, 1, 0, - V4L2_CID_MPEG_VIDEO_BASELAYER_PRIORITY_ID, - HFI_PROP_BASELAYER_PRIORITYID, - CAP_FLAG_OUTPUT_PORT}, - - {IR_RANDOM, ENC, H264|HEVC, - 0, INT_MAX, 1, 0, - V4L2_CID_MPEG_VIDC_INTRA_REFRESH_PERIOD, - HFI_PROP_IR_RANDOM_PERIOD, - CAP_FLAG_OUTPUT_PORT, - {BITRATE_MODE, ALL_INTRA}, {0}, - msm_vidc_adjust_ir_random, msm_vidc_set_u32}, - - {AU_DELIMITER, ENC, H264|HEVC, - V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDEO_AU_DELIMITER, - HFI_PROP_AUD, - CAP_FLAG_OUTPUT_PORT, - {0}, {0}, - NULL, msm_vidc_set_u32}, - - {TIME_DELTA_BASED_RC, ENC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_ENABLE, - V4L2_CID_MPEG_VIDC_TIME_DELTA_BASED_RC, - HFI_PROP_TIME_DELTA_BASED_RATE_CONTROL, - CAP_FLAG_OUTPUT_PORT, - {BITRATE_MODE}, {0}, - msm_vidc_adjust_delta_based_rc, msm_vidc_set_u32}, - - {CONTENT_ADAPTIVE_CODING, ENC, H264|HEVC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_ENABLE, - V4L2_CID_MPEG_VIDC_CONTENT_ADAPTIVE_CODING, - HFI_PROP_CONTENT_ADAPTIVE_CODING, - CAP_FLAG_OUTPUT_PORT, - {BITRATE_MODE, MIN_QUALITY}, - {BLUR_TYPES}, - msm_vidc_adjust_cac, - msm_vidc_set_vbr_related_properties}, - - {BITRATE_BOOST, ENC, H264|HEVC, - 0, MAX_BITRATE_BOOST, 25, MAX_BITRATE_BOOST, - V4L2_CID_MPEG_VIDC_QUALITY_BITRATE_BOOST, - HFI_PROP_BITRATE_BOOST, - CAP_FLAG_OUTPUT_PORT, - {BITRATE_MODE, MIN_QUALITY}, - {0}, - msm_vidc_adjust_bitrate_boost, - msm_vidc_set_vbr_related_properties}, - - {MIN_QUALITY, ENC, H264, - 0, MAX_SUPPORTED_MIN_QUALITY, 70, MAX_SUPPORTED_MIN_QUALITY, - 0, - HFI_PROP_MAINTAIN_MIN_QUALITY, - CAP_FLAG_OUTPUT_PORT, - {BITRATE_MODE, ENH_LAYER_COUNT, META_ROI_INFO}, - {CONTENT_ADAPTIVE_CODING, BITRATE_BOOST, BLUR_TYPES}, - msm_vidc_adjust_min_quality, - msm_vidc_set_vbr_related_properties}, - - {MIN_QUALITY, ENC, HEVC, - 0, MAX_SUPPORTED_MIN_QUALITY, 70, MAX_SUPPORTED_MIN_QUALITY, - 0, - HFI_PROP_MAINTAIN_MIN_QUALITY, - CAP_FLAG_OUTPUT_PORT, - {BITRATE_MODE, PIX_FMTS, ENH_LAYER_COUNT, - META_ROI_INFO}, - {CONTENT_ADAPTIVE_CODING, BITRATE_BOOST, BLUR_TYPES}, - msm_vidc_adjust_min_quality, - msm_vidc_set_vbr_related_properties}, - - {VBV_DELAY, ENC, H264|HEVC, - 200, 300, 100, 300, - V4L2_CID_MPEG_VIDEO_VBV_DELAY, - HFI_PROP_VBV_DELAY, - CAP_FLAG_OUTPUT_PORT, - {BITRATE_MODE}, - {0}, - NULL, msm_vidc_set_cbr_related_properties}, - - {PEAK_BITRATE, ENC, H264|HEVC, - /* default peak bitrate is 10% larger than avrg bitrate */ - 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_BITRATE_PEAK, - HFI_PROP_TOTAL_PEAK_BITRATE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {BITRATE_MODE, BIT_RATE}, - {0}, - msm_vidc_adjust_peak_bitrate, - msm_vidc_set_cbr_related_properties}, - - {MIN_FRAME_QP, ENC, H264, - MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, - V4L2_CID_MPEG_VIDEO_H264_MIN_QP, - HFI_PROP_MIN_QP_PACKED, - CAP_FLAG_OUTPUT_PORT, - {0}, {0}, - NULL, msm_vidc_set_min_qp}, - - {MIN_FRAME_QP, ENC, HEVC|HEIC, - MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, - V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP, - HFI_PROP_MIN_QP_PACKED, - CAP_FLAG_OUTPUT_PORT, - {PIX_FMTS}, {0}, - msm_vidc_adjust_hevc_min_qp, msm_vidc_set_min_qp}, - - {I_FRAME_MIN_QP, ENC, H264, - MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, - V4L2_CID_MPEG_VIDEO_H264_I_FRAME_MIN_QP}, - - {I_FRAME_MIN_QP, ENC, HEVC|HEIC, - MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, - V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_MIN_QP}, - - {P_FRAME_MIN_QP, ENC, H264, - MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, - V4L2_CID_MPEG_VIDEO_H264_P_FRAME_MIN_QP}, - - {P_FRAME_MIN_QP, ENC, HEVC|HEIC, - MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, - V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_MIN_QP}, - - {B_FRAME_MIN_QP, ENC, H264, - MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, - V4L2_CID_MPEG_VIDEO_H264_B_FRAME_MIN_QP}, - - {B_FRAME_MIN_QP, ENC, HEVC|HEIC, - MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, - V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_MIN_QP}, - - {MAX_FRAME_QP, ENC, H264, - MIN_QP_8BIT, MAX_QP, 1, MAX_QP, - V4L2_CID_MPEG_VIDEO_H264_MAX_QP, - HFI_PROP_MAX_QP_PACKED, - CAP_FLAG_OUTPUT_PORT, - {0}, {0}, - NULL, msm_vidc_set_max_qp}, - - {MAX_FRAME_QP, ENC, HEVC|HEIC, - MIN_QP_10BIT, MAX_QP, 1, MAX_QP, - V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP, - HFI_PROP_MAX_QP_PACKED, - CAP_FLAG_OUTPUT_PORT, - {PIX_FMTS}, {0}, - msm_vidc_adjust_hevc_max_qp, msm_vidc_set_max_qp}, - - {I_FRAME_MAX_QP, ENC, H264, - MIN_QP_8BIT, MAX_QP, 1, MAX_QP, - V4L2_CID_MPEG_VIDEO_H264_I_FRAME_MAX_QP}, - - {I_FRAME_MAX_QP, ENC, HEVC|HEIC, - MIN_QP_10BIT, MAX_QP, 1, MAX_QP, - V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_MAX_QP}, - - {P_FRAME_MAX_QP, ENC, H264, - MIN_QP_8BIT, MAX_QP, 1, MAX_QP, - V4L2_CID_MPEG_VIDEO_H264_P_FRAME_MAX_QP}, - - {P_FRAME_MAX_QP, ENC, HEVC|HEIC, - MIN_QP_10BIT, MAX_QP, 1, MAX_QP, - V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_MAX_QP}, - - {B_FRAME_MAX_QP, ENC, H264, - MIN_QP_8BIT, MAX_QP, 1, MAX_QP, - V4L2_CID_MPEG_VIDEO_H264_B_FRAME_MAX_QP}, - - {B_FRAME_MAX_QP, ENC, HEVC|HEIC, - MIN_QP_10BIT, MAX_QP, 1, MAX_QP, - V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_MAX_QP}, - - {I_FRAME_QP, ENC, HEVC, - MIN_QP_10BIT, MAX_QP, 1, DEFAULT_QP, - V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP, - HFI_PROP_QP_PACKED, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {PIX_FMTS, BITRATE_MODE}, {0}, - msm_vidc_adjust_hevc_i_frame_qp, msm_vidc_set_frame_qp}, - - {I_FRAME_QP, ENC, H264, - MIN_QP_8BIT, MAX_QP, 1, DEFAULT_QP, - V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP, - HFI_PROP_QP_PACKED, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {BITRATE_MODE}, {0}, - NULL, msm_vidc_set_frame_qp}, - - {P_FRAME_QP, ENC, HEVC, - MIN_QP_10BIT, MAX_QP, 1, DEFAULT_QP, - V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP, - HFI_PROP_QP_PACKED, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {PIX_FMTS, BITRATE_MODE}, {0}, - msm_vidc_adjust_hevc_p_frame_qp, msm_vidc_set_frame_qp}, - - {P_FRAME_QP, ENC, H264, - MIN_QP_8BIT, MAX_QP, 1, DEFAULT_QP, - V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP, - HFI_PROP_QP_PACKED, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {BITRATE_MODE}, {0}, - NULL, msm_vidc_set_frame_qp}, - - {B_FRAME_QP, ENC, HEVC, - MIN_QP_10BIT, MAX_QP, 1, DEFAULT_QP, - V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP, - HFI_PROP_QP_PACKED, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {PIX_FMTS, BITRATE_MODE}, {0}, - msm_vidc_adjust_hevc_b_frame_qp, msm_vidc_set_frame_qp}, - - {B_FRAME_QP, ENC, H264, - MIN_QP_8BIT, MAX_QP, 1, DEFAULT_QP, - V4L2_CID_MPEG_VIDEO_H264_B_FRAME_QP, - HFI_PROP_QP_PACKED, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {BITRATE_MODE}, {0}, - NULL, msm_vidc_set_frame_qp}, - - {LAYER_TYPE, ENC, HEVC, - V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B, - V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P, - BIT(V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B) | - BIT(V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P), - V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P, - V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE, - HFI_PROP_LAYER_ENCODING_TYPE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {LAYER_TYPE, ENC, H264, - V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_B, - V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P, - BIT(V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_B) | - BIT(V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P), - V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P, - V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_TYPE, - HFI_PROP_LAYER_ENCODING_TYPE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {LAYER_ENABLE, ENC, H264, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING, - HFI_PROP_LAYER_ENCODING_TYPE, - CAP_FLAG_OUTPUT_PORT}, - - {ENH_LAYER_COUNT, ENC, HEVC, - 0, 5, 1, 0, - V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER, - HFI_PROP_LAYER_COUNT, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {BITRATE_MODE, META_EVA_STATS}, - {GOP_SIZE, B_FRAME, BIT_RATE, MIN_QUALITY}, - msm_vidc_adjust_layer_count, msm_vidc_set_layer_count_and_type}, - - {ENH_LAYER_COUNT, ENC, H264, - 0, 5, 1, 0, - V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_LAYER, - HFI_PROP_LAYER_COUNT, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {BITRATE_MODE, META_EVA_STATS}, - {GOP_SIZE, B_FRAME, BIT_RATE, MIN_QUALITY}, - msm_vidc_adjust_layer_count, msm_vidc_set_layer_count_and_type}, - - /* - * layer bitrate is treated as BIT_RATE cap sibling and - * is handled in bitrate adjust and set functions - */ - {L0_BR, ENC, HEVC, - 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L0_BR, - HFI_PROP_BITRATE_LAYER1, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, - - {L1_BR, ENC, HEVC, - 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L1_BR, - HFI_PROP_BITRATE_LAYER2, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, - - {L2_BR, ENC, HEVC, - 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L2_BR, - HFI_PROP_BITRATE_LAYER3, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, - - {L3_BR, ENC, HEVC, - 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L3_BR, - HFI_PROP_BITRATE_LAYER4, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, - - {L4_BR, ENC, HEVC, - 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L4_BR, - HFI_PROP_BITRATE_LAYER5, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, - - {L5_BR, ENC, HEVC, - 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L5_BR, - HFI_PROP_BITRATE_LAYER6, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, - - {L0_BR, ENC, H264, - 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L0_BR, - HFI_PROP_BITRATE_LAYER1, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, - - {L1_BR, ENC, H264, - 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L1_BR, - HFI_PROP_BITRATE_LAYER2, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, - - {L2_BR, ENC, H264, - 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L2_BR, - HFI_PROP_BITRATE_LAYER3, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, - - {L3_BR, ENC, H264, - 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L3_BR, - HFI_PROP_BITRATE_LAYER4, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, - - {L4_BR, ENC, H264, - 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L4_BR, - HFI_PROP_BITRATE_LAYER5, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, - - {L5_BR, ENC, H264, - 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L5_BR, - HFI_PROP_BITRATE_LAYER6, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, - - {ENTROPY_MODE, ENC, H264, - V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC, - V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, - BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC) | - BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC), - V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, - V4L2_CID_MPEG_VIDEO_H264_ENTROPY_MODE, - HFI_PROP_CABAC_SESSION, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {PROFILE}, - {0}, - msm_vidc_adjust_entropy_mode, msm_vidc_set_u32}, - - {ENTROPY_MODE, DEC, H264|HEVC|VP9, - V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC, - V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, - BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC) | - BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC), - V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, - 0, - HFI_PROP_CABAC_SESSION}, - - /* H264 does not support 10 bit, PIX_FMTS would not be a Parent for this */ - {PROFILE, ENC, H264, - V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE, - V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH, - BIT(V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE) | - BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH) | - BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_BASELINE) | - BIT(V4L2_MPEG_VIDEO_H264_PROFILE_MAIN) | - BIT(V4L2_MPEG_VIDEO_H264_PROFILE_HIGH), - V4L2_MPEG_VIDEO_H264_PROFILE_HIGH, - V4L2_CID_MPEG_VIDEO_H264_PROFILE, - HFI_PROP_PROFILE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, - {ENTROPY_MODE, TRANSFORM_8X8}, - NULL, msm_vidc_set_u32_enum}, - - {PROFILE, DEC, H264, - V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE, - V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH, - BIT(V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE) | - BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH) | - BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_BASELINE) | - BIT(V4L2_MPEG_VIDEO_H264_PROFILE_MAIN) | - BIT(V4L2_MPEG_VIDEO_H264_PROFILE_HIGH), - V4L2_MPEG_VIDEO_H264_PROFILE_HIGH, - V4L2_CID_MPEG_VIDEO_H264_PROFILE, - HFI_PROP_PROFILE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, - {ENTROPY_MODE}, - NULL, msm_vidc_set_u32_enum}, - - {PROFILE, ENC|DEC, HEVC|HEIC, - V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN, - V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE, - BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN) | - BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE) | - BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10) | - BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE), - V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN, - V4L2_CID_MPEG_VIDEO_HEVC_PROFILE, - HFI_PROP_PROFILE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {PIX_FMTS}, - {0}, - msm_vidc_adjust_profile, msm_vidc_set_u32_enum}, - - {PROFILE, DEC, VP9, - V4L2_MPEG_VIDEO_VP9_PROFILE_0, - V4L2_MPEG_VIDEO_VP9_PROFILE_2, - BIT(V4L2_MPEG_VIDEO_VP9_PROFILE_0) | - BIT(V4L2_MPEG_VIDEO_VP9_PROFILE_2), - V4L2_MPEG_VIDEO_VP9_PROFILE_0, - V4L2_CID_MPEG_VIDEO_VP9_PROFILE, - HFI_PROP_PROFILE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, - {0}, - NULL, msm_vidc_set_u32_enum}, - - {LEVEL, DEC, VP9, - V4L2_MPEG_VIDEO_VP9_LEVEL_1_0, - V4L2_MPEG_VIDEO_VP9_LEVEL_5_2, - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_1_0) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_1_1) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_2_0) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_2_1) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_3_0) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_3_1) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_4_0) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_4_1) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_0) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_1) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_2), - V4L2_MPEG_VIDEO_VP9_LEVEL_5_2, - V4L2_CID_MPEG_VIDEO_VP9_LEVEL, - HFI_PROP_LEVEL, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, - {0}, - NULL, msm_vidc_set_u32_enum}, - - {LEVEL, DEC, H264, - V4L2_MPEG_VIDEO_H264_LEVEL_1_0, - V4L2_MPEG_VIDEO_H264_LEVEL_6_0, - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1B) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_3) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_0), - V4L2_MPEG_VIDEO_H264_LEVEL_6_0, - V4L2_CID_MPEG_VIDEO_H264_LEVEL, - HFI_PROP_LEVEL, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, - {0}, - NULL, msm_vidc_set_u32_enum}, - - {LEVEL, ENC, H264, - V4L2_MPEG_VIDEO_H264_LEVEL_1_0, - V4L2_MPEG_VIDEO_H264_LEVEL_6_0, - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1B) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_3) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_0), - V4L2_MPEG_VIDEO_H264_LEVEL_6_0, - V4L2_CID_MPEG_VIDEO_H264_LEVEL, - HFI_PROP_LEVEL, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, - {0}, - NULL, msm_vidc_set_level}, - - {LEVEL, DEC, HEVC|HEIC, - V4L2_MPEG_VIDEO_HEVC_LEVEL_1, - V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2, - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2), - V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2, - V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, - HFI_PROP_LEVEL, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, - {0}, - NULL, msm_vidc_set_u32_enum}, - - {LEVEL, ENC, HEVC|HEIC, - V4L2_MPEG_VIDEO_HEVC_LEVEL_1, - V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2, - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2), - V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2, - V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, - HFI_PROP_LEVEL, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, - {0}, - NULL, msm_vidc_set_level}, - - /* TODO: Bring the VP9 Level upstream GKI change, and level cap here: - * go/videogki - */ - - {HEVC_TIER, ENC|DEC, HEVC, - V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, - V4L2_MPEG_VIDEO_HEVC_TIER_HIGH, - BIT(V4L2_MPEG_VIDEO_HEVC_TIER_MAIN) | - BIT(V4L2_MPEG_VIDEO_HEVC_TIER_HIGH), - V4L2_MPEG_VIDEO_HEVC_TIER_HIGH, - V4L2_CID_MPEG_VIDEO_HEVC_TIER, - HFI_PROP_TIER, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, - {0}, - NULL, msm_vidc_set_u32_enum}, - - {LF_MODE, ENC, H264, - V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED, - DB_H264_DISABLE_SLICE_BOUNDARY, - BIT(V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED) | - BIT(V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_DISABLED) | - BIT(DB_H264_DISABLE_SLICE_BOUNDARY), - V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED, - V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_MODE, - HFI_PROP_DEBLOCKING_MODE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, {0}, - NULL, msm_vidc_set_deblock_mode}, - - {LF_MODE, ENC, HEVC|HEIC, - V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_DISABLED, - DB_HEVC_DISABLE_SLICE_BOUNDARY, - BIT(V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_DISABLED) | - BIT(V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_ENABLED) | - BIT(DB_HEVC_DISABLE_SLICE_BOUNDARY), - V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_ENABLED, - V4L2_CID_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE, - HFI_PROP_DEBLOCKING_MODE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, {0}, - NULL, msm_vidc_set_deblock_mode}, - - {LF_ALPHA, ENC, H264, - -6, 6, 1, 0, - V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_ALPHA}, - - {LF_ALPHA, ENC, HEVC|HEIC, - -6, 6, 1, 0, - V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2}, - - {LF_BETA, ENC, H264, - -6, 6, 1, 0, - V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_BETA}, - - {LF_BETA, ENC, HEVC|HEIC, - -6, 6, 1, 0, - V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2}, - - {SLICE_MODE, ENC, H264|HEVC|HEIC, - V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, - V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_BYTES, - BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE) | - BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_MB) | - BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_BYTES), - V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, - V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE, - 0, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {BITRATE_MODE, ALL_INTRA}, {0}, - msm_vidc_adjust_slice_count, msm_vidc_set_slice_count}, - - {SLICE_MAX_BYTES, ENC, H264|HEVC|HEIC, - MIN_SLICE_BYTE_SIZE, MAX_SLICE_BYTE_SIZE_V1, - 1, MIN_SLICE_BYTE_SIZE, - V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES, - HFI_PROP_MULTI_SLICE_BYTES_COUNT, - CAP_FLAG_OUTPUT_PORT}, - - {SLICE_MAX_MB, ENC, H264|HEVC|HEIC, - 1, MAX_SLICE_MB_SIZE, 1, 1, - V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB, - HFI_PROP_MULTI_SLICE_MB_COUNT, - CAP_FLAG_OUTPUT_PORT}, - - // TODO: MB level RC - mapping - {MB_RC, ENC, H264|HEVC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_ENABLE, - V4L2_CID_MPEG_VIDEO_MB_RC_ENABLE, - 0, - CAP_FLAG_OUTPUT_PORT}, - - {TRANSFORM_8X8, ENC, H264, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_ENABLE, - V4L2_CID_MPEG_VIDEO_H264_8X8_TRANSFORM, - HFI_PROP_8X8_TRANSFORM, - CAP_FLAG_OUTPUT_PORT, - {PROFILE}, {0}, - msm_vidc_adjust_transform_8x8, msm_vidc_set_u32}, - - {CHROMA_QP_INDEX_OFFSET, ENC, HEVC, - MIN_CHROMA_QP_OFFSET, MAX_CHROMA_QP_OFFSET, - 1, MAX_CHROMA_QP_OFFSET, - V4L2_CID_MPEG_VIDEO_H264_CHROMA_QP_INDEX_OFFSET, - HFI_PROP_CHROMA_QP_OFFSET, - CAP_FLAG_OUTPUT_PORT, - {0}, {0}, - msm_vidc_adjust_chroma_qp_index_offset, - msm_vidc_set_chroma_qp_index_offset}, - - {DISPLAY_DELAY_ENABLE, DEC, H264|HEVC|VP9, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY_ENABLE, - HFI_PROP_DECODE_ORDER_OUTPUT, - CAP_FLAG_INPUT_PORT, - {0}, {OUTPUT_ORDER}, - NULL, NULL}, - - {DISPLAY_DELAY, DEC, H264|HEVC|VP9, - 0, 1, 1, 0, - V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY, - HFI_PROP_DECODE_ORDER_OUTPUT, - CAP_FLAG_INPUT_PORT, - {0}, {OUTPUT_ORDER}, - NULL, NULL}, - - {OUTPUT_ORDER, DEC, H264|HEVC|VP9, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - 0, - HFI_PROP_DECODE_ORDER_OUTPUT, - CAP_FLAG_INPUT_PORT, - {THUMBNAIL_MODE, DISPLAY_DELAY, DISPLAY_DELAY_ENABLE}, - {0}, - msm_vidc_adjust_output_order, msm_vidc_set_u32}, - - {INPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL, - DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT, - 1, DEFAULT_MAX_HOST_BUF_COUNT, - 0, - HFI_PROP_BUFFER_HOST_MAX_COUNT, - CAP_FLAG_INPUT_PORT, - {0}, {0}, - msm_vidc_adjust_input_buf_host_max_count, msm_vidc_set_u32}, - - {INPUT_BUF_HOST_MAX_COUNT, ENC, H264|HEVC, - DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT, - 1, DEFAULT_MAX_HOST_BUF_COUNT, - 0, - HFI_PROP_BUFFER_HOST_MAX_COUNT, - CAP_FLAG_INPUT_PORT, - {SUPER_FRAME}, {0}, - msm_vidc_adjust_input_buf_host_max_count, msm_vidc_set_u32}, - - {OUTPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL, - DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT, - 1, DEFAULT_MAX_HOST_BUF_COUNT, - 0, - HFI_PROP_BUFFER_HOST_MAX_COUNT, - CAP_FLAG_OUTPUT_PORT, - {0}, {0}, - msm_vidc_adjust_output_buf_host_max_count, msm_vidc_set_u32}, - - {OUTPUT_BUF_HOST_MAX_COUNT, ENC, H264|HEVC, - DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT, - 1, DEFAULT_MAX_HOST_BUF_COUNT, - 0, - HFI_PROP_BUFFER_HOST_MAX_COUNT, - CAP_FLAG_OUTPUT_PORT, - {SUPER_FRAME}, {0}, - msm_vidc_adjust_output_buf_host_max_count, msm_vidc_set_u32}, - - /* conceal color */ - {CONCEAL_COLOR_8BIT, DEC, CODECS_ALL, 0x0, 0xff3fcff, 1, - DEFAULT_VIDEO_CONCEAL_COLOR_BLACK, - V4L2_CID_MPEG_VIDEO_MUTE_YUV, - HFI_PROP_CONCEAL_COLOR_8BIT, - CAP_FLAG_INPUT_PORT, - {0}, {0}, - NULL, msm_vidc_set_u32_packed}, - - {CONCEAL_COLOR_10BIT, DEC, CODECS_ALL, 0x0, 0x3fffffff, 1, - DEFAULT_VIDEO_CONCEAL_COLOR_BLACK, - V4L2_CID_MPEG_VIDEO_MUTE_YUV, - HFI_PROP_CONCEAL_COLOR_10BIT, - CAP_FLAG_INPUT_PORT, - {0}, {0}, - NULL, msm_vidc_set_u32_packed}, - - // TODO - {STAGE, DEC|ENC, CODECS_ALL, - MSM_VIDC_STAGE_1, - MSM_VIDC_STAGE_2, 1, - MSM_VIDC_STAGE_2, - 0, - HFI_PROP_STAGE, - 0, - {0}, {0}, - NULL, msm_vidc_set_stage}, - - {STAGE, ENC, H264 | HEVC, - MSM_VIDC_STAGE_1, - MSM_VIDC_STAGE_2, 1, - MSM_VIDC_STAGE_2, - 0, - HFI_PROP_STAGE, - CAP_FLAG_NONE, - {LOWLATENCY_MODE}, {0}, - NULL, msm_vidc_set_stage}, - - {PIPE, DEC|ENC, CODECS_ALL, - MSM_VIDC_PIPE_1, - MSM_VIDC_PIPE_2, 1, - MSM_VIDC_PIPE_2, - 0, - HFI_PROP_PIPE, - 0, - {0}, {0}, - NULL, msm_vidc_set_pipe}, - {POC, DEC, H264, 0, 18, 1, 1}, - {QUALITY_MODE, ENC, CODECS_ALL, - MSM_VIDC_MAX_QUALITY_MODE, - MSM_VIDC_POWER_SAVE_MODE, 1, - MSM_VIDC_POWER_SAVE_MODE}, - - {CODED_FRAMES, DEC, H264|HEVC|HEIC, - CODED_FRAMES_PROGRESSIVE, CODED_FRAMES_INTERLACE, - 1, CODED_FRAMES_PROGRESSIVE, - 0, - HFI_PROP_CODED_FRAMES}, - - {BIT_DEPTH, DEC, CODECS_ALL, BIT_DEPTH_8, BIT_DEPTH_10, 1, BIT_DEPTH_8, - 0, - HFI_PROP_LUMA_CHROMA_BIT_DEPTH}, - - {CODEC_CONFIG, DEC, H264|HEVC|HEIC, 0, 1, 1, 0, - V4L2_CID_MPEG_VIDC_CODEC_CONFIG, 0, - CAP_FLAG_DYNAMIC_ALLOWED}, - - {BITSTREAM_SIZE_OVERWRITE, DEC, CODECS_ALL, 0, INT_MAX, 1, 0, - V4L2_CID_MPEG_VIDC_MIN_BITSTREAM_SIZE_OVERWRITE}, - - {THUMBNAIL_MODE, DEC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_THUMBNAIL_MODE, - HFI_PROP_THUMBNAIL_MODE, - CAP_FLAG_INPUT_PORT, - {0}, {OUTPUT_ORDER}, - NULL, msm_vidc_set_u32}, - - {DEFAULT_HEADER, DEC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - 0, - HFI_PROP_DEC_DEFAULT_HEADER}, - - {RAP_FRAME, DEC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_ENABLE, - 0, - HFI_PROP_DEC_START_FROM_RAP_FRAME, - CAP_FLAG_INPUT_PORT, - {0}, {0}, - NULL, msm_vidc_set_u32}, - - {SEQ_CHANGE_AT_SYNC_FRAME, DEC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_ENABLE, - 0, - HFI_PROP_SEQ_CHANGE_AT_SYNC_FRAME, - CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - - {PRIORITY, DEC|ENC, CODECS_ALL, - 0, 2, 1, 1, - V4L2_CID_MPEG_VIDC_PRIORITY, - HFI_PROP_SESSION_PRIORITY, - CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - msm_vidc_adjust_session_priority, msm_vidc_set_session_priority}, - - {ENC_IP_CR, ENC, CODECS_ALL, - 0, S32_MAX, 1, 0, - V4L2_CID_MPEG_VIDC_ENC_INPUT_COMPRESSION_RATIO, - 0, CAP_FLAG_DYNAMIC_ALLOWED}, - - {DPB_LIST, DEC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - 0, - HFI_PROP_DPB_LIST, - CAP_FLAG_OUTPUT_PORT, - {0}, {0}, - NULL, NULL}, - - {ALL_INTRA, ENC, H264|HEVC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - 0, - 0, - CAP_FLAG_OUTPUT_PORT, - {GOP_SIZE, B_FRAME}, - {LTR_COUNT, IR_RANDOM, SLICE_MODE}, - msm_vidc_adjust_all_intra, NULL}, - - {META_LTR_MARK_USE, ENC, H264|HEVC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_LTR_MARK_USE_DETAILS, - HFI_PROP_LTR_MARK_USE_DETAILS}, - - {META_SEQ_HDR_NAL, ENC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_SEQ_HEADER_NAL, - HFI_PROP_METADATA_SEQ_HEADER_NAL}, - - {META_DPB_MISR, DEC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_DPB_LUMA_CHROMA_MISR, - HFI_PROP_DPB_LUMA_CHROMA_MISR}, - - {META_OPB_MISR, DEC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_OPB_LUMA_CHROMA_MISR, - HFI_PROP_OPB_LUMA_CHROMA_MISR}, - - {META_INTERLACE, DEC, H264, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_INTERLACE, - HFI_PROP_INTERLACE_INFO}, - - {META_TIMESTAMP, DEC | ENC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_TIMESTAMP, - HFI_PROP_TIMESTAMP}, - - {META_CONCEALED_MB_CNT, DEC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_CONCEALED_MB_COUNT, - HFI_PROP_CONEALED_MB_COUNT}, - - {META_HIST_INFO, DEC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_HISTOGRAM_INFO, - HFI_PROP_HISTOGRAM_INFO}, - - {META_SEI_MASTERING_DISP, DEC|ENC, HEVC|HEIC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_SEI_MASTERING_DISPLAY_COLOUR, - HFI_PROP_SEI_MASTERING_DISPLAY_COLOUR}, - - {META_SEI_CLL, DEC|ENC, HEVC|HEIC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_SEI_CONTENT_LIGHT_LEVEL, - HFI_PROP_SEI_CONTENT_LIGHT_LEVEL}, - - {META_HDR10PLUS, DEC | ENC, HEVC|HEIC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_HDR10PLUS, - HFI_PROP_SEI_HDR10PLUS_USERDATA}, - - {META_EVA_STATS, ENC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_EVA_STATS, - HFI_PROP_EVA_STAT_INFO, - 0, - {0}, - {ENH_LAYER_COUNT}}, - - {META_BUF_TAG, DEC | ENC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_BUFFER_TAG, - HFI_PROP_BUFFER_TAG}, - - {META_DPB_TAG_LIST, DEC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_DPB_TAG_LIST, - HFI_PROP_DPB_TAG_LIST}, - - {META_OUTPUT_BUF_TAG, DEC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - 0, - HFI_PROP_BUFFER_TAG}, - - {META_SUBFRAME_OUTPUT, DEC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_SUBFRAME_OUTPUT, - HFI_PROP_SUBFRAME_OUTPUT}, - - {META_ENC_QP_METADATA, ENC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_ENC_QP_METADATA, - HFI_PROP_ENC_QP_METADATA}, - - {META_ROI_INFO, ENC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_ROI_INFO, - HFI_PROP_ROI_INFO, - CAP_FLAG_INPUT_PORT, - {BITRATE_MODE, PIX_FMTS}, - {0}, - msm_vidc_adjust_roi_info, NULL}, - - {META_ROI_INFO, ENC, H264|HEVC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_ROI_INFO, - HFI_PROP_ROI_INFO, - CAP_FLAG_INPUT_PORT, - {BITRATE_MODE, PIX_FMTS}, - {MIN_QUALITY}, - msm_vidc_adjust_roi_info, NULL}, - - {META_DEC_QP_METADATA, DEC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_DEC_QP_METADATA, - HFI_PROP_DEC_QP_METADATA}, - - /* configure image properties */ - {FRAME_WIDTH, ENC, HEIC, 128, 16384, 1, 16384}, - {FRAME_HEIGHT, ENC, HEIC, 128, 16384, 1, 16384}, - {MIN_BUFFERS_INPUT, ENC|DEC, HEIC, 0, 64, 1, 1, - V4L2_CID_MIN_BUFFERS_FOR_OUTPUT}, - {MBPF, DEC, HEIC, 36, 65536, 1, 65536 }, /* ((4096x4096)/256) */ - {MBPF, ENC, HEIC, 64, 1048576, 1, 1048576}, /* ((16384x16384)/256) */ - {MBPS, DEC, HEIC, 36, 65536, 1, 65536 }, /* ((4096x4096)/256)@1fps */ - {MBPS, ENC, HEIC, 64, 1048576, 1, 1048576}, /* ((16384x16384)/256)@1fps */ - {BITRATE_MODE, ENC, HEIC, - V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, - V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, - BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CQ), - V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, - V4L2_CID_MPEG_VIDEO_BITRATE_MODE, - HFI_PROP_RATE_CONTROL, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, - {TIME_DELTA_BASED_RC, CONSTANT_QUALITY}, - msm_vidc_adjust_bitrate_mode, msm_vidc_set_u32_enum}, - {TIME_DELTA_BASED_RC, ENC, HEIC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_TIME_DELTA_BASED_RC, - HFI_PROP_TIME_DELTA_BASED_RATE_CONTROL, - CAP_FLAG_OUTPUT_PORT, - {BITRATE_MODE}, {0}, - msm_vidc_adjust_delta_based_rc, msm_vidc_set_u32}, - {CONSTANT_QUALITY, ENC, HEIC, - 1, MAX_CONSTANT_QUALITY, 1, 100, - V4L2_CID_MPEG_VIDEO_CONSTANT_QUALITY, - HFI_PROP_CONSTANT_QUALITY, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {BITRATE_MODE}, {0}, - NULL, msm_vidc_set_constant_quality}, - {GRID, ENC, HEIC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_ENABLE, - 0, - HFI_PROP_HEIC_GRID_ENABLE, - CAP_FLAG_OUTPUT_PORT, - {0}, {0}, - NULL, msm_vidc_set_u32}, - {GOP_SIZE, ENC, HEIC, - 0, INT_MAX, 1, 0 /* all intra */, - V4L2_CID_MPEG_VIDEO_GOP_SIZE, - HFI_PROP_MAX_GOP_FRAMES, - CAP_FLAG_OUTPUT_PORT | - CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - NULL, msm_vidc_set_u32}, - {B_FRAME, ENC, HEIC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDEO_B_FRAMES, - HFI_PROP_MAX_B_FRAMES, - CAP_FLAG_OUTPUT_PORT, - {0}, {0}, - NULL, msm_vidc_set_u32}, - {PIX_FMTS, ENC, HEIC, - MSM_VIDC_FMT_NV12, - MSM_VIDC_FMT_P010, - MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_P010, - MSM_VIDC_FMT_NV12, - 0, 0, - 0, - {0}, - {PROFILE}}, - {HEVC_TIER, ENC|DEC, HEIC, - V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, - V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, - BIT(V4L2_MPEG_VIDEO_HEVC_TIER_MAIN), - V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, - V4L2_CID_MPEG_VIDEO_HEVC_TIER, - HFI_PROP_TIER, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, - {0}, - NULL, msm_vidc_set_u32_enum}, - {FRAME_RATE, ENC, HEIC, - (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), - 1, (MINIMUM_FPS << 16), - 0, - HFI_PROP_FRAME_RATE, - CAP_FLAG_OUTPUT_PORT, - {0}, {0}, - NULL, msm_vidc_set_q16}, - {META_SUBFRAME_OUTPUT, ENC, HEIC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_SUBFRAME_OUTPUT, - HFI_PROP_SUBFRAME_OUTPUT}, - {COMPLEXITY, ENC, H264 | HEVC, - 0, 100, - 1, 100, - V4L2_CID_MPEG_VIDC_VENC_COMPLEXITY}, - {META_MAX_NUM_REORDER_FRAMES, DEC, HEVC | H264, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_MAX_NUM_REORDER_FRAMES, - HFI_PROP_MAX_NUM_REORDER_FRAMES}, -}; - -static struct msm_platform_inst_capability instance_data_diwali_v2[] = { - /* {cap, domain, codec, - * min, max, step_or_mask, value, - * v4l2_id, - * hfi_id, - * flags, - * parents, - * children, - * adjust, set} - */ - - {FRAME_WIDTH, DEC, CODECS_ALL, 96, 4096, 1, 1920}, - {FRAME_WIDTH, ENC, CODECS_ALL, 128, 4096, 1, 1920}, - {LOSSLESS_FRAME_WIDTH, ENC, H264|HEVC, 128, 4096, 1, 1920}, - {SECURE_FRAME_WIDTH, DEC, H264|HEVC|VP9, 96, 4096, 1, 1920}, - {SECURE_FRAME_WIDTH, ENC, H264|HEVC, 128, 4096, 1, 1920}, - {FRAME_HEIGHT, DEC, CODECS_ALL, 96, 4096, 1, 1080}, - {FRAME_HEIGHT, ENC, CODECS_ALL, 128, 4096, 1, 1080}, - {LOSSLESS_FRAME_HEIGHT, ENC, H264|HEVC, 128, 4096, 1, 1080}, - {SECURE_FRAME_HEIGHT, DEC, H264|HEVC|VP9, 96, 4096, 1, 1080}, - {SECURE_FRAME_HEIGHT, ENC, H264|HEVC, 128, 4096, 1, 1080}, - {PIX_FMTS, ENC, H264, - MSM_VIDC_FMT_NV12, - MSM_VIDC_FMT_NV12C, - MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C, - /* Since CTSEncodeDecode test cannot handle BT 709LR, - * disabled HW RGBA encoding. - * | MSM_VIDC_FMT_RGBA8888 | MSM_VIDC_FMT_RGBA8888C, - */ - MSM_VIDC_FMT_NV12C, - 0, 0, - 0, - {0}, - {META_ROI_INFO}}, - {PIX_FMTS, ENC, HEVC, - MSM_VIDC_FMT_NV12, - MSM_VIDC_FMT_TP10C, - MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C | - MSM_VIDC_FMT_P010 | MSM_VIDC_FMT_TP10C, - /* Since CTSEncodeDecode test cannot handle BT 709LR, - * disabled HW RGBA encoding. - * | MSM_VIDC_FMT_RGBA8888 | MSM_VIDC_FMT_RGBA8888C, - */ - MSM_VIDC_FMT_NV12C, - 0, 0, - 0, - {0}, - {/* Do not change order of META_ROI_INFO, MIN_QUALITY, BLUR_TYPES - * Since parent -> children relationship for these cap_ids is - * as follows: - * META_ROI_INFO -> MIN_QUALITY -> BLUR_TYPES - */ - PROFILE, MIN_FRAME_QP, MAX_FRAME_QP, I_FRAME_QP, P_FRAME_QP, - B_FRAME_QP, META_ROI_INFO, MIN_QUALITY, BLUR_TYPES}}, - - {PIX_FMTS, DEC, HEVC|HEIC, - MSM_VIDC_FMT_NV12, - MSM_VIDC_FMT_TP10C, - MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C | - MSM_VIDC_FMT_P010 | MSM_VIDC_FMT_TP10C, - MSM_VIDC_FMT_NV12C, - 0, 0, - 0, - {0}, - {PROFILE}}, - - {PIX_FMTS, DEC, H264, - MSM_VIDC_FMT_NV12, - MSM_VIDC_FMT_NV12C, - MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C, - MSM_VIDC_FMT_NV12C}, - - {PIX_FMTS, DEC, VP9, - MSM_VIDC_FMT_NV12, - MSM_VIDC_FMT_TP10C, - MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C | - MSM_VIDC_FMT_P010 | MSM_VIDC_FMT_TP10C, - MSM_VIDC_FMT_NV12C}, - - {MIN_BUFFERS_INPUT, ENC|DEC, CODECS_ALL, 0, 64, 1, 4, - V4L2_CID_MIN_BUFFERS_FOR_OUTPUT}, - {MIN_BUFFERS_OUTPUT, ENC|DEC, CODECS_ALL, - 0, 64, 1, 4, - V4L2_CID_MIN_BUFFERS_FOR_CAPTURE, - HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT, - CAP_FLAG_OUTPUT_PORT}, - - /* (4096 * 2304) / 256 */ - {MBPF, ENC, CODECS_ALL, 64, 36864, 1, 36864}, - /* (4096 * 2304) / 256 */ - {MBPF, DEC, CODECS_ALL, 36, 36864, 1, 36864}, - /* (4096 * 2304) / 256 */ - {LOSSLESS_MBPF, ENC, H264|HEVC, 64, 36864, 1, 36864}, - /* (4096 * 2304) / 256 */ - {SECURE_MBPF, ENC|DEC, H264|HEVC|VP9, 64, 36864, 1, 36864}, - /* ((4096 * 2304) / 256) * 30 fps */ - {MBPS, ENC, CODECS_ALL, 64, 1105920, 1, 1105920}, - /* ((4096 * 2176) / 256) * 30 fps */ - {MBPS, DEC, CODECS_ALL, 36, 1105920, 1, 1105920}, - /* ((1920 * 1088) / 256) * 30 fps */ - {POWER_SAVE_MBPS, ENC, CODECS_ALL, 0, 244800, 1, 244800}, - - {FRAME_RATE, ENC, CODECS_ALL, - (MINIMUM_FPS<< 16), (MAXIMUM_FPS_V2 << 16), - 1, (DEFAULT_FPS << 16), - 0, - HFI_PROP_FRAME_RATE, - CAP_FLAG_OUTPUT_PORT, - {0}, {0}, - NULL, msm_vidc_set_q16}, - - {FRAME_RATE, DEC, CODECS_ALL, - (MINIMUM_FPS << 16), (MAXIMUM_FPS_V2 << 16), - 1, (DEFAULT_FPS << 16)}, - - {FRAME_RATE, DEC, VP9, - (MINIMUM_FPS << 16), (MAXIMUM_VP9_FPS << 16), - 1, (DEFAULT_FPS << 16)}, - - {OPERATING_RATE, ENC|DEC, CODECS_ALL, - (MINIMUM_FPS<< 16), (MAXIMUM_FPS_V2 << 16), - 1, (DEFAULT_FPS << 16)}, - - {OPERATING_RATE, DEC, VP9, - (MINIMUM_FPS << 16), (MAXIMUM_VP9_FPS << 16), - 1, (DEFAULT_FPS << 16)}, - - {SCALE_FACTOR, ENC, H264|HEVC, 1, 8, 1, 8}, - - {MB_CYCLES_VSP, ENC, CODECS_ALL, 25, 25, 1, 25}, - {MB_CYCLES_VSP, DEC, CODECS_ALL, 25, 25, 1, 25}, - {MB_CYCLES_VSP, DEC, VP9, 60, 60, 1, 60}, - {MB_CYCLES_VPP, ENC, CODECS_ALL, 675, 675, 1, 675}, - {MB_CYCLES_VPP, DEC, CODECS_ALL, 200, 200, 1, 200}, - {MB_CYCLES_LP, ENC, CODECS_ALL, 320, 320, 1, 320}, - {MB_CYCLES_LP, DEC, CODECS_ALL, 200, 200, 1, 200}, - {MB_CYCLES_FW, ENC|DEC, CODECS_ALL, 326389, 326389, 1, 326389}, - {MB_CYCLES_FW_VPP, ENC|DEC, CODECS_ALL, 44156, 44156, 1, 44156}, - - {SECURE_MODE, ENC|DEC, H264|HEVC|VP9, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_SECURE, - HFI_PROP_SECURE, - CAP_FLAG_NONE, - {0}, - {0}, - NULL, msm_vidc_set_u32}, - - {HFLIP, ENC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_HFLIP, - HFI_PROP_FLIP, - CAP_FLAG_OUTPUT_PORT | - CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, - {0}, - {0}, - NULL, msm_vidc_set_flip}, - - {VFLIP, ENC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_VFLIP, - HFI_PROP_FLIP, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {0}, - {0}, - NULL, msm_vidc_set_flip}, - - {ROTATION, ENC, CODECS_ALL, - 0, 270, 90, 0, - V4L2_CID_ROTATE, - HFI_PROP_ROTATION, - CAP_FLAG_OUTPUT_PORT, - {0}, - {0}, - NULL, msm_vidc_set_rotation}, - - {SUPER_FRAME, ENC, H264|HEVC, - 0, 32, 1, 0, - V4L2_CID_MPEG_VIDC_SUPERFRAME, 0, - CAP_FLAG_NONE, - {0}, - {INPUT_BUF_HOST_MAX_COUNT, OUTPUT_BUF_HOST_MAX_COUNT}, - NULL, NULL}, - - {SLICE_INTERFACE, DEC, CODECS_ALL, - 0, 0, 0, 0, - V4L2_CID_MPEG_VIDEO_DECODER_SLICE_INTERFACE, - 0}, - - {HEADER_MODE, ENC, CODECS_ALL, - V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE, - V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME, - BIT(V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE) | - BIT(V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME), - V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE, - V4L2_CID_MPEG_VIDEO_HEADER_MODE, - HFI_PROP_SEQ_HEADER_MODE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, {0}, - NULL, msm_vidc_set_header_mode}, - - {PREPEND_SPSPPS_TO_IDR, ENC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDEO_PREPEND_SPSPPS_TO_IDR}, - - {META_SEQ_HDR_NAL, ENC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_SEQ_HEADER_NAL}, - - {WITHOUT_STARTCODE, ENC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE, - HFI_PROP_NAL_LENGTH_FIELD, - CAP_FLAG_OUTPUT_PORT, - {0}, {0}, - NULL, msm_vidc_set_nal_length}, - - {NAL_LENGTH_FIELD, ENC, CODECS_ALL, - V4L2_MPEG_VIDEO_HEVC_SIZE_0, - V4L2_MPEG_VIDEO_HEVC_SIZE_4, - BIT(V4L2_MPEG_VIDEO_HEVC_SIZE_0) | - BIT(V4L2_MPEG_VIDEO_HEVC_SIZE_4), - V4L2_MPEG_VIDEO_HEVC_SIZE_0, - V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD, - HFI_PROP_NAL_LENGTH_FIELD, - CAP_FLAG_MENU | CAP_FLAG_OUTPUT_PORT}, - - /* TODO: Firmware introduced enumeration type for this - * with and without seq header. - */ - {REQUEST_I_FRAME, ENC, H264|HEVC, - 0, 0, 0, 0, - V4L2_CID_MPEG_VIDEO_FORCE_KEY_FRAME, - HFI_PROP_REQUEST_SYNC_FRAME, - CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - NULL, msm_vidc_set_req_sync_frame}, - - /* Enc: Keeping CABAC and CAVLC as same bitrate. - * Dec: there's no use of Bitrate cap - */ - {BIT_RATE, ENC, H264|HEVC, - 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_BITRATE, - HFI_PROP_TOTAL_BITRATE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {ENH_LAYER_COUNT, BITRATE_MODE}, {PEAK_BITRATE}, - msm_vidc_adjust_bitrate, msm_vidc_set_bitrate}, - - {BITRATE_MODE, ENC, H264, - V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, - V4L2_MPEG_VIDEO_BITRATE_MODE_CBR, - BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_VBR) | - BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CBR), - V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, - V4L2_CID_MPEG_VIDEO_BITRATE_MODE, - HFI_PROP_RATE_CONTROL, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, - {LTR_COUNT, IR_RANDOM, TIME_DELTA_BASED_RC, I_FRAME_QP, - P_FRAME_QP, B_FRAME_QP, ENH_LAYER_COUNT, BIT_RATE, - CONTENT_ADAPTIVE_CODING, BITRATE_BOOST, MIN_QUALITY, - VBV_DELAY, PEAK_BITRATE,SLICE_MODE, META_ROI_INFO, - BLUR_TYPES, LOWLATENCY_MODE}, - msm_vidc_adjust_bitrate_mode, msm_vidc_set_u32_enum}, - - {BITRATE_MODE, ENC, HEVC, - V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, - V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, - BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_VBR) | - BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CBR) | - BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CQ), - V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, - V4L2_CID_MPEG_VIDEO_BITRATE_MODE, - HFI_PROP_RATE_CONTROL, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, - {LTR_COUNT, IR_RANDOM, TIME_DELTA_BASED_RC, I_FRAME_QP, - P_FRAME_QP, B_FRAME_QP, CONSTANT_QUALITY, ENH_LAYER_COUNT, - CONTENT_ADAPTIVE_CODING, BIT_RATE, - BITRATE_BOOST, MIN_QUALITY, VBV_DELAY, - PEAK_BITRATE, SLICE_MODE, META_ROI_INFO, BLUR_TYPES, - LOWLATENCY_MODE}, - msm_vidc_adjust_bitrate_mode, msm_vidc_set_u32_enum}, - - {LOSSLESS, ENC, HEVC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU}, - - {FRAME_SKIP_MODE, ENC, H264|HEVC|HEIC, - V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED, - V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT, - BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED) | - BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_LEVEL_LIMIT) | - BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT), - V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED, - V4L2_CID_MPEG_VIDEO_FRAME_SKIP_MODE, - 0, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {FRAME_RC_ENABLE, ENC, H264|HEVC|HEIC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_ENABLE, - V4L2_CID_MPEG_VIDEO_FRAME_RC_ENABLE}, - - {CONSTANT_QUALITY, ENC, HEVC, - 1, MAX_CONSTANT_QUALITY, 1, 90, - V4L2_CID_MPEG_VIDEO_CONSTANT_QUALITY, - HFI_PROP_CONSTANT_QUALITY, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {BITRATE_MODE}, {0}, - NULL, msm_vidc_set_constant_quality}, - - {GOP_SIZE, ENC, CODECS_ALL, - 0, INT_MAX, 1, 2 * DEFAULT_FPS - 1, - V4L2_CID_MPEG_VIDEO_GOP_SIZE, - HFI_PROP_MAX_GOP_FRAMES, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {ENH_LAYER_COUNT}, - {ALL_INTRA}, - msm_vidc_adjust_gop_size, msm_vidc_set_gop_size}, - - {GOP_CLOSURE, ENC, H264|HEVC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_ENABLE, - V4L2_CID_MPEG_VIDEO_GOP_CLOSURE, - 0}, - - {B_FRAME, ENC, H264|HEVC, - 0, 7, 1, 0, - V4L2_CID_MPEG_VIDEO_B_FRAMES, - HFI_PROP_MAX_B_FRAMES, - CAP_FLAG_OUTPUT_PORT, - {ENH_LAYER_COUNT}, - {ALL_INTRA}, - msm_vidc_adjust_b_frame, msm_vidc_set_u32}, - - {BLUR_TYPES, ENC, H264|HEVC, - VIDC_BLUR_NONE, VIDC_BLUR_ADAPTIVE, - BIT(VIDC_BLUR_NONE) | BIT(VIDC_BLUR_EXTERNAL) | BIT(VIDC_BLUR_ADAPTIVE), - VIDC_BLUR_ADAPTIVE, - V4L2_CID_MPEG_VIDC_VIDEO_BLUR_TYPES, - HFI_PROP_BLUR_TYPES, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {PIX_FMTS, BITRATE_MODE, CONTENT_ADAPTIVE_CODING, MIN_QUALITY}, - {BLUR_RESOLUTION}, - msm_vidc_adjust_blur_type, msm_vidc_set_u32_enum}, - - {BLUR_RESOLUTION, ENC, CODECS_ALL, - 0, S32_MAX, 1, 0, - V4L2_CID_MPEG_VIDC_VIDEO_BLUR_RESOLUTION, - HFI_PROP_BLUR_RESOLUTION, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {BLUR_TYPES}, - {0}, - msm_vidc_adjust_blur_resolution, msm_vidc_set_blur_resolution}, - - {CSC, ENC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - 0, - HFI_PROP_CSC}, - - {CSC_CUSTOM_MATRIX, ENC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_VIDEO_VPE_CSC_CUSTOM_MATRIX, - HFI_PROP_CSC_MATRIX, - CAP_FLAG_OUTPUT_PORT, - {0}, {0}, - NULL, msm_vidc_set_csc_custom_matrix}, - - {LOWLATENCY_MODE, ENC, H264 | HEVC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_LOWLATENCY_REQUEST, - 0, - CAP_FLAG_NONE, - {BITRATE_MODE}, - {STAGE}, - msm_vidc_adjust_lowlatency_mode, NULL}, - - {LOWLATENCY_MODE, DEC, H264|HEVC|VP9, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_LOWLATENCY_REQUEST, - HFI_PROP_SEQ_CHANGE_AT_SYNC_FRAME, - CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - - {LTR_COUNT, ENC, H264|HEVC, - 0, 2, 1, 0, - V4L2_CID_MPEG_VIDEO_LTR_COUNT, - HFI_PROP_LTR_COUNT, - CAP_FLAG_OUTPUT_PORT, - {BITRATE_MODE, ALL_INTRA}, {0}, - msm_vidc_adjust_ltr_count, msm_vidc_set_u32}, - - {USE_LTR, ENC, H264|HEVC, - INVALID_DEFAULT_MARK_OR_USE_LTR, - ((1 << MAX_LTR_FRAME_COUNT) - 1), - 1, INVALID_DEFAULT_MARK_OR_USE_LTR, - V4L2_CID_MPEG_VIDEO_USE_LTR_FRAMES, - HFI_PROP_LTR_USE, - CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - msm_vidc_adjust_use_ltr, msm_vidc_set_use_and_mark_ltr}, - - {MARK_LTR, ENC, H264|HEVC, - INVALID_DEFAULT_MARK_OR_USE_LTR, - (MAX_LTR_FRAME_COUNT - 1), - 1, INVALID_DEFAULT_MARK_OR_USE_LTR, - V4L2_CID_MPEG_VIDEO_FRAME_LTR_INDEX, - HFI_PROP_LTR_MARK, - CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - msm_vidc_adjust_mark_ltr, msm_vidc_set_use_and_mark_ltr}, - - {BASELAYER_PRIORITY, ENC, H264, - 0, MAX_BASE_LAYER_PRIORITY_ID, 1, 0, - V4L2_CID_MPEG_VIDEO_BASELAYER_PRIORITY_ID, - HFI_PROP_BASELAYER_PRIORITYID, - CAP_FLAG_OUTPUT_PORT}, - - {IR_RANDOM, ENC, H264|HEVC, - 0, INT_MAX, 1, 0, - V4L2_CID_MPEG_VIDC_INTRA_REFRESH_PERIOD, - HFI_PROP_IR_RANDOM_PERIOD, - CAP_FLAG_OUTPUT_PORT, - {BITRATE_MODE, ALL_INTRA}, {0}, - msm_vidc_adjust_ir_random, msm_vidc_set_u32}, - - {AU_DELIMITER, ENC, H264|HEVC, - V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDEO_AU_DELIMITER, - HFI_PROP_AUD, - CAP_FLAG_OUTPUT_PORT, - {0}, {0}, - NULL, msm_vidc_set_u32}, - - {TIME_DELTA_BASED_RC, ENC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_ENABLE, - V4L2_CID_MPEG_VIDC_TIME_DELTA_BASED_RC, - HFI_PROP_TIME_DELTA_BASED_RATE_CONTROL, - CAP_FLAG_OUTPUT_PORT, - {BITRATE_MODE}, {0}, - msm_vidc_adjust_delta_based_rc, msm_vidc_set_u32}, - - {CONTENT_ADAPTIVE_CODING, ENC, H264|HEVC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_ENABLE, - V4L2_CID_MPEG_VIDC_CONTENT_ADAPTIVE_CODING, - HFI_PROP_CONTENT_ADAPTIVE_CODING, - CAP_FLAG_OUTPUT_PORT, - {BITRATE_MODE, MIN_QUALITY}, - {BLUR_TYPES}, - msm_vidc_adjust_cac, - msm_vidc_set_vbr_related_properties}, - - {BITRATE_BOOST, ENC, H264|HEVC, - 0, MAX_BITRATE_BOOST, 25, MAX_BITRATE_BOOST, - V4L2_CID_MPEG_VIDC_QUALITY_BITRATE_BOOST, - HFI_PROP_BITRATE_BOOST, - CAP_FLAG_OUTPUT_PORT, - {BITRATE_MODE, MIN_QUALITY}, - {0}, - msm_vidc_adjust_bitrate_boost, - msm_vidc_set_vbr_related_properties}, - - {MIN_QUALITY, ENC, H264, - 0, MAX_SUPPORTED_MIN_QUALITY, 70, MAX_SUPPORTED_MIN_QUALITY, - 0, - HFI_PROP_MAINTAIN_MIN_QUALITY, - CAP_FLAG_OUTPUT_PORT, - {BITRATE_MODE, ENH_LAYER_COUNT, META_ROI_INFO}, - {CONTENT_ADAPTIVE_CODING, BITRATE_BOOST, BLUR_TYPES}, - msm_vidc_adjust_min_quality, - msm_vidc_set_vbr_related_properties}, - - {MIN_QUALITY, ENC, HEVC, - 0, MAX_SUPPORTED_MIN_QUALITY, 70, MAX_SUPPORTED_MIN_QUALITY, - 0, - HFI_PROP_MAINTAIN_MIN_QUALITY, - CAP_FLAG_OUTPUT_PORT, - {BITRATE_MODE, PIX_FMTS, ENH_LAYER_COUNT, - META_ROI_INFO}, - {CONTENT_ADAPTIVE_CODING, BITRATE_BOOST, BLUR_TYPES}, - msm_vidc_adjust_min_quality, - msm_vidc_set_vbr_related_properties}, - - {VBV_DELAY, ENC, H264|HEVC, - 200, 300, 100, 300, - V4L2_CID_MPEG_VIDEO_VBV_DELAY, - HFI_PROP_VBV_DELAY, - CAP_FLAG_OUTPUT_PORT, - {BITRATE_MODE}, - {0}, - NULL, msm_vidc_set_cbr_related_properties}, - - {PEAK_BITRATE, ENC, H264|HEVC, - /* default peak bitrate is 10% larger than avrg bitrate */ - 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_BITRATE_PEAK, - HFI_PROP_TOTAL_PEAK_BITRATE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {BITRATE_MODE, BIT_RATE}, - {0}, - msm_vidc_adjust_peak_bitrate, - msm_vidc_set_cbr_related_properties}, - - {MIN_FRAME_QP, ENC, H264, - MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, - V4L2_CID_MPEG_VIDEO_H264_MIN_QP, - HFI_PROP_MIN_QP_PACKED, - CAP_FLAG_OUTPUT_PORT, - {0}, {0}, - NULL, msm_vidc_set_min_qp}, - - {MIN_FRAME_QP, ENC, HEVC|HEIC, - MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, - V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP, - HFI_PROP_MIN_QP_PACKED, - CAP_FLAG_OUTPUT_PORT, - {PIX_FMTS}, {0}, - msm_vidc_adjust_hevc_min_qp, msm_vidc_set_min_qp}, - - {I_FRAME_MIN_QP, ENC, H264, - MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, - V4L2_CID_MPEG_VIDEO_H264_I_FRAME_MIN_QP}, - - {I_FRAME_MIN_QP, ENC, HEVC|HEIC, - MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, - V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_MIN_QP}, - - {P_FRAME_MIN_QP, ENC, H264, - MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, - V4L2_CID_MPEG_VIDEO_H264_P_FRAME_MIN_QP}, - - {P_FRAME_MIN_QP, ENC, HEVC|HEIC, - MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, - V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_MIN_QP}, - - {B_FRAME_MIN_QP, ENC, H264, - MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, - V4L2_CID_MPEG_VIDEO_H264_B_FRAME_MIN_QP}, - - {B_FRAME_MIN_QP, ENC, HEVC|HEIC, - MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, - V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_MIN_QP}, - - {MAX_FRAME_QP, ENC, H264, - MIN_QP_8BIT, MAX_QP, 1, MAX_QP, - V4L2_CID_MPEG_VIDEO_H264_MAX_QP, - HFI_PROP_MAX_QP_PACKED, - CAP_FLAG_OUTPUT_PORT, - {0}, {0}, - NULL, msm_vidc_set_max_qp}, - - {MAX_FRAME_QP, ENC, HEVC|HEIC, - MIN_QP_10BIT, MAX_QP, 1, MAX_QP, - V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP, - HFI_PROP_MAX_QP_PACKED, - CAP_FLAG_OUTPUT_PORT, - {PIX_FMTS}, {0}, - msm_vidc_adjust_hevc_max_qp, msm_vidc_set_max_qp}, - - {I_FRAME_MAX_QP, ENC, H264, - MIN_QP_8BIT, MAX_QP, 1, MAX_QP, - V4L2_CID_MPEG_VIDEO_H264_I_FRAME_MAX_QP}, - - {I_FRAME_MAX_QP, ENC, HEVC|HEIC, - MIN_QP_10BIT, MAX_QP, 1, MAX_QP, - V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_MAX_QP}, - - {P_FRAME_MAX_QP, ENC, H264, - MIN_QP_8BIT, MAX_QP, 1, MAX_QP, - V4L2_CID_MPEG_VIDEO_H264_P_FRAME_MAX_QP}, - - {P_FRAME_MAX_QP, ENC, HEVC|HEIC, - MIN_QP_10BIT, MAX_QP, 1, MAX_QP, - V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_MAX_QP}, - - {B_FRAME_MAX_QP, ENC, H264, - MIN_QP_8BIT, MAX_QP, 1, MAX_QP, - V4L2_CID_MPEG_VIDEO_H264_B_FRAME_MAX_QP}, - - {B_FRAME_MAX_QP, ENC, HEVC|HEIC, - MIN_QP_10BIT, MAX_QP, 1, MAX_QP, - V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_MAX_QP}, - - {I_FRAME_QP, ENC, HEVC, - MIN_QP_10BIT, MAX_QP, 1, DEFAULT_QP, - V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP, - HFI_PROP_QP_PACKED, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {PIX_FMTS, BITRATE_MODE}, {0}, - msm_vidc_adjust_hevc_i_frame_qp, msm_vidc_set_frame_qp}, - - {I_FRAME_QP, ENC, H264, - MIN_QP_8BIT, MAX_QP, 1, DEFAULT_QP, - V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP, - HFI_PROP_QP_PACKED, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {BITRATE_MODE}, {0}, - NULL, msm_vidc_set_frame_qp}, - - {P_FRAME_QP, ENC, HEVC, - MIN_QP_10BIT, MAX_QP, 1, DEFAULT_QP, - V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP, - HFI_PROP_QP_PACKED, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {PIX_FMTS, BITRATE_MODE}, {0}, - msm_vidc_adjust_hevc_p_frame_qp, msm_vidc_set_frame_qp}, - - {P_FRAME_QP, ENC, H264, - MIN_QP_8BIT, MAX_QP, 1, DEFAULT_QP, - V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP, - HFI_PROP_QP_PACKED, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {BITRATE_MODE}, {0}, - NULL, msm_vidc_set_frame_qp}, - - {B_FRAME_QP, ENC, HEVC, - MIN_QP_10BIT, MAX_QP, 1, DEFAULT_QP, - V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP, - HFI_PROP_QP_PACKED, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {PIX_FMTS, BITRATE_MODE}, {0}, - msm_vidc_adjust_hevc_b_frame_qp, msm_vidc_set_frame_qp}, - - {B_FRAME_QP, ENC, H264, - MIN_QP_8BIT, MAX_QP, 1, DEFAULT_QP, - V4L2_CID_MPEG_VIDEO_H264_B_FRAME_QP, - HFI_PROP_QP_PACKED, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {BITRATE_MODE}, {0}, - NULL, msm_vidc_set_frame_qp}, - - {LAYER_TYPE, ENC, HEVC, - V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B, - V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P, - BIT(V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B) | - BIT(V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P), - V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P, - V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE, - HFI_PROP_LAYER_ENCODING_TYPE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {LAYER_TYPE, ENC, H264, - V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_B, - V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P, - BIT(V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_B) | - BIT(V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P), - V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P, - V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_TYPE, - HFI_PROP_LAYER_ENCODING_TYPE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {LAYER_ENABLE, ENC, H264, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING, - HFI_PROP_LAYER_ENCODING_TYPE, - CAP_FLAG_OUTPUT_PORT}, - - {ENH_LAYER_COUNT, ENC, HEVC, - 0, 5, 1, 0, - V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER, - HFI_PROP_LAYER_COUNT, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {BITRATE_MODE, META_EVA_STATS}, - {GOP_SIZE, B_FRAME, BIT_RATE, MIN_QUALITY}, - msm_vidc_adjust_layer_count, msm_vidc_set_layer_count_and_type}, - - {ENH_LAYER_COUNT, ENC, H264, - 0, 5, 1, 0, - V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_LAYER, - HFI_PROP_LAYER_COUNT, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {BITRATE_MODE, META_EVA_STATS}, - {GOP_SIZE, B_FRAME, BIT_RATE, MIN_QUALITY}, - msm_vidc_adjust_layer_count, msm_vidc_set_layer_count_and_type}, - - /* - * layer bitrate is treated as BIT_RATE cap sibling and - * is handled in bitrate adjust and set functions - */ - {L0_BR, ENC, HEVC, - 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L0_BR, - HFI_PROP_BITRATE_LAYER1, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, - - {L1_BR, ENC, HEVC, - 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L1_BR, - HFI_PROP_BITRATE_LAYER2, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, - - {L2_BR, ENC, HEVC, - 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L2_BR, - HFI_PROP_BITRATE_LAYER3, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, - - {L3_BR, ENC, HEVC, - 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L3_BR, - HFI_PROP_BITRATE_LAYER4, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, - - {L4_BR, ENC, HEVC, - 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L4_BR, - HFI_PROP_BITRATE_LAYER5, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, - - {L5_BR, ENC, HEVC, - 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L5_BR, - HFI_PROP_BITRATE_LAYER6, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, - - {L0_BR, ENC, H264, - 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L0_BR, - HFI_PROP_BITRATE_LAYER1, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, - - {L1_BR, ENC, H264, - 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L1_BR, - HFI_PROP_BITRATE_LAYER2, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, - - {L2_BR, ENC, H264, - 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L2_BR, - HFI_PROP_BITRATE_LAYER3, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, - - {L3_BR, ENC, H264, - 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L3_BR, - HFI_PROP_BITRATE_LAYER4, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, - - {L4_BR, ENC, H264, - 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L4_BR, - HFI_PROP_BITRATE_LAYER5, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, - - {L5_BR, ENC, H264, - 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L5_BR, - HFI_PROP_BITRATE_LAYER6, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, - - {ENTROPY_MODE, ENC, H264, - V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC, - V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, - BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC) | - BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC), - V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, - V4L2_CID_MPEG_VIDEO_H264_ENTROPY_MODE, - HFI_PROP_CABAC_SESSION, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {PROFILE}, - {0}, - msm_vidc_adjust_entropy_mode, msm_vidc_set_u32}, - - {ENTROPY_MODE, DEC, H264|HEVC|VP9, - V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC, - V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, - BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC) | - BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC), - V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, - 0, - HFI_PROP_CABAC_SESSION}, - - /* H264 does not support 10 bit, PIX_FMTS would not be a Parent for this */ - {PROFILE, ENC, H264, - V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE, - V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH, - BIT(V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE) | - BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH) | - BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_BASELINE) | - BIT(V4L2_MPEG_VIDEO_H264_PROFILE_MAIN) | - BIT(V4L2_MPEG_VIDEO_H264_PROFILE_HIGH), - V4L2_MPEG_VIDEO_H264_PROFILE_HIGH, - V4L2_CID_MPEG_VIDEO_H264_PROFILE, - HFI_PROP_PROFILE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, - {ENTROPY_MODE, TRANSFORM_8X8}, - NULL, msm_vidc_set_u32_enum}, - - {PROFILE, DEC, H264, - V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE, - V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH, - BIT(V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE) | - BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH) | - BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_BASELINE) | - BIT(V4L2_MPEG_VIDEO_H264_PROFILE_MAIN) | - BIT(V4L2_MPEG_VIDEO_H264_PROFILE_HIGH), - V4L2_MPEG_VIDEO_H264_PROFILE_HIGH, - V4L2_CID_MPEG_VIDEO_H264_PROFILE, - HFI_PROP_PROFILE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, - {ENTROPY_MODE}, - NULL, msm_vidc_set_u32_enum}, - - {PROFILE, ENC|DEC, HEVC|HEIC, - V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN, - V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE, - BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN) | - BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE) | - BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10) | - BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE), - V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN, - V4L2_CID_MPEG_VIDEO_HEVC_PROFILE, - HFI_PROP_PROFILE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {PIX_FMTS}, - {0}, - msm_vidc_adjust_profile, msm_vidc_set_u32_enum}, - - {PROFILE, DEC, VP9, - V4L2_MPEG_VIDEO_VP9_PROFILE_0, - V4L2_MPEG_VIDEO_VP9_PROFILE_2, - BIT(V4L2_MPEG_VIDEO_VP9_PROFILE_0) | - BIT(V4L2_MPEG_VIDEO_VP9_PROFILE_2), - V4L2_MPEG_VIDEO_VP9_PROFILE_0, - V4L2_CID_MPEG_VIDEO_VP9_PROFILE, - HFI_PROP_PROFILE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, - {0}, - NULL, msm_vidc_set_u32_enum}, - - {LEVEL, DEC, VP9, - V4L2_MPEG_VIDEO_VP9_LEVEL_1_0, - V4L2_MPEG_VIDEO_VP9_LEVEL_5_1, - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_1_0) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_1_1) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_2_0) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_2_1) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_3_0) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_3_1) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_4_0) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_4_1) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_0) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_1), - V4L2_MPEG_VIDEO_VP9_LEVEL_5_1, - V4L2_CID_MPEG_VIDEO_VP9_LEVEL, - HFI_PROP_LEVEL, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, - {0}, - NULL, msm_vidc_set_u32_enum}, - - {LEVEL, DEC, H264, - V4L2_MPEG_VIDEO_H264_LEVEL_1_0, - V4L2_MPEG_VIDEO_H264_LEVEL_5_2, - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1B) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_3) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_2), - V4L2_MPEG_VIDEO_H264_LEVEL_5_2, - V4L2_CID_MPEG_VIDEO_H264_LEVEL, - HFI_PROP_LEVEL, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, - {0}, - NULL, msm_vidc_set_u32_enum}, - - {LEVEL, ENC, H264, - V4L2_MPEG_VIDEO_H264_LEVEL_1_0, - V4L2_MPEG_VIDEO_H264_LEVEL_5_2, - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1B) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_3) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_2), - V4L2_MPEG_VIDEO_H264_LEVEL_5_2, - V4L2_CID_MPEG_VIDEO_H264_LEVEL, - HFI_PROP_LEVEL, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, - {0}, - NULL, msm_vidc_set_level}, - - {LEVEL, DEC, HEVC|HEIC, - V4L2_MPEG_VIDEO_HEVC_LEVEL_1, - V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1, - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1), - V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1, - V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, - HFI_PROP_LEVEL, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, - {0}, - NULL, msm_vidc_set_u32_enum}, - - {LEVEL, ENC, HEVC|HEIC, - V4L2_MPEG_VIDEO_HEVC_LEVEL_1, - V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1, - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1), - V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1, - V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, - HFI_PROP_LEVEL, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, - {0}, - NULL, msm_vidc_set_level}, - - /* TODO: Bring the VP9 Level upstream GKI change, and level cap here: - * go/videogki - */ - - {HEVC_TIER, ENC|DEC, HEVC, - V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, - V4L2_MPEG_VIDEO_HEVC_TIER_HIGH, - BIT(V4L2_MPEG_VIDEO_HEVC_TIER_MAIN) | - BIT(V4L2_MPEG_VIDEO_HEVC_TIER_HIGH), - V4L2_MPEG_VIDEO_HEVC_TIER_HIGH, - V4L2_CID_MPEG_VIDEO_HEVC_TIER, - HFI_PROP_TIER, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, - {0}, - NULL, msm_vidc_set_u32_enum}, - - {LF_MODE, ENC, H264, - V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED, - DB_H264_DISABLE_SLICE_BOUNDARY, - BIT(V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED) | - BIT(V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_DISABLED) | - BIT(DB_H264_DISABLE_SLICE_BOUNDARY), - V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED, - V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_MODE, - HFI_PROP_DEBLOCKING_MODE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, {0}, - NULL, msm_vidc_set_deblock_mode}, - - {LF_MODE, ENC, HEVC|HEIC, - V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_DISABLED, - DB_HEVC_DISABLE_SLICE_BOUNDARY, - BIT(V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_DISABLED) | - BIT(V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_ENABLED) | - BIT(DB_HEVC_DISABLE_SLICE_BOUNDARY), - V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_ENABLED, - V4L2_CID_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE, - HFI_PROP_DEBLOCKING_MODE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, {0}, - NULL, msm_vidc_set_deblock_mode}, - - {LF_ALPHA, ENC, H264, - -6, 6, 1, 0, - V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_ALPHA}, - - {LF_ALPHA, ENC, HEVC|HEIC, - -6, 6, 1, 0, - V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2}, - - {LF_BETA, ENC, H264, - -6, 6, 1, 0, - V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_BETA}, - - {LF_BETA, ENC, HEVC|HEIC, - -6, 6, 1, 0, - V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2}, - - {SLICE_MODE, ENC, H264|HEVC|HEIC, - V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, - V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_BYTES, - BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE) | - BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_MB) | - BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_BYTES), - V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, - V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE, - 0, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {BITRATE_MODE, ALL_INTRA}, {0}, - msm_vidc_adjust_slice_count, msm_vidc_set_slice_count}, - - {SLICE_MAX_BYTES, ENC, H264|HEVC|HEIC, - MIN_SLICE_BYTE_SIZE, MAX_SLICE_BYTE_SIZE_V1, - 1, MIN_SLICE_BYTE_SIZE, - V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES, - HFI_PROP_MULTI_SLICE_BYTES_COUNT, - CAP_FLAG_OUTPUT_PORT}, - - {SLICE_MAX_MB, ENC, H264|HEVC|HEIC, - 1, MAX_SLICE_MB_SIZE, 1, 1, - V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB, - HFI_PROP_MULTI_SLICE_MB_COUNT, - CAP_FLAG_OUTPUT_PORT}, - - // TODO: MB level RC - mapping - {MB_RC, ENC, H264|HEVC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_ENABLE, - V4L2_CID_MPEG_VIDEO_MB_RC_ENABLE, - 0, - CAP_FLAG_OUTPUT_PORT}, - - {TRANSFORM_8X8, ENC, H264, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_ENABLE, - V4L2_CID_MPEG_VIDEO_H264_8X8_TRANSFORM, - HFI_PROP_8X8_TRANSFORM, - CAP_FLAG_OUTPUT_PORT, - {PROFILE}, {0}, - msm_vidc_adjust_transform_8x8, msm_vidc_set_u32}, - - {CHROMA_QP_INDEX_OFFSET, ENC, HEVC, - MIN_CHROMA_QP_OFFSET, MAX_CHROMA_QP_OFFSET, - 1, MAX_CHROMA_QP_OFFSET, - V4L2_CID_MPEG_VIDEO_H264_CHROMA_QP_INDEX_OFFSET, - HFI_PROP_CHROMA_QP_OFFSET, - CAP_FLAG_OUTPUT_PORT, - {0}, {0}, - msm_vidc_adjust_chroma_qp_index_offset, - msm_vidc_set_chroma_qp_index_offset}, - - {DISPLAY_DELAY_ENABLE, DEC, H264|HEVC|VP9, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY_ENABLE, - HFI_PROP_DECODE_ORDER_OUTPUT, - CAP_FLAG_INPUT_PORT, - {0}, {OUTPUT_ORDER}, - NULL, NULL}, - - {DISPLAY_DELAY, DEC, H264|HEVC|VP9, - 0, 1, 1, 0, - V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY, - HFI_PROP_DECODE_ORDER_OUTPUT, - CAP_FLAG_INPUT_PORT, - {0}, {OUTPUT_ORDER}, - NULL, NULL}, - - {OUTPUT_ORDER, DEC, H264|HEVC|VP9, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - 0, - HFI_PROP_DECODE_ORDER_OUTPUT, - CAP_FLAG_INPUT_PORT, - {THUMBNAIL_MODE, DISPLAY_DELAY, DISPLAY_DELAY_ENABLE}, - {0}, - msm_vidc_adjust_output_order, msm_vidc_set_u32}, - - {INPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL, - DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT, - 1, DEFAULT_MAX_HOST_BUF_COUNT, - 0, - HFI_PROP_BUFFER_HOST_MAX_COUNT, - CAP_FLAG_INPUT_PORT, - {0}, {0}, - msm_vidc_adjust_input_buf_host_max_count, msm_vidc_set_u32}, - - {INPUT_BUF_HOST_MAX_COUNT, ENC, H264|HEVC, - DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT, - 1, DEFAULT_MAX_HOST_BUF_COUNT, - 0, - HFI_PROP_BUFFER_HOST_MAX_COUNT, - CAP_FLAG_INPUT_PORT, - {SUPER_FRAME}, {0}, - msm_vidc_adjust_input_buf_host_max_count, msm_vidc_set_u32}, - - {OUTPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL, - DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT, - 1, DEFAULT_MAX_HOST_BUF_COUNT, - 0, - HFI_PROP_BUFFER_HOST_MAX_COUNT, - CAP_FLAG_OUTPUT_PORT, - {0}, {0}, - msm_vidc_adjust_output_buf_host_max_count, msm_vidc_set_u32}, - - {OUTPUT_BUF_HOST_MAX_COUNT, ENC, H264|HEVC, - DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT, - 1, DEFAULT_MAX_HOST_BUF_COUNT, - 0, - HFI_PROP_BUFFER_HOST_MAX_COUNT, - CAP_FLAG_OUTPUT_PORT, - {SUPER_FRAME}, {0}, - msm_vidc_adjust_output_buf_host_max_count, msm_vidc_set_u32}, - - /* conceal color */ - {CONCEAL_COLOR_8BIT, DEC, CODECS_ALL, 0x0, 0xff3fcff, 1, - DEFAULT_VIDEO_CONCEAL_COLOR_BLACK, - V4L2_CID_MPEG_VIDEO_MUTE_YUV, - HFI_PROP_CONCEAL_COLOR_8BIT, - CAP_FLAG_INPUT_PORT, - {0}, {0}, - NULL, msm_vidc_set_u32_packed}, - - {CONCEAL_COLOR_10BIT, DEC, CODECS_ALL, 0x0, 0x3fffffff, 1, - DEFAULT_VIDEO_CONCEAL_COLOR_BLACK, - V4L2_CID_MPEG_VIDEO_MUTE_YUV, - HFI_PROP_CONCEAL_COLOR_10BIT, - CAP_FLAG_INPUT_PORT, - {0}, {0}, - NULL, msm_vidc_set_u32_packed}, - - // TODO - {STAGE, DEC|ENC, CODECS_ALL, - MSM_VIDC_STAGE_1, - MSM_VIDC_STAGE_2, 1, - MSM_VIDC_STAGE_2, - 0, - HFI_PROP_STAGE, - 0, - {0}, {0}, - NULL, msm_vidc_set_stage}, - - {STAGE, ENC, H264 | HEVC, - MSM_VIDC_STAGE_1, - MSM_VIDC_STAGE_2, 1, - MSM_VIDC_STAGE_2, - 0, - HFI_PROP_STAGE, - CAP_FLAG_NONE, - {LOWLATENCY_MODE}, {0}, - NULL, msm_vidc_set_stage}, - - {PIPE, DEC|ENC, CODECS_ALL, - MSM_VIDC_PIPE_1, - MSM_VIDC_PIPE_2, 1, - MSM_VIDC_PIPE_2, - 0, - HFI_PROP_PIPE, - 0, - {0}, {0}, - NULL, msm_vidc_set_pipe}, - {POC, DEC, H264, 0, 18, 1, 1}, - {QUALITY_MODE, ENC, CODECS_ALL, - MSM_VIDC_MAX_QUALITY_MODE, - MSM_VIDC_POWER_SAVE_MODE, 1, - MSM_VIDC_POWER_SAVE_MODE}, - - {CODED_FRAMES, DEC, H264|HEVC|HEIC, - CODED_FRAMES_PROGRESSIVE, CODED_FRAMES_INTERLACE, - 1, CODED_FRAMES_PROGRESSIVE, - 0, - HFI_PROP_CODED_FRAMES}, - - {BIT_DEPTH, DEC, CODECS_ALL, BIT_DEPTH_8, BIT_DEPTH_10, 1, BIT_DEPTH_8, - 0, - HFI_PROP_LUMA_CHROMA_BIT_DEPTH}, - - {CODEC_CONFIG, DEC, H264|HEVC|HEIC, 0, 1, 1, 0, - V4L2_CID_MPEG_VIDC_CODEC_CONFIG, 0, - CAP_FLAG_DYNAMIC_ALLOWED}, - - {BITSTREAM_SIZE_OVERWRITE, DEC, CODECS_ALL, 0, INT_MAX, 1, 0, - V4L2_CID_MPEG_VIDC_MIN_BITSTREAM_SIZE_OVERWRITE}, - - {THUMBNAIL_MODE, DEC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_THUMBNAIL_MODE, - HFI_PROP_THUMBNAIL_MODE, - CAP_FLAG_INPUT_PORT, - {0}, {OUTPUT_ORDER}, - NULL, msm_vidc_set_u32}, - - {DEFAULT_HEADER, DEC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - 0, - HFI_PROP_DEC_DEFAULT_HEADER}, - - {RAP_FRAME, DEC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_ENABLE, - 0, - HFI_PROP_DEC_START_FROM_RAP_FRAME, - CAP_FLAG_INPUT_PORT, - {0}, {0}, - NULL, msm_vidc_set_u32}, - - {SEQ_CHANGE_AT_SYNC_FRAME, DEC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_ENABLE, - 0, - HFI_PROP_SEQ_CHANGE_AT_SYNC_FRAME, - CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - - {PRIORITY, DEC|ENC, CODECS_ALL, - 0, 2, 1, 1, - V4L2_CID_MPEG_VIDC_PRIORITY, - HFI_PROP_SESSION_PRIORITY, - CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - msm_vidc_adjust_session_priority, msm_vidc_set_session_priority}, - - {ENC_IP_CR, ENC, CODECS_ALL, - 0, S32_MAX, 1, 0, - V4L2_CID_MPEG_VIDC_ENC_INPUT_COMPRESSION_RATIO, - 0, CAP_FLAG_DYNAMIC_ALLOWED}, - - {DPB_LIST, DEC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - 0, - HFI_PROP_DPB_LIST, - CAP_FLAG_OUTPUT_PORT, - {0}, {0}, - NULL, NULL}, - - {ALL_INTRA, ENC, H264|HEVC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - 0, - 0, - CAP_FLAG_OUTPUT_PORT, - {GOP_SIZE, B_FRAME}, - {LTR_COUNT, IR_RANDOM, SLICE_MODE}, - msm_vidc_adjust_all_intra, NULL}, - - {META_LTR_MARK_USE, ENC, H264|HEVC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_LTR_MARK_USE_DETAILS, - HFI_PROP_LTR_MARK_USE_DETAILS}, - - {META_SEQ_HDR_NAL, ENC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_SEQ_HEADER_NAL, - HFI_PROP_METADATA_SEQ_HEADER_NAL}, - - {META_DPB_MISR, DEC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_DPB_LUMA_CHROMA_MISR, - HFI_PROP_DPB_LUMA_CHROMA_MISR}, - - {META_OPB_MISR, DEC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_OPB_LUMA_CHROMA_MISR, - HFI_PROP_OPB_LUMA_CHROMA_MISR}, - - {META_INTERLACE, DEC, H264, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_INTERLACE, - HFI_PROP_INTERLACE_INFO}, - - {META_TIMESTAMP, DEC | ENC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_TIMESTAMP, - HFI_PROP_TIMESTAMP}, - - {META_CONCEALED_MB_CNT, DEC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_CONCEALED_MB_COUNT, - HFI_PROP_CONEALED_MB_COUNT}, - - {META_HIST_INFO, DEC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_HISTOGRAM_INFO, - HFI_PROP_HISTOGRAM_INFO}, - - {META_SEI_MASTERING_DISP, DEC|ENC, HEVC|HEIC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_SEI_MASTERING_DISPLAY_COLOUR, - HFI_PROP_SEI_MASTERING_DISPLAY_COLOUR}, - - {META_SEI_CLL, DEC|ENC, HEVC|HEIC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_SEI_CONTENT_LIGHT_LEVEL, - HFI_PROP_SEI_CONTENT_LIGHT_LEVEL}, - - {META_HDR10PLUS, DEC | ENC, HEVC|HEIC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_HDR10PLUS, - HFI_PROP_SEI_HDR10PLUS_USERDATA}, - - {META_EVA_STATS, ENC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_EVA_STATS, - HFI_PROP_EVA_STAT_INFO, - 0, - {0}, - {ENH_LAYER_COUNT}}, - - {META_BUF_TAG, DEC | ENC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_BUFFER_TAG, - HFI_PROP_BUFFER_TAG}, - - {META_DPB_TAG_LIST, DEC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_DPB_TAG_LIST, - HFI_PROP_DPB_TAG_LIST}, - - {META_OUTPUT_BUF_TAG, DEC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - 0, - HFI_PROP_BUFFER_TAG}, - - {META_SUBFRAME_OUTPUT, DEC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_SUBFRAME_OUTPUT, - HFI_PROP_SUBFRAME_OUTPUT}, - - {META_ENC_QP_METADATA, ENC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_ENC_QP_METADATA, - HFI_PROP_ENC_QP_METADATA}, - - {META_ROI_INFO, ENC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_ROI_INFO, - HFI_PROP_ROI_INFO, - CAP_FLAG_INPUT_PORT, - {BITRATE_MODE, PIX_FMTS}, - {0}, - msm_vidc_adjust_roi_info, NULL}, - - {META_ROI_INFO, ENC, H264|HEVC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_ROI_INFO, - HFI_PROP_ROI_INFO, - CAP_FLAG_INPUT_PORT, - {BITRATE_MODE, PIX_FMTS}, - {MIN_QUALITY}, - msm_vidc_adjust_roi_info, NULL}, - - {META_DEC_QP_METADATA, DEC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_DEC_QP_METADATA, - HFI_PROP_DEC_QP_METADATA}, - - /* configure image properties */ - {FRAME_WIDTH, ENC, HEIC, 128, 16384, 1, 16384}, - {FRAME_HEIGHT, ENC, HEIC, 128, 16384, 1, 16384}, - {MIN_BUFFERS_INPUT, ENC|DEC, HEIC, 0, 64, 1, 1, - V4L2_CID_MIN_BUFFERS_FOR_OUTPUT}, - {MBPF, DEC, HEIC, 36, 65536, 1, 65536 }, /* ((4096x4096)/256) */ - {MBPF, ENC, HEIC, 64, 1048576, 1, 1048576}, /* ((16384x16384)/256) */ - {MBPS, DEC, HEIC, 36, 65536, 1, 65536 }, /* ((4096x4096)/256)@1fps */ - {MBPS, ENC, HEIC, 64, 1048576, 1, 1048576}, /* ((16384x16384)/256)@1fps */ - {BITRATE_MODE, ENC, HEIC, - V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, - V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, - BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CQ), - V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, - V4L2_CID_MPEG_VIDEO_BITRATE_MODE, - HFI_PROP_RATE_CONTROL, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, - {TIME_DELTA_BASED_RC, CONSTANT_QUALITY}, - msm_vidc_adjust_bitrate_mode, msm_vidc_set_u32_enum}, - {TIME_DELTA_BASED_RC, ENC, HEIC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_TIME_DELTA_BASED_RC, - HFI_PROP_TIME_DELTA_BASED_RATE_CONTROL, - CAP_FLAG_OUTPUT_PORT, - {BITRATE_MODE}, {0}, - msm_vidc_adjust_delta_based_rc, msm_vidc_set_u32}, - {CONSTANT_QUALITY, ENC, HEIC, - 1, MAX_CONSTANT_QUALITY, 1, 100, - V4L2_CID_MPEG_VIDEO_CONSTANT_QUALITY, - HFI_PROP_CONSTANT_QUALITY, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {BITRATE_MODE}, {0}, - NULL, msm_vidc_set_constant_quality}, - {GRID, ENC, HEIC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_ENABLE, - 0, - HFI_PROP_HEIC_GRID_ENABLE, - CAP_FLAG_OUTPUT_PORT, - {0}, {0}, - NULL, msm_vidc_set_u32}, - {GOP_SIZE, ENC, HEIC, - 0, INT_MAX, 1, 0 /* all intra */, - V4L2_CID_MPEG_VIDEO_GOP_SIZE, - HFI_PROP_MAX_GOP_FRAMES, - CAP_FLAG_OUTPUT_PORT | - CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - NULL, msm_vidc_set_u32}, - {B_FRAME, ENC, HEIC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDEO_B_FRAMES, - HFI_PROP_MAX_B_FRAMES, - CAP_FLAG_OUTPUT_PORT, - {0}, {0}, - NULL, msm_vidc_set_u32}, - {PIX_FMTS, ENC, HEIC, - MSM_VIDC_FMT_NV12, - MSM_VIDC_FMT_P010, - MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_P010, - MSM_VIDC_FMT_NV12, - 0, 0, - 0, - {0}, - {PROFILE}}, - {HEVC_TIER, ENC|DEC, HEIC, - V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, - V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, - BIT(V4L2_MPEG_VIDEO_HEVC_TIER_MAIN), - V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, - V4L2_CID_MPEG_VIDEO_HEVC_TIER, - HFI_PROP_TIER, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, - {0}, - NULL, msm_vidc_set_u32_enum}, - {FRAME_RATE, ENC, HEIC, - (MINIMUM_FPS << 16), (MAXIMUM_FPS_V2 << 16), - 1, (MINIMUM_FPS << 16), - 0, - HFI_PROP_FRAME_RATE, - CAP_FLAG_OUTPUT_PORT, - {0}, {0}, - NULL, msm_vidc_set_q16}, - {META_SUBFRAME_OUTPUT, ENC, HEIC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_SUBFRAME_OUTPUT, - HFI_PROP_SUBFRAME_OUTPUT}, - {COMPLEXITY, ENC, H264 | HEVC, - 0, 100, - 1, 100, - V4L2_CID_MPEG_VIDC_VENC_COMPLEXITY}, - {META_MAX_NUM_REORDER_FRAMES, DEC, HEVC | H264, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_MAX_NUM_REORDER_FRAMES, - HFI_PROP_MAX_NUM_REORDER_FRAMES}, -}; - -static struct allowed_clock_rates_table clock_data_diwali_v1[] = { - {240000000}, {338000000}, {366000000} -}; - -static struct allowed_clock_rates_table clock_data_diwali_v2[] = { - {200000000} -}; - -/* - * Custom conversion coefficients for resolution: 176x144 negative - * coeffs are converted to s4.9 format - * (e.g. -22 converted to ((1 << 13) - 22) - * 3x3 transformation matrix coefficients in s4.9 fixed point format - */ -static u32 vpe_csc_custom_matrix_coeff[MAX_MATRIX_COEFFS] = { - 440, 8140, 8098, 0, 460, 52, 0, 34, 463 -}; - -/* offset coefficients in s9 fixed point format */ -static u32 vpe_csc_custom_bias_coeff[MAX_BIAS_COEFFS] = { - 53, 0, 4 -}; - -/* clamping value for Y/U/V([min,max] for Y/U/V) */ -static u32 vpe_csc_custom_limit_coeff[MAX_LIMIT_COEFFS] = { - 16, 235, 16, 240, 16, 240 -}; - -/* Default UBWC config for LPDDR5 */ -static struct msm_vidc_ubwc_config_data ubwc_config_diwali[] = { - UBWC_CONFIG(8, 32, 15, 0, 1, 1, 1), -}; - -/* Default bus bandwidth for non_real time session based on priority */ -static u32 bus_bw_nrt[] = { - 15000000, - 11000000, -}; - -static struct msm_vidc_efuse_data efuse_data_diwali[] = { - /* IRIS_4K60_FMAX_LIMIT_EFUSE - max 4K@60 */ - EFUSE_ENTRY(0x221C811C, 4, 0x80, 0x7, SKU_VERSION), - /* IRIS_MULTIPIPE_DISABLE - max 4K@30 */ - EFUSE_ENTRY(0x221C8118, 4, 0x80, 0x6, SKU_VERSION), -}; - -static const struct msm_vidc_platform_data diwali_data = { - .core_data = core_data_diwali_v0, - .core_data_size = ARRAY_SIZE(core_data_diwali_v0), - .instance_data = instance_data_diwali_v0, - .instance_data_size = ARRAY_SIZE(instance_data_diwali_v0), - .csc_data.vpe_csc_custom_bias_coeff = vpe_csc_custom_bias_coeff, - .csc_data.vpe_csc_custom_matrix_coeff = vpe_csc_custom_matrix_coeff, - .csc_data.vpe_csc_custom_limit_coeff = vpe_csc_custom_limit_coeff, - .ubwc_config = ubwc_config_diwali, - .bus_bw_nrt = bus_bw_nrt, - .efuse_data = efuse_data_diwali, - .efuse_data_size = ARRAY_SIZE(efuse_data_diwali), - .sku_version = 0, -}; - -static int msm_vidc_read_efuse(struct msm_vidc_core *core) -{ - int rc = 0; - void __iomem *base; - u32 i = 0, efuse = 0, efuse_data_count = 0; - struct msm_vidc_efuse_data *efuse_data = NULL; - struct msm_vidc_platform_data *platform_data; - - if (!core || !core->platform || !core->pdev) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - platform_data = &core->platform->data; - efuse_data = platform_data->efuse_data; - efuse_data_count = platform_data->efuse_data_size; - - if (!efuse_data) - return 0; - - for (i = 0; i < efuse_data_count; i++) { - switch ((efuse_data[i]).purpose) { - case SKU_VERSION: - base = devm_ioremap(&core->pdev->dev, (efuse_data[i]).start_address, - (efuse_data[i]).size); - if (!base) { - d_vpr_e("failed efuse: start %#x, size %d\n", - (efuse_data[i]).start_address, - (efuse_data[i]).size); - return -EINVAL; - } else { - efuse = readl_relaxed(base); - platform_data->sku_version = - (efuse & (efuse_data[i]).mask) >> - (efuse_data[i]).shift; - } - break; - default: - break; - } - if (platform_data->sku_version) { - d_vpr_h("efuse 0x%x, platform version 0x%x\n", - efuse, platform_data->sku_version); - break; - } - } - return rc; -} - -static void msm_vidc_ddr_ubwc_config( - struct msm_vidc_platform_data *platform_data, u32 hbb_override_val) -{ - uint32_t ddr_type = DDR_TYPE_LPDDR5; - - ddr_type = of_fdt_get_ddrtype(); - if (ddr_type == -ENOENT) { - d_vpr_e("Failed to get ddr type, use LPDDR5\n"); - } - - if (platform_data->ubwc_config && - (ddr_type == DDR_TYPE_LPDDR4 || - ddr_type == DDR_TYPE_LPDDR4X)) - platform_data->ubwc_config->highest_bank_bit = hbb_override_val; - - d_vpr_h("DDR Type 0x%x hbb 0x%x\n", - ddr_type, platform_data->ubwc_config ? - platform_data->ubwc_config->highest_bank_bit : -1); -} - -static int msm_vidc_init_data(struct msm_vidc_core *core) -{ - int rc = 0, i = 0; - struct msm_vidc_platform_data *platform_data = NULL; - - if (!core || !core->platform || !core->dt) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - d_vpr_h("%s: initialize diwali data\n", __func__); - - core->platform->data = diwali_data; - platform_data = &core->platform->data; - - /* Check for sku version */ - rc = msm_vidc_read_efuse(core); - if (rc) { - d_vpr_e("%s: Failed to read efuse\n", __func__); - return rc; - } - - if (platform_data->sku_version == SKU_VERSION_1) { - platform_data->core_data = core_data_diwali_v1; - platform_data->core_data_size = - ARRAY_SIZE(core_data_diwali_v1); - platform_data->instance_data = instance_data_diwali_v1; - platform_data->instance_data_size = - ARRAY_SIZE(instance_data_diwali_v1); - /* Overide with SKU clock data into dt */ - core->dt->allowed_clks_tbl = clock_data_diwali_v1; - core->dt->allowed_clks_tbl_size = - ARRAY_SIZE(clock_data_diwali_v1); - } else if (platform_data->sku_version == SKU_VERSION_2) { - platform_data->core_data = core_data_diwali_v2; - platform_data->core_data_size = - ARRAY_SIZE(core_data_diwali_v2); - platform_data->instance_data = instance_data_diwali_v2; - platform_data->instance_data_size = - ARRAY_SIZE(instance_data_diwali_v2); - /* Overide with SKU clock data into dt */ - core->dt->allowed_clks_tbl = clock_data_diwali_v2; - core->dt->allowed_clks_tbl_size = - ARRAY_SIZE(clock_data_diwali_v2); - } - - if (platform_data->sku_version) { - sort(core->dt->allowed_clks_tbl, core->dt->allowed_clks_tbl_size, - sizeof(*core->dt->allowed_clks_tbl), cmp, NULL); - d_vpr_h("Updated allowed clock rates\n"); - for (i = 0; i < core->dt->allowed_clks_tbl_size; i++) - d_vpr_h(" %d\n", core->dt->allowed_clks_tbl[i]); - } - - /* Check for DDR variant */ - msm_vidc_ddr_ubwc_config(&core->platform->data, 0xe); - - return rc; -} - -int msm_vidc_init_platform_diwali(struct msm_vidc_core *core, struct device *dev) -{ - int rc = 0; - - rc = msm_vidc_init_data(core); - if (rc) - return rc; - - return 0; -} - -int msm_vidc_deinit_platform_diwali(struct msm_vidc_core *core, struct device *dev) -{ - /* do nothing */ - return 0; -} diff --git a/driver/vidc/src/msm_vidc_platform.c b/driver/vidc/src/msm_vidc_platform.c index b6568cb598..3840106459 100644 --- a/driver/vidc/src/msm_vidc_platform.c +++ b/driver/vidc/src/msm_vidc_platform.c @@ -17,9 +17,6 @@ #if defined(CONFIG_MSM_VIDC_KALAMA) #include "msm_vidc_kalama.h" #endif -#if defined(CONFIG_MSM_VIDC_DIWALI) -#include "msm_vidc_diwali.h" -#endif #if defined(CONFIG_MSM_VIDC_IRIS2) #include "msm_vidc_iris2.h" #endif @@ -198,16 +195,6 @@ static int msm_vidc_deinit_platform_variant(struct msm_vidc_core *core, struct d } #endif -#if defined(CONFIG_MSM_VIDC_DIWALI) - if (of_device_is_compatible(dev->of_node, "qcom,msm-vidc-diwali")) { - rc = msm_vidc_deinit_platform_diwali(core, dev); - if (rc) - d_vpr_e("%s: failed msm-vidc-diwali with %d\n", - __func__, rc); - return rc; - } -#endif - return rc; } @@ -239,16 +226,6 @@ static int msm_vidc_init_platform_variant(struct msm_vidc_core *core, struct dev } #endif -#if defined(CONFIG_MSM_VIDC_DIWALI) - if (of_device_is_compatible(dev->of_node, "qcom,msm-vidc-diwali")) { - rc = msm_vidc_init_platform_diwali(core, dev); - if (rc) - d_vpr_e("%s: failed msm-vidc-diwali with %d\n", - __func__, rc); - return rc; - } -#endif - return rc; } From d85f112d92eeabc000e0066bc2d06b0cc7eef819 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Mon, 14 Mar 2022 14:41:57 -0700 Subject: [PATCH 0568/1061] video: driver: Enable bitwise operations for metadata controls Enable bitwise operations for metadata controls with below mentioned bit definitions: - ENABLE (BIT 0): Enable metadata. - TX_INP (BIT 1): Client transfers metadata in input port. - TX_OUT (BIT 2): Client transfers metadata in output port. - RX_INP (BIT 3): Client receives metadata in input port. - RX_OUT (BIT 4): Client receives metadata in output port. Change-Id: Ie3d720528a383632c7766a5ccb09cead0f6b9428 Signed-off-by: Akshata Sahukar --- driver/platform/kalama/src/msm_vidc_kalama.c | 112 +++++++++--------- driver/platform/waipio/src/msm_vidc_waipio.c | 94 +++++++-------- driver/vidc/inc/msm_vidc_driver.h | 107 +++++++++++++---- driver/vidc/inc/msm_vidc_internal.h | 2 +- driver/vidc/src/msm_vdec.c | 28 +++-- driver/vidc/src/msm_venc.c | 54 +++++++-- driver/vidc/src/msm_vidc_control.c | 58 ++++++--- driver/vidc/src/msm_vidc_driver.c | 10 +- driver/vidc/src/venus_hfi.c | 2 +- driver/vidc/src/venus_hfi_response.c | 2 +- .../uapi/vidc/media/v4l2_vidc_extensions.h | 12 +- 11 files changed, 308 insertions(+), 173 deletions(-) diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index 12aed91f41..e471c242b0 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -279,13 +279,13 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { NULL, msm_vidc_set_u32}, /* - * Client will enable V4L2_CID_MPEG_VIDC_INPUT_METADATA_OUTBUF_FENCE + * Client will enable V4L2_CID_MPEG_VIDC_METADATA_OUTBUF_FENCE * to get fence_id in input metadata buffer done. */ - {INPUT_META_OUTBUF_FENCE, DEC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_INPUT_METADATA_OUTBUF_FENCE, + {META_OUTBUF_FENCE, DEC, CODECS_ALL, + V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, + 1, V4L2_MPEG_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_OUTBUF_FENCE, HFI_PROP_FENCE}, /* @@ -372,12 +372,6 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDEO_PREPEND_SPSPPS_TO_IDR}, - {META_SEQ_HDR_NAL, ENC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_SEQ_HEADER_NAL}, - {WITHOUT_STARTCODE, ENC, CODECS_ALL, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, @@ -1594,14 +1588,14 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { NULL, msm_vidc_set_u32}, {META_BITSTREAM_RESOLUTION, DEC, AV1, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, + 1, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_BITSTREAM_RESOLUTION, HFI_PROP_BITSTREAM_RESOLUTION}, {META_CROP_OFFSETS, DEC, AV1, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, + 1, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_CROP_OFFSETS, HFI_PROP_CROP_OFFSETS}, @@ -1633,74 +1627,74 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { NULL, NULL}, {META_LTR_MARK_USE, ENC, H264|HEVC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, + 1, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_LTR_MARK_USE_DETAILS, HFI_PROP_LTR_MARK_USE_DETAILS}, {META_SEQ_HDR_NAL, ENC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, + 1, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_SEQ_HEADER_NAL, HFI_PROP_METADATA_SEQ_HEADER_NAL}, {META_DPB_MISR, DEC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, + 1, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_DPB_LUMA_CHROMA_MISR, HFI_PROP_DPB_LUMA_CHROMA_MISR}, {META_OPB_MISR, DEC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, + 1, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_OPB_LUMA_CHROMA_MISR, HFI_PROP_OPB_LUMA_CHROMA_MISR}, {META_INTERLACE, DEC, H264, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, + 1, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_INTERLACE, HFI_PROP_INTERLACE_INFO}, {META_TIMESTAMP, DEC | ENC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, + 1, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_TIMESTAMP, HFI_PROP_TIMESTAMP}, {META_CONCEALED_MB_CNT, DEC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, + 1, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_CONCEALED_MB_COUNT, HFI_PROP_CONEALED_MB_COUNT}, {META_HIST_INFO, DEC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, + 1, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_HISTOGRAM_INFO, HFI_PROP_HISTOGRAM_INFO}, {META_SEI_MASTERING_DISP, DEC|ENC, HEVC|HEIC|AV1, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, + 1, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_SEI_MASTERING_DISPLAY_COLOUR, HFI_PROP_SEI_MASTERING_DISPLAY_COLOUR}, {META_SEI_CLL, DEC|ENC, HEVC|HEIC|AV1, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, + 1, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_SEI_CONTENT_LIGHT_LEVEL, HFI_PROP_SEI_CONTENT_LIGHT_LEVEL}, {META_HDR10PLUS, DEC | ENC, HEVC|HEIC|AV1, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, + 1, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_HDR10PLUS, HFI_PROP_SEI_HDR10PLUS_USERDATA}, {META_EVA_STATS, ENC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, + 1, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_EVA_STATS, HFI_PROP_EVA_STAT_INFO, 0, @@ -1708,38 +1702,38 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { {ENH_LAYER_COUNT}}, {META_BUF_TAG, DEC | ENC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, + 1, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_BUFFER_TAG, HFI_PROP_BUFFER_TAG}, {META_DPB_TAG_LIST, DEC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, + 1, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_DPB_TAG_LIST, HFI_PROP_DPB_TAG_LIST}, {META_OUTPUT_BUF_TAG, DEC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, + 1, V4L2_MPEG_VIDC_META_DISABLE, 0, HFI_PROP_BUFFER_TAG}, {META_SUBFRAME_OUTPUT, DEC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, + 1, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_SUBFRAME_OUTPUT, HFI_PROP_SUBFRAME_OUTPUT}, {META_ENC_QP_METADATA, ENC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, + 1, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_ENC_QP_METADATA, HFI_PROP_ENC_QP_METADATA}, {META_ROI_INFO, ENC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, + 1, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_ROI_INFO, HFI_PROP_ROI_INFO, CAP_FLAG_INPUT_PORT, @@ -1748,8 +1742,8 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { msm_vidc_adjust_roi_info, NULL}, {META_ROI_INFO, ENC, H264|HEVC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, + 1, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_ROI_INFO, HFI_PROP_ROI_INFO, CAP_FLAG_INPUT_PORT, @@ -1758,8 +1752,8 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { msm_vidc_adjust_roi_info, NULL}, {META_DEC_QP_METADATA, DEC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, + 1, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_DEC_QP_METADATA, HFI_PROP_DEC_QP_METADATA}, @@ -1852,8 +1846,8 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { {0}, {0}, NULL, msm_vidc_set_q16}, {META_SUBFRAME_OUTPUT, ENC, HEIC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, + 1, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_SUBFRAME_OUTPUT, HFI_PROP_SUBFRAME_OUTPUT}, {COMPLEXITY, ENC, H264 | HEVC, @@ -1861,8 +1855,8 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { 1, 100, V4L2_CID_MPEG_VIDC_VENC_COMPLEXITY}, {META_MAX_NUM_REORDER_FRAMES, DEC, HEVC | H264, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, + 1, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_MAX_NUM_REORDER_FRAMES, HFI_PROP_MAX_NUM_REORDER_FRAMES}, }; diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 9ad8d93c66..a7cea9b34e 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -332,12 +332,6 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDEO_PREPEND_SPSPPS_TO_IDR}, - {META_SEQ_HDR_NAL, ENC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_SEQ_HEADER_NAL}, - {WITHOUT_STARTCODE, ENC, CODECS_ALL, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, @@ -1491,74 +1485,74 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { NULL, NULL}, {META_LTR_MARK_USE, ENC, H264|HEVC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, + 1, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_LTR_MARK_USE_DETAILS, HFI_PROP_LTR_MARK_USE_DETAILS}, {META_SEQ_HDR_NAL, ENC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, + 1, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_SEQ_HEADER_NAL, HFI_PROP_METADATA_SEQ_HEADER_NAL}, {META_DPB_MISR, DEC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, + 1, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_DPB_LUMA_CHROMA_MISR, HFI_PROP_DPB_LUMA_CHROMA_MISR}, {META_OPB_MISR, DEC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, + 1, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_OPB_LUMA_CHROMA_MISR, HFI_PROP_OPB_LUMA_CHROMA_MISR}, {META_INTERLACE, DEC, H264, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, + 1, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_INTERLACE, HFI_PROP_INTERLACE_INFO}, {META_TIMESTAMP, DEC | ENC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, + 1, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_TIMESTAMP, HFI_PROP_TIMESTAMP}, {META_CONCEALED_MB_CNT, DEC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, + 1, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_CONCEALED_MB_COUNT, HFI_PROP_CONEALED_MB_COUNT}, {META_HIST_INFO, DEC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, + 1, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_HISTOGRAM_INFO, HFI_PROP_HISTOGRAM_INFO}, {META_SEI_MASTERING_DISP, DEC|ENC, HEVC|HEIC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, + 1, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_SEI_MASTERING_DISPLAY_COLOUR, HFI_PROP_SEI_MASTERING_DISPLAY_COLOUR}, {META_SEI_CLL, DEC|ENC, HEVC|HEIC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, + 1, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_SEI_CONTENT_LIGHT_LEVEL, HFI_PROP_SEI_CONTENT_LIGHT_LEVEL}, {META_HDR10PLUS, DEC | ENC, HEVC|HEIC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, + 1, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_HDR10PLUS, HFI_PROP_SEI_HDR10PLUS_USERDATA}, {META_EVA_STATS, ENC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, + 1, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_EVA_STATS, HFI_PROP_EVA_STAT_INFO, 0, @@ -1566,38 +1560,38 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {ENH_LAYER_COUNT}}, {META_BUF_TAG, DEC | ENC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, + 1, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_BUFFER_TAG, HFI_PROP_BUFFER_TAG}, {META_DPB_TAG_LIST, DEC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, + 1, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_DPB_TAG_LIST, HFI_PROP_DPB_TAG_LIST}, {META_OUTPUT_BUF_TAG, DEC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, + 1, V4L2_MPEG_VIDC_META_DISABLE, 0, HFI_PROP_BUFFER_TAG}, {META_SUBFRAME_OUTPUT, DEC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, + 1, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_SUBFRAME_OUTPUT, HFI_PROP_SUBFRAME_OUTPUT}, {META_ENC_QP_METADATA, ENC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, + 1, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_ENC_QP_METADATA, HFI_PROP_ENC_QP_METADATA}, {META_ROI_INFO, ENC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, + 1, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_ROI_INFO, HFI_PROP_ROI_INFO, CAP_FLAG_INPUT_PORT, @@ -1606,8 +1600,8 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { msm_vidc_adjust_roi_info, NULL}, {META_ROI_INFO, ENC, H264|HEVC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, + 1, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_ROI_INFO, HFI_PROP_ROI_INFO, CAP_FLAG_INPUT_PORT, @@ -1616,8 +1610,8 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { msm_vidc_adjust_roi_info, NULL}, {META_DEC_QP_METADATA, DEC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, + 1, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_DEC_QP_METADATA, HFI_PROP_DEC_QP_METADATA}, @@ -1710,8 +1704,8 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {0}, {0}, NULL, msm_vidc_set_q16}, {META_SUBFRAME_OUTPUT, ENC, HEIC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, + 1, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_SUBFRAME_OUTPUT, HFI_PROP_SUBFRAME_OUTPUT}, {COMPLEXITY, ENC, H264 | HEVC, @@ -1719,8 +1713,8 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 1, 100, V4L2_CID_MPEG_VIDC_VENC_COMPLEXITY}, {META_MAX_NUM_REORDER_FRAMES, DEC, HEVC | H264, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, + 1, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_MAX_NUM_REORDER_FRAMES, HFI_PROP_MAX_NUM_REORDER_FRAMES}, }; diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 0df8f601b0..427b200c59 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -8,6 +8,7 @@ #include #include +#include #include "msm_vidc_internal.h" #include "msm_vidc_core.h" #include "msm_vidc_inst.h" @@ -99,18 +100,68 @@ static inline is_internal_buffer(enum msm_vidc_buffer_type buffer_type) buffer_type == MSM_VIDC_BUF_VPSS; } +static inline bool is_meta_rx_inp_enabled(struct msm_vidc_inst *inst, u32 cap) +{ + bool enabled = false; + + if (inst->capabilities->cap[cap].value & V4L2_MPEG_VIDC_META_ENABLE && + inst->capabilities->cap[cap].value & V4L2_MPEG_VIDC_META_RX_INPUT) + enabled = true; + + return enabled; +} + +static inline bool is_meta_rx_out_enabled(struct msm_vidc_inst *inst, u32 cap) +{ + bool enabled = false; + + if (inst->capabilities->cap[cap].value & V4L2_MPEG_VIDC_META_ENABLE && + inst->capabilities->cap[cap].value & V4L2_MPEG_VIDC_META_RX_OUTPUT) + enabled = true; + + return enabled; +} + +static inline bool is_meta_tx_inp_enabled(struct msm_vidc_inst *inst, u32 cap) +{ + bool enabled = false; + + if (inst->capabilities->cap[cap].value & V4L2_MPEG_VIDC_META_ENABLE && + inst->capabilities->cap[cap].value & V4L2_MPEG_VIDC_META_TX_INPUT) + enabled = true; + + return enabled; +} + +static inline bool is_meta_tx_out_enabled(struct msm_vidc_inst *inst, u32 cap) +{ + bool enabled = false; + + if (inst->capabilities->cap[cap].value & V4L2_MPEG_VIDC_META_ENABLE && + inst->capabilities->cap[cap].value & V4L2_MPEG_VIDC_META_TX_OUTPUT) + enabled = true; + + return enabled; +} + static inline bool is_input_meta_enabled(struct msm_vidc_inst *inst) { bool enabled = false; if (is_decode_session(inst)) { - enabled = inst->capabilities->cap[META_BUF_TAG].value ? - true : false; + enabled = is_meta_tx_inp_enabled(inst, META_BUF_TAG) || + is_meta_rx_inp_enabled(inst, META_BUF_TAG) || + is_meta_tx_inp_enabled(inst, META_OUTBUF_FENCE) || + is_meta_rx_inp_enabled(inst, META_OUTBUF_FENCE); } else if (is_encode_session(inst)) { - enabled = (inst->capabilities->cap[META_SEQ_HDR_NAL].value || - inst->capabilities->cap[META_EVA_STATS].value || - inst->capabilities->cap[META_BUF_TAG].value || - inst->capabilities->cap[META_ROI_INFO].value); + enabled = is_meta_tx_inp_enabled(inst, META_SEQ_HDR_NAL) || + is_meta_rx_inp_enabled(inst, META_SEQ_HDR_NAL) || + is_meta_tx_inp_enabled(inst, META_EVA_STATS) || + is_meta_rx_inp_enabled(inst, META_EVA_STATS) || + is_meta_tx_inp_enabled(inst, META_BUF_TAG) || + is_meta_rx_inp_enabled(inst, META_BUF_TAG) || + is_meta_tx_inp_enabled(inst, META_ROI_INFO) || + is_meta_rx_inp_enabled(inst, META_ROI_INFO); } return enabled; } @@ -120,23 +171,37 @@ static inline bool is_output_meta_enabled(struct msm_vidc_inst *inst) bool enabled = false; if (is_decode_session(inst)) { - enabled = (inst->capabilities->cap[META_BITSTREAM_RESOLUTION].value || - inst->capabilities->cap[META_CROP_OFFSETS].value || - inst->capabilities->cap[META_DPB_MISR].value || - inst->capabilities->cap[META_OPB_MISR].value || - inst->capabilities->cap[META_INTERLACE].value || - inst->capabilities->cap[META_CONCEALED_MB_CNT].value || - inst->capabilities->cap[META_HIST_INFO].value || - inst->capabilities->cap[META_SEI_MASTERING_DISP].value || - inst->capabilities->cap[META_SEI_CLL].value || - inst->capabilities->cap[META_BUF_TAG].value || - inst->capabilities->cap[META_DPB_TAG_LIST].value || - inst->capabilities->cap[META_SUBFRAME_OUTPUT].value || - inst->capabilities->cap[META_MAX_NUM_REORDER_FRAMES].value); + enabled = is_meta_tx_out_enabled(inst, META_BITSTREAM_RESOLUTION) || + is_meta_rx_out_enabled(inst, META_BITSTREAM_RESOLUTION) || + is_meta_tx_out_enabled(inst, META_CROP_OFFSETS) || + is_meta_rx_out_enabled(inst, META_CROP_OFFSETS) || + is_meta_tx_out_enabled(inst, META_DPB_MISR) || + is_meta_rx_out_enabled(inst, META_DPB_MISR) || + is_meta_tx_out_enabled(inst, META_OPB_MISR) || + is_meta_rx_out_enabled(inst, META_OPB_MISR) || + is_meta_tx_out_enabled(inst, META_INTERLACE) || + is_meta_rx_out_enabled(inst, META_INTERLACE) || + is_meta_tx_out_enabled(inst, META_CONCEALED_MB_CNT) || + is_meta_rx_out_enabled(inst, META_CONCEALED_MB_CNT) || + is_meta_tx_out_enabled(inst, META_SEI_MASTERING_DISP) || + is_meta_rx_out_enabled(inst, META_SEI_MASTERING_DISP) || + is_meta_tx_out_enabled(inst, META_SEI_CLL) || + is_meta_rx_out_enabled(inst, META_SEI_CLL) || + is_meta_tx_out_enabled(inst, META_BUF_TAG) || + is_meta_rx_out_enabled(inst, META_BUF_TAG) || + is_meta_tx_out_enabled(inst, META_DPB_TAG_LIST) || + is_meta_rx_out_enabled(inst, META_DPB_TAG_LIST) || + is_meta_tx_out_enabled(inst, META_SUBFRAME_OUTPUT) || + is_meta_rx_out_enabled(inst, META_SUBFRAME_OUTPUT) || + is_meta_tx_out_enabled(inst, META_MAX_NUM_REORDER_FRAMES) || + is_meta_rx_out_enabled(inst, META_MAX_NUM_REORDER_FRAMES); } else if (is_encode_session(inst)) { - enabled = (inst->capabilities->cap[META_LTR_MARK_USE].value || - inst->capabilities->cap[META_BUF_TAG].value); + enabled = is_meta_tx_out_enabled(inst, META_LTR_MARK_USE) || + is_meta_rx_out_enabled(inst, META_LTR_MARK_USE) || + is_meta_tx_out_enabled(inst, META_BUF_TAG) || + is_meta_rx_out_enabled(inst, META_BUF_TAG); } + return enabled; } diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 51f8235125..01dcc050be 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -375,7 +375,7 @@ enum msm_vidc_inst_capability_type { MB_CYCLES_FW, MB_CYCLES_FW_VPP, SECURE_MODE, - INPUT_META_OUTBUF_FENCE, + META_OUTBUF_FENCE, FENCE_ID, FENCE_FD, TS_REORDER, diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index d53e7049b3..ae291bb7be 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -931,7 +931,7 @@ static int msm_vdec_subscribe_metadata(struct msm_vidc_inst *inst, u32 i, count = 0; struct msm_vidc_inst_capability *capability; static const u32 metadata_input_list[] = { - INPUT_META_OUTBUF_FENCE, + META_OUTBUF_FENCE, /* * when fence enabled, client needs output buffer_tag * in input metadata buffer done. @@ -970,7 +970,7 @@ static int msm_vdec_subscribe_metadata(struct msm_vidc_inst *inst, payload[0] = HFI_MODE_METADATA; if (port == INPUT_PORT) { for (i = 0; i < ARRAY_SIZE(metadata_input_list); i++) { - if (capability->cap[metadata_input_list[i]].value && + if (is_meta_rx_inp_enabled(inst, metadata_input_list[i]) && msm_vidc_allow_metadata(inst, metadata_input_list[i])) { payload[count + 1] = capability->cap[metadata_input_list[i]].hfi_id; @@ -979,7 +979,7 @@ static int msm_vdec_subscribe_metadata(struct msm_vidc_inst *inst, } } else if (port == OUTPUT_PORT) { for (i = 0; i < ARRAY_SIZE(metadata_output_list); i++) { - if (capability->cap[metadata_output_list[i]].value && + if (is_meta_rx_out_enabled(inst, metadata_output_list[i]) && msm_vidc_allow_metadata(inst, metadata_output_list[i])) { payload[count + 1] = capability->cap[metadata_output_list[i]].hfi_id; @@ -1028,7 +1028,7 @@ static int msm_vdec_set_delivery_mode_metadata(struct msm_vidc_inst *inst, if (port == INPUT_PORT) { for (i = 0; i < ARRAY_SIZE(metadata_input_list); i++) { - if (capability->cap[metadata_input_list[i]].value) { + if (is_meta_tx_inp_enabled(inst, metadata_input_list[i])) { payload[count + 1] = capability->cap[metadata_input_list[i]].hfi_id; count++; @@ -1036,7 +1036,7 @@ static int msm_vdec_set_delivery_mode_metadata(struct msm_vidc_inst *inst, } } else if (port == OUTPUT_PORT) { for (i = 0; i < ARRAY_SIZE(metadata_output_list); i++) { - if (capability->cap[metadata_output_list[i]].value && + if (is_meta_tx_out_enabled(inst, metadata_output_list[i]) && msm_vidc_allow_metadata(inst, metadata_output_list[i])) { payload[count + 1] = capability->cap[metadata_output_list[i]].hfi_id; @@ -1068,7 +1068,7 @@ static int msm_vdec_set_delivery_mode_property(struct msm_vidc_inst *inst, u32 i, count = 0; struct msm_vidc_inst_capability *capability; static const u32 property_output_list[] = { - INPUT_META_OUTBUF_FENCE, + META_OUTBUF_FENCE, }; static const u32 property_input_list[] = {}; @@ -1091,6 +1091,20 @@ static int msm_vdec_set_delivery_mode_property(struct msm_vidc_inst *inst, } } else if (port == OUTPUT_PORT) { for (i = 0; i < ARRAY_SIZE(property_output_list); i++) { + if (property_output_list[i] == META_OUTBUF_FENCE && + is_meta_rx_inp_enabled(inst, META_OUTBUF_FENCE)) { + /* + * if output buffer fence enabled via + * META_OUTBUF_FENCE, then driver will send + * fence id via HFI_PROP_FENCE to firmware. + * So enable HFI_PROP_FENCE property as + * delivery mode property. + */ + payload[count + 1] = + capability->cap[property_output_list[i]].hfi_id; + count++; + continue; + } if (capability->cap[property_output_list[i]].value) { payload[count + 1] = capability->cap[property_output_list[i]].hfi_id; @@ -2054,7 +2068,7 @@ int msm_vdec_qbuf(struct msm_vidc_inst *inst, struct vb2_buffer *vb2) } if (vb2->type == OUTPUT_META_PLANE) { - if (inst->capabilities->cap[META_DPB_TAG_LIST].value) { + if (is_meta_rx_out_enabled(inst, META_DPB_TAG_LIST)) { /* * vb2 is not allowing client to pass data in output meta plane. * adjust the bytesused as client will send buffer tag metadata diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index d304316c99..6619efb6bd 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -681,7 +681,8 @@ static int msm_venc_metadata_delivery(struct msm_vidc_inst *inst, u32 payload[32] = {0}; u32 i, count = 0; struct msm_vidc_inst_capability *capability; - static const u32 metadata_list[] = { + static const u32 metadata_output_list[] = {}; + static const u32 metadata_input_list[] = { META_SEI_MASTERING_DISP, META_SEI_CLL, META_HDR10PLUS, @@ -699,12 +700,26 @@ static int msm_venc_metadata_delivery(struct msm_vidc_inst *inst, capability = inst->capabilities; payload[0] = HFI_MODE_METADATA; - for (i = 0; i < ARRAY_SIZE(metadata_list); i++) { - if (capability->cap[metadata_list[i]].value) { - payload[count + 1] = - capability->cap[metadata_list[i]].hfi_id; - count++; + + if (port == INPUT_PORT) { + for (i = 0; i < ARRAY_SIZE(metadata_input_list); i++) { + if (is_meta_tx_inp_enabled(inst, metadata_input_list[i])) { + payload[count + 1] = + capability->cap[metadata_input_list[i]].hfi_id; + count++; + } } + } else if (port == OUTPUT_PORT) { + for (i = 0; i < ARRAY_SIZE(metadata_output_list); i++) { + if (is_meta_tx_out_enabled(inst, metadata_output_list[i])) { + payload[count + 1] = + capability->cap[metadata_output_list[i]].hfi_id; + count++; + } + } + } else { + i_vpr_e(inst, "%s: invalid port: %d\n", __func__, port); + return -EINVAL; } rc = venus_hfi_session_command(inst, @@ -726,7 +741,8 @@ static int msm_venc_metadata_subscription(struct msm_vidc_inst *inst, u32 payload[32] = {0}; u32 i, count = 0; struct msm_vidc_inst_capability *capability; - static const u32 metadata_list[] = { + static const u32 metadata_input_list[] = {}; + static const u32 metadata_output_list[] = { META_LTR_MARK_USE, META_SEQ_HDR_NAL, META_TIMESTAMP, @@ -743,12 +759,26 @@ static int msm_venc_metadata_subscription(struct msm_vidc_inst *inst, capability = inst->capabilities; payload[0] = HFI_MODE_METADATA; - for (i = 0; i < ARRAY_SIZE(metadata_list); i++) { - if (capability->cap[metadata_list[i]].value) { - payload[count + 1] = - capability->cap[metadata_list[i]].hfi_id; - count++; + + if (port == INPUT_PORT) { + for (i = 0; i < ARRAY_SIZE(metadata_input_list); i++) { + if (is_meta_rx_inp_enabled(inst, metadata_input_list[i])) { + payload[count + 1] = + capability->cap[metadata_input_list[i]].hfi_id; + count++; + } } + } else if (port == OUTPUT_PORT) { + for (i = 0; i < ARRAY_SIZE(metadata_output_list); i++) { + if (is_meta_rx_out_enabled(inst, metadata_output_list[i])) { + payload[count + 1] = + capability->cap[metadata_output_list[i]].hfi_id; + count++; + } + } + } else { + i_vpr_e(inst, "%s: invalid port: %d\n", __func__, port); + return -EINVAL; } rc = venus_hfi_session_command(inst, diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 58a7916e04..65a344a14e 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -82,8 +82,11 @@ static bool is_meta_ctrl(u32 id) id == V4L2_CID_MPEG_VIDC_METADATA_ROI_INFO || id == V4L2_CID_MPEG_VIDC_METADATA_TIMESTAMP || id == V4L2_CID_MPEG_VIDC_METADATA_ENC_QP_METADATA || + id == V4L2_CID_MPEG_VIDC_METADATA_DEC_QP_METADATA || id == V4L2_CID_MPEG_VIDC_METADATA_BITSTREAM_RESOLUTION || - id == V4L2_CID_MPEG_VIDC_METADATA_CROP_OFFSETS); + id == V4L2_CID_MPEG_VIDC_METADATA_CROP_OFFSETS || + id == V4L2_CID_MPEG_VIDC_METADATA_MAX_NUM_REORDER_FRAMES || + id == V4L2_CID_MPEG_VIDC_METADATA_OUTBUF_FENCE); } static const char *const mpeg_video_rate_control[] = { @@ -420,18 +423,42 @@ static bool is_parent_available(struct msm_vidc_inst *inst, int msm_vidc_update_cap_value(struct msm_vidc_inst *inst, u32 cap_id, s32 adjusted_val, const char *func) { + int prev_value = 0; + bool is_updated = false; + if (!inst || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - if (inst->capabilities->cap[cap_id].value != adjusted_val) + prev_value = inst->capabilities->cap[cap_id].value; + + if (is_meta_ctrl(inst->capabilities->cap[cap_id].v4l2_id)) { + /* + * cumulative control value if client set same metadata + * control multiple times. + */ + if (adjusted_val & V4L2_MPEG_VIDC_META_ENABLE) { + /* enable metadata */ + inst->capabilities->cap[cap_id].value |= adjusted_val; + } else { + /* disable metadata */ + inst->capabilities->cap[cap_id].value &= ~adjusted_val; + } + if (prev_value != (prev_value | adjusted_val)) + is_updated = true; + } else { + inst->capabilities->cap[cap_id].value = adjusted_val; + if (prev_value != adjusted_val) + is_updated = true; + } + + if (is_updated) { i_vpr_h(inst, "%s: updated database: name: %s, value: %#x -> %#x\n", func, cap_name(cap_id), - inst->capabilities->cap[cap_id].value, adjusted_val); - - inst->capabilities->cap[cap_id].value = adjusted_val; + prev_value, adjusted_val); + } return 0; } @@ -1047,11 +1074,13 @@ static int msm_vidc_update_static_property(struct msm_vidc_inst *inst, * To subscribe HFI_PROP_DPB_TAG_LIST * data in FBD, HFI_PROP_BUFFER_TAG data * must be delivered via FTB. Hence, update - * META_OUTPUT_BUF_TAG when META_DPB_TAG_LIST - * is updated. + * META_OUTPUT_BUF_TAG to transfer on output port + * when META_DPB_TAG_LIST is enbaled. */ - msm_vidc_update_cap_value(inst, META_OUTPUT_BUF_TAG, - ctrl->val, __func__); + if (is_meta_rx_out_enabled(inst, META_DPB_TAG_LIST)) { + inst->capabilities->cap[META_OUTPUT_BUF_TAG].value |= + V4L2_MPEG_VIDC_META_TX_OUTPUT | V4L2_MPEG_VIDC_META_ENABLE; + } } rc = msm_vidc_update_meta_port_settings(inst); @@ -1754,7 +1783,7 @@ static int msm_vidc_adjust_static_layer_count_and_type(struct msm_vidc_inst *ins goto exit; } - if (!inst->capabilities->cap[META_EVA_STATS].value && + if (!is_meta_tx_inp_enabled(inst, META_EVA_STATS) && hb_requested && (layer_count > 1)) { layer_count = 1; i_vpr_h(inst, @@ -2577,7 +2606,7 @@ int msm_vidc_adjust_min_quality(void *instance, struct v4l2_ctrl *ctrl) goto update_and_exit; } - if (roi_enable) { + if (is_meta_tx_inp_enabled(inst, META_ROI_INFO)) { i_vpr_h(inst, "%s: min quality not supported with roi metadata\n", __func__); @@ -2585,7 +2614,7 @@ int msm_vidc_adjust_min_quality(void *instance, struct v4l2_ctrl *ctrl) goto update_and_exit; } - if (enh_layer_count && inst->hfi_layer_type != HFI_HIER_B) { + if (enh_layer_count > 0 && inst->hfi_layer_type != HFI_HIER_B) { i_vpr_h(inst, "%s: min quality not supported for HP encoding\n", __func__); @@ -2927,7 +2956,7 @@ int msm_vidc_set_header_mode(void *instance, { int rc = 0; struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - int header_mode, prepend_sps_pps, hdr_metadata; + int header_mode, prepend_sps_pps; u32 hfi_value = 0; struct msm_vidc_inst_capability *capability; @@ -2939,7 +2968,6 @@ int msm_vidc_set_header_mode(void *instance, header_mode = capability->cap[cap_id].value; prepend_sps_pps = capability->cap[PREPEND_SPSPPS_TO_IDR].value; - hdr_metadata = capability->cap[META_SEQ_HDR_NAL].value; /* prioritize PREPEND_SPSPPS_TO_IDR mode over other header modes */ if (prepend_sps_pps) @@ -2949,7 +2977,7 @@ int msm_vidc_set_header_mode(void *instance, else hfi_value = HFI_SEQ_HEADER_SEPERATE_FRAME; - if (hdr_metadata) + if (is_meta_rx_inp_enabled(inst, META_SEQ_HDR_NAL)) hfi_value |= HFI_SEQ_HEADER_METADATA; rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32_ENUM, diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 6ff133c74f..8e58102328 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -82,7 +82,7 @@ static const struct msm_vidc_cap_name cap_name_arr[] = { {MB_CYCLES_FW, "MB_CYCLES_FW" }, {MB_CYCLES_FW_VPP, "MB_CYCLES_FW_VPP" }, {SECURE_MODE, "SECURE_MODE" }, - {INPUT_META_OUTBUF_FENCE, "INPUT_META_OUTBUF_FENCE" }, + {META_OUTBUF_FENCE, "META_OUTBUF_FENCE" }, {FENCE_ID, "FENCE_ID" }, {FENCE_FD, "FENCE_FD" }, {TS_REORDER, "TS_REORDER" }, @@ -1416,10 +1416,10 @@ bool msm_vidc_allow_property(struct msm_vidc_inst *inst, u32 hfi_id) } break; case HFI_PROP_FENCE: - if (!inst->capabilities->cap[INPUT_META_OUTBUF_FENCE].value) { + if (!is_meta_rx_inp_enabled(inst, META_OUTBUF_FENCE)) { i_vpr_h(inst, "%s: cap: %24s not enabled, hence not allowed to subscribe\n", - __func__, cap_name(INPUT_META_OUTBUF_FENCE)); + __func__, cap_name(META_OUTBUF_FENCE)); is_allowed = false; } break; @@ -3305,7 +3305,7 @@ int msm_vidc_queue_buffer_single(struct msm_vidc_inst *inst, struct vb2_buffer * if (!buf) return -EINVAL; - if (inst->capabilities->cap[INPUT_META_OUTBUF_FENCE].value && + if (is_meta_rx_inp_enabled(inst, META_OUTBUF_FENCE) && is_output_buffer(buf->type)) { fence = msm_vidc_fence_create(inst); if (!fence) @@ -3786,7 +3786,7 @@ int msm_vidc_buffer_done(struct msm_vidc_inst *inst, if (buf->type == MSM_VIDC_BUF_INPUT_META && inst->capabilities->cap[INPUT_META_VIA_REQUEST].value) { - if (inst->capabilities->cap[INPUT_META_OUTBUF_FENCE].value) + if (is_meta_rx_inp_enabled(inst, META_OUTBUF_FENCE)) return msm_vidc_v4l2_buffer_event(inst, buf); } else { return msm_vidc_vb2_buffer_done(inst, buf); diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index ebd82c96db..79ad1c9b01 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -3523,7 +3523,7 @@ int venus_hfi_queue_buffer(struct msm_vidc_inst *inst, goto unlock; } - if (inst->capabilities->cap[INPUT_META_OUTBUF_FENCE].value && + if (is_meta_rx_inp_enabled(inst, META_OUTBUF_FENCE) && is_output_buffer(buffer->type)) { rc = hfi_create_packet(inst->packet, inst->packet_size, diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index 12bf81e170..70ea9bc326 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -1557,7 +1557,7 @@ static int handle_session_property(struct msm_vidc_inst *inst, __func__, payload_ptr[0], inst->capabilities->cap[PIPE].value); break; case HFI_PROP_FENCE: - if (inst->capabilities->cap[INPUT_META_OUTBUF_FENCE].value) { + if (is_meta_rx_inp_enabled(inst, META_OUTBUF_FENCE)) { if (payload_ptr) { fence_id = payload_ptr[0]; rc = msm_vidc_fence_signal(inst, fence_id); diff --git a/include/uapi/vidc/media/v4l2_vidc_extensions.h b/include/uapi/vidc/media/v4l2_vidc_extensions.h index 555a72f88b..0f3615d573 100644 --- a/include/uapi/vidc/media/v4l2_vidc_extensions.h +++ b/include/uapi/vidc/media/v4l2_vidc_extensions.h @@ -89,6 +89,16 @@ enum v4l2_mpeg_vidc_blur_types { (V4L2_CID_MPEG_VIDC_BASE + 0x12) /* various Metadata - encoder & decoder */ +enum v4l2_mpeg_vidc_metadata_bits { + V4L2_MPEG_VIDC_META_DISABLE = 0x0, + V4L2_MPEG_VIDC_META_ENABLE = 0x1, + V4L2_MPEG_VIDC_META_TX_INPUT = 0x2, + V4L2_MPEG_VIDC_META_TX_OUTPUT = 0x4, + V4L2_MPEG_VIDC_META_RX_INPUT = 0x8, + V4L2_MPEG_VIDC_META_RX_OUTPUT = 0x10, + V4L2_MPEG_VIDC_META_MAX = 0x20, +}; + #define V4L2_CID_MPEG_VIDC_METADATA_LTR_MARK_USE_DETAILS \ (V4L2_CID_MPEG_VIDC_BASE + 0x13) #define V4L2_CID_MPEG_VIDC_METADATA_SEQ_HEADER_NAL \ @@ -201,7 +211,7 @@ enum v4l2_mpeg_video_av1_tier { #define V4L2_CID_MPEG_VIDC_INPUT_METADATA_VIA_REQUEST_ENABLE \ (V4L2_CID_MPEG_VIDC_BASE + 0x37) /* Enables Output buffer fence id via input metadata */ -#define V4L2_CID_MPEG_VIDC_INPUT_METADATA_OUTBUF_FENCE \ +#define V4L2_CID_MPEG_VIDC_METADATA_OUTBUF_FENCE \ (V4L2_CID_MPEG_VIDC_BASE + 0x38) /* Control to set fence id to driver in order get corresponding fence fd */ #define V4L2_CID_MPEG_VIDC_SW_FENCE_ID \ From 4cebf46356ea8955e4da971bd9263586eb6d8751 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Fri, 18 Mar 2022 17:09:29 -0700 Subject: [PATCH 0569/1061] video: driver: fix payload ptr null pointer dereference payload pointer will be null in case firmware incorrectly sends HFI_PAYLOAD_NONE for property packets that contain payload. In this case, driver would end up dereferencing payload ptr which is null. Hence, fix this. Change-Id: I5b65c081110ffe8bf3565972141b3b72200aee66 Signed-off-by: Akshata Sahukar --- driver/vidc/src/venus_hfi_response.c | 125 ++++++++++++++++----------- 1 file changed, 74 insertions(+), 51 deletions(-) diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index 70ea9bc326..c847547f32 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -1415,43 +1415,20 @@ static int handle_dpb_list_property(struct msm_vidc_inst *inst, return 0; } -static int handle_session_property(struct msm_vidc_inst *inst, - struct hfi_packet *pkt) +static int handle_property_with_payload(struct msm_vidc_inst *inst, + struct hfi_packet *pkt, u32 port) { int rc = 0; - u32 port; u32 *payload_ptr = NULL; u32 fence_id = 0; - if (!inst || !inst->capabilities) { - d_vpr_e("%s: Invalid params\n", __func__); - return -EINVAL; - } - - i_vpr_l(inst, "%s: property type %#x\n", __func__, pkt->type); - - port = vidc_port_from_hfi(inst, pkt->port); - if (port >= MAX_PORT) { + payload_ptr = (u32 *)((u8 *)pkt + sizeof(struct hfi_packet)); + if (!payload_ptr) { i_vpr_e(inst, - "%s: invalid port: %d for property %#x\n", - __func__, pkt->port, pkt->type); + "%s: payload_ptr cannot be null\n", __func__); return -EINVAL; } - if (pkt->payload_info != HFI_PAYLOAD_NONE) { - if (!check_for_packet_payload(inst, pkt, __func__)) - return 0; - - payload_ptr = (u32 *)((u8 *)pkt + sizeof(struct hfi_packet)); - } - - if (pkt->flags & HFI_FW_FLAGS_INFORMATION) { - i_vpr_h(inst, - "%s: information flag received for property %#x packet\n", - __func__, pkt->type); - return 0; - } - switch (pkt->type) { case HFI_PROP_BITSTREAM_RESOLUTION: inst->subcr_params[port].bitstream_resolution = payload_ptr[0]; @@ -1495,16 +1472,6 @@ static int handle_session_property(struct msm_vidc_inst *inst, if (inst->hfi_frame_info.picture_type & HFI_PICTURE_B) inst->has_bframe = true; break; - case HFI_PROP_NO_OUTPUT: - if (port != INPUT_PORT) { - i_vpr_e(inst, - "%s: invalid port: %d for property %#x\n", - __func__, pkt->port, pkt->type); - break; - } - i_vpr_h(inst, "received no_output property\n"); - inst->hfi_frame_info.no_output = 1; - break; case HFI_PROP_WORST_COMPRESSION_RATIO: inst->hfi_frame_info.cr = payload_ptr[0]; break; @@ -1535,36 +1502,28 @@ static int handle_session_property(struct msm_vidc_inst *inst, } break; case HFI_PROP_QUALITY_MODE: - if (payload_ptr && - inst->capabilities->cap[QUALITY_MODE].value != payload_ptr[0]) + if (inst->capabilities->cap[QUALITY_MODE].value != payload_ptr[0]) i_vpr_e(inst, "%s: fw quality mode(%d) not matching the capability value(%d)\n", __func__, payload_ptr[0], inst->capabilities->cap[QUALITY_MODE].value); break; case HFI_PROP_STAGE: - if (payload_ptr && - inst->capabilities->cap[STAGE].value != payload_ptr[0]) + if (inst->capabilities->cap[STAGE].value != payload_ptr[0]) i_vpr_e(inst, "%s: fw stage mode(%d) not matching the capability value(%d)\n", __func__, payload_ptr[0], inst->capabilities->cap[STAGE].value); break; case HFI_PROP_PIPE: - if (payload_ptr && - inst->capabilities->cap[PIPE].value != payload_ptr[0]) + if (inst->capabilities->cap[PIPE].value != payload_ptr[0]) i_vpr_e(inst, "%s: fw pipe mode(%d) not matching the capability value(%d)\n", __func__, payload_ptr[0], inst->capabilities->cap[PIPE].value); break; case HFI_PROP_FENCE: if (is_meta_rx_inp_enabled(inst, META_OUTBUF_FENCE)) { - if (payload_ptr) { - fence_id = payload_ptr[0]; - rc = msm_vidc_fence_signal(inst, fence_id); - } else { - i_vpr_e(inst, "%s: fence payload is null\n", __func__); - rc = -EINVAL; - } + fence_id = payload_ptr[0]; + rc = msm_vidc_fence_signal(inst, fence_id); } else { i_vpr_e(inst, "%s: fence is not enabled for this session\n", __func__); @@ -1579,6 +1538,70 @@ static int handle_session_property(struct msm_vidc_inst *inst, return rc; } +static int handle_property_without_payload(struct msm_vidc_inst *inst, + struct hfi_packet *pkt, u32 port) +{ + switch (pkt->type) { + case HFI_PROP_NO_OUTPUT: + if (port != INPUT_PORT) { + i_vpr_e(inst, + "%s: invalid port: %d for property %#x\n", + __func__, pkt->port, pkt->type); + break; + } + i_vpr_h(inst, "received no_output property\n"); + inst->hfi_frame_info.no_output = 1; + break; + default: + i_vpr_e(inst, "%s: invalid property %#x\n", + __func__, pkt->type); + break; + } + + return 0; +} + +static int handle_session_property(struct msm_vidc_inst *inst, + struct hfi_packet *pkt) +{ + int rc = 0; + u32 port; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: Invalid params\n", __func__); + return -EINVAL; + } + + i_vpr_l(inst, "%s: property type %#x\n", __func__, pkt->type); + + port = vidc_port_from_hfi(inst, pkt->port); + if (port >= MAX_PORT) { + i_vpr_e(inst, + "%s: invalid port: %d for property %#x\n", + __func__, pkt->port, pkt->type); + return -EINVAL; + } + + if (pkt->flags & HFI_FW_FLAGS_INFORMATION) { + i_vpr_h(inst, + "%s: information flag received for property %#x packet\n", + __func__, pkt->type); + return 0; + } + + if (check_for_packet_payload(inst, pkt, __func__)) { + rc = handle_property_with_payload(inst, pkt, port); + if (rc) + return rc; + } else { + rc = handle_property_without_payload(inst, pkt, port); + if (rc) + return rc; + } + + return rc; +} + static int handle_image_version_property(struct msm_vidc_core *core, struct hfi_packet *pkt) { From 0d72a68a7fc75693379e555b4e9798ab217ee17d Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Thu, 17 Mar 2022 20:12:27 +0530 Subject: [PATCH 0570/1061] video: driver: add video banner support Video-banner contains compilation timestamp, which will be helpful in stability debugging to find mismatch b/w ramdump and symbols. Change-Id: Ibc446fc4398a184b840867c568ed9e8940e490ae Signed-off-by: Govindaraj Rajagopal --- Makefile | 14 +++++++++++++- driver/vidc/src/msm_vidc.c | 4 +++- driver/vidc/src/msm_vidc_probe.c | 6 +++++- 3 files changed, 21 insertions(+), 3 deletions(-) diff --git a/Makefile b/Makefile index aec5948a70..92b3f7f075 100644 --- a/Makefile +++ b/Makefile @@ -2,7 +2,19 @@ KBUILD_OPTIONS+= VIDEO_ROOT=$(KERNEL_SRC)/$(M) -all: +VIDEO_COMPILE_TIME = $(shell date) +VIDEO_COMPILE_BY = $(shell whoami | sed 's/\\/\\\\/') +VIDEO_COMPILE_HOST = $(shell uname -n) +VIDEO_GEN_PATH = $(VIDEO_ROOT)/driver/vidc/inc/video_generated_h + +all: modules + +$(VIDEO_GEN_PATH): $(shell find . -type f \( -iname \*.c -o -iname \*.h -o -iname \*.mk \)) + echo '#define VIDEO_COMPILE_TIME "$(VIDEO_COMPILE_TIME)"' > $(VIDEO_GEN_PATH) + echo '#define VIDEO_COMPILE_BY "$(VIDEO_COMPILE_BY)"' >> $(VIDEO_GEN_PATH) + echo '#define VIDEO_COMPILE_HOST "$(VIDEO_COMPILE_HOST)"' >> $(VIDEO_GEN_PATH) + +modules: $(VIDEO_GEN_PATH) $(MAKE) -C $(KERNEL_SRC) M=$(M) modules $(KBUILD_OPTIONS) modules_install: diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index a24c789fe6..aa1b3bd82a 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -22,6 +22,8 @@ #include "venus_hfi_response.h" #include "msm_vidc.h" +extern const char video_banner[]; + #define MSM_VIDC_DRV_NAME "msm_vidc_driver" #define MSM_VIDC_BUS_NAME "platform:msm_vidc_bus" @@ -845,7 +847,7 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) struct msm_vidc_core *core; int i = 0; - d_vpr_h("%s()\n", __func__); + d_vpr_h("%s: %s\n", __func__, video_banner); core = vidc_core; if (!core) { d_vpr_e("%s: invalid params\n", __func__); diff --git a/driver/vidc/src/msm_vidc_probe.c b/driver/vidc/src/msm_vidc_probe.c index 46edabf4d0..e958c37d8f 100644 --- a/driver/vidc/src/msm_vidc_probe.c +++ b/driver/vidc/src/msm_vidc_probe.c @@ -17,11 +17,15 @@ #include "msm_vidc_platform.h" #include "msm_vidc_core.h" #include "venus_hfi.h" +#include "video_generated_h" #define BASE_DEVICE_NUMBER 32 struct msm_vidc_core *g_core; +const char video_banner[] = "Video-Banner: (" VIDEO_COMPILE_BY "@" + VIDEO_COMPILE_HOST ") (" VIDEO_COMPILE_TIME ")"; + static int msm_vidc_deinit_irq(struct msm_vidc_core *core) { struct msm_vidc_dt *dt; @@ -695,7 +699,7 @@ static int __init msm_vidc_init(void) { int rc = 0; - d_vpr_h("%s()\n", __func__); + d_vpr_h("%s: %s\n", __func__, video_banner); rc = platform_driver_register(&msm_vidc_driver); if (rc) { From fc3b1b5466a18be33bdcf385d6ab02f5e8e48fc8 Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Mon, 21 Mar 2022 11:37:47 -0700 Subject: [PATCH 0571/1061] video: driver: update condition to allow dynamic controls When client queues input buffer with dynamic controls associated with it and also sends drain command, it is possible that driver state changes to DRAIN_LAST_FLAG and after that driver tries to apply dynamic controls. For encoder currently, dynamic controls are allowed only in START AND START_OUTPUT state. To resolve this timing issue updated condition to allow dynamic controls as along as master port is streaming. Change-Id: I3fe6aa9f8ca8f89e7fffaf90940618cc6643b21b Signed-off-by: Darshana Patil --- driver/vidc/src/msm_vidc_driver.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 0f6a64924e..c3646f2f13 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -1322,7 +1322,11 @@ bool msm_vidc_allow_s_ctrl(struct msm_vidc_inst *inst, u32 id) } } } else if (is_encode_session(inst)) { - if (inst->state == MSM_VIDC_START || inst->state == MSM_VIDC_START_OUTPUT) { + if (!inst->bufq[OUTPUT_PORT].vb2q->streaming) { + allow = true; + goto exit; + } + if (inst->bufq[OUTPUT_PORT].vb2q->streaming) { switch (id) { case V4L2_CID_MPEG_VIDEO_BITRATE: case V4L2_CID_MPEG_VIDEO_GOP_SIZE: From 21ab599454686d80cc9e73e1b49d60d9ec71deed Mon Sep 17 00:00:00 2001 From: Manikanta Kanamarlapudi Date: Mon, 21 Mar 2022 17:30:46 +0530 Subject: [PATCH 0572/1061] video-driver: Allow 96x96 for hevc encoder Allow 96x96 for hevc encoder. Change-Id: I8d3d82b9f38278098cb0fedb71f1fd3f34648a35 Signed-off-by: Manikanta Kanamarlapudi --- driver/platform/kalama/src/msm_vidc_kalama.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index e471c242b0..b40a456926 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -126,15 +126,19 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { {FRAME_WIDTH, DEC, CODECS_ALL, 96, 8192, 1, 1920}, {FRAME_WIDTH, DEC, VP9, 96, 4096, 1, 1920}, {FRAME_WIDTH, ENC, CODECS_ALL, 128, 8192, 1, 1920}, + {FRAME_WIDTH, ENC, HEVC, 96, 8192, 1, 1920}, {LOSSLESS_FRAME_WIDTH, ENC, CODECS_ALL, 128, 4096, 1, 1920}, {SECURE_FRAME_WIDTH, DEC, CODECS_ALL, 96, 4096, 1, 1920}, {SECURE_FRAME_WIDTH, ENC, CODECS_ALL, 128, 4096, 1, 1920}, + {SECURE_FRAME_WIDTH, ENC, HEVC, 96, 4096, 1, 1920}, {FRAME_HEIGHT, DEC, CODECS_ALL, 96, 8192, 1, 1080}, {FRAME_HEIGHT, DEC, VP9, 96, 4096, 1, 1080}, {FRAME_HEIGHT, ENC, CODECS_ALL, 128, 8192, 1, 1080}, + {FRAME_HEIGHT, ENC, HEVC, 96, 8192, 1, 1080}, {LOSSLESS_FRAME_HEIGHT, ENC, CODECS_ALL, 128, 4096, 1, 1080}, {SECURE_FRAME_HEIGHT, DEC, CODECS_ALL, 96, 4096, 1, 1080}, {SECURE_FRAME_HEIGHT, ENC, CODECS_ALL, 128, 4096, 1, 1080}, + {SECURE_FRAME_HEIGHT, ENC, HEVC, 96, 4096, 1, 1080}, {PIX_FMTS, ENC, H264, MSM_VIDC_FMT_NV12, MSM_VIDC_FMT_NV12C, @@ -210,19 +214,23 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { /* (8192 * 4320) / 256 */ {MBPF, ENC, CODECS_ALL, 64, 138240, 1, 138240}, + {MBPF, ENC, HEVC, 36, 138240, 1, 138240}, {MBPF, DEC, CODECS_ALL, 36, 138240, 1, 138240}, /* (4096 * 2304) / 256 */ {MBPF, DEC, VP9, 36, 36864, 1, 36864}, /* (4096 * 2304) / 256 */ - {LOSSLESS_MBPF, ENC, H264|HEVC, 64, 36864, 1, 36864}, + {LOSSLESS_MBPF, ENC, H264, 64, 36864, 1, 36864}, + {LOSSLESS_MBPF, ENC, HEVC, 36, 36864, 1, 36864}, /* Batch Mode Decode */ /* TODO: update with new values based on updated voltage corner */ {BATCH_MBPF, DEC, H264|HEVC|VP9|AV1, 64, 34816, 1, 34816}, /* (4096 * 2304) / 256 */ {BATCH_FPS, DEC, H264|HEVC|VP9|AV1, 1, 120, 1, 120}, {SECURE_MBPF, ENC|DEC, H264|HEVC|VP9|AV1, 64, 36864, 1, 36864}, + {SECURE_MBPF, ENC, HEVC, 36, 36864, 1, 36864}, /* ((1920 * 1088) / 256) * 480 fps */ {MBPS, ENC, CODECS_ALL, 64, 3916800, 1, 3916800}, + {MBPS, ENC, HEVC, 36, 3916800, 1, 3916800}, /* ((1920 * 1088) / 256) * 960 fps */ {MBPS, DEC, CODECS_ALL, 64, 7833600, 1, 7833600}, /* ((4096 * 2304) / 256) * 120 */ From dc38176276332bdc1822fbe7d09356e2ff9676ed Mon Sep 17 00:00:00 2001 From: Deepa Guthyappa Madivalara Date: Thu, 24 Feb 2022 12:31:27 -0800 Subject: [PATCH 0573/1061] video driver: calculate power based on input queuing rate Use client input buffer queuing rate for power calculations for non-realtime sessions Change-Id: I498422ba1ae9ae96b782a2096dc0cd0aa7b05798 Signed-off-by: Deepa Guthyappa Madivalara --- driver/platform/kalama/src/msm_vidc_kalama.c | 4 ++ driver/platform/waipio/src/msm_vidc_waipio.c | 4 ++ .../variant/iris2/src/msm_vidc_power_iris2.c | 23 ++++---- .../variant/iris3/src/msm_vidc_power_iris3.c | 23 ++++---- driver/vidc/inc/msm_vidc_driver.h | 2 + driver/vidc/inc/msm_vidc_inst.h | 1 + driver/vidc/inc/msm_vidc_internal.h | 7 +++ driver/vidc/inc/msm_vidc_memory.h | 1 + driver/vidc/src/msm_vidc.c | 1 + driver/vidc/src/msm_vidc_driver.c | 56 ++++++++++++++++++- driver/vidc/src/msm_vidc_memory.c | 1 + driver/vidc/src/msm_vidc_power.c | 26 +++++---- driver/vidc/src/msm_vidc_vb2.c | 10 +++- 13 files changed, 123 insertions(+), 36 deletions(-) diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index a7b2644996..b26cc0ec9a 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -255,6 +255,10 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { (MINIMUM_FPS << 16), (MAXIMUM_OVERRIDE_VP9_FPS << 16), 1, (DEFAULT_FPS << 16)}, + {INPUT_RATE, ENC|DEC, CODECS_ALL, + (MINIMUM_FPS << 16), INT_MAX, + 1, (DEFAULT_FPS << 16)}, + {SCALE_FACTOR, ENC, H264|HEVC, 1, 8, 1, 8}, {MB_CYCLES_VSP, ENC, CODECS_ALL, 25, 25, 1, 25}, diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 49d20188d5..88914ddd45 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -241,6 +241,10 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { (MINIMUM_FPS << 16), (MAXIMUM_OVERRIDE_VP9_FPS << 16), 1, (DEFAULT_FPS << 16)}, + {INPUT_RATE, ENC|DEC, CODECS_ALL, + (MINIMUM_FPS << 16), INT_MAX, + 1, (DEFAULT_FPS << 16)}, + {SCALE_FACTOR, ENC, H264|HEVC, 1, 8, 1, 8}, {MB_CYCLES_VSP, ENC, CODECS_ALL, 25, 25, 1, 25}, diff --git a/driver/variant/iris2/src/msm_vidc_power_iris2.c b/driver/variant/iris2/src/msm_vidc_power_iris2.c index 3e830c2c1a..82dd29b767 100644 --- a/driver/variant/iris2/src/msm_vidc_power_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_power_iris2.c @@ -21,8 +21,7 @@ u64 msm_vidc_calc_freq_iris2(struct msm_vidc_inst *inst, u32 data_size) u32 operating_rate, vsp_factor_num = 1, vsp_factor_den = 1; u32 base_cycles = 0; u32 fps; - u32 prio_val; - u32 buf_timetamps_fps, mbpf; + u32 buf_timetamps_fps, mbpf, input_rate; if (!inst || !inst->core || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); @@ -35,14 +34,6 @@ u64 msm_vidc_calc_freq_iris2(struct msm_vidc_inst *inst, u32 data_size) return freq; } - if (!is_realtime_session(inst)) { - prio_val = inst->capabilities->cap[PRIORITY].value; - if (!prio_val || prio_val > core->dt->allowed_clks_tbl_size) - prio_val = core->dt->allowed_clks_tbl_size; - - return core->dt->allowed_clks_tbl[prio_val-1].clock_rate; - } - mbpf = msm_vidc_get_mbs_per_frame(inst); fps = msm_vidc_get_fps(inst); @@ -56,7 +47,17 @@ u64 msm_vidc_calc_freq_iris2(struct msm_vidc_inst *inst, u32 data_size) fps = buf_timetamps_fps; inst->priority_level = MSM_VIDC_PRIORITY_LOW; } - + if (!is_realtime_session(inst)) { + input_rate = msm_vidc_get_input_rate(inst); + if (input_rate > fps) { + fps = input_rate; + /* + * add 12.5% more fps to increase power to make firmware + * processing little faster than client queuing rate + */ + fps = fps + fps / 8; + } + } mbs_per_second = mbpf * fps; /* diff --git a/driver/variant/iris3/src/msm_vidc_power_iris3.c b/driver/variant/iris3/src/msm_vidc_power_iris3.c index a64d67c344..7659d9f712 100644 --- a/driver/variant/iris3/src/msm_vidc_power_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_power_iris3.c @@ -22,8 +22,7 @@ u64 msm_vidc_calc_freq_iris3(struct msm_vidc_inst *inst, u32 data_size) u32 operating_rate, vsp_factor_num = 1, vsp_factor_den = 1; u32 base_cycles = 0; u32 fps; - u32 prio_val; - u32 buf_timetamps_fps, mbpf; + u32 buf_timetamps_fps, mbpf, input_rate; if (!inst || !inst->core || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); @@ -36,14 +35,6 @@ u64 msm_vidc_calc_freq_iris3(struct msm_vidc_inst *inst, u32 data_size) return freq; } - if (!is_realtime_session(inst)) { - prio_val = inst->capabilities->cap[PRIORITY].value; - if (!prio_val || prio_val > core->dt->allowed_clks_tbl_size) - prio_val = core->dt->allowed_clks_tbl_size; - - return core->dt->allowed_clks_tbl[prio_val-1].clock_rate; - } - mbpf = msm_vidc_get_mbs_per_frame(inst); fps = msm_vidc_get_fps(inst); @@ -57,7 +48,17 @@ u64 msm_vidc_calc_freq_iris3(struct msm_vidc_inst *inst, u32 data_size) fps = buf_timetamps_fps; inst->priority_level = MSM_VIDC_PRIORITY_LOW; } - + if (!is_realtime_session(inst)) { + input_rate = msm_vidc_get_input_rate(inst); + if (input_rate > fps) { + fps = input_rate; + /* + * add 12.5% more fps to increase power to make firmware + * processing little faster than client queuing rate + */ + fps = fps + fps / 8; + } + } mbs_per_second = mbpf * fps; /* diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 698e6e08c1..0a5529b90d 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -452,5 +452,7 @@ bool res_is_less_than_or_equal_to(u32 width, u32 height, int msm_vidc_get_properties(struct msm_vidc_inst *inst); int msm_vidc_create_input_metadata_buffer(struct msm_vidc_inst *inst, u32 buf_fd); int msm_vidc_update_input_meta_buffer_index(struct msm_vidc_inst *inst, struct vb2_buffer *vb2); +int msm_vidc_update_input_rate(struct msm_vidc_inst *inst, u64 time_us); +int msm_vidc_get_input_rate(struct msm_vidc_inst *inst); #endif // _MSM_VIDC_DRIVER_H_ diff --git a/driver/vidc/inc/msm_vidc_inst.h b/driver/vidc/inc/msm_vidc_inst.h index 4a18c9cad0..130cc4a3af 100644 --- a/driver/vidc/inc/msm_vidc_inst.h +++ b/driver/vidc/inc/msm_vidc_inst.h @@ -142,6 +142,7 @@ struct msm_vidc_inst { struct list_head response_works; /* list of struct response_work */ struct list_head enc_input_crs; struct list_head dmabuf_tracker; /* list of struct msm_memory_dmabuf */ + struct list_head input_timer_list; /* list of struct msm_vidc_input_timer */ struct list_head caps_list; struct list_head children_list; /* struct msm_vidc_inst_cap_entry */ struct list_head firmware_list; /* struct msm_vidc_inst_cap_entry */ diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 4999e8d306..dc6e4b0a84 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -66,6 +66,7 @@ #define DCVS_WINDOW 16 #define ENC_FPS_WINDOW 3 #define DEC_FPS_WINDOW 10 +#define INPUT_TIMER_LIST_SIZE 30 #define INPUT_MPLANE V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE #define OUTPUT_MPLANE V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE @@ -368,6 +369,7 @@ enum msm_vidc_inst_capability_type { POWER_SAVE_MBPS, FRAME_RATE, OPERATING_RATE, + INPUT_RATE, SCALE_FACTOR, MB_CYCLES_VSP, MB_CYCLES_VPP, @@ -893,6 +895,11 @@ struct msm_vidc_timestamps { u64 rank; }; +struct msm_vidc_input_timer { + struct list_head list; + u64 time_us; +}; + enum msm_vidc_allow { MSM_VIDC_DISALLOW = 0, MSM_VIDC_ALLOW, diff --git a/driver/vidc/inc/msm_vidc_memory.h b/driver/vidc/inc/msm_vidc_memory.h index 69c4acf3c8..88bd991638 100644 --- a/driver/vidc/inc/msm_vidc_memory.h +++ b/driver/vidc/inc/msm_vidc_memory.h @@ -26,6 +26,7 @@ enum msm_memory_pool_type { MSM_MEM_POOL_TIMESTAMP, MSM_MEM_POOL_DMABUF, MSM_MEM_POOL_PACKET, + MSM_MEM_POOL_BUF_TIMER, MSM_MEM_POOL_MAX, }; diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index b2a6441c58..9ef8a57755 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -932,6 +932,7 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) INIT_LIST_HEAD(&inst->firmware_list); INIT_LIST_HEAD(&inst->enc_input_crs); INIT_LIST_HEAD(&inst->dmabuf_tracker); + INIT_LIST_HEAD(&inst->input_timer_list); INIT_LIST_HEAD(&inst->pending_pkts); INIT_LIST_HEAD(&inst->fence_list); for (i = 0; i < MAX_SIGNAL; i++) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 1f606f2b7f..ac8df4548b 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -75,6 +75,7 @@ static const struct msm_vidc_cap_name cap_name_arr[] = { {POWER_SAVE_MBPS, "POWER_SAVE_MBPS" }, {FRAME_RATE, "FRAME_RATE" }, {OPERATING_RATE, "OPERATING_RATE" }, + {INPUT_RATE, "INPUT_RATE" }, {SCALE_FACTOR, "SCALE_FACTOR" }, {MB_CYCLES_VSP, "MB_CYCLES_VSP" }, {MB_CYCLES_VPP, "MB_CYCLES_VPP" }, @@ -2352,6 +2353,59 @@ int msm_vidc_calc_window_avg_framerate(struct msm_vidc_inst *inst) return ts_ms ? (1000 * counter) / ts_ms : 0; } +int msm_vidc_update_input_rate(struct msm_vidc_inst *inst, u64 time_us) +{ + struct msm_vidc_input_timer *input_timer; + struct msm_vidc_input_timer *prev_timer = NULL; + u64 counter = 0; + u64 input_timer_sum_us = 0; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + input_timer = msm_memory_pool_alloc(inst, MSM_MEM_POOL_BUF_TIMER); + if (!input_timer) + return -ENOMEM; + + input_timer->time_us = time_us; + INIT_LIST_HEAD(&input_timer->list); + list_add_tail(&input_timer->list, &inst->input_timer_list); + list_for_each_entry(input_timer, &inst->input_timer_list, list) { + if (prev_timer) { + input_timer_sum_us += input_timer->time_us - prev_timer->time_us; + counter++; + } + prev_timer = input_timer; + } + + if (input_timer_sum_us) + inst->capabilities->cap[INPUT_RATE].value = + (s32)(DIV64_U64_ROUND_CLOSEST(counter * 1000000, + input_timer_sum_us) << 16); + + /* delete the first entry once counter >= INPUT_TIMER_LIST_SIZE */ + if (counter >= INPUT_TIMER_LIST_SIZE) { + input_timer = list_first_entry(&inst->input_timer_list, + struct msm_vidc_input_timer, list); + list_del_init(&input_timer->list); + msm_memory_pool_free(inst, input_timer); + } + + return 0; +} + +int msm_vidc_get_input_rate(struct msm_vidc_inst *inst) +{ + if (!inst || !inst->capabilities) { + d_vpr_e("%s: Invalid params\n", __func__); + return 0; + } + + return inst->capabilities->cap[INPUT_RATE].value >> 16; +} + static int msm_vidc_insert_sort(struct list_head *head, struct msm_vidc_sort *entry) { @@ -6359,4 +6413,4 @@ int msm_vidc_update_input_meta_buffer_index(struct msm_vidc_inst *inst, rc = -EINVAL; } return rc; -} +} \ No newline at end of file diff --git a/driver/vidc/src/msm_vidc_memory.c b/driver/vidc/src/msm_vidc_memory.c index 8c5ab53a01..1314d3208c 100644 --- a/driver/vidc/src/msm_vidc_memory.c +++ b/driver/vidc/src/msm_vidc_memory.c @@ -592,6 +592,7 @@ static const struct msm_vidc_type_size_name buftype_size_name_arr[] = { {MSM_MEM_POOL_DMABUF, sizeof(struct msm_memory_dmabuf), "MSM_MEM_POOL_DMABUF" }, {MSM_MEM_POOL_PACKET, sizeof(struct hfi_pending_packet) + MSM_MEM_POOL_PACKET_SIZE, "MSM_MEM_POOL_PACKET"}, + {MSM_MEM_POOL_BUF_TIMER, sizeof(struct msm_vidc_input_timer), "MSM_MEM_POOL_BUF_TIMER" }, }; int msm_memory_pools_init(struct msm_vidc_inst *inst) diff --git a/driver/vidc/src/msm_vidc_power.c b/driver/vidc/src/msm_vidc_power.c index 2eb0010375..7b0b118f31 100644 --- a/driver/vidc/src/msm_vidc_power.c +++ b/driver/vidc/src/msm_vidc_power.c @@ -133,12 +133,7 @@ static int msm_vidc_set_buses(struct msm_vidc_inst* inst) d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - core = inst->core; - if (!core || !core->platform || !core->platform->data.bus_bw_nrt) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } mutex_lock(&core->lock); curr_time_ns = ktime_get_ns(); @@ -154,11 +149,6 @@ static int msm_vidc_set_buses(struct msm_vidc_inst* inst) break; } - if (!is_realtime_session(inst)) { - temp->power.ddr_bw = core->platform->data.bus_bw_nrt[0]; - temp->power.sys_cache_bw = core->platform->data.bus_bw_nrt[0]; - } - total_bw_ddr += temp->power.ddr_bw; total_bw_llcc += temp->power.sys_cache_bw; } @@ -188,7 +178,7 @@ int msm_vidc_scale_buses(struct msm_vidc_inst *inst) struct vidc_bus_vote_data *vote_data; struct v4l2_format *out_f; struct v4l2_format *inp_f; - int codec = 0, frame_rate, buf_ts_fps; + int codec = 0, frame_rate, buf_ts_fps, input_rate; if (!inst || !inst->core || !inst->capabilities) { d_vpr_e("%s: invalid params: %pK\n", __func__, inst); @@ -238,7 +228,19 @@ int msm_vidc_scale_buses(struct msm_vidc_inst *inst) buf_ts_fps, vote_data->fps); vote_data->fps = buf_ts_fps; } - + if (!is_realtime_session(inst)) { + input_rate = msm_vidc_get_input_rate(inst); + if (input_rate > vote_data->fps) { + i_vpr_h(inst, "%s: use input rate %d for fps (%u)\n", __func__, + input_rate, vote_data->fps); + vote_data->fps = input_rate; + /* + * add 12.5% more fps to increase power to make firmware + * processing little faster than client queuing rate + */ + vote_data->fps = vote_data->fps + vote_data->fps / 8; + } + } if (inst->domain == MSM_VIDC_ENCODER) { vote_data->domain = MSM_VIDC_ENCODER; vote_data->bitrate = inst->capabilities->cap[BIT_RATE].value; diff --git a/driver/vidc/src/msm_vidc_vb2.c b/driver/vidc/src/msm_vidc_vb2.c index 7b9d823376..42c28556ba 100644 --- a/driver/vidc/src/msm_vidc_vb2.c +++ b/driver/vidc/src/msm_vidc_vb2.c @@ -378,6 +378,7 @@ void msm_vidc_buf_queue(struct vb2_buffer *vb2) int rc = 0; struct msm_vidc_inst *inst; u64 timestamp_us = 0; + u64 ktime_ns = ktime_get_ns(); inst = vb2_get_drv_priv(vb2->vb2_queue); if (!inst) { @@ -410,7 +411,14 @@ void msm_vidc_buf_queue(struct vb2_buffer *vb2) timestamp_us = div_u64(vb2->timestamp, 1000); msm_vidc_set_auto_framerate(inst, timestamp_us); } - inst->last_qbuf_time_ns = ktime_get_ns(); + inst->last_qbuf_time_ns = ktime_ns; + + if (!is_realtime_session(inst) && vb2->type == INPUT_MPLANE) { + rc = msm_vidc_update_input_rate(inst, div_u64(ktime_ns, 1000)); + if (rc) + goto unlock; + } + /* * As part of every qbuf initalise request to true. * If there are any dynamic controls associated with qbuf, From db8a8959e25bf0b210d708a13034147c3a2bc32e Mon Sep 17 00:00:00 2001 From: Maheshwar Ajja Date: Thu, 10 Feb 2022 11:36:32 -0800 Subject: [PATCH 0574/1061] video: driver: update input, output and crop dimensions Update input, output and crop resolution based in client provided resolution on input port as per the v4l2 compliance test expectation. Change-Id: I56f197d72cc132f38c00842b28b23b20c508cf23 Signed-off-by: Maheshwar Ajja Signed-off-by: Dikshita Agarwal --- driver/vidc/src/msm_venc.c | 65 +++++++++++++++++++++----------------- 1 file changed, 36 insertions(+), 29 deletions(-) diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index ef0519faac..77fcf954f7 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -159,8 +159,20 @@ static int msm_venc_set_stride_scanline(struct msm_vidc_inst *inst, return 0; } - stride_y = inst->fmts[INPUT_PORT].fmt.pix_mp.width; - scanline_y = inst->fmts[INPUT_PORT].fmt.pix_mp.height; + if (is_image_session(inst)) { + stride_y = ALIGN(inst->fmts[INPUT_PORT].fmt.pix_mp.width, HEIC_GRID_DIMENSION); + scanline_y = ALIGN(inst->fmts[INPUT_PORT].fmt.pix_mp.height, HEIC_GRID_DIMENSION); + } else if (is_rgba_colorformat(color_format)) { + stride_y = VIDEO_RGB_STRIDE_PIX(inst->fmts[INPUT_PORT].fmt.pix_mp.pixelformat, + inst->fmts[INPUT_PORT].fmt.pix_mp.width); + scanline_y = VIDEO_RGB_SCANLINES(inst->fmts[INPUT_PORT].fmt.pix_mp.pixelformat, + inst->fmts[INPUT_PORT].fmt.pix_mp.height); + } else { + stride_y = VIDEO_Y_STRIDE_PIX(inst->fmts[INPUT_PORT].fmt.pix_mp.pixelformat, + inst->fmts[INPUT_PORT].fmt.pix_mp.width); + scanline_y = VIDEO_Y_SCANLINES(inst->fmts[INPUT_PORT].fmt.pix_mp.pixelformat, + inst->fmts[INPUT_PORT].fmt.pix_mp.height); + } if (color_format == MSM_VIDC_FMT_NV12 || color_format == MSM_VIDC_FMT_P010 || color_format == MSM_VIDC_FMT_NV21) { @@ -1156,7 +1168,6 @@ int msm_venc_s_fmt_output(struct msm_vidc_inst *inst, struct v4l2_format *f) } inst->buffers.output.size = fmt->fmt.pix_mp.plane_fmt[0].sizeimage; - memcpy(f, fmt, sizeof(struct v4l2_format)); /* reset metadata buffer size with updated resolution*/ msm_vidc_update_meta_port_settings(inst); @@ -1169,6 +1180,8 @@ int msm_venc_s_fmt_output(struct msm_vidc_inst *inst, struct v4l2_format *f) inst->buffers.output.min_count, inst->buffers.output.extra_count); + /* finally update client format */ + memcpy(f, fmt, sizeof(struct v4l2_format)); return rc; } @@ -1220,8 +1233,7 @@ static int msm_venc_s_fmt_input(struct msm_vidc_inst *inst, struct v4l2_format * int rc = 0; struct v4l2_format *fmt, *output_fmt; struct msm_vidc_core *core; - u32 pix_fmt, width, height, size, bytesperline, - crop_width, crop_height; + u32 pix_fmt, width, height, size, bytesperline; if (!inst || !inst->core || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); @@ -1233,25 +1245,21 @@ static int msm_venc_s_fmt_input(struct msm_vidc_inst *inst, struct v4l2_format * pix_fmt = v4l2_colorformat_to_driver(f->fmt.pix_mp.pixelformat, __func__); msm_vidc_update_cap_value(inst, PIX_FMTS, pix_fmt, __func__); - if (is_rgba_colorformat(pix_fmt)) { - width = VIDEO_RGB_STRIDE_PIX(f->fmt.pix_mp.pixelformat, f->fmt.pix_mp.width); - height = VIDEO_RGB_SCANLINES(f->fmt.pix_mp.pixelformat, f->fmt.pix_mp.height); - crop_width = VIDEO_RGB_STRIDE_PIX(f->fmt.pix_mp.pixelformat, inst->crop.width); - crop_height = VIDEO_RGB_SCANLINES(f->fmt.pix_mp.pixelformat, inst->crop.height); - bytesperline = - VIDEO_RGB_STRIDE_BYTES(f->fmt.pix_mp.pixelformat, f->fmt.pix_mp.width); - } else if (is_image_session(inst)) { + width = f->fmt.pix_mp.width; + height = f->fmt.pix_mp.height; + + if (is_image_session(inst)) { width = ALIGN(f->fmt.pix_mp.width, HEIC_GRID_DIMENSION); height = ALIGN(f->fmt.pix_mp.height, HEIC_GRID_DIMENSION); - crop_width = ALIGN(inst->crop.width, HEIC_GRID_DIMENSION); - crop_height = ALIGN(inst->crop.height, HEIC_GRID_DIMENSION); + inst->crop.width = ALIGN(inst->crop.width, HEIC_GRID_DIMENSION); + inst->crop.height = ALIGN(inst->crop.height, HEIC_GRID_DIMENSION); bytesperline = width * (is_10bit_colorformat(pix_fmt) ? 2 : 1); + } else if (is_rgba_colorformat(pix_fmt)) { + bytesperline = VIDEO_RGB_STRIDE_BYTES(f->fmt.pix_mp.pixelformat, + f->fmt.pix_mp.width); } else { - width = VIDEO_Y_STRIDE_PIX(f->fmt.pix_mp.pixelformat, f->fmt.pix_mp.width); - height = VIDEO_Y_SCANLINES(f->fmt.pix_mp.pixelformat, f->fmt.pix_mp.height); - crop_width = VIDEO_Y_STRIDE_PIX(f->fmt.pix_mp.pixelformat, inst->crop.width); - crop_height = VIDEO_Y_SCANLINES(f->fmt.pix_mp.pixelformat, inst->crop.height); - bytesperline = VIDEO_Y_STRIDE_BYTES(f->fmt.pix_mp.pixelformat, f->fmt.pix_mp.width); + bytesperline = VIDEO_Y_STRIDE_BYTES(f->fmt.pix_mp.pixelformat, + f->fmt.pix_mp.width); } fmt = &inst->fmts[INPUT_PORT]; @@ -1295,9 +1303,8 @@ static int msm_venc_s_fmt_input(struct msm_vidc_inst *inst, struct v4l2_format * } inst->buffers.input.size = size; - if (fmt->fmt.pix_mp.width != crop_width || - fmt->fmt.pix_mp.height != crop_height) { - struct v4l2_format *output_fmt; + if (f->fmt.pix_mp.width != inst->crop.width || + f->fmt.pix_mp.height != inst->crop.height) { /* reset crop dimensions with updated resolution */ inst->crop.top = inst->crop.left = 0; @@ -1309,12 +1316,11 @@ static int msm_venc_s_fmt_input(struct msm_vidc_inst *inst, struct v4l2_format * inst->compose.width = f->fmt.pix_mp.width; inst->compose.height = f->fmt.pix_mp.height; - output_fmt = &inst->fmts[OUTPUT_PORT]; + /* update output format */ rc = msm_venc_s_fmt_output(inst, output_fmt); if (rc) return rc; } - memcpy(f, fmt, sizeof(struct v4l2_format)); /* reset metadata buffer size with updated resolution*/ msm_vidc_update_meta_port_settings(inst); @@ -1327,6 +1333,9 @@ static int msm_venc_s_fmt_input(struct msm_vidc_inst *inst, struct v4l2_format * inst->buffers.input.min_count, inst->buffers.input.extra_count); + /* finally update client format */ + memcpy(f, fmt, sizeof(struct v4l2_format)); + return rc; } @@ -1884,10 +1893,8 @@ int msm_venc_inst_init(struct msm_vidc_inst *inst) f = &inst->fmts[INPUT_PORT]; f->type = INPUT_MPLANE; f->fmt.pix_mp.pixelformat = V4L2_PIX_FMT_VIDC_NV12C; - f->fmt.pix_mp.width = VIDEO_Y_STRIDE_PIX(f->fmt.pix_mp.pixelformat, - DEFAULT_WIDTH); - f->fmt.pix_mp.height = VIDEO_Y_SCANLINES(f->fmt.pix_mp.pixelformat, - DEFAULT_HEIGHT); + f->fmt.pix_mp.width = DEFAULT_WIDTH; + f->fmt.pix_mp.height = DEFAULT_HEIGHT; f->fmt.pix_mp.num_planes = 1; f->fmt.pix_mp.plane_fmt[0].bytesperline = VIDEO_Y_STRIDE_BYTES(f->fmt.pix_mp.pixelformat, From 0ef0acb173120070f587f9ae7371c83f30ab044e Mon Sep 17 00:00:00 2001 From: Manikanta Kanamarlapudi Date: Wed, 23 Mar 2022 14:13:35 +0530 Subject: [PATCH 0575/1061] video-driver: Allow 96x96 for hevc encoder Allow 96x96 for hevc encoder in waipio target. Change-Id: If2b73e9b24c58562a20f2ccc8234cd58c52943ba Signed-off-by: Manikanta Kanamarlapudi --- driver/platform/kalama/src/msm_vidc_kalama.c | 2 ++ driver/platform/waipio/src/msm_vidc_waipio.c | 20 +++++++++++++++----- 2 files changed, 17 insertions(+), 5 deletions(-) diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index e77d0a161f..20d2f36933 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -128,6 +128,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { {FRAME_WIDTH, ENC, CODECS_ALL, 128, 8192, 1, 1920}, {FRAME_WIDTH, ENC, HEVC, 96, 8192, 1, 1920}, {LOSSLESS_FRAME_WIDTH, ENC, CODECS_ALL, 128, 4096, 1, 1920}, + {LOSSLESS_FRAME_WIDTH, ENC, HEVC, 96, 4096, 1, 1920}, {SECURE_FRAME_WIDTH, DEC, CODECS_ALL, 96, 4096, 1, 1920}, {SECURE_FRAME_WIDTH, ENC, CODECS_ALL, 128, 4096, 1, 1920}, {SECURE_FRAME_WIDTH, ENC, HEVC, 96, 4096, 1, 1920}, @@ -136,6 +137,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { {FRAME_HEIGHT, ENC, CODECS_ALL, 128, 8192, 1, 1080}, {FRAME_HEIGHT, ENC, HEVC, 96, 8192, 1, 1080}, {LOSSLESS_FRAME_HEIGHT, ENC, CODECS_ALL, 128, 4096, 1, 1080}, + {LOSSLESS_FRAME_HEIGHT, ENC, HEVC, 96, 4096, 1, 1080}, {SECURE_FRAME_HEIGHT, DEC, CODECS_ALL, 96, 4096, 1, 1080}, {SECURE_FRAME_HEIGHT, ENC, CODECS_ALL, 128, 4096, 1, 1080}, {SECURE_FRAME_HEIGHT, ENC, HEVC, 96, 4096, 1, 1080}, diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 70850cdf20..46630f7fc7 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -119,15 +119,21 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {FRAME_WIDTH, DEC, CODECS_ALL, 96, 8192, 1, 1920}, {FRAME_WIDTH, DEC, VP9, 96, 4096, 1, 1920}, {FRAME_WIDTH, ENC, CODECS_ALL, 128, 8192, 1, 1920}, - {LOSSLESS_FRAME_WIDTH, ENC, H264|HEVC, 128, 4096, 1, 1920}, + {FRAME_WIDTH, ENC, HEVC, 96, 8192, 1, 1920}, + {LOSSLESS_FRAME_WIDTH, ENC, H264, 128, 4096, 1, 1920}, + {LOSSLESS_FRAME_WIDTH, ENC, HEVC, 96, 4096, 1, 1920}, {SECURE_FRAME_WIDTH, DEC, H264|HEVC|VP9, 96, 4096, 1, 1920}, - {SECURE_FRAME_WIDTH, ENC, H264|HEVC, 128, 4096, 1, 1920}, + {SECURE_FRAME_WIDTH, ENC, H264, 128, 4096, 1, 1920}, + {SECURE_FRAME_WIDTH, ENC, HEVC, 96, 4096, 1, 1920}, {FRAME_HEIGHT, DEC, CODECS_ALL, 96, 8192, 1, 1080}, {FRAME_HEIGHT, DEC, VP9, 96, 4096, 1, 1080}, {FRAME_HEIGHT, ENC, CODECS_ALL, 128, 8192, 1, 1080}, - {LOSSLESS_FRAME_HEIGHT, ENC, H264|HEVC, 128, 4096, 1, 1080}, + {FRAME_HEIGHT, ENC, HEVC, 96, 8192, 1, 1080}, + {LOSSLESS_FRAME_HEIGHT, ENC, H264, 128, 4096, 1, 1080}, + {LOSSLESS_FRAME_HEIGHT, ENC, HEVC, 96, 4096, 1, 1080}, {SECURE_FRAME_HEIGHT, DEC, H264|HEVC|VP9, 96, 4096, 1, 1080}, - {SECURE_FRAME_HEIGHT, ENC, H264|HEVC, 128, 4096, 1, 1080}, + {SECURE_FRAME_HEIGHT, ENC, H264, 128, 4096, 1, 1080}, + {SECURE_FRAME_HEIGHT, ENC, HEVC, 96, 4096, 1, 1080}, {PIX_FMTS, ENC, H264, MSM_VIDC_FMT_NV12, MSM_VIDC_FMT_NV12C, @@ -196,19 +202,23 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { /* (8192 * 4320) / 256 */ {MBPF, ENC, CODECS_ALL, 64, 138240, 1, 138240}, + {MBPF, ENC, HEVC, 36, 138240, 1, 138240}, {MBPF, DEC, CODECS_ALL, 36, 138240, 1, 138240}, /* (4096 * 2304) / 256 */ {MBPF, DEC, VP9, 36, 36864, 1, 36864}, /* (4096 * 2304) / 256 */ - {LOSSLESS_MBPF, ENC, H264|HEVC, 64, 36864, 1, 36864}, + {LOSSLESS_MBPF, ENC, H264, 64, 36864, 1, 36864}, + {LOSSLESS_MBPF, ENC, HEVC, 36, 36864, 1, 36864}, /* Batch Mode Decode */ /* TODO: update with new values based on updated voltage corner */ {BATCH_MBPF, DEC, H264|HEVC|VP9, 64, 34816, 1, 34816}, /* (4096 * 2304) / 256 */ {BATCH_FPS, DEC, H264|HEVC|VP9, 1, 120, 1, 120}, {SECURE_MBPF, ENC|DEC, H264|HEVC|VP9, 64, 36864, 1, 36864}, + {SECURE_MBPF, ENC, HEVC, 36, 36864, 1, 36864}, /* ((1920 * 1088) / 256) * 480 fps */ {MBPS, ENC, CODECS_ALL, 64, 3916800, 1, 3916800}, + {MBPS, ENC, HEVC, 36, 3916800, 1, 3916800}, /* ((1920 * 1088) / 256) * 960 fps */ {MBPS, DEC, CODECS_ALL, 64, 7833600, 1, 7833600}, /* ((4096 * 2304) / 256) * 120 */ From 8ac3cc7120f82848e695d2f95b0d870790dae768 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Mon, 21 Mar 2022 16:50:55 -0700 Subject: [PATCH 0576/1061] video: driver: Change v4l2 metadata controls to BITMASK type Change v4l2 metadata controls to V4L2_CTRL_TYPE_BITMASK type Change-Id: I7f19b5dbf268351d368d9824cb52569e60116ebb Signed-off-by: Akshata Sahukar --- driver/platform/kalama/src/msm_vidc_kalama.c | 247 +++++++++++++------ driver/platform/waipio/src/msm_vidc_waipio.c | 213 ++++++++++------ driver/vidc/inc/msm_vidc_driver.h | 72 ++---- driver/vidc/inc/msm_vidc_internal.h | 52 ++-- driver/vidc/src/msm_vdec.c | 72 ++---- driver/vidc/src/msm_venc.c | 46 +--- driver/vidc/src/msm_vidc_control.c | 79 +++--- driver/vidc/src/msm_vidc_driver.c | 102 +++++--- 8 files changed, 488 insertions(+), 395 deletions(-) diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index e77d0a161f..04aeea2704 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -295,10 +295,12 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { * to get fence_id in input metadata buffer done. */ {META_OUTBUF_FENCE, DEC, CODECS_ALL, - V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, - 1, V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_INPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_OUTBUF_FENCE, - HFI_PROP_FENCE}, + HFI_PROP_FENCE, + CAP_FLAG_BITMASK}, /* * Client to do set_ctrl with FENCE_ID to set fence_id @@ -1600,16 +1602,22 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { NULL, msm_vidc_set_u32}, {META_BITSTREAM_RESOLUTION, DEC, AV1, - V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, - 1, V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_INPUT | + V4L2_MPEG_VIDC_META_RX_OUTPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_BITSTREAM_RESOLUTION, - HFI_PROP_BITSTREAM_RESOLUTION}, + HFI_PROP_BITSTREAM_RESOLUTION, + CAP_FLAG_BITMASK}, {META_CROP_OFFSETS, DEC, AV1, - V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, - 1, V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_INPUT | + V4L2_MPEG_VIDC_META_RX_OUTPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_CROP_OFFSETS, - HFI_PROP_CROP_OFFSETS}, + HFI_PROP_CROP_OFFSETS, + CAP_FLAG_BITMASK}, {ALL_INTRA, ENC, H264|HEVC, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, @@ -1639,135 +1647,206 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { NULL, NULL}, {META_LTR_MARK_USE, ENC, H264|HEVC, - V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, - 1, V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_LTR_MARK_USE_DETAILS, - HFI_PROP_LTR_MARK_USE_DETAILS}, + HFI_PROP_LTR_MARK_USE_DETAILS, + CAP_FLAG_BITMASK}, {META_SEQ_HDR_NAL, ENC, CODECS_ALL, - V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, - 1, V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_SEQ_HEADER_NAL, - HFI_PROP_METADATA_SEQ_HEADER_NAL}, + HFI_PROP_METADATA_SEQ_HEADER_NAL, + CAP_FLAG_BITMASK}, {META_DPB_MISR, DEC, CODECS_ALL, - V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, - 1, V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_DPB_LUMA_CHROMA_MISR, - HFI_PROP_DPB_LUMA_CHROMA_MISR}, + HFI_PROP_DPB_LUMA_CHROMA_MISR, + CAP_FLAG_BITMASK}, {META_OPB_MISR, DEC, CODECS_ALL, - V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, - 1, V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_OPB_LUMA_CHROMA_MISR, - HFI_PROP_OPB_LUMA_CHROMA_MISR}, + HFI_PROP_OPB_LUMA_CHROMA_MISR, + CAP_FLAG_BITMASK}, {META_INTERLACE, DEC, H264, - V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, - 1, V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_INTERLACE, - HFI_PROP_INTERLACE_INFO}, + HFI_PROP_INTERLACE_INFO, + CAP_FLAG_BITMASK}, {META_TIMESTAMP, DEC | ENC, CODECS_ALL, - V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, - 1, V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_TIMESTAMP, - HFI_PROP_TIMESTAMP}, + HFI_PROP_TIMESTAMP, + CAP_FLAG_BITMASK}, {META_CONCEALED_MB_CNT, DEC, CODECS_ALL, - V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, - 1, V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_CONCEALED_MB_COUNT, - HFI_PROP_CONEALED_MB_COUNT}, + HFI_PROP_CONEALED_MB_COUNT, + CAP_FLAG_BITMASK}, {META_HIST_INFO, DEC, CODECS_ALL, - V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, - 1, V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_HISTOGRAM_INFO, - HFI_PROP_HISTOGRAM_INFO}, + HFI_PROP_HISTOGRAM_INFO, + CAP_FLAG_BITMASK}, - {META_SEI_MASTERING_DISP, DEC|ENC, HEVC|HEIC|AV1, - V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, - 1, V4L2_MPEG_VIDC_META_DISABLE, + {META_SEI_MASTERING_DISP, ENC, HEVC|HEIC, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_TX_INPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_SEI_MASTERING_DISPLAY_COLOUR, - HFI_PROP_SEI_MASTERING_DISPLAY_COLOUR}, + HFI_PROP_SEI_MASTERING_DISPLAY_COLOUR, + CAP_FLAG_BITMASK}, - {META_SEI_CLL, DEC|ENC, HEVC|HEIC|AV1, - V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, - 1, V4L2_MPEG_VIDC_META_DISABLE, + {META_SEI_MASTERING_DISP, DEC, HEVC|HEIC|AV1, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_INPUT | + V4L2_MPEG_VIDC_META_RX_OUTPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_SEI_MASTERING_DISPLAY_COLOUR, + HFI_PROP_SEI_MASTERING_DISPLAY_COLOUR, + CAP_FLAG_BITMASK}, + + {META_SEI_CLL, ENC, HEVC|HEIC, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_TX_INPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_SEI_CONTENT_LIGHT_LEVEL, - HFI_PROP_SEI_CONTENT_LIGHT_LEVEL}, + HFI_PROP_SEI_CONTENT_LIGHT_LEVEL, + CAP_FLAG_BITMASK}, - {META_HDR10PLUS, DEC | ENC, HEVC|HEIC|AV1, - V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, - 1, V4L2_MPEG_VIDC_META_DISABLE, + {META_SEI_CLL, DEC, HEVC|HEIC|AV1, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_INPUT | + V4L2_MPEG_VIDC_META_RX_OUTPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_SEI_CONTENT_LIGHT_LEVEL, + HFI_PROP_SEI_CONTENT_LIGHT_LEVEL, + CAP_FLAG_BITMASK}, + + {META_HDR10PLUS, ENC, HEVC|HEIC, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_TX_INPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_HDR10PLUS, - HFI_PROP_SEI_HDR10PLUS_USERDATA}, + HFI_PROP_SEI_HDR10PLUS_USERDATA, + CAP_FLAG_BITMASK}, + + {META_HDR10PLUS, DEC, HEVC|HEIC|AV1, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_INPUT | + V4L2_MPEG_VIDC_META_RX_OUTPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_HDR10PLUS, + HFI_PROP_SEI_HDR10PLUS_USERDATA, + CAP_FLAG_BITMASK}, {META_EVA_STATS, ENC, CODECS_ALL, - V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, - 1, V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_TX_INPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_EVA_STATS, HFI_PROP_EVA_STAT_INFO, - 0, + CAP_FLAG_BITMASK, {0}, {ENH_LAYER_COUNT}}, - {META_BUF_TAG, DEC | ENC, CODECS_ALL, - V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, - 1, V4L2_MPEG_VIDC_META_DISABLE, + {META_BUF_TAG, ENC, CODECS_ALL, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_TX_INPUT | + V4L2_MPEG_VIDC_META_RX_OUTPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_BUFFER_TAG, - HFI_PROP_BUFFER_TAG}, + HFI_PROP_BUFFER_TAG, + CAP_FLAG_BITMASK}, + + /* + * when fence enabled, client needs output buffer_tag + * in input metadata buffer done. + */ + {META_BUF_TAG, DEC, CODECS_ALL, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_TX_INPUT | + V4L2_MPEG_VIDC_META_TX_OUTPUT | V4L2_MPEG_VIDC_META_RX_INPUT | + V4L2_MPEG_VIDC_META_RX_OUTPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_BUFFER_TAG, + HFI_PROP_BUFFER_TAG, + CAP_FLAG_BITMASK}, {META_DPB_TAG_LIST, DEC, CODECS_ALL, - V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, - 1, V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_DPB_TAG_LIST, - HFI_PROP_DPB_TAG_LIST}, - - {META_OUTPUT_BUF_TAG, DEC, CODECS_ALL, - V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, - 1, V4L2_MPEG_VIDC_META_DISABLE, - 0, - HFI_PROP_BUFFER_TAG}, + HFI_PROP_DPB_TAG_LIST, + CAP_FLAG_BITMASK}, {META_SUBFRAME_OUTPUT, DEC, CODECS_ALL, - V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, - 1, V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_SUBFRAME_OUTPUT, - HFI_PROP_SUBFRAME_OUTPUT}, + HFI_PROP_SUBFRAME_OUTPUT, + CAP_FLAG_BITMASK}, {META_ENC_QP_METADATA, ENC, CODECS_ALL, - V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, - 1, V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_ENC_QP_METADATA, - HFI_PROP_ENC_QP_METADATA}, + HFI_PROP_ENC_QP_METADATA, + CAP_FLAG_BITMASK}, {META_ROI_INFO, ENC, CODECS_ALL, - V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, - 1, V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_TX_INPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_ROI_INFO, HFI_PROP_ROI_INFO, - CAP_FLAG_INPUT_PORT, + CAP_FLAG_INPUT_PORT | CAP_FLAG_BITMASK, {BITRATE_MODE, PIX_FMTS}, {0}, msm_vidc_adjust_roi_info, NULL}, {META_ROI_INFO, ENC, H264|HEVC, - V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, - 1, V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_TX_INPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_ROI_INFO, HFI_PROP_ROI_INFO, - CAP_FLAG_INPUT_PORT, + CAP_FLAG_INPUT_PORT | CAP_FLAG_BITMASK, {BITRATE_MODE, PIX_FMTS}, {MIN_QUALITY}, msm_vidc_adjust_roi_info, NULL}, {META_DEC_QP_METADATA, DEC, CODECS_ALL, - V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, - 1, V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_DEC_QP_METADATA, - HFI_PROP_DEC_QP_METADATA}, + HFI_PROP_DEC_QP_METADATA, + CAP_FLAG_BITMASK}, /* configure image properties */ {FRAME_WIDTH, ENC, HEIC, 128, 16384, 1, 16384}, @@ -1858,19 +1937,23 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { {0}, {0}, NULL, msm_vidc_set_q16}, {META_SUBFRAME_OUTPUT, ENC, HEIC, - V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, - 1, V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_SUBFRAME_OUTPUT, - HFI_PROP_SUBFRAME_OUTPUT}, + HFI_PROP_SUBFRAME_OUTPUT, + CAP_FLAG_BITMASK}, {COMPLEXITY, ENC, H264 | HEVC, 0, 100, 1, 100, V4L2_CID_MPEG_VIDC_VENC_COMPLEXITY}, {META_MAX_NUM_REORDER_FRAMES, DEC, HEVC | H264, - V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, - 1, V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_MAX_NUM_REORDER_FRAMES, - HFI_PROP_MAX_NUM_REORDER_FRAMES}, + HFI_PROP_MAX_NUM_REORDER_FRAMES, + CAP_FLAG_BITMASK}, }; /* diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 70850cdf20..8b6a3c0058 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -1489,135 +1489,198 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { NULL, NULL}, {META_LTR_MARK_USE, ENC, H264|HEVC, - V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, - 1, V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_LTR_MARK_USE_DETAILS, - HFI_PROP_LTR_MARK_USE_DETAILS}, + HFI_PROP_LTR_MARK_USE_DETAILS, + CAP_FLAG_BITMASK}, {META_SEQ_HDR_NAL, ENC, CODECS_ALL, - V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, - 1, V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_SEQ_HEADER_NAL, - HFI_PROP_METADATA_SEQ_HEADER_NAL}, + HFI_PROP_METADATA_SEQ_HEADER_NAL, + CAP_FLAG_BITMASK}, {META_DPB_MISR, DEC, CODECS_ALL, - V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, - 1, V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_DPB_LUMA_CHROMA_MISR, - HFI_PROP_DPB_LUMA_CHROMA_MISR}, + HFI_PROP_DPB_LUMA_CHROMA_MISR, + CAP_FLAG_BITMASK}, {META_OPB_MISR, DEC, CODECS_ALL, - V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, - 1, V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_OPB_LUMA_CHROMA_MISR, - HFI_PROP_OPB_LUMA_CHROMA_MISR}, + HFI_PROP_OPB_LUMA_CHROMA_MISR, + CAP_FLAG_BITMASK}, {META_INTERLACE, DEC, H264, - V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, - 1, V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_INTERLACE, - HFI_PROP_INTERLACE_INFO}, + HFI_PROP_INTERLACE_INFO, + CAP_FLAG_BITMASK}, {META_TIMESTAMP, DEC | ENC, CODECS_ALL, - V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, - 1, V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_TIMESTAMP, - HFI_PROP_TIMESTAMP}, + HFI_PROP_TIMESTAMP, + CAP_FLAG_BITMASK}, {META_CONCEALED_MB_CNT, DEC, CODECS_ALL, - V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, - 1, V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_CONCEALED_MB_COUNT, - HFI_PROP_CONEALED_MB_COUNT}, + HFI_PROP_CONEALED_MB_COUNT, + CAP_FLAG_BITMASK}, {META_HIST_INFO, DEC, CODECS_ALL, - V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, - 1, V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_HISTOGRAM_INFO, - HFI_PROP_HISTOGRAM_INFO}, + HFI_PROP_HISTOGRAM_INFO, + CAP_FLAG_BITMASK}, - {META_SEI_MASTERING_DISP, DEC|ENC, HEVC|HEIC, - V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, - 1, V4L2_MPEG_VIDC_META_DISABLE, + {META_SEI_MASTERING_DISP, ENC, HEVC|HEIC, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_TX_INPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_SEI_MASTERING_DISPLAY_COLOUR, - HFI_PROP_SEI_MASTERING_DISPLAY_COLOUR}, + HFI_PROP_SEI_MASTERING_DISPLAY_COLOUR, + CAP_FLAG_BITMASK}, - {META_SEI_CLL, DEC|ENC, HEVC|HEIC, - V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, - 1, V4L2_MPEG_VIDC_META_DISABLE, + {META_SEI_MASTERING_DISP, DEC, HEVC|HEIC, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_SEI_MASTERING_DISPLAY_COLOUR, + HFI_PROP_SEI_MASTERING_DISPLAY_COLOUR, + CAP_FLAG_BITMASK}, + + {META_SEI_CLL, ENC, HEVC|HEIC, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_TX_INPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_SEI_CONTENT_LIGHT_LEVEL, - HFI_PROP_SEI_CONTENT_LIGHT_LEVEL}, + HFI_PROP_SEI_CONTENT_LIGHT_LEVEL, + CAP_FLAG_BITMASK}, - {META_HDR10PLUS, DEC | ENC, HEVC|HEIC, - V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, - 1, V4L2_MPEG_VIDC_META_DISABLE, + {META_SEI_CLL, DEC, HEVC|HEIC, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_SEI_CONTENT_LIGHT_LEVEL, + HFI_PROP_SEI_CONTENT_LIGHT_LEVEL, + CAP_FLAG_BITMASK}, + + {META_HDR10PLUS, ENC, HEVC|HEIC, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_TX_INPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_HDR10PLUS, - HFI_PROP_SEI_HDR10PLUS_USERDATA}, + HFI_PROP_SEI_HDR10PLUS_USERDATA, + CAP_FLAG_BITMASK}, + + {META_HDR10PLUS, DEC, HEVC|HEIC, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_HDR10PLUS, + HFI_PROP_SEI_HDR10PLUS_USERDATA, + CAP_FLAG_BITMASK}, {META_EVA_STATS, ENC, CODECS_ALL, - V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, - 1, V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_TX_INPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_EVA_STATS, HFI_PROP_EVA_STAT_INFO, - 0, + CAP_FLAG_BITMASK, {0}, {ENH_LAYER_COUNT}}, - {META_BUF_TAG, DEC | ENC, CODECS_ALL, - V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, - 1, V4L2_MPEG_VIDC_META_DISABLE, + {META_BUF_TAG, ENC, CODECS_ALL, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_TX_INPUT | + V4L2_MPEG_VIDC_META_RX_OUTPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_BUFFER_TAG, - HFI_PROP_BUFFER_TAG}, + HFI_PROP_BUFFER_TAG, + CAP_FLAG_BITMASK}, + + {META_BUF_TAG, DEC, CODECS_ALL, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_TX_INPUT | + V4L2_MPEG_VIDC_META_TX_OUTPUT | V4L2_MPEG_VIDC_META_RX_OUTPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_BUFFER_TAG, + HFI_PROP_BUFFER_TAG, + CAP_FLAG_BITMASK}, {META_DPB_TAG_LIST, DEC, CODECS_ALL, - V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, - 1, V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_DPB_TAG_LIST, - HFI_PROP_DPB_TAG_LIST}, - - {META_OUTPUT_BUF_TAG, DEC, CODECS_ALL, - V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, - 1, V4L2_MPEG_VIDC_META_DISABLE, - 0, - HFI_PROP_BUFFER_TAG}, + HFI_PROP_DPB_TAG_LIST, + CAP_FLAG_BITMASK}, {META_SUBFRAME_OUTPUT, DEC, CODECS_ALL, - V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, - 1, V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_SUBFRAME_OUTPUT, - HFI_PROP_SUBFRAME_OUTPUT}, + HFI_PROP_SUBFRAME_OUTPUT, + CAP_FLAG_BITMASK}, {META_ENC_QP_METADATA, ENC, CODECS_ALL, - V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, - 1, V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_ENC_QP_METADATA, - HFI_PROP_ENC_QP_METADATA}, + HFI_PROP_ENC_QP_METADATA, + CAP_FLAG_BITMASK}, {META_ROI_INFO, ENC, CODECS_ALL, - V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, - 1, V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_TX_INPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_ROI_INFO, HFI_PROP_ROI_INFO, - CAP_FLAG_INPUT_PORT, + CAP_FLAG_INPUT_PORT | CAP_FLAG_BITMASK, {BITRATE_MODE, PIX_FMTS}, {0}, msm_vidc_adjust_roi_info, NULL}, {META_ROI_INFO, ENC, H264|HEVC, - V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, - 1, V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_TX_INPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_ROI_INFO, HFI_PROP_ROI_INFO, - CAP_FLAG_INPUT_PORT, + CAP_FLAG_INPUT_PORT | CAP_FLAG_BITMASK, {BITRATE_MODE, PIX_FMTS}, {MIN_QUALITY}, msm_vidc_adjust_roi_info, NULL}, {META_DEC_QP_METADATA, DEC, CODECS_ALL, - V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, - 1, V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_DEC_QP_METADATA, - HFI_PROP_DEC_QP_METADATA}, + HFI_PROP_DEC_QP_METADATA, + CAP_FLAG_BITMASK}, /* configure image properties */ {FRAME_WIDTH, ENC, HEIC, 128, 16384, 1, 16384}, @@ -1708,19 +1771,23 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {0}, {0}, NULL, msm_vidc_set_q16}, {META_SUBFRAME_OUTPUT, ENC, HEIC, - V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, - 1, V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_SUBFRAME_OUTPUT, - HFI_PROP_SUBFRAME_OUTPUT}, + HFI_PROP_SUBFRAME_OUTPUT, + CAP_FLAG_BITMASK}, {COMPLEXITY, ENC, H264 | HEVC, 0, 100, 1, 100, V4L2_CID_MPEG_VIDC_VENC_COMPLEXITY}, {META_MAX_NUM_REORDER_FRAMES, DEC, HEVC | H264, - V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_MAX, - 1, V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_MAX_NUM_REORDER_FRAMES, - HFI_PROP_MAX_NUM_REORDER_FRAMES}, + HFI_PROP_MAX_NUM_REORDER_FRAMES, + CAP_FLAG_BITMASK}, }; /* diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 192e2a5425..f0f6a16e1e 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -101,6 +101,14 @@ static inline is_internal_buffer(enum msm_vidc_buffer_type buffer_type) buffer_type == MSM_VIDC_BUF_PARTIAL_DATA; } +static inline bool is_meta_cap(u32 cap) +{ + if (cap > INST_CAP_NONE && cap < META_CAP_MAX) + return true; + + return false; +} + static inline bool is_meta_rx_inp_enabled(struct msm_vidc_inst *inst, u32 cap) { bool enabled = false; @@ -148,59 +156,30 @@ static inline bool is_meta_tx_out_enabled(struct msm_vidc_inst *inst, u32 cap) static inline bool is_input_meta_enabled(struct msm_vidc_inst *inst) { bool enabled = false; + u32 i; - if (is_decode_session(inst)) { - enabled = is_meta_tx_inp_enabled(inst, META_BUF_TAG) || - is_meta_rx_inp_enabled(inst, META_BUF_TAG) || - is_meta_tx_inp_enabled(inst, META_OUTBUF_FENCE) || - is_meta_rx_inp_enabled(inst, META_OUTBUF_FENCE); - } else if (is_encode_session(inst)) { - enabled = is_meta_tx_inp_enabled(inst, META_SEQ_HDR_NAL) || - is_meta_rx_inp_enabled(inst, META_SEQ_HDR_NAL) || - is_meta_tx_inp_enabled(inst, META_EVA_STATS) || - is_meta_rx_inp_enabled(inst, META_EVA_STATS) || - is_meta_tx_inp_enabled(inst, META_BUF_TAG) || - is_meta_rx_inp_enabled(inst, META_BUF_TAG) || - is_meta_tx_inp_enabled(inst, META_ROI_INFO) || - is_meta_rx_inp_enabled(inst, META_ROI_INFO); + for (i = INST_CAP_NONE + 1; i < META_CAP_MAX; i++) { + if (is_meta_tx_inp_enabled(inst, i) || + is_meta_rx_inp_enabled(inst, i)) { + enabled = true; + break; + } } + return enabled; } static inline bool is_output_meta_enabled(struct msm_vidc_inst *inst) { bool enabled = false; + u32 i; - if (is_decode_session(inst)) { - enabled = is_meta_tx_out_enabled(inst, META_BITSTREAM_RESOLUTION) || - is_meta_rx_out_enabled(inst, META_BITSTREAM_RESOLUTION) || - is_meta_tx_out_enabled(inst, META_CROP_OFFSETS) || - is_meta_rx_out_enabled(inst, META_CROP_OFFSETS) || - is_meta_tx_out_enabled(inst, META_DPB_MISR) || - is_meta_rx_out_enabled(inst, META_DPB_MISR) || - is_meta_tx_out_enabled(inst, META_OPB_MISR) || - is_meta_rx_out_enabled(inst, META_OPB_MISR) || - is_meta_tx_out_enabled(inst, META_INTERLACE) || - is_meta_rx_out_enabled(inst, META_INTERLACE) || - is_meta_tx_out_enabled(inst, META_CONCEALED_MB_CNT) || - is_meta_rx_out_enabled(inst, META_CONCEALED_MB_CNT) || - is_meta_tx_out_enabled(inst, META_SEI_MASTERING_DISP) || - is_meta_rx_out_enabled(inst, META_SEI_MASTERING_DISP) || - is_meta_tx_out_enabled(inst, META_SEI_CLL) || - is_meta_rx_out_enabled(inst, META_SEI_CLL) || - is_meta_tx_out_enabled(inst, META_BUF_TAG) || - is_meta_rx_out_enabled(inst, META_BUF_TAG) || - is_meta_tx_out_enabled(inst, META_DPB_TAG_LIST) || - is_meta_rx_out_enabled(inst, META_DPB_TAG_LIST) || - is_meta_tx_out_enabled(inst, META_SUBFRAME_OUTPUT) || - is_meta_rx_out_enabled(inst, META_SUBFRAME_OUTPUT) || - is_meta_tx_out_enabled(inst, META_MAX_NUM_REORDER_FRAMES) || - is_meta_rx_out_enabled(inst, META_MAX_NUM_REORDER_FRAMES); - } else if (is_encode_session(inst)) { - enabled = is_meta_tx_out_enabled(inst, META_LTR_MARK_USE) || - is_meta_rx_out_enabled(inst, META_LTR_MARK_USE) || - is_meta_tx_out_enabled(inst, META_BUF_TAG) || - is_meta_rx_out_enabled(inst, META_BUF_TAG); + for (i = INST_CAP_NONE + 1; i < META_CAP_MAX; i++) { + if (is_meta_tx_out_enabled(inst, i) || + is_meta_rx_out_enabled(inst, i)) { + enabled = true; + break; + } } return enabled; @@ -454,7 +433,10 @@ struct msm_vidc_inst *get_inst(struct msm_vidc_core *core, void put_inst(struct msm_vidc_inst *inst); bool msm_vidc_allow_s_fmt(struct msm_vidc_inst *inst, u32 type); bool msm_vidc_allow_s_ctrl(struct msm_vidc_inst *inst, u32 id); -bool msm_vidc_allow_metadata(struct msm_vidc_inst *inst, u32 cap_id); +bool msm_vidc_allow_metadata_delivery(struct msm_vidc_inst *inst, + u32 cap_id, u32 port); +bool msm_vidc_allow_metadata_subscription(struct msm_vidc_inst *inst, + u32 cap_id, u32 port); bool msm_vidc_allow_property(struct msm_vidc_inst *inst, u32 hfi_id); int msm_vidc_update_property_cap(struct msm_vidc_inst *inst, u32 hfi_id, bool allow); diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index aaf18769df..f9f28ac816 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -352,6 +352,33 @@ enum msm_vidc_core_capability_type { */ enum msm_vidc_inst_capability_type { INST_CAP_NONE = 0, + /* place all metadata after this line + * (Between INST_CAP_NONE and META_CAP_MAX) + */ + META_SEQ_HDR_NAL, + META_BITSTREAM_RESOLUTION, + META_CROP_OFFSETS, + META_DPB_MISR, + META_OPB_MISR, + META_INTERLACE, + META_OUTBUF_FENCE, + META_LTR_MARK_USE, + META_TIMESTAMP, + META_CONCEALED_MB_CNT, + META_HIST_INFO, + META_SEI_MASTERING_DISP, + META_SEI_CLL, + META_HDR10PLUS, + META_BUF_TAG, + META_DPB_TAG_LIST, + META_SUBFRAME_OUTPUT, + META_ENC_QP_METADATA, + META_DEC_QP_METADATA, + META_MAX_NUM_REORDER_FRAMES, + META_EVA_STATS, + META_ROI_INFO, + META_CAP_MAX, + /* end of metadata caps */ FRAME_WIDTH, LOSSLESS_FRAME_WIDTH, SECURE_FRAME_WIDTH, @@ -378,7 +405,6 @@ enum msm_vidc_inst_capability_type { MB_CYCLES_FW, MB_CYCLES_FW_VPP, SECURE_MODE, - META_OUTBUF_FENCE, FENCE_ID, FENCE_FD, TS_REORDER, @@ -389,7 +415,6 @@ enum msm_vidc_inst_capability_type { SUPER_FRAME, HEADER_MODE, PREPEND_SPSPPS_TO_IDR, - META_SEQ_HDR_NAL, WITHOUT_STARTCODE, NAL_LENGTH_FIELD, REQUEST_I_FRAME, @@ -451,32 +476,11 @@ enum msm_vidc_inst_capability_type { DRAP, INPUT_METADATA_FD, INPUT_META_VIA_REQUEST, - META_BITSTREAM_RESOLUTION, - META_CROP_OFFSETS, - META_DPB_MISR, - META_OPB_MISR, - META_INTERLACE, ENC_IP_CR, - META_LTR_MARK_USE, - META_TIMESTAMP, - META_CONCEALED_MB_CNT, - META_HIST_INFO, - META_SEI_MASTERING_DISP, - META_SEI_CLL, - META_HDR10PLUS, - META_EVA_STATS, - META_BUF_TAG, - META_DPB_TAG_LIST, - META_OUTPUT_BUF_TAG, - META_SUBFRAME_OUTPUT, - META_ENC_QP_METADATA, - META_DEC_QP_METADATA, COMPLEXITY, - META_MAX_NUM_REORDER_FRAMES, /* place all root(no parent) enums before this line */ PROFILE, - META_ROI_INFO, ENH_LAYER_COUNT, BIT_RATE, LOWLATENCY_MODE, @@ -509,7 +513,6 @@ enum msm_vidc_inst_capability_type { INPUT_BUF_HOST_MAX_COUNT, OUTPUT_BUF_HOST_MAX_COUNT, /* place all leaf(no child) enums before this line */ - INST_CAP_MAX, }; @@ -520,6 +523,7 @@ enum msm_vidc_inst_capability_flags { CAP_FLAG_INPUT_PORT = BIT(2), CAP_FLAG_OUTPUT_PORT = BIT(3), CAP_FLAG_CLIENT_SET = BIT(4), + CAP_FLAG_BITMASK = BIT(5), }; struct msm_vidc_inst_cap { diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 33af65974d..4e40fe2820 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -931,35 +931,6 @@ static int msm_vdec_subscribe_metadata(struct msm_vidc_inst *inst, u32 payload[32] = {0}; u32 i, count = 0; struct msm_vidc_inst_capability *capability; - static const u32 metadata_input_list[] = { - META_OUTBUF_FENCE, - /* - * when fence enabled, client needs output buffer_tag - * in input metadata buffer done. - */ - META_OUTPUT_BUF_TAG, - }; - static const u32 metadata_output_list[] = { - META_BITSTREAM_RESOLUTION, - META_CROP_OFFSETS, - META_DPB_MISR, - META_OPB_MISR, - META_INTERLACE, - META_TIMESTAMP, - META_CONCEALED_MB_CNT, - META_HIST_INFO, - META_SEI_MASTERING_DISP, - META_SEI_CLL, - META_HDR10PLUS, - /* - * client needs input buffer tag in output metadata buffer done. - */ - META_BUF_TAG, - META_DPB_TAG_LIST, - META_SUBFRAME_OUTPUT, - META_DEC_QP_METADATA, - META_MAX_NUM_REORDER_FRAMES, - }; if (!inst || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); @@ -970,20 +941,20 @@ static int msm_vdec_subscribe_metadata(struct msm_vidc_inst *inst, capability = inst->capabilities; payload[0] = HFI_MODE_METADATA; if (port == INPUT_PORT) { - for (i = 0; i < ARRAY_SIZE(metadata_input_list); i++) { - if (is_meta_rx_inp_enabled(inst, metadata_input_list[i]) && - msm_vidc_allow_metadata(inst, metadata_input_list[i])) { - payload[count + 1] = - capability->cap[metadata_input_list[i]].hfi_id; + for (i = INST_CAP_NONE + 1; i < META_CAP_MAX; i++) { + if (is_meta_rx_inp_enabled(inst, i) && + msm_vidc_allow_metadata_subscription( + inst, i, port)) { + payload[count + 1] = capability->cap[i].hfi_id; count++; } } } else if (port == OUTPUT_PORT) { - for (i = 0; i < ARRAY_SIZE(metadata_output_list); i++) { - if (is_meta_rx_out_enabled(inst, metadata_output_list[i]) && - msm_vidc_allow_metadata(inst, metadata_output_list[i])) { - payload[count + 1] = - capability->cap[metadata_output_list[i]].hfi_id; + for (i = INST_CAP_NONE + 1; i < META_CAP_MAX; i++) { + if (is_meta_rx_out_enabled(inst, i) && + msm_vidc_allow_metadata_subscription( + inst, i, port)) { + payload[count + 1] = capability->cap[i].hfi_id; count++; } } @@ -1011,12 +982,6 @@ static int msm_vdec_set_delivery_mode_metadata(struct msm_vidc_inst *inst, u32 payload[32] = {0}; u32 i, count = 0; struct msm_vidc_inst_capability *capability; - static const u32 metadata_input_list[] = { - META_BUF_TAG, - }; - static const u32 metadata_output_list[] = { - META_OUTPUT_BUF_TAG, - }; if (!inst || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); @@ -1028,19 +993,18 @@ static int msm_vdec_set_delivery_mode_metadata(struct msm_vidc_inst *inst, payload[0] = HFI_MODE_METADATA; if (port == INPUT_PORT) { - for (i = 0; i < ARRAY_SIZE(metadata_input_list); i++) { - if (is_meta_tx_inp_enabled(inst, metadata_input_list[i])) { - payload[count + 1] = - capability->cap[metadata_input_list[i]].hfi_id; + for (i = INST_CAP_NONE + 1; i < META_CAP_MAX; i++) { + if (is_meta_tx_inp_enabled(inst, i)) { + payload[count + 1] = capability->cap[i].hfi_id; count++; } } } else if (port == OUTPUT_PORT) { - for (i = 0; i < ARRAY_SIZE(metadata_output_list); i++) { - if (is_meta_tx_out_enabled(inst, metadata_output_list[i]) && - msm_vidc_allow_metadata(inst, metadata_output_list[i])) { - payload[count + 1] = - capability->cap[metadata_output_list[i]].hfi_id; + for (i = INST_CAP_NONE + 1; i < META_CAP_MAX; i++) { + if (is_meta_tx_out_enabled(inst, i) && + msm_vidc_allow_metadata_delivery( + inst, i, port)) { + payload[count + 1] = capability->cap[i].hfi_id; count++; } } diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index 6619efb6bd..fc30eb1ffb 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -681,15 +681,6 @@ static int msm_venc_metadata_delivery(struct msm_vidc_inst *inst, u32 payload[32] = {0}; u32 i, count = 0; struct msm_vidc_inst_capability *capability; - static const u32 metadata_output_list[] = {}; - static const u32 metadata_input_list[] = { - META_SEI_MASTERING_DISP, - META_SEI_CLL, - META_HDR10PLUS, - META_EVA_STATS, - META_BUF_TAG, - META_ROI_INFO, - }; if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); @@ -702,18 +693,16 @@ static int msm_venc_metadata_delivery(struct msm_vidc_inst *inst, payload[0] = HFI_MODE_METADATA; if (port == INPUT_PORT) { - for (i = 0; i < ARRAY_SIZE(metadata_input_list); i++) { - if (is_meta_tx_inp_enabled(inst, metadata_input_list[i])) { - payload[count + 1] = - capability->cap[metadata_input_list[i]].hfi_id; + for (i = INST_CAP_NONE + 1; i < META_CAP_MAX; i++) { + if (is_meta_tx_inp_enabled(inst, i)) { + payload[count + 1] = capability->cap[i].hfi_id; count++; } } } else if (port == OUTPUT_PORT) { - for (i = 0; i < ARRAY_SIZE(metadata_output_list); i++) { - if (is_meta_tx_out_enabled(inst, metadata_output_list[i])) { - payload[count + 1] = - capability->cap[metadata_output_list[i]].hfi_id; + for (i = INST_CAP_NONE + 1; i < META_CAP_MAX; i++) { + if (is_meta_tx_out_enabled(inst, i)) { + payload[count + 1] = capability->cap[i].hfi_id; count++; } } @@ -741,15 +730,6 @@ static int msm_venc_metadata_subscription(struct msm_vidc_inst *inst, u32 payload[32] = {0}; u32 i, count = 0; struct msm_vidc_inst_capability *capability; - static const u32 metadata_input_list[] = {}; - static const u32 metadata_output_list[] = { - META_LTR_MARK_USE, - META_SEQ_HDR_NAL, - META_TIMESTAMP, - META_BUF_TAG, - META_SUBFRAME_OUTPUT, - META_ENC_QP_METADATA, - }; if (!inst) { d_vpr_e("%s: invalid params\n", __func__); @@ -761,18 +741,16 @@ static int msm_venc_metadata_subscription(struct msm_vidc_inst *inst, payload[0] = HFI_MODE_METADATA; if (port == INPUT_PORT) { - for (i = 0; i < ARRAY_SIZE(metadata_input_list); i++) { - if (is_meta_rx_inp_enabled(inst, metadata_input_list[i])) { - payload[count + 1] = - capability->cap[metadata_input_list[i]].hfi_id; + for (i = INST_CAP_NONE + 1; i < META_CAP_MAX; i++) { + if (is_meta_rx_inp_enabled(inst, i)) { + payload[count + 1] = capability->cap[i].hfi_id; count++; } } } else if (port == OUTPUT_PORT) { - for (i = 0; i < ARRAY_SIZE(metadata_output_list); i++) { - if (is_meta_rx_out_enabled(inst, metadata_output_list[i])) { - payload[count + 1] = - capability->cap[metadata_output_list[i]].hfi_id; + for (i = INST_CAP_NONE + 1; i < META_CAP_MAX; i++) { + if (is_meta_rx_out_enabled(inst, i)) { + payload[count + 1] = capability->cap[i].hfi_id; count++; } } diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 65a344a14e..2b3c25e7fd 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -63,32 +63,6 @@ static bool is_priv_ctrl(u32 id) return private; } -static bool is_meta_ctrl(u32 id) -{ - return (id == V4L2_CID_MPEG_VIDC_METADATA_LTR_MARK_USE_DETAILS || - id == V4L2_CID_MPEG_VIDC_METADATA_SEQ_HEADER_NAL || - id == V4L2_CID_MPEG_VIDC_METADATA_DPB_LUMA_CHROMA_MISR || - id == V4L2_CID_MPEG_VIDC_METADATA_OPB_LUMA_CHROMA_MISR || - id == V4L2_CID_MPEG_VIDC_METADATA_INTERLACE || - id == V4L2_CID_MPEG_VIDC_METADATA_CONCEALED_MB_COUNT || - id == V4L2_CID_MPEG_VIDC_METADATA_HISTOGRAM_INFO || - id == V4L2_CID_MPEG_VIDC_METADATA_SEI_MASTERING_DISPLAY_COLOUR || - id == V4L2_CID_MPEG_VIDC_METADATA_SEI_CONTENT_LIGHT_LEVEL || - id == V4L2_CID_MPEG_VIDC_METADATA_HDR10PLUS || - id == V4L2_CID_MPEG_VIDC_METADATA_EVA_STATS || - id == V4L2_CID_MPEG_VIDC_METADATA_BUFFER_TAG || - id == V4L2_CID_MPEG_VIDC_METADATA_DPB_TAG_LIST || - id == V4L2_CID_MPEG_VIDC_METADATA_SUBFRAME_OUTPUT || - id == V4L2_CID_MPEG_VIDC_METADATA_ROI_INFO || - id == V4L2_CID_MPEG_VIDC_METADATA_TIMESTAMP || - id == V4L2_CID_MPEG_VIDC_METADATA_ENC_QP_METADATA || - id == V4L2_CID_MPEG_VIDC_METADATA_DEC_QP_METADATA || - id == V4L2_CID_MPEG_VIDC_METADATA_BITSTREAM_RESOLUTION || - id == V4L2_CID_MPEG_VIDC_METADATA_CROP_OFFSETS || - id == V4L2_CID_MPEG_VIDC_METADATA_MAX_NUM_REORDER_FRAMES || - id == V4L2_CID_MPEG_VIDC_METADATA_OUTBUF_FENCE); -} - static const char *const mpeg_video_rate_control[] = { "VBR", "CBR", @@ -433,7 +407,7 @@ int msm_vidc_update_cap_value(struct msm_vidc_inst *inst, u32 cap_id, prev_value = inst->capabilities->cap[cap_id].value; - if (is_meta_ctrl(inst->capabilities->cap[cap_id].v4l2_id)) { + if (is_meta_cap(cap_id)) { /* * cumulative control value if client set same metadata * control multiple times. @@ -831,10 +805,24 @@ int msm_vidc_ctrl_init(struct msm_vidc_inst *inst) ctrl_cfg.max = capability->cap[idx].max; ctrl_cfg.min = capability->cap[idx].min; ctrl_cfg.ops = core->v4l2_ctrl_ops; - ctrl_cfg.type = (capability->cap[idx].flags & - CAP_FLAG_MENU) ? - V4L2_CTRL_TYPE_MENU : - V4L2_CTRL_TYPE_INTEGER; + if (capability->cap[idx].flags & CAP_FLAG_MENU) + ctrl_cfg.type = V4L2_CTRL_TYPE_MENU; + else if (capability->cap[idx].flags & CAP_FLAG_BITMASK) + ctrl_cfg.type = V4L2_CTRL_TYPE_BITMASK; + else + ctrl_cfg.type = V4L2_CTRL_TYPE_INTEGER; + /* allow all metadata modes from v4l2 side */ + if (is_meta_cap(idx)) { + ctrl_cfg.max = V4L2_MPEG_VIDC_META_MAX - 1; + /* bitmask is expected to be enabled for meta controls */ + if (ctrl_cfg.type != V4L2_CTRL_TYPE_BITMASK) { + i_vpr_e(inst, + "%s: missing bitmask for cap %s\n", + __func__, cap_name(idx)); + rc = -EINVAL; + goto error; + } + } if (ctrl_cfg.type == V4L2_CTRL_TYPE_MENU) { ctrl_cfg.menu_skip_mask = ~(capability->cap[idx].step_or_mask); @@ -873,8 +861,8 @@ int msm_vidc_ctrl_init(struct msm_vidc_inst *inst) } } if (!ctrl) { - i_vpr_e(inst, "%s: invalid ctrl %#x\n", __func__, - capability->cap[idx].v4l2_id); + i_vpr_e(inst, "%s: invalid ctrl %#x cap %24s\n", __func__, + capability->cap[idx].v4l2_id, cap_name(idx)); rc = -EINVAL; goto error; } @@ -1068,25 +1056,22 @@ static int msm_vidc_update_static_property(struct msm_vidc_inst *inst, msm_vidc_allow_dcvs(inst); } - if (is_meta_ctrl(ctrl->id)) { - if (cap_id == META_DPB_TAG_LIST) { - /* - * To subscribe HFI_PROP_DPB_TAG_LIST - * data in FBD, HFI_PROP_BUFFER_TAG data - * must be delivered via FTB. Hence, update - * META_OUTPUT_BUF_TAG to transfer on output port - * when META_DPB_TAG_LIST is enbaled. - */ - if (is_meta_rx_out_enabled(inst, META_DPB_TAG_LIST)) { - inst->capabilities->cap[META_OUTPUT_BUF_TAG].value |= - V4L2_MPEG_VIDC_META_TX_OUTPUT | V4L2_MPEG_VIDC_META_ENABLE; - } - } + if (is_meta_cap(cap_id)) { + /* validate metadata control value against allowed settings */ + if ((ctrl->val & inst->capabilities->cap[cap_id].max) != ctrl->val) { + i_vpr_e(inst, + "%s: allowed bits for cap %s is %#x, client set %#x\n", + __func__, cap_name(cap_id), + inst->capabilities->cap[cap_id].max, + ctrl->val); + return -EINVAL; + } rc = msm_vidc_update_meta_port_settings(inst); if (rc) return rc; } + rc = msm_vidc_update_buffer_count_if_needed(inst, ctrl); if (rc) return rc; diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index e098f1afd2..0ce8f3aa0d 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -57,6 +57,29 @@ struct msm_vidc_cap_name { static const struct msm_vidc_cap_name cap_name_arr[] = { {INST_CAP_NONE, "INST_CAP_NONE" }, + {META_SEQ_HDR_NAL, "META_SEQ_HDR_NAL" }, + {META_BITSTREAM_RESOLUTION, "META_BITSTREAM_RESOLUTION" }, + {META_CROP_OFFSETS, "META_CROP_OFFSETS" }, + {META_DPB_MISR, "META_DPB_MISR" }, + {META_OPB_MISR, "META_OPB_MISR" }, + {META_INTERLACE, "META_INTERLACE" }, + {META_OUTBUF_FENCE, "META_OUTBUF_FENCE" }, + {META_LTR_MARK_USE, "META_LTR_MARK_USE" }, + {META_TIMESTAMP, "META_TIMESTAMP" }, + {META_CONCEALED_MB_CNT, "META_CONCEALED_MB_CNT" }, + {META_HIST_INFO, "META_HIST_INFO" }, + {META_SEI_MASTERING_DISP, "META_SEI_MASTERING_DISP" }, + {META_SEI_CLL, "META_SEI_CLL" }, + {META_HDR10PLUS, "META_HDR10PLUS" }, + {META_BUF_TAG, "META_BUF_TAG" }, + {META_DPB_TAG_LIST, "META_DPB_TAG_LIST" }, + {META_SUBFRAME_OUTPUT, "META_SUBFRAME_OUTPUT" }, + {META_ENC_QP_METADATA, "META_ENC_QP_METADATA" }, + {META_DEC_QP_METADATA, "META_DEC_QP_METADATA" }, + {META_MAX_NUM_REORDER_FRAMES, "META_MAX_NUM_REORDER_FRAMES"}, + {META_EVA_STATS, "META_EVA_STATS" }, + {META_ROI_INFO, "META_ROI_INFO" }, + {META_CAP_MAX, "META_CAP_MAX" }, {FRAME_WIDTH, "FRAME_WIDTH" }, {LOSSLESS_FRAME_WIDTH, "LOSSLESS_FRAME_WIDTH" }, {SECURE_FRAME_WIDTH, "SECURE_FRAME_WIDTH" }, @@ -83,7 +106,6 @@ static const struct msm_vidc_cap_name cap_name_arr[] = { {MB_CYCLES_FW, "MB_CYCLES_FW" }, {MB_CYCLES_FW_VPP, "MB_CYCLES_FW_VPP" }, {SECURE_MODE, "SECURE_MODE" }, - {META_OUTBUF_FENCE, "META_OUTBUF_FENCE" }, {FENCE_ID, "FENCE_ID" }, {FENCE_FD, "FENCE_FD" }, {TS_REORDER, "TS_REORDER" }, @@ -94,7 +116,6 @@ static const struct msm_vidc_cap_name cap_name_arr[] = { {SUPER_FRAME, "SUPER_FRAME" }, {HEADER_MODE, "HEADER_MODE" }, {PREPEND_SPSPPS_TO_IDR, "PREPEND_SPSPPS_TO_IDR" }, - {META_SEQ_HDR_NAL, "META_SEQ_HDR_NAL" }, {WITHOUT_STARTCODE, "WITHOUT_STARTCODE" }, {NAL_LENGTH_FIELD, "NAL_LENGTH_FIELD" }, {REQUEST_I_FRAME, "REQUEST_I_FRAME" }, @@ -156,30 +177,9 @@ static const struct msm_vidc_cap_name cap_name_arr[] = { {DRAP, "DRAP" }, {INPUT_METADATA_FD, "INPUT_METADATA_FD" }, {INPUT_META_VIA_REQUEST, "INPUT_META_VIA_REQUEST" }, - {META_BITSTREAM_RESOLUTION, "META_BITSTREAM_RESOLUTION" }, - {META_CROP_OFFSETS, "META_CROP_OFFSETS" }, - {META_DPB_MISR, "META_DPB_MISR" }, - {META_OPB_MISR, "META_OPB_MISR" }, - {META_INTERLACE, "META_INTERLACE" }, {ENC_IP_CR, "ENC_IP_CR" }, - {META_LTR_MARK_USE, "META_LTR_MARK_USE" }, - {META_TIMESTAMP, "META_TIMESTAMP" }, - {META_CONCEALED_MB_CNT, "META_CONCEALED_MB_CNT" }, - {META_HIST_INFO, "META_HIST_INFO" }, - {META_SEI_MASTERING_DISP, "META_SEI_MASTERING_DISP" }, - {META_SEI_CLL, "META_SEI_CLL" }, - {META_HDR10PLUS, "META_HDR10PLUS" }, - {META_EVA_STATS, "META_EVA_STATS" }, - {META_BUF_TAG, "META_BUF_TAG" }, - {META_DPB_TAG_LIST, "META_DPB_TAG_LIST" }, - {META_OUTPUT_BUF_TAG, "META_OUTPUT_BUF_TAG" }, - {META_SUBFRAME_OUTPUT, "META_SUBFRAME_OUTPUT" }, - {META_ENC_QP_METADATA, "META_ENC_QP_METADATA" }, - {META_DEC_QP_METADATA, "META_DEC_QP_METADATA" }, {COMPLEXITY, "COMPLEXITY" }, - {META_MAX_NUM_REORDER_FRAMES, "META_MAX_NUM_REORDER_FRAMES"}, {PROFILE, "PROFILE" }, - {META_ROI_INFO, "META_ROI_INFO" }, {ENH_LAYER_COUNT, "ENH_LAYER_COUNT" }, {BIT_RATE, "BIT_RATE" }, {LOWLATENCY_MODE, "LOWLATENCY_MODE" }, @@ -1379,7 +1379,14 @@ exit: return allow; } -bool msm_vidc_allow_metadata(struct msm_vidc_inst *inst, u32 cap_id) +bool msm_vidc_allow_metadata_delivery(struct msm_vidc_inst *inst, u32 cap_id, + u32 port) +{ + return true; +} + +bool msm_vidc_allow_metadata_subscription(struct msm_vidc_inst *inst, u32 cap_id, + u32 port) { bool is_allowed = true; @@ -1388,19 +1395,42 @@ bool msm_vidc_allow_metadata(struct msm_vidc_inst *inst, u32 cap_id) return false; } - switch (cap_id) { - case META_OUTPUT_BUF_TAG: - case META_DPB_TAG_LIST: - if (!is_ubwc_colorformat(inst->capabilities->cap[PIX_FMTS].value)) { - i_vpr_h(inst, - "%s: cap: %24s not allowed for split mode\n", - __func__, cap_name(cap_id)); - is_allowed = false; + if (port == INPUT_PORT) { + switch (cap_id) { + case META_BUF_TAG: + case META_BITSTREAM_RESOLUTION: + case META_CROP_OFFSETS: + case META_SEI_MASTERING_DISP: + case META_SEI_CLL: + case META_HDR10PLUS: + if (!is_meta_rx_inp_enabled(inst, META_OUTBUF_FENCE)) { + i_vpr_h(inst, + "%s: cap: %24s not allowed as output buffer fence is disabled\n", + __func__, cap_name(cap_id)); + is_allowed = false; + } + break; + default: + is_allowed = true; + break; } - break; - default: - is_allowed = true; - break; + } else if (port == OUTPUT_PORT) { + switch (cap_id) { + case META_DPB_TAG_LIST: + if (!is_ubwc_colorformat(inst->capabilities->cap[PIX_FMTS].value)) { + i_vpr_h(inst, + "%s: cap: %24s not allowed for split mode\n", + __func__, cap_name(cap_id)); + is_allowed = false; + } + break; + default: + is_allowed = true; + break; + } + } else { + i_vpr_e(inst, "%s: invalid port %d\n", __func__, port); + is_allowed = false; } return is_allowed; From 5ae6ad83d251e5afbacc15629989208a3c7e9a17 Mon Sep 17 00:00:00 2001 From: Mahesh Kumar Sharma Date: Mon, 14 Mar 2022 18:15:33 -0700 Subject: [PATCH 0577/1061] video: driver: decouple min quality, CAC and quality boost Remove dependency between min quality, CAC and quality boost. Accept quality boost value from client and if client did not set then enable max quality boost upto 4k@60fps and disable after that. Change-Id: I0685065b8dee8754aff2cf5f176a2f40e9e080dd Signed-off-by: Mahesh Kumar Sharma --- driver/platform/kalama/src/msm_vidc_kalama.c | 28 ++++++--- driver/platform/waipio/src/msm_vidc_waipio.c | 22 +++++-- driver/variant/iris3/inc/msm_vidc_iris3.h | 5 ++ driver/variant/iris3/src/msm_vidc_iris3.c | 63 ++++++++++++++++++++ driver/vidc/inc/msm_vidc_control.h | 2 +- driver/vidc/src/msm_vidc_control.c | 41 ++++++++++--- 6 files changed, 139 insertions(+), 22 deletions(-) diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index 04aeea2704..8763d70215 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -13,6 +13,7 @@ #include "msm_vidc_core.h" #include "msm_vidc_control.h" #include "hfi_property.h" +#include "msm_vidc_iris3.h" #define DEFAULT_VIDEO_CONCEAL_COLOR_BLACK 0x8020010 #define MAX_LTR_FRAME_COUNT 2 @@ -650,9 +651,9 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { V4L2_CID_MPEG_VIDC_CONTENT_ADAPTIVE_CODING, HFI_PROP_CONTENT_ADAPTIVE_CODING, CAP_FLAG_OUTPUT_PORT, - {BITRATE_MODE, MIN_QUALITY}, + {BITRATE_MODE, LAYER_ENABLE, LAYER_TYPE}, {0}, - msm_vidc_adjust_cac, + msm_vidc_adjust_brs, msm_vidc_set_vbr_related_properties}, {BITRATE_BOOST, ENC, H264|HEVC, @@ -660,9 +661,9 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { V4L2_CID_MPEG_VIDC_QUALITY_BITRATE_BOOST, HFI_PROP_BITRATE_BOOST, CAP_FLAG_OUTPUT_PORT, - {BITRATE_MODE, MIN_QUALITY}, + {BITRATE_MODE}, {0}, - msm_vidc_adjust_bitrate_boost, + msm_vidc_adjust_bitrate_boost_iris3, msm_vidc_set_vbr_related_properties}, {MIN_QUALITY, ENC, H264, @@ -671,7 +672,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { HFI_PROP_MAINTAIN_MIN_QUALITY, CAP_FLAG_OUTPUT_PORT, {BITRATE_MODE, ENH_LAYER_COUNT, META_ROI_INFO}, - {CONTENT_ADAPTIVE_CODING, BITRATE_BOOST, BLUR_TYPES}, + {BLUR_TYPES}, msm_vidc_adjust_min_quality, msm_vidc_set_vbr_related_properties}, @@ -682,7 +683,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { CAP_FLAG_OUTPUT_PORT, {BITRATE_MODE, PIX_FMTS, ENH_LAYER_COUNT, META_ROI_INFO}, - {CONTENT_ADAPTIVE_CODING, BITRATE_BOOST, BLUR_TYPES}, + {BLUR_TYPES}, msm_vidc_adjust_min_quality, msm_vidc_set_vbr_related_properties}, @@ -859,14 +860,25 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P, V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_TYPE, HFI_PROP_LAYER_ENCODING_TYPE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {0}, {CONTENT_ADAPTIVE_CODING}}, {LAYER_ENABLE, ENC, H264, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING, HFI_PROP_LAYER_ENCODING_TYPE, - CAP_FLAG_OUTPUT_PORT}, + CAP_FLAG_OUTPUT_PORT, + {0}, {CONTENT_ADAPTIVE_CODING}}, + + {LAYER_ENABLE, ENC, HEVC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, + 0, + CAP_FLAG_OUTPUT_PORT, + {0}, + {CONTENT_ADAPTIVE_CODING}}, {ENH_LAYER_COUNT, ENC, HEVC, 0, 5, 1, 0, diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 8b6a3c0058..bb296724e8 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -591,9 +591,9 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_CID_MPEG_VIDC_CONTENT_ADAPTIVE_CODING, HFI_PROP_CONTENT_ADAPTIVE_CODING, CAP_FLAG_OUTPUT_PORT, - {BITRATE_MODE, MIN_QUALITY}, + {BITRATE_MODE, LAYER_ENABLE, LAYER_TYPE}, {BLUR_TYPES}, - msm_vidc_adjust_cac, + msm_vidc_adjust_brs, msm_vidc_set_vbr_related_properties}, {BITRATE_BOOST, ENC, H264|HEVC, @@ -790,7 +790,8 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P, V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE, HFI_PROP_LAYER_ENCODING_TYPE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {0}, {CONTENT_ADAPTIVE_CODING}}, {LAYER_TYPE, ENC, H264, V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_B, @@ -800,14 +801,25 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P, V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_TYPE, HFI_PROP_LAYER_ENCODING_TYPE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {0}, {CONTENT_ADAPTIVE_CODING}}, {LAYER_ENABLE, ENC, H264, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING, HFI_PROP_LAYER_ENCODING_TYPE, - CAP_FLAG_OUTPUT_PORT}, + CAP_FLAG_OUTPUT_PORT, + {0}, {CONTENT_ADAPTIVE_CODING}}, + + {LAYER_ENABLE, ENC, HEVC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, + 0, + CAP_FLAG_OUTPUT_PORT, + {0}, + {CONTENT_ADAPTIVE_CODING}}, {ENH_LAYER_COUNT, ENC, HEVC, 0, 5, 1, 0, diff --git a/driver/variant/iris3/inc/msm_vidc_iris3.h b/driver/variant/iris3/inc/msm_vidc_iris3.h index cc955e01a4..db74cb7664 100644 --- a/driver/variant/iris3/inc/msm_vidc_iris3.h +++ b/driver/variant/iris3/inc/msm_vidc_iris3.h @@ -12,6 +12,7 @@ #if defined(CONFIG_MSM_VIDC_IRIS3) int msm_vidc_init_iris3(struct msm_vidc_core *core); int msm_vidc_deinit_iris3(struct msm_vidc_core *core); +int msm_vidc_adjust_bitrate_boost_iris3(void *instance, struct v4l2_ctrl *ctrl); #else static inline int msm_vidc_init_iris3(struct msm_vidc_core *core) { @@ -21,6 +22,10 @@ static inline int msm_vidc_deinit_iris3(struct msm_vidc_core *core) { return -EINVAL; } +static inline int msm_vidc_adjust_bitrate_boost_iris3(void *instance, struct v4l2_ctrl *ctrl) +{ + return -EINVAL; +} #endif #endif // _MSM_VIDC_IRIS3_H_ diff --git a/driver/variant/iris3/src/msm_vidc_iris3.c b/driver/variant/iris3/src/msm_vidc_iris3.c index d7b9a5adb5..3dd50b2168 100644 --- a/driver/variant/iris3/src/msm_vidc_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_iris3.c @@ -1137,6 +1137,69 @@ exit: return 0; } +int msm_vidc_adjust_bitrate_boost_iris3(void* instance, struct v4l2_ctrl *ctrl) +{ + struct msm_vidc_inst_capability* capability = NULL; + s32 adjusted_value; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + s32 rc_type = -1; + u32 width, height, frame_rate; + struct v4l2_format *f; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + capability = inst->capabilities; + + adjusted_value = ctrl ? ctrl->val : + capability->cap[BITRATE_BOOST].value; + + if (inst->bufq[OUTPUT_PORT].vb2q->streaming) + return 0; + + if (msm_vidc_get_parent_value(inst, BITRATE_BOOST, + BITRATE_MODE, &rc_type, __func__)) + return -EINVAL; + + /* + * Bitrate Boost are supported only for VBR rc type. + * Hence, do not adjust or set to firmware for non VBR rc's + */ + if (rc_type != HFI_RC_VBR_CFR) { + adjusted_value = 0; + goto adjust; + } + + frame_rate = inst->capabilities->cap[FRAME_RATE].value >> 16; + f= &inst->fmts[OUTPUT_PORT]; + width = f->fmt.pix_mp.width; + height = f->fmt.pix_mp.height; + + /* + * honor client set bitrate boost + * if client did not set, keep max bitrate boost upto 4k@60fps + * and remove bitrate boost after 4k@60fps + */ + if (capability->cap[BITRATE_BOOST].flags & CAP_FLAG_CLIENT_SET) { + /* accept client set bitrate boost value as is */ + } else { + if (res_is_less_than_or_equal_to(width, height, 3840, 2160) && + frame_rate <= 60) + adjusted_value = MAX_BITRATE_BOOST; + else + adjusted_value = 0; + } + +adjust: + msm_vidc_update_cap_value(inst, BITRATE_BOOST, adjusted_value, __func__); + + return 0; +} + + + static struct msm_vidc_venus_ops iris3_ops = { .boot_firmware = __boot_firmware_iris3, .interrupt_init = __interrupt_init_iris3, diff --git a/driver/vidc/inc/msm_vidc_control.h b/driver/vidc/inc/msm_vidc_control.h index adef833ee2..d5947c7112 100644 --- a/driver/vidc/inc/msm_vidc_control.h +++ b/driver/vidc/inc/msm_vidc_control.h @@ -43,7 +43,7 @@ int msm_vidc_adjust_hevc_p_frame_qp(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_hevc_b_frame_qp(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_blur_type(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_blur_resolution(void *instance, struct v4l2_ctrl *ctrl); -int msm_vidc_adjust_cac(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_brs(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_bitrate_boost(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_min_quality(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_lowlatency_mode(void *instance, struct v4l2_ctrl *ctrl); diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 2b3c25e7fd..45fd2e4143 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -1056,7 +1056,17 @@ static int msm_vidc_update_static_property(struct msm_vidc_inst *inst, msm_vidc_allow_dcvs(inst); } + if (ctrl->id == V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER) { + u32 enable; + /* enable LAYER_ENABLE cap if HEVC_HIER enh layers > 0 */ + if (ctrl->val > 0) + enable = 1; + else + enable = 0; + + msm_vidc_update_cap_value(inst, LAYER_ENABLE, enable, __func__); + } if (is_meta_cap(cap_id)) { /* validate metadata control value against allowed settings */ if ((ctrl->val & inst->capabilities->cap[cap_id].max) != ctrl->val) { @@ -2413,12 +2423,13 @@ int msm_vidc_adjust_blur_resolution(void *instance, struct v4l2_ctrl *ctrl) return 0; } -int msm_vidc_adjust_cac(void *instance, struct v4l2_ctrl *ctrl) +int msm_vidc_adjust_brs(void *instance, struct v4l2_ctrl *ctrl) { struct msm_vidc_inst_capability *capability; s32 adjusted_value; struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - s32 min_quality = -1, rc_type = -1; + s32 rc_type = -1, layer_enabled = -1, layer_type = -1; + bool hp_requested = false; if (!inst || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); @@ -2433,22 +2444,36 @@ int msm_vidc_adjust_cac(void *instance, struct v4l2_ctrl *ctrl) return 0; if (msm_vidc_get_parent_value(inst, CONTENT_ADAPTIVE_CODING, - MIN_QUALITY, &min_quality, __func__) || + BITRATE_MODE, &rc_type, __func__) || msm_vidc_get_parent_value(inst, CONTENT_ADAPTIVE_CODING, - BITRATE_MODE, &rc_type, __func__)) + LAYER_ENABLE, &layer_enabled, __func__) || + msm_vidc_get_parent_value(inst, CONTENT_ADAPTIVE_CODING, + LAYER_TYPE, &layer_type, __func__)) return -EINVAL; /* - * CAC is supported only for VBR rc type. - * Hence, do not adjust or set to firmware for non VBR rc's + * -BRS is supported only for VBR rc type. + * Hence, do not adjust or set to firmware for non VBR rc's + * -If HP is enabled then BRS is not allowed. */ if (rc_type != HFI_RC_VBR_CFR) { adjusted_value = 0; goto adjust; } - if (min_quality) { - adjusted_value = 1; + if (inst->codec == MSM_VIDC_H264) { + layer_type = V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P; + } else if (inst->codec == MSM_VIDC_HEVC) { + layer_type = V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P; + } + hp_requested = (inst->capabilities->cap[LAYER_TYPE].value == layer_type); + + /* + * Disable BRS in case of HP encoding + * Hence set adjust value to 0. + */ + if (layer_enabled == 1 && hp_requested) { + adjusted_value = 0; goto adjust; } From 0acf5e00820757d9d4f14a15ab1cf0eab95b1457 Mon Sep 17 00:00:00 2001 From: Mihir Ganu Date: Thu, 24 Mar 2022 08:03:11 -0700 Subject: [PATCH 0578/1061] video: driver: Increase persist buffer size for AV1 metadata Increase AV1 persist buffer size to accommodate AV1 HDR and other metadata. Change-Id: Ib29ed9eb18e39e6f711c5bed7a67366161bf053b Signed-off-by: Mihir Ganu --- driver/variant/iris3/inc/hfi_buffer_iris3.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/driver/variant/iris3/inc/hfi_buffer_iris3.h b/driver/variant/iris3/inc/hfi_buffer_iris3.h index cba74afde9..a6643ec37c 100644 --- a/driver/variant/iris3/inc/hfi_buffer_iris3.h +++ b/driver/variant/iris3/inc/hfi_buffer_iris3.h @@ -1165,7 +1165,8 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ AV1D_NUM_HW_PIC_BUF * (SIZE_AV1D_TILE_OFFSET + SIZE_AV1D_QM) + \ AV1D_NUM_FRAME_HEADERS * (SIZE_AV1D_FRAME_HEADER + \ 2 * SIZE_AV1D_PROB_TABLE) + \ - comv_size), VENUS_DMA_ALIGNMENT); \ + comv_size + HDR10_HIST_EXTRADATA_SIZE + \ + SIZE_AV1D_METADATA * AV1D_NUM_HW_PIC_BUF), VENUS_DMA_ALIGNMENT); \ } while (0) #define HFI_BUFFER_BITSTREAM_ENC(size, frame_width, frame_height, \ From ab51846ea0bb63a40ccd5fb9ec61616212752488 Mon Sep 17 00:00:00 2001 From: Manikanta Kanamarlapudi Date: Thu, 24 Mar 2022 13:55:14 +0530 Subject: [PATCH 0579/1061] video-driver: Add support for saliency metadata Add support for saliency metadata control. Change-Id: I6bfe54f58494a8189484bfbb3c2d989010fe3a2b Signed-off-by: Manikanta Kanamarlapudi --- driver/platform/kalama/src/msm_vidc_kalama.c | 11 +++++++++++ driver/platform/waipio/src/msm_vidc_waipio.c | 11 +++++++++++ driver/vidc/inc/hfi_property.h | 6 ++++++ driver/vidc/inc/msm_vidc_internal.h | 1 + driver/vidc/src/msm_vidc_driver.c | 1 + include/uapi/vidc/media/v4l2_vidc_extensions.h | 9 +++++++++ 6 files changed, 39 insertions(+) diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index 04aeea2704..32a6e74b44 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -1840,6 +1840,17 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { {MIN_QUALITY}, msm_vidc_adjust_roi_info, NULL}, + {META_SALIENCY_INFO, ENC, H264|HEVC, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_TX_INPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_SALIENCY_INFO, + HFI_PROP_ROI_AS_SALIENCY_INFO, + CAP_FLAG_INPUT_PORT | CAP_FLAG_BITMASK, + {}, + {}, + NULL, NULL}, + {META_DEC_QP_METADATA, DEC, CODECS_ALL, V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 8b6a3c0058..0409d14221 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -1674,6 +1674,17 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {MIN_QUALITY}, msm_vidc_adjust_roi_info, NULL}, + {META_SALIENCY_INFO, ENC, H264|HEVC, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_TX_INPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_SALIENCY_INFO, + HFI_PROP_ROI_AS_SALIENCY_INFO, + CAP_FLAG_INPUT_PORT | CAP_FLAG_BITMASK, + {}, + {}, + NULL, NULL}, + {META_DEC_QP_METADATA, DEC, CODECS_ALL, V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, diff --git a/driver/vidc/inc/hfi_property.h b/driver/vidc/inc/hfi_property.h index e2efc74563..6c978fc8d7 100644 --- a/driver/vidc/inc/hfi_property.h +++ b/driver/vidc/inc/hfi_property.h @@ -543,6 +543,12 @@ enum hfi_nal_length_field_type { #define HFI_PROP_AV1_DRAP_CONFIG 0x03000189 +enum hfi_saliency_type { + HFI_SALIENCY_NONE, + HFI_SALIENCY_TYPE0, +}; +#define HFI_PROP_ROI_AS_SALIENCY_INFO 0x0300018A + #define HFI_PROP_FENCE 0x0300018B #define HFI_PROP_END 0x03FFFFFF diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index f9f28ac816..4fa93147ec 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -377,6 +377,7 @@ enum msm_vidc_inst_capability_type { META_MAX_NUM_REORDER_FRAMES, META_EVA_STATS, META_ROI_INFO, + META_SALIENCY_INFO, META_CAP_MAX, /* end of metadata caps */ FRAME_WIDTH, diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 0ce8f3aa0d..b41a67e04e 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -79,6 +79,7 @@ static const struct msm_vidc_cap_name cap_name_arr[] = { {META_MAX_NUM_REORDER_FRAMES, "META_MAX_NUM_REORDER_FRAMES"}, {META_EVA_STATS, "META_EVA_STATS" }, {META_ROI_INFO, "META_ROI_INFO" }, + {META_SALIENCY_INFO, "META_SALIENCY_INFO" }, {META_CAP_MAX, "META_CAP_MAX" }, {FRAME_WIDTH, "FRAME_WIDTH" }, {LOSSLESS_FRAME_WIDTH, "LOSSLESS_FRAME_WIDTH" }, diff --git a/include/uapi/vidc/media/v4l2_vidc_extensions.h b/include/uapi/vidc/media/v4l2_vidc_extensions.h index 0f3615d573..d99e096d0d 100644 --- a/include/uapi/vidc/media/v4l2_vidc_extensions.h +++ b/include/uapi/vidc/media/v4l2_vidc_extensions.h @@ -137,6 +137,8 @@ enum v4l2_mpeg_vidc_metadata_bits { (V4L2_CID_MPEG_VIDC_BASE + 0x24) #define V4L2_CID_MPEG_VIDC_METADATA_CROP_OFFSETS \ (V4L2_CID_MPEG_VIDC_BASE + 0x25) +#define V4L2_CID_MPEG_VIDC_METADATA_SALIENCY_INFO \ + (V4L2_CID_MPEG_VIDC_BASE + 0x26) /* Encoder Super frame control */ #define V4L2_CID_MPEG_VIDC_SUPERFRAME (V4L2_CID_MPEG_VIDC_BASE + 0x28) @@ -319,6 +321,12 @@ enum v4l2_mpeg_vidc_metapayload_header_flags { METADATA_FLAGS_TOP_FIELD = (1 << 0), METADATA_FLAGS_BOTTOM_FIELD = (1 << 1), }; + +enum saliency_roi_info { + METADATA_SALIENCY_NONE, + METADATA_SALIENCY_TYPE0, +}; + struct msm_vidc_metabuf_header { __u32 count; __u32 size; @@ -355,6 +363,7 @@ enum v4l2_mpeg_vidc_metadata { METADATA_ROI_INFO = 0x03000173, METADATA_DPB_TAG_LIST = 0x03000179, METADATA_MAX_NUM_REORDER_FRAMES = 0x03000127, + METADATA_SALIENCY_INFO = 0x0300018A, METADATA_FENCE = 0x0300018B, }; enum meta_interlace_info { From f9c0bfcb9b93fc0431682c2d6e625b5889f3ca58 Mon Sep 17 00:00:00 2001 From: Vikash Garodia Date: Fri, 25 Mar 2022 14:59:59 +0530 Subject: [PATCH 0580/1061] video: driver: update quality mode w.r.t complexity configuration Existing video driver allows complexity configuration to update quality mode only for non realtime sessions. Change-Id: Ic4eb5b1c8904fffe2baa1606db37285f53e918b3 Signed-off-by: Vikash Garodia --- driver/variant/iris3/src/msm_vidc_iris3.c | 23 ++++++++++++----------- 1 file changed, 12 insertions(+), 11 deletions(-) diff --git a/driver/variant/iris3/src/msm_vidc_iris3.c b/driver/variant/iris3/src/msm_vidc_iris3.c index d7b9a5adb5..a5302df0b6 100644 --- a/driver/variant/iris3/src/msm_vidc_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_iris3.c @@ -1106,10 +1106,16 @@ int msm_vidc_decide_quality_mode_iris3(struct msm_vidc_inst* inst) if (!is_encode_session(inst)) return 0; - /* image session always runs at quality mode */ - if (is_image_session(inst)) { + /* image session or lossless encode always runs at quality mode */ + if (is_image_session(inst) || capability->cap[LOSSLESS].value) { mode = MSM_VIDC_MAX_QUALITY_MODE; - goto exit; + goto decision_done; + } + + /* for least complexity, make LP for all resolution */ + if (!capability->cap[COMPLEXITY].value) { + mode = MSM_VIDC_POWER_SAVE_MODE; + goto decision_done; } mbpf = msm_vidc_get_mbs_per_frame(inst); @@ -1118,20 +1124,15 @@ int msm_vidc_decide_quality_mode_iris3(struct msm_vidc_inst* inst) max_hq_mbpf = core->capabilities[MAX_MBPF_HQ].value;; max_hq_mbps = core->capabilities[MAX_MBPS_HQ].value;; - /* NRT session to have max quality unless client configures least complexity */ if (!is_realtime_session(inst) && mbpf <= max_hq_mbpf) { mode = MSM_VIDC_MAX_QUALITY_MODE; - if (!capability->cap[COMPLEXITY].value) - mode = MSM_VIDC_POWER_SAVE_MODE; - goto exit; + goto decision_done; } - /* Power saving always disabled for CQ and LOSSLESS RC modes. */ - if (capability->cap[LOSSLESS].value || - (mbpf <= max_hq_mbpf && mbps <= max_hq_mbps)) + if (mbpf <= max_hq_mbpf && mbps <= max_hq_mbps) mode = MSM_VIDC_MAX_QUALITY_MODE; -exit: +decision_done: msm_vidc_update_cap_value(inst, QUALITY_MODE, mode, __func__); return 0; From accb365696d7a6c2125e8ed445ea9aef906a670c Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Wed, 23 Mar 2022 12:26:05 -0700 Subject: [PATCH 0581/1061] video: driver: v4l2 compliance fixes for test formats v4l2 compliance fixes for test formats fixes: test VIDIOC_ENUM_FMT/FRAMESIZES/FRAMEINTERVALS: OK test VIDIOC_G_FMT: OK test VIDIOC_TRY_FMT: OK test VIDIOC_S_FMT: OK Change-Id: I23c193ab5785bb10d070fa3085678d9669f53a92 Signed-off-by: Darshana Patil --- driver/vidc/inc/msm_vidc_internal.h | 2 + driver/vidc/src/msm_vdec.c | 72 ++++++++++++++--------------- driver/vidc/src/msm_venc.c | 72 ++++++++++++++--------------- driver/vidc/src/msm_vidc.c | 30 +++++++----- driver/vidc/src/msm_vidc_buffer.c | 8 ++-- driver/vidc/src/msm_vidc_driver.c | 54 ++++++++-------------- driver/vidc/src/msm_vidc_platform.c | 8 ++++ 7 files changed, 119 insertions(+), 127 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 4fa93147ec..32929cd130 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -134,6 +134,8 @@ */ #define MAX_DPB_LIST_ARRAY_SIZE (16 * 4) #define MAX_DPB_LIST_PAYLOAD_SIZE (16 * 4 * 4) +/* Default metadata size */ +#define MSM_VIDC_METADATA_SIZE ALIGN(16 * 1024, SZ_4K) enum msm_vidc_domain_type { MSM_VIDC_ENCODER = BIT(0), diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 4e40fe2820..350cf9b698 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -106,6 +106,12 @@ static int msm_vdec_codec_change(struct msm_vidc_inst *inst, u32 v4l2_codec) v4l2_pixelfmt_name(v4l2_codec)); inst->codec = v4l2_codec_to_driver(v4l2_codec, __func__); + if (!inst->codec) { + i_vpr_e(inst, "%s: invalid codec %#x\n", __func__, v4l2_codec); + rc = -EINVAL; + goto exit; + } + inst->fmts[INPUT_PORT].fmt.pix_mp.pixelformat = v4l2_codec; rc = msm_vidc_update_debug_str(inst); if (rc) @@ -125,11 +131,11 @@ static int msm_vdec_codec_change(struct msm_vidc_inst *inst, u32 v4l2_codec) rc = msm_vidc_update_buffer_count(inst, INPUT_PORT); if (rc) - return rc; + goto exit; rc = msm_vidc_update_buffer_count(inst, OUTPUT_PORT); if (rc) - return rc; + goto exit; exit: return rc; @@ -2224,6 +2230,12 @@ int msm_vdec_try_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) f->fmt.pix_mp.height = inst->fmts[INPUT_PORT].fmt.pix_mp.height; f->fmt.pix_mp.width = inst->fmts[INPUT_PORT].fmt.pix_mp.width; } + } else if (f->type == INPUT_META_PLANE) { + f->fmt.meta.dataformat = inst->fmts[INPUT_META_PORT].fmt.meta.dataformat; + f->fmt.meta.buffersize = inst->fmts[INPUT_META_PORT].fmt.meta.buffersize; + } else if (f->type == OUTPUT_META_PLANE) { + f->fmt.meta.dataformat = inst->fmts[OUTPUT_META_PORT].fmt.meta.dataformat; + f->fmt.meta.buffersize = inst->fmts[OUTPUT_META_PORT].fmt.meta.buffersize; } else { i_vpr_e(inst, "%s: invalid type %d\n", __func__, f->type); return -EINVAL; @@ -2338,23 +2350,15 @@ int msm_vdec_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) fmt = &inst->fmts[INPUT_META_PORT]; fmt->type = INPUT_META_PLANE; fmt->fmt.meta.dataformat = V4L2_META_FMT_VIDC; - if (is_input_meta_enabled(inst)) { - fmt->fmt.meta.buffersize = call_session_op(core, - buffer_size, inst, MSM_VIDC_BUF_INPUT_META); - inst->buffers.input_meta.min_count = - inst->buffers.input.min_count; - inst->buffers.input_meta.extra_count = - inst->buffers.input.extra_count; - inst->buffers.input_meta.actual_count = - inst->buffers.input.actual_count; - inst->buffers.input_meta.size = fmt->fmt.meta.buffersize; - } else { - fmt->fmt.meta.buffersize = 0; - inst->buffers.input_meta.min_count = 0; - inst->buffers.input_meta.extra_count = 0; - inst->buffers.input_meta.actual_count = 0; - inst->buffers.input_meta.size = 0; - } + fmt->fmt.meta.buffersize = call_session_op(core, + buffer_size, inst, MSM_VIDC_BUF_INPUT_META); + inst->buffers.input_meta.min_count = + inst->buffers.input.min_count; + inst->buffers.input_meta.extra_count = + inst->buffers.input.extra_count; + inst->buffers.input_meta.actual_count = + inst->buffers.input.actual_count; + inst->buffers.input_meta.size = fmt->fmt.meta.buffersize; i_vpr_h(inst, "%s: type: INPUT_META, size %u min_count %d extra_count %d\n", __func__, fmt->fmt.meta.buffersize, @@ -2416,23 +2420,15 @@ int msm_vdec_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) fmt = &inst->fmts[OUTPUT_META_PORT]; fmt->type = OUTPUT_META_PLANE; fmt->fmt.meta.dataformat = V4L2_META_FMT_VIDC; - if (is_output_meta_enabled(inst)) { - fmt->fmt.meta.buffersize = call_session_op(core, - buffer_size, inst, MSM_VIDC_BUF_OUTPUT_META); - inst->buffers.output_meta.min_count = - inst->buffers.output.min_count; - inst->buffers.output_meta.extra_count = - inst->buffers.output.extra_count; - inst->buffers.output_meta.actual_count = - inst->buffers.output.actual_count; - inst->buffers.output_meta.size = fmt->fmt.meta.buffersize; - } else { - fmt->fmt.meta.buffersize = 0; - inst->buffers.output_meta.min_count = 0; - inst->buffers.output_meta.extra_count = 0; - inst->buffers.output_meta.actual_count = 0; - inst->buffers.output_meta.size = 0; - } + fmt->fmt.meta.buffersize = call_session_op(core, + buffer_size, inst, MSM_VIDC_BUF_OUTPUT_META); + inst->buffers.output_meta.min_count = + inst->buffers.output.min_count; + inst->buffers.output_meta.extra_count = + inst->buffers.output.extra_count; + inst->buffers.output_meta.actual_count = + inst->buffers.output.actual_count; + inst->buffers.output_meta.size = fmt->fmt.meta.buffersize; i_vpr_h(inst, "%s: type: OUTPUT_META, size %u min_count %d extra_count %d\n", __func__, fmt->fmt.meta.buffersize, @@ -2809,7 +2805,7 @@ int msm_vdec_inst_init(struct msm_vidc_inst *inst) f = &inst->fmts[INPUT_META_PORT]; f->type = INPUT_META_PLANE; f->fmt.meta.dataformat = V4L2_META_FMT_VIDC; - f->fmt.meta.buffersize = 0; + f->fmt.meta.buffersize = MSM_VIDC_METADATA_SIZE; inst->buffers.input_meta.min_count = 0; inst->buffers.input_meta.extra_count = 0; inst->buffers.input_meta.actual_count = 0; @@ -2847,7 +2843,7 @@ int msm_vdec_inst_init(struct msm_vidc_inst *inst) f = &inst->fmts[OUTPUT_META_PORT]; f->type = OUTPUT_META_PLANE; f->fmt.meta.dataformat = V4L2_META_FMT_VIDC; - f->fmt.meta.buffersize = 0; + f->fmt.meta.buffersize = MSM_VIDC_METADATA_SIZE; inst->buffers.output_meta.min_count = 0; inst->buffers.output_meta.extra_count = 0; inst->buffers.output_meta.actual_count = 0; diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index d59e5f8d3d..45ac8f714d 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -70,6 +70,12 @@ static int msm_venc_codec_change(struct msm_vidc_inst *inst, u32 v4l2_codec) v4l2_pixelfmt_name(v4l2_codec)); inst->codec = v4l2_codec_to_driver(v4l2_codec, __func__); + if (!inst->codec) { + i_vpr_e(inst, "%s: invalid codec %#x\n", __func__, v4l2_codec); + rc = -EINVAL; + goto exit; + } + inst->fmts[OUTPUT_PORT].fmt.pix_mp.pixelformat = v4l2_codec; rc = msm_vidc_update_debug_str(inst); if (rc) @@ -89,11 +95,11 @@ static int msm_venc_codec_change(struct msm_vidc_inst *inst, u32 v4l2_codec) rc = msm_vidc_update_buffer_count(inst, INPUT_PORT); if (rc) - return rc; + goto exit; rc = msm_vidc_update_buffer_count(inst, OUTPUT_PORT); if (rc) - return rc; + goto exit; exit: return rc; @@ -1071,6 +1077,12 @@ int msm_venc_try_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) f->fmt.pix_mp.pixelformat = inst->fmts[OUTPUT_PORT].fmt.pix_mp.pixelformat; pix_fmt = v4l2_codec_to_driver(f->fmt.pix_mp.pixelformat, __func__); } + } else if (f->type == INPUT_META_PLANE) { + f->fmt.meta.dataformat = inst->fmts[INPUT_META_PORT].fmt.meta.dataformat; + f->fmt.meta.buffersize = inst->fmts[INPUT_META_PORT].fmt.meta.buffersize; + } else if (f->type == OUTPUT_META_PLANE) { + f->fmt.meta.dataformat = inst->fmts[OUTPUT_META_PORT].fmt.meta.dataformat; + f->fmt.meta.buffersize = inst->fmts[OUTPUT_META_PORT].fmt.meta.buffersize; } else { i_vpr_e(inst, "%s: invalid type %d\n", __func__, f->type); return -EINVAL; @@ -1178,23 +1190,15 @@ static int msm_venc_s_fmt_output_meta(struct msm_vidc_inst *inst, struct v4l2_fo fmt = &inst->fmts[OUTPUT_META_PORT]; fmt->type = OUTPUT_META_PLANE; fmt->fmt.meta.dataformat = V4L2_META_FMT_VIDC; - if (is_output_meta_enabled(inst)) { - fmt->fmt.meta.buffersize = call_session_op(core, - buffer_size, inst, MSM_VIDC_BUF_OUTPUT_META); - inst->buffers.output_meta.min_count = - inst->buffers.output.min_count; - inst->buffers.output_meta.extra_count = - inst->buffers.output.extra_count; - inst->buffers.output_meta.actual_count = - inst->buffers.output.actual_count; - inst->buffers.output_meta.size = fmt->fmt.meta.buffersize; - } else { - fmt->fmt.meta.buffersize = 0; - inst->buffers.output_meta.min_count = 0; - inst->buffers.output_meta.extra_count = 0; - inst->buffers.output_meta.actual_count = 0; - inst->buffers.output_meta.size = 0; - } + fmt->fmt.meta.buffersize = call_session_op(core, + buffer_size, inst, MSM_VIDC_BUF_OUTPUT_META); + inst->buffers.output_meta.min_count = + inst->buffers.output.min_count; + inst->buffers.output_meta.extra_count = + inst->buffers.output.extra_count; + inst->buffers.output_meta.actual_count = + inst->buffers.output.actual_count; + inst->buffers.output_meta.size = fmt->fmt.meta.buffersize; memcpy(f, fmt, sizeof(struct v4l2_format)); @@ -1332,23 +1336,15 @@ static int msm_venc_s_fmt_input_meta(struct msm_vidc_inst *inst, struct v4l2_for fmt = &inst->fmts[INPUT_META_PORT]; fmt->type = INPUT_META_PLANE; fmt->fmt.meta.dataformat = V4L2_META_FMT_VIDC; - if (is_input_meta_enabled(inst)) { - fmt->fmt.meta.buffersize = call_session_op(core, - buffer_size, inst, MSM_VIDC_BUF_INPUT_META); - inst->buffers.input_meta.min_count = - inst->buffers.input.min_count; - inst->buffers.input_meta.extra_count = - inst->buffers.input.extra_count; - inst->buffers.input_meta.actual_count = - inst->buffers.input.actual_count; - inst->buffers.input_meta.size = fmt->fmt.meta.buffersize; - } else { - fmt->fmt.meta.buffersize = 0; - inst->buffers.input_meta.min_count = 0; - inst->buffers.input_meta.extra_count = 0; - inst->buffers.input_meta.actual_count = 0; - inst->buffers.input_meta.size = 0; - } + fmt->fmt.meta.buffersize = call_session_op(core, + buffer_size, inst, MSM_VIDC_BUF_INPUT_META); + inst->buffers.input_meta.min_count = + inst->buffers.input.min_count; + inst->buffers.input_meta.extra_count = + inst->buffers.input.extra_count; + inst->buffers.input_meta.actual_count = + inst->buffers.input.actual_count; + inst->buffers.input_meta.size = fmt->fmt.meta.buffersize; memcpy(f, fmt, sizeof(struct v4l2_format)); @@ -1862,7 +1858,7 @@ int msm_venc_inst_init(struct msm_vidc_inst *inst) f = &inst->fmts[OUTPUT_META_PORT]; f->type = OUTPUT_META_PLANE; f->fmt.meta.dataformat = V4L2_META_FMT_VIDC; - f->fmt.meta.buffersize = 0; + f->fmt.meta.buffersize = MSM_VIDC_METADATA_SIZE; inst->buffers.output_meta.min_count = 0; inst->buffers.output_meta.extra_count = 0; inst->buffers.output_meta.actual_count = 0; @@ -1896,7 +1892,7 @@ int msm_venc_inst_init(struct msm_vidc_inst *inst) f = &inst->fmts[INPUT_META_PORT]; f->type = INPUT_META_PLANE; f->fmt.meta.dataformat = V4L2_META_FMT_VIDC; - f->fmt.meta.buffersize = 0; + f->fmt.meta.buffersize = MSM_VIDC_METADATA_SIZE; inst->buffers.input_meta.min_count = 0; inst->buffers.input_meta.extra_count = 0; inst->buffers.input_meta.actual_count = 0; diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index 7b3ff1189f..b0023ffa7a 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -694,13 +694,16 @@ int msm_vidc_enum_framesizes(void *instance, struct v4l2_frmsizeenum *fsize) if (fsize->index) return -EINVAL; - /* validate pixel format */ - codec = v4l2_codec_to_driver(fsize->pixel_format, __func__); - if (!codec) { - colorfmt = v4l2_colorformat_to_driver(fsize->pixel_format, __func__); - if (colorfmt == MSM_VIDC_FMT_NONE) { - i_vpr_e(inst, "%s: unsupported pix fmt %#x\n", __func__, fsize->pixel_format); - return -EINVAL; + if (fsize->pixel_format != V4L2_META_FMT_VIDC) { + /* validate pixel format */ + codec = v4l2_codec_to_driver(fsize->pixel_format, __func__); + if (!codec) { + colorfmt = v4l2_colorformat_to_driver(fsize->pixel_format, __func__); + if (colorfmt == MSM_VIDC_FMT_NONE) { + i_vpr_e(inst, "%s: unsupported pix fmt %#x\n", + __func__, fsize->pixel_format); + return -EINVAL; + } } } @@ -749,11 +752,14 @@ int msm_vidc_enum_frameintervals(void *instance, struct v4l2_frmivalenum *fival) if (fival->index) return -EINVAL; - /* validate pixel format */ - colorfmt = v4l2_colorformat_to_driver(fival->pixel_format, __func__); - if (colorfmt == MSM_VIDC_FMT_NONE) { - i_vpr_e(inst, "%s: unsupported pix fmt %#x\n", __func__, fival->pixel_format); - return -EINVAL; + if (fival->pixel_format != V4L2_META_FMT_VIDC) { + /* validate pixel format */ + colorfmt = v4l2_colorformat_to_driver(fival->pixel_format, __func__); + if (colorfmt == MSM_VIDC_FMT_NONE) { + i_vpr_e(inst, "%s: unsupported pix fmt %#x\n", + __func__, fival->pixel_format); + return -EINVAL; + } } /* validate resolution */ diff --git a/driver/vidc/src/msm_vidc_buffer.c b/driver/vidc/src/msm_vidc_buffer.c index 97cef807d2..4087bcd5dc 100644 --- a/driver/vidc/src/msm_vidc_buffer.c +++ b/driver/vidc/src/msm_vidc_buffer.c @@ -282,12 +282,12 @@ u32 msm_vidc_decoder_output_size(struct msm_vidc_inst *inst) u32 msm_vidc_decoder_input_meta_size(struct msm_vidc_inst *inst) { - return ALIGN(16 * 1024, SZ_4K); + return MSM_VIDC_METADATA_SIZE; } u32 msm_vidc_decoder_output_meta_size(struct msm_vidc_inst *inst) { - return ALIGN(16 * 1024, SZ_4K); + return MSM_VIDC_METADATA_SIZE; } u32 msm_vidc_encoder_input_size(struct msm_vidc_inst *inst) @@ -378,7 +378,7 @@ u32 msm_vidc_encoder_input_meta_size(struct msm_vidc_inst *inst) return 0; } - size = ALIGN(16 * 1024, SZ_4K); + size = MSM_VIDC_METADATA_SIZE; if (inst->capabilities->cap[META_ROI_INFO].value) { lcu_size = 16; @@ -397,5 +397,5 @@ u32 msm_vidc_encoder_input_meta_size(struct msm_vidc_inst *inst) u32 msm_vidc_encoder_output_meta_size(struct msm_vidc_inst *inst) { - return ALIGN(16 * 1024, SZ_4K); + return MSM_VIDC_METADATA_SIZE; } diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index b41a67e04e..5030c29eab 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -541,7 +541,7 @@ enum msm_vidc_codec_type v4l2_codec_to_driver(u32 v4l2_codec, const char *func) codec = MSM_VIDC_HEIC; break; default: - d_vpr_e("%s: invalid v4l2 codec %#x\n", func, v4l2_codec); + d_vpr_h("%s: invalid v4l2 codec %#x\n", func, v4l2_codec); break; } return codec; @@ -5610,42 +5610,26 @@ int msm_vidc_update_meta_port_settings(struct msm_vidc_inst *inst) core = inst->core; fmt = &inst->fmts[INPUT_META_PORT]; - if (is_input_meta_enabled(inst)) { - fmt->fmt.meta.buffersize = call_session_op(core, - buffer_size, inst, MSM_VIDC_BUF_INPUT_META); - inst->buffers.input_meta.min_count = - inst->buffers.input.min_count; - inst->buffers.input_meta.extra_count = - inst->buffers.input.extra_count; - inst->buffers.input_meta.actual_count = - inst->buffers.input.actual_count; - inst->buffers.input_meta.size = fmt->fmt.meta.buffersize; - } else { - fmt->fmt.meta.buffersize = 0; - inst->buffers.input_meta.min_count = 0; - inst->buffers.input_meta.extra_count = 0; - inst->buffers.input_meta.actual_count = 0; - inst->buffers.input_meta.size = 0; - } + fmt->fmt.meta.buffersize = call_session_op(core, + buffer_size, inst, MSM_VIDC_BUF_INPUT_META); + inst->buffers.input_meta.min_count = + inst->buffers.input.min_count; + inst->buffers.input_meta.extra_count = + inst->buffers.input.extra_count; + inst->buffers.input_meta.actual_count = + inst->buffers.input.actual_count; + inst->buffers.input_meta.size = fmt->fmt.meta.buffersize; fmt = &inst->fmts[OUTPUT_META_PORT]; - if (is_output_meta_enabled(inst)) { - fmt->fmt.meta.buffersize = call_session_op(core, - buffer_size, inst, MSM_VIDC_BUF_OUTPUT_META); - inst->buffers.output_meta.min_count = - inst->buffers.output.min_count; - inst->buffers.output_meta.extra_count = - inst->buffers.output.extra_count; - inst->buffers.output_meta.actual_count = - inst->buffers.output.actual_count; - inst->buffers.output_meta.size = fmt->fmt.meta.buffersize; - } else { - fmt->fmt.meta.buffersize = 0; - inst->buffers.output_meta.min_count = 0; - inst->buffers.output_meta.extra_count = 0; - inst->buffers.output_meta.actual_count = 0; - inst->buffers.output_meta.size = 0; - } + fmt->fmt.meta.buffersize = call_session_op(core, + buffer_size, inst, MSM_VIDC_BUF_OUTPUT_META); + inst->buffers.output_meta.min_count = + inst->buffers.output.min_count; + inst->buffers.output_meta.extra_count = + inst->buffers.output.extra_count; + inst->buffers.output_meta.actual_count = + inst->buffers.output.actual_count; + inst->buffers.output_meta.size = fmt->fmt.meta.buffersize; return 0; } diff --git a/driver/vidc/src/msm_vidc_platform.c b/driver/vidc/src/msm_vidc_platform.c index 3840106459..4046c3d4b0 100644 --- a/driver/vidc/src/msm_vidc_platform.c +++ b/driver/vidc/src/msm_vidc_platform.c @@ -36,10 +36,14 @@ static struct v4l2_ioctl_ops msm_v4l2_ioctl_ops_enc = { .vidioc_querycap = msm_v4l2_querycap, .vidioc_enum_fmt_vid_cap = msm_v4l2_enum_fmt, .vidioc_enum_fmt_vid_out = msm_v4l2_enum_fmt, + .vidioc_enum_fmt_meta_cap = msm_v4l2_enum_fmt, + .vidioc_enum_fmt_meta_out = msm_v4l2_enum_fmt, .vidioc_enum_framesizes = msm_v4l2_enum_framesizes, .vidioc_enum_frameintervals = msm_v4l2_enum_frameintervals, .vidioc_try_fmt_vid_cap_mplane = msm_v4l2_try_fmt, .vidioc_try_fmt_vid_out_mplane = msm_v4l2_try_fmt, + .vidioc_try_fmt_meta_cap = msm_v4l2_try_fmt, + .vidioc_try_fmt_meta_out = msm_v4l2_try_fmt, .vidioc_s_fmt_vid_cap = msm_v4l2_s_fmt, .vidioc_s_fmt_vid_out = msm_v4l2_s_fmt, .vidioc_s_fmt_vid_cap_mplane = msm_v4l2_s_fmt, @@ -76,10 +80,14 @@ static struct v4l2_ioctl_ops msm_v4l2_ioctl_ops_dec = { .vidioc_querycap = msm_v4l2_querycap, .vidioc_enum_fmt_vid_cap = msm_v4l2_enum_fmt, .vidioc_enum_fmt_vid_out = msm_v4l2_enum_fmt, + .vidioc_enum_fmt_meta_cap = msm_v4l2_enum_fmt, + .vidioc_enum_fmt_meta_out = msm_v4l2_enum_fmt, .vidioc_enum_framesizes = msm_v4l2_enum_framesizes, .vidioc_enum_frameintervals = msm_v4l2_enum_frameintervals, .vidioc_try_fmt_vid_cap_mplane = msm_v4l2_try_fmt, .vidioc_try_fmt_vid_out_mplane = msm_v4l2_try_fmt, + .vidioc_try_fmt_meta_cap = msm_v4l2_try_fmt, + .vidioc_try_fmt_meta_out = msm_v4l2_try_fmt, .vidioc_s_fmt_vid_cap = msm_v4l2_s_fmt, .vidioc_s_fmt_vid_out = msm_v4l2_s_fmt, .vidioc_s_fmt_vid_cap_mplane = msm_v4l2_s_fmt, From f60ff0d92c09b1111a91ac645ee22cf459570c82 Mon Sep 17 00:00:00 2001 From: Dikshita Agarwal Date: Thu, 17 Mar 2022 19:14:27 +0530 Subject: [PATCH 0582/1061] video: driver: use custom v4l2 ctrls in place of S/G_PARM on decoder Introduce new v4l2 controls to set frame rate and operating rate on decoder as VIDIOC_S/G_PARM is not allowed on decoder. fix: v4l2-compliance:S/G_PARM Change-Id: I6c090c0ae541a086c73bb79564dd29ed4aa755b3 Signed-off-by: Dikshita Agarwal Signed-off-by: Maheshwar Ajja --- driver/platform/kalama/src/msm_vidc_kalama.c | 36 +++++++++-- driver/platform/waipio/src/msm_vidc_waipio.c | 36 +++++++++-- driver/vidc/inc/msm_vidc_control.h | 2 + driver/vidc/src/msm_vidc_control.c | 64 +++++++++++++++++++ driver/vidc/src/msm_vidc_driver.c | 2 + .../uapi/vidc/media/v4l2_vidc_extensions.h | 3 + 6 files changed, 135 insertions(+), 8 deletions(-) diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index 8309fffaa9..558e30000d 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -251,19 +251,47 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { {FRAME_RATE, DEC, CODECS_ALL, (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), - 1, (DEFAULT_FPS << 16)}, + 1, (DEFAULT_FPS << 16), + V4L2_CID_MPEG_VIDC_FRAME_RATE, + 0, + CAP_FLAG_OUTPUT_PORT | + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + msm_vidc_adjust_frame_rate}, {FRAME_RATE, DEC, VP9, (MINIMUM_FPS << 16), (MAXIMUM_OVERRIDE_VP9_FPS << 16), - 1, (DEFAULT_FPS << 16)}, + 1, (DEFAULT_FPS << 16), + V4L2_CID_MPEG_VIDC_FRAME_RATE, + 0, + CAP_FLAG_OUTPUT_PORT | + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + msm_vidc_adjust_frame_rate}, - {OPERATING_RATE, ENC|DEC, CODECS_ALL, + {OPERATING_RATE, ENC, CODECS_ALL, (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), 1, (DEFAULT_FPS << 16)}, + {OPERATING_RATE, DEC, CODECS_ALL, + (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), + 1, (DEFAULT_FPS << 16), + V4L2_CID_MPEG_VIDC_OPERATING_RATE, + 0, + CAP_FLAG_OUTPUT_PORT | + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + msm_vidc_adjust_operating_rate}, + {OPERATING_RATE, DEC, VP9, (MINIMUM_FPS << 16), (MAXIMUM_OVERRIDE_VP9_FPS << 16), - 1, (DEFAULT_FPS << 16)}, + 1, (DEFAULT_FPS << 16), + V4L2_CID_MPEG_VIDC_OPERATING_RATE, + 0, + CAP_FLAG_OUTPUT_PORT | + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + msm_vidc_adjust_operating_rate}, {INPUT_RATE, ENC|DEC, CODECS_ALL, (MINIMUM_FPS << 16), INT_MAX, diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 89bdcabe2d..5683be2599 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -237,19 +237,47 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {FRAME_RATE, DEC, CODECS_ALL, (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), - 1, (DEFAULT_FPS << 16)}, + 1, (DEFAULT_FPS << 16), + V4L2_CID_MPEG_VIDC_FRAME_RATE, + 0, + CAP_FLAG_OUTPUT_PORT | + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + msm_vidc_adjust_frame_rate}, {FRAME_RATE, DEC, VP9, (MINIMUM_FPS << 16), (MAXIMUM_OVERRIDE_VP9_FPS << 16), - 1, (DEFAULT_FPS << 16)}, + 1, (DEFAULT_FPS << 16), + V4L2_CID_MPEG_VIDC_FRAME_RATE, + 0, + CAP_FLAG_OUTPUT_PORT | + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + msm_vidc_adjust_frame_rate}, - {OPERATING_RATE, ENC|DEC, CODECS_ALL, + {OPERATING_RATE, ENC, CODECS_ALL, (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), 1, (DEFAULT_FPS << 16)}, + {OPERATING_RATE, DEC, CODECS_ALL, + (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), + 1, (DEFAULT_FPS << 16), + V4L2_CID_MPEG_VIDC_OPERATING_RATE, + 0, + CAP_FLAG_OUTPUT_PORT | + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + msm_vidc_adjust_operating_rate}, + {OPERATING_RATE, DEC, VP9, (MINIMUM_FPS << 16), (MAXIMUM_OVERRIDE_VP9_FPS << 16), - 1, (DEFAULT_FPS << 16)}, + 1, (DEFAULT_FPS << 16), + V4L2_CID_MPEG_VIDC_OPERATING_RATE, + 0, + CAP_FLAG_OUTPUT_PORT | + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, + {0}, {0}, + msm_vidc_adjust_operating_rate}, {INPUT_RATE, ENC|DEC, CODECS_ALL, (MINIMUM_FPS << 16), INT_MAX, diff --git a/driver/vidc/inc/msm_vidc_control.h b/driver/vidc/inc/msm_vidc_control.h index adef833ee2..03ab6d5cb7 100644 --- a/driver/vidc/inc/msm_vidc_control.h +++ b/driver/vidc/inc/msm_vidc_control.h @@ -52,6 +52,8 @@ int msm_vidc_prepare_dependency_list(struct msm_vidc_inst *inst); int msm_vidc_adjust_session_priority(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_roi_info(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_all_intra(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_frame_rate(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_operating_rate(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_set_header_mode(void *instance, enum msm_vidc_inst_capability_type cap_id); diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 2b3c25e7fd..4fcff7dc43 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -1040,6 +1040,7 @@ static int msm_vidc_update_static_property(struct msm_vidc_inst *inst, if (rc) return rc; } + if (ctrl->id == V4L2_CID_MPEG_VIDC_PRIORITY) { rc = msm_vidc_adjust_session_priority(inst, ctrl); if (rc) @@ -2745,6 +2746,69 @@ int msm_vidc_adjust_roi_info(void *instance, struct v4l2_ctrl *ctrl) return 0; } +int msm_vidc_adjust_frame_rate(void *instance, struct v4l2_ctrl *ctrl) +{ + int rc = 0; + struct msm_vidc_inst_capability *capability; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + u32 adjusted_value; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + adjusted_value = ctrl ? ctrl->val : capability->cap[FRAME_RATE].value; + + if (is_realtime_session(inst)) { + rc = msm_vidc_check_core_mbps(inst); + if (rc) { + i_vpr_e(inst, "%s: unsupported load\n", __func__); + return rc; + } + } + + inst->priority_level = MSM_VIDC_PRIORITY_HIGH; + capability->cap[FRAME_RATE].flags |= CAP_FLAG_CLIENT_SET; + + msm_vidc_update_cap_value(inst, FRAME_RATE, adjusted_value, __func__); + + return 0; +} + +int msm_vidc_adjust_operating_rate(void *instance, struct v4l2_ctrl *ctrl) +{ + int rc = 0; + struct msm_vidc_inst_capability *capability; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + u32 adjusted_value; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + adjusted_value = ctrl ? ctrl->val : capability->cap[OPERATING_RATE].value; + + if (is_realtime_session(inst)) { + rc = msm_vidc_check_core_mbps(inst); + if (rc) { + i_vpr_e(inst, "%s: unsupported load\n", __func__); + return rc; + } + } + + inst->priority_level = MSM_VIDC_PRIORITY_HIGH; + capability->cap[OPERATING_RATE].flags |= CAP_FLAG_CLIENT_SET; + + msm_vidc_update_cap_value(inst, OPERATING_RATE, adjusted_value, __func__); + + return 0; +} + + int msm_vidc_prepare_dependency_list(struct msm_vidc_inst *inst) { struct list_head root_list, opt_list; diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 5030c29eab..b85682cf52 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -1316,6 +1316,8 @@ bool msm_vidc_allow_s_ctrl(struct msm_vidc_inst *inst, u32 id) case V4L2_CID_MPEG_VIDC_PRIORITY: case V4L2_CID_MPEG_VIDC_LOWLATENCY_REQUEST: case V4L2_CID_MPEG_VIDC_INPUT_METADATA_FD: + case V4L2_CID_MPEG_VIDC_FRAME_RATE: + case V4L2_CID_MPEG_VIDC_OPERATING_RATE: allow = true; break; default: diff --git a/include/uapi/vidc/media/v4l2_vidc_extensions.h b/include/uapi/vidc/media/v4l2_vidc_extensions.h index d99e096d0d..ed33dc50c5 100644 --- a/include/uapi/vidc/media/v4l2_vidc_extensions.h +++ b/include/uapi/vidc/media/v4l2_vidc_extensions.h @@ -66,6 +66,9 @@ #define V4L2_CID_MPEG_VIDC_LOWLATENCY_REQUEST (V4L2_CID_MPEG_VIDC_BASE + 0x3) /* FIXme: */ #define V4L2_CID_MPEG_VIDC_CODEC_CONFIG (V4L2_CID_MPEG_VIDC_BASE + 0x4) +#define V4L2_CID_MPEG_VIDC_FRAME_RATE (V4L2_CID_MPEG_VIDC_BASE + 0x5) +#define V4L2_CID_MPEG_VIDC_OPERATING_RATE (V4L2_CID_MPEG_VIDC_BASE + 0x6) + /* Encoder Intra refresh period */ #define V4L2_CID_MPEG_VIDC_INTRA_REFRESH_PERIOD (V4L2_CID_MPEG_VIDC_BASE + 0xB) #define V4L2_CID_MPEG_VIDC_TIME_DELTA_BASED_RC (V4L2_CID_MPEG_VIDC_BASE + 0xD) From 733a7f8bcdc2d52bc4c8a4b2c5f194a583915d5c Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Tue, 29 Mar 2022 15:17:55 -0700 Subject: [PATCH 0583/1061] video: driver: fix v4l2-compliance failure for private codecs v4l2-compliance test does not support private codecs. Hence added check to not return HEIC codec when enum_fmt is called. Change-Id: Iff6fbb45b436e39e8b7c181859dbc1519338d003 Signed-off-by: Darshana Patil --- driver/vidc/src/msm_venc.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index 45ac8f714d..9856cc64db 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -1760,6 +1760,9 @@ int msm_venc_enum_fmt(struct msm_vidc_inst *inst, struct v4l2_fmtdesc *f) if (codecs & BIT(i)) { if (idx >= ARRAY_SIZE(array)) break; + /* v4l2-compliance does not support private codecs */ + if ((codecs & BIT(i)) == MSM_VIDC_HEIC) + continue; array[idx] = codecs & BIT(i); idx++; } From 4c9f33d943c051245bef41cb9752b24860e96454 Mon Sep 17 00:00:00 2001 From: Gaviraju Doddabettahalli Bettegowda Date: Wed, 30 Mar 2022 18:04:51 +0530 Subject: [PATCH 0584/1061] video: driver: Add missing capability for HEIC encoding Added NV21 color format capability for HEIC encoding. Change-Id: I5c559bdd5c2ec3e5eaf4ded9e766ffb02c0d81a7 Signed-off-by: Gaviraju Doddabettahalli Bettegowda --- driver/platform/kalama/src/msm_vidc_kalama.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index 8309fffaa9..70407df593 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -1924,7 +1924,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { {PIX_FMTS, ENC, HEIC, MSM_VIDC_FMT_NV12, MSM_VIDC_FMT_P010, - MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_P010, + MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_P010, MSM_VIDC_FMT_NV12, 0, 0, 0, From ab684e15f66c4993c7b2aac205c113877b148071 Mon Sep 17 00:00:00 2001 From: Deepa Guthyappa Madivalara Date: Tue, 29 Mar 2022 17:35:54 -0700 Subject: [PATCH 0585/1061] video driver: calculate power based on max rate 1. Remove load based admission control for decoder. 2. For decoder, use max of frame rate, operating rate, timestamp rate and input rate for power calculations. 3. For encoder, use max of frame rate and operating rate for power calculations. Change-Id: Ibdb2d4b29438d7f656a27771953d10e0a0e72edd --- driver/platform/kalama/src/msm_vidc_kalama.c | 8 ++ driver/platform/waipio/src/msm_vidc_waipio.c | 8 ++ .../variant/iris2/src/msm_vidc_power_iris2.c | 27 +---- .../variant/iris3/src/msm_vidc_power_iris3.c | 27 +---- driver/vidc/inc/msm_vidc_driver.h | 6 +- driver/vidc/inc/msm_vidc_inst.h | 1 + driver/vidc/inc/msm_vidc_internal.h | 2 + driver/vidc/src/msm_vidc_driver.c | 99 +++++++++++------ driver/vidc/src/msm_vidc_power.c | 103 +++++++++++------- driver/vidc/src/msm_vidc_vb2.c | 2 +- driver/vidc/src/venus_hfi_response.c | 2 +- 11 files changed, 155 insertions(+), 130 deletions(-) diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index 8309fffaa9..6817cdd8af 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -239,6 +239,10 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { {MBPS, DEC, VP9, 36, 4423680, 1, 4423680}, /* ((4096 * 2304) / 256) * 60 fps */ {POWER_SAVE_MBPS, ENC, CODECS_ALL, 0, 2211840, 1, 2211840}, + /* Enable check mbps for encoder */ + {CHECK_MBPS, ENC, CODECS_ALL, 0, 1, 1, 1}, + /* Disable check mbps for encoder */ + {CHECK_MBPS, DEC, CODECS_ALL, 0, 1, 1, 0}, {FRAME_RATE, ENC, CODECS_ALL, (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), @@ -269,6 +273,10 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { (MINIMUM_FPS << 16), INT_MAX, 1, (DEFAULT_FPS << 16)}, + {TIMESTAMP_RATE, ENC|DEC, CODECS_ALL, + (MINIMUM_FPS << 16), INT_MAX, + 1, (DEFAULT_FPS << 16)}, + {SCALE_FACTOR, ENC, H264|HEVC, 1, 8, 1, 8}, {MB_CYCLES_VSP, ENC, CODECS_ALL, 25, 25, 1, 25}, diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 89bdcabe2d..3cf334ddba 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -225,6 +225,10 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {MBPS, DEC, VP9, 36, 4423680, 1, 4423680}, /* ((4096 * 2304) / 256) * 60 fps */ {POWER_SAVE_MBPS, ENC, CODECS_ALL, 0, 2211840, 1, 2211840}, + /* Enable check mbps for encoder */ + {CHECK_MBPS, ENC, CODECS_ALL, 0, 1, 1, 1}, + /* Disable check mbps for encoder */ + {CHECK_MBPS, DEC, CODECS_ALL, 0, 1, 1, 0}, {FRAME_RATE, ENC, CODECS_ALL, (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), @@ -255,6 +259,10 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { (MINIMUM_FPS << 16), INT_MAX, 1, (DEFAULT_FPS << 16)}, + {TIMESTAMP_RATE, ENC|DEC, CODECS_ALL, + (MINIMUM_FPS << 16), INT_MAX, + 1, (DEFAULT_FPS << 16)}, + {SCALE_FACTOR, ENC, H264|HEVC, 1, 8, 1, 8}, {MB_CYCLES_VSP, ENC, CODECS_ALL, 25, 25, 1, 25}, diff --git a/driver/variant/iris2/src/msm_vidc_power_iris2.c b/driver/variant/iris2/src/msm_vidc_power_iris2.c index 82dd29b767..6b33cfc2a3 100644 --- a/driver/variant/iris2/src/msm_vidc_power_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_power_iris2.c @@ -20,8 +20,7 @@ u64 msm_vidc_calc_freq_iris2(struct msm_vidc_inst *inst, u32 data_size) u32 mbs_per_second; u32 operating_rate, vsp_factor_num = 1, vsp_factor_den = 1; u32 base_cycles = 0; - u32 fps; - u32 buf_timetamps_fps, mbpf, input_rate; + u32 fps, mbpf; if (!inst || !inst->core || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); @@ -35,29 +34,7 @@ u64 msm_vidc_calc_freq_iris2(struct msm_vidc_inst *inst, u32 data_size) } mbpf = msm_vidc_get_mbs_per_frame(inst); - fps = msm_vidc_get_fps(inst); - - buf_timetamps_fps = msm_vidc_calc_window_avg_framerate(inst); - - /* - * when buffer detected fps is more than client set value by 10%, - * utilize buffer detected fps to scale clock. - */ - if (div_u64(fps * 11, 10) < buf_timetamps_fps) { - fps = buf_timetamps_fps; - inst->priority_level = MSM_VIDC_PRIORITY_LOW; - } - if (!is_realtime_session(inst)) { - input_rate = msm_vidc_get_input_rate(inst); - if (input_rate > fps) { - fps = input_rate; - /* - * add 12.5% more fps to increase power to make firmware - * processing little faster than client queuing rate - */ - fps = fps + fps / 8; - } - } + fps = inst->max_rate; mbs_per_second = mbpf * fps; /* diff --git a/driver/variant/iris3/src/msm_vidc_power_iris3.c b/driver/variant/iris3/src/msm_vidc_power_iris3.c index 7659d9f712..7939cf0bce 100644 --- a/driver/variant/iris3/src/msm_vidc_power_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_power_iris3.c @@ -21,8 +21,7 @@ u64 msm_vidc_calc_freq_iris3(struct msm_vidc_inst *inst, u32 data_size) u32 mbs_per_second; u32 operating_rate, vsp_factor_num = 1, vsp_factor_den = 1; u32 base_cycles = 0; - u32 fps; - u32 buf_timetamps_fps, mbpf, input_rate; + u32 fps, mbpf; if (!inst || !inst->core || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); @@ -36,29 +35,7 @@ u64 msm_vidc_calc_freq_iris3(struct msm_vidc_inst *inst, u32 data_size) } mbpf = msm_vidc_get_mbs_per_frame(inst); - fps = msm_vidc_get_fps(inst); - - buf_timetamps_fps = msm_vidc_calc_window_avg_framerate(inst); - - /* - * when buffer detected fps is more than client set value by 10%, - * utilize buffer detected fps to scale clock. - */ - if (div_u64(fps * 11, 10) < buf_timetamps_fps) { - fps = buf_timetamps_fps; - inst->priority_level = MSM_VIDC_PRIORITY_LOW; - } - if (!is_realtime_session(inst)) { - input_rate = msm_vidc_get_input_rate(inst); - if (input_rate > fps) { - fps = input_rate; - /* - * add 12.5% more fps to increase power to make firmware - * processing little faster than client queuing rate - */ - fps = fps + fps / 8; - } - } + fps = inst->max_rate; mbs_per_second = mbpf * fps; /* diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index f0f6a16e1e..433ea73f7b 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -480,9 +480,9 @@ int msm_vidc_check_session_supported(struct msm_vidc_inst *inst); int msm_vidc_check_core_mbps(struct msm_vidc_inst *inst); int msm_vidc_check_core_mbpf(struct msm_vidc_inst *inst); int msm_vidc_check_scaling_supported(struct msm_vidc_inst *inst); -int msm_vidc_update_timestamp(struct msm_vidc_inst *inst, u64 timestamp); +int msm_vidc_update_timestamp_rate(struct msm_vidc_inst *inst, u64 timestamp); int msm_vidc_set_auto_framerate(struct msm_vidc_inst *inst, u64 timestamp); -int msm_vidc_calc_window_avg_framerate(struct msm_vidc_inst *inst); +int msm_vidc_get_timestamp_rate(struct msm_vidc_inst *inst); int msm_vidc_flush_ts(struct msm_vidc_inst *inst); int msm_vidc_ts_reorder_insert_timestamp(struct msm_vidc_inst *inst, u64 timestamp); int msm_vidc_ts_reorder_remove_timestamp(struct msm_vidc_inst *inst, u64 timestamp); @@ -502,5 +502,7 @@ int msm_vidc_create_input_metadata_buffer(struct msm_vidc_inst *inst, int buf_fd int msm_vidc_update_input_meta_buffer_index(struct msm_vidc_inst *inst, struct vb2_buffer *vb2); int msm_vidc_update_input_rate(struct msm_vidc_inst *inst, u64 time_us); int msm_vidc_get_input_rate(struct msm_vidc_inst *inst); +int msm_vidc_get_frame_rate(struct msm_vidc_inst *inst); +int msm_vidc_get_operating_rate(struct msm_vidc_inst *inst); #endif // _MSM_VIDC_DRIVER_H_ diff --git a/driver/vidc/inc/msm_vidc_inst.h b/driver/vidc/inc/msm_vidc_inst.h index fa5125b99b..431f4d7bef 100644 --- a/driver/vidc/inc/msm_vidc_inst.h +++ b/driver/vidc/inc/msm_vidc_inst.h @@ -170,6 +170,7 @@ struct msm_vidc_inst { u32 dpb_list_payload[MAX_DPB_LIST_ARRAY_SIZE]; u32 max_map_output_count; u32 auto_framerate; + u32 max_rate; bool has_bframe; }; #endif // _MSM_VIDC_INST_H_ diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 32929cd130..5ef0f6d147 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -398,9 +398,11 @@ enum msm_vidc_inst_capability_type { SECURE_MBPF, MBPS, POWER_SAVE_MBPS, + CHECK_MBPS, FRAME_RATE, OPERATING_RATE, INPUT_RATE, + TIMESTAMP_RATE, SCALE_FACTOR, MB_CYCLES_VSP, MB_CYCLES_VPP, diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 5030c29eab..41f9ad7e94 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -97,9 +97,11 @@ static const struct msm_vidc_cap_name cap_name_arr[] = { {SECURE_MBPF, "SECURE_MBPF" }, {MBPS, "MBPS" }, {POWER_SAVE_MBPS, "POWER_SAVE_MBPS" }, + {CHECK_MBPS, "CHECK_MPBS" }, {FRAME_RATE, "FRAME_RATE" }, {OPERATING_RATE, "OPERATING_RATE" }, {INPUT_RATE, "INPUT_RATE" }, + {TIMESTAMP_RATE, "TIMESTAMP_RATE" }, {SCALE_FACTOR, "SCALE_FACTOR" }, {MB_CYCLES_VSP, "MB_CYCLES_VSP" }, {MB_CYCLES_VPP, "MB_CYCLES_VPP" }, @@ -2179,14 +2181,13 @@ int msm_vidc_get_fps(struct msm_vidc_inst *inst) return -EINVAL; } - frame_rate = inst->capabilities->cap[FRAME_RATE].value; - operating_rate = inst->capabilities->cap[OPERATING_RATE].value; + frame_rate = msm_vidc_get_frame_rate(inst); + operating_rate = msm_vidc_get_operating_rate(inst); if (operating_rate > frame_rate) - fps = (operating_rate >> 16) ? - (operating_rate >> 16) : 1; + fps = operating_rate ? operating_rate : 1; else - fps = frame_rate >> 16; + fps = frame_rate; return fps; } @@ -2329,7 +2330,7 @@ int msm_vidc_set_auto_framerate(struct msm_vidc_inst *inst, u64 timestamp) !inst->capabilities->cap[TIME_DELTA_BASED_RC].value) goto exit; - rc = msm_vidc_update_timestamp(inst, timestamp); + rc = msm_vidc_update_timestamp_rate(inst, timestamp); if (rc) goto exit; @@ -2371,32 +2372,6 @@ exit: return rc; } -int msm_vidc_calc_window_avg_framerate(struct msm_vidc_inst *inst) -{ - struct msm_vidc_timestamp *ts; - struct msm_vidc_timestamp *prev = NULL; - u32 counter = 0; - u64 ts_ms = 0; - - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - list_for_each_entry(ts, &inst->timestamps.list, sort.list) { - if (prev) { - if (ts->sort.val == prev->sort.val) - continue; - - ts_ms += div_u64(ts->sort.val - prev->sort.val, 1000000); - counter++; - } - prev = ts; - } - - return ts_ms ? (1000 * counter) / ts_ms : 0; -} - int msm_vidc_update_input_rate(struct msm_vidc_inst *inst, u64 time_us) { struct msm_vidc_input_timer *input_timer; @@ -2450,6 +2425,36 @@ int msm_vidc_get_input_rate(struct msm_vidc_inst *inst) return inst->capabilities->cap[INPUT_RATE].value >> 16; } +int msm_vidc_get_timestamp_rate(struct msm_vidc_inst *inst) +{ + if (!inst || !inst->capabilities) { + d_vpr_e("%s: Invalid params\n", __func__); + return 0; + } + + return inst->capabilities->cap[TIMESTAMP_RATE].value >> 16; +} + +int msm_vidc_get_frame_rate(struct msm_vidc_inst *inst) +{ + if (!inst || !inst->capabilities) { + d_vpr_e("%s: Invalid params\n", __func__); + return 0; + } + + return inst->capabilities->cap[FRAME_RATE].value >> 16; +} + +int msm_vidc_get_operating_rate(struct msm_vidc_inst *inst) +{ + if (!inst || !inst->capabilities) { + d_vpr_e("%s: Invalid params\n", __func__); + return 0; + } + + return inst->capabilities->cap[OPERATING_RATE].value >> 16; +} + static int msm_vidc_insert_sort(struct list_head *head, struct msm_vidc_sort *entry) { @@ -2530,11 +2535,14 @@ int msm_vidc_flush_ts(struct msm_vidc_inst *inst) return 0; } -int msm_vidc_update_timestamp(struct msm_vidc_inst *inst, u64 timestamp) +int msm_vidc_update_timestamp_rate(struct msm_vidc_inst *inst, u64 timestamp) { - struct msm_vidc_timestamp *ts; + struct msm_vidc_timestamp *ts, *prev; int rc = 0; u32 window_size = 0; + u32 timestamp_rate = 0; + u64 ts_ms = 0; + u32 counter = 0; if (!inst) { d_vpr_e("%s: Invalid params\n", __func__); @@ -2572,6 +2580,21 @@ int msm_vidc_update_timestamp(struct msm_vidc_inst *inst, u64 timestamp) msm_memory_pool_free(inst, ts); } + /* Calculate timestamp rate */ + list_for_each_entry(ts, &inst->timestamps.list, sort.list) { + if (prev) { + if (ts->sort.val == prev->sort.val) + continue; + ts_ms += div_u64(ts->sort.val - prev->sort.val, 1000000); + counter++; + } + prev = ts; + } + if (ts_ms) + timestamp_rate = (u32)div_u64((u64)counter * 1000, ts_ms); + + msm_vidc_update_cap_value(inst, TIMESTAMP_RATE, timestamp_rate << 16, __func__); + return 0; } @@ -5823,11 +5846,17 @@ int msm_vidc_check_core_mbps(struct msm_vidc_inst *inst) u64 curr_time_ns; int rc = 0; - if (!inst || !inst->core) { + if (!inst || !inst->core || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } core = inst->core; + + if (!inst->capabilities->cap[CHECK_MBPS].value) { + i_vpr_h(inst, "%s: skip mbps check\n", __func__); + return 0; + } + curr_time_ns = ktime_get_ns(); core_lock(core, __func__); diff --git a/driver/vidc/src/msm_vidc_power.c b/driver/vidc/src/msm_vidc_power.c index 7b0b118f31..925827398e 100644 --- a/driver/vidc/src/msm_vidc_power.c +++ b/driver/vidc/src/msm_vidc_power.c @@ -45,34 +45,44 @@ u64 msm_vidc_max_freq(struct msm_vidc_inst *inst) int msm_vidc_get_mbps(struct msm_vidc_inst *inst) { - u32 mbpf, fps; + u32 mbpf, fps, input_rate; mbpf = msm_vidc_get_mbs_per_frame(inst); fps = msm_vidc_get_fps(inst); + input_rate = msm_vidc_get_input_rate(inst); - return mbpf * fps; + return mbpf * max(fps, input_rate); } int msm_vidc_get_inst_load(struct msm_vidc_inst *inst) { int load = 0; + u32 mbpf, fps; + u32 frame_rate, operating_rate, input_rate, timestamp_rate; if (!inst || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - /* - * NRT sessions - clock scaling is based on OPP table. - * - No load based rejection. - * RT sessions - clock scaling and session admission based on load. - */ + /* return zero load for thumbnail and NRT session */ if (is_thumbnail_session(inst) || !is_realtime_session(inst)) - load = 0; - else - load = msm_vidc_get_mbps(inst); + return load; - return load; + /* calculate load for RT session */ + mbpf = msm_vidc_get_mbs_per_frame(inst); + frame_rate = msm_vidc_get_frame_rate(inst); + operating_rate = msm_vidc_get_operating_rate(inst); + fps = max(frame_rate, operating_rate); + + if (is_decode_session(inst)) { + input_rate = msm_vidc_get_input_rate(inst); + timestamp_rate = msm_vidc_get_timestamp_rate(inst); + fps = max(fps, input_rate); + fps = max(fps, timestamp_rate); + } + + return load = mbpf * fps; } static int fill_dynamic_stats(struct msm_vidc_inst *inst, @@ -178,7 +188,8 @@ int msm_vidc_scale_buses(struct msm_vidc_inst *inst) struct vidc_bus_vote_data *vote_data; struct v4l2_format *out_f; struct v4l2_format *inp_f; - int codec = 0, frame_rate, buf_ts_fps, input_rate; + int codec = 0; + u32 operating_rate, frame_rate; if (!inst || !inst->core || !inst->capabilities) { d_vpr_e("%s: invalid params: %pK\n", __func__, inst); @@ -213,7 +224,6 @@ int msm_vidc_scale_buses(struct msm_vidc_inst *inst) break; } - frame_rate = inst->capabilities->cap[FRAME_RATE].value; vote_data->codec = inst->codec; vote_data->input_width = inp_f->fmt.pix_mp.width; vote_data->input_height = inp_f->fmt.pix_mp.height; @@ -221,38 +231,21 @@ int msm_vidc_scale_buses(struct msm_vidc_inst *inst) vote_data->output_height = out_f->fmt.pix_mp.height; vote_data->lcu_size = (codec == V4L2_PIX_FMT_HEVC || codec == V4L2_PIX_FMT_VP9) ? 32 : 16; - vote_data->fps = msm_vidc_get_fps(inst); - buf_ts_fps = msm_vidc_calc_window_avg_framerate(inst); - if (buf_ts_fps > vote_data->fps) { - i_vpr_l(inst, "%s: bitstream: fps %d, client rate %u\n", __func__, - buf_ts_fps, vote_data->fps); - vote_data->fps = buf_ts_fps; - } - if (!is_realtime_session(inst)) { - input_rate = msm_vidc_get_input_rate(inst); - if (input_rate > vote_data->fps) { - i_vpr_h(inst, "%s: use input rate %d for fps (%u)\n", __func__, - input_rate, vote_data->fps); - vote_data->fps = input_rate; - /* - * add 12.5% more fps to increase power to make firmware - * processing little faster than client queuing rate - */ - vote_data->fps = vote_data->fps + vote_data->fps / 8; - } - } + vote_data->fps = inst->max_rate; + if (inst->domain == MSM_VIDC_ENCODER) { vote_data->domain = MSM_VIDC_ENCODER; vote_data->bitrate = inst->capabilities->cap[BIT_RATE].value; vote_data->rotation = inst->capabilities->cap[ROTATION].value; vote_data->b_frames_enabled = inst->capabilities->cap[B_FRAME].value > 0; - /* scale bitrate if operating rate is larger than fps */ - if (vote_data->fps > (frame_rate >> 16) && - (frame_rate >> 16)) { - vote_data->bitrate = vote_data->bitrate / - (frame_rate >> 16) * vote_data->fps; - } + + /* scale bitrate if operating rate is larger than frame rate */ + frame_rate = msm_vidc_get_frame_rate(inst); + operating_rate = msm_vidc_get_frame_rate(inst); + if (frame_rate && operating_rate && operating_rate > frame_rate) + vote_data->bitrate = (vote_data->bitrate / frame_rate) * operating_rate; + vote_data->num_formats = 1; vote_data->color_formats[0] = v4l2_colorformat_to_driver( inst->fmts[INPUT_PORT].fmt.pix_mp.pixelformat, __func__); @@ -488,6 +481,8 @@ int msm_vidc_scale_power(struct msm_vidc_inst *inst, bool scale_buses) struct msm_vidc_core *core; struct msm_vidc_buffer *vbuf; u32 data_size = 0; + u32 fps; + u32 frame_rate, operating_rate, timestamp_rate, input_rate; if (!inst || !inst->core) { d_vpr_e("%s: invalid params %pK\n", __func__, inst); @@ -505,6 +500,31 @@ int msm_vidc_scale_power(struct msm_vidc_inst *inst, bool scale_buses) data_size = max(data_size, vbuf->data_size); inst->max_input_data_size = data_size; + frame_rate = msm_vidc_get_frame_rate(inst); + operating_rate = msm_vidc_get_operating_rate(inst); + fps = max(frame_rate, operating_rate); + if (is_decode_session(inst)) { + /* + * when buffer detected fps is more than client set value by 12.5%, + * utilize buffer detected fps to scale clock. + */ + timestamp_rate = msm_vidc_get_timestamp_rate(inst); + input_rate = msm_vidc_get_input_rate(inst); + if (timestamp_rate > (fps + fps / 8)) { + fps = timestamp_rate; + inst->priority_level = MSM_VIDC_PRIORITY_LOW; + } + if (input_rate > fps) { + fps = input_rate; + /* + * add 6.25% more fps to increase power to make firmware + * processing little faster than client queuing rate + */ + fps = fps + fps / 16; + } + } + inst->max_rate = fps; + /* no pending inputs - skip scale power */ if (!inst->max_input_data_size) return 0; @@ -518,10 +538,11 @@ int msm_vidc_scale_power(struct msm_vidc_inst *inst, bool scale_buses) } i_vpr_hp(inst, - "power: inst: clk %lld ddr %d llcc %d dcvs flags %#x, core: clk %lld ddr %lld llcc %lld\n", + "power: inst: clk %lld ddr %d llcc %d dcvs flags %#x fps %u (%u %u %u %u) core: clk %lld ddr %lld llcc %lld\n", inst->power.curr_freq, inst->power.ddr_bw, inst->power.sys_cache_bw, inst->power.dcvs_flags, - core->power.clk_freq, core->power.bw_ddr, + inst->max_rate, frame_rate, operating_rate, timestamp_rate, + input_rate, core->power.clk_freq, core->power.bw_ddr, core->power.bw_llcc); trace_msm_vidc_perf_power_scale(inst, core->power.clk_freq, diff --git a/driver/vidc/src/msm_vidc_vb2.c b/driver/vidc/src/msm_vidc_vb2.c index d05ff848b1..ff75dfad71 100644 --- a/driver/vidc/src/msm_vidc_vb2.c +++ b/driver/vidc/src/msm_vidc_vb2.c @@ -464,7 +464,7 @@ void msm_vidc_buf_queue(struct vb2_buffer *vb2) } inst->last_qbuf_time_ns = ktime_ns; - if (!is_realtime_session(inst) && vb2->type == INPUT_MPLANE) { + if (is_decode_session(inst) && vb2->type == INPUT_MPLANE) { rc = msm_vidc_update_input_rate(inst, div_u64(ktime_ns, 1000)); if (rc) goto unlock; diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index cd99a087ad..4f1e12cde1 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -904,7 +904,7 @@ static int handle_output_buffer(struct msm_vidc_inst *inst, } if (!is_image_session(inst) && is_decode_session(inst) && buf->data_size) - msm_vidc_update_timestamp(inst, buf->timestamp); + msm_vidc_update_timestamp_rate(inst, buf->timestamp); /* update output buffer timestamp, if ts_reorder is enabled */ if (is_ts_reorder_allowed(inst) && buf->data_size) From 0abd877e95729db214c96c18402a7d2cb4413786 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Tue, 22 Mar 2022 18:03:15 -0700 Subject: [PATCH 0586/1061] video: driver: fix for fence support - Add METADATA_PICTURE_TYPE support. - some fixes for fence support. Change-Id: Icd2285aa9fef57775122e9d2433f1e5d708ccdd3 Signed-off-by: Akshata Sahukar --- driver/platform/kalama/src/msm_vidc_kalama.c | 21 ++++++++----------- driver/vidc/inc/msm_vidc_internal.h | 1 + driver/vidc/src/msm_vdec.c | 4 ++++ driver/vidc/src/msm_vidc_control.c | 3 ++- driver/vidc/src/msm_vidc_driver.c | 9 ++++++-- driver/vidc/src/msm_vidc_fence.c | 6 ++++-- driver/vidc/src/venus_hfi.c | 5 +++++ driver/vidc/src/venus_hfi_response.c | 18 ++++++++++++++-- .../uapi/vidc/media/v4l2_vidc_extensions.h | 8 ++++++- 9 files changed, 55 insertions(+), 20 deletions(-) diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index efbcf99dd8..1e879ba63f 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -1752,7 +1752,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { HFI_PROP_CONEALED_MB_COUNT, CAP_FLAG_BITMASK}, - {META_HIST_INFO, DEC, CODECS_ALL, + {META_HIST_INFO, DEC, HEVC|AV1|VP9, V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, 0, V4L2_MPEG_VIDC_META_DISABLE, @@ -1760,6 +1760,14 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { HFI_PROP_HISTOGRAM_INFO, CAP_FLAG_BITMASK}, + {META_PICTURE_TYPE, DEC, CODECS_ALL, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_INPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_PICTURE_TYPE, + HFI_PROP_PICTURE_TYPE, + CAP_FLAG_BITMASK}, + {META_SEI_MASTERING_DISP, ENC, HEVC|HEIC, V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_TX_INPUT, @@ -1868,17 +1876,6 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { HFI_PROP_ENC_QP_METADATA, CAP_FLAG_BITMASK}, - {META_ROI_INFO, ENC, CODECS_ALL, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_TX_INPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_ROI_INFO, - HFI_PROP_ROI_INFO, - CAP_FLAG_INPUT_PORT | CAP_FLAG_BITMASK, - {BITRATE_MODE, PIX_FMTS}, - {0}, - msm_vidc_adjust_roi_info, NULL}, - {META_ROI_INFO, ENC, H264|HEVC, V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_TX_INPUT, diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 5ef0f6d147..94f42e0c52 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -368,6 +368,7 @@ enum msm_vidc_inst_capability_type { META_TIMESTAMP, META_CONCEALED_MB_CNT, META_HIST_INFO, + META_PICTURE_TYPE, META_SEI_MASTERING_DISP, META_SEI_CLL, META_HDR10PLUS, diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 350cf9b698..2dca81b25d 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -1435,6 +1435,10 @@ int msm_vdec_streamon_input(struct msm_vidc_inst *inst) if (rc) return rc; + rc = msm_vdec_subscribe_metadata(inst, INPUT_PORT); + if (rc) + return rc; + rc = msm_vdec_set_delivery_mode_metadata(inst, INPUT_PORT); if (rc) return rc; diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index e8d6109ca1..4c7629849e 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -707,7 +707,8 @@ void msm_vidc_add_volatile_flag(struct v4l2_ctrl *ctrl) { if (ctrl->id == V4L2_CID_MIN_BUFFERS_FOR_OUTPUT || ctrl->id == V4L2_CID_MIN_BUFFERS_FOR_CAPTURE || - ctrl->id == V4L2_CID_MPEG_VIDC_AV1D_FILM_GRAIN_PRESENT) + ctrl->id == V4L2_CID_MPEG_VIDC_AV1D_FILM_GRAIN_PRESENT || + ctrl->id == V4L2_CID_MPEG_VIDC_SW_FENCE_FD) ctrl->flags |= V4L2_CTRL_FLAG_VOLATILE; } diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index a618eef8bf..157356d5e4 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -68,6 +68,7 @@ static const struct msm_vidc_cap_name cap_name_arr[] = { {META_TIMESTAMP, "META_TIMESTAMP" }, {META_CONCEALED_MB_CNT, "META_CONCEALED_MB_CNT" }, {META_HIST_INFO, "META_HIST_INFO" }, + {META_PICTURE_TYPE, "META_PICTURE_TYPE" }, {META_SEI_MASTERING_DISP, "META_SEI_MASTERING_DISP" }, {META_SEI_CLL, "META_SEI_CLL" }, {META_HDR10PLUS, "META_HDR10PLUS" }, @@ -1320,6 +1321,7 @@ bool msm_vidc_allow_s_ctrl(struct msm_vidc_inst *inst, u32 id) case V4L2_CID_MPEG_VIDC_INPUT_METADATA_FD: case V4L2_CID_MPEG_VIDC_FRAME_RATE: case V4L2_CID_MPEG_VIDC_OPERATING_RATE: + case V4L2_CID_MPEG_VIDC_SW_FENCE_ID: allow = true; break; default: @@ -1408,6 +1410,7 @@ bool msm_vidc_allow_metadata_subscription(struct msm_vidc_inst *inst, u32 cap_id case META_SEI_MASTERING_DISP: case META_SEI_CLL: case META_HDR10PLUS: + case META_PICTURE_TYPE: if (!is_meta_rx_inp_enabled(inst, META_OUTBUF_FENCE)) { i_vpr_h(inst, "%s: cap: %24s not allowed as output buffer fence is disabled\n", @@ -2098,9 +2101,8 @@ int msm_vidc_get_fence_fd(struct msm_vidc_inst *inst, int *fence_fd) } if (!found) { - i_vpr_e(inst, "%s: could not find matching fence for fence id: %d\n", + i_vpr_h(inst, "%s: could not find matching fence for fence id: %d\n", __func__, inst->capabilities->cap[FENCE_ID].value); - rc = -EINVAL; goto exit; } @@ -3893,6 +3895,9 @@ static int msm_vidc_v4l2_buffer_event(struct msm_vidc_inst *inst, event_data = (struct v4l2_event_vidc_metadata *)event.u.data; event_data->type = INPUT_META_PLANE; event_data->fd = buf->fd; + event_data->index = buf->index; + event_data->bytesused = buf->data_size; + event_data->offset = buf->data_offset; v4l2_event_queue_fh(&inst->event_handler, &event); diff --git a/driver/vidc/src/msm_vidc_fence.c b/driver/vidc/src/msm_vidc_fence.c index 546578167c..23b0f1bd0e 100644 --- a/driver/vidc/src/msm_vidc_fence.c +++ b/driver/vidc/src/msm_vidc_fence.c @@ -106,8 +106,10 @@ int msm_vidc_create_fence_fd(struct msm_vidc_inst *inst, goto err_sync_file; } fd_install(fence->fd, fence->sync_file->file); - i_vpr_l(inst, "%s: created fd %d for fence %s id: %llu\n", __func__, - fence->fd, fence->name, fence->dma_fence.seqno); + + i_vpr_l(inst, "%s: created fd %d for fence %s\n", __func__, + fence->fd, fence->name); + return rc; err_sync_file: put_unused_fd(fence->fd); diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index 79ad1c9b01..441371b7f5 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -3525,6 +3525,11 @@ int venus_hfi_queue_buffer(struct msm_vidc_inst *inst, if (is_meta_rx_inp_enabled(inst, META_OUTBUF_FENCE) && is_output_buffer(buffer->type)) { + if (!buffer->fence_id) { + i_vpr_e(inst, "%s: fence id cannot be 0\n", __func__); + rc = -EINVAL; + goto unlock; + } rc = hfi_create_packet(inst->packet, inst->packet_size, HFI_PROP_FENCE, diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index 4f1e12cde1..aa02e210a0 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -1063,6 +1063,14 @@ static int msm_vidc_check_meta_buffers(struct msm_vidc_inst *inst) }; for (i = 0; i < ARRAY_SIZE(buffer_type); i++) { + /* + * skip input meta buffers check as meta buffers were + * already delivered if output fence enabled. + */ + if (is_meta_rx_inp_enabled(inst, META_OUTBUF_FENCE)) { + if (buffer_type[i] == MSM_VIDC_BUF_INPUT) + continue; + } buffers = msm_vidc_get_buffers(inst, buffer_type[i], __func__); if (!buffers) return -EINVAL; @@ -1116,7 +1124,13 @@ static int handle_dequeue_buffers(struct msm_vidc_inst *inst) "vb2 done already", inst, buf); } else { buf->attr |= MSM_VIDC_ATTR_BUFFER_DONE; - msm_vidc_buffer_done(inst, buf); + rc = msm_vidc_buffer_done(inst, buf); + if (rc) { + print_vidc_buffer(VIDC_HIGH, "err ", + "vb2 done failed", inst, buf); + /* ignore the error */ + rc = 0; + } } msm_vidc_put_driver_buf(inst, buf); } @@ -1734,12 +1748,12 @@ static int __handle_session_response(struct msm_vidc_inst *inst, } } - memset(&inst->hfi_frame_info, 0, sizeof(struct msm_vidc_hfi_frame_info)); if (dequeue) { rc = handle_dequeue_buffers(inst); if (rc) return rc; } + memset(&inst->hfi_frame_info, 0, sizeof(struct msm_vidc_hfi_frame_info)); return rc; } diff --git a/include/uapi/vidc/media/v4l2_vidc_extensions.h b/include/uapi/vidc/media/v4l2_vidc_extensions.h index ed33dc50c5..2d5f6cebfd 100644 --- a/include/uapi/vidc/media/v4l2_vidc_extensions.h +++ b/include/uapi/vidc/media/v4l2_vidc_extensions.h @@ -227,6 +227,8 @@ enum v4l2_mpeg_video_av1_tier { */ #define V4L2_CID_MPEG_VIDC_SW_FENCE_FD \ (V4L2_CID_MPEG_VIDC_BASE + 0x3A) +#define V4L2_CID_MPEG_VIDC_METADATA_PICTURE_TYPE \ + (V4L2_CID_MPEG_VIDC_BASE + 0x3B) /* add new controls above this line */ /* Deprecate below controls once availble in gki and gsi bionic header */ @@ -355,6 +357,7 @@ enum v4l2_mpeg_vidc_metadata { METADATA_TIMESTAMP = 0x0300015c, METADATA_CONCEALED_MB_COUNT = 0x0300015f, METADATA_HISTOGRAM_INFO = 0x03000161, + METADATA_PICTURE_TYPE = 0x03000162, METADATA_SEI_MASTERING_DISPLAY_COLOUR = 0x03000163, METADATA_SEI_CONTENT_LIGHT_LEVEL = 0x03000164, METADATA_HDR10PLUS = 0x03000165, @@ -403,7 +406,10 @@ enum meta_interlace_info { struct v4l2_event_vidc_metadata { __u32 type; __s32 fd; - __u8 reserved[56]; + __u32 index; + __u32 bytesused; + __u32 offset; + __u8 reserved[44]; }; /* vendor events end */ From 8f0e12cc93cdf7b8f3e9379ed557fe11e9fe124a Mon Sep 17 00:00:00 2001 From: Dikshita Agarwal Date: Mon, 24 Jan 2022 14:26:01 +0530 Subject: [PATCH 0587/1061] video: driver: add support for cyclic intra refresh MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Currently driver supports only random intra refresh, extend it to support cyclic intra refresh too. Cyclic intra refresh is supported dynamically as well. - If intra refresh type is set and num of LCU’s to be refreshed are non-zero before session start, intra refresh will be enabled throughout the session. Any further dynamic settings in the number of LCU’s including 0 will be honored accordingly. - If intra refresh type is set and num of LCU’s to be refreshed are zero before session start, intra refresh will be disabled. When client sets it to non-zero value dynamically, driver will set HFI_PROP_REQUEST_SYNC_FRAME with HFI_SYNC_FRAME_REQUEST_WITH_PREFIX_SEQ_HDR. Driver needs to send HFI_PROP_REQUEST_SYNC_FRAME only at time of CIR Enable, no need to send at time of disable/enable again. Change-Id: I10a2fb22d131353721ee658213ed807ce0794009 Signed-off-by: Dikshita Agarwal --- driver/platform/kalama/src/msm_vidc_kalama.c | 35 ++++--- driver/platform/waipio/src/msm_vidc_waipio.c | 34 ++++--- driver/vidc/inc/hfi_property.h | 2 + driver/vidc/inc/msm_vidc_control.h | 7 +- driver/vidc/inc/msm_vidc_inst.h | 1 + driver/vidc/inc/msm_vidc_internal.h | 3 +- driver/vidc/inc/venus_hfi.h | 2 + driver/vidc/src/msm_vidc_control.c | 93 +++++++++++++++++-- driver/vidc/src/msm_vidc_driver.c | 4 +- driver/vidc/src/venus_hfi.c | 65 +++++++++++++ .../uapi/vidc/media/v4l2_vidc_extensions.h | 7 ++ 11 files changed, 219 insertions(+), 34 deletions(-) diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index 1e879ba63f..9360343d7f 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -154,7 +154,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { 0, 0, 0, {0}, - {META_ROI_INFO}}, + {META_ROI_INFO, IR_PERIOD}}, {PIX_FMTS, ENC, HEVC, MSM_VIDC_FMT_NV12, MSM_VIDC_FMT_TP10C, @@ -174,7 +174,8 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { * META_ROI_INFO -> MIN_QUALITY -> BLUR_TYPES */ PROFILE, MIN_FRAME_QP, MAX_FRAME_QP, I_FRAME_QP, P_FRAME_QP, - B_FRAME_QP, META_ROI_INFO, MIN_QUALITY, BLUR_TYPES}}, + B_FRAME_QP, META_ROI_INFO, MIN_QUALITY, BLUR_TYPES, + IR_PERIOD}}, {PIX_FMTS, DEC, HEVC|HEIC, MSM_VIDC_FMT_NV12, @@ -487,7 +488,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { HFI_PROP_RATE_CONTROL, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, - {LTR_COUNT, IR_RANDOM, TIME_DELTA_BASED_RC, I_FRAME_QP, + {LTR_COUNT, IR_PERIOD, TIME_DELTA_BASED_RC, I_FRAME_QP, P_FRAME_QP, B_FRAME_QP, ENH_LAYER_COUNT, BIT_RATE, META_ROI_INFO, MIN_QUALITY, BITRATE_BOOST, VBV_DELAY, PEAK_BITRATE, SLICE_MODE, CONTENT_ADAPTIVE_CODING, @@ -505,7 +506,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { HFI_PROP_RATE_CONTROL, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, - {LTR_COUNT, IR_RANDOM, TIME_DELTA_BASED_RC, I_FRAME_QP, + {LTR_COUNT, IR_PERIOD, TIME_DELTA_BASED_RC, I_FRAME_QP, P_FRAME_QP, B_FRAME_QP, CONSTANT_QUALITY, ENH_LAYER_COUNT, BIT_RATE, META_ROI_INFO, MIN_QUALITY, BITRATE_BOOST, VBV_DELAY, PEAK_BITRATE, SLICE_MODE, CONTENT_ADAPTIVE_CODING, @@ -656,13 +657,25 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { HFI_PROP_BASELAYER_PRIORITYID, CAP_FLAG_OUTPUT_PORT}, - {IR_RANDOM, ENC, H264|HEVC, + {IR_TYPE, ENC, H264|HEVC, + V4L2_MPEG_VIDEO_VIDC_INTRA_REFRESH_RANDOM, + V4L2_MPEG_VIDEO_VIDC_INTRA_REFRESH_CYCLIC, + BIT(V4L2_MPEG_VIDEO_VIDC_INTRA_REFRESH_RANDOM) | + BIT(V4L2_MPEG_VIDEO_VIDC_INTRA_REFRESH_CYCLIC), + V4L2_MPEG_VIDEO_VIDC_INTRA_REFRESH_RANDOM, + V4L2_CID_MPEG_VIDEO_VIDC_INTRA_REFRESH_TYPE, + 0, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {IR_PERIOD, ENC, H264|HEVC, 0, INT_MAX, 1, 0, V4L2_CID_MPEG_VIDC_INTRA_REFRESH_PERIOD, - HFI_PROP_IR_RANDOM_PERIOD, - CAP_FLAG_OUTPUT_PORT, - {BITRATE_MODE, ALL_INTRA}, {0}, - msm_vidc_adjust_ir_random, msm_vidc_set_u32}, + 0, + CAP_FLAG_INPUT_PORT | CAP_FLAG_OUTPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {BITRATE_MODE, ALL_INTRA, META_ROI_INFO, PIX_FMTS}, + {0}, + msm_vidc_adjust_ir_period, msm_vidc_set_ir_period}, {AU_DELIMITER, ENC, H264|HEVC, V4L2_MPEG_MSM_VIDC_DISABLE, @@ -1676,7 +1689,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { 0, CAP_FLAG_OUTPUT_PORT, {GOP_SIZE, B_FRAME}, - {LTR_COUNT, IR_RANDOM, SLICE_MODE}, + {LTR_COUNT, IR_PERIOD, SLICE_MODE}, msm_vidc_adjust_all_intra, NULL}, {INPUT_METADATA_FD, ENC|DEC, CODECS_ALL, @@ -1884,7 +1897,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { HFI_PROP_ROI_INFO, CAP_FLAG_INPUT_PORT | CAP_FLAG_BITMASK, {BITRATE_MODE, PIX_FMTS}, - {MIN_QUALITY}, + {MIN_QUALITY, IR_PERIOD}, msm_vidc_adjust_roi_info, NULL}, {META_SALIENCY_INFO, ENC, H264|HEVC, diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index b1c50f3965..c038de1f15 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -146,7 +146,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 0, 0, 0, {0}, - {META_ROI_INFO}}, + {META_ROI_INFO, IR_PERIOD}}, {PIX_FMTS, ENC, HEVC, MSM_VIDC_FMT_NV12, MSM_VIDC_FMT_TP10C, @@ -166,7 +166,8 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { * META_ROI_INFO -> MIN_QUALITY -> BLUR_TYPES */ PROFILE, MIN_FRAME_QP, MAX_FRAME_QP, I_FRAME_QP, P_FRAME_QP, - B_FRAME_QP, META_ROI_INFO, MIN_QUALITY, BLUR_TYPES}}, + B_FRAME_QP, META_ROI_INFO, MIN_QUALITY, BLUR_TYPES, + IR_PERIOD}}, {PIX_FMTS, DEC, HEVC|HEIC, MSM_VIDC_FMT_NV12, @@ -435,7 +436,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { HFI_PROP_RATE_CONTROL, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, - {LTR_COUNT, IR_RANDOM, TIME_DELTA_BASED_RC, I_FRAME_QP, + {LTR_COUNT, IR_PERIOD, TIME_DELTA_BASED_RC, I_FRAME_QP, P_FRAME_QP, B_FRAME_QP, ENH_LAYER_COUNT, BIT_RATE, META_ROI_INFO, MIN_QUALITY, BITRATE_BOOST, VBV_DELAY, PEAK_BITRATE, SLICE_MODE, CONTENT_ADAPTIVE_CODING, @@ -453,7 +454,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { HFI_PROP_RATE_CONTROL, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, {0}, - {LTR_COUNT, IR_RANDOM, TIME_DELTA_BASED_RC, I_FRAME_QP, + {LTR_COUNT, IR_PERIOD, TIME_DELTA_BASED_RC, I_FRAME_QP, P_FRAME_QP, B_FRAME_QP, CONSTANT_QUALITY, ENH_LAYER_COUNT, BIT_RATE, META_ROI_INFO, MIN_QUALITY, BITRATE_BOOST, VBV_DELAY, PEAK_BITRATE, SLICE_MODE, CONTENT_ADAPTIVE_CODING, @@ -604,13 +605,24 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { HFI_PROP_BASELAYER_PRIORITYID, CAP_FLAG_OUTPUT_PORT}, - {IR_RANDOM, ENC, H264|HEVC, + {IR_TYPE, ENC, H264|HEVC, + V4L2_MPEG_VIDEO_VIDC_INTRA_REFRESH_RANDOM, + V4L2_MPEG_VIDEO_VIDC_INTRA_REFRESH_RANDOM, + BIT(V4L2_MPEG_VIDEO_VIDC_INTRA_REFRESH_RANDOM), + V4L2_MPEG_VIDEO_VIDC_INTRA_REFRESH_RANDOM, + V4L2_CID_MPEG_VIDEO_VIDC_INTRA_REFRESH_TYPE, + 0, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {IR_PERIOD, ENC, H264|HEVC, 0, INT_MAX, 1, 0, V4L2_CID_MPEG_VIDC_INTRA_REFRESH_PERIOD, - HFI_PROP_IR_RANDOM_PERIOD, - CAP_FLAG_OUTPUT_PORT, - {BITRATE_MODE, ALL_INTRA}, {0}, - msm_vidc_adjust_ir_random, msm_vidc_set_u32}, + 0, + CAP_FLAG_INPUT_PORT | CAP_FLAG_OUTPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + {BITRATE_MODE, ALL_INTRA, META_ROI_INFO, PIX_FMTS}, + {0}, + msm_vidc_adjust_ir_period, msm_vidc_set_ir_period}, {AU_DELIMITER, ENC, H264|HEVC, V4L2_MPEG_MSM_VIDC_DISABLE, @@ -1526,7 +1538,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 0, CAP_FLAG_OUTPUT_PORT, {GOP_SIZE, B_FRAME}, - {LTR_COUNT, IR_RANDOM, SLICE_MODE}, + {LTR_COUNT, IR_PERIOD, SLICE_MODE}, msm_vidc_adjust_all_intra, NULL}, {INPUT_METADATA_FD, ENC|DEC, CODECS_ALL, @@ -1729,7 +1741,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { HFI_PROP_ROI_INFO, CAP_FLAG_INPUT_PORT | CAP_FLAG_BITMASK, {BITRATE_MODE, PIX_FMTS}, - {MIN_QUALITY}, + {MIN_QUALITY, IR_PERIOD}, msm_vidc_adjust_roi_info, NULL}, {META_SALIENCY_INFO, ENC, H264|HEVC, diff --git a/driver/vidc/inc/hfi_property.h b/driver/vidc/inc/hfi_property.h index 6c978fc8d7..c46b7354bf 100644 --- a/driver/vidc/inc/hfi_property.h +++ b/driver/vidc/inc/hfi_property.h @@ -533,6 +533,8 @@ enum hfi_nal_length_field_type { #define HFI_PROP_MAINTAIN_MIN_QUALITY 0x0300017D +#define HFI_PROP_IR_CYCLIC_PERIOD 0x0300017E + #define HFI_PROP_AV1_FILM_GRAIN_PRESENT 0x03000180 #define HFI_PROP_AV1_SUPER_BLOCK_ENABLED 0x03000181 diff --git a/driver/vidc/inc/msm_vidc_control.h b/driver/vidc/inc/msm_vidc_control.h index a26ee1d329..2adeeec720 100644 --- a/driver/vidc/inc/msm_vidc_control.h +++ b/driver/vidc/inc/msm_vidc_control.h @@ -23,7 +23,7 @@ int msm_vidc_adjust_profile(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_ltr_count(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_use_ltr(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_mark_ltr(void *instance, struct v4l2_ctrl *ctrl); -int msm_vidc_adjust_ir_random(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_ir_period(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_delta_based_rc(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_output_order(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_input_buf_host_max_count(void *instance, struct v4l2_ctrl *ctrl); @@ -111,6 +111,8 @@ int msm_vidc_set_csc_custom_matrix(void *instance, enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_session_priority(void* instance, enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_ir_period(void *instance, + enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_level(void *instance, enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_s32(void *instance, @@ -125,4 +127,7 @@ int msm_vidc_update_cap_value(struct msm_vidc_inst *inst, u32 cap, s32 adjusted_val, const char *func); int msm_vidc_get_parent_value(struct msm_vidc_inst* inst, u32 cap, u32 parent, s32 *value, const char *func); +u32 msm_vidc_get_port_info(struct msm_vidc_inst *inst, + enum msm_vidc_inst_capability_type cap_id); + #endif diff --git a/driver/vidc/inc/msm_vidc_inst.h b/driver/vidc/inc/msm_vidc_inst.h index 431f4d7bef..696a466397 100644 --- a/driver/vidc/inc/msm_vidc_inst.h +++ b/driver/vidc/inc/msm_vidc_inst.h @@ -172,5 +172,6 @@ struct msm_vidc_inst { u32 auto_framerate; u32 max_rate; bool has_bframe; + bool ir_enabled; }; #endif // _MSM_VIDC_INST_H_ diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 94f42e0c52..a5a2658b39 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -434,6 +434,7 @@ enum msm_vidc_inst_capability_type { USE_LTR, MARK_LTR, BASELAYER_PRIORITY, + IR_TYPE, AU_DELIMITER, GRID, I_FRAME_MIN_QP, @@ -511,7 +512,7 @@ enum msm_vidc_inst_capability_type { TRANSFORM_8X8, STAGE, LTR_COUNT, - IR_RANDOM, + IR_PERIOD, BITRATE_BOOST, SLICE_MODE, BLUR_RESOLUTION, diff --git a/driver/vidc/inc/venus_hfi.h b/driver/vidc/inc/venus_hfi.h index 129b66280a..cbbd4ec571 100644 --- a/driver/vidc/inc/venus_hfi.h +++ b/driver/vidc/inc/venus_hfi.h @@ -61,6 +61,8 @@ int venus_hfi_trigger_stability(struct msm_vidc_inst *inst, u32 type, u32 client_id, u32 val); int venus_hfi_scale_clocks(struct msm_vidc_inst* inst, u64 freq); int venus_hfi_scale_buses(struct msm_vidc_inst* inst, u64 bw_ddr, u64 bw_llcc); +int venus_hfi_set_ir_period(struct msm_vidc_inst *inst, u32 ir_type, + enum msm_vidc_inst_capability_type cap_id); void venus_hfi_pm_work_handler(struct work_struct *work); irqreturn_t venus_hfi_isr(int irq, void *data); diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 4c7629849e..c5b8728752 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -144,7 +144,13 @@ static const char * const av1_tier[] = { NULL, }; -static u32 msm_vidc_get_port_info(struct msm_vidc_inst *inst, +static const char *const mpeg_video_vidc_ir_type[] = { + "Random", + "Cyclic", + NULL, +}; + +u32 msm_vidc_get_port_info(struct msm_vidc_inst *inst, enum msm_vidc_inst_capability_type cap_id) { struct msm_vidc_inst_capability *capability = inst->capabilities; @@ -185,6 +191,8 @@ static const char * const * msm_vidc_get_qmenu_type( return av1_level; case V4L2_CID_MPEG_VIDEO_AV1_TIER: return av1_tier; + case V4L2_CID_MPEG_VIDEO_VIDC_INTRA_REFRESH_TYPE: + return mpeg_video_vidc_ir_type; default: i_vpr_e(inst, "%s: No available qmenu for ctrl %#x\n", __func__, control_id); @@ -1413,10 +1421,11 @@ int msm_vidc_adjust_mark_ltr(void *instance, struct v4l2_ctrl *ctrl) return 0; } -int msm_vidc_adjust_ir_random(void *instance, struct v4l2_ctrl *ctrl) +int msm_vidc_adjust_ir_period(void *instance, struct v4l2_ctrl *ctrl) { struct msm_vidc_inst_capability *capability; - s32 adjusted_value, all_intra = 0; + s32 adjusted_value, all_intra = 0, roi_enable = 0, + pix_fmts = MSM_VIDC_FMT_NONE; struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; if (!inst || !inst->capabilities) { @@ -1425,30 +1434,54 @@ int msm_vidc_adjust_ir_random(void *instance, struct v4l2_ctrl *ctrl) } capability = inst->capabilities; - adjusted_value = ctrl ? ctrl->val : capability->cap[IR_RANDOM].value; + adjusted_value = ctrl ? ctrl->val : capability->cap[IR_PERIOD].value; - if (msm_vidc_get_parent_value(inst, IR_RANDOM, ALL_INTRA, - &all_intra, __func__)) + if (msm_vidc_get_parent_value(inst, IR_PERIOD, ALL_INTRA, + &all_intra, __func__) || + msm_vidc_get_parent_value(inst, IR_PERIOD, META_ROI_INFO, + &roi_enable, __func__)) return -EINVAL; if (all_intra) { adjusted_value = 0; - i_vpr_h(inst, "%s: IR unsupported, all intra: %d\n", + i_vpr_h(inst, "%s: intra refresh unsupported, all intra: %d\n", __func__, all_intra); goto exit; } + if (roi_enable) { + i_vpr_h(inst, + "%s: intra refresh unsupported with roi metadata\n", + __func__); + adjusted_value = 0; + goto exit; + } + + if (inst->codec == MSM_VIDC_HEVC) { + if (msm_vidc_get_parent_value(inst, IR_PERIOD, + PIX_FMTS, &pix_fmts, __func__)) + return -EINVAL; + + if (is_10bit_colorformat(pix_fmts)) { + i_vpr_h(inst, + "%s: intra refresh is supported only for 8 bit\n", + __func__); + adjusted_value = 0; + goto exit; + } + } + /* * BITRATE_MODE dependency is NOT common across all chipsets. * Hence, do not return error if not specified as one of the parent. */ - if (is_parent_available(inst, IR_RANDOM, BITRATE_MODE, __func__) && + if (is_parent_available(inst, IR_PERIOD, BITRATE_MODE, __func__) && inst->hfi_rc_type != HFI_RC_CBR_CFR && inst->hfi_rc_type != HFI_RC_CBR_VFR) adjusted_value = 0; exit: - msm_vidc_update_cap_value(inst, IR_RANDOM, + msm_vidc_update_cap_value(inst, IR_PERIOD, adjusted_value, __func__); return 0; @@ -4030,6 +4063,48 @@ int msm_vidc_set_level(void *instance, return rc; } +int msm_vidc_set_ir_period(void *instance, + enum msm_vidc_inst_capability_type cap_id) +{ + int rc = 0; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; + u32 ir_type = 0; + struct msm_vidc_core *core; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + core = inst->core; + + if (inst->capabilities->cap[IR_TYPE].value == + V4L2_MPEG_VIDEO_VIDC_INTRA_REFRESH_RANDOM) { + if (inst->bufq[OUTPUT_PORT].vb2q->streaming) { + i_vpr_h(inst, "%s: dynamic random intra refresh not allowed\n", + __func__); + return 0; + } + ir_type = HFI_PROP_IR_RANDOM_PERIOD; + } else if (inst->capabilities->cap[IR_TYPE].value == + V4L2_MPEG_VIDEO_VIDC_INTRA_REFRESH_CYCLIC) { + ir_type = HFI_PROP_IR_CYCLIC_PERIOD; + } else { + i_vpr_e(inst, "%s: invalid ir_type %d\n", + __func__, inst->capabilities->cap[IR_TYPE]); + return -EINVAL; + } + + rc = venus_hfi_set_ir_period(inst, ir_type, cap_id); + if (rc) { + i_vpr_e(inst, "%s: failed to set ir period %d\n", + __func__, inst->capabilities->cap[IR_PERIOD].value); + return rc; + } + + return rc; +} + int msm_vidc_set_q16(void *instance, enum msm_vidc_inst_capability_type cap_id) { diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 157356d5e4..423a05145f 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -133,6 +133,7 @@ static const struct msm_vidc_cap_name cap_name_arr[] = { {USE_LTR, "USE_LTR" }, {MARK_LTR, "MARK_LTR" }, {BASELAYER_PRIORITY, "BASELAYER_PRIORITY" }, + {IR_TYPE, "IR_TYPE" }, {AU_DELIMITER, "AU_DELIMITER" }, {GRID, "GRID" }, {I_FRAME_MIN_QP, "I_FRAME_MIN_QP" }, @@ -206,7 +207,7 @@ static const struct msm_vidc_cap_name cap_name_arr[] = { {TRANSFORM_8X8, "TRANSFORM_8X8" }, {STAGE, "STAGE" }, {LTR_COUNT, "LTR_COUNT" }, - {IR_RANDOM, "IR_RANDOM" }, + {IR_PERIOD, "IR_PERIOD" }, {BITRATE_BOOST, "BITRATE_BOOST" }, {SLICE_MODE, "SLICE_MODE" }, {BLUR_RESOLUTION, "BLUR_RESOLUTION" }, @@ -1370,6 +1371,7 @@ bool msm_vidc_allow_s_ctrl(struct msm_vidc_inst *inst, u32 id) case V4L2_CID_MPEG_VIDEO_BITRATE_PEAK: case V4L2_CID_MPEG_VIDC_PRIORITY: case V4L2_CID_MPEG_VIDC_INPUT_METADATA_FD: + case V4L2_CID_MPEG_VIDC_INTRA_REFRESH_PERIOD: allow = true; break; default: diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index 441371b7f5..9f4f01b88d 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -17,6 +17,7 @@ #include "venus_hfi.h" #include "msm_vidc_core.h" +#include "msm_vidc_control.h" #include "msm_vidc_power.h" #include "msm_vidc_platform.h" #include "msm_vidc_memory.h" @@ -3662,3 +3663,67 @@ exit: return rc; } + +int venus_hfi_set_ir_period(struct msm_vidc_inst *inst, u32 ir_type, + enum msm_vidc_inst_capability_type cap_id) +{ + int rc = 0; + struct msm_vidc_core *core; + u32 ir_period, sync_frame_req = 0; + + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + core = inst->core; + + core_lock(core, __func__); + + ir_period = inst->capabilities->cap[cap_id].value; + + rc = hfi_create_header(inst->packet, inst->packet_size, + inst->session_id, core->header_id++); + if (rc) + goto exit; + + /* Request sync frame if ir period enabled dynamically */ + if (!inst->ir_enabled) { + inst->ir_enabled = ((ir_period > 0) ? true : false); + if (inst->ir_enabled && inst->bufq[OUTPUT_PORT].vb2q->streaming) { + sync_frame_req = HFI_SYNC_FRAME_REQUEST_WITH_PREFIX_SEQ_HDR; + rc = hfi_create_packet(inst->packet, inst->packet_size, + HFI_PROP_REQUEST_SYNC_FRAME, + HFI_HOST_FLAGS_NONE, + HFI_PAYLOAD_U32_ENUM, + msm_vidc_get_port_info(inst, REQUEST_I_FRAME), + core->packet_id++, + &sync_frame_req, + sizeof(u32)); + if (rc) + goto exit; + } + } + + rc = hfi_create_packet(inst->packet, inst->packet_size, + ir_type, + HFI_HOST_FLAGS_NONE, + HFI_PAYLOAD_U32, + msm_vidc_get_port_info(inst, cap_id), + core->packet_id++, + &ir_period, + sizeof(u32)); + if (rc) + goto exit; + + rc = __iface_cmdq_write(inst->core, inst->packet); + if (rc) { + i_vpr_e(inst, "%s: failed to set cap[%d] %s to fw\n", + __func__, cap_id, cap_name(cap_id)); + goto exit; + } + +exit: + core_unlock(core, __func__); + + return rc; +} diff --git a/include/uapi/vidc/media/v4l2_vidc_extensions.h b/include/uapi/vidc/media/v4l2_vidc_extensions.h index 2d5f6cebfd..b5ee13460c 100644 --- a/include/uapi/vidc/media/v4l2_vidc_extensions.h +++ b/include/uapi/vidc/media/v4l2_vidc_extensions.h @@ -71,6 +71,13 @@ /* Encoder Intra refresh period */ #define V4L2_CID_MPEG_VIDC_INTRA_REFRESH_PERIOD (V4L2_CID_MPEG_VIDC_BASE + 0xB) +/* Encoder Intra refresh type */ +#define V4L2_CID_MPEG_VIDEO_VIDC_INTRA_REFRESH_TYPE \ + (V4L2_CID_MPEG_VIDC_BASE + 0xC) +enum v4l2_mpeg_vidc_ir_type { + V4L2_MPEG_VIDEO_VIDC_INTRA_REFRESH_RANDOM = 0x0, + V4L2_MPEG_VIDEO_VIDC_INTRA_REFRESH_CYCLIC = 0x1, +}; #define V4L2_CID_MPEG_VIDC_TIME_DELTA_BASED_RC (V4L2_CID_MPEG_VIDC_BASE + 0xD) /* Encoder quality controls */ #define V4L2_CID_MPEG_VIDC_CONTENT_ADAPTIVE_CODING \ From 6d48bb4854862532be09be01dcbc349a929a4993 Mon Sep 17 00:00:00 2001 From: Ankush Mitra Date: Fri, 18 Feb 2022 11:13:33 +0530 Subject: [PATCH 0588/1061] video: driver: keep all platform common api in a single file update msm_vidc_platform.c to keep all common API's and macro's in a single file to avoid redundancy. Change-Id: I43869f54514ab8c531b6e27b84ce0a6c1f1806ce Signed-off-by: Ankush Mitra --- Kbuild | 5 +- .../common}/inc/msm_vidc_platform.h | 36 +++++- .../common}/src/msm_vidc_platform.c | 118 +++++++++++++++++- driver/platform/kalama/src/msm_vidc_kalama.c | 36 ------ driver/platform/waipio/src/msm_vidc_waipio.c | 35 +----- 5 files changed, 156 insertions(+), 74 deletions(-) rename driver/{vidc => platform/common}/inc/msm_vidc_platform.h (60%) rename driver/{vidc => platform/common}/src/msm_vidc_platform.c (78%) diff --git a/Kbuild b/Kbuild index d636d128a5..e22f634eb9 100644 --- a/Kbuild +++ b/Kbuild @@ -16,6 +16,7 @@ endif LINUXINCLUDE += -I$(VIDEO_ROOT)/driver/vidc/inc \ + -I$(VIDEO_ROOT)/driver/platform/common/inc \ -I$(VIDEO_ROOT)/include/uapi/vidc USERINCLUDE += -I$(VIDEO_ROOT)/include/uapi/vidc/media \ @@ -56,10 +57,10 @@ msm_video-objs += driver/vidc/src/msm_vidc_v4l2.o \ driver/vidc/src/msm_vidc_power.o \ driver/vidc/src/msm_vidc_probe.o \ driver/vidc/src/msm_vidc_dt.o \ - driver/vidc/src/msm_vidc_platform.o \ driver/vidc/src/msm_vidc_debug.o \ driver/vidc/src/msm_vidc_memory.o \ driver/vidc/src/msm_vidc_fence.o \ driver/vidc/src/venus_hfi.o \ driver/vidc/src/hfi_packet.o \ - driver/vidc/src/venus_hfi_response.o + driver/vidc/src/venus_hfi_response.o \ + driver/platform/common/src/msm_vidc_platform.o diff --git a/driver/vidc/inc/msm_vidc_platform.h b/driver/platform/common/inc/msm_vidc_platform.h similarity index 60% rename from driver/vidc/inc/msm_vidc_platform.h rename to driver/platform/common/inc/msm_vidc_platform.h index 0e4e40abcc..44e27a4474 100644 --- a/driver/vidc/inc/msm_vidc_platform.h +++ b/driver/platform/common/inc/msm_vidc_platform.h @@ -7,9 +7,39 @@ #define _MSM_VIDC_PLATFORM_H_ #include +#include #include "msm_vidc_internal.h" -#include +#include "msm_vidc_core.h" + +#define DDR_TYPE_LPDDR4 0x6 +#define DDR_TYPE_LPDDR4X 0x7 +#define DDR_TYPE_LPDDR5 0x8 +#define DDR_TYPE_LPDDR5X 0x9 + +#define UBWC_CONFIG(mc, ml, hbb, bs1, bs2, bs3, bsp) \ +{ \ + .max_channels = mc, \ + .mal_length = ml, \ + .highest_bank_bit = hbb, \ + .bank_swzl_level = bs1, \ + .bank_swz2_level = bs2, \ + .bank_swz3_level = bs3, \ + .bank_spreading = bsp, \ +} + +#define EFUSE_ENTRY(sa, s, m, sh, p) \ +{ \ + .start_address = sa, \ + .size = s, \ + .mask = m, \ + .shift = sh, \ + .purpose = p \ +} + +extern u32 vpe_csc_custom_matrix_coeff[MAX_MATRIX_COEFFS]; +extern u32 vpe_csc_custom_bias_coeff[MAX_BIAS_COEFFS]; +extern u32 vpe_csc_custom_limit_coeff[MAX_LIMIT_COEFFS]; struct msm_platform_core_capability { enum msm_vidc_core_capability_type type; @@ -79,5 +109,9 @@ struct msm_vidc_platform { int msm_vidc_init_platform(struct platform_device *pdev); int msm_vidc_deinit_platform(struct platform_device *pdev); +int msm_vidc_read_efuse(struct msm_vidc_core *core); +void msm_vidc_sort_table(struct msm_vidc_core *core); +void msm_vidc_ddr_ubwc_config( + struct msm_vidc_platform_data *platform_data, u32 hbb_override_val); #endif // _MSM_VIDC_PLATFORM_H_ diff --git a/driver/vidc/src/msm_vidc_platform.c b/driver/platform/common/src/msm_vidc_platform.c similarity index 78% rename from driver/vidc/src/msm_vidc_platform.c rename to driver/platform/common/src/msm_vidc_platform.c index 4046c3d4b0..f59a2c4830 100644 --- a/driver/vidc/src/msm_vidc_platform.c +++ b/driver/platform/common/src/msm_vidc_platform.c @@ -1,16 +1,22 @@ // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. - * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. */ -#include +#include +#include +#include + #include "msm_vidc_platform.h" #include "msm_vidc_debug.h" #include "msm_vidc_v4l2.h" #include "msm_vidc_vb2.h" #include "msm_vidc_control.h" #include "msm_vidc_core.h" +#include "msm_vidc_dt.h" +#include "msm_vidc_debug.h" +#include "msm_vidc_internal.h" #if defined(CONFIG_MSM_VIDC_WAIPIO) #include "msm_vidc_waipio.h" #endif @@ -24,6 +30,26 @@ #include "msm_vidc_iris3.h" #endif +/* + * Custom conversion coefficients for resolution: 176x144 negative + * coeffs are converted to s4.9 format + * (e.g. -22 converted to ((1 << 13) - 22) + * 3x3 transformation matrix coefficients in s4.9 fixed point format + */ +u32 vpe_csc_custom_matrix_coeff[MAX_MATRIX_COEFFS] = { + 440, 8140, 8098, 0, 460, 52, 0, 34, 463 +}; + +/* offset coefficients in s9 fixed point format */ +u32 vpe_csc_custom_bias_coeff[MAX_BIAS_COEFFS] = { + 53, 0, 4 +}; + +/* clamping value for Y/U/V([min,max] for Y/U/V) */ +u32 vpe_csc_custom_limit_coeff[MAX_LIMIT_COEFFS] = { + 16, 235, 16, 240, 16, 240 +}; + static struct v4l2_file_operations msm_v4l2_file_operations = { .owner = THIS_MODULE, .open = msm_v4l2_open, @@ -364,3 +390,91 @@ int msm_vidc_init_platform(struct platform_device *pdev) return rc; } + +int msm_vidc_read_efuse(struct msm_vidc_core *core) +{ + int rc = 0; + void __iomem *base; + u32 i = 0, efuse = 0, efuse_data_count = 0; + struct msm_vidc_efuse_data *efuse_data = NULL; + struct msm_vidc_platform_data *platform_data; + + if (!core || !core->platform || !core->pdev) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + platform_data = &core->platform->data; + efuse_data = platform_data->efuse_data; + efuse_data_count = platform_data->efuse_data_size; + + if (!efuse_data) + return 0; + + for (i = 0; i < efuse_data_count; i++) { + switch (efuse_data[i].purpose) { + case SKU_VERSION: + base = devm_ioremap(&core->pdev->dev, efuse_data[i].start_address, + efuse_data[i].size); + if (!base) { + d_vpr_e("failed efuse: start %#x, size %d\n", + efuse_data[i].start_address, + efuse_data[i].size); + return -EINVAL; + } + efuse = readl_relaxed(base); + platform_data->sku_version = + (efuse & efuse_data[i].mask) >> + efuse_data[i].shift; + break; + default: + break; + } + if (platform_data->sku_version) { + d_vpr_h("efuse 0x%x, platform version 0x%x\n", + efuse, platform_data->sku_version); + break; + } + } + return rc; +} + +void msm_vidc_ddr_ubwc_config( + struct msm_vidc_platform_data *platform_data, u32 hbb_override_val) +{ + uint32_t ddr_type = DDR_TYPE_LPDDR5; + + if (!platform_data || !platform_data->ubwc_config) { + d_vpr_e("%s: invalid params\n", __func__); + return; + } + + ddr_type = of_fdt_get_ddrtype(); + if (ddr_type == -ENOENT) + d_vpr_e("Failed to get ddr type, use LPDDR5\n"); + + if (platform_data->ubwc_config && + (ddr_type == DDR_TYPE_LPDDR4 || + ddr_type == DDR_TYPE_LPDDR4X)) + platform_data->ubwc_config->highest_bank_bit = hbb_override_val; + + d_vpr_h("DDR Type 0x%x hbb 0x%x\n", + ddr_type, platform_data->ubwc_config ? + platform_data->ubwc_config->highest_bank_bit : -1); +} + +void msm_vidc_sort_table(struct msm_vidc_core *core) +{ + u32 i = 0; + + if (!core || !core->dt || !core->dt->allowed_clks_tbl) { + d_vpr_e("%s: invalid params\n", __func__); + return; + } + + sort(core->dt->allowed_clks_tbl, core->dt->allowed_clks_tbl_size, + sizeof(*core->dt->allowed_clks_tbl), cmp, NULL); + d_vpr_h("Updated allowed clock rates\n"); + for (i = 0; i < core->dt->allowed_clks_tbl_size; i++) + d_vpr_h(" %d\n", core->dt->allowed_clks_tbl[i]); +} diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index 1e879ba63f..0ac4757aeb 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -10,7 +10,6 @@ #include "msm_vidc_platform.h" #include "msm_vidc_debug.h" #include "msm_vidc_internal.h" -#include "msm_vidc_core.h" #include "msm_vidc_control.h" #include "hfi_property.h" #include "msm_vidc_iris3.h" @@ -34,17 +33,6 @@ #define MAX_SLICE_MB_SIZE \ (((4096 + 15) >> 4) * ((2304 + 15) >> 4)) -#define UBWC_CONFIG(mc, ml, hbb, bs1, bs2, bs3, bsp) \ -{ \ - .max_channels = mc, \ - .mal_length = ml, \ - .highest_bank_bit = hbb, \ - .bank_swzl_level = bs1, \ - .bank_swz2_level = bs2, \ - .bank_swz3_level = bs3, \ - .bank_spreading = bsp, \ -} - #define ENC MSM_VIDC_ENCODER #define DEC MSM_VIDC_DECODER #define H264 MSM_VIDC_H264 @@ -55,10 +43,6 @@ #define CODECS_ALL (H264 | HEVC | VP9 | HEIC | AV1) #define MAXIMUM_OVERRIDE_VP9_FPS 120 -/* from of.h */ -#define DDR_TYPE_LPDDR5 0x8 -#define DDR_TYPE_LPDDR5X 0x9 - static struct msm_platform_core_capability core_data_kalama[] = { /* {type, value} */ {ENC_CODECS, H264|HEVC|HEIC}, @@ -2014,26 +1998,6 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { CAP_FLAG_BITMASK}, }; -/* - * Custom conversion coefficients for resolution: 176x144 negative - * coeffs are converted to s4.9 format - * (e.g. -22 converted to ((1 << 13) - 22) - * 3x3 transformation matrix coefficients in s4.9 fixed point format - */ -static u32 vpe_csc_custom_matrix_coeff[MAX_MATRIX_COEFFS] = { - 440, 8140, 8098, 0, 460, 52, 0, 34, 463 -}; - -/* offset coefficients in s9 fixed point format */ -static u32 vpe_csc_custom_bias_coeff[MAX_BIAS_COEFFS] = { - 53, 0, 4 -}; - -/* clamping value for Y/U/V([min,max] for Y/U/V) */ -static u32 vpe_csc_custom_limit_coeff[MAX_LIMIT_COEFFS] = { - 16, 235, 16, 240, 16, 240 -}; - /* Default UBWC config for LPDDR5 */ static struct msm_vidc_ubwc_config_data ubwc_config_kalama[] = { UBWC_CONFIG(8, 32, 16, 0, 1, 1, 1), diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index b1c50f3965..82e3a558d2 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -1,6 +1,7 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. + * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. */ #include @@ -9,7 +10,6 @@ #include "msm_vidc_platform.h" #include "msm_vidc_debug.h" #include "msm_vidc_internal.h" -#include "msm_vidc_core.h" #include "msm_vidc_control.h" #include "hfi_property.h" @@ -31,17 +31,6 @@ #define MAX_SLICE_MB_SIZE \ (((4096 + 15) >> 4) * ((2304 + 15) >> 4)) -#define UBWC_CONFIG(mc, ml, hbb, bs1, bs2, bs3, bsp) \ -{ \ - .max_channels = mc, \ - .mal_length = ml, \ - .highest_bank_bit = hbb, \ - .bank_swzl_level = bs1, \ - .bank_swz2_level = bs2, \ - .bank_swz3_level = bs3, \ - .bank_spreading = bsp, \ -} - #define ENC MSM_VIDC_ENCODER #define DEC MSM_VIDC_DECODER #define H264 MSM_VIDC_H264 @@ -1859,26 +1848,6 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { CAP_FLAG_BITMASK}, }; -/* - * Custom conversion coefficients for resolution: 176x144 negative - * coeffs are converted to s4.9 format - * (e.g. -22 converted to ((1 << 13) - 22) - * 3x3 transformation matrix coefficients in s4.9 fixed point format - */ -static u32 vpe_csc_custom_matrix_coeff[MAX_MATRIX_COEFFS] = { - 440, 8140, 8098, 0, 460, 52, 0, 34, 463 -}; - -/* offset coefficients in s9 fixed point format */ -static u32 vpe_csc_custom_bias_coeff[MAX_BIAS_COEFFS] = { - 53, 0, 4 -}; - -/* clamping value for Y/U/V([min,max] for Y/U/V) */ -static u32 vpe_csc_custom_limit_coeff[MAX_LIMIT_COEFFS] = { - 16, 235, 16, 240, 16, 240 -}; - /* Default UBWC config for LPDDR5 */ static struct msm_vidc_ubwc_config_data ubwc_config_waipio[] = { UBWC_CONFIG(8, 32, 16, 0, 1, 1, 1), From 1933eb75bdaf20f841a4cd53c835b0b1fbdbff76 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Fri, 1 Apr 2022 10:52:22 -0700 Subject: [PATCH 0589/1061] video: driver: modify key frame marking for hevc/avc codecs Mark I Frame as Key frames for all codecs. Change-Id: I4fc73c076a93a959f4ed97ec65398ac3315af602 Signed-off-by: Akshata Sahukar --- driver/vidc/src/venus_hfi_response.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index aa02e210a0..db7047968d 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -588,8 +588,7 @@ static int get_driver_buffer_flags(struct msm_vidc_inst *inst, u32 hfi_flags) } else if (inst->hfi_frame_info.picture_type & HFI_PICTURE_B) { driver_flags |= MSM_VIDC_BUF_FLAG_BFRAME; } else if (inst->hfi_frame_info.picture_type & HFI_PICTURE_I) { - if (inst->codec == MSM_VIDC_VP9 || inst->codec == MSM_VIDC_AV1) - driver_flags |= MSM_VIDC_BUF_FLAG_KEYFRAME; + driver_flags |= MSM_VIDC_BUF_FLAG_KEYFRAME; } else if (inst->hfi_frame_info.picture_type & HFI_PICTURE_CRA) { driver_flags |= MSM_VIDC_BUF_FLAG_KEYFRAME; } else if (inst->hfi_frame_info.picture_type & HFI_PICTURE_BLA) { From fdef18ef508dae9f67b742456383590a3104894b Mon Sep 17 00:00:00 2001 From: Deepa Guthyappa Madivalara Date: Tue, 5 Apr 2022 11:00:14 -0700 Subject: [PATCH 0590/1061] video driver: remove session priority handling 1. Removes depenceny of priority from frame rate and operating rate. 2. Removes changing priority from s_param Change-Id: Iec51173eab5a3d59b841315549d1420df422d37f Signed-off-by: Deepa Guthyappa Madivalara --- .../platform/common/inc/msm_vidc_platform.h | 1 - driver/platform/kalama/src/msm_vidc_kalama.c | 15 +-- driver/platform/waipio/src/msm_vidc_waipio.c | 15 +-- driver/vidc/inc/msm_vidc_control.h | 6 +- driver/vidc/inc/msm_vidc_inst.h | 2 - driver/vidc/inc/msm_vidc_internal.h | 5 - driver/vidc/src/msm_vdec.c | 32 ------ driver/vidc/src/msm_venc.c | 7 -- driver/vidc/src/msm_vidc_control.c | 98 +++---------------- driver/vidc/src/msm_vidc_power.c | 12 +-- 10 files changed, 32 insertions(+), 161 deletions(-) diff --git a/driver/platform/common/inc/msm_vidc_platform.h b/driver/platform/common/inc/msm_vidc_platform.h index 44e27a4474..7ff277c52f 100644 --- a/driver/platform/common/inc/msm_vidc_platform.h +++ b/driver/platform/common/inc/msm_vidc_platform.h @@ -96,7 +96,6 @@ struct msm_vidc_platform_data { u32 instance_data_size; struct msm_vidc_csc_coeff csc_data; struct msm_vidc_ubwc_config_data *ubwc_config; - u32 *bus_bw_nrt; struct msm_vidc_efuse_data *efuse_data; unsigned int efuse_data_size; unsigned int sku_version; diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index a22cdd41fa..9ca59b5915 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -247,7 +247,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, {0}, {0}, - msm_vidc_adjust_frame_rate}, + msm_vidc_adjust_dec_frame_rate}, {FRAME_RATE, DEC, VP9, (MINIMUM_FPS << 16), (MAXIMUM_OVERRIDE_VP9_FPS << 16), @@ -257,7 +257,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, {0}, {0}, - msm_vidc_adjust_frame_rate}, + msm_vidc_adjust_dec_frame_rate}, {OPERATING_RATE, ENC, CODECS_ALL, (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), @@ -271,7 +271,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, {0}, {0}, - msm_vidc_adjust_operating_rate}, + msm_vidc_adjust_dec_operating_rate}, {OPERATING_RATE, DEC, VP9, (MINIMUM_FPS << 16), (MAXIMUM_OVERRIDE_VP9_FPS << 16), @@ -281,7 +281,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, {0}, {0}, - msm_vidc_adjust_operating_rate}, + msm_vidc_adjust_dec_operating_rate}, {INPUT_RATE, ENC|DEC, CODECS_ALL, (MINIMUM_FPS << 16), INT_MAX, @@ -2016,12 +2016,6 @@ static struct msm_vidc_ubwc_config_data ubwc_config_kalama[] = { UBWC_CONFIG(8, 32, 16, 0, 1, 1, 1), }; -/* Default bus bandwidth for non_real time session based on priority */ -static u32 bus_bw_nrt[] = { - 15000000, - 11000000, -}; - static const struct msm_vidc_platform_data kalama_data = { .core_data = core_data_kalama, .core_data_size = ARRAY_SIZE(core_data_kalama), @@ -2031,7 +2025,6 @@ static const struct msm_vidc_platform_data kalama_data = { .csc_data.vpe_csc_custom_matrix_coeff = vpe_csc_custom_matrix_coeff, .csc_data.vpe_csc_custom_limit_coeff = vpe_csc_custom_limit_coeff, .ubwc_config = ubwc_config_kalama, - .bus_bw_nrt = bus_bw_nrt, }; int msm_vidc_kalama_check_ddr_type(void) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index b0dca2e103..15586c3b34 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -237,7 +237,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, {0}, {0}, - msm_vidc_adjust_frame_rate}, + msm_vidc_adjust_dec_frame_rate}, {FRAME_RATE, DEC, VP9, (MINIMUM_FPS << 16), (MAXIMUM_OVERRIDE_VP9_FPS << 16), @@ -247,7 +247,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, {0}, {0}, - msm_vidc_adjust_frame_rate}, + msm_vidc_adjust_dec_frame_rate}, {OPERATING_RATE, ENC, CODECS_ALL, (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), @@ -261,7 +261,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, {0}, {0}, - msm_vidc_adjust_operating_rate}, + msm_vidc_adjust_dec_operating_rate}, {OPERATING_RATE, DEC, VP9, (MINIMUM_FPS << 16), (MAXIMUM_OVERRIDE_VP9_FPS << 16), @@ -271,7 +271,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, {0}, {0}, - msm_vidc_adjust_operating_rate}, + msm_vidc_adjust_dec_operating_rate}, {INPUT_RATE, ENC|DEC, CODECS_ALL, (MINIMUM_FPS << 16), INT_MAX, @@ -1865,12 +1865,6 @@ static struct msm_vidc_ubwc_config_data ubwc_config_waipio[] = { UBWC_CONFIG(8, 32, 16, 0, 1, 1, 1), }; -/* Default bus bandwidth for non_real time session based on priority */ -static u32 bus_bw_nrt[] = { - 15000000, - 11000000, -}; - static const struct msm_vidc_platform_data waipio_data = { .core_data = core_data_waipio, .core_data_size = ARRAY_SIZE(core_data_waipio), @@ -1880,7 +1874,6 @@ static const struct msm_vidc_platform_data waipio_data = { .csc_data.vpe_csc_custom_matrix_coeff = vpe_csc_custom_matrix_coeff, .csc_data.vpe_csc_custom_limit_coeff = vpe_csc_custom_limit_coeff, .ubwc_config = ubwc_config_waipio, - .bus_bw_nrt = bus_bw_nrt, }; static int msm_vidc_init_data(struct msm_vidc_core *core) diff --git a/driver/vidc/inc/msm_vidc_control.h b/driver/vidc/inc/msm_vidc_control.h index 2adeeec720..25fc8098a5 100644 --- a/driver/vidc/inc/msm_vidc_control.h +++ b/driver/vidc/inc/msm_vidc_control.h @@ -52,8 +52,8 @@ int msm_vidc_prepare_dependency_list(struct msm_vidc_inst *inst); int msm_vidc_adjust_session_priority(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_roi_info(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_all_intra(void *instance, struct v4l2_ctrl *ctrl); -int msm_vidc_adjust_frame_rate(void *instance, struct v4l2_ctrl *ctrl); -int msm_vidc_adjust_operating_rate(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_dec_frame_rate(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_dec_operating_rate(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_set_header_mode(void *instance, enum msm_vidc_inst_capability_type cap_id); @@ -109,8 +109,6 @@ int msm_vidc_set_pipe(void *instance, enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_csc_custom_matrix(void *instance, enum msm_vidc_inst_capability_type cap_id); -int msm_vidc_set_session_priority(void* instance, - enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_ir_period(void *instance, enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_level(void *instance, diff --git a/driver/vidc/inc/msm_vidc_inst.h b/driver/vidc/inc/msm_vidc_inst.h index 696a466397..b34332dcab 100644 --- a/driver/vidc/inc/msm_vidc_inst.h +++ b/driver/vidc/inc/msm_vidc_inst.h @@ -161,8 +161,6 @@ struct msm_vidc_inst { struct msm_vidc_inst_capability *capabilities; struct completion completions[MAX_SIGNAL]; struct msm_vidc_fence_context fence_context; - enum priority_level priority_level; - u32 firmware_priority; bool active; u64 last_qbuf_time_ns; bool vb2q_init; diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index a5a2658b39..3bea975c7a 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -150,11 +150,6 @@ enum msm_vidc_codec_type { MSM_VIDC_AV1 = BIT(4), }; -enum priority_level { - MSM_VIDC_PRIORITY_HIGH = 0, - MSM_VIDC_PRIORITY_LOW = 1, -}; - enum msm_vidc_colorformat_type { MSM_VIDC_FMT_NONE = 0, MSM_VIDC_FMT_NV12C = BIT(0), diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 2dca81b25d..78449ceac9 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -2054,10 +2054,6 @@ int msm_vdec_qbuf(struct msm_vidc_inst *inst, struct vb2_buffer *vb2) } } - if (inst->firmware_priority != (inst->priority_level + - inst->capabilities->cap[PRIORITY].value * 2)) - msm_vidc_set_session_priority(inst, PRIORITY); - /* batch decoder output & meta buffer only */ if (inst->decode_batch.enable && vb2->type == OUTPUT_MPLANE) rc = msm_vdec_qbuf_batch(inst, vb2); @@ -2566,38 +2562,12 @@ set_default: q16_rate = (u32)input_rate << 16; msm_vidc_update_cap_value(inst, is_frame_rate ? FRAME_RATE : OPERATING_RATE, q16_rate, __func__); - if (is_realtime_session(inst) && - ((s_parm->type == INPUT_MPLANE && inst->bufq[INPUT_PORT].vb2q->streaming) || - (s_parm->type == OUTPUT_MPLANE && inst->bufq[OUTPUT_PORT].vb2q->streaming))) { - rc = msm_vidc_check_core_mbps(inst); - if (rc) { - i_vpr_e(inst, "%s: unsupported load\n", __func__); - goto reset_rate; - } - rc = input_rate > max_rate; - if (rc) { - i_vpr_e(inst, "%s: unsupported rate %llu, max %u\n", __func__, - input_rate, max_rate); - rc = -ENOMEM; - goto reset_rate; - } - } - inst->priority_level = MSM_VIDC_PRIORITY_HIGH; if (is_frame_rate) capability->cap[FRAME_RATE].flags |= CAP_FLAG_CLIENT_SET; else capability->cap[OPERATING_RATE].flags |= CAP_FLAG_CLIENT_SET; - return 0; - -reset_rate: - if (rc) { - i_vpr_e(inst, "%s: setting rate %llu failed, reset to %u\n", __func__, - input_rate, default_rate); - msm_vidc_update_cap_value(inst, is_frame_rate ? FRAME_RATE : OPERATING_RATE, - default_rate << 16, __func__); - } exit: return rc; } @@ -2853,8 +2823,6 @@ int msm_vdec_inst_init(struct msm_vidc_inst *inst) inst->buffers.output_meta.actual_count = 0; inst->buffers.output_meta.size = 0; - inst->priority_level = MSM_VIDC_PRIORITY_LOW; - rc = msm_vdec_codec_change(inst, inst->fmts[INPUT_PORT].fmt.pix_mp.pixelformat); if (rc) diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index 9856cc64db..cca35e1b12 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -884,10 +884,6 @@ int msm_venc_qbuf(struct msm_vidc_inst *inst, struct vb2_buffer *vb2) return -EINVAL; } - if (inst->firmware_priority != (inst->priority_level + - inst->capabilities->cap[PRIORITY].value * 2)) - msm_vidc_set_session_priority(inst, PRIORITY); - rc = msm_vidc_queue_buffer_single(inst, vb2); if (rc) return rc; @@ -1637,7 +1633,6 @@ int msm_venc_s_param(struct msm_vidc_inst *inst, goto reset_rate; } } - inst->priority_level = MSM_VIDC_PRIORITY_HIGH; if (is_frame_rate) capability->cap[FRAME_RATE].flags |= CAP_FLAG_CLIENT_SET; @@ -1901,8 +1896,6 @@ int msm_venc_inst_init(struct msm_vidc_inst *inst) inst->buffers.input_meta.actual_count = 0; inst->buffers.input_meta.size = 0; - inst->priority_level = MSM_VIDC_PRIORITY_LOW; - inst->hfi_rc_type = HFI_RC_VBR_CFR; inst->hfi_layer_type = HFI_HIER_P_SLIDING_WINDOW; diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index c5b8728752..1d00e5305e 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -2709,9 +2709,7 @@ int msm_vidc_adjust_lowlatency_mode(void *instance, struct v4l2_ctrl *ctrl) int msm_vidc_adjust_session_priority(void *instance, struct v4l2_ctrl *ctrl) { - int rc = 0; int adjusted_value; - bool rate_by_client; struct msm_vidc_inst_capability *capability; struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; @@ -2723,54 +2721,9 @@ int msm_vidc_adjust_session_priority(void *instance, struct v4l2_ctrl *ctrl) adjusted_value = ctrl ? ctrl->val : capability->cap[PRIORITY].value; - if (capability->cap[FRAME_RATE].flags & CAP_FLAG_CLIENT_SET || - capability->cap[OPERATING_RATE].flags & CAP_FLAG_CLIENT_SET) { - rate_by_client = true; - inst->priority_level = MSM_VIDC_PRIORITY_HIGH; - } else { - rate_by_client = false; - inst->priority_level = MSM_VIDC_PRIORITY_LOW; - } - - /* - * For RT, check for resource feasability. - * For NRT, sessions with rate set by client takes higher order - * among NRT sessions. They are constraint RT or low priority RT. - */ - if (adjusted_value == 0) { - rc = msm_vidc_check_core_mbps(inst); - if (rc) { - i_vpr_e(inst, "%s: unsupported load\n", __func__); - goto exit; - } - rc = capability->cap[FRAME_RATE].value > capability->cap[FRAME_RATE].max; - if (rc) { - i_vpr_e(inst, "%s: unsupported FRAME_RATE %u, max %u\n", __func__, - capability->cap[FRAME_RATE].value >> 16, - capability->cap[FRAME_RATE].max >> 16); - rc = -ENOMEM; - goto exit; - } - rc = capability->cap[OPERATING_RATE].value > capability->cap[OPERATING_RATE].max; - if (rc) { - i_vpr_e(inst, "%s: unsupported OPERATING_RATE %u, max %u\n", __func__, - capability->cap[OPERATING_RATE].value >> 16, - capability->cap[OPERATING_RATE].max >> 16); - rc = -ENOMEM; - goto exit; - } - - rc = msm_vidc_check_core_mbpf(inst); - if (rc) { - i_vpr_e(inst, "%s: unsupported load\n", __func__); - goto exit; - } - } - msm_vidc_update_cap_value(inst, PRIORITY, adjusted_value, __func__); -exit: - return rc; + return 0; } int msm_vidc_adjust_roi_info(void *instance, struct v4l2_ctrl *ctrl) @@ -2805,69 +2758,52 @@ int msm_vidc_adjust_roi_info(void *instance, struct v4l2_ctrl *ctrl) return 0; } -int msm_vidc_adjust_frame_rate(void *instance, struct v4l2_ctrl *ctrl) +int msm_vidc_adjust_dec_frame_rate(void *instance, struct v4l2_ctrl *ctrl) { - int rc = 0; struct msm_vidc_inst_capability *capability; struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - u32 adjusted_value; + u32 adjusted_value = 0; if (!inst || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - capability = inst->capabilities; - adjusted_value = ctrl ? ctrl->val : capability->cap[FRAME_RATE].value; - - if (is_realtime_session(inst)) { - rc = msm_vidc_check_core_mbps(inst); - if (rc) { - i_vpr_e(inst, "%s: unsupported load\n", __func__); - return rc; - } + if (is_encode_session(inst)) { + d_vpr_e("%s: adjust framerate invalid for enc\n", __func__); + return -EINVAL; } - inst->priority_level = MSM_VIDC_PRIORITY_HIGH; - capability->cap[FRAME_RATE].flags |= CAP_FLAG_CLIENT_SET; - + capability = inst->capabilities; + adjusted_value = ctrl ? ctrl->val : capability->cap[FRAME_RATE].value; msm_vidc_update_cap_value(inst, FRAME_RATE, adjusted_value, __func__); return 0; } -int msm_vidc_adjust_operating_rate(void *instance, struct v4l2_ctrl *ctrl) +int msm_vidc_adjust_dec_operating_rate(void *instance, struct v4l2_ctrl *ctrl) { - int rc = 0; struct msm_vidc_inst_capability *capability; struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - u32 adjusted_value; + u32 adjusted_value = 0; if (!inst || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - capability = inst->capabilities; - adjusted_value = ctrl ? ctrl->val : capability->cap[OPERATING_RATE].value; - - if (is_realtime_session(inst)) { - rc = msm_vidc_check_core_mbps(inst); - if (rc) { - i_vpr_e(inst, "%s: unsupported load\n", __func__); - return rc; - } + if (is_encode_session(inst)) { + d_vpr_e("%s: adjust operating rate invalid for enc\n", __func__); + return -EINVAL; } - inst->priority_level = MSM_VIDC_PRIORITY_HIGH; - capability->cap[OPERATING_RATE].flags |= CAP_FLAG_CLIENT_SET; - + capability = inst->capabilities; + adjusted_value = ctrl ? ctrl->val : capability->cap[OPERATING_RATE].value; msm_vidc_update_cap_value(inst, OPERATING_RATE, adjusted_value, __func__); return 0; } - int msm_vidc_prepare_dependency_list(struct msm_vidc_inst *inst) { struct list_head root_list, opt_list; @@ -3795,15 +3731,13 @@ int msm_vidc_set_session_priority(void *instance, return -EINVAL; } - hfi_value = (inst->capabilities->cap[cap_id].value * 2) + inst->priority_level; + hfi_value = inst->capabilities->cap[cap_id].value; rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32, &hfi_value, sizeof(u32), __func__); if (rc) return rc; - inst->firmware_priority = hfi_value; - return rc; } diff --git a/driver/vidc/src/msm_vidc_power.c b/driver/vidc/src/msm_vidc_power.c index 925827398e..aa05b54110 100644 --- a/driver/vidc/src/msm_vidc_power.c +++ b/driver/vidc/src/msm_vidc_power.c @@ -510,17 +510,17 @@ int msm_vidc_scale_power(struct msm_vidc_inst *inst, bool scale_buses) */ timestamp_rate = msm_vidc_get_timestamp_rate(inst); input_rate = msm_vidc_get_input_rate(inst); - if (timestamp_rate > (fps + fps / 8)) { + if (timestamp_rate > (fps + fps / 8)) fps = timestamp_rate; - inst->priority_level = MSM_VIDC_PRIORITY_LOW; - } + if (input_rate > fps) { fps = input_rate; /* - * add 6.25% more fps to increase power to make firmware - * processing little faster than client queuing rate + * add 6.25% more fps for NRT session to increase power to make + * firmware processing little faster than client queuing rate */ - fps = fps + fps / 16; + if (!is_realtime_session(inst)) + fps = fps + fps / 16; } } inst->max_rate = fps; From ff9dde7cc13914b04ff14a846a1e1a1611c87a86 Mon Sep 17 00:00:00 2001 From: Deepa Guthyappa Madivalara Date: Mon, 4 Apr 2022 16:02:17 -0700 Subject: [PATCH 0591/1061] video driver: cleanup input rate list cleanup input rate list Change-Id: I5e64481280f5b1e04aae6439c57c6e1b97ad7395 --- driver/vidc/src/msm_vidc_driver.c | 32 +++++++++++++++++++++++++++++-- 1 file changed, 30 insertions(+), 2 deletions(-) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 423a05145f..1b03bf714b 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -2421,6 +2421,23 @@ int msm_vidc_update_input_rate(struct msm_vidc_inst *inst, u64 time_us) return 0; } +int msm_vidc_flush_input_timer(struct msm_vidc_inst *inst) +{ + struct msm_vidc_input_timer *input_timer, *dummy_timer; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + i_vpr_l(inst, "%s: flush input_timer list\n", __func__); + list_for_each_entry_safe(input_timer, dummy_timer, &inst->input_timer_list, list) { + list_del_init(&input_timer->list); + msm_memory_pool_free(inst, input_timer); + } + return 0; +} + int msm_vidc_get_input_rate(struct msm_vidc_inst *inst) { if (!inst || !inst->capabilities) { @@ -4392,10 +4409,14 @@ int msm_vidc_session_streamoff(struct msm_vidc_inst *inst, if(rc) goto error; - /* discard pending input port settings change if any */ - if (port == INPUT_PORT) + if (port == INPUT_PORT) { + /* discard pending input port settings change if any */ msm_vidc_discard_pending_ipsc(inst); + /* flush input timer list */ + msm_vidc_flush_input_timer(inst); + } + if (port == OUTPUT_PORT) { /* discard pending opsc if any*/ msm_vidc_discard_pending_opsc(inst); @@ -5377,6 +5398,7 @@ void msm_vidc_destroy_buffers(struct msm_vidc_inst *inst) struct msm_vidc_buffer *buf, *dummy; struct msm_vidc_timestamp *ts, *dummy_ts; struct msm_memory_dmabuf *dbuf, *dummy_dbuf; + struct msm_vidc_input_timer *timer, *dummy_timer; struct response_work *work, *dummy_work = NULL; struct msm_vidc_inst_cap_entry *entry, *dummy_entry; struct msm_vidc_fence *fence, *dummy_fence; @@ -5461,6 +5483,12 @@ void msm_vidc_destroy_buffers(struct msm_vidc_inst *inst) msm_memory_pool_free(inst, ts); } + list_for_each_entry_safe(timer, dummy_timer, &inst->input_timer_list, list) { + i_vpr_e(inst, "%s: removing input_timer %lld\n", + __func__, timer->time_us); + msm_memory_pool_free(inst, timer); + } + list_for_each_entry_safe(dbuf, dummy_dbuf, &inst->dmabuf_tracker, list) { i_vpr_e(inst, "%s: removing dma_buf %#x, refcount %u\n", __func__, dbuf->dmabuf, dbuf->refcount); From 2d69ee17ae9b40f5108e33407386f7b58e91d3db Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Thu, 7 Apr 2022 14:44:40 -0700 Subject: [PATCH 0592/1061] video: driver: remove support of s_parm/g_parm for decoder remove support of s_parm/g_parm for decoder Change-Id: I5b35b33610eb96bbfc26181c8c249316ee65b31b --- .../platform/common/src/msm_vidc_platform.c | 2 - driver/vidc/inc/msm_vdec.h | 4 - driver/vidc/src/msm_vdec.c | 94 ------------------- driver/vidc/src/msm_vidc.c | 18 ++-- 4 files changed, 12 insertions(+), 106 deletions(-) diff --git a/driver/platform/common/src/msm_vidc_platform.c b/driver/platform/common/src/msm_vidc_platform.c index f59a2c4830..651f1aaa61 100644 --- a/driver/platform/common/src/msm_vidc_platform.c +++ b/driver/platform/common/src/msm_vidc_platform.c @@ -128,8 +128,6 @@ static struct v4l2_ioctl_ops msm_v4l2_ioctl_ops_dec = { .vidioc_g_fmt_meta_cap = msm_v4l2_g_fmt, .vidioc_g_selection = msm_v4l2_g_selection, .vidioc_s_selection = msm_v4l2_s_selection, - .vidioc_s_parm = msm_v4l2_s_parm, - .vidioc_g_parm = msm_v4l2_g_parm, .vidioc_reqbufs = msm_v4l2_reqbufs, .vidioc_querybuf = msm_v4l2_querybuf, .vidioc_create_bufs = msm_v4l2_create_bufs, diff --git a/driver/vidc/inc/msm_vdec.h b/driver/vidc/inc/msm_vdec.h index 38983b09b9..17f2c9c64b 100644 --- a/driver/vidc/inc/msm_vdec.h +++ b/driver/vidc/inc/msm_vdec.h @@ -19,10 +19,6 @@ int msm_vdec_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f); int msm_vdec_g_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f); int msm_vdec_s_selection(struct msm_vidc_inst* inst, struct v4l2_selection* s); int msm_vdec_g_selection(struct msm_vidc_inst* inst, struct v4l2_selection* s); -int msm_vdec_s_param(struct msm_vidc_inst *inst, - struct v4l2_streamparm *s_parm); -int msm_vdec_g_param(struct msm_vidc_inst *inst, - struct v4l2_streamparm *s_parm); int msm_vdec_subscribe_event(struct msm_vidc_inst *inst, const struct v4l2_event_subscription *sub); int msm_vdec_enum_fmt(struct msm_vidc_inst *inst, struct v4l2_fmtdesc *f); diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 78449ceac9..0a2e88a48d 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -2508,100 +2508,6 @@ int msm_vdec_g_selection(struct msm_vidc_inst* inst, struct v4l2_selection* s) return 0; } -int msm_vdec_s_param(struct msm_vidc_inst *inst, - struct v4l2_streamparm *s_parm) -{ - int rc = 0; - struct msm_vidc_inst_capability *capability = NULL; - struct v4l2_fract *timeperframe = NULL; - u32 q16_rate, max_rate, default_rate; - u64 us_per_frame = 0, input_rate = 0; - bool is_frame_rate = false; - - if (!inst || !s_parm) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - capability = inst->capabilities; - - if (s_parm->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) { - timeperframe = &s_parm->parm.output.timeperframe; - max_rate = capability->cap[FRAME_RATE].max >> 16; - default_rate = capability->cap[FRAME_RATE].value >> 16; - is_frame_rate = true; - } else { - timeperframe = &s_parm->parm.capture.timeperframe; - max_rate = capability->cap[OPERATING_RATE].max >> 16; - default_rate = capability->cap[OPERATING_RATE].value >> 16; - } - - if (!timeperframe->denominator || !timeperframe->numerator) { - i_vpr_e(inst, "%s: type %s, invalid rate\n", __func__, - v4l2_type_name(s_parm->type)); - input_rate = default_rate; - goto set_default; - } - - us_per_frame = timeperframe->numerator * (u64)USEC_PER_SEC; - do_div(us_per_frame, timeperframe->denominator); - - if (!us_per_frame) { - i_vpr_e(inst, "%s: us_per_frame is zero\n", __func__); - rc = -EINVAL; - goto exit; - } - - input_rate = (u64)USEC_PER_SEC; - do_div(input_rate, us_per_frame); - -set_default: - i_vpr_h(inst, "%s: type %s, %s value %llu\n", - __func__, v4l2_type_name(s_parm->type), - is_frame_rate ? "frame rate" : "operating rate", input_rate); - - q16_rate = (u32)input_rate << 16; - msm_vidc_update_cap_value(inst, is_frame_rate ? FRAME_RATE : OPERATING_RATE, - q16_rate, __func__); - - if (is_frame_rate) - capability->cap[FRAME_RATE].flags |= CAP_FLAG_CLIENT_SET; - else - capability->cap[OPERATING_RATE].flags |= CAP_FLAG_CLIENT_SET; - -exit: - return rc; -} - -int msm_vdec_g_param(struct msm_vidc_inst *inst, - struct v4l2_streamparm *s_parm) -{ - struct msm_vidc_inst_capability *capability = NULL; - struct v4l2_fract *timeperframe = NULL; - - if (!inst || !s_parm) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - capability = inst->capabilities; - - if (s_parm->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) { - timeperframe = &s_parm->parm.output.timeperframe; - timeperframe->numerator = 1; - timeperframe->denominator = - capability->cap[FRAME_RATE].value >> 16; - } else { - timeperframe = &s_parm->parm.capture.timeperframe; - timeperframe->numerator = 1; - timeperframe->denominator = - capability->cap[OPERATING_RATE].value >> 16; - } - - i_vpr_h(inst, "%s: type %u, num %u denom %u\n", - __func__, s_parm->type, timeperframe->numerator, - timeperframe->denominator); - return 0; -} - int msm_vdec_subscribe_event(struct msm_vidc_inst *inst, const struct v4l2_event_subscription *sub) { diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index b0023ffa7a..262515f4d1 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -350,10 +350,13 @@ int msm_vidc_s_param(void *instance, struct v4l2_streamparm *param) param->type != V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) return -EINVAL; - if (is_decode_session(inst)) - rc = msm_vdec_s_param(instance, param); - else if (is_encode_session(inst)) + if (is_encode_session(inst)) { rc = msm_venc_s_param(instance, param); + } else { + i_vpr_e(inst, "%s: invalid domain %#x\n", + __func__, inst->domain); + return -EINVAL; + } return rc; } @@ -373,10 +376,13 @@ int msm_vidc_g_param(void *instance, struct v4l2_streamparm *param) param->type != V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) return -EINVAL; - if (is_decode_session(inst)) - rc = msm_vdec_g_param(instance, param); - else if (is_encode_session(inst)) + if (is_encode_session(inst)) { rc = msm_venc_g_param(instance, param); + } else { + i_vpr_e(inst, "%s: invalid domain %#x\n", + __func__, inst->domain); + return -EINVAL; + } return rc; } From cbeeaa8c643204977f6bc0ed8b6acda7039eb6a3 Mon Sep 17 00:00:00 2001 From: Deepa Guthyappa Madivalara Date: Fri, 8 Apr 2022 10:15:31 -0700 Subject: [PATCH 0593/1061] video: driver: Error handling for HW overload - send '-ENOMEM' after max mbps is reached Change-Id: I6d597021046ea375f2131c2e40ac07d1aebdd9b8 Signed-off-by: Deepa Guthyappa Madivalara --- driver/vidc/src/msm_vidc_driver.c | 11 ++--------- 1 file changed, 2 insertions(+), 9 deletions(-) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 1b03bf714b..ce4a7caeff 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -5877,10 +5877,9 @@ static int msm_vidc_print_insts_info(struct msm_vidc_core *core) int msm_vidc_check_core_mbps(struct msm_vidc_inst *inst) { - u32 mbps = 0, num_inactive_sessions = 0; + u32 mbps = 0; struct msm_vidc_core *core; struct msm_vidc_inst *instance; - u64 curr_time_ns; int rc = 0; if (!inst || !inst->core || !inst->capabilities) { @@ -5894,18 +5893,12 @@ int msm_vidc_check_core_mbps(struct msm_vidc_inst *inst) return 0; } - curr_time_ns = ktime_get_ns(); - core_lock(core, __func__); list_for_each_entry(instance, &core->instances, list) { /* ignore invalid/error session */ if (is_session_error(instance)) continue; - if (!is_active_session(instance->last_qbuf_time_ns, curr_time_ns)) { - num_inactive_sessions++; - } - /* ignore thumbnail, image, and non realtime sessions */ if (is_thumbnail_session(instance) || is_image_session(instance) || @@ -5917,7 +5910,7 @@ int msm_vidc_check_core_mbps(struct msm_vidc_inst *inst) core_unlock(core, __func__); if (mbps > core->capabilities[MAX_MBPS].value) { - rc = num_inactive_sessions ? -ENOMEM : -EAGAIN; + rc = -ENOMEM; i_vpr_e(inst, "%s: Hardware overloaded. needed %u, max %u", __func__, mbps, core->capabilities[MAX_MBPS].value); return rc; From 508f4a02820325f5269fb6e487458475c028185b Mon Sep 17 00:00:00 2001 From: Mahesh Kumar Sharma Date: Thu, 31 Mar 2022 18:41:44 -0700 Subject: [PATCH 0594/1061] video: driver: inline preprocessing improvement For VPSS, FW requests more bandwidth from HW. In order to support inline processing, FW introduced request preprcess property. Enble this property only when following conditions are met: - CAC-BRS is required - don't have EVA stats. - Upto 4k@60 fps, max( frame rate, operating rate) <= 60 Change-Id: I3cf83483d9320e5dfe20617b37a54b9d5fbcffd8 Signed-off-by: Mahesh Kumar Sharma --- driver/platform/kalama/src/msm_vidc_kalama.c | 17 ++++- driver/platform/waipio/src/msm_vidc_waipio.c | 8 +++ driver/vidc/inc/hfi_property.h | 2 + driver/vidc/inc/msm_vidc_control.h | 5 +- driver/vidc/inc/msm_vidc_internal.h | 6 ++ driver/vidc/src/msm_vidc_control.c | 69 ++++++++++++++++++++ driver/vidc/src/msm_vidc_driver.c | 1 + 7 files changed, 105 insertions(+), 3 deletions(-) diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index 9ca59b5915..c1c536c36d 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -687,10 +687,23 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { HFI_PROP_CONTENT_ADAPTIVE_CODING, CAP_FLAG_OUTPUT_PORT, {BITRATE_MODE, LAYER_ENABLE, LAYER_TYPE}, - {0}, + {REQUEST_PREPROCESS}, msm_vidc_adjust_brs, msm_vidc_set_vbr_related_properties}, + {REQUEST_PREPROCESS, ENC, H264|HEVC, + MSM_VIDC_PREPROCESS_NONE, + MSM_VIDC_PREPROCESS_TYPE0, + BIT(MSM_VIDC_PREPROCESS_NONE) | + BIT(MSM_VIDC_PREPROCESS_TYPE0), + MSM_VIDC_PREPROCESS_NONE, + 0, HFI_PROP_REQUEST_PREPROCESS, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + {CONTENT_ADAPTIVE_CODING, META_EVA_STATS}, + {0}, + msm_vidc_adjust_preprocess, + msm_vidc_set_preprocess}, + {BITRATE_BOOST, ENC, H264|HEVC, 0, MAX_BITRATE_BOOST, 25, MAX_BITRATE_BOOST, V4L2_CID_MPEG_VIDC_QUALITY_BITRATE_BOOST, @@ -1824,7 +1837,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { HFI_PROP_EVA_STAT_INFO, CAP_FLAG_BITMASK, {0}, - {ENH_LAYER_COUNT}}, + {ENH_LAYER_COUNT, REQUEST_PREPROCESS}}, {META_BUF_TAG, ENC, CODECS_ALL, V4L2_MPEG_VIDC_META_DISABLE, diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 15586c3b34..cd8af33023 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -643,6 +643,14 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { msm_vidc_adjust_brs, msm_vidc_set_vbr_related_properties}, + {REQUEST_PREPROCESS, ENC, H264|HEVC, + MSM_VIDC_PREPROCESS_NONE, + MSM_VIDC_PREPROCESS_NONE, + BIT(MSM_VIDC_PREPROCESS_NONE), + MSM_VIDC_PREPROCESS_NONE, + 0, HFI_PROP_REQUEST_PREPROCESS, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + {BITRATE_BOOST, ENC, H264|HEVC, 0, MAX_BITRATE_BOOST, 25, MAX_BITRATE_BOOST, V4L2_CID_MPEG_VIDC_QUALITY_BITRATE_BOOST, diff --git a/driver/vidc/inc/hfi_property.h b/driver/vidc/inc/hfi_property.h index c46b7354bf..49fd1f2225 100644 --- a/driver/vidc/inc/hfi_property.h +++ b/driver/vidc/inc/hfi_property.h @@ -553,6 +553,8 @@ enum hfi_saliency_type { #define HFI_PROP_FENCE 0x0300018B +#define HFI_PROP_REQUEST_PREPROCESS 0x0300018E + #define HFI_PROP_END 0x03FFFFFF #define HFI_SESSION_ERROR_BEGIN 0x04000000 diff --git a/driver/vidc/inc/msm_vidc_control.h b/driver/vidc/inc/msm_vidc_control.h index 25fc8098a5..8ff65837b5 100644 --- a/driver/vidc/inc/msm_vidc_control.h +++ b/driver/vidc/inc/msm_vidc_control.h @@ -54,6 +54,7 @@ int msm_vidc_adjust_roi_info(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_all_intra(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_dec_frame_rate(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_dec_operating_rate(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_preprocess(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_set_header_mode(void *instance, enum msm_vidc_inst_capability_type cap_id); @@ -113,7 +114,9 @@ int msm_vidc_set_ir_period(void *instance, enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_level(void *instance, enum msm_vidc_inst_capability_type cap_id); -int msm_vidc_set_s32(void *instance, +int msm_vidc_set_preprocess(void *instance, + enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_u32_enum(void *instance, enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_q16(void *instance, enum msm_vidc_inst_capability_type cap_id); diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 3bea975c7a..0a39b7b34b 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -290,6 +290,11 @@ enum msm_vidc_matrix_coefficients { MSM_VIDC_MATRIX_COEFF_BT2100 = 14, }; +enum msm_vidc_preprocess_type { + MSM_VIDC_PREPROCESS_NONE = BIT(0), + MSM_VIDC_PREPROCESS_TYPE0 = BIT(1), +}; + enum msm_vidc_core_capability_type { CORE_CAP_NONE = 0, ENC_CODECS, @@ -492,6 +497,7 @@ enum msm_vidc_inst_capability_type { MIN_QUALITY, CONTENT_ADAPTIVE_CODING, BLUR_TYPES, + REQUEST_PREPROCESS, /* place all intermittent(having both parent and child) enums before this line */ MIN_FRAME_QP, diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 1d00e5305e..1b1971a1b1 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -2677,6 +2677,54 @@ update_and_exit: return 0; } +int msm_vidc_adjust_preprocess(void *instance, struct v4l2_ctrl *ctrl) +{ + s32 adjusted_value; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + s32 brs = -1, eva_status = -1; + u32 width, height, frame_rate, operating_rate, max_fps; + struct v4l2_format *f; + + if (!inst || !inst->capabilities || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + adjusted_value = inst->capabilities->cap[REQUEST_PREPROCESS].value; + + if (msm_vidc_get_parent_value(inst, REQUEST_PREPROCESS, CONTENT_ADAPTIVE_CODING, + &brs, __func__) || + msm_vidc_get_parent_value(inst, REQUEST_PREPROCESS, META_EVA_STATS, + &eva_status, __func__)) + return -EINVAL; + + width = inst->crop.width; + height = inst->crop.height; + frame_rate = msm_vidc_get_frame_rate(inst);; + operating_rate = msm_vidc_get_operating_rate(inst);; + + max_fps = max(frame_rate, operating_rate); + f= &inst->fmts[OUTPUT_PORT]; + + /* + * enable preprocess if + * client did not enable EVA metadata statistics and + * BRS enabled and upto 4k @ 60 fps + */ + if (!is_meta_tx_inp_enabled(inst, META_EVA_STATS) && + brs == V4L2_MPEG_MSM_VIDC_ENABLE && + res_is_less_than_or_equal_to(width, height, 3840, 2160) && + max_fps <= 60) + adjusted_value = 1; + else + adjusted_value = 0; + + msm_vidc_update_cap_value(inst, REQUEST_PREPROCESS, + adjusted_value, __func__); + + return 0; +} + int msm_vidc_adjust_lowlatency_mode(void *instance, struct v4l2_ctrl *ctrl) { struct msm_vidc_inst_capability *capability; @@ -3779,6 +3827,27 @@ int msm_vidc_set_flip(void *instance, return rc; } +int msm_vidc_set_preprocess(void *instance, + enum msm_vidc_inst_capability_type cap_id) +{ + int rc = 0; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; + u32 hfi_value; + + d_vpr_e("%s: \n", __func__); + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32_ENUM, + &hfi_value, sizeof(u32), __func__); + if (rc) + return rc; + + return rc; +} + int msm_vidc_set_rotation(void *instance, enum msm_vidc_inst_capability_type cap_id) { diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 1b03bf714b..574c2d1b46 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -194,6 +194,7 @@ static const struct msm_vidc_cap_name cap_name_arr[] = { {MIN_QUALITY, "MIN_QUALITY" }, {CONTENT_ADAPTIVE_CODING, "CONTENT_ADAPTIVE_CODING" }, {BLUR_TYPES, "BLUR_TYPES" }, + {REQUEST_PREPROCESS, "REQUEST_PREPROCESS" }, {MIN_FRAME_QP, "MIN_FRAME_QP" }, {MAX_FRAME_QP, "MAX_FRAME_QP" }, {I_FRAME_QP, "I_FRAME_QP" }, From ae362a4130b502022257ff8600c3d328eef8024c Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Fri, 8 Apr 2022 16:41:50 -0700 Subject: [PATCH 0595/1061] video: driver: Set 1 stage for Byte based Slice mode Set 1 stage for Byte based Slice mode. Change-Id: I9924535234e202e83d6f33b03ebc7de578e7aa48 Signed-off-by: Akshata Sahukar --- driver/platform/kalama/src/msm_vidc_kalama.c | 5 +++-- driver/variant/iris3/src/msm_vidc_iris3.c | 4 ++++ driver/vidc/inc/msm_vidc_internal.h | 2 +- driver/vidc/src/msm_vidc_driver.c | 2 +- 4 files changed, 9 insertions(+), 4 deletions(-) diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index c1c536c36d..9809a2f297 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -1412,7 +1412,8 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE, 0, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {BITRATE_MODE, ALL_INTRA}, {0}, + {BITRATE_MODE, ALL_INTRA}, + {STAGE}, msm_vidc_adjust_slice_count, msm_vidc_set_slice_count}, {SLICE_MAX_BYTES, ENC, H264|HEVC|HEIC, @@ -1553,7 +1554,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { 0, HFI_PROP_STAGE, CAP_FLAG_NONE, - {LOWLATENCY_MODE}, {0}, + {LOWLATENCY_MODE, SLICE_MODE}, {0}, NULL, msm_vidc_set_stage}, {PIPE, DEC|ENC, CODECS_ALL, diff --git a/driver/variant/iris3/src/msm_vidc_iris3.c b/driver/variant/iris3/src/msm_vidc_iris3.c index d7997b9dec..457a32b990 100644 --- a/driver/variant/iris3/src/msm_vidc_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_iris3.c @@ -1029,6 +1029,10 @@ int msm_vidc_decide_work_mode_iris3(struct msm_vidc_inst* inst) (inst->capabilities->cap[LOWLATENCY_MODE].value)) { work_mode = MSM_VIDC_STAGE_1; } + if (inst->capabilities->cap[SLICE_MODE].value == + V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_BYTES) { + work_mode = MSM_VIDC_STAGE_1; + } if (inst->capabilities->cap[LOSSLESS].value) work_mode = MSM_VIDC_STAGE_2; diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 0a39b7b34b..024997b957 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -498,6 +498,7 @@ enum msm_vidc_inst_capability_type { CONTENT_ADAPTIVE_CODING, BLUR_TYPES, REQUEST_PREPROCESS, + SLICE_MODE, /* place all intermittent(having both parent and child) enums before this line */ MIN_FRAME_QP, @@ -515,7 +516,6 @@ enum msm_vidc_inst_capability_type { LTR_COUNT, IR_PERIOD, BITRATE_BOOST, - SLICE_MODE, BLUR_RESOLUTION, OUTPUT_ORDER, INPUT_BUF_HOST_MAX_COUNT, diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 574c2d1b46..52bca19420 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -195,6 +195,7 @@ static const struct msm_vidc_cap_name cap_name_arr[] = { {CONTENT_ADAPTIVE_CODING, "CONTENT_ADAPTIVE_CODING" }, {BLUR_TYPES, "BLUR_TYPES" }, {REQUEST_PREPROCESS, "REQUEST_PREPROCESS" }, + {SLICE_MODE, "SLICE_MODE" }, {MIN_FRAME_QP, "MIN_FRAME_QP" }, {MAX_FRAME_QP, "MAX_FRAME_QP" }, {I_FRAME_QP, "I_FRAME_QP" }, @@ -210,7 +211,6 @@ static const struct msm_vidc_cap_name cap_name_arr[] = { {LTR_COUNT, "LTR_COUNT" }, {IR_PERIOD, "IR_PERIOD" }, {BITRATE_BOOST, "BITRATE_BOOST" }, - {SLICE_MODE, "SLICE_MODE" }, {BLUR_RESOLUTION, "BLUR_RESOLUTION" }, {OUTPUT_ORDER, "OUTPUT_ORDER" }, {INPUT_BUF_HOST_MAX_COUNT, "INPUT_BUF_HOST_MAX_COUNT" }, From a820f65654de50952abf91b6f8970c3e82a13a50 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Wed, 6 Apr 2022 11:58:55 +0530 Subject: [PATCH 0596/1061] video: driver: fix corner cases in caps_list preparation during opt_list iteration, eligible node gets added into root_list but if incase that node is having children then child nodes were not getting added into opt_list. So added change to address this corner case. Change-Id: Ie402a9d57b5b00cb94ef30e2345c8c4580fc8f69 Signed-off-by: Govindaraj Rajagopal --- driver/platform/kalama/src/msm_vidc_kalama.c | 4 +- driver/platform/waipio/src/msm_vidc_waipio.c | 4 +- driver/vidc/src/msm_vidc_control.c | 58 +++++++++++++++++--- 3 files changed, 54 insertions(+), 12 deletions(-) diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index 9809a2f297..88b4af8027 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -563,7 +563,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { {BLUR_RESOLUTION}, msm_vidc_adjust_blur_type, msm_vidc_set_u32_enum}, - {BLUR_RESOLUTION, ENC, CODECS_ALL, + {BLUR_RESOLUTION, ENC, H264|HEVC, 0, S32_MAX, 1, 0, V4L2_CID_MPEG_VIDC_VIDEO_BLUR_RESOLUTION, HFI_PROP_BLUR_RESOLUTION, @@ -1402,7 +1402,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { -6, 6, 1, 0, V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2}, - {SLICE_MODE, ENC, H264|HEVC|HEIC, + {SLICE_MODE, ENC, H264|HEVC, V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_BYTES, BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE) | diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index cd8af33023..5f7f01d48a 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -516,7 +516,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {BLUR_RESOLUTION}, msm_vidc_adjust_blur_type_iris2, msm_vidc_set_u32_enum}, - {BLUR_RESOLUTION, ENC, CODECS_ALL, + {BLUR_RESOLUTION, ENC, H264|HEVC, 0, S32_MAX, 1, 0, V4L2_CID_MPEG_VIDC_VIDEO_BLUR_RESOLUTION, HFI_PROP_BLUR_RESOLUTION, @@ -1289,7 +1289,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { -6, 6, 1, 0, V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2}, - {SLICE_MODE, ENC, H264|HEVC|HEIC, + {SLICE_MODE, ENC, H264|HEVC, V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_BYTES, BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE) | diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 1b1971a1b1..c0458803ef 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -275,6 +275,45 @@ static int add_node( return 0; } +static int swap_node(struct msm_vidc_inst_cap *rcap, + struct list_head *src_list, bool src_lookup[INST_CAP_MAX], + struct list_head *dest_list, bool dest_lookup[INST_CAP_MAX]) +{ + struct msm_vidc_inst_cap_entry *entry, *temp; + bool found = false; + + /* cap must be available in src and not present in dest */ + if (!src_lookup[rcap->cap_id] || dest_lookup[rcap->cap_id]) { + d_vpr_e("%s: not found in src or already found in dest for cap %s\n", + __func__, cap_name(rcap->cap_id)); + return -EINVAL; + } + + /* check if entry present in src_list */ + list_for_each_entry_safe(entry, temp, src_list, list) { + if (entry->cap_id == rcap->cap_id) { + found = true; + break; + } + } + + if (!found) { + d_vpr_e("%s: cap %s not found in src list\n", + __func__, cap_name(rcap->cap_id)); + return -EINVAL; + } + + /* remove from src_list */ + list_del_init(&entry->list); + src_lookup[rcap->cap_id] = false; + + /* add it to dest_list */ + list_add_tail(&entry->list, dest_list); + dest_lookup[rcap->cap_id] = true; + + return 0; +} + static int msm_vidc_packetize_control(struct msm_vidc_inst *inst, enum msm_vidc_inst_capability_type cap_id, u32 payload_type, void *hfi_val, u32 payload_size, const char *func) @@ -2899,6 +2938,10 @@ int msm_vidc_prepare_dependency_list(struct msm_vidc_inst *inst) rc = add_node(&root_list, rcap, root_visited); if (rc) goto error; + } else { + rc = add_node(&opt_list, rcap, opt_visited); + if (rc) + goto error; } } @@ -2921,22 +2964,19 @@ int msm_vidc_prepare_dependency_list(struct msm_vidc_inst *inst) continue; /** - * if child node is already part of root or optional list + * if child node is already part of root list * then no need to add it again. */ - if (root_visited[cap->cap_id] || opt_visited[cap->cap_id]) + if (root_visited[cap->cap_id]) continue; /** * if child node's all parents are already present in root list - * then add it to root list else add it to optional list. + * then add it to root list else remains in optional list. */ if (is_all_parents_visited(cap, root_visited)) { - rc = add_node(&root_list, cap, root_visited); - if (rc) - goto error; - } else { - rc = add_node(&opt_list, cap, opt_visited); + rc = swap_node(cap, + &opt_list, opt_visited, &root_list, root_visited); if (rc) goto error; } @@ -2955,6 +2995,7 @@ int msm_vidc_prepare_dependency_list(struct msm_vidc_inst *inst) list_for_each_entry_safe(entry, temp, &opt_list, list) { /* initially remove entry from opt list */ list_del_init(&entry->list); + opt_visited[entry->cap_id] = false; tmp_count--; cap = &capability->cap[entry->cap_id]; @@ -2968,6 +3009,7 @@ int msm_vidc_prepare_dependency_list(struct msm_vidc_inst *inst) tmp_count_total--; } else { list_add_tail(&entry->list, &opt_list); + opt_visited[entry->cap_id] = true; } /* detect loop */ From 0602d95bd99d441e4454f4a8490fc091fea4d4be Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Fri, 8 Apr 2022 15:54:21 -0700 Subject: [PATCH 0597/1061] video: driver: createbufs and controls v4l2-compliance fixes when create_bufs ioctl is called for meta port, v4l2 framework calls queue_setup with num_planes as 1. fixed the num_planes condition by updating it for only input and output ports. removed a condition to check if client has set unsupported bits for metadata controls. Change-Id: I0faf2cfc2827af7d3992bda63a04d4203f13c9e1 Signed-off-by: Darshana Patil --- driver/vidc/src/msm_vidc_control.c | 11 ----------- driver/vidc/src/msm_vidc_vb2.c | 4 ++-- 2 files changed, 2 insertions(+), 13 deletions(-) diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index c0458803ef..d0c27f0f39 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -859,9 +859,7 @@ int msm_vidc_ctrl_init(struct msm_vidc_inst *inst) ctrl_cfg.type = V4L2_CTRL_TYPE_BITMASK; else ctrl_cfg.type = V4L2_CTRL_TYPE_INTEGER; - /* allow all metadata modes from v4l2 side */ if (is_meta_cap(idx)) { - ctrl_cfg.max = V4L2_MPEG_VIDC_META_MAX - 1; /* bitmask is expected to be enabled for meta controls */ if (ctrl_cfg.type != V4L2_CTRL_TYPE_BITMASK) { i_vpr_e(inst, @@ -1117,15 +1115,6 @@ static int msm_vidc_update_static_property(struct msm_vidc_inst *inst, msm_vidc_update_cap_value(inst, LAYER_ENABLE, enable, __func__); } if (is_meta_cap(cap_id)) { - /* validate metadata control value against allowed settings */ - if ((ctrl->val & inst->capabilities->cap[cap_id].max) != ctrl->val) { - i_vpr_e(inst, - "%s: allowed bits for cap %s is %#x, client set %#x\n", - __func__, cap_name(cap_id), - inst->capabilities->cap[cap_id].max, - ctrl->val); - return -EINVAL; - } rc = msm_vidc_update_meta_port_settings(inst); if (rc) return rc; diff --git a/driver/vidc/src/msm_vidc_vb2.c b/driver/vidc/src/msm_vidc_vb2.c index ff75dfad71..52cbcab52f 100644 --- a/driver/vidc/src/msm_vidc_vb2.c +++ b/driver/vidc/src/msm_vidc_vb2.c @@ -121,10 +121,10 @@ int msm_vidc_queue_setup(struct vb2_queue *q, if (port < 0) return -EINVAL; - if (*num_planes) { + if (*num_planes && (port == INPUT_PORT || port == OUTPUT_PORT)) { f = &inst->fmts[port]; if (*num_planes != f->fmt.pix_mp.num_planes) { - i_vpr_i(inst, "%s: requested num_planes %d not supported\n", + i_vpr_e(inst, "%s: requested num_planes %d not supported %d\n", __func__, *num_planes, f->fmt.pix_mp.num_planes); return -EINVAL; } From f47f897e4a8c9d12b3891bcaf684d1cee974cad2 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Fri, 25 Mar 2022 10:29:45 +0530 Subject: [PATCH 0598/1061] video: driver: split platform database entries into 2 parts Divided database entries into 2 parts [1] struct msm_platform_inst_capability -> it tracks cap_id, domain, codec, min, max, step, default, v4l2_id, hfi_id, flags. [2] struct msm_platform_inst_cap_dependency -> this will track cap_id, domain, codec, parents, childrens, adjust and set callbacks. It will help to reduce number of database entries. Change-Id: I692968b0f6804b45371e8cf4af6407e57df54bb9 Signed-off-by: Govindaraj Rajagopal --- .../platform/common/inc/msm_vidc_platform.h | 12 +- driver/platform/kalama/src/msm_vidc_kalama.c | 1682 ++++++++++------- driver/platform/waipio/src/msm_vidc_waipio.c | 1577 +++++++++------- driver/vidc/src/msm_vidc_driver.c | 103 +- 4 files changed, 1958 insertions(+), 1416 deletions(-) diff --git a/driver/platform/common/inc/msm_vidc_platform.h b/driver/platform/common/inc/msm_vidc_platform.h index 7ff277c52f..b94fc757f9 100644 --- a/driver/platform/common/inc/msm_vidc_platform.h +++ b/driver/platform/common/inc/msm_vidc_platform.h @@ -57,6 +57,12 @@ struct msm_platform_inst_capability { u32 v4l2_id; u32 hfi_id; enum msm_vidc_inst_capability_flags flags; +}; + +struct msm_platform_inst_cap_dependency { + enum msm_vidc_inst_capability_type cap_id; + enum msm_vidc_domain_type domain; + enum msm_vidc_codec_type codec; enum msm_vidc_inst_capability_type parents[MAX_CAP_PARENTS]; enum msm_vidc_inst_capability_type children[MAX_CAP_CHILDREN]; int (*adjust)(void *inst, @@ -92,8 +98,10 @@ struct msm_vidc_ubwc_config_data { struct msm_vidc_platform_data { struct msm_platform_core_capability *core_data; u32 core_data_size; - struct msm_platform_inst_capability *instance_data; - u32 instance_data_size; + struct msm_platform_inst_capability *inst_cap_data; + u32 inst_cap_data_size; + struct msm_platform_inst_cap_dependency *inst_cap_dependency_data; + u32 inst_cap_dependency_data_size; struct msm_vidc_csc_coeff csc_data; struct msm_vidc_ubwc_config_data *ubwc_config; struct msm_vidc_efuse_data *efuse_data; diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index 88b4af8027..62c201ca58 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -97,95 +97,74 @@ static struct msm_platform_core_capability core_data_kalama[] = { {MMRM, 1}, }; -static struct msm_platform_inst_capability instance_data_kalama[] = { +static struct msm_platform_inst_capability instance_cap_data_kalama[] = { /* {cap, domain, codec, * min, max, step_or_mask, value, * v4l2_id, * hfi_id, - * flags, - * parents, - * children, - * adjust, set} + * flags} */ {FRAME_WIDTH, DEC, CODECS_ALL, 96, 8192, 1, 1920}, + {FRAME_WIDTH, DEC, VP9, 96, 4096, 1, 1920}, + {FRAME_WIDTH, ENC, CODECS_ALL, 128, 8192, 1, 1920}, + {FRAME_WIDTH, ENC, HEVC, 96, 8192, 1, 1920}, + + {FRAME_WIDTH, ENC, HEIC, 128, 16384, 1, 16384}, + {LOSSLESS_FRAME_WIDTH, ENC, CODECS_ALL, 128, 4096, 1, 1920}, + {LOSSLESS_FRAME_WIDTH, ENC, HEVC, 96, 4096, 1, 1920}, + {SECURE_FRAME_WIDTH, DEC, CODECS_ALL, 96, 4096, 1, 1920}, + {SECURE_FRAME_WIDTH, ENC, CODECS_ALL, 128, 4096, 1, 1920}, + {SECURE_FRAME_WIDTH, ENC, HEVC, 96, 4096, 1, 1920}, + {FRAME_HEIGHT, DEC, CODECS_ALL, 96, 8192, 1, 1080}, + {FRAME_HEIGHT, DEC, VP9, 96, 4096, 1, 1080}, + {FRAME_HEIGHT, ENC, CODECS_ALL, 128, 8192, 1, 1080}, + {FRAME_HEIGHT, ENC, HEVC, 96, 8192, 1, 1080}, + + {FRAME_HEIGHT, ENC, HEIC, 128, 16384, 1, 16384}, + {LOSSLESS_FRAME_HEIGHT, ENC, CODECS_ALL, 128, 4096, 1, 1080}, + {LOSSLESS_FRAME_HEIGHT, ENC, HEVC, 96, 4096, 1, 1080}, + {SECURE_FRAME_HEIGHT, DEC, CODECS_ALL, 96, 4096, 1, 1080}, + {SECURE_FRAME_HEIGHT, ENC, CODECS_ALL, 128, 4096, 1, 1080}, + {SECURE_FRAME_HEIGHT, ENC, HEVC, 96, 4096, 1, 1080}, - {PIX_FMTS, ENC, H264, - MSM_VIDC_FMT_NV12, - MSM_VIDC_FMT_NV12C, - MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C, - /* Since CTSEncodeDecode test cannot handle BT 709LR, - * disabled HW RGBA encoding. - * | MSM_VIDC_FMT_RGBA8888 | MSM_VIDC_FMT_RGBA8888C, - */ - MSM_VIDC_FMT_NV12C, - 0, 0, - 0, - {0}, - {META_ROI_INFO, IR_PERIOD}}, - {PIX_FMTS, ENC, HEVC, - MSM_VIDC_FMT_NV12, - MSM_VIDC_FMT_TP10C, - MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C | - MSM_VIDC_FMT_P010 | MSM_VIDC_FMT_TP10C, - /* Since CTSEncodeDecode test cannot handle BT 709LR, - * disabled HW RGBA encoding. - * | MSM_VIDC_FMT_RGBA8888 | MSM_VIDC_FMT_RGBA8888C, - */ - MSM_VIDC_FMT_NV12C, - 0, 0, - 0, - {0}, - {/* Do not change order of META_ROI_INFO, MIN_QUALITY, BLUR_TYPES - * Since parent -> children relationship for these cap_ids is - * as follows: - * META_ROI_INFO -> MIN_QUALITY -> BLUR_TYPES - */ - PROFILE, MIN_FRAME_QP, MAX_FRAME_QP, I_FRAME_QP, P_FRAME_QP, - B_FRAME_QP, META_ROI_INFO, MIN_QUALITY, BLUR_TYPES, - IR_PERIOD}}, - {PIX_FMTS, DEC, HEVC|HEIC, - MSM_VIDC_FMT_NV12, - MSM_VIDC_FMT_TP10C, - MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C | - MSM_VIDC_FMT_P010 | MSM_VIDC_FMT_TP10C, - MSM_VIDC_FMT_NV12C, - 0, 0, - 0, - {0}, - {PROFILE}}, - - {PIX_FMTS, DEC, H264, + {PIX_FMTS, ENC|DEC, H264, MSM_VIDC_FMT_NV12, MSM_VIDC_FMT_NV12C, MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C, MSM_VIDC_FMT_NV12C}, - {PIX_FMTS, DEC, VP9, + {PIX_FMTS, ENC|DEC, HEVC|VP9|AV1, MSM_VIDC_FMT_NV12, MSM_VIDC_FMT_TP10C, MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C | MSM_VIDC_FMT_P010 | MSM_VIDC_FMT_TP10C, MSM_VIDC_FMT_NV12C}, - {PIX_FMTS, DEC, AV1, + {PIX_FMTS, ENC, HEIC, + MSM_VIDC_FMT_NV12, + MSM_VIDC_FMT_P010, + MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_P010, + MSM_VIDC_FMT_NV12}, + + {PIX_FMTS, DEC, HEIC, MSM_VIDC_FMT_NV12, MSM_VIDC_FMT_TP10C, MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C | @@ -194,6 +173,10 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { {MIN_BUFFERS_INPUT, ENC|DEC, CODECS_ALL, 0, 64, 1, 4, V4L2_CID_MIN_BUFFERS_FOR_OUTPUT}, + + {MIN_BUFFERS_INPUT, ENC|DEC, HEIC, 0, 64, 1, 1, + V4L2_CID_MIN_BUFFERS_FOR_OUTPUT}, + {MIN_BUFFERS_OUTPUT, ENC|DEC, CODECS_ALL, 0, 64, 1, 4, V4L2_CID_MIN_BUFFERS_FOR_CAPTURE, @@ -202,31 +185,57 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { /* (8192 * 4320) / 256 */ {MBPF, ENC, CODECS_ALL, 64, 138240, 1, 138240}, + {MBPF, ENC, HEVC, 36, 138240, 1, 138240}, + + /* ((16384x16384)/256) */ + {MBPF, ENC, HEIC, 36, 1048576, 1, 1048576}, + {MBPF, DEC, CODECS_ALL, 36, 138240, 1, 138240}, + /* (4096 * 2304) / 256 */ {MBPF, DEC, VP9, 36, 36864, 1, 36864}, + + /* ((8192x8192)/256) */ + {MBPF, DEC, HEIC, 64, 262144, 1, 262144 }, + /* (4096 * 2304) / 256 */ - {LOSSLESS_MBPF, ENC, H264, 64, 36864, 1, 36864}, - {LOSSLESS_MBPF, ENC, HEVC, 36, 36864, 1, 36864}, + {LOSSLESS_MBPF, ENC, H264|HEVC, 64, 36864, 1, 36864}, + /* Batch Mode Decode */ /* TODO: update with new values based on updated voltage corner */ {BATCH_MBPF, DEC, H264|HEVC|VP9|AV1, 64, 34816, 1, 34816}, + /* (4096 * 2304) / 256 */ {BATCH_FPS, DEC, H264|HEVC|VP9|AV1, 1, 120, 1, 120}, + {SECURE_MBPF, ENC|DEC, H264|HEVC|VP9|AV1, 64, 36864, 1, 36864}, + {SECURE_MBPF, ENC, HEVC, 36, 36864, 1, 36864}, + /* ((1920 * 1088) / 256) * 480 fps */ {MBPS, ENC, CODECS_ALL, 64, 3916800, 1, 3916800}, + {MBPS, ENC, HEVC, 36, 3916800, 1, 3916800}, + + /* ((16384x16384)/256)@1fps */ + {MBPS, ENC, HEIC, 36, 1048576, 1, 1048576}, + /* ((1920 * 1088) / 256) * 960 fps */ {MBPS, DEC, CODECS_ALL, 64, 7833600, 1, 7833600}, + /* ((4096 * 2304) / 256) * 120 */ {MBPS, DEC, VP9, 36, 4423680, 1, 4423680}, + + /* ((8192x8192)/256)@1fps */ + {MBPS, DEC, HEIC, 64, 262144, 1, 262144 }, + /* ((4096 * 2304) / 256) * 60 fps */ {POWER_SAVE_MBPS, ENC, CODECS_ALL, 0, 2211840, 1, 2211840}, + /* Enable check mbps for encoder */ {CHECK_MBPS, ENC, CODECS_ALL, 0, 1, 1, 1}, + /* Disable check mbps for encoder */ {CHECK_MBPS, DEC, CODECS_ALL, 0, 1, 1, 0}, @@ -235,9 +244,14 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { 1, (DEFAULT_FPS << 16), 0, HFI_PROP_FRAME_RATE, - CAP_FLAG_OUTPUT_PORT, - {0}, {0}, - NULL, msm_vidc_set_q16}, + CAP_FLAG_OUTPUT_PORT}, + + {FRAME_RATE, ENC, HEIC, + (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), + 1, (MINIMUM_FPS << 16), + 0, + HFI_PROP_FRAME_RATE, + CAP_FLAG_OUTPUT_PORT}, {FRAME_RATE, DEC, CODECS_ALL, (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), @@ -245,9 +259,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { V4L2_CID_MPEG_VIDC_FRAME_RATE, 0, CAP_FLAG_OUTPUT_PORT | - CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - msm_vidc_adjust_dec_frame_rate}, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, {FRAME_RATE, DEC, VP9, (MINIMUM_FPS << 16), (MAXIMUM_OVERRIDE_VP9_FPS << 16), @@ -255,9 +267,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { V4L2_CID_MPEG_VIDC_FRAME_RATE, 0, CAP_FLAG_OUTPUT_PORT | - CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - msm_vidc_adjust_dec_frame_rate}, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, {OPERATING_RATE, ENC, CODECS_ALL, (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), @@ -269,9 +279,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { V4L2_CID_MPEG_VIDC_OPERATING_RATE, 0, CAP_FLAG_OUTPUT_PORT | - CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - msm_vidc_adjust_dec_operating_rate}, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, {OPERATING_RATE, DEC, VP9, (MINIMUM_FPS << 16), (MAXIMUM_OVERRIDE_VP9_FPS << 16), @@ -279,9 +287,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { V4L2_CID_MPEG_VIDC_OPERATING_RATE, 0, CAP_FLAG_OUTPUT_PORT | - CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - msm_vidc_adjust_dec_operating_rate}, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, {INPUT_RATE, ENC|DEC, CODECS_ALL, (MINIMUM_FPS << 16), INT_MAX, @@ -294,14 +300,23 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { {SCALE_FACTOR, ENC, H264|HEVC, 1, 8, 1, 8}, {MB_CYCLES_VSP, ENC, CODECS_ALL, 25, 25, 1, 25}, + {MB_CYCLES_VSP, DEC, CODECS_ALL, 25, 25, 1, 25}, + {MB_CYCLES_VSP, DEC, VP9|AV1, 60, 60, 1, 60}, + {MB_CYCLES_VPP, ENC, CODECS_ALL, 675, 675, 1, 675}, + {MB_CYCLES_VPP, DEC, CODECS_ALL, 200, 200, 1, 200}, + {MB_CYCLES_LP, ENC, CODECS_ALL, 320, 320, 1, 320}, + {MB_CYCLES_LP, DEC, CODECS_ALL, 200, 200, 1, 200}, + {MB_CYCLES_FW, ENC|DEC, CODECS_ALL, 489583, 489583, 1, 489583}, + {MB_CYCLES_FW_VPP, ENC, CODECS_ALL, 48405, 48405, 1, 48405}, + {MB_CYCLES_FW_VPP, DEC, CODECS_ALL, 66234, 66234, 1, 66234}, {SECURE_MODE, ENC|DEC, H264|HEVC|VP9|AV1, @@ -309,10 +324,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDC_SECURE, HFI_PROP_SECURE, - CAP_FLAG_NONE, - {0}, - {0}, - NULL, msm_vidc_set_u32}, + CAP_FLAG_NONE}, /* * Client will enable V4L2_CID_MPEG_VIDC_METADATA_OUTBUF_FENCE @@ -353,10 +365,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { V4L2_CID_HFLIP, HFI_PROP_FLIP, CAP_FLAG_OUTPUT_PORT | - CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, - {0}, - {0}, - NULL, msm_vidc_set_flip}, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, {VFLIP, ENC, CODECS_ALL, V4L2_MPEG_MSM_VIDC_DISABLE, @@ -365,27 +374,18 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { V4L2_CID_VFLIP, HFI_PROP_FLIP, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {0}, - {0}, - NULL, msm_vidc_set_flip}, + CAP_FLAG_DYNAMIC_ALLOWED}, {ROTATION, ENC, CODECS_ALL, 0, 270, 90, 0, V4L2_CID_ROTATE, HFI_PROP_ROTATION, - CAP_FLAG_OUTPUT_PORT, - {0}, - {0}, - NULL, msm_vidc_set_rotation}, + CAP_FLAG_OUTPUT_PORT}, {SUPER_FRAME, ENC, H264|HEVC, 0, 32, 1, 0, V4L2_CID_MPEG_VIDC_SUPERFRAME, 0, - CAP_FLAG_NONE, - {0}, - {INPUT_BUF_HOST_MAX_COUNT, OUTPUT_BUF_HOST_MAX_COUNT}, - NULL, NULL}, + CAP_FLAG_NONE}, {SLICE_INTERFACE, DEC, CODECS_ALL, 0, 0, 0, 0, @@ -400,9 +400,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE, V4L2_CID_MPEG_VIDEO_HEADER_MODE, HFI_PROP_SEQ_HEADER_MODE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, {0}, - NULL, msm_vidc_set_header_mode}, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, {PREPEND_SPSPPS_TO_IDR, ENC, CODECS_ALL, V4L2_MPEG_MSM_VIDC_DISABLE, @@ -416,18 +414,14 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE, HFI_PROP_NAL_LENGTH_FIELD, - CAP_FLAG_OUTPUT_PORT, - {0}, {0}, - NULL, msm_vidc_set_nal_length}, + CAP_FLAG_OUTPUT_PORT}, {WITHOUT_STARTCODE, DEC, AV1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_DISABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE, HFI_PROP_NAL_LENGTH_FIELD, - CAP_FLAG_INPUT_PORT, - {0}, {0}, - NULL, msm_vidc_set_u32}, + CAP_FLAG_INPUT_PORT}, {NAL_LENGTH_FIELD, ENC, CODECS_ALL, V4L2_MPEG_VIDEO_HEVC_SIZE_0, @@ -446,9 +440,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { 0, 0, 0, 0, V4L2_CID_MPEG_VIDEO_FORCE_KEY_FRAME, HFI_PROP_REQUEST_SYNC_FRAME, - CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - NULL, msm_vidc_set_req_sync_frame}, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, /* Enc: Keeping CABAC and CAVLC as same bitrate. * Dec: there's no use of Bitrate cap @@ -458,9 +450,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { V4L2_CID_MPEG_VIDEO_BITRATE, HFI_PROP_TOTAL_BITRATE, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {ENH_LAYER_COUNT, BITRATE_MODE}, {PEAK_BITRATE}, - msm_vidc_adjust_bitrate, msm_vidc_set_bitrate}, + CAP_FLAG_DYNAMIC_ALLOWED}, {BITRATE_MODE, ENC, H264, V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, @@ -470,14 +460,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, V4L2_CID_MPEG_VIDEO_BITRATE_MODE, HFI_PROP_RATE_CONTROL, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, - {LTR_COUNT, IR_PERIOD, TIME_DELTA_BASED_RC, I_FRAME_QP, - P_FRAME_QP, B_FRAME_QP, ENH_LAYER_COUNT, BIT_RATE, - META_ROI_INFO, MIN_QUALITY, BITRATE_BOOST, VBV_DELAY, - PEAK_BITRATE, SLICE_MODE, CONTENT_ADAPTIVE_CODING, - BLUR_TYPES, LOWLATENCY_MODE}, - msm_vidc_adjust_bitrate_mode, msm_vidc_set_u32_enum}, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, {BITRATE_MODE, ENC, HEVC, V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, @@ -488,14 +471,16 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, V4L2_CID_MPEG_VIDEO_BITRATE_MODE, HFI_PROP_RATE_CONTROL, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, - {LTR_COUNT, IR_PERIOD, TIME_DELTA_BASED_RC, I_FRAME_QP, - P_FRAME_QP, B_FRAME_QP, CONSTANT_QUALITY, ENH_LAYER_COUNT, - BIT_RATE, META_ROI_INFO, MIN_QUALITY, BITRATE_BOOST, VBV_DELAY, - PEAK_BITRATE, SLICE_MODE, CONTENT_ADAPTIVE_CODING, - BLUR_TYPES, LOWLATENCY_MODE}, - msm_vidc_adjust_bitrate_mode, msm_vidc_set_u32_enum}, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {BITRATE_MODE, ENC, HEIC, + V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, + V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CQ), + V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, + V4L2_CID_MPEG_VIDEO_BITRATE_MODE, + HFI_PROP_RATE_CONTROL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, {LOSSLESS, ENC, HEVC, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, @@ -523,19 +508,28 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { V4L2_CID_MPEG_VIDEO_CONSTANT_QUALITY, HFI_PROP_CONSTANT_QUALITY, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {BITRATE_MODE}, {0}, - NULL, msm_vidc_set_constant_quality}, + CAP_FLAG_DYNAMIC_ALLOWED}, + + {CONSTANT_QUALITY, ENC, HEIC, + 1, MAX_CONSTANT_QUALITY, 1, 100, + V4L2_CID_MPEG_VIDEO_CONSTANT_QUALITY, + HFI_PROP_CONSTANT_QUALITY, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, {GOP_SIZE, ENC, CODECS_ALL, 0, INT_MAX, 1, 2 * DEFAULT_FPS - 1, V4L2_CID_MPEG_VIDEO_GOP_SIZE, HFI_PROP_MAX_GOP_FRAMES, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {ENH_LAYER_COUNT}, - {ALL_INTRA}, - msm_vidc_adjust_gop_size, msm_vidc_set_gop_size}, + CAP_FLAG_DYNAMIC_ALLOWED}, + + {GOP_SIZE, ENC, HEIC, + 0, INT_MAX, 1, 0 /* all intra */, + V4L2_CID_MPEG_VIDEO_GOP_SIZE, + HFI_PROP_MAX_GOP_FRAMES, + CAP_FLAG_OUTPUT_PORT | + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, {GOP_CLOSURE, ENC, H264|HEVC, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, @@ -547,10 +541,14 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { 0, 7, 1, 0, V4L2_CID_MPEG_VIDEO_B_FRAMES, HFI_PROP_MAX_B_FRAMES, - CAP_FLAG_OUTPUT_PORT, - {ENH_LAYER_COUNT}, - {ALL_INTRA}, - msm_vidc_adjust_b_frame, msm_vidc_set_u32}, + CAP_FLAG_OUTPUT_PORT}, + + {B_FRAME, ENC, HEIC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDEO_B_FRAMES, + HFI_PROP_MAX_B_FRAMES, + CAP_FLAG_OUTPUT_PORT}, {BLUR_TYPES, ENC, H264|HEVC, VIDC_BLUR_NONE, VIDC_BLUR_EXTERNAL, @@ -558,20 +556,14 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { VIDC_BLUR_NONE, V4L2_CID_MPEG_VIDC_VIDEO_BLUR_TYPES, HFI_PROP_BLUR_TYPES, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {PIX_FMTS, BITRATE_MODE, MIN_QUALITY}, - {BLUR_RESOLUTION}, - msm_vidc_adjust_blur_type, msm_vidc_set_u32_enum}, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, {BLUR_RESOLUTION, ENC, H264|HEVC, 0, S32_MAX, 1, 0, V4L2_CID_MPEG_VIDC_VIDEO_BLUR_RESOLUTION, HFI_PROP_BLUR_RESOLUTION, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {BLUR_TYPES}, - {0}, - msm_vidc_adjust_blur_resolution, msm_vidc_set_blur_resolution}, + CAP_FLAG_DYNAMIC_ALLOWED}, {CSC, ENC, CODECS_ALL, V4L2_MPEG_MSM_VIDC_DISABLE, @@ -586,19 +578,14 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDC_VIDEO_VPE_CSC_CUSTOM_MATRIX, HFI_PROP_CSC_MATRIX, - CAP_FLAG_OUTPUT_PORT, - {0}, {0}, - NULL, msm_vidc_set_csc_custom_matrix}, + CAP_FLAG_OUTPUT_PORT}, - {LOWLATENCY_MODE, ENC, H264 | HEVC, + {LOWLATENCY_MODE, ENC, H264|HEVC, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDC_LOWLATENCY_REQUEST, 0, - CAP_FLAG_NONE, - {BITRATE_MODE}, - {STAGE}, - msm_vidc_adjust_lowlatency_mode, NULL}, + CAP_FLAG_NONE}, {LOWLATENCY_MODE, DEC, H264|HEVC|VP9|AV1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, @@ -611,9 +598,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { 0, 2, 1, 0, V4L2_CID_MPEG_VIDEO_LTR_COUNT, HFI_PROP_LTR_COUNT, - CAP_FLAG_OUTPUT_PORT, - {BITRATE_MODE, ALL_INTRA}, {0}, - msm_vidc_adjust_ltr_count, msm_vidc_set_u32}, + CAP_FLAG_OUTPUT_PORT}, {USE_LTR, ENC, H264|HEVC, INVALID_DEFAULT_MARK_OR_USE_LTR, @@ -621,9 +606,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { 1, INVALID_DEFAULT_MARK_OR_USE_LTR, V4L2_CID_MPEG_VIDEO_USE_LTR_FRAMES, HFI_PROP_LTR_USE, - CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - msm_vidc_adjust_use_ltr, msm_vidc_set_use_and_mark_ltr}, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, {MARK_LTR, ENC, H264|HEVC, INVALID_DEFAULT_MARK_OR_USE_LTR, @@ -631,9 +614,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { 1, INVALID_DEFAULT_MARK_OR_USE_LTR, V4L2_CID_MPEG_VIDEO_FRAME_LTR_INDEX, HFI_PROP_LTR_MARK, - CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - msm_vidc_adjust_mark_ltr, msm_vidc_set_use_and_mark_ltr}, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, {BASELAYER_PRIORITY, ENC, H264, 0, MAX_BASE_LAYER_PRIORITY_ID, 1, 0, @@ -656,10 +637,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { V4L2_CID_MPEG_VIDC_INTRA_REFRESH_PERIOD, 0, CAP_FLAG_INPUT_PORT | CAP_FLAG_OUTPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {BITRATE_MODE, ALL_INTRA, META_ROI_INFO, PIX_FMTS}, - {0}, - msm_vidc_adjust_ir_period, msm_vidc_set_ir_period}, + CAP_FLAG_DYNAMIC_ALLOWED}, {AU_DELIMITER, ENC, H264|HEVC, V4L2_MPEG_MSM_VIDC_DISABLE, @@ -667,29 +645,28 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDEO_AU_DELIMITER, HFI_PROP_AUD, - CAP_FLAG_OUTPUT_PORT, - {0}, {0}, - NULL, msm_vidc_set_u32}, + CAP_FLAG_OUTPUT_PORT}, - {TIME_DELTA_BASED_RC, ENC, CODECS_ALL, + {TIME_DELTA_BASED_RC, ENC, H264|HEVC, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_ENABLE, V4L2_CID_MPEG_VIDC_TIME_DELTA_BASED_RC, HFI_PROP_TIME_DELTA_BASED_RATE_CONTROL, - CAP_FLAG_OUTPUT_PORT, - {BITRATE_MODE}, {0}, - msm_vidc_adjust_delta_based_rc, msm_vidc_set_u32}, + CAP_FLAG_OUTPUT_PORT}, + + {TIME_DELTA_BASED_RC, ENC, HEIC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_TIME_DELTA_BASED_RC, + HFI_PROP_TIME_DELTA_BASED_RATE_CONTROL, + CAP_FLAG_OUTPUT_PORT}, {CONTENT_ADAPTIVE_CODING, ENC, H264|HEVC, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_ENABLE, V4L2_CID_MPEG_VIDC_CONTENT_ADAPTIVE_CODING, HFI_PROP_CONTENT_ADAPTIVE_CODING, - CAP_FLAG_OUTPUT_PORT, - {BITRATE_MODE, LAYER_ENABLE, LAYER_TYPE}, - {REQUEST_PREPROCESS}, - msm_vidc_adjust_brs, - msm_vidc_set_vbr_related_properties}, + CAP_FLAG_OUTPUT_PORT}, {REQUEST_PREPROCESS, ENC, H264|HEVC, MSM_VIDC_PREPROCESS_NONE, @@ -698,79 +675,45 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { BIT(MSM_VIDC_PREPROCESS_TYPE0), MSM_VIDC_PREPROCESS_NONE, 0, HFI_PROP_REQUEST_PREPROCESS, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {CONTENT_ADAPTIVE_CODING, META_EVA_STATS}, - {0}, - msm_vidc_adjust_preprocess, - msm_vidc_set_preprocess}, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, {BITRATE_BOOST, ENC, H264|HEVC, 0, MAX_BITRATE_BOOST, 25, MAX_BITRATE_BOOST, V4L2_CID_MPEG_VIDC_QUALITY_BITRATE_BOOST, HFI_PROP_BITRATE_BOOST, - CAP_FLAG_OUTPUT_PORT, - {BITRATE_MODE}, - {0}, - msm_vidc_adjust_bitrate_boost_iris3, - msm_vidc_set_vbr_related_properties}, + CAP_FLAG_OUTPUT_PORT}, - {MIN_QUALITY, ENC, H264, + {MIN_QUALITY, ENC, H264|HEVC, 0, MAX_SUPPORTED_MIN_QUALITY, 70, MAX_SUPPORTED_MIN_QUALITY, 0, HFI_PROP_MAINTAIN_MIN_QUALITY, - CAP_FLAG_OUTPUT_PORT, - {BITRATE_MODE, ENH_LAYER_COUNT, META_ROI_INFO}, - {BLUR_TYPES}, - msm_vidc_adjust_min_quality, - msm_vidc_set_vbr_related_properties}, - - {MIN_QUALITY, ENC, HEVC, - 0, MAX_SUPPORTED_MIN_QUALITY, 70, MAX_SUPPORTED_MIN_QUALITY, - 0, - HFI_PROP_MAINTAIN_MIN_QUALITY, - CAP_FLAG_OUTPUT_PORT, - {BITRATE_MODE, PIX_FMTS, ENH_LAYER_COUNT, - META_ROI_INFO}, - {BLUR_TYPES}, - msm_vidc_adjust_min_quality, - msm_vidc_set_vbr_related_properties}, + CAP_FLAG_OUTPUT_PORT}, {VBV_DELAY, ENC, H264|HEVC, 200, 300, 100, 300, V4L2_CID_MPEG_VIDEO_VBV_DELAY, HFI_PROP_VBV_DELAY, - CAP_FLAG_OUTPUT_PORT, - {BITRATE_MODE}, - {0}, - NULL, msm_vidc_set_cbr_related_properties}, + CAP_FLAG_OUTPUT_PORT}, {PEAK_BITRATE, ENC, H264|HEVC, - /* default peak bitrate is 10% larger than avrg bitrate */ + /* default peak bitrate is 10% larger than avg bitrate */ 1, MAX_BITRATE, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_BITRATE_PEAK, HFI_PROP_TOTAL_PEAK_BITRATE, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {BITRATE_MODE, BIT_RATE}, - {0}, - msm_vidc_adjust_peak_bitrate, - msm_vidc_set_cbr_related_properties}, + CAP_FLAG_DYNAMIC_ALLOWED}, {MIN_FRAME_QP, ENC, H264, MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, V4L2_CID_MPEG_VIDEO_H264_MIN_QP, HFI_PROP_MIN_QP_PACKED, - CAP_FLAG_OUTPUT_PORT, - {0}, {0}, - NULL, msm_vidc_set_min_qp}, + CAP_FLAG_OUTPUT_PORT}, {MIN_FRAME_QP, ENC, HEVC|HEIC, MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP, HFI_PROP_MIN_QP_PACKED, - CAP_FLAG_OUTPUT_PORT, - {PIX_FMTS}, {0}, - msm_vidc_adjust_hevc_min_qp, msm_vidc_set_min_qp}, + CAP_FLAG_OUTPUT_PORT}, {I_FRAME_MIN_QP, ENC, H264, MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, @@ -800,17 +743,13 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { MIN_QP_8BIT, MAX_QP, 1, MAX_QP, V4L2_CID_MPEG_VIDEO_H264_MAX_QP, HFI_PROP_MAX_QP_PACKED, - CAP_FLAG_OUTPUT_PORT, - {0}, {0}, - NULL, msm_vidc_set_max_qp}, + CAP_FLAG_OUTPUT_PORT}, {MAX_FRAME_QP, ENC, HEVC|HEIC, MIN_QP_10BIT, MAX_QP, 1, MAX_QP, V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP, HFI_PROP_MAX_QP_PACKED, - CAP_FLAG_OUTPUT_PORT, - {PIX_FMTS}, {0}, - msm_vidc_adjust_hevc_max_qp, msm_vidc_set_max_qp}, + CAP_FLAG_OUTPUT_PORT}, {I_FRAME_MAX_QP, ENC, H264, MIN_QP_8BIT, MAX_QP, 1, MAX_QP, @@ -841,54 +780,42 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP, HFI_PROP_QP_PACKED, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {PIX_FMTS, BITRATE_MODE}, {0}, - msm_vidc_adjust_hevc_i_frame_qp, msm_vidc_set_frame_qp}, + CAP_FLAG_DYNAMIC_ALLOWED}, {I_FRAME_QP, ENC, H264, MIN_QP_8BIT, MAX_QP, 1, DEFAULT_QP, V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP, HFI_PROP_QP_PACKED, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {BITRATE_MODE}, {0}, - NULL, msm_vidc_set_frame_qp}, + CAP_FLAG_DYNAMIC_ALLOWED}, {P_FRAME_QP, ENC, HEVC, MIN_QP_10BIT, MAX_QP, 1, DEFAULT_QP, V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP, HFI_PROP_QP_PACKED, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {PIX_FMTS, BITRATE_MODE}, {0}, - msm_vidc_adjust_hevc_p_frame_qp, msm_vidc_set_frame_qp}, + CAP_FLAG_DYNAMIC_ALLOWED}, {P_FRAME_QP, ENC, H264, MIN_QP_8BIT, MAX_QP, 1, DEFAULT_QP, V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP, HFI_PROP_QP_PACKED, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {BITRATE_MODE}, {0}, - NULL, msm_vidc_set_frame_qp}, + CAP_FLAG_DYNAMIC_ALLOWED}, {B_FRAME_QP, ENC, HEVC, MIN_QP_10BIT, MAX_QP, 1, DEFAULT_QP, V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP, HFI_PROP_QP_PACKED, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {PIX_FMTS, BITRATE_MODE}, {0}, - msm_vidc_adjust_hevc_b_frame_qp, msm_vidc_set_frame_qp}, + CAP_FLAG_DYNAMIC_ALLOWED}, {B_FRAME_QP, ENC, H264, MIN_QP_8BIT, MAX_QP, 1, DEFAULT_QP, V4L2_CID_MPEG_VIDEO_H264_B_FRAME_QP, HFI_PROP_QP_PACKED, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {BITRATE_MODE}, {0}, - NULL, msm_vidc_set_frame_qp}, + CAP_FLAG_DYNAMIC_ALLOWED}, {LAYER_TYPE, ENC, HEVC, V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B, @@ -908,176 +835,124 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P, V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_TYPE, HFI_PROP_LAYER_ENCODING_TYPE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, {CONTENT_ADAPTIVE_CODING}}, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, {LAYER_ENABLE, ENC, H264, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING, HFI_PROP_LAYER_ENCODING_TYPE, - CAP_FLAG_OUTPUT_PORT, - {0}, {CONTENT_ADAPTIVE_CODING}}, + CAP_FLAG_OUTPUT_PORT}, {LAYER_ENABLE, ENC, HEVC, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, 0, 0, - CAP_FLAG_OUTPUT_PORT, - {0}, - {CONTENT_ADAPTIVE_CODING}}, + CAP_FLAG_OUTPUT_PORT}, {ENH_LAYER_COUNT, ENC, HEVC, 0, 5, 1, 0, V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER, HFI_PROP_LAYER_COUNT, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {BITRATE_MODE, META_EVA_STATS}, - {GOP_SIZE, B_FRAME, BIT_RATE, MIN_QUALITY}, - msm_vidc_adjust_layer_count, msm_vidc_set_layer_count_and_type}, + CAP_FLAG_DYNAMIC_ALLOWED}, {ENH_LAYER_COUNT, ENC, H264, 0, 5, 1, 0, V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_LAYER, HFI_PROP_LAYER_COUNT, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {BITRATE_MODE, META_EVA_STATS}, - {GOP_SIZE, B_FRAME, BIT_RATE, MIN_QUALITY}, - msm_vidc_adjust_layer_count, msm_vidc_set_layer_count_and_type}, + CAP_FLAG_DYNAMIC_ALLOWED}, {ENH_LAYER_COUNT, DEC, AV1, 0, MAX_OP_POINT, 1, 0, 0, HFI_PROP_AV1_OP_POINT, - CAP_FLAG_INPUT_PORT, - {0}, {0}, - NULL, msm_vidc_set_u32}, - /* - * layer bitrate is treated as BIT_RATE cap sibling and - * is handled in bitrate adjust and set functions - */ - {L0_BR, ENC, HEVC, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L0_BR, - HFI_PROP_BITRATE_LAYER1, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, - - {L1_BR, ENC, HEVC, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L1_BR, - HFI_PROP_BITRATE_LAYER2, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, - - {L2_BR, ENC, HEVC, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L2_BR, - HFI_PROP_BITRATE_LAYER3, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, - - {L3_BR, ENC, HEVC, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L3_BR, - HFI_PROP_BITRATE_LAYER4, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, - - {L4_BR, ENC, HEVC, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L4_BR, - HFI_PROP_BITRATE_LAYER5, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, - - {L5_BR, ENC, HEVC, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L5_BR, - HFI_PROP_BITRATE_LAYER6, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, + CAP_FLAG_INPUT_PORT}, {L0_BR, ENC, H264, 1, MAX_BITRATE, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L0_BR, HFI_PROP_BITRATE_LAYER1, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L0_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L0_BR, + HFI_PROP_BITRATE_LAYER1, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, {L1_BR, ENC, H264, 1, MAX_BITRATE, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L1_BR, HFI_PROP_BITRATE_LAYER2, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L1_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L1_BR, + HFI_PROP_BITRATE_LAYER2, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, {L2_BR, ENC, H264, 1, MAX_BITRATE, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L2_BR, HFI_PROP_BITRATE_LAYER3, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L2_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L2_BR, + HFI_PROP_BITRATE_LAYER3, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, {L3_BR, ENC, H264, 1, MAX_BITRATE, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L3_BR, HFI_PROP_BITRATE_LAYER4, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, + CAP_FLAG_DYNAMIC_ALLOWED}, + {L3_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L3_BR, + HFI_PROP_BITRATE_LAYER4, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, {L4_BR, ENC, H264, 1, MAX_BITRATE, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L4_BR, HFI_PROP_BITRATE_LAYER5, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L4_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L4_BR, + HFI_PROP_BITRATE_LAYER5, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, {L5_BR, ENC, H264, 1, MAX_BITRATE, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L5_BR, HFI_PROP_BITRATE_LAYER6, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L5_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L5_BR, + HFI_PROP_BITRATE_LAYER6, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, {ENTROPY_MODE, ENC, H264, V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC, @@ -1087,10 +962,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, V4L2_CID_MPEG_VIDEO_H264_ENTROPY_MODE, HFI_PROP_CABAC_SESSION, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {PROFILE}, - {0}, - msm_vidc_adjust_entropy_mode, msm_vidc_set_u32}, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, {ENTROPY_MODE, DEC, H264|HEVC|VP9|AV1, V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC, @@ -1101,8 +973,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { 0, HFI_PROP_CABAC_SESSION}, - /* H264 does not support 10 bit, PIX_FMTS would not be a Parent for this */ - {PROFILE, ENC, H264, + {PROFILE, ENC|DEC, H264, V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE, V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH, BIT(V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE) | @@ -1113,26 +984,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { V4L2_MPEG_VIDEO_H264_PROFILE_HIGH, V4L2_CID_MPEG_VIDEO_H264_PROFILE, HFI_PROP_PROFILE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, - {ENTROPY_MODE, TRANSFORM_8X8}, - NULL, msm_vidc_set_u32_enum}, - - {PROFILE, DEC, H264, - V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE, - V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH, - BIT(V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE) | - BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH) | - BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_BASELINE) | - BIT(V4L2_MPEG_VIDEO_H264_PROFILE_MAIN) | - BIT(V4L2_MPEG_VIDEO_H264_PROFILE_HIGH), - V4L2_MPEG_VIDEO_H264_PROFILE_HIGH, - V4L2_CID_MPEG_VIDEO_H264_PROFILE, - HFI_PROP_PROFILE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, - {ENTROPY_MODE}, - NULL, msm_vidc_set_u32_enum}, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, {PROFILE, ENC|DEC, HEVC|HEIC, V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN, @@ -1144,10 +996,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN, V4L2_CID_MPEG_VIDEO_HEVC_PROFILE, HFI_PROP_PROFILE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {PIX_FMTS}, - {0}, - msm_vidc_adjust_profile, msm_vidc_set_u32_enum}, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, {PROFILE, DEC, VP9, V4L2_MPEG_VIDEO_VP9_PROFILE_0, @@ -1157,33 +1006,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { V4L2_MPEG_VIDEO_VP9_PROFILE_0, V4L2_CID_MPEG_VIDEO_VP9_PROFILE, HFI_PROP_PROFILE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, - {0}, - NULL, msm_vidc_set_u32_enum}, - - {LEVEL, DEC, VP9, - V4L2_MPEG_VIDEO_VP9_LEVEL_1_0, - V4L2_MPEG_VIDEO_VP9_LEVEL_6_0, - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_1_0) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_1_1) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_2_0) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_2_1) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_3_0) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_3_1) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_4_0) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_4_1) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_0) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_1) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_2) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_6_0), - V4L2_MPEG_VIDEO_VP9_LEVEL_6_0, - V4L2_CID_MPEG_VIDEO_VP9_LEVEL, - HFI_PROP_LEVEL, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, - {0}, - NULL, msm_vidc_set_u32_enum}, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, {PROFILE, DEC, AV1, V4L2_MPEG_VIDEO_AV1_PROFILE_MAIN, @@ -1192,52 +1015,52 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { V4L2_MPEG_VIDEO_AV1_PROFILE_MAIN, V4L2_CID_MPEG_VIDEO_AV1_PROFILE, HFI_PROP_PROFILE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, - {0}, - NULL, msm_vidc_set_u32_enum}, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - {LEVEL, DEC, AV1, - V4L2_MPEG_VIDEO_AV1_LEVEL_2_0, - V4L2_MPEG_VIDEO_AV1_LEVEL_6_1, - BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_2_0) | - BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_2_1) | - BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_2_2) | - BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_2_3) | - BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_3_0) | - BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_3_1) | - BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_3_2) | - BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_3_3) | - BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_4_0) | - BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_4_1) | - BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_4_2) | - BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_4_3) | - BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_5_0) | - BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_5_1) | - BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_5_2) | - BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_5_3) | - BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_6_0) | - BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_6_1), - V4L2_MPEG_VIDEO_AV1_LEVEL_6_1, - V4L2_CID_MPEG_VIDEO_AV1_LEVEL, + {LEVEL, ENC, H264, + V4L2_MPEG_VIDEO_H264_LEVEL_1_0, + V4L2_MPEG_VIDEO_H264_LEVEL_6_0, + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1B) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_3) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_0), + V4L2_MPEG_VIDEO_H264_LEVEL_5_0, + V4L2_CID_MPEG_VIDEO_H264_LEVEL, HFI_PROP_LEVEL, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, - {0}, - NULL, msm_vidc_set_u32_enum}, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - {AV1_TIER, DEC, AV1, - V4L2_MPEG_VIDEO_AV1_TIER_MAIN, - V4L2_MPEG_VIDEO_AV1_TIER_HIGH, - BIT(V4L2_MPEG_VIDEO_AV1_TIER_MAIN) | - BIT(V4L2_MPEG_VIDEO_AV1_TIER_HIGH), - V4L2_MPEG_VIDEO_AV1_TIER_HIGH, - V4L2_CID_MPEG_VIDEO_AV1_TIER, - HFI_PROP_TIER, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, - {0}, - NULL, msm_vidc_set_u32_enum}, + {LEVEL, ENC, HEVC|HEIC, + V4L2_MPEG_VIDEO_HEVC_LEVEL_1, + V4L2_MPEG_VIDEO_HEVC_LEVEL_6, + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6), + V4L2_MPEG_VIDEO_HEVC_LEVEL_5, + V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, {LEVEL, DEC, H264, V4L2_MPEG_VIDEO_H264_LEVEL_1_0, @@ -1264,39 +1087,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { V4L2_MPEG_VIDEO_H264_LEVEL_6_1, V4L2_CID_MPEG_VIDEO_H264_LEVEL, HFI_PROP_LEVEL, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, - {0}, - NULL, msm_vidc_set_u32_enum}, - - {LEVEL, ENC, H264, - V4L2_MPEG_VIDEO_H264_LEVEL_1_0, - V4L2_MPEG_VIDEO_H264_LEVEL_6_0, - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1B) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_3) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_0), - V4L2_MPEG_VIDEO_H264_LEVEL_5_0, - V4L2_CID_MPEG_VIDEO_H264_LEVEL, - HFI_PROP_LEVEL, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, - {0}, - NULL, msm_vidc_set_level}, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, {LEVEL, DEC, HEVC|HEIC, V4L2_MPEG_VIDEO_HEVC_LEVEL_1, @@ -1316,36 +1107,63 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1, V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, HFI_PROP_LEVEL, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, - {0}, - NULL, msm_vidc_set_u32_enum}, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - {LEVEL, ENC, HEVC|HEIC, - V4L2_MPEG_VIDEO_HEVC_LEVEL_1, - V4L2_MPEG_VIDEO_HEVC_LEVEL_6, - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6), - V4L2_MPEG_VIDEO_HEVC_LEVEL_5, - V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, + {LEVEL, DEC, VP9, + V4L2_MPEG_VIDEO_VP9_LEVEL_1_0, + V4L2_MPEG_VIDEO_VP9_LEVEL_6_0, + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_1_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_1_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_2_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_3_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_4_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_2) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_6_0), + V4L2_MPEG_VIDEO_VP9_LEVEL_6_0, + V4L2_CID_MPEG_VIDEO_VP9_LEVEL, HFI_PROP_LEVEL, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, - {0}, - NULL, msm_vidc_set_level}, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - /* - * TODO: Bring the VP9 Level upstream GKI change, and level cap here - */ + {LEVEL, DEC, AV1, + V4L2_MPEG_VIDEO_AV1_LEVEL_2_0, + V4L2_MPEG_VIDEO_AV1_LEVEL_6_1, + BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_2_0) | + BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_2_2) | + BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_2_3) | + BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_3_0) | + BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_3_2) | + BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_3_3) | + BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_4_0) | + BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_4_2) | + BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_4_3) | + BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_5_0) | + BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_5_1) | + BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_5_2) | + BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_5_3) | + BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_6_0) | + BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_6_1), + V4L2_MPEG_VIDEO_AV1_LEVEL_6_1, + V4L2_CID_MPEG_VIDEO_AV1_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {AV1_TIER, DEC, AV1, + V4L2_MPEG_VIDEO_AV1_TIER_MAIN, + V4L2_MPEG_VIDEO_AV1_TIER_HIGH, + BIT(V4L2_MPEG_VIDEO_AV1_TIER_MAIN) | + BIT(V4L2_MPEG_VIDEO_AV1_TIER_HIGH), + V4L2_MPEG_VIDEO_AV1_TIER_HIGH, + V4L2_CID_MPEG_VIDEO_AV1_TIER, + HFI_PROP_TIER, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, {HEVC_TIER, ENC|DEC, HEVC, V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, @@ -1355,10 +1173,16 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { V4L2_MPEG_VIDEO_HEVC_TIER_HIGH, V4L2_CID_MPEG_VIDEO_HEVC_TIER, HFI_PROP_TIER, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, - {0}, - NULL, msm_vidc_set_u32_enum}, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {HEVC_TIER, ENC|DEC, HEIC, + V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, + V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, + BIT(V4L2_MPEG_VIDEO_HEVC_TIER_MAIN), + V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, + V4L2_CID_MPEG_VIDEO_HEVC_TIER, + HFI_PROP_TIER, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, {LF_MODE, ENC, H264, V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED, @@ -1369,9 +1193,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED, V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_MODE, HFI_PROP_DEBLOCKING_MODE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, {0}, - NULL, msm_vidc_set_deblock_mode}, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, {LF_MODE, ENC, HEVC|HEIC, V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_DISABLED, @@ -1382,9 +1204,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_ENABLED, V4L2_CID_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE, HFI_PROP_DEBLOCKING_MODE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, {0}, - NULL, msm_vidc_set_deblock_mode}, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, {LF_ALPHA, ENC, H264, -6, 6, 1, 0, @@ -1411,10 +1231,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE, 0, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {BITRATE_MODE, ALL_INTRA}, - {STAGE}, - msm_vidc_adjust_slice_count, msm_vidc_set_slice_count}, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, {SLICE_MAX_BYTES, ENC, H264|HEVC|HEIC, MIN_SLICE_BYTE_SIZE, MAX_SLICE_BYTE_SIZE, @@ -1429,7 +1246,6 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { HFI_PROP_MULTI_SLICE_MB_COUNT, CAP_FLAG_OUTPUT_PORT}, - // TODO: MB level RC - mapping {MB_RC, ENC, H264|HEVC, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_ENABLE, @@ -1442,131 +1258,77 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { 1, V4L2_MPEG_MSM_VIDC_ENABLE, V4L2_CID_MPEG_VIDEO_H264_8X8_TRANSFORM, HFI_PROP_8X8_TRANSFORM, - CAP_FLAG_OUTPUT_PORT, - {PROFILE}, {0}, - msm_vidc_adjust_transform_8x8, msm_vidc_set_u32}, + CAP_FLAG_OUTPUT_PORT}, {CHROMA_QP_INDEX_OFFSET, ENC, HEVC, MIN_CHROMA_QP_OFFSET, MAX_CHROMA_QP_OFFSET, 1, MAX_CHROMA_QP_OFFSET, V4L2_CID_MPEG_VIDEO_H264_CHROMA_QP_INDEX_OFFSET, HFI_PROP_CHROMA_QP_OFFSET, - CAP_FLAG_OUTPUT_PORT, - {0}, {0}, - msm_vidc_adjust_chroma_qp_index_offset, - msm_vidc_set_chroma_qp_index_offset}, + CAP_FLAG_OUTPUT_PORT}, {DISPLAY_DELAY_ENABLE, DEC, H264|HEVC|VP9|AV1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY_ENABLE, HFI_PROP_DECODE_ORDER_OUTPUT, - CAP_FLAG_INPUT_PORT, - {0}, {OUTPUT_ORDER}, - NULL, NULL}, + CAP_FLAG_INPUT_PORT}, {DISPLAY_DELAY, DEC, H264|HEVC|VP9|AV1, 0, 1, 1, 0, V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY, HFI_PROP_DECODE_ORDER_OUTPUT, - CAP_FLAG_INPUT_PORT, - {0}, {OUTPUT_ORDER}, - NULL, NULL}, + CAP_FLAG_INPUT_PORT}, {OUTPUT_ORDER, DEC, H264|HEVC|VP9|AV1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, 0, HFI_PROP_DECODE_ORDER_OUTPUT, - CAP_FLAG_INPUT_PORT, - {THUMBNAIL_MODE, DISPLAY_DELAY, DISPLAY_DELAY_ENABLE}, - {0}, - msm_vidc_adjust_output_order, msm_vidc_set_u32}, + CAP_FLAG_INPUT_PORT}, {INPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL, DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT, 1, DEFAULT_MAX_HOST_BUF_COUNT, 0, HFI_PROP_BUFFER_HOST_MAX_COUNT, - CAP_FLAG_INPUT_PORT, - {0}, {0}, - msm_vidc_adjust_input_buf_host_max_count, msm_vidc_set_u32}, - - {INPUT_BUF_HOST_MAX_COUNT, ENC, H264|HEVC, - DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT, - 1, DEFAULT_MAX_HOST_BUF_COUNT, - 0, - HFI_PROP_BUFFER_HOST_MAX_COUNT, - CAP_FLAG_INPUT_PORT, - {SUPER_FRAME}, {0}, - msm_vidc_adjust_input_buf_host_max_count, msm_vidc_set_u32}, + CAP_FLAG_INPUT_PORT}, {OUTPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL, DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT, 1, DEFAULT_MAX_HOST_BUF_COUNT, 0, HFI_PROP_BUFFER_HOST_MAX_COUNT, - CAP_FLAG_OUTPUT_PORT, - {0}, {0}, - msm_vidc_adjust_output_buf_host_max_count, msm_vidc_set_u32}, + CAP_FLAG_OUTPUT_PORT}, - {OUTPUT_BUF_HOST_MAX_COUNT, ENC, H264|HEVC, - DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT, - 1, DEFAULT_MAX_HOST_BUF_COUNT, - 0, - HFI_PROP_BUFFER_HOST_MAX_COUNT, - CAP_FLAG_OUTPUT_PORT, - {SUPER_FRAME}, {0}, - msm_vidc_adjust_output_buf_host_max_count, msm_vidc_set_u32}, - - /* conceal color */ {CONCEAL_COLOR_8BIT, DEC, CODECS_ALL, 0x0, 0xff3fcff, 1, DEFAULT_VIDEO_CONCEAL_COLOR_BLACK, V4L2_CID_MPEG_VIDEO_MUTE_YUV, HFI_PROP_CONCEAL_COLOR_8BIT, - CAP_FLAG_INPUT_PORT, - {0}, {0}, - NULL, msm_vidc_set_u32_packed}, + CAP_FLAG_INPUT_PORT}, {CONCEAL_COLOR_10BIT, DEC, CODECS_ALL, 0x0, 0x3fffffff, 1, DEFAULT_VIDEO_CONCEAL_COLOR_BLACK, V4L2_CID_MPEG_VIDEO_MUTE_YUV, HFI_PROP_CONCEAL_COLOR_10BIT, - CAP_FLAG_INPUT_PORT, - {0}, {0}, - NULL, msm_vidc_set_u32_packed}, + CAP_FLAG_INPUT_PORT}, - // TODO {STAGE, DEC|ENC, CODECS_ALL, MSM_VIDC_STAGE_1, MSM_VIDC_STAGE_2, 1, MSM_VIDC_STAGE_2, 0, - HFI_PROP_STAGE, - 0, - {0}, {0}, - NULL, msm_vidc_set_stage}, - - {STAGE, ENC, H264 | HEVC, - MSM_VIDC_STAGE_1, - MSM_VIDC_STAGE_2, 1, - MSM_VIDC_STAGE_2, - 0, - HFI_PROP_STAGE, - CAP_FLAG_NONE, - {LOWLATENCY_MODE, SLICE_MODE}, {0}, - NULL, msm_vidc_set_stage}, + HFI_PROP_STAGE}, {PIPE, DEC|ENC, CODECS_ALL, MSM_VIDC_PIPE_1, MSM_VIDC_PIPE_4, 1, MSM_VIDC_PIPE_4, 0, - HFI_PROP_PIPE, - 0, - {0}, {0}, - NULL, msm_vidc_set_pipe}, + HFI_PROP_PIPE}, + {POC, DEC, H264, 0, 18, 1, 1}, + {QUALITY_MODE, ENC, CODECS_ALL, MSM_VIDC_MAX_QUALITY_MODE, MSM_VIDC_POWER_SAVE_MODE, 1, @@ -1594,9 +1356,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDC_THUMBNAIL_MODE, HFI_PROP_THUMBNAIL_MODE, - CAP_FLAG_INPUT_PORT, - {0}, {OUTPUT_ORDER}, - NULL, msm_vidc_set_u32}, + CAP_FLAG_INPUT_PORT}, {DEFAULT_HEADER, DEC, CODECS_ALL, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, @@ -1609,9 +1369,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { 1, V4L2_MPEG_MSM_VIDC_ENABLE, 0, HFI_PROP_DEC_START_FROM_RAP_FRAME, - CAP_FLAG_INPUT_PORT, - {0}, {0}, - NULL, msm_vidc_set_u32}, + CAP_FLAG_INPUT_PORT}, {SEQ_CHANGE_AT_SYNC_FRAME, DEC, CODECS_ALL, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, @@ -1624,9 +1382,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { 0, 2, 1, 1, V4L2_CID_MPEG_VIDC_PRIORITY, HFI_PROP_SESSION_PRIORITY, - CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - msm_vidc_adjust_session_priority, msm_vidc_set_session_priority}, + CAP_FLAG_DYNAMIC_ALLOWED}, {ENC_IP_CR, ENC, CODECS_ALL, 0, S32_MAX, 1, 0, @@ -1638,9 +1394,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { 1, V4L2_MPEG_MSM_VIDC_DISABLE, 0, HFI_PROP_DPB_LIST, - CAP_FLAG_OUTPUT_PORT, - {0}, {0}, - NULL, NULL}, + CAP_FLAG_OUTPUT_PORT}, {FILM_GRAIN, DEC, AV1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, @@ -1658,9 +1412,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { 0, S32_MAX, 1, 0, 0, HFI_PROP_AV1_DRAP_CONFIG, - CAP_FLAG_INPUT_PORT, - {0}, {0}, - NULL, msm_vidc_set_u32}, + CAP_FLAG_INPUT_PORT}, {META_BITSTREAM_RESOLUTION, DEC, AV1, V4L2_MPEG_VIDC_META_DISABLE, @@ -1685,27 +1437,20 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { 1, V4L2_MPEG_MSM_VIDC_DISABLE, 0, 0, - CAP_FLAG_OUTPUT_PORT, - {GOP_SIZE, B_FRAME}, - {LTR_COUNT, IR_PERIOD, SLICE_MODE}, - msm_vidc_adjust_all_intra, NULL}, + CAP_FLAG_OUTPUT_PORT}, {INPUT_METADATA_FD, ENC|DEC, CODECS_ALL, INVALID_FD, INT_MAX, 1, INVALID_FD, V4L2_CID_MPEG_VIDC_INPUT_METADATA_FD, 0, - CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - NULL, NULL}, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, {INPUT_META_VIA_REQUEST, ENC|DEC, CODECS_ALL, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDC_INPUT_METADATA_VIA_REQUEST_ENABLE, 0, - CAP_FLAG_INPUT_PORT, - {0}, {0}, - NULL, NULL}, + CAP_FLAG_INPUT_PORT}, {META_LTR_MARK_USE, ENC, H264|HEVC, V4L2_MPEG_VIDC_META_DISABLE, @@ -1836,9 +1581,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_EVA_STATS, HFI_PROP_EVA_STAT_INFO, - CAP_FLAG_BITMASK, - {0}, - {ENH_LAYER_COUNT, REQUEST_PREPROCESS}}, + CAP_FLAG_BITMASK}, {META_BUF_TAG, ENC, CODECS_ALL, V4L2_MPEG_VIDC_META_DISABLE, @@ -1871,6 +1614,14 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { HFI_PROP_DPB_TAG_LIST, CAP_FLAG_BITMASK}, + {META_SUBFRAME_OUTPUT, ENC, HEIC, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_SUBFRAME_OUTPUT, + HFI_PROP_SUBFRAME_OUTPUT, + CAP_FLAG_BITMASK}, + {META_SUBFRAME_OUTPUT, DEC, CODECS_ALL, V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, @@ -1893,10 +1644,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_ROI_INFO, HFI_PROP_ROI_INFO, - CAP_FLAG_INPUT_PORT | CAP_FLAG_BITMASK, - {BITRATE_MODE, PIX_FMTS}, - {MIN_QUALITY, IR_PERIOD}, - msm_vidc_adjust_roi_info, NULL}, + CAP_FLAG_INPUT_PORT | CAP_FLAG_BITMASK}, {META_SALIENCY_INFO, ENC, H264|HEVC, V4L2_MPEG_VIDC_META_DISABLE, @@ -1904,10 +1652,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_SALIENCY_INFO, HFI_PROP_ROI_AS_SALIENCY_INFO, - CAP_FLAG_INPUT_PORT | CAP_FLAG_BITMASK, - {}, - {}, - NULL, NULL}, + CAP_FLAG_INPUT_PORT | CAP_FLAG_BITMASK}, {META_DEC_QP_METADATA, DEC, CODECS_ALL, V4L2_MPEG_VIDC_META_DISABLE, @@ -1917,105 +1662,18 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { HFI_PROP_DEC_QP_METADATA, CAP_FLAG_BITMASK}, - /* configure image properties */ - {FRAME_WIDTH, ENC, HEIC, 128, 16384, 1, 16384}, - {FRAME_HEIGHT, ENC, HEIC, 128, 16384, 1, 16384}, - {MIN_BUFFERS_INPUT, ENC|DEC, HEIC, 0, 64, 1, 1, - V4L2_CID_MIN_BUFFERS_FOR_OUTPUT}, - {MBPF, DEC, HEIC, 64, 262144, 1, 262144 }, /* ((8192x8192)/256) */ - {MBPF, ENC, HEIC, 36, 1048576, 1, 1048576}, /* ((16384x16384)/256) */ - {MBPS, DEC, HEIC, 64, 262144, 1, 262144 }, /* ((8192x8192)/256)@1fps */ - {MBPS, ENC, HEIC, 36, 1048576, 1, 1048576}, /* ((16384x16384)/256)@1fps */ - {BITRATE_MODE, ENC, HEIC, - V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, - V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, - BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CQ), - V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, - V4L2_CID_MPEG_VIDEO_BITRATE_MODE, - HFI_PROP_RATE_CONTROL, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, - {TIME_DELTA_BASED_RC, CONSTANT_QUALITY}, - msm_vidc_adjust_bitrate_mode, msm_vidc_set_u32_enum}, - {TIME_DELTA_BASED_RC, ENC, HEIC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_TIME_DELTA_BASED_RC, - HFI_PROP_TIME_DELTA_BASED_RATE_CONTROL, - CAP_FLAG_OUTPUT_PORT, - {BITRATE_MODE}, {0}, - msm_vidc_adjust_delta_based_rc, msm_vidc_set_u32}, - {CONSTANT_QUALITY, ENC, HEIC, - 1, MAX_CONSTANT_QUALITY, 1, 100, - V4L2_CID_MPEG_VIDEO_CONSTANT_QUALITY, - HFI_PROP_CONSTANT_QUALITY, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {BITRATE_MODE}, {0}, - NULL, msm_vidc_set_constant_quality}, {GRID, ENC, HEIC, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_ENABLE, 0, HFI_PROP_HEIC_GRID_ENABLE, - CAP_FLAG_OUTPUT_PORT, - {0}, {0}, - NULL, msm_vidc_set_u32}, - {GOP_SIZE, ENC, HEIC, - 0, INT_MAX, 1, 0 /* all intra */, - V4L2_CID_MPEG_VIDEO_GOP_SIZE, - HFI_PROP_MAX_GOP_FRAMES, - CAP_FLAG_OUTPUT_PORT | - CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - NULL, msm_vidc_set_u32}, - {B_FRAME, ENC, HEIC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDEO_B_FRAMES, - HFI_PROP_MAX_B_FRAMES, - CAP_FLAG_OUTPUT_PORT, - {0}, {0}, - NULL, msm_vidc_set_u32}, - {PIX_FMTS, ENC, HEIC, - MSM_VIDC_FMT_NV12, - MSM_VIDC_FMT_P010, - MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_P010, - MSM_VIDC_FMT_NV12, - 0, 0, - 0, - {0}, - {PROFILE}}, - {HEVC_TIER, ENC|DEC, HEIC, - V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, - V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, - BIT(V4L2_MPEG_VIDEO_HEVC_TIER_MAIN), - V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, - V4L2_CID_MPEG_VIDEO_HEVC_TIER, - HFI_PROP_TIER, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, - {0}, - NULL, msm_vidc_set_u32_enum}, - {FRAME_RATE, ENC, HEIC, - (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), - 1, (MINIMUM_FPS << 16), - 0, - HFI_PROP_FRAME_RATE, - CAP_FLAG_OUTPUT_PORT, - {0}, {0}, - NULL, msm_vidc_set_q16}, - {META_SUBFRAME_OUTPUT, ENC, HEIC, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_SUBFRAME_OUTPUT, - HFI_PROP_SUBFRAME_OUTPUT, - CAP_FLAG_BITMASK}, - {COMPLEXITY, ENC, H264 | HEVC, + CAP_FLAG_OUTPUT_PORT}, + + {COMPLEXITY, ENC, H264|HEVC, 0, 100, 1, 100, V4L2_CID_MPEG_VIDC_VENC_COMPLEXITY}, + {META_MAX_NUM_REORDER_FRAMES, DEC, HEVC | H264, V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, @@ -2025,6 +1683,596 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { CAP_FLAG_BITMASK}, }; +static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kalama[] = { + /* {cap, domain, codec, + * parents, + * children, + * adjust, set} + */ + + {PIX_FMTS, ENC, H264, + {0}, + {META_ROI_INFO, IR_PERIOD}}, + + {PIX_FMTS, ENC, HEVC, + {0}, + {PROFILE, MIN_FRAME_QP, MAX_FRAME_QP, I_FRAME_QP, P_FRAME_QP, + B_FRAME_QP, META_ROI_INFO, MIN_QUALITY, BLUR_TYPES, IR_PERIOD}}, + + {PIX_FMTS, ENC, HEIC, + {0}, + {PROFILE}}, + + {PIX_FMTS, DEC, HEVC|HEIC, + {0}, + {PROFILE}}, + + {FRAME_RATE, ENC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_q16}, + + {FRAME_RATE, DEC, CODECS_ALL, + {0}, + {0}, + msm_vidc_adjust_dec_frame_rate}, + + {OPERATING_RATE, DEC, CODECS_ALL, + {0}, + {0}, + msm_vidc_adjust_dec_operating_rate}, + + {SECURE_MODE, ENC|DEC, H264|HEVC|VP9|AV1, + {0}, + {0}, + NULL, + msm_vidc_set_u32}, + + {HFLIP, ENC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_flip}, + + {VFLIP, ENC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_flip}, + + {ROTATION, ENC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_rotation}, + + {SUPER_FRAME, ENC, H264|HEVC, + {0}, + {INPUT_BUF_HOST_MAX_COUNT, OUTPUT_BUF_HOST_MAX_COUNT}, + NULL, + NULL}, + + {HEADER_MODE, ENC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_header_mode}, + + {WITHOUT_STARTCODE, ENC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_nal_length}, + + {WITHOUT_STARTCODE, DEC, AV1, + {0}, + {0}, + NULL, + msm_vidc_set_u32}, + + {REQUEST_I_FRAME, ENC, H264|HEVC, + {0}, + {0}, + NULL, + msm_vidc_set_req_sync_frame}, + + {BIT_RATE, ENC, H264|HEVC, + {ENH_LAYER_COUNT, BITRATE_MODE}, + {PEAK_BITRATE}, + msm_vidc_adjust_bitrate, + msm_vidc_set_bitrate}, + + {BITRATE_MODE, ENC, H264, + {0}, + {LTR_COUNT, IR_PERIOD, TIME_DELTA_BASED_RC, I_FRAME_QP, + P_FRAME_QP, B_FRAME_QP, ENH_LAYER_COUNT, BIT_RATE, + META_ROI_INFO, MIN_QUALITY, BITRATE_BOOST, VBV_DELAY, + PEAK_BITRATE, SLICE_MODE, CONTENT_ADAPTIVE_CODING, + BLUR_TYPES, LOWLATENCY_MODE}, + msm_vidc_adjust_bitrate_mode, + msm_vidc_set_u32_enum}, + + {BITRATE_MODE, ENC, HEVC, + {0}, + {LTR_COUNT, IR_PERIOD, TIME_DELTA_BASED_RC, I_FRAME_QP, + P_FRAME_QP, B_FRAME_QP, CONSTANT_QUALITY, ENH_LAYER_COUNT, + BIT_RATE, META_ROI_INFO, MIN_QUALITY, BITRATE_BOOST, VBV_DELAY, + PEAK_BITRATE, SLICE_MODE, CONTENT_ADAPTIVE_CODING, + BLUR_TYPES, LOWLATENCY_MODE}, + msm_vidc_adjust_bitrate_mode, + msm_vidc_set_u32_enum}, + + {BITRATE_MODE, ENC, HEIC, + {0}, + {TIME_DELTA_BASED_RC, CONSTANT_QUALITY}, + msm_vidc_adjust_bitrate_mode, + msm_vidc_set_u32_enum}, + + {CONSTANT_QUALITY, ENC, HEVC|HEIC, + {BITRATE_MODE}, + {0}, + NULL, + msm_vidc_set_constant_quality}, + + {GOP_SIZE, ENC, CODECS_ALL, + {ENH_LAYER_COUNT}, + {ALL_INTRA}, + msm_vidc_adjust_gop_size, + msm_vidc_set_gop_size}, + + {GOP_SIZE, ENC, HEIC, + {0}, + {0}, + NULL, + msm_vidc_set_u32}, + + {B_FRAME, ENC, H264|HEVC, + {ENH_LAYER_COUNT}, + {ALL_INTRA}, + msm_vidc_adjust_b_frame, + msm_vidc_set_u32}, + + {B_FRAME, ENC, HEIC, + {0}, + {0}, + NULL, + msm_vidc_set_u32}, + + {BLUR_TYPES, ENC, H264|HEVC, + {PIX_FMTS, BITRATE_MODE, MIN_QUALITY}, + {BLUR_RESOLUTION}, + msm_vidc_adjust_blur_type, + msm_vidc_set_u32_enum}, + + {BLUR_RESOLUTION, ENC, H264|HEVC, + {BLUR_TYPES}, + {0}, + msm_vidc_adjust_blur_resolution, + msm_vidc_set_blur_resolution}, + + {CSC_CUSTOM_MATRIX, ENC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_csc_custom_matrix}, + + {LOWLATENCY_MODE, ENC, H264 | HEVC, + {BITRATE_MODE}, + {STAGE}, + msm_vidc_adjust_lowlatency_mode, + NULL}, + + {LTR_COUNT, ENC, H264|HEVC, + {BITRATE_MODE, ALL_INTRA}, + {0}, + msm_vidc_adjust_ltr_count, + msm_vidc_set_u32}, + + {USE_LTR, ENC, H264|HEVC, + {0}, + {0}, + msm_vidc_adjust_use_ltr, + msm_vidc_set_use_and_mark_ltr}, + + {MARK_LTR, ENC, H264|HEVC, + {0}, + {0}, + msm_vidc_adjust_mark_ltr, + msm_vidc_set_use_and_mark_ltr}, + + {IR_PERIOD, ENC, H264|HEVC, + {BITRATE_MODE, ALL_INTRA, META_ROI_INFO, PIX_FMTS}, + {0}, + msm_vidc_adjust_ir_period, + msm_vidc_set_ir_period}, + + {AU_DELIMITER, ENC, H264|HEVC, + {0}, + {0}, + NULL, + msm_vidc_set_u32}, + + {TIME_DELTA_BASED_RC, ENC, CODECS_ALL, + {BITRATE_MODE}, + {0}, + msm_vidc_adjust_delta_based_rc, + msm_vidc_set_u32}, + + {CONTENT_ADAPTIVE_CODING, ENC, H264|HEVC, + {BITRATE_MODE, LAYER_ENABLE, LAYER_TYPE}, + {REQUEST_PREPROCESS}, + msm_vidc_adjust_brs, + msm_vidc_set_vbr_related_properties}, + + {REQUEST_PREPROCESS, ENC, H264|HEVC, + {CONTENT_ADAPTIVE_CODING, META_EVA_STATS}, + {0}, + msm_vidc_adjust_preprocess, + msm_vidc_set_preprocess}, + + {BITRATE_BOOST, ENC, H264|HEVC, + {BITRATE_MODE, MIN_QUALITY}, + {0}, + msm_vidc_adjust_bitrate_boost_iris3, + msm_vidc_set_vbr_related_properties}, + + {MIN_QUALITY, ENC, H264, + {BITRATE_MODE, ENH_LAYER_COUNT, META_ROI_INFO}, + {BLUR_TYPES}, + msm_vidc_adjust_min_quality, + msm_vidc_set_vbr_related_properties}, + + {MIN_QUALITY, ENC, HEVC, + {BITRATE_MODE, PIX_FMTS, ENH_LAYER_COUNT, + META_ROI_INFO}, + {BLUR_TYPES}, + msm_vidc_adjust_min_quality, + msm_vidc_set_vbr_related_properties}, + + {VBV_DELAY, ENC, H264|HEVC, + {BITRATE_MODE}, + {0}, + NULL, + msm_vidc_set_cbr_related_properties}, + + {PEAK_BITRATE, ENC, H264|HEVC, + {BITRATE_MODE, BIT_RATE}, + {0}, + msm_vidc_adjust_peak_bitrate, + msm_vidc_set_cbr_related_properties}, + + {MIN_FRAME_QP, ENC, H264, + {0}, + {0}, + NULL, + msm_vidc_set_min_qp}, + + {MIN_FRAME_QP, ENC, HEVC|HEIC, + {PIX_FMTS}, + {0}, + msm_vidc_adjust_hevc_min_qp, + msm_vidc_set_min_qp}, + + {MAX_FRAME_QP, ENC, H264, + {0}, + {0}, + NULL, + msm_vidc_set_max_qp}, + + {MAX_FRAME_QP, ENC, HEVC|HEIC, + {PIX_FMTS}, + {0}, + msm_vidc_adjust_hevc_max_qp, + msm_vidc_set_max_qp}, + + {I_FRAME_QP, ENC, HEVC, + {PIX_FMTS, BITRATE_MODE}, + {0}, + msm_vidc_adjust_hevc_i_frame_qp, + msm_vidc_set_frame_qp}, + + {I_FRAME_QP, ENC, H264, + {BITRATE_MODE}, + {0}, + NULL, + msm_vidc_set_frame_qp}, + + {P_FRAME_QP, ENC, HEVC, + {PIX_FMTS, BITRATE_MODE}, + {0}, + msm_vidc_adjust_hevc_p_frame_qp, + msm_vidc_set_frame_qp}, + + {P_FRAME_QP, ENC, H264, + {BITRATE_MODE}, + {0}, + NULL, + msm_vidc_set_frame_qp}, + + {B_FRAME_QP, ENC, HEVC, + {PIX_FMTS, BITRATE_MODE}, + {0}, + msm_vidc_adjust_hevc_b_frame_qp, + msm_vidc_set_frame_qp}, + + {B_FRAME_QP, ENC, H264, + {BITRATE_MODE}, + {0}, + NULL, + msm_vidc_set_frame_qp}, + + {LAYER_TYPE, ENC, H264, + {0}, + {CONTENT_ADAPTIVE_CODING}}, + + {LAYER_ENABLE, ENC, H264|HEVC, + {0}, + {CONTENT_ADAPTIVE_CODING}}, + + {ENH_LAYER_COUNT, ENC, H264|HEVC, + {BITRATE_MODE, META_EVA_STATS}, + {GOP_SIZE, B_FRAME, BIT_RATE, MIN_QUALITY}, + msm_vidc_adjust_layer_count, + msm_vidc_set_layer_count_and_type}, + + {ENH_LAYER_COUNT, DEC, AV1, + {0}, + {0}, + NULL, + msm_vidc_set_u32}, + + {L0_BR, ENC, H264|HEVC, + {0}, + {0}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, + + {L1_BR, ENC, H264|HEVC, + {0}, + {0}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, + + {L2_BR, ENC, H264|HEVC, + {0}, + {0}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, + + {L3_BR, ENC, H264|HEVC, + {0}, + {0}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, + + {L4_BR, ENC, H264|HEVC, + {0}, + {0}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, + + {L5_BR, ENC, H264|HEVC, + {0}, + {0}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, + + {ENTROPY_MODE, ENC, H264, + {PROFILE}, + {0}, + msm_vidc_adjust_entropy_mode, + msm_vidc_set_u32}, + + {PROFILE, ENC, H264, + {0}, + {ENTROPY_MODE, TRANSFORM_8X8}, + NULL, + msm_vidc_set_u32_enum}, + + {PROFILE, DEC, H264, + {0}, + {ENTROPY_MODE}, + NULL, + msm_vidc_set_u32_enum}, + + {PROFILE, ENC|DEC, HEVC|HEIC, + {PIX_FMTS}, + {0}, + msm_vidc_adjust_profile, + msm_vidc_set_u32_enum}, + + {PROFILE, DEC, VP9|AV1, + {0}, + {0}, + NULL, + msm_vidc_set_u32_enum}, + + {LEVEL, DEC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_u32_enum}, + + {LEVEL, ENC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_level}, + + {AV1_TIER, DEC, AV1, + {0}, + {0}, + NULL, + msm_vidc_set_u32_enum}, + + {HEVC_TIER, ENC|DEC, HEVC|HEIC, + {0}, + {0}, + NULL, + msm_vidc_set_u32_enum}, + + {LF_MODE, ENC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_deblock_mode}, + + {SLICE_MODE, ENC, H264|HEVC, + {BITRATE_MODE, ALL_INTRA}, + {STAGE}, + msm_vidc_adjust_slice_count, + msm_vidc_set_slice_count}, + + {TRANSFORM_8X8, ENC, H264, + {PROFILE}, + {0}, + msm_vidc_adjust_transform_8x8, + msm_vidc_set_u32}, + + {CHROMA_QP_INDEX_OFFSET, ENC, HEVC, + {0}, + {0}, + msm_vidc_adjust_chroma_qp_index_offset, + msm_vidc_set_chroma_qp_index_offset}, + + {DISPLAY_DELAY_ENABLE, DEC, H264|HEVC|VP9|AV1, + {0}, + {OUTPUT_ORDER}, + NULL, + NULL}, + + {DISPLAY_DELAY, DEC, H264|HEVC|VP9|AV1, + {0}, + {OUTPUT_ORDER}, + NULL, + NULL}, + + {OUTPUT_ORDER, DEC, H264|HEVC|VP9|AV1, + {THUMBNAIL_MODE, DISPLAY_DELAY, DISPLAY_DELAY_ENABLE}, + {0}, + msm_vidc_adjust_output_order, + msm_vidc_set_u32}, + + {INPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL, + {0}, + {0}, + msm_vidc_adjust_input_buf_host_max_count, + msm_vidc_set_u32}, + + {INPUT_BUF_HOST_MAX_COUNT, ENC, H264|HEVC, + {SUPER_FRAME}, + {0}, + msm_vidc_adjust_input_buf_host_max_count, + msm_vidc_set_u32}, + + {OUTPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL, + {0}, + {0}, + msm_vidc_adjust_output_buf_host_max_count, + msm_vidc_set_u32}, + + {OUTPUT_BUF_HOST_MAX_COUNT, ENC, H264|HEVC, + {SUPER_FRAME}, + {0}, + msm_vidc_adjust_output_buf_host_max_count, + msm_vidc_set_u32}, + + {CONCEAL_COLOR_8BIT, DEC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_u32_packed}, + + {CONCEAL_COLOR_10BIT, DEC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_u32_packed}, + + {STAGE, DEC|ENC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_stage}, + + {STAGE, ENC, H264|HEVC, + {LOWLATENCY_MODE, SLICE_MODE}, + {0}, + NULL, + msm_vidc_set_stage}, + + {PIPE, DEC|ENC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_pipe}, + + {THUMBNAIL_MODE, DEC, CODECS_ALL, + {0}, + {OUTPUT_ORDER}, + NULL, + msm_vidc_set_u32}, + + {RAP_FRAME, DEC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_u32}, + + {PRIORITY, DEC|ENC, CODECS_ALL, + {0}, + {0}, + msm_vidc_adjust_session_priority, + msm_vidc_set_session_priority}, + + {DPB_LIST, DEC, CODECS_ALL, + {0}, + {0}, + NULL, + NULL}, + + {DRAP, DEC, AV1, + {0}, + {0}, + NULL, + msm_vidc_set_u32}, + + {ALL_INTRA, ENC, H264|HEVC, + {GOP_SIZE, B_FRAME}, + {LTR_COUNT, IR_PERIOD, SLICE_MODE}, + msm_vidc_adjust_all_intra, + NULL}, + + {INPUT_METADATA_FD, ENC|DEC, CODECS_ALL, + {0}, + {0}, + NULL, + NULL}, + + {INPUT_META_VIA_REQUEST, ENC|DEC, CODECS_ALL, + {0}, + {0}, + NULL, + NULL}, + + {META_EVA_STATS, ENC, CODECS_ALL, + {0}, + {ENH_LAYER_COUNT, REQUEST_PREPROCESS}}, + + {META_ROI_INFO, ENC, H264|HEVC, + {BITRATE_MODE, PIX_FMTS}, + {MIN_QUALITY, IR_PERIOD}, + msm_vidc_adjust_roi_info, + NULL}, + + {GRID, ENC, HEIC, + {0}, + {0}, + NULL, + msm_vidc_set_u32}, +}; + /* Default UBWC config for LPDDR5 */ static struct msm_vidc_ubwc_config_data ubwc_config_kalama[] = { UBWC_CONFIG(8, 32, 16, 0, 1, 1, 1), @@ -2033,8 +2281,10 @@ static struct msm_vidc_ubwc_config_data ubwc_config_kalama[] = { static const struct msm_vidc_platform_data kalama_data = { .core_data = core_data_kalama, .core_data_size = ARRAY_SIZE(core_data_kalama), - .instance_data = instance_data_kalama, - .instance_data_size = ARRAY_SIZE(instance_data_kalama), + .inst_cap_data = instance_cap_data_kalama, + .inst_cap_data_size = ARRAY_SIZE(instance_cap_data_kalama), + .inst_cap_dependency_data = instance_cap_dependency_data_kalama, + .inst_cap_dependency_data_size = ARRAY_SIZE(instance_cap_dependency_data_kalama), .csc_data.vpe_csc_custom_bias_coeff = vpe_csc_custom_bias_coeff, .csc_data.vpe_csc_custom_matrix_coeff = vpe_csc_custom_matrix_coeff, .csc_data.vpe_csc_custom_limit_coeff = vpe_csc_custom_limit_coeff, diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 5f7f01d48a..b51e12c1b0 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -94,88 +94,74 @@ static struct msm_platform_core_capability core_data_waipio[] = { {MMRM, 1}, }; -static struct msm_platform_inst_capability instance_data_waipio[] = { +static struct msm_platform_inst_capability instance_cap_data_waipio[] = { /* {cap, domain, codec, * min, max, step_or_mask, value, * v4l2_id, * hfi_id, - * flags, - * parents, - * children, - * adjust, set} + * flags} */ {FRAME_WIDTH, DEC, CODECS_ALL, 96, 8192, 1, 1920}, + {FRAME_WIDTH, DEC, VP9, 96, 4096, 1, 1920}, + {FRAME_WIDTH, ENC, CODECS_ALL, 128, 8192, 1, 1920}, + {FRAME_WIDTH, ENC, HEVC, 96, 8192, 1, 1920}, + + {FRAME_WIDTH, ENC, HEIC, 128, 16384, 1, 16384}, + {LOSSLESS_FRAME_WIDTH, ENC, H264, 128, 4096, 1, 1920}, + {LOSSLESS_FRAME_WIDTH, ENC, HEVC, 96, 4096, 1, 1920}, + {SECURE_FRAME_WIDTH, DEC, H264|HEVC|VP9, 96, 4096, 1, 1920}, + {SECURE_FRAME_WIDTH, ENC, H264, 128, 4096, 1, 1920}, + {SECURE_FRAME_WIDTH, ENC, HEVC, 96, 4096, 1, 1920}, + {FRAME_HEIGHT, DEC, CODECS_ALL, 96, 8192, 1, 1080}, + {FRAME_HEIGHT, DEC, VP9, 96, 4096, 1, 1080}, + {FRAME_HEIGHT, ENC, CODECS_ALL, 128, 8192, 1, 1080}, + {FRAME_HEIGHT, ENC, HEVC, 96, 8192, 1, 1080}, + + {FRAME_HEIGHT, ENC, HEIC, 128, 16384, 1, 16384}, + {LOSSLESS_FRAME_HEIGHT, ENC, H264, 128, 4096, 1, 1080}, + {LOSSLESS_FRAME_HEIGHT, ENC, HEVC, 96, 4096, 1, 1080}, + {SECURE_FRAME_HEIGHT, DEC, H264|HEVC|VP9, 96, 4096, 1, 1080}, + {SECURE_FRAME_HEIGHT, ENC, H264, 128, 4096, 1, 1080}, + {SECURE_FRAME_HEIGHT, ENC, HEVC, 96, 4096, 1, 1080}, - {PIX_FMTS, ENC, H264, - MSM_VIDC_FMT_NV12, - MSM_VIDC_FMT_NV12C, - MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C, - /* Since CTSEncodeDecode test cannot handle BT 709LR, - * disabled HW RGBA encoding. - * | MSM_VIDC_FMT_RGBA8888 | MSM_VIDC_FMT_RGBA8888C, - */ - MSM_VIDC_FMT_NV12C, - 0, 0, - 0, - {0}, - {META_ROI_INFO, IR_PERIOD}}, - {PIX_FMTS, ENC, HEVC, - MSM_VIDC_FMT_NV12, - MSM_VIDC_FMT_TP10C, - MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C | - MSM_VIDC_FMT_P010 | MSM_VIDC_FMT_TP10C, - /* Since CTSEncodeDecode test cannot handle BT 709LR, - * disabled HW RGBA encoding. - * | MSM_VIDC_FMT_RGBA8888 | MSM_VIDC_FMT_RGBA8888C, - */ - MSM_VIDC_FMT_NV12C, - 0, 0, - 0, - {0}, - {/* Do not change order of META_ROI_INFO, MIN_QUALITY, BLUR_TYPES - * Since parent -> children relationship for these cap_ids is - * as follows: - * META_ROI_INFO -> MIN_QUALITY -> BLUR_TYPES - */ - PROFILE, MIN_FRAME_QP, MAX_FRAME_QP, I_FRAME_QP, P_FRAME_QP, - B_FRAME_QP, META_ROI_INFO, MIN_QUALITY, BLUR_TYPES, - IR_PERIOD}}, - {PIX_FMTS, DEC, HEVC|HEIC, - MSM_VIDC_FMT_NV12, - MSM_VIDC_FMT_TP10C, - MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C | - MSM_VIDC_FMT_P010 | MSM_VIDC_FMT_TP10C, - MSM_VIDC_FMT_NV12C, - 0, 0, - 0, - {0}, - {PROFILE}}, - - {PIX_FMTS, DEC, H264, + {PIX_FMTS, ENC|DEC, H264, MSM_VIDC_FMT_NV12, MSM_VIDC_FMT_NV12C, MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C, MSM_VIDC_FMT_NV12C}, - {PIX_FMTS, DEC, VP9, + {PIX_FMTS, ENC|DEC, HEVC|VP9, + MSM_VIDC_FMT_NV12, + MSM_VIDC_FMT_TP10C, + MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C | + MSM_VIDC_FMT_P010 | MSM_VIDC_FMT_TP10C, + MSM_VIDC_FMT_NV12C}, + + {PIX_FMTS, ENC, HEIC, + MSM_VIDC_FMT_NV12, + MSM_VIDC_FMT_P010, + MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_P010, + MSM_VIDC_FMT_NV12}, + + {PIX_FMTS, DEC, HEIC, MSM_VIDC_FMT_NV12, MSM_VIDC_FMT_TP10C, MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C | @@ -184,6 +170,10 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {MIN_BUFFERS_INPUT, ENC|DEC, CODECS_ALL, 0, 64, 1, 4, V4L2_CID_MIN_BUFFERS_FOR_OUTPUT}, + + {MIN_BUFFERS_INPUT, ENC|DEC, HEIC, 0, 64, 1, 1, + V4L2_CID_MIN_BUFFERS_FOR_OUTPUT}, + {MIN_BUFFERS_OUTPUT, ENC|DEC, CODECS_ALL, 0, 64, 1, 4, V4L2_CID_MIN_BUFFERS_FOR_CAPTURE, @@ -192,31 +182,57 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { /* (8192 * 4320) / 256 */ {MBPF, ENC, CODECS_ALL, 64, 138240, 1, 138240}, + {MBPF, ENC, HEVC, 36, 138240, 1, 138240}, + + /* ((16384x16384)/256) */ + {MBPF, ENC, HEIC, 36, 1048576, 1, 1048576}, + {MBPF, DEC, CODECS_ALL, 36, 138240, 1, 138240}, + /* (4096 * 2304) / 256 */ {MBPF, DEC, VP9, 36, 36864, 1, 36864}, + + /* ((8192x8192)/256) */ + {MBPF, DEC, HEIC, 64, 262144, 1, 262144 }, + /* (4096 * 2304) / 256 */ - {LOSSLESS_MBPF, ENC, H264, 64, 36864, 1, 36864}, - {LOSSLESS_MBPF, ENC, HEVC, 36, 36864, 1, 36864}, + {LOSSLESS_MBPF, ENC, H264|HEVC, 64, 36864, 1, 36864}, + /* Batch Mode Decode */ /* TODO: update with new values based on updated voltage corner */ {BATCH_MBPF, DEC, H264|HEVC|VP9, 64, 34816, 1, 34816}, + /* (4096 * 2304) / 256 */ {BATCH_FPS, DEC, H264|HEVC|VP9, 1, 120, 1, 120}, + {SECURE_MBPF, ENC|DEC, H264|HEVC|VP9, 64, 36864, 1, 36864}, + {SECURE_MBPF, ENC, HEVC, 36, 36864, 1, 36864}, + /* ((1920 * 1088) / 256) * 480 fps */ {MBPS, ENC, CODECS_ALL, 64, 3916800, 1, 3916800}, + {MBPS, ENC, HEVC, 36, 3916800, 1, 3916800}, + + /* ((16384x16384)/256)@1fps */ + {MBPS, ENC, HEIC, 36, 1048576, 1, 1048576}, + /* ((1920 * 1088) / 256) * 960 fps */ {MBPS, DEC, CODECS_ALL, 64, 7833600, 1, 7833600}, + /* ((4096 * 2304) / 256) * 120 */ {MBPS, DEC, VP9, 36, 4423680, 1, 4423680}, + + /* ((8192x8192)/256)@1fps */ + {MBPS, DEC, HEIC, 64, 262144, 1, 262144 }, + /* ((4096 * 2304) / 256) * 60 fps */ {POWER_SAVE_MBPS, ENC, CODECS_ALL, 0, 2211840, 1, 2211840}, + /* Enable check mbps for encoder */ {CHECK_MBPS, ENC, CODECS_ALL, 0, 1, 1, 1}, + /* Disable check mbps for encoder */ {CHECK_MBPS, DEC, CODECS_ALL, 0, 1, 1, 0}, @@ -225,9 +241,14 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 1, (DEFAULT_FPS << 16), 0, HFI_PROP_FRAME_RATE, - CAP_FLAG_OUTPUT_PORT, - {0}, {0}, - NULL, msm_vidc_set_q16}, + CAP_FLAG_OUTPUT_PORT}, + + {FRAME_RATE, ENC, HEIC, + (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), + 1, (MINIMUM_FPS << 16), + 0, + HFI_PROP_FRAME_RATE, + CAP_FLAG_OUTPUT_PORT}, {FRAME_RATE, DEC, CODECS_ALL, (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), @@ -235,9 +256,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_CID_MPEG_VIDC_FRAME_RATE, 0, CAP_FLAG_OUTPUT_PORT | - CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - msm_vidc_adjust_dec_frame_rate}, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, {FRAME_RATE, DEC, VP9, (MINIMUM_FPS << 16), (MAXIMUM_OVERRIDE_VP9_FPS << 16), @@ -245,9 +264,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_CID_MPEG_VIDC_FRAME_RATE, 0, CAP_FLAG_OUTPUT_PORT | - CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - msm_vidc_adjust_dec_frame_rate}, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, {OPERATING_RATE, ENC, CODECS_ALL, (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), @@ -259,9 +276,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_CID_MPEG_VIDC_OPERATING_RATE, 0, CAP_FLAG_OUTPUT_PORT | - CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - msm_vidc_adjust_dec_operating_rate}, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, {OPERATING_RATE, DEC, VP9, (MINIMUM_FPS << 16), (MAXIMUM_OVERRIDE_VP9_FPS << 16), @@ -269,9 +284,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_CID_MPEG_VIDC_OPERATING_RATE, 0, CAP_FLAG_OUTPUT_PORT | - CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - msm_vidc_adjust_dec_operating_rate}, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, {INPUT_RATE, ENC|DEC, CODECS_ALL, (MINIMUM_FPS << 16), INT_MAX, @@ -284,13 +297,21 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { {SCALE_FACTOR, ENC, H264|HEVC, 1, 8, 1, 8}, {MB_CYCLES_VSP, ENC, CODECS_ALL, 25, 25, 1, 25}, + {MB_CYCLES_VSP, DEC, CODECS_ALL, 25, 25, 1, 25}, + {MB_CYCLES_VSP, DEC, VP9, 60, 60, 1, 60}, + {MB_CYCLES_VPP, ENC, CODECS_ALL, 675, 675, 1, 675}, + {MB_CYCLES_VPP, DEC, CODECS_ALL, 200, 200, 1, 200}, + {MB_CYCLES_LP, ENC, CODECS_ALL, 320, 320, 1, 320}, + {MB_CYCLES_LP, DEC, CODECS_ALL, 200, 200, 1, 200}, + {MB_CYCLES_FW, ENC|DEC, CODECS_ALL, 326389, 326389, 1, 326389}, + {MB_CYCLES_FW_VPP, ENC|DEC, CODECS_ALL, 44156, 44156, 1, 44156}, {SECURE_MODE, ENC|DEC, H264|HEVC|VP9, @@ -298,10 +319,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDC_SECURE, HFI_PROP_SECURE, - CAP_FLAG_NONE, - {0}, - {0}, - NULL, msm_vidc_set_u32}, + CAP_FLAG_NONE}, {TS_REORDER, DEC, H264|HEVC, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, @@ -315,10 +333,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_CID_HFLIP, HFI_PROP_FLIP, CAP_FLAG_OUTPUT_PORT | - CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, - {0}, - {0}, - NULL, msm_vidc_set_flip}, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, {VFLIP, ENC, CODECS_ALL, V4L2_MPEG_MSM_VIDC_DISABLE, @@ -327,27 +342,18 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_CID_VFLIP, HFI_PROP_FLIP, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {0}, - {0}, - NULL, msm_vidc_set_flip}, + CAP_FLAG_DYNAMIC_ALLOWED}, {ROTATION, ENC, CODECS_ALL, 0, 270, 90, 0, V4L2_CID_ROTATE, HFI_PROP_ROTATION, - CAP_FLAG_OUTPUT_PORT, - {0}, - {0}, - NULL, msm_vidc_set_rotation}, + CAP_FLAG_OUTPUT_PORT}, {SUPER_FRAME, ENC, H264|HEVC, 0, 32, 1, 0, V4L2_CID_MPEG_VIDC_SUPERFRAME, 0, - CAP_FLAG_NONE, - {0}, - {INPUT_BUF_HOST_MAX_COUNT, OUTPUT_BUF_HOST_MAX_COUNT}, - NULL, NULL}, + CAP_FLAG_NONE}, {SLICE_INTERFACE, DEC, CODECS_ALL, 0, 0, 0, 0, @@ -362,9 +368,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE, V4L2_CID_MPEG_VIDEO_HEADER_MODE, HFI_PROP_SEQ_HEADER_MODE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, {0}, - NULL, msm_vidc_set_header_mode}, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, {PREPEND_SPSPPS_TO_IDR, ENC, CODECS_ALL, V4L2_MPEG_MSM_VIDC_DISABLE, @@ -378,9 +382,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE, HFI_PROP_NAL_LENGTH_FIELD, - CAP_FLAG_OUTPUT_PORT, - {0}, {0}, - NULL, msm_vidc_set_nal_length}, + CAP_FLAG_OUTPUT_PORT}, {NAL_LENGTH_FIELD, ENC, CODECS_ALL, V4L2_MPEG_VIDEO_HEVC_SIZE_0, @@ -399,9 +401,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 0, 0, 0, 0, V4L2_CID_MPEG_VIDEO_FORCE_KEY_FRAME, HFI_PROP_REQUEST_SYNC_FRAME, - CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - NULL, msm_vidc_set_req_sync_frame}, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, /* Enc: Keeping CABAC and CAVLC as same bitrate. * Dec: there's no use of Bitrate cap @@ -411,9 +411,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_CID_MPEG_VIDEO_BITRATE, HFI_PROP_TOTAL_BITRATE, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {ENH_LAYER_COUNT, BITRATE_MODE}, {PEAK_BITRATE}, - msm_vidc_adjust_bitrate, msm_vidc_set_bitrate}, + CAP_FLAG_DYNAMIC_ALLOWED}, {BITRATE_MODE, ENC, H264, V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, @@ -423,14 +421,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, V4L2_CID_MPEG_VIDEO_BITRATE_MODE, HFI_PROP_RATE_CONTROL, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, - {LTR_COUNT, IR_PERIOD, TIME_DELTA_BASED_RC, I_FRAME_QP, - P_FRAME_QP, B_FRAME_QP, ENH_LAYER_COUNT, BIT_RATE, - META_ROI_INFO, MIN_QUALITY, BITRATE_BOOST, VBV_DELAY, - PEAK_BITRATE, SLICE_MODE, CONTENT_ADAPTIVE_CODING, - BLUR_TYPES, LOWLATENCY_MODE}, - msm_vidc_adjust_bitrate_mode, msm_vidc_set_u32_enum}, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, {BITRATE_MODE, ENC, HEVC, V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, @@ -441,14 +432,16 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, V4L2_CID_MPEG_VIDEO_BITRATE_MODE, HFI_PROP_RATE_CONTROL, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, - {LTR_COUNT, IR_PERIOD, TIME_DELTA_BASED_RC, I_FRAME_QP, - P_FRAME_QP, B_FRAME_QP, CONSTANT_QUALITY, ENH_LAYER_COUNT, - BIT_RATE, META_ROI_INFO, MIN_QUALITY, BITRATE_BOOST, VBV_DELAY, - PEAK_BITRATE, SLICE_MODE, CONTENT_ADAPTIVE_CODING, - BLUR_TYPES, LOWLATENCY_MODE}, - msm_vidc_adjust_bitrate_mode, msm_vidc_set_u32_enum}, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {BITRATE_MODE, ENC, HEIC, + V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, + V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CQ), + V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, + V4L2_CID_MPEG_VIDEO_BITRATE_MODE, + HFI_PROP_RATE_CONTROL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, {LOSSLESS, ENC, HEVC, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, @@ -476,19 +469,28 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_CID_MPEG_VIDEO_CONSTANT_QUALITY, HFI_PROP_CONSTANT_QUALITY, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {BITRATE_MODE}, {0}, - NULL, msm_vidc_set_constant_quality}, + CAP_FLAG_DYNAMIC_ALLOWED}, + + {CONSTANT_QUALITY, ENC, HEIC, + 1, MAX_CONSTANT_QUALITY, 1, 100, + V4L2_CID_MPEG_VIDEO_CONSTANT_QUALITY, + HFI_PROP_CONSTANT_QUALITY, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, {GOP_SIZE, ENC, CODECS_ALL, 0, INT_MAX, 1, 2 * DEFAULT_FPS - 1, V4L2_CID_MPEG_VIDEO_GOP_SIZE, HFI_PROP_MAX_GOP_FRAMES, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {ENH_LAYER_COUNT}, - {ALL_INTRA}, - msm_vidc_adjust_gop_size, msm_vidc_set_gop_size}, + CAP_FLAG_DYNAMIC_ALLOWED}, + + {GOP_SIZE, ENC, HEIC, + 0, INT_MAX, 1, 0 /* all intra */, + V4L2_CID_MPEG_VIDEO_GOP_SIZE, + HFI_PROP_MAX_GOP_FRAMES, + CAP_FLAG_OUTPUT_PORT | + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, {GOP_CLOSURE, ENC, H264|HEVC, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, @@ -500,10 +502,14 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 0, 7, 1, 0, V4L2_CID_MPEG_VIDEO_B_FRAMES, HFI_PROP_MAX_B_FRAMES, - CAP_FLAG_OUTPUT_PORT, - {ENH_LAYER_COUNT}, - {ALL_INTRA}, - msm_vidc_adjust_b_frame, msm_vidc_set_u32}, + CAP_FLAG_OUTPUT_PORT}, + + {B_FRAME, ENC, HEIC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDEO_B_FRAMES, + HFI_PROP_MAX_B_FRAMES, + CAP_FLAG_OUTPUT_PORT}, {BLUR_TYPES, ENC, H264|HEVC, VIDC_BLUR_NONE, VIDC_BLUR_ADAPTIVE, @@ -511,20 +517,14 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { VIDC_BLUR_ADAPTIVE, V4L2_CID_MPEG_VIDC_VIDEO_BLUR_TYPES, HFI_PROP_BLUR_TYPES, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {PIX_FMTS, BITRATE_MODE, CONTENT_ADAPTIVE_CODING, MIN_QUALITY}, - {BLUR_RESOLUTION}, - msm_vidc_adjust_blur_type_iris2, msm_vidc_set_u32_enum}, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, {BLUR_RESOLUTION, ENC, H264|HEVC, 0, S32_MAX, 1, 0, V4L2_CID_MPEG_VIDC_VIDEO_BLUR_RESOLUTION, HFI_PROP_BLUR_RESOLUTION, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {BLUR_TYPES}, - {0}, - msm_vidc_adjust_blur_resolution, msm_vidc_set_blur_resolution}, + CAP_FLAG_DYNAMIC_ALLOWED}, {CSC, ENC, CODECS_ALL, V4L2_MPEG_MSM_VIDC_DISABLE, @@ -539,19 +539,14 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDC_VIDEO_VPE_CSC_CUSTOM_MATRIX, HFI_PROP_CSC_MATRIX, - CAP_FLAG_OUTPUT_PORT, - {0}, {0}, - NULL, msm_vidc_set_csc_custom_matrix}, + CAP_FLAG_OUTPUT_PORT}, - {LOWLATENCY_MODE, ENC, H264 | HEVC, + {LOWLATENCY_MODE, ENC, H264|HEVC, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDC_LOWLATENCY_REQUEST, 0, - CAP_FLAG_NONE, - {BITRATE_MODE}, - {STAGE}, - msm_vidc_adjust_lowlatency_mode, NULL}, + CAP_FLAG_NONE}, {LOWLATENCY_MODE, DEC, H264|HEVC|VP9, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, @@ -564,9 +559,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 0, 2, 1, 0, V4L2_CID_MPEG_VIDEO_LTR_COUNT, HFI_PROP_LTR_COUNT, - CAP_FLAG_OUTPUT_PORT, - {BITRATE_MODE, ALL_INTRA}, {0}, - msm_vidc_adjust_ltr_count, msm_vidc_set_u32}, + CAP_FLAG_OUTPUT_PORT}, {USE_LTR, ENC, H264|HEVC, INVALID_DEFAULT_MARK_OR_USE_LTR, @@ -574,9 +567,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 1, INVALID_DEFAULT_MARK_OR_USE_LTR, V4L2_CID_MPEG_VIDEO_USE_LTR_FRAMES, HFI_PROP_LTR_USE, - CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - msm_vidc_adjust_use_ltr, msm_vidc_set_use_and_mark_ltr}, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, {MARK_LTR, ENC, H264|HEVC, INVALID_DEFAULT_MARK_OR_USE_LTR, @@ -584,9 +575,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 1, INVALID_DEFAULT_MARK_OR_USE_LTR, V4L2_CID_MPEG_VIDEO_FRAME_LTR_INDEX, HFI_PROP_LTR_MARK, - CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - msm_vidc_adjust_mark_ltr, msm_vidc_set_use_and_mark_ltr}, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, {BASELAYER_PRIORITY, ENC, H264, 0, MAX_BASE_LAYER_PRIORITY_ID, 1, 0, @@ -608,10 +597,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_CID_MPEG_VIDC_INTRA_REFRESH_PERIOD, 0, CAP_FLAG_INPUT_PORT | CAP_FLAG_OUTPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {BITRATE_MODE, ALL_INTRA, META_ROI_INFO, PIX_FMTS}, - {0}, - msm_vidc_adjust_ir_period, msm_vidc_set_ir_period}, + CAP_FLAG_DYNAMIC_ALLOWED}, {AU_DELIMITER, ENC, H264|HEVC, V4L2_MPEG_MSM_VIDC_DISABLE, @@ -619,29 +605,28 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDEO_AU_DELIMITER, HFI_PROP_AUD, - CAP_FLAG_OUTPUT_PORT, - {0}, {0}, - NULL, msm_vidc_set_u32}, + CAP_FLAG_OUTPUT_PORT}, - {TIME_DELTA_BASED_RC, ENC, CODECS_ALL, + {TIME_DELTA_BASED_RC, ENC, H264|HEVC, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_ENABLE, V4L2_CID_MPEG_VIDC_TIME_DELTA_BASED_RC, HFI_PROP_TIME_DELTA_BASED_RATE_CONTROL, - CAP_FLAG_OUTPUT_PORT, - {BITRATE_MODE}, {0}, - msm_vidc_adjust_delta_based_rc, msm_vidc_set_u32}, + CAP_FLAG_OUTPUT_PORT}, + + {TIME_DELTA_BASED_RC, ENC, HEIC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_TIME_DELTA_BASED_RC, + HFI_PROP_TIME_DELTA_BASED_RATE_CONTROL, + CAP_FLAG_OUTPUT_PORT}, {CONTENT_ADAPTIVE_CODING, ENC, H264|HEVC, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_ENABLE, V4L2_CID_MPEG_VIDC_CONTENT_ADAPTIVE_CODING, HFI_PROP_CONTENT_ADAPTIVE_CODING, - CAP_FLAG_OUTPUT_PORT, - {BITRATE_MODE, LAYER_ENABLE, LAYER_TYPE}, - {BLUR_TYPES}, - msm_vidc_adjust_brs, - msm_vidc_set_vbr_related_properties}, + CAP_FLAG_OUTPUT_PORT}, {REQUEST_PREPROCESS, ENC, H264|HEVC, MSM_VIDC_PREPROCESS_NONE, @@ -655,69 +640,39 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 0, MAX_BITRATE_BOOST, 25, MAX_BITRATE_BOOST, V4L2_CID_MPEG_VIDC_QUALITY_BITRATE_BOOST, HFI_PROP_BITRATE_BOOST, - CAP_FLAG_OUTPUT_PORT, - {BITRATE_MODE, MIN_QUALITY}, - {0}, - msm_vidc_adjust_bitrate_boost, - msm_vidc_set_vbr_related_properties}, + CAP_FLAG_OUTPUT_PORT}, - {MIN_QUALITY, ENC, H264, + {MIN_QUALITY, ENC, H264|HEVC, 0, MAX_SUPPORTED_MIN_QUALITY, 70, MAX_SUPPORTED_MIN_QUALITY, 0, HFI_PROP_MAINTAIN_MIN_QUALITY, - CAP_FLAG_OUTPUT_PORT, - {BITRATE_MODE, ENH_LAYER_COUNT, META_ROI_INFO}, - {CONTENT_ADAPTIVE_CODING, BITRATE_BOOST, BLUR_TYPES}, - msm_vidc_adjust_min_quality, - msm_vidc_set_vbr_related_properties}, - - {MIN_QUALITY, ENC, HEVC, - 0, MAX_SUPPORTED_MIN_QUALITY, 70, MAX_SUPPORTED_MIN_QUALITY, - 0, - HFI_PROP_MAINTAIN_MIN_QUALITY, - CAP_FLAG_OUTPUT_PORT, - {BITRATE_MODE, PIX_FMTS, ENH_LAYER_COUNT, - META_ROI_INFO}, - {CONTENT_ADAPTIVE_CODING, BITRATE_BOOST, BLUR_TYPES}, - msm_vidc_adjust_min_quality, - msm_vidc_set_vbr_related_properties}, + CAP_FLAG_OUTPUT_PORT}, {VBV_DELAY, ENC, H264|HEVC, 200, 300, 100, 300, V4L2_CID_MPEG_VIDEO_VBV_DELAY, HFI_PROP_VBV_DELAY, - CAP_FLAG_OUTPUT_PORT, - {BITRATE_MODE}, - {0}, - NULL, msm_vidc_set_cbr_related_properties}, + CAP_FLAG_OUTPUT_PORT}, {PEAK_BITRATE, ENC, H264|HEVC, - /* default peak bitrate is 10% larger than avrg bitrate */ + /* default peak bitrate is 10% larger than avg bitrate */ 1, MAX_BITRATE, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_BITRATE_PEAK, HFI_PROP_TOTAL_PEAK_BITRATE, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {BITRATE_MODE, BIT_RATE}, - {0}, - msm_vidc_adjust_peak_bitrate, - msm_vidc_set_cbr_related_properties}, + CAP_FLAG_DYNAMIC_ALLOWED}, {MIN_FRAME_QP, ENC, H264, MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, V4L2_CID_MPEG_VIDEO_H264_MIN_QP, HFI_PROP_MIN_QP_PACKED, - CAP_FLAG_OUTPUT_PORT, - {0}, {0}, - NULL, msm_vidc_set_min_qp}, + CAP_FLAG_OUTPUT_PORT}, {MIN_FRAME_QP, ENC, HEVC|HEIC, MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP, HFI_PROP_MIN_QP_PACKED, - CAP_FLAG_OUTPUT_PORT, - {PIX_FMTS}, {0}, - msm_vidc_adjust_hevc_min_qp, msm_vidc_set_min_qp}, + CAP_FLAG_OUTPUT_PORT}, {I_FRAME_MIN_QP, ENC, H264, MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, @@ -747,17 +702,13 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { MIN_QP_8BIT, MAX_QP, 1, MAX_QP, V4L2_CID_MPEG_VIDEO_H264_MAX_QP, HFI_PROP_MAX_QP_PACKED, - CAP_FLAG_OUTPUT_PORT, - {0}, {0}, - NULL, msm_vidc_set_max_qp}, + CAP_FLAG_OUTPUT_PORT}, {MAX_FRAME_QP, ENC, HEVC|HEIC, MIN_QP_10BIT, MAX_QP, 1, MAX_QP, V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP, HFI_PROP_MAX_QP_PACKED, - CAP_FLAG_OUTPUT_PORT, - {PIX_FMTS}, {0}, - msm_vidc_adjust_hevc_max_qp, msm_vidc_set_max_qp}, + CAP_FLAG_OUTPUT_PORT}, {I_FRAME_MAX_QP, ENC, H264, MIN_QP_8BIT, MAX_QP, 1, MAX_QP, @@ -788,54 +739,42 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP, HFI_PROP_QP_PACKED, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {PIX_FMTS, BITRATE_MODE}, {0}, - msm_vidc_adjust_hevc_i_frame_qp, msm_vidc_set_frame_qp}, + CAP_FLAG_DYNAMIC_ALLOWED}, {I_FRAME_QP, ENC, H264, MIN_QP_8BIT, MAX_QP, 1, DEFAULT_QP, V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP, HFI_PROP_QP_PACKED, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {BITRATE_MODE}, {0}, - NULL, msm_vidc_set_frame_qp}, + CAP_FLAG_DYNAMIC_ALLOWED}, {P_FRAME_QP, ENC, HEVC, MIN_QP_10BIT, MAX_QP, 1, DEFAULT_QP, V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP, HFI_PROP_QP_PACKED, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {PIX_FMTS, BITRATE_MODE}, {0}, - msm_vidc_adjust_hevc_p_frame_qp, msm_vidc_set_frame_qp}, + CAP_FLAG_DYNAMIC_ALLOWED}, {P_FRAME_QP, ENC, H264, MIN_QP_8BIT, MAX_QP, 1, DEFAULT_QP, V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP, HFI_PROP_QP_PACKED, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {BITRATE_MODE}, {0}, - NULL, msm_vidc_set_frame_qp}, + CAP_FLAG_DYNAMIC_ALLOWED}, {B_FRAME_QP, ENC, HEVC, MIN_QP_10BIT, MAX_QP, 1, DEFAULT_QP, V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP, HFI_PROP_QP_PACKED, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {PIX_FMTS, BITRATE_MODE}, {0}, - msm_vidc_adjust_hevc_b_frame_qp, msm_vidc_set_frame_qp}, + CAP_FLAG_DYNAMIC_ALLOWED}, {B_FRAME_QP, ENC, H264, MIN_QP_8BIT, MAX_QP, 1, DEFAULT_QP, V4L2_CID_MPEG_VIDEO_H264_B_FRAME_QP, HFI_PROP_QP_PACKED, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {BITRATE_MODE}, {0}, - NULL, msm_vidc_set_frame_qp}, + CAP_FLAG_DYNAMIC_ALLOWED}, {LAYER_TYPE, ENC, HEVC, V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B, @@ -845,8 +784,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P, V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE, HFI_PROP_LAYER_ENCODING_TYPE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, {CONTENT_ADAPTIVE_CODING}}, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, {LAYER_TYPE, ENC, H264, V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_B, @@ -856,169 +794,118 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P, V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_TYPE, HFI_PROP_LAYER_ENCODING_TYPE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, {CONTENT_ADAPTIVE_CODING}}, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, {LAYER_ENABLE, ENC, H264, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING, HFI_PROP_LAYER_ENCODING_TYPE, - CAP_FLAG_OUTPUT_PORT, - {0}, {CONTENT_ADAPTIVE_CODING}}, + CAP_FLAG_OUTPUT_PORT}, {LAYER_ENABLE, ENC, HEVC, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, 0, 0, - CAP_FLAG_OUTPUT_PORT, - {0}, - {CONTENT_ADAPTIVE_CODING}}, + CAP_FLAG_OUTPUT_PORT}, {ENH_LAYER_COUNT, ENC, HEVC, 0, 5, 1, 0, V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER, HFI_PROP_LAYER_COUNT, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {BITRATE_MODE, META_EVA_STATS}, - {GOP_SIZE, B_FRAME, BIT_RATE, MIN_QUALITY}, - msm_vidc_adjust_layer_count, msm_vidc_set_layer_count_and_type}, + CAP_FLAG_DYNAMIC_ALLOWED}, {ENH_LAYER_COUNT, ENC, H264, 0, 5, 1, 0, V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_LAYER, HFI_PROP_LAYER_COUNT, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {BITRATE_MODE, META_EVA_STATS}, - {GOP_SIZE, B_FRAME, BIT_RATE, MIN_QUALITY}, - msm_vidc_adjust_layer_count, msm_vidc_set_layer_count_and_type}, - - /* - * layer bitrate is treated as BIT_RATE cap sibling and - * is handled in bitrate adjust and set functions - */ - {L0_BR, ENC, HEVC, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L0_BR, - HFI_PROP_BITRATE_LAYER1, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, - - {L1_BR, ENC, HEVC, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L1_BR, - HFI_PROP_BITRATE_LAYER2, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, - - {L2_BR, ENC, HEVC, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L2_BR, - HFI_PROP_BITRATE_LAYER3, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, - - {L3_BR, ENC, HEVC, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L3_BR, - HFI_PROP_BITRATE_LAYER4, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, - - {L4_BR, ENC, HEVC, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L4_BR, - HFI_PROP_BITRATE_LAYER5, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, - - {L5_BR, ENC, HEVC, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L5_BR, - HFI_PROP_BITRATE_LAYER6, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, + CAP_FLAG_DYNAMIC_ALLOWED}, {L0_BR, ENC, H264, 1, MAX_BITRATE, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L0_BR, HFI_PROP_BITRATE_LAYER1, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L0_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L0_BR, + HFI_PROP_BITRATE_LAYER1, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, {L1_BR, ENC, H264, 1, MAX_BITRATE, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L1_BR, HFI_PROP_BITRATE_LAYER2, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L1_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L1_BR, + HFI_PROP_BITRATE_LAYER2, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, {L2_BR, ENC, H264, 1, MAX_BITRATE, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L2_BR, HFI_PROP_BITRATE_LAYER3, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L2_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L2_BR, + HFI_PROP_BITRATE_LAYER3, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, {L3_BR, ENC, H264, 1, MAX_BITRATE, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L3_BR, HFI_PROP_BITRATE_LAYER4, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, + CAP_FLAG_DYNAMIC_ALLOWED}, + {L3_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L3_BR, + HFI_PROP_BITRATE_LAYER4, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, {L4_BR, ENC, H264, 1, MAX_BITRATE, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L4_BR, HFI_PROP_BITRATE_LAYER5, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L4_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L4_BR, + HFI_PROP_BITRATE_LAYER5, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, {L5_BR, ENC, H264, 1, MAX_BITRATE, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L5_BR, HFI_PROP_BITRATE_LAYER6, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L5_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L5_BR, + HFI_PROP_BITRATE_LAYER6, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, {ENTROPY_MODE, ENC, H264, V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC, @@ -1028,10 +915,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, V4L2_CID_MPEG_VIDEO_H264_ENTROPY_MODE, HFI_PROP_CABAC_SESSION, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {PROFILE}, - {0}, - msm_vidc_adjust_entropy_mode, msm_vidc_set_u32}, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, {ENTROPY_MODE, DEC, H264|HEVC|VP9, V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC, @@ -1042,8 +926,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 0, HFI_PROP_CABAC_SESSION}, - /* H264 does not support 10 bit, PIX_FMTS would not be a Parent for this */ - {PROFILE, ENC, H264, + {PROFILE, ENC|DEC, H264, V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE, V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH, BIT(V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE) | @@ -1054,26 +937,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_MPEG_VIDEO_H264_PROFILE_HIGH, V4L2_CID_MPEG_VIDEO_H264_PROFILE, HFI_PROP_PROFILE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, - {ENTROPY_MODE, TRANSFORM_8X8}, - NULL, msm_vidc_set_u32_enum}, - - {PROFILE, DEC, H264, - V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE, - V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH, - BIT(V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE) | - BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH) | - BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_BASELINE) | - BIT(V4L2_MPEG_VIDEO_H264_PROFILE_MAIN) | - BIT(V4L2_MPEG_VIDEO_H264_PROFILE_HIGH), - V4L2_MPEG_VIDEO_H264_PROFILE_HIGH, - V4L2_CID_MPEG_VIDEO_H264_PROFILE, - HFI_PROP_PROFILE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, - {ENTROPY_MODE}, - NULL, msm_vidc_set_u32_enum}, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, {PROFILE, ENC|DEC, HEVC|HEIC, V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN, @@ -1085,10 +949,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN, V4L2_CID_MPEG_VIDEO_HEVC_PROFILE, HFI_PROP_PROFILE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {PIX_FMTS}, - {0}, - msm_vidc_adjust_profile, msm_vidc_set_u32_enum}, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, {PROFILE, DEC, VP9, V4L2_MPEG_VIDEO_VP9_PROFILE_0, @@ -1098,33 +959,52 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_MPEG_VIDEO_VP9_PROFILE_0, V4L2_CID_MPEG_VIDEO_VP9_PROFILE, HFI_PROP_PROFILE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, - {0}, - NULL, msm_vidc_set_u32_enum}, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - {LEVEL, DEC, VP9, - V4L2_MPEG_VIDEO_VP9_LEVEL_1_0, - V4L2_MPEG_VIDEO_VP9_LEVEL_6_0, - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_1_0) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_1_1) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_2_0) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_2_1) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_3_0) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_3_1) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_4_0) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_4_1) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_0) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_1) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_2) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_6_0), - V4L2_MPEG_VIDEO_VP9_LEVEL_6_0, - V4L2_CID_MPEG_VIDEO_VP9_LEVEL, + {LEVEL, ENC, H264, + V4L2_MPEG_VIDEO_H264_LEVEL_1_0, + V4L2_MPEG_VIDEO_H264_LEVEL_6_0, + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1B) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_3) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_0), + V4L2_MPEG_VIDEO_H264_LEVEL_5_0, + V4L2_CID_MPEG_VIDEO_H264_LEVEL, HFI_PROP_LEVEL, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, - {0}, - NULL, msm_vidc_set_u32_enum}, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LEVEL, ENC, HEVC|HEIC, + V4L2_MPEG_VIDEO_HEVC_LEVEL_1, + V4L2_MPEG_VIDEO_HEVC_LEVEL_6, + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6), + V4L2_MPEG_VIDEO_HEVC_LEVEL_5, + V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, {LEVEL, DEC, H264, V4L2_MPEG_VIDEO_H264_LEVEL_1_0, @@ -1151,39 +1031,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_MPEG_VIDEO_H264_LEVEL_6_1, V4L2_CID_MPEG_VIDEO_H264_LEVEL, HFI_PROP_LEVEL, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, - {0}, - NULL, msm_vidc_set_u32_enum}, - - {LEVEL, ENC, H264, - V4L2_MPEG_VIDEO_H264_LEVEL_1_0, - V4L2_MPEG_VIDEO_H264_LEVEL_6_0, - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1B) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_3) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_0), - V4L2_MPEG_VIDEO_H264_LEVEL_5_0, - V4L2_CID_MPEG_VIDEO_H264_LEVEL, - HFI_PROP_LEVEL, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, - {0}, - NULL, msm_vidc_set_level}, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, {LEVEL, DEC, HEVC|HEIC, V4L2_MPEG_VIDEO_HEVC_LEVEL_1, @@ -1203,36 +1051,27 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1, V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, HFI_PROP_LEVEL, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, - {0}, - NULL, msm_vidc_set_u32_enum}, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - {LEVEL, ENC, HEVC|HEIC, - V4L2_MPEG_VIDEO_HEVC_LEVEL_1, - V4L2_MPEG_VIDEO_HEVC_LEVEL_6, - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6), - V4L2_MPEG_VIDEO_HEVC_LEVEL_5, - V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, + {LEVEL, DEC, VP9, + V4L2_MPEG_VIDEO_VP9_LEVEL_1_0, + V4L2_MPEG_VIDEO_VP9_LEVEL_6_0, + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_1_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_1_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_2_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_3_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_4_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_2) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_6_0), + V4L2_MPEG_VIDEO_VP9_LEVEL_6_0, + V4L2_CID_MPEG_VIDEO_VP9_LEVEL, HFI_PROP_LEVEL, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, - {0}, - NULL, msm_vidc_set_level}, - - /* TODO: Bring the VP9 Level upstream GKI change, and level cap here: - * go/videogki - */ + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, {HEVC_TIER, ENC|DEC, HEVC, V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, @@ -1242,10 +1081,16 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_MPEG_VIDEO_HEVC_TIER_HIGH, V4L2_CID_MPEG_VIDEO_HEVC_TIER, HFI_PROP_TIER, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, - {0}, - NULL, msm_vidc_set_u32_enum}, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {HEVC_TIER, ENC|DEC, HEIC, + V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, + V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, + BIT(V4L2_MPEG_VIDEO_HEVC_TIER_MAIN), + V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, + V4L2_CID_MPEG_VIDEO_HEVC_TIER, + HFI_PROP_TIER, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, {LF_MODE, ENC, H264, V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED, @@ -1256,9 +1101,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED, V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_MODE, HFI_PROP_DEBLOCKING_MODE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, {0}, - NULL, msm_vidc_set_deblock_mode}, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, {LF_MODE, ENC, HEVC|HEIC, V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_DISABLED, @@ -1269,9 +1112,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_ENABLED, V4L2_CID_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE, HFI_PROP_DEBLOCKING_MODE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, {0}, - NULL, msm_vidc_set_deblock_mode}, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, {LF_ALPHA, ENC, H264, -6, 6, 1, 0, @@ -1298,9 +1139,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE, 0, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {BITRATE_MODE, ALL_INTRA}, {0}, - msm_vidc_adjust_slice_count, msm_vidc_set_slice_count}, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, {SLICE_MAX_BYTES, ENC, H264|HEVC|HEIC, MIN_SLICE_BYTE_SIZE, MAX_SLICE_BYTE_SIZE, @@ -1315,7 +1154,6 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { HFI_PROP_MULTI_SLICE_MB_COUNT, CAP_FLAG_OUTPUT_PORT}, - // TODO: MB level RC - mapping {MB_RC, ENC, H264|HEVC, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_ENABLE, @@ -1328,131 +1166,77 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 1, V4L2_MPEG_MSM_VIDC_ENABLE, V4L2_CID_MPEG_VIDEO_H264_8X8_TRANSFORM, HFI_PROP_8X8_TRANSFORM, - CAP_FLAG_OUTPUT_PORT, - {PROFILE}, {0}, - msm_vidc_adjust_transform_8x8, msm_vidc_set_u32}, + CAP_FLAG_OUTPUT_PORT}, {CHROMA_QP_INDEX_OFFSET, ENC, HEVC, MIN_CHROMA_QP_OFFSET, MAX_CHROMA_QP_OFFSET, 1, MAX_CHROMA_QP_OFFSET, V4L2_CID_MPEG_VIDEO_H264_CHROMA_QP_INDEX_OFFSET, HFI_PROP_CHROMA_QP_OFFSET, - CAP_FLAG_OUTPUT_PORT, - {0}, {0}, - msm_vidc_adjust_chroma_qp_index_offset, - msm_vidc_set_chroma_qp_index_offset}, + CAP_FLAG_OUTPUT_PORT}, {DISPLAY_DELAY_ENABLE, DEC, H264|HEVC|VP9, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY_ENABLE, HFI_PROP_DECODE_ORDER_OUTPUT, - CAP_FLAG_INPUT_PORT, - {0}, {OUTPUT_ORDER}, - NULL, NULL}, + CAP_FLAG_INPUT_PORT}, {DISPLAY_DELAY, DEC, H264|HEVC|VP9, 0, 1, 1, 0, V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY, HFI_PROP_DECODE_ORDER_OUTPUT, - CAP_FLAG_INPUT_PORT, - {0}, {OUTPUT_ORDER}, - NULL, NULL}, + CAP_FLAG_INPUT_PORT}, {OUTPUT_ORDER, DEC, H264|HEVC|VP9, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, 0, HFI_PROP_DECODE_ORDER_OUTPUT, - CAP_FLAG_INPUT_PORT, - {THUMBNAIL_MODE, DISPLAY_DELAY, DISPLAY_DELAY_ENABLE}, - {0}, - msm_vidc_adjust_output_order, msm_vidc_set_u32}, + CAP_FLAG_INPUT_PORT}, {INPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL, DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT, 1, DEFAULT_MAX_HOST_BUF_COUNT, 0, HFI_PROP_BUFFER_HOST_MAX_COUNT, - CAP_FLAG_INPUT_PORT, - {0}, {0}, - msm_vidc_adjust_input_buf_host_max_count, msm_vidc_set_u32}, - - {INPUT_BUF_HOST_MAX_COUNT, ENC, H264|HEVC, - DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT, - 1, DEFAULT_MAX_HOST_BUF_COUNT, - 0, - HFI_PROP_BUFFER_HOST_MAX_COUNT, - CAP_FLAG_INPUT_PORT, - {SUPER_FRAME}, {0}, - msm_vidc_adjust_input_buf_host_max_count, msm_vidc_set_u32}, + CAP_FLAG_INPUT_PORT}, {OUTPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL, DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT, 1, DEFAULT_MAX_HOST_BUF_COUNT, 0, HFI_PROP_BUFFER_HOST_MAX_COUNT, - CAP_FLAG_OUTPUT_PORT, - {0}, {0}, - msm_vidc_adjust_output_buf_host_max_count, msm_vidc_set_u32}, + CAP_FLAG_OUTPUT_PORT}, - {OUTPUT_BUF_HOST_MAX_COUNT, ENC, H264|HEVC, - DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT, - 1, DEFAULT_MAX_HOST_BUF_COUNT, - 0, - HFI_PROP_BUFFER_HOST_MAX_COUNT, - CAP_FLAG_OUTPUT_PORT, - {SUPER_FRAME}, {0}, - msm_vidc_adjust_output_buf_host_max_count, msm_vidc_set_u32}, - - /* conceal color */ {CONCEAL_COLOR_8BIT, DEC, CODECS_ALL, 0x0, 0xff3fcff, 1, DEFAULT_VIDEO_CONCEAL_COLOR_BLACK, V4L2_CID_MPEG_VIDEO_MUTE_YUV, HFI_PROP_CONCEAL_COLOR_8BIT, - CAP_FLAG_INPUT_PORT, - {0}, {0}, - NULL, msm_vidc_set_u32_packed}, + CAP_FLAG_INPUT_PORT}, {CONCEAL_COLOR_10BIT, DEC, CODECS_ALL, 0x0, 0x3fffffff, 1, DEFAULT_VIDEO_CONCEAL_COLOR_BLACK, V4L2_CID_MPEG_VIDEO_MUTE_YUV, HFI_PROP_CONCEAL_COLOR_10BIT, - CAP_FLAG_INPUT_PORT, - {0}, {0}, - NULL, msm_vidc_set_u32_packed}, + CAP_FLAG_INPUT_PORT}, - // TODO {STAGE, DEC|ENC, CODECS_ALL, MSM_VIDC_STAGE_1, MSM_VIDC_STAGE_2, 1, MSM_VIDC_STAGE_2, 0, - HFI_PROP_STAGE, - 0, - {0}, {0}, - NULL, msm_vidc_set_stage}, - - {STAGE, ENC, H264 | HEVC, - MSM_VIDC_STAGE_1, - MSM_VIDC_STAGE_2, 1, - MSM_VIDC_STAGE_2, - 0, - HFI_PROP_STAGE, - CAP_FLAG_NONE, - {LOWLATENCY_MODE}, {0}, - NULL, msm_vidc_set_stage}, + HFI_PROP_STAGE}, {PIPE, DEC|ENC, CODECS_ALL, MSM_VIDC_PIPE_1, MSM_VIDC_PIPE_4, 1, MSM_VIDC_PIPE_4, 0, - HFI_PROP_PIPE, - 0, - {0}, {0}, - NULL, msm_vidc_set_pipe}, + HFI_PROP_PIPE}, + {POC, DEC, H264, 0, 18, 1, 1}, + {QUALITY_MODE, ENC, CODECS_ALL, MSM_VIDC_MAX_QUALITY_MODE, MSM_VIDC_POWER_SAVE_MODE, 1, @@ -1480,9 +1264,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDC_THUMBNAIL_MODE, HFI_PROP_THUMBNAIL_MODE, - CAP_FLAG_INPUT_PORT, - {0}, {OUTPUT_ORDER}, - NULL, msm_vidc_set_u32}, + CAP_FLAG_INPUT_PORT}, {DEFAULT_HEADER, DEC, CODECS_ALL, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, @@ -1495,9 +1277,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 1, V4L2_MPEG_MSM_VIDC_ENABLE, 0, HFI_PROP_DEC_START_FROM_RAP_FRAME, - CAP_FLAG_INPUT_PORT, - {0}, {0}, - NULL, msm_vidc_set_u32}, + CAP_FLAG_INPUT_PORT}, {SEQ_CHANGE_AT_SYNC_FRAME, DEC, CODECS_ALL, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, @@ -1510,9 +1290,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 0, 2, 1, 1, V4L2_CID_MPEG_VIDC_PRIORITY, HFI_PROP_SESSION_PRIORITY, - CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - msm_vidc_adjust_session_priority, msm_vidc_set_session_priority}, + CAP_FLAG_DYNAMIC_ALLOWED}, {ENC_IP_CR, ENC, CODECS_ALL, 0, S32_MAX, 1, 0, @@ -1524,36 +1302,27 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 1, V4L2_MPEG_MSM_VIDC_DISABLE, 0, HFI_PROP_DPB_LIST, - CAP_FLAG_OUTPUT_PORT, - {0}, {0}, - NULL, NULL}, + CAP_FLAG_OUTPUT_PORT}, {ALL_INTRA, ENC, H264|HEVC, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, 0, 0, - CAP_FLAG_OUTPUT_PORT, - {GOP_SIZE, B_FRAME}, - {LTR_COUNT, IR_PERIOD, SLICE_MODE}, - msm_vidc_adjust_all_intra, NULL}, + CAP_FLAG_OUTPUT_PORT}, {INPUT_METADATA_FD, ENC|DEC, CODECS_ALL, INVALID_FD, INT_MAX, 1, INVALID_FD, V4L2_CID_MPEG_VIDC_INPUT_METADATA_FD, 0, - CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - NULL, NULL}, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, {INPUT_META_VIA_REQUEST, ENC|DEC, CODECS_ALL, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDC_INPUT_METADATA_VIA_REQUEST_ENABLE, 0, - CAP_FLAG_INPUT_PORT, - {0}, {0}, - NULL, NULL}, + CAP_FLAG_INPUT_PORT}, {META_LTR_MARK_USE, ENC, H264|HEVC, V4L2_MPEG_VIDC_META_DISABLE, @@ -1673,9 +1442,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_EVA_STATS, HFI_PROP_EVA_STAT_INFO, - CAP_FLAG_BITMASK, - {0}, - {ENH_LAYER_COUNT}}, + CAP_FLAG_BITMASK}, {META_BUF_TAG, ENC, CODECS_ALL, V4L2_MPEG_VIDC_META_DISABLE, @@ -1703,6 +1470,14 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { HFI_PROP_DPB_TAG_LIST, CAP_FLAG_BITMASK}, + {META_SUBFRAME_OUTPUT, ENC, HEIC, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_SUBFRAME_OUTPUT, + HFI_PROP_SUBFRAME_OUTPUT, + CAP_FLAG_BITMASK}, + {META_SUBFRAME_OUTPUT, DEC, CODECS_ALL, V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, @@ -1725,21 +1500,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_ROI_INFO, HFI_PROP_ROI_INFO, - CAP_FLAG_INPUT_PORT | CAP_FLAG_BITMASK, - {BITRATE_MODE, PIX_FMTS}, - {0}, - msm_vidc_adjust_roi_info, NULL}, - - {META_ROI_INFO, ENC, H264|HEVC, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_TX_INPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_ROI_INFO, - HFI_PROP_ROI_INFO, - CAP_FLAG_INPUT_PORT | CAP_FLAG_BITMASK, - {BITRATE_MODE, PIX_FMTS}, - {MIN_QUALITY, IR_PERIOD}, - msm_vidc_adjust_roi_info, NULL}, + CAP_FLAG_INPUT_PORT | CAP_FLAG_BITMASK}, {META_SALIENCY_INFO, ENC, H264|HEVC, V4L2_MPEG_VIDC_META_DISABLE, @@ -1747,10 +1508,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_SALIENCY_INFO, HFI_PROP_ROI_AS_SALIENCY_INFO, - CAP_FLAG_INPUT_PORT | CAP_FLAG_BITMASK, - {}, - {}, - NULL, NULL}, + CAP_FLAG_INPUT_PORT | CAP_FLAG_BITMASK}, {META_DEC_QP_METADATA, DEC, CODECS_ALL, V4L2_MPEG_VIDC_META_DISABLE, @@ -1760,105 +1518,18 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { HFI_PROP_DEC_QP_METADATA, CAP_FLAG_BITMASK}, - /* configure image properties */ - {FRAME_WIDTH, ENC, HEIC, 128, 16384, 1, 16384}, - {FRAME_HEIGHT, ENC, HEIC, 128, 16384, 1, 16384}, - {MIN_BUFFERS_INPUT, ENC|DEC, HEIC, 0, 64, 1, 1, - V4L2_CID_MIN_BUFFERS_FOR_OUTPUT}, - {MBPF, DEC, HEIC, 64, 262144, 1, 262144 }, /* ((8192x8192)/256) */ - {MBPF, ENC, HEIC, 36, 1048576, 1, 1048576}, /* ((16384x16384)/256) */ - {MBPS, DEC, HEIC, 64, 262144, 1, 262144 }, /* ((8192x8192)/256)@1fps */ - {MBPS, ENC, HEIC, 36, 1048576, 1, 1048576}, /* ((16384x16384)/256)@1fps */ - {BITRATE_MODE, ENC, HEIC, - V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, - V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, - BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CQ), - V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, - V4L2_CID_MPEG_VIDEO_BITRATE_MODE, - HFI_PROP_RATE_CONTROL, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, - {TIME_DELTA_BASED_RC, CONSTANT_QUALITY}, - msm_vidc_adjust_bitrate_mode, msm_vidc_set_u32_enum}, - {TIME_DELTA_BASED_RC, ENC, HEIC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_TIME_DELTA_BASED_RC, - HFI_PROP_TIME_DELTA_BASED_RATE_CONTROL, - CAP_FLAG_OUTPUT_PORT, - {BITRATE_MODE}, {0}, - msm_vidc_adjust_delta_based_rc, msm_vidc_set_u32}, - {CONSTANT_QUALITY, ENC, HEIC, - 1, MAX_CONSTANT_QUALITY, 1, 100, - V4L2_CID_MPEG_VIDEO_CONSTANT_QUALITY, - HFI_PROP_CONSTANT_QUALITY, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - {BITRATE_MODE}, {0}, - NULL, msm_vidc_set_constant_quality}, {GRID, ENC, HEIC, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_ENABLE, 0, HFI_PROP_HEIC_GRID_ENABLE, - CAP_FLAG_OUTPUT_PORT, - {0}, {0}, - NULL, msm_vidc_set_u32}, - {GOP_SIZE, ENC, HEIC, - 0, INT_MAX, 1, 0 /* all intra */, - V4L2_CID_MPEG_VIDEO_GOP_SIZE, - HFI_PROP_MAX_GOP_FRAMES, - CAP_FLAG_OUTPUT_PORT | - CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, - {0}, {0}, - NULL, msm_vidc_set_u32}, - {B_FRAME, ENC, HEIC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDEO_B_FRAMES, - HFI_PROP_MAX_B_FRAMES, - CAP_FLAG_OUTPUT_PORT, - {0}, {0}, - NULL, msm_vidc_set_u32}, - {PIX_FMTS, ENC, HEIC, - MSM_VIDC_FMT_NV12, - MSM_VIDC_FMT_P010, - MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_P010, - MSM_VIDC_FMT_NV12, - 0, 0, - 0, - {0}, - {PROFILE}}, - {HEVC_TIER, ENC|DEC, HEIC, - V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, - V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, - BIT(V4L2_MPEG_VIDEO_HEVC_TIER_MAIN), - V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, - V4L2_CID_MPEG_VIDEO_HEVC_TIER, - HFI_PROP_TIER, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - {0}, - {0}, - NULL, msm_vidc_set_u32_enum}, - {FRAME_RATE, ENC, HEIC, - (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), - 1, (MINIMUM_FPS << 16), - 0, - HFI_PROP_FRAME_RATE, - CAP_FLAG_OUTPUT_PORT, - {0}, {0}, - NULL, msm_vidc_set_q16}, - {META_SUBFRAME_OUTPUT, ENC, HEIC, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_SUBFRAME_OUTPUT, - HFI_PROP_SUBFRAME_OUTPUT, - CAP_FLAG_BITMASK}, + CAP_FLAG_OUTPUT_PORT}, + {COMPLEXITY, ENC, H264 | HEVC, 0, 100, 1, 100, V4L2_CID_MPEG_VIDC_VENC_COMPLEXITY}, + {META_MAX_NUM_REORDER_FRAMES, DEC, HEVC | H264, V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, @@ -1868,6 +1539,572 @@ static struct msm_platform_inst_capability instance_data_waipio[] = { CAP_FLAG_BITMASK}, }; +static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_waipio[] = { + /* {cap, domain, codec, + * parents, + * children, + * adjust, set} + */ + + {PIX_FMTS, ENC, H264, + {0}, + {META_ROI_INFO, IR_PERIOD}}, + + {PIX_FMTS, ENC, HEVC, + {0}, + {PROFILE, MIN_FRAME_QP, MAX_FRAME_QP, I_FRAME_QP, P_FRAME_QP, + B_FRAME_QP, META_ROI_INFO, MIN_QUALITY, BLUR_TYPES, IR_PERIOD}}, + + {PIX_FMTS, ENC, HEIC, + {0}, + {PROFILE}}, + + {PIX_FMTS, DEC, HEVC|HEIC, + {0}, + {PROFILE}}, + + {FRAME_RATE, ENC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_q16}, + + {FRAME_RATE, DEC, CODECS_ALL, + {0}, + {0}, + msm_vidc_adjust_dec_frame_rate}, + + {OPERATING_RATE, DEC, CODECS_ALL, + {0}, + {0}, + msm_vidc_adjust_dec_operating_rate}, + + {SECURE_MODE, ENC|DEC, H264|HEVC|VP9, + {0}, + {0}, + NULL, + msm_vidc_set_u32}, + + {HFLIP, ENC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_flip}, + + {VFLIP, ENC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_flip}, + + {ROTATION, ENC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_rotation}, + + {SUPER_FRAME, ENC, H264|HEVC, + {0}, + {INPUT_BUF_HOST_MAX_COUNT, OUTPUT_BUF_HOST_MAX_COUNT}, + NULL, + NULL}, + + {HEADER_MODE, ENC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_header_mode}, + + {WITHOUT_STARTCODE, ENC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_nal_length}, + + {REQUEST_I_FRAME, ENC, H264|HEVC, + {0}, + {0}, + NULL, + msm_vidc_set_req_sync_frame}, + + {BIT_RATE, ENC, H264|HEVC, + {ENH_LAYER_COUNT, BITRATE_MODE}, + {PEAK_BITRATE}, + msm_vidc_adjust_bitrate, + msm_vidc_set_bitrate}, + + {BITRATE_MODE, ENC, H264, + {0}, + {LTR_COUNT, IR_PERIOD, TIME_DELTA_BASED_RC, I_FRAME_QP, + P_FRAME_QP, B_FRAME_QP, ENH_LAYER_COUNT, BIT_RATE, + META_ROI_INFO, MIN_QUALITY, BITRATE_BOOST, VBV_DELAY, + PEAK_BITRATE, SLICE_MODE, CONTENT_ADAPTIVE_CODING, + BLUR_TYPES, LOWLATENCY_MODE}, + msm_vidc_adjust_bitrate_mode, + msm_vidc_set_u32_enum}, + + {BITRATE_MODE, ENC, HEVC, + {0}, + {LTR_COUNT, IR_PERIOD, TIME_DELTA_BASED_RC, I_FRAME_QP, + P_FRAME_QP, B_FRAME_QP, CONSTANT_QUALITY, ENH_LAYER_COUNT, + BIT_RATE, META_ROI_INFO, MIN_QUALITY, BITRATE_BOOST, VBV_DELAY, + PEAK_BITRATE, SLICE_MODE, CONTENT_ADAPTIVE_CODING, + BLUR_TYPES, LOWLATENCY_MODE}, + msm_vidc_adjust_bitrate_mode, + msm_vidc_set_u32_enum}, + + {BITRATE_MODE, ENC, HEIC, + {0}, + {TIME_DELTA_BASED_RC, CONSTANT_QUALITY}, + msm_vidc_adjust_bitrate_mode, + msm_vidc_set_u32_enum}, + + {CONSTANT_QUALITY, ENC, HEVC|HEIC, + {BITRATE_MODE}, + {0}, + NULL, + msm_vidc_set_constant_quality}, + + {GOP_SIZE, ENC, CODECS_ALL, + {ENH_LAYER_COUNT}, + {ALL_INTRA}, + msm_vidc_adjust_gop_size, + msm_vidc_set_gop_size}, + + {GOP_SIZE, ENC, HEIC, + {0}, + {0}, + NULL, + msm_vidc_set_u32}, + + {B_FRAME, ENC, H264|HEVC, + {ENH_LAYER_COUNT}, + {ALL_INTRA}, + msm_vidc_adjust_b_frame, + msm_vidc_set_u32}, + + {B_FRAME, ENC, HEIC, + {0}, + {0}, + NULL, + msm_vidc_set_u32}, + + {BLUR_TYPES, ENC, H264|HEVC, + {PIX_FMTS, BITRATE_MODE, CONTENT_ADAPTIVE_CODING, MIN_QUALITY}, + {BLUR_RESOLUTION}, + msm_vidc_adjust_blur_type_iris2, + msm_vidc_set_u32_enum}, + + {BLUR_RESOLUTION, ENC, H264|HEVC, + {BLUR_TYPES}, + {0}, + msm_vidc_adjust_blur_resolution, + msm_vidc_set_blur_resolution}, + + {CSC_CUSTOM_MATRIX, ENC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_csc_custom_matrix}, + + {LOWLATENCY_MODE, ENC, H264 | HEVC, + {BITRATE_MODE}, + {STAGE}, + msm_vidc_adjust_lowlatency_mode, + NULL}, + + {LTR_COUNT, ENC, H264|HEVC, + {BITRATE_MODE, ALL_INTRA}, + {0}, + msm_vidc_adjust_ltr_count, + msm_vidc_set_u32}, + + {USE_LTR, ENC, H264|HEVC, + {0}, + {0}, + msm_vidc_adjust_use_ltr, + msm_vidc_set_use_and_mark_ltr}, + + {MARK_LTR, ENC, H264|HEVC, + {0}, + {0}, + msm_vidc_adjust_mark_ltr, + msm_vidc_set_use_and_mark_ltr}, + + {IR_PERIOD, ENC, H264|HEVC, + {BITRATE_MODE, ALL_INTRA}, + {0}, + msm_vidc_adjust_ir_period, + msm_vidc_set_ir_period}, + + {AU_DELIMITER, ENC, H264|HEVC, + {0}, + {0}, + NULL, + msm_vidc_set_u32}, + + {TIME_DELTA_BASED_RC, ENC, CODECS_ALL, + {BITRATE_MODE}, + {0}, + msm_vidc_adjust_delta_based_rc, + msm_vidc_set_u32}, + + {CONTENT_ADAPTIVE_CODING, ENC, H264|HEVC, + {BITRATE_MODE, LAYER_ENABLE, LAYER_TYPE}, + {BLUR_TYPES}, + msm_vidc_adjust_brs, + msm_vidc_set_vbr_related_properties}, + + {BITRATE_BOOST, ENC, H264|HEVC, + {BITRATE_MODE, MIN_QUALITY}, + {0}, + msm_vidc_adjust_bitrate_boost, + msm_vidc_set_vbr_related_properties}, + + {MIN_QUALITY, ENC, H264, + {BITRATE_MODE, ENH_LAYER_COUNT, META_ROI_INFO}, + {CONTENT_ADAPTIVE_CODING, BITRATE_BOOST, BLUR_TYPES}, + msm_vidc_adjust_min_quality, + msm_vidc_set_vbr_related_properties}, + + {MIN_QUALITY, ENC, HEVC, + {BITRATE_MODE, PIX_FMTS, ENH_LAYER_COUNT, + META_ROI_INFO}, + {CONTENT_ADAPTIVE_CODING, BITRATE_BOOST, BLUR_TYPES}, + msm_vidc_adjust_min_quality, + msm_vidc_set_vbr_related_properties}, + + {VBV_DELAY, ENC, H264|HEVC, + {BITRATE_MODE}, + {0}, + NULL, + msm_vidc_set_cbr_related_properties}, + + {PEAK_BITRATE, ENC, H264|HEVC, + {BITRATE_MODE, BIT_RATE}, + {0}, + msm_vidc_adjust_peak_bitrate, + msm_vidc_set_cbr_related_properties}, + + {MIN_FRAME_QP, ENC, H264, + {0}, + {0}, + NULL, + msm_vidc_set_min_qp}, + + {MIN_FRAME_QP, ENC, HEVC|HEIC, + {PIX_FMTS}, + {0}, + msm_vidc_adjust_hevc_min_qp, + msm_vidc_set_min_qp}, + + {MAX_FRAME_QP, ENC, H264, + {0}, + {0}, + NULL, + msm_vidc_set_max_qp}, + + {MAX_FRAME_QP, ENC, HEVC|HEIC, + {PIX_FMTS}, + {0}, + msm_vidc_adjust_hevc_max_qp, + msm_vidc_set_max_qp}, + + {I_FRAME_QP, ENC, HEVC, + {PIX_FMTS, BITRATE_MODE}, + {0}, + msm_vidc_adjust_hevc_i_frame_qp, + msm_vidc_set_frame_qp}, + + {I_FRAME_QP, ENC, H264, + {BITRATE_MODE}, + {0}, + NULL, + msm_vidc_set_frame_qp}, + + {P_FRAME_QP, ENC, HEVC, + {PIX_FMTS, BITRATE_MODE}, + {0}, + msm_vidc_adjust_hevc_p_frame_qp, + msm_vidc_set_frame_qp}, + + {P_FRAME_QP, ENC, H264, + {BITRATE_MODE}, + {0}, + NULL, + msm_vidc_set_frame_qp}, + + {B_FRAME_QP, ENC, HEVC, + {PIX_FMTS, BITRATE_MODE}, + {0}, + msm_vidc_adjust_hevc_b_frame_qp, + msm_vidc_set_frame_qp}, + + {B_FRAME_QP, ENC, H264, + {BITRATE_MODE}, + {0}, + NULL, + msm_vidc_set_frame_qp}, + + {LAYER_TYPE, ENC, H264|HEVC, + {0}, + {CONTENT_ADAPTIVE_CODING}}, + + {LAYER_ENABLE, ENC, H264|HEVC, + {0}, + {CONTENT_ADAPTIVE_CODING}}, + + {ENH_LAYER_COUNT, ENC, H264|HEVC, + {BITRATE_MODE, META_EVA_STATS}, + {GOP_SIZE, B_FRAME, BIT_RATE, MIN_QUALITY}, + msm_vidc_adjust_layer_count, + msm_vidc_set_layer_count_and_type}, + + {L0_BR, ENC, H264|HEVC, + {0}, + {0}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, + + {L1_BR, ENC, H264|HEVC, + {0}, + {0}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, + + {L2_BR, ENC, H264|HEVC, + {0}, + {0}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, + + {L3_BR, ENC, H264|HEVC, + {0}, + {0}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, + + {L4_BR, ENC, H264|HEVC, + {0}, + {0}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, + + {L5_BR, ENC, H264|HEVC, + {0}, + {0}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, + + {ENTROPY_MODE, ENC, H264, + {PROFILE}, + {0}, + msm_vidc_adjust_entropy_mode, + msm_vidc_set_u32}, + + {PROFILE, ENC, H264, + {0}, + {ENTROPY_MODE, TRANSFORM_8X8}, + NULL, + msm_vidc_set_u32_enum}, + + {PROFILE, DEC, H264, + {0}, + {ENTROPY_MODE}, + NULL, + msm_vidc_set_u32_enum}, + + {PROFILE, ENC|DEC, HEVC|HEIC, + {PIX_FMTS}, + {0}, + msm_vidc_adjust_profile, + msm_vidc_set_u32_enum}, + + {PROFILE, DEC, VP9, + {0}, + {0}, + NULL, + msm_vidc_set_u32_enum}, + + {LEVEL, DEC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_u32_enum}, + + {LEVEL, ENC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_level}, + + {HEVC_TIER, ENC|DEC, HEVC|HEIC, + {0}, + {0}, + NULL, + msm_vidc_set_u32_enum}, + + {LF_MODE, ENC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_deblock_mode}, + + {SLICE_MODE, ENC, H264|HEVC, + {BITRATE_MODE, ALL_INTRA}, + {0}, + msm_vidc_adjust_slice_count, + msm_vidc_set_slice_count}, + + {TRANSFORM_8X8, ENC, H264, + {PROFILE}, + {0}, + msm_vidc_adjust_transform_8x8, + msm_vidc_set_u32}, + + {CHROMA_QP_INDEX_OFFSET, ENC, HEVC, + {0}, + {0}, + msm_vidc_adjust_chroma_qp_index_offset, + msm_vidc_set_chroma_qp_index_offset}, + + {DISPLAY_DELAY_ENABLE, DEC, H264|HEVC|VP9, + {0}, + {OUTPUT_ORDER}, + NULL, + NULL}, + + {DISPLAY_DELAY, DEC, H264|HEVC|VP9, + {0}, + {OUTPUT_ORDER}, + NULL, + NULL}, + + {OUTPUT_ORDER, DEC, H264|HEVC|VP9, + {THUMBNAIL_MODE, DISPLAY_DELAY, DISPLAY_DELAY_ENABLE}, + {0}, + msm_vidc_adjust_output_order, + msm_vidc_set_u32}, + + {INPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL, + {0}, + {0}, + msm_vidc_adjust_input_buf_host_max_count, + msm_vidc_set_u32}, + + {INPUT_BUF_HOST_MAX_COUNT, ENC, H264|HEVC, + {SUPER_FRAME}, + {0}, + msm_vidc_adjust_input_buf_host_max_count, + msm_vidc_set_u32}, + + {OUTPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL, + {0}, + {0}, + msm_vidc_adjust_output_buf_host_max_count, + msm_vidc_set_u32}, + + {OUTPUT_BUF_HOST_MAX_COUNT, ENC, H264|HEVC, + {SUPER_FRAME}, + {0}, + msm_vidc_adjust_output_buf_host_max_count, + msm_vidc_set_u32}, + + {CONCEAL_COLOR_8BIT, DEC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_u32_packed}, + + {CONCEAL_COLOR_10BIT, DEC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_u32_packed}, + + {STAGE, DEC|ENC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_stage}, + + {STAGE, ENC, H264|HEVC, + {LOWLATENCY_MODE}, + {0}, + NULL, + msm_vidc_set_stage}, + + {PIPE, DEC|ENC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_pipe}, + + {THUMBNAIL_MODE, DEC, CODECS_ALL, + {0}, + {OUTPUT_ORDER}, + NULL, + msm_vidc_set_u32}, + + {RAP_FRAME, DEC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_u32}, + + {PRIORITY, DEC|ENC, CODECS_ALL, + {0}, + {0}, + msm_vidc_adjust_session_priority, + msm_vidc_set_session_priority}, + + {DPB_LIST, DEC, CODECS_ALL, + {0}, + {0}, + NULL, + NULL}, + + {ALL_INTRA, ENC, H264|HEVC, + {GOP_SIZE, B_FRAME}, + {LTR_COUNT, IR_PERIOD, SLICE_MODE}, + msm_vidc_adjust_all_intra, + NULL}, + + {INPUT_METADATA_FD, ENC|DEC, CODECS_ALL, + {0}, + {0}, + NULL, + NULL}, + + {INPUT_META_VIA_REQUEST, ENC|DEC, CODECS_ALL, + {0}, + {0}, + NULL, + NULL}, + + {META_EVA_STATS, ENC, CODECS_ALL, + {0}, + {ENH_LAYER_COUNT}}, + + {META_ROI_INFO, ENC, H264|HEVC, + {BITRATE_MODE, PIX_FMTS}, + {MIN_QUALITY, IR_PERIOD}, + msm_vidc_adjust_roi_info, + NULL}, + + {META_ROI_INFO, ENC, HEIC, + {BITRATE_MODE, PIX_FMTS}, + {0}, + msm_vidc_adjust_roi_info, + NULL}, + + {GRID, ENC, HEIC, + {0}, + {0}, + NULL, + msm_vidc_set_u32}, +}; + /* Default UBWC config for LPDDR5 */ static struct msm_vidc_ubwc_config_data ubwc_config_waipio[] = { UBWC_CONFIG(8, 32, 16, 0, 1, 1, 1), @@ -1876,8 +2113,10 @@ static struct msm_vidc_ubwc_config_data ubwc_config_waipio[] = { static const struct msm_vidc_platform_data waipio_data = { .core_data = core_data_waipio, .core_data_size = ARRAY_SIZE(core_data_waipio), - .instance_data = instance_data_waipio, - .instance_data_size = ARRAY_SIZE(instance_data_waipio), + .inst_cap_data = instance_cap_data_waipio, + .inst_cap_data_size = ARRAY_SIZE(instance_cap_data_waipio), + .inst_cap_dependency_data = instance_cap_dependency_data_waipio, + .inst_cap_dependency_data_size = ARRAY_SIZE(instance_cap_dependency_data_waipio), .csc_data.vpe_csc_custom_bias_coeff = vpe_csc_custom_bias_coeff, .csc_data.vpe_csc_custom_matrix_coeff = vpe_csc_custom_matrix_coeff, .csc_data.vpe_csc_custom_limit_coeff = vpe_csc_custom_limit_coeff, diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 87a35f2256..717befb10c 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -4601,25 +4601,42 @@ static void update_inst_capability(struct msm_platform_inst_capability *in, __func__, in, capability); return; } - if (in->cap_id < INST_CAP_MAX) { - capability->cap[in->cap_id].cap_id = in->cap_id; - capability->cap[in->cap_id].min = in->min; - capability->cap[in->cap_id].max = in->max; - capability->cap[in->cap_id].step_or_mask = in->step_or_mask; - capability->cap[in->cap_id].value = in->value; - capability->cap[in->cap_id].flags = in->flags; - capability->cap[in->cap_id].v4l2_id = in->v4l2_id; - capability->cap[in->cap_id].hfi_id = in->hfi_id; - memcpy(capability->cap[in->cap_id].parents, in->parents, - sizeof(capability->cap[in->cap_id].parents)); - memcpy(capability->cap[in->cap_id].children, in->children, - sizeof(capability->cap[in->cap_id].children)); - capability->cap[in->cap_id].adjust = in->adjust; - capability->cap[in->cap_id].set = in->set; - } else { - d_vpr_e("%s: invalid cap id %d\n", - __func__, in->cap_id); + if (in->cap_id >= INST_CAP_MAX) { + d_vpr_e("%s: invalid cap id %d\n", __func__, in->cap_id); + return; } + + capability->cap[in->cap_id].cap_id = in->cap_id; + capability->cap[in->cap_id].min = in->min; + capability->cap[in->cap_id].max = in->max; + capability->cap[in->cap_id].step_or_mask = in->step_or_mask; + capability->cap[in->cap_id].value = in->value; + capability->cap[in->cap_id].flags = in->flags; + capability->cap[in->cap_id].v4l2_id = in->v4l2_id; + capability->cap[in->cap_id].hfi_id = in->hfi_id; +} + +static void update_inst_cap_dependency( + struct msm_platform_inst_cap_dependency *in, + struct msm_vidc_inst_capability *capability) +{ + if (!in || !capability) { + d_vpr_e("%s: invalid params %pK %pK\n", + __func__, in, capability); + return; + } + if (in->cap_id >= INST_CAP_MAX) { + d_vpr_e("%s: invalid cap id %d\n", __func__, in->cap_id); + return; + } + + capability->cap[in->cap_id].cap_id = in->cap_id; + memcpy(capability->cap[in->cap_id].parents, in->parents, + sizeof(capability->cap[in->cap_id].parents)); + memcpy(capability->cap[in->cap_id].children, in->children, + sizeof(capability->cap[in->cap_id].children)); + capability->cap[in->cap_id].adjust = in->adjust; + capability->cap[in->cap_id].set = in->set; } int msm_vidc_deinit_instance_caps(struct msm_vidc_core *core) @@ -4644,8 +4661,10 @@ int msm_vidc_init_instance_caps(struct msm_vidc_core *core) u8 enc_valid_codecs, dec_valid_codecs; u8 count_bits, enc_codec_count; u8 codecs_count = 0; - int i, j, check_bit, num_platform_caps; - struct msm_platform_inst_capability *platform_data = NULL; + int i, j, check_bit; + int num_platform_cap_data, num_platform_cap_dependency_data; + struct msm_platform_inst_capability *platform_cap_data = NULL; + struct msm_platform_inst_cap_dependency *platform_cap_dependency_data = NULL; if (!core || !core->platform || !core->capabilities) { d_vpr_e("%s: invalid params\n", __func__); @@ -4653,9 +4672,17 @@ int msm_vidc_init_instance_caps(struct msm_vidc_core *core) goto error; } - platform_data = core->platform->data.instance_data; - if (!platform_data) { - d_vpr_e("%s: platform instance data is NULL\n", + platform_cap_data = core->platform->data.inst_cap_data; + if (!platform_cap_data) { + d_vpr_e("%s: platform instance cap data is NULL\n", + __func__); + rc = -EINVAL; + goto error; + } + + platform_cap_dependency_data = core->platform->data.inst_cap_dependency_data; + if (!platform_cap_dependency_data) { + d_vpr_e("%s: platform instance cap dependency data is NULL\n", __func__); rc = -EINVAL; goto error; @@ -4712,19 +4739,37 @@ int msm_vidc_init_instance_caps(struct msm_vidc_core *core) } } - num_platform_caps = core->platform->data.instance_data_size; + num_platform_cap_data = core->platform->data.inst_cap_data_size; + num_platform_cap_dependency_data = core->platform->data.inst_cap_dependency_data_size; + d_vpr_h("%s: num caps %d, dependency %d\n", __func__, + num_platform_cap_data, num_platform_cap_dependency_data); - d_vpr_h("%s: num caps %d\n", __func__, num_platform_caps); /* loop over each platform capability */ - for (i = 0; i < num_platform_caps; i++) { + for (i = 0; i < num_platform_cap_data; i++) { /* select matching core codec and update it */ for (j = 0; j < codecs_count; j++) { - if ((platform_data[i].domain & + if ((platform_cap_data[i].domain & core->inst_caps[j].domain) && - (platform_data[i].codec & + (platform_cap_data[i].codec & core->inst_caps[j].codec)) { /* update core capability */ - update_inst_capability(&platform_data[i], + update_inst_capability(&platform_cap_data[i], + &core->inst_caps[j]); + } + } + } + + /* loop over each platform dependency capability */ + for (i = 0; i < num_platform_cap_dependency_data; i++) { + /* select matching core codec and update it */ + for (j = 0; j < codecs_count; j++) { + if ((platform_cap_dependency_data[i].domain & + core->inst_caps[j].domain) && + (platform_cap_dependency_data[i].codec & + core->inst_caps[j].codec)) { + /* update core dependency capability */ + update_inst_cap_dependency( + &platform_cap_dependency_data[i], &core->inst_caps[j]); } } From 7e9d5106f67698761294971a8ad14fbc3a4b820b Mon Sep 17 00:00:00 2001 From: Deepa Guthyappa Madivalara Date: Thu, 14 Apr 2022 10:59:00 -0700 Subject: [PATCH 0599/1061] video: driver: add macros for kernel space logs adding kernel space logs used by post processing scripts as macros to avoid changes in them. Change-Id: Iea0fb0514c134767f063902ff98fd756898ef7c4 Signed-off-by: Deepa Guthyappa Madivalara --- driver/vidc/inc/msm_vidc_debug.h | 12 ++++++++++++ driver/vidc/src/msm_vidc_control.c | 20 +++++++++----------- driver/vidc/src/msm_vidc_driver.c | 6 +++--- driver/vidc/src/venus_hfi_response.c | 2 +- 4 files changed, 25 insertions(+), 15 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_debug.h b/driver/vidc/inc/msm_vidc_debug.h index 89f61f62a6..85df5fe60b 100644 --- a/driver/vidc/inc/msm_vidc_debug.h +++ b/driver/vidc/inc/msm_vidc_debug.h @@ -39,6 +39,18 @@ extern int msm_vidc_llc_bw; extern bool msm_vidc_fw_dump; extern unsigned int msm_vidc_enable_bugon; +/* do not modify the log message as it is used in test scripts */ +#define FMT_STRING_SET_CTRL \ + "%s: state %s, name %s, id 0x%x value %d\n" +#define FMT_STRING_STATE_CHANGE \ + "%s: state changed to %s from %s\n" +#define FMT_STRING_MSG_SFR \ + "SFR Message from FW: %s\n" +#define FMT_STRING_FAULT_HANDLER \ + "%s: faulting address: %lx\n" +#define FMT_STRING_SET_CAP \ + "set cap: name: %24s, cap value: %#10x, hfi: %#10x\n" + /* To enable messages OR these values and * echo the result to debugfs file. * diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 1d00e5305e..f272ebcd64 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -282,23 +282,21 @@ static int msm_vidc_packetize_control(struct msm_vidc_inst *inst, int rc = 0; u64 payload = 0; + if (payload_size > sizeof(u32)) { + i_vpr_e(inst, "%s: payload size is more than u32 for cap[%d] %s\n", + func, cap_id, cap_name(cap_id)); + return -EINVAL; + } + if (payload_size == sizeof(u32)) payload = *(u32 *)hfi_val; - else if (payload_size == sizeof(u64)) - payload = *(u64 *)hfi_val; else if (payload_size == sizeof(u8)) payload = *(u8 *)hfi_val; else if (payload_size == sizeof(u16)) payload = *(u16 *)hfi_val; - if (payload_size <= sizeof(u64)) - i_vpr_h(inst, - "set cap: name: %24s, cap value: %#10x, hfi: %#10x\n", - cap_name(cap_id), inst->capabilities->cap[cap_id].value, payload); - else - i_vpr_h(inst, - "set cap: name: %24s, hfi payload size %d\n", - cap_name(cap_id), payload_size); + i_vpr_h(inst, FMT_STRING_SET_CAP, + cap_name(cap_id), inst->capabilities->cap[cap_id].value, payload); rc = venus_hfi_session_property(inst, inst->capabilities->cap[cap_id].hfi_id, @@ -1122,7 +1120,7 @@ int msm_v4l2_op_s_ctrl(struct v4l2_ctrl *ctrl) capability = inst->capabilities; - i_vpr_h(inst, "%s: state %s, name %s, id 0x%x value %d\n", + i_vpr_h(inst, FMT_STRING_SET_CTRL, __func__, state_name(inst->state), ctrl->name, ctrl->id, ctrl->val); if (!msm_vidc_allow_s_ctrl(inst, ctrl->id)) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 1b03bf714b..acf1a57bd6 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -1250,10 +1250,10 @@ int msm_vidc_change_inst_state(struct msm_vidc_inst *inst, } if (request_state == MSM_VIDC_ERROR) - i_vpr_e(inst, "%s: state changed to %s from %s\n", + i_vpr_e(inst, FMT_STRING_STATE_CHANGE, func, state_name(request_state), state_name(inst->state)); else - i_vpr_h(inst, "%s: state changed to %s from %s\n", + i_vpr_h(inst, FMT_STRING_STATE_CHANGE, func, state_name(request_state), state_name(inst->state)); trace_msm_vidc_common_state_change(inst, func, state_name(inst->state), @@ -5054,7 +5054,7 @@ int msm_vidc_smmu_fault_handler(struct iommu_domain *domain, } } - d_vpr_e("%s: faulting address: %lx\n", __func__, iova); + d_vpr_e(FMT_STRING_FAULT_HANDLER, __func__, iova); core->smmu_fault_handled = true; diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index db7047968d..01a24fe031 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -78,7 +78,7 @@ static void print_sfr_message(struct msm_vidc_core *core) if (p == NULL) vsfr->rg_data[vsfr_size - 1] = '\0'; - d_vpr_e("SFR Message from FW: %s\n", vsfr->rg_data); + d_vpr_e(FMT_STRING_MSG_SFR, vsfr->rg_data); } } From 8a1d57af0e53319be6da4d4585336fed60f8d7f2 Mon Sep 17 00:00:00 2001 From: Deepa Guthyappa Madivalara Date: Fri, 15 Apr 2022 17:26:18 -0700 Subject: [PATCH 0600/1061] video: driver: add comments for kernel space logs adding comments to avoid changes in kernel space logs that are used by post processing scripts Change-Id: I66ee9743866d12c740c3791b92534eaf7601436d Signed-off-by: Deepa Guthyappa Madivalara --- driver/vidc/src/msm_vidc_driver.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 1d4d88cce6..779c4b70e1 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -55,6 +55,7 @@ struct msm_vidc_cap_name { char *name; }; +/* do not modify the cap names as it is used in test scripts */ static const struct msm_vidc_cap_name cap_name_arr[] = { {INST_CAP_NONE, "INST_CAP_NONE" }, {META_SEQ_HDR_NAL, "META_SEQ_HDR_NAL" }, @@ -307,6 +308,7 @@ struct msm_vidc_inst_state_name { char *name; }; +/* do not modify the state names as it is used in test scripts */ static const struct msm_vidc_inst_state_name inst_state_name_arr[] = { {MSM_VIDC_OPEN, "OPEN" }, {MSM_VIDC_START_INPUT, "START_INPUT" }, From 54b17e1340a83b5d7eabc939437c0b1119c1e82b Mon Sep 17 00:00:00 2001 From: Deepa Guthyappa Madivalara Date: Mon, 18 Apr 2022 13:42:24 -0700 Subject: [PATCH 0601/1061] video: driver: Multi instance support Increase max session count for 4k and 1080p to allow more concurrent UHD sessions Change-Id: I0ed70d0b4bac54dccd40f89725525420b71742a5 Signed-off-by: Deepa Guthyappa Madivalara --- driver/platform/kalama/src/msm_vidc_kalama.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index 62c201ca58..00a852f640 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -49,12 +49,12 @@ static struct msm_platform_core_capability core_data_kalama[] = { {DEC_CODECS, H264|HEVC|VP9|AV1|HEIC}, {MAX_SESSION_COUNT, 16}, {MAX_NUM_720P_SESSIONS, 16}, - {MAX_NUM_1080P_SESSIONS, 10}, - {MAX_NUM_4K_SESSIONS, 5}, + {MAX_NUM_1080P_SESSIONS, 16}, + {MAX_NUM_4K_SESSIONS, 8}, {MAX_NUM_8K_SESSIONS, 2}, {MAX_SECURE_SESSION_COUNT, 3}, - {MAX_RT_MBPF, 173056}, /* (8192x4320)/256 + (4096x2176)/256*/ - {MAX_MBPF, 276480}, /* ((8192x4320)/256) * 2 */ + {MAX_RT_MBPF, 174080}, /* (8192x4352)/256 + (4096x2176)/256*/ + {MAX_MBPF, 278528}, /* ((8192x4352)/256) * 2 */ {MAX_MBPS, 7833600}, /* max_load * 7680x4320@60fps or 3840x2176@240fps * which is greater than 4096x2176@120fps, From e323f28384233aefbbb6b895835a39d66b56c577 Mon Sep 17 00:00:00 2001 From: Mahesh Kumar Sharma Date: Mon, 18 Apr 2022 22:36:59 -0700 Subject: [PATCH 0602/1061] video: driver: set Max QB to 25 upto 4k@60 fps Set max QB to 25 upto 4k@60 fps. Change-Id: Iad23e86c5b67323cde691db8523a2a99500ace3c Signed-off-by: Mahesh Kumar Sharma --- driver/variant/iris3/src/msm_vidc_iris3.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/driver/variant/iris3/src/msm_vidc_iris3.c b/driver/variant/iris3/src/msm_vidc_iris3.c index 457a32b990..e8e31059be 100644 --- a/driver/variant/iris3/src/msm_vidc_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_iris3.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. - * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2021-2022, Qualcomm Innovation Center, Inc. All rights reserved. */ #include "msm_vidc_iris3.h" @@ -1190,7 +1190,7 @@ int msm_vidc_adjust_bitrate_boost_iris3(void* instance, struct v4l2_ctrl *ctrl) if (capability->cap[BITRATE_BOOST].flags & CAP_FLAG_CLIENT_SET) { /* accept client set bitrate boost value as is */ } else { - if (res_is_less_than_or_equal_to(width, height, 3840, 2160) && + if (res_is_less_than_or_equal_to(width, height, 4096, 2176) && frame_rate <= 60) adjusted_value = MAX_BITRATE_BOOST; else From 59b8019b9d1c941b4dcce4119f18ae3849766ee7 Mon Sep 17 00:00:00 2001 From: Deepa Guthyappa Madivalara Date: Wed, 20 Apr 2022 11:37:52 -0700 Subject: [PATCH 0603/1061] video: driver: amend priorities to allow more sessions 1. adjust client set non-realtime priroty with NRT_PRIORITY_OFFSET (2) 2. if total mbps is more than max_mbps a. allow encode session by reducing decoder sessions priority by 1 b. allow decode session by moving it to non-realtime session in order to not disturb the ongoing sessions Change-Id: I96fd2ac75c123d681982fb9a2c06ac51d15bd59a Signed-off-by: Deepa Guthyappa Madivalara --- driver/platform/kalama/src/msm_vidc_kalama.c | 2 +- driver/vidc/inc/msm_vidc_driver.h | 1 + driver/vidc/inc/msm_vidc_inst.h | 1 + driver/vidc/inc/msm_vidc_internal.h | 2 + driver/vidc/src/msm_vdec.c | 9 +++ driver/vidc/src/msm_vidc_control.c | 37 +++++---- driver/vidc/src/msm_vidc_driver.c | 79 +++++++++++++++----- 7 files changed, 97 insertions(+), 34 deletions(-) diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index 62c201ca58..36d53a4ce2 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -1379,7 +1379,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, {PRIORITY, DEC|ENC, CODECS_ALL, - 0, 2, 1, 1, + 0, 1 + NRT_PRIORITY_OFFSET, 1, 1 + NRT_PRIORITY_OFFSET, V4L2_CID_MPEG_VIDC_PRIORITY, HFI_PROP_SESSION_PRIORITY, CAP_FLAG_DYNAMIC_ALLOWED}, diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 433ea73f7b..22b7c8246c 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -477,6 +477,7 @@ int msm_vidc_update_debug_str(struct msm_vidc_inst *inst); void msm_vidc_allow_dcvs(struct msm_vidc_inst *inst); bool msm_vidc_allow_decode_batch(struct msm_vidc_inst *inst); int msm_vidc_check_session_supported(struct msm_vidc_inst *inst); +bool msm_vidc_ignore_session_load(struct msm_vidc_inst *inst); int msm_vidc_check_core_mbps(struct msm_vidc_inst *inst); int msm_vidc_check_core_mbpf(struct msm_vidc_inst *inst); int msm_vidc_check_scaling_supported(struct msm_vidc_inst *inst); diff --git a/driver/vidc/inc/msm_vidc_inst.h b/driver/vidc/inc/msm_vidc_inst.h index b34332dcab..6c1371567c 100644 --- a/driver/vidc/inc/msm_vidc_inst.h +++ b/driver/vidc/inc/msm_vidc_inst.h @@ -171,5 +171,6 @@ struct msm_vidc_inst { u32 max_rate; bool has_bframe; bool ir_enabled; + u32 adjust_priority; }; #endif // _MSM_VIDC_INST_H_ diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 024997b957..7d14691092 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -31,6 +31,8 @@ #define DEFAULT_WIDTH 320 #define DEFAULT_FPS 30 #define MAXIMUM_VP9_FPS 60 +#define NRT_PRIORITY_OFFSET 2 +#define RT_DEC_DOWN_PRORITY_OFFSET 1 #define MAX_SUPPORTED_INSTANCES 16 #define DEFAULT_BSE_VPP_DELAY 2 #define MAX_CAP_PARENTS 20 diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 0a2e88a48d..33df7cfb93 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -2054,6 +2054,15 @@ int msm_vdec_qbuf(struct msm_vidc_inst *inst, struct vb2_buffer *vb2) } } + if (inst->adjust_priority) { + s32 priority = inst->capabilities->cap[PRIORITY].value; + + priority += inst->adjust_priority; + inst->adjust_priority = 0; + msm_vidc_update_cap_value(inst, PRIORITY, priority, __func__); + msm_vidc_set_session_priority(inst, PRIORITY); + } + /* batch decoder output & meta buffer only */ if (inst->decode_batch.enable && vb2->type == OUTPUT_MPLANE) rc = msm_vdec_qbuf_batch(inst, vb2); diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 7e945a7c2b..9eaa4a0434 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -1085,21 +1085,11 @@ static int msm_vidc_update_static_property(struct msm_vidc_inst *inst, return rc; } + /* call this explicitly to adjust client priority */ if (ctrl->id == V4L2_CID_MPEG_VIDC_PRIORITY) { rc = msm_vidc_adjust_session_priority(inst, ctrl); if (rc) return rc; - - /** - * This is the last static s_ctrl from client(commit point). So update - * input & output counts to reflect final buffer counts based on dcvs - * & decoder_batching enable/disable. So client is expected to query - * for final counts after setting priority control. - */ - if (is_decode_session(inst)) - inst->decode_batch.enable = msm_vidc_allow_decode_batch(inst); - - msm_vidc_allow_dcvs(inst); } if (ctrl->id == V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER) { u32 enable; @@ -2792,8 +2782,29 @@ int msm_vidc_adjust_session_priority(void *instance, struct v4l2_ctrl *ctrl) return -EINVAL; } capability = inst->capabilities; - adjusted_value = ctrl ? ctrl->val : - capability->cap[PRIORITY].value; + /* + * Priority handling + * Client will set 0 (realtime), 1+ (non-realtime) + * Driver adds NRT_PRIORITY_OFFSET (2) to clients non-realtime priority + * and hence PRIORITY values in the driver become 0, 3+. + * Driver may move decode realtime sessions to non-realtime by + * increasing priority by 1 to RT sessions in HW overloaded cases. + * So driver PRIORITY values can be 0, 1, 3+. + * When driver setting priority to firmware, driver adds + * FIRMWARE_PRIORITY_OFFSET (1) for all sessions except + * non-critical sessions. So finally firmware priority values ranges + * from 0 (Critical session), 1 (realtime session), + * 2+ (non-realtime session) + */ + if (ctrl) { + /* add offset when client sets non-realtime */ + if (ctrl->val) + adjusted_value = ctrl->val + NRT_PRIORITY_OFFSET; + else + adjusted_value = ctrl->val; + } else { + adjusted_value = capability->cap[PRIORITY].value; + } msm_vidc_update_cap_value(inst, PRIORITY, adjusted_value, __func__); diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 779c4b70e1..cd1e301710 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -5923,12 +5923,25 @@ static int msm_vidc_print_insts_info(struct msm_vidc_core *core) return 0; } +bool msm_vidc_ignore_session_load(struct msm_vidc_inst *inst) { + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (!is_realtime_session(inst) || is_thumbnail_session(inst) || + is_image_session(inst)) + return true; + + return false; +} + int msm_vidc_check_core_mbps(struct msm_vidc_inst *inst) { - u32 mbps = 0; + u32 mbps = 0, total_mbps = 0, enc_mbps = 0; struct msm_vidc_core *core; struct msm_vidc_inst *instance; - int rc = 0; if (!inst || !inst->core || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); @@ -5936,11 +5949,14 @@ int msm_vidc_check_core_mbps(struct msm_vidc_inst *inst) } core = inst->core; - if (!inst->capabilities->cap[CHECK_MBPS].value) { - i_vpr_h(inst, "%s: skip mbps check\n", __func__); + /* skip mbps check for non-realtime, thumnail, image sessions */ + if (msm_vidc_ignore_session_load(inst)) { + i_vpr_h(inst, + "%s: skip mbps check due to NRT %d, TH %d, IMG %d\n", __func__, + !is_realtime_session(inst), is_thumbnail_session(inst), + is_image_session(inst)); return 0; } - core_lock(core, __func__); list_for_each_entry(instance, &core->instances, list) { /* ignore invalid/error session */ @@ -5948,25 +5964,50 @@ int msm_vidc_check_core_mbps(struct msm_vidc_inst *inst) continue; /* ignore thumbnail, image, and non realtime sessions */ - if (is_thumbnail_session(instance) || - is_image_session(instance) || - !is_realtime_session(instance)) + if (msm_vidc_ignore_session_load(inst)) continue; - mbps += msm_vidc_get_inst_load(instance); + mbps = msm_vidc_get_inst_load(instance); + total_mbps += mbps; + if (is_encode_session(instance)) + enc_mbps += mbps; } core_unlock(core, __func__); - if (mbps > core->capabilities[MAX_MBPS].value) { - rc = -ENOMEM; - i_vpr_e(inst, "%s: Hardware overloaded. needed %u, max %u", __func__, - mbps, core->capabilities[MAX_MBPS].value); - return rc; - } else { - i_vpr_h(inst, "%s: HW load needed %u is within max %u", __func__, - mbps, core->capabilities[MAX_MBPS].value); + if (is_encode_session(inst)) { + /* reject encoder if all encoders mbps is greater than MAX_MBPS */ + if (enc_mbps > core->capabilities[MAX_MBPS].value) { + i_vpr_e(inst, "%s: Hardware overloaded. needed %u, max %u", __func__, + mbps, core->capabilities[MAX_MBPS].value); + return -ENOMEM; + } + /* + * if total_mbps is greater than max_mbps then reduce all decoders + * priority by 1 to allow this encoder + */ + if (total_mbps > core->capabilities[MAX_MBPS].value) { + core_lock(core, __func__); + list_for_each_entry(instance, &core->instances, list) { + /* reduce realtime decode sessions priority */ + if (is_decode_session(inst) && is_realtime_session(inst)) { + instance->adjust_priority = RT_DEC_DOWN_PRORITY_OFFSET; + i_vpr_h(inst, "%s: pending adjust priority by %d\n", + __func__, inst->adjust_priority); + } + } + core_unlock(core, __func__); + } + } else if (is_decode_session(inst)){ + if (total_mbps > core->capabilities[MAX_MBPS].value) { + inst->adjust_priority = RT_DEC_DOWN_PRORITY_OFFSET; + i_vpr_h(inst, "%s: pending adjust priority by %d\n", + __func__, inst->adjust_priority); + } } + i_vpr_h(inst, "%s: HW load needed %u is within max %u", __func__, + total_mbps, core->capabilities[MAX_MBPS].value); + return 0; } @@ -6010,9 +6051,7 @@ int msm_vidc_check_core_mbpf(struct msm_vidc_inst *inst) core_lock(core, __func__); /* check real-time video sessions max limit */ list_for_each_entry(instance, &core->instances, list) { - if (is_thumbnail_session(instance) || - is_image_session(instance) || - !is_realtime_session(instance)) + if (msm_vidc_ignore_session_load(inst)) continue; video_rt_mbpf += msm_vidc_get_mbs_per_frame(instance); From 30cee602ede03c6332d2cce95a62d30b6fa412fc Mon Sep 17 00:00:00 2001 From: Vedang Nagar Date: Thu, 21 Apr 2022 20:05:20 +0530 Subject: [PATCH 0604/1061] video-driver: Add Null Pointer check for response_workq Add Null Pointer check for response_workq inside cancel_response_work_sync function. Change-Id: I574034b8937ade601cb9cda3f91c3c3bcf2c3e1e Signed-off-by: Vedang Nagar --- driver/vidc/src/venus_hfi_response.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index 01a24fe031..d592d370ac 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -1898,7 +1898,7 @@ int cancel_response_work(struct msm_vidc_inst *inst) int cancel_response_work_sync(struct msm_vidc_inst *inst) { - if (!inst) { + if (!inst || !inst->response_workq) { d_vpr_e("%s: Invalid arguments\n", __func__); return -EINVAL; } From 0f28bde3c54cf013ab4a9540e67ac6ba977c5561 Mon Sep 17 00:00:00 2001 From: Roopangkumar Patel Date: Wed, 20 Apr 2022 06:14:22 -0700 Subject: [PATCH 0605/1061] video: driver: Change to support ROI with CBR - Enable ROI for VBR, CBR_CFR, CBR_CFR bitrate modes. - Disable ROI feature, when rotation, downscaling/scaling enable, - Disable adaptive blur, when ROI feature is enable. Change-Id: If645a255bca93b90fe5cee5a735d7ffcd2a6bc5c Signed-off-by: Roopangkumar Patel --- driver/platform/kalama/src/msm_vidc_kalama.c | 2 +- driver/vidc/src/msm_vidc_control.c | 12 ++++++++---- 2 files changed, 9 insertions(+), 5 deletions(-) diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index 12a0269eb7..5d2ed29cf3 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -1840,7 +1840,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kala msm_vidc_set_u32}, {BLUR_TYPES, ENC, H264|HEVC, - {PIX_FMTS, BITRATE_MODE, MIN_QUALITY}, + {PIX_FMTS, BITRATE_MODE, MIN_QUALITY, META_ROI_INFO}, {BLUR_RESOLUTION}, msm_vidc_adjust_blur_type, msm_vidc_set_u32_enum}, diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 9eaa4a0434..8de3d9d65a 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -2355,7 +2355,7 @@ int msm_vidc_adjust_blur_type(void *instance, struct v4l2_ctrl *ctrl) struct msm_vidc_inst_capability *capability; s32 adjusted_value; struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - s32 rc_type = -1; + s32 rc_type = -1, roi_enable = -1; s32 pix_fmts = -1, min_quality = -1; if (!inst || !inst->capabilities) { @@ -2375,7 +2375,9 @@ int msm_vidc_adjust_blur_type(void *instance, struct v4l2_ctrl *ctrl) msm_vidc_get_parent_value(inst, BLUR_TYPES, PIX_FMTS, &pix_fmts, __func__) || msm_vidc_get_parent_value(inst, BLUR_TYPES, MIN_QUALITY, - &min_quality, __func__)) + &min_quality, __func__) || + msm_vidc_get_parent_value(inst, BLUR_TYPES, META_ROI_INFO, + &roi_enable, __func__)) return -EINVAL; if (adjusted_value == VIDC_BLUR_EXTERNAL) { @@ -2387,7 +2389,7 @@ int msm_vidc_adjust_blur_type(void *instance, struct v4l2_ctrl *ctrl) (rc_type != HFI_RC_VBR_CFR && rc_type != HFI_RC_CBR_CFR && rc_type != HFI_RC_CBR_VFR) || - is_10bit_colorformat(pix_fmts)) { + is_10bit_colorformat(pix_fmts) || roi_enable) { adjusted_value = VIDC_BLUR_NONE; } } @@ -2834,7 +2836,9 @@ int msm_vidc_adjust_roi_info(void *instance, struct v4l2_ctrl *ctrl) &pix_fmt, __func__)) return -EINVAL; - if (rc_type != HFI_RC_VBR_CFR || !is_8bit_colorformat(pix_fmt)) + if ((rc_type != HFI_RC_VBR_CFR && rc_type != HFI_RC_CBR_CFR + && rc_type != HFI_RC_CBR_VFR) || !is_8bit_colorformat(pix_fmt) + || is_scaling_enabled(inst) || is_rotation_90_or_270(inst)) adjusted_value = 0; msm_vidc_update_cap_value(inst, META_ROI_INFO, From bb8c08f6cdde24a76ace00ffa6f36be0bbf7fd14 Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Mon, 25 Apr 2022 13:30:29 -0700 Subject: [PATCH 0606/1061] video: driver: fix decoder output port crop info crop width and height should be calculated using left and top as references. Change-Id: I463cdc9557dab3ae7200cb6aaf60fce399571d30 Signed-off-by: Darshana Patil --- driver/vidc/src/msm_vdec.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 33df7cfb93..f59cdaba53 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -1275,9 +1275,9 @@ static int msm_vdec_read_input_subcr_params(struct msm_vidc_inst *inst) inst->crop.top = subsc_params.crop_offsets[0] & 0xFFFF; inst->crop.left = (subsc_params.crop_offsets[0] >> 16) & 0xFFFF; inst->crop.height = inst->fmts[INPUT_PORT].fmt.pix_mp.height - - (subsc_params.crop_offsets[1] & 0xFFFF); + (subsc_params.crop_offsets[1] & 0xFFFF) - inst->crop.top; inst->crop.width = inst->fmts[INPUT_PORT].fmt.pix_mp.width - - ((subsc_params.crop_offsets[1] >> 16) & 0xFFFF); + ((subsc_params.crop_offsets[1] >> 16) & 0xFFFF) - inst->crop.left; msm_vidc_update_cap_value(inst, PROFILE, subsc_params.profile, __func__); msm_vidc_update_cap_value(inst, LEVEL, subsc_params.level, __func__); From 047ed11bf7d4d4718a3dd65ced5d90e0d471187e Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Wed, 20 Apr 2022 12:01:18 -0700 Subject: [PATCH 0607/1061] video: driver: add restrictions for dec fence enablement - Allow dec sw fence enablement only if decode order is set and non interlace type session. - Enable low latency mode if sw fence is enabled. - Signal fence if FBD length > 0. Change-Id: Ib59c2de51f621b796e68fe2aba68d9fca3ff4272 Signed-off-by: Akshata Sahukar --- driver/platform/kalama/src/msm_vidc_kalama.c | 31 ++++++-- driver/vidc/inc/msm_vidc_control.h | 4 +- driver/vidc/inc/msm_vidc_driver.h | 5 ++ driver/vidc/inc/msm_vidc_fence.h | 4 +- driver/vidc/inc/msm_vidc_internal.h | 1 + driver/vidc/src/msm_vdec.c | 10 ++- driver/vidc/src/msm_vidc_control.c | 72 ++++++++++++++++--- driver/vidc/src/msm_vidc_driver.c | 4 +- driver/vidc/src/msm_vidc_fence.c | 50 +++++++------ driver/vidc/src/venus_hfi_response.c | 24 ++++--- .../uapi/vidc/media/v4l2_vidc_extensions.h | 10 +++ 11 files changed, 167 insertions(+), 48 deletions(-) diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index 5d2ed29cf3..a12290dffd 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -330,7 +330,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { * Client will enable V4L2_CID_MPEG_VIDC_METADATA_OUTBUF_FENCE * to get fence_id in input metadata buffer done. */ - {META_OUTBUF_FENCE, DEC, CODECS_ALL, + {META_OUTBUF_FENCE, DEC, H264|HEVC|VP9|AV1, V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_INPUT, 0, V4L2_MPEG_VIDC_META_DISABLE, @@ -1327,7 +1327,10 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { 0, HFI_PROP_PIPE}, - {POC, DEC, H264, 0, 18, 1, 1}, + {POC, DEC, H264, + 0, 18, 1, 1, + 0, + HFI_PROP_PIC_ORDER_CNT_TYPE}, {QUALITY_MODE, ENC, CODECS_ALL, MSM_VIDC_MAX_QUALITY_MODE, @@ -1729,6 +1732,12 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kala NULL, msm_vidc_set_u32}, + {META_OUTBUF_FENCE, DEC, H264|HEVC|VP9|AV1, + {OUTPUT_ORDER}, + {LOWLATENCY_MODE}, + msm_vidc_adjust_dec_outbuf_fence, + NULL}, + {HFLIP, ENC, CODECS_ALL, {0}, {0}, @@ -1860,7 +1869,13 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kala {LOWLATENCY_MODE, ENC, H264 | HEVC, {BITRATE_MODE}, {STAGE}, - msm_vidc_adjust_lowlatency_mode, + msm_vidc_adjust_enc_lowlatency_mode, + NULL}, + + {LOWLATENCY_MODE, DEC, H264|HEVC|VP9|AV1, + {META_OUTBUF_FENCE}, + {STAGE}, + msm_vidc_adjust_dec_lowlatency_mode, NULL}, {LTR_COUNT, ENC, H264|HEVC, @@ -2150,7 +2165,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kala {OUTPUT_ORDER, DEC, H264|HEVC|VP9|AV1, {THUMBNAIL_MODE, DISPLAY_DELAY, DISPLAY_DELAY_ENABLE}, - {0}, + {META_OUTBUF_FENCE}, msm_vidc_adjust_output_order, msm_vidc_set_u32}, @@ -2190,7 +2205,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kala NULL, msm_vidc_set_u32_packed}, - {STAGE, DEC|ENC, CODECS_ALL, + {STAGE, ENC | DEC, CODECS_ALL, {0}, {0}, NULL, @@ -2202,6 +2217,12 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kala NULL, msm_vidc_set_stage}, + {STAGE, DEC, H264|HEVC|VP9|AV1, + {LOWLATENCY_MODE}, + {0}, + NULL, + msm_vidc_set_stage}, + {PIPE, DEC|ENC, CODECS_ALL, {0}, {0}, diff --git a/driver/vidc/inc/msm_vidc_control.h b/driver/vidc/inc/msm_vidc_control.h index 8ff65837b5..99342c2912 100644 --- a/driver/vidc/inc/msm_vidc_control.h +++ b/driver/vidc/inc/msm_vidc_control.h @@ -46,7 +46,8 @@ int msm_vidc_adjust_blur_resolution(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_brs(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_bitrate_boost(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_min_quality(void *instance, struct v4l2_ctrl *ctrl); -int msm_vidc_adjust_lowlatency_mode(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_enc_lowlatency_mode(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_dec_lowlatency_mode(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_set_v4l2_properties(struct msm_vidc_inst *inst); int msm_vidc_prepare_dependency_list(struct msm_vidc_inst *inst); int msm_vidc_adjust_session_priority(void *instance, struct v4l2_ctrl *ctrl); @@ -54,6 +55,7 @@ int msm_vidc_adjust_roi_info(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_all_intra(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_dec_frame_rate(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_dec_operating_rate(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_dec_outbuf_fence(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_preprocess(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_set_header_mode(void *instance, diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 22b7c8246c..22a19c33ed 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -197,6 +197,11 @@ static inline bool is_meta_enabled(struct msm_vidc_inst *inst, unsigned int type return enabled; } +static inline bool is_outbuf_fence_enabled(struct msm_vidc_inst *inst) +{ + return is_meta_rx_inp_enabled(inst, META_OUTBUF_FENCE); +} + static inline bool is_linear_yuv_colorformat(enum msm_vidc_colorformat_type colorformat) { return colorformat == MSM_VIDC_FMT_NV12 || diff --git a/driver/vidc/inc/msm_vidc_fence.h b/driver/vidc/inc/msm_vidc_fence.h index 58999899e2..21f9cf481d 100644 --- a/driver/vidc/inc/msm_vidc_fence.h +++ b/driver/vidc/inc/msm_vidc_fence.h @@ -13,10 +13,12 @@ struct msm_vidc_fence *msm_vidc_fence_create( struct msm_vidc_inst *inst); int msm_vidc_create_fence_fd(struct msm_vidc_inst *inst, struct msm_vidc_fence *fence); +struct msm_vidc_fence *msm_vidc_get_fence_from_id( + struct msm_vidc_inst *inst, u32 fence_id); int msm_vidc_fence_signal(struct msm_vidc_inst *inst, u32 fence_id); void msm_vidc_fence_destroy(struct msm_vidc_inst *inst, - struct msm_vidc_fence *fence); + u32 fence_id); int msm_vidc_fence_init(struct msm_vidc_inst *inst); void msm_vidc_fence_deinit(struct msm_vidc_inst *inst); diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 7d14691092..1f6cd571a8 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -762,6 +762,7 @@ struct msm_vidc_hfi_frame_info { u32 cf; u32 data_corrupt; u32 overflow; + u32 fence_id; }; struct msm_vidc_decode_vpp_delay { diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index f59cdaba53..2c4da109e5 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -1190,7 +1190,7 @@ static int msm_vdec_read_input_subcr_params(struct msm_vidc_inst *inst) u32 colour_description_present_flag = 0; u32 video_signal_type_present_flag = 0; - if (!inst || !inst->core) { + if (!inst || !inst->core || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -1298,6 +1298,14 @@ static int msm_vdec_read_input_subcr_params(struct msm_vidc_inst *inst) subsc_params.av1_super_block_enabled, __func__); } + /* disable META_OUTBUF_FENCE if session is Interlace type */ + if (inst->capabilities->cap[CODED_FRAMES].value == + CODED_FRAMES_INTERLACE) { + msm_vidc_update_cap_value(inst, META_OUTBUF_FENCE, + V4L2_MPEG_VIDC_META_RX_INPUT | + V4L2_MPEG_VIDC_META_DISABLE, __func__); + } + return 0; } diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 8de3d9d65a..0c41dc141c 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -443,7 +443,6 @@ int msm_vidc_update_cap_value(struct msm_vidc_inst *inst, u32 cap_id, s32 adjusted_val, const char *func) { int prev_value = 0; - bool is_updated = false; if (!inst || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); @@ -464,19 +463,15 @@ int msm_vidc_update_cap_value(struct msm_vidc_inst *inst, u32 cap_id, /* disable metadata */ inst->capabilities->cap[cap_id].value &= ~adjusted_val; } - if (prev_value != (prev_value | adjusted_val)) - is_updated = true; } else { inst->capabilities->cap[cap_id].value = adjusted_val; - if (prev_value != adjusted_val) - is_updated = true; } - if (is_updated) { + if (prev_value != inst->capabilities->cap[cap_id].value) { i_vpr_h(inst, "%s: updated database: name: %s, value: %#x -> %#x\n", func, cap_name(cap_id), - prev_value, adjusted_val); + prev_value, inst->capabilities->cap[cap_id].value); } return 0; @@ -2743,7 +2738,7 @@ int msm_vidc_adjust_preprocess(void *instance, struct v4l2_ctrl *ctrl) return 0; } -int msm_vidc_adjust_lowlatency_mode(void *instance, struct v4l2_ctrl *ctrl) +int msm_vidc_adjust_enc_lowlatency_mode(void *instance, struct v4l2_ctrl *ctrl) { struct msm_vidc_inst_capability *capability; s32 adjusted_value; @@ -2773,6 +2768,36 @@ int msm_vidc_adjust_lowlatency_mode(void *instance, struct v4l2_ctrl *ctrl) return 0; } +int msm_vidc_adjust_dec_lowlatency_mode(void *instance, struct v4l2_ctrl *ctrl) +{ + struct msm_vidc_inst_capability *capability; + s32 adjusted_value; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + s32 outbuf_fence = V4L2_MPEG_VIDC_META_DISABLE; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + adjusted_value = ctrl ? ctrl->val : + capability->cap[LOWLATENCY_MODE].value; + + if (msm_vidc_get_parent_value(inst, LOWLATENCY_MODE, META_OUTBUF_FENCE, + &outbuf_fence, __func__)) + return -EINVAL; + + if (outbuf_fence & V4L2_MPEG_VIDC_META_ENABLE && + outbuf_fence & V4L2_MPEG_VIDC_META_RX_INPUT) + adjusted_value = 1; + + msm_vidc_update_cap_value(inst, LOWLATENCY_MODE, + adjusted_value, __func__); + + return 0; +} + int msm_vidc_adjust_session_priority(void *instance, struct v4l2_ctrl *ctrl) { int adjusted_value; @@ -2893,6 +2918,37 @@ int msm_vidc_adjust_dec_operating_rate(void *instance, struct v4l2_ctrl *ctrl) return 0; } +int msm_vidc_adjust_dec_outbuf_fence(void *instance, struct v4l2_ctrl *ctrl) +{ + struct msm_vidc_inst_capability *capability; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + u32 adjusted_value = 0; + s32 picture_order = -1; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + adjusted_value = ctrl ? ctrl->val : capability->cap[META_OUTBUF_FENCE].value; + + if (msm_vidc_get_parent_value(inst, META_OUTBUF_FENCE, OUTPUT_ORDER, + &picture_order, __func__)) + return -EINVAL; + + if (picture_order == V4L2_MPEG_MSM_VIDC_DISABLE) { + /* disable outbuf fence */ + adjusted_value = V4L2_MPEG_VIDC_META_DISABLE | + V4L2_MPEG_VIDC_META_RX_INPUT; + } + + msm_vidc_update_cap_value(inst, META_OUTBUF_FENCE, + adjusted_value, __func__); + + return 0; +} + int msm_vidc_prepare_dependency_list(struct msm_vidc_inst *inst) { struct list_head root_list, opt_list; diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index cd1e301710..96b0cad991 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -3481,7 +3481,7 @@ exit: if (rc) { i_vpr_e(inst, "%s: qbuf failed\n", __func__); if (fence) - msm_vidc_fence_destroy(inst, fence); + msm_vidc_fence_destroy(inst, (u32)fence->dma_fence.seqno); } return rc; } @@ -5569,7 +5569,7 @@ void msm_vidc_destroy_buffers(struct msm_vidc_inst *inst) list_for_each_entry_safe(fence, dummy_fence, &inst->fence_list, list) { i_vpr_e(inst, "%s: destroying fence id: %llu\n", __func__, fence->dma_fence.seqno); - msm_vidc_fence_destroy(inst, fence); + msm_vidc_fence_destroy(inst, (u32)fence->dma_fence.seqno); } /* destroy buffers from pool */ diff --git a/driver/vidc/src/msm_vidc_fence.c b/driver/vidc/src/msm_vidc_fence.c index 23b0f1bd0e..f85053e939 100644 --- a/driver/vidc/src/msm_vidc_fence.c +++ b/driver/vidc/src/msm_vidc_fence.c @@ -117,15 +117,15 @@ err_fd: return rc; } -int msm_vidc_fence_signal(struct msm_vidc_inst *inst, u32 fence_id) +struct msm_vidc_fence *msm_vidc_get_fence_from_id( + struct msm_vidc_inst *inst, u32 fence_id) { - int rc = 0; struct msm_vidc_fence *fence, *dummy_fence; bool found = false; if (!inst) { d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; + return NULL; } list_for_each_entry_safe(fence, dummy_fence, &inst->fence_list, list) { @@ -135,12 +135,30 @@ int msm_vidc_fence_signal(struct msm_vidc_inst *inst, u32 fence_id) } } - if (!found) { + if (!found) + return NULL; + + return fence; +} + +int msm_vidc_fence_signal(struct msm_vidc_inst *inst, u32 fence_id) +{ + int rc = 0; + struct msm_vidc_fence *fence; + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + fence = msm_vidc_get_fence_from_id(inst, fence_id); + if (!fence) { i_vpr_e(inst, "%s: no fence available to signal with id: %u", __func__, fence_id); rc = -EINVAL; goto exit; } + i_vpr_l(inst, "%s: fence %s\n", __func__, fence->name); dma_fence_signal(&fence->dma_fence); dma_fence_put(&fence->dma_fence); @@ -150,28 +168,18 @@ exit: return rc; } -void msm_vidc_fence_destroy(struct msm_vidc_inst *inst, - struct msm_vidc_fence *fence_to_destroy) -{ - struct msm_vidc_fence *fence, *dummy_fence; - bool found = false; - if (!inst || !fence_to_destroy) { +void msm_vidc_fence_destroy(struct msm_vidc_inst *inst, u32 fence_id) +{ + struct msm_vidc_fence *fence; + + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return; } - list_for_each_entry_safe(fence, dummy_fence, &inst->fence_list, list) { - if (fence->dma_fence.seqno == - fence_to_destroy->dma_fence.seqno) { - found = true; - break; - } - } - - if (!found) { - i_vpr_e(inst, "%s: no fence available to destroy with id: %llu", - __func__, fence_to_destroy->dma_fence.seqno); + fence = msm_vidc_get_fence_from_id(inst, fence_id); + if (!fence) { return; } diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index d592d370ac..c483e63b3c 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -864,7 +864,7 @@ static int handle_output_buffer(struct msm_vidc_inst *inst, if (buffer->data_size) { i_vpr_e(inst, "%s: reset data size to zero for last flag buffer\n", __func__); - buffer->data_size = 0; + buf->data_size = 0; } if (buffer->flags & HFI_BUF_FW_FLAG_READONLY) { i_vpr_e(inst, "%s: reset RO flag for last flag buffer\n", @@ -895,6 +895,19 @@ static int handle_output_buffer(struct msm_vidc_inst *inst, buf->flags = 0; buf->flags = get_driver_buffer_flags(inst, buffer->flags); + /* fence signalling */ + if (inst->hfi_frame_info.fence_id) { + if (buf->data_size) { + /* signal fence */ + msm_vidc_fence_signal(inst, + inst->hfi_frame_info.fence_id); + } else { + /* destroy fence */ + msm_vidc_fence_destroy(inst, + inst->hfi_frame_info.fence_id); + } + } + if (is_decode_session(inst)) { inst->power.fw_cr = inst->hfi_frame_info.cr; inst->power.fw_cf = inst->hfi_frame_info.cf; @@ -1435,7 +1448,6 @@ static int handle_property_with_payload(struct msm_vidc_inst *inst, { int rc = 0; u32 *payload_ptr = NULL; - u32 fence_id = 0; payload_ptr = (u32 *)((u8 *)pkt + sizeof(struct hfi_packet)); if (!payload_ptr) { @@ -1536,13 +1548,7 @@ static int handle_property_with_payload(struct msm_vidc_inst *inst, __func__, payload_ptr[0], inst->capabilities->cap[PIPE].value); break; case HFI_PROP_FENCE: - if (is_meta_rx_inp_enabled(inst, META_OUTBUF_FENCE)) { - fence_id = payload_ptr[0]; - rc = msm_vidc_fence_signal(inst, fence_id); - } else { - i_vpr_e(inst, "%s: fence is not enabled for this session\n", - __func__); - } + inst->hfi_frame_info.fence_id = payload_ptr[0]; break; default: i_vpr_e(inst, "%s: invalid property %#x\n", diff --git a/include/uapi/vidc/media/v4l2_vidc_extensions.h b/include/uapi/vidc/media/v4l2_vidc_extensions.h index b5ee13460c..41d2507a4c 100644 --- a/include/uapi/vidc/media/v4l2_vidc_extensions.h +++ b/include/uapi/vidc/media/v4l2_vidc_extensions.h @@ -389,6 +389,16 @@ enum meta_interlace_info { META_INTERLACE_FRAME_INTERLACE_BOTTOMFIELD_FIRST = 0x00000020, }; +enum meta_picture_type { + META_PICTURE_TYPE_IDR = 0x00000001, + META_PICTURE_TYPE_P = 0x00000002, + META_PICTURE_TYPE_B = 0x00000004, + META_PICTURE_TYPE_I = 0x00000008, + META_PICTURE_TYPE_CRA = 0x00000010, + META_PICTURE_TYPE_BLA = 0x00000020, + META_PICTURE_TYPE_NOSHOW = 0x00000040, +}; + /* vendor controls end */ /* vendor events start */ From ef97be4b75b87342684501ec56814fd478fb0bcd Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Tue, 26 Apr 2022 22:34:11 -0700 Subject: [PATCH 0608/1061] video: driver: superframe metabuffer fix with request api, c2 hal sets 2MB as input metadata buffer size for encoder. Hence amend superframe meta buffer size sanity condition. Change-Id: I6c837bb85471b5e4be25811922081d1160761464 Signed-off-by: Darshana Patil --- driver/vidc/src/venus_hfi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index 9f4f01b88d..8e28fb8818 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -3355,7 +3355,7 @@ int venus_hfi_queue_super_buffer(struct msm_vidc_inst *inst, } /* Sanitize super meta buffer */ - if (metabuf && meta_size * batch_size != metabuf->buffer_size) { + if (metabuf && meta_size * batch_size > metabuf->buffer_size) { i_vpr_e(inst, "%s: invalid super meta buffer. meta %u, batch %u, buffer size %u\n", __func__, meta_size, batch_size, metabuf->buffer_size); goto unlock; From 31272040c399683c68ff82a8c7395a4eee056674 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Tue, 26 Apr 2022 12:56:50 +0530 Subject: [PATCH 0609/1061] video: driver: fix dmabuf leak issue in queue init sequence In __interface_queues_init() api somtimes map() call is failing. Map failure scenario we were not freeing allocated memory. So added change to cleanup allocated memory incase of map failure scenario. Change-Id: I04b196e55a5f080a4ec973aa166f7e1b6525a58c Signed-off-by: Govindaraj Rajagopal --- driver/vidc/src/venus_hfi.c | 19 +++++++++++-------- 1 file changed, 11 insertions(+), 8 deletions(-) diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index 9f4f01b88d..9c1604545b 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -2,6 +2,7 @@ /* * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. */ +/* Copyright (c) 2022. Qualcomm Innovation Center, Inc. All rights reserved. */ #include #include @@ -2252,6 +2253,8 @@ static int __interface_queues_init(struct msm_vidc_core *core) d_vpr_e("%s: alloc failed\n", __func__); goto fail_alloc_queue; } + core->iface_q_table.align_virtual_addr = alloc.kvaddr; + core->iface_q_table.alloc = alloc; memset(&map, 0, sizeof(map)); map.type = alloc.type; @@ -2262,12 +2265,10 @@ static int __interface_queues_init(struct msm_vidc_core *core) d_vpr_e("%s: alloc failed\n", __func__); goto fail_alloc_queue; } - - core->iface_q_table.align_virtual_addr = alloc.kvaddr; core->iface_q_table.align_device_addr = map.device_addr; - core->iface_q_table.mem_size = VIDC_IFACEQ_TABLE_SIZE; - core->iface_q_table.alloc = alloc; core->iface_q_table.map = map; + + core->iface_q_table.mem_size = VIDC_IFACEQ_TABLE_SIZE; offset += core->iface_q_table.mem_size; for (i = 0; i < VIDC_IFACEQ_NUMQ; i++) { @@ -2324,6 +2325,9 @@ static int __interface_queues_init(struct msm_vidc_core *core) d_vpr_e("%s: sfr alloc failed\n", __func__); goto fail_alloc_queue; } + core->sfr.align_virtual_addr = alloc.kvaddr; + core->sfr.alloc = alloc; + memset(&map, 0, sizeof(map)); map.type = alloc.type; map.region = alloc.region; @@ -2334,12 +2338,11 @@ static int __interface_queues_init(struct msm_vidc_core *core) goto fail_alloc_queue; } core->sfr.align_device_addr = map.device_addr; - core->sfr.align_virtual_addr = alloc.kvaddr; - core->sfr.mem_size = ALIGNED_SFR_SIZE; - core->sfr.alloc = alloc; core->sfr.map = map; + + core->sfr.mem_size = ALIGNED_SFR_SIZE; /* write sfr buffer size in first word */ - *((u32 *)core->sfr.align_virtual_addr) = ALIGNED_SFR_SIZE; + *((u32 *)core->sfr.align_virtual_addr) = core->sfr.mem_size; rc = call_venus_op(core, setup_ucregion_memmap, core); if (rc) From 808cebd0b46d2a5387eec713c0f892dec2cc4d15 Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Thu, 28 Apr 2022 12:00:24 -0700 Subject: [PATCH 0610/1061] video: driver: introduce metadata size macro introduce encode input and output metadata size macro in the interface file. Change-Id: I40776018c5c3278d40a426c2afde4d56e90066e2 Signed-off-by: Darshana Patil --- driver/vidc/inc/msm_vidc_internal.h | 2 -- driver/vidc/src/msm_vidc_buffer.c | 25 +------------------ .../uapi/vidc/media/v4l2_vidc_extensions.h | 5 ++++ 3 files changed, 6 insertions(+), 26 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 1f6cd571a8..351b9139eb 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -136,8 +136,6 @@ */ #define MAX_DPB_LIST_ARRAY_SIZE (16 * 4) #define MAX_DPB_LIST_PAYLOAD_SIZE (16 * 4 * 4) -/* Default metadata size */ -#define MSM_VIDC_METADATA_SIZE ALIGN(16 * 1024, SZ_4K) enum msm_vidc_domain_type { MSM_VIDC_ENCODER = BIT(0), diff --git a/driver/vidc/src/msm_vidc_buffer.c b/driver/vidc/src/msm_vidc_buffer.c index 4087bcd5dc..a279f0cf5b 100644 --- a/driver/vidc/src/msm_vidc_buffer.c +++ b/driver/vidc/src/msm_vidc_buffer.c @@ -369,30 +369,7 @@ static inline u32 ROI_METADATA_SIZE( u32 msm_vidc_encoder_input_meta_size(struct msm_vidc_inst *inst) { - u32 size = 0; - u32 lcu_size = 0; - struct v4l2_format *f; - - if (!inst || !inst->capabilities) { - d_vpr_e("%s: invalid params\n", __func__); - return 0; - } - - size = MSM_VIDC_METADATA_SIZE; - - if (inst->capabilities->cap[META_ROI_INFO].value) { - lcu_size = 16; - - f = &inst->fmts[OUTPUT_PORT]; - if (f->fmt.pix_mp.pixelformat == V4L2_PIX_FMT_HEVC) - lcu_size = 32; - - f = &inst->fmts[INPUT_PORT]; - size += ROI_METADATA_SIZE(f->fmt.pix_mp.width, - f->fmt.pix_mp.height, lcu_size); - size = ALIGN(size, SZ_4K); - } - return size; + return ENCODE_INPUT_METADATA_SIZE; } u32 msm_vidc_encoder_output_meta_size(struct msm_vidc_inst *inst) diff --git a/include/uapi/vidc/media/v4l2_vidc_extensions.h b/include/uapi/vidc/media/v4l2_vidc_extensions.h index 41d2507a4c..5428b537f1 100644 --- a/include/uapi/vidc/media/v4l2_vidc_extensions.h +++ b/include/uapi/vidc/media/v4l2_vidc_extensions.h @@ -430,4 +430,9 @@ struct v4l2_event_vidc_metadata { }; /* vendor events end */ +/* Default metadata size (align to 4KB) */ +#define MSM_VIDC_METADATA_SIZE (4 * 4096) /* 16 KB */ +#define ENCODE_INPUT_METADATA_SIZE (512 * 4096) /* 2 MB */ +#define DECODE_INPUT_METADATA_SIZE MSM_VIDC_METADATA_SIZE + #endif From a079cc43f3df00089da3d9aa0141624b50f79038 Mon Sep 17 00:00:00 2001 From: Mahesh Kumar Sharma Date: Mon, 25 Apr 2022 11:31:28 -0700 Subject: [PATCH 0611/1061] video: driver: preprocessing pass required additional cycles and bw Encoder preprocessing feature requires additional cycles and bw to support this feature if it is enabled. Change-Id: I46de42dd0cb0d5a7cd9fdf00beeaefd50e40798e Signed-off-by: Mahesh Kumar Sharma --- .../variant/iris3/src/msm_vidc_power_iris3.c | 19 +++++++++++++++++-- driver/vidc/inc/msm_vidc_internal.h | 1 + driver/vidc/src/msm_vidc_power.c | 2 ++ 3 files changed, 20 insertions(+), 2 deletions(-) diff --git a/driver/variant/iris3/src/msm_vidc_power_iris3.c b/driver/variant/iris3/src/msm_vidc_power_iris3.c index 7939cf0bce..85b2eeca8a 100644 --- a/driver/variant/iris3/src/msm_vidc_power_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_power_iris3.c @@ -79,6 +79,10 @@ u64 msm_vidc_calc_freq_iris3(struct msm_vidc_inst *inst, u32 data_size) if (fps == 960) vpp_cycles += div_u64(vpp_cycles * 5, 100); + /* increase vpp_cycles by 50% for preprocessing */ + if (inst->capabilities->cap[REQUEST_PREPROCESS].value) + vpp_cycles = vpp_cycles + vpp_cycles / 2; + /* VSP */ /* bitrate is based on fps, scale it using operating rate */ operating_rate = inst->capabilities->cap[OPERATING_RATE].value >> 16; @@ -115,7 +119,7 @@ u64 msm_vidc_calc_freq_iris3(struct msm_vidc_inst *inst, u32 data_size) inst->capabilities->cap[PIPE].value; /* 21 / 20 is minimum overhead factor */ vpp_cycles += max(vpp_cycles / 20, fw_vpp_cycles); - /* 1.059 is multi-pipe overhead + /* 1.059 is multi-pipe overhead * 1.410 AV1 RECOMMENDED TILE 1080P_V2XH1, UHD_V2X2, 8KUHD_V8X2 * av1d_commer_tile_enable=0 */ @@ -453,7 +457,8 @@ static u64 __calculate_encoder(struct vidc_bus_vote_data *d) b_frames_enabled = false, llc_ref_chroma_cache_enabled = false, llc_top_line_buf_enabled = false, - llc_vpss_rot_line_buf_enabled = false; + llc_vpss_rot_line_buf_enabled = false, + vpss_preprocessing_enabled = false; unsigned int bins_to_bit_factor; fp_t dpb_compression_factor, @@ -532,6 +537,7 @@ static u64 __calculate_encoder(struct vidc_bus_vote_data *d) work_mode_1 = d->work_mode == MSM_VIDC_STAGE_1; low_power = d->power_mode == VIDC_POWER_LOW; bins_to_bit_factor = 4; + vpss_preprocessing_enabled = d->vpss_preprocessing_enabled; if (d->use_sys_cache) { llc_ref_chroma_cache_enabled = true; @@ -605,6 +611,10 @@ static u64 __calculate_encoder(struct vidc_bus_vote_data *d) ddr.ref_write = fp_mult(ddr.ref_write, recon_write_bw_factor); } + /* double ref_write */ + if (vpss_preprocessing_enabled) + ddr.ref_write = ddr.ref_write * 2; + ddr.orig_read = dpb_bpp == 8 ? y_bw_no_ubwc_8bpp : (original_compression_enabled ? y_bw_no_ubwc_10bpp : y_bw_10bpp_p010); @@ -613,6 +623,10 @@ static u64 __calculate_encoder(struct vidc_bus_vote_data *d) if (rotation == 90 || rotation == 270) ddr.orig_read *= lcu_size == 32 ? (dpb_bpp == 8 ? 1 : 3) : 2; + /* double orig_read */ + if (vpss_preprocessing_enabled) + ddr.orig_read = ddr.orig_read * 2; + ddr.line_buffer_read = fp_div(FP_INT(tnbr_per_lcu * lcu_per_frame * fps), FP_INT(bps(1))); @@ -648,6 +662,7 @@ static u64 __calculate_encoder(struct vidc_bus_vote_data *d) {"work Mode", "%d", work_mode_1}, {"B frame enabled", "%d", b_frames_enabled}, {"original frame format", "%#x", original_color_format}, + {"VPSS preprocessing", "%d", vpss_preprocessing_enabled}, {"original compression enabled", "%d", original_compression_enabled}, {"dpb compression factor", DUMP_FP_FMT, diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 1f6cd571a8..a45c17ce5c 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -802,6 +802,7 @@ struct vidc_bus_vote_data { u64 calc_bw_ddr; u64 calc_bw_llcc; u32 num_vpp_pipes; + bool vpss_preprocessing_enabled; }; struct msm_vidc_power { diff --git a/driver/vidc/src/msm_vidc_power.c b/driver/vidc/src/msm_vidc_power.c index aa05b54110..27596ac916 100644 --- a/driver/vidc/src/msm_vidc_power.c +++ b/driver/vidc/src/msm_vidc_power.c @@ -249,6 +249,8 @@ int msm_vidc_scale_buses(struct msm_vidc_inst *inst) vote_data->num_formats = 1; vote_data->color_formats[0] = v4l2_colorformat_to_driver( inst->fmts[INPUT_PORT].fmt.pix_mp.pixelformat, __func__); + vote_data->vpss_preprocessing_enabled = + inst->capabilities->cap[REQUEST_PREPROCESS].value; } else if (inst->domain == MSM_VIDC_DECODER) { u32 color_format; From 308499361db39079867d0bedc1f8b2b49ca9fccd Mon Sep 17 00:00:00 2001 From: Chandrakant I Viraktamath Date: Tue, 17 Aug 2021 11:38:28 +0530 Subject: [PATCH 0612/1061] video: driver: Add support for slice encode delivery Add support to enable slice encode delivery for HEVC and AVC codec. Basically in this mode, each encoded slice is given as a separate FBD to the client. Change-Id: Ia30fde9abaf2b38fb486113807fbb7f19110225c Signed-off-by: Chandrakant I Viraktamath --- driver/platform/kalama/src/msm_vidc_kalama.c | 33 ++++++- driver/variant/iris3/inc/hfi_buffer_iris3.h | 58 ++++++++++++ .../variant/iris3/src/msm_vidc_buffer_iris3.c | 43 +++++++++ driver/vidc/inc/hfi_property.h | 2 + driver/vidc/inc/msm_vidc_control.h | 1 + driver/vidc/inc/msm_vidc_driver.h | 15 ++++ driver/vidc/inc/msm_vidc_internal.h | 1 + driver/vidc/src/msm_vidc_buffer.c | 45 +++++++++- driver/vidc/src/msm_vidc_control.c | 89 ++++++++++++++++++- driver/vidc/src/msm_vidc_driver.c | 1 + .../uapi/vidc/media/v4l2_vidc_extensions.h | 18 ++++ 11 files changed, 299 insertions(+), 7 deletions(-) diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index a12290dffd..c7c41c5e58 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -1617,7 +1617,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { HFI_PROP_DPB_TAG_LIST, CAP_FLAG_BITMASK}, - {META_SUBFRAME_OUTPUT, ENC, HEIC, + {META_SUBFRAME_OUTPUT, ENC, HEIC | H264 | HEVC, V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, 0, V4L2_MPEG_VIDC_META_DISABLE, @@ -1684,6 +1684,26 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { V4L2_CID_MPEG_VIDC_METADATA_MAX_NUM_REORDER_FRAMES, HFI_PROP_MAX_NUM_REORDER_FRAMES, CAP_FLAG_BITMASK}, + + {DELIVERY_MODE, ENC, HEVC, + V4L2_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE_FRAME_BASED, + V4L2_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE_SLICE_BASED, + BIT(V4L2_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE_FRAME_BASED) | + BIT(V4L2_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE_SLICE_BASED), + V4L2_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE_FRAME_BASED, + V4L2_CID_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE, + HFI_PROP_ENABLE_SLICE_DELIVERY, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {DELIVERY_MODE, ENC, H264, + V4L2_MPEG_VIDC_H264_ENCODE_DELIVERY_MODE_FRAME_BASED, + V4L2_MPEG_VIDC_H264_ENCODE_DELIVERY_MODE_SLICE_BASED, + BIT(V4L2_MPEG_VIDC_H264_ENCODE_DELIVERY_MODE_FRAME_BASED) | + BIT(V4L2_MPEG_VIDC_H264_ENCODE_DELIVERY_MODE_SLICE_BASED), + V4L2_MPEG_VIDC_H264_ENCODE_DELIVERY_MODE_FRAME_BASED, + V4L2_CID_MPEG_VIDC_H264_ENCODE_DELIVERY_MODE, + HFI_PROP_ENABLE_SLICE_DELIVERY, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, }; static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kalama[] = { @@ -1867,7 +1887,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kala msm_vidc_set_csc_custom_matrix}, {LOWLATENCY_MODE, ENC, H264 | HEVC, - {BITRATE_MODE}, + {BITRATE_MODE, DELIVERY_MODE}, {STAGE}, msm_vidc_adjust_enc_lowlatency_mode, NULL}, @@ -2135,7 +2155,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kala {SLICE_MODE, ENC, H264|HEVC, {BITRATE_MODE, ALL_INTRA}, - {STAGE}, + {STAGE, DELIVERY_MODE}, msm_vidc_adjust_slice_count, msm_vidc_set_slice_count}, @@ -2188,7 +2208,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kala msm_vidc_set_u32}, {OUTPUT_BUF_HOST_MAX_COUNT, ENC, H264|HEVC, - {SUPER_FRAME}, + {SUPER_FRAME, DELIVERY_MODE}, {0}, msm_vidc_adjust_output_buf_host_max_count, msm_vidc_set_u32}, @@ -2292,6 +2312,11 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kala {0}, NULL, msm_vidc_set_u32}, + + {DELIVERY_MODE, ENC, H264|HEVC, + {SLICE_MODE}, {LOWLATENCY_MODE, OUTPUT_BUF_HOST_MAX_COUNT}, + msm_vidc_adjust_delivery_mode, + msm_vidc_set_u32}, }; /* Default UBWC config for LPDDR5 */ diff --git a/driver/variant/iris3/inc/hfi_buffer_iris3.h b/driver/variant/iris3/inc/hfi_buffer_iris3.h index a6643ec37c..80bab297c5 100644 --- a/driver/variant/iris3/inc/hfi_buffer_iris3.h +++ b/driver/variant/iris3/inc/hfi_buffer_iris3.h @@ -1201,6 +1201,64 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ size = HFI_ALIGN(bitstream_size, HFI_ALIGNMENT_4096); \ } while (0) +#define HFI_IRIS3_ENC_TILE_SIZE_INFO(tile_size, tile_count, last_tile_size, \ + frame_width_coded, codec_standard) \ + do \ + { \ + HFI_U32 without_tile_enc_width; \ + HFI_U32 min_tile_size = 352, fixed_tile_width = 960; \ + without_tile_enc_width = min_tile_size + fixed_tile_width; \ + if ((codec_standard == HFI_CODEC_ENCODE_HEVC) && \ + (frame_width_coded > without_tile_enc_width)) \ + { \ + tile_size = fixed_tile_width; \ + tile_count = (frame_width_coded + tile_size - 1) / tile_size; \ + last_tile_size = (frame_width_coded - (tile_size * (tile_count - 1))); \ + if (last_tile_size < min_tile_size) \ + { \ + tile_count -= 1; \ + last_tile_size = (tile_size + min_tile_size); \ + } \ + } \ + else \ + { \ + tile_size = frame_width_coded; \ + tile_count = 1; \ + last_tile_size = 0; \ + } \ + } while (0) + +#define HFI_IRIS3_ENC_MB_BASED_MULTI_SLICE_COUNT(total_slice_count, frame_width, frame_height, \ + codec_standard, multi_slice_max_mb_count) \ + do \ + { \ + HFI_U32 tile_size, tile_count, last_tile_size, \ + slice_count_per_tile, slice_count_in_last_tile; \ + HFI_U32 mbs_in_one_tile, mbs_in_last_tile; \ + HFI_U32 frame_width_coded, frame_height_coded, lcu_size; \ + lcu_size = (codec_standard == HFI_CODEC_ENCODE_HEVC) ? 32 : 16; \ + frame_width_coded = HFI_ALIGN(frame_width, lcu_size); \ + frame_height_coded = HFI_ALIGN(frame_height, lcu_size); \ + HFI_IRIS3_ENC_TILE_SIZE_INFO(tile_size, tile_count, last_tile_size, \ + frame_width_coded, codec_standard); \ + mbs_in_one_tile = (tile_size * frame_height_coded) / (lcu_size * lcu_size); \ + slice_count_per_tile = \ + (mbs_in_one_tile + multi_slice_max_mb_count - 1) / (multi_slice_max_mb_count); \ + if (last_tile_size) \ + { \ + mbs_in_last_tile = \ + (last_tile_size * frame_height_coded) / (lcu_size * lcu_size); \ + slice_count_in_last_tile = \ + (mbs_in_last_tile + multi_slice_max_mb_count - 1) / (multi_slice_max_mb_count); \ + total_slice_count = \ + (slice_count_per_tile * (tile_count - 1)) + slice_count_in_last_tile; \ + } \ + else \ + { \ + total_slice_count = (slice_count_per_tile * tile_count); \ + } \ + } while (0) + #define SIZE_ROI_METADATA_ENC(size_roi, frame_width, frame_height, lcu_size)\ do \ { \ diff --git a/driver/variant/iris3/src/msm_vidc_buffer_iris3.c b/driver/variant/iris3/src/msm_vidc_buffer_iris3.c index 2ceb29e19e..d5c3c41af5 100644 --- a/driver/variant/iris3/src/msm_vidc_buffer_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_buffer_iris3.c @@ -670,6 +670,48 @@ static int msm_buffer_dpb_count(struct msm_vidc_inst *inst) return msm_vidc_get_recon_buf_count(inst); } +static int msm_buffer_delivery_mode_based_min_count_iris3(struct msm_vidc_inst *inst, + uint32_t count) +{ + struct v4l2_format *f; + u32 width, height, total_num_slices = 1; + u32 hfi_codec = 0; + u32 max_mbs_per_slice = 0; + u32 slice_mode = 0; + u32 delivery_mode = 0; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return count; + } + + slice_mode = inst->capabilities->cap[SLICE_MODE].value; + delivery_mode = inst->capabilities->cap[DELIVERY_MODE].value; + + if (slice_mode != V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_MB || + (inst->codec == MSM_VIDC_H264 && + delivery_mode != V4L2_MPEG_VIDC_H264_ENCODE_DELIVERY_MODE_SLICE_BASED) || + (inst->codec == MSM_VIDC_HEVC && + delivery_mode != V4L2_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE_SLICE_BASED)) + return count; + + f = &inst->fmts[OUTPUT_PORT]; + width = f->fmt.pix_mp.width; + height = f->fmt.pix_mp.height; + + max_mbs_per_slice = inst->capabilities->cap[SLICE_MAX_MB].value; + + if (inst->codec == MSM_VIDC_H264) + hfi_codec = HFI_CODEC_ENCODE_AVC; + else if (inst->codec == MSM_VIDC_HEVC) + hfi_codec = HFI_CODEC_ENCODE_HEVC; + + HFI_IRIS3_ENC_MB_BASED_MULTI_SLICE_COUNT(total_num_slices, width, height, + hfi_codec, max_mbs_per_slice); + + return (total_num_slices * count); +} + int msm_buffer_min_count_iris3(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type buffer_type) { @@ -688,6 +730,7 @@ int msm_buffer_min_count_iris3(struct msm_vidc_inst *inst, case MSM_VIDC_BUF_OUTPUT: case MSM_VIDC_BUF_OUTPUT_META: count = msm_vidc_output_min_count(inst); + count = msm_buffer_delivery_mode_based_min_count_iris3(inst, count); break; case MSM_VIDC_BUF_BIN: case MSM_VIDC_BUF_COMV: diff --git a/driver/vidc/inc/hfi_property.h b/driver/vidc/inc/hfi_property.h index 49fd1f2225..76abb637f0 100644 --- a/driver/vidc/inc/hfi_property.h +++ b/driver/vidc/inc/hfi_property.h @@ -535,6 +535,8 @@ enum hfi_nal_length_field_type { #define HFI_PROP_IR_CYCLIC_PERIOD 0x0300017E +#define HFI_PROP_ENABLE_SLICE_DELIVERY 0x0300017F + #define HFI_PROP_AV1_FILM_GRAIN_PRESENT 0x03000180 #define HFI_PROP_AV1_SUPER_BLOCK_ENABLED 0x03000181 diff --git a/driver/vidc/inc/msm_vidc_control.h b/driver/vidc/inc/msm_vidc_control.h index 99342c2912..a61762fb15 100644 --- a/driver/vidc/inc/msm_vidc_control.h +++ b/driver/vidc/inc/msm_vidc_control.h @@ -57,6 +57,7 @@ int msm_vidc_adjust_dec_frame_rate(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_dec_operating_rate(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_dec_outbuf_fence(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_preprocess(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_delivery_mode(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_set_header_mode(void *instance, enum msm_vidc_inst_capability_type cap_id); diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 22a19c33ed..76a31031d5 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -302,6 +302,21 @@ static inline bool is_secure_region(enum msm_vidc_buffer_region region) region == MSM_VIDC_NON_SECURE_PIXEL); } +static inline bool is_enc_slice_delivery_mode(struct msm_vidc_inst *inst) +{ + if (is_decode_session(inst)) + return false; + + return (inst->capabilities->cap[SLICE_MODE].value == + V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_MB && + ((inst->codec == MSM_VIDC_H264 && + inst->capabilities->cap[DELIVERY_MODE].value == + V4L2_MPEG_VIDC_H264_ENCODE_DELIVERY_MODE_SLICE_BASED) || + (inst->codec == MSM_VIDC_HEVC && + inst->capabilities->cap[DELIVERY_MODE].value == + V4L2_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE_SLICE_BASED))); +} + const char *cap_name(enum msm_vidc_inst_capability_type cap_id); const char *v4l2_pixelfmt_name(u32 pixelfmt); const char *v4l2_type_name(u32 port); diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index a45c17ce5c..cd4f443193 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -522,6 +522,7 @@ enum msm_vidc_inst_capability_type { OUTPUT_ORDER, INPUT_BUF_HOST_MAX_COUNT, OUTPUT_BUF_HOST_MAX_COUNT, + DELIVERY_MODE, /* place all leaf(no child) enums before this line */ INST_CAP_MAX, }; diff --git a/driver/vidc/src/msm_vidc_buffer.c b/driver/vidc/src/msm_vidc_buffer.c index 4087bcd5dc..13c35f69b9 100644 --- a/driver/vidc/src/msm_vidc_buffer.c +++ b/driver/vidc/src/msm_vidc_buffer.c @@ -302,6 +302,46 @@ u32 msm_vidc_encoder_input_size(struct msm_vidc_inst *inst) return size; } +static u32 msm_vidc_enc_delivery_mode_based_output_buf_size(struct msm_vidc_inst *inst, + u32 frame_size) +{ + u32 slice_size; + u32 width, height; + u32 width_in_lcus, height_in_lcus, lcu_size; + u32 total_mb_count; + struct v4l2_format *f; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return frame_size; + } + + f = &inst->fmts[OUTPUT_PORT]; + + if (f->fmt.pix_mp.pixelformat != V4L2_PIX_FMT_HEVC && + f->fmt.pix_mp.pixelformat != V4L2_PIX_FMT_H264) + return frame_size; + + if (inst->capabilities->cap[SLICE_MODE].value != V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_MB) + return frame_size; + + if (!is_enc_slice_delivery_mode(inst)) + return frame_size; + + lcu_size = (f->fmt.pix_mp.pixelformat == V4L2_PIX_FMT_HEVC) ? 32 : 16; + width = f->fmt.pix_mp.width; + height = f->fmt.pix_mp.height; + width_in_lcus = (width + lcu_size - 1) / lcu_size; + height_in_lcus = (height + lcu_size - 1) / lcu_size; + total_mb_count = width_in_lcus * height_in_lcus; + + slice_size = ((frame_size * inst->capabilities->cap[SLICE_MAX_MB].value) \ + + total_mb_count - 1) / total_mb_count; + + slice_size = ALIGN(slice_size, SZ_4K); + return slice_size; +} + u32 msm_vidc_encoder_output_size(struct msm_vidc_inst *inst) { u32 frame_size; @@ -348,7 +388,10 @@ skip_calc: f->fmt.pix_mp.pixelformat == V4L2_PIX_FMT_HEIC) frame_size = frame_size + (frame_size >> 2); - return ALIGN(frame_size, SZ_4K); + frame_size = ALIGN(frame_size, SZ_4K); + frame_size = msm_vidc_enc_delivery_mode_based_output_buf_size(inst, frame_size); + + return frame_size; } static inline u32 ROI_METADATA_SIZE( diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 0c41dc141c..227e535692 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -150,6 +150,12 @@ static const char *const mpeg_video_vidc_ir_type[] = { NULL, }; +static const char *const mpeg_vidc_delivery_modes[] = { + "Frame Based Delivery Mode", + "Slice Based Delivery Mode", + NULL, +}; + u32 msm_vidc_get_port_info(struct msm_vidc_inst *inst, enum msm_vidc_inst_capability_type cap_id) { @@ -193,6 +199,10 @@ static const char * const * msm_vidc_get_qmenu_type( return av1_tier; case V4L2_CID_MPEG_VIDEO_VIDC_INTRA_REFRESH_TYPE: return mpeg_video_vidc_ir_type; + case V4L2_CID_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE: + return mpeg_vidc_delivery_modes; + case V4L2_CID_MPEG_VIDC_H264_ENCODE_DELIVERY_MODE: + return mpeg_vidc_delivery_modes; default: i_vpr_e(inst, "%s: No available qmenu for ctrl %#x\n", __func__, control_id); @@ -1074,6 +1084,16 @@ static int msm_vidc_update_static_property(struct msm_vidc_inst *inst, return rc; } + if (ctrl->id == V4L2_CID_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE || + ctrl->id == V4L2_CID_MPEG_VIDC_H264_ENCODE_DELIVERY_MODE) { + struct v4l2_format *output_fmt; + + output_fmt = &inst->fmts[OUTPUT_PORT]; + rc = msm_venc_s_fmt_output(inst, output_fmt); + if (rc) + return rc; + } + if (ctrl->id == V4L2_CID_MPEG_VIDC_MIN_BITSTREAM_SIZE_OVERWRITE) { rc = msm_vidc_update_bitstream_buffer_size(inst); if (rc) @@ -1600,7 +1620,8 @@ int msm_vidc_adjust_output_buf_host_max_count(void *instance, struct v4l2_ctrl * adjusted_value = ctrl ? ctrl->val : capability->cap[OUTPUT_BUF_HOST_MAX_COUNT].value; - if (msm_vidc_is_super_buffer(inst) || is_image_session(inst)) + if (msm_vidc_is_super_buffer(inst) || is_image_session(inst) || + is_enc_slice_delivery_mode(inst)) adjusted_value = DEFAULT_MAX_HOST_BURST_BUF_COUNT; msm_vidc_update_cap_value(inst, OUTPUT_BUF_HOST_MAX_COUNT, @@ -2759,7 +2780,8 @@ int msm_vidc_adjust_enc_lowlatency_mode(void *instance, struct v4l2_ctrl *ctrl) return -EINVAL; if (rc_type == HFI_RC_CBR_CFR || - rc_type == HFI_RC_CBR_VFR) + rc_type == HFI_RC_CBR_VFR || + is_enc_slice_delivery_mode(inst)) adjusted_value = 1; msm_vidc_update_cap_value(inst, LOWLATENCY_MODE, @@ -2949,6 +2971,43 @@ int msm_vidc_adjust_dec_outbuf_fence(void *instance, struct v4l2_ctrl *ctrl) return 0; } +int msm_vidc_adjust_delivery_mode(void *instance, struct v4l2_ctrl *ctrl) +{ + struct msm_vidc_inst_capability *capability; + s32 adjusted_value; + s32 slice_mode = -1; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (is_decode_session(inst)) + return 0; + + capability = inst->capabilities; + + adjusted_value = ctrl ? ctrl->val : capability->cap[DELIVERY_MODE].value; + + if (msm_vidc_get_parent_value(inst, DELIVERY_MODE, SLICE_MODE, + &slice_mode, __func__)) + return -EINVAL; + + /* Slice encode delivery mode is only supported for Max MB slice mode */ + if (slice_mode != V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_MB) { + if (inst->codec == MSM_VIDC_HEVC) + adjusted_value = V4L2_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE_FRAME_BASED; + else if (inst->codec == MSM_VIDC_H264) + adjusted_value = V4L2_MPEG_VIDC_H264_ENCODE_DELIVERY_MODE_FRAME_BASED; + } + + msm_vidc_update_cap_value(inst, DELIVERY_MODE, + adjusted_value, __func__); + + return 0; +} + int msm_vidc_prepare_dependency_list(struct msm_vidc_inst *inst) { struct list_head root_list, opt_list; @@ -4350,6 +4409,32 @@ int msm_vidc_v4l2_menu_to_hfi(struct msm_vidc_inst *inst, goto set_default; } return 0; + case V4L2_CID_MPEG_VIDC_H264_ENCODE_DELIVERY_MODE: + switch (capability->cap[cap_id].value) { + case V4L2_MPEG_VIDC_H264_ENCODE_DELIVERY_MODE_FRAME_BASED: + *value = 0; + break; + case V4L2_MPEG_VIDC_H264_ENCODE_DELIVERY_MODE_SLICE_BASED: + *value = 1; + break; + default: + *value = 0; + goto set_default; + } + return 0; + case V4L2_CID_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE: + switch (capability->cap[cap_id].value) { + case V4L2_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE_FRAME_BASED: + *value = 0; + break; + case V4L2_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE_SLICE_BASED: + *value = 1; + break; + default: + *value = 0; + goto set_default; + } + return 0; default: i_vpr_e(inst, "%s: mapping not specified for ctrl_id: %#x\n", diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 96b0cad991..ec496fecda 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -216,6 +216,7 @@ static const struct msm_vidc_cap_name cap_name_arr[] = { {OUTPUT_ORDER, "OUTPUT_ORDER" }, {INPUT_BUF_HOST_MAX_COUNT, "INPUT_BUF_HOST_MAX_COUNT" }, {OUTPUT_BUF_HOST_MAX_COUNT, "OUTPUT_BUF_HOST_MAX_COUNT" }, + {DELIVERY_MODE, "DELIVERY_MODE" }, {INST_CAP_MAX, "INST_CAP_MAX" }, }; diff --git a/include/uapi/vidc/media/v4l2_vidc_extensions.h b/include/uapi/vidc/media/v4l2_vidc_extensions.h index 41d2507a4c..c0e3189c11 100644 --- a/include/uapi/vidc/media/v4l2_vidc_extensions.h +++ b/include/uapi/vidc/media/v4l2_vidc_extensions.h @@ -237,6 +237,24 @@ enum v4l2_mpeg_video_av1_tier { #define V4L2_CID_MPEG_VIDC_METADATA_PICTURE_TYPE \ (V4L2_CID_MPEG_VIDC_BASE + 0x3B) +/* Encoder Slice Delivery Mode + * set format has a dependency on this control + * and gets invoked when this control is updated. + */ +#define V4L2_CID_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE \ + (V4L2_CID_MPEG_VIDC_BASE + 0x3C) +enum v4l2_hevc_encode_delivery_mode { + V4L2_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE_FRAME_BASED = 0, + V4L2_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE_SLICE_BASED = 1, +}; + +#define V4L2_CID_MPEG_VIDC_H264_ENCODE_DELIVERY_MODE \ + (V4L2_CID_MPEG_VIDC_BASE + 0x3D) +enum v4l2_h264_encode_delivery_mode { + V4L2_MPEG_VIDC_H264_ENCODE_DELIVERY_MODE_FRAME_BASED = 0, + V4L2_MPEG_VIDC_H264_ENCODE_DELIVERY_MODE_SLICE_BASED = 1, +}; + /* add new controls above this line */ /* Deprecate below controls once availble in gki and gsi bionic header */ #ifndef V4L2_CID_MPEG_VIDEO_BASELAYER_PRIORITY_ID From 91f3bc9ab7ffdcd35cc94d35742040a57f81f495 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Fri, 29 Apr 2022 14:39:43 -0700 Subject: [PATCH 0613/1061] video: driver: fix invalid output buffer tag receipt in fence usecase When fence is enabled, output buffer tag is sent to fw via output metadata buffer. Since fw relies on bytesused field of output metadata buffer to invalidate cache and perform read operation, output metadata buffer's filled length cannot be zero. Hence set valid size for bytesused field to fix this issue. Change-Id: I7bd87ec49508402d2d654095f06e75992771c39d Signed-off-by: Akshata Sahukar --- driver/platform/kalama/src/msm_vidc_kalama.c | 3 +- driver/vidc/inc/msm_vidc_driver.h | 30 ++++++++++++++++++++ driver/vidc/src/msm_vdec.c | 12 -------- driver/vidc/src/msm_vidc_control.c | 1 + driver/vidc/src/msm_vidc_driver.c | 3 +- driver/vidc/src/msm_vidc_vb2.c | 24 ++++++++++++---- 6 files changed, 51 insertions(+), 22 deletions(-) diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index c7c41c5e58..c377b56bf2 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -1327,8 +1327,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { 0, HFI_PROP_PIPE}, - {POC, DEC, H264, - 0, 18, 1, 1, + {POC, DEC, H264, 0, 2, 1, 1, 0, HFI_PROP_PIC_ORDER_CNT_TYPE}, diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 76a31031d5..fac616bc4c 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -153,6 +153,36 @@ static inline bool is_meta_tx_out_enabled(struct msm_vidc_inst *inst, u32 cap) return enabled; } +static inline bool is_any_meta_tx_out_enabled(struct msm_vidc_inst *inst) +{ + bool enabled = false; + u32 i; + + for (i = INST_CAP_NONE + 1; i < META_CAP_MAX; i++) { + if (is_meta_tx_out_enabled(inst, i)) { + enabled = true; + break; + } + } + + return enabled; +} + +static inline bool is_any_meta_tx_inp_enabled(struct msm_vidc_inst *inst) +{ + bool enabled = false; + u32 i; + + for (i = INST_CAP_NONE + 1; i < META_CAP_MAX; i++) { + if (is_meta_tx_inp_enabled(inst, i)) { + enabled = true; + break; + } + } + + return enabled; +} + static inline bool is_input_meta_enabled(struct msm_vidc_inst *inst) { bool enabled = false; diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 2c4da109e5..61e010b29c 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -2050,18 +2050,6 @@ int msm_vdec_qbuf(struct msm_vidc_inst *inst, struct vb2_buffer *vb2) } } - if (vb2->type == OUTPUT_META_PLANE) { - if (is_meta_rx_out_enabled(inst, META_DPB_TAG_LIST)) { - /* - * vb2 is not allowing client to pass data in output meta plane. - * adjust the bytesused as client will send buffer tag metadata - * in output meta plane if DPB_TAG_LIST metadata enabled. - */ - if (!vb2->planes[0].bytesused) - vb2->planes[0].bytesused = 1024; - } - } - if (inst->adjust_priority) { s32 priority = inst->capabilities->cap[PRIORITY].value; diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 227e535692..0d2169f2bb 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -2810,6 +2810,7 @@ int msm_vidc_adjust_dec_lowlatency_mode(void *instance, struct v4l2_ctrl *ctrl) &outbuf_fence, __func__)) return -EINVAL; + /* enable lowlatency if outbuf fence is enabled */ if (outbuf_fence & V4L2_MPEG_VIDC_META_ENABLE && outbuf_fence & V4L2_MPEG_VIDC_META_RX_INPUT) adjusted_value = 1; diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index ec496fecda..395dc4bab5 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -5568,8 +5568,7 @@ void msm_vidc_destroy_buffers(struct msm_vidc_inst *inst) } list_for_each_entry_safe(fence, dummy_fence, &inst->fence_list, list) { - i_vpr_e(inst, "%s: destroying fence id: %llu\n", - __func__, fence->dma_fence.seqno); + i_vpr_e(inst, "%s: destroying fence %s\n", __func__, fence->name); msm_vidc_fence_destroy(inst, (u32)fence->dma_fence.seqno); } diff --git a/driver/vidc/src/msm_vidc_vb2.c b/driver/vidc/src/msm_vidc_vb2.c index 52cbcab52f..e3d6ddb980 100644 --- a/driver/vidc/src/msm_vidc_vb2.c +++ b/driver/vidc/src/msm_vidc_vb2.c @@ -450,12 +450,24 @@ void msm_vidc_buf_queue(struct vb2_buffer *vb2) goto unlock; } - /* Expecting non-zero filledlen on INPUT port */ - if (vb2->type == INPUT_MPLANE && !vb2->planes[0].bytesused) { - i_vpr_e(inst, - "%s: zero bytesused input buffer not supported\n", __func__); - rc = -EINVAL; - goto unlock; + if (!vb2->planes[0].bytesused) { + if (vb2->type == INPUT_MPLANE) { + /* Expecting non-zero filledlen on INPUT port */ + i_vpr_e(inst, + "%s: zero bytesused input buffer not supported\n", __func__); + rc = -EINVAL; + goto unlock; + } + if ((vb2->type == OUTPUT_META_PLANE && is_any_meta_tx_out_enabled(inst)) || + (vb2->type == INPUT_META_PLANE && is_any_meta_tx_inp_enabled(inst))) { + /* + * vb2 is not allowing client to pass data in output meta plane. + * adjust the bytesused as client will send buffer tag metadata + * in output meta plane if DPB_TAG_LIST, or OUTBUF_FENCE metadata + * is enabled. + */ + vb2->planes[0].bytesused = vb2->planes[0].length; + } } if (is_encode_session(inst) && vb2->type == INPUT_MPLANE) { From e3da5c43e2948c721085f96c67c79e23838e7233 Mon Sep 17 00:00:00 2001 From: Vikash Garodia Date: Thu, 14 Apr 2022 18:39:35 +0530 Subject: [PATCH 0614/1061] driver: video: Add critical priority and reserve duration Critical priority - A video session which is prioritized above all concurrent sessions. Such sessions have low latencies and at the same time they cannot be rejected due to overload. Reserve duration - Duration by which a session reserves the video hardware for processing frames from that session. Both the above aspects are implemented with these changes. Change-Id: I58aef5f239e5ee106201d6819d2228784f0f0ad0 Signed-off-by: Vikash Garodia --- driver/platform/kalama/src/msm_vidc_kalama.c | 32 +++++++++++++ driver/platform/waipio/src/msm_vidc_waipio.c | 31 ++++++++++++ driver/vidc/inc/hfi_command.h | 6 +++ driver/vidc/inc/msm_vidc_control.h | 2 + driver/vidc/inc/msm_vidc_driver.h | 5 ++ driver/vidc/inc/msm_vidc_internal.h | 3 ++ driver/vidc/inc/venus_hfi.h | 1 + driver/vidc/src/msm_vidc_control.c | 45 ++++++++++++++++++ driver/vidc/src/msm_vidc_driver.c | 39 +++++++++++++++ driver/vidc/src/venus_hfi.c | 47 +++++++++++++++++++ .../uapi/vidc/media/v4l2_vidc_extensions.h | 5 ++ 11 files changed, 216 insertions(+) diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index c377b56bf2..c780926b85 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -13,6 +13,7 @@ #include "msm_vidc_control.h" #include "hfi_property.h" #include "msm_vidc_iris3.h" +#include "hfi_command.h" #define DEFAULT_VIDEO_CONCEAL_COLOR_BLACK 0x8020010 #define MAX_LTR_FRAME_COUNT 2 @@ -1386,6 +1387,19 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { HFI_PROP_SESSION_PRIORITY, CAP_FLAG_DYNAMIC_ALLOWED}, + {FIRMWARE_PRIORITY_OFFSET, DEC | ENC, CODECS_ALL, + 1, 1, 1, 1}, + + {CRITICAL_PRIORITY, ENC, CODECS_ALL, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_CRITICAL_PRIORITY}, + + {RESERVE_DURATION, ENC, CODECS_ALL, + 0, INT_MAX, 1, 0, + V4L2_CID_MPEG_VIDC_RESERVE_DURATION, + HFI_CMD_RESERVE, + CAP_FLAG_DYNAMIC_ALLOWED}, + {ENC_IP_CR, ENC, CODECS_ALL, 0, S32_MAX, 1, 0, V4L2_CID_MPEG_VIDC_ENC_INPUT_COMPRESSION_RATIO, @@ -2266,6 +2280,24 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kala msm_vidc_adjust_session_priority, msm_vidc_set_session_priority}, + {FIRMWARE_PRIORITY_OFFSET, DEC | ENC, CODECS_ALL, + {0}, + {0}, + NULL, + NULL}, + + {CRITICAL_PRIORITY, ENC, CODECS_ALL, + {0}, + {0}, + NULL, + NULL}, + + {RESERVE_DURATION, ENC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_reserve_duration}, + {DPB_LIST, DEC, CODECS_ALL, {0}, {0}, diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index b51e12c1b0..5691b68c80 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -1292,6 +1292,19 @@ static struct msm_platform_inst_capability instance_cap_data_waipio[] = { HFI_PROP_SESSION_PRIORITY, CAP_FLAG_DYNAMIC_ALLOWED}, + {FIRMWARE_PRIORITY_OFFSET, DEC | ENC, CODECS_ALL, + 1, 1, 1, 1}, + + {CRITICAL_PRIORITY, ENC, CODECS_ALL, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_CRITICAL_PRIORITY}, + + {RESERVE_DURATION, ENC, CODECS_ALL, + 0, INT_MAX, 1, 0, + V4L2_CID_MPEG_VIDC_RESERVE_DURATION, + HFI_CMD_RESERVE, + CAP_FLAG_DYNAMIC_ALLOWED}, + {ENC_IP_CR, ENC, CODECS_ALL, 0, S32_MAX, 1, 0, V4L2_CID_MPEG_VIDC_ENC_INPUT_COMPRESSION_RATIO, @@ -2058,6 +2071,24 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_waip msm_vidc_adjust_session_priority, msm_vidc_set_session_priority}, + {FIRMWARE_PRIORITY_OFFSET, DEC | ENC, CODECS_ALL, + {0}, + {0}, + NULL, + NULL}, + + {CRITICAL_PRIORITY, ENC, CODECS_ALL, + {0}, + {0}, + NULL, + NULL}, + + {RESERVE_DURATION, ENC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_reserve_duration}, + {DPB_LIST, DEC, CODECS_ALL, {0}, {0}, diff --git a/driver/vidc/inc/hfi_command.h b/driver/vidc/inc/hfi_command.h index b88f6571ae..c037e34595 100644 --- a/driver/vidc/inc/hfi_command.h +++ b/driver/vidc/inc/hfi_command.h @@ -147,6 +147,11 @@ enum hfi_property_mode_type { HFI_MODE_METADATA = 0x00000004, }; +enum hfi_reserve_type { + HFI_RESERVE_START = 0x1, + HFI_RESERVE_STOP = 0x2, +}; + #define HFI_CMD_BEGIN 0x01000000 #define HFI_CMD_INIT 0x01000001 #define HFI_CMD_POWER_COLLAPSE 0x01000002 @@ -160,6 +165,7 @@ enum hfi_property_mode_type { #define HFI_CMD_DELIVERY_MODE 0x0100000A #define HFI_CMD_SUBSCRIBE_MODE 0x0100000B #define HFI_CMD_SETTINGS_CHANGE 0x0100000C +#define HFI_CMD_RESERVE 0x0100000F #define HFI_SSR_TYPE_SW_ERR_FATAL 0x1 #define HFI_SSR_TYPE_SW_DIV_BY_ZERO 0x2 diff --git a/driver/vidc/inc/msm_vidc_control.h b/driver/vidc/inc/msm_vidc_control.h index a61762fb15..92d14e7c8b 100644 --- a/driver/vidc/inc/msm_vidc_control.h +++ b/driver/vidc/inc/msm_vidc_control.h @@ -119,6 +119,8 @@ int msm_vidc_set_level(void *instance, enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_preprocess(void *instance, enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_reserve_duration(void *instance, + enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_u32_enum(void *instance, enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_q16(void *instance, diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index fac616bc4c..0523a6302f 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -293,6 +293,11 @@ static inline bool is_realtime_session(struct msm_vidc_inst *inst) return inst->capabilities->cap[PRIORITY].value == 0 ? true : false; } +static inline bool is_critical_priority_session(struct msm_vidc_inst *inst) +{ + return !!(inst->capabilities->cap[CRITICAL_PRIORITY].value); +} + static inline bool is_lowlatency_session(struct msm_vidc_inst *inst) { return !!(inst->capabilities->cap[LOWLATENCY_MODE].value); diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 77f2cbccfd..cc04ae259f 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -477,6 +477,9 @@ enum msm_vidc_inst_capability_type { SEQ_CHANGE_AT_SYNC_FRAME, QUALITY_MODE, PRIORITY, + FIRMWARE_PRIORITY_OFFSET, + CRITICAL_PRIORITY, + RESERVE_DURATION, DPB_LIST, FILM_GRAIN, SUPER_BLOCK, diff --git a/driver/vidc/inc/venus_hfi.h b/driver/vidc/inc/venus_hfi.h index cbbd4ec571..ba41ad24dc 100644 --- a/driver/vidc/inc/venus_hfi.h +++ b/driver/vidc/inc/venus_hfi.h @@ -59,6 +59,7 @@ int venus_hfi_trigger_ssr(struct msm_vidc_core *core, u32 type, u32 client_id, u32 addr); int venus_hfi_trigger_stability(struct msm_vidc_inst *inst, u32 type, u32 client_id, u32 val); +int venus_hfi_reserve_hardware(struct msm_vidc_inst *inst, u32 duration); int venus_hfi_scale_clocks(struct msm_vidc_inst* inst, u64 freq); int venus_hfi_scale_buses(struct msm_vidc_inst* inst, u64 bw_ddr, u64 bw_llcc); int venus_hfi_set_ir_period(struct msm_vidc_inst *inst, u32 ir_type, diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 0d2169f2bb..8e5a75167a 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -1106,6 +1106,13 @@ static int msm_vidc_update_static_property(struct msm_vidc_inst *inst, if (rc) return rc; } + + if (ctrl->id == V4L2_CID_MPEG_VIDC_CRITICAL_PRIORITY) { + inst->decode_batch.enable = msm_vidc_allow_decode_batch(inst); + msm_vidc_allow_dcvs(inst); + msm_vidc_update_cap_value(inst, PRIORITY, 0, __func__); + } + if (ctrl->id == V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER) { u32 enable; @@ -3940,6 +3947,9 @@ int msm_vidc_set_session_priority(void *instance, } hfi_value = inst->capabilities->cap[cap_id].value; + if (!is_critical_priority_session(inst)) + hfi_value = inst->capabilities->cap[cap_id].value + + inst->capabilities->cap[FIRMWARE_PRIORITY_OFFSET].value; rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32, &hfi_value, sizeof(u32), __func__); @@ -4202,6 +4212,41 @@ int msm_vidc_set_csc_custom_matrix(void *instance, return rc; } +int msm_vidc_set_reserve_duration(void *instance, + enum msm_vidc_inst_capability_type cap_id) +{ + int rc = 0; + u32 hfi_value = 0; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + /* reserve hardware only when input port is streaming*/ + if (!inst->bufq[INPUT_PORT].vb2q->streaming) + return 0; + + if (!(inst->capabilities->cap[cap_id].flags & CAP_FLAG_CLIENT_SET)) + return 0; + + inst->capabilities->cap[cap_id].flags &= (~CAP_FLAG_CLIENT_SET); + + if (!is_critical_priority_session(inst)) { + i_vpr_h(inst, "%s: reserve duration allowed only for critical session\n", __func__); + return 0; + } + + hfi_value = inst->capabilities->cap[cap_id].value; + + rc = venus_hfi_reserve_hardware(inst, hfi_value); + if (rc) + return rc; + + return rc; +} + int msm_vidc_set_level(void *instance, enum msm_vidc_inst_capability_type cap_id) { diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 395dc4bab5..0514ea2010 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -177,6 +177,9 @@ static const struct msm_vidc_cap_name cap_name_arr[] = { {SEQ_CHANGE_AT_SYNC_FRAME, "SEQ_CHANGE_AT_SYNC_FRAME" }, {QUALITY_MODE, "QUALITY_MODE" }, {PRIORITY, "PRIORITY" }, + {FIRMWARE_PRIORITY_OFFSET, "FIRMWARE_PRIORITY_OFFSET" }, + {CRITICAL_PRIORITY, "CRITICAL_PRIORITY" }, + {RESERVE_DURATION, "RESERVE_DURATION" }, {DPB_LIST, "DPB_LIST" }, {FILM_GRAIN, "FILM_GRAIN" }, {SUPER_BLOCK, "SUPER_BLOCK" }, @@ -1376,6 +1379,7 @@ bool msm_vidc_allow_s_ctrl(struct msm_vidc_inst *inst, u32 id) case V4L2_CID_MPEG_VIDC_PRIORITY: case V4L2_CID_MPEG_VIDC_INPUT_METADATA_FD: case V4L2_CID_MPEG_VIDC_INTRA_REFRESH_PERIOD: + case V4L2_CID_MPEG_VIDC_RESERVE_DURATION: allow = true; break; default: @@ -3086,6 +3090,12 @@ void msm_vidc_allow_dcvs(struct msm_vidc_inst *inst) goto exit; } + allow = !is_critical_priority_session(inst); + if (!allow) { + i_vpr_h(inst, "%s: critical priority session\n", __func__); + goto exit; + } + allow = !is_image_session(inst); if (!allow) { i_vpr_h(inst, "%s: image session\n", __func__); @@ -5940,6 +5950,7 @@ bool msm_vidc_ignore_session_load(struct msm_vidc_inst *inst) { int msm_vidc_check_core_mbps(struct msm_vidc_inst *inst) { u32 mbps = 0, total_mbps = 0, enc_mbps = 0; + u32 critical_mbps = 0; struct msm_vidc_core *core; struct msm_vidc_inst *instance; @@ -5957,6 +5968,20 @@ int msm_vidc_check_core_mbps(struct msm_vidc_inst *inst) is_image_session(inst)); return 0; } + + core_lock(core, __func__); + list_for_each_entry(instance, &core->instances, list) { + if (is_critical_priority_session(instance)) + critical_mbps += msm_vidc_get_inst_load(instance); + } + core_unlock(core, __func__); + + if (critical_mbps > core->capabilities[MAX_MBPS].value) { + i_vpr_e(inst, "%s: Hardware overloaded with critical sessions. needed %u, max %u", + __func__, critical_mbps, core->capabilities[MAX_MBPS].value); + return -ENOMEM; + } + core_lock(core, __func__); list_for_each_entry(instance, &core->instances, list) { /* ignore invalid/error session */ @@ -6014,6 +6039,7 @@ int msm_vidc_check_core_mbps(struct msm_vidc_inst *inst) int msm_vidc_check_core_mbpf(struct msm_vidc_inst *inst) { u32 video_mbpf = 0, image_mbpf = 0, video_rt_mbpf = 0; + u32 critical_mbpf = 0; struct msm_vidc_core *core; struct msm_vidc_inst *instance; @@ -6023,6 +6049,19 @@ int msm_vidc_check_core_mbpf(struct msm_vidc_inst *inst) } core = inst->core; + core_lock(core, __func__); + list_for_each_entry(instance, &core->instances, list) { + if (is_critical_priority_session(instance)) + critical_mbpf += msm_vidc_get_mbs_per_frame(instance); + } + core_unlock(core, __func__); + + if (critical_mbpf > core->capabilities[MAX_MBPF].value) { + i_vpr_e(inst, "%s: Hardware overloaded with critical sessions. needed %u, max %u", + __func__, critical_mbpf, core->capabilities[MAX_MBPF].value); + return -ENOMEM; + } + core_lock(core, __func__); list_for_each_entry(instance, &core->instances, list) { /* ignore thumbnail session */ diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index 5f55c0d9ec..551afdb0bc 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -2922,6 +2922,53 @@ unlock: return rc; } +int venus_hfi_reserve_hardware(struct msm_vidc_inst *inst, u32 duration) +{ + struct msm_vidc_core *core; + enum hfi_reserve_type payload; + int rc = 0; + + if (!inst || !inst->core || !inst->packet) { + d_vpr_e("%s: Invalid params\n", __func__); + return -EINVAL; + } + core = inst->core; + core_lock(core, __func__); + + if (!__valdiate_session(core, inst, __func__)) { + rc = -EINVAL; + goto unlock; + } + + if (duration) + payload = HFI_RESERVE_START; + else + payload = HFI_RESERVE_STOP; + + rc = hfi_create_header(inst->packet, inst->packet_size, + inst->session_id, core->header_id++); + if (rc) + goto unlock; + + rc = hfi_create_packet(inst->packet, inst->packet_size, + HFI_CMD_RESERVE, + HFI_HOST_FLAGS_NONE, + HFI_PAYLOAD_U32_ENUM, + HFI_PORT_NONE, + core->packet_id++, + &payload, sizeof(u32)); + if (rc) + goto unlock; + + rc = __iface_cmdq_write(core, inst->packet); + if (rc) + goto unlock; + +unlock: + core_unlock(core, __func__); + return rc; +} + int venus_hfi_session_open(struct msm_vidc_inst *inst) { int rc = 0; diff --git a/include/uapi/vidc/media/v4l2_vidc_extensions.h b/include/uapi/vidc/media/v4l2_vidc_extensions.h index 407a450e72..afc041b34e 100644 --- a/include/uapi/vidc/media/v4l2_vidc_extensions.h +++ b/include/uapi/vidc/media/v4l2_vidc_extensions.h @@ -255,6 +255,11 @@ enum v4l2_h264_encode_delivery_mode { V4L2_MPEG_VIDC_H264_ENCODE_DELIVERY_MODE_SLICE_BASED = 1, }; +#define V4L2_CID_MPEG_VIDC_CRITICAL_PRIORITY \ + (V4L2_CID_MPEG_VIDC_BASE + 0x3E) +#define V4L2_CID_MPEG_VIDC_RESERVE_DURATION \ + (V4L2_CID_MPEG_VIDC_BASE + 0x3F) + /* add new controls above this line */ /* Deprecate below controls once availble in gki and gsi bionic header */ #ifndef V4L2_CID_MPEG_VIDEO_BASELAYER_PRIORITY_ID From 2de81c4c699fa4e5850a624114b4e365a3f2525f Mon Sep 17 00:00:00 2001 From: Mihir Ganu Date: Thu, 14 Apr 2022 13:37:27 -0700 Subject: [PATCH 0615/1061] video: driver: Configure UBWC stride/scanlines for AV1D Set stride/scanline (in bytes) for UBWC color formats. This is required to keep fixed stride/scanline during in-sequence frame resolution changes in AV1 bitstreams. Driver sets this property before resume/start. Change-Id: I40526793cee36ad110f40e6ce110cda8070864d7 Signed-off-by: Mihir Ganu --- driver/vidc/inc/hfi_property.h | 2 ++ driver/vidc/src/msm_vdec.c | 61 ++++++++++++++++++++++++++++++++++ 2 files changed, 63 insertions(+) diff --git a/driver/vidc/inc/hfi_property.h b/driver/vidc/inc/hfi_property.h index 76abb637f0..75ed35815d 100644 --- a/driver/vidc/inc/hfi_property.h +++ b/driver/vidc/inc/hfi_property.h @@ -557,6 +557,8 @@ enum hfi_saliency_type { #define HFI_PROP_REQUEST_PREPROCESS 0x0300018E +#define HFI_PROP_UBWC_STRIDE_SCANLINE 0x03000190 + #define HFI_PROP_END 0x03FFFFFF #define HFI_SESSION_ERROR_BEGIN 0x04000000 diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 61e010b29c..c122f6f449 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -207,6 +207,63 @@ static int msm_vdec_set_linear_stride_scanline(struct msm_vidc_inst *inst) return rc; } +static int msm_vdec_set_ubwc_stride_scanline(struct msm_vidc_inst *inst) +{ + int rc = 0; + u32 stride_y, scanline_y, stride_uv, scanline_uv; + u32 meta_stride_y, meta_scanline_y, meta_stride_uv, meta_scanline_uv; + u32 payload[4]; + struct v4l2_format *f; + u32 pix_fmt, width, height; + + f = &inst->fmts[OUTPUT_PORT]; + pix_fmt = f->fmt.pix_mp.pixelformat; + width = f->fmt.pix_mp.width; + height = f->fmt.pix_mp.height; + + if (inst->codec != MSM_VIDC_AV1 || + (pix_fmt != V4L2_PIX_FMT_VIDC_NV12C && + pix_fmt != V4L2_PIX_FMT_VIDC_TP10C)) + return 0; + + stride_y = VIDEO_Y_STRIDE_BYTES(pix_fmt, width); + scanline_y = VIDEO_Y_SCANLINES(pix_fmt, height); + stride_uv = VIDEO_UV_STRIDE_BYTES(pix_fmt, width); + scanline_uv = VIDEO_UV_SCANLINES(pix_fmt, height); + + meta_stride_y = VIDEO_Y_META_STRIDE(pix_fmt, width); + meta_scanline_y = VIDEO_Y_META_SCANLINES(pix_fmt, height); + meta_stride_uv = VIDEO_UV_META_STRIDE(pix_fmt, width); + meta_scanline_uv = VIDEO_UV_META_SCANLINES(pix_fmt, height); + + payload[0] = stride_y << 16 | scanline_y; + payload[1] = stride_uv << 16 | scanline_uv; + payload[2] = meta_stride_y << 16 | meta_scanline_y; + payload[3] = meta_stride_uv << 16 | meta_scanline_uv; + + i_vpr_h(inst, "%s: stride_y: %d scanline_y: %d " + "stride_uv: %d scanline_uv: %d " + "meta_stride_y: %d meta_scanline_y: %d " + "meta_stride_uv: %d, meta_scanline_uv: %d", + __func__, + stride_y, scanline_y, stride_uv, scanline_uv, + meta_stride_y, meta_scanline_y, + meta_stride_uv, meta_scanline_uv); + rc = venus_hfi_session_property(inst, + HFI_PROP_UBWC_STRIDE_SCANLINE, + HFI_HOST_FLAGS_NONE, + get_hfi_port(inst, OUTPUT_PORT), + HFI_PAYLOAD_U32_ARRAY, + &payload[0], + sizeof(u32) * 4); + if (rc) { + i_vpr_e(inst, "%s: set property failed\n", __func__); + return rc; + } + + return rc; +} + static int msm_vdec_set_crop_offsets(struct msm_vidc_inst *inst, enum msm_vidc_port_type port) { @@ -687,6 +744,10 @@ static int msm_vdec_set_output_properties(struct msm_vidc_inst *inst) if (rc) return rc; + rc = msm_vdec_set_ubwc_stride_scanline(inst); + if (rc) + return rc; + rc = msm_vidc_set_session_priority(inst, PRIORITY); if (rc) return rc; From 701b2a4c588d9487e8eaa31ed333c9ceede7e35c Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Thu, 28 Apr 2022 15:36:25 +0530 Subject: [PATCH 0616/1061] video: driver: fix fd leak issue if msm_vidc_memory_map() call fails then, we are not decrementing dma_buf refcount immediately and entry still stays in mappings list. So backed fd willnot be reusable for the entire session and gets cleaned up only during msm_vidc_close(). This issue mostly occur for encode session. Added change to cleanup dma_buf refcount immediately at the time of issue. Change-Id: I48b4ffaa9d329ef14ef59c5c016a6dd04f705b7a Signed-off-by: Govindaraj Rajagopal --- driver/vidc/src/msm_vdec.c | 5 +++++ driver/vidc/src/msm_vidc_driver.c | 34 ++++++++++++++++--------------- 2 files changed, 23 insertions(+), 16 deletions(-) diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index c122f6f449..c3c9d986d8 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -2089,6 +2089,11 @@ static int msm_vidc_unmap_excessive_mappings(struct msm_vidc_inst *inst) rc = msm_vidc_put_delayed_unmap(inst, map); if (rc) return rc; + if (!map->refcount) { + list_del_init(&map->list); + msm_vidc_memory_put_dmabuf(inst, map->dmabuf); + msm_memory_pool_free(inst, map); + } } } return rc; diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 0514ea2010..a232e9240d 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -2737,10 +2737,10 @@ int msm_vidc_get_delayed_unmap(struct msm_vidc_inst *inst, struct msm_vidc_map * return -EINVAL; } - map->skip_delayed_unmap = 1; rc = msm_vidc_memory_map(inst->core, map); if (rc) return rc; + map->skip_delayed_unmap = 1; return 0; } @@ -2765,12 +2765,6 @@ int msm_vidc_put_delayed_unmap(struct msm_vidc_inst *inst, struct msm_vidc_map * if (rc) i_vpr_e(inst, "%s: unmap failed\n", __func__); - if (!map->refcount) { - msm_vidc_memory_put_dmabuf(inst, map->dmabuf); - list_del(&map->list); - msm_memory_pool_free(inst, map); - } - return rc; } @@ -2877,29 +2871,37 @@ int msm_vidc_map_driver_buf(struct msm_vidc_inst *inst, return -ENOMEM; } INIT_LIST_HEAD(&map->list); + list_add_tail(&map->list, &mappings->list); map->type = buf->type; map->dmabuf = msm_vidc_memory_get_dmabuf(inst, buf->fd); - if (!map->dmabuf) - return -EINVAL; + if (!map->dmabuf) { + rc = -EINVAL; + goto error; + } map->region = msm_vidc_get_buffer_region(inst, buf->type, __func__); /* delayed unmap feature needed for decoder output buffers */ if (is_decode_session(inst) && is_output_buffer(buf->type)) { rc = msm_vidc_get_delayed_unmap(inst, map); - if (rc) { - msm_vidc_memory_put_dmabuf(inst, map->dmabuf); - msm_memory_pool_free(inst, map); - return rc; - } + if (rc) + goto error; } - list_add_tail(&map->list, &mappings->list); } rc = msm_vidc_memory_map(inst->core, map); if (rc) - return rc; + goto error; buf->device_addr = map->device_addr; return 0; +error: + if (!found) { + if (is_decode_session(inst) && is_output_buffer(buf->type)) + msm_vidc_put_delayed_unmap(inst, map); + msm_vidc_memory_put_dmabuf(inst, map->dmabuf); + list_del_init(&map->list); + msm_memory_pool_free(inst, map); + } + return rc; } int msm_vidc_put_driver_buf(struct msm_vidc_inst *inst, From 0b5a5e71fc321c75601a9bfe64e38798db09df81 Mon Sep 17 00:00:00 2001 From: Deepa Guthyappa Madivalara Date: Mon, 9 May 2022 13:38:33 -0700 Subject: [PATCH 0617/1061] video: driver: fix uinitalized variables Intitalize variables to address warnings Change-Id: Id211e49e5055839b34950f6075e034aa74f4ae0c Signed-off-by: Deepa Guthyappa Madivalara --- driver/vidc/src/msm_vidc_driver.c | 2 +- driver/vidc/src/msm_vidc_power.c | 3 ++- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index a232e9240d..2c8e1708dc 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -2568,7 +2568,7 @@ int msm_vidc_flush_ts(struct msm_vidc_inst *inst) int msm_vidc_update_timestamp_rate(struct msm_vidc_inst *inst, u64 timestamp) { - struct msm_vidc_timestamp *ts, *prev; + struct msm_vidc_timestamp *ts, *prev = NULL; int rc = 0; u32 window_size = 0; u32 timestamp_rate = 0; diff --git a/driver/vidc/src/msm_vidc_power.c b/driver/vidc/src/msm_vidc_power.c index 27596ac916..ace0f0cb29 100644 --- a/driver/vidc/src/msm_vidc_power.c +++ b/driver/vidc/src/msm_vidc_power.c @@ -484,7 +484,8 @@ int msm_vidc_scale_power(struct msm_vidc_inst *inst, bool scale_buses) struct msm_vidc_buffer *vbuf; u32 data_size = 0; u32 fps; - u32 frame_rate, operating_rate, timestamp_rate, input_rate; + u32 frame_rate, operating_rate; + u32 timestamp_rate = 0, input_rate = 0; if (!inst || !inst->core) { d_vpr_e("%s: invalid params %pK\n", __func__, inst); From 2f361417ab36c88cccebbed3ebca5b1254d05ef0 Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Tue, 10 May 2022 15:46:41 -0700 Subject: [PATCH 0618/1061] video: driver: input metadata buffer size changes use default 16kb as input metadata buffer size. Amend buffer size if ROi metadata is enabled. Change-Id: I7b07c432dcf27f83096f07be03537f02db9114dd Signed-off-by: Darshana Patil --- driver/vidc/src/msm_vidc_buffer.c | 28 +++++++++++++++++++++++++++- 1 file changed, 27 insertions(+), 1 deletion(-) diff --git a/driver/vidc/src/msm_vidc_buffer.c b/driver/vidc/src/msm_vidc_buffer.c index ae2f6fd416..eb48912ef4 100644 --- a/driver/vidc/src/msm_vidc_buffer.c +++ b/driver/vidc/src/msm_vidc_buffer.c @@ -412,7 +412,33 @@ static inline u32 ROI_METADATA_SIZE( u32 msm_vidc_encoder_input_meta_size(struct msm_vidc_inst *inst) { - return ENCODE_INPUT_METADATA_SIZE; + u32 size = 0; + u32 lcu_size = 0; + struct v4l2_format *f; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return 0; + } + + size = MSM_VIDC_METADATA_SIZE; + + if (inst->capabilities->cap[INPUT_META_VIA_REQUEST].value) + return ENCODE_INPUT_METADATA_SIZE; + + if (inst->capabilities->cap[META_ROI_INFO].value) { + lcu_size = 16; + + f = &inst->fmts[OUTPUT_PORT]; + if (f->fmt.pix_mp.pixelformat == V4L2_PIX_FMT_HEVC) + lcu_size = 32; + + f = &inst->fmts[INPUT_PORT]; + size += ROI_METADATA_SIZE(f->fmt.pix_mp.width, + f->fmt.pix_mp.height, lcu_size); + size = ALIGN(size, SZ_4K); + } + return size; } u32 msm_vidc_encoder_output_meta_size(struct msm_vidc_inst *inst) From 96a1693ba47d867d7cf9ac24416118540142ee1c Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Thu, 12 May 2022 14:56:39 -0700 Subject: [PATCH 0619/1061] video: driver: Acquire lock for fence fd creation Acquire lock for fence fd creation to avoid sync_file_poll race conditions in fence enabled case. Change-Id: Icb45550cd6d2018112e99d886aedd98ac3922a2c Signed-off-by: Akshata Sahukar --- driver/vidc/src/msm_vidc_fence.c | 22 +++++++++++++++++++++- 1 file changed, 21 insertions(+), 1 deletion(-) diff --git a/driver/vidc/src/msm_vidc_fence.c b/driver/vidc/src/msm_vidc_fence.c index f85053e939..65932e0f7d 100644 --- a/driver/vidc/src/msm_vidc_fence.c +++ b/driver/vidc/src/msm_vidc_fence.c @@ -5,6 +5,9 @@ #include "msm_vidc_fence.h" #include "msm_vidc_debug.h" +#include "msm_vidc_driver.h" + +extern struct msm_vidc_core *g_core; static const char *msm_vidc_dma_fence_get_driver_name(struct dma_fence *df) { @@ -92,6 +95,18 @@ int msm_vidc_create_fence_fd(struct msm_vidc_inst *inst, return -EINVAL; } + /* + * Acquire inst->lock for fence fd creation + * to avoid sync_file_create() and sync_file_poll() + * race conditions in e2e playback usecase. + */ + inst = get_inst_ref(g_core, inst); + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + inst_lock(inst, __func__); + fence->fd = get_unused_fd_flags(0); if (fence->fd < 0) { i_vpr_e(inst, "%s: getting fd (%d) failed\n", __func__, @@ -109,11 +124,16 @@ int msm_vidc_create_fence_fd(struct msm_vidc_inst *inst, i_vpr_l(inst, "%s: created fd %d for fence %s\n", __func__, fence->fd, fence->name); - return rc; + + inst_unlock(inst, __func__); + put_inst(inst); + return 0; err_sync_file: put_unused_fd(fence->fd); err_fd: + inst_unlock(inst, __func__); + put_inst(inst); return rc; } From 5a7898589ea73ddb642c373b25cec9c5722b2d83 Mon Sep 17 00:00:00 2001 From: Vikash Garodia Date: Tue, 10 May 2022 20:54:40 +0530 Subject: [PATCH 0620/1061] video: driver: keep default complexity as 50 Complexity parameter defines the encoding tools used during an encode session. Higher the complexity implies more quality with advance encoding tools used. Keeping the default value as moderate or acceptable range. Change-Id: I3ee66d3a6612d5d60cd63a0698a4248f48ee8e2d Signed-off-by: Vikash Garodia --- driver/platform/kalama/src/msm_vidc_kalama.c | 2 +- driver/platform/waipio/src/msm_vidc_waipio.c | 2 +- driver/variant/iris2/src/msm_vidc_iris2.c | 4 ++-- driver/variant/iris3/src/msm_vidc_iris3.c | 4 ++-- driver/vidc/inc/msm_vidc_internal.h | 2 ++ 5 files changed, 8 insertions(+), 6 deletions(-) diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index c780926b85..74f0777e93 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -1687,7 +1687,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { {COMPLEXITY, ENC, H264|HEVC, 0, 100, - 1, 100, + 1, DEFAULT_COMPLEXITY, V4L2_CID_MPEG_VIDC_VENC_COMPLEXITY}, {META_MAX_NUM_REORDER_FRAMES, DEC, HEVC | H264, diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 5691b68c80..a3c064661b 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -1540,7 +1540,7 @@ static struct msm_platform_inst_capability instance_cap_data_waipio[] = { {COMPLEXITY, ENC, H264 | HEVC, 0, 100, - 1, 100, + 1, DEFAULT_COMPLEXITY, V4L2_CID_MPEG_VIDC_VENC_COMPLEXITY}, {META_MAX_NUM_REORDER_FRAMES, DEC, HEVC | H264, diff --git a/driver/variant/iris2/src/msm_vidc_iris2.c b/driver/variant/iris2/src/msm_vidc_iris2.c index 07690dbe24..9d348b264c 100644 --- a/driver/variant/iris2/src/msm_vidc_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_iris2.c @@ -1158,10 +1158,10 @@ int msm_vidc_decide_quality_mode_iris2(struct msm_vidc_inst* inst) max_hq_mbpf = core->capabilities[MAX_MBPF_HQ].value;; max_hq_mbps = core->capabilities[MAX_MBPS_HQ].value;; - /* NRT session to have max quality unless client configures least complexity */ + /* NRT session to have max quality unless client configures lesser complexity */ if (!is_realtime_session(inst) && mbpf <= max_hq_mbpf) { mode = MSM_VIDC_MAX_QUALITY_MODE; - if (!capability->cap[COMPLEXITY].value) + if (capability->cap[COMPLEXITY].value < DEFAULT_COMPLEXITY) mode = MSM_VIDC_POWER_SAVE_MODE; goto exit; } diff --git a/driver/variant/iris3/src/msm_vidc_iris3.c b/driver/variant/iris3/src/msm_vidc_iris3.c index e8e31059be..58a6dae782 100644 --- a/driver/variant/iris3/src/msm_vidc_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_iris3.c @@ -1116,8 +1116,8 @@ int msm_vidc_decide_quality_mode_iris3(struct msm_vidc_inst* inst) goto decision_done; } - /* for least complexity, make LP for all resolution */ - if (!capability->cap[COMPLEXITY].value) { + /* for lesser complexity, make LP for all resolution */ + if (capability->cap[COMPLEXITY].value < DEFAULT_COMPLEXITY) { mode = MSM_VIDC_POWER_SAVE_MODE; goto decision_done; } diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index cc04ae259f..d88be45d00 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -70,6 +70,8 @@ #define DEC_FPS_WINDOW 10 #define INPUT_TIMER_LIST_SIZE 30 +#define DEFAULT_COMPLEXITY 50 + #define INPUT_MPLANE V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE #define OUTPUT_MPLANE V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE #define INPUT_META_PLANE V4L2_BUF_TYPE_META_OUTPUT From 888ecb9f1b7f5344d27747514973491dc7df5647 Mon Sep 17 00:00:00 2001 From: Mihir Ganu Date: Fri, 13 May 2022 08:00:01 -0700 Subject: [PATCH 0621/1061] video: driver: Subscribe to color info for AV1 Subscribe to HFI_PROP_SIGNAL_COLOR_INFO to receive color info from bitstream AV1 bitstreams. Change-Id: I3c76bc651160b701078bd73725f7060388ad9125 Signed-off-by: Mihir Ganu --- driver/vidc/src/msm_vdec.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index c3c9d986d8..ad6fc249e2 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -66,6 +66,7 @@ static const u32 msm_vdec_subscribe_for_psc_av1[] = { HFI_PROP_PROFILE, HFI_PROP_LEVEL, HFI_PROP_TIER, + HFI_PROP_SIGNAL_COLOR_INFO, }; static const u32 msm_vdec_input_subscribe_for_properties[] = { @@ -469,9 +470,7 @@ static int msm_vdec_set_colorspace(struct msm_vidc_inst *inst, return -EINVAL; } - if (inst->codec != MSM_VIDC_H264 && - inst->codec != MSM_VIDC_HEVC && - inst->codec != MSM_VIDC_HEIC) + if (inst->codec == MSM_VIDC_VP9) return 0; if (inst->fmts[port].fmt.pix_mp.colorspace != V4L2_COLORSPACE_DEFAULT || From 094b4c057c5f814ba2e02e9cd6c4f7215ea7863d Mon Sep 17 00:00:00 2001 From: Mihir Ganu Date: Tue, 17 May 2022 21:16:10 -0700 Subject: [PATCH 0622/1061] video: driver: Increase vpp cycles for specific AV1 content AV1 bitstreams can be encoded with non-recommended tile settings which reduce pipe efficiency when 128x128 superblocks are used. Increase vpp cycles when 128x128 superblocks are detected. Change-Id: I14b42363fe36116144e2a2a4bbf67cd9cc26632b Signed-off-by: Mihir Ganu --- .../variant/iris3/src/msm_vidc_power_iris3.c | 22 +++++++++++++------ 1 file changed, 15 insertions(+), 7 deletions(-) diff --git a/driver/variant/iris3/src/msm_vidc_power_iris3.c b/driver/variant/iris3/src/msm_vidc_power_iris3.c index 85b2eeca8a..d289a8cc37 100644 --- a/driver/variant/iris3/src/msm_vidc_power_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_power_iris3.c @@ -119,15 +119,23 @@ u64 msm_vidc_calc_freq_iris3(struct msm_vidc_inst *inst, u32 data_size) inst->capabilities->cap[PIPE].value; /* 21 / 20 is minimum overhead factor */ vpp_cycles += max(vpp_cycles / 20, fw_vpp_cycles); - /* 1.059 is multi-pipe overhead - * 1.410 AV1 RECOMMENDED TILE 1080P_V2XH1, UHD_V2X2, 8KUHD_V8X2 - * av1d_commer_tile_enable=0 - */ if (inst->capabilities->cap[PIPE].value > 1) { - if (inst->codec == MSM_VIDC_AV1) - vpp_cycles += div_u64(vpp_cycles * 410, 1000); - else + if (inst->codec == MSM_VIDC_AV1) { + /* + * Additional vpp_cycles are required for bitstreams with + * 128x128 superblock and non-recommended tile settings. + * recommended tiles: 1080P_V2XH1, UHD_V2X2, 8KUHD_V8X2 + * non-recommended tiles: 1080P_V4XH2_V4X1, UHD_V8X4_V8X1, + * 8KUHD_V8X8_V8X1 + */ + if (inst->capabilities->cap[SUPER_BLOCK].value) + vpp_cycles += div_u64(vpp_cycles * 1464, 1000); + else + vpp_cycles += div_u64(vpp_cycles * 410, 1000); + } else { + /* 1.059 is multi-pipe overhead */ vpp_cycles += div_u64(vpp_cycles * 59, 1000); + } } /* VSP */ From 3964fa91599ad951ecf2708ead469dd38330de3a Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Fri, 13 May 2022 17:32:21 -0700 Subject: [PATCH 0623/1061] video: driver: Create and use single spin lock for dma fence Create and use single spin lock per session (per fence context) rather than creating spin locks per dma fence to possibly resolve flickering in video playback. Change-Id: I01286ae375dfedc0da26a1be4ded1bd1e02767ba Signed-off-by: Akshata Sahukar --- driver/vidc/inc/msm_vidc_internal.h | 8 ++++---- driver/vidc/src/msm_vidc_driver.c | 14 ++++++++++++++ driver/vidc/src/msm_vidc_fence.c | 20 ++------------------ 3 files changed, 20 insertions(+), 22 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index d88be45d00..cc025231ba 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -827,16 +827,16 @@ struct msm_vidc_power { }; struct msm_vidc_fence_context { - char name[MAX_NAME_LENGTH]; - u64 ctx_num; - u64 seq_num; + char name[MAX_NAME_LENGTH]; + u64 ctx_num; + u64 seq_num; + spinlock_t lock; }; struct msm_vidc_fence { struct list_head list; struct dma_fence dma_fence; char name[MAX_NAME_LENGTH]; - spinlock_t lock; struct sync_file *sync_file; int fd; }; diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 2c8e1708dc..2db75de4e0 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -2102,6 +2102,18 @@ int msm_vidc_get_fence_fd(struct msm_vidc_inst *inst, int *fence_fd) return -EINVAL; } + /* + * Acquire inst->lock for fence fd creation + * to avoid sync_file_create() and sync_file_poll() + * race conditions in e2e playback usecase. + */ + inst = get_inst_ref(g_core, inst); + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + inst_lock(inst, __func__); + list_for_each_entry_safe(fence, dummy_fence, &inst->fence_list, list) { if (fence->dma_fence.seqno == (u64)inst->capabilities->cap[FENCE_ID].value) { @@ -2125,6 +2137,8 @@ int msm_vidc_get_fence_fd(struct msm_vidc_inst *inst, int *fence_fd) *fence_fd = fence->fd; exit: + inst_unlock(inst, __func__); + put_inst(inst); return rc; } diff --git a/driver/vidc/src/msm_vidc_fence.c b/driver/vidc/src/msm_vidc_fence.c index 65932e0f7d..91c2c6b801 100644 --- a/driver/vidc/src/msm_vidc_fence.c +++ b/driver/vidc/src/msm_vidc_fence.c @@ -67,9 +67,8 @@ struct msm_vidc_fence *msm_vidc_fence_create(struct msm_vidc_inst *inst) } fence->fd = INVALID_FD; - spin_lock_init(&fence->lock); dma_fence_init(&fence->dma_fence, &msm_vidc_dma_fence_ops, - &fence->lock, inst->fence_context.ctx_num, + &inst->fence_context.lock, inst->fence_context.ctx_num, ++inst->fence_context.seq_num); snprintf(fence->name, sizeof(fence->name), "%s: %llu", inst->fence_context.name, inst->fence_context.seq_num); @@ -95,18 +94,6 @@ int msm_vidc_create_fence_fd(struct msm_vidc_inst *inst, return -EINVAL; } - /* - * Acquire inst->lock for fence fd creation - * to avoid sync_file_create() and sync_file_poll() - * race conditions in e2e playback usecase. - */ - inst = get_inst_ref(g_core, inst); - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - inst_lock(inst, __func__); - fence->fd = get_unused_fd_flags(0); if (fence->fd < 0) { i_vpr_e(inst, "%s: getting fd (%d) failed\n", __func__, @@ -125,15 +112,11 @@ int msm_vidc_create_fence_fd(struct msm_vidc_inst *inst, i_vpr_l(inst, "%s: created fd %d for fence %s\n", __func__, fence->fd, fence->name); - inst_unlock(inst, __func__); - put_inst(inst); return 0; err_sync_file: put_unused_fd(fence->fd); err_fd: - inst_unlock(inst, __func__); - put_inst(inst); return rc; } @@ -236,6 +219,7 @@ void msm_vidc_fence_deinit(struct msm_vidc_inst *inst) } i_vpr_h(inst, "%s: %s\n", __func__, inst->fence_context.name); inst->fence_context.ctx_num = 0; + spin_lock_init(&inst->fence_context.lock); snprintf(inst->fence_context.name, sizeof(inst->fence_context.name), "%s", ""); } From 8d0a2179842a8c7f3915aa3d5458afd6526012f7 Mon Sep 17 00:00:00 2001 From: Mahesh Kumar Sharma Date: Mon, 16 May 2022 18:16:04 -0700 Subject: [PATCH 0624/1061] video: driver: enable transcode stat for decoder Subscribe and enable HFI_PROP_TRANSCODING_STAT_INFO property in order to enable transcoding stat for decoder. This stat is used further by encoder to improve encoder quality decision for transcode case. Ideally we want to avoid CAC-BRS multiple times for same encoded bitstream. When user does recording (1st encode), So we have CAC enabled bitstream. Now, if user wants to send it via some app. So, it will be decode -> (optional GPU) -> (2nd) encode For 2nd encode -> we would like to not apply same CAC. It needs either tuning. But we don't have a way from bitstream to know whether it went via CAC. This feature enables to use the stat info received from decoder to fine tune encoding. Change-Id: Iaf640878f5554b16aad3314ba4e26f99638c43af Signed-off-by: Mahesh Kumar Sharma --- driver/platform/kalama/src/msm_vidc_kalama.c | 16 ++++++++++++++++ driver/vidc/inc/hfi_property.h | 2 ++ driver/vidc/inc/msm_vidc_internal.h | 1 + driver/vidc/src/msm_vidc_control.c | 1 - include/uapi/vidc/media/v4l2_vidc_extensions.h | 3 +++ 5 files changed, 22 insertions(+), 1 deletion(-) diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index 74f0777e93..3d7b439382 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -1532,6 +1532,22 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { HFI_PROP_HISTOGRAM_INFO, CAP_FLAG_BITMASK}, + {META_TRANSCODING_STAT_INFO, DEC, HEVC|H264, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_TRANSCODE_STAT_INFO, + HFI_PROP_TRANSCODING_STAT_INFO, + CAP_FLAG_BITMASK}, + + {META_TRANSCODING_STAT_INFO, ENC, HEVC|H264, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_TX_INPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_TRANSCODE_STAT_INFO, + HFI_PROP_TRANSCODING_STAT_INFO, + CAP_FLAG_BITMASK}, + {META_PICTURE_TYPE, DEC, CODECS_ALL, V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_INPUT, diff --git a/driver/vidc/inc/hfi_property.h b/driver/vidc/inc/hfi_property.h index 75ed35815d..2472aec77c 100644 --- a/driver/vidc/inc/hfi_property.h +++ b/driver/vidc/inc/hfi_property.h @@ -559,6 +559,8 @@ enum hfi_saliency_type { #define HFI_PROP_UBWC_STRIDE_SCANLINE 0x03000190 +#define HFI_PROP_TRANSCODING_STAT_INFO 0x03000191 + #define HFI_PROP_END 0x03FFFFFF #define HFI_SESSION_ERROR_BEGIN 0x04000000 diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index d88be45d00..02cc5738c0 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -383,6 +383,7 @@ enum msm_vidc_inst_capability_type { META_EVA_STATS, META_ROI_INFO, META_SALIENCY_INFO, + META_TRANSCODING_STAT_INFO, META_CAP_MAX, /* end of metadata caps */ FRAME_WIDTH, diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 8e5a75167a..48f0e2e62a 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -4004,7 +4004,6 @@ int msm_vidc_set_preprocess(void *instance, struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; u32 hfi_value; - d_vpr_e("%s: \n", __func__); if (!inst || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; diff --git a/include/uapi/vidc/media/v4l2_vidc_extensions.h b/include/uapi/vidc/media/v4l2_vidc_extensions.h index afc041b34e..f249289907 100644 --- a/include/uapi/vidc/media/v4l2_vidc_extensions.h +++ b/include/uapi/vidc/media/v4l2_vidc_extensions.h @@ -149,6 +149,8 @@ enum v4l2_mpeg_vidc_metadata_bits { (V4L2_CID_MPEG_VIDC_BASE + 0x25) #define V4L2_CID_MPEG_VIDC_METADATA_SALIENCY_INFO \ (V4L2_CID_MPEG_VIDC_BASE + 0x26) +#define V4L2_CID_MPEG_VIDC_METADATA_TRANSCODE_STAT_INFO \ + (V4L2_CID_MPEG_VIDC_BASE + 0x27) /* Encoder Super frame control */ #define V4L2_CID_MPEG_VIDC_SUPERFRAME (V4L2_CID_MPEG_VIDC_BASE + 0x28) @@ -401,6 +403,7 @@ enum v4l2_mpeg_vidc_metadata { METADATA_MAX_NUM_REORDER_FRAMES = 0x03000127, METADATA_SALIENCY_INFO = 0x0300018A, METADATA_FENCE = 0x0300018B, + METADATA_TRANSCODING_STAT_INFO = 0x03000191, }; enum meta_interlace_info { META_INTERLACE_INFO_NONE = 0x00000000, From 52c0799bf7b3bdf34c896f16976968a58f1fedb8 Mon Sep 17 00:00:00 2001 From: Deepa Guthyappa Madivalara Date: Fri, 22 Apr 2022 16:12:15 -0700 Subject: [PATCH 0625/1061] video: driver: support upto level 6.2 for AVC and HEVC dec allow support upto level 6.2 for AVC/HEVC decoder Change-Id: I5579b5fa7f41fbe98c9e6998d4362542423cbd18 Signed-off-by: Deepa Guthyappa Madivalara --- driver/platform/kalama/src/msm_vidc_kalama.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index 74f0777e93..3a0f2ad4ac 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -1084,7 +1084,8 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_1) | BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_2) | BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_1), + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_2), V4L2_MPEG_VIDEO_H264_LEVEL_6_1, V4L2_CID_MPEG_VIDEO_H264_LEVEL, HFI_PROP_LEVEL, @@ -1104,7 +1105,8 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1) | BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2) | BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1), + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1)| + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2), V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1, V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, HFI_PROP_LEVEL, From dd262f5916984900c3a220ff43aed6f5c7e85f62 Mon Sep 17 00:00:00 2001 From: Vedang Nagar Date: Thu, 19 May 2022 15:27:21 +0530 Subject: [PATCH 0626/1061] video: driver: Add Complexity vs. Operating Rate handling For Quality mode decision, Complexity and Operating rate are handled as below - [1] If Complexity and operating rate both are set, then for NRT, complexity is honored, and operating rate can be adjusted. But for RT, Operating Rate is honored and complexity can be adjusted. [2] If only Complexity is set, then complexity is honored. [3] If only Operating rate set then Operating rate is honored [4] If None set, then upto encoder to decide Change-Id: Ib8008551d5ee7a9506f4d1586ed7a3ae967ac54b Signed-off-by: Vedang Nagar --- driver/variant/iris3/src/msm_vidc_iris3.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/driver/variant/iris3/src/msm_vidc_iris3.c b/driver/variant/iris3/src/msm_vidc_iris3.c index 58a6dae782..9dc8fa6222 100644 --- a/driver/variant/iris3/src/msm_vidc_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_iris3.c @@ -1128,9 +1128,13 @@ int msm_vidc_decide_quality_mode_iris3(struct msm_vidc_inst* inst) max_hq_mbpf = core->capabilities[MAX_MBPF_HQ].value;; max_hq_mbps = core->capabilities[MAX_MBPS_HQ].value;; - if (!is_realtime_session(inst) && mbpf <= max_hq_mbpf) { - mode = MSM_VIDC_MAX_QUALITY_MODE; - goto decision_done; + if (!is_realtime_session(inst)) { + if (((capability->cap[COMPLEXITY].flags & CAP_FLAG_CLIENT_SET) && + (capability->cap[COMPLEXITY].value >= DEFAULT_COMPLEXITY)) || + mbpf <= max_hq_mbpf) { + mode = MSM_VIDC_MAX_QUALITY_MODE; + goto decision_done; + } } if (mbpf <= max_hq_mbpf && mbps <= max_hq_mbps) From e6a87ed4fe1cd61d3dcac712638bd982f80c2b2c Mon Sep 17 00:00:00 2001 From: Deepa Guthyappa Madivalara Date: Fri, 20 May 2022 09:55:56 -0700 Subject: [PATCH 0627/1061] video: driver: Fix realtime load calculation Use instanace instead of inst to resolve the load calculation error Change-Id: Id346b6222f7c00e741ba8bfecf7100cfb4a90041 Signed-off-by: Deepa Guthyappa Madivalara --- driver/vidc/src/msm_vidc_driver.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 2c8e1708dc..51e847a937 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -5991,7 +5991,7 @@ int msm_vidc_check_core_mbps(struct msm_vidc_inst *inst) continue; /* ignore thumbnail, image, and non realtime sessions */ - if (msm_vidc_ignore_session_load(inst)) + if (msm_vidc_ignore_session_load(instance)) continue; mbps = msm_vidc_get_inst_load(instance); @@ -6016,10 +6016,10 @@ int msm_vidc_check_core_mbps(struct msm_vidc_inst *inst) core_lock(core, __func__); list_for_each_entry(instance, &core->instances, list) { /* reduce realtime decode sessions priority */ - if (is_decode_session(inst) && is_realtime_session(inst)) { + if (is_decode_session(instance) && is_realtime_session(instance)) { instance->adjust_priority = RT_DEC_DOWN_PRORITY_OFFSET; i_vpr_h(inst, "%s: pending adjust priority by %d\n", - __func__, inst->adjust_priority); + __func__, instance->adjust_priority); } } core_unlock(core, __func__); @@ -6092,7 +6092,7 @@ int msm_vidc_check_core_mbpf(struct msm_vidc_inst *inst) core_lock(core, __func__); /* check real-time video sessions max limit */ list_for_each_entry(instance, &core->instances, list) { - if (msm_vidc_ignore_session_load(inst)) + if (msm_vidc_ignore_session_load(instance)) continue; video_rt_mbpf += msm_vidc_get_mbs_per_frame(instance); @@ -6334,7 +6334,7 @@ static int msm_vidc_check_max_sessions(struct msm_vidc_inst *inst) core_lock(core, __func__); list_for_each_entry(i, &core->instances, list) { /* skip image sessions count */ - if (is_image_session(inst)) + if (is_image_session(i)) continue; if (is_decode_session(i)) { From 5589b67cb529c0553abf6634dd9896c272b570e1 Mon Sep 17 00:00:00 2001 From: Vikash Garodia Date: Wed, 18 May 2022 15:40:16 +0530 Subject: [PATCH 0628/1061] driver: video: Remove calls to power features during priority handling While priority interface is set by V4L2 clients, tuning power features is not needed. The same is done when stream on is called. Change-Id: I931bbf72e5234ca552cdef984f05a2942ebc3442 Signed-off-by: Vikash Garodia --- driver/vidc/src/msm_vidc_control.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 8e5a75167a..c7d390a4ca 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -1107,11 +1107,8 @@ static int msm_vidc_update_static_property(struct msm_vidc_inst *inst, return rc; } - if (ctrl->id == V4L2_CID_MPEG_VIDC_CRITICAL_PRIORITY) { - inst->decode_batch.enable = msm_vidc_allow_decode_batch(inst); - msm_vidc_allow_dcvs(inst); + if (ctrl->id == V4L2_CID_MPEG_VIDC_CRITICAL_PRIORITY) msm_vidc_update_cap_value(inst, PRIORITY, 0, __func__); - } if (ctrl->id == V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER) { u32 enable; From 444e7763ee463e2439788dfa696f8e405c3816b2 Mon Sep 17 00:00:00 2001 From: Mihir Ganu Date: Tue, 24 May 2022 15:57:41 -0700 Subject: [PATCH 0629/1061] video: driver: Optimize encoder bin buffer size Reduce bin buffer size to detect buffer overflows in first stage, which allows frame to be re-encoded with a different QP. Change-Id: Ifaa5f744491ba35ceee164afeae7d9de90f81e18 Signed-off-by: Mihir Ganu --- driver/variant/iris3/inc/hfi_buffer_iris3.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/driver/variant/iris3/inc/hfi_buffer_iris3.h b/driver/variant/iris3/inc/hfi_buffer_iris3.h index 80bab297c5..58e70c1c48 100644 --- a/driver/variant/iris3/inc/hfi_buffer_iris3.h +++ b/driver/variant/iris3/inc/hfi_buffer_iris3.h @@ -1449,7 +1449,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ if (work_mode == HFI_WORKMODE_2) \ { \ total_bitbin_buffers = 3; \ - bitbin_size = bitstream_size * 17 / 10; \ + bitbin_size = bitstream_size * 12 / 10; \ bitbin_size = HFI_ALIGN(bitbin_size, \ VENUS_DMA_ALIGNMENT); \ } \ From 078aebf73aac3dd8324d570e9910342afa3f3ee6 Mon Sep 17 00:00:00 2001 From: Vedang Nagar Date: Thu, 18 Nov 2021 13:15:35 +0530 Subject: [PATCH 0630/1061] video-driver: Add support for subframe_input Add support for 'HFI_PROP_SUBFRAME_INPUT'. Payload '1' indicates that input buffer is processed. However, FW expects more inputs to construct a full YUV output buffer. Overloading 'MSM_VIDC_BUF_FLAG_ERROR' code to ensure HAL work completion Change-Id: I05b24a50e587dfd96457af508267843ac3840fbf Signed-off-by: Vedang Nagar --- driver/vidc/inc/hfi_property.h | 2 ++ driver/vidc/inc/msm_vidc_internal.h | 1 + driver/vidc/src/msm_vdec.c | 1 + driver/vidc/src/venus_hfi_response.c | 13 +++++++++++++ 4 files changed, 17 insertions(+) diff --git a/driver/vidc/inc/hfi_property.h b/driver/vidc/inc/hfi_property.h index 75ed35815d..2e5951629a 100644 --- a/driver/vidc/inc/hfi_property.h +++ b/driver/vidc/inc/hfi_property.h @@ -543,6 +543,8 @@ enum hfi_nal_length_field_type { #define HFI_PROP_AV1_OP_POINT 0x03000182 +#define HFI_PROP_SUBFRAME_INPUT 0x03000183 + #define HFI_PROP_OPB_ENABLE 0x03000184 #define HFI_PROP_AV1_DRAP_CONFIG 0x03000189 diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index d88be45d00..d95d9b76b2 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -762,6 +762,7 @@ struct msm_vidc_subscription_params { struct msm_vidc_hfi_frame_info { u32 picture_type; u32 no_output; + u32 subframe_input; u32 cr; u32 cf; u32 data_corrupt; diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index ad6fc249e2..4663b9bee0 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -71,6 +71,7 @@ static const u32 msm_vdec_subscribe_for_psc_av1[] = { static const u32 msm_vdec_input_subscribe_for_properties[] = { HFI_PROP_NO_OUTPUT, + HFI_PROP_SUBFRAME_INPUT, }; static const u32 msm_vdec_output_subscribe_for_properties[] = { diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index c483e63b3c..2c980860d2 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -607,6 +607,10 @@ static int get_driver_buffer_flags(struct msm_vidc_inst *inst, u32 hfi_flags) driver_flags |= MSM_VIDC_BUF_FLAG_ERROR; } + if (inst->hfi_frame_info.subframe_input) + if (inst->capabilities->cap[META_BUF_TAG].value) + driver_flags |= MSM_VIDC_BUF_FLAG_ERROR; + if (hfi_flags & HFI_BUF_FW_FLAG_CODEC_CONFIG) driver_flags |= MSM_VIDC_BUF_FLAG_CODECCONFIG; @@ -1499,6 +1503,15 @@ static int handle_property_with_payload(struct msm_vidc_inst *inst, if (inst->hfi_frame_info.picture_type & HFI_PICTURE_B) inst->has_bframe = true; break; + case HFI_PROP_SUBFRAME_INPUT: + if (port != INPUT_PORT) { + i_vpr_e(inst, + "%s: invalid port: %d for property %#x\n", + __func__, pkt->port, pkt->type); + break; + } + inst->hfi_frame_info.subframe_input = 1; + break; case HFI_PROP_WORST_COMPRESSION_RATIO: inst->hfi_frame_info.cr = payload_ptr[0]; break; From 2a687b2750f4b30708634f915885058fd2862abc Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Wed, 25 May 2022 12:28:27 -0700 Subject: [PATCH 0631/1061] video: driver: introduce client lock Acquire client lock for every entry point in driver. This is needed especially for streamoff and close calls where inst lock is released while driver is waiting for stop_done and close_done responses from fw. When inst lock is released, client can send a new ioctl call and driver state machine can get updated leading to unexpected behaviour. Change-Id: Ibb62c3431c88e2f1d9088d54fe7c9e53b1c284fd Signed-off-by: Darshana Patil --- driver/vidc/inc/msm_vidc_driver.h | 3 ++ driver/vidc/inc/msm_vidc_inst.h | 1 + driver/vidc/src/msm_vidc.c | 3 ++ driver/vidc/src/msm_vidc_driver.c | 16 +++++++++++ driver/vidc/src/msm_vidc_v4l2.c | 48 +++++++++++++++++++++++++++++++ driver/vidc/src/msm_vidc_vb2.c | 6 ++++ 6 files changed, 77 insertions(+) diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 0523a6302f..2c8f03ed29 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -519,6 +519,9 @@ bool core_lock_check(struct msm_vidc_core *core, const char *function); void inst_lock(struct msm_vidc_inst *inst, const char *function); void inst_unlock(struct msm_vidc_inst *inst, const char *function); bool inst_lock_check(struct msm_vidc_inst *inst, const char *function); +bool client_lock_check(struct msm_vidc_inst *inst, const char *func); +void client_lock(struct msm_vidc_inst *inst, const char *function); +void client_unlock(struct msm_vidc_inst *inst, const char *function); int msm_vidc_update_bitstream_buffer_size(struct msm_vidc_inst *inst); int msm_vidc_update_meta_port_settings(struct msm_vidc_inst *inst); int msm_vidc_update_buffer_count(struct msm_vidc_inst *inst, u32 port); diff --git a/driver/vidc/inc/msm_vidc_inst.h b/driver/vidc/inc/msm_vidc_inst.h index 6c1371567c..cac6126da0 100644 --- a/driver/vidc/inc/msm_vidc_inst.h +++ b/driver/vidc/inc/msm_vidc_inst.h @@ -98,6 +98,7 @@ struct msm_vidc_inst { struct list_head list; struct mutex lock; struct mutex request_lock; + struct mutex client_lock; enum msm_vidc_inst_state state; enum msm_vidc_domain_type domain; enum msm_vidc_codec_type codec; diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index 262515f4d1..a682a71f3a 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -899,6 +899,7 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) kref_init(&inst->kref); mutex_init(&inst->lock); mutex_init(&inst->request_lock); + mutex_init(&inst->client_lock); msm_vidc_update_debug_str(inst); i_vpr_h(inst, "Opening video instance: %d\n", session_type); @@ -1035,6 +1036,7 @@ int msm_vidc_close(void *instance) core = inst->core; i_vpr_h(inst, "%s()\n", __func__); + client_lock(inst, __func__); inst_lock(inst, __func__); /* print final stats */ msm_vidc_print_stats(inst); @@ -1042,6 +1044,7 @@ int msm_vidc_close(void *instance) msm_vidc_remove_session(inst); msm_vidc_destroy_buffers(inst); inst_unlock(inst, __func__); + client_unlock(inst, __func__); cancel_response_work_sync(inst); cancel_stability_work_sync(inst); cancel_stats_work_sync(inst); diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 277d663fe6..080ae29909 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -5620,6 +5620,7 @@ static void msm_vidc_close_helper(struct kref *kref) if (inst->response_workq) destroy_workqueue(inst->response_workq); msm_vidc_remove_dangling_session(inst); + mutex_destroy(&inst->client_lock); mutex_destroy(&inst->request_lock); mutex_destroy(&inst->lock); kfree(inst->capabilities); @@ -5712,6 +5713,21 @@ void inst_unlock(struct msm_vidc_inst *inst, const char *function) mutex_unlock(&inst->lock); } +bool client_lock_check(struct msm_vidc_inst *inst, const char *func) +{ + return mutex_is_locked(&inst->client_lock); +} + +void client_lock(struct msm_vidc_inst *inst, const char *function) +{ + mutex_lock(&inst->client_lock); +} + +void client_unlock(struct msm_vidc_inst *inst, const char *function) +{ + mutex_unlock(&inst->client_lock); +} + int msm_vidc_update_bitstream_buffer_size(struct msm_vidc_inst *inst) { struct msm_vidc_core *core; diff --git a/driver/vidc/src/msm_vidc_v4l2.c b/driver/vidc/src/msm_vidc_v4l2.c index 809c1627ce..61943a6880 100644 --- a/driver/vidc/src/msm_vidc_v4l2.c +++ b/driver/vidc/src/msm_vidc_v4l2.c @@ -76,6 +76,7 @@ int msm_v4l2_querycap(struct file *filp, void *fh, return -EINVAL; } + client_lock(inst, __func__); inst_lock(inst, __func__); rc = msm_vidc_querycap((void *)inst, cap); if (rc) @@ -83,6 +84,7 @@ int msm_v4l2_querycap(struct file *filp, void *fh, unlock: inst_unlock(inst, __func__); + client_unlock(inst, __func__); put_inst(inst); return rc; @@ -100,6 +102,7 @@ int msm_v4l2_enum_fmt(struct file *filp, void *fh, return -EINVAL; } + client_lock(inst, __func__); inst_lock(inst, __func__); rc = msm_vidc_enum_fmt((void *)inst, f); if (rc) @@ -107,6 +110,7 @@ int msm_v4l2_enum_fmt(struct file *filp, void *fh, unlock: inst_unlock(inst, __func__); + client_unlock(inst, __func__); put_inst(inst); return rc; @@ -123,6 +127,7 @@ int msm_v4l2_try_fmt(struct file *filp, void *fh, struct v4l2_format *f) return -EINVAL; } + client_lock(inst, __func__); inst_lock(inst, __func__); if (is_session_error(inst)) { i_vpr_e(inst, "%s: inst in error state\n", __func__); @@ -135,6 +140,7 @@ int msm_v4l2_try_fmt(struct file *filp, void *fh, struct v4l2_format *f) unlock: inst_unlock(inst, __func__); + client_unlock(inst, __func__); put_inst(inst); return rc; @@ -152,6 +158,7 @@ int msm_v4l2_s_fmt(struct file *filp, void *fh, return -EINVAL; } + client_lock(inst, __func__); inst_lock(inst, __func__); if (is_session_error(inst)) { i_vpr_e(inst, "%s: inst in error state\n", __func__); @@ -164,6 +171,7 @@ int msm_v4l2_s_fmt(struct file *filp, void *fh, unlock: inst_unlock(inst, __func__); + client_unlock(inst, __func__); put_inst(inst); return rc; @@ -181,6 +189,7 @@ int msm_v4l2_g_fmt(struct file *filp, void *fh, return -EINVAL; } + client_lock(inst, __func__); inst_lock(inst, __func__); rc = msm_vidc_g_fmt((void *)inst, f); if (rc) @@ -188,6 +197,7 @@ int msm_v4l2_g_fmt(struct file *filp, void *fh, unlock: inst_unlock(inst, __func__); + client_unlock(inst, __func__); put_inst(inst); return rc; @@ -205,6 +215,7 @@ int msm_v4l2_s_selection(struct file *filp, void *fh, return -EINVAL; } + client_lock(inst, __func__); inst_lock(inst, __func__); if (is_session_error(inst)) { i_vpr_e(inst, "%s: inst in error state\n", __func__); @@ -217,6 +228,7 @@ int msm_v4l2_s_selection(struct file *filp, void *fh, unlock: inst_unlock(inst, __func__); + client_unlock(inst, __func__); put_inst(inst); return rc; @@ -234,6 +246,7 @@ int msm_v4l2_g_selection(struct file *filp, void *fh, return -EINVAL; } + client_lock(inst, __func__); inst_lock(inst, __func__); rc = msm_vidc_g_selection((void *)inst, s); if (rc) @@ -241,6 +254,7 @@ int msm_v4l2_g_selection(struct file *filp, void *fh, unlock: inst_unlock(inst, __func__); + client_unlock(inst, __func__); put_inst(inst); return rc; @@ -258,6 +272,7 @@ int msm_v4l2_s_parm(struct file *filp, void *fh, return -EINVAL; } + client_lock(inst, __func__); inst_lock(inst, __func__); if (is_session_error(inst)) { i_vpr_e(inst, "%s: inst in error state\n", __func__); @@ -270,6 +285,7 @@ int msm_v4l2_s_parm(struct file *filp, void *fh, unlock: inst_unlock(inst, __func__); + client_unlock(inst, __func__); put_inst(inst); return rc; @@ -287,6 +303,7 @@ int msm_v4l2_g_parm(struct file *filp, void *fh, return -EINVAL; } + client_lock(inst, __func__); inst_lock(inst, __func__); rc = msm_vidc_g_param((void *)inst, a); if (rc) @@ -294,6 +311,7 @@ int msm_v4l2_g_parm(struct file *filp, void *fh, unlock: inst_unlock(inst, __func__); + client_unlock(inst, __func__); put_inst(inst); return rc; @@ -311,6 +329,7 @@ int msm_v4l2_reqbufs(struct file *filp, void *fh, return -EINVAL; } + client_lock(inst, __func__); inst_lock(inst, __func__); rc = msm_vidc_reqbufs((void *)inst, b); if (rc) @@ -318,6 +337,7 @@ int msm_v4l2_reqbufs(struct file *filp, void *fh, unlock: inst_unlock(inst, __func__); + client_unlock(inst, __func__); put_inst(inst); return rc; @@ -335,6 +355,7 @@ int msm_v4l2_querybuf(struct file *filp, void *fh, return -EINVAL; } + client_lock(inst, __func__); inst_lock(inst, __func__); rc = msm_vidc_querybuf((void *)inst, b); if (rc) @@ -342,6 +363,7 @@ int msm_v4l2_querybuf(struct file *filp, void *fh, unlock: inst_unlock(inst, __func__); + client_unlock(inst, __func__); put_inst(inst); return rc; @@ -360,12 +382,14 @@ int msm_v4l2_create_bufs(struct file *filp, void *fh, } inst_lock(inst, __func__); + client_lock(inst, __func__); rc = msm_vidc_create_bufs((void *)inst, b); if (rc) goto unlock; unlock: inst_unlock(inst, __func__); + client_unlock(inst, __func__); put_inst(inst); return rc; @@ -384,6 +408,7 @@ int msm_v4l2_prepare_buf(struct file *filp, void *fh, return -EINVAL; } + client_lock(inst, __func__); inst_lock(inst, __func__); rc = msm_vidc_prepare_buf((void *)inst, vdev->v4l2_dev->mdev, b); if (rc) @@ -391,6 +416,7 @@ int msm_v4l2_prepare_buf(struct file *filp, void *fh, unlock: inst_unlock(inst, __func__); + client_unlock(inst, __func__); put_inst(inst); return rc; @@ -439,6 +465,7 @@ int msm_v4l2_dqbuf(struct file *filp, void *fh, return -EINVAL; } + client_lock(inst, __func__); inst_lock(inst, __func__); rc = msm_vidc_dqbuf(inst, b); if (rc) @@ -446,6 +473,7 @@ int msm_v4l2_dqbuf(struct file *filp, void *fh, unlock: inst_unlock(inst, __func__); + client_unlock(inst, __func__); put_inst(inst); return rc; @@ -508,6 +536,7 @@ int msm_v4l2_subscribe_event(struct v4l2_fh *fh, return -EINVAL; } + client_lock(inst, __func__); inst_lock(inst, __func__); if (is_session_error(inst)) { i_vpr_e(inst, "%s: inst in error state\n", __func__); @@ -520,6 +549,7 @@ int msm_v4l2_subscribe_event(struct v4l2_fh *fh, unlock: inst_unlock(inst, __func__); + client_unlock(inst, __func__); put_inst(inst); return rc; @@ -538,6 +568,7 @@ int msm_v4l2_unsubscribe_event(struct v4l2_fh *fh, return -EINVAL; } + client_lock(inst, __func__); inst_lock(inst, __func__); rc = msm_vidc_unsubscribe_event((void *)inst, sub); if (rc) @@ -545,6 +576,7 @@ int msm_v4l2_unsubscribe_event(struct v4l2_fh *fh, unlock: inst_unlock(inst, __func__); + client_unlock(inst, __func__); put_inst(inst); return rc; @@ -562,6 +594,7 @@ int msm_v4l2_try_decoder_cmd(struct file *filp, void *fh, return -EINVAL; } + client_lock(inst, __func__); inst_lock(inst, __func__); if (is_session_error(inst)) { i_vpr_e(inst, "%s: inst in error state\n", __func__); @@ -574,6 +607,7 @@ int msm_v4l2_try_decoder_cmd(struct file *filp, void *fh, unlock: inst_unlock(inst, __func__); + client_unlock(inst, __func__); put_inst(inst); return rc; @@ -591,6 +625,7 @@ int msm_v4l2_decoder_cmd(struct file *filp, void *fh, return -EINVAL; } + client_lock(inst, __func__); inst_lock(inst, __func__); if (is_session_error(inst)) { i_vpr_e(inst, "%s: inst in error state\n", __func__); @@ -603,6 +638,7 @@ int msm_v4l2_decoder_cmd(struct file *filp, void *fh, unlock: inst_unlock(inst, __func__); + client_unlock(inst, __func__); put_inst(inst); return rc; @@ -620,6 +656,7 @@ int msm_v4l2_try_encoder_cmd(struct file *filp, void *fh, return -EINVAL; } + client_lock(inst, __func__); inst_lock(inst, __func__); if (is_session_error(inst)) { i_vpr_e(inst, "%s: inst in error state\n", __func__); @@ -632,6 +669,7 @@ int msm_v4l2_try_encoder_cmd(struct file *filp, void *fh, unlock: inst_unlock(inst, __func__); + client_unlock(inst, __func__); put_inst(inst); return rc; @@ -649,6 +687,7 @@ int msm_v4l2_encoder_cmd(struct file *filp, void *fh, return -EINVAL; } + client_lock(inst, __func__); inst_lock(inst, __func__); if (is_session_error(inst)) { i_vpr_e(inst, "%s: inst in error state\n", __func__); @@ -661,6 +700,7 @@ int msm_v4l2_encoder_cmd(struct file *filp, void *fh, unlock: inst_unlock(inst, __func__); + client_unlock(inst, __func__); put_inst(inst); return rc; @@ -678,6 +718,7 @@ int msm_v4l2_enum_framesizes(struct file *filp, void *fh, return -EINVAL; } + client_lock(inst, __func__); inst_lock(inst, __func__); rc = msm_vidc_enum_framesizes((void *)inst, fsize); if (rc) @@ -685,6 +726,7 @@ int msm_v4l2_enum_framesizes(struct file *filp, void *fh, unlock: inst_unlock(inst, __func__); + client_unlock(inst, __func__); put_inst(inst); return rc; @@ -702,6 +744,7 @@ int msm_v4l2_enum_frameintervals(struct file *filp, void *fh, return -EINVAL; } + client_lock(inst, __func__); inst_lock(inst, __func__); rc = msm_vidc_enum_frameintervals((void *)inst, fival); if (rc) @@ -709,6 +752,7 @@ int msm_v4l2_enum_frameintervals(struct file *filp, void *fh, unlock: inst_unlock(inst, __func__); + client_unlock(inst, __func__); put_inst(inst); return rc; @@ -726,6 +770,7 @@ int msm_v4l2_queryctrl(struct file *filp, void *fh, return -EINVAL; } + client_lock(inst, __func__); inst_lock(inst, __func__); rc = msm_vidc_query_ctrl((void *)inst, ctrl); if (rc) @@ -733,6 +778,7 @@ int msm_v4l2_queryctrl(struct file *filp, void *fh, unlock: inst_unlock(inst, __func__); + client_unlock(inst, __func__); put_inst(inst); return rc; @@ -750,6 +796,7 @@ int msm_v4l2_querymenu(struct file *filp, void *fh, return -EINVAL; } + client_lock(inst, __func__); inst_lock(inst, __func__); rc = msm_vidc_query_menu((void *)inst, qmenu); if (rc) @@ -757,6 +804,7 @@ int msm_v4l2_querymenu(struct file *filp, void *fh, unlock: inst_unlock(inst, __func__); + client_unlock(inst, __func__); put_inst(inst); return rc; diff --git a/driver/vidc/src/msm_vidc_vb2.c b/driver/vidc/src/msm_vidc_vb2.c index e3d6ddb980..5aeef1b791 100644 --- a/driver/vidc/src/msm_vidc_vb2.c +++ b/driver/vidc/src/msm_vidc_vb2.c @@ -204,6 +204,7 @@ int msm_vidc_start_streaming(struct vb2_queue *q, unsigned int count) return -EINVAL; } + client_lock(inst, __func__); inst_lock(inst, __func__); if (is_session_error(inst)) { i_vpr_e(inst, "%s: inst in error state\n", __func__); @@ -337,6 +338,7 @@ unlock: msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); } inst_unlock(inst, __func__); + client_unlock(inst, __func__); put_inst(inst); return rc; } @@ -358,6 +360,7 @@ void msm_vidc_stop_streaming(struct vb2_queue *q) return; } + client_lock(inst, __func__); inst_lock(inst, __func__); if (q->type == INPUT_META_PLANE || q->type == OUTPUT_META_PLANE) { i_vpr_h(inst, "%s: nothing to stop on %s\n", @@ -420,6 +423,7 @@ unlock: msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); } inst_unlock(inst, __func__); + client_unlock(inst, __func__); put_inst(inst); return; } @@ -443,6 +447,7 @@ void msm_vidc_buf_queue(struct vb2_buffer *vb2) return; } + client_lock(inst, __func__); inst_lock(inst, __func__); if (is_session_error(inst)) { i_vpr_e(inst, "%s: inst in error state\n", __func__); @@ -525,6 +530,7 @@ unlock: vb2_buffer_done(vb2, VB2_BUF_STATE_ERROR); } inst_unlock(inst, __func__); + client_unlock(inst, __func__); put_inst(inst); } From 13d203ba7fc4ce58bf5bb625d36e8533a9cad17d Mon Sep 17 00:00:00 2001 From: Deepa Guthyappa Madivalara Date: Fri, 20 May 2022 14:12:23 -0700 Subject: [PATCH 0632/1061] video: driver: Use vzalloc instead of kzalloc kzalloc might fail to allocate physically contiguous memory which may not be available always and hence use vzalloc to allocate virtually contiguous memory Change-Id: I8ad89ef107da301217f3d1ec307b9b27b4edd2de Signed-off-by: Deepa Guthyappa Madivalara --- .../platform/common/src/msm_vidc_platform.c | 9 +- driver/vidc/inc/msm_vidc_memory.h | 3 +- driver/vidc/src/msm_vidc.c | 17 ++-- driver/vidc/src/msm_vidc_control.c | 38 ++++--- driver/vidc/src/msm_vidc_debug.c | 27 +++-- driver/vidc/src/msm_vidc_driver.c | 98 ++++++++----------- driver/vidc/src/msm_vidc_dt.c | 20 ++-- driver/vidc/src/msm_vidc_fence.c | 10 +- driver/vidc/src/msm_vidc_memory.c | 36 +++++-- driver/vidc/src/msm_vidc_probe.c | 38 ++++--- driver/vidc/src/venus_hfi.c | 8 +- driver/vidc/src/venus_hfi_response.c | 14 ++- 12 files changed, 154 insertions(+), 164 deletions(-) diff --git a/driver/platform/common/src/msm_vidc_platform.c b/driver/platform/common/src/msm_vidc_platform.c index 651f1aaa61..3d7f4e92ba 100644 --- a/driver/platform/common/src/msm_vidc_platform.c +++ b/driver/platform/common/src/msm_vidc_platform.c @@ -342,7 +342,7 @@ int msm_vidc_deinit_platform(struct platform_device *pdev) msm_vidc_deinit_vpu(core, &pdev->dev); msm_vidc_deinit_platform_variant(core, &pdev->dev); - kfree(core->platform); + msm_vidc_vmem_free((void **)&core->platform); return 0; } @@ -366,9 +366,10 @@ int msm_vidc_init_platform(struct platform_device *pdev) return -EINVAL; } - platform = kzalloc(sizeof(struct msm_vidc_platform), GFP_KERNEL); - if (!platform) - return -ENOMEM; + rc = msm_vidc_vmem_alloc(sizeof(struct msm_vidc_platform), + (void **)&platform, __func__); + if (rc) + return rc; core->platform = platform; platform->core = core; diff --git a/driver/vidc/inc/msm_vidc_memory.h b/driver/vidc/inc/msm_vidc_memory.h index 88bd991638..cbaca724b4 100644 --- a/driver/vidc/inc/msm_vidc_memory.h +++ b/driver/vidc/inc/msm_vidc_memory.h @@ -63,5 +63,6 @@ void msm_memory_pools_deinit(struct msm_vidc_inst *inst); void *msm_memory_pool_alloc(struct msm_vidc_inst *inst, enum msm_memory_pool_type type); void msm_memory_pool_free(struct msm_vidc_inst *inst, void *vidc_buf); - +int msm_vidc_vmem_alloc(unsigned long size, void **mem, const char *msg); +void msm_vidc_vmem_free(void **addr); #endif // _MSM_VIDC_MEMORY_H_ \ No newline at end of file diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index 262515f4d1..a01d5d28bf 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -881,11 +881,10 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) if (rc) return NULL; - inst = kzalloc(sizeof(*inst), GFP_KERNEL); - if (!inst) { - d_vpr_e("%s: failed to allocate inst memory\n", __func__); + rc = msm_vidc_vmem_alloc(sizeof(*inst), (void **)&inst, "inst memory"); + if (rc) return NULL; - } + inst->core = core; inst->domain = session_type; inst->session_id = hash32_ptr(inst); @@ -905,7 +904,7 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) rc = msm_memory_pools_init(inst); if (rc) { i_vpr_e(inst, "%s: failed to init pool buffers\n", __func__); - kfree(inst); + msm_vidc_vmem_free((void **)&inst); return NULL; } INIT_LIST_HEAD(&inst->response_works); @@ -969,12 +968,10 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) INIT_DELAYED_WORK(&inst->stats_work, msm_vidc_stats_handler); INIT_WORK(&inst->stability_work, msm_vidc_stability_handler); - inst->capabilities = kzalloc(sizeof(struct msm_vidc_inst_capability), GFP_KERNEL); - if (!inst->capabilities) { - i_vpr_e(inst, - "%s: inst capability allocation failed\n", __func__); + rc = msm_vidc_vmem_alloc(sizeof(struct msm_vidc_inst_capability), + (void **)&inst->capabilities, "inst capability"); + if (rc) goto error; - } rc = msm_vidc_event_queue_init(inst); if (rc) diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 8e5a75167a..ba216e7eea 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -254,19 +254,19 @@ static inline bool is_all_parents_visited( static int add_node_list(struct list_head *list, enum msm_vidc_inst_capability_type cap_id) { + int rc = 0; struct msm_vidc_inst_cap_entry *entry; - entry = kzalloc(sizeof(struct msm_vidc_inst_cap_entry), GFP_KERNEL); - if (!entry) { - d_vpr_e("%s: msm_vidc_inst_cap_entry alloc failed\n", __func__); - return -EINVAL; - } + rc = msm_vidc_vmem_alloc(sizeof(struct msm_vidc_inst_cap_entry), + (void **)&entry, __func__); + if (rc) + return rc; INIT_LIST_HEAD(&entry->list); entry->cap_id = cap_id; list_add_tail(&entry->list, list); - return 0; + return rc; } static int add_node( @@ -696,7 +696,7 @@ static int msm_vidc_adjust_dynamic_property(struct msm_vidc_inst *inst, } list_del_init(&entry->list); - kfree(entry); + msm_vidc_vmem_free((void **)&entry); } /* expecting children_list to be empty */ @@ -711,12 +711,12 @@ error: list_for_each_entry_safe(entry, temp, &inst->children_list, list) { i_vpr_e(inst, "%s: child list: %s\n", __func__, cap_name(entry->cap_id)); list_del_init(&entry->list); - kfree(entry); + msm_vidc_vmem_free((void **)&entry); } list_for_each_entry_safe(entry, temp, &inst->firmware_list, list) { i_vpr_e(inst, "%s: fw list: %s\n", __func__, cap_name(entry->cap_id)); list_del_init(&entry->list); - kfree(entry); + msm_vidc_vmem_free((void **)&entry); } return rc; @@ -739,7 +739,7 @@ static int msm_vidc_set_dynamic_property(struct msm_vidc_inst *inst) goto error; list_del_init(&entry->list); - kfree(entry); + msm_vidc_vmem_free((void **)&entry); } return 0; @@ -747,7 +747,7 @@ error: list_for_each_entry_safe(entry, temp, &inst->firmware_list, list) { i_vpr_e(inst, "%s: fw list: %s\n", __func__, cap_name(entry->cap_id)); list_del_init(&entry->list); - kfree(entry); + msm_vidc_vmem_free((void **)&entry); } return rc; @@ -771,7 +771,7 @@ int msm_vidc_ctrl_deinit(struct msm_vidc_inst *inst) i_vpr_h(inst, "%s(): num ctrls %d\n", __func__, inst->num_ctrls); v4l2_ctrl_handler_free(&inst->ctrl_handler); memset(&inst->ctrl_handler, 0, sizeof(struct v4l2_ctrl_handler)); - kfree(inst->ctrls); + msm_vidc_vmem_free((void **)&inst->ctrls); inst->ctrls = NULL; return 0; @@ -807,12 +807,10 @@ int msm_vidc_ctrl_init(struct msm_vidc_inst *inst) __func__); return -EINVAL; } - inst->ctrls = kcalloc(num_ctrls, - sizeof(struct v4l2_ctrl *), GFP_KERNEL); - if (!inst->ctrls) { - i_vpr_e(inst, "%s: failed to allocate ctrl\n", __func__); - return -ENOMEM; - } + rc = msm_vidc_vmem_alloc(num_ctrls * sizeof(struct v4l2_ctrl *), + (void **)&inst->ctrls, __func__); + if (rc) + return rc; rc = v4l2_ctrl_handler_init(&inst->ctrl_handler, num_ctrls); if (rc) { @@ -3165,12 +3163,12 @@ error: list_for_each_entry_safe(entry, temp, &opt_list, list) { i_vpr_e(inst, "%s: opt_list: %s\n", __func__, cap_name(entry->cap_id)); list_del_init(&entry->list); - kfree(entry); + msm_vidc_vmem_free((void **)&entry); } list_for_each_entry_safe(entry, temp, &root_list, list) { i_vpr_e(inst, "%s: root_list: %s\n", __func__, cap_name(entry->cap_id)); list_del_init(&entry->list); - kfree(entry); + msm_vidc_vmem_free((void **)&entry); } return rc; } diff --git a/driver/vidc/src/msm_vidc_debug.c b/driver/vidc/src/msm_vidc_debug.c index ac29f02821..c400af67bb 100644 --- a/driver/vidc/src/msm_vidc_debug.c +++ b/driver/vidc/src/msm_vidc_debug.c @@ -167,17 +167,17 @@ static ssize_t core_info_read(struct file* file, char __user* buf, struct msm_vidc_core *core = file->private_data; char* dbuf, * cur, * end; ssize_t len = 0; + int rc = 0; if (!core || !core->dt) { d_vpr_e("%s: invalid params %pK\n", __func__, core); return 0; } - dbuf = kzalloc(MAX_DBG_BUF_SIZE, GFP_KERNEL); - if (!dbuf) { - d_vpr_e("%s: Allocation failed!\n", __func__); - return -ENOMEM; - } + rc = msm_vidc_vmem_alloc(MAX_DBG_BUF_SIZE, (void **)&dbuf, __func__); + if (rc) + return rc; + cur = dbuf; end = cur + MAX_DBG_BUF_SIZE; @@ -194,7 +194,7 @@ static ssize_t core_info_read(struct file* file, char __user* buf, len = simple_read_from_buffer(buf, count, ppos, dbuf, cur - dbuf); - kfree(dbuf); + msm_vidc_vmem_free((void **)&dbuf); return len; } @@ -452,9 +452,7 @@ static ssize_t inst_info_read(struct file *file, char __user *buf, return 0; } - dbuf = kzalloc(MAX_DBG_BUF_SIZE, GFP_KERNEL); - if (!dbuf) { - i_vpr_e(inst, "%s: Allocation failed!\n", __func__); + if (msm_vidc_vmem_alloc(MAX_DBG_BUF_SIZE, (void **) &dbuf, __func__)) { len = -ENOMEM; goto failed_alloc; } @@ -510,7 +508,7 @@ static ssize_t inst_info_read(struct file *file, char __user *buf, len = simple_read_from_buffer(buf, count, ppos, dbuf, cur - dbuf); - kfree(dbuf); + msm_vidc_vmem_free((void **)&dbuf); failed_alloc: put_inst(inst); return len; @@ -542,11 +540,8 @@ struct dentry *msm_vidc_debugfs_init_inst(void *instance, struct dentry *parent) } snprintf(debugfs_name, MAX_DEBUGFS_NAME, "inst_%d", inst->session_id); - idata = kzalloc(sizeof(struct core_inst_pair), GFP_KERNEL); - if (!idata) { - i_vpr_e(inst, "%s: Allocation failed!\n", __func__); + if (msm_vidc_vmem_alloc(sizeof(struct core_inst_pair), (void **)&idata, __func__)) goto exit; - } idata->core = inst->core; idata->inst = inst; @@ -576,7 +571,7 @@ failed_create_file: debugfs_remove_recursive(dir); dir = NULL; failed_create_dir: - kfree(idata); + msm_vidc_vmem_free((void **)&idata); exit: return dir; } @@ -593,7 +588,7 @@ void msm_vidc_debugfs_deinit_inst(void *instance) if (dentry->d_inode) { i_vpr_l(inst, "%s: Destroy %pK\n", __func__, dentry->d_inode->i_private); - kfree(dentry->d_inode->i_private); + msm_vidc_vmem_free(&dentry->d_inode->i_private); dentry->d_inode->i_private = NULL; } debugfs_remove_recursive(dentry); diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 277d663fe6..08166e67f0 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -1767,8 +1767,8 @@ static int msm_vidc_flush_pending_last_flag(struct msm_vidc_inst *inst) return rc; } list_del(&resp_work->list); - kfree(resp_work->data); - kfree(resp_work); + msm_vidc_vmem_free((void **)&resp_work->data); + msm_vidc_vmem_free((void **)&resp_work); } } @@ -1794,8 +1794,8 @@ static int msm_vidc_discard_pending_opsc(struct msm_vidc_inst *inst) i_vpr_h(inst, "%s: discard pending output psc\n", __func__); list_del(&resp_work->list); - kfree(resp_work->data); - kfree(resp_work); + msm_vidc_vmem_free((void **)&resp_work->data); + msm_vidc_vmem_free((void **)&resp_work); } } @@ -1825,8 +1825,8 @@ static int msm_vidc_discard_pending_ipsc(struct msm_vidc_inst *inst) inst->ipsc_properties_set = false; list_del(&resp_work->list); - kfree(resp_work->data); - kfree(resp_work); + msm_vidc_vmem_free((void **)&resp_work->data); + msm_vidc_vmem_free((void **)&resp_work); } } @@ -1863,8 +1863,8 @@ static int msm_vidc_process_pending_ipsc(struct msm_vidc_inst *inst, } } list_del(&resp_work->list); - kfree(resp_work->data); - kfree(resp_work); + msm_vidc_vmem_free((void **)&resp_work->data); + msm_vidc_vmem_free((void **)&resp_work); /* list contains max only one ipsc at anytime */ break; } @@ -3236,11 +3236,9 @@ static void msm_vidc_update_input_cr(struct msm_vidc_inst *inst, u32 idx, u32 cr } } if (!found) { - temp = kzalloc(sizeof(*temp), GFP_KERNEL); - if (!temp) { - i_vpr_e(inst, "%s: malloc failure.\n", __func__); + if (msm_vidc_vmem_alloc(sizeof(*temp), (void **)&temp, __func__)) return; - } + temp->index = idx; temp->input_cr = cr; list_add_tail(&temp->list, &inst->enc_input_crs); @@ -3253,7 +3251,7 @@ static void msm_vidc_free_input_cr_list(struct msm_vidc_inst *inst) list_for_each_entry_safe(temp, next, &inst->enc_input_crs, list) { list_del(&temp->list); - kfree(temp); + msm_vidc_vmem_free((void **)&temp); } INIT_LIST_HEAD(&inst->enc_input_crs); } @@ -4112,22 +4110,20 @@ int msm_vidc_vb2_queue_init(struct msm_vidc_inst *inst) } inst->event_handler.m2m_ctx = inst->m2m_ctx; - inst->bufq[INPUT_META_PORT].vb2q = kzalloc(sizeof(struct vb2_queue), GFP_KERNEL); - if (!inst->bufq[INPUT_META_PORT].vb2q) { - i_vpr_e(inst, "%s: queue allocation failed for input meta port\n", __func__); + rc = msm_vidc_vmem_alloc(sizeof(struct vb2_queue), + (void **)&inst->bufq[INPUT_META_PORT].vb2q, "input meta port"); + if (rc) goto fail_in_meta_alloc; - } /* do input meta port queues initialization */ rc = vb2q_init(inst, inst->bufq[INPUT_META_PORT].vb2q, INPUT_META_PLANE); if (rc) goto fail_in_meta_vb2q_init; - inst->bufq[OUTPUT_META_PORT].vb2q = kzalloc(sizeof(struct vb2_queue), GFP_KERNEL); - if (!inst->bufq[OUTPUT_META_PORT].vb2q) { - i_vpr_e(inst, "%s: queue allocation failed for output meta port\n", __func__); + rc = msm_vidc_vmem_alloc(sizeof(struct vb2_queue), + (void **)&inst->bufq[OUTPUT_META_PORT].vb2q, "output meta port"); + if (rc) goto fail_out_meta_alloc; - } /* do output meta port queues initialization */ rc = vb2q_init(inst, inst->bufq[OUTPUT_META_PORT].vb2q, OUTPUT_META_PLANE); @@ -4138,12 +4134,12 @@ int msm_vidc_vb2_queue_init(struct msm_vidc_inst *inst) return 0; fail_out_meta_vb2q_init: - kfree(inst->bufq[OUTPUT_META_PORT].vb2q); + msm_vidc_vmem_free((void **)&inst->bufq[OUTPUT_META_PORT].vb2q); inst->bufq[OUTPUT_META_PORT].vb2q = NULL; fail_out_meta_alloc: vb2_queue_release(inst->bufq[INPUT_META_PORT].vb2q); fail_in_meta_vb2q_init: - kfree(inst->bufq[INPUT_META_PORT].vb2q); + msm_vidc_vmem_free((void **)&inst->bufq[INPUT_META_PORT].vb2q); inst->bufq[INPUT_META_PORT].vb2q = NULL; fail_in_meta_alloc: v4l2_m2m_ctx_release(inst->m2m_ctx); @@ -4169,10 +4165,10 @@ int msm_vidc_vb2_queue_deinit(struct msm_vidc_inst *inst) } vb2_queue_release(inst->bufq[OUTPUT_META_PORT].vb2q); - kfree(inst->bufq[OUTPUT_META_PORT].vb2q); + msm_vidc_vmem_free((void **)&inst->bufq[OUTPUT_META_PORT].vb2q); inst->bufq[OUTPUT_META_PORT].vb2q = NULL; vb2_queue_release(inst->bufq[INPUT_META_PORT].vb2q); - kfree(inst->bufq[INPUT_META_PORT].vb2q); + msm_vidc_vmem_free((void **)&inst->bufq[INPUT_META_PORT].vb2q); inst->bufq[INPUT_META_PORT].vb2q = NULL; /* * vb2_queue_release() for input and output queues @@ -4296,11 +4292,9 @@ int msm_vidc_session_open(struct msm_vidc_inst *inst) } inst->packet_size = 4096; - inst->packet = kzalloc(inst->packet_size, GFP_KERNEL); - if (!inst->packet) { - i_vpr_e(inst, "%s(): inst packet allocation failed\n", __func__); - return -ENOMEM; - } + rc = msm_vidc_vmem_alloc(inst->packet_size, (void **)&inst->packet, __func__); + if (rc) + return rc; rc = venus_hfi_session_open(inst); if (rc) @@ -4309,7 +4303,7 @@ int msm_vidc_session_open(struct msm_vidc_inst *inst) return 0; error: i_vpr_e(inst, "%s(): session open failed\n", __func__); - kfree(inst->packet); + msm_vidc_vmem_free((void **)&inst->packet); inst->packet = NULL; return rc; } @@ -4494,7 +4488,7 @@ int msm_vidc_session_close(struct msm_vidc_inst *inst) /* we are not supposed to send any more commands after close */ i_vpr_h(inst, "%s: free session packet data\n", __func__); - kfree(inst->packet); + msm_vidc_vmem_free((void **)&inst->packet); inst->packet = NULL; core = inst->core; @@ -4573,7 +4567,7 @@ int msm_vidc_deinit_core_caps(struct msm_vidc_core *core) return -EINVAL; } - kfree(core->capabilities); + msm_vidc_vmem_free((void **)&core->capabilities); core->capabilities = NULL; d_vpr_h("%s: Core capabilities freed\n", __func__); @@ -4600,15 +4594,10 @@ int msm_vidc_init_core_caps(struct msm_vidc_core *core) goto exit; } - core->capabilities = kcalloc(1, - (sizeof(struct msm_vidc_core_capability) * - (CORE_CAP_MAX + 1)), GFP_KERNEL); - if (!core->capabilities) { - d_vpr_e("%s: failed to allocate core capabilities\n", - __func__); - rc = -ENOMEM; + rc = msm_vidc_vmem_alloc((sizeof(struct msm_vidc_core_capability) * + (CORE_CAP_MAX + 1)), (void **)&core->capabilities, __func__); + if (rc) goto exit; - } num_platform_caps = core->platform->data.core_data_size; @@ -4677,7 +4666,7 @@ int msm_vidc_deinit_instance_caps(struct msm_vidc_core *core) return -EINVAL; } - kfree(core->inst_caps); + msm_vidc_vmem_free((void **)&core->inst_caps); core->inst_caps = NULL; d_vpr_h("%s: core->inst_caps freed\n", __func__); @@ -4727,15 +4716,10 @@ int msm_vidc_init_instance_caps(struct msm_vidc_core *core) COUNT_BITS(count_bits, codecs_count); core->codecs_count = codecs_count; - core->inst_caps = kcalloc(codecs_count, - sizeof(struct msm_vidc_inst_capability), - GFP_KERNEL); - if (!core->inst_caps) { - d_vpr_e("%s: failed to allocate core capabilities\n", - __func__); - rc = -ENOMEM; + rc = msm_vidc_vmem_alloc(codecs_count * sizeof(struct msm_vidc_inst_capability), + (void **)&core->inst_caps, __func__); + if (rc) goto error; - } check_bit = 0; /* determine codecs for enc domain */ @@ -5572,25 +5556,25 @@ void msm_vidc_destroy_buffers(struct msm_vidc_inst *inst) list_for_each_entry_safe(work, dummy_work, &inst->response_works, list) { list_del(&work->list); - kfree(work->data); - kfree(work); + msm_vidc_vmem_free((void **)&work->data); + msm_vidc_vmem_free((void **)&work); } list_for_each_entry_safe(entry, dummy_entry, &inst->firmware_list, list) { i_vpr_e(inst, "%s: fw list: %s\n", __func__, cap_name(entry->cap_id)); list_del(&entry->list); - kfree(entry); + msm_vidc_vmem_free((void **)&entry); } list_for_each_entry_safe(entry, dummy_entry, &inst->children_list, list) { i_vpr_e(inst, "%s: child list: %s\n", __func__, cap_name(entry->cap_id)); list_del(&entry->list); - kfree(entry); + msm_vidc_vmem_free((void **)&entry); } list_for_each_entry_safe(entry, dummy_entry, &inst->caps_list, list) { list_del(&entry->list); - kfree(entry); + msm_vidc_vmem_free((void **)&entry); } list_for_each_entry_safe(fence, dummy_fence, &inst->fence_list, list) { @@ -5622,8 +5606,8 @@ static void msm_vidc_close_helper(struct kref *kref) msm_vidc_remove_dangling_session(inst); mutex_destroy(&inst->request_lock); mutex_destroy(&inst->lock); - kfree(inst->capabilities); - kfree(inst); + msm_vidc_vmem_free((void **)&inst->capabilities); + msm_vidc_vmem_free((void **)&inst); } struct msm_vidc_inst *get_inst_ref(struct msm_vidc_core *core, diff --git a/driver/vidc/src/msm_vidc_dt.c b/driver/vidc/src/msm_vidc_dt.c index 0d66ebcc34..c72036b2bb 100644 --- a/driver/vidc/src/msm_vidc_dt.c +++ b/driver/vidc/src/msm_vidc_dt.c @@ -344,11 +344,10 @@ static int msm_vidc_load_bus_table(struct msm_vidc_core *core) buses->count = num_buses; d_vpr_h("Found %d bus interconnects\n", num_buses); - bus_ranges = kzalloc(2 * num_buses * sizeof(*bus_ranges), GFP_KERNEL); - if (!bus_ranges) { - d_vpr_e("No memory to read bus ranges\n"); - return -ENOMEM; - } + rc = msm_vidc_vmem_alloc(2 * num_buses * sizeof(*bus_ranges), + (void **)&bus_ranges, " for bus ranges"); + if (rc) + return rc; rc = of_property_read_u32_array(pdev->dev.of_node, "qcom,bus-range-kbps", bus_ranges, @@ -385,7 +384,7 @@ static int msm_vidc_load_bus_table(struct msm_vidc_core *core) } exit: - kfree(bus_ranges); + msm_vidc_vmem_free((void **) &bus_ranges); return rc; } @@ -942,12 +941,13 @@ void msm_vidc_deinit_dt(struct platform_device *pdev) msm_vidc_free_qdss_addr_table(core->dt); msm_vidc_free_bus_table(core->dt); msm_vidc_free_buffer_usage_table(core->dt); + msm_vidc_vmem_free((void **)&core->dt); } int msm_vidc_init_dt(struct platform_device *pdev) { int rc = 0; - struct msm_vidc_dt *dt; + struct msm_vidc_dt *dt = NULL; struct msm_vidc_core *core; if (!pdev) { @@ -962,9 +962,9 @@ int msm_vidc_init_dt(struct platform_device *pdev) return -EINVAL; } - dt = kzalloc(sizeof(struct msm_vidc_dt), GFP_KERNEL); - if (!dt) - return -ENOMEM; + rc = msm_vidc_vmem_alloc(sizeof(struct msm_vidc_dt), (void **)&dt, __func__); + if (rc) + return rc; core->dt = dt; dt->core = core; diff --git a/driver/vidc/src/msm_vidc_fence.c b/driver/vidc/src/msm_vidc_fence.c index 91c2c6b801..853f214643 100644 --- a/driver/vidc/src/msm_vidc_fence.c +++ b/driver/vidc/src/msm_vidc_fence.c @@ -38,7 +38,7 @@ static void msm_vidc_dma_fence_release(struct dma_fence *df) if (df) { fence = container_of(df, struct msm_vidc_fence, dma_fence); d_vpr_l("%s: name %s\n", __func__, fence->name); - kfree(fence); + msm_vidc_vmem_free((void **)&fence); } else { d_vpr_e("%s: invalid fence\n", __func__); } @@ -53,18 +53,16 @@ static const struct dma_fence_ops msm_vidc_dma_fence_ops = { struct msm_vidc_fence *msm_vidc_fence_create(struct msm_vidc_inst *inst) { struct msm_vidc_fence *fence; + int rc = 0; if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return NULL; } - fence = kzalloc(sizeof(*fence), GFP_KERNEL); - if (!fence) { - i_vpr_e(inst, "%s: failed to allocate memory for fence\n", - __func__); + rc = msm_vidc_vmem_alloc(sizeof(*fence), (void **)&fence, __func__); + if (rc) return NULL; - } fence->fd = INVALID_FD; dma_fence_init(&fence->dma_fence, &msm_vidc_dma_fence_ops, diff --git a/driver/vidc/src/msm_vidc_memory.c b/driver/vidc/src/msm_vidc_memory.c index 1314d3208c..e1fd2941e4 100644 --- a/driver/vidc/src/msm_vidc_memory.c +++ b/driver/vidc/src/msm_vidc_memory.c @@ -314,6 +314,31 @@ exit: return rc; } +int msm_vidc_vmem_alloc(unsigned long size, void **mem, const char *msg) +{ + int rc = 0; + if (*mem) { + d_vpr_e("%s: error: double alloc\n", msg); + rc = -EINVAL; + } + + *mem = vzalloc(size); + if (!*mem) { + d_vpr_e("allocation failed for %s\n", msg); + rc = -ENOMEM; + } + + return rc; +} + +void msm_vidc_vmem_free(void **addr) +{ + if (addr && *addr) { + vfree(*addr); + *addr = NULL; + } +} + int msm_vidc_memory_alloc(struct msm_vidc_core *core, struct msm_vidc_alloc *mem) { int rc = 0; @@ -475,11 +500,10 @@ void *msm_memory_pool_alloc(struct msm_vidc_inst *inst, enum msm_memory_pool_typ return hdr->buf; } - hdr = kzalloc(pool->size + sizeof(struct msm_memory_alloc_header), GFP_KERNEL); - if (!hdr) { - i_vpr_e(inst, "%s: buffer allocation failed\n", __func__); + if (msm_vidc_vmem_alloc(pool->size + sizeof(struct msm_memory_alloc_header), + (void **)&hdr, __func__)) return NULL; - } + INIT_LIST_HEAD(&hdr->list); hdr->type = type; hdr->busy = true; @@ -549,14 +573,14 @@ static void msm_vidc_destroy_pool_buffers(struct msm_vidc_inst *inst, /* destroy all free buffers */ list_for_each_entry_safe(hdr, dummy, &pool->free_pool, list) { list_del(&hdr->list); - kfree(hdr); + msm_vidc_vmem_free((void **)&hdr); fcount++; } /* destroy all busy buffers */ list_for_each_entry_safe(hdr, dummy, &pool->busy_pool, list) { list_del(&hdr->list); - kfree(hdr); + msm_vidc_vmem_free((void **)&hdr); bcount++; } diff --git a/driver/vidc/src/msm_vidc_probe.c b/driver/vidc/src/msm_vidc_probe.c index e958c37d8f..08b4303f64 100644 --- a/driver/vidc/src/msm_vidc_probe.c +++ b/driver/vidc/src/msm_vidc_probe.c @@ -16,6 +16,7 @@ #include "msm_vidc_dt.h" #include "msm_vidc_platform.h" #include "msm_vidc_core.h" +#include "msm_vidc_memory.h" #include "venus_hfi.h" #include "video_generated_h" @@ -262,8 +263,8 @@ static int msm_vidc_deinitialize_core(struct msm_vidc_core *core) mutex_destroy(&core->lock); msm_vidc_change_core_state(core, MSM_VIDC_CORE_DEINIT, __func__); - kfree(core->response_packet); - kfree(core->packet); + msm_vidc_vmem_free((void **)&core->response_packet); + msm_vidc_vmem_free((void **)&core->packet); core->response_packet = NULL; core->packet = NULL; @@ -306,20 +307,15 @@ static int msm_vidc_initialize_core(struct msm_vidc_core *core) } core->packet_size = 4096; - core->packet = kzalloc(core->packet_size, GFP_KERNEL); - if (!core->packet) { - d_vpr_e("%s(): core packet allocation failed\n", __func__); - rc = -ENOMEM; + rc = msm_vidc_vmem_alloc(core->packet_size, + (void **)&core->packet, "core packet"); + if (rc) goto exit; - } - core->response_packet = kzalloc(core->packet_size, GFP_KERNEL); - if (!core->response_packet) { - d_vpr_e("%s(): core response packet allocation failed\n", - __func__); - rc = -ENOMEM; + rc = msm_vidc_vmem_alloc(core->packet_size, + (void **)&core->response_packet, "core response packet"); + if (rc) goto exit; - } mutex_init(&core->lock); INIT_LIST_HEAD(&core->instances); @@ -331,8 +327,8 @@ static int msm_vidc_initialize_core(struct msm_vidc_core *core) return 0; exit: - kfree(core->response_packet); - kfree(core->packet); + msm_vidc_vmem_free((void **)&core->response_packet); + msm_vidc_vmem_free((void **)&core->packet); core->response_packet = NULL; core->packet = NULL; if (core->batch_workq) @@ -396,7 +392,7 @@ static int msm_vidc_remove_video_device(struct platform_device *pdev) dev_set_drvdata(&pdev->dev, NULL); debugfs_remove_recursive(core->debugfs_parent); - kfree(core); + msm_vidc_vmem_free((void **)&core); g_core = NULL; return 0; @@ -432,14 +428,14 @@ static int msm_vidc_remove(struct platform_device *pdev) static int msm_vidc_probe_video_device(struct platform_device *pdev) { int rc = 0; - struct msm_vidc_core *core; + struct msm_vidc_core *core = NULL; int nr = BASE_DEVICE_NUMBER; d_vpr_h("%s()\n", __func__); - core = kzalloc(sizeof(*core), GFP_KERNEL); - if (!core) - return -ENOMEM; + rc = msm_vidc_vmem_alloc(sizeof(*core), (void **)&core, __func__); + if (rc) + return rc; g_core = core; core->debugfs_parent = msm_vidc_debugfs_init_drv(); @@ -589,7 +585,7 @@ init_dt_failed: init_core_failed: dev_set_drvdata(&pdev->dev, NULL); debugfs_remove_recursive(core->debugfs_parent); - kfree(core); + msm_vidc_vmem_free((void **)&core); g_core = NULL; return rc; diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index 551afdb0bc..e3f1f2b4ae 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -1110,11 +1110,9 @@ static void __flush_debug_queue(struct msm_vidc_core *core, } if (!packet || !packet_size) { - packet = kzalloc(VIDC_IFACEQ_VAR_HUGE_PKT_SIZE, GFP_KERNEL); - if (!packet) { - d_vpr_e("%s: fail to allocate\n", __func__); + if (msm_vidc_vmem_alloc(VIDC_IFACEQ_VAR_HUGE_PKT_SIZE, + (void **)&packet, __func__)) return; - } packet_size = VIDC_IFACEQ_VAR_HUGE_PKT_SIZE; local_packet = true; @@ -1153,7 +1151,7 @@ static void __flush_debug_queue(struct msm_vidc_core *core, } if (local_packet) - kfree(packet); + msm_vidc_vmem_free((void **)&packet); } static int __sys_set_debug(struct msm_vidc_core *core, u32 debug) diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index c483e63b3c..c818950239 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -1854,8 +1854,8 @@ void handle_session_response_work_handler(struct work_struct *work) break; } list_del(&resp_work->list); - kfree(resp_work->data); - kfree(resp_work); + msm_vidc_vmem_free((void **)&resp_work->data); + msm_vidc_vmem_free((void **)&resp_work); } inst_unlock(inst, __func__); @@ -1867,14 +1867,12 @@ static int queue_response_work(struct msm_vidc_inst *inst, { struct response_work *work; - work = kzalloc(sizeof(struct response_work), GFP_KERNEL); - if (!work) + if (msm_vidc_vmem_alloc(sizeof(struct response_work), (void **)&work, __func__)) return -ENOMEM; INIT_LIST_HEAD(&work->list); work->type = type; work->data_size = hdr_size; - work->data = kzalloc(hdr_size, GFP_KERNEL); - if (!work->data) + if (msm_vidc_vmem_alloc(hdr_size, (void **)&work->data, "Work data")) return -ENOMEM; memcpy(work->data, hdr, hdr_size); list_add_tail(&work->list, &inst->response_works); @@ -1895,8 +1893,8 @@ int cancel_response_work(struct msm_vidc_inst *inst) list_for_each_entry_safe(work, dummy_work, &inst->response_works, list) { list_del(&work->list); - kfree(work->data); - kfree(work); + msm_vidc_vmem_free((void **)&work->data); + msm_vidc_vmem_free((void **)&work); } return 0; From 93742170e92e2f14c39e8956f8b237f82392dd1a Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Thu, 26 May 2022 15:24:34 -0700 Subject: [PATCH 0633/1061] video: driver: fix incorrect crop resolution Store unaligned resolution in driver inst formats to avoid crop resolution getting updated to aligned resolution whenever client did g_fmt and s_fmt again after setting raw input resolution. Change-Id: Ic2b6cf6e7d418d2bf0c35270199b914648e933d4 Signed-off-by: Akshata Sahukar --- driver/vidc/src/msm_venc.c | 7 ++----- driver/vidc/src/msm_vidc_buffer.c | 20 ++++++++++++++++---- driver/vidc/src/msm_vidc_driver.c | 10 ---------- 3 files changed, 18 insertions(+), 19 deletions(-) diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index cca35e1b12..5eea5f42e3 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -1227,11 +1227,8 @@ static int msm_venc_s_fmt_input(struct msm_vidc_inst *inst, struct v4l2_format * height = f->fmt.pix_mp.height; if (is_image_session(inst)) { - width = ALIGN(f->fmt.pix_mp.width, HEIC_GRID_DIMENSION); - height = ALIGN(f->fmt.pix_mp.height, HEIC_GRID_DIMENSION); - inst->crop.width = ALIGN(inst->crop.width, HEIC_GRID_DIMENSION); - inst->crop.height = ALIGN(inst->crop.height, HEIC_GRID_DIMENSION); - bytesperline = width * (is_10bit_colorformat(pix_fmt) ? 2 : 1); + bytesperline = ALIGN(f->fmt.pix_mp.width, HEIC_GRID_DIMENSION) * + (is_10bit_colorformat(pix_fmt) ? 2 : 1); } else if (is_rgba_colorformat(pix_fmt)) { bytesperline = VIDEO_RGB_STRIDE_BYTES(f->fmt.pix_mp.pixelformat, f->fmt.pix_mp.width); diff --git a/driver/vidc/src/msm_vidc_buffer.c b/driver/vidc/src/msm_vidc_buffer.c index eb48912ef4..57300f3466 100644 --- a/driver/vidc/src/msm_vidc_buffer.c +++ b/driver/vidc/src/msm_vidc_buffer.c @@ -294,11 +294,17 @@ u32 msm_vidc_encoder_input_size(struct msm_vidc_inst *inst) { u32 size; struct v4l2_format *f; + u32 width, height; f = &inst->fmts[INPUT_PORT]; + width = f->fmt.pix_mp.width; + height = f->fmt.pix_mp.height; + if (is_image_session(inst)) { + width = ALIGN(width, HEIC_GRID_DIMENSION); + height = ALIGN(height, HEIC_GRID_DIMENSION); + } size = VIDEO_RAW_BUFFER_SIZE(f->fmt.pix_mp.pixelformat, - f->fmt.pix_mp.width, - f->fmt.pix_mp.height, true); + width, height, true); return size; } @@ -415,6 +421,7 @@ u32 msm_vidc_encoder_input_meta_size(struct msm_vidc_inst *inst) u32 size = 0; u32 lcu_size = 0; struct v4l2_format *f; + u32 width, height; if (!inst || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); @@ -434,8 +441,13 @@ u32 msm_vidc_encoder_input_meta_size(struct msm_vidc_inst *inst) lcu_size = 32; f = &inst->fmts[INPUT_PORT]; - size += ROI_METADATA_SIZE(f->fmt.pix_mp.width, - f->fmt.pix_mp.height, lcu_size); + width = f->fmt.pix_mp.width; + height = f->fmt.pix_mp.height; + if (is_image_session(inst)) { + width = ALIGN(width, HEIC_GRID_DIMENSION); + height = ALIGN(height, HEIC_GRID_DIMENSION); + } + size += ROI_METADATA_SIZE(width, height, lcu_size); size = ALIGN(size, SZ_4K); } return size; diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index b1d82e78b6..dd8256ec4b 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -6194,16 +6194,6 @@ static bool msm_vidc_allow_image_encode_session(struct msm_vidc_inst *inst) goto exit; } - /* is input grid aligned */ - fmt = &inst->fmts[INPUT_PORT]; - allow = IS_ALIGNED(fmt->fmt.pix_mp.width, HEIC_GRID_DIMENSION); - allow &= IS_ALIGNED(fmt->fmt.pix_mp.height, HEIC_GRID_DIMENSION); - if (!allow) { - i_vpr_e(inst, "%s: input is not grid aligned: %u x %u\n", __func__, - fmt->fmt.pix_mp.width, fmt->fmt.pix_mp.height); - goto exit; - } - /* is output grid dimension */ fmt = &inst->fmts[OUTPUT_PORT]; allow = fmt->fmt.pix_mp.width == HEIC_GRID_DIMENSION; From e39962d02891f52ac5af87736339db1746c392ca Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Thu, 26 May 2022 19:37:02 -0700 Subject: [PATCH 0634/1061] video: driver: introduce lock for set & get volatile controls Acquire client and inst lock for s_ctrl and g_volatile_ctrl Change-Id: I97341b69ea5390133c46711c38be51326c80b224 Signed-off-by: Darshana Patil --- driver/vidc/src/msm_vidc_control.c | 49 ++++++++++++++++++++++-------- driver/vidc/src/msm_vidc_driver.c | 15 --------- driver/vidc/src/msm_vidc_vb2.c | 45 +++++++++++++++------------ 3 files changed, 61 insertions(+), 48 deletions(-) diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 522df35fcf..8a673ea358 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -19,6 +19,8 @@ (a) = 0; \ } +extern struct msm_vidc_core *g_core; + static bool is_priv_ctrl(u32 id) { bool private = false; @@ -1036,19 +1038,29 @@ int msm_v4l2_op_g_volatile_ctrl(struct v4l2_ctrl *ctrl) inst = container_of(ctrl->handler, struct msm_vidc_inst, ctrl_handler); + inst = get_inst_ref(g_core, inst); if (!inst) { - d_vpr_e("%s: could not find inst for ctrl %s id %#x\n", __func__, ctrl->name, ctrl->id); + d_vpr_e("%s: could not find inst for ctrl %s id %#x\n", + __func__, ctrl->name, ctrl->id); return -EINVAL; } + client_lock(inst, __func__); + inst_lock(inst, __func__); rc = msm_vidc_get_control(inst, ctrl); - if (rc) + if (rc) { i_vpr_e(inst, "%s: failed for ctrl %s id %#x\n", __func__, ctrl->name, ctrl->id); - else + goto unlock; + } else { i_vpr_h(inst, "%s: ctrl %s id %#x, value %d\n", __func__, ctrl->name, ctrl->id, ctrl->val); + } +unlock: + inst_unlock(inst, __func__); + client_unlock(inst, __func__); + put_inst(inst); return rc; } @@ -1147,25 +1159,30 @@ int msm_v4l2_op_s_ctrl(struct v4l2_ctrl *ctrl) inst = container_of(ctrl->handler, struct msm_vidc_inst, ctrl_handler); - + inst = get_inst_ref(g_core, inst); if (!inst || !inst->capabilities) { d_vpr_e("%s: invalid parameters for inst\n", __func__); return -EINVAL; } + client_lock(inst, __func__); + inst_lock(inst, __func__); capability = inst->capabilities; i_vpr_h(inst, FMT_STRING_SET_CTRL, __func__, state_name(inst->state), ctrl->name, ctrl->id, ctrl->val); - if (!msm_vidc_allow_s_ctrl(inst, ctrl->id)) - return -EINVAL; + if (!msm_vidc_allow_s_ctrl(inst, ctrl->id)) { + rc = -EINVAL; + goto unlock; + } cap_id = msm_vidc_get_cap_id(inst, ctrl->id); if (!is_valid_cap_id(cap_id)) { i_vpr_e(inst, "%s: could not find cap_id for ctrl %s\n", __func__, ctrl->name); - return -EINVAL; + rc = -EINVAL; + goto unlock; } if (ctrl->id == V4L2_CID_MPEG_VIDC_INPUT_METADATA_FD) { @@ -1173,16 +1190,18 @@ int msm_v4l2_op_s_ctrl(struct v4l2_ctrl *ctrl) i_vpr_e(inst, "%s: client configured invalid input metadata fd %d\n", __func__, ctrl->val); - return 0; + rc = 0; + goto unlock; } if (!capability->cap[INPUT_META_VIA_REQUEST].value) { i_vpr_e(inst, "%s: input metadata not enabled via request\n", __func__); - return -EINVAL; + rc = -EINVAL; + goto unlock; } rc = msm_vidc_create_input_metadata_buffer(inst, ctrl->val); if (rc) - return rc; + goto unlock; } /* mark client set flag */ @@ -1193,18 +1212,22 @@ int msm_v4l2_op_s_ctrl(struct v4l2_ctrl *ctrl) /* static case */ rc = msm_vidc_update_static_property(inst, cap_id, ctrl); if (rc) - return rc; + goto unlock; } else { /* dynamic case */ rc = msm_vidc_adjust_dynamic_property(inst, cap_id, ctrl); if (rc) - return rc; + goto unlock; rc = msm_vidc_set_dynamic_property(inst); if (rc) - return rc; + goto unlock; } +unlock: + inst_unlock(inst, __func__); + client_unlock(inst, __func__); + put_inst(inst); return rc; } diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index dd8256ec4b..bab5067442 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -2102,18 +2102,6 @@ int msm_vidc_get_fence_fd(struct msm_vidc_inst *inst, int *fence_fd) return -EINVAL; } - /* - * Acquire inst->lock for fence fd creation - * to avoid sync_file_create() and sync_file_poll() - * race conditions in e2e playback usecase. - */ - inst = get_inst_ref(g_core, inst); - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - inst_lock(inst, __func__); - list_for_each_entry_safe(fence, dummy_fence, &inst->fence_list, list) { if (fence->dma_fence.seqno == (u64)inst->capabilities->cap[FENCE_ID].value) { @@ -2137,8 +2125,6 @@ int msm_vidc_get_fence_fd(struct msm_vidc_inst *inst, int *fence_fd) *fence_fd = fence->fd; exit: - inst_unlock(inst, __func__); - put_inst(inst); return rc; } @@ -3914,7 +3900,6 @@ static int msm_vidc_vb2_buffer_done(struct msm_vidc_inst *inst, vbuf->flags = buf->flags; vb2->timestamp = buf->timestamp; vb2->planes[0].bytesused = buf->data_size + vb2->planes[0].data_offset; - v4l2_ctrl_request_complete(vb2->req_obj.req, &inst->ctrl_handler); vb2_buffer_done(vb2, state); return 0; diff --git a/driver/vidc/src/msm_vidc_vb2.c b/driver/vidc/src/msm_vidc_vb2.c index 5aeef1b791..740c3b7db1 100644 --- a/driver/vidc/src/msm_vidc_vb2.c +++ b/driver/vidc/src/msm_vidc_vb2.c @@ -447,8 +447,33 @@ void msm_vidc_buf_queue(struct vb2_buffer *vb2) return; } + /* + * As part of every qbuf initalise request to true. + * If there are any dynamic controls associated with qbuf, + * they will set as part s_ctrl() from v4l2_ctrl_request_setup(). + * Once v4l2_ctrl_request_setup() is done, reset request variable. + * If the buffer does not have any requests with it, then + * v4l2_ctrl_request_setup() will return 0. + */ + inst->request = true; + rc = v4l2_ctrl_request_setup(vb2->req_obj.req, + &inst->ctrl_handler); + inst->request = false; + v4l2_ctrl_request_complete(vb2->req_obj.req, &inst->ctrl_handler); + /* + * call request_setup and request_complete without acquiring lock + * to avoid deadlock issues because request_setup or request_complete + * would call .s_ctrl and .g_volatile_ctrl respectively which acquire + * lock too. + */ client_lock(inst, __func__); inst_lock(inst, __func__); + if (rc) { + i_vpr_e(inst, "%s: request setup failed, error %d\n", + __func__, rc); + goto unlock; + } + if (is_session_error(inst)) { i_vpr_e(inst, "%s: inst in error state\n", __func__); rc = -EINVAL; @@ -487,25 +512,6 @@ void msm_vidc_buf_queue(struct vb2_buffer *vb2) goto unlock; } - /* - * As part of every qbuf initalise request to true. - * If there are any dynamic controls associated with qbuf, - * they will set as part s_ctrl() from v4l2_ctrl_request_setup(). - * Once v4l2_ctrl_request_setup() is done, reset request variable. - * If the buffer does not have any requests with it, then - * v4l2_ctrl_request_setup() will return 0. - */ - inst->request = true; - rc = v4l2_ctrl_request_setup(vb2->req_obj.req, - &inst->ctrl_handler); - if (rc) { - inst->request = false; - i_vpr_e(inst, "%s: request setup failed, error %d\n", - __func__, rc); - goto unlock; - } - inst->request = false; - if (inst->capabilities->cap[INPUT_META_VIA_REQUEST].value) { rc = msm_vidc_update_input_meta_buffer_index(inst, vb2); if (rc) @@ -526,7 +532,6 @@ void msm_vidc_buf_queue(struct vb2_buffer *vb2) unlock: if (rc) { msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); - v4l2_ctrl_request_complete(vb2->req_obj.req, &inst->ctrl_handler); vb2_buffer_done(vb2, VB2_BUF_STATE_ERROR); } inst_unlock(inst, __func__); From 5713e9a303a12b6e2c66a586e5830c97839d4ad2 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Tue, 31 May 2022 11:35:39 -0700 Subject: [PATCH 0635/1061] video: driver: fix slice mode support Allow client to set slice mode control to slice off for HEIC codec. Change-Id: Iffc8be23990a5dad451550cccb8236cc32951b2a Signed-off-by: Akshata Sahukar --- driver/platform/kalama/src/msm_vidc_kalama.c | 19 +++++++++++++++++-- driver/platform/waipio/src/msm_vidc_waipio.c | 19 +++++++++++++++++-- driver/vidc/src/msm_vidc_control.c | 6 +++--- driver/vidc/src/msm_vidc_driver.c | 1 + driver/vidc/src/msm_vidc_fence.c | 2 +- 5 files changed, 39 insertions(+), 8 deletions(-) diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index 769ce3ea82..b6a8d836ef 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -1236,14 +1236,23 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { 0, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - {SLICE_MAX_BYTES, ENC, H264|HEVC|HEIC, + {SLICE_MODE, ENC, HEIC, + V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, + V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, + BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE), + V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, + V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE, + 0, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {SLICE_MAX_BYTES, ENC, H264|HEVC, MIN_SLICE_BYTE_SIZE, MAX_SLICE_BYTE_SIZE, 1, MIN_SLICE_BYTE_SIZE, V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES, HFI_PROP_MULTI_SLICE_BYTES_COUNT, CAP_FLAG_OUTPUT_PORT}, - {SLICE_MAX_MB, ENC, H264|HEVC|HEIC, + {SLICE_MAX_MB, ENC, H264|HEVC, 1, MAX_SLICE_MB_SIZE, 1, 1, V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB, HFI_PROP_MULTI_SLICE_MB_COUNT, @@ -2190,6 +2199,12 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kala msm_vidc_adjust_slice_count, msm_vidc_set_slice_count}, + {SLICE_MODE, ENC, HEIC, + {0}, + {0}, + msm_vidc_adjust_slice_count, + msm_vidc_set_slice_count}, + {TRANSFORM_8X8, ENC, H264, {PROFILE}, {0}, diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index a3c064661b..b831cf69e3 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -1141,14 +1141,23 @@ static struct msm_platform_inst_capability instance_cap_data_waipio[] = { 0, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - {SLICE_MAX_BYTES, ENC, H264|HEVC|HEIC, + {SLICE_MODE, ENC, HEIC, + V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, + V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, + BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE), + V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, + V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE, + 0, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {SLICE_MAX_BYTES, ENC, H264|HEVC, MIN_SLICE_BYTE_SIZE, MAX_SLICE_BYTE_SIZE, 1, MIN_SLICE_BYTE_SIZE, V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES, HFI_PROP_MULTI_SLICE_BYTES_COUNT, CAP_FLAG_OUTPUT_PORT}, - {SLICE_MAX_MB, ENC, H264|HEVC|HEIC, + {SLICE_MAX_MB, ENC, H264|HEVC, 1, MAX_SLICE_MB_SIZE, 1, 1, V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB, HFI_PROP_MULTI_SLICE_MB_COUNT, @@ -1969,6 +1978,12 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_waip msm_vidc_adjust_slice_count, msm_vidc_set_slice_count}, + {SLICE_MODE, ENC, HEIC, + {0}, + {0}, + msm_vidc_adjust_slice_count, + msm_vidc_set_slice_count}, + {TRANSFORM_8X8, ENC, H264, {PROFILE}, {0}, diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 522df35fcf..93b4739ce9 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -1713,15 +1713,15 @@ int msm_vidc_adjust_slice_count(void *instance, struct v4l2_ctrl *ctrl) slice_mode = ctrl ? ctrl->val : capability->cap[SLICE_MODE].value; + if (slice_mode == V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE) + return 0; + if (msm_vidc_get_parent_value(inst, SLICE_MODE, BITRATE_MODE, &rc_type, __func__) || msm_vidc_get_parent_value(inst, SLICE_MODE, ALL_INTRA, &all_intra, __func__)) return -EINVAL; - if (slice_mode == V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE) - return 0; - fps = capability->cap[FRAME_RATE].value >> 16; if (fps > MAX_SLICES_FRAME_RATE || (rc_type != HFI_RC_OFF && diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index dd8256ec4b..6e6d4a5111 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -82,6 +82,7 @@ static const struct msm_vidc_cap_name cap_name_arr[] = { {META_EVA_STATS, "META_EVA_STATS" }, {META_ROI_INFO, "META_ROI_INFO" }, {META_SALIENCY_INFO, "META_SALIENCY_INFO" }, + {META_TRANSCODING_STAT_INFO, "META_TRANSCODING_STAT_INFO" }, {META_CAP_MAX, "META_CAP_MAX" }, {FRAME_WIDTH, "FRAME_WIDTH" }, {LOSSLESS_FRAME_WIDTH, "LOSSLESS_FRAME_WIDTH" }, diff --git a/driver/vidc/src/msm_vidc_fence.c b/driver/vidc/src/msm_vidc_fence.c index 853f214643..710530490d 100644 --- a/driver/vidc/src/msm_vidc_fence.c +++ b/driver/vidc/src/msm_vidc_fence.c @@ -201,6 +201,7 @@ int msm_vidc_fence_init(struct msm_vidc_inst *inst) } inst->fence_context.ctx_num = dma_fence_context_alloc(1); + spin_lock_init(&inst->fence_context.lock); snprintf(inst->fence_context.name, sizeof(inst->fence_context.name), "msm_vidc_fence: %s: %llu", inst->debug_str, inst->fence_context.ctx_num); @@ -217,7 +218,6 @@ void msm_vidc_fence_deinit(struct msm_vidc_inst *inst) } i_vpr_h(inst, "%s: %s\n", __func__, inst->fence_context.name); inst->fence_context.ctx_num = 0; - spin_lock_init(&inst->fence_context.lock); snprintf(inst->fence_context.name, sizeof(inst->fence_context.name), "%s", ""); } From f781c619a94b6d99f7032266d857efd14d26cfa2 Mon Sep 17 00:00:00 2001 From: Zhongbo Shi Date: Tue, 10 May 2022 10:51:42 +0800 Subject: [PATCH 0636/1061] video-driver: add to support DolbyVision metadata 1. add DolbyVision metadata cap and V4L2 id; 2. Increase decoder persist buffer size; 3. Increase decoder output meta buffer size; 4. Increase encoder input meta buffer size; 5. Parse buffer overflow flag and set buffer flag accordingly; Change-Id: I8fa5e89068dd479033d28f627e585edc3a1c58bb Signed-off-by: Zhongbo Shi --- driver/platform/kalama/src/msm_vidc_kalama.c | 16 ++++++++++++++++ driver/variant/iris3/inc/hfi_buffer_iris3.h | 12 ++++++++---- driver/variant/iris3/src/msm_vidc_buffer_iris3.c | 8 ++++++-- driver/vidc/inc/hfi_property.h | 2 ++ driver/vidc/inc/msm_vidc_internal.h | 1 + driver/vidc/src/msm_vidc_buffer.c | 12 +++++++++++- driver/vidc/src/msm_vidc_driver.c | 1 + driver/vidc/src/venus_hfi_response.c | 4 ++++ include/uapi/vidc/media/v4l2_vidc_extensions.h | 5 +++++ 9 files changed, 54 insertions(+), 7 deletions(-) diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index b6a8d836ef..6dd2dbff60 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -1618,6 +1618,22 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { HFI_PROP_SEI_HDR10PLUS_USERDATA, CAP_FLAG_BITMASK}, + {META_DOLBY_RPU, ENC, HEVC, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_TX_INPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_DOLBY_RPU, + HFI_PROP_DOLBY_RPU_METADATA, + CAP_FLAG_BITMASK}, + + {META_DOLBY_RPU, DEC, H264|HEVC, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_DOLBY_RPU, + HFI_PROP_DOLBY_RPU_METADATA, + CAP_FLAG_BITMASK}, + {META_EVA_STATS, ENC, CODECS_ALL, V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_TX_INPUT, diff --git a/driver/variant/iris3/inc/hfi_buffer_iris3.h b/driver/variant/iris3/inc/hfi_buffer_iris3.h index 58e70c1c48..1e8bc16aba 100644 --- a/driver/variant/iris3/inc/hfi_buffer_iris3.h +++ b/driver/variant/iris3/inc/hfi_buffer_iris3.h @@ -514,10 +514,13 @@ typedef HFI_U32 HFI_BOOL; #define SIZE_SEI_USERDATA (4096) #define H264_NUM_FRM_INFO (66) #define H264_DISPLAY_BUF_SIZE (3328) -#define HFI_BUFFER_PERSIST_H264D(_size) \ +#define SIZE_DOLBY_RPU_METADATA (41 * 1024) +#define HFI_BUFFER_PERSIST_H264D(_size, rpu_enabled) \ _size = HFI_ALIGN((SIZE_SLIST_BUF_H264 * NUM_SLIST_BUF_H264 + \ H264_DISPLAY_BUF_SIZE * H264_NUM_FRM_INFO + \ - NUM_HW_PIC_BUF * SIZE_SEI_USERDATA), VENUS_DMA_ALIGNMENT) + NUM_HW_PIC_BUF * SIZE_SEI_USERDATA + \ + rpu_enabled * NUM_HW_PIC_BUF * SIZE_DOLBY_RPU_METADATA), \ + VENUS_DMA_ALIGNMENT) #define LCU_MAX_SIZE_PELS 64 #define LCU_MIN_SIZE_PELS 16 @@ -717,10 +720,11 @@ typedef HFI_U32 HFI_BOOL; #define H265_NUM_TILE (H265_NUM_TILE_ROW * H265_NUM_TILE_COL + 1) #define H265_NUM_FRM_INFO (48) #define H265_DISPLAY_BUF_SIZE (3072) -#define HFI_BUFFER_PERSIST_H265D(_size) \ +#define HFI_BUFFER_PERSIST_H265D(_size, rpu_enabled) \ _size = HFI_ALIGN((SIZE_SLIST_BUF_H265 * NUM_SLIST_BUF_H265 + \ H265_NUM_FRM_INFO * H265_DISPLAY_BUF_SIZE + \ - H265_NUM_TILE * sizeof(HFI_U32) + NUM_HW_PIC_BUF * SIZE_SEI_USERDATA),\ + H265_NUM_TILE * sizeof(HFI_U32) + NUM_HW_PIC_BUF * SIZE_SEI_USERDATA + \ + rpu_enabled * NUM_HW_PIC_BUF * SIZE_DOLBY_RPU_METADATA),\ VENUS_DMA_ALIGNMENT) #define SIZE_VPXD_LB_FE_LEFT_CTRL(frame_width, frame_height) \ diff --git a/driver/variant/iris3/src/msm_vidc_buffer_iris3.c b/driver/variant/iris3/src/msm_vidc_buffer_iris3.c index d5c3c41af5..c9ef291a50 100644 --- a/driver/variant/iris3/src/msm_vidc_buffer_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_buffer_iris3.c @@ -220,16 +220,20 @@ static u32 msm_vidc_decoder_partial_data_size_iris3(struct msm_vidc_inst *inst) static u32 msm_vidc_decoder_persist_size_iris3(struct msm_vidc_inst *inst) { u32 size = 0; + u32 rpu_enabled = 0; if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return size; } + if (inst->capabilities->cap[META_DOLBY_RPU].value) + rpu_enabled = 1; + if (inst->codec == MSM_VIDC_H264) { - HFI_BUFFER_PERSIST_H264D(size); + HFI_BUFFER_PERSIST_H264D(size, rpu_enabled); } else if (inst->codec == MSM_VIDC_HEVC || inst->codec == MSM_VIDC_HEIC) { - HFI_BUFFER_PERSIST_H265D(size); + HFI_BUFFER_PERSIST_H265D(size, rpu_enabled); } else if (inst->codec == MSM_VIDC_VP9) { HFI_BUFFER_PERSIST_VP9D(size); } else if (inst->codec == MSM_VIDC_AV1) { diff --git a/driver/vidc/inc/hfi_property.h b/driver/vidc/inc/hfi_property.h index cbada2f507..0899ecf799 100644 --- a/driver/vidc/inc/hfi_property.h +++ b/driver/vidc/inc/hfi_property.h @@ -563,6 +563,8 @@ enum hfi_saliency_type { #define HFI_PROP_TRANSCODING_STAT_INFO 0x03000191 +#define HFI_PROP_DOLBY_RPU_METADATA 0x03000192 + #define HFI_PROP_END 0x03FFFFFF #define HFI_SESSION_ERROR_BEGIN 0x04000000 diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 5892b5d219..0977adf873 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -384,6 +384,7 @@ enum msm_vidc_inst_capability_type { META_ROI_INFO, META_SALIENCY_INFO, META_TRANSCODING_STAT_INFO, + META_DOLBY_RPU, META_CAP_MAX, /* end of metadata caps */ FRAME_WIDTH, diff --git a/driver/vidc/src/msm_vidc_buffer.c b/driver/vidc/src/msm_vidc_buffer.c index 57300f3466..12ff854f7b 100644 --- a/driver/vidc/src/msm_vidc_buffer.c +++ b/driver/vidc/src/msm_vidc_buffer.c @@ -287,7 +287,12 @@ u32 msm_vidc_decoder_input_meta_size(struct msm_vidc_inst *inst) u32 msm_vidc_decoder_output_meta_size(struct msm_vidc_inst *inst) { - return MSM_VIDC_METADATA_SIZE; + u32 size = MSM_VIDC_METADATA_SIZE; + + if (inst->capabilities->cap[META_DOLBY_RPU].value) + size += MSM_VIDC_METADATA_DOLBY_RPU_SIZE; + + return ALIGN(size, SZ_4K); } u32 msm_vidc_encoder_input_size(struct msm_vidc_inst *inst) @@ -450,6 +455,11 @@ u32 msm_vidc_encoder_input_meta_size(struct msm_vidc_inst *inst) size += ROI_METADATA_SIZE(width, height, lcu_size); size = ALIGN(size, SZ_4K); } + + if (inst->capabilities->cap[META_DOLBY_RPU].value) { + size += MSM_VIDC_METADATA_DOLBY_RPU_SIZE; + size = ALIGN(size, SZ_4K); + } return size; } diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 620c653712..82afed1061 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -83,6 +83,7 @@ static const struct msm_vidc_cap_name cap_name_arr[] = { {META_ROI_INFO, "META_ROI_INFO" }, {META_SALIENCY_INFO, "META_SALIENCY_INFO" }, {META_TRANSCODING_STAT_INFO, "META_TRANSCODING_STAT_INFO" }, + {META_DOLBY_RPU, "META_DOLBY_RPU" }, {META_CAP_MAX, "META_CAP_MAX" }, {FRAME_WIDTH, "FRAME_WIDTH" }, {LOSSLESS_FRAME_WIDTH, "LOSSLESS_FRAME_WIDTH" }, diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index 5a38a03cc1..cc720e1474 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -338,6 +338,10 @@ static int handle_session_info(struct msm_vidc_inst *inst, info = "data corrupt"; inst->hfi_frame_info.data_corrupt = 1; break; + case HFI_INFO_BUFFER_OVERFLOW: + info = "buffer overflow"; + inst->hfi_frame_info.overflow = 1; + break; default: info = "unknown"; break; diff --git a/include/uapi/vidc/media/v4l2_vidc_extensions.h b/include/uapi/vidc/media/v4l2_vidc_extensions.h index f249289907..b0b296471b 100644 --- a/include/uapi/vidc/media/v4l2_vidc_extensions.h +++ b/include/uapi/vidc/media/v4l2_vidc_extensions.h @@ -262,6 +262,9 @@ enum v4l2_h264_encode_delivery_mode { #define V4L2_CID_MPEG_VIDC_RESERVE_DURATION \ (V4L2_CID_MPEG_VIDC_BASE + 0x3F) +#define V4L2_CID_MPEG_VIDC_METADATA_DOLBY_RPU \ + (V4L2_CID_MPEG_VIDC_BASE + 0x40) + /* add new controls above this line */ /* Deprecate below controls once availble in gki and gsi bionic header */ #ifndef V4L2_CID_MPEG_VIDEO_BASELAYER_PRIORITY_ID @@ -404,6 +407,7 @@ enum v4l2_mpeg_vidc_metadata { METADATA_SALIENCY_INFO = 0x0300018A, METADATA_FENCE = 0x0300018B, METADATA_TRANSCODING_STAT_INFO = 0x03000191, + METADATA_DV_RPU = 0x03000192, }; enum meta_interlace_info { META_INTERLACE_INFO_NONE = 0x00000000, @@ -460,5 +464,6 @@ struct v4l2_event_vidc_metadata { #define MSM_VIDC_METADATA_SIZE (4 * 4096) /* 16 KB */ #define ENCODE_INPUT_METADATA_SIZE (512 * 4096) /* 2 MB */ #define DECODE_INPUT_METADATA_SIZE MSM_VIDC_METADATA_SIZE +#define MSM_VIDC_METADATA_DOLBY_RPU_SIZE (41 * 1024) /* 41 KB */ #endif From 0160053f46bc3cb4b21c23f05f8a82584f1cfa21 Mon Sep 17 00:00:00 2001 From: Deepa Guthyappa Madivalara Date: Fri, 27 May 2022 16:49:45 -0700 Subject: [PATCH 0637/1061] video: driver: Use max bitrate depending upon session 1. Host will use HQ quality mode for all INTRA encoding case 2. Cap bitarate and bit rate boost to max bitrate of current session config Change-Id: I8e8d19998ebeff992c290fbd18c072b2b93ffef2 Signed-off-by: Deepa Guthyappa Madivalara --- driver/platform/kalama/src/msm_vidc_kalama.c | 37 +++++++++++++----- driver/variant/iris3/src/msm_vidc_iris3.c | 16 +++++++- driver/vidc/inc/msm_vidc_driver.h | 1 + driver/vidc/inc/msm_vidc_internal.h | 4 ++ driver/vidc/src/msm_vidc_control.c | 20 +++++++++- driver/vidc/src/msm_vidc_driver.c | 41 ++++++++++++++++++++ 6 files changed, 106 insertions(+), 13 deletions(-) diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index 3a0f2ad4ac..578e4b5f37 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -19,7 +19,7 @@ #define MAX_LTR_FRAME_COUNT 2 #define MAX_BASE_LAYER_PRIORITY_ID 63 #define MAX_OP_POINT 31 -#define MAX_BITRATE 220000000 +#define MAX_BITRATE 245000000 #define DEFAULT_BITRATE 20000000 #define MINIMUM_FPS 1 #define MAXIMUM_FPS 480 @@ -66,7 +66,7 @@ static struct msm_platform_core_capability core_data_kalama[] = { {MAX_MBPS_HQ, 489600}, /* ((1920x1088)/256)@60fps */ {MAX_MBPF_B_FRAME, 32640}, /* 3840x2176/256 */ {MAX_MBPS_B_FRAME, 1958400}, /* 3840x2176/256 MBs@60fps */ - {MAX_MBPS_ALL_INTRA, 1958400}, /* 3840x2176/256 MBs@60fps */ + {MAX_MBPS_ALL_INTRA, 2088960}, /* 4096x2176/256 MBs@60fps */ {MAX_ENH_LAYER_COUNT, 5}, {NUM_VPP_PIPE, 4}, {SW_PC, 1}, @@ -483,6 +483,18 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { HFI_PROP_RATE_CONTROL, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + {CABAC_MAX_BITRATE, ENC, H264|HEVC, 0, + 160000000, 1, 160000000}, + + {CAVLC_MAX_BITRATE, ENC, H264, 0, + 220000000, 1, 220000000}, + + {ALLINTRA_MAX_BITRATE, ENC, H264|HEVC, 0, + 245000000, 1, 245000000}, + + {LOWLATENCY_MAX_BITRATE, ENC, H264|HEVC, 0, + 70000000, 1, 70000000}, + {LOSSLESS, ENC, HEVC, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, @@ -1821,9 +1833,16 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kala NULL, msm_vidc_set_req_sync_frame}, - {BIT_RATE, ENC, H264|HEVC, - {ENH_LAYER_COUNT, BITRATE_MODE}, - {PEAK_BITRATE}, + {BIT_RATE, ENC, H264, + {ENH_LAYER_COUNT, BITRATE_MODE, ENTROPY_MODE, + ALL_INTRA, LOWLATENCY_MODE}, + {PEAK_BITRATE, BITRATE_BOOST}, + msm_vidc_adjust_bitrate, + msm_vidc_set_bitrate}, + + {BIT_RATE, ENC, HEVC, + {ENH_LAYER_COUNT, BITRATE_MODE, ALL_INTRA, LOWLATENCY_MODE}, + {PEAK_BITRATE, BITRATE_BOOST}, msm_vidc_adjust_bitrate, msm_vidc_set_bitrate}, @@ -1903,7 +1922,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kala {LOWLATENCY_MODE, ENC, H264 | HEVC, {BITRATE_MODE, DELIVERY_MODE}, - {STAGE}, + {STAGE, BIT_RATE}, msm_vidc_adjust_enc_lowlatency_mode, NULL}, @@ -1962,7 +1981,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kala msm_vidc_set_preprocess}, {BITRATE_BOOST, ENC, H264|HEVC, - {BITRATE_MODE, MIN_QUALITY}, + {BITRATE_MODE, MIN_QUALITY, BIT_RATE}, {0}, msm_vidc_adjust_bitrate_boost_iris3, msm_vidc_set_vbr_related_properties}, @@ -2110,7 +2129,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kala {ENTROPY_MODE, ENC, H264, {PROFILE}, - {0}, + {BIT_RATE}, msm_vidc_adjust_entropy_mode, msm_vidc_set_u32}, @@ -2314,7 +2333,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kala {ALL_INTRA, ENC, H264|HEVC, {GOP_SIZE, B_FRAME}, - {LTR_COUNT, IR_PERIOD, SLICE_MODE}, + {LTR_COUNT, IR_PERIOD, SLICE_MODE, BIT_RATE}, msm_vidc_adjust_all_intra, NULL}, diff --git a/driver/variant/iris3/src/msm_vidc_iris3.c b/driver/variant/iris3/src/msm_vidc_iris3.c index 9dc8fa6222..62288ed9b8 100644 --- a/driver/variant/iris3/src/msm_vidc_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_iris3.c @@ -1110,8 +1110,9 @@ int msm_vidc_decide_quality_mode_iris3(struct msm_vidc_inst* inst) if (!is_encode_session(inst)) return 0; - /* image session or lossless encode always runs at quality mode */ - if (is_image_session(inst) || capability->cap[LOSSLESS].value) { + /* image or lossless or all intra runs at quality mode */ + if (is_image_session(inst) || capability->cap[LOSSLESS].value || + capability->cap[ALL_INTRA].value) { mode = MSM_VIDC_MAX_QUALITY_MODE; goto decision_done; } @@ -1154,6 +1155,7 @@ int msm_vidc_adjust_bitrate_boost_iris3(void* instance, struct v4l2_ctrl *ctrl) s32 rc_type = -1; u32 width, height, frame_rate; struct v4l2_format *f; + u32 max_bitrate = 0, bitrate = 0; if (!inst || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); @@ -1201,6 +1203,16 @@ int msm_vidc_adjust_bitrate_boost_iris3(void* instance, struct v4l2_ctrl *ctrl) adjusted_value = 0; } + max_bitrate = msm_vidc_get_max_bitrate(inst); + bitrate = inst->capabilities->cap[BIT_RATE].value; + if (adjusted_value) { + if ((bitrate + bitrate / (100 / adjusted_value)) > max_bitrate) { + i_vpr_h(inst, + "%s: bitrate %d is beyond max bitrate %d, remove bitrate boost\n", + __func__, max_bitrate, bitrate); + adjusted_value = 0; + } + } adjust: msm_vidc_update_cap_value(inst, BITRATE_BOOST, adjusted_value, __func__); diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 0523a6302f..f4958ed027 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -510,6 +510,7 @@ int msm_vidc_state_change_start(struct msm_vidc_inst *inst); int msm_vidc_state_change_input_psc(struct msm_vidc_inst *inst); int msm_vidc_state_change_last_flag(struct msm_vidc_inst *inst); int msm_vidc_get_mbs_per_frame(struct msm_vidc_inst *inst); +u32 msm_vidc_get_max_bitrate(struct msm_vidc_inst* inst); int msm_vidc_get_fps(struct msm_vidc_inst *inst); int msm_vidc_num_buffers(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type type, enum msm_vidc_buffer_attributes attr); diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index cc025231ba..bbef99ab1c 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -490,6 +490,10 @@ enum msm_vidc_inst_capability_type { INPUT_META_VIA_REQUEST, ENC_IP_CR, COMPLEXITY, + CABAC_MAX_BITRATE, + CAVLC_MAX_BITRATE, + ALLINTRA_MAX_BITRATE, + LOWLATENCY_MAX_BITRATE, /* place all root(no parent) enums before this line */ PROFILE, diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 8e5a75167a..0b641c95a0 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -2061,9 +2061,10 @@ int msm_vidc_adjust_bitrate(void *instance, struct v4l2_ctrl *ctrl) int i, rc = 0; struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; struct msm_vidc_inst_capability *capability; - s32 adjusted_value, max_bitrate, enh_layer_count; + s32 adjusted_value, enh_layer_count; u32 cumulative_bitrate = 0, cap_id = 0, cap_value = 0; u32 layer_br_caps[6] = {L0_BR, L1_BR, L2_BR, L3_BR, L4_BR, L5_BR}; + u32 max_bitrate = 0; if (!inst || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); @@ -2092,7 +2093,10 @@ int msm_vidc_adjust_bitrate(void *instance, struct v4l2_ctrl *ctrl) ENH_LAYER_COUNT, &enh_layer_count, __func__)) return -EINVAL; - max_bitrate = inst->capabilities->cap[BIT_RATE].max; + /* get max bit rate for current session config*/ + max_bitrate = msm_vidc_get_max_bitrate(inst); + if (inst->capabilities->cap[BIT_RATE].value > max_bitrate) + msm_vidc_update_cap_value(inst, BIT_RATE, max_bitrate, __func__); /* * ENH_LAYER_COUNT cap max is positive only if @@ -2566,6 +2570,7 @@ int msm_vidc_adjust_bitrate_boost(void *instance, struct v4l2_ctrl *ctrl) s32 adjusted_value; struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; s32 min_quality = -1, rc_type = -1; + u32 max_bitrate = 0, bitrate = 0; if (!inst || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); @@ -2599,6 +2604,17 @@ int msm_vidc_adjust_bitrate_boost(void *instance, struct v4l2_ctrl *ctrl) goto adjust; } + max_bitrate = msm_vidc_get_max_bitrate(inst); + bitrate = inst->capabilities->cap[BIT_RATE].value; + if (adjusted_value) { + if ((bitrate + bitrate / (100 / adjusted_value)) > max_bitrate) { + i_vpr_h(inst, + "%s: bitrate %d is beyond max bitrate %d, remove bitrate boost\n", + __func__, max_bitrate, bitrate); + adjusted_value = 0; + } + } + adjust: msm_vidc_update_cap_value(inst, BITRATE_BOOST, adjusted_value, __func__); diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 277d663fe6..f34b0327a1 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -188,6 +188,10 @@ static const struct msm_vidc_cap_name cap_name_arr[] = { {INPUT_META_VIA_REQUEST, "INPUT_META_VIA_REQUEST" }, {ENC_IP_CR, "ENC_IP_CR" }, {COMPLEXITY, "COMPLEXITY" }, + {CABAC_MAX_BITRATE, "CABAC_MAX_BITRATE" }, + {CAVLC_MAX_BITRATE, "CAVLC_MAX_BITRATE" }, + {ALLINTRA_MAX_BITRATE, "ALLINTRA_MAX_BITRATE" }, + {LOWLATENCY_MAX_BITRATE, "LOWLATENCY_MAX_BITRATE" }, {PROFILE, "PROFILE" }, {ENH_LAYER_COUNT, "ENH_LAYER_COUNT" }, {BIT_RATE, "BIT_RATE" }, @@ -6151,6 +6155,43 @@ static int msm_vidc_check_inst_mbpf(struct msm_vidc_inst *inst) return 0; } +u32 msm_vidc_get_max_bitrate(struct msm_vidc_inst* inst) +{ + struct msm_vidc_inst_capability *capability; + u32 max_bitrate = 0x7fffffff; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + if (inst->capabilities->cap[LOWLATENCY_MODE].value) + max_bitrate = min(max_bitrate, + (u32)inst->capabilities->cap[LOWLATENCY_MAX_BITRATE].max); + + if (inst->capabilities->cap[ALL_INTRA].value) + max_bitrate = min(max_bitrate, + (u32)inst->capabilities->cap[ALLINTRA_MAX_BITRATE].max); + + if (inst->codec == MSM_VIDC_HEVC) { + max_bitrate = min(max_bitrate, + (u32)inst->capabilities->cap[CABAC_MAX_BITRATE].max); + } else if (inst->codec == MSM_VIDC_H264) { + if (inst->capabilities->cap[ENTROPY_MODE].value == + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC) + max_bitrate = min(max_bitrate, + (u32)inst->capabilities->cap[CAVLC_MAX_BITRATE].max); + else + max_bitrate = min(max_bitrate, + (u32)inst->capabilities->cap[CABAC_MAX_BITRATE].max); + } + if (max_bitrate == 0x7fffffff || !max_bitrate) + max_bitrate = min(max_bitrate, (u32)inst->capabilities->cap[BIT_RATE].max); + + return max_bitrate; +} + static bool msm_vidc_allow_image_encode_session(struct msm_vidc_inst *inst) { struct msm_vidc_inst_capability *capability; From ec484c856ba637f8c361fd1ab0a9682cce885f89 Mon Sep 17 00:00:00 2001 From: Mihir Ganu Date: Thu, 2 Jun 2022 10:59:49 -0700 Subject: [PATCH 0638/1061] video: driver: Optimize HEVC Bin buffer allocation Optimize HEVC Bin buffer allocation by allocating 25% additional bitstream buffer size for 10 bit HEVC usecase and avoiding the extra memory allocation for 8 bit usecases. Change-Id: Iebbedf43e80fad852807349cbe7f70cf7a632a73 Signed-off-by: Mihir Ganu --- driver/variant/iris3/inc/hfi_buffer_iris3.h | 17 +++++++++-------- .../variant/iris3/src/msm_vidc_buffer_iris3.c | 7 ++++--- 2 files changed, 13 insertions(+), 11 deletions(-) diff --git a/driver/variant/iris3/inc/hfi_buffer_iris3.h b/driver/variant/iris3/inc/hfi_buffer_iris3.h index 1e8bc16aba..e2dc423fb0 100644 --- a/driver/variant/iris3/inc/hfi_buffer_iris3.h +++ b/driver/variant/iris3/inc/hfi_buffer_iris3.h @@ -1360,7 +1360,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ } while (0) #define SIZE_BIN_BITSTREAM_ENC(_size, rc_type, frame_width, frame_height, \ - work_mode, lcu_size) \ + work_mode, lcu_size, profile) \ do \ { \ HFI_U32 size_aligned_width = 0, size_aligned_height = 0; \ @@ -1391,7 +1391,8 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ { \ bitstream_size_eval >>= 2; \ } \ - if (lcu_size == 32) \ + if (profile == HFI_H265_PROFILE_MAIN_10 || \ + profile == HFI_H265_PROFILE_MAIN_10_STILL_PICTURE) \ { \ bitstream_size_eval = (bitstream_size_eval * 5 >> 2); \ } \ @@ -1443,13 +1444,13 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ } while (0) #define HFI_BUFFER_BIN_ENC(_size, rc_type, frame_width, frame_height, lcu_size, \ - work_mode, num_vpp_pipes) \ + work_mode, num_vpp_pipes, profile) \ do \ { \ HFI_U32 bitstream_size = 0, total_bitbin_buffers = 0, \ size_single_pipe = 0, bitbin_size = 0; \ SIZE_BIN_BITSTREAM_ENC(bitstream_size, rc_type, frame_width, \ - frame_height, work_mode, lcu_size); \ + frame_height, work_mode, lcu_size, profile); \ if (work_mode == HFI_WORKMODE_2) \ { \ total_bitbin_buffers = 3; \ @@ -1478,19 +1479,19 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ } while (0) #define HFI_BUFFER_BIN_H264E(_size, rc_type, frame_width, frame_height, \ - work_mode, num_vpp_pipes) \ + work_mode, num_vpp_pipes, profile) \ do \ { \ HFI_BUFFER_BIN_ENC(_size, rc_type, frame_width, frame_height, 16, \ - work_mode, num_vpp_pipes); \ + work_mode, num_vpp_pipes, profile); \ } while (0) #define HFI_BUFFER_BIN_H265E(_size, rc_type, frame_width, frame_height, \ - work_mode, num_vpp_pipes) \ + work_mode, num_vpp_pipes, profile) \ do \ { \ HFI_BUFFER_BIN_ENC(_size, rc_type, frame_width, frame_height, 32,\ - work_mode, num_vpp_pipes); \ + work_mode, num_vpp_pipes, profile); \ } while (0) #define SIZE_ENC_SLICE_INFO_BUF(num_lcu_in_frame) HFI_ALIGN((256 + \ diff --git a/driver/variant/iris3/src/msm_vidc_buffer_iris3.c b/driver/variant/iris3/src/msm_vidc_buffer_iris3.c index c9ef291a50..f84e6f662b 100644 --- a/driver/variant/iris3/src/msm_vidc_buffer_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_buffer_iris3.c @@ -314,7 +314,7 @@ static u32 msm_vidc_encoder_bin_size_iris3(struct msm_vidc_inst *inst) { struct msm_vidc_core *core; u32 size = 0; - u32 width, height, num_vpp_pipes, stage; + u32 width, height, num_vpp_pipes, stage, profile; struct v4l2_format *f; if (!inst || !inst->core || !inst->capabilities) { @@ -331,13 +331,14 @@ static u32 msm_vidc_encoder_bin_size_iris3(struct msm_vidc_inst *inst) f = &inst->fmts[OUTPUT_PORT]; width = f->fmt.pix_mp.width; height = f->fmt.pix_mp.height; + profile = inst->capabilities->cap[PROFILE].value; if (inst->codec == MSM_VIDC_H264) HFI_BUFFER_BIN_H264E(size, inst->hfi_rc_type, width, - height, stage, num_vpp_pipes); + height, stage, num_vpp_pipes, profile); else if (inst->codec == MSM_VIDC_HEVC || inst->codec == MSM_VIDC_HEIC) HFI_BUFFER_BIN_H265E(size, inst->hfi_rc_type, width, - height, stage, num_vpp_pipes); + height, stage, num_vpp_pipes, profile); i_vpr_l(inst, "%s: size %d\n", __func__, size); return size; From 84e39edbcf07b714290524cf0048c92285d7511f Mon Sep 17 00:00:00 2001 From: Mihir Ganu Date: Thu, 2 Jun 2022 16:29:09 -0700 Subject: [PATCH 0639/1061] video: driver: Adjust bandwidth votes for AV1 film grain For AV1 bitstreams with film grain, split mode is used for UBWC colorformats as well. Consider split mode to calculate bandwidth votes. Change-Id: I98bf07b8be7f0e829af5e55ed6d0c3659ae099f2 Signed-off-by: Mihir Ganu --- driver/vidc/src/msm_vidc_power.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/driver/vidc/src/msm_vidc_power.c b/driver/vidc/src/msm_vidc_power.c index ace0f0cb29..dd2ff96e68 100644 --- a/driver/vidc/src/msm_vidc_power.c +++ b/driver/vidc/src/msm_vidc_power.c @@ -270,6 +270,15 @@ int msm_vidc_scale_buses(struct msm_vidc_inst *inst) vote_data->color_formats[0] = MSM_VIDC_FMT_NV12; } vote_data->color_formats[1] = color_format; + } else if (inst->codec == MSM_VIDC_AV1 && + inst->capabilities->cap[FILM_GRAIN].value) { + /* + * UBWC formats with AV1 film grain requires dpb-opb + * split mode + */ + vote_data->num_formats = 2; + vote_data->color_formats[0] = + vote_data->color_formats[1] = color_format; } else { vote_data->num_formats = 1; vote_data->color_formats[0] = color_format; From cbfbff897a196a17d3fbeef9c415d1f7371b080d Mon Sep 17 00:00:00 2001 From: Vedang Nagar Date: Mon, 30 May 2022 23:55:42 +0530 Subject: [PATCH 0640/1061] video: driver: Add missing capabilites Add mising capabilites in msm_vidc_waipio.c for the changes done in msm_vidc_kalama.c Change-Id: Idc75533162c977333efb4caec992ee13408ce422 Signed-off-by: Vedang Nagar --- driver/platform/waipio/src/msm_vidc_waipio.c | 80 +++++++++++++++----- 1 file changed, 60 insertions(+), 20 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index b831cf69e3..3f788f6a63 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -12,6 +12,7 @@ #include "msm_vidc_internal.h" #include "msm_vidc_control.h" #include "hfi_property.h" +#include "hfi_command.h" #define DEFAULT_VIDEO_CONCEAL_COLOR_BLACK 0x8020010 #define MAX_LTR_FRAME_COUNT 2 @@ -46,12 +47,12 @@ static struct msm_platform_core_capability core_data_waipio[] = { {DEC_CODECS, H264|HEVC|VP9|HEIC}, {MAX_SESSION_COUNT, 16}, {MAX_NUM_720P_SESSIONS, 16}, - {MAX_NUM_1080P_SESSIONS, 8}, - {MAX_NUM_4K_SESSIONS, 4}, + {MAX_NUM_1080P_SESSIONS, 16}, + {MAX_NUM_4K_SESSIONS, 8}, {MAX_NUM_8K_SESSIONS, 2}, {MAX_SECURE_SESSION_COUNT, 3}, - {MAX_RT_MBPF, 173056}, /* (8192x4320)/256 + (4096x2176)/256*/ - {MAX_MBPF, 276480}, /* ((8192x4320)/256) * 2 */ + {MAX_RT_MBPF, 174080}, /* (8192x4352)/256 + (4096x2176)/256*/ + {MAX_MBPF, 278528}, /* ((8192x4352)/256) * 2 */ {MAX_MBPS, 7833600}, /* max_load * 7680x4320@60fps or 3840x2176@240fps * which is greater than 4096x2176@120fps, @@ -321,6 +322,14 @@ static struct msm_platform_inst_capability instance_cap_data_waipio[] = { HFI_PROP_SECURE, CAP_FLAG_NONE}, + {META_OUTBUF_FENCE, DEC, H264|HEVC|VP9, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_DISABLE, + 0, V4L2_MPEG_VIDC_META_DISABLE, + 0, + 0, + CAP_FLAG_BITMASK}, + {TS_REORDER, DEC, H264|HEVC, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, @@ -1244,7 +1253,9 @@ static struct msm_platform_inst_capability instance_cap_data_waipio[] = { 0, HFI_PROP_PIPE}, - {POC, DEC, H264, 0, 18, 1, 1}, + {POC, DEC, H264, 0, 2, 1, 1, + 0, + HFI_PROP_PIC_ORDER_CNT_TYPE}, {QUALITY_MODE, ENC, CODECS_ALL, MSM_VIDC_MAX_QUALITY_MODE, @@ -1296,7 +1307,7 @@ static struct msm_platform_inst_capability instance_cap_data_waipio[] = { CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, {PRIORITY, DEC|ENC, CODECS_ALL, - 0, 2, 1, 1, + 0, 1 + NRT_PRIORITY_OFFSET, 1, 1 + NRT_PRIORITY_OFFSET, V4L2_CID_MPEG_VIDC_PRIORITY, HFI_PROP_SESSION_PRIORITY, CAP_FLAG_DYNAMIC_ALLOWED}, @@ -1420,7 +1431,8 @@ static struct msm_platform_inst_capability instance_cap_data_waipio[] = { {META_SEI_MASTERING_DISP, DEC, HEVC|HEIC, V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_INPUT | + V4L2_MPEG_VIDC_META_RX_OUTPUT, 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_SEI_MASTERING_DISPLAY_COLOUR, HFI_PROP_SEI_MASTERING_DISPLAY_COLOUR, @@ -1436,7 +1448,8 @@ static struct msm_platform_inst_capability instance_cap_data_waipio[] = { {META_SEI_CLL, DEC, HEVC|HEIC, V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_INPUT | + V4L2_MPEG_VIDC_META_RX_OUTPUT, 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_SEI_CONTENT_LIGHT_LEVEL, HFI_PROP_SEI_CONTENT_LIGHT_LEVEL, @@ -1452,7 +1465,8 @@ static struct msm_platform_inst_capability instance_cap_data_waipio[] = { {META_HDR10PLUS, DEC, HEVC|HEIC, V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_INPUT | + V4L2_MPEG_VIDC_META_RX_OUTPUT, 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_HDR10PLUS, HFI_PROP_SEI_HDR10PLUS_USERDATA, @@ -1478,7 +1492,8 @@ static struct msm_platform_inst_capability instance_cap_data_waipio[] = { {META_BUF_TAG, DEC, CODECS_ALL, V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_TX_INPUT | - V4L2_MPEG_VIDC_META_TX_OUTPUT | V4L2_MPEG_VIDC_META_RX_OUTPUT, + V4L2_MPEG_VIDC_META_TX_OUTPUT | V4L2_MPEG_VIDC_META_RX_INPUT | + V4L2_MPEG_VIDC_META_RX_OUTPUT, 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_BUFFER_TAG, HFI_PROP_BUFFER_TAG, @@ -1607,6 +1622,12 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_waip NULL, msm_vidc_set_u32}, + {META_OUTBUF_FENCE, DEC, H264|HEVC|VP9, + {OUTPUT_ORDER}, + {LOWLATENCY_MODE}, + NULL, + NULL}, + {HFLIP, ENC, CODECS_ALL, {0}, {0}, @@ -1712,7 +1733,8 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_waip msm_vidc_set_u32}, {BLUR_TYPES, ENC, H264|HEVC, - {PIX_FMTS, BITRATE_MODE, CONTENT_ADAPTIVE_CODING, MIN_QUALITY}, + {PIX_FMTS, BITRATE_MODE, MIN_QUALITY, + CONTENT_ADAPTIVE_CODING, META_ROI_INFO}, {BLUR_RESOLUTION}, msm_vidc_adjust_blur_type_iris2, msm_vidc_set_u32_enum}, @@ -1732,7 +1754,13 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_waip {LOWLATENCY_MODE, ENC, H264 | HEVC, {BITRATE_MODE}, {STAGE}, - msm_vidc_adjust_lowlatency_mode, + msm_vidc_adjust_enc_lowlatency_mode, + NULL}, + + {LOWLATENCY_MODE, DEC, H264|HEVC|VP9, + {META_OUTBUF_FENCE}, + {STAGE}, + msm_vidc_adjust_dec_lowlatency_mode, NULL}, {LTR_COUNT, ENC, H264|HEVC, @@ -1754,7 +1782,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_waip msm_vidc_set_use_and_mark_ltr}, {IR_PERIOD, ENC, H264|HEVC, - {BITRATE_MODE, ALL_INTRA}, + {BITRATE_MODE, ALL_INTRA, META_ROI_INFO, PIX_FMTS}, {0}, msm_vidc_adjust_ir_period, msm_vidc_set_ir_period}, @@ -1773,10 +1801,16 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_waip {CONTENT_ADAPTIVE_CODING, ENC, H264|HEVC, {BITRATE_MODE, LAYER_ENABLE, LAYER_TYPE}, - {BLUR_TYPES}, + {REQUEST_PREPROCESS}, msm_vidc_adjust_brs, msm_vidc_set_vbr_related_properties}, + {REQUEST_PREPROCESS, ENC, H264|HEVC, + {CONTENT_ADAPTIVE_CODING, META_EVA_STATS}, + {0}, + msm_vidc_adjust_preprocess, + NULL}, + {BITRATE_BOOST, ENC, H264|HEVC, {BITRATE_MODE, MIN_QUALITY}, {0}, @@ -1785,14 +1819,14 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_waip {MIN_QUALITY, ENC, H264, {BITRATE_MODE, ENH_LAYER_COUNT, META_ROI_INFO}, - {CONTENT_ADAPTIVE_CODING, BITRATE_BOOST, BLUR_TYPES}, + {BLUR_TYPES}, msm_vidc_adjust_min_quality, msm_vidc_set_vbr_related_properties}, {MIN_QUALITY, ENC, HEVC, {BITRATE_MODE, PIX_FMTS, ENH_LAYER_COUNT, META_ROI_INFO}, - {CONTENT_ADAPTIVE_CODING, BITRATE_BOOST, BLUR_TYPES}, + {BLUR_TYPES}, msm_vidc_adjust_min_quality, msm_vidc_set_vbr_related_properties}, @@ -1974,7 +2008,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_waip {SLICE_MODE, ENC, H264|HEVC, {BITRATE_MODE, ALL_INTRA}, - {0}, + {STAGE}, msm_vidc_adjust_slice_count, msm_vidc_set_slice_count}, @@ -2010,7 +2044,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_waip {OUTPUT_ORDER, DEC, H264|HEVC|VP9, {THUMBNAIL_MODE, DISPLAY_DELAY, DISPLAY_DELAY_ENABLE}, - {0}, + {META_OUTBUF_FENCE}, msm_vidc_adjust_output_order, msm_vidc_set_u32}, @@ -2050,13 +2084,19 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_waip NULL, msm_vidc_set_u32_packed}, - {STAGE, DEC|ENC, CODECS_ALL, + {STAGE, ENC|DEC, CODECS_ALL, {0}, {0}, NULL, msm_vidc_set_stage}, {STAGE, ENC, H264|HEVC, + {LOWLATENCY_MODE, SLICE_MODE}, + {0}, + NULL, + msm_vidc_set_stage}, + + {STAGE, DEC, H264|HEVC|VP9, {LOWLATENCY_MODE}, {0}, NULL, @@ -2130,7 +2170,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_waip {META_EVA_STATS, ENC, CODECS_ALL, {0}, - {ENH_LAYER_COUNT}}, + {ENH_LAYER_COUNT, REQUEST_PREPROCESS}}, {META_ROI_INFO, ENC, H264|HEVC, {BITRATE_MODE, PIX_FMTS}, From ea5082d827ae74aee135f0bb0916ba423f616af5 Mon Sep 17 00:00:00 2001 From: Deepa Guthyappa Madivalara Date: Wed, 8 Jun 2022 15:57:41 -0700 Subject: [PATCH 0641/1061] video: driver: fix for initial input_rate calculation 1. do not update input_rate until 30 inputs are received. 2. Fixes unwated downgrade from RT to NRT in UHD cases Change-Id: I8d38a64829b44a0e335b69329ac5279a7b8a782d Signed-off-by: Deepa Guthyappa Madivalara --- driver/vidc/src/msm_vidc_driver.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index eeec76162c..80963825b8 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -2419,7 +2419,7 @@ int msm_vidc_update_input_rate(struct msm_vidc_inst *inst, u64 time_us) prev_timer = input_timer; } - if (input_timer_sum_us) + if (input_timer_sum_us && counter >= INPUT_TIMER_LIST_SIZE) inst->capabilities->cap[INPUT_RATE].value = (s32)(DIV64_U64_ROUND_CLOSEST(counter * 1000000, input_timer_sum_us) << 16); From 78615ba9fc9cf2f4fd6a373d5d8cee8956871047 Mon Sep 17 00:00:00 2001 From: Mihir Ganu Date: Wed, 8 Jun 2022 20:46:32 -0700 Subject: [PATCH 0642/1061] video: driver: Calculate AV1 VSP cycles using perf model Calculate AV1 VSP cycles using calculations in Kalama perf model. For legacy codecs, VSP cycles are still calculated using legacy MB_CYCLES_VSP. Change-Id: I2535924d650bffd4da32e187fe9e84a27d03ad37 Signed-off-by: Mihir Ganu --- .../variant/iris3/src/msm_vidc_power_iris3.c | 107 +++++++++++++----- 1 file changed, 78 insertions(+), 29 deletions(-) diff --git a/driver/variant/iris3/src/msm_vidc_power_iris3.c b/driver/variant/iris3/src/msm_vidc_power_iris3.c index d289a8cc37..9d946cbea3 100644 --- a/driver/variant/iris3/src/msm_vidc_power_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_power_iris3.c @@ -139,38 +139,87 @@ u64 msm_vidc_calc_freq_iris3(struct msm_vidc_inst *inst, u32 data_size) } /* VSP */ - base_cycles = inst->has_bframe ? - 80 : inst->capabilities->cap[MB_CYCLES_VSP].value; - bitrate = fps * data_size * 8; - vsp_cycles = bitrate; + if (inst->codec == MSM_VIDC_AV1) { + /* + * For AV1: Use VSP calculations from Kalama perf model. + * For legacy codecs, use vsp_cycles based on legacy MB_CYCLES_VSP. + */ + u32 decoder_vsp_fw_overhead = 105; + u32 fw_sw_vsp_offset = 1055; + u64 vsp_hw_min_frequency = 0; + u32 input_bitrate_mbps = 0; + u32 bitrate_2stage[2] = {130, 120}; + u32 bitrate_1stage = 100; + u32 width, height; + u32 bitrate_entry, freq_entry, frequency_table_value; + struct allowed_clock_rates_table *allowed_clks_tbl; + struct v4l2_format *out_f = &inst->fmts[OUTPUT_PORT]; - if (inst->codec == MSM_VIDC_VP9) { - vsp_cycles = div_u64(vsp_cycles * 170, 100); - } else if (inst->capabilities->cap[ENTROPY_MODE].value == - V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC) { - vsp_cycles = div_u64(vsp_cycles * 135, 100); + width = out_f->fmt.pix_mp.width; + height = out_f->fmt.pix_mp.height; + + bitrate_entry = 1; + /* 8KUHD60, UHD240, 1080p960 */ + if (width * height * fps >= 3840 * 2160 * 240) + bitrate_entry = 0; + + freq_entry = bitrate_entry; + + allowed_clks_tbl = core->dt->allowed_clks_tbl; + frequency_table_value = allowed_clks_tbl[freq_entry].clock_rate / 1000000; + + input_bitrate_mbps = fps * data_size * 8 / (1024 * 1024); + vsp_hw_min_frequency = frequency_table_value * 1000 * input_bitrate_mbps; + + if (inst->capabilities->cap[STAGE].value == MSM_VIDC_STAGE_2) { + vsp_hw_min_frequency += + (bitrate_2stage[bitrate_entry] * fw_sw_vsp_offset - 1); + vsp_hw_min_frequency = div_u64(vsp_hw_min_frequency, + (bitrate_2stage[bitrate_entry] * fw_sw_vsp_offset)); + /* VSP fw overhead 1.05 */ + vsp_hw_min_frequency = div_u64(vsp_hw_min_frequency * + decoder_vsp_fw_overhead + 99, 100); + } else { + vsp_hw_min_frequency += (bitrate_1stage * fw_sw_vsp_offset - 1); + vsp_hw_min_frequency = div_u64(vsp_hw_min_frequency, + (bitrate_1stage * fw_sw_vsp_offset)); + } + + vsp_cycles = vsp_hw_min_frequency * 1000000; } else { - base_cycles = 0; - vsp_cycles = div_u64(vsp_cycles, 2); + base_cycles = inst->has_bframe ? + 80 : inst->capabilities->cap[MB_CYCLES_VSP].value; + bitrate = fps * data_size * 8; + vsp_cycles = bitrate; + + if (inst->codec == MSM_VIDC_VP9) { + vsp_cycles = div_u64(vsp_cycles * 170, 100); + } else if (inst->capabilities->cap[ENTROPY_MODE].value == + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC) { + vsp_cycles = div_u64(vsp_cycles * 135, 100); + } else { + base_cycles = 0; + vsp_cycles = div_u64(vsp_cycles, 2); + } + /* VSP FW overhead 1.05 */ + vsp_cycles = div_u64(vsp_cycles * 21, 20); + + if (inst->capabilities->cap[STAGE].value == MSM_VIDC_STAGE_1) + vsp_cycles = vsp_cycles * 3; + + vsp_cycles += mbs_per_second * base_cycles; + + /* Add 25 percent extra for 960fps use case */ + if (fps >= 960) + vsp_cycles += div_u64(vpp_cycles * 25, 100); + + if (inst->codec == MSM_VIDC_VP9 && + inst->capabilities->cap[STAGE].value == + MSM_VIDC_STAGE_2 && + inst->capabilities->cap[PIPE].value == 4 && + bitrate > 90000000) + vsp_cycles = msm_vidc_max_freq(inst); } - /* VSP FW overhead 1.05 */ - vsp_cycles = div_u64(vsp_cycles * 21, 20); - - if (inst->capabilities->cap[STAGE].value == MSM_VIDC_STAGE_1) - vsp_cycles = vsp_cycles * 3; - - vsp_cycles += mbs_per_second * base_cycles; - - /* Add 25 percent extra for 960fps use case */ - if (fps >= 960) - vsp_cycles += div_u64(vpp_cycles * 25, 100); - - if (inst->codec == MSM_VIDC_VP9 && - inst->capabilities->cap[STAGE].value == - MSM_VIDC_STAGE_2 && - inst->capabilities->cap[PIPE].value == 4 && - bitrate > 90000000) - vsp_cycles = msm_vidc_max_freq(inst); } else { i_vpr_e(inst, "%s: Unknown session type\n", __func__); return msm_vidc_max_freq(inst); From 76281289b4cf37dadcf1b17f6c8d7bfca215ad5d Mon Sep 17 00:00:00 2001 From: Maheshwar Ajja Date: Wed, 25 May 2022 13:33:57 -0700 Subject: [PATCH 0643/1061] video: use DLKM flag instead of QMAA flag to compile driver Use TARGET_KERNEL_DLKM_DISABLE and TARGET_KERNEL_DLKM_VIDEO_OVERRIDE to compile video driver. Change-Id: Id824aac78c4c0ce856ba1c92ab1bda4e679475cc Signed-off-by: Maheshwar Ajja --- Android.mk | 9 +++++---- video_kernel_board.mk | 9 +++++---- video_kernel_product.mk | 9 +++++---- 3 files changed, 15 insertions(+), 12 deletions(-) diff --git a/Android.mk b/Android.mk index 960785856b..8302bf59cd 100644 --- a/Android.mk +++ b/Android.mk @@ -1,9 +1,10 @@ # SPDX-License-Identifier: GPL-2.0-only TARGET_VIDC_ENABLE := false -ifeq ($(TARGET_USES_QMAA),false) -TARGET_VIDC_ENABLE := true -endif -ifeq ($(TARGET_USES_QMAA_OVERRIDE_VIDEO),true) +ifeq ($(TARGET_KERNEL_DLKM_DISABLE), true) + ifeq ($(TARGET_KERNEL_DLKM_VIDEO_OVERRIDE), true) + TARGET_VIDC_ENABLE := true + endif +else TARGET_VIDC_ENABLE := true endif diff --git a/video_kernel_board.mk b/video_kernel_board.mk index fe75d02f68..5f5b05b124 100644 --- a/video_kernel_board.mk +++ b/video_kernel_board.mk @@ -1,9 +1,10 @@ # SPDX-License-Identifier: GPL-2.0-only TARGET_VIDC_ENABLE := false -ifeq ($(TARGET_USES_QMAA),false) -TARGET_VIDC_ENABLE := true -endif -ifeq ($(TARGET_USES_QMAA_OVERRIDE_VIDEO),true) +ifeq ($(TARGET_KERNEL_DLKM_DISABLE), true) + ifeq ($(TARGET_KERNEL_DLKM_VIDEO_OVERRIDE), true) + TARGET_VIDC_ENABLE := true + endif +else TARGET_VIDC_ENABLE := true endif diff --git a/video_kernel_product.mk b/video_kernel_product.mk index 913d055755..a6e758958c 100644 --- a/video_kernel_product.mk +++ b/video_kernel_product.mk @@ -1,9 +1,10 @@ # SPDX-License-Identifier: GPL-2.0-only TARGET_VIDC_ENABLE := false -ifeq ($(TARGET_USES_QMAA),false) -TARGET_VIDC_ENABLE := true -endif -ifeq ($(TARGET_USES_QMAA_OVERRIDE_VIDEO),true) +ifeq ($(TARGET_KERNEL_DLKM_DISABLE), true) + ifeq ($(TARGET_KERNEL_DLKM_VIDEO_OVERRIDE), true) + TARGET_VIDC_ENABLE := true + endif +else TARGET_VIDC_ENABLE := true endif From 0c87473d7b7e472e6211f04f34a29ce0578db373 Mon Sep 17 00:00:00 2001 From: Deepa Guthyappa Madivalara Date: Tue, 14 Jun 2022 14:26:49 -0700 Subject: [PATCH 0644/1061] video: driver: initialize local variables initialize local vairables to avoid errors Change-Id: I768f3da15870ec3151cbe4eb37299c44609ebddb Signed-off-by: Deepa Guthyappa Madivalara --- driver/vidc/src/msm_vidc_driver.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 80963825b8..d5ad6dba4b 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -3217,7 +3217,7 @@ exit: static void msm_vidc_update_input_cr(struct msm_vidc_inst *inst, u32 idx, u32 cr) { - struct msm_vidc_input_cr_data *temp, *next; + struct msm_vidc_input_cr_data *temp = NULL, *next = NULL; bool found = false; list_for_each_entry_safe(temp, next, &inst->enc_input_crs, list) { @@ -3228,6 +3228,7 @@ static void msm_vidc_update_input_cr(struct msm_vidc_inst *inst, u32 idx, u32 cr } } if (!found) { + temp = NULL; if (msm_vidc_vmem_alloc(sizeof(*temp), (void **)&temp, __func__)) return; From 197328a67e67e0aefe35a00f0c078c58975c0490 Mon Sep 17 00:00:00 2001 From: Deepa Guthyappa Madivalara Date: Fri, 10 Jun 2022 14:54:56 -0700 Subject: [PATCH 0645/1061] video: driver: update bitstream buffer size calculation calculate bitstream buffer size using firware macro Change-Id: I1a06007ae8cd2852d70a426ba57119563813ebc5 Signed-off-by: Deepa Guthyappa Madivalara --- .../variant/iris3/src/msm_vidc_buffer_iris3.c | 35 ++++++++++++++++++- driver/vidc/inc/msm_vidc_buffer.h | 2 ++ driver/vidc/src/msm_vidc_buffer.c | 2 +- driver/vidc/src/msm_vidc_driver.c | 2 +- 4 files changed, 38 insertions(+), 3 deletions(-) diff --git a/driver/variant/iris3/src/msm_vidc_buffer_iris3.c b/driver/variant/iris3/src/msm_vidc_buffer_iris3.c index f84e6f662b..5acf971322 100644 --- a/driver/variant/iris3/src/msm_vidc_buffer_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_buffer_iris3.c @@ -546,6 +546,39 @@ static u32 msm_vidc_encoder_vpss_size_iris3(struct msm_vidc_inst* inst) return size; } +static u32 msm_vidc_encoder_output_size_iris3(struct msm_vidc_inst *inst) +{ + u32 frame_size; + struct v4l2_format *f; + bool is_ten_bit = false; + int bitrate_mode, frame_rc; + u32 hfi_rc_type = HFI_RC_VBR_CFR; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + f = &inst->fmts[OUTPUT_PORT]; + if (f->fmt.pix_mp.pixelformat == V4L2_PIX_FMT_HEVC || + f->fmt.pix_mp.pixelformat == V4L2_PIX_FMT_HEIC) + is_ten_bit = true; + + bitrate_mode = inst->capabilities->cap[BITRATE_MODE].value; + frame_rc = inst->capabilities->cap[FRAME_RC_ENABLE].value; + if (!frame_rc && !is_image_session(inst)) + hfi_rc_type = HFI_RC_OFF; + else if (bitrate_mode == V4L2_MPEG_VIDEO_BITRATE_MODE_CQ) + hfi_rc_type = HFI_RC_CQ; + + HFI_BUFFER_BITSTREAM_ENC(frame_size, f->fmt.pix_mp.width, + f->fmt.pix_mp.height, hfi_rc_type, is_ten_bit); + + frame_size = msm_vidc_enc_delivery_mode_based_output_buf_size(inst, frame_size); + + return frame_size; +} + struct msm_vidc_buf_type_handle { enum msm_vidc_buffer_type type; u32 (*handle)(struct msm_vidc_inst *inst); @@ -572,7 +605,7 @@ int msm_buffer_size_iris3(struct msm_vidc_inst *inst, }; static const struct msm_vidc_buf_type_handle enc_buf_type_handle[] = { {MSM_VIDC_BUF_INPUT, msm_vidc_encoder_input_size }, - {MSM_VIDC_BUF_OUTPUT, msm_vidc_encoder_output_size }, + {MSM_VIDC_BUF_OUTPUT, msm_vidc_encoder_output_size_iris3 }, {MSM_VIDC_BUF_INPUT_META, msm_vidc_encoder_input_meta_size }, {MSM_VIDC_BUF_OUTPUT_META, msm_vidc_encoder_output_meta_size }, {MSM_VIDC_BUF_BIN, msm_vidc_encoder_bin_size_iris3 }, diff --git a/driver/vidc/inc/msm_vidc_buffer.h b/driver/vidc/inc/msm_vidc_buffer.h index 16220936a5..b91fb8e169 100644 --- a/driver/vidc/inc/msm_vidc_buffer.h +++ b/driver/vidc/inc/msm_vidc_buffer.h @@ -31,5 +31,7 @@ u32 msm_vidc_encoder_input_size(struct msm_vidc_inst *inst); u32 msm_vidc_encoder_output_size(struct msm_vidc_inst *inst); u32 msm_vidc_encoder_input_meta_size(struct msm_vidc_inst *inst); u32 msm_vidc_encoder_output_meta_size(struct msm_vidc_inst *inst); +u32 msm_vidc_enc_delivery_mode_based_output_buf_size(struct msm_vidc_inst *inst, + u32 frame_size); #endif // __H_MSM_VIDC_BUFFER_H__ diff --git a/driver/vidc/src/msm_vidc_buffer.c b/driver/vidc/src/msm_vidc_buffer.c index 12ff854f7b..694217cfe7 100644 --- a/driver/vidc/src/msm_vidc_buffer.c +++ b/driver/vidc/src/msm_vidc_buffer.c @@ -313,7 +313,7 @@ u32 msm_vidc_encoder_input_size(struct msm_vidc_inst *inst) return size; } -static u32 msm_vidc_enc_delivery_mode_based_output_buf_size(struct msm_vidc_inst *inst, +u32 msm_vidc_enc_delivery_mode_based_output_buf_size(struct msm_vidc_inst *inst, u32 frame_size) { u32 slice_size; diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index eeec76162c..e2e8314acb 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -6233,7 +6233,7 @@ static bool msm_vidc_allow_image_encode_session(struct msm_vidc_inst *inst) } /* is bitrate mode CQ */ - allow = capability->cap[BITRATE_MODE].value == HFI_RC_CQ; + allow = capability->cap[BITRATE_MODE].value == V4L2_MPEG_VIDEO_BITRATE_MODE_CQ; if (!allow) { i_vpr_e(inst, "%s: bitrate mode is not CQ: %#x\n", __func__, capability->cap[BITRATE_MODE].value); From 6bf3bcb9cca4e84baef4534a3ac3cdbaa9770651 Mon Sep 17 00:00:00 2001 From: Renjiang Han Date: Wed, 15 Jun 2022 10:21:54 +0800 Subject: [PATCH 0646/1061] video: driver: vp9 1080p decoder needs to reach 180fps cts requires vp9 1080p decoder to achieve 180fps on AndroidT. Change-Id: I68f53a661cb9644dee085652e19962e3bac132c4 Signed-off-by: Renjiang Han --- driver/platform/kalama/src/msm_vidc_kalama.c | 2 +- driver/platform/waipio/src/msm_vidc_waipio.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index 5dd6cfb939..4a8f878233 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -42,7 +42,7 @@ #define AV1 MSM_VIDC_AV1 #define HEIC MSM_VIDC_HEIC #define CODECS_ALL (H264 | HEVC | VP9 | HEIC | AV1) -#define MAXIMUM_OVERRIDE_VP9_FPS 120 +#define MAXIMUM_OVERRIDE_VP9_FPS 180 static struct msm_platform_core_capability core_data_kalama[] = { /* {type, value} */ diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 3f788f6a63..503bad1367 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -39,7 +39,7 @@ #define VP9 MSM_VIDC_VP9 #define HEIC MSM_VIDC_HEIC #define CODECS_ALL (H264 | HEVC | VP9 | HEIC) -#define MAXIMUM_OVERRIDE_VP9_FPS 120 +#define MAXIMUM_OVERRIDE_VP9_FPS 180 static struct msm_platform_core_capability core_data_waipio[] = { /* {type, value} */ From e433d223a6f9ce306989d7a379077dcd330c999f Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Thu, 16 Jun 2022 19:27:20 +0530 Subject: [PATCH 0647/1061] video: driver: fix faulty msm_vidc_vmem_alloc() failures Sometimes uninitialized local pointer variables were passed to msm_vidc_vmem_alloc() call for allocating memory. Uninitialized variables might garbage value, so msm_vidc_vmem_alloc() is treating that double alloc request and returning error. So i.e leading to undefined behaviour. For e.x, msm_vidc_update_input_cr() call will never add any entries into &inst->enc_input_crs(due to above mentioned issue), So i.e leading to populate invalid input compression ratio in encoder usecase. Change-Id: I4507b343bee8eec7252cf946ad8d3120efd7bacb Signed-off-by: Govindaraj Rajagopal --- driver/platform/common/src/msm_vidc_platform.c | 2 +- driver/vidc/src/msm_vidc.c | 2 +- driver/vidc/src/msm_vidc_control.c | 2 +- driver/vidc/src/msm_vidc_debug.c | 6 +++--- driver/vidc/src/msm_vidc_fence.c | 2 +- driver/vidc/src/msm_vidc_memory.c | 2 +- driver/vidc/src/venus_hfi_response.c | 2 +- 7 files changed, 9 insertions(+), 9 deletions(-) diff --git a/driver/platform/common/src/msm_vidc_platform.c b/driver/platform/common/src/msm_vidc_platform.c index 3d7f4e92ba..dde327a89b 100644 --- a/driver/platform/common/src/msm_vidc_platform.c +++ b/driver/platform/common/src/msm_vidc_platform.c @@ -349,7 +349,7 @@ int msm_vidc_deinit_platform(struct platform_device *pdev) int msm_vidc_init_platform(struct platform_device *pdev) { int rc = 0; - struct msm_vidc_platform *platform; + struct msm_vidc_platform *platform = NULL; struct msm_vidc_core *core; if (!pdev) { diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index 79a1dd1baa..76c6836bcf 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -855,7 +855,7 @@ EXPORT_SYMBOL(msm_vidc_dqevent); void *msm_vidc_open(void *vidc_core, u32 session_type) { int rc = 0; - struct msm_vidc_inst *inst; + struct msm_vidc_inst *inst = NULL; struct msm_vidc_core *core; int i = 0; diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index fa69033a61..481cf30594 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -257,7 +257,7 @@ static inline bool is_all_parents_visited( static int add_node_list(struct list_head *list, enum msm_vidc_inst_capability_type cap_id) { int rc = 0; - struct msm_vidc_inst_cap_entry *entry; + struct msm_vidc_inst_cap_entry *entry = NULL; rc = msm_vidc_vmem_alloc(sizeof(struct msm_vidc_inst_cap_entry), (void **)&entry, __func__); diff --git a/driver/vidc/src/msm_vidc_debug.c b/driver/vidc/src/msm_vidc_debug.c index c400af67bb..00157f59b2 100644 --- a/driver/vidc/src/msm_vidc_debug.c +++ b/driver/vidc/src/msm_vidc_debug.c @@ -165,7 +165,7 @@ static ssize_t core_info_read(struct file* file, char __user* buf, size_t count, loff_t* ppos) { struct msm_vidc_core *core = file->private_data; - char* dbuf, * cur, * end; + char *cur, *end, *dbuf = NULL; ssize_t len = 0; int rc = 0; @@ -432,7 +432,7 @@ static ssize_t inst_info_read(struct file *file, char __user *buf, struct core_inst_pair *idata = file->private_data; struct msm_vidc_core *core; struct msm_vidc_inst *inst; - char *dbuf, *cur, *end; + char *cur, *end, *dbuf = NULL; int i, j; ssize_t len = 0; struct v4l2_format *f; @@ -452,7 +452,7 @@ static ssize_t inst_info_read(struct file *file, char __user *buf, return 0; } - if (msm_vidc_vmem_alloc(MAX_DBG_BUF_SIZE, (void **) &dbuf, __func__)) { + if (msm_vidc_vmem_alloc(MAX_DBG_BUF_SIZE, (void **)&dbuf, __func__)) { len = -ENOMEM; goto failed_alloc; } diff --git a/driver/vidc/src/msm_vidc_fence.c b/driver/vidc/src/msm_vidc_fence.c index 710530490d..97c97fedc1 100644 --- a/driver/vidc/src/msm_vidc_fence.c +++ b/driver/vidc/src/msm_vidc_fence.c @@ -52,7 +52,7 @@ static const struct dma_fence_ops msm_vidc_dma_fence_ops = { struct msm_vidc_fence *msm_vidc_fence_create(struct msm_vidc_inst *inst) { - struct msm_vidc_fence *fence; + struct msm_vidc_fence *fence = NULL; int rc = 0; if (!inst) { diff --git a/driver/vidc/src/msm_vidc_memory.c b/driver/vidc/src/msm_vidc_memory.c index e1fd2941e4..804817391f 100644 --- a/driver/vidc/src/msm_vidc_memory.c +++ b/driver/vidc/src/msm_vidc_memory.c @@ -473,7 +473,7 @@ int msm_vidc_memory_free(struct msm_vidc_core *core, struct msm_vidc_alloc *mem) void *msm_memory_pool_alloc(struct msm_vidc_inst *inst, enum msm_memory_pool_type type) { - struct msm_memory_alloc_header *hdr; + struct msm_memory_alloc_header *hdr = NULL; struct msm_memory_pool *pool; if (!inst || type < 0 || type >= MSM_MEM_POOL_MAX) { diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index cc720e1474..4434815e7b 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -1882,7 +1882,7 @@ void handle_session_response_work_handler(struct work_struct *work) static int queue_response_work(struct msm_vidc_inst *inst, enum response_work_type type, void *hdr, u32 hdr_size) { - struct response_work *work; + struct response_work *work = NULL; if (msm_vidc_vmem_alloc(sizeof(struct response_work), (void **)&work, __func__)) return -ENOMEM; From c6472ffcfb003d5b31a151d0d973303d6f46a756 Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Tue, 21 Jun 2022 12:56:58 -0700 Subject: [PATCH 0648/1061] video: driver: fix order of fence node delete and put delete fence node from the list and then call fence_put(). This fixes random crashes in fence testcase Change-Id: Ib2cdc3a4046a6065bff991fdebe178dddc8847b2 Signed-off-by: Darshana Patil --- driver/vidc/src/msm_vidc_fence.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/driver/vidc/src/msm_vidc_fence.c b/driver/vidc/src/msm_vidc_fence.c index 710530490d..fcd5068d61 100644 --- a/driver/vidc/src/msm_vidc_fence.c +++ b/driver/vidc/src/msm_vidc_fence.c @@ -154,16 +154,16 @@ int msm_vidc_fence_signal(struct msm_vidc_inst *inst, u32 fence_id) fence = msm_vidc_get_fence_from_id(inst, fence_id); if (!fence) { - i_vpr_e(inst, "%s: no fence available to signal with id: %u", + i_vpr_e(inst, "%s: no fence available to signal with id: %u\n", __func__, fence_id); rc = -EINVAL; goto exit; } i_vpr_l(inst, "%s: fence %s\n", __func__, fence->name); + list_del_init(&fence->list); dma_fence_signal(&fence->dma_fence); dma_fence_put(&fence->dma_fence); - list_del_init(&fence->list); exit: return rc; @@ -185,10 +185,10 @@ void msm_vidc_fence_destroy(struct msm_vidc_inst *inst, u32 fence_id) } i_vpr_e(inst, "%s: fence %s\n", __func__, fence->name); + list_del_init(&fence->list); dma_fence_set_error(&fence->dma_fence, -EINVAL); dma_fence_signal(&fence->dma_fence); dma_fence_put(&fence->dma_fence); - list_del_init(&fence->list); } int msm_vidc_fence_init(struct msm_vidc_inst *inst) From 1e7edf5b98a0a5102fbba69d7faea25a7302b4fc Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Wed, 22 Jun 2022 09:59:11 -0700 Subject: [PATCH 0649/1061] video: driver: buffer tracing changes 1. Introduce new v4l2 control to get HAL session id and print the same in driver to have unqiue session id between HAL and driver 2. Copy input buffer timestamp into input meta buffer to track input meta buffer done at HAL side. Required specially for fence use case. Change-Id: I146b153fa0baea3b684a482de5da19e736df3736 Signed-off-by: Akshata Sahukar --- driver/platform/kalama/src/msm_vidc_kalama.c | 4 ++++ driver/vidc/inc/msm_vidc_internal.h | 2 ++ driver/vidc/src/msm_vidc_control.c | 6 +++++ driver/vidc/src/msm_vidc_driver.c | 22 ++++++++++++++----- .../uapi/vidc/media/v4l2_vidc_extensions.h | 3 +++ 5 files changed, 32 insertions(+), 5 deletions(-) diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index 4a8f878233..b6005219a7 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -320,6 +320,10 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { {MB_CYCLES_FW_VPP, DEC, CODECS_ALL, 66234, 66234, 1, 66234}, + {CLIENT_ID, ENC|DEC, CODECS_ALL, + INVALID_CLIENT_ID, INT_MAX, 1, INVALID_CLIENT_ID, + V4L2_CID_MPEG_VIDC_CLIENT_ID}, + {SECURE_MODE, ENC|DEC, H264|HEVC|VP9|AV1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 387b8a9bff..2700488a58 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -64,6 +64,7 @@ #define MIN_CHROMA_QP_OFFSET -12 #define MAX_CHROMA_QP_OFFSET 0 #define INVALID_FD -1 +#define INVALID_CLIENT_ID -1 #define DCVS_WINDOW 16 #define ENC_FPS_WINDOW 3 @@ -414,6 +415,7 @@ enum msm_vidc_inst_capability_type { MB_CYCLES_LP, MB_CYCLES_FW, MB_CYCLES_FW_VPP, + CLIENT_ID, SECURE_MODE, FENCE_ID, FENCE_FD, diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 481cf30594..961222f402 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -1077,6 +1077,12 @@ static int msm_vidc_update_static_property(struct msm_vidc_inst *inst, /* update value to db */ msm_vidc_update_cap_value(inst, cap_id, ctrl->val, __func__); + if (ctrl->id == V4L2_CID_MPEG_VIDC_CLIENT_ID) { + rc = msm_vidc_update_debug_str(inst); + if (rc) + return rc; + } + if (ctrl->id == V4L2_CID_MPEG_VIDC_SECURE) { if (ctrl->val) { rc = msm_vidc_allow_secure_session(inst); diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 29feffd39e..df9dbd3a5c 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -112,6 +112,7 @@ static const struct msm_vidc_cap_name cap_name_arr[] = { {MB_CYCLES_LP, "MB_CYCLES_LP" }, {MB_CYCLES_FW, "MB_CYCLES_FW" }, {MB_CYCLES_FW_VPP, "MB_CYCLES_FW_VPP" }, + {CLIENT_ID, "CLIENT_ID" }, {SECURE_MODE, "SECURE_MODE" }, {FENCE_ID, "FENCE_ID" }, {FENCE_FD, "FENCE_FD" }, @@ -5859,8 +5860,8 @@ void msm_vidc_schedule_core_deinit(struct msm_vidc_core *core) static const char *get_codec_str(enum msm_vidc_codec_type type) { switch (type) { - case MSM_VIDC_H264: return "h264"; - case MSM_VIDC_HEVC: return "h265"; + case MSM_VIDC_H264: return " avc"; + case MSM_VIDC_HEVC: return "hevc"; case MSM_VIDC_VP9: return " vp9"; case MSM_VIDC_AV1: return " av1"; case MSM_VIDC_HEIC: return "heic"; @@ -5872,8 +5873,8 @@ static const char *get_codec_str(enum msm_vidc_codec_type type) static const char *get_domain_str(enum msm_vidc_domain_type type) { switch (type) { - case MSM_VIDC_ENCODER: return "e"; - case MSM_VIDC_DECODER: return "d"; + case MSM_VIDC_ENCODER: return "E"; + case MSM_VIDC_DECODER: return "D"; } return "."; @@ -5882,6 +5883,7 @@ static const char *get_domain_str(enum msm_vidc_domain_type type) int msm_vidc_update_debug_str(struct msm_vidc_inst *inst) { u32 sid; + int client_id = INVALID_CLIENT_ID; const char *codec; const char *domain; @@ -5889,10 +5891,20 @@ int msm_vidc_update_debug_str(struct msm_vidc_inst *inst) d_vpr_e("%s: Invalid params\n", __func__); return -EINVAL; } + + if (inst->capabilities) + client_id = inst->capabilities->cap[CLIENT_ID].value; + sid = inst->session_id; codec = get_codec_str(inst->codec); domain = get_domain_str(inst->domain); - snprintf(inst->debug_str, sizeof(inst->debug_str), "%08x: %s%s", sid, codec, domain); + if (client_id != INVALID_CLIENT_ID) { + snprintf(inst->debug_str, sizeof(inst->debug_str), "%08x: %s%s_%d", + sid, codec, domain, client_id); + } else { + snprintf(inst->debug_str, sizeof(inst->debug_str), "%08x: %s%s", + sid, codec, domain); + } d_vpr_h("%s: sid: %08x, codec: %s, domain: %s, final: %s\n", __func__, sid, codec, domain, inst->debug_str); diff --git a/include/uapi/vidc/media/v4l2_vidc_extensions.h b/include/uapi/vidc/media/v4l2_vidc_extensions.h index b0b296471b..bdd685b5f3 100644 --- a/include/uapi/vidc/media/v4l2_vidc_extensions.h +++ b/include/uapi/vidc/media/v4l2_vidc_extensions.h @@ -265,6 +265,9 @@ enum v4l2_h264_encode_delivery_mode { #define V4L2_CID_MPEG_VIDC_METADATA_DOLBY_RPU \ (V4L2_CID_MPEG_VIDC_BASE + 0x40) +#define V4L2_CID_MPEG_VIDC_CLIENT_ID \ + (V4L2_CID_MPEG_VIDC_BASE + 0x41) + /* add new controls above this line */ /* Deprecate below controls once availble in gki and gsi bionic header */ #ifndef V4L2_CID_MPEG_VIDEO_BASELAYER_PRIORITY_ID From 1f2238abb9194c7dc1ecfdbc191a53c8e524b080 Mon Sep 17 00:00:00 2001 From: Manikanta Kanamarlapudi Date: Thu, 23 Jun 2022 09:52:12 +0530 Subject: [PATCH 0650/1061] video: Allow slice configuration for VBR Allow slice configuration for VBR Change-Id: I289aa22fa9c97260b32dc34a1f95ad8b1b500287 --- driver/vidc/src/msm_vidc_control.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 481cf30594..92b5a375df 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -1749,7 +1749,8 @@ int msm_vidc_adjust_slice_count(void *instance, struct v4l2_ctrl *ctrl) if (fps > MAX_SLICES_FRAME_RATE || (rc_type != HFI_RC_OFF && rc_type != HFI_RC_CBR_CFR && - rc_type != HFI_RC_CBR_VFR) || + rc_type != HFI_RC_CBR_VFR && + rc_type != HFI_RC_VBR_CFR) || all_intra) { adjusted_value = V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE; update_cap = SLICE_MODE; From cd4ea5b043b509df72e46f6799070fd0de7a1118 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Thu, 23 Jun 2022 19:30:07 +0530 Subject: [PATCH 0651/1061] video: driver: fix possible memory corruption issue __flush_debug_queue() currently uses core->response_packet or core->packet for flushing debug queue. So these were allocated only 4096 bytes, but in read_queue(), boundaries were checked against VIDC_IFACEQ_VAR_HUGE_PKT_SIZE macro which is of size 1024 * 12 bytes. So if FW log packet size is in between 4 KB to 12 KB then read_queue() allows memcpy() into core->response_packet or core->packet that will lead to redzone corruption issue with adjacent alive/valid allocations i.e futher lead to kernel panic at kfree() sequence(during object validation). Uploaded change to use same sizes during allocation and read_queue() validation. Change-Id: If82766c1479d7589605386f3e314ff2ccd97f6d0 Signed-off-by: Govindaraj Rajagopal --- driver/vidc/inc/msm_vidc_internal.h | 2 +- driver/vidc/src/msm_vidc_probe.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 387b8a9bff..ef0584790d 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -82,7 +82,7 @@ #define VIDC_IFACEQ_MIN_PKT_SIZE 8 #define VIDC_IFACEQ_VAR_SMALL_PKT_SIZE 100 #define VIDC_IFACEQ_VAR_LARGE_PKT_SIZE 512 -#define VIDC_IFACEQ_VAR_HUGE_PKT_SIZE (1024*12) +#define VIDC_IFACEQ_VAR_HUGE_PKT_SIZE (1024*4) #define NUM_MBS_PER_SEC(__height, __width, __fps) \ (NUM_MBS_PER_FRAME(__height, __width) * __fps) diff --git a/driver/vidc/src/msm_vidc_probe.c b/driver/vidc/src/msm_vidc_probe.c index 08b4303f64..77c09b3d4c 100644 --- a/driver/vidc/src/msm_vidc_probe.c +++ b/driver/vidc/src/msm_vidc_probe.c @@ -306,7 +306,7 @@ static int msm_vidc_initialize_core(struct msm_vidc_core *core) goto exit; } - core->packet_size = 4096; + core->packet_size = VIDC_IFACEQ_VAR_HUGE_PKT_SIZE; rc = msm_vidc_vmem_alloc(core->packet_size, (void **)&core->packet, "core packet"); if (rc) From 9f8cff04a3634e9bc5734e559be9863a3115c033 Mon Sep 17 00:00:00 2001 From: Vedang Nagar Date: Sun, 12 Jun 2022 12:57:48 +0530 Subject: [PATCH 0652/1061] video: driver: Modify Min QP for 8 and 10 bit usecase As part of firmware stress test with QP range of [0, 5], FW gets a divide by zero exception with QP 0, and RC validation happens with QP range of [1, MaxQP]. Modifing Min QP from 0 to 1 for 8 bit and from -12 to -11 for 10 bit usecases to avoid multiple FW issues. Change-Id: I29d8fd785cfafbcb1b73984b3f79900307c22c10 Signed-off-by: Vedang Nagar --- driver/platform/kalama/src/msm_vidc_kalama.c | 4 ++-- driver/platform/waipio/src/msm_vidc_waipio.c | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index 4a8f878233..ec1ffd6999 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -23,8 +23,8 @@ #define DEFAULT_BITRATE 20000000 #define MINIMUM_FPS 1 #define MAXIMUM_FPS 480 -#define MIN_QP_10BIT -12 -#define MIN_QP_8BIT 0 +#define MIN_QP_10BIT -11 +#define MIN_QP_8BIT 1 #define MAX_QP 51 #define DEFAULT_QP 20 #define MAX_CONSTANT_QUALITY 100 diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 503bad1367..96e6160d38 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -21,8 +21,8 @@ #define DEFAULT_BITRATE 20000000 #define MINIMUM_FPS 1 #define MAXIMUM_FPS 480 -#define MIN_QP_10BIT -12 -#define MIN_QP_8BIT 0 +#define MIN_QP_10BIT -11 +#define MIN_QP_8BIT 1 #define MAX_QP 51 #define DEFAULT_QP 20 #define MAX_CONSTANT_QUALITY 100 From 2eacac605821ddc4c85620a1aa7b40f5f3133a28 Mon Sep 17 00:00:00 2001 From: Vedang Nagar Date: Thu, 23 Jun 2022 13:58:09 +0530 Subject: [PATCH 0653/1061] video: driver: Modify Min QP in CAP_TO_8BIT_QP macro For HEVC 8 bit usecase, QP values are being capped from [-11,51] to [1,51]. Modifying the same in CAP_TO_8BIT_QP macro. Change-Id: Id17fab4c62770140131f0f8454fc480090732d0b Signed-off-by: Vedang Nagar --- driver/platform/kalama/src/msm_vidc_kalama.c | 2 -- driver/platform/waipio/src/msm_vidc_waipio.c | 2 -- driver/vidc/inc/msm_vidc_internal.h | 2 ++ driver/vidc/src/msm_vidc_control.c | 4 ++-- 4 files changed, 4 insertions(+), 6 deletions(-) diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index ec1ffd6999..a1c272e8a9 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -23,8 +23,6 @@ #define DEFAULT_BITRATE 20000000 #define MINIMUM_FPS 1 #define MAXIMUM_FPS 480 -#define MIN_QP_10BIT -11 -#define MIN_QP_8BIT 1 #define MAX_QP 51 #define DEFAULT_QP 20 #define MAX_CONSTANT_QUALITY 100 diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 96e6160d38..75a0f89e14 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -21,8 +21,6 @@ #define DEFAULT_BITRATE 20000000 #define MINIMUM_FPS 1 #define MAXIMUM_FPS 480 -#define MIN_QP_10BIT -11 -#define MIN_QP_8BIT 1 #define MAX_QP 51 #define DEFAULT_QP 20 #define MAX_CONSTANT_QUALITY 100 diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 387b8a9bff..789638edde 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -63,6 +63,8 @@ #define MAX_SUPPORTED_MIN_QUALITY 70 #define MIN_CHROMA_QP_OFFSET -12 #define MAX_CHROMA_QP_OFFSET 0 +#define MIN_QP_10BIT -11 +#define MIN_QP_8BIT 1 #define INVALID_FD -1 #define DCVS_WINDOW 16 diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 481cf30594..86d884ef89 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -15,8 +15,8 @@ #include "msm_vidc_platform.h" #define CAP_TO_8BIT_QP(a) { \ - if ((a) < 0) \ - (a) = 0; \ + if ((a) < MIN_QP_8BIT) \ + (a) = MIN_QP_8BIT; \ } extern struct msm_vidc_core *g_core; From b4b05a5f97afcdf23a8673afbc0cb69782bf7024 Mon Sep 17 00:00:00 2001 From: Deepa Guthyappa Madivalara Date: Fri, 24 Jun 2022 14:09:12 -0700 Subject: [PATCH 0654/1061] video: driver: allow turbo for av1 and concurrent sessions allow turbo clk for av1 session or concurrent session otherwise limit to nominal always Change-Id: If2280bb3756e99cda018c7ec1767aa1c32e36228 Signed-off-by: Deepa Guthyappa Madivalara --- driver/variant/iris3/src/msm_vidc_power_iris3.c | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/driver/variant/iris3/src/msm_vidc_power_iris3.c b/driver/variant/iris3/src/msm_vidc_power_iris3.c index 9d946cbea3..39626c8321 100644 --- a/driver/variant/iris3/src/msm_vidc_power_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_power_iris3.c @@ -29,7 +29,7 @@ u64 msm_vidc_calc_freq_iris3(struct msm_vidc_inst *inst, u32 data_size) } core = inst->core; - if (!core->dt) { + if (!core->dt || !core->dt->allowed_clks_tbl) { d_vpr_e("%s: invalid params\n", __func__); return freq; } @@ -228,6 +228,16 @@ u64 msm_vidc_calc_freq_iris3(struct msm_vidc_inst *inst, u32 data_size) freq = max(vpp_cycles, vsp_cycles); freq = max(freq, fw_cycles); + if (inst->codec != MSM_VIDC_AV1) { + /* + * for non-AV1 codecs limit the frequency to NOM only + * index 0 is TURBO, index 1 is NOM clock rate + */ + if (core->dt->allowed_clks_tbl_size >= 2 && + freq > core->dt->allowed_clks_tbl[1].clock_rate) + freq = core->dt->allowed_clks_tbl[1].clock_rate; + } + i_vpr_p(inst, "%s: filled len %d, required freq %llu, fps %u, mbpf %u\n", __func__, data_size, freq, fps, mbpf); From 06643c1de93295b9e6dda62ed194e23d4588d1a7 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Tue, 28 Jun 2022 11:25:59 +0530 Subject: [PATCH 0655/1061] video: driver: fix use-after-free issues with __read_queue() api Incase of synchronous cmd(HFI_CMD_INIT, HFI_CMD_STOP, HFI_CMD_CLOSE) timeout cases, video driver will attempt to do core_deinit sequence and will free all interface queues mappings as part of core_deinit. If at same time ISR handler is fired then reverse thread will attempt to dequeue packets from message and debug queue. Reverse thread will not acquire core->lock for performance reasone. Dequeueing packets without acquiring core->lock might lead to use-after-free issues. Uploaded change to address above mentioned issue. Change-Id: I2047b28d69611129c4fdefcfb8a843c895e11dbb Signed-off-by: Govindaraj Rajagopal --- driver/vidc/inc/venus_hfi.h | 2 ++ driver/vidc/src/msm_vidc_probe.c | 10 ++++++++++ driver/vidc/src/venus_hfi.c | 18 +++++++----------- driver/vidc/src/venus_hfi_response.c | 2 +- 4 files changed, 20 insertions(+), 12 deletions(-) diff --git a/driver/vidc/inc/venus_hfi.h b/driver/vidc/inc/venus_hfi.h index ba41ad24dc..9f43c4484f 100644 --- a/driver/vidc/inc/venus_hfi.h +++ b/driver/vidc/inc/venus_hfi.h @@ -68,6 +68,8 @@ int venus_hfi_set_ir_period(struct msm_vidc_inst *inst, u32 ir_type, void venus_hfi_pm_work_handler(struct work_struct *work); irqreturn_t venus_hfi_isr(int irq, void *data); irqreturn_t venus_hfi_isr_handler(int irq, void *data); +int venus_hfi_interface_queues_init(struct msm_vidc_core *core); +void venus_hfi_interface_queues_deinit(struct msm_vidc_core *core); int __write_register_masked(struct msm_vidc_core *core, u32 reg, u32 value, u32 mask); diff --git a/driver/vidc/src/msm_vidc_probe.c b/driver/vidc/src/msm_vidc_probe.c index 77c09b3d4c..8f31a20ed2 100644 --- a/driver/vidc/src/msm_vidc_probe.c +++ b/driver/vidc/src/msm_vidc_probe.c @@ -359,6 +359,8 @@ static int msm_vidc_remove_video_device(struct platform_device *pdev) msm_vidc_core_deinit(core, true); + venus_hfi_interface_queues_deinit(core); + d_vpr_h("depopulating sub devices\n"); /* * Trigger remove for each sub-device i.e. qcom,msm-vidc,context-bank. @@ -547,6 +549,12 @@ static int msm_vidc_probe_video_device(struct platform_device *pdev) goto sub_dev_failed; } + rc = venus_hfi_interface_queues_init(core); + if (rc) { + d_vpr_e("%s: interface queues init failed\n", __func__); + goto queues_init_failed; + } + rc = msm_vidc_core_init(core); if (rc) { d_vpr_e("%s: sys init failed\n", __func__); @@ -557,6 +565,8 @@ static int msm_vidc_probe_video_device(struct platform_device *pdev) return rc; core_init_failed: + venus_hfi_interface_queues_deinit(core); +queues_init_failed: of_platform_depopulate(&pdev->dev); sub_dev_failed: #ifdef CONFIG_MEDIA_CONTROLLER diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index e3f1f2b4ae..793bb5f577 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -2203,7 +2203,7 @@ static void __set_queue_hdr_defaults(struct hfi_queue_header *q_hdr) q_hdr->qhdr_write_idx = 0x0; } -static void __interface_queues_deinit(struct msm_vidc_core *core) +void venus_hfi_interface_queues_deinit(struct msm_vidc_core *core) { int i; @@ -2227,7 +2227,7 @@ static void __interface_queues_deinit(struct msm_vidc_core *core) core->sfr.align_device_addr = 0; } -static int __interface_queues_init(struct msm_vidc_core *core) +int venus_hfi_interface_queues_init(struct msm_vidc_core *core) { int rc = 0; struct hfi_queue_table_header *q_tbl_hdr; @@ -2342,10 +2342,6 @@ static int __interface_queues_init(struct msm_vidc_core *core) /* write sfr buffer size in first word */ *((u32 *)core->sfr.align_virtual_addr) = core->sfr.mem_size; - rc = call_venus_op(core, setup_ucregion_memmap, core); - if (rc) - return rc; - return 0; fail_alloc_queue: return -ENOMEM; @@ -2501,6 +2497,11 @@ int __load_fw(struct msm_vidc_core *core) __hand_off_regulators(core); trace_msm_v4l2_vidc_fw_load("END"); + /* configure interface_queues memory to firmware */ + rc = call_venus_op(core, setup_ucregion_memmap, core); + if (rc) + return rc; + return rc; fail_protect_mem: if (core->dt->fw_cookie) @@ -2704,10 +2705,6 @@ int venus_hfi_core_init(struct msm_vidc_core *core) if (rc) goto error; - rc = __interface_queues_init(core); - if (rc) - goto error; - rc = call_venus_op(core, boot_firmware, core); if (rc) goto error; @@ -2772,7 +2769,6 @@ int venus_hfi_core_deinit(struct msm_vidc_core *core, bool force) */ if (msm_vidc_fw_dump) fw_coredump(core); - __interface_queues_deinit(core); return 0; } diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index 4434815e7b..59feef7d93 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -1945,7 +1945,7 @@ static int handle_session_response(struct msm_vidc_core *core, inst = get_inst(core, hdr->session_id); if (!inst) { - d_vpr_e("%s: Invalid params\n", __func__); + d_vpr_e("%s: Invalid inst\n", __func__); return -EINVAL; } From 10794c2968a2d6d91575702087245afb72d16f28 Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Thu, 2 Jun 2022 10:42:56 -0700 Subject: [PATCH 0656/1061] video: driver: initial state machine changes - hierarchical state model which comprises of top level states and sub states - top level states include OPEN, CLOSE, ERROR, INPUT_STREAMING, OUTPUT_STREAMING, STREAMING. - sub states include DRAIN, DRC, DRAIN_LAST_BUFFER, DRC_LAST_BUFFER, INPUT_PAUSE, OUTPUT_PAUSE. - follows deterministic approach for key sequences like DRC, DRAIN and last flag handling i.e none of these events are ignored or discarded. - removal of auto start of firmware input port as part of ipsc handling. - introduction of hfi commands for host controlled PAUSE and RESUME of firmware ports. - introduction of information last flag packets for DRC and DRAIN when FW has insufficient output buffers. Change-Id: Ie8c8f44af464d06f5a7bb76822f749c9874f869a Signed-off-by: Darshana Patil --- driver/platform/kalama/src/msm_vidc_kalama.c | 5 + driver/vidc/inc/hfi_command.h | 8 +- driver/vidc/inc/hfi_property.h | 4 + driver/vidc/inc/msm_media_info.h | 2 +- driver/vidc/inc/msm_vidc_driver.h | 40 +- driver/vidc/inc/msm_vidc_inst.h | 43 +- driver/vidc/inc/msm_vidc_internal.h | 14 +- driver/vidc/inc/venus_hfi.h | 4 + driver/vidc/inc/venus_hfi_response.h | 5 - driver/vidc/src/msm_vdec.c | 79 +- driver/vidc/src/msm_venc.c | 29 +- driver/vidc/src/msm_vidc.c | 11 +- driver/vidc/src/msm_vidc_driver.c | 877 ++++++++++-------- driver/vidc/src/msm_vidc_vb2.c | 16 +- driver/vidc/src/venus_hfi.c | 131 +++ driver/vidc/src/venus_hfi_response.c | 420 ++++----- .../uapi/vidc/media/v4l2_vidc_extensions.h | 16 + 17 files changed, 966 insertions(+), 738 deletions(-) diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index 693b0be4c2..c4dbd9d5d3 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -1455,6 +1455,11 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { HFI_PROP_AV1_DRAP_CONFIG, CAP_FLAG_INPUT_PORT}, + {LAST_FLAG_EVENT_ENABLE, DEC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_LAST_FLAG_EVENT_ENABLE}, + {META_BITSTREAM_RESOLUTION, DEC, AV1, V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_INPUT | diff --git a/driver/vidc/inc/hfi_command.h b/driver/vidc/inc/hfi_command.h index c037e34595..33f9eb391e 100644 --- a/driver/vidc/inc/hfi_command.h +++ b/driver/vidc/inc/hfi_command.h @@ -116,6 +116,7 @@ enum hfi_buffer_firmware_flags { HFI_BUF_FW_FLAG_READONLY = 0x00000010, HFI_BUF_FW_FLAG_CODEC_CONFIG = 0x00000100, HFI_BUF_FW_FLAG_LAST = 0x10000000, + HFI_BUF_FW_FLAG_PSC_LAST = 0x20000000, }; enum hfi_metapayload_header_flags { @@ -165,22 +166,23 @@ enum hfi_reserve_type { #define HFI_CMD_DELIVERY_MODE 0x0100000A #define HFI_CMD_SUBSCRIBE_MODE 0x0100000B #define HFI_CMD_SETTINGS_CHANGE 0x0100000C -#define HFI_CMD_RESERVE 0x0100000F #define HFI_SSR_TYPE_SW_ERR_FATAL 0x1 #define HFI_SSR_TYPE_SW_DIV_BY_ZERO 0x2 #define HFI_SSR_TYPE_CPU_WDOG_IRQ 0x3 #define HFI_SSR_TYPE_NOC_ERROR 0x4 - #define HFI_BITMASK_HW_CLIENT_ID 0x000000f0 #define HFI_BITMASK_SSR_TYPE 0x0000000f #define HFI_CMD_SSR 0x0100000D #define HFI_STABILITY_TYPE_VCODEC_HUNG 0x1 #define HFI_STABILITY_TYPE_ENC_BUFFER_FULL 0x2 -#define HFI_BITMASK_STABILITY_TYPE 0x0000000f +#define HFI_BITMASK_STABILITY_TYPE 0x0000000f #define HFI_CMD_STABILITY 0x0100000E +#define HFI_CMD_RESERVE 0x0100000F +#define HFI_CMD_FLUSH 0x01000010 +#define HFI_CMD_PAUSE 0x01000011 #define HFI_CMD_END 0x01FFFFFF #endif //__H_HFI_COMMAND_H__ diff --git a/driver/vidc/inc/hfi_property.h b/driver/vidc/inc/hfi_property.h index 0899ecf799..2661837ff4 100644 --- a/driver/vidc/inc/hfi_property.h +++ b/driver/vidc/inc/hfi_property.h @@ -607,6 +607,10 @@ enum hfi_saliency_type { #define HFI_INFO_VCODEC_RESET 0x06000005 +#define HFI_INFO_HFI_FLAG_DRAIN_LAST 0x06000006 + +#define HFI_INFO_HFI_FLAG_PSC_LAST 0x06000007 + #define HFI_INFORMATION_END 0x06FFFFFF #endif //__H_HFI_PROPERTY_H__ diff --git a/driver/vidc/inc/msm_media_info.h b/driver/vidc/inc/msm_media_info.h index 3443c8aa89..a1b1c95e9b 100644 --- a/driver/vidc/inc/msm_media_info.h +++ b/driver/vidc/inc/msm_media_info.h @@ -520,7 +520,6 @@ static inline unsigned int VIDEO_RAW_BUFFER_SIZE(unsigned int v4l2_fmt, uv_meta_scanlines, 4096); size = (y_ubwc_plane + uv_ubwc_plane + y_meta_plane + uv_meta_plane); - size = MSM_MEDIA_ALIGN(size, 4096); } else { if (pix_width <= INTERLACE_WIDTH_MAX && pix_height <= INTERLACE_HEIGHT_MAX && @@ -597,6 +596,7 @@ static inline unsigned int VIDEO_RAW_BUFFER_SIZE(unsigned int v4l2_fmt, } invalid_input: + size = MSM_MEDIA_ALIGN(size, 4096); return size; } diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 998b390ad2..1edf31fc43 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -352,6 +352,17 @@ static inline bool is_enc_slice_delivery_mode(struct msm_vidc_inst *inst) V4L2_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE_SLICE_BASED))); } +static inline bool is_state(struct msm_vidc_inst *inst, enum msm_vidc_state state) +{ + return inst->state == state; +} + +static inline bool is_sub_state(struct msm_vidc_inst *inst, + enum msm_vidc_sub_state sub_state) +{ + return (inst->sub_state & sub_state); +} + const char *cap_name(enum msm_vidc_inst_capability_type cap_id); const char *v4l2_pixelfmt_name(u32 pixelfmt); const char *v4l2_type_name(u32 port); @@ -382,10 +393,13 @@ u32 v4l2_matrix_coeff_from_driver(struct msm_vidc_inst *inst, int v4l2_type_to_driver_port(struct msm_vidc_inst *inst, u32 type, const char *func); const char *allow_name(enum msm_vidc_allow allow); -const char *state_name(enum msm_vidc_inst_state state); +const char *state_name(enum msm_vidc_state state); const char *core_state_name(enum msm_vidc_core_state state); -int msm_vidc_change_inst_state(struct msm_vidc_inst *inst, - enum msm_vidc_inst_state request_state, const char *func); +int msm_vidc_change_state(struct msm_vidc_inst *inst, + enum msm_vidc_state request_state, const char *func); +int msm_vidc_change_sub_state(struct msm_vidc_inst *inst, + enum msm_vidc_sub_state clear_sub_states, + enum msm_vidc_sub_state set_sub_states, const char *func); int msm_vidc_create_internal_buffer(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type buffer_type, u32 index); int msm_vidc_get_internal_buffers(struct msm_vidc_inst *inst, @@ -406,8 +420,6 @@ int msm_vidc_session_open(struct msm_vidc_inst *inst); int msm_vidc_session_set_codec(struct msm_vidc_inst *inst); int msm_vidc_session_set_secure_mode(struct msm_vidc_inst *inst); int msm_vidc_session_set_default_header(struct msm_vidc_inst *inst); -int msm_vidc_session_streamon(struct msm_vidc_inst *inst, - enum msm_vidc_port_type port); int msm_vidc_session_streamoff(struct msm_vidc_inst *inst, enum msm_vidc_port_type port); int msm_vidc_session_close(struct msm_vidc_inst *inst); @@ -502,13 +514,21 @@ bool msm_vidc_allow_streamon(struct msm_vidc_inst *inst, u32 type); enum msm_vidc_allow msm_vidc_allow_streamoff(struct msm_vidc_inst *inst, u32 type); enum msm_vidc_allow msm_vidc_allow_qbuf(struct msm_vidc_inst *inst, u32 type); enum msm_vidc_allow msm_vidc_allow_input_psc(struct msm_vidc_inst *inst); -bool msm_vidc_allow_last_flag(struct msm_vidc_inst *inst); +bool msm_vidc_allow_drain_last_flag(struct msm_vidc_inst *inst); +bool msm_vidc_allow_psc_last_flag(struct msm_vidc_inst *inst); int msm_vidc_state_change_streamon(struct msm_vidc_inst *inst, u32 type); int msm_vidc_state_change_streamoff(struct msm_vidc_inst *inst, u32 type); -int msm_vidc_state_change_stop(struct msm_vidc_inst *inst); -int msm_vidc_state_change_start(struct msm_vidc_inst *inst); int msm_vidc_state_change_input_psc(struct msm_vidc_inst *inst); -int msm_vidc_state_change_last_flag(struct msm_vidc_inst *inst); +int msm_vidc_state_change_drain_last_flag(struct msm_vidc_inst *inst); +int msm_vidc_state_change_psc_last_flag(struct msm_vidc_inst *inst); +int msm_vidc_process_drain(struct msm_vidc_inst *inst); +int msm_vidc_process_resume(struct msm_vidc_inst *inst); +int msm_vidc_process_streamon(struct msm_vidc_inst *inst, u32 type); +int msm_vidc_process_stop_done(struct msm_vidc_inst *inst, + enum signal_session_response signal_type); +int msm_vidc_process_drain_done(struct msm_vidc_inst *inst); +int msm_vidc_process_drain_last_flag(struct msm_vidc_inst *inst); +int msm_vidc_process_psc_last_flag(struct msm_vidc_inst *inst); int msm_vidc_get_mbs_per_frame(struct msm_vidc_inst *inst); u32 msm_vidc_get_max_bitrate(struct msm_vidc_inst* inst); int msm_vidc_get_fps(struct msm_vidc_inst *inst); @@ -557,6 +577,8 @@ bool res_is_less_than(u32 width, u32 height, u32 ref_width, u32 ref_height); bool res_is_less_than_or_equal_to(u32 width, u32 height, u32 ref_width, u32 ref_height); +int signal_session_msg_receipt(struct msm_vidc_inst *inst, + enum signal_session_response cmd); int msm_vidc_get_properties(struct msm_vidc_inst *inst); int msm_vidc_create_input_metadata_buffer(struct msm_vidc_inst *inst, int buf_fd); int msm_vidc_update_input_meta_buffer_index(struct msm_vidc_inst *inst, struct vb2_buffer *vb2); diff --git a/driver/vidc/inc/msm_vidc_inst.h b/driver/vidc/inc/msm_vidc_inst.h index cac6126da0..954e519762 100644 --- a/driver/vidc/inc/msm_vidc_inst.h +++ b/driver/vidc/inc/msm_vidc_inst.h @@ -75,19 +75,30 @@ struct msm_vidc_buffers_info { struct msm_vidc_buffers partial_data; }; -enum msm_vidc_inst_state { +enum msm_vidc_state { MSM_VIDC_OPEN = 1, - MSM_VIDC_START_INPUT = 2, - MSM_VIDC_START_OUTPUT = 3, - MSM_VIDC_START = 4, - MSM_VIDC_DRC = 5, - MSM_VIDC_DRC_LAST_FLAG = 6, - MSM_VIDC_DRAIN = 7, - MSM_VIDC_DRAIN_LAST_FLAG = 8, - MSM_VIDC_DRC_DRAIN = 9, - MSM_VIDC_DRC_DRAIN_LAST_FLAG = 10, - MSM_VIDC_DRAIN_START_INPUT = 11, - MSM_VIDC_ERROR = 12, + MSM_VIDC_INPUT_STREAMING = 2, + MSM_VIDC_OUTPUT_STREAMING = 3, + MSM_VIDC_STREAMING = 4, + MSM_VIDC_CLOSE = 5, + MSM_VIDC_ERROR = 6, +}; + +#define MSM_VIDC_SUB_STATE_NONE 0 +#define MSM_VIDC_MAX_SUB_STATES 6 +/* + * max value of inst->sub_state if all + * the 6 valid bits are set i.e 111111==>63 + */ +#define MSM_VIDC_MAX_SUB_STATE_VALUE ((1 << MSM_VIDC_MAX_SUB_STATES) - 1) + +enum msm_vidc_sub_state { + MSM_VIDC_DRAIN = BIT(0), + MSM_VIDC_DRC = BIT(1), + MSM_VIDC_DRAIN_LAST_BUFFER = BIT(2), + MSM_VIDC_DRC_LAST_BUFFER = BIT(3), + MSM_VIDC_INPUT_PAUSE = BIT(4), + MSM_VIDC_OUTPUT_PAUSE = BIT(5), }; struct buf_queue { @@ -99,7 +110,9 @@ struct msm_vidc_inst { struct mutex lock; struct mutex request_lock; struct mutex client_lock; - enum msm_vidc_inst_state state; + enum msm_vidc_state state; + enum msm_vidc_sub_state sub_state; + char sub_state_name[MAX_NAME_LENGTH]; enum msm_vidc_domain_type domain; enum msm_vidc_codec_type codec; void *core; @@ -138,12 +151,10 @@ struct msm_vidc_inst { struct msm_vidc_decode_batch decode_batch; struct msm_vidc_decode_vpp_delay decode_vpp_delay; struct msm_vidc_session_idle session_idle; - struct delayed_work response_work; struct delayed_work stats_work; struct work_struct stability_work; struct msm_vidc_stability stability; - struct workqueue_struct *response_workq; - struct list_head response_works; /* list of struct response_work */ + struct workqueue_struct *workq; struct list_head enc_input_crs; struct list_head dmabuf_tracker; /* list of struct msm_memory_dmabuf */ struct list_head input_timer_list; /* list of struct msm_vidc_input_timer */ diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 4eacba6c0d..54843ba6f0 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -500,6 +500,7 @@ enum msm_vidc_inst_capability_type { CAVLC_MAX_BITRATE, ALLINTRA_MAX_BITRATE, LOWLATENCY_MAX_BITRATE, + LAST_FLAG_EVENT_ENABLE, /* place all root(no parent) enums before this line */ PROFILE, @@ -940,19 +941,6 @@ enum msm_vidc_allow { MSM_VIDC_IGNORE, }; -enum response_work_type { - RESP_WORK_INPUT_PSC = 1, - RESP_WORK_OUTPUT_PSC, - RESP_WORK_LAST_FLAG, -}; - -struct response_work { - struct list_head list; - enum response_work_type type; - void *data; - u32 data_size; -}; - struct msm_vidc_ssr { bool trigger; enum msm_vidc_ssr_trigger_type ssr_type; diff --git a/driver/vidc/inc/venus_hfi.h b/driver/vidc/inc/venus_hfi.h index ba41ad24dc..7c60d9235b 100644 --- a/driver/vidc/inc/venus_hfi.h +++ b/driver/vidc/inc/venus_hfi.h @@ -49,6 +49,10 @@ int venus_hfi_start(struct msm_vidc_inst *inst, enum msm_vidc_port_type port); int venus_hfi_stop(struct msm_vidc_inst *inst, enum msm_vidc_port_type port); int venus_hfi_session_close(struct msm_vidc_inst *inst); int venus_hfi_session_open(struct msm_vidc_inst *inst); +int venus_hfi_session_pause(struct msm_vidc_inst *inst, enum msm_vidc_port_type port); +int venus_hfi_session_resume(struct msm_vidc_inst *inst, + enum msm_vidc_port_type port, u32 payload); +int venus_hfi_session_drain(struct msm_vidc_inst *inst, enum msm_vidc_port_type port); int venus_hfi_session_set_codec(struct msm_vidc_inst *inst); int venus_hfi_session_set_secure_mode(struct msm_vidc_inst *inst); int venus_hfi_core_init(struct msm_vidc_core *core); diff --git a/driver/vidc/inc/venus_hfi_response.h b/driver/vidc/inc/venus_hfi_response.h index 83e05dd9a9..ebd19e9d68 100644 --- a/driver/vidc/inc/venus_hfi_response.h +++ b/driver/vidc/inc/venus_hfi_response.h @@ -16,11 +16,6 @@ bool is_valid_port(struct msm_vidc_inst *inst, u32 port, const char *func); bool is_valid_hfi_buffer_type(struct msm_vidc_inst *inst, u32 buffer_type, const char *func); -void handle_session_response_work_handler(struct work_struct *work); -int handle_session_response_work(struct msm_vidc_inst *inst, - struct response_work *work); -int cancel_response_work(struct msm_vidc_inst *inst); -int cancel_response_work_sync(struct msm_vidc_inst *inst); int handle_system_error(struct msm_vidc_core *core, struct hfi_packet *pkt); void fw_coredump(struct msm_vidc_core *core); diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 4663b9bee0..ca781c754c 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -1160,24 +1160,6 @@ static int msm_vdec_set_delivery_mode_property(struct msm_vidc_inst *inst, return rc; } -static int msm_vdec_session_resume(struct msm_vidc_inst *inst, - enum msm_vidc_port_type port) -{ - int rc = 0; - - i_vpr_h(inst, "%s()\n", __func__); - rc = venus_hfi_session_command(inst, - HFI_CMD_RESUME, - port, - HFI_PAYLOAD_NONE, - NULL, - 0); - if (rc) - return rc; - - return rc; -} - int msm_vdec_init_input_subcr_params(struct msm_vidc_inst *inst) { struct msm_vidc_subscription_params *subsc_params; @@ -1330,7 +1312,7 @@ static int msm_vdec_read_input_subcr_params(struct msm_vidc_inst *inst) if (inst->buffers.output.min_count != 1) { i_vpr_e(inst, "%s: invalid min count %d in thumbnail case\n", __func__, inst->buffers.output.min_count); - msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); + msm_vidc_change_state(inst, MSM_VIDC_ERROR, __func__); } } inst->crop.top = subsc_params.crop_offsets[0] & 0xFFFF; @@ -1413,16 +1395,11 @@ int msm_vdec_input_port_settings_change(struct msm_vidc_inst *inst) if (rc) return rc; - rc = msm_vdec_session_resume(inst, INPUT_PORT); - if (rc) - return rc; - return rc; } int msm_vdec_output_port_settings_change(struct msm_vidc_inst *inst) { - //todo return 0; } @@ -1496,23 +1473,23 @@ int msm_vdec_streamon_input(struct msm_vidc_inst *inst) rc = msm_vdec_subscribe_input_port_settings_change( inst, INPUT_PORT); if (rc) - return rc; + goto error; inst->ipsc_properties_set = true; } rc = msm_vdec_subscribe_property(inst, INPUT_PORT); if (rc) - return rc; + goto error; rc = msm_vdec_subscribe_metadata(inst, INPUT_PORT); if (rc) - return rc; + goto error; rc = msm_vdec_set_delivery_mode_metadata(inst, INPUT_PORT); if (rc) - return rc; + goto error; - rc = msm_vidc_session_streamon(inst, INPUT_PORT); + rc = msm_vidc_process_streamon(inst, INPUT_PORT); if (rc) goto error; @@ -1788,11 +1765,11 @@ int msm_vdec_streamon_output(struct msm_vidc_inst *inst) rc = msm_vidc_check_session_supported(inst); if (rc) - return rc; + goto error; rc = msm_vdec_update_max_map_output_count(inst); if (rc) - return rc; + goto error; rc = msm_vdec_set_output_properties(inst); if (rc) @@ -1800,8 +1777,8 @@ int msm_vdec_streamon_output(struct msm_vidc_inst *inst) if (!inst->opsc_properties_set) { memcpy(&inst->subcr_params[OUTPUT_PORT], - &inst->subcr_params[INPUT_PORT], - sizeof(inst->subcr_params[INPUT_PORT])); + &inst->subcr_params[INPUT_PORT], + sizeof(inst->subcr_params[INPUT_PORT])); rc = msm_vdec_subscribe_output_port_settings_change(inst, OUTPUT_PORT); if (rc) goto error; @@ -1810,7 +1787,7 @@ int msm_vdec_streamon_output(struct msm_vidc_inst *inst) rc = msm_vdec_subscribe_property(inst, OUTPUT_PORT); if (rc) - return rc; + goto error; rc = msm_vdec_subscribe_metadata(inst, OUTPUT_PORT); if (rc) @@ -1818,11 +1795,11 @@ int msm_vdec_streamon_output(struct msm_vidc_inst *inst) rc = msm_vdec_set_delivery_mode_property(inst, OUTPUT_PORT); if (rc) - return rc; + goto error; rc = msm_vdec_set_delivery_mode_metadata(inst, OUTPUT_PORT); if (rc) - return rc; + goto error; rc = msm_vdec_get_output_internal_buffers(inst); if (rc) @@ -1832,7 +1809,7 @@ int msm_vdec_streamon_output(struct msm_vidc_inst *inst) if (rc) goto error; - rc = msm_vidc_session_streamon(inst, OUTPUT_PORT); + rc = msm_vidc_process_streamon(inst, OUTPUT_PORT); if (rc) goto error; @@ -1862,10 +1839,6 @@ static inline enum msm_vidc_allow msm_vdec_allow_queue_deferred_buffers( if (inst->power.buffer_counter <= SKIP_BATCH_WINDOW) return MSM_VIDC_ALLOW; - /* do not defer, if client waiting for last flag FBD */ - if (inst->state != MSM_VIDC_START) - return MSM_VIDC_ALLOW; - /* defer qbuf, if pending buffers count less than batch size */ count = msm_vidc_num_buffers(inst, MSM_VIDC_BUF_OUTPUT, MSM_VIDC_ATTR_DEFERRED); if (count < inst->decode_batch.size) @@ -2192,7 +2165,6 @@ int msm_vdec_process_cmd(struct msm_vidc_inst *inst, u32 cmd) { int rc = 0; enum msm_vidc_allow allow = MSM_VIDC_DISALLOW; - enum msm_vidc_port_type port; struct msm_vidc_inst_capability *capability; if (!inst || !inst->core || !inst->capabilities) { @@ -2210,15 +2182,7 @@ int msm_vdec_process_cmd(struct msm_vidc_inst *inst, u32 cmd) return 0; else if (allow != MSM_VIDC_ALLOW) return -EINVAL; - rc = venus_hfi_session_command(inst, - HFI_CMD_DRAIN, - INPUT_PORT, - HFI_PAYLOAD_NONE, - NULL, - 0); - if (rc) - return rc; - rc = msm_vidc_state_change_stop(inst); + rc = msm_vidc_process_drain(inst); if (rc) return rc; } else if (cmd == V4L2_DEC_CMD_START) { @@ -2236,11 +2200,6 @@ int msm_vdec_process_cmd(struct msm_vidc_inst *inst, u32 cmd) if (!msm_vidc_allow_start(inst)) return -EBUSY; - port = (inst->state == MSM_VIDC_DRAIN_LAST_FLAG) ? INPUT_PORT : OUTPUT_PORT; - - rc = msm_vidc_state_change_start(inst); - if (rc) - return rc; /* tune power features */ inst->decode_batch.enable = msm_vidc_allow_decode_batch(inst); @@ -2252,10 +2211,15 @@ int msm_vdec_process_cmd(struct msm_vidc_inst *inst, u32 cmd) if (rc) return rc; + /* queue pending deferred buffers */ + rc = msm_vidc_queue_deferred_buffers(inst, MSM_VIDC_BUF_OUTPUT); + if (rc) + return rc; + /* print final buffer counts & size details */ msm_vidc_print_buffer_info(inst); - rc = msm_vdec_session_resume(inst, port); + rc = msm_vidc_process_resume(inst); if (rc) return rc; @@ -2592,6 +2556,7 @@ int msm_vdec_subscribe_event(struct msm_vidc_inst *inst, switch (sub->type) { case V4L2_EVENT_EOS: case V4L2_EVENT_VIDC_METADATA: + case V4L2_EVENT_VIDC_LAST_FLAG: rc = v4l2_event_subscribe(&inst->event_handler, sub, MAX_EVENTS, NULL); break; case V4L2_EVENT_SOURCE_CHANGE: diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index 5eea5f42e3..9976a86c2f 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -857,13 +857,13 @@ int msm_venc_streamon_input(struct msm_vidc_inst *inst) rc = msm_venc_property_subscription(inst, INPUT_PORT); if (rc) - return rc; + goto error; rc = msm_venc_metadata_delivery(inst, INPUT_PORT); if (rc) - return rc; + goto error; - rc = msm_vidc_session_streamon(inst, INPUT_PORT); + rc = msm_vidc_process_streamon(inst, INPUT_PORT); if (rc) goto error; @@ -910,15 +910,7 @@ int msm_venc_process_cmd(struct msm_vidc_inst *inst, u32 cmd) return 0; else if (allow != MSM_VIDC_ALLOW) return -EINVAL; - rc = venus_hfi_session_command(inst, - HFI_CMD_DRAIN, - INPUT_PORT, - HFI_PAYLOAD_NONE, - NULL, - 0); - if (rc) - return rc; - rc = msm_vidc_state_change_stop(inst); + rc = msm_vidc_process_drain(inst); if (rc) return rc; } else if (cmd == V4L2_ENC_CMD_START) { @@ -928,10 +920,6 @@ int msm_venc_process_cmd(struct msm_vidc_inst *inst, u32 cmd) vb2_clear_last_buffer_dequeued(inst->bufq[OUTPUT_META_PORT].vb2q); vb2_clear_last_buffer_dequeued(inst->bufq[OUTPUT_PORT].vb2q); - rc = msm_vidc_state_change_start(inst); - if (rc) - return rc; - /* tune power features */ msm_vidc_allow_dcvs(inst); msm_vidc_power_data_reset(inst); @@ -939,12 +927,7 @@ int msm_venc_process_cmd(struct msm_vidc_inst *inst, u32 cmd) /* print final buffer counts & size details */ msm_vidc_print_buffer_info(inst); - rc = venus_hfi_session_command(inst, - HFI_CMD_RESUME, - INPUT_PORT, - HFI_PAYLOAD_NONE, - NULL, - 0); + rc = msm_vidc_process_resume(inst); if (rc) return rc; } else { @@ -1030,7 +1013,7 @@ int msm_venc_streamon_output(struct msm_vidc_inst *inst) if (rc) goto error; - rc = msm_vidc_session_streamon(inst, OUTPUT_PORT); + rc = msm_vidc_process_streamon(inst, OUTPUT_PORT); if (rc) goto error; diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index 76c6836bcf..b61803b89b 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -889,6 +889,8 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) inst->domain = session_type; inst->session_id = hash32_ptr(inst); inst->state = MSM_VIDC_OPEN; + inst->sub_state = MSM_VIDC_SUB_STATE_NONE; + strlcpy(inst->sub_state_name, "SUB_STATE_NONE", sizeof(inst->sub_state_name)); inst->active = true; inst->request = false; inst->ipsc_properties_set = false; @@ -908,7 +910,6 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) msm_vidc_vmem_free((void **)&inst); return NULL; } - INIT_LIST_HEAD(&inst->response_works); INIT_LIST_HEAD(&inst->caps_list); INIT_LIST_HEAD(&inst->timestamps.list); INIT_LIST_HEAD(&inst->ts_reorder.list); @@ -959,13 +960,12 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) for (i = 0; i < MAX_SIGNAL; i++) init_completion(&inst->completions[i]); - inst->response_workq = create_singlethread_workqueue("response_workq"); - if (!inst->response_workq) { - i_vpr_e(inst, "%s: create input_psc_workq failed\n", __func__); + inst->workq = create_singlethread_workqueue("workq"); + if (!inst->workq) { + i_vpr_e(inst, "%s: create workq failed\n", __func__); goto error; } - INIT_DELAYED_WORK(&inst->response_work, handle_session_response_work_handler); INIT_DELAYED_WORK(&inst->stats_work, msm_vidc_stats_handler); INIT_WORK(&inst->stability_work, msm_vidc_stability_handler); @@ -1042,7 +1042,6 @@ int msm_vidc_close(void *instance) msm_vidc_destroy_buffers(inst); inst_unlock(inst, __func__); client_unlock(inst, __func__); - cancel_response_work_sync(inst); cancel_stability_work_sync(inst); cancel_stats_work_sync(inst); msm_vidc_show_stats(inst); diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index df9dbd3a5c..f8ae6134af 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -195,6 +195,7 @@ static const struct msm_vidc_cap_name cap_name_arr[] = { {CAVLC_MAX_BITRATE, "CAVLC_MAX_BITRATE" }, {ALLINTRA_MAX_BITRATE, "ALLINTRA_MAX_BITRATE" }, {LOWLATENCY_MAX_BITRATE, "LOWLATENCY_MAX_BITRATE" }, + {LAST_FLAG_EVENT_ENABLE, "LAST_FLAG_EVENT_ENABLE" }, {PROFILE, "PROFILE" }, {ENH_LAYER_COUNT, "ENH_LAYER_COUNT" }, {BIT_RATE, "BIT_RATE" }, @@ -314,43 +315,51 @@ exit: return name; } -struct msm_vidc_inst_state_name { - enum msm_vidc_inst_state state; +struct msm_vidc_state_name { + enum msm_vidc_state state; char *name; }; /* do not modify the state names as it is used in test scripts */ -static const struct msm_vidc_inst_state_name inst_state_name_arr[] = { - {MSM_VIDC_OPEN, "OPEN" }, - {MSM_VIDC_START_INPUT, "START_INPUT" }, - {MSM_VIDC_START_OUTPUT, "START_OUTPUT" }, - {MSM_VIDC_START, "START" }, - {MSM_VIDC_DRC, "DRC" }, - {MSM_VIDC_DRC_LAST_FLAG, "DRC_LAST_FLAG" }, - {MSM_VIDC_DRAIN, "DRAIN" }, - {MSM_VIDC_DRAIN_LAST_FLAG, "DRAIN_LAST_FLAG" }, - {MSM_VIDC_DRC_DRAIN, "DRC_DRAIN" }, - {MSM_VIDC_DRC_DRAIN_LAST_FLAG, "DRC_DRAIN_LAST_FLAG" }, - {MSM_VIDC_DRAIN_START_INPUT, "DRAIN_START_INPUT" }, - {MSM_VIDC_ERROR, "ERROR" }, +static const struct msm_vidc_state_name state_name_arr[] = { + {MSM_VIDC_OPEN, "OPEN" }, + {MSM_VIDC_INPUT_STREAMING, "INPUT_STREAMING" }, + {MSM_VIDC_OUTPUT_STREAMING, "OUTPUT_STREAMING" }, + {MSM_VIDC_STREAMING, "STREAMING" }, + {MSM_VIDC_CLOSE, "CLOSE" }, + {MSM_VIDC_ERROR, "ERROR" }, }; -const char *state_name(enum msm_vidc_inst_state state) +const char *state_name(enum msm_vidc_state state) { const char *name = "UNKNOWN STATE"; - if (!state || state > ARRAY_SIZE(inst_state_name_arr)) + if (!state || state > ARRAY_SIZE(state_name_arr)) goto exit; - if (inst_state_name_arr[state - 1].state != state) + if (state_name_arr[state - 1].state != state) goto exit; - name = inst_state_name_arr[state - 1].name; + name = state_name_arr[state - 1].name; exit: return name; } +const char *sub_state_name(enum msm_vidc_sub_state sub_state) +{ + switch (sub_state) { + case MSM_VIDC_DRAIN: return "DRAIN "; + case MSM_VIDC_DRC: return "DRC "; + case MSM_VIDC_DRAIN_LAST_BUFFER: return "DRAIN_LAST_BUFFER "; + case MSM_VIDC_DRC_LAST_BUFFER: return "DRC_LAST_BUFFER "; + case MSM_VIDC_INPUT_PAUSE: return "INPUT_PAUSE "; + case MSM_VIDC_OUTPUT_PAUSE: return "OUTPUT_PAUSE "; + } + + return "SUB_STATE_NONE"; +} + struct msm_vidc_core_state_name { enum msm_vidc_core_state state; char *name; @@ -1228,6 +1237,14 @@ bool res_is_less_than_or_equal_to(u32 width, u32 height, return false; } +int signal_session_msg_receipt(struct msm_vidc_inst *inst, + enum signal_session_response cmd) +{ + if (cmd < MAX_SIGNAL) + complete(&inst->completions[cmd]); + return 0; +} + int msm_vidc_change_core_state(struct msm_vidc_core *core, enum msm_vidc_core_state request_state, const char *func) { @@ -1243,8 +1260,8 @@ int msm_vidc_change_core_state(struct msm_vidc_core *core, return 0; } -int msm_vidc_change_inst_state(struct msm_vidc_inst *inst, - enum msm_vidc_inst_state request_state, const char *func) +int msm_vidc_change_state(struct msm_vidc_inst *inst, + enum msm_vidc_state request_state, const char *func) { if (!inst) { d_vpr_e("%s: invalid params\n", __func__); @@ -1278,6 +1295,58 @@ int msm_vidc_change_inst_state(struct msm_vidc_inst *inst, return 0; } +int msm_vidc_change_sub_state(struct msm_vidc_inst *inst, + enum msm_vidc_sub_state clear_sub_state, + enum msm_vidc_sub_state set_sub_state, const char *func) +{ + int i = 0; + enum msm_vidc_sub_state prev_sub_state; + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (is_session_error(inst)) { + i_vpr_h(inst, + "%s: inst is in bad state, can not change sub state\n", func); + return 0; + } + + if (!clear_sub_state && !set_sub_state) + return 0; + + if ((clear_sub_state & set_sub_state) || + (set_sub_state > MSM_VIDC_MAX_SUB_STATE_VALUE) || + (clear_sub_state > MSM_VIDC_MAX_SUB_STATE_VALUE)) { + i_vpr_e(inst, "%s: invalid sub states to clear %#x or set %#x\n", + func, clear_sub_state, set_sub_state); + return -EINVAL; + } + + prev_sub_state = inst->sub_state; + inst->sub_state |= set_sub_state; + inst->sub_state &= ~clear_sub_state; + + /* print substates only when there is a change */ + if (inst->sub_state != prev_sub_state) { + strlcpy(inst->sub_state_name, "\0", sizeof(inst->sub_state_name)); + for (i = 0; i < MSM_VIDC_MAX_SUB_STATES; i++) { + if (inst->sub_state == MSM_VIDC_SUB_STATE_NONE) { + strlcpy(inst->sub_state_name, "SUB_STATE_NONE", + sizeof(inst->sub_state_name)); + break; + } + if (inst->sub_state & BIT(i)) + strlcat(inst->sub_state_name, sub_state_name(BIT(i)), + sizeof(inst->sub_state_name)); + } + i_vpr_h(inst, "%s: sub state changed to %s\n", func, inst->sub_state_name); + } + + return 0; +} + bool msm_vidc_allow_s_fmt(struct msm_vidc_inst *inst, u32 type) { bool allow = false; @@ -1286,19 +1355,18 @@ bool msm_vidc_allow_s_fmt(struct msm_vidc_inst *inst, u32 type) d_vpr_e("%s: invalid params\n", __func__); return false; } - if (inst->state == MSM_VIDC_OPEN) { + if (is_state(inst, MSM_VIDC_OPEN)) { allow = true; goto exit; } if (type == OUTPUT_MPLANE || type == OUTPUT_META_PLANE) { - if (inst->state == MSM_VIDC_START_INPUT || - inst->state == MSM_VIDC_DRAIN_START_INPUT) { + if (is_state(inst, MSM_VIDC_INPUT_STREAMING)) { allow = true; goto exit; } } if (type == INPUT_MPLANE || type == INPUT_META_PLANE) { - if (inst->state == MSM_VIDC_START_OUTPUT) { + if (is_state(inst, MSM_VIDC_OUTPUT_STREAMING)) { allow = true; goto exit; } @@ -1319,7 +1387,7 @@ bool msm_vidc_allow_s_ctrl(struct msm_vidc_inst *inst, u32 id) d_vpr_e("%s: invalid params\n", __func__); return false; } - if (inst->state == MSM_VIDC_OPEN) { + if (is_state(inst, MSM_VIDC_OPEN)) { allow = true; goto exit; } @@ -1535,19 +1603,18 @@ bool msm_vidc_allow_reqbufs(struct msm_vidc_inst *inst, u32 type) d_vpr_e("%s: invalid params\n", __func__); return false; } - if (inst->state == MSM_VIDC_OPEN) { + if (is_state(inst, MSM_VIDC_OPEN)) { allow = true; goto exit; } if (type == OUTPUT_MPLANE || type == OUTPUT_META_PLANE) { - if (inst->state == MSM_VIDC_START_INPUT || - inst->state == MSM_VIDC_DRAIN_START_INPUT) { + if (is_state(inst, MSM_VIDC_INPUT_STREAMING)) { allow = true; goto exit; } } if (type == INPUT_MPLANE || type == INPUT_META_PLANE) { - if (inst->state == MSM_VIDC_START_OUTPUT) { + if (is_state(inst, MSM_VIDC_OUTPUT_STREAMING)) { allow = true; goto exit; } @@ -1568,19 +1635,20 @@ enum msm_vidc_allow msm_vidc_allow_stop(struct msm_vidc_inst *inst) d_vpr_e("%s: invalid params\n", __func__); return allow; } - if (inst->state == MSM_VIDC_START || - inst->state == MSM_VIDC_DRC || - inst->state == MSM_VIDC_DRC_LAST_FLAG || - inst->state == MSM_VIDC_DRC_DRAIN) { - allow = MSM_VIDC_ALLOW; - } else if (inst->state == MSM_VIDC_START_INPUT || - inst->state == MSM_VIDC_OPEN) { + + /* allow stop (drain) if input port is streaming */ + if (is_state(inst, MSM_VIDC_INPUT_STREAMING) || + is_state(inst, MSM_VIDC_STREAMING)) { + /* do not allow back to back drain */ + if (!(is_sub_state(inst, MSM_VIDC_DRAIN))) + allow = MSM_VIDC_ALLOW; + } else if (is_state(inst, MSM_VIDC_OPEN)) { allow = MSM_VIDC_IGNORE; - i_vpr_e(inst, "%s: stop ignored in state %s\n", - __func__, state_name(inst->state)); + i_vpr_e(inst, "%s: ignored in state %s, sub state %s\n", + __func__, state_name(inst->state), inst->sub_state_name); } else { - i_vpr_e(inst, "%s: stop not allowed in state %s\n", - __func__, state_name(inst->state)); + i_vpr_e(inst, "%s: not allowed in state %s, sub state %s\n", + __func__, state_name(inst->state), inst->sub_state_name); } return allow; @@ -1588,18 +1656,24 @@ enum msm_vidc_allow msm_vidc_allow_stop(struct msm_vidc_inst *inst) bool msm_vidc_allow_start(struct msm_vidc_inst *inst) { + bool allow = false; + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); - return false; + return allow; } - if (inst->state == MSM_VIDC_DRAIN_LAST_FLAG || - inst->state == MSM_VIDC_DRC_LAST_FLAG || - inst->state == MSM_VIDC_DRC_DRAIN_LAST_FLAG) - return true; - i_vpr_e(inst, "%s: not allowed in state %s\n", - __func__, state_name(inst->state)); - return false; + /* client would call start (resume) to complete DRC/drain sequence */ + if ((is_sub_state(inst, MSM_VIDC_DRC) && + is_sub_state(inst, MSM_VIDC_DRC_LAST_BUFFER)) || + (is_sub_state(inst, MSM_VIDC_DRAIN) && + is_sub_state(inst, MSM_VIDC_DRAIN_LAST_BUFFER))) + allow = true; + + if (!allow) + i_vpr_e(inst, "%s: not allowed in state %s, sub state %s\n", + __func__, state_name(inst->state), inst->sub_state_name); + return allow; } bool msm_vidc_allow_streamon(struct msm_vidc_inst *inst, u32 type) @@ -1609,13 +1683,12 @@ bool msm_vidc_allow_streamon(struct msm_vidc_inst *inst, u32 type) return false; } if (type == INPUT_MPLANE || type == INPUT_META_PLANE) { - if (inst->state == MSM_VIDC_OPEN || - inst->state == MSM_VIDC_START_OUTPUT) + if (is_state(inst, MSM_VIDC_OPEN) || + is_state(inst, MSM_VIDC_OUTPUT_STREAMING)) return true; } else if (type == OUTPUT_MPLANE || type == OUTPUT_META_PLANE) { - if (inst->state == MSM_VIDC_OPEN || - inst->state == MSM_VIDC_START_INPUT || - inst->state == MSM_VIDC_DRAIN_START_INPUT) + if (is_state(inst, MSM_VIDC_OPEN) || + is_state(inst, MSM_VIDC_INPUT_STREAMING)) return true; } @@ -1678,15 +1751,14 @@ enum msm_vidc_allow msm_vidc_allow_qbuf(struct msm_vidc_inst *inst, u32 type) return MSM_VIDC_DEFER; if (type == INPUT_MPLANE) { - if (inst->state == MSM_VIDC_OPEN || - inst->state == MSM_VIDC_START_OUTPUT) + if (is_state(inst, MSM_VIDC_OPEN) || + is_state(inst, MSM_VIDC_OUTPUT_STREAMING)) return MSM_VIDC_DEFER; else return MSM_VIDC_ALLOW; } else if (type == OUTPUT_MPLANE) { - if (inst->state == MSM_VIDC_OPEN || - inst->state == MSM_VIDC_START_INPUT || - inst->state == MSM_VIDC_DRAIN_START_INPUT) + if (is_state(inst, MSM_VIDC_OPEN) || + is_state(inst, MSM_VIDC_INPUT_STREAMING)) return MSM_VIDC_DEFER; else return MSM_VIDC_ALLOW; @@ -1700,269 +1772,130 @@ enum msm_vidc_allow msm_vidc_allow_qbuf(struct msm_vidc_inst *inst, u32 type) enum msm_vidc_allow msm_vidc_allow_input_psc(struct msm_vidc_inst *inst) { - enum msm_vidc_allow allow = MSM_VIDC_DISALLOW; + enum msm_vidc_allow allow = MSM_VIDC_ALLOW; if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return MSM_VIDC_DISALLOW; } - if (inst->state == MSM_VIDC_START || - inst->state == MSM_VIDC_START_INPUT || - inst->state == MSM_VIDC_DRAIN) { - allow = MSM_VIDC_ALLOW; - } else if (inst->state == MSM_VIDC_DRC || - inst->state == MSM_VIDC_DRC_LAST_FLAG || - inst->state == MSM_VIDC_DRC_DRAIN || - inst->state == MSM_VIDC_DRC_DRAIN_LAST_FLAG || - inst->state == MSM_VIDC_DRAIN_START_INPUT) { - i_vpr_h(inst, "%s: defer input psc, inst state %s\n", - __func__, state_name(inst->state)); - allow = MSM_VIDC_DEFER; - } else if (inst->state == MSM_VIDC_OPEN || - inst->state == MSM_VIDC_START_OUTPUT) { - i_vpr_h(inst, "%s: discard input psc, inst state %s\n", - __func__, state_name(inst->state)); - allow = MSM_VIDC_DISCARD; - } else { - i_vpr_e(inst, "%s: input psc in wrong state %s\n", - __func__, state_name(inst->state)); - allow = MSM_VIDC_DISALLOW; + + /* + * if drc sequence is not completed by client, fw is not + * expected to raise another ipsc + */ + if (is_sub_state(inst, MSM_VIDC_DRC)) { + i_vpr_e(inst, "%s: not allowed in sub state %s\n", + __func__, inst->sub_state_name); + return MSM_VIDC_DISALLOW; } return allow; } -bool msm_vidc_allow_last_flag(struct msm_vidc_inst *inst) +bool msm_vidc_allow_drain_last_flag(struct msm_vidc_inst *inst) { if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return false; } - if (inst->state == MSM_VIDC_DRC || - inst->state == MSM_VIDC_DRAIN || - inst->state == MSM_VIDC_DRC_DRAIN) + + /* + * drain last flag is expected only when DRAIN, INPUT_PAUSE + * is set and DRAIN_LAST_BUFFER is not set + */ + if (is_sub_state(inst, MSM_VIDC_DRAIN) && + is_sub_state(inst, MSM_VIDC_INPUT_PAUSE) && + !is_sub_state(inst, MSM_VIDC_DRAIN_LAST_BUFFER)) return true; - i_vpr_e(inst, "%s: not allowed in state %s\n", - __func__, state_name(inst->state)); + i_vpr_e(inst, "%s: not allowed in sub state %s\n", + __func__, inst->sub_state_name); return false; } -static int msm_vidc_flush_pending_last_flag(struct msm_vidc_inst *inst) +bool msm_vidc_allow_psc_last_flag(struct msm_vidc_inst *inst) { - int rc = 0; - struct response_work *resp_work, *dummy = NULL; - if (!inst) { d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; + return false; } - if (list_empty(&inst->response_works)) - return 0; + /* + * drc last flag is expected only when DRC, INPUT_PAUSE + * is set and DRC_LAST_BUFFER is not set + */ + if (is_sub_state(inst, MSM_VIDC_DRC) && + is_sub_state(inst, MSM_VIDC_INPUT_PAUSE) && + !is_sub_state(inst, MSM_VIDC_DRC_LAST_BUFFER)) + return true; - /* flush pending last flag buffers if any */ - list_for_each_entry_safe(resp_work, dummy, - &inst->response_works, list) { - if (resp_work->type == RESP_WORK_LAST_FLAG) { - i_vpr_h(inst, "%s: flush pending last flag buffer\n", - __func__); - rc = handle_session_response_work(inst, resp_work); - if (rc) { - msm_vidc_change_inst_state(inst, - MSM_VIDC_ERROR, __func__); - return rc; - } - list_del(&resp_work->list); - msm_vidc_vmem_free((void **)&resp_work->data); - msm_vidc_vmem_free((void **)&resp_work); - } - } + i_vpr_e(inst, "%s: not allowed in sub state %s\n", + __func__, inst->sub_state_name); - return 0; + return false; } -static int msm_vidc_discard_pending_opsc(struct msm_vidc_inst *inst) -{ - struct response_work *resp_work, *dummy = NULL; - - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - if (list_empty(&inst->response_works)) - return 0; - - /* discard pending port settings change if any */ - list_for_each_entry_safe(resp_work, dummy, - &inst->response_works, list) { - if (resp_work->type == RESP_WORK_OUTPUT_PSC) { - i_vpr_h(inst, - "%s: discard pending output psc\n", __func__); - list_del(&resp_work->list); - msm_vidc_vmem_free((void **)&resp_work->data); - msm_vidc_vmem_free((void **)&resp_work); - } - } - - return 0; -} - -static int msm_vidc_discard_pending_ipsc(struct msm_vidc_inst *inst) -{ - struct response_work *resp_work, *dummy = NULL; - - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - if (list_empty(&inst->response_works)) - return 0; - - /* discard pending port settings change if any */ - list_for_each_entry_safe(resp_work, dummy, - &inst->response_works, list) { - if (resp_work->type == RESP_WORK_INPUT_PSC) { - i_vpr_h(inst, - "%s: discard pending input psc\n", __func__); - - /* override the psc properties again if ipsc discarded */ - inst->ipsc_properties_set = false; - - list_del(&resp_work->list); - msm_vidc_vmem_free((void **)&resp_work->data); - msm_vidc_vmem_free((void **)&resp_work); - } - } - - return 0; -} - -static int msm_vidc_process_pending_ipsc(struct msm_vidc_inst *inst, - enum msm_vidc_inst_state *new_state) -{ - struct response_work *resp_work, *dummy = NULL; - int rc = 0; - - if (!inst || !new_state) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - if (list_empty(&inst->response_works)) - return 0; - - i_vpr_h(inst, "%s: state %s, ipsc pending\n", __func__, state_name(inst->state)); - list_for_each_entry_safe(resp_work, dummy, &inst->response_works, list) { - if (resp_work->type == RESP_WORK_INPUT_PSC) { - rc = handle_session_response_work(inst, resp_work); - if (rc) { - i_vpr_e(inst, "%s: handle ipsc failed\n", __func__); - *new_state = MSM_VIDC_ERROR; - } else { - if (inst->state == MSM_VIDC_DRC_DRAIN_LAST_FLAG || - inst->state == MSM_VIDC_DRAIN_START_INPUT) { - *new_state = MSM_VIDC_DRC_DRAIN; - } else if (inst->state == MSM_VIDC_DRC_LAST_FLAG) { - *new_state = MSM_VIDC_DRC; - } - } - list_del(&resp_work->list); - msm_vidc_vmem_free((void **)&resp_work->data); - msm_vidc_vmem_free((void **)&resp_work); - /* list contains max only one ipsc at anytime */ - break; - } - } - - return rc; -} - -int msm_vidc_state_change_streamon(struct msm_vidc_inst *inst, u32 type) +int msm_vidc_state_change_streamon(struct msm_vidc_inst *inst, + enum msm_vidc_port_type port) { int rc = 0; - enum msm_vidc_inst_state new_state = MSM_VIDC_ERROR; + enum msm_vidc_state new_state = MSM_VIDC_ERROR; if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - if (type == INPUT_META_PLANE || type == OUTPUT_META_PLANE) + if (port == INPUT_META_PORT || port == OUTPUT_META_PORT) return 0; - if (type == INPUT_MPLANE) { - if (inst->state == MSM_VIDC_OPEN) - new_state = MSM_VIDC_START_INPUT; - else if (inst->state == MSM_VIDC_START_OUTPUT) - new_state = MSM_VIDC_START; - } else if (type == OUTPUT_MPLANE) { - if (inst->state == MSM_VIDC_OPEN) { - new_state = MSM_VIDC_START_OUTPUT; - } else if (inst->state == MSM_VIDC_START_INPUT) { - new_state = MSM_VIDC_START; - } else if (inst->state == MSM_VIDC_DRAIN_START_INPUT) { - i_vpr_h(inst, "%s: streamon(output) in %s state\n", - __func__, state_name(inst->state)); - new_state = MSM_VIDC_DRAIN; - rc = msm_vidc_process_pending_ipsc(inst, &new_state); - if (rc) { - i_vpr_e(inst, "%s: process pending ipsc failed\n", __func__); - goto state_change; - } - } + if (port == INPUT_PORT) { + if (is_state(inst, MSM_VIDC_OPEN)) + new_state = MSM_VIDC_INPUT_STREAMING; + else if (is_state(inst, MSM_VIDC_OUTPUT_STREAMING)) + new_state = MSM_VIDC_STREAMING; + } else if (port == OUTPUT_PORT) { + if (is_state(inst, MSM_VIDC_OPEN)) + new_state = MSM_VIDC_OUTPUT_STREAMING; + else if (is_state(inst, MSM_VIDC_INPUT_STREAMING)) + new_state = MSM_VIDC_STREAMING; } -state_change: - msm_vidc_change_inst_state(inst, new_state, __func__); + rc = msm_vidc_change_state(inst, new_state, __func__); + if (rc) + return rc; return rc; } -int msm_vidc_state_change_streamoff(struct msm_vidc_inst *inst, u32 type) +int msm_vidc_state_change_streamoff(struct msm_vidc_inst *inst, + enum msm_vidc_port_type port) { int rc = 0; - enum msm_vidc_inst_state new_state = MSM_VIDC_ERROR; + enum msm_vidc_state new_state = MSM_VIDC_ERROR; if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - if (type == INPUT_META_PLANE || type == OUTPUT_META_PLANE) + if (port == INPUT_META_PORT || port == OUTPUT_META_PORT) return 0; - if (type == INPUT_MPLANE) { - if (inst->state == MSM_VIDC_START_INPUT) { + if (port == INPUT_PORT) { + if (is_state(inst, MSM_VIDC_INPUT_STREAMING)) { new_state = MSM_VIDC_OPEN; - } else if (inst->state == MSM_VIDC_START) { - new_state = MSM_VIDC_START_OUTPUT; - } else if (inst->state == MSM_VIDC_DRC || - inst->state == MSM_VIDC_DRC_LAST_FLAG || - inst->state == MSM_VIDC_DRAIN || - inst->state == MSM_VIDC_DRAIN_LAST_FLAG || - inst->state == MSM_VIDC_DRC_DRAIN || - inst->state == MSM_VIDC_DRC_DRAIN_LAST_FLAG || - inst->state == MSM_VIDC_DRAIN_START_INPUT) { - new_state = MSM_VIDC_START_OUTPUT; + } else if (is_state(inst, MSM_VIDC_STREAMING)) { + new_state = MSM_VIDC_OUTPUT_STREAMING; } - } else if (type == OUTPUT_MPLANE) { - if (inst->state == MSM_VIDC_START_OUTPUT) { + } else if (port == OUTPUT_PORT) { + if (is_state(inst, MSM_VIDC_OUTPUT_STREAMING)) { new_state = MSM_VIDC_OPEN; - } else if (inst->state == MSM_VIDC_START || - inst->state == MSM_VIDC_DRAIN || - inst->state == MSM_VIDC_DRAIN_LAST_FLAG || - inst->state == MSM_VIDC_DRC || - inst->state == MSM_VIDC_DRC_LAST_FLAG || - inst->state == MSM_VIDC_DRC_DRAIN) { - new_state = MSM_VIDC_START_INPUT; - } else if (inst->state == MSM_VIDC_DRC_DRAIN_LAST_FLAG) { - new_state = MSM_VIDC_DRAIN_START_INPUT; + } else if (is_state(inst, MSM_VIDC_STREAMING)) { + new_state = MSM_VIDC_INPUT_STREAMING; } } - rc = msm_vidc_change_inst_state(inst, new_state, __func__); + rc = msm_vidc_change_state(inst, new_state, __func__); if (rc) goto exit; @@ -1970,70 +1903,291 @@ exit: return rc; } -int msm_vidc_state_change_stop(struct msm_vidc_inst *inst) +int msm_vidc_process_drain(struct msm_vidc_inst *inst) { int rc = 0; - enum msm_vidc_inst_state new_state = MSM_VIDC_ERROR; - if (!inst || !inst->core) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - if (inst->state == MSM_VIDC_START) { - new_state = MSM_VIDC_DRAIN; - } else if (inst->state == MSM_VIDC_DRC) { - new_state = MSM_VIDC_DRC_DRAIN; - } else if (inst->state == MSM_VIDC_DRC_DRAIN || - inst->state == MSM_VIDC_DRC_LAST_FLAG) { - new_state = MSM_VIDC_DRC_DRAIN_LAST_FLAG; - } else { - i_vpr_e(inst, "%s: wrong state %s\n", - __func__, state_name(inst->state)); - msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); - return -EINVAL; - } - rc = msm_vidc_change_inst_state(inst, new_state, __func__); + rc = venus_hfi_session_drain(inst, INPUT_PORT); + if (rc) + return rc; + rc = msm_vidc_change_sub_state(inst, 0, MSM_VIDC_DRAIN, __func__); if (rc) return rc; return rc; } -int msm_vidc_state_change_start(struct msm_vidc_inst *inst) +int msm_vidc_process_resume(struct msm_vidc_inst *inst) { int rc = 0; - enum msm_vidc_inst_state new_state = MSM_VIDC_ERROR; + enum msm_vidc_sub_state clear_sub_state = MSM_VIDC_SUB_STATE_NONE; + bool drain_pending = false; - if (!inst || !inst->core) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - if (inst->state == MSM_VIDC_DRAIN_LAST_FLAG || - inst->state == MSM_VIDC_DRC_LAST_FLAG) { - new_state = MSM_VIDC_START; - rc = msm_vidc_process_pending_ipsc(inst, &new_state); - if (rc) { - i_vpr_e(inst, "%s: process pending ipsc failed\n", __func__); - goto state_change; + /* first check DRC pending else check drain pending */ + if (is_sub_state(inst, MSM_VIDC_DRC) && + is_sub_state(inst, MSM_VIDC_DRC_LAST_BUFFER)) { + clear_sub_state = MSM_VIDC_DRC | MSM_VIDC_DRC_LAST_BUFFER; + /* + * if drain sequence is not completed then do not resume here. + * client will eventually complete drain sequence in which ports + * will be resumed. + */ + drain_pending = is_sub_state(inst, MSM_VIDC_DRAIN) && + is_sub_state(inst, MSM_VIDC_DRAIN_LAST_BUFFER); + if (!drain_pending) { + if (is_sub_state(inst, MSM_VIDC_INPUT_PAUSE)) { + rc = venus_hfi_session_resume(inst, INPUT_PORT, + HFI_CMD_SETTINGS_CHANGE); + if (rc) + return rc; + clear_sub_state |= MSM_VIDC_INPUT_PAUSE; + } + if (is_sub_state(inst, MSM_VIDC_OUTPUT_PAUSE)) { + rc = venus_hfi_session_resume(inst, OUTPUT_PORT, + HFI_CMD_SETTINGS_CHANGE); + if (rc) + return rc; + clear_sub_state |= MSM_VIDC_OUTPUT_PAUSE; + } } - } else if (inst->state == MSM_VIDC_DRC_DRAIN_LAST_FLAG) { - new_state = MSM_VIDC_DRAIN; - rc = msm_vidc_process_pending_ipsc(inst, &new_state); - if (rc) { - i_vpr_e(inst, "%s: process pending ipsc failed\n", __func__); - goto state_change; + } else if (is_sub_state(inst, MSM_VIDC_DRAIN) && + is_sub_state(inst, MSM_VIDC_DRAIN_LAST_BUFFER)) { + clear_sub_state = MSM_VIDC_DRAIN | MSM_VIDC_DRAIN_LAST_BUFFER; + if (is_sub_state(inst, MSM_VIDC_INPUT_PAUSE)) { + rc = venus_hfi_session_resume(inst, INPUT_PORT, HFI_CMD_DRAIN); + if (rc) + return rc; + clear_sub_state |= MSM_VIDC_INPUT_PAUSE; + } + if (is_sub_state(inst, MSM_VIDC_OUTPUT_PAUSE)) { + rc = venus_hfi_session_resume(inst, OUTPUT_PORT, HFI_CMD_DRAIN); + if (rc) + return rc; + clear_sub_state |= MSM_VIDC_OUTPUT_PAUSE; } - } else { - i_vpr_e(inst, "%s: wrong state %s\n", __func__, state_name(inst->state)); - new_state = MSM_VIDC_ERROR; - rc = -EINVAL; - goto state_change; } -state_change: - msm_vidc_change_inst_state(inst, new_state, __func__); + rc = msm_vidc_change_sub_state(inst, clear_sub_state, 0, __func__); + if (rc) + return rc; + + return rc; +} + +int msm_vidc_process_streamon(struct msm_vidc_inst *inst, + enum msm_vidc_port_type port) +{ + int rc = 0; + enum msm_vidc_sub_state clear_sub_state = MSM_VIDC_SUB_STATE_NONE; + enum msm_vidc_sub_state set_sub_state = MSM_VIDC_SUB_STATE_NONE; + bool drain_pending = false; + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (port == INPUT_META_PORT || port == OUTPUT_META_PORT) + return 0; + + msm_vidc_scale_power(inst, true); + + rc = venus_hfi_start(inst, port); + if (rc) + return rc; + + /* clear input/output pause substate immediately */ + if (port == INPUT_PORT && is_sub_state(inst, MSM_VIDC_INPUT_PAUSE)) { + rc = msm_vidc_change_sub_state(inst, MSM_VIDC_INPUT_PAUSE, 0, __func__); + if (rc) + return rc; + } else if (port == OUTPUT_PORT && is_sub_state(inst, MSM_VIDC_OUTPUT_PAUSE)) { + rc = msm_vidc_change_sub_state(inst, MSM_VIDC_OUTPUT_PAUSE, 0, __func__); + if (rc) + return rc; + } + + if (port == INPUT_PORT) { + /* + * if DRC sequence is not completed by the client then PAUSE + * firmware input port to avoid firmware raising IPSC again. + * When client completes DRC or DRAIN sequences, firmware + * input port will be resumed. + */ + if (is_sub_state(inst, MSM_VIDC_DRC) || + is_sub_state(inst, MSM_VIDC_DRAIN)) { + if (!is_sub_state(inst, MSM_VIDC_INPUT_PAUSE)) { + rc = venus_hfi_session_pause(inst, INPUT_PORT); + if (rc) + return rc; + set_sub_state = MSM_VIDC_INPUT_PAUSE; + } + } + } else if (port == OUTPUT_PORT) { + /* + * client completed drc sequence, reset DRC and + * MSM_VIDC_DRC_LAST_BUFFER substates + */ + if (is_sub_state(inst, MSM_VIDC_DRC) && + is_sub_state(inst, MSM_VIDC_DRC_LAST_BUFFER)) { + clear_sub_state = MSM_VIDC_DRC | MSM_VIDC_DRC_LAST_BUFFER; + } + /* + * fw input port is paused due to ipsc. now that client + * completed drc sequence, resume fw input port provided + * drain is not pending and input port is streaming. + */ + drain_pending = is_sub_state(inst, MSM_VIDC_DRAIN) && + is_sub_state(inst, MSM_VIDC_DRAIN_LAST_BUFFER); + if (!drain_pending && is_state(inst, MSM_VIDC_INPUT_STREAMING)) { + if (is_sub_state(inst, MSM_VIDC_INPUT_PAUSE)) { + rc = venus_hfi_session_resume(inst, INPUT_PORT, + HFI_CMD_SETTINGS_CHANGE); + if (rc) + return rc; + clear_sub_state |= MSM_VIDC_INPUT_PAUSE; + } + } + } + + rc = msm_vidc_state_change_streamon(inst, port); + if (rc) + return rc; + + rc = msm_vidc_change_sub_state(inst, clear_sub_state, set_sub_state, __func__); + if (rc) + return rc; + + return rc; +} + +int msm_vidc_process_stop_done(struct msm_vidc_inst *inst, + enum signal_session_response signal_type) +{ + int rc = 0; + enum msm_vidc_sub_state set_sub_state = MSM_VIDC_SUB_STATE_NONE; + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (signal_type == SIGNAL_CMD_STOP_INPUT) { + set_sub_state = MSM_VIDC_INPUT_PAUSE; + /* + * FW is expected to return DRC LAST flag before input + * stop done if DRC sequence is pending + */ + if (is_sub_state(inst, MSM_VIDC_DRC) && + !is_sub_state(inst, MSM_VIDC_DRC_LAST_BUFFER)) { + i_vpr_e(inst, "%s: drc last flag pkt not received\n", __func__); + msm_vidc_change_state(inst, MSM_VIDC_ERROR, __func__); + } + /* + * FW is expected to return DRAIN LAST flag before input + * stop done if DRAIN sequence is pending + */ + if (is_sub_state(inst, MSM_VIDC_DRAIN) && + !is_sub_state(inst, MSM_VIDC_DRAIN_LAST_BUFFER)) { + i_vpr_e(inst, "%s: drain last flag pkt not received\n", __func__); + msm_vidc_change_state(inst, MSM_VIDC_ERROR, __func__); + } + } else if (signal_type == SIGNAL_CMD_STOP_OUTPUT) { + set_sub_state = MSM_VIDC_OUTPUT_PAUSE; + } + + rc = msm_vidc_change_sub_state(inst, 0, set_sub_state, __func__); + if (rc) + return rc; + + signal_session_msg_receipt(inst, signal_type); + return rc; +} + +int msm_vidc_process_drain_done(struct msm_vidc_inst *inst) +{ + int rc = 0; + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (is_sub_state(inst, MSM_VIDC_DRAIN)) { + rc = msm_vidc_change_sub_state(inst, 0, MSM_VIDC_INPUT_PAUSE, __func__); + if (rc) + return rc; + } else { + i_vpr_e(inst, "%s: unexpected drain done\n", __func__); + } + + return rc; +} + +int msm_vidc_process_drain_last_flag(struct msm_vidc_inst *inst) +{ + int rc = 0; + struct v4l2_event event = {0}; + struct v4l2_event_vidc_last_flag *event_data = NULL; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + rc = msm_vidc_state_change_drain_last_flag(inst); + if (rc) + return rc; + + if (is_decode_session(inst) && + !inst->capabilities->cap[LAST_FLAG_EVENT_ENABLE].value) { + i_vpr_h(inst, "%s: last flag event not enabled\n", __func__); + return 0; + } + + event.type = V4L2_EVENT_VIDC_LAST_FLAG; + event_data = (struct v4l2_event_vidc_last_flag *)event.u.data; + event_data->flag_type = LAST_FLAG_DRAIN; + v4l2_event_queue_fh(&inst->event_handler, &event); + + return rc; +} + +int msm_vidc_process_psc_last_flag(struct msm_vidc_inst *inst) +{ + int rc = 0; + struct v4l2_event event = {0}; + struct v4l2_event_vidc_last_flag *event_data = NULL; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + rc = msm_vidc_state_change_psc_last_flag(inst); + if (rc) + return rc; + + if (is_decode_session(inst) && + !inst->capabilities->cap[LAST_FLAG_EVENT_ENABLE].value) { + i_vpr_h(inst, "%s: last flag event not enabled\n", __func__); + return 0; + } + + event.type = V4L2_EVENT_VIDC_LAST_FLAG; + event_data = (struct v4l2_event_vidc_last_flag *)event.u.data; + event_data->flag_type = LAST_FLAG_DRC; + v4l2_event_queue_fh(&inst->event_handler, &event); return rc; } @@ -2041,55 +2195,61 @@ state_change: int msm_vidc_state_change_input_psc(struct msm_vidc_inst *inst) { int rc = 0; - enum msm_vidc_inst_state new_state = MSM_VIDC_ERROR; + enum msm_vidc_sub_state set_sub_state = MSM_VIDC_SUB_STATE_NONE; if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - /* don't change state as output port is not started yet */ - if (inst->state == MSM_VIDC_START_INPUT) - return 0; - if (inst->state == MSM_VIDC_START) { - new_state = MSM_VIDC_DRC; - } else if (inst->state == MSM_VIDC_DRAIN) { - new_state = MSM_VIDC_DRC_DRAIN; - } else { - i_vpr_e(inst, "%s: wrong state %s\n", - __func__, state_name(inst->state)); - msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); - return -EINVAL; - } - rc = msm_vidc_change_inst_state(inst, new_state, __func__); + /* + * if output port is not streaming, then do not set DRC substate + * because DRC_LAST_FLAG is not going to be received. Update + * INPUT_PAUSE substate only + */ + if (is_state(inst, MSM_VIDC_INPUT_STREAMING) || + is_state(inst, MSM_VIDC_OPEN)) + set_sub_state = MSM_VIDC_INPUT_PAUSE; + else + set_sub_state = MSM_VIDC_DRC | MSM_VIDC_INPUT_PAUSE; + + rc = msm_vidc_change_sub_state(inst, 0, set_sub_state, __func__); if (rc) return rc; return rc; } -int msm_vidc_state_change_last_flag(struct msm_vidc_inst *inst) +int msm_vidc_state_change_drain_last_flag(struct msm_vidc_inst *inst) { int rc = 0; - enum msm_vidc_inst_state new_state = MSM_VIDC_ERROR; + enum msm_vidc_sub_state set_sub_state = MSM_VIDC_SUB_STATE_NONE; if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - if (inst->state == MSM_VIDC_DRC) { - new_state = MSM_VIDC_DRC_LAST_FLAG; - } else if (inst->state == MSM_VIDC_DRAIN) { - new_state = MSM_VIDC_DRAIN_LAST_FLAG; - } else if (inst->state == MSM_VIDC_DRC_DRAIN) { - new_state = MSM_VIDC_DRC_DRAIN_LAST_FLAG; - } else { - i_vpr_e(inst, "%s: wrong state %s\n", - __func__, state_name(inst->state)); - msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); + + set_sub_state = MSM_VIDC_DRAIN_LAST_BUFFER | MSM_VIDC_OUTPUT_PAUSE; + rc = msm_vidc_change_sub_state(inst, 0, set_sub_state, __func__); + if (rc) + return rc; + + return rc; +} + +int msm_vidc_state_change_psc_last_flag(struct msm_vidc_inst *inst) +{ + int rc = 0; + enum msm_vidc_sub_state set_sub_state = MSM_VIDC_SUB_STATE_NONE; + + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - rc = msm_vidc_change_inst_state(inst, new_state, __func__); + + set_sub_state = MSM_VIDC_DRC_LAST_BUFFER | MSM_VIDC_OUTPUT_PAUSE; + rc = msm_vidc_change_sub_state(inst, 0, set_sub_state, __func__); if (rc) return rc; @@ -3317,7 +3477,7 @@ int schedule_stats_work(struct msm_vidc_inst *inst) return 0; } core = inst->core; - mod_delayed_work(inst->response_workq, &inst->stats_work, + mod_delayed_work(inst->workq, &inst->stats_work, msecs_to_jiffies(core->capabilities[STATS_TIMEOUT_MS].value)); return 0; @@ -4357,25 +4517,6 @@ int msm_vidc_session_set_default_header(struct msm_vidc_inst *inst) return rc; } -int msm_vidc_session_streamon(struct msm_vidc_inst *inst, - enum msm_vidc_port_type port) -{ - int rc = 0; - - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - msm_vidc_scale_power(inst, true); - - rc = venus_hfi_start(inst, port); - if (rc) - return rc; - - return rc; -} - int msm_vidc_session_streamoff(struct msm_vidc_inst *inst, enum msm_vidc_port_type port) { @@ -4405,6 +4546,10 @@ int msm_vidc_session_streamoff(struct msm_vidc_inst *inst, if (rc) goto error; + rc = msm_vidc_state_change_streamoff(inst, port); + if (rc) + goto error; + core = inst->core; i_vpr_h(inst, "%s: wait on port: %d for time: %d ms\n", __func__, port, core->capabilities[HW_RESPONSE_TIMEOUT].value); @@ -4427,20 +4572,10 @@ int msm_vidc_session_streamoff(struct msm_vidc_inst *inst, goto error; if (port == INPUT_PORT) { - /* discard pending input port settings change if any */ - msm_vidc_discard_pending_ipsc(inst); - /* flush input timer list */ msm_vidc_flush_input_timer(inst); } - if (port == OUTPUT_PORT) { - /* discard pending opsc if any*/ - msm_vidc_discard_pending_opsc(inst); - /* flush out pending last flag buffers if any */ - msm_vidc_flush_pending_last_flag(inst); - } - /* no more queued buffers after streamoff */ count = msm_vidc_num_buffers(inst, buffer_type, MSM_VIDC_ATTR_QUEUED); if (!count) { @@ -4502,6 +4637,9 @@ int msm_vidc_session_close(struct msm_vidc_inst *inst) } inst_lock(inst, __func__); + inst->state = MSM_VIDC_CLOSE; + inst->sub_state = MSM_VIDC_SUB_STATE_NONE; + strlcpy(inst->sub_state_name, "SUB_STATE_NONE", sizeof(inst->sub_state_name)); msm_vidc_remove_session(inst); return rc; @@ -4520,7 +4658,7 @@ int msm_vidc_kill_session(struct msm_vidc_inst *inst) i_vpr_e(inst, "%s: killing session\n", __func__); msm_vidc_session_close(inst); - msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); + msm_vidc_change_state(inst, MSM_VIDC_ERROR, __func__); return 0; } @@ -4820,7 +4958,7 @@ int msm_vidc_core_deinit_locked(struct msm_vidc_core *core, bool force) /* unlink all sessions from core, if any */ list_for_each_entry_safe(inst, dummy, &core->instances, list) { - msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); + msm_vidc_change_state(inst, MSM_VIDC_ERROR, __func__); list_del_init(&inst->list); list_add_tail(&inst->list, &core->dangling_instances); } @@ -5326,7 +5464,7 @@ void msm_vidc_batch_handler(struct work_struct *work) rc = msm_vidc_queue_deferred_buffers(inst, MSM_VIDC_BUF_OUTPUT); if (rc) { i_vpr_e(inst, "%s: batch qbufs failed\n", __func__); - msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); + msm_vidc_change_state(inst, MSM_VIDC_ERROR, __func__); } exit: @@ -5434,7 +5572,7 @@ int msm_vidc_flush_delayed_unmap_buffers(struct msm_vidc_inst *inst, i_vpr_e(inst, "%s: unexpected map refcount: %u device addr %#x\n", __func__, map->refcount, map->device_addr); - msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); + msm_vidc_change_state(inst, MSM_VIDC_ERROR, __func__); } msm_vidc_memory_unmap_completely(inst, map); } @@ -5451,7 +5589,6 @@ void msm_vidc_destroy_buffers(struct msm_vidc_inst *inst) struct msm_vidc_timestamp *ts, *dummy_ts; struct msm_memory_dmabuf *dbuf, *dummy_dbuf; struct msm_vidc_input_timer *timer, *dummy_timer; - struct response_work *work, *dummy_work = NULL; struct msm_vidc_inst_cap_entry *entry, *dummy_entry; struct msm_vidc_fence *fence, *dummy_fence; @@ -5547,12 +5684,6 @@ void msm_vidc_destroy_buffers(struct msm_vidc_inst *inst) msm_vidc_memory_put_dmabuf_completely(inst, dbuf); } - list_for_each_entry_safe(work, dummy_work, &inst->response_works, list) { - list_del(&work->list); - msm_vidc_vmem_free((void **)&work->data); - msm_vidc_vmem_free((void **)&work); - } - list_for_each_entry_safe(entry, dummy_entry, &inst->firmware_list, list) { i_vpr_e(inst, "%s: fw list: %s\n", __func__, cap_name(entry->cap_id)); list_del(&entry->list); @@ -5594,8 +5725,8 @@ static void msm_vidc_close_helper(struct kref *kref) else if (is_encode_session(inst)) msm_venc_inst_deinit(inst); msm_vidc_free_input_cr_list(inst); - if (inst->response_workq) - destroy_workqueue(inst->response_workq); + if (inst->workq) + destroy_workqueue(inst->workq); msm_vidc_remove_dangling_session(inst); mutex_destroy(&inst->client_lock); mutex_destroy(&inst->request_lock); diff --git a/driver/vidc/src/msm_vidc_vb2.c b/driver/vidc/src/msm_vidc_vb2.c index 740c3b7db1..4b3378fe5d 100644 --- a/driver/vidc/src/msm_vidc_vb2.c +++ b/driver/vidc/src/msm_vidc_vb2.c @@ -112,7 +112,7 @@ int msm_vidc_queue_setup(struct vb2_queue *q, return -EINVAL; } - if (inst->state == MSM_VIDC_START) { + if (is_state(inst, MSM_VIDC_STREAMING)) { i_vpr_e(inst, "%s: invalid state %d\n", __func__, inst->state); return -EINVAL; } @@ -217,10 +217,6 @@ int msm_vidc_start_streaming(struct vb2_queue *q, unsigned int count) goto unlock; } - rc = msm_vidc_state_change_streamon(inst, q->type); - if (rc) - goto unlock; - if (q->type == INPUT_META_PLANE && inst->capabilities->cap[INPUT_META_VIA_REQUEST].value) { i_vpr_e(inst, @@ -335,7 +331,7 @@ int msm_vidc_start_streaming(struct vb2_queue *q, unsigned int count) unlock: if (rc) { i_vpr_e(inst, "Streamon: %s failed\n", v4l2_type_name(q->type)); - msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); + msm_vidc_change_state(inst, MSM_VIDC_ERROR, __func__); } inst_unlock(inst, __func__); client_unlock(inst, __func__); @@ -381,10 +377,6 @@ void msm_vidc_stop_streaming(struct vb2_queue *q) goto unlock; } - rc = msm_vidc_state_change_streamoff(inst, q->type); - if (rc) - goto unlock; - if (!is_decode_session(inst) && !is_encode_session(inst)) { i_vpr_e(inst, "%s: invalid session %d\n", __func__, inst->domain); @@ -420,7 +412,7 @@ void msm_vidc_stop_streaming(struct vb2_queue *q) unlock: if (rc) { i_vpr_e(inst, "Streamoff: %s failed\n", v4l2_type_name(q->type)); - msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); + msm_vidc_change_state(inst, MSM_VIDC_ERROR, __func__); } inst_unlock(inst, __func__); client_unlock(inst, __func__); @@ -531,7 +523,7 @@ void msm_vidc_buf_queue(struct vb2_buffer *vb2) unlock: if (rc) { - msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); + msm_vidc_change_state(inst, MSM_VIDC_ERROR, __func__); vb2_buffer_done(vb2, VB2_BUF_STATE_ERROR); } inst_unlock(inst, __func__); diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index e3f1f2b4ae..b1905e1c21 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -3308,6 +3308,137 @@ unlock: return rc; } +int venus_hfi_session_pause(struct msm_vidc_inst *inst, enum msm_vidc_port_type port) +{ + int rc = 0; + struct msm_vidc_core* core; + + if (!inst || !inst->core || !inst->packet) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + core = inst->core; + core_lock(core, __func__); + + if (!__valdiate_session(core, inst, __func__)) { + rc = -EINVAL; + goto unlock; + } + + if (port != INPUT_PORT && port != OUTPUT_PORT) { + i_vpr_e(inst, "%s: invalid port %d\n", __func__, port); + goto unlock; + } + + rc = hfi_packet_session_command(inst, + HFI_CMD_PAUSE, + (HFI_HOST_FLAGS_RESPONSE_REQUIRED | + HFI_HOST_FLAGS_INTR_REQUIRED), + get_hfi_port(inst, port), + inst->session_id, + HFI_PAYLOAD_NONE, + NULL, + 0); + if (rc) + goto unlock; + + rc = __iface_cmdq_write(inst->core, inst->packet); + if (rc) + goto unlock; + +unlock: + core_unlock(core, __func__); + return rc; +} + +int venus_hfi_session_resume(struct msm_vidc_inst *inst, + enum msm_vidc_port_type port, u32 payload) +{ + int rc = 0; + struct msm_vidc_core* core; + + if (!inst || !inst->core || !inst->packet) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + core = inst->core; + core_lock(core, __func__); + + if (!__valdiate_session(core, inst, __func__)) { + rc = -EINVAL; + goto unlock; + } + + if (port != INPUT_PORT && port != OUTPUT_PORT) { + i_vpr_e(inst, "%s: invalid port %d\n", __func__, port); + goto unlock; + } + + rc = hfi_packet_session_command(inst, + HFI_CMD_RESUME, + (HFI_HOST_FLAGS_RESPONSE_REQUIRED | + HFI_HOST_FLAGS_INTR_REQUIRED), + get_hfi_port(inst, port), + inst->session_id, + HFI_PAYLOAD_U32, + &payload, + sizeof(u32)); + if (rc) + goto unlock; + + rc = __iface_cmdq_write(inst->core, inst->packet); + if (rc) + goto unlock; + +unlock: + core_unlock(core, __func__); + return rc; +} + +int venus_hfi_session_drain(struct msm_vidc_inst *inst, enum msm_vidc_port_type port) +{ + int rc = 0; + struct msm_vidc_core* core; + + if (!inst || !inst->core || !inst->packet) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + core = inst->core; + core_lock(core, __func__); + + if (!__valdiate_session(core, inst, __func__)) { + rc = -EINVAL; + goto unlock; + } + + if (port != INPUT_PORT) { + i_vpr_e(inst, "%s: invalid port %d\n", __func__, port); + goto unlock; + } + + rc = hfi_packet_session_command(inst, + HFI_CMD_DRAIN, + (HFI_HOST_FLAGS_RESPONSE_REQUIRED | + HFI_HOST_FLAGS_INTR_REQUIRED | + HFI_HOST_FLAGS_NON_DISCARDABLE), + get_hfi_port(inst, port), + inst->session_id, + HFI_PAYLOAD_NONE, + NULL, + 0); + if (rc) + goto unlock; + + rc = __iface_cmdq_write(inst->core, inst->packet); + if (rc) + goto unlock; + +unlock: + core_unlock(core, __func__); + return rc; +} + int venus_hfi_session_command(struct msm_vidc_inst *inst, u32 cmd, enum msm_vidc_port_type port, u32 payload_type, void *payload, u32 payload_size) diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index 4434815e7b..db18a5dfc9 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -178,14 +178,6 @@ bool is_valid_hfi_buffer_type(struct msm_vidc_inst *inst, return true; } -static int signal_session_msg_receipt(struct msm_vidc_inst *inst, - enum signal_session_response cmd) -{ - if (cmd < MAX_SIGNAL) - complete(&inst->completions[cmd]); - return 0; -} - int validate_packet(u8 *response_pkt, u8 *core_resp_pkt, u32 core_resp_pkt_size, const char *func) { @@ -304,29 +296,35 @@ static bool check_for_packet_payload(struct msm_vidc_inst *inst, return true; } -static bool check_last_flag(struct msm_vidc_inst *inst, - struct hfi_packet *pkt) +static int handle_session_last_flag_info(struct msm_vidc_inst *inst, + struct hfi_packet *pkt) { - struct hfi_buffer *buffer; + int rc = 0; - if (!inst || !pkt) { - d_vpr_e("%s: invalid params\n", __func__); - return false; + if (pkt->type == HFI_INFO_HFI_FLAG_PSC_LAST) { + if (msm_vidc_allow_psc_last_flag(inst)) + rc = msm_vidc_process_psc_last_flag(inst); + else + rc = -EINVAL; + } else if (pkt->type == HFI_INFO_HFI_FLAG_DRAIN_LAST) { + if (msm_vidc_allow_drain_last_flag(inst)) + rc = msm_vidc_process_drain_last_flag(inst); + else + rc = -EINVAL; + } else { + i_vpr_e(inst, "%s: invalid packet type %#x\n", __func__, + pkt->type); } - buffer = (struct hfi_buffer *)((u8 *)pkt + sizeof(struct hfi_packet)); - if (buffer->flags & HFI_BUF_FW_FLAG_LAST) { - i_vpr_h(inst, "%s: received last flag on FBD, index: %d\n", - __func__, buffer->index); - return true; - } - return false; + if (rc) + msm_vidc_change_state(inst, MSM_VIDC_ERROR, __func__); + + return rc; } static int handle_session_info(struct msm_vidc_inst *inst, struct hfi_packet *pkt) { - int rc = 0; char *info; @@ -342,12 +340,20 @@ static int handle_session_info(struct msm_vidc_inst *inst, info = "buffer overflow"; inst->hfi_frame_info.overflow = 1; break; + case HFI_INFO_HFI_FLAG_DRAIN_LAST: + info = "drain last flag"; + rc = handle_session_last_flag_info(inst, pkt); + break; + case HFI_INFO_HFI_FLAG_PSC_LAST: + info = "drc last flag"; + rc = handle_session_last_flag_info(inst, pkt); + break; default: info = "unknown"; break; } - i_vpr_e(inst, "session info (%#x): %s\n", pkt->type, info); + i_vpr_h(inst, "session info (%#x): %s\n", pkt->type, info); return rc; } @@ -385,7 +391,7 @@ static int handle_session_error(struct msm_vidc_inst *inst, i_vpr_e(inst, "%s: session error received %#x: %s\n", __func__, pkt->type, error); - rc = msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); + rc = msm_vidc_change_state(inst, MSM_VIDC_ERROR, __func__); return rc; } @@ -537,7 +543,8 @@ static int handle_session_start(struct msm_vidc_inst *inst, static int handle_session_stop(struct msm_vidc_inst *inst, struct hfi_packet *pkt) { - int signal_type = -1; + int rc = 0; + enum signal_session_response signal_type = -1; if (pkt->flags & HFI_FW_FLAGS_SUCCESS) i_vpr_h(inst, "%s: successful for port %d\n", @@ -568,17 +575,28 @@ static int handle_session_stop(struct msm_vidc_inst *inst, return -EINVAL; } - if (signal_type != -1) - signal_session_msg_receipt(inst, signal_type); + if (signal_type != -1) { + rc = msm_vidc_process_stop_done(inst, signal_type); + if (rc) + return rc; + } + return 0; } static int handle_session_drain(struct msm_vidc_inst *inst, struct hfi_packet *pkt) { + int rc = 0; + if (pkt->flags & HFI_FW_FLAGS_SUCCESS) i_vpr_h(inst, "%s: successful\n", __func__); - return 0; + + rc = msm_vidc_process_drain_done(inst); + if (rc) + return rc; + + return rc; } static int get_driver_buffer_flags(struct msm_vidc_inst *inst, u32 hfi_flags) @@ -618,7 +636,18 @@ static int get_driver_buffer_flags(struct msm_vidc_inst *inst, u32 hfi_flags) if (hfi_flags & HFI_BUF_FW_FLAG_CODEC_CONFIG) driver_flags |= MSM_VIDC_BUF_FLAG_CODECCONFIG; - if (hfi_flags & HFI_BUF_FW_FLAG_LAST) + /* + * attach last flag to the buffer for encode session. + * For decode session attach only if control(LAST_FLAG_EVENT_ENABLE) + * is not set by client. If this control is enabled, last flag + * info will be sent via event(V4L2_EVENT_VIDC_LAST_FLAG) to client. + */ + if ((is_encode_session(inst) && + (hfi_flags & HFI_BUF_FW_FLAG_LAST)) || + (is_decode_session(inst) && + !inst->capabilities->cap[LAST_FLAG_EVENT_ENABLE].value && + ((hfi_flags & HFI_BUF_FW_FLAG_LAST) || + (hfi_flags & HFI_BUF_FW_FLAG_PSC_LAST)))) driver_flags |= MSM_VIDC_BUF_FLAG_LAST; return driver_flags; @@ -714,6 +743,48 @@ static int handle_non_read_only_buffer(struct msm_vidc_inst *inst, return 0; } +static int handle_psc_last_flag_buffer(struct msm_vidc_inst *inst, + struct hfi_buffer *buffer) +{ + int rc = 0; + + if (!(buffer->flags & HFI_BUF_FW_FLAG_PSC_LAST)) + return 0; + + if (!msm_vidc_allow_psc_last_flag(inst)) + return -EINVAL; + + rc = msm_vidc_process_psc_last_flag(inst); + if (rc) + return rc; + + return rc; +} + +static int handle_drain_last_flag_buffer(struct msm_vidc_inst *inst, + struct hfi_buffer *buffer) +{ + int rc = 0; + + if (!(buffer->flags & HFI_BUF_FW_FLAG_LAST)) + return 0; + + if (!msm_vidc_allow_drain_last_flag(inst)) + return -EINVAL; + + if (is_decode_session(inst)) { + rc = msm_vidc_process_drain_last_flag(inst); + if (rc) + return rc; + } else if (is_encode_session(inst)) { + rc = msm_vidc_state_change_drain_last_flag(inst); + if (rc) + return rc; + } + + return rc; +} + static int handle_input_buffer(struct msm_vidc_inst *inst, struct hfi_buffer *buffer) { @@ -801,11 +872,25 @@ static int handle_output_buffer(struct msm_vidc_inst *inst, return -EINVAL; } + /* handle drain last flag buffer */ + if (buffer->flags & HFI_BUF_FW_FLAG_LAST) { + rc = handle_drain_last_flag_buffer(inst, buffer); + if (rc) + msm_vidc_change_state(inst, MSM_VIDC_ERROR, __func__); + } + if (is_decode_session(inst)) { + /* handle psc last flag buffer */ + if (buffer->flags & HFI_BUF_FW_FLAG_PSC_LAST) { + rc = handle_psc_last_flag_buffer(inst, buffer); + if (rc) + msm_vidc_change_state(inst, MSM_VIDC_ERROR, __func__); + } + /* handle non-read only buffer */ if (!(buffer->flags & HFI_BUF_FW_FLAG_READONLY)) { rc = handle_non_read_only_buffer(inst, buffer); if (rc) - msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); + msm_vidc_change_state(inst, MSM_VIDC_ERROR, __func__); } } @@ -861,14 +946,15 @@ static int handle_output_buffer(struct msm_vidc_inst *inst, } } if (fatal) - msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); + msm_vidc_change_state(inst, MSM_VIDC_ERROR, __func__); } /* * reset data size to zero for last flag buffer. * reset RO flag for last flag buffer. */ - if (buffer->flags & HFI_BUF_FW_FLAG_LAST) { + if ((buffer->flags & HFI_BUF_FW_FLAG_LAST) || + (buffer->flags & HFI_BUF_FW_FLAG_PSC_LAST)) { if (buffer->data_size) { i_vpr_e(inst, "%s: reset data size to zero for last flag buffer\n", __func__); @@ -894,7 +980,7 @@ static int handle_output_buffer(struct msm_vidc_inst *inst, buf->attr |= MSM_VIDC_ATTR_READ_ONLY; rc = handle_read_only_buffer(inst, buf); if (rc) - msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); + msm_vidc_change_state(inst, MSM_VIDC_ERROR, __func__); } else { buf->attr &= ~MSM_VIDC_ATTR_READ_ONLY; } @@ -993,7 +1079,12 @@ static int handle_input_metadata_buffer(struct msm_vidc_inst *inst, buf->attr &= ~MSM_VIDC_ATTR_QUEUED; buf->attr |= MSM_VIDC_ATTR_DEQUEUED; buf->flags = 0; - if (buffer->flags & HFI_BUF_FW_FLAG_LAST) + if ((is_encode_session(inst) && + (buffer->flags & HFI_BUF_FW_FLAG_LAST)) || + (is_decode_session(inst) && + !inst->capabilities->cap[LAST_FLAG_EVENT_ENABLE].value && + ((buffer->flags & HFI_BUF_FW_FLAG_LAST) || + (buffer->flags & HFI_BUF_FW_FLAG_PSC_LAST)))) buf->flags |= MSM_VIDC_BUF_FLAG_LAST; print_vidc_buffer(VIDC_LOW, "low ", "dqbuf", inst, buf); @@ -1008,6 +1099,11 @@ static int handle_output_metadata_buffer(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buf; bool found; + if (!inst || !inst->capabilities) { + d_vpr_e("%s: Invalid params\n", __func__); + return -EINVAL; + } + buffers = msm_vidc_get_buffers(inst, MSM_VIDC_BUF_OUTPUT_META, __func__); if (!buffers) return -EINVAL; @@ -1035,7 +1131,12 @@ static int handle_output_metadata_buffer(struct msm_vidc_inst *inst, buf->attr &= ~MSM_VIDC_ATTR_QUEUED; buf->attr |= MSM_VIDC_ATTR_DEQUEUED; buf->flags = 0; - if (buffer->flags & HFI_BUF_FW_FLAG_LAST) + if ((is_encode_session(inst) && + (buffer->flags & HFI_BUF_FW_FLAG_LAST)) || + (is_decode_session(inst) && + !inst->capabilities->cap[LAST_FLAG_EVENT_ENABLE].value && + ((buffer->flags & HFI_BUF_FW_FLAG_LAST) || + (buffer->flags & HFI_BUF_FW_FLAG_PSC_LAST)))) buf->flags |= MSM_VIDC_BUF_FLAG_LAST; print_vidc_buffer(VIDC_LOW, "low ", "dqbuf", inst, buf); @@ -1267,18 +1368,18 @@ static int handle_session_buffer(struct msm_vidc_inst *inst, } if (!check_for_packet_payload(inst, pkt, __func__)) { - msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); + msm_vidc_change_state(inst, MSM_VIDC_ERROR, __func__); return 0; } buffer = (struct hfi_buffer *)((u8 *)pkt + sizeof(struct hfi_packet)); if (!is_valid_hfi_buffer_type(inst, buffer->type, __func__)) { - msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); + msm_vidc_change_state(inst, MSM_VIDC_ERROR, __func__); return 0; } if (!is_valid_hfi_port(inst, pkt->port, buffer->type, __func__)) { - msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); + msm_vidc_change_state(inst, MSM_VIDC_ERROR, __func__); return 0; } if (is_decode_session(inst) && buffer->type == HFI_BUFFER_RAW && @@ -1329,6 +1430,39 @@ static int handle_session_buffer(struct msm_vidc_inst *inst, return rc; } +static int handle_input_port_settings_change(struct msm_vidc_inst *inst) +{ + int rc = 0; + enum msm_vidc_allow allow = MSM_VIDC_DISALLOW; + + allow = msm_vidc_allow_input_psc(inst); + if (allow == MSM_VIDC_DISALLOW) { + return -EINVAL; + } else if (allow == MSM_VIDC_ALLOW) { + rc = msm_vidc_state_change_input_psc(inst); + if (rc) + return rc; + print_psc_properties("INPUT_PSC", inst, inst->subcr_params[INPUT_PORT]); + rc = msm_vdec_input_port_settings_change(inst); + if (rc) + return rc; + } + + return rc; +} + +static int handle_output_port_settings_change(struct msm_vidc_inst *inst) +{ + int rc = 0; + + print_psc_properties("OUTPUT_PSC", inst, inst->subcr_params[OUTPUT_PORT]); + rc = msm_vdec_output_port_settings_change(inst); + if (rc) + return rc; + + return rc; +} + static int handle_port_settings_change(struct msm_vidc_inst *inst, struct hfi_packet *pkt) { @@ -1338,17 +1472,23 @@ static int handle_port_settings_change(struct msm_vidc_inst *inst, __func__, pkt->port); if (pkt->port == HFI_PORT_RAW) { - print_psc_properties("OUTPUT_PSC", inst, inst->subcr_params[OUTPUT_PORT]); - rc = msm_vdec_output_port_settings_change(inst); + rc = handle_output_port_settings_change(inst); + if (rc) + goto exit; } else if (pkt->port == HFI_PORT_BITSTREAM) { - print_psc_properties("INPUT_PSC", inst, inst->subcr_params[INPUT_PORT]); - rc = msm_vdec_input_port_settings_change(inst); + rc = handle_input_port_settings_change(inst); + if (rc) + goto exit; } else { i_vpr_e(inst, "%s: invalid port type: %#x\n", __func__, pkt->port); rc = -EINVAL; + goto exit; } +exit: + if (rc) + msm_vidc_change_state(inst, MSM_VIDC_ERROR, __func__); return rc; } @@ -1368,6 +1508,14 @@ static int handle_session_delivery_mode(struct msm_vidc_inst *inst, return 0; } +static int handle_session_pause(struct msm_vidc_inst *inst, + struct hfi_packet *pkt) +{ + if (pkt->flags & HFI_FW_FLAGS_SUCCESS) + i_vpr_h(inst, "%s: successful\n", __func__); + return 0; +} + static int handle_session_resume(struct msm_vidc_inst *inst, struct hfi_packet *pkt) { @@ -1398,6 +1546,7 @@ static int handle_session_command(struct msm_vidc_inst *inst, {HFI_CMD_SETTINGS_CHANGE, handle_port_settings_change }, {HFI_CMD_SUBSCRIBE_MODE, handle_session_subscribe_mode }, {HFI_CMD_DELIVERY_MODE, handle_session_delivery_mode }, + {HFI_CMD_PAUSE, handle_session_pause }, {HFI_CMD_RESUME, handle_session_resume }, {HFI_CMD_STABILITY, handle_session_stability }, }; @@ -1437,7 +1586,7 @@ static int handle_dpb_list_property(struct msm_vidc_inst *inst, i_vpr_e(inst, "%s: dpb list payload size %d exceeds expected max size %d\n", __func__, payload_size, MAX_DPB_LIST_PAYLOAD_SIZE); - msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); + msm_vidc_change_state(inst, MSM_VIDC_ERROR, __func__); } memcpy(inst->dpb_list_payload, payload_start, payload_size); @@ -1764,7 +1913,7 @@ static int __handle_session_response(struct msm_vidc_inst *inst, dequeue |= (packet->type == HFI_CMD_BUFFER); rc = be[i].handle(inst, packet); if (rc) - msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); + msm_vidc_change_state(inst, MSM_VIDC_ERROR, __func__); } pkt += packet->size; } @@ -1780,163 +1929,14 @@ static int __handle_session_response(struct msm_vidc_inst *inst, return rc; } -int handle_session_response_work(struct msm_vidc_inst *inst, - struct response_work *resp_work) -{ - int rc = 0; - struct hfi_header *hdr = NULL; - - if (!inst || !inst->core || !resp_work) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - hdr = (struct hfi_header *)resp_work->data; - if (!hdr) { - i_vpr_e(inst, "%s: invalid params\n", __func__); - return -EINVAL; - } - if (resp_work->type == RESP_WORK_INPUT_PSC) - msm_vdec_init_input_subcr_params(inst); - - rc = __handle_session_response(inst, hdr); - if (rc) - return rc; - - return 0; -} - -void handle_session_response_work_handler(struct work_struct *work) -{ - int rc = 0; - struct msm_vidc_inst *inst; - struct response_work *resp_work, *dummy = NULL; - - inst = container_of(work, struct msm_vidc_inst, response_work.work); - inst = get_inst_ref(g_core, inst); - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return; - } - - inst_lock(inst, __func__); - list_for_each_entry_safe(resp_work, dummy, &inst->response_works, list) { - switch (resp_work->type) { - case RESP_WORK_INPUT_PSC: - { - enum msm_vidc_allow allow = MSM_VIDC_DISALLOW; - - allow = msm_vidc_allow_input_psc(inst); - if (allow == MSM_VIDC_DISALLOW) { - msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); - break; - } else if (allow == MSM_VIDC_DEFER) { - /* continue to next entry processing */ - continue; - } else if (allow == MSM_VIDC_DISCARD) { - /* if ipsc is discarded then override the psc properties again */ - inst->ipsc_properties_set = false; - /* discard current entry processing */ - break; - } else if (allow == MSM_VIDC_ALLOW) { - rc = handle_session_response_work(inst, resp_work); - if (!rc) - rc = msm_vidc_state_change_input_psc(inst); - /* either handle input psc or state change failed */ - if (rc) - msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); - } - break; - } - case RESP_WORK_OUTPUT_PSC: - rc = handle_session_response_work(inst, resp_work); - if (rc) - msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); - break; - case RESP_WORK_LAST_FLAG: - rc = handle_session_response_work(inst, resp_work); - if (rc) { - msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); - break; - } - if (msm_vidc_allow_last_flag(inst)) { - rc = msm_vidc_state_change_last_flag(inst); - if (rc) - msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__); - } - break; - default: - i_vpr_e(inst, "%s: invalid response work type %d\n", __func__, - resp_work->type); - break; - } - list_del(&resp_work->list); - msm_vidc_vmem_free((void **)&resp_work->data); - msm_vidc_vmem_free((void **)&resp_work); - } - inst_unlock(inst, __func__); - - put_inst(inst); -} - -static int queue_response_work(struct msm_vidc_inst *inst, - enum response_work_type type, void *hdr, u32 hdr_size) -{ - struct response_work *work = NULL; - - if (msm_vidc_vmem_alloc(sizeof(struct response_work), (void **)&work, __func__)) - return -ENOMEM; - INIT_LIST_HEAD(&work->list); - work->type = type; - work->data_size = hdr_size; - if (msm_vidc_vmem_alloc(hdr_size, (void **)&work->data, "Work data")) - return -ENOMEM; - memcpy(work->data, hdr, hdr_size); - list_add_tail(&work->list, &inst->response_works); - queue_delayed_work(inst->response_workq, - &inst->response_work, msecs_to_jiffies(0)); - return 0; -} - -int cancel_response_work(struct msm_vidc_inst *inst) -{ - struct response_work *work, *dummy_work = NULL; - - if (!inst) { - d_vpr_e("%s: Invalid arguments\n", __func__); - return -EINVAL; - } - cancel_delayed_work(&inst->response_work); - - list_for_each_entry_safe(work, dummy_work, &inst->response_works, list) { - list_del(&work->list); - msm_vidc_vmem_free((void **)&work->data); - msm_vidc_vmem_free((void **)&work); - } - - return 0; -} - -int cancel_response_work_sync(struct msm_vidc_inst *inst) -{ - if (!inst || !inst->response_workq) { - d_vpr_e("%s: Invalid arguments\n", __func__); - return -EINVAL; - } - cancel_delayed_work_sync(&inst->response_work); - - return 0; -} - static int handle_session_response(struct msm_vidc_core *core, struct hfi_header *hdr) { struct msm_vidc_inst *inst; struct hfi_packet *packet; u8 *pkt; - enum response_work_type type; int i, rc = 0; - bool offload = false; + bool found_ipsc = false; if (!core || !hdr) { d_vpr_e("%s: Invalid params\n", __func__); @@ -1950,42 +1950,22 @@ static int handle_session_response(struct msm_vidc_core *core, } inst_lock(inst, __func__); - /* search for special pkt */ + /* search for cmd settings change pkt */ pkt = (u8 *)((u8 *)hdr + sizeof(struct hfi_header)); for (i = 0; i < hdr->num_packets; i++) { packet = (struct hfi_packet *)pkt; - if (packet->type == HFI_CMD_SETTINGS_CHANGE) { if (packet->port == HFI_PORT_BITSTREAM) { - offload = true; - type = RESP_WORK_INPUT_PSC; - } else if (packet->port == HFI_PORT_RAW) { - offload = true; - type = RESP_WORK_OUTPUT_PSC; - } - } else if (packet->type == HFI_CMD_BUFFER && - vidc_port_from_hfi(inst, packet->port) == - OUTPUT_PORT) { - if (check_last_flag(inst, packet)) { - offload = true; - type = RESP_WORK_LAST_FLAG; + found_ipsc = true; + break; } } - - if (offload) - break; - pkt += packet->size; } - if (offload) { - i_vpr_h(inst, "%s: queue response work %#x\n", __func__, type); - rc = queue_response_work(inst, type, (void *)hdr, hdr->size); - if (rc) - i_vpr_e(inst, "%s: Offload response work failed\n", __func__); - - goto exit; - } + /* if ipsc packet is found, initialise subsc_params */ + if (found_ipsc) + msm_vdec_init_input_subcr_params(inst); rc = __handle_session_response(inst, hdr); if (rc) diff --git a/include/uapi/vidc/media/v4l2_vidc_extensions.h b/include/uapi/vidc/media/v4l2_vidc_extensions.h index bdd685b5f3..17e02d8293 100644 --- a/include/uapi/vidc/media/v4l2_vidc_extensions.h +++ b/include/uapi/vidc/media/v4l2_vidc_extensions.h @@ -268,6 +268,9 @@ enum v4l2_h264_encode_delivery_mode { #define V4L2_CID_MPEG_VIDC_CLIENT_ID \ (V4L2_CID_MPEG_VIDC_BASE + 0x41) +#define V4L2_CID_MPEG_VIDC_LAST_FLAG_EVENT_ENABLE \ + (V4L2_CID_MPEG_VIDC_BASE + 0x42) + /* add new controls above this line */ /* Deprecate below controls once availble in gki and gsi bionic header */ #ifndef V4L2_CID_MPEG_VIDEO_BASELAYER_PRIORITY_ID @@ -461,6 +464,19 @@ struct v4l2_event_vidc_metadata { __u32 offset; __u8 reserved[44]; }; + +#define V4L2_EVENT_VIDC_LAST_FLAG \ + (V4L2_EVENT_PRIVATE_START + 0x2) + +enum v4l2_event_last_flag { + LAST_FLAG_DRC = (1 << 0), + LAST_FLAG_DRAIN = (1 << 1), +}; + +struct v4l2_event_vidc_last_flag { + enum v4l2_event_last_flag flag_type; +}; + /* vendor events end */ /* Default metadata size (align to 4KB) */ From c5a62d98a46f7b165643156406e7bb7b70ae1b9f Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Wed, 29 Jun 2022 16:47:56 -0700 Subject: [PATCH 0657/1061] video: driver: check for drain last flag for decoder only As part of stop done, check if firmware has returned drain last flag only for decoder. Change-Id: I9738fe316b4e3081a8ab9c8066ef5f59ac0720f0 Signed-off-by: Darshana Patil --- driver/vidc/src/msm_vidc_driver.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index f8ae6134af..49937900f2 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -2094,10 +2094,12 @@ int msm_vidc_process_stop_done(struct msm_vidc_inst *inst, msm_vidc_change_state(inst, MSM_VIDC_ERROR, __func__); } /* - * FW is expected to return DRAIN LAST flag before input - * stop done if DRAIN sequence is pending + * for a decode session, FW is expected to return + * DRAIN LAST flag before input stop done if + * DRAIN sequence is pending */ - if (is_sub_state(inst, MSM_VIDC_DRAIN) && + if (is_decode_session(inst) && + is_sub_state(inst, MSM_VIDC_DRAIN) && !is_sub_state(inst, MSM_VIDC_DRAIN_LAST_BUFFER)) { i_vpr_e(inst, "%s: drain last flag pkt not received\n", __func__); msm_vidc_change_state(inst, MSM_VIDC_ERROR, __func__); From cd799e6c3132ab84b03d5a876203969647ad82f8 Mon Sep 17 00:00:00 2001 From: Zhongbo Shi Date: Tue, 21 Jun 2022 16:24:27 +0800 Subject: [PATCH 0658/1061] video-driver: fix encoder output buffer size Fix encoder output buffer size for CQ mode to YUVSizex2x1.25. Change-Id: Ib4581a0dc7fbb99fee827c676106806d4ea89157 Signed-off-by: Zhongbo Shi --- driver/vidc/src/msm_vidc_buffer.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/driver/vidc/src/msm_vidc_buffer.c b/driver/vidc/src/msm_vidc_buffer.c index 694217cfe7..22048e4f4e 100644 --- a/driver/vidc/src/msm_vidc_buffer.c +++ b/driver/vidc/src/msm_vidc_buffer.c @@ -360,6 +360,11 @@ u32 msm_vidc_encoder_output_size(struct msm_vidc_inst *inst) u32 width, height; struct v4l2_format *f; + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return 0; + } + f = &inst->fmts[OUTPUT_PORT]; /* * Encoder output size calculation: 32 Align width/height @@ -376,7 +381,8 @@ u32 msm_vidc_encoder_output_size(struct msm_vidc_inst *inst) frame_size = (width * height * 3); /* Image session: 2 x yuv size */ - if (is_image_session(inst)) + if (is_image_session(inst) || + inst->capabilities->cap[BITRATE_MODE].value == V4L2_MPEG_VIDEO_BITRATE_MODE_CQ) goto skip_calc; if (mbs_per_frame <= NUM_MBS_360P) From fb1ecb69d0f6c7c1f0d3a56703ea2b9d280ae52b Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Wed, 29 Jun 2022 17:39:06 -0700 Subject: [PATCH 0659/1061] video: driver: release internal buffer as part of start/resume Change-Id: I45469c0a569fbc282aa1dbd217654e49eb50f54f Signed-off-by: Darshana Patil --- driver/vidc/inc/msm_vdec.h | 4 + driver/vidc/inc/msm_vidc_driver.h | 4 +- driver/vidc/src/msm_vdec.c | 57 ++++----- driver/vidc/src/msm_venc.c | 4 +- driver/vidc/src/msm_vidc_driver.c | 199 ++++++++++++++++++++---------- 5 files changed, 173 insertions(+), 95 deletions(-) diff --git a/driver/vidc/inc/msm_vdec.h b/driver/vidc/inc/msm_vdec.h index 17f2c9c64b..409f8b7300 100644 --- a/driver/vidc/inc/msm_vdec.h +++ b/driver/vidc/inc/msm_vdec.h @@ -30,5 +30,9 @@ int msm_vdec_output_port_settings_change(struct msm_vidc_inst *inst); int msm_vdec_process_cmd(struct msm_vidc_inst *inst, u32 cmd); int msm_vdec_handle_release_buffer(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buf); +int msm_vdec_get_input_internal_buffers(struct msm_vidc_inst *inst); +int msm_vdec_create_input_internal_buffers(struct msm_vidc_inst *inst); +int msm_vdec_queue_input_internal_buffers(struct msm_vidc_inst *inst); +int msm_vdec_release_input_internal_buffers(struct msm_vidc_inst *inst); #endif // _MSM_VDEC_H_ diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 1edf31fc43..f94be4417f 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -523,7 +523,8 @@ int msm_vidc_state_change_drain_last_flag(struct msm_vidc_inst *inst); int msm_vidc_state_change_psc_last_flag(struct msm_vidc_inst *inst); int msm_vidc_process_drain(struct msm_vidc_inst *inst); int msm_vidc_process_resume(struct msm_vidc_inst *inst); -int msm_vidc_process_streamon(struct msm_vidc_inst *inst, u32 type); +int msm_vidc_process_streamon_input(struct msm_vidc_inst *inst); +int msm_vidc_process_streamon_output(struct msm_vidc_inst *inst); int msm_vidc_process_stop_done(struct msm_vidc_inst *inst, enum signal_session_response signal_type); int msm_vidc_process_drain_done(struct msm_vidc_inst *inst); @@ -586,5 +587,6 @@ int msm_vidc_update_input_rate(struct msm_vidc_inst *inst, u64 time_us); int msm_vidc_get_input_rate(struct msm_vidc_inst *inst); int msm_vidc_get_frame_rate(struct msm_vidc_inst *inst); int msm_vidc_get_operating_rate(struct msm_vidc_inst *inst); +int msm_vidc_alloc_and_queue_input_internal_buffers(struct msm_vidc_inst *inst); #endif // _MSM_VIDC_DRIVER_H_ diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index ca781c754c..fc0c0841d4 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -755,7 +755,7 @@ static int msm_vdec_set_output_properties(struct msm_vidc_inst *inst) return rc; } -static int msm_vdec_get_input_internal_buffers(struct msm_vidc_inst *inst) +int msm_vdec_get_input_internal_buffers(struct msm_vidc_inst *inst) { int rc = 0; u32 i = 0; @@ -790,7 +790,7 @@ static int msm_vdec_get_output_internal_buffers(struct msm_vidc_inst *inst) return rc; } -static int msm_vdec_create_input_internal_buffers(struct msm_vidc_inst *inst) +int msm_vdec_create_input_internal_buffers(struct msm_vidc_inst *inst) { int rc = 0; u32 i = 0; @@ -815,7 +815,7 @@ static int msm_vdec_create_output_internal_buffers(struct msm_vidc_inst *inst) return 0; } -static int msm_vdec_queue_input_internal_buffers(struct msm_vidc_inst *inst) +int msm_vdec_queue_input_internal_buffers(struct msm_vidc_inst *inst) { int rc = 0; u32 i = 0; @@ -840,7 +840,7 @@ static int msm_vdec_queue_output_internal_buffers(struct msm_vidc_inst *inst) return 0; } -static int msm_vdec_release_input_internal_buffers(struct msm_vidc_inst *inst) +int msm_vdec_release_input_internal_buffers(struct msm_vidc_inst *inst) { int rc = 0; u32 i = 0; @@ -1371,30 +1371,6 @@ int msm_vdec_input_port_settings_change(struct msm_vidc_inst *inst) event.u.src_change.changes = V4L2_EVENT_SRC_CH_RESOLUTION; v4l2_event_queue_fh(&inst->event_handler, &event); - rc = msm_vdec_get_input_internal_buffers(inst); - if (rc) - return rc; - - rc = msm_vdec_release_input_internal_buffers(inst); - if (rc) - return rc; - - rc = msm_vdec_create_input_internal_buffers(inst); - if (rc) - return rc; - - rc = msm_vdec_queue_input_internal_buffers(inst); - if (rc) - return rc; - - rc = msm_vidc_set_stage(inst, STAGE); - if (rc) - return rc; - - rc = msm_vidc_set_pipe(inst, PIPE); - if (rc) - return rc; - return rc; } @@ -1489,7 +1465,7 @@ int msm_vdec_streamon_input(struct msm_vidc_inst *inst) if (rc) goto error; - rc = msm_vidc_process_streamon(inst, INPUT_PORT); + rc = msm_vidc_process_streamon_input(inst); if (rc) goto error; @@ -1809,7 +1785,7 @@ int msm_vdec_streamon_output(struct msm_vidc_inst *inst) if (rc) goto error; - rc = msm_vidc_process_streamon(inst, OUTPUT_PORT); + rc = msm_vidc_process_streamon_output(inst); if (rc) goto error; @@ -2206,6 +2182,27 @@ int msm_vdec_process_cmd(struct msm_vidc_inst *inst, u32 cmd) msm_vidc_allow_dcvs(inst); msm_vidc_power_data_reset(inst); + /* + * client is completing partial port reconfiguration, + * hence reallocate input internal buffers before input port + * is resumed. + */ + if (is_sub_state(inst, MSM_VIDC_DRC) && + is_sub_state(inst, MSM_VIDC_DRC_LAST_BUFFER) && + is_sub_state(inst, MSM_VIDC_INPUT_PAUSE)) { + rc = msm_vidc_alloc_and_queue_input_internal_buffers(inst); + if (rc) + return rc; + + rc = msm_vidc_set_stage(inst, STAGE); + if (rc) + return rc; + + rc = msm_vidc_set_pipe(inst, PIPE); + if (rc) + return rc; + } + /* allocate and queue extra dpb buffers */ rc = msm_vdec_alloc_and_queue_additional_dpb_buffers(inst); if (rc) diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index 9976a86c2f..160dbd4574 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -863,7 +863,7 @@ int msm_venc_streamon_input(struct msm_vidc_inst *inst) if (rc) goto error; - rc = msm_vidc_process_streamon(inst, INPUT_PORT); + rc = msm_vidc_process_streamon_input(inst); if (rc) goto error; @@ -1013,7 +1013,7 @@ int msm_venc_streamon_output(struct msm_vidc_inst *inst) if (rc) goto error; - rc = msm_vidc_process_streamon(inst, OUTPUT_PORT); + rc = msm_vidc_process_streamon_output(inst); if (rc) goto error; diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index f8ae6134af..e832d82eed 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -1664,12 +1664,15 @@ bool msm_vidc_allow_start(struct msm_vidc_inst *inst) } /* client would call start (resume) to complete DRC/drain sequence */ - if ((is_sub_state(inst, MSM_VIDC_DRC) && - is_sub_state(inst, MSM_VIDC_DRC_LAST_BUFFER)) || - (is_sub_state(inst, MSM_VIDC_DRAIN) && - is_sub_state(inst, MSM_VIDC_DRAIN_LAST_BUFFER))) - allow = true; - + if (inst->state == MSM_VIDC_INPUT_STREAMING || + inst->state == MSM_VIDC_OUTPUT_STREAMING || + inst->state == MSM_VIDC_STREAMING) { + if ((is_sub_state(inst, MSM_VIDC_DRC) && + is_sub_state(inst, MSM_VIDC_DRC_LAST_BUFFER)) || + (is_sub_state(inst, MSM_VIDC_DRAIN) && + is_sub_state(inst, MSM_VIDC_DRAIN_LAST_BUFFER))) + allow = true; + } if (!allow) i_vpr_e(inst, "%s: not allowed in state %s, sub state %s\n", __func__, state_name(inst->state), inst->sub_state_name); @@ -1984,8 +1987,58 @@ int msm_vidc_process_resume(struct msm_vidc_inst *inst) return rc; } -int msm_vidc_process_streamon(struct msm_vidc_inst *inst, - enum msm_vidc_port_type port) +int msm_vidc_process_streamon_input(struct msm_vidc_inst *inst) +{ + int rc = 0; + enum msm_vidc_sub_state clear_sub_state = MSM_VIDC_SUB_STATE_NONE; + enum msm_vidc_sub_state set_sub_state = MSM_VIDC_SUB_STATE_NONE; + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + msm_vidc_scale_power(inst, true); + + rc = venus_hfi_start(inst, INPUT_PORT); + if (rc) + return rc; + + /* clear input pause substate immediately */ + if (is_sub_state(inst, MSM_VIDC_INPUT_PAUSE)) { + rc = msm_vidc_change_sub_state(inst, MSM_VIDC_INPUT_PAUSE, 0, __func__); + if (rc) + return rc; + } + + /* + * if DRC sequence is not completed by the client then PAUSE + * firmware input port to avoid firmware raising IPSC again. + * When client completes DRC or DRAIN sequences, firmware + * input port will be resumed. + */ + if (is_sub_state(inst, MSM_VIDC_DRC) || + is_sub_state(inst, MSM_VIDC_DRAIN)) { + if (!is_sub_state(inst, MSM_VIDC_INPUT_PAUSE)) { + rc = venus_hfi_session_pause(inst, INPUT_PORT); + if (rc) + return rc; + set_sub_state = MSM_VIDC_INPUT_PAUSE; + } + } + + rc = msm_vidc_state_change_streamon(inst, INPUT_PORT); + if (rc) + return rc; + + rc = msm_vidc_change_sub_state(inst, clear_sub_state, set_sub_state, __func__); + if (rc) + return rc; + + return rc; +} + +int msm_vidc_process_streamon_output(struct msm_vidc_inst *inst) { int rc = 0; enum msm_vidc_sub_state clear_sub_state = MSM_VIDC_SUB_STATE_NONE; @@ -1997,70 +2050,64 @@ int msm_vidc_process_streamon(struct msm_vidc_inst *inst, return -EINVAL; } - if (port == INPUT_META_PORT || port == OUTPUT_META_PORT) - return 0; - msm_vidc_scale_power(inst, true); - rc = venus_hfi_start(inst, port); + /* + * client completed drc sequence, reset DRC and + * MSM_VIDC_DRC_LAST_BUFFER substates + */ + if (is_sub_state(inst, MSM_VIDC_DRC) && + is_sub_state(inst, MSM_VIDC_DRC_LAST_BUFFER)) { + clear_sub_state = MSM_VIDC_DRC | MSM_VIDC_DRC_LAST_BUFFER; + } + /* + * Client is completing port reconfiguration, hence reallocate + * input internal buffers before input port is resumed. + * Drc sub-state cannot be checked because DRC sub-state will + * not be set during initial port reconfiguration. + */ + if (is_decode_session(inst) && + is_sub_state(inst, MSM_VIDC_INPUT_PAUSE)) { + rc = msm_vidc_alloc_and_queue_input_internal_buffers(inst); + if (rc) + return rc; + rc = msm_vidc_set_stage(inst, STAGE); + if (rc) + return rc; + rc = msm_vidc_set_pipe(inst, PIPE); + if (rc) + return rc; + } + + /* + * fw input port is paused due to ipsc. now that client + * completed drc sequence, resume fw input port provided + * drain is not pending and input port is streaming. + */ + drain_pending = is_sub_state(inst, MSM_VIDC_DRAIN) && + is_sub_state(inst, MSM_VIDC_DRAIN_LAST_BUFFER); + if (!drain_pending && is_state(inst, MSM_VIDC_INPUT_STREAMING)) { + if (is_sub_state(inst, MSM_VIDC_INPUT_PAUSE)) { + rc = venus_hfi_session_resume(inst, INPUT_PORT, + HFI_CMD_SETTINGS_CHANGE); + if (rc) + return rc; + clear_sub_state |= MSM_VIDC_INPUT_PAUSE; + } + } + + rc = venus_hfi_start(inst, OUTPUT_PORT); if (rc) return rc; - /* clear input/output pause substate immediately */ - if (port == INPUT_PORT && is_sub_state(inst, MSM_VIDC_INPUT_PAUSE)) { - rc = msm_vidc_change_sub_state(inst, MSM_VIDC_INPUT_PAUSE, 0, __func__); - if (rc) - return rc; - } else if (port == OUTPUT_PORT && is_sub_state(inst, MSM_VIDC_OUTPUT_PAUSE)) { + /* clear output pause substate immediately */ + if (is_sub_state(inst, MSM_VIDC_OUTPUT_PAUSE)) { rc = msm_vidc_change_sub_state(inst, MSM_VIDC_OUTPUT_PAUSE, 0, __func__); if (rc) return rc; } - if (port == INPUT_PORT) { - /* - * if DRC sequence is not completed by the client then PAUSE - * firmware input port to avoid firmware raising IPSC again. - * When client completes DRC or DRAIN sequences, firmware - * input port will be resumed. - */ - if (is_sub_state(inst, MSM_VIDC_DRC) || - is_sub_state(inst, MSM_VIDC_DRAIN)) { - if (!is_sub_state(inst, MSM_VIDC_INPUT_PAUSE)) { - rc = venus_hfi_session_pause(inst, INPUT_PORT); - if (rc) - return rc; - set_sub_state = MSM_VIDC_INPUT_PAUSE; - } - } - } else if (port == OUTPUT_PORT) { - /* - * client completed drc sequence, reset DRC and - * MSM_VIDC_DRC_LAST_BUFFER substates - */ - if (is_sub_state(inst, MSM_VIDC_DRC) && - is_sub_state(inst, MSM_VIDC_DRC_LAST_BUFFER)) { - clear_sub_state = MSM_VIDC_DRC | MSM_VIDC_DRC_LAST_BUFFER; - } - /* - * fw input port is paused due to ipsc. now that client - * completed drc sequence, resume fw input port provided - * drain is not pending and input port is streaming. - */ - drain_pending = is_sub_state(inst, MSM_VIDC_DRAIN) && - is_sub_state(inst, MSM_VIDC_DRAIN_LAST_BUFFER); - if (!drain_pending && is_state(inst, MSM_VIDC_INPUT_STREAMING)) { - if (is_sub_state(inst, MSM_VIDC_INPUT_PAUSE)) { - rc = venus_hfi_session_resume(inst, INPUT_PORT, - HFI_CMD_SETTINGS_CHANGE); - if (rc) - return rc; - clear_sub_state |= MSM_VIDC_INPUT_PAUSE; - } - } - } - - rc = msm_vidc_state_change_streamon(inst, port); + rc = msm_vidc_state_change_streamon(inst, OUTPUT_PORT); if (rc) return rc; @@ -3587,6 +3634,34 @@ static int msm_vidc_queue_buffer(struct msm_vidc_inst *inst, struct msm_vidc_buf return 0; } +int msm_vidc_alloc_and_queue_input_internal_buffers(struct msm_vidc_inst *inst) +{ + int rc = 0; + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + rc = msm_vdec_get_input_internal_buffers(inst); + if (rc) + return rc; + + rc = msm_vdec_release_input_internal_buffers(inst); + if (rc) + return rc; + + rc = msm_vdec_create_input_internal_buffers(inst); + if (rc) + return rc; + + rc = msm_vdec_queue_input_internal_buffers(inst); + if (rc) + return rc; + + return rc; +} + int msm_vidc_queue_deferred_buffers(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type buf_type) { struct msm_vidc_buffers *buffers; From a709f30d05c5b226ee8a38f50cb142c2a166229d Mon Sep 17 00:00:00 2001 From: Sachu George Date: Mon, 25 Apr 2022 10:44:25 +0530 Subject: [PATCH 0660/1061] video-driver: Add driver support for anorak Adding driver support for anorak(Halliday). Change-Id: I65239264758a1cc462ef6c458cb0a12f1fcdaf53 Signed-off-by: Sachu George --- Kbuild | 9 + config/anorak_video.conf | 2 + config/anorak_video.h | 8 + driver/platform/anorak/inc/msm_vidc_anorak.h | 26 + driver/platform/anorak/src/msm_vidc_anorak.c | 2489 +++++++++++++++++ .../platform/common/src/msm_vidc_platform.c | 19 + 6 files changed, 2553 insertions(+) create mode 100644 config/anorak_video.conf create mode 100644 config/anorak_video.h create mode 100644 driver/platform/anorak/inc/msm_vidc_anorak.h create mode 100644 driver/platform/anorak/src/msm_vidc_anorak.c diff --git a/Kbuild b/Kbuild index e22f634eb9..735455db86 100644 --- a/Kbuild +++ b/Kbuild @@ -14,6 +14,11 @@ LINUXINCLUDE += -include $(VIDEO_ROOT)/config/kalama_video.h \ -I$(VIDEO_ROOT)/driver/platform/kalama/inc endif +ifeq ($(CONFIG_ARCH_ANORAK), y) +include $(VIDEO_ROOT)/config/anorak_video.conf +LINUXINCLUDE += -include $(VIDEO_ROOT)/config/anorak_video.h \ + -I$(VIDEO_ROOT)/driver/platform/anorak/inc +endif LINUXINCLUDE += -I$(VIDEO_ROOT)/driver/vidc/inc \ -I$(VIDEO_ROOT)/driver/platform/common/inc \ @@ -32,6 +37,10 @@ ifeq ($(CONFIG_MSM_VIDC_KALAMA), y) msm_video-objs += driver/platform/kalama/src/msm_vidc_kalama.o endif +ifeq ($(CONFIG_MSM_VIDC_ANORAK), y) +msm_video-objs += driver/platform/anorak/src/msm_vidc_anorak.o +endif + ifeq ($(CONFIG_MSM_VIDC_IRIS2), y) LINUXINCLUDE += -I$(VIDEO_ROOT)/driver/variant/iris2/inc msm_video-objs += driver/variant/iris2/src/msm_vidc_buffer_iris2.o \ diff --git a/config/anorak_video.conf b/config/anorak_video.conf new file mode 100644 index 0000000000..c71011602e --- /dev/null +++ b/config/anorak_video.conf @@ -0,0 +1,2 @@ +export CONFIG_MSM_VIDC_ANORAK=y +export CONFIG_MSM_VIDC_IRIS3=y diff --git a/config/anorak_video.h b/config/anorak_video.h new file mode 100644 index 0000000000..0d621eb4fc --- /dev/null +++ b/config/anorak_video.h @@ -0,0 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. + * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#define CONFIG_MSM_VIDC_ANORAK 1 +#define CONFIG_MSM_VIDC_IRIS3 1 diff --git a/driver/platform/anorak/inc/msm_vidc_anorak.h b/driver/platform/anorak/inc/msm_vidc_anorak.h new file mode 100644 index 0000000000..af9ab3bca4 --- /dev/null +++ b/driver/platform/anorak/inc/msm_vidc_anorak.h @@ -0,0 +1,26 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. + * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#ifndef _MSM_VIDC_ANORAK_H_ +#define _MSM_VIDC_ANORAK_H_ + +#include "msm_vidc_core.h" + +#if defined(CONFIG_MSM_VIDC_ANORAK) +int msm_vidc_init_platform_anorak(struct msm_vidc_core *core, struct device *dev); +int msm_vidc_deinit_platform_anorak(struct msm_vidc_core *core, struct device *dev); +#else +int msm_vidc_init_platform_anorak(struct msm_vidc_core *core, struct device *dev) +{ + return -EINVAL; +} +int msm_vidc_deinit_platform_anorak(struct msm_vidc_core *core, struct device *dev) +{ + return -EINVAL; +} +#endif + +#endif // _MSM_VIDC_ANORAK_H_ diff --git a/driver/platform/anorak/src/msm_vidc_anorak.c b/driver/platform/anorak/src/msm_vidc_anorak.c new file mode 100644 index 0000000000..dc44d373ed --- /dev/null +++ b/driver/platform/anorak/src/msm_vidc_anorak.c @@ -0,0 +1,2489 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. + * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include + +#include "msm_vidc_anorak.h" +#include "msm_vidc_platform.h" +#include "msm_vidc_debug.h" +#include "msm_vidc_internal.h" +#include "msm_vidc_control.h" +#include "hfi_property.h" +#include "msm_vidc_iris3.h" +#include "hfi_command.h" + +#define DEFAULT_VIDEO_CONCEAL_COLOR_BLACK 0x8020010 +#define MAX_LTR_FRAME_COUNT 2 +#define MAX_BASE_LAYER_PRIORITY_ID 63 +#define MAX_OP_POINT 31 +#define MAX_BITRATE 220000000 +#define DEFAULT_BITRATE 20000000 +#define MINIMUM_FPS 1 +#define MAXIMUM_FPS 480 +#define MAX_QP 51 +#define DEFAULT_QP 20 +#define MAX_CONSTANT_QUALITY 100 +#define MIN_SLICE_BYTE_SIZE 512 +#define MAX_SLICE_BYTE_SIZE \ + ((MAX_BITRATE) >> 3) +#define MAX_SLICE_MB_SIZE \ + (((4096 + 15) >> 4) * ((2304 + 15) >> 4)) + +#define ENC MSM_VIDC_ENCODER +#define DEC MSM_VIDC_DECODER +#define H264 MSM_VIDC_H264 +#define HEVC MSM_VIDC_HEVC +#define VP9 MSM_VIDC_VP9 +#define AV1 MSM_VIDC_AV1 +#define HEIC MSM_VIDC_HEIC +#define CODECS_ALL (H264 | HEVC | VP9 | HEIC | AV1) +#define MAXIMUM_OVERRIDE_VP9_FPS 180 + +static struct msm_platform_core_capability core_data_anorak[] = { + /* {type, value} */ + {ENC_CODECS, H264|HEVC|HEIC}, + {DEC_CODECS, H264|HEVC|VP9|AV1|HEIC}, + {MAX_SESSION_COUNT, 16}, + {MAX_NUM_720P_SESSIONS, 16}, + {MAX_NUM_1080P_SESSIONS, 16}, + {MAX_NUM_4K_SESSIONS, 8}, + {MAX_NUM_8K_SESSIONS, 2}, + {MAX_SECURE_SESSION_COUNT, 3}, + {MAX_RT_MBPF, 174080}, /* (8192x4352)/256 + (4096x2176)/256*/ + {MAX_MBPF, 278528}, /* ((8192x4352)/256) * 2 */ + {MAX_MBPS, 7833600}, /* max_load + * 7680x4320@60fps or 3840x2176@240fps + * which is greater than 4096x2176@120fps, + * 8192x4320@48fps + */ + {MAX_IMAGE_MBPF, 1048576}, /* (16384x16384)/256 */ + {MAX_MBPF_HQ, 8160}, /* ((1920x1088)/256) */ + {MAX_MBPS_HQ, 489600}, /* ((1920x1088)/256)@60fps */ + {MAX_MBPF_B_FRAME, 32640}, /* 3840x2176/256 */ + {MAX_MBPS_B_FRAME, 1958400}, /* 3840x2176/256 MBs@60fps */ + {MAX_MBPS_ALL_INTRA, 2088960}, /* 4096x2176/256 MBs@60fps */ + {MAX_ENH_LAYER_COUNT, 5}, + {NUM_VPP_PIPE, 4}, + {SW_PC, 1}, + {FW_UNLOAD, 0}, + {HW_RESPONSE_TIMEOUT, HW_RESPONSE_TIMEOUT_VALUE}, /* 1000 ms */ + {SW_PC_DELAY, SW_PC_DELAY_VALUE }, /* 1500 ms (>HW_RESPONSE_TIMEOUT)*/ + {FW_UNLOAD_DELAY, FW_UNLOAD_DELAY_VALUE }, /* 3000 ms (>SW_PC_DELAY)*/ + // TODO: review below entries, and if required rename as PREFETCH + {PREFIX_BUF_COUNT_PIX, 18}, + {PREFIX_BUF_SIZE_PIX, 13434880}, /* Calculated by VIDEO_RAW_BUFFER_SIZE for 4096x2160 UBWC */ + {PREFIX_BUF_COUNT_NON_PIX, 1}, + {PREFIX_BUF_SIZE_NON_PIX, 209715200}, /* + * Internal buffer size is calculated for secure decode session + * of resolution 4k (4096x2160) + * Internal buf size = calculate_scratch_size() + + * calculate_scratch1_size() + calculate_persist1_size() + * Take maximum between VP9 10bit, HEVC 10bit, AVC secure + * decoder sessions + */ + {PAGEFAULT_NON_FATAL, 1}, + {PAGETABLE_CACHING, 0}, + {DCVS, 1}, + {DECODE_BATCH, 1}, + {DECODE_BATCH_TIMEOUT, 200}, + {STATS_TIMEOUT_MS, 2000}, + {AV_SYNC_WINDOW_SIZE, 40}, + {NON_FATAL_FAULTS, 1}, + {ENC_AUTO_FRAMERATE, 1}, + {MMRM, 0}, +}; + +static struct msm_platform_inst_capability instance_cap_data_anorak[] = { + /* {cap, domain, codec, + * min, max, step_or_mask, value, + * v4l2_id, + * hfi_id, + * flags} + */ + + {FRAME_WIDTH, DEC, CODECS_ALL, 96, 8192, 1, 1920}, + + {FRAME_WIDTH, DEC, VP9, 96, 4096, 1, 1920}, + + {FRAME_WIDTH, ENC, CODECS_ALL, 128, 8192, 1, 1920}, + + {FRAME_WIDTH, ENC, HEVC, 96, 8192, 1, 1920}, + + {FRAME_WIDTH, ENC, HEIC, 128, 16384, 1, 16384}, + + {LOSSLESS_FRAME_WIDTH, ENC, CODECS_ALL, 128, 4096, 1, 1920}, + + {LOSSLESS_FRAME_WIDTH, ENC, HEVC, 96, 4096, 1, 1920}, + + {SECURE_FRAME_WIDTH, DEC, CODECS_ALL, 96, 4096, 1, 1920}, + + {SECURE_FRAME_WIDTH, ENC, CODECS_ALL, 128, 4096, 1, 1920}, + + {SECURE_FRAME_WIDTH, ENC, HEVC, 96, 4096, 1, 1920}, + + {FRAME_HEIGHT, DEC, CODECS_ALL, 96, 8192, 1, 1080}, + + {FRAME_HEIGHT, DEC, VP9, 96, 4096, 1, 1080}, + + {FRAME_HEIGHT, ENC, CODECS_ALL, 128, 8192, 1, 1080}, + + {FRAME_HEIGHT, ENC, HEVC, 96, 8192, 1, 1080}, + + {FRAME_HEIGHT, ENC, HEIC, 128, 16384, 1, 16384}, + + {LOSSLESS_FRAME_HEIGHT, ENC, CODECS_ALL, 128, 4096, 1, 1080}, + + {LOSSLESS_FRAME_HEIGHT, ENC, HEVC, 96, 4096, 1, 1080}, + + {SECURE_FRAME_HEIGHT, DEC, CODECS_ALL, 96, 4096, 1, 1080}, + + {SECURE_FRAME_HEIGHT, ENC, CODECS_ALL, 128, 4096, 1, 1080}, + + {SECURE_FRAME_HEIGHT, ENC, HEVC, 96, 4096, 1, 1080}, + + {PIX_FMTS, ENC|DEC, H264, + MSM_VIDC_FMT_NV12, + MSM_VIDC_FMT_NV12C, + MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C, + MSM_VIDC_FMT_NV12C}, + + {PIX_FMTS, ENC|DEC, HEVC|VP9|AV1, + MSM_VIDC_FMT_NV12, + MSM_VIDC_FMT_TP10C, + MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C | + MSM_VIDC_FMT_P010 | MSM_VIDC_FMT_TP10C, + MSM_VIDC_FMT_NV12C}, + + {PIX_FMTS, ENC, HEIC, + MSM_VIDC_FMT_NV12, + MSM_VIDC_FMT_P010, + MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_P010, + MSM_VIDC_FMT_NV12}, + + {PIX_FMTS, DEC, HEIC, + MSM_VIDC_FMT_NV12, + MSM_VIDC_FMT_TP10C, + MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C | + MSM_VIDC_FMT_P010 | MSM_VIDC_FMT_TP10C, + MSM_VIDC_FMT_NV12C}, + + {MIN_BUFFERS_INPUT, ENC|DEC, CODECS_ALL, 0, 64, 1, 4, + V4L2_CID_MIN_BUFFERS_FOR_OUTPUT}, + + {MIN_BUFFERS_INPUT, ENC|DEC, HEIC, 0, 64, 1, 1, + V4L2_CID_MIN_BUFFERS_FOR_OUTPUT}, + + {MIN_BUFFERS_OUTPUT, ENC|DEC, CODECS_ALL, + 0, 64, 1, 4, + V4L2_CID_MIN_BUFFERS_FOR_CAPTURE, + HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT, + CAP_FLAG_OUTPUT_PORT}, + + /* (8192 * 4320) / 256 */ + {MBPF, ENC, CODECS_ALL, 64, 138240, 1, 138240}, + + {MBPF, ENC, HEVC, 36, 138240, 1, 138240}, + + /* ((16384x16384)/256) */ + {MBPF, ENC, HEIC, 36, 1048576, 1, 1048576}, + + {MBPF, DEC, CODECS_ALL, 36, 138240, 1, 138240}, + + /* (4096 * 2304) / 256 */ + {MBPF, DEC, VP9, 36, 36864, 1, 36864}, + + /* ((8192x8192)/256) */ + {MBPF, DEC, HEIC, 64, 262144, 1, 262144 }, + + /* (4096 * 2304) / 256 */ + {LOSSLESS_MBPF, ENC, H264|HEVC, 64, 36864, 1, 36864}, + + /* Batch Mode Decode */ + /* TODO: update with new values based on updated voltage corner */ + {BATCH_MBPF, DEC, H264|HEVC|VP9|AV1, 64, 34816, 1, 34816}, + + /* (4096 * 2304) / 256 */ + {BATCH_FPS, DEC, H264|HEVC|VP9|AV1, 1, 120, 1, 120}, + + {SECURE_MBPF, ENC|DEC, H264|HEVC|VP9|AV1, 64, 36864, 1, 36864}, + + {SECURE_MBPF, ENC, HEVC, 36, 36864, 1, 36864}, + + /* ((1920 * 1088) / 256) * 480 fps */ + {MBPS, ENC, CODECS_ALL, 64, 3916800, 1, 3916800}, + + {MBPS, ENC, HEVC, 36, 3916800, 1, 3916800}, + + /* ((16384x16384)/256)@1fps */ + {MBPS, ENC, HEIC, 36, 1048576, 1, 1048576}, + + /* ((3840 * 2176) / 256) * 240 fps */ + {MBPS, DEC, CODECS_ALL, 64, 7833600, 1, 7833600}, + + /* ((4096 * 2304) / 256) * 120 */ + {MBPS, DEC, VP9, 36, 4423680, 1, 4423680}, + + /* ((8192x8192)/256)@1fps */ + {MBPS, DEC, HEIC, 64, 262144, 1, 262144 }, + + /* ((4096 * 2304) / 256) * 60 fps */ + {POWER_SAVE_MBPS, ENC, CODECS_ALL, 0, 2211840, 1, 2211840}, + + /* Enable check mbps for encoder */ + {CHECK_MBPS, ENC, CODECS_ALL, 0, 1, 1, 1}, + + /* Disable check mbps for encoder */ + {CHECK_MBPS, DEC, CODECS_ALL, 0, 1, 1, 0}, + + {FRAME_RATE, ENC, CODECS_ALL, + (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), + 1, (DEFAULT_FPS << 16), + 0, + HFI_PROP_FRAME_RATE, + CAP_FLAG_OUTPUT_PORT}, + + {FRAME_RATE, ENC, HEIC, + (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), + 1, (MINIMUM_FPS << 16), + 0, + HFI_PROP_FRAME_RATE, + CAP_FLAG_OUTPUT_PORT}, + + {FRAME_RATE, DEC, CODECS_ALL, + (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), + 1, (DEFAULT_FPS << 16), + V4L2_CID_MPEG_VIDC_FRAME_RATE, + 0, + CAP_FLAG_OUTPUT_PORT | + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {FRAME_RATE, DEC, VP9, + (MINIMUM_FPS << 16), (MAXIMUM_OVERRIDE_VP9_FPS << 16), + 1, (DEFAULT_FPS << 16), + V4L2_CID_MPEG_VIDC_FRAME_RATE, + 0, + CAP_FLAG_OUTPUT_PORT | + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {OPERATING_RATE, ENC, CODECS_ALL, + (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), + 1, (DEFAULT_FPS << 16)}, + + {OPERATING_RATE, DEC, CODECS_ALL, + (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), + 1, (DEFAULT_FPS << 16), + V4L2_CID_MPEG_VIDC_OPERATING_RATE, + 0, + CAP_FLAG_OUTPUT_PORT | + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {OPERATING_RATE, DEC, VP9, + (MINIMUM_FPS << 16), (MAXIMUM_OVERRIDE_VP9_FPS << 16), + 1, (DEFAULT_FPS << 16), + V4L2_CID_MPEG_VIDC_OPERATING_RATE, + 0, + CAP_FLAG_OUTPUT_PORT | + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {INPUT_RATE, ENC|DEC, CODECS_ALL, + (MINIMUM_FPS << 16), INT_MAX, + 1, (DEFAULT_FPS << 16)}, + + {TIMESTAMP_RATE, ENC|DEC, CODECS_ALL, + (MINIMUM_FPS << 16), INT_MAX, + 1, (DEFAULT_FPS << 16)}, + + {SCALE_FACTOR, ENC, H264|HEVC, 1, 8, 1, 8}, + + {MB_CYCLES_VSP, ENC, CODECS_ALL, 25, 25, 1, 25}, + + {MB_CYCLES_VSP, DEC, CODECS_ALL, 25, 25, 1, 25}, + + {MB_CYCLES_VSP, DEC, VP9|AV1, 60, 60, 1, 60}, + + {MB_CYCLES_VPP, ENC, CODECS_ALL, 675, 675, 1, 675}, + + {MB_CYCLES_VPP, DEC, CODECS_ALL, 200, 200, 1, 200}, + + {MB_CYCLES_LP, ENC, CODECS_ALL, 320, 320, 1, 320}, + + {MB_CYCLES_LP, DEC, CODECS_ALL, 200, 200, 1, 200}, + + {MB_CYCLES_FW, ENC|DEC, CODECS_ALL, 489583, 489583, 1, 489583}, + + {MB_CYCLES_FW_VPP, ENC, CODECS_ALL, 48405, 48405, 1, 48405}, + + {MB_CYCLES_FW_VPP, DEC, CODECS_ALL, 66234, 66234, 1, 66234}, + + {CLIENT_ID, ENC|DEC, CODECS_ALL, + INVALID_CLIENT_ID, INT_MAX, 1, INVALID_CLIENT_ID, + V4L2_CID_MPEG_VIDC_CLIENT_ID}, + + {SECURE_MODE, ENC|DEC, H264|HEVC|VP9|AV1, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_SECURE, + HFI_PROP_SECURE, + CAP_FLAG_NONE}, + + /* + * Client will enable V4L2_CID_MPEG_VIDC_METADATA_OUTBUF_FENCE + * to get fence_id in input metadata buffer done. + */ + {META_OUTBUF_FENCE, DEC, H264|HEVC|VP9|AV1, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_INPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_OUTBUF_FENCE, + HFI_PROP_FENCE, + CAP_FLAG_BITMASK}, + + /* + * Client to do set_ctrl with FENCE_ID to set fence_id + * and then client will do get_ctrl with FENCE_FD to get + * fence_fd corresponding to client set fence_id. + */ + {FENCE_ID, DEC, CODECS_ALL, + 0, INT_MAX, 1, 0, + V4L2_CID_MPEG_VIDC_SW_FENCE_ID, + 0, + CAP_FLAG_DYNAMIC_ALLOWED | CAP_FLAG_OUTPUT_PORT}, + + {FENCE_FD, DEC, CODECS_ALL, + INVALID_FD, INT_MAX, 1, INVALID_FD, + V4L2_CID_MPEG_VIDC_SW_FENCE_FD}, + + {TS_REORDER, DEC, H264|HEVC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_TS_REORDER}, + + {HFLIP, ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_HFLIP, + HFI_PROP_FLIP, + CAP_FLAG_OUTPUT_PORT | + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {VFLIP, ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_VFLIP, + HFI_PROP_FLIP, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {ROTATION, ENC, CODECS_ALL, + 0, 270, 90, 0, + V4L2_CID_ROTATE, + HFI_PROP_ROTATION, + CAP_FLAG_OUTPUT_PORT}, + + {SUPER_FRAME, ENC, H264|HEVC, + 0, 32, 1, 0, + V4L2_CID_MPEG_VIDC_SUPERFRAME, 0, + CAP_FLAG_NONE}, + + {SLICE_INTERFACE, DEC, CODECS_ALL, + 0, 0, 0, 0, + V4L2_CID_MPEG_VIDEO_DECODER_SLICE_INTERFACE, + 0}, + + {HEADER_MODE, ENC, CODECS_ALL, + V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE, + V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME, + BIT(V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE) | + BIT(V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME), + V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE, + V4L2_CID_MPEG_VIDEO_HEADER_MODE, + HFI_PROP_SEQ_HEADER_MODE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {PREPEND_SPSPPS_TO_IDR, ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDEO_PREPEND_SPSPPS_TO_IDR}, + + {WITHOUT_STARTCODE, ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE, + HFI_PROP_NAL_LENGTH_FIELD, + CAP_FLAG_OUTPUT_PORT}, + + {WITHOUT_STARTCODE, DEC, AV1, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_DISABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE, + HFI_PROP_NAL_LENGTH_FIELD, + CAP_FLAG_INPUT_PORT}, + + {NAL_LENGTH_FIELD, ENC, CODECS_ALL, + V4L2_MPEG_VIDEO_HEVC_SIZE_0, + V4L2_MPEG_VIDEO_HEVC_SIZE_4, + BIT(V4L2_MPEG_VIDEO_HEVC_SIZE_0) | + BIT(V4L2_MPEG_VIDEO_HEVC_SIZE_4), + V4L2_MPEG_VIDEO_HEVC_SIZE_0, + V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD, + HFI_PROP_NAL_LENGTH_FIELD, + CAP_FLAG_MENU | CAP_FLAG_OUTPUT_PORT}, + + /* TODO: Firmware introduced enumeration type for this + * with and without seq header. + */ + {REQUEST_I_FRAME, ENC, H264|HEVC, + 0, 0, 0, 0, + V4L2_CID_MPEG_VIDEO_FORCE_KEY_FRAME, + HFI_PROP_REQUEST_SYNC_FRAME, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + /* Enc: Keeping CABAC and CAVLC as same bitrate. + * Dec: there's no use of Bitrate cap + */ + {BIT_RATE, ENC, H264|HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_BITRATE, + HFI_PROP_TOTAL_BITRATE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {BITRATE_MODE, ENC, H264, + V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, + V4L2_MPEG_VIDEO_BITRATE_MODE_CBR, + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_VBR) | + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CBR), + V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, + V4L2_CID_MPEG_VIDEO_BITRATE_MODE, + HFI_PROP_RATE_CONTROL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {BITRATE_MODE, ENC, HEVC, + V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, + V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_VBR) | + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CBR) | + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CQ), + V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, + V4L2_CID_MPEG_VIDEO_BITRATE_MODE, + HFI_PROP_RATE_CONTROL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {BITRATE_MODE, ENC, HEIC, + V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, + V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CQ), + V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, + V4L2_CID_MPEG_VIDEO_BITRATE_MODE, + HFI_PROP_RATE_CONTROL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {CABAC_MAX_BITRATE, ENC, H264|HEVC, 0, + 160000000, 1, 160000000}, + + {CAVLC_MAX_BITRATE, ENC, H264, 0, + 220000000, 1, 220000000}, + + {ALLINTRA_MAX_BITRATE, ENC, H264|HEVC, 0, + 220000000, 1, 220000000}, + + {LOWLATENCY_MAX_BITRATE, ENC, H264|HEVC, 0, + 70000000, 1, 70000000}, + + {LOSSLESS, ENC, HEVC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU}, + + {FRAME_SKIP_MODE, ENC, H264|HEVC|HEIC, + V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED, + V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT, + BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED) | + BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_LEVEL_LIMIT) | + BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT), + V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED, + V4L2_CID_MPEG_VIDEO_FRAME_SKIP_MODE, + 0, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {FRAME_RC_ENABLE, ENC, H264|HEVC|HEIC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_ENABLE, + V4L2_CID_MPEG_VIDEO_FRAME_RC_ENABLE}, + + {CONSTANT_QUALITY, ENC, HEVC, + 1, MAX_CONSTANT_QUALITY, 1, 90, + V4L2_CID_MPEG_VIDEO_CONSTANT_QUALITY, + HFI_PROP_CONSTANT_QUALITY, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {CONSTANT_QUALITY, ENC, HEIC, + 1, MAX_CONSTANT_QUALITY, 1, 100, + V4L2_CID_MPEG_VIDEO_CONSTANT_QUALITY, + HFI_PROP_CONSTANT_QUALITY, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {GOP_SIZE, ENC, CODECS_ALL, + 0, INT_MAX, 1, 2 * DEFAULT_FPS - 1, + V4L2_CID_MPEG_VIDEO_GOP_SIZE, + HFI_PROP_MAX_GOP_FRAMES, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {GOP_SIZE, ENC, HEIC, + 0, INT_MAX, 1, 0 /* all intra */, + V4L2_CID_MPEG_VIDEO_GOP_SIZE, + HFI_PROP_MAX_GOP_FRAMES, + CAP_FLAG_OUTPUT_PORT | + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {GOP_CLOSURE, ENC, H264|HEVC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_ENABLE, + V4L2_CID_MPEG_VIDEO_GOP_CLOSURE, + 0}, + + {B_FRAME, ENC, H264|HEVC, + 0, 7, 1, 0, + V4L2_CID_MPEG_VIDEO_B_FRAMES, + HFI_PROP_MAX_B_FRAMES, + CAP_FLAG_OUTPUT_PORT}, + + {B_FRAME, ENC, HEIC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDEO_B_FRAMES, + HFI_PROP_MAX_B_FRAMES, + CAP_FLAG_OUTPUT_PORT}, + + {BLUR_TYPES, ENC, H264|HEVC, + VIDC_BLUR_NONE, VIDC_BLUR_EXTERNAL, + BIT(VIDC_BLUR_NONE) | BIT(VIDC_BLUR_EXTERNAL), + VIDC_BLUR_NONE, + V4L2_CID_MPEG_VIDC_VIDEO_BLUR_TYPES, + HFI_PROP_BLUR_TYPES, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {BLUR_RESOLUTION, ENC, H264|HEVC, + 0, S32_MAX, 1, 0, + V4L2_CID_MPEG_VIDC_VIDEO_BLUR_RESOLUTION, + HFI_PROP_BLUR_RESOLUTION, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {CSC, ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, + HFI_PROP_CSC}, + + {CSC_CUSTOM_MATRIX, ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_VIDEO_VPE_CSC_CUSTOM_MATRIX, + HFI_PROP_CSC_MATRIX, + CAP_FLAG_OUTPUT_PORT}, + + {LOWLATENCY_MODE, ENC, H264|HEVC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_LOWLATENCY_REQUEST, + 0, + CAP_FLAG_NONE}, + + {LOWLATENCY_MODE, DEC, H264|HEVC|VP9|AV1, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_LOWLATENCY_REQUEST, + HFI_PROP_SEQ_CHANGE_AT_SYNC_FRAME, + CAP_FLAG_INPUT_PORT}, + + {LTR_COUNT, ENC, H264|HEVC, + 0, 2, 1, 0, + V4L2_CID_MPEG_VIDEO_LTR_COUNT, + HFI_PROP_LTR_COUNT, + CAP_FLAG_OUTPUT_PORT}, + + {USE_LTR, ENC, H264|HEVC, + INVALID_DEFAULT_MARK_OR_USE_LTR, + ((1 << MAX_LTR_FRAME_COUNT) - 1), + 1, INVALID_DEFAULT_MARK_OR_USE_LTR, + V4L2_CID_MPEG_VIDEO_USE_LTR_FRAMES, + HFI_PROP_LTR_USE, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {MARK_LTR, ENC, H264|HEVC, + INVALID_DEFAULT_MARK_OR_USE_LTR, + (MAX_LTR_FRAME_COUNT - 1), + 1, INVALID_DEFAULT_MARK_OR_USE_LTR, + V4L2_CID_MPEG_VIDEO_FRAME_LTR_INDEX, + HFI_PROP_LTR_MARK, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {BASELAYER_PRIORITY, ENC, H264, + 0, MAX_BASE_LAYER_PRIORITY_ID, 1, 0, + V4L2_CID_MPEG_VIDEO_BASELAYER_PRIORITY_ID, + HFI_PROP_BASELAYER_PRIORITYID, + CAP_FLAG_OUTPUT_PORT}, + + {IR_TYPE, ENC, H264|HEVC, + V4L2_MPEG_VIDEO_VIDC_INTRA_REFRESH_RANDOM, + V4L2_MPEG_VIDEO_VIDC_INTRA_REFRESH_CYCLIC, + BIT(V4L2_MPEG_VIDEO_VIDC_INTRA_REFRESH_RANDOM) | + BIT(V4L2_MPEG_VIDEO_VIDC_INTRA_REFRESH_CYCLIC), + V4L2_MPEG_VIDEO_VIDC_INTRA_REFRESH_RANDOM, + V4L2_CID_MPEG_VIDEO_VIDC_INTRA_REFRESH_TYPE, + 0, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {IR_PERIOD, ENC, H264|HEVC, + 0, INT_MAX, 1, 0, + V4L2_CID_MPEG_VIDC_INTRA_REFRESH_PERIOD, + 0, + CAP_FLAG_INPUT_PORT | CAP_FLAG_OUTPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {AU_DELIMITER, ENC, H264|HEVC, + V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDEO_AU_DELIMITER, + HFI_PROP_AUD, + CAP_FLAG_OUTPUT_PORT}, + + {TIME_DELTA_BASED_RC, ENC, H264|HEVC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_ENABLE, + V4L2_CID_MPEG_VIDC_TIME_DELTA_BASED_RC, + HFI_PROP_TIME_DELTA_BASED_RATE_CONTROL, + CAP_FLAG_OUTPUT_PORT}, + + {TIME_DELTA_BASED_RC, ENC, HEIC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_TIME_DELTA_BASED_RC, + HFI_PROP_TIME_DELTA_BASED_RATE_CONTROL, + CAP_FLAG_OUTPUT_PORT}, + + {CONTENT_ADAPTIVE_CODING, ENC, H264|HEVC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_ENABLE, + V4L2_CID_MPEG_VIDC_CONTENT_ADAPTIVE_CODING, + HFI_PROP_CONTENT_ADAPTIVE_CODING, + CAP_FLAG_OUTPUT_PORT}, + + {REQUEST_PREPROCESS, ENC, H264|HEVC, + MSM_VIDC_PREPROCESS_NONE, + MSM_VIDC_PREPROCESS_TYPE0, + BIT(MSM_VIDC_PREPROCESS_NONE) | + BIT(MSM_VIDC_PREPROCESS_TYPE0), + MSM_VIDC_PREPROCESS_NONE, + 0, HFI_PROP_REQUEST_PREPROCESS, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {BITRATE_BOOST, ENC, H264|HEVC, + 0, MAX_BITRATE_BOOST, 25, MAX_BITRATE_BOOST, + V4L2_CID_MPEG_VIDC_QUALITY_BITRATE_BOOST, + HFI_PROP_BITRATE_BOOST, + CAP_FLAG_OUTPUT_PORT}, + + {MIN_QUALITY, ENC, H264|HEVC, + 0, MAX_SUPPORTED_MIN_QUALITY, 70, MAX_SUPPORTED_MIN_QUALITY, + 0, + HFI_PROP_MAINTAIN_MIN_QUALITY, + CAP_FLAG_OUTPUT_PORT}, + + {VBV_DELAY, ENC, H264|HEVC, + 200, 300, 100, 300, + V4L2_CID_MPEG_VIDEO_VBV_DELAY, + HFI_PROP_VBV_DELAY, + CAP_FLAG_OUTPUT_PORT}, + + {PEAK_BITRATE, ENC, H264|HEVC, + /* default peak bitrate is 10% larger than avg bitrate */ + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_BITRATE_PEAK, + HFI_PROP_TOTAL_PEAK_BITRATE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {MIN_FRAME_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, + V4L2_CID_MPEG_VIDEO_H264_MIN_QP, + HFI_PROP_MIN_QP_PACKED, + CAP_FLAG_OUTPUT_PORT}, + + {MIN_FRAME_QP, ENC, HEVC|HEIC, + MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, + V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP, + HFI_PROP_MIN_QP_PACKED, + CAP_FLAG_OUTPUT_PORT}, + + {I_FRAME_MIN_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, + V4L2_CID_MPEG_VIDEO_H264_I_FRAME_MIN_QP}, + + {I_FRAME_MIN_QP, ENC, HEVC|HEIC, + MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, + V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_MIN_QP}, + + {P_FRAME_MIN_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, + V4L2_CID_MPEG_VIDEO_H264_P_FRAME_MIN_QP}, + + {P_FRAME_MIN_QP, ENC, HEVC|HEIC, + MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, + V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_MIN_QP}, + + {B_FRAME_MIN_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, + V4L2_CID_MPEG_VIDEO_H264_B_FRAME_MIN_QP}, + + {B_FRAME_MIN_QP, ENC, HEVC|HEIC, + MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, + V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_MIN_QP}, + + {MAX_FRAME_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_H264_MAX_QP, + HFI_PROP_MAX_QP_PACKED, + CAP_FLAG_OUTPUT_PORT}, + + {MAX_FRAME_QP, ENC, HEVC|HEIC, + MIN_QP_10BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP, + HFI_PROP_MAX_QP_PACKED, + CAP_FLAG_OUTPUT_PORT}, + + {I_FRAME_MAX_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_H264_I_FRAME_MAX_QP}, + + {I_FRAME_MAX_QP, ENC, HEVC|HEIC, + MIN_QP_10BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_MAX_QP}, + + {P_FRAME_MAX_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_H264_P_FRAME_MAX_QP}, + + {P_FRAME_MAX_QP, ENC, HEVC|HEIC, + MIN_QP_10BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_MAX_QP}, + + {B_FRAME_MAX_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_H264_B_FRAME_MAX_QP}, + + {B_FRAME_MAX_QP, ENC, HEVC|HEIC, + MIN_QP_10BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_MAX_QP}, + + {I_FRAME_QP, ENC, HEVC, + MIN_QP_10BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {I_FRAME_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {P_FRAME_QP, ENC, HEVC, + MIN_QP_10BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {P_FRAME_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {B_FRAME_QP, ENC, HEVC, + MIN_QP_10BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {B_FRAME_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_H264_B_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {LAYER_TYPE, ENC, HEVC, + V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B, + V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P, + BIT(V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B) | + BIT(V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P), + V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE, + HFI_PROP_LAYER_ENCODING_TYPE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LAYER_TYPE, ENC, H264, + V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_B, + V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P, + BIT(V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_B) | + BIT(V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P), + V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P, + V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_TYPE, + HFI_PROP_LAYER_ENCODING_TYPE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LAYER_ENABLE, ENC, H264, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING, + HFI_PROP_LAYER_ENCODING_TYPE, + CAP_FLAG_OUTPUT_PORT}, + + {LAYER_ENABLE, ENC, HEVC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, + 0, + CAP_FLAG_OUTPUT_PORT}, + + {ENH_LAYER_COUNT, ENC, HEVC, + 0, 5, 1, 0, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER, + HFI_PROP_LAYER_COUNT, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {ENH_LAYER_COUNT, ENC, H264, + 0, 5, 1, 0, + V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_LAYER, + HFI_PROP_LAYER_COUNT, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {ENH_LAYER_COUNT, DEC, AV1, + 0, MAX_OP_POINT, 1, 0, + 0, + HFI_PROP_AV1_OP_POINT, + CAP_FLAG_INPUT_PORT}, + + {L0_BR, ENC, H264, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L0_BR, + HFI_PROP_BITRATE_LAYER1, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L0_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L0_BR, + HFI_PROP_BITRATE_LAYER1, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L1_BR, ENC, H264, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L1_BR, + HFI_PROP_BITRATE_LAYER2, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L1_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L1_BR, + HFI_PROP_BITRATE_LAYER2, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L2_BR, ENC, H264, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L2_BR, + HFI_PROP_BITRATE_LAYER3, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L2_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L2_BR, + HFI_PROP_BITRATE_LAYER3, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L3_BR, ENC, H264, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L3_BR, + HFI_PROP_BITRATE_LAYER4, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + {L3_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L3_BR, + HFI_PROP_BITRATE_LAYER4, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L4_BR, ENC, H264, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L4_BR, + HFI_PROP_BITRATE_LAYER5, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L4_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L4_BR, + HFI_PROP_BITRATE_LAYER5, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L5_BR, ENC, H264, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L5_BR, + HFI_PROP_BITRATE_LAYER6, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L5_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L5_BR, + HFI_PROP_BITRATE_LAYER6, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {ENTROPY_MODE, ENC, H264, + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC, + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, + BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC) | + BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC), + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, + V4L2_CID_MPEG_VIDEO_H264_ENTROPY_MODE, + HFI_PROP_CABAC_SESSION, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {ENTROPY_MODE, DEC, H264|HEVC|VP9|AV1, + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC, + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, + BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC) | + BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC), + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, + 0, + HFI_PROP_CABAC_SESSION}, + + {PROFILE, ENC|DEC, H264, + V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE, + V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH, + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_BASELINE) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_MAIN) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_HIGH), + V4L2_MPEG_VIDEO_H264_PROFILE_HIGH, + V4L2_CID_MPEG_VIDEO_H264_PROFILE, + HFI_PROP_PROFILE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {PROFILE, ENC|DEC, HEVC|HEIC, + V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN, + V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE, + BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN) | + BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE) | + BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10) | + BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE), + V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN, + V4L2_CID_MPEG_VIDEO_HEVC_PROFILE, + HFI_PROP_PROFILE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {PROFILE, DEC, VP9, + V4L2_MPEG_VIDEO_VP9_PROFILE_0, + V4L2_MPEG_VIDEO_VP9_PROFILE_2, + BIT(V4L2_MPEG_VIDEO_VP9_PROFILE_0) | + BIT(V4L2_MPEG_VIDEO_VP9_PROFILE_2), + V4L2_MPEG_VIDEO_VP9_PROFILE_0, + V4L2_CID_MPEG_VIDEO_VP9_PROFILE, + HFI_PROP_PROFILE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {PROFILE, DEC, AV1, + V4L2_MPEG_VIDEO_AV1_PROFILE_MAIN, + V4L2_MPEG_VIDEO_AV1_PROFILE_MAIN, + BIT(V4L2_MPEG_VIDEO_AV1_PROFILE_MAIN), + V4L2_MPEG_VIDEO_AV1_PROFILE_MAIN, + V4L2_CID_MPEG_VIDEO_AV1_PROFILE, + HFI_PROP_PROFILE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LEVEL, ENC, H264, + V4L2_MPEG_VIDEO_H264_LEVEL_1_0, + V4L2_MPEG_VIDEO_H264_LEVEL_6_0, + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1B) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_3) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_0), + V4L2_MPEG_VIDEO_H264_LEVEL_5_0, + V4L2_CID_MPEG_VIDEO_H264_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LEVEL, ENC, HEVC|HEIC, + V4L2_MPEG_VIDEO_HEVC_LEVEL_1, + V4L2_MPEG_VIDEO_HEVC_LEVEL_6, + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6), + V4L2_MPEG_VIDEO_HEVC_LEVEL_5, + V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LEVEL, DEC, H264, + V4L2_MPEG_VIDEO_H264_LEVEL_1_0, + V4L2_MPEG_VIDEO_H264_LEVEL_6_2, + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1B) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_3) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_2), + V4L2_MPEG_VIDEO_H264_LEVEL_6_1, + V4L2_CID_MPEG_VIDEO_H264_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LEVEL, DEC, HEVC|HEIC, + V4L2_MPEG_VIDEO_HEVC_LEVEL_1, + V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2, + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1)| + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2), + V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1, + V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LEVEL, DEC, VP9, + V4L2_MPEG_VIDEO_VP9_LEVEL_1_0, + V4L2_MPEG_VIDEO_VP9_LEVEL_6_0, + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_1_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_1_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_2_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_3_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_4_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_2) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_6_0), + V4L2_MPEG_VIDEO_VP9_LEVEL_6_0, + V4L2_CID_MPEG_VIDEO_VP9_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LEVEL, DEC, AV1, + V4L2_MPEG_VIDEO_AV1_LEVEL_2_0, + V4L2_MPEG_VIDEO_AV1_LEVEL_6_1, + BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_2_0) | + BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_2_2) | + BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_2_3) | + BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_3_0) | + BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_3_2) | + BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_3_3) | + BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_4_0) | + BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_4_2) | + BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_4_3) | + BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_5_0) | + BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_5_1) | + BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_5_2) | + BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_5_3) | + BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_6_0) | + BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_6_1), + V4L2_MPEG_VIDEO_AV1_LEVEL_6_1, + V4L2_CID_MPEG_VIDEO_AV1_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {AV1_TIER, DEC, AV1, + V4L2_MPEG_VIDEO_AV1_TIER_MAIN, + V4L2_MPEG_VIDEO_AV1_TIER_HIGH, + BIT(V4L2_MPEG_VIDEO_AV1_TIER_MAIN) | + BIT(V4L2_MPEG_VIDEO_AV1_TIER_HIGH), + V4L2_MPEG_VIDEO_AV1_TIER_HIGH, + V4L2_CID_MPEG_VIDEO_AV1_TIER, + HFI_PROP_TIER, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {HEVC_TIER, ENC|DEC, HEVC, + V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, + V4L2_MPEG_VIDEO_HEVC_TIER_HIGH, + BIT(V4L2_MPEG_VIDEO_HEVC_TIER_MAIN) | + BIT(V4L2_MPEG_VIDEO_HEVC_TIER_HIGH), + V4L2_MPEG_VIDEO_HEVC_TIER_HIGH, + V4L2_CID_MPEG_VIDEO_HEVC_TIER, + HFI_PROP_TIER, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {HEVC_TIER, ENC|DEC, HEIC, + V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, + V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, + BIT(V4L2_MPEG_VIDEO_HEVC_TIER_MAIN), + V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, + V4L2_CID_MPEG_VIDEO_HEVC_TIER, + HFI_PROP_TIER, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LF_MODE, ENC, H264, + V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED, + DB_H264_DISABLE_SLICE_BOUNDARY, + BIT(V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED) | + BIT(V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_DISABLED) | + BIT(DB_H264_DISABLE_SLICE_BOUNDARY), + V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED, + V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_MODE, + HFI_PROP_DEBLOCKING_MODE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LF_MODE, ENC, HEVC|HEIC, + V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_DISABLED, + DB_HEVC_DISABLE_SLICE_BOUNDARY, + BIT(V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_DISABLED) | + BIT(V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_ENABLED) | + BIT(DB_HEVC_DISABLE_SLICE_BOUNDARY), + V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_ENABLED, + V4L2_CID_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE, + HFI_PROP_DEBLOCKING_MODE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LF_ALPHA, ENC, H264, + -6, 6, 1, 0, + V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_ALPHA}, + + {LF_ALPHA, ENC, HEVC|HEIC, + -6, 6, 1, 0, + V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2}, + + {LF_BETA, ENC, H264, + -6, 6, 1, 0, + V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_BETA}, + + {LF_BETA, ENC, HEVC|HEIC, + -6, 6, 1, 0, + V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2}, + + {SLICE_MODE, ENC, H264|HEVC, + V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, + V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_BYTES, + BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE) | + BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_MB) | + BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_BYTES), + V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, + V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE, + 0, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {SLICE_MODE, ENC, HEIC, + V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, + V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, + BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE), + V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, + V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE, + 0, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {SLICE_MAX_BYTES, ENC, H264|HEVC, + MIN_SLICE_BYTE_SIZE, MAX_SLICE_BYTE_SIZE, + 1, MIN_SLICE_BYTE_SIZE, + V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES, + HFI_PROP_MULTI_SLICE_BYTES_COUNT, + CAP_FLAG_OUTPUT_PORT}, + + {SLICE_MAX_MB, ENC, H264|HEVC, + 1, MAX_SLICE_MB_SIZE, 1, 1, + V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB, + HFI_PROP_MULTI_SLICE_MB_COUNT, + CAP_FLAG_OUTPUT_PORT}, + + {MB_RC, ENC, H264|HEVC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_ENABLE, + V4L2_CID_MPEG_VIDEO_MB_RC_ENABLE, + 0, + CAP_FLAG_OUTPUT_PORT}, + + {TRANSFORM_8X8, ENC, H264, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_ENABLE, + V4L2_CID_MPEG_VIDEO_H264_8X8_TRANSFORM, + HFI_PROP_8X8_TRANSFORM, + CAP_FLAG_OUTPUT_PORT}, + + {CHROMA_QP_INDEX_OFFSET, ENC, HEVC, + MIN_CHROMA_QP_OFFSET, MAX_CHROMA_QP_OFFSET, + 1, MAX_CHROMA_QP_OFFSET, + V4L2_CID_MPEG_VIDEO_H264_CHROMA_QP_INDEX_OFFSET, + HFI_PROP_CHROMA_QP_OFFSET, + CAP_FLAG_OUTPUT_PORT}, + + {DISPLAY_DELAY_ENABLE, DEC, H264|HEVC|VP9|AV1, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY_ENABLE, + HFI_PROP_DECODE_ORDER_OUTPUT, + CAP_FLAG_INPUT_PORT}, + + {DISPLAY_DELAY, DEC, H264|HEVC|VP9|AV1, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY, + HFI_PROP_DECODE_ORDER_OUTPUT, + CAP_FLAG_INPUT_PORT}, + + {OUTPUT_ORDER, DEC, H264|HEVC|VP9|AV1, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, + HFI_PROP_DECODE_ORDER_OUTPUT, + CAP_FLAG_INPUT_PORT}, + + {INPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL, + DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT, + 1, DEFAULT_MAX_HOST_BUF_COUNT, + 0, + HFI_PROP_BUFFER_HOST_MAX_COUNT, + CAP_FLAG_INPUT_PORT}, + + {OUTPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL, + DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT, + 1, DEFAULT_MAX_HOST_BUF_COUNT, + 0, + HFI_PROP_BUFFER_HOST_MAX_COUNT, + CAP_FLAG_OUTPUT_PORT}, + + {CONCEAL_COLOR_8BIT, DEC, CODECS_ALL, 0x0, 0xff3fcff, 1, + DEFAULT_VIDEO_CONCEAL_COLOR_BLACK, + V4L2_CID_MPEG_VIDEO_MUTE_YUV, + HFI_PROP_CONCEAL_COLOR_8BIT, + CAP_FLAG_INPUT_PORT}, + + {CONCEAL_COLOR_10BIT, DEC, CODECS_ALL, 0x0, 0x3fffffff, 1, + DEFAULT_VIDEO_CONCEAL_COLOR_BLACK, + V4L2_CID_MPEG_VIDEO_MUTE_YUV, + HFI_PROP_CONCEAL_COLOR_10BIT, + CAP_FLAG_INPUT_PORT}, + + {STAGE, DEC|ENC, CODECS_ALL, + MSM_VIDC_STAGE_1, + MSM_VIDC_STAGE_2, 1, + MSM_VIDC_STAGE_2, + 0, + HFI_PROP_STAGE}, + + {PIPE, DEC|ENC, CODECS_ALL, + MSM_VIDC_PIPE_1, + MSM_VIDC_PIPE_4, 1, + MSM_VIDC_PIPE_4, + 0, + HFI_PROP_PIPE}, + + {POC, DEC, H264, 0, 2, 1, 1, + 0, + HFI_PROP_PIC_ORDER_CNT_TYPE}, + + {QUALITY_MODE, ENC, CODECS_ALL, + MSM_VIDC_MAX_QUALITY_MODE, + MSM_VIDC_POWER_SAVE_MODE, 1, + MSM_VIDC_POWER_SAVE_MODE}, + + {CODED_FRAMES, DEC, H264|HEVC|HEIC, + CODED_FRAMES_PROGRESSIVE, CODED_FRAMES_INTERLACE, + 1, CODED_FRAMES_PROGRESSIVE, + 0, + HFI_PROP_CODED_FRAMES}, + + {BIT_DEPTH, DEC, CODECS_ALL, BIT_DEPTH_8, BIT_DEPTH_10, 1, BIT_DEPTH_8, + 0, + HFI_PROP_LUMA_CHROMA_BIT_DEPTH}, + + {CODEC_CONFIG, DEC, H264|HEVC|HEIC|AV1, 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_CODEC_CONFIG, 0, + CAP_FLAG_DYNAMIC_ALLOWED}, + + {BITSTREAM_SIZE_OVERWRITE, DEC, CODECS_ALL, 0, INT_MAX, 1, 0, + V4L2_CID_MPEG_VIDC_MIN_BITSTREAM_SIZE_OVERWRITE}, + + {THUMBNAIL_MODE, DEC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_THUMBNAIL_MODE, + HFI_PROP_THUMBNAIL_MODE, + CAP_FLAG_INPUT_PORT}, + + {DEFAULT_HEADER, DEC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, + HFI_PROP_DEC_DEFAULT_HEADER}, + + {RAP_FRAME, DEC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_ENABLE, + 0, + HFI_PROP_DEC_START_FROM_RAP_FRAME, + CAP_FLAG_INPUT_PORT}, + + {SEQ_CHANGE_AT_SYNC_FRAME, DEC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_ENABLE, + 0, + HFI_PROP_SEQ_CHANGE_AT_SYNC_FRAME, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {PRIORITY, DEC|ENC, CODECS_ALL, + 0, 1 + NRT_PRIORITY_OFFSET, 1, 1 + NRT_PRIORITY_OFFSET, + V4L2_CID_MPEG_VIDC_PRIORITY, + HFI_PROP_SESSION_PRIORITY, + CAP_FLAG_DYNAMIC_ALLOWED}, + + {FIRMWARE_PRIORITY_OFFSET, DEC | ENC, CODECS_ALL, + 1, 1, 1, 1}, + + {CRITICAL_PRIORITY, ENC, CODECS_ALL, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_CRITICAL_PRIORITY}, + + {RESERVE_DURATION, ENC, CODECS_ALL, + 0, INT_MAX, 1, 0, + V4L2_CID_MPEG_VIDC_RESERVE_DURATION, + HFI_CMD_RESERVE, + CAP_FLAG_DYNAMIC_ALLOWED}, + + {ENC_IP_CR, ENC, CODECS_ALL, + 0, S32_MAX, 1, 0, + V4L2_CID_MPEG_VIDC_ENC_INPUT_COMPRESSION_RATIO, + 0, CAP_FLAG_DYNAMIC_ALLOWED}, + + {DPB_LIST, DEC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, + HFI_PROP_DPB_LIST, + CAP_FLAG_OUTPUT_PORT}, + + {FILM_GRAIN, DEC, AV1, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_AV1D_FILM_GRAIN_PRESENT, + HFI_PROP_AV1_FILM_GRAIN_PRESENT}, + + {SUPER_BLOCK, DEC, AV1, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, + HFI_PROP_AV1_SUPER_BLOCK_ENABLED}, + + {DRAP, DEC, AV1, + 0, S32_MAX, 1, 0, + 0, + HFI_PROP_AV1_DRAP_CONFIG, + CAP_FLAG_INPUT_PORT}, + + {META_BITSTREAM_RESOLUTION, DEC, AV1, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_INPUT | + V4L2_MPEG_VIDC_META_RX_OUTPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_BITSTREAM_RESOLUTION, + HFI_PROP_BITSTREAM_RESOLUTION, + CAP_FLAG_BITMASK}, + + {META_CROP_OFFSETS, DEC, AV1, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_INPUT | + V4L2_MPEG_VIDC_META_RX_OUTPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_CROP_OFFSETS, + HFI_PROP_CROP_OFFSETS, + CAP_FLAG_BITMASK}, + + {ALL_INTRA, ENC, H264|HEVC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, + 0, + CAP_FLAG_OUTPUT_PORT}, + + {INPUT_METADATA_FD, ENC|DEC, CODECS_ALL, + INVALID_FD, INT_MAX, 1, INVALID_FD, + V4L2_CID_MPEG_VIDC_INPUT_METADATA_FD, + 0, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {INPUT_META_VIA_REQUEST, ENC|DEC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_INPUT_METADATA_VIA_REQUEST_ENABLE, + 0, + CAP_FLAG_INPUT_PORT}, + + {META_LTR_MARK_USE, ENC, H264|HEVC, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_LTR_MARK_USE_DETAILS, + HFI_PROP_LTR_MARK_USE_DETAILS, + CAP_FLAG_BITMASK}, + + {META_SEQ_HDR_NAL, ENC, CODECS_ALL, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_SEQ_HEADER_NAL, + HFI_PROP_METADATA_SEQ_HEADER_NAL, + CAP_FLAG_BITMASK}, + + {META_DPB_MISR, DEC, CODECS_ALL, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_DPB_LUMA_CHROMA_MISR, + HFI_PROP_DPB_LUMA_CHROMA_MISR, + CAP_FLAG_BITMASK}, + + {META_OPB_MISR, DEC, CODECS_ALL, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_OPB_LUMA_CHROMA_MISR, + HFI_PROP_OPB_LUMA_CHROMA_MISR, + CAP_FLAG_BITMASK}, + + {META_INTERLACE, DEC, H264, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_INTERLACE, + HFI_PROP_INTERLACE_INFO, + CAP_FLAG_BITMASK}, + + {META_TIMESTAMP, DEC | ENC, CODECS_ALL, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_TIMESTAMP, + HFI_PROP_TIMESTAMP, + CAP_FLAG_BITMASK}, + + {META_CONCEALED_MB_CNT, DEC, CODECS_ALL, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_CONCEALED_MB_COUNT, + HFI_PROP_CONEALED_MB_COUNT, + CAP_FLAG_BITMASK}, + + {META_HIST_INFO, DEC, HEVC|AV1|VP9, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_HISTOGRAM_INFO, + HFI_PROP_HISTOGRAM_INFO, + CAP_FLAG_BITMASK}, + + {META_TRANSCODING_STAT_INFO, DEC, HEVC|H264, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_TRANSCODE_STAT_INFO, + HFI_PROP_TRANSCODING_STAT_INFO, + CAP_FLAG_BITMASK}, + + {META_TRANSCODING_STAT_INFO, ENC, HEVC|H264, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_TX_INPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_TRANSCODE_STAT_INFO, + HFI_PROP_TRANSCODING_STAT_INFO, + CAP_FLAG_BITMASK}, + + {META_PICTURE_TYPE, DEC, CODECS_ALL, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_INPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_PICTURE_TYPE, + HFI_PROP_PICTURE_TYPE, + CAP_FLAG_BITMASK}, + + {META_SEI_MASTERING_DISP, ENC, HEVC|HEIC, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_TX_INPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_SEI_MASTERING_DISPLAY_COLOUR, + HFI_PROP_SEI_MASTERING_DISPLAY_COLOUR, + CAP_FLAG_BITMASK}, + + {META_SEI_MASTERING_DISP, DEC, HEVC|HEIC|AV1, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_INPUT | + V4L2_MPEG_VIDC_META_RX_OUTPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_SEI_MASTERING_DISPLAY_COLOUR, + HFI_PROP_SEI_MASTERING_DISPLAY_COLOUR, + CAP_FLAG_BITMASK}, + + {META_SEI_CLL, ENC, HEVC|HEIC, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_TX_INPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_SEI_CONTENT_LIGHT_LEVEL, + HFI_PROP_SEI_CONTENT_LIGHT_LEVEL, + CAP_FLAG_BITMASK}, + + {META_SEI_CLL, DEC, HEVC|HEIC|AV1, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_INPUT | + V4L2_MPEG_VIDC_META_RX_OUTPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_SEI_CONTENT_LIGHT_LEVEL, + HFI_PROP_SEI_CONTENT_LIGHT_LEVEL, + CAP_FLAG_BITMASK}, + + {META_HDR10PLUS, ENC, HEVC|HEIC, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_TX_INPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_HDR10PLUS, + HFI_PROP_SEI_HDR10PLUS_USERDATA, + CAP_FLAG_BITMASK}, + + {META_HDR10PLUS, DEC, HEVC|HEIC|AV1, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_INPUT | + V4L2_MPEG_VIDC_META_RX_OUTPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_HDR10PLUS, + HFI_PROP_SEI_HDR10PLUS_USERDATA, + CAP_FLAG_BITMASK}, + + {META_DOLBY_RPU, ENC, HEVC, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_TX_INPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_DOLBY_RPU, + HFI_PROP_DOLBY_RPU_METADATA, + CAP_FLAG_BITMASK}, + + {META_DOLBY_RPU, DEC, H264|HEVC, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_DOLBY_RPU, + HFI_PROP_DOLBY_RPU_METADATA, + CAP_FLAG_BITMASK}, + + {META_EVA_STATS, ENC, CODECS_ALL, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_TX_INPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_EVA_STATS, + HFI_PROP_EVA_STAT_INFO, + CAP_FLAG_BITMASK}, + + {META_BUF_TAG, ENC, CODECS_ALL, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_TX_INPUT | + V4L2_MPEG_VIDC_META_RX_OUTPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_BUFFER_TAG, + HFI_PROP_BUFFER_TAG, + CAP_FLAG_BITMASK}, + + /* + * when fence enabled, client needs output buffer_tag + * in input metadata buffer done. + */ + {META_BUF_TAG, DEC, CODECS_ALL, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_TX_INPUT | + V4L2_MPEG_VIDC_META_TX_OUTPUT | V4L2_MPEG_VIDC_META_RX_INPUT | + V4L2_MPEG_VIDC_META_RX_OUTPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_BUFFER_TAG, + HFI_PROP_BUFFER_TAG, + CAP_FLAG_BITMASK}, + + {META_DPB_TAG_LIST, DEC, CODECS_ALL, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_DPB_TAG_LIST, + HFI_PROP_DPB_TAG_LIST, + CAP_FLAG_BITMASK}, + + {META_SUBFRAME_OUTPUT, ENC, HEIC | H264 | HEVC, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_SUBFRAME_OUTPUT, + HFI_PROP_SUBFRAME_OUTPUT, + CAP_FLAG_BITMASK}, + + {META_SUBFRAME_OUTPUT, DEC, CODECS_ALL, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_SUBFRAME_OUTPUT, + HFI_PROP_SUBFRAME_OUTPUT, + CAP_FLAG_BITMASK}, + + {META_ENC_QP_METADATA, ENC, CODECS_ALL, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_ENC_QP_METADATA, + HFI_PROP_ENC_QP_METADATA, + CAP_FLAG_BITMASK}, + + {META_ROI_INFO, ENC, H264|HEVC, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_TX_INPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_ROI_INFO, + HFI_PROP_ROI_INFO, + CAP_FLAG_INPUT_PORT | CAP_FLAG_BITMASK}, + + {META_SALIENCY_INFO, ENC, H264|HEVC, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_TX_INPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_SALIENCY_INFO, + HFI_PROP_ROI_AS_SALIENCY_INFO, + CAP_FLAG_INPUT_PORT | CAP_FLAG_BITMASK}, + + {META_DEC_QP_METADATA, DEC, CODECS_ALL, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_DEC_QP_METADATA, + HFI_PROP_DEC_QP_METADATA, + CAP_FLAG_BITMASK}, + + {GRID, ENC, HEIC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_ENABLE, + 0, + HFI_PROP_HEIC_GRID_ENABLE, + CAP_FLAG_OUTPUT_PORT}, + + {COMPLEXITY, ENC, H264|HEVC, + 0, 100, + 1, DEFAULT_COMPLEXITY, + V4L2_CID_MPEG_VIDC_VENC_COMPLEXITY}, + + {META_MAX_NUM_REORDER_FRAMES, DEC, HEVC | H264, + V4L2_MPEG_VIDC_META_DISABLE, + V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, + 0, V4L2_MPEG_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_MAX_NUM_REORDER_FRAMES, + HFI_PROP_MAX_NUM_REORDER_FRAMES, + CAP_FLAG_BITMASK}, + + {DELIVERY_MODE, ENC, HEVC, + V4L2_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE_FRAME_BASED, + V4L2_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE_SLICE_BASED, + BIT(V4L2_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE_FRAME_BASED) | + BIT(V4L2_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE_SLICE_BASED), + V4L2_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE_FRAME_BASED, + V4L2_CID_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE, + HFI_PROP_ENABLE_SLICE_DELIVERY, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {DELIVERY_MODE, ENC, H264, + V4L2_MPEG_VIDC_H264_ENCODE_DELIVERY_MODE_FRAME_BASED, + V4L2_MPEG_VIDC_H264_ENCODE_DELIVERY_MODE_SLICE_BASED, + BIT(V4L2_MPEG_VIDC_H264_ENCODE_DELIVERY_MODE_FRAME_BASED) | + BIT(V4L2_MPEG_VIDC_H264_ENCODE_DELIVERY_MODE_SLICE_BASED), + V4L2_MPEG_VIDC_H264_ENCODE_DELIVERY_MODE_FRAME_BASED, + V4L2_CID_MPEG_VIDC_H264_ENCODE_DELIVERY_MODE, + HFI_PROP_ENABLE_SLICE_DELIVERY, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, +}; + +static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_anorak[] = { + /* {cap, domain, codec, + * parents, + * children, + * adjust, set} + */ + + {PIX_FMTS, ENC, H264, + {0}, + {META_ROI_INFO, IR_PERIOD}}, + + {PIX_FMTS, ENC, HEVC, + {0}, + {PROFILE, MIN_FRAME_QP, MAX_FRAME_QP, I_FRAME_QP, P_FRAME_QP, + B_FRAME_QP, META_ROI_INFO, MIN_QUALITY, BLUR_TYPES, IR_PERIOD}}, + + {PIX_FMTS, ENC, HEIC, + {0}, + {PROFILE}}, + + {PIX_FMTS, DEC, HEVC|HEIC, + {0}, + {PROFILE}}, + + {FRAME_RATE, ENC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_q16}, + + {FRAME_RATE, DEC, CODECS_ALL, + {0}, + {0}, + msm_vidc_adjust_dec_frame_rate}, + + {OPERATING_RATE, DEC, CODECS_ALL, + {0}, + {0}, + msm_vidc_adjust_dec_operating_rate}, + + {SECURE_MODE, ENC|DEC, H264|HEVC|VP9|AV1, + {0}, + {0}, + NULL, + msm_vidc_set_u32}, + + {META_OUTBUF_FENCE, DEC, H264|HEVC|VP9|AV1, + {OUTPUT_ORDER}, + {LOWLATENCY_MODE}, + msm_vidc_adjust_dec_outbuf_fence, + NULL}, + + {HFLIP, ENC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_flip}, + + {VFLIP, ENC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_flip}, + + {ROTATION, ENC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_rotation}, + + {SUPER_FRAME, ENC, H264|HEVC, + {0}, + {INPUT_BUF_HOST_MAX_COUNT, OUTPUT_BUF_HOST_MAX_COUNT}, + NULL, + NULL}, + + {HEADER_MODE, ENC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_header_mode}, + + {WITHOUT_STARTCODE, ENC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_nal_length}, + + {WITHOUT_STARTCODE, DEC, AV1, + {0}, + {0}, + NULL, + msm_vidc_set_u32}, + + {REQUEST_I_FRAME, ENC, H264|HEVC, + {0}, + {0}, + NULL, + msm_vidc_set_req_sync_frame}, + + {BIT_RATE, ENC, H264, + {ENH_LAYER_COUNT, BITRATE_MODE, ENTROPY_MODE, + ALL_INTRA, LOWLATENCY_MODE}, + {PEAK_BITRATE, BITRATE_BOOST}, + msm_vidc_adjust_bitrate, + msm_vidc_set_bitrate}, + + {BIT_RATE, ENC, HEVC, + {ENH_LAYER_COUNT, BITRATE_MODE, ALL_INTRA, LOWLATENCY_MODE}, + {PEAK_BITRATE, BITRATE_BOOST}, + msm_vidc_adjust_bitrate, + msm_vidc_set_bitrate}, + + {BITRATE_MODE, ENC, H264, + {0}, + {LTR_COUNT, IR_PERIOD, TIME_DELTA_BASED_RC, I_FRAME_QP, + P_FRAME_QP, B_FRAME_QP, ENH_LAYER_COUNT, BIT_RATE, + META_ROI_INFO, MIN_QUALITY, BITRATE_BOOST, VBV_DELAY, + PEAK_BITRATE, SLICE_MODE, CONTENT_ADAPTIVE_CODING, + BLUR_TYPES, LOWLATENCY_MODE}, + msm_vidc_adjust_bitrate_mode, + msm_vidc_set_u32_enum}, + + {BITRATE_MODE, ENC, HEVC, + {0}, + {LTR_COUNT, IR_PERIOD, TIME_DELTA_BASED_RC, I_FRAME_QP, + P_FRAME_QP, B_FRAME_QP, CONSTANT_QUALITY, ENH_LAYER_COUNT, + BIT_RATE, META_ROI_INFO, MIN_QUALITY, BITRATE_BOOST, VBV_DELAY, + PEAK_BITRATE, SLICE_MODE, CONTENT_ADAPTIVE_CODING, + BLUR_TYPES, LOWLATENCY_MODE}, + msm_vidc_adjust_bitrate_mode, + msm_vidc_set_u32_enum}, + + {BITRATE_MODE, ENC, HEIC, + {0}, + {TIME_DELTA_BASED_RC, CONSTANT_QUALITY}, + msm_vidc_adjust_bitrate_mode, + msm_vidc_set_u32_enum}, + + {CONSTANT_QUALITY, ENC, HEVC|HEIC, + {BITRATE_MODE}, + {0}, + NULL, + msm_vidc_set_constant_quality}, + + {GOP_SIZE, ENC, CODECS_ALL, + {ENH_LAYER_COUNT}, + {ALL_INTRA}, + msm_vidc_adjust_gop_size, + msm_vidc_set_gop_size}, + + {GOP_SIZE, ENC, HEIC, + {0}, + {0}, + NULL, + msm_vidc_set_u32}, + + {B_FRAME, ENC, H264|HEVC, + {ENH_LAYER_COUNT}, + {ALL_INTRA}, + msm_vidc_adjust_b_frame, + msm_vidc_set_u32}, + + {B_FRAME, ENC, HEIC, + {0}, + {0}, + NULL, + msm_vidc_set_u32}, + + {BLUR_TYPES, ENC, H264|HEVC, + {PIX_FMTS, BITRATE_MODE, MIN_QUALITY, META_ROI_INFO}, + {BLUR_RESOLUTION}, + msm_vidc_adjust_blur_type, + msm_vidc_set_u32_enum}, + + {BLUR_RESOLUTION, ENC, H264|HEVC, + {BLUR_TYPES}, + {0}, + msm_vidc_adjust_blur_resolution, + msm_vidc_set_blur_resolution}, + + {CSC_CUSTOM_MATRIX, ENC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_csc_custom_matrix}, + + {LOWLATENCY_MODE, ENC, H264 | HEVC, + {BITRATE_MODE, DELIVERY_MODE}, + {STAGE, BIT_RATE}, + msm_vidc_adjust_enc_lowlatency_mode, + NULL}, + + {LOWLATENCY_MODE, DEC, H264|HEVC|VP9|AV1, + {META_OUTBUF_FENCE}, + {STAGE}, + msm_vidc_adjust_dec_lowlatency_mode, + NULL}, + + {LTR_COUNT, ENC, H264|HEVC, + {BITRATE_MODE, ALL_INTRA}, + {0}, + msm_vidc_adjust_ltr_count, + msm_vidc_set_u32}, + + {USE_LTR, ENC, H264|HEVC, + {0}, + {0}, + msm_vidc_adjust_use_ltr, + msm_vidc_set_use_and_mark_ltr}, + + {MARK_LTR, ENC, H264|HEVC, + {0}, + {0}, + msm_vidc_adjust_mark_ltr, + msm_vidc_set_use_and_mark_ltr}, + + {IR_PERIOD, ENC, H264|HEVC, + {BITRATE_MODE, ALL_INTRA, META_ROI_INFO, PIX_FMTS}, + {0}, + msm_vidc_adjust_ir_period, + msm_vidc_set_ir_period}, + + {AU_DELIMITER, ENC, H264|HEVC, + {0}, + {0}, + NULL, + msm_vidc_set_u32}, + + {TIME_DELTA_BASED_RC, ENC, CODECS_ALL, + {BITRATE_MODE}, + {0}, + msm_vidc_adjust_delta_based_rc, + msm_vidc_set_u32}, + + {CONTENT_ADAPTIVE_CODING, ENC, H264|HEVC, + {BITRATE_MODE, LAYER_ENABLE, LAYER_TYPE}, + {REQUEST_PREPROCESS}, + msm_vidc_adjust_brs, + msm_vidc_set_vbr_related_properties}, + + {REQUEST_PREPROCESS, ENC, H264|HEVC, + {CONTENT_ADAPTIVE_CODING, META_EVA_STATS}, + {0}, + msm_vidc_adjust_preprocess, + msm_vidc_set_preprocess}, + + {BITRATE_BOOST, ENC, H264|HEVC, + {BITRATE_MODE, MIN_QUALITY, BIT_RATE}, + {0}, + msm_vidc_adjust_bitrate_boost_iris3, + msm_vidc_set_vbr_related_properties}, + + {MIN_QUALITY, ENC, H264, + {BITRATE_MODE, ENH_LAYER_COUNT, META_ROI_INFO}, + {BLUR_TYPES}, + msm_vidc_adjust_min_quality, + msm_vidc_set_vbr_related_properties}, + + {MIN_QUALITY, ENC, HEVC, + {BITRATE_MODE, PIX_FMTS, ENH_LAYER_COUNT, + META_ROI_INFO}, + {BLUR_TYPES}, + msm_vidc_adjust_min_quality, + msm_vidc_set_vbr_related_properties}, + + {VBV_DELAY, ENC, H264|HEVC, + {BITRATE_MODE}, + {0}, + NULL, + msm_vidc_set_cbr_related_properties}, + + {PEAK_BITRATE, ENC, H264|HEVC, + {BITRATE_MODE, BIT_RATE}, + {0}, + msm_vidc_adjust_peak_bitrate, + msm_vidc_set_cbr_related_properties}, + + {MIN_FRAME_QP, ENC, H264, + {0}, + {0}, + NULL, + msm_vidc_set_min_qp}, + + {MIN_FRAME_QP, ENC, HEVC|HEIC, + {PIX_FMTS}, + {0}, + msm_vidc_adjust_hevc_min_qp, + msm_vidc_set_min_qp}, + + {MAX_FRAME_QP, ENC, H264, + {0}, + {0}, + NULL, + msm_vidc_set_max_qp}, + + {MAX_FRAME_QP, ENC, HEVC|HEIC, + {PIX_FMTS}, + {0}, + msm_vidc_adjust_hevc_max_qp, + msm_vidc_set_max_qp}, + + {I_FRAME_QP, ENC, HEVC, + {PIX_FMTS, BITRATE_MODE}, + {0}, + msm_vidc_adjust_hevc_i_frame_qp, + msm_vidc_set_frame_qp}, + + {I_FRAME_QP, ENC, H264, + {BITRATE_MODE}, + {0}, + NULL, + msm_vidc_set_frame_qp}, + + {P_FRAME_QP, ENC, HEVC, + {PIX_FMTS, BITRATE_MODE}, + {0}, + msm_vidc_adjust_hevc_p_frame_qp, + msm_vidc_set_frame_qp}, + + {P_FRAME_QP, ENC, H264, + {BITRATE_MODE}, + {0}, + NULL, + msm_vidc_set_frame_qp}, + + {B_FRAME_QP, ENC, HEVC, + {PIX_FMTS, BITRATE_MODE}, + {0}, + msm_vidc_adjust_hevc_b_frame_qp, + msm_vidc_set_frame_qp}, + + {B_FRAME_QP, ENC, H264, + {BITRATE_MODE}, + {0}, + NULL, + msm_vidc_set_frame_qp}, + + {LAYER_TYPE, ENC, H264, + {0}, + {CONTENT_ADAPTIVE_CODING}}, + + {LAYER_ENABLE, ENC, H264|HEVC, + {0}, + {CONTENT_ADAPTIVE_CODING}}, + + {ENH_LAYER_COUNT, ENC, H264|HEVC, + {BITRATE_MODE, META_EVA_STATS}, + {GOP_SIZE, B_FRAME, BIT_RATE, MIN_QUALITY}, + msm_vidc_adjust_layer_count, + msm_vidc_set_layer_count_and_type}, + + {ENH_LAYER_COUNT, DEC, AV1, + {0}, + {0}, + NULL, + msm_vidc_set_u32}, + + {L0_BR, ENC, H264|HEVC, + {0}, + {0}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, + + {L1_BR, ENC, H264|HEVC, + {0}, + {0}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, + + {L2_BR, ENC, H264|HEVC, + {0}, + {0}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, + + {L3_BR, ENC, H264|HEVC, + {0}, + {0}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, + + {L4_BR, ENC, H264|HEVC, + {0}, + {0}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, + + {L5_BR, ENC, H264|HEVC, + {0}, + {0}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, + + {ENTROPY_MODE, ENC, H264, + {PROFILE}, + {BIT_RATE}, + msm_vidc_adjust_entropy_mode, + msm_vidc_set_u32}, + + {PROFILE, ENC, H264, + {0}, + {ENTROPY_MODE, TRANSFORM_8X8}, + NULL, + msm_vidc_set_u32_enum}, + + {PROFILE, DEC, H264, + {0}, + {ENTROPY_MODE}, + NULL, + msm_vidc_set_u32_enum}, + + {PROFILE, ENC|DEC, HEVC|HEIC, + {PIX_FMTS}, + {0}, + msm_vidc_adjust_profile, + msm_vidc_set_u32_enum}, + + {PROFILE, DEC, VP9|AV1, + {0}, + {0}, + NULL, + msm_vidc_set_u32_enum}, + + {LEVEL, DEC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_u32_enum}, + + {LEVEL, ENC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_level}, + + {AV1_TIER, DEC, AV1, + {0}, + {0}, + NULL, + msm_vidc_set_u32_enum}, + + {HEVC_TIER, ENC|DEC, HEVC|HEIC, + {0}, + {0}, + NULL, + msm_vidc_set_u32_enum}, + + {LF_MODE, ENC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_deblock_mode}, + + {SLICE_MODE, ENC, H264|HEVC, + {BITRATE_MODE, ALL_INTRA}, + {STAGE, DELIVERY_MODE}, + msm_vidc_adjust_slice_count, + msm_vidc_set_slice_count}, + + {SLICE_MODE, ENC, HEIC, + {0}, + {0}, + msm_vidc_adjust_slice_count, + msm_vidc_set_slice_count}, + + {TRANSFORM_8X8, ENC, H264, + {PROFILE}, + {0}, + msm_vidc_adjust_transform_8x8, + msm_vidc_set_u32}, + + {CHROMA_QP_INDEX_OFFSET, ENC, HEVC, + {0}, + {0}, + msm_vidc_adjust_chroma_qp_index_offset, + msm_vidc_set_chroma_qp_index_offset}, + + {DISPLAY_DELAY_ENABLE, DEC, H264|HEVC|VP9|AV1, + {0}, + {OUTPUT_ORDER}, + NULL, + NULL}, + + {DISPLAY_DELAY, DEC, H264|HEVC|VP9|AV1, + {0}, + {OUTPUT_ORDER}, + NULL, + NULL}, + + {OUTPUT_ORDER, DEC, H264|HEVC|VP9|AV1, + {THUMBNAIL_MODE, DISPLAY_DELAY, DISPLAY_DELAY_ENABLE}, + {META_OUTBUF_FENCE}, + msm_vidc_adjust_output_order, + msm_vidc_set_u32}, + + {INPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL, + {0}, + {0}, + msm_vidc_adjust_input_buf_host_max_count, + msm_vidc_set_u32}, + + {INPUT_BUF_HOST_MAX_COUNT, ENC, H264|HEVC, + {SUPER_FRAME}, + {0}, + msm_vidc_adjust_input_buf_host_max_count, + msm_vidc_set_u32}, + + {OUTPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL, + {0}, + {0}, + msm_vidc_adjust_output_buf_host_max_count, + msm_vidc_set_u32}, + + {OUTPUT_BUF_HOST_MAX_COUNT, ENC, H264|HEVC, + {SUPER_FRAME, DELIVERY_MODE}, + {0}, + msm_vidc_adjust_output_buf_host_max_count, + msm_vidc_set_u32}, + + {CONCEAL_COLOR_8BIT, DEC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_u32_packed}, + + {CONCEAL_COLOR_10BIT, DEC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_u32_packed}, + + {STAGE, ENC | DEC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_stage}, + + {STAGE, ENC, H264|HEVC, + {LOWLATENCY_MODE, SLICE_MODE}, + {0}, + NULL, + msm_vidc_set_stage}, + + {STAGE, DEC, H264|HEVC|VP9|AV1, + {LOWLATENCY_MODE}, + {0}, + NULL, + msm_vidc_set_stage}, + + {PIPE, DEC|ENC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_pipe}, + + {THUMBNAIL_MODE, DEC, CODECS_ALL, + {0}, + {OUTPUT_ORDER}, + NULL, + msm_vidc_set_u32}, + + {RAP_FRAME, DEC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_u32}, + + {PRIORITY, DEC|ENC, CODECS_ALL, + {0}, + {0}, + msm_vidc_adjust_session_priority, + msm_vidc_set_session_priority}, + + {FIRMWARE_PRIORITY_OFFSET, DEC | ENC, CODECS_ALL, + {0}, + {0}, + NULL, + NULL}, + + {CRITICAL_PRIORITY, ENC, CODECS_ALL, + {0}, + {0}, + NULL, + NULL}, + + {RESERVE_DURATION, ENC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_reserve_duration}, + + {DPB_LIST, DEC, CODECS_ALL, + {0}, + {0}, + NULL, + NULL}, + + {DRAP, DEC, AV1, + {0}, + {0}, + NULL, + msm_vidc_set_u32}, + + {ALL_INTRA, ENC, H264|HEVC, + {GOP_SIZE, B_FRAME}, + {LTR_COUNT, IR_PERIOD, SLICE_MODE, BIT_RATE}, + msm_vidc_adjust_all_intra, + NULL}, + + {INPUT_METADATA_FD, ENC|DEC, CODECS_ALL, + {0}, + {0}, + NULL, + NULL}, + + {INPUT_META_VIA_REQUEST, ENC|DEC, CODECS_ALL, + {0}, + {0}, + NULL, + NULL}, + + {META_EVA_STATS, ENC, CODECS_ALL, + {0}, + {ENH_LAYER_COUNT, REQUEST_PREPROCESS}}, + + {META_ROI_INFO, ENC, H264|HEVC, + {BITRATE_MODE, PIX_FMTS}, + {MIN_QUALITY, IR_PERIOD}, + msm_vidc_adjust_roi_info, + NULL}, + + {GRID, ENC, HEIC, + {0}, + {0}, + NULL, + msm_vidc_set_u32}, + + {DELIVERY_MODE, ENC, H264|HEVC, + {SLICE_MODE}, {LOWLATENCY_MODE, OUTPUT_BUF_HOST_MAX_COUNT}, + msm_vidc_adjust_delivery_mode, + msm_vidc_set_u32}, +}; + +/* Default UBWC config for LPDDR5 */ +static struct msm_vidc_ubwc_config_data ubwc_config_anorak[] = { + UBWC_CONFIG(8, 32, 16, 0, 1, 1, 1), +}; + +static const struct msm_vidc_platform_data anorak_data = { + .core_data = core_data_anorak, + .core_data_size = ARRAY_SIZE(core_data_anorak), + .inst_cap_data = instance_cap_data_anorak, + .inst_cap_data_size = ARRAY_SIZE(instance_cap_data_anorak), + .inst_cap_dependency_data = instance_cap_dependency_data_anorak, + .inst_cap_dependency_data_size = ARRAY_SIZE(instance_cap_dependency_data_anorak), + .csc_data.vpe_csc_custom_bias_coeff = vpe_csc_custom_bias_coeff, + .csc_data.vpe_csc_custom_matrix_coeff = vpe_csc_custom_matrix_coeff, + .csc_data.vpe_csc_custom_limit_coeff = vpe_csc_custom_limit_coeff, + .ubwc_config = ubwc_config_anorak, +}; + +int msm_vidc_anorak_check_ddr_type(void) +{ + u32 ddr_type; + + ddr_type = of_fdt_get_ddrtype(); + if (ddr_type != DDR_TYPE_LPDDR5 && + ddr_type != DDR_TYPE_LPDDR5X) { + d_vpr_e("%s: wrong ddr type %d\n", __func__, ddr_type); + return -EINVAL; + } else { + d_vpr_h("%s: ddr type %d\n", __func__, ddr_type); + } + return 0; +} + +static int msm_vidc_init_data(struct msm_vidc_core *core) +{ + int rc = 0; + + if (!core || !core->platform) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + d_vpr_h("%s: initialize anorak data\n", __func__); + + core->platform->data = anorak_data; + rc = msm_vidc_anorak_check_ddr_type(); + if (rc) + return rc; + + return rc; +} + +int msm_vidc_init_platform_anorak(struct msm_vidc_core *core, struct device *dev) +{ + int rc = 0; + + rc = msm_vidc_init_data(core); + if (rc) + return rc; + + return 0; +} + +int msm_vidc_deinit_platform_anorak(struct msm_vidc_core *core, struct device *dev) +{ + /* do nothing */ + return 0; +} diff --git a/driver/platform/common/src/msm_vidc_platform.c b/driver/platform/common/src/msm_vidc_platform.c index dde327a89b..57c38075b5 100644 --- a/driver/platform/common/src/msm_vidc_platform.c +++ b/driver/platform/common/src/msm_vidc_platform.c @@ -23,6 +23,9 @@ #if defined(CONFIG_MSM_VIDC_KALAMA) #include "msm_vidc_kalama.h" #endif +#if defined(CONFIG_MSM_VIDC_ANORAK) +#include "msm_vidc_anorak.h" +#endif #if defined(CONFIG_MSM_VIDC_IRIS2) #include "msm_vidc_iris2.h" #endif @@ -226,6 +229,14 @@ static int msm_vidc_deinit_platform_variant(struct msm_vidc_core *core, struct d return rc; } #endif +#if defined(CONFIG_MSM_VIDC_ANORAK) + if (of_device_is_compatible(dev->of_node, "qcom,msm-vidc-anorak")) { + rc = msm_vidc_deinit_platform_anorak(core, dev); + if (rc) + d_vpr_e("%s: failed with %d\n", __func__, rc); + return rc; + } +#endif return rc; } @@ -257,6 +268,14 @@ static int msm_vidc_init_platform_variant(struct msm_vidc_core *core, struct dev return rc; } #endif +#if defined(CONFIG_MSM_VIDC_ANORAK) + if (of_device_is_compatible(dev->of_node, "qcom,msm-vidc-anorak")) { + rc = msm_vidc_init_platform_anorak(core, dev); + if (rc) + d_vpr_e("%s: failed with %d\n", __func__, rc); + return rc; + } +#endif return rc; } From 627e5c617662ddce72a4f8fd92b9866689b8019b Mon Sep 17 00:00:00 2001 From: Zhongbo Shi Date: Mon, 4 Jul 2022 13:12:27 +0800 Subject: [PATCH 0661/1061] vidoe driver: increase decoder maximum FPS and OR Increase decoder maximum FPS and Operating Rate to 960. Change-Id: Ic3634bb0c78bc9dc27e732147bb0cc65d8ccfc4a Signed-off-by: Zhongbo Shi --- driver/platform/kalama/src/msm_vidc_kalama.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index c4dbd9d5d3..4d4d39239f 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -23,6 +23,7 @@ #define DEFAULT_BITRATE 20000000 #define MINIMUM_FPS 1 #define MAXIMUM_FPS 480 +#define MAXIMUM_DEC_FPS 960 #define MAX_QP 51 #define DEFAULT_QP 20 #define MAX_CONSTANT_QUALITY 100 @@ -253,7 +254,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { CAP_FLAG_OUTPUT_PORT}, {FRAME_RATE, DEC, CODECS_ALL, - (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), + (MINIMUM_FPS << 16), (MAXIMUM_DEC_FPS << 16), 1, (DEFAULT_FPS << 16), V4L2_CID_MPEG_VIDC_FRAME_RATE, 0, @@ -273,7 +274,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { 1, (DEFAULT_FPS << 16)}, {OPERATING_RATE, DEC, CODECS_ALL, - (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), + (MINIMUM_FPS << 16), (MAXIMUM_DEC_FPS << 16), 1, (DEFAULT_FPS << 16), V4L2_CID_MPEG_VIDC_OPERATING_RATE, 0, From 69d0c83f550464159f4bfd86c728552afe136278 Mon Sep 17 00:00:00 2001 From: Dikshita Agarwal Date: Tue, 12 Jul 2022 10:33:56 +0530 Subject: [PATCH 0662/1061] video: driver: split control code Split control code into msm_vidc_control.c and msm_vidc_control_ext.c files. Change-Id: I95f13d66f33fb75da4ebaa08e24bf31fe5de55b4 Signed-off-by: Dikshita Agarwal --- Kbuild | 1 + driver/platform/anorak/src/msm_vidc_anorak.c | 2 +- driver/platform/kalama/src/msm_vidc_kalama.c | 2 +- driver/platform/waipio/src/msm_vidc_waipio.c | 2 +- driver/vidc/inc/msm_vidc_control.h | 14 +- driver/vidc/inc/msm_vidc_control_ext.h | 19 ++ driver/vidc/src/msm_vidc_control.c | 199 +----------------- driver/vidc/src/msm_vidc_control_ext.c | 206 +++++++++++++++++++ 8 files changed, 241 insertions(+), 204 deletions(-) create mode 100644 driver/vidc/inc/msm_vidc_control_ext.h create mode 100644 driver/vidc/src/msm_vidc_control_ext.c diff --git a/Kbuild b/Kbuild index 735455db86..549e0411b4 100644 --- a/Kbuild +++ b/Kbuild @@ -62,6 +62,7 @@ msm_video-objs += driver/vidc/src/msm_vidc_v4l2.o \ driver/vidc/src/msm_venc.o \ driver/vidc/src/msm_vidc_driver.o \ driver/vidc/src/msm_vidc_control.o \ + driver/vidc/src/msm_vidc_control_ext.o \ driver/vidc/src/msm_vidc_buffer.o \ driver/vidc/src/msm_vidc_power.o \ driver/vidc/src/msm_vidc_probe.o \ diff --git a/driver/platform/anorak/src/msm_vidc_anorak.c b/driver/platform/anorak/src/msm_vidc_anorak.c index dc44d373ed..f0065c9e7f 100644 --- a/driver/platform/anorak/src/msm_vidc_anorak.c +++ b/driver/platform/anorak/src/msm_vidc_anorak.c @@ -10,7 +10,7 @@ #include "msm_vidc_platform.h" #include "msm_vidc_debug.h" #include "msm_vidc_internal.h" -#include "msm_vidc_control.h" +#include "msm_vidc_control_ext.h" #include "hfi_property.h" #include "msm_vidc_iris3.h" #include "hfi_command.h" diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index 4d4d39239f..e39c9ac657 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -10,7 +10,7 @@ #include "msm_vidc_platform.h" #include "msm_vidc_debug.h" #include "msm_vidc_internal.h" -#include "msm_vidc_control.h" +#include "msm_vidc_control_ext.h" #include "hfi_property.h" #include "msm_vidc_iris3.h" #include "hfi_command.h" diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 75a0f89e14..5faed41fd1 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -10,7 +10,7 @@ #include "msm_vidc_platform.h" #include "msm_vidc_debug.h" #include "msm_vidc_internal.h" -#include "msm_vidc_control.h" +#include "msm_vidc_control_ext.h" #include "hfi_property.h" #include "hfi_command.h" diff --git a/driver/vidc/inc/msm_vidc_control.h b/driver/vidc/inc/msm_vidc_control.h index 92d14e7c8b..100bffc0d1 100644 --- a/driver/vidc/inc/msm_vidc_control.h +++ b/driver/vidc/inc/msm_vidc_control.h @@ -23,7 +23,6 @@ int msm_vidc_adjust_profile(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_ltr_count(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_use_ltr(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_mark_ltr(void *instance, struct v4l2_ctrl *ctrl); -int msm_vidc_adjust_ir_period(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_delta_based_rc(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_output_order(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_input_buf_host_max_count(void *instance, struct v4l2_ctrl *ctrl); @@ -53,11 +52,8 @@ int msm_vidc_prepare_dependency_list(struct msm_vidc_inst *inst); int msm_vidc_adjust_session_priority(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_roi_info(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_all_intra(void *instance, struct v4l2_ctrl *ctrl); -int msm_vidc_adjust_dec_frame_rate(void *instance, struct v4l2_ctrl *ctrl); -int msm_vidc_adjust_dec_operating_rate(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_dec_outbuf_fence(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_preprocess(void *instance, struct v4l2_ctrl *ctrl); -int msm_vidc_adjust_delivery_mode(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_set_header_mode(void *instance, enum msm_vidc_inst_capability_type cap_id); @@ -113,8 +109,6 @@ int msm_vidc_set_pipe(void *instance, enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_csc_custom_matrix(void *instance, enum msm_vidc_inst_capability_type cap_id); -int msm_vidc_set_ir_period(void *instance, - enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_level(void *instance, enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_preprocess(void *instance, @@ -127,6 +121,14 @@ int msm_vidc_set_q16(void *instance, enum msm_vidc_inst_capability_type cap_id); int msm_vidc_v4l2_menu_to_hfi(struct msm_vidc_inst *inst, enum msm_vidc_inst_capability_type cap_id, u32 *value); +int msm_vidc_packetize_control(struct msm_vidc_inst *inst, + enum msm_vidc_inst_capability_type cap_id, u32 payload_type, + void *hfi_val, u32 payload_size, const char *func); +bool is_parent_available(struct msm_vidc_inst *inst, + u32 cap_id, u32 check_parent, const char *func); +bool is_valid_cap_id(enum msm_vidc_inst_capability_type cap_id); +enum msm_vidc_inst_capability_type msm_vidc_get_cap_id( + struct msm_vidc_inst *inst, u32 id); int msm_vidc_v4l2_to_hfi_enum(struct msm_vidc_inst *inst, enum msm_vidc_inst_capability_type cap_id, u32 *value); int msm_vidc_update_cap_value(struct msm_vidc_inst *inst, u32 cap, diff --git a/driver/vidc/inc/msm_vidc_control_ext.h b/driver/vidc/inc/msm_vidc_control_ext.h new file mode 100644 index 0000000000..21eda3d256 --- /dev/null +++ b/driver/vidc/inc/msm_vidc_control_ext.h @@ -0,0 +1,19 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) 2022. Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#ifndef _MSM_VIDC_CONTROL_EXT_H_ +#define _MSM_VIDC_CONTROL_EXT_H_ + +#include "msm_vidc_control.h" + +int msm_vidc_adjust_ir_period(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_dec_frame_rate(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_dec_operating_rate(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_delivery_mode(void *instance, struct v4l2_ctrl *ctrl); + +int msm_vidc_set_ir_period(void *instance, + enum msm_vidc_inst_capability_type cap_id); + +#endif diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 52099e2dce..09c7a1d0fa 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -227,7 +227,7 @@ static inline bool is_root(struct msm_vidc_inst_cap *cap) return !has_parents(cap); } -static inline bool is_valid_cap_id(enum msm_vidc_inst_capability_type cap_id) +bool is_valid_cap_id(enum msm_vidc_inst_capability_type cap_id) { return cap_id > INST_CAP_NONE && cap_id < INST_CAP_MAX; } @@ -326,7 +326,7 @@ static int swap_node(struct msm_vidc_inst_cap *rcap, return 0; } -static int msm_vidc_packetize_control(struct msm_vidc_inst *inst, +int msm_vidc_packetize_control(struct msm_vidc_inst *inst, enum msm_vidc_inst_capability_type cap_id, u32 payload_type, void *hfi_val, u32 payload_size, const char *func) { @@ -365,7 +365,7 @@ static int msm_vidc_packetize_control(struct msm_vidc_inst *inst, return 0; } -static enum msm_vidc_inst_capability_type msm_vidc_get_cap_id( +enum msm_vidc_inst_capability_type msm_vidc_get_cap_id( struct msm_vidc_inst *inst, u32 id) { enum msm_vidc_inst_capability_type i = INST_CAP_NONE + 1; @@ -430,7 +430,7 @@ static int msm_vidc_add_children(struct msm_vidc_inst *inst, return rc; } -static bool is_parent_available(struct msm_vidc_inst *inst, +bool is_parent_available(struct msm_vidc_inst *inst, u32 cap_id, u32 check_parent, const char *func) { int i = 0; @@ -1483,72 +1483,6 @@ int msm_vidc_adjust_mark_ltr(void *instance, struct v4l2_ctrl *ctrl) return 0; } -int msm_vidc_adjust_ir_period(void *instance, struct v4l2_ctrl *ctrl) -{ - struct msm_vidc_inst_capability *capability; - s32 adjusted_value, all_intra = 0, roi_enable = 0, - pix_fmts = MSM_VIDC_FMT_NONE; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - - if (!inst || !inst->capabilities) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - capability = inst->capabilities; - - adjusted_value = ctrl ? ctrl->val : capability->cap[IR_PERIOD].value; - - if (msm_vidc_get_parent_value(inst, IR_PERIOD, ALL_INTRA, - &all_intra, __func__) || - msm_vidc_get_parent_value(inst, IR_PERIOD, META_ROI_INFO, - &roi_enable, __func__)) - return -EINVAL; - - if (all_intra) { - adjusted_value = 0; - i_vpr_h(inst, "%s: intra refresh unsupported, all intra: %d\n", - __func__, all_intra); - goto exit; - } - - if (roi_enable) { - i_vpr_h(inst, - "%s: intra refresh unsupported with roi metadata\n", - __func__); - adjusted_value = 0; - goto exit; - } - - if (inst->codec == MSM_VIDC_HEVC) { - if (msm_vidc_get_parent_value(inst, IR_PERIOD, - PIX_FMTS, &pix_fmts, __func__)) - return -EINVAL; - - if (is_10bit_colorformat(pix_fmts)) { - i_vpr_h(inst, - "%s: intra refresh is supported only for 8 bit\n", - __func__); - adjusted_value = 0; - goto exit; - } - } - - /* - * BITRATE_MODE dependency is NOT common across all chipsets. - * Hence, do not return error if not specified as one of the parent. - */ - if (is_parent_available(inst, IR_PERIOD, BITRATE_MODE, __func__) && - inst->hfi_rc_type != HFI_RC_CBR_CFR && - inst->hfi_rc_type != HFI_RC_CBR_VFR) - adjusted_value = 0; - -exit: - msm_vidc_update_cap_value(inst, IR_PERIOD, - adjusted_value, __func__); - - return 0; -} - int msm_vidc_adjust_delta_based_rc(void *instance, struct v4l2_ctrl *ctrl) { struct msm_vidc_inst_capability *capability; @@ -2943,52 +2877,6 @@ int msm_vidc_adjust_roi_info(void *instance, struct v4l2_ctrl *ctrl) return 0; } -int msm_vidc_adjust_dec_frame_rate(void *instance, struct v4l2_ctrl *ctrl) -{ - struct msm_vidc_inst_capability *capability; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - u32 adjusted_value = 0; - - if (!inst || !inst->capabilities) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - if (is_encode_session(inst)) { - d_vpr_e("%s: adjust framerate invalid for enc\n", __func__); - return -EINVAL; - } - - capability = inst->capabilities; - adjusted_value = ctrl ? ctrl->val : capability->cap[FRAME_RATE].value; - msm_vidc_update_cap_value(inst, FRAME_RATE, adjusted_value, __func__); - - return 0; -} - -int msm_vidc_adjust_dec_operating_rate(void *instance, struct v4l2_ctrl *ctrl) -{ - struct msm_vidc_inst_capability *capability; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - u32 adjusted_value = 0; - - if (!inst || !inst->capabilities) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - if (is_encode_session(inst)) { - d_vpr_e("%s: adjust operating rate invalid for enc\n", __func__); - return -EINVAL; - } - - capability = inst->capabilities; - adjusted_value = ctrl ? ctrl->val : capability->cap[OPERATING_RATE].value; - msm_vidc_update_cap_value(inst, OPERATING_RATE, adjusted_value, __func__); - - return 0; -} - int msm_vidc_adjust_dec_outbuf_fence(void *instance, struct v4l2_ctrl *ctrl) { struct msm_vidc_inst_capability *capability; @@ -3020,43 +2908,6 @@ int msm_vidc_adjust_dec_outbuf_fence(void *instance, struct v4l2_ctrl *ctrl) return 0; } -int msm_vidc_adjust_delivery_mode(void *instance, struct v4l2_ctrl *ctrl) -{ - struct msm_vidc_inst_capability *capability; - s32 adjusted_value; - s32 slice_mode = -1; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - - if (!inst || !inst->capabilities) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - if (is_decode_session(inst)) - return 0; - - capability = inst->capabilities; - - adjusted_value = ctrl ? ctrl->val : capability->cap[DELIVERY_MODE].value; - - if (msm_vidc_get_parent_value(inst, DELIVERY_MODE, SLICE_MODE, - &slice_mode, __func__)) - return -EINVAL; - - /* Slice encode delivery mode is only supported for Max MB slice mode */ - if (slice_mode != V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_MB) { - if (inst->codec == MSM_VIDC_HEVC) - adjusted_value = V4L2_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE_FRAME_BASED; - else if (inst->codec == MSM_VIDC_H264) - adjusted_value = V4L2_MPEG_VIDC_H264_ENCODE_DELIVERY_MODE_FRAME_BASED; - } - - msm_vidc_update_cap_value(inst, DELIVERY_MODE, - adjusted_value, __func__); - - return 0; -} - int msm_vidc_prepare_dependency_list(struct msm_vidc_inst *inst) { struct list_head root_list, opt_list; @@ -4311,48 +4162,6 @@ int msm_vidc_set_level(void *instance, return rc; } -int msm_vidc_set_ir_period(void *instance, - enum msm_vidc_inst_capability_type cap_id) -{ - int rc = 0; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; - u32 ir_type = 0; - struct msm_vidc_core *core; - - if (!inst || !inst->capabilities) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - core = inst->core; - - if (inst->capabilities->cap[IR_TYPE].value == - V4L2_MPEG_VIDEO_VIDC_INTRA_REFRESH_RANDOM) { - if (inst->bufq[OUTPUT_PORT].vb2q->streaming) { - i_vpr_h(inst, "%s: dynamic random intra refresh not allowed\n", - __func__); - return 0; - } - ir_type = HFI_PROP_IR_RANDOM_PERIOD; - } else if (inst->capabilities->cap[IR_TYPE].value == - V4L2_MPEG_VIDEO_VIDC_INTRA_REFRESH_CYCLIC) { - ir_type = HFI_PROP_IR_CYCLIC_PERIOD; - } else { - i_vpr_e(inst, "%s: invalid ir_type %d\n", - __func__, inst->capabilities->cap[IR_TYPE]); - return -EINVAL; - } - - rc = venus_hfi_set_ir_period(inst, ir_type, cap_id); - if (rc) { - i_vpr_e(inst, "%s: failed to set ir period %d\n", - __func__, inst->capabilities->cap[IR_PERIOD].value); - return rc; - } - - return rc; -} - int msm_vidc_set_q16(void *instance, enum msm_vidc_inst_capability_type cap_id) { diff --git a/driver/vidc/src/msm_vidc_control_ext.c b/driver/vidc/src/msm_vidc_control_ext.c new file mode 100644 index 0000000000..45255a5e45 --- /dev/null +++ b/driver/vidc/src/msm_vidc_control_ext.c @@ -0,0 +1,206 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2022. Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include "msm_vidc_control_ext.h" +#include "msm_vidc_debug.h" +#include "hfi_packet.h" +#include "hfi_property.h" +#include "venus_hfi.h" +#include "msm_vidc_internal.h" +#include "msm_vidc_driver.h" +#include "msm_venc.h" +#include "msm_vidc_platform.h" + +int msm_vidc_adjust_ir_period(void *instance, struct v4l2_ctrl *ctrl) +{ + struct msm_vidc_inst_capability *capability; + s32 adjusted_value, all_intra = 0, roi_enable = 0, + pix_fmts = MSM_VIDC_FMT_NONE; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + adjusted_value = ctrl ? ctrl->val : capability->cap[IR_PERIOD].value; + + if (msm_vidc_get_parent_value(inst, IR_PERIOD, ALL_INTRA, + &all_intra, __func__) || + msm_vidc_get_parent_value(inst, IR_PERIOD, META_ROI_INFO, + &roi_enable, __func__)) + return -EINVAL; + + if (all_intra) { + adjusted_value = 0; + i_vpr_h(inst, "%s: intra refresh unsupported, all intra: %d\n", + __func__, all_intra); + goto exit; + } + + if (roi_enable) { + i_vpr_h(inst, + "%s: intra refresh unsupported with roi metadata\n", + __func__); + adjusted_value = 0; + goto exit; + } + + if (inst->codec == MSM_VIDC_HEVC) { + if (msm_vidc_get_parent_value(inst, IR_PERIOD, + PIX_FMTS, &pix_fmts, __func__)) + return -EINVAL; + + if (is_10bit_colorformat(pix_fmts)) { + i_vpr_h(inst, + "%s: intra refresh is supported only for 8 bit\n", + __func__); + adjusted_value = 0; + goto exit; + } + } + + /* + * BITRATE_MODE dependency is NOT common across all chipsets. + * Hence, do not return error if not specified as one of the parent. + */ + if (is_parent_available(inst, IR_PERIOD, BITRATE_MODE, __func__) && + inst->hfi_rc_type != HFI_RC_CBR_CFR && + inst->hfi_rc_type != HFI_RC_CBR_VFR) + adjusted_value = 0; + +exit: + msm_vidc_update_cap_value(inst, IR_PERIOD, + adjusted_value, __func__); + + return 0; +} + +int msm_vidc_adjust_dec_frame_rate(void *instance, struct v4l2_ctrl *ctrl) +{ + struct msm_vidc_inst_capability *capability; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + u32 adjusted_value = 0; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (is_encode_session(inst)) { + d_vpr_e("%s: adjust framerate invalid for enc\n", __func__); + return -EINVAL; + } + + capability = inst->capabilities; + adjusted_value = ctrl ? ctrl->val : capability->cap[FRAME_RATE].value; + msm_vidc_update_cap_value(inst, FRAME_RATE, adjusted_value, __func__); + + return 0; +} + +int msm_vidc_adjust_dec_operating_rate(void *instance, struct v4l2_ctrl *ctrl) +{ + struct msm_vidc_inst_capability *capability; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + u32 adjusted_value = 0; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (is_encode_session(inst)) { + d_vpr_e("%s: adjust operating rate invalid for enc\n", __func__); + return -EINVAL; + } + + capability = inst->capabilities; + adjusted_value = ctrl ? ctrl->val : capability->cap[OPERATING_RATE].value; + msm_vidc_update_cap_value(inst, OPERATING_RATE, adjusted_value, __func__); + + return 0; +} + +int msm_vidc_adjust_delivery_mode(void *instance, struct v4l2_ctrl *ctrl) +{ + struct msm_vidc_inst_capability *capability; + s32 adjusted_value; + s32 slice_mode = -1; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (is_decode_session(inst)) + return 0; + + capability = inst->capabilities; + + adjusted_value = ctrl ? ctrl->val : capability->cap[DELIVERY_MODE].value; + + if (msm_vidc_get_parent_value(inst, DELIVERY_MODE, SLICE_MODE, + &slice_mode, __func__)) + return -EINVAL; + + /* Slice encode delivery mode is only supported for Max MB slice mode */ + if (slice_mode != V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_MB) { + if (inst->codec == MSM_VIDC_HEVC) + adjusted_value = V4L2_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE_FRAME_BASED; + else if (inst->codec == MSM_VIDC_H264) + adjusted_value = V4L2_MPEG_VIDC_H264_ENCODE_DELIVERY_MODE_FRAME_BASED; + } + + msm_vidc_update_cap_value(inst, DELIVERY_MODE, + adjusted_value, __func__); + + return 0; +} + +int msm_vidc_set_ir_period(void *instance, + enum msm_vidc_inst_capability_type cap_id) +{ + int rc = 0; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; + u32 ir_type = 0; + struct msm_vidc_core *core; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + core = inst->core; + + if (inst->capabilities->cap[IR_TYPE].value == + V4L2_MPEG_VIDEO_VIDC_INTRA_REFRESH_RANDOM) { + if (inst->bufq[OUTPUT_PORT].vb2q->streaming) { + i_vpr_h(inst, "%s: dynamic random intra refresh not allowed\n", + __func__); + return 0; + } + ir_type = HFI_PROP_IR_RANDOM_PERIOD; + } else if (inst->capabilities->cap[IR_TYPE].value == + V4L2_MPEG_VIDEO_VIDC_INTRA_REFRESH_CYCLIC) { + ir_type = HFI_PROP_IR_CYCLIC_PERIOD; + } else { + i_vpr_e(inst, "%s: invalid ir_type %d\n", + __func__, inst->capabilities->cap[IR_TYPE]); + return -EINVAL; + } + + rc = venus_hfi_set_ir_period(inst, ir_type, cap_id); + if (rc) { + i_vpr_e(inst, "%s: failed to set ir period %d\n", + __func__, inst->capabilities->cap[IR_PERIOD].value); + return rc; + } + + return rc; +} + From b3fa32cf81082e9a1286dba960c2d5cdfe1e2b10 Mon Sep 17 00:00:00 2001 From: Dikshita Agarwal Date: Tue, 28 Jun 2022 16:15:44 +0530 Subject: [PATCH 0663/1061] video: driver: prepare upstream caps database - Remove caps related to private controls. - Update parent, child dependencies for caps if not standard. - Keep the caps which doesn't have v4l2 control associated and are used internally for some features. - keep non-standard but good to have features by removing the v4l2 control associated. Change-Id: I31326c94edf3ef864f30765f44852b11c5eaf6ac Signed-off-by: Dikshita Agarwal --- driver/platform/kalama/src/kalama.c | 1864 ++++++++++++++++++ driver/platform/kalama/src/msm_vidc_kalama.c | 4 +- 2 files changed, 1866 insertions(+), 2 deletions(-) create mode 100644 driver/platform/kalama/src/kalama.c diff --git a/driver/platform/kalama/src/kalama.c b/driver/platform/kalama/src/kalama.c new file mode 100644 index 0000000000..90c1db98b1 --- /dev/null +++ b/driver/platform/kalama/src/kalama.c @@ -0,0 +1,1864 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include + +#include "msm_vidc_control.h" +#include "msm_vidc_kalama.h" +#include "msm_vidc_platform.h" +#include "msm_vidc_debug.h" +#include "msm_vidc_internal.h" +#include "hfi_property.h" +#include "msm_vidc_iris3.h" +#include "hfi_command.h" + +#define DEFAULT_VIDEO_CONCEAL_COLOR_BLACK 0x8020010 +#define MAX_LTR_FRAME_COUNT 2 +#define MAX_BASE_LAYER_PRIORITY_ID 63 +#define MAX_OP_POINT 31 +#define MAX_BITRATE 245000000 +#define DEFAULT_BITRATE 20000000 +#define MINIMUM_FPS 1 +#define MAXIMUM_FPS 480 +#define MAX_QP 51 +#define DEFAULT_QP 20 +#define MAX_CONSTANT_QUALITY 100 +#define MIN_SLICE_BYTE_SIZE 512 +#define MAX_SLICE_BYTE_SIZE \ + ((MAX_BITRATE) >> 3) +#define MAX_SLICE_MB_SIZE \ + (((4096 + 15) >> 4) * ((2304 + 15) >> 4)) + +#define ENC MSM_VIDC_ENCODER +#define DEC MSM_VIDC_DECODER +#define H264 MSM_VIDC_H264 +#define HEVC MSM_VIDC_HEVC +#define VP9 MSM_VIDC_VP9 +#define AV1 MSM_VIDC_AV1 +#define HEIC MSM_VIDC_HEIC +#define CODECS_ALL (H264 | HEVC | VP9 | HEIC | AV1) +#define MAXIMUM_OVERRIDE_VP9_FPS 180 + +static struct msm_platform_core_capability core_data_kalama[] = { + /* {type, value} */ + {ENC_CODECS, H264|HEVC|HEIC}, + {DEC_CODECS, H264|HEVC|VP9|AV1|HEIC}, + {MAX_SESSION_COUNT, 16}, + {MAX_NUM_720P_SESSIONS, 16}, + {MAX_NUM_1080P_SESSIONS, 16}, + {MAX_NUM_4K_SESSIONS, 8}, + {MAX_NUM_8K_SESSIONS, 2}, + {MAX_RT_MBPF, 174080}, /* (8192x4352)/256 + (4096x2176)/256*/ + {MAX_MBPF, 278528}, /* ((8192x4352)/256) * 2 */ + {MAX_MBPS, 7833600}, /* max_load + * 7680x4320@60fps or 3840x2176@240fps + * which is greater than 4096x2176@120fps, + * 8192x4320@48fps + */ + {MAX_MBPF_HQ, 8160}, /* ((1920x1088)/256) */ + {MAX_MBPS_HQ, 489600}, /* ((1920x1088)/256)@60fps */ + {MAX_MBPF_B_FRAME, 32640}, /* 3840x2176/256 */ + {MAX_MBPS_B_FRAME, 1958400}, /* 3840x2176/256 MBs@60fps */ + {MAX_MBPS_ALL_INTRA, 2088960}, /* 4096x2176/256 MBs@60fps */ + {MAX_ENH_LAYER_COUNT, 5}, + {NUM_VPP_PIPE, 4}, + {SW_PC, 1}, + {FW_UNLOAD, 0}, + {HW_RESPONSE_TIMEOUT, HW_RESPONSE_TIMEOUT_VALUE}, /* 1000 ms */ + {SW_PC_DELAY, SW_PC_DELAY_VALUE }, /* 1500 ms (>HW_RESPONSE_TIMEOUT)*/ + {FW_UNLOAD_DELAY, FW_UNLOAD_DELAY_VALUE }, /* 3000 ms (>SW_PC_DELAY)*/ + {DCVS, 1}, + {DECODE_BATCH, 1}, + {DECODE_BATCH_TIMEOUT, 200}, + {STATS_TIMEOUT_MS, 2000}, + {NON_FATAL_FAULTS, 1}, + {ENC_AUTO_FRAMERATE, 1}, +}; + +static struct msm_platform_inst_capability instance_cap_data_kalama[] = { + /* {cap, domain, codec, + * min, max, step_or_mask, value, + * v4l2_id, + * hfi_id, + * flags} + */ + + {FRAME_WIDTH, DEC, CODECS_ALL, 96, 8192, 1, 1920}, + + {FRAME_WIDTH, DEC, VP9, 96, 4096, 1, 1920}, + + {FRAME_WIDTH, ENC, CODECS_ALL, 128, 8192, 1, 1920}, + + {FRAME_WIDTH, ENC, HEVC, 96, 8192, 1, 1920}, + + {FRAME_WIDTH, ENC, HEIC, 128, 16384, 1, 16384}, + + {LOSSLESS_FRAME_WIDTH, ENC, CODECS_ALL, 128, 4096, 1, 1920}, + + {LOSSLESS_FRAME_WIDTH, ENC, HEVC, 96, 4096, 1, 1920}, + + {FRAME_HEIGHT, DEC, CODECS_ALL, 96, 8192, 1, 1080}, + + {FRAME_HEIGHT, DEC, VP9, 96, 4096, 1, 1080}, + + {FRAME_HEIGHT, ENC, CODECS_ALL, 128, 8192, 1, 1080}, + + {FRAME_HEIGHT, ENC, HEVC, 96, 8192, 1, 1080}, + + {FRAME_HEIGHT, ENC, HEIC, 128, 16384, 1, 16384}, + + {LOSSLESS_FRAME_HEIGHT, ENC, CODECS_ALL, 128, 4096, 1, 1080}, + + {LOSSLESS_FRAME_HEIGHT, ENC, HEVC, 96, 4096, 1, 1080}, + + {PIX_FMTS, ENC|DEC, H264, + MSM_VIDC_FMT_NV12, + MSM_VIDC_FMT_NV12C, + MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C, + MSM_VIDC_FMT_NV12C}, + + {PIX_FMTS, ENC|DEC, HEVC|VP9|AV1, + MSM_VIDC_FMT_NV12, + MSM_VIDC_FMT_TP10C, + MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C | + MSM_VIDC_FMT_P010 | MSM_VIDC_FMT_TP10C, + MSM_VIDC_FMT_NV12C}, + + {PIX_FMTS, ENC, HEIC, + MSM_VIDC_FMT_NV12, + MSM_VIDC_FMT_P010, + MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_P010, + MSM_VIDC_FMT_NV12}, + + {PIX_FMTS, DEC, HEIC, + MSM_VIDC_FMT_NV12, + MSM_VIDC_FMT_TP10C, + MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C | + MSM_VIDC_FMT_P010 | MSM_VIDC_FMT_TP10C, + MSM_VIDC_FMT_NV12C}, + + {MIN_BUFFERS_INPUT, ENC|DEC, CODECS_ALL, 0, 64, 1, 4, + V4L2_CID_MIN_BUFFERS_FOR_OUTPUT}, + + {MIN_BUFFERS_INPUT, ENC|DEC, HEIC, 0, 64, 1, 1, + V4L2_CID_MIN_BUFFERS_FOR_OUTPUT}, + + {MIN_BUFFERS_OUTPUT, ENC|DEC, CODECS_ALL, + 0, 64, 1, 4, + V4L2_CID_MIN_BUFFERS_FOR_CAPTURE, + HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT, + CAP_FLAG_OUTPUT_PORT}, + + /* (8192 * 4320) / 256 */ + {MBPF, ENC, CODECS_ALL, 64, 138240, 1, 138240}, + + {MBPF, ENC, HEVC, 36, 138240, 1, 138240}, + + /* ((16384x16384)/256) */ + {MBPF, ENC, HEIC, 36, 1048576, 1, 1048576}, + + {MBPF, DEC, CODECS_ALL, 36, 138240, 1, 138240}, + + /* (4096 * 2304) / 256 */ + {MBPF, DEC, VP9, 36, 36864, 1, 36864}, + + /* ((8192x8192)/256) */ + {MBPF, DEC, HEIC, 64, 262144, 1, 262144 }, + + /* (4096 * 2304) / 256 */ + {LOSSLESS_MBPF, ENC, H264|HEVC, 64, 36864, 1, 36864}, + + /* Batch Mode Decode */ + /* TODO: update with new values based on updated voltage corner */ + {BATCH_MBPF, DEC, H264|HEVC|VP9|AV1, 64, 34816, 1, 34816}, + + /* (4096 * 2304) / 256 */ + {BATCH_FPS, DEC, H264|HEVC|VP9|AV1, 1, 120, 1, 120}, + + /* ((1920 * 1088) / 256) * 480 fps */ + {MBPS, ENC, CODECS_ALL, 64, 3916800, 1, 3916800}, + + {MBPS, ENC, HEVC, 36, 3916800, 1, 3916800}, + + /* ((16384x16384)/256)@1fps */ + {MBPS, ENC, HEIC, 36, 1048576, 1, 1048576}, + + /* ((1920 * 1088) / 256) * 960 fps */ + {MBPS, DEC, CODECS_ALL, 64, 7833600, 1, 7833600}, + + /* ((4096 * 2304) / 256) * 120 */ + {MBPS, DEC, VP9, 36, 4423680, 1, 4423680}, + + /* ((8192x8192)/256)@1fps */ + {MBPS, DEC, HEIC, 64, 262144, 1, 262144 }, + + /* Enable check mbps for encoder */ + {CHECK_MBPS, ENC, CODECS_ALL, 0, 1, 1, 1}, + + /* Disable check mbps for encoder */ + {CHECK_MBPS, DEC, CODECS_ALL, 0, 1, 1, 0}, + + {FRAME_RATE, ENC, CODECS_ALL, + (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), + 1, (DEFAULT_FPS << 16), + 0, + HFI_PROP_FRAME_RATE, + CAP_FLAG_OUTPUT_PORT}, + + {FRAME_RATE, ENC, HEIC, + (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), + 1, (MINIMUM_FPS << 16), + 0, + HFI_PROP_FRAME_RATE, + CAP_FLAG_OUTPUT_PORT}, + + {OPERATING_RATE, ENC, CODECS_ALL, + (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), + 1, (DEFAULT_FPS << 16)}, + + {INPUT_RATE, ENC|DEC, CODECS_ALL, + (MINIMUM_FPS << 16), INT_MAX, + 1, (DEFAULT_FPS << 16)}, + + {TIMESTAMP_RATE, ENC|DEC, CODECS_ALL, + (MINIMUM_FPS << 16), INT_MAX, + 1, (DEFAULT_FPS << 16)}, + + {SCALE_FACTOR, ENC, H264|HEVC, 1, 8, 1, 8}, + + {MB_CYCLES_VSP, ENC, CODECS_ALL, 25, 25, 1, 25}, + + {MB_CYCLES_VSP, DEC, CODECS_ALL, 25, 25, 1, 25}, + + {MB_CYCLES_VSP, DEC, VP9|AV1, 60, 60, 1, 60}, + + {MB_CYCLES_VPP, ENC, CODECS_ALL, 675, 675, 1, 675}, + + {MB_CYCLES_VPP, DEC, CODECS_ALL, 200, 200, 1, 200}, + + {MB_CYCLES_LP, ENC, CODECS_ALL, 320, 320, 1, 320}, + + {MB_CYCLES_LP, DEC, CODECS_ALL, 200, 200, 1, 200}, + + {MB_CYCLES_FW, ENC|DEC, CODECS_ALL, 489583, 489583, 1, 489583}, + + {MB_CYCLES_FW_VPP, ENC, CODECS_ALL, 48405, 48405, 1, 48405}, + + {MB_CYCLES_FW_VPP, DEC, CODECS_ALL, 66234, 66234, 1, 66234}, + + {CLIENT_ID, ENC|DEC, CODECS_ALL, + INVALID_CLIENT_ID, INT_MAX, 1, INVALID_CLIENT_ID, + 0}, + + {HFLIP, ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_HFLIP, + HFI_PROP_FLIP, + CAP_FLAG_OUTPUT_PORT | + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {VFLIP, ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_VFLIP, + HFI_PROP_FLIP, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {ROTATION, ENC, CODECS_ALL, + 0, 270, 90, 0, + V4L2_CID_ROTATE, + HFI_PROP_ROTATION, + CAP_FLAG_OUTPUT_PORT}, + + {SUPER_FRAME, ENC, H264|HEVC, + 0, 32, 1, 0, + 0, 0, + CAP_FLAG_NONE}, + + {SLICE_INTERFACE, DEC, CODECS_ALL, + 0, 0, 0, 0, + V4L2_CID_MPEG_VIDEO_DECODER_SLICE_INTERFACE, + 0}, + + {HEADER_MODE, ENC, CODECS_ALL, + V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE, + V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME, + BIT(V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE) | + BIT(V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME), + V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE, + V4L2_CID_MPEG_VIDEO_HEADER_MODE, + HFI_PROP_SEQ_HEADER_MODE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {PREPEND_SPSPPS_TO_IDR, ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDEO_PREPEND_SPSPPS_TO_IDR}, + + {WITHOUT_STARTCODE, ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE, + HFI_PROP_NAL_LENGTH_FIELD, + CAP_FLAG_OUTPUT_PORT}, + + {WITHOUT_STARTCODE, DEC, AV1, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_DISABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE, + HFI_PROP_NAL_LENGTH_FIELD, + CAP_FLAG_INPUT_PORT}, + + {NAL_LENGTH_FIELD, ENC, CODECS_ALL, + V4L2_MPEG_VIDEO_HEVC_SIZE_0, + V4L2_MPEG_VIDEO_HEVC_SIZE_4, + BIT(V4L2_MPEG_VIDEO_HEVC_SIZE_0) | + BIT(V4L2_MPEG_VIDEO_HEVC_SIZE_4), + V4L2_MPEG_VIDEO_HEVC_SIZE_0, + V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD, + HFI_PROP_NAL_LENGTH_FIELD, + CAP_FLAG_MENU | CAP_FLAG_OUTPUT_PORT}, + + /* TODO: Firmware introduced enumeration type for this + * with and without seq header. + */ + {REQUEST_I_FRAME, ENC, H264|HEVC, + 0, 0, 0, 0, + V4L2_CID_MPEG_VIDEO_FORCE_KEY_FRAME, + HFI_PROP_REQUEST_SYNC_FRAME, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + /* Enc: Keeping CABAC and CAVLC as same bitrate. + * Dec: there's no use of Bitrate cap + */ + {BIT_RATE, ENC, H264|HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_BITRATE, + HFI_PROP_TOTAL_BITRATE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {BITRATE_MODE, ENC, H264, + V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, + V4L2_MPEG_VIDEO_BITRATE_MODE_CBR, + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_VBR) | + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CBR), + V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, + V4L2_CID_MPEG_VIDEO_BITRATE_MODE, + HFI_PROP_RATE_CONTROL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {BITRATE_MODE, ENC, HEVC, + V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, + V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_VBR) | + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CBR) | + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CQ), + V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, + V4L2_CID_MPEG_VIDEO_BITRATE_MODE, + HFI_PROP_RATE_CONTROL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {BITRATE_MODE, ENC, HEIC, + V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, + V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CQ), + V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, + V4L2_CID_MPEG_VIDEO_BITRATE_MODE, + HFI_PROP_RATE_CONTROL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {CABAC_MAX_BITRATE, ENC, H264|HEVC, 0, + 160000000, 1, 160000000}, + + {CAVLC_MAX_BITRATE, ENC, H264, 0, + 220000000, 1, 220000000}, + + {ALLINTRA_MAX_BITRATE, ENC, H264|HEVC, 0, + 245000000, 1, 245000000}, + + {LOWLATENCY_MAX_BITRATE, ENC, H264|HEVC, 0, + 70000000, 1, 70000000}, + + {LOSSLESS, ENC, HEVC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU}, + + {FRAME_SKIP_MODE, ENC, H264|HEVC|HEIC, + V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED, + V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT, + BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED) | + BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_LEVEL_LIMIT) | + BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT), + V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED, + V4L2_CID_MPEG_VIDEO_FRAME_SKIP_MODE, + 0, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {FRAME_RC_ENABLE, ENC, H264|HEVC|HEIC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_ENABLE, + V4L2_CID_MPEG_VIDEO_FRAME_RC_ENABLE}, + + {CONSTANT_QUALITY, ENC, HEVC, + 1, MAX_CONSTANT_QUALITY, 1, 90, + V4L2_CID_MPEG_VIDEO_CONSTANT_QUALITY, + HFI_PROP_CONSTANT_QUALITY, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {CONSTANT_QUALITY, ENC, HEIC, + 1, MAX_CONSTANT_QUALITY, 1, 100, + V4L2_CID_MPEG_VIDEO_CONSTANT_QUALITY, + HFI_PROP_CONSTANT_QUALITY, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {GOP_SIZE, ENC, CODECS_ALL, + 0, INT_MAX, 1, 2 * DEFAULT_FPS - 1, + V4L2_CID_MPEG_VIDEO_GOP_SIZE, + HFI_PROP_MAX_GOP_FRAMES, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {GOP_SIZE, ENC, HEIC, + 0, INT_MAX, 1, 0 /* all intra */, + V4L2_CID_MPEG_VIDEO_GOP_SIZE, + HFI_PROP_MAX_GOP_FRAMES, + CAP_FLAG_OUTPUT_PORT | + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {GOP_CLOSURE, ENC, H264|HEVC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_ENABLE, + V4L2_CID_MPEG_VIDEO_GOP_CLOSURE, + 0}, + + {B_FRAME, ENC, H264|HEVC, + 0, 7, 1, 0, + V4L2_CID_MPEG_VIDEO_B_FRAMES, + HFI_PROP_MAX_B_FRAMES, + CAP_FLAG_OUTPUT_PORT}, + + {B_FRAME, ENC, HEIC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDEO_B_FRAMES, + HFI_PROP_MAX_B_FRAMES, + CAP_FLAG_OUTPUT_PORT}, + + {BLUR_TYPES, ENC, H264|HEVC, + VIDC_BLUR_NONE, VIDC_BLUR_EXTERNAL, + BIT(VIDC_BLUR_NONE) | BIT(VIDC_BLUR_EXTERNAL), + VIDC_BLUR_NONE, + 0, + HFI_PROP_BLUR_TYPES, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {CSC, ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, + HFI_PROP_CSC}, + + {LOWLATENCY_MODE, ENC, H264|HEVC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, + 0, + CAP_FLAG_NONE}, + + {LOWLATENCY_MODE, DEC, H264|HEVC|VP9|AV1, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, + HFI_PROP_SEQ_CHANGE_AT_SYNC_FRAME, + CAP_FLAG_INPUT_PORT}, + + {LTR_COUNT, ENC, H264|HEVC, + 0, 2, 1, 0, + V4L2_CID_MPEG_VIDEO_LTR_COUNT, + HFI_PROP_LTR_COUNT, + CAP_FLAG_OUTPUT_PORT}, + + {USE_LTR, ENC, H264|HEVC, + INVALID_DEFAULT_MARK_OR_USE_LTR, + ((1 << MAX_LTR_FRAME_COUNT) - 1), + 1, INVALID_DEFAULT_MARK_OR_USE_LTR, + V4L2_CID_MPEG_VIDEO_USE_LTR_FRAMES, + HFI_PROP_LTR_USE, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {MARK_LTR, ENC, H264|HEVC, + INVALID_DEFAULT_MARK_OR_USE_LTR, + (MAX_LTR_FRAME_COUNT - 1), + 1, INVALID_DEFAULT_MARK_OR_USE_LTR, + V4L2_CID_MPEG_VIDEO_FRAME_LTR_INDEX, + HFI_PROP_LTR_MARK, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {BASELAYER_PRIORITY, ENC, H264, + 0, MAX_BASE_LAYER_PRIORITY_ID, 1, 0, + V4L2_CID_MPEG_VIDEO_BASELAYER_PRIORITY_ID, + HFI_PROP_BASELAYER_PRIORITYID, + CAP_FLAG_OUTPUT_PORT}, + + {AU_DELIMITER, ENC, H264|HEVC, + V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDEO_AU_DELIMITER, + HFI_PROP_AUD, + CAP_FLAG_OUTPUT_PORT}, + + {CONTENT_ADAPTIVE_CODING, ENC, H264|HEVC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_ENABLE, + 0, + HFI_PROP_CONTENT_ADAPTIVE_CODING, + CAP_FLAG_OUTPUT_PORT}, + + {REQUEST_PREPROCESS, ENC, H264|HEVC, + MSM_VIDC_PREPROCESS_NONE, + MSM_VIDC_PREPROCESS_TYPE0, + BIT(MSM_VIDC_PREPROCESS_NONE) | + BIT(MSM_VIDC_PREPROCESS_TYPE0), + MSM_VIDC_PREPROCESS_NONE, + 0, HFI_PROP_REQUEST_PREPROCESS, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {MIN_QUALITY, ENC, H264|HEVC, + 0, MAX_SUPPORTED_MIN_QUALITY, 70, MAX_SUPPORTED_MIN_QUALITY, + 0, + HFI_PROP_MAINTAIN_MIN_QUALITY, + CAP_FLAG_OUTPUT_PORT}, + + {VBV_DELAY, ENC, H264|HEVC, + 200, 300, 100, 300, + V4L2_CID_MPEG_VIDEO_VBV_DELAY, + HFI_PROP_VBV_DELAY, + CAP_FLAG_OUTPUT_PORT}, + + {PEAK_BITRATE, ENC, H264|HEVC, + /* default peak bitrate is 10% larger than avg bitrate */ + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_BITRATE_PEAK, + HFI_PROP_TOTAL_PEAK_BITRATE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {MIN_FRAME_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, + V4L2_CID_MPEG_VIDEO_H264_MIN_QP, + HFI_PROP_MIN_QP_PACKED, + CAP_FLAG_OUTPUT_PORT}, + + {MIN_FRAME_QP, ENC, HEVC|HEIC, + MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, + V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP, + HFI_PROP_MIN_QP_PACKED, + CAP_FLAG_OUTPUT_PORT}, + + {I_FRAME_MIN_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, + V4L2_CID_MPEG_VIDEO_H264_I_FRAME_MIN_QP}, + + {I_FRAME_MIN_QP, ENC, HEVC|HEIC, + MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, + V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_MIN_QP}, + + {P_FRAME_MIN_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, + V4L2_CID_MPEG_VIDEO_H264_P_FRAME_MIN_QP}, + + {P_FRAME_MIN_QP, ENC, HEVC|HEIC, + MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, + V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_MIN_QP}, + + {B_FRAME_MIN_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, + V4L2_CID_MPEG_VIDEO_H264_B_FRAME_MIN_QP}, + + {B_FRAME_MIN_QP, ENC, HEVC|HEIC, + MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, + V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_MIN_QP}, + + {MAX_FRAME_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_H264_MAX_QP, + HFI_PROP_MAX_QP_PACKED, + CAP_FLAG_OUTPUT_PORT}, + + {MAX_FRAME_QP, ENC, HEVC|HEIC, + MIN_QP_10BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP, + HFI_PROP_MAX_QP_PACKED, + CAP_FLAG_OUTPUT_PORT}, + + {I_FRAME_MAX_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_H264_I_FRAME_MAX_QP}, + + {I_FRAME_MAX_QP, ENC, HEVC|HEIC, + MIN_QP_10BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_MAX_QP}, + + {P_FRAME_MAX_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_H264_P_FRAME_MAX_QP}, + + {P_FRAME_MAX_QP, ENC, HEVC|HEIC, + MIN_QP_10BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_MAX_QP}, + + {B_FRAME_MAX_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_H264_B_FRAME_MAX_QP}, + + {B_FRAME_MAX_QP, ENC, HEVC|HEIC, + MIN_QP_10BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_MAX_QP}, + + {I_FRAME_QP, ENC, HEVC, + MIN_QP_10BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {I_FRAME_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {P_FRAME_QP, ENC, HEVC, + MIN_QP_10BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {P_FRAME_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {B_FRAME_QP, ENC, HEVC, + MIN_QP_10BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {B_FRAME_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_H264_B_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {LAYER_TYPE, ENC, HEVC, + V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B, + V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P, + BIT(V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B) | + BIT(V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P), + V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE, + HFI_PROP_LAYER_ENCODING_TYPE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LAYER_TYPE, ENC, H264, + V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_B, + V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P, + BIT(V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_B) | + BIT(V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P), + V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P, + V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_TYPE, + HFI_PROP_LAYER_ENCODING_TYPE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LAYER_ENABLE, ENC, H264, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING, + HFI_PROP_LAYER_ENCODING_TYPE, + CAP_FLAG_OUTPUT_PORT}, + + {LAYER_ENABLE, ENC, HEVC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, + 0, + CAP_FLAG_OUTPUT_PORT}, + + {ENH_LAYER_COUNT, ENC, HEVC, + 0, 5, 1, 0, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER, + HFI_PROP_LAYER_COUNT, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {ENH_LAYER_COUNT, ENC, H264, + 0, 5, 1, 0, + V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_LAYER, + HFI_PROP_LAYER_COUNT, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {ENH_LAYER_COUNT, DEC, AV1, + 0, MAX_OP_POINT, 1, 0, + 0, + HFI_PROP_AV1_OP_POINT, + CAP_FLAG_INPUT_PORT}, + + {L0_BR, ENC, H264, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L0_BR, + HFI_PROP_BITRATE_LAYER1, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L0_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L0_BR, + HFI_PROP_BITRATE_LAYER1, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L1_BR, ENC, H264, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L1_BR, + HFI_PROP_BITRATE_LAYER2, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L1_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L1_BR, + HFI_PROP_BITRATE_LAYER2, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L2_BR, ENC, H264, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L2_BR, + HFI_PROP_BITRATE_LAYER3, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L2_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L2_BR, + HFI_PROP_BITRATE_LAYER3, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L3_BR, ENC, H264, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L3_BR, + HFI_PROP_BITRATE_LAYER4, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + {L3_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L3_BR, + HFI_PROP_BITRATE_LAYER4, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L4_BR, ENC, H264, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L4_BR, + HFI_PROP_BITRATE_LAYER5, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L4_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L4_BR, + HFI_PROP_BITRATE_LAYER5, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L5_BR, ENC, H264, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L5_BR, + HFI_PROP_BITRATE_LAYER6, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L5_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L5_BR, + HFI_PROP_BITRATE_LAYER6, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {ENTROPY_MODE, ENC, H264, + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC, + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, + BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC) | + BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC), + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, + V4L2_CID_MPEG_VIDEO_H264_ENTROPY_MODE, + HFI_PROP_CABAC_SESSION, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {ENTROPY_MODE, DEC, H264|HEVC|VP9|AV1, + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC, + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, + BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC) | + BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC), + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, + 0, + HFI_PROP_CABAC_SESSION}, + + {PROFILE, ENC|DEC, H264, + V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE, + V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH, + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_BASELINE) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_MAIN) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_HIGH), + V4L2_MPEG_VIDEO_H264_PROFILE_HIGH, + V4L2_CID_MPEG_VIDEO_H264_PROFILE, + HFI_PROP_PROFILE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {PROFILE, ENC|DEC, HEVC|HEIC, + V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN, + V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE, + BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN) | + BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE) | + BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10) | + BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE), + V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN, + V4L2_CID_MPEG_VIDEO_HEVC_PROFILE, + HFI_PROP_PROFILE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {PROFILE, DEC, VP9, + V4L2_MPEG_VIDEO_VP9_PROFILE_0, + V4L2_MPEG_VIDEO_VP9_PROFILE_2, + BIT(V4L2_MPEG_VIDEO_VP9_PROFILE_0) | + BIT(V4L2_MPEG_VIDEO_VP9_PROFILE_2), + V4L2_MPEG_VIDEO_VP9_PROFILE_0, + V4L2_CID_MPEG_VIDEO_VP9_PROFILE, + HFI_PROP_PROFILE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LEVEL, ENC, H264, + V4L2_MPEG_VIDEO_H264_LEVEL_1_0, + V4L2_MPEG_VIDEO_H264_LEVEL_6_0, + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1B) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_3) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_0), + V4L2_MPEG_VIDEO_H264_LEVEL_5_0, + V4L2_CID_MPEG_VIDEO_H264_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LEVEL, ENC, HEVC|HEIC, + V4L2_MPEG_VIDEO_HEVC_LEVEL_1, + V4L2_MPEG_VIDEO_HEVC_LEVEL_6, + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6), + V4L2_MPEG_VIDEO_HEVC_LEVEL_5, + V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LEVEL, DEC, H264, + V4L2_MPEG_VIDEO_H264_LEVEL_1_0, + V4L2_MPEG_VIDEO_H264_LEVEL_6_2, + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1B) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_3) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_2), + V4L2_MPEG_VIDEO_H264_LEVEL_6_1, + V4L2_CID_MPEG_VIDEO_H264_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LEVEL, DEC, HEVC|HEIC, + V4L2_MPEG_VIDEO_HEVC_LEVEL_1, + V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2, + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1)| + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2), + V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1, + V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LEVEL, DEC, VP9, + V4L2_MPEG_VIDEO_VP9_LEVEL_1_0, + V4L2_MPEG_VIDEO_VP9_LEVEL_6_0, + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_1_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_1_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_2_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_3_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_4_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_2) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_6_0), + V4L2_MPEG_VIDEO_VP9_LEVEL_6_0, + V4L2_CID_MPEG_VIDEO_VP9_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {HEVC_TIER, ENC|DEC, HEVC, + V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, + V4L2_MPEG_VIDEO_HEVC_TIER_HIGH, + BIT(V4L2_MPEG_VIDEO_HEVC_TIER_MAIN) | + BIT(V4L2_MPEG_VIDEO_HEVC_TIER_HIGH), + V4L2_MPEG_VIDEO_HEVC_TIER_HIGH, + V4L2_CID_MPEG_VIDEO_HEVC_TIER, + HFI_PROP_TIER, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {HEVC_TIER, ENC|DEC, HEIC, + V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, + V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, + BIT(V4L2_MPEG_VIDEO_HEVC_TIER_MAIN), + V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, + V4L2_CID_MPEG_VIDEO_HEVC_TIER, + HFI_PROP_TIER, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LF_MODE, ENC, H264, + V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED, + DB_H264_DISABLE_SLICE_BOUNDARY, + BIT(V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED) | + BIT(V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_DISABLED) | + BIT(DB_H264_DISABLE_SLICE_BOUNDARY), + V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED, + V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_MODE, + HFI_PROP_DEBLOCKING_MODE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LF_MODE, ENC, HEVC|HEIC, + V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_DISABLED, + DB_HEVC_DISABLE_SLICE_BOUNDARY, + BIT(V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_DISABLED) | + BIT(V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_ENABLED) | + BIT(DB_HEVC_DISABLE_SLICE_BOUNDARY), + V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_ENABLED, + V4L2_CID_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE, + HFI_PROP_DEBLOCKING_MODE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LF_ALPHA, ENC, H264, + -6, 6, 1, 0, + V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_ALPHA}, + + {LF_ALPHA, ENC, HEVC|HEIC, + -6, 6, 1, 0, + V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2}, + + {LF_BETA, ENC, H264, + -6, 6, 1, 0, + V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_BETA}, + + {LF_BETA, ENC, HEVC|HEIC, + -6, 6, 1, 0, + V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2}, + + {SLICE_MODE, ENC, H264|HEVC, + V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, + V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_BYTES, + BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE) | + BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_MB) | + BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_BYTES), + V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, + V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE, + 0, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {SLICE_MODE, ENC, HEIC, + V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, + V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, + BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE), + V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, + V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE, + 0, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {SLICE_MAX_BYTES, ENC, H264|HEVC, + MIN_SLICE_BYTE_SIZE, MAX_SLICE_BYTE_SIZE, + 1, MIN_SLICE_BYTE_SIZE, + V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES, + HFI_PROP_MULTI_SLICE_BYTES_COUNT, + CAP_FLAG_OUTPUT_PORT}, + + {SLICE_MAX_MB, ENC, H264|HEVC, + 1, MAX_SLICE_MB_SIZE, 1, 1, + V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB, + HFI_PROP_MULTI_SLICE_MB_COUNT, + CAP_FLAG_OUTPUT_PORT}, + + {MB_RC, ENC, H264|HEVC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_ENABLE, + V4L2_CID_MPEG_VIDEO_MB_RC_ENABLE, + 0, + CAP_FLAG_OUTPUT_PORT}, + + {TRANSFORM_8X8, ENC, H264, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_ENABLE, + V4L2_CID_MPEG_VIDEO_H264_8X8_TRANSFORM, + HFI_PROP_8X8_TRANSFORM, + CAP_FLAG_OUTPUT_PORT}, + + {CHROMA_QP_INDEX_OFFSET, ENC, HEVC, + MIN_CHROMA_QP_OFFSET, MAX_CHROMA_QP_OFFSET, + 1, MAX_CHROMA_QP_OFFSET, + V4L2_CID_MPEG_VIDEO_H264_CHROMA_QP_INDEX_OFFSET, + HFI_PROP_CHROMA_QP_OFFSET, + CAP_FLAG_OUTPUT_PORT}, + + {DISPLAY_DELAY_ENABLE, DEC, H264|HEVC|VP9|AV1, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY_ENABLE, + HFI_PROP_DECODE_ORDER_OUTPUT, + CAP_FLAG_INPUT_PORT}, + + {DISPLAY_DELAY, DEC, H264|HEVC|VP9|AV1, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY, + HFI_PROP_DECODE_ORDER_OUTPUT, + CAP_FLAG_INPUT_PORT}, + + {OUTPUT_ORDER, DEC, H264|HEVC|VP9|AV1, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, + HFI_PROP_DECODE_ORDER_OUTPUT, + CAP_FLAG_INPUT_PORT}, + + {INPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL, + DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT, + 1, DEFAULT_MAX_HOST_BUF_COUNT, + 0, + HFI_PROP_BUFFER_HOST_MAX_COUNT, + CAP_FLAG_INPUT_PORT}, + + {OUTPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL, + DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT, + 1, DEFAULT_MAX_HOST_BUF_COUNT, + 0, + HFI_PROP_BUFFER_HOST_MAX_COUNT, + CAP_FLAG_OUTPUT_PORT}, + + {CONCEAL_COLOR_8BIT, DEC, CODECS_ALL, 0x0, 0xff3fcff, 1, + DEFAULT_VIDEO_CONCEAL_COLOR_BLACK, + V4L2_CID_MPEG_VIDEO_MUTE_YUV, + HFI_PROP_CONCEAL_COLOR_8BIT, + CAP_FLAG_INPUT_PORT}, + + {CONCEAL_COLOR_10BIT, DEC, CODECS_ALL, 0x0, 0x3fffffff, 1, + DEFAULT_VIDEO_CONCEAL_COLOR_BLACK, + V4L2_CID_MPEG_VIDEO_MUTE_YUV, + HFI_PROP_CONCEAL_COLOR_10BIT, + CAP_FLAG_INPUT_PORT}, + + {STAGE, DEC|ENC, CODECS_ALL, + MSM_VIDC_STAGE_1, + MSM_VIDC_STAGE_2, 1, + MSM_VIDC_STAGE_2, + 0, + HFI_PROP_STAGE}, + + {PIPE, DEC|ENC, CODECS_ALL, + MSM_VIDC_PIPE_1, + MSM_VIDC_PIPE_4, 1, + MSM_VIDC_PIPE_4, + 0, + HFI_PROP_PIPE}, + + {POC, DEC, H264, 0, 2, 1, 1, + 0, + HFI_PROP_PIC_ORDER_CNT_TYPE}, + + {QUALITY_MODE, ENC, CODECS_ALL, + MSM_VIDC_MAX_QUALITY_MODE, + MSM_VIDC_POWER_SAVE_MODE, 1, + MSM_VIDC_POWER_SAVE_MODE}, + + {CODED_FRAMES, DEC, H264|HEVC|HEIC, + CODED_FRAMES_PROGRESSIVE, CODED_FRAMES_INTERLACE, + 1, CODED_FRAMES_PROGRESSIVE, + 0, + HFI_PROP_CODED_FRAMES}, + + {BIT_DEPTH, DEC, CODECS_ALL, BIT_DEPTH_8, BIT_DEPTH_10, 1, BIT_DEPTH_8, + 0, + HFI_PROP_LUMA_CHROMA_BIT_DEPTH}, + + {CODEC_CONFIG, DEC, H264|HEVC|HEIC|AV1, 0, 1, 1, 0, + 0, 0, + CAP_FLAG_DYNAMIC_ALLOWED}, + + {BITSTREAM_SIZE_OVERWRITE, DEC, CODECS_ALL, 0, INT_MAX, 1, 0, + 0}, + + {THUMBNAIL_MODE, DEC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, + HFI_PROP_THUMBNAIL_MODE, + CAP_FLAG_INPUT_PORT}, + + {DEFAULT_HEADER, DEC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, + HFI_PROP_DEC_DEFAULT_HEADER}, + + {RAP_FRAME, DEC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_ENABLE, + 0, + HFI_PROP_DEC_START_FROM_RAP_FRAME, + CAP_FLAG_INPUT_PORT}, + + {SEQ_CHANGE_AT_SYNC_FRAME, DEC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_ENABLE, + 0, + HFI_PROP_SEQ_CHANGE_AT_SYNC_FRAME, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {FIRMWARE_PRIORITY_OFFSET, DEC | ENC, CODECS_ALL, + 1, 1, 1, 1}, + + {DPB_LIST, DEC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, + HFI_PROP_DPB_LIST, + CAP_FLAG_OUTPUT_PORT}, + + {FILM_GRAIN, DEC, AV1, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, + HFI_PROP_AV1_FILM_GRAIN_PRESENT}, + + {SUPER_BLOCK, DEC, AV1, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, + HFI_PROP_AV1_SUPER_BLOCK_ENABLED}, + + {DRAP, DEC, AV1, + 0, S32_MAX, 1, 0, + 0, + HFI_PROP_AV1_DRAP_CONFIG, + CAP_FLAG_INPUT_PORT}, + + {ALL_INTRA, ENC, H264|HEVC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, + 0, + CAP_FLAG_OUTPUT_PORT}, + + {GRID, ENC, HEIC, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_ENABLE, + 0, + HFI_PROP_HEIC_GRID_ENABLE, + CAP_FLAG_OUTPUT_PORT}, + + {COMPLEXITY, ENC, H264|HEVC, + 0, 100, + 1, DEFAULT_COMPLEXITY, + 0}, +}; + +static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kalama[] = { + /* {cap, domain, codec, + * parents, + * children, + * adjust, set} + */ + + {PIX_FMTS, ENC, H264, + {0}, + {0}}, + + {PIX_FMTS, ENC, HEVC, + {0}, + {PROFILE, MIN_FRAME_QP, MAX_FRAME_QP, I_FRAME_QP, P_FRAME_QP, + B_FRAME_QP, MIN_QUALITY, BLUR_TYPES}}, + + {PIX_FMTS, ENC, HEIC, + {0}, + {PROFILE}}, + + {PIX_FMTS, DEC, HEVC|HEIC, + {0}, + {PROFILE}}, + + {FRAME_RATE, ENC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_q16}, + + {HFLIP, ENC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_flip}, + + {VFLIP, ENC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_flip}, + + {ROTATION, ENC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_rotation}, + + {SUPER_FRAME, ENC, H264|HEVC, + {0}, + {INPUT_BUF_HOST_MAX_COUNT, OUTPUT_BUF_HOST_MAX_COUNT}, + NULL, + NULL}, + + {HEADER_MODE, ENC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_header_mode}, + + {WITHOUT_STARTCODE, ENC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_nal_length}, + + {WITHOUT_STARTCODE, DEC, AV1, + {0}, + {0}, + NULL, + msm_vidc_set_u32}, + + {REQUEST_I_FRAME, ENC, H264|HEVC, + {0}, + {0}, + NULL, + msm_vidc_set_req_sync_frame}, + + {BIT_RATE, ENC, H264, + {ENH_LAYER_COUNT, BITRATE_MODE, ENTROPY_MODE, + ALL_INTRA, LOWLATENCY_MODE}, + {PEAK_BITRATE}, + msm_vidc_adjust_bitrate, + msm_vidc_set_bitrate}, + + {BIT_RATE, ENC, HEVC, + {ENH_LAYER_COUNT, BITRATE_MODE, ALL_INTRA, LOWLATENCY_MODE}, + {PEAK_BITRATE}, + msm_vidc_adjust_bitrate, + msm_vidc_set_bitrate}, + + {BITRATE_MODE, ENC, H264, + {0}, + {LTR_COUNT, I_FRAME_QP, P_FRAME_QP, + B_FRAME_QP, ENH_LAYER_COUNT, BIT_RATE, + MIN_QUALITY, VBV_DELAY, + PEAK_BITRATE, SLICE_MODE, CONTENT_ADAPTIVE_CODING, + BLUR_TYPES, LOWLATENCY_MODE}, + msm_vidc_adjust_bitrate_mode, + msm_vidc_set_u32_enum}, + + {BITRATE_MODE, ENC, HEVC, + {0}, + {LTR_COUNT, I_FRAME_QP, P_FRAME_QP, + B_FRAME_QP, CONSTANT_QUALITY, ENH_LAYER_COUNT, + BIT_RATE, MIN_QUALITY, VBV_DELAY, + PEAK_BITRATE, SLICE_MODE, CONTENT_ADAPTIVE_CODING, + BLUR_TYPES, LOWLATENCY_MODE}, + msm_vidc_adjust_bitrate_mode, + msm_vidc_set_u32_enum}, + + {BITRATE_MODE, ENC, HEIC, + {0}, + {CONSTANT_QUALITY}, + msm_vidc_adjust_bitrate_mode, + msm_vidc_set_u32_enum}, + + {CONSTANT_QUALITY, ENC, HEVC|HEIC, + {BITRATE_MODE}, + {0}, + NULL, + msm_vidc_set_constant_quality}, + + {GOP_SIZE, ENC, CODECS_ALL, + {ENH_LAYER_COUNT}, + {ALL_INTRA}, + msm_vidc_adjust_gop_size, + msm_vidc_set_gop_size}, + + {GOP_SIZE, ENC, HEIC, + {0}, + {0}, + NULL, + msm_vidc_set_u32}, + + {B_FRAME, ENC, H264|HEVC, + {ENH_LAYER_COUNT}, + {ALL_INTRA}, + msm_vidc_adjust_b_frame, + msm_vidc_set_u32}, + + {B_FRAME, ENC, HEIC, + {0}, + {0}, + NULL, + msm_vidc_set_u32}, + + {BLUR_TYPES, ENC, H264|HEVC, + {PIX_FMTS, BITRATE_MODE, MIN_QUALITY}, + {0}, + msm_vidc_adjust_blur_type, + msm_vidc_set_u32_enum}, + + {LOWLATENCY_MODE, ENC, H264 | HEVC, + {BITRATE_MODE, DELIVERY_MODE}, + {STAGE, BIT_RATE}, + msm_vidc_adjust_enc_lowlatency_mode, + NULL}, + + {LOWLATENCY_MODE, DEC, H264|HEVC|VP9|AV1, + {0}, + {STAGE}, + msm_vidc_adjust_dec_lowlatency_mode, + NULL}, + + {LTR_COUNT, ENC, H264|HEVC, + {BITRATE_MODE, ALL_INTRA}, + {0}, + msm_vidc_adjust_ltr_count, + msm_vidc_set_u32}, + + {USE_LTR, ENC, H264|HEVC, + {0}, + {0}, + msm_vidc_adjust_use_ltr, + msm_vidc_set_use_and_mark_ltr}, + + {MARK_LTR, ENC, H264|HEVC, + {0}, + {0}, + msm_vidc_adjust_mark_ltr, + msm_vidc_set_use_and_mark_ltr}, + + {AU_DELIMITER, ENC, H264|HEVC, + {0}, + {0}, + NULL, + msm_vidc_set_u32}, + + {CONTENT_ADAPTIVE_CODING, ENC, H264|HEVC, + {BITRATE_MODE, LAYER_ENABLE, LAYER_TYPE}, + {REQUEST_PREPROCESS}, + msm_vidc_adjust_brs, + msm_vidc_set_vbr_related_properties}, + + {REQUEST_PREPROCESS, ENC, H264|HEVC, + {CONTENT_ADAPTIVE_CODING}, + {0}, + msm_vidc_adjust_preprocess, + msm_vidc_set_preprocess}, + + {MIN_QUALITY, ENC, H264, + {BITRATE_MODE, ENH_LAYER_COUNT}, + {BLUR_TYPES}, + msm_vidc_adjust_min_quality, + msm_vidc_set_u32}, + + {MIN_QUALITY, ENC, HEVC, + {BITRATE_MODE, PIX_FMTS, ENH_LAYER_COUNT}, + {BLUR_TYPES}, + msm_vidc_adjust_min_quality, + msm_vidc_set_u32}, + + {VBV_DELAY, ENC, H264|HEVC, + {BITRATE_MODE}, + {0}, + NULL, + msm_vidc_set_cbr_related_properties}, + + {PEAK_BITRATE, ENC, H264|HEVC, + {BITRATE_MODE, BIT_RATE}, + {0}, + msm_vidc_adjust_peak_bitrate, + msm_vidc_set_cbr_related_properties}, + + {MIN_FRAME_QP, ENC, H264, + {0}, + {0}, + NULL, + msm_vidc_set_min_qp}, + + {MIN_FRAME_QP, ENC, HEVC|HEIC, + {PIX_FMTS}, + {0}, + msm_vidc_adjust_hevc_min_qp, + msm_vidc_set_min_qp}, + + {MAX_FRAME_QP, ENC, H264, + {0}, + {0}, + NULL, + msm_vidc_set_max_qp}, + + {MAX_FRAME_QP, ENC, HEVC|HEIC, + {PIX_FMTS}, + {0}, + msm_vidc_adjust_hevc_max_qp, + msm_vidc_set_max_qp}, + + {I_FRAME_QP, ENC, HEVC, + {PIX_FMTS, BITRATE_MODE}, + {0}, + msm_vidc_adjust_hevc_i_frame_qp, + msm_vidc_set_frame_qp}, + + {I_FRAME_QP, ENC, H264, + {BITRATE_MODE}, + {0}, + NULL, + msm_vidc_set_frame_qp}, + + {P_FRAME_QP, ENC, HEVC, + {PIX_FMTS, BITRATE_MODE}, + {0}, + msm_vidc_adjust_hevc_p_frame_qp, + msm_vidc_set_frame_qp}, + + {P_FRAME_QP, ENC, H264, + {BITRATE_MODE}, + {0}, + NULL, + msm_vidc_set_frame_qp}, + + {B_FRAME_QP, ENC, HEVC, + {PIX_FMTS, BITRATE_MODE}, + {0}, + msm_vidc_adjust_hevc_b_frame_qp, + msm_vidc_set_frame_qp}, + + {B_FRAME_QP, ENC, H264, + {BITRATE_MODE}, + {0}, + NULL, + msm_vidc_set_frame_qp}, + + {LAYER_TYPE, ENC, H264, + {0}, + {CONTENT_ADAPTIVE_CODING}}, + + {LAYER_ENABLE, ENC, H264|HEVC, + {0}, + {CONTENT_ADAPTIVE_CODING}}, + + {ENH_LAYER_COUNT, ENC, H264|HEVC, + {BITRATE_MODE}, + {GOP_SIZE, B_FRAME, BIT_RATE, MIN_QUALITY}, + msm_vidc_adjust_layer_count, + msm_vidc_set_layer_count_and_type}, + + {ENH_LAYER_COUNT, DEC, AV1, + {0}, + {0}, + NULL, + msm_vidc_set_u32}, + + {L0_BR, ENC, H264|HEVC, + {0}, + {0}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, + + {L1_BR, ENC, H264|HEVC, + {0}, + {0}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, + + {L2_BR, ENC, H264|HEVC, + {0}, + {0}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, + + {L3_BR, ENC, H264|HEVC, + {0}, + {0}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, + + {L4_BR, ENC, H264|HEVC, + {0}, + {0}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, + + {L5_BR, ENC, H264|HEVC, + {0}, + {0}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, + + {ENTROPY_MODE, ENC, H264, + {PROFILE}, + {BIT_RATE}, + msm_vidc_adjust_entropy_mode, + msm_vidc_set_u32}, + + {PROFILE, ENC, H264, + {0}, + {ENTROPY_MODE, TRANSFORM_8X8}, + NULL, + msm_vidc_set_u32_enum}, + + {PROFILE, DEC, H264, + {0}, + {ENTROPY_MODE}, + NULL, + msm_vidc_set_u32_enum}, + + {PROFILE, ENC|DEC, HEVC|HEIC, + {PIX_FMTS}, + {0}, + msm_vidc_adjust_profile, + msm_vidc_set_u32_enum}, + + {PROFILE, DEC, VP9|AV1, + {0}, + {0}, + NULL, + msm_vidc_set_u32_enum}, + + {LEVEL, DEC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_u32_enum}, + + {LEVEL, ENC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_level}, + + {AV1_TIER, DEC, AV1, + {0}, + {0}, + NULL, + msm_vidc_set_u32_enum}, + + {HEVC_TIER, ENC|DEC, HEVC|HEIC, + {0}, + {0}, + NULL, + msm_vidc_set_u32_enum}, + + {LF_MODE, ENC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_deblock_mode}, + + {SLICE_MODE, ENC, H264|HEVC, + {BITRATE_MODE, ALL_INTRA}, + {STAGE, DELIVERY_MODE}, + msm_vidc_adjust_slice_count, + msm_vidc_set_slice_count}, + + {SLICE_MODE, ENC, HEIC, + {0}, + {0}, + msm_vidc_adjust_slice_count, + msm_vidc_set_slice_count}, + + {TRANSFORM_8X8, ENC, H264, + {PROFILE}, + {0}, + msm_vidc_adjust_transform_8x8, + msm_vidc_set_u32}, + + {CHROMA_QP_INDEX_OFFSET, ENC, HEVC, + {0}, + {0}, + msm_vidc_adjust_chroma_qp_index_offset, + msm_vidc_set_chroma_qp_index_offset}, + + {DISPLAY_DELAY_ENABLE, DEC, H264|HEVC|VP9|AV1, + {0}, + {OUTPUT_ORDER}, + NULL, + NULL}, + + {DISPLAY_DELAY, DEC, H264|HEVC|VP9|AV1, + {0}, + {OUTPUT_ORDER}, + NULL, + NULL}, + + {OUTPUT_ORDER, DEC, H264|HEVC|VP9|AV1, + {THUMBNAIL_MODE, DISPLAY_DELAY, DISPLAY_DELAY_ENABLE}, + {0}, + msm_vidc_adjust_output_order, + msm_vidc_set_u32}, + + {INPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL, + {0}, + {0}, + msm_vidc_adjust_input_buf_host_max_count, + msm_vidc_set_u32}, + + {INPUT_BUF_HOST_MAX_COUNT, ENC, H264|HEVC, + {SUPER_FRAME}, + {0}, + msm_vidc_adjust_input_buf_host_max_count, + msm_vidc_set_u32}, + + {OUTPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL, + {0}, + {0}, + msm_vidc_adjust_output_buf_host_max_count, + msm_vidc_set_u32}, + + {OUTPUT_BUF_HOST_MAX_COUNT, ENC, H264|HEVC, + {SUPER_FRAME, DELIVERY_MODE}, + {0}, + msm_vidc_adjust_output_buf_host_max_count, + msm_vidc_set_u32}, + + {CONCEAL_COLOR_8BIT, DEC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_u32_packed}, + + {CONCEAL_COLOR_10BIT, DEC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_u32_packed}, + + {STAGE, ENC | DEC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_stage}, + + {STAGE, ENC, H264|HEVC, + {LOWLATENCY_MODE, SLICE_MODE}, + {0}, + NULL, + msm_vidc_set_stage}, + + {STAGE, DEC, H264|HEVC|VP9|AV1, + {LOWLATENCY_MODE}, + {0}, + NULL, + msm_vidc_set_stage}, + + {PIPE, DEC|ENC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_pipe}, + + {THUMBNAIL_MODE, DEC, CODECS_ALL, + {0}, + {OUTPUT_ORDER}, + NULL, + msm_vidc_set_u32}, + + {RAP_FRAME, DEC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_u32}, + + {FIRMWARE_PRIORITY_OFFSET, DEC | ENC, CODECS_ALL, + {0}, + {0}, + NULL, + NULL}, + + {DPB_LIST, DEC, CODECS_ALL, + {0}, + {0}, + NULL, + NULL}, + + {DRAP, DEC, AV1, + {0}, + {0}, + NULL, + msm_vidc_set_u32}, + + {ALL_INTRA, ENC, H264|HEVC, + {GOP_SIZE, B_FRAME}, + {LTR_COUNT, SLICE_MODE, BIT_RATE}, + msm_vidc_adjust_all_intra, + NULL}, + + {GRID, ENC, HEIC, + {0}, + {0}, + NULL, + msm_vidc_set_u32}, +}; + +/* Default UBWC config for LPDDR5 */ +static struct msm_vidc_ubwc_config_data ubwc_config_kalama[] = { + UBWC_CONFIG(8, 32, 16, 0, 1, 1, 1), +}; + +static const struct msm_vidc_platform_data kalama_data = { + .core_data = core_data_kalama, + .core_data_size = ARRAY_SIZE(core_data_kalama), + .inst_cap_data = instance_cap_data_kalama, + .inst_cap_data_size = ARRAY_SIZE(instance_cap_data_kalama), + .inst_cap_dependency_data = instance_cap_dependency_data_kalama, + .inst_cap_dependency_data_size = ARRAY_SIZE(instance_cap_dependency_data_kalama), + .csc_data.vpe_csc_custom_bias_coeff = vpe_csc_custom_bias_coeff, + .csc_data.vpe_csc_custom_matrix_coeff = vpe_csc_custom_matrix_coeff, + .csc_data.vpe_csc_custom_limit_coeff = vpe_csc_custom_limit_coeff, + .ubwc_config = ubwc_config_kalama, +}; + +int msm_vidc_kalama_check_ddr_type(void) +{ + u32 ddr_type; + + ddr_type = of_fdt_get_ddrtype(); + if (ddr_type != DDR_TYPE_LPDDR5 && + ddr_type != DDR_TYPE_LPDDR5X) { + d_vpr_e("%s: wrong ddr type %d\n", __func__, ddr_type); + return -EINVAL; + } else { + d_vpr_h("%s: ddr type %d\n", __func__, ddr_type); + } + return 0; +} + +static int msm_vidc_init_data(struct msm_vidc_core *core) +{ + int rc = 0; + + if (!core || !core->platform) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + d_vpr_h("%s: initialize kalama data\n", __func__); + + core->platform->data = kalama_data; + rc = msm_vidc_kalama_check_ddr_type(); + if (rc) + return rc; + + return rc; +} + +int msm_vidc_init_platform_kalama(struct msm_vidc_core *core, struct device *dev) +{ + int rc = 0; + + rc = msm_vidc_init_data(core); + if (rc) + return rc; + + return 0; +} + +int msm_vidc_deinit_platform_kalama(struct msm_vidc_core *core, struct device *dev) +{ + /* do nothing */ + return 0; +} + diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index e39c9ac657..e54398aafa 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -2039,14 +2039,14 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kala {BITRATE_MODE, ENH_LAYER_COUNT, META_ROI_INFO}, {BLUR_TYPES}, msm_vidc_adjust_min_quality, - msm_vidc_set_vbr_related_properties}, + msm_vidc_set_u32}, {MIN_QUALITY, ENC, HEVC, {BITRATE_MODE, PIX_FMTS, ENH_LAYER_COUNT, META_ROI_INFO}, {BLUR_TYPES}, msm_vidc_adjust_min_quality, - msm_vidc_set_vbr_related_properties}, + msm_vidc_set_u32}, {VBV_DELAY, ENC, H264|HEVC, {BITRATE_MODE}, From fd5d2c059bd4db530a323925e940055e6b8babbe Mon Sep 17 00:00:00 2001 From: Dikshita Agarwal Date: Wed, 13 Jul 2022 12:01:51 +0530 Subject: [PATCH 0664/1061] video: driver: use CAP_FLAG_DYNAMIC_ALLOWED flag to allow ctrls Currently ctrl_id is being used to decide whether to allow or not certain control dynamically i.e. after stream on. Use CAP_FLAG_DYNAMIC_ALLOWED to do the same instead. Change-Id: I56bf5e725ae7bd4ece8aa2bde0aa84c42e759c17 Signed-off-by: Dikshita Agarwal --- driver/vidc/inc/msm_vidc_driver.h | 3 +- driver/vidc/src/msm_vidc_control.c | 10 ++-- driver/vidc/src/msm_vidc_driver.c | 75 +++++++----------------------- 3 files changed, 23 insertions(+), 65 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index f94be4417f..a66000321b 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -499,7 +499,8 @@ struct msm_vidc_inst *get_inst(struct msm_vidc_core *core, u32 session_id); void put_inst(struct msm_vidc_inst *inst); bool msm_vidc_allow_s_fmt(struct msm_vidc_inst *inst, u32 type); -bool msm_vidc_allow_s_ctrl(struct msm_vidc_inst *inst, u32 id); +bool msm_vidc_allow_s_ctrl(struct msm_vidc_inst *inst, + enum msm_vidc_inst_capability_type cap_id); bool msm_vidc_allow_metadata_delivery(struct msm_vidc_inst *inst, u32 cap_id, u32 port); bool msm_vidc_allow_metadata_subscription(struct msm_vidc_inst *inst, diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 09c7a1d0fa..af3234f419 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -1178,11 +1178,6 @@ int msm_v4l2_op_s_ctrl(struct v4l2_ctrl *ctrl) i_vpr_h(inst, FMT_STRING_SET_CTRL, __func__, state_name(inst->state), ctrl->name, ctrl->id, ctrl->val); - if (!msm_vidc_allow_s_ctrl(inst, ctrl->id)) { - rc = -EINVAL; - goto unlock; - } - cap_id = msm_vidc_get_cap_id(inst, ctrl->id); if (!is_valid_cap_id(cap_id)) { i_vpr_e(inst, "%s: could not find cap_id for ctrl %s\n", @@ -1191,6 +1186,11 @@ int msm_v4l2_op_s_ctrl(struct v4l2_ctrl *ctrl) goto unlock; } + if (!msm_vidc_allow_s_ctrl(inst, cap_id)) { + rc = -EINVAL; + goto unlock; + } + if (ctrl->id == V4L2_CID_MPEG_VIDC_INPUT_METADATA_FD) { if (ctrl->val == INVALID_FD || ctrl->val == INT_MAX) { i_vpr_e(inst, diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index bd589a02af..0ff8ddc267 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -1379,11 +1379,12 @@ exit: return allow; } -bool msm_vidc_allow_s_ctrl(struct msm_vidc_inst *inst, u32 id) +bool msm_vidc_allow_s_ctrl(struct msm_vidc_inst *inst, + enum msm_vidc_inst_capability_type cap_id) { bool allow = false; - if (!inst) { + if (!inst || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); return false; } @@ -1391,26 +1392,22 @@ bool msm_vidc_allow_s_ctrl(struct msm_vidc_inst *inst, u32 id) allow = true; goto exit; } + + if (!inst->capabilities->cap[cap_id].cap_id || + !inst->capabilities->cap[cap_id].v4l2_id) { + allow = false; + goto exit; + } + if (is_decode_session(inst)) { if (!inst->bufq[INPUT_PORT].vb2q->streaming) { allow = true; goto exit; } if (inst->bufq[INPUT_PORT].vb2q->streaming) { - switch (id) { - case V4L2_CID_MPEG_VIDC_CODEC_CONFIG: - case V4L2_CID_MPEG_VIDC_PRIORITY: - case V4L2_CID_MPEG_VIDC_LOWLATENCY_REQUEST: - case V4L2_CID_MPEG_VIDC_INPUT_METADATA_FD: - case V4L2_CID_MPEG_VIDC_FRAME_RATE: - case V4L2_CID_MPEG_VIDC_OPERATING_RATE: - case V4L2_CID_MPEG_VIDC_SW_FENCE_ID: + if (inst->capabilities->cap[cap_id].flags & + CAP_FLAG_DYNAMIC_ALLOWED) allow = true; - break; - default: - allow = false; - break; - } } } else if (is_encode_session(inst)) { if (!inst->bufq[OUTPUT_PORT].vb2q->streaming) { @@ -1418,56 +1415,16 @@ bool msm_vidc_allow_s_ctrl(struct msm_vidc_inst *inst, u32 id) goto exit; } if (inst->bufq[OUTPUT_PORT].vb2q->streaming) { - switch (id) { - case V4L2_CID_MPEG_VIDEO_BITRATE: - case V4L2_CID_MPEG_VIDEO_GOP_SIZE: - case V4L2_CID_MPEG_VIDEO_FORCE_KEY_FRAME: - case V4L2_CID_HFLIP: - case V4L2_CID_VFLIP: - case V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP: - case V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP: - case V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP: - case V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP: - case V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP: - case V4L2_CID_MPEG_VIDEO_H264_B_FRAME_QP: - case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER: - case V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_LAYER: - case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L0_BR: - case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L1_BR: - case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L2_BR: - case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L3_BR: - case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L4_BR: - case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L5_BR: - case V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L0_BR: - case V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L1_BR: - case V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L2_BR: - case V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L3_BR: - case V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L4_BR: - case V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L5_BR: - case V4L2_CID_MPEG_VIDEO_USE_LTR_FRAMES: - case V4L2_CID_MPEG_VIDEO_FRAME_LTR_INDEX: - case V4L2_CID_MPEG_VIDC_VIDEO_BLUR_TYPES: - case V4L2_CID_MPEG_VIDC_VIDEO_BLUR_RESOLUTION: - case V4L2_CID_MPEG_VIDEO_CONSTANT_QUALITY: - case V4L2_CID_MPEG_VIDC_ENC_INPUT_COMPRESSION_RATIO: - case V4L2_CID_MPEG_VIDEO_BITRATE_PEAK: - case V4L2_CID_MPEG_VIDC_PRIORITY: - case V4L2_CID_MPEG_VIDC_INPUT_METADATA_FD: - case V4L2_CID_MPEG_VIDC_INTRA_REFRESH_PERIOD: - case V4L2_CID_MPEG_VIDC_RESERVE_DURATION: + if (inst->capabilities->cap[cap_id].flags & + CAP_FLAG_DYNAMIC_ALLOWED) allow = true; - break; - default: - allow = false; - break; - } } } exit: if (!allow) - i_vpr_e(inst, "%s: id %#x not allowed in state %s\n", - __func__, id, state_name(inst->state)); + i_vpr_e(inst, "%s: cap_id %#x not allowed in state %s\n", + __func__, cap_id, state_name(inst->state)); return allow; } From e5bc8371ea5a48dc408ed72730f0c244820eb5d4 Mon Sep 17 00:00:00 2001 From: Dikshita Agarwal Date: Wed, 13 Jul 2022 13:56:04 +0530 Subject: [PATCH 0665/1061] video: driver: use cap_id instead of v4l2_id for control handling Instead of using private v4l2 ids, use cap_id while handling different caps in s_ctrl and g_ctrl ops. Change-Id: I4d5dbb151ef5bc2dd348a06663e0beae0756d761 Signed-off-by: Dikshita Agarwal --- driver/vidc/src/msm_vidc_control.c | 39 ++++++++++++++---------------- driver/vidc/src/msm_vidc_driver.c | 18 ++++++++++---- 2 files changed, 31 insertions(+), 26 deletions(-) diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index af3234f419..2baf220c14 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -945,26 +945,24 @@ error: } static int msm_vidc_update_buffer_count_if_needed(struct msm_vidc_inst* inst, - struct v4l2_ctrl *ctrl) + enum msm_vidc_inst_capability_type cap_id) { int rc = 0; bool update_input_port = false, update_output_port = false; - if (!inst || !ctrl) { + if (!inst) { d_vpr_e("%s: invalid parameters\n", __func__); return -EINVAL; } - switch (ctrl->id) { - case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE: - case V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_TYPE: - case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER: - case V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING: - case V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_LAYER: + switch (cap_id) { + case LAYER_TYPE: + case ENH_LAYER_COUNT: + case LAYER_ENABLE: update_input_port = true; break; - case V4L2_CID_MPEG_VIDC_THUMBNAIL_MODE: - case V4L2_CID_MPEG_VIDC_PRIORITY: + case THUMBNAIL_MODE: + case PRIORITY: update_input_port = true; update_output_port = true; break; @@ -1077,13 +1075,13 @@ static int msm_vidc_update_static_property(struct msm_vidc_inst *inst, /* update value to db */ msm_vidc_update_cap_value(inst, cap_id, ctrl->val, __func__); - if (ctrl->id == V4L2_CID_MPEG_VIDC_CLIENT_ID) { + if (cap_id == CLIENT_ID) { rc = msm_vidc_update_debug_str(inst); if (rc) return rc; } - if (ctrl->id == V4L2_CID_MPEG_VIDC_SECURE) { + if (cap_id == SECURE_MODE) { if (ctrl->val) { rc = msm_vidc_allow_secure_session(inst); if (rc) @@ -1091,7 +1089,7 @@ static int msm_vidc_update_static_property(struct msm_vidc_inst *inst, } } - if (ctrl->id == V4L2_CID_ROTATE) { + if (cap_id == ROTATION) { struct v4l2_format *output_fmt; output_fmt = &inst->fmts[OUTPUT_PORT]; @@ -1100,8 +1098,7 @@ static int msm_vidc_update_static_property(struct msm_vidc_inst *inst, return rc; } - if (ctrl->id == V4L2_CID_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE || - ctrl->id == V4L2_CID_MPEG_VIDC_H264_ENCODE_DELIVERY_MODE) { + if (cap_id == DELIVERY_MODE) { struct v4l2_format *output_fmt; output_fmt = &inst->fmts[OUTPUT_PORT]; @@ -1110,23 +1107,23 @@ static int msm_vidc_update_static_property(struct msm_vidc_inst *inst, return rc; } - if (ctrl->id == V4L2_CID_MPEG_VIDC_MIN_BITSTREAM_SIZE_OVERWRITE) { + if (cap_id == BITSTREAM_SIZE_OVERWRITE) { rc = msm_vidc_update_bitstream_buffer_size(inst); if (rc) return rc; } /* call this explicitly to adjust client priority */ - if (ctrl->id == V4L2_CID_MPEG_VIDC_PRIORITY) { + if (cap_id == PRIORITY) { rc = msm_vidc_adjust_session_priority(inst, ctrl); if (rc) return rc; } - if (ctrl->id == V4L2_CID_MPEG_VIDC_CRITICAL_PRIORITY) + if (cap_id == CRITICAL_PRIORITY) msm_vidc_update_cap_value(inst, PRIORITY, 0, __func__); - if (ctrl->id == V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER) { + if (cap_id == ENH_LAYER_COUNT && inst->codec == MSM_VIDC_HEVC) { u32 enable; /* enable LAYER_ENABLE cap if HEVC_HIER enh layers > 0 */ @@ -1143,7 +1140,7 @@ static int msm_vidc_update_static_property(struct msm_vidc_inst *inst, return rc; } - rc = msm_vidc_update_buffer_count_if_needed(inst, ctrl); + rc = msm_vidc_update_buffer_count_if_needed(inst, cap_id); if (rc) return rc; @@ -1191,7 +1188,7 @@ int msm_v4l2_op_s_ctrl(struct v4l2_ctrl *ctrl) goto unlock; } - if (ctrl->id == V4L2_CID_MPEG_VIDC_INPUT_METADATA_FD) { + if (cap_id == INPUT_METADATA_FD) { if (ctrl->val == INVALID_FD || ctrl->val == INT_MAX) { i_vpr_e(inst, "%s: client configured invalid input metadata fd %d\n", diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 0ff8ddc267..4657937f58 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -2304,29 +2304,37 @@ exit: int msm_vidc_get_control(struct msm_vidc_inst *inst, struct v4l2_ctrl *ctrl) { int rc = 0; + enum msm_vidc_inst_capability_type cap_id; if (!inst || !ctrl) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - switch (ctrl->id) { - case V4L2_CID_MIN_BUFFERS_FOR_CAPTURE: + cap_id = msm_vidc_get_cap_id(inst, ctrl->id); + if (!is_valid_cap_id(cap_id)) { + i_vpr_e(inst, "%s: could not find cap_id for ctrl %s\n", + __func__, ctrl->name); + return -EINVAL; + } + + switch (cap_id) { + case MIN_BUFFERS_OUTPUT: ctrl->val = inst->buffers.output.min_count + inst->buffers.output.extra_count; i_vpr_h(inst, "g_min: output buffers %d\n", ctrl->val); break; - case V4L2_CID_MIN_BUFFERS_FOR_OUTPUT: + case MIN_BUFFERS_INPUT: ctrl->val = inst->buffers.input.min_count + inst->buffers.input.extra_count; i_vpr_h(inst, "g_min: input buffers %d\n", ctrl->val); break; - case V4L2_CID_MPEG_VIDC_AV1D_FILM_GRAIN_PRESENT: + case FILM_GRAIN: ctrl->val = inst->capabilities->cap[FILM_GRAIN].value; i_vpr_h(inst, "%s: film grain present: %d\n", __func__, ctrl->val); break; - case V4L2_CID_MPEG_VIDC_SW_FENCE_FD: + case FENCE_FD: rc = msm_vidc_get_fence_fd(inst, &ctrl->val); if (!rc) i_vpr_l(inst, "%s: fence fd: %d\n", From 39623d261ee51592a6b4b62008f51b5b315f1e68 Mon Sep 17 00:00:00 2001 From: Dikshita Agarwal Date: Wed, 13 Jul 2022 14:35:30 +0530 Subject: [PATCH 0666/1061] video: driver: use cap id for v4l2 ctrl to hfi value mapping Use cap_id instead of ctrl_id while assigning the respective hfi values for a v4l2 control and vice versa. Change-Id: I42f3733a28b4b00ca04605dfc1d2ef0a6fb7833d Signed-off-by: Dikshita Agarwal --- driver/vidc/src/msm_vidc_control.c | 164 ++++++++++++++--------------- 1 file changed, 81 insertions(+), 83 deletions(-) diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 2baf220c14..fa2531edf1 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -4287,8 +4287,8 @@ int msm_vidc_v4l2_menu_to_hfi(struct msm_vidc_inst *inst, { struct msm_vidc_inst_capability *capability = inst->capabilities; - switch (capability->cap[cap_id].v4l2_id) { - case V4L2_CID_MPEG_VIDEO_H264_ENTROPY_MODE: + switch (cap_id) { + case ENTROPY_MODE: switch (capability->cap[cap_id].value) { case V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC: *value = 1; @@ -4301,30 +4301,31 @@ int msm_vidc_v4l2_menu_to_hfi(struct msm_vidc_inst *inst, goto set_default; } return 0; - case V4L2_CID_MPEG_VIDC_H264_ENCODE_DELIVERY_MODE: - switch (capability->cap[cap_id].value) { - case V4L2_MPEG_VIDC_H264_ENCODE_DELIVERY_MODE_FRAME_BASED: - *value = 0; - break; - case V4L2_MPEG_VIDC_H264_ENCODE_DELIVERY_MODE_SLICE_BASED: - *value = 1; - break; - default: - *value = 0; - goto set_default; - } - return 0; - case V4L2_CID_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE: - switch (capability->cap[cap_id].value) { - case V4L2_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE_FRAME_BASED: - *value = 0; - break; - case V4L2_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE_SLICE_BASED: - *value = 1; - break; - default: - *value = 0; - goto set_default; + case DELIVERY_MODE: + if (inst->codec == MSM_VIDC_H264) { + switch (capability->cap[cap_id].value) { + case V4L2_MPEG_VIDC_H264_ENCODE_DELIVERY_MODE_FRAME_BASED: + *value = 0; + break; + case V4L2_MPEG_VIDC_H264_ENCODE_DELIVERY_MODE_SLICE_BASED: + *value = 1; + break; + default: + *value = 0; + goto set_default; + } + } else if (inst->codec == MSM_VIDC_HEVC) { + switch (capability->cap[cap_id].value) { + case V4L2_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE_FRAME_BASED: + *value = 0; + break; + case V4L2_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE_SLICE_BASED: + *value = 1; + break; + default: + *value = 0; + goto set_default; + } } return 0; default: @@ -4347,38 +4348,34 @@ int msm_vidc_v4l2_to_hfi_enum(struct msm_vidc_inst *inst, { struct msm_vidc_inst_capability *capability = inst->capabilities; - switch (capability->cap[cap_id].v4l2_id) { - case V4L2_CID_MPEG_VIDEO_BITRATE_MODE: + switch (cap_id) { + case BITRATE_MODE: *value = inst->hfi_rc_type; return 0; - case V4L2_CID_MPEG_VIDEO_HEVC_PROFILE: - case V4L2_CID_MPEG_VIDEO_H264_PROFILE: - case V4L2_CID_MPEG_VIDEO_VP9_PROFILE: - case V4L2_CID_MPEG_VIDEO_AV1_PROFILE: - case V4L2_CID_MPEG_VIDEO_HEVC_LEVEL: - case V4L2_CID_MPEG_VIDEO_H264_LEVEL: - case V4L2_CID_MPEG_VIDEO_VP9_LEVEL: - case V4L2_CID_MPEG_VIDEO_AV1_LEVEL: - case V4L2_CID_MPEG_VIDEO_HEVC_TIER: - case V4L2_CID_MPEG_VIDEO_AV1_TIER: - case V4L2_CID_MPEG_VIDC_VIDEO_BLUR_TYPES: + case PROFILE: + case LEVEL: + case HEVC_TIER: + case AV1_TIER: + case BLUR_TYPES: *value = capability->cap[cap_id].value; return 0; - case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE: - switch (capability->cap[cap_id].value) { - case V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B: - *value = HFI_HIER_B; - break; - case V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P: - //TODO (AS): check if this is right mapping - *value = HFI_HIER_P_SLIDING_WINDOW; - break; - default: - *value = HFI_HIER_P_SLIDING_WINDOW; - goto set_default; + case LAYER_TYPE: + if (inst->codec == MSM_VIDC_HEVC) { + switch (capability->cap[cap_id].value) { + case V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B: + *value = HFI_HIER_B; + break; + case V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P: + //TODO (AS): check if this is right mapping + *value = HFI_HIER_P_SLIDING_WINDOW; + break; + default: + *value = HFI_HIER_P_SLIDING_WINDOW; + goto set_default; + } } return 0; - case V4L2_CID_ROTATE: + case ROTATION: switch (capability->cap[cap_id].value) { case 0: *value = HFI_ROTATION_NONE; @@ -4397,39 +4394,40 @@ int msm_vidc_v4l2_to_hfi_enum(struct msm_vidc_inst *inst, goto set_default; } return 0; - case V4L2_CID_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE: - switch (capability->cap[cap_id].value) { - case V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_ENABLED: - *value = HFI_DEBLOCK_ALL_BOUNDARY; - break; - case V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_DISABLED: - *value = HFI_DEBLOCK_DISABLE; - break; - case DB_HEVC_DISABLE_SLICE_BOUNDARY: - *value = HFI_DEBLOCK_DISABLE_AT_SLICE_BOUNDARY; - break; - default: - *value = HFI_DEBLOCK_ALL_BOUNDARY; - goto set_default; + case LF_MODE: + if (inst->codec == MSM_VIDC_HEVC) { + switch (capability->cap[cap_id].value) { + case V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_ENABLED: + *value = HFI_DEBLOCK_ALL_BOUNDARY; + break; + case V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_DISABLED: + *value = HFI_DEBLOCK_DISABLE; + break; + case DB_HEVC_DISABLE_SLICE_BOUNDARY: + *value = HFI_DEBLOCK_DISABLE_AT_SLICE_BOUNDARY; + break; + default: + *value = HFI_DEBLOCK_ALL_BOUNDARY; + goto set_default; + } + } else if (inst->codec == MSM_VIDC_H264) { + switch (capability->cap[cap_id].value) { + case V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED: + *value = HFI_DEBLOCK_ALL_BOUNDARY; + break; + case V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_DISABLED: + *value = HFI_DEBLOCK_DISABLE; + break; + case DB_H264_DISABLE_SLICE_BOUNDARY: + *value = HFI_DEBLOCK_DISABLE_AT_SLICE_BOUNDARY; + break; + default: + *value = HFI_DEBLOCK_ALL_BOUNDARY; + goto set_default; + } } return 0; - case V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_MODE: - switch (capability->cap[cap_id].value) { - case V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED: - *value = HFI_DEBLOCK_ALL_BOUNDARY; - break; - case V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_DISABLED: - *value = HFI_DEBLOCK_DISABLE; - break; - case DB_H264_DISABLE_SLICE_BOUNDARY: - *value = HFI_DEBLOCK_DISABLE_AT_SLICE_BOUNDARY; - break; - default: - *value = HFI_DEBLOCK_ALL_BOUNDARY; - goto set_default; - } - return 0; - case V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD: + case NAL_LENGTH_FIELD: switch (capability->cap[cap_id].value) { case V4L2_MPEG_VIDEO_HEVC_SIZE_4: *value = HFI_NAL_LENGTH_SIZE_4; From ea38b901b7e4ac062164ec949b91b16a2d9dbe5b Mon Sep 17 00:00:00 2001 From: Dikshita Agarwal Date: Tue, 19 Jul 2022 17:40:26 +0530 Subject: [PATCH 0667/1061] video: driver: update msm_media_info to use vidc colorformat Update all functions in msm_media_info.h to use vidc color formats instead of v4l2 color formats macros to restrict the usage of private color format defines in only helper functions. Change-Id: Ib308c76af7b16ddac93023202191a47b21d68f5c Signed-off-by: Dikshita Agarwal --- driver/platform/anorak/src/msm_vidc_anorak.c | 12 - driver/platform/kalama/src/msm_vidc_kalama.c | 12 - driver/platform/waipio/src/msm_vidc_waipio.c | 12 - .../variant/iris2/src/msm_vidc_buffer_iris2.c | 32 +-- .../variant/iris3/src/msm_vidc_buffer_iris3.c | 34 +-- driver/vidc/inc/msm_media_info.h | 231 +++++++++--------- driver/vidc/src/msm_vdec.c | 93 +++---- driver/vidc/src/msm_venc.c | 20 +- driver/vidc/src/msm_vidc_buffer.c | 12 +- driver/vidc/src/msm_vidc_driver.c | 1 - 10 files changed, 218 insertions(+), 241 deletions(-) diff --git a/driver/platform/anorak/src/msm_vidc_anorak.c b/driver/platform/anorak/src/msm_vidc_anorak.c index f0065c9e7f..432375c4ff 100644 --- a/driver/platform/anorak/src/msm_vidc_anorak.c +++ b/driver/platform/anorak/src/msm_vidc_anorak.c @@ -72,18 +72,6 @@ static struct msm_platform_core_capability core_data_anorak[] = { {HW_RESPONSE_TIMEOUT, HW_RESPONSE_TIMEOUT_VALUE}, /* 1000 ms */ {SW_PC_DELAY, SW_PC_DELAY_VALUE }, /* 1500 ms (>HW_RESPONSE_TIMEOUT)*/ {FW_UNLOAD_DELAY, FW_UNLOAD_DELAY_VALUE }, /* 3000 ms (>SW_PC_DELAY)*/ - // TODO: review below entries, and if required rename as PREFETCH - {PREFIX_BUF_COUNT_PIX, 18}, - {PREFIX_BUF_SIZE_PIX, 13434880}, /* Calculated by VIDEO_RAW_BUFFER_SIZE for 4096x2160 UBWC */ - {PREFIX_BUF_COUNT_NON_PIX, 1}, - {PREFIX_BUF_SIZE_NON_PIX, 209715200}, /* - * Internal buffer size is calculated for secure decode session - * of resolution 4k (4096x2160) - * Internal buf size = calculate_scratch_size() + - * calculate_scratch1_size() + calculate_persist1_size() - * Take maximum between VP9 10bit, HEVC 10bit, AVC secure - * decoder sessions - */ {PAGEFAULT_NON_FATAL, 1}, {PAGETABLE_CACHING, 0}, {DCVS, 1}, diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index e54398aafa..3a5d43c55a 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -73,18 +73,6 @@ static struct msm_platform_core_capability core_data_kalama[] = { {HW_RESPONSE_TIMEOUT, HW_RESPONSE_TIMEOUT_VALUE}, /* 1000 ms */ {SW_PC_DELAY, SW_PC_DELAY_VALUE }, /* 1500 ms (>HW_RESPONSE_TIMEOUT)*/ {FW_UNLOAD_DELAY, FW_UNLOAD_DELAY_VALUE }, /* 3000 ms (>SW_PC_DELAY)*/ - // TODO: review below entries, and if required rename as PREFETCH - {PREFIX_BUF_COUNT_PIX, 18}, - {PREFIX_BUF_SIZE_PIX, 13434880}, /* Calculated by VIDEO_RAW_BUFFER_SIZE for 4096x2160 UBWC */ - {PREFIX_BUF_COUNT_NON_PIX, 1}, - {PREFIX_BUF_SIZE_NON_PIX, 209715200}, /* - * Internal buffer size is calculated for secure decode session - * of resolution 4k (4096x2160) - * Internal buf size = calculate_scratch_size() + - * calculate_scratch1_size() + calculate_persist1_size() - * Take maximum between VP9 10bit, HEVC 10bit, AVC secure - * decoder sessions - */ {PAGEFAULT_NON_FATAL, 1}, {PAGETABLE_CACHING, 0}, {DCVS, 1}, diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 5faed41fd1..72c18b248f 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -69,18 +69,6 @@ static struct msm_platform_core_capability core_data_waipio[] = { {HW_RESPONSE_TIMEOUT, HW_RESPONSE_TIMEOUT_VALUE}, /* 1000 ms */ {SW_PC_DELAY, SW_PC_DELAY_VALUE }, /* 1500 ms (>HW_RESPONSE_TIMEOUT)*/ {FW_UNLOAD_DELAY, FW_UNLOAD_DELAY_VALUE }, /* 3000 ms (>SW_PC_DELAY)*/ - // TODO: review below entries, and if required rename as PREFETCH - {PREFIX_BUF_COUNT_PIX, 18}, - {PREFIX_BUF_SIZE_PIX, 13434880}, /* Calculated by VIDEO_RAW_BUFFER_SIZE for 4096x2160 UBWC */ - {PREFIX_BUF_COUNT_NON_PIX, 1}, - {PREFIX_BUF_SIZE_NON_PIX, 209715200}, /* - * Internal buffer size is calculated for secure decode session - * of resolution 4k (4096x2160) - * Internal buf size = calculate_scratch_size() + - * calculate_scratch1_size() + calculate_persist1_size() - * Take maximum between VP9 10bit, HEVC 10bit, AVC secure - * decoder sessions - */ {PAGEFAULT_NON_FATAL, 1}, {PAGETABLE_CACHING, 0}, {DCVS, 1}, diff --git a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c index 495d5b79e0..80d22934ca 100644 --- a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c @@ -221,23 +221,27 @@ static u32 msm_vidc_decoder_dpb_size_iris2(struct msm_vidc_inst *inst) height = f->fmt.pix_mp.height; if (color_fmt == MSM_VIDC_FMT_NV12) { - v4l2_fmt = V4L2_PIX_FMT_VIDC_NV12C; + color_fmt = MSM_VIDC_FMT_NV12C; HFI_NV12_UBWC_IL_CALC_BUF_SIZE_V2(size, width, height, - VIDEO_Y_STRIDE_BYTES(v4l2_fmt, width), VIDEO_Y_SCANLINES(v4l2_fmt, height), - VIDEO_UV_STRIDE_BYTES(v4l2_fmt, width), VIDEO_UV_SCANLINES(v4l2_fmt, height), - VIDEO_Y_META_STRIDE(v4l2_fmt, width), VIDEO_Y_META_SCANLINES(v4l2_fmt, - height), - VIDEO_UV_META_STRIDE(v4l2_fmt, width), VIDEO_UV_META_SCANLINES(v4l2_fmt, - height)); + video_y_stride_bytes(color_fmt, width), + video_y_scanlines(color_fmt, height), + video_uv_stride_bytes(color_fmt, width), + video_uv_scanlines(color_fmt, height), + video_y_meta_stride(color_fmt, width), + video_y_meta_scanlines(color_fmt, height), + video_uv_meta_stride(color_fmt, width), + video_uv_meta_scanlines(color_fmt, height)); } else if (color_fmt == MSM_VIDC_FMT_P010) { - v4l2_fmt = V4L2_PIX_FMT_VIDC_TP10C; + color_fmt = MSM_VIDC_FMT_TP10C; HFI_YUV420_TP10_UBWC_CALC_BUF_SIZE(size, - VIDEO_Y_STRIDE_BYTES(v4l2_fmt, width), VIDEO_Y_SCANLINES(v4l2_fmt, height), - VIDEO_UV_STRIDE_BYTES(v4l2_fmt, width), VIDEO_UV_SCANLINES(v4l2_fmt, height), - VIDEO_Y_META_STRIDE(v4l2_fmt, width), VIDEO_Y_META_SCANLINES(v4l2_fmt, - height), - VIDEO_UV_META_STRIDE(v4l2_fmt, width), VIDEO_UV_META_SCANLINES(v4l2_fmt, - height)); + video_y_stride_bytes(color_fmt, width), + video_y_scanlines(color_fmt, height), + video_uv_stride_bytes(color_fmt, width), + video_uv_scanlines(color_fmt, height), + video_y_meta_stride(color_fmt, width), + video_y_meta_scanlines(color_fmt, height), + video_uv_meta_stride(color_fmt, width), + video_uv_meta_scanlines(color_fmt, height)); } i_vpr_l(inst, "%s: size %d\n", __func__, size); diff --git a/driver/variant/iris3/src/msm_vidc_buffer_iris3.c b/driver/variant/iris3/src/msm_vidc_buffer_iris3.c index 5acf971322..93f062ad22 100644 --- a/driver/variant/iris3/src/msm_vidc_buffer_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_buffer_iris3.c @@ -260,7 +260,7 @@ static u32 msm_vidc_decoder_dpb_size_iris3(struct msm_vidc_inst *inst) { u32 size = 0; - u32 color_fmt, v4l2_fmt; + u32 color_fmt; u32 width, height; struct v4l2_format *f; @@ -285,24 +285,28 @@ static u32 msm_vidc_decoder_dpb_size_iris3(struct msm_vidc_inst *inst) if (color_fmt == MSM_VIDC_FMT_NV12 || color_fmt == MSM_VIDC_FMT_NV12C) { - v4l2_fmt = V4L2_PIX_FMT_VIDC_NV12C; + color_fmt = MSM_VIDC_FMT_NV12C; HFI_NV12_UBWC_IL_CALC_BUF_SIZE_V2(size, width, height, - VIDEO_Y_STRIDE_BYTES(v4l2_fmt, width), VIDEO_Y_SCANLINES(v4l2_fmt, height), - VIDEO_UV_STRIDE_BYTES(v4l2_fmt, width), VIDEO_UV_SCANLINES(v4l2_fmt, height), - VIDEO_Y_META_STRIDE(v4l2_fmt, width), VIDEO_Y_META_SCANLINES(v4l2_fmt, - height), - VIDEO_UV_META_STRIDE(v4l2_fmt, width), VIDEO_UV_META_SCANLINES(v4l2_fmt, - height)); + video_y_stride_bytes(color_fmt, width), + video_y_scanlines(color_fmt, height), + video_uv_stride_bytes(color_fmt, width), + video_uv_scanlines(color_fmt, height), + video_y_meta_stride(color_fmt, width), + video_y_meta_scanlines(color_fmt, height), + video_uv_meta_stride(color_fmt, width), + video_uv_meta_scanlines(color_fmt, height)); } else if (color_fmt == MSM_VIDC_FMT_P010 || color_fmt == MSM_VIDC_FMT_TP10C) { - v4l2_fmt = V4L2_PIX_FMT_VIDC_TP10C; + color_fmt = MSM_VIDC_FMT_TP10C; HFI_YUV420_TP10_UBWC_CALC_BUF_SIZE(size, - VIDEO_Y_STRIDE_BYTES(v4l2_fmt, width), VIDEO_Y_SCANLINES(v4l2_fmt, height), - VIDEO_UV_STRIDE_BYTES(v4l2_fmt, width), VIDEO_UV_SCANLINES(v4l2_fmt, height), - VIDEO_Y_META_STRIDE(v4l2_fmt, width), VIDEO_Y_META_SCANLINES(v4l2_fmt, - height), - VIDEO_UV_META_STRIDE(v4l2_fmt, width), VIDEO_UV_META_SCANLINES(v4l2_fmt, - height)); + video_y_stride_bytes(color_fmt, width), + video_y_scanlines(color_fmt, height), + video_uv_stride_bytes(color_fmt, width), + video_uv_scanlines(color_fmt, height), + video_y_meta_stride(color_fmt, width), + video_y_meta_scanlines(color_fmt, height), + video_uv_meta_stride(color_fmt, width), + video_uv_meta_scanlines(color_fmt, height)); } i_vpr_l(inst, "%s: size %d\n", __func__, size); diff --git a/driver/vidc/inc/msm_media_info.h b/driver/vidc/inc/msm_media_info.h index a1b1c95e9b..c0133270c2 100644 --- a/driver/vidc/inc/msm_media_info.h +++ b/driver/vidc/inc/msm_media_info.h @@ -6,8 +6,7 @@ #ifndef __MSM_MEDIA_INFO_H__ #define __MSM_MEDIA_INFO_H__ -#include -#include +#include "msm_vidc_internal.h" /* Width and Height should be multiple of 16 */ #define INTERLACE_WIDTH_MAX 1920 @@ -31,7 +30,7 @@ * Progressive: width * Interlaced: width */ -static inline unsigned int VIDEO_Y_STRIDE_BYTES(unsigned int v4l2_fmt, +static inline unsigned int video_y_stride_bytes(unsigned int colorformat, unsigned int width) { unsigned int alignment, stride = 0; @@ -39,19 +38,19 @@ static inline unsigned int VIDEO_Y_STRIDE_BYTES(unsigned int v4l2_fmt, if (!width) goto invalid_input; - switch (v4l2_fmt) { - case V4L2_PIX_FMT_NV12: - case V4L2_PIX_FMT_NV21: - case V4L2_PIX_FMT_VIDC_NV12C: + switch (colorformat) { + case MSM_VIDC_FMT_NV12: + case MSM_VIDC_FMT_NV21: + case MSM_VIDC_FMT_NV12C: alignment = 128; stride = MSM_MEDIA_ALIGN(width, alignment); break; - case V4L2_PIX_FMT_VIDC_TP10C: + case MSM_VIDC_FMT_TP10C: alignment = 256; stride = MSM_MEDIA_ALIGN(width, 192); stride = MSM_MEDIA_ALIGN(stride * 4/3, alignment); break; - case V4L2_PIX_FMT_VIDC_P010: + case MSM_VIDC_FMT_P010: alignment = 256; stride = MSM_MEDIA_ALIGN(width * 2, alignment); break; @@ -69,7 +68,7 @@ invalid_input: * Progressive: width * Interlaced: width */ -static inline unsigned int VIDEO_Y_STRIDE_PIX(unsigned int v4l2_fmt, +static inline unsigned int video_y_stride_pix(unsigned int colorformat, unsigned int width) { unsigned int alignment, stride = 0; @@ -77,15 +76,15 @@ static inline unsigned int VIDEO_Y_STRIDE_PIX(unsigned int v4l2_fmt, if (!width) goto invalid_input; - switch (v4l2_fmt) { - case V4L2_PIX_FMT_NV12: - case V4L2_PIX_FMT_NV21: - case V4L2_PIX_FMT_VIDC_NV12C: - case V4L2_PIX_FMT_VIDC_P010: + switch (colorformat) { + case MSM_VIDC_FMT_NV12: + case MSM_VIDC_FMT_NV21: + case MSM_VIDC_FMT_NV12C: + case MSM_VIDC_FMT_P010: alignment = 128; stride = MSM_MEDIA_ALIGN(width, alignment); break; - case V4L2_PIX_FMT_VIDC_TP10C: + case MSM_VIDC_FMT_TP10C: alignment = 192; stride = MSM_MEDIA_ALIGN(width, alignment); break; @@ -103,7 +102,7 @@ invalid_input: * Progressive: width * Interlaced: width */ -static inline unsigned int VIDEO_UV_STRIDE_BYTES(unsigned int v4l2_fmt, +static inline unsigned int video_uv_stride_bytes(unsigned int colorformat, unsigned int width) { unsigned int alignment, stride = 0; @@ -111,19 +110,19 @@ static inline unsigned int VIDEO_UV_STRIDE_BYTES(unsigned int v4l2_fmt, if (!width) goto invalid_input; - switch (v4l2_fmt) { - case V4L2_PIX_FMT_NV21: - case V4L2_PIX_FMT_NV12: - case V4L2_PIX_FMT_VIDC_NV12C: + switch (colorformat) { + case MSM_VIDC_FMT_NV21: + case MSM_VIDC_FMT_NV12: + case MSM_VIDC_FMT_NV12C: alignment = 128; stride = MSM_MEDIA_ALIGN(width, alignment); break; - case V4L2_PIX_FMT_VIDC_TP10C: + case MSM_VIDC_FMT_TP10C: alignment = 256; stride = MSM_MEDIA_ALIGN(width, 192); stride = MSM_MEDIA_ALIGN(stride * 4/3, alignment); break; - case V4L2_PIX_FMT_VIDC_P010: + case MSM_VIDC_FMT_P010: alignment = 256; stride = MSM_MEDIA_ALIGN(width * 2, alignment); break; @@ -141,7 +140,7 @@ invalid_input: * Progressive: width * Interlaced: width */ -static inline unsigned int VIDEO_UV_STRIDE_PIX(unsigned int v4l2_fmt, +static inline unsigned int video_uv_stride_pix(unsigned int colorformat, unsigned int width) { unsigned int alignment, stride = 0; @@ -149,15 +148,15 @@ static inline unsigned int VIDEO_UV_STRIDE_PIX(unsigned int v4l2_fmt, if (!width) goto invalid_input; - switch (v4l2_fmt) { - case V4L2_PIX_FMT_NV21: - case V4L2_PIX_FMT_NV12: - case V4L2_PIX_FMT_VIDC_NV12C: - case V4L2_PIX_FMT_VIDC_P010: + switch (colorformat) { + case MSM_VIDC_FMT_NV21: + case MSM_VIDC_FMT_NV12: + case MSM_VIDC_FMT_NV12C: + case MSM_VIDC_FMT_P010: alignment = 128; stride = MSM_MEDIA_ALIGN(width, alignment); break; - case V4L2_PIX_FMT_VIDC_TP10C: + case MSM_VIDC_FMT_TP10C: alignment = 192; stride = MSM_MEDIA_ALIGN(width, alignment); break; @@ -175,7 +174,7 @@ invalid_input: * Progressive: height * Interlaced: (height+1)>>1 */ -static inline unsigned int VIDEO_Y_SCANLINES(unsigned int v4l2_fmt, +static inline unsigned int video_y_scanlines(unsigned int colorformat, unsigned int height) { unsigned int alignment, sclines = 0; @@ -183,14 +182,14 @@ static inline unsigned int VIDEO_Y_SCANLINES(unsigned int v4l2_fmt, if (!height) goto invalid_input; - switch (v4l2_fmt) { - case V4L2_PIX_FMT_NV12: - case V4L2_PIX_FMT_NV21: - case V4L2_PIX_FMT_VIDC_NV12C: - case V4L2_PIX_FMT_VIDC_P010: + switch (colorformat) { + case MSM_VIDC_FMT_NV12: + case MSM_VIDC_FMT_NV21: + case MSM_VIDC_FMT_NV12C: + case MSM_VIDC_FMT_P010: alignment = 32; break; - case V4L2_PIX_FMT_VIDC_TP10C: + case MSM_VIDC_FMT_TP10C: alignment = 16; break; default: @@ -208,7 +207,7 @@ invalid_input: * Progressive: height * Interlaced: (height+1)>>1 */ -static inline unsigned int VIDEO_UV_SCANLINES(unsigned int v4l2_fmt, +static inline unsigned int video_uv_scanlines(unsigned int colorformat, unsigned int height) { unsigned int alignment, sclines = 0; @@ -216,14 +215,14 @@ static inline unsigned int VIDEO_UV_SCANLINES(unsigned int v4l2_fmt, if (!height) goto invalid_input; - switch (v4l2_fmt) { - case V4L2_PIX_FMT_NV21: - case V4L2_PIX_FMT_NV12: - case V4L2_PIX_FMT_VIDC_TP10C: - case V4L2_PIX_FMT_VIDC_P010: + switch (colorformat) { + case MSM_VIDC_FMT_NV21: + case MSM_VIDC_FMT_NV12: + case MSM_VIDC_FMT_TP10C: + case MSM_VIDC_FMT_P010: alignment = 16; break; - case V4L2_PIX_FMT_VIDC_NV12C: + case MSM_VIDC_FMT_NV12C: alignment = 32; break; default: @@ -243,7 +242,7 @@ invalid_input: * Progressive: width * Interlaced: width */ -static inline unsigned int VIDEO_Y_META_STRIDE(unsigned int v4l2_fmt, +static inline unsigned int video_y_meta_stride(unsigned int colorformat, unsigned int width) { int y_tile_width = 0, y_meta_stride = 0; @@ -251,11 +250,11 @@ static inline unsigned int VIDEO_Y_META_STRIDE(unsigned int v4l2_fmt, if (!width) goto invalid_input; - switch (v4l2_fmt) { - case V4L2_PIX_FMT_VIDC_NV12C: + switch (colorformat) { + case MSM_VIDC_FMT_NV12C: y_tile_width = 32; break; - case V4L2_PIX_FMT_VIDC_TP10C: + case MSM_VIDC_FMT_TP10C: y_tile_width = 48; break; default: @@ -276,7 +275,7 @@ invalid_input: * Progressive: height * Interlaced: (height+1)>>1 */ -static inline unsigned int VIDEO_Y_META_SCANLINES(unsigned int v4l2_fmt, +static inline unsigned int video_y_meta_scanlines(unsigned int colorformat, unsigned int height) { int y_tile_height = 0, y_meta_scanlines = 0; @@ -284,11 +283,11 @@ static inline unsigned int VIDEO_Y_META_SCANLINES(unsigned int v4l2_fmt, if (!height) goto invalid_input; - switch (v4l2_fmt) { - case V4L2_PIX_FMT_VIDC_NV12C: + switch (colorformat) { + case MSM_VIDC_FMT_NV12C: y_tile_height = 8; break; - case V4L2_PIX_FMT_VIDC_TP10C: + case MSM_VIDC_FMT_TP10C: y_tile_height = 4; break; default: @@ -309,7 +308,7 @@ invalid_input: * Progressive: width * Interlaced: width */ -static inline unsigned int VIDEO_UV_META_STRIDE(unsigned int v4l2_fmt, +static inline unsigned int video_uv_meta_stride(unsigned int colorformat, unsigned int width) { int uv_tile_width = 0, uv_meta_stride = 0; @@ -317,11 +316,11 @@ static inline unsigned int VIDEO_UV_META_STRIDE(unsigned int v4l2_fmt, if (!width) goto invalid_input; - switch (v4l2_fmt) { - case V4L2_PIX_FMT_VIDC_NV12C: + switch (colorformat) { + case MSM_VIDC_FMT_NV12C: uv_tile_width = 16; break; - case V4L2_PIX_FMT_VIDC_TP10C: + case MSM_VIDC_FMT_TP10C: uv_tile_width = 24; break; default: @@ -342,19 +341,19 @@ invalid_input: * Progressive: height * Interlaced: (height+1)>>1 */ -static inline unsigned int VIDEO_UV_META_SCANLINES(unsigned int v4l2_fmt, - unsigned int height) +static inline unsigned int video_uv_meta_scanlines( + unsigned int colorformat, unsigned int height) { int uv_tile_height = 0, uv_meta_scanlines = 0; if (!height) goto invalid_input; - switch (v4l2_fmt) { - case V4L2_PIX_FMT_VIDC_NV12C: + switch (colorformat) { + case MSM_VIDC_FMT_NV12C: uv_tile_height = 8; break; - case V4L2_PIX_FMT_VIDC_TP10C: + case MSM_VIDC_FMT_TP10C: uv_tile_height = 4; break; default: @@ -368,17 +367,17 @@ invalid_input: return uv_meta_scanlines; } -static inline unsigned int VIDEO_RGB_STRIDE_BYTES(unsigned int v4l2_fmt, - unsigned int width) +static inline unsigned int video_rgb_stride_bytes( + unsigned int colorformat, unsigned int width) { unsigned int alignment = 0, stride = 0, bpp = 4; if (!width) goto invalid_input; - switch (v4l2_fmt) { - case V4L2_PIX_FMT_VIDC_ARGB32C: - case V4L2_PIX_FMT_RGBA32: + switch (colorformat) { + case MSM_VIDC_FMT_RGBA8888C: + case MSM_VIDC_FMT_RGBA8888: alignment = 256; break; default: @@ -391,15 +390,15 @@ invalid_input: return stride; } -static inline unsigned int VIDEO_RGB_STRIDE_PIX(unsigned int v4l2_fmt, +static inline unsigned int video_rgb_stride_pix(unsigned int colorformat, unsigned int width) { unsigned int bpp = 4; - return VIDEO_RGB_STRIDE_BYTES(v4l2_fmt, width) / bpp; + return video_rgb_stride_bytes(colorformat, width) / bpp; } -static inline unsigned int VIDEO_RGB_SCANLINES(unsigned int v4l2_fmt, +static inline unsigned int video_rgb_scanlines(unsigned int colorformat, unsigned int height) { unsigned int alignment = 0, scanlines = 0; @@ -407,11 +406,11 @@ static inline unsigned int VIDEO_RGB_SCANLINES(unsigned int v4l2_fmt, if (!height) goto invalid_input; - switch (v4l2_fmt) { - case V4L2_PIX_FMT_VIDC_ARGB32C: + switch (colorformat) { + case MSM_VIDC_FMT_RGBA8888C: alignment = 16; break; - case V4L2_PIX_FMT_RGBA32: + case MSM_VIDC_FMT_RGBA8888: alignment = 32; break; default: @@ -424,17 +423,17 @@ invalid_input: return scanlines; } -static inline unsigned int VIDEO_RGB_META_STRIDE(unsigned int v4l2_fmt, - unsigned int width) +static inline unsigned int video_rgb_meta_stride( + unsigned int colorformat, unsigned int width) { int rgb_tile_width = 0, rgb_meta_stride = 0; if (!width) goto invalid_input; - switch (v4l2_fmt) { - case V4L2_PIX_FMT_VIDC_ARGB32C: - case V4L2_PIX_FMT_RGBA32: + switch (colorformat) { + case MSM_VIDC_FMT_RGBA8888C: + case MSM_VIDC_FMT_RGBA8888: rgb_tile_width = 16; break; default: @@ -448,17 +447,17 @@ invalid_input: return rgb_meta_stride; } -static inline unsigned int VIDEO_RGB_META_SCANLINES(unsigned int v4l2_fmt, - unsigned int height) +static inline unsigned int video_rgb_meta_scanlines( + unsigned int colorformat, unsigned int height) { int rgb_tile_height = 0, rgb_meta_scanlines = 0; if (!height) goto invalid_input; - switch (v4l2_fmt) { - case V4L2_PIX_FMT_VIDC_ARGB32C: - case V4L2_PIX_FMT_RGBA32: + switch (colorformat) { + case MSM_VIDC_FMT_RGBA8888C: + case MSM_VIDC_FMT_RGBA8888: rgb_tile_height = 4; break; default: @@ -472,7 +471,7 @@ invalid_input: return rgb_meta_scanlines; } -static inline unsigned int VIDEO_RAW_BUFFER_SIZE(unsigned int v4l2_fmt, +static inline unsigned int video_buffer_size(unsigned int colorformat, unsigned int pix_width, unsigned int pix_height, unsigned int interlace) { unsigned int size = 0; @@ -489,33 +488,33 @@ static inline unsigned int VIDEO_RAW_BUFFER_SIZE(unsigned int v4l2_fmt, if (!pix_width || !pix_height) goto invalid_input; - y_stride = VIDEO_Y_STRIDE_BYTES(v4l2_fmt, pix_width); - uv_stride = VIDEO_UV_STRIDE_BYTES(v4l2_fmt, pix_width); - y_sclines = VIDEO_Y_SCANLINES(v4l2_fmt, pix_height); - uv_sclines = VIDEO_UV_SCANLINES(v4l2_fmt, pix_height); - rgb_stride = VIDEO_RGB_STRIDE_BYTES(v4l2_fmt, pix_width); - rgb_scanlines = VIDEO_RGB_SCANLINES(v4l2_fmt, pix_height); + y_stride = video_y_stride_bytes(colorformat, pix_width); + uv_stride = video_uv_stride_bytes(colorformat, pix_width); + y_sclines = video_y_scanlines(colorformat, pix_height); + uv_sclines = video_uv_scanlines(colorformat, pix_height); + rgb_stride = video_rgb_stride_bytes(colorformat, pix_width); + rgb_scanlines = video_rgb_scanlines(colorformat, pix_height); - switch (v4l2_fmt) { - case V4L2_PIX_FMT_NV21: - case V4L2_PIX_FMT_NV12: - case V4L2_PIX_FMT_VIDC_P010: + switch (colorformat) { + case MSM_VIDC_FMT_NV21: + case MSM_VIDC_FMT_NV12: + case MSM_VIDC_FMT_P010: y_plane = y_stride * y_sclines; uv_plane = uv_stride * uv_sclines; size = y_plane + uv_plane; break; - case V4L2_PIX_FMT_VIDC_NV12C: - y_meta_stride = VIDEO_Y_META_STRIDE(v4l2_fmt, pix_width); - uv_meta_stride = VIDEO_UV_META_STRIDE(v4l2_fmt, pix_width); - if (!interlace && v4l2_fmt == V4L2_PIX_FMT_VIDC_NV12C) { + case MSM_VIDC_FMT_NV12C: + y_meta_stride = video_y_meta_stride(colorformat, pix_width); + uv_meta_stride = video_uv_meta_stride(colorformat, pix_width); + if (!interlace && colorformat == MSM_VIDC_FMT_NV12C) { y_ubwc_plane = MSM_MEDIA_ALIGN(y_stride * y_sclines, 4096); uv_ubwc_plane = MSM_MEDIA_ALIGN(uv_stride * uv_sclines, 4096); y_meta_scanlines = - VIDEO_Y_META_SCANLINES(v4l2_fmt, pix_height); + video_y_meta_scanlines(colorformat, pix_height); y_meta_plane = MSM_MEDIA_ALIGN( y_meta_stride * y_meta_scanlines, 4096); uv_meta_scanlines = - VIDEO_UV_META_SCANLINES(v4l2_fmt, pix_height); + video_uv_meta_scanlines(colorformat, pix_height); uv_meta_plane = MSM_MEDIA_ALIGN(uv_meta_stride * uv_meta_scanlines, 4096); size = (y_ubwc_plane + uv_ubwc_plane + y_meta_plane + @@ -525,36 +524,36 @@ static inline unsigned int VIDEO_RAW_BUFFER_SIZE(unsigned int v4l2_fmt, pix_height <= INTERLACE_HEIGHT_MAX && (pix_height * pix_width) / 256 <= INTERLACE_MB_PER_FRAME_MAX) { y_sclines = - VIDEO_Y_SCANLINES(v4l2_fmt, (pix_height+1)>>1); + video_y_scanlines(colorformat, (pix_height+1)>>1); y_ubwc_plane = MSM_MEDIA_ALIGN(y_stride * y_sclines, 4096); uv_sclines = - VIDEO_UV_SCANLINES(v4l2_fmt, (pix_height+1)>>1); + video_uv_scanlines(colorformat, (pix_height+1)>>1); uv_ubwc_plane = MSM_MEDIA_ALIGN(uv_stride * uv_sclines, 4096); y_meta_scanlines = - VIDEO_Y_META_SCANLINES(v4l2_fmt, (pix_height+1)>>1); + video_y_meta_scanlines(colorformat, (pix_height+1)>>1); y_meta_plane = MSM_MEDIA_ALIGN( y_meta_stride * y_meta_scanlines, 4096); uv_meta_scanlines = - VIDEO_UV_META_SCANLINES(v4l2_fmt, (pix_height+1)>>1); + video_uv_meta_scanlines(colorformat, (pix_height+1)>>1); uv_meta_plane = MSM_MEDIA_ALIGN(uv_meta_stride * uv_meta_scanlines, 4096); size = (y_ubwc_plane + uv_ubwc_plane + y_meta_plane + uv_meta_plane)*2; } else { - y_sclines = VIDEO_Y_SCANLINES(v4l2_fmt, pix_height); + y_sclines = video_y_scanlines(colorformat, pix_height); y_ubwc_plane = MSM_MEDIA_ALIGN(y_stride * y_sclines, 4096); - uv_sclines = VIDEO_UV_SCANLINES(v4l2_fmt, pix_height); + uv_sclines = video_uv_scanlines(colorformat, pix_height); uv_ubwc_plane = MSM_MEDIA_ALIGN(uv_stride * uv_sclines, 4096); y_meta_scanlines = - VIDEO_Y_META_SCANLINES(v4l2_fmt, pix_height); + video_y_meta_scanlines(colorformat, pix_height); y_meta_plane = MSM_MEDIA_ALIGN( y_meta_stride * y_meta_scanlines, 4096); uv_meta_scanlines = - VIDEO_UV_META_SCANLINES(v4l2_fmt, pix_height); + video_uv_meta_scanlines(colorformat, pix_height); uv_meta_plane = MSM_MEDIA_ALIGN(uv_meta_stride * uv_meta_scanlines, 4096); size = (y_ubwc_plane + uv_ubwc_plane + y_meta_plane + @@ -562,32 +561,32 @@ static inline unsigned int VIDEO_RAW_BUFFER_SIZE(unsigned int v4l2_fmt, } } break; - case V4L2_PIX_FMT_VIDC_TP10C: + case MSM_VIDC_FMT_TP10C: y_ubwc_plane = MSM_MEDIA_ALIGN(y_stride * y_sclines, 4096); uv_ubwc_plane = MSM_MEDIA_ALIGN(uv_stride * uv_sclines, 4096); - y_meta_stride = VIDEO_Y_META_STRIDE(v4l2_fmt, pix_width); - y_meta_scanlines = VIDEO_Y_META_SCANLINES(v4l2_fmt, pix_height); + y_meta_stride = video_y_meta_stride(colorformat, pix_width); + y_meta_scanlines = video_y_meta_scanlines(colorformat, pix_height); y_meta_plane = MSM_MEDIA_ALIGN( y_meta_stride * y_meta_scanlines, 4096); - uv_meta_stride = VIDEO_UV_META_STRIDE(v4l2_fmt, pix_width); - uv_meta_scanlines = VIDEO_UV_META_SCANLINES(v4l2_fmt, pix_height); + uv_meta_stride = video_uv_meta_stride(colorformat, pix_width); + uv_meta_scanlines = video_uv_meta_scanlines(colorformat, pix_height); uv_meta_plane = MSM_MEDIA_ALIGN(uv_meta_stride * uv_meta_scanlines, 4096); size = y_ubwc_plane + uv_ubwc_plane + y_meta_plane + uv_meta_plane; break; - case V4L2_PIX_FMT_VIDC_ARGB32C: + case MSM_VIDC_FMT_RGBA8888C: rgb_ubwc_plane = MSM_MEDIA_ALIGN(rgb_stride * rgb_scanlines, 4096); - rgb_meta_stride = VIDEO_RGB_META_STRIDE(v4l2_fmt, pix_width); - rgb_meta_scanlines = VIDEO_RGB_META_SCANLINES(v4l2_fmt, + rgb_meta_stride = video_rgb_meta_stride(colorformat, pix_width); + rgb_meta_scanlines = video_rgb_meta_scanlines(colorformat, pix_height); rgb_meta_plane = MSM_MEDIA_ALIGN(rgb_meta_stride * rgb_meta_scanlines, 4096); size = rgb_ubwc_plane + rgb_meta_plane; break; - case V4L2_PIX_FMT_RGBA32: + case MSM_VIDC_FMT_RGBA8888: rgb_plane = MSM_MEDIA_ALIGN(rgb_stride * rgb_scanlines, 4096); size = rgb_plane; break; diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index fc0c0841d4..daf9bf3abc 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -175,13 +175,12 @@ static int msm_vdec_set_linear_stride_scanline(struct msm_vidc_inst *inst) int rc = 0; u32 stride_y, scanline_y, stride_uv, scanline_uv; u32 payload[2]; + enum msm_vidc_colorformat_type colorformat; - if (inst->fmts[OUTPUT_PORT].fmt.pix_mp.pixelformat != - V4L2_PIX_FMT_NV12 && - inst->fmts[OUTPUT_PORT].fmt.pix_mp.pixelformat != - V4L2_PIX_FMT_VIDC_P010 && - inst->fmts[OUTPUT_PORT].fmt.pix_mp.pixelformat != - V4L2_PIX_FMT_NV21) + colorformat = v4l2_colorformat_to_driver( + inst->fmts[OUTPUT_PORT].fmt.pix_mp.pixelformat, __func__); + + if (!is_linear_yuv_colorformat(colorformat)) return 0; stride_y = inst->fmts[OUTPUT_PORT].fmt.pix_mp.width; @@ -216,27 +215,28 @@ static int msm_vdec_set_ubwc_stride_scanline(struct msm_vidc_inst *inst) u32 meta_stride_y, meta_scanline_y, meta_stride_uv, meta_scanline_uv; u32 payload[4]; struct v4l2_format *f; - u32 pix_fmt, width, height; + u32 pix_fmt, width, height, colorformat; f = &inst->fmts[OUTPUT_PORT]; pix_fmt = f->fmt.pix_mp.pixelformat; width = f->fmt.pix_mp.width; height = f->fmt.pix_mp.height; + colorformat = v4l2_colorformat_to_driver(pix_fmt, __func__); + if (inst->codec != MSM_VIDC_AV1 || - (pix_fmt != V4L2_PIX_FMT_VIDC_NV12C && - pix_fmt != V4L2_PIX_FMT_VIDC_TP10C)) + (!is_ubwc_colorformat(colorformat))) return 0; - stride_y = VIDEO_Y_STRIDE_BYTES(pix_fmt, width); - scanline_y = VIDEO_Y_SCANLINES(pix_fmt, height); - stride_uv = VIDEO_UV_STRIDE_BYTES(pix_fmt, width); - scanline_uv = VIDEO_UV_SCANLINES(pix_fmt, height); + stride_y = video_y_stride_bytes(colorformat, width); + scanline_y = video_y_scanlines(colorformat, height); + stride_uv = video_uv_stride_bytes(colorformat, width); + scanline_uv = video_uv_scanlines(colorformat, height); - meta_stride_y = VIDEO_Y_META_STRIDE(pix_fmt, width); - meta_scanline_y = VIDEO_Y_META_SCANLINES(pix_fmt, height); - meta_stride_uv = VIDEO_UV_META_STRIDE(pix_fmt, width); - meta_scanline_uv = VIDEO_UV_META_SCANLINES(pix_fmt, height); + meta_stride_y = video_y_meta_stride(colorformat, width); + meta_scanline_y = video_y_meta_scanlines(colorformat, height); + meta_stride_uv = video_uv_meta_stride(colorformat, width); + meta_scanline_uv = video_uv_meta_scanlines(colorformat, height); payload[0] = stride_y << 16 | scanline_y; payload[1] = stride_uv << 16 | scanline_uv; @@ -306,17 +306,18 @@ static int msm_vdec_set_bit_depth(struct msm_vidc_inst *inst, enum msm_vidc_port_type port) { int rc = 0; - u32 colorformat; + u32 pix_fmt; u32 bitdepth = 8 << 16 | 8; + enum msm_vidc_colorformat_type colorformat; if (port != INPUT_PORT && port != OUTPUT_PORT) { i_vpr_e(inst, "%s: invalid port %d\n", __func__, port); return -EINVAL; } - colorformat = inst->fmts[OUTPUT_PORT].fmt.pix_mp.pixelformat; - if (colorformat == V4L2_PIX_FMT_VIDC_P010 || - colorformat == V4L2_PIX_FMT_VIDC_TP10C) + pix_fmt = inst->fmts[OUTPUT_PORT].fmt.pix_mp.pixelformat; + colorformat = v4l2_colorformat_to_driver(pix_fmt, __func__); + if (is_10bit_colorformat(colorformat)) bitdepth = 10 << 16 | 10; inst->subcr_params[port].bit_depth = bitdepth; @@ -1232,6 +1233,7 @@ static int msm_vdec_read_input_subcr_params(struct msm_vidc_inst *inst) u32 full_range = 0; u32 colour_description_present_flag = 0; u32 video_signal_type_present_flag = 0; + enum msm_vidc_colorformat_type output_fmt; if (!inst || !inst->core || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); @@ -1248,13 +1250,15 @@ static int msm_vdec_read_input_subcr_params(struct msm_vidc_inst *inst) inst->fmts[INPUT_PORT].fmt.pix_mp.width = width; inst->fmts[INPUT_PORT].fmt.pix_mp.height = height; - inst->fmts[OUTPUT_PORT].fmt.pix_mp.width = VIDEO_Y_STRIDE_PIX( - inst->fmts[OUTPUT_PORT].fmt.pix_mp.pixelformat, width); - inst->fmts[OUTPUT_PORT].fmt.pix_mp.height = VIDEO_Y_SCANLINES( - inst->fmts[OUTPUT_PORT].fmt.pix_mp.pixelformat, height); + output_fmt = v4l2_colorformat_to_driver( + inst->fmts[OUTPUT_PORT].fmt.pix_mp.pixelformat, __func__); + + inst->fmts[OUTPUT_PORT].fmt.pix_mp.width = video_y_stride_pix( + output_fmt, width); + inst->fmts[OUTPUT_PORT].fmt.pix_mp.height = video_y_scanlines( + output_fmt, height); inst->fmts[OUTPUT_PORT].fmt.pix_mp.plane_fmt[0].bytesperline = - VIDEO_Y_STRIDE_BYTES( - inst->fmts[OUTPUT_PORT].fmt.pix_mp.pixelformat, width); + video_y_stride_bytes(output_fmt, width); inst->fmts[OUTPUT_PORT].fmt.pix_mp.plane_fmt[0].sizeimage = call_session_op(core, buffer_size, inst, MSM_VIDC_BUF_OUTPUT); //inst->buffers.output.size = inst->fmts[OUTPUT_PORT].fmt.pix_mp.plane_fmt[0].sizeimage; @@ -2304,7 +2308,8 @@ int msm_vdec_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) int rc = 0; struct msm_vidc_core *core; struct v4l2_format *fmt, *output_fmt; - u32 codec_align, pix_fmt; + u32 codec_align; + enum msm_vidc_colorformat_type colorformat; if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); @@ -2404,16 +2409,16 @@ int msm_vdec_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) f->fmt.pix_mp.width = inst->fmts[INPUT_PORT].fmt.pix_mp.width; } fmt->fmt.pix_mp.pixelformat = f->fmt.pix_mp.pixelformat; - fmt->fmt.pix_mp.width = VIDEO_Y_STRIDE_PIX( - fmt->fmt.pix_mp.pixelformat, f->fmt.pix_mp.width); - fmt->fmt.pix_mp.height = VIDEO_Y_SCANLINES( - fmt->fmt.pix_mp.pixelformat, - f->fmt.pix_mp.height); + colorformat = v4l2_colorformat_to_driver(fmt->fmt.pix_mp.pixelformat, + __func__); + fmt->fmt.pix_mp.width = video_y_stride_pix( + colorformat, f->fmt.pix_mp.width); + fmt->fmt.pix_mp.height = video_y_scanlines( + colorformat, f->fmt.pix_mp.height); fmt->fmt.pix_mp.num_planes = 1; fmt->fmt.pix_mp.plane_fmt[0].bytesperline = - VIDEO_Y_STRIDE_BYTES( - inst->fmts[OUTPUT_PORT].fmt.pix_mp.pixelformat, - f->fmt.pix_mp.width); + video_y_stride_bytes( + colorformat, f->fmt.pix_mp.width); fmt->fmt.pix_mp.plane_fmt[0].sizeimage = call_session_op(core, buffer_size, inst, MSM_VIDC_BUF_OUTPUT); @@ -2431,8 +2436,7 @@ int msm_vdec_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) } inst->buffers.output.size = fmt->fmt.pix_mp.plane_fmt[0].sizeimage; - pix_fmt = v4l2_colorformat_to_driver(f->fmt.pix_mp.pixelformat, __func__); - msm_vidc_update_cap_value(inst, PIX_FMTS, pix_fmt, __func__); + msm_vidc_update_cap_value(inst, PIX_FMTS, colorformat, __func__); /* update crop while input port is not streaming */ if (!inst->bufq[INPUT_PORT].vb2q->streaming) { @@ -2677,6 +2681,7 @@ int msm_vdec_inst_init(struct msm_vidc_inst *inst) int rc = 0; struct msm_vidc_core *core; struct v4l2_format *f; + enum msm_vidc_colorformat_type colorformat; if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); @@ -2727,15 +2732,13 @@ int msm_vdec_inst_init(struct msm_vidc_inst *inst) f = &inst->fmts[OUTPUT_PORT]; f->type = OUTPUT_MPLANE; f->fmt.pix_mp.pixelformat = V4L2_PIX_FMT_VIDC_NV12C; - f->fmt.pix_mp.width = VIDEO_Y_STRIDE_PIX(f->fmt.pix_mp.pixelformat, - DEFAULT_WIDTH); - f->fmt.pix_mp.height = VIDEO_Y_SCANLINES(f->fmt.pix_mp.pixelformat, - DEFAULT_HEIGHT); + colorformat = v4l2_colorformat_to_driver( + f->fmt.pix_mp.pixelformat, __func__); + f->fmt.pix_mp.width = video_y_stride_pix(colorformat, DEFAULT_WIDTH); + f->fmt.pix_mp.height = video_y_scanlines(colorformat, DEFAULT_HEIGHT); f->fmt.pix_mp.num_planes = 1; f->fmt.pix_mp.plane_fmt[0].bytesperline = - VIDEO_Y_STRIDE_BYTES( - inst->fmts[OUTPUT_PORT].fmt.pix_mp.pixelformat, - DEFAULT_WIDTH); + video_y_stride_bytes(colorformat, DEFAULT_WIDTH); f->fmt.pix_mp.plane_fmt[0].sizeimage = call_session_op(core, buffer_size, inst, MSM_VIDC_BUF_OUTPUT); f->fmt.pix_mp.field = V4L2_FIELD_NONE; diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index 160dbd4574..88d38207b4 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -167,14 +167,14 @@ static int msm_venc_set_stride_scanline(struct msm_vidc_inst *inst, stride_y = ALIGN(inst->fmts[INPUT_PORT].fmt.pix_mp.width, HEIC_GRID_DIMENSION); scanline_y = ALIGN(inst->fmts[INPUT_PORT].fmt.pix_mp.height, HEIC_GRID_DIMENSION); } else if (is_rgba_colorformat(color_format)) { - stride_y = VIDEO_RGB_STRIDE_PIX(inst->fmts[INPUT_PORT].fmt.pix_mp.pixelformat, + stride_y = video_rgb_stride_pix(color_format, inst->fmts[INPUT_PORT].fmt.pix_mp.width); - scanline_y = VIDEO_RGB_SCANLINES(inst->fmts[INPUT_PORT].fmt.pix_mp.pixelformat, + scanline_y = video_rgb_scanlines(color_format, inst->fmts[INPUT_PORT].fmt.pix_mp.height); } else { - stride_y = VIDEO_Y_STRIDE_PIX(inst->fmts[INPUT_PORT].fmt.pix_mp.pixelformat, + stride_y = video_y_stride_pix(color_format, inst->fmts[INPUT_PORT].fmt.pix_mp.width); - scanline_y = VIDEO_Y_SCANLINES(inst->fmts[INPUT_PORT].fmt.pix_mp.pixelformat, + scanline_y = video_y_scanlines(color_format, inst->fmts[INPUT_PORT].fmt.pix_mp.height); } if (color_format == MSM_VIDC_FMT_NV12 || @@ -1213,11 +1213,9 @@ static int msm_venc_s_fmt_input(struct msm_vidc_inst *inst, struct v4l2_format * bytesperline = ALIGN(f->fmt.pix_mp.width, HEIC_GRID_DIMENSION) * (is_10bit_colorformat(pix_fmt) ? 2 : 1); } else if (is_rgba_colorformat(pix_fmt)) { - bytesperline = VIDEO_RGB_STRIDE_BYTES(f->fmt.pix_mp.pixelformat, - f->fmt.pix_mp.width); + bytesperline = video_rgb_stride_bytes(pix_fmt, f->fmt.pix_mp.width); } else { - bytesperline = VIDEO_Y_STRIDE_BYTES(f->fmt.pix_mp.pixelformat, - f->fmt.pix_mp.width); + bytesperline = video_y_stride_bytes(pix_fmt, f->fmt.pix_mp.width); } fmt = &inst->fmts[INPUT_PORT]; @@ -1790,6 +1788,7 @@ int msm_venc_inst_init(struct msm_vidc_inst *inst) int rc = 0; struct msm_vidc_core *core; struct v4l2_format *f; + enum msm_vidc_colorformat_type colorformat; if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); @@ -1848,9 +1847,10 @@ int msm_venc_inst_init(struct msm_vidc_inst *inst) f->fmt.pix_mp.width = DEFAULT_WIDTH; f->fmt.pix_mp.height = DEFAULT_HEIGHT; f->fmt.pix_mp.num_planes = 1; + colorformat = v4l2_colorformat_to_driver(f->fmt.pix_mp.pixelformat, + __func__); f->fmt.pix_mp.plane_fmt[0].bytesperline = - VIDEO_Y_STRIDE_BYTES(f->fmt.pix_mp.pixelformat, - DEFAULT_WIDTH); + video_y_stride_bytes(colorformat, DEFAULT_WIDTH); f->fmt.pix_mp.plane_fmt[0].sizeimage = call_session_op(core, buffer_size, inst, MSM_VIDC_BUF_INPUT); f->fmt.pix_mp.field = V4L2_FIELD_NONE; diff --git a/driver/vidc/src/msm_vidc_buffer.c b/driver/vidc/src/msm_vidc_buffer.c index 22048e4f4e..a8fc74f886 100644 --- a/driver/vidc/src/msm_vidc_buffer.c +++ b/driver/vidc/src/msm_vidc_buffer.c @@ -272,10 +272,12 @@ u32 msm_vidc_decoder_output_size(struct msm_vidc_inst *inst) { u32 size; struct v4l2_format *f; + enum msm_vidc_colorformat_type colorformat; f = &inst->fmts[OUTPUT_PORT]; - size = VIDEO_RAW_BUFFER_SIZE(f->fmt.pix_mp.pixelformat, - f->fmt.pix_mp.width, + colorformat = v4l2_colorformat_to_driver(f->fmt.pix_mp.pixelformat, + __func__); + size = video_buffer_size(colorformat, f->fmt.pix_mp.width, f->fmt.pix_mp.height, true); return size; } @@ -300,16 +302,18 @@ u32 msm_vidc_encoder_input_size(struct msm_vidc_inst *inst) u32 size; struct v4l2_format *f; u32 width, height; + enum msm_vidc_colorformat_type colorformat; f = &inst->fmts[INPUT_PORT]; width = f->fmt.pix_mp.width; height = f->fmt.pix_mp.height; + colorformat = v4l2_colorformat_to_driver(f->fmt.pix_mp.pixelformat, + __func__); if (is_image_session(inst)) { width = ALIGN(width, HEIC_GRID_DIMENSION); height = ALIGN(height, HEIC_GRID_DIMENSION); } - size = VIDEO_RAW_BUFFER_SIZE(f->fmt.pix_mp.pixelformat, - width, height, true); + size = video_buffer_size(colorformat, width, height, true); return size; } diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 4657937f58..8687ccd08c 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -5,7 +5,6 @@ #include #include -#include #include "msm_media_info.h" #include "msm_vidc_driver.h" From c5c78e3ba24ae2d31ae64cf227d50a4e78d3b2fe Mon Sep 17 00:00:00 2001 From: Dikshita Agarwal Date: Tue, 26 Jul 2022 15:20:42 +0530 Subject: [PATCH 0668/1061] video: driver: move v4l2 to vidc mappings to target specific file Move mapping of v4l2 to vidc macros for codec, color format, color primaries etc to target specific file to restirct the usage of private v4l2 defines to target specific file. Change-Id: Ie83968cb944c756e55b6514c496c0b23c5d16413 Signed-off-by: Dikshita Agarwal --- .../platform/common/inc/msm_vidc_platform.h | 41 ++ driver/platform/kalama/src/kalama.c | 144 ++++- driver/platform/kalama/src/msm_vidc_kalama.c | 234 +++++++ .../variant/iris2/src/msm_vidc_buffer_iris2.c | 4 +- .../variant/iris3/src/msm_vidc_buffer_iris3.c | 4 +- driver/vidc/inc/msm_vidc_driver.h | 16 +- driver/vidc/inc/msm_vidc_internal.h | 1 + driver/vidc/src/msm_vdec.c | 58 +- driver/vidc/src/msm_venc.c | 53 +- driver/vidc/src/msm_vidc.c | 17 +- driver/vidc/src/msm_vidc_buffer.c | 4 +- driver/vidc/src/msm_vidc_driver.c | 605 ++++++++---------- driver/vidc/src/msm_vidc_power.c | 4 +- 13 files changed, 765 insertions(+), 420 deletions(-) diff --git a/driver/platform/common/inc/msm_vidc_platform.h b/driver/platform/common/inc/msm_vidc_platform.h index b94fc757f9..1e89136dc3 100644 --- a/driver/platform/common/inc/msm_vidc_platform.h +++ b/driver/platform/common/inc/msm_vidc_platform.h @@ -41,6 +41,33 @@ extern u32 vpe_csc_custom_matrix_coeff[MAX_MATRIX_COEFFS]; extern u32 vpe_csc_custom_bias_coeff[MAX_BIAS_COEFFS]; extern u32 vpe_csc_custom_limit_coeff[MAX_LIMIT_COEFFS]; +struct codec_info { + u32 v4l2_codec; + enum msm_vidc_codec_type vidc_codec; + const char *pixfmt_name; +}; + +struct color_format_info { + u32 v4l2_color_format; + enum msm_vidc_colorformat_type vidc_color_format; + const char *pixfmt_name; +}; + +struct color_primaries_info { + u32 v4l2_color_primaries; + enum msm_vidc_color_primaries vidc_color_primaries; +}; + +struct transfer_char_info { + u32 v4l2_transfer_char; + enum msm_vidc_transfer_characteristics vidc_transfer_char; +}; + +struct matrix_coeff_info { + u32 v4l2_matrix_coeff; + enum msm_vidc_matrix_coefficients vidc_matrix_coeff; +}; + struct msm_platform_core_capability { enum msm_vidc_core_capability_type type; u32 value; @@ -95,6 +122,19 @@ struct msm_vidc_ubwc_config_data { u32 bank_spreading; }; +struct msm_vidc_format_capability { + struct codec_info *codec_info; + u32 codec_info_size; + struct color_format_info *color_format_info; + u32 color_format_info_size; + struct color_primaries_info *color_prim_info; + u32 color_prim_info_size; + struct transfer_char_info *transfer_char_info; + u32 transfer_char_info_size; + struct matrix_coeff_info *matrix_coeff_info; + u32 matrix_coeff_info_size; +}; + struct msm_vidc_platform_data { struct msm_platform_core_capability *core_data; u32 core_data_size; @@ -107,6 +147,7 @@ struct msm_vidc_platform_data { struct msm_vidc_efuse_data *efuse_data; unsigned int efuse_data_size; unsigned int sku_version; + struct msm_vidc_format_capability *format_data; }; struct msm_vidc_platform { diff --git a/driver/platform/kalama/src/kalama.c b/driver/platform/kalama/src/kalama.c index 90c1db98b1..77bf986c87 100644 --- a/driver/platform/kalama/src/kalama.c +++ b/driver/platform/kalama/src/kalama.c @@ -9,7 +9,6 @@ #include "msm_vidc_kalama.h" #include "msm_vidc_platform.h" #include "msm_vidc_debug.h" -#include "msm_vidc_internal.h" #include "hfi_property.h" #include "msm_vidc_iris3.h" #include "hfi_command.h" @@ -41,6 +40,135 @@ #define CODECS_ALL (H264 | HEVC | VP9 | HEIC | AV1) #define MAXIMUM_OVERRIDE_VP9_FPS 180 +static struct codec_info codec_data_kalama[] = { + { + .v4l2_codec = V4L2_PIX_FMT_H264, + .vidc_codec = MSM_VIDC_H264, + .pixfmt_name = "AVC", + }, + { + .v4l2_codec = V4L2_PIX_FMT_HEVC, + .vidc_codec = MSM_VIDC_HEVC, + .pixfmt_name = "HEVC", + }, + { + .v4l2_codec = V4L2_PIX_FMT_VP9, + .vidc_codec = MSM_VIDC_VP9, + .pixfmt_name = "VP9", + }, +}; + +static struct color_format_info color_format_data_kalama[] = { + { + .v4l2_color_format = V4L2_PIX_FMT_NV12, + .vidc_color_format = MSM_VIDC_FMT_NV12, + .pixfmt_name = "NV12", + }, + { + .v4l2_color_format = V4L2_PIX_FMT_NV21, + .vidc_color_format = MSM_VIDC_FMT_NV21, + .pixfmt_name = "NV21", + }, + { + .v4l2_color_format = V4L2_PIX_FMT_RGBA32, + .vidc_color_format = MSM_VIDC_FMT_RGBA8888, + .pixfmt_name = "RGBA", + }, +}; + +static struct color_primaries_info color_primaries_data_kalama[] = { + { + .v4l2_color_primaries = V4L2_COLORSPACE_DEFAULT, + .vidc_color_primaries = MSM_VIDC_PRIMARIES_RESERVED, + }, + { + .v4l2_color_primaries = V4L2_COLORSPACE_REC709, + .vidc_color_primaries = MSM_VIDC_PRIMARIES_BT709, + }, + { + .v4l2_color_primaries = V4L2_COLORSPACE_470_SYSTEM_M, + .vidc_color_primaries = MSM_VIDC_PRIMARIES_BT470_SYSTEM_M, + }, + { + .v4l2_color_primaries = V4L2_COLORSPACE_470_SYSTEM_BG, + .vidc_color_primaries = MSM_VIDC_PRIMARIES_BT470_SYSTEM_BG, + }, + { + .v4l2_color_primaries = V4L2_COLORSPACE_SMPTE170M, + .vidc_color_primaries = MSM_VIDC_PRIMARIES_BT601_525, + }, + { + .v4l2_color_primaries = V4L2_COLORSPACE_SMPTE240M, + .vidc_color_primaries = MSM_VIDC_PRIMARIES_SMPTE_ST240M, + }, + { + .v4l2_color_primaries = V4L2_COLORSPACE_BT2020, + .vidc_color_primaries = MSM_VIDC_PRIMARIES_BT2020, + }, + { + .v4l2_color_primaries = V4L2_COLORSPACE_DCI_P3, + .vidc_color_primaries = MSM_VIDC_PRIMARIES_SMPTE_RP431_2, + }, +}; + +static struct transfer_char_info transfer_char_data_kalama[] = { + { + .v4l2_transfer_char = V4L2_XFER_FUNC_DEFAULT, + .vidc_transfer_char = MSM_VIDC_TRANSFER_RESERVED, + }, + { + .v4l2_transfer_char = V4L2_XFER_FUNC_709, + .vidc_transfer_char = MSM_VIDC_TRANSFER_BT709, + }, + { + .v4l2_transfer_char = V4L2_XFER_FUNC_SMPTE240M, + .vidc_transfer_char = MSM_VIDC_TRANSFER_SMPTE_ST240M, + }, + { + .v4l2_transfer_char = V4L2_XFER_FUNC_SRGB, + .vidc_transfer_char = MSM_VIDC_TRANSFER_SRGB_SYCC, + }, + { + .v4l2_transfer_char = V4L2_XFER_FUNC_SMPTE2084, + .vidc_transfer_char = MSM_VIDC_TRANSFER_SMPTE_ST2084_PQ, + }, +}; + +static struct matrix_coeff_info matrix_coeff_data_kalama[] = { + { + .v4l2_matrix_coeff = V4L2_YCBCR_ENC_DEFAULT, + .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_RESERVED, + }, + { + .v4l2_matrix_coeff = V4L2_YCBCR_ENC_709, + .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_BT709, + }, + { + .v4l2_matrix_coeff = V4L2_YCBCR_ENC_XV709, + .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_BT709, + }, + { + .v4l2_matrix_coeff = V4L2_YCBCR_ENC_XV601, + .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_BT470_SYS_BG_OR_BT601_625, + }, + { + .v4l2_matrix_coeff = V4L2_YCBCR_ENC_601, + .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_BT601_525_BT1358_525_OR_625, + }, + { + .v4l2_matrix_coeff = V4L2_YCBCR_ENC_SMPTE240M, + .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_SMPTE_ST240, + }, + { + .v4l2_matrix_coeff = V4L2_YCBCR_ENC_BT2020, + .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_BT2020_NON_CONSTANT, + }, + { + .v4l2_matrix_coeff = V4L2_YCBCR_ENC_BT2020_CONST_LUM, + .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_BT2020_CONSTANT, + }, +}; + static struct msm_platform_core_capability core_data_kalama[] = { /* {type, value} */ {ENC_CODECS, H264|HEVC|HEIC}, @@ -1799,6 +1927,19 @@ static struct msm_vidc_ubwc_config_data ubwc_config_kalama[] = { UBWC_CONFIG(8, 32, 16, 0, 1, 1, 1), }; +static struct msm_vidc_format_capability format_data_kalama = { + .codec_info = codec_data_kalama, + .codec_info_size = ARRAY_SIZE(codec_data_kalama), + .color_format_info = color_format_data_kalama, + .color_format_info_size = ARRAY_SIZE(color_format_data_kalama), + .color_prim_info = color_primaries_data_kalama, + .color_prim_info_size = ARRAY_SIZE(color_primaries_data_kalama), + .transfer_char_info = transfer_char_data_kalama, + .transfer_char_info_size = ARRAY_SIZE(transfer_char_data_kalama), + .matrix_coeff_info = matrix_coeff_data_kalama, + .matrix_coeff_info_size = ARRAY_SIZE(matrix_coeff_data_kalama), +}; + static const struct msm_vidc_platform_data kalama_data = { .core_data = core_data_kalama, .core_data_size = ARRAY_SIZE(core_data_kalama), @@ -1810,6 +1951,7 @@ static const struct msm_vidc_platform_data kalama_data = { .csc_data.vpe_csc_custom_matrix_coeff = vpe_csc_custom_matrix_coeff, .csc_data.vpe_csc_custom_limit_coeff = vpe_csc_custom_limit_coeff, .ubwc_config = ubwc_config_kalama, + .format_data = &format_data_kalama, }; int msm_vidc_kalama_check_ddr_type(void) diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index 3a5d43c55a..51855e0510 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -43,6 +43,226 @@ #define CODECS_ALL (H264 | HEVC | VP9 | HEIC | AV1) #define MAXIMUM_OVERRIDE_VP9_FPS 180 +static struct codec_info codec_data_kalama[] = { + { + .v4l2_codec = V4L2_PIX_FMT_H264, + .vidc_codec = MSM_VIDC_H264, + .pixfmt_name = "AVC", + }, + { + .v4l2_codec = V4L2_PIX_FMT_HEVC, + .vidc_codec = MSM_VIDC_HEVC, + .pixfmt_name = "HEVC", + }, + { + .v4l2_codec = V4L2_PIX_FMT_VP9, + .vidc_codec = MSM_VIDC_VP9, + .pixfmt_name = "VP9", + }, + { + .v4l2_codec = V4L2_PIX_FMT_AV1, + .vidc_codec = MSM_VIDC_AV1, + .pixfmt_name = "AV1", + }, + { + .v4l2_codec = V4L2_PIX_FMT_HEIC, + .vidc_codec = MSM_VIDC_HEIC, + .pixfmt_name = "HEIC", + }, +}; + +static struct color_format_info color_format_data_kalama[] = { + { + .v4l2_color_format = V4L2_PIX_FMT_NV12, + .vidc_color_format = MSM_VIDC_FMT_NV12, + .pixfmt_name = "NV12", + }, + { + .v4l2_color_format = V4L2_PIX_FMT_NV21, + .vidc_color_format = MSM_VIDC_FMT_NV21, + .pixfmt_name = "NV21", + }, + { + .v4l2_color_format = V4L2_PIX_FMT_VIDC_NV12C, + .vidc_color_format = MSM_VIDC_FMT_NV12C, + .pixfmt_name = "NV12C", + }, + { + .v4l2_color_format = V4L2_PIX_FMT_VIDC_TP10C, + .vidc_color_format = MSM_VIDC_FMT_TP10C, + .pixfmt_name = "TP10C", + }, + { + .v4l2_color_format = V4L2_PIX_FMT_RGBA32, + .vidc_color_format = MSM_VIDC_FMT_RGBA8888, + .pixfmt_name = "RGBA", + }, + { + .v4l2_color_format = V4L2_PIX_FMT_VIDC_ARGB32C, + .vidc_color_format = MSM_VIDC_FMT_RGBA8888C, + .pixfmt_name = "RGBAC", + }, + { + .v4l2_color_format = V4L2_PIX_FMT_VIDC_P010, + .vidc_color_format = MSM_VIDC_FMT_P010, + .pixfmt_name = "P010", + }, + { + .v4l2_color_format = V4L2_META_FMT_VIDC, + .vidc_color_format = MSM_VIDC_FMT_META, + .pixfmt_name = "META", + }, +}; + +static struct color_primaries_info color_primaries_data_kalama[] = { + { + .v4l2_color_primaries = V4L2_COLORSPACE_DEFAULT, + .vidc_color_primaries = MSM_VIDC_PRIMARIES_RESERVED, + }, + { + .v4l2_color_primaries = V4L2_COLORSPACE_REC709, + .vidc_color_primaries = MSM_VIDC_PRIMARIES_BT709, + }, + { + .v4l2_color_primaries = V4L2_COLORSPACE_470_SYSTEM_M, + .vidc_color_primaries = MSM_VIDC_PRIMARIES_BT470_SYSTEM_M, + }, + { + .v4l2_color_primaries = V4L2_COLORSPACE_470_SYSTEM_BG, + .vidc_color_primaries = MSM_VIDC_PRIMARIES_BT470_SYSTEM_BG, + }, + { + .v4l2_color_primaries = V4L2_COLORSPACE_SMPTE170M, + .vidc_color_primaries = MSM_VIDC_PRIMARIES_BT601_525, + }, + { + .v4l2_color_primaries = V4L2_COLORSPACE_SMPTE240M, + .vidc_color_primaries = MSM_VIDC_PRIMARIES_SMPTE_ST240M, + }, + { + .v4l2_color_primaries = V4L2_COLORSPACE_VIDC_GENERIC_FILM, + .vidc_color_primaries = MSM_VIDC_PRIMARIES_GENERIC_FILM, + }, + { + .v4l2_color_primaries = V4L2_COLORSPACE_BT2020, + .vidc_color_primaries = MSM_VIDC_PRIMARIES_BT2020, + }, + { + .v4l2_color_primaries = V4L2_COLORSPACE_DCI_P3, + .vidc_color_primaries = MSM_VIDC_PRIMARIES_SMPTE_RP431_2, + }, + { + .v4l2_color_primaries = V4L2_COLORSPACE_VIDC_EG431, + .vidc_color_primaries = MSM_VIDC_PRIMARIES_SMPTE_EG431_1, + }, + { + .v4l2_color_primaries = V4L2_COLORSPACE_VIDC_EBU_TECH, + .vidc_color_primaries = MSM_VIDC_PRIMARIES_SMPTE_EBU_TECH, + }, +}; + +static struct transfer_char_info transfer_char_data_kalama[] = { + { + .v4l2_transfer_char = V4L2_XFER_FUNC_DEFAULT, + .vidc_transfer_char = MSM_VIDC_TRANSFER_RESERVED, + }, + { + .v4l2_transfer_char = V4L2_XFER_FUNC_709, + .vidc_transfer_char = MSM_VIDC_TRANSFER_BT709, + }, + { + .v4l2_transfer_char = V4L2_XFER_FUNC_VIDC_BT470_SYSTEM_M, + .vidc_transfer_char = MSM_VIDC_TRANSFER_BT470_SYSTEM_M, + }, + { + .v4l2_transfer_char = V4L2_XFER_FUNC_VIDC_BT470_SYSTEM_BG, + .vidc_transfer_char = MSM_VIDC_TRANSFER_BT470_SYSTEM_BG, + }, + { + .v4l2_transfer_char = V4L2_XFER_FUNC_VIDC_BT601_525_OR_625, + .vidc_transfer_char = MSM_VIDC_TRANSFER_BT601_525_OR_625, + }, + { + .v4l2_transfer_char = V4L2_XFER_FUNC_SMPTE240M, + .vidc_transfer_char = MSM_VIDC_TRANSFER_SMPTE_ST240M, + }, + { + .v4l2_transfer_char = V4L2_XFER_FUNC_VIDC_LINEAR, + .vidc_transfer_char = MSM_VIDC_TRANSFER_LINEAR, + }, + { + .v4l2_transfer_char = V4L2_XFER_FUNC_VIDC_XVYCC, + .vidc_transfer_char = MSM_VIDC_TRANSFER_XVYCC, + }, + { + .v4l2_transfer_char = V4L2_XFER_FUNC_VIDC_BT1361, + .vidc_transfer_char = MSM_VIDC_TRANSFER_BT1361_0, + }, + { + .v4l2_transfer_char = V4L2_XFER_FUNC_SRGB, + .vidc_transfer_char = MSM_VIDC_TRANSFER_SRGB_SYCC, + }, + { + .v4l2_transfer_char = V4L2_XFER_FUNC_VIDC_BT2020, + .vidc_transfer_char = MSM_VIDC_TRANSFER_BT2020_14, + }, + { + .v4l2_transfer_char = V4L2_XFER_FUNC_SMPTE2084, + .vidc_transfer_char = MSM_VIDC_TRANSFER_SMPTE_ST2084_PQ, + }, + { + .v4l2_transfer_char = V4L2_XFER_FUNC_VIDC_ST428, + .vidc_transfer_char = MSM_VIDC_TRANSFER_SMPTE_ST428_1, + }, + { + .v4l2_transfer_char = V4L2_XFER_FUNC_VIDC_HLG, + .vidc_transfer_char = MSM_VIDC_TRANSFER_BT2100_2_HLG, + }, +}; + +static struct matrix_coeff_info matrix_coeff_data_kalama[] = { + { + .v4l2_matrix_coeff = V4L2_YCBCR_ENC_DEFAULT, + .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_RESERVED, + }, + { + .v4l2_matrix_coeff = V4L2_YCBCR_VIDC_SRGB_OR_SMPTE_ST428, + .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_SRGB_SMPTE_ST428_1, + }, + { + .v4l2_matrix_coeff = V4L2_YCBCR_ENC_709, + .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_BT709, + }, + { + .v4l2_matrix_coeff = V4L2_YCBCR_ENC_XV709, + .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_BT709, + }, + { + .v4l2_matrix_coeff = V4L2_YCBCR_VIDC_FCC47_73_682, + .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_FCC_TITLE_47, + }, + { + .v4l2_matrix_coeff = V4L2_YCBCR_ENC_XV601, + .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_BT470_SYS_BG_OR_BT601_625, + }, + { + .v4l2_matrix_coeff = V4L2_YCBCR_ENC_601, + .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_BT601_525_BT1358_525_OR_625, + }, + { + .v4l2_matrix_coeff = V4L2_YCBCR_ENC_SMPTE240M, + .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_SMPTE_ST240, + }, + { + .v4l2_matrix_coeff = V4L2_YCBCR_ENC_BT2020, + .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_BT2020_NON_CONSTANT, + }, + { + .v4l2_matrix_coeff = V4L2_YCBCR_ENC_BT2020_CONST_LUM, + .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_BT2020_CONSTANT, + }, +}; + static struct msm_platform_core_capability core_data_kalama[] = { /* {type, value} */ {ENC_CODECS, H264|HEVC|HEIC}, @@ -2419,6 +2639,19 @@ static struct msm_vidc_ubwc_config_data ubwc_config_kalama[] = { UBWC_CONFIG(8, 32, 16, 0, 1, 1, 1), }; +static struct msm_vidc_format_capability format_data_kalama = { + .codec_info = codec_data_kalama, + .codec_info_size = ARRAY_SIZE(codec_data_kalama), + .color_format_info = color_format_data_kalama, + .color_format_info_size = ARRAY_SIZE(color_format_data_kalama), + .color_prim_info = color_primaries_data_kalama, + .color_prim_info_size = ARRAY_SIZE(color_primaries_data_kalama), + .transfer_char_info = transfer_char_data_kalama, + .transfer_char_info_size = ARRAY_SIZE(transfer_char_data_kalama), + .matrix_coeff_info = matrix_coeff_data_kalama, + .matrix_coeff_info_size = ARRAY_SIZE(matrix_coeff_data_kalama), +}; + static const struct msm_vidc_platform_data kalama_data = { .core_data = core_data_kalama, .core_data_size = ARRAY_SIZE(core_data_kalama), @@ -2430,6 +2663,7 @@ static const struct msm_vidc_platform_data kalama_data = { .csc_data.vpe_csc_custom_matrix_coeff = vpe_csc_custom_matrix_coeff, .csc_data.vpe_csc_custom_limit_coeff = vpe_csc_custom_limit_coeff, .ubwc_config = ubwc_config_kalama, + .format_data = &format_data_kalama, }; int msm_vidc_kalama_check_ddr_type(void) diff --git a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c index 80d22934ca..3c4e1451c6 100644 --- a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c @@ -143,7 +143,7 @@ static u32 msm_vidc_decoder_line_size_iris2(struct msm_vidc_inst *inst) } num_vpp_pipes = core->capabilities[NUM_VPP_PIPE].value; - color_fmt = v4l2_colorformat_to_driver( + color_fmt = v4l2_colorformat_to_driver(inst, inst->fmts[OUTPUT_PORT].fmt.pix_mp.pixelformat, __func__); if (is_linear_colorformat(color_fmt)) is_opb = true; @@ -473,7 +473,7 @@ static u32 msm_vidc_encoder_vpss_size_iris2(struct msm_vidc_inst* inst) } f = &inst->fmts[INPUT_PORT]; - driver_colorfmt = v4l2_colorformat_to_driver( + driver_colorfmt = v4l2_colorformat_to_driver(inst, f->fmt.pix_mp.pixelformat, __func__); is_tenbit = is_10bit_colorformat(driver_colorfmt); if (inst->capabilities->cap[BLUR_TYPES].value != VIDC_BLUR_NONE) diff --git a/driver/variant/iris3/src/msm_vidc_buffer_iris3.c b/driver/variant/iris3/src/msm_vidc_buffer_iris3.c index 93f062ad22..589ab40eff 100644 --- a/driver/variant/iris3/src/msm_vidc_buffer_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_buffer_iris3.c @@ -157,7 +157,7 @@ static u32 msm_vidc_decoder_line_size_iris3(struct msm_vidc_inst *inst) } num_vpp_pipes = core->capabilities[NUM_VPP_PIPE].value; - color_fmt = v4l2_colorformat_to_driver( + color_fmt = v4l2_colorformat_to_driver(inst, inst->fmts[OUTPUT_PORT].fmt.pix_mp.pixelformat, __func__); if (is_linear_colorformat(color_fmt)) is_opb = true; @@ -539,7 +539,7 @@ static u32 msm_vidc_encoder_vpss_size_iris3(struct msm_vidc_inst* inst) } f = &inst->fmts[INPUT_PORT]; - driver_colorfmt = v4l2_colorformat_to_driver( + driver_colorfmt = v4l2_colorformat_to_driver(inst, f->fmt.pix_mp.pixelformat, __func__); is_tenbit = is_10bit_colorformat(driver_colorfmt); if (inst->capabilities->cap[BLUR_TYPES].value != VIDC_BLUR_NONE) diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index a66000321b..2b0977fee1 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -364,20 +364,20 @@ static inline bool is_sub_state(struct msm_vidc_inst *inst, } const char *cap_name(enum msm_vidc_inst_capability_type cap_id); -const char *v4l2_pixelfmt_name(u32 pixelfmt); +const char *v4l2_pixelfmt_name(struct msm_vidc_inst *inst, u32 pixelfmt); const char *v4l2_type_name(u32 port); void print_vidc_buffer(u32 tag, const char *tag_str, const char *str, struct msm_vidc_inst *inst, struct msm_vidc_buffer *vbuf); void print_vb2_buffer(const char *str, struct msm_vidc_inst *inst, struct vb2_buffer *vb2); -enum msm_vidc_codec_type v4l2_codec_to_driver(u32 v4l2_codec, - const char *func); -u32 v4l2_codec_from_driver(enum msm_vidc_codec_type codec, - const char *func); -enum msm_vidc_colorformat_type v4l2_colorformat_to_driver(u32 colorformat, - const char *func); -u32 v4l2_colorformat_from_driver(enum msm_vidc_colorformat_type colorformat, +enum msm_vidc_codec_type v4l2_codec_to_driver(struct msm_vidc_inst *inst, + u32 v4l2_codec, const char *func); +u32 v4l2_codec_from_driver(struct msm_vidc_inst *inst, enum msm_vidc_codec_type codec, const char *func); +enum msm_vidc_colorformat_type v4l2_colorformat_to_driver(struct msm_vidc_inst *inst, + u32 colorformat, const char *func); +u32 v4l2_colorformat_from_driver(struct msm_vidc_inst *inst, + enum msm_vidc_colorformat_type colorformat, const char *func); u32 v4l2_color_primaries_to_driver(struct msm_vidc_inst *inst, u32 v4l2_primaries, const char *func); u32 v4l2_color_primaries_from_driver(struct msm_vidc_inst *inst, diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 54843ba6f0..68765dca42 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -164,6 +164,7 @@ enum msm_vidc_colorformat_type { MSM_VIDC_FMT_P010 = BIT(4), MSM_VIDC_FMT_RGBA8888C = BIT(5), MSM_VIDC_FMT_RGBA8888 = BIT(6), + MSM_VIDC_FMT_META = BIT(31), }; enum msm_vidc_buffer_type { diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index daf9bf3abc..2244abe1f6 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -104,10 +104,10 @@ static int msm_vdec_codec_change(struct msm_vidc_inst *inst, u32 v4l2_codec) return 0; i_vpr_h(inst, "%s: codec changed from %s to %s\n", - __func__, v4l2_pixelfmt_name(inst->fmts[INPUT_PORT].fmt.pix_mp.pixelformat), - v4l2_pixelfmt_name(v4l2_codec)); + __func__, v4l2_pixelfmt_name(inst, inst->fmts[INPUT_PORT].fmt.pix_mp.pixelformat), + v4l2_pixelfmt_name(inst, v4l2_codec)); - inst->codec = v4l2_codec_to_driver(v4l2_codec, __func__); + inst->codec = v4l2_codec_to_driver(inst, v4l2_codec, __func__); if (!inst->codec) { i_vpr_e(inst, "%s: invalid codec %#x\n", __func__, v4l2_codec); rc = -EINVAL; @@ -177,7 +177,7 @@ static int msm_vdec_set_linear_stride_scanline(struct msm_vidc_inst *inst) u32 payload[2]; enum msm_vidc_colorformat_type colorformat; - colorformat = v4l2_colorformat_to_driver( + colorformat = v4l2_colorformat_to_driver(inst, inst->fmts[OUTPUT_PORT].fmt.pix_mp.pixelformat, __func__); if (!is_linear_yuv_colorformat(colorformat)) @@ -222,7 +222,7 @@ static int msm_vdec_set_ubwc_stride_scanline(struct msm_vidc_inst *inst) width = f->fmt.pix_mp.width; height = f->fmt.pix_mp.height; - colorformat = v4l2_colorformat_to_driver(pix_fmt, __func__); + colorformat = v4l2_colorformat_to_driver(inst, pix_fmt, __func__); if (inst->codec != MSM_VIDC_AV1 || (!is_ubwc_colorformat(colorformat))) @@ -316,7 +316,7 @@ static int msm_vdec_set_bit_depth(struct msm_vidc_inst *inst, } pix_fmt = inst->fmts[OUTPUT_PORT].fmt.pix_mp.pixelformat; - colorformat = v4l2_colorformat_to_driver(pix_fmt, __func__); + colorformat = v4l2_colorformat_to_driver(inst, pix_fmt, __func__); if (is_10bit_colorformat(colorformat)) bitdepth = 10 << 16 | 10; @@ -705,7 +705,7 @@ static int msm_vdec_set_colorformat(struct msm_vidc_inst *inst) u32 hfi_colorformat; pixelformat = inst->fmts[OUTPUT_PORT].fmt.pix_mp.pixelformat; - colorformat = v4l2_colorformat_to_driver(pixelformat, __func__); + colorformat = v4l2_colorformat_to_driver(inst, pixelformat, __func__); hfi_colorformat = get_hfi_colorformat(inst, colorformat); i_vpr_h(inst, "%s: hfi colorformat: %d", __func__, hfi_colorformat); @@ -1250,7 +1250,7 @@ static int msm_vdec_read_input_subcr_params(struct msm_vidc_inst *inst) inst->fmts[INPUT_PORT].fmt.pix_mp.width = width; inst->fmts[INPUT_PORT].fmt.pix_mp.height = height; - output_fmt = v4l2_colorformat_to_driver( + output_fmt = v4l2_colorformat_to_driver(inst, inst->fmts[OUTPUT_PORT].fmt.pix_mp.pixelformat, __func__); inst->fmts[OUTPUT_PORT].fmt.pix_mp.width = video_y_stride_pix( @@ -2245,22 +2245,23 @@ int msm_vdec_try_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) memset(pixmp->reserved, 0, sizeof(pixmp->reserved)); if (f->type == INPUT_MPLANE) { - pix_fmt = v4l2_codec_to_driver(f->fmt.pix_mp.pixelformat, __func__); + pix_fmt = v4l2_codec_to_driver(inst, f->fmt.pix_mp.pixelformat, __func__); if (!pix_fmt) { i_vpr_e(inst, "%s: unsupported codec, set current params\n", __func__); f->fmt.pix_mp.width = inst->fmts[INPUT_PORT].fmt.pix_mp.width; f->fmt.pix_mp.height = inst->fmts[INPUT_PORT].fmt.pix_mp.height; f->fmt.pix_mp.pixelformat = inst->fmts[INPUT_PORT].fmt.pix_mp.pixelformat; - pix_fmt = v4l2_codec_to_driver(f->fmt.pix_mp.pixelformat, __func__); + pix_fmt = v4l2_codec_to_driver(inst, f->fmt.pix_mp.pixelformat, __func__); } } else if (f->type == OUTPUT_MPLANE) { - pix_fmt = v4l2_colorformat_to_driver(f->fmt.pix_mp.pixelformat, __func__); + pix_fmt = v4l2_colorformat_to_driver(inst, f->fmt.pix_mp.pixelformat, __func__); if (!pix_fmt) { i_vpr_e(inst, "%s: unsupported format, set current params\n", __func__); f->fmt.pix_mp.pixelformat = inst->fmts[OUTPUT_PORT].fmt.pix_mp.pixelformat; f->fmt.pix_mp.width = inst->fmts[OUTPUT_PORT].fmt.pix_mp.width; f->fmt.pix_mp.height = inst->fmts[OUTPUT_PORT].fmt.pix_mp.height; - pix_fmt = v4l2_colorformat_to_driver(f->fmt.pix_mp.pixelformat, __func__); + pix_fmt = v4l2_colorformat_to_driver(inst, + f->fmt.pix_mp.pixelformat, __func__); } if (inst->bufq[INPUT_PORT].vb2q->streaming) { f->fmt.pix_mp.height = inst->fmts[INPUT_PORT].fmt.pix_mp.height; @@ -2378,7 +2379,7 @@ int msm_vdec_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) inst->crop.height = f->fmt.pix_mp.height; i_vpr_h(inst, "%s: type: INPUT, codec %s width %d height %d size %u min_count %d extra_count %d\n", - __func__, v4l2_pixelfmt_name(f->fmt.pix_mp.pixelformat), + __func__, v4l2_pixelfmt_name(inst, f->fmt.pix_mp.pixelformat), f->fmt.pix_mp.width, f->fmt.pix_mp.height, fmt->fmt.pix_mp.plane_fmt[0].sizeimage, inst->buffers.input.min_count, @@ -2386,7 +2387,8 @@ int msm_vdec_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) } else if (f->type == INPUT_META_PLANE) { fmt = &inst->fmts[INPUT_META_PORT]; fmt->type = INPUT_META_PLANE; - fmt->fmt.meta.dataformat = V4L2_META_FMT_VIDC; + fmt->fmt.meta.dataformat = + v4l2_colorformat_from_driver(inst, MSM_VIDC_FMT_META, __func__); fmt->fmt.meta.buffersize = call_session_op(core, buffer_size, inst, MSM_VIDC_BUF_INPUT_META); inst->buffers.input_meta.min_count = @@ -2409,7 +2411,7 @@ int msm_vdec_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) f->fmt.pix_mp.width = inst->fmts[INPUT_PORT].fmt.pix_mp.width; } fmt->fmt.pix_mp.pixelformat = f->fmt.pix_mp.pixelformat; - colorformat = v4l2_colorformat_to_driver(fmt->fmt.pix_mp.pixelformat, + colorformat = v4l2_colorformat_to_driver(inst, fmt->fmt.pix_mp.pixelformat, __func__); fmt->fmt.pix_mp.width = video_y_stride_pix( colorformat, f->fmt.pix_mp.width); @@ -2447,7 +2449,7 @@ int msm_vdec_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) } i_vpr_h(inst, "%s: type: OUTPUT, format %s width %d height %d size %u min_count %d extra_count %d\n", - __func__, v4l2_pixelfmt_name(fmt->fmt.pix_mp.pixelformat), + __func__, v4l2_pixelfmt_name(inst, fmt->fmt.pix_mp.pixelformat), fmt->fmt.pix_mp.width, fmt->fmt.pix_mp.height, fmt->fmt.pix_mp.plane_fmt[0].sizeimage, inst->buffers.output.min_count, @@ -2455,7 +2457,8 @@ int msm_vdec_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) } else if (f->type == OUTPUT_META_PLANE) { fmt = &inst->fmts[OUTPUT_META_PORT]; fmt->type = OUTPUT_META_PLANE; - fmt->fmt.meta.dataformat = V4L2_META_FMT_VIDC; + fmt->fmt.meta.dataformat = + v4l2_colorformat_from_driver(inst, MSM_VIDC_FMT_META, __func__); fmt->fmt.meta.buffersize = call_session_op(core, buffer_size, inst, MSM_VIDC_BUF_OUTPUT_META); inst->buffers.output_meta.min_count = @@ -2633,7 +2636,7 @@ int msm_vdec_enum_fmt(struct msm_vidc_inst *inst, struct v4l2_fmtdesc *f) } if (!array[f->index]) return -EINVAL; - f->pixelformat = v4l2_codec_from_driver(array[f->index], + f->pixelformat = v4l2_codec_from_driver(inst, array[f->index], __func__); if (!f->pixelformat) return -EINVAL; @@ -2656,14 +2659,15 @@ int msm_vdec_enum_fmt(struct msm_vidc_inst *inst, struct v4l2_fmtdesc *f) } if (!array[f->index]) return -EINVAL; - f->pixelformat = v4l2_colorformat_from_driver(array[f->index], + f->pixelformat = v4l2_colorformat_from_driver(inst, array[f->index], __func__); if (!f->pixelformat) return -EINVAL; strlcpy(f->description, "colorformat", sizeof(f->description)); } else if (f->type == INPUT_META_PLANE || f->type == OUTPUT_META_PLANE) { if (!f->index) { - f->pixelformat = V4L2_META_FMT_VIDC; + f->pixelformat = + v4l2_colorformat_from_driver(inst, MSM_VIDC_FMT_META, __func__); strlcpy(f->description, "metadata", sizeof(f->description)); } else { return -EINVAL; @@ -2672,7 +2676,8 @@ int msm_vdec_enum_fmt(struct msm_vidc_inst *inst, struct v4l2_fmtdesc *f) memset(f->reserved, 0, sizeof(f->reserved)); i_vpr_h(inst, "%s: index %d, %s: %s, flags %#x\n", - __func__, f->index, f->description, v4l2_pixelfmt_name(f->pixelformat), f->flags); + __func__, f->index, f->description, + v4l2_pixelfmt_name(inst, f->pixelformat), f->flags); return rc; } @@ -2722,7 +2727,8 @@ int msm_vdec_inst_init(struct msm_vidc_inst *inst) f = &inst->fmts[INPUT_META_PORT]; f->type = INPUT_META_PLANE; - f->fmt.meta.dataformat = V4L2_META_FMT_VIDC; + f->fmt.meta.dataformat = + v4l2_colorformat_from_driver(inst, MSM_VIDC_FMT_META, __func__);; f->fmt.meta.buffersize = MSM_VIDC_METADATA_SIZE; inst->buffers.input_meta.min_count = 0; inst->buffers.input_meta.extra_count = 0; @@ -2731,8 +2737,9 @@ int msm_vdec_inst_init(struct msm_vidc_inst *inst) f = &inst->fmts[OUTPUT_PORT]; f->type = OUTPUT_MPLANE; - f->fmt.pix_mp.pixelformat = V4L2_PIX_FMT_VIDC_NV12C; - colorformat = v4l2_colorformat_to_driver( + f->fmt.pix_mp.pixelformat = + v4l2_colorformat_from_driver(inst, MSM_VIDC_FMT_NV12C, __func__); + colorformat = v4l2_colorformat_to_driver(inst, f->fmt.pix_mp.pixelformat, __func__); f->fmt.pix_mp.width = video_y_stride_pix(colorformat, DEFAULT_WIDTH); f->fmt.pix_mp.height = video_y_scanlines(colorformat, DEFAULT_HEIGHT); @@ -2758,7 +2765,8 @@ int msm_vdec_inst_init(struct msm_vidc_inst *inst) f = &inst->fmts[OUTPUT_META_PORT]; f->type = OUTPUT_META_PLANE; - f->fmt.meta.dataformat = V4L2_META_FMT_VIDC; + f->fmt.meta.dataformat = + v4l2_colorformat_from_driver(inst, MSM_VIDC_FMT_META, __func__); f->fmt.meta.buffersize = MSM_VIDC_METADATA_SIZE; inst->buffers.output_meta.min_count = 0; inst->buffers.output_meta.extra_count = 0; diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index 88d38207b4..0e850bf757 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -66,10 +66,10 @@ static int msm_venc_codec_change(struct msm_vidc_inst *inst, u32 v4l2_codec) return 0; i_vpr_h(inst, "%s: codec changed from %s to %s\n", - __func__, v4l2_pixelfmt_name(inst->fmts[OUTPUT_PORT].fmt.pix_mp.pixelformat), - v4l2_pixelfmt_name(v4l2_codec)); + __func__, v4l2_pixelfmt_name(inst, inst->fmts[OUTPUT_PORT].fmt.pix_mp.pixelformat), + v4l2_pixelfmt_name(inst, v4l2_codec)); - inst->codec = v4l2_codec_to_driver(v4l2_codec, __func__); + inst->codec = v4l2_codec_to_driver(inst, v4l2_codec, __func__); if (!inst->codec) { i_vpr_e(inst, "%s: invalid codec %#x\n", __func__, v4l2_codec); rc = -EINVAL; @@ -120,10 +120,10 @@ static int msm_venc_set_colorformat(struct msm_vidc_inst *inst, } pixelformat = inst->fmts[INPUT_PORT].fmt.pix_mp.pixelformat; - colorformat = v4l2_colorformat_to_driver(pixelformat, __func__); + colorformat = v4l2_colorformat_to_driver(inst, pixelformat, __func__); if (!(colorformat & inst->capabilities->cap[PIX_FMTS].step_or_mask)) { i_vpr_e(inst, "%s: invalid pixelformat %s\n", - __func__, v4l2_pixelfmt_name(pixelformat)); + __func__, v4l2_pixelfmt_name(inst, pixelformat)); return -EINVAL; } @@ -324,7 +324,7 @@ static int msm_venc_set_colorspace(struct msm_vidc_inst* inst, } input_fmt = &inst->fmts[INPUT_PORT]; - pix_fmt = v4l2_colorformat_to_driver( + pix_fmt = v4l2_colorformat_to_driver(inst, input_fmt->fmt.pix_mp.pixelformat, __func__); if (inst->fmts[port].fmt.pix_mp.colorspace != V4L2_COLORSPACE_DEFAULT || inst->fmts[port].fmt.pix_mp.ycbcr_enc != V4L2_YCBCR_ENC_DEFAULT || @@ -1039,22 +1039,23 @@ int msm_venc_try_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) memset(pixmp->reserved, 0, sizeof(pixmp->reserved)); if (f->type == INPUT_MPLANE) { - pix_fmt = v4l2_colorformat_to_driver(f->fmt.pix_mp.pixelformat, __func__); + pix_fmt = v4l2_colorformat_to_driver(inst, f->fmt.pix_mp.pixelformat, __func__); if (!pix_fmt) { i_vpr_e(inst, "%s: unsupported format, set current params\n", __func__); f->fmt.pix_mp.pixelformat = inst->fmts[INPUT_PORT].fmt.pix_mp.pixelformat; f->fmt.pix_mp.width = inst->fmts[INPUT_PORT].fmt.pix_mp.width; f->fmt.pix_mp.height = inst->fmts[INPUT_PORT].fmt.pix_mp.height; - pix_fmt = v4l2_colorformat_to_driver(f->fmt.pix_mp.pixelformat, __func__); + pix_fmt = v4l2_colorformat_to_driver(inst, + f->fmt.pix_mp.pixelformat, __func__); } } else if (f->type == OUTPUT_MPLANE) { - pix_fmt = v4l2_codec_to_driver(f->fmt.pix_mp.pixelformat, __func__); + pix_fmt = v4l2_codec_to_driver(inst, f->fmt.pix_mp.pixelformat, __func__); if (!pix_fmt) { i_vpr_e(inst, "%s: unsupported codec, set current params\n", __func__); f->fmt.pix_mp.width = inst->fmts[OUTPUT_PORT].fmt.pix_mp.width; f->fmt.pix_mp.height = inst->fmts[OUTPUT_PORT].fmt.pix_mp.height; f->fmt.pix_mp.pixelformat = inst->fmts[OUTPUT_PORT].fmt.pix_mp.pixelformat; - pix_fmt = v4l2_codec_to_driver(f->fmt.pix_mp.pixelformat, __func__); + pix_fmt = v4l2_codec_to_driver(inst, f->fmt.pix_mp.pixelformat, __func__); } } else if (f->type == INPUT_META_PLANE) { f->fmt.meta.dataformat = inst->fmts[INPUT_META_PORT].fmt.meta.dataformat; @@ -1143,7 +1144,7 @@ int msm_venc_s_fmt_output(struct msm_vidc_inst *inst, struct v4l2_format *f) i_vpr_h(inst, "%s: type: OUTPUT, codec %s width %d height %d size %u min_count %d extra_count %d\n", - __func__, v4l2_pixelfmt_name(fmt->fmt.pix_mp.pixelformat), + __func__, v4l2_pixelfmt_name(inst, fmt->fmt.pix_mp.pixelformat), fmt->fmt.pix_mp.width, fmt->fmt.pix_mp.height, fmt->fmt.pix_mp.plane_fmt[0].sizeimage, inst->buffers.output.min_count, @@ -1168,7 +1169,8 @@ static int msm_venc_s_fmt_output_meta(struct msm_vidc_inst *inst, struct v4l2_fo fmt = &inst->fmts[OUTPUT_META_PORT]; fmt->type = OUTPUT_META_PLANE; - fmt->fmt.meta.dataformat = V4L2_META_FMT_VIDC; + fmt->fmt.meta.dataformat = + v4l2_colorformat_from_driver(inst, MSM_VIDC_FMT_META, __func__); fmt->fmt.meta.buffersize = call_session_op(core, buffer_size, inst, MSM_VIDC_BUF_OUTPUT_META); inst->buffers.output_meta.min_count = @@ -1203,7 +1205,7 @@ static int msm_venc_s_fmt_input(struct msm_vidc_inst *inst, struct v4l2_format * core = inst->core; msm_venc_try_fmt(inst, f); - pix_fmt = v4l2_colorformat_to_driver(f->fmt.pix_mp.pixelformat, __func__); + pix_fmt = v4l2_colorformat_to_driver(inst, f->fmt.pix_mp.pixelformat, __func__); msm_vidc_update_cap_value(inst, PIX_FMTS, pix_fmt, __func__); width = f->fmt.pix_mp.width; @@ -1283,7 +1285,7 @@ static int msm_venc_s_fmt_input(struct msm_vidc_inst *inst, struct v4l2_format * i_vpr_h(inst, "%s: type: INPUT, format %s width %d height %d size %u min_count %d extra_count %d\n", - __func__, v4l2_pixelfmt_name(fmt->fmt.pix_mp.pixelformat), + __func__, v4l2_pixelfmt_name(inst, fmt->fmt.pix_mp.pixelformat), fmt->fmt.pix_mp.width, fmt->fmt.pix_mp.height, fmt->fmt.pix_mp.plane_fmt[0].sizeimage, inst->buffers.input.min_count, @@ -1309,7 +1311,8 @@ static int msm_venc_s_fmt_input_meta(struct msm_vidc_inst *inst, struct v4l2_for fmt = &inst->fmts[INPUT_META_PORT]; fmt->type = INPUT_META_PLANE; - fmt->fmt.meta.dataformat = V4L2_META_FMT_VIDC; + fmt->fmt.meta.dataformat = + v4l2_colorformat_from_driver(inst, MSM_VIDC_FMT_META, __func__); fmt->fmt.meta.buffersize = call_session_op(core, buffer_size, inst, MSM_VIDC_BUF_INPUT_META); inst->buffers.input_meta.min_count = @@ -1742,7 +1745,7 @@ int msm_venc_enum_fmt(struct msm_vidc_inst *inst, struct v4l2_fmtdesc *f) } if (!array[f->index]) return -EINVAL; - f->pixelformat = v4l2_codec_from_driver(array[f->index], + f->pixelformat = v4l2_codec_from_driver(inst, array[f->index], __func__); if (!f->pixelformat) return -EINVAL; @@ -1762,14 +1765,15 @@ int msm_venc_enum_fmt(struct msm_vidc_inst *inst, struct v4l2_fmtdesc *f) } if (!array[f->index]) return -EINVAL; - f->pixelformat = v4l2_colorformat_from_driver(array[f->index], + f->pixelformat = v4l2_colorformat_from_driver(inst, array[f->index], __func__); if (!f->pixelformat) return -EINVAL; strlcpy(f->description, "colorformat", sizeof(f->description)); } else if (f->type == INPUT_META_PLANE || f->type == OUTPUT_META_PLANE) { if (!f->index) { - f->pixelformat = V4L2_META_FMT_VIDC; + f->pixelformat = + v4l2_colorformat_from_driver(inst, MSM_VIDC_FMT_META, __func__); strlcpy(f->description, "metadata", sizeof(f->description)); } else { return -EINVAL; @@ -1779,7 +1783,7 @@ int msm_venc_enum_fmt(struct msm_vidc_inst *inst, struct v4l2_fmtdesc *f) i_vpr_h(inst, "%s: index %d, %s: %s, flags %#x\n", __func__, f->index, f->description, - v4l2_pixelfmt_name(f->pixelformat), f->flags); + v4l2_pixelfmt_name(inst, f->pixelformat), f->flags); return rc; } @@ -1834,7 +1838,8 @@ int msm_venc_inst_init(struct msm_vidc_inst *inst) f = &inst->fmts[OUTPUT_META_PORT]; f->type = OUTPUT_META_PLANE; - f->fmt.meta.dataformat = V4L2_META_FMT_VIDC; + f->fmt.meta.dataformat = + v4l2_colorformat_from_driver(inst, MSM_VIDC_FMT_META, __func__); f->fmt.meta.buffersize = MSM_VIDC_METADATA_SIZE; inst->buffers.output_meta.min_count = 0; inst->buffers.output_meta.extra_count = 0; @@ -1843,11 +1848,12 @@ int msm_venc_inst_init(struct msm_vidc_inst *inst) f = &inst->fmts[INPUT_PORT]; f->type = INPUT_MPLANE; - f->fmt.pix_mp.pixelformat = V4L2_PIX_FMT_VIDC_NV12C; + f->fmt.pix_mp.pixelformat = + v4l2_colorformat_from_driver(inst, MSM_VIDC_FMT_NV12C, __func__); f->fmt.pix_mp.width = DEFAULT_WIDTH; f->fmt.pix_mp.height = DEFAULT_HEIGHT; f->fmt.pix_mp.num_planes = 1; - colorformat = v4l2_colorformat_to_driver(f->fmt.pix_mp.pixelformat, + colorformat = v4l2_colorformat_to_driver(inst, f->fmt.pix_mp.pixelformat, __func__); f->fmt.pix_mp.plane_fmt[0].bytesperline = video_y_stride_bytes(colorformat, DEFAULT_WIDTH); @@ -1869,7 +1875,8 @@ int msm_venc_inst_init(struct msm_vidc_inst *inst) f = &inst->fmts[INPUT_META_PORT]; f->type = INPUT_META_PLANE; - f->fmt.meta.dataformat = V4L2_META_FMT_VIDC; + f->fmt.meta.dataformat = + v4l2_colorformat_from_driver(inst, MSM_VIDC_FMT_META, __func__); f->fmt.meta.buffersize = MSM_VIDC_METADATA_SIZE; inst->buffers.input_meta.min_count = 0; inst->buffers.input_meta.extra_count = 0; diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index b61803b89b..225ec9bf6e 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -287,7 +287,7 @@ int msm_vidc_g_fmt(void *instance, struct v4l2_format *f) if (f->type == INPUT_MPLANE || f->type == OUTPUT_MPLANE) i_vpr_h(inst, "%s: type %s format %s width %d height %d size %d\n", __func__, v4l2_type_name(f->type), - v4l2_pixelfmt_name(f->fmt.pix_mp.pixelformat), + v4l2_pixelfmt_name(inst, f->fmt.pix_mp.pixelformat), f->fmt.pix_mp.width, f->fmt.pix_mp.height, f->fmt.pix_mp.plane_fmt[0].sizeimage); else if (f->type == INPUT_META_PLANE || f->type == OUTPUT_META_PLANE) @@ -684,6 +684,7 @@ int msm_vidc_enum_framesizes(void *instance, struct v4l2_frmsizeenum *fsize) struct msm_vidc_inst_capability *capability; enum msm_vidc_colorformat_type colorfmt; enum msm_vidc_codec_type codec; + u32 meta_fmt; if (!inst || !fsize) { d_vpr_e("%s: invalid params: %pK %pK\n", @@ -700,11 +701,13 @@ int msm_vidc_enum_framesizes(void *instance, struct v4l2_frmsizeenum *fsize) if (fsize->index) return -EINVAL; - if (fsize->pixel_format != V4L2_META_FMT_VIDC) { + meta_fmt = v4l2_colorformat_from_driver(inst, MSM_VIDC_FMT_META, __func__); + if (fsize->pixel_format != meta_fmt) { /* validate pixel format */ - codec = v4l2_codec_to_driver(fsize->pixel_format, __func__); + codec = v4l2_codec_to_driver(inst, fsize->pixel_format, __func__); if (!codec) { - colorfmt = v4l2_colorformat_to_driver(fsize->pixel_format, __func__); + colorfmt = v4l2_colorformat_to_driver(inst, fsize->pixel_format, + __func__); if (colorfmt == MSM_VIDC_FMT_NONE) { i_vpr_e(inst, "%s: unsupported pix fmt %#x\n", __func__, fsize->pixel_format); @@ -734,6 +737,7 @@ int msm_vidc_enum_frameintervals(void *instance, struct v4l2_frmivalenum *fival) struct msm_vidc_inst_capability *capability; enum msm_vidc_colorformat_type colorfmt; u32 fps, mbpf; + u32 meta_fmt; if (!inst || !fival) { d_vpr_e("%s: invalid params: %pK %pK\n", @@ -758,9 +762,10 @@ int msm_vidc_enum_frameintervals(void *instance, struct v4l2_frmivalenum *fival) if (fival->index) return -EINVAL; - if (fival->pixel_format != V4L2_META_FMT_VIDC) { + meta_fmt = v4l2_colorformat_from_driver(inst, MSM_VIDC_FMT_META, __func__); + if (fival->pixel_format != meta_fmt) { /* validate pixel format */ - colorfmt = v4l2_colorformat_to_driver(fival->pixel_format, __func__); + colorfmt = v4l2_colorformat_to_driver(inst, fival->pixel_format, __func__); if (colorfmt == MSM_VIDC_FMT_NONE) { i_vpr_e(inst, "%s: unsupported pix fmt %#x\n", __func__, fival->pixel_format); diff --git a/driver/vidc/src/msm_vidc_buffer.c b/driver/vidc/src/msm_vidc_buffer.c index a8fc74f886..9c552e74ef 100644 --- a/driver/vidc/src/msm_vidc_buffer.c +++ b/driver/vidc/src/msm_vidc_buffer.c @@ -275,7 +275,7 @@ u32 msm_vidc_decoder_output_size(struct msm_vidc_inst *inst) enum msm_vidc_colorformat_type colorformat; f = &inst->fmts[OUTPUT_PORT]; - colorformat = v4l2_colorformat_to_driver(f->fmt.pix_mp.pixelformat, + colorformat = v4l2_colorformat_to_driver(inst, f->fmt.pix_mp.pixelformat, __func__); size = video_buffer_size(colorformat, f->fmt.pix_mp.width, f->fmt.pix_mp.height, true); @@ -307,7 +307,7 @@ u32 msm_vidc_encoder_input_size(struct msm_vidc_inst *inst) f = &inst->fmts[INPUT_PORT]; width = f->fmt.pix_mp.width; height = f->fmt.pix_mp.height; - colorformat = v4l2_colorformat_to_driver(f->fmt.pix_mp.pixelformat, + colorformat = v4l2_colorformat_to_driver(inst, f->fmt.pix_mp.pixelformat, __func__); if (is_image_session(inst)) { width = ALIGN(width, HEIC_GRID_DIMENSION); diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 8687ccd08c..cf5dda57ab 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -398,27 +398,40 @@ const char *v4l2_type_name(u32 port) return "UNKNOWN"; } -const char *v4l2_pixelfmt_name(u32 pixfmt) +const char *v4l2_pixelfmt_name(struct msm_vidc_inst *inst, u32 pixfmt) { - switch (pixfmt) { - /* raw port: color format */ - case V4L2_PIX_FMT_NV12: return "NV12"; - case V4L2_PIX_FMT_NV21: return "NV21"; - case V4L2_PIX_FMT_VIDC_NV12C: return "NV12C"; - case V4L2_PIX_FMT_VIDC_P010: return "P010"; - case V4L2_PIX_FMT_VIDC_TP10C: return "TP10C"; - case V4L2_PIX_FMT_RGBA32: return "RGBA"; - case V4L2_PIX_FMT_VIDC_ARGB32C: return "RGBAC"; - /* bitstream port: codec type */ - case V4L2_PIX_FMT_H264: return "AVC"; - case V4L2_PIX_FMT_HEVC: return "HEVC"; - case V4L2_PIX_FMT_HEIC: return "HEIC"; - case V4L2_PIX_FMT_VP9: return "VP9"; - case V4L2_PIX_FMT_AV1: return "AV1"; - /* meta port */ - case V4L2_META_FMT_VIDC: return "META"; + struct msm_vidc_core *core; + const struct codec_info *codec_info; + const struct color_format_info *color_format_info; + u32 i, size; + + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + goto exit; } + core = inst->core; + if (!core->platform || !core->platform->data.format_data) { + d_vpr_e("%s: invalid core platform\n", __func__); + goto exit; + } + codec_info = core->platform->data.format_data->codec_info; + size = core->platform->data.format_data->codec_info_size; + + for (i = 0; i < size; i++) { + if (codec_info[i].v4l2_codec == pixfmt) + return codec_info[i].pixfmt_name; + } + + color_format_info = core->platform->data.format_data->color_format_info; + size = core->platform->data.format_data->color_format_info_size; + + for (i = 0; i < size; i++) { + if (color_format_info[i].v4l2_color_format == pixfmt) + return color_format_info[i].pixfmt_name; + } + +exit: return "UNKNOWN"; } @@ -546,423 +559,317 @@ u32 v4l2_type_from_driver(enum msm_vidc_buffer_type buffer_type, return type; } -enum msm_vidc_codec_type v4l2_codec_to_driver(u32 v4l2_codec, const char *func) +enum msm_vidc_codec_type v4l2_codec_to_driver(struct msm_vidc_inst *inst, + u32 v4l2_codec, const char *func) { + struct msm_vidc_core *core; + const struct codec_info *codec_info; + u32 i, size; enum msm_vidc_codec_type codec = 0; - switch (v4l2_codec) { - case V4L2_PIX_FMT_H264: - codec = MSM_VIDC_H264; - break; - case V4L2_PIX_FMT_HEVC: - codec = MSM_VIDC_HEVC; - break; - case V4L2_PIX_FMT_VP9: - codec = MSM_VIDC_VP9; - break; - case V4L2_PIX_FMT_AV1: - codec = MSM_VIDC_AV1; - break; - case V4L2_PIX_FMT_HEIC: - codec = MSM_VIDC_HEIC; - break; - default: - d_vpr_h("%s: invalid v4l2 codec %#x\n", func, v4l2_codec); - break; + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; } + + core = inst->core; + if (!core->platform || !core->platform->data.format_data) { + d_vpr_e("%s: invalid core platform\n", __func__); + return -EINVAL; + } + codec_info = core->platform->data.format_data->codec_info; + size = core->platform->data.format_data->codec_info_size; + + for (i = 0; i < size; i++) { + if (codec_info[i].v4l2_codec == v4l2_codec) + return codec_info[i].vidc_codec; + } + + d_vpr_h("%s: invalid v4l2 codec %#x\n", func, v4l2_codec); return codec; } -u32 v4l2_codec_from_driver(enum msm_vidc_codec_type codec, const char *func) +u32 v4l2_codec_from_driver(struct msm_vidc_inst *inst, + enum msm_vidc_codec_type codec, const char *func) { + struct msm_vidc_core *core; + const struct codec_info *codec_info; + u32 i, size; u32 v4l2_codec = 0; - switch (codec) { - case MSM_VIDC_H264: - v4l2_codec = V4L2_PIX_FMT_H264; - break; - case MSM_VIDC_HEVC: - v4l2_codec = V4L2_PIX_FMT_HEVC; - break; - case MSM_VIDC_VP9: - v4l2_codec = V4L2_PIX_FMT_VP9; - break; - case MSM_VIDC_AV1: - v4l2_codec = V4L2_PIX_FMT_AV1; - break; - case MSM_VIDC_HEIC: - v4l2_codec = V4L2_PIX_FMT_HEIC; - break; - default: - d_vpr_e("%s: invalid driver codec %#x\n", func, codec); - break; + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; } + + core = inst->core; + if (!core->platform || !core->platform->data.format_data) { + d_vpr_e("%s: invalid core platform\n", __func__); + return -EINVAL; + } + codec_info = core->platform->data.format_data->codec_info; + size = core->platform->data.format_data->codec_info_size; + + for (i = 0; i < size; i++) { + if (codec_info[i].vidc_codec == codec) + return codec_info[i].v4l2_codec; + } + + d_vpr_e("%s: invalid driver codec %#x\n", func, codec); return v4l2_codec; } -enum msm_vidc_colorformat_type v4l2_colorformat_to_driver(u32 v4l2_colorformat, - const char *func) +enum msm_vidc_colorformat_type v4l2_colorformat_to_driver( + struct msm_vidc_inst *inst, + u32 v4l2_colorformat, const char *func) { + struct msm_vidc_core *core; + const struct color_format_info *color_format_info; + u32 i, size; enum msm_vidc_colorformat_type colorformat = 0; - switch (v4l2_colorformat) { - case V4L2_PIX_FMT_NV12: - colorformat = MSM_VIDC_FMT_NV12; - break; - case V4L2_PIX_FMT_NV21: - colorformat = MSM_VIDC_FMT_NV21; - break; - case V4L2_PIX_FMT_VIDC_NV12C: - colorformat = MSM_VIDC_FMT_NV12C; - break; - case V4L2_PIX_FMT_VIDC_TP10C: - colorformat = MSM_VIDC_FMT_TP10C; - break; - case V4L2_PIX_FMT_RGBA32: - colorformat = MSM_VIDC_FMT_RGBA8888; - break; - case V4L2_PIX_FMT_VIDC_ARGB32C: - colorformat = MSM_VIDC_FMT_RGBA8888C; - break; - case V4L2_PIX_FMT_VIDC_P010: - colorformat = MSM_VIDC_FMT_P010; - break; - default: - d_vpr_e("%s: invalid v4l2 color format %#x\n", - func, v4l2_colorformat); - break; + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; } + + core = inst->core; + if (!core->platform || !core->platform->data.format_data) { + d_vpr_e("%s: invalid core platform\n", __func__); + return -EINVAL; + } + color_format_info = core->platform->data.format_data->color_format_info; + size = core->platform->data.format_data->color_format_info_size; + + for (i = 0; i < size; i++) { + if (color_format_info[i].v4l2_color_format == v4l2_colorformat) + return color_format_info[i].vidc_color_format; + } + + d_vpr_e("%s: invalid v4l2 color format %#x\n", func, v4l2_colorformat); return colorformat; } -u32 v4l2_colorformat_from_driver(enum msm_vidc_colorformat_type colorformat, +u32 v4l2_colorformat_from_driver(struct msm_vidc_inst *inst, + enum msm_vidc_colorformat_type colorformat, const char *func) { + struct msm_vidc_core *core; + const struct color_format_info *color_format_info; + u32 i, size; u32 v4l2_colorformat = 0; - switch (colorformat) { - case MSM_VIDC_FMT_NV12: - v4l2_colorformat = V4L2_PIX_FMT_NV12; - break; - case MSM_VIDC_FMT_NV21: - v4l2_colorformat = V4L2_PIX_FMT_NV21; - break; - case MSM_VIDC_FMT_NV12C: - v4l2_colorformat = V4L2_PIX_FMT_VIDC_NV12C; - break; - case MSM_VIDC_FMT_TP10C: - v4l2_colorformat = V4L2_PIX_FMT_VIDC_TP10C; - break; - case MSM_VIDC_FMT_RGBA8888: - v4l2_colorformat = V4L2_PIX_FMT_RGBA32; - break; - case MSM_VIDC_FMT_RGBA8888C: - v4l2_colorformat = V4L2_PIX_FMT_VIDC_ARGB32C; - break; - case MSM_VIDC_FMT_P010: - v4l2_colorformat = V4L2_PIX_FMT_VIDC_P010; - break; - default: - d_vpr_e("%s: invalid driver color format %#x\n", - func, colorformat); - break; + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; } + + core = inst->core; + if (!core->platform || !core->platform->data.format_data) { + d_vpr_e("%s: invalid core platform\n", __func__); + return -EINVAL; + } + color_format_info = core->platform->data.format_data->color_format_info; + size = core->platform->data.format_data->color_format_info_size; + + for (i = 0; i < size; i++) { + if (color_format_info[i].vidc_color_format == colorformat) + return color_format_info[i].v4l2_color_format; + } + + d_vpr_e("%s: invalid driver color format %#x\n", func, colorformat); return v4l2_colorformat; } u32 v4l2_color_primaries_to_driver(struct msm_vidc_inst *inst, u32 v4l2_primaries, const char *func) { + struct msm_vidc_core *core; + const struct color_primaries_info *color_prim_info; + u32 i, size; u32 vidc_color_primaries = MSM_VIDC_PRIMARIES_RESERVED; - switch(v4l2_primaries) { - case V4L2_COLORSPACE_DEFAULT: - vidc_color_primaries = MSM_VIDC_PRIMARIES_RESERVED; - break; - case V4L2_COLORSPACE_REC709: - vidc_color_primaries = MSM_VIDC_PRIMARIES_BT709; - break; - case V4L2_COLORSPACE_470_SYSTEM_M: - vidc_color_primaries = MSM_VIDC_PRIMARIES_BT470_SYSTEM_M; - break; - case V4L2_COLORSPACE_470_SYSTEM_BG: - vidc_color_primaries = MSM_VIDC_PRIMARIES_BT470_SYSTEM_BG; - break; - case V4L2_COLORSPACE_SMPTE170M: - vidc_color_primaries = MSM_VIDC_PRIMARIES_BT601_525; - break; - case V4L2_COLORSPACE_SMPTE240M: - vidc_color_primaries = MSM_VIDC_PRIMARIES_SMPTE_ST240M; - break; - case V4L2_COLORSPACE_VIDC_GENERIC_FILM: - vidc_color_primaries = MSM_VIDC_PRIMARIES_GENERIC_FILM; - break; - case V4L2_COLORSPACE_BT2020: - vidc_color_primaries = MSM_VIDC_PRIMARIES_BT2020; - break; - case V4L2_COLORSPACE_DCI_P3: - vidc_color_primaries = MSM_VIDC_PRIMARIES_SMPTE_RP431_2; - break; - case V4L2_COLORSPACE_VIDC_EG431: - vidc_color_primaries = MSM_VIDC_PRIMARIES_SMPTE_EG431_1; - break; - case V4L2_COLORSPACE_VIDC_EBU_TECH: - vidc_color_primaries = MSM_VIDC_PRIMARIES_SMPTE_EBU_TECH; - break; - default: - i_vpr_e(inst, "%s: invalid v4l2 color primaries %d\n", - func, v4l2_primaries); - break; + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; } + core = inst->core; + if (!core->platform || !core->platform->data.format_data) { + d_vpr_e("%s: invalid core platform\n", __func__); + return -EINVAL; + } + color_prim_info = core->platform->data.format_data->color_prim_info; + size = core->platform->data.format_data->color_prim_info_size; + + for (i = 0; i < size; i++) { + if (color_prim_info[i].v4l2_color_primaries == v4l2_primaries) + return color_prim_info[i].vidc_color_primaries; + } + + i_vpr_e(inst, "%s: invalid v4l2 color primaries %d\n", + func, v4l2_primaries); + return vidc_color_primaries; } u32 v4l2_color_primaries_from_driver(struct msm_vidc_inst *inst, u32 vidc_color_primaries, const char *func) { + struct msm_vidc_core *core; + const struct color_primaries_info *color_prim_info; + u32 i, size; u32 v4l2_primaries = V4L2_COLORSPACE_DEFAULT; - switch(vidc_color_primaries) { - case MSM_VIDC_PRIMARIES_UNSPECIFIED: - v4l2_primaries = V4L2_COLORSPACE_DEFAULT; - break; - case MSM_VIDC_PRIMARIES_BT709: - v4l2_primaries = V4L2_COLORSPACE_REC709; - break; - case MSM_VIDC_PRIMARIES_BT470_SYSTEM_M: - v4l2_primaries = V4L2_COLORSPACE_470_SYSTEM_M; - break; - case MSM_VIDC_PRIMARIES_BT470_SYSTEM_BG: - v4l2_primaries = V4L2_COLORSPACE_470_SYSTEM_BG; - break; - case MSM_VIDC_PRIMARIES_BT601_525: - v4l2_primaries = V4L2_COLORSPACE_SMPTE170M; - break; - case MSM_VIDC_PRIMARIES_SMPTE_ST240M: - v4l2_primaries = V4L2_COLORSPACE_SMPTE240M; - break; - case MSM_VIDC_PRIMARIES_GENERIC_FILM: - v4l2_primaries = V4L2_COLORSPACE_VIDC_GENERIC_FILM; - break; - case MSM_VIDC_PRIMARIES_BT2020: - v4l2_primaries = V4L2_COLORSPACE_BT2020; - break; - case MSM_VIDC_PRIMARIES_SMPTE_RP431_2: - v4l2_primaries = V4L2_COLORSPACE_DCI_P3; - break; - case MSM_VIDC_PRIMARIES_SMPTE_EG431_1: - v4l2_primaries = V4L2_COLORSPACE_VIDC_EG431; - break; - case MSM_VIDC_PRIMARIES_SMPTE_EBU_TECH: - v4l2_primaries = V4L2_COLORSPACE_VIDC_EBU_TECH; - break; - default: - i_vpr_e(inst, "%s: invalid hfi color primaries %d\n", - func, vidc_color_primaries); - break; + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; } + core = inst->core; + if (!core->platform || !core->platform->data.format_data) { + d_vpr_e("%s: invalid core platform\n", __func__); + return -EINVAL; + } + color_prim_info = core->platform->data.format_data->color_prim_info; + size = core->platform->data.format_data->color_prim_info_size; + + for (i = 0; i < size; i++) { + if (color_prim_info[i].vidc_color_primaries == vidc_color_primaries) + return color_prim_info[i].v4l2_color_primaries; + } + + i_vpr_e(inst, "%s: invalid hfi color primaries %d\n", + func, vidc_color_primaries); + return v4l2_primaries; } u32 v4l2_transfer_char_to_driver(struct msm_vidc_inst *inst, u32 v4l2_transfer_char, const char *func) { + struct msm_vidc_core *core; + const struct transfer_char_info *transfer_char_info; + u32 i, size; u32 vidc_transfer_char = MSM_VIDC_TRANSFER_RESERVED; - switch(v4l2_transfer_char) { - case V4L2_XFER_FUNC_DEFAULT: - vidc_transfer_char = MSM_VIDC_TRANSFER_RESERVED; - break; - case V4L2_XFER_FUNC_709: - vidc_transfer_char = MSM_VIDC_TRANSFER_BT709; - break; - case V4L2_XFER_FUNC_VIDC_BT470_SYSTEM_M: - vidc_transfer_char = MSM_VIDC_TRANSFER_BT470_SYSTEM_M; - break; - case V4L2_XFER_FUNC_VIDC_BT470_SYSTEM_BG: - vidc_transfer_char = MSM_VIDC_TRANSFER_BT470_SYSTEM_BG; - break; - case V4L2_XFER_FUNC_VIDC_BT601_525_OR_625: - vidc_transfer_char = MSM_VIDC_TRANSFER_BT601_525_OR_625; - break; - case V4L2_XFER_FUNC_SMPTE240M: - vidc_transfer_char = MSM_VIDC_TRANSFER_SMPTE_ST240M; - break; - case V4L2_XFER_FUNC_VIDC_LINEAR: - vidc_transfer_char = MSM_VIDC_TRANSFER_LINEAR; - break; - case V4L2_XFER_FUNC_VIDC_XVYCC: - vidc_transfer_char = MSM_VIDC_TRANSFER_XVYCC; - break; - case V4L2_XFER_FUNC_VIDC_BT1361: - vidc_transfer_char = MSM_VIDC_TRANSFER_BT1361_0; - break; - case V4L2_XFER_FUNC_SRGB: - vidc_transfer_char = MSM_VIDC_TRANSFER_SRGB_SYCC; - break; - case V4L2_XFER_FUNC_VIDC_BT2020: - vidc_transfer_char = MSM_VIDC_TRANSFER_BT2020_14; - break; - case V4L2_XFER_FUNC_SMPTE2084: - vidc_transfer_char = MSM_VIDC_TRANSFER_SMPTE_ST2084_PQ; - break; - case V4L2_XFER_FUNC_VIDC_ST428: - vidc_transfer_char = MSM_VIDC_TRANSFER_SMPTE_ST428_1; - break; - case V4L2_XFER_FUNC_VIDC_HLG: - vidc_transfer_char = MSM_VIDC_TRANSFER_BT2100_2_HLG; - break; - default: - i_vpr_e(inst, "%s: invalid v4l2 transfer char %d\n", - func, v4l2_transfer_char); - break; + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; } + core = inst->core; + if (!core->platform || !core->platform->data.format_data) { + d_vpr_e("%s: invalid core platform\n", __func__); + return -EINVAL; + } + transfer_char_info = core->platform->data.format_data->transfer_char_info; + size = core->platform->data.format_data->transfer_char_info_size; + + for (i = 0; i < size; i++) { + if (transfer_char_info[i].v4l2_transfer_char == v4l2_transfer_char) + return transfer_char_info[i].vidc_transfer_char; + } + + i_vpr_e(inst, "%s: invalid v4l2 transfer char %d\n", + func, v4l2_transfer_char); + return vidc_transfer_char; } u32 v4l2_transfer_char_from_driver(struct msm_vidc_inst *inst, u32 vidc_transfer_char, const char *func) { + struct msm_vidc_core *core; + const struct transfer_char_info *transfer_char_info; + u32 i, size; u32 v4l2_transfer_char = V4L2_XFER_FUNC_DEFAULT; - switch(vidc_transfer_char) { - case MSM_VIDC_TRANSFER_UNSPECIFIED: - v4l2_transfer_char = V4L2_XFER_FUNC_DEFAULT; - break; - case MSM_VIDC_TRANSFER_BT709: - v4l2_transfer_char = V4L2_XFER_FUNC_709; - break; - case MSM_VIDC_TRANSFER_BT470_SYSTEM_M: - v4l2_transfer_char = V4L2_XFER_FUNC_VIDC_BT470_SYSTEM_M; - break; - case MSM_VIDC_TRANSFER_BT470_SYSTEM_BG: - v4l2_transfer_char = V4L2_XFER_FUNC_VIDC_BT470_SYSTEM_BG; - break; - case MSM_VIDC_TRANSFER_BT601_525_OR_625: - v4l2_transfer_char = V4L2_XFER_FUNC_VIDC_BT601_525_OR_625; - break; - case MSM_VIDC_TRANSFER_SMPTE_ST240M: - v4l2_transfer_char = V4L2_XFER_FUNC_SMPTE240M; - break; - case MSM_VIDC_TRANSFER_LINEAR: - v4l2_transfer_char = V4L2_XFER_FUNC_VIDC_LINEAR; - break; - case MSM_VIDC_TRANSFER_XVYCC: - v4l2_transfer_char = V4L2_XFER_FUNC_VIDC_XVYCC; - break; - case MSM_VIDC_TRANSFER_BT1361_0: - v4l2_transfer_char = V4L2_XFER_FUNC_VIDC_BT1361; - break; - case MSM_VIDC_TRANSFER_SRGB_SYCC: - v4l2_transfer_char = V4L2_XFER_FUNC_SRGB; - break; - case MSM_VIDC_TRANSFER_BT2020_14: - case MSM_VIDC_TRANSFER_BT2020_15: - v4l2_transfer_char = V4L2_XFER_FUNC_VIDC_BT2020; - break; - case MSM_VIDC_TRANSFER_SMPTE_ST2084_PQ: - v4l2_transfer_char = V4L2_XFER_FUNC_SMPTE2084; - break; - case MSM_VIDC_TRANSFER_SMPTE_ST428_1: - v4l2_transfer_char = V4L2_XFER_FUNC_VIDC_ST428; - break; - case MSM_VIDC_TRANSFER_BT2100_2_HLG: - v4l2_transfer_char = V4L2_XFER_FUNC_VIDC_HLG; - break; - default: - i_vpr_e(inst, "%s: invalid hfi transfer char %d\n", - func, vidc_transfer_char); - break; + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; } + core = inst->core; + if (!core->platform || !core->platform->data.format_data) { + d_vpr_e("%s: invalid core platform\n", __func__); + return -EINVAL; + } + transfer_char_info = core->platform->data.format_data->transfer_char_info; + size = core->platform->data.format_data->transfer_char_info_size; + + for (i = 0; i < size; i++) { + if (transfer_char_info[i].vidc_transfer_char == vidc_transfer_char) + return transfer_char_info[i].v4l2_transfer_char; + } + + i_vpr_e(inst, "%s: invalid hfi transfer char %d\n", + func, vidc_transfer_char); + return v4l2_transfer_char; } u32 v4l2_matrix_coeff_to_driver(struct msm_vidc_inst *inst, u32 v4l2_matrix_coeff, const char *func) { + struct msm_vidc_core *core; + const struct matrix_coeff_info *matrix_coeff_info; + u32 i, size; u32 vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_RESERVED; - switch(v4l2_matrix_coeff) { - case V4L2_YCBCR_ENC_DEFAULT: - vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_RESERVED; - break; - case V4L2_YCBCR_VIDC_SRGB_OR_SMPTE_ST428: - vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_SRGB_SMPTE_ST428_1; - break; - case V4L2_YCBCR_ENC_709: - case V4L2_YCBCR_ENC_XV709: - vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_BT709; - break; - case V4L2_YCBCR_VIDC_FCC47_73_682: - vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_FCC_TITLE_47; - break; - case V4L2_YCBCR_ENC_XV601: - vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_BT470_SYS_BG_OR_BT601_625; - break; - case V4L2_YCBCR_ENC_601: - vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_BT601_525_BT1358_525_OR_625; - break; - case V4L2_YCBCR_ENC_SMPTE240M: - vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_SMPTE_ST240; - break; - case V4L2_YCBCR_ENC_BT2020: - vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_BT2020_NON_CONSTANT; - break; - case V4L2_YCBCR_ENC_BT2020_CONST_LUM: - vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_BT2020_CONSTANT; - break; - default: - i_vpr_e(inst, "%s: invalid v4l2 matrix coeff %d\n", - func, v4l2_matrix_coeff); - break; + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; } + core = inst->core; + if (!core->platform || !core->platform->data.format_data) { + d_vpr_e("%s: invalid core platform\n", __func__); + return -EINVAL; + } + matrix_coeff_info = core->platform->data.format_data->matrix_coeff_info; + size = core->platform->data.format_data->matrix_coeff_info_size; + + for (i = 0; i < size; i++) { + if (matrix_coeff_info[i].v4l2_matrix_coeff == v4l2_matrix_coeff) + return matrix_coeff_info[i].vidc_matrix_coeff; + } + + i_vpr_e(inst, "%s: invalid v4l2 matrix coeff %d\n", + func, v4l2_matrix_coeff); + return vidc_matrix_coeff; } u32 v4l2_matrix_coeff_from_driver(struct msm_vidc_inst *inst, u32 vidc_matrix_coeff, const char *func) { + struct msm_vidc_core *core; + const struct matrix_coeff_info *matrix_coeff_info; + u32 i, size; u32 v4l2_matrix_coeff = V4L2_YCBCR_ENC_DEFAULT; - switch(vidc_matrix_coeff) { - case MSM_VIDC_MATRIX_COEFF_SRGB_SMPTE_ST428_1: - v4l2_matrix_coeff = V4L2_YCBCR_VIDC_SRGB_OR_SMPTE_ST428; - break; - case MSM_VIDC_MATRIX_COEFF_BT709: - v4l2_matrix_coeff = V4L2_YCBCR_ENC_709; - break; - case MSM_VIDC_MATRIX_COEFF_UNSPECIFIED: - v4l2_matrix_coeff = V4L2_YCBCR_ENC_DEFAULT; - break; - case MSM_VIDC_MATRIX_COEFF_FCC_TITLE_47: - v4l2_matrix_coeff = V4L2_YCBCR_VIDC_FCC47_73_682; - break; - case MSM_VIDC_MATRIX_COEFF_BT470_SYS_BG_OR_BT601_625: - v4l2_matrix_coeff = V4L2_YCBCR_ENC_XV601; - break; - case MSM_VIDC_MATRIX_COEFF_BT601_525_BT1358_525_OR_625: - v4l2_matrix_coeff = V4L2_YCBCR_ENC_601; - break; - case MSM_VIDC_MATRIX_COEFF_SMPTE_ST240: - v4l2_matrix_coeff = V4L2_YCBCR_ENC_SMPTE240M; - break; - case MSM_VIDC_MATRIX_COEFF_BT2020_NON_CONSTANT: - v4l2_matrix_coeff = V4L2_YCBCR_ENC_BT2020; - break; - case MSM_VIDC_MATRIX_COEFF_BT2020_CONSTANT: - v4l2_matrix_coeff = V4L2_YCBCR_ENC_BT2020_CONST_LUM; - break; - default: - i_vpr_e(inst, "%s: invalid hfi matrix coeff %d\n", - func, vidc_matrix_coeff); - break; + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; } + core = inst->core; + if (!core->platform || !core->platform->data.format_data) { + d_vpr_e("%s: invalid core platform\n", __func__); + return -EINVAL; + } + matrix_coeff_info = core->platform->data.format_data->matrix_coeff_info; + size = core->platform->data.format_data->matrix_coeff_info_size; + + for (i = 0; i < size; i++) { + if (matrix_coeff_info[i].v4l2_matrix_coeff == v4l2_matrix_coeff) + return matrix_coeff_info[i].vidc_matrix_coeff; + } + + i_vpr_e(inst, "%s: invalid hfi matrix coeff %d\n", + func, vidc_matrix_coeff); + return v4l2_matrix_coeff; } diff --git a/driver/vidc/src/msm_vidc_power.c b/driver/vidc/src/msm_vidc_power.c index dd2ff96e68..de75692ab3 100644 --- a/driver/vidc/src/msm_vidc_power.c +++ b/driver/vidc/src/msm_vidc_power.c @@ -247,7 +247,7 @@ int msm_vidc_scale_buses(struct msm_vidc_inst *inst) vote_data->bitrate = (vote_data->bitrate / frame_rate) * operating_rate; vote_data->num_formats = 1; - vote_data->color_formats[0] = v4l2_colorformat_to_driver( + vote_data->color_formats[0] = v4l2_colorformat_to_driver(inst, inst->fmts[INPUT_PORT].fmt.pix_mp.pixelformat, __func__); vote_data->vpss_preprocessing_enabled = inst->capabilities->cap[REQUEST_PREPROCESS].value; @@ -256,7 +256,7 @@ int msm_vidc_scale_buses(struct msm_vidc_inst *inst) vote_data->domain = MSM_VIDC_DECODER; vote_data->bitrate = inst->max_input_data_size * vote_data->fps * 8; - color_format = v4l2_colorformat_to_driver( + color_format = v4l2_colorformat_to_driver(inst, inst->fmts[OUTPUT_PORT].fmt.pix_mp.pixelformat, __func__); if (is_linear_colorformat(color_format)) { vote_data->num_formats = 2; From 88dc4a0593e3b368b0bb889fbdc2e2fc91aba2f6 Mon Sep 17 00:00:00 2001 From: Dikshita Agarwal Date: Wed, 20 Jul 2022 13:07:24 +0530 Subject: [PATCH 0669/1061] video: driver: handle private codecs defines Move the usage of v4l2 macros in helper functions to avoid compilation issues on upstream kernel with private codec defines. Use vidc macros defines in code instead of v4l2 defines wherever applicable. Change-Id: I43d7deb4f84c502689ceaec3273803444f30f379 Signed-off-by: Dikshita Agarwal --- driver/variant/iris3/src/msm_vidc_buffer_iris3.c | 5 +++-- driver/vidc/src/msm_venc.c | 7 +++++-- driver/vidc/src/msm_vidc_buffer.c | 15 ++++++++------- 3 files changed, 16 insertions(+), 11 deletions(-) diff --git a/driver/variant/iris3/src/msm_vidc_buffer_iris3.c b/driver/variant/iris3/src/msm_vidc_buffer_iris3.c index 589ab40eff..9dc9b05640 100644 --- a/driver/variant/iris3/src/msm_vidc_buffer_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_buffer_iris3.c @@ -557,6 +557,7 @@ static u32 msm_vidc_encoder_output_size_iris3(struct msm_vidc_inst *inst) bool is_ten_bit = false; int bitrate_mode, frame_rc; u32 hfi_rc_type = HFI_RC_VBR_CFR; + enum msm_vidc_codec_type codec; if (!inst || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); @@ -564,8 +565,8 @@ static u32 msm_vidc_encoder_output_size_iris3(struct msm_vidc_inst *inst) } f = &inst->fmts[OUTPUT_PORT]; - if (f->fmt.pix_mp.pixelformat == V4L2_PIX_FMT_HEVC || - f->fmt.pix_mp.pixelformat == V4L2_PIX_FMT_HEIC) + codec = v4l2_codec_to_driver(inst, f->fmt.pix_mp.pixelformat, __func__); + if (codec == MSM_VIDC_HEVC || codec == MSM_VIDC_HEIC) is_ten_bit = true; bitrate_mode = inst->capabilities->cap[BITRATE_MODE].value; diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index 0e850bf757..bb487d2119 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -1082,6 +1082,7 @@ int msm_venc_s_fmt_output(struct msm_vidc_inst *inst, struct v4l2_format *f) struct msm_vidc_core *core; u32 codec_align; u32 width, height; + enum msm_vidc_codec_type codec; if (!inst || !inst->core || !f) { d_vpr_e("%s: invalid params\n", __func__); @@ -1098,8 +1099,10 @@ int msm_venc_s_fmt_output(struct msm_vidc_inst *inst, struct v4l2_format *f) } fmt->type = OUTPUT_MPLANE; - codec_align = (f->fmt.pix_mp.pixelformat == V4L2_PIX_FMT_HEVC || - f->fmt.pix_mp.pixelformat == V4L2_PIX_FMT_HEIC) ? 32 : 16; + codec = v4l2_codec_to_driver(inst, f->fmt.pix_mp.pixelformat, __func__); + + codec_align = (codec == MSM_VIDC_HEVC || + codec == MSM_VIDC_HEIC) ? 32 : 16; /* use rotated width height if rotation is enabled */ width = inst->compose.width; height = inst->compose.height; diff --git a/driver/vidc/src/msm_vidc_buffer.c b/driver/vidc/src/msm_vidc_buffer.c index 9c552e74ef..da85f3b73b 100644 --- a/driver/vidc/src/msm_vidc_buffer.c +++ b/driver/vidc/src/msm_vidc_buffer.c @@ -210,6 +210,7 @@ u32 msm_vidc_decoder_input_size(struct msm_vidc_inst *inst) u32 base_res_mbs = NUM_MBS_4k; struct v4l2_format *f; u32 bitstream_size_overwrite = 0; + enum msm_vidc_codec_type codec; if (!inst || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); @@ -233,13 +234,14 @@ u32 msm_vidc_decoder_input_size(struct msm_vidc_inst *inst) * 4k mbs for VP8/VP9 and 4k / 2 for remaining codecs. */ f = &inst->fmts[INPUT_PORT]; + codec = v4l2_codec_to_driver(inst, f->fmt.pix_mp.pixelformat, __func__); num_mbs = msm_vidc_get_mbs_per_frame(inst); if (num_mbs > NUM_MBS_4k) { div_factor = 4; base_res_mbs = inst->capabilities->cap[MBPF].value; } else { base_res_mbs = NUM_MBS_4k; - if (f->fmt.pix_mp.pixelformat == V4L2_PIX_FMT_VP9) + if (codec == MSM_VIDC_VP9) div_factor = 1; else div_factor = 2; @@ -257,10 +259,8 @@ u32 msm_vidc_decoder_input_size(struct msm_vidc_inst *inst) frame_size = base_res_mbs * MB_SIZE_IN_PIXEL * 3 / 2 / div_factor; /* multiply by 10/8 (1.25) to get size for 10 bit case */ - if (f->fmt.pix_mp.pixelformat == V4L2_PIX_FMT_VP9 || - f->fmt.pix_mp.pixelformat == V4L2_PIX_FMT_AV1 || - f->fmt.pix_mp.pixelformat == V4L2_PIX_FMT_HEVC || - f->fmt.pix_mp.pixelformat == V4L2_PIX_FMT_HEIC) + if (codec == MSM_VIDC_VP9 || codec == MSM_VIDC_AV1 || + codec == MSM_VIDC_HEVC || codec == MSM_VIDC_HEIC) frame_size = frame_size + (frame_size >> 2); i_vpr_h(inst, "set input buffer size to %d\n", frame_size); @@ -363,6 +363,7 @@ u32 msm_vidc_encoder_output_size(struct msm_vidc_inst *inst) u32 mbs_per_frame; u32 width, height; struct v4l2_format *f; + enum msm_vidc_codec_type codec; if (!inst || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); @@ -370,6 +371,7 @@ u32 msm_vidc_encoder_output_size(struct msm_vidc_inst *inst) } f = &inst->fmts[OUTPUT_PORT]; + codec = v4l2_codec_to_driver(inst, f->fmt.pix_mp.pixelformat, __func__); /* * Encoder output size calculation: 32 Align width/height * For heic session : YUVsize * 2 @@ -405,8 +407,7 @@ u32 msm_vidc_encoder_output_size(struct msm_vidc_inst *inst) skip_calc: /* multiply by 10/8 (1.25) to get size for 10 bit case */ - if (f->fmt.pix_mp.pixelformat == V4L2_PIX_FMT_HEVC || - f->fmt.pix_mp.pixelformat == V4L2_PIX_FMT_HEIC) + if (codec == MSM_VIDC_HEVC || codec == MSM_VIDC_HEIC) frame_size = frame_size + (frame_size >> 2); frame_size = ALIGN(frame_size, SZ_4K); From 704a3163700a58cfd4eb21313db456cb995bc676 Mon Sep 17 00:00:00 2001 From: Dikshita Agarwal Date: Mon, 1 Aug 2022 15:59:09 +0530 Subject: [PATCH 0670/1061] video: driver: replace V4L2_MPEG_MSM_VIDC_DISABLE/ENABLE Replace V4L2_MPEG_MSM_VIDC_DISABLE/ENABLE macros with 0 & 1 to comply with v4l2 standard. Change-Id: I5f27bfb8416b5be8caee29fb487916ccba020116 Signed-off-by: Dikshita Agarwal --- driver/platform/kalama/src/kalama.c | 93 +++++---------- driver/platform/kalama/src/msm_vidc_kalama.c | 115 ++++++------------- driver/vidc/inc/msm_vidc_internal.h | 5 + driver/vidc/src/msm_vidc_control.c | 6 +- 4 files changed, 73 insertions(+), 146 deletions(-) diff --git a/driver/platform/kalama/src/kalama.c b/driver/platform/kalama/src/kalama.c index 77bf986c87..86fa03b2c3 100644 --- a/driver/platform/kalama/src/kalama.c +++ b/driver/platform/kalama/src/kalama.c @@ -381,18 +381,14 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { 0}, {HFLIP, ENC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, 1, 1, 0, V4L2_CID_HFLIP, HFI_PROP_FLIP, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, {VFLIP, ENC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, 1, 1, 0, V4L2_CID_VFLIP, HFI_PROP_FLIP, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | @@ -425,22 +421,17 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, {PREPEND_SPSPPS_TO_IDR, ENC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, 1, 1, 0, V4L2_CID_MPEG_VIDEO_PREPEND_SPSPPS_TO_IDR}, {WITHOUT_STARTCODE, ENC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, 1, 1, 0, V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE, HFI_PROP_NAL_LENGTH_FIELD, CAP_FLAG_OUTPUT_PORT}, {WITHOUT_STARTCODE, DEC, AV1, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_DISABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, 1, 1, 0, V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE, HFI_PROP_NAL_LENGTH_FIELD, CAP_FLAG_INPUT_PORT}, @@ -517,8 +508,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { 70000000, 1, 70000000}, {LOSSLESS, ENC, HEVC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, 1, 1, 0, V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU}, {FRAME_SKIP_MODE, ENC, H264|HEVC|HEIC, @@ -533,8 +523,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, {FRAME_RC_ENABLE, ENC, H264|HEVC|HEIC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_ENABLE, + 0, 1, 1, 1, V4L2_CID_MPEG_VIDEO_FRAME_RC_ENABLE}, {CONSTANT_QUALITY, ENC, HEVC, @@ -566,8 +555,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, {GOP_CLOSURE, ENC, H264|HEVC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_ENABLE, + 0, 1, 1, 1, V4L2_CID_MPEG_VIDEO_GOP_CLOSURE, 0}, @@ -578,8 +566,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { CAP_FLAG_OUTPUT_PORT}, {B_FRAME, ENC, HEIC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, 1, 1, 0, V4L2_CID_MPEG_VIDEO_B_FRAMES, HFI_PROP_MAX_B_FRAMES, CAP_FLAG_OUTPUT_PORT}, @@ -593,22 +580,18 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, {CSC, ENC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, 1, 1, 0, 0, HFI_PROP_CSC}, {LOWLATENCY_MODE, ENC, H264|HEVC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, 1, 1, 0, 0, 0, CAP_FLAG_NONE}, {LOWLATENCY_MODE, DEC, H264|HEVC|VP9|AV1, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, 1, 1, 0, 0, HFI_PROP_SEQ_CHANGE_AT_SYNC_FRAME, CAP_FLAG_INPUT_PORT}, @@ -642,16 +625,13 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { CAP_FLAG_OUTPUT_PORT}, {AU_DELIMITER, ENC, H264|HEVC, - V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, 1, 1, 0, V4L2_CID_MPEG_VIDEO_AU_DELIMITER, HFI_PROP_AUD, CAP_FLAG_OUTPUT_PORT}, {CONTENT_ADAPTIVE_CODING, ENC, H264|HEVC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_ENABLE, + 0, 1, 1, 1, 0, HFI_PROP_CONTENT_ADAPTIVE_CODING, CAP_FLAG_OUTPUT_PORT}, @@ -820,15 +800,13 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, {LAYER_ENABLE, ENC, H264, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, 1, 1, 0, V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING, HFI_PROP_LAYER_ENCODING_TYPE, CAP_FLAG_OUTPUT_PORT}, {LAYER_ENABLE, ENC, HEVC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, 1, 1, 0, 0, 0, CAP_FLAG_OUTPUT_PORT}, @@ -1195,15 +1173,13 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { CAP_FLAG_OUTPUT_PORT}, {MB_RC, ENC, H264|HEVC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_ENABLE, + 0, 1, 1, 1, V4L2_CID_MPEG_VIDEO_MB_RC_ENABLE, 0, CAP_FLAG_OUTPUT_PORT}, {TRANSFORM_8X8, ENC, H264, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_ENABLE, + 0, 1, 1, 1, V4L2_CID_MPEG_VIDEO_H264_8X8_TRANSFORM, HFI_PROP_8X8_TRANSFORM, CAP_FLAG_OUTPUT_PORT}, @@ -1216,8 +1192,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { CAP_FLAG_OUTPUT_PORT}, {DISPLAY_DELAY_ENABLE, DEC, H264|HEVC|VP9|AV1, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, 1, 1, 0, V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY_ENABLE, HFI_PROP_DECODE_ORDER_OUTPUT, CAP_FLAG_INPUT_PORT}, @@ -1229,8 +1204,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { CAP_FLAG_INPUT_PORT}, {OUTPUT_ORDER, DEC, H264|HEVC|VP9|AV1, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, 1, 1, 0, 0, HFI_PROP_DECODE_ORDER_OUTPUT, CAP_FLAG_INPUT_PORT}, @@ -1302,28 +1276,24 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { 0}, {THUMBNAIL_MODE, DEC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, 1, 1, 0, 0, HFI_PROP_THUMBNAIL_MODE, CAP_FLAG_INPUT_PORT}, {DEFAULT_HEADER, DEC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, 1, 1, 0, 0, HFI_PROP_DEC_DEFAULT_HEADER}, {RAP_FRAME, DEC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_ENABLE, + 0, 1, 1, 1, 0, HFI_PROP_DEC_START_FROM_RAP_FRAME, CAP_FLAG_INPUT_PORT}, {SEQ_CHANGE_AT_SYNC_FRAME, DEC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_ENABLE, + 0, 1, 1, 1, 0, HFI_PROP_SEQ_CHANGE_AT_SYNC_FRAME, CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, @@ -1332,21 +1302,18 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { 1, 1, 1, 1}, {DPB_LIST, DEC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, 1, 1, 0, 0, HFI_PROP_DPB_LIST, CAP_FLAG_OUTPUT_PORT}, {FILM_GRAIN, DEC, AV1, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, 1, 1, 0, 0, HFI_PROP_AV1_FILM_GRAIN_PRESENT}, {SUPER_BLOCK, DEC, AV1, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, 1, 1, 0, 0, HFI_PROP_AV1_SUPER_BLOCK_ENABLED}, @@ -1357,15 +1324,13 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { CAP_FLAG_INPUT_PORT}, {ALL_INTRA, ENC, H264|HEVC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, 1, 1, 0, 0, 0, CAP_FLAG_OUTPUT_PORT}, {GRID, ENC, HEIC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_ENABLE, + 0, 1, 1, 1, 0, HFI_PROP_HEIC_GRID_ENABLE, CAP_FLAG_OUTPUT_PORT}, diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index 51855e0510..3e2c31c061 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -532,8 +532,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { V4L2_CID_MPEG_VIDC_CLIENT_ID}, {SECURE_MODE, ENC|DEC, H264|HEVC|VP9|AV1, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, 1, 1, 0, V4L2_CID_MPEG_VIDC_SECURE, HFI_PROP_SECURE, CAP_FLAG_NONE}, @@ -566,23 +565,18 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { V4L2_CID_MPEG_VIDC_SW_FENCE_FD}, {TS_REORDER, DEC, H264|HEVC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, 1, 1, 0, V4L2_CID_MPEG_VIDC_TS_REORDER}, {HFLIP, ENC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, 1, 1, 0, V4L2_CID_HFLIP, HFI_PROP_FLIP, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, {VFLIP, ENC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, 1, 1, 0, V4L2_CID_VFLIP, HFI_PROP_FLIP, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | @@ -615,22 +609,17 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, {PREPEND_SPSPPS_TO_IDR, ENC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, 1, 1, 0, V4L2_CID_MPEG_VIDEO_PREPEND_SPSPPS_TO_IDR}, {WITHOUT_STARTCODE, ENC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, 1, 1, 0, V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE, HFI_PROP_NAL_LENGTH_FIELD, CAP_FLAG_OUTPUT_PORT}, {WITHOUT_STARTCODE, DEC, AV1, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_DISABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, 0, 1, 0, V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE, HFI_PROP_NAL_LENGTH_FIELD, CAP_FLAG_INPUT_PORT}, @@ -707,8 +696,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { 70000000, 1, 70000000}, {LOSSLESS, ENC, HEVC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, 1, 1, 0, V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU}, {FRAME_SKIP_MODE, ENC, H264|HEVC|HEIC, @@ -723,8 +711,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, {FRAME_RC_ENABLE, ENC, H264|HEVC|HEIC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_ENABLE, + 0, 1, 1, 1, V4L2_CID_MPEG_VIDEO_FRAME_RC_ENABLE}, {CONSTANT_QUALITY, ENC, HEVC, @@ -756,8 +743,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, {GOP_CLOSURE, ENC, H264|HEVC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_ENABLE, + 0, 1, 1, 1, V4L2_CID_MPEG_VIDEO_GOP_CLOSURE, 0}, @@ -768,8 +754,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { CAP_FLAG_OUTPUT_PORT}, {B_FRAME, ENC, HEIC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, 1, 1, 0, V4L2_CID_MPEG_VIDEO_B_FRAMES, HFI_PROP_MAX_B_FRAMES, CAP_FLAG_OUTPUT_PORT}, @@ -790,30 +775,24 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { CAP_FLAG_DYNAMIC_ALLOWED}, {CSC, ENC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, 1, 1, 0, 0, HFI_PROP_CSC}, {CSC_CUSTOM_MATRIX, ENC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, 1, 1, 0, V4L2_CID_MPEG_VIDC_VIDEO_VPE_CSC_CUSTOM_MATRIX, HFI_PROP_CSC_MATRIX, CAP_FLAG_OUTPUT_PORT}, {LOWLATENCY_MODE, ENC, H264|HEVC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, 1, 1, 0, V4L2_CID_MPEG_VIDC_LOWLATENCY_REQUEST, 0, CAP_FLAG_NONE}, {LOWLATENCY_MODE, DEC, H264|HEVC|VP9|AV1, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, 1, 1, 0, V4L2_CID_MPEG_VIDC_LOWLATENCY_REQUEST, HFI_PROP_SEQ_CHANGE_AT_SYNC_FRAME, CAP_FLAG_INPUT_PORT}, @@ -864,30 +843,25 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { CAP_FLAG_DYNAMIC_ALLOWED}, {AU_DELIMITER, ENC, H264|HEVC, - V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, 1, 1, 0, V4L2_CID_MPEG_VIDEO_AU_DELIMITER, HFI_PROP_AUD, CAP_FLAG_OUTPUT_PORT}, {TIME_DELTA_BASED_RC, ENC, H264|HEVC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_ENABLE, + 0, 1, 1, 1, V4L2_CID_MPEG_VIDC_TIME_DELTA_BASED_RC, HFI_PROP_TIME_DELTA_BASED_RATE_CONTROL, CAP_FLAG_OUTPUT_PORT}, {TIME_DELTA_BASED_RC, ENC, HEIC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, 1, 1, 0, V4L2_CID_MPEG_VIDC_TIME_DELTA_BASED_RC, HFI_PROP_TIME_DELTA_BASED_RATE_CONTROL, CAP_FLAG_OUTPUT_PORT}, {CONTENT_ADAPTIVE_CODING, ENC, H264|HEVC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_ENABLE, + 0, 1, 1, 1, V4L2_CID_MPEG_VIDC_CONTENT_ADAPTIVE_CODING, HFI_PROP_CONTENT_ADAPTIVE_CODING, CAP_FLAG_OUTPUT_PORT}, @@ -1062,15 +1036,13 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, {LAYER_ENABLE, ENC, H264, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, 1, 1, 0, V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING, HFI_PROP_LAYER_ENCODING_TYPE, CAP_FLAG_OUTPUT_PORT}, {LAYER_ENABLE, ENC, HEVC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, 1, 1, 0, 0, 0, CAP_FLAG_OUTPUT_PORT}, @@ -1482,15 +1454,13 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { CAP_FLAG_OUTPUT_PORT}, {MB_RC, ENC, H264|HEVC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_ENABLE, + 0, 1, 1, 1, V4L2_CID_MPEG_VIDEO_MB_RC_ENABLE, 0, CAP_FLAG_OUTPUT_PORT}, {TRANSFORM_8X8, ENC, H264, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_ENABLE, + 0, 1, 1, 1, V4L2_CID_MPEG_VIDEO_H264_8X8_TRANSFORM, HFI_PROP_8X8_TRANSFORM, CAP_FLAG_OUTPUT_PORT}, @@ -1503,8 +1473,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { CAP_FLAG_OUTPUT_PORT}, {DISPLAY_DELAY_ENABLE, DEC, H264|HEVC|VP9|AV1, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, 1, 1, 0, V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY_ENABLE, HFI_PROP_DECODE_ORDER_OUTPUT, CAP_FLAG_INPUT_PORT}, @@ -1516,8 +1485,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { CAP_FLAG_INPUT_PORT}, {OUTPUT_ORDER, DEC, H264|HEVC|VP9|AV1, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, 1, 1, 0, 0, HFI_PROP_DECODE_ORDER_OUTPUT, CAP_FLAG_INPUT_PORT}, @@ -1589,28 +1557,24 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { V4L2_CID_MPEG_VIDC_MIN_BITSTREAM_SIZE_OVERWRITE}, {THUMBNAIL_MODE, DEC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, 1, 1, 0, V4L2_CID_MPEG_VIDC_THUMBNAIL_MODE, HFI_PROP_THUMBNAIL_MODE, CAP_FLAG_INPUT_PORT}, {DEFAULT_HEADER, DEC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, 1, 1, 0, 0, HFI_PROP_DEC_DEFAULT_HEADER}, {RAP_FRAME, DEC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_ENABLE, + 0, 1, 1, 1, 0, HFI_PROP_DEC_START_FROM_RAP_FRAME, CAP_FLAG_INPUT_PORT}, {SEQ_CHANGE_AT_SYNC_FRAME, DEC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_ENABLE, + 0, 1, 1, 1, 0, HFI_PROP_SEQ_CHANGE_AT_SYNC_FRAME, CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, @@ -1640,21 +1604,18 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { 0, CAP_FLAG_DYNAMIC_ALLOWED}, {DPB_LIST, DEC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, 1, 1, 0, 0, HFI_PROP_DPB_LIST, CAP_FLAG_OUTPUT_PORT}, {FILM_GRAIN, DEC, AV1, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, 1, 1, 0, V4L2_CID_MPEG_VIDC_AV1D_FILM_GRAIN_PRESENT, HFI_PROP_AV1_FILM_GRAIN_PRESENT}, {SUPER_BLOCK, DEC, AV1, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, 1, 1, 0, 0, HFI_PROP_AV1_SUPER_BLOCK_ENABLED}, @@ -1665,8 +1626,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { CAP_FLAG_INPUT_PORT}, {LAST_FLAG_EVENT_ENABLE, DEC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, 1, 1, 0, V4L2_CID_MPEG_VIDC_LAST_FLAG_EVENT_ENABLE}, {META_BITSTREAM_RESOLUTION, DEC, AV1, @@ -1688,8 +1648,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { CAP_FLAG_BITMASK}, {ALL_INTRA, ENC, H264|HEVC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, 1, 1, 0, 0, 0, CAP_FLAG_OUTPUT_PORT}, @@ -1701,8 +1660,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, {INPUT_META_VIA_REQUEST, ENC|DEC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, + 0, 1, 1, 0, V4L2_CID_MPEG_VIDC_INPUT_METADATA_VIA_REQUEST_ENABLE, 0, CAP_FLAG_INPUT_PORT}, @@ -1950,8 +1908,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { CAP_FLAG_BITMASK}, {GRID, ENC, HEIC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_ENABLE, + 0, 1, 1, 1, 0, HFI_PROP_HEIC_GRID_ENABLE, CAP_FLAG_OUTPUT_PORT}, diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 68765dca42..958d98fcc8 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -21,6 +21,11 @@ #include #include +/* TODO : remove once available in mainline kernel */ +#ifndef V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE +#define V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE (3) +#endif + #define MAX_NAME_LENGTH 128 #define VENUS_VERSION_LENGTH 128 #define MAX_MATRIX_COEFFS 9 diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index fa2531edf1..5ecb9015b5 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -1621,7 +1621,7 @@ int msm_vidc_adjust_transform_8x8(void *instance, struct v4l2_ctrl *ctrl) if (profile != V4L2_MPEG_VIDEO_H264_PROFILE_HIGH && profile != V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH) - adjusted_value = V4L2_MPEG_MSM_VIDC_DISABLE; + adjusted_value = 0; msm_vidc_update_cap_value(inst, TRANSFORM_8X8, adjusted_value, __func__); @@ -2725,7 +2725,7 @@ int msm_vidc_adjust_preprocess(void *instance, struct v4l2_ctrl *ctrl) * BRS enabled and upto 4k @ 60 fps */ if (!is_meta_tx_inp_enabled(inst, META_EVA_STATS) && - brs == V4L2_MPEG_MSM_VIDC_ENABLE && + brs == 1 && res_is_less_than_or_equal_to(width, height, 3840, 2160) && max_fps <= 60) adjusted_value = 1; @@ -2893,7 +2893,7 @@ int msm_vidc_adjust_dec_outbuf_fence(void *instance, struct v4l2_ctrl *ctrl) &picture_order, __func__)) return -EINVAL; - if (picture_order == V4L2_MPEG_MSM_VIDC_DISABLE) { + if (picture_order == 0) { /* disable outbuf fence */ adjusted_value = V4L2_MPEG_VIDC_META_DISABLE | V4L2_MPEG_VIDC_META_RX_INPUT; From 7d1fbd07cff7ec9f6b539d274a621007230ff5ce Mon Sep 17 00:00:00 2001 From: Dikshita Agarwal Date: Mon, 1 Aug 2022 17:02:09 +0530 Subject: [PATCH 0671/1061] video: driver: redefine private v4l2 macros in common file Define vidc macros corresponding to private v4l2 macros defined in v4l2_vidc_extensions.h file in msm_vidc_internal.h and use the same wherever applicable for successful compilation of upstream driver. Change-Id: I2c7b3741d29996beb35b08b9c6dbd88876bb6ca6 Signed-off-by: Dikshita Agarwal --- driver/platform/kalama/src/kalama.c | 6 +- driver/platform/kalama/src/msm_vidc_kalama.c | 220 +++++++++--------- .../variant/iris2/src/msm_vidc_buffer_iris2.c | 2 +- driver/variant/iris2/src/msm_vidc_iris2.c | 10 +- .../variant/iris3/src/msm_vidc_buffer_iris3.c | 2 +- driver/vidc/inc/msm_vidc_driver.h | 16 +- driver/vidc/inc/msm_vidc_internal.h | 22 ++ driver/vidc/src/msm_vdec.c | 4 +- driver/vidc/src/msm_vidc_control.c | 26 +-- 9 files changed, 165 insertions(+), 143 deletions(-) diff --git a/driver/platform/kalama/src/kalama.c b/driver/platform/kalama/src/kalama.c index 86fa03b2c3..bfaae7e36c 100644 --- a/driver/platform/kalama/src/kalama.c +++ b/driver/platform/kalama/src/kalama.c @@ -572,9 +572,9 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { CAP_FLAG_OUTPUT_PORT}, {BLUR_TYPES, ENC, H264|HEVC, - VIDC_BLUR_NONE, VIDC_BLUR_EXTERNAL, - BIT(VIDC_BLUR_NONE) | BIT(VIDC_BLUR_EXTERNAL), - VIDC_BLUR_NONE, + MSM_VIDC_BLUR_NONE, MSM_VIDC_BLUR_EXTERNAL, + BIT(MSM_VIDC_BLUR_NONE) | BIT(MSM_VIDC_BLUR_EXTERNAL), + MSM_VIDC_BLUR_NONE, 0, HFI_PROP_BLUR_TYPES, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index 3e2c31c061..6a7367b61b 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -542,9 +542,9 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { * to get fence_id in input metadata buffer done. */ {META_OUTBUF_FENCE, DEC, H264|HEVC|VP9|AV1, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_INPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_INPUT, + 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_OUTBUF_FENCE, HFI_PROP_FENCE, CAP_FLAG_BITMASK}, @@ -760,9 +760,9 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { CAP_FLAG_OUTPUT_PORT}, {BLUR_TYPES, ENC, H264|HEVC, - VIDC_BLUR_NONE, VIDC_BLUR_EXTERNAL, - BIT(VIDC_BLUR_NONE) | BIT(VIDC_BLUR_EXTERNAL), - VIDC_BLUR_NONE, + MSM_VIDC_BLUR_NONE, MSM_VIDC_BLUR_EXTERNAL, + BIT(MSM_VIDC_BLUR_NONE) | BIT(MSM_VIDC_BLUR_EXTERNAL), + MSM_VIDC_BLUR_NONE, V4L2_CID_MPEG_VIDC_VIDEO_BLUR_TYPES, HFI_PROP_BLUR_TYPES, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, @@ -1630,19 +1630,19 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { V4L2_CID_MPEG_VIDC_LAST_FLAG_EVENT_ENABLE}, {META_BITSTREAM_RESOLUTION, DEC, AV1, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_INPUT | - V4L2_MPEG_VIDC_META_RX_OUTPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_INPUT | + MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_BITSTREAM_RESOLUTION, HFI_PROP_BITSTREAM_RESOLUTION, CAP_FLAG_BITMASK}, {META_CROP_OFFSETS, DEC, AV1, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_INPUT | - V4L2_MPEG_VIDC_META_RX_OUTPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_INPUT | + MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_CROP_OFFSETS, HFI_PROP_CROP_OFFSETS, CAP_FLAG_BITMASK}, @@ -1666,173 +1666,173 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { CAP_FLAG_INPUT_PORT}, {META_LTR_MARK_USE, ENC, H264|HEVC, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_LTR_MARK_USE_DETAILS, HFI_PROP_LTR_MARK_USE_DETAILS, CAP_FLAG_BITMASK}, {META_SEQ_HDR_NAL, ENC, CODECS_ALL, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_SEQ_HEADER_NAL, HFI_PROP_METADATA_SEQ_HEADER_NAL, CAP_FLAG_BITMASK}, {META_DPB_MISR, DEC, CODECS_ALL, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_DPB_LUMA_CHROMA_MISR, HFI_PROP_DPB_LUMA_CHROMA_MISR, CAP_FLAG_BITMASK}, {META_OPB_MISR, DEC, CODECS_ALL, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_OPB_LUMA_CHROMA_MISR, HFI_PROP_OPB_LUMA_CHROMA_MISR, CAP_FLAG_BITMASK}, {META_INTERLACE, DEC, H264, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_INTERLACE, HFI_PROP_INTERLACE_INFO, CAP_FLAG_BITMASK}, {META_TIMESTAMP, DEC | ENC, CODECS_ALL, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_TIMESTAMP, HFI_PROP_TIMESTAMP, CAP_FLAG_BITMASK}, {META_CONCEALED_MB_CNT, DEC, CODECS_ALL, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_CONCEALED_MB_COUNT, HFI_PROP_CONEALED_MB_COUNT, CAP_FLAG_BITMASK}, {META_HIST_INFO, DEC, HEVC|AV1|VP9, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_HISTOGRAM_INFO, HFI_PROP_HISTOGRAM_INFO, CAP_FLAG_BITMASK}, {META_TRANSCODING_STAT_INFO, DEC, HEVC|H264, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_TRANSCODE_STAT_INFO, HFI_PROP_TRANSCODING_STAT_INFO, CAP_FLAG_BITMASK}, {META_TRANSCODING_STAT_INFO, ENC, HEVC|H264, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_TX_INPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_TX_INPUT, + 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_TRANSCODE_STAT_INFO, HFI_PROP_TRANSCODING_STAT_INFO, CAP_FLAG_BITMASK}, {META_PICTURE_TYPE, DEC, CODECS_ALL, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_INPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_INPUT, + 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_PICTURE_TYPE, HFI_PROP_PICTURE_TYPE, CAP_FLAG_BITMASK}, {META_SEI_MASTERING_DISP, ENC, HEVC|HEIC, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_TX_INPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_TX_INPUT, + 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_SEI_MASTERING_DISPLAY_COLOUR, HFI_PROP_SEI_MASTERING_DISPLAY_COLOUR, CAP_FLAG_BITMASK}, {META_SEI_MASTERING_DISP, DEC, HEVC|HEIC|AV1, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_INPUT | - V4L2_MPEG_VIDC_META_RX_OUTPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_INPUT | + MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_SEI_MASTERING_DISPLAY_COLOUR, HFI_PROP_SEI_MASTERING_DISPLAY_COLOUR, CAP_FLAG_BITMASK}, {META_SEI_CLL, ENC, HEVC|HEIC, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_TX_INPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_TX_INPUT, + 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_SEI_CONTENT_LIGHT_LEVEL, HFI_PROP_SEI_CONTENT_LIGHT_LEVEL, CAP_FLAG_BITMASK}, {META_SEI_CLL, DEC, HEVC|HEIC|AV1, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_INPUT | - V4L2_MPEG_VIDC_META_RX_OUTPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_INPUT | + MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_SEI_CONTENT_LIGHT_LEVEL, HFI_PROP_SEI_CONTENT_LIGHT_LEVEL, CAP_FLAG_BITMASK}, {META_HDR10PLUS, ENC, HEVC|HEIC, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_TX_INPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_TX_INPUT, + 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_HDR10PLUS, HFI_PROP_SEI_HDR10PLUS_USERDATA, CAP_FLAG_BITMASK}, {META_HDR10PLUS, DEC, HEVC|HEIC|AV1, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_INPUT | - V4L2_MPEG_VIDC_META_RX_OUTPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_INPUT | + MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_HDR10PLUS, HFI_PROP_SEI_HDR10PLUS_USERDATA, CAP_FLAG_BITMASK}, {META_DOLBY_RPU, ENC, HEVC, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_TX_INPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_TX_INPUT, + 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_DOLBY_RPU, HFI_PROP_DOLBY_RPU_METADATA, CAP_FLAG_BITMASK}, {META_DOLBY_RPU, DEC, H264|HEVC, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_DOLBY_RPU, HFI_PROP_DOLBY_RPU_METADATA, CAP_FLAG_BITMASK}, {META_EVA_STATS, ENC, CODECS_ALL, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_TX_INPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_TX_INPUT, + 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_EVA_STATS, HFI_PROP_EVA_STAT_INFO, CAP_FLAG_BITMASK}, {META_BUF_TAG, ENC, CODECS_ALL, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_TX_INPUT | - V4L2_MPEG_VIDC_META_RX_OUTPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_TX_INPUT | + MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_BUFFER_TAG, HFI_PROP_BUFFER_TAG, CAP_FLAG_BITMASK}, @@ -1842,67 +1842,67 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { * in input metadata buffer done. */ {META_BUF_TAG, DEC, CODECS_ALL, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_TX_INPUT | - V4L2_MPEG_VIDC_META_TX_OUTPUT | V4L2_MPEG_VIDC_META_RX_INPUT | - V4L2_MPEG_VIDC_META_RX_OUTPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_TX_INPUT | + MSM_VIDC_META_TX_OUTPUT | MSM_VIDC_META_RX_INPUT | + MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_BUFFER_TAG, HFI_PROP_BUFFER_TAG, CAP_FLAG_BITMASK}, {META_DPB_TAG_LIST, DEC, CODECS_ALL, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_DPB_TAG_LIST, HFI_PROP_DPB_TAG_LIST, CAP_FLAG_BITMASK}, {META_SUBFRAME_OUTPUT, ENC, HEIC | H264 | HEVC, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_SUBFRAME_OUTPUT, HFI_PROP_SUBFRAME_OUTPUT, CAP_FLAG_BITMASK}, {META_SUBFRAME_OUTPUT, DEC, CODECS_ALL, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_SUBFRAME_OUTPUT, HFI_PROP_SUBFRAME_OUTPUT, CAP_FLAG_BITMASK}, {META_ENC_QP_METADATA, ENC, CODECS_ALL, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_ENC_QP_METADATA, HFI_PROP_ENC_QP_METADATA, CAP_FLAG_BITMASK}, {META_ROI_INFO, ENC, H264|HEVC, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_TX_INPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_TX_INPUT, + 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_ROI_INFO, HFI_PROP_ROI_INFO, CAP_FLAG_INPUT_PORT | CAP_FLAG_BITMASK}, {META_SALIENCY_INFO, ENC, H264|HEVC, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_TX_INPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_TX_INPUT, + 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_SALIENCY_INFO, HFI_PROP_ROI_AS_SALIENCY_INFO, CAP_FLAG_INPUT_PORT | CAP_FLAG_BITMASK}, {META_DEC_QP_METADATA, DEC, CODECS_ALL, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_DEC_QP_METADATA, HFI_PROP_DEC_QP_METADATA, CAP_FLAG_BITMASK}, @@ -1919,9 +1919,9 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { V4L2_CID_MPEG_VIDC_VENC_COMPLEXITY}, {META_MAX_NUM_REORDER_FRAMES, DEC, HEVC | H264, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_MAX_NUM_REORDER_FRAMES, HFI_PROP_MAX_NUM_REORDER_FRAMES, CAP_FLAG_BITMASK}, diff --git a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c index 3c4e1451c6..bae3504453 100644 --- a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c @@ -476,7 +476,7 @@ static u32 msm_vidc_encoder_vpss_size_iris2(struct msm_vidc_inst* inst) driver_colorfmt = v4l2_colorformat_to_driver(inst, f->fmt.pix_mp.pixelformat, __func__); is_tenbit = is_10bit_colorformat(driver_colorfmt); - if (inst->capabilities->cap[BLUR_TYPES].value != VIDC_BLUR_NONE) + if (inst->capabilities->cap[BLUR_TYPES].value != MSM_VIDC_BLUR_NONE) blur = true; HFI_BUFFER_VPSS_ENC(size, width, height, ds_enable, blur, is_tenbit); diff --git a/driver/variant/iris2/src/msm_vidc_iris2.c b/driver/variant/iris2/src/msm_vidc_iris2.c index 9d348b264c..9661eb900c 100644 --- a/driver/variant/iris2/src/msm_vidc_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_iris2.c @@ -1097,7 +1097,7 @@ int msm_vidc_adjust_blur_type_iris2(void *instance, struct v4l2_ctrl *ctrl) adjusted_value = ctrl ? ctrl->val : capability->cap[BLUR_TYPES].value; - if (adjusted_value == VIDC_BLUR_NONE) + if (adjusted_value == MSM_VIDC_BLUR_NONE) return 0; if (msm_vidc_get_parent_value(inst, BLUR_TYPES, BITRATE_MODE, @@ -1110,16 +1110,16 @@ int msm_vidc_adjust_blur_type_iris2(void *instance, struct v4l2_ctrl *ctrl) &min_quality, __func__)) return -EINVAL; - if (adjusted_value == VIDC_BLUR_EXTERNAL) { + if (adjusted_value == MSM_VIDC_BLUR_EXTERNAL) { if (is_scaling_enabled(inst) || min_quality) { - adjusted_value = VIDC_BLUR_NONE; + adjusted_value = MSM_VIDC_BLUR_NONE; } - } else if (adjusted_value == VIDC_BLUR_ADAPTIVE) { + } else if (adjusted_value == MSM_VIDC_BLUR_ADAPTIVE) { if (is_scaling_enabled(inst) || min_quality || (rc_type != HFI_RC_VBR_CFR) || !cac || is_10bit_colorformat(pix_fmts)) { - adjusted_value = VIDC_BLUR_NONE; + adjusted_value = MSM_VIDC_BLUR_NONE; } } diff --git a/driver/variant/iris3/src/msm_vidc_buffer_iris3.c b/driver/variant/iris3/src/msm_vidc_buffer_iris3.c index 9dc9b05640..3b69307113 100644 --- a/driver/variant/iris3/src/msm_vidc_buffer_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_buffer_iris3.c @@ -542,7 +542,7 @@ static u32 msm_vidc_encoder_vpss_size_iris3(struct msm_vidc_inst* inst) driver_colorfmt = v4l2_colorformat_to_driver(inst, f->fmt.pix_mp.pixelformat, __func__); is_tenbit = is_10bit_colorformat(driver_colorfmt); - if (inst->capabilities->cap[BLUR_TYPES].value != VIDC_BLUR_NONE) + if (inst->capabilities->cap[BLUR_TYPES].value != MSM_VIDC_BLUR_NONE) blur = true; HFI_BUFFER_VPSS_ENC(size, width, height, ds_enable, blur, is_tenbit); diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 2b0977fee1..630f1e4c98 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -113,8 +113,8 @@ static inline bool is_meta_rx_inp_enabled(struct msm_vidc_inst *inst, u32 cap) { bool enabled = false; - if (inst->capabilities->cap[cap].value & V4L2_MPEG_VIDC_META_ENABLE && - inst->capabilities->cap[cap].value & V4L2_MPEG_VIDC_META_RX_INPUT) + if (inst->capabilities->cap[cap].value & MSM_VIDC_META_ENABLE && + inst->capabilities->cap[cap].value & MSM_VIDC_META_RX_INPUT) enabled = true; return enabled; @@ -124,8 +124,8 @@ static inline bool is_meta_rx_out_enabled(struct msm_vidc_inst *inst, u32 cap) { bool enabled = false; - if (inst->capabilities->cap[cap].value & V4L2_MPEG_VIDC_META_ENABLE && - inst->capabilities->cap[cap].value & V4L2_MPEG_VIDC_META_RX_OUTPUT) + if (inst->capabilities->cap[cap].value & MSM_VIDC_META_ENABLE && + inst->capabilities->cap[cap].value & MSM_VIDC_META_RX_OUTPUT) enabled = true; return enabled; @@ -135,8 +135,8 @@ static inline bool is_meta_tx_inp_enabled(struct msm_vidc_inst *inst, u32 cap) { bool enabled = false; - if (inst->capabilities->cap[cap].value & V4L2_MPEG_VIDC_META_ENABLE && - inst->capabilities->cap[cap].value & V4L2_MPEG_VIDC_META_TX_INPUT) + if (inst->capabilities->cap[cap].value & MSM_VIDC_META_ENABLE && + inst->capabilities->cap[cap].value & MSM_VIDC_META_TX_INPUT) enabled = true; return enabled; @@ -146,8 +146,8 @@ static inline bool is_meta_tx_out_enabled(struct msm_vidc_inst *inst, u32 cap) { bool enabled = false; - if (inst->capabilities->cap[cap].value & V4L2_MPEG_VIDC_META_ENABLE && - inst->capabilities->cap[cap].value & V4L2_MPEG_VIDC_META_TX_OUTPUT) + if (inst->capabilities->cap[cap].value & MSM_VIDC_META_ENABLE && + inst->capabilities->cap[cap].value & MSM_VIDC_META_TX_OUTPUT) enabled = true; return enabled; diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 958d98fcc8..13a540669f 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -26,6 +26,28 @@ #define V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE (3) #endif +enum msm_vidc_blur_types { + MSM_VIDC_BLUR_NONE = 0x0, + MSM_VIDC_BLUR_EXTERNAL = 0x1, + MSM_VIDC_BLUR_ADAPTIVE = 0x2, +}; + +/* various Metadata - encoder & decoder */ +enum msm_vidc_metadata_bits { + MSM_VIDC_META_DISABLE = 0x0, + MSM_VIDC_META_ENABLE = 0x1, + MSM_VIDC_META_TX_INPUT = 0x2, + MSM_VIDC_META_TX_OUTPUT = 0x4, + MSM_VIDC_META_RX_INPUT = 0x8, + MSM_VIDC_META_RX_OUTPUT = 0x10, + MSM_VIDC_META_MAX = 0x20, +}; + +#define MSM_VIDC_METADATA_SIZE (4 * 4096) /* 16 KB */ +#define ENCODE_INPUT_METADATA_SIZE (512 * 4096) /* 2 MB */ +#define DECODE_INPUT_METADATA_SIZE MSM_VIDC_METADATA_SIZE +#define MSM_VIDC_METADATA_DOLBY_RPU_SIZE (41 * 1024) /* 41 KB */ + #define MAX_NAME_LENGTH 128 #define VENUS_VERSION_LENGTH 128 #define MAX_MATRIX_COEFFS 9 diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 2244abe1f6..e747fef4bf 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -1349,8 +1349,8 @@ static int msm_vdec_read_input_subcr_params(struct msm_vidc_inst *inst) if (inst->capabilities->cap[CODED_FRAMES].value == CODED_FRAMES_INTERLACE) { msm_vidc_update_cap_value(inst, META_OUTBUF_FENCE, - V4L2_MPEG_VIDC_META_RX_INPUT | - V4L2_MPEG_VIDC_META_DISABLE, __func__); + MSM_VIDC_META_RX_INPUT | + MSM_VIDC_META_DISABLE, __func__); } return 0; diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 5ecb9015b5..f6e18497bf 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -468,7 +468,7 @@ int msm_vidc_update_cap_value(struct msm_vidc_inst *inst, u32 cap_id, * cumulative control value if client set same metadata * control multiple times. */ - if (adjusted_val & V4L2_MPEG_VIDC_META_ENABLE) { + if (adjusted_val & MSM_VIDC_META_ENABLE) { /* enable metadata */ inst->capabilities->cap[cap_id].value |= adjusted_val; } else { @@ -2350,7 +2350,7 @@ int msm_vidc_adjust_blur_type(void *instance, struct v4l2_ctrl *ctrl) adjusted_value = ctrl ? ctrl->val : capability->cap[BLUR_TYPES].value; - if (adjusted_value == VIDC_BLUR_NONE) + if (adjusted_value == MSM_VIDC_BLUR_NONE) return 0; if (msm_vidc_get_parent_value(inst, BLUR_TYPES, BITRATE_MODE, @@ -2363,17 +2363,17 @@ int msm_vidc_adjust_blur_type(void *instance, struct v4l2_ctrl *ctrl) &roi_enable, __func__)) return -EINVAL; - if (adjusted_value == VIDC_BLUR_EXTERNAL) { + if (adjusted_value == MSM_VIDC_BLUR_EXTERNAL) { if (is_scaling_enabled(inst) || min_quality) { - adjusted_value = VIDC_BLUR_NONE; + adjusted_value = MSM_VIDC_BLUR_NONE; } - } else if (adjusted_value == VIDC_BLUR_ADAPTIVE) { + } else if (adjusted_value == MSM_VIDC_BLUR_ADAPTIVE) { if (is_scaling_enabled(inst) || min_quality || (rc_type != HFI_RC_VBR_CFR && rc_type != HFI_RC_CBR_CFR && rc_type != HFI_RC_CBR_VFR) || is_10bit_colorformat(pix_fmts) || roi_enable) { - adjusted_value = VIDC_BLUR_NONE; + adjusted_value = MSM_VIDC_BLUR_NONE; } } @@ -2450,7 +2450,7 @@ int msm_vidc_adjust_blur_resolution(void *instance, struct v4l2_ctrl *ctrl) &blur_type, __func__)) return -EINVAL; - if (blur_type != VIDC_BLUR_EXTERNAL) + if (blur_type != MSM_VIDC_BLUR_EXTERNAL) return 0; msm_vidc_update_cap_value(inst, BLUR_RESOLUTION, @@ -2774,7 +2774,7 @@ int msm_vidc_adjust_dec_lowlatency_mode(void *instance, struct v4l2_ctrl *ctrl) struct msm_vidc_inst_capability *capability; s32 adjusted_value; struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - s32 outbuf_fence = V4L2_MPEG_VIDC_META_DISABLE; + s32 outbuf_fence = MSM_VIDC_META_DISABLE; if (!inst || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); @@ -2790,8 +2790,8 @@ int msm_vidc_adjust_dec_lowlatency_mode(void *instance, struct v4l2_ctrl *ctrl) return -EINVAL; /* enable lowlatency if outbuf fence is enabled */ - if (outbuf_fence & V4L2_MPEG_VIDC_META_ENABLE && - outbuf_fence & V4L2_MPEG_VIDC_META_RX_INPUT) + if (outbuf_fence & MSM_VIDC_META_ENABLE && + outbuf_fence & MSM_VIDC_META_RX_INPUT) adjusted_value = 1; msm_vidc_update_cap_value(inst, LOWLATENCY_MODE, @@ -2895,8 +2895,8 @@ int msm_vidc_adjust_dec_outbuf_fence(void *instance, struct v4l2_ctrl *ctrl) if (picture_order == 0) { /* disable outbuf fence */ - adjusted_value = V4L2_MPEG_VIDC_META_DISABLE | - V4L2_MPEG_VIDC_META_RX_INPUT; + adjusted_value = MSM_VIDC_META_DISABLE | + MSM_VIDC_META_RX_INPUT; } msm_vidc_update_cap_value(inst, META_OUTBUF_FENCE, @@ -3947,7 +3947,7 @@ int msm_vidc_set_blur_resolution(void *instance, BLUR_TYPES, &blur_type, __func__)) return -EINVAL; - if (blur_type != VIDC_BLUR_EXTERNAL) + if (blur_type != MSM_VIDC_BLUR_EXTERNAL) return 0; hfi_value = inst->capabilities->cap[cap_id].value; From b79ec844f2480b12d60e53b796a6c732f76ade17 Mon Sep 17 00:00:00 2001 From: Sachu George Date: Wed, 29 Jun 2022 01:45:06 +0530 Subject: [PATCH 0672/1061] video-driver: Updating H264 Decoder CMD_BUF size calculation. Internal Buffer(CMD_BUF) size calculation is changed from (3 * 4) to 48 in firmware for H264 decoder. Aligning with same calculation in driver. Change-Id: I974bca7d2e128cee24bf237b6f9ea606f386031d --- driver/variant/iris3/inc/hfi_buffer_iris3.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/driver/variant/iris3/inc/hfi_buffer_iris3.h b/driver/variant/iris3/inc/hfi_buffer_iris3.h index e2dc423fb0..e81410e829 100644 --- a/driver/variant/iris3/inc/hfi_buffer_iris3.h +++ b/driver/variant/iris3/inc/hfi_buffer_iris3.h @@ -371,7 +371,7 @@ typedef HFI_U32 HFI_BOOL; { \ HFI_U32 _height = HFI_ALIGN(frame_height, \ BUFFER_ALIGNMENT_32_BYTES); \ - _size = MIN((((_height + 15) >> 4) * 3 * 4), H264D_MAX_SLICE) *\ + _size = MIN((((_height + 15) >> 4) * 48), H264D_MAX_SLICE) *\ SIZE_H264D_BSE_CMD_PER_BUF; \ } while (0) @@ -380,7 +380,7 @@ typedef HFI_U32 HFI_BOOL; { \ HFI_U32 _height = HFI_ALIGN(frame_height, \ BUFFER_ALIGNMENT_32_BYTES); \ - _size = MIN((((_height + 15) >> 4) * 3 * 4), H264D_MAX_SLICE) * \ + _size = MIN((((_height + 15) >> 4) * 48), H264D_MAX_SLICE) * \ SIZE_H264D_VPP_CMD_PER_BUF; \ if (_size > VPP_CMD_MAX_SIZE) { _size = VPP_CMD_MAX_SIZE; } \ } while (0) From 1e87ceec2b1b4bd26281cf5373645d66fdc9b99d Mon Sep 17 00:00:00 2001 From: Mihir Ganu Date: Wed, 6 Jul 2022 09:08:00 -0700 Subject: [PATCH 0673/1061] video: driver: Introduce a property to set COMV bufcount Certain codecs/use cases require larger COMV buffer sizes to achieve performance. Introduce a property to set COMV bufcount and calculate COMV buffer size based on the bufcount. Change-Id: Ib0ed8afe77708dc453cbcc121bcd8606db637152 Signed-off-by: Mihir Ganu --- driver/platform/kalama/src/msm_vidc_kalama.c | 3 ++ driver/variant/iris3/inc/hfi_buffer_iris3.h | 12 ++++---- .../variant/iris3/src/msm_vidc_buffer_iris3.c | 30 ++++++++++++++----- driver/vidc/inc/hfi_property.h | 2 ++ driver/vidc/inc/msm_vdec.h | 1 + driver/vidc/inc/msm_vidc_internal.h | 1 + driver/vidc/src/msm_vdec.c | 27 +++++++++++++++++ driver/vidc/src/msm_vidc_buffer.c | 5 +--- driver/vidc/src/msm_vidc_driver.c | 7 +++++ 9 files changed, 71 insertions(+), 17 deletions(-) diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index 3a5d43c55a..aad98b4361 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -486,6 +486,9 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { {LOWLATENCY_MAX_BITRATE, ENC, H264|HEVC, 0, 70000000, 1, 70000000}, + {NUM_COMV, DEC, CODECS_ALL, + 0, INT_MAX, 1, 0}, + {LOSSLESS, ENC, HEVC, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, diff --git a/driver/variant/iris3/inc/hfi_buffer_iris3.h b/driver/variant/iris3/inc/hfi_buffer_iris3.h index e81410e829..8064b47833 100644 --- a/driver/variant/iris3/inc/hfi_buffer_iris3.h +++ b/driver/variant/iris3/inc/hfi_buffer_iris3.h @@ -386,7 +386,7 @@ typedef HFI_U32 HFI_BOOL; } while (0) #define HFI_BUFFER_COMV_H264D(coMV_size, frame_width, \ - frame_height, _yuv_bufcount_min) \ + frame_height, _comv_bufcount) \ do \ { \ HFI_U32 frame_width_in_mbs = ((frame_width + 15) >> 4); \ @@ -413,7 +413,7 @@ typedef HFI_U32 HFI_BOOL; size_colloc = HFI_ALIGN(size_colloc, \ BUFFER_ALIGNMENT_512_BYTES); \ size_colloc += (col_zero_size + SIZE_H264D_BUFTAB_T * 2); \ - coMV_size = size_colloc * (_yuv_bufcount_min); \ + coMV_size = size_colloc * (_comv_bufcount); \ coMV_size += BUFFER_ALIGNMENT_512_BYTES; \ } while (0) @@ -597,13 +597,13 @@ typedef HFI_U32 HFI_BOOL; } while (0) #define HFI_BUFFER_COMV_H265D(_size, frame_width, frame_height, \ - _yuv_bufcount_min) \ + _comv_bufcount) \ do \ { \ _size = HFI_ALIGN(((((frame_width + 15) >> 4) * \ ((frame_height + 15) >> 4)) << 8), \ BUFFER_ALIGNMENT_512_BYTES); \ - _size *= _yuv_bufcount_min; \ + _size *= _comv_bufcount; \ _size += BUFFER_ALIGNMENT_512_BYTES; \ } while (0) @@ -893,14 +893,14 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define AV1D_MAX_TILE_COLS 64 #define HFI_BUFFER_COMV_AV1D(_size, frame_width, frame_height, \ - _yuv_bufcount_min) \ + _comv_bufcount) \ do { \ _size = 2 * HFI_ALIGN(MAX(((frame_width + 63) / 64) * \ ((frame_height + 63) / 64) * 512, \ ((frame_width + 127) / 128) * \ ((frame_height + 127) / 128) * 2816), \ VENUS_DMA_ALIGNMENT); \ - _size *= _yuv_bufcount_min; \ + _size *= _comv_bufcount; \ } while (0) #define SIZE_AV1D_LB_FE_TOP_DATA(frame_width, frame_height) \ diff --git a/driver/variant/iris3/src/msm_vidc_buffer_iris3.c b/driver/variant/iris3/src/msm_vidc_buffer_iris3.c index 93f062ad22..38ce2a15e9 100644 --- a/driver/variant/iris3/src/msm_vidc_buffer_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_buffer_iris3.c @@ -68,10 +68,10 @@ static u32 msm_vidc_decoder_bin_size_iris3(struct msm_vidc_inst *inst) static u32 msm_vidc_decoder_comv_size_iris3(struct msm_vidc_inst* inst) { u32 size = 0; - u32 width, height, out_min_count, vpp_delay; + u32 width, height, num_comv, vpp_delay; struct v4l2_format *f; - if (!inst || !inst->core) { + if (!inst || !inst->core || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); return size; } @@ -79,17 +79,33 @@ static u32 msm_vidc_decoder_comv_size_iris3(struct msm_vidc_inst* inst) f = &inst->fmts[INPUT_PORT]; width = f->fmt.pix_mp.width; height = f->fmt.pix_mp.height; + + if (inst->codec == MSM_VIDC_AV1) { + /* + * AV1 requires larger COMV buffer size to meet performance + * for certain use cases. Increase the COMV buffer size by + * increasing COMV bufcount. Use lower count for 8k to + * achieve performance but save memory. + */ + if (res_is_greater_than(width, height, 4096, 2176)) + num_comv = inst->buffers.output.min_count + 3; + else + num_comv = inst->buffers.output.min_count + 7; + } else { + num_comv = inst->buffers.output.min_count; + } + msm_vidc_update_cap_value(inst, NUM_COMV, num_comv, __func__); + if (inst->decode_vpp_delay.enable) vpp_delay = inst->decode_vpp_delay.size; else vpp_delay = DEFAULT_BSE_VPP_DELAY; - out_min_count = inst->buffers.output.min_count; - out_min_count = max(vpp_delay + 1, out_min_count); + num_comv = max(vpp_delay + 1, num_comv); if (inst->codec == MSM_VIDC_H264) { - HFI_BUFFER_COMV_H264D(size, width, height, out_min_count); + HFI_BUFFER_COMV_H264D(size, width, height, num_comv); } else if (inst->codec == MSM_VIDC_HEVC || inst->codec == MSM_VIDC_HEIC) { - HFI_BUFFER_COMV_H265D(size, width, height, out_min_count); + HFI_BUFFER_COMV_H265D(size, width, height, num_comv); } else if (inst->codec == MSM_VIDC_AV1) { /* * When DRAP is enabled, COMV buffer is part of PERSIST buffer and @@ -99,7 +115,7 @@ static u32 msm_vidc_decoder_comv_size_iris3(struct msm_vidc_inst* inst) if (inst->capabilities->cap[DRAP].value) size = 0; else - HFI_BUFFER_COMV_AV1D(size, width, height, out_min_count); + HFI_BUFFER_COMV_AV1D(size, width, height, num_comv); } i_vpr_l(inst, "%s: size %d\n", __func__, size); diff --git a/driver/vidc/inc/hfi_property.h b/driver/vidc/inc/hfi_property.h index 2661837ff4..e383cbd0b3 100644 --- a/driver/vidc/inc/hfi_property.h +++ b/driver/vidc/inc/hfi_property.h @@ -565,6 +565,8 @@ enum hfi_saliency_type { #define HFI_PROP_DOLBY_RPU_METADATA 0x03000192 +#define HFI_PROP_COMV_BUFFER_COUNT 0x03000193 + #define HFI_PROP_END 0x03FFFFFF #define HFI_SESSION_ERROR_BEGIN 0x04000000 diff --git a/driver/vidc/inc/msm_vdec.h b/driver/vidc/inc/msm_vdec.h index 409f8b7300..b9f721e567 100644 --- a/driver/vidc/inc/msm_vdec.h +++ b/driver/vidc/inc/msm_vdec.h @@ -30,6 +30,7 @@ int msm_vdec_output_port_settings_change(struct msm_vidc_inst *inst); int msm_vdec_process_cmd(struct msm_vidc_inst *inst, u32 cmd); int msm_vdec_handle_release_buffer(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buf); +int msm_vdec_set_num_comv(struct msm_vidc_inst *inst); int msm_vdec_get_input_internal_buffers(struct msm_vidc_inst *inst); int msm_vdec_create_input_internal_buffers(struct msm_vidc_inst *inst); int msm_vdec_queue_input_internal_buffers(struct msm_vidc_inst *inst); diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 54843ba6f0..2ea18427ed 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -501,6 +501,7 @@ enum msm_vidc_inst_capability_type { ALLINTRA_MAX_BITRATE, LOWLATENCY_MAX_BITRATE, LAST_FLAG_EVENT_ENABLE, + NUM_COMV, /* place all root(no parent) enums before this line */ PROFILE, diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index daf9bf3abc..1b7c2b4395 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -1224,6 +1224,33 @@ int msm_vdec_init_input_subcr_params(struct msm_vidc_inst *inst) return 0; } +int msm_vdec_set_num_comv(struct msm_vidc_inst *inst) +{ + int rc = 0; + u32 num_comv = 0; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + num_comv = inst->capabilities->cap[NUM_COMV].value; + i_vpr_h(inst, "%s: num COMV: %d", __func__, num_comv); + rc = venus_hfi_session_property(inst, + HFI_PROP_COMV_BUFFER_COUNT, + HFI_HOST_FLAGS_NONE, + get_hfi_port(inst, INPUT_PORT), + HFI_PAYLOAD_U32, + &num_comv, + sizeof(u32)); + if (rc) { + i_vpr_e(inst, "%s: set property failed\n", __func__); + return rc; + } + + return rc; +} + static int msm_vdec_read_input_subcr_params(struct msm_vidc_inst *inst) { struct msm_vidc_subscription_params subsc_params; diff --git a/driver/vidc/src/msm_vidc_buffer.c b/driver/vidc/src/msm_vidc_buffer.c index a8fc74f886..0aac6a755e 100644 --- a/driver/vidc/src/msm_vidc_buffer.c +++ b/driver/vidc/src/msm_vidc_buffer.c @@ -70,11 +70,8 @@ u32 msm_vidc_output_min_count(struct msm_vidc_inst *inst) output_min_count = 4; break; case MSM_VIDC_VP9: - output_min_count = 9; - break; case MSM_VIDC_AV1: - // TODO: needs review - output_min_count = 11; + output_min_count = 9; break; case MSM_VIDC_HEIC: output_min_count = 3; diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 8687ccd08c..260a8c0888 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -195,6 +195,7 @@ static const struct msm_vidc_cap_name cap_name_arr[] = { {ALLINTRA_MAX_BITRATE, "ALLINTRA_MAX_BITRATE" }, {LOWLATENCY_MAX_BITRATE, "LOWLATENCY_MAX_BITRATE" }, {LAST_FLAG_EVENT_ENABLE, "LAST_FLAG_EVENT_ENABLE" }, + {NUM_COMV, "NUM_COMV" }, {PROFILE, "PROFILE" }, {ENH_LAYER_COUNT, "ENH_LAYER_COUNT" }, {BIT_RATE, "BIT_RATE" }, @@ -3946,6 +3947,12 @@ int msm_vidc_queue_internal_buffers(struct msm_vidc_inst *inst, return 0; } + if (is_decode_session(inst) && buffer_type == MSM_VIDC_BUF_COMV) { + rc = msm_vdec_set_num_comv(inst); + if (rc) + return rc; + } + list_for_each_entry_safe(buffer, dummy, &buffers->list, list) { /* do not queue pending release buffers */ if (buffer->flags & MSM_VIDC_ATTR_PENDING_RELEASE) From 50a00f826583d8a107a3a4e65531a0e47d783e0f Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Thu, 7 Jul 2022 17:36:20 -0700 Subject: [PATCH 0674/1061] video: driver: Avoid device crash after fence usecase execution Since spin lock for fence is per session based and stored in instance memory, by the time fence consumer released the fence, driver close might be called and instance memory might be cleared. So, when fence consumer released the fence, at the time of fence release callback, this spin lock might nt be available. This race condition is resulting into device crash after fence playback session ends. Avoid this by using per fence based spin lock, which decouples it from instance memory. Change-Id: I12d6976c0bac3f0211bb16e24009603b37471ef3 Signed-off-by: Akshata Sahukar --- driver/vidc/inc/msm_vidc_internal.h | 2 +- driver/vidc/src/msm_vidc_fence.c | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 2ea18427ed..b1ae1813b4 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -843,13 +843,13 @@ struct msm_vidc_fence_context { char name[MAX_NAME_LENGTH]; u64 ctx_num; u64 seq_num; - spinlock_t lock; }; struct msm_vidc_fence { struct list_head list; struct dma_fence dma_fence; char name[MAX_NAME_LENGTH]; + spinlock_t lock; struct sync_file *sync_file; int fd; }; diff --git a/driver/vidc/src/msm_vidc_fence.c b/driver/vidc/src/msm_vidc_fence.c index dd5c0caa6c..fcb8b639fd 100644 --- a/driver/vidc/src/msm_vidc_fence.c +++ b/driver/vidc/src/msm_vidc_fence.c @@ -65,8 +65,9 @@ struct msm_vidc_fence *msm_vidc_fence_create(struct msm_vidc_inst *inst) return NULL; fence->fd = INVALID_FD; + spin_lock_init(&fence->lock); dma_fence_init(&fence->dma_fence, &msm_vidc_dma_fence_ops, - &inst->fence_context.lock, inst->fence_context.ctx_num, + &fence->lock, inst->fence_context.ctx_num, ++inst->fence_context.seq_num); snprintf(fence->name, sizeof(fence->name), "%s: %llu", inst->fence_context.name, inst->fence_context.seq_num); @@ -201,7 +202,6 @@ int msm_vidc_fence_init(struct msm_vidc_inst *inst) } inst->fence_context.ctx_num = dma_fence_context_alloc(1); - spin_lock_init(&inst->fence_context.lock); snprintf(inst->fence_context.name, sizeof(inst->fence_context.name), "msm_vidc_fence: %s: %llu", inst->debug_str, inst->fence_context.ctx_num); From 34c527a939c63737ef663fccf4f5dceaa1bcc05d Mon Sep 17 00:00:00 2001 From: Mihir Ganu Date: Sun, 10 Jul 2022 20:19:46 -0700 Subject: [PATCH 0675/1061] video: driver: Subscribe to output metadata in both ports Subscribe output metadatas in both input and output ports so that metadatas which are detected in bitstream before output port is started are not missed. Example: AV1 HDR metadata which can be part of first ETB (sequence header OBU + metadata OBU) Change-Id: I77d75b42dcee79e0258ba96e6ab86d06ead2eaf4 Signed-off-by: Mihir Ganu --- driver/vidc/src/msm_vdec.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 1b7c2b4395..7596fa6fac 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -1492,6 +1492,17 @@ int msm_vdec_streamon_input(struct msm_vidc_inst *inst) if (rc) goto error; + /* + * Subscribe output metadatas in input port sequence as well so that + * metadatas detected in bitstream before output port is started + * are not missed. + * Example: AV1 HDR metadata which can be part of + * first ETB (sequence header OBU + metadata OBU) + */ + rc = msm_vdec_subscribe_metadata(inst, OUTPUT_PORT); + if (rc) + goto error; + rc = msm_vdec_set_delivery_mode_metadata(inst, INPUT_PORT); if (rc) goto error; From da980f75824f39269d5a04774745d3f9a74c0d2b Mon Sep 17 00:00:00 2001 From: Renjiang Han Date: Tue, 12 Jul 2022 10:45:58 +0800 Subject: [PATCH 0676/1061] video: driver: Set the fps of vp9 to the standard value 180fps is not a standard value, so we need to change MAXIMUM_OVERRIDE_VP9_FPS to 200. Change-Id: Ia32fc20598b8a2908ec3057dd0b00b40ea429b42 Signed-off-by: Renjiang Han --- driver/platform/anorak/src/msm_vidc_anorak.c | 2 +- driver/platform/kalama/src/msm_vidc_kalama.c | 2 +- driver/platform/waipio/src/msm_vidc_waipio.c | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/driver/platform/anorak/src/msm_vidc_anorak.c b/driver/platform/anorak/src/msm_vidc_anorak.c index 432375c4ff..d0d976a156 100644 --- a/driver/platform/anorak/src/msm_vidc_anorak.c +++ b/driver/platform/anorak/src/msm_vidc_anorak.c @@ -40,7 +40,7 @@ #define AV1 MSM_VIDC_AV1 #define HEIC MSM_VIDC_HEIC #define CODECS_ALL (H264 | HEVC | VP9 | HEIC | AV1) -#define MAXIMUM_OVERRIDE_VP9_FPS 180 +#define MAXIMUM_OVERRIDE_VP9_FPS 200 static struct msm_platform_core_capability core_data_anorak[] = { /* {type, value} */ diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index aad98b4361..f3ef11a63e 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -41,7 +41,7 @@ #define AV1 MSM_VIDC_AV1 #define HEIC MSM_VIDC_HEIC #define CODECS_ALL (H264 | HEVC | VP9 | HEIC | AV1) -#define MAXIMUM_OVERRIDE_VP9_FPS 180 +#define MAXIMUM_OVERRIDE_VP9_FPS 200 static struct msm_platform_core_capability core_data_kalama[] = { /* {type, value} */ diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 72c18b248f..8e9a448c30 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -37,7 +37,7 @@ #define VP9 MSM_VIDC_VP9 #define HEIC MSM_VIDC_HEIC #define CODECS_ALL (H264 | HEVC | VP9 | HEIC) -#define MAXIMUM_OVERRIDE_VP9_FPS 180 +#define MAXIMUM_OVERRIDE_VP9_FPS 200 static struct msm_platform_core_capability core_data_waipio[] = { /* {type, value} */ From 089b0f125b5a0c9f3b35cad2d5184ea9f1f0a60e Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Tue, 12 Jul 2022 16:25:52 -0700 Subject: [PATCH 0677/1061] video: driver: 5 percent increase for vsp and vpp cycles 8k@30 fps encode has a very low margin for sw/fw at 338MHz. Hence, increase core clock little bit(5%) to move to the next corner i.e., 366MHz. Change-Id: Idebde3c726086ec49d1fb0ca4525953dd3a30ba9 Signed-off-by: Akshata Sahukar --- .../variant/iris3/src/msm_vidc_power_iris3.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/driver/variant/iris3/src/msm_vidc_power_iris3.c b/driver/variant/iris3/src/msm_vidc_power_iris3.c index 39626c8321..3538fcdf93 100644 --- a/driver/variant/iris3/src/msm_vidc_power_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_power_iris3.c @@ -83,6 +83,16 @@ u64 msm_vidc_calc_freq_iris3(struct msm_vidc_inst *inst, u32 data_size) if (inst->capabilities->cap[REQUEST_PREPROCESS].value) vpp_cycles = vpp_cycles + vpp_cycles / 2; + if (res_is_greater_than(inst->crop.width, inst->crop.height, + 4096 + (4096 >> 1), 2176 + (2176 >> 1))) { + /* + * 8k@30 fps encode has a very low margin for sw/fw at 338MHz. + * Hence, increase core clock little bit(5%) to move to the next + * corner i.e., 366MHz. + */ + vpp_cycles = div_u64(vpp_cycles * 21, 20); + } + /* VSP */ /* bitrate is based on fps, scale it using operating rate */ operating_rate = inst->capabilities->cap[OPERATING_RATE].value >> 16; @@ -113,6 +123,15 @@ u64 msm_vidc_calc_freq_iris3(struct msm_vidc_inst *inst, u32 data_size) vsp_cycles += mbs_per_second * base_cycles; + if (res_is_greater_than(inst->crop.width, inst->crop.height, + 4096 + (4096 >> 1), 2176 + (2176 >> 1))) { + /* + * 8k@30 fps encode has a very low margin for sw/fw at 338MHz. + * Hence, increase core clock little bit(5%) to move to the next + * corner i.e., 366MHz. + */ + vsp_cycles = div_u64(vsp_cycles * 21, 20); + } } else if (inst->domain == MSM_VIDC_DECODER) { /* VPP */ vpp_cycles = mbs_per_second * inst->capabilities->cap[MB_CYCLES_VPP].value / From 12adb66124b213ce416507d421d3e7d88cac2544 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Fri, 8 Jul 2022 19:16:17 +0530 Subject: [PATCH 0678/1061] video: driver: add asynchronous probe support Added async probe for video driver to reduce bootup latency. In insmod/probe sequence, registered all video sub-devices with component_model framework, so that once all sub-device probe completes master/vidc node bind() callback willbe called. So as part of bind, video driver will do core_init sequence. Due to async probe all sub-device probe willbe called asynchronously from different threads. During rmmod/remove sequence master/vidc node may not be called first and instead child node remove might be called, which will intern calls component_del() api. 1st call to this api will internally invoke unbind() callback of master. So as part of unbind() video driver will do core_deinit() sequence. of_platform_depopulate() will act as sync point on master node. Which will make sure all residual sub-device removal completion. So it will guarantee video device/master cleanup happens only after all sub-devices removal. Change-Id: Ia40d4b1aa54633ef26fff2c207da78f15e305363 Signed-off-by: Govindaraj Rajagopal --- driver/vidc/src/msm_vidc_probe.c | 138 +++++++++++++++++++++++++++---- 1 file changed, 121 insertions(+), 17 deletions(-) diff --git a/driver/vidc/src/msm_vidc_probe.c b/driver/vidc/src/msm_vidc_probe.c index 8f31a20ed2..89701b960a 100644 --- a/driver/vidc/src/msm_vidc_probe.c +++ b/driver/vidc/src/msm_vidc_probe.c @@ -8,6 +8,7 @@ #include #include #include +#include #include #include "msm_vidc_internal.h" @@ -341,6 +342,88 @@ exit: return rc; } +static int msm_vidc_component_compare_of(struct device *dev, void *data) +{ + return dev->of_node == data; +} + +static void msm_vidc_component_release_of(struct device *dev, void *data) +{ + d_vpr_h("%s(): %s\n", __func__, of_node_full_name(data)); + of_node_put(data); +} + +static int msm_vidc_component_cb_bind(struct device *dev, + struct device *master, void *data) +{ + d_vpr_h("%s(): %s\n", __func__, dev_name(dev)); + return 0; +} + +static void msm_vidc_component_cb_unbind(struct device *dev, + struct device *master, void *data) +{ + d_vpr_h("%s(): %s\n", __func__, dev_name(dev)); +} + +static int msm_vidc_component_bind(struct device *dev) +{ + struct msm_vidc_core *core = dev_get_drvdata(dev); + int rc = 0; + + d_vpr_h("%s(): %s\n", __func__, dev_name(dev)); + + rc = component_bind_all(dev, core); + if (rc) { + d_vpr_e("%s: sub-device bind failed\n", __func__); + return rc; + } + + rc = venus_hfi_interface_queues_init(core); + if (rc) { + d_vpr_e("%s: interface queues init failed\n", __func__); + goto queues_deinit; + } + + rc = msm_vidc_core_init(core); + if (rc) { + d_vpr_e("%s: sys init failed\n", __func__); + goto queues_deinit; + } + + d_vpr_h("%s(): succssful\n", __func__); + + return rc; + +queues_deinit: + venus_hfi_interface_queues_deinit(core); + component_unbind_all(dev, core); + return rc; +} + +static void msm_vidc_component_unbind(struct device *dev) +{ + struct msm_vidc_core *core = dev_get_drvdata(dev); + + d_vpr_h("%s(): %s\n", __func__, dev_name(dev)); + + msm_vidc_core_deinit(core, true); + venus_hfi_interface_queues_deinit(core); + component_unbind_all(dev, core); + + d_vpr_h("%s(): succssful\n", __func__); +} + +static const struct component_ops msm_vidc_component_cb_ops = { + .bind = msm_vidc_component_cb_bind, + .unbind = msm_vidc_component_cb_unbind, +}; + +static const struct component_master_ops msm_vidc_component_ops = { + .bind = msm_vidc_component_bind, + .unbind = msm_vidc_component_unbind, +}; + static int msm_vidc_remove_video_device(struct platform_device *pdev) { struct msm_vidc_core* core; @@ -357,9 +440,8 @@ static int msm_vidc_remove_video_device(struct platform_device *pdev) d_vpr_h("%s()\n", __func__); - msm_vidc_core_deinit(core, true); - - venus_hfi_interface_queues_deinit(core); + /* destroy component master and deallocate match data */ + component_master_del(&pdev->dev, &msm_vidc_component_ops); d_vpr_h("depopulating sub devices\n"); /* @@ -396,6 +478,7 @@ static int msm_vidc_remove_video_device(struct platform_device *pdev) debugfs_remove_recursive(core->debugfs_parent); msm_vidc_vmem_free((void **)&core); g_core = NULL; + d_vpr_h("%s(): succssful\n", __func__); return 0; } @@ -405,6 +488,8 @@ static int msm_vidc_remove_context_bank(struct platform_device *pdev) d_vpr_h("%s(): Detached %s and destroyed mapping\n", __func__, dev_name(&pdev->dev)); + component_del(&pdev->dev, &msm_vidc_component_cb_ops); + return 0; } @@ -430,8 +515,10 @@ static int msm_vidc_remove(struct platform_device *pdev) static int msm_vidc_probe_video_device(struct platform_device *pdev) { int rc = 0; + struct component_match *match = NULL; struct msm_vidc_core *core = NULL; - int nr = BASE_DEVICE_NUMBER; + struct device_node *child = NULL; + int sub_device_count = 0, nr = BASE_DEVICE_NUMBER; d_vpr_h("%s()\n", __func__); @@ -535,7 +622,21 @@ static int msm_vidc_probe_video_device(struct platform_device *pdev) if (!core->debugfs_root) d_vpr_h("Failed to init debugfs core\n"); - d_vpr_h("populating sub devices\n"); + /* registering sub-device with component model framework */ + for_each_available_child_of_node(pdev->dev.of_node, child) { + sub_device_count++; + of_node_get(child); + component_match_add_release(&pdev->dev, &match, msm_vidc_component_release_of, + msm_vidc_component_compare_of, child); + if (IS_ERR(match)) { + of_node_put(child); + rc = PTR_ERR(match) ? PTR_ERR(match) : -ENOMEM; + d_vpr_e("%s: component match add release failed\n", __func__); + goto sub_dev_failed; + } + } + + d_vpr_h("populating sub devices. count %d\n", sub_device_count); /* * Trigger probe for each sub-device i.e. qcom,msm-vidc,context-bank. * When msm_vidc_probe is called for each sub-device, parse the @@ -549,24 +650,18 @@ static int msm_vidc_probe_video_device(struct platform_device *pdev) goto sub_dev_failed; } - rc = venus_hfi_interface_queues_init(core); + /* create component master and add match data */ + rc = component_master_add_with_match(&pdev->dev, &msm_vidc_component_ops, match); if (rc) { - d_vpr_e("%s: interface queues init failed\n", __func__); - goto queues_init_failed; + d_vpr_e("%s: component master add with match failed\n", __func__); + goto master_add_failed; } - rc = msm_vidc_core_init(core); - if (rc) { - d_vpr_e("%s: sys init failed\n", __func__); - goto core_init_failed; - } d_vpr_h("%s(): succssful\n", __func__); return rc; -core_init_failed: - venus_hfi_interface_queues_deinit(core); -queues_init_failed: +master_add_failed: of_platform_depopulate(&pdev->dev); sub_dev_failed: #ifdef CONFIG_MEDIA_CONTROLLER @@ -603,9 +698,15 @@ init_core_failed: static int msm_vidc_probe_context_bank(struct platform_device *pdev) { + int rc = 0; + d_vpr_h("%s()\n", __func__); - return msm_vidc_read_context_bank_resources_from_dt(pdev); + rc = msm_vidc_read_context_bank_resources_from_dt(pdev); + if (rc) + return rc; + + return component_add(&pdev->dev, &msm_vidc_component_cb_ops); } static int msm_vidc_probe(struct platform_device *pdev) @@ -698,6 +799,7 @@ struct platform_driver msm_vidc_driver = { .name = "msm_vidc_v4l2", .of_match_table = msm_vidc_dt_match, .pm = &msm_vidc_pm_ops, + .probe_type = PROBE_PREFER_ASYNCHRONOUS, }, }; @@ -712,6 +814,7 @@ static int __init msm_vidc_init(void) d_vpr_e("Failed to register platform driver\n"); return rc; } + d_vpr_h("%s(): succssful\n", __func__); return 0; } @@ -721,6 +824,7 @@ static void __exit msm_vidc_exit(void) d_vpr_h("%s()\n", __func__); platform_driver_unregister(&msm_vidc_driver); + d_vpr_h("%s(): succssful\n", __func__); } module_init(msm_vidc_init); From e4360dc18ea635846512a0eab84f51a8c248d2e4 Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Wed, 13 Jul 2022 17:24:41 -0700 Subject: [PATCH 0679/1061] video: driver: misc fixes for venv project Change-Id: I4b5495ac4669a1e4519ac855d6b995e9d259f335 Signed-off-by: Darshana Patil --- driver/vidc/inc/msm_vidc_driver.h | 28 ++++++++++++++-------------- driver/vidc/src/msm_vdec.c | 2 +- driver/vidc/src/msm_vidc_control.c | 2 +- 3 files changed, 16 insertions(+), 16 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index a66000321b..230ac8e052 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -18,63 +18,63 @@ enum msm_vidc_debugfs_event; -static inline is_decode_session(struct msm_vidc_inst *inst) +static inline bool is_decode_session(struct msm_vidc_inst *inst) { return inst->domain == MSM_VIDC_DECODER; } -static inline is_encode_session(struct msm_vidc_inst *inst) +static inline bool is_encode_session(struct msm_vidc_inst *inst) { return inst->domain == MSM_VIDC_ENCODER; } -static inline is_image_encode_session(struct msm_vidc_inst *inst) +static inline bool is_image_encode_session(struct msm_vidc_inst *inst) { return inst->codec == MSM_VIDC_HEIC && inst->domain == MSM_VIDC_ENCODER; } -static inline is_image_decode_session(struct msm_vidc_inst *inst) +static inline bool is_image_decode_session(struct msm_vidc_inst *inst) { return inst->codec == MSM_VIDC_HEIC && inst->domain == MSM_VIDC_DECODER; } -static inline is_image_session(struct msm_vidc_inst *inst) +static inline bool is_image_session(struct msm_vidc_inst *inst) { return inst->codec == MSM_VIDC_HEIC; } -static inline is_secure_session(struct msm_vidc_inst *inst) +static inline bool is_secure_session(struct msm_vidc_inst *inst) { return !!(inst->capabilities->cap[SECURE_MODE].value); } -static inline is_input_buffer(enum msm_vidc_buffer_type buffer_type) +static inline bool is_input_buffer(enum msm_vidc_buffer_type buffer_type) { return buffer_type == MSM_VIDC_BUF_INPUT; } -static inline is_output_buffer(enum msm_vidc_buffer_type buffer_type) +static inline bool is_output_buffer(enum msm_vidc_buffer_type buffer_type) { return buffer_type == MSM_VIDC_BUF_OUTPUT; } -static inline is_input_meta_buffer(enum msm_vidc_buffer_type buffer_type) +static inline bool is_input_meta_buffer(enum msm_vidc_buffer_type buffer_type) { return buffer_type == MSM_VIDC_BUF_INPUT_META; } -static inline is_output_meta_buffer(enum msm_vidc_buffer_type buffer_type) +static inline bool is_output_meta_buffer(enum msm_vidc_buffer_type buffer_type) { return buffer_type == MSM_VIDC_BUF_OUTPUT_META; } -static inline is_ts_reorder_allowed(struct msm_vidc_inst *inst) +static inline bool is_ts_reorder_allowed(struct msm_vidc_inst *inst) { return !!(inst->capabilities->cap[TS_REORDER].value && is_decode_session(inst) && !is_image_session(inst)); } -static inline is_scaling_enabled(struct msm_vidc_inst *inst) +static inline bool is_scaling_enabled(struct msm_vidc_inst *inst) { return inst->crop.left != inst->compose.left || inst->crop.top != inst->compose.top || @@ -82,13 +82,13 @@ static inline is_scaling_enabled(struct msm_vidc_inst *inst) inst->crop.height != inst->compose.height; } -static inline is_rotation_90_or_270(struct msm_vidc_inst *inst) +static inline bool is_rotation_90_or_270(struct msm_vidc_inst *inst) { return inst->capabilities->cap[ROTATION].value == 90 || inst->capabilities->cap[ROTATION].value == 270; } -static inline is_internal_buffer(enum msm_vidc_buffer_type buffer_type) +static inline bool is_internal_buffer(enum msm_vidc_buffer_type buffer_type) { return buffer_type == MSM_VIDC_BUF_BIN || buffer_type == MSM_VIDC_BUF_ARP || diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 7596fa6fac..ea64f9cfa4 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -2133,7 +2133,7 @@ int msm_vdec_qbuf(struct msm_vidc_inst *inst, struct vb2_buffer *vb2) return rc; } -static msm_vdec_alloc_and_queue_additional_dpb_buffers(struct msm_vidc_inst *inst) +static int msm_vdec_alloc_and_queue_additional_dpb_buffers(struct msm_vidc_inst *inst) { struct msm_vidc_buffers *buffers; struct msm_vidc_buffer *buffer = NULL; diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index fa2531edf1..bd68cd1d74 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -3981,7 +3981,7 @@ int msm_vidc_set_blur_resolution(void *instance, return rc; } -static msm_venc_set_csc_coeff(struct msm_vidc_inst *inst, +static int msm_venc_set_csc_coeff(struct msm_vidc_inst *inst, const char *prop_name, u32 hfi_id, void *payload, u32 payload_size, u32 row_count, u32 column_count) { From 267e11c2a4807ed467b72b2816be38abf60a494f Mon Sep 17 00:00:00 2001 From: Deepa Guthyappa Madivalara Date: Wed, 13 Jul 2022 11:05:57 -0700 Subject: [PATCH 0680/1061] video: driver: set clock rate to max for DRC or DRAIN substates Increase clock rate to maximum in case of DRC or DRAIN substates to speed up DRC or DRAIN sequences. Change-Id: I0fd63b97267d37c18ad2d05069ab494b1b37fea8 Signed-off-by: Deepa Guthyappa Madivalara --- driver/vidc/src/msm_vidc_driver.c | 4 ++++ driver/vidc/src/msm_vidc_power.c | 5 ++++- 2 files changed, 8 insertions(+), 1 deletion(-) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 260a8c0888..8566db5dfc 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -1879,6 +1879,8 @@ int msm_vidc_process_drain(struct msm_vidc_inst *inst) if (rc) return rc; + msm_vidc_scale_power(inst, true); + return rc; } @@ -1893,6 +1895,8 @@ int msm_vidc_process_resume(struct msm_vidc_inst *inst) return -EINVAL; } + msm_vidc_scale_power(inst, true); + /* first check DRC pending else check drain pending */ if (is_sub_state(inst, MSM_VIDC_DRC) && is_sub_state(inst, MSM_VIDC_DRC_LAST_BUFFER)) { diff --git a/driver/vidc/src/msm_vidc_power.c b/driver/vidc/src/msm_vidc_power.c index dd2ff96e68..7610f1d42f 100644 --- a/driver/vidc/src/msm_vidc_power.c +++ b/driver/vidc/src/msm_vidc_power.c @@ -470,7 +470,10 @@ int msm_vidc_scale_clocks(struct msm_vidc_inst *inst) } core = inst->core; - if (inst->power.buffer_counter < DCVS_WINDOW || is_image_session(inst)) { + if (inst->power.buffer_counter < DCVS_WINDOW || + is_image_session(inst) || + is_sub_state(inst, MSM_VIDC_DRC) || + is_sub_state(inst, MSM_VIDC_DRAIN)) { inst->power.min_freq = msm_vidc_max_freq(inst); inst->power.dcvs_flags = 0; } else if (msm_vidc_clock_voting) { From 2e52eecb78e976e16868fb7ab9d6a3ea53b859b3 Mon Sep 17 00:00:00 2001 From: Manikanta Kanamarlapudi Date: Fri, 8 Jul 2022 12:45:24 +0530 Subject: [PATCH 0681/1061] video: driver: add vui timing info control Add vui timing info control with default value as disabled in driver. Change-Id: Ibaa45303fe389a0120d487fe3b6ff336e721f359 Signed-off-by: Manikanta Kanamarlapudi --- driver/platform/kalama/src/msm_vidc_kalama.c | 14 +++++++++ driver/vidc/inc/hfi_property.h | 2 ++ driver/vidc/inc/msm_vidc_control.h | 2 ++ driver/vidc/inc/msm_vidc_internal.h | 1 + driver/vidc/src/msm_vidc_control.c | 30 +++++++++++++++++++ driver/vidc/src/msm_vidc_driver.c | 1 + .../uapi/vidc/media/v4l2_vidc_extensions.h | 3 ++ 7 files changed, 53 insertions(+) diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index f3ef11a63e..82d67054b5 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -400,6 +400,14 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDEO_PREPEND_SPSPPS_TO_IDR}, + {VUI_TIMING_INFO, ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_VUI_TIMING_INFO, + HFI_PROP_DISABLE_VUI_TIMING_INFO, + CAP_FLAG_OUTPUT_PORT}, + {WITHOUT_STARTCODE, ENC, CODECS_ALL, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, @@ -2415,6 +2423,12 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kala {SLICE_MODE}, {LOWLATENCY_MODE, OUTPUT_BUF_HOST_MAX_COUNT}, msm_vidc_adjust_delivery_mode, msm_vidc_set_u32}, + + {VUI_TIMING_INFO, ENC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_vui_timing_info}, }; /* Default UBWC config for LPDDR5 */ diff --git a/driver/vidc/inc/hfi_property.h b/driver/vidc/inc/hfi_property.h index e383cbd0b3..f48c39ff64 100644 --- a/driver/vidc/inc/hfi_property.h +++ b/driver/vidc/inc/hfi_property.h @@ -567,6 +567,8 @@ enum hfi_saliency_type { #define HFI_PROP_COMV_BUFFER_COUNT 0x03000193 +#define HFI_PROP_DISABLE_VUI_TIMING_INFO 0x03000194 + #define HFI_PROP_END 0x03FFFFFF #define HFI_SESSION_ERROR_BEGIN 0x04000000 diff --git a/driver/vidc/inc/msm_vidc_control.h b/driver/vidc/inc/msm_vidc_control.h index 100bffc0d1..ef8df444d5 100644 --- a/driver/vidc/inc/msm_vidc_control.h +++ b/driver/vidc/inc/msm_vidc_control.h @@ -137,5 +137,7 @@ int msm_vidc_get_parent_value(struct msm_vidc_inst* inst, u32 cap, u32 parent, s32 *value, const char *func); u32 msm_vidc_get_port_info(struct msm_vidc_inst *inst, enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_vui_timing_info(void *instance, + enum msm_vidc_inst_capability_type cap_id); #endif diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index b1ae1813b4..36afe95bb5 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -538,6 +538,7 @@ enum msm_vidc_inst_capability_type { INPUT_BUF_HOST_MAX_COUNT, OUTPUT_BUF_HOST_MAX_COUNT, DELIVERY_MODE, + VUI_TIMING_INFO, /* place all leaf(no child) enums before this line */ INST_CAP_MAX, }; diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index bd68cd1d74..ca5d17fa49 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -4511,3 +4511,33 @@ int msm_vidc_set_pipe(void *instance, return rc; } + +int msm_vidc_set_vui_timing_info(void *instance, + enum msm_vidc_inst_capability_type cap_id) +{ + int rc = 0; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; + u32 hfi_value; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + /* + * hfi is HFI_PROP_DISABLE_VUI_TIMING_INFO and v4l2 cap is + * V4L2_CID_MPEG_VIDC_VUI_TIMING_INFO and hence reverse + * the hfi_value from cap_id value. + */ + if (inst->capabilities->cap[cap_id].value == V4L2_MPEG_MSM_VIDC_ENABLE) + hfi_value = 0; + else + hfi_value = 1; + + rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32, + &hfi_value, sizeof(u32), __func__); + if (rc) + return rc; + + return rc; +} diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 8566db5dfc..ec171c8d90 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -228,6 +228,7 @@ static const struct msm_vidc_cap_name cap_name_arr[] = { {INPUT_BUF_HOST_MAX_COUNT, "INPUT_BUF_HOST_MAX_COUNT" }, {OUTPUT_BUF_HOST_MAX_COUNT, "OUTPUT_BUF_HOST_MAX_COUNT" }, {DELIVERY_MODE, "DELIVERY_MODE" }, + {VUI_TIMING_INFO, "VUI_TIMING_INFO" }, {INST_CAP_MAX, "INST_CAP_MAX" }, }; diff --git a/include/uapi/vidc/media/v4l2_vidc_extensions.h b/include/uapi/vidc/media/v4l2_vidc_extensions.h index 17e02d8293..3cdf1accbb 100644 --- a/include/uapi/vidc/media/v4l2_vidc_extensions.h +++ b/include/uapi/vidc/media/v4l2_vidc_extensions.h @@ -271,6 +271,9 @@ enum v4l2_h264_encode_delivery_mode { #define V4L2_CID_MPEG_VIDC_LAST_FLAG_EVENT_ENABLE \ (V4L2_CID_MPEG_VIDC_BASE + 0x42) +#define V4L2_CID_MPEG_VIDC_VUI_TIMING_INFO \ + (V4L2_CID_MPEG_VIDC_BASE + 0x43) + /* add new controls above this line */ /* Deprecate below controls once availble in gki and gsi bionic header */ #ifndef V4L2_CID_MPEG_VIDEO_BASELAYER_PRIORITY_ID From 9f34254da374e07b5aae0d6669920543d27bd4ac Mon Sep 17 00:00:00 2001 From: Vikash Garodia Date: Tue, 5 Jul 2022 10:19:25 +0530 Subject: [PATCH 0682/1061] video: iris3: Fix the issue in power collapsing video hardware During power collapse, video driver would power collapse video hardware followed by video controller. While power collapsing video hardware, it may happen that video firmware has already power collapsed the video hardware, since it is hardware controlled. For certain cases, like XS WD, it may happen that video hardware may not be power collapsed by video firmware. In such scenario, skipping power collapse sequence of video hardware would lead to unhandled transactions from video hardware. There is a power status register which can clearly suggest if the video hardware is power down or not. Added a check to confirm the power status of video hardware before skipping or executing the power collapse sequence for video hardware. Change-Id: Ibd9cd708a259897262fcc6cab27b26aaf37f1b13 Signed-off-by: Vikash Garodia --- driver/variant/iris3/src/msm_vidc_iris3.c | 38 +++++++++++++++++++++-- driver/vidc/inc/msm_vidc_core.h | 1 + driver/vidc/src/venus_hfi.c | 5 +++ 3 files changed, 42 insertions(+), 2 deletions(-) diff --git a/driver/variant/iris3/src/msm_vidc_iris3.c b/driver/variant/iris3/src/msm_vidc_iris3.c index 62288ed9b8..4eea3813f0 100644 --- a/driver/variant/iris3/src/msm_vidc_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_iris3.c @@ -110,6 +110,7 @@ #define WRAPPER_DEBUG_BRIDGE_LPI_STATUS_IRIS3 (WRAPPER_BASE_OFFS_IRIS3 + 0x58) #define WRAPPER_IRIS_CPU_NOC_LPI_CONTROL (WRAPPER_BASE_OFFS_IRIS3 + 0x5C) #define WRAPPER_IRIS_CPU_NOC_LPI_STATUS (WRAPPER_BASE_OFFS_IRIS3 + 0x60) +#define WRAPPER_CORE_POWER_STATUS (WRAPPER_BASE_OFFS_IRIS3 + 0x80) #define WRAPPER_CORE_CLOCK_CONFIG_IRIS3 (WRAPPER_BASE_OFFS_IRIS3 + 0x88) /* @@ -448,14 +449,47 @@ static int __setup_ucregion_memory_map_iris3(struct msm_vidc_core *vidc_core) return 0; } +static bool is_iris3_hw_power_collapsed(struct msm_vidc_core *core) +{ + int rc = 0; + u32 value = 0, pwr_status = 0; + + rc = __read_register(core, WRAPPER_CORE_POWER_STATUS, &value); + if (rc) + return false; + + /* if BIT(1) is 1 then video hw power is on else off */ + pwr_status = value & BIT(1); + return pwr_status ? false : true; +} + static int __power_off_iris3_hardware(struct msm_vidc_core *core) { int rc = 0, i; u32 value = 0; + bool pwr_collapsed = false; + /* + * Incase hw power control is enabled, when CPU WD occurred, check for power + * status to decide on executing NOC reset sequence before disabling power. + * If there is no CPU WD and hw_power_control is enabled, fw is expected + * to power collapse video hw always. + */ if (core->hw_power_control) { - d_vpr_h("%s: hardware power control enabled\n", __func__); - goto disable_power; + pwr_collapsed = is_iris3_hw_power_collapsed(core); + if (core->cpu_watchdog) { + if (pwr_collapsed) { + d_vpr_e("%s: CPU WD and video hw power collapsed\n", __func__); + goto disable_power; + } else { + d_vpr_e("%s: CPU WD and video hw is power ON\n", __func__); + } + } else { + if (!pwr_collapsed) + d_vpr_e("%s: video hw is not power collapsed\n", __func__); + + goto disable_power; + } } /* diff --git a/driver/vidc/inc/msm_vidc_core.h b/driver/vidc/inc/msm_vidc_core.h index 0dda3f27cb..7d947cf542 100644 --- a/driver/vidc/inc/msm_vidc_core.h +++ b/driver/vidc/inc/msm_vidc_core.h @@ -119,6 +119,7 @@ struct msm_vidc_core { bool handoff_done; bool hw_power_control; bool pm_suspended; + bool cpu_watchdog; }; #endif // _MSM_VIDC_CORE_H_ diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index bcdbf2cd82..07ef64f90f 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -2456,6 +2456,7 @@ int __load_fw(struct msm_vidc_core *core) d_vpr_h("%s\n", __func__); core->handoff_done = false; core->hw_power_control = false; + core->cpu_watchdog = false; trace_msm_v4l2_vidc_fw_load("START"); rc = __init_resources(core); @@ -2533,6 +2534,8 @@ void __unload_fw(struct msm_vidc_core *core) __venus_power_off(core); __deinit_resources(core); + core->cpu_watchdog = false; + d_vpr_h("%s done\n", __func__); } @@ -2542,6 +2545,8 @@ static int __response_handler(struct msm_vidc_core *core) if (call_venus_op(core, watchdog, core, core->intr_status)) { struct hfi_packet pkt = {.type = HFI_SYS_ERROR_WD_TIMEOUT}; + core->cpu_watchdog = true; + d_vpr_e("%s: CPU WD error received\n", __func__); return handle_system_error(core, &pkt); } From c1e000514fc0784c51e83d907ad1469a363a45f3 Mon Sep 17 00:00:00 2001 From: Sachu George Date: Sat, 16 Jul 2022 12:38:52 +0530 Subject: [PATCH 0683/1061] video: driver: Adding missing capabilites for anorak Added mising capabilites in msm_vidc_anorak.c for the changes submitted in msm_vidc_kalama.c Change-Id: I3578cbc59e01d4ab41e1329bbc1a0ead7a7a5f65 Signed-off-by: Sachu George --- driver/platform/anorak/src/msm_vidc_anorak.c | 22 ++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/driver/platform/anorak/src/msm_vidc_anorak.c b/driver/platform/anorak/src/msm_vidc_anorak.c index d0d976a156..39ff51c4ef 100644 --- a/driver/platform/anorak/src/msm_vidc_anorak.c +++ b/driver/platform/anorak/src/msm_vidc_anorak.c @@ -399,6 +399,14 @@ static struct msm_platform_inst_capability instance_cap_data_anorak[] = { 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDEO_PREPEND_SPSPPS_TO_IDR}, + {VUI_TIMING_INFO, ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_VUI_TIMING_INFO, + HFI_PROP_DISABLE_VUI_TIMING_INFO, + CAP_FLAG_OUTPUT_PORT}, + {WITHOUT_STARTCODE, ENC, CODECS_ALL, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, @@ -485,6 +493,9 @@ static struct msm_platform_inst_capability instance_cap_data_anorak[] = { {LOWLATENCY_MAX_BITRATE, ENC, H264|HEVC, 0, 70000000, 1, 70000000}, + {NUM_COMV, DEC, CODECS_ALL, + 0, INT_MAX, 1, 0}, + {LOSSLESS, ENC, HEVC, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, @@ -1443,6 +1454,11 @@ static struct msm_platform_inst_capability instance_cap_data_anorak[] = { HFI_PROP_AV1_DRAP_CONFIG, CAP_FLAG_INPUT_PORT}, + {LAST_FLAG_EVENT_ENABLE, DEC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_LAST_FLAG_EVENT_ENABLE}, + {META_BITSTREAM_RESOLUTION, DEC, AV1, V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_INPUT | @@ -2406,6 +2422,12 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_anor {SLICE_MODE}, {LOWLATENCY_MODE, OUTPUT_BUF_HOST_MAX_COUNT}, msm_vidc_adjust_delivery_mode, msm_vidc_set_u32}, + + {VUI_TIMING_INFO, ENC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_vui_timing_info}, }; /* Default UBWC config for LPDDR5 */ From a8091c92b92926918fd28d4808cadbaa2ad3ac25 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Tue, 19 Jul 2022 10:58:04 -0700 Subject: [PATCH 0684/1061] video: driver: Add queues init in video core init Call venus_hfi_interface_queues_init() from venus_hfi_core_init() to initialize the hfi queues if they were not initialized already in probe sequence. Change-Id: I855d2b2b6404a1a2af79157576f07e5a0c207fb6 Signed-off-by: Akshata Sahukar --- driver/vidc/src/venus_hfi.c | 16 ++++++++++++++-- 1 file changed, 14 insertions(+), 2 deletions(-) diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index 07ef64f90f..35365dd15a 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -2240,6 +2240,11 @@ int venus_hfi_interface_queues_init(struct msm_vidc_core *core) d_vpr_h("%s()\n", __func__); + if (core->iface_q_table.align_virtual_addr) { + d_vpr_h("%s: queues already allocated\n", __func__); + return 0; + } + memset(&alloc, 0, sizeof(alloc)); alloc.type = MSM_VIDC_BUF_QUEUE; alloc.region = MSM_VIDC_NON_SECURE; @@ -2500,10 +2505,13 @@ int __load_fw(struct msm_vidc_core *core) /* configure interface_queues memory to firmware */ rc = call_venus_op(core, setup_ucregion_memmap, core); - if (rc) - return rc; + if (rc) { + d_vpr_e("%s: failed to setup ucregion\n"); + goto fail_setup_ucregion; + } return rc; +fail_setup_ucregion: fail_protect_mem: if (core->dt->fw_cookie) qcom_scm_pas_shutdown(core->dt->fw_cookie); @@ -2706,6 +2714,10 @@ int venus_hfi_core_init(struct msm_vidc_core *core) if (rc) return rc; + rc = venus_hfi_interface_queues_init(core); + if (rc) + goto error; + rc = __load_fw(core); if (rc) goto error; From 9789b56a49be1007e044e6f26201d15a82722230 Mon Sep 17 00:00:00 2001 From: Gaviraju Doddabettahalli Bettegowda Date: Mon, 25 Apr 2022 19:23:03 +0530 Subject: [PATCH 0685/1061] video: driver: add change to support slice mode decode Added new capabilty changes to support slice based decoding. This feature basically enables to decode the given input in terms of slices and deliver single output to the higher layers when all slices decoded in a frame. When HW receives the slices then it will start decoding the slices, instead of waiting for all the slices belongs to same frame. So this will help to achieve lower decode latency. Change-Id: Id107b34baba6d7b4a88238e232e8bf4a0fd6e58e Signed-off-by: Gaviraju Doddabettahalli Bettegowda --- driver/platform/anorak/src/msm_vidc_anorak.c | 22 ++++++++---- driver/platform/kalama/src/msm_vidc_kalama.c | 19 +++++++--- driver/platform/waipio/src/msm_vidc_waipio.c | 19 +++++++--- driver/vidc/inc/hfi_property.h | 2 ++ driver/vidc/inc/msm_vidc_control.h | 1 + driver/vidc/inc/msm_vidc_internal.h | 2 +- driver/vidc/src/msm_vidc_control.c | 35 +++++++++++++++++++ driver/vidc/src/msm_vidc_driver.c | 3 +- .../uapi/vidc/media/v4l2_vidc_extensions.h | 5 +++ 9 files changed, 89 insertions(+), 19 deletions(-) diff --git a/driver/platform/anorak/src/msm_vidc_anorak.c b/driver/platform/anorak/src/msm_vidc_anorak.c index 39ff51c4ef..23a1764cdb 100644 --- a/driver/platform/anorak/src/msm_vidc_anorak.c +++ b/driver/platform/anorak/src/msm_vidc_anorak.c @@ -378,10 +378,14 @@ static struct msm_platform_inst_capability instance_cap_data_anorak[] = { V4L2_CID_MPEG_VIDC_SUPERFRAME, 0, CAP_FLAG_NONE}, - {SLICE_INTERFACE, DEC, CODECS_ALL, - 0, 0, 0, 0, + {SLICE_DECODE, DEC, H264|HEVC|AV1, + V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_MSM_VIDC_ENABLE, + 1, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDEO_DECODER_SLICE_INTERFACE, - 0}, + HFI_PROP_SLICE_DECODE, + CAP_FLAG_INPUT_PORT}, {HEADER_MODE, ENC, CODECS_ALL, V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE, @@ -1828,7 +1832,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_anor {META_OUTBUF_FENCE, DEC, H264|HEVC|VP9|AV1, {OUTPUT_ORDER}, - {LOWLATENCY_MODE}, + {LOWLATENCY_MODE, SLICE_DECODE}, msm_vidc_adjust_dec_outbuf_fence, NULL}, @@ -1856,6 +1860,12 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_anor NULL, NULL}, + {SLICE_DECODE, DEC, H264|HEVC|AV1, + {LOWLATENCY_MODE, META_OUTBUF_FENCE, OUTPUT_ORDER}, + {0}, + msm_vidc_adjust_dec_slice_mode, + msm_vidc_set_u32}, + {HEADER_MODE, ENC, CODECS_ALL, {0}, {0}, @@ -1975,7 +1985,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_anor {LOWLATENCY_MODE, DEC, H264|HEVC|VP9|AV1, {META_OUTBUF_FENCE}, - {STAGE}, + {STAGE, SLICE_DECODE}, msm_vidc_adjust_dec_lowlatency_mode, NULL}, @@ -2272,7 +2282,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_anor {OUTPUT_ORDER, DEC, H264|HEVC|VP9|AV1, {THUMBNAIL_MODE, DISPLAY_DELAY, DISPLAY_DELAY_ENABLE}, - {META_OUTBUF_FENCE}, + {META_OUTBUF_FENCE, SLICE_DECODE}, msm_vidc_adjust_output_order, msm_vidc_set_u32}, diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index 82d67054b5..a0736035a9 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -379,8 +379,11 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { V4L2_CID_MPEG_VIDC_SUPERFRAME, 0, CAP_FLAG_NONE}, - {SLICE_INTERFACE, DEC, CODECS_ALL, - 0, 0, 0, 0, + {SLICE_DECODE, DEC, H264|HEVC|AV1, + V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_MSM_VIDC_DISABLE, + 0, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDEO_DECODER_SLICE_INTERFACE, 0}, @@ -1829,7 +1832,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kala {META_OUTBUF_FENCE, DEC, H264|HEVC|VP9|AV1, {OUTPUT_ORDER}, - {LOWLATENCY_MODE}, + {LOWLATENCY_MODE, SLICE_DECODE}, msm_vidc_adjust_dec_outbuf_fence, NULL}, @@ -1857,6 +1860,12 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kala NULL, NULL}, + {SLICE_DECODE, DEC, H264|HEVC|AV1, + {LOWLATENCY_MODE, META_OUTBUF_FENCE, OUTPUT_ORDER}, + {0}, + NULL, + NULL}, + {HEADER_MODE, ENC, CODECS_ALL, {0}, {0}, @@ -1976,7 +1985,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kala {LOWLATENCY_MODE, DEC, H264|HEVC|VP9|AV1, {META_OUTBUF_FENCE}, - {STAGE}, + {STAGE, SLICE_DECODE}, msm_vidc_adjust_dec_lowlatency_mode, NULL}, @@ -2273,7 +2282,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kala {OUTPUT_ORDER, DEC, H264|HEVC|VP9|AV1, {THUMBNAIL_MODE, DISPLAY_DELAY, DISPLAY_DELAY_ENABLE}, - {META_OUTBUF_FENCE}, + {META_OUTBUF_FENCE, SLICE_DECODE}, msm_vidc_adjust_output_order, msm_vidc_set_u32}, diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 8e9a448c30..1215f45cf6 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -350,8 +350,11 @@ static struct msm_platform_inst_capability instance_cap_data_waipio[] = { V4L2_CID_MPEG_VIDC_SUPERFRAME, 0, CAP_FLAG_NONE}, - {SLICE_INTERFACE, DEC, CODECS_ALL, - 0, 0, 0, 0, + {SLICE_DECODE, DEC, H264|HEVC, + V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_MSM_VIDC_DISABLE, + 0, + V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDEO_DECODER_SLICE_INTERFACE, 0}, @@ -1610,7 +1613,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_waip {META_OUTBUF_FENCE, DEC, H264|HEVC|VP9, {OUTPUT_ORDER}, - {LOWLATENCY_MODE}, + {LOWLATENCY_MODE, SLICE_DECODE}, NULL, NULL}, @@ -1638,6 +1641,12 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_waip NULL, NULL}, + {SLICE_DECODE, DEC, H264|HEVC, + {LOWLATENCY_MODE, META_OUTBUF_FENCE, OUTPUT_ORDER}, + {0}, + NULL, + NULL}, + {HEADER_MODE, ENC, CODECS_ALL, {0}, {0}, @@ -1745,7 +1754,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_waip {LOWLATENCY_MODE, DEC, H264|HEVC|VP9, {META_OUTBUF_FENCE}, - {STAGE}, + {STAGE, SLICE_DECODE}, msm_vidc_adjust_dec_lowlatency_mode, NULL}, @@ -2030,7 +2039,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_waip {OUTPUT_ORDER, DEC, H264|HEVC|VP9, {THUMBNAIL_MODE, DISPLAY_DELAY, DISPLAY_DELAY_ENABLE}, - {META_OUTBUF_FENCE}, + {META_OUTBUF_FENCE, SLICE_DECODE}, msm_vidc_adjust_output_order, msm_vidc_set_u32}, diff --git a/driver/vidc/inc/hfi_property.h b/driver/vidc/inc/hfi_property.h index f48c39ff64..b70b95ee6e 100644 --- a/driver/vidc/inc/hfi_property.h +++ b/driver/vidc/inc/hfi_property.h @@ -569,6 +569,8 @@ enum hfi_saliency_type { #define HFI_PROP_DISABLE_VUI_TIMING_INFO 0x03000194 +#define HFI_PROP_SLICE_DECODE 0x03000196 + #define HFI_PROP_END 0x03FFFFFF #define HFI_SESSION_ERROR_BEGIN 0x04000000 diff --git a/driver/vidc/inc/msm_vidc_control.h b/driver/vidc/inc/msm_vidc_control.h index ef8df444d5..f10159473e 100644 --- a/driver/vidc/inc/msm_vidc_control.h +++ b/driver/vidc/inc/msm_vidc_control.h @@ -53,6 +53,7 @@ int msm_vidc_adjust_session_priority(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_roi_info(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_all_intra(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_dec_outbuf_fence(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_dec_slice_mode(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_preprocess(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_set_header_mode(void *instance, diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 36afe95bb5..1fd1841860 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -422,7 +422,6 @@ enum msm_vidc_inst_capability_type { FENCE_ID, FENCE_FD, TS_REORDER, - SLICE_INTERFACE, HFLIP, VFLIP, ROTATION, @@ -539,6 +538,7 @@ enum msm_vidc_inst_capability_type { OUTPUT_BUF_HOST_MAX_COUNT, DELIVERY_MODE, VUI_TIMING_INFO, + SLICE_DECODE, /* place all leaf(no child) enums before this line */ INST_CAP_MAX, }; diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index ca5d17fa49..49f0363655 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -2905,6 +2905,41 @@ int msm_vidc_adjust_dec_outbuf_fence(void *instance, struct v4l2_ctrl *ctrl) return 0; } +int msm_vidc_adjust_dec_slice_mode(void *instance, struct v4l2_ctrl *ctrl) +{ + struct msm_vidc_inst_capability *capability; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + u32 adjusted_value = 0; + s32 low_latency = -1; + s32 picture_order = -1; + s32 outbuf_fence = V4L2_MPEG_VIDC_META_DISABLE; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + adjusted_value = ctrl ? ctrl->val : capability->cap[SLICE_DECODE].value; + + if (msm_vidc_get_parent_value(inst, SLICE_DECODE, LOWLATENCY_MODE, + &low_latency, __func__) || + msm_vidc_get_parent_value(inst, SLICE_DECODE, OUTPUT_ORDER, + &picture_order, __func__) || + msm_vidc_get_parent_value(inst, SLICE_DECODE, META_OUTBUF_FENCE, + &outbuf_fence, __func__)) + return -EINVAL; + + if (!low_latency || !picture_order || + !is_meta_rx_inp_enabled(inst, META_OUTBUF_FENCE)) + adjusted_value = V4L2_MPEG_MSM_VIDC_DISABLE; + + msm_vidc_update_cap_value(inst, SLICE_DECODE, + adjusted_value, __func__); + + return 0; +} + int msm_vidc_prepare_dependency_list(struct msm_vidc_inst *inst) { struct list_head root_list, opt_list; diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index ec171c8d90..d248707f57 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -116,7 +116,6 @@ static const struct msm_vidc_cap_name cap_name_arr[] = { {FENCE_ID, "FENCE_ID" }, {FENCE_FD, "FENCE_FD" }, {TS_REORDER, "TS_REORDER" }, - {SLICE_INTERFACE, "SLICE_INTERFACE" }, {HFLIP, "HFLIP" }, {VFLIP, "VFLIP" }, {ROTATION, "ROTATION" }, @@ -229,6 +228,7 @@ static const struct msm_vidc_cap_name cap_name_arr[] = { {OUTPUT_BUF_HOST_MAX_COUNT, "OUTPUT_BUF_HOST_MAX_COUNT" }, {DELIVERY_MODE, "DELIVERY_MODE" }, {VUI_TIMING_INFO, "VUI_TIMING_INFO" }, + {SLICE_DECODE, "SLICE_DECODE" }, {INST_CAP_MAX, "INST_CAP_MAX" }, }; @@ -1453,7 +1453,6 @@ bool msm_vidc_allow_metadata_subscription(struct msm_vidc_inst *inst, u32 cap_id case META_SEI_MASTERING_DISP: case META_SEI_CLL: case META_HDR10PLUS: - case META_PICTURE_TYPE: if (!is_meta_rx_inp_enabled(inst, META_OUTBUF_FENCE)) { i_vpr_h(inst, "%s: cap: %24s not allowed as output buffer fence is disabled\n", diff --git a/include/uapi/vidc/media/v4l2_vidc_extensions.h b/include/uapi/vidc/media/v4l2_vidc_extensions.h index 3cdf1accbb..4a3ed770db 100644 --- a/include/uapi/vidc/media/v4l2_vidc_extensions.h +++ b/include/uapi/vidc/media/v4l2_vidc_extensions.h @@ -428,6 +428,10 @@ enum meta_interlace_info { META_INTERLACE_FRAME_INTERLACE_BOTTOMFIELD_FIRST = 0x00000020, }; +/* + * enum meta_picture_type - specifies input picture type + * @META_PICTURE_TYPE_NEW: start of new frame or first slice in a frame + */ enum meta_picture_type { META_PICTURE_TYPE_IDR = 0x00000001, META_PICTURE_TYPE_P = 0x00000002, @@ -436,6 +440,7 @@ enum meta_picture_type { META_PICTURE_TYPE_CRA = 0x00000010, META_PICTURE_TYPE_BLA = 0x00000020, META_PICTURE_TYPE_NOSHOW = 0x00000040, + META_PICTURE_TYPE_NEW = 0x00000080, }; /* vendor controls end */ From c5d589a044ddfc9075367767d5ef115fea79a5ee Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Fri, 22 Jul 2022 13:59:52 -0700 Subject: [PATCH 0686/1061] Revert "video: driver: 5 percent increase for vsp and vpp cycles" This reverts commit 4fa2fc8142ee7aa9da4bf2da7bb6ab52d634ab17. Change-Id: Iaa0156c0442fdbf928ba03aa2b833340601ff395 Signed-off-by: Akshata Sahukar --- .../variant/iris3/src/msm_vidc_power_iris3.c | 19 ------------------- 1 file changed, 19 deletions(-) diff --git a/driver/variant/iris3/src/msm_vidc_power_iris3.c b/driver/variant/iris3/src/msm_vidc_power_iris3.c index 3538fcdf93..39626c8321 100644 --- a/driver/variant/iris3/src/msm_vidc_power_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_power_iris3.c @@ -83,16 +83,6 @@ u64 msm_vidc_calc_freq_iris3(struct msm_vidc_inst *inst, u32 data_size) if (inst->capabilities->cap[REQUEST_PREPROCESS].value) vpp_cycles = vpp_cycles + vpp_cycles / 2; - if (res_is_greater_than(inst->crop.width, inst->crop.height, - 4096 + (4096 >> 1), 2176 + (2176 >> 1))) { - /* - * 8k@30 fps encode has a very low margin for sw/fw at 338MHz. - * Hence, increase core clock little bit(5%) to move to the next - * corner i.e., 366MHz. - */ - vpp_cycles = div_u64(vpp_cycles * 21, 20); - } - /* VSP */ /* bitrate is based on fps, scale it using operating rate */ operating_rate = inst->capabilities->cap[OPERATING_RATE].value >> 16; @@ -123,15 +113,6 @@ u64 msm_vidc_calc_freq_iris3(struct msm_vidc_inst *inst, u32 data_size) vsp_cycles += mbs_per_second * base_cycles; - if (res_is_greater_than(inst->crop.width, inst->crop.height, - 4096 + (4096 >> 1), 2176 + (2176 >> 1))) { - /* - * 8k@30 fps encode has a very low margin for sw/fw at 338MHz. - * Hence, increase core clock little bit(5%) to move to the next - * corner i.e., 366MHz. - */ - vsp_cycles = div_u64(vsp_cycles * 21, 20); - } } else if (inst->domain == MSM_VIDC_DECODER) { /* VPP */ vpp_cycles = mbs_per_second * inst->capabilities->cap[MB_CYCLES_VPP].value / From 525f1f5071989bb589ddbe159e29d36743893ff5 Mon Sep 17 00:00:00 2001 From: Mihir Ganu Date: Fri, 22 Jul 2022 10:30:01 -0700 Subject: [PATCH 0687/1061] video: driver: Adjust bandwidth calculations for AV1 Consider AV1 LCU sizes and add AV1 considerations while calculating bandwidth votes. Change-Id: I0a6bff1bb142fb0eed44d4c3c458a916d11d6f57 Signed-off-by: Mihir Ganu --- driver/variant/iris3/src/msm_vidc_power_iris3.c | 9 +-------- driver/vidc/src/msm_vidc_power.c | 3 +++ 2 files changed, 4 insertions(+), 8 deletions(-) diff --git a/driver/variant/iris3/src/msm_vidc_power_iris3.c b/driver/variant/iris3/src/msm_vidc_power_iris3.c index 39626c8321..76dba298a3 100644 --- a/driver/variant/iris3/src/msm_vidc_power_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_power_iris3.c @@ -260,7 +260,7 @@ static u64 __calculate_decoder(struct vidc_bus_vote_data *d) fp_t dpb_read_compression_factor, dpb_opb_scaling_ratio, dpb_write_compression_factor, opb_write_compression_factor, qsmmu_bw_overhead_factor; - bool is_h264_category = true; + bool is_h264_category = (d->codec == MSM_VIDC_H264) ? true : false; /* Derived parameters */ int lcu_per_frame, collocated_bytes_per_lcu, tnbr_per_lcu; @@ -319,13 +319,6 @@ static u64 __calculate_decoder(struct vidc_bus_vote_data *d) num_vpp_pipes = d->num_vpp_pipes; - if (d->codec == MSM_VIDC_HEVC || - d->codec == MSM_VIDC_HEIC || - d->codec == MSM_VIDC_VP9) { - /* H264, VP8, MPEG2 use the same settings */ - /* HEVC, VP9 use the same setting */ - is_h264_category = false; - } if (d->use_sys_cache) { llc_ref_read_l2_cache_enabled = true; if (is_h264_category) diff --git a/driver/vidc/src/msm_vidc_power.c b/driver/vidc/src/msm_vidc_power.c index 7610f1d42f..f9ee45f540 100644 --- a/driver/vidc/src/msm_vidc_power.c +++ b/driver/vidc/src/msm_vidc_power.c @@ -231,6 +231,9 @@ int msm_vidc_scale_buses(struct msm_vidc_inst *inst) vote_data->output_height = out_f->fmt.pix_mp.height; vote_data->lcu_size = (codec == V4L2_PIX_FMT_HEVC || codec == V4L2_PIX_FMT_VP9) ? 32 : 16; + if (codec == V4L2_PIX_FMT_AV1) + vote_data->lcu_size = + inst->capabilities->cap[SUPER_BLOCK].value ? 128 : 64; vote_data->fps = inst->max_rate; if (inst->domain == MSM_VIDC_ENCODER) { From ce4198e97f1f72a8ceea64c7adfb46282538e820 Mon Sep 17 00:00:00 2001 From: Mihir Ganu Date: Fri, 22 Jul 2022 16:55:29 -0700 Subject: [PATCH 0688/1061] video: driver: Update IRIS3 DDR line buffer BW calculation Remove the temporary 2-pipe condition for DDR line buffer write calculation for BW. Change-Id: I75dba3106f0af9f7a6eb43036f86209202e22d5d Signed-off-by: Mihir Ganu --- driver/variant/iris3/src/msm_vidc_power_iris3.c | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/driver/variant/iris3/src/msm_vidc_power_iris3.c b/driver/variant/iris3/src/msm_vidc_power_iris3.c index 76dba298a3..e9f34df721 100644 --- a/driver/variant/iris3/src/msm_vidc_power_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_power_iris3.c @@ -402,11 +402,8 @@ static u64 __calculate_decoder(struct vidc_bus_vote_data *d) ddr.line_buffer_read = fp_div(FP_INT(tnbr_per_lcu * lcu_per_frame * fps), FP_INT(bps(1))); - /* This change is applicable for all IRIS3 targets, - * but currently being done for IRIS3 with 2 pipes - * only due to timeline constraints. - */ - if((num_vpp_pipes == 2) && (is_h264_category)) + + if (is_h264_category) ddr.line_buffer_write = fp_div(ddr.line_buffer_read,FP_INT(2)); else ddr.line_buffer_write = ddr.line_buffer_read; From 04ebbb2c2ab42edf3f22641c18c30dc75edf01f7 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Mon, 25 Jul 2022 17:51:06 +0530 Subject: [PATCH 0689/1061] video: driver: handle core_init failure in probe sequence component bind cb is called from last bound subdevice context, so if core init fails then i.e treated subdevice probe failure and leading to undefined behaviour in protect_cp_mem() sequence during fw_load(). So treat core_init failure as non-fatal since it will be attmepted again during session_open. Due to async-probe subdevice probe is called in parallel threads so use core_lock() while populating context-bank entries into &core->dt->context_banks list. Change-Id: I45a891dbe589cfd011108365094b543202c0291e Signed-off-by: Govindaraj Rajagopal --- driver/vidc/src/msm_vidc_dt.c | 7 ++++--- driver/vidc/src/msm_vidc_probe.c | 9 ++++++--- driver/vidc/src/venus_hfi.c | 5 +++++ 3 files changed, 15 insertions(+), 6 deletions(-) diff --git a/driver/vidc/src/msm_vidc_dt.c b/driver/vidc/src/msm_vidc_dt.c index c72036b2bb..ea23ea9e9a 100644 --- a/driver/vidc/src/msm_vidc_dt.c +++ b/driver/vidc/src/msm_vidc_dt.c @@ -843,8 +843,6 @@ static int msm_vidc_populate_context_bank(struct device *dev, } INIT_LIST_HEAD(&cb->list); - list_add_tail(&cb->list, &core->dt->context_banks); - rc = of_property_read_string(np, "label", &cb->name); if (rc) { d_vpr_h("Failed to read cb label from device tree\n"); @@ -874,13 +872,16 @@ static int msm_vidc_populate_context_bank(struct device *dev, goto err_setup_cb; } + core_lock(core, __func__); + list_add_tail(&cb->list, &core->dt->context_banks); + core_unlock(core, __func__); + iommu_set_fault_handler(cb->domain, msm_vidc_smmu_fault_handler, (void *)core); return 0; err_setup_cb: - list_del(&cb->list); return rc; } diff --git a/driver/vidc/src/msm_vidc_probe.c b/driver/vidc/src/msm_vidc_probe.c index 89701b960a..0e0e9c1391 100644 --- a/driver/vidc/src/msm_vidc_probe.c +++ b/driver/vidc/src/msm_vidc_probe.c @@ -393,12 +393,15 @@ static int msm_vidc_component_bind(struct device *dev) d_vpr_h("%s(): succssful\n", __func__); - return rc; + return 0; queues_deinit: venus_hfi_interface_queues_deinit(core); - component_unbind_all(dev, core); - return rc; + /** + * queues and core can be inited again during session_open. + * So don't declare as probe failure. + */ + return 0; } static void msm_vidc_component_unbind(struct device *dev) diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index 35365dd15a..9698b8d6b8 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -2209,6 +2209,11 @@ void venus_hfi_interface_queues_deinit(struct msm_vidc_core *core) d_vpr_h("%s()\n", __func__); + if (!core->iface_q_table.align_virtual_addr) { + d_vpr_h("%s: queues already deallocated\n", __func__); + return; + } + msm_vidc_memory_unmap(core, &core->iface_q_table.map); msm_vidc_memory_free(core, &core->iface_q_table.alloc); msm_vidc_memory_unmap(core, &core->sfr.map); From 912a80b0942ef2c816abd3ac28b3d97f22f4f4ee Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Tue, 26 Jul 2022 19:39:09 +0530 Subject: [PATCH 0690/1061] video: driver: fix client_lock acquire sequence Updated client_lock acquire sequence and cleaned up timer list. Change-Id: I413f31c8f4622f152598b08c9e107c77c03525cc Signed-off-by: Govindaraj Rajagopal --- driver/vidc/src/msm_vidc_driver.c | 1 + driver/vidc/src/msm_vidc_v4l2.c | 2 +- 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index d248707f57..7ab506d026 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -5727,6 +5727,7 @@ void msm_vidc_destroy_buffers(struct msm_vidc_inst *inst) list_for_each_entry_safe(timer, dummy_timer, &inst->input_timer_list, list) { i_vpr_e(inst, "%s: removing input_timer %lld\n", __func__, timer->time_us); + list_del(&timer->list); msm_memory_pool_free(inst, timer); } diff --git a/driver/vidc/src/msm_vidc_v4l2.c b/driver/vidc/src/msm_vidc_v4l2.c index 61943a6880..9dcadd7085 100644 --- a/driver/vidc/src/msm_vidc_v4l2.c +++ b/driver/vidc/src/msm_vidc_v4l2.c @@ -381,8 +381,8 @@ int msm_v4l2_create_bufs(struct file *filp, void *fh, return -EINVAL; } - inst_lock(inst, __func__); client_lock(inst, __func__); + inst_lock(inst, __func__); rc = msm_vidc_create_bufs((void *)inst, b); if (rc) goto unlock; From 473e46f0cc1b87bcfb6d2873b720dbe554fa95c7 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Wed, 20 Jul 2022 20:02:21 +0530 Subject: [PATCH 0691/1061] video: driver: add buffer statistics logic Added change to print etb, ebd, ftb, fbd, (ebd-etb), (fbd - etb), (etb-ftb) wallclock time in ms. It will help to debug perf issues. Change-Id: Ideaecb2d51763711d6628729aa0f9056d05f0d51 Signed-off-by: Govindaraj Rajagopal --- driver/vidc/inc/msm_vidc_debug.h | 5 + driver/vidc/inc/msm_vidc_driver.h | 5 + driver/vidc/inc/msm_vidc_inst.h | 2 + driver/vidc/inc/msm_vidc_internal.h | 20 ++++ driver/vidc/inc/msm_vidc_memory.h | 1 + driver/vidc/src/msm_vdec.c | 2 + driver/vidc/src/msm_vidc.c | 2 + driver/vidc/src/msm_vidc_driver.c | 160 ++++++++++++++++++++++++++- driver/vidc/src/msm_vidc_memory.c | 1 + driver/vidc/src/msm_vidc_vb2.c | 9 +- driver/vidc/src/venus_hfi_response.c | 6 + 11 files changed, 210 insertions(+), 3 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_debug.h b/driver/vidc/inc/msm_vidc_debug.h index 85df5fe60b..2b07215df9 100644 --- a/driver/vidc/inc/msm_vidc_debug.h +++ b/driver/vidc/inc/msm_vidc_debug.h @@ -64,6 +64,7 @@ enum vidc_msg_prio { VIDC_PERF = 0x00000008, VIDC_PKT = 0x00000010, VIDC_BUS = 0x00000020, + VIDC_STAT = 0x00000040, VIDC_ENCODER = 0x00000100, VIDC_DECODER = 0x00000200, VIDC_PRINTK = 0x00001000, @@ -97,9 +98,12 @@ enum vidc_msg_prio { #define i_vpr_p(inst, __fmt, ...) dprintk_inst(VIDC_PERF, "perf", inst, __fmt, ##__VA_ARGS__) #define i_vpr_t(inst, __fmt, ...) dprintk_inst(VIDC_PKT, "pkt ", inst, __fmt, ##__VA_ARGS__) #define i_vpr_b(inst, __fmt, ...) dprintk_inst(VIDC_BUS, "bus ", inst, __fmt, ##__VA_ARGS__) +#define i_vpr_s(inst, __fmt, ...) dprintk_inst(VIDC_STAT, "stat", inst, __fmt, ##__VA_ARGS__) #define i_vpr_hp(inst, __fmt, ...) \ dprintk_inst(VIDC_HIGH | VIDC_PERF, "high", inst, __fmt, ##__VA_ARGS__) +#define i_vpr_hs(inst, __fmt, ...) \ + dprintk_inst(VIDC_HIGH | VIDC_STAT, "high", inst, __fmt, ##__VA_ARGS__) #define dprintk_core(__level, __level_str, __fmt, ...) \ do { \ @@ -118,6 +122,7 @@ enum vidc_msg_prio { #define d_vpr_p(__fmt, ...) dprintk_core(VIDC_PERF, "perf", __fmt, ##__VA_ARGS__) #define d_vpr_t(__fmt, ...) dprintk_core(VIDC_PKT, "pkt ", __fmt, ##__VA_ARGS__) #define d_vpr_b(__fmt, ...) dprintk_core(VIDC_BUS, "bus ", __fmt, ##__VA_ARGS__) +#define d_vpr_s(__fmt, ...) dprintk_core(VIDC_STAT, "stat", __fmt, ##__VA_ARGS__) #define dprintk_ratelimit(__level, __level_str, __fmt, ...) \ do { \ diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 230ac8e052..0e9647e31f 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -585,6 +585,11 @@ int msm_vidc_get_properties(struct msm_vidc_inst *inst); int msm_vidc_create_input_metadata_buffer(struct msm_vidc_inst *inst, int buf_fd); int msm_vidc_update_input_meta_buffer_index(struct msm_vidc_inst *inst, struct vb2_buffer *vb2); int msm_vidc_update_input_rate(struct msm_vidc_inst *inst, u64 time_us); +int msm_vidc_add_buffer_stats(struct msm_vidc_inst *inst, + struct msm_vidc_buffer *buf); +int msm_vidc_remove_buffer_stats(struct msm_vidc_inst *inst, + struct msm_vidc_buffer *buf); +int msm_vidc_flush_buffer_stats(struct msm_vidc_inst *inst); int msm_vidc_get_input_rate(struct msm_vidc_inst *inst); int msm_vidc_get_frame_rate(struct msm_vidc_inst *inst); int msm_vidc_get_operating_rate(struct msm_vidc_inst *inst); diff --git a/driver/vidc/inc/msm_vidc_inst.h b/driver/vidc/inc/msm_vidc_inst.h index 954e519762..befd855b29 100644 --- a/driver/vidc/inc/msm_vidc_inst.h +++ b/driver/vidc/inc/msm_vidc_inst.h @@ -163,6 +163,7 @@ struct msm_vidc_inst { struct list_head firmware_list; /* struct msm_vidc_inst_cap_entry */ struct list_head pending_pkts; /* list of struct hfi_pending_packet */ struct list_head fence_list; /* list of struct msm_vidc_fence */ + struct list_head buffer_stats_list; /* struct msm_vidc_buffer_stats */ bool once_per_session_set; bool ipsc_properties_set; bool opsc_properties_set; @@ -175,6 +176,7 @@ struct msm_vidc_inst { struct msm_vidc_fence_context fence_context; bool active; u64 last_qbuf_time_ns; + u64 initial_time_us; bool vb2q_init; u32 max_input_data_size; u32 dpb_list_payload[MAX_DPB_LIST_ARRAY_SIZE]; diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 1fd1841860..c4eeb7a4f0 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -903,6 +903,8 @@ struct msm_vidc_buffer { u64 timestamp; enum msm_vidc_buffer_attributes attr; u64 fence_id; + u32 start_time_ms; + u32 end_time_ms; }; struct msm_vidc_buffers { @@ -914,6 +916,24 @@ struct msm_vidc_buffers { bool reuse; }; +struct msm_vidc_buffer_stats { + struct list_head list; + u32 frame_num; + u64 timestamp; + u32 etb_time_ms; + u32 ebd_time_ms; + u32 ftb_time_ms; + u32 fbd_time_ms; + u32 data_size; + u32 flags; +}; + +enum msm_vidc_buffer_stats_flag { + MSM_VIDC_STATS_FLAG_CORRUPT = BIT(0), + MSM_VIDC_STATS_FLAG_OVERFLOW = BIT(1), + MSM_VIDC_STATS_FLAG_NO_OUTPUT = BIT(2), +}; + struct msm_vidc_sort { struct list_head list; s64 val; diff --git a/driver/vidc/inc/msm_vidc_memory.h b/driver/vidc/inc/msm_vidc_memory.h index cbaca724b4..11105260b6 100644 --- a/driver/vidc/inc/msm_vidc_memory.h +++ b/driver/vidc/inc/msm_vidc_memory.h @@ -27,6 +27,7 @@ enum msm_memory_pool_type { MSM_MEM_POOL_DMABUF, MSM_MEM_POOL_PACKET, MSM_MEM_POOL_BUF_TIMER, + MSM_MEM_POOL_BUF_STATS, MSM_MEM_POOL_MAX, }; diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index ea64f9cfa4..717c0ffeec 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -1881,6 +1881,8 @@ static int msm_vdec_qbuf_batch(struct msm_vidc_inst *inst, if (!buf) return -EINVAL; + msm_vidc_add_buffer_stats(inst, buf); + allow = msm_vidc_allow_qbuf(inst, vb2->type); if (allow == MSM_VIDC_DISALLOW) { i_vpr_e(inst, "%s: qbuf not allowed\n", __func__); diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index b61803b89b..08286853c9 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -897,6 +897,7 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) inst->opsc_properties_set = false; inst->has_bframe = false; inst->auto_framerate = DEFAULT_FPS << 16; + inst->initial_time_us = ktime_get_ns() / 1000; kref_init(&inst->kref); mutex_init(&inst->lock); mutex_init(&inst->request_lock); @@ -957,6 +958,7 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) INIT_LIST_HEAD(&inst->input_timer_list); INIT_LIST_HEAD(&inst->pending_pkts); INIT_LIST_HEAD(&inst->fence_list); + INIT_LIST_HEAD(&inst->buffer_stats_list); for (i = 0; i < MAX_SIGNAL; i++) init_completion(&inst->completions[i]); diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 7ab506d026..c03c007bd5 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -481,6 +481,25 @@ void print_vb2_buffer(const char *str, struct msm_vidc_inst *inst, } } +static void print_buffer_stats(u32 tag, const char *tag_str, struct msm_vidc_inst *inst, + struct msm_vidc_buffer_stats *stats) +{ + if (!tag_str || !inst || !stats) + return; + + /* skip flushed buffer stats */ + if (!stats->etb_time_ms || !stats->ebd_time_ms || + !stats->ftb_time_ms || !stats->fbd_time_ms) + return; + + dprintk_inst(tag, tag_str, inst, + "f.no %4u ts %16llu (etb ebd ftb fbd)ms %6u %6u %6u %6u (ebd-etb fbd-etb etb-ftb)ms %4d %4d %4d size %8u attr %#x\n", + stats->frame_num, stats->timestamp, stats->etb_time_ms, stats->ebd_time_ms, + stats->ftb_time_ms, stats->fbd_time_ms, stats->ebd_time_ms - stats->etb_time_ms, + stats->fbd_time_ms - stats->etb_time_ms, stats->etb_time_ms - stats->ftb_time_ms, + stats->data_size, stats->flags); +} + static void __fatal_error(bool fatal) { WARN_ON(fatal); @@ -498,6 +517,135 @@ static int __strict_check(struct msm_vidc_core *core, const char *function) return fatal ? -EINVAL : 0; } +static u32 msm_vidc_get_buffer_stats_flag(struct msm_vidc_inst *inst) +{ + u32 flags = 0; + + if (inst->hfi_frame_info.data_corrupt) + flags |= MSM_VIDC_STATS_FLAG_CORRUPT; + + if (inst->hfi_frame_info.overflow) + flags |= MSM_VIDC_STATS_FLAG_OVERFLOW; + + if (inst->hfi_frame_info.no_output) + flags |= MSM_VIDC_STATS_FLAG_NO_OUTPUT; + + return flags; +} + +int msm_vidc_add_buffer_stats(struct msm_vidc_inst *inst, + struct msm_vidc_buffer *buf) +{ + struct msm_vidc_buffer_stats *stats = NULL; + + if (!inst || !buf) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + /* stats applicable only to input & output buffers */ + if (buf->type != MSM_VIDC_BUF_INPUT && buf->type != MSM_VIDC_BUF_OUTPUT) + return -EINVAL; + + /* update start timestamp */ + buf->start_time_ms = (ktime_get_ns() / 1000 - inst->initial_time_us) / 1000; + + /* add buffer stats only in ETB path */ + if (buf->type != MSM_VIDC_BUF_INPUT) + return 0; + + stats = msm_memory_pool_alloc(inst, MSM_MEM_POOL_BUF_STATS); + if (!stats) + return -ENOMEM; + INIT_LIST_HEAD(&stats->list); + list_add_tail(&stats->list, &inst->buffer_stats_list); + + stats->frame_num = inst->debug_count.etb; + stats->timestamp = buf->timestamp; + stats->etb_time_ms = buf->start_time_ms; + if (is_decode_session(inst)) + stats->data_size = buf->data_size; + + return 0; +} + +int msm_vidc_remove_buffer_stats(struct msm_vidc_inst *inst, + struct msm_vidc_buffer *buf) +{ + struct msm_vidc_buffer_stats *stats = NULL, *dummy_stats = NULL; + + if (!inst || !buf) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + /* stats applicable only to input & output buffers */ + if (buf->type != MSM_VIDC_BUF_INPUT && buf->type != MSM_VIDC_BUF_OUTPUT) + return -EINVAL; + + /* update end timestamp */ + buf->end_time_ms = (ktime_get_ns() / 1000 - inst->initial_time_us) / 1000; + + list_for_each_entry_safe(stats, dummy_stats, &inst->buffer_stats_list, list) { + if (stats->timestamp == buf->timestamp) { + if (buf->type == MSM_VIDC_BUF_INPUT) { + /* skip - already updated(multiple input - single output case) */ + if (stats->ebd_time_ms) + continue; + + /* ebd: update end ts and return */ + stats->ebd_time_ms = buf->end_time_ms; + stats->flags |= msm_vidc_get_buffer_stats_flag(inst); + + /* remove entry - no output attached */ + if (stats->flags & MSM_VIDC_STATS_FLAG_NO_OUTPUT) { + list_del_init(&stats->list); + msm_memory_pool_free(inst, stats); + } + } else if (buf->type == MSM_VIDC_BUF_OUTPUT) { + /* skip - ebd not arrived(single input - multiple output case) */ + if (!stats->ebd_time_ms) + continue; + + /* fbd: update end ts and remove entry */ + list_del_init(&stats->list); + stats->ftb_time_ms = buf->start_time_ms; + stats->fbd_time_ms = buf->end_time_ms; + stats->flags |= msm_vidc_get_buffer_stats_flag(inst); + if (is_encode_session(inst)) + stats->data_size = buf->data_size; + + print_buffer_stats(VIDC_STAT, "stat", inst, stats); + + msm_memory_pool_free(inst, stats); + } + } + } + + return 0; +} + +int msm_vidc_flush_buffer_stats(struct msm_vidc_inst *inst) +{ + struct msm_vidc_buffer_stats *stats, *dummy_stats; + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + i_vpr_l(inst, "%s: flush buffer_stats list\n", __func__); + list_for_each_entry_safe(stats, dummy_stats, &inst->buffer_stats_list, list) { + list_del_init(&stats->list); + msm_memory_pool_free(inst, stats); + } + + /* reset initial ts as well to avoid huge delta */ + inst->initial_time_us = ktime_get_ns() / 1000; + + return 0; +} + enum msm_vidc_buffer_type v4l2_type_to_driver(u32 type, const char *func) { enum msm_vidc_buffer_type buffer_type = 0; @@ -3465,7 +3613,7 @@ void msm_vidc_print_stats(struct msm_vidc_inst *inst) achieved_fps = (fbd * 1000) / dt_ms; bitrate_kbps = (inst->stats.data_size * 8 * 1000) / (dt_ms * 1024); - i_vpr_hp(inst, + i_vpr_hs(inst, "stats: counts (etb,ebd,ftb,fbd): %u %u %u %u (total %llu %llu %llu %llu), achieved bitrate %lldKbps fps %u/s, frame rate %u, operating rate %u, priority %u, dt %ums\n", etb, ebd, ftb, fbd, inst->debug_count.etb, inst->debug_count.ebd, inst->debug_count.ftb, inst->debug_count.fbd, @@ -3677,6 +3825,9 @@ int msm_vidc_queue_buffer_single(struct msm_vidc_inst *inst, struct vb2_buffer * if (!buf) return -EINVAL; + /* update start timestamp */ + msm_vidc_add_buffer_stats(inst, buf); + if (is_meta_rx_inp_enabled(inst, META_OUTBUF_FENCE) && is_output_buffer(buf->type)) { fence = msm_vidc_fence_create(inst); @@ -5641,6 +5792,7 @@ void msm_vidc_destroy_buffers(struct msm_vidc_inst *inst) struct msm_vidc_timestamp *ts, *dummy_ts; struct msm_memory_dmabuf *dbuf, *dummy_dbuf; struct msm_vidc_input_timer *timer, *dummy_timer; + struct msm_vidc_buffer_stats *stats, *dummy_stats; struct msm_vidc_inst_cap_entry *entry, *dummy_entry; struct msm_vidc_fence *fence, *dummy_fence; @@ -5731,6 +5883,12 @@ void msm_vidc_destroy_buffers(struct msm_vidc_inst *inst) msm_memory_pool_free(inst, timer); } + list_for_each_entry_safe(stats, dummy_stats, &inst->buffer_stats_list, list) { + print_buffer_stats(VIDC_ERR, "err ", inst, stats); + list_del(&stats->list); + msm_memory_pool_free(inst, stats); + } + list_for_each_entry_safe(dbuf, dummy_dbuf, &inst->dmabuf_tracker, list) { i_vpr_e(inst, "%s: removing dma_buf %#x, refcount %u\n", __func__, dbuf->dmabuf, dbuf->refcount); diff --git a/driver/vidc/src/msm_vidc_memory.c b/driver/vidc/src/msm_vidc_memory.c index 804817391f..aab13ccd6f 100644 --- a/driver/vidc/src/msm_vidc_memory.c +++ b/driver/vidc/src/msm_vidc_memory.c @@ -617,6 +617,7 @@ static const struct msm_vidc_type_size_name buftype_size_name_arr[] = { {MSM_MEM_POOL_PACKET, sizeof(struct hfi_pending_packet) + MSM_MEM_POOL_PACKET_SIZE, "MSM_MEM_POOL_PACKET"}, {MSM_MEM_POOL_BUF_TIMER, sizeof(struct msm_vidc_input_timer), "MSM_MEM_POOL_BUF_TIMER" }, + {MSM_MEM_POOL_BUF_STATS, sizeof(struct msm_vidc_buffer_stats), "MSM_MEM_POOL_BUF_STATS"}, }; int msm_memory_pools_init(struct msm_vidc_inst *inst) diff --git a/driver/vidc/src/msm_vidc_vb2.c b/driver/vidc/src/msm_vidc_vb2.c index 4b3378fe5d..9cf3a26af9 100644 --- a/driver/vidc/src/msm_vidc_vb2.c +++ b/driver/vidc/src/msm_vidc_vb2.c @@ -403,10 +403,15 @@ void msm_vidc_stop_streaming(struct vb2_queue *q) if (rc) goto unlock; - /* Input port streamoff - flush timestamps list*/ - if (q->type == INPUT_MPLANE) + /* Input port streamoff */ + if (q->type == INPUT_MPLANE) { + /* flush timestamps list */ msm_vidc_flush_ts(inst); + /* flush buffer_stats list */ + msm_vidc_flush_buffer_stats(inst); + } + i_vpr_h(inst, "Streamoff: %s successful\n", v4l2_type_name(q->type)); unlock: diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index 7ca06f3410..7b43bffc43 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -856,6 +856,9 @@ static int handle_input_buffer(struct msm_vidc_inst *inst, print_vidc_buffer(VIDC_HIGH, "high", "dqbuf", inst, buf); msm_vidc_update_stats(inst, buf, MSM_VIDC_DEBUGFS_EVENT_EBD); + /* etd: update end timestamp and flags in stats entry */ + msm_vidc_remove_buffer_stats(inst, buf); + return rc; } @@ -1019,6 +1022,9 @@ static int handle_output_buffer(struct msm_vidc_inst *inst, print_vidc_buffer(VIDC_HIGH, "high", "dqbuf", inst, buf); msm_vidc_update_stats(inst, buf, MSM_VIDC_DEBUGFS_EVENT_FBD); + /* fbd: print stats and remove entry */ + msm_vidc_remove_buffer_stats(inst, buf); + return rc; } From 6fa776708b877ac1ec6eaf2fa9ed206c2ed172ec Mon Sep 17 00:00:00 2001 From: Gaviraju Doddabettahalli Bettegowda Date: Wed, 27 Jul 2022 18:31:06 +0530 Subject: [PATCH 0692/1061] video: driver: Enable firmware core dump Currently firmware core dump enabled via debugfs, so added changes to enable fw core dump from sysfs. Command to enable and disable fw dump: adb shell "echo 1 > /sys/module/msm_video/parameters/msm_vidc_fw_dump" adb shell "echo 0 > /sys/module/msm_video/parameters/msm_vidc_fw_dump" By default it will be disabled. Change-Id: I4b24c040e819e257edd26f695a095e254245251c Signed-off-by: Gaviraju Doddabettahalli Bettegowda --- driver/vidc/src/msm_vidc_debug.c | 42 ++++++++++++++++++++++++++++++-- 1 file changed, 40 insertions(+), 2 deletions(-) diff --git a/driver/vidc/src/msm_vidc_debug.c b/driver/vidc/src/msm_vidc_debug.c index 00157f59b2..81e6ee03ee 100644 --- a/driver/vidc/src/msm_vidc_debug.c +++ b/driver/vidc/src/msm_vidc_debug.c @@ -77,7 +77,47 @@ static const struct kernel_param_ops msm_vidc_debug_fops = { .get = debug_level_get, }; +static int fw_dump_set(const char *val, + const struct kernel_param *kp) +{ + struct msm_vidc_core *core = NULL; + unsigned int dvalue; + int ret; + + if (!kp || !kp->arg || !val) { + d_vpr_e("%s: Invalid params\n", __func__); + return -EINVAL; + } + core = *(struct msm_vidc_core **) kp->arg; + + if (!core || !core->capabilities) { + d_vpr_e("%s: Invalid core/capabilities\n", __func__); + return -EINVAL; + } + + ret = kstrtouint(val, 0, &dvalue); + if (ret) + return ret; + + msm_vidc_fw_dump = dvalue; + + d_vpr_h("fw dump %s\n", msm_vidc_fw_dump ? "Enabled" : "Disabled"); + + return 0; +} + +static int fw_dump_get(char *buffer, const struct kernel_param *kp) +{ + return scnprintf(buffer, PAGE_SIZE, "%#x", msm_vidc_fw_dump); +} + +static const struct kernel_param_ops msm_vidc_fw_dump_fops = { + .set = fw_dump_set, + .get = fw_dump_get, +}; + module_param_cb(msm_vidc_debug, &msm_vidc_debug_fops, &g_core, 0644); +module_param_cb(msm_vidc_fw_dump, &msm_vidc_fw_dump_fops, &g_core, 0644); bool msm_vidc_lossless_encode = !true; EXPORT_SYMBOL(msm_vidc_lossless_encode); @@ -358,8 +398,6 @@ struct dentry* msm_vidc_debugfs_init_drv() &msm_vidc_syscache_disable); debugfs_create_bool("lossless_encoding", 0644, dir, &msm_vidc_lossless_encode); - debugfs_create_bool("msm_vidc_fw_dump", 0644, dir, - &msm_vidc_fw_dump); debugfs_create_u32("enable_bugon", 0644, dir, &msm_vidc_enable_bugon); From f1a32f5a866b9cb4c2ca972a35b10c6310afbe46 Mon Sep 17 00:00:00 2001 From: Dikshita Agarwal Date: Tue, 2 Aug 2022 12:11:08 +0530 Subject: [PATCH 0693/1061] video: driver: define slice delivery as boolean control. Make slice delivery a boolean control instead of menu. Change-Id: Iedf8e0df882d61e82661c7f557473d3f7b49215a Signed-off-by: Dikshita Agarwal --- driver/platform/kalama/src/msm_vidc_kalama.c | 16 ++------ .../variant/iris3/src/msm_vidc_buffer_iris3.c | 5 +-- driver/vidc/inc/msm_vidc_driver.h | 7 +--- driver/vidc/src/msm_vidc_control.c | 37 ------------------- 4 files changed, 6 insertions(+), 59 deletions(-) diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index 6a7367b61b..a83799f538 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -1927,24 +1927,16 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { CAP_FLAG_BITMASK}, {DELIVERY_MODE, ENC, HEVC, - V4L2_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE_FRAME_BASED, - V4L2_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE_SLICE_BASED, - BIT(V4L2_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE_FRAME_BASED) | - BIT(V4L2_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE_SLICE_BASED), - V4L2_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE_FRAME_BASED, + 0, 1, 1, 0, V4L2_CID_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE, HFI_PROP_ENABLE_SLICE_DELIVERY, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + CAP_FLAG_OUTPUT_PORT}, {DELIVERY_MODE, ENC, H264, - V4L2_MPEG_VIDC_H264_ENCODE_DELIVERY_MODE_FRAME_BASED, - V4L2_MPEG_VIDC_H264_ENCODE_DELIVERY_MODE_SLICE_BASED, - BIT(V4L2_MPEG_VIDC_H264_ENCODE_DELIVERY_MODE_FRAME_BASED) | - BIT(V4L2_MPEG_VIDC_H264_ENCODE_DELIVERY_MODE_SLICE_BASED), - V4L2_MPEG_VIDC_H264_ENCODE_DELIVERY_MODE_FRAME_BASED, + 0, 1, 1, 0, V4L2_CID_MPEG_VIDC_H264_ENCODE_DELIVERY_MODE, HFI_PROP_ENABLE_SLICE_DELIVERY, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + CAP_FLAG_OUTPUT_PORT}, }; static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kalama[] = { diff --git a/driver/variant/iris3/src/msm_vidc_buffer_iris3.c b/driver/variant/iris3/src/msm_vidc_buffer_iris3.c index 3b69307113..87967eec4e 100644 --- a/driver/variant/iris3/src/msm_vidc_buffer_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_buffer_iris3.c @@ -732,10 +732,7 @@ static int msm_buffer_delivery_mode_based_min_count_iris3(struct msm_vidc_inst * delivery_mode = inst->capabilities->cap[DELIVERY_MODE].value; if (slice_mode != V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_MB || - (inst->codec == MSM_VIDC_H264 && - delivery_mode != V4L2_MPEG_VIDC_H264_ENCODE_DELIVERY_MODE_SLICE_BASED) || - (inst->codec == MSM_VIDC_HEVC && - delivery_mode != V4L2_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE_SLICE_BASED)) + (!delivery_mode)) return count; f = &inst->fmts[OUTPUT_PORT]; diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 630f1e4c98..3f50d2d67b 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -344,12 +344,7 @@ static inline bool is_enc_slice_delivery_mode(struct msm_vidc_inst *inst) return (inst->capabilities->cap[SLICE_MODE].value == V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_MB && - ((inst->codec == MSM_VIDC_H264 && - inst->capabilities->cap[DELIVERY_MODE].value == - V4L2_MPEG_VIDC_H264_ENCODE_DELIVERY_MODE_SLICE_BASED) || - (inst->codec == MSM_VIDC_HEVC && - inst->capabilities->cap[DELIVERY_MODE].value == - V4L2_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE_SLICE_BASED))); + inst->capabilities->cap[DELIVERY_MODE].value); } static inline bool is_state(struct msm_vidc_inst *inst, enum msm_vidc_state state) diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index f6e18497bf..8fbe89977d 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -152,12 +152,6 @@ static const char *const mpeg_video_vidc_ir_type[] = { NULL, }; -static const char *const mpeg_vidc_delivery_modes[] = { - "Frame Based Delivery Mode", - "Slice Based Delivery Mode", - NULL, -}; - u32 msm_vidc_get_port_info(struct msm_vidc_inst *inst, enum msm_vidc_inst_capability_type cap_id) { @@ -201,10 +195,6 @@ static const char * const * msm_vidc_get_qmenu_type( return av1_tier; case V4L2_CID_MPEG_VIDEO_VIDC_INTRA_REFRESH_TYPE: return mpeg_video_vidc_ir_type; - case V4L2_CID_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE: - return mpeg_vidc_delivery_modes; - case V4L2_CID_MPEG_VIDC_H264_ENCODE_DELIVERY_MODE: - return mpeg_vidc_delivery_modes; default: i_vpr_e(inst, "%s: No available qmenu for ctrl %#x\n", __func__, control_id); @@ -4301,33 +4291,6 @@ int msm_vidc_v4l2_menu_to_hfi(struct msm_vidc_inst *inst, goto set_default; } return 0; - case DELIVERY_MODE: - if (inst->codec == MSM_VIDC_H264) { - switch (capability->cap[cap_id].value) { - case V4L2_MPEG_VIDC_H264_ENCODE_DELIVERY_MODE_FRAME_BASED: - *value = 0; - break; - case V4L2_MPEG_VIDC_H264_ENCODE_DELIVERY_MODE_SLICE_BASED: - *value = 1; - break; - default: - *value = 0; - goto set_default; - } - } else if (inst->codec == MSM_VIDC_HEVC) { - switch (capability->cap[cap_id].value) { - case V4L2_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE_FRAME_BASED: - *value = 0; - break; - case V4L2_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE_SLICE_BASED: - *value = 1; - break; - default: - *value = 0; - goto set_default; - } - } - return 0; default: i_vpr_e(inst, "%s: mapping not specified for ctrl_id: %#x\n", From 203f09ac3f03ad6e97d0554506776ac45de61be7 Mon Sep 17 00:00:00 2001 From: Dikshita Agarwal Date: Mon, 8 Aug 2022 15:48:10 +0530 Subject: [PATCH 0694/1061] video: driver: add mapping for missing colorspace vidc macros Add mapping for missing vidc macros MSM_VIDC_TRANSFER_UNSPECIFIED and MSM_VIDC_PRIMARIES_UNSPECIFIED. Change-Id: I39fc60d98fe9f7c73d91768f5a0eb36e2c72a94c Signed-off-by: Dikshita Agarwal --- driver/platform/kalama/src/msm_vidc_kalama.c | 12 ++++++++++++ driver/vidc/src/msm_vidc_driver.c | 4 ++-- 2 files changed, 14 insertions(+), 2 deletions(-) diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index ad83d0459e..1dd768b067 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -119,6 +119,10 @@ static struct color_primaries_info color_primaries_data_kalama[] = { .v4l2_color_primaries = V4L2_COLORSPACE_DEFAULT, .vidc_color_primaries = MSM_VIDC_PRIMARIES_RESERVED, }, + { + .v4l2_color_primaries = V4L2_COLORSPACE_DEFAULT, + .vidc_color_primaries = MSM_VIDC_PRIMARIES_UNSPECIFIED, + }, { .v4l2_color_primaries = V4L2_COLORSPACE_REC709, .vidc_color_primaries = MSM_VIDC_PRIMARIES_BT709, @@ -166,6 +170,10 @@ static struct transfer_char_info transfer_char_data_kalama[] = { .v4l2_transfer_char = V4L2_XFER_FUNC_DEFAULT, .vidc_transfer_char = MSM_VIDC_TRANSFER_RESERVED, }, + { + .v4l2_transfer_char = V4L2_XFER_FUNC_DEFAULT, + .vidc_transfer_char = MSM_VIDC_TRANSFER_UNSPECIFIED, + }, { .v4l2_transfer_char = V4L2_XFER_FUNC_709, .vidc_transfer_char = MSM_VIDC_TRANSFER_BT709, @@ -225,6 +233,10 @@ static struct matrix_coeff_info matrix_coeff_data_kalama[] = { .v4l2_matrix_coeff = V4L2_YCBCR_ENC_DEFAULT, .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_RESERVED, }, + { + .v4l2_matrix_coeff = V4L2_YCBCR_ENC_DEFAULT, + .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_UNSPECIFIED, + }, { .v4l2_matrix_coeff = V4L2_YCBCR_VIDC_SRGB_OR_SMPTE_ST428, .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_SRGB_SMPTE_ST428_1, diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 164d10e636..9d01b714f6 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -1013,8 +1013,8 @@ u32 v4l2_matrix_coeff_from_driver(struct msm_vidc_inst *inst, size = core->platform->data.format_data->matrix_coeff_info_size; for (i = 0; i < size; i++) { - if (matrix_coeff_info[i].v4l2_matrix_coeff == v4l2_matrix_coeff) - return matrix_coeff_info[i].vidc_matrix_coeff; + if (matrix_coeff_info[i].vidc_matrix_coeff == vidc_matrix_coeff) + return matrix_coeff_info[i].v4l2_matrix_coeff; } i_vpr_e(inst, "%s: invalid hfi matrix coeff %d\n", From 87557615b94da0c4e9602b8ef250b899fb4bec0a Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Wed, 10 Aug 2022 14:00:11 -0700 Subject: [PATCH 0695/1061] video: driver: add dynamic_allowed flag in database add the missing dynamic_allowed flag for dynamic controls in the database. Change-Id: Icbdac824d668f2c0fdd86af8a1e5a4a4dd25a160 Signed-off-by: Darshana Patil --- driver/platform/anorak/src/msm_vidc_anorak.c | 2 +- driver/platform/kalama/src/kalama.c | 2 +- driver/platform/kalama/src/msm_vidc_kalama.c | 2 +- driver/platform/waipio/src/msm_vidc_waipio.c | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) diff --git a/driver/platform/anorak/src/msm_vidc_anorak.c b/driver/platform/anorak/src/msm_vidc_anorak.c index 23a1764cdb..d4f670ce81 100644 --- a/driver/platform/anorak/src/msm_vidc_anorak.c +++ b/driver/platform/anorak/src/msm_vidc_anorak.c @@ -610,7 +610,7 @@ static struct msm_platform_inst_capability instance_cap_data_anorak[] = { 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDC_LOWLATENCY_REQUEST, HFI_PROP_SEQ_CHANGE_AT_SYNC_FRAME, - CAP_FLAG_INPUT_PORT}, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, {LTR_COUNT, ENC, H264|HEVC, 0, 2, 1, 0, diff --git a/driver/platform/kalama/src/kalama.c b/driver/platform/kalama/src/kalama.c index bfaae7e36c..c75f754cf2 100644 --- a/driver/platform/kalama/src/kalama.c +++ b/driver/platform/kalama/src/kalama.c @@ -594,7 +594,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { 0, 1, 1, 0, 0, HFI_PROP_SEQ_CHANGE_AT_SYNC_FRAME, - CAP_FLAG_INPUT_PORT}, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, {LTR_COUNT, ENC, H264|HEVC, 0, 2, 1, 0, diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index ad83d0459e..84fa5c5abf 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -809,7 +809,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { 0, 1, 1, 0, V4L2_CID_MPEG_VIDC_LOWLATENCY_REQUEST, HFI_PROP_SEQ_CHANGE_AT_SYNC_FRAME, - CAP_FLAG_INPUT_PORT}, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, {LTR_COUNT, ENC, H264|HEVC, 0, 2, 1, 0, diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 1215f45cf6..567eae3a8c 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -551,7 +551,7 @@ static struct msm_platform_inst_capability instance_cap_data_waipio[] = { 1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_CID_MPEG_VIDC_LOWLATENCY_REQUEST, HFI_PROP_SEQ_CHANGE_AT_SYNC_FRAME, - CAP_FLAG_INPUT_PORT}, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, {LTR_COUNT, ENC, H264|HEVC, 0, 2, 1, 0, From 0b49e4ea4003c96b685328140e1b1c2aa1bf8ca9 Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Fri, 12 Aug 2022 14:04:48 -0700 Subject: [PATCH 0696/1061] video: driver: use standard EOS event use standard EOS event instead of private last flag event. Change-Id: Iaeb2c57ceb80769de8cf94a63077eddf3710f871 Signed-off-by: Darshana Patil --- driver/vidc/src/msm_vdec.c | 1 - driver/vidc/src/msm_vidc_driver.c | 10 ++-------- driver/vidc/src/venus_hfi_response.c | 2 +- include/uapi/vidc/media/v4l2_vidc_extensions.h | 12 ------------ 4 files changed, 3 insertions(+), 22 deletions(-) diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 79832fd283..315844ad80 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -2600,7 +2600,6 @@ int msm_vdec_subscribe_event(struct msm_vidc_inst *inst, switch (sub->type) { case V4L2_EVENT_EOS: case V4L2_EVENT_VIDC_METADATA: - case V4L2_EVENT_VIDC_LAST_FLAG: rc = v4l2_event_subscribe(&inst->event_handler, sub, MAX_EVENTS, NULL); break; case V4L2_EVENT_SOURCE_CHANGE: diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 9d01b714f6..03a0903646 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -2203,7 +2203,6 @@ int msm_vidc_process_drain_last_flag(struct msm_vidc_inst *inst) { int rc = 0; struct v4l2_event event = {0}; - struct v4l2_event_vidc_last_flag *event_data = NULL; if (!inst || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); @@ -2220,9 +2219,7 @@ int msm_vidc_process_drain_last_flag(struct msm_vidc_inst *inst) return 0; } - event.type = V4L2_EVENT_VIDC_LAST_FLAG; - event_data = (struct v4l2_event_vidc_last_flag *)event.u.data; - event_data->flag_type = LAST_FLAG_DRAIN; + event.type = V4L2_EVENT_EOS; v4l2_event_queue_fh(&inst->event_handler, &event); return rc; @@ -2232,7 +2229,6 @@ int msm_vidc_process_psc_last_flag(struct msm_vidc_inst *inst) { int rc = 0; struct v4l2_event event = {0}; - struct v4l2_event_vidc_last_flag *event_data = NULL; if (!inst || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); @@ -2249,9 +2245,7 @@ int msm_vidc_process_psc_last_flag(struct msm_vidc_inst *inst) return 0; } - event.type = V4L2_EVENT_VIDC_LAST_FLAG; - event_data = (struct v4l2_event_vidc_last_flag *)event.u.data; - event_data->flag_type = LAST_FLAG_DRC; + event.type = V4L2_EVENT_EOS; v4l2_event_queue_fh(&inst->event_handler, &event); return rc; diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index 7b43bffc43..ab66efa660 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -640,7 +640,7 @@ static int get_driver_buffer_flags(struct msm_vidc_inst *inst, u32 hfi_flags) * attach last flag to the buffer for encode session. * For decode session attach only if control(LAST_FLAG_EVENT_ENABLE) * is not set by client. If this control is enabled, last flag - * info will be sent via event(V4L2_EVENT_VIDC_LAST_FLAG) to client. + * info will be sent via event(V4L2_EVENT_EOS) to client. */ if ((is_encode_session(inst) && (hfi_flags & HFI_BUF_FW_FLAG_LAST)) || diff --git a/include/uapi/vidc/media/v4l2_vidc_extensions.h b/include/uapi/vidc/media/v4l2_vidc_extensions.h index 4a3ed770db..461d7941c0 100644 --- a/include/uapi/vidc/media/v4l2_vidc_extensions.h +++ b/include/uapi/vidc/media/v4l2_vidc_extensions.h @@ -473,18 +473,6 @@ struct v4l2_event_vidc_metadata { __u8 reserved[44]; }; -#define V4L2_EVENT_VIDC_LAST_FLAG \ - (V4L2_EVENT_PRIVATE_START + 0x2) - -enum v4l2_event_last_flag { - LAST_FLAG_DRC = (1 << 0), - LAST_FLAG_DRAIN = (1 << 1), -}; - -struct v4l2_event_vidc_last_flag { - enum v4l2_event_last_flag flag_type; -}; - /* vendor events end */ /* Default metadata size (align to 4KB) */ From e0da5a7e4438814e2809831d07acf3747163389b Mon Sep 17 00:00:00 2001 From: Mahesh Kumar Sharma Date: Tue, 17 May 2022 14:41:02 -0700 Subject: [PATCH 0697/1061] video: driver: add video vsp subcache id support In order to improve video hardware performance, a new BLE is added in system cache to get additional bandwidth. To enable new system cache, video sw driver reads device tree entry and enables it in Video FW. Change-Id: I20025a8095c9981f8533062bdee9a6952df231a3 Signed-off-by: Mark Bao Signed-off-by: Mahesh Kumar Sharma --- driver/vidc/src/venus_hfi.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index 9698b8d6b8..ae1b822978 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -1741,6 +1741,8 @@ static int __init_subcaches(struct msm_vidc_core *core) sinfo->subcache = llcc_slice_getd(LLCC_VIDSC1); } else if (!strcmp("vidscfw", sinfo->name)) { sinfo->subcache = llcc_slice_getd(LLCC_VIDFW); + } else if (!strcmp("vidvsp", sinfo->name)) { + sinfo->subcache = llcc_slice_getd(LLCC_VIDVSP); } else { d_vpr_e("Invalid subcache name %s\n", sinfo->name); From 5a0859f15d129da46914ac9e0689679a7340d7f4 Mon Sep 17 00:00:00 2001 From: Manikanta Kanamarlapudi Date: Thu, 11 Aug 2022 15:38:29 +0530 Subject: [PATCH 0698/1061] msm: vidc: Fix for slice mode configuration When layers are enabled, bitrates are set layerwise. Need to add the cumulative layer bitrates and calculate bytes per slice accordingly. Change-Id: I17616a3b4f73d33c32badbbf8b9aacb60123f54a Signed-off-by: Manikanta Kanamarlapudi --- driver/platform/anorak/src/msm_vidc_anorak.c | 4 +- driver/platform/kalama/src/msm_vidc_kalama.c | 4 +- driver/platform/waipio/src/msm_vidc_waipio.c | 4 +- driver/vidc/src/msm_vidc_control.c | 106 +++++++++++-------- 4 files changed, 66 insertions(+), 52 deletions(-) diff --git a/driver/platform/anorak/src/msm_vidc_anorak.c b/driver/platform/anorak/src/msm_vidc_anorak.c index 23a1764cdb..af9e664e69 100644 --- a/driver/platform/anorak/src/msm_vidc_anorak.c +++ b/driver/platform/anorak/src/msm_vidc_anorak.c @@ -2138,7 +2138,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_anor {ENH_LAYER_COUNT, ENC, H264|HEVC, {BITRATE_MODE, META_EVA_STATS}, - {GOP_SIZE, B_FRAME, BIT_RATE, MIN_QUALITY}, + {GOP_SIZE, B_FRAME, BIT_RATE, MIN_QUALITY, SLICE_MODE}, msm_vidc_adjust_layer_count, msm_vidc_set_layer_count_and_type}, @@ -2245,7 +2245,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_anor msm_vidc_set_deblock_mode}, {SLICE_MODE, ENC, H264|HEVC, - {BITRATE_MODE, ALL_INTRA}, + {BITRATE_MODE, ALL_INTRA, ENH_LAYER_COUNT}, {STAGE, DELIVERY_MODE}, msm_vidc_adjust_slice_count, msm_vidc_set_slice_count}, diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index 1dd768b067..3dcf0b099f 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -2319,7 +2319,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kala {ENH_LAYER_COUNT, ENC, H264|HEVC, {BITRATE_MODE, META_EVA_STATS}, - {GOP_SIZE, B_FRAME, BIT_RATE, MIN_QUALITY}, + {GOP_SIZE, B_FRAME, BIT_RATE, MIN_QUALITY, SLICE_MODE}, msm_vidc_adjust_layer_count, msm_vidc_set_layer_count_and_type}, @@ -2426,7 +2426,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kala msm_vidc_set_deblock_mode}, {SLICE_MODE, ENC, H264|HEVC, - {BITRATE_MODE, ALL_INTRA}, + {BITRATE_MODE, ALL_INTRA, ENH_LAYER_COUNT}, {STAGE, DELIVERY_MODE}, msm_vidc_adjust_slice_count, msm_vidc_set_slice_count}, diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 1215f45cf6..075883b5f9 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -1907,7 +1907,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_waip {ENH_LAYER_COUNT, ENC, H264|HEVC, {BITRATE_MODE, META_EVA_STATS}, - {GOP_SIZE, B_FRAME, BIT_RATE, MIN_QUALITY}, + {GOP_SIZE, B_FRAME, BIT_RATE, MIN_QUALITY, SLICE_MODE}, msm_vidc_adjust_layer_count, msm_vidc_set_layer_count_and_type}, @@ -2002,7 +2002,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_waip msm_vidc_set_deblock_mode}, {SLICE_MODE, ENC, H264|HEVC, - {BITRATE_MODE, ALL_INTRA}, + {BITRATE_MODE, ALL_INTRA, ENH_LAYER_COUNT}, {STAGE}, msm_vidc_adjust_slice_count, msm_vidc_set_slice_count}, diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 86ec7c7ebb..827d443bd7 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -1644,13 +1644,54 @@ int msm_vidc_adjust_chroma_qp_index_offset(void *instance, return 0; } +static bool msm_vidc_check_all_layer_bitrate_set(struct msm_vidc_inst *inst) +{ + bool layer_bitrate_set = true; + u32 cap_id = 0, i, enh_layer_count; + u32 layer_br_caps[6] = {L0_BR, L1_BR, L2_BR, L3_BR, L4_BR, L5_BR}; + + enh_layer_count = inst->capabilities->cap[ENH_LAYER_COUNT].value; + + for (i = 0; i <= enh_layer_count; i++) { + if (i >= ARRAY_SIZE(layer_br_caps)) + break; + cap_id = layer_br_caps[i]; + if (!(inst->capabilities->cap[cap_id].flags & CAP_FLAG_CLIENT_SET)) { + layer_bitrate_set = false; + break; + } + } + + return layer_bitrate_set; +} + +static u32 msm_vidc_get_cumulative_bitrate(struct msm_vidc_inst *inst) +{ + int i; + u32 cap_id = 0; + u32 cumulative_br = 0; + s32 enh_layer_count; + u32 layer_br_caps[6] = {L0_BR, L1_BR, L2_BR, L3_BR, L4_BR, L5_BR}; + + enh_layer_count = inst->capabilities->cap[ENH_LAYER_COUNT].value; + + for (i = 0; i <= enh_layer_count; i++) { + if (i >= ARRAY_SIZE(layer_br_caps)) + break; + cap_id = layer_br_caps[i]; + cumulative_br += inst->capabilities->cap[cap_id].value; + } + + return cumulative_br; +} + int msm_vidc_adjust_slice_count(void *instance, struct v4l2_ctrl *ctrl) { struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; struct msm_vidc_inst_capability *capability; struct v4l2_format *output_fmt; - s32 adjusted_value, rc_type = -1, slice_mode, all_intra = 0; - u32 slice_val, mbpf = 0, mbps = 0, max_mbpf = 0, max_mbps = 0; + s32 adjusted_value, rc_type = -1, slice_mode, all_intra, enh_layer_count = 0; + u32 slice_val, mbpf = 0, mbps = 0, max_mbpf = 0, max_mbps = 0, bitrate = 0; u32 update_cap, max_avg_slicesize, output_width, output_height; u32 min_width, min_height, max_width, max_height, fps; @@ -1669,9 +1710,24 @@ int msm_vidc_adjust_slice_count(void *instance, struct v4l2_ctrl *ctrl) if (msm_vidc_get_parent_value(inst, SLICE_MODE, BITRATE_MODE, &rc_type, __func__) || msm_vidc_get_parent_value(inst, SLICE_MODE, - ALL_INTRA, &all_intra, __func__)) + ALL_INTRA, &all_intra, __func__) || + msm_vidc_get_parent_value(inst, SLICE_MODE, + ENH_LAYER_COUNT, &enh_layer_count, __func__)) return -EINVAL; + if (capability->cap[BIT_RATE].flags & CAP_FLAG_CLIENT_SET) { + bitrate = capability->cap[BIT_RATE].value; + } else if (msm_vidc_check_all_layer_bitrate_set(inst)) { + bitrate = msm_vidc_get_cumulative_bitrate(inst); + } else { + adjusted_value = V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE; + update_cap = SLICE_MODE; + i_vpr_h(inst, + "%s: client did not set bitrate & layerwise bitrates\n", + __func__); + goto exit; + } + fps = capability->cap[FRAME_RATE].value >> 16; if (fps > MAX_SLICES_FRAME_RATE || (rc_type != HFI_RC_OFF && @@ -1739,8 +1795,7 @@ int msm_vidc_adjust_slice_count(void *instance, struct v4l2_ctrl *ctrl) slice_val = capability->cap[SLICE_MAX_BYTES].value; update_cap = SLICE_MAX_BYTES; if (rc_type != HFI_RC_OFF) { - max_avg_slicesize = ((capability->cap[BIT_RATE].value / - fps) / 8) / + max_avg_slicesize = ((bitrate / fps) / 8) / MAX_SLICES_PER_FRAME; slice_val = max(slice_val, max_avg_slicesize); } @@ -1961,47 +2016,6 @@ exit: return 0; } -static bool msm_vidc_check_all_layer_bitrate_set(struct msm_vidc_inst *inst) -{ - bool layer_bitrate_set = true; - u32 cap_id = 0, i, enh_layer_count; - u32 layer_br_caps[6] = {L0_BR, L1_BR, L2_BR, L3_BR, L4_BR, L5_BR}; - - enh_layer_count = inst->capabilities->cap[ENH_LAYER_COUNT].value; - - for (i = 0; i <= enh_layer_count; i++) { - if (i >= ARRAY_SIZE(layer_br_caps)) - break; - cap_id = layer_br_caps[i]; - if (!(inst->capabilities->cap[cap_id].flags & CAP_FLAG_CLIENT_SET)) { - layer_bitrate_set = false; - break; - } - } - - return layer_bitrate_set; -} - -static u32 msm_vidc_get_cumulative_bitrate(struct msm_vidc_inst *inst) -{ - int i; - u32 cap_id = 0; - u32 cumulative_br = 0; - s32 enh_layer_count; - u32 layer_br_caps[6] = {L0_BR, L1_BR, L2_BR, L3_BR, L4_BR, L5_BR}; - - enh_layer_count = inst->capabilities->cap[ENH_LAYER_COUNT].value; - - for (i = 0; i <= enh_layer_count; i++) { - if (i >= ARRAY_SIZE(layer_br_caps)) - break; - cap_id = layer_br_caps[i]; - cumulative_br += inst->capabilities->cap[cap_id].value; - } - - return cumulative_br; -} - int msm_vidc_adjust_bitrate(void *instance, struct v4l2_ctrl *ctrl) { int i, rc = 0; From 8ff4bad25bfcc17bd79f74c530ce709374842475 Mon Sep 17 00:00:00 2001 From: Vikash Garodia Date: Thu, 11 Aug 2022 16:17:15 +0530 Subject: [PATCH 0699/1061] video: driver: sessions without input data are skipped for power votes Video driver has a logic to vote for maximum power resources for initial few frames. If any video session remains within those initial few frames, the votes calculated would reflect as maximum. To handle such video sessions, there is another logic to check if the video session has any input buffer to process. If there are no input buffers to process for that session, there is no need to consider that session for power resource voting. Hence skip the votes aggregation for such sessions during concurrency. Change-Id: Ib5d678b92a81a48100f404421e9356a7226658b0 Signed-off-by: Vikash Garodia --- driver/vidc/src/msm_vidc_power.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/driver/vidc/src/msm_vidc_power.c b/driver/vidc/src/msm_vidc_power.c index 9ed55d4e7b..7a6f4fb588 100644 --- a/driver/vidc/src/msm_vidc_power.c +++ b/driver/vidc/src/msm_vidc_power.c @@ -1,6 +1,7 @@ // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. + * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. */ #include "msm_vidc_power.h" @@ -148,6 +149,10 @@ static int msm_vidc_set_buses(struct msm_vidc_inst* inst) mutex_lock(&core->lock); curr_time_ns = ktime_get_ns(); list_for_each_entry(temp, &core->instances, list) { + /* skip for session where no input is there to process */ + if (!temp->max_input_data_size) + continue; + /* skip inactive session bus bandwidth */ if (!is_active_session(temp->last_qbuf_time_ns, curr_time_ns)) { temp->active = false; @@ -334,6 +339,10 @@ int msm_vidc_set_clocks(struct msm_vidc_inst* inst) freq = 0; curr_time_ns = ktime_get_ns(); list_for_each_entry(temp, &core->instances, list) { + /* skip for session where no input is there to process */ + if (!temp->max_input_data_size) + continue; + /* skip inactive session clock rate */ if (!is_active_session(temp->last_qbuf_time_ns, curr_time_ns)) { temp->active = false; From 3c75f5da07a10e080d59c836f33ea51e8e5c8b96 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Fri, 12 Aug 2022 11:41:12 +0530 Subject: [PATCH 0700/1061] video: driver: reset interface queue header for sys error case interface queues were allocated only once and reused for entire lifetime, but un-consumed packets in the queue during sys_error is leading to undefined behaviour for the next session. For e.x, after queueing cmd_init, received sys_error, so core will be deinited and sys_init willbe sent again as part of next session_open, but FW is consuming 1st cmd_init pkt and sending init_done but driver is expecting done for 2nd cmd_init, So i.e treated as fatal and driver is closing the session and doing core_deinit. To avoid above mentioned issue, made changes to reset queue hdr incase of sys_error. Change-Id: I3ebba24ed4975fbf2b16f914c28b9ae72878fb03 Signed-off-by: Govindaraj Rajagopal --- driver/vidc/src/venus_hfi.c | 67 +++++++++++++++++++++++++------------ 1 file changed, 46 insertions(+), 21 deletions(-) diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index 9698b8d6b8..c254a06d6f 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -2232,11 +2232,49 @@ void venus_hfi_interface_queues_deinit(struct msm_vidc_core *core) core->sfr.align_device_addr = 0; } +static int venus_hfi_reset_queue_header(struct msm_vidc_core *core) +{ + struct msm_vidc_iface_q_info *iface_q; + struct hfi_queue_header *q_hdr; + int i, rc = 0; + + if (!core) { + d_vpr_e("%s: invalid param\n", __func__); + return -EINVAL; + } + + for (i = 0; i < VIDC_IFACEQ_NUMQ; i++) { + iface_q = &core->iface_queues[i]; + __set_queue_hdr_defaults(iface_q->q_hdr); + } + + iface_q = &core->iface_queues[VIDC_IFACEQ_CMDQ_IDX]; + q_hdr = iface_q->q_hdr; + q_hdr->qhdr_start_addr = iface_q->q_array.align_device_addr; + q_hdr->qhdr_type |= HFI_Q_ID_HOST_TO_CTRL_CMD_Q; + + iface_q = &core->iface_queues[VIDC_IFACEQ_MSGQ_IDX]; + q_hdr = iface_q->q_hdr; + q_hdr->qhdr_start_addr = iface_q->q_array.align_device_addr; + q_hdr->qhdr_type |= HFI_Q_ID_CTRL_TO_HOST_MSG_Q; + + iface_q = &core->iface_queues[VIDC_IFACEQ_DBGQ_IDX]; + q_hdr = iface_q->q_hdr; + q_hdr->qhdr_start_addr = iface_q->q_array.align_device_addr; + q_hdr->qhdr_type |= HFI_Q_ID_CTRL_TO_HOST_DEBUG_Q; + /* + * Set receive request to zero on debug queue as there is no + * need of interrupt from video hardware for debug messages + */ + q_hdr->qhdr_rx_req = 0; + + return rc; +} + int venus_hfi_interface_queues_init(struct msm_vidc_core *core) { int rc = 0; struct hfi_queue_table_header *q_tbl_hdr; - struct hfi_queue_header *q_hdr; struct msm_vidc_iface_q_info *iface_q; struct msm_vidc_alloc alloc; struct msm_vidc_map map; @@ -2247,6 +2285,7 @@ int venus_hfi_interface_queues_init(struct msm_vidc_core *core) if (core->iface_q_table.align_virtual_addr) { d_vpr_h("%s: queues already allocated\n", __func__); + venus_hfi_reset_queue_header(core); return 0; } @@ -2287,7 +2326,6 @@ int venus_hfi_interface_queues_init(struct msm_vidc_core *core) offset += iface_q->q_array.mem_size; iface_q->q_hdr = VIDC_IFACEQ_GET_QHDR_START_ADDR( core->iface_q_table.align_virtual_addr, i); - __set_queue_hdr_defaults(iface_q->q_hdr); } q_tbl_hdr = (struct hfi_queue_table_header *) @@ -2301,25 +2339,12 @@ int venus_hfi_interface_queues_init(struct msm_vidc_core *core) q_tbl_hdr->qtbl_num_q = VIDC_IFACEQ_NUMQ; q_tbl_hdr->qtbl_num_active_q = VIDC_IFACEQ_NUMQ; - iface_q = &core->iface_queues[VIDC_IFACEQ_CMDQ_IDX]; - q_hdr = iface_q->q_hdr; - q_hdr->qhdr_start_addr = iface_q->q_array.align_device_addr; - q_hdr->qhdr_type |= HFI_Q_ID_HOST_TO_CTRL_CMD_Q; - - iface_q = &core->iface_queues[VIDC_IFACEQ_MSGQ_IDX]; - q_hdr = iface_q->q_hdr; - q_hdr->qhdr_start_addr = iface_q->q_array.align_device_addr; - q_hdr->qhdr_type |= HFI_Q_ID_CTRL_TO_HOST_MSG_Q; - - iface_q = &core->iface_queues[VIDC_IFACEQ_DBGQ_IDX]; - q_hdr = iface_q->q_hdr; - q_hdr->qhdr_start_addr = iface_q->q_array.align_device_addr; - q_hdr->qhdr_type |= HFI_Q_ID_CTRL_TO_HOST_DEBUG_Q; - /* - * Set receive request to zero on debug queue as there is no - * need of interrupt from video hardware for debug messages - */ - q_hdr->qhdr_rx_req = 0; + /* reset hfi queue header fields */ + rc = venus_hfi_reset_queue_header(core); + if (rc) { + d_vpr_e("%s: init queue header failed\n", __func__); + goto fail_alloc_queue; + } /* sfr buffer */ memset(&alloc, 0, sizeof(alloc)); From ec161663ce3c087e33e8e9150181b0e0a544dd6e Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Thu, 4 Aug 2022 11:03:20 -0700 Subject: [PATCH 0701/1061] video: driver: fix hevc codec layer count support Support only 4 total layers for hevc non vbr rc type session as per PRD. Change-Id: Ifc425de75804552717919e6be71788dd59fb086b Signed-off-by: Akshata Sahukar --- driver/vidc/inc/msm_vidc_internal.h | 3 ++- driver/vidc/src/msm_vidc_control.c | 13 +++++++++---- 2 files changed, 11 insertions(+), 5 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 49c17bd139..a14b9ae4f6 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -73,7 +73,8 @@ enum msm_vidc_metadata_bits { #define MAX_VP9D_INST_COUNT 6 /* TODO: move below macros to waipio.c */ #define MAX_ENH_LAYER_HB 3 -#define MAX_HEVC_ENH_LAYER_SLIDING_WINDOW 5 +#define MAX_HEVC_VBR_ENH_LAYER_SLIDING_WINDOW 5 +#define MAX_HEVC_NON_VBR_ENH_LAYER_SLIDING_WINDOW 3 #define MAX_AVC_ENH_LAYER_SLIDING_WINDOW 3 #define MAX_AVC_ENH_LAYER_HYBRID_HP 5 #define INVALID_DEFAULT_MARK_OR_USE_LTR -1 diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 86ec7c7ebb..77e26a6896 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -1817,7 +1817,7 @@ static int msm_vidc_adjust_static_layer_count_and_type(struct msm_vidc_inst *ins inst->hfi_layer_type = HFI_HIER_P_HYBRID_LTR; } - /* sanitize layer count based on layer type and codec */ + /* sanitize layer count based on layer type and codec, and rc type */ if (inst->hfi_layer_type == HFI_HIER_B) { if (layer_count > MAX_ENH_LAYER_HB) layer_count = MAX_ENH_LAYER_HB; @@ -1828,9 +1828,14 @@ static int msm_vidc_adjust_static_layer_count_and_type(struct msm_vidc_inst *ins if (inst->codec == MSM_VIDC_H264) { if (layer_count > MAX_AVC_ENH_LAYER_SLIDING_WINDOW) layer_count = MAX_AVC_ENH_LAYER_SLIDING_WINDOW; - } else { - if (layer_count > MAX_HEVC_ENH_LAYER_SLIDING_WINDOW) - layer_count = MAX_HEVC_ENH_LAYER_SLIDING_WINDOW; + } else if (inst->codec == MSM_VIDC_HEVC) { + if (inst->hfi_rc_type == HFI_RC_VBR_CFR) { + if (layer_count > MAX_HEVC_VBR_ENH_LAYER_SLIDING_WINDOW) + layer_count = MAX_HEVC_VBR_ENH_LAYER_SLIDING_WINDOW; + } else { + if (layer_count > MAX_HEVC_NON_VBR_ENH_LAYER_SLIDING_WINDOW) + layer_count = MAX_HEVC_NON_VBR_ENH_LAYER_SLIDING_WINDOW; + } } } From 7d00efc5dc4252603f5973639db5b8062eb95463 Mon Sep 17 00:00:00 2001 From: Mahesh Kumar Sharma Date: Mon, 1 Aug 2022 15:19:43 -0700 Subject: [PATCH 0702/1061] video: driver: fix encoder output buffer size requirement For some resolutions memory requirement was coming as 4 * yuv_size and for CQ/RC_OFF it was 8 * yuv_size. With this fix it will be max 2 * yuv_size (+ 25% for 10 bit). Fix typo in 720P resolution check. Change-Id: Ib5908f1eef8dca92dac46c5c195cd47ba28a4df4 Signed-off-by: Mahesh Kumar Sharma --- driver/variant/iris3/inc/hfi_buffer_iris3.h | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/driver/variant/iris3/inc/hfi_buffer_iris3.h b/driver/variant/iris3/inc/hfi_buffer_iris3.h index 8064b47833..4043d09a49 100644 --- a/driver/variant/iris3/inc/hfi_buffer_iris3.h +++ b/driver/variant/iris3/inc/hfi_buffer_iris3.h @@ -1177,23 +1177,26 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ rc_type, is_ten_bit) \ do \ { \ - HFI_U32 aligned_width, aligned_height, bitstream_size; \ + HFI_U32 aligned_width, aligned_height, bitstream_size, yuv_size; \ aligned_width = HFI_ALIGN(frame_width, 32); \ aligned_height = HFI_ALIGN(frame_height, 32); \ bitstream_size = aligned_width * aligned_height * 3; \ + yuv_size = (aligned_width * aligned_height * 3) >> 1; \ if (aligned_width * aligned_height > (4096 * 2176)) \ { \ + /* bitstream_size = 0.25 * yuv_size; */ \ bitstream_size = (bitstream_size >> 3); \ } \ - else if (bitstream_size > (1280 * 720)) \ + else if (aligned_width * aligned_height > (1280 * 720)) \ { \ + /* bitstream_size = 0.5 * yuv_size; */ \ bitstream_size = (bitstream_size >> 2); \ } \ else \ { \ - bitstream_size = (bitstream_size << 1);\ + /* bitstream_size = 2 * yuv_size; */ \ } \ - if ((rc_type == HFI_RC_CQ) || (rc_type == HFI_RC_OFF)) \ + if (((rc_type == HFI_RC_CQ) || (rc_type == HFI_RC_OFF)) && (bitstream_size < yuv_size)) \ { \ bitstream_size = (bitstream_size << 1);\ } \ From 90fabfb02bc55705b61a1c4f255e8133e753c362 Mon Sep 17 00:00:00 2001 From: Dikshita Agarwal Date: Tue, 2 Aug 2022 13:01:18 +0530 Subject: [PATCH 0703/1061] video: driver: remove support for V4L2_EVENT_VIDC_METADATA remove support for V4L2_EVENT_VIDC_METADATA as it is not being used. Change-Id: Ia375d0410d144d2e3b9cd78bc0fde16cfa0d0884 Signed-off-by: Dikshita Agarwal --- driver/vidc/inc/msm_vidc_driver.h | 2 +- driver/vidc/src/msm_vdec.c | 1 - driver/vidc/src/msm_vidc_driver.c | 56 +------------------ driver/vidc/src/venus_hfi_response.c | 2 +- .../uapi/vidc/media/v4l2_vidc_extensions.h | 11 ---- 5 files changed, 5 insertions(+), 67 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index ffdfc3cba7..9ae4733a61 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -407,7 +407,7 @@ int msm_vidc_alloc_and_queue_session_internal_buffers(struct msm_vidc_inst *inst enum msm_vidc_buffer_type buffer_type); int msm_vidc_release_internal_buffers(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type buffer_type); -int msm_vidc_buffer_done(struct msm_vidc_inst *inst, +int msm_vidc_vb2_buffer_done(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buf); int msm_vidc_remove_session(struct msm_vidc_inst *inst); int msm_vidc_add_session(struct msm_vidc_inst *inst); diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 315844ad80..974a58b796 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -2599,7 +2599,6 @@ int msm_vdec_subscribe_event(struct msm_vidc_inst *inst, switch (sub->type) { case V4L2_EVENT_EOS: - case V4L2_EVENT_VIDC_METADATA: rc = v4l2_event_subscribe(&inst->event_handler, sub, MAX_EVENTS, NULL); break; case V4L2_EVENT_SOURCE_CHANGE: diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 03a0903646..1675f6b18e 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -4110,7 +4110,7 @@ int msm_vidc_release_internal_buffers(struct msm_vidc_inst *inst, return 0; } -static int msm_vidc_vb2_buffer_done(struct msm_vidc_inst *inst, +int msm_vidc_vb2_buffer_done(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buf) { int type, port, state; @@ -4177,56 +4177,6 @@ static int msm_vidc_vb2_buffer_done(struct msm_vidc_inst *inst, return 0; } -static int msm_vidc_v4l2_buffer_event(struct msm_vidc_inst *inst, - struct msm_vidc_buffer *buf) -{ - int rc = 0; - struct v4l2_event event = {0}; - struct v4l2_event_vidc_metadata *event_data = NULL; - - if (!inst || !buf) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - if (buf->type != MSM_VIDC_BUF_INPUT_META) { - i_vpr_e(inst, "%s: unsupported buffer type %s\n", - __func__, buf_name(buf->type)); - return -EINVAL; - } - - event.type = V4L2_EVENT_VIDC_METADATA; - event_data = (struct v4l2_event_vidc_metadata *)event.u.data; - event_data->type = INPUT_META_PLANE; - event_data->fd = buf->fd; - event_data->index = buf->index; - event_data->bytesused = buf->data_size; - event_data->offset = buf->data_offset; - - v4l2_event_queue_fh(&inst->event_handler, &event); - - return rc; -} - -int msm_vidc_buffer_done(struct msm_vidc_inst *inst, - struct msm_vidc_buffer *buf) -{ - if (!inst || !inst->capabilities || !buf) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - if (buf->type == MSM_VIDC_BUF_INPUT_META && - inst->capabilities->cap[INPUT_META_VIA_REQUEST].value) { - if (is_meta_rx_inp_enabled(inst, META_OUTBUF_FENCE)) - return msm_vidc_v4l2_buffer_event(inst, buf); - } else { - return msm_vidc_vb2_buffer_done(inst, buf); - } - - return 0; -} - int msm_vidc_event_queue_init(struct msm_vidc_inst *inst) { int rc = 0; @@ -5612,7 +5562,7 @@ int msm_vidc_flush_buffers(struct msm_vidc_inst *inst, buf->attr & MSM_VIDC_ATTR_DEFERRED) { print_vidc_buffer(VIDC_HIGH, "high", "flushing buffer", inst, buf); if (!(buf->attr & MSM_VIDC_ATTR_BUFFER_DONE)) - msm_vidc_buffer_done(inst, buf); + msm_vidc_vb2_buffer_done(inst, buf); msm_vidc_put_driver_buf(inst, buf); } } @@ -5757,7 +5707,7 @@ void msm_vidc_destroy_buffers(struct msm_vidc_inst *inst) list_for_each_entry_safe(buf, dummy, &buffers->list, list) { print_vidc_buffer(VIDC_ERR, "err ", "destroying ", inst, buf); if (!(buf->attr & MSM_VIDC_ATTR_BUFFER_DONE)) - msm_vidc_buffer_done(inst, buf); + msm_vidc_vb2_buffer_done(inst, buf); msm_vidc_put_driver_buf(inst, buf); } msm_vidc_unmap_buffers(inst, ext_buf_types[i]); diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index ab66efa660..5eb8aaa6b6 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -1251,7 +1251,7 @@ static int handle_dequeue_buffers(struct msm_vidc_inst *inst) "vb2 done already", inst, buf); } else { buf->attr |= MSM_VIDC_ATTR_BUFFER_DONE; - rc = msm_vidc_buffer_done(inst, buf); + rc = msm_vidc_vb2_buffer_done(inst, buf); if (rc) { print_vidc_buffer(VIDC_HIGH, "err ", "vb2 done failed", inst, buf); diff --git a/include/uapi/vidc/media/v4l2_vidc_extensions.h b/include/uapi/vidc/media/v4l2_vidc_extensions.h index 461d7941c0..6df30d0b3d 100644 --- a/include/uapi/vidc/media/v4l2_vidc_extensions.h +++ b/include/uapi/vidc/media/v4l2_vidc_extensions.h @@ -461,17 +461,6 @@ enum meta_picture_type { * ... * } */ -#define V4L2_EVENT_VIDC_METADATA \ - (V4L2_EVENT_PRIVATE_START + 0x1) - -struct v4l2_event_vidc_metadata { - __u32 type; - __s32 fd; - __u32 index; - __u32 bytesused; - __u32 offset; - __u8 reserved[44]; -}; /* vendor events end */ From c4beadb5d2d2da1a3b9eab093bdd68f8dea4b415 Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Thu, 11 Aug 2022 17:54:21 -0700 Subject: [PATCH 0704/1061] video: driver: fixes for upstream/downstream driver compilation - do not use vidc_v4l2_extensions.h for upstream driver compilation. - resolve compilation issues in upstream and downstream driver due to above change. - add volatile flag in the database. Signed-off-by: Darshana Patil Change-Id: I1985cae29a459af2250f7044d85c5cd22cdd68f7 --- driver/platform/kalama/src/kalama.c | 19 ++-- driver/platform/kalama/src/msm_vidc_kalama.c | 22 ++-- driver/vidc/inc/msm_vidc_control.h | 1 - driver/vidc/inc/msm_vidc_driver.h | 1 - driver/vidc/inc/msm_vidc_internal.h | 1 + driver/vidc/src/msm_vdec.c | 1 - driver/vidc/src/msm_venc.c | 1 - driver/vidc/src/msm_vidc_control.c | 110 ++++++------------- driver/vidc/src/msm_vidc_control_ext.c | 1 + driver/vidc/src/msm_vidc_power.c | 19 +--- 10 files changed, 64 insertions(+), 112 deletions(-) diff --git a/driver/platform/kalama/src/kalama.c b/driver/platform/kalama/src/kalama.c index bfaae7e36c..0365e26bd1 100644 --- a/driver/platform/kalama/src/kalama.c +++ b/driver/platform/kalama/src/kalama.c @@ -268,16 +268,20 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { MSM_VIDC_FMT_NV12C}, {MIN_BUFFERS_INPUT, ENC|DEC, CODECS_ALL, 0, 64, 1, 4, - V4L2_CID_MIN_BUFFERS_FOR_OUTPUT}, + V4L2_CID_MIN_BUFFERS_FOR_OUTPUT, + 0, + CAP_FLAG_VOLATILE}, {MIN_BUFFERS_INPUT, ENC|DEC, HEIC, 0, 64, 1, 1, - V4L2_CID_MIN_BUFFERS_FOR_OUTPUT}, + V4L2_CID_MIN_BUFFERS_FOR_OUTPUT, + 0, + CAP_FLAG_VOLATILE}, {MIN_BUFFERS_OUTPUT, ENC|DEC, CODECS_ALL, 0, 64, 1, 4, V4L2_CID_MIN_BUFFERS_FOR_CAPTURE, HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT, - CAP_FLAG_OUTPUT_PORT}, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_VOLATILE}, /* (8192 * 4320) / 256 */ {MBPF, ENC, CODECS_ALL, 64, 138240, 1, 138240}, @@ -405,7 +409,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { 0, 0, CAP_FLAG_NONE}, - {SLICE_INTERFACE, DEC, CODECS_ALL, + {SLICE_DECODE, DEC, CODECS_ALL, 0, 0, 0, 0, V4L2_CID_MPEG_VIDEO_DECODER_SLICE_INTERFACE, 0}, @@ -603,9 +607,9 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { CAP_FLAG_OUTPUT_PORT}, {USE_LTR, ENC, H264|HEVC, - INVALID_DEFAULT_MARK_OR_USE_LTR, + 0, ((1 << MAX_LTR_FRAME_COUNT) - 1), - 1, INVALID_DEFAULT_MARK_OR_USE_LTR, + 0, 0, V4L2_CID_MPEG_VIDEO_USE_LTR_FRAMES, HFI_PROP_LTR_USE, CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, @@ -1310,7 +1314,8 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { {FILM_GRAIN, DEC, AV1, 0, 1, 1, 0, 0, - HFI_PROP_AV1_FILM_GRAIN_PRESENT}, + HFI_PROP_AV1_FILM_GRAIN_PRESENT, + CAP_FLAG_VOLATILE}, {SUPER_BLOCK, DEC, AV1, 0, 1, 1, 0, diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index 1dd768b067..94e85ad374 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -6,6 +6,7 @@ #include +#include #include "msm_vidc_kalama.h" #include "msm_vidc_platform.h" #include "msm_vidc_debug.h" @@ -392,16 +393,20 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { MSM_VIDC_FMT_NV12C}, {MIN_BUFFERS_INPUT, ENC|DEC, CODECS_ALL, 0, 64, 1, 4, - V4L2_CID_MIN_BUFFERS_FOR_OUTPUT}, + V4L2_CID_MIN_BUFFERS_FOR_OUTPUT, + 0, + CAP_FLAG_VOLATILE}, {MIN_BUFFERS_INPUT, ENC|DEC, HEIC, 0, 64, 1, 1, - V4L2_CID_MIN_BUFFERS_FOR_OUTPUT}, + V4L2_CID_MIN_BUFFERS_FOR_OUTPUT, + 0, + CAP_FLAG_VOLATILE}, {MIN_BUFFERS_OUTPUT, ENC|DEC, CODECS_ALL, 0, 64, 1, 4, V4L2_CID_MIN_BUFFERS_FOR_CAPTURE, HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT, - CAP_FLAG_OUTPUT_PORT}, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_VOLATILE}, /* (8192 * 4320) / 256 */ {MBPF, ENC, CODECS_ALL, 64, 138240, 1, 138240}, @@ -574,7 +579,9 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { {FENCE_FD, DEC, CODECS_ALL, INVALID_FD, INT_MAX, 1, INVALID_FD, - V4L2_CID_MPEG_VIDC_SW_FENCE_FD}, + V4L2_CID_MPEG_VIDC_SW_FENCE_FD, + 0, + CAP_FLAG_VOLATILE}, {TS_REORDER, DEC, H264|HEVC, 0, 1, 1, 0, @@ -830,9 +837,9 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { CAP_FLAG_OUTPUT_PORT}, {USE_LTR, ENC, H264|HEVC, - INVALID_DEFAULT_MARK_OR_USE_LTR, + 0, ((1 << MAX_LTR_FRAME_COUNT) - 1), - 1, INVALID_DEFAULT_MARK_OR_USE_LTR, + 0, 0, V4L2_CID_MPEG_VIDEO_USE_LTR_FRAMES, HFI_PROP_LTR_USE, CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, @@ -1638,7 +1645,8 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { {FILM_GRAIN, DEC, AV1, 0, 1, 1, 0, V4L2_CID_MPEG_VIDC_AV1D_FILM_GRAIN_PRESENT, - HFI_PROP_AV1_FILM_GRAIN_PRESENT}, + HFI_PROP_AV1_FILM_GRAIN_PRESENT, + CAP_FLAG_VOLATILE}, {SUPER_BLOCK, DEC, AV1, 0, 1, 1, 0, diff --git a/driver/vidc/inc/msm_vidc_control.h b/driver/vidc/inc/msm_vidc_control.h index f10159473e..48a1809842 100644 --- a/driver/vidc/inc/msm_vidc_control.h +++ b/driver/vidc/inc/msm_vidc_control.h @@ -7,7 +7,6 @@ #ifndef _MSM_VIDC_CONTROL_H_ #define _MSM_VIDC_CONTROL_H_ -#include #include "msm_vidc_inst.h" #include "msm_vidc_internal.h" diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 9ae4733a61..f658feee63 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -8,7 +8,6 @@ #include #include -#include #include "msm_vidc_internal.h" #include "msm_vidc_core.h" #include "msm_vidc_inst.h" diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 49c17bd139..3bfc0fc974 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -579,6 +579,7 @@ enum msm_vidc_inst_capability_flags { CAP_FLAG_OUTPUT_PORT = BIT(3), CAP_FLAG_CLIENT_SET = BIT(4), CAP_FLAG_BITMASK = BIT(5), + CAP_FLAG_VOLATILE = BIT(6), }; struct msm_vidc_inst_cap { diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 974a58b796..b7d65e5d58 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -4,7 +4,6 @@ */ /* Copyright (c) 2022. Qualcomm Innovation Center, Inc. All rights reserved. */ -#include #include "msm_media_info.h" #include diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index bb487d2119..77ac058d66 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -3,7 +3,6 @@ * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. */ -#include #include "msm_media_info.h" #include "msm_venc.h" diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 86ec7c7ebb..fa0484d7cb 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -39,22 +39,6 @@ static bool is_priv_ctrl(u32 id) * available yet. Hence, make this as private ctrl for time being */ case V4L2_CID_MPEG_VIDEO_HEVC_PROFILE: - /* - * TODO: V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_TYPE is - * std ctrl. But needs some fixes in v4l2-ctrls.c. Hence, - * make this as private ctrl for time being - */ - case V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_TYPE: - /* - * TODO: treat below std ctrls as private ctrls until - * all below ctrls are available in upstream - */ - case V4L2_CID_MPEG_VIDEO_AU_DELIMITER: - case V4L2_CID_MPEG_VIDEO_LTR_COUNT: - case V4L2_CID_MPEG_VIDEO_FRAME_LTR_INDEX: - case V4L2_CID_MPEG_VIDEO_USE_LTR_FRAMES: - case V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY: - case V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY_ENABLE: private = true; break; default: @@ -65,25 +49,6 @@ static bool is_priv_ctrl(u32 id) return private; } -static const char *const mpeg_video_rate_control[] = { - "VBR", - "CBR", - "CBR VFR", - "MBR", - "MBR VFR", - "CQ", - NULL, -}; - -static const char *const mpeg_video_stream_format[] = { - "NAL Format Start Codes", - "NAL Format One NAL Per Buffer", - "NAL Format One Byte Length", - "NAL Format Two Byte Length", - "NAL Format Four Byte Length", - NULL, -}; - static const char *const mpeg_video_blur_types[] = { "Blur None", "Blur External", @@ -91,12 +56,6 @@ static const char *const mpeg_video_blur_types[] = { NULL, }; -static const char *const mpeg_video_avc_coding_layer[] = { - "B", - "P", - NULL, -}; - static const char *const mpeg_video_hevc_profile[] = { "Main", "Main Still Picture", @@ -174,30 +133,36 @@ u32 msm_vidc_get_port_info(struct msm_vidc_inst *inst, } static const char * const * msm_vidc_get_qmenu_type( - struct msm_vidc_inst *inst, u32 control_id) + struct msm_vidc_inst *inst, u32 cap_id) { - switch (control_id) { - case V4L2_CID_MPEG_VIDEO_BITRATE_MODE: - return mpeg_video_rate_control; - case V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD: - return mpeg_video_stream_format; - case V4L2_CID_MPEG_VIDC_VIDEO_BLUR_TYPES: + switch (cap_id) { + case BLUR_TYPES: return mpeg_video_blur_types; - case V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_TYPE: - return mpeg_video_avc_coding_layer; - case V4L2_CID_MPEG_VIDEO_HEVC_PROFILE: - return mpeg_video_hevc_profile; - case V4L2_CID_MPEG_VIDEO_AV1_PROFILE: - return av1_profile; - case V4L2_CID_MPEG_VIDEO_AV1_LEVEL: - return av1_level; - case V4L2_CID_MPEG_VIDEO_AV1_TIER: + case PROFILE: + if (inst->codec == MSM_VIDC_HEVC || inst->codec == MSM_VIDC_HEIC) { + return mpeg_video_hevc_profile; + } else if (inst->codec == MSM_VIDC_AV1) { + return av1_profile; + } else { + i_vpr_e(inst, "%s: invalid codec type %d for cap id %d\n", + __func__, inst->codec, cap_id); + return NULL; + } + case LEVEL: + if (inst->codec == MSM_VIDC_AV1) { + return av1_level; + } else { + i_vpr_e(inst, "%s: invalid codec type %d for cap id %d\n", + __func__, inst->codec, cap_id); + return NULL; + } + case AV1_TIER: return av1_tier; - case V4L2_CID_MPEG_VIDEO_VIDC_INTRA_REFRESH_TYPE: + case IR_TYPE: return mpeg_video_vidc_ir_type; default: - i_vpr_e(inst, "%s: No available qmenu for ctrl %#x\n", - __func__, control_id); + i_vpr_e(inst, "%s: No available qmenu for cap id %d\n", + __func__, cap_id); return NULL; } } @@ -745,15 +710,6 @@ error: return rc; } -void msm_vidc_add_volatile_flag(struct v4l2_ctrl *ctrl) -{ - if (ctrl->id == V4L2_CID_MIN_BUFFERS_FOR_OUTPUT || - ctrl->id == V4L2_CID_MIN_BUFFERS_FOR_CAPTURE || - ctrl->id == V4L2_CID_MPEG_VIDC_AV1D_FILM_GRAIN_PRESENT || - ctrl->id == V4L2_CID_MPEG_VIDC_SW_FENCE_FD) - ctrl->flags |= V4L2_CTRL_FLAG_VOLATILE; -} - int msm_vidc_ctrl_deinit(struct msm_vidc_inst *inst) { if (!inst) { @@ -866,7 +822,7 @@ int msm_vidc_ctrl_init(struct msm_vidc_inst *inst) ctrl_cfg.menu_skip_mask = ~(capability->cap[idx].step_or_mask); ctrl_cfg.qmenu = msm_vidc_get_qmenu_type(inst, - capability->cap[idx].v4l2_id); + capability->cap[idx].cap_id); } else { ctrl_cfg.step = capability->cap[idx].step_or_mask; @@ -915,11 +871,9 @@ int msm_vidc_ctrl_init(struct msm_vidc_inst *inst) goto error; } - /* - * TODO(AS) - * ctrl->flags |= capability->cap[idx].flags; - */ - msm_vidc_add_volatile_flag(ctrl); + if (capability->cap[idx].flags & CAP_FLAG_VOLATILE) + ctrl->flags |= V4L2_CTRL_FLAG_VOLATILE; + ctrl->flags |= V4L2_CTRL_FLAG_EXECUTE_ON_WRITE; inst->ctrls[ctrl_idx] = ctrl; ctrl_idx++; @@ -2902,7 +2856,7 @@ int msm_vidc_adjust_dec_slice_mode(void *instance, struct v4l2_ctrl *ctrl) u32 adjusted_value = 0; s32 low_latency = -1; s32 picture_order = -1; - s32 outbuf_fence = V4L2_MPEG_VIDC_META_DISABLE; + s32 outbuf_fence = 0; if (!inst || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); @@ -2922,7 +2876,7 @@ int msm_vidc_adjust_dec_slice_mode(void *instance, struct v4l2_ctrl *ctrl) if (!low_latency || !picture_order || !is_meta_rx_inp_enabled(inst, META_OUTBUF_FENCE)) - adjusted_value = V4L2_MPEG_MSM_VIDC_DISABLE; + adjusted_value = 0; msm_vidc_update_cap_value(inst, SLICE_DECODE, adjusted_value, __func__); @@ -4527,7 +4481,7 @@ int msm_vidc_set_vui_timing_info(void *instance, * V4L2_CID_MPEG_VIDC_VUI_TIMING_INFO and hence reverse * the hfi_value from cap_id value. */ - if (inst->capabilities->cap[cap_id].value == V4L2_MPEG_MSM_VIDC_ENABLE) + if (inst->capabilities->cap[cap_id].value == 1) hfi_value = 0; else hfi_value = 1; diff --git a/driver/vidc/src/msm_vidc_control_ext.c b/driver/vidc/src/msm_vidc_control_ext.c index 45255a5e45..9d2da9bbaa 100644 --- a/driver/vidc/src/msm_vidc_control_ext.c +++ b/driver/vidc/src/msm_vidc_control_ext.c @@ -3,6 +3,7 @@ * Copyright (c) 2022. Qualcomm Innovation Center, Inc. All rights reserved. */ +#include #include "msm_vidc_control_ext.h" #include "msm_vidc_debug.h" #include "hfi_packet.h" diff --git a/driver/vidc/src/msm_vidc_power.c b/driver/vidc/src/msm_vidc_power.c index 9ed55d4e7b..2efcd99ea3 100644 --- a/driver/vidc/src/msm_vidc_power.c +++ b/driver/vidc/src/msm_vidc_power.c @@ -188,7 +188,6 @@ int msm_vidc_scale_buses(struct msm_vidc_inst *inst) struct vidc_bus_vote_data *vote_data; struct v4l2_format *out_f; struct v4l2_format *inp_f; - int codec = 0; u32 operating_rate, frame_rate; if (!inst || !inst->core || !inst->capabilities) { @@ -211,27 +210,15 @@ int msm_vidc_scale_buses(struct msm_vidc_inst *inst) out_f = &inst->fmts[OUTPUT_PORT]; inp_f = &inst->fmts[INPUT_PORT]; - switch (inst->domain) { - case MSM_VIDC_DECODER: - codec = inp_f->fmt.pix_mp.pixelformat; - break; - case MSM_VIDC_ENCODER: - codec = out_f->fmt.pix_mp.pixelformat; - break; - default: - i_vpr_e(inst, "%s: invalid session_type %#x\n", - __func__, inst->domain); - break; - } vote_data->codec = inst->codec; vote_data->input_width = inp_f->fmt.pix_mp.width; vote_data->input_height = inp_f->fmt.pix_mp.height; vote_data->output_width = out_f->fmt.pix_mp.width; vote_data->output_height = out_f->fmt.pix_mp.height; - vote_data->lcu_size = (codec == V4L2_PIX_FMT_HEVC || - codec == V4L2_PIX_FMT_VP9) ? 32 : 16; - if (codec == V4L2_PIX_FMT_AV1) + vote_data->lcu_size = (inst->codec == MSM_VIDC_HEVC || + inst->codec == MSM_VIDC_VP9) ? 32 : 16; + if (inst->codec == MSM_VIDC_AV1) vote_data->lcu_size = inst->capabilities->cap[SUPER_BLOCK].value ? 128 : 64; vote_data->fps = inst->max_rate; From 963e12e58f05b3992021f42d066c02728bac1fa9 Mon Sep 17 00:00:00 2001 From: Sachu George Date: Fri, 12 Aug 2022 15:38:27 +0530 Subject: [PATCH 0705/1061] video-driver: Disabling VSP subcache for Halliday VSP subcache support is not available in 5.10 kernel. Hence needs to be disabled for Halliday. Change-Id: I8e0905d537d8df3c72063b2e8dc5011d8e0ff785 Signed-off-by: Sachu George --- driver/vidc/src/venus_hfi.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index ae1b822978..e65430af20 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -1742,7 +1742,9 @@ static int __init_subcaches(struct msm_vidc_core *core) } else if (!strcmp("vidscfw", sinfo->name)) { sinfo->subcache = llcc_slice_getd(LLCC_VIDFW); } else if (!strcmp("vidvsp", sinfo->name)) { +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5,15,0)) sinfo->subcache = llcc_slice_getd(LLCC_VIDVSP); +#endif } else { d_vpr_e("Invalid subcache name %s\n", sinfo->name); From 1020319ca45098b085fedac7682b21be74e78490 Mon Sep 17 00:00:00 2001 From: Stanimir Varbanov Date: Fri, 12 Aug 2022 09:20:00 -0700 Subject: [PATCH 0706/1061] video-driver: Move HFI queue functions out of venus_hfi Split HFI queue functions in separate file. This will unload venus_hfi and also will make possible to reuse/shared with other drivers. Change-Id: I16155e649f216afc6f26db76b565aad28b114cc7 Signed-off-by: Stanimir Varbanov --- Kbuild | 1 + driver/vidc/inc/msm_vidc_core.h | 1 + driver/vidc/inc/msm_vidc_internal.h | 68 --- driver/vidc/inc/venus_hfi.h | 6 - driver/vidc/inc/venus_hfi_queue.h | 92 ++++ driver/vidc/src/msm_vidc_probe.c | 6 +- driver/vidc/src/venus_hfi.c | 676 +++------------------------- driver/vidc/src/venus_hfi_queue.c | 612 +++++++++++++++++++++++++ 8 files changed, 773 insertions(+), 689 deletions(-) create mode 100644 driver/vidc/inc/venus_hfi_queue.h create mode 100644 driver/vidc/src/venus_hfi_queue.c diff --git a/Kbuild b/Kbuild index 549e0411b4..588dc20075 100644 --- a/Kbuild +++ b/Kbuild @@ -71,6 +71,7 @@ msm_video-objs += driver/vidc/src/msm_vidc_v4l2.o \ driver/vidc/src/msm_vidc_memory.o \ driver/vidc/src/msm_vidc_fence.o \ driver/vidc/src/venus_hfi.o \ + driver/vidc/src/venus_hfi_queue.o \ driver/vidc/src/hfi_packet.o \ driver/vidc/src/venus_hfi_response.o \ driver/platform/common/src/msm_vidc_platform.o diff --git a/driver/vidc/inc/msm_vidc_core.h b/driver/vidc/inc/msm_vidc_core.h index 7d947cf542..0544d7780d 100644 --- a/driver/vidc/inc/msm_vidc_core.h +++ b/driver/vidc/inc/msm_vidc_core.h @@ -9,6 +9,7 @@ #include #include "msm_vidc_internal.h" +#include "venus_hfi_queue.h" struct msm_vidc_core; diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 2519a9938a..73c54c763a 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -679,74 +679,6 @@ enum signal_session_response { MAX_SIGNAL, }; -#define HFI_MASK_QHDR_TX_TYPE 0xFF000000 -#define HFI_MASK_QHDR_RX_TYPE 0x00FF0000 -#define HFI_MASK_QHDR_PRI_TYPE 0x0000FF00 -#define HFI_MASK_QHDR_Q_ID_TYPE 0x000000FF -#define HFI_Q_ID_HOST_TO_CTRL_CMD_Q 0x00 -#define HFI_Q_ID_CTRL_TO_HOST_MSG_Q 0x01 -#define HFI_Q_ID_CTRL_TO_HOST_DEBUG_Q 0x02 -#define HFI_MASK_QHDR_STATUS 0x000000FF - -#define VIDC_IFACEQ_NUMQ 3 -#define VIDC_IFACEQ_CMDQ_IDX 0 -#define VIDC_IFACEQ_MSGQ_IDX 1 -#define VIDC_IFACEQ_DBGQ_IDX 2 -#define VIDC_IFACEQ_MAX_BUF_COUNT 50 -#define VIDC_IFACE_MAX_PARALLEL_CLNTS 16 -#define VIDC_IFACEQ_DFLT_QHDR 0x01010000 - -struct hfi_queue_table_header { - u32 qtbl_version; - u32 qtbl_size; - u32 qtbl_qhdr0_offset; - u32 qtbl_qhdr_size; - u32 qtbl_num_q; - u32 qtbl_num_active_q; - void *device_addr; - char name[256]; -}; - -struct hfi_queue_header { - u32 qhdr_status; - u32 qhdr_start_addr; - u32 qhdr_type; - u32 qhdr_q_size; - u32 qhdr_pkt_size; - u32 qhdr_pkt_drop_cnt; - u32 qhdr_rx_wm; - u32 qhdr_tx_wm; - u32 qhdr_rx_req; - u32 qhdr_tx_req; - u32 qhdr_rx_irq_status; - u32 qhdr_tx_irq_status; - u32 qhdr_read_idx; - u32 qhdr_write_idx; -}; - -#define VIDC_IFACEQ_TABLE_SIZE (sizeof(struct hfi_queue_table_header) \ - + sizeof(struct hfi_queue_header) * VIDC_IFACEQ_NUMQ) - -#define VIDC_IFACEQ_QUEUE_SIZE (VIDC_IFACEQ_MAX_PKT_SIZE * \ - VIDC_IFACEQ_MAX_BUF_COUNT * VIDC_IFACE_MAX_PARALLEL_CLNTS) - -#define VIDC_IFACEQ_GET_QHDR_START_ADDR(ptr, i) \ - (void *)((ptr + sizeof(struct hfi_queue_table_header)) + \ - (i * sizeof(struct hfi_queue_header))) - -#define QDSS_SIZE 4096 -#define SFR_SIZE 4096 - -#define QUEUE_SIZE (VIDC_IFACEQ_TABLE_SIZE + \ - (VIDC_IFACEQ_QUEUE_SIZE * VIDC_IFACEQ_NUMQ)) - -#define ALIGNED_QDSS_SIZE ALIGN(QDSS_SIZE, SZ_4K) -#define ALIGNED_SFR_SIZE ALIGN(SFR_SIZE, SZ_4K) -#define ALIGNED_QUEUE_SIZE ALIGN(QUEUE_SIZE, SZ_4K) -#define SHARED_QSIZE ALIGN(ALIGNED_SFR_SIZE + ALIGNED_QUEUE_SIZE + \ - ALIGNED_QDSS_SIZE, SZ_1M) -#define TOTAL_QSIZE (SHARED_QSIZE - ALIGNED_SFR_SIZE - ALIGNED_QDSS_SIZE) - struct profile_data { u64 start; u64 stop; diff --git a/driver/vidc/inc/venus_hfi.h b/driver/vidc/inc/venus_hfi.h index a4085eb696..c3cfedb03c 100644 --- a/driver/vidc/inc/venus_hfi.h +++ b/driver/vidc/inc/venus_hfi.h @@ -72,8 +72,6 @@ int venus_hfi_set_ir_period(struct msm_vidc_inst *inst, u32 ir_type, void venus_hfi_pm_work_handler(struct work_struct *work); irqreturn_t venus_hfi_isr(int irq, void *data); irqreturn_t venus_hfi_isr_handler(int irq, void *data); -int venus_hfi_interface_queues_init(struct msm_vidc_core *core); -void venus_hfi_interface_queues_deinit(struct msm_vidc_core *core); int __write_register_masked(struct msm_vidc_core *core, u32 reg, u32 value, u32 mask); @@ -82,10 +80,6 @@ int __write_register(struct msm_vidc_core *core, int __read_register(struct msm_vidc_core *core, u32 reg, u32 *value); int __read_register_with_poll_timeout(struct msm_vidc_core *core, u32 reg, u32 mask, u32 exp_val, u32 sleep_us, u32 timeout_us); -int __iface_cmdq_write(struct msm_vidc_core *core, - void *pkt); -int __iface_msgq_read(struct msm_vidc_core *core, void *pkt); -int __iface_dbgq_read(struct msm_vidc_core *core, void *pkt); int __set_clocks(struct msm_vidc_core *core, u32 freq); int __scale_clocks(struct msm_vidc_core *core); int __set_clk_rate(struct msm_vidc_core *core, diff --git a/driver/vidc/inc/venus_hfi_queue.h b/driver/vidc/inc/venus_hfi_queue.h new file mode 100644 index 0000000000..69f23cd584 --- /dev/null +++ b/driver/vidc/inc/venus_hfi_queue.h @@ -0,0 +1,92 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) 2020-2022, The Linux Foundation. All rights reserved. + */ + +#ifndef _VENUS_HFI_QUEUE_H_ +#define _VENUS_HFI_QUEUE_H_ + +#include + +#include "msm_vidc_internal.h" + +#define HFI_MASK_QHDR_TX_TYPE 0xff000000 +#define HFI_MASK_QHDR_RX_TYPE 0x00ff0000 +#define HFI_MASK_QHDR_PRI_TYPE 0x0000ff00 +#define HFI_MASK_QHDR_Q_ID_TYPE 0x000000ff +#define HFI_Q_ID_HOST_TO_CTRL_CMD_Q 0 +#define HFI_Q_ID_CTRL_TO_HOST_MSG_Q 1 +#define HFI_Q_ID_CTRL_TO_HOST_DEBUG_Q 2 +#define HFI_MASK_QHDR_STATUS 0x000000ff + +#define VIDC_IFACEQ_NUMQ 3 +#define VIDC_IFACEQ_CMDQ_IDX 0 +#define VIDC_IFACEQ_MSGQ_IDX 1 +#define VIDC_IFACEQ_DBGQ_IDX 2 +#define VIDC_IFACEQ_MAX_BUF_COUNT 50 +#define VIDC_IFACE_MAX_PARALLEL_CLNTS 16 +#define VIDC_IFACEQ_DFLT_QHDR 0x01010000 + +struct hfi_queue_table_header { + u32 qtbl_version; + u32 qtbl_size; + u32 qtbl_qhdr0_offset; + u32 qtbl_qhdr_size; + u32 qtbl_num_q; + u32 qtbl_num_active_q; + void *device_addr; + char name[256]; +}; + +struct hfi_queue_header { + u32 qhdr_status; + u32 qhdr_start_addr; + u32 qhdr_type; + u32 qhdr_q_size; + u32 qhdr_pkt_size; + u32 qhdr_pkt_drop_cnt; + u32 qhdr_rx_wm; + u32 qhdr_tx_wm; + u32 qhdr_rx_req; + u32 qhdr_tx_req; + u32 qhdr_rx_irq_status; + u32 qhdr_tx_irq_status; + u32 qhdr_read_idx; + u32 qhdr_write_idx; +}; + +#define VIDC_IFACEQ_TABLE_SIZE (sizeof(struct hfi_queue_table_header) + \ + sizeof(struct hfi_queue_header) * VIDC_IFACEQ_NUMQ) + +#define VIDC_IFACEQ_QUEUE_SIZE (VIDC_IFACEQ_MAX_PKT_SIZE * \ + VIDC_IFACEQ_MAX_BUF_COUNT * VIDC_IFACE_MAX_PARALLEL_CLNTS) + +#define VIDC_IFACEQ_GET_QHDR_START_ADDR(ptr, i) \ + (void *)((ptr + sizeof(struct hfi_queue_table_header)) + \ + (i * sizeof(struct hfi_queue_header))) + +#define QDSS_SIZE 4096 +#define SFR_SIZE 4096 + +#define QUEUE_SIZE (VIDC_IFACEQ_TABLE_SIZE + \ + (VIDC_IFACEQ_QUEUE_SIZE * VIDC_IFACEQ_NUMQ)) + +#define ALIGNED_QDSS_SIZE ALIGN(QDSS_SIZE, SZ_4K) +#define ALIGNED_SFR_SIZE ALIGN(SFR_SIZE, SZ_4K) +#define ALIGNED_QUEUE_SIZE ALIGN(QUEUE_SIZE, SZ_4K) +#define SHARED_QSIZE ALIGN(ALIGNED_SFR_SIZE + ALIGNED_QUEUE_SIZE + \ + ALIGNED_QDSS_SIZE, SZ_1M) +#define TOTAL_QSIZE (SHARED_QSIZE - ALIGNED_SFR_SIZE - ALIGNED_QDSS_SIZE) + +struct msm_vidc_core; + +int venus_hfi_queue_cmd_write(struct msm_vidc_core *core, void *pkt); +int venus_hfi_queue_cmd_write_intr(struct msm_vidc_core *core, void *pkt, + bool allow_intr); +int venus_hfi_queue_msg_read(struct msm_vidc_core *core, void *pkt); +int venus_hfi_queue_dbg_read(struct msm_vidc_core *core, void *pkt); +void venus_hfi_queue_deinit(struct msm_vidc_core *core); +int venus_hfi_queue_init(struct msm_vidc_core *core); +int venus_hfi_reset_queue_header(struct msm_vidc_core *core); + +#endif diff --git a/driver/vidc/src/msm_vidc_probe.c b/driver/vidc/src/msm_vidc_probe.c index 0e0e9c1391..929ef55464 100644 --- a/driver/vidc/src/msm_vidc_probe.c +++ b/driver/vidc/src/msm_vidc_probe.c @@ -379,7 +379,7 @@ static int msm_vidc_component_bind(struct device *dev) return rc; } - rc = venus_hfi_interface_queues_init(core); + rc = venus_hfi_queue_init(core); if (rc) { d_vpr_e("%s: interface queues init failed\n", __func__); goto queues_deinit; @@ -396,7 +396,7 @@ static int msm_vidc_component_bind(struct device *dev) return 0; queues_deinit: - venus_hfi_interface_queues_deinit(core); + venus_hfi_queue_deinit(core); /** * queues and core can be inited again during session_open. * So don't declare as probe failure. @@ -411,7 +411,7 @@ static void msm_vidc_component_unbind(struct device *dev) d_vpr_h("%s(): %s\n", __func__, dev_name(dev)); msm_vidc_core_deinit(core, true); - venus_hfi_interface_queues_deinit(core); + venus_hfi_queue_deinit(core); component_unbind_all(dev, core); d_vpr_h("%s(): succssful\n", __func__); diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index 4d0e3e683e..b166578667 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -26,6 +26,7 @@ #include "msm_vidc_debug.h" #include "hfi_packet.h" #include "venus_hfi_response.h" +#include "venus_hfi_queue.h" #include "msm_vidc_events.h" #define MAX_FIRMWARE_NAME_SIZE 128 @@ -135,28 +136,6 @@ void __dump(struct dump dump[], int len) } } -static void __dump_packet(u8 *packet, const char *function, void *qinfo) -{ - u32 c = 0, session_id, packet_size = *(u32 *)packet; - const int row_size = 32; - /* - * row must contain enough for 0xdeadbaad * 8 to be converted into - * "de ad ba ab " * 8 + '\0' - */ - char row[3 * 32]; - session_id = *((u32 *)packet + 1); - - d_vpr_t("%08x: %s: %pK\n", session_id, function, qinfo); - - for (c = 0; c * row_size < packet_size; ++c) { - int bytes_to_read = ((c + 1) * row_size > packet_size) ? - packet_size % row_size : row_size; - hex_dump_to_buffer(packet + c * row_size, bytes_to_read, - row_size, 4, row, sizeof(row), false); - d_vpr_t("%08x: %s\n", session_id, row); - } -} - static void __fatal_error(bool fatal) { WARN_ON(fatal); @@ -733,369 +712,6 @@ int __scale_clocks(struct msm_vidc_core *core) return 0; } -static int __write_queue(struct msm_vidc_iface_q_info *qinfo, u8 *packet, - bool *rx_req_is_set) -{ - struct hfi_queue_header *queue; - u32 packet_size_in_words, new_write_idx; - u32 empty_space, read_idx, write_idx; - u32 *write_ptr; - - if (!qinfo || !packet) { - d_vpr_e("%s: invalid params %pK %pK\n", - __func__, qinfo, packet); - return -EINVAL; - } else if (!qinfo->q_array.align_virtual_addr) { - d_vpr_e("Queues have already been freed\n"); - return -EINVAL; - } - - queue = (struct hfi_queue_header *) qinfo->q_hdr; - if (!queue) { - d_vpr_e("queue not present\n"); - return -ENOENT; - } - - if (msm_vidc_debug & VIDC_PKT) - __dump_packet(packet, __func__, qinfo); - - - // TODO: handle writing packet - //d_vpr_e("skip writing packet\n"); - //return 0; - - packet_size_in_words = (*(u32 *)packet) >> 2; - if (!packet_size_in_words || packet_size_in_words > - qinfo->q_array.mem_size>>2) { - d_vpr_e("Invalid packet size\n"); - return -ENODATA; - } - - read_idx = queue->qhdr_read_idx; - write_idx = queue->qhdr_write_idx; - - empty_space = (write_idx >= read_idx) ? - ((qinfo->q_array.mem_size>>2) - (write_idx - read_idx)) : - (read_idx - write_idx); - if (empty_space <= packet_size_in_words) { - queue->qhdr_tx_req = 1; - d_vpr_e("Insufficient size (%d) to write (%d)\n", - empty_space, packet_size_in_words); - return -ENOTEMPTY; - } - - queue->qhdr_tx_req = 0; - - new_write_idx = write_idx + packet_size_in_words; - write_ptr = (u32 *)((qinfo->q_array.align_virtual_addr) + - (write_idx << 2)); - if (write_ptr < (u32 *)qinfo->q_array.align_virtual_addr || - write_ptr > (u32 *)(qinfo->q_array.align_virtual_addr + - qinfo->q_array.mem_size)) { - d_vpr_e("Invalid write index\n"); - return -ENODATA; - } - - if (new_write_idx < (qinfo->q_array.mem_size >> 2)) { - memcpy(write_ptr, packet, packet_size_in_words << 2); - } else { - new_write_idx -= qinfo->q_array.mem_size >> 2; - memcpy(write_ptr, packet, (packet_size_in_words - - new_write_idx) << 2); - memcpy((void *)qinfo->q_array.align_virtual_addr, - packet + ((packet_size_in_words - new_write_idx) << 2), - new_write_idx << 2); - } - - /* - * Memory barrier to make sure packet is written before updating the - * write index - */ - mb(); - queue->qhdr_write_idx = new_write_idx; - if (rx_req_is_set) - *rx_req_is_set = true; - /* - * Memory barrier to make sure write index is updated before an - * interrupt is raised on venus. - */ - mb(); - return 0; -} - -static int __read_queue(struct msm_vidc_iface_q_info *qinfo, u8 *packet, - u32 *pb_tx_req_is_set) -{ - struct hfi_queue_header *queue; - u32 packet_size_in_words, new_read_idx; - u32 *read_ptr; - u32 receive_request = 0; - u32 read_idx, write_idx; - int rc = 0; - - if (!qinfo || !packet || !pb_tx_req_is_set) { - d_vpr_e("%s: invalid params %pK %pK %pK\n", - __func__, qinfo, packet, pb_tx_req_is_set); - return -EINVAL; - } else if (!qinfo->q_array.align_virtual_addr) { - d_vpr_e("Queues have already been freed\n"); - return -EINVAL; - } - - /* - * Memory barrier to make sure data is valid before - *reading it - */ - mb(); - queue = (struct hfi_queue_header *) qinfo->q_hdr; - - if (!queue) { - d_vpr_e("Queue memory is not allocated\n"); - return -ENOMEM; - } - - /* - * Do not set receive request for debug queue, if set, - * Venus generates interrupt for debug messages even - * when there is no response message available. - * In general debug queue will not become full as it - * is being emptied out for every interrupt from Venus. - * Venus will anyway generates interrupt if it is full. - */ - if (queue->qhdr_type & HFI_Q_ID_CTRL_TO_HOST_MSG_Q) - receive_request = 1; - - read_idx = queue->qhdr_read_idx; - write_idx = queue->qhdr_write_idx; - - if (read_idx == write_idx) { - queue->qhdr_rx_req = receive_request; - /* - * mb() to ensure qhdr is updated in main memory - * so that venus reads the updated header values - */ - mb(); - *pb_tx_req_is_set = 0; - d_vpr_l( - "%s queue is empty, rx_req = %u, tx_req = %u, read_idx = %u\n", - receive_request ? "message" : "debug", - queue->qhdr_rx_req, queue->qhdr_tx_req, - queue->qhdr_read_idx); - return -ENODATA; - } - - read_ptr = (u32 *)((qinfo->q_array.align_virtual_addr) + - (read_idx << 2)); - if (read_ptr < (u32 *)qinfo->q_array.align_virtual_addr || - read_ptr > (u32 *)(qinfo->q_array.align_virtual_addr + - qinfo->q_array.mem_size - sizeof(*read_ptr))) { - d_vpr_e("Invalid read index\n"); - return -ENODATA; - } - - packet_size_in_words = (*read_ptr) >> 2; - if (!packet_size_in_words) { - d_vpr_e("Zero packet size\n"); - return -ENODATA; - } - - new_read_idx = read_idx + packet_size_in_words; - if (((packet_size_in_words << 2) <= VIDC_IFACEQ_VAR_HUGE_PKT_SIZE) && - read_idx <= (qinfo->q_array.mem_size >> 2)) { - if (new_read_idx < (qinfo->q_array.mem_size >> 2)) { - memcpy(packet, read_ptr, - packet_size_in_words << 2); - } else { - new_read_idx -= (qinfo->q_array.mem_size >> 2); - memcpy(packet, read_ptr, - (packet_size_in_words - new_read_idx) << 2); - memcpy(packet + ((packet_size_in_words - - new_read_idx) << 2), - (u8 *)qinfo->q_array.align_virtual_addr, - new_read_idx << 2); - } - } else { - d_vpr_e("BAD packet received, read_idx: %#x, pkt_size: %d\n", - read_idx, packet_size_in_words << 2); - d_vpr_e("Dropping this packet\n"); - new_read_idx = write_idx; - rc = -ENODATA; - } - - queue->qhdr_rx_req = receive_request; - - queue->qhdr_read_idx = new_read_idx; - /* - * mb() to ensure qhdr is updated in main memory - * so that venus reads the updated header values - */ - mb(); - - *pb_tx_req_is_set = (queue->qhdr_tx_req == 1) ? 1 : 0; - - if ((msm_vidc_debug & VIDC_PKT) && - !(queue->qhdr_type & HFI_Q_ID_CTRL_TO_HOST_DEBUG_Q)) { - __dump_packet(packet, __func__, qinfo); - } - - return rc; -} - -/* Writes into cmdq without raising an interrupt */ -static int __iface_cmdq_write_relaxed(struct msm_vidc_core *core, - void *pkt, bool *requires_interrupt) -{ - struct msm_vidc_iface_q_info *q_info; - //struct vidc_hal_cmd_pkt_hdr *cmd_packet; - int rc = -E2BIG; - - if (!core || !pkt) { - d_vpr_e("%s: invalid params %pK %pK\n", - __func__, core, pkt); - return -EINVAL; - } - - rc = __strict_check(core, __func__); - if (rc) - return rc; - - if (!__core_in_valid_state(core)) { - d_vpr_e("%s: fw not in init state\n", __func__); - rc = -EINVAL; - goto err_q_null; - } - - //cmd_packet = (struct vidc_hal_cmd_pkt_hdr *)pkt; - //core->last_packet_type = cmd_packet->packet_type; - - q_info = &core->iface_queues[VIDC_IFACEQ_CMDQ_IDX]; - if (!q_info) { - d_vpr_e("cannot write to shared Q's\n"); - goto err_q_null; - } - - if (!q_info->q_array.align_virtual_addr) { - d_vpr_e("cannot write to shared CMD Q's\n"); - rc = -ENODATA; - goto err_q_null; - } - - rc = __resume(core); - if (rc) { - d_vpr_e("%s: Power on failed\n", __func__); - goto err_q_write; - } - - if (!__write_queue(q_info, (u8 *)pkt, requires_interrupt)) { - __schedule_power_collapse_work(core); - rc = 0; - } else { - d_vpr_e("__iface_cmdq_write: queue full\n"); - } - -err_q_write: -err_q_null: - return rc; -} - -int __iface_cmdq_write(struct msm_vidc_core *core, - void *pkt) -{ - bool needs_interrupt = false; - int rc = __iface_cmdq_write_relaxed(core, pkt, &needs_interrupt); - - if (!rc && needs_interrupt) - call_venus_op(core, raise_interrupt, core); - - return rc; -} - -static int __iface_cmdq_write_intr(struct msm_vidc_core *core, - void *pkt, bool allow) -{ - bool needs_interrupt = false; - int rc = __iface_cmdq_write_relaxed(core, pkt, &needs_interrupt); - - if (!rc && allow && needs_interrupt) - call_venus_op(core, raise_interrupt, core); - - return rc; -} - -int __iface_msgq_read(struct msm_vidc_core *core, void *pkt) -{ - u32 tx_req_is_set = 0; - int rc = 0; - struct msm_vidc_iface_q_info *q_info; - - if (!pkt) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - if (!__core_in_valid_state(core)) { - d_vpr_e("%s: fw not in init state\n", __func__); - rc = -EINVAL; - goto read_error_null; - } - - q_info = &core->iface_queues[VIDC_IFACEQ_MSGQ_IDX]; - if (!q_info->q_array.align_virtual_addr) { - d_vpr_e("cannot read from shared MSG Q's\n"); - rc = -ENODATA; - goto read_error_null; - } - - if (!__read_queue(q_info, (u8 *)pkt, &tx_req_is_set)) { - if (tx_req_is_set) { - //call_venus_op(core, raise_interrupt, core); - d_vpr_e("%s: queue is full\n", __func__); - rc = -EINVAL; - goto read_error_null; - } - rc = 0; - } else { - rc = -ENODATA; - } - -read_error_null: - return rc; -} - -int __iface_dbgq_read(struct msm_vidc_core *core, void *pkt) -{ - u32 tx_req_is_set = 0; - int rc = 0; - struct msm_vidc_iface_q_info *q_info; - - if (!pkt) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - q_info = &core->iface_queues[VIDC_IFACEQ_DBGQ_IDX]; - if (!q_info->q_array.align_virtual_addr) { - d_vpr_e("cannot read from shared DBG Q's\n"); - rc = -ENODATA; - goto dbg_error_null; - } - - if (!__read_queue(q_info, (u8 *)pkt, &tx_req_is_set)) { - if (tx_req_is_set) { - d_vpr_e("%s: queue is full\n", __func__); - //call_venus_op(core, raise_interrupt, core); - rc = -EINVAL; - goto dbg_error_null; - } - rc = 0; - } else { - rc = -ENODATA; - } - -dbg_error_null: - return rc; -} - static void __flush_debug_queue(struct msm_vidc_core *core, u8 *packet, u32 packet_size) { @@ -1124,7 +740,7 @@ static void __flush_debug_queue(struct msm_vidc_core *core, log_level |= FW_PRINTK; } - while (!__iface_dbgq_read(core, packet)) { + while (!venus_hfi_queue_dbg_read(core, packet)) { pkt = (struct hfi_debug_header *) packet; if (pkt->size < sizeof(struct hfi_debug_header)) { @@ -1154,6 +770,36 @@ static void __flush_debug_queue(struct msm_vidc_core *core, msm_vidc_vmem_free((void **)&packet); } +static int __cmdq_write(struct msm_vidc_core *core, void *pkt) +{ + int rc; + + rc = __resume(core); + if (rc) + return rc; + + rc = venus_hfi_queue_cmd_write(core, pkt); + if (!rc) + __schedule_power_collapse_work(core); + + return rc; +} + +static int __cmdq_write_intr(struct msm_vidc_core *core, void *pkt, bool allow_intr) +{ + int rc; + + rc = __resume(core); + if (rc) + return rc; + + rc = venus_hfi_queue_cmd_write_intr(core, pkt, allow_intr); + if (!rc) + __schedule_power_collapse_work(core); + + return rc; +} + static int __sys_set_debug(struct msm_vidc_core *core, u32 debug) { int rc = 0; @@ -1163,7 +809,7 @@ static int __sys_set_debug(struct msm_vidc_core *core, u32 debug) if (rc) goto exit; - rc = __iface_cmdq_write(core, core->packet); + rc = __cmdq_write(core, core->packet); if (rc) goto exit; @@ -1185,7 +831,7 @@ static int __sys_set_coverage(struct msm_vidc_core *core, return -ENOTEMPTY; } - //if (__iface_cmdq_write(core, pkt, sid)) { + //if (__cmdq_write(core, pkt, sid)) { // d_vpr_e("Failed to send coverage pkt to f/w\n"); // return -ENOTEMPTY; //} @@ -1208,7 +854,7 @@ static int __sys_set_power_control(struct msm_vidc_core *core, bool enable) if (rc) return rc; - rc = __iface_cmdq_write(core, core->packet); + rc = __cmdq_write(core, core->packet); if (rc) return rc; @@ -1228,7 +874,7 @@ int __prepare_pc(struct msm_vidc_core *core) goto err_pc_prep; } - if (__iface_cmdq_write(core, core->packet)) + if (__cmdq_write(core, core->packet)) rc = -ENOTEMPTY; if (rc) d_vpr_e("Failed to prepare venus for power off"); @@ -1336,7 +982,7 @@ static int __core_set_resource(struct msm_vidc_core *core, goto err_create_pkt; } - //rc = __iface_cmdq_write(core, core->packet); + //rc = __cmdq_write(core, core->packet); if (rc) rc = -ENOTEMPTY; @@ -1361,7 +1007,7 @@ static int __core_release_resource(struct msm_vidc_core *core, goto err_create_pkt; } - //rc = __iface_cmdq_write(core, core->packet); + //rc = __cmdq_write(core, core->packet); if (rc) rc = -ENOTEMPTY; @@ -1874,7 +1520,7 @@ static int __release_subcaches(struct msm_vidc_core *core) } /* Set resource to Venus for activated subcaches */ - rc = __iface_cmdq_write(core, core->packet); + rc = __cmdq_write(core, core->packet); if (rc) return rc; @@ -1995,7 +1641,7 @@ static int __set_subcaches(struct msm_vidc_core *core) } /* Set resource to Venus for activated subcaches */ - rc = __iface_cmdq_write(core, core->packet); + rc = __cmdq_write(core, core->packet); if (rc) goto err_fail_set_subacaches; @@ -2031,7 +1677,7 @@ static int __set_ubwc_config(struct msm_vidc_core *core) if (rc) return rc; - //rc = __iface_cmdq_write(core, core->packet)); + //rc = __cmdq_write(core, core->packet)); if (rc) return rc; @@ -2191,201 +1837,6 @@ err_venus_power_on: return rc; } -static void __set_queue_hdr_defaults(struct hfi_queue_header *q_hdr) -{ - q_hdr->qhdr_status = 0x1; - q_hdr->qhdr_type = VIDC_IFACEQ_DFLT_QHDR; - q_hdr->qhdr_q_size = VIDC_IFACEQ_QUEUE_SIZE / 4; - q_hdr->qhdr_pkt_size = 0; - q_hdr->qhdr_rx_wm = 0x1; - q_hdr->qhdr_tx_wm = 0x1; - q_hdr->qhdr_rx_req = 0x1; - q_hdr->qhdr_tx_req = 0x0; - q_hdr->qhdr_rx_irq_status = 0x0; - q_hdr->qhdr_tx_irq_status = 0x0; - q_hdr->qhdr_read_idx = 0x0; - q_hdr->qhdr_write_idx = 0x0; -} - -void venus_hfi_interface_queues_deinit(struct msm_vidc_core *core) -{ - int i; - - d_vpr_h("%s()\n", __func__); - - if (!core->iface_q_table.align_virtual_addr) { - d_vpr_h("%s: queues already deallocated\n", __func__); - return; - } - - msm_vidc_memory_unmap(core, &core->iface_q_table.map); - msm_vidc_memory_free(core, &core->iface_q_table.alloc); - msm_vidc_memory_unmap(core, &core->sfr.map); - msm_vidc_memory_free(core, &core->sfr.alloc); - - for (i = 0; i < VIDC_IFACEQ_NUMQ; i++) { - core->iface_queues[i].q_hdr = NULL; - core->iface_queues[i].q_array.align_virtual_addr = NULL; - core->iface_queues[i].q_array.align_device_addr = 0; - } - - core->iface_q_table.align_virtual_addr = NULL; - core->iface_q_table.align_device_addr = 0; - - core->sfr.align_virtual_addr = NULL; - core->sfr.align_device_addr = 0; -} - -static int venus_hfi_reset_queue_header(struct msm_vidc_core *core) -{ - struct msm_vidc_iface_q_info *iface_q; - struct hfi_queue_header *q_hdr; - int i, rc = 0; - - if (!core) { - d_vpr_e("%s: invalid param\n", __func__); - return -EINVAL; - } - - for (i = 0; i < VIDC_IFACEQ_NUMQ; i++) { - iface_q = &core->iface_queues[i]; - __set_queue_hdr_defaults(iface_q->q_hdr); - } - - iface_q = &core->iface_queues[VIDC_IFACEQ_CMDQ_IDX]; - q_hdr = iface_q->q_hdr; - q_hdr->qhdr_start_addr = iface_q->q_array.align_device_addr; - q_hdr->qhdr_type |= HFI_Q_ID_HOST_TO_CTRL_CMD_Q; - - iface_q = &core->iface_queues[VIDC_IFACEQ_MSGQ_IDX]; - q_hdr = iface_q->q_hdr; - q_hdr->qhdr_start_addr = iface_q->q_array.align_device_addr; - q_hdr->qhdr_type |= HFI_Q_ID_CTRL_TO_HOST_MSG_Q; - - iface_q = &core->iface_queues[VIDC_IFACEQ_DBGQ_IDX]; - q_hdr = iface_q->q_hdr; - q_hdr->qhdr_start_addr = iface_q->q_array.align_device_addr; - q_hdr->qhdr_type |= HFI_Q_ID_CTRL_TO_HOST_DEBUG_Q; - /* - * Set receive request to zero on debug queue as there is no - * need of interrupt from video hardware for debug messages - */ - q_hdr->qhdr_rx_req = 0; - - return rc; -} - -int venus_hfi_interface_queues_init(struct msm_vidc_core *core) -{ - int rc = 0; - struct hfi_queue_table_header *q_tbl_hdr; - struct msm_vidc_iface_q_info *iface_q; - struct msm_vidc_alloc alloc; - struct msm_vidc_map map; - int offset = 0; - u32 i; - - d_vpr_h("%s()\n", __func__); - - if (core->iface_q_table.align_virtual_addr) { - d_vpr_h("%s: queues already allocated\n", __func__); - venus_hfi_reset_queue_header(core); - return 0; - } - - memset(&alloc, 0, sizeof(alloc)); - alloc.type = MSM_VIDC_BUF_QUEUE; - alloc.region = MSM_VIDC_NON_SECURE; - alloc.size = TOTAL_QSIZE; - alloc.secure = false; - alloc.map_kernel = true; - rc = msm_vidc_memory_alloc(core, &alloc); - if (rc) { - d_vpr_e("%s: alloc failed\n", __func__); - goto fail_alloc_queue; - } - core->iface_q_table.align_virtual_addr = alloc.kvaddr; - core->iface_q_table.alloc = alloc; - - memset(&map, 0, sizeof(map)); - map.type = alloc.type; - map.region = alloc.region; - map.dmabuf = alloc.dmabuf; - rc = msm_vidc_memory_map(core, &map); - if (rc) { - d_vpr_e("%s: alloc failed\n", __func__); - goto fail_alloc_queue; - } - core->iface_q_table.align_device_addr = map.device_addr; - core->iface_q_table.map = map; - - core->iface_q_table.mem_size = VIDC_IFACEQ_TABLE_SIZE; - offset += core->iface_q_table.mem_size; - - for (i = 0; i < VIDC_IFACEQ_NUMQ; i++) { - iface_q = &core->iface_queues[i]; - iface_q->q_array.align_device_addr = map.device_addr + offset; - iface_q->q_array.align_virtual_addr = (void*)((char*)alloc.kvaddr + offset); - iface_q->q_array.mem_size = VIDC_IFACEQ_QUEUE_SIZE; - offset += iface_q->q_array.mem_size; - iface_q->q_hdr = VIDC_IFACEQ_GET_QHDR_START_ADDR( - core->iface_q_table.align_virtual_addr, i); - } - - q_tbl_hdr = (struct hfi_queue_table_header *) - core->iface_q_table.align_virtual_addr; - q_tbl_hdr->qtbl_version = 0; - q_tbl_hdr->device_addr = (void *)core; - strlcpy(q_tbl_hdr->name, "msm_v4l2_vidc", sizeof(q_tbl_hdr->name)); - q_tbl_hdr->qtbl_size = VIDC_IFACEQ_TABLE_SIZE; - q_tbl_hdr->qtbl_qhdr0_offset = sizeof(struct hfi_queue_table_header); - q_tbl_hdr->qtbl_qhdr_size = sizeof(struct hfi_queue_header); - q_tbl_hdr->qtbl_num_q = VIDC_IFACEQ_NUMQ; - q_tbl_hdr->qtbl_num_active_q = VIDC_IFACEQ_NUMQ; - - /* reset hfi queue header fields */ - rc = venus_hfi_reset_queue_header(core); - if (rc) { - d_vpr_e("%s: init queue header failed\n", __func__); - goto fail_alloc_queue; - } - - /* sfr buffer */ - memset(&alloc, 0, sizeof(alloc)); - alloc.type = MSM_VIDC_BUF_QUEUE; - alloc.region = MSM_VIDC_NON_SECURE; - alloc.size = ALIGNED_SFR_SIZE; - alloc.secure = false; - alloc.map_kernel = true; - rc = msm_vidc_memory_alloc(core, &alloc); - if (rc) { - d_vpr_e("%s: sfr alloc failed\n", __func__); - goto fail_alloc_queue; - } - core->sfr.align_virtual_addr = alloc.kvaddr; - core->sfr.alloc = alloc; - - memset(&map, 0, sizeof(map)); - map.type = alloc.type; - map.region = alloc.region; - map.dmabuf = alloc.dmabuf; - rc = msm_vidc_memory_map(core, &map); - if (rc) { - d_vpr_e("%s: sfr map failed\n", __func__); - goto fail_alloc_queue; - } - core->sfr.align_device_addr = map.device_addr; - core->sfr.map = map; - - core->sfr.mem_size = ALIGNED_SFR_SIZE; - /* write sfr buffer size in first word */ - *((u32 *)core->sfr.align_virtual_addr) = core->sfr.mem_size; - - return 0; -fail_alloc_queue: - return -ENOMEM; -} - static int __load_fw_to_memory(struct platform_device *pdev, const char *fw_name) { @@ -2594,7 +2045,7 @@ static int __response_handler(struct msm_vidc_core *core) } memset(core->response_packet, 0, core->packet_size); - while (!__iface_msgq_read(core, core->response_packet)) { + while (!venus_hfi_queue_msg_read(core, core->response_packet)) { rc = handle_response(core, core->response_packet); if (rc) continue; @@ -2712,7 +2163,7 @@ static int __sys_init(struct msm_vidc_core *core) if (rc) return rc; - rc = __iface_cmdq_write(core, core->packet); + rc = __cmdq_write(core, core->packet); if (rc) return rc; @@ -2727,7 +2178,7 @@ static int __sys_image_version(struct msm_vidc_core *core) if (rc) return rc; - rc = __iface_cmdq_write(core, core->packet); + rc = __cmdq_write(core, core->packet); if (rc) return rc; @@ -2748,7 +2199,7 @@ int venus_hfi_core_init(struct msm_vidc_core *core) if (rc) return rc; - rc = venus_hfi_interface_queues_init(core); + rc = venus_hfi_queue_init(core); if (rc) goto error; @@ -2909,7 +2360,7 @@ int venus_hfi_trigger_ssr(struct msm_vidc_core *core, u32 type, if (rc) goto exit; - rc = __iface_cmdq_write(core, core->packet); + rc = __cmdq_write(core, core->packet); if (rc) goto exit; @@ -2958,7 +2409,7 @@ int venus_hfi_trigger_stability(struct msm_vidc_inst *inst, u32 type, if (rc) goto unlock; - rc = __iface_cmdq_write(core, inst->packet); + rc = __cmdq_write(core, inst->packet); if (rc) goto unlock; @@ -3005,7 +2456,7 @@ int venus_hfi_reserve_hardware(struct msm_vidc_inst *inst, u32 duration) if (rc) goto unlock; - rc = __iface_cmdq_write(core, inst->packet); + rc = __cmdq_write(core, inst->packet); if (rc) goto unlock; @@ -3046,7 +2497,7 @@ int venus_hfi_session_open(struct msm_vidc_inst *inst) if (rc) goto unlock; - rc = __iface_cmdq_write(inst->core, inst->packet); + rc = __cmdq_write(inst->core, inst->packet); if (rc) goto unlock; @@ -3090,7 +2541,7 @@ int venus_hfi_session_set_codec(struct msm_vidc_inst *inst) if (rc) goto unlock; - rc = __iface_cmdq_write(inst->core, inst->packet); + rc = __cmdq_write(inst->core, inst->packet); if (rc) goto unlock; @@ -3134,7 +2585,7 @@ int venus_hfi_session_set_secure_mode(struct msm_vidc_inst *inst) if (rc) goto unlock; - rc = __iface_cmdq_write(inst->core, inst->packet); + rc = __cmdq_write(inst->core, inst->packet); if (rc) goto unlock; @@ -3220,7 +2671,7 @@ int venus_hfi_session_property(struct msm_vidc_inst *inst, goto unlock; } - rc = __iface_cmdq_write(inst->core, inst->packet); + rc = __cmdq_write(inst->core, inst->packet); if (rc) goto unlock; @@ -3259,7 +2710,7 @@ int venus_hfi_session_close(struct msm_vidc_inst *inst) if (rc) goto unlock; - rc = __iface_cmdq_write(inst->core, inst->packet); + rc = __cmdq_write(inst->core, inst->packet); if (rc) goto unlock; @@ -3302,7 +2753,7 @@ int venus_hfi_start(struct msm_vidc_inst *inst, enum msm_vidc_port_type port) if (rc) goto unlock; - rc = __iface_cmdq_write(inst->core, inst->packet); + rc = __cmdq_write(inst->core, inst->packet); if (rc) goto unlock; @@ -3346,7 +2797,7 @@ int venus_hfi_stop(struct msm_vidc_inst *inst, enum msm_vidc_port_type port) if (rc) goto unlock; - rc = __iface_cmdq_write(inst->core, inst->packet); + rc = __cmdq_write(inst->core, inst->packet); if (rc) goto unlock; @@ -3389,7 +2840,7 @@ int venus_hfi_session_pause(struct msm_vidc_inst *inst, enum msm_vidc_port_type if (rc) goto unlock; - rc = __iface_cmdq_write(inst->core, inst->packet); + rc = __cmdq_write(inst->core, inst->packet); if (rc) goto unlock; @@ -3433,7 +2884,7 @@ int venus_hfi_session_resume(struct msm_vidc_inst *inst, if (rc) goto unlock; - rc = __iface_cmdq_write(inst->core, inst->packet); + rc = __cmdq_write(inst->core, inst->packet); if (rc) goto unlock; @@ -3477,7 +2928,7 @@ int venus_hfi_session_drain(struct msm_vidc_inst *inst, enum msm_vidc_port_type if (rc) goto unlock; - rc = __iface_cmdq_write(inst->core, inst->packet); + rc = __cmdq_write(inst->core, inst->packet); if (rc) goto unlock; @@ -3523,7 +2974,7 @@ int venus_hfi_session_command(struct msm_vidc_inst *inst, if (rc) goto unlock; - rc = __iface_cmdq_write(inst->core, inst->packet); + rc = __cmdq_write(inst->core, inst->packet); if (rc) goto unlock; @@ -3637,7 +3088,8 @@ int venus_hfi_queue_super_buffer(struct msm_vidc_inst *inst, } /* Raise interrupt only for last pkt in the batch */ - rc = __iface_cmdq_write_intr(inst->core, inst->packet, (cnt == batch_size - 1)); + rc = __cmdq_write_intr(inst->core, inst->packet, + (cnt == batch_size - 1)); if (rc) goto unlock; @@ -3774,7 +3226,7 @@ int venus_hfi_queue_buffer(struct msm_vidc_inst *inst, if (rc) goto unlock; - rc = __iface_cmdq_write(inst->core, inst->packet); + rc = __cmdq_write(inst->core, inst->packet); if (rc) goto unlock; @@ -3827,7 +3279,7 @@ int venus_hfi_release_buffer(struct msm_vidc_inst *inst, if (rc) goto unlock; - rc = __iface_cmdq_write(inst->core, inst->packet); + rc = __cmdq_write(inst->core, inst->packet); if (rc) goto unlock; @@ -3941,7 +3393,7 @@ int venus_hfi_set_ir_period(struct msm_vidc_inst *inst, u32 ir_type, if (rc) goto exit; - rc = __iface_cmdq_write(inst->core, inst->packet); + rc = __cmdq_write(inst->core, inst->packet); if (rc) { i_vpr_e(inst, "%s: failed to set cap[%d] %s to fw\n", __func__, cap_id, cap_name(cap_id)); diff --git a/driver/vidc/src/venus_hfi_queue.c b/driver/vidc/src/venus_hfi_queue.c new file mode 100644 index 0000000000..a8b2e8aaf0 --- /dev/null +++ b/driver/vidc/src/venus_hfi_queue.c @@ -0,0 +1,612 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. + */ + /* Copyright (c) 2022. Qualcomm Innovation Center, Inc. All rights reserved. */ + +#include "venus_hfi_queue.h" +#include "msm_vidc_debug.h" +#include "msm_vidc_core.h" +#include "msm_vidc_memory.h" + +static int __strict_check(struct msm_vidc_core *core, const char *function) +{ + bool fatal = !mutex_is_locked(&core->lock); + + WARN_ON(fatal); + + if (fatal) + d_vpr_e("%s: strict check failed\n", function); + + return fatal ? -EINVAL : 0; +} + +static bool __core_in_valid_state(struct msm_vidc_core *core) +{ + return core->state != MSM_VIDC_CORE_DEINIT; +} + +static void __set_queue_hdr_defaults(struct hfi_queue_header *q_hdr) +{ + q_hdr->qhdr_status = 0x1; + q_hdr->qhdr_type = VIDC_IFACEQ_DFLT_QHDR; + q_hdr->qhdr_q_size = VIDC_IFACEQ_QUEUE_SIZE / 4; + q_hdr->qhdr_pkt_size = 0; + q_hdr->qhdr_rx_wm = 0x1; + q_hdr->qhdr_tx_wm = 0x1; + q_hdr->qhdr_rx_req = 0x1; + q_hdr->qhdr_tx_req = 0x0; + q_hdr->qhdr_rx_irq_status = 0x0; + q_hdr->qhdr_tx_irq_status = 0x0; + q_hdr->qhdr_read_idx = 0x0; + q_hdr->qhdr_write_idx = 0x0; +} + +static void __dump_packet(u8 *packet, const char *function, void *qinfo) +{ + u32 c = 0, session_id, packet_size = *(u32 *)packet; + const int row_size = 32; + /* + * row must contain enough for 0xdeadbaad * 8 to be converted into + * "de ad ba ab " * 8 + '\0' + */ + char row[3 * 32]; + session_id = *((u32 *)packet + 1); + + d_vpr_t("%08x: %s: %pK\n", session_id, function, qinfo); + + for (c = 0; c * row_size < packet_size; ++c) { + int bytes_to_read = ((c + 1) * row_size > packet_size) ? + packet_size % row_size : row_size; + hex_dump_to_buffer(packet + c * row_size, bytes_to_read, + row_size, 4, row, sizeof(row), false); + d_vpr_t("%08x: %s\n", session_id, row); + } +} + +static int __write_queue(struct msm_vidc_iface_q_info *qinfo, u8 *packet, + bool *rx_req_is_set) +{ + struct hfi_queue_header *queue; + u32 packet_size_in_words, new_write_idx; + u32 empty_space, read_idx, write_idx; + u32 *write_ptr; + + if (!qinfo || !packet) { + d_vpr_e("%s: invalid params %pK %pK\n", + __func__, qinfo, packet); + return -EINVAL; + } else if (!qinfo->q_array.align_virtual_addr) { + d_vpr_e("Queues have already been freed\n"); + return -EINVAL; + } + + queue = (struct hfi_queue_header *) qinfo->q_hdr; + if (!queue) { + d_vpr_e("queue not present\n"); + return -ENOENT; + } + + if (msm_vidc_debug & VIDC_PKT) + __dump_packet(packet, __func__, qinfo); + + // TODO: handle writing packet + //d_vpr_e("skip writing packet\n"); + //return 0; + + packet_size_in_words = (*(u32 *)packet) >> 2; + if (!packet_size_in_words || packet_size_in_words > + qinfo->q_array.mem_size>>2) { + d_vpr_e("Invalid packet size\n"); + return -ENODATA; + } + + read_idx = queue->qhdr_read_idx; + write_idx = queue->qhdr_write_idx; + + empty_space = (write_idx >= read_idx) ? + ((qinfo->q_array.mem_size>>2) - (write_idx - read_idx)) : + (read_idx - write_idx); + if (empty_space <= packet_size_in_words) { + queue->qhdr_tx_req = 1; + d_vpr_e("Insufficient size (%d) to write (%d)\n", + empty_space, packet_size_in_words); + return -ENOTEMPTY; + } + + queue->qhdr_tx_req = 0; + + new_write_idx = write_idx + packet_size_in_words; + write_ptr = (u32 *)((qinfo->q_array.align_virtual_addr) + + (write_idx << 2)); + if (write_ptr < (u32 *)qinfo->q_array.align_virtual_addr || + write_ptr > (u32 *)(qinfo->q_array.align_virtual_addr + + qinfo->q_array.mem_size)) { + d_vpr_e("Invalid write index\n"); + return -ENODATA; + } + + if (new_write_idx < (qinfo->q_array.mem_size >> 2)) { + memcpy(write_ptr, packet, packet_size_in_words << 2); + } else { + new_write_idx -= qinfo->q_array.mem_size >> 2; + memcpy(write_ptr, packet, (packet_size_in_words - + new_write_idx) << 2); + memcpy((void *)qinfo->q_array.align_virtual_addr, + packet + ((packet_size_in_words - new_write_idx) << 2), + new_write_idx << 2); + } + + /* + * Memory barrier to make sure packet is written before updating the + * write index + */ + mb(); + queue->qhdr_write_idx = new_write_idx; + if (rx_req_is_set) + *rx_req_is_set = true; + /* + * Memory barrier to make sure write index is updated before an + * interrupt is raised on venus. + */ + mb(); + return 0; +} + +static int __read_queue(struct msm_vidc_iface_q_info *qinfo, u8 *packet, + u32 *pb_tx_req_is_set) +{ + struct hfi_queue_header *queue; + u32 packet_size_in_words, new_read_idx; + u32 *read_ptr; + u32 receive_request = 0; + u32 read_idx, write_idx; + int rc = 0; + + if (!qinfo || !packet || !pb_tx_req_is_set) { + d_vpr_e("%s: invalid params %pK %pK %pK\n", + __func__, qinfo, packet, pb_tx_req_is_set); + return -EINVAL; + } else if (!qinfo->q_array.align_virtual_addr) { + d_vpr_e("Queues have already been freed\n"); + return -EINVAL; + } + + /* + * Memory barrier to make sure data is valid before + *reading it + */ + mb(); + queue = (struct hfi_queue_header *) qinfo->q_hdr; + + if (!queue) { + d_vpr_e("Queue memory is not allocated\n"); + return -ENOMEM; + } + + /* + * Do not set receive request for debug queue, if set, + * Venus generates interrupt for debug messages even + * when there is no response message available. + * In general debug queue will not become full as it + * is being emptied out for every interrupt from Venus. + * Venus will anyway generates interrupt if it is full. + */ + if (queue->qhdr_type & HFI_Q_ID_CTRL_TO_HOST_MSG_Q) + receive_request = 1; + + read_idx = queue->qhdr_read_idx; + write_idx = queue->qhdr_write_idx; + + if (read_idx == write_idx) { + queue->qhdr_rx_req = receive_request; + /* + * mb() to ensure qhdr is updated in main memory + * so that venus reads the updated header values + */ + mb(); + *pb_tx_req_is_set = 0; + d_vpr_l( + "%s queue is empty, rx_req = %u, tx_req = %u, read_idx = %u\n", + receive_request ? "message" : "debug", + queue->qhdr_rx_req, queue->qhdr_tx_req, + queue->qhdr_read_idx); + return -ENODATA; + } + + read_ptr = (u32 *)((qinfo->q_array.align_virtual_addr) + + (read_idx << 2)); + if (read_ptr < (u32 *)qinfo->q_array.align_virtual_addr || + read_ptr > (u32 *)(qinfo->q_array.align_virtual_addr + + qinfo->q_array.mem_size - sizeof(*read_ptr))) { + d_vpr_e("Invalid read index\n"); + return -ENODATA; + } + + packet_size_in_words = (*read_ptr) >> 2; + if (!packet_size_in_words) { + d_vpr_e("Zero packet size\n"); + return -ENODATA; + } + + new_read_idx = read_idx + packet_size_in_words; + if (((packet_size_in_words << 2) <= VIDC_IFACEQ_VAR_HUGE_PKT_SIZE) && + read_idx <= (qinfo->q_array.mem_size >> 2)) { + if (new_read_idx < (qinfo->q_array.mem_size >> 2)) { + memcpy(packet, read_ptr, + packet_size_in_words << 2); + } else { + new_read_idx -= (qinfo->q_array.mem_size >> 2); + memcpy(packet, read_ptr, + (packet_size_in_words - new_read_idx) << 2); + memcpy(packet + ((packet_size_in_words - + new_read_idx) << 2), + (u8 *)qinfo->q_array.align_virtual_addr, + new_read_idx << 2); + } + } else { + d_vpr_e("BAD packet received, read_idx: %#x, pkt_size: %d\n", + read_idx, packet_size_in_words << 2); + d_vpr_e("Dropping this packet\n"); + new_read_idx = write_idx; + rc = -ENODATA; + } + + queue->qhdr_rx_req = receive_request; + + queue->qhdr_read_idx = new_read_idx; + /* + * mb() to ensure qhdr is updated in main memory + * so that venus reads the updated header values + */ + mb(); + + *pb_tx_req_is_set = (queue->qhdr_tx_req == 1) ? 1 : 0; + + if ((msm_vidc_debug & VIDC_PKT) && + !(queue->qhdr_type & HFI_Q_ID_CTRL_TO_HOST_DEBUG_Q)) { + __dump_packet(packet, __func__, qinfo); + } + + return rc; +} + +/* Writes into cmdq without raising an interrupt */ +static int __iface_cmdq_write_relaxed(struct msm_vidc_core *core, + void *pkt, bool *requires_interrupt) +{ + struct msm_vidc_iface_q_info *q_info; + //struct vidc_hal_cmd_pkt_hdr *cmd_packet; + int rc = -E2BIG; + + if (!core || !pkt) { + d_vpr_e("%s: invalid params %pK %pK\n", + __func__, core, pkt); + return -EINVAL; + } + + rc = __strict_check(core, __func__); + if (rc) + return rc; + + if (!__core_in_valid_state(core)) { + d_vpr_e("%s: fw not in init state\n", __func__); + rc = -EINVAL; + goto err_q_null; + } + + //cmd_packet = (struct vidc_hal_cmd_pkt_hdr *)pkt; + //core->last_packet_type = cmd_packet->packet_type; + + q_info = &core->iface_queues[VIDC_IFACEQ_CMDQ_IDX]; + if (!q_info) { + d_vpr_e("cannot write to shared Q's\n"); + goto err_q_null; + } + + if (!q_info->q_array.align_virtual_addr) { + d_vpr_e("cannot write to shared CMD Q's\n"); + rc = -ENODATA; + goto err_q_null; + } + + if (!__write_queue(q_info, (u8 *)pkt, requires_interrupt)) { + rc = 0; + } else { + d_vpr_e("queue full\n"); + } + +err_q_null: + return rc; +} + +int venus_hfi_queue_cmd_write(struct msm_vidc_core *core, void *pkt) +{ + bool needs_interrupt = false; + int rc = __iface_cmdq_write_relaxed(core, pkt, &needs_interrupt); + + if (!rc && needs_interrupt) + call_venus_op(core, raise_interrupt, core); + + return rc; +} + +int venus_hfi_queue_cmd_write_intr(struct msm_vidc_core *core, void *pkt, + bool allow_intr) +{ + bool needs_interrupt = false; + int rc = __iface_cmdq_write_relaxed(core, pkt, &needs_interrupt); + + if (!rc && allow_intr && needs_interrupt) + call_venus_op(core, raise_interrupt, core); + + return rc; +} + +int venus_hfi_queue_msg_read(struct msm_vidc_core *core, void *pkt) +{ + u32 tx_req_is_set = 0; + int rc = 0; + struct msm_vidc_iface_q_info *q_info; + + if (!pkt) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (!__core_in_valid_state(core)) { + d_vpr_e("%s: fw not in init state\n", __func__); + rc = -EINVAL; + goto read_error_null; + } + + q_info = &core->iface_queues[VIDC_IFACEQ_MSGQ_IDX]; + if (!q_info->q_array.align_virtual_addr) { + d_vpr_e("cannot read from shared MSG Q's\n"); + rc = -ENODATA; + goto read_error_null; + } + + if (!__read_queue(q_info, (u8 *)pkt, &tx_req_is_set)) { + if (tx_req_is_set) { + //call_venus_op(core, raise_interrupt, core); + d_vpr_e("%s: queue is full\n", __func__); + rc = -EINVAL; + goto read_error_null; + } + rc = 0; + } else { + rc = -ENODATA; + } + +read_error_null: + return rc; +} + +int venus_hfi_queue_dbg_read(struct msm_vidc_core *core, void *pkt) +{ + u32 tx_req_is_set = 0; + int rc = 0; + struct msm_vidc_iface_q_info *q_info; + + if (!pkt) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + q_info = &core->iface_queues[VIDC_IFACEQ_DBGQ_IDX]; + if (!q_info->q_array.align_virtual_addr) { + d_vpr_e("cannot read from shared DBG Q's\n"); + rc = -ENODATA; + goto dbg_error_null; + } + + if (!__read_queue(q_info, (u8 *)pkt, &tx_req_is_set)) { + if (tx_req_is_set) { + d_vpr_e("%s: queue is full\n", __func__); + //call_venus_op(core, raise_interrupt, core); + rc = -EINVAL; + goto dbg_error_null; + } + rc = 0; + } else { + rc = -ENODATA; + } + +dbg_error_null: + return rc; +} + +void venus_hfi_queue_deinit(struct msm_vidc_core *core) +{ + int i; + + d_vpr_h("%s()\n", __func__); + + if (!core->iface_q_table.align_virtual_addr) { + d_vpr_h("%s: queues already deallocated\n", __func__); + return; + } + + msm_vidc_memory_unmap(core, &core->iface_q_table.map); + msm_vidc_memory_free(core, &core->iface_q_table.alloc); + msm_vidc_memory_unmap(core, &core->sfr.map); + msm_vidc_memory_free(core, &core->sfr.alloc); + + for (i = 0; i < VIDC_IFACEQ_NUMQ; i++) { + core->iface_queues[i].q_hdr = NULL; + core->iface_queues[i].q_array.align_virtual_addr = NULL; + core->iface_queues[i].q_array.align_device_addr = 0; + } + + core->iface_q_table.align_virtual_addr = NULL; + core->iface_q_table.align_device_addr = 0; + + core->sfr.align_virtual_addr = NULL; + core->sfr.align_device_addr = 0; +} + +int venus_hfi_reset_queue_header(struct msm_vidc_core *core) +{ + struct msm_vidc_iface_q_info *iface_q; + struct hfi_queue_header *q_hdr; + int i, rc = 0; + + if (!core) { + d_vpr_e("%s: invalid param\n", __func__); + return -EINVAL; + } + + for (i = 0; i < VIDC_IFACEQ_NUMQ; i++) { + iface_q = &core->iface_queues[i]; + __set_queue_hdr_defaults(iface_q->q_hdr); + } + + iface_q = &core->iface_queues[VIDC_IFACEQ_CMDQ_IDX]; + q_hdr = iface_q->q_hdr; + q_hdr->qhdr_start_addr = iface_q->q_array.align_device_addr; + q_hdr->qhdr_type |= HFI_Q_ID_HOST_TO_CTRL_CMD_Q; + + iface_q = &core->iface_queues[VIDC_IFACEQ_MSGQ_IDX]; + q_hdr = iface_q->q_hdr; + q_hdr->qhdr_start_addr = iface_q->q_array.align_device_addr; + q_hdr->qhdr_type |= HFI_Q_ID_CTRL_TO_HOST_MSG_Q; + + iface_q = &core->iface_queues[VIDC_IFACEQ_DBGQ_IDX]; + q_hdr = iface_q->q_hdr; + q_hdr->qhdr_start_addr = iface_q->q_array.align_device_addr; + q_hdr->qhdr_type |= HFI_Q_ID_CTRL_TO_HOST_DEBUG_Q; + /* + * Set receive request to zero on debug queue as there is no + * need of interrupt from video hardware for debug messages + */ + q_hdr->qhdr_rx_req = 0; + + return rc; +} + +int venus_hfi_queue_init(struct msm_vidc_core *core) +{ + int rc = 0; + struct hfi_queue_table_header *q_tbl_hdr; + struct hfi_queue_header *q_hdr; + struct msm_vidc_iface_q_info *iface_q; + struct msm_vidc_alloc alloc; + struct msm_vidc_map map; + int offset = 0; + u32 i; + + d_vpr_h("%s()\n", __func__); + + if (core->iface_q_table.align_virtual_addr) { + d_vpr_h("%s: queues already allocated\n", __func__); + venus_hfi_reset_queue_header(core); + return 0; + } + + memset(&alloc, 0, sizeof(alloc)); + alloc.type = MSM_VIDC_BUF_QUEUE; + alloc.region = MSM_VIDC_NON_SECURE; + alloc.size = TOTAL_QSIZE; + alloc.secure = false; + alloc.map_kernel = true; + rc = msm_vidc_memory_alloc(core, &alloc); + if (rc) { + d_vpr_e("%s: alloc failed\n", __func__); + goto fail_alloc_queue; + } + core->iface_q_table.align_virtual_addr = alloc.kvaddr; + core->iface_q_table.alloc = alloc; + + memset(&map, 0, sizeof(map)); + map.type = alloc.type; + map.region = alloc.region; + map.dmabuf = alloc.dmabuf; + rc = msm_vidc_memory_map(core, &map); + if (rc) { + d_vpr_e("%s: alloc failed\n", __func__); + goto fail_alloc_queue; + } + core->iface_q_table.align_device_addr = map.device_addr; + core->iface_q_table.map = map; + + core->iface_q_table.mem_size = VIDC_IFACEQ_TABLE_SIZE; + offset += core->iface_q_table.mem_size; + + for (i = 0; i < VIDC_IFACEQ_NUMQ; i++) { + iface_q = &core->iface_queues[i]; + iface_q->q_array.align_device_addr = map.device_addr + offset; + iface_q->q_array.align_virtual_addr = (void*)((char*)alloc.kvaddr + offset); + iface_q->q_array.mem_size = VIDC_IFACEQ_QUEUE_SIZE; + offset += iface_q->q_array.mem_size; + iface_q->q_hdr = VIDC_IFACEQ_GET_QHDR_START_ADDR( + core->iface_q_table.align_virtual_addr, i); + __set_queue_hdr_defaults(iface_q->q_hdr); + } + + q_tbl_hdr = (struct hfi_queue_table_header *) + core->iface_q_table.align_virtual_addr; + q_tbl_hdr->qtbl_version = 0; + q_tbl_hdr->device_addr = (void *)core; + strlcpy(q_tbl_hdr->name, "msm_v4l2_vidc", sizeof(q_tbl_hdr->name)); + q_tbl_hdr->qtbl_size = VIDC_IFACEQ_TABLE_SIZE; + q_tbl_hdr->qtbl_qhdr0_offset = sizeof(struct hfi_queue_table_header); + q_tbl_hdr->qtbl_qhdr_size = sizeof(struct hfi_queue_header); + q_tbl_hdr->qtbl_num_q = VIDC_IFACEQ_NUMQ; + q_tbl_hdr->qtbl_num_active_q = VIDC_IFACEQ_NUMQ; + + iface_q = &core->iface_queues[VIDC_IFACEQ_CMDQ_IDX]; + q_hdr = iface_q->q_hdr; + q_hdr->qhdr_start_addr = iface_q->q_array.align_device_addr; + q_hdr->qhdr_type |= HFI_Q_ID_HOST_TO_CTRL_CMD_Q; + + iface_q = &core->iface_queues[VIDC_IFACEQ_MSGQ_IDX]; + q_hdr = iface_q->q_hdr; + q_hdr->qhdr_start_addr = iface_q->q_array.align_device_addr; + q_hdr->qhdr_type |= HFI_Q_ID_CTRL_TO_HOST_MSG_Q; + + iface_q = &core->iface_queues[VIDC_IFACEQ_DBGQ_IDX]; + q_hdr = iface_q->q_hdr; + q_hdr->qhdr_start_addr = iface_q->q_array.align_device_addr; + q_hdr->qhdr_type |= HFI_Q_ID_CTRL_TO_HOST_DEBUG_Q; + /* + * Set receive request to zero on debug queue as there is no + * need of interrupt from video hardware for debug messages + */ + q_hdr->qhdr_rx_req = 0; + + /* sfr buffer */ + memset(&alloc, 0, sizeof(alloc)); + alloc.type = MSM_VIDC_BUF_QUEUE; + alloc.region = MSM_VIDC_NON_SECURE; + alloc.size = ALIGNED_SFR_SIZE; + alloc.secure = false; + alloc.map_kernel = true; + rc = msm_vidc_memory_alloc(core, &alloc); + if (rc) { + d_vpr_e("%s: sfr alloc failed\n", __func__); + goto fail_alloc_queue; + } + core->sfr.align_virtual_addr = alloc.kvaddr; + core->sfr.alloc = alloc; + + memset(&map, 0, sizeof(map)); + map.type = alloc.type; + map.region = alloc.region; + map.dmabuf = alloc.dmabuf; + rc = msm_vidc_memory_map(core, &map); + if (rc) { + d_vpr_e("%s: sfr map failed\n", __func__); + goto fail_alloc_queue; + } + core->sfr.align_device_addr = map.device_addr; + core->sfr.map = map; + + core->sfr.mem_size = ALIGNED_SFR_SIZE; + /* write sfr buffer size in first word */ + *((u32 *)core->sfr.align_virtual_addr) = core->sfr.mem_size; + + return 0; +fail_alloc_queue: + return -ENOMEM; +} From cca051abf4ce1d4c5059cc9ffc6216bef1ca38a4 Mon Sep 17 00:00:00 2001 From: Stanimir Varbanov Date: Tue, 7 Jun 2022 07:28:52 -0700 Subject: [PATCH 0707/1061] video-driver: Setup ucregion from boot_firmware op On all places ucregion setup is done just before calling boot_firmware, move setup in boot_firmware op and remove ucregion_setup op. Change-Id: I91a9a72d3b88eef91e82e19b9d8629e9731211f5 Signed-off-by: Stanimir Varbanov --- driver/variant/iris2/src/msm_vidc_iris2.c | 5 ++++- driver/variant/iris3/src/msm_vidc_iris3.c | 5 ++++- driver/vidc/inc/msm_vidc_core.h | 1 - driver/vidc/src/venus_hfi.c | 10 ---------- 4 files changed, 8 insertions(+), 13 deletions(-) diff --git a/driver/variant/iris2/src/msm_vidc_iris2.c b/driver/variant/iris2/src/msm_vidc_iris2.c index 9661eb900c..324d61f89f 100644 --- a/driver/variant/iris2/src/msm_vidc_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_iris2.c @@ -943,6 +943,10 @@ static int __boot_firmware_iris2(struct msm_vidc_core *vidc_core) return 0; } + rc = __setup_ucregion_memory_map_iris2(core); + if (rc) + return rc; + ctrl_init_val = BIT(0); rc = __write_register(core, CTRL_INIT_IRIS2, ctrl_init_val); @@ -1182,7 +1186,6 @@ static struct msm_vidc_venus_ops iris2_ops = { .interrupt_init = __interrupt_init_iris2, .raise_interrupt = __raise_interrupt_iris2, .clear_interrupt = __clear_interrupt_iris2, - .setup_ucregion_memmap = __setup_ucregion_memory_map_iris2, .clock_config_on_enable = NULL, .reset_ahb2axi_bridge = __reset_ahb2axi_bridge, .power_on = __power_on_iris2, diff --git a/driver/variant/iris3/src/msm_vidc_iris3.c b/driver/variant/iris3/src/msm_vidc_iris3.c index 4eea3813f0..3f62cb3394 100644 --- a/driver/variant/iris3/src/msm_vidc_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_iris3.c @@ -987,6 +987,10 @@ static int __boot_firmware_iris3(struct msm_vidc_core *vidc_core) return 0; } + rc = __setup_ucregion_memory_map_iris3(core); + if (rc) + return rc; + ctrl_init_val = BIT(0); rc = __write_register(core, CTRL_INIT_IRIS3, ctrl_init_val); @@ -1260,7 +1264,6 @@ static struct msm_vidc_venus_ops iris3_ops = { .interrupt_init = __interrupt_init_iris3, .raise_interrupt = __raise_interrupt_iris3, .clear_interrupt = __clear_interrupt_iris3, - .setup_ucregion_memmap = __setup_ucregion_memory_map_iris3, .clock_config_on_enable = NULL, .reset_ahb2axi_bridge = __reset_ahb2axi_bridge, .power_on = __power_on_iris3, diff --git a/driver/vidc/inc/msm_vidc_core.h b/driver/vidc/inc/msm_vidc_core.h index 0544d7780d..9f24108753 100644 --- a/driver/vidc/inc/msm_vidc_core.h +++ b/driver/vidc/inc/msm_vidc_core.h @@ -24,7 +24,6 @@ struct msm_vidc_venus_ops { int (*reset_ahb2axi_bridge)(struct msm_vidc_core *core); int (*clock_config_on_enable)(struct msm_vidc_core *core); int (*interrupt_init)(struct msm_vidc_core *core); - int (*setup_ucregion_memmap)(struct msm_vidc_core *core); int (*raise_interrupt)(struct msm_vidc_core *core); int (*clear_interrupt)(struct msm_vidc_core *core); int (*prepare_pc)(struct msm_vidc_core *core); diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index b166578667..6c9a8dea28 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -1797,8 +1797,6 @@ static int __resume(struct msm_vidc_core *core) */ __hand_off_regulators(core); - call_venus_op(core, setup_ucregion_memmap, core); - /* Wait for boot completion */ rc = call_venus_op(core, boot_firmware, core); if (rc) { @@ -1988,15 +1986,7 @@ int __load_fw(struct msm_vidc_core *core) __hand_off_regulators(core); trace_msm_v4l2_vidc_fw_load("END"); - /* configure interface_queues memory to firmware */ - rc = call_venus_op(core, setup_ucregion_memmap, core); - if (rc) { - d_vpr_e("%s: failed to setup ucregion\n"); - goto fail_setup_ucregion; - } - return rc; -fail_setup_ucregion: fail_protect_mem: if (core->dt->fw_cookie) qcom_scm_pas_shutdown(core->dt->fw_cookie); From b52b9fd3c1d95c6b6e5fc262326551063a45a948 Mon Sep 17 00:00:00 2001 From: Stanimir Varbanov Date: Wed, 8 Jun 2022 04:58:56 -0700 Subject: [PATCH 0708/1061] video-driver: Drop init_interrupt op The init_interrupt op is not used out of variant, lets remove the op and used the functions directly. Change-Id: I8f97cf503503b7f30e824843a5bd9d93c702241a Signed-off-by: Stanimir Varbanov --- driver/variant/iris2/src/msm_vidc_iris2.c | 3 +-- driver/variant/iris3/src/msm_vidc_iris3.c | 3 +-- driver/vidc/inc/msm_vidc_core.h | 1 - 3 files changed, 2 insertions(+), 5 deletions(-) diff --git a/driver/variant/iris2/src/msm_vidc_iris2.c b/driver/variant/iris2/src/msm_vidc_iris2.c index 324d61f89f..cb3235f289 100644 --- a/driver/variant/iris2/src/msm_vidc_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_iris2.c @@ -732,7 +732,7 @@ static int __power_on_iris2(struct msm_vidc_core *core) */ __set_registers(core); - call_venus_op(core, interrupt_init, core); + __interrupt_init_iris2(core); core->intr_status = 0; enable_irq(core->dt->irq); @@ -1183,7 +1183,6 @@ exit: static struct msm_vidc_venus_ops iris2_ops = { .boot_firmware = __boot_firmware_iris2, - .interrupt_init = __interrupt_init_iris2, .raise_interrupt = __raise_interrupt_iris2, .clear_interrupt = __clear_interrupt_iris2, .clock_config_on_enable = NULL, diff --git a/driver/variant/iris3/src/msm_vidc_iris3.c b/driver/variant/iris3/src/msm_vidc_iris3.c index 3f62cb3394..9c4f6b029f 100644 --- a/driver/variant/iris3/src/msm_vidc_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_iris3.c @@ -776,7 +776,7 @@ static int __power_on_iris3(struct msm_vidc_core *core) */ __set_registers(core); - call_venus_op(core, interrupt_init, core); + __interrupt_init_iris3(core); core->intr_status = 0; enable_irq(core->dt->irq); @@ -1261,7 +1261,6 @@ adjust: static struct msm_vidc_venus_ops iris3_ops = { .boot_firmware = __boot_firmware_iris3, - .interrupt_init = __interrupt_init_iris3, .raise_interrupt = __raise_interrupt_iris3, .clear_interrupt = __clear_interrupt_iris3, .clock_config_on_enable = NULL, diff --git a/driver/vidc/inc/msm_vidc_core.h b/driver/vidc/inc/msm_vidc_core.h index 9f24108753..d5753042b3 100644 --- a/driver/vidc/inc/msm_vidc_core.h +++ b/driver/vidc/inc/msm_vidc_core.h @@ -23,7 +23,6 @@ struct msm_vidc_venus_ops { int (*boot_firmware)(struct msm_vidc_core *core); int (*reset_ahb2axi_bridge)(struct msm_vidc_core *core); int (*clock_config_on_enable)(struct msm_vidc_core *core); - int (*interrupt_init)(struct msm_vidc_core *core); int (*raise_interrupt)(struct msm_vidc_core *core); int (*clear_interrupt)(struct msm_vidc_core *core); int (*prepare_pc)(struct msm_vidc_core *core); From a558b048082418447054a8cb7f4694b2fb5b20f5 Mon Sep 17 00:00:00 2001 From: Stanimir Varbanov Date: Wed, 8 Jun 2022 05:02:43 -0700 Subject: [PATCH 0709/1061] video-driver: Delete not used clock_config_on_enable op The operation is not used anywhere, delete it. Change-Id: I4fe7cd41d63ea1b1e0792de6b3e98757860629d8 Signed-off-by: Stanimir Varbanov --- driver/variant/iris2/src/msm_vidc_iris2.c | 1 - driver/variant/iris3/src/msm_vidc_iris3.c | 1 - driver/vidc/inc/msm_vidc_core.h | 1 - 3 files changed, 3 deletions(-) diff --git a/driver/variant/iris2/src/msm_vidc_iris2.c b/driver/variant/iris2/src/msm_vidc_iris2.c index cb3235f289..89e59ef36d 100644 --- a/driver/variant/iris2/src/msm_vidc_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_iris2.c @@ -1185,7 +1185,6 @@ static struct msm_vidc_venus_ops iris2_ops = { .boot_firmware = __boot_firmware_iris2, .raise_interrupt = __raise_interrupt_iris2, .clear_interrupt = __clear_interrupt_iris2, - .clock_config_on_enable = NULL, .reset_ahb2axi_bridge = __reset_ahb2axi_bridge, .power_on = __power_on_iris2, .power_off = __power_off_iris2, diff --git a/driver/variant/iris3/src/msm_vidc_iris3.c b/driver/variant/iris3/src/msm_vidc_iris3.c index 9c4f6b029f..54de3a2489 100644 --- a/driver/variant/iris3/src/msm_vidc_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_iris3.c @@ -1263,7 +1263,6 @@ static struct msm_vidc_venus_ops iris3_ops = { .boot_firmware = __boot_firmware_iris3, .raise_interrupt = __raise_interrupt_iris3, .clear_interrupt = __clear_interrupt_iris3, - .clock_config_on_enable = NULL, .reset_ahb2axi_bridge = __reset_ahb2axi_bridge, .power_on = __power_on_iris3, .power_off = __power_off_iris3, diff --git a/driver/vidc/inc/msm_vidc_core.h b/driver/vidc/inc/msm_vidc_core.h index d5753042b3..f64a852b2f 100644 --- a/driver/vidc/inc/msm_vidc_core.h +++ b/driver/vidc/inc/msm_vidc_core.h @@ -22,7 +22,6 @@ struct msm_vidc_core; struct msm_vidc_venus_ops { int (*boot_firmware)(struct msm_vidc_core *core); int (*reset_ahb2axi_bridge)(struct msm_vidc_core *core); - int (*clock_config_on_enable)(struct msm_vidc_core *core); int (*raise_interrupt)(struct msm_vidc_core *core); int (*clear_interrupt)(struct msm_vidc_core *core); int (*prepare_pc)(struct msm_vidc_core *core); From 8b003fb153467772c7ee4ccd4466b678598268b0 Mon Sep 17 00:00:00 2001 From: Stanimir Varbanov Date: Wed, 15 Jun 2022 02:55:42 -0700 Subject: [PATCH 0710/1061] video-driver: Abstract platform resources Move clocks, gdsc, bandwidth resources out of venus_hfi and use the ops in variant and venus_hfi code. Change-Id: I1be77c9d384f4eef2cb8085b75c39dc3fd3eeb86 Signed-off-by: Stanimir Varbanov --- Kbuild | 1 + driver/variant/iris2/src/msm_vidc_iris2.c | 257 +---- driver/variant/iris3/src/msm_vidc_iris3.c | 249 +---- driver/vidc/inc/msm_vidc_core.h | 3 +- driver/vidc/inc/msm_vidc_dt.h | 2 + driver/vidc/inc/resources.h | 35 + driver/vidc/inc/venus_hfi.h | 20 - driver/vidc/src/msm_vidc_probe.c | 14 + driver/vidc/src/resources.c | 1148 +++++++++++++++++++++ driver/vidc/src/venus_hfi.c | 910 +--------------- 10 files changed, 1301 insertions(+), 1338 deletions(-) create mode 100644 driver/vidc/inc/resources.h create mode 100644 driver/vidc/src/resources.c diff --git a/Kbuild b/Kbuild index 588dc20075..48829b6f02 100644 --- a/Kbuild +++ b/Kbuild @@ -67,6 +67,7 @@ msm_video-objs += driver/vidc/src/msm_vidc_v4l2.o \ driver/vidc/src/msm_vidc_power.o \ driver/vidc/src/msm_vidc_probe.o \ driver/vidc/src/msm_vidc_dt.o \ + driver/vidc/src/resources.o \ driver/vidc/src/msm_vidc_debug.o \ driver/vidc/src/msm_vidc_memory.o \ driver/vidc/src/msm_vidc_fence.o \ diff --git a/driver/variant/iris2/src/msm_vidc_iris2.c b/driver/variant/iris2/src/msm_vidc_iris2.c index 89e59ef36d..9085f939e2 100644 --- a/driver/variant/iris2/src/msm_vidc_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_iris2.c @@ -170,202 +170,6 @@ #define VCODEC_NOC_ERL_MAIN_ERRLOG3_LOW 0x00011238 #define VCODEC_NOC_ERL_MAIN_ERRLOG3_HIGH 0x0001123C - -static int __disable_unprepare_clock_iris2(struct msm_vidc_core *core, - const char *clk_name) -{ - int rc = 0; - struct clock_info *cl; - bool found; - - if (!core || !clk_name) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - found = false; - venus_hfi_for_each_clock(core, cl) { - if (!cl->clk) { - d_vpr_e("%s: invalid clock %s\n", __func__, cl->name); - return -EINVAL; - } - if (strcmp(cl->name, clk_name)) - continue; - found = true; - clk_disable_unprepare(cl->clk); - if (cl->has_scaling) - __set_clk_rate(core, cl, 0); - cl->prev = 0; - d_vpr_h("%s: clock %s disable unprepared\n", __func__, cl->name); - break; - } - if (!found) { - d_vpr_e("%s: clock %s not found\n", __func__, clk_name); - return -EINVAL; - } - - return rc; -} - -static int __prepare_enable_clock_iris2(struct msm_vidc_core *core, - const char *clk_name) -{ - int rc = 0; - struct clock_info *cl; - bool found; - u64 rate = 0; - - if (!core || !clk_name) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - found = false; - venus_hfi_for_each_clock(core, cl) { - if (!cl->clk) { - d_vpr_e("%s: invalid clock\n", __func__); - return -EINVAL; - } - if (strcmp(cl->name, clk_name)) - continue; - found = true; - /* - * For the clocks we control, set the rate prior to preparing - * them. Since we don't really have a load at this point, scale - * it to the lowest frequency possible - */ - if (cl->has_scaling) { - rate = clk_round_rate(cl->clk, 0); - /** - * source clock is already multipled with scaling ratio and __set_clk_rate - * attempts to multiply again. So divide scaling ratio before calling - * __set_clk_rate. - */ - rate = rate / MSM_VIDC_CLOCK_SOURCE_SCALING_RATIO; - __set_clk_rate(core, cl, rate); - } - - rc = clk_prepare_enable(cl->clk); - if (rc) { - d_vpr_e("%s: failed to enable clock %s\n", - __func__, cl->name); - return rc; - } - if (!__clk_is_enabled(cl->clk)) { - d_vpr_e("%s: clock %s not enabled\n", - __func__, cl->name); - clk_disable_unprepare(cl->clk); - if (cl->has_scaling) - __set_clk_rate(core, cl, 0); - return -EINVAL; - } - d_vpr_h("%s: clock %s prepare enabled\n", __func__, cl->name); - break; - } - if (!found) { - d_vpr_e("%s: clock %s not found\n", __func__, clk_name); - return -EINVAL; - } - - return rc; -} - -static int __disable_regulator_iris2(struct msm_vidc_core *core, - const char *reg_name) -{ - int rc = 0; - struct regulator_info *rinfo; - bool found; - - if (!core || !reg_name) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - found = false; - venus_hfi_for_each_regulator(core, rinfo) { - if (!rinfo->regulator) { - d_vpr_e("%s: invalid regulator %s\n", - __func__, rinfo->name); - return -EINVAL; - } - if (strcmp(rinfo->name, reg_name)) - continue; - found = true; - - rc = __acquire_regulator(core, rinfo); - if (rc) { - d_vpr_e("%s: failed to acquire %s, rc = %d\n", - __func__, rinfo->name, rc); - /* Bring attention to this issue */ - WARN_ON(true); - return rc; - } - core->handoff_done = false; - - rc = regulator_disable(rinfo->regulator); - if (rc) { - d_vpr_e("%s: failed to disable %s, rc = %d\n", - __func__, rinfo->name, rc); - return rc; - } - d_vpr_h("%s: disabled regulator %s\n", __func__, rinfo->name); - break; - } - if (!found) { - d_vpr_e("%s: regulator %s not found\n", __func__, reg_name); - return -EINVAL; - } - - return rc; -} - -static int __enable_regulator_iris2(struct msm_vidc_core *core, - const char *reg_name) -{ - int rc = 0; - struct regulator_info *rinfo; - bool found; - - if (!core || !reg_name) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - found = false; - venus_hfi_for_each_regulator(core, rinfo) { - if (!rinfo->regulator) { - d_vpr_e("%s: invalid regulator %s\n", - __func__, rinfo->name); - return -EINVAL; - } - if (strcmp(rinfo->name, reg_name)) - continue; - found = true; - - rc = regulator_enable(rinfo->regulator); - if (rc) { - d_vpr_e("%s: failed to enable %s, rc = %d\n", - __func__, rinfo->name, rc); - return rc; - } - if (!regulator_is_enabled(rinfo->regulator)) { - d_vpr_e("%s: regulator %s not enabled\n", - __func__, rinfo->name); - regulator_disable(rinfo->regulator); - return -EINVAL; - } - d_vpr_h("%s: enabled regulator %s\n", __func__, rinfo->name); - break; - } - if (!found) { - d_vpr_e("%s: regulator %s not found\n", __func__, reg_name); - return -EINVAL; - } - - return rc; -} - static int __interrupt_init_iris2(struct msm_vidc_core *vidc_core) { struct msm_vidc_core *core = vidc_core; @@ -445,6 +249,7 @@ static int __setup_ucregion_memory_map_iris2(struct msm_vidc_core *vidc_core) static int __power_off_iris2_hardware(struct msm_vidc_core *core) { + const struct msm_vidc_resources_ops *res_ops = core->res_ops; int rc = 0, i; u32 value = 0; @@ -517,12 +322,12 @@ static int __power_off_iris2_hardware(struct msm_vidc_core *core) disable_power: /* power down process */ - rc = __disable_regulator_iris2(core, "vcodec"); + rc = res_ops->gdsc_off(core, "vcodec"); if (rc) { d_vpr_e("%s: disable regulator vcodec failed\n", __func__); rc = 0; } - rc = __disable_unprepare_clock_iris2(core, "vcodec_clk"); + rc = res_ops->clk_disable(core, "vcodec_clk"); if (rc) { d_vpr_e("%s: disable unprepare vcodec_clk failed\n", __func__); rc = 0; @@ -533,6 +338,7 @@ disable_power: static int __power_off_iris2_controller(struct msm_vidc_core *core) { + const struct msm_vidc_resources_ops *res_ops = core->res_ops; int rc = 0; /* @@ -575,27 +381,27 @@ static int __power_off_iris2_controller(struct msm_vidc_core *core) d_vpr_h("%s: debug bridge release failed\n", __func__); /* Turn off MVP MVS0C core clock */ - rc = __disable_unprepare_clock_iris2(core, "core_clk"); + rc = res_ops->clk_disable(core, "core_clk"); if (rc) { d_vpr_e("%s: disable unprepare core_clk failed\n", __func__); rc = 0; } /* Disable GCC_VIDEO_AXI0_CLK clock */ - rc = __disable_unprepare_clock_iris2(core, "gcc_video_axi0"); + rc = res_ops->clk_disable(core, "gcc_video_axi0"); if (rc) { d_vpr_e("%s: disable unprepare gcc_video_axi0 failed\n", __func__); rc = 0; } - rc = call_venus_op(core, reset_ahb2axi_bridge, core); + rc = res_ops->reset_bridge(core); if (rc) { - d_vpr_e("%s: reset ahb2axi bridge failed\n", __func__); + d_vpr_e("%s: reset bridge failed\n", __func__); rc = 0; } /* power down process */ - rc = __disable_regulator_iris2(core, "iris-ctl"); + rc = res_ops->gdsc_off(core, "iris-ctl"); if (rc) { d_vpr_e("%s: disable regulator iris-ctl failed\n", __func__); rc = 0; @@ -606,6 +412,7 @@ static int __power_off_iris2_controller(struct msm_vidc_core *core) static int __power_off_iris2(struct msm_vidc_core *core) { + const struct msm_vidc_resources_ops *res_ops = core->res_ops; int rc = 0; if (!core || !core->capabilities) { @@ -620,7 +427,7 @@ static int __power_off_iris2(struct msm_vidc_core *core) * Reset video_cc_mvs0_clk_src value to resolve MMRM high video * clock projection issue. */ - rc = __set_clocks(core, 0); + rc = res_ops->set_clks(core, 0); if (rc) d_vpr_e("%s: resetting clocks failed\n", __func__); @@ -630,7 +437,7 @@ static int __power_off_iris2(struct msm_vidc_core *core) if (__power_off_iris2_controller(core)) d_vpr_e("%s: failed to power off controller\n", __func__); - if (__unvote_buses(core)) + if (res_ops->set_bw(core, 0, 0)) d_vpr_e("%s: failed to unvote buses\n", __func__); if (!(core->intr_status & WRAPPER_INTR_STATUS_A2HWD_BMSK_IRIS2)) @@ -644,64 +451,69 @@ static int __power_off_iris2(struct msm_vidc_core *core) static int __power_on_iris2_controller(struct msm_vidc_core *core) { + const struct msm_vidc_resources_ops *res_ops = core->res_ops; int rc = 0; - rc = __enable_regulator_iris2(core, "iris-ctl"); + rc = res_ops->gdsc_on(core, "iris-ctl"); if (rc) goto fail_regulator; - rc = call_venus_op(core, reset_ahb2axi_bridge, core); + rc = res_ops->reset_bridge(core); if (rc) goto fail_reset_ahb2axi; - rc = __prepare_enable_clock_iris2(core, "gcc_video_axi0"); + rc = res_ops->clk_enable(core, "gcc_video_axi0"); if (rc) goto fail_clk_axi; - rc = __prepare_enable_clock_iris2(core, "core_clk"); + rc = res_ops->clk_enable(core, "core_clk"); if (rc) goto fail_clk_controller; return 0; fail_clk_controller: - __disable_unprepare_clock_iris2(core, "gcc_video_axi0"); + res_ops->clk_disable(core, "gcc_video_axi0"); fail_clk_axi: fail_reset_ahb2axi: - __disable_regulator_iris2(core, "iris-ctl"); + res_ops->gdsc_off(core, "iris-ctl"); fail_regulator: return rc; } static int __power_on_iris2_hardware(struct msm_vidc_core *core) { + const struct msm_vidc_resources_ops *res_ops = core->res_ops; int rc = 0; - rc = __enable_regulator_iris2(core, "vcodec"); + rc = res_ops->gdsc_on(core, "vcodec"); if (rc) goto fail_regulator; - rc = __prepare_enable_clock_iris2(core, "vcodec_clk"); + rc = res_ops->clk_enable(core, "vcodec_clk"); if (rc) goto fail_clk_controller; return 0; fail_clk_controller: - __disable_regulator_iris2(core, "vcodec"); + res_ops->gdsc_off(core, "vcodec"); fail_regulator: return rc; } static int __power_on_iris2(struct msm_vidc_core *core) { + const struct msm_vidc_resources_ops *res_ops = core->res_ops; + struct allowed_clock_rates_table *clk_tbl; + u32 freq = 0; int rc = 0; if (core->power_enabled) return 0; /* Vote for all hardware resources */ - rc = __vote_buses(core, INT_MAX, INT_MAX); + rc = res_ops->set_bw(core, INT_MAX, INT_MAX); if (rc) { d_vpr_e("%s: failed to vote buses, rc %d\n", __func__, rc); goto fail_vote_buses; @@ -721,16 +533,23 @@ static int __power_on_iris2(struct msm_vidc_core *core) /* video controller and hardware powered on successfully */ core->power_enabled = true; - rc = __scale_clocks(core); + clk_tbl = core->dt->allowed_clks_tbl; + freq = core->power.clk_freq ? core->power.clk_freq : + clk_tbl[0].clock_rate; + + rc = res_ops->set_clks(core, freq); if (rc) { d_vpr_e("%s: failed to scale clocks\n", __func__); rc = 0; } + + core->power.clk_freq = freq; + /* * Re-program all of the registers that get reset as a result of * regulator_disable() and _enable() */ - __set_registers(core); + res_ops->set_regs(core); __interrupt_init_iris2(core); core->intr_status = 0; @@ -741,7 +560,7 @@ static int __power_on_iris2(struct msm_vidc_core *core) fail_power_on_hardware: __power_off_iris2_controller(core); fail_power_on_controller: - __unvote_buses(core); + res_ops->set_bw(core, 0, 0); fail_vote_buses: core->power_enabled = false; return rc; @@ -1185,7 +1004,6 @@ static struct msm_vidc_venus_ops iris2_ops = { .boot_firmware = __boot_firmware_iris2, .raise_interrupt = __raise_interrupt_iris2, .clear_interrupt = __clear_interrupt_iris2, - .reset_ahb2axi_bridge = __reset_ahb2axi_bridge, .power_on = __power_on_iris2, .power_off = __power_off_iris2, .prepare_pc = __prepare_pc_iris2, @@ -1214,6 +1032,7 @@ int msm_vidc_init_iris2(struct msm_vidc_core *core) d_vpr_h("%s()\n", __func__); core->venus_ops = &iris2_ops; core->session_ops = &msm_session_ops; + core->res_ops = get_resources_ops(); return 0; } diff --git a/driver/variant/iris3/src/msm_vidc_iris3.c b/driver/variant/iris3/src/msm_vidc_iris3.c index 54de3a2489..ae121df296 100644 --- a/driver/variant/iris3/src/msm_vidc_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_iris3.c @@ -176,202 +176,6 @@ #define VCODEC_NOC_ERL_MAIN_ERRLOG3_LOW 0x00011238 #define VCODEC_NOC_ERL_MAIN_ERRLOG3_HIGH 0x0001123C - -static int __disable_unprepare_clock_iris3(struct msm_vidc_core *core, - const char *clk_name) -{ - int rc = 0; - struct clock_info *cl; - bool found; - - if (!core || !clk_name) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - found = false; - venus_hfi_for_each_clock(core, cl) { - if (!cl->clk) { - d_vpr_e("%s: invalid clock %s\n", __func__, cl->name); - return -EINVAL; - } - if (strcmp(cl->name, clk_name)) - continue; - found = true; - clk_disable_unprepare(cl->clk); - if (cl->has_scaling) - __set_clk_rate(core, cl, 0); - cl->prev = 0; - d_vpr_h("%s: clock %s disable unprepared\n", __func__, cl->name); - break; - } - if (!found) { - d_vpr_e("%s: clock %s not found\n", __func__, clk_name); - return -EINVAL; - } - - return rc; -} - -static int __prepare_enable_clock_iris3(struct msm_vidc_core *core, - const char *clk_name) -{ - int rc = 0; - struct clock_info *cl; - bool found; - u64 rate = 0; - - if (!core || !clk_name) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - found = false; - venus_hfi_for_each_clock(core, cl) { - if (!cl->clk) { - d_vpr_e("%s: invalid clock\n", __func__); - return -EINVAL; - } - if (strcmp(cl->name, clk_name)) - continue; - found = true; - /* - * For the clocks we control, set the rate prior to preparing - * them. Since we don't really have a load at this point, scale - * it to the lowest frequency possible - */ - if (cl->has_scaling) { - rate = clk_round_rate(cl->clk, 0); - /** - * source clock is already multipled with scaling ratio and __set_clk_rate - * attempts to multiply again. So divide scaling ratio before calling - * __set_clk_rate. - */ - rate = rate / MSM_VIDC_CLOCK_SOURCE_SCALING_RATIO; - __set_clk_rate(core, cl, rate); - } - - rc = clk_prepare_enable(cl->clk); - if (rc) { - d_vpr_e("%s: failed to enable clock %s\n", - __func__, cl->name); - return rc; - } - if (!__clk_is_enabled(cl->clk)) { - d_vpr_e("%s: clock %s not enabled\n", - __func__, cl->name); - clk_disable_unprepare(cl->clk); - if (cl->has_scaling) - __set_clk_rate(core, cl, 0); - return -EINVAL; - } - d_vpr_h("%s: clock %s prepare enabled\n", __func__, cl->name); - break; - } - if (!found) { - d_vpr_e("%s: clock %s not found\n", __func__, clk_name); - return -EINVAL; - } - - return rc; -} - -static int __disable_regulator_iris3(struct msm_vidc_core *core, - const char *reg_name) -{ - int rc = 0; - struct regulator_info *rinfo; - bool found; - - if (!core || !reg_name) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - found = false; - venus_hfi_for_each_regulator(core, rinfo) { - if (!rinfo->regulator) { - d_vpr_e("%s: invalid regulator %s\n", - __func__, rinfo->name); - return -EINVAL; - } - if (strcmp(rinfo->name, reg_name)) - continue; - found = true; - - rc = __acquire_regulator(core, rinfo); - if (rc) { - d_vpr_e("%s: failed to acquire %s, rc = %d\n", - __func__, rinfo->name, rc); - /* Bring attention to this issue */ - WARN_ON(true); - return rc; - } - core->handoff_done = false; - - rc = regulator_disable(rinfo->regulator); - if (rc) { - d_vpr_e("%s: failed to disable %s, rc = %d\n", - __func__, rinfo->name, rc); - return rc; - } - d_vpr_h("%s: disabled regulator %s\n", __func__, rinfo->name); - break; - } - if (!found) { - d_vpr_e("%s: regulator %s not found\n", __func__, reg_name); - return -EINVAL; - } - - return rc; -} - -static int __enable_regulator_iris3(struct msm_vidc_core *core, - const char *reg_name) -{ - int rc = 0; - struct regulator_info *rinfo; - bool found; - - if (!core || !reg_name) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - found = false; - venus_hfi_for_each_regulator(core, rinfo) { - if (!rinfo->regulator) { - d_vpr_e("%s: invalid regulator %s\n", - __func__, rinfo->name); - return -EINVAL; - } - if (strcmp(rinfo->name, reg_name)) - continue; - found = true; - - rc = regulator_enable(rinfo->regulator); - if (rc) { - d_vpr_e("%s: failed to enable %s, rc = %d\n", - __func__, rinfo->name, rc); - return rc; - } - if (!regulator_is_enabled(rinfo->regulator)) { - d_vpr_e("%s: regulator %s not enabled\n", - __func__, rinfo->name); - regulator_disable(rinfo->regulator); - return -EINVAL; - } - d_vpr_h("%s: enabled regulator %s\n", __func__, rinfo->name); - break; - } - if (!found) { - d_vpr_e("%s: regulator %s not found\n", __func__, reg_name); - return -EINVAL; - } - - return rc; -} - static int __interrupt_init_iris3(struct msm_vidc_core *vidc_core) { struct msm_vidc_core *core = vidc_core; @@ -465,6 +269,7 @@ static bool is_iris3_hw_power_collapsed(struct msm_vidc_core *core) static int __power_off_iris3_hardware(struct msm_vidc_core *core) { + const struct msm_vidc_resources_ops *res_ops = core->res_ops; int rc = 0, i; u32 value = 0; bool pwr_collapsed = false; @@ -556,12 +361,13 @@ static int __power_off_iris3_hardware(struct msm_vidc_core *core) disable_power: /* power down process */ - rc = __disable_regulator_iris3(core, "vcodec"); + rc = res_ops->gdsc_off(core, "vcodec"); if (rc) { d_vpr_e("%s: disable regulator vcodec failed\n", __func__); rc = 0; } - rc = __disable_unprepare_clock_iris3(core, "vcodec_clk"); + + rc = res_ops->clk_disable(core, "vcodec_clk"); if (rc) { d_vpr_e("%s: disable unprepare vcodec_clk failed\n", __func__); rc = 0; @@ -572,6 +378,7 @@ disable_power: static int __power_off_iris3_controller(struct msm_vidc_core *core) { + const struct msm_vidc_resources_ops *res_ops = core->res_ops; int rc = 0; /* @@ -632,14 +439,14 @@ static int __power_off_iris3_controller(struct msm_vidc_core *core) return rc; /* Turn off MVP MVS0C core clock */ - rc = __disable_unprepare_clock_iris3(core, "core_clk"); + rc = res_ops->clk_disable(core, "core_clk"); if (rc) { d_vpr_e("%s: disable unprepare core_clk failed\n", __func__); rc = 0; } /* power down process */ - rc = __disable_regulator_iris3(core, "iris-ctl"); + rc = res_ops->gdsc_off(core, "iris-ctl"); if (rc) { d_vpr_e("%s: disable regulator iris-ctl failed\n", __func__); rc = 0; @@ -650,6 +457,7 @@ static int __power_off_iris3_controller(struct msm_vidc_core *core) static int __power_off_iris3(struct msm_vidc_core *core) { + const struct msm_vidc_resources_ops *res_ops = core->res_ops; int rc = 0; if (!core || !core->capabilities) { @@ -664,7 +472,7 @@ static int __power_off_iris3(struct msm_vidc_core *core) * Reset video_cc_mvs0_clk_src value to resolve MMRM high video * clock projection issue. */ - rc = __set_clocks(core, 0); + rc = res_ops->set_clks(core, 0); if (rc) d_vpr_e("%s: resetting clocks failed\n", __func__); @@ -674,7 +482,7 @@ static int __power_off_iris3(struct msm_vidc_core *core) if (__power_off_iris3_controller(core)) d_vpr_e("%s: failed to power off controller\n", __func__); - if (__unvote_buses(core)) + if (res_ops->set_bw(core, 0, 0)) d_vpr_e("%s: failed to unvote buses\n", __func__); if (!(core->intr_status & WRAPPER_INTR_STATUS_A2HWD_BMSK_IRIS3)) @@ -688,64 +496,69 @@ static int __power_off_iris3(struct msm_vidc_core *core) static int __power_on_iris3_controller(struct msm_vidc_core *core) { + const struct msm_vidc_resources_ops *res_ops = core->res_ops; int rc = 0; - rc = __enable_regulator_iris3(core, "iris-ctl"); + rc = res_ops->gdsc_on(core, "iris-ctl"); if (rc) goto fail_regulator; - rc = call_venus_op(core, reset_ahb2axi_bridge, core); + rc = res_ops->reset_bridge(core); if (rc) goto fail_reset_ahb2axi; - rc = __prepare_enable_clock_iris3(core, "gcc_video_axi0"); + rc = res_ops->clk_enable(core, "gcc_video_axi0"); if (rc) goto fail_clk_axi; - rc = __prepare_enable_clock_iris3(core, "core_clk"); + rc = res_ops->clk_enable(core, "core_clk"); if (rc) goto fail_clk_controller; return 0; fail_clk_controller: - __disable_unprepare_clock_iris3(core, "gcc_video_axi0"); + res_ops->clk_disable(core, "gcc_video_axi0"); fail_clk_axi: fail_reset_ahb2axi: - __disable_regulator_iris3(core, "iris-ctl"); + res_ops->gdsc_off(core, "iris-ctl"); fail_regulator: return rc; } static int __power_on_iris3_hardware(struct msm_vidc_core *core) { + const struct msm_vidc_resources_ops *res_ops = core->res_ops; int rc = 0; - rc = __enable_regulator_iris3(core, "vcodec"); + rc = res_ops->gdsc_on(core, "vcodec"); if (rc) goto fail_regulator; - rc = __prepare_enable_clock_iris3(core, "vcodec_clk"); + rc = res_ops->clk_enable(core, "vcodec_clk"); if (rc) goto fail_clk_controller; return 0; fail_clk_controller: - __disable_regulator_iris3(core, "vcodec"); + res_ops->gdsc_off(core, "vcodec"); fail_regulator: return rc; } static int __power_on_iris3(struct msm_vidc_core *core) { + const struct msm_vidc_resources_ops *res_ops = core->res_ops; + struct allowed_clock_rates_table *clk_tbl; + u32 freq = 0; int rc = 0; if (core->power_enabled) return 0; /* Vote for all hardware resources */ - rc = __vote_buses(core, INT_MAX, INT_MAX); + rc = res_ops->set_bw(core, INT_MAX, INT_MAX); if (rc) { d_vpr_e("%s: failed to vote buses, rc %d\n", __func__, rc); goto fail_vote_buses; @@ -765,7 +578,11 @@ static int __power_on_iris3(struct msm_vidc_core *core) /* video controller and hardware powered on successfully */ core->power_enabled = true; - rc = __scale_clocks(core); + clk_tbl = core->dt->allowed_clks_tbl; + freq = core->power.clk_freq ? core->power.clk_freq : + clk_tbl[0].clock_rate; + + rc = res_ops->set_clks(core, freq); if (rc) { d_vpr_e("%s: failed to scale clocks\n", __func__); rc = 0; @@ -774,7 +591,7 @@ static int __power_on_iris3(struct msm_vidc_core *core) * Re-program all of the registers that get reset as a result of * regulator_disable() and _enable() */ - __set_registers(core); + res_ops->set_regs(core); __interrupt_init_iris3(core); core->intr_status = 0; @@ -785,7 +602,7 @@ static int __power_on_iris3(struct msm_vidc_core *core) fail_power_on_hardware: __power_off_iris3_controller(core); fail_power_on_controller: - __unvote_buses(core); + res_ops->set_bw(core, 0, 0); fail_vote_buses: core->power_enabled = false; return rc; @@ -1263,7 +1080,6 @@ static struct msm_vidc_venus_ops iris3_ops = { .boot_firmware = __boot_firmware_iris3, .raise_interrupt = __raise_interrupt_iris3, .clear_interrupt = __clear_interrupt_iris3, - .reset_ahb2axi_bridge = __reset_ahb2axi_bridge, .power_on = __power_on_iris3, .power_off = __power_off_iris3, .prepare_pc = __prepare_pc_iris3, @@ -1292,6 +1108,7 @@ int msm_vidc_init_iris3(struct msm_vidc_core *core) d_vpr_h("%s()\n", __func__); core->venus_ops = &iris3_ops; core->session_ops = &msm_session_ops; + core->res_ops = get_resources_ops(); return 0; } diff --git a/driver/vidc/inc/msm_vidc_core.h b/driver/vidc/inc/msm_vidc_core.h index f64a852b2f..884ae61efa 100644 --- a/driver/vidc/inc/msm_vidc_core.h +++ b/driver/vidc/inc/msm_vidc_core.h @@ -10,6 +10,7 @@ #include "msm_vidc_internal.h" #include "venus_hfi_queue.h" +#include "resources.h" struct msm_vidc_core; @@ -21,7 +22,6 @@ struct msm_vidc_core; struct msm_vidc_venus_ops { int (*boot_firmware)(struct msm_vidc_core *core); - int (*reset_ahb2axi_bridge)(struct msm_vidc_core *core); int (*raise_interrupt)(struct msm_vidc_core *core); int (*clear_interrupt)(struct msm_vidc_core *core); int (*prepare_pc)(struct msm_vidc_core *core); @@ -108,6 +108,7 @@ struct msm_vidc_core { struct vb2_mem_ops *vb2_mem_ops; struct v4l2_m2m_ops *v4l2_m2m_ops; struct msm_vidc_venus_ops *venus_ops; + const struct msm_vidc_resources_ops *res_ops; struct msm_vidc_session_ops *session_ops; struct msm_vidc_memory_ops *mem_ops; struct media_device_ops *media_device_ops; diff --git a/driver/vidc/inc/msm_vidc_dt.h b/driver/vidc/inc/msm_vidc_dt.h index d0e31aa49b..6e8110b453 100644 --- a/driver/vidc/inc/msm_vidc_dt.h +++ b/driver/vidc/inc/msm_vidc_dt.h @@ -135,7 +135,9 @@ struct clock_info { bool has_scaling; bool has_mem_retention; u64 prev; +#ifdef CONFIG_MSM_MMRM struct mmrm_client *mmrm_client; +#endif }; struct clock_set { diff --git a/driver/vidc/inc/resources.h b/driver/vidc/inc/resources.h new file mode 100644 index 0000000000..b4a18a7432 --- /dev/null +++ b/driver/vidc/inc/resources.h @@ -0,0 +1,35 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) 2020-2022, The Linux Foundation. All rights reserved. + */ + +#ifndef _MSM_VIDC_RESOURCES_H_ +#define _MSM_VIDC_RESOURCES_H_ + +struct msm_vidc_core; + +struct msm_vidc_resources_ops { + int (*get)(struct msm_vidc_core *core); + void (*put)(struct msm_vidc_core *core); + + int (*reset_bridge)(struct msm_vidc_core *core); + + int (*gdsc_on)(struct msm_vidc_core *core, const char *name); + int (*gdsc_off)(struct msm_vidc_core *core, const char *name); + int (*gdsc_hw_ctrl)(struct msm_vidc_core *core); + int (*gdsc_sw_ctrl)(struct msm_vidc_core *core); + + int (*llcc)(struct msm_vidc_core *core, bool enable); + int (*set_bw)(struct msm_vidc_core *core, unsigned long bw_ddr, + unsigned long bw_llcc); + int (*set_clks)(struct msm_vidc_core *core, u64 rate); + + int (*clk_disable)(struct msm_vidc_core *core, const char *name); + int (*clk_enable)(struct msm_vidc_core *core, const char *name); + + int (*set_regs)(struct msm_vidc_core *core); +}; + +const struct msm_vidc_resources_ops *get_resources_ops(void); + +#endif diff --git a/driver/vidc/inc/venus_hfi.h b/driver/vidc/inc/venus_hfi.h index c3cfedb03c..a270b506a1 100644 --- a/driver/vidc/inc/venus_hfi.h +++ b/driver/vidc/inc/venus_hfi.h @@ -80,27 +80,7 @@ int __write_register(struct msm_vidc_core *core, int __read_register(struct msm_vidc_core *core, u32 reg, u32 *value); int __read_register_with_poll_timeout(struct msm_vidc_core *core, u32 reg, u32 mask, u32 exp_val, u32 sleep_us, u32 timeout_us); -int __set_clocks(struct msm_vidc_core *core, u32 freq); -int __scale_clocks(struct msm_vidc_core *core); -int __set_clk_rate(struct msm_vidc_core *core, - struct clock_info *cl, u64 rate); -int __acquire_regulator(struct msm_vidc_core *core, - struct regulator_info *rinfo); -int __unvote_buses(struct msm_vidc_core *core); -int __vote_buses(struct msm_vidc_core *core, unsigned long bw_ddr, - unsigned long bw_llcc); int __prepare_pc(struct msm_vidc_core *core); -int __set_registers(struct msm_vidc_core *core); - -int __reset_ahb2axi_bridge(struct msm_vidc_core *core); -int __clock_config_on_enable(struct msm_vidc_core *core); -int __interrupt_init(struct msm_vidc_core *core); -int __setup_ucregion_memmap(struct msm_vidc_core *core); -int __raise_interrupt(struct msm_vidc_core *core); -int __power_on(struct msm_vidc_core *core); -int __power_off(struct msm_vidc_core *core); bool __core_in_valid_state(struct msm_vidc_core *core); -int __load_fw(struct msm_vidc_core *core); -void __unload_fw(struct msm_vidc_core *core); #endif // _VENUS_HFI_H_ diff --git a/driver/vidc/src/msm_vidc_probe.c b/driver/vidc/src/msm_vidc_probe.c index 929ef55464..661141ee12 100644 --- a/driver/vidc/src/msm_vidc_probe.c +++ b/driver/vidc/src/msm_vidc_probe.c @@ -229,6 +229,7 @@ video_reg_failed: return rc; } +#ifdef CONFIG_MSM_MMRM static int msm_vidc_check_mmrm_support(struct msm_vidc_core *core) { int rc = 0; @@ -250,6 +251,19 @@ exit: d_vpr_h("%s: %d\n", __func__, core->capabilities[MMRM].value); return rc; } +#else +static int msm_vidc_check_mmrm_support(struct msm_vidc_core *core) +{ + if (!core || !core->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + core->capabilities[MMRM].value = 0; + + return 0; +} +#endif static int msm_vidc_deinitialize_core(struct msm_vidc_core *core) { diff --git a/driver/vidc/src/resources.c b/driver/vidc/src/resources.c new file mode 100644 index 0000000000..f758e1c246 --- /dev/null +++ b/driver/vidc/src/resources.c @@ -0,0 +1,1148 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. + */ +/* Copyright (c) 2022. Qualcomm Innovation Center, Inc. All rights reserved. */ + +#include +#include +#include + +#include "msm_vidc_core.h" +#include "msm_vidc_debug.h" +#include "msm_vidc_dt.h" +#include "msm_vidc_power.h" +#include "venus_hfi.h" + +/* Less than 50MBps is treated as trivial BW change */ +#define TRIVIAL_BW_THRESHOLD 50000 +#define TRIVIAL_BW_CHANGE(a, b) \ + ((a) > (b) ? (a) - (b) < TRIVIAL_BW_THRESHOLD : \ + (b) - (a) < TRIVIAL_BW_THRESHOLD) + +enum reset_state { + INIT = 1, + ASSERT, + DEASSERT, +}; + +static void __fatal_error(bool fatal) +{ + WARN_ON(fatal); +} + +static bool is_sys_cache_present(struct msm_vidc_core *core) +{ + return core->dt->sys_cache_present; +} + +static void __deinit_clocks(struct msm_vidc_core *core) +{ + struct clock_info *cl; + + core->power.clk_freq = 0; + venus_hfi_for_each_clock_reverse(core, cl) { + if (cl->clk) { + clk_put(cl->clk); + cl->clk = NULL; + } + } +} + +static int __init_clocks(struct msm_vidc_core *core) +{ + int rc = 0; + struct clock_info *cl = NULL; + + if (!core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + venus_hfi_for_each_clock(core, cl) { + d_vpr_h("%s: scalable? %d, count %d\n", + cl->name, cl->has_scaling, cl->count); + } + + venus_hfi_for_each_clock(core, cl) { + if (!cl->clk) { + cl->clk = clk_get(&core->pdev->dev, cl->name); + if (IS_ERR_OR_NULL(cl->clk)) { + d_vpr_e("Failed to get clock: %s\n", cl->name); + rc = PTR_ERR(cl->clk) ? + PTR_ERR(cl->clk) : -EINVAL; + cl->clk = NULL; + goto err_clk_get; + } + } + } + core->power.clk_freq = 0; + return 0; + +err_clk_get: + __deinit_clocks(core); + return rc; +} + +static int __handle_reset_clk(struct msm_vidc_core *core, + int reset_index, enum reset_state state) +{ + int rc = 0; + struct msm_vidc_dt *dt = core->dt; + struct reset_control *rst; + struct reset_set *rst_set = &dt->reset_set; + + if (!rst_set->reset_tbl) + return 0; + + rst = rst_set->reset_tbl[reset_index].rst; + d_vpr_h("reset_clk: name %s reset_state %d rst %pK\n", + rst_set->reset_tbl[reset_index].name, state, rst); + + switch (state) { + case INIT: + if (rst) + goto skip_reset_init; + + rst = devm_reset_control_get(&core->pdev->dev, + rst_set->reset_tbl[reset_index].name); + if (IS_ERR(rst)) + rc = PTR_ERR(rst); + + rst_set->reset_tbl[reset_index].rst = rst; + break; + case ASSERT: + if (!rst) { + rc = PTR_ERR(rst); + goto failed_to_reset; + } + + rc = reset_control_assert(rst); + break; + case DEASSERT: + if (!rst) { + rc = PTR_ERR(rst); + goto failed_to_reset; + } + rc = reset_control_deassert(rst); + break; + default: + d_vpr_e("%s: invalid reset request\n", __func__); + if (rc) + goto failed_to_reset; + } + + return 0; + +skip_reset_init: +failed_to_reset: + return rc; +} + +static int __reset_ahb2axi_bridge(struct msm_vidc_core *core) +{ + int rc, i; + + if (!core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + for (i = 0; i < core->dt->reset_set.count; i++) { + rc = __handle_reset_clk(core, i, ASSERT); + if (rc) { + d_vpr_e("failed to assert reset clocks\n"); + goto failed_to_reset; + } + + /* wait for deassert */ + usleep_range(1000, 1100); + } + + for (i = 0; i < core->dt->reset_set.count; i++) { + rc = __handle_reset_clk(core, i, DEASSERT); + if (rc) { + d_vpr_e("failed to deassert reset clocks\n"); + goto failed_to_reset; + } + } + + return 0; + +failed_to_reset: + return rc; +} + +static void __deinit_bus(struct msm_vidc_core *core) +{ + struct bus_info *bus = NULL; + + if (!core) + return; + + core->power.bw_ddr = 0; + core->power.bw_llcc = 0; + + venus_hfi_for_each_bus_reverse(core, bus) { + if (!bus->path) + continue; + icc_put(bus->path); + bus->path = NULL; + } +} + +static int __init_bus(struct msm_vidc_core *core) +{ + struct bus_info *bus = NULL; + int rc = 0; + + if (!core) { + d_vpr_e("%s: invalid param\n", __func__); + return -EINVAL; + } + + venus_hfi_for_each_bus(core, bus) { + if (!strcmp(bus->name, "venus-llcc")) { + if (msm_vidc_syscache_disable) { + d_vpr_h("Skipping LLC bus init: %s\n", + bus->name); + continue; + } + } + bus->path = of_icc_get(bus->dev, bus->name); + if (IS_ERR_OR_NULL(bus->path)) { + rc = PTR_ERR(bus->path) ? + PTR_ERR(bus->path) : -EBADHANDLE; + + d_vpr_e("Failed to register bus %s: %d\n", + bus->name, rc); + bus->path = NULL; + goto err_add_dev; + } + } + + return 0; + +err_add_dev: + __deinit_bus(core); + return rc; +} + +static int __acquire_regulator(struct msm_vidc_core *core, + struct regulator_info *rinfo) +{ + int rc = 0; + + if (!core || !rinfo) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (rinfo->has_hw_power_collapse) { + if (!rinfo->regulator) { + d_vpr_e("%s: invalid regulator\n", __func__); + rc = -EINVAL; + goto exit; + } + + if (regulator_get_mode(rinfo->regulator) == + REGULATOR_MODE_NORMAL) { + core->handoff_done = false; + d_vpr_h("Skip acquire regulator %s\n", rinfo->name); + goto exit; + } + + rc = regulator_set_mode(rinfo->regulator, + REGULATOR_MODE_NORMAL); + if (rc) { + /* + * This is somewhat fatal, but nothing we can do + * about it. We can't disable the regulator w/o + * getting it back under s/w control + */ + d_vpr_e("Failed to acquire regulator control: %s\n", + rinfo->name); + goto exit; + } else { + core->handoff_done = false; + d_vpr_h("Acquired regulator control from HW: %s\n", + rinfo->name); + + } + + if (!regulator_is_enabled(rinfo->regulator)) { + d_vpr_e("%s: Regulator is not enabled %s\n", + __func__, rinfo->name); + __fatal_error(true); + } + } + +exit: + return rc; +} + +static int __acquire_regulators(struct msm_vidc_core *core) +{ + int rc = 0; + struct regulator_info *rinfo; + + venus_hfi_for_each_regulator(core, rinfo) + __acquire_regulator(core, rinfo); + + return rc; +} + +static int __hand_off_regulator(struct msm_vidc_core *core, + struct regulator_info *rinfo) +{ + int rc = 0; + + if (rinfo->has_hw_power_collapse) { + if (!rinfo->regulator) { + d_vpr_e("%s: invalid regulator\n", __func__); + return -EINVAL; + } + + rc = regulator_set_mode(rinfo->regulator, + REGULATOR_MODE_FAST); + if (rc) { + d_vpr_e("Failed to hand off regulator control: %s\n", + rinfo->name); + return rc; + } else { + core->handoff_done = true; + d_vpr_h("Hand off regulator control to HW: %s\n", + rinfo->name); + } + + if (!regulator_is_enabled(rinfo->regulator)) { + d_vpr_e("%s: Regulator is not enabled %s\n", + __func__, rinfo->name); + __fatal_error(true); + } + } + + return rc; +} + +static int __hand_off_regulators(struct msm_vidc_core *core) +{ + struct regulator_info *rinfo; + int rc = 0, c = 0; + + venus_hfi_for_each_regulator(core, rinfo) { + rc = __hand_off_regulator(core, rinfo); + /* + * If one regulator hand off failed, driver should take + * the control for other regulators back. + */ + if (rc) + goto err_reg_handoff_failed; + c++; + } + + return rc; +err_reg_handoff_failed: + venus_hfi_for_each_regulator_reverse_continue(core, rinfo, c) + __acquire_regulator(core, rinfo); + + return rc; +} + +static int __disable_regulator(struct msm_vidc_core *core, const char *reg_name) +{ + int rc = 0; + struct regulator_info *rinfo; + bool found; + + if (!core || !reg_name) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + found = false; + venus_hfi_for_each_regulator(core, rinfo) { + if (!rinfo->regulator) { + d_vpr_e("%s: invalid regulator %s\n", + __func__, rinfo->name); + return -EINVAL; + } + if (strcmp(rinfo->name, reg_name)) + continue; + found = true; + + rc = __acquire_regulator(core, rinfo); + if (rc) { + d_vpr_e("%s: failed to acquire %s, rc = %d\n", + __func__, rinfo->name, rc); + /* Bring attention to this issue */ + WARN_ON(true); + return rc; + } + core->handoff_done = false; + + rc = regulator_disable(rinfo->regulator); + if (rc) { + d_vpr_e("%s: failed to disable %s, rc = %d\n", + __func__, rinfo->name, rc); + return rc; + } + d_vpr_h("%s: disabled regulator %s\n", __func__, rinfo->name); + break; + } + if (!found) { + d_vpr_e("%s: regulator %s not found\n", __func__, reg_name); + return -EINVAL; + } + + return rc; +} + +static int __enable_regulator(struct msm_vidc_core *core, const char *reg_name) +{ + int rc = 0; + struct regulator_info *rinfo; + bool found; + + if (!core || !reg_name) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + found = false; + venus_hfi_for_each_regulator(core, rinfo) { + if (!rinfo->regulator) { + d_vpr_e("%s: invalid regulator %s\n", + __func__, rinfo->name); + return -EINVAL; + } + if (strcmp(rinfo->name, reg_name)) + continue; + found = true; + + rc = regulator_enable(rinfo->regulator); + if (rc) { + d_vpr_e("%s: failed to enable %s, rc = %d\n", + __func__, rinfo->name, rc); + return rc; + } + if (!regulator_is_enabled(rinfo->regulator)) { + d_vpr_e("%s: regulator %s not enabled\n", + __func__, rinfo->name); + regulator_disable(rinfo->regulator); + return -EINVAL; + } + d_vpr_h("%s: enabled regulator %s\n", __func__, rinfo->name); + break; + } + if (!found) { + d_vpr_e("%s: regulator %s not found\n", __func__, reg_name); + return -EINVAL; + } + + return rc; +} + +static int __set_registers(struct msm_vidc_core *core) +{ + struct reg_set *reg_set; + int i, rc = 0; + + if (!core || !core->dt) { + d_vpr_e("core resources null, cannot set registers\n"); + return -EINVAL; + } + + reg_set = &core->dt->reg_set; + for (i = 0; i < reg_set->count; i++) { + rc = __write_register_masked(core, reg_set->reg_tbl[i].reg, + reg_set->reg_tbl[i].value, + reg_set->reg_tbl[i].mask); + if (rc) + return rc; + } + + return rc; +} + +#ifdef CONFIG_MSM_MMRM +static void __deregister_mmrm(struct msm_vidc_core *core) +{ + struct clock_info *cl; + + if (!core || !core->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return; + } + + if (!core->capabilities[MMRM].value) { + d_vpr_h("%s: MMRM not supported\n", __func__); + return; + } + + venus_hfi_for_each_clock(core, cl) { + if (cl->has_scaling && cl->mmrm_client) { + mmrm_client_deregister(cl->mmrm_client); + cl->mmrm_client = NULL; + } + } +} +#else +static void __deregister_mmrm(struct msm_vidc_core *core) +{ +} +#endif + +#ifdef CONFIG_MSM_MMRM +static int __register_mmrm(struct msm_vidc_core *core) +{ + int rc = 0; + struct clock_info *cl; + + if (!core ||!core->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (!core->capabilities[MMRM].value) { + d_vpr_h("%s: MMRM not supported\n", __func__); + return 0; + } + + venus_hfi_for_each_clock(core, cl) { + struct mmrm_client_desc desc; + char *name = (char *)desc.client_info.desc.name; + + // TODO: set notifier data vals + struct mmrm_client_notifier_data notifier_data = { + MMRM_CLIENT_RESOURCE_VALUE_CHANGE, + {{0, 0}}, + NULL}; + + // TODO: add callback fn + desc.notifier_callback_fn = NULL; + + if (!cl->has_scaling) + continue; + + if (IS_ERR_OR_NULL(cl->clk)) { + d_vpr_e("%s: Invalid clock: %s\n", __func__, cl->name); + rc = PTR_ERR(cl->clk) ? PTR_ERR(cl->clk) : -EINVAL; + goto err_register_mmrm; + } + + desc.client_type = MMRM_CLIENT_CLOCK; + desc.client_info.desc.client_domain = MMRM_CLIENT_DOMAIN_VIDEO; + desc.client_info.desc.client_id = cl->clk_id; + strlcpy(name, cl->name, sizeof(desc.client_info.desc.name)); + desc.client_info.desc.clk = cl->clk; + desc.priority = MMRM_CLIENT_PRIOR_LOW; + desc.pvt_data = notifier_data.pvt_data; + + d_vpr_h("%s: domain(%d) cid(%d) name(%s) clk(%pK)\n", + __func__, + desc.client_info.desc.client_domain, + desc.client_info.desc.client_id, + desc.client_info.desc.name, + desc.client_info.desc.clk); + + d_vpr_h("%s: type(%d) pri(%d) pvt(%pK) notifier(%pK)\n", + __func__, + desc.client_type, + desc.priority, + desc.pvt_data, + desc.notifier_callback_fn); + + cl->mmrm_client = mmrm_client_register(&desc); + if (!cl->mmrm_client) { + d_vpr_e("%s: Failed to register clk(%s): %d\n", + __func__, cl->name, rc); + rc = -EINVAL; + goto err_register_mmrm; + } + } + + return 0; + +err_register_mmrm: + __deregister_mmrm(core); + return rc; +} +#else +static int __register_mmrm(struct msm_vidc_core *core) +{ + return 0; +} +#endif + +static void __deinit_regulators(struct msm_vidc_core *core) +{ + struct regulator_info *rinfo = NULL; + + venus_hfi_for_each_regulator_reverse(core, rinfo) { + if (rinfo->regulator) { + regulator_put(rinfo->regulator); + rinfo->regulator = NULL; + } + } +} + +static int __init_regulators(struct msm_vidc_core *core) +{ + int rc = 0; + struct regulator_info *rinfo = NULL; + + venus_hfi_for_each_regulator(core, rinfo) { + rinfo->regulator = regulator_get(&core->pdev->dev, rinfo->name); + if (IS_ERR_OR_NULL(rinfo->regulator)) { + rc = PTR_ERR(rinfo->regulator) ? + PTR_ERR(rinfo->regulator) : -EBADHANDLE; + d_vpr_e("Failed to get regulator: %s\n", rinfo->name); + rinfo->regulator = NULL; + goto err_reg_get; + } + } + + return 0; + +err_reg_get: + __deinit_regulators(core); + return rc; +} + +static void __deinit_subcaches(struct msm_vidc_core *core) +{ + struct subcache_info *sinfo = NULL; + + if (!core) { + d_vpr_e("%s: invalid params\n", __func__); + goto exit; + } + + if (!is_sys_cache_present(core)) + goto exit; + + venus_hfi_for_each_subcache_reverse(core, sinfo) { + if (sinfo->subcache) { + d_vpr_h("deinit_subcaches: %s\n", sinfo->name); + llcc_slice_putd(sinfo->subcache); + sinfo->subcache = NULL; + } + } + +exit: + return; +} + +static int __init_subcaches(struct msm_vidc_core *core) +{ + int rc = 0; + struct subcache_info *sinfo = NULL; + + if (!core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (!is_sys_cache_present(core)) + return 0; + + venus_hfi_for_each_subcache(core, sinfo) { + if (!strcmp("vidsc0", sinfo->name)) { + sinfo->subcache = llcc_slice_getd(LLCC_VIDSC0); + } else if (!strcmp("vidsc1", sinfo->name)) { + sinfo->subcache = llcc_slice_getd(LLCC_VIDSC1); + } else if (!strcmp("vidscfw", sinfo->name)) { + sinfo->subcache = llcc_slice_getd(LLCC_VIDFW); + }else if (!strcmp("vidvsp", sinfo->name)) { +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5,15,0)) + sinfo->subcache = llcc_slice_getd(LLCC_VIDVSP); +#endif + } else { + d_vpr_e("Invalid subcache name %s\n", + sinfo->name); + } + if (IS_ERR_OR_NULL(sinfo->subcache)) { + rc = PTR_ERR(sinfo->subcache) ? + PTR_ERR(sinfo->subcache) : -EBADHANDLE; + d_vpr_e("init_subcaches: invalid subcache: %s rc %d\n", + sinfo->name, rc); + sinfo->subcache = NULL; + goto err_subcache_get; + } + d_vpr_h("init_subcaches: %s\n", sinfo->name); + } + + return 0; + +err_subcache_get: + __deinit_subcaches(core); + return rc; +} + +static int __disable_subcaches(struct msm_vidc_core *core) +{ + struct subcache_info *sinfo; + int rc = 0; + + if (msm_vidc_syscache_disable || !is_sys_cache_present(core)) + return 0; + + /* De-activate subcaches */ + venus_hfi_for_each_subcache_reverse(core, sinfo) { + if (sinfo->isactive) { + d_vpr_h("De-activate subcache %s\n", + sinfo->name); + rc = llcc_slice_deactivate(sinfo->subcache); + if (rc) { + d_vpr_e("Failed to de-activate %s: %d\n", + sinfo->name, rc); + } + sinfo->isactive = false; + } + } + + return 0; +} + +static int __enable_subcaches(struct msm_vidc_core *core) +{ + int rc = 0; + u32 c = 0; + struct subcache_info *sinfo; + + if (msm_vidc_syscache_disable || !is_sys_cache_present(core)) + return 0; + + /* Activate subcaches */ + venus_hfi_for_each_subcache(core, sinfo) { + rc = llcc_slice_activate(sinfo->subcache); + if (rc) { + d_vpr_e("Failed to activate %s: %d\n", sinfo->name, rc); + __fatal_error(true); + goto err_activate_fail; + } + sinfo->isactive = true; + d_vpr_h("Activated subcache %s\n", sinfo->name); + c++; + } + + d_vpr_h("Activated %d Subcaches to Venus\n", c); + + return 0; + +err_activate_fail: + __disable_subcaches(core); + return rc; +} + +static int llcc_enable(struct msm_vidc_core *core, bool enable) +{ + int ret; + + if (enable) + ret = __enable_subcaches(core); + else + ret = __disable_subcaches(core); + + return ret; +} + +static int __vote_bandwidth(struct bus_info *bus, unsigned long bw_kbps) +{ + int rc = 0; + + if (!bus->path) { + d_vpr_e("%s: invalid bus\n", __func__); + return -EINVAL; + } + + d_vpr_p("Voting bus %s to ab %lu kBps\n", bus->name, bw_kbps); + + rc = icc_set_bw(bus->path, bw_kbps, 0); + if (rc) + d_vpr_e("Failed voting bus %s to ab %lu, rc=%d\n", + bus->name, bw_kbps, rc); + + return rc; +} + +static int __unvote_buses(struct msm_vidc_core *core) +{ + int rc = 0; + struct bus_info *bus = NULL; + + if (!core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + core->power.bw_ddr = 0; + core->power.bw_llcc = 0; + + venus_hfi_for_each_bus(core, bus) { + rc = __vote_bandwidth(bus, 0); + if (rc) + goto err_unknown_device; + } + +err_unknown_device: + return rc; +} + +static int __vote_buses(struct msm_vidc_core *core, + unsigned long bw_ddr, unsigned long bw_llcc) +{ + int rc = 0; + struct bus_info *bus = NULL; + unsigned long bw_kbps = 0, bw_prev = 0; + enum vidc_bus_type type; + + if (!core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + venus_hfi_for_each_bus(core, bus) { + if (bus && bus->path) { + type = get_type_frm_name(bus->name); + + if (type == DDR) { + bw_kbps = bw_ddr; + bw_prev = core->power.bw_ddr; + } else if (type == LLCC) { + bw_kbps = bw_llcc; + bw_prev = core->power.bw_llcc; + } else { + bw_kbps = bus->range[1]; + bw_prev = core->power.bw_ddr ? + bw_kbps : 0; + } + + /* ensure freq is within limits */ + bw_kbps = clamp_t(typeof(bw_kbps), bw_kbps, + bus->range[0], bus->range[1]); + + if (TRIVIAL_BW_CHANGE(bw_kbps, bw_prev) && bw_prev) { + d_vpr_l("Skip voting bus %s to %lu kBps\n", + bus->name, bw_kbps); + continue; + } + + rc = __vote_bandwidth(bus, bw_kbps); + + if (type == DDR) + core->power.bw_ddr = bw_kbps; + else if (type == LLCC) + core->power.bw_llcc = bw_kbps; + } else { + d_vpr_e("No BUS to Vote\n"); + } + } + + return rc; +} + +static int set_bw(struct msm_vidc_core *core, unsigned long bw_ddr, + unsigned long bw_llcc) +{ + if (!bw_ddr && !bw_llcc) + return __unvote_buses(core); + + return __vote_buses(core, bw_ddr, bw_llcc); +} + +#ifdef CONFIG_MSM_MMRM +static int __set_clk_rate(struct msm_vidc_core *core, struct clock_info *cl, + u64 rate) +{ + int rc = 0; + struct mmrm_client_data client_data; + struct mmrm_client *client; + + /* not registered */ + if (!core || !cl || !core->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (core->capabilities[MMRM].value && !cl->mmrm_client) { + d_vpr_e("%s: invalid mmrm client\n", __func__); + return -EINVAL; + } + + /* + * This conversion is necessary since we are scaling clock values based on + * the branch clock. However, mmrm driver expects source clock to be registered + * and used for scaling. + * TODO: Remove this scaling if using source clock instead of branch clock. + */ + rate = rate * MSM_VIDC_CLOCK_SOURCE_SCALING_RATIO; + + /* bail early if requested clk rate is not changed */ + if (rate == cl->prev) + return 0; + + d_vpr_p("Scaling clock %s to %llu, prev %llu\n", cl->name, rate, cl->prev); + + if (core->capabilities[MMRM].value) { + /* set clock rate to mmrm driver */ + client = cl->mmrm_client; + memset(&client_data, 0, sizeof(client_data)); + client_data.num_hw_blocks = 1; + rc = mmrm_client_set_value(client, &client_data, rate); + if (rc) { + d_vpr_e("%s: Failed to set mmrm clock rate %llu %s: %d\n", + __func__, rate, cl->name, rc); + return rc; + } + } else { + /* set clock rate to clock driver */ + rc = clk_set_rate(cl->clk, rate); + if (rc) { + d_vpr_e("%s: Failed to set clock rate %llu %s: %d\n", + __func__, rate, cl->name, rc); + return rc; + } + } + cl->prev = rate; + return rc; +} +#else +static int __set_clk_rate(struct msm_vidc_core *core, struct clock_info *cl, + u64 rate) +{ + int rc = 0; + + /* not registered */ + if (!core || !cl || !core->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + /* + * This conversion is necessary since we are scaling clock values based on + * the branch clock. However, mmrm driver expects source clock to be registered + * and used for scaling. + * TODO: Remove this scaling if using source clock instead of branch clock. + */ + rate = rate * MSM_VIDC_CLOCK_SOURCE_SCALING_RATIO; + + /* bail early if requested clk rate is not changed */ + if (rate == cl->prev) + return 0; + + d_vpr_p("Scaling clock %s to %llu, prev %llu\n", cl->name, rate, cl->prev); + + rc = clk_set_rate(cl->clk, rate); + if (rc) { + d_vpr_e("%s: Failed to set clock rate %llu %s: %d\n", + __func__, rate, cl->name, rc); + return rc; + } + + cl->prev = rate; + + return rc; +} +#endif + +static int __set_clocks(struct msm_vidc_core *core, u64 freq) +{ + int rc = 0; + struct clock_info *cl; + + venus_hfi_for_each_clock(core, cl) { + if (cl->has_scaling) { + rc = __set_clk_rate(core, cl, freq); + if (rc) + return rc; + } + } + + return 0; +} + +static int __disable_unprepare_clock(struct msm_vidc_core *core, + const char *clk_name) +{ + int rc = 0; + struct clock_info *cl; + bool found; + + if (!core || !clk_name) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + found = false; + venus_hfi_for_each_clock(core, cl) { + if (!cl->clk) { + d_vpr_e("%s: invalid clock %s\n", __func__, cl->name); + return -EINVAL; + } + if (strcmp(cl->name, clk_name)) + continue; + found = true; + clk_disable_unprepare(cl->clk); + if (cl->has_scaling) + __set_clk_rate(core, cl, 0); + cl->prev = 0; + d_vpr_h("%s: clock %s disable unprepared\n", __func__, cl->name); + break; + } + if (!found) { + d_vpr_e("%s: clock %s not found\n", __func__, clk_name); + return -EINVAL; + } + + return rc; +} + +static int __prepare_enable_clock(struct msm_vidc_core *core, + const char *clk_name) +{ + int rc = 0; + struct clock_info *cl; + bool found; + u64 rate = 0; + + if (!core || !clk_name) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + found = false; + venus_hfi_for_each_clock(core, cl) { + if (!cl->clk) { + d_vpr_e("%s: invalid clock\n", __func__); + return -EINVAL; + } + if (strcmp(cl->name, clk_name)) + continue; + found = true; + /* + * For the clocks we control, set the rate prior to preparing + * them. Since we don't really have a load at this point, scale + * it to the lowest frequency possible + */ + if (cl->has_scaling) { + rate = clk_round_rate(cl->clk, 0); + /** + * source clock is already multipled with scaling ratio and __set_clk_rate + * attempts to multiply again. So divide scaling ratio before calling + * __set_clk_rate. + */ + rate = rate / MSM_VIDC_CLOCK_SOURCE_SCALING_RATIO; + __set_clk_rate(core, cl, rate); + } + + rc = clk_prepare_enable(cl->clk); + if (rc) { + d_vpr_e("%s: failed to enable clock %s\n", + __func__, cl->name); + return rc; + } + if (!__clk_is_enabled(cl->clk)) { + d_vpr_e("%s: clock %s not enabled\n", + __func__, cl->name); + clk_disable_unprepare(cl->clk); + if (cl->has_scaling) + __set_clk_rate(core, cl, 0); + return -EINVAL; + } + d_vpr_h("%s: clock %s prepare enabled\n", __func__, cl->name); + break; + } + if (!found) { + d_vpr_e("%s: clock %s not found\n", __func__, clk_name); + return -EINVAL; + } + + return rc; +} + +static int __init_resources(struct msm_vidc_core *core) +{ + int i, rc = 0; + + rc = __init_regulators(core); + if (rc) { + d_vpr_e("Failed to get all regulators\n"); + return -ENODEV; + } + + rc = __init_clocks(core); + if (rc) { + d_vpr_e("Failed to init clocks\n"); + rc = -ENODEV; + goto err_init_clocks; + } + + rc = __register_mmrm(core); + if (rc) { + d_vpr_e("Failed to register mmrm\n"); + rc = -ENODEV; + goto err_init_mmrm; + } + + for (i = 0; i < core->dt->reset_set.count; i++) { + rc = __handle_reset_clk(core, i, INIT); + if (rc) { + d_vpr_e("Failed to init reset clocks\n"); + rc = -ENODEV; + goto err_init_reset_clk; + } + } + + rc = __init_bus(core); + if (rc) { + d_vpr_e("Failed to init bus: %d\n", rc); + goto err_init_bus; + } + + rc = __init_subcaches(core); + if (rc) + d_vpr_e("Failed to init subcaches: %d\n", rc); + + return rc; + +err_init_reset_clk: +err_init_bus: + __deregister_mmrm(core); +err_init_mmrm: + __deinit_clocks(core); +err_init_clocks: + __deinit_regulators(core); + return rc; +} + +static void __deinit_resources(struct msm_vidc_core *core) +{ + __deinit_subcaches(core); + __deinit_bus(core); + __deregister_mmrm(core); + __deinit_clocks(core); + __deinit_regulators(core); +} + +static const struct msm_vidc_resources_ops res_ops = { + .get = __init_resources, + .put = __deinit_resources, + .reset_bridge = __reset_ahb2axi_bridge, + .gdsc_on = __enable_regulator, + .gdsc_off = __disable_regulator, + .gdsc_hw_ctrl = __hand_off_regulators, + .gdsc_sw_ctrl = __acquire_regulators, + .llcc = llcc_enable, + .set_bw = set_bw, + .set_clks = __set_clocks, + .clk_enable = __prepare_enable_clock, + .clk_disable = __disable_unprepare_clock, + .set_regs = __set_registers, +}; + +const struct msm_vidc_resources_ops *get_resources_ops(void) +{ + return &res_ops; +} diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index 6c9a8dea28..30a792cdd2 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -8,8 +8,6 @@ #include #include #include -#include -#include #include #include #include @@ -57,18 +55,6 @@ enum tzbsp_video_state { TZBSP_VIDEO_STATE_RESTORE_THRESHOLD = 2, }; -enum reset_state { - INIT = 1, - ASSERT, - DEASSERT, -}; - -/* Less than 50MBps is treated as trivial BW change */ -#define TRIVIAL_BW_THRESHOLD 50000 -#define TRIVIAL_BW_CHANGE(a, b) \ - ((a) > (b) ? (a) - (b) < TRIVIAL_BW_THRESHOLD : \ - (b) - (a) < TRIVIAL_BW_THRESHOLD) - /** * Utility function to enforce some of our assumptions. Spam calls to this * in hotspots in code to double check some of the assumptions that we hold. @@ -158,7 +144,7 @@ bool __core_in_valid_state(struct msm_vidc_core *core) return core->state != MSM_VIDC_CORE_DEINIT; } -bool is_sys_cache_present(struct msm_vidc_core *core) +static bool is_sys_cache_present(struct msm_vidc_core *core) { return core->dt->sys_cache_present; } @@ -365,244 +351,6 @@ static void __cancel_power_collapse_work(struct msm_vidc_core *core) cancel_delayed_work(&core->pm_work); } -int __acquire_regulator(struct msm_vidc_core *core, - struct regulator_info *rinfo) -{ - int rc = 0; - - if (!core || !rinfo) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - if (rinfo->has_hw_power_collapse) { - if (!rinfo->regulator) { - d_vpr_e("%s: invalid regulator\n", __func__); - rc = -EINVAL; - goto exit; - } - - if (regulator_get_mode(rinfo->regulator) == - REGULATOR_MODE_NORMAL) { - core->handoff_done = false; - d_vpr_h("Skip acquire regulator %s\n", rinfo->name); - goto exit; - } - - rc = regulator_set_mode(rinfo->regulator, - REGULATOR_MODE_NORMAL); - if (rc) { - /* - * This is somewhat fatal, but nothing we can do - * about it. We can't disable the regulator w/o - * getting it back under s/w control - */ - d_vpr_e("Failed to acquire regulator control: %s\n", - rinfo->name); - goto exit; - } else { - core->handoff_done = false; - d_vpr_h("Acquired regulator control from HW: %s\n", - rinfo->name); - - } - - if (!regulator_is_enabled(rinfo->regulator)) { - d_vpr_e("%s: Regulator is not enabled %s\n", - __func__, rinfo->name); - __fatal_error(true); - } - } - -exit: - return rc; -} - -static int __acquire_regulators(struct msm_vidc_core *core) -{ - int rc = 0; - struct regulator_info *rinfo; - - venus_hfi_for_each_regulator(core, rinfo) - __acquire_regulator(core, rinfo); - - return rc; -} - -static int __hand_off_regulator(struct msm_vidc_core *core, - struct regulator_info *rinfo) -{ - int rc = 0; - - if (rinfo->has_hw_power_collapse) { - if (!rinfo->regulator) { - d_vpr_e("%s: invalid regulator\n", __func__); - return -EINVAL; - } - - rc = regulator_set_mode(rinfo->regulator, - REGULATOR_MODE_FAST); - if (rc) { - d_vpr_e("Failed to hand off regulator control: %s\n", - rinfo->name); - return rc; - } else { - core->handoff_done = true; - d_vpr_h("Hand off regulator control to HW: %s\n", - rinfo->name); - } - - if (!regulator_is_enabled(rinfo->regulator)) { - d_vpr_e("%s: Regulator is not enabled %s\n", - __func__, rinfo->name); - __fatal_error(true); - } - } - - return rc; -} - -static int __hand_off_regulators(struct msm_vidc_core *core) -{ - struct regulator_info *rinfo; - int rc = 0, c = 0; - - venus_hfi_for_each_regulator(core, rinfo) { - rc = __hand_off_regulator(core, rinfo); - /* - * If one regulator hand off failed, driver should take - * the control for other regulators back. - */ - if (rc) - goto err_reg_handoff_failed; - c++; - } - - return rc; -err_reg_handoff_failed: - venus_hfi_for_each_regulator_reverse_continue(core, rinfo, c) - __acquire_regulator(core, rinfo); - - return rc; -} - -int __set_registers(struct msm_vidc_core *core) -{ - struct reg_set *reg_set; - int i, rc = 0; - - if (!core || !core->dt) { - d_vpr_e("core resources null, cannot set registers\n"); - return -EINVAL; - } - - reg_set = &core->dt->reg_set; - for (i = 0; i < reg_set->count; i++) { - rc = __write_register_masked(core, reg_set->reg_tbl[i].reg, - reg_set->reg_tbl[i].value, - reg_set->reg_tbl[i].mask); - if (rc) - return rc; - } - - return rc; -} - -static int __vote_bandwidth(struct bus_info *bus, - unsigned long bw_kbps) -{ - int rc = 0; - - if (!bus->path) { - d_vpr_e("%s: invalid bus\n", __func__); - return -EINVAL; - } - - d_vpr_p("Voting bus %s to ab %lu kBps\n", bus->name, bw_kbps); - rc = icc_set_bw(bus->path, bw_kbps, 0); - if (rc) - d_vpr_e("Failed voting bus %s to ab %lu, rc=%d\n", - bus->name, bw_kbps, rc); - - return rc; -} - -int __unvote_buses(struct msm_vidc_core *core) -{ - int rc = 0; - struct bus_info *bus = NULL; - - if (!core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - core->power.bw_ddr = 0; - core->power.bw_llcc = 0; - - venus_hfi_for_each_bus(core, bus) { - rc = __vote_bandwidth(bus, 0); - if (rc) - goto err_unknown_device; - } - -err_unknown_device: - return rc; -} - -int __vote_buses(struct msm_vidc_core *core, - unsigned long bw_ddr, unsigned long bw_llcc) -{ - int rc = 0; - struct bus_info *bus = NULL; - unsigned long bw_kbps = 0, bw_prev = 0; - enum vidc_bus_type type; - - if (!core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - venus_hfi_for_each_bus(core, bus) { - if (bus && bus->path) { - type = get_type_frm_name(bus->name); - - if (type == DDR) { - bw_kbps = bw_ddr; - bw_prev = core->power.bw_ddr; - } else if (type == LLCC) { - bw_kbps = bw_llcc; - bw_prev = core->power.bw_llcc; - } else { - bw_kbps = bus->range[1]; - bw_prev = core->power.bw_ddr ? - bw_kbps : 0; - } - - /* ensure freq is within limits */ - bw_kbps = clamp_t(typeof(bw_kbps), bw_kbps, - bus->range[0], bus->range[1]); - - if (TRIVIAL_BW_CHANGE(bw_kbps, bw_prev) && bw_prev) { - d_vpr_l("Skip voting bus %s to %lu kBps\n", - bus->name, bw_kbps); - continue; - } - - rc = __vote_bandwidth(bus, bw_kbps); - - if (type == DDR) - core->power.bw_ddr = bw_kbps; - else if (type == LLCC) - core->power.bw_llcc = bw_kbps; - } else { - d_vpr_e("No BUS to Vote\n"); - } - } - - return rc; -} - static int __tzbsp_set_video_state(enum tzbsp_video_state state) { int tzbsp_rsp = qcom_scm_set_remote_state(state, 0); @@ -617,101 +365,6 @@ static int __tzbsp_set_video_state(enum tzbsp_video_state state) return 0; } -int __set_clk_rate(struct msm_vidc_core *core, - struct clock_info *cl, u64 rate) -{ - int rc = 0; - struct mmrm_client_data client_data; - struct mmrm_client *client; - - /* not registered */ - if (!core || !cl || !core->capabilities) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - if (core->capabilities[MMRM].value && !cl->mmrm_client) { - d_vpr_e("%s: invalid mmrm client\n", __func__); - return -EINVAL; - } - - /* - * This conversion is necessary since we are scaling clock values based on - * the branch clock. However, mmrm driver expects source clock to be registered - * and used for scaling. - * TODO: Remove this scaling if using source clock instead of branch clock. - */ - rate = rate * MSM_VIDC_CLOCK_SOURCE_SCALING_RATIO; - - /* bail early if requested clk rate is not changed */ - if (rate == cl->prev) - return 0; - - d_vpr_p("Scaling clock %s to %llu, prev %llu\n", cl->name, rate, cl->prev); - - if (core->capabilities[MMRM].value) { - /* set clock rate to mmrm driver */ - client = cl->mmrm_client; - memset(&client_data, 0, sizeof(client_data)); - client_data.num_hw_blocks = 1; - rc = mmrm_client_set_value(client, &client_data, rate); - if (rc) { - d_vpr_e("%s: Failed to set mmrm clock rate %llu %s: %d\n", - __func__, rate, cl->name, rc); - return rc; - } - } else { - /* set clock rate to clock driver */ - rc = clk_set_rate(cl->clk, rate); - if (rc) { - d_vpr_e("%s: Failed to set clock rate %llu %s: %d\n", - __func__, rate, cl->name, rc); - return rc; - } - } - cl->prev = rate; - return rc; -} - -int __set_clocks(struct msm_vidc_core *core, u32 freq) -{ - int rc = 0; - struct clock_info *cl; - - venus_hfi_for_each_clock(core, cl) { - if (cl->has_scaling) {/* has_scaling */ - rc = __set_clk_rate(core, cl, freq); - if (rc) - return rc; - } - } - - return 0; -} - -int __scale_clocks(struct msm_vidc_core *core) -{ - int rc = 0; - struct allowed_clock_rates_table *allowed_clks_tbl; - u32 freq = 0; - - if (!core || !core->dt) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - allowed_clks_tbl = core->dt->allowed_clks_tbl; - freq = core->power.clk_freq ? core->power.clk_freq : - allowed_clks_tbl[0].clock_rate; - - rc = __set_clocks(core, freq); - if (rc) - return rc; - - core->power.clk_freq = freq; - return 0; -} - static void __flush_debug_queue(struct msm_vidc_core *core, u8 *packet, u32 packet_size) { @@ -1016,467 +669,6 @@ err_create_pkt: } #endif - - -static void __deinit_clocks(struct msm_vidc_core *core) -{ - struct clock_info *cl; - - core->power.clk_freq = 0; - venus_hfi_for_each_clock_reverse(core, cl) { - if (cl->clk) { - clk_put(cl->clk); - cl->clk = NULL; - } - } -} - -static int __init_clocks(struct msm_vidc_core *core) -{ - int rc = 0; - struct clock_info *cl = NULL; - - if (!core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - venus_hfi_for_each_clock(core, cl) { - d_vpr_h("%s: scalable? %d, count %d\n", - cl->name, cl->has_scaling, cl->count); - } - - venus_hfi_for_each_clock(core, cl) { - if (!cl->clk) { - cl->clk = clk_get(&core->pdev->dev, cl->name); - if (IS_ERR_OR_NULL(cl->clk)) { - d_vpr_e("Failed to get clock: %s\n", cl->name); - rc = PTR_ERR(cl->clk) ? - PTR_ERR(cl->clk) : -EINVAL; - cl->clk = NULL; - goto err_clk_get; - } - } - } - core->power.clk_freq = 0; - return 0; - -err_clk_get: - __deinit_clocks(core); - return rc; -} - -static void __deregister_mmrm(struct msm_vidc_core *core) -{ - struct clock_info *cl; - - if (!core || !core->capabilities) { - d_vpr_e("%s: invalid params\n", __func__); - return; - } - - if (!core->capabilities[MMRM].value) { - d_vpr_h("%s: MMRM not supported\n", __func__); - return; - } - - venus_hfi_for_each_clock(core, cl) { - if (cl->has_scaling && cl->mmrm_client) { - mmrm_client_deregister(cl->mmrm_client); - cl->mmrm_client = NULL; - } - } -} - -static int __register_mmrm(struct msm_vidc_core *core) -{ - int rc = 0; - struct clock_info *cl; - - if (!core ||!core->capabilities) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - if (!core->capabilities[MMRM].value) { - d_vpr_h("%s: MMRM not supported\n", __func__); - return 0; - } - - venus_hfi_for_each_clock(core, cl) { - struct mmrm_client_desc desc; - char *name = (char *)desc.client_info.desc.name; - - // TODO: set notifier data vals - struct mmrm_client_notifier_data notifier_data = { - MMRM_CLIENT_RESOURCE_VALUE_CHANGE, - {{0, 0}}, - NULL}; - - // TODO: add callback fn - desc.notifier_callback_fn = NULL; - - if (!cl->has_scaling) - continue; - - if (IS_ERR_OR_NULL(cl->clk)) { - d_vpr_e("%s: Invalid clock: %s\n", __func__, cl->name); - rc = PTR_ERR(cl->clk) ? PTR_ERR(cl->clk) : -EINVAL; - goto err_register_mmrm; - } - - desc.client_type = MMRM_CLIENT_CLOCK; - desc.client_info.desc.client_domain = MMRM_CLIENT_DOMAIN_VIDEO; - desc.client_info.desc.client_id = cl->clk_id; - strlcpy(name, cl->name, sizeof(desc.client_info.desc.name)); - desc.client_info.desc.clk = cl->clk; - desc.priority = MMRM_CLIENT_PRIOR_LOW; - desc.pvt_data = notifier_data.pvt_data; - - d_vpr_h("%s: domain(%d) cid(%d) name(%s) clk(%pK)\n", - __func__, - desc.client_info.desc.client_domain, - desc.client_info.desc.client_id, - desc.client_info.desc.name, - desc.client_info.desc.clk); - - d_vpr_h("%s: type(%d) pri(%d) pvt(%pK) notifier(%pK)\n", - __func__, - desc.client_type, - desc.priority, - desc.pvt_data, - desc.notifier_callback_fn); - - cl->mmrm_client = mmrm_client_register(&desc); - if (!cl->mmrm_client) { - d_vpr_e("%s: Failed to register clk(%s): %d\n", - __func__, cl->name, rc); - rc = -EINVAL; - goto err_register_mmrm; - } - } - - return 0; - -err_register_mmrm: - __deregister_mmrm(core); - return rc; -} - -static int __handle_reset_clk(struct msm_vidc_core *core, - int reset_index, enum reset_state state) -{ - int rc = 0; - struct msm_vidc_dt *dt = core->dt; - struct reset_control *rst; - struct reset_set *rst_set = &dt->reset_set; - - if (!rst_set->reset_tbl) - return 0; - - rst = rst_set->reset_tbl[reset_index].rst; - d_vpr_h("reset_clk: name %s reset_state %d rst %pK\n", - rst_set->reset_tbl[reset_index].name, state, rst); - - switch (state) { - case INIT: - if (rst) - goto skip_reset_init; - - rst = devm_reset_control_get(&core->pdev->dev, - rst_set->reset_tbl[reset_index].name); - if (IS_ERR(rst)) - rc = PTR_ERR(rst); - - rst_set->reset_tbl[reset_index].rst = rst; - break; - case ASSERT: - if (!rst) { - rc = PTR_ERR(rst); - goto failed_to_reset; - } - - rc = reset_control_assert(rst); - break; - case DEASSERT: - if (!rst) { - rc = PTR_ERR(rst); - goto failed_to_reset; - } - rc = reset_control_deassert(rst); - break; - default: - d_vpr_e("%s: invalid reset request\n", __func__); - if (rc) - goto failed_to_reset; - } - - return 0; - -skip_reset_init: -failed_to_reset: - return rc; -} - -int __reset_ahb2axi_bridge(struct msm_vidc_core *core) -{ - int rc, i; - - if (!core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - for (i = 0; i < core->dt->reset_set.count; i++) { - rc = __handle_reset_clk(core, i, ASSERT); - if (rc) { - d_vpr_e("failed to assert reset clocks\n"); - goto failed_to_reset; - } - - /* wait for deassert */ - usleep_range(1000, 1100); - } - - for (i = 0; i < core->dt->reset_set.count; i++) { - rc = __handle_reset_clk(core, i, DEASSERT); - if (rc) { - d_vpr_e("failed to deassert reset clocks\n"); - goto failed_to_reset; - } - } - - return 0; - -failed_to_reset: - return rc; -} - -static void __deinit_bus(struct msm_vidc_core *core) -{ - struct bus_info *bus = NULL; - - if (!core) - return; - - core->power.bw_ddr = 0; - core->power.bw_llcc = 0; - - venus_hfi_for_each_bus_reverse(core, bus) { - if (!bus->path) - continue; - icc_put(bus->path); - bus->path = NULL; - } -} - -static int __init_bus(struct msm_vidc_core *core) -{ - struct bus_info *bus = NULL; - int rc = 0; - - if (!core) { - d_vpr_e("%s: invalid param\n", __func__); - return -EINVAL; - } - - venus_hfi_for_each_bus(core, bus) { - if (!strcmp(bus->name, "venus-llcc")) { - if (msm_vidc_syscache_disable) { - d_vpr_h("Skipping LLC bus init: %s\n", - bus->name); - continue; - } - } - bus->path = of_icc_get(bus->dev, bus->name); - if (IS_ERR_OR_NULL(bus->path)) { - rc = PTR_ERR(bus->path) ? - PTR_ERR(bus->path) : -EBADHANDLE; - - d_vpr_e("Failed to register bus %s: %d\n", - bus->name, rc); - bus->path = NULL; - goto err_add_dev; - } - } - - return 0; - -err_add_dev: - __deinit_bus(core); - return rc; -} - -static void __deinit_regulators(struct msm_vidc_core *core) -{ - struct regulator_info *rinfo = NULL; - - venus_hfi_for_each_regulator_reverse(core, rinfo) { - if (rinfo->regulator) { - regulator_put(rinfo->regulator); - rinfo->regulator = NULL; - } - } -} - -static int __init_regulators(struct msm_vidc_core *core) -{ - int rc = 0; - struct regulator_info *rinfo = NULL; - - venus_hfi_for_each_regulator(core, rinfo) { - rinfo->regulator = regulator_get(&core->pdev->dev, - rinfo->name); - if (IS_ERR_OR_NULL(rinfo->regulator)) { - rc = PTR_ERR(rinfo->regulator) ? - PTR_ERR(rinfo->regulator) : -EBADHANDLE; - d_vpr_e("Failed to get regulator: %s\n", rinfo->name); - rinfo->regulator = NULL; - goto err_reg_get; - } - } - - return 0; - -err_reg_get: - __deinit_regulators(core); - return rc; -} - -static void __deinit_subcaches(struct msm_vidc_core *core) -{ - struct subcache_info *sinfo = NULL; - - if (!core) { - d_vpr_e("%s: invalid params\n", __func__); - goto exit; - } - - if (!is_sys_cache_present(core)) - goto exit; - - venus_hfi_for_each_subcache_reverse(core, sinfo) { - if (sinfo->subcache) { - d_vpr_h("deinit_subcaches: %s\n", sinfo->name); - llcc_slice_putd(sinfo->subcache); - sinfo->subcache = NULL; - } - } - -exit: - return; -} - -static int __init_subcaches(struct msm_vidc_core *core) -{ - int rc = 0; - struct subcache_info *sinfo = NULL; - - if (!core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - if (!is_sys_cache_present(core)) - return 0; - - venus_hfi_for_each_subcache(core, sinfo) { - if (!strcmp("vidsc0", sinfo->name)) { - sinfo->subcache = llcc_slice_getd(LLCC_VIDSC0); - } else if (!strcmp("vidsc1", sinfo->name)) { - sinfo->subcache = llcc_slice_getd(LLCC_VIDSC1); - } else if (!strcmp("vidscfw", sinfo->name)) { - sinfo->subcache = llcc_slice_getd(LLCC_VIDFW); - } else if (!strcmp("vidvsp", sinfo->name)) { -#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5,15,0)) - sinfo->subcache = llcc_slice_getd(LLCC_VIDVSP); -#endif - } else { - d_vpr_e("Invalid subcache name %s\n", - sinfo->name); - } - if (IS_ERR_OR_NULL(sinfo->subcache)) { - rc = PTR_ERR(sinfo->subcache) ? - PTR_ERR(sinfo->subcache) : -EBADHANDLE; - d_vpr_e("init_subcaches: invalid subcache: %s rc %d\n", - sinfo->name, rc); - sinfo->subcache = NULL; - goto err_subcache_get; - } - d_vpr_h("init_subcaches: %s\n", sinfo->name); - } - - return 0; - -err_subcache_get: - __deinit_subcaches(core); - return rc; -} - -static int __init_resources(struct msm_vidc_core *core) -{ - int i, rc = 0; - - rc = __init_regulators(core); - if (rc) { - d_vpr_e("Failed to get all regulators\n"); - return -ENODEV; - } - - rc = __init_clocks(core); - if (rc) { - d_vpr_e("Failed to init clocks\n"); - rc = -ENODEV; - goto err_init_clocks; - } - - rc = __register_mmrm(core); - if (rc) { - d_vpr_e("Failed to register mmrm\n"); - rc = -ENODEV; - goto err_init_mmrm; - } - - for (i = 0; i < core->dt->reset_set.count; i++) { - rc = __handle_reset_clk(core, i, INIT); - if (rc) { - d_vpr_e("Failed to init reset clocks\n"); - rc = -ENODEV; - goto err_init_reset_clk; - } - } - - rc = __init_bus(core); - if (rc) { - d_vpr_e("Failed to init bus: %d\n", rc); - goto err_init_bus; - } - - rc = __init_subcaches(core); - if (rc) - d_vpr_e("Failed to init subcaches: %d\n", rc); - - return rc; - -err_init_reset_clk: -err_init_bus: - __deregister_mmrm(core); -err_init_mmrm: - __deinit_clocks(core); -err_init_clocks: - __deinit_regulators(core); - return rc; -} - -static void __deinit_resources(struct msm_vidc_core *core) -{ - __deinit_subcaches(core); - __deinit_bus(core); - __deregister_mmrm(core); - __deinit_clocks(core); - __deinit_regulators(core); -} - static int __release_subcaches(struct msm_vidc_core *core) { int rc = 0; @@ -1538,66 +730,9 @@ static int __release_subcaches(struct msm_vidc_core *core) return 0; } -static int __disable_subcaches(struct msm_vidc_core *core) -{ - struct subcache_info *sinfo; - int rc = 0; - - if (msm_vidc_syscache_disable || !is_sys_cache_present(core)) - return 0; - - /* De-activate subcaches */ - venus_hfi_for_each_subcache_reverse(core, sinfo) { - if (sinfo->isactive) { - d_vpr_h("De-activate subcache %s\n", - sinfo->name); - rc = llcc_slice_deactivate(sinfo->subcache); - if (rc) { - d_vpr_e("Failed to de-activate %s: %d\n", - sinfo->name, rc); - } - sinfo->isactive = false; - } - } - - return 0; -} - -static int __enable_subcaches(struct msm_vidc_core *core) -{ - int rc = 0; - u32 c = 0; - struct subcache_info *sinfo; - - if (msm_vidc_syscache_disable || !is_sys_cache_present(core)) - return 0; - - /* Activate subcaches */ - venus_hfi_for_each_subcache(core, sinfo) { - rc = llcc_slice_activate(sinfo->subcache); - if (rc) { - d_vpr_e("Failed to activate %s: %d\n", - sinfo->name, rc); - __fatal_error(true); - goto err_activate_fail; - } - sinfo->isactive = true; - d_vpr_h("Activated subcache %s\n", sinfo->name); - c++; - } - - d_vpr_h("Activated %d Subcaches to Venus\n", c); - - return 0; - -err_activate_fail: - __release_subcaches(core); - __disable_subcaches(core); - return rc; -} - static int __set_subcaches(struct msm_vidc_core *core) { + const struct msm_vidc_resources_ops *res_ops = core->res_ops; int rc = 0; struct subcache_info *sinfo; struct hfi_buffer buf; @@ -1659,7 +794,7 @@ static int __set_subcaches(struct msm_vidc_core *core) return 0; err_fail_set_subacaches: - __disable_subcaches(core); + res_ops->llcc(core, false); return rc; } @@ -1722,6 +857,7 @@ static int __venus_power_on(struct msm_vidc_core *core) static int __suspend(struct msm_vidc_core *core) { + const struct msm_vidc_resources_ops *res_ops = core->res_ops; int rc = 0; if (!core) { @@ -1744,7 +880,7 @@ static int __suspend(struct msm_vidc_core *core) goto err_tzbsp_suspend; } - __disable_subcaches(core); + res_ops->llcc(core, false); __venus_power_off(core); d_vpr_h("Venus power off\n"); @@ -1756,6 +892,7 @@ err_tzbsp_suspend: static int __resume(struct msm_vidc_core *core) { + const struct msm_vidc_resources_ops *res_ops = core->res_ops; int rc = 0; if (!core) { @@ -1795,7 +932,7 @@ static int __resume(struct msm_vidc_core *core) * (s/w triggered) to fast (HW triggered) unless the h/w vote is * present. */ - __hand_off_regulators(core); + res_ops->gdsc_hw_ctrl(core); /* Wait for boot completion */ rc = call_venus_op(core, boot_firmware, core); @@ -1806,7 +943,7 @@ static int __resume(struct msm_vidc_core *core) __sys_set_debug(core, (msm_vidc_debug & FW_LOGMASK) >> FW_LOGSHIFT); - rc = __enable_subcaches(core); + rc = res_ops->llcc(core, true); if (rc) { d_vpr_e("Failed to activate subcache\n"); goto err_reset_core; @@ -1816,7 +953,7 @@ static int __resume(struct msm_vidc_core *core) rc = __sys_set_power_control(core, true); if (rc) { d_vpr_e("%s: set power control failed\n", __func__); - __acquire_regulators(core); + res_ops->gdsc_sw_ctrl(core); rc = 0; } @@ -1939,6 +1076,7 @@ exit: int __load_fw(struct msm_vidc_core *core) { + const struct msm_vidc_resources_ops *res_ops = core->res_ops; int rc = 0; d_vpr_h("%s\n", __func__); @@ -1947,9 +1085,9 @@ int __load_fw(struct msm_vidc_core *core) core->cpu_watchdog = false; trace_msm_v4l2_vidc_fw_load("START"); - rc = __init_resources(core); + rc = res_ops->get(core); if (rc) { - d_vpr_e("%s: Failed to init resources: %d\n", __func__, rc); + d_vpr_e("%s: Failed to get resources: %d\n", __func__, rc); goto fail_init_res; } @@ -1983,7 +1121,7 @@ int __load_fw(struct msm_vidc_core *core) * (s/w triggered) to fast (HW triggered) unless the h/w vote is * present. */ - __hand_off_regulators(core); + res_ops->gdsc_hw_ctrl(core); trace_msm_v4l2_vidc_fw_load("END"); return rc; @@ -1994,7 +1132,7 @@ fail_protect_mem: fail_load_fw: __venus_power_off(core); fail_venus_power_on: - __deinit_resources(core); + res_ops->put(core); fail_init_res: trace_msm_v4l2_vidc_fw_load("END"); return rc; @@ -2002,6 +1140,7 @@ fail_init_res: void __unload_fw(struct msm_vidc_core *core) { + const struct msm_vidc_resources_ops *res_ops = core->res_ops; int rc = 0; if (!core->dt->fw_cookie) @@ -2015,7 +1154,7 @@ void __unload_fw(struct msm_vidc_core *core) core->dt->fw_cookie = 0; __venus_power_off(core); - __deinit_resources(core); + res_ops->put(core); core->cpu_watchdog = false; @@ -2177,6 +1316,7 @@ static int __sys_image_version(struct msm_vidc_core *core) int venus_hfi_core_init(struct msm_vidc_core *core) { + const struct msm_vidc_resources_ops *res_ops = core->res_ops; int rc = 0; if (!core) { @@ -2201,7 +1341,7 @@ int venus_hfi_core_init(struct msm_vidc_core *core) if (rc) goto error; - rc = __enable_subcaches(core); + rc = res_ops->llcc(core, true); if (rc) goto error; @@ -2224,7 +1364,7 @@ int venus_hfi_core_init(struct msm_vidc_core *core) rc = __sys_set_power_control(core, true); if (rc) { d_vpr_e("%s: set power control failed\n", __func__); - __acquire_regulators(core); + res_ops->gdsc_sw_ctrl(core); rc = 0; } @@ -2238,6 +1378,7 @@ error: int venus_hfi_core_deinit(struct msm_vidc_core *core, bool force) { + const struct msm_vidc_resources_ops *res_ops = core->res_ops; int rc = 0; if (!core) { @@ -2253,7 +1394,8 @@ int venus_hfi_core_deinit(struct msm_vidc_core *core, bool force) return 0; __resume(core); __flush_debug_queue(core, (!force ? core->packet : NULL), core->packet_size); - __disable_subcaches(core); + __release_subcaches(core); + res_ops->llcc(core, false); __unload_fw(core); /** * coredump need to be called after firmware unload, coredump also @@ -3280,6 +2422,7 @@ unlock: int venus_hfi_scale_clocks(struct msm_vidc_inst* inst, u64 freq) { + const struct msm_vidc_resources_ops *res_ops; int rc = 0; struct msm_vidc_core* core; @@ -3288,6 +2431,7 @@ int venus_hfi_scale_clocks(struct msm_vidc_inst* inst, u64 freq) return -EINVAL; } core = inst->core; + res_ops = core->res_ops; core_lock(core, __func__); rc = __resume(core); @@ -3295,7 +2439,7 @@ int venus_hfi_scale_clocks(struct msm_vidc_inst* inst, u64 freq) i_vpr_e(inst, "%s: Resume from power collapse failed\n", __func__); goto exit; } - rc = __set_clocks(core, freq); + rc = res_ops->set_clks(core, freq); if (rc) goto exit; @@ -3307,6 +2451,7 @@ exit: int venus_hfi_scale_buses(struct msm_vidc_inst *inst, u64 bw_ddr, u64 bw_llcc) { + const struct msm_vidc_resources_ops *res_ops; int rc = 0; struct msm_vidc_core* core; @@ -3315,6 +2460,7 @@ int venus_hfi_scale_buses(struct msm_vidc_inst *inst, u64 bw_ddr, u64 bw_llcc) return -EINVAL; } core = inst->core; + res_ops = core->res_ops; core_lock(core, __func__); rc = __resume(core); @@ -3322,7 +2468,7 @@ int venus_hfi_scale_buses(struct msm_vidc_inst *inst, u64 bw_ddr, u64 bw_llcc) i_vpr_e(inst, "%s: Resume from power collapse failed\n", __func__); goto exit; } - rc = __vote_buses(core, bw_ddr, bw_llcc); + rc = res_ops->set_bw(core, bw_ddr, bw_llcc); if (rc) goto exit; From cf7b4f85c97fcaba290af3de125d7fef0266363f Mon Sep 17 00:00:00 2001 From: Stanimir Varbanov Date: Wed, 15 Jun 2022 03:10:35 -0700 Subject: [PATCH 0711/1061] video-driver: Move firmware code out of venus hfi All firmware related code is moved into a firmware file. This is part of cleanup of venus_hfi. Change-Id: Ie915e47644dbbbe73c941488fff6db6e40160b90 Signed-off-by: Stanimir Varbanov --- Kbuild | 1 + driver/vidc/inc/firmware.h | 16 +++ driver/vidc/src/firmware.c | 235 ++++++++++++++++++++++++++++++++++++ driver/vidc/src/venus_hfi.c | 214 ++------------------------------ 4 files changed, 260 insertions(+), 206 deletions(-) create mode 100644 driver/vidc/inc/firmware.h create mode 100644 driver/vidc/src/firmware.c diff --git a/Kbuild b/Kbuild index 48829b6f02..968a7ee391 100644 --- a/Kbuild +++ b/Kbuild @@ -68,6 +68,7 @@ msm_video-objs += driver/vidc/src/msm_vidc_v4l2.o \ driver/vidc/src/msm_vidc_probe.o \ driver/vidc/src/msm_vidc_dt.o \ driver/vidc/src/resources.o \ + driver/vidc/src/firmware.o \ driver/vidc/src/msm_vidc_debug.o \ driver/vidc/src/msm_vidc_memory.o \ driver/vidc/src/msm_vidc_fence.o \ diff --git a/driver/vidc/inc/firmware.h b/driver/vidc/inc/firmware.h new file mode 100644 index 0000000000..07427fd516 --- /dev/null +++ b/driver/vidc/inc/firmware.h @@ -0,0 +1,16 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) 2022, The Linux Foundation. All rights reserved. + */ + +#ifndef _MSM_VIDC_FIRMWARE_H_ +#define _MSM_VIDC_FIRMWARE_H_ + +struct msm_vidc_core; + +int fw_load(struct msm_vidc_core *core); +int fw_unload(struct msm_vidc_core *core); +int fw_suspend(struct msm_vidc_core *core); +int fw_resume(struct msm_vidc_core *core); + +#endif diff --git a/driver/vidc/src/firmware.c b/driver/vidc/src/firmware.c new file mode 100644 index 0000000000..963eb7a5f3 --- /dev/null +++ b/driver/vidc/src/firmware.c @@ -0,0 +1,235 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2022. Qualcomm Innovation Center, Inc. All rights reserved. + */ +#include +#include +#include +#include +#include +#include +#include + +#include "msm_vidc_core.h" +#include "msm_vidc_debug.h" +#include "msm_vidc_dt.h" +#include "msm_vidc_events.h" +#include "firmware.h" + +#define MAX_FIRMWARE_NAME_SIZE 128 + +struct tzbsp_memprot { + u32 cp_start; + u32 cp_size; + u32 cp_nonpixel_start; + u32 cp_nonpixel_size; +}; + +enum tzbsp_video_state { + TZBSP_VIDEO_STATE_SUSPEND = 0, + TZBSP_VIDEO_STATE_RESUME = 1, + TZBSP_VIDEO_STATE_RESTORE_THRESHOLD = 2, +}; + +static int protect_cp_mem(struct msm_vidc_core *core) +{ + struct tzbsp_memprot memprot; + int rc = 0; + struct context_bank_info *cb; + + if (!core) + return -EINVAL; + + memprot.cp_start = 0x0; + memprot.cp_size = 0x0; + memprot.cp_nonpixel_start = 0x0; + memprot.cp_nonpixel_size = 0x0; + + list_for_each_entry(cb, &core->dt->context_banks, list) { + if (!strcmp(cb->name, "venus_ns")) { + memprot.cp_size = cb->addr_range.start; + + d_vpr_h("%s: memprot.cp_size: %#x\n", + __func__, memprot.cp_size); + } + + if (!strcmp(cb->name, "venus_sec_non_pixel")) { + memprot.cp_nonpixel_start = cb->addr_range.start; + memprot.cp_nonpixel_size = cb->addr_range.size; + + d_vpr_h("%s: cp_nonpixel_start: %#x size: %#x\n", + __func__, memprot.cp_nonpixel_start, + memprot.cp_nonpixel_size); + } + } + + rc = qcom_scm_mem_protect_video_var(memprot.cp_start, memprot.cp_size, + memprot.cp_nonpixel_start, memprot.cp_nonpixel_size); + + if (rc) + d_vpr_e("Failed to protect memory(%d)\n", rc); + + trace_venus_hfi_var_done( + memprot.cp_start, memprot.cp_size, + memprot.cp_nonpixel_start, memprot.cp_nonpixel_size); + + return rc; +} + +static int __load_fw_to_memory(struct platform_device *pdev, + const char *fw_name) +{ + int rc = 0; + const struct firmware *firmware = NULL; + char firmware_name[MAX_FIRMWARE_NAME_SIZE] = { 0 }; + struct device_node *node = NULL; + struct resource res = { 0 }; + phys_addr_t phys = 0; + size_t res_size = 0; + ssize_t fw_size = 0; + void *virt = NULL; + int pas_id = 0; + + if (!fw_name || !(*fw_name) || !pdev) { + d_vpr_e("%s: Invalid inputs\n", __func__); + return -EINVAL; + } + if (strlen(fw_name) >= MAX_FIRMWARE_NAME_SIZE - 4) { + d_vpr_e("%s: Invalid fw name\n", __func__); + return -EINVAL; + } + scnprintf(firmware_name, ARRAY_SIZE(firmware_name), "%s.mbn", fw_name); + + rc = of_property_read_u32(pdev->dev.of_node, "pas-id", &pas_id); + if (rc) { + d_vpr_e("%s: failed to read \"pas-id\". error %d\n", + __func__, rc); + goto exit; + } + + node = of_parse_phandle(pdev->dev.of_node, "memory-region", 0); + if (!node) { + d_vpr_e("%s: failed to read \"memory-region\"\n", + __func__); + return -EINVAL; + } + + rc = of_address_to_resource(node, 0, &res); + if (rc) { + d_vpr_e("%s: failed to read \"memory-region\", error %d\n", + __func__, rc); + goto exit; + } + phys = res.start; + res_size = (size_t)resource_size(&res); + + rc = request_firmware(&firmware, firmware_name, &pdev->dev); + if (rc) { + d_vpr_e("%s: failed to request fw \"%s\", error %d\n", + __func__, firmware_name, rc); + goto exit; + } + + fw_size = qcom_mdt_get_size(firmware); + if (fw_size < 0 || res_size < (size_t)fw_size) { + rc = -EINVAL; + d_vpr_e("%s: out of bound fw image fw size: %ld, res_size: %lu", + __func__, fw_size, res_size); + goto exit; + } + + virt = memremap(phys, res_size, MEMREMAP_WC); + if (!virt) { + d_vpr_e("%s: failed to remap fw memory phys %pa[p]\n", + __func__, phys); + return -ENOMEM; + } + + /* prevent system suspend during fw_load */ + pm_stay_awake(pdev->dev.parent); + rc = qcom_mdt_load(&pdev->dev, firmware, firmware_name, + pas_id, virt, phys, res_size, NULL); + pm_relax(pdev->dev.parent); + if (rc) { + d_vpr_e("%s: error %d loading fw \"%s\"\n", + __func__, rc, firmware_name); + goto exit; + } + rc = qcom_scm_pas_auth_and_reset(pas_id); + if (rc) { + d_vpr_e("%s: error %d authenticating fw \"%s\"\n", + __func__, rc, firmware_name); + goto exit; + } + + memunmap(virt); + release_firmware(firmware); + d_vpr_h("%s: firmware \"%s\" loaded successfully\n", + __func__, firmware_name); + + return pas_id; + +exit: + if (virt) + memunmap(virt); + if (firmware) + release_firmware(firmware); + + return rc; +} + +int fw_load(struct msm_vidc_core *core) +{ + int rc; + + if (!core->dt->fw_cookie) { + core->dt->fw_cookie = __load_fw_to_memory(core->pdev, + core->dt->fw_name); + if (core->dt->fw_cookie <= 0) { + d_vpr_e("%s: firmware download failed %d\n", + __func__, core->dt->fw_cookie); + core->dt->fw_cookie = 0; + return -ENOMEM; + } + } + + rc = protect_cp_mem(core); + if (rc) { + d_vpr_e("%s: protect memory failed\n", __func__); + goto fail_protect_mem; + } + + return rc; + +fail_protect_mem: + if (core->dt->fw_cookie) + qcom_scm_pas_shutdown(core->dt->fw_cookie); + core->dt->fw_cookie = 0; + return rc; +} + +int fw_unload(struct msm_vidc_core *core) +{ + int ret; + + if (!core->dt->fw_cookie) + return -EINVAL; + + ret = qcom_scm_pas_shutdown(core->dt->fw_cookie); + if (ret) + d_vpr_e("Firmware unload failed rc=%d\n", ret); + + core->dt->fw_cookie = 0; + + return ret; +} + +int fw_suspend(struct msm_vidc_core *core) +{ + return qcom_scm_set_remote_state(TZBSP_VIDEO_STATE_SUSPEND, 0); +} + +int fw_resume(struct msm_vidc_core *core) +{ + return qcom_scm_set_remote_state(TZBSP_VIDEO_STATE_RESUME, 0); +} diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index 30a792cdd2..1fe5423a9b 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -26,8 +26,7 @@ #include "venus_hfi_response.h" #include "venus_hfi_queue.h" #include "msm_vidc_events.h" - -#define MAX_FIRMWARE_NAME_SIZE 128 +#include "firmware.h" #define update_offset(offset, val) ((offset) += (val)) #define update_timestamp(ts, val) \ @@ -42,19 +41,6 @@ extern struct msm_vidc_core *g_core; static int __resume(struct msm_vidc_core *core); static int __suspend(struct msm_vidc_core *core); -struct tzbsp_memprot { - u32 cp_start; - u32 cp_size; - u32 cp_nonpixel_start; - u32 cp_nonpixel_size; -}; - -enum tzbsp_video_state { - TZBSP_VIDEO_STATE_SUSPEND = 0, - TZBSP_VIDEO_STATE_RESUME = 1, - TZBSP_VIDEO_STATE_RESTORE_THRESHOLD = 2, -}; - /** * Utility function to enforce some of our assumptions. Spam calls to this * in hotspots in code to double check some of the assumptions that we hold. @@ -351,20 +337,6 @@ static void __cancel_power_collapse_work(struct msm_vidc_core *core) cancel_delayed_work(&core->pm_work); } -static int __tzbsp_set_video_state(enum tzbsp_video_state state) -{ - int tzbsp_rsp = qcom_scm_set_remote_state(state, 0); - - d_vpr_l("Set state %d, resp %d\n", state, tzbsp_rsp); - if (tzbsp_rsp) { - d_vpr_e("Failed to set video core state to suspend: %d\n", - tzbsp_rsp); - return -EINVAL; - } - - return 0; -} - static void __flush_debug_queue(struct msm_vidc_core *core, u8 *packet, u32 packet_size) { @@ -571,51 +543,6 @@ skip_power_off: return -EAGAIN; } -static int __protect_cp_mem(struct msm_vidc_core *core) -{ - - struct tzbsp_memprot memprot; - int rc = 0; - struct context_bank_info *cb; - - if (!core) - return -EINVAL; - - memprot.cp_start = 0x0; - memprot.cp_size = 0x0; - memprot.cp_nonpixel_start = 0x0; - memprot.cp_nonpixel_size = 0x0; - - list_for_each_entry(cb, &core->dt->context_banks, list) { - if (!strcmp(cb->name, "venus_ns")) { - memprot.cp_size = cb->addr_range.start; - - d_vpr_h("%s: memprot.cp_size: %#x\n", - __func__, memprot.cp_size); - } - - if (!strcmp(cb->name, "venus_sec_non_pixel")) { - memprot.cp_nonpixel_start = cb->addr_range.start; - memprot.cp_nonpixel_size = cb->addr_range.size; - - d_vpr_h("%s: cp_nonpixel_start: %#x size: %#x\n", - __func__, memprot.cp_nonpixel_start, - memprot.cp_nonpixel_size); - } - } - - rc = qcom_scm_mem_protect_video_var(memprot.cp_start, memprot.cp_size, - memprot.cp_nonpixel_start, memprot.cp_nonpixel_size); - - if (rc) - d_vpr_e("Failed to protect memory(%d)\n", rc); - - trace_venus_hfi_var_done( - memprot.cp_start, memprot.cp_size, - memprot.cp_nonpixel_start, memprot.cp_nonpixel_size); - - return rc; -} #if 0 // TODO static int __core_set_resource(struct msm_vidc_core *core, struct vidc_resource_hdr *resource_hdr, void *resource_value) @@ -874,7 +801,7 @@ static int __suspend(struct msm_vidc_core *core) d_vpr_h("Entering suspend\n"); - rc = __tzbsp_set_video_state(TZBSP_VIDEO_STATE_SUSPEND); + rc = fw_suspend(core); if (rc) { d_vpr_e("Failed to suspend video core %d\n", rc); goto err_tzbsp_suspend; @@ -920,7 +847,7 @@ static int __resume(struct msm_vidc_core *core) } /* Reboot the firmware */ - rc = __tzbsp_set_video_state(TZBSP_VIDEO_STATE_RESUME); + rc = fw_resume(core); if (rc) { d_vpr_e("Failed to resume video core %d\n", rc); goto err_set_video_state; @@ -964,7 +891,7 @@ exit: // core->skip_pc_count = 0; return rc; err_reset_core: - __tzbsp_set_video_state(TZBSP_VIDEO_STATE_SUSPEND); + fw_suspend(core); err_set_video_state: __venus_power_off(core); err_venus_power_on: @@ -972,108 +899,6 @@ err_venus_power_on: return rc; } -static int __load_fw_to_memory(struct platform_device *pdev, - const char *fw_name) -{ - int rc = 0; - const struct firmware *firmware = NULL; - char firmware_name[MAX_FIRMWARE_NAME_SIZE] = { 0 }; - struct device_node *node = NULL; - struct resource res = { 0 }; - phys_addr_t phys = 0; - size_t res_size = 0; - ssize_t fw_size = 0; - void *virt = NULL; - int pas_id = 0; - - if (!fw_name || !(*fw_name) || !pdev) { - d_vpr_e("%s: Invalid inputs\n", __func__); - return -EINVAL; - } - if (strlen(fw_name) >= MAX_FIRMWARE_NAME_SIZE - 4) { - d_vpr_e("%s: Invalid fw name\n", __func__); - return -EINVAL; - } - scnprintf(firmware_name, ARRAY_SIZE(firmware_name), "%s.mbn", fw_name); - - rc = of_property_read_u32(pdev->dev.of_node, "pas-id", &pas_id); - if (rc) { - d_vpr_e("%s: failed to read \"pas-id\". error %d\n", - __func__, rc); - goto exit; - } - - node = of_parse_phandle(pdev->dev.of_node, "memory-region", 0); - if (!node) { - d_vpr_e("%s: failed to read \"memory-region\"\n", - __func__); - return -EINVAL; - } - - rc = of_address_to_resource(node, 0, &res); - if (rc) { - d_vpr_e("%s: failed to read \"memory-region\", error %d\n", - __func__, rc); - goto exit; - } - phys = res.start; - res_size = (size_t)resource_size(&res); - - rc = request_firmware(&firmware, firmware_name, &pdev->dev); - if (rc) { - d_vpr_e("%s: failed to request fw \"%s\", error %d\n", - __func__, firmware_name, rc); - goto exit; - } - - fw_size = qcom_mdt_get_size(firmware); - if (fw_size < 0 || res_size < (size_t)fw_size) { - rc = -EINVAL; - d_vpr_e("%s: out of bound fw image fw size: %ld, res_size: %lu", - __func__, fw_size, res_size); - goto exit; - } - - virt = memremap(phys, res_size, MEMREMAP_WC); - if (!virt) { - d_vpr_e("%s: failed to remap fw memory phys %pa[p]\n", - __func__, phys); - return -ENOMEM; - } - - /* prevent system suspend during fw_load */ - pm_stay_awake(pdev->dev.parent); - rc = qcom_mdt_load(&pdev->dev, firmware, firmware_name, - pas_id, virt, phys, res_size, NULL); - pm_relax(pdev->dev.parent); - if (rc) { - d_vpr_e("%s: error %d loading fw \"%s\"\n", - __func__, rc, firmware_name); - goto exit; - } - rc = qcom_scm_pas_auth_and_reset(pas_id); - if (rc) { - d_vpr_e("%s: error %d authenticating fw \"%s\"\n", - __func__, rc, firmware_name); - goto exit; - } - - memunmap(virt); - release_firmware(firmware); - d_vpr_h("%s: firmware \"%s\" loaded successfully\n", - __func__, firmware_name); - - return pas_id; - -exit: - if (virt) - memunmap(virt); - if (firmware) - release_firmware(firmware); - - return rc; -} - int __load_fw(struct msm_vidc_core *core) { const struct msm_vidc_resources_ops *res_ops = core->res_ops; @@ -1097,23 +922,9 @@ int __load_fw(struct msm_vidc_core *core) goto fail_venus_power_on; } - if (!core->dt->fw_cookie) { - core->dt->fw_cookie = __load_fw_to_memory(core->pdev, - core->dt->fw_name); - if (core->dt->fw_cookie <= 0) { - d_vpr_e("%s: firmware download failed %d\n", - __func__, core->dt->fw_cookie); - core->dt->fw_cookie = 0; - rc = -ENOMEM; - goto fail_load_fw; - } - } - - rc = __protect_cp_mem(core); - if (rc) { - d_vpr_e("%s: protect memory failed\n", __func__); - goto fail_protect_mem; - } + rc = fw_load(core); + if (rc) + goto fail_load_fw; /* * Hand off control of regulators to h/w _after_ loading fw. @@ -1125,10 +936,6 @@ int __load_fw(struct msm_vidc_core *core) trace_msm_v4l2_vidc_fw_load("END"); return rc; -fail_protect_mem: - if (core->dt->fw_cookie) - qcom_scm_pas_shutdown(core->dt->fw_cookie); - core->dt->fw_cookie = 0; fail_load_fw: __venus_power_off(core); fail_venus_power_on: @@ -1147,12 +954,7 @@ void __unload_fw(struct msm_vidc_core *core) return; cancel_delayed_work(&core->pm_work); - rc = qcom_scm_pas_shutdown(core->dt->fw_cookie); - if (rc) - d_vpr_e("Firmware unload failed rc=%d\n", rc); - - core->dt->fw_cookie = 0; - + rc = fw_unload(core); __venus_power_off(core); res_ops->put(core); From 21974f4a608f3306c5f16d1bd7833d3c311f04dc Mon Sep 17 00:00:00 2001 From: Stanimir Varbanov Date: Thu, 16 Jun 2022 06:54:07 -0700 Subject: [PATCH 0712/1061] video-driver: Move register manipulation functions Move register manipulation functions in a common variant file (msm_vidc_variant). Change-Id: Ic92a264b47b4d90efcfb4389e30d2749a23f792b Signed-off-by: Stanimir Varbanov --- Kbuild | 4 +- driver/variant/common/inc/msm_vidc_variant.h | 22 +++ driver/variant/common/src/msm_vidc_variant.c | 196 +++++++++++++++++++ driver/variant/iris2/src/msm_vidc_iris2.c | 3 +- driver/variant/iris3/src/msm_vidc_iris3.c | 3 +- driver/vidc/inc/resources.h | 2 - driver/vidc/inc/venus_hfi.h | 7 - driver/vidc/src/resources.c | 23 --- driver/vidc/src/venus_hfi.c | 144 -------------- 9 files changed, 225 insertions(+), 179 deletions(-) create mode 100644 driver/variant/common/inc/msm_vidc_variant.h create mode 100644 driver/variant/common/src/msm_vidc_variant.c diff --git a/Kbuild b/Kbuild index 968a7ee391..e70c93c257 100644 --- a/Kbuild +++ b/Kbuild @@ -22,6 +22,7 @@ endif LINUXINCLUDE += -I$(VIDEO_ROOT)/driver/vidc/inc \ -I$(VIDEO_ROOT)/driver/platform/common/inc \ + -I$(VIDEO_ROOT)/driver/variant/common/inc \ -I$(VIDEO_ROOT)/include/uapi/vidc USERINCLUDE += -I$(VIDEO_ROOT)/include/uapi/vidc/media \ @@ -76,4 +77,5 @@ msm_video-objs += driver/vidc/src/msm_vidc_v4l2.o \ driver/vidc/src/venus_hfi_queue.o \ driver/vidc/src/hfi_packet.o \ driver/vidc/src/venus_hfi_response.o \ - driver/platform/common/src/msm_vidc_platform.o + driver/platform/common/src/msm_vidc_platform.o \ + driver/variant/common/src/msm_vidc_variant.o diff --git a/driver/variant/common/inc/msm_vidc_variant.h b/driver/variant/common/inc/msm_vidc_variant.h new file mode 100644 index 0000000000..1c09f48e79 --- /dev/null +++ b/driver/variant/common/inc/msm_vidc_variant.h @@ -0,0 +1,22 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) 2022, The Linux Foundation. All rights reserved. + */ + +#ifndef _MSM_VIDC_VARIANT_H_ +#define _MSM_VIDC_VARIANT_H_ + +#include + +struct msm_vidc_core; + +int __write_register_masked(struct msm_vidc_core *core, u32 reg, u32 value, + u32 mask); +int __write_register(struct msm_vidc_core *core, u32 reg, u32 value); +int __read_register(struct msm_vidc_core *core, u32 reg, u32 *value); +int __read_register_with_poll_timeout(struct msm_vidc_core *core, u32 reg, + u32 mask, u32 exp_val, u32 sleep_us, + u32 timeout_us); +int __set_registers(struct msm_vidc_core *core); + +#endif diff --git a/driver/variant/common/src/msm_vidc_variant.c b/driver/variant/common/src/msm_vidc_variant.c new file mode 100644 index 0000000000..fafdbaafcc --- /dev/null +++ b/driver/variant/common/src/msm_vidc_variant.c @@ -0,0 +1,196 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. + * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include +#include + +#include "msm_vidc_core.h" +#include "msm_vidc_debug.h" +#include "msm_vidc_dt.h" +#include "msm_vidc_variant.h" + +static void __fatal_error(bool fatal) +{ + WARN_ON(fatal); +} + +static int __strict_check(struct msm_vidc_core *core, const char *function) +{ + bool fatal = !mutex_is_locked(&core->lock); + + __fatal_error(fatal); + + if (fatal) + d_vpr_e("%s: strict check failed\n", function); + + return fatal ? -EINVAL : 0; +} + +int __write_register(struct msm_vidc_core *core, u32 reg, u32 value) +{ + u32 hwiosymaddr = reg; + u8 *base_addr; + int rc = 0; + + if (!core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + rc = __strict_check(core, __func__); + if (rc) + return rc; + + if (!core->power_enabled) { + d_vpr_e("HFI Write register failed : Power is OFF\n"); + return -EINVAL; + } + + base_addr = core->register_base_addr; + d_vpr_l("regwrite(%pK + %#x) = %#x\n", base_addr, hwiosymaddr, value); + base_addr += hwiosymaddr; + writel_relaxed(value, base_addr); + + /* + * Memory barrier to make sure value is written into the register. + */ + wmb(); + + return rc; +} + +/* + * Argument mask is used to specify which bits to update. In case mask is 0x11, + * only bits 0 & 4 will be updated with corresponding bits from value. To update + * entire register with value, set mask = 0xFFFFFFFF. + */ +int __write_register_masked(struct msm_vidc_core *core, u32 reg, u32 value, + u32 mask) +{ + u32 prev_val, new_val; + u8 *base_addr; + int rc = 0; + + if (!core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + rc = __strict_check(core, __func__); + if (rc) + return rc; + + if (!core->power_enabled) { + d_vpr_e("%s: register write failed, power is off\n", + __func__); + return -EINVAL; + } + + base_addr = core->register_base_addr; + base_addr += reg; + + prev_val = readl_relaxed(base_addr); + /* + * Memory barrier to ensure register read is correct + */ + rmb(); + + new_val = (prev_val & ~mask) | (value & mask); + d_vpr_l( + "Base addr: %pK, writing to: %#x, previous-value: %#x, value: %#x, mask: %#x, new-value: %#x...\n", + base_addr, reg, prev_val, value, mask, new_val); + writel_relaxed(new_val, base_addr); + /* + * Memory barrier to make sure value is written into the register. + */ + wmb(); + + return rc; +} + +int __read_register(struct msm_vidc_core *core, u32 reg, u32 *value) +{ + int rc = 0; + u8 *base_addr; + + if (!core || !value) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (!core->power_enabled) { + d_vpr_e("HFI Read register failed : Power is OFF\n"); + return -EINVAL; + } + + base_addr = core->register_base_addr; + + *value = readl_relaxed(base_addr + reg); + /* + * Memory barrier to make sure value is read correctly from the + * register. + */ + rmb(); + d_vpr_l("regread(%pK + %#x) = %#x\n", base_addr, reg, *value); + + return rc; +} + +int __read_register_with_poll_timeout(struct msm_vidc_core *core, u32 reg, + u32 mask, u32 exp_val, u32 sleep_us, + u32 timeout_us) +{ + int rc = 0; + u32 val = 0; + u8 *addr; + + if (!core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (!core->power_enabled) { + d_vpr_e("%s failed: Power is OFF\n", __func__); + return -EINVAL; + } + + addr = (u8 *)core->register_base_addr + reg; + + rc = readl_relaxed_poll_timeout(addr, val, ((val & mask) == exp_val), sleep_us, timeout_us); + /* + * Memory barrier to make sure value is read correctly from the + * register. + */ + rmb(); + d_vpr_l( + "regread(%pK + %#x) = %#x. rc %d, mask %#x, exp_val %#x, cond %u, sleep %u, timeout %u\n", + core->register_base_addr, reg, val, rc, mask, exp_val, + ((val & mask) == exp_val), sleep_us, timeout_us); + + return rc; +} + +int __set_registers(struct msm_vidc_core *core) +{ + struct reg_set *reg_set; + int i, rc = 0; + + if (!core || !core->dt) { + d_vpr_e("core resources null, cannot set registers\n"); + return -EINVAL; + } + + reg_set = &core->dt->reg_set; + for (i = 0; i < reg_set->count; i++) { + rc = __write_register_masked(core, reg_set->reg_tbl[i].reg, + reg_set->reg_tbl[i].value, + reg_set->reg_tbl[i].mask); + if (rc) + return rc; + } + + return rc; +} diff --git a/driver/variant/iris2/src/msm_vidc_iris2.c b/driver/variant/iris2/src/msm_vidc_iris2.c index 9085f939e2..51434d9d85 100644 --- a/driver/variant/iris2/src/msm_vidc_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_iris2.c @@ -15,6 +15,7 @@ #include "msm_vidc_buffer.h" #include "msm_vidc_debug.h" #include "msm_vidc_control.h" +#include "msm_vidc_variant.h" #define VIDEO_ARCH_LX 1 @@ -549,7 +550,7 @@ static int __power_on_iris2(struct msm_vidc_core *core) * Re-program all of the registers that get reset as a result of * regulator_disable() and _enable() */ - res_ops->set_regs(core); + __set_registers(core); __interrupt_init_iris2(core); core->intr_status = 0; diff --git a/driver/variant/iris3/src/msm_vidc_iris3.c b/driver/variant/iris3/src/msm_vidc_iris3.c index ae121df296..0758d6cfe6 100644 --- a/driver/variant/iris3/src/msm_vidc_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_iris3.c @@ -16,6 +16,7 @@ #include "msm_vidc_internal.h" #include "msm_vidc_buffer.h" #include "msm_vidc_debug.h" +#include "msm_vidc_variant.h" #define VIDEO_ARCH_LX 1 @@ -591,7 +592,7 @@ static int __power_on_iris3(struct msm_vidc_core *core) * Re-program all of the registers that get reset as a result of * regulator_disable() and _enable() */ - res_ops->set_regs(core); + __set_registers(core); __interrupt_init_iris3(core); core->intr_status = 0; diff --git a/driver/vidc/inc/resources.h b/driver/vidc/inc/resources.h index b4a18a7432..d32d457182 100644 --- a/driver/vidc/inc/resources.h +++ b/driver/vidc/inc/resources.h @@ -26,8 +26,6 @@ struct msm_vidc_resources_ops { int (*clk_disable)(struct msm_vidc_core *core, const char *name); int (*clk_enable)(struct msm_vidc_core *core, const char *name); - - int (*set_regs)(struct msm_vidc_core *core); }; const struct msm_vidc_resources_ops *get_resources_ops(void); diff --git a/driver/vidc/inc/venus_hfi.h b/driver/vidc/inc/venus_hfi.h index a270b506a1..99058da742 100644 --- a/driver/vidc/inc/venus_hfi.h +++ b/driver/vidc/inc/venus_hfi.h @@ -73,13 +73,6 @@ void venus_hfi_pm_work_handler(struct work_struct *work); irqreturn_t venus_hfi_isr(int irq, void *data); irqreturn_t venus_hfi_isr_handler(int irq, void *data); -int __write_register_masked(struct msm_vidc_core *core, - u32 reg, u32 value, u32 mask); -int __write_register(struct msm_vidc_core *core, - u32 reg, u32 value); -int __read_register(struct msm_vidc_core *core, u32 reg, u32 *value); -int __read_register_with_poll_timeout(struct msm_vidc_core *core, - u32 reg, u32 mask, u32 exp_val, u32 sleep_us, u32 timeout_us); int __prepare_pc(struct msm_vidc_core *core); bool __core_in_valid_state(struct msm_vidc_core *core); diff --git a/driver/vidc/src/resources.c b/driver/vidc/src/resources.c index f758e1c246..99d5db2abb 100644 --- a/driver/vidc/src/resources.c +++ b/driver/vidc/src/resources.c @@ -443,28 +443,6 @@ static int __enable_regulator(struct msm_vidc_core *core, const char *reg_name) return rc; } -static int __set_registers(struct msm_vidc_core *core) -{ - struct reg_set *reg_set; - int i, rc = 0; - - if (!core || !core->dt) { - d_vpr_e("core resources null, cannot set registers\n"); - return -EINVAL; - } - - reg_set = &core->dt->reg_set; - for (i = 0; i < reg_set->count; i++) { - rc = __write_register_masked(core, reg_set->reg_tbl[i].reg, - reg_set->reg_tbl[i].value, - reg_set->reg_tbl[i].mask); - if (rc) - return rc; - } - - return rc; -} - #ifdef CONFIG_MSM_MMRM static void __deregister_mmrm(struct msm_vidc_core *core) { @@ -1139,7 +1117,6 @@ static const struct msm_vidc_resources_ops res_ops = { .set_clks = __set_clocks, .clk_enable = __prepare_enable_clock, .clk_disable = __disable_unprepare_clock, - .set_regs = __set_registers, }; const struct msm_vidc_resources_ops *get_resources_ops(void) diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index 1fe5423a9b..b1d2862a8a 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -161,150 +161,6 @@ static bool __valdiate_session(struct msm_vidc_core *core, return valid; } -int __write_register(struct msm_vidc_core *core, - u32 reg, u32 value) -{ - u32 hwiosymaddr = reg; - u8 *base_addr; - int rc = 0; - - if (!core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - rc = __strict_check(core, __func__); - if (rc) - return rc; - - if (!core->power_enabled) { - d_vpr_e("HFI Write register failed : Power is OFF\n"); - return -EINVAL; - } - - base_addr = core->register_base_addr; - d_vpr_l("regwrite(%pK + %#x) = %#x\n", base_addr, hwiosymaddr, value); - base_addr += hwiosymaddr; - writel_relaxed(value, base_addr); - - /* - * Memory barrier to make sure value is written into the register. - */ - wmb(); - - return rc; -} - -/* - * Argument mask is used to specify which bits to update. In case mask is 0x11, - * only bits 0 & 4 will be updated with corresponding bits from value. To update - * entire register with value, set mask = 0xFFFFFFFF. - */ -int __write_register_masked(struct msm_vidc_core *core, - u32 reg, u32 value, u32 mask) -{ - u32 prev_val, new_val; - u8 *base_addr; - int rc = 0; - - if (!core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - rc = __strict_check(core, __func__); - if (rc) - return rc; - - if (!core->power_enabled) { - d_vpr_e("%s: register write failed, power is off\n", - __func__); - return -EINVAL; - } - - base_addr = core->register_base_addr; - base_addr += reg; - - prev_val = readl_relaxed(base_addr); - /* - * Memory barrier to ensure register read is correct - */ - rmb(); - - new_val = (prev_val & ~mask) | (value & mask); - d_vpr_l( - "Base addr: %pK, writing to: %#x, previous-value: %#x, value: %#x, mask: %#x, new-value: %#x...\n", - base_addr, reg, prev_val, value, mask, new_val); - writel_relaxed(new_val, base_addr); - /* - * Memory barrier to make sure value is written into the register. - */ - wmb(); - - return rc; -} - -int __read_register(struct msm_vidc_core *core, u32 reg, u32 *value) -{ - int rc = 0; - u8 *base_addr; - - if (!core || !value) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - if (!core->power_enabled) { - d_vpr_e("HFI Read register failed : Power is OFF\n"); - return -EINVAL; - } - - base_addr = core->register_base_addr; - - *value = readl_relaxed(base_addr + reg); - /* - * Memory barrier to make sure value is read correctly from the - * register. - */ - rmb(); - d_vpr_l("regread(%pK + %#x) = %#x\n", base_addr, reg, *value); - - return rc; -} - -int __read_register_with_poll_timeout(struct msm_vidc_core *core, - u32 reg, u32 mask, u32 exp_val, u32 sleep_us, u32 timeout_us) -{ - int rc = 0; - u32 val = 0; - u8 *addr; - - if (!core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - if (!core->power_enabled) { - d_vpr_e("%s failed: Power is OFF\n", __func__); - return -EINVAL; - } - - addr = (u8 *)core->register_base_addr + reg; - - rc = readl_relaxed_poll_timeout(addr, val, ((val & mask) == exp_val), sleep_us, timeout_us); - /* - * Memory barrier to make sure value is read correctly from the - * register. - */ - rmb(); - d_vpr_l( - "regread(%pK + %#x) = %#x. rc %d, mask %#x, exp_val %#x, cond %u, sleep %u, timeout %u\n", - core->register_base_addr, reg, val, rc, mask, exp_val, - ((val & mask) == exp_val), sleep_us, timeout_us); - - return rc; -} - static void __schedule_power_collapse_work(struct msm_vidc_core *core) { if (!core || !core->capabilities) { From 07f4bf666cf18fd133c1c82e425dc6ae0583cfcb Mon Sep 17 00:00:00 2001 From: Stanimir Varbanov Date: Thu, 16 Jun 2022 07:01:25 -0700 Subject: [PATCH 0713/1061] video-driver: The file msm_vidc_bus.h is not used The file msm_vidc_bus.h is not used, delete it. Change-Id: I21503a1cfb35bf6e93fe92a5c6a9286d29135e12 Signed-off-by: Stanimir Varbanov --- driver/vidc/inc/msm_vidc_bus.h | 248 --------------------------------- 1 file changed, 248 deletions(-) delete mode 100644 driver/vidc/inc/msm_vidc_bus.h diff --git a/driver/vidc/inc/msm_vidc_bus.h b/driver/vidc/inc/msm_vidc_bus.h deleted file mode 100644 index 45088c7965..0000000000 --- a/driver/vidc/inc/msm_vidc_bus.h +++ /dev/null @@ -1,248 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. - */ - -#ifndef __H_MSM_VIDC_BUS_DEFS_H__ -#define __H_MSM_VIDC_BUS_DEFS_H__ - -#include "fixedpoint.h" -#include "msm_vidc_debug.h" -#include "msm_vidc_internal.h" - -#define COMPRESSION_RATIO_MAX 5 - -enum vidc_bus_type { - PERF, - DDR, - LLCC, -}; - -/* - * Minimum dimensions for which to calculate bandwidth. - * This means that anything bandwidth(0, 0) == - * bandwidth(BASELINE_DIMENSIONS.width, BASELINE_DIMENSIONS.height) - */ -static const struct { - int height, width; -} BASELINE_DIMENSIONS = { - .width = 1280, - .height = 720, -}; - -/* converts Mbps to bps (the "b" part can be bits or bytes based on context) */ -#define kbps(__mbps) ((__mbps) * 1000) -#define bps(__mbps) (kbps(__mbps) * 1000) - -#define GENERATE_COMPRESSION_PROFILE(__bpp, __worst) { \ - .bpp = __bpp, \ - .ratio = __worst, \ -} - -/* - * The below table is a structural representation of the following table: - * Resolution | Bitrate | Compression Ratio | - * ............|............|.........................................| - * Width Height|Average High|Avg_8bpc Worst_8bpc Avg_10bpc Worst_10bpc| - * 1280 720| 7 14| 1.69 1.28 1.49 1.23| - * 1920 1080| 20 40| 1.69 1.28 1.49 1.23| - * 2560 1440| 32 64| 2.2 1.26 1.97 1.22| - * 3840 2160| 42 84| 2.2 1.26 1.97 1.22| - * 4096 2160| 44 88| 2.2 1.26 1.97 1.22| - * 4096 2304| 48 96| 2.2 1.26 1.97 1.22| - */ -static struct lut { - int frame_size; /* width x height */ - int frame_rate; - unsigned long bitrate; - struct { - int bpp; - fp_t ratio; - } compression_ratio[COMPRESSION_RATIO_MAX]; -} const LUT[] = { - { - .frame_size = 1280 * 720, - .frame_rate = 30, - .bitrate = 14, - .compression_ratio = { - GENERATE_COMPRESSION_PROFILE(8, - FP(1, 28, 100)), - GENERATE_COMPRESSION_PROFILE(10, - FP(1, 23, 100)), - } - }, - { - .frame_size = 1280 * 720, - .frame_rate = 60, - .bitrate = 22, - .compression_ratio = { - GENERATE_COMPRESSION_PROFILE(8, - FP(1, 28, 100)), - GENERATE_COMPRESSION_PROFILE(10, - FP(1, 23, 100)), - } - }, - { - .frame_size = 1920 * 1088, - .frame_rate = 30, - .bitrate = 40, - .compression_ratio = { - GENERATE_COMPRESSION_PROFILE(8, - FP(1, 28, 100)), - GENERATE_COMPRESSION_PROFILE(10, - FP(1, 23, 100)), - } - }, - { - .frame_size = 1920 * 1088, - .frame_rate = 60, - .bitrate = 64, - .compression_ratio = { - GENERATE_COMPRESSION_PROFILE(8, - FP(1, 28, 100)), - GENERATE_COMPRESSION_PROFILE(10, - FP(1, 23, 100)), - } - }, - { - .frame_size = 2560 * 1440, - .frame_rate = 30, - .bitrate = 64, - .compression_ratio = { - GENERATE_COMPRESSION_PROFILE(8, - FP(1, 26, 100)), - GENERATE_COMPRESSION_PROFILE(10, - FP(1, 22, 100)), - } - }, - { - .frame_size = 2560 * 1440, - .frame_rate = 60, - .bitrate = 102, - .compression_ratio = { - GENERATE_COMPRESSION_PROFILE(8, - FP(1, 26, 100)), - GENERATE_COMPRESSION_PROFILE(10, - FP(1, 22, 100)), - } - }, - { - .frame_size = 3840 * 2160, - .frame_rate = 30, - .bitrate = 84, - .compression_ratio = { - GENERATE_COMPRESSION_PROFILE(8, - FP(1, 26, 100)), - GENERATE_COMPRESSION_PROFILE(10, - FP(1, 22, 100)), - } - }, - { - .frame_size = 3840 * 2160, - .frame_rate = 60, - .bitrate = 134, - .compression_ratio = { - GENERATE_COMPRESSION_PROFILE(8, - FP(1, 26, 100)), - GENERATE_COMPRESSION_PROFILE(10, - FP(1, 22, 100)), - } - }, - { - .frame_size = 4096 * 2160, - .frame_rate = 30, - .bitrate = 88, - .compression_ratio = { - GENERATE_COMPRESSION_PROFILE(8, - FP(1, 26, 100)), - GENERATE_COMPRESSION_PROFILE(10, - FP(1, 22, 100)), - } - }, - { - .frame_size = 4096 * 2160, - .frame_rate = 60, - .bitrate = 141, - .compression_ratio = { - GENERATE_COMPRESSION_PROFILE(8, - FP(1, 26, 100)), - GENERATE_COMPRESSION_PROFILE(10, - FP(1, 22, 100)), - } - }, - { - .frame_size = 4096 * 2304, - .frame_rate = 30, - .bitrate = 96, - .compression_ratio = { - GENERATE_COMPRESSION_PROFILE(8, - FP(1, 26, 100)), - GENERATE_COMPRESSION_PROFILE(10, - FP(1, 22, 100)), - } - }, - { - .frame_size = 4096 * 2304, - .frame_rate = 60, - .bitrate = 154, - .compression_ratio = { - GENERATE_COMPRESSION_PROFILE(8, - FP(1, 26, 100)), - GENERATE_COMPRESSION_PROFILE(10, - FP(1, 22, 100)), - } - }, -}; - -static inline u32 get_type_frm_name(const char *name) -{ - if (!strcmp(name, "venus-llcc")) - return LLCC; - else if (!strcmp(name, "venus-ddr")) - return DDR; - else - return PERF; -} - -#define DUMP_HEADER_MAGIC 0xdeadbeef -#define DUMP_FP_FMT "%FP" /* special format for fp_t */ - -struct dump { - char *key; - char *format; - size_t val; -}; - -struct lut const *__lut(int width, int height, int fps); -fp_t __compression_ratio(struct lut const *entry, int bpp); -void __dump(struct dump dump[], int len); - -static inline bool __ubwc(enum msm_vidc_colorformat_type f) -{ - switch (f) { - case MSM_VIDC_FMT_NV12C: - case MSM_VIDC_FMT_TP10C: - return true; - default: - return false; - } -} - -static inline int __bpp(enum msm_vidc_colorformat_type f) -{ - switch (f) { - case MSM_VIDC_FMT_NV12: - case MSM_VIDC_FMT_NV21: - case MSM_VIDC_FMT_NV12C: - case MSM_VIDC_FMT_RGBA8888C: - return 8; - case MSM_VIDC_FMT_P010: - case MSM_VIDC_FMT_TP10C: - return 10; - default: - d_vpr_e("Unsupported colorformat (%x)", f); - return INT_MAX; - } -} - -#endif // __H_MSM_VIDC_BUS_DEFS_H__ From 2b1146d5cd21d0656ee1265522b637cfd8319c09 Mon Sep 17 00:00:00 2001 From: Stanimir Varbanov Date: Thu, 16 Jun 2022 07:09:48 -0700 Subject: [PATCH 0714/1061] video-driver: Move three functions to msm_vidc_power.c Move __lut, __compression_ratio and __dump functions form venus_hfi.c to msm_vidc_power.c where they belongs. Change-Id: Iafabf1c61a9602ea9b2c067663e46e12b88266b8 Signed-off-by: Stanimir Varbanov --- driver/vidc/src/msm_vidc_power.c | 67 ++++++++++++++++++++++++++++++++ driver/vidc/src/venus_hfi.c | 67 -------------------------------- 2 files changed, 67 insertions(+), 67 deletions(-) diff --git a/driver/vidc/src/msm_vidc_power.c b/driver/vidc/src/msm_vidc_power.c index 6662957590..12841edb44 100644 --- a/driver/vidc/src/msm_vidc_power.c +++ b/driver/vidc/src/msm_vidc_power.c @@ -22,6 +22,73 @@ #define MSM_VIDC_MIN_UBWC_COMPRESSION_RATIO (1 << 16) #define MSM_VIDC_MAX_UBWC_COMPRESSION_RATIO (5 << 16) +/** + * Utility function to enforce some of our assumptions. Spam calls to this + * in hotspots in code to double check some of the assumptions that we hold. + */ +struct lut const *__lut(int width, int height, int fps) +{ + int frame_size = height * width, c = 0; + + do { + if (LUT[c].frame_size >= frame_size && LUT[c].frame_rate >= fps) + return &LUT[c]; + } while (++c < ARRAY_SIZE(LUT)); + + return &LUT[ARRAY_SIZE(LUT) - 1]; +} + +fp_t __compression_ratio(struct lut const *entry, int bpp) +{ + int c = 0; + + for (c = 0; c < COMPRESSION_RATIO_MAX; ++c) { + if (entry->compression_ratio[c].bpp == bpp) + return entry->compression_ratio[c].ratio; + } + + WARN(true, "Shouldn't be here, LUT possibly corrupted?\n"); + return FP_ZERO; /* impossible */ +} + + +void __dump(struct dump dump[], int len) +{ + int c = 0; + + for (c = 0; c < len; ++c) { + char format_line[128] = "", formatted_line[128] = ""; + + if (dump[c].val == DUMP_HEADER_MAGIC) { + snprintf(formatted_line, sizeof(formatted_line), "%s\n", + dump[c].key); + } else { + bool fp_format = !strcmp(dump[c].format, DUMP_FP_FMT); + + if (!fp_format) { + snprintf(format_line, sizeof(format_line), + " %-35s: %s\n", dump[c].key, + dump[c].format); + snprintf(formatted_line, sizeof(formatted_line), + format_line, dump[c].val); + } else { + size_t integer_part, fractional_part; + + integer_part = fp_int(dump[c].val); + fractional_part = fp_frac(dump[c].val); + snprintf(formatted_line, sizeof(formatted_line), + " %-35s: %zd + %zd/%zd\n", + dump[c].key, integer_part, + fractional_part, + fp_frac_base()); + + + } + } + d_vpr_b("%s", formatted_line); + } +} + u64 msm_vidc_max_freq(struct msm_vidc_inst *inst) { struct msm_vidc_core* core; diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index b1d2862a8a..44561e90f7 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -41,73 +41,6 @@ extern struct msm_vidc_core *g_core; static int __resume(struct msm_vidc_core *core); static int __suspend(struct msm_vidc_core *core); -/** - * Utility function to enforce some of our assumptions. Spam calls to this - * in hotspots in code to double check some of the assumptions that we hold. - */ -struct lut const *__lut(int width, int height, int fps) -{ - int frame_size = height * width, c = 0; - - do { - if (LUT[c].frame_size >= frame_size && LUT[c].frame_rate >= fps) - return &LUT[c]; - } while (++c < ARRAY_SIZE(LUT)); - - return &LUT[ARRAY_SIZE(LUT) - 1]; -} - -fp_t __compression_ratio(struct lut const *entry, int bpp) -{ - int c = 0; - - for (c = 0; c < COMPRESSION_RATIO_MAX; ++c) { - if (entry->compression_ratio[c].bpp == bpp) - return entry->compression_ratio[c].ratio; - } - - WARN(true, "Shouldn't be here, LUT possibly corrupted?\n"); - return FP_ZERO; /* impossible */ -} - - -void __dump(struct dump dump[], int len) -{ - int c = 0; - - for (c = 0; c < len; ++c) { - char format_line[128] = "", formatted_line[128] = ""; - - if (dump[c].val == DUMP_HEADER_MAGIC) { - snprintf(formatted_line, sizeof(formatted_line), "%s\n", - dump[c].key); - } else { - bool fp_format = !strcmp(dump[c].format, DUMP_FP_FMT); - - if (!fp_format) { - snprintf(format_line, sizeof(format_line), - " %-35s: %s\n", dump[c].key, - dump[c].format); - snprintf(formatted_line, sizeof(formatted_line), - format_line, dump[c].val); - } else { - size_t integer_part, fractional_part; - - integer_part = fp_int(dump[c].val); - fractional_part = fp_frac(dump[c].val); - snprintf(formatted_line, sizeof(formatted_line), - " %-35s: %zd + %zd/%zd\n", - dump[c].key, integer_part, - fractional_part, - fp_frac_base()); - - - } - } - d_vpr_b("%s", formatted_line); - } -} - static void __fatal_error(bool fatal) { WARN_ON(fatal); From f37cc5fe6cdef5b8eb77eaf97747b18dc99bc531 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Tue, 6 Sep 2022 13:42:20 -0700 Subject: [PATCH 0715/1061] video: driver: Introduce CAP_FLAG_META flag for metadata caps Introduce CAP_FLAG_META flag to differentiate metadata caps from non metadata caps. Change-Id: I7a3d2c5fb952e5d829002a04d11fa7b05b2c9297 Signed-off-by: Akshata Sahukar --- driver/platform/anorak/src/msm_vidc_anorak.c | 66 ++++++++++---------- driver/platform/kalama/src/msm_vidc_kalama.c | 66 ++++++++++---------- driver/platform/waipio/src/msm_vidc_waipio.c | 52 +++++++-------- driver/vidc/inc/msm_vidc_driver.h | 24 +++++-- driver/vidc/inc/msm_vidc_internal.h | 3 +- driver/vidc/src/msm_vdec.c | 8 +-- driver/vidc/src/msm_venc.c | 8 +-- driver/vidc/src/msm_vidc_control.c | 6 +- driver/vidc/src/msm_vidc_driver.c | 1 - 9 files changed, 122 insertions(+), 112 deletions(-) diff --git a/driver/platform/anorak/src/msm_vidc_anorak.c b/driver/platform/anorak/src/msm_vidc_anorak.c index ffdecf8562..57ce7662d8 100644 --- a/driver/platform/anorak/src/msm_vidc_anorak.c +++ b/driver/platform/anorak/src/msm_vidc_anorak.c @@ -327,7 +327,7 @@ static struct msm_platform_inst_capability instance_cap_data_anorak[] = { 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_OUTBUF_FENCE, HFI_PROP_FENCE, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, /* * Client to do set_ctrl with FENCE_ID to set fence_id @@ -1470,7 +1470,7 @@ static struct msm_platform_inst_capability instance_cap_data_anorak[] = { 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_BITSTREAM_RESOLUTION, HFI_PROP_BITSTREAM_RESOLUTION, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_CROP_OFFSETS, DEC, AV1, V4L2_MPEG_VIDC_META_DISABLE, @@ -1479,7 +1479,7 @@ static struct msm_platform_inst_capability instance_cap_data_anorak[] = { 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_CROP_OFFSETS, HFI_PROP_CROP_OFFSETS, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {ALL_INTRA, ENC, H264|HEVC, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, @@ -1507,7 +1507,7 @@ static struct msm_platform_inst_capability instance_cap_data_anorak[] = { 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_LTR_MARK_USE_DETAILS, HFI_PROP_LTR_MARK_USE_DETAILS, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_SEQ_HDR_NAL, ENC, CODECS_ALL, V4L2_MPEG_VIDC_META_DISABLE, @@ -1515,7 +1515,7 @@ static struct msm_platform_inst_capability instance_cap_data_anorak[] = { 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_SEQ_HEADER_NAL, HFI_PROP_METADATA_SEQ_HEADER_NAL, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_DPB_MISR, DEC, CODECS_ALL, V4L2_MPEG_VIDC_META_DISABLE, @@ -1523,7 +1523,7 @@ static struct msm_platform_inst_capability instance_cap_data_anorak[] = { 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_DPB_LUMA_CHROMA_MISR, HFI_PROP_DPB_LUMA_CHROMA_MISR, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_OPB_MISR, DEC, CODECS_ALL, V4L2_MPEG_VIDC_META_DISABLE, @@ -1531,7 +1531,7 @@ static struct msm_platform_inst_capability instance_cap_data_anorak[] = { 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_OPB_LUMA_CHROMA_MISR, HFI_PROP_OPB_LUMA_CHROMA_MISR, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_INTERLACE, DEC, H264, V4L2_MPEG_VIDC_META_DISABLE, @@ -1539,7 +1539,7 @@ static struct msm_platform_inst_capability instance_cap_data_anorak[] = { 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_INTERLACE, HFI_PROP_INTERLACE_INFO, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_TIMESTAMP, DEC | ENC, CODECS_ALL, V4L2_MPEG_VIDC_META_DISABLE, @@ -1547,7 +1547,7 @@ static struct msm_platform_inst_capability instance_cap_data_anorak[] = { 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_TIMESTAMP, HFI_PROP_TIMESTAMP, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_CONCEALED_MB_CNT, DEC, CODECS_ALL, V4L2_MPEG_VIDC_META_DISABLE, @@ -1555,7 +1555,7 @@ static struct msm_platform_inst_capability instance_cap_data_anorak[] = { 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_CONCEALED_MB_COUNT, HFI_PROP_CONEALED_MB_COUNT, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_HIST_INFO, DEC, HEVC|AV1|VP9, V4L2_MPEG_VIDC_META_DISABLE, @@ -1563,7 +1563,7 @@ static struct msm_platform_inst_capability instance_cap_data_anorak[] = { 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_HISTOGRAM_INFO, HFI_PROP_HISTOGRAM_INFO, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_TRANSCODING_STAT_INFO, DEC, HEVC|H264, V4L2_MPEG_VIDC_META_DISABLE, @@ -1571,7 +1571,7 @@ static struct msm_platform_inst_capability instance_cap_data_anorak[] = { 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_TRANSCODE_STAT_INFO, HFI_PROP_TRANSCODING_STAT_INFO, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_TRANSCODING_STAT_INFO, ENC, HEVC|H264, V4L2_MPEG_VIDC_META_DISABLE, @@ -1579,7 +1579,7 @@ static struct msm_platform_inst_capability instance_cap_data_anorak[] = { 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_TRANSCODE_STAT_INFO, HFI_PROP_TRANSCODING_STAT_INFO, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_PICTURE_TYPE, DEC, CODECS_ALL, V4L2_MPEG_VIDC_META_DISABLE, @@ -1587,7 +1587,7 @@ static struct msm_platform_inst_capability instance_cap_data_anorak[] = { 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_PICTURE_TYPE, HFI_PROP_PICTURE_TYPE, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_SEI_MASTERING_DISP, ENC, HEVC|HEIC, V4L2_MPEG_VIDC_META_DISABLE, @@ -1595,7 +1595,7 @@ static struct msm_platform_inst_capability instance_cap_data_anorak[] = { 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_SEI_MASTERING_DISPLAY_COLOUR, HFI_PROP_SEI_MASTERING_DISPLAY_COLOUR, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_SEI_MASTERING_DISP, DEC, HEVC|HEIC|AV1, V4L2_MPEG_VIDC_META_DISABLE, @@ -1604,7 +1604,7 @@ static struct msm_platform_inst_capability instance_cap_data_anorak[] = { 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_SEI_MASTERING_DISPLAY_COLOUR, HFI_PROP_SEI_MASTERING_DISPLAY_COLOUR, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_SEI_CLL, ENC, HEVC|HEIC, V4L2_MPEG_VIDC_META_DISABLE, @@ -1612,7 +1612,7 @@ static struct msm_platform_inst_capability instance_cap_data_anorak[] = { 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_SEI_CONTENT_LIGHT_LEVEL, HFI_PROP_SEI_CONTENT_LIGHT_LEVEL, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_SEI_CLL, DEC, HEVC|HEIC|AV1, V4L2_MPEG_VIDC_META_DISABLE, @@ -1621,7 +1621,7 @@ static struct msm_platform_inst_capability instance_cap_data_anorak[] = { 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_SEI_CONTENT_LIGHT_LEVEL, HFI_PROP_SEI_CONTENT_LIGHT_LEVEL, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_HDR10PLUS, ENC, HEVC|HEIC, V4L2_MPEG_VIDC_META_DISABLE, @@ -1629,7 +1629,7 @@ static struct msm_platform_inst_capability instance_cap_data_anorak[] = { 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_HDR10PLUS, HFI_PROP_SEI_HDR10PLUS_USERDATA, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_HDR10PLUS, DEC, HEVC|HEIC|AV1, V4L2_MPEG_VIDC_META_DISABLE, @@ -1638,7 +1638,7 @@ static struct msm_platform_inst_capability instance_cap_data_anorak[] = { 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_HDR10PLUS, HFI_PROP_SEI_HDR10PLUS_USERDATA, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_DOLBY_RPU, ENC, HEVC, V4L2_MPEG_VIDC_META_DISABLE, @@ -1646,7 +1646,7 @@ static struct msm_platform_inst_capability instance_cap_data_anorak[] = { 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_DOLBY_RPU, HFI_PROP_DOLBY_RPU_METADATA, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_DOLBY_RPU, DEC, H264|HEVC, V4L2_MPEG_VIDC_META_DISABLE, @@ -1654,7 +1654,7 @@ static struct msm_platform_inst_capability instance_cap_data_anorak[] = { 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_DOLBY_RPU, HFI_PROP_DOLBY_RPU_METADATA, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_EVA_STATS, ENC, CODECS_ALL, V4L2_MPEG_VIDC_META_DISABLE, @@ -1662,7 +1662,7 @@ static struct msm_platform_inst_capability instance_cap_data_anorak[] = { 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_EVA_STATS, HFI_PROP_EVA_STAT_INFO, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_BUF_TAG, ENC, CODECS_ALL, V4L2_MPEG_VIDC_META_DISABLE, @@ -1671,7 +1671,7 @@ static struct msm_platform_inst_capability instance_cap_data_anorak[] = { 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_BUFFER_TAG, HFI_PROP_BUFFER_TAG, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, /* * when fence enabled, client needs output buffer_tag @@ -1685,7 +1685,7 @@ static struct msm_platform_inst_capability instance_cap_data_anorak[] = { 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_BUFFER_TAG, HFI_PROP_BUFFER_TAG, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_DPB_TAG_LIST, DEC, CODECS_ALL, V4L2_MPEG_VIDC_META_DISABLE, @@ -1693,7 +1693,7 @@ static struct msm_platform_inst_capability instance_cap_data_anorak[] = { 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_DPB_TAG_LIST, HFI_PROP_DPB_TAG_LIST, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_SUBFRAME_OUTPUT, ENC, HEIC | H264 | HEVC, V4L2_MPEG_VIDC_META_DISABLE, @@ -1701,7 +1701,7 @@ static struct msm_platform_inst_capability instance_cap_data_anorak[] = { 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_SUBFRAME_OUTPUT, HFI_PROP_SUBFRAME_OUTPUT, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_SUBFRAME_OUTPUT, DEC, CODECS_ALL, V4L2_MPEG_VIDC_META_DISABLE, @@ -1709,7 +1709,7 @@ static struct msm_platform_inst_capability instance_cap_data_anorak[] = { 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_SUBFRAME_OUTPUT, HFI_PROP_SUBFRAME_OUTPUT, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_ENC_QP_METADATA, ENC, CODECS_ALL, V4L2_MPEG_VIDC_META_DISABLE, @@ -1717,7 +1717,7 @@ static struct msm_platform_inst_capability instance_cap_data_anorak[] = { 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_ENC_QP_METADATA, HFI_PROP_ENC_QP_METADATA, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_ROI_INFO, ENC, H264|HEVC, V4L2_MPEG_VIDC_META_DISABLE, @@ -1725,7 +1725,7 @@ static struct msm_platform_inst_capability instance_cap_data_anorak[] = { 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_ROI_INFO, HFI_PROP_ROI_INFO, - CAP_FLAG_INPUT_PORT | CAP_FLAG_BITMASK}, + CAP_FLAG_INPUT_PORT | CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_SALIENCY_INFO, ENC, H264|HEVC, V4L2_MPEG_VIDC_META_DISABLE, @@ -1733,7 +1733,7 @@ static struct msm_platform_inst_capability instance_cap_data_anorak[] = { 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_SALIENCY_INFO, HFI_PROP_ROI_AS_SALIENCY_INFO, - CAP_FLAG_INPUT_PORT | CAP_FLAG_BITMASK}, + CAP_FLAG_INPUT_PORT | CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_DEC_QP_METADATA, DEC, CODECS_ALL, V4L2_MPEG_VIDC_META_DISABLE, @@ -1741,7 +1741,7 @@ static struct msm_platform_inst_capability instance_cap_data_anorak[] = { 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_DEC_QP_METADATA, HFI_PROP_DEC_QP_METADATA, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {GRID, ENC, HEIC, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, @@ -1761,7 +1761,7 @@ static struct msm_platform_inst_capability instance_cap_data_anorak[] = { 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_MAX_NUM_REORDER_FRAMES, HFI_PROP_MAX_NUM_REORDER_FRAMES, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {DELIVERY_MODE, ENC, HEVC, V4L2_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE_FRAME_BASED, diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index e3e15f203e..147951be18 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -564,7 +564,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_OUTBUF_FENCE, HFI_PROP_FENCE, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, /* * Client to do set_ctrl with FENCE_ID to set fence_id @@ -1670,7 +1670,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_BITSTREAM_RESOLUTION, HFI_PROP_BITSTREAM_RESOLUTION, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_CROP_OFFSETS, DEC, AV1, MSM_VIDC_META_DISABLE, @@ -1679,7 +1679,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_CROP_OFFSETS, HFI_PROP_CROP_OFFSETS, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {ALL_INTRA, ENC, H264|HEVC, 0, 1, 1, 0, @@ -1705,7 +1705,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_LTR_MARK_USE_DETAILS, HFI_PROP_LTR_MARK_USE_DETAILS, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_SEQ_HDR_NAL, ENC, CODECS_ALL, MSM_VIDC_META_DISABLE, @@ -1713,7 +1713,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_SEQ_HEADER_NAL, HFI_PROP_METADATA_SEQ_HEADER_NAL, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_DPB_MISR, DEC, CODECS_ALL, MSM_VIDC_META_DISABLE, @@ -1721,7 +1721,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_DPB_LUMA_CHROMA_MISR, HFI_PROP_DPB_LUMA_CHROMA_MISR, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_OPB_MISR, DEC, CODECS_ALL, MSM_VIDC_META_DISABLE, @@ -1729,7 +1729,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_OPB_LUMA_CHROMA_MISR, HFI_PROP_OPB_LUMA_CHROMA_MISR, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_INTERLACE, DEC, H264, MSM_VIDC_META_DISABLE, @@ -1737,7 +1737,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_INTERLACE, HFI_PROP_INTERLACE_INFO, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_TIMESTAMP, DEC | ENC, CODECS_ALL, MSM_VIDC_META_DISABLE, @@ -1745,7 +1745,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_TIMESTAMP, HFI_PROP_TIMESTAMP, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_CONCEALED_MB_CNT, DEC, CODECS_ALL, MSM_VIDC_META_DISABLE, @@ -1753,7 +1753,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_CONCEALED_MB_COUNT, HFI_PROP_CONEALED_MB_COUNT, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_HIST_INFO, DEC, HEVC|AV1|VP9, MSM_VIDC_META_DISABLE, @@ -1761,7 +1761,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_HISTOGRAM_INFO, HFI_PROP_HISTOGRAM_INFO, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_TRANSCODING_STAT_INFO, DEC, HEVC|H264, MSM_VIDC_META_DISABLE, @@ -1769,7 +1769,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_TRANSCODE_STAT_INFO, HFI_PROP_TRANSCODING_STAT_INFO, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_TRANSCODING_STAT_INFO, ENC, HEVC|H264, MSM_VIDC_META_DISABLE, @@ -1777,7 +1777,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_TRANSCODE_STAT_INFO, HFI_PROP_TRANSCODING_STAT_INFO, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_PICTURE_TYPE, DEC, CODECS_ALL, MSM_VIDC_META_DISABLE, @@ -1785,7 +1785,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_PICTURE_TYPE, HFI_PROP_PICTURE_TYPE, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_SEI_MASTERING_DISP, ENC, HEVC|HEIC, MSM_VIDC_META_DISABLE, @@ -1793,7 +1793,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_SEI_MASTERING_DISPLAY_COLOUR, HFI_PROP_SEI_MASTERING_DISPLAY_COLOUR, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_SEI_MASTERING_DISP, DEC, HEVC|HEIC|AV1, MSM_VIDC_META_DISABLE, @@ -1802,7 +1802,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_SEI_MASTERING_DISPLAY_COLOUR, HFI_PROP_SEI_MASTERING_DISPLAY_COLOUR, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_SEI_CLL, ENC, HEVC|HEIC, MSM_VIDC_META_DISABLE, @@ -1810,7 +1810,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_SEI_CONTENT_LIGHT_LEVEL, HFI_PROP_SEI_CONTENT_LIGHT_LEVEL, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_SEI_CLL, DEC, HEVC|HEIC|AV1, MSM_VIDC_META_DISABLE, @@ -1819,7 +1819,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_SEI_CONTENT_LIGHT_LEVEL, HFI_PROP_SEI_CONTENT_LIGHT_LEVEL, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_HDR10PLUS, ENC, HEVC|HEIC, MSM_VIDC_META_DISABLE, @@ -1827,7 +1827,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_HDR10PLUS, HFI_PROP_SEI_HDR10PLUS_USERDATA, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_HDR10PLUS, DEC, HEVC|HEIC|AV1, MSM_VIDC_META_DISABLE, @@ -1836,7 +1836,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_HDR10PLUS, HFI_PROP_SEI_HDR10PLUS_USERDATA, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_DOLBY_RPU, ENC, HEVC, MSM_VIDC_META_DISABLE, @@ -1844,7 +1844,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_DOLBY_RPU, HFI_PROP_DOLBY_RPU_METADATA, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_DOLBY_RPU, DEC, H264|HEVC, MSM_VIDC_META_DISABLE, @@ -1852,7 +1852,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_DOLBY_RPU, HFI_PROP_DOLBY_RPU_METADATA, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_EVA_STATS, ENC, CODECS_ALL, MSM_VIDC_META_DISABLE, @@ -1860,7 +1860,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_EVA_STATS, HFI_PROP_EVA_STAT_INFO, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_BUF_TAG, ENC, CODECS_ALL, MSM_VIDC_META_DISABLE, @@ -1869,7 +1869,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_BUFFER_TAG, HFI_PROP_BUFFER_TAG, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, /* * when fence enabled, client needs output buffer_tag @@ -1883,7 +1883,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_BUFFER_TAG, HFI_PROP_BUFFER_TAG, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_DPB_TAG_LIST, DEC, CODECS_ALL, MSM_VIDC_META_DISABLE, @@ -1891,7 +1891,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_DPB_TAG_LIST, HFI_PROP_DPB_TAG_LIST, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_SUBFRAME_OUTPUT, ENC, HEIC | H264 | HEVC, MSM_VIDC_META_DISABLE, @@ -1899,7 +1899,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_SUBFRAME_OUTPUT, HFI_PROP_SUBFRAME_OUTPUT, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_SUBFRAME_OUTPUT, DEC, CODECS_ALL, MSM_VIDC_META_DISABLE, @@ -1907,7 +1907,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_SUBFRAME_OUTPUT, HFI_PROP_SUBFRAME_OUTPUT, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_ENC_QP_METADATA, ENC, CODECS_ALL, MSM_VIDC_META_DISABLE, @@ -1915,7 +1915,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_ENC_QP_METADATA, HFI_PROP_ENC_QP_METADATA, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_ROI_INFO, ENC, H264|HEVC, MSM_VIDC_META_DISABLE, @@ -1923,7 +1923,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_ROI_INFO, HFI_PROP_ROI_INFO, - CAP_FLAG_INPUT_PORT | CAP_FLAG_BITMASK}, + CAP_FLAG_INPUT_PORT | CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_SALIENCY_INFO, ENC, H264|HEVC, MSM_VIDC_META_DISABLE, @@ -1931,7 +1931,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_SALIENCY_INFO, HFI_PROP_ROI_AS_SALIENCY_INFO, - CAP_FLAG_INPUT_PORT | CAP_FLAG_BITMASK}, + CAP_FLAG_INPUT_PORT | CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_DEC_QP_METADATA, DEC, CODECS_ALL, MSM_VIDC_META_DISABLE, @@ -1939,7 +1939,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_DEC_QP_METADATA, HFI_PROP_DEC_QP_METADATA, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {GRID, ENC, HEIC, 0, 1, 1, 1, @@ -1958,7 +1958,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_MAX_NUM_REORDER_FRAMES, HFI_PROP_MAX_NUM_REORDER_FRAMES, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {DELIVERY_MODE, ENC, HEVC, 0, 1, 1, 0, diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 69863e467a..c310605a1a 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -314,7 +314,7 @@ static struct msm_platform_inst_capability instance_cap_data_waipio[] = { 0, V4L2_MPEG_VIDC_META_DISABLE, 0, 0, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {TS_REORDER, DEC, H264|HEVC, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, @@ -1352,7 +1352,7 @@ static struct msm_platform_inst_capability instance_cap_data_waipio[] = { 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_LTR_MARK_USE_DETAILS, HFI_PROP_LTR_MARK_USE_DETAILS, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_SEQ_HDR_NAL, ENC, CODECS_ALL, V4L2_MPEG_VIDC_META_DISABLE, @@ -1360,7 +1360,7 @@ static struct msm_platform_inst_capability instance_cap_data_waipio[] = { 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_SEQ_HEADER_NAL, HFI_PROP_METADATA_SEQ_HEADER_NAL, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_DPB_MISR, DEC, CODECS_ALL, V4L2_MPEG_VIDC_META_DISABLE, @@ -1368,7 +1368,7 @@ static struct msm_platform_inst_capability instance_cap_data_waipio[] = { 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_DPB_LUMA_CHROMA_MISR, HFI_PROP_DPB_LUMA_CHROMA_MISR, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_OPB_MISR, DEC, CODECS_ALL, V4L2_MPEG_VIDC_META_DISABLE, @@ -1376,7 +1376,7 @@ static struct msm_platform_inst_capability instance_cap_data_waipio[] = { 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_OPB_LUMA_CHROMA_MISR, HFI_PROP_OPB_LUMA_CHROMA_MISR, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_INTERLACE, DEC, H264, V4L2_MPEG_VIDC_META_DISABLE, @@ -1384,7 +1384,7 @@ static struct msm_platform_inst_capability instance_cap_data_waipio[] = { 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_INTERLACE, HFI_PROP_INTERLACE_INFO, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_TIMESTAMP, DEC | ENC, CODECS_ALL, V4L2_MPEG_VIDC_META_DISABLE, @@ -1392,7 +1392,7 @@ static struct msm_platform_inst_capability instance_cap_data_waipio[] = { 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_TIMESTAMP, HFI_PROP_TIMESTAMP, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_CONCEALED_MB_CNT, DEC, CODECS_ALL, V4L2_MPEG_VIDC_META_DISABLE, @@ -1400,7 +1400,7 @@ static struct msm_platform_inst_capability instance_cap_data_waipio[] = { 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_CONCEALED_MB_COUNT, HFI_PROP_CONEALED_MB_COUNT, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_HIST_INFO, DEC, CODECS_ALL, V4L2_MPEG_VIDC_META_DISABLE, @@ -1408,7 +1408,7 @@ static struct msm_platform_inst_capability instance_cap_data_waipio[] = { 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_HISTOGRAM_INFO, HFI_PROP_HISTOGRAM_INFO, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_SEI_MASTERING_DISP, ENC, HEVC|HEIC, V4L2_MPEG_VIDC_META_DISABLE, @@ -1416,7 +1416,7 @@ static struct msm_platform_inst_capability instance_cap_data_waipio[] = { 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_SEI_MASTERING_DISPLAY_COLOUR, HFI_PROP_SEI_MASTERING_DISPLAY_COLOUR, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_SEI_MASTERING_DISP, DEC, HEVC|HEIC, V4L2_MPEG_VIDC_META_DISABLE, @@ -1425,7 +1425,7 @@ static struct msm_platform_inst_capability instance_cap_data_waipio[] = { 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_SEI_MASTERING_DISPLAY_COLOUR, HFI_PROP_SEI_MASTERING_DISPLAY_COLOUR, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_SEI_CLL, ENC, HEVC|HEIC, V4L2_MPEG_VIDC_META_DISABLE, @@ -1433,7 +1433,7 @@ static struct msm_platform_inst_capability instance_cap_data_waipio[] = { 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_SEI_CONTENT_LIGHT_LEVEL, HFI_PROP_SEI_CONTENT_LIGHT_LEVEL, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_SEI_CLL, DEC, HEVC|HEIC, V4L2_MPEG_VIDC_META_DISABLE, @@ -1442,7 +1442,7 @@ static struct msm_platform_inst_capability instance_cap_data_waipio[] = { 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_SEI_CONTENT_LIGHT_LEVEL, HFI_PROP_SEI_CONTENT_LIGHT_LEVEL, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_HDR10PLUS, ENC, HEVC|HEIC, V4L2_MPEG_VIDC_META_DISABLE, @@ -1450,7 +1450,7 @@ static struct msm_platform_inst_capability instance_cap_data_waipio[] = { 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_HDR10PLUS, HFI_PROP_SEI_HDR10PLUS_USERDATA, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_HDR10PLUS, DEC, HEVC|HEIC, V4L2_MPEG_VIDC_META_DISABLE, @@ -1459,7 +1459,7 @@ static struct msm_platform_inst_capability instance_cap_data_waipio[] = { 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_HDR10PLUS, HFI_PROP_SEI_HDR10PLUS_USERDATA, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_EVA_STATS, ENC, CODECS_ALL, V4L2_MPEG_VIDC_META_DISABLE, @@ -1467,7 +1467,7 @@ static struct msm_platform_inst_capability instance_cap_data_waipio[] = { 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_EVA_STATS, HFI_PROP_EVA_STAT_INFO, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_BUF_TAG, ENC, CODECS_ALL, V4L2_MPEG_VIDC_META_DISABLE, @@ -1476,7 +1476,7 @@ static struct msm_platform_inst_capability instance_cap_data_waipio[] = { 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_BUFFER_TAG, HFI_PROP_BUFFER_TAG, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_BUF_TAG, DEC, CODECS_ALL, V4L2_MPEG_VIDC_META_DISABLE, @@ -1486,7 +1486,7 @@ static struct msm_platform_inst_capability instance_cap_data_waipio[] = { 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_BUFFER_TAG, HFI_PROP_BUFFER_TAG, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_DPB_TAG_LIST, DEC, CODECS_ALL, V4L2_MPEG_VIDC_META_DISABLE, @@ -1494,7 +1494,7 @@ static struct msm_platform_inst_capability instance_cap_data_waipio[] = { 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_DPB_TAG_LIST, HFI_PROP_DPB_TAG_LIST, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_SUBFRAME_OUTPUT, ENC, HEIC, V4L2_MPEG_VIDC_META_DISABLE, @@ -1502,7 +1502,7 @@ static struct msm_platform_inst_capability instance_cap_data_waipio[] = { 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_SUBFRAME_OUTPUT, HFI_PROP_SUBFRAME_OUTPUT, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_SUBFRAME_OUTPUT, DEC, CODECS_ALL, V4L2_MPEG_VIDC_META_DISABLE, @@ -1510,7 +1510,7 @@ static struct msm_platform_inst_capability instance_cap_data_waipio[] = { 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_SUBFRAME_OUTPUT, HFI_PROP_SUBFRAME_OUTPUT, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_ENC_QP_METADATA, ENC, CODECS_ALL, V4L2_MPEG_VIDC_META_DISABLE, @@ -1518,7 +1518,7 @@ static struct msm_platform_inst_capability instance_cap_data_waipio[] = { 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_ENC_QP_METADATA, HFI_PROP_ENC_QP_METADATA, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_ROI_INFO, ENC, CODECS_ALL, V4L2_MPEG_VIDC_META_DISABLE, @@ -1526,7 +1526,7 @@ static struct msm_platform_inst_capability instance_cap_data_waipio[] = { 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_ROI_INFO, HFI_PROP_ROI_INFO, - CAP_FLAG_INPUT_PORT | CAP_FLAG_BITMASK}, + CAP_FLAG_INPUT_PORT | CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_SALIENCY_INFO, ENC, H264|HEVC, V4L2_MPEG_VIDC_META_DISABLE, @@ -1534,7 +1534,7 @@ static struct msm_platform_inst_capability instance_cap_data_waipio[] = { 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_SALIENCY_INFO, HFI_PROP_ROI_AS_SALIENCY_INFO, - CAP_FLAG_INPUT_PORT | CAP_FLAG_BITMASK}, + CAP_FLAG_INPUT_PORT | CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_DEC_QP_METADATA, DEC, CODECS_ALL, V4L2_MPEG_VIDC_META_DISABLE, @@ -1542,7 +1542,7 @@ static struct msm_platform_inst_capability instance_cap_data_waipio[] = { 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_DEC_QP_METADATA, HFI_PROP_DEC_QP_METADATA, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {GRID, ENC, HEIC, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, @@ -1562,7 +1562,7 @@ static struct msm_platform_inst_capability instance_cap_data_waipio[] = { 0, V4L2_MPEG_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_MAX_NUM_REORDER_FRAMES, HFI_PROP_MAX_NUM_REORDER_FRAMES, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, }; static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_waipio[] = { diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index f658feee63..2210b9e4b2 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -100,9 +100,9 @@ static inline bool is_internal_buffer(enum msm_vidc_buffer_type buffer_type) buffer_type == MSM_VIDC_BUF_PARTIAL_DATA; } -static inline bool is_meta_cap(u32 cap) +static inline bool is_meta_cap(struct msm_vidc_inst *inst, u32 cap) { - if (cap > INST_CAP_NONE && cap < META_CAP_MAX) + if (inst->capabilities->cap[cap].flags & CAP_FLAG_META) return true; return false; @@ -112,6 +112,9 @@ static inline bool is_meta_rx_inp_enabled(struct msm_vidc_inst *inst, u32 cap) { bool enabled = false; + if (!is_meta_cap(inst, cap)) + return false; + if (inst->capabilities->cap[cap].value & MSM_VIDC_META_ENABLE && inst->capabilities->cap[cap].value & MSM_VIDC_META_RX_INPUT) enabled = true; @@ -123,6 +126,9 @@ static inline bool is_meta_rx_out_enabled(struct msm_vidc_inst *inst, u32 cap) { bool enabled = false; + if (!is_meta_cap(inst, cap)) + return false; + if (inst->capabilities->cap[cap].value & MSM_VIDC_META_ENABLE && inst->capabilities->cap[cap].value & MSM_VIDC_META_RX_OUTPUT) enabled = true; @@ -134,6 +140,9 @@ static inline bool is_meta_tx_inp_enabled(struct msm_vidc_inst *inst, u32 cap) { bool enabled = false; + if (!is_meta_cap(inst, cap)) + return false; + if (inst->capabilities->cap[cap].value & MSM_VIDC_META_ENABLE && inst->capabilities->cap[cap].value & MSM_VIDC_META_TX_INPUT) enabled = true; @@ -145,6 +154,9 @@ static inline bool is_meta_tx_out_enabled(struct msm_vidc_inst *inst, u32 cap) { bool enabled = false; + if (!is_meta_cap(inst, cap)) + return false; + if (inst->capabilities->cap[cap].value & MSM_VIDC_META_ENABLE && inst->capabilities->cap[cap].value & MSM_VIDC_META_TX_OUTPUT) enabled = true; @@ -157,7 +169,7 @@ static inline bool is_any_meta_tx_out_enabled(struct msm_vidc_inst *inst) bool enabled = false; u32 i; - for (i = INST_CAP_NONE + 1; i < META_CAP_MAX; i++) { + for (i = INST_CAP_NONE + 1; i < INST_CAP_MAX; i++) { if (is_meta_tx_out_enabled(inst, i)) { enabled = true; break; @@ -172,7 +184,7 @@ static inline bool is_any_meta_tx_inp_enabled(struct msm_vidc_inst *inst) bool enabled = false; u32 i; - for (i = INST_CAP_NONE + 1; i < META_CAP_MAX; i++) { + for (i = INST_CAP_NONE + 1; i < INST_CAP_MAX; i++) { if (is_meta_tx_inp_enabled(inst, i)) { enabled = true; break; @@ -187,7 +199,7 @@ static inline bool is_input_meta_enabled(struct msm_vidc_inst *inst) bool enabled = false; u32 i; - for (i = INST_CAP_NONE + 1; i < META_CAP_MAX; i++) { + for (i = INST_CAP_NONE + 1; i < INST_CAP_MAX; i++) { if (is_meta_tx_inp_enabled(inst, i) || is_meta_rx_inp_enabled(inst, i)) { enabled = true; @@ -203,7 +215,7 @@ static inline bool is_output_meta_enabled(struct msm_vidc_inst *inst) bool enabled = false; u32 i; - for (i = INST_CAP_NONE + 1; i < META_CAP_MAX; i++) { + for (i = INST_CAP_NONE + 1; i < INST_CAP_MAX; i++) { if (is_meta_tx_out_enabled(inst, i) || is_meta_rx_out_enabled(inst, i)) { enabled = true; diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 73c54c763a..218a51d374 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -389,7 +389,6 @@ enum msm_vidc_core_capability_type { enum msm_vidc_inst_capability_type { INST_CAP_NONE = 0, /* place all metadata after this line - * (Between INST_CAP_NONE and META_CAP_MAX) */ META_SEQ_HDR_NAL, META_BITSTREAM_RESOLUTION, @@ -417,7 +416,6 @@ enum msm_vidc_inst_capability_type { META_SALIENCY_INFO, META_TRANSCODING_STAT_INFO, META_DOLBY_RPU, - META_CAP_MAX, /* end of metadata caps */ FRAME_WIDTH, LOSSLESS_FRAME_WIDTH, @@ -581,6 +579,7 @@ enum msm_vidc_inst_capability_flags { CAP_FLAG_CLIENT_SET = BIT(4), CAP_FLAG_BITMASK = BIT(5), CAP_FLAG_VOLATILE = BIT(6), + CAP_FLAG_META = BIT(7), }; struct msm_vidc_inst_cap { diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index b7d65e5d58..6473e1ff6e 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -1008,7 +1008,7 @@ static int msm_vdec_subscribe_metadata(struct msm_vidc_inst *inst, capability = inst->capabilities; payload[0] = HFI_MODE_METADATA; if (port == INPUT_PORT) { - for (i = INST_CAP_NONE + 1; i < META_CAP_MAX; i++) { + for (i = INST_CAP_NONE + 1; i < INST_CAP_MAX; i++) { if (is_meta_rx_inp_enabled(inst, i) && msm_vidc_allow_metadata_subscription( inst, i, port)) { @@ -1017,7 +1017,7 @@ static int msm_vdec_subscribe_metadata(struct msm_vidc_inst *inst, } } } else if (port == OUTPUT_PORT) { - for (i = INST_CAP_NONE + 1; i < META_CAP_MAX; i++) { + for (i = INST_CAP_NONE + 1; i < INST_CAP_MAX; i++) { if (is_meta_rx_out_enabled(inst, i) && msm_vidc_allow_metadata_subscription( inst, i, port)) { @@ -1060,14 +1060,14 @@ static int msm_vdec_set_delivery_mode_metadata(struct msm_vidc_inst *inst, payload[0] = HFI_MODE_METADATA; if (port == INPUT_PORT) { - for (i = INST_CAP_NONE + 1; i < META_CAP_MAX; i++) { + for (i = INST_CAP_NONE + 1; i < INST_CAP_MAX; i++) { if (is_meta_tx_inp_enabled(inst, i)) { payload[count + 1] = capability->cap[i].hfi_id; count++; } } } else if (port == OUTPUT_PORT) { - for (i = INST_CAP_NONE + 1; i < META_CAP_MAX; i++) { + for (i = INST_CAP_NONE + 1; i < INST_CAP_MAX; i++) { if (is_meta_tx_out_enabled(inst, i) && msm_vidc_allow_metadata_delivery( inst, i, port)) { diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index 77ac058d66..46d2d2419c 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -710,14 +710,14 @@ static int msm_venc_metadata_delivery(struct msm_vidc_inst *inst, payload[0] = HFI_MODE_METADATA; if (port == INPUT_PORT) { - for (i = INST_CAP_NONE + 1; i < META_CAP_MAX; i++) { + for (i = INST_CAP_NONE + 1; i < INST_CAP_MAX; i++) { if (is_meta_tx_inp_enabled(inst, i)) { payload[count + 1] = capability->cap[i].hfi_id; count++; } } } else if (port == OUTPUT_PORT) { - for (i = INST_CAP_NONE + 1; i < META_CAP_MAX; i++) { + for (i = INST_CAP_NONE + 1; i < INST_CAP_MAX; i++) { if (is_meta_tx_out_enabled(inst, i)) { payload[count + 1] = capability->cap[i].hfi_id; count++; @@ -758,14 +758,14 @@ static int msm_venc_metadata_subscription(struct msm_vidc_inst *inst, payload[0] = HFI_MODE_METADATA; if (port == INPUT_PORT) { - for (i = INST_CAP_NONE + 1; i < META_CAP_MAX; i++) { + for (i = INST_CAP_NONE + 1; i < INST_CAP_MAX; i++) { if (is_meta_rx_inp_enabled(inst, i)) { payload[count + 1] = capability->cap[i].hfi_id; count++; } } } else if (port == OUTPUT_PORT) { - for (i = INST_CAP_NONE + 1; i < META_CAP_MAX; i++) { + for (i = INST_CAP_NONE + 1; i < INST_CAP_MAX; i++) { if (is_meta_rx_out_enabled(inst, i)) { payload[count + 1] = capability->cap[i].hfi_id; count++; diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 10230bbbf4..2692a044ec 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -418,7 +418,7 @@ int msm_vidc_update_cap_value(struct msm_vidc_inst *inst, u32 cap_id, prev_value = inst->capabilities->cap[cap_id].value; - if (is_meta_cap(cap_id)) { + if (is_meta_cap(inst, cap_id)) { /* * cumulative control value if client set same metadata * control multiple times. @@ -808,7 +808,7 @@ int msm_vidc_ctrl_init(struct msm_vidc_inst *inst) ctrl_cfg.type = V4L2_CTRL_TYPE_BITMASK; else ctrl_cfg.type = V4L2_CTRL_TYPE_INTEGER; - if (is_meta_cap(idx)) { + if (is_meta_cap(inst, idx)) { /* bitmask is expected to be enabled for meta controls */ if (ctrl_cfg.type != V4L2_CTRL_TYPE_BITMASK) { i_vpr_e(inst, @@ -1078,7 +1078,7 @@ static int msm_vidc_update_static_property(struct msm_vidc_inst *inst, msm_vidc_update_cap_value(inst, LAYER_ENABLE, enable, __func__); } - if (is_meta_cap(cap_id)) { + if (is_meta_cap(inst, cap_id)) { rc = msm_vidc_update_meta_port_settings(inst); if (rc) return rc; diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 1675f6b18e..6482af8cc5 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -83,7 +83,6 @@ static const struct msm_vidc_cap_name cap_name_arr[] = { {META_SALIENCY_INFO, "META_SALIENCY_INFO" }, {META_TRANSCODING_STAT_INFO, "META_TRANSCODING_STAT_INFO" }, {META_DOLBY_RPU, "META_DOLBY_RPU" }, - {META_CAP_MAX, "META_CAP_MAX" }, {FRAME_WIDTH, "FRAME_WIDTH" }, {LOSSLESS_FRAME_WIDTH, "LOSSLESS_FRAME_WIDTH" }, {SECURE_FRAME_WIDTH, "SECURE_FRAME_WIDTH" }, From 1aedac8e6e638c5ada69b17a2ea0eed1b009a8a3 Mon Sep 17 00:00:00 2001 From: Dikshita Agarwal Date: Wed, 24 Aug 2022 15:33:57 +0530 Subject: [PATCH 0716/1061] video: driver: add support for standard compressed formats Add support for standard compressed formats in upstream. remove usage of not supported codecs HEIC and AV1 from upstream database file. Change-Id: I11b29990f439dc2b43d5dcdb70a4e7d47bbf3970 Signed-off-by: Dikshita Agarwal --- driver/platform/kalama/src/kalama.c | 284 ++++++---------------------- 1 file changed, 60 insertions(+), 224 deletions(-) diff --git a/driver/platform/kalama/src/kalama.c b/driver/platform/kalama/src/kalama.c index 39921787b0..5b953c0005 100644 --- a/driver/platform/kalama/src/kalama.c +++ b/driver/platform/kalama/src/kalama.c @@ -35,11 +35,17 @@ #define H264 MSM_VIDC_H264 #define HEVC MSM_VIDC_HEVC #define VP9 MSM_VIDC_VP9 -#define AV1 MSM_VIDC_AV1 -#define HEIC MSM_VIDC_HEIC -#define CODECS_ALL (H264 | HEVC | VP9 | HEIC | AV1) +#define CODECS_ALL (H264 | HEVC | VP9) #define MAXIMUM_OVERRIDE_VP9_FPS 180 +#ifndef V4L2_PIX_FMT_QC08C +#define V4L2_PIX_FMT_QC08C v4l2_fourcc('Q', '0', '8', 'C') /* Qualcomm 8-bit compressed */ +#endif + +#ifndef V4L2_PIX_FMT_QC10C +#define V4L2_PIX_FMT_QC10C v4l2_fourcc('Q', '1', '0', 'C') /* Qualcomm 10-bit compressed */ +#endif + static struct codec_info codec_data_kalama[] = { { .v4l2_codec = V4L2_PIX_FMT_H264, @@ -69,6 +75,16 @@ static struct color_format_info color_format_data_kalama[] = { .vidc_color_format = MSM_VIDC_FMT_NV21, .pixfmt_name = "NV21", }, + { + .v4l2_color_format = V4L2_PIX_FMT_QC08C, + .vidc_color_format = MSM_VIDC_FMT_NV12C, + .pixfmt_name = "NV12C", + }, + { + .v4l2_color_format = V4L2_PIX_FMT_QC10C, + .vidc_color_format = MSM_VIDC_FMT_TP10C, + .pixfmt_name = "TP10C", + }, { .v4l2_color_format = V4L2_PIX_FMT_RGBA32, .vidc_color_format = MSM_VIDC_FMT_RGBA8888, @@ -171,8 +187,8 @@ static struct matrix_coeff_info matrix_coeff_data_kalama[] = { static struct msm_platform_core_capability core_data_kalama[] = { /* {type, value} */ - {ENC_CODECS, H264|HEVC|HEIC}, - {DEC_CODECS, H264|HEVC|VP9|AV1|HEIC}, + {ENC_CODECS, H264|HEVC}, + {DEC_CODECS, H264|HEVC|VP9}, {MAX_SESSION_COUNT, 16}, {MAX_NUM_720P_SESSIONS, 16}, {MAX_NUM_1080P_SESSIONS, 16}, @@ -221,8 +237,6 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { {FRAME_WIDTH, ENC, HEVC, 96, 8192, 1, 1920}, - {FRAME_WIDTH, ENC, HEIC, 128, 16384, 1, 16384}, - {LOSSLESS_FRAME_WIDTH, ENC, CODECS_ALL, 128, 4096, 1, 1920}, {LOSSLESS_FRAME_WIDTH, ENC, HEVC, 96, 4096, 1, 1920}, @@ -235,8 +249,6 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { {FRAME_HEIGHT, ENC, HEVC, 96, 8192, 1, 1080}, - {FRAME_HEIGHT, ENC, HEIC, 128, 16384, 1, 16384}, - {LOSSLESS_FRAME_HEIGHT, ENC, CODECS_ALL, 128, 4096, 1, 1080}, {LOSSLESS_FRAME_HEIGHT, ENC, HEVC, 96, 4096, 1, 1080}, @@ -247,24 +259,11 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C, MSM_VIDC_FMT_NV12C}, - {PIX_FMTS, ENC|DEC, HEVC|VP9|AV1, + {PIX_FMTS, ENC|DEC, HEVC|VP9, MSM_VIDC_FMT_NV12, MSM_VIDC_FMT_TP10C, MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C | - MSM_VIDC_FMT_P010 | MSM_VIDC_FMT_TP10C, - MSM_VIDC_FMT_NV12C}, - - {PIX_FMTS, ENC, HEIC, - MSM_VIDC_FMT_NV12, - MSM_VIDC_FMT_P010, - MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_P010, - MSM_VIDC_FMT_NV12}, - - {PIX_FMTS, DEC, HEIC, - MSM_VIDC_FMT_NV12, MSM_VIDC_FMT_TP10C, - MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C | - MSM_VIDC_FMT_P010 | MSM_VIDC_FMT_TP10C, MSM_VIDC_FMT_NV12C}, {MIN_BUFFERS_INPUT, ENC|DEC, CODECS_ALL, 0, 64, 1, 4, @@ -272,10 +271,6 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { 0, CAP_FLAG_VOLATILE}, - {MIN_BUFFERS_INPUT, ENC|DEC, HEIC, 0, 64, 1, 1, - V4L2_CID_MIN_BUFFERS_FOR_OUTPUT, - 0, - CAP_FLAG_VOLATILE}, {MIN_BUFFERS_OUTPUT, ENC|DEC, CODECS_ALL, 0, 64, 1, 4, @@ -288,44 +283,32 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { {MBPF, ENC, HEVC, 36, 138240, 1, 138240}, - /* ((16384x16384)/256) */ - {MBPF, ENC, HEIC, 36, 1048576, 1, 1048576}, - {MBPF, DEC, CODECS_ALL, 36, 138240, 1, 138240}, /* (4096 * 2304) / 256 */ {MBPF, DEC, VP9, 36, 36864, 1, 36864}, - /* ((8192x8192)/256) */ - {MBPF, DEC, HEIC, 64, 262144, 1, 262144 }, - /* (4096 * 2304) / 256 */ {LOSSLESS_MBPF, ENC, H264|HEVC, 64, 36864, 1, 36864}, /* Batch Mode Decode */ /* TODO: update with new values based on updated voltage corner */ - {BATCH_MBPF, DEC, H264|HEVC|VP9|AV1, 64, 34816, 1, 34816}, + {BATCH_MBPF, DEC, H264|HEVC|VP9, 64, 34816, 1, 34816}, /* (4096 * 2304) / 256 */ - {BATCH_FPS, DEC, H264|HEVC|VP9|AV1, 1, 120, 1, 120}, + {BATCH_FPS, DEC, H264|HEVC|VP9, 1, 120, 1, 120}, /* ((1920 * 1088) / 256) * 480 fps */ {MBPS, ENC, CODECS_ALL, 64, 3916800, 1, 3916800}, {MBPS, ENC, HEVC, 36, 3916800, 1, 3916800}, - /* ((16384x16384)/256)@1fps */ - {MBPS, ENC, HEIC, 36, 1048576, 1, 1048576}, - /* ((1920 * 1088) / 256) * 960 fps */ {MBPS, DEC, CODECS_ALL, 64, 7833600, 1, 7833600}, /* ((4096 * 2304) / 256) * 120 */ {MBPS, DEC, VP9, 36, 4423680, 1, 4423680}, - /* ((8192x8192)/256)@1fps */ - {MBPS, DEC, HEIC, 64, 262144, 1, 262144 }, - /* Enable check mbps for encoder */ {CHECK_MBPS, ENC, CODECS_ALL, 0, 1, 1, 1}, @@ -339,13 +322,6 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { HFI_PROP_FRAME_RATE, CAP_FLAG_OUTPUT_PORT}, - {FRAME_RATE, ENC, HEIC, - (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), - 1, (MINIMUM_FPS << 16), - 0, - HFI_PROP_FRAME_RATE, - CAP_FLAG_OUTPUT_PORT}, - {OPERATING_RATE, ENC, CODECS_ALL, (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), 1, (DEFAULT_FPS << 16)}, @@ -364,7 +340,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { {MB_CYCLES_VSP, DEC, CODECS_ALL, 25, 25, 1, 25}, - {MB_CYCLES_VSP, DEC, VP9|AV1, 60, 60, 1, 60}, + {MB_CYCLES_VSP, DEC, VP9, 60, 60, 1, 60}, {MB_CYCLES_VPP, ENC, CODECS_ALL, 675, 675, 1, 675}, @@ -434,12 +410,6 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { HFI_PROP_NAL_LENGTH_FIELD, CAP_FLAG_OUTPUT_PORT}, - {WITHOUT_STARTCODE, DEC, AV1, - 0, 1, 1, 0, - V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE, - HFI_PROP_NAL_LENGTH_FIELD, - CAP_FLAG_INPUT_PORT}, - {NAL_LENGTH_FIELD, ENC, CODECS_ALL, V4L2_MPEG_VIDEO_HEVC_SIZE_0, V4L2_MPEG_VIDEO_HEVC_SIZE_4, @@ -490,15 +460,6 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { HFI_PROP_RATE_CONTROL, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - {BITRATE_MODE, ENC, HEIC, - V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, - V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, - BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CQ), - V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, - V4L2_CID_MPEG_VIDEO_BITRATE_MODE, - HFI_PROP_RATE_CONTROL, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - {CABAC_MAX_BITRATE, ENC, H264|HEVC, 0, 160000000, 1, 160000000}, @@ -515,7 +476,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { 0, 1, 1, 0, V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU}, - {FRAME_SKIP_MODE, ENC, H264|HEVC|HEIC, + {FRAME_SKIP_MODE, ENC, H264|HEVC, V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED, V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT, BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED) | @@ -526,7 +487,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { 0, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - {FRAME_RC_ENABLE, ENC, H264|HEVC|HEIC, + {FRAME_RC_ENABLE, ENC, H264|HEVC, 0, 1, 1, 1, V4L2_CID_MPEG_VIDEO_FRAME_RC_ENABLE}, @@ -537,13 +498,6 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - {CONSTANT_QUALITY, ENC, HEIC, - 1, MAX_CONSTANT_QUALITY, 1, 100, - V4L2_CID_MPEG_VIDEO_CONSTANT_QUALITY, - HFI_PROP_CONSTANT_QUALITY, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - {GOP_SIZE, ENC, CODECS_ALL, 0, INT_MAX, 1, 2 * DEFAULT_FPS - 1, V4L2_CID_MPEG_VIDEO_GOP_SIZE, @@ -551,13 +505,6 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - {GOP_SIZE, ENC, HEIC, - 0, INT_MAX, 1, 0 /* all intra */, - V4L2_CID_MPEG_VIDEO_GOP_SIZE, - HFI_PROP_MAX_GOP_FRAMES, - CAP_FLAG_OUTPUT_PORT | - CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - {GOP_CLOSURE, ENC, H264|HEVC, 0, 1, 1, 1, V4L2_CID_MPEG_VIDEO_GOP_CLOSURE, @@ -569,12 +516,6 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { HFI_PROP_MAX_B_FRAMES, CAP_FLAG_OUTPUT_PORT}, - {B_FRAME, ENC, HEIC, - 0, 1, 1, 0, - V4L2_CID_MPEG_VIDEO_B_FRAMES, - HFI_PROP_MAX_B_FRAMES, - CAP_FLAG_OUTPUT_PORT}, - {BLUR_TYPES, ENC, H264|HEVC, MSM_VIDC_BLUR_NONE, MSM_VIDC_BLUR_EXTERNAL, BIT(MSM_VIDC_BLUR_NONE) | BIT(MSM_VIDC_BLUR_EXTERNAL), @@ -594,7 +535,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { 0, CAP_FLAG_NONE}, - {LOWLATENCY_MODE, DEC, H264|HEVC|VP9|AV1, + {LOWLATENCY_MODE, DEC, H264|HEVC|VP9, 0, 1, 1, 0, 0, HFI_PROP_SEQ_CHANGE_AT_SYNC_FRAME, @@ -675,7 +616,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { HFI_PROP_MIN_QP_PACKED, CAP_FLAG_OUTPUT_PORT}, - {MIN_FRAME_QP, ENC, HEVC|HEIC, + {MIN_FRAME_QP, ENC, HEVC, MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP, HFI_PROP_MIN_QP_PACKED, @@ -685,7 +626,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, V4L2_CID_MPEG_VIDEO_H264_I_FRAME_MIN_QP}, - {I_FRAME_MIN_QP, ENC, HEVC|HEIC, + {I_FRAME_MIN_QP, ENC, HEVC, MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_MIN_QP}, @@ -693,7 +634,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, V4L2_CID_MPEG_VIDEO_H264_P_FRAME_MIN_QP}, - {P_FRAME_MIN_QP, ENC, HEVC|HEIC, + {P_FRAME_MIN_QP, ENC, HEVC, MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_MIN_QP}, @@ -701,7 +642,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, V4L2_CID_MPEG_VIDEO_H264_B_FRAME_MIN_QP}, - {B_FRAME_MIN_QP, ENC, HEVC|HEIC, + {B_FRAME_MIN_QP, ENC, HEVC, MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_MIN_QP}, @@ -711,7 +652,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { HFI_PROP_MAX_QP_PACKED, CAP_FLAG_OUTPUT_PORT}, - {MAX_FRAME_QP, ENC, HEVC|HEIC, + {MAX_FRAME_QP, ENC, HEVC, MIN_QP_10BIT, MAX_QP, 1, MAX_QP, V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP, HFI_PROP_MAX_QP_PACKED, @@ -721,7 +662,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { MIN_QP_8BIT, MAX_QP, 1, MAX_QP, V4L2_CID_MPEG_VIDEO_H264_I_FRAME_MAX_QP}, - {I_FRAME_MAX_QP, ENC, HEVC|HEIC, + {I_FRAME_MAX_QP, ENC, HEVC, MIN_QP_10BIT, MAX_QP, 1, MAX_QP, V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_MAX_QP}, @@ -729,7 +670,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { MIN_QP_8BIT, MAX_QP, 1, MAX_QP, V4L2_CID_MPEG_VIDEO_H264_P_FRAME_MAX_QP}, - {P_FRAME_MAX_QP, ENC, HEVC|HEIC, + {P_FRAME_MAX_QP, ENC, HEVC, MIN_QP_10BIT, MAX_QP, 1, MAX_QP, V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_MAX_QP}, @@ -737,7 +678,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { MIN_QP_8BIT, MAX_QP, 1, MAX_QP, V4L2_CID_MPEG_VIDEO_H264_B_FRAME_MAX_QP}, - {B_FRAME_MAX_QP, ENC, HEVC|HEIC, + {B_FRAME_MAX_QP, ENC, HEVC, MIN_QP_10BIT, MAX_QP, 1, MAX_QP, V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_MAX_QP}, @@ -829,12 +770,6 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - {ENH_LAYER_COUNT, DEC, AV1, - 0, MAX_OP_POINT, 1, 0, - 0, - HFI_PROP_AV1_OP_POINT, - CAP_FLAG_INPUT_PORT}, - {L0_BR, ENC, H264, 1, MAX_BITRATE, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L0_BR, @@ -928,7 +863,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { HFI_PROP_CABAC_SESSION, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - {ENTROPY_MODE, DEC, H264|HEVC|VP9|AV1, + {ENTROPY_MODE, DEC, H264|HEVC|VP9, V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC, V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC) | @@ -950,7 +885,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { HFI_PROP_PROFILE, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - {PROFILE, ENC|DEC, HEVC|HEIC, + {PROFILE, ENC|DEC, HEVC, V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN, V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE, BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN) | @@ -998,7 +933,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { HFI_PROP_LEVEL, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - {LEVEL, ENC, HEVC|HEIC, + {LEVEL, ENC, HEVC, V4L2_MPEG_VIDEO_HEVC_LEVEL_1, V4L2_MPEG_VIDEO_HEVC_LEVEL_6, BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_1) | @@ -1045,7 +980,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { HFI_PROP_LEVEL, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - {LEVEL, DEC, HEVC|HEIC, + {LEVEL, DEC, HEVC, V4L2_MPEG_VIDEO_HEVC_LEVEL_1, V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2, BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_1) | @@ -1096,15 +1031,6 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { HFI_PROP_TIER, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - {HEVC_TIER, ENC|DEC, HEIC, - V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, - V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, - BIT(V4L2_MPEG_VIDEO_HEVC_TIER_MAIN), - V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, - V4L2_CID_MPEG_VIDEO_HEVC_TIER, - HFI_PROP_TIER, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - {LF_MODE, ENC, H264, V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED, DB_H264_DISABLE_SLICE_BOUNDARY, @@ -1116,7 +1042,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { HFI_PROP_DEBLOCKING_MODE, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - {LF_MODE, ENC, HEVC|HEIC, + {LF_MODE, ENC, HEVC, V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_DISABLED, DB_HEVC_DISABLE_SLICE_BOUNDARY, BIT(V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_DISABLED) | @@ -1131,7 +1057,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { -6, 6, 1, 0, V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_ALPHA}, - {LF_ALPHA, ENC, HEVC|HEIC, + {LF_ALPHA, ENC, HEVC, -6, 6, 1, 0, V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2}, @@ -1139,7 +1065,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { -6, 6, 1, 0, V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_BETA}, - {LF_BETA, ENC, HEVC|HEIC, + {LF_BETA, ENC, HEVC, -6, 6, 1, 0, V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2}, @@ -1154,15 +1080,6 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { 0, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - {SLICE_MODE, ENC, HEIC, - V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, - V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, - BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE), - V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, - V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE, - 0, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - {SLICE_MAX_BYTES, ENC, H264|HEVC, MIN_SLICE_BYTE_SIZE, MAX_SLICE_BYTE_SIZE, 1, MIN_SLICE_BYTE_SIZE, @@ -1195,19 +1112,19 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { HFI_PROP_CHROMA_QP_OFFSET, CAP_FLAG_OUTPUT_PORT}, - {DISPLAY_DELAY_ENABLE, DEC, H264|HEVC|VP9|AV1, + {DISPLAY_DELAY_ENABLE, DEC, H264|HEVC|VP9, 0, 1, 1, 0, V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY_ENABLE, HFI_PROP_DECODE_ORDER_OUTPUT, CAP_FLAG_INPUT_PORT}, - {DISPLAY_DELAY, DEC, H264|HEVC|VP9|AV1, + {DISPLAY_DELAY, DEC, H264|HEVC|VP9, 0, 1, 1, 0, V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY, HFI_PROP_DECODE_ORDER_OUTPUT, CAP_FLAG_INPUT_PORT}, - {OUTPUT_ORDER, DEC, H264|HEVC|VP9|AV1, + {OUTPUT_ORDER, DEC, H264|HEVC|VP9, 0, 1, 1, 0, 0, HFI_PROP_DECODE_ORDER_OUTPUT, @@ -1262,7 +1179,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { MSM_VIDC_POWER_SAVE_MODE, 1, MSM_VIDC_POWER_SAVE_MODE}, - {CODED_FRAMES, DEC, H264|HEVC|HEIC, + {CODED_FRAMES, DEC, H264|HEVC, CODED_FRAMES_PROGRESSIVE, CODED_FRAMES_INTERLACE, 1, CODED_FRAMES_PROGRESSIVE, 0, @@ -1272,7 +1189,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { 0, HFI_PROP_LUMA_CHROMA_BIT_DEPTH}, - {CODEC_CONFIG, DEC, H264|HEVC|HEIC|AV1, 0, 1, 1, 0, + {CODEC_CONFIG, DEC, H264|HEVC, 0, 1, 1, 0, 0, 0, CAP_FLAG_DYNAMIC_ALLOWED}, @@ -1311,35 +1228,12 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { HFI_PROP_DPB_LIST, CAP_FLAG_OUTPUT_PORT}, - {FILM_GRAIN, DEC, AV1, - 0, 1, 1, 0, - 0, - HFI_PROP_AV1_FILM_GRAIN_PRESENT, - CAP_FLAG_VOLATILE}, - - {SUPER_BLOCK, DEC, AV1, - 0, 1, 1, 0, - 0, - HFI_PROP_AV1_SUPER_BLOCK_ENABLED}, - - {DRAP, DEC, AV1, - 0, S32_MAX, 1, 0, - 0, - HFI_PROP_AV1_DRAP_CONFIG, - CAP_FLAG_INPUT_PORT}, - {ALL_INTRA, ENC, H264|HEVC, 0, 1, 1, 0, 0, 0, CAP_FLAG_OUTPUT_PORT}, - {GRID, ENC, HEIC, - 0, 1, 1, 1, - 0, - HFI_PROP_HEIC_GRID_ENABLE, - CAP_FLAG_OUTPUT_PORT}, - {COMPLEXITY, ENC, H264|HEVC, 0, 100, 1, DEFAULT_COMPLEXITY, @@ -1362,11 +1256,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kala {PROFILE, MIN_FRAME_QP, MAX_FRAME_QP, I_FRAME_QP, P_FRAME_QP, B_FRAME_QP, MIN_QUALITY, BLUR_TYPES}}, - {PIX_FMTS, ENC, HEIC, - {0}, - {PROFILE}}, - - {PIX_FMTS, DEC, HEVC|HEIC, + {PIX_FMTS, DEC, HEVC, {0}, {PROFILE}}, @@ -1412,12 +1302,6 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kala NULL, msm_vidc_set_nal_length}, - {WITHOUT_STARTCODE, DEC, AV1, - {0}, - {0}, - NULL, - msm_vidc_set_u32}, - {REQUEST_I_FRAME, ENC, H264|HEVC, {0}, {0}, @@ -1457,13 +1341,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kala msm_vidc_adjust_bitrate_mode, msm_vidc_set_u32_enum}, - {BITRATE_MODE, ENC, HEIC, - {0}, - {CONSTANT_QUALITY}, - msm_vidc_adjust_bitrate_mode, - msm_vidc_set_u32_enum}, - - {CONSTANT_QUALITY, ENC, HEVC|HEIC, + {CONSTANT_QUALITY, ENC, HEVC, {BITRATE_MODE}, {0}, NULL, @@ -1475,24 +1353,12 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kala msm_vidc_adjust_gop_size, msm_vidc_set_gop_size}, - {GOP_SIZE, ENC, HEIC, - {0}, - {0}, - NULL, - msm_vidc_set_u32}, - {B_FRAME, ENC, H264|HEVC, {ENH_LAYER_COUNT}, {ALL_INTRA}, msm_vidc_adjust_b_frame, msm_vidc_set_u32}, - {B_FRAME, ENC, HEIC, - {0}, - {0}, - NULL, - msm_vidc_set_u32}, - {BLUR_TYPES, ENC, H264|HEVC, {PIX_FMTS, BITRATE_MODE, MIN_QUALITY}, {0}, @@ -1505,7 +1371,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kala msm_vidc_adjust_enc_lowlatency_mode, NULL}, - {LOWLATENCY_MODE, DEC, H264|HEVC|VP9|AV1, + {LOWLATENCY_MODE, DEC, H264|HEVC|VP9, {0}, {STAGE}, msm_vidc_adjust_dec_lowlatency_mode, @@ -1577,7 +1443,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kala NULL, msm_vidc_set_min_qp}, - {MIN_FRAME_QP, ENC, HEVC|HEIC, + {MIN_FRAME_QP, ENC, HEVC, {PIX_FMTS}, {0}, msm_vidc_adjust_hevc_min_qp, @@ -1589,7 +1455,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kala NULL, msm_vidc_set_max_qp}, - {MAX_FRAME_QP, ENC, HEVC|HEIC, + {MAX_FRAME_QP, ENC, HEVC, {PIX_FMTS}, {0}, msm_vidc_adjust_hevc_max_qp, @@ -1645,12 +1511,6 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kala msm_vidc_adjust_layer_count, msm_vidc_set_layer_count_and_type}, - {ENH_LAYER_COUNT, DEC, AV1, - {0}, - {0}, - NULL, - msm_vidc_set_u32}, - {L0_BR, ENC, H264|HEVC, {0}, {0}, @@ -1705,13 +1565,13 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kala NULL, msm_vidc_set_u32_enum}, - {PROFILE, ENC|DEC, HEVC|HEIC, + {PROFILE, ENC|DEC, HEVC, {PIX_FMTS}, {0}, msm_vidc_adjust_profile, msm_vidc_set_u32_enum}, - {PROFILE, DEC, VP9|AV1, + {PROFILE, DEC, VP9, {0}, {0}, NULL, @@ -1729,13 +1589,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kala NULL, msm_vidc_set_level}, - {AV1_TIER, DEC, AV1, - {0}, - {0}, - NULL, - msm_vidc_set_u32_enum}, - - {HEVC_TIER, ENC|DEC, HEVC|HEIC, + {HEVC_TIER, ENC|DEC, HEVC, {0}, {0}, NULL, @@ -1753,12 +1607,6 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kala msm_vidc_adjust_slice_count, msm_vidc_set_slice_count}, - {SLICE_MODE, ENC, HEIC, - {0}, - {0}, - msm_vidc_adjust_slice_count, - msm_vidc_set_slice_count}, - {TRANSFORM_8X8, ENC, H264, {PROFILE}, {0}, @@ -1771,19 +1619,19 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kala msm_vidc_adjust_chroma_qp_index_offset, msm_vidc_set_chroma_qp_index_offset}, - {DISPLAY_DELAY_ENABLE, DEC, H264|HEVC|VP9|AV1, + {DISPLAY_DELAY_ENABLE, DEC, H264|HEVC|VP9, {0}, {OUTPUT_ORDER}, NULL, NULL}, - {DISPLAY_DELAY, DEC, H264|HEVC|VP9|AV1, + {DISPLAY_DELAY, DEC, H264|HEVC|VP9, {0}, {OUTPUT_ORDER}, NULL, NULL}, - {OUTPUT_ORDER, DEC, H264|HEVC|VP9|AV1, + {OUTPUT_ORDER, DEC, H264|HEVC|VP9, {THUMBNAIL_MODE, DISPLAY_DELAY, DISPLAY_DELAY_ENABLE}, {0}, msm_vidc_adjust_output_order, @@ -1837,7 +1685,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kala NULL, msm_vidc_set_stage}, - {STAGE, DEC, H264|HEVC|VP9|AV1, + {STAGE, DEC, H264|HEVC|VP9, {LOWLATENCY_MODE}, {0}, NULL, @@ -1873,23 +1721,11 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kala NULL, NULL}, - {DRAP, DEC, AV1, - {0}, - {0}, - NULL, - msm_vidc_set_u32}, - {ALL_INTRA, ENC, H264|HEVC, {GOP_SIZE, B_FRAME}, {LTR_COUNT, SLICE_MODE, BIT_RATE}, msm_vidc_adjust_all_intra, NULL}, - - {GRID, ENC, HEIC, - {0}, - {0}, - NULL, - msm_vidc_set_u32}, }; /* Default UBWC config for LPDDR5 */ From 6b5c62db0cb5229c5439ab95174d6113456a3194 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Thu, 8 Sep 2022 16:02:13 -0700 Subject: [PATCH 0717/1061] video: driver: Introduce DEVICE_CAPS cap in core database Introduce DEVICE_CAPS capability to have different caps support for upstream and downstream driver. Change-Id: Ife73ab8c3b6ef9b47ef844883d9fa18e469d9188 Signed-off-by: Akshata Sahukar --- driver/platform/anorak/src/msm_vidc_anorak.c | 2 ++ driver/platform/kalama/src/kalama.c | 1 + driver/platform/kalama/src/msm_vidc_kalama.c | 2 ++ driver/platform/waipio/src/msm_vidc_waipio.c | 2 ++ driver/vidc/inc/msm_vidc_internal.h | 1 + driver/vidc/src/msm_vidc_probe.c | 10 ++++++---- 6 files changed, 14 insertions(+), 4 deletions(-) diff --git a/driver/platform/anorak/src/msm_vidc_anorak.c b/driver/platform/anorak/src/msm_vidc_anorak.c index ffdecf8562..bed07e0b96 100644 --- a/driver/platform/anorak/src/msm_vidc_anorak.c +++ b/driver/platform/anorak/src/msm_vidc_anorak.c @@ -82,6 +82,8 @@ static struct msm_platform_core_capability core_data_anorak[] = { {NON_FATAL_FAULTS, 1}, {ENC_AUTO_FRAMERATE, 1}, {MMRM, 0}, + {DEVICE_CAPS, V4L2_CAP_VIDEO_M2M_MPLANE | V4L2_CAP_META_CAPTURE | + V4L2_CAP_STREAMING}, }; static struct msm_platform_inst_capability instance_cap_data_anorak[] = { diff --git a/driver/platform/kalama/src/kalama.c b/driver/platform/kalama/src/kalama.c index 39921787b0..2da2ab899e 100644 --- a/driver/platform/kalama/src/kalama.c +++ b/driver/platform/kalama/src/kalama.c @@ -203,6 +203,7 @@ static struct msm_platform_core_capability core_data_kalama[] = { {STATS_TIMEOUT_MS, 2000}, {NON_FATAL_FAULTS, 1}, {ENC_AUTO_FRAMERATE, 1}, + {DEVICE_CAPS, V4L2_CAP_VIDEO_M2M_MPLANE | V4L2_CAP_STREAMING}, }; static struct msm_platform_inst_capability instance_cap_data_kalama[] = { diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index e3e15f203e..c7ed86fb3c 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -316,6 +316,8 @@ static struct msm_platform_core_capability core_data_kalama[] = { {NON_FATAL_FAULTS, 1}, {ENC_AUTO_FRAMERATE, 1}, {MMRM, 1}, + {DEVICE_CAPS, V4L2_CAP_VIDEO_M2M_MPLANE | V4L2_CAP_META_CAPTURE | + V4L2_CAP_STREAMING}, }; static struct msm_platform_inst_capability instance_cap_data_kalama[] = { diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 69863e467a..82a70cbd4d 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -79,6 +79,8 @@ static struct msm_platform_core_capability core_data_waipio[] = { {NON_FATAL_FAULTS, 1}, {ENC_AUTO_FRAMERATE, 1}, {MMRM, 1}, + {DEVICE_CAPS, V4L2_CAP_VIDEO_M2M_MPLANE | V4L2_CAP_META_CAPTURE | + V4L2_CAP_STREAMING}, }; static struct msm_platform_inst_capability instance_cap_data_waipio[] = { diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 73c54c763a..82fe08f8b3 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -371,6 +371,7 @@ enum msm_vidc_core_capability_type { NON_FATAL_FAULTS, ENC_AUTO_FRAMERATE, MMRM, + DEVICE_CAPS, CORE_CAP_MAX, }; diff --git a/driver/vidc/src/msm_vidc_probe.c b/driver/vidc/src/msm_vidc_probe.c index 661141ee12..be446d4129 100644 --- a/driver/vidc/src/msm_vidc_probe.c +++ b/driver/vidc/src/msm_vidc_probe.c @@ -165,6 +165,11 @@ static int msm_vidc_register_video_device(struct msm_vidc_core *core, d_vpr_h("%s()\n", __func__); + if (!core || !core->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + if (type == MSM_VIDC_DECODER) { index = 0; media_index = MEDIA_ENT_F_PROC_VIDEO_DECODER; @@ -185,10 +190,7 @@ static int msm_vidc_register_video_device(struct msm_vidc_core *core, core->vdev[index].vdev.vfl_dir = VFL_DIR_M2M; core->vdev[index].type = type; core->vdev[index].vdev.v4l2_dev = &core->v4l2_dev; - core->vdev[index].vdev.device_caps = - V4L2_CAP_VIDEO_M2M_MPLANE | - V4L2_CAP_META_CAPTURE | - V4L2_CAP_STREAMING; + core->vdev[index].vdev.device_caps = core->capabilities[DEVICE_CAPS].value; rc = video_register_device(&core->vdev[index].vdev, VFL_TYPE_VIDEO, nr); if (rc) { From 03606a7c7797d570a22e9a6e97defa13b3740fb6 Mon Sep 17 00:00:00 2001 From: Ashish Patil Date: Fri, 26 Aug 2022 15:42:05 -0700 Subject: [PATCH 0718/1061] video-driver: dma_buf_vmap() usage changes Earlier Kernel Version were using struct dma_buf_map and latest Kernel using struct iosys_map and MODULE_IMPORT_NS(DMA_BUF) to import dma buf namespace Change-Id: Ida6535fb2e3426b10264efe01e3a343fd3a1e127 Signed-off-by: Ashish Patil --- driver/vidc/inc/msm_vidc_internal.h | 8 +++++++- driver/vidc/src/msm_vidc_memory.c | 17 +++++++++++++++++ 2 files changed, 24 insertions(+), 1 deletion(-) diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index df1230be62..e73e0ce0fd 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -825,7 +825,13 @@ struct msm_vidc_alloc { u8 secure:1; u8 map_kernel:1; struct dma_buf *dmabuf; -#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5,15,0)) + /* + * Kalama uses Kernel Version 5.15.x, + * Pineapple uses Kernel version 5.18.x + */ +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5,16,0)) + struct iosys_map dmabuf_map; +#elif (LINUX_VERSION_CODE >= KERNEL_VERSION(5,15,0)) struct dma_buf_map dmabuf_map; #endif void *kvaddr; diff --git a/driver/vidc/src/msm_vidc_memory.c b/driver/vidc/src/msm_vidc_memory.c index aab13ccd6f..936fa8185e 100644 --- a/driver/vidc/src/msm_vidc_memory.c +++ b/driver/vidc/src/msm_vidc_memory.c @@ -19,6 +19,10 @@ #include "msm_vidc_events.h" #include "venus_hfi.h" +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5,16,0)) + MODULE_IMPORT_NS(DMA_BUF); +#endif + struct msm_vidc_buf_region_name { enum msm_vidc_buffer_region region; char *name; @@ -404,6 +408,11 @@ int msm_vidc_memory_alloc(struct msm_vidc_core *core, struct msm_vidc_alloc *mem if (mem->map_kernel) { dma_buf_begin_cpu_access(mem->dmabuf, DMA_BIDIRECTIONAL); + /* + * Waipio uses Kernel version 5.10.x, + * Kalama uses Kernel Version 5.15.x, + * Pineapple uses Kernel Version 5.18.x + */ #if (LINUX_VERSION_CODE < KERNEL_VERSION(5,15,0)) mem->kvaddr = dma_buf_vmap(mem->dmabuf); if (!mem->kvaddr) { @@ -411,6 +420,14 @@ int msm_vidc_memory_alloc(struct msm_vidc_core *core, struct msm_vidc_alloc *mem rc = -EIO; goto error; } +#elif (LINUX_VERSION_CODE < KERNEL_VERSION(5,16,0)) + rc = dma_buf_vmap(mem->dmabuf, &mem->dmabuf_map); + if (rc) { + d_vpr_e("%s: kernel map failed\n", __func__); + rc = -EIO; + goto error; + } + mem->kvaddr = mem->dmabuf_map.vaddr; #else rc = dma_buf_vmap(mem->dmabuf, &mem->dmabuf_map); if (rc) { From 9b32ff0498a25ef6994f78ce832af1bea515b4e4 Mon Sep 17 00:00:00 2001 From: Dikshita Agarwal Date: Mon, 5 Sep 2022 17:34:50 +0530 Subject: [PATCH 0719/1061] video: driver: modify slice delivery control as boolean control Update definition of slice delivery control in v4l2_vidc_extensions.h to make it a boolean control instead of menu control and use it accordingly. Change-Id: I8ad5f5b7088bc01b78560cb40eae7c7d677ce7ce Signed-off-by: Dikshita Agarwal --- driver/platform/anorak/src/msm_vidc_anorak.c | 12 ++---------- driver/vidc/src/msm_vidc_control_ext.c | 8 ++------ include/uapi/vidc/media/v4l2_vidc_extensions.h | 8 -------- 3 files changed, 4 insertions(+), 24 deletions(-) diff --git a/driver/platform/anorak/src/msm_vidc_anorak.c b/driver/platform/anorak/src/msm_vidc_anorak.c index ffdecf8562..28ad7f1513 100644 --- a/driver/platform/anorak/src/msm_vidc_anorak.c +++ b/driver/platform/anorak/src/msm_vidc_anorak.c @@ -1764,21 +1764,13 @@ static struct msm_platform_inst_capability instance_cap_data_anorak[] = { CAP_FLAG_BITMASK}, {DELIVERY_MODE, ENC, HEVC, - V4L2_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE_FRAME_BASED, - V4L2_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE_SLICE_BASED, - BIT(V4L2_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE_FRAME_BASED) | - BIT(V4L2_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE_SLICE_BASED), - V4L2_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE_FRAME_BASED, + 0, 1, 1, 0, V4L2_CID_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE, HFI_PROP_ENABLE_SLICE_DELIVERY, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, {DELIVERY_MODE, ENC, H264, - V4L2_MPEG_VIDC_H264_ENCODE_DELIVERY_MODE_FRAME_BASED, - V4L2_MPEG_VIDC_H264_ENCODE_DELIVERY_MODE_SLICE_BASED, - BIT(V4L2_MPEG_VIDC_H264_ENCODE_DELIVERY_MODE_FRAME_BASED) | - BIT(V4L2_MPEG_VIDC_H264_ENCODE_DELIVERY_MODE_SLICE_BASED), - V4L2_MPEG_VIDC_H264_ENCODE_DELIVERY_MODE_FRAME_BASED, + 0, 1, 1, 0, V4L2_CID_MPEG_VIDC_H264_ENCODE_DELIVERY_MODE, HFI_PROP_ENABLE_SLICE_DELIVERY, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, diff --git a/driver/vidc/src/msm_vidc_control_ext.c b/driver/vidc/src/msm_vidc_control_ext.c index 9d2da9bbaa..b526f2df19 100644 --- a/driver/vidc/src/msm_vidc_control_ext.c +++ b/driver/vidc/src/msm_vidc_control_ext.c @@ -150,12 +150,8 @@ int msm_vidc_adjust_delivery_mode(void *instance, struct v4l2_ctrl *ctrl) return -EINVAL; /* Slice encode delivery mode is only supported for Max MB slice mode */ - if (slice_mode != V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_MB) { - if (inst->codec == MSM_VIDC_HEVC) - adjusted_value = V4L2_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE_FRAME_BASED; - else if (inst->codec == MSM_VIDC_H264) - adjusted_value = V4L2_MPEG_VIDC_H264_ENCODE_DELIVERY_MODE_FRAME_BASED; - } + if (slice_mode != V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_MB) + adjusted_value = 0; msm_vidc_update_cap_value(inst, DELIVERY_MODE, adjusted_value, __func__); diff --git a/include/uapi/vidc/media/v4l2_vidc_extensions.h b/include/uapi/vidc/media/v4l2_vidc_extensions.h index 6df30d0b3d..00574be3f6 100644 --- a/include/uapi/vidc/media/v4l2_vidc_extensions.h +++ b/include/uapi/vidc/media/v4l2_vidc_extensions.h @@ -245,17 +245,9 @@ enum v4l2_mpeg_video_av1_tier { */ #define V4L2_CID_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE \ (V4L2_CID_MPEG_VIDC_BASE + 0x3C) -enum v4l2_hevc_encode_delivery_mode { - V4L2_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE_FRAME_BASED = 0, - V4L2_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE_SLICE_BASED = 1, -}; #define V4L2_CID_MPEG_VIDC_H264_ENCODE_DELIVERY_MODE \ (V4L2_CID_MPEG_VIDC_BASE + 0x3D) -enum v4l2_h264_encode_delivery_mode { - V4L2_MPEG_VIDC_H264_ENCODE_DELIVERY_MODE_FRAME_BASED = 0, - V4L2_MPEG_VIDC_H264_ENCODE_DELIVERY_MODE_SLICE_BASED = 1, -}; #define V4L2_CID_MPEG_VIDC_CRITICAL_PRIORITY \ (V4L2_CID_MPEG_VIDC_BASE + 0x3E) From b1dfbad4a4ae740337edeb7b1fe8b156f4bb6b22 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Tue, 13 Sep 2022 14:29:18 -0700 Subject: [PATCH 0720/1061] video: driver: Introduce SUPPORTS_REQUESTS cap Introduce SUPPORTS_REQUESTS cap to have different caps support for upstream and downstream driver. Change-Id: Ib8bae21ba3fa6d65236954e0728fa30e20d7b375 Signed-off-by: Akshata Sahukar --- driver/platform/anorak/src/msm_vidc_anorak.c | 1 + driver/platform/kalama/src/kalama.c | 1 + driver/platform/kalama/src/msm_vidc_kalama.c | 1 + driver/platform/waipio/src/msm_vidc_waipio.c | 1 + driver/vidc/inc/msm_vidc_internal.h | 1 + driver/vidc/src/msm_vidc_driver.c | 6 +++++- 6 files changed, 10 insertions(+), 1 deletion(-) diff --git a/driver/platform/anorak/src/msm_vidc_anorak.c b/driver/platform/anorak/src/msm_vidc_anorak.c index 7c463e184d..c84860fa69 100644 --- a/driver/platform/anorak/src/msm_vidc_anorak.c +++ b/driver/platform/anorak/src/msm_vidc_anorak.c @@ -84,6 +84,7 @@ static struct msm_platform_core_capability core_data_anorak[] = { {MMRM, 0}, {DEVICE_CAPS, V4L2_CAP_VIDEO_M2M_MPLANE | V4L2_CAP_META_CAPTURE | V4L2_CAP_STREAMING}, + {SUPPORTS_REQUESTS, 1}, }; static struct msm_platform_inst_capability instance_cap_data_anorak[] = { diff --git a/driver/platform/kalama/src/kalama.c b/driver/platform/kalama/src/kalama.c index 87de9f9357..aa1edffa0e 100644 --- a/driver/platform/kalama/src/kalama.c +++ b/driver/platform/kalama/src/kalama.c @@ -220,6 +220,7 @@ static struct msm_platform_core_capability core_data_kalama[] = { {NON_FATAL_FAULTS, 1}, {ENC_AUTO_FRAMERATE, 1}, {DEVICE_CAPS, V4L2_CAP_VIDEO_M2M_MPLANE | V4L2_CAP_STREAMING}, + {SUPPORTS_REQUESTS, 0}, }; static struct msm_platform_inst_capability instance_cap_data_kalama[] = { diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index d8618c9a10..ef7347a706 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -318,6 +318,7 @@ static struct msm_platform_core_capability core_data_kalama[] = { {MMRM, 1}, {DEVICE_CAPS, V4L2_CAP_VIDEO_M2M_MPLANE | V4L2_CAP_META_CAPTURE | V4L2_CAP_STREAMING}, + {SUPPORTS_REQUESTS, 1}, }; static struct msm_platform_inst_capability instance_cap_data_kalama[] = { diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 290033a07a..d87cf75b98 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -81,6 +81,7 @@ static struct msm_platform_core_capability core_data_waipio[] = { {MMRM, 1}, {DEVICE_CAPS, V4L2_CAP_VIDEO_M2M_MPLANE | V4L2_CAP_META_CAPTURE | V4L2_CAP_STREAMING}, + {SUPPORTS_REQUESTS, 1}, }; static struct msm_platform_inst_capability instance_cap_data_waipio[] = { diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index df1230be62..af5070e380 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -372,6 +372,7 @@ enum msm_vidc_core_capability_type { ENC_AUTO_FRAMERATE, MMRM, DEVICE_CAPS, + SUPPORTS_REQUESTS, CORE_CAP_MAX, }; diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 6482af8cc5..69f254ada4 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -4262,8 +4262,12 @@ static int m2m_queue_init(void *priv, struct vb2_queue *src_vq, return -EINVAL; } core = inst->core; + if (!core->capabilities) { + d_vpr_e("%s: invalid core capabilities\n", __func__); + return -EINVAL; + } - src_vq->supports_requests = 1; + src_vq->supports_requests = core->capabilities[SUPPORTS_REQUESTS].value; src_vq->lock = &inst->request_lock; src_vq->dev = &core->pdev->dev; rc = vb2q_init(inst, src_vq, INPUT_MPLANE); From 7818456489bb234cdabeaaca7044eafbd472a651 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Wed, 14 Sep 2022 16:46:06 -0700 Subject: [PATCH 0721/1061] video: driver: fix AV1D fence timing failures during flush sequence Flushed out buffers by driver retain filled length field same as it was while queued to driver. This is incorrect as it gives an impression to the client that some data has been written by driver/firmware. Hence, reset this to 0 while dequeuing to fix the issue. Change-Id: Ia2bb86a3462255991d45a1f77cab39a4a0eafd23 Signed-off-by: Akshata Sahukar --- driver/vidc/src/msm_vidc_driver.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 6482af8cc5..1dd2fd3f07 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -5560,8 +5560,10 @@ int msm_vidc_flush_buffers(struct msm_vidc_inst *inst, if (buf->attr & MSM_VIDC_ATTR_QUEUED || buf->attr & MSM_VIDC_ATTR_DEFERRED) { print_vidc_buffer(VIDC_HIGH, "high", "flushing buffer", inst, buf); - if (!(buf->attr & MSM_VIDC_ATTR_BUFFER_DONE)) + if (!(buf->attr & MSM_VIDC_ATTR_BUFFER_DONE)) { + buf->data_size = 0; msm_vidc_vb2_buffer_done(inst, buf); + } msm_vidc_put_driver_buf(inst, buf); } } From a6337c1460d78537a7187e507045d81c711436c6 Mon Sep 17 00:00:00 2001 From: Deepa Guthyappa Madivalara Date: Mon, 19 Sep 2022 16:30:43 -0700 Subject: [PATCH 0722/1061] video: driver: update platform_get_resource to platform_get_irq Use platform_get_irq api instead of platform_get_resource for Lanai Change-Id: Ia06e7d5c890f6c7344b53a9f15c0b68b26bcc53e Signed-off-by: Deepa Guthyappa Madivalara --- driver/vidc/src/msm_vidc_dt.c | 7 +++++++ video_kernel_board.mk | 2 -- 2 files changed, 7 insertions(+), 2 deletions(-) diff --git a/driver/vidc/src/msm_vidc_dt.c b/driver/vidc/src/msm_vidc_dt.c index ea23ea9e9a..8ba8aa2f30 100644 --- a/driver/vidc/src/msm_vidc_dt.c +++ b/driver/vidc/src/msm_vidc_dt.c @@ -690,8 +690,15 @@ static int msm_vidc_read_resources_from_dt(struct platform_device *pdev) d_vpr_h("%s: register base %pa, size %#x\n", __func__, &dt->register_base, dt->register_size); +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5,16,0)) + dt->irq = platform_get_irq(pdev, 0); +#else kres = platform_get_resource(pdev, IORESOURCE_IRQ, 0); dt->irq = kres ? kres->start : -1; +#endif + if (dt->irq < 0) + d_vpr_e("%s: get irq failed, %d\n", __func__, dt->irq); + d_vpr_h("%s: irq %d\n", __func__, dt->irq); rc = msm_vidc_load_fw_name(core); diff --git a/video_kernel_board.mk b/video_kernel_board.mk index 5f5b05b124..bdb6475ebd 100644 --- a/video_kernel_board.mk +++ b/video_kernel_board.mk @@ -10,7 +10,6 @@ endif # Build video kernel driver ifeq ($(TARGET_VIDC_ENABLE),true) -ifneq ($(TARGET_KERNEL_DLKM_DISABLE),true) ifneq ($(TARGET_BOARD_AUTO),true) ifeq ($(call is-board-platform-in-list,$(TARGET_BOARD_PLATFORM)),true) BOARD_VENDOR_KERNEL_MODULES += $(KERNEL_MODULES_OUT)/msm_video.ko @@ -19,4 +18,3 @@ BUILD_VIDEO_TECHPACK_SOURCE := true endif endif endif -endif From 85d79a7a23cbb62495c9eb9ffe95b532e502302b Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Mon, 19 Sep 2022 11:39:25 -0700 Subject: [PATCH 0723/1061] video: driver: remove input meta via request support remove input meta via request support Change-Id: If2a504455e1899c4cefb2a9142f7a92db02a45f2 Signed-off-by: Akshata Sahukar --- driver/platform/anorak/src/msm_vidc_anorak.c | 25 ----- driver/platform/kalama/src/msm_vidc_kalama.c | 24 ----- driver/platform/waipio/src/msm_vidc_waipio.c | 25 ----- driver/vidc/inc/msm_vidc_driver.h | 2 - driver/vidc/inc/msm_vidc_internal.h | 2 - driver/vidc/src/msm_vdec.c | 18 ++-- driver/vidc/src/msm_venc.c | 18 ++-- driver/vidc/src/msm_vidc_buffer.c | 3 - driver/vidc/src/msm_vidc_control.c | 19 ---- driver/vidc/src/msm_vidc_driver.c | 101 ------------------ driver/vidc/src/msm_vidc_vb2.c | 15 --- .../uapi/vidc/media/v4l2_vidc_extensions.h | 6 -- 12 files changed, 12 insertions(+), 246 deletions(-) diff --git a/driver/platform/anorak/src/msm_vidc_anorak.c b/driver/platform/anorak/src/msm_vidc_anorak.c index c84860fa69..476feadcb5 100644 --- a/driver/platform/anorak/src/msm_vidc_anorak.c +++ b/driver/platform/anorak/src/msm_vidc_anorak.c @@ -1491,19 +1491,6 @@ static struct msm_platform_inst_capability instance_cap_data_anorak[] = { 0, CAP_FLAG_OUTPUT_PORT}, - {INPUT_METADATA_FD, ENC|DEC, CODECS_ALL, - INVALID_FD, INT_MAX, 1, INVALID_FD, - V4L2_CID_MPEG_VIDC_INPUT_METADATA_FD, - 0, - CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - - {INPUT_META_VIA_REQUEST, ENC|DEC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_INPUT_METADATA_VIA_REQUEST_ENABLE, - 0, - CAP_FLAG_INPUT_PORT}, - {META_LTR_MARK_USE, ENC, H264|HEVC, V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, @@ -2403,18 +2390,6 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_anor msm_vidc_adjust_all_intra, NULL}, - {INPUT_METADATA_FD, ENC|DEC, CODECS_ALL, - {0}, - {0}, - NULL, - NULL}, - - {INPUT_META_VIA_REQUEST, ENC|DEC, CODECS_ALL, - {0}, - {0}, - NULL, - NULL}, - {META_EVA_STATS, ENC, CODECS_ALL, {0}, {ENH_LAYER_COUNT, REQUEST_PREPROCESS}}, diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index ef7347a706..f71cda4ada 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -1690,18 +1690,6 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { 0, CAP_FLAG_OUTPUT_PORT}, - {INPUT_METADATA_FD, ENC|DEC, CODECS_ALL, - INVALID_FD, INT_MAX, 1, INVALID_FD, - V4L2_CID_MPEG_VIDC_INPUT_METADATA_FD, - 0, - CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - - {INPUT_META_VIA_REQUEST, ENC|DEC, CODECS_ALL, - 0, 1, 1, 0, - V4L2_CID_MPEG_VIDC_INPUT_METADATA_VIA_REQUEST_ENABLE, - 0, - CAP_FLAG_INPUT_PORT}, - {META_LTR_MARK_USE, ENC, H264|HEVC, MSM_VIDC_META_DISABLE, MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, @@ -2592,18 +2580,6 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kala msm_vidc_adjust_all_intra, NULL}, - {INPUT_METADATA_FD, ENC|DEC, CODECS_ALL, - {0}, - {0}, - NULL, - NULL}, - - {INPUT_META_VIA_REQUEST, ENC|DEC, CODECS_ALL, - {0}, - {0}, - NULL, - NULL}, - {META_EVA_STATS, ENC, CODECS_ALL, {0}, {ENH_LAYER_COUNT, REQUEST_PREPROCESS}}, diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index d87cf75b98..607fe37ba0 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -1336,19 +1336,6 @@ static struct msm_platform_inst_capability instance_cap_data_waipio[] = { 0, CAP_FLAG_OUTPUT_PORT}, - {INPUT_METADATA_FD, ENC|DEC, CODECS_ALL, - INVALID_FD, INT_MAX, 1, INVALID_FD, - V4L2_CID_MPEG_VIDC_INPUT_METADATA_FD, - 0, - CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - - {INPUT_META_VIA_REQUEST, ENC|DEC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_INPUT_METADATA_VIA_REQUEST_ENABLE, - 0, - CAP_FLAG_INPUT_PORT}, - {META_LTR_MARK_USE, ENC, H264|HEVC, V4L2_MPEG_VIDC_META_DISABLE, V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, @@ -2154,18 +2141,6 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_waip msm_vidc_adjust_all_intra, NULL}, - {INPUT_METADATA_FD, ENC|DEC, CODECS_ALL, - {0}, - {0}, - NULL, - NULL}, - - {INPUT_META_VIA_REQUEST, ENC|DEC, CODECS_ALL, - {0}, - {0}, - NULL, - NULL}, - {META_EVA_STATS, ENC, CODECS_ALL, {0}, {ENH_LAYER_COUNT, REQUEST_PREPROCESS}}, diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 2210b9e4b2..d6ee13e9d9 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -588,8 +588,6 @@ bool res_is_less_than_or_equal_to(u32 width, u32 height, int signal_session_msg_receipt(struct msm_vidc_inst *inst, enum signal_session_response cmd); int msm_vidc_get_properties(struct msm_vidc_inst *inst); -int msm_vidc_create_input_metadata_buffer(struct msm_vidc_inst *inst, int buf_fd); -int msm_vidc_update_input_meta_buffer_index(struct msm_vidc_inst *inst, struct vb2_buffer *vb2); int msm_vidc_update_input_rate(struct msm_vidc_inst *inst, u64 time_us); int msm_vidc_add_buffer_stats(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buf); diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 0de7a0e570..533a6b6387 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -520,8 +520,6 @@ enum msm_vidc_inst_capability_type { FILM_GRAIN, SUPER_BLOCK, DRAP, - INPUT_METADATA_FD, - INPUT_META_VIA_REQUEST, ENC_IP_CR, COMPLEXITY, CABAC_MAX_BITRATE, diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 6473e1ff6e..5ae47f2161 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -1434,18 +1434,12 @@ int msm_vdec_streamon_input(struct msm_vidc_inst *inst) return -EINVAL; } - /* - * do not check for input meta port streamon when - * request is enabled - */ - if (!inst->capabilities->cap[INPUT_META_VIA_REQUEST].value) { - if (is_input_meta_enabled(inst) && - !inst->bufq[INPUT_META_PORT].vb2q->streaming) { - i_vpr_e(inst, - "%s: Meta port must be streamed on before data port\n", - __func__); - return -EINVAL; - } + if (is_input_meta_enabled(inst) && + !inst->bufq[INPUT_META_PORT].vb2q->streaming) { + i_vpr_e(inst, + "%s: Meta port must be streamed on before data port\n", + __func__); + return -EINVAL; } rc = msm_vidc_check_session_supported(inst); diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index 46d2d2419c..19c393a913 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -813,18 +813,12 @@ int msm_venc_streamon_input(struct msm_vidc_inst *inst) return -EINVAL; } - /* - * do not check for input meta port streamon when - * request is enabled - */ - if (!inst->capabilities->cap[INPUT_META_VIA_REQUEST].value) { - if (is_input_meta_enabled(inst) && - !inst->bufq[INPUT_META_PORT].vb2q->streaming) { - i_vpr_e(inst, - "%s: Meta port must be streamed on before data port\n", - __func__); - return -EINVAL; - } + if (is_input_meta_enabled(inst) && + !inst->bufq[INPUT_META_PORT].vb2q->streaming) { + i_vpr_e(inst, + "%s: Meta port must be streamed on before data port\n", + __func__); + return -EINVAL; } rc = msm_vidc_check_session_supported(inst); diff --git a/driver/vidc/src/msm_vidc_buffer.c b/driver/vidc/src/msm_vidc_buffer.c index 0dad518fcc..78f90eb5c7 100644 --- a/driver/vidc/src/msm_vidc_buffer.c +++ b/driver/vidc/src/msm_vidc_buffer.c @@ -443,9 +443,6 @@ u32 msm_vidc_encoder_input_meta_size(struct msm_vidc_inst *inst) size = MSM_VIDC_METADATA_SIZE; - if (inst->capabilities->cap[INPUT_META_VIA_REQUEST].value) - return ENCODE_INPUT_METADATA_SIZE; - if (inst->capabilities->cap[META_ROI_INFO].value) { lcu_size = 16; diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 2692a044ec..dcfaf26310 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -1132,25 +1132,6 @@ int msm_v4l2_op_s_ctrl(struct v4l2_ctrl *ctrl) goto unlock; } - if (cap_id == INPUT_METADATA_FD) { - if (ctrl->val == INVALID_FD || ctrl->val == INT_MAX) { - i_vpr_e(inst, - "%s: client configured invalid input metadata fd %d\n", - __func__, ctrl->val); - rc = 0; - goto unlock; - } - if (!capability->cap[INPUT_META_VIA_REQUEST].value) { - i_vpr_e(inst, - "%s: input metadata not enabled via request\n", __func__); - rc = -EINVAL; - goto unlock; - } - rc = msm_vidc_create_input_metadata_buffer(inst, ctrl->val); - if (rc) - goto unlock; - } - /* mark client set flag */ capability->cap[cap_id].flags |= CAP_FLAG_CLIENT_SET; diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 69f254ada4..28e1588669 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -184,8 +184,6 @@ static const struct msm_vidc_cap_name cap_name_arr[] = { {FILM_GRAIN, "FILM_GRAIN" }, {SUPER_BLOCK, "SUPER_BLOCK" }, {DRAP, "DRAP" }, - {INPUT_METADATA_FD, "INPUT_METADATA_FD" }, - {INPUT_META_VIA_REQUEST, "INPUT_META_VIA_REQUEST" }, {ENC_IP_CR, "ENC_IP_CR" }, {COMPLEXITY, "COMPLEXITY" }, {CABAC_MAX_BITRATE, "CABAC_MAX_BITRATE" }, @@ -4129,14 +4127,6 @@ int msm_vidc_vb2_buffer_done(struct msm_vidc_inst *inst, if (port < 0) return -EINVAL; - /* - * vb2_buffer_done not required if input metadata - * buffer sent via request api - */ - if (buf->type == MSM_VIDC_BUF_INPUT_META && - inst->capabilities->cap[INPUT_META_VIA_REQUEST].value) - return 0; - q = inst->bufq[port].vb2q; if (!q->streaming) { i_vpr_e(inst, "%s: port %d is not streaming\n", @@ -6780,94 +6770,3 @@ int msm_vidc_get_properties(struct msm_vidc_inst *inst) return 0; } - -int msm_vidc_create_input_metadata_buffer(struct msm_vidc_inst *inst, int fd) -{ - int rc = 0; - struct msm_vidc_buffer *buf = NULL; - struct msm_vidc_buffers *buffers; - struct dma_buf *dma_buf; - - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - if (fd < 0) { - i_vpr_e(inst, "%s: invalid input metadata buffer fd %d\n", - __func__, fd); - return -EINVAL; - } - - buffers = msm_vidc_get_buffers(inst, MSM_VIDC_BUF_INPUT_META, __func__); - if (!buffers) - return -EINVAL; - - buf = msm_memory_pool_alloc(inst, MSM_MEM_POOL_BUFFER); - if (!buf) { - i_vpr_e(inst, "%s: buffer pool alloc failed\n", __func__); - return -EINVAL; - } - - INIT_LIST_HEAD(&buf->list); - buf->type = MSM_VIDC_BUF_INPUT_META; - buf->index = INT_MAX; - buf->fd = fd; - dma_buf = msm_vidc_memory_get_dmabuf(inst, fd); - if (!dma_buf) { - rc = -ENOMEM; - goto error_dma_buf; - } - buf->dmabuf = dma_buf; - buf->data_size = dma_buf->size; - buf->buffer_size = dma_buf->size; - buf->attr |= MSM_VIDC_ATTR_DEFERRED; - - rc = msm_vidc_map_driver_buf(inst, buf); - if (rc) - goto error_map; - - list_add_tail(&buf->list, &buffers->list); - return rc; - -error_map: - msm_vidc_memory_put_dmabuf(inst, buf->dmabuf); -error_dma_buf: - msm_memory_pool_free(inst, buf); - return rc; -} - -int msm_vidc_update_input_meta_buffer_index(struct msm_vidc_inst *inst, - struct vb2_buffer *vb2) -{ - int rc = 0; - bool found = false; - struct msm_vidc_buffer *buf = NULL; - struct msm_vidc_buffers *buffers; - - if (!inst || !vb2) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - if (vb2->type != INPUT_MPLANE) - return 0; - - buffers = msm_vidc_get_buffers(inst, MSM_VIDC_BUF_INPUT_META, __func__); - if (!buffers) - return -EINVAL; - list_for_each_entry(buf, &buffers->list, list) { - if (buf->index == INT_MAX) { - buf->index = vb2->index; - found = true; - break; - } - } - - if (!found) { - i_vpr_e(inst, "%s: missing input metabuffer for index %d\n", - __func__, vb2->index); - rc = -EINVAL; - } - return rc; -} diff --git a/driver/vidc/src/msm_vidc_vb2.c b/driver/vidc/src/msm_vidc_vb2.c index 9cf3a26af9..7aaad7ad96 100644 --- a/driver/vidc/src/msm_vidc_vb2.c +++ b/driver/vidc/src/msm_vidc_vb2.c @@ -217,15 +217,6 @@ int msm_vidc_start_streaming(struct vb2_queue *q, unsigned int count) goto unlock; } - if (q->type == INPUT_META_PLANE && - inst->capabilities->cap[INPUT_META_VIA_REQUEST].value) { - i_vpr_e(inst, - "%s: invalid input meta port start when request enabled\n", - __func__); - rc = -EINVAL; - goto unlock; - } - if (q->type == INPUT_META_PLANE || q->type == OUTPUT_META_PLANE) { i_vpr_h(inst, "%s: nothing to start on %s\n", __func__, v4l2_type_name(q->type)); @@ -509,12 +500,6 @@ void msm_vidc_buf_queue(struct vb2_buffer *vb2) goto unlock; } - if (inst->capabilities->cap[INPUT_META_VIA_REQUEST].value) { - rc = msm_vidc_update_input_meta_buffer_index(inst, vb2); - if (rc) - goto unlock; - } - if (is_decode_session(inst)) rc = msm_vdec_qbuf(inst, vb2); else if (is_encode_session(inst)) diff --git a/include/uapi/vidc/media/v4l2_vidc_extensions.h b/include/uapi/vidc/media/v4l2_vidc_extensions.h index 6df30d0b3d..5f6a49a0d0 100644 --- a/include/uapi/vidc/media/v4l2_vidc_extensions.h +++ b/include/uapi/vidc/media/v4l2_vidc_extensions.h @@ -218,12 +218,6 @@ enum v4l2_mpeg_video_av1_tier { /* AV1 Decoder Film Grain */ #define V4L2_CID_MPEG_VIDC_AV1D_FILM_GRAIN_PRESENT \ (V4L2_CID_MPEG_VIDC_BASE + 0x35) -/* Control to set input metadata buffer fd */ -#define V4L2_CID_MPEG_VIDC_INPUT_METADATA_FD \ - (V4L2_CID_MPEG_VIDC_BASE + 0x36) -/* Control to enable input metadata via request api */ -#define V4L2_CID_MPEG_VIDC_INPUT_METADATA_VIA_REQUEST_ENABLE \ - (V4L2_CID_MPEG_VIDC_BASE + 0x37) /* Enables Output buffer fence id via input metadata */ #define V4L2_CID_MPEG_VIDC_METADATA_OUTBUF_FENCE \ (V4L2_CID_MPEG_VIDC_BASE + 0x38) From 7dd8b6d186d73645dd30be91c5b8ae1957ceab91 Mon Sep 17 00:00:00 2001 From: Mihir Ganu Date: Fri, 16 Sep 2022 10:35:09 -0700 Subject: [PATCH 0724/1061] video: driver: Always Set COMV bufcount to FW Always set COMV bufcount to FW, even if COMV buffer can be reused. Otherwise, there may be a mismatch in COM bufcount between host and firmware. Change-Id: I10d54818a4478e8b0a9e9577c6c8684ad52f5de8 Signed-off-by: Mihir Ganu --- driver/vidc/src/msm_vidc_driver.c | 16 ++++++++++------ 1 file changed, 10 insertions(+), 6 deletions(-) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 9d332b8413..11123e7877 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -3990,6 +3990,16 @@ int msm_vidc_queue_internal_buffers(struct msm_vidc_inst *inst, return 0; } + /* + * Set HFI_PROP_COMV_BUFFER_COUNT to firmware even if COMV buffer + * is reused. + */ + if (is_decode_session(inst) && buffer_type == MSM_VIDC_BUF_COMV) { + rc = msm_vdec_set_num_comv(inst); + if (rc) + return rc; + } + buffers = msm_vidc_get_buffers(inst, buffer_type, __func__); if (!buffers) return -EINVAL; @@ -4000,12 +4010,6 @@ int msm_vidc_queue_internal_buffers(struct msm_vidc_inst *inst, return 0; } - if (is_decode_session(inst) && buffer_type == MSM_VIDC_BUF_COMV) { - rc = msm_vdec_set_num_comv(inst); - if (rc) - return rc; - } - list_for_each_entry_safe(buffer, dummy, &buffers->list, list) { /* do not queue pending release buffers */ if (buffer->flags & MSM_VIDC_ATTR_PENDING_RELEASE) From 1ef323df292fb5cbae95a4a43b2af57293e81f15 Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Thu, 25 Aug 2022 19:37:50 -0700 Subject: [PATCH 0725/1061] video: driver: buffer flow changes When client queued a buffer, v4l2 framework compares the client Dmabuf with the existing dmabuf in the bufs array at the same index. If the dmabuf is different then v4l2 framework would call unmap_dmabuf, detach_dmabuf callbacks for the old buffer and then calls attach_dmabuf, map_dmabuf callbacks for the new buffer before qbuf callback is made to driver. If the dmabuf is same then qbuf callback will be made directly. V4l2 framework expects that clients recycles the same buffers in the same indices so that when v4l2 framework compares dmabuf it won't unmap or map buffers. If client recycle the buffers in different indices still usecase works but there will be unnecessary unmap, map overhead will be incurred. If client does not recycle the buffers at all, meaning every time client queues new buffers then special handling is required for decoder output buffers which are used for reference by video hardware.If any buffers are used by video hardware as reference buffers then firmware returns those buffers with READ_ONLY flag and they are kept in read_only list and when read_only grows beyond some limit then driver would ask firmware to release those READ_ONLY buffers and when firmware responds driver would delete these READ_ONLY buffers. Change-Id: I8a0b11c986dd0b9464895498efd8c1831a754198 Signed-off-by: Darshana Patil --- driver/vidc/inc/msm_vidc_driver.h | 13 +- driver/vidc/inc/msm_vidc_inst.h | 5 - driver/vidc/inc/msm_vidc_internal.h | 10 +- driver/vidc/inc/msm_vidc_memory.h | 12 + driver/vidc/inc/venus_hfi_response.h | 2 + driver/vidc/src/msm_vdec.c | 196 +++---------- driver/vidc/src/msm_vidc.c | 10 +- driver/vidc/src/msm_vidc_driver.c | 400 +++++++++++++++------------ driver/vidc/src/msm_vidc_memory.c | 77 +++++- driver/vidc/src/msm_vidc_vb2.c | 198 ++++++++++++- driver/vidc/src/venus_hfi_response.c | 80 +++--- 11 files changed, 603 insertions(+), 400 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index d6ee13e9d9..687b34ea8d 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -468,12 +468,14 @@ struct msm_vidc_allocations *msm_vidc_get_allocations( const char *func); struct msm_vidc_buffer *msm_vidc_get_driver_buf(struct msm_vidc_inst *inst, struct vb2_buffer *vb2); +int msm_vidc_allocate_buffers(struct msm_vidc_inst *inst, + enum msm_vidc_buffer_type buf_type, u32 num_buffers); +int msm_vidc_free_buffers(struct msm_vidc_inst *inst, + enum msm_vidc_buffer_type buf_type); int msm_vidc_unmap_driver_buf(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buf); int msm_vidc_map_driver_buf(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buf); -int msm_vidc_put_driver_buf(struct msm_vidc_inst *inst, - struct msm_vidc_buffer *buf); int msm_vidc_get_delayed_unmap(struct msm_vidc_inst *inst, struct msm_vidc_map *map); int msm_vidc_put_delayed_unmap(struct msm_vidc_inst *inst, @@ -495,8 +497,8 @@ int msm_vidc_destroy_internal_buffer(struct msm_vidc_inst *inst, void msm_vidc_destroy_buffers(struct msm_vidc_inst *inst); int msm_vidc_flush_buffers(struct msm_vidc_inst* inst, enum msm_vidc_buffer_type type); -int msm_vidc_flush_delayed_unmap_buffers(struct msm_vidc_inst *inst, - enum msm_vidc_buffer_type type); +int msm_vidc_flush_read_only_buffers(struct msm_vidc_inst *inst, + enum msm_vidc_buffer_type type); struct msm_vidc_buffer *get_meta_buffer(struct msm_vidc_inst *inst, struct msm_vidc_buffer *vbuf); struct msm_vidc_inst *get_inst_ref(struct msm_vidc_core *core, @@ -598,5 +600,8 @@ int msm_vidc_get_input_rate(struct msm_vidc_inst *inst); int msm_vidc_get_frame_rate(struct msm_vidc_inst *inst); int msm_vidc_get_operating_rate(struct msm_vidc_inst *inst); int msm_vidc_alloc_and_queue_input_internal_buffers(struct msm_vidc_inst *inst); +int vb2_buffer_to_driver(struct vb2_buffer *vb2, struct msm_vidc_buffer *buf); +struct msm_vidc_buffer *msm_vidc_fetch_buffer(struct msm_vidc_inst *inst, + struct vb2_buffer *vb2); #endif // _MSM_VIDC_DRIVER_H_ diff --git a/driver/vidc/inc/msm_vidc_inst.h b/driver/vidc/inc/msm_vidc_inst.h index befd855b29..71d674433e 100644 --- a/driver/vidc/inc/msm_vidc_inst.h +++ b/driver/vidc/inc/msm_vidc_inst.h @@ -42,10 +42,6 @@ struct msm_vidc_allocations_info { }; struct msm_vidc_mappings_info { - struct msm_vidc_mappings input; - struct msm_vidc_mappings output; - struct msm_vidc_mappings input_meta; - struct msm_vidc_mappings output_meta; struct msm_vidc_mappings bin; struct msm_vidc_mappings arp; struct msm_vidc_mappings comv; @@ -61,7 +57,6 @@ struct msm_vidc_buffers_info { struct msm_vidc_buffers input; struct msm_vidc_buffers output; struct msm_vidc_buffers read_only; - struct msm_vidc_buffers release; struct msm_vidc_buffers input_meta; struct msm_vidc_buffers output_meta; struct msm_vidc_buffers bin; diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 533a6b6387..f8fb7bc9f9 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -21,6 +21,8 @@ #include #include +struct msm_vidc_inst; + /* TODO : remove once available in mainline kernel */ #ifndef V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE #define V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE (3) @@ -220,7 +222,9 @@ enum msm_vidc_buffer_flags { MSM_VIDC_BUF_FLAG_BFRAME = 0x00000020, MSM_VIDC_BUF_FLAG_ERROR = 0x00000040, MSM_VIDC_BUF_FLAG_LAST = 0x00100000, + /* codec config is a vendor specific flag */ MSM_VIDC_BUF_FLAG_CODECCONFIG = 0x01000000, + /* sub frame is a vendor specific flag */ MSM_VIDC_BUF_FLAG_SUBFRAME = 0x02000000, }; @@ -858,6 +862,7 @@ struct msm_vidc_mappings { struct msm_vidc_buffer { struct list_head list; + struct msm_vidc_inst *inst; enum msm_vidc_buffer_type type; u32 index; int fd; @@ -865,10 +870,13 @@ struct msm_vidc_buffer { u32 data_offset; u32 data_size; u64 device_addr; - void *dmabuf; u32 flags; u64 timestamp; enum msm_vidc_buffer_attributes attr; + void *dmabuf; + struct sg_table *sg_table; + struct dma_buf_attachment *attach; + u32 dbuf_get:1; u64 fence_id; u32 start_time_ms; u32 end_time_ms; diff --git a/driver/vidc/inc/msm_vidc_memory.h b/driver/vidc/inc/msm_vidc_memory.h index 11105260b6..2ee8517aed 100644 --- a/driver/vidc/inc/msm_vidc_memory.h +++ b/driver/vidc/inc/msm_vidc_memory.h @@ -7,6 +7,7 @@ #define _MSM_VIDC_MEMORY_H_ #include "msm_vidc_internal.h" +#include "msm_vidc_dt.h" struct msm_vidc_core; struct msm_vidc_inst; @@ -66,4 +67,15 @@ void *msm_memory_pool_alloc(struct msm_vidc_inst *inst, void msm_memory_pool_free(struct msm_vidc_inst *inst, void *vidc_buf); int msm_vidc_vmem_alloc(unsigned long size, void **mem, const char *msg); void msm_vidc_vmem_free(void **addr); +struct context_bank_info *msm_vidc_get_context_bank(struct msm_vidc_core *core, + enum msm_vidc_buffer_region region); +struct dma_buf_attachment *msm_vidc_dma_buf_attach(struct dma_buf *dbuf, + struct device *dev); +int msm_vidc_dma_buf_detach(struct dma_buf *dbuf, + struct dma_buf_attachment *attach); +struct sg_table *msm_vidc_dma_buf_map_attachment( + struct dma_buf_attachment *attach); +int msm_vidc_dma_buf_unmap_attachment(struct dma_buf_attachment *attach, + struct sg_table *table); + #endif // _MSM_VIDC_MEMORY_H_ \ No newline at end of file diff --git a/driver/vidc/inc/venus_hfi_response.h b/driver/vidc/inc/venus_hfi_response.h index ebd19e9d68..776164a8e8 100644 --- a/driver/vidc/inc/venus_hfi_response.h +++ b/driver/vidc/inc/venus_hfi_response.h @@ -19,5 +19,7 @@ bool is_valid_hfi_buffer_type(struct msm_vidc_inst *inst, int handle_system_error(struct msm_vidc_core *core, struct hfi_packet *pkt); void fw_coredump(struct msm_vidc_core *core); +int handle_release_output_buffer(struct msm_vidc_inst *inst, + struct hfi_buffer *buffer); #endif // __VENUS_HFI_RESPONSE_H__ diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 5ae47f2161..01747454a5 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -1861,7 +1861,7 @@ static inline enum msm_vidc_allow msm_vdec_allow_queue_deferred_buffers( static int msm_vdec_qbuf_batch(struct msm_vidc_inst *inst, struct vb2_buffer *vb2) { - struct msm_vidc_buffer *buf; + struct msm_vidc_buffer *buf = NULL; enum msm_vidc_allow allow; int rc; @@ -1874,8 +1874,6 @@ static int msm_vdec_qbuf_batch(struct msm_vidc_inst *inst, if (!buf) return -EINVAL; - msm_vidc_add_buffer_stats(inst, buf); - allow = msm_vidc_allow_qbuf(inst, vb2->type); if (allow == MSM_VIDC_DISALLOW) { i_vpr_e(inst, "%s: qbuf not allowed\n", __func__); @@ -1907,7 +1905,7 @@ static int msm_vdec_release_nonref_buffers(struct msm_vidc_inst *inst) { int rc = 0; u32 fw_ro_count = 0, nonref_ro_count = 0; - struct msm_vidc_buffer *ro_buf, *rel_buf, *dummy; + struct msm_vidc_buffer *ro_buf; int i = 0; bool found = false; @@ -1916,17 +1914,22 @@ static int msm_vdec_release_nonref_buffers(struct msm_vidc_inst *inst) return -EINVAL; } - /* count num buffers in read_only list */ - list_for_each_entry(ro_buf, &inst->buffers.read_only.list, list) + /* count read_only buffers which are not pending release in read_only list */ + list_for_each_entry(ro_buf, &inst->buffers.read_only.list, list) { + if (!(ro_buf->attr & MSM_VIDC_ATTR_READ_ONLY)) + continue; + if (ro_buf->attr & MSM_VIDC_ATTR_PENDING_RELEASE) + continue; fw_ro_count++; + } if (fw_ro_count <= MAX_DPB_COUNT) return 0; /* - * Mark those buffers present in read_only list as non-reference - * if that buffer is not part of dpb_list_payload - * count such non-ref read only buffers as nonref_ro_count + * Mark those read only buffers present in read_only list as + * non-reference if that buffer is not part of dpb_list_payload. + * count such non-ref read only buffers as nonref_ro_count. * dpb_list_payload details: * payload[0-1] : 64 bits base_address of DPB-1 * payload[2] : 32 bits addr_offset of DPB-1 @@ -1934,6 +1937,35 @@ static int msm_vdec_release_nonref_buffers(struct msm_vidc_inst *inst) */ list_for_each_entry(ro_buf, &inst->buffers.read_only.list, list) { found = false; + if (!(ro_buf->attr & MSM_VIDC_ATTR_READ_ONLY)) + continue; + if (ro_buf->attr & MSM_VIDC_ATTR_PENDING_RELEASE) + continue; + for (i = 0; (i + 3) < MAX_DPB_LIST_ARRAY_SIZE; i = i + 4) { + if (ro_buf->device_addr == inst->dpb_list_payload[i] && + ro_buf->data_offset == inst->dpb_list_payload[i + 3]) { + found = true; + break; + } + } + if (!found) + nonref_ro_count++; + } + + + if (nonref_ro_count <= inst->buffers.output.min_count) + return 0; + + i_vpr_l(inst, "%s: fw ro buf count %d, non-ref ro count %d\n", + __func__, fw_ro_count, nonref_ro_count); + + /* release the eligible buffers as per above condition */ + list_for_each_entry(ro_buf, &inst->buffers.read_only.list, list) { + found = false; + if (!(ro_buf->attr & MSM_VIDC_ATTR_READ_ONLY)) + continue; + if (ro_buf->attr & MSM_VIDC_ATTR_PENDING_RELEASE) + continue; for (i = 0; (i + 3) < MAX_DPB_LIST_ARRAY_SIZE; i = i + 4) { if (ro_buf->device_addr == inst->dpb_list_payload[i] && ro_buf->data_offset == inst->dpb_list_payload[i + 3]) { @@ -1942,146 +1974,14 @@ static int msm_vdec_release_nonref_buffers(struct msm_vidc_inst *inst) } } if (!found) { - ro_buf->attr &= ~MSM_VIDC_ATTR_READ_ONLY; - nonref_ro_count++; - } - } - - if (nonref_ro_count <= inst->buffers.output.min_count) - return 0; - - i_vpr_l(inst, "%s: fw ro buf count %d, non-ref ro count %d\n", - __func__, fw_ro_count, nonref_ro_count); - /* - * move non-ref read only buffers from read_only list to - * release list - */ - list_for_each_entry_safe(ro_buf, dummy, &inst->buffers.read_only.list, list) { - if (!(ro_buf->attr & MSM_VIDC_ATTR_READ_ONLY)) { - list_del(&ro_buf->list); - INIT_LIST_HEAD(&ro_buf->list); - list_add_tail(&ro_buf->list, &inst->buffers.release.list); - } - } - - /* send release flag along with read only flag for release list bufs*/ - list_for_each_entry(rel_buf, &inst->buffers.release.list, list) { - /* fw needs RO flag for FTB release buffer */ - rel_buf->attr |= MSM_VIDC_ATTR_READ_ONLY; - print_vidc_buffer(VIDC_LOW, "low ", "release buf", inst, rel_buf); - rc = venus_hfi_release_buffer(inst, rel_buf); - if (rc) - return rc; - } - - return rc; -} - -int msm_vdec_handle_release_buffer(struct msm_vidc_inst *inst, - struct msm_vidc_buffer *buf) -{ - int rc = 0; - - if (!inst || !buf) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - /** - * RO & release list doesnot take dma ref_count using dma_buf_get(). - * Dmabuf ptr willbe obsolete when its last ref was last. - * Use direct api to print logs instead of calling print_vidc_buffer() - * api, which will attempt to dereferrence dmabuf ptr. - */ - i_vpr_l(inst, - "release done: %s: idx %2d fd %3d off %d daddr %#llx size %8d filled %8d flags %#x ts %8lld attr %#x counts(etb ebd ftb fbd) %4llu %4llu %4llu %4llu\n", - buf_name(buf->type), - buf->index, buf->fd, buf->data_offset, - buf->device_addr, buf->buffer_size, buf->data_size, - buf->flags, buf->timestamp, buf->attr, inst->debug_count.etb, - inst->debug_count.ebd, inst->debug_count.ftb, inst->debug_count.fbd); - /* delete the buffer from release list */ - list_del(&buf->list); - msm_memory_pool_free(inst, buf); - - return rc; -} - -static bool is_valid_removable_buffer(struct msm_vidc_inst *inst, - struct msm_vidc_map *map) -{ - bool found = false; - struct msm_vidc_buffer *buf; - - if (!inst || !map) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - if (map->refcount != 1) - return false; - - list_for_each_entry(buf, &inst->buffers.read_only.list, list) { - if (map->device_addr == buf->device_addr) { - found = true; - break; - } - } - - list_for_each_entry(buf, &inst->buffers.release.list, list) { - if (map->device_addr == buf->device_addr) { - found = true; - break; - } - } - - if (!found) - return true; - - return false; -} - -static int msm_vidc_unmap_excessive_mappings(struct msm_vidc_inst *inst) -{ - int rc = 0; - struct msm_vidc_map *map, *temp; - u32 refcount_one_bufs_count = 0; - - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - /* - * count entries from map list which are not present in - * read_only buffers list, not present in release list - * and whose refcount is 1.these are excess mappings - * present due to delayed unmap feature. - */ - list_for_each_entry(map, &inst->mappings.output.list, list) { - if (is_valid_removable_buffer(inst, map)) - refcount_one_bufs_count++; - } - - if (refcount_one_bufs_count <= inst->max_map_output_count) - return 0; - - /* unmap these buffers as they are stale entries */ - list_for_each_entry_safe(map, temp, &inst->mappings.output.list, list) { - if (is_valid_removable_buffer(inst, map)) { - i_vpr_l(inst, - "%s: type %11s, device_addr %#x, refcount %d, region %d\n", - __func__, buf_name(map->type), map->device_addr, - map->refcount, map->region); - rc = msm_vidc_put_delayed_unmap(inst, map); + ro_buf->attr |= MSM_VIDC_ATTR_PENDING_RELEASE; + print_vidc_buffer(VIDC_LOW, "low ", "release buf", inst, ro_buf); + rc = venus_hfi_release_buffer(inst, ro_buf); if (rc) return rc; - if (!map->refcount) { - list_del_init(&map->list); - msm_vidc_memory_put_dmabuf(inst, map->dmabuf); - msm_memory_pool_free(inst, map); - } } } + return rc; } @@ -2119,12 +2019,6 @@ int msm_vdec_qbuf(struct msm_vidc_inst *inst, struct vb2_buffer *vb2) if (rc) return rc; - if (vb2->type == OUTPUT_MPLANE) { - rc = msm_vidc_unmap_excessive_mappings(inst); - if (rc) - return rc; - } - return rc; } diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index 70c2aa449a..406389e814 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -893,7 +893,7 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) inst->core = core; inst->domain = session_type; inst->session_id = hash32_ptr(inst); - inst->state = MSM_VIDC_OPEN; + msm_vidc_change_state(inst, MSM_VIDC_OPEN, __func__); inst->sub_state = MSM_VIDC_SUB_STATE_NONE; strlcpy(inst->sub_state_name, "SUB_STATE_NONE", sizeof(inst->sub_state_name)); inst->active = true; @@ -924,7 +924,6 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) INIT_LIST_HEAD(&inst->buffers.output.list); INIT_LIST_HEAD(&inst->buffers.output_meta.list); INIT_LIST_HEAD(&inst->buffers.read_only.list); - INIT_LIST_HEAD(&inst->buffers.release.list); INIT_LIST_HEAD(&inst->buffers.bin.list); INIT_LIST_HEAD(&inst->buffers.arp.list); INIT_LIST_HEAD(&inst->buffers.comv.list); @@ -943,10 +942,6 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) INIT_LIST_HEAD(&inst->allocations.persist.list); INIT_LIST_HEAD(&inst->allocations.vpss.list); INIT_LIST_HEAD(&inst->allocations.partial_data.list); - INIT_LIST_HEAD(&inst->mappings.input.list); - INIT_LIST_HEAD(&inst->mappings.input_meta.list); - INIT_LIST_HEAD(&inst->mappings.output.list); - INIT_LIST_HEAD(&inst->mappings.output_meta.list); INIT_LIST_HEAD(&inst->mappings.bin.list); INIT_LIST_HEAD(&inst->mappings.arp.list); INIT_LIST_HEAD(&inst->mappings.comv.list); @@ -1045,8 +1040,9 @@ int msm_vidc_close(void *instance) /* print final stats */ msm_vidc_print_stats(inst); msm_vidc_session_close(inst); + msm_vidc_event_queue_deinit(inst); + msm_vidc_vb2_queue_deinit(inst); msm_vidc_remove_session(inst); - msm_vidc_destroy_buffers(inst); inst_unlock(inst, __func__); client_unlock(inst, __func__); cancel_stability_work_sync(inst); diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 9d332b8413..d6c9fbb491 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -455,17 +455,17 @@ void print_vidc_buffer(u32 tag, const char *tag_str, const char *str, struct msm } dprintk_inst(tag, tag_str, inst, - "%s: %s: idx %2d fd %3d off %d daddr %#llx inode %8lu ref %2ld size %8d filled %8d flags %#x ts %8lld attr %#x counts(etb ebd ftb fbd) %4llu %4llu %4llu %4llu\n", + "%s: %s: idx %2d fd %3d off %d daddr %#llx inode %8lu ref %2ld size %8d filled %8d flags %#x ts %8lld attr %#x dbuf_get %d attach %d map %d counts(etb ebd ftb fbd) %4llu %4llu %4llu %4llu\n", str, buf_name(vbuf->type), vbuf->index, vbuf->fd, vbuf->data_offset, - vbuf->device_addr, inode_num, ref_count, vbuf->buffer_size, vbuf->data_size, - vbuf->flags, vbuf->timestamp, vbuf->attr, inst->debug_count.etb, - inst->debug_count.ebd, inst->debug_count.ftb, inst->debug_count.fbd); + vbuf->device_addr, inode_num, ref_count, vbuf->buffer_size, + vbuf->data_size, vbuf->flags, vbuf->timestamp, vbuf->attr, + vbuf->dbuf_get, vbuf->attach ? 1 : 0, vbuf->sg_table ? 1 : 0, + inst->debug_count.etb, inst->debug_count.ebd, + inst->debug_count.ftb, inst->debug_count.fbd); trace_msm_v4l2_vidc_buffer_event_log(inst, str, buf_name(vbuf->type), vbuf, inode_num, ref_count); - - } void print_vb2_buffer(const char *str, struct msm_vidc_inst *inst, @@ -1171,14 +1171,6 @@ struct msm_vidc_mappings *msm_vidc_get_mappings( const char *func) { switch (buffer_type) { - case MSM_VIDC_BUF_INPUT: - return &inst->mappings.input; - case MSM_VIDC_BUF_INPUT_META: - return &inst->mappings.input_meta; - case MSM_VIDC_BUF_OUTPUT: - return &inst->mappings.output; - case MSM_VIDC_BUF_OUTPUT_META: - return &inst->mappings.output_meta; case MSM_VIDC_BUF_BIN: return &inst->mappings.bin; case MSM_VIDC_BUF_ARP: @@ -2469,25 +2461,26 @@ int msm_vidc_num_buffers(struct msm_vidc_inst *inst, return count; } -static int vb2_buffer_to_driver(struct vb2_buffer *vb2, +int vb2_buffer_to_driver(struct vb2_buffer *vb2, struct msm_vidc_buffer *buf) { int rc = 0; + struct vb2_v4l2_buffer *vbuf; if (!vb2 || !buf) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } + vbuf = to_vb2_v4l2_buffer(vb2); - buf->type = v4l2_type_to_driver(vb2->type, __func__); - if (!buf->type) - return -EINVAL; - buf->index = vb2->index; buf->fd = vb2->planes[0].m.fd; buf->data_offset = vb2->planes[0].data_offset; buf->data_size = vb2->planes[0].bytesused - vb2->planes[0].data_offset; buf->buffer_size = vb2->planes[0].length; buf->timestamp = vb2->timestamp; + buf->flags = vbuf->flags; + buf->attr = 0; + buf->fence_id = 0; return rc; } @@ -2497,7 +2490,6 @@ int msm_vidc_process_readonly_buffers(struct msm_vidc_inst *inst, { int rc = 0; struct msm_vidc_buffer *ro_buf, *dummy; - struct msm_vidc_buffers *ro_buffers; if (!inst || !buf) { d_vpr_e("%s: invalid params\n", __func__); @@ -2507,24 +2499,34 @@ int msm_vidc_process_readonly_buffers(struct msm_vidc_inst *inst, if (!is_decode_session(inst) || !is_output_buffer(buf->type)) return 0; - ro_buffers = msm_vidc_get_buffers(inst, MSM_VIDC_BUF_READ_ONLY, __func__); - if (!ro_buffers) - return -EINVAL; - /* - * check if buffer present in ro_buffers list - * if present: add ro flag to buf and remove from ro_buffers list - * if not present: do nothing + * check if read_only buffer is present in read_only list + * if present: add ro flag to buf */ - list_for_each_entry_safe(ro_buf, dummy, &ro_buffers->list, list) { - if (ro_buf->device_addr == buf->device_addr) { + list_for_each_entry_safe(ro_buf, dummy, &inst->buffers.read_only.list, list) { + if (ro_buf->device_addr == buf->device_addr && + ro_buf->attr & MSM_VIDC_ATTR_READ_ONLY) { buf->attr |= MSM_VIDC_ATTR_READ_ONLY; - print_vidc_buffer(VIDC_LOW, "low ", "ro buf removed", inst, ro_buf); - list_del(&ro_buf->list); - msm_memory_pool_free(inst, ro_buf); break; } } + + /* remove ro buffers if not required anymore */ + list_for_each_entry_safe(ro_buf, dummy, &inst->buffers.read_only.list, list) { + /* if read only buffer do not remove */ + if (ro_buf->attr & MSM_VIDC_ATTR_READ_ONLY) + continue; + /* if v4l2 did not ask for unmap/detach then do not remove */ + if (!ro_buf->sg_table || !ro_buf->attach || !ro_buf->dbuf_get) + continue; + print_vidc_buffer(VIDC_LOW, "low ", "ro buf removed", inst, ro_buf); + msm_vidc_dma_buf_unmap_attachment(ro_buf->attach, ro_buf->sg_table); + msm_vidc_dma_buf_detach(ro_buf->dmabuf, ro_buf->attach); + msm_vidc_memory_put_dmabuf(inst, ro_buf->dmabuf); + list_del_init(&ro_buf->list); + msm_memory_pool_free(inst, ro_buf); + } + return rc; } @@ -2999,29 +3001,6 @@ int msm_vidc_put_delayed_unmap(struct msm_vidc_inst *inst, struct msm_vidc_map * return rc; } -int msm_vidc_unmap_buffers(struct msm_vidc_inst *inst, - enum msm_vidc_buffer_type type) -{ - int rc = 0; - struct msm_vidc_mappings *mappings; - struct msm_vidc_map *map, *dummy; - - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - mappings = msm_vidc_get_mappings(inst, type, __func__); - if (!mappings) - return -EINVAL; - - list_for_each_entry_safe(map, dummy, &mappings->list, list) { - msm_vidc_memory_unmap_completely(inst, map); - } - - return rc; -} - int msm_vidc_unmap_driver_buf(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buf) { @@ -3135,34 +3114,116 @@ error: return rc; } -int msm_vidc_put_driver_buf(struct msm_vidc_inst *inst, - struct msm_vidc_buffer *buf) -{ - int rc = 0; - - if (!inst || !buf) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - msm_vidc_unmap_driver_buf(inst, buf); - - msm_vidc_memory_put_dmabuf(inst, buf->dmabuf); - - /* delete the buffer from buffers->list */ - list_del(&buf->list); - msm_memory_pool_free(inst, buf); - - return rc; -} - struct msm_vidc_buffer *msm_vidc_get_driver_buf(struct msm_vidc_inst *inst, struct vb2_buffer *vb2) { int rc = 0; + struct msm_vidc_buffer *buf; + + if (!inst || !vb2) { + d_vpr_e("%s: invalid params\n", __func__); + return NULL; + } + + buf = msm_vidc_fetch_buffer(inst, vb2); + if (!buf) { + i_vpr_e(inst, "%s: failed to fetch buffer\n", __func__); + return NULL; + } + + rc = vb2_buffer_to_driver(vb2, buf); + if (rc) + return NULL; + + /* treat every buffer as deferred buffer initially */ + buf->attr |= MSM_VIDC_ATTR_DEFERRED; + + if (is_decode_session(inst) && is_output_buffer(buf->type)) { + /* get a reference */ + if (!buf->dbuf_get) { + buf->dmabuf = msm_vidc_memory_get_dmabuf(inst, buf->fd); + if (!buf->dmabuf) + return NULL; + buf->dbuf_get = 1; + } + } + + /* update start timestamp */ + msm_vidc_add_buffer_stats(inst, buf); + + return buf; +} + +int msm_vidc_allocate_buffers(struct msm_vidc_inst *inst, + enum msm_vidc_buffer_type buf_type, u32 num_buffers) +{ + int rc = 0; + int idx = 0; + struct msm_vidc_buffer *buf = NULL; + struct msm_vidc_buffers *buffers; + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + buffers = msm_vidc_get_buffers(inst, buf_type, __func__); + if (!buffers) + return -EINVAL; + + for (idx = 0; idx < num_buffers; idx++) { + buf = msm_memory_pool_alloc(inst, MSM_MEM_POOL_BUFFER); + if (!buf) { + i_vpr_e(inst, "%s: alloc failed\n", __func__); + return -EINVAL; + } + INIT_LIST_HEAD(&buf->list); + list_add_tail(&buf->list, &buffers->list); + buf->type = buf_type; + buf->index = idx; + } + i_vpr_h(inst, "%s: allocated %d buffers for type %s\n", + __func__, num_buffers, buf_name(buf_type)); + + return rc; +} + +int msm_vidc_free_buffers(struct msm_vidc_inst *inst, + enum msm_vidc_buffer_type buf_type) +{ + int rc = 0; + int buf_count = 0; + struct msm_vidc_buffer *buf, *dummy; + struct msm_vidc_buffers *buffers; + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + buffers = msm_vidc_get_buffers(inst, buf_type, __func__); + if (!buffers) + return -EINVAL; + + list_for_each_entry_safe(buf, dummy, &buffers->list, list) { + buf_count++; + print_vidc_buffer(VIDC_LOW, "low ", "free buffer", inst, buf); + list_del_init(&buf->list); + msm_memory_pool_free(inst, buf); + } + i_vpr_h(inst, "%s: freed %d buffers for type %s\n", + __func__, buf_count, buf_name(buf_type)); + + return rc; +} + +struct msm_vidc_buffer *msm_vidc_fetch_buffer(struct msm_vidc_inst *inst, + struct vb2_buffer *vb2) +{ struct msm_vidc_buffer *buf = NULL; struct msm_vidc_buffers *buffers; enum msm_vidc_buffer_type buf_type; + bool found = false; if (!inst || !vb2) { d_vpr_e("%s: invalid params\n", __func__); @@ -3177,36 +3238,20 @@ struct msm_vidc_buffer *msm_vidc_get_driver_buf(struct msm_vidc_inst *inst, if (!buffers) return NULL; - buf = msm_memory_pool_alloc(inst, MSM_MEM_POOL_BUFFER); - if (!buf) { - i_vpr_e(inst, "%s: alloc failed\n", __func__); + list_for_each_entry(buf, &buffers->list, list) { + if (buf->index == vb2->index) { + found = true; + break; + } + } + + if (!found) { + i_vpr_e(inst, "%s: buffer not found for index %d for vb2 buffer type %s\n", + __func__, vb2->index, v4l2_type_name(vb2->type)); return NULL; } - INIT_LIST_HEAD(&buf->list); - list_add_tail(&buf->list, &buffers->list); - - rc = vb2_buffer_to_driver(vb2, buf); - if (rc) - goto error; - - buf->dmabuf = msm_vidc_memory_get_dmabuf(inst, buf->fd); - if (!buf->dmabuf) - goto error; - - /* treat every buffer as deferred buffer initially */ - buf->attr |= MSM_VIDC_ATTR_DEFERRED; - - rc = msm_vidc_map_driver_buf(inst, buf); - if (rc) - goto error; return buf; - -error: - msm_vidc_memory_put_dmabuf(inst, buf->dmabuf); - list_del(&buf->list); - msm_memory_pool_free(inst, buf); - return NULL; } struct msm_vidc_buffer *get_meta_buffer(struct msm_vidc_inst *inst, @@ -3609,8 +3654,10 @@ static int msm_vidc_queue_buffer(struct msm_vidc_inst *inst, struct msm_vidc_buf print_vidc_buffer(VIDC_HIGH, "high", "qbuf", inst, buf); meta = get_meta_buffer(inst, buf); - if (meta) + if (meta && meta->attr & MSM_VIDC_ATTR_DEFERRED) print_vidc_buffer(VIDC_LOW, "low ", "qbuf", inst, meta); + else + meta = NULL; if (!meta && is_meta_enabled(inst, buf->type)) { print_vidc_buffer(VIDC_ERR, "err ", "missing meta for", inst, buf); @@ -3710,7 +3757,7 @@ int msm_vidc_queue_deferred_buffers(struct msm_vidc_inst *inst, enum msm_vidc_bu int msm_vidc_queue_buffer_single(struct msm_vidc_inst *inst, struct vb2_buffer *vb2) { int rc = 0; - struct msm_vidc_buffer *buf; + struct msm_vidc_buffer *buf = NULL; struct msm_vidc_fence *fence = NULL; enum msm_vidc_allow allow; @@ -3723,9 +3770,6 @@ int msm_vidc_queue_buffer_single(struct msm_vidc_inst *inst, struct vb2_buffer * if (!buf) return -EINVAL; - /* update start timestamp */ - msm_vidc_add_buffer_stats(inst, buf); - if (is_meta_rx_inp_enabled(inst, META_OUTBUF_FENCE) && is_output_buffer(buf->type)) { fence = msm_vidc_fence_create(inst); @@ -4638,12 +4682,13 @@ int msm_vidc_session_streamoff(struct msm_vidc_inst *inst, /* flush deferred buffers */ msm_vidc_flush_buffers(inst, buffer_type); - msm_vidc_flush_delayed_unmap_buffers(inst, buffer_type); + msm_vidc_flush_read_only_buffers(inst, buffer_type); return 0; error: msm_vidc_kill_session(inst); msm_vidc_flush_buffers(inst, buffer_type); + msm_vidc_flush_read_only_buffers(inst, buffer_type); return rc; } @@ -4684,10 +4729,9 @@ int msm_vidc_session_close(struct msm_vidc_inst *inst) } inst_lock(inst, __func__); - inst->state = MSM_VIDC_CLOSE; + msm_vidc_change_state(inst, MSM_VIDC_CLOSE, __func__); inst->sub_state = MSM_VIDC_SUB_STATE_NONE; strlcpy(inst->sub_state_name, "SUB_STATE_NONE", sizeof(inst->sub_state_name)); - msm_vidc_remove_session(inst); return rc; } @@ -5555,10 +5599,15 @@ int msm_vidc_flush_buffers(struct msm_vidc_inst *inst, buf->attr & MSM_VIDC_ATTR_DEFERRED) { print_vidc_buffer(VIDC_HIGH, "high", "flushing buffer", inst, buf); if (!(buf->attr & MSM_VIDC_ATTR_BUFFER_DONE)) { + if (is_decode_session(inst) && is_output_buffer(buf->type)) { + if (buf->dbuf_get) { + msm_vidc_memory_put_dmabuf(inst, buf->dmabuf); + buf->dbuf_get = 0; + } + } buf->data_size = 0; msm_vidc_vb2_buffer_done(inst, buf); } - msm_vidc_put_driver_buf(inst, buf); } } } @@ -5566,66 +5615,37 @@ int msm_vidc_flush_buffers(struct msm_vidc_inst *inst, return rc; } -int msm_vidc_flush_delayed_unmap_buffers(struct msm_vidc_inst *inst, +int msm_vidc_flush_read_only_buffers(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type type) { int rc = 0; - struct msm_vidc_mappings *maps; - struct msm_vidc_map *map, *dummy; - struct msm_vidc_buffer *ro_buf, *ro_dummy; - enum msm_vidc_buffer_type buffer_type[2]; - int i; - bool found = false; + struct msm_vidc_buffer *ro_buf, *dummy; if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - if (type == MSM_VIDC_BUF_INPUT) { - buffer_type[0] = MSM_VIDC_BUF_INPUT_META; - buffer_type[1] = MSM_VIDC_BUF_INPUT; - } else if (type == MSM_VIDC_BUF_OUTPUT) { - buffer_type[0] = MSM_VIDC_BUF_OUTPUT_META; - buffer_type[1] = MSM_VIDC_BUF_OUTPUT; - } else { - i_vpr_h(inst, "%s: invalid buffer type %d\n", - __func__, type); - return -EINVAL; - } + if (!is_decode_session(inst) || !is_output_buffer(type)) + return 0; - for (i = 0; i < ARRAY_SIZE(buffer_type); i++) { - maps = msm_vidc_get_mappings(inst, buffer_type[i], __func__); - if (!maps) - return -EINVAL; - - list_for_each_entry_safe(map, dummy, &maps->list, list) { - /* - * decoder output bufs will have skip_delayed_unmap = true - * unmap all decoder output buffers except those present in - * read_only buffers list - */ - if (!map->skip_delayed_unmap) - continue; - found = false; - list_for_each_entry_safe(ro_buf, ro_dummy, - &inst->buffers.read_only.list, list) { - if (map->dmabuf == ro_buf->dmabuf) { - found = true; - break; - } - } - /* completely unmap */ - if (!found) { - if (map->refcount > 1) { - i_vpr_e(inst, - "%s: unexpected map refcount: %u device addr %#x\n", - __func__, map->refcount, map->device_addr); - msm_vidc_change_state(inst, MSM_VIDC_ERROR, __func__); - } - msm_vidc_memory_unmap_completely(inst, map); - } - } + list_for_each_entry_safe(ro_buf, dummy, &inst->buffers.read_only.list, list) { + if (ro_buf->attr & MSM_VIDC_ATTR_READ_ONLY) + continue; + print_vidc_buffer(VIDC_ERR, "high", "flush ro buf", inst, ro_buf); + if (ro_buf->attach && ro_buf->sg_table) + msm_vidc_dma_buf_unmap_attachment(ro_buf->attach, ro_buf->sg_table); + if (ro_buf->attach && ro_buf->dmabuf) + msm_vidc_dma_buf_detach(ro_buf->dmabuf, ro_buf->attach); + if (ro_buf->dbuf_get) + msm_vidc_memory_put_dmabuf(inst, ro_buf->dmabuf); + ro_buf->attach = NULL; + ro_buf->sg_table = NULL; + ro_buf->dmabuf = NULL; + ro_buf->dbuf_get = 0; + ro_buf->device_addr = 0x0; + list_del_init(&ro_buf->list); + msm_memory_pool_free(inst, ro_buf); } return rc; @@ -5678,19 +5698,20 @@ void msm_vidc_destroy_buffers(struct msm_vidc_inst *inst) } } - /* read_only and release list does not take dma ref_count using dma_buf_get(). - dma_buf ptr will be obselete when its ref_count reaches zero. Hence print - the dma_buf info before releasing the ref count. - */ + /* + * read_only list does not take dma ref_count using dma_buf_get(). + * dma_buf ptr will be obselete when its ref_count reaches zero. + * Hence printthe dma_buf info before releasing the ref count. + */ list_for_each_entry_safe(buf, dummy, &inst->buffers.read_only.list, list) { - print_vidc_buffer(VIDC_ERR, "err ", "destroying ro buffer", inst, buf); - list_del(&buf->list); - msm_memory_pool_free(inst, buf); - } - - list_for_each_entry_safe(buf, dummy, &inst->buffers.release.list, list) { - print_vidc_buffer(VIDC_ERR, "err ", "destroying release buffer", inst, buf); - list_del(&buf->list); + print_vidc_buffer(VIDC_ERR, "err ", "destroying ro buf", inst, buf); + if (buf->attach && buf->sg_table) + msm_vidc_dma_buf_unmap_attachment(buf->attach, buf->sg_table); + if (buf->attach && buf->dmabuf) + msm_vidc_dma_buf_detach(buf->dmabuf, buf->attach); + if (buf->dbuf_get) + msm_vidc_memory_put_dmabuf(inst, buf->dmabuf); + list_del_init(&buf->list); msm_memory_pool_free(inst, buf); } @@ -5700,12 +5721,17 @@ void msm_vidc_destroy_buffers(struct msm_vidc_inst *inst) continue; list_for_each_entry_safe(buf, dummy, &buffers->list, list) { - print_vidc_buffer(VIDC_ERR, "err ", "destroying ", inst, buf); - if (!(buf->attr & MSM_VIDC_ATTR_BUFFER_DONE)) - msm_vidc_vb2_buffer_done(inst, buf); - msm_vidc_put_driver_buf(inst, buf); + if (buf->attach && buf->sg_table) + msm_vidc_dma_buf_unmap_attachment(buf->attach, buf->sg_table); + if (buf->attach && buf->dmabuf) + msm_vidc_dma_buf_detach(buf->dmabuf, buf->attach); + if (buf->dbuf_get) { + print_vidc_buffer(VIDC_ERR, "err ", "destroying: put dmabuf", inst, buf); + msm_vidc_memory_put_dmabuf(inst, buf->dmabuf); + } + list_del_init(&buf->list); + msm_memory_pool_free(inst, buf); } - msm_vidc_unmap_buffers(inst, ext_buf_types[i]); } list_for_each_entry_safe(ts, dummy_ts, &inst->timestamps.list, sort.list) { @@ -5736,8 +5762,19 @@ void msm_vidc_destroy_buffers(struct msm_vidc_inst *inst) } list_for_each_entry_safe(dbuf, dummy_dbuf, &inst->dmabuf_tracker, list) { - i_vpr_e(inst, "%s: removing dma_buf %#x, refcount %u\n", - __func__, dbuf->dmabuf, dbuf->refcount); + struct dma_buf *dmabuf; + struct inode *f_inode; + unsigned long inode_num = 0; + + dmabuf = dbuf->dmabuf; + if (dmabuf && dmabuf->file) { + f_inode = file_inode(dmabuf->file); + if (f_inode) { + inode_num = f_inode->i_ino; + } + } + i_vpr_e(inst, "%s: removing dma_buf %#lx, inode %lu, refcount %u\n", + __func__, dbuf->dmabuf, inode_num, dbuf->refcount); msm_vidc_memory_put_dmabuf_completely(inst, dbuf); } @@ -5774,8 +5811,6 @@ static void msm_vidc_close_helper(struct kref *kref) i_vpr_h(inst, "%s()\n", __func__); msm_vidc_fence_deinit(inst); - msm_vidc_event_queue_deinit(inst); - msm_vidc_vb2_queue_deinit(inst); msm_vidc_debugfs_deinit_inst(inst); if (is_decode_session(inst)) msm_vdec_inst_deinit(inst); @@ -5784,6 +5819,7 @@ static void msm_vidc_close_helper(struct kref *kref) msm_vidc_free_input_cr_list(inst); if (inst->workq) destroy_workqueue(inst->workq); + msm_vidc_destroy_buffers(inst); msm_vidc_remove_dangling_session(inst); mutex_destroy(&inst->client_lock); mutex_destroy(&inst->request_lock); diff --git a/driver/vidc/src/msm_vidc_memory.c b/driver/vidc/src/msm_vidc_memory.c index 936fa8185e..b1dd7d0a00 100644 --- a/driver/vidc/src/msm_vidc_memory.c +++ b/driver/vidc/src/msm_vidc_memory.c @@ -14,7 +14,6 @@ #include "msm_vidc_debug.h" #include "msm_vidc_internal.h" #include "msm_vidc_driver.h" -#include "msm_vidc_dt.h" #include "msm_vidc_core.h" #include "msm_vidc_events.h" #include "venus_hfi.h" @@ -28,7 +27,7 @@ struct msm_vidc_buf_region_name { char *name; }; -struct context_bank_info *get_context_bank(struct msm_vidc_core *core, +struct context_bank_info *msm_vidc_get_context_bank(struct msm_vidc_core *core, enum msm_vidc_buffer_region region) { const char *name; @@ -215,7 +214,7 @@ int msm_vidc_memory_map(struct msm_vidc_core *core, struct msm_vidc_map *map) } } - cb = get_context_bank(core, map->region); + cb = msm_vidc_get_context_bank(core, map->region); if (!cb) { d_vpr_e("%s: Failed to get context bank device\n", __func__); @@ -318,6 +317,78 @@ exit: return rc; } +struct dma_buf_attachment *msm_vidc_dma_buf_attach(struct dma_buf *dbuf, + struct device *dev) +{ + int rc = 0; + struct dma_buf_attachment *attach = NULL; + + if (!dbuf || !dev) { + d_vpr_e("%s: invalid params\n", __func__); + return NULL; + } + + attach = dma_buf_attach(dbuf, dev); + if (IS_ERR_OR_NULL(attach)) { + rc = PTR_ERR(attach) ? PTR_ERR(attach) : -1; + d_vpr_e("Failed to attach dmabuf, error %d\n", rc); + return NULL;; + } + + return attach; +} + +int msm_vidc_dma_buf_detach(struct dma_buf *dbuf, + struct dma_buf_attachment *attach) +{ + int rc = 0; + + if (!dbuf || !attach) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + dma_buf_detach(dbuf, attach); + + return rc; +} + +struct sg_table *msm_vidc_dma_buf_map_attachment( + struct dma_buf_attachment *attach) +{ + int rc = 0; + struct sg_table *table = NULL; + + if (!attach) { + d_vpr_e("%s: invalid params\n", __func__); + return NULL; + } + + table = dma_buf_map_attachment(attach, DMA_BIDIRECTIONAL); + if (IS_ERR_OR_NULL(table)) { + rc = PTR_ERR(table) ? PTR_ERR(table) : -1; + d_vpr_e("Failed to map table, error %d\n", rc); + return NULL; + } + + return table; +} + +int msm_vidc_dma_buf_unmap_attachment(struct dma_buf_attachment *attach, + struct sg_table *table) +{ + int rc = 0; + + if (!attach || !table) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + dma_buf_unmap_attachment(attach, table, DMA_BIDIRECTIONAL); + + return rc; +} + int msm_vidc_vmem_alloc(unsigned long size, void **mem, const char *msg) { int rc = 0; diff --git a/driver/vidc/src/msm_vidc_vb2.c b/driver/vidc/src/msm_vidc_vb2.c index 7aaad7ad96..ae51df02d0 100644 --- a/driver/vidc/src/msm_vidc_vb2.c +++ b/driver/vidc/src/msm_vidc_vb2.c @@ -4,6 +4,8 @@ */ /* Copyright (c) 2022. Qualcomm Innovation Center, Inc. All rights reserved. */ +#include + #include "msm_vidc_vb2.h" #include "msm_vidc_core.h" #include "msm_vidc_inst.h" @@ -14,6 +16,7 @@ #include "msm_venc.h" #include "msm_vidc_debug.h" #include "msm_vidc_control.h" +#include "msm_vidc_dt.h" extern struct msm_vidc_core *g_core; @@ -65,7 +68,52 @@ void *msm_vb2_alloc(struct vb2_buffer *vb, struct device *dev, void *msm_vb2_attach_dmabuf(struct vb2_buffer *vb, struct device *dev, struct dma_buf *dbuf, unsigned long size) { - return (void *)0xdeadbeef; + struct msm_vidc_inst *inst; + struct msm_vidc_core *core; + struct msm_vidc_buffer *buf = NULL; + + if (!vb || !dev || !dbuf || !vb->vb2_queue) { + d_vpr_e("%s: invalid params\n", __func__); + return NULL; + } + inst = vb->vb2_queue->drv_priv; + inst = get_inst_ref(g_core, inst); + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params %pK\n", __func__, inst); + return NULL; + } + core = inst->core; + + buf = msm_vidc_fetch_buffer(inst, vb); + if (!buf) { + i_vpr_e(inst, "%s: failed to fetch buffer\n", __func__); + buf = NULL; + goto exit; + } + buf->inst = inst; + + buf->attach = msm_vidc_dma_buf_attach(dbuf, dev); + if (!buf->attach) { + buf->attach = NULL; + buf = NULL; + goto exit; + } + + buf->attach->dma_map_attrs |= DMA_ATTR_SKIP_CPU_SYNC; + /* remove below flag when userspace recycles buffers in same index */ + buf->attach->dma_map_attrs |= DMA_ATTR_DELAYED_UNMAP; + if (core->dt->sys_cache_present) + buf->attach->dma_map_attrs |= + DMA_ATTR_IOMMU_USE_UPSTREAM_HINT; + + buf->dmabuf = dbuf; + print_vidc_buffer(VIDC_LOW, "low ", "attach", inst, buf); + +exit: + if (!buf) + msm_vidc_change_state(inst, MSM_VIDC_ERROR, __func__); + put_inst(inst); + return buf; } #endif @@ -80,15 +128,126 @@ int msm_vb2_mmap(void *buf_priv, struct vm_area_struct *vma) void msm_vb2_detach_dmabuf(void *buf_priv) { + struct msm_vidc_buffer *vbuf = buf_priv; + struct msm_vidc_buffer *ro_buf, *dummy; + struct msm_vidc_inst *inst; + + if (!vbuf || !vbuf->inst) { + d_vpr_e("%s: invalid params\n", __func__); + return; + } + inst = vbuf->inst; + inst = get_inst_ref(g_core, inst); + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params %pK\n", __func__, inst); + return; + } + + if (is_decode_session(inst) && is_output_buffer(vbuf->type)) { + list_for_each_entry_safe(ro_buf, dummy, &inst->buffers.read_only.list, list) { + if (ro_buf->dmabuf == vbuf->dmabuf) { + print_vidc_buffer(VIDC_LOW, "low ", "detach: found ro buf", inst, ro_buf); + ro_buf->attach = vbuf->attach; + vbuf->attach = NULL; + goto exit; + } + } + } + + print_vidc_buffer(VIDC_LOW, "low ", "detach", inst, vbuf); + if (vbuf->attach && vbuf->dmabuf) { + msm_vidc_dma_buf_detach(vbuf->dmabuf, vbuf->attach); + vbuf->attach = NULL; + vbuf->dmabuf = NULL; + vbuf->inst = NULL; + } + vbuf->inst = NULL; + +exit: + put_inst(inst); + return; } int msm_vb2_map_dmabuf(void *buf_priv) { - return 0; + int rc = 0; + struct msm_vidc_buffer *buf = buf_priv; + struct msm_vidc_inst *inst; + + if (!buf || !buf->inst) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + inst = buf->inst; + inst = get_inst_ref(g_core, inst); + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + buf->sg_table = msm_vidc_dma_buf_map_attachment(buf->attach); + if (!buf->sg_table) { + buf->sg_table = NULL; + rc = -ENOMEM; + goto exit; + } + + if (!buf->sg_table->sgl) { + i_vpr_e(inst, "%s: sgl is NULL\n", __func__); + rc = -ENOMEM; + goto exit; + } + + buf->device_addr = buf->sg_table->sgl->dma_address; + print_vidc_buffer(VIDC_HIGH, "high", "map", inst, buf); + +exit: + if (rc) + msm_vidc_change_state(inst, MSM_VIDC_ERROR, __func__); + put_inst(inst); + return rc; } void msm_vb2_unmap_dmabuf(void *buf_priv) { + struct msm_vidc_buffer *vbuf = buf_priv; + struct msm_vidc_buffer *ro_buf, *dummy; + struct msm_vidc_inst *inst; + + if (!vbuf || !vbuf->inst) { + d_vpr_e("%s: invalid params\n", __func__); + return; + } + inst = vbuf->inst; + inst = get_inst_ref(g_core, inst); + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params %pK\n", __func__, inst); + return; + } + + if (is_decode_session(inst) && is_output_buffer(vbuf->type)) { + list_for_each_entry_safe(ro_buf, dummy, &inst->buffers.read_only.list, list) { + if (ro_buf->dmabuf == vbuf->dmabuf) { + print_vidc_buffer(VIDC_LOW, "low ", "unmap: found ro buf", inst, ro_buf); + ro_buf->sg_table = vbuf->sg_table; + ro_buf->attach = vbuf->attach; + vbuf->sg_table = NULL; + vbuf->device_addr = 0x0; + goto exit; + } + } + } + + print_vidc_buffer(VIDC_HIGH, "high", "unmap", inst, vbuf); + if (vbuf->attach && vbuf->sg_table) { + msm_vidc_dma_buf_unmap_attachment(vbuf->attach, vbuf->sg_table); + vbuf->sg_table = NULL; + vbuf->device_addr = 0x0; + } + +exit: + put_inst(inst); + return; } int msm_vidc_queue_setup(struct vb2_queue *q, @@ -97,8 +256,12 @@ int msm_vidc_queue_setup(struct vb2_queue *q, { int rc = 0; struct msm_vidc_inst *inst; + struct msm_vidc_core *core; int port; struct v4l2_format *f; + enum msm_vidc_buffer_type buffer_type = 0; + enum msm_vidc_buffer_region region = MSM_VIDC_REGION_NONE; + struct context_bank_info *cb = NULL; if (!q || !num_buffers || !num_planes || !sizes || !q->drv_priv) { @@ -111,6 +274,7 @@ int msm_vidc_queue_setup(struct vb2_queue *q, d_vpr_e("%s: invalid params %pK\n", __func__, inst); return -EINVAL; } + core = inst->core; if (is_state(inst, MSM_VIDC_STREAMING)) { i_vpr_e(inst, "%s: invalid state %d\n", __func__, inst->state); @@ -135,6 +299,16 @@ int msm_vidc_queue_setup(struct vb2_queue *q, } } + buffer_type = v4l2_type_to_driver(q->type, __func__); + if (!buffer_type) + return -EINVAL; + + rc = msm_vidc_free_buffers(inst, buffer_type); + if (rc) { + i_vpr_e(inst, "%s: failed to free buffers, type %s\n", + __func__, v4l2_type_name(q->type)); + return rc; + } if (port == INPUT_PORT) { *num_planes = 1; @@ -181,9 +355,25 @@ int msm_vidc_queue_setup(struct vb2_queue *q, sizes[0] = inst->fmts[port].fmt.meta.buffersize; } + rc = msm_vidc_allocate_buffers(inst, buffer_type, *num_buffers); + if (rc) { + i_vpr_e(inst, "%s: failed to allocate buffers, type %s\n", + __func__, v4l2_type_name(q->type)); + return rc; + } + + region = msm_vidc_get_buffer_region(inst, buffer_type, __func__); + cb = msm_vidc_get_context_bank(core, region); + if (!cb) { + d_vpr_e("%s: Failed to get context bank device\n", + __func__); + return -EIO; + } + q->dev = cb->dev; + i_vpr_h(inst, - "queue_setup: type %s num_buffers %d sizes[0] %d\n", - v4l2_type_name(q->type), *num_buffers, sizes[0]); + "queue_setup: type %s num_buffers %d sizes[0] %d cb %s\n", + v4l2_type_name(q->type), *num_buffers, sizes[0], cb->name); return rc; } diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index 5eb8aaa6b6..c37ad90a66 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -657,7 +657,6 @@ static int handle_read_only_buffer(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buf) { struct msm_vidc_buffer *ro_buf; - struct msm_vidc_buffers *ro_buffers; bool found = false; if (!inst || !buf) { @@ -671,11 +670,7 @@ static int handle_read_only_buffer(struct msm_vidc_inst *inst, if (!(buf->attr & MSM_VIDC_ATTR_READ_ONLY)) return 0; - ro_buffers = msm_vidc_get_buffers(inst, MSM_VIDC_BUF_READ_ONLY, __func__); - if (!ro_buffers) - return -EINVAL; - - list_for_each_entry(ro_buf, &ro_buffers->list, list) { + list_for_each_entry(ro_buf, &inst->buffers.read_only.list, list) { if (ro_buf->device_addr == buf->device_addr) { found = true; break; @@ -691,10 +686,20 @@ static int handle_read_only_buffer(struct msm_vidc_inst *inst, i_vpr_e(inst, "%s: buffer alloc failed\n", __func__); return -ENOMEM; } - memcpy(ro_buf, buf, sizeof(struct msm_vidc_buffer)); + ro_buf->index = -1; + ro_buf->inst = inst; + ro_buf->type = buf->type; + ro_buf->fd = buf->fd; + ro_buf->dmabuf = buf->dmabuf; + ro_buf->device_addr = buf->device_addr; + ro_buf->data_offset = buf->data_offset; + ro_buf->dbuf_get = buf->dbuf_get; + buf->dbuf_get = 0; INIT_LIST_HEAD(&ro_buf->list); - list_add_tail(&ro_buf->list, &ro_buffers->list); + list_add_tail(&ro_buf->list, &inst->buffers.read_only.list); print_vidc_buffer(VIDC_LOW, "low ", "ro buf added", inst, ro_buf); + } else { + print_vidc_buffer(VIDC_LOW, "low ", "ro buf found", inst, ro_buf); } ro_buf->attr |= MSM_VIDC_ATTR_READ_ONLY; @@ -705,8 +710,6 @@ static int handle_non_read_only_buffer(struct msm_vidc_inst *inst, struct hfi_buffer *buffer) { struct msm_vidc_buffer *ro_buf; - struct msm_vidc_buffers *ro_buffers; - bool found = false; if (!inst || !buffer) { d_vpr_e("%s: invalid params\n", __func__); @@ -719,27 +722,13 @@ static int handle_non_read_only_buffer(struct msm_vidc_inst *inst, if (buffer->flags & HFI_BUF_FW_FLAG_READONLY) return 0; - ro_buffers = msm_vidc_get_buffers(inst, MSM_VIDC_BUF_READ_ONLY, __func__); - if (!ro_buffers) - return -EINVAL; - - list_for_each_entry(ro_buf, &ro_buffers->list, list) { + list_for_each_entry(ro_buf, &inst->buffers.read_only.list, list) { if (ro_buf->device_addr == buffer->base_address) { - found = true; + ro_buf->attr &= ~MSM_VIDC_ATTR_READ_ONLY; break; } } - /* - * Without RO flag: remove buffer from read_only list if present - * if not present, do not error out - */ - if (found) { - print_vidc_buffer(VIDC_LOW, "low ", "ro buf deleted", inst, ro_buf); - list_del(&ro_buf->list); - msm_memory_pool_free(inst, ro_buf); - } - return 0; } @@ -883,6 +872,9 @@ static int handle_output_buffer(struct msm_vidc_inst *inst, } if (is_decode_session(inst)) { + /* handle release response for decoder output buffer */ + if (buffer->flags & HFI_BUF_FW_FLAG_RELEASE_DONE) + return handle_release_output_buffer(inst, buffer); /* handle psc last flag buffer */ if (buffer->flags & HFI_BUF_FW_FLAG_PSC_LAST) { rc = handle_psc_last_flag_buffer(inst, buffer); @@ -903,8 +895,11 @@ static int handle_output_buffer(struct msm_vidc_inst *inst, found = false; list_for_each_entry(buf, &buffers->list, list) { + if (!(buf->attr & MSM_VIDC_ATTR_QUEUED)) + continue; if (is_decode_session(inst)) - found = (buf->device_addr == buffer->base_address && + found = (buf->index == buffer->index && + buf->device_addr == buffer->base_address && buf->data_offset == buffer->data_offset); else found = (buf->index == buffer->index); @@ -912,11 +907,9 @@ static int handle_output_buffer(struct msm_vidc_inst *inst, if (found) break; } - if (!found) - return 0; - - if (!(buf->attr & MSM_VIDC_ATTR_QUEUED)) { - print_vidc_buffer(VIDC_ERR, "err ", "not queued", inst, buf); + if (!found) { + i_vpr_l(inst, "%s: invalid idx %d daddr %#x\n", + __func__, buffer->index, buffer->base_address); return 0; } @@ -987,6 +980,11 @@ static int handle_output_buffer(struct msm_vidc_inst *inst, } else { buf->attr &= ~MSM_VIDC_ATTR_READ_ONLY; } + + if (buf->dbuf_get) { + msm_vidc_memory_put_dmabuf(inst, buf->dmabuf); + buf->dbuf_get = 0; + } } buf->flags = 0; @@ -1259,7 +1257,6 @@ static int handle_dequeue_buffers(struct msm_vidc_inst *inst) rc = 0; } } - msm_vidc_put_driver_buf(inst, buf); } } } @@ -1303,15 +1300,16 @@ static int handle_release_internal_buffer(struct msm_vidc_inst *inst, return rc; } -static int handle_release_output_buffer(struct msm_vidc_inst *inst, - struct hfi_buffer *buffer, enum hfi_packet_port_type port_type) +int handle_release_output_buffer(struct msm_vidc_inst *inst, + struct hfi_buffer *buffer) { int rc = 0; struct msm_vidc_buffer *buf; bool found = false; - list_for_each_entry(buf, &inst->buffers.release.list, list) { - if (buf->device_addr == buffer->base_address) { + list_for_each_entry(buf, &inst->buffers.read_only.list, list) { + if (buf->device_addr == buffer->base_address && + buf->attr & MSM_VIDC_ATTR_PENDING_RELEASE) { found = true; break; } @@ -1322,9 +1320,8 @@ static int handle_release_output_buffer(struct msm_vidc_inst *inst, return -EINVAL; } - rc = msm_vdec_handle_release_buffer(inst, buf); - if (rc) - return rc; + buf->attr &= ~MSM_VIDC_ATTR_READ_ONLY; + print_vidc_buffer(VIDC_LOW, "low ", "release done", inst, buf); return rc; } @@ -1388,9 +1385,6 @@ static int handle_session_buffer(struct msm_vidc_inst *inst, msm_vidc_change_state(inst, MSM_VIDC_ERROR, __func__); return 0; } - if (is_decode_session(inst) && buffer->type == HFI_BUFFER_RAW && - buffer->flags & HFI_BUF_FW_FLAG_RELEASE_DONE) - return handle_release_output_buffer(inst, buffer, pkt->port); if (is_encode_session(inst)) { if (pkt->port == HFI_PORT_RAW) { From d861f5047c02dc29540086f7a1c03aeec68bdde4 Mon Sep 17 00:00:00 2001 From: Dikshita Agarwal Date: Tue, 27 Sep 2022 12:52:16 +0530 Subject: [PATCH 0726/1061] video: driver: remove restricted keyword Remove restricted keyword from comments. Change-Id: Idf7cc0925730f05ba0db371e0fe3dda312a85b79 Signed-off-by: Dikshita Agarwal --- driver/platform/kalama/src/kalama.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/driver/platform/kalama/src/kalama.c b/driver/platform/kalama/src/kalama.c index aa1edffa0e..84f8c3de6e 100644 --- a/driver/platform/kalama/src/kalama.c +++ b/driver/platform/kalama/src/kalama.c @@ -39,11 +39,11 @@ #define MAXIMUM_OVERRIDE_VP9_FPS 180 #ifndef V4L2_PIX_FMT_QC08C -#define V4L2_PIX_FMT_QC08C v4l2_fourcc('Q', '0', '8', 'C') /* Qualcomm 8-bit compressed */ +#define V4L2_PIX_FMT_QC08C v4l2_fourcc('Q', '0', '8', 'C') #endif #ifndef V4L2_PIX_FMT_QC10C -#define V4L2_PIX_FMT_QC10C v4l2_fourcc('Q', '1', '0', 'C') /* Qualcomm 10-bit compressed */ +#define V4L2_PIX_FMT_QC10C v4l2_fourcc('Q', '1', '0', 'C') #endif static struct codec_info codec_data_kalama[] = { From 3d9c6f17f9fa25a01496d6ea32c1455530c83ba8 Mon Sep 17 00:00:00 2001 From: Deepa Guthyappa Madivalara Date: Tue, 30 Aug 2022 11:54:44 -0700 Subject: [PATCH 0727/1061] video: driver: Add support for lanai/iris3.3 platform Add the required config and platform files to enable lanai platform with iris3.3 VPU. Change-Id: I441d631b9876705342e34097feff3e5d355d6b71 Signed-off-by: Deepa Guthyappa Madivalara --- Kbuild | 17 + config/pineapple_video.conf | 2 + config/pineapple_video.h | 8 + .../platform/common/src/msm_vidc_platform.c | 43 +- .../pineapple/inc/msm_vidc_pineapple.h | 26 + .../pineapple/src/msm_vidc_pineapple.c | 2712 +++++++++++++++++ driver/platform/pineapple/src/pineapple.c | 1976 ++++++++++++ driver/variant/iris33/inc/hfi_buffer_iris33.h | 1899 ++++++++++++ .../iris33/inc/msm_vidc_buffer_iris33.h | 18 + driver/variant/iris33/inc/msm_vidc_iris33.h | 31 + .../iris33/inc/msm_vidc_power_iris33.h | 17 + .../iris33/src/msm_vidc_buffer_iris33.c | 837 +++++ driver/variant/iris33/src/msm_vidc_iris33.c | 1121 +++++++ .../iris33/src/msm_vidc_power_iris33.c | 803 +++++ 14 files changed, 9508 insertions(+), 2 deletions(-) create mode 100644 config/pineapple_video.conf create mode 100644 config/pineapple_video.h create mode 100644 driver/platform/pineapple/inc/msm_vidc_pineapple.h create mode 100644 driver/platform/pineapple/src/msm_vidc_pineapple.c create mode 100644 driver/platform/pineapple/src/pineapple.c create mode 100644 driver/variant/iris33/inc/hfi_buffer_iris33.h create mode 100644 driver/variant/iris33/inc/msm_vidc_buffer_iris33.h create mode 100644 driver/variant/iris33/inc/msm_vidc_iris33.h create mode 100644 driver/variant/iris33/inc/msm_vidc_power_iris33.h create mode 100644 driver/variant/iris33/src/msm_vidc_buffer_iris33.c create mode 100644 driver/variant/iris33/src/msm_vidc_iris33.c create mode 100644 driver/variant/iris33/src/msm_vidc_power_iris33.c diff --git a/Kbuild b/Kbuild index e70c93c257..1f5cc6795a 100644 --- a/Kbuild +++ b/Kbuild @@ -14,6 +14,12 @@ LINUXINCLUDE += -include $(VIDEO_ROOT)/config/kalama_video.h \ -I$(VIDEO_ROOT)/driver/platform/kalama/inc endif +ifeq ($(CONFIG_ARCH_PINEAPPLE), y) +include $(VIDEO_ROOT)/config/pineapple_video.conf +LINUXINCLUDE += -include $(VIDEO_ROOT)/config/pineapple_video.h \ + -I$(VIDEO_ROOT)/driver/platform/pineapple/inc +endif + ifeq ($(CONFIG_ARCH_ANORAK), y) include $(VIDEO_ROOT)/config/anorak_video.conf LINUXINCLUDE += -include $(VIDEO_ROOT)/config/anorak_video.h \ @@ -38,6 +44,10 @@ ifeq ($(CONFIG_MSM_VIDC_KALAMA), y) msm_video-objs += driver/platform/kalama/src/msm_vidc_kalama.o endif +ifeq ($(CONFIG_MSM_VIDC_PINEAPPLE), y) +msm_video-objs += driver/platform/pineapple/src/msm_vidc_pineapple.o +endif + ifeq ($(CONFIG_MSM_VIDC_ANORAK), y) msm_video-objs += driver/platform/anorak/src/msm_vidc_anorak.o endif @@ -56,6 +66,13 @@ msm_video-objs += driver/variant/iris3/src/msm_vidc_buffer_iris3.o \ driver/variant/iris3/src/msm_vidc_iris3.o endif +ifeq ($(CONFIG_MSM_VIDC_IRIS33), y) +LINUXINCLUDE += -I$(VIDEO_ROOT)/driver/variant/iris33/inc +msm_video-objs += driver/variant/iris33/src/msm_vidc_buffer_iris33.o \ + driver/variant/iris33/src/msm_vidc_power_iris33.o \ + driver/variant/iris33/src/msm_vidc_iris33.o +endif + msm_video-objs += driver/vidc/src/msm_vidc_v4l2.o \ driver/vidc/src/msm_vidc_vb2.o \ driver/vidc/src/msm_vidc.o \ diff --git a/config/pineapple_video.conf b/config/pineapple_video.conf new file mode 100644 index 0000000000..176e5533a6 --- /dev/null +++ b/config/pineapple_video.conf @@ -0,0 +1,2 @@ +export CONFIG_MSM_VIDC_PINEAPPLE=y +export CONFIG_MSM_VIDC_IRIS33=y diff --git a/config/pineapple_video.h b/config/pineapple_video.h new file mode 100644 index 0000000000..032b4aafa6 --- /dev/null +++ b/config/pineapple_video.h @@ -0,0 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) 2020-2022, The Linux Foundation. All rights reserved. + * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#define CONFIG_MSM_VIDC_PINEAPPLE 1 +#define CONFIG_MSM_VIDC_IRIS33 1 diff --git a/driver/platform/common/src/msm_vidc_platform.c b/driver/platform/common/src/msm_vidc_platform.c index 57c38075b5..84f64bd237 100644 --- a/driver/platform/common/src/msm_vidc_platform.c +++ b/driver/platform/common/src/msm_vidc_platform.c @@ -23,6 +23,12 @@ #if defined(CONFIG_MSM_VIDC_KALAMA) #include "msm_vidc_kalama.h" #endif +#if defined(CONFIG_MSM_VIDC_PINEAPPLE) +#include "msm_vidc_pineapple.h" +#endif +#if defined(CONFIG_MSM_VIDC_PINEAPPLE) +#include "msm_vidc_pineapple.h" +#endif #if defined(CONFIG_MSM_VIDC_ANORAK) #include "msm_vidc_anorak.h" #endif @@ -32,7 +38,9 @@ #if defined(CONFIG_MSM_VIDC_IRIS3) #include "msm_vidc_iris3.h" #endif - +#if defined(CONFIG_MSM_VIDC_IRIS33) +#include "msm_vidc_iris33.h" +#endif /* * Custom conversion coefficients for resolution: 176x144 negative * coeffs are converted to s4.9 format @@ -229,6 +237,14 @@ static int msm_vidc_deinit_platform_variant(struct msm_vidc_core *core, struct d return rc; } #endif +#if defined(CONFIG_MSM_VIDC_PINEAPPLE) + if (of_device_is_compatible(dev->of_node, "qcom,msm-vidc-pineapple")) { + rc = msm_vidc_deinit_platform_pineapple(core, dev); + if (rc) + d_vpr_e("%s: failed with %d\n", __func__, rc); + return rc; + } +#endif #if defined(CONFIG_MSM_VIDC_ANORAK) if (of_device_is_compatible(dev->of_node, "qcom,msm-vidc-anorak")) { rc = msm_vidc_deinit_platform_anorak(core, dev); @@ -268,6 +284,14 @@ static int msm_vidc_init_platform_variant(struct msm_vidc_core *core, struct dev return rc; } #endif +#if defined(CONFIG_MSM_VIDC_PINEAPPLE) + if (of_device_is_compatible(dev->of_node, "qcom,msm-vidc-pineapple")) { + rc = msm_vidc_init_platform_pineapple(core, dev); + if (rc) + d_vpr_e("%s: failed with %d\n", __func__, rc); + return rc; + } +#endif #if defined(CONFIG_MSM_VIDC_ANORAK) if (of_device_is_compatible(dev->of_node, "qcom,msm-vidc-anorak")) { rc = msm_vidc_init_platform_anorak(core, dev); @@ -307,7 +331,14 @@ static int msm_vidc_deinit_vpu(struct msm_vidc_core *core, struct device *dev) return rc; } #endif - +#if defined(CONFIG_MSM_VIDC_IRIS33) + if (of_device_is_compatible(dev->of_node, "qcom,msm-vidc-iris33")) { + rc = msm_vidc_deinit_iris33(core); + if (rc) + d_vpr_e("%s: failed with %d\n", __func__, rc); + return rc; + } +#endif return rc; } @@ -336,6 +367,14 @@ static int msm_vidc_init_vpu(struct msm_vidc_core *core, struct device *dev) return rc; } #endif +#if defined(CONFIG_MSM_VIDC_IRIS33) + if (of_device_is_compatible(dev->of_node, "qcom,msm-vidc-iris33")) { + rc = msm_vidc_init_iris33(core); + if (rc) + d_vpr_e("%s: failed with %d\n", __func__, rc); + return rc; + } +#endif return rc; } diff --git a/driver/platform/pineapple/inc/msm_vidc_pineapple.h b/driver/platform/pineapple/inc/msm_vidc_pineapple.h new file mode 100644 index 0000000000..a0cb18f80f --- /dev/null +++ b/driver/platform/pineapple/inc/msm_vidc_pineapple.h @@ -0,0 +1,26 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) 2020-2022, The Linux Foundation. All rights reserved. + * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#ifndef _MSM_VIDC_PINEAPPLE_H_ +#define _MSM_VIDC_PINEAPPLE_H_ + +#include "msm_vidc_core.h" + +#if defined(CONFIG_MSM_VIDC_PINEAPPLE) +int msm_vidc_init_platform_pineapple(struct msm_vidc_core *core, struct device *dev); +int msm_vidc_deinit_platform_pineapple(struct msm_vidc_core *core, struct device *dev); +#else +int msm_vidc_init_platform_pineapple(struct msm_vidc_core *core, struct device *dev) +{ + return -EINVAL; +} +int msm_vidc_deinit_platform_pineapple(struct msm_vidc_core *core, struct device *dev) +{ + return -EINVAL; +} +#endif + +#endif // _MSM_VIDC_PINEAPPLE_H_ diff --git a/driver/platform/pineapple/src/msm_vidc_pineapple.c b/driver/platform/pineapple/src/msm_vidc_pineapple.c new file mode 100644 index 0000000000..58d5cbd309 --- /dev/null +++ b/driver/platform/pineapple/src/msm_vidc_pineapple.c @@ -0,0 +1,2712 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2020-2022, The Linux Foundation. All rights reserved. + * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include + +#include +#include "msm_vidc_pineapple.h" +#include "msm_vidc_platform.h" +#include "msm_vidc_debug.h" +#include "msm_vidc_internal.h" +#include "msm_vidc_control_ext.h" +#include "hfi_property.h" +#include "msm_vidc_iris33.h" +#include "hfi_command.h" + +#define DEFAULT_VIDEO_CONCEAL_COLOR_BLACK 0x8020010 +#define MAX_LTR_FRAME_COUNT 2 +#define MAX_BASE_LAYER_PRIORITY_ID 63 +#define MAX_OP_POINT 31 +#define MAX_BITRATE 245000000 +#define DEFAULT_BITRATE 20000000 +#define MINIMUM_FPS 1 +#define MAXIMUM_FPS 480 +#define MAXIMUM_DEC_FPS 960 +#define MAX_QP 51 +#define DEFAULT_QP 20 +#define MAX_CONSTANT_QUALITY 100 +#define MIN_SLICE_BYTE_SIZE 512 +#define MAX_SLICE_BYTE_SIZE \ + ((MAX_BITRATE) >> 3) +#define MAX_SLICE_MB_SIZE \ + (((4096 + 15) >> 4) * ((2304 + 15) >> 4)) + +#define ENC MSM_VIDC_ENCODER +#define DEC MSM_VIDC_DECODER +#define H264 MSM_VIDC_H264 +#define HEVC MSM_VIDC_HEVC +#define VP9 MSM_VIDC_VP9 +#define AV1 MSM_VIDC_AV1 +#define HEIC MSM_VIDC_HEIC +#define CODECS_ALL (H264 | HEVC | VP9 | HEIC | AV1) +#define MAXIMUM_OVERRIDE_VP9_FPS 200 + +static struct codec_info codec_data_pineapple[] = { + { + .v4l2_codec = V4L2_PIX_FMT_H264, + .vidc_codec = MSM_VIDC_H264, + .pixfmt_name = "AVC", + }, + { + .v4l2_codec = V4L2_PIX_FMT_HEVC, + .vidc_codec = MSM_VIDC_HEVC, + .pixfmt_name = "HEVC", + }, + { + .v4l2_codec = V4L2_PIX_FMT_VP9, + .vidc_codec = MSM_VIDC_VP9, + .pixfmt_name = "VP9", + }, + { + .v4l2_codec = V4L2_PIX_FMT_AV1, + .vidc_codec = MSM_VIDC_AV1, + .pixfmt_name = "AV1", + }, + { + .v4l2_codec = V4L2_PIX_FMT_HEIC, + .vidc_codec = MSM_VIDC_HEIC, + .pixfmt_name = "HEIC", + }, +}; + +static struct color_format_info color_format_data_pineapple[] = { + { + .v4l2_color_format = V4L2_PIX_FMT_NV12, + .vidc_color_format = MSM_VIDC_FMT_NV12, + .pixfmt_name = "NV12", + }, + { + .v4l2_color_format = V4L2_PIX_FMT_NV21, + .vidc_color_format = MSM_VIDC_FMT_NV21, + .pixfmt_name = "NV21", + }, + { + .v4l2_color_format = V4L2_PIX_FMT_VIDC_NV12C, + .vidc_color_format = MSM_VIDC_FMT_NV12C, + .pixfmt_name = "NV12C", + }, + { + .v4l2_color_format = V4L2_PIX_FMT_VIDC_TP10C, + .vidc_color_format = MSM_VIDC_FMT_TP10C, + .pixfmt_name = "TP10C", + }, + { + .v4l2_color_format = V4L2_PIX_FMT_RGBA32, + .vidc_color_format = MSM_VIDC_FMT_RGBA8888, + .pixfmt_name = "RGBA", + }, + { + .v4l2_color_format = V4L2_PIX_FMT_VIDC_ARGB32C, + .vidc_color_format = MSM_VIDC_FMT_RGBA8888C, + .pixfmt_name = "RGBAC", + }, + { + .v4l2_color_format = V4L2_PIX_FMT_VIDC_P010, + .vidc_color_format = MSM_VIDC_FMT_P010, + .pixfmt_name = "P010", + }, + { + .v4l2_color_format = V4L2_META_FMT_VIDC, + .vidc_color_format = MSM_VIDC_FMT_META, + .pixfmt_name = "META", + }, +}; + +static struct color_primaries_info color_primaries_data_pineapple[] = { + { + .v4l2_color_primaries = V4L2_COLORSPACE_DEFAULT, + .vidc_color_primaries = MSM_VIDC_PRIMARIES_RESERVED, + }, + { + .v4l2_color_primaries = V4L2_COLORSPACE_DEFAULT, + .vidc_color_primaries = MSM_VIDC_PRIMARIES_UNSPECIFIED, + }, + { + .v4l2_color_primaries = V4L2_COLORSPACE_REC709, + .vidc_color_primaries = MSM_VIDC_PRIMARIES_BT709, + }, + { + .v4l2_color_primaries = V4L2_COLORSPACE_470_SYSTEM_M, + .vidc_color_primaries = MSM_VIDC_PRIMARIES_BT470_SYSTEM_M, + }, + { + .v4l2_color_primaries = V4L2_COLORSPACE_470_SYSTEM_BG, + .vidc_color_primaries = MSM_VIDC_PRIMARIES_BT470_SYSTEM_BG, + }, + { + .v4l2_color_primaries = V4L2_COLORSPACE_SMPTE170M, + .vidc_color_primaries = MSM_VIDC_PRIMARIES_BT601_525, + }, + { + .v4l2_color_primaries = V4L2_COLORSPACE_SMPTE240M, + .vidc_color_primaries = MSM_VIDC_PRIMARIES_SMPTE_ST240M, + }, + { + .v4l2_color_primaries = V4L2_COLORSPACE_VIDC_GENERIC_FILM, + .vidc_color_primaries = MSM_VIDC_PRIMARIES_GENERIC_FILM, + }, + { + .v4l2_color_primaries = V4L2_COLORSPACE_BT2020, + .vidc_color_primaries = MSM_VIDC_PRIMARIES_BT2020, + }, + { + .v4l2_color_primaries = V4L2_COLORSPACE_DCI_P3, + .vidc_color_primaries = MSM_VIDC_PRIMARIES_SMPTE_RP431_2, + }, + { + .v4l2_color_primaries = V4L2_COLORSPACE_VIDC_EG431, + .vidc_color_primaries = MSM_VIDC_PRIMARIES_SMPTE_EG431_1, + }, + { + .v4l2_color_primaries = V4L2_COLORSPACE_VIDC_EBU_TECH, + .vidc_color_primaries = MSM_VIDC_PRIMARIES_SMPTE_EBU_TECH, + }, +}; + +static struct transfer_char_info transfer_char_data_pineapple[] = { + { + .v4l2_transfer_char = V4L2_XFER_FUNC_DEFAULT, + .vidc_transfer_char = MSM_VIDC_TRANSFER_RESERVED, + }, + { + .v4l2_transfer_char = V4L2_XFER_FUNC_DEFAULT, + .vidc_transfer_char = MSM_VIDC_TRANSFER_UNSPECIFIED, + }, + { + .v4l2_transfer_char = V4L2_XFER_FUNC_709, + .vidc_transfer_char = MSM_VIDC_TRANSFER_BT709, + }, + { + .v4l2_transfer_char = V4L2_XFER_FUNC_VIDC_BT470_SYSTEM_M, + .vidc_transfer_char = MSM_VIDC_TRANSFER_BT470_SYSTEM_M, + }, + { + .v4l2_transfer_char = V4L2_XFER_FUNC_VIDC_BT470_SYSTEM_BG, + .vidc_transfer_char = MSM_VIDC_TRANSFER_BT470_SYSTEM_BG, + }, + { + .v4l2_transfer_char = V4L2_XFER_FUNC_VIDC_BT601_525_OR_625, + .vidc_transfer_char = MSM_VIDC_TRANSFER_BT601_525_OR_625, + }, + { + .v4l2_transfer_char = V4L2_XFER_FUNC_SMPTE240M, + .vidc_transfer_char = MSM_VIDC_TRANSFER_SMPTE_ST240M, + }, + { + .v4l2_transfer_char = V4L2_XFER_FUNC_VIDC_LINEAR, + .vidc_transfer_char = MSM_VIDC_TRANSFER_LINEAR, + }, + { + .v4l2_transfer_char = V4L2_XFER_FUNC_VIDC_XVYCC, + .vidc_transfer_char = MSM_VIDC_TRANSFER_XVYCC, + }, + { + .v4l2_transfer_char = V4L2_XFER_FUNC_VIDC_BT1361, + .vidc_transfer_char = MSM_VIDC_TRANSFER_BT1361_0, + }, + { + .v4l2_transfer_char = V4L2_XFER_FUNC_SRGB, + .vidc_transfer_char = MSM_VIDC_TRANSFER_SRGB_SYCC, + }, + { + .v4l2_transfer_char = V4L2_XFER_FUNC_VIDC_BT2020, + .vidc_transfer_char = MSM_VIDC_TRANSFER_BT2020_14, + }, + { + .v4l2_transfer_char = V4L2_XFER_FUNC_SMPTE2084, + .vidc_transfer_char = MSM_VIDC_TRANSFER_SMPTE_ST2084_PQ, + }, + { + .v4l2_transfer_char = V4L2_XFER_FUNC_VIDC_ST428, + .vidc_transfer_char = MSM_VIDC_TRANSFER_SMPTE_ST428_1, + }, + { + .v4l2_transfer_char = V4L2_XFER_FUNC_VIDC_HLG, + .vidc_transfer_char = MSM_VIDC_TRANSFER_BT2100_2_HLG, + }, +}; + +static struct matrix_coeff_info matrix_coeff_data_pineapple[] = { + { + .v4l2_matrix_coeff = V4L2_YCBCR_ENC_DEFAULT, + .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_RESERVED, + }, + { + .v4l2_matrix_coeff = V4L2_YCBCR_ENC_DEFAULT, + .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_UNSPECIFIED, + }, + { + .v4l2_matrix_coeff = V4L2_YCBCR_VIDC_SRGB_OR_SMPTE_ST428, + .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_SRGB_SMPTE_ST428_1, + }, + { + .v4l2_matrix_coeff = V4L2_YCBCR_ENC_709, + .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_BT709, + }, + { + .v4l2_matrix_coeff = V4L2_YCBCR_ENC_XV709, + .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_BT709, + }, + { + .v4l2_matrix_coeff = V4L2_YCBCR_VIDC_FCC47_73_682, + .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_FCC_TITLE_47, + }, + { + .v4l2_matrix_coeff = V4L2_YCBCR_ENC_XV601, + .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_BT470_SYS_BG_OR_BT601_625, + }, + { + .v4l2_matrix_coeff = V4L2_YCBCR_ENC_601, + .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_BT601_525_BT1358_525_OR_625, + }, + { + .v4l2_matrix_coeff = V4L2_YCBCR_ENC_SMPTE240M, + .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_SMPTE_ST240, + }, + { + .v4l2_matrix_coeff = V4L2_YCBCR_ENC_BT2020, + .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_BT2020_NON_CONSTANT, + }, + { + .v4l2_matrix_coeff = V4L2_YCBCR_ENC_BT2020_CONST_LUM, + .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_BT2020_CONSTANT, + }, +}; + +static struct msm_platform_core_capability core_data_pineapple[] = { + /* {type, value} */ + {ENC_CODECS, H264|HEVC|HEIC}, + {DEC_CODECS, H264|HEVC|VP9|AV1|HEIC}, + {MAX_SESSION_COUNT, 16}, + {MAX_NUM_720P_SESSIONS, 16}, + {MAX_NUM_1080P_SESSIONS, 16}, + {MAX_NUM_4K_SESSIONS, 8}, + {MAX_NUM_8K_SESSIONS, 2}, + {MAX_SECURE_SESSION_COUNT, 3}, + {MAX_RT_MBPF, 174080}, /* (8192x4352)/256 + (4096x2176)/256*/ + {MAX_MBPF, 278528}, /* ((8192x4352)/256) * 2 */ + {MAX_MBPS, 7833600}, /* max_load + * 7680x4320@60fps or 3840x2176@240fps + * which is greater than 4096x2176@120fps, + * 8192x4320@48fps + */ + {MAX_IMAGE_MBPF, 1048576}, /* (16384x16384)/256 */ + {MAX_MBPF_HQ, 8160}, /* ((1920x1088)/256) */ + {MAX_MBPS_HQ, 489600}, /* ((1920x1088)/256)@60fps */ + {MAX_MBPF_B_FRAME, 32640}, /* 3840x2176/256 */ + {MAX_MBPS_B_FRAME, 1958400}, /* 3840x2176/256 MBs@60fps */ + {MAX_MBPS_ALL_INTRA, 2088960}, /* 4096x2176/256 MBs@60fps */ + {MAX_ENH_LAYER_COUNT, 5}, + {NUM_VPP_PIPE, 4}, + {SW_PC, 1}, + {FW_UNLOAD, 0}, + {HW_RESPONSE_TIMEOUT, HW_RESPONSE_TIMEOUT_VALUE}, /* 1000 ms */ + {SW_PC_DELAY, SW_PC_DELAY_VALUE }, /* 1500 ms (>HW_RESPONSE_TIMEOUT)*/ + {FW_UNLOAD_DELAY, FW_UNLOAD_DELAY_VALUE }, /* 3000 ms (>SW_PC_DELAY)*/ + {PAGEFAULT_NON_FATAL, 1}, + {PAGETABLE_CACHING, 0}, + {DCVS, 1}, + {DECODE_BATCH, 1}, + {DECODE_BATCH_TIMEOUT, 200}, + {STATS_TIMEOUT_MS, 2000}, + {AV_SYNC_WINDOW_SIZE, 40}, + {NON_FATAL_FAULTS, 1}, + {ENC_AUTO_FRAMERATE, 1}, + {MMRM, 1}, +}; + +static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { + /* {cap, domain, codec, + * min, max, step_or_mask, value, + * v4l2_id, + * hfi_id, + * flags} + */ + + {FRAME_WIDTH, DEC, CODECS_ALL, 96, 8192, 1, 1920}, + + {FRAME_WIDTH, DEC, VP9, 96, 4096, 1, 1920}, + + {FRAME_WIDTH, ENC, CODECS_ALL, 128, 8192, 1, 1920}, + + {FRAME_WIDTH, ENC, HEVC, 96, 8192, 1, 1920}, + + {FRAME_WIDTH, ENC, HEIC, 128, 16384, 1, 16384}, + + {LOSSLESS_FRAME_WIDTH, ENC, CODECS_ALL, 128, 4096, 1, 1920}, + + {LOSSLESS_FRAME_WIDTH, ENC, HEVC, 96, 4096, 1, 1920}, + + {SECURE_FRAME_WIDTH, DEC, CODECS_ALL, 96, 4096, 1, 1920}, + + {SECURE_FRAME_WIDTH, ENC, CODECS_ALL, 128, 4096, 1, 1920}, + + {SECURE_FRAME_WIDTH, ENC, HEVC, 96, 4096, 1, 1920}, + + {FRAME_HEIGHT, DEC, CODECS_ALL, 96, 8192, 1, 1080}, + + {FRAME_HEIGHT, DEC, VP9, 96, 4096, 1, 1080}, + + {FRAME_HEIGHT, ENC, CODECS_ALL, 128, 8192, 1, 1080}, + + {FRAME_HEIGHT, ENC, HEVC, 96, 8192, 1, 1080}, + + {FRAME_HEIGHT, ENC, HEIC, 128, 16384, 1, 16384}, + + {LOSSLESS_FRAME_HEIGHT, ENC, CODECS_ALL, 128, 4096, 1, 1080}, + + {LOSSLESS_FRAME_HEIGHT, ENC, HEVC, 96, 4096, 1, 1080}, + + {SECURE_FRAME_HEIGHT, DEC, CODECS_ALL, 96, 4096, 1, 1080}, + + {SECURE_FRAME_HEIGHT, ENC, CODECS_ALL, 128, 4096, 1, 1080}, + + {SECURE_FRAME_HEIGHT, ENC, HEVC, 96, 4096, 1, 1080}, + + {PIX_FMTS, ENC|DEC, H264, + MSM_VIDC_FMT_NV12, + MSM_VIDC_FMT_NV12C, + MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C, + MSM_VIDC_FMT_NV12C}, + + {PIX_FMTS, ENC|DEC, HEVC|VP9|AV1, + MSM_VIDC_FMT_NV12, + MSM_VIDC_FMT_TP10C, + MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C | + MSM_VIDC_FMT_P010 | MSM_VIDC_FMT_TP10C, + MSM_VIDC_FMT_NV12C}, + + {PIX_FMTS, ENC, HEIC, + MSM_VIDC_FMT_NV12, + MSM_VIDC_FMT_P010, + MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_P010, + MSM_VIDC_FMT_NV12}, + + {PIX_FMTS, DEC, HEIC, + MSM_VIDC_FMT_NV12, + MSM_VIDC_FMT_TP10C, + MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C | + MSM_VIDC_FMT_P010 | MSM_VIDC_FMT_TP10C, + MSM_VIDC_FMT_NV12C}, + + {MIN_BUFFERS_INPUT, ENC|DEC, CODECS_ALL, 0, 64, 1, 4, + V4L2_CID_MIN_BUFFERS_FOR_OUTPUT, + 0, + CAP_FLAG_VOLATILE}, + + {MIN_BUFFERS_INPUT, ENC|DEC, HEIC, 0, 64, 1, 1, + V4L2_CID_MIN_BUFFERS_FOR_OUTPUT, + 0, + CAP_FLAG_VOLATILE}, + + {MIN_BUFFERS_OUTPUT, ENC|DEC, CODECS_ALL, + 0, 64, 1, 4, + V4L2_CID_MIN_BUFFERS_FOR_CAPTURE, + HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_VOLATILE}, + + /* (8192 * 4320) / 256 */ + {MBPF, ENC, CODECS_ALL, 64, 138240, 1, 138240}, + + {MBPF, ENC, HEVC, 36, 138240, 1, 138240}, + + /* ((16384x16384)/256) */ + {MBPF, ENC, HEIC, 36, 1048576, 1, 1048576}, + + {MBPF, DEC, CODECS_ALL, 36, 138240, 1, 138240}, + + /* (4096 * 2304) / 256 */ + {MBPF, DEC, VP9, 36, 36864, 1, 36864}, + + /* ((8192x8192)/256) */ + {MBPF, DEC, HEIC, 64, 262144, 1, 262144 }, + + /* (4096 * 2304) / 256 */ + {LOSSLESS_MBPF, ENC, H264|HEVC, 64, 36864, 1, 36864}, + + /* Batch Mode Decode */ + /* TODO: update with new values based on updated voltage corner */ + {BATCH_MBPF, DEC, H264|HEVC|VP9|AV1, 64, 34816, 1, 34816}, + + /* (4096 * 2304) / 256 */ + {BATCH_FPS, DEC, H264|HEVC|VP9|AV1, 1, 120, 1, 120}, + + {SECURE_MBPF, ENC|DEC, H264|HEVC|VP9|AV1, 64, 36864, 1, 36864}, + + {SECURE_MBPF, ENC, HEVC, 36, 36864, 1, 36864}, + + /* ((1920 * 1088) / 256) * 480 fps */ + {MBPS, ENC, CODECS_ALL, 64, 3916800, 1, 3916800}, + + {MBPS, ENC, HEVC, 36, 3916800, 1, 3916800}, + + /* ((16384x16384)/256)@1fps */ + {MBPS, ENC, HEIC, 36, 1048576, 1, 1048576}, + + /* ((1920 * 1088) / 256) * 960 fps */ + {MBPS, DEC, CODECS_ALL, 64, 7833600, 1, 7833600}, + + /* ((4096 * 2304) / 256) * 120 */ + {MBPS, DEC, VP9, 36, 4423680, 1, 4423680}, + + /* ((8192x8192)/256)@1fps */ + {MBPS, DEC, HEIC, 64, 262144, 1, 262144 }, + + /* ((4096 * 2304) / 256) * 60 fps */ + {POWER_SAVE_MBPS, ENC, CODECS_ALL, 0, 2211840, 1, 2211840}, + + /* Enable check mbps for encoder */ + {CHECK_MBPS, ENC, CODECS_ALL, 0, 1, 1, 1}, + + /* Disable check mbps for encoder */ + {CHECK_MBPS, DEC, CODECS_ALL, 0, 1, 1, 0}, + + {FRAME_RATE, ENC, CODECS_ALL, + (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), + 1, (DEFAULT_FPS << 16), + 0, + HFI_PROP_FRAME_RATE, + CAP_FLAG_OUTPUT_PORT}, + + {FRAME_RATE, ENC, HEIC, + (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), + 1, (MINIMUM_FPS << 16), + 0, + HFI_PROP_FRAME_RATE, + CAP_FLAG_OUTPUT_PORT}, + + {FRAME_RATE, DEC, CODECS_ALL, + (MINIMUM_FPS << 16), (MAXIMUM_DEC_FPS << 16), + 1, (DEFAULT_FPS << 16), + V4L2_CID_MPEG_VIDC_FRAME_RATE, + 0, + CAP_FLAG_OUTPUT_PORT | + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {FRAME_RATE, DEC, VP9, + (MINIMUM_FPS << 16), (MAXIMUM_OVERRIDE_VP9_FPS << 16), + 1, (DEFAULT_FPS << 16), + V4L2_CID_MPEG_VIDC_FRAME_RATE, + 0, + CAP_FLAG_OUTPUT_PORT | + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {OPERATING_RATE, ENC, CODECS_ALL, + (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), + 1, (DEFAULT_FPS << 16)}, + + {OPERATING_RATE, DEC, CODECS_ALL, + (MINIMUM_FPS << 16), (MAXIMUM_DEC_FPS << 16), + 1, (DEFAULT_FPS << 16), + V4L2_CID_MPEG_VIDC_OPERATING_RATE, + 0, + CAP_FLAG_OUTPUT_PORT | + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {OPERATING_RATE, DEC, VP9, + (MINIMUM_FPS << 16), (MAXIMUM_OVERRIDE_VP9_FPS << 16), + 1, (DEFAULT_FPS << 16), + V4L2_CID_MPEG_VIDC_OPERATING_RATE, + 0, + CAP_FLAG_OUTPUT_PORT | + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {INPUT_RATE, ENC|DEC, CODECS_ALL, + (MINIMUM_FPS << 16), INT_MAX, + 1, (DEFAULT_FPS << 16)}, + + {TIMESTAMP_RATE, ENC|DEC, CODECS_ALL, + (MINIMUM_FPS << 16), INT_MAX, + 1, (DEFAULT_FPS << 16)}, + + {SCALE_FACTOR, ENC, H264|HEVC, 1, 8, 1, 8}, + + {MB_CYCLES_VSP, ENC, CODECS_ALL, 25, 25, 1, 25}, + + {MB_CYCLES_VSP, DEC, CODECS_ALL, 25, 25, 1, 25}, + + {MB_CYCLES_VSP, DEC, VP9|AV1, 60, 60, 1, 60}, + + {MB_CYCLES_VPP, ENC, CODECS_ALL, 675, 675, 1, 675}, + + {MB_CYCLES_VPP, DEC, CODECS_ALL, 200, 200, 1, 200}, + + {MB_CYCLES_LP, ENC, CODECS_ALL, 320, 320, 1, 320}, + + {MB_CYCLES_LP, DEC, CODECS_ALL, 200, 200, 1, 200}, + + {MB_CYCLES_FW, ENC|DEC, CODECS_ALL, 489583, 489583, 1, 489583}, + + {MB_CYCLES_FW_VPP, ENC, CODECS_ALL, 48405, 48405, 1, 48405}, + + {MB_CYCLES_FW_VPP, DEC, CODECS_ALL, 66234, 66234, 1, 66234}, + + {CLIENT_ID, ENC|DEC, CODECS_ALL, + INVALID_CLIENT_ID, INT_MAX, 1, INVALID_CLIENT_ID, + V4L2_CID_MPEG_VIDC_CLIENT_ID}, + + {SECURE_MODE, ENC|DEC, H264|HEVC|VP9|AV1, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_SECURE, + HFI_PROP_SECURE, + CAP_FLAG_NONE}, + + /* + * Client will enable V4L2_CID_MPEG_VIDC_METADATA_OUTBUF_FENCE + * to get fence_id in input metadata buffer done. + */ + {META_OUTBUF_FENCE, DEC, H264|HEVC|VP9|AV1, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_INPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_OUTBUF_FENCE, + HFI_PROP_FENCE, + CAP_FLAG_BITMASK}, + + /* + * Client to do set_ctrl with FENCE_ID to set fence_id + * and then client will do get_ctrl with FENCE_FD to get + * fence_fd corresponding to client set fence_id. + */ + {FENCE_ID, DEC, CODECS_ALL, + 0, INT_MAX, 1, 0, + V4L2_CID_MPEG_VIDC_SW_FENCE_ID, + 0, + CAP_FLAG_DYNAMIC_ALLOWED | CAP_FLAG_OUTPUT_PORT}, + + {FENCE_FD, DEC, CODECS_ALL, + INVALID_FD, INT_MAX, 1, INVALID_FD, + V4L2_CID_MPEG_VIDC_SW_FENCE_FD, + 0, + CAP_FLAG_VOLATILE}, + + {TS_REORDER, DEC, H264|HEVC, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_TS_REORDER}, + + {HFLIP, ENC, CODECS_ALL, + 0, 1, 1, 0, + V4L2_CID_HFLIP, + HFI_PROP_FLIP, + CAP_FLAG_OUTPUT_PORT | + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {VFLIP, ENC, CODECS_ALL, + 0, 1, 1, 0, + V4L2_CID_VFLIP, + HFI_PROP_FLIP, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {ROTATION, ENC, CODECS_ALL, + 0, 270, 90, 0, + V4L2_CID_ROTATE, + HFI_PROP_ROTATION, + CAP_FLAG_OUTPUT_PORT}, + + {SUPER_FRAME, ENC, H264|HEVC, + 0, 32, 1, 0, + V4L2_CID_MPEG_VIDC_SUPERFRAME, 0, + CAP_FLAG_NONE}, + + {SLICE_DECODE, DEC, H264|HEVC|AV1, + V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_MSM_VIDC_DISABLE, + 0, + V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDEO_DECODER_SLICE_INTERFACE, + 0}, + + {HEADER_MODE, ENC, CODECS_ALL, + V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE, + V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME, + BIT(V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE) | + BIT(V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME), + V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE, + V4L2_CID_MPEG_VIDEO_HEADER_MODE, + HFI_PROP_SEQ_HEADER_MODE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {PREPEND_SPSPPS_TO_IDR, ENC, CODECS_ALL, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDEO_PREPEND_SPSPPS_TO_IDR}, + + {VUI_TIMING_INFO, ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_VUI_TIMING_INFO, + HFI_PROP_DISABLE_VUI_TIMING_INFO, + CAP_FLAG_OUTPUT_PORT}, + + {WITHOUT_STARTCODE, ENC, CODECS_ALL, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE, + HFI_PROP_NAL_LENGTH_FIELD, + CAP_FLAG_OUTPUT_PORT}, + + {WITHOUT_STARTCODE, DEC, AV1, + 0, 0, 1, 0, + V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE, + HFI_PROP_NAL_LENGTH_FIELD, + CAP_FLAG_INPUT_PORT}, + + {NAL_LENGTH_FIELD, ENC, CODECS_ALL, + V4L2_MPEG_VIDEO_HEVC_SIZE_0, + V4L2_MPEG_VIDEO_HEVC_SIZE_4, + BIT(V4L2_MPEG_VIDEO_HEVC_SIZE_0) | + BIT(V4L2_MPEG_VIDEO_HEVC_SIZE_4), + V4L2_MPEG_VIDEO_HEVC_SIZE_0, + V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD, + HFI_PROP_NAL_LENGTH_FIELD, + CAP_FLAG_MENU | CAP_FLAG_OUTPUT_PORT}, + + /* TODO: Firmware introduced enumeration type for this + * with and without seq header. + */ + {REQUEST_I_FRAME, ENC, H264|HEVC, + 0, 0, 0, 0, + V4L2_CID_MPEG_VIDEO_FORCE_KEY_FRAME, + HFI_PROP_REQUEST_SYNC_FRAME, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + /* Enc: Keeping CABAC and CAVLC as same bitrate. + * Dec: there's no use of Bitrate cap + */ + {BIT_RATE, ENC, H264|HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_BITRATE, + HFI_PROP_TOTAL_BITRATE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {BITRATE_MODE, ENC, H264, + V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, + V4L2_MPEG_VIDEO_BITRATE_MODE_CBR, + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_VBR) | + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CBR), + V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, + V4L2_CID_MPEG_VIDEO_BITRATE_MODE, + HFI_PROP_RATE_CONTROL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {BITRATE_MODE, ENC, HEVC, + V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, + V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_VBR) | + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CBR) | + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CQ), + V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, + V4L2_CID_MPEG_VIDEO_BITRATE_MODE, + HFI_PROP_RATE_CONTROL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {BITRATE_MODE, ENC, HEIC, + V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, + V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CQ), + V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, + V4L2_CID_MPEG_VIDEO_BITRATE_MODE, + HFI_PROP_RATE_CONTROL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {CABAC_MAX_BITRATE, ENC, H264|HEVC, 0, + 160000000, 1, 160000000}, + + {CAVLC_MAX_BITRATE, ENC, H264, 0, + 220000000, 1, 220000000}, + + {ALLINTRA_MAX_BITRATE, ENC, H264|HEVC, 0, + 245000000, 1, 245000000}, + + {LOWLATENCY_MAX_BITRATE, ENC, H264|HEVC, 0, + 70000000, 1, 70000000}, + + {NUM_COMV, DEC, CODECS_ALL, + 0, INT_MAX, 1, 0}, + + {LOSSLESS, ENC, HEVC, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU}, + + {FRAME_SKIP_MODE, ENC, H264|HEVC|HEIC, + V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED, + V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT, + BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED) | + BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_LEVEL_LIMIT) | + BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT), + V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED, + V4L2_CID_MPEG_VIDEO_FRAME_SKIP_MODE, + 0, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {FRAME_RC_ENABLE, ENC, H264|HEVC|HEIC, + 0, 1, 1, 1, + V4L2_CID_MPEG_VIDEO_FRAME_RC_ENABLE}, + + {CONSTANT_QUALITY, ENC, HEVC, + 1, MAX_CONSTANT_QUALITY, 1, 90, + V4L2_CID_MPEG_VIDEO_CONSTANT_QUALITY, + HFI_PROP_CONSTANT_QUALITY, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {CONSTANT_QUALITY, ENC, HEIC, + 1, MAX_CONSTANT_QUALITY, 1, 100, + V4L2_CID_MPEG_VIDEO_CONSTANT_QUALITY, + HFI_PROP_CONSTANT_QUALITY, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {GOP_SIZE, ENC, CODECS_ALL, + 0, INT_MAX, 1, 2 * DEFAULT_FPS - 1, + V4L2_CID_MPEG_VIDEO_GOP_SIZE, + HFI_PROP_MAX_GOP_FRAMES, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {GOP_SIZE, ENC, HEIC, + 0, INT_MAX, 1, 0 /* all intra */, + V4L2_CID_MPEG_VIDEO_GOP_SIZE, + HFI_PROP_MAX_GOP_FRAMES, + CAP_FLAG_OUTPUT_PORT | + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {GOP_CLOSURE, ENC, H264|HEVC, + 0, 1, 1, 1, + V4L2_CID_MPEG_VIDEO_GOP_CLOSURE, + 0}, + + {B_FRAME, ENC, H264|HEVC, + 0, 7, 1, 0, + V4L2_CID_MPEG_VIDEO_B_FRAMES, + HFI_PROP_MAX_B_FRAMES, + CAP_FLAG_OUTPUT_PORT}, + + {B_FRAME, ENC, HEIC, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDEO_B_FRAMES, + HFI_PROP_MAX_B_FRAMES, + CAP_FLAG_OUTPUT_PORT}, + + {BLUR_TYPES, ENC, H264|HEVC, + MSM_VIDC_BLUR_NONE, MSM_VIDC_BLUR_EXTERNAL, + BIT(MSM_VIDC_BLUR_NONE) | BIT(MSM_VIDC_BLUR_EXTERNAL), + MSM_VIDC_BLUR_NONE, + V4L2_CID_MPEG_VIDC_VIDEO_BLUR_TYPES, + HFI_PROP_BLUR_TYPES, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {BLUR_RESOLUTION, ENC, H264|HEVC, + 0, S32_MAX, 1, 0, + V4L2_CID_MPEG_VIDC_VIDEO_BLUR_RESOLUTION, + HFI_PROP_BLUR_RESOLUTION, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {CSC, ENC, CODECS_ALL, + 0, 1, 1, 0, + 0, + HFI_PROP_CSC}, + + {CSC_CUSTOM_MATRIX, ENC, CODECS_ALL, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_VIDEO_VPE_CSC_CUSTOM_MATRIX, + HFI_PROP_CSC_MATRIX, + CAP_FLAG_OUTPUT_PORT}, + + {LOWLATENCY_MODE, ENC, H264|HEVC, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_LOWLATENCY_REQUEST, + 0, + CAP_FLAG_NONE}, + + {LOWLATENCY_MODE, DEC, H264|HEVC|VP9|AV1, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_LOWLATENCY_REQUEST, + HFI_PROP_SEQ_CHANGE_AT_SYNC_FRAME, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {LTR_COUNT, ENC, H264|HEVC, + 0, 2, 1, 0, + V4L2_CID_MPEG_VIDEO_LTR_COUNT, + HFI_PROP_LTR_COUNT, + CAP_FLAG_OUTPUT_PORT}, + + {USE_LTR, ENC, H264|HEVC, + 0, + ((1 << MAX_LTR_FRAME_COUNT) - 1), + 0, 0, + V4L2_CID_MPEG_VIDEO_USE_LTR_FRAMES, + HFI_PROP_LTR_USE, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {MARK_LTR, ENC, H264|HEVC, + INVALID_DEFAULT_MARK_OR_USE_LTR, + (MAX_LTR_FRAME_COUNT - 1), + 1, INVALID_DEFAULT_MARK_OR_USE_LTR, + V4L2_CID_MPEG_VIDEO_FRAME_LTR_INDEX, + HFI_PROP_LTR_MARK, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {BASELAYER_PRIORITY, ENC, H264, + 0, MAX_BASE_LAYER_PRIORITY_ID, 1, 0, + V4L2_CID_MPEG_VIDEO_BASELAYER_PRIORITY_ID, + HFI_PROP_BASELAYER_PRIORITYID, + CAP_FLAG_OUTPUT_PORT}, + + {IR_TYPE, ENC, H264|HEVC, + V4L2_MPEG_VIDEO_VIDC_INTRA_REFRESH_RANDOM, + V4L2_MPEG_VIDEO_VIDC_INTRA_REFRESH_CYCLIC, + BIT(V4L2_MPEG_VIDEO_VIDC_INTRA_REFRESH_RANDOM) | + BIT(V4L2_MPEG_VIDEO_VIDC_INTRA_REFRESH_CYCLIC), + V4L2_MPEG_VIDEO_VIDC_INTRA_REFRESH_RANDOM, + V4L2_CID_MPEG_VIDEO_VIDC_INTRA_REFRESH_TYPE, + 0, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {IR_PERIOD, ENC, H264|HEVC, + 0, INT_MAX, 1, 0, + V4L2_CID_MPEG_VIDC_INTRA_REFRESH_PERIOD, + 0, + CAP_FLAG_INPUT_PORT | CAP_FLAG_OUTPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {AU_DELIMITER, ENC, H264|HEVC, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDEO_AU_DELIMITER, + HFI_PROP_AUD, + CAP_FLAG_OUTPUT_PORT}, + + {TIME_DELTA_BASED_RC, ENC, H264|HEVC, + 0, 1, 1, 1, + V4L2_CID_MPEG_VIDC_TIME_DELTA_BASED_RC, + HFI_PROP_TIME_DELTA_BASED_RATE_CONTROL, + CAP_FLAG_OUTPUT_PORT}, + + {TIME_DELTA_BASED_RC, ENC, HEIC, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_TIME_DELTA_BASED_RC, + HFI_PROP_TIME_DELTA_BASED_RATE_CONTROL, + CAP_FLAG_OUTPUT_PORT}, + + {CONTENT_ADAPTIVE_CODING, ENC, H264|HEVC, + 0, 1, 1, 1, + V4L2_CID_MPEG_VIDC_CONTENT_ADAPTIVE_CODING, + HFI_PROP_CONTENT_ADAPTIVE_CODING, + CAP_FLAG_OUTPUT_PORT}, + + {REQUEST_PREPROCESS, ENC, H264|HEVC, + MSM_VIDC_PREPROCESS_NONE, + MSM_VIDC_PREPROCESS_TYPE0, + BIT(MSM_VIDC_PREPROCESS_NONE) | + BIT(MSM_VIDC_PREPROCESS_TYPE0), + MSM_VIDC_PREPROCESS_NONE, + 0, HFI_PROP_REQUEST_PREPROCESS, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {BITRATE_BOOST, ENC, H264|HEVC, + 0, MAX_BITRATE_BOOST, 25, MAX_BITRATE_BOOST, + V4L2_CID_MPEG_VIDC_QUALITY_BITRATE_BOOST, + HFI_PROP_BITRATE_BOOST, + CAP_FLAG_OUTPUT_PORT}, + + {MIN_QUALITY, ENC, H264|HEVC, + 0, MAX_SUPPORTED_MIN_QUALITY, 70, MAX_SUPPORTED_MIN_QUALITY, + 0, + HFI_PROP_MAINTAIN_MIN_QUALITY, + CAP_FLAG_OUTPUT_PORT}, + + {VBV_DELAY, ENC, H264|HEVC, + 200, 300, 100, 300, + V4L2_CID_MPEG_VIDEO_VBV_DELAY, + HFI_PROP_VBV_DELAY, + CAP_FLAG_OUTPUT_PORT}, + + {PEAK_BITRATE, ENC, H264|HEVC, + /* default peak bitrate is 10% larger than avg bitrate */ + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_BITRATE_PEAK, + HFI_PROP_TOTAL_PEAK_BITRATE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {MIN_FRAME_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, + V4L2_CID_MPEG_VIDEO_H264_MIN_QP, + HFI_PROP_MIN_QP_PACKED, + CAP_FLAG_OUTPUT_PORT}, + + {MIN_FRAME_QP, ENC, HEVC|HEIC, + MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, + V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP, + HFI_PROP_MIN_QP_PACKED, + CAP_FLAG_OUTPUT_PORT}, + + {I_FRAME_MIN_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, + V4L2_CID_MPEG_VIDEO_H264_I_FRAME_MIN_QP}, + + {I_FRAME_MIN_QP, ENC, HEVC|HEIC, + MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, + V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_MIN_QP}, + + {P_FRAME_MIN_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, + V4L2_CID_MPEG_VIDEO_H264_P_FRAME_MIN_QP}, + + {P_FRAME_MIN_QP, ENC, HEVC|HEIC, + MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, + V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_MIN_QP}, + + {B_FRAME_MIN_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, + V4L2_CID_MPEG_VIDEO_H264_B_FRAME_MIN_QP}, + + {B_FRAME_MIN_QP, ENC, HEVC|HEIC, + MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, + V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_MIN_QP}, + + {MAX_FRAME_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_H264_MAX_QP, + HFI_PROP_MAX_QP_PACKED, + CAP_FLAG_OUTPUT_PORT}, + + {MAX_FRAME_QP, ENC, HEVC|HEIC, + MIN_QP_10BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP, + HFI_PROP_MAX_QP_PACKED, + CAP_FLAG_OUTPUT_PORT}, + + {I_FRAME_MAX_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_H264_I_FRAME_MAX_QP}, + + {I_FRAME_MAX_QP, ENC, HEVC|HEIC, + MIN_QP_10BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_MAX_QP}, + + {P_FRAME_MAX_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_H264_P_FRAME_MAX_QP}, + + {P_FRAME_MAX_QP, ENC, HEVC|HEIC, + MIN_QP_10BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_MAX_QP}, + + {B_FRAME_MAX_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_H264_B_FRAME_MAX_QP}, + + {B_FRAME_MAX_QP, ENC, HEVC|HEIC, + MIN_QP_10BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_MAX_QP}, + + {I_FRAME_QP, ENC, HEVC, + MIN_QP_10BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {I_FRAME_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {P_FRAME_QP, ENC, HEVC, + MIN_QP_10BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {P_FRAME_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {B_FRAME_QP, ENC, HEVC, + MIN_QP_10BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {B_FRAME_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_H264_B_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {LAYER_TYPE, ENC, HEVC, + V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B, + V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P, + BIT(V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B) | + BIT(V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P), + V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE, + HFI_PROP_LAYER_ENCODING_TYPE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LAYER_TYPE, ENC, H264, + V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_B, + V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P, + BIT(V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_B) | + BIT(V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P), + V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P, + V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_TYPE, + HFI_PROP_LAYER_ENCODING_TYPE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LAYER_ENABLE, ENC, H264, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING, + HFI_PROP_LAYER_ENCODING_TYPE, + CAP_FLAG_OUTPUT_PORT}, + + {LAYER_ENABLE, ENC, HEVC, + 0, 1, 1, 0, + 0, + 0, + CAP_FLAG_OUTPUT_PORT}, + + {ENH_LAYER_COUNT, ENC, HEVC, + 0, 5, 1, 0, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER, + HFI_PROP_LAYER_COUNT, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {ENH_LAYER_COUNT, ENC, H264, + 0, 5, 1, 0, + V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_LAYER, + HFI_PROP_LAYER_COUNT, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {ENH_LAYER_COUNT, DEC, AV1, + 0, MAX_OP_POINT, 1, 0, + 0, + HFI_PROP_AV1_OP_POINT, + CAP_FLAG_INPUT_PORT}, + + {L0_BR, ENC, H264, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L0_BR, + HFI_PROP_BITRATE_LAYER1, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L0_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L0_BR, + HFI_PROP_BITRATE_LAYER1, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L1_BR, ENC, H264, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L1_BR, + HFI_PROP_BITRATE_LAYER2, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L1_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L1_BR, + HFI_PROP_BITRATE_LAYER2, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L2_BR, ENC, H264, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L2_BR, + HFI_PROP_BITRATE_LAYER3, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L2_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L2_BR, + HFI_PROP_BITRATE_LAYER3, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L3_BR, ENC, H264, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L3_BR, + HFI_PROP_BITRATE_LAYER4, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + {L3_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L3_BR, + HFI_PROP_BITRATE_LAYER4, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L4_BR, ENC, H264, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L4_BR, + HFI_PROP_BITRATE_LAYER5, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L4_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L4_BR, + HFI_PROP_BITRATE_LAYER5, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L5_BR, ENC, H264, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L5_BR, + HFI_PROP_BITRATE_LAYER6, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L5_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L5_BR, + HFI_PROP_BITRATE_LAYER6, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {ENTROPY_MODE, ENC, H264, + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC, + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, + BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC) | + BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC), + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, + V4L2_CID_MPEG_VIDEO_H264_ENTROPY_MODE, + HFI_PROP_CABAC_SESSION, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {ENTROPY_MODE, DEC, H264|HEVC|VP9|AV1, + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC, + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, + BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC) | + BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC), + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, + 0, + HFI_PROP_CABAC_SESSION}, + + {PROFILE, ENC|DEC, H264, + V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE, + V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH, + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_BASELINE) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_MAIN) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_HIGH), + V4L2_MPEG_VIDEO_H264_PROFILE_HIGH, + V4L2_CID_MPEG_VIDEO_H264_PROFILE, + HFI_PROP_PROFILE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {PROFILE, ENC|DEC, HEVC|HEIC, + V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN, + V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE, + BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN) | + BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE) | + BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10) | + BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE), + V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN, + V4L2_CID_MPEG_VIDEO_HEVC_PROFILE, + HFI_PROP_PROFILE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {PROFILE, DEC, VP9, + V4L2_MPEG_VIDEO_VP9_PROFILE_0, + V4L2_MPEG_VIDEO_VP9_PROFILE_2, + BIT(V4L2_MPEG_VIDEO_VP9_PROFILE_0) | + BIT(V4L2_MPEG_VIDEO_VP9_PROFILE_2), + V4L2_MPEG_VIDEO_VP9_PROFILE_0, + V4L2_CID_MPEG_VIDEO_VP9_PROFILE, + HFI_PROP_PROFILE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {PROFILE, DEC, AV1, + V4L2_MPEG_VIDEO_AV1_PROFILE_MAIN, + V4L2_MPEG_VIDEO_AV1_PROFILE_MAIN, + BIT(V4L2_MPEG_VIDEO_AV1_PROFILE_MAIN), + V4L2_MPEG_VIDEO_AV1_PROFILE_MAIN, + V4L2_CID_MPEG_VIDEO_AV1_PROFILE, + HFI_PROP_PROFILE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LEVEL, ENC, H264, + V4L2_MPEG_VIDEO_H264_LEVEL_1_0, + V4L2_MPEG_VIDEO_H264_LEVEL_6_0, + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1B) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_3) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_0), + V4L2_MPEG_VIDEO_H264_LEVEL_5_0, + V4L2_CID_MPEG_VIDEO_H264_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LEVEL, ENC, HEVC|HEIC, + V4L2_MPEG_VIDEO_HEVC_LEVEL_1, + V4L2_MPEG_VIDEO_HEVC_LEVEL_6, + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6), + V4L2_MPEG_VIDEO_HEVC_LEVEL_5, + V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LEVEL, DEC, H264, + V4L2_MPEG_VIDEO_H264_LEVEL_1_0, + V4L2_MPEG_VIDEO_H264_LEVEL_6_2, + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1B) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_3) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_2), + V4L2_MPEG_VIDEO_H264_LEVEL_6_1, + V4L2_CID_MPEG_VIDEO_H264_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LEVEL, DEC, HEVC|HEIC, + V4L2_MPEG_VIDEO_HEVC_LEVEL_1, + V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2, + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1)| + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2), + V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1, + V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LEVEL, DEC, VP9, + V4L2_MPEG_VIDEO_VP9_LEVEL_1_0, + V4L2_MPEG_VIDEO_VP9_LEVEL_6_0, + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_1_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_1_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_2_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_3_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_4_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_2) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_6_0), + V4L2_MPEG_VIDEO_VP9_LEVEL_6_0, + V4L2_CID_MPEG_VIDEO_VP9_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LEVEL, DEC, AV1, + V4L2_MPEG_VIDEO_AV1_LEVEL_2_0, + V4L2_MPEG_VIDEO_AV1_LEVEL_6_1, + BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_2_0) | + BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_2_2) | + BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_2_3) | + BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_3_0) | + BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_3_2) | + BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_3_3) | + BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_4_0) | + BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_4_2) | + BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_4_3) | + BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_5_0) | + BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_5_1) | + BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_5_2) | + BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_5_3) | + BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_6_0) | + BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_6_1), + V4L2_MPEG_VIDEO_AV1_LEVEL_6_1, + V4L2_CID_MPEG_VIDEO_AV1_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {AV1_TIER, DEC, AV1, + V4L2_MPEG_VIDEO_AV1_TIER_MAIN, + V4L2_MPEG_VIDEO_AV1_TIER_HIGH, + BIT(V4L2_MPEG_VIDEO_AV1_TIER_MAIN) | + BIT(V4L2_MPEG_VIDEO_AV1_TIER_HIGH), + V4L2_MPEG_VIDEO_AV1_TIER_HIGH, + V4L2_CID_MPEG_VIDEO_AV1_TIER, + HFI_PROP_TIER, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {HEVC_TIER, ENC|DEC, HEVC, + V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, + V4L2_MPEG_VIDEO_HEVC_TIER_HIGH, + BIT(V4L2_MPEG_VIDEO_HEVC_TIER_MAIN) | + BIT(V4L2_MPEG_VIDEO_HEVC_TIER_HIGH), + V4L2_MPEG_VIDEO_HEVC_TIER_HIGH, + V4L2_CID_MPEG_VIDEO_HEVC_TIER, + HFI_PROP_TIER, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {HEVC_TIER, ENC|DEC, HEIC, + V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, + V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, + BIT(V4L2_MPEG_VIDEO_HEVC_TIER_MAIN), + V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, + V4L2_CID_MPEG_VIDEO_HEVC_TIER, + HFI_PROP_TIER, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LF_MODE, ENC, H264, + V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED, + DB_H264_DISABLE_SLICE_BOUNDARY, + BIT(V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED) | + BIT(V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_DISABLED) | + BIT(DB_H264_DISABLE_SLICE_BOUNDARY), + V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED, + V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_MODE, + HFI_PROP_DEBLOCKING_MODE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LF_MODE, ENC, HEVC|HEIC, + V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_DISABLED, + DB_HEVC_DISABLE_SLICE_BOUNDARY, + BIT(V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_DISABLED) | + BIT(V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_ENABLED) | + BIT(DB_HEVC_DISABLE_SLICE_BOUNDARY), + V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_ENABLED, + V4L2_CID_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE, + HFI_PROP_DEBLOCKING_MODE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LF_ALPHA, ENC, H264, + -6, 6, 1, 0, + V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_ALPHA}, + + {LF_ALPHA, ENC, HEVC|HEIC, + -6, 6, 1, 0, + V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2}, + + {LF_BETA, ENC, H264, + -6, 6, 1, 0, + V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_BETA}, + + {LF_BETA, ENC, HEVC|HEIC, + -6, 6, 1, 0, + V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2}, + + {SLICE_MODE, ENC, H264|HEVC, + V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, + V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_BYTES, + BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE) | + BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_MB) | + BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_BYTES), + V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, + V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE, + 0, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {SLICE_MODE, ENC, HEIC, + V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, + V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, + BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE), + V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, + V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE, + 0, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {SLICE_MAX_BYTES, ENC, H264|HEVC, + MIN_SLICE_BYTE_SIZE, MAX_SLICE_BYTE_SIZE, + 1, MIN_SLICE_BYTE_SIZE, + V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES, + HFI_PROP_MULTI_SLICE_BYTES_COUNT, + CAP_FLAG_OUTPUT_PORT}, + + {SLICE_MAX_MB, ENC, H264|HEVC, + 1, MAX_SLICE_MB_SIZE, 1, 1, + V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB, + HFI_PROP_MULTI_SLICE_MB_COUNT, + CAP_FLAG_OUTPUT_PORT}, + + {MB_RC, ENC, H264|HEVC, + 0, 1, 1, 1, + V4L2_CID_MPEG_VIDEO_MB_RC_ENABLE, + 0, + CAP_FLAG_OUTPUT_PORT}, + + {TRANSFORM_8X8, ENC, H264, + 0, 1, 1, 1, + V4L2_CID_MPEG_VIDEO_H264_8X8_TRANSFORM, + HFI_PROP_8X8_TRANSFORM, + CAP_FLAG_OUTPUT_PORT}, + + {CHROMA_QP_INDEX_OFFSET, ENC, HEVC, + MIN_CHROMA_QP_OFFSET, MAX_CHROMA_QP_OFFSET, + 1, MAX_CHROMA_QP_OFFSET, + V4L2_CID_MPEG_VIDEO_H264_CHROMA_QP_INDEX_OFFSET, + HFI_PROP_CHROMA_QP_OFFSET, + CAP_FLAG_OUTPUT_PORT}, + + {DISPLAY_DELAY_ENABLE, DEC, H264|HEVC|VP9|AV1, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY_ENABLE, + HFI_PROP_DECODE_ORDER_OUTPUT, + CAP_FLAG_INPUT_PORT}, + + {DISPLAY_DELAY, DEC, H264|HEVC|VP9|AV1, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY, + HFI_PROP_DECODE_ORDER_OUTPUT, + CAP_FLAG_INPUT_PORT}, + + {OUTPUT_ORDER, DEC, H264|HEVC|VP9|AV1, + 0, 1, 1, 0, + 0, + HFI_PROP_DECODE_ORDER_OUTPUT, + CAP_FLAG_INPUT_PORT}, + + {INPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL, + DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT, + 1, DEFAULT_MAX_HOST_BUF_COUNT, + 0, + HFI_PROP_BUFFER_HOST_MAX_COUNT, + CAP_FLAG_INPUT_PORT}, + + {OUTPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL, + DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT, + 1, DEFAULT_MAX_HOST_BUF_COUNT, + 0, + HFI_PROP_BUFFER_HOST_MAX_COUNT, + CAP_FLAG_OUTPUT_PORT}, + + {CONCEAL_COLOR_8BIT, DEC, CODECS_ALL, 0x0, 0xff3fcff, 1, + DEFAULT_VIDEO_CONCEAL_COLOR_BLACK, + V4L2_CID_MPEG_VIDEO_MUTE_YUV, + HFI_PROP_CONCEAL_COLOR_8BIT, + CAP_FLAG_INPUT_PORT}, + + {CONCEAL_COLOR_10BIT, DEC, CODECS_ALL, 0x0, 0x3fffffff, 1, + DEFAULT_VIDEO_CONCEAL_COLOR_BLACK, + V4L2_CID_MPEG_VIDEO_MUTE_YUV, + HFI_PROP_CONCEAL_COLOR_10BIT, + CAP_FLAG_INPUT_PORT}, + + {STAGE, DEC|ENC, CODECS_ALL, + MSM_VIDC_STAGE_1, + MSM_VIDC_STAGE_2, 1, + MSM_VIDC_STAGE_2, + 0, + HFI_PROP_STAGE}, + + {PIPE, DEC|ENC, CODECS_ALL, + MSM_VIDC_PIPE_1, + MSM_VIDC_PIPE_4, 1, + MSM_VIDC_PIPE_4, + 0, + HFI_PROP_PIPE}, + + {POC, DEC, H264, 0, 2, 1, 1, + 0, + HFI_PROP_PIC_ORDER_CNT_TYPE}, + + {QUALITY_MODE, ENC, CODECS_ALL, + MSM_VIDC_MAX_QUALITY_MODE, + MSM_VIDC_POWER_SAVE_MODE, 1, + MSM_VIDC_POWER_SAVE_MODE}, + + {CODED_FRAMES, DEC, H264|HEVC|HEIC, + CODED_FRAMES_PROGRESSIVE, CODED_FRAMES_INTERLACE, + 1, CODED_FRAMES_PROGRESSIVE, + 0, + HFI_PROP_CODED_FRAMES}, + + {BIT_DEPTH, DEC, CODECS_ALL, BIT_DEPTH_8, BIT_DEPTH_10, 1, BIT_DEPTH_8, + 0, + HFI_PROP_LUMA_CHROMA_BIT_DEPTH}, + + {CODEC_CONFIG, DEC, H264|HEVC|HEIC|AV1, 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_CODEC_CONFIG, 0, + CAP_FLAG_DYNAMIC_ALLOWED}, + + {BITSTREAM_SIZE_OVERWRITE, DEC, CODECS_ALL, 0, INT_MAX, 1, 0, + V4L2_CID_MPEG_VIDC_MIN_BITSTREAM_SIZE_OVERWRITE}, + + {THUMBNAIL_MODE, DEC, CODECS_ALL, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_THUMBNAIL_MODE, + HFI_PROP_THUMBNAIL_MODE, + CAP_FLAG_INPUT_PORT}, + + {DEFAULT_HEADER, DEC, CODECS_ALL, + 0, 1, 1, 0, + 0, + HFI_PROP_DEC_DEFAULT_HEADER}, + + {RAP_FRAME, DEC, CODECS_ALL, + 0, 1, 1, 1, + 0, + HFI_PROP_DEC_START_FROM_RAP_FRAME, + CAP_FLAG_INPUT_PORT}, + + {SEQ_CHANGE_AT_SYNC_FRAME, DEC, CODECS_ALL, + 0, 1, 1, 1, + 0, + HFI_PROP_SEQ_CHANGE_AT_SYNC_FRAME, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {PRIORITY, DEC|ENC, CODECS_ALL, + 0, 1 + NRT_PRIORITY_OFFSET, 1, 1 + NRT_PRIORITY_OFFSET, + V4L2_CID_MPEG_VIDC_PRIORITY, + HFI_PROP_SESSION_PRIORITY, + CAP_FLAG_DYNAMIC_ALLOWED}, + + {FIRMWARE_PRIORITY_OFFSET, DEC | ENC, CODECS_ALL, + 1, 1, 1, 1}, + + {CRITICAL_PRIORITY, ENC, CODECS_ALL, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_CRITICAL_PRIORITY}, + + {RESERVE_DURATION, ENC, CODECS_ALL, + 0, INT_MAX, 1, 0, + V4L2_CID_MPEG_VIDC_RESERVE_DURATION, + HFI_CMD_RESERVE, + CAP_FLAG_DYNAMIC_ALLOWED}, + + {ENC_IP_CR, ENC, CODECS_ALL, + 0, S32_MAX, 1, 0, + V4L2_CID_MPEG_VIDC_ENC_INPUT_COMPRESSION_RATIO, + 0, CAP_FLAG_DYNAMIC_ALLOWED}, + + {DPB_LIST, DEC, CODECS_ALL, + 0, 1, 1, 0, + 0, + HFI_PROP_DPB_LIST, + CAP_FLAG_OUTPUT_PORT}, + + {FILM_GRAIN, DEC, AV1, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_AV1D_FILM_GRAIN_PRESENT, + HFI_PROP_AV1_FILM_GRAIN_PRESENT, + CAP_FLAG_VOLATILE}, + + {SUPER_BLOCK, DEC, AV1, + 0, 1, 1, 0, + 0, + HFI_PROP_AV1_SUPER_BLOCK_ENABLED}, + + {DRAP, DEC, AV1, + 0, S32_MAX, 1, 0, + 0, + HFI_PROP_AV1_DRAP_CONFIG, + CAP_FLAG_INPUT_PORT}, + + {LAST_FLAG_EVENT_ENABLE, DEC, CODECS_ALL, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_LAST_FLAG_EVENT_ENABLE}, + + {META_BITSTREAM_RESOLUTION, DEC, AV1, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_INPUT | + MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_BITSTREAM_RESOLUTION, + HFI_PROP_BITSTREAM_RESOLUTION, + CAP_FLAG_BITMASK}, + + {META_CROP_OFFSETS, DEC, AV1, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_INPUT | + MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_CROP_OFFSETS, + HFI_PROP_CROP_OFFSETS, + CAP_FLAG_BITMASK}, + + {ALL_INTRA, ENC, H264|HEVC, + 0, 1, 1, 0, + 0, + 0, + CAP_FLAG_OUTPUT_PORT}, + + {INPUT_METADATA_FD, ENC|DEC, CODECS_ALL, + INVALID_FD, INT_MAX, 1, INVALID_FD, + V4L2_CID_MPEG_VIDC_INPUT_METADATA_FD, + 0, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {INPUT_META_VIA_REQUEST, ENC|DEC, CODECS_ALL, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_INPUT_METADATA_VIA_REQUEST_ENABLE, + 0, + CAP_FLAG_INPUT_PORT}, + + {META_LTR_MARK_USE, ENC, H264|HEVC, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_LTR_MARK_USE_DETAILS, + HFI_PROP_LTR_MARK_USE_DETAILS, + CAP_FLAG_BITMASK}, + + {META_SEQ_HDR_NAL, ENC, CODECS_ALL, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_SEQ_HEADER_NAL, + HFI_PROP_METADATA_SEQ_HEADER_NAL, + CAP_FLAG_BITMASK}, + + {META_DPB_MISR, DEC, CODECS_ALL, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_DPB_LUMA_CHROMA_MISR, + HFI_PROP_DPB_LUMA_CHROMA_MISR, + CAP_FLAG_BITMASK}, + + {META_OPB_MISR, DEC, CODECS_ALL, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_OPB_LUMA_CHROMA_MISR, + HFI_PROP_OPB_LUMA_CHROMA_MISR, + CAP_FLAG_BITMASK}, + + {META_INTERLACE, DEC, H264, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_INTERLACE, + HFI_PROP_INTERLACE_INFO, + CAP_FLAG_BITMASK}, + + {META_TIMESTAMP, DEC | ENC, CODECS_ALL, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_TIMESTAMP, + HFI_PROP_TIMESTAMP, + CAP_FLAG_BITMASK}, + + {META_CONCEALED_MB_CNT, DEC, CODECS_ALL, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_CONCEALED_MB_COUNT, + HFI_PROP_CONEALED_MB_COUNT, + CAP_FLAG_BITMASK}, + + {META_HIST_INFO, DEC, HEVC|AV1|VP9, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_HISTOGRAM_INFO, + HFI_PROP_HISTOGRAM_INFO, + CAP_FLAG_BITMASK}, + + {META_TRANSCODING_STAT_INFO, DEC, HEVC|H264, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_TRANSCODE_STAT_INFO, + HFI_PROP_TRANSCODING_STAT_INFO, + CAP_FLAG_BITMASK}, + + {META_TRANSCODING_STAT_INFO, ENC, HEVC|H264, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_TX_INPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_TRANSCODE_STAT_INFO, + HFI_PROP_TRANSCODING_STAT_INFO, + CAP_FLAG_BITMASK}, + + {META_PICTURE_TYPE, DEC, CODECS_ALL, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_INPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_PICTURE_TYPE, + HFI_PROP_PICTURE_TYPE, + CAP_FLAG_BITMASK}, + + {META_SEI_MASTERING_DISP, ENC, HEVC|HEIC, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_TX_INPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_SEI_MASTERING_DISPLAY_COLOUR, + HFI_PROP_SEI_MASTERING_DISPLAY_COLOUR, + CAP_FLAG_BITMASK}, + + {META_SEI_MASTERING_DISP, DEC, HEVC|HEIC|AV1, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_INPUT | + MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_SEI_MASTERING_DISPLAY_COLOUR, + HFI_PROP_SEI_MASTERING_DISPLAY_COLOUR, + CAP_FLAG_BITMASK}, + + {META_SEI_CLL, ENC, HEVC|HEIC, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_TX_INPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_SEI_CONTENT_LIGHT_LEVEL, + HFI_PROP_SEI_CONTENT_LIGHT_LEVEL, + CAP_FLAG_BITMASK}, + + {META_SEI_CLL, DEC, HEVC|HEIC|AV1, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_INPUT | + MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_SEI_CONTENT_LIGHT_LEVEL, + HFI_PROP_SEI_CONTENT_LIGHT_LEVEL, + CAP_FLAG_BITMASK}, + + {META_HDR10PLUS, ENC, HEVC|HEIC, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_TX_INPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_HDR10PLUS, + HFI_PROP_SEI_HDR10PLUS_USERDATA, + CAP_FLAG_BITMASK}, + + {META_HDR10PLUS, DEC, HEVC|HEIC|AV1, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_INPUT | + MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_HDR10PLUS, + HFI_PROP_SEI_HDR10PLUS_USERDATA, + CAP_FLAG_BITMASK}, + + {META_DOLBY_RPU, ENC, HEVC, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_TX_INPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_DOLBY_RPU, + HFI_PROP_DOLBY_RPU_METADATA, + CAP_FLAG_BITMASK}, + + {META_DOLBY_RPU, DEC, H264|HEVC, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_DOLBY_RPU, + HFI_PROP_DOLBY_RPU_METADATA, + CAP_FLAG_BITMASK}, + + {META_EVA_STATS, ENC, CODECS_ALL, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_TX_INPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_EVA_STATS, + HFI_PROP_EVA_STAT_INFO, + CAP_FLAG_BITMASK}, + + {META_BUF_TAG, ENC, CODECS_ALL, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_TX_INPUT | + MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_BUFFER_TAG, + HFI_PROP_BUFFER_TAG, + CAP_FLAG_BITMASK}, + + /* + * when fence enabled, client needs output buffer_tag + * in input metadata buffer done. + */ + {META_BUF_TAG, DEC, CODECS_ALL, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_TX_INPUT | + MSM_VIDC_META_TX_OUTPUT | MSM_VIDC_META_RX_INPUT | + MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_BUFFER_TAG, + HFI_PROP_BUFFER_TAG, + CAP_FLAG_BITMASK}, + + {META_DPB_TAG_LIST, DEC, CODECS_ALL, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_DPB_TAG_LIST, + HFI_PROP_DPB_TAG_LIST, + CAP_FLAG_BITMASK}, + + {META_SUBFRAME_OUTPUT, ENC, HEIC | H264 | HEVC, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_SUBFRAME_OUTPUT, + HFI_PROP_SUBFRAME_OUTPUT, + CAP_FLAG_BITMASK}, + + {META_SUBFRAME_OUTPUT, DEC, CODECS_ALL, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_SUBFRAME_OUTPUT, + HFI_PROP_SUBFRAME_OUTPUT, + CAP_FLAG_BITMASK}, + + {META_ENC_QP_METADATA, ENC, CODECS_ALL, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_ENC_QP_METADATA, + HFI_PROP_ENC_QP_METADATA, + CAP_FLAG_BITMASK}, + + {META_ROI_INFO, ENC, H264|HEVC, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_TX_INPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_ROI_INFO, + HFI_PROP_ROI_INFO, + CAP_FLAG_INPUT_PORT | CAP_FLAG_BITMASK}, + + {META_SALIENCY_INFO, ENC, H264|HEVC, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_TX_INPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_SALIENCY_INFO, + HFI_PROP_ROI_AS_SALIENCY_INFO, + CAP_FLAG_INPUT_PORT | CAP_FLAG_BITMASK}, + + {META_DEC_QP_METADATA, DEC, CODECS_ALL, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_DEC_QP_METADATA, + HFI_PROP_DEC_QP_METADATA, + CAP_FLAG_BITMASK}, + + {GRID, ENC, HEIC, + 0, 1, 1, 1, + 0, + HFI_PROP_HEIC_GRID_ENABLE, + CAP_FLAG_OUTPUT_PORT}, + + {COMPLEXITY, ENC, H264|HEVC, + 0, 100, + 1, DEFAULT_COMPLEXITY, + V4L2_CID_MPEG_VIDC_VENC_COMPLEXITY}, + + {META_MAX_NUM_REORDER_FRAMES, DEC, HEVC | H264, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_MAX_NUM_REORDER_FRAMES, + HFI_PROP_MAX_NUM_REORDER_FRAMES, + CAP_FLAG_BITMASK}, + + {DELIVERY_MODE, ENC, HEVC, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE, + HFI_PROP_ENABLE_SLICE_DELIVERY, + CAP_FLAG_OUTPUT_PORT}, + + {DELIVERY_MODE, ENC, H264, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_H264_ENCODE_DELIVERY_MODE, + HFI_PROP_ENABLE_SLICE_DELIVERY, + CAP_FLAG_OUTPUT_PORT}, +}; + +static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pineapple[] = { + /* {cap, domain, codec, + * parents, + * children, + * adjust, set} + */ + + {PIX_FMTS, ENC, H264, + {0}, + {META_ROI_INFO, IR_PERIOD}}, + + {PIX_FMTS, ENC, HEVC, + {0}, + {PROFILE, MIN_FRAME_QP, MAX_FRAME_QP, I_FRAME_QP, P_FRAME_QP, + B_FRAME_QP, META_ROI_INFO, MIN_QUALITY, BLUR_TYPES, IR_PERIOD}}, + + {PIX_FMTS, ENC, HEIC, + {0}, + {PROFILE}}, + + {PIX_FMTS, DEC, HEVC|HEIC, + {0}, + {PROFILE}}, + + {FRAME_RATE, ENC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_q16}, + + {FRAME_RATE, DEC, CODECS_ALL, + {0}, + {0}, + msm_vidc_adjust_dec_frame_rate}, + + {OPERATING_RATE, DEC, CODECS_ALL, + {0}, + {0}, + msm_vidc_adjust_dec_operating_rate}, + + {SECURE_MODE, ENC|DEC, H264|HEVC|VP9|AV1, + {0}, + {0}, + NULL, + msm_vidc_set_u32}, + + {META_OUTBUF_FENCE, DEC, H264|HEVC|VP9|AV1, + {OUTPUT_ORDER}, + {LOWLATENCY_MODE, SLICE_DECODE}, + msm_vidc_adjust_dec_outbuf_fence, + NULL}, + + {HFLIP, ENC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_flip}, + + {VFLIP, ENC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_flip}, + + {ROTATION, ENC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_rotation}, + + {SUPER_FRAME, ENC, H264|HEVC, + {0}, + {INPUT_BUF_HOST_MAX_COUNT, OUTPUT_BUF_HOST_MAX_COUNT}, + NULL, + NULL}, + + {SLICE_DECODE, DEC, H264|HEVC|AV1, + {LOWLATENCY_MODE, META_OUTBUF_FENCE, OUTPUT_ORDER}, + {0}, + NULL, + NULL}, + + {HEADER_MODE, ENC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_header_mode}, + + {WITHOUT_STARTCODE, ENC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_nal_length}, + + {WITHOUT_STARTCODE, DEC, AV1, + {0}, + {0}, + NULL, + msm_vidc_set_u32}, + + {REQUEST_I_FRAME, ENC, H264|HEVC, + {0}, + {0}, + NULL, + msm_vidc_set_req_sync_frame}, + + {BIT_RATE, ENC, H264, + {ENH_LAYER_COUNT, BITRATE_MODE, ENTROPY_MODE, + ALL_INTRA, LOWLATENCY_MODE}, + {PEAK_BITRATE, BITRATE_BOOST}, + msm_vidc_adjust_bitrate, + msm_vidc_set_bitrate}, + + {BIT_RATE, ENC, HEVC, + {ENH_LAYER_COUNT, BITRATE_MODE, ALL_INTRA, LOWLATENCY_MODE}, + {PEAK_BITRATE, BITRATE_BOOST}, + msm_vidc_adjust_bitrate, + msm_vidc_set_bitrate}, + + {BITRATE_MODE, ENC, H264, + {0}, + {LTR_COUNT, IR_PERIOD, TIME_DELTA_BASED_RC, I_FRAME_QP, + P_FRAME_QP, B_FRAME_QP, ENH_LAYER_COUNT, BIT_RATE, + META_ROI_INFO, MIN_QUALITY, BITRATE_BOOST, VBV_DELAY, + PEAK_BITRATE, SLICE_MODE, CONTENT_ADAPTIVE_CODING, + BLUR_TYPES, LOWLATENCY_MODE}, + msm_vidc_adjust_bitrate_mode, + msm_vidc_set_u32_enum}, + + {BITRATE_MODE, ENC, HEVC, + {0}, + {LTR_COUNT, IR_PERIOD, TIME_DELTA_BASED_RC, I_FRAME_QP, + P_FRAME_QP, B_FRAME_QP, CONSTANT_QUALITY, ENH_LAYER_COUNT, + BIT_RATE, META_ROI_INFO, MIN_QUALITY, BITRATE_BOOST, VBV_DELAY, + PEAK_BITRATE, SLICE_MODE, CONTENT_ADAPTIVE_CODING, + BLUR_TYPES, LOWLATENCY_MODE}, + msm_vidc_adjust_bitrate_mode, + msm_vidc_set_u32_enum}, + + {BITRATE_MODE, ENC, HEIC, + {0}, + {TIME_DELTA_BASED_RC, CONSTANT_QUALITY}, + msm_vidc_adjust_bitrate_mode, + msm_vidc_set_u32_enum}, + + {CONSTANT_QUALITY, ENC, HEVC|HEIC, + {BITRATE_MODE}, + {0}, + NULL, + msm_vidc_set_constant_quality}, + + {GOP_SIZE, ENC, CODECS_ALL, + {ENH_LAYER_COUNT}, + {ALL_INTRA}, + msm_vidc_adjust_gop_size, + msm_vidc_set_gop_size}, + + {GOP_SIZE, ENC, HEIC, + {0}, + {0}, + NULL, + msm_vidc_set_u32}, + + {B_FRAME, ENC, H264|HEVC, + {ENH_LAYER_COUNT}, + {ALL_INTRA}, + msm_vidc_adjust_b_frame, + msm_vidc_set_u32}, + + {B_FRAME, ENC, HEIC, + {0}, + {0}, + NULL, + msm_vidc_set_u32}, + + {BLUR_TYPES, ENC, H264|HEVC, + {PIX_FMTS, BITRATE_MODE, MIN_QUALITY, META_ROI_INFO}, + {BLUR_RESOLUTION}, + msm_vidc_adjust_blur_type, + msm_vidc_set_u32_enum}, + + {BLUR_RESOLUTION, ENC, H264|HEVC, + {BLUR_TYPES}, + {0}, + msm_vidc_adjust_blur_resolution, + msm_vidc_set_blur_resolution}, + + {CSC_CUSTOM_MATRIX, ENC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_csc_custom_matrix}, + + {LOWLATENCY_MODE, ENC, H264 | HEVC, + {BITRATE_MODE, DELIVERY_MODE}, + {STAGE, BIT_RATE}, + msm_vidc_adjust_enc_lowlatency_mode, + NULL}, + + {LOWLATENCY_MODE, DEC, H264|HEVC|VP9|AV1, + {META_OUTBUF_FENCE}, + {STAGE, SLICE_DECODE}, + msm_vidc_adjust_dec_lowlatency_mode, + NULL}, + + {LTR_COUNT, ENC, H264|HEVC, + {BITRATE_MODE, ALL_INTRA}, + {0}, + msm_vidc_adjust_ltr_count, + msm_vidc_set_u32}, + + {USE_LTR, ENC, H264|HEVC, + {0}, + {0}, + msm_vidc_adjust_use_ltr, + msm_vidc_set_use_and_mark_ltr}, + + {MARK_LTR, ENC, H264|HEVC, + {0}, + {0}, + msm_vidc_adjust_mark_ltr, + msm_vidc_set_use_and_mark_ltr}, + + {IR_PERIOD, ENC, H264|HEVC, + {BITRATE_MODE, ALL_INTRA, META_ROI_INFO, PIX_FMTS}, + {0}, + msm_vidc_adjust_ir_period, + msm_vidc_set_ir_period}, + + {AU_DELIMITER, ENC, H264|HEVC, + {0}, + {0}, + NULL, + msm_vidc_set_u32}, + + {TIME_DELTA_BASED_RC, ENC, CODECS_ALL, + {BITRATE_MODE}, + {0}, + msm_vidc_adjust_delta_based_rc, + msm_vidc_set_u32}, + + {CONTENT_ADAPTIVE_CODING, ENC, H264|HEVC, + {BITRATE_MODE, LAYER_ENABLE, LAYER_TYPE}, + {REQUEST_PREPROCESS}, + msm_vidc_adjust_brs, + msm_vidc_set_vbr_related_properties}, + + {REQUEST_PREPROCESS, ENC, H264|HEVC, + {CONTENT_ADAPTIVE_CODING, META_EVA_STATS}, + {0}, + msm_vidc_adjust_preprocess, + msm_vidc_set_preprocess}, + + {BITRATE_BOOST, ENC, H264|HEVC, + {BITRATE_MODE, MIN_QUALITY, BIT_RATE}, + {0}, + msm_vidc_adjust_bitrate_boost_iris33, + msm_vidc_set_vbr_related_properties}, + + {MIN_QUALITY, ENC, H264, + {BITRATE_MODE, ENH_LAYER_COUNT, META_ROI_INFO}, + {BLUR_TYPES}, + msm_vidc_adjust_min_quality, + msm_vidc_set_u32}, + + {MIN_QUALITY, ENC, HEVC, + {BITRATE_MODE, PIX_FMTS, ENH_LAYER_COUNT, + META_ROI_INFO}, + {BLUR_TYPES}, + msm_vidc_adjust_min_quality, + msm_vidc_set_u32}, + + {VBV_DELAY, ENC, H264|HEVC, + {BITRATE_MODE}, + {0}, + NULL, + msm_vidc_set_cbr_related_properties}, + + {PEAK_BITRATE, ENC, H264|HEVC, + {BITRATE_MODE, BIT_RATE}, + {0}, + msm_vidc_adjust_peak_bitrate, + msm_vidc_set_cbr_related_properties}, + + {MIN_FRAME_QP, ENC, H264, + {0}, + {0}, + NULL, + msm_vidc_set_min_qp}, + + {MIN_FRAME_QP, ENC, HEVC|HEIC, + {PIX_FMTS}, + {0}, + msm_vidc_adjust_hevc_min_qp, + msm_vidc_set_min_qp}, + + {MAX_FRAME_QP, ENC, H264, + {0}, + {0}, + NULL, + msm_vidc_set_max_qp}, + + {MAX_FRAME_QP, ENC, HEVC|HEIC, + {PIX_FMTS}, + {0}, + msm_vidc_adjust_hevc_max_qp, + msm_vidc_set_max_qp}, + + {I_FRAME_QP, ENC, HEVC, + {PIX_FMTS, BITRATE_MODE}, + {0}, + msm_vidc_adjust_hevc_i_frame_qp, + msm_vidc_set_frame_qp}, + + {I_FRAME_QP, ENC, H264, + {BITRATE_MODE}, + {0}, + NULL, + msm_vidc_set_frame_qp}, + + {P_FRAME_QP, ENC, HEVC, + {PIX_FMTS, BITRATE_MODE}, + {0}, + msm_vidc_adjust_hevc_p_frame_qp, + msm_vidc_set_frame_qp}, + + {P_FRAME_QP, ENC, H264, + {BITRATE_MODE}, + {0}, + NULL, + msm_vidc_set_frame_qp}, + + {B_FRAME_QP, ENC, HEVC, + {PIX_FMTS, BITRATE_MODE}, + {0}, + msm_vidc_adjust_hevc_b_frame_qp, + msm_vidc_set_frame_qp}, + + {B_FRAME_QP, ENC, H264, + {BITRATE_MODE}, + {0}, + NULL, + msm_vidc_set_frame_qp}, + + {LAYER_TYPE, ENC, H264, + {0}, + {CONTENT_ADAPTIVE_CODING}}, + + {LAYER_ENABLE, ENC, H264|HEVC, + {0}, + {CONTENT_ADAPTIVE_CODING}}, + + {ENH_LAYER_COUNT, ENC, H264|HEVC, + {BITRATE_MODE, META_EVA_STATS}, + {GOP_SIZE, B_FRAME, BIT_RATE, MIN_QUALITY, SLICE_MODE}, + msm_vidc_adjust_layer_count, + msm_vidc_set_layer_count_and_type}, + + {ENH_LAYER_COUNT, DEC, AV1, + {0}, + {0}, + NULL, + msm_vidc_set_u32}, + + {L0_BR, ENC, H264|HEVC, + {0}, + {0}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, + + {L1_BR, ENC, H264|HEVC, + {0}, + {0}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, + + {L2_BR, ENC, H264|HEVC, + {0}, + {0}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, + + {L3_BR, ENC, H264|HEVC, + {0}, + {0}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, + + {L4_BR, ENC, H264|HEVC, + {0}, + {0}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, + + {L5_BR, ENC, H264|HEVC, + {0}, + {0}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, + + {ENTROPY_MODE, ENC, H264, + {PROFILE}, + {BIT_RATE}, + msm_vidc_adjust_entropy_mode, + msm_vidc_set_u32}, + + {PROFILE, ENC, H264, + {0}, + {ENTROPY_MODE, TRANSFORM_8X8}, + NULL, + msm_vidc_set_u32_enum}, + + {PROFILE, DEC, H264, + {0}, + {ENTROPY_MODE}, + NULL, + msm_vidc_set_u32_enum}, + + {PROFILE, ENC|DEC, HEVC|HEIC, + {PIX_FMTS}, + {0}, + msm_vidc_adjust_profile, + msm_vidc_set_u32_enum}, + + {PROFILE, DEC, VP9|AV1, + {0}, + {0}, + NULL, + msm_vidc_set_u32_enum}, + + {LEVEL, DEC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_u32_enum}, + + {LEVEL, ENC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_level}, + + {AV1_TIER, DEC, AV1, + {0}, + {0}, + NULL, + msm_vidc_set_u32_enum}, + + {HEVC_TIER, ENC|DEC, HEVC|HEIC, + {0}, + {0}, + NULL, + msm_vidc_set_u32_enum}, + + {LF_MODE, ENC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_deblock_mode}, + + {SLICE_MODE, ENC, H264|HEVC, + {BITRATE_MODE, ALL_INTRA, ENH_LAYER_COUNT}, + {STAGE, DELIVERY_MODE}, + msm_vidc_adjust_slice_count, + msm_vidc_set_slice_count}, + + {SLICE_MODE, ENC, HEIC, + {0}, + {0}, + msm_vidc_adjust_slice_count, + msm_vidc_set_slice_count}, + + {TRANSFORM_8X8, ENC, H264, + {PROFILE}, + {0}, + msm_vidc_adjust_transform_8x8, + msm_vidc_set_u32}, + + {CHROMA_QP_INDEX_OFFSET, ENC, HEVC, + {0}, + {0}, + msm_vidc_adjust_chroma_qp_index_offset, + msm_vidc_set_chroma_qp_index_offset}, + + {DISPLAY_DELAY_ENABLE, DEC, H264|HEVC|VP9|AV1, + {0}, + {OUTPUT_ORDER}, + NULL, + NULL}, + + {DISPLAY_DELAY, DEC, H264|HEVC|VP9|AV1, + {0}, + {OUTPUT_ORDER}, + NULL, + NULL}, + + {OUTPUT_ORDER, DEC, H264|HEVC|VP9|AV1, + {THUMBNAIL_MODE, DISPLAY_DELAY, DISPLAY_DELAY_ENABLE}, + {META_OUTBUF_FENCE, SLICE_DECODE}, + msm_vidc_adjust_output_order, + msm_vidc_set_u32}, + + {INPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL, + {0}, + {0}, + msm_vidc_adjust_input_buf_host_max_count, + msm_vidc_set_u32}, + + {INPUT_BUF_HOST_MAX_COUNT, ENC, H264|HEVC, + {SUPER_FRAME}, + {0}, + msm_vidc_adjust_input_buf_host_max_count, + msm_vidc_set_u32}, + + {OUTPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL, + {0}, + {0}, + msm_vidc_adjust_output_buf_host_max_count, + msm_vidc_set_u32}, + + {OUTPUT_BUF_HOST_MAX_COUNT, ENC, H264|HEVC, + {SUPER_FRAME, DELIVERY_MODE}, + {0}, + msm_vidc_adjust_output_buf_host_max_count, + msm_vidc_set_u32}, + + {CONCEAL_COLOR_8BIT, DEC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_u32_packed}, + + {CONCEAL_COLOR_10BIT, DEC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_u32_packed}, + + {STAGE, ENC | DEC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_stage}, + + {STAGE, ENC, H264|HEVC, + {LOWLATENCY_MODE, SLICE_MODE}, + {0}, + NULL, + msm_vidc_set_stage}, + + {STAGE, DEC, H264|HEVC|VP9|AV1, + {LOWLATENCY_MODE}, + {0}, + NULL, + msm_vidc_set_stage}, + + {PIPE, DEC|ENC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_pipe}, + + {THUMBNAIL_MODE, DEC, CODECS_ALL, + {0}, + {OUTPUT_ORDER}, + NULL, + msm_vidc_set_u32}, + + {RAP_FRAME, DEC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_u32}, + + {PRIORITY, DEC|ENC, CODECS_ALL, + {0}, + {0}, + msm_vidc_adjust_session_priority, + msm_vidc_set_session_priority}, + + {FIRMWARE_PRIORITY_OFFSET, DEC | ENC, CODECS_ALL, + {0}, + {0}, + NULL, + NULL}, + + {CRITICAL_PRIORITY, ENC, CODECS_ALL, + {0}, + {0}, + NULL, + NULL}, + + {RESERVE_DURATION, ENC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_reserve_duration}, + + {DPB_LIST, DEC, CODECS_ALL, + {0}, + {0}, + NULL, + NULL}, + + {DRAP, DEC, AV1, + {0}, + {0}, + NULL, + msm_vidc_set_u32}, + + {ALL_INTRA, ENC, H264|HEVC, + {GOP_SIZE, B_FRAME}, + {LTR_COUNT, IR_PERIOD, SLICE_MODE, BIT_RATE}, + msm_vidc_adjust_all_intra, + NULL}, + + {INPUT_METADATA_FD, ENC|DEC, CODECS_ALL, + {0}, + {0}, + NULL, + NULL}, + + {INPUT_META_VIA_REQUEST, ENC|DEC, CODECS_ALL, + {0}, + {0}, + NULL, + NULL}, + + {META_EVA_STATS, ENC, CODECS_ALL, + {0}, + {ENH_LAYER_COUNT, REQUEST_PREPROCESS}}, + + {META_ROI_INFO, ENC, H264|HEVC, + {BITRATE_MODE, PIX_FMTS}, + {MIN_QUALITY, IR_PERIOD}, + msm_vidc_adjust_roi_info, + NULL}, + + {GRID, ENC, HEIC, + {0}, + {0}, + NULL, + msm_vidc_set_u32}, + + {DELIVERY_MODE, ENC, H264|HEVC, + {SLICE_MODE}, {LOWLATENCY_MODE, OUTPUT_BUF_HOST_MAX_COUNT}, + msm_vidc_adjust_delivery_mode, + msm_vidc_set_u32}, + + {VUI_TIMING_INFO, ENC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_vui_timing_info}, +}; + +/* Default UBWC config for LPDDR5 */ +static struct msm_vidc_ubwc_config_data ubwc_config_pineapple[] = { + UBWC_CONFIG(8, 32, 16, 0, 1, 1, 1), +}; + +static struct msm_vidc_format_capability format_data_pineapple = { + .codec_info = codec_data_pineapple, + .codec_info_size = ARRAY_SIZE(codec_data_pineapple), + .color_format_info = color_format_data_pineapple, + .color_format_info_size = ARRAY_SIZE(color_format_data_pineapple), + .color_prim_info = color_primaries_data_pineapple, + .color_prim_info_size = ARRAY_SIZE(color_primaries_data_pineapple), + .transfer_char_info = transfer_char_data_pineapple, + .transfer_char_info_size = ARRAY_SIZE(transfer_char_data_pineapple), + .matrix_coeff_info = matrix_coeff_data_pineapple, + .matrix_coeff_info_size = ARRAY_SIZE(matrix_coeff_data_pineapple), +}; + +static const struct msm_vidc_platform_data pineapple_data = { + .core_data = core_data_pineapple, + .core_data_size = ARRAY_SIZE(core_data_pineapple), + .inst_cap_data = instance_cap_data_pineapple, + .inst_cap_data_size = ARRAY_SIZE(instance_cap_data_pineapple), + .inst_cap_dependency_data = instance_cap_dependency_data_pineapple, + .inst_cap_dependency_data_size = ARRAY_SIZE(instance_cap_dependency_data_pineapple), + .csc_data.vpe_csc_custom_bias_coeff = vpe_csc_custom_bias_coeff, + .csc_data.vpe_csc_custom_matrix_coeff = vpe_csc_custom_matrix_coeff, + .csc_data.vpe_csc_custom_limit_coeff = vpe_csc_custom_limit_coeff, + .ubwc_config = ubwc_config_pineapple, + .format_data = &format_data_pineapple, +}; + +int msm_vidc_pineapple_check_ddr_type(void) +{ + u32 ddr_type; + + ddr_type = of_fdt_get_ddrtype(); + if (ddr_type != DDR_TYPE_LPDDR5 && + ddr_type != DDR_TYPE_LPDDR5X) { + d_vpr_e("%s: wrong ddr type %d\n", __func__, ddr_type); + return -EINVAL; + } else { + d_vpr_h("%s: ddr type %d\n", __func__, ddr_type); + } + return 0; +} + +static int msm_vidc_init_data(struct msm_vidc_core *core) +{ + int rc = 0; + + if (!core || !core->platform) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + d_vpr_h("%s: initialize pineapple data\n", __func__); + + core->platform->data = pineapple_data; + rc = msm_vidc_pineapple_check_ddr_type(); + if (rc) + return rc; + + return rc; +} + +int msm_vidc_init_platform_pineapple(struct msm_vidc_core *core, struct device *dev) +{ + int rc = 0; + + rc = msm_vidc_init_data(core); + if (rc) + return rc; + + return 0; +} + +int msm_vidc_deinit_platform_pineapple(struct msm_vidc_core *core, struct device *dev) +{ + /* do nothing */ + return 0; +} diff --git a/driver/platform/pineapple/src/pineapple.c b/driver/platform/pineapple/src/pineapple.c new file mode 100644 index 0000000000..f4d3dd33bd --- /dev/null +++ b/driver/platform/pineapple/src/pineapple.c @@ -0,0 +1,1976 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include + +#include "msm_vidc_control.h" +#include "msm_vidc_pineapple.h" +#include "msm_vidc_platform.h" +#include "msm_vidc_debug.h" +#include "hfi_property.h" +#include "msm_vidc_iris33.h" +#include "hfi_command.h" + +#define DEFAULT_VIDEO_CONCEAL_COLOR_BLACK 0x8020010 +#define MAX_LTR_FRAME_COUNT 2 +#define MAX_BASE_LAYER_PRIORITY_ID 63 +#define MAX_OP_POINT 31 +#define MAX_BITRATE 245000000 +#define DEFAULT_BITRATE 20000000 +#define MINIMUM_FPS 1 +#define MAXIMUM_FPS 480 +#define MAX_QP 51 +#define DEFAULT_QP 20 +#define MAX_CONSTANT_QUALITY 100 +#define MIN_SLICE_BYTE_SIZE 512 +#define MAX_SLICE_BYTE_SIZE \ + ((MAX_BITRATE) >> 3) +#define MAX_SLICE_MB_SIZE \ + (((4096 + 15) >> 4) * ((2304 + 15) >> 4)) + +#define ENC MSM_VIDC_ENCODER +#define DEC MSM_VIDC_DECODER +#define H264 MSM_VIDC_H264 +#define HEVC MSM_VIDC_HEVC +#define VP9 MSM_VIDC_VP9 +#define AV1 MSM_VIDC_AV1 +#define HEIC MSM_VIDC_HEIC +#define CODECS_ALL (H264 | HEVC | VP9 | HEIC | AV1) +#define MAXIMUM_OVERRIDE_VP9_FPS 180 + +static struct codec_info codec_data_pineapple[] = { + { + .v4l2_codec = V4L2_PIX_FMT_H264, + .vidc_codec = MSM_VIDC_H264, + .pixfmt_name = "AVC", + }, + { + .v4l2_codec = V4L2_PIX_FMT_HEVC, + .vidc_codec = MSM_VIDC_HEVC, + .pixfmt_name = "HEVC", + }, + { + .v4l2_codec = V4L2_PIX_FMT_VP9, + .vidc_codec = MSM_VIDC_VP9, + .pixfmt_name = "VP9", + }, +}; + +static struct color_format_info color_format_data_pineapple[] = { + { + .v4l2_color_format = V4L2_PIX_FMT_NV12, + .vidc_color_format = MSM_VIDC_FMT_NV12, + .pixfmt_name = "NV12", + }, + { + .v4l2_color_format = V4L2_PIX_FMT_NV21, + .vidc_color_format = MSM_VIDC_FMT_NV21, + .pixfmt_name = "NV21", + }, + { + .v4l2_color_format = V4L2_PIX_FMT_RGBA32, + .vidc_color_format = MSM_VIDC_FMT_RGBA8888, + .pixfmt_name = "RGBA", + }, +}; + +static struct color_primaries_info color_primaries_data_pineapple[] = { + { + .v4l2_color_primaries = V4L2_COLORSPACE_DEFAULT, + .vidc_color_primaries = MSM_VIDC_PRIMARIES_RESERVED, + }, + { + .v4l2_color_primaries = V4L2_COLORSPACE_REC709, + .vidc_color_primaries = MSM_VIDC_PRIMARIES_BT709, + }, + { + .v4l2_color_primaries = V4L2_COLORSPACE_470_SYSTEM_M, + .vidc_color_primaries = MSM_VIDC_PRIMARIES_BT470_SYSTEM_M, + }, + { + .v4l2_color_primaries = V4L2_COLORSPACE_470_SYSTEM_BG, + .vidc_color_primaries = MSM_VIDC_PRIMARIES_BT470_SYSTEM_BG, + }, + { + .v4l2_color_primaries = V4L2_COLORSPACE_SMPTE170M, + .vidc_color_primaries = MSM_VIDC_PRIMARIES_BT601_525, + }, + { + .v4l2_color_primaries = V4L2_COLORSPACE_SMPTE240M, + .vidc_color_primaries = MSM_VIDC_PRIMARIES_SMPTE_ST240M, + }, + { + .v4l2_color_primaries = V4L2_COLORSPACE_BT2020, + .vidc_color_primaries = MSM_VIDC_PRIMARIES_BT2020, + }, + { + .v4l2_color_primaries = V4L2_COLORSPACE_DCI_P3, + .vidc_color_primaries = MSM_VIDC_PRIMARIES_SMPTE_RP431_2, + }, +}; + +static struct transfer_char_info transfer_char_data_pineapple[] = { + { + .v4l2_transfer_char = V4L2_XFER_FUNC_DEFAULT, + .vidc_transfer_char = MSM_VIDC_TRANSFER_RESERVED, + }, + { + .v4l2_transfer_char = V4L2_XFER_FUNC_709, + .vidc_transfer_char = MSM_VIDC_TRANSFER_BT709, + }, + { + .v4l2_transfer_char = V4L2_XFER_FUNC_SMPTE240M, + .vidc_transfer_char = MSM_VIDC_TRANSFER_SMPTE_ST240M, + }, + { + .v4l2_transfer_char = V4L2_XFER_FUNC_SRGB, + .vidc_transfer_char = MSM_VIDC_TRANSFER_SRGB_SYCC, + }, + { + .v4l2_transfer_char = V4L2_XFER_FUNC_SMPTE2084, + .vidc_transfer_char = MSM_VIDC_TRANSFER_SMPTE_ST2084_PQ, + }, +}; + +static struct matrix_coeff_info matrix_coeff_data_pineapple[] = { + { + .v4l2_matrix_coeff = V4L2_YCBCR_ENC_DEFAULT, + .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_RESERVED, + }, + { + .v4l2_matrix_coeff = V4L2_YCBCR_ENC_709, + .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_BT709, + }, + { + .v4l2_matrix_coeff = V4L2_YCBCR_ENC_XV709, + .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_BT709, + }, + { + .v4l2_matrix_coeff = V4L2_YCBCR_ENC_XV601, + .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_BT470_SYS_BG_OR_BT601_625, + }, + { + .v4l2_matrix_coeff = V4L2_YCBCR_ENC_601, + .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_BT601_525_BT1358_525_OR_625, + }, + { + .v4l2_matrix_coeff = V4L2_YCBCR_ENC_SMPTE240M, + .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_SMPTE_ST240, + }, + { + .v4l2_matrix_coeff = V4L2_YCBCR_ENC_BT2020, + .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_BT2020_NON_CONSTANT, + }, + { + .v4l2_matrix_coeff = V4L2_YCBCR_ENC_BT2020_CONST_LUM, + .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_BT2020_CONSTANT, + }, +}; + +static struct msm_platform_core_capability core_data_pineapple[] = { + /* {type, value} */ + {ENC_CODECS, H264|HEVC|HEIC}, + {DEC_CODECS, H264|HEVC|VP9|AV1|HEIC}, + {MAX_SESSION_COUNT, 16}, + {MAX_NUM_720P_SESSIONS, 16}, + {MAX_NUM_1080P_SESSIONS, 16}, + {MAX_NUM_4K_SESSIONS, 8}, + {MAX_NUM_8K_SESSIONS, 2}, + {MAX_RT_MBPF, 174080}, /* (8192x4352)/256 + (4096x2176)/256*/ + {MAX_MBPF, 278528}, /* ((8192x4352)/256) * 2 */ + {MAX_MBPS, 7833600}, /* max_load + * 7680x4320@60fps or 3840x2176@240fps + * which is greater than 4096x2176@120fps, + * 8192x4320@48fps + */ + {MAX_MBPF_HQ, 8160}, /* ((1920x1088)/256) */ + {MAX_MBPS_HQ, 489600}, /* ((1920x1088)/256)@60fps */ + {MAX_MBPF_B_FRAME, 32640}, /* 3840x2176/256 */ + {MAX_MBPS_B_FRAME, 1958400}, /* 3840x2176/256 MBs@60fps */ + {MAX_MBPS_ALL_INTRA, 2088960}, /* 4096x2176/256 MBs@60fps */ + {MAX_ENH_LAYER_COUNT, 5}, + {NUM_VPP_PIPE, 4}, + {SW_PC, 1}, + {FW_UNLOAD, 0}, + {HW_RESPONSE_TIMEOUT, HW_RESPONSE_TIMEOUT_VALUE}, /* 1000 ms */ + {SW_PC_DELAY, SW_PC_DELAY_VALUE }, /* 1500 ms (>HW_RESPONSE_TIMEOUT)*/ + {FW_UNLOAD_DELAY, FW_UNLOAD_DELAY_VALUE }, /* 3000 ms (>SW_PC_DELAY)*/ + {DCVS, 1}, + {DECODE_BATCH, 1}, + {DECODE_BATCH_TIMEOUT, 200}, + {STATS_TIMEOUT_MS, 2000}, + {NON_FATAL_FAULTS, 1}, + {ENC_AUTO_FRAMERATE, 1}, +}; + +static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { + /* {cap, domain, codec, + * min, max, step_or_mask, value, + * v4l2_id, + * hfi_id, + * flags} + */ + + {FRAME_WIDTH, DEC, CODECS_ALL, 96, 8192, 1, 1920}, + + {FRAME_WIDTH, DEC, VP9, 96, 4096, 1, 1920}, + + {FRAME_WIDTH, ENC, CODECS_ALL, 128, 8192, 1, 1920}, + + {FRAME_WIDTH, ENC, HEVC, 96, 8192, 1, 1920}, + + {FRAME_WIDTH, ENC, HEIC, 128, 16384, 1, 16384}, + + {LOSSLESS_FRAME_WIDTH, ENC, CODECS_ALL, 128, 4096, 1, 1920}, + + {LOSSLESS_FRAME_WIDTH, ENC, HEVC, 96, 4096, 1, 1920}, + + {FRAME_HEIGHT, DEC, CODECS_ALL, 96, 8192, 1, 1080}, + + {FRAME_HEIGHT, DEC, VP9, 96, 4096, 1, 1080}, + + {FRAME_HEIGHT, ENC, CODECS_ALL, 128, 8192, 1, 1080}, + + {FRAME_HEIGHT, ENC, HEVC, 96, 8192, 1, 1080}, + + {FRAME_HEIGHT, ENC, HEIC, 128, 16384, 1, 16384}, + + {LOSSLESS_FRAME_HEIGHT, ENC, CODECS_ALL, 128, 4096, 1, 1080}, + + {LOSSLESS_FRAME_HEIGHT, ENC, HEVC, 96, 4096, 1, 1080}, + + {PIX_FMTS, ENC|DEC, H264, + MSM_VIDC_FMT_NV12, + MSM_VIDC_FMT_NV12C, + MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C, + MSM_VIDC_FMT_NV12C}, + + {PIX_FMTS, ENC|DEC, HEVC|VP9|AV1, + MSM_VIDC_FMT_NV12, + MSM_VIDC_FMT_TP10C, + MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C | + MSM_VIDC_FMT_P010 | MSM_VIDC_FMT_TP10C, + MSM_VIDC_FMT_NV12C}, + + {PIX_FMTS, ENC, HEIC, + MSM_VIDC_FMT_NV12, + MSM_VIDC_FMT_P010, + MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_P010, + MSM_VIDC_FMT_NV12}, + + {PIX_FMTS, DEC, HEIC, + MSM_VIDC_FMT_NV12, + MSM_VIDC_FMT_TP10C, + MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C | + MSM_VIDC_FMT_P010 | MSM_VIDC_FMT_TP10C, + MSM_VIDC_FMT_NV12C}, + + {MIN_BUFFERS_INPUT, ENC|DEC, CODECS_ALL, 0, 64, 1, 4, + V4L2_CID_MIN_BUFFERS_FOR_OUTPUT, + 0, + CAP_FLAG_VOLATILE}, + + {MIN_BUFFERS_INPUT, ENC|DEC, HEIC, 0, 64, 1, 1, + V4L2_CID_MIN_BUFFERS_FOR_OUTPUT, + 0, + CAP_FLAG_VOLATILE}, + + {MIN_BUFFERS_OUTPUT, ENC|DEC, CODECS_ALL, + 0, 64, 1, 4, + V4L2_CID_MIN_BUFFERS_FOR_CAPTURE, + HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_VOLATILE}, + + /* (8192 * 4320) / 256 */ + {MBPF, ENC, CODECS_ALL, 64, 138240, 1, 138240}, + + {MBPF, ENC, HEVC, 36, 138240, 1, 138240}, + + /* ((16384x16384)/256) */ + {MBPF, ENC, HEIC, 36, 1048576, 1, 1048576}, + + {MBPF, DEC, CODECS_ALL, 36, 138240, 1, 138240}, + + /* (4096 * 2304) / 256 */ + {MBPF, DEC, VP9, 36, 36864, 1, 36864}, + + /* ((8192x8192)/256) */ + {MBPF, DEC, HEIC, 64, 262144, 1, 262144 }, + + /* (4096 * 2304) / 256 */ + {LOSSLESS_MBPF, ENC, H264|HEVC, 64, 36864, 1, 36864}, + + /* Batch Mode Decode */ + /* TODO: update with new values based on updated voltage corner */ + {BATCH_MBPF, DEC, H264|HEVC|VP9|AV1, 64, 34816, 1, 34816}, + + /* (4096 * 2304) / 256 */ + {BATCH_FPS, DEC, H264|HEVC|VP9|AV1, 1, 120, 1, 120}, + + /* ((1920 * 1088) / 256) * 480 fps */ + {MBPS, ENC, CODECS_ALL, 64, 3916800, 1, 3916800}, + + {MBPS, ENC, HEVC, 36, 3916800, 1, 3916800}, + + /* ((16384x16384)/256)@1fps */ + {MBPS, ENC, HEIC, 36, 1048576, 1, 1048576}, + + /* ((1920 * 1088) / 256) * 960 fps */ + {MBPS, DEC, CODECS_ALL, 64, 7833600, 1, 7833600}, + + /* ((4096 * 2304) / 256) * 120 */ + {MBPS, DEC, VP9, 36, 4423680, 1, 4423680}, + + /* ((8192x8192)/256)@1fps */ + {MBPS, DEC, HEIC, 64, 262144, 1, 262144 }, + + /* Enable check mbps for encoder */ + {CHECK_MBPS, ENC, CODECS_ALL, 0, 1, 1, 1}, + + /* Disable check mbps for encoder */ + {CHECK_MBPS, DEC, CODECS_ALL, 0, 1, 1, 0}, + + {FRAME_RATE, ENC, CODECS_ALL, + (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), + 1, (DEFAULT_FPS << 16), + 0, + HFI_PROP_FRAME_RATE, + CAP_FLAG_OUTPUT_PORT}, + + {FRAME_RATE, ENC, HEIC, + (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), + 1, (MINIMUM_FPS << 16), + 0, + HFI_PROP_FRAME_RATE, + CAP_FLAG_OUTPUT_PORT}, + + {OPERATING_RATE, ENC, CODECS_ALL, + (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), + 1, (DEFAULT_FPS << 16)}, + + {INPUT_RATE, ENC|DEC, CODECS_ALL, + (MINIMUM_FPS << 16), INT_MAX, + 1, (DEFAULT_FPS << 16)}, + + {TIMESTAMP_RATE, ENC|DEC, CODECS_ALL, + (MINIMUM_FPS << 16), INT_MAX, + 1, (DEFAULT_FPS << 16)}, + + {SCALE_FACTOR, ENC, H264|HEVC, 1, 8, 1, 8}, + + {MB_CYCLES_VSP, ENC, CODECS_ALL, 25, 25, 1, 25}, + + {MB_CYCLES_VSP, DEC, CODECS_ALL, 25, 25, 1, 25}, + + {MB_CYCLES_VSP, DEC, VP9|AV1, 60, 60, 1, 60}, + + {MB_CYCLES_VPP, ENC, CODECS_ALL, 675, 675, 1, 675}, + + {MB_CYCLES_VPP, DEC, CODECS_ALL, 200, 200, 1, 200}, + + {MB_CYCLES_LP, ENC, CODECS_ALL, 320, 320, 1, 320}, + + {MB_CYCLES_LP, DEC, CODECS_ALL, 200, 200, 1, 200}, + + {MB_CYCLES_FW, ENC|DEC, CODECS_ALL, 489583, 489583, 1, 489583}, + + {MB_CYCLES_FW_VPP, ENC, CODECS_ALL, 48405, 48405, 1, 48405}, + + {MB_CYCLES_FW_VPP, DEC, CODECS_ALL, 66234, 66234, 1, 66234}, + + {CLIENT_ID, ENC|DEC, CODECS_ALL, + INVALID_CLIENT_ID, INT_MAX, 1, INVALID_CLIENT_ID, + 0}, + + {HFLIP, ENC, CODECS_ALL, + 0, 1, 1, 0, + V4L2_CID_HFLIP, + HFI_PROP_FLIP, + CAP_FLAG_OUTPUT_PORT | + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {VFLIP, ENC, CODECS_ALL, + 0, 1, 1, 0, + V4L2_CID_VFLIP, + HFI_PROP_FLIP, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {ROTATION, ENC, CODECS_ALL, + 0, 270, 90, 0, + V4L2_CID_ROTATE, + HFI_PROP_ROTATION, + CAP_FLAG_OUTPUT_PORT}, + + {SUPER_FRAME, ENC, H264|HEVC, + 0, 32, 1, 0, + 0, 0, + CAP_FLAG_NONE}, + + {SLICE_DECODE, DEC, CODECS_ALL, + 0, 0, 0, 0, + V4L2_CID_MPEG_VIDEO_DECODER_SLICE_INTERFACE, + 0}, + + {HEADER_MODE, ENC, CODECS_ALL, + V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE, + V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME, + BIT(V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE) | + BIT(V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME), + V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE, + V4L2_CID_MPEG_VIDEO_HEADER_MODE, + HFI_PROP_SEQ_HEADER_MODE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {PREPEND_SPSPPS_TO_IDR, ENC, CODECS_ALL, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDEO_PREPEND_SPSPPS_TO_IDR}, + + {WITHOUT_STARTCODE, ENC, CODECS_ALL, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE, + HFI_PROP_NAL_LENGTH_FIELD, + CAP_FLAG_OUTPUT_PORT}, + + {WITHOUT_STARTCODE, DEC, AV1, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE, + HFI_PROP_NAL_LENGTH_FIELD, + CAP_FLAG_INPUT_PORT}, + + {NAL_LENGTH_FIELD, ENC, CODECS_ALL, + V4L2_MPEG_VIDEO_HEVC_SIZE_0, + V4L2_MPEG_VIDEO_HEVC_SIZE_4, + BIT(V4L2_MPEG_VIDEO_HEVC_SIZE_0) | + BIT(V4L2_MPEG_VIDEO_HEVC_SIZE_4), + V4L2_MPEG_VIDEO_HEVC_SIZE_0, + V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD, + HFI_PROP_NAL_LENGTH_FIELD, + CAP_FLAG_MENU | CAP_FLAG_OUTPUT_PORT}, + + /* TODO: Firmware introduced enumeration type for this + * with and without seq header. + */ + {REQUEST_I_FRAME, ENC, H264|HEVC, + 0, 0, 0, 0, + V4L2_CID_MPEG_VIDEO_FORCE_KEY_FRAME, + HFI_PROP_REQUEST_SYNC_FRAME, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + /* Enc: Keeping CABAC and CAVLC as same bitrate. + * Dec: there's no use of Bitrate cap + */ + {BIT_RATE, ENC, H264|HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_BITRATE, + HFI_PROP_TOTAL_BITRATE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {BITRATE_MODE, ENC, H264, + V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, + V4L2_MPEG_VIDEO_BITRATE_MODE_CBR, + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_VBR) | + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CBR), + V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, + V4L2_CID_MPEG_VIDEO_BITRATE_MODE, + HFI_PROP_RATE_CONTROL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {BITRATE_MODE, ENC, HEVC, + V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, + V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_VBR) | + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CBR) | + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CQ), + V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, + V4L2_CID_MPEG_VIDEO_BITRATE_MODE, + HFI_PROP_RATE_CONTROL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {BITRATE_MODE, ENC, HEIC, + V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, + V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CQ), + V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, + V4L2_CID_MPEG_VIDEO_BITRATE_MODE, + HFI_PROP_RATE_CONTROL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {CABAC_MAX_BITRATE, ENC, H264|HEVC, 0, + 160000000, 1, 160000000}, + + {CAVLC_MAX_BITRATE, ENC, H264, 0, + 220000000, 1, 220000000}, + + {ALLINTRA_MAX_BITRATE, ENC, H264|HEVC, 0, + 245000000, 1, 245000000}, + + {LOWLATENCY_MAX_BITRATE, ENC, H264|HEVC, 0, + 70000000, 1, 70000000}, + + {LOSSLESS, ENC, HEVC, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU}, + + {FRAME_SKIP_MODE, ENC, H264|HEVC|HEIC, + V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED, + V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT, + BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED) | + BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_LEVEL_LIMIT) | + BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT), + V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED, + V4L2_CID_MPEG_VIDEO_FRAME_SKIP_MODE, + 0, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {FRAME_RC_ENABLE, ENC, H264|HEVC|HEIC, + 0, 1, 1, 1, + V4L2_CID_MPEG_VIDEO_FRAME_RC_ENABLE}, + + {CONSTANT_QUALITY, ENC, HEVC, + 1, MAX_CONSTANT_QUALITY, 1, 90, + V4L2_CID_MPEG_VIDEO_CONSTANT_QUALITY, + HFI_PROP_CONSTANT_QUALITY, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {CONSTANT_QUALITY, ENC, HEIC, + 1, MAX_CONSTANT_QUALITY, 1, 100, + V4L2_CID_MPEG_VIDEO_CONSTANT_QUALITY, + HFI_PROP_CONSTANT_QUALITY, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {GOP_SIZE, ENC, CODECS_ALL, + 0, INT_MAX, 1, 2 * DEFAULT_FPS - 1, + V4L2_CID_MPEG_VIDEO_GOP_SIZE, + HFI_PROP_MAX_GOP_FRAMES, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {GOP_SIZE, ENC, HEIC, + 0, INT_MAX, 1, 0 /* all intra */, + V4L2_CID_MPEG_VIDEO_GOP_SIZE, + HFI_PROP_MAX_GOP_FRAMES, + CAP_FLAG_OUTPUT_PORT | + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {GOP_CLOSURE, ENC, H264|HEVC, + 0, 1, 1, 1, + V4L2_CID_MPEG_VIDEO_GOP_CLOSURE, + 0}, + + {B_FRAME, ENC, H264|HEVC, + 0, 7, 1, 0, + V4L2_CID_MPEG_VIDEO_B_FRAMES, + HFI_PROP_MAX_B_FRAMES, + CAP_FLAG_OUTPUT_PORT}, + + {B_FRAME, ENC, HEIC, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDEO_B_FRAMES, + HFI_PROP_MAX_B_FRAMES, + CAP_FLAG_OUTPUT_PORT}, + + {BLUR_TYPES, ENC, H264|HEVC, + MSM_VIDC_BLUR_NONE, MSM_VIDC_BLUR_EXTERNAL, + BIT(MSM_VIDC_BLUR_NONE) | BIT(MSM_VIDC_BLUR_EXTERNAL), + MSM_VIDC_BLUR_NONE, + 0, + HFI_PROP_BLUR_TYPES, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {CSC, ENC, CODECS_ALL, + 0, 1, 1, 0, + 0, + HFI_PROP_CSC}, + + {LOWLATENCY_MODE, ENC, H264|HEVC, + 0, 1, 1, 0, + 0, + 0, + CAP_FLAG_NONE}, + + {LOWLATENCY_MODE, DEC, H264|HEVC|VP9|AV1, + 0, 1, 1, 0, + 0, + HFI_PROP_SEQ_CHANGE_AT_SYNC_FRAME, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {LTR_COUNT, ENC, H264|HEVC, + 0, 2, 1, 0, + V4L2_CID_MPEG_VIDEO_LTR_COUNT, + HFI_PROP_LTR_COUNT, + CAP_FLAG_OUTPUT_PORT}, + + {USE_LTR, ENC, H264|HEVC, + 0, + ((1 << MAX_LTR_FRAME_COUNT) - 1), + 0, 0, + V4L2_CID_MPEG_VIDEO_USE_LTR_FRAMES, + HFI_PROP_LTR_USE, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {MARK_LTR, ENC, H264|HEVC, + INVALID_DEFAULT_MARK_OR_USE_LTR, + (MAX_LTR_FRAME_COUNT - 1), + 1, INVALID_DEFAULT_MARK_OR_USE_LTR, + V4L2_CID_MPEG_VIDEO_FRAME_LTR_INDEX, + HFI_PROP_LTR_MARK, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {BASELAYER_PRIORITY, ENC, H264, + 0, MAX_BASE_LAYER_PRIORITY_ID, 1, 0, + V4L2_CID_MPEG_VIDEO_BASELAYER_PRIORITY_ID, + HFI_PROP_BASELAYER_PRIORITYID, + CAP_FLAG_OUTPUT_PORT}, + + {AU_DELIMITER, ENC, H264|HEVC, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDEO_AU_DELIMITER, + HFI_PROP_AUD, + CAP_FLAG_OUTPUT_PORT}, + + {CONTENT_ADAPTIVE_CODING, ENC, H264|HEVC, + 0, 1, 1, 1, + 0, + HFI_PROP_CONTENT_ADAPTIVE_CODING, + CAP_FLAG_OUTPUT_PORT}, + + {REQUEST_PREPROCESS, ENC, H264|HEVC, + MSM_VIDC_PREPROCESS_NONE, + MSM_VIDC_PREPROCESS_TYPE0, + BIT(MSM_VIDC_PREPROCESS_NONE) | + BIT(MSM_VIDC_PREPROCESS_TYPE0), + MSM_VIDC_PREPROCESS_NONE, + 0, HFI_PROP_REQUEST_PREPROCESS, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {MIN_QUALITY, ENC, H264|HEVC, + 0, MAX_SUPPORTED_MIN_QUALITY, 70, MAX_SUPPORTED_MIN_QUALITY, + 0, + HFI_PROP_MAINTAIN_MIN_QUALITY, + CAP_FLAG_OUTPUT_PORT}, + + {VBV_DELAY, ENC, H264|HEVC, + 200, 300, 100, 300, + V4L2_CID_MPEG_VIDEO_VBV_DELAY, + HFI_PROP_VBV_DELAY, + CAP_FLAG_OUTPUT_PORT}, + + {PEAK_BITRATE, ENC, H264|HEVC, + /* default peak bitrate is 10% larger than avg bitrate */ + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_BITRATE_PEAK, + HFI_PROP_TOTAL_PEAK_BITRATE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {MIN_FRAME_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, + V4L2_CID_MPEG_VIDEO_H264_MIN_QP, + HFI_PROP_MIN_QP_PACKED, + CAP_FLAG_OUTPUT_PORT}, + + {MIN_FRAME_QP, ENC, HEVC|HEIC, + MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, + V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP, + HFI_PROP_MIN_QP_PACKED, + CAP_FLAG_OUTPUT_PORT}, + + {I_FRAME_MIN_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, + V4L2_CID_MPEG_VIDEO_H264_I_FRAME_MIN_QP}, + + {I_FRAME_MIN_QP, ENC, HEVC|HEIC, + MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, + V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_MIN_QP}, + + {P_FRAME_MIN_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, + V4L2_CID_MPEG_VIDEO_H264_P_FRAME_MIN_QP}, + + {P_FRAME_MIN_QP, ENC, HEVC|HEIC, + MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, + V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_MIN_QP}, + + {B_FRAME_MIN_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, + V4L2_CID_MPEG_VIDEO_H264_B_FRAME_MIN_QP}, + + {B_FRAME_MIN_QP, ENC, HEVC|HEIC, + MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, + V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_MIN_QP}, + + {MAX_FRAME_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_H264_MAX_QP, + HFI_PROP_MAX_QP_PACKED, + CAP_FLAG_OUTPUT_PORT}, + + {MAX_FRAME_QP, ENC, HEVC|HEIC, + MIN_QP_10BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP, + HFI_PROP_MAX_QP_PACKED, + CAP_FLAG_OUTPUT_PORT}, + + {I_FRAME_MAX_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_H264_I_FRAME_MAX_QP}, + + {I_FRAME_MAX_QP, ENC, HEVC|HEIC, + MIN_QP_10BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_MAX_QP}, + + {P_FRAME_MAX_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_H264_P_FRAME_MAX_QP}, + + {P_FRAME_MAX_QP, ENC, HEVC|HEIC, + MIN_QP_10BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_MAX_QP}, + + {B_FRAME_MAX_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_H264_B_FRAME_MAX_QP}, + + {B_FRAME_MAX_QP, ENC, HEVC|HEIC, + MIN_QP_10BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_MAX_QP}, + + {I_FRAME_QP, ENC, HEVC, + MIN_QP_10BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {I_FRAME_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {P_FRAME_QP, ENC, HEVC, + MIN_QP_10BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {P_FRAME_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {B_FRAME_QP, ENC, HEVC, + MIN_QP_10BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {B_FRAME_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_H264_B_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {LAYER_TYPE, ENC, HEVC, + V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B, + V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P, + BIT(V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B) | + BIT(V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P), + V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE, + HFI_PROP_LAYER_ENCODING_TYPE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LAYER_TYPE, ENC, H264, + V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_B, + V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P, + BIT(V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_B) | + BIT(V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P), + V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P, + V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_TYPE, + HFI_PROP_LAYER_ENCODING_TYPE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LAYER_ENABLE, ENC, H264, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING, + HFI_PROP_LAYER_ENCODING_TYPE, + CAP_FLAG_OUTPUT_PORT}, + + {LAYER_ENABLE, ENC, HEVC, + 0, 1, 1, 0, + 0, + 0, + CAP_FLAG_OUTPUT_PORT}, + + {ENH_LAYER_COUNT, ENC, HEVC, + 0, 5, 1, 0, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER, + HFI_PROP_LAYER_COUNT, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {ENH_LAYER_COUNT, ENC, H264, + 0, 5, 1, 0, + V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_LAYER, + HFI_PROP_LAYER_COUNT, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {ENH_LAYER_COUNT, DEC, AV1, + 0, MAX_OP_POINT, 1, 0, + 0, + HFI_PROP_AV1_OP_POINT, + CAP_FLAG_INPUT_PORT}, + + {L0_BR, ENC, H264, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L0_BR, + HFI_PROP_BITRATE_LAYER1, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L0_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L0_BR, + HFI_PROP_BITRATE_LAYER1, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L1_BR, ENC, H264, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L1_BR, + HFI_PROP_BITRATE_LAYER2, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L1_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L1_BR, + HFI_PROP_BITRATE_LAYER2, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L2_BR, ENC, H264, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L2_BR, + HFI_PROP_BITRATE_LAYER3, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L2_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L2_BR, + HFI_PROP_BITRATE_LAYER3, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L3_BR, ENC, H264, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L3_BR, + HFI_PROP_BITRATE_LAYER4, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + {L3_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L3_BR, + HFI_PROP_BITRATE_LAYER4, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L4_BR, ENC, H264, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L4_BR, + HFI_PROP_BITRATE_LAYER5, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L4_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L4_BR, + HFI_PROP_BITRATE_LAYER5, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L5_BR, ENC, H264, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L5_BR, + HFI_PROP_BITRATE_LAYER6, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L5_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L5_BR, + HFI_PROP_BITRATE_LAYER6, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {ENTROPY_MODE, ENC, H264, + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC, + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, + BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC) | + BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC), + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, + V4L2_CID_MPEG_VIDEO_H264_ENTROPY_MODE, + HFI_PROP_CABAC_SESSION, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {ENTROPY_MODE, DEC, H264|HEVC|VP9|AV1, + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC, + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, + BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC) | + BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC), + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, + 0, + HFI_PROP_CABAC_SESSION}, + + {PROFILE, ENC|DEC, H264, + V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE, + V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH, + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_BASELINE) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_MAIN) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_HIGH), + V4L2_MPEG_VIDEO_H264_PROFILE_HIGH, + V4L2_CID_MPEG_VIDEO_H264_PROFILE, + HFI_PROP_PROFILE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {PROFILE, ENC|DEC, HEVC|HEIC, + V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN, + V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE, + BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN) | + BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE) | + BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10) | + BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE), + V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN, + V4L2_CID_MPEG_VIDEO_HEVC_PROFILE, + HFI_PROP_PROFILE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {PROFILE, DEC, VP9, + V4L2_MPEG_VIDEO_VP9_PROFILE_0, + V4L2_MPEG_VIDEO_VP9_PROFILE_2, + BIT(V4L2_MPEG_VIDEO_VP9_PROFILE_0) | + BIT(V4L2_MPEG_VIDEO_VP9_PROFILE_2), + V4L2_MPEG_VIDEO_VP9_PROFILE_0, + V4L2_CID_MPEG_VIDEO_VP9_PROFILE, + HFI_PROP_PROFILE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LEVEL, ENC, H264, + V4L2_MPEG_VIDEO_H264_LEVEL_1_0, + V4L2_MPEG_VIDEO_H264_LEVEL_6_0, + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1B) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_3) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_0), + V4L2_MPEG_VIDEO_H264_LEVEL_5_0, + V4L2_CID_MPEG_VIDEO_H264_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LEVEL, ENC, HEVC|HEIC, + V4L2_MPEG_VIDEO_HEVC_LEVEL_1, + V4L2_MPEG_VIDEO_HEVC_LEVEL_6, + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6), + V4L2_MPEG_VIDEO_HEVC_LEVEL_5, + V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LEVEL, DEC, H264, + V4L2_MPEG_VIDEO_H264_LEVEL_1_0, + V4L2_MPEG_VIDEO_H264_LEVEL_6_2, + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1B) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_3) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_2), + V4L2_MPEG_VIDEO_H264_LEVEL_6_1, + V4L2_CID_MPEG_VIDEO_H264_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LEVEL, DEC, HEVC|HEIC, + V4L2_MPEG_VIDEO_HEVC_LEVEL_1, + V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2, + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1)| + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2), + V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1, + V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LEVEL, DEC, VP9, + V4L2_MPEG_VIDEO_VP9_LEVEL_1_0, + V4L2_MPEG_VIDEO_VP9_LEVEL_6_0, + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_1_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_1_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_2_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_3_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_4_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_2) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_6_0), + V4L2_MPEG_VIDEO_VP9_LEVEL_6_0, + V4L2_CID_MPEG_VIDEO_VP9_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {HEVC_TIER, ENC|DEC, HEVC, + V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, + V4L2_MPEG_VIDEO_HEVC_TIER_HIGH, + BIT(V4L2_MPEG_VIDEO_HEVC_TIER_MAIN) | + BIT(V4L2_MPEG_VIDEO_HEVC_TIER_HIGH), + V4L2_MPEG_VIDEO_HEVC_TIER_HIGH, + V4L2_CID_MPEG_VIDEO_HEVC_TIER, + HFI_PROP_TIER, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {HEVC_TIER, ENC|DEC, HEIC, + V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, + V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, + BIT(V4L2_MPEG_VIDEO_HEVC_TIER_MAIN), + V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, + V4L2_CID_MPEG_VIDEO_HEVC_TIER, + HFI_PROP_TIER, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LF_MODE, ENC, H264, + V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED, + DB_H264_DISABLE_SLICE_BOUNDARY, + BIT(V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED) | + BIT(V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_DISABLED) | + BIT(DB_H264_DISABLE_SLICE_BOUNDARY), + V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED, + V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_MODE, + HFI_PROP_DEBLOCKING_MODE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LF_MODE, ENC, HEVC|HEIC, + V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_DISABLED, + DB_HEVC_DISABLE_SLICE_BOUNDARY, + BIT(V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_DISABLED) | + BIT(V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_ENABLED) | + BIT(DB_HEVC_DISABLE_SLICE_BOUNDARY), + V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_ENABLED, + V4L2_CID_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE, + HFI_PROP_DEBLOCKING_MODE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LF_ALPHA, ENC, H264, + -6, 6, 1, 0, + V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_ALPHA}, + + {LF_ALPHA, ENC, HEVC|HEIC, + -6, 6, 1, 0, + V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2}, + + {LF_BETA, ENC, H264, + -6, 6, 1, 0, + V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_BETA}, + + {LF_BETA, ENC, HEVC|HEIC, + -6, 6, 1, 0, + V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2}, + + {SLICE_MODE, ENC, H264|HEVC, + V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, + V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_BYTES, + BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE) | + BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_MB) | + BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_BYTES), + V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, + V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE, + 0, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {SLICE_MODE, ENC, HEIC, + V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, + V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, + BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE), + V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, + V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE, + 0, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {SLICE_MAX_BYTES, ENC, H264|HEVC, + MIN_SLICE_BYTE_SIZE, MAX_SLICE_BYTE_SIZE, + 1, MIN_SLICE_BYTE_SIZE, + V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES, + HFI_PROP_MULTI_SLICE_BYTES_COUNT, + CAP_FLAG_OUTPUT_PORT}, + + {SLICE_MAX_MB, ENC, H264|HEVC, + 1, MAX_SLICE_MB_SIZE, 1, 1, + V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB, + HFI_PROP_MULTI_SLICE_MB_COUNT, + CAP_FLAG_OUTPUT_PORT}, + + {MB_RC, ENC, H264|HEVC, + 0, 1, 1, 1, + V4L2_CID_MPEG_VIDEO_MB_RC_ENABLE, + 0, + CAP_FLAG_OUTPUT_PORT}, + + {TRANSFORM_8X8, ENC, H264, + 0, 1, 1, 1, + V4L2_CID_MPEG_VIDEO_H264_8X8_TRANSFORM, + HFI_PROP_8X8_TRANSFORM, + CAP_FLAG_OUTPUT_PORT}, + + {CHROMA_QP_INDEX_OFFSET, ENC, HEVC, + MIN_CHROMA_QP_OFFSET, MAX_CHROMA_QP_OFFSET, + 1, MAX_CHROMA_QP_OFFSET, + V4L2_CID_MPEG_VIDEO_H264_CHROMA_QP_INDEX_OFFSET, + HFI_PROP_CHROMA_QP_OFFSET, + CAP_FLAG_OUTPUT_PORT}, + + {DISPLAY_DELAY_ENABLE, DEC, H264|HEVC|VP9|AV1, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY_ENABLE, + HFI_PROP_DECODE_ORDER_OUTPUT, + CAP_FLAG_INPUT_PORT}, + + {DISPLAY_DELAY, DEC, H264|HEVC|VP9|AV1, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY, + HFI_PROP_DECODE_ORDER_OUTPUT, + CAP_FLAG_INPUT_PORT}, + + {OUTPUT_ORDER, DEC, H264|HEVC|VP9|AV1, + 0, 1, 1, 0, + 0, + HFI_PROP_DECODE_ORDER_OUTPUT, + CAP_FLAG_INPUT_PORT}, + + {INPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL, + DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT, + 1, DEFAULT_MAX_HOST_BUF_COUNT, + 0, + HFI_PROP_BUFFER_HOST_MAX_COUNT, + CAP_FLAG_INPUT_PORT}, + + {OUTPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL, + DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT, + 1, DEFAULT_MAX_HOST_BUF_COUNT, + 0, + HFI_PROP_BUFFER_HOST_MAX_COUNT, + CAP_FLAG_OUTPUT_PORT}, + + {CONCEAL_COLOR_8BIT, DEC, CODECS_ALL, 0x0, 0xff3fcff, 1, + DEFAULT_VIDEO_CONCEAL_COLOR_BLACK, + V4L2_CID_MPEG_VIDEO_MUTE_YUV, + HFI_PROP_CONCEAL_COLOR_8BIT, + CAP_FLAG_INPUT_PORT}, + + {CONCEAL_COLOR_10BIT, DEC, CODECS_ALL, 0x0, 0x3fffffff, 1, + DEFAULT_VIDEO_CONCEAL_COLOR_BLACK, + V4L2_CID_MPEG_VIDEO_MUTE_YUV, + HFI_PROP_CONCEAL_COLOR_10BIT, + CAP_FLAG_INPUT_PORT}, + + {STAGE, DEC|ENC, CODECS_ALL, + MSM_VIDC_STAGE_1, + MSM_VIDC_STAGE_2, 1, + MSM_VIDC_STAGE_2, + 0, + HFI_PROP_STAGE}, + + {PIPE, DEC|ENC, CODECS_ALL, + MSM_VIDC_PIPE_1, + MSM_VIDC_PIPE_4, 1, + MSM_VIDC_PIPE_4, + 0, + HFI_PROP_PIPE}, + + {POC, DEC, H264, 0, 2, 1, 1, + 0, + HFI_PROP_PIC_ORDER_CNT_TYPE}, + + {QUALITY_MODE, ENC, CODECS_ALL, + MSM_VIDC_MAX_QUALITY_MODE, + MSM_VIDC_POWER_SAVE_MODE, 1, + MSM_VIDC_POWER_SAVE_MODE}, + + {CODED_FRAMES, DEC, H264|HEVC|HEIC, + CODED_FRAMES_PROGRESSIVE, CODED_FRAMES_INTERLACE, + 1, CODED_FRAMES_PROGRESSIVE, + 0, + HFI_PROP_CODED_FRAMES}, + + {BIT_DEPTH, DEC, CODECS_ALL, BIT_DEPTH_8, BIT_DEPTH_10, 1, BIT_DEPTH_8, + 0, + HFI_PROP_LUMA_CHROMA_BIT_DEPTH}, + + {CODEC_CONFIG, DEC, H264|HEVC|HEIC|AV1, 0, 1, 1, 0, + 0, 0, + CAP_FLAG_DYNAMIC_ALLOWED}, + + {BITSTREAM_SIZE_OVERWRITE, DEC, CODECS_ALL, 0, INT_MAX, 1, 0, + 0}, + + {THUMBNAIL_MODE, DEC, CODECS_ALL, + 0, 1, 1, 0, + 0, + HFI_PROP_THUMBNAIL_MODE, + CAP_FLAG_INPUT_PORT}, + + {DEFAULT_HEADER, DEC, CODECS_ALL, + 0, 1, 1, 0, + 0, + HFI_PROP_DEC_DEFAULT_HEADER}, + + {RAP_FRAME, DEC, CODECS_ALL, + 0, 1, 1, 1, + 0, + HFI_PROP_DEC_START_FROM_RAP_FRAME, + CAP_FLAG_INPUT_PORT}, + + {SEQ_CHANGE_AT_SYNC_FRAME, DEC, CODECS_ALL, + 0, 1, 1, 1, + 0, + HFI_PROP_SEQ_CHANGE_AT_SYNC_FRAME, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {FIRMWARE_PRIORITY_OFFSET, DEC | ENC, CODECS_ALL, + 1, 1, 1, 1}, + + {DPB_LIST, DEC, CODECS_ALL, + 0, 1, 1, 0, + 0, + HFI_PROP_DPB_LIST, + CAP_FLAG_OUTPUT_PORT}, + + {FILM_GRAIN, DEC, AV1, + 0, 1, 1, 0, + 0, + HFI_PROP_AV1_FILM_GRAIN_PRESENT, + CAP_FLAG_VOLATILE}, + + {SUPER_BLOCK, DEC, AV1, + 0, 1, 1, 0, + 0, + HFI_PROP_AV1_SUPER_BLOCK_ENABLED}, + + {DRAP, DEC, AV1, + 0, S32_MAX, 1, 0, + 0, + HFI_PROP_AV1_DRAP_CONFIG, + CAP_FLAG_INPUT_PORT}, + + {ALL_INTRA, ENC, H264|HEVC, + 0, 1, 1, 0, + 0, + 0, + CAP_FLAG_OUTPUT_PORT}, + + {GRID, ENC, HEIC, + 0, 1, 1, 1, + 0, + HFI_PROP_HEIC_GRID_ENABLE, + CAP_FLAG_OUTPUT_PORT}, + + {COMPLEXITY, ENC, H264|HEVC, + 0, 100, + 1, DEFAULT_COMPLEXITY, + 0}, +}; + +static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pineapple[] = { + /* {cap, domain, codec, + * parents, + * children, + * adjust, set} + */ + + {PIX_FMTS, ENC, H264, + {0}, + {0}}, + + {PIX_FMTS, ENC, HEVC, + {0}, + {PROFILE, MIN_FRAME_QP, MAX_FRAME_QP, I_FRAME_QP, P_FRAME_QP, + B_FRAME_QP, MIN_QUALITY, BLUR_TYPES}}, + + {PIX_FMTS, ENC, HEIC, + {0}, + {PROFILE}}, + + {PIX_FMTS, DEC, HEVC|HEIC, + {0}, + {PROFILE}}, + + {FRAME_RATE, ENC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_q16}, + + {HFLIP, ENC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_flip}, + + {VFLIP, ENC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_flip}, + + {ROTATION, ENC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_rotation}, + + {SUPER_FRAME, ENC, H264|HEVC, + {0}, + {INPUT_BUF_HOST_MAX_COUNT, OUTPUT_BUF_HOST_MAX_COUNT}, + NULL, + NULL}, + + {HEADER_MODE, ENC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_header_mode}, + + {WITHOUT_STARTCODE, ENC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_nal_length}, + + {WITHOUT_STARTCODE, DEC, AV1, + {0}, + {0}, + NULL, + msm_vidc_set_u32}, + + {REQUEST_I_FRAME, ENC, H264|HEVC, + {0}, + {0}, + NULL, + msm_vidc_set_req_sync_frame}, + + {BIT_RATE, ENC, H264, + {ENH_LAYER_COUNT, BITRATE_MODE, ENTROPY_MODE, + ALL_INTRA, LOWLATENCY_MODE}, + {PEAK_BITRATE}, + msm_vidc_adjust_bitrate, + msm_vidc_set_bitrate}, + + {BIT_RATE, ENC, HEVC, + {ENH_LAYER_COUNT, BITRATE_MODE, ALL_INTRA, LOWLATENCY_MODE}, + {PEAK_BITRATE}, + msm_vidc_adjust_bitrate, + msm_vidc_set_bitrate}, + + {BITRATE_MODE, ENC, H264, + {0}, + {LTR_COUNT, I_FRAME_QP, P_FRAME_QP, + B_FRAME_QP, ENH_LAYER_COUNT, BIT_RATE, + MIN_QUALITY, VBV_DELAY, + PEAK_BITRATE, SLICE_MODE, CONTENT_ADAPTIVE_CODING, + BLUR_TYPES, LOWLATENCY_MODE}, + msm_vidc_adjust_bitrate_mode, + msm_vidc_set_u32_enum}, + + {BITRATE_MODE, ENC, HEVC, + {0}, + {LTR_COUNT, I_FRAME_QP, P_FRAME_QP, + B_FRAME_QP, CONSTANT_QUALITY, ENH_LAYER_COUNT, + BIT_RATE, MIN_QUALITY, VBV_DELAY, + PEAK_BITRATE, SLICE_MODE, CONTENT_ADAPTIVE_CODING, + BLUR_TYPES, LOWLATENCY_MODE}, + msm_vidc_adjust_bitrate_mode, + msm_vidc_set_u32_enum}, + + {BITRATE_MODE, ENC, HEIC, + {0}, + {CONSTANT_QUALITY}, + msm_vidc_adjust_bitrate_mode, + msm_vidc_set_u32_enum}, + + {CONSTANT_QUALITY, ENC, HEVC|HEIC, + {BITRATE_MODE}, + {0}, + NULL, + msm_vidc_set_constant_quality}, + + {GOP_SIZE, ENC, CODECS_ALL, + {ENH_LAYER_COUNT}, + {ALL_INTRA}, + msm_vidc_adjust_gop_size, + msm_vidc_set_gop_size}, + + {GOP_SIZE, ENC, HEIC, + {0}, + {0}, + NULL, + msm_vidc_set_u32}, + + {B_FRAME, ENC, H264|HEVC, + {ENH_LAYER_COUNT}, + {ALL_INTRA}, + msm_vidc_adjust_b_frame, + msm_vidc_set_u32}, + + {B_FRAME, ENC, HEIC, + {0}, + {0}, + NULL, + msm_vidc_set_u32}, + + {BLUR_TYPES, ENC, H264|HEVC, + {PIX_FMTS, BITRATE_MODE, MIN_QUALITY}, + {0}, + msm_vidc_adjust_blur_type, + msm_vidc_set_u32_enum}, + + {LOWLATENCY_MODE, ENC, H264 | HEVC, + {BITRATE_MODE, DELIVERY_MODE}, + {STAGE, BIT_RATE}, + msm_vidc_adjust_enc_lowlatency_mode, + NULL}, + + {LOWLATENCY_MODE, DEC, H264|HEVC|VP9|AV1, + {0}, + {STAGE}, + msm_vidc_adjust_dec_lowlatency_mode, + NULL}, + + {LTR_COUNT, ENC, H264|HEVC, + {BITRATE_MODE, ALL_INTRA}, + {0}, + msm_vidc_adjust_ltr_count, + msm_vidc_set_u32}, + + {USE_LTR, ENC, H264|HEVC, + {0}, + {0}, + msm_vidc_adjust_use_ltr, + msm_vidc_set_use_and_mark_ltr}, + + {MARK_LTR, ENC, H264|HEVC, + {0}, + {0}, + msm_vidc_adjust_mark_ltr, + msm_vidc_set_use_and_mark_ltr}, + + {AU_DELIMITER, ENC, H264|HEVC, + {0}, + {0}, + NULL, + msm_vidc_set_u32}, + + {CONTENT_ADAPTIVE_CODING, ENC, H264|HEVC, + {BITRATE_MODE, LAYER_ENABLE, LAYER_TYPE}, + {REQUEST_PREPROCESS}, + msm_vidc_adjust_brs, + msm_vidc_set_vbr_related_properties}, + + {REQUEST_PREPROCESS, ENC, H264|HEVC, + {CONTENT_ADAPTIVE_CODING}, + {0}, + msm_vidc_adjust_preprocess, + msm_vidc_set_preprocess}, + + {MIN_QUALITY, ENC, H264, + {BITRATE_MODE, ENH_LAYER_COUNT}, + {BLUR_TYPES}, + msm_vidc_adjust_min_quality, + msm_vidc_set_u32}, + + {MIN_QUALITY, ENC, HEVC, + {BITRATE_MODE, PIX_FMTS, ENH_LAYER_COUNT}, + {BLUR_TYPES}, + msm_vidc_adjust_min_quality, + msm_vidc_set_u32}, + + {VBV_DELAY, ENC, H264|HEVC, + {BITRATE_MODE}, + {0}, + NULL, + msm_vidc_set_cbr_related_properties}, + + {PEAK_BITRATE, ENC, H264|HEVC, + {BITRATE_MODE, BIT_RATE}, + {0}, + msm_vidc_adjust_peak_bitrate, + msm_vidc_set_cbr_related_properties}, + + {MIN_FRAME_QP, ENC, H264, + {0}, + {0}, + NULL, + msm_vidc_set_min_qp}, + + {MIN_FRAME_QP, ENC, HEVC|HEIC, + {PIX_FMTS}, + {0}, + msm_vidc_adjust_hevc_min_qp, + msm_vidc_set_min_qp}, + + {MAX_FRAME_QP, ENC, H264, + {0}, + {0}, + NULL, + msm_vidc_set_max_qp}, + + {MAX_FRAME_QP, ENC, HEVC|HEIC, + {PIX_FMTS}, + {0}, + msm_vidc_adjust_hevc_max_qp, + msm_vidc_set_max_qp}, + + {I_FRAME_QP, ENC, HEVC, + {PIX_FMTS, BITRATE_MODE}, + {0}, + msm_vidc_adjust_hevc_i_frame_qp, + msm_vidc_set_frame_qp}, + + {I_FRAME_QP, ENC, H264, + {BITRATE_MODE}, + {0}, + NULL, + msm_vidc_set_frame_qp}, + + {P_FRAME_QP, ENC, HEVC, + {PIX_FMTS, BITRATE_MODE}, + {0}, + msm_vidc_adjust_hevc_p_frame_qp, + msm_vidc_set_frame_qp}, + + {P_FRAME_QP, ENC, H264, + {BITRATE_MODE}, + {0}, + NULL, + msm_vidc_set_frame_qp}, + + {B_FRAME_QP, ENC, HEVC, + {PIX_FMTS, BITRATE_MODE}, + {0}, + msm_vidc_adjust_hevc_b_frame_qp, + msm_vidc_set_frame_qp}, + + {B_FRAME_QP, ENC, H264, + {BITRATE_MODE}, + {0}, + NULL, + msm_vidc_set_frame_qp}, + + {LAYER_TYPE, ENC, H264, + {0}, + {CONTENT_ADAPTIVE_CODING}}, + + {LAYER_ENABLE, ENC, H264|HEVC, + {0}, + {CONTENT_ADAPTIVE_CODING}}, + + {ENH_LAYER_COUNT, ENC, H264|HEVC, + {BITRATE_MODE}, + {GOP_SIZE, B_FRAME, BIT_RATE, MIN_QUALITY}, + msm_vidc_adjust_layer_count, + msm_vidc_set_layer_count_and_type}, + + {ENH_LAYER_COUNT, DEC, AV1, + {0}, + {0}, + NULL, + msm_vidc_set_u32}, + + {L0_BR, ENC, H264|HEVC, + {0}, + {0}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, + + {L1_BR, ENC, H264|HEVC, + {0}, + {0}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, + + {L2_BR, ENC, H264|HEVC, + {0}, + {0}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, + + {L3_BR, ENC, H264|HEVC, + {0}, + {0}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, + + {L4_BR, ENC, H264|HEVC, + {0}, + {0}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, + + {L5_BR, ENC, H264|HEVC, + {0}, + {0}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, + + {ENTROPY_MODE, ENC, H264, + {PROFILE}, + {BIT_RATE}, + msm_vidc_adjust_entropy_mode, + msm_vidc_set_u32}, + + {PROFILE, ENC, H264, + {0}, + {ENTROPY_MODE, TRANSFORM_8X8}, + NULL, + msm_vidc_set_u32_enum}, + + {PROFILE, DEC, H264, + {0}, + {ENTROPY_MODE}, + NULL, + msm_vidc_set_u32_enum}, + + {PROFILE, ENC|DEC, HEVC|HEIC, + {PIX_FMTS}, + {0}, + msm_vidc_adjust_profile, + msm_vidc_set_u32_enum}, + + {PROFILE, DEC, VP9|AV1, + {0}, + {0}, + NULL, + msm_vidc_set_u32_enum}, + + {LEVEL, DEC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_u32_enum}, + + {LEVEL, ENC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_level}, + + {AV1_TIER, DEC, AV1, + {0}, + {0}, + NULL, + msm_vidc_set_u32_enum}, + + {HEVC_TIER, ENC|DEC, HEVC|HEIC, + {0}, + {0}, + NULL, + msm_vidc_set_u32_enum}, + + {LF_MODE, ENC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_deblock_mode}, + + {SLICE_MODE, ENC, H264|HEVC, + {BITRATE_MODE, ALL_INTRA}, + {STAGE, DELIVERY_MODE}, + msm_vidc_adjust_slice_count, + msm_vidc_set_slice_count}, + + {SLICE_MODE, ENC, HEIC, + {0}, + {0}, + msm_vidc_adjust_slice_count, + msm_vidc_set_slice_count}, + + {TRANSFORM_8X8, ENC, H264, + {PROFILE}, + {0}, + msm_vidc_adjust_transform_8x8, + msm_vidc_set_u32}, + + {CHROMA_QP_INDEX_OFFSET, ENC, HEVC, + {0}, + {0}, + msm_vidc_adjust_chroma_qp_index_offset, + msm_vidc_set_chroma_qp_index_offset}, + + {DISPLAY_DELAY_ENABLE, DEC, H264|HEVC|VP9|AV1, + {0}, + {OUTPUT_ORDER}, + NULL, + NULL}, + + {DISPLAY_DELAY, DEC, H264|HEVC|VP9|AV1, + {0}, + {OUTPUT_ORDER}, + NULL, + NULL}, + + {OUTPUT_ORDER, DEC, H264|HEVC|VP9|AV1, + {THUMBNAIL_MODE, DISPLAY_DELAY, DISPLAY_DELAY_ENABLE}, + {0}, + msm_vidc_adjust_output_order, + msm_vidc_set_u32}, + + {INPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL, + {0}, + {0}, + msm_vidc_adjust_input_buf_host_max_count, + msm_vidc_set_u32}, + + {INPUT_BUF_HOST_MAX_COUNT, ENC, H264|HEVC, + {SUPER_FRAME}, + {0}, + msm_vidc_adjust_input_buf_host_max_count, + msm_vidc_set_u32}, + + {OUTPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL, + {0}, + {0}, + msm_vidc_adjust_output_buf_host_max_count, + msm_vidc_set_u32}, + + {OUTPUT_BUF_HOST_MAX_COUNT, ENC, H264|HEVC, + {SUPER_FRAME, DELIVERY_MODE}, + {0}, + msm_vidc_adjust_output_buf_host_max_count, + msm_vidc_set_u32}, + + {CONCEAL_COLOR_8BIT, DEC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_u32_packed}, + + {CONCEAL_COLOR_10BIT, DEC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_u32_packed}, + + {STAGE, ENC | DEC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_stage}, + + {STAGE, ENC, H264|HEVC, + {LOWLATENCY_MODE, SLICE_MODE}, + {0}, + NULL, + msm_vidc_set_stage}, + + {STAGE, DEC, H264|HEVC|VP9|AV1, + {LOWLATENCY_MODE}, + {0}, + NULL, + msm_vidc_set_stage}, + + {PIPE, DEC|ENC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_pipe}, + + {THUMBNAIL_MODE, DEC, CODECS_ALL, + {0}, + {OUTPUT_ORDER}, + NULL, + msm_vidc_set_u32}, + + {RAP_FRAME, DEC, CODECS_ALL, + {0}, + {0}, + NULL, + msm_vidc_set_u32}, + + {FIRMWARE_PRIORITY_OFFSET, DEC | ENC, CODECS_ALL, + {0}, + {0}, + NULL, + NULL}, + + {DPB_LIST, DEC, CODECS_ALL, + {0}, + {0}, + NULL, + NULL}, + + {DRAP, DEC, AV1, + {0}, + {0}, + NULL, + msm_vidc_set_u32}, + + {ALL_INTRA, ENC, H264|HEVC, + {GOP_SIZE, B_FRAME}, + {LTR_COUNT, SLICE_MODE, BIT_RATE}, + msm_vidc_adjust_all_intra, + NULL}, + + {GRID, ENC, HEIC, + {0}, + {0}, + NULL, + msm_vidc_set_u32}, +}; + +/* Default UBWC config for LPDDR5 */ +static struct msm_vidc_ubwc_config_data ubwc_config_pineapple[] = { + UBWC_CONFIG(8, 32, 16, 0, 1, 1, 1), +}; + +static struct msm_vidc_format_capability format_data_pineapple = { + .codec_info = codec_data_pineapple, + .codec_info_size = ARRAY_SIZE(codec_data_pineapple), + .color_format_info = color_format_data_pineapple, + .color_format_info_size = ARRAY_SIZE(color_format_data_pineapple), + .color_prim_info = color_primaries_data_pineapple, + .color_prim_info_size = ARRAY_SIZE(color_primaries_data_pineapple), + .transfer_char_info = transfer_char_data_pineapple, + .transfer_char_info_size = ARRAY_SIZE(transfer_char_data_pineapple), + .matrix_coeff_info = matrix_coeff_data_pineapple, + .matrix_coeff_info_size = ARRAY_SIZE(matrix_coeff_data_pineapple), +}; + +static const struct msm_vidc_platform_data pineapple_data = { + .core_data = core_data_pineapple, + .core_data_size = ARRAY_SIZE(core_data_pineapple), + .inst_cap_data = instance_cap_data_pineapple, + .inst_cap_data_size = ARRAY_SIZE(instance_cap_data_pineapple), + .inst_cap_dependency_data = instance_cap_dependency_data_pineapple, + .inst_cap_dependency_data_size = ARRAY_SIZE(instance_cap_dependency_data_pineapple), + .csc_data.vpe_csc_custom_bias_coeff = vpe_csc_custom_bias_coeff, + .csc_data.vpe_csc_custom_matrix_coeff = vpe_csc_custom_matrix_coeff, + .csc_data.vpe_csc_custom_limit_coeff = vpe_csc_custom_limit_coeff, + .ubwc_config = ubwc_config_pineapple, + .format_data = &format_data_pineapple, +}; + +int msm_vidc_pineapple_check_ddr_type(void) +{ + u32 ddr_type; + + ddr_type = of_fdt_get_ddrtype(); + if (ddr_type != DDR_TYPE_LPDDR5 && + ddr_type != DDR_TYPE_LPDDR5X) { + d_vpr_e("%s: wrong ddr type %d\n", __func__, ddr_type); + return -EINVAL; + } else { + d_vpr_h("%s: ddr type %d\n", __func__, ddr_type); + } + return 0; +} + +static int msm_vidc_init_data(struct msm_vidc_core *core) +{ + int rc = 0; + + if (!core || !core->platform) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + d_vpr_h("%s: initialize pineapple data\n", __func__); + + core->platform->data = pineapple_data; + rc = msm_vidc_pineapple_check_ddr_type(); + if (rc) + return rc; + + return rc; +} + +int msm_vidc_init_platform_pineapple(struct msm_vidc_core *core, struct device *dev) +{ + int rc = 0; + + rc = msm_vidc_init_data(core); + if (rc) + return rc; + + return 0; +} + +int msm_vidc_deinit_platform_pineapple(struct msm_vidc_core *core, struct device *dev) +{ + /* do nothing */ + return 0; +} + diff --git a/driver/variant/iris33/inc/hfi_buffer_iris33.h b/driver/variant/iris33/inc/hfi_buffer_iris33.h new file mode 100644 index 0000000000..5b835353b6 --- /dev/null +++ b/driver/variant/iris33/inc/hfi_buffer_iris33.h @@ -0,0 +1,1899 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) 2020-2022, The Linux Foundation. All rights reserved. + * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#ifndef __HFI_BUFFER_IRIS3_3__ +#define __HFI_BUFFER_IRIS3_3__ + +#include +#include "hfi_property.h" + +typedef u8 HFI_U8; +typedef s8 HFI_S8; +typedef u16 HFI_U16; +typedef s16 HFI_S16; +typedef u32 HFI_U32; +typedef s32 HFI_S32; +typedef u64 HFI_U64; +typedef HFI_U32 HFI_BOOL; + +#ifndef MIN +#define MIN(x, y) (((x) < (y)) ? (x) : (y)) +#endif + +#ifndef MAX +#define MAX(x, y) (((x) > (y)) ? (x) : (y)) +#endif + +#define HFI_ALIGNMENT_4096 (4096) + +#define BUF_SIZE_ALIGN_16 (16) +#define BUF_SIZE_ALIGN_32 (32) +#define BUF_SIZE_ALIGN_64 (64) +#define BUF_SIZE_ALIGN_128 (128) +#define BUF_SIZE_ALIGN_256 (256) +#define BUF_SIZE_ALIGN_512 (512) +#define BUF_SIZE_ALIGN_4096 (4096) + +#define HFI_ALIGN(a, b) (((b) & ((b) - 1)) ? (((a) + (b) - 1) / \ + (b) * (b)) : (((a) + (b) - 1) & (~((b) - 1)))) + +#define HFI_WORKMODE_1 1 +#define HFI_WORKMODE_2 2 + +#define HFI_DEFAULT_METADATA_STRIDE_MULTIPLE (64) +#define HFI_DEFAULT_METADATA_BUFFERHEIGHT_MULTIPLE (16) + +#define HFI_COLOR_FORMAT_YUV420_NV12_UBWC_Y_TILE_HEIGHT (8) +#define HFI_COLOR_FORMAT_YUV420_NV12_UBWC_Y_TILE_WIDTH (32) +#define HFI_COLOR_FORMAT_YUV420_NV12_UBWC_UV_TILE_HEIGHT (8) +#define HFI_COLOR_FORMAT_YUV420_NV12_UBWC_UV_TILE_WIDTH (16) +#define HFI_COLOR_FORMAT_YUV420_TP10_UBWC_Y_TILE_HEIGHT (4) +#define HFI_COLOR_FORMAT_YUV420_TP10_UBWC_Y_TILE_WIDTH (48) +#define HFI_COLOR_FORMAT_YUV420_TP10_UBWC_UV_TILE_HEIGHT (4) +#define HFI_COLOR_FORMAT_YUV420_TP10_UBWC_UV_TILE_WIDTH (24) +#define HFI_COLOR_FORMAT_RGBA8888_UBWC_TILE_HEIGHT (4) +#define HFI_COLOR_FORMAT_RGBA8888_UBWC_TILE_WIDTH (16) + +#define HFI_NV12_IL_CALC_Y_STRIDE(stride, frame_width, stride_multiple) \ + stride = HFI_ALIGN(frame_width, stride_multiple) + +#define HFI_NV12_IL_CALC_Y_BUFHEIGHT(buf_height, frame_height, \ + min_buf_height_multiple) buf_height = HFI_ALIGN(frame_height, \ + min_buf_height_multiple) + +#define HFI_NV12_IL_CALC_UV_STRIDE(stride, frame_width, stride_multiple) \ + stride = HFI_ALIGN(frame_width, stride_multiple) + +#define HFI_NV12_IL_CALC_UV_BUFHEIGHT(buf_height, frame_height, \ + min_buf_height_multiple) buf_height = HFI_ALIGN(((frame_height + 1) \ + >> 1), min_buf_height_multiple) + +#define HFI_NV12_IL_CALC_BUF_SIZE(buf_size, y_bufSize, y_stride, y_buf_height, \ + uv_buf_size, uv_stride, uv_buf_height) \ + y_bufSize = (y_stride * y_buf_height); \ + uv_buf_size = (uv_stride * uv_buf_height); \ + buf_size = HFI_ALIGN(y_bufSize + uv_buf_size, HFI_ALIGNMENT_4096) + +#define HFI_NV12_UBWC_IL_CALC_Y_BUF_SIZE(y_bufSize, y_stride, y_buf_height) \ + y_bufSize = HFI_ALIGN(y_stride * y_buf_height, HFI_ALIGNMENT_4096) + +#define HFI_NV12_UBWC_IL_CALC_UV_BUF_SIZE(uv_buf_size, \ + uv_stride, uv_buf_height) \ + uv_buf_size = HFI_ALIGN(uv_stride * uv_buf_height, HFI_ALIGNMENT_4096) + +#define HFI_NV12_UBWC_IL_CALC_BUF_SIZE_V2(buf_size,\ + frame_width, frame_height, y_stride_multiple,\ + y_buffer_height_multiple, uv_stride_multiple, \ + uv_buffer_height_multiple, y_metadata_stride_multiple, \ + y_metadata_buffer_height_multiple, \ + uv_metadata_stride_multiple, uv_metadata_buffer_height_multiple) \ + do \ + { \ + HFI_U32 y_buf_size, uv_buf_size, y_meta_size, uv_meta_size; \ + HFI_U32 stride, _height; \ + HFI_U32 half_height = (frame_height + 1) >> 1; \ + HFI_NV12_IL_CALC_Y_STRIDE(stride, frame_width,\ + y_stride_multiple); \ + HFI_NV12_IL_CALC_Y_BUFHEIGHT(_height, half_height,\ + y_buffer_height_multiple); \ + HFI_NV12_UBWC_IL_CALC_Y_BUF_SIZE(y_buf_size, stride, _height);\ + HFI_NV12_IL_CALC_UV_STRIDE(stride, frame_width, \ + uv_stride_multiple); \ + HFI_NV12_IL_CALC_UV_BUFHEIGHT(_height, half_height, \ + uv_buffer_height_multiple); \ + HFI_NV12_UBWC_IL_CALC_UV_BUF_SIZE(uv_buf_size, stride, _height);\ + HFI_UBWC_CALC_METADATA_PLANE_STRIDE(stride, frame_width,\ + y_metadata_stride_multiple, \ + HFI_COLOR_FORMAT_YUV420_NV12_UBWC_Y_TILE_WIDTH);\ + HFI_UBWC_METADATA_PLANE_BUFHEIGHT(_height, half_height, \ + y_metadata_buffer_height_multiple,\ + HFI_COLOR_FORMAT_YUV420_NV12_UBWC_Y_TILE_HEIGHT);\ + HFI_UBWC_METADATA_PLANE_BUFFER_SIZE(y_meta_size, stride, \ + _height); \ + HFI_UBWC_UV_METADATA_PLANE_STRIDE(stride, frame_width,\ + uv_metadata_stride_multiple, \ + HFI_COLOR_FORMAT_YUV420_NV12_UBWC_UV_TILE_WIDTH); \ + HFI_UBWC_UV_METADATA_PLANE_BUFHEIGHT(_height, half_height,\ + uv_metadata_buffer_height_multiple,\ + HFI_COLOR_FORMAT_YUV420_NV12_UBWC_UV_TILE_HEIGHT);\ + HFI_UBWC_METADATA_PLANE_BUFFER_SIZE(uv_meta_size, stride, \ + _height); \ + buf_size = (y_buf_size + uv_buf_size + y_meta_size + \ + uv_meta_size) << 1;\ + } while (0) + +#define HFI_YUV420_TP10_CALC_Y_STRIDE(stride, frame_width, stride_multiple) \ + stride = HFI_ALIGN(frame_width, 192); \ + stride = HFI_ALIGN(stride * 4 / 3, stride_multiple) + +#define HFI_YUV420_TP10_CALC_Y_BUFHEIGHT(buf_height, frame_height, \ + min_buf_height_multiple) \ + buf_height = HFI_ALIGN(frame_height, min_buf_height_multiple) + +#define HFI_YUV420_TP10_CALC_UV_STRIDE(stride, frame_width, stride_multiple) \ + stride = HFI_ALIGN(frame_width, 192); \ + stride = HFI_ALIGN(stride * 4 / 3, stride_multiple) + +#define HFI_YUV420_TP10_CALC_UV_BUFHEIGHT(buf_height, frame_height, \ + min_buf_height_multiple) \ + buf_height = HFI_ALIGN(((frame_height + 1) >> 1), \ + min_buf_height_multiple) + +#define HFI_YUV420_TP10_CALC_BUF_SIZE(buf_size, y_buf_size, y_stride,\ + y_buf_height, uv_buf_size, uv_stride, uv_buf_height) \ + y_buf_size = (y_stride * y_buf_height); \ + uv_buf_size = (uv_stride * uv_buf_height); \ + buf_size = y_buf_size + uv_buf_size + +#define HFI_YUV420_TP10_UBWC_CALC_Y_BUF_SIZE(y_buf_size, y_stride, \ + y_buf_height) \ + y_buf_size = HFI_ALIGN(y_stride * y_buf_height, HFI_ALIGNMENT_4096) + +#define HFI_YUV420_TP10_UBWC_CALC_UV_BUF_SIZE(uv_buf_size, uv_stride, \ + uv_buf_height) \ + uv_buf_size = HFI_ALIGN(uv_stride * uv_buf_height, HFI_ALIGNMENT_4096) + +#define HFI_YUV420_TP10_UBWC_CALC_BUF_SIZE(buf_size, y_stride, y_buf_height, \ + uv_stride, uv_buf_height, y_md_stride, y_md_height, uv_md_stride, \ + uv_md_height)\ + do \ + { \ + HFI_U32 y_data_size, uv_data_size, y_md_size, uv_md_size; \ + HFI_YUV420_TP10_UBWC_CALC_Y_BUF_SIZE(y_data_size, y_stride,\ + y_buf_height); \ + HFI_YUV420_TP10_UBWC_CALC_UV_BUF_SIZE(uv_data_size, uv_stride, \ + uv_buf_height); \ + HFI_UBWC_METADATA_PLANE_BUFFER_SIZE(y_md_size, y_md_stride, \ + y_md_height); \ + HFI_UBWC_METADATA_PLANE_BUFFER_SIZE(uv_md_size, uv_md_stride, \ + uv_md_height); \ + buf_size = y_data_size + uv_data_size + y_md_size + \ + uv_md_size; \ + } while (0) + +#define HFI_YUV420_P010_CALC_Y_STRIDE(stride, frame_width, stride_multiple) \ + stride = HFI_ALIGN(frame_width * 2, stride_multiple) + +#define HFI_YUV420_P010_CALC_Y_BUFHEIGHT(buf_height, frame_height, \ + min_buf_height_multiple) \ + buf_height = HFI_ALIGN(frame_height, min_buf_height_multiple) + +#define HFI_YUV420_P010_CALC_UV_STRIDE(stride, frame_width, stride_multiple) \ + stride = HFI_ALIGN(frame_width * 2, stride_multiple) + +#define HFI_YUV420_P010_CALC_UV_BUFHEIGHT(buf_height, frame_height, \ + min_buf_height_multiple) \ + buf_height = HFI_ALIGN(((frame_height + 1) >> 1), \ + min_buf_height_multiple) + +#define HFI_YUV420_P010_CALC_BUF_SIZE(buf_size, y_data_size, y_stride, \ + y_buf_height, uv_data_size, uv_stride, uv_buf_height) \ + do \ + { \ + y_data_size = HFI_ALIGN(y_stride * y_buf_height, \ + HFI_ALIGNMENT_4096);\ + uv_data_size = HFI_ALIGN(uv_stride * uv_buf_height, \ + HFI_ALIGNMENT_4096); \ + buf_size = y_data_size + uv_data_size; \ + } while (0) + +#define HFI_RGB888_CALC_STRIDE(stride, frame_width, stride_multiple) \ + stride = ((frame_width * 3) + stride_multiple - 1) & \ + (0xffffffff - (stride_multiple - 1)) + +#define HFI_RGB888_CALC_BUFHEIGHT(buf_height, frame_height, \ + min_buf_height_multiple) \ + buf_height = ((frame_height + min_buf_height_multiple - 1) & \ + (0xffffffff - (min_buf_height_multiple - 1))) + +#define HFI_RGB888_CALC_BUF_SIZE(buf_size, stride, buf_height) \ + buf_size = ((stride) * (buf_height)) + +#define HFI_RGBA8888_CALC_STRIDE(stride, frame_width, stride_multiple) \ + stride = HFI_ALIGN((frame_width << 2), stride_multiple) + +#define HFI_RGBA8888_CALC_BUFHEIGHT(buf_height, frame_height, \ + min_buf_height_multiple) \ + buf_height = HFI_ALIGN(frame_height, min_buf_height_multiple) + +#define HFI_RGBA8888_CALC_BUF_SIZE(buf_size, stride, buf_height) \ + buf_size = (stride) * (buf_height) + +#define HFI_RGBA8888_UBWC_CALC_DATA_PLANE_BUF_SIZE(buf_size, stride, \ + buf_height) \ + buf_size = HFI_ALIGN((stride) * (buf_height), HFI_ALIGNMENT_4096) + +#define HFI_RGBA8888_UBWC_BUF_SIZE(buf_size, data_buf_size, \ + metadata_buffer_size, stride, buf_height, _metadata_tride, \ + _metadata_buf_height) \ + HFI_RGBA8888_UBWC_CALC_DATA_PLANE_BUF_SIZE(data_buf_size, \ + stride, buf_height); \ + HFI_UBWC_METADATA_PLANE_BUFFER_SIZE(metadata_buffer_size, \ + _metadata_tride, _metadata_buf_height); \ + buf_size = data_buf_size + metadata_buffer_size + +#define HFI_UBWC_CALC_METADATA_PLANE_STRIDE(metadata_stride, frame_width,\ + metadata_stride_multiple, tile_width_in_pels) \ + metadata_stride = HFI_ALIGN(((frame_width + (tile_width_in_pels - 1)) /\ + tile_width_in_pels), metadata_stride_multiple) + +#define HFI_UBWC_METADATA_PLANE_BUFHEIGHT(metadata_buf_height, frame_height, \ + metadata_height_multiple, tile_height_in_pels) \ + metadata_buf_height = HFI_ALIGN(((frame_height + \ + (tile_height_in_pels - 1)) / tile_height_in_pels), \ + metadata_height_multiple) + +#define HFI_UBWC_UV_METADATA_PLANE_STRIDE(metadata_stride, frame_width, \ + metadata_stride_multiple, tile_width_in_pels) \ + metadata_stride = HFI_ALIGN(((((frame_width + 1) >> 1) +\ + (tile_width_in_pels - 1)) / tile_width_in_pels), \ + metadata_stride_multiple) + +#define HFI_UBWC_UV_METADATA_PLANE_BUFHEIGHT(metadata_buf_height, frame_height,\ + metadata_height_multiple, tile_height_in_pels) \ + metadata_buf_height = HFI_ALIGN(((((frame_height + 1) >> 1) + \ + (tile_height_in_pels - 1)) / tile_height_in_pels), \ + metadata_height_multiple) + +#define HFI_UBWC_METADATA_PLANE_BUFFER_SIZE(buffer_size, _metadata_tride, \ + _metadata_buf_height) \ + buffer_size = HFI_ALIGN(_metadata_tride * _metadata_buf_height, \ + HFI_ALIGNMENT_4096) + +#define BUFFER_ALIGNMENT_512_BYTES 512 +#define BUFFER_ALIGNMENT_256_BYTES 256 +#define BUFFER_ALIGNMENT_128_BYTES 128 +#define BUFFER_ALIGNMENT_64_BYTES 64 +#define BUFFER_ALIGNMENT_32_BYTES 32 +#define BUFFER_ALIGNMENT_16_BYTES 16 +#define BUFFER_ALIGNMENT_8_BYTES 8 +#define BUFFER_ALIGNMENT_4_BYTES 4 + +#define VENUS_DMA_ALIGNMENT BUFFER_ALIGNMENT_256_BYTES + +#define MAX_FE_NBR_CTRL_LCU64_LINE_BUFFER_SIZE 64 +#define MAX_FE_NBR_CTRL_LCU32_LINE_BUFFER_SIZE 64 +#define MAX_FE_NBR_CTRL_LCU16_LINE_BUFFER_SIZE 64 +#define MAX_FE_NBR_DATA_LUMA_LINE_BUFFER_SIZE 640 +#define MAX_FE_NBR_DATA_CB_LINE_BUFFER_SIZE 320 +#define MAX_FE_NBR_DATA_CR_LINE_BUFFER_SIZE 320 + +#define MAX_SE_NBR_CTRL_LCU64_LINE_BUFFER_SIZE (128 / 8) +#define MAX_SE_NBR_CTRL_LCU32_LINE_BUFFER_SIZE (128 / 8) +#define MAX_SE_NBR_CTRL_LCU16_LINE_BUFFER_SIZE (128 / 8) + +#define MAX_PE_NBR_DATA_LCU64_LINE_BUFFER_SIZE (64 * 2 * 3) +#define MAX_PE_NBR_DATA_LCU32_LINE_BUFFER_SIZE (32 * 2 * 3) +#define MAX_PE_NBR_DATA_LCU16_LINE_BUFFER_SIZE (16 * 2 * 3) + +#define MAX_TILE_COLUMNS 32 + +#define SIZE_VPSS_LB(Size, frame_width, frame_height, num_vpp_pipes) \ + do \ + { \ + HFI_U32 vpss_4tap_top_buffer_size, vpss_div2_top_buffer_size, \ + vpss_4tap_left_buffer_size, vpss_div2_left_buffer_size; \ + HFI_U32 opb_wr_top_line_luma_buffer_size, \ + opb_wr_top_line_chroma_buffer_size, \ + opb_lb_wr_llb_y_buffer_size,\ + opb_lb_wr_llb_uv_buffer_size; \ + HFI_U32 macrotiling_size; \ + vpss_4tap_top_buffer_size = vpss_div2_top_buffer_size = \ + vpss_4tap_left_buffer_size = vpss_div2_left_buffer_size = 0; \ + macrotiling_size = 32; \ + opb_wr_top_line_luma_buffer_size = HFI_ALIGN(frame_width, \ + macrotiling_size) / macrotiling_size * 256; \ + opb_wr_top_line_luma_buffer_size = \ + HFI_ALIGN(opb_wr_top_line_luma_buffer_size, \ + VENUS_DMA_ALIGNMENT) + (MAX_TILE_COLUMNS - 1) * 256; \ + opb_wr_top_line_luma_buffer_size = \ + MAX(opb_wr_top_line_luma_buffer_size, (32 * \ + HFI_ALIGN(frame_height, 8))); \ + opb_wr_top_line_chroma_buffer_size = \ + opb_wr_top_line_luma_buffer_size;\ + opb_lb_wr_llb_uv_buffer_size = opb_lb_wr_llb_y_buffer_size = \ + HFI_ALIGN((HFI_ALIGN(frame_height, 8) / (4 / 2)) * 64,\ + BUFFER_ALIGNMENT_32_BYTES); \ + Size = num_vpp_pipes * 2 * (vpss_4tap_top_buffer_size + \ + vpss_div2_top_buffer_size) + \ + 2 * (vpss_4tap_left_buffer_size + \ + vpss_div2_left_buffer_size) + \ + opb_wr_top_line_luma_buffer_size + \ + opb_wr_top_line_chroma_buffer_size + \ + opb_lb_wr_llb_uv_buffer_size + \ + opb_lb_wr_llb_y_buffer_size; \ + } while (0) + +#define VPP_CMD_MAX_SIZE (1 << 20) +#define NUM_HW_PIC_BUF 32 +#define BIN_BUFFER_THRESHOLD (1280 * 736) +#define H264D_MAX_SLICE 1800 +#define SIZE_H264D_BUFTAB_T (256) +#define SIZE_H264D_HW_PIC_T (1 << 11) +#define SIZE_H264D_BSE_CMD_PER_BUF (32 * 4) +#define SIZE_H264D_VPP_CMD_PER_BUF (512) + +#define SIZE_H264D_LB_FE_TOP_DATA(frame_width, frame_height) \ + (MAX_FE_NBR_DATA_LUMA_LINE_BUFFER_SIZE * HFI_ALIGN(frame_width, 16) * 3) + +#define SIZE_H264D_LB_FE_TOP_CTRL(frame_width, frame_height) \ + (MAX_FE_NBR_CTRL_LCU64_LINE_BUFFER_SIZE * ((frame_width + 15) >> 4)) + +#define SIZE_H264D_LB_FE_LEFT_CTRL(frame_width, frame_height) \ + (MAX_FE_NBR_CTRL_LCU64_LINE_BUFFER_SIZE * ((frame_height + 15) >> 4)) + +#define SIZE_H264D_LB_SE_TOP_CTRL(frame_width, frame_height) \ + (MAX_SE_NBR_CTRL_LCU64_LINE_BUFFER_SIZE * ((frame_width + 15) >> 4)) + +#define SIZE_H264D_LB_SE_LEFT_CTRL(frame_width, frame_height) \ + (MAX_SE_NBR_CTRL_LCU64_LINE_BUFFER_SIZE * ((frame_height + 15) >> 4)) + +#define SIZE_H264D_LB_PE_TOP_DATA(frame_width, frame_height) \ + (MAX_PE_NBR_DATA_LCU64_LINE_BUFFER_SIZE * ((frame_width + 15) >> 4)) + +#define SIZE_H264D_LB_VSP_TOP(frame_width, frame_height) \ + ((((frame_width + 15) >> 4) << 7)) + +#define SIZE_H264D_LB_RECON_DMA_METADATA_WR(frame_width, frame_height) \ + (HFI_ALIGN(frame_height, 16) * 32) + +#define SIZE_H264D_QP(frame_width, frame_height) \ + (((frame_width + 63) >> 6) * ((frame_height + 63) >> 6) * 128) + +#define SIZE_HW_PIC(size_per_buf) \ + (NUM_HW_PIC_BUF * size_per_buf) + +#define SIZE_H264D_BSE_CMD_BUF(_size, frame_width, frame_height) \ + do \ + { \ + HFI_U32 _height = HFI_ALIGN(frame_height, \ + BUFFER_ALIGNMENT_32_BYTES); \ + _size = MIN((((_height + 15) >> 4) * 48), H264D_MAX_SLICE) *\ + SIZE_H264D_BSE_CMD_PER_BUF; \ + } while (0) + +#define SIZE_H264D_VPP_CMD_BUF(_size, frame_width, frame_height) \ + do \ + { \ + HFI_U32 _height = HFI_ALIGN(frame_height, \ + BUFFER_ALIGNMENT_32_BYTES); \ + _size = MIN((((_height + 15) >> 4) * 48), H264D_MAX_SLICE) * \ + SIZE_H264D_VPP_CMD_PER_BUF; \ + if (_size > VPP_CMD_MAX_SIZE) { _size = VPP_CMD_MAX_SIZE; } \ + } while (0) + +#define HFI_BUFFER_COMV_H264D(coMV_size, frame_width, \ + frame_height, _comv_bufcount) \ + do \ + { \ + HFI_U32 frame_width_in_mbs = ((frame_width + 15) >> 4); \ + HFI_U32 frame_height_in_mbs = ((frame_height + 15) >> 4); \ + HFI_U32 col_mv_aligned_width = (frame_width_in_mbs << 7); \ + HFI_U32 col_zero_aligned_width = (frame_width_in_mbs << 2); \ + HFI_U32 col_zero_size = 0, size_colloc = 0; \ + col_mv_aligned_width = HFI_ALIGN(col_mv_aligned_width, \ + BUFFER_ALIGNMENT_16_BYTES); \ + col_zero_aligned_width = HFI_ALIGN(col_zero_aligned_width, \ + BUFFER_ALIGNMENT_16_BYTES); \ + col_zero_size = col_zero_aligned_width * \ + ((frame_height_in_mbs + 1) >> 1); \ + col_zero_size = HFI_ALIGN(col_zero_size, \ + BUFFER_ALIGNMENT_64_BYTES); \ + col_zero_size <<= 1; \ + col_zero_size = HFI_ALIGN(col_zero_size, \ + BUFFER_ALIGNMENT_512_BYTES); \ + size_colloc = col_mv_aligned_width * ((frame_height_in_mbs + \ + 1) >> 1); \ + size_colloc = HFI_ALIGN(size_colloc, \ + BUFFER_ALIGNMENT_64_BYTES); \ + size_colloc <<= 1; \ + size_colloc = HFI_ALIGN(size_colloc, \ + BUFFER_ALIGNMENT_512_BYTES); \ + size_colloc += (col_zero_size + SIZE_H264D_BUFTAB_T * 2); \ + coMV_size = size_colloc * (_comv_bufcount); \ + coMV_size += BUFFER_ALIGNMENT_512_BYTES; \ + } while (0) + +#define HFI_BUFFER_NON_COMV_H264D(_size, frame_width, frame_height, \ + num_vpp_pipes) \ + do \ + { \ + HFI_U32 _size_bse, _size_vpp; \ + SIZE_H264D_BSE_CMD_BUF(_size_bse, frame_width, frame_height); \ + SIZE_H264D_VPP_CMD_BUF(_size_vpp, frame_width, frame_height); \ + _size = HFI_ALIGN(_size_bse, VENUS_DMA_ALIGNMENT) + \ + HFI_ALIGN(_size_vpp, VENUS_DMA_ALIGNMENT) + \ + HFI_ALIGN(SIZE_HW_PIC(SIZE_H264D_HW_PIC_T), \ + VENUS_DMA_ALIGNMENT); \ + _size = HFI_ALIGN(_size, VENUS_DMA_ALIGNMENT); \ + } while (0) + +#define HFI_BUFFER_LINE_H264D(_size, frame_width, frame_height, \ + is_opb, num_vpp_pipes) \ + do \ + { \ + HFI_U32 vpss_lb_size = 0; \ + _size = HFI_ALIGN(SIZE_H264D_LB_FE_TOP_DATA(frame_width, \ + frame_height), VENUS_DMA_ALIGNMENT) + \ + HFI_ALIGN(SIZE_H264D_LB_FE_TOP_CTRL(frame_width, \ + frame_height), VENUS_DMA_ALIGNMENT) + \ + HFI_ALIGN(SIZE_H264D_LB_FE_LEFT_CTRL(frame_width, \ + frame_height), VENUS_DMA_ALIGNMENT) * num_vpp_pipes + \ + HFI_ALIGN(SIZE_H264D_LB_SE_TOP_CTRL(frame_width, \ + frame_height), VENUS_DMA_ALIGNMENT) + \ + HFI_ALIGN(SIZE_H264D_LB_SE_LEFT_CTRL(frame_width, \ + frame_height), VENUS_DMA_ALIGNMENT) * \ + num_vpp_pipes + \ + HFI_ALIGN(SIZE_H264D_LB_PE_TOP_DATA(frame_width, \ + frame_height), VENUS_DMA_ALIGNMENT) + \ + HFI_ALIGN(SIZE_H264D_LB_VSP_TOP(frame_width, \ + frame_height), VENUS_DMA_ALIGNMENT) + \ + HFI_ALIGN(SIZE_H264D_LB_RECON_DMA_METADATA_WR\ + (frame_width, frame_height), \ + VENUS_DMA_ALIGNMENT) * 2 + HFI_ALIGN(SIZE_H264D_QP\ + (frame_width, frame_height), VENUS_DMA_ALIGNMENT); \ + _size = HFI_ALIGN(_size, VENUS_DMA_ALIGNMENT); \ + if (is_opb) \ + { \ + SIZE_VPSS_LB(vpss_lb_size, frame_width, frame_height, \ + num_vpp_pipes); \ + } \ + _size = HFI_ALIGN((_size + vpss_lb_size), \ + VENUS_DMA_ALIGNMENT); \ + } while (0) + +#define H264_CABAC_HDR_RATIO_HD_TOT 1 +#define H264_CABAC_RES_RATIO_HD_TOT 3 + +#define SIZE_H264D_HW_BIN_BUFFER(_size, frame_width, frame_height, \ + delay, num_vpp_pipes) \ + do \ + { \ + HFI_U32 size_yuv, size_bin_hdr, size_bin_res; \ + size_yuv = ((frame_width * frame_height) <= \ + BIN_BUFFER_THRESHOLD) ?\ + ((BIN_BUFFER_THRESHOLD * 3) >> 1) : \ + ((frame_width * frame_height * 3) >> 1); \ + size_bin_hdr = size_yuv * H264_CABAC_HDR_RATIO_HD_TOT; \ + size_bin_res = size_yuv * H264_CABAC_RES_RATIO_HD_TOT; \ + size_bin_hdr = size_bin_hdr * (((((HFI_U32)(delay)) & 31) /\ + 10) + 2) / 2; \ + size_bin_res = size_bin_res * (((((HFI_U32)(delay)) & 31) /\ + 10) + 2) / 2; \ + size_bin_hdr = HFI_ALIGN(size_bin_hdr / num_vpp_pipes,\ + VENUS_DMA_ALIGNMENT) * num_vpp_pipes; \ + size_bin_res = HFI_ALIGN(size_bin_res / num_vpp_pipes, \ + VENUS_DMA_ALIGNMENT) * num_vpp_pipes; \ + _size = size_bin_hdr + size_bin_res; \ + } while (0) + +#define HFI_BUFFER_BIN_H264D(_size, frame_width, frame_height, is_interlaced, \ + delay, num_vpp_pipes) \ + do \ + { \ + HFI_U32 n_aligned_w = HFI_ALIGN(frame_width, \ + BUFFER_ALIGNMENT_16_BYTES);\ + HFI_U32 n_aligned_h = HFI_ALIGN(frame_height, \ + BUFFER_ALIGNMENT_16_BYTES); \ + if (!is_interlaced) \ + { \ + SIZE_H264D_HW_BIN_BUFFER(_size, n_aligned_w, \ + n_aligned_h, delay, num_vpp_pipes); \ + } \ + else \ + { \ + _size = 0; \ + } \ + } while (0) + +#define NUM_SLIST_BUF_H264 (256 + 32) +#define SIZE_SLIST_BUF_H264 (512) +#define SIZE_SEI_USERDATA (4096) +#define H264_NUM_FRM_INFO (66) +#define H264_DISPLAY_BUF_SIZE (3328) +#define SIZE_DOLBY_RPU_METADATA (41 * 1024) +#define HFI_BUFFER_PERSIST_H264D(_size, rpu_enabled) \ + _size = HFI_ALIGN((SIZE_SLIST_BUF_H264 * NUM_SLIST_BUF_H264 + \ + H264_DISPLAY_BUF_SIZE * H264_NUM_FRM_INFO + \ + NUM_HW_PIC_BUF * SIZE_SEI_USERDATA + \ + rpu_enabled * NUM_HW_PIC_BUF * SIZE_DOLBY_RPU_METADATA), \ + VENUS_DMA_ALIGNMENT) + +#define LCU_MAX_SIZE_PELS 64 +#define LCU_MIN_SIZE_PELS 16 + +#define H265D_MAX_SLICE 1200 +#define SIZE_H265D_HW_PIC_T SIZE_H264D_HW_PIC_T +#define SIZE_H265D_BSE_CMD_PER_BUF (16 * sizeof(HFI_U32)) +#define SIZE_H265D_VPP_CMD_PER_BUF (256) + +#define SIZE_H265D_LB_FE_TOP_DATA(frame_width, frame_height) \ + (MAX_FE_NBR_DATA_LUMA_LINE_BUFFER_SIZE * \ + (HFI_ALIGN(frame_width, 64) + 8) * 2) + +#define SIZE_H265D_LB_FE_TOP_CTRL(frame_width, frame_height) \ + (MAX_FE_NBR_CTRL_LCU64_LINE_BUFFER_SIZE * \ + (HFI_ALIGN(frame_width, LCU_MAX_SIZE_PELS) / LCU_MIN_SIZE_PELS)) + +#define SIZE_H265D_LB_FE_LEFT_CTRL(frame_width, frame_height) \ + (MAX_FE_NBR_CTRL_LCU64_LINE_BUFFER_SIZE * \ + (HFI_ALIGN(frame_height, LCU_MAX_SIZE_PELS) / LCU_MIN_SIZE_PELS)) + +#define SIZE_H265D_LB_SE_TOP_CTRL(frame_width, frame_height) \ + ((LCU_MAX_SIZE_PELS / 8 * (128 / 8)) * ((frame_width + 15) >> 4)) + +#define SIZE_H265D_LB_SE_LEFT_CTRL(frame_width, frame_height) \ + (MAX(((frame_height + 16 - 1) / 8) * \ + MAX_SE_NBR_CTRL_LCU16_LINE_BUFFER_SIZE, \ + MAX(((frame_height + 32 - 1) / 8) * \ + MAX_SE_NBR_CTRL_LCU32_LINE_BUFFER_SIZE, \ + ((frame_height + 64 - 1) / 8) * \ + MAX_SE_NBR_CTRL_LCU64_LINE_BUFFER_SIZE))) + +#define SIZE_H265D_LB_PE_TOP_DATA(frame_width, frame_height) \ + (MAX_PE_NBR_DATA_LCU64_LINE_BUFFER_SIZE * (HFI_ALIGN(frame_width, \ + LCU_MIN_SIZE_PELS) / LCU_MIN_SIZE_PELS)) + +#define SIZE_H265D_LB_VSP_TOP(frame_width, frame_height) \ + (((frame_width + 63) >> 6) * 128) + +#define SIZE_H265D_LB_VSP_LEFT(frame_width, frame_height) \ + (((frame_height + 63) >> 6) * 128) + +#define SIZE_H265D_LB_RECON_DMA_METADATA_WR(frame_width, frame_height) \ + SIZE_H264D_LB_RECON_DMA_METADATA_WR(frame_width, frame_height) + +#define SIZE_H265D_QP(frame_width, frame_height) \ + SIZE_H264D_QP(frame_width, frame_height) + +#define SIZE_H265D_BSE_CMD_BUF(_size, frame_width, frame_height)\ + do \ + { \ + _size = HFI_ALIGN(((HFI_ALIGN(frame_width, \ + LCU_MAX_SIZE_PELS) / LCU_MIN_SIZE_PELS) * \ + (HFI_ALIGN(frame_height, LCU_MAX_SIZE_PELS) /\ + LCU_MIN_SIZE_PELS)) * NUM_HW_PIC_BUF, VENUS_DMA_ALIGNMENT); \ + _size = MIN(_size, H265D_MAX_SLICE + 1); \ + _size = 2 * _size * SIZE_H265D_BSE_CMD_PER_BUF; \ + } while (0) + +#define SIZE_H265D_VPP_CMD_BUF(_size, frame_width, frame_height) \ + do \ + { \ + _size = HFI_ALIGN(((HFI_ALIGN(frame_width, LCU_MAX_SIZE_PELS) /\ + LCU_MIN_SIZE_PELS) * (HFI_ALIGN(frame_height, \ + LCU_MAX_SIZE_PELS) / LCU_MIN_SIZE_PELS)) * \ + NUM_HW_PIC_BUF, VENUS_DMA_ALIGNMENT); \ + _size = MIN(_size, H265D_MAX_SLICE + 1); \ + _size = HFI_ALIGN(_size, 4); \ + _size = 2 * _size * SIZE_H265D_VPP_CMD_PER_BUF; \ + if (_size > VPP_CMD_MAX_SIZE) \ + { \ + _size = VPP_CMD_MAX_SIZE; \ + } \ + } while (0) + +#define HFI_BUFFER_COMV_H265D(_size, frame_width, frame_height, \ + _comv_bufcount) \ + do \ + { \ + _size = HFI_ALIGN(((((frame_width + 15) >> 4) * \ + ((frame_height + 15) >> 4)) << 8), \ + BUFFER_ALIGNMENT_512_BYTES); \ + _size *= _comv_bufcount; \ + _size += BUFFER_ALIGNMENT_512_BYTES; \ + } while (0) + +#define HDR10_HIST_EXTRADATA_SIZE (4 * 1024) + +#define HFI_BUFFER_NON_COMV_H265D(_size, frame_width, frame_height, \ + num_vpp_pipes) \ + do \ + { \ + HFI_U32 _size_bse, _size_vpp; \ + SIZE_H265D_BSE_CMD_BUF(_size_bse, frame_width, \ + frame_height); \ + SIZE_H265D_VPP_CMD_BUF(_size_vpp, frame_width, \ + frame_height); \ + _size = HFI_ALIGN(_size_bse, VENUS_DMA_ALIGNMENT) + \ + HFI_ALIGN(_size_vpp, VENUS_DMA_ALIGNMENT) + \ + HFI_ALIGN(NUM_HW_PIC_BUF * 20 * 22 * 4, \ + VENUS_DMA_ALIGNMENT) + \ + HFI_ALIGN(2 * sizeof(HFI_U16) * \ + (HFI_ALIGN(frame_width, LCU_MAX_SIZE_PELS) / \ + LCU_MIN_SIZE_PELS) * (HFI_ALIGN(frame_height, \ + LCU_MAX_SIZE_PELS) / LCU_MIN_SIZE_PELS), \ + VENUS_DMA_ALIGNMENT) + \ + HFI_ALIGN(SIZE_HW_PIC(SIZE_H265D_HW_PIC_T), \ + VENUS_DMA_ALIGNMENT) + \ + HDR10_HIST_EXTRADATA_SIZE; \ + _size = HFI_ALIGN(_size, VENUS_DMA_ALIGNMENT); \ + } while (0) + +#define HFI_BUFFER_LINE_H265D(_size, frame_width, frame_height, \ + is_opb, num_vpp_pipes) \ + do \ + { \ + HFI_U32 vpss_lb_size = 0; \ + _size = HFI_ALIGN(SIZE_H265D_LB_FE_TOP_DATA(frame_width, \ + frame_height), VENUS_DMA_ALIGNMENT) + \ + HFI_ALIGN(SIZE_H265D_LB_FE_TOP_CTRL(frame_width, \ + frame_height), VENUS_DMA_ALIGNMENT) + \ + HFI_ALIGN(SIZE_H265D_LB_FE_LEFT_CTRL(frame_width, \ + frame_height), VENUS_DMA_ALIGNMENT) * num_vpp_pipes + \ + HFI_ALIGN(SIZE_H265D_LB_SE_LEFT_CTRL(frame_width, \ + frame_height), VENUS_DMA_ALIGNMENT) * num_vpp_pipes + \ + HFI_ALIGN(SIZE_H265D_LB_SE_TOP_CTRL(frame_width, \ + frame_height), VENUS_DMA_ALIGNMENT) + \ + HFI_ALIGN(SIZE_H265D_LB_PE_TOP_DATA(frame_width, \ + frame_height), VENUS_DMA_ALIGNMENT) + \ + HFI_ALIGN(SIZE_H265D_LB_VSP_TOP(frame_width, \ + frame_height), VENUS_DMA_ALIGNMENT) + \ + HFI_ALIGN(SIZE_H265D_LB_VSP_LEFT(frame_width, \ + frame_height), VENUS_DMA_ALIGNMENT) * num_vpp_pipes + \ + HFI_ALIGN(SIZE_H265D_LB_RECON_DMA_METADATA_WR\ + (frame_width, frame_height), \ + VENUS_DMA_ALIGNMENT) * 4 + \ + HFI_ALIGN(SIZE_H265D_QP(frame_width, frame_height),\ + VENUS_DMA_ALIGNMENT); \ + if (is_opb) \ + { \ + SIZE_VPSS_LB(vpss_lb_size, frame_width, frame_height,\ + num_vpp_pipes); \ + } \ + _size = HFI_ALIGN((_size + vpss_lb_size), \ + VENUS_DMA_ALIGNMENT); \ + } while (0) + +#define H265_CABAC_HDR_RATIO_HD_TOT 2 +#define H265_CABAC_RES_RATIO_HD_TOT 2 + +#define SIZE_H265D_HW_BIN_BUFFER(_size, frame_width, frame_height, \ + delay, num_vpp_pipes) \ + do \ + { \ + HFI_U32 size_yuv, size_bin_hdr, size_bin_res; \ + size_yuv = ((frame_width * frame_height) <= \ + BIN_BUFFER_THRESHOLD) ? \ + ((BIN_BUFFER_THRESHOLD * 3) >> 1) : \ + ((frame_width * frame_height * 3) >> 1); \ + size_bin_hdr = size_yuv * H265_CABAC_HDR_RATIO_HD_TOT; \ + size_bin_res = size_yuv * H265_CABAC_RES_RATIO_HD_TOT; \ + size_bin_hdr = size_bin_hdr * \ + (((((HFI_U32)(delay)) & 31) / 10) + 2) / 2; \ + size_bin_res = size_bin_res * \ + (((((HFI_U32)(delay)) & 31) / 10) + 2) / 2; \ + size_bin_hdr = HFI_ALIGN(size_bin_hdr / \ + num_vpp_pipes, VENUS_DMA_ALIGNMENT) * \ + num_vpp_pipes; \ + size_bin_res = HFI_ALIGN(size_bin_res / num_vpp_pipes,\ + VENUS_DMA_ALIGNMENT) * num_vpp_pipes; \ + _size = size_bin_hdr + size_bin_res; \ + } while (0) + +#define HFI_BUFFER_BIN_H265D(_size, frame_width, frame_height, \ + is_interlaced, delay, num_vpp_pipes) \ + do \ + { \ + HFI_U32 n_aligned_w = HFI_ALIGN(frame_width, \ + BUFFER_ALIGNMENT_16_BYTES); \ + HFI_U32 n_aligned_h = HFI_ALIGN(frame_height, \ + BUFFER_ALIGNMENT_16_BYTES); \ + if (!is_interlaced) \ + { \ + SIZE_H265D_HW_BIN_BUFFER(_size, n_aligned_w, \ + n_aligned_h, delay, num_vpp_pipes); \ + } \ + else \ + { \ + _size = 0; \ + } \ + } while (0) + +#define SIZE_SLIST_BUF_H265 (1 << 10) +#define NUM_SLIST_BUF_H265 (80 + 20) +#define H265_NUM_TILE_COL 32 +#define H265_NUM_TILE_ROW 128 +#define H265_NUM_TILE (H265_NUM_TILE_ROW * H265_NUM_TILE_COL + 1) +#define H265_NUM_FRM_INFO (48) +#define H265_DISPLAY_BUF_SIZE (3072) +#define HFI_BUFFER_PERSIST_H265D(_size, rpu_enabled) \ + _size = HFI_ALIGN((SIZE_SLIST_BUF_H265 * NUM_SLIST_BUF_H265 + \ + H265_NUM_FRM_INFO * H265_DISPLAY_BUF_SIZE + \ + H265_NUM_TILE * sizeof(HFI_U32) + NUM_HW_PIC_BUF * SIZE_SEI_USERDATA + \ + rpu_enabled * NUM_HW_PIC_BUF * SIZE_DOLBY_RPU_METADATA),\ + VENUS_DMA_ALIGNMENT) + +#define SIZE_VPXD_LB_FE_LEFT_CTRL(frame_width, frame_height) \ + MAX(((frame_height + 15) >> 4) * \ + MAX_FE_NBR_CTRL_LCU16_LINE_BUFFER_SIZE, \ + MAX(((frame_height + 31) >> 5) * \ + MAX_FE_NBR_CTRL_LCU32_LINE_BUFFER_SIZE, \ + ((frame_height + 63) >> 6) * MAX_FE_NBR_CTRL_LCU64_LINE_BUFFER_SIZE)) +#define SIZE_VPXD_LB_FE_TOP_CTRL(frame_width, frame_height) \ + (((HFI_ALIGN(frame_width, 64) + 8) * 10 * 2)) +#define SIZE_VPXD_LB_SE_TOP_CTRL(frame_width, frame_height) \ + (((frame_width + 15) >> 4) * MAX_FE_NBR_CTRL_LCU16_LINE_BUFFER_SIZE) +#define SIZE_VPXD_LB_SE_LEFT_CTRL(frame_width, frame_height) \ + MAX(((frame_height + 15) >> 4) * \ + MAX_SE_NBR_CTRL_LCU16_LINE_BUFFER_SIZE,\ + MAX(((frame_height + 31) >> 5) * \ + MAX_SE_NBR_CTRL_LCU32_LINE_BUFFER_SIZE, \ + ((frame_height + 63) >> 6) * MAX_SE_NBR_CTRL_LCU64_LINE_BUFFER_SIZE)) +#define SIZE_VPXD_LB_RECON_DMA_METADATA_WR(frame_width, frame_height) \ + HFI_ALIGN((HFI_ALIGN(frame_height, 8) / (4 / 2)) * 64,\ + BUFFER_ALIGNMENT_32_BYTES) +#define SIZE_MP2D_LB_FE_TOP_DATA(frame_width, frame_height) \ + ((HFI_ALIGN(frame_width, 16) + 8) * 10 * 2) +#define SIZE_VP9D_LB_FE_TOP_DATA(frame_width, frame_height) \ + ((HFI_ALIGN(HFI_ALIGN(frame_width, 8), 64) + 8) * 10 * 2) +#define SIZE_MP2D_LB_PE_TOP_DATA(frame_width, frame_height) \ + ((HFI_ALIGN(frame_width, 16) >> 4) * 64) +#define SIZE_VP9D_LB_PE_TOP_DATA(frame_width, frame_height) \ + ((HFI_ALIGN(HFI_ALIGN(frame_width, 8), 64) >> 6) * 176) +#define SIZE_MP2D_LB_VSP_TOP(frame_width, frame_height) \ + (((HFI_ALIGN(frame_width, 16) >> 4) * 64 / 2) + 256) +#define SIZE_VP9D_LB_VSP_TOP(frame_width, frame_height) \ + ((((HFI_ALIGN(HFI_ALIGN(frame_width, 8), 64) >> 6) * 64 * 8) + 256)) + +#define HFI_IRIS3_VP9D_COMV_SIZE \ + ((((8192 + 63) >> 6) * ((4320 + 63) >> 6) * 8 * 8 * 2 * 8)) + +#define SIZE_VP9D_QP(frame_width, frame_height) \ + SIZE_H264D_QP(frame_width, frame_height) + +#define HFI_IRIS3_VP9D_LB_SIZE(_size, frame_width, frame_height, num_vpp_pipes)\ + do \ + { \ + _size = HFI_ALIGN(SIZE_VPXD_LB_FE_LEFT_CTRL(frame_width, \ + frame_height),VENUS_DMA_ALIGNMENT) * num_vpp_pipes + \ + HFI_ALIGN(SIZE_VPXD_LB_SE_LEFT_CTRL(frame_width, frame_height),\ + VENUS_DMA_ALIGNMENT) * num_vpp_pipes + \ + HFI_ALIGN(SIZE_VP9D_LB_VSP_TOP(frame_width, frame_height), \ + VENUS_DMA_ALIGNMENT) + \ + HFI_ALIGN(SIZE_VPXD_LB_FE_TOP_CTRL(frame_width, frame_height), \ + VENUS_DMA_ALIGNMENT) + 2 * \ + HFI_ALIGN(SIZE_VPXD_LB_RECON_DMA_METADATA_WR \ + (frame_width, frame_height), VENUS_DMA_ALIGNMENT) + \ + HFI_ALIGN(SIZE_VPXD_LB_SE_TOP_CTRL(frame_width, frame_height), \ + VENUS_DMA_ALIGNMENT) + \ + HFI_ALIGN(SIZE_VP9D_LB_PE_TOP_DATA(frame_width, frame_height), \ + VENUS_DMA_ALIGNMENT) + \ + HFI_ALIGN(SIZE_VP9D_LB_FE_TOP_DATA(frame_width, frame_height), \ + VENUS_DMA_ALIGNMENT) + \ + HFI_ALIGN(SIZE_VP9D_QP(frame_width, frame_height), \ + VENUS_DMA_ALIGNMENT); \ + } while (0) + +#define HFI_BUFFER_LINE_VP9D(_size, frame_width, frame_height, \ + _yuv_bufcount_min, is_opb, num_vpp_pipes) \ + do \ + { \ + HFI_U32 _lb_size = 0; \ + HFI_U32 vpss_lb_size = 0; \ + HFI_IRIS3_VP9D_LB_SIZE(_lb_size, frame_width, frame_height,\ + num_vpp_pipes); \ + if (is_opb) \ + { \ + SIZE_VPSS_LB(vpss_lb_size, frame_width, frame_height, \ + num_vpp_pipes); \ + } \ + _size = _lb_size + vpss_lb_size; \ + } while (0) + +#define VPX_DECODER_FRAME_CONCURENCY_LVL (2) +#define VPX_DECODER_FRAME_BIN_HDR_BUDGET_RATIO 1 / 2 +#define VPX_DECODER_FRAME_BIN_RES_BUDGET_RATIO 3 / 2 + +#define HFI_BUFFER_BIN_VP9D(_size, frame_width, frame_height, \ + is_interlaced, num_vpp_pipes) \ + do \ + { \ + HFI_U32 _size_yuv = HFI_ALIGN(frame_width, \ + BUFFER_ALIGNMENT_16_BYTES) *\ + HFI_ALIGN(frame_height, BUFFER_ALIGNMENT_16_BYTES) * 3 / 2; \ + if (!is_interlaced) \ + { \ + _size = HFI_ALIGN(((MAX(_size_yuv, \ + ((BIN_BUFFER_THRESHOLD * 3) >> 1)) * \ + VPX_DECODER_FRAME_BIN_HDR_BUDGET_RATIO * \ + VPX_DECODER_FRAME_CONCURENCY_LVL) / num_vpp_pipes), \ + VENUS_DMA_ALIGNMENT) + HFI_ALIGN(((MAX(_size_yuv, \ + ((BIN_BUFFER_THRESHOLD * 3) >> 1)) * \ + VPX_DECODER_FRAME_BIN_RES_BUDGET_RATIO * \ + VPX_DECODER_FRAME_CONCURENCY_LVL) / num_vpp_pipes), \ + VENUS_DMA_ALIGNMENT); \ + _size = _size * num_vpp_pipes; \ + } \ + else \ + { \ + _size = 0; \ + } \ + } while (0) + +#define VP9_NUM_FRAME_INFO_BUF 32 +#define VP9_NUM_PROBABILITY_TABLE_BUF (VP9_NUM_FRAME_INFO_BUF + 4) +#define VP9_PROB_TABLE_SIZE (3840) +#define VP9_FRAME_INFO_BUF_SIZE (6144) + +#define VP9_UDC_HEADER_BUF_SIZE (3 * 128) +#define MAX_SUPERFRAME_HEADER_LEN (34) +#define CCE_TILE_OFFSET_SIZE HFI_ALIGN(32 * 4 * 4, BUFFER_ALIGNMENT_32_BYTES) + +#define HFI_BUFFER_PERSIST_VP9D(_size) \ + _size = HFI_ALIGN(VP9_NUM_PROBABILITY_TABLE_BUF * VP9_PROB_TABLE_SIZE, \ + VENUS_DMA_ALIGNMENT) + HFI_ALIGN(HFI_IRIS3_VP9D_COMV_SIZE, \ + VENUS_DMA_ALIGNMENT) + HFI_ALIGN(MAX_SUPERFRAME_HEADER_LEN, \ + VENUS_DMA_ALIGNMENT) + HFI_ALIGN(VP9_UDC_HEADER_BUF_SIZE, \ + VENUS_DMA_ALIGNMENT) + HFI_ALIGN(VP9_NUM_FRAME_INFO_BUF * \ + CCE_TILE_OFFSET_SIZE, VENUS_DMA_ALIGNMENT) + \ + HFI_ALIGN(VP9_NUM_FRAME_INFO_BUF * VP9_FRAME_INFO_BUF_SIZE, \ + VENUS_DMA_ALIGNMENT) + HDR10_HIST_EXTRADATA_SIZE + +#define HFI_BUFFER_LINE_MP2D(_size, frame_width, frame_height, \ +_yuv_bufcount_min, is_opb, num_vpp_pipes) \ + do \ + { \ + HFI_U32 vpss_lb_size = 0; \ + _size = HFI_ALIGN(SIZE_VPXD_LB_FE_LEFT_CTRL(frame_width, \ + frame_height), VENUS_DMA_ALIGNMENT) * num_vpp_pipes + \ + HFI_ALIGN(SIZE_VPXD_LB_SE_LEFT_CTRL(frame_width, frame_height),\ + VENUS_DMA_ALIGNMENT) * num_vpp_pipes + \ + HFI_ALIGN(SIZE_MP2D_LB_VSP_TOP(frame_width, frame_height),\ + VENUS_DMA_ALIGNMENT) + HFI_ALIGN(SIZE_VPXD_LB_FE_TOP_CTRL\ + (frame_width, frame_height), VENUS_DMA_ALIGNMENT) + \ + 2 * HFI_ALIGN(SIZE_VPXD_LB_RECON_DMA_METADATA_WR(frame_width,\ + frame_height), VENUS_DMA_ALIGNMENT) + \ + HFI_ALIGN(SIZE_VPXD_LB_SE_TOP_CTRL(frame_width, frame_height),\ + VENUS_DMA_ALIGNMENT) + \ + HFI_ALIGN(SIZE_MP2D_LB_PE_TOP_DATA(frame_width, frame_height), \ + VENUS_DMA_ALIGNMENT) + \ + HFI_ALIGN(SIZE_MP2D_LB_FE_TOP_DATA(frame_width, frame_height), \ + VENUS_DMA_ALIGNMENT); \ + if (is_opb) \ + { \ + SIZE_VPSS_LB(vpss_lb_size, frame_width, frame_height, \ + num_vpp_pipes); \ + } \ + _size += vpss_lb_size; \ + } while (0) + +#define HFI_BUFFER_BIN_MP2D(_size, frame_width, frame_height, is_interlaced) 0 + +#define QMATRIX_SIZE (sizeof(HFI_U32) * 128 + 256) +#define MP2D_QPDUMP_SIZE 115200 +#define HFI_BUFFER_PERSIST_MP2D(_size) \ + _size = QMATRIX_SIZE + MP2D_QPDUMP_SIZE; + +#define AV1D_LCU_MAX_SIZE_PELS 128 +#define AV1D_LCU_MIN_SIZE_PELS 64 +#define AV1D_MAX_TILE_COLS 64 + +#define HFI_BUFFER_COMV_AV1D(_size, frame_width, frame_height, \ + _comv_bufcount) \ + do { \ + _size = 2 * HFI_ALIGN(MAX(((frame_width + 63) / 64) * \ + ((frame_height + 63) / 64) * 512, \ + ((frame_width + 127) / 128) * \ + ((frame_height + 127) / 128) * 2816), \ + VENUS_DMA_ALIGNMENT); \ + _size *= _comv_bufcount; \ + } while (0) + +#define SIZE_AV1D_LB_FE_TOP_DATA(frame_width, frame_height) \ + (HFI_ALIGN(frame_width, AV1D_LCU_MAX_SIZE_PELS) * ((16 * 10) >> 3) + \ + HFI_ALIGN(frame_width, AV1D_LCU_MAX_SIZE_PELS) / 2 * ((16 * 6) >> 3) * 2) + +#define SIZE_AV1D_LB_FE_LEFT_DATA(frame_width, frame_height) \ + (32 * (HFI_ALIGN(frame_height, AV1D_LCU_MAX_SIZE_PELS) + \ + HFI_ALIGN(frame_height, AV1D_LCU_MAX_SIZE_PELS) / \ + AV1D_LCU_MIN_SIZE_PELS * 16) + \ + 16 * (HFI_ALIGN(frame_height, AV1D_LCU_MAX_SIZE_PELS) / 2 + \ + HFI_ALIGN(frame_height, AV1D_LCU_MAX_SIZE_PELS) / \ + AV1D_LCU_MIN_SIZE_PELS * 8) * 2 + \ + 24 * (HFI_ALIGN(frame_height, AV1D_LCU_MAX_SIZE_PELS) + \ + HFI_ALIGN(frame_height, AV1D_LCU_MAX_SIZE_PELS) / \ + AV1D_LCU_MIN_SIZE_PELS * 16) + \ + 24 * (HFI_ALIGN(frame_height, AV1D_LCU_MAX_SIZE_PELS) / 2 + \ + HFI_ALIGN(frame_height, AV1D_LCU_MAX_SIZE_PELS) / \ + AV1D_LCU_MIN_SIZE_PELS * 12) * 2 + \ + 24 * (HFI_ALIGN(frame_height, AV1D_LCU_MAX_SIZE_PELS) + \ + HFI_ALIGN(frame_height, AV1D_LCU_MAX_SIZE_PELS) / \ + AV1D_LCU_MIN_SIZE_PELS * 16) + \ + 16 * (HFI_ALIGN(frame_height, AV1D_LCU_MAX_SIZE_PELS) + \ + HFI_ALIGN(frame_height, AV1D_LCU_MAX_SIZE_PELS) / \ + AV1D_LCU_MIN_SIZE_PELS * 16) + \ + 16 * (HFI_ALIGN(frame_height, AV1D_LCU_MAX_SIZE_PELS) / 2 + \ + HFI_ALIGN(frame_height, AV1D_LCU_MAX_SIZE_PELS) / \ + AV1D_LCU_MIN_SIZE_PELS * 12) * 2) + +#define SIZE_AV1D_LB_FE_TOP_CTRL(frame_width, frame_height) \ + (10 * ((frame_width + AV1D_LCU_MIN_SIZE_PELS - 1) / \ + AV1D_LCU_MIN_SIZE_PELS) * 128 / 8) + +#define SIZE_AV1D_LB_FE_LEFT_CTRL(frame_width, frame_height) \ + (16 * ((HFI_ALIGN(frame_height, AV1D_LCU_MAX_SIZE_PELS) / 16) + \ + (HFI_ALIGN(frame_height, AV1D_LCU_MAX_SIZE_PELS) / \ + AV1D_LCU_MIN_SIZE_PELS)) + \ + 3 * 16 * (HFI_ALIGN(frame_height, AV1D_LCU_MAX_SIZE_PELS) / \ + AV1D_LCU_MIN_SIZE_PELS)) + +#define SIZE_AV1D_LB_SE_TOP_CTRL(frame_width, frame_height) \ + (((frame_width + 7) / 8) * 16) + +#define SIZE_AV1D_LB_SE_LEFT_CTRL(frame_width, frame_height) \ + (MAX(((frame_height + 15) / 16) * MAX_SE_NBR_CTRL_LCU16_LINE_BUFFER_SIZE, \ + MAX(((frame_height + 31) / 32) * MAX_SE_NBR_CTRL_LCU32_LINE_BUFFER_SIZE, \ + ((frame_height + 63) / 64) * MAX_SE_NBR_CTRL_LCU64_LINE_BUFFER_SIZE))) + +#define SIZE_AV1D_LB_PE_TOP_DATA(frame_width, frame_height) \ + (MAX(((frame_width + 15) / 16) * MAX_PE_NBR_DATA_LCU16_LINE_BUFFER_SIZE, \ + MAX(((frame_width + 31) / 32) * MAX_PE_NBR_DATA_LCU32_LINE_BUFFER_SIZE, \ + ((frame_width + 63) / 64) * MAX_PE_NBR_DATA_LCU64_LINE_BUFFER_SIZE))) + +#define SIZE_AV1D_LB_VSP_TOP(frame_width, frame_height) \ + (MAX(((frame_width + 63) / 64) * 1280, ((frame_width + 127) / 128) * 2304)) + +#define SIZE_AV1D_LB_RECON_DMA_METADATA_WR(frame_width, frame_height) \ + ((HFI_ALIGN(frame_height, 8) / (4 / 2)) * 64) + +#define SIZE_AV1D_QP(frame_width, frame_height) \ + SIZE_H264D_QP(frame_width, frame_height) + +#define SIZE_AV1D_LB_OPB_WR1_NV12_UBWC(_size, frame_width, frame_height) \ + do \ + { \ + HFI_U32 y_width, y_width_a = 128; \ + HFI_NV12_IL_CALC_Y_STRIDE(y_width, frame_width, y_width_a); \ + _size = (256 * ((y_width + 31) / 32 + (AV1D_MAX_TILE_COLS - 1))); \ + } while (0) + +#define SIZE_AV1D_LB_OPB_WR1_TP10_UBWC(_size, frame_width, frame_height) \ + do \ + { \ + HFI_U32 y_width, y_width_a = 256; \ + HFI_YUV420_TP10_CALC_Y_STRIDE(y_width, frame_width, y_width_a); \ + _size = (256 * ((y_width + 47) / 48 + (AV1D_MAX_TILE_COLS - 1))); \ + } while (0) + +#define SIZE_AV1D_IBC_NV12_UBWC(_size, frame_width, frame_height) \ + do \ + { \ + HFI_U32 y_width_a = 128, y_height_a = 32; \ + HFI_U32 uv_width_a = 128, uv_height_a = 32; \ + HFI_U32 yBufSize, uvBufSize, y_width, y_height, uv_width, uv_height; \ + HFI_U32 y_meta_width_a = 64, y_meta_height_a = 16; \ + HFI_U32 uv_meta_width_a = 64, uv_meta_height_a = 16; \ + HFI_U32 meta_height, meta_stride, meta_size; \ + HFI_U32 tile_width_y = HFI_COLOR_FORMAT_YUV420_NV12_UBWC_Y_TILE_WIDTH; \ + HFI_U32 tile_height_y = HFI_COLOR_FORMAT_YUV420_NV12_UBWC_Y_TILE_HEIGHT; \ + HFI_U32 tile_width_uv = HFI_COLOR_FORMAT_YUV420_NV12_UBWC_UV_TILE_WIDTH; \ + HFI_U32 tile_height_uv = \ + HFI_COLOR_FORMAT_YUV420_NV12_UBWC_UV_TILE_HEIGHT; \ + HFI_NV12_IL_CALC_Y_STRIDE(y_width, frame_width, y_width_a); \ + HFI_NV12_IL_CALC_Y_BUFHEIGHT(y_height, frame_height, y_height_a); \ + HFI_NV12_IL_CALC_UV_STRIDE(uv_width, frame_width, uv_width_a); \ + HFI_NV12_IL_CALC_UV_BUFHEIGHT(uv_height, frame_height, uv_height_a); \ + HFI_NV12_UBWC_IL_CALC_Y_BUF_SIZE(yBufSize, y_width, y_height); \ + HFI_NV12_UBWC_IL_CALC_UV_BUF_SIZE(uvBufSize, uv_width, uv_height); \ + _size = yBufSize + uvBufSize; \ + HFI_UBWC_CALC_METADATA_PLANE_STRIDE(meta_stride, frame_width, \ + y_meta_width_a, tile_width_y); \ + HFI_UBWC_METADATA_PLANE_BUFHEIGHT(meta_height, frame_height, \ + y_meta_height_a, tile_height_y); \ + HFI_UBWC_METADATA_PLANE_BUFFER_SIZE(meta_size, \ + meta_stride, meta_height); \ + _size += meta_size; \ + HFI_UBWC_UV_METADATA_PLANE_STRIDE(meta_stride, frame_width, \ + uv_meta_width_a, tile_width_uv); \ + HFI_UBWC_UV_METADATA_PLANE_BUFHEIGHT(meta_height, frame_height, \ + uv_meta_height_a, tile_height_uv); \ + HFI_UBWC_METADATA_PLANE_BUFFER_SIZE(meta_size, \ + meta_stride, meta_height); \ + _size += meta_size; \ + } while (0) + +#define SIZE_AV1D_IBC_TP10_UBWC(_size, frame_width, frame_height) \ + do \ + { \ + HFI_U32 y_width_a = 256, y_height_a = 16, \ + uv_width_a = 256, uv_height_a = 16; \ + HFI_U32 yBufSize, uvBufSize, y_width, y_height, uv_width, uv_height; \ + HFI_U32 y_meta_width_a = 64, y_meta_height_a = 16, \ + uv_meta_width_a = 64, uv_meta_height_a = 16; \ + HFI_U32 meta_height, meta_stride, meta_size; \ + HFI_U32 tile_width_y = HFI_COLOR_FORMAT_YUV420_TP10_UBWC_Y_TILE_WIDTH; \ + HFI_U32 tile_height_y = HFI_COLOR_FORMAT_YUV420_TP10_UBWC_Y_TILE_HEIGHT; \ + HFI_U32 tile_width_uv = HFI_COLOR_FORMAT_YUV420_TP10_UBWC_UV_TILE_WIDTH; \ + HFI_U32 tile_height_uv = \ + HFI_COLOR_FORMAT_YUV420_TP10_UBWC_UV_TILE_HEIGHT; \ + HFI_YUV420_TP10_CALC_Y_STRIDE(y_width, frame_width, y_width_a); \ + HFI_YUV420_TP10_CALC_Y_BUFHEIGHT(y_height, frame_height, y_height_a); \ + HFI_YUV420_TP10_CALC_UV_STRIDE(uv_width, frame_width, uv_width_a); \ + HFI_YUV420_TP10_CALC_UV_BUFHEIGHT(uv_height, frame_height, \ + uv_height_a); \ + HFI_YUV420_TP10_UBWC_CALC_Y_BUF_SIZE(yBufSize, y_width, y_height); \ + HFI_YUV420_TP10_UBWC_CALC_UV_BUF_SIZE(uvBufSize, uv_width, uv_height); \ + _size = yBufSize + uvBufSize; \ + HFI_UBWC_CALC_METADATA_PLANE_STRIDE(meta_stride, frame_width, \ + y_meta_width_a, tile_width_y); \ + HFI_UBWC_METADATA_PLANE_BUFHEIGHT(meta_height, frame_height, \ + y_meta_height_a, tile_height_y); \ + HFI_UBWC_METADATA_PLANE_BUFFER_SIZE(meta_size, \ + meta_stride, meta_height); \ + _size += meta_size; \ + HFI_UBWC_UV_METADATA_PLANE_STRIDE(meta_stride, frame_width, \ + uv_meta_width_a, tile_width_uv); \ + HFI_UBWC_UV_METADATA_PLANE_BUFHEIGHT(meta_height, frame_height, \ + uv_meta_height_a, tile_height_uv); \ + HFI_UBWC_METADATA_PLANE_BUFFER_SIZE(meta_size, \ + meta_stride, meta_height); \ + _size += meta_size; \ + } while (0) + +#define HFI_BUFFER_LINE_AV1D(_size, frame_width, frame_height, isOPB, \ + num_vpp_pipes) \ + do \ + { \ + HFI_U32 vpssLBSize, opbwr1BufSize, opbwr8, opbwr10; \ + _size = HFI_ALIGN(SIZE_AV1D_LB_FE_TOP_DATA(frame_width, frame_height), \ + VENUS_DMA_ALIGNMENT) + \ + HFI_ALIGN(SIZE_AV1D_LB_FE_TOP_CTRL(frame_width, frame_height), \ + VENUS_DMA_ALIGNMENT) + \ + HFI_ALIGN(SIZE_AV1D_LB_FE_LEFT_DATA(frame_width, frame_height), \ + VENUS_DMA_ALIGNMENT) * num_vpp_pipes + \ + HFI_ALIGN(SIZE_AV1D_LB_FE_LEFT_CTRL(frame_width, frame_height), \ + VENUS_DMA_ALIGNMENT) * num_vpp_pipes + \ + HFI_ALIGN(SIZE_AV1D_LB_SE_LEFT_CTRL(frame_width, frame_height), \ + VENUS_DMA_ALIGNMENT) * num_vpp_pipes + \ + HFI_ALIGN(SIZE_AV1D_LB_SE_TOP_CTRL(frame_width, frame_height), \ + VENUS_DMA_ALIGNMENT) + \ + HFI_ALIGN(SIZE_AV1D_LB_PE_TOP_DATA(frame_width, frame_height), \ + VENUS_DMA_ALIGNMENT) + \ + HFI_ALIGN(SIZE_AV1D_LB_VSP_TOP(frame_width, frame_height), \ + VENUS_DMA_ALIGNMENT) + \ + HFI_ALIGN(SIZE_AV1D_LB_RECON_DMA_METADATA_WR(frame_width, \ + frame_height), \ + VENUS_DMA_ALIGNMENT) * 2 + \ + HFI_ALIGN(SIZE_AV1D_QP(frame_width, frame_height), \ + VENUS_DMA_ALIGNMENT); \ + SIZE_AV1D_LB_OPB_WR1_NV12_UBWC(opbwr8, frame_width, frame_height); \ + SIZE_AV1D_LB_OPB_WR1_TP10_UBWC(opbwr10, frame_width, frame_height); \ + opbwr1BufSize = MAX(opbwr8, opbwr10); \ + _size = HFI_ALIGN((_size + opbwr1BufSize), VENUS_DMA_ALIGNMENT); \ + if (isOPB) \ + { \ + SIZE_VPSS_LB(vpssLBSize, frame_width, frame_height, num_vpp_pipes); \ + _size = HFI_ALIGN((_size + vpssLBSize), VENUS_DMA_ALIGNMENT); \ + } \ + } while (0) + +#define HFI_BUFFER_IBC_AV1D(_size, frame_width, frame_height) \ + do { \ + HFI_U32 ibc8, ibc10; \ + SIZE_AV1D_IBC_NV12_UBWC(ibc8, frame_width, frame_height); \ + SIZE_AV1D_IBC_TP10_UBWC(ibc10, frame_width, frame_height); \ + _size = HFI_ALIGN(MAX(ibc8, ibc10), VENUS_DMA_ALIGNMENT); \ + } while (0) + +#define AV1_CABAC_HDR_RATIO_HD_TOT 2 +#define AV1_CABAC_RES_RATIO_HD_TOT 2 +/* some content need more bin buffer, + * but limit buffer size for high resolution */ +#define SIZE_AV1D_HW_BIN_BUFFER(_size, frame_width, frame_height, delay, \ + num_vpp_pipes) \ + do \ + { \ + HFI_U32 size_yuv, size_bin_hdr, size_bin_res; \ + size_yuv = ((frame_width * frame_height) <= BIN_BUFFER_THRESHOLD) ? \ + ((BIN_BUFFER_THRESHOLD * 3) >> 1) : \ + ((frame_width * frame_height * 3) >> 1); \ + size_bin_hdr = size_yuv * AV1_CABAC_HDR_RATIO_HD_TOT; \ + size_bin_res = size_yuv * AV1_CABAC_RES_RATIO_HD_TOT; \ + size_bin_hdr = size_bin_hdr * \ + (((((HFI_U32)(delay)) & 31) / 10) + 2) / 2; \ + size_bin_res = size_bin_res * \ + (((((HFI_U32)(delay)) & 31) / 10) + 2) / 2; \ + size_bin_hdr = HFI_ALIGN(size_bin_hdr / num_vpp_pipes, \ + VENUS_DMA_ALIGNMENT) * num_vpp_pipes; \ + size_bin_res = HFI_ALIGN(size_bin_res / num_vpp_pipes, \ + VENUS_DMA_ALIGNMENT) * num_vpp_pipes; \ + _size = size_bin_hdr + size_bin_res; \ + } while (0) + +#define HFI_BUFFER_BIN_AV1D(_size, frame_width, frame_height, isInterlaced, \ + delay, num_vpp_pipes) \ + do \ + { \ + HFI_U32 nAlignedW = HFI_ALIGN(frame_width, BUFFER_ALIGNMENT_16_BYTES); \ + HFI_U32 nAlignedH = HFI_ALIGN(frame_height, BUFFER_ALIGNMENT_16_BYTES); \ + if (!isInterlaced) \ + { \ + SIZE_AV1D_HW_BIN_BUFFER(_size, nAlignedW, nAlignedH, \ + delay, num_vpp_pipes); \ + } \ + else \ + { \ + _size = 0; \ + } \ + } while (0) + +#define AV1D_NUM_HW_PIC_BUF 16 +#define AV1D_NUM_FRAME_HEADERS 16 + +#define SIZE_AV1D_SEQUENCE_HEADER 768 +#define SIZE_AV1D_METADATA 512 +#define SIZE_AV1D_FRAME_HEADER 1280 +#define SIZE_AV1D_TILE_OFFSET 65536 +#define SIZE_AV1D_QM 3328 +#define SIZE_AV1D_PROB_TABLE 22784 + +#define AV1D_SIZE_BSE_COL_MV_64x64 512 +#define AV1D_SIZE_BSE_COL_MV_128x128 2816 +#define SIZE_AV1D_COL_MV MAX((((8192 + 63) / 64) * ((4352 + 63) / 64) * \ + AV1D_SIZE_BSE_COL_MV_64x64), \ + (((8192 + 127) / 128) * ((4352 + 127) / 128) * \ + AV1D_SIZE_BSE_COL_MV_128x128)) + +#define HFI_BUFFER_PERSIST_AV1D(_size, max_width, max_height, total_ref_count) \ + do \ + { \ + HFI_U32 comv_size; \ + HFI_BUFFER_COMV_AV1D(comv_size, max_width, max_height, total_ref_count); \ + _size = \ + HFI_ALIGN((SIZE_AV1D_SEQUENCE_HEADER * 2 + \ + SIZE_AV1D_METADATA + \ + AV1D_NUM_HW_PIC_BUF * (SIZE_AV1D_TILE_OFFSET + SIZE_AV1D_QM) + \ + AV1D_NUM_FRAME_HEADERS * (SIZE_AV1D_FRAME_HEADER + \ + 2 * SIZE_AV1D_PROB_TABLE) + \ + comv_size + HDR10_HIST_EXTRADATA_SIZE + \ + SIZE_AV1D_METADATA * AV1D_NUM_HW_PIC_BUF), VENUS_DMA_ALIGNMENT); \ + } while (0) + +#define HFI_BUFFER_BITSTREAM_ENC(size, frame_width, frame_height, \ + rc_type, is_ten_bit) \ + do \ + { \ + HFI_U32 aligned_width, aligned_height, bitstream_size, yuv_size; \ + aligned_width = HFI_ALIGN(frame_width, 32); \ + aligned_height = HFI_ALIGN(frame_height, 32); \ + bitstream_size = aligned_width * aligned_height * 3; \ + yuv_size = (aligned_width * aligned_height * 3) >> 1; \ + if (aligned_width * aligned_height > (4096 * 2176)) \ + { \ + /* bitstream_size = 0.25 * yuv_size; */ \ + bitstream_size = (bitstream_size >> 3); \ + } \ + else if (aligned_width * aligned_height > (1280 * 720)) \ + { \ + /* bitstream_size = 0.5 * yuv_size; */ \ + bitstream_size = (bitstream_size >> 2); \ + } \ + else \ + { \ + /* bitstream_size = 2 * yuv_size; */ \ + } \ + if (((rc_type == HFI_RC_CQ) || (rc_type == HFI_RC_OFF)) && (bitstream_size < yuv_size)) \ + { \ + bitstream_size = (bitstream_size << 1);\ + } \ + if (is_ten_bit) \ + { \ + bitstream_size = (bitstream_size) + \ + (bitstream_size >> 2); \ + } \ + size = HFI_ALIGN(bitstream_size, HFI_ALIGNMENT_4096); \ + } while (0) + +#define HFI_IRIS3_ENC_TILE_SIZE_INFO(tile_size, tile_count, last_tile_size, \ + frame_width_coded, codec_standard) \ + do \ + { \ + HFI_U32 without_tile_enc_width; \ + HFI_U32 min_tile_size = 352, fixed_tile_width = 960; \ + without_tile_enc_width = min_tile_size + fixed_tile_width; \ + if ((codec_standard == HFI_CODEC_ENCODE_HEVC) && \ + (frame_width_coded > without_tile_enc_width)) \ + { \ + tile_size = fixed_tile_width; \ + tile_count = (frame_width_coded + tile_size - 1) / tile_size; \ + last_tile_size = (frame_width_coded - (tile_size * (tile_count - 1))); \ + if (last_tile_size < min_tile_size) \ + { \ + tile_count -= 1; \ + last_tile_size = (tile_size + min_tile_size); \ + } \ + } \ + else \ + { \ + tile_size = frame_width_coded; \ + tile_count = 1; \ + last_tile_size = 0; \ + } \ + } while (0) + +#define HFI_IRIS3_ENC_MB_BASED_MULTI_SLICE_COUNT(total_slice_count, frame_width, frame_height, \ + codec_standard, multi_slice_max_mb_count) \ + do \ + { \ + HFI_U32 tile_size, tile_count, last_tile_size, \ + slice_count_per_tile, slice_count_in_last_tile; \ + HFI_U32 mbs_in_one_tile, mbs_in_last_tile; \ + HFI_U32 frame_width_coded, frame_height_coded, lcu_size; \ + lcu_size = (codec_standard == HFI_CODEC_ENCODE_HEVC) ? 32 : 16; \ + frame_width_coded = HFI_ALIGN(frame_width, lcu_size); \ + frame_height_coded = HFI_ALIGN(frame_height, lcu_size); \ + HFI_IRIS3_ENC_TILE_SIZE_INFO(tile_size, tile_count, last_tile_size, \ + frame_width_coded, codec_standard); \ + mbs_in_one_tile = (tile_size * frame_height_coded) / (lcu_size * lcu_size); \ + slice_count_per_tile = \ + (mbs_in_one_tile + multi_slice_max_mb_count - 1) / (multi_slice_max_mb_count); \ + if (last_tile_size) \ + { \ + mbs_in_last_tile = \ + (last_tile_size * frame_height_coded) / (lcu_size * lcu_size); \ + slice_count_in_last_tile = \ + (mbs_in_last_tile + multi_slice_max_mb_count - 1) / (multi_slice_max_mb_count); \ + total_slice_count = \ + (slice_count_per_tile * (tile_count - 1)) + slice_count_in_last_tile; \ + } \ + else \ + { \ + total_slice_count = (slice_count_per_tile * tile_count); \ + } \ + } while (0) + +#define SIZE_ROI_METADATA_ENC(size_roi, frame_width, frame_height, lcu_size)\ + do \ + { \ + HFI_U32 width_in_lcus = 0, height_in_lcus = 0, n_shift = 0; \ + while (lcu_size && !(lcu_size & 0x1)) \ + { \ + n_shift++; \ + lcu_size = lcu_size >> 1; \ + } \ + width_in_lcus = (frame_width + (lcu_size - 1)) >> n_shift; \ + height_in_lcus = (frame_height + (lcu_size - 1)) >> n_shift; \ + size_roi = (((width_in_lcus + 7) >> 3) << 3) * \ + height_in_lcus * 2 + 256; \ + } while (0) + +#define HFI_BUFFER_INPUT_METADATA_ENC(size, frame_width, frame_height, \ + is_roi_enabled, lcu_size) \ + do \ + { \ + HFI_U32 roi_size = 0; \ + if (is_roi_enabled) \ + { \ + SIZE_ROI_METADATA_ENC(roi_size, frame_width, \ + frame_height, lcu_size); \ + } \ + size = roi_size + 16384; \ + size = HFI_ALIGN(size, HFI_ALIGNMENT_4096); \ + } while (0) + +#define HFI_BUFFER_INPUT_METADATA_H264E(size_metadata, frame_width, \ + frame_height, is_roi_enabled) \ + do \ + { \ + HFI_BUFFER_INPUT_METADATA_ENC(size_metadata, frame_width, \ + frame_height, is_roi_enabled, 16); \ + }while (0) + +#define HFI_BUFFER_INPUT_METADATA_H265E(size_metadata, frame_width, \ + frame_height, is_roi_enabled) \ + do \ + { \ + HFI_BUFFER_INPUT_METADATA_ENC(size_metadata, frame_width, \ + frame_height, is_roi_enabled, 32); \ + } while (0) + +#define HFI_BUFFER_ARP_ENC(size) \ + do \ + { \ + size = 204800; \ + } while (0) + +#define HFI_MAX_COL_FRAME 6 +#define HFI_VENUS_VENC_TRE_WB_BUFF_SIZE (65 << 4) // bytes +#define HFI_VENUS_VENC_DB_LINE_BUFF_PER_MB 512 +#define HFI_VENUS_VPPSG_MAX_REGISTERS 2048 +#define HFI_VENUS_WIDTH_ALIGNMENT 128 +#define HFI_VENUS_WIDTH_TEN_BIT_ALIGNMENT 192 +#define HFI_VENUS_HEIGHT_ALIGNMENT 32 +#define VENUS_METADATA_STRIDE_MULTIPLE 64 +#define VENUS_METADATA_HEIGHT_MULTIPLE 16 + +#ifndef SYSTEM_LAL_TILE10 +#define SYSTEM_LAL_TILE10 192 +#endif + +#define HFI_IRIS3_ENC_RECON_BUF_COUNT(num_recon, n_bframe, ltr_count, \ + _total_hp_layers, _total_hb_layers, hybrid_hp, codec_standard) \ + do \ + { \ + HFI_U32 num_ref = 1; \ + if (n_bframe) \ + num_ref = 2; \ + if (_total_hp_layers > 1) \ + { \ + if (hybrid_hp) \ + num_ref = (_total_hp_layers + 1) >> 1; \ + else if (codec_standard == HFI_CODEC_ENCODE_HEVC) \ + num_ref = (_total_hp_layers + 1) >> 1; \ + else if (codec_standard == HFI_CODEC_ENCODE_AVC && \ + _total_hp_layers < 4) \ + num_ref = (_total_hp_layers - 1); \ + else \ + num_ref = _total_hp_layers; \ + } \ + if (ltr_count) \ + num_ref = num_ref + ltr_count; \ + if (_total_hb_layers > 1) \ + { \ + if (codec_standard == HFI_CODEC_ENCODE_HEVC) \ + num_ref = (_total_hb_layers); \ + else if (codec_standard == HFI_CODEC_ENCODE_AVC) \ + num_ref = (1 << (_total_hb_layers - 2)) + 1; \ + } \ + num_recon = num_ref + 1; \ + } while (0) + +#define SIZE_BIN_BITSTREAM_ENC(_size, rc_type, frame_width, frame_height, \ + work_mode, lcu_size, profile) \ + do \ + { \ + HFI_U32 size_aligned_width = 0, size_aligned_height = 0; \ + HFI_U32 bitstream_size_eval = 0; \ + size_aligned_width = HFI_ALIGN((frame_width), lcu_size); \ + size_aligned_height = HFI_ALIGN((frame_height), lcu_size); \ + if (work_mode == HFI_WORKMODE_2) \ + { \ + if ((rc_type == HFI_RC_CQ) || (rc_type == HFI_RC_OFF)) \ + { \ + bitstream_size_eval = (((size_aligned_width) * \ + (size_aligned_height) * 3) >> 1); \ + } \ + else \ + { \ + bitstream_size_eval = ((size_aligned_width) * \ + (size_aligned_height) * 3); \ + if (rc_type == HFI_RC_LOSSLESS) \ + { \ + bitstream_size_eval = (bitstream_size_eval * 3 >> 2); \ + } \ + else if ((size_aligned_width * size_aligned_height) > \ + (4096 * 2176)) \ + { \ + bitstream_size_eval >>= 3; \ + } \ + else if ((size_aligned_width * size_aligned_height) > (480 * 320)) \ + { \ + bitstream_size_eval >>= 2; \ + } \ + if (profile == HFI_H265_PROFILE_MAIN_10 || \ + profile == HFI_H265_PROFILE_MAIN_10_STILL_PICTURE) \ + { \ + bitstream_size_eval = (bitstream_size_eval * 5 >> 2); \ + } \ + } \ + } \ + else \ + { \ + bitstream_size_eval = size_aligned_width * \ + size_aligned_height * 3; \ + } \ + _size = HFI_ALIGN(bitstream_size_eval, VENUS_DMA_ALIGNMENT); \ + } while (0) + +#define SIZE_ENC_SINGLE_PIPE(size, rc_type, bitbin_size, num_vpp_pipes, \ + frame_width, frame_height, lcu_size) \ + do \ + { \ + HFI_U32 size_single_pipe_eval = 0, sao_bin_buffer_size = 0, \ + _padded_bin_sz = 0; \ + HFI_U32 size_aligned_width = 0, size_aligned_height = 0; \ + size_aligned_width = HFI_ALIGN((frame_width), lcu_size); \ + size_aligned_height = HFI_ALIGN((frame_height), lcu_size); \ + if ((size_aligned_width * size_aligned_height) > \ + (3840 * 2160)) \ + { \ + size_single_pipe_eval = (bitbin_size / num_vpp_pipes); \ + } \ + else if (num_vpp_pipes > 2) \ + { \ + size_single_pipe_eval = bitbin_size / 2; \ + } \ + else \ + { \ + size_single_pipe_eval = bitbin_size; \ + } \ + if (rc_type == HFI_RC_LOSSLESS) \ + { \ + size_single_pipe_eval = (size_single_pipe_eval << 1); \ + } \ + sao_bin_buffer_size = (64 * ((((frame_width) + \ + BUFFER_ALIGNMENT_32_BYTES) * ((frame_height) +\ + BUFFER_ALIGNMENT_32_BYTES)) >> 10)) + 384; \ + _padded_bin_sz = HFI_ALIGN(size_single_pipe_eval, \ + VENUS_DMA_ALIGNMENT);\ + size_single_pipe_eval = sao_bin_buffer_size + _padded_bin_sz; \ + size_single_pipe_eval = HFI_ALIGN(size_single_pipe_eval, \ + VENUS_DMA_ALIGNMENT); \ + size = size_single_pipe_eval; \ + } while (0) + +#define HFI_BUFFER_BIN_ENC(_size, rc_type, frame_width, frame_height, lcu_size, \ + work_mode, num_vpp_pipes, profile) \ + do \ + { \ + HFI_U32 bitstream_size = 0, total_bitbin_buffers = 0, \ + size_single_pipe = 0, bitbin_size = 0; \ + SIZE_BIN_BITSTREAM_ENC(bitstream_size, rc_type, frame_width, \ + frame_height, work_mode, lcu_size, profile); \ + if (work_mode == HFI_WORKMODE_2) \ + { \ + total_bitbin_buffers = 3; \ + bitbin_size = bitstream_size * 12 / 10; \ + bitbin_size = HFI_ALIGN(bitbin_size, \ + VENUS_DMA_ALIGNMENT); \ + } \ + else if ((lcu_size == 16) || (num_vpp_pipes > 1)) \ + { \ + total_bitbin_buffers = 1; \ + bitbin_size = bitstream_size; \ + } \ + if (total_bitbin_buffers > 0) \ + { \ + SIZE_ENC_SINGLE_PIPE(size_single_pipe, rc_type, bitbin_size, \ + num_vpp_pipes, frame_width, frame_height, lcu_size); \ + bitbin_size = size_single_pipe * num_vpp_pipes; \ + _size = HFI_ALIGN(bitbin_size, VENUS_DMA_ALIGNMENT) * \ + total_bitbin_buffers + 512; \ + } \ + else \ + /* Avoid 512 Bytes allocation in case of 1Pipe HEVC Direct Mode*/\ + { \ + _size = 0; \ + } \ + } while (0) + +#define HFI_BUFFER_BIN_H264E(_size, rc_type, frame_width, frame_height, \ + work_mode, num_vpp_pipes, profile) \ + do \ + { \ + HFI_BUFFER_BIN_ENC(_size, rc_type, frame_width, frame_height, 16, \ + work_mode, num_vpp_pipes, profile); \ + } while (0) + +#define HFI_BUFFER_BIN_H265E(_size, rc_type, frame_width, frame_height, \ + work_mode, num_vpp_pipes, profile) \ + do \ + { \ + HFI_BUFFER_BIN_ENC(_size, rc_type, frame_width, frame_height, 32,\ + work_mode, num_vpp_pipes, profile); \ + } while (0) + +#define SIZE_ENC_SLICE_INFO_BUF(num_lcu_in_frame) HFI_ALIGN((256 + \ + (num_lcu_in_frame << 4)), VENUS_DMA_ALIGNMENT) +#define SIZE_LINE_BUF_CTRL(frame_width_coded) \ + HFI_ALIGN(frame_width_coded, VENUS_DMA_ALIGNMENT) +#define SIZE_LINE_BUF_CTRL_ID2(frame_width_coded) \ + HFI_ALIGN(frame_width_coded, VENUS_DMA_ALIGNMENT) + +#define SIZE_LINEBUFF_DATA(_size, is_ten_bit, frame_width_coded) \ + do \ + { \ + _size = is_ten_bit ? (((((10 * (frame_width_coded) +\ + 1024) + (VENUS_DMA_ALIGNMENT - 1)) & \ + (~(VENUS_DMA_ALIGNMENT - 1))) * 1) + \ + (((((10 * (frame_width_coded) + 1024) >> 1) + \ + (VENUS_DMA_ALIGNMENT - 1)) & (~(VENUS_DMA_ALIGNMENT - 1))) * \ + 2)) : (((((8 * (frame_width_coded) + 1024) + \ + (VENUS_DMA_ALIGNMENT - 1)) \ + & (~(VENUS_DMA_ALIGNMENT - 1))) * 1) + \ + (((((8 * (frame_width_coded) +\ + 1024) >> 1) + (VENUS_DMA_ALIGNMENT - 1)) & \ + (~(VENUS_DMA_ALIGNMENT - 1))) * 2)); \ + } while (0) + +#define SIZE_LEFT_LINEBUFF_CTRL(_size, standard, frame_height_coded, \ + num_vpp_pipes_enc) \ + do \ + { \ + _size = (standard == HFI_CODEC_ENCODE_HEVC) ? \ + (((frame_height_coded) + \ + (BUF_SIZE_ALIGN_32)) / BUF_SIZE_ALIGN_32 * 4 * 16) : \ + (((frame_height_coded) + 15) / 16 * 5 * 16); \ + if ((num_vpp_pipes_enc) > 1) \ + { \ + _size += BUFFER_ALIGNMENT_512_BYTES; \ + _size = HFI_ALIGN(_size, BUFFER_ALIGNMENT_512_BYTES) *\ + (num_vpp_pipes_enc); \ + } \ + _size = HFI_ALIGN(_size, VENUS_DMA_ALIGNMENT); \ + } while (0) + +#define SIZE_LEFT_LINEBUFF_RECON_PIX(_size, is_ten_bit, frame_height_coded, \ + num_vpp_pipes_enc) \ + do \ + { \ + _size = (((is_ten_bit + 1) * 2 * (frame_height_coded) + \ + VENUS_DMA_ALIGNMENT) + \ + (VENUS_DMA_ALIGNMENT << (num_vpp_pipes_enc - 1)) - 1) & \ + (~((VENUS_DMA_ALIGNMENT << (num_vpp_pipes_enc - 1)) - 1)) * 1; \ + } while (0) + +#define SIZE_TOP_LINEBUFF_CTRL_FE(_size, frame_width_coded, standard) \ + do \ + { \ + _size = (standard == HFI_CODEC_ENCODE_HEVC) ? (64 * \ + ((frame_width_coded) >> 5)) : (VENUS_DMA_ALIGNMENT + 16 * \ + ((frame_width_coded) >> 4)); \ + _size = HFI_ALIGN(_size, VENUS_DMA_ALIGNMENT); \ + } while (0) + +#define SIZE_LEFT_LINEBUFF_CTRL_FE(frame_height_coded, num_vpp_pipes_enc) \ + ((((VENUS_DMA_ALIGNMENT + 64 * ((frame_height_coded) >> 4)) + \ + (VENUS_DMA_ALIGNMENT << (num_vpp_pipes_enc - 1)) - 1) & \ + (~((VENUS_DMA_ALIGNMENT << (num_vpp_pipes_enc - 1)) - 1)) * 1) * \ + num_vpp_pipes_enc) + +#define SIZE_LEFT_LINEBUFF_METADATA_RECON_Y(_size, frame_height_coded, \ + is_ten_bit, num_vpp_pipes_enc) \ + do \ + { \ + _size = ((VENUS_DMA_ALIGNMENT + 64 * ((frame_height_coded) / \ + (8 * (is_ten_bit ? 4 : 8))))); \ + _size = HFI_ALIGN(_size, VENUS_DMA_ALIGNMENT); \ + _size = (_size * num_vpp_pipes_enc); \ + } while (0) + +#define SIZE_LEFT_LINEBUFF_METADATA_RECON_UV(_size, frame_height_coded, \ + is_ten_bit, num_vpp_pipes_enc) \ + do \ + { \ + _size = ((VENUS_DMA_ALIGNMENT + 64 * ((frame_height_coded) / \ + (4 * (is_ten_bit ? 4 : 8))))); \ + _size = HFI_ALIGN(_size, VENUS_DMA_ALIGNMENT); \ + _size = (_size * num_vpp_pipes_enc); \ + } while (0) + +#define SIZE_LINEBUFF_RECON_PIX(_size, is_ten_bit, frame_width_coded) \ + do \ + { \ + _size = ((is_ten_bit ? 3 : 2) * (frame_width_coded)); \ + _size = HFI_ALIGN(_size, VENUS_DMA_ALIGNMENT); \ + } while (0) + +#define SIZE_SLICE_CMD_BUFFER (HFI_ALIGN(20480, VENUS_DMA_ALIGNMENT)) +#define SIZE_SPS_PPS_SLICE_HDR (2048 + 4096) + +#define SIZE_FRAME_RC_BUF_SIZE(_size, standard, frame_height_coded, \ + num_vpp_pipes_enc) \ + do \ + { \ + _size = (standard == HFI_CODEC_ENCODE_HEVC) ? (256 + 16 * \ + (14 + ((((frame_height_coded) >> 5) + 7) >> 3))) : \ + (256 + 16 * (14 + ((((frame_height_coded) >> 4) + 7) >> 3))); \ + _size *= 11; \ + if (num_vpp_pipes_enc > 1) \ + { \ + _size = HFI_ALIGN(_size, VENUS_DMA_ALIGNMENT) * \ + num_vpp_pipes_enc;\ + } \ + _size = HFI_ALIGN(_size, BUFFER_ALIGNMENT_512_BYTES) * \ + HFI_MAX_COL_FRAME; \ + } while (0) + +#define ENC_BITCNT_BUF_SIZE(num_lcu_in_frame) HFI_ALIGN((256 + \ + (4 * (num_lcu_in_frame))), VENUS_DMA_ALIGNMENT) +#define ENC_BITMAP_BUF_SIZE(num_lcu_in_frame) HFI_ALIGN((256 + \ + ((num_lcu_in_frame) >> 3)), VENUS_DMA_ALIGNMENT) +#define SIZE_LINE_BUF_SDE(frame_width_coded) HFI_ALIGN((256 + \ + (16 * ((frame_width_coded) >> 4))), VENUS_DMA_ALIGNMENT) + +#define SIZE_BSE_SLICE_CMD_BUF ((((8192 << 2) + 7) & (~7)) * 3) + +#define SIZE_LAMBDA_LUT (256 * 11) +#define SIZE_OVERRIDE_BUF(num_lcumb) (HFI_ALIGN(((16 * (((num_lcumb) + 7)\ + >> 3))), VENUS_DMA_ALIGNMENT) * 2) +#define SIZE_IR_BUF(num_lcu_in_frame) HFI_ALIGN((((((num_lcu_in_frame) << 1) + 7) &\ + (~7)) * 3), VENUS_DMA_ALIGNMENT) + +#define SIZE_VPSS_LINE_BUF(num_vpp_pipes_enc, frame_height_coded, \ + frame_width_coded) \ + (HFI_ALIGN(((((((8192) >> 2) << 5) * (num_vpp_pipes_enc)) + 64) + \ + (((((MAX((frame_width_coded), (frame_height_coded)) + 3) >> 2) << 5) +\ + 256) * 16)), VENUS_DMA_ALIGNMENT)) + +#define SIZE_TOP_LINE_BUF_FIRST_STG_SAO(frame_width_coded) \ + HFI_ALIGN((16 * ((frame_width_coded) >> 5)), VENUS_DMA_ALIGNMENT) + +#define HFI_BUFFER_LINE_ENC(_size, frame_width, frame_height, is_ten_bit, \ + num_vpp_pipes_enc, lcu_size, standard) \ + do \ + { \ + HFI_U32 width_in_lcus = 0, height_in_lcus = 0, \ + frame_width_coded = 0, frame_height_coded = 0; \ + HFI_U32 line_buff_data_size = 0, left_line_buff_ctrl_size = 0, \ + left_line_buff_recon_pix_size = 0, \ + top_line_buff_ctrl_fe_size = 0; \ + HFI_U32 left_line_buff_metadata_recon__y__size = 0, \ + left_line_buff_metadata_recon__uv__size = 0, \ + line_buff_recon_pix_size = 0; \ + width_in_lcus = ((frame_width) + (lcu_size)-1) / (lcu_size); \ + height_in_lcus = ((frame_height) + (lcu_size)-1) / (lcu_size); \ + frame_width_coded = width_in_lcus * (lcu_size); \ + frame_height_coded = height_in_lcus * (lcu_size); \ + SIZE_LINEBUFF_DATA(line_buff_data_size, is_ten_bit, \ + frame_width_coded);\ + SIZE_LEFT_LINEBUFF_CTRL(left_line_buff_ctrl_size, standard, \ + frame_height_coded, num_vpp_pipes_enc); \ + SIZE_LEFT_LINEBUFF_RECON_PIX(left_line_buff_recon_pix_size, \ + is_ten_bit, frame_height_coded, num_vpp_pipes_enc); \ + SIZE_TOP_LINEBUFF_CTRL_FE(top_line_buff_ctrl_fe_size, \ + frame_width_coded, standard); \ + SIZE_LEFT_LINEBUFF_METADATA_RECON_Y\ + (left_line_buff_metadata_recon__y__size, \ + frame_height_coded, is_ten_bit, num_vpp_pipes_enc); \ + SIZE_LEFT_LINEBUFF_METADATA_RECON_UV\ + (left_line_buff_metadata_recon__uv__size, \ + frame_height_coded, is_ten_bit, num_vpp_pipes_enc); \ + SIZE_LINEBUFF_RECON_PIX(line_buff_recon_pix_size, is_ten_bit,\ + frame_width_coded); \ + _size = SIZE_LINE_BUF_CTRL(frame_width_coded) + \ + SIZE_LINE_BUF_CTRL_ID2(frame_width_coded) + \ + line_buff_data_size + \ + left_line_buff_ctrl_size + \ + left_line_buff_recon_pix_size + \ + top_line_buff_ctrl_fe_size + \ + left_line_buff_metadata_recon__y__size + \ + left_line_buff_metadata_recon__uv__size + \ + line_buff_recon_pix_size + \ + SIZE_LEFT_LINEBUFF_CTRL_FE(frame_height_coded, \ + num_vpp_pipes_enc) + SIZE_LINE_BUF_SDE(frame_width_coded) + \ + SIZE_VPSS_LINE_BUF(num_vpp_pipes_enc, frame_height_coded, \ + frame_width_coded) + \ + SIZE_TOP_LINE_BUF_FIRST_STG_SAO(frame_width_coded); \ + } while (0) + +#define HFI_BUFFER_LINE_H264E(_size, frame_width, frame_height, is_ten_bit, \ + num_vpp_pipes) \ + do \ + { \ + HFI_BUFFER_LINE_ENC(_size, frame_width, frame_height, 0, \ + num_vpp_pipes, 16, HFI_CODEC_ENCODE_AVC); \ + } while (0) + +#define HFI_BUFFER_LINE_H265E(_size, frame_width, frame_height, is_ten_bit, \ + num_vpp_pipes) \ + do \ + { \ + HFI_BUFFER_LINE_ENC(_size, frame_width, frame_height, \ + is_ten_bit, num_vpp_pipes, 32, HFI_CODEC_ENCODE_HEVC); \ + } while (0) + +#define HFI_BUFFER_COMV_ENC(_size, frame_width, frame_height, lcu_size, \ + num_recon, standard) \ + do \ + { \ + HFI_U32 size_colloc_mv = 0, size_colloc_rc = 0; \ + HFI_U32 mb_width = ((frame_width) + 15) >> 4; \ + HFI_U32 mb_height = ((frame_height) + 15) >> 4; \ + HFI_U32 width_in_lcus = ((frame_width) + (lcu_size)-1) /\ + (lcu_size); \ + HFI_U32 height_in_lcus = ((frame_height) + (lcu_size)-1) / \ + (lcu_size); \ + HFI_U32 num_lcu_in_frame = width_in_lcus * height_in_lcus; \ + size_colloc_mv = (standard == HFI_CODEC_ENCODE_HEVC) ? \ + (16 * ((num_lcu_in_frame << 2) + BUFFER_ALIGNMENT_32_BYTES)) : \ + (3 * 16 * (width_in_lcus * height_in_lcus +\ + BUFFER_ALIGNMENT_32_BYTES)); \ + size_colloc_mv = HFI_ALIGN(size_colloc_mv, \ + VENUS_DMA_ALIGNMENT) * num_recon; \ + size_colloc_rc = (((mb_width + 7) >> 3) * 16 * 2 * mb_height); \ + size_colloc_rc = HFI_ALIGN(size_colloc_rc, \ + VENUS_DMA_ALIGNMENT) * HFI_MAX_COL_FRAME; \ + _size = size_colloc_mv + size_colloc_rc; \ + } while (0) + +#define HFI_BUFFER_COMV_H264E(_size, frame_width, frame_height, num_recon) \ + do \ + { \ + HFI_BUFFER_COMV_ENC(_size, frame_width, frame_height, 16, \ + num_recon, HFI_CODEC_ENCODE_AVC); \ + } while (0) + +#define HFI_BUFFER_COMV_H265E(_size, frame_width, frame_height, num_recon) \ + do \ + { \ + HFI_BUFFER_COMV_ENC(_size, frame_width, frame_height, 32,\ + num_recon, HFI_CODEC_ENCODE_HEVC); \ + } while (0) + +#define HFI_BUFFER_NON_COMV_ENC(_size, frame_width, frame_height, \ + num_vpp_pipes_enc, lcu_size, standard) \ + do \ + { \ + HFI_U32 width_in_lcus = 0, height_in_lcus = 0, \ + frame_width_coded = 0, frame_height_coded = 0, \ + num_lcu_in_frame = 0, num_lcumb = 0; \ + HFI_U32 frame_rc_buf_size = 0; \ + width_in_lcus = ((frame_width) + (lcu_size)-1) / (lcu_size); \ + height_in_lcus = ((frame_height) + (lcu_size)-1) / (lcu_size); \ + num_lcu_in_frame = width_in_lcus * height_in_lcus; \ + frame_width_coded = width_in_lcus * (lcu_size); \ + frame_height_coded = height_in_lcus * (lcu_size); \ + num_lcumb = (frame_height_coded / lcu_size) * \ + ((frame_width_coded + lcu_size * 8) / lcu_size); \ + SIZE_FRAME_RC_BUF_SIZE(frame_rc_buf_size, standard, \ + frame_height_coded, num_vpp_pipes_enc); \ + _size = SIZE_ENC_SLICE_INFO_BUF(num_lcu_in_frame) + \ + SIZE_SLICE_CMD_BUFFER + \ + SIZE_SPS_PPS_SLICE_HDR + \ + frame_rc_buf_size + \ + ENC_BITCNT_BUF_SIZE(num_lcu_in_frame) + \ + ENC_BITMAP_BUF_SIZE(num_lcu_in_frame) + \ + SIZE_BSE_SLICE_CMD_BUF + \ + SIZE_LAMBDA_LUT + \ + SIZE_OVERRIDE_BUF(num_lcumb) + \ + SIZE_IR_BUF(num_lcu_in_frame); \ + } while (0) + +#define HFI_BUFFER_NON_COMV_H264E(_size, frame_width, frame_height, \ + num_vpp_pipes_enc) \ + do \ + { \ + HFI_BUFFER_NON_COMV_ENC(_size, frame_width, frame_height, \ + num_vpp_pipes_enc, 16, HFI_CODEC_ENCODE_AVC); \ + } while (0) + +#define HFI_BUFFER_NON_COMV_H265E(_size, frame_width, frame_height, \ + num_vpp_pipes_enc) \ + do \ + { \ + HFI_BUFFER_NON_COMV_ENC(_size, frame_width, frame_height, \ + num_vpp_pipes_enc, 32, HFI_CODEC_ENCODE_HEVC); \ + } while (0) + +#define SIZE_ENC_REF_BUFFER(size, frame_width, frame_height) \ + do \ + { \ + HFI_U32 u_buffer_width = 0, u_buffer_height = 0, \ + u_chroma_buffer_height = 0; \ + u_buffer_height = HFI_ALIGN(frame_height, \ + HFI_VENUS_HEIGHT_ALIGNMENT); \ + u_chroma_buffer_height = frame_height >> 1; \ + u_chroma_buffer_height = HFI_ALIGN(u_chroma_buffer_height, \ + HFI_VENUS_HEIGHT_ALIGNMENT); \ + u_buffer_width = HFI_ALIGN(frame_width, \ + HFI_VENUS_WIDTH_ALIGNMENT); \ + size = (u_buffer_height + u_chroma_buffer_height) * \ + u_buffer_width; \ + } while (0) + +#define SIZE_ENC_TEN_BIT_REF_BUFFER(size, frame_width, frame_height) \ + do \ + { \ + HFI_U32 ref_buf_height = 0, ref_luma_stride_in_bytes = 0, \ + u_ref_stride = 0, luma_size = 0, ref_chrm_height_in_bytes = 0, \ + chroma_size = 0, ref_buf_size = 0; \ + ref_buf_height = (frame_height + \ + (HFI_VENUS_HEIGHT_ALIGNMENT - 1)) \ + & (~(HFI_VENUS_HEIGHT_ALIGNMENT - 1)); \ + ref_luma_stride_in_bytes = ((frame_width + \ + SYSTEM_LAL_TILE10 - 1) / SYSTEM_LAL_TILE10) * \ + SYSTEM_LAL_TILE10; \ + u_ref_stride = 4 * (ref_luma_stride_in_bytes / 3); \ + u_ref_stride = (u_ref_stride + (BUF_SIZE_ALIGN_128 - 1)) &\ + (~(BUF_SIZE_ALIGN_128 - 1)); \ + luma_size = ref_buf_height * u_ref_stride; \ + ref_chrm_height_in_bytes = (((frame_height + 1) >> 1) + \ + (BUF_SIZE_ALIGN_32 - 1)) & (~(BUF_SIZE_ALIGN_32 - 1)); \ + chroma_size = u_ref_stride * ref_chrm_height_in_bytes; \ + luma_size = (luma_size + (BUF_SIZE_ALIGN_4096 - 1)) & \ + (~(BUF_SIZE_ALIGN_4096 - 1)); \ + chroma_size = (chroma_size + (BUF_SIZE_ALIGN_4096 - 1)) & \ + (~(BUF_SIZE_ALIGN_4096 - 1)); \ + ref_buf_size = luma_size + chroma_size; \ + size = ref_buf_size; \ + } while (0) + +#define HFI_BUFFER_DPB_ENC(_size, frame_width, frame_height, is_ten_bit) \ + do \ + { \ + HFI_U32 metadata_stride, metadata_buf_height, meta_size_y, \ + meta_size_c; \ + HFI_U32 ten_bit_ref_buf_size = 0, ref_buf_size = 0; \ + if (!is_ten_bit) \ + { \ + SIZE_ENC_REF_BUFFER(ref_buf_size, frame_width, \ + frame_height); \ + HFI_UBWC_CALC_METADATA_PLANE_STRIDE(metadata_stride, \ + (frame_width), 64, \ + HFI_COLOR_FORMAT_YUV420_NV12_UBWC_Y_TILE_WIDTH); \ + HFI_UBWC_METADATA_PLANE_BUFHEIGHT(metadata_buf_height, \ + (frame_height), 16, \ + HFI_COLOR_FORMAT_YUV420_NV12_UBWC_Y_TILE_HEIGHT); \ + HFI_UBWC_METADATA_PLANE_BUFFER_SIZE(meta_size_y, \ + metadata_stride, metadata_buf_height); \ + HFI_UBWC_METADATA_PLANE_BUFFER_SIZE(meta_size_c, \ + metadata_stride, metadata_buf_height); \ + _size = ref_buf_size + meta_size_y + meta_size_c; \ + } \ + else \ + { \ + SIZE_ENC_TEN_BIT_REF_BUFFER(ten_bit_ref_buf_size, \ + frame_width, frame_height); \ + HFI_UBWC_CALC_METADATA_PLANE_STRIDE(metadata_stride, \ + frame_width, VENUS_METADATA_STRIDE_MULTIPLE, \ + HFI_COLOR_FORMAT_YUV420_TP10_UBWC_Y_TILE_WIDTH); \ + HFI_UBWC_METADATA_PLANE_BUFHEIGHT(metadata_buf_height, \ + frame_height, VENUS_METADATA_HEIGHT_MULTIPLE, \ + HFI_COLOR_FORMAT_YUV420_TP10_UBWC_Y_TILE_HEIGHT); \ + HFI_UBWC_METADATA_PLANE_BUFFER_SIZE(meta_size_y, \ + metadata_stride, metadata_buf_height); \ + HFI_UBWC_METADATA_PLANE_BUFFER_SIZE(meta_size_c, \ + metadata_stride, metadata_buf_height); \ + _size = ten_bit_ref_buf_size + meta_size_y + \ + meta_size_c; \ + } \ + } while (0) + +#define HFI_BUFFER_DPB_H264E(_size, frame_width, frame_height) \ + do \ + { \ + HFI_BUFFER_DPB_ENC(_size, frame_width, frame_height, 0); \ + } while (0) + +#define HFI_BUFFER_DPB_H265E(_size, frame_width, frame_height, is_ten_bit) \ + do \ + { \ + HFI_BUFFER_DPB_ENC(_size, frame_width, frame_height, is_ten_bit); \ + } while (0) + +#define HFI_BUFFER_VPSS_ENC(vpss_size, dswidth, dsheight, ds_enable, blur, is_ten_bit) \ + do \ + { \ + vpss_size = 0; \ + if (ds_enable || blur) \ + { \ + HFI_BUFFER_DPB_ENC(vpss_size, dswidth, dsheight, is_ten_bit); \ + } \ + } while (0) + +#define HFI_IRIS3_ENC_MIN_INPUT_BUF_COUNT(numInput, TotalHBLayers) \ + do \ + { \ + numInput = 3; \ + if (TotalHBLayers >= 2) \ + { \ + numInput = (1 << (TotalHBLayers - 1)) + 2; \ + } \ + } while (0) + +#endif /* __HFI_BUFFER_IRIS3_3__ */ diff --git a/driver/variant/iris33/inc/msm_vidc_buffer_iris33.h b/driver/variant/iris33/inc/msm_vidc_buffer_iris33.h new file mode 100644 index 0000000000..3571f7baf2 --- /dev/null +++ b/driver/variant/iris33/inc/msm_vidc_buffer_iris33.h @@ -0,0 +1,18 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) 2020-2022, The Linux Foundation. All rights reserved. + * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#ifndef __H_MSM_VIDC_BUFFER_IRIS3_3_H__ +#define __H_MSM_VIDC_BUFFER_IRIS3_3_H__ + +#include "msm_vidc_inst.h" + +int msm_buffer_size_iris33(struct msm_vidc_inst *inst, + enum msm_vidc_buffer_type buffer_type); +int msm_buffer_min_count_iris33(struct msm_vidc_inst *inst, + enum msm_vidc_buffer_type buffer_type); +int msm_buffer_extra_count_iris33(struct msm_vidc_inst *inst, + enum msm_vidc_buffer_type buffer_type); +#endif // __H_MSM_VIDC_BUFFER_IRIS3_3_H__ diff --git a/driver/variant/iris33/inc/msm_vidc_iris33.h b/driver/variant/iris33/inc/msm_vidc_iris33.h new file mode 100644 index 0000000000..bcd59ff05e --- /dev/null +++ b/driver/variant/iris33/inc/msm_vidc_iris33.h @@ -0,0 +1,31 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) 2020-2022, The Linux Foundation. All rights reserved. + * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#ifndef _MSM_VIDC_IRIS3_3_H_ +#define _MSM_VIDC_IRIS3_3_H_ + +#include "msm_vidc_core.h" + +#if defined(CONFIG_MSM_VIDC_IRIS33) +int msm_vidc_init_iris33(struct msm_vidc_core *core); +int msm_vidc_deinit_iris33(struct msm_vidc_core *core); +int msm_vidc_adjust_bitrate_boost_iris33(void *instance, struct v4l2_ctrl *ctrl); +#else +static inline int msm_vidc_init_iris33(struct msm_vidc_core *core) +{ + return -EINVAL; +} +static inline int msm_vidc_deinit_iris33(struct msm_vidc_core *core) +{ + return -EINVAL; +} +static inline int msm_vidc_adjust_bitrate_boost_iris33(void *instance, struct v4l2_ctrl *ctrl) +{ + return -EINVAL; +} +#endif + +#endif // _MSM_VIDC_IRIS3_3_H_ diff --git a/driver/variant/iris33/inc/msm_vidc_power_iris33.h b/driver/variant/iris33/inc/msm_vidc_power_iris33.h new file mode 100644 index 0000000000..1b7f64e826 --- /dev/null +++ b/driver/variant/iris33/inc/msm_vidc_power_iris33.h @@ -0,0 +1,17 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) 2020-2022, The Linux Foundation. All rights reserved. + * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#ifndef __H_MSM_VIDC_POWER_IRIS3_3_H__ +#define __H_MSM_VIDC_POWER_IRIS3_3_H__ + +#include "msm_vidc_power.h" +#include "msm_vidc_inst.h" + +u64 msm_vidc_calc_freq_iris33(struct msm_vidc_inst* inst, u32 data_size); +int msm_vidc_calc_bw_iris33(struct msm_vidc_inst* inst, + struct vidc_bus_vote_data* vote_data); + +#endif diff --git a/driver/variant/iris33/src/msm_vidc_buffer_iris33.c b/driver/variant/iris33/src/msm_vidc_buffer_iris33.c new file mode 100644 index 0000000000..d1c95157b7 --- /dev/null +++ b/driver/variant/iris33/src/msm_vidc_buffer_iris33.c @@ -0,0 +1,837 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2020-2022, The Linux Foundation. All rights reserved. + * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include "hfi_property.h" +#include "hfi_buffer_iris33.h" +#include "msm_vidc_buffer_iris33.h" +#include "msm_vidc_buffer.h" +#include "msm_vidc_inst.h" +#include "msm_vidc_core.h" +#include "msm_vidc_platform.h" +#include "msm_vidc_driver.h" +#include "msm_vidc_debug.h" +#include "msm_media_info.h" +#include "msm_vidc_control.h" + +static u32 msm_vidc_decoder_bin_size_iris33(struct msm_vidc_inst *inst) +{ + struct msm_vidc_core *core; + u32 size = 0; + u32 width, height, num_vpp_pipes; + struct v4l2_format *f; + bool is_interlaced; + u32 vpp_delay; + + if (!inst || !inst->core || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return size; + } + core = inst->core; + + if (!core->capabilities) { + i_vpr_e(inst, "%s: invalid capabilities\n", __func__); + return size; + } + num_vpp_pipes = core->capabilities[NUM_VPP_PIPE].value; + if (inst->decode_vpp_delay.enable) + vpp_delay = inst->decode_vpp_delay.size; + else + vpp_delay = DEFAULT_BSE_VPP_DELAY; + if (inst->capabilities->cap[CODED_FRAMES].value == + CODED_FRAMES_PROGRESSIVE) + is_interlaced = false; + else + is_interlaced = true; + f = &inst->fmts[INPUT_PORT]; + width = f->fmt.pix_mp.width; + height = f->fmt.pix_mp.height; + + if (inst->codec == MSM_VIDC_H264) + HFI_BUFFER_BIN_H264D(size, width, height, + is_interlaced, vpp_delay, num_vpp_pipes); + else if (inst->codec == MSM_VIDC_HEVC || inst->codec == MSM_VIDC_HEIC) + HFI_BUFFER_BIN_H265D(size, width, height, + 0, vpp_delay, num_vpp_pipes); + else if (inst->codec == MSM_VIDC_VP9) + HFI_BUFFER_BIN_VP9D(size, width, height, + 0, num_vpp_pipes); + else if (inst->codec == MSM_VIDC_AV1) + HFI_BUFFER_BIN_AV1D(size, width, height, is_interlaced, + 0, num_vpp_pipes); + i_vpr_l(inst, "%s: size %d\n", __func__, size); + return size; +} + +static u32 msm_vidc_decoder_comv_size_iris33(struct msm_vidc_inst* inst) +{ + u32 size = 0; + u32 width, height, num_comv, vpp_delay; + struct v4l2_format *f; + + if (!inst || !inst->core || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return size; + } + + f = &inst->fmts[INPUT_PORT]; + width = f->fmt.pix_mp.width; + height = f->fmt.pix_mp.height; + + if (inst->codec == MSM_VIDC_AV1) { + /* + * AV1 requires larger COMV buffer size to meet performance + * for certain use cases. Increase the COMV buffer size by + * increasing COMV bufcount. Use lower count for 8k to + * achieve performance but save memory. + */ + if (res_is_greater_than(width, height, 4096, 2176)) + num_comv = inst->buffers.output.min_count + 3; + else + num_comv = inst->buffers.output.min_count + 7; + } else { + num_comv = inst->buffers.output.min_count; + } + msm_vidc_update_cap_value(inst, NUM_COMV, num_comv, __func__); + + if (inst->decode_vpp_delay.enable) + vpp_delay = inst->decode_vpp_delay.size; + else + vpp_delay = DEFAULT_BSE_VPP_DELAY; + num_comv = max(vpp_delay + 1, num_comv); + + if (inst->codec == MSM_VIDC_H264) { + HFI_BUFFER_COMV_H264D(size, width, height, num_comv); + } else if (inst->codec == MSM_VIDC_HEVC || inst->codec == MSM_VIDC_HEIC) { + HFI_BUFFER_COMV_H265D(size, width, height, num_comv); + } else if (inst->codec == MSM_VIDC_AV1) { + /* + * When DRAP is enabled, COMV buffer is part of PERSIST buffer and + * should not be allocated separately. + * When DRAP is disabled, COMV buffer must be allocated. + */ + if (inst->capabilities->cap[DRAP].value) + size = 0; + else + HFI_BUFFER_COMV_AV1D(size, width, height, num_comv); + } + + i_vpr_l(inst, "%s: size %d\n", __func__, size); + return size; +} + +static u32 msm_vidc_decoder_non_comv_size_iris33(struct msm_vidc_inst* inst) +{ + u32 size = 0; + u32 width, height, num_vpp_pipes; + struct msm_vidc_core* core; + struct v4l2_format* f; + + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return size; + } + core = inst->core; + if (!core->capabilities) { + i_vpr_e(inst, "%s: invalid core capabilities\n", __func__); + return size; + } + num_vpp_pipes = core->capabilities[NUM_VPP_PIPE].value; + + f = &inst->fmts[INPUT_PORT]; + width = f->fmt.pix_mp.width; + height = f->fmt.pix_mp.height; + + if (inst->codec == MSM_VIDC_H264) + HFI_BUFFER_NON_COMV_H264D(size, width, height, num_vpp_pipes); + else if (inst->codec == MSM_VIDC_HEVC || inst->codec == MSM_VIDC_HEIC) + HFI_BUFFER_NON_COMV_H265D(size, width, height, num_vpp_pipes); + + i_vpr_l(inst, "%s: size %d\n", __func__, size); + return size; +} + +static u32 msm_vidc_decoder_line_size_iris33(struct msm_vidc_inst *inst) +{ + struct msm_vidc_core *core; + u32 size = 0; + u32 width, height, out_min_count, num_vpp_pipes, vpp_delay; + struct v4l2_format *f; + bool is_opb; + u32 color_fmt; + + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return size; + } + core = inst->core; + if (!core->capabilities) { + i_vpr_e(inst, "%s: invalid capabilities\n", __func__); + return size; + } + num_vpp_pipes = core->capabilities[NUM_VPP_PIPE].value; + + color_fmt = v4l2_colorformat_to_driver(inst, + inst->fmts[OUTPUT_PORT].fmt.pix_mp.pixelformat, __func__); + if (is_linear_colorformat(color_fmt)) + is_opb = true; + else + is_opb = false; + /* + * assume worst case, since color format is unknown at this + * time. + */ + is_opb = true; + + if (inst->decode_vpp_delay.enable) + vpp_delay = inst->decode_vpp_delay.size; + else + vpp_delay = DEFAULT_BSE_VPP_DELAY; + + f = &inst->fmts[INPUT_PORT]; + width = f->fmt.pix_mp.width; + height = f->fmt.pix_mp.height; + out_min_count = inst->buffers.output.min_count; + out_min_count = max(vpp_delay + 1, out_min_count); + if (inst->codec == MSM_VIDC_H264) + HFI_BUFFER_LINE_H264D(size, width, height, is_opb, + num_vpp_pipes); + else if (inst->codec == MSM_VIDC_HEVC || inst->codec == MSM_VIDC_HEIC) + HFI_BUFFER_LINE_H265D(size, width, height, is_opb, + num_vpp_pipes); + else if (inst->codec == MSM_VIDC_VP9) + HFI_BUFFER_LINE_VP9D(size, width, height, out_min_count, + is_opb, num_vpp_pipes); + else if (inst->codec == MSM_VIDC_AV1) + HFI_BUFFER_LINE_AV1D(size, width, height, is_opb, + num_vpp_pipes); + i_vpr_l(inst, "%s: size %d\n", __func__, size); + return size; +} + +static u32 msm_vidc_decoder_partial_data_size_iris33(struct msm_vidc_inst *inst) +{ + u32 size = 0; + u32 width, height; + struct v4l2_format *f; + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return size; + } + + f = &inst->fmts[INPUT_PORT]; + width = f->fmt.pix_mp.width; + height = f->fmt.pix_mp.height; + + if (inst->codec == MSM_VIDC_AV1) + HFI_BUFFER_IBC_AV1D(size, width, height); + + i_vpr_l(inst, "%s: size %d\n", __func__, size); + return size; +} + +static u32 msm_vidc_decoder_persist_size_iris33(struct msm_vidc_inst *inst) +{ + u32 size = 0; + u32 rpu_enabled = 0; + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return size; + } + + if (inst->capabilities->cap[META_DOLBY_RPU].value) + rpu_enabled = 1; + + if (inst->codec == MSM_VIDC_H264) { + HFI_BUFFER_PERSIST_H264D(size, rpu_enabled); + } else if (inst->codec == MSM_VIDC_HEVC || inst->codec == MSM_VIDC_HEIC) { + HFI_BUFFER_PERSIST_H265D(size, rpu_enabled); + } else if (inst->codec == MSM_VIDC_VP9) { + HFI_BUFFER_PERSIST_VP9D(size); + } else if (inst->codec == MSM_VIDC_AV1) { + /* + * When DRAP is enabled, COMV buffer is part of PERSIST buffer and + * should not be allocated separately. PERSIST buffer should include + * COMV buffer calculated with width, height, refcount. + * When DRAP is disabled, COMV buffer should not be included in PERSIST + * buffer. + */ + if (inst->capabilities->cap[DRAP].value) + HFI_BUFFER_PERSIST_AV1D(size, + inst->capabilities->cap[FRAME_WIDTH].max, + inst->capabilities->cap[FRAME_HEIGHT].max, 16); + else + HFI_BUFFER_PERSIST_AV1D(size, 0, 0, 0); + } + + i_vpr_l(inst, "%s: size %d\n", __func__, size); + return size; +} + +static u32 msm_vidc_decoder_dpb_size_iris33(struct msm_vidc_inst *inst) +{ + + u32 size = 0; + u32 color_fmt; + u32 width, height; + struct v4l2_format *f; + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return size; + } + + /* + * For legacy codecs (non-AV1), DPB is calculated only + * for linear formats. For AV1, DPB is needed for film-grain + * enabled bitstreams (UBWC & linear). + */ + color_fmt = inst->capabilities->cap[PIX_FMTS].value; + if (!is_linear_colorformat(color_fmt) && + inst->codec != MSM_VIDC_AV1) + return size; + + f = &inst->fmts[OUTPUT_PORT]; + width = f->fmt.pix_mp.width; + height = f->fmt.pix_mp.height; + + if (color_fmt == MSM_VIDC_FMT_NV12 || + color_fmt == MSM_VIDC_FMT_NV12C) { + color_fmt = MSM_VIDC_FMT_NV12C; + HFI_NV12_UBWC_IL_CALC_BUF_SIZE_V2(size, width, height, + video_y_stride_bytes(color_fmt, width), + video_y_scanlines(color_fmt, height), + video_uv_stride_bytes(color_fmt, width), + video_uv_scanlines(color_fmt, height), + video_y_meta_stride(color_fmt, width), + video_y_meta_scanlines(color_fmt, height), + video_uv_meta_stride(color_fmt, width), + video_uv_meta_scanlines(color_fmt, height)); + } else if (color_fmt == MSM_VIDC_FMT_P010 || + color_fmt == MSM_VIDC_FMT_TP10C) { + color_fmt = MSM_VIDC_FMT_TP10C; + HFI_YUV420_TP10_UBWC_CALC_BUF_SIZE(size, + video_y_stride_bytes(color_fmt, width), + video_y_scanlines(color_fmt, height), + video_uv_stride_bytes(color_fmt, width), + video_uv_scanlines(color_fmt, height), + video_y_meta_stride(color_fmt, width), + video_y_meta_scanlines(color_fmt, height), + video_uv_meta_stride(color_fmt, width), + video_uv_meta_scanlines(color_fmt, height)); + } + + i_vpr_l(inst, "%s: size %d\n", __func__, size); + return size; +} + +/* encoder internal buffers */ +static u32 msm_vidc_encoder_bin_size_iris33(struct msm_vidc_inst *inst) +{ + struct msm_vidc_core *core; + u32 size = 0; + u32 width, height, num_vpp_pipes, stage, profile; + struct v4l2_format *f; + + if (!inst || !inst->core || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return size; + } + core = inst->core; + if (!core->capabilities) { + i_vpr_e(inst, "%s: invalid core capabilities\n", __func__); + return size; + } + num_vpp_pipes = core->capabilities[NUM_VPP_PIPE].value; + stage = inst->capabilities->cap[STAGE].value; + f = &inst->fmts[OUTPUT_PORT]; + width = f->fmt.pix_mp.width; + height = f->fmt.pix_mp.height; + profile = inst->capabilities->cap[PROFILE].value; + + if (inst->codec == MSM_VIDC_H264) + HFI_BUFFER_BIN_H264E(size, inst->hfi_rc_type, width, + height, stage, num_vpp_pipes, profile); + else if (inst->codec == MSM_VIDC_HEVC || inst->codec == MSM_VIDC_HEIC) + HFI_BUFFER_BIN_H265E(size, inst->hfi_rc_type, width, + height, stage, num_vpp_pipes, profile); + + i_vpr_l(inst, "%s: size %d\n", __func__, size); + return size; +} + +static u32 msm_vidc_get_recon_buf_count(struct msm_vidc_inst *inst) +{ + u32 num_buf_recon = 0; + s32 n_bframe, ltr_count, hp_layers = 0, hb_layers = 0; + bool is_hybrid_hp = false; + u32 hfi_codec = 0; + + n_bframe = inst->capabilities->cap[B_FRAME].value; + ltr_count = inst->capabilities->cap[LTR_COUNT].value; + + if (inst->hfi_layer_type == HFI_HIER_B) { + hb_layers = inst->capabilities->cap[ENH_LAYER_COUNT].value + 1; + } else { + hp_layers = inst->capabilities->cap[ENH_LAYER_COUNT].value + 1; + if (inst->hfi_layer_type == HFI_HIER_P_HYBRID_LTR) + is_hybrid_hp = true; + } + + if (inst->codec == MSM_VIDC_H264) + hfi_codec = HFI_CODEC_ENCODE_AVC; + else if (inst->codec == MSM_VIDC_HEVC || inst->codec == MSM_VIDC_HEIC) + hfi_codec = HFI_CODEC_ENCODE_HEVC; + + HFI_IRIS3_ENC_RECON_BUF_COUNT(num_buf_recon, n_bframe, ltr_count, + hp_layers, hb_layers, is_hybrid_hp, hfi_codec); + + return num_buf_recon; +} + +static u32 msm_vidc_encoder_comv_size_iris33(struct msm_vidc_inst* inst) +{ + u32 size = 0; + u32 width, height, num_recon = 0; + struct v4l2_format* f; + + if (!inst || !inst->core || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return size; + } + + f = &inst->fmts[OUTPUT_PORT]; + width = f->fmt.pix_mp.width; + height = f->fmt.pix_mp.height; + + num_recon = msm_vidc_get_recon_buf_count(inst); + if (inst->codec == MSM_VIDC_H264) + HFI_BUFFER_COMV_H264E(size, width, height, num_recon); + else if (inst->codec == MSM_VIDC_HEVC || inst->codec == MSM_VIDC_HEIC) + HFI_BUFFER_COMV_H265E(size, width, height, num_recon); + + i_vpr_l(inst, "%s: size %d\n", __func__, size); + return size; +} + +static u32 msm_vidc_encoder_non_comv_size_iris33(struct msm_vidc_inst* inst) +{ + struct msm_vidc_core* core; + u32 size = 0; + u32 width, height, num_vpp_pipes; + struct v4l2_format* f; + + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return size; + } + core = inst->core; + if (!core->capabilities) { + i_vpr_e(inst, "%s: invalid core capabilities\n", __func__); + return size; + } + num_vpp_pipes = core->capabilities[NUM_VPP_PIPE].value; + f = &inst->fmts[OUTPUT_PORT]; + width = f->fmt.pix_mp.width; + height = f->fmt.pix_mp.height; + + if (inst->codec == MSM_VIDC_H264) + HFI_BUFFER_NON_COMV_H264E(size, width, height, num_vpp_pipes); + else if (inst->codec == MSM_VIDC_HEVC || inst->codec == MSM_VIDC_HEIC) + HFI_BUFFER_NON_COMV_H265E(size, width, height, num_vpp_pipes); + + i_vpr_l(inst, "%s: size %d\n", __func__, size); + return size; +} + +static u32 msm_vidc_encoder_line_size_iris33(struct msm_vidc_inst *inst) +{ + struct msm_vidc_core *core; + u32 size = 0; + u32 width, height, pixfmt, num_vpp_pipes; + bool is_tenbit = false; + struct v4l2_format *f; + + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return size; + } + core = inst->core; + if (!core->capabilities || !inst->capabilities) { + i_vpr_e(inst, "%s: invalid capabilities\n", __func__); + return size; + } + num_vpp_pipes = core->capabilities[NUM_VPP_PIPE].value; + pixfmt = inst->capabilities->cap[PIX_FMTS].value; + + f = &inst->fmts[OUTPUT_PORT]; + width = f->fmt.pix_mp.width; + height = f->fmt.pix_mp.height; + is_tenbit = (pixfmt == MSM_VIDC_FMT_P010 || pixfmt == MSM_VIDC_FMT_TP10C); + + if (inst->codec == MSM_VIDC_H264) + HFI_BUFFER_LINE_H264E(size, width, height, is_tenbit, num_vpp_pipes); + else if (inst->codec == MSM_VIDC_HEVC || inst->codec == MSM_VIDC_HEIC) + HFI_BUFFER_LINE_H265E(size, width, height, is_tenbit, num_vpp_pipes); + + i_vpr_l(inst, "%s: size %d\n", __func__, size); + return size; +} + +static u32 msm_vidc_encoder_dpb_size_iris33(struct msm_vidc_inst *inst) +{ + u32 size = 0; + u32 width, height, pixfmt; + struct v4l2_format *f; + bool is_tenbit; + + if (!inst || !inst->core || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return 0; + } + + f = &inst->fmts[OUTPUT_PORT]; + width = f->fmt.pix_mp.width; + height = f->fmt.pix_mp.height; + + pixfmt = inst->capabilities->cap[PIX_FMTS].value; + is_tenbit = (pixfmt == MSM_VIDC_FMT_P010 || pixfmt == MSM_VIDC_FMT_TP10C); + + if (inst->codec == MSM_VIDC_H264) + HFI_BUFFER_DPB_H264E(size, width, height); + else if (inst->codec == MSM_VIDC_HEVC || inst->codec == MSM_VIDC_HEIC) + HFI_BUFFER_DPB_H265E(size, width, height, is_tenbit); + + i_vpr_l(inst, "%s: size %d\n", __func__, size); + return size; +} + +static u32 msm_vidc_encoder_arp_size_iris33(struct msm_vidc_inst *inst) +{ + u32 size = 0; + + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return 0; + } + + HFI_BUFFER_ARP_ENC(size); + i_vpr_l(inst, "%s: size %d\n", __func__, size); + return size; +} + +static u32 msm_vidc_encoder_vpss_size_iris33(struct msm_vidc_inst* inst) +{ + u32 size = 0; + bool ds_enable = false, is_tenbit = false, blur = false; + u32 rotation_val = HFI_ROTATION_NONE; + u32 width, height, driver_colorfmt; + struct v4l2_format* f; + + if (!inst || !inst->core || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return 0; + } + + ds_enable = is_scaling_enabled(inst); + msm_vidc_v4l2_to_hfi_enum(inst, ROTATION, &rotation_val); + + f = &inst->fmts[OUTPUT_PORT]; + if (is_rotation_90_or_270(inst)) { + /* + * output width and height are rotated, + * so unrotate them to use as arguments to + * HFI_BUFFER_VPSS_ENC. + */ + width = f->fmt.pix_mp.height; + height = f->fmt.pix_mp.width; + } else { + width = f->fmt.pix_mp.width; + height = f->fmt.pix_mp.height; + } + + f = &inst->fmts[INPUT_PORT]; + driver_colorfmt = v4l2_colorformat_to_driver(inst, + f->fmt.pix_mp.pixelformat, __func__); + is_tenbit = is_10bit_colorformat(driver_colorfmt); + if (inst->capabilities->cap[BLUR_TYPES].value != MSM_VIDC_BLUR_NONE) + blur = true; + + HFI_BUFFER_VPSS_ENC(size, width, height, ds_enable, blur, is_tenbit); + i_vpr_l(inst, "%s: size %d\n", __func__, size); + return size; +} + +static u32 msm_vidc_encoder_output_size_iris33(struct msm_vidc_inst *inst) +{ + u32 frame_size; + struct v4l2_format *f; + bool is_ten_bit = false; + int bitrate_mode, frame_rc; + u32 hfi_rc_type = HFI_RC_VBR_CFR; + enum msm_vidc_codec_type codec; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + f = &inst->fmts[OUTPUT_PORT]; + codec = v4l2_codec_to_driver(inst, f->fmt.pix_mp.pixelformat, __func__); + if (codec == MSM_VIDC_HEVC || codec == MSM_VIDC_HEIC) + is_ten_bit = true; + + bitrate_mode = inst->capabilities->cap[BITRATE_MODE].value; + frame_rc = inst->capabilities->cap[FRAME_RC_ENABLE].value; + if (!frame_rc && !is_image_session(inst)) + hfi_rc_type = HFI_RC_OFF; + else if (bitrate_mode == V4L2_MPEG_VIDEO_BITRATE_MODE_CQ) + hfi_rc_type = HFI_RC_CQ; + + HFI_BUFFER_BITSTREAM_ENC(frame_size, f->fmt.pix_mp.width, + f->fmt.pix_mp.height, hfi_rc_type, is_ten_bit); + + frame_size = msm_vidc_enc_delivery_mode_based_output_buf_size(inst, frame_size); + + return frame_size; +} + +struct msm_vidc_buf_type_handle { + enum msm_vidc_buffer_type type; + u32 (*handle)(struct msm_vidc_inst *inst); +}; + +int msm_buffer_size_iris33(struct msm_vidc_inst *inst, + enum msm_vidc_buffer_type buffer_type) +{ + int i; + u32 size = 0, buf_type_handle_size = 0; + const struct msm_vidc_buf_type_handle *buf_type_handle_arr = NULL; + static const struct msm_vidc_buf_type_handle dec_buf_type_handle[] = { + {MSM_VIDC_BUF_INPUT, msm_vidc_decoder_input_size }, + {MSM_VIDC_BUF_OUTPUT, msm_vidc_decoder_output_size }, + {MSM_VIDC_BUF_INPUT_META, msm_vidc_decoder_input_meta_size }, + {MSM_VIDC_BUF_OUTPUT_META, msm_vidc_decoder_output_meta_size }, + {MSM_VIDC_BUF_BIN, msm_vidc_decoder_bin_size_iris33 }, + {MSM_VIDC_BUF_COMV, msm_vidc_decoder_comv_size_iris33 }, + {MSM_VIDC_BUF_NON_COMV, msm_vidc_decoder_non_comv_size_iris33 }, + {MSM_VIDC_BUF_LINE, msm_vidc_decoder_line_size_iris33 }, + {MSM_VIDC_BUF_PERSIST, msm_vidc_decoder_persist_size_iris33 }, + {MSM_VIDC_BUF_DPB, msm_vidc_decoder_dpb_size_iris33 }, + {MSM_VIDC_BUF_PARTIAL_DATA, msm_vidc_decoder_partial_data_size_iris33 }, + }; + static const struct msm_vidc_buf_type_handle enc_buf_type_handle[] = { + {MSM_VIDC_BUF_INPUT, msm_vidc_encoder_input_size }, + {MSM_VIDC_BUF_OUTPUT, msm_vidc_encoder_output_size_iris33 }, + {MSM_VIDC_BUF_INPUT_META, msm_vidc_encoder_input_meta_size }, + {MSM_VIDC_BUF_OUTPUT_META, msm_vidc_encoder_output_meta_size }, + {MSM_VIDC_BUF_BIN, msm_vidc_encoder_bin_size_iris33 }, + {MSM_VIDC_BUF_COMV, msm_vidc_encoder_comv_size_iris33 }, + {MSM_VIDC_BUF_NON_COMV, msm_vidc_encoder_non_comv_size_iris33 }, + {MSM_VIDC_BUF_LINE, msm_vidc_encoder_line_size_iris33 }, + {MSM_VIDC_BUF_DPB, msm_vidc_encoder_dpb_size_iris33 }, + {MSM_VIDC_BUF_ARP, msm_vidc_encoder_arp_size_iris33 }, + {MSM_VIDC_BUF_VPSS, msm_vidc_encoder_vpss_size_iris33 }, + }; + + if (is_decode_session(inst)) { + buf_type_handle_size = ARRAY_SIZE(dec_buf_type_handle); + buf_type_handle_arr = dec_buf_type_handle; + } else if (is_encode_session(inst)) { + buf_type_handle_size = ARRAY_SIZE(enc_buf_type_handle); + buf_type_handle_arr = enc_buf_type_handle; + } + + /* handle invalid session */ + if (!buf_type_handle_arr || !buf_type_handle_size) { + i_vpr_e(inst, "%s: invalid session %d\n", __func__, inst->domain); + return size; + } + + /* fetch buffer size */ + for (i = 0; i < buf_type_handle_size; i++) { + if (buf_type_handle_arr[i].type == buffer_type) { + size = buf_type_handle_arr[i].handle(inst); + break; + } + } + + /* handle unknown buffer type */ + if (i == buf_type_handle_size) { + i_vpr_e(inst, "%s: unknown buffer type %#x\n", __func__, buffer_type); + goto exit; + } + + i_vpr_l(inst, "buffer_size: type: %11s, size: %9u\n", buf_name(buffer_type), size); + +exit: + return size; +} + +static int msm_vidc_input_min_count_iris33(struct msm_vidc_inst* inst) +{ + u32 input_min_count = 0; + u32 total_hb_layer = 0; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return 0; + } + + if (is_decode_session(inst)) { + input_min_count = MIN_DEC_INPUT_BUFFERS; + } else if (is_encode_session(inst)) { + total_hb_layer = is_hierb_type_requested(inst) ? + inst->capabilities->cap[ENH_LAYER_COUNT].value + 1 : 0; + if (inst->codec == MSM_VIDC_H264 && + !inst->capabilities->cap[LAYER_ENABLE].value) { + total_hb_layer = 0; + } + HFI_IRIS3_ENC_MIN_INPUT_BUF_COUNT(input_min_count, + total_hb_layer); + } else { + i_vpr_e(inst, "%s: invalid domain %d\n", __func__, inst->domain); + return 0; + } + + if (is_thumbnail_session(inst) || is_image_session(inst)) + input_min_count = 1; + + return input_min_count; +} + +static int msm_buffer_dpb_count(struct msm_vidc_inst *inst) +{ + int count = 0; + u32 color_fmt; + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return 0; + } + + /* decoder dpb buffer count */ + if (is_decode_session(inst)) { + color_fmt = inst->capabilities->cap[PIX_FMTS].value; + if (is_linear_colorformat(color_fmt) || + (inst->codec == MSM_VIDC_AV1 && + (inst->capabilities->cap[FILM_GRAIN].value))) + count = inst->buffers.output.min_count; + + return count; + } + + /* encoder dpb buffer count */ + return msm_vidc_get_recon_buf_count(inst); +} + +static int msm_buffer_delivery_mode_based_min_count_iris33(struct msm_vidc_inst *inst, + uint32_t count) +{ + struct v4l2_format *f; + u32 width, height, total_num_slices = 1; + u32 hfi_codec = 0; + u32 max_mbs_per_slice = 0; + u32 slice_mode = 0; + u32 delivery_mode = 0; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return count; + } + + slice_mode = inst->capabilities->cap[SLICE_MODE].value; + delivery_mode = inst->capabilities->cap[DELIVERY_MODE].value; + + if (slice_mode != V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_MB || + (!delivery_mode)) + return count; + + f = &inst->fmts[OUTPUT_PORT]; + width = f->fmt.pix_mp.width; + height = f->fmt.pix_mp.height; + + max_mbs_per_slice = inst->capabilities->cap[SLICE_MAX_MB].value; + + if (inst->codec == MSM_VIDC_H264) + hfi_codec = HFI_CODEC_ENCODE_AVC; + else if (inst->codec == MSM_VIDC_HEVC) + hfi_codec = HFI_CODEC_ENCODE_HEVC; + + HFI_IRIS3_ENC_MB_BASED_MULTI_SLICE_COUNT(total_num_slices, width, height, + hfi_codec, max_mbs_per_slice); + + return (total_num_slices * count); +} + +int msm_buffer_min_count_iris33(struct msm_vidc_inst *inst, + enum msm_vidc_buffer_type buffer_type) +{ + int count = 0; + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return 0; + } + + switch (buffer_type) { + case MSM_VIDC_BUF_INPUT: + case MSM_VIDC_BUF_INPUT_META: + count = msm_vidc_input_min_count_iris33(inst); + break; + case MSM_VIDC_BUF_OUTPUT: + case MSM_VIDC_BUF_OUTPUT_META: + count = msm_vidc_output_min_count(inst); + count = msm_buffer_delivery_mode_based_min_count_iris33(inst, count); + break; + case MSM_VIDC_BUF_BIN: + case MSM_VIDC_BUF_COMV: + case MSM_VIDC_BUF_NON_COMV: + case MSM_VIDC_BUF_LINE: + case MSM_VIDC_BUF_PERSIST: + case MSM_VIDC_BUF_ARP: + case MSM_VIDC_BUF_VPSS: + case MSM_VIDC_BUF_PARTIAL_DATA: + count = msm_vidc_internal_buffer_count(inst, buffer_type); + break; + case MSM_VIDC_BUF_DPB: + count = msm_buffer_dpb_count(inst); + break; + default: + break; + } + + i_vpr_l(inst, " min_count: type: %11s, count: %9u\n", buf_name(buffer_type), count); + return count; +} + +int msm_buffer_extra_count_iris33(struct msm_vidc_inst *inst, + enum msm_vidc_buffer_type buffer_type) +{ + int count = 0; + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return 0; + } + + switch (buffer_type) { + case MSM_VIDC_BUF_INPUT: + case MSM_VIDC_BUF_INPUT_META: + count = msm_vidc_input_extra_count(inst); + break; + case MSM_VIDC_BUF_OUTPUT: + case MSM_VIDC_BUF_OUTPUT_META: + count = msm_vidc_output_extra_count(inst); + break; + default: + break; + } + + i_vpr_l(inst, "extra_count: type: %11s, count: %9u\n", buf_name(buffer_type), count); + return count; +} diff --git a/driver/variant/iris33/src/msm_vidc_iris33.c b/driver/variant/iris33/src/msm_vidc_iris33.c new file mode 100644 index 0000000000..6dd2aa77d8 --- /dev/null +++ b/driver/variant/iris33/src/msm_vidc_iris33.c @@ -0,0 +1,1121 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2020-2022, The Linux Foundation. All rights reserved. + * Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include "msm_vidc_iris33.h" +#include "msm_vidc_buffer_iris33.h" +#include "msm_vidc_power_iris33.h" +#include "venus_hfi.h" +#include "msm_vidc_inst.h" +#include "msm_vidc_core.h" +#include "msm_vidc_driver.h" +#include "msm_vidc_control.h" +#include "msm_vidc_dt.h" +#include "msm_vidc_internal.h" +#include "msm_vidc_buffer.h" +#include "msm_vidc_debug.h" +#include "msm_vidc_variant.h" + +#define VIDEO_ARCH_LX 1 + +#define VCODEC_BASE_OFFS_IRIS33 0x00000000 +#define AON_MVP_NOC_RESET 0x0001F000 +#define CPU_BASE_OFFS_IRIS33 0x000A0000 +#define AON_BASE_OFFS 0x000E0000 +#define CPU_CS_BASE_OFFS_IRIS33 (CPU_BASE_OFFS_IRIS33) +#define CPU_IC_BASE_OFFS_IRIS33 (CPU_BASE_OFFS_IRIS33) + +#define CPU_CS_A2HSOFTINTCLR_IRIS33 (CPU_CS_BASE_OFFS_IRIS33 + 0x1C) +#define CPU_CS_VCICMD_IRIS33 (CPU_CS_BASE_OFFS_IRIS33 + 0x20) +#define CPU_CS_VCICMDARG0_IRIS33 (CPU_CS_BASE_OFFS_IRIS33 + 0x24) +#define CPU_CS_VCICMDARG1_IRIS33 (CPU_CS_BASE_OFFS_IRIS33 + 0x28) +#define CPU_CS_VCICMDARG2_IRIS33 (CPU_CS_BASE_OFFS_IRIS33 + 0x2C) +#define CPU_CS_VCICMDARG3_IRIS33 (CPU_CS_BASE_OFFS_IRIS33 + 0x30) +#define CPU_CS_VMIMSG_IRIS33 (CPU_CS_BASE_OFFS_IRIS33 + 0x34) +#define CPU_CS_VMIMSGAG0_IRIS33 (CPU_CS_BASE_OFFS_IRIS33 + 0x38) +#define CPU_CS_VMIMSGAG1_IRIS33 (CPU_CS_BASE_OFFS_IRIS33 + 0x3C) +#define CPU_CS_SCIACMD_IRIS33 (CPU_CS_BASE_OFFS_IRIS33 + 0x48) +#define CPU_CS_H2XSOFTINTEN_IRIS33 (CPU_CS_BASE_OFFS_IRIS33 + 0x148) + +/* HFI_CTRL_STATUS */ +#define CPU_CS_SCIACMDARG0_IRIS33 (CPU_CS_BASE_OFFS_IRIS33 + 0x4C) +#define CPU_CS_SCIACMDARG0_HFI_CTRL_ERROR_STATUS_BMSK_IRIS33 0xfe +#define CPU_CS_SCIACMDARG0_HFI_CTRL_PC_READY_IRIS33 0x100 +#define CPU_CS_SCIACMDARG0_HFI_CTRL_INIT_IDLE_MSG_BMSK_IRIS33 0x40000000 + +/* HFI_QTBL_INFO */ +#define CPU_CS_SCIACMDARG1_IRIS33 (CPU_CS_BASE_OFFS_IRIS33 + 0x50) + +/* HFI_QTBL_ADDR */ +#define CPU_CS_SCIACMDARG2_IRIS33 (CPU_CS_BASE_OFFS_IRIS33 + 0x54) + +/* HFI_VERSION_INFO */ +#define CPU_CS_SCIACMDARG3_IRIS33 (CPU_CS_BASE_OFFS_IRIS33 + 0x58) + +/* SFR_ADDR */ +#define CPU_CS_SCIBCMD_IRIS33 (CPU_CS_BASE_OFFS_IRIS33 + 0x5C) + +/* MMAP_ADDR */ +#define CPU_CS_SCIBCMDARG0_IRIS33 (CPU_CS_BASE_OFFS_IRIS33 + 0x60) + +/* UC_REGION_ADDR */ +#define CPU_CS_SCIBARG1_IRIS33 (CPU_CS_BASE_OFFS_IRIS33 + 0x64) + +/* UC_REGION_ADDR */ +#define CPU_CS_SCIBARG2_IRIS33 (CPU_CS_BASE_OFFS_IRIS33 + 0x68) + +#define CPU_CS_AHB_BRIDGE_SYNC_RESET (CPU_CS_BASE_OFFS_IRIS33 + 0x160) +#define CPU_CS_AHB_BRIDGE_SYNC_RESET_STATUS (CPU_CS_BASE_OFFS_IRIS33 + 0x164) + +/* FAL10 Feature Control */ +#define CPU_CS_X2RPMh_IRIS33 (CPU_CS_BASE_OFFS_IRIS33 + 0x168) +#define CPU_CS_X2RPMh_MASK0_BMSK_IRIS33 0x1 +#define CPU_CS_X2RPMh_MASK0_SHFT_IRIS33 0x0 +#define CPU_CS_X2RPMh_MASK1_BMSK_IRIS33 0x2 +#define CPU_CS_X2RPMh_MASK1_SHFT_IRIS33 0x1 +#define CPU_CS_X2RPMh_SWOVERRIDE_BMSK_IRIS33 0x4 +#define CPU_CS_X2RPMh_SWOVERRIDE_SHFT_IRIS33 0x3 + +#define CPU_IC_SOFTINT_IRIS33 (CPU_IC_BASE_OFFS_IRIS33 + 0x150) +#define CPU_IC_SOFTINT_H2A_SHFT_IRIS33 0x0 + +/* + * -------------------------------------------------------------------------- + * MODULE: AON_MVP_NOC_RESET_REGISTERS + * -------------------------------------------------------------------------- + */ +#define AON_WRAPPER_MVP_NOC_RESET_REQ (AON_MVP_NOC_RESET + 0x000) +#define AON_WRAPPER_MVP_NOC_RESET_ACK (AON_MVP_NOC_RESET + 0x004) + +/* + * -------------------------------------------------------------------------- + * MODULE: wrapper + * -------------------------------------------------------------------------- + */ +#define WRAPPER_BASE_OFFS_IRIS33 0x000B0000 +#define WRAPPER_INTR_STATUS_IRIS33 (WRAPPER_BASE_OFFS_IRIS33 + 0x0C) +#define WRAPPER_INTR_STATUS_A2HWD_BMSK_IRIS33 0x8 +#define WRAPPER_INTR_STATUS_A2H_BMSK_IRIS33 0x4 + +#define WRAPPER_INTR_MASK_IRIS33 (WRAPPER_BASE_OFFS_IRIS33 + 0x10) +#define WRAPPER_INTR_MASK_A2HWD_BMSK_IRIS33 0x8 +#define WRAPPER_INTR_MASK_A2HCPU_BMSK_IRIS33 0x4 + +#define WRAPPER_CPU_CLOCK_CONFIG_IRIS33 (WRAPPER_BASE_OFFS_IRIS33 + 0x2000) +#define WRAPPER_CPU_CGC_DIS_IRIS33 (WRAPPER_BASE_OFFS_IRIS33 + 0x2010) +#define WRAPPER_CPU_STATUS_IRIS33 (WRAPPER_BASE_OFFS_IRIS33 + 0x2014) + +#define WRAPPER_DEBUG_BRIDGE_LPI_CONTROL_IRIS33 (WRAPPER_BASE_OFFS_IRIS33 + 0x54) +#define WRAPPER_DEBUG_BRIDGE_LPI_STATUS_IRIS33 (WRAPPER_BASE_OFFS_IRIS33 + 0x58) +#define WRAPPER_IRIS_CPU_NOC_LPI_CONTROL (WRAPPER_BASE_OFFS_IRIS33 + 0x5C) +#define WRAPPER_IRIS_CPU_NOC_LPI_STATUS (WRAPPER_BASE_OFFS_IRIS33 + 0x60) +#define WRAPPER_CORE_POWER_STATUS (WRAPPER_BASE_OFFS_IRIS33 + 0x80) +#define WRAPPER_CORE_CLOCK_CONFIG_IRIS33 (WRAPPER_BASE_OFFS_IRIS33 + 0x88) + +/* + * -------------------------------------------------------------------------- + * MODULE: tz_wrapper + * -------------------------------------------------------------------------- + */ +#define WRAPPER_TZ_BASE_OFFS 0x000C0000 +#define WRAPPER_TZ_CPU_CLOCK_CONFIG (WRAPPER_TZ_BASE_OFFS) +#define WRAPPER_TZ_CPU_STATUS (WRAPPER_TZ_BASE_OFFS + 0x10) +#define WRAPPER_TZ_CTL_AXI_CLOCK_CONFIG (WRAPPER_TZ_BASE_OFFS + 0x14) +#define WRAPPER_TZ_QNS4PDXFIFO_RESET (WRAPPER_TZ_BASE_OFFS + 0x18) + +#define CTRL_INIT_IRIS33 CPU_CS_SCIACMD_IRIS33 + +#define CTRL_STATUS_IRIS33 CPU_CS_SCIACMDARG0_IRIS33 +#define CTRL_ERROR_STATUS__M_IRIS33 \ + CPU_CS_SCIACMDARG0_HFI_CTRL_ERROR_STATUS_BMSK_IRIS33 +#define CTRL_INIT_IDLE_MSG_BMSK_IRIS33 \ + CPU_CS_SCIACMDARG0_HFI_CTRL_INIT_IDLE_MSG_BMSK_IRIS33 +#define CTRL_STATUS_PC_READY_IRIS33 \ + CPU_CS_SCIACMDARG0_HFI_CTRL_PC_READY_IRIS33 + + +#define QTBL_INFO_IRIS33 CPU_CS_SCIACMDARG1_IRIS33 + +#define QTBL_ADDR_IRIS33 CPU_CS_SCIACMDARG2_IRIS33 + +#define VERSION_INFO_IRIS33 CPU_CS_SCIACMDARG3_IRIS33 + +#define SFR_ADDR_IRIS33 CPU_CS_SCIBCMD_IRIS33 +#define MMAP_ADDR_IRIS33 CPU_CS_SCIBCMDARG0_IRIS33 +#define UC_REGION_ADDR_IRIS33 CPU_CS_SCIBARG1_IRIS33 +#define UC_REGION_SIZE_IRIS33 CPU_CS_SCIBARG2_IRIS33 + +#define AON_WRAPPER_MVP_NOC_LPI_CONTROL (AON_BASE_OFFS) +#define AON_WRAPPER_MVP_NOC_LPI_STATUS (AON_BASE_OFFS + 0x4) + +/* + * -------------------------------------------------------------------------- + * MODULE: VCODEC_SS registers + * -------------------------------------------------------------------------- + */ +#define VCODEC_SS_IDLE_STATUSn (VCODEC_BASE_OFFS_IRIS33 + 0x70) + +/* + * -------------------------------------------------------------------------- + * MODULE: vcodec noc error log registers (iris33) + * -------------------------------------------------------------------------- + */ +#define VCODEC_NOC_VIDEO_A_NOC_BASE_OFFS 0x00010000 +#define VCODEC_NOC_ERL_MAIN_SWID_LOW 0x00011200 +#define VCODEC_NOC_ERL_MAIN_SWID_HIGH 0x00011204 +#define VCODEC_NOC_ERL_MAIN_MAINCTL_LOW 0x00011208 +#define VCODEC_NOC_ERL_MAIN_ERRVLD_LOW 0x00011210 +#define VCODEC_NOC_ERL_MAIN_ERRCLR_LOW 0x00011218 +#define VCODEC_NOC_ERL_MAIN_ERRLOG0_LOW 0x00011220 +#define VCODEC_NOC_ERL_MAIN_ERRLOG0_HIGH 0x00011224 +#define VCODEC_NOC_ERL_MAIN_ERRLOG1_LOW 0x00011228 +#define VCODEC_NOC_ERL_MAIN_ERRLOG1_HIGH 0x0001122C +#define VCODEC_NOC_ERL_MAIN_ERRLOG2_LOW 0x00011230 +#define VCODEC_NOC_ERL_MAIN_ERRLOG2_HIGH 0x00011234 +#define VCODEC_NOC_ERL_MAIN_ERRLOG3_LOW 0x00011238 +#define VCODEC_NOC_ERL_MAIN_ERRLOG3_HIGH 0x0001123C + +static int __interrupt_init_iris33(struct msm_vidc_core *vidc_core) +{ + struct msm_vidc_core *core = vidc_core; + u32 mask_val = 0; + int rc = 0; + + if (!core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + /* All interrupts should be disabled initially 0x1F6 : Reset value */ + rc = __read_register(core, WRAPPER_INTR_MASK_IRIS33, &mask_val); + if (rc) + return rc; + + /* Write 0 to unmask CPU and WD interrupts */ + mask_val &= ~(WRAPPER_INTR_MASK_A2HWD_BMSK_IRIS33| + WRAPPER_INTR_MASK_A2HCPU_BMSK_IRIS33); + rc = __write_register(core, WRAPPER_INTR_MASK_IRIS33, mask_val); + if (rc) + return rc; + + return 0; +} + +static int __setup_ucregion_memory_map_iris33(struct msm_vidc_core *vidc_core) +{ + struct msm_vidc_core *core = vidc_core; + u32 value; + int rc = 0; + + if (!core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + value = (u32)core->iface_q_table.align_device_addr; + rc = __write_register(core, UC_REGION_ADDR_IRIS33, value); + if (rc) + return rc; + + value = SHARED_QSIZE; + rc = __write_register(core, UC_REGION_SIZE_IRIS33, value); + if (rc) + return rc; + + value = (u32)core->iface_q_table.align_device_addr; + rc = __write_register(core, QTBL_ADDR_IRIS33, value); + if (rc) + return rc; + + rc = __write_register(core, QTBL_INFO_IRIS33, 0x01); + if (rc) + return rc; + + /* update queues vaddr for debug purpose */ + value = (u32)((u64)core->iface_q_table.align_virtual_addr); + rc = __write_register(core, CPU_CS_VCICMDARG0_IRIS33, value); + if (rc) + return rc; + + value = (u32)((u64)core->iface_q_table.align_virtual_addr >> 32); + rc = __write_register(core, CPU_CS_VCICMDARG1_IRIS33, value); + if (rc) + return rc; + + if (core->sfr.align_device_addr) { + value = (u32)core->sfr.align_device_addr + VIDEO_ARCH_LX; + rc = __write_register(core, SFR_ADDR_IRIS33, value); + if (rc) + return rc; + } + + return 0; +} + +static bool is_iris33_hw_power_collapsed(struct msm_vidc_core *core) +{ + int rc = 0; + u32 value = 0, pwr_status = 0; + + rc = __read_register(core, WRAPPER_CORE_POWER_STATUS, &value); + if (rc) + return false; + + /* if BIT(1) is 1 then video hw power is on else off */ + pwr_status = value & BIT(1); + return pwr_status ? false : true; +} + +static int __power_off_iris33_hardware(struct msm_vidc_core *core) +{ + const struct msm_vidc_resources_ops *res_ops = core->res_ops; + int rc = 0, i; + u32 value = 0; + bool pwr_collapsed = false; + + /* + * Incase hw power control is enabled, when CPU WD occurred, check for power + * status to decide on executing NOC reset sequence before disabling power. + * If there is no CPU WD and hw_power_control is enabled, fw is expected + * to power collapse video hw always. + */ + if (core->hw_power_control) { + pwr_collapsed = is_iris33_hw_power_collapsed(core); + if (core->cpu_watchdog) { + if (pwr_collapsed) { + d_vpr_e("%s: CPU WD and video hw power collapsed\n", __func__); + goto disable_power; + } else { + d_vpr_e("%s: CPU WD and video hw is power ON\n", __func__); + } + } else { + if (!pwr_collapsed) + d_vpr_e("%s: video hw is not power collapsed\n", __func__); + + goto disable_power; + } + } + + /* + * check to make sure core clock branch enabled else + * we cannot read vcodec top idle register + */ + rc = __read_register(core, WRAPPER_CORE_CLOCK_CONFIG_IRIS33, &value); + if (rc) + return rc; + + if (value) { + d_vpr_h("%s: core clock config not enabled, enabling it to read vcodec registers\n", + __func__); + rc = __write_register(core, WRAPPER_CORE_CLOCK_CONFIG_IRIS33, 0); + if (rc) + return rc; + } + + /* + * add MNoC idle check before collapsing MVS0 per HPG update + * poll for NoC DMA idle -> HPG 6.1.1 + */ + for (i = 0; i < core->capabilities[NUM_VPP_PIPE].value; i++) { + rc = __read_register_with_poll_timeout(core, VCODEC_SS_IDLE_STATUSn + 4*i, + 0x400000, 0x400000, 2000, 20000); + if (rc) + d_vpr_h("%s: VCODEC_SS_IDLE_STATUSn (%d) is not idle (%#x)\n", + __func__, i, value); + } + + /* Apply partial reset on MSF interface and wait for ACK */ + rc = __write_register(core, AON_WRAPPER_MVP_NOC_RESET_REQ, 0x3); + if (rc) + return rc; + + rc = __read_register_with_poll_timeout(core, AON_WRAPPER_MVP_NOC_RESET_ACK, + 0x3, 0x3, 200, 2000); + if (rc) + d_vpr_h("%s: AON_WRAPPER_MVP_NOC_RESET assert failed\n", __func__); + + /* De-assert partial reset on MSF interface and wait for ACK */ + rc = __write_register(core, AON_WRAPPER_MVP_NOC_RESET_REQ, 0x0); + if (rc) + return rc; + + rc = __read_register_with_poll_timeout(core, AON_WRAPPER_MVP_NOC_RESET_ACK, + 0x3, 0x0, 200, 2000); + if (rc) + d_vpr_h("%s: AON_WRAPPER_MVP_NOC_RESET de-assert failed\n", __func__); + + /* + * Reset both sides of 2 ahb2ahb_bridges (TZ and non-TZ) + * do we need to check status register here? + */ + rc = __write_register(core, CPU_CS_AHB_BRIDGE_SYNC_RESET, 0x3); + if (rc) + return rc; + rc = __write_register(core, CPU_CS_AHB_BRIDGE_SYNC_RESET, 0x2); + if (rc) + return rc; + rc = __write_register(core, CPU_CS_AHB_BRIDGE_SYNC_RESET, 0x0); + if (rc) + return rc; + +disable_power: + /* power down process */ + rc = res_ops->gdsc_off(core, "vcodec"); + if (rc) { + d_vpr_e("%s: disable regulator vcodec failed\n", __func__); + rc = 0; + } + + rc = res_ops->clk_disable(core, "vcodec_clk"); + if (rc) { + d_vpr_e("%s: disable unprepare vcodec_clk failed\n", __func__); + rc = 0; + } + + return rc; +} + +static int __power_off_iris33_controller(struct msm_vidc_core *core) +{ + const struct msm_vidc_resources_ops *res_ops = core->res_ops; + int rc = 0; + + /* + * mask fal10_veto QLPAC error since fal10_veto can go 1 + * when pwwait == 0 and clamped to 0 -> HPG 6.1.2 + */ + rc = __write_register(core, CPU_CS_X2RPMh_IRIS33, 0x3); + if (rc) + return rc; + + /* set MNoC to low power, set PD_NOC_QREQ (bit 0) */ + rc = __write_register_masked(core, AON_WRAPPER_MVP_NOC_LPI_CONTROL, + 0x1, BIT(0)); + if (rc) + return rc; + + rc = __read_register_with_poll_timeout(core, AON_WRAPPER_MVP_NOC_LPI_STATUS, + 0x1, 0x1, 200, 2000); + if (rc) + d_vpr_h("%s: AON_WRAPPER_MVP_NOC_LPI_CONTROL failed\n", __func__); + + /* Set Iris CPU NoC to Low power */ + rc = __write_register_masked(core, WRAPPER_IRIS_CPU_NOC_LPI_CONTROL, + 0x1, BIT(0)); + if (rc) + return rc; + + rc = __read_register_with_poll_timeout(core, WRAPPER_IRIS_CPU_NOC_LPI_STATUS, + 0x1, 0x1, 200, 2000); + if (rc) + d_vpr_h("%s: WRAPPER_IRIS_CPU_NOC_LPI_CONTROL failed\n", __func__); + + /* Debug bridge LPI release */ + rc = __write_register(core, WRAPPER_DEBUG_BRIDGE_LPI_CONTROL_IRIS33, 0x0); + if (rc) + return rc; + + rc = __read_register_with_poll_timeout(core, WRAPPER_DEBUG_BRIDGE_LPI_STATUS_IRIS33, + 0xffffffff, 0x0, 200, 2000); + if (rc) + d_vpr_h("%s: debug bridge release failed\n", __func__); + + /* Reset MVP QNS4PDXFIFO */ + rc = __write_register(core, WRAPPER_TZ_CTL_AXI_CLOCK_CONFIG, 0x3); + if (rc) + return rc; + + rc = __write_register(core, WRAPPER_TZ_QNS4PDXFIFO_RESET, 0x1); + if (rc) + return rc; + + rc = __write_register(core, WRAPPER_TZ_QNS4PDXFIFO_RESET, 0x0); + if (rc) + return rc; + + rc = __write_register(core, WRAPPER_TZ_CTL_AXI_CLOCK_CONFIG, 0x0); + if (rc) + return rc; + + /* Turn off MVP MVS0C core clock */ + rc = res_ops->clk_disable(core, "core_clk"); + if (rc) { + d_vpr_e("%s: disable unprepare core_clk failed\n", __func__); + rc = 0; + } + + /* power down process */ + rc = res_ops->gdsc_off(core, "iris-ctl"); + if (rc) { + d_vpr_e("%s: disable regulator iris-ctl failed\n", __func__); + rc = 0; + } + + return rc; +} + +static int __power_off_iris33(struct msm_vidc_core *core) +{ + const struct msm_vidc_resources_ops *res_ops = core->res_ops; + int rc = 0; + + if (!core || !core->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (!core->power_enabled) + return 0; + + /** + * Reset video_cc_mvs0_clk_src value to resolve MMRM high video + * clock projection issue. + */ + rc = res_ops->set_clks(core, 0); + if (rc) + d_vpr_e("%s: resetting clocks failed\n", __func__); + + if (__power_off_iris33_hardware(core)) + d_vpr_e("%s: failed to power off hardware\n", __func__); + + if (__power_off_iris33_controller(core)) + d_vpr_e("%s: failed to power off controller\n", __func__); + + if (res_ops->set_bw(core, 0, 0)) + d_vpr_e("%s: failed to unvote buses\n", __func__); + + if (!(core->intr_status & WRAPPER_INTR_STATUS_A2HWD_BMSK_IRIS33)) + disable_irq_nosync(core->dt->irq); + core->intr_status = 0; + + core->power_enabled = false; + + return rc; +} + +static int __power_on_iris33_controller(struct msm_vidc_core *core) +{ + const struct msm_vidc_resources_ops *res_ops = core->res_ops; + int rc = 0; + + rc = res_ops->gdsc_on(core, "iris-ctl"); + if (rc) + goto fail_regulator; + + rc = res_ops->reset_bridge(core); + if (rc) + goto fail_reset_ahb2axi; + + rc = res_ops->clk_enable(core, "gcc_video_axi0"); + if (rc) + goto fail_clk_axi; + + rc = res_ops->clk_enable(core, "core_clk"); + if (rc) + goto fail_clk_controller; + + return 0; + +fail_clk_controller: + res_ops->clk_disable(core, "gcc_video_axi0"); +fail_clk_axi: +fail_reset_ahb2axi: + res_ops->gdsc_off(core, "iris-ctl"); +fail_regulator: + return rc; +} + +static int __power_on_iris33_hardware(struct msm_vidc_core *core) +{ + const struct msm_vidc_resources_ops *res_ops = core->res_ops; + int rc = 0; + + rc = res_ops->gdsc_on(core, "vcodec"); + if (rc) + goto fail_regulator; + + rc = res_ops->clk_enable(core, "vcodec_clk"); + if (rc) + goto fail_clk_controller; + + return 0; + +fail_clk_controller: + res_ops->gdsc_off(core, "vcodec"); +fail_regulator: + return rc; +} + +static int __power_on_iris33(struct msm_vidc_core *core) +{ + const struct msm_vidc_resources_ops *res_ops = core->res_ops; + struct allowed_clock_rates_table *clk_tbl; + u32 freq = 0; + int rc = 0; + + if (core->power_enabled) + return 0; + + /* Vote for all hardware resources */ + rc = res_ops->set_bw(core, INT_MAX, INT_MAX); + if (rc) { + d_vpr_e("%s: failed to vote buses, rc %d\n", __func__, rc); + goto fail_vote_buses; + } + + rc = __power_on_iris33_controller(core); + if (rc) { + d_vpr_e("%s: failed to power on iris33 controller\n", __func__); + goto fail_power_on_controller; + } + + rc = __power_on_iris33_hardware(core); + if (rc) { + d_vpr_e("%s: failed to power on iris33 hardware\n", __func__); + goto fail_power_on_hardware; + } + /* video controller and hardware powered on successfully */ + core->power_enabled = true; + + clk_tbl = core->dt->allowed_clks_tbl; + freq = core->power.clk_freq ? core->power.clk_freq : + clk_tbl[0].clock_rate; + + rc = res_ops->set_clks(core, freq); + if (rc) { + d_vpr_e("%s: failed to scale clocks\n", __func__); + rc = 0; + } + /* + * Re-program all of the registers that get reset as a result of + * regulator_disable() and _enable() + */ + __set_registers(core); + + __interrupt_init_iris33(core); + core->intr_status = 0; + enable_irq(core->dt->irq); + + return rc; + +fail_power_on_hardware: + __power_off_iris33_controller(core); +fail_power_on_controller: + res_ops->set_bw(core, 0, 0); +fail_vote_buses: + core->power_enabled = false; + return rc; +} + +static int __prepare_pc_iris33(struct msm_vidc_core *vidc_core) +{ + int rc = 0; + u32 wfi_status = 0, idle_status = 0, pc_ready = 0; + u32 ctrl_status = 0; + struct msm_vidc_core *core = vidc_core; + + if (!core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + rc = __read_register(core, CTRL_STATUS_IRIS33, &ctrl_status); + if (rc) + return rc; + + pc_ready = ctrl_status & CTRL_STATUS_PC_READY_IRIS33; + idle_status = ctrl_status & BIT(30); + + if (pc_ready) { + d_vpr_h("Already in pc_ready state\n"); + return 0; + } + rc = __read_register(core, WRAPPER_TZ_CPU_STATUS, &wfi_status); + if (rc) + return rc; + + wfi_status &= BIT(0); + if (!wfi_status || !idle_status) { + d_vpr_e("Skipping PC, wfi status not set\n"); + goto skip_power_off; + } + + rc = __prepare_pc(core); + if (rc) { + d_vpr_e("Failed __prepare_pc %d\n", rc); + goto skip_power_off; + } + + rc = __read_register_with_poll_timeout(core, CTRL_STATUS_IRIS33, + CTRL_STATUS_PC_READY_IRIS33, CTRL_STATUS_PC_READY_IRIS33, 250, 2500); + if (rc) { + d_vpr_e("%s: Skip PC. Ctrl status not set\n", __func__); + goto skip_power_off; + } + + rc = __read_register_with_poll_timeout(core, WRAPPER_TZ_CPU_STATUS, + BIT(0), 0x1, 250, 2500); + if (rc) { + d_vpr_e("%s: Skip PC. Wfi status not set\n", __func__); + goto skip_power_off; + } + return rc; + +skip_power_off: + rc = __read_register(core, CTRL_STATUS_IRIS33, &ctrl_status); + if (rc) + return rc; + rc = __read_register(core, WRAPPER_TZ_CPU_STATUS, &wfi_status); + if (rc) + return rc; + wfi_status &= BIT(0); + d_vpr_e("Skip PC, wfi=%#x, idle=%#x, pcr=%#x, ctrl=%#x)\n", + wfi_status, idle_status, pc_ready, ctrl_status); + return -EAGAIN; +} + +static int __raise_interrupt_iris33(struct msm_vidc_core *vidc_core) +{ + struct msm_vidc_core *core = vidc_core; + int rc = 0; + + if (!core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + rc = __write_register(core, CPU_IC_SOFTINT_IRIS33, 1 << CPU_IC_SOFTINT_H2A_SHFT_IRIS33); + if (rc) + return rc; + + return 0; +} + +static int __watchdog_iris33(struct msm_vidc_core *vidc_core, u32 intr_status) +{ + int rc = 0; + struct msm_vidc_core *core = vidc_core; + + if (!core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (intr_status & WRAPPER_INTR_STATUS_A2HWD_BMSK_IRIS33) { + d_vpr_e("%s: received watchdog interrupt\n", __func__); + rc = 1; + } + + return rc; +} + +static int __noc_error_info_iris33(struct msm_vidc_core *vidc_core) +{ + struct msm_vidc_core *core = vidc_core; + + if (!core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + /* + * we are not supposed to access vcodec subsystem registers + * unless vcodec core clock WRAPPER_CORE_CLOCK_CONFIG_IRIS33 is enabled. + * core clock might have been disabled by video firmware as part of + * inter frame power collapse (power plane control feature). + */ + + /* + val = __read_register(core, VCODEC_NOC_ERL_MAIN_SWID_LOW); + d_vpr_e("VCODEC_NOC_ERL_MAIN_SWID_LOW: %#x\n", val); + val = __read_register(core, VCODEC_NOC_ERL_MAIN_SWID_HIGH); + d_vpr_e("VCODEC_NOC_ERL_MAIN_SWID_HIGH: %#x\n", val); + val = __read_register(core, VCODEC_NOC_ERL_MAIN_MAINCTL_LOW); + d_vpr_e("VCODEC_NOC_ERL_MAIN_MAINCTL_LOW: %#x\n", val); + val = __read_register(core, VCODEC_NOC_ERL_MAIN_ERRVLD_LOW); + d_vpr_e("VCODEC_NOC_ERL_MAIN_ERRVLD_LOW: %#x\n", val); + val = __read_register(core, VCODEC_NOC_ERL_MAIN_ERRCLR_LOW); + d_vpr_e("VCODEC_NOC_ERL_MAIN_ERRCLR_LOW: %#x\n", val); + val = __read_register(core, VCODEC_NOC_ERL_MAIN_ERRLOG0_LOW); + d_vpr_e("VCODEC_NOC_ERL_MAIN_ERRLOG0_LOW: %#x\n", val); + val = __read_register(core, VCODEC_NOC_ERL_MAIN_ERRLOG0_HIGH); + d_vpr_e("VCODEC_NOC_ERL_MAIN_ERRLOG0_HIGH: %#x\n", val); + val = __read_register(core, VCODEC_NOC_ERL_MAIN_ERRLOG1_LOW); + d_vpr_e("VCODEC_NOC_ERL_MAIN_ERRLOG1_LOW: %#x\n", val); + val = __read_register(core, VCODEC_NOC_ERL_MAIN_ERRLOG1_HIGH); + d_vpr_e("VCODEC_NOC_ERL_MAIN_ERRLOG1_HIGH: %#x\n", val); + val = __read_register(core, VCODEC_NOC_ERL_MAIN_ERRLOG2_LOW); + d_vpr_e("VCODEC_NOC_ERL_MAIN_ERRLOG2_LOW: %#x\n", val); + val = __read_register(core, VCODEC_NOC_ERL_MAIN_ERRLOG2_HIGH); + d_vpr_e("VCODEC_NOC_ERL_MAIN_ERRLOG2_HIGH: %#x\n", val); + val = __read_register(core, VCODEC_NOC_ERL_MAIN_ERRLOG3_LOW); + d_vpr_e("VCODEC_NOC_ERL_MAIN_ERRLOG3_LOW: %#x\n", val); + val = __read_register(core, VCODEC_NOC_ERL_MAIN_ERRLOG3_HIGH); + d_vpr_e("VCODEC_NOC_ERL_MAIN_ERRLOG3_HIGH: %#x\n", val); + */ + + return 0; +} + +static int __clear_interrupt_iris33(struct msm_vidc_core *vidc_core) +{ + struct msm_vidc_core *core = vidc_core; + u32 intr_status = 0, mask = 0; + int rc = 0; + + if (!core) { + d_vpr_e("%s: NULL core\n", __func__); + return 0; + } + + rc = __read_register(core, WRAPPER_INTR_STATUS_IRIS33, &intr_status); + if (rc) + return rc; + + mask = (WRAPPER_INTR_STATUS_A2H_BMSK_IRIS33| + WRAPPER_INTR_STATUS_A2HWD_BMSK_IRIS33| + CTRL_INIT_IDLE_MSG_BMSK_IRIS33); + + if (intr_status & mask) { + core->intr_status |= intr_status; + core->reg_count++; + d_vpr_l("INTERRUPT: times: %d interrupt_status: %d\n", + core->reg_count, intr_status); + } else { + core->spur_count++; + } + + rc = __write_register(core, CPU_CS_A2HSOFTINTCLR_IRIS33, 1); + if (rc) + return rc; + + return 0; +} + +static int __boot_firmware_iris33(struct msm_vidc_core *vidc_core) +{ + int rc = 0; + u32 ctrl_init_val = 0, ctrl_status = 0, count = 0, max_tries = 1000; + struct msm_vidc_core *core = vidc_core; + + if (!core) { + d_vpr_e("%s: NULL core\n", __func__); + return 0; + } + + rc = __setup_ucregion_memory_map_iris33(core); + if (rc) + return rc; + + ctrl_init_val = BIT(0); + + rc = __write_register(core, CTRL_INIT_IRIS33, ctrl_init_val); + if (rc) + return rc; + + while (!ctrl_status && count < max_tries) { + rc = __read_register(core, CTRL_STATUS_IRIS33, &ctrl_status); + if (rc) + return rc; + + if ((ctrl_status & CTRL_ERROR_STATUS__M_IRIS33) == 0x4) { + d_vpr_e("invalid setting for UC_REGION\n"); + break; + } + + usleep_range(50, 100); + count++; + } + + if (count >= max_tries) { + d_vpr_e("Error booting up vidc firmware\n"); + return -ETIME; + } + + /* Enable interrupt before sending commands to venus */ + rc = __write_register(core, CPU_CS_H2XSOFTINTEN_IRIS33, 0x1); + if (rc) + return rc; + + rc = __write_register(core, CPU_CS_X2RPMh_IRIS33, 0x0); + if (rc) + return rc; + + return rc; +} + +int msm_vidc_decide_work_mode_iris33(struct msm_vidc_inst* inst) +{ + u32 work_mode; + struct v4l2_format *inp_f; + u32 width, height; + bool res_ok = false; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + work_mode = MSM_VIDC_STAGE_2; + inp_f = &inst->fmts[INPUT_PORT]; + + if (is_image_decode_session(inst)) + work_mode = MSM_VIDC_STAGE_1; + + if (is_image_session(inst)) + goto exit; + + if (is_decode_session(inst)) { + height = inp_f->fmt.pix_mp.height; + width = inp_f->fmt.pix_mp.width; + res_ok = res_is_less_than(width, height, 1280, 720); + if (inst->capabilities->cap[CODED_FRAMES].value == + CODED_FRAMES_INTERLACE || + inst->capabilities->cap[LOWLATENCY_MODE].value || + res_ok) { + work_mode = MSM_VIDC_STAGE_1; + } + } else if (is_encode_session(inst)) { + height = inst->crop.height; + width = inst->crop.width; + res_ok = !res_is_greater_than(width, height, 4096, 2160); + if (res_ok && + (inst->capabilities->cap[LOWLATENCY_MODE].value)) { + work_mode = MSM_VIDC_STAGE_1; + } + if (inst->capabilities->cap[SLICE_MODE].value == + V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_BYTES) { + work_mode = MSM_VIDC_STAGE_1; + } + if (inst->capabilities->cap[LOSSLESS].value) + work_mode = MSM_VIDC_STAGE_2; + + if (!inst->capabilities->cap[GOP_SIZE].value) + work_mode = MSM_VIDC_STAGE_2; + } else { + i_vpr_e(inst, "%s: invalid session type\n", __func__); + return -EINVAL; + } + +exit: + i_vpr_h(inst, "Configuring work mode = %u low latency = %u, gop size = %u\n", + work_mode, inst->capabilities->cap[LOWLATENCY_MODE].value, + inst->capabilities->cap[GOP_SIZE].value); + msm_vidc_update_cap_value(inst, STAGE, work_mode, __func__); + + return 0; +} + +int msm_vidc_decide_work_route_iris33(struct msm_vidc_inst* inst) +{ + u32 work_route; + struct msm_vidc_core* core; + + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + core = inst->core; + work_route = core->capabilities[NUM_VPP_PIPE].value; + + if (is_image_session(inst)) + goto exit; + + if (is_decode_session(inst)) { + if (inst->capabilities->cap[CODED_FRAMES].value == + CODED_FRAMES_INTERLACE) + work_route = MSM_VIDC_PIPE_1; + } else if (is_encode_session(inst)) { + u32 slice_mode; + + slice_mode = inst->capabilities->cap[SLICE_MODE].value; + + /*TODO Pipe=1 for legacy CBR*/ + if (slice_mode == V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_BYTES) + work_route = MSM_VIDC_PIPE_1; + + } else { + i_vpr_e(inst, "%s: invalid session type\n", __func__); + return -EINVAL; + } + +exit: + i_vpr_h(inst, "Configuring work route = %u", work_route); + msm_vidc_update_cap_value(inst, PIPE, work_route, __func__); + + return 0; +} + +int msm_vidc_decide_quality_mode_iris33(struct msm_vidc_inst* inst) +{ + struct msm_vidc_inst_capability* capability = NULL; + struct msm_vidc_core *core; + u32 mbpf, mbps, max_hq_mbpf, max_hq_mbps; + u32 mode = MSM_VIDC_POWER_SAVE_MODE; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + capability = inst->capabilities; + + if (!is_encode_session(inst)) + return 0; + + /* image or lossless or all intra runs at quality mode */ + if (is_image_session(inst) || capability->cap[LOSSLESS].value || + capability->cap[ALL_INTRA].value) { + mode = MSM_VIDC_MAX_QUALITY_MODE; + goto decision_done; + } + + /* for lesser complexity, make LP for all resolution */ + if (capability->cap[COMPLEXITY].value < DEFAULT_COMPLEXITY) { + mode = MSM_VIDC_POWER_SAVE_MODE; + goto decision_done; + } + + mbpf = msm_vidc_get_mbs_per_frame(inst); + mbps = mbpf * msm_vidc_get_fps(inst); + core = inst->core; + max_hq_mbpf = core->capabilities[MAX_MBPF_HQ].value;; + max_hq_mbps = core->capabilities[MAX_MBPS_HQ].value;; + + if (!is_realtime_session(inst)) { + if (((capability->cap[COMPLEXITY].flags & CAP_FLAG_CLIENT_SET) && + (capability->cap[COMPLEXITY].value >= DEFAULT_COMPLEXITY)) || + mbpf <= max_hq_mbpf) { + mode = MSM_VIDC_MAX_QUALITY_MODE; + goto decision_done; + } + } + + if (mbpf <= max_hq_mbpf && mbps <= max_hq_mbps) + mode = MSM_VIDC_MAX_QUALITY_MODE; + +decision_done: + msm_vidc_update_cap_value(inst, QUALITY_MODE, mode, __func__); + + return 0; +} + +int msm_vidc_adjust_bitrate_boost_iris33(void* instance, struct v4l2_ctrl *ctrl) +{ + struct msm_vidc_inst_capability* capability = NULL; + s32 adjusted_value; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + s32 rc_type = -1; + u32 width, height, frame_rate; + struct v4l2_format *f; + u32 max_bitrate = 0, bitrate = 0; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + capability = inst->capabilities; + + adjusted_value = ctrl ? ctrl->val : + capability->cap[BITRATE_BOOST].value; + + if (inst->bufq[OUTPUT_PORT].vb2q->streaming) + return 0; + + if (msm_vidc_get_parent_value(inst, BITRATE_BOOST, + BITRATE_MODE, &rc_type, __func__)) + return -EINVAL; + + /* + * Bitrate Boost are supported only for VBR rc type. + * Hence, do not adjust or set to firmware for non VBR rc's + */ + if (rc_type != HFI_RC_VBR_CFR) { + adjusted_value = 0; + goto adjust; + } + + frame_rate = inst->capabilities->cap[FRAME_RATE].value >> 16; + f= &inst->fmts[OUTPUT_PORT]; + width = f->fmt.pix_mp.width; + height = f->fmt.pix_mp.height; + + /* + * honor client set bitrate boost + * if client did not set, keep max bitrate boost upto 4k@60fps + * and remove bitrate boost after 4k@60fps + */ + if (capability->cap[BITRATE_BOOST].flags & CAP_FLAG_CLIENT_SET) { + /* accept client set bitrate boost value as is */ + } else { + if (res_is_less_than_or_equal_to(width, height, 4096, 2176) && + frame_rate <= 60) + adjusted_value = MAX_BITRATE_BOOST; + else + adjusted_value = 0; + } + + max_bitrate = msm_vidc_get_max_bitrate(inst); + bitrate = inst->capabilities->cap[BIT_RATE].value; + if (adjusted_value) { + if ((bitrate + bitrate / (100 / adjusted_value)) > max_bitrate) { + i_vpr_h(inst, + "%s: bitrate %d is beyond max bitrate %d, remove bitrate boost\n", + __func__, max_bitrate, bitrate); + adjusted_value = 0; + } + } +adjust: + msm_vidc_update_cap_value(inst, BITRATE_BOOST, adjusted_value, __func__); + + return 0; +} + + + +static struct msm_vidc_venus_ops iris33_ops = { + .boot_firmware = __boot_firmware_iris33, + .raise_interrupt = __raise_interrupt_iris33, + .clear_interrupt = __clear_interrupt_iris33, + .power_on = __power_on_iris33, + .power_off = __power_off_iris33, + .prepare_pc = __prepare_pc_iris33, + .watchdog = __watchdog_iris33, + .noc_error_info = __noc_error_info_iris33, +}; + +static struct msm_vidc_session_ops msm_session_ops = { + .buffer_size = msm_buffer_size_iris33, + .min_count = msm_buffer_min_count_iris33, + .extra_count = msm_buffer_extra_count_iris33, + .calc_freq = msm_vidc_calc_freq_iris33, + .calc_bw = msm_vidc_calc_bw_iris33, + .decide_work_route = msm_vidc_decide_work_route_iris33, + .decide_work_mode = msm_vidc_decide_work_mode_iris33, + .decide_quality_mode = msm_vidc_decide_quality_mode_iris33, +}; + +int msm_vidc_init_iris33(struct msm_vidc_core *core) +{ + if (!core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + d_vpr_h("%s()\n", __func__); + core->venus_ops = &iris33_ops; + core->session_ops = &msm_session_ops; + core->res_ops = get_resources_ops(); + + return 0; +} + +int msm_vidc_deinit_iris33(struct msm_vidc_core *core) +{ + /* do nothing */ + return 0; +} diff --git a/driver/variant/iris33/src/msm_vidc_power_iris33.c b/driver/variant/iris33/src/msm_vidc_power_iris33.c new file mode 100644 index 0000000000..c905d4cbce --- /dev/null +++ b/driver/variant/iris33/src/msm_vidc_power_iris33.c @@ -0,0 +1,803 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2020-2022, The Linux Foundation. All rights reserved. + * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include "msm_vidc_power_iris33.h" +#include "msm_vidc_inst.h" +#include "msm_vidc_core.h" +#include "msm_vidc_driver.h" +#include "msm_vidc_debug.h" +#include "msm_vidc_dt.h" + +u64 msm_vidc_calc_freq_iris33(struct msm_vidc_inst *inst, u32 data_size) +{ + u64 freq = 0; + struct msm_vidc_core* core; + u64 vsp_cycles = 0, vpp_cycles = 0, fw_cycles = 0; + u64 fw_vpp_cycles = 0, bitrate = 0; + u32 vpp_cycles_per_mb; + u32 mbs_per_second; + u32 operating_rate, vsp_factor_num = 1, vsp_factor_den = 1; + u32 base_cycles = 0; + u32 fps, mbpf; + + if (!inst || !inst->core || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return freq; + } + + core = inst->core; + if (!core->dt || !core->dt->allowed_clks_tbl) { + d_vpr_e("%s: invalid params\n", __func__); + return freq; + } + + mbpf = msm_vidc_get_mbs_per_frame(inst); + fps = inst->max_rate; + mbs_per_second = mbpf * fps; + + /* + * Calculate vpp, vsp, fw cycles separately for encoder and decoder. + * Even though, most part is common now, in future it may change + * between them. + */ + fw_cycles = fps * inst->capabilities->cap[MB_CYCLES_FW].value; + fw_vpp_cycles = fps * inst->capabilities->cap[MB_CYCLES_FW_VPP].value; + + if (inst->domain == MSM_VIDC_ENCODER) { + vpp_cycles_per_mb = is_low_power_session(inst) ? + inst->capabilities->cap[MB_CYCLES_LP].value : + inst->capabilities->cap[MB_CYCLES_VPP].value; + + vpp_cycles = mbs_per_second * vpp_cycles_per_mb / + inst->capabilities->cap[PIPE].value; + + /* Factor 1.25 for IbP and 1.375 for I1B2b1P GOP structure */ + if (inst->capabilities->cap[B_FRAME].value > 1) + vpp_cycles += (vpp_cycles / 4) + (vpp_cycles / 8); + else if (inst->capabilities->cap[B_FRAME].value) + vpp_cycles += vpp_cycles / 4; + /* 21 / 20 is minimum overhead factor */ + vpp_cycles += max(div_u64(vpp_cycles, 20), fw_vpp_cycles); + /* 1.01 is multi-pipe overhead */ + if (inst->capabilities->cap[PIPE].value > 1) + vpp_cycles += div_u64(vpp_cycles, 100); + /* + * 1080p@480fps usecase needs exactly 338MHz + * without any margin left. Hence, adding 2 percent + * extra to bump it to next level (366MHz). + */ + if (fps == 480) + vpp_cycles += div_u64(vpp_cycles * 2, 100); + + /* + * Add 5 percent extra for 720p@960fps use case + * to bump it to next level (366MHz). + */ + if (fps == 960) + vpp_cycles += div_u64(vpp_cycles * 5, 100); + + /* increase vpp_cycles by 50% for preprocessing */ + if (inst->capabilities->cap[REQUEST_PREPROCESS].value) + vpp_cycles = vpp_cycles + vpp_cycles / 2; + + /* VSP */ + /* bitrate is based on fps, scale it using operating rate */ + operating_rate = inst->capabilities->cap[OPERATING_RATE].value >> 16; + if (operating_rate > + (inst->capabilities->cap[FRAME_RATE].value >> 16) && + (inst->capabilities->cap[FRAME_RATE].value >> 16)) { + vsp_factor_num = operating_rate; + vsp_factor_den = inst->capabilities->cap[FRAME_RATE].value >> 16; + } + vsp_cycles = div_u64(((u64)inst->capabilities->cap[BIT_RATE].value * + vsp_factor_num), vsp_factor_den); + + base_cycles = inst->capabilities->cap[MB_CYCLES_VSP].value; + if (inst->codec == MSM_VIDC_VP9) { + vsp_cycles = div_u64(vsp_cycles * 170, 100); + } else if (inst->capabilities->cap[ENTROPY_MODE].value == + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC) { + vsp_cycles = div_u64(vsp_cycles * 135, 100); + } else { + base_cycles = 0; + vsp_cycles = div_u64(vsp_cycles, 2); + } + /* VSP FW Overhead 1.05 */ + vsp_cycles = div_u64(vsp_cycles * 21, 20); + + if (inst->capabilities->cap[STAGE].value == MSM_VIDC_STAGE_1) + vsp_cycles = vsp_cycles * 3; + + vsp_cycles += mbs_per_second * base_cycles; + + } else if (inst->domain == MSM_VIDC_DECODER) { + /* VPP */ + vpp_cycles = mbs_per_second * inst->capabilities->cap[MB_CYCLES_VPP].value / + inst->capabilities->cap[PIPE].value; + /* 21 / 20 is minimum overhead factor */ + vpp_cycles += max(vpp_cycles / 20, fw_vpp_cycles); + if (inst->capabilities->cap[PIPE].value > 1) { + if (inst->codec == MSM_VIDC_AV1) { + /* + * Additional vpp_cycles are required for bitstreams with + * 128x128 superblock and non-recommended tile settings. + * recommended tiles: 1080P_V2XH1, UHD_V2X2, 8KUHD_V8X2 + * non-recommended tiles: 1080P_V4XH2_V4X1, UHD_V8X4_V8X1, + * 8KUHD_V8X8_V8X1 + */ + if (inst->capabilities->cap[SUPER_BLOCK].value) + vpp_cycles += div_u64(vpp_cycles * 1464, 1000); + else + vpp_cycles += div_u64(vpp_cycles * 410, 1000); + } else { + /* 1.059 is multi-pipe overhead */ + vpp_cycles += div_u64(vpp_cycles * 59, 1000); + } + } + + /* VSP */ + if (inst->codec == MSM_VIDC_AV1) { + /* + * For AV1: Use VSP calculations from Kalama perf model. + * For legacy codecs, use vsp_cycles based on legacy MB_CYCLES_VSP. + */ + u32 decoder_vsp_fw_overhead = 105; + u32 fw_sw_vsp_offset = 1055; + u64 vsp_hw_min_frequency = 0; + u32 input_bitrate_mbps = 0; + u32 bitrate_2stage[2] = {130, 120}; + u32 bitrate_1stage = 100; + u32 width, height; + u32 bitrate_entry, freq_entry, frequency_table_value; + struct allowed_clock_rates_table *allowed_clks_tbl; + struct v4l2_format *out_f = &inst->fmts[OUTPUT_PORT]; + + width = out_f->fmt.pix_mp.width; + height = out_f->fmt.pix_mp.height; + + bitrate_entry = 1; + /* 8KUHD60, UHD240, 1080p960 */ + if (width * height * fps >= 3840 * 2160 * 240) + bitrate_entry = 0; + + freq_entry = bitrate_entry; + + allowed_clks_tbl = core->dt->allowed_clks_tbl; + frequency_table_value = allowed_clks_tbl[freq_entry].clock_rate / 1000000; + + input_bitrate_mbps = fps * data_size * 8 / (1024 * 1024); + vsp_hw_min_frequency = frequency_table_value * 1000 * input_bitrate_mbps; + + if (inst->capabilities->cap[STAGE].value == MSM_VIDC_STAGE_2) { + vsp_hw_min_frequency += + (bitrate_2stage[bitrate_entry] * fw_sw_vsp_offset - 1); + vsp_hw_min_frequency = div_u64(vsp_hw_min_frequency, + (bitrate_2stage[bitrate_entry] * fw_sw_vsp_offset)); + /* VSP fw overhead 1.05 */ + vsp_hw_min_frequency = div_u64(vsp_hw_min_frequency * + decoder_vsp_fw_overhead + 99, 100); + } else { + vsp_hw_min_frequency += (bitrate_1stage * fw_sw_vsp_offset - 1); + vsp_hw_min_frequency = div_u64(vsp_hw_min_frequency, + (bitrate_1stage * fw_sw_vsp_offset)); + } + + vsp_cycles = vsp_hw_min_frequency * 1000000; + } else { + base_cycles = inst->has_bframe ? + 80 : inst->capabilities->cap[MB_CYCLES_VSP].value; + bitrate = fps * data_size * 8; + vsp_cycles = bitrate; + + if (inst->codec == MSM_VIDC_VP9) { + vsp_cycles = div_u64(vsp_cycles * 170, 100); + } else if (inst->capabilities->cap[ENTROPY_MODE].value == + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC) { + vsp_cycles = div_u64(vsp_cycles * 135, 100); + } else { + base_cycles = 0; + vsp_cycles = div_u64(vsp_cycles, 2); + } + /* VSP FW overhead 1.05 */ + vsp_cycles = div_u64(vsp_cycles * 21, 20); + + if (inst->capabilities->cap[STAGE].value == MSM_VIDC_STAGE_1) + vsp_cycles = vsp_cycles * 3; + + vsp_cycles += mbs_per_second * base_cycles; + + /* Add 25 percent extra for 960fps use case */ + if (fps >= 960) + vsp_cycles += div_u64(vpp_cycles * 25, 100); + + if (inst->codec == MSM_VIDC_VP9 && + inst->capabilities->cap[STAGE].value == + MSM_VIDC_STAGE_2 && + inst->capabilities->cap[PIPE].value == 4 && + bitrate > 90000000) + vsp_cycles = msm_vidc_max_freq(inst); + } + } else { + i_vpr_e(inst, "%s: Unknown session type\n", __func__); + return msm_vidc_max_freq(inst); + } + + freq = max(vpp_cycles, vsp_cycles); + freq = max(freq, fw_cycles); + + if (inst->codec != MSM_VIDC_AV1) { + /* + * for non-AV1 codecs limit the frequency to NOM only + * index 0 is TURBO, index 1 is NOM clock rate + */ + if (core->dt->allowed_clks_tbl_size >= 2 && + freq > core->dt->allowed_clks_tbl[1].clock_rate) + freq = core->dt->allowed_clks_tbl[1].clock_rate; + } + + i_vpr_p(inst, "%s: filled len %d, required freq %llu, fps %u, mbpf %u\n", + __func__, data_size, freq, fps, mbpf); + + return freq; +} + +static u64 __calculate_decoder(struct vidc_bus_vote_data *d) +{ + /* + * XXX: Don't fool around with any of the hardcoded numbers unless you + * know /exactly/ what you're doing. Many of these numbers are + * measured heuristics and hardcoded numbers taken from the firmware. + */ + /* Decoder parameters */ + int width, height, lcu_size, fps, dpb_bpp; + bool unified_dpb_opb, dpb_compression_enabled = true, + opb_compression_enabled = false, + llc_ref_read_l2_cache_enabled = false, + llc_top_line_buf_enabled = false; + fp_t dpb_read_compression_factor, dpb_opb_scaling_ratio, + dpb_write_compression_factor, opb_write_compression_factor, + qsmmu_bw_overhead_factor; + bool is_h264_category = (d->codec == MSM_VIDC_H264) ? true : false; + + /* Derived parameters */ + int lcu_per_frame, collocated_bytes_per_lcu, tnbr_per_lcu; + unsigned long bitrate; + unsigned int num_vpp_pipes; + + fp_t bins_to_bit_factor, vsp_read_factor, vsp_write_factor, + dpb_factor, dpb_write_factor, y_bw_no_ubwc_8bpp; + fp_t y_bw_no_ubwc_10bpp = 0, y_bw_10bpp_p010 = 0, + motion_vector_complexity = 0; + fp_t dpb_total = 0; + + /* Output parameters */ + struct { + fp_t vsp_read, vsp_write, collocated_read, collocated_write, + dpb_read, dpb_write, opb_read, opb_write, + line_buffer_read, line_buffer_write, + total; + } ddr = {0}; + + struct { + fp_t dpb_read, line_buffer_read, line_buffer_write, total; + } llc = {0}; + + unsigned long ret = 0; + unsigned int integer_part, frac_part; + + width = max(d->input_width, BASELINE_DIMENSIONS.width); + height = max(d->input_height, BASELINE_DIMENSIONS.height); + + fps = d->fps; + + lcu_size = d->lcu_size; + + dpb_bpp = __bpp(d->color_formats[0]); + + unified_dpb_opb = d->num_formats == 1; + + dpb_opb_scaling_ratio = fp_div(FP_INT(d->input_width * d->input_height), + FP_INT(d->output_width * d->output_height)); + + opb_compression_enabled = d->num_formats >= 2 && + __ubwc(d->color_formats[1]); + + integer_part = Q16_INT(d->compression_ratio); + frac_part = Q16_FRAC(d->compression_ratio); + dpb_read_compression_factor = FP(integer_part, frac_part, 100); + + integer_part = Q16_INT(d->complexity_factor); + frac_part = Q16_FRAC(d->complexity_factor); + motion_vector_complexity = FP(integer_part, frac_part, 100); + + dpb_write_compression_factor = dpb_read_compression_factor; + opb_write_compression_factor = opb_compression_enabled ? + dpb_write_compression_factor : FP_ONE; + + num_vpp_pipes = d->num_vpp_pipes; + + if (d->use_sys_cache) { + llc_ref_read_l2_cache_enabled = true; + if (is_h264_category) + llc_top_line_buf_enabled = true; + } + + /* Derived parameters setup */ + lcu_per_frame = DIV_ROUND_UP(width, lcu_size) * + DIV_ROUND_UP(height, lcu_size); + + bitrate = DIV_ROUND_UP(d->bitrate, 1000000); + + bins_to_bit_factor = FP_INT(4); + + vsp_write_factor = bins_to_bit_factor; + vsp_read_factor = bins_to_bit_factor + FP_INT(2); + + collocated_bytes_per_lcu = lcu_size == 16 ? 16 : + lcu_size == 32 ? 64 : 256; + + if (d->codec == MSM_VIDC_AV1) { + collocated_bytes_per_lcu = 4 * 512; /* lcu_size = 128 */ + if (lcu_size == 32) { + collocated_bytes_per_lcu = 4 * 512 / (128 * 128 / 32 / 32); + } else if (lcu_size == 64) { + collocated_bytes_per_lcu = 4 * 512 / (128 * 128 / 64 / 64); + } + } + + dpb_factor = FP(1, 50, 100); + dpb_write_factor = FP(1, 5, 100); + + tnbr_per_lcu = lcu_size == 16 ? 128 : + lcu_size == 32 ? 64 : 128; + + /* .... For DDR & LLC ...... */ + ddr.vsp_read = fp_div(fp_mult(FP_INT(bitrate), + vsp_read_factor), FP_INT(8)); + ddr.vsp_write = fp_div(fp_mult(FP_INT(bitrate), + vsp_write_factor), FP_INT(8)); + + ddr.collocated_read = fp_div(FP_INT(lcu_per_frame * + collocated_bytes_per_lcu * fps), FP_INT(bps(1))); + ddr.collocated_write = ddr.collocated_read; + + y_bw_no_ubwc_8bpp = fp_div(FP_INT(width * height * fps), + FP_INT(1000 * 1000)); + + if (dpb_bpp != 8) { + y_bw_no_ubwc_10bpp = + fp_div(fp_mult(y_bw_no_ubwc_8bpp, FP_INT(256)), + FP_INT(192)); + y_bw_10bpp_p010 = y_bw_no_ubwc_8bpp * 2; + } + + ddr.dpb_read = dpb_bpp == 8 ? y_bw_no_ubwc_8bpp : y_bw_no_ubwc_10bpp; + ddr.dpb_read = fp_div(fp_mult(ddr.dpb_read, + fp_mult(dpb_factor, motion_vector_complexity)), + dpb_read_compression_factor); + + ddr.dpb_write = dpb_bpp == 8 ? y_bw_no_ubwc_8bpp : y_bw_no_ubwc_10bpp; + ddr.dpb_write = fp_div(fp_mult(ddr.dpb_write, + fp_mult(dpb_factor, dpb_write_factor)), + dpb_write_compression_factor); + + dpb_total = ddr.dpb_read + ddr.dpb_write; + + if (llc_ref_read_l2_cache_enabled) { + ddr.dpb_read = fp_div(ddr.dpb_read, is_h264_category ? + FP(1, 30, 100) : FP(1, 14, 100)); + llc.dpb_read = dpb_total - ddr.dpb_write - ddr.dpb_read; + } + + ddr.opb_read = FP_ZERO; + ddr.opb_write = unified_dpb_opb ? FP_ZERO : (dpb_bpp == 8 ? + y_bw_no_ubwc_8bpp : (opb_compression_enabled ? + y_bw_no_ubwc_10bpp : y_bw_10bpp_p010)); + ddr.opb_write = fp_div(fp_mult(dpb_factor, ddr.opb_write), + fp_mult(dpb_opb_scaling_ratio, opb_write_compression_factor)); + + ddr.line_buffer_read = + fp_div(FP_INT(tnbr_per_lcu * lcu_per_frame * fps), + FP_INT(bps(1))); + + if (is_h264_category) + ddr.line_buffer_write = fp_div(ddr.line_buffer_read,FP_INT(2)); + else + ddr.line_buffer_write = ddr.line_buffer_read; + if (llc_top_line_buf_enabled) { + llc.line_buffer_read = ddr.line_buffer_read; + llc.line_buffer_write = ddr.line_buffer_write; + ddr.line_buffer_write = ddr.line_buffer_read = FP_ZERO; + } + + ddr.total = ddr.vsp_read + ddr.vsp_write + + ddr.collocated_read + ddr.collocated_write + + ddr.dpb_read + ddr.dpb_write + + ddr.opb_read + ddr.opb_write + + ddr.line_buffer_read + ddr.line_buffer_write; + + qsmmu_bw_overhead_factor = FP(1, 3, 100); + + ddr.total = fp_mult(ddr.total, qsmmu_bw_overhead_factor); + llc.total = llc.dpb_read + llc.line_buffer_read + + llc.line_buffer_write + ddr.total; + + /* Add 25 percent extra for 960fps use case */ + if (fps >= 960) { + ddr.total += div_u64(ddr.total * 25, 100); + llc.total += div_u64(llc.total * 25, 100); + } + + /* Dump all the variables for easier debugging */ + if (msm_vidc_debug & VIDC_BUS) { + struct dump dump[] = { + {"DECODER PARAMETERS", "", DUMP_HEADER_MAGIC}, + {"lcu size", "%d", lcu_size}, + {"dpb bitdepth", "%d", dpb_bpp}, + {"frame rate", "%d", fps}, + {"dpb/opb unified", "%d", unified_dpb_opb}, + {"dpb/opb downscaling ratio", DUMP_FP_FMT, + dpb_opb_scaling_ratio}, + {"dpb compression", "%d", dpb_compression_enabled}, + {"opb compression", "%d", opb_compression_enabled}, + {"dpb read compression factor", DUMP_FP_FMT, + dpb_read_compression_factor}, + {"dpb write compression factor", DUMP_FP_FMT, + dpb_write_compression_factor}, + {"frame width", "%d", width}, + {"frame height", "%d", height}, + {"llc ref read l2 cache enabled", "%d", + llc_ref_read_l2_cache_enabled}, + {"llc top line buf enabled", "%d", + llc_top_line_buf_enabled}, + + {"DERIVED PARAMETERS (1)", "", DUMP_HEADER_MAGIC}, + {"lcus/frame", "%d", lcu_per_frame}, + {"bitrate (Mbit/sec)", "%d", bitrate}, + {"bins to bit factor", DUMP_FP_FMT, bins_to_bit_factor}, + {"dpb write factor", DUMP_FP_FMT, dpb_write_factor}, + {"vsp read factor", DUMP_FP_FMT, vsp_read_factor}, + {"vsp write factor", DUMP_FP_FMT, vsp_write_factor}, + {"tnbr/lcu", "%d", tnbr_per_lcu}, + {"collocated bytes/LCU", "%d", collocated_bytes_per_lcu}, + {"bw for NV12 8bpc)", DUMP_FP_FMT, y_bw_no_ubwc_8bpp}, + {"bw for NV12 10bpc)", DUMP_FP_FMT, y_bw_no_ubwc_10bpp}, + + {"DERIVED PARAMETERS (2)", "", DUMP_HEADER_MAGIC}, + {"mv complexity", DUMP_FP_FMT, motion_vector_complexity}, + {"qsmmu_bw_overhead_factor", DUMP_FP_FMT, + qsmmu_bw_overhead_factor}, + + {"INTERMEDIATE DDR B/W", "", DUMP_HEADER_MAGIC}, + {"vsp read", DUMP_FP_FMT, ddr.vsp_read}, + {"vsp write", DUMP_FP_FMT, ddr.vsp_write}, + {"collocated read", DUMP_FP_FMT, ddr.collocated_read}, + {"collocated write", DUMP_FP_FMT, ddr.collocated_write}, + {"line buffer read", DUMP_FP_FMT, ddr.line_buffer_read}, + {"line buffer write", DUMP_FP_FMT, ddr.line_buffer_write}, + {"opb read", DUMP_FP_FMT, ddr.opb_read}, + {"opb write", DUMP_FP_FMT, ddr.opb_write}, + {"dpb read", DUMP_FP_FMT, ddr.dpb_read}, + {"dpb write", DUMP_FP_FMT, ddr.dpb_write}, + {"dpb total", DUMP_FP_FMT, dpb_total}, + {"INTERMEDIATE LLC B/W", "", DUMP_HEADER_MAGIC}, + {"llc dpb read", DUMP_FP_FMT, llc.dpb_read}, + {"llc line buffer read", DUMP_FP_FMT, llc.line_buffer_read}, + {"llc line buffer write", DUMP_FP_FMT, llc.line_buffer_write}, + + }; + __dump(dump, ARRAY_SIZE(dump)); + } + + d->calc_bw_ddr = kbps(fp_round(ddr.total)); + d->calc_bw_llcc = kbps(fp_round(llc.total)); + + return ret; +} + +static u64 __calculate_encoder(struct vidc_bus_vote_data *d) +{ + /* + * XXX: Don't fool around with any of the hardcoded numbers unless you + * know /exactly/ what you're doing. Many of these numbers are + * measured heuristics and hardcoded numbers taken from the firmware. + */ + /* Encoder Parameters */ + int width, height, fps, lcu_size, bitrate, lcu_per_frame, + collocated_bytes_per_lcu, tnbr_per_lcu, dpb_bpp, + original_color_format, vertical_tile_width, rotation; + bool work_mode_1, original_compression_enabled, + low_power, cropping_or_scaling, + b_frames_enabled = false, + llc_ref_chroma_cache_enabled = false, + llc_top_line_buf_enabled = false, + llc_vpss_rot_line_buf_enabled = false, + vpss_preprocessing_enabled = false; + + unsigned int bins_to_bit_factor; + fp_t dpb_compression_factor, + original_compression_factor, + original_compression_factor_y, + y_bw_no_ubwc_8bpp, y_bw_no_ubwc_10bpp = 0, y_bw_10bpp_p010 = 0, + input_compression_factor, + downscaling_ratio, + ref_y_read_bw_factor, ref_cbcr_read_bw_factor, + recon_write_bw_factor, + total_ref_read_crcb, + qsmmu_bw_overhead_factor; + fp_t integer_part, frac_part; + unsigned long ret = 0; + + /* Output parameters */ + struct { + fp_t vsp_read, vsp_write, collocated_read, collocated_write, + ref_read_y, ref_read_crcb, ref_write, + ref_write_overlap, orig_read, + line_buffer_read, line_buffer_write, + total; + } ddr = {0}; + + struct { + fp_t ref_read_crcb, line_buffer, total; + } llc = {0}; + + /* Encoder Parameters setup */ + rotation = d->rotation; + cropping_or_scaling = false; + vertical_tile_width = 960; + /* + * recon_write_bw_factor varies according to resolution and bit-depth, + * here use 1.08(1.075) for worst case. + * Similar for ref_y_read_bw_factor, it can reach 1.375 for worst case, + * here use 1.3 for average case, and can somewhat balance the + * worst case assumption for UBWC CR factors. + */ + recon_write_bw_factor = FP(1, 8, 100); + ref_y_read_bw_factor = FP(1, 30, 100); + ref_cbcr_read_bw_factor = FP(1, 50, 100); + + + /* Derived Parameters */ + fps = d->fps; + width = max(d->output_width, BASELINE_DIMENSIONS.width); + height = max(d->output_height, BASELINE_DIMENSIONS.height); + downscaling_ratio = fp_div(FP_INT(d->input_width * d->input_height), + FP_INT(d->output_width * d->output_height)); + downscaling_ratio = max(downscaling_ratio, FP_ONE); + bitrate = d->bitrate > 0 ? DIV_ROUND_UP(d->bitrate, 1000000) : + __lut(width, height, fps)->bitrate; + lcu_size = d->lcu_size; + lcu_per_frame = DIV_ROUND_UP(width, lcu_size) * + DIV_ROUND_UP(height, lcu_size); + tnbr_per_lcu = 16; + + dpb_bpp = __bpp(d->color_formats[0]); + + y_bw_no_ubwc_8bpp = fp_div(FP_INT(width * height * fps), + FP_INT(1000 * 1000)); + + if (dpb_bpp != 8) { + y_bw_no_ubwc_10bpp = fp_div(fp_mult(y_bw_no_ubwc_8bpp, + FP_INT(256)), FP_INT(192)); + y_bw_10bpp_p010 = y_bw_no_ubwc_8bpp * 2; + } + + b_frames_enabled = d->b_frames_enabled; + original_color_format = d->num_formats >= 1 ? + d->color_formats[0] : MSM_VIDC_FMT_NV12C; + + original_compression_enabled = __ubwc(original_color_format); + + work_mode_1 = d->work_mode == MSM_VIDC_STAGE_1; + low_power = d->power_mode == VIDC_POWER_LOW; + bins_to_bit_factor = 4; + vpss_preprocessing_enabled = d->vpss_preprocessing_enabled; + + if (d->use_sys_cache) { + llc_ref_chroma_cache_enabled = true; + llc_top_line_buf_enabled = true, + llc_vpss_rot_line_buf_enabled = true; + } + + integer_part = Q16_INT(d->compression_ratio); + frac_part = Q16_FRAC(d->compression_ratio); + dpb_compression_factor = FP(integer_part, frac_part, 100); + + integer_part = Q16_INT(d->input_cr); + frac_part = Q16_FRAC(d->input_cr); + input_compression_factor = FP(integer_part, frac_part, 100); + + original_compression_factor = original_compression_factor_y = + !original_compression_enabled ? FP_ONE : + __compression_ratio(__lut(width, height, fps), dpb_bpp); + /* use input cr if it is valid (not 1), otherwise use lut */ + if (original_compression_enabled && + input_compression_factor != FP_ONE) { + original_compression_factor = input_compression_factor; + /* Luma usually has lower compression factor than Chroma, + * input cf is overall cf, add 1.08 factor for Luma cf + */ + original_compression_factor_y = + input_compression_factor > FP(1, 8, 100) ? + fp_div(input_compression_factor, FP(1, 8, 100)) : + input_compression_factor; + } + + ddr.vsp_read = fp_div(FP_INT(bitrate * bins_to_bit_factor), FP_INT(8)); + ddr.vsp_write = ddr.vsp_read + fp_div(FP_INT(bitrate), FP_INT(8)); + + collocated_bytes_per_lcu = lcu_size == 16 ? 16 : + lcu_size == 32 ? 64 : 256; + + ddr.collocated_read = fp_div(FP_INT(lcu_per_frame * + collocated_bytes_per_lcu * fps), FP_INT(bps(1))); + + ddr.collocated_write = ddr.collocated_read; + + ddr.ref_read_y = dpb_bpp == 8 ? + y_bw_no_ubwc_8bpp : y_bw_no_ubwc_10bpp; + if (b_frames_enabled) + ddr.ref_read_y = ddr.ref_read_y * 2; + ddr.ref_read_y = fp_div(ddr.ref_read_y, dpb_compression_factor); + + ddr.ref_read_crcb = fp_mult((ddr.ref_read_y / 2), + ref_cbcr_read_bw_factor); + + if (width > vertical_tile_width) { + ddr.ref_read_y = fp_mult(ddr.ref_read_y, + ref_y_read_bw_factor); + } + + if (llc_ref_chroma_cache_enabled) { + total_ref_read_crcb = ddr.ref_read_crcb; + ddr.ref_read_crcb = fp_div(ddr.ref_read_crcb, + ref_cbcr_read_bw_factor); + llc.ref_read_crcb = total_ref_read_crcb - ddr.ref_read_crcb; + } + + ddr.ref_write = dpb_bpp == 8 ? y_bw_no_ubwc_8bpp : y_bw_no_ubwc_10bpp; + ddr.ref_write = fp_div(fp_mult(ddr.ref_write, FP(1, 50, 100)), + dpb_compression_factor); + + if (width > vertical_tile_width) { + ddr.ref_write_overlap = fp_mult(ddr.ref_write, + (recon_write_bw_factor - FP_ONE)); + ddr.ref_write = fp_mult(ddr.ref_write, recon_write_bw_factor); + } + + /* double ref_write */ + if (vpss_preprocessing_enabled) + ddr.ref_write = ddr.ref_write * 2; + + ddr.orig_read = dpb_bpp == 8 ? y_bw_no_ubwc_8bpp : + (original_compression_enabled ? y_bw_no_ubwc_10bpp : + y_bw_10bpp_p010); + ddr.orig_read = fp_div(fp_mult(fp_mult(ddr.orig_read, FP(1, 50, 100)), + downscaling_ratio), original_compression_factor); + if (rotation == 90 || rotation == 270) + ddr.orig_read *= lcu_size == 32 ? (dpb_bpp == 8 ? 1 : 3) : 2; + + /* double orig_read */ + if (vpss_preprocessing_enabled) + ddr.orig_read = ddr.orig_read * 2; + + ddr.line_buffer_read = + fp_div(FP_INT(tnbr_per_lcu * lcu_per_frame * fps), + FP_INT(bps(1))); + + ddr.line_buffer_write = ddr.line_buffer_read; + if (llc_top_line_buf_enabled) { + llc.line_buffer = ddr.line_buffer_read + ddr.line_buffer_write; + ddr.line_buffer_read = ddr.line_buffer_write = FP_ZERO; + } + + ddr.total = ddr.vsp_read + ddr.vsp_write + + ddr.collocated_read + ddr.collocated_write + + ddr.ref_read_y + ddr.ref_read_crcb + + ddr.ref_write + ddr.ref_write_overlap + + ddr.orig_read + + ddr.line_buffer_read + ddr.line_buffer_write; + + qsmmu_bw_overhead_factor = FP(1, 3, 100); + ddr.total = fp_mult(ddr.total, qsmmu_bw_overhead_factor); + llc.total = llc.ref_read_crcb + llc.line_buffer + ddr.total; + + if (msm_vidc_debug & VIDC_BUS) { + struct dump dump[] = { + {"ENCODER PARAMETERS", "", DUMP_HEADER_MAGIC}, + {"width", "%d", width}, + {"height", "%d", height}, + {"fps", "%d", fps}, + {"dpb bitdepth", "%d", dpb_bpp}, + {"input downscaling ratio", DUMP_FP_FMT, downscaling_ratio}, + {"rotation", "%d", rotation}, + {"cropping or scaling", "%d", cropping_or_scaling}, + {"low power mode", "%d", low_power}, + {"work Mode", "%d", work_mode_1}, + {"B frame enabled", "%d", b_frames_enabled}, + {"original frame format", "%#x", original_color_format}, + {"VPSS preprocessing", "%d", vpss_preprocessing_enabled}, + {"original compression enabled", "%d", + original_compression_enabled}, + {"dpb compression factor", DUMP_FP_FMT, + dpb_compression_factor}, + {"input compression factor", DUMP_FP_FMT, + input_compression_factor}, + {"llc ref chroma cache enabled", DUMP_FP_FMT, + llc_ref_chroma_cache_enabled}, + {"llc top line buf enabled", DUMP_FP_FMT, + llc_top_line_buf_enabled}, + {"llc vpss rot line buf enabled ", DUMP_FP_FMT, + llc_vpss_rot_line_buf_enabled}, + + {"DERIVED PARAMETERS", "", DUMP_HEADER_MAGIC}, + {"lcu size", "%d", lcu_size}, + {"bitrate (Mbit/sec)", "%lu", bitrate}, + {"bins to bit factor", "%u", bins_to_bit_factor}, + {"original compression factor", DUMP_FP_FMT, + original_compression_factor}, + {"original compression factor y", DUMP_FP_FMT, + original_compression_factor_y}, + {"qsmmu_bw_overhead_factor", + DUMP_FP_FMT, qsmmu_bw_overhead_factor}, + {"bw for NV12 8bpc)", DUMP_FP_FMT, y_bw_no_ubwc_8bpp}, + {"bw for NV12 10bpc)", DUMP_FP_FMT, y_bw_no_ubwc_10bpp}, + + {"INTERMEDIATE B/W DDR", "", DUMP_HEADER_MAGIC}, + {"vsp read", DUMP_FP_FMT, ddr.vsp_read}, + {"vsp write", DUMP_FP_FMT, ddr.vsp_write}, + {"collocated read", DUMP_FP_FMT, ddr.collocated_read}, + {"collocated write", DUMP_FP_FMT, ddr.collocated_write}, + {"ref read y", DUMP_FP_FMT, ddr.ref_read_y}, + {"ref read crcb", DUMP_FP_FMT, ddr.ref_read_crcb}, + {"ref write", DUMP_FP_FMT, ddr.ref_write}, + {"ref write overlap", DUMP_FP_FMT, ddr.ref_write_overlap}, + {"original read", DUMP_FP_FMT, ddr.orig_read}, + {"line buffer read", DUMP_FP_FMT, ddr.line_buffer_read}, + {"line buffer write", DUMP_FP_FMT, ddr.line_buffer_write}, + {"INTERMEDIATE LLC B/W", "", DUMP_HEADER_MAGIC}, + {"llc ref read crcb", DUMP_FP_FMT, llc.ref_read_crcb}, + {"llc line buffer", DUMP_FP_FMT, llc.line_buffer}, + }; + __dump(dump, ARRAY_SIZE(dump)); + } + + d->calc_bw_ddr = kbps(fp_round(ddr.total)); + d->calc_bw_llcc = kbps(fp_round(llc.total)); + + return ret; +} + +static u64 __calculate(struct msm_vidc_inst* inst, struct vidc_bus_vote_data *d) +{ + u64 value = 0; + + switch (d->domain) { + case MSM_VIDC_ENCODER: + value = __calculate_encoder(d); + break; + case MSM_VIDC_DECODER: + value = __calculate_decoder(d); + break; + default: + i_vpr_e(inst, "%s: Unknown Domain %#x", __func__, d->domain); + } + + return value; +} + +int msm_vidc_calc_bw_iris33(struct msm_vidc_inst *inst, + struct vidc_bus_vote_data *vidc_data) +{ + int value = 0; + + if (!vidc_data) + return value; + + value = __calculate(inst, vidc_data); + + return value; +} From 4c09a936f9a7da10e5cfdfa88cd52adbefc8bb81 Mon Sep 17 00:00:00 2001 From: Dikshita Agarwal Date: Fri, 30 Sep 2022 13:46:23 +0530 Subject: [PATCH 0728/1061] video: driver: include mmrm headers if CONFIG_MSM_MMRM enabled Include mmrm headers if CONFIG_MSM_MMRM enabled. Change-Id: I1841125b7584e562b67b0fa7f6d464bfbc7ed267 Signed-off-by: Dikshita Agarwal --- driver/vidc/inc/msm_vidc_dt.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/driver/vidc/inc/msm_vidc_dt.h b/driver/vidc/inc/msm_vidc_dt.h index 6e8110b453..dd68affc5b 100644 --- a/driver/vidc/inc/msm_vidc_dt.h +++ b/driver/vidc/inc/msm_vidc_dt.h @@ -8,8 +8,9 @@ #include #include +#ifdef CONFIG_MSM_MMRM #include - +#endif #include "msm_vidc_internal.h" /* From d7e32537a7523a17041e181cabaf831dfd405555 Mon Sep 17 00:00:00 2001 From: Dikshita Agarwal Date: Fri, 30 Sep 2022 14:10:01 +0530 Subject: [PATCH 0729/1061] video: driver: remove non-standard header file of_common.h Remove inclusion of non standard header file of_common.h and related APIs from upstream database and common file. Include it only in downstream databse file. Change-Id: I22140c54de38afca8058198c49d9fecdceaad67a Signed-off-by: Dikshita Agarwal --- .../platform/common/inc/msm_vidc_platform.h | 2 -- .../platform/common/src/msm_vidc_platform.c | 25 ------------------- driver/platform/kalama/src/kalama.c | 20 --------------- 3 files changed, 47 deletions(-) diff --git a/driver/platform/common/inc/msm_vidc_platform.h b/driver/platform/common/inc/msm_vidc_platform.h index 1e89136dc3..2468ff8cba 100644 --- a/driver/platform/common/inc/msm_vidc_platform.h +++ b/driver/platform/common/inc/msm_vidc_platform.h @@ -159,7 +159,5 @@ int msm_vidc_init_platform(struct platform_device *pdev); int msm_vidc_deinit_platform(struct platform_device *pdev); int msm_vidc_read_efuse(struct msm_vidc_core *core); void msm_vidc_sort_table(struct msm_vidc_core *core); -void msm_vidc_ddr_ubwc_config( - struct msm_vidc_platform_data *platform_data, u32 hbb_override_val); #endif // _MSM_VIDC_PLATFORM_H_ diff --git a/driver/platform/common/src/msm_vidc_platform.c b/driver/platform/common/src/msm_vidc_platform.c index 57c38075b5..b59fcdbdf3 100644 --- a/driver/platform/common/src/msm_vidc_platform.c +++ b/driver/platform/common/src/msm_vidc_platform.c @@ -4,7 +4,6 @@ * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. */ -#include #include #include @@ -457,30 +456,6 @@ int msm_vidc_read_efuse(struct msm_vidc_core *core) return rc; } -void msm_vidc_ddr_ubwc_config( - struct msm_vidc_platform_data *platform_data, u32 hbb_override_val) -{ - uint32_t ddr_type = DDR_TYPE_LPDDR5; - - if (!platform_data || !platform_data->ubwc_config) { - d_vpr_e("%s: invalid params\n", __func__); - return; - } - - ddr_type = of_fdt_get_ddrtype(); - if (ddr_type == -ENOENT) - d_vpr_e("Failed to get ddr type, use LPDDR5\n"); - - if (platform_data->ubwc_config && - (ddr_type == DDR_TYPE_LPDDR4 || - ddr_type == DDR_TYPE_LPDDR4X)) - platform_data->ubwc_config->highest_bank_bit = hbb_override_val; - - d_vpr_h("DDR Type 0x%x hbb 0x%x\n", - ddr_type, platform_data->ubwc_config ? - platform_data->ubwc_config->highest_bank_bit : -1); -} - void msm_vidc_sort_table(struct msm_vidc_core *core) { u32 i = 0; diff --git a/driver/platform/kalama/src/kalama.c b/driver/platform/kalama/src/kalama.c index 39921787b0..aed96cafc3 100644 --- a/driver/platform/kalama/src/kalama.c +++ b/driver/platform/kalama/src/kalama.c @@ -3,8 +3,6 @@ * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. */ -#include - #include "msm_vidc_control.h" #include "msm_vidc_kalama.h" #include "msm_vidc_platform.h" @@ -1924,21 +1922,6 @@ static const struct msm_vidc_platform_data kalama_data = { .format_data = &format_data_kalama, }; -int msm_vidc_kalama_check_ddr_type(void) -{ - u32 ddr_type; - - ddr_type = of_fdt_get_ddrtype(); - if (ddr_type != DDR_TYPE_LPDDR5 && - ddr_type != DDR_TYPE_LPDDR5X) { - d_vpr_e("%s: wrong ddr type %d\n", __func__, ddr_type); - return -EINVAL; - } else { - d_vpr_h("%s: ddr type %d\n", __func__, ddr_type); - } - return 0; -} - static int msm_vidc_init_data(struct msm_vidc_core *core) { int rc = 0; @@ -1950,9 +1933,6 @@ static int msm_vidc_init_data(struct msm_vidc_core *core) d_vpr_h("%s: initialize kalama data\n", __func__); core->platform->data = kalama_data; - rc = msm_vidc_kalama_check_ddr_type(); - if (rc) - return rc; return rc; } From 5b4ced6c7b6342280ef23c129f7323ed6b0bcb13 Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Mon, 3 Oct 2022 11:05:27 -0700 Subject: [PATCH 0730/1061] video: driver: enable best fit algo Change-Id: If13536330b0a7c3c37768dc85d9198c3e1e9630d Signed-off-by: Darshana Patil --- driver/vidc/src/msm_vidc_dt.c | 11 ++++------- 1 file changed, 4 insertions(+), 7 deletions(-) diff --git a/driver/vidc/src/msm_vidc_dt.c b/driver/vidc/src/msm_vidc_dt.c index 8ba8aa2f30..114165890b 100644 --- a/driver/vidc/src/msm_vidc_dt.c +++ b/driver/vidc/src/msm_vidc_dt.c @@ -802,13 +802,10 @@ static int msm_vidc_setup_context_bank(struct msm_vidc_core *core, * possibility to get a mapping for buffer in the configured CB. */ - /* - * TBD: iommu_dma_enable_best_fit_algo is commented temoprarily to enable dlkm - * compilation once headers are availbale when the GKI branch for Kailua (android13-5.next) - * branches out - */ - - /*iommu_dma_enable_best_fit_algo(cb->dev);*/ + /* remove kernel version condition once below api is whitelisted in pineapple */ +#if (LINUX_VERSION_CODE < KERNEL_VERSION(5,16,0)) + iommu_dma_enable_best_fit_algo(cb->dev); +#endif /* * configure device segment size and segment boundary to ensure From fbd52e8f197b40aa6a40081305ecd4e4fc065608 Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Mon, 3 Oct 2022 12:35:52 -0700 Subject: [PATCH 0731/1061] video: driver: remove usage of DMA_ATTR_DELAYED_UNMAP Change-Id: I8757a89c4c645059ac343b4147bf3c44c3ebe91b Signed-off-by: Darshana Patil --- driver/vidc/src/msm_vidc_vb2.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/driver/vidc/src/msm_vidc_vb2.c b/driver/vidc/src/msm_vidc_vb2.c index ae51df02d0..3a8568898f 100644 --- a/driver/vidc/src/msm_vidc_vb2.c +++ b/driver/vidc/src/msm_vidc_vb2.c @@ -100,8 +100,6 @@ void *msm_vb2_attach_dmabuf(struct vb2_buffer *vb, struct device *dev, } buf->attach->dma_map_attrs |= DMA_ATTR_SKIP_CPU_SYNC; - /* remove below flag when userspace recycles buffers in same index */ - buf->attach->dma_map_attrs |= DMA_ATTR_DELAYED_UNMAP; if (core->dt->sys_cache_present) buf->attach->dma_map_attrs |= DMA_ATTR_IOMMU_USE_UPSTREAM_HINT; From a99d47f6a335b3b311cc4dbc1d43470e66c29f0d Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Wed, 5 Oct 2022 18:09:58 -0700 Subject: [PATCH 0732/1061] video: driver: release buffer fix when a buffer is asked for release and if the same buffer is queued again before release done is received, then second time the FTB should be queued without RO flag Change-Id: I11c4494471129c5bb3ff4401ccfbd25c702c699d Signed-off-by: Darshana Patil --- driver/vidc/src/msm_vdec.c | 16 +++++++------- driver/vidc/src/msm_vidc_driver.c | 35 +++++++++++++++++++++++-------- 2 files changed, 34 insertions(+), 17 deletions(-) diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 01747454a5..0bde551cbf 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -1994,14 +1994,6 @@ int msm_vdec_qbuf(struct msm_vidc_inst *inst, struct vb2_buffer *vb2) return -EINVAL; } - if (vb2->type == OUTPUT_MPLANE) { - if (inst->capabilities->cap[DPB_LIST].value) { - rc = msm_vdec_release_nonref_buffers(inst); - if (rc) - return rc; - } - } - if (inst->adjust_priority) { s32 priority = inst->capabilities->cap[PRIORITY].value; @@ -2019,6 +2011,14 @@ int msm_vdec_qbuf(struct msm_vidc_inst *inst, struct vb2_buffer *vb2) if (rc) return rc; + if (vb2->type == OUTPUT_MPLANE) { + if (inst->capabilities->cap[DPB_LIST].value) { + rc = msm_vdec_release_nonref_buffers(inst); + if (rc) + return rc; + } + } + return rc; } diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index d6c9fbb491..93176ce4dd 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -2501,12 +2501,21 @@ int msm_vidc_process_readonly_buffers(struct msm_vidc_inst *inst, /* * check if read_only buffer is present in read_only list - * if present: add ro flag to buf + * if present: add ro flag to buf provided buffer is not + * pending release */ list_for_each_entry_safe(ro_buf, dummy, &inst->buffers.read_only.list, list) { - if (ro_buf->device_addr == buf->device_addr && - ro_buf->attr & MSM_VIDC_ATTR_READ_ONLY) { + if (ro_buf->device_addr != buf->device_addr) + continue; + if (ro_buf->attr & MSM_VIDC_ATTR_READ_ONLY && + !(ro_buf->attr & MSM_VIDC_ATTR_PENDING_RELEASE)) { + /* add READ_ONLY to the buffer going to the firmware */ buf->attr |= MSM_VIDC_ATTR_READ_ONLY; + /* + * remove READ_ONLY on the read_only list buffer so that + * it will get removed from the read_only list below + */ + ro_buf->attr &= ~MSM_VIDC_ATTR_READ_ONLY; break; } } @@ -2516,13 +2525,21 @@ int msm_vidc_process_readonly_buffers(struct msm_vidc_inst *inst, /* if read only buffer do not remove */ if (ro_buf->attr & MSM_VIDC_ATTR_READ_ONLY) continue; - /* if v4l2 did not ask for unmap/detach then do not remove */ - if (!ro_buf->sg_table || !ro_buf->attach || !ro_buf->dbuf_get) - continue; + print_vidc_buffer(VIDC_LOW, "low ", "ro buf removed", inst, ro_buf); - msm_vidc_dma_buf_unmap_attachment(ro_buf->attach, ro_buf->sg_table); - msm_vidc_dma_buf_detach(ro_buf->dmabuf, ro_buf->attach); - msm_vidc_memory_put_dmabuf(inst, ro_buf->dmabuf); + /* unmap the buffer if driver holds mapping */ + if (ro_buf->sg_table && ro_buf->attach) { + msm_vidc_dma_buf_unmap_attachment(ro_buf->attach, ro_buf->sg_table); + msm_vidc_dma_buf_detach(ro_buf->dmabuf, ro_buf->attach); + ro_buf->dmabuf = NULL; + ro_buf->attach = NULL; + } + if (ro_buf->dbuf_get) { + msm_vidc_memory_put_dmabuf(inst, ro_buf->dmabuf); + ro_buf->dmabuf = NULL; + ro_buf->dbuf_get = 0; + } + list_del_init(&ro_buf->list); msm_memory_pool_free(inst, ro_buf); } From 1245e165552077982c268d8957c36dff90c208a9 Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Wed, 5 Oct 2022 18:08:45 -0700 Subject: [PATCH 0733/1061] Revert "video: driver: remove usage of DMA_ATTR_DELAYED_UNMAP" This reverts commit fbd52e8f197b40aa6a40081305ecd4e4fc065608. DMA_ATTR_DELAYED_UNMAP attribute is required to have dma driver maintain one map reference if we have client recycling more than VIDEO_MAX_FRAME(32) buffers. Change-Id: I7005f874e387ce111082821c2af2226417766622 Signed-off-by: Darshana Patil --- driver/vidc/src/msm_vidc_vb2.c | 1 + 1 file changed, 1 insertion(+) diff --git a/driver/vidc/src/msm_vidc_vb2.c b/driver/vidc/src/msm_vidc_vb2.c index 3a8568898f..bfeafa8480 100644 --- a/driver/vidc/src/msm_vidc_vb2.c +++ b/driver/vidc/src/msm_vidc_vb2.c @@ -100,6 +100,7 @@ void *msm_vb2_attach_dmabuf(struct vb2_buffer *vb, struct device *dev, } buf->attach->dma_map_attrs |= DMA_ATTR_SKIP_CPU_SYNC; + buf->attach->dma_map_attrs |= DMA_ATTR_DELAYED_UNMAP; if (core->dt->sys_cache_present) buf->attach->dma_map_attrs |= DMA_ATTR_IOMMU_USE_UPSTREAM_HINT; From 4a24729ad957b477efd315f1ef465b8450186917 Mon Sep 17 00:00:00 2001 From: Dikshita Agarwal Date: Fri, 7 Oct 2022 15:38:21 +0530 Subject: [PATCH 0734/1061] video: driver: fix compilation issue with format specifier Fix compilation issues due to wrong format specifiers being used for printing device address. Change-Id: Ic8ee8e9cdb563ea3efea9fa2e713befad74447cb Signed-off-by: Dikshita Agarwal --- driver/vidc/src/msm_vidc.c | 2 +- driver/vidc/src/msm_vidc_driver.c | 12 ++++++------ driver/vidc/src/msm_vidc_memory.c | 4 ++-- 3 files changed, 9 insertions(+), 9 deletions(-) diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index 406389e814..11eea75c86 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -209,7 +209,7 @@ int msm_vidc_query_menu(void *instance, struct v4l2_querymenu *qmenu) rc = -EINVAL; i_vpr_h(inst, - "%s: ctrl: %s: min %lld, max %lld, menu_skip_mask %#x, qmenu: id %u, index %d, %s\n", + "%s: ctrl: %s: min %lld, max %lld, menu_skip_mask %lld, qmenu: id %u, index %d, %s\n", __func__, ctrl->name, ctrl->minimum, ctrl->maximum, ctrl->menu_skip_mask, qmenu->id, qmenu->index, rc ? "not supported" : "supported"); diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 93176ce4dd..9fbc863b59 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -3005,7 +3005,7 @@ int msm_vidc_put_delayed_unmap(struct msm_vidc_inst *inst, struct msm_vidc_map * } if (!map->skip_delayed_unmap) { - i_vpr_e(inst, "%s: no delayed unmap, addr %#x\n", + i_vpr_e(inst, "%s: no delayed unmap, addr %#llx\n", __func__, map->device_addr); return -EINVAL; } @@ -3842,7 +3842,7 @@ int msm_vidc_destroy_internal_buffer(struct msm_vidc_inst *inst, return 0; } - i_vpr_h(inst, "%s: destroy: type: %8s, size: %9u, device_addr %#x\n", __func__, + i_vpr_h(inst, "%s: destroy: type: %8s, size: %9u, device_addr %#llx\n", __func__, buf_name(buffer->type), buffer->buffer_size, buffer->device_addr); buffers = msm_vidc_get_buffers(inst, buffer->type, __func__); @@ -3999,7 +3999,7 @@ int msm_vidc_create_internal_buffer(struct msm_vidc_inst *inst, buffer->dmabuf = alloc->dmabuf; buffer->device_addr = map->device_addr; - i_vpr_h(inst, "%s: create: type: %8s, size: %9u, device_addr %#x\n", __func__, + i_vpr_h(inst, "%s: create: type: %8s, size: %9u, device_addr %#llx\n", __func__, buf_name(buffer_type), buffers->size, buffer->device_addr); return 0; @@ -4080,7 +4080,7 @@ int msm_vidc_queue_internal_buffers(struct msm_vidc_inst *inst, /* mark queued */ buffer->attr |= MSM_VIDC_ATTR_QUEUED; - i_vpr_h(inst, "%s: queue: type: %8s, size: %9u, device_addr %#x\n", __func__, + i_vpr_h(inst, "%s: queue: type: %8s, size: %9u, device_addr %#llx\n", __func__, buf_name(buffer->type), buffer->buffer_size, buffer->device_addr); } @@ -4161,7 +4161,7 @@ int msm_vidc_release_internal_buffers(struct msm_vidc_inst *inst, /* mark pending release */ buffer->attr |= MSM_VIDC_ATTR_PENDING_RELEASE; - i_vpr_h(inst, "%s: release: type: %8s, size: %9u, device_addr %#x\n", __func__, + i_vpr_h(inst, "%s: release: type: %8s, size: %9u, device_addr %#llx\n", __func__, buf_name(buffer->type), buffer->buffer_size, buffer->device_addr); } @@ -5709,7 +5709,7 @@ void msm_vidc_destroy_buffers(struct msm_vidc_inst *inst) continue; list_for_each_entry_safe(buf, dummy, &buffers->list, list) { i_vpr_h(inst, - "destroying internal buffer: type %d idx %d fd %d addr %#x size %d\n", + "destroying internal buffer: type %d idx %d fd %d addr %#llx size %d\n", buf->type, buf->index, buf->fd, buf->device_addr, buf->buffer_size); msm_vidc_destroy_internal_buffer(inst, buf); } diff --git a/driver/vidc/src/msm_vidc_memory.c b/driver/vidc/src/msm_vidc_memory.c index b1dd7d0a00..729b2195c2 100644 --- a/driver/vidc/src/msm_vidc_memory.c +++ b/driver/vidc/src/msm_vidc_memory.c @@ -268,7 +268,7 @@ int msm_vidc_memory_map(struct msm_vidc_core *core, struct msm_vidc_map *map) exit: d_vpr_l( - "%s: type %11s, device_addr %#x, refcount %d, region %d\n", + "%s: type %11s, device_addr %#llx, refcount %d, region %d\n", __func__, buf_name(map->type), map->device_addr, map->refcount, map->region); return 0; @@ -300,7 +300,7 @@ int msm_vidc_memory_unmap(struct msm_vidc_core *core, } d_vpr_l( - "%s: type %11s, device_addr %#x, refcount %d, region %d\n", + "%s: type %11s, device_addr %#llx, refcount %d, region %d\n", __func__, buf_name(map->type), map->device_addr, map->refcount, map->region); if (map->refcount) From efa48a607a64004463c3b33567d1f14bc885d81a Mon Sep 17 00:00:00 2001 From: Vedang Nagar Date: Thu, 6 Oct 2022 17:23:14 +0530 Subject: [PATCH 0735/1061] video: driver: Handle mem corruption while parsing dpb list prop While parsing dpb_list_property packet, memcpy happens from hfi_packet to inst->dpb_list_payload which is being allocated with max size of 256 Bytes. If dpb_list_prop packet size is greater than 256Bytes, then driver will change the state to ERROR state but still memcpy will happen shich will read and write memory greater than allocated hence corrupting the memory. Added fix by returning error. Change-Id: I81617c88c68194fbd442059c63fa702d1e839478 Signed-off-by: Vedang Nagar --- driver/vidc/src/venus_hfi_response.c | 1 + 1 file changed, 1 insertion(+) diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index c37ad90a66..d3a1a5edfd 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -1587,6 +1587,7 @@ static int handle_dpb_list_property(struct msm_vidc_inst *inst, "%s: dpb list payload size %d exceeds expected max size %d\n", __func__, payload_size, MAX_DPB_LIST_PAYLOAD_SIZE); msm_vidc_change_state(inst, MSM_VIDC_ERROR, __func__); + return -EINVAL; } memcpy(inst->dpb_list_payload, payload_start, payload_size); From 42780a25cefd1c22dec54b148527eb7aa5d401c7 Mon Sep 17 00:00:00 2001 From: Deepa Guthyappa Madivalara Date: Mon, 10 Oct 2022 11:38:56 -0700 Subject: [PATCH 0736/1061] video: driver: Update Pineapple database Update pineapple database on par with kalama database Change-Id: If7eb4046abea0c23c703355c3054e8b7d60d1089 Signed-off-by: Deepa Guthyappa Madivalara --- .../pineapple/src/msm_vidc_pineapple.c | 93 +++--- driver/platform/pineapple/src/pineapple.c | 286 ++++-------------- 2 files changed, 98 insertions(+), 281 deletions(-) diff --git a/driver/platform/pineapple/src/msm_vidc_pineapple.c b/driver/platform/pineapple/src/msm_vidc_pineapple.c index 58d5cbd309..64a63df395 100644 --- a/driver/platform/pineapple/src/msm_vidc_pineapple.c +++ b/driver/platform/pineapple/src/msm_vidc_pineapple.c @@ -316,6 +316,9 @@ static struct msm_platform_core_capability core_data_pineapple[] = { {NON_FATAL_FAULTS, 1}, {ENC_AUTO_FRAMERATE, 1}, {MMRM, 1}, + {DEVICE_CAPS, V4L2_CAP_VIDEO_M2M_MPLANE | V4L2_CAP_META_CAPTURE | + V4L2_CAP_STREAMING}, + {SUPPORTS_REQUESTS, 1}, }; static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { @@ -564,7 +567,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_OUTBUF_FENCE, HFI_PROP_FENCE, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, /* * Client to do set_ctrl with FENCE_ID to set fence_id @@ -1670,7 +1673,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_BITSTREAM_RESOLUTION, HFI_PROP_BITSTREAM_RESOLUTION, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_CROP_OFFSETS, DEC, AV1, MSM_VIDC_META_DISABLE, @@ -1679,7 +1682,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_CROP_OFFSETS, HFI_PROP_CROP_OFFSETS, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {ALL_INTRA, ENC, H264|HEVC, 0, 1, 1, 0, @@ -1687,25 +1690,13 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { 0, CAP_FLAG_OUTPUT_PORT}, - {INPUT_METADATA_FD, ENC|DEC, CODECS_ALL, - INVALID_FD, INT_MAX, 1, INVALID_FD, - V4L2_CID_MPEG_VIDC_INPUT_METADATA_FD, - 0, - CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - - {INPUT_META_VIA_REQUEST, ENC|DEC, CODECS_ALL, - 0, 1, 1, 0, - V4L2_CID_MPEG_VIDC_INPUT_METADATA_VIA_REQUEST_ENABLE, - 0, - CAP_FLAG_INPUT_PORT}, - {META_LTR_MARK_USE, ENC, H264|HEVC, MSM_VIDC_META_DISABLE, MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_LTR_MARK_USE_DETAILS, HFI_PROP_LTR_MARK_USE_DETAILS, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_SEQ_HDR_NAL, ENC, CODECS_ALL, MSM_VIDC_META_DISABLE, @@ -1713,7 +1704,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_SEQ_HEADER_NAL, HFI_PROP_METADATA_SEQ_HEADER_NAL, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_DPB_MISR, DEC, CODECS_ALL, MSM_VIDC_META_DISABLE, @@ -1721,7 +1712,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_DPB_LUMA_CHROMA_MISR, HFI_PROP_DPB_LUMA_CHROMA_MISR, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_OPB_MISR, DEC, CODECS_ALL, MSM_VIDC_META_DISABLE, @@ -1729,7 +1720,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_OPB_LUMA_CHROMA_MISR, HFI_PROP_OPB_LUMA_CHROMA_MISR, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_INTERLACE, DEC, H264, MSM_VIDC_META_DISABLE, @@ -1737,7 +1728,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_INTERLACE, HFI_PROP_INTERLACE_INFO, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_TIMESTAMP, DEC | ENC, CODECS_ALL, MSM_VIDC_META_DISABLE, @@ -1745,7 +1736,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_TIMESTAMP, HFI_PROP_TIMESTAMP, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_CONCEALED_MB_CNT, DEC, CODECS_ALL, MSM_VIDC_META_DISABLE, @@ -1753,7 +1744,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_CONCEALED_MB_COUNT, HFI_PROP_CONEALED_MB_COUNT, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_HIST_INFO, DEC, HEVC|AV1|VP9, MSM_VIDC_META_DISABLE, @@ -1761,7 +1752,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_HISTOGRAM_INFO, HFI_PROP_HISTOGRAM_INFO, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_TRANSCODING_STAT_INFO, DEC, HEVC|H264, MSM_VIDC_META_DISABLE, @@ -1769,7 +1760,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_TRANSCODE_STAT_INFO, HFI_PROP_TRANSCODING_STAT_INFO, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_TRANSCODING_STAT_INFO, ENC, HEVC|H264, MSM_VIDC_META_DISABLE, @@ -1777,7 +1768,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_TRANSCODE_STAT_INFO, HFI_PROP_TRANSCODING_STAT_INFO, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_PICTURE_TYPE, DEC, CODECS_ALL, MSM_VIDC_META_DISABLE, @@ -1785,7 +1776,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_PICTURE_TYPE, HFI_PROP_PICTURE_TYPE, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_SEI_MASTERING_DISP, ENC, HEVC|HEIC, MSM_VIDC_META_DISABLE, @@ -1793,7 +1784,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_SEI_MASTERING_DISPLAY_COLOUR, HFI_PROP_SEI_MASTERING_DISPLAY_COLOUR, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_SEI_MASTERING_DISP, DEC, HEVC|HEIC|AV1, MSM_VIDC_META_DISABLE, @@ -1802,7 +1793,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_SEI_MASTERING_DISPLAY_COLOUR, HFI_PROP_SEI_MASTERING_DISPLAY_COLOUR, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_SEI_CLL, ENC, HEVC|HEIC, MSM_VIDC_META_DISABLE, @@ -1810,7 +1801,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_SEI_CONTENT_LIGHT_LEVEL, HFI_PROP_SEI_CONTENT_LIGHT_LEVEL, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_SEI_CLL, DEC, HEVC|HEIC|AV1, MSM_VIDC_META_DISABLE, @@ -1819,7 +1810,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_SEI_CONTENT_LIGHT_LEVEL, HFI_PROP_SEI_CONTENT_LIGHT_LEVEL, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_HDR10PLUS, ENC, HEVC|HEIC, MSM_VIDC_META_DISABLE, @@ -1827,7 +1818,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_HDR10PLUS, HFI_PROP_SEI_HDR10PLUS_USERDATA, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_HDR10PLUS, DEC, HEVC|HEIC|AV1, MSM_VIDC_META_DISABLE, @@ -1836,7 +1827,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_HDR10PLUS, HFI_PROP_SEI_HDR10PLUS_USERDATA, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_DOLBY_RPU, ENC, HEVC, MSM_VIDC_META_DISABLE, @@ -1844,7 +1835,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_DOLBY_RPU, HFI_PROP_DOLBY_RPU_METADATA, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_DOLBY_RPU, DEC, H264|HEVC, MSM_VIDC_META_DISABLE, @@ -1852,7 +1843,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_DOLBY_RPU, HFI_PROP_DOLBY_RPU_METADATA, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_EVA_STATS, ENC, CODECS_ALL, MSM_VIDC_META_DISABLE, @@ -1860,7 +1851,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_EVA_STATS, HFI_PROP_EVA_STAT_INFO, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_BUF_TAG, ENC, CODECS_ALL, MSM_VIDC_META_DISABLE, @@ -1869,7 +1860,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_BUFFER_TAG, HFI_PROP_BUFFER_TAG, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, /* * when fence enabled, client needs output buffer_tag @@ -1883,7 +1874,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_BUFFER_TAG, HFI_PROP_BUFFER_TAG, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_DPB_TAG_LIST, DEC, CODECS_ALL, MSM_VIDC_META_DISABLE, @@ -1891,7 +1882,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_DPB_TAG_LIST, HFI_PROP_DPB_TAG_LIST, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_SUBFRAME_OUTPUT, ENC, HEIC | H264 | HEVC, MSM_VIDC_META_DISABLE, @@ -1899,7 +1890,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_SUBFRAME_OUTPUT, HFI_PROP_SUBFRAME_OUTPUT, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_SUBFRAME_OUTPUT, DEC, CODECS_ALL, MSM_VIDC_META_DISABLE, @@ -1907,7 +1898,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_SUBFRAME_OUTPUT, HFI_PROP_SUBFRAME_OUTPUT, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_ENC_QP_METADATA, ENC, CODECS_ALL, MSM_VIDC_META_DISABLE, @@ -1915,7 +1906,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_ENC_QP_METADATA, HFI_PROP_ENC_QP_METADATA, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_ROI_INFO, ENC, H264|HEVC, MSM_VIDC_META_DISABLE, @@ -1923,7 +1914,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_ROI_INFO, HFI_PROP_ROI_INFO, - CAP_FLAG_INPUT_PORT | CAP_FLAG_BITMASK}, + CAP_FLAG_INPUT_PORT | CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_SALIENCY_INFO, ENC, H264|HEVC, MSM_VIDC_META_DISABLE, @@ -1931,7 +1922,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_SALIENCY_INFO, HFI_PROP_ROI_AS_SALIENCY_INFO, - CAP_FLAG_INPUT_PORT | CAP_FLAG_BITMASK}, + CAP_FLAG_INPUT_PORT | CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_DEC_QP_METADATA, DEC, CODECS_ALL, MSM_VIDC_META_DISABLE, @@ -1939,7 +1930,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_DEC_QP_METADATA, HFI_PROP_DEC_QP_METADATA, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {GRID, ENC, HEIC, 0, 1, 1, 1, @@ -1958,7 +1949,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_MAX_NUM_REORDER_FRAMES, HFI_PROP_MAX_NUM_REORDER_FRAMES, - CAP_FLAG_BITMASK}, + CAP_FLAG_BITMASK | CAP_FLAG_META}, {DELIVERY_MODE, ENC, HEVC, 0, 1, 1, 0, @@ -2589,18 +2580,6 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine msm_vidc_adjust_all_intra, NULL}, - {INPUT_METADATA_FD, ENC|DEC, CODECS_ALL, - {0}, - {0}, - NULL, - NULL}, - - {INPUT_META_VIA_REQUEST, ENC|DEC, CODECS_ALL, - {0}, - {0}, - NULL, - NULL}, - {META_EVA_STATS, ENC, CODECS_ALL, {0}, {ENH_LAYER_COUNT, REQUEST_PREPROCESS}}, diff --git a/driver/platform/pineapple/src/pineapple.c b/driver/platform/pineapple/src/pineapple.c index f4d3dd33bd..f55d42acad 100644 --- a/driver/platform/pineapple/src/pineapple.c +++ b/driver/platform/pineapple/src/pineapple.c @@ -35,11 +35,17 @@ #define H264 MSM_VIDC_H264 #define HEVC MSM_VIDC_HEVC #define VP9 MSM_VIDC_VP9 -#define AV1 MSM_VIDC_AV1 -#define HEIC MSM_VIDC_HEIC -#define CODECS_ALL (H264 | HEVC | VP9 | HEIC | AV1) +#define CODECS_ALL (H264 | HEVC | VP9) #define MAXIMUM_OVERRIDE_VP9_FPS 180 +#ifndef V4L2_PIX_FMT_QC08C +#define V4L2_PIX_FMT_QC08C v4l2_fourcc('Q', '0', '8', 'C') +#endif + +#ifndef V4L2_PIX_FMT_QC10C +#define V4L2_PIX_FMT_QC10C v4l2_fourcc('Q', '1', '0', 'C') +#endif + static struct codec_info codec_data_pineapple[] = { { .v4l2_codec = V4L2_PIX_FMT_H264, @@ -69,6 +75,16 @@ static struct color_format_info color_format_data_pineapple[] = { .vidc_color_format = MSM_VIDC_FMT_NV21, .pixfmt_name = "NV21", }, + { + .v4l2_color_format = V4L2_PIX_FMT_QC08C, + .vidc_color_format = MSM_VIDC_FMT_NV12C, + .pixfmt_name = "NV12C", + }, + { + .v4l2_color_format = V4L2_PIX_FMT_QC10C, + .vidc_color_format = MSM_VIDC_FMT_TP10C, + .pixfmt_name = "TP10C", + }, { .v4l2_color_format = V4L2_PIX_FMT_RGBA32, .vidc_color_format = MSM_VIDC_FMT_RGBA8888, @@ -171,8 +187,8 @@ static struct matrix_coeff_info matrix_coeff_data_pineapple[] = { static struct msm_platform_core_capability core_data_pineapple[] = { /* {type, value} */ - {ENC_CODECS, H264|HEVC|HEIC}, - {DEC_CODECS, H264|HEVC|VP9|AV1|HEIC}, + {ENC_CODECS, H264|HEVC}, + {DEC_CODECS, H264|HEVC|VP9}, {MAX_SESSION_COUNT, 16}, {MAX_NUM_720P_SESSIONS, 16}, {MAX_NUM_1080P_SESSIONS, 16}, @@ -203,6 +219,8 @@ static struct msm_platform_core_capability core_data_pineapple[] = { {STATS_TIMEOUT_MS, 2000}, {NON_FATAL_FAULTS, 1}, {ENC_AUTO_FRAMERATE, 1}, + {DEVICE_CAPS, V4L2_CAP_VIDEO_M2M_MPLANE | V4L2_CAP_STREAMING}, + {SUPPORTS_REQUESTS, 0}, }; static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { @@ -221,8 +239,6 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { {FRAME_WIDTH, ENC, HEVC, 96, 8192, 1, 1920}, - {FRAME_WIDTH, ENC, HEIC, 128, 16384, 1, 16384}, - {LOSSLESS_FRAME_WIDTH, ENC, CODECS_ALL, 128, 4096, 1, 1920}, {LOSSLESS_FRAME_WIDTH, ENC, HEVC, 96, 4096, 1, 1920}, @@ -235,8 +251,6 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { {FRAME_HEIGHT, ENC, HEVC, 96, 8192, 1, 1080}, - {FRAME_HEIGHT, ENC, HEIC, 128, 16384, 1, 16384}, - {LOSSLESS_FRAME_HEIGHT, ENC, CODECS_ALL, 128, 4096, 1, 1080}, {LOSSLESS_FRAME_HEIGHT, ENC, HEVC, 96, 4096, 1, 1080}, @@ -247,24 +261,11 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C, MSM_VIDC_FMT_NV12C}, - {PIX_FMTS, ENC|DEC, HEVC|VP9|AV1, + {PIX_FMTS, ENC|DEC, HEVC|VP9, MSM_VIDC_FMT_NV12, MSM_VIDC_FMT_TP10C, MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C | - MSM_VIDC_FMT_P010 | MSM_VIDC_FMT_TP10C, - MSM_VIDC_FMT_NV12C}, - - {PIX_FMTS, ENC, HEIC, - MSM_VIDC_FMT_NV12, - MSM_VIDC_FMT_P010, - MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_P010, - MSM_VIDC_FMT_NV12}, - - {PIX_FMTS, DEC, HEIC, - MSM_VIDC_FMT_NV12, MSM_VIDC_FMT_TP10C, - MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C | - MSM_VIDC_FMT_P010 | MSM_VIDC_FMT_TP10C, MSM_VIDC_FMT_NV12C}, {MIN_BUFFERS_INPUT, ENC|DEC, CODECS_ALL, 0, 64, 1, 4, @@ -272,10 +273,6 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { 0, CAP_FLAG_VOLATILE}, - {MIN_BUFFERS_INPUT, ENC|DEC, HEIC, 0, 64, 1, 1, - V4L2_CID_MIN_BUFFERS_FOR_OUTPUT, - 0, - CAP_FLAG_VOLATILE}, {MIN_BUFFERS_OUTPUT, ENC|DEC, CODECS_ALL, 0, 64, 1, 4, @@ -288,44 +285,32 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { {MBPF, ENC, HEVC, 36, 138240, 1, 138240}, - /* ((16384x16384)/256) */ - {MBPF, ENC, HEIC, 36, 1048576, 1, 1048576}, - {MBPF, DEC, CODECS_ALL, 36, 138240, 1, 138240}, /* (4096 * 2304) / 256 */ {MBPF, DEC, VP9, 36, 36864, 1, 36864}, - /* ((8192x8192)/256) */ - {MBPF, DEC, HEIC, 64, 262144, 1, 262144 }, - /* (4096 * 2304) / 256 */ {LOSSLESS_MBPF, ENC, H264|HEVC, 64, 36864, 1, 36864}, /* Batch Mode Decode */ /* TODO: update with new values based on updated voltage corner */ - {BATCH_MBPF, DEC, H264|HEVC|VP9|AV1, 64, 34816, 1, 34816}, + {BATCH_MBPF, DEC, H264|HEVC|VP9, 64, 34816, 1, 34816}, /* (4096 * 2304) / 256 */ - {BATCH_FPS, DEC, H264|HEVC|VP9|AV1, 1, 120, 1, 120}, + {BATCH_FPS, DEC, H264|HEVC|VP9, 1, 120, 1, 120}, /* ((1920 * 1088) / 256) * 480 fps */ {MBPS, ENC, CODECS_ALL, 64, 3916800, 1, 3916800}, {MBPS, ENC, HEVC, 36, 3916800, 1, 3916800}, - /* ((16384x16384)/256)@1fps */ - {MBPS, ENC, HEIC, 36, 1048576, 1, 1048576}, - /* ((1920 * 1088) / 256) * 960 fps */ {MBPS, DEC, CODECS_ALL, 64, 7833600, 1, 7833600}, /* ((4096 * 2304) / 256) * 120 */ {MBPS, DEC, VP9, 36, 4423680, 1, 4423680}, - /* ((8192x8192)/256)@1fps */ - {MBPS, DEC, HEIC, 64, 262144, 1, 262144 }, - /* Enable check mbps for encoder */ {CHECK_MBPS, ENC, CODECS_ALL, 0, 1, 1, 1}, @@ -339,13 +324,6 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { HFI_PROP_FRAME_RATE, CAP_FLAG_OUTPUT_PORT}, - {FRAME_RATE, ENC, HEIC, - (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), - 1, (MINIMUM_FPS << 16), - 0, - HFI_PROP_FRAME_RATE, - CAP_FLAG_OUTPUT_PORT}, - {OPERATING_RATE, ENC, CODECS_ALL, (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), 1, (DEFAULT_FPS << 16)}, @@ -364,7 +342,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { {MB_CYCLES_VSP, DEC, CODECS_ALL, 25, 25, 1, 25}, - {MB_CYCLES_VSP, DEC, VP9|AV1, 60, 60, 1, 60}, + {MB_CYCLES_VSP, DEC, VP9, 60, 60, 1, 60}, {MB_CYCLES_VPP, ENC, CODECS_ALL, 675, 675, 1, 675}, @@ -434,12 +412,6 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { HFI_PROP_NAL_LENGTH_FIELD, CAP_FLAG_OUTPUT_PORT}, - {WITHOUT_STARTCODE, DEC, AV1, - 0, 1, 1, 0, - V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE, - HFI_PROP_NAL_LENGTH_FIELD, - CAP_FLAG_INPUT_PORT}, - {NAL_LENGTH_FIELD, ENC, CODECS_ALL, V4L2_MPEG_VIDEO_HEVC_SIZE_0, V4L2_MPEG_VIDEO_HEVC_SIZE_4, @@ -490,15 +462,6 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { HFI_PROP_RATE_CONTROL, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - {BITRATE_MODE, ENC, HEIC, - V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, - V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, - BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CQ), - V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, - V4L2_CID_MPEG_VIDEO_BITRATE_MODE, - HFI_PROP_RATE_CONTROL, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - {CABAC_MAX_BITRATE, ENC, H264|HEVC, 0, 160000000, 1, 160000000}, @@ -515,7 +478,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { 0, 1, 1, 0, V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU}, - {FRAME_SKIP_MODE, ENC, H264|HEVC|HEIC, + {FRAME_SKIP_MODE, ENC, H264|HEVC, V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED, V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT, BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED) | @@ -526,7 +489,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { 0, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - {FRAME_RC_ENABLE, ENC, H264|HEVC|HEIC, + {FRAME_RC_ENABLE, ENC, H264|HEVC, 0, 1, 1, 1, V4L2_CID_MPEG_VIDEO_FRAME_RC_ENABLE}, @@ -537,13 +500,6 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - {CONSTANT_QUALITY, ENC, HEIC, - 1, MAX_CONSTANT_QUALITY, 1, 100, - V4L2_CID_MPEG_VIDEO_CONSTANT_QUALITY, - HFI_PROP_CONSTANT_QUALITY, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - {GOP_SIZE, ENC, CODECS_ALL, 0, INT_MAX, 1, 2 * DEFAULT_FPS - 1, V4L2_CID_MPEG_VIDEO_GOP_SIZE, @@ -551,13 +507,6 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - {GOP_SIZE, ENC, HEIC, - 0, INT_MAX, 1, 0 /* all intra */, - V4L2_CID_MPEG_VIDEO_GOP_SIZE, - HFI_PROP_MAX_GOP_FRAMES, - CAP_FLAG_OUTPUT_PORT | - CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - {GOP_CLOSURE, ENC, H264|HEVC, 0, 1, 1, 1, V4L2_CID_MPEG_VIDEO_GOP_CLOSURE, @@ -569,12 +518,6 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { HFI_PROP_MAX_B_FRAMES, CAP_FLAG_OUTPUT_PORT}, - {B_FRAME, ENC, HEIC, - 0, 1, 1, 0, - V4L2_CID_MPEG_VIDEO_B_FRAMES, - HFI_PROP_MAX_B_FRAMES, - CAP_FLAG_OUTPUT_PORT}, - {BLUR_TYPES, ENC, H264|HEVC, MSM_VIDC_BLUR_NONE, MSM_VIDC_BLUR_EXTERNAL, BIT(MSM_VIDC_BLUR_NONE) | BIT(MSM_VIDC_BLUR_EXTERNAL), @@ -594,7 +537,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { 0, CAP_FLAG_NONE}, - {LOWLATENCY_MODE, DEC, H264|HEVC|VP9|AV1, + {LOWLATENCY_MODE, DEC, H264|HEVC|VP9, 0, 1, 1, 0, 0, HFI_PROP_SEQ_CHANGE_AT_SYNC_FRAME, @@ -675,7 +618,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { HFI_PROP_MIN_QP_PACKED, CAP_FLAG_OUTPUT_PORT}, - {MIN_FRAME_QP, ENC, HEVC|HEIC, + {MIN_FRAME_QP, ENC, HEVC, MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP, HFI_PROP_MIN_QP_PACKED, @@ -685,7 +628,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, V4L2_CID_MPEG_VIDEO_H264_I_FRAME_MIN_QP}, - {I_FRAME_MIN_QP, ENC, HEVC|HEIC, + {I_FRAME_MIN_QP, ENC, HEVC, MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_MIN_QP}, @@ -693,7 +636,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, V4L2_CID_MPEG_VIDEO_H264_P_FRAME_MIN_QP}, - {P_FRAME_MIN_QP, ENC, HEVC|HEIC, + {P_FRAME_MIN_QP, ENC, HEVC, MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_MIN_QP}, @@ -701,7 +644,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, V4L2_CID_MPEG_VIDEO_H264_B_FRAME_MIN_QP}, - {B_FRAME_MIN_QP, ENC, HEVC|HEIC, + {B_FRAME_MIN_QP, ENC, HEVC, MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_MIN_QP}, @@ -711,7 +654,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { HFI_PROP_MAX_QP_PACKED, CAP_FLAG_OUTPUT_PORT}, - {MAX_FRAME_QP, ENC, HEVC|HEIC, + {MAX_FRAME_QP, ENC, HEVC, MIN_QP_10BIT, MAX_QP, 1, MAX_QP, V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP, HFI_PROP_MAX_QP_PACKED, @@ -721,7 +664,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { MIN_QP_8BIT, MAX_QP, 1, MAX_QP, V4L2_CID_MPEG_VIDEO_H264_I_FRAME_MAX_QP}, - {I_FRAME_MAX_QP, ENC, HEVC|HEIC, + {I_FRAME_MAX_QP, ENC, HEVC, MIN_QP_10BIT, MAX_QP, 1, MAX_QP, V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_MAX_QP}, @@ -729,7 +672,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { MIN_QP_8BIT, MAX_QP, 1, MAX_QP, V4L2_CID_MPEG_VIDEO_H264_P_FRAME_MAX_QP}, - {P_FRAME_MAX_QP, ENC, HEVC|HEIC, + {P_FRAME_MAX_QP, ENC, HEVC, MIN_QP_10BIT, MAX_QP, 1, MAX_QP, V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_MAX_QP}, @@ -737,7 +680,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { MIN_QP_8BIT, MAX_QP, 1, MAX_QP, V4L2_CID_MPEG_VIDEO_H264_B_FRAME_MAX_QP}, - {B_FRAME_MAX_QP, ENC, HEVC|HEIC, + {B_FRAME_MAX_QP, ENC, HEVC, MIN_QP_10BIT, MAX_QP, 1, MAX_QP, V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_MAX_QP}, @@ -829,12 +772,6 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - {ENH_LAYER_COUNT, DEC, AV1, - 0, MAX_OP_POINT, 1, 0, - 0, - HFI_PROP_AV1_OP_POINT, - CAP_FLAG_INPUT_PORT}, - {L0_BR, ENC, H264, 1, MAX_BITRATE, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L0_BR, @@ -928,7 +865,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { HFI_PROP_CABAC_SESSION, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - {ENTROPY_MODE, DEC, H264|HEVC|VP9|AV1, + {ENTROPY_MODE, DEC, H264|HEVC|VP9, V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC, V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC) | @@ -950,7 +887,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { HFI_PROP_PROFILE, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - {PROFILE, ENC|DEC, HEVC|HEIC, + {PROFILE, ENC|DEC, HEVC, V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN, V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE, BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN) | @@ -998,7 +935,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { HFI_PROP_LEVEL, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - {LEVEL, ENC, HEVC|HEIC, + {LEVEL, ENC, HEVC, V4L2_MPEG_VIDEO_HEVC_LEVEL_1, V4L2_MPEG_VIDEO_HEVC_LEVEL_6, BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_1) | @@ -1045,7 +982,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { HFI_PROP_LEVEL, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - {LEVEL, DEC, HEVC|HEIC, + {LEVEL, DEC, HEVC, V4L2_MPEG_VIDEO_HEVC_LEVEL_1, V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2, BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_1) | @@ -1096,15 +1033,6 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { HFI_PROP_TIER, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - {HEVC_TIER, ENC|DEC, HEIC, - V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, - V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, - BIT(V4L2_MPEG_VIDEO_HEVC_TIER_MAIN), - V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, - V4L2_CID_MPEG_VIDEO_HEVC_TIER, - HFI_PROP_TIER, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - {LF_MODE, ENC, H264, V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED, DB_H264_DISABLE_SLICE_BOUNDARY, @@ -1116,7 +1044,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { HFI_PROP_DEBLOCKING_MODE, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - {LF_MODE, ENC, HEVC|HEIC, + {LF_MODE, ENC, HEVC, V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_DISABLED, DB_HEVC_DISABLE_SLICE_BOUNDARY, BIT(V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_DISABLED) | @@ -1131,7 +1059,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { -6, 6, 1, 0, V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_ALPHA}, - {LF_ALPHA, ENC, HEVC|HEIC, + {LF_ALPHA, ENC, HEVC, -6, 6, 1, 0, V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2}, @@ -1139,7 +1067,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { -6, 6, 1, 0, V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_BETA}, - {LF_BETA, ENC, HEVC|HEIC, + {LF_BETA, ENC, HEVC, -6, 6, 1, 0, V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2}, @@ -1154,15 +1082,6 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { 0, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - {SLICE_MODE, ENC, HEIC, - V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, - V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, - BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE), - V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, - V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE, - 0, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - {SLICE_MAX_BYTES, ENC, H264|HEVC, MIN_SLICE_BYTE_SIZE, MAX_SLICE_BYTE_SIZE, 1, MIN_SLICE_BYTE_SIZE, @@ -1195,19 +1114,19 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { HFI_PROP_CHROMA_QP_OFFSET, CAP_FLAG_OUTPUT_PORT}, - {DISPLAY_DELAY_ENABLE, DEC, H264|HEVC|VP9|AV1, + {DISPLAY_DELAY_ENABLE, DEC, H264|HEVC|VP9, 0, 1, 1, 0, V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY_ENABLE, HFI_PROP_DECODE_ORDER_OUTPUT, CAP_FLAG_INPUT_PORT}, - {DISPLAY_DELAY, DEC, H264|HEVC|VP9|AV1, + {DISPLAY_DELAY, DEC, H264|HEVC|VP9, 0, 1, 1, 0, V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY, HFI_PROP_DECODE_ORDER_OUTPUT, CAP_FLAG_INPUT_PORT}, - {OUTPUT_ORDER, DEC, H264|HEVC|VP9|AV1, + {OUTPUT_ORDER, DEC, H264|HEVC|VP9, 0, 1, 1, 0, 0, HFI_PROP_DECODE_ORDER_OUTPUT, @@ -1262,7 +1181,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { MSM_VIDC_POWER_SAVE_MODE, 1, MSM_VIDC_POWER_SAVE_MODE}, - {CODED_FRAMES, DEC, H264|HEVC|HEIC, + {CODED_FRAMES, DEC, H264|HEVC, CODED_FRAMES_PROGRESSIVE, CODED_FRAMES_INTERLACE, 1, CODED_FRAMES_PROGRESSIVE, 0, @@ -1272,7 +1191,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { 0, HFI_PROP_LUMA_CHROMA_BIT_DEPTH}, - {CODEC_CONFIG, DEC, H264|HEVC|HEIC|AV1, 0, 1, 1, 0, + {CODEC_CONFIG, DEC, H264|HEVC, 0, 1, 1, 0, 0, 0, CAP_FLAG_DYNAMIC_ALLOWED}, @@ -1311,35 +1230,12 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { HFI_PROP_DPB_LIST, CAP_FLAG_OUTPUT_PORT}, - {FILM_GRAIN, DEC, AV1, - 0, 1, 1, 0, - 0, - HFI_PROP_AV1_FILM_GRAIN_PRESENT, - CAP_FLAG_VOLATILE}, - - {SUPER_BLOCK, DEC, AV1, - 0, 1, 1, 0, - 0, - HFI_PROP_AV1_SUPER_BLOCK_ENABLED}, - - {DRAP, DEC, AV1, - 0, S32_MAX, 1, 0, - 0, - HFI_PROP_AV1_DRAP_CONFIG, - CAP_FLAG_INPUT_PORT}, - {ALL_INTRA, ENC, H264|HEVC, 0, 1, 1, 0, 0, 0, CAP_FLAG_OUTPUT_PORT}, - {GRID, ENC, HEIC, - 0, 1, 1, 1, - 0, - HFI_PROP_HEIC_GRID_ENABLE, - CAP_FLAG_OUTPUT_PORT}, - {COMPLEXITY, ENC, H264|HEVC, 0, 100, 1, DEFAULT_COMPLEXITY, @@ -1362,11 +1258,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine {PROFILE, MIN_FRAME_QP, MAX_FRAME_QP, I_FRAME_QP, P_FRAME_QP, B_FRAME_QP, MIN_QUALITY, BLUR_TYPES}}, - {PIX_FMTS, ENC, HEIC, - {0}, - {PROFILE}}, - - {PIX_FMTS, DEC, HEVC|HEIC, + {PIX_FMTS, DEC, HEVC, {0}, {PROFILE}}, @@ -1412,12 +1304,6 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine NULL, msm_vidc_set_nal_length}, - {WITHOUT_STARTCODE, DEC, AV1, - {0}, - {0}, - NULL, - msm_vidc_set_u32}, - {REQUEST_I_FRAME, ENC, H264|HEVC, {0}, {0}, @@ -1457,13 +1343,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine msm_vidc_adjust_bitrate_mode, msm_vidc_set_u32_enum}, - {BITRATE_MODE, ENC, HEIC, - {0}, - {CONSTANT_QUALITY}, - msm_vidc_adjust_bitrate_mode, - msm_vidc_set_u32_enum}, - - {CONSTANT_QUALITY, ENC, HEVC|HEIC, + {CONSTANT_QUALITY, ENC, HEVC, {BITRATE_MODE}, {0}, NULL, @@ -1475,24 +1355,12 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine msm_vidc_adjust_gop_size, msm_vidc_set_gop_size}, - {GOP_SIZE, ENC, HEIC, - {0}, - {0}, - NULL, - msm_vidc_set_u32}, - {B_FRAME, ENC, H264|HEVC, {ENH_LAYER_COUNT}, {ALL_INTRA}, msm_vidc_adjust_b_frame, msm_vidc_set_u32}, - {B_FRAME, ENC, HEIC, - {0}, - {0}, - NULL, - msm_vidc_set_u32}, - {BLUR_TYPES, ENC, H264|HEVC, {PIX_FMTS, BITRATE_MODE, MIN_QUALITY}, {0}, @@ -1505,7 +1373,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine msm_vidc_adjust_enc_lowlatency_mode, NULL}, - {LOWLATENCY_MODE, DEC, H264|HEVC|VP9|AV1, + {LOWLATENCY_MODE, DEC, H264|HEVC|VP9, {0}, {STAGE}, msm_vidc_adjust_dec_lowlatency_mode, @@ -1577,7 +1445,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine NULL, msm_vidc_set_min_qp}, - {MIN_FRAME_QP, ENC, HEVC|HEIC, + {MIN_FRAME_QP, ENC, HEVC, {PIX_FMTS}, {0}, msm_vidc_adjust_hevc_min_qp, @@ -1589,7 +1457,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine NULL, msm_vidc_set_max_qp}, - {MAX_FRAME_QP, ENC, HEVC|HEIC, + {MAX_FRAME_QP, ENC, HEVC, {PIX_FMTS}, {0}, msm_vidc_adjust_hevc_max_qp, @@ -1645,12 +1513,6 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine msm_vidc_adjust_layer_count, msm_vidc_set_layer_count_and_type}, - {ENH_LAYER_COUNT, DEC, AV1, - {0}, - {0}, - NULL, - msm_vidc_set_u32}, - {L0_BR, ENC, H264|HEVC, {0}, {0}, @@ -1705,13 +1567,13 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine NULL, msm_vidc_set_u32_enum}, - {PROFILE, ENC|DEC, HEVC|HEIC, + {PROFILE, ENC|DEC, HEVC, {PIX_FMTS}, {0}, msm_vidc_adjust_profile, msm_vidc_set_u32_enum}, - {PROFILE, DEC, VP9|AV1, + {PROFILE, DEC, VP9, {0}, {0}, NULL, @@ -1729,13 +1591,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine NULL, msm_vidc_set_level}, - {AV1_TIER, DEC, AV1, - {0}, - {0}, - NULL, - msm_vidc_set_u32_enum}, - - {HEVC_TIER, ENC|DEC, HEVC|HEIC, + {HEVC_TIER, ENC|DEC, HEVC, {0}, {0}, NULL, @@ -1753,12 +1609,6 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine msm_vidc_adjust_slice_count, msm_vidc_set_slice_count}, - {SLICE_MODE, ENC, HEIC, - {0}, - {0}, - msm_vidc_adjust_slice_count, - msm_vidc_set_slice_count}, - {TRANSFORM_8X8, ENC, H264, {PROFILE}, {0}, @@ -1771,19 +1621,19 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine msm_vidc_adjust_chroma_qp_index_offset, msm_vidc_set_chroma_qp_index_offset}, - {DISPLAY_DELAY_ENABLE, DEC, H264|HEVC|VP9|AV1, + {DISPLAY_DELAY_ENABLE, DEC, H264|HEVC|VP9, {0}, {OUTPUT_ORDER}, NULL, NULL}, - {DISPLAY_DELAY, DEC, H264|HEVC|VP9|AV1, + {DISPLAY_DELAY, DEC, H264|HEVC|VP9, {0}, {OUTPUT_ORDER}, NULL, NULL}, - {OUTPUT_ORDER, DEC, H264|HEVC|VP9|AV1, + {OUTPUT_ORDER, DEC, H264|HEVC|VP9, {THUMBNAIL_MODE, DISPLAY_DELAY, DISPLAY_DELAY_ENABLE}, {0}, msm_vidc_adjust_output_order, @@ -1837,7 +1687,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine NULL, msm_vidc_set_stage}, - {STAGE, DEC, H264|HEVC|VP9|AV1, + {STAGE, DEC, H264|HEVC|VP9, {LOWLATENCY_MODE}, {0}, NULL, @@ -1873,23 +1723,11 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine NULL, NULL}, - {DRAP, DEC, AV1, - {0}, - {0}, - NULL, - msm_vidc_set_u32}, - {ALL_INTRA, ENC, H264|HEVC, {GOP_SIZE, B_FRAME}, {LTR_COUNT, SLICE_MODE, BIT_RATE}, msm_vidc_adjust_all_intra, NULL}, - - {GRID, ENC, HEIC, - {0}, - {0}, - NULL, - msm_vidc_set_u32}, }; /* Default UBWC config for LPDDR5 */ From b0f6be067ecb77f0898b6ff54820e8da5c72970b Mon Sep 17 00:00:00 2001 From: Chinmay Sawarkar Date: Thu, 29 Sep 2022 17:54:17 -0700 Subject: [PATCH 0737/1061] video: driver: Update lanai power sequence 1. Update core power down sequence. 2. Update hw power up sequence. Change-Id: I428869ac92154b23cdbe3f51c7b299fe8a6cc71b Signed-off-by: Chinmay Sawarkar --- driver/variant/iris33/src/msm_vidc_iris33.c | 109 +++++++++++++++----- 1 file changed, 85 insertions(+), 24 deletions(-) diff --git a/driver/variant/iris33/src/msm_vidc_iris33.c b/driver/variant/iris33/src/msm_vidc_iris33.c index 6dd2aa77d8..5c8aeead12 100644 --- a/driver/variant/iris33/src/msm_vidc_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_iris33.c @@ -24,6 +24,7 @@ #define AON_MVP_NOC_RESET 0x0001F000 #define CPU_BASE_OFFS_IRIS33 0x000A0000 #define AON_BASE_OFFS 0x000E0000 +#define VCODEC_VIDEO_CC_BASE 0x00F00000 #define CPU_CS_BASE_OFFS_IRIS33 (CPU_BASE_OFFS_IRIS33) #define CPU_IC_BASE_OFFS_IRIS33 (CPU_BASE_OFFS_IRIS33) @@ -149,7 +150,9 @@ #define AON_WRAPPER_MVP_NOC_LPI_CONTROL (AON_BASE_OFFS) #define AON_WRAPPER_MVP_NOC_LPI_STATUS (AON_BASE_OFFS + 0x4) - +#define AON_WRAPPER_MVP_NOC_CORE_SW_RESET (AON_BASE_OFFS + 0x18) +#define AON_WRAPPER_MVP_NOC_CORE_CLK_CONTROL (AON_BASE_OFFS + 0x20) +#define AON_WRAPPER_SPARE (AON_BASE_OFFS + 0x28) /* * -------------------------------------------------------------------------- * MODULE: VCODEC_SS registers @@ -176,6 +179,14 @@ #define VCODEC_NOC_ERL_MAIN_ERRLOG2_HIGH 0x00011234 #define VCODEC_NOC_ERL_MAIN_ERRLOG3_LOW 0x00011238 #define VCODEC_NOC_ERL_MAIN_ERRLOG3_HIGH 0x0001123C +/* + * -------------------------------------------------------------------------- + * MODULE: VCODEC_VIDEO_CC registers + * -------------------------------------------------------------------------- + */ +#define VCODEC_VIDEO_CC_MVS0C_CBCR (VCODEC_VIDEO_CC_BASE + 0x8064) +#define VCODEC_VIDEO_CC_XO_CBCR (VCODEC_VIDEO_CC_BASE + 0x8124) + static int __interrupt_init_iris33(struct msm_vidc_core *vidc_core) { @@ -326,26 +337,22 @@ static int __power_off_iris33_hardware(struct msm_vidc_core *core) __func__, i, value); } - /* Apply partial reset on MSF interface and wait for ACK */ - rc = __write_register(core, AON_WRAPPER_MVP_NOC_RESET_REQ, 0x3); + /* set MNoC to low power, set PD_NOC_QREQ (bit 0) */ + rc = __write_register_masked(core, AON_WRAPPER_MVP_NOC_LPI_CONTROL, + 0x1, BIT(0)); if (rc) return rc; - rc = __read_register_with_poll_timeout(core, AON_WRAPPER_MVP_NOC_RESET_ACK, - 0x3, 0x3, 200, 2000); + rc = __read_register_with_poll_timeout(core, AON_WRAPPER_MVP_NOC_LPI_STATUS, + 0x1, 0x1, 200, 2000); if (rc) - d_vpr_h("%s: AON_WRAPPER_MVP_NOC_RESET assert failed\n", __func__); + d_vpr_h("%s: AON_WRAPPER_MVP_NOC_LPI_CONTROL failed\n", __func__); - /* De-assert partial reset on MSF interface and wait for ACK */ - rc = __write_register(core, AON_WRAPPER_MVP_NOC_RESET_REQ, 0x0); + rc = __write_register_masked(core, AON_WRAPPER_MVP_NOC_LPI_CONTROL, + 0x0, BIT(0)); if (rc) return rc; - rc = __read_register_with_poll_timeout(core, AON_WRAPPER_MVP_NOC_RESET_ACK, - 0x3, 0x0, 200, 2000); - if (rc) - d_vpr_h("%s: AON_WRAPPER_MVP_NOC_RESET de-assert failed\n", __func__); - /* * Reset both sides of 2 ahb2ahb_bridges (TZ and non-TZ) * do we need to check status register here? @@ -381,6 +388,7 @@ static int __power_off_iris33_controller(struct msm_vidc_core *core) { const struct msm_vidc_resources_ops *res_ops = core->res_ops; int rc = 0; + int value = 0; /* * mask fal10_veto QLPAC error since fal10_veto can go 1 @@ -390,17 +398,6 @@ static int __power_off_iris33_controller(struct msm_vidc_core *core) if (rc) return rc; - /* set MNoC to low power, set PD_NOC_QREQ (bit 0) */ - rc = __write_register_masked(core, AON_WRAPPER_MVP_NOC_LPI_CONTROL, - 0x1, BIT(0)); - if (rc) - return rc; - - rc = __read_register_with_poll_timeout(core, AON_WRAPPER_MVP_NOC_LPI_STATUS, - 0x1, 0x1, 200, 2000); - if (rc) - d_vpr_h("%s: AON_WRAPPER_MVP_NOC_LPI_CONTROL failed\n", __func__); - /* Set Iris CPU NoC to Low power */ rc = __write_register_masked(core, WRAPPER_IRIS_CPU_NOC_LPI_CONTROL, 0x1, BIT(0)); @@ -439,6 +436,63 @@ static int __power_off_iris33_controller(struct msm_vidc_core *core) if (rc) return rc; + /* Disable MVP NoC clock */ + rc = __write_register_masked(core, AON_WRAPPER_MVP_NOC_CORE_CLK_CONTROL, + 0x1, BIT(0)); + if (rc) + return rc; + + /* enable MVP_CTL reset and enable Force Sleep Retention */ + rc = __write_register(core, VCODEC_VIDEO_CC_MVS0C_CBCR, 0x6005); + if (rc) + return rc; + + /* enable MVP NoC reset */ + rc = __write_register_masked(core, AON_WRAPPER_MVP_NOC_CORE_SW_RESET, + 0x1, BIT(0)); + if (rc) + return rc; + + /* enable vcodec video_cc XO reset and disable video_cc XO clock */ + rc = __read_register(core, AON_WRAPPER_SPARE, &value); + if (rc) + return rc; + rc = __write_register(core, AON_WRAPPER_SPARE, value|0x2); + if (rc) + return rc; + rc = __write_register(core, VCODEC_VIDEO_CC_XO_CBCR, 0x4); + if (rc) + return rc; + + /* De-assert MVP_CTL reset and enable Force Sleep Retention */ + rc = __write_register(core, VCODEC_VIDEO_CC_MVS0C_CBCR, 0x6001); + if (rc) + return rc; + + /* De-assert MVP NoC reset */ + rc = __write_register_masked(core, AON_WRAPPER_MVP_NOC_CORE_SW_RESET, + 0x0, BIT(0)); + if (rc) + return rc; + + /* De-assert video_cc XO reset and enable video_cc XO clock after 80us */ + usleep_range(80, 100); + rc = __write_register(core, VCODEC_VIDEO_CC_XO_CBCR, 0x1); + if (rc) + return rc; + + /* Enable MVP NoC clock */ + rc = __write_register_masked(core, AON_WRAPPER_MVP_NOC_CORE_CLK_CONTROL, + 0x0, BIT(0)); + if (rc) + return rc; + + /* De-assert MVP_CTL Force Sleep Retention */ + rc = __write_register(core, VCODEC_VIDEO_CC_MVS0C_CBCR, 0x1); + if (rc) + return rc; + + /* Turn off MVP MVS0C core clock */ rc = res_ops->clk_disable(core, "core_clk"); if (rc) { @@ -453,6 +507,13 @@ static int __power_off_iris33_controller(struct msm_vidc_core *core) rc = 0; } + /* Turn off GCC AXI clock */ + rc = res_ops->clk_disable(core, "gcc_video_axi0"); + if (rc) { + d_vpr_e("%s: disable unprepare core_clk failed\n", __func__); + rc = 0; + } + return rc; } From 21eb38981e29cc5b15c9cb4a52dc968f8b5da547 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Wed, 12 Oct 2022 19:05:36 +0530 Subject: [PATCH 0738/1061] video: driver: reduce device_tree dependency for video Only keep minimal entries in dtsi, which is essential for other drivers usage. Move remaining all data into platform resource file. Remove device_tree dependency and maintain platform_data to initialize resources like regulators, interconnects, clocks, reset_clocks, subcaches and context_banks. Read static data like freq_table, firmware_name, pas_id also from platform_data instead of from dtsi. Change-Id: I73a1df10b92c55e55b23e538aea62598a7250ab4 Signed-off-by: Govindaraj Rajagopal --- .../platform/common/inc/msm_vidc_platform.h | 97 +- .../platform/common/src/msm_vidc_platform.c | 55 +- driver/platform/kalama/src/msm_vidc_kalama.c | 140 ++- driver/variant/common/src/msm_vidc_variant.c | 42 +- .../variant/iris3/src/msm_vidc_buffer_iris3.c | 1 - driver/variant/iris3/src/msm_vidc_iris3.c | 11 +- .../variant/iris3/src/msm_vidc_power_iris3.c | 22 +- driver/vidc/inc/msm_vidc_core.h | 3 +- driver/vidc/inc/msm_vidc_dt.h | 223 ---- driver/vidc/inc/msm_vidc_internal.h | 2 +- driver/vidc/inc/msm_vidc_memory.h | 1 - driver/vidc/inc/resources.h | 192 ++- driver/vidc/src/firmware.c | 48 +- driver/vidc/src/msm_vidc_debug.c | 9 +- driver/vidc/src/msm_vidc_dt.c | 973 --------------- driver/vidc/src/msm_vidc_memory.c | 31 +- driver/vidc/src/msm_vidc_power.c | 35 +- driver/vidc/src/msm_vidc_probe.c | 275 ++-- driver/vidc/src/msm_vidc_vb2.c | 4 +- driver/vidc/src/resources.c | 1109 ++++++++++------- driver/vidc/src/venus_hfi.c | 116 +- 21 files changed, 1430 insertions(+), 1959 deletions(-) diff --git a/driver/platform/common/inc/msm_vidc_platform.h b/driver/platform/common/inc/msm_vidc_platform.h index 2468ff8cba..66738f520a 100644 --- a/driver/platform/common/inc/msm_vidc_platform.h +++ b/driver/platform/common/inc/msm_vidc_platform.h @@ -41,6 +41,61 @@ extern u32 vpe_csc_custom_matrix_coeff[MAX_MATRIX_COEFFS]; extern u32 vpe_csc_custom_bias_coeff[MAX_BIAS_COEFFS]; extern u32 vpe_csc_custom_limit_coeff[MAX_LIMIT_COEFFS]; +struct bw_table { + const char *name; + u32 min_kbps; + u32 max_kbps; +}; + +struct regulator_table { + const char *name; + bool hw_trigger; +}; + +struct clk_table { + const char *name; + u32 clk_id; + bool scaling; +}; + +struct clk_rst_table { + const char *name; +}; + +struct subcache_table { + const char *name; + u32 llcc_id; +}; + +struct context_bank_table { + const char *name; + u32 start; + u32 size; + bool secure; + bool dma_coherant; + u32 region; +}; + +struct freq_table { + unsigned long freq; +}; + +struct reg_preset_table { + u32 reg; + u32 value; + u32 mask; +}; + +struct msm_vidc_ubwc_config_data { + u32 max_channels; + u32 mal_length; + u32 highest_bank_bit; + u32 bank_swzl_level; + u32 bank_swz2_level; + u32 bank_swz3_level; + u32 bank_spreading; +}; + struct codec_info { u32 v4l2_codec; enum msm_vidc_codec_type vidc_codec; @@ -112,16 +167,6 @@ struct msm_vidc_efuse_data { enum efuse_purpose purpose; }; -struct msm_vidc_ubwc_config_data { - u32 max_channels; - u32 mal_length; - u32 highest_bank_bit; - u32 bank_swzl_level; - u32 bank_swz2_level; - u32 bank_swz3_level; - u32 bank_spreading; -}; - struct msm_vidc_format_capability { struct codec_info *codec_info; u32 codec_info_size; @@ -136,6 +181,26 @@ struct msm_vidc_format_capability { }; struct msm_vidc_platform_data { + const struct bw_table *bw_tbl; + unsigned int bw_tbl_size; + const struct regulator_table *regulator_tbl; + unsigned int regulator_tbl_size; + const struct clk_table *clk_tbl; + unsigned int clk_tbl_size; + const struct clk_rst_table *clk_rst_tbl; + unsigned int clk_rst_tbl_size; + const struct subcache_table *subcache_tbl; + unsigned int subcache_tbl_size; + const struct context_bank_table *context_bank_tbl; + unsigned int context_bank_tbl_size; + struct freq_table *freq_tbl; + unsigned int freq_tbl_size; + const struct reg_preset_table *reg_prst_tbl; + unsigned int reg_prst_tbl_size; + struct msm_vidc_ubwc_config_data *ubwc_config; + const char *fwname; + u32 pas_id; + bool supports_mmrm; struct msm_platform_core_capability *core_data; u32 core_data_size; struct msm_platform_inst_capability *inst_cap_data; @@ -143,7 +208,6 @@ struct msm_vidc_platform_data { struct msm_platform_inst_cap_dependency *inst_cap_dependency_data; u32 inst_cap_dependency_data_size; struct msm_vidc_csc_coeff csc_data; - struct msm_vidc_ubwc_config_data *ubwc_config; struct msm_vidc_efuse_data *efuse_data; unsigned int efuse_data_size; unsigned int sku_version; @@ -155,9 +219,18 @@ struct msm_vidc_platform { struct msm_vidc_platform_data data; }; +static inline bool is_sys_cache_present(struct msm_vidc_core *core) +{ + return !!core->platform->data.subcache_tbl_size; +} + +static inline bool is_mmrm_supported(struct msm_vidc_core *core) +{ + return !!core->platform->data.supports_mmrm; +} + int msm_vidc_init_platform(struct platform_device *pdev); int msm_vidc_deinit_platform(struct platform_device *pdev); int msm_vidc_read_efuse(struct msm_vidc_core *core); -void msm_vidc_sort_table(struct msm_vidc_core *core); #endif // _MSM_VIDC_PLATFORM_H_ diff --git a/driver/platform/common/src/msm_vidc_platform.c b/driver/platform/common/src/msm_vidc_platform.c index f3fc3de4a6..169f61c04c 100644 --- a/driver/platform/common/src/msm_vidc_platform.c +++ b/driver/platform/common/src/msm_vidc_platform.c @@ -5,7 +5,8 @@ */ #include -#include +#include +#include #include "msm_vidc_platform.h" #include "msm_vidc_debug.h" @@ -13,7 +14,6 @@ #include "msm_vidc_vb2.h" #include "msm_vidc_control.h" #include "msm_vidc_core.h" -#include "msm_vidc_dt.h" #include "msm_vidc_debug.h" #include "msm_vidc_internal.h" #if defined(CONFIG_MSM_VIDC_WAIPIO) @@ -25,9 +25,6 @@ #if defined(CONFIG_MSM_VIDC_PINEAPPLE) #include "msm_vidc_pineapple.h" #endif -#if defined(CONFIG_MSM_VIDC_PINEAPPLE) -#include "msm_vidc_pineapple.h" -#endif #if defined(CONFIG_MSM_VIDC_ANORAK) #include "msm_vidc_anorak.h" #endif @@ -221,7 +218,7 @@ static int msm_vidc_deinit_platform_variant(struct msm_vidc_core *core, struct d d_vpr_h("%s()\n", __func__); #if defined(CONFIG_MSM_VIDC_WAIPIO) - if (of_device_is_compatible(dev->of_node, "qcom,msm-vidc-waipio")) { + if (of_device_is_compatible(dev->of_node, "qcom,sm8450-vidc")) { rc = msm_vidc_deinit_platform_waipio(core, dev); if (rc) d_vpr_e("%s: failed with %d\n", __func__, rc); @@ -229,7 +226,8 @@ static int msm_vidc_deinit_platform_variant(struct msm_vidc_core *core, struct d } #endif #if defined(CONFIG_MSM_VIDC_KALAMA) - if (of_device_is_compatible(dev->of_node, "qcom,msm-vidc-kalama")) { + if (of_device_is_compatible(dev->of_node, "qcom,sm8550-vidc") || + of_device_is_compatible(dev->of_node, "qcom,sm8550-vidc-v2")) { rc = msm_vidc_deinit_platform_kalama(core, dev); if (rc) d_vpr_e("%s: failed with %d\n", __func__, rc); @@ -237,7 +235,7 @@ static int msm_vidc_deinit_platform_variant(struct msm_vidc_core *core, struct d } #endif #if defined(CONFIG_MSM_VIDC_PINEAPPLE) - if (of_device_is_compatible(dev->of_node, "qcom,msm-vidc-pineapple")) { + if (of_device_is_compatible(dev->of_node, "qcom,sm8650-vidc")) { rc = msm_vidc_deinit_platform_pineapple(core, dev); if (rc) d_vpr_e("%s: failed with %d\n", __func__, rc); @@ -245,7 +243,7 @@ static int msm_vidc_deinit_platform_variant(struct msm_vidc_core *core, struct d } #endif #if defined(CONFIG_MSM_VIDC_ANORAK) - if (of_device_is_compatible(dev->of_node, "qcom,msm-vidc-anorak")) { + if (of_device_is_compatible(dev->of_node, "qcom,sxr2230p-vidc")) { rc = msm_vidc_deinit_platform_anorak(core, dev); if (rc) d_vpr_e("%s: failed with %d\n", __func__, rc); @@ -268,7 +266,7 @@ static int msm_vidc_init_platform_variant(struct msm_vidc_core *core, struct dev d_vpr_h("%s()\n", __func__); #if defined(CONFIG_MSM_VIDC_WAIPIO) - if (of_device_is_compatible(dev->of_node, "qcom,msm-vidc-waipio")) { + if (of_device_is_compatible(dev->of_node, "qcom,sm8450-vidc")) { rc = msm_vidc_init_platform_waipio(core, dev); if (rc) d_vpr_e("%s: failed with %d\n", __func__, rc); @@ -276,7 +274,8 @@ static int msm_vidc_init_platform_variant(struct msm_vidc_core *core, struct dev } #endif #if defined(CONFIG_MSM_VIDC_KALAMA) - if (of_device_is_compatible(dev->of_node, "qcom,msm-vidc-kalama")) { + if (of_device_is_compatible(dev->of_node, "qcom,sm8550-vidc") || + of_device_is_compatible(dev->of_node, "qcom,sm8550-vidc-v2")) { rc = msm_vidc_init_platform_kalama(core, dev); if (rc) d_vpr_e("%s: failed with %d\n", __func__, rc); @@ -284,7 +283,7 @@ static int msm_vidc_init_platform_variant(struct msm_vidc_core *core, struct dev } #endif #if defined(CONFIG_MSM_VIDC_PINEAPPLE) - if (of_device_is_compatible(dev->of_node, "qcom,msm-vidc-pineapple")) { + if (of_device_is_compatible(dev->of_node, "qcom,sm8650-vidc")) { rc = msm_vidc_init_platform_pineapple(core, dev); if (rc) d_vpr_e("%s: failed with %d\n", __func__, rc); @@ -292,7 +291,7 @@ static int msm_vidc_init_platform_variant(struct msm_vidc_core *core, struct dev } #endif #if defined(CONFIG_MSM_VIDC_ANORAK) - if (of_device_is_compatible(dev->of_node, "qcom,msm-vidc-anorak")) { + if (of_device_is_compatible(dev->of_node, "qcom,sxr2230p-vidc")) { rc = msm_vidc_init_platform_anorak(core, dev); if (rc) d_vpr_e("%s: failed with %d\n", __func__, rc); @@ -315,7 +314,7 @@ static int msm_vidc_deinit_vpu(struct msm_vidc_core *core, struct device *dev) d_vpr_h("%s()\n", __func__); #if defined(CONFIG_MSM_VIDC_IRIS2) - if (of_device_is_compatible(dev->of_node, "qcom,msm-vidc-iris2")) { + if (of_device_is_compatible(dev->of_node, "qcom,sm8450-vidc")) { rc = msm_vidc_deinit_iris2(core); if (rc) d_vpr_e("%s: failed with %d\n", __func__, rc); @@ -323,7 +322,8 @@ static int msm_vidc_deinit_vpu(struct msm_vidc_core *core, struct device *dev) } #endif #if defined(CONFIG_MSM_VIDC_IRIS3) - if (of_device_is_compatible(dev->of_node, "qcom,msm-vidc-iris3")) { + if (of_device_is_compatible(dev->of_node, "qcom,sm8550-vidc") || + of_device_is_compatible(dev->of_node, "qcom,sm8550-vidc-v2")) { rc = msm_vidc_deinit_iris3(core); if (rc) d_vpr_e("%s: failed with %d\n", __func__, rc); @@ -331,7 +331,7 @@ static int msm_vidc_deinit_vpu(struct msm_vidc_core *core, struct device *dev) } #endif #if defined(CONFIG_MSM_VIDC_IRIS33) - if (of_device_is_compatible(dev->of_node, "qcom,msm-vidc-iris33")) { + if (of_device_is_compatible(dev->of_node, "qcom,sm8650-vidc")) { rc = msm_vidc_deinit_iris33(core); if (rc) d_vpr_e("%s: failed with %d\n", __func__, rc); @@ -351,7 +351,7 @@ static int msm_vidc_init_vpu(struct msm_vidc_core *core, struct device *dev) } #if defined(CONFIG_MSM_VIDC_IRIS2) - if (of_device_is_compatible(dev->of_node, "qcom,msm-vidc-iris2")) { + if (of_device_is_compatible(dev->of_node, "qcom,sm8450-vidc")) { rc = msm_vidc_init_iris2(core); if (rc) d_vpr_e("%s: failed with %d\n", __func__, rc); @@ -359,7 +359,8 @@ static int msm_vidc_init_vpu(struct msm_vidc_core *core, struct device *dev) } #endif #if defined(CONFIG_MSM_VIDC_IRIS3) - if (of_device_is_compatible(dev->of_node, "qcom,msm-vidc-iris3")) { + if (of_device_is_compatible(dev->of_node, "qcom,sm8550-vidc") || + of_device_is_compatible(dev->of_node, "qcom,sm8550-vidc-v2")) { rc = msm_vidc_init_iris3(core); if (rc) d_vpr_e("%s: failed with %d\n", __func__, rc); @@ -367,7 +368,7 @@ static int msm_vidc_init_vpu(struct msm_vidc_core *core, struct device *dev) } #endif #if defined(CONFIG_MSM_VIDC_IRIS33) - if (of_device_is_compatible(dev->of_node, "qcom,msm-vidc-iris33")) { + if (of_device_is_compatible(dev->of_node, "qcom,sm8650-vidc")) { rc = msm_vidc_init_iris33(core); if (rc) d_vpr_e("%s: failed with %d\n", __func__, rc); @@ -494,19 +495,3 @@ int msm_vidc_read_efuse(struct msm_vidc_core *core) } return rc; } - -void msm_vidc_sort_table(struct msm_vidc_core *core) -{ - u32 i = 0; - - if (!core || !core->dt || !core->dt->allowed_clks_tbl) { - d_vpr_e("%s: invalid params\n", __func__); - return; - } - - sort(core->dt->allowed_clks_tbl, core->dt->allowed_clks_tbl_size, - sizeof(*core->dt->allowed_clks_tbl), cmp, NULL); - d_vpr_h("Updated allowed clock rates\n"); - for (i = 0; i < core->dt->allowed_clks_tbl_size; i++) - d_vpr_h(" %d\n", core->dt->allowed_clks_tbl[i]); -} diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index f71cda4ada..8b0196d7ce 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -4,9 +4,13 @@ * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved. */ -#include +#include +#include +#include +#include #include + #include "msm_vidc_kalama.h" #include "msm_vidc_platform.h" #include "msm_vidc_debug.h" @@ -315,7 +319,6 @@ static struct msm_platform_core_capability core_data_kalama[] = { {AV_SYNC_WINDOW_SIZE, 40}, {NON_FATAL_FAULTS, 1}, {ENC_AUTO_FRAMERATE, 1}, - {MMRM, 1}, {DEVICE_CAPS, V4L2_CAP_VIDEO_M2M_MPLANE | V4L2_CAP_META_CAPTURE | V4L2_CAP_STREAMING}, {SUPPORTS_REQUESTS, 1}, @@ -2626,7 +2629,128 @@ static struct msm_vidc_format_capability format_data_kalama = { .matrix_coeff_info_size = ARRAY_SIZE(matrix_coeff_data_kalama), }; +/* name, min_kbps, max_kbps */ +static const struct bw_table kalama_bw_table[] = { + { "venus-cnoc", 1000, 1000 }, + { "venus-ddr", 1000, 15000000 }, + { "venus-llcc", 1000, 15000000 }, +}; + +/* name, hw_trigger */ +static const struct regulator_table kalama_regulator_table[] = { + { "iris-ctl", 0 }, + { "vcodec", 1 }, +}; + +/* name, clock id, scaling */ +static const struct clk_table kalama_clk_table[] = { + { "gcc_video_axi0", GCC_VIDEO_AXI0_CLK, 0 }, + { "core_clk", VIDEO_CC_MVS0C_CLK, 0 }, + { "vcodec_clk", VIDEO_CC_MVS0_CLK, 0 }, + { "video_cc_mvs0_clk_src", VIDEO_CC_MVS0_CLK_SRC, 1 }, +}; + +/* name */ +static const struct clk_rst_table kalama_clk_reset_table[] = { + { "video_axi_reset" }, +}; + +/* name, llcc_id */ +static const struct subcache_table kalama_subcache_table[] = { + { "vidsc0", LLCC_VIDSC0 }, + { "vidvsp", LLCC_VIDVSP }, +}; + +/* name, start, size, secure, dma_coherant, region */ +const struct context_bank_table kalama_context_bank_table[] = { + {"qcom,vidc,cb-ns", 0x25800000, 0xba800000, 0, 1, MSM_VIDC_NON_SECURE }, + {"qcom,vidc,cb-ns-pxl", 0x00100000, 0xdff00000, 0, 1, MSM_VIDC_NON_SECURE_PIXEL }, + {"qcom,vidc,cb-sec-pxl", 0x00500000, 0xdfb00000, 1, 0, MSM_VIDC_SECURE_PIXEL }, + {"qcom,vidc,cb-sec-non-pxl", 0x01000000, 0x24800000, 1, 0, MSM_VIDC_SECURE_NONPIXEL }, + {"qcom,vidc,cb-sec-bitstream", 0x00500000, 0xdfb00000, 1, 0, MSM_VIDC_SECURE_BITSTREAM }, +}; + +/* freq */ +static struct freq_table kalama_freq_table[] = { + {481000000}, {444000000}, {366000000}, {338000000}, {240000000} +}; + +static struct freq_table kalama_freq_table_v2[] = { + {533333333}, {444000000}, {366000000}, {338000000}, {240000000} +}; + +/* register, value, mask */ +static const struct reg_preset_table kalama_reg_preset_table[] = { + { 0xB0088, 0x0, 0x11 }, +}; + static const struct msm_vidc_platform_data kalama_data = { + /* resources dependent on other module */ + .bw_tbl = kalama_bw_table, + .bw_tbl_size = ARRAY_SIZE(kalama_bw_table), + .regulator_tbl = kalama_regulator_table, + .regulator_tbl_size = ARRAY_SIZE(kalama_regulator_table), + .clk_tbl = kalama_clk_table, + .clk_tbl_size = ARRAY_SIZE(kalama_clk_table), + .clk_rst_tbl = kalama_clk_reset_table, + .clk_rst_tbl_size = ARRAY_SIZE(kalama_clk_reset_table), + .subcache_tbl = kalama_subcache_table, + .subcache_tbl_size = ARRAY_SIZE(kalama_subcache_table), + + /* populate context bank */ + .context_bank_tbl = kalama_context_bank_table, + .context_bank_tbl_size = ARRAY_SIZE(kalama_context_bank_table), + + /* platform specific resources */ + .freq_tbl = kalama_freq_table, + .freq_tbl_size = ARRAY_SIZE(kalama_freq_table), + .reg_prst_tbl = kalama_reg_preset_table, + .reg_prst_tbl_size = ARRAY_SIZE(kalama_reg_preset_table), + .fwname = "vpu30_4v", + .pas_id = 9, + .supports_mmrm = 1, + + /* caps related resorces */ + .core_data = core_data_kalama, + .core_data_size = ARRAY_SIZE(core_data_kalama), + .inst_cap_data = instance_cap_data_kalama, + .inst_cap_data_size = ARRAY_SIZE(instance_cap_data_kalama), + .inst_cap_dependency_data = instance_cap_dependency_data_kalama, + .inst_cap_dependency_data_size = ARRAY_SIZE(instance_cap_dependency_data_kalama), + .csc_data.vpe_csc_custom_bias_coeff = vpe_csc_custom_bias_coeff, + .csc_data.vpe_csc_custom_matrix_coeff = vpe_csc_custom_matrix_coeff, + .csc_data.vpe_csc_custom_limit_coeff = vpe_csc_custom_limit_coeff, + .ubwc_config = ubwc_config_kalama, + .format_data = &format_data_kalama, +}; + +static const struct msm_vidc_platform_data kalama_data_v2 = { + /* resources dependent on other module */ + .bw_tbl = kalama_bw_table, + .bw_tbl_size = ARRAY_SIZE(kalama_bw_table), + .regulator_tbl = kalama_regulator_table, + .regulator_tbl_size = ARRAY_SIZE(kalama_regulator_table), + .clk_tbl = kalama_clk_table, + .clk_tbl_size = ARRAY_SIZE(kalama_clk_table), + .clk_rst_tbl = kalama_clk_reset_table, + .clk_rst_tbl_size = ARRAY_SIZE(kalama_clk_reset_table), + .subcache_tbl = kalama_subcache_table, + .subcache_tbl_size = ARRAY_SIZE(kalama_subcache_table), + + /* populate context bank */ + .context_bank_tbl = kalama_context_bank_table, + .context_bank_tbl_size = ARRAY_SIZE(kalama_context_bank_table), + + /* platform specific resources */ + .freq_tbl = kalama_freq_table_v2, + .freq_tbl_size = ARRAY_SIZE(kalama_freq_table_v2), + .reg_prst_tbl = kalama_reg_preset_table, + .reg_prst_tbl_size = ARRAY_SIZE(kalama_reg_preset_table), + .fwname = "vpu30_4v", + .pas_id = 9, + .supports_mmrm = 1, + + /* caps related resorces */ .core_data = core_data_kalama, .core_data_size = ARRAY_SIZE(core_data_kalama), .inst_cap_data = instance_cap_data_kalama, @@ -2655,17 +2779,21 @@ int msm_vidc_kalama_check_ddr_type(void) return 0; } -static int msm_vidc_init_data(struct msm_vidc_core *core) +static int msm_vidc_init_data(struct msm_vidc_core *core, struct device *dev) { int rc = 0; - if (!core || !core->platform) { + if (!core || !core->platform || !dev) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } d_vpr_h("%s: initialize kalama data\n", __func__); - core->platform->data = kalama_data; + if (of_device_is_compatible(dev->of_node, "qcom,sm8550-vidc-v2")) + core->platform->data = kalama_data_v2; + else + core->platform->data = kalama_data; + rc = msm_vidc_kalama_check_ddr_type(); if (rc) return rc; @@ -2677,7 +2805,7 @@ int msm_vidc_init_platform_kalama(struct msm_vidc_core *core, struct device *dev { int rc = 0; - rc = msm_vidc_init_data(core); + rc = msm_vidc_init_data(core, dev); if (rc) return rc; diff --git a/driver/variant/common/src/msm_vidc_variant.c b/driver/variant/common/src/msm_vidc_variant.c index fafdbaafcc..293099d4c7 100644 --- a/driver/variant/common/src/msm_vidc_variant.c +++ b/driver/variant/common/src/msm_vidc_variant.c @@ -9,8 +9,8 @@ #include "msm_vidc_core.h" #include "msm_vidc_debug.h" -#include "msm_vidc_dt.h" #include "msm_vidc_variant.h" +#include "msm_vidc_platform.h" static void __fatal_error(bool fatal) { @@ -35,7 +35,7 @@ int __write_register(struct msm_vidc_core *core, u32 reg, u32 value) u8 *base_addr; int rc = 0; - if (!core) { + if (!core || !core->resource) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -49,7 +49,7 @@ int __write_register(struct msm_vidc_core *core, u32 reg, u32 value) return -EINVAL; } - base_addr = core->register_base_addr; + base_addr = core->resource->register_base_addr; d_vpr_l("regwrite(%pK + %#x) = %#x\n", base_addr, hwiosymaddr, value); base_addr += hwiosymaddr; writel_relaxed(value, base_addr); @@ -74,7 +74,7 @@ int __write_register_masked(struct msm_vidc_core *core, u32 reg, u32 value, u8 *base_addr; int rc = 0; - if (!core) { + if (!core || !core->resource) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -89,7 +89,7 @@ int __write_register_masked(struct msm_vidc_core *core, u32 reg, u32 value, return -EINVAL; } - base_addr = core->register_base_addr; + base_addr = core->resource->register_base_addr; base_addr += reg; prev_val = readl_relaxed(base_addr); @@ -116,7 +116,7 @@ int __read_register(struct msm_vidc_core *core, u32 reg, u32 *value) int rc = 0; u8 *base_addr; - if (!core || !value) { + if (!core || !core->resource || !value) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -126,7 +126,7 @@ int __read_register(struct msm_vidc_core *core, u32 reg, u32 *value) return -EINVAL; } - base_addr = core->register_base_addr; + base_addr = core->resource->register_base_addr; *value = readl_relaxed(base_addr + reg); /* @@ -147,7 +147,7 @@ int __read_register_with_poll_timeout(struct msm_vidc_core *core, u32 reg, u32 val = 0; u8 *addr; - if (!core) { + if (!core || !core->resource) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -157,7 +157,7 @@ int __read_register_with_poll_timeout(struct msm_vidc_core *core, u32 reg, return -EINVAL; } - addr = (u8 *)core->register_base_addr + reg; + addr = (u8 *)core->resource->register_base_addr + reg; rc = readl_relaxed_poll_timeout(addr, val, ((val & mask) == exp_val), sleep_us, timeout_us); /* @@ -167,7 +167,7 @@ int __read_register_with_poll_timeout(struct msm_vidc_core *core, u32 reg, rmb(); d_vpr_l( "regread(%pK + %#x) = %#x. rc %d, mask %#x, exp_val %#x, cond %u, sleep %u, timeout %u\n", - core->register_base_addr, reg, val, rc, mask, exp_val, + core->resource->register_base_addr, reg, val, rc, mask, exp_val, ((val & mask) == exp_val), sleep_us, timeout_us); return rc; @@ -175,19 +175,25 @@ int __read_register_with_poll_timeout(struct msm_vidc_core *core, u32 reg, int __set_registers(struct msm_vidc_core *core) { - struct reg_set *reg_set; - int i, rc = 0; + const struct reg_preset_table *reg_prst; + unsigned int prst_count; + int cnt, rc = 0; - if (!core || !core->dt) { + if (!core || !core->platform) { d_vpr_e("core resources null, cannot set registers\n"); return -EINVAL; } - reg_set = &core->dt->reg_set; - for (i = 0; i < reg_set->count; i++) { - rc = __write_register_masked(core, reg_set->reg_tbl[i].reg, - reg_set->reg_tbl[i].value, - reg_set->reg_tbl[i].mask); + reg_prst = core->platform->data.reg_prst_tbl; + prst_count = core->platform->data.reg_prst_tbl_size; + + /* skip if there is no preset reg available */ + if (!reg_prst || !prst_count) + return 0; + + for (cnt = 0; cnt < prst_count; cnt++) { + rc = __write_register_masked(core, reg_prst->reg, + reg_prst->value, reg_prst->mask); if (rc) return rc; } diff --git a/driver/variant/iris3/src/msm_vidc_buffer_iris3.c b/driver/variant/iris3/src/msm_vidc_buffer_iris3.c index 6f844dbd58..5fb631f554 100644 --- a/driver/variant/iris3/src/msm_vidc_buffer_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_buffer_iris3.c @@ -10,7 +10,6 @@ #include "msm_vidc_buffer.h" #include "msm_vidc_inst.h" #include "msm_vidc_core.h" -#include "msm_vidc_platform.h" #include "msm_vidc_driver.h" #include "msm_vidc_debug.h" #include "msm_media_info.h" diff --git a/driver/variant/iris3/src/msm_vidc_iris3.c b/driver/variant/iris3/src/msm_vidc_iris3.c index 0758d6cfe6..eaf023b3c5 100644 --- a/driver/variant/iris3/src/msm_vidc_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_iris3.c @@ -12,7 +12,6 @@ #include "msm_vidc_core.h" #include "msm_vidc_driver.h" #include "msm_vidc_control.h" -#include "msm_vidc_dt.h" #include "msm_vidc_internal.h" #include "msm_vidc_buffer.h" #include "msm_vidc_debug.h" @@ -487,7 +486,7 @@ static int __power_off_iris3(struct msm_vidc_core *core) d_vpr_e("%s: failed to unvote buses\n", __func__); if (!(core->intr_status & WRAPPER_INTR_STATUS_A2HWD_BMSK_IRIS3)) - disable_irq_nosync(core->dt->irq); + disable_irq_nosync(core->resource->irq); core->intr_status = 0; core->power_enabled = false; @@ -551,7 +550,7 @@ fail_regulator: static int __power_on_iris3(struct msm_vidc_core *core) { const struct msm_vidc_resources_ops *res_ops = core->res_ops; - struct allowed_clock_rates_table *clk_tbl; + struct frequency_table *freq_tbl; u32 freq = 0; int rc = 0; @@ -579,9 +578,9 @@ static int __power_on_iris3(struct msm_vidc_core *core) /* video controller and hardware powered on successfully */ core->power_enabled = true; - clk_tbl = core->dt->allowed_clks_tbl; + freq_tbl = core->resource->freq_set.freq_tbl; freq = core->power.clk_freq ? core->power.clk_freq : - clk_tbl[0].clock_rate; + freq_tbl[0].freq; rc = res_ops->set_clks(core, freq); if (rc) { @@ -596,7 +595,7 @@ static int __power_on_iris3(struct msm_vidc_core *core) __interrupt_init_iris3(core); core->intr_status = 0; - enable_irq(core->dt->irq); + enable_irq(core->resource->irq); return rc; diff --git a/driver/variant/iris3/src/msm_vidc_power_iris3.c b/driver/variant/iris3/src/msm_vidc_power_iris3.c index e9f34df721..5e42551ecb 100644 --- a/driver/variant/iris3/src/msm_vidc_power_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_power_iris3.c @@ -9,7 +9,6 @@ #include "msm_vidc_core.h" #include "msm_vidc_driver.h" #include "msm_vidc_debug.h" -#include "msm_vidc_dt.h" u64 msm_vidc_calc_freq_iris3(struct msm_vidc_inst *inst, u32 data_size) { @@ -27,9 +26,10 @@ u64 msm_vidc_calc_freq_iris3(struct msm_vidc_inst *inst, u32 data_size) d_vpr_e("%s: invalid params\n", __func__); return freq; } - core = inst->core; - if (!core->dt || !core->dt->allowed_clks_tbl) { + + if (!core->resource || !core->resource->freq_set.freq_tbl || + !core->resource->freq_set.count) { d_vpr_e("%s: invalid params\n", __func__); return freq; } @@ -151,8 +151,8 @@ u64 msm_vidc_calc_freq_iris3(struct msm_vidc_inst *inst, u32 data_size) u32 bitrate_2stage[2] = {130, 120}; u32 bitrate_1stage = 100; u32 width, height; - u32 bitrate_entry, freq_entry, frequency_table_value; - struct allowed_clock_rates_table *allowed_clks_tbl; + u32 bitrate_entry, freq_entry, freq_tbl_value; + struct frequency_table *freq_tbl; struct v4l2_format *out_f = &inst->fmts[OUTPUT_PORT]; width = out_f->fmt.pix_mp.width; @@ -165,11 +165,11 @@ u64 msm_vidc_calc_freq_iris3(struct msm_vidc_inst *inst, u32 data_size) freq_entry = bitrate_entry; - allowed_clks_tbl = core->dt->allowed_clks_tbl; - frequency_table_value = allowed_clks_tbl[freq_entry].clock_rate / 1000000; + freq_tbl = core->resource->freq_set.freq_tbl; + freq_tbl_value = freq_tbl[freq_entry].freq / 1000000; input_bitrate_mbps = fps * data_size * 8 / (1024 * 1024); - vsp_hw_min_frequency = frequency_table_value * 1000 * input_bitrate_mbps; + vsp_hw_min_frequency = freq_tbl_value * 1000 * input_bitrate_mbps; if (inst->capabilities->cap[STAGE].value == MSM_VIDC_STAGE_2) { vsp_hw_min_frequency += @@ -233,9 +233,9 @@ u64 msm_vidc_calc_freq_iris3(struct msm_vidc_inst *inst, u32 data_size) * for non-AV1 codecs limit the frequency to NOM only * index 0 is TURBO, index 1 is NOM clock rate */ - if (core->dt->allowed_clks_tbl_size >= 2 && - freq > core->dt->allowed_clks_tbl[1].clock_rate) - freq = core->dt->allowed_clks_tbl[1].clock_rate; + if (core->resource->freq_set.count >= 2 && + freq > core->resource->freq_set.freq_tbl[1].freq) + freq = core->resource->freq_set.freq_tbl[1].freq; } i_vpr_p(inst, "%s: filled len %d, required freq %llu, fps %u, mbpf %u\n", diff --git a/driver/vidc/inc/msm_vidc_core.h b/driver/vidc/inc/msm_vidc_core.h index 884ae61efa..0623bdfbe9 100644 --- a/driver/vidc/inc/msm_vidc_core.h +++ b/driver/vidc/inc/msm_vidc_core.h @@ -74,9 +74,8 @@ struct msm_vidc_core { char fw_version[MAX_NAME_LENGTH]; enum msm_vidc_core_state state; struct mutex lock; - struct msm_vidc_dt *dt; + struct msm_vidc_resource *resource; struct msm_vidc_platform *platform; - u8 __iomem *register_base_addr; u32 intr_status; u32 spur_count; u32 reg_count; diff --git a/driver/vidc/inc/msm_vidc_dt.h b/driver/vidc/inc/msm_vidc_dt.h index dd68affc5b..8045727ae8 100644 --- a/driver/vidc/inc/msm_vidc_dt.h +++ b/driver/vidc/inc/msm_vidc_dt.h @@ -8,228 +8,5 @@ #include #include -#ifdef CONFIG_MSM_MMRM -#include -#endif -#include "msm_vidc_internal.h" - -/* - * These are helper macros to iterate over various lists within - * msm_vidc_core->dt. The intention is to cut down on a lot of boiler-plate - * code - */ - -/* Read as "for each 'thing' in a set of 'thingies'" */ -#define venus_hfi_for_each_thing(__device, __thing, __thingy) \ - venus_hfi_for_each_thing_continue(__device, __thing, __thingy, 0) - -#define venus_hfi_for_each_thing_reverse(__device, __thing, __thingy) \ - venus_hfi_for_each_thing_reverse_continue(__device, __thing, __thingy, \ - (__device)->dt->__thingy##_set.count - 1) - -/* TODO: the __from parameter technically not required since we can figure it - * out with some pointer magic (i.e. __thing - __thing##_tbl[0]). If this macro - * sees extensive use, probably worth cleaning it up but for now omitting it - * since it introduces unnecessary complexity. - */ -#define venus_hfi_for_each_thing_continue(__device, __thing, __thingy, __from) \ - for (__thing = &(__device)->dt->\ - __thingy##_set.__thingy##_tbl[__from]; \ - __thing < &(__device)->dt->__thingy##_set.__thingy##_tbl[0] + \ - ((__device)->dt->__thingy##_set.count - __from); \ - ++__thing) - -#define venus_hfi_for_each_thing_reverse_continue(__device, __thing, __thingy, \ - __from) \ - for (__thing = &(__device)->dt->\ - __thingy##_set.__thingy##_tbl[__from]; \ - __thing >= &(__device)->dt->__thingy##_set.__thingy##_tbl[0]; \ - --__thing) - -/* Regular set helpers */ -#define venus_hfi_for_each_regulator(__device, __rinfo) \ - venus_hfi_for_each_thing(__device, __rinfo, regulator) - -#define venus_hfi_for_each_regulator_reverse(__device, __rinfo) \ - venus_hfi_for_each_thing_reverse(__device, __rinfo, regulator) - -#define venus_hfi_for_each_regulator_reverse_continue(__device, __rinfo, \ - __from) \ - venus_hfi_for_each_thing_reverse_continue(__device, __rinfo, \ - regulator, __from) - -/* Clock set helpers */ -#define venus_hfi_for_each_clock(__device, __cinfo) \ - venus_hfi_for_each_thing(__device, __cinfo, clock) - -#define venus_hfi_for_each_clock_reverse(__device, __cinfo) \ - venus_hfi_for_each_thing_reverse(__device, __cinfo, clock) - -/* Bus set helpers */ -#define venus_hfi_for_each_bus(__device, __binfo) \ - venus_hfi_for_each_thing(__device, __binfo, bus) -#define venus_hfi_for_each_bus_reverse(__device, __binfo) \ - venus_hfi_for_each_thing_reverse(__device, __binfo, bus) - -/* Subcache set helpers */ -#define venus_hfi_for_each_subcache(__device, __sinfo) \ - venus_hfi_for_each_thing(__device, __sinfo, subcache) -#define venus_hfi_for_each_subcache_reverse(__device, __sinfo) \ - venus_hfi_for_each_thing_reverse(__device, __sinfo, subcache) - -struct reg_value_pair { - u32 reg; - u32 value; - u32 mask; -}; - -struct reg_set { - struct reg_value_pair *reg_tbl; - u32 count; -}; - -struct addr_range { - u32 start; - u32 size; -}; - -struct addr_set { - struct addr_range *addr_tbl; - u32 count; -}; - -struct context_bank_info { - struct list_head list; - const char *name; - bool is_secure; - struct addr_range addr_range; - struct device *dev; - struct iommu_domain *domain; -}; - -struct buffer_usage_table { - u32 buffer_type; - u32 tz_usage; -}; - -struct buffer_usage_set { - struct buffer_usage_table *buffer_usage_tbl; - u32 count; -}; - -struct regulator_info { - struct regulator *regulator; - bool has_hw_power_collapse; - char *name; -}; - -struct regulator_set { - struct regulator_info *regulator_tbl; - u32 count; -}; - -struct clock_info { - const char *name; - u32 clk_id; - struct clk *clk; - u32 count; - bool has_scaling; - bool has_mem_retention; - u64 prev; -#ifdef CONFIG_MSM_MMRM - struct mmrm_client *mmrm_client; -#endif -}; - -struct clock_set { - struct clock_info *clock_tbl; - u32 count; -}; - -struct bus_info { - const char *name; - u32 range[2]; - struct device *dev; - struct icc_path *path; -}; - -struct bus_set { - struct bus_info *bus_tbl; - u32 count; -}; - -struct reset_info { - struct reset_control *rst; - const char *name; -}; - -struct reset_set { - struct reset_info *reset_tbl; - u32 count; -}; - -struct allowed_clock_rates_table { - u32 clock_rate; -}; - -struct clock_profile_entry { - u32 codec_mask; - u32 vpp_cycles; - u32 vsp_cycles; - u32 low_power_cycles; -}; - -struct clock_freq_table { - struct clock_profile_entry *clk_prof_entries; - u32 count; -}; - -struct subcache_info { - const char *name; - bool isactive; - bool isset; - struct llcc_slice_desc *subcache; -}; - -struct subcache_set { - struct subcache_info *subcache_tbl; - u32 count; -}; - -struct msm_vidc_dt { - void *core; - phys_addr_t register_base; - u32 register_size; - u32 irq; - struct allowed_clock_rates_table *allowed_clks_tbl; - u32 allowed_clks_tbl_size; - struct clock_freq_table clock_freq_tbl; - bool sys_cache_present; - bool sys_cache_res_set; - struct subcache_set subcache_set; - struct reg_set reg_set; - struct addr_set qdss_addr_set; - struct buffer_usage_set buffer_usage_set; - struct regulator_set regulator_set; - struct clock_set clock_set; - struct bus_set bus_set; - struct reset_set reset_set; - struct list_head context_banks; - struct mutex cb_lock; - const char *fw_name; - int fw_cookie; -}; - -int msm_vidc_init_dt(struct platform_device *pdev); -int msm_vidc_read_context_bank_resources_from_dt(struct platform_device *pdev); -void msm_vidc_deinit_dt(struct platform_device *pdev); - -/* A comparator to compare loads (needed later on) */ -static inline int cmp(const void *a, const void *b) -{ - /* want to sort in reverse so flip the comparison */ - return ((struct allowed_clock_rates_table *)b)->clock_rate - - ((struct allowed_clock_rates_table *)a)->clock_rate; -} #endif // _MSM_VIDC_DT_H_ diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index f8fb7bc9f9..3144b5b14e 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -244,6 +244,7 @@ enum msm_vidc_buffer_region { MSM_VIDC_SECURE_PIXEL, MSM_VIDC_SECURE_NONPIXEL, MSM_VIDC_SECURE_BITSTREAM, + MSM_VIDC_REGION_MAX, }; enum msm_vidc_port_type { @@ -374,7 +375,6 @@ enum msm_vidc_core_capability_type { CLK_FREQ_THRESHOLD, NON_FATAL_FAULTS, ENC_AUTO_FRAMERATE, - MMRM, DEVICE_CAPS, SUPPORTS_REQUESTS, CORE_CAP_MAX, diff --git a/driver/vidc/inc/msm_vidc_memory.h b/driver/vidc/inc/msm_vidc_memory.h index 2ee8517aed..c01dae35f1 100644 --- a/driver/vidc/inc/msm_vidc_memory.h +++ b/driver/vidc/inc/msm_vidc_memory.h @@ -7,7 +7,6 @@ #define _MSM_VIDC_MEMORY_H_ #include "msm_vidc_internal.h" -#include "msm_vidc_dt.h" struct msm_vidc_core; struct msm_vidc_inst; diff --git a/driver/vidc/inc/resources.h b/driver/vidc/inc/resources.h index d32d457182..9c2f926a2c 100644 --- a/driver/vidc/inc/resources.h +++ b/driver/vidc/inc/resources.h @@ -6,11 +6,199 @@ #ifndef _MSM_VIDC_RESOURCES_H_ #define _MSM_VIDC_RESOURCES_H_ +struct icc_path; +struct regulator; +struct clk; +struct reset_control; +struct llcc_slice_desc; +struct iommu_domain; +struct device; struct msm_vidc_core; +/* + * These are helper macros to iterate over various lists within + * msm_vidc_core->resource. The intention is to cut down on a lot of boiler-plate + * code + */ + +/* Read as "for each 'thing' in a set of 'thingies'" */ +#define venus_hfi_for_each_thing(__device, __thing, __thingy) \ + venus_hfi_for_each_thing_continue(__device, __thing, __thingy, 0) + +#define venus_hfi_for_each_thing_reverse(__device, __thing, __thingy) \ + venus_hfi_for_each_thing_reverse_continue(__device, __thing, __thingy, \ + (__device)->resource->__thingy##_set.count - 1) + +/* TODO: the __from parameter technically not required since we can figure it + * out with some pointer magic (i.e. __thing - __thing##_tbl[0]). If this macro + * sees extensive use, probably worth cleaning it up but for now omitting it + * since it introduces unnecessary complexity. + */ +#define venus_hfi_for_each_thing_continue(__device, __thing, __thingy, __from) \ + for (__thing = &(__device)->resource->\ + __thingy##_set.__thingy##_tbl[__from]; \ + __thing < &(__device)->resource->__thingy##_set.__thingy##_tbl[0] + \ + ((__device)->resource->__thingy##_set.count - __from); \ + ++__thing) + +#define venus_hfi_for_each_thing_reverse_continue(__device, __thing, __thingy, \ + __from) \ + for (__thing = &(__device)->resource->\ + __thingy##_set.__thingy##_tbl[__from]; \ + __thing >= &(__device)->resource->__thingy##_set.__thingy##_tbl[0]; \ + --__thing) + +/* Bus set helpers */ +#define venus_hfi_for_each_bus(__device, __binfo) \ + venus_hfi_for_each_thing(__device, __binfo, bus) +#define venus_hfi_for_each_bus_reverse(__device, __binfo) \ + venus_hfi_for_each_thing_reverse(__device, __binfo, bus) + +/* Regular set helpers */ +#define venus_hfi_for_each_regulator(__device, __rinfo) \ + venus_hfi_for_each_thing(__device, __rinfo, regulator) +#define venus_hfi_for_each_regulator_reverse(__device, __rinfo) \ + venus_hfi_for_each_thing_reverse(__device, __rinfo, regulator) +#define venus_hfi_for_each_regulator_reverse_continue(__device, __rinfo, \ + __from) \ + venus_hfi_for_each_thing_reverse_continue(__device, __rinfo, \ + regulator, __from) + +/* Clock set helpers */ +#define venus_hfi_for_each_clock(__device, __cinfo) \ + venus_hfi_for_each_thing(__device, __cinfo, clock) +#define venus_hfi_for_each_clock_reverse(__device, __cinfo) \ + venus_hfi_for_each_thing_reverse(__device, __cinfo, clock) + +/* Reset clock set helpers */ +#define venus_hfi_for_each_reset_clock(__device, __rcinfo) \ + venus_hfi_for_each_thing(__device, __rcinfo, reset) +#define venus_hfi_for_each_reset_clock_reverse(__device, __rcinfo) \ + venus_hfi_for_each_thing_reverse(__device, __rcinfo, reset) +#define venus_hfi_for_each_reset_clock_reverse_continue(__device, __rinfo, \ + __from) \ + venus_hfi_for_each_thing_reverse_continue(__device, __rinfo, \ + reset, __from) + +/* Subcache set helpers */ +#define venus_hfi_for_each_subcache(__device, __sinfo) \ + venus_hfi_for_each_thing(__device, __sinfo, subcache) +#define venus_hfi_for_each_subcache_reverse(__device, __sinfo) \ + venus_hfi_for_each_thing_reverse(__device, __sinfo, subcache) + +/* Contextbank set helpers */ +#define venus_hfi_for_each_context_bank(__device, __sinfo) \ + venus_hfi_for_each_thing(__device, __sinfo, context_bank) +#define venus_hfi_for_each_context_bank_reverse(__device, __sinfo) \ + venus_hfi_for_each_thing_reverse(__device, __sinfo, context_bank) + +struct bus_info { + struct icc_path *icc; + const char *name; + u32 min_kbps; + u32 max_kbps; +}; + +struct bus_set { + struct bus_info *bus_tbl; + u32 count; +}; + +struct regulator_info { + struct regulator *regulator; + const char *name; + bool hw_power_collapse; +}; + +struct regulator_set { + struct regulator_info *regulator_tbl; + u32 count; +}; + +struct clock_info { + struct clk *clk; + const char *name; + u32 clk_id; + bool has_scaling; + u64 prev; +#ifdef CONFIG_MSM_MMRM + struct mmrm_client *mmrm_client; +#endif +}; + +struct clock_set { + struct clock_info *clock_tbl; + u32 count; +}; + +struct reset_info { + struct reset_control *rst; + const char *name; +}; + +struct reset_set { + struct reset_info *reset_tbl; + u32 count; +}; + +struct subcache_info { + struct llcc_slice_desc *subcache; + const char *name; + u32 llcc_id; + bool isactive; +}; + +struct subcache_set { + struct subcache_info *subcache_tbl; + u32 count; + bool set_to_fw; +}; + +struct addr_range { + u32 start; + u32 size; +}; + +struct context_bank_info { + const char *name; + struct addr_range addr_range; + bool secure; + bool dma_coherant; + struct device *dev; + struct iommu_domain *domain; + u32 region; +}; + +struct context_bank_set { + struct context_bank_info *context_bank_tbl; + u32 count; +}; + +struct frequency_table { + unsigned long freq; +}; + +struct freq_set { + struct frequency_table *freq_tbl; + u32 count; +}; + +struct msm_vidc_resource { + void *core; + u8 __iomem *register_base_addr; + u32 irq; + struct bus_set bus_set; + struct regulator_set regulator_set; + struct clock_set clock_set; + struct reset_set reset_set; + struct subcache_set subcache_set; + struct context_bank_set context_bank_set; + struct freq_set freq_set; + int fw_cookie; +}; + struct msm_vidc_resources_ops { - int (*get)(struct msm_vidc_core *core); - void (*put)(struct msm_vidc_core *core); + int (*init)(struct msm_vidc_core *core); int (*reset_bridge)(struct msm_vidc_core *core); diff --git a/driver/vidc/src/firmware.c b/driver/vidc/src/firmware.c index 963eb7a5f3..b4051a76f2 100644 --- a/driver/vidc/src/firmware.c +++ b/driver/vidc/src/firmware.c @@ -12,9 +12,9 @@ #include "msm_vidc_core.h" #include "msm_vidc_debug.h" -#include "msm_vidc_dt.h" #include "msm_vidc_events.h" #include "firmware.h" +#include "msm_vidc_platform.h" #define MAX_FIRMWARE_NAME_SIZE 128 @@ -45,15 +45,15 @@ static int protect_cp_mem(struct msm_vidc_core *core) memprot.cp_nonpixel_start = 0x0; memprot.cp_nonpixel_size = 0x0; - list_for_each_entry(cb, &core->dt->context_banks, list) { - if (!strcmp(cb->name, "venus_ns")) { + venus_hfi_for_each_context_bank(core, cb) { + if (cb->region == MSM_VIDC_NON_SECURE) { memprot.cp_size = cb->addr_range.start; d_vpr_h("%s: memprot.cp_size: %#x\n", __func__, memprot.cp_size); } - if (!strcmp(cb->name, "venus_sec_non_pixel")) { + if (cb->region == MSM_VIDC_SECURE_NONPIXEL) { memprot.cp_nonpixel_start = cb->addr_range.start; memprot.cp_nonpixel_size = cb->addr_range.size; @@ -65,7 +65,6 @@ static int protect_cp_mem(struct msm_vidc_core *core) rc = qcom_scm_mem_protect_video_var(memprot.cp_start, memprot.cp_size, memprot.cp_nonpixel_start, memprot.cp_nonpixel_size); - if (rc) d_vpr_e("Failed to protect memory(%d)\n", rc); @@ -81,6 +80,7 @@ static int __load_fw_to_memory(struct platform_device *pdev, { int rc = 0; const struct firmware *firmware = NULL; + struct msm_vidc_core *core; char firmware_name[MAX_FIRMWARE_NAME_SIZE] = { 0 }; struct device_node *node = NULL; struct resource res = { 0 }; @@ -98,14 +98,16 @@ static int __load_fw_to_memory(struct platform_device *pdev, d_vpr_e("%s: Invalid fw name\n", __func__); return -EINVAL; } + + core = dev_get_drvdata(&pdev->dev); + if (!core) { + d_vpr_e("%s: core not found in device %s", + __func__, dev_name(&pdev->dev)); + return -EINVAL; + } scnprintf(firmware_name, ARRAY_SIZE(firmware_name), "%s.mbn", fw_name); - rc = of_property_read_u32(pdev->dev.of_node, "pas-id", &pas_id); - if (rc) { - d_vpr_e("%s: failed to read \"pas-id\". error %d\n", - __func__, rc); - goto exit; - } + pas_id = core->platform->data.pas_id; node = of_parse_phandle(pdev->dev.of_node, "memory-region", 0); if (!node) { @@ -182,13 +184,13 @@ int fw_load(struct msm_vidc_core *core) { int rc; - if (!core->dt->fw_cookie) { - core->dt->fw_cookie = __load_fw_to_memory(core->pdev, - core->dt->fw_name); - if (core->dt->fw_cookie <= 0) { + if (!core->resource->fw_cookie) { + core->resource->fw_cookie = __load_fw_to_memory(core->pdev, + core->platform->data.fwname); + if (core->resource->fw_cookie <= 0) { d_vpr_e("%s: firmware download failed %d\n", - __func__, core->dt->fw_cookie); - core->dt->fw_cookie = 0; + __func__, core->resource->fw_cookie); + core->resource->fw_cookie = 0; return -ENOMEM; } } @@ -202,9 +204,9 @@ int fw_load(struct msm_vidc_core *core) return rc; fail_protect_mem: - if (core->dt->fw_cookie) - qcom_scm_pas_shutdown(core->dt->fw_cookie); - core->dt->fw_cookie = 0; + if (core->resource->fw_cookie) + qcom_scm_pas_shutdown(core->resource->fw_cookie); + core->resource->fw_cookie = 0; return rc; } @@ -212,14 +214,14 @@ int fw_unload(struct msm_vidc_core *core) { int ret; - if (!core->dt->fw_cookie) + if (!core->resource->fw_cookie) return -EINVAL; - ret = qcom_scm_pas_shutdown(core->dt->fw_cookie); + ret = qcom_scm_pas_shutdown(core->resource->fw_cookie); if (ret) d_vpr_e("Firmware unload failed rc=%d\n", ret); - core->dt->fw_cookie = 0; + core->resource->fw_cookie = 0; return ret; } diff --git a/driver/vidc/src/msm_vidc_debug.c b/driver/vidc/src/msm_vidc_debug.c index 81e6ee03ee..13ea7c374d 100644 --- a/driver/vidc/src/msm_vidc_debug.c +++ b/driver/vidc/src/msm_vidc_debug.c @@ -5,7 +5,6 @@ #define CREATE_TRACE_POINTS #include "msm_vidc_debug.h" #include "msm_vidc_driver.h" -#include "msm_vidc_dt.h" #include "msm_vidc.h" #include "msm_vidc_core.h" #include "msm_vidc_inst.h" @@ -209,7 +208,7 @@ static ssize_t core_info_read(struct file* file, char __user* buf, ssize_t len = 0; int rc = 0; - if (!core || !core->dt) { + if (!core || !core->resource) { d_vpr_e("%s: invalid params %pK\n", __func__, core); return 0; } @@ -226,10 +225,8 @@ static ssize_t core_info_read(struct file* file, char __user* buf, cur += write_str(cur, end - cur, "FW version : %s\n", core->fw_version); cur += write_str(cur, end - cur, - "register_base: 0x%x\n", core->dt->register_base); - cur += write_str(cur, end - cur, - "register_size: %u\n", core->dt->register_size); - cur += write_str(cur, end - cur, "irq: %u\n", core->dt->irq); + "register_base: 0x%x\n", core->resource->register_base_addr); + cur += write_str(cur, end - cur, "irq: %u\n", core->resource->irq); len = simple_read_from_buffer(buf, count, ppos, dbuf, cur - dbuf); diff --git a/driver/vidc/src/msm_vidc_dt.c b/driver/vidc/src/msm_vidc_dt.c index 114165890b..0266347170 100644 --- a/driver/vidc/src/msm_vidc_dt.c +++ b/driver/vidc/src/msm_vidc_dt.c @@ -7,976 +7,3 @@ #include #include #include - -#include "msm_vidc_debug.h" -#include "msm_vidc_dt.h" -#include "msm_vidc_internal.h" -#include "msm_vidc_core.h" -#include "msm_vidc_driver.h" - -static size_t get_u32_array_num_elements(struct device_node *np, - char *name) -{ - int len; - size_t num_elements = 0; - - if (!of_get_property(np, name, &len)) { - d_vpr_e("Failed to read %s from device tree\n", name); - goto fail_read; - } - - num_elements = len / sizeof(u32); - if (num_elements <= 0) { - d_vpr_e("%s not specified in device tree\n", name); - goto fail_read; - } - return num_elements; - -fail_read: - return 0; -} - -/** - * msm_vidc_load_u32_table() - load dtsi table entries - * @pdev: A pointer to the platform device. - * @of_node: A pointer to the device node. - * @table_name: A pointer to the dtsi table entry name. - * @struct_size: The size of the structure which is nothing but - * a single entry in the dtsi table. - * @table: A pointer to the table pointer which needs to be - * filled by the dtsi table entries. - * @num_elements: Number of elements pointer which needs to be filled - * with the number of elements in the table. - * - * This is a generic implementation to load single or multiple array - * table from dtsi. The array elements should be of size equal to u32. - * - * Return: Return '0' for success else appropriate error value. - */ -static int msm_vidc_load_u32_table(struct platform_device *pdev, - struct device_node *of_node, char *table_name, int struct_size, - u32 **table, u32 *num_elements) -{ - int rc = 0, num_elemts = 0; - u32 *ptbl = NULL; - - if (!of_find_property(of_node, table_name, NULL)) { - d_vpr_h("%s not found\n", table_name); - return 0; - } - - num_elemts = get_u32_array_num_elements(of_node, table_name); - if (!num_elemts) { - d_vpr_e("no elements in %s\n", table_name); - return 0; - } - num_elemts /= struct_size / sizeof(u32); - - ptbl = devm_kzalloc(&pdev->dev, num_elemts * struct_size, GFP_KERNEL); - if (!ptbl) { - d_vpr_e("Failed to alloc table %s\n", table_name); - return -ENOMEM; - } - - if (of_property_read_u32_array(of_node, table_name, ptbl, - num_elemts * struct_size / sizeof(u32))) { - d_vpr_e("Failed to read %s\n", table_name); - return -EINVAL; - } - - *table = ptbl; - if (num_elements) - *num_elements = num_elemts; - - return rc; -} - -static void msm_vidc_free_allowed_clocks_table(struct msm_vidc_dt *dt) -{ - dt->allowed_clks_tbl = NULL; -} - -static void msm_vidc_free_reg_table(struct msm_vidc_dt *dt) -{ - dt->reg_set.reg_tbl = NULL; -} - -static void msm_vidc_free_qdss_addr_table(struct msm_vidc_dt *dt) -{ - dt->qdss_addr_set.addr_tbl = NULL; -} - -static void msm_vidc_free_bus_table(struct msm_vidc_dt *dt) -{ - dt->bus_set.bus_tbl = NULL; - dt->bus_set.count = 0; -} - -static void msm_vidc_free_buffer_usage_table(struct msm_vidc_dt *dt) -{ - dt->buffer_usage_set.buffer_usage_tbl = NULL; -} - -static void msm_vidc_free_regulator_table(struct msm_vidc_dt *dt) -{ - int c = 0; - - for (c = 0; c < dt->regulator_set.count; ++c) { - struct regulator_info *rinfo = - &dt->regulator_set.regulator_tbl[c]; - - rinfo->name = NULL; - } - - dt->regulator_set.regulator_tbl = NULL; - dt->regulator_set.count = 0; -} - -static void msm_vidc_free_clock_table(struct msm_vidc_dt *dt) -{ - dt->clock_set.clock_tbl = NULL; - dt->clock_set.count = 0; -} - -static int msm_vidc_load_fw_name(struct msm_vidc_core *core) -{ - struct platform_device *pdev = core->pdev; - - return of_property_read_string_index(pdev->dev.of_node, - "vidc,firmware-name", 0, &core->dt->fw_name); -} - -static int msm_vidc_load_reg_table(struct msm_vidc_core *core) -{ - struct reg_set *reg_set; - struct platform_device *pdev = core->pdev; - struct msm_vidc_dt *dt = core->dt; - int i; - int rc = 0; - - if (!of_find_property(pdev->dev.of_node, "qcom,reg-presets", NULL)) { - /* - * qcom,reg-presets is an optional property. It likely won't be - * present if we don't have any register settings to program - */ - d_vpr_h("reg-presets not found\n"); - return 0; - } - - reg_set = &dt->reg_set; - reg_set->count = get_u32_array_num_elements(pdev->dev.of_node, - "qcom,reg-presets"); - reg_set->count /= sizeof(*reg_set->reg_tbl) / sizeof(u32); - - if (!reg_set->count) { - d_vpr_h("no elements in reg set\n"); - return rc; - } - - reg_set->reg_tbl = devm_kzalloc(&pdev->dev, reg_set->count * - sizeof(*(reg_set->reg_tbl)), GFP_KERNEL); - if (!reg_set->reg_tbl) { - d_vpr_e("%s: Failed to alloc register table\n", __func__); - return -ENOMEM; - } - - if (of_property_read_u32_array(pdev->dev.of_node, "qcom,reg-presets", - (u32 *)reg_set->reg_tbl, reg_set->count * 3)) { - d_vpr_e("Failed to read register table\n"); - msm_vidc_free_reg_table(core->dt); - return -EINVAL; - } - for (i = 0; i < reg_set->count; i++) { - d_vpr_h("reg = %#x, value = %#x, mask = %#x\n", - reg_set->reg_tbl[i].reg, reg_set->reg_tbl[i].value, - reg_set->reg_tbl[i].mask); - } - return rc; -} -static int msm_vidc_load_qdss_table(struct msm_vidc_core *core) -{ - struct addr_set *qdss_addr_set; - struct platform_device *pdev = core->pdev; - struct msm_vidc_dt *dt = core->dt; - int i; - int rc = 0; - - if (!of_find_property(pdev->dev.of_node, "qcom,qdss-presets", NULL)) { - /* - * qcom,qdss-presets is an optional property. It likely won't be - * present if we don't have any register settings to program - */ - d_vpr_h("qdss-presets not found\n"); - return rc; - } - - qdss_addr_set = &dt->qdss_addr_set; - qdss_addr_set->count = get_u32_array_num_elements(pdev->dev.of_node, - "qcom,qdss-presets"); - qdss_addr_set->count /= sizeof(*qdss_addr_set->addr_tbl) / sizeof(u32); - - if (!qdss_addr_set->count) { - d_vpr_h("no elements in qdss reg set\n"); - return rc; - } - - qdss_addr_set->addr_tbl = devm_kzalloc(&pdev->dev, - qdss_addr_set->count * sizeof(*qdss_addr_set->addr_tbl), - GFP_KERNEL); - if (!qdss_addr_set->addr_tbl) { - d_vpr_e("%s: Failed to alloc register table\n", __func__); - rc = -ENOMEM; - goto err_qdss_addr_tbl; - } - - rc = of_property_read_u32_array(pdev->dev.of_node, "qcom,qdss-presets", - (u32 *)qdss_addr_set->addr_tbl, qdss_addr_set->count * 2); - if (rc) { - d_vpr_e("Failed to read qdss address table\n"); - msm_vidc_free_qdss_addr_table(core->dt); - rc = -EINVAL; - goto err_qdss_addr_tbl; - } - - for (i = 0; i < qdss_addr_set->count; i++) { - d_vpr_h("qdss addr = %x, value = %x\n", - qdss_addr_set->addr_tbl[i].start, - qdss_addr_set->addr_tbl[i].size); - } -err_qdss_addr_tbl: - return rc; -} - -static int msm_vidc_load_subcache_info(struct msm_vidc_core *core) -{ - int rc = 0, num_subcaches = 0, c; - struct platform_device *pdev = core->pdev; - struct msm_vidc_dt *dt = core->dt; - struct subcache_set *subcaches = &dt->subcache_set; - - num_subcaches = of_property_count_strings(pdev->dev.of_node, - "cache-slice-names"); - if (num_subcaches <= 0) { - d_vpr_h("No subcaches found\n"); - goto err_load_subcache_table_fail; - } - - subcaches->subcache_tbl = devm_kzalloc(&pdev->dev, - sizeof(*subcaches->subcache_tbl) * num_subcaches, GFP_KERNEL); - if (!subcaches->subcache_tbl) { - d_vpr_e("Failed to allocate memory for subcache tbl\n"); - rc = -ENOMEM; - goto err_load_subcache_table_fail; - } - - subcaches->count = num_subcaches; - d_vpr_h("Found %d subcaches\n", num_subcaches); - - for (c = 0; c < num_subcaches; ++c) { - struct subcache_info *vsc = &dt->subcache_set.subcache_tbl[c]; - - of_property_read_string_index(pdev->dev.of_node, - "cache-slice-names", c, &vsc->name); - } - - dt->sys_cache_present = true; - - return 0; - -err_load_subcache_table_fail: - dt->sys_cache_present = false; - subcaches->count = 0; - subcaches->subcache_tbl = NULL; - - return rc; -} - -static int msm_vidc_load_allowed_clocks_table( - struct msm_vidc_core *core) -{ - int rc = 0; - struct platform_device *pdev = core->pdev; - struct msm_vidc_dt *dt = core->dt; - int i; - - if (!of_find_property(pdev->dev.of_node, - "qcom,allowed-clock-rates", NULL)) { - d_vpr_h("allowed-clock-rates not found\n"); - return 0; - } - - rc = msm_vidc_load_u32_table(pdev, pdev->dev.of_node, - "qcom,allowed-clock-rates", - sizeof(*dt->allowed_clks_tbl), - (u32 **)&dt->allowed_clks_tbl, - &dt->allowed_clks_tbl_size); - if (rc) { - d_vpr_e("%s: failed to read allowed clocks table\n", __func__); - return rc; - } - - sort(dt->allowed_clks_tbl, dt->allowed_clks_tbl_size, - sizeof(*dt->allowed_clks_tbl), cmp, NULL); - - d_vpr_h("Found allowed clock rates\n"); - for (i = 0; i < dt->allowed_clks_tbl_size; i++) - d_vpr_h(" %d\n", dt->allowed_clks_tbl[i].clock_rate); - - return 0; -} - -static int msm_vidc_load_bus_table(struct msm_vidc_core *core) -{ - int rc = 0; - struct platform_device *pdev = core->pdev; - struct msm_vidc_dt *dt = core->dt; - struct bus_set *buses = &dt->bus_set; - int c = 0, num_buses = 0; - u32 *bus_ranges = NULL; - - num_buses = of_property_count_strings(pdev->dev.of_node, - "interconnect-names"); - if (num_buses <= 0) { - d_vpr_e("No buses found\n"); - return -EINVAL; - } - - buses->count = num_buses; - d_vpr_h("Found %d bus interconnects\n", num_buses); - - rc = msm_vidc_vmem_alloc(2 * num_buses * sizeof(*bus_ranges), - (void **)&bus_ranges, " for bus ranges"); - if (rc) - return rc; - - rc = of_property_read_u32_array(pdev->dev.of_node, - "qcom,bus-range-kbps", bus_ranges, - num_buses * 2); - if (rc) { - d_vpr_e( - "Failed to read bus ranges: defaulting to <0 INT_MAX>\n"); - for (c = 0; c < num_buses; c++) { - bus_ranges[c * 2] = 0; - bus_ranges[c * 2 + 1] = INT_MAX; - } - } - - buses->bus_tbl = devm_kzalloc(&pdev->dev, num_buses * - sizeof(*buses->bus_tbl), GFP_KERNEL); - if (!buses->bus_tbl) { - d_vpr_e("No memory for bus table\n"); - rc = -ENOMEM; - goto exit; - } - - for (c = 0; c < num_buses; c++) { - struct bus_info *bus = &dt->bus_set.bus_tbl[c]; - - of_property_read_string_index(pdev->dev.of_node, - "interconnect-names", c, &bus->name); - - bus->dev = &pdev->dev; - bus->range[0] = bus_ranges[c * 2]; - bus->range[1] = bus_ranges[c * 2 + 1]; - - d_vpr_h("Found bus %s, range [%d %d]\n", bus->name, - bus->range[0], bus->range[1]); - } - -exit: - msm_vidc_vmem_free((void **) &bus_ranges); - return rc; -} - -/* TODO: move this to platform data */ -static int msm_vidc_load_buffer_usage_table(struct msm_vidc_core *core) -{ - int rc = 0; - struct platform_device *pdev = core->pdev; - struct msm_vidc_dt *dt = core->dt; - struct buffer_usage_set *buffer_usage_set = &dt->buffer_usage_set; - - if (!of_find_property(pdev->dev.of_node, - "qcom,buffer-type-tz-usage-table", NULL)) { - /* - * qcom,buffer-type-tz-usage-table is an optional property. It - * likely won't be present if the core doesn't support content - * protection - */ - d_vpr_h("buffer-type-tz-usage-table not found\n"); - return 0; - } - - buffer_usage_set->count = get_u32_array_num_elements( - pdev->dev.of_node, "qcom,buffer-type-tz-usage-table"); - buffer_usage_set->count /= - sizeof(*buffer_usage_set->buffer_usage_tbl) / sizeof(u32); - if (!buffer_usage_set->count) { - d_vpr_h("no elements in buffer usage set\n"); - return 0; - } - - buffer_usage_set->buffer_usage_tbl = devm_kzalloc(&pdev->dev, - buffer_usage_set->count * - sizeof(*buffer_usage_set->buffer_usage_tbl), - GFP_KERNEL); - if (!buffer_usage_set->buffer_usage_tbl) { - d_vpr_e("%s: Failed to alloc buffer usage table\n", - __func__); - rc = -ENOMEM; - goto err_load_buf_usage; - } - - rc = of_property_read_u32_array(pdev->dev.of_node, - "qcom,buffer-type-tz-usage-table", - (u32 *)buffer_usage_set->buffer_usage_tbl, - buffer_usage_set->count * - sizeof(*buffer_usage_set->buffer_usage_tbl) / sizeof(u32)); - if (rc) { - d_vpr_e("Failed to read buffer usage table\n"); - goto err_load_buf_usage; - } - - return 0; -err_load_buf_usage: - msm_vidc_free_buffer_usage_table(core->dt); - return rc; -} - -static int msm_vidc_load_regulator_table(struct msm_vidc_core *core) -{ - int rc = 0; - struct platform_device *pdev = core->pdev; - struct msm_vidc_dt *dt = core->dt; - struct regulator_set *regulators = &dt->regulator_set; - struct device_node *domains_parent_node = NULL; - struct property *domains_property = NULL; - int reg_count = 0; - - regulators->count = 0; - regulators->regulator_tbl = NULL; - - domains_parent_node = pdev->dev.of_node; - for_each_property_of_node(domains_parent_node, domains_property) { - const char *search_string = "-supply"; - char *supply; - bool matched = false; - - /* check if current property is possibly a regulator */ - supply = strnstr(domains_property->name, search_string, - strlen(domains_property->name) + 1); - matched = supply && (*(supply + strlen(search_string)) == '\0'); - if (!matched) - continue; - - reg_count++; - } - - regulators->regulator_tbl = devm_kzalloc(&pdev->dev, - sizeof(*regulators->regulator_tbl) * - reg_count, GFP_KERNEL); - - if (!regulators->regulator_tbl) { - rc = -ENOMEM; - d_vpr_e("Failed to alloc memory for regulator table\n"); - goto err_reg_tbl_alloc; - } - - for_each_property_of_node(domains_parent_node, domains_property) { - const char *search_string = "-supply"; - char *supply; - bool matched = false; - struct device_node *regulator_node = NULL; - struct regulator_info *rinfo = NULL; - - /* check if current property is possibly a regulator */ - supply = strnstr(domains_property->name, search_string, - strlen(domains_property->name) + 1); - matched = supply && (supply[strlen(search_string)] == '\0'); - if (!matched) - continue; - - /* make sure prop isn't being misused */ - regulator_node = of_parse_phandle(domains_parent_node, - domains_property->name, 0); - if (IS_ERR(regulator_node)) { - d_vpr_e("%s is not a phandle\n", - domains_property->name); - continue; - } - regulators->count++; - - /* populate regulator info */ - rinfo = ®ulators->regulator_tbl[regulators->count - 1]; - rinfo->name = devm_kzalloc(&pdev->dev, - (supply - domains_property->name) + 1, GFP_KERNEL); - if (!rinfo->name) { - rc = -ENOMEM; - d_vpr_e("Failed to alloc memory for regulator name\n"); - goto err_reg_name_alloc; - } - strlcpy(rinfo->name, domains_property->name, - (supply - domains_property->name) + 1); - - rinfo->has_hw_power_collapse = of_property_read_bool( - regulator_node, "qcom,support-hw-trigger"); - - d_vpr_h("Found regulator %s: h/w collapse = %s\n", - rinfo->name, - rinfo->has_hw_power_collapse ? "yes" : "no"); - } - - if (!regulators->count) - d_vpr_h("No regulators found"); - - return 0; - -err_reg_name_alloc: -err_reg_tbl_alloc: - msm_vidc_free_regulator_table(core->dt); - return rc; -} - -static int msm_vidc_load_clock_table(struct msm_vidc_core *core) -{ - int rc = 0, num_clocks = 0, c = 0; - struct platform_device *pdev = core->pdev; - struct msm_vidc_dt *dt = core->dt; - int *clock_ids = NULL; - int *clock_props = NULL; - struct clock_set *clocks = &dt->clock_set; - - num_clocks = of_property_count_strings(pdev->dev.of_node, - "clock-names"); - if (num_clocks <= 0) { - d_vpr_h("No clocks found\n"); - clocks->count = 0; - rc = 0; - goto err_load_clk_table_fail; - } - - clock_ids = devm_kzalloc(&pdev->dev, num_clocks * - sizeof(*clock_ids), GFP_KERNEL); - if (!clock_ids) { - d_vpr_e("No memory to read clock ids\n"); - rc = -ENOMEM; - goto err_load_clk_table_fail; - } - - rc = of_property_read_u32_array(pdev->dev.of_node, - "clock-ids", clock_ids, - num_clocks); - if (rc) { - d_vpr_e("Failed to read clock ids: %d\n", rc); - goto err_load_clk_prop_fail; - } - - clock_props = devm_kzalloc(&pdev->dev, num_clocks * - sizeof(*clock_props), GFP_KERNEL); - if (!clock_props) { - d_vpr_e("No memory to read clock properties\n"); - rc = -ENOMEM; - goto err_load_clk_table_fail; - } - - rc = of_property_read_u32_array(pdev->dev.of_node, - "qcom,clock-configs", clock_props, - num_clocks); - if (rc) { - d_vpr_e("Failed to read clock properties: %d\n", rc); - goto err_load_clk_prop_fail; - } - - clocks->clock_tbl = devm_kzalloc(&pdev->dev, sizeof(*clocks->clock_tbl) - * num_clocks, GFP_KERNEL); - if (!clocks->clock_tbl) { - d_vpr_e("Failed to allocate memory for clock tbl\n"); - rc = -ENOMEM; - goto err_load_clk_prop_fail; - } - - clocks->count = num_clocks; - d_vpr_h("Found %d clocks\n", num_clocks); - - for (c = 0; c < num_clocks; ++c) { - struct clock_info *vc = &dt->clock_set.clock_tbl[c]; - - of_property_read_string_index(pdev->dev.of_node, - "clock-names", c, &vc->name); - - vc->clk_id = clock_ids[c]; - - if (clock_props[c] & CLOCK_PROP_HAS_SCALING) { - vc->has_scaling = true; - } else { - vc->has_scaling = false; - } - - if (clock_props[c] & CLOCK_PROP_HAS_MEM_RETENTION) - vc->has_mem_retention = true; - else - vc->has_mem_retention = false; - - d_vpr_h("Found clock %s: scale-able = %s\n", vc->name, - vc->has_scaling ? "yes" : "no"); - } - - - return 0; - -err_load_clk_prop_fail: -err_load_clk_table_fail: - return rc; -} - -static int msm_vidc_load_reset_table(struct msm_vidc_core *core) -{ - struct platform_device *pdev = core->pdev; - struct msm_vidc_dt *dt = core->dt; - struct reset_set *rst = &dt->reset_set; - int num_clocks = 0, c = 0; - - num_clocks = of_property_count_strings(pdev->dev.of_node, - "reset-names"); - if (num_clocks <= 0) { - d_vpr_h("No reset clocks found\n"); - rst->count = 0; - return 0; - } - - rst->reset_tbl = devm_kcalloc(&pdev->dev, num_clocks, - sizeof(*rst->reset_tbl), GFP_KERNEL); - if (!rst->reset_tbl) - return -ENOMEM; - - rst->count = num_clocks; - d_vpr_h("Found %d reset clocks\n", num_clocks); - - for (c = 0; c < num_clocks; ++c) { - struct reset_info *rc = &dt->reset_set.reset_tbl[c]; - - of_property_read_string_index(pdev->dev.of_node, - "reset-names", c, &rc->name); - } - - return 0; -} - -static int msm_vidc_read_resources_from_dt(struct platform_device *pdev) -{ - int rc = 0; - struct msm_vidc_core *core; - struct msm_vidc_dt *dt; - struct resource *kres; - - if (!pdev) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - core = dev_get_drvdata(&pdev->dev); - if (!core || !core->dt) { - d_vpr_e("%s: core not found in device %s", - __func__, dev_name(&pdev->dev)); - return -EINVAL; - } - dt = core->dt; - - INIT_LIST_HEAD(&dt->context_banks); - - kres = platform_get_resource(pdev, IORESOURCE_MEM, 0); - dt->register_base = kres ? kres->start : -1; - dt->register_size = kres ? (kres->end + 1 - kres->start) : -1; - d_vpr_h("%s: register base %pa, size %#x\n", - __func__, &dt->register_base, dt->register_size); - -#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5,16,0)) - dt->irq = platform_get_irq(pdev, 0); -#else - kres = platform_get_resource(pdev, IORESOURCE_IRQ, 0); - dt->irq = kres ? kres->start : -1; -#endif - if (dt->irq < 0) - d_vpr_e("%s: get irq failed, %d\n", __func__, dt->irq); - - d_vpr_h("%s: irq %d\n", __func__, dt->irq); - - rc = msm_vidc_load_fw_name(core); - if (rc) - d_vpr_e("%s: failed to load fw name, rc %d, using default fw\n", - __func__, rc); - - rc = msm_vidc_load_subcache_info(core); - if (rc) - d_vpr_e("Failed to load subcache info: %d\n", rc); - - rc = msm_vidc_load_qdss_table(core); - if (rc) - d_vpr_e("Failed to load qdss reg table: %d\n", rc); - - rc = msm_vidc_load_reg_table(core); - if (rc) { - d_vpr_e("Failed to load reg table: %d\n", rc); - goto err_load_reg_table; - } - - // TODO: move this table to platform - rc = msm_vidc_load_buffer_usage_table(core); - if (rc) { - d_vpr_e("Failed to load buffer usage table: %d\n", rc); - goto err_load_buffer_usage_table; - } - - rc = msm_vidc_load_regulator_table(core); - if (rc) { - d_vpr_e("Failed to load list of regulators %d\n", rc); - goto err_load_regulator_table; - } - - rc = msm_vidc_load_bus_table(core); - if (rc) { - d_vpr_e("Failed to load bus table: %d\n", rc); - goto err_load_bus_table; - } - - rc = msm_vidc_load_clock_table(core); - if (rc) { - d_vpr_e("Failed to load clock table: %d\n", rc); - goto err_load_clock_table; - } - - // TODO: move this table to platform - rc = msm_vidc_load_allowed_clocks_table(core); - if (rc) { - d_vpr_e("Failed to load allowed clocks table: %d\n", rc); - goto err_load_allowed_clocks_table; - } - - rc = msm_vidc_load_reset_table(core); - if (rc) { - d_vpr_e("Failed to load reset table: %d\n", rc); - goto err_load_reset_table; - } - - return rc; - -err_load_reset_table: - msm_vidc_free_allowed_clocks_table(core->dt); -err_load_allowed_clocks_table: - msm_vidc_free_clock_table(core->dt); -err_load_clock_table: - msm_vidc_free_bus_table(core->dt); -err_load_bus_table: - msm_vidc_free_regulator_table(core->dt); -err_load_regulator_table: - msm_vidc_free_buffer_usage_table(core->dt); -err_load_buffer_usage_table: - msm_vidc_free_reg_table(core->dt); -err_load_reg_table: - return rc; -} - -static int msm_vidc_setup_context_bank(struct msm_vidc_core *core, - struct context_bank_info *cb, struct device *dev) -{ - int rc = 0; - struct bus_type *bus; - - if (!core || !dev || !cb) { - d_vpr_e("%s: Invalid Input params\n", __func__); - return -EINVAL; - } - cb->dev = dev; - - bus = cb->dev->bus; - if (IS_ERR_OR_NULL(bus)) { - d_vpr_e("%s: failed to get bus type\n", __func__); - rc = PTR_ERR(bus) ? PTR_ERR(bus) : -ENODEV; - goto remove_cb; - } - - cb->domain = iommu_get_domain_for_dev(cb->dev); - - /* - * When memory is fragmented, below configuration increases the - * possibility to get a mapping for buffer in the configured CB. - */ - - /* remove kernel version condition once below api is whitelisted in pineapple */ -#if (LINUX_VERSION_CODE < KERNEL_VERSION(5,16,0)) - iommu_dma_enable_best_fit_algo(cb->dev); -#endif - - /* - * configure device segment size and segment boundary to ensure - * iommu mapping returns one mapping (which is required for partial - * cache operations) - */ - if (!dev->dma_parms) - dev->dma_parms = - devm_kzalloc(dev, sizeof(*dev->dma_parms), GFP_KERNEL); - dma_set_max_seg_size(dev, (unsigned int)DMA_BIT_MASK(32)); - dma_set_seg_boundary(dev, (unsigned long)DMA_BIT_MASK(64)); - - d_vpr_h("Attached %s and created mapping\n", dev_name(dev)); - d_vpr_h( - "Context bank: %s, is_secure: %d, address range start: %#x, size: %#x, dev: %pK, domain: %pK", - cb->name, cb->is_secure, cb->addr_range.start, - cb->addr_range.size, cb->dev, cb->domain); -remove_cb: - return rc; -} - -static int msm_vidc_populate_context_bank(struct device *dev, - struct msm_vidc_core *core) -{ - int rc = 0; - struct context_bank_info *cb = NULL; - struct device_node *np = NULL; - - if (!dev || !core || !core->dt) { - d_vpr_e("%s: invalid inputs\n", __func__); - return -EINVAL; - } - - np = dev->of_node; - cb = devm_kzalloc(dev, sizeof(*cb), GFP_KERNEL); - if (!cb) { - d_vpr_e("%s: Failed to allocate cb\n", __func__); - return -ENOMEM; - } - - INIT_LIST_HEAD(&cb->list); - rc = of_property_read_string(np, "label", &cb->name); - if (rc) { - d_vpr_h("Failed to read cb label from device tree\n"); - rc = 0; - } - - d_vpr_h("%s: context bank has name %s\n", __func__, cb->name); - rc = of_property_read_u32_array(np, "virtual-addr-pool", - (u32 *)&cb->addr_range, 2); - if (rc) { - d_vpr_e("Could not read addr pool: context bank: %s %d\n", - cb->name, rc); - goto err_setup_cb; - } - - cb->is_secure = of_property_read_bool(np, "qcom,secure-context-bank"); - d_vpr_h("context bank %s: secure = %d\n", - cb->name, cb->is_secure); - - d_vpr_h("context bank %s address start %x size %x\n", - cb->name, cb->addr_range.start, - cb->addr_range.size); - - rc = msm_vidc_setup_context_bank(core, cb, dev); - if (rc) { - d_vpr_e("Cannot setup context bank %d\n", rc); - goto err_setup_cb; - } - - core_lock(core, __func__); - list_add_tail(&cb->list, &core->dt->context_banks); - core_unlock(core, __func__); - - iommu_set_fault_handler(cb->domain, - msm_vidc_smmu_fault_handler, (void *)core); - - return 0; - -err_setup_cb: - return rc; -} - -int msm_vidc_read_context_bank_resources_from_dt(struct platform_device *pdev) -{ - struct msm_vidc_core *core; - int rc = 0; - - if (!pdev) { - d_vpr_e("Invalid platform device\n"); - return -EINVAL; - } else if (!pdev->dev.parent) { - d_vpr_e("Failed to find a parent for %s\n", - dev_name(&pdev->dev)); - return -ENODEV; - } - - core = dev_get_drvdata(pdev->dev.parent); - if (!core) { - d_vpr_e("Failed to find cookie in parent device %s", - dev_name(pdev->dev.parent)); - return -EINVAL; - } - - rc = msm_vidc_populate_context_bank(&pdev->dev, core); - if (rc) - d_vpr_e("Failed to probe context bank\n"); - else - d_vpr_h("Successfully probed context bank\n"); - - return rc; -} - -void msm_vidc_deinit_dt(struct platform_device *pdev) -{ - struct msm_vidc_core *core; - - if (!pdev) { - d_vpr_e("%s: invalid params\n", __func__); - return; - } - - core = dev_get_drvdata(&pdev->dev); - if (!core) { - d_vpr_e("%s: core not found in device %s", - __func__, dev_name(&pdev->dev)); - return; - } else if (!core->dt) { - d_vpr_e("%s: invalid dt in device %s", - __func__, dev_name(&pdev->dev)); - return; - } - - msm_vidc_free_clock_table(core->dt); - msm_vidc_free_regulator_table(core->dt); - msm_vidc_free_allowed_clocks_table(core->dt); - msm_vidc_free_reg_table(core->dt); - msm_vidc_free_qdss_addr_table(core->dt); - msm_vidc_free_bus_table(core->dt); - msm_vidc_free_buffer_usage_table(core->dt); - msm_vidc_vmem_free((void **)&core->dt); -} - -int msm_vidc_init_dt(struct platform_device *pdev) -{ - int rc = 0; - struct msm_vidc_dt *dt = NULL; - struct msm_vidc_core *core; - - if (!pdev) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - core = dev_get_drvdata(&pdev->dev); - if (!core) { - d_vpr_e("%s: core not found in device %s", - __func__, dev_name(&pdev->dev)); - return -EINVAL; - } - - rc = msm_vidc_vmem_alloc(sizeof(struct msm_vidc_dt), (void **)&dt, __func__); - if (rc) - return rc; - - core->dt = dt; - dt->core = core; - - rc = msm_vidc_read_resources_from_dt(pdev); - if (rc) - return rc; - - return 0; -} diff --git a/driver/vidc/src/msm_vidc_memory.c b/driver/vidc/src/msm_vidc_memory.c index 729b2195c2..06c81cd6ec 100644 --- a/driver/vidc/src/msm_vidc_memory.c +++ b/driver/vidc/src/msm_vidc_memory.c @@ -16,6 +16,7 @@ #include "msm_vidc_driver.h" #include "msm_vidc_core.h" #include "msm_vidc_events.h" +#include "msm_vidc_platform.h" #include "venus_hfi.h" #if (LINUX_VERSION_CODE >= KERNEL_VERSION(5,16,0)) @@ -30,27 +31,15 @@ struct msm_vidc_buf_region_name { struct context_bank_info *msm_vidc_get_context_bank(struct msm_vidc_core *core, enum msm_vidc_buffer_region region) { - const char *name; struct context_bank_info *cb = NULL, *match = NULL; - static const struct msm_vidc_buf_region_name buf_region_name[] = { - {MSM_VIDC_REGION_NONE, "none" }, - {MSM_VIDC_NON_SECURE, "venus_ns" }, - {MSM_VIDC_NON_SECURE_PIXEL, "venus_ns_pixel" }, - {MSM_VIDC_SECURE_PIXEL, "venus_sec_pixel" }, - {MSM_VIDC_SECURE_NONPIXEL, "venus_sec_non_pixel" }, - {MSM_VIDC_SECURE_BITSTREAM, "venus_sec_bitstream" }, - }; - if (!region || region > ARRAY_SIZE(buf_region_name)) - goto exit; + if (!region || region >= MSM_VIDC_REGION_MAX) { + d_vpr_e("Invalid region %#x\n", region); + return NULL; + } - if (buf_region_name[region].region != region) - goto exit; - - name = buf_region_name[region].name; - - list_for_each_entry(cb, &core->dt->context_banks, list) { - if (!strcmp(cb->name, name)) { + venus_hfi_for_each_context_bank(core, cb) { + if (cb->region == region) { match = cb; break; } @@ -59,10 +48,6 @@ struct context_bank_info *msm_vidc_get_context_bank(struct msm_vidc_core *core, d_vpr_e("cb not found for region %#x\n", region); return match; - -exit: - d_vpr_e("Invalid region %#x\n", region); - return NULL; } struct dma_buf *msm_vidc_memory_get_dmabuf(struct msm_vidc_inst *inst, int fd) @@ -245,7 +230,7 @@ int msm_vidc_memory_map(struct msm_vidc_core *core, struct msm_vidc_map *map) * required buffer size */ attach->dma_map_attrs |= DMA_ATTR_SKIP_CPU_SYNC; - if (core->dt->sys_cache_present) + if (is_sys_cache_present(core)) attach->dma_map_attrs |= DMA_ATTR_IOMMU_USE_UPSTREAM_HINT; diff --git a/driver/vidc/src/msm_vidc_power.c b/driver/vidc/src/msm_vidc_power.c index 12841edb44..6a45130c9d 100644 --- a/driver/vidc/src/msm_vidc_power.c +++ b/driver/vidc/src/msm_vidc_power.c @@ -9,7 +9,6 @@ #include "msm_vidc_internal.h" #include "msm_vidc_inst.h" #include "msm_vidc_core.h" -#include "msm_vidc_dt.h" #include "msm_vidc_driver.h" #include "msm_vidc_platform.h" #include "msm_vidc_buffer.h" @@ -92,7 +91,7 @@ void __dump(struct dump dump[], int len) u64 msm_vidc_max_freq(struct msm_vidc_inst *inst) { struct msm_vidc_core* core; - struct allowed_clock_rates_table *allowed_clks_tbl; + struct frequency_table *freq_tbl; u64 freq = 0; if (!inst || !inst->core) { @@ -100,12 +99,14 @@ u64 msm_vidc_max_freq(struct msm_vidc_inst *inst) return freq; } core = inst->core; - if (!core->dt || !core->dt->allowed_clks_tbl) { - i_vpr_e(inst, "%s: invalid params\n", __func__); + + if (!core->resource || !core->resource->freq_set.freq_tbl || + !core->resource->freq_set.count) { + i_vpr_e(inst, "%s: invalid frequency table\n", __func__); return freq; } - allowed_clks_tbl = core->dt->allowed_clks_tbl; - freq = allowed_clks_tbl[0].clock_rate; + freq_tbl = core->resource->freq_set.freq_tbl; + freq = freq_tbl[0].freq; i_vpr_l(inst, "%s: rate = %llu\n", __func__, freq); return freq; @@ -267,8 +268,8 @@ int msm_vidc_scale_buses(struct msm_vidc_inst *inst) return -EINVAL; } core = inst->core; - if (!core->dt) { - i_vpr_e(inst, "%s: invalid dt params\n", __func__); + if (!core->resource) { + i_vpr_e(inst, "%s: invalid resource params\n", __func__); return -EINVAL; } vote_data = &inst->bus_data; @@ -347,7 +348,7 @@ int msm_vidc_scale_buses(struct msm_vidc_inst *inst) } } vote_data->work_mode = inst->capabilities->cap[STAGE].value; - if (core->dt->sys_cache_res_set) + if (core->resource->subcache_set.set_to_fw) vote_data->use_sys_cache = true; vote_data->num_vpp_pipes = core->capabilities[NUM_VPP_PIPE].value; fill_dynamic_stats(inst, vote_data); @@ -382,8 +383,10 @@ int msm_vidc_set_clocks(struct msm_vidc_inst* inst) return -EINVAL; } core = inst->core; - if (!core->dt || !core->dt->allowed_clks_tbl) { - d_vpr_e("%s: invalid dt params\n", __func__); + + if (!core->resource || !core->resource->freq_set.freq_tbl || + !core->resource->freq_set.count) { + d_vpr_e("%s: invalid frequency table\n", __func__); return -EINVAL; } @@ -422,8 +425,8 @@ int msm_vidc_set_clocks(struct msm_vidc_inst* inst) * keep checking from lowest to highest rate until * table rate >= requested rate */ - for (i = core->dt->allowed_clks_tbl_size - 1; i >= 0; i--) { - rate = core->dt->allowed_clks_tbl[i].clock_rate; + for (i = core->resource->freq_set.count - 1; i >= 0; i--) { + rate = core->resource->freq_set.freq_tbl[i].freq; if (rate >= freq) break; } @@ -431,10 +434,10 @@ int msm_vidc_set_clocks(struct msm_vidc_inst* inst) i = 0; if (increment) { if (i > 0) - rate = core->dt->allowed_clks_tbl[i - 1].clock_rate; + rate = core->resource->freq_set.freq_tbl[i - 1].freq; } else if (decrement) { - if (i < (int) (core->dt->allowed_clks_tbl_size - 1)) - rate = core->dt->allowed_clks_tbl[i + 1].clock_rate; + if (i < (int) (core->platform->data.freq_tbl_size - 1)) + rate = core->resource->freq_set.freq_tbl[i + 1].freq; } core->power.clk_freq = (u32)rate; diff --git a/driver/vidc/src/msm_vidc_probe.c b/driver/vidc/src/msm_vidc_probe.c index be446d4129..147e85d3d0 100644 --- a/driver/vidc/src/msm_vidc_probe.c +++ b/driver/vidc/src/msm_vidc_probe.c @@ -10,11 +10,15 @@ #include #include #include +#include +#include +#ifdef CONFIG_MSM_MMRM +#include +#endif #include "msm_vidc_internal.h" #include "msm_vidc_debug.h" #include "msm_vidc_driver.h" -#include "msm_vidc_dt.h" #include "msm_vidc_platform.h" #include "msm_vidc_core.h" #include "msm_vidc_memory.h" @@ -28,62 +32,50 @@ struct msm_vidc_core *g_core; const char video_banner[] = "Video-Banner: (" VIDEO_COMPILE_BY "@" VIDEO_COMPILE_HOST ") (" VIDEO_COMPILE_TIME ")"; -static int msm_vidc_deinit_irq(struct msm_vidc_core *core) +static inline bool is_video_device(struct device *dev) { - struct msm_vidc_dt *dt; - - if (!core || !core->pdev || !core->dt) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - dt = core->dt; - d_vpr_h("%s: reg_base = %pa, reg_size = %#x\n", - __func__, &dt->register_base, dt->register_size); - - dt->irq = 0; - - if (core->register_base_addr) - devm_iounmap(&core->pdev->dev, core->register_base_addr); - core->register_base_addr = 0; - return 0; + return !!(of_device_is_compatible(dev->of_node, "qcom,sm8450-vidc") || + of_device_is_compatible(dev->of_node, "qcom,sm8550-vidc") || + of_device_is_compatible(dev->of_node, "qcom,sm8550-vidc-v2") || + of_device_is_compatible(dev->of_node, "qcom,sm8650-vidc")); } -static int msm_vidc_init_irq(struct msm_vidc_core *core) +static inline bool is_video_context_bank_device(struct device *dev) { - int rc = 0; - struct msm_vidc_dt *dt; + return !!(of_device_is_compatible(dev->of_node, "qcom,vidc,cb-sec-pxl") || + of_device_is_compatible(dev->of_node, "qcom,vidc,cb-sec-bitstream") || + of_device_is_compatible(dev->of_node, "qcom,vidc,cb-sec-non-pxl") || + of_device_is_compatible(dev->of_node, "qcom,vidc,cb-ns") || + of_device_is_compatible(dev->of_node, "qcom,vidc,cb-ns-pxl")); +} - if (!core || !core->pdev || !core->dt) { +static int msm_vidc_init_resources(struct msm_vidc_core *core) +{ + const struct msm_vidc_resources_ops *res_ops; + struct msm_vidc_resource *res = NULL; + int rc = 0; + + if (!core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - dt = core->dt; + res_ops = core->res_ops; - core->register_base_addr = devm_ioremap(&core->pdev->dev, - dt->register_base, dt->register_size); - if (!core->register_base_addr) { - d_vpr_e("could not map reg addr %pa of size %d\n", - &dt->register_base, dt->register_size); - rc = -EINVAL; - goto exit; + res = devm_kzalloc(&core->pdev->dev, sizeof(*res), GFP_KERNEL); + if (!res) { + d_vpr_e("%s: failed to alloc memory for resource\n", __func__); + return -ENOMEM; } + res->core = core; + core->resource = res; - rc = devm_request_threaded_irq(&core->pdev->dev, dt->irq, venus_hfi_isr, - venus_hfi_isr_handler, IRQF_TRIGGER_HIGH, "msm-vidc", core); + rc = res_ops->init(core); if (rc) { - d_vpr_e("%s: Failed to allocate venus IRQ\n", __func__); - goto exit; + d_vpr_e("%s: Failed to init resources: %d\n", __func__, rc); + return rc; } - disable_irq_nosync(dt->irq); - - d_vpr_h("%s: reg_base = %pa, reg_size = %d\n", - __func__, &dt->register_base, dt->register_size); return 0; - -exit: - msm_vidc_deinit_irq(core); - return rc; } static ssize_t sku_version_show(struct device *dev, @@ -95,8 +87,7 @@ static ssize_t sku_version_show(struct device *dev, * Default sku version: 0 * driver possibly not probed yet or not the main device. */ - if (!dev || !dev->driver || - !of_device_is_compatible(dev->of_node, "qcom,msm-vidc")) + if (!dev || !dev->driver) return 0; core = dev_get_drvdata(dev); @@ -121,8 +112,15 @@ static struct attribute_group msm_vidc_core_attr_group = { }; static const struct of_device_id msm_vidc_dt_match[] = { - {.compatible = "qcom,msm-vidc"}, - {.compatible = "qcom,msm-vidc,context-bank"}, + {.compatible = "qcom,sm8450-vidc"}, + {.compatible = "qcom,sm8550-vidc"}, + {.compatible = "qcom,sm8550-vidc-v2"}, + {.compatible = "qcom,sm8650-vidc"}, + {.compatible = "qcom,vidc,cb-ns-pxl"}, + {.compatible = "qcom,vidc,cb-ns"}, + {.compatible = "qcom,vidc,cb-sec-non-pxl"}, + {.compatible = "qcom,vidc,cb-sec-bitstream"}, + {.compatible = "qcom,vidc,cb-sec-pxl"}, MSM_VIDC_EMPTY_BRACE }; MODULE_DEVICE_TABLE(of, msm_vidc_dt_match); @@ -137,7 +135,7 @@ static void msm_vidc_unregister_video_device(struct msm_vidc_core *core, { int index; - d_vpr_h("%s()\n", __func__); + d_vpr_h("%s: domain %d\n", __func__, type); if (type == MSM_VIDC_DECODER) index = 0; @@ -163,7 +161,7 @@ static int msm_vidc_register_video_device(struct msm_vidc_core *core, int rc = 0; int index, media_index; - d_vpr_h("%s()\n", __func__); + d_vpr_h("%s: domain %d\n", __func__, type); if (!core || !core->capabilities) { d_vpr_e("%s: invalid params\n", __func__); @@ -236,32 +234,32 @@ static int msm_vidc_check_mmrm_support(struct msm_vidc_core *core) { int rc = 0; - if (!core || !core->capabilities) { + if (!core || !core->platform) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - if (!core->capabilities[MMRM].value) + if (!is_mmrm_supported(core)) goto exit; if (!mmrm_client_check_scaling_supported(MMRM_CLIENT_CLOCK, 0)) { d_vpr_e("%s: MMRM not supported\n", __func__); - core->capabilities[MMRM].value = 0; + core->platform->data.supports_mmrm = 0; } exit: - d_vpr_h("%s: %d\n", __func__, core->capabilities[MMRM].value); + d_vpr_h("%s: %d\n", __func__, is_mmrm_supported(core)); return rc; } #else static int msm_vidc_check_mmrm_support(struct msm_vidc_core *core) { - if (!core || !core->capabilities) { + if (!core || !core->platform) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - core->capabilities[MMRM].value = 0; + core->platform->data.supports_mmrm = 0; return 0; } @@ -358,6 +356,83 @@ exit: return rc; } +static struct context_bank_info *get_context_bank( + struct msm_vidc_core *core, struct device *dev) +{ + struct context_bank_info *cb = NULL, *match = NULL; + + if (!core || !dev) { + d_vpr_e("%s: invalid params\n", __func__); + return NULL; + } + + venus_hfi_for_each_context_bank(core, cb) { + if (of_device_is_compatible(dev->of_node, cb->name)) { + match = cb; + break; + } + } + if (!match) + d_vpr_e("cb not found for dev %s\n", dev_name(dev)); + + return match; +} + +static int msm_vidc_setup_context_bank(struct msm_vidc_core *core, + struct device *dev) +{ + struct context_bank_info *cb = NULL; + int rc = 0; + + if (!core || !dev) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + cb = get_context_bank(core, dev); + if (!cb) { + d_vpr_e("%s: Failed to get context bank device for %s\n", + __func__, dev_name(dev)); + return -EIO; + } + + /* populate dev & domain field */ + cb->dev = dev; + cb->domain = iommu_get_domain_for_dev(cb->dev); + + /* + * When memory is fragmented, below configuration increases the + * possibility to get a mapping for buffer in the configured CB. + */ + + /* remove kernel version condition once below api is whitelisted in pineapple */ +#if (LINUX_VERSION_CODE < KERNEL_VERSION(5, 16, 0)) + iommu_dma_enable_best_fit_algo(cb->dev); +#endif + + /* + * configure device segment size and segment boundary to ensure + * iommu mapping returns one mapping (which is required for partial + * cache operations) + */ + if (!dev->dma_parms) + dev->dma_parms = + devm_kzalloc(dev, sizeof(*dev->dma_parms), GFP_KERNEL); + dma_set_max_seg_size(dev, (unsigned int)DMA_BIT_MASK(32)); + dma_set_seg_boundary(dev, (unsigned long)DMA_BIT_MASK(64)); + + iommu_set_fault_handler(cb->domain, + msm_vidc_smmu_fault_handler, (void *)core); + + d_vpr_h( + "%s: name %s addr start %x size %x secure %d dma_coherant %d region %d dev_name %s domain %pK\n", + __func__, cb->name, cb->addr_range.start, + cb->addr_range.size, cb->secure, cb->dma_coherant, + cb->region, dev_name(cb->dev), cb->domain); + + return rc; +} + static int msm_vidc_component_compare_of(struct device *dev, void *data) { return dev->of_node == data; @@ -372,8 +447,35 @@ static void msm_vidc_component_release_of(struct device *dev, void *data) static int msm_vidc_component_cb_bind(struct device *dev, struct device *master, void *data) { - d_vpr_h("%s(): %s\n", __func__, dev_name(dev)); - return 0; + struct msm_vidc_core *core; + int rc = 0; + + if (!dev) { + d_vpr_e("%s: invalid device\n", __func__); + return -EINVAL; + } else if (!dev->parent) { + d_vpr_e("%s: failed to find a parent for %s\n", + __func__, dev_name(dev)); + return -ENODEV; + } + core = dev_get_drvdata(dev->parent); + if (!core) { + d_vpr_e("%s: failed to find cookie in parent device %s", + __func__, dev_name(dev->parent)); + return -EINVAL; + } + + rc = msm_vidc_setup_context_bank(core, dev); + if (rc) { + d_vpr_e("%s: Failed to probe context bank - %s\n", + __func__, dev_name(dev)); + return rc; + } + + d_vpr_h("%s: Successfully probed context bank - %s\n", + __func__, dev_name(dev)); + + return rc; } static void msm_vidc_component_cb_unbind(struct device *dev, @@ -391,7 +493,7 @@ static int msm_vidc_component_bind(struct device *dev) rc = component_bind_all(dev, core); if (rc) { - d_vpr_e("%s: sub-device bind failed\n", __func__); + d_vpr_e("%s: sub-device bind failed. rc %d\n", __func__, rc); return rc; } @@ -464,7 +566,7 @@ static int msm_vidc_remove_video_device(struct platform_device *pdev) d_vpr_h("depopulating sub devices\n"); /* - * Trigger remove for each sub-device i.e. qcom,msm-vidc,context-bank. + * Trigger remove for each sub-device i.e. qcom,context-bank,xxxx * When msm_vidc_remove is called for each sub-device, destroy * context-bank mappings. */ @@ -488,9 +590,7 @@ static int msm_vidc_remove_video_device(struct platform_device *pdev) msm_vidc_deinit_instance_caps(core); msm_vidc_deinit_core_caps(core); - msm_vidc_deinit_irq(core); msm_vidc_deinit_platform(pdev); - msm_vidc_deinit_dt(pdev); msm_vidc_deinitialize_core(core); dev_set_drvdata(&pdev->dev, NULL); @@ -504,8 +604,7 @@ static int msm_vidc_remove_video_device(struct platform_device *pdev) static int msm_vidc_remove_context_bank(struct platform_device *pdev) { - d_vpr_h("%s(): Detached %s and destroyed mapping\n", - __func__, dev_name(&pdev->dev)); + d_vpr_h("%s(): %s\n", __func__, dev_name(&pdev->dev)); component_del(&pdev->dev, &msm_vidc_component_cb_ops); @@ -519,12 +618,10 @@ static int msm_vidc_remove(struct platform_device *pdev) * after core_deinit(). It return immediately after completing * sub-device remove. */ - if (of_device_is_compatible(pdev->dev.of_node, "qcom,msm-vidc")) { + if (is_video_device(&pdev->dev)) return msm_vidc_remove_video_device(pdev); - } else if (of_device_is_compatible(pdev->dev.of_node, - "qcom,msm-vidc,context-bank")) { + else if (is_video_context_bank_device(&pdev->dev)) return msm_vidc_remove_context_bank(pdev); - } /* How did we end up here? */ WARN_ON(1); @@ -539,7 +636,7 @@ static int msm_vidc_probe_video_device(struct platform_device *pdev) struct device_node *child = NULL; int sub_device_count = 0, nr = BASE_DEVICE_NUMBER; - d_vpr_h("%s()\n", __func__); + d_vpr_h("%s: %s\n", __func__, dev_name(&pdev->dev)); rc = msm_vidc_vmem_alloc(sizeof(*core), (void **)&core, __func__); if (rc) @@ -559,13 +656,6 @@ static int msm_vidc_probe_video_device(struct platform_device *pdev) goto init_core_failed; } - rc = msm_vidc_init_dt(pdev); - if (rc) { - d_vpr_e("%s: init dt failed with %d\n", __func__, rc); - rc = -EINVAL; - goto init_dt_failed; - } - rc = msm_vidc_init_platform(pdev); if (rc) { d_vpr_e("%s: init platform failed with %d\n", __func__, rc); @@ -573,16 +663,16 @@ static int msm_vidc_probe_video_device(struct platform_device *pdev) goto init_plat_failed; } - rc = msm_vidc_init_irq(core); + rc = msm_vidc_init_resources(core); if (rc) { - d_vpr_e("%s: init irq failed with %d\n", __func__, rc); - goto init_irq_failed; + d_vpr_e("%s: init resource failed with %d\n", __func__, rc); + goto init_res_failed; } rc = msm_vidc_init_core_caps(core); if (rc) { d_vpr_e("%s: init core caps failed with %d\n", __func__, rc); - goto init_core_caps_fail; + goto init_res_failed; } rc = msm_vidc_init_instance_caps(core); @@ -659,8 +749,7 @@ static int msm_vidc_probe_video_device(struct platform_device *pdev) /* * Trigger probe for each sub-device i.e. qcom,msm-vidc,context-bank. * When msm_vidc_probe is called for each sub-device, parse the - * context-bank details and store it in core->resources.context_banks - * list. + * context-bank details. */ rc = of_platform_populate(pdev->dev.of_node, msm_vidc_dt_match, NULL, &pdev->dev); @@ -698,13 +787,9 @@ init_group_failed: msm_vidc_deinit_instance_caps(core); init_inst_caps_fail: msm_vidc_deinit_core_caps(core); -init_core_caps_fail: - msm_vidc_deinit_irq(core); -init_irq_failed: +init_res_failed: msm_vidc_deinit_platform(pdev); init_plat_failed: - msm_vidc_deinit_dt(pdev); -init_dt_failed: msm_vidc_deinitialize_core(core); init_core_failed: dev_set_drvdata(&pdev->dev, NULL); @@ -717,13 +802,7 @@ init_core_failed: static int msm_vidc_probe_context_bank(struct platform_device *pdev) { - int rc = 0; - - d_vpr_h("%s()\n", __func__); - - rc = msm_vidc_read_context_bank_resources_from_dt(pdev); - if (rc) - return rc; + d_vpr_h("%s(): %s\n", __func__, dev_name(&pdev->dev)); return component_add(&pdev->dev, &msm_vidc_component_cb_ops); } @@ -737,12 +816,10 @@ static int msm_vidc_probe(struct platform_device *pdev) * the end of the probe function after msm-vidc device probe is * completed. Return immediately after completing sub-device probe. */ - if (of_device_is_compatible(pdev->dev.of_node, "qcom,msm-vidc")) { + if (is_video_device(&pdev->dev)) return msm_vidc_probe_video_device(pdev); - } else if (of_device_is_compatible(pdev->dev.of_node, - "qcom,msm-vidc,context-bank")) { + else if (is_video_context_bank_device(&pdev->dev)) return msm_vidc_probe_context_bank(pdev); - } /* How did we end up here? */ WARN_ON(1); @@ -760,8 +837,7 @@ static int msm_vidc_pm_suspend(struct device *dev) * - not the main device. We don't support power management on * subdevices (e.g. context banks) */ - if (!dev || !dev->driver || - !of_device_is_compatible(dev->of_node, "qcom,msm-vidc")) + if (!dev || !dev->driver || !is_video_device(dev)) return 0; core = dev_get_drvdata(dev); @@ -792,8 +868,7 @@ static int msm_vidc_pm_resume(struct device *dev) * - not the main device. We don't support power management on * subdevices (e.g. context banks) */ - if (!dev || !dev->driver || - !of_device_is_compatible(dev->of_node, "qcom,msm-vidc")) + if (!dev || !dev->driver || !is_video_device(dev)) return 0; core = dev_get_drvdata(dev); diff --git a/driver/vidc/src/msm_vidc_vb2.c b/driver/vidc/src/msm_vidc_vb2.c index bfeafa8480..f74565326d 100644 --- a/driver/vidc/src/msm_vidc_vb2.c +++ b/driver/vidc/src/msm_vidc_vb2.c @@ -16,7 +16,7 @@ #include "msm_venc.h" #include "msm_vidc_debug.h" #include "msm_vidc_control.h" -#include "msm_vidc_dt.h" +#include "msm_vidc_platform.h" extern struct msm_vidc_core *g_core; @@ -101,7 +101,7 @@ void *msm_vb2_attach_dmabuf(struct vb2_buffer *vb, struct device *dev, buf->attach->dma_map_attrs |= DMA_ATTR_SKIP_CPU_SYNC; buf->attach->dma_map_attrs |= DMA_ATTR_DELAYED_UNMAP; - if (core->dt->sys_cache_present) + if (is_sys_cache_present(core)) buf->attach->dma_map_attrs |= DMA_ATTR_IOMMU_USE_UPSTREAM_HINT; diff --git a/driver/vidc/src/resources.c b/driver/vidc/src/resources.c index 99d5db2abb..b1dcbd3ec6 100644 --- a/driver/vidc/src/resources.c +++ b/driver/vidc/src/resources.c @@ -4,14 +4,19 @@ */ /* Copyright (c) 2022. Qualcomm Innovation Center, Inc. All rights reserved. */ +#include #include #include #include +#include +#ifdef CONFIG_MSM_MMRM +#include +#endif #include "msm_vidc_core.h" #include "msm_vidc_debug.h" -#include "msm_vidc_dt.h" #include "msm_vidc_power.h" +#include "msm_vidc_platform.h" #include "venus_hfi.h" /* Less than 50MBps is treated as trivial BW change */ @@ -31,203 +36,611 @@ static void __fatal_error(bool fatal) WARN_ON(fatal); } -static bool is_sys_cache_present(struct msm_vidc_core *core) +static void devm_llcc_release(struct device *dev, void *res) { - return core->dt->sys_cache_present; + d_vpr_h("%s()\n", __func__); + llcc_slice_putd(*(struct llcc_slice_desc **)res); } -static void __deinit_clocks(struct msm_vidc_core *core) +static struct llcc_slice_desc *devm_llcc_get(struct device *dev, u32 id) { - struct clock_info *cl; + struct llcc_slice_desc **ptr, *llcc; - core->power.clk_freq = 0; - venus_hfi_for_each_clock_reverse(core, cl) { - if (cl->clk) { - clk_put(cl->clk); - cl->clk = NULL; - } + ptr = devres_alloc(devm_llcc_release, sizeof(*ptr), GFP_KERNEL); + if (!ptr) + return ERR_PTR(-ENOMEM); + + llcc = llcc_slice_getd(id); + if (!IS_ERR(llcc)) { + *ptr = llcc; + devres_add(dev, ptr); + } else { + devres_free(ptr); } + + return llcc; } -static int __init_clocks(struct msm_vidc_core *core) +#ifdef CONFIG_MSM_MMRM +static void devm_mmrm_release(struct device *dev, void *res) { - int rc = 0; - struct clock_info *cl = NULL; + d_vpr_h("%s()\n", __func__); + mmrm_client_deregister(*(struct mmrm_client **)res); +} - if (!core) { +static struct mmrm_client *devm_mmrm_get(struct device *dev, struct mmrm_client_desc *desc) +{ + struct mmrm_client **ptr, *mmrm; + + ptr = devres_alloc(devm_mmrm_release, sizeof(*ptr), GFP_KERNEL); + if (!ptr) + return ERR_PTR(-ENOMEM); + + mmrm = mmrm_client_register(desc); + if (!IS_ERR(mmrm)) { + *ptr = mmrm; + devres_add(dev, ptr); + } else { + devres_free(ptr); + } + + return mmrm; +} +#endif + +/* A comparator to compare loads (needed later on) */ +static inline int cmp(const void *a, const void *b) +{ + /* want to sort in reverse so flip the comparison */ + return ((struct freq_table *)b)->freq - + ((struct freq_table *)a)->freq; +} + +static int __init_register_base(struct msm_vidc_core *core) +{ + struct msm_vidc_resource *res; + + if (!core || !core->pdev || !core->resource) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } + res = core->resource; - venus_hfi_for_each_clock(core, cl) { - d_vpr_h("%s: scalable? %d, count %d\n", - cl->name, cl->has_scaling, cl->count); + res->register_base_addr = devm_platform_ioremap_resource(core->pdev, 0); + if (IS_ERR(res->register_base_addr)) { + d_vpr_e("%s: map reg addr failed %d\n", + __func__, PTR_ERR(res->register_base_addr)); + return -EINVAL; } + d_vpr_h("%s: reg_base %#x\n", __func__, res->register_base_addr); - venus_hfi_for_each_clock(core, cl) { - if (!cl->clk) { - cl->clk = clk_get(&core->pdev->dev, cl->name); - if (IS_ERR_OR_NULL(cl->clk)) { - d_vpr_e("Failed to get clock: %s\n", cl->name); - rc = PTR_ERR(cl->clk) ? - PTR_ERR(cl->clk) : -EINVAL; - cl->clk = NULL; - goto err_clk_get; - } - } - } - core->power.clk_freq = 0; return 0; - -err_clk_get: - __deinit_clocks(core); - return rc; } -static int __handle_reset_clk(struct msm_vidc_core *core, - int reset_index, enum reset_state state) +static int __init_irq(struct msm_vidc_core *core) { + struct msm_vidc_resource *res; +#if (LINUX_VERSION_CODE < KERNEL_VERSION(5, 16, 0)) + struct resource *kres; +#endif int rc = 0; - struct msm_vidc_dt *dt = core->dt; - struct reset_control *rst; - struct reset_set *rst_set = &dt->reset_set; - if (!rst_set->reset_tbl) - return 0; - - rst = rst_set->reset_tbl[reset_index].rst; - d_vpr_h("reset_clk: name %s reset_state %d rst %pK\n", - rst_set->reset_tbl[reset_index].name, state, rst); - - switch (state) { - case INIT: - if (rst) - goto skip_reset_init; - - rst = devm_reset_control_get(&core->pdev->dev, - rst_set->reset_tbl[reset_index].name); - if (IS_ERR(rst)) - rc = PTR_ERR(rst); - - rst_set->reset_tbl[reset_index].rst = rst; - break; - case ASSERT: - if (!rst) { - rc = PTR_ERR(rst); - goto failed_to_reset; - } - - rc = reset_control_assert(rst); - break; - case DEASSERT: - if (!rst) { - rc = PTR_ERR(rst); - goto failed_to_reset; - } - rc = reset_control_deassert(rst); - break; - default: - d_vpr_e("%s: invalid reset request\n", __func__); - if (rc) - goto failed_to_reset; - } - - return 0; - -skip_reset_init: -failed_to_reset: - return rc; -} - -static int __reset_ahb2axi_bridge(struct msm_vidc_core *core) -{ - int rc, i; - - if (!core) { + if (!core || !core->pdev || !core->resource) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } + res = core->resource; - for (i = 0; i < core->dt->reset_set.count; i++) { - rc = __handle_reset_clk(core, i, ASSERT); - if (rc) { - d_vpr_e("failed to assert reset clocks\n"); - goto failed_to_reset; - } +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 16, 0)) + res->irq = platform_get_irq(core->pdev, 0); +#else + kres = platform_get_resource(core->pdev, IORESOURCE_IRQ, 0); + res->irq = kres ? kres->start : -1; +#endif + if (res->irq < 0) + d_vpr_e("%s: get irq failed, %d\n", __func__, res->irq); - /* wait for deassert */ - usleep_range(1000, 1100); + d_vpr_h("%s: irq %d\n", __func__, res->irq); + + rc = devm_request_threaded_irq(&core->pdev->dev, res->irq, venus_hfi_isr, + venus_hfi_isr_handler, IRQF_TRIGGER_HIGH, "msm-vidc", core); + if (rc) { + d_vpr_e("%s: Failed to allocate venus IRQ\n", __func__); + return rc; } + disable_irq_nosync(res->irq); - for (i = 0; i < core->dt->reset_set.count; i++) { - rc = __handle_reset_clk(core, i, DEASSERT); - if (rc) { - d_vpr_e("failed to deassert reset clocks\n"); - goto failed_to_reset; - } - } - - return 0; - -failed_to_reset: return rc; } -static void __deinit_bus(struct msm_vidc_core *core) -{ - struct bus_info *bus = NULL; - - if (!core) - return; - - core->power.bw_ddr = 0; - core->power.bw_llcc = 0; - - venus_hfi_for_each_bus_reverse(core, bus) { - if (!bus->path) - continue; - icc_put(bus->path); - bus->path = NULL; - } -} - static int __init_bus(struct msm_vidc_core *core) { - struct bus_info *bus = NULL; + const struct bw_table *bus_tbl; + struct bus_set *interconnects; + struct bus_info *binfo = NULL; + u32 bus_count = 0, cnt = 0; int rc = 0; - if (!core) { - d_vpr_e("%s: invalid param\n", __func__); + if (!core || !core->resource || !core->platform) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + interconnects = &core->resource->bus_set; + + bus_tbl = core->platform->data.bw_tbl; + bus_count = core->platform->data.bw_tbl_size; + + if (!bus_tbl || !bus_count) { + d_vpr_e("%s: invalid bus tbl %#x or count %d\n", + __func__, bus_tbl, bus_count); return -EINVAL; } - venus_hfi_for_each_bus(core, bus) { - if (!strcmp(bus->name, "venus-llcc")) { + /* allocate bus_set */ + interconnects->bus_tbl = devm_kzalloc(&core->pdev->dev, + sizeof(*interconnects->bus_tbl) * bus_count, GFP_KERNEL); + if (!interconnects->bus_tbl) { + d_vpr_e("%s: failed to alloc memory for bus table\n", __func__); + return -ENOMEM; + } + interconnects->count = bus_count; + + /* populate bus field from platform data */ + for (cnt = 0; cnt < interconnects->count; cnt++) { + interconnects->bus_tbl[cnt].name = bus_tbl[cnt].name; + interconnects->bus_tbl[cnt].min_kbps = bus_tbl[cnt].min_kbps; + interconnects->bus_tbl[cnt].max_kbps = bus_tbl[cnt].max_kbps; + } + + /* print bus fields */ + venus_hfi_for_each_bus(core, binfo) { + d_vpr_h("%s: name %s min_kbps %u max_kbps %u\n", + __func__, binfo->name, binfo->min_kbps, binfo->max_kbps); + } + + /* get interconnect handle */ + venus_hfi_for_each_bus(core, binfo) { + if (!strcmp(binfo->name, "venus-llcc")) { if (msm_vidc_syscache_disable) { - d_vpr_h("Skipping LLC bus init: %s\n", - bus->name); + d_vpr_h("%s: skipping LLC bus init: %s\n", __func__, + binfo->name); continue; } } - bus->path = of_icc_get(bus->dev, bus->name); - if (IS_ERR_OR_NULL(bus->path)) { - rc = PTR_ERR(bus->path) ? - PTR_ERR(bus->path) : -EBADHANDLE; - - d_vpr_e("Failed to register bus %s: %d\n", - bus->name, rc); - bus->path = NULL; - goto err_add_dev; + binfo->icc = devm_of_icc_get(&core->pdev->dev, binfo->name); + if (IS_ERR_OR_NULL(binfo->icc)) { + d_vpr_e("%s: failed to get bus: %s\n", __func__, binfo->name); + rc = PTR_ERR(binfo->icc) ? + PTR_ERR(binfo->icc) : -EBADHANDLE; + binfo->icc = NULL; + return rc; } } - return 0; - -err_add_dev: - __deinit_bus(core); return rc; } +static int __init_regulators(struct msm_vidc_core *core) +{ + const struct regulator_table *regulator_tbl; + struct regulator_set *regulators; + struct regulator_info *rinfo = NULL; + u32 regulator_count = 0, cnt = 0; + int rc = 0; + + if (!core || !core->resource || !core->platform) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + regulators = &core->resource->regulator_set; + + regulator_tbl = core->platform->data.regulator_tbl; + regulator_count = core->platform->data.regulator_tbl_size; + + if (!regulator_tbl || !regulator_count) { + d_vpr_e("%s: invalid regulator tbl %#x or count %d\n", + __func__, regulator_tbl, regulator_count); + return -EINVAL; + } + + /* allocate regulator_set */ + regulators->regulator_tbl = devm_kzalloc(&core->pdev->dev, + sizeof(*regulators->regulator_tbl) * regulator_count, GFP_KERNEL); + if (!regulators->regulator_tbl) { + d_vpr_e("%s: failed to alloc memory for regulator table\n", __func__); + return -ENOMEM; + } + regulators->count = regulator_count; + + /* populate regulator fields */ + for (cnt = 0; cnt < regulators->count; cnt++) { + regulators->regulator_tbl[cnt].name = regulator_tbl[cnt].name; + regulators->regulator_tbl[cnt].hw_power_collapse = regulator_tbl[cnt].hw_trigger; + } + + /* print regulator fields */ + venus_hfi_for_each_regulator(core, rinfo) { + d_vpr_h("%s: name %s hw_power_collapse %d\n", + __func__, rinfo->name, rinfo->hw_power_collapse); + } + + /* get regulator handle */ + venus_hfi_for_each_regulator(core, rinfo) { + rinfo->regulator = devm_regulator_get(&core->pdev->dev, rinfo->name); + if (IS_ERR_OR_NULL(rinfo->regulator)) { + rc = PTR_ERR(rinfo->regulator) ? + PTR_ERR(rinfo->regulator) : -EBADHANDLE; + d_vpr_e("%s: failed to get regulator: %s\n", __func__, rinfo->name); + rinfo->regulator = NULL; + return rc; + } + } + + return rc; +} + +static int __init_clocks(struct msm_vidc_core *core) +{ + const struct clk_table *clk_tbl; + struct clock_set *clocks; + struct clock_info *cinfo = NULL; + u32 clk_count = 0, cnt = 0; + int rc = 0; + + if (!core || !core->resource || !core->platform) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + clocks = &core->resource->clock_set; + + clk_tbl = core->platform->data.clk_tbl; + clk_count = core->platform->data.clk_tbl_size; + + if (!clk_tbl || !clk_count) { + d_vpr_e("%s: invalid clock tbl %#x or count %d\n", + __func__, clk_tbl, clk_count); + return -EINVAL; + } + + /* allocate clock_set */ + clocks->clock_tbl = devm_kzalloc(&core->pdev->dev, + sizeof(*clocks->clock_tbl) * clk_count, GFP_KERNEL); + if (!clocks->clock_tbl) { + d_vpr_e("%s: failed to alloc memory for clock table\n", __func__); + return -ENOMEM; + } + clocks->count = clk_count; + + /* populate clock field from platform data */ + for (cnt = 0; cnt < clocks->count; cnt++) { + clocks->clock_tbl[cnt].name = clk_tbl[cnt].name; + clocks->clock_tbl[cnt].clk_id = clk_tbl[cnt].clk_id; + clocks->clock_tbl[cnt].has_scaling = clk_tbl[cnt].scaling; + } + + /* print clock fields */ + venus_hfi_for_each_clock(core, cinfo) { + d_vpr_h("%s: clock name %s clock id %#x scaling %d\n", + __func__, cinfo->name, cinfo->clk_id, cinfo->has_scaling); + } + + /* get clock handle */ + venus_hfi_for_each_clock(core, cinfo) { + cinfo->clk = devm_clk_get(&core->pdev->dev, cinfo->name); + if (IS_ERR_OR_NULL(cinfo->clk)) { + d_vpr_e("%s: failed to get clock: %s\n", __func__, cinfo->name); + rc = PTR_ERR(cinfo->clk) ? + PTR_ERR(cinfo->clk) : -EINVAL; + cinfo->clk = NULL; + return rc; + } + } + + return rc; +} + +static int __init_reset_clocks(struct msm_vidc_core *core) +{ + const struct clk_rst_table *rst_tbl; + struct reset_set *rsts; + struct reset_info *rinfo = NULL; + u32 rst_count = 0, cnt = 0; + int rc = 0; + + if (!core || !core->resource || !core->platform) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + rsts = &core->resource->reset_set; + + rst_tbl = core->platform->data.clk_rst_tbl; + rst_count = core->platform->data.clk_rst_tbl_size; + + if (!rst_tbl || !rst_count) { + d_vpr_e("%s: invalid reset tbl %#x or count %d\n", + __func__, rst_tbl, rst_count); + return -EINVAL; + } + + /* allocate reset_set */ + rsts->reset_tbl = devm_kzalloc(&core->pdev->dev, + sizeof(*rsts->reset_tbl) * rst_count, GFP_KERNEL); + if (!rsts->reset_tbl) { + d_vpr_e("%s: failed to alloc memory for reset table\n", __func__); + return -ENOMEM; + } + rsts->count = rst_count; + + /* populate clock field from platform data */ + for (cnt = 0; cnt < rsts->count; cnt++) + rsts->reset_tbl[cnt].name = rst_tbl[cnt].name; + + /* print reset clock fields */ + venus_hfi_for_each_reset_clock(core, rinfo) { + d_vpr_h("%s: reset clk %s\n", __func__, rinfo->name); + } + + /* get reset clock handle */ + venus_hfi_for_each_reset_clock(core, rinfo) { + rinfo->rst = devm_reset_control_get(&core->pdev->dev, rinfo->name); + if (IS_ERR_OR_NULL(rinfo->rst)) { + d_vpr_e("%s: failed to get reset clock: %s\n", __func__, rinfo->name); + rc = PTR_ERR(rinfo->rst) ? + PTR_ERR(rinfo->rst) : -EINVAL; + rinfo->rst = NULL; + return rc; + } + } + + return rc; +} + +static int __init_subcaches(struct msm_vidc_core *core) +{ + const struct subcache_table *llcc_tbl; + struct subcache_set *caches; + struct subcache_info *sinfo = NULL; + u32 llcc_count = 0, cnt = 0; + int rc = 0; + + if (!core || !core->resource || !core->platform) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + caches = &core->resource->subcache_set; + + /* skip init if subcache not available */ + if (!is_sys_cache_present(core)) + return 0; + + llcc_tbl = core->platform->data.subcache_tbl; + llcc_count = core->platform->data.subcache_tbl_size; + + if (!llcc_tbl || !llcc_count) { + d_vpr_e("%s: invalid llcc tbl %#x or count %d\n", + __func__, llcc_tbl, llcc_count); + return -EINVAL; + } + + /* allocate clock_set */ + caches->subcache_tbl = devm_kzalloc(&core->pdev->dev, + sizeof(*caches->subcache_tbl) * llcc_count, GFP_KERNEL); + if (!caches->subcache_tbl) { + d_vpr_e("%s: failed to alloc memory for subcache table\n", __func__); + return -ENOMEM; + } + caches->count = llcc_count; + + /* populate subcache fields from platform data */ + for (cnt = 0; cnt < caches->count; cnt++) { + caches->subcache_tbl[cnt].name = llcc_tbl[cnt].name; + caches->subcache_tbl[cnt].llcc_id = llcc_tbl[cnt].llcc_id; + } + + /* print subcache fields */ + venus_hfi_for_each_subcache(core, sinfo) { + d_vpr_h("%s: name %s subcache id %d\n", + __func__, sinfo->name, sinfo->llcc_id); + } + + /* get subcache/llcc handle */ + venus_hfi_for_each_subcache(core, sinfo) { + sinfo->subcache = devm_llcc_get(&core->pdev->dev, sinfo->llcc_id); + if (IS_ERR_OR_NULL(sinfo->subcache)) { + d_vpr_e("%s: failed to get subcache: %d\n", __func__, sinfo->llcc_id); + rc = PTR_ERR(sinfo->subcache) ? + PTR_ERR(sinfo->subcache) : -EBADHANDLE; + sinfo->subcache = NULL; + return rc; + } + } + + return rc; +} + +static int __init_freq_table(struct msm_vidc_core *core) +{ + struct freq_table *freq_tbl; + struct freq_set *clks; + u32 freq_count = 0, cnt = 0; + int rc = 0; + + if (!core || !core->resource || !core->platform) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + clks = &core->resource->freq_set; + + freq_tbl = core->platform->data.freq_tbl; + freq_count = core->platform->data.freq_tbl_size; + + if (!freq_tbl || !freq_count) { + d_vpr_e("%s: invalid freq tbl %#x or count %d\n", + __func__, freq_tbl, freq_count); + return -EINVAL; + } + + /* allocate freq_set */ + clks->freq_tbl = devm_kzalloc(&core->pdev->dev, + sizeof(*clks->freq_tbl) * freq_count, GFP_KERNEL); + if (!clks->freq_tbl) { + d_vpr_e("%s: failed to alloc memory for freq table\n", __func__); + return -ENOMEM; + } + clks->count = freq_count; + + /* populate freq field from platform data */ + for (cnt = 0; cnt < clks->count; cnt++) + clks->freq_tbl[cnt].freq = freq_tbl[cnt].freq; + + /* sort freq table */ + sort(clks->freq_tbl, clks->count, sizeof(*clks->freq_tbl), cmp, NULL); + + /* print freq field freq_set */ + d_vpr_h("%s: updated freq table\n", __func__); + for (cnt = 0; cnt < clks->count; cnt++) + d_vpr_h("%s:\t %u\n", __func__, clks->freq_tbl[cnt].freq); + + return rc; +} + +static int __init_context_banks(struct msm_vidc_core *core) +{ + const struct context_bank_table *cb_tbl; + struct context_bank_set *cbs; + struct context_bank_info *cbinfo = NULL; + u32 cb_count = 0, cnt = 0; + int rc = 0; + + if (!core || !core->resource || !core->platform) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + cbs = &core->resource->context_bank_set; + + cb_tbl = core->platform->data.context_bank_tbl; + cb_count = core->platform->data.context_bank_tbl_size; + + if (!cb_tbl || !cb_count) { + d_vpr_e("%s: invalid context bank tbl %#x or count %d\n", + __func__, cb_tbl, cb_count); + return -EINVAL; + } + + /* allocate context_bank table */ + cbs->context_bank_tbl = devm_kzalloc(&core->pdev->dev, + sizeof(*cbs->context_bank_tbl) * cb_count, GFP_KERNEL); + if (!cbs->context_bank_tbl) { + d_vpr_e("%s: failed to alloc memory for context_bank table\n", __func__); + return -ENOMEM; + } + cbs->count = cb_count; + + /** + * populate context bank field from platform data except + * dev & domain which are assigned as part of context bank + * probe sequence + */ + for (cnt = 0; cnt < cbs->count; cnt++) { + cbs->context_bank_tbl[cnt].name = cb_tbl[cnt].name; + cbs->context_bank_tbl[cnt].addr_range.start = cb_tbl[cnt].start; + cbs->context_bank_tbl[cnt].addr_range.size = cb_tbl[cnt].size; + cbs->context_bank_tbl[cnt].secure = cb_tbl[cnt].secure; + cbs->context_bank_tbl[cnt].dma_coherant = cb_tbl[cnt].dma_coherant; + cbs->context_bank_tbl[cnt].region = cb_tbl[cnt].region; + } + + /* print context_bank fiels */ + venus_hfi_for_each_context_bank(core, cbinfo) { + d_vpr_h("%s: name %s addr start %#x size %#x secure %d coherant %d region %d\n", + __func__, cbinfo->name, cbinfo->addr_range.start, + cbinfo->addr_range.size, cbinfo->secure, + cbinfo->dma_coherant, cbinfo->region); + } + + return rc; +} + +#ifdef CONFIG_MSM_MMRM +static int __register_mmrm(struct msm_vidc_core *core) +{ + int rc = 0; + struct clock_info *cl; + + if (!core || !core->platform) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + /* skip if platform does not support mmrm */ + if (!is_mmrm_supported(core)) { + d_vpr_h("%s: MMRM not supported\n", __func__); + return 0; + } + + /* get mmrm handle for each clock sources */ + venus_hfi_for_each_clock(core, cl) { + struct mmrm_client_desc desc; + char *name = (char *)desc.client_info.desc.name; + + // TODO: set notifier data vals + struct mmrm_client_notifier_data notifier_data = { + MMRM_CLIENT_RESOURCE_VALUE_CHANGE, + {{0, 0}}, + NULL}; + + // TODO: add callback fn + desc.notifier_callback_fn = NULL; + + if (!cl->has_scaling) + continue; + + if (IS_ERR_OR_NULL(cl->clk)) { + d_vpr_e("%s: Invalid clock: %s\n", __func__, cl->name); + return PTR_ERR(cl->clk) ? PTR_ERR(cl->clk) : -EINVAL; + } + + desc.client_type = MMRM_CLIENT_CLOCK; + desc.client_info.desc.client_domain = MMRM_CLIENT_DOMAIN_VIDEO; + desc.client_info.desc.client_id = cl->clk_id; + strscpy(name, cl->name, sizeof(desc.client_info.desc.name)); + desc.client_info.desc.clk = cl->clk; + desc.priority = MMRM_CLIENT_PRIOR_LOW; + desc.pvt_data = notifier_data.pvt_data; + + d_vpr_h("%s: domain(%d) cid(%d) name(%s) clk(%pK)\n", + __func__, + desc.client_info.desc.client_domain, + desc.client_info.desc.client_id, + desc.client_info.desc.name, + desc.client_info.desc.clk); + + d_vpr_h("%s: type(%d) pri(%d) pvt(%pK) notifier(%pK)\n", + __func__, + desc.client_type, + desc.priority, + desc.pvt_data, + desc.notifier_callback_fn); + + cl->mmrm_client = devm_mmrm_get(&core->pdev->dev, &desc); + if (!cl->mmrm_client) { + d_vpr_e("%s: Failed to register clk(%s): %d\n", + __func__, cl->name, rc); + return -EINVAL; + } + } + + return rc; +} +#else +static int __register_mmrm(struct msm_vidc_core *core) +{ + return 0; +} +#endif + + + static int __acquire_regulator(struct msm_vidc_core *core, struct regulator_info *rinfo) { @@ -238,7 +651,7 @@ static int __acquire_regulator(struct msm_vidc_core *core, return -EINVAL; } - if (rinfo->has_hw_power_collapse) { + if (rinfo->hw_power_collapse) { if (!rinfo->regulator) { d_vpr_e("%s: invalid regulator\n", __func__); rc = -EINVAL; @@ -297,7 +710,7 @@ static int __hand_off_regulator(struct msm_vidc_core *core, { int rc = 0; - if (rinfo->has_hw_power_collapse) { + if (rinfo->hw_power_collapse) { if (!rinfo->regulator) { d_vpr_e("%s: invalid regulator\n", __func__); return -EINVAL; @@ -443,221 +856,6 @@ static int __enable_regulator(struct msm_vidc_core *core, const char *reg_name) return rc; } -#ifdef CONFIG_MSM_MMRM -static void __deregister_mmrm(struct msm_vidc_core *core) -{ - struct clock_info *cl; - - if (!core || !core->capabilities) { - d_vpr_e("%s: invalid params\n", __func__); - return; - } - - if (!core->capabilities[MMRM].value) { - d_vpr_h("%s: MMRM not supported\n", __func__); - return; - } - - venus_hfi_for_each_clock(core, cl) { - if (cl->has_scaling && cl->mmrm_client) { - mmrm_client_deregister(cl->mmrm_client); - cl->mmrm_client = NULL; - } - } -} -#else -static void __deregister_mmrm(struct msm_vidc_core *core) -{ -} -#endif - -#ifdef CONFIG_MSM_MMRM -static int __register_mmrm(struct msm_vidc_core *core) -{ - int rc = 0; - struct clock_info *cl; - - if (!core ||!core->capabilities) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - if (!core->capabilities[MMRM].value) { - d_vpr_h("%s: MMRM not supported\n", __func__); - return 0; - } - - venus_hfi_for_each_clock(core, cl) { - struct mmrm_client_desc desc; - char *name = (char *)desc.client_info.desc.name; - - // TODO: set notifier data vals - struct mmrm_client_notifier_data notifier_data = { - MMRM_CLIENT_RESOURCE_VALUE_CHANGE, - {{0, 0}}, - NULL}; - - // TODO: add callback fn - desc.notifier_callback_fn = NULL; - - if (!cl->has_scaling) - continue; - - if (IS_ERR_OR_NULL(cl->clk)) { - d_vpr_e("%s: Invalid clock: %s\n", __func__, cl->name); - rc = PTR_ERR(cl->clk) ? PTR_ERR(cl->clk) : -EINVAL; - goto err_register_mmrm; - } - - desc.client_type = MMRM_CLIENT_CLOCK; - desc.client_info.desc.client_domain = MMRM_CLIENT_DOMAIN_VIDEO; - desc.client_info.desc.client_id = cl->clk_id; - strlcpy(name, cl->name, sizeof(desc.client_info.desc.name)); - desc.client_info.desc.clk = cl->clk; - desc.priority = MMRM_CLIENT_PRIOR_LOW; - desc.pvt_data = notifier_data.pvt_data; - - d_vpr_h("%s: domain(%d) cid(%d) name(%s) clk(%pK)\n", - __func__, - desc.client_info.desc.client_domain, - desc.client_info.desc.client_id, - desc.client_info.desc.name, - desc.client_info.desc.clk); - - d_vpr_h("%s: type(%d) pri(%d) pvt(%pK) notifier(%pK)\n", - __func__, - desc.client_type, - desc.priority, - desc.pvt_data, - desc.notifier_callback_fn); - - cl->mmrm_client = mmrm_client_register(&desc); - if (!cl->mmrm_client) { - d_vpr_e("%s: Failed to register clk(%s): %d\n", - __func__, cl->name, rc); - rc = -EINVAL; - goto err_register_mmrm; - } - } - - return 0; - -err_register_mmrm: - __deregister_mmrm(core); - return rc; -} -#else -static int __register_mmrm(struct msm_vidc_core *core) -{ - return 0; -} -#endif - -static void __deinit_regulators(struct msm_vidc_core *core) -{ - struct regulator_info *rinfo = NULL; - - venus_hfi_for_each_regulator_reverse(core, rinfo) { - if (rinfo->regulator) { - regulator_put(rinfo->regulator); - rinfo->regulator = NULL; - } - } -} - -static int __init_regulators(struct msm_vidc_core *core) -{ - int rc = 0; - struct regulator_info *rinfo = NULL; - - venus_hfi_for_each_regulator(core, rinfo) { - rinfo->regulator = regulator_get(&core->pdev->dev, rinfo->name); - if (IS_ERR_OR_NULL(rinfo->regulator)) { - rc = PTR_ERR(rinfo->regulator) ? - PTR_ERR(rinfo->regulator) : -EBADHANDLE; - d_vpr_e("Failed to get regulator: %s\n", rinfo->name); - rinfo->regulator = NULL; - goto err_reg_get; - } - } - - return 0; - -err_reg_get: - __deinit_regulators(core); - return rc; -} - -static void __deinit_subcaches(struct msm_vidc_core *core) -{ - struct subcache_info *sinfo = NULL; - - if (!core) { - d_vpr_e("%s: invalid params\n", __func__); - goto exit; - } - - if (!is_sys_cache_present(core)) - goto exit; - - venus_hfi_for_each_subcache_reverse(core, sinfo) { - if (sinfo->subcache) { - d_vpr_h("deinit_subcaches: %s\n", sinfo->name); - llcc_slice_putd(sinfo->subcache); - sinfo->subcache = NULL; - } - } - -exit: - return; -} - -static int __init_subcaches(struct msm_vidc_core *core) -{ - int rc = 0; - struct subcache_info *sinfo = NULL; - - if (!core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - if (!is_sys_cache_present(core)) - return 0; - - venus_hfi_for_each_subcache(core, sinfo) { - if (!strcmp("vidsc0", sinfo->name)) { - sinfo->subcache = llcc_slice_getd(LLCC_VIDSC0); - } else if (!strcmp("vidsc1", sinfo->name)) { - sinfo->subcache = llcc_slice_getd(LLCC_VIDSC1); - } else if (!strcmp("vidscfw", sinfo->name)) { - sinfo->subcache = llcc_slice_getd(LLCC_VIDFW); - }else if (!strcmp("vidvsp", sinfo->name)) { -#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5,15,0)) - sinfo->subcache = llcc_slice_getd(LLCC_VIDVSP); -#endif - } else { - d_vpr_e("Invalid subcache name %s\n", - sinfo->name); - } - if (IS_ERR_OR_NULL(sinfo->subcache)) { - rc = PTR_ERR(sinfo->subcache) ? - PTR_ERR(sinfo->subcache) : -EBADHANDLE; - d_vpr_e("init_subcaches: invalid subcache: %s rc %d\n", - sinfo->name, rc); - sinfo->subcache = NULL; - goto err_subcache_get; - } - d_vpr_h("init_subcaches: %s\n", sinfo->name); - } - - return 0; - -err_subcache_get: - __deinit_subcaches(core); - return rc; -} - static int __disable_subcaches(struct msm_vidc_core *core) { struct subcache_info *sinfo; @@ -668,16 +866,16 @@ static int __disable_subcaches(struct msm_vidc_core *core) /* De-activate subcaches */ venus_hfi_for_each_subcache_reverse(core, sinfo) { - if (sinfo->isactive) { - d_vpr_h("De-activate subcache %s\n", - sinfo->name); - rc = llcc_slice_deactivate(sinfo->subcache); - if (rc) { - d_vpr_e("Failed to de-activate %s: %d\n", - sinfo->name, rc); - } - sinfo->isactive = false; + if (!sinfo->isactive) + continue; + + d_vpr_h("%s: De-activate subcache %s\n", __func__, sinfo->name); + rc = llcc_slice_deactivate(sinfo->subcache); + if (rc) { + d_vpr_e("Failed to de-activate %s: %d\n", + sinfo->name, rc); } + sinfo->isactive = false; } return 0; @@ -730,14 +928,14 @@ static int __vote_bandwidth(struct bus_info *bus, unsigned long bw_kbps) { int rc = 0; - if (!bus->path) { + if (!bus->icc) { d_vpr_e("%s: invalid bus\n", __func__); return -EINVAL; } d_vpr_p("Voting bus %s to ab %lu kBps\n", bus->name, bw_kbps); - rc = icc_set_bw(bus->path, bw_kbps, 0); + rc = icc_set_bw(bus->icc, bw_kbps, 0); if (rc) d_vpr_e("Failed voting bus %s to ab %lu, rc=%d\n", bus->name, bw_kbps, rc); @@ -782,7 +980,7 @@ static int __vote_buses(struct msm_vidc_core *core, } venus_hfi_for_each_bus(core, bus) { - if (bus && bus->path) { + if (bus && bus->icc) { type = get_type_frm_name(bus->name); if (type == DDR) { @@ -792,14 +990,14 @@ static int __vote_buses(struct msm_vidc_core *core, bw_kbps = bw_llcc; bw_prev = core->power.bw_llcc; } else { - bw_kbps = bus->range[1]; + bw_kbps = bus->max_kbps; bw_prev = core->power.bw_ddr ? bw_kbps : 0; } /* ensure freq is within limits */ bw_kbps = clamp_t(typeof(bw_kbps), bw_kbps, - bus->range[0], bus->range[1]); + bus->min_kbps, bus->max_kbps); if (TRIVIAL_BW_CHANGE(bw_kbps, bw_prev) && bw_prev) { d_vpr_l("Skip voting bus %s to %lu kBps\n", @@ -839,12 +1037,12 @@ static int __set_clk_rate(struct msm_vidc_core *core, struct clock_info *cl, struct mmrm_client *client; /* not registered */ - if (!core || !cl || !core->capabilities) { + if (!core || !cl || !core->platform) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - if (core->capabilities[MMRM].value && !cl->mmrm_client) { + if (is_mmrm_supported(core) && !cl->mmrm_client) { d_vpr_e("%s: invalid mmrm client\n", __func__); return -EINVAL; } @@ -863,7 +1061,7 @@ static int __set_clk_rate(struct msm_vidc_core *core, struct clock_info *cl, d_vpr_p("Scaling clock %s to %llu, prev %llu\n", cl->name, rate, cl->prev); - if (core->capabilities[MMRM].value) { + if (is_mmrm_supported(core)) { /* set clock rate to mmrm driver */ client = cl->mmrm_client; memset(&client_data, 0, sizeof(client_data)); @@ -1042,71 +1240,118 @@ static int __prepare_enable_clock(struct msm_vidc_core *core, static int __init_resources(struct msm_vidc_core *core) { - int i, rc = 0; + int rc = 0; - rc = __init_regulators(core); - if (rc) { - d_vpr_e("Failed to get all regulators\n"); - return -ENODEV; - } + rc = __init_register_base(core); + if (rc) + return rc; - rc = __init_clocks(core); - if (rc) { - d_vpr_e("Failed to init clocks\n"); - rc = -ENODEV; - goto err_init_clocks; - } - - rc = __register_mmrm(core); - if (rc) { - d_vpr_e("Failed to register mmrm\n"); - rc = -ENODEV; - goto err_init_mmrm; - } - - for (i = 0; i < core->dt->reset_set.count; i++) { - rc = __handle_reset_clk(core, i, INIT); - if (rc) { - d_vpr_e("Failed to init reset clocks\n"); - rc = -ENODEV; - goto err_init_reset_clk; - } - } + rc = __init_irq(core); + if (rc) + return rc; rc = __init_bus(core); - if (rc) { - d_vpr_e("Failed to init bus: %d\n", rc); - goto err_init_bus; - } + if (rc) + return rc; + + rc = __init_regulators(core); + if (rc) + return rc; + + rc = __init_clocks(core); + if (rc) + return rc; + + rc = __init_reset_clocks(core); + if (rc) + return rc; rc = __init_subcaches(core); if (rc) - d_vpr_e("Failed to init subcaches: %d\n", rc); + return rc; - return rc; + rc = __init_freq_table(core); + if (rc) + return rc; + + rc = __init_context_banks(core); + if (rc) + return rc; + + rc = __register_mmrm(core); + if (rc) + return rc; -err_init_reset_clk: -err_init_bus: - __deregister_mmrm(core); -err_init_mmrm: - __deinit_clocks(core); -err_init_clocks: - __deinit_regulators(core); return rc; } -static void __deinit_resources(struct msm_vidc_core *core) +static int __reset_control_deassert(struct msm_vidc_core *core) { - __deinit_subcaches(core); - __deinit_bus(core); - __deregister_mmrm(core); - __deinit_clocks(core); - __deinit_regulators(core); + struct reset_info *rcinfo = NULL; + int rc = 0; + + venus_hfi_for_each_reset_clock(core, rcinfo) { + rc = reset_control_deassert(rcinfo->rst); + if (rc) { + d_vpr_e("%s: deassert reset control failed. rc = %d\n", __func__, rc); + continue; + } + d_vpr_h("%s: deassert reset control %s\n", __func__, rcinfo->name); + } + + return rc; +} + +static int __reset_control_assert(struct msm_vidc_core *core) +{ + struct reset_info *rcinfo = NULL; + int rc = 0, cnt = 0; + + venus_hfi_for_each_reset_clock(core, rcinfo) { + if (!rcinfo->rst) { + d_vpr_e("%s: invalid reset clock %s\n", + __func__, rcinfo->name); + return -EINVAL; + } + rc = reset_control_assert(rcinfo->rst); + if (rc) { + d_vpr_e("%s: failed to assert reset control %s, rc = %d\n", + __func__, rcinfo->name, rc); + goto deassert_reset_control; + } + cnt++; + d_vpr_h("%s: assert reset control %s, count %d\n", __func__, rcinfo->name, cnt); + + usleep_range(1000, 1100); + } + + return rc; +deassert_reset_control: + venus_hfi_for_each_reset_clock_reverse_continue(core, rcinfo, cnt) { + d_vpr_e("%s: deassert reset control %s\n", __func__, rcinfo->name); + reset_control_deassert(rcinfo->rst); + } + + return rc; +} + +static int __reset_ahb2axi_bridge(struct msm_vidc_core *core) +{ + int rc = 0; + + rc = __reset_control_assert(core); + if (rc) + return rc; + + rc = __reset_control_deassert(core); + if (rc) + return rc; + + return rc; } static const struct msm_vidc_resources_ops res_ops = { - .get = __init_resources, - .put = __deinit_resources, + .init = __init_resources, .reset_bridge = __reset_ahb2axi_bridge, .gdsc_on = __enable_regulator, .gdsc_off = __disable_regulator, diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index 44561e90f7..f1e7529f90 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -12,6 +12,7 @@ #include #include #include +#include #include #include "venus_hfi.h" @@ -63,11 +64,6 @@ bool __core_in_valid_state(struct msm_vidc_core *core) return core->state != MSM_VIDC_CORE_DEINIT; } -static bool is_sys_cache_present(struct msm_vidc_core *core) -{ - return core->dt->sys_cache_present; -} - static bool __valdiate_session(struct msm_vidc_core *core, struct msm_vidc_inst *inst, const char *func) { @@ -394,7 +390,7 @@ static int __release_subcaches(struct msm_vidc_core *core) if (msm_vidc_syscache_disable || !is_sys_cache_present(core)) return 0; - if (!core->dt->sys_cache_res_set) { + if (!core->resource->subcache_set.set_to_fw) { d_vpr_h("Subcaches not set to Venus\n"); return 0; } @@ -409,22 +405,23 @@ static int __release_subcaches(struct msm_vidc_core *core) buf.flags = HFI_BUF_HOST_FLAG_RELEASE; venus_hfi_for_each_subcache_reverse(core, sinfo) { - if (sinfo->isactive) { - buf.index = sinfo->subcache->slice_id; - buf.buffer_size = sinfo->subcache->slice_size; + if (!sinfo->isactive) + continue; - rc = hfi_create_packet(core->packet, - core->packet_size, - HFI_CMD_BUFFER, - HFI_BUF_HOST_FLAG_NONE, - HFI_PAYLOAD_STRUCTURE, - HFI_PORT_NONE, - core->packet_id++, - &buf, - sizeof(buf)); - if (rc) - return rc; - } + buf.index = sinfo->subcache->slice_id; + buf.buffer_size = sinfo->subcache->slice_size; + + rc = hfi_create_packet(core->packet, + core->packet_size, + HFI_CMD_BUFFER, + HFI_BUF_HOST_FLAG_NONE, + HFI_PAYLOAD_STRUCTURE, + HFI_PORT_NONE, + core->packet_id++, + &buf, + sizeof(buf)); + if (rc) + return rc; } /* Set resource to Venus for activated subcaches */ @@ -433,15 +430,14 @@ static int __release_subcaches(struct msm_vidc_core *core) return rc; venus_hfi_for_each_subcache_reverse(core, sinfo) { - if (sinfo->isactive) { - sinfo->isset = false; - d_vpr_h("Release Subcache id %d size %lu done\n", - sinfo->subcache->slice_id, - sinfo->subcache->slice_size); - } - } + if (!sinfo->isactive) + continue; - core->dt->sys_cache_res_set = false; + d_vpr_h("%s: release Subcache id %d size %lu done\n", + __func__, sinfo->subcache->slice_id, + sinfo->subcache->slice_size); + } + core->resource->subcache_set.set_to_fw = false; return 0; } @@ -458,7 +454,7 @@ static int __set_subcaches(struct msm_vidc_core *core) return 0; } - if (core->dt->sys_cache_res_set) { + if (core->resource->subcache_set.set_to_fw) { d_vpr_h("Subcaches already set to Venus\n"); return 0; } @@ -473,22 +469,22 @@ static int __set_subcaches(struct msm_vidc_core *core) buf.flags = HFI_BUF_HOST_FLAG_NONE; venus_hfi_for_each_subcache(core, sinfo) { - if (sinfo->isactive) { - buf.index = sinfo->subcache->slice_id; - buf.buffer_size = sinfo->subcache->slice_size; + if (!sinfo->isactive) + continue; + buf.index = sinfo->subcache->slice_id; + buf.buffer_size = sinfo->subcache->slice_size; - rc = hfi_create_packet(core->packet, - core->packet_size, - HFI_CMD_BUFFER, - HFI_BUF_HOST_FLAG_NONE, - HFI_PAYLOAD_STRUCTURE, - HFI_PORT_NONE, - core->packet_id++, - &buf, - sizeof(buf)); - if (rc) - goto err_fail_set_subacaches; - } + rc = hfi_create_packet(core->packet, + core->packet_size, + HFI_CMD_BUFFER, + HFI_BUF_HOST_FLAG_NONE, + HFI_PAYLOAD_STRUCTURE, + HFI_PORT_NONE, + core->packet_id++, + &buf, + sizeof(buf)); + if (rc) + goto err_fail_set_subacaches; } /* Set resource to Venus for activated subcaches */ @@ -497,15 +493,13 @@ static int __set_subcaches(struct msm_vidc_core *core) goto err_fail_set_subacaches; venus_hfi_for_each_subcache(core, sinfo) { - if (sinfo->isactive) { - sinfo->isset = true; - d_vpr_h("Set Subcache id %d size %lu done\n", - sinfo->subcache->slice_id, - sinfo->subcache->slice_size); - } + if (!sinfo->isactive) + continue; + d_vpr_h("%s: set Subcache id %d size %lu done\n", + __func__, sinfo->subcache->slice_id, + sinfo->subcache->slice_size); } - - core->dt->sys_cache_res_set = true; + core->resource->subcache_set.set_to_fw = true; return 0; @@ -699,16 +693,10 @@ int __load_fw(struct msm_vidc_core *core) core->cpu_watchdog = false; trace_msm_v4l2_vidc_fw_load("START"); - rc = res_ops->get(core); - if (rc) { - d_vpr_e("%s: Failed to get resources: %d\n", __func__, rc); - goto fail_init_res; - } - rc = __venus_power_on(core); if (rc) { d_vpr_e("%s: power on failed\n", __func__); - goto fail_venus_power_on; + goto fail_power; } rc = fw_load(core); @@ -727,25 +715,21 @@ int __load_fw(struct msm_vidc_core *core) return rc; fail_load_fw: __venus_power_off(core); -fail_venus_power_on: - res_ops->put(core); -fail_init_res: +fail_power: trace_msm_v4l2_vidc_fw_load("END"); return rc; } void __unload_fw(struct msm_vidc_core *core) { - const struct msm_vidc_resources_ops *res_ops = core->res_ops; int rc = 0; - if (!core->dt->fw_cookie) + if (!core->resource->fw_cookie) return; cancel_delayed_work(&core->pm_work); rc = fw_unload(core); __venus_power_off(core); - res_ops->put(core); core->cpu_watchdog = false; From ca9cc59d288747b13a5840be67f694cd6b335a71 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Wed, 12 Oct 2022 19:08:27 +0530 Subject: [PATCH 0739/1061] video: driver: add additional platform_data support Add additional platform_data support for waipio, pineapple, kalama, anorak targets. Change-Id: I2def953c88eb4ba41de270bf208da112d4e547bf Signed-off-by: Govindaraj Rajagopal --- driver/platform/anorak/src/msm_vidc_anorak.c | 83 +++++++++++++++++- .../pineapple/src/msm_vidc_pineapple.c | 82 +++++++++++++++++- driver/platform/waipio/inc/msm_vidc_waipio.h | 7 ++ driver/platform/waipio/src/msm_vidc_waipio.c | 85 ++++++++++++++++++- .../variant/iris2/src/msm_vidc_buffer_iris2.c | 3 +- driver/variant/iris2/src/msm_vidc_iris2.c | 11 ++- .../variant/iris2/src/msm_vidc_power_iris2.c | 3 +- .../iris33/src/msm_vidc_buffer_iris33.c | 1 - driver/variant/iris33/src/msm_vidc_iris33.c | 11 ++- .../iris33/src/msm_vidc_power_iris33.c | 21 +++-- driver/vidc/inc/venus_hfi.h | 1 - driver/vidc/src/msm_vdec.c | 1 - driver/vidc/src/msm_venc.c | 1 - driver/vidc/src/msm_vidc_control_ext.c | 1 - 14 files changed, 275 insertions(+), 36 deletions(-) diff --git a/driver/platform/anorak/src/msm_vidc_anorak.c b/driver/platform/anorak/src/msm_vidc_anorak.c index 9b9308112d..32f9c5d943 100644 --- a/driver/platform/anorak/src/msm_vidc_anorak.c +++ b/driver/platform/anorak/src/msm_vidc_anorak.c @@ -4,8 +4,13 @@ * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved. */ +#include +#include + +#include #include +#include #include "msm_vidc_anorak.h" #include "msm_vidc_platform.h" #include "msm_vidc_debug.h" @@ -81,7 +86,6 @@ static struct msm_platform_core_capability core_data_anorak[] = { {AV_SYNC_WINDOW_SIZE, 40}, {NON_FATAL_FAULTS, 1}, {ENC_AUTO_FRAMERATE, 1}, - {MMRM, 0}, {DEVICE_CAPS, V4L2_CAP_VIDEO_M2M_MPLANE | V4L2_CAP_META_CAPTURE | V4L2_CAP_STREAMING}, {SUPPORTS_REQUESTS, 1}, @@ -2415,7 +2419,84 @@ static struct msm_vidc_ubwc_config_data ubwc_config_anorak[] = { UBWC_CONFIG(8, 32, 16, 0, 1, 1, 1), }; +/* name, min_kbps, max_kbps */ +static const struct bw_table anorak_bw_table[] = { + { "venus-cnoc", 1000, 1000 }, + { "venus-ddr", 1000, 15000000 }, + { "venus-llcc", 1000, 15000000 }, +}; + +/* name, hw_trigger */ +static const struct regulator_table anorak_regulator_table[] = { + { "iris-ctl", 0 }, + { "vcodec", 1 }, +}; + +/* name, clock id, scaling */ +static const struct clk_table anorak_clk_table[] = { + { "gcc_video_axi0", GCC_VIDEO_AXI0_CLK, 0 }, + { "core_clk", VIDEO_CC_MVS0C_CLK, 0 }, + { "vcodec_clk", VIDEO_CC_MVS0_CLK, 0 }, + { "video_cc_mvs0_clk_src", VIDEO_CC_MVS0_CLK_SRC, 1 }, +}; + +/* name */ +static const struct clk_rst_table anorak_clk_reset_table[] = { + { "video_axi_reset" }, +}; + +/* name, llcc_id */ +static const struct subcache_table anorak_subcache_table[] = { + { "vidsc0", LLCC_VIDSC0 }, + { "vidvsp", LLCC_VIDVSP }, +}; + +/* name, start, size, secure, dma_coherant, region */ +const struct context_bank_table anorak_context_bank_table[] = { + {"qcom,vidc,cb-ns", 0x25800000, 0xba800000, 0, 1, MSM_VIDC_NON_SECURE }, + {"qcom,vidc,cb-ns-pxl", 0x00100000, 0xdff00000, 0, 1, MSM_VIDC_NON_SECURE_PIXEL }, + {"qcom,vidc,cb-sec-pxl", 0x00500000, 0xdfb00000, 1, 0, MSM_VIDC_SECURE_PIXEL }, + {"qcom,vidc,cb-sec-non-pxl", 0x01000000, 0x24800000, 1, 0, MSM_VIDC_SECURE_NONPIXEL }, + {"qcom,vidc,cb-sec-bitstream", 0x00500000, 0xdfb00000, 1, 0, MSM_VIDC_SECURE_BITSTREAM }, +}; + +/* freq */ +static struct freq_table anorak_freq_table[] = { + {533000000}, {444000000}, {366000000}, {338000000}, {240000000} +}; + +/* register, value, mask */ +static const struct reg_preset_table anorak_reg_preset_table[] = { + { 0xB0088, 0x0, 0x11 }, +}; + static const struct msm_vidc_platform_data anorak_data = { + /* resources dependent on other module */ + .bw_tbl = anorak_bw_table, + .bw_tbl_size = ARRAY_SIZE(anorak_bw_table), + .regulator_tbl = anorak_regulator_table, + .regulator_tbl_size = ARRAY_SIZE(anorak_regulator_table), + .clk_tbl = anorak_clk_table, + .clk_tbl_size = ARRAY_SIZE(anorak_clk_table), + .clk_rst_tbl = anorak_clk_reset_table, + .clk_rst_tbl_size = ARRAY_SIZE(anorak_clk_reset_table), + .subcache_tbl = anorak_subcache_table, + .subcache_tbl_size = ARRAY_SIZE(anorak_subcache_table), + + /* populate context bank */ + .context_bank_tbl = anorak_context_bank_table, + .context_bank_tbl_size = ARRAY_SIZE(anorak_context_bank_table), + + /* platform specific resources */ + .freq_tbl = anorak_freq_table, + .freq_tbl_size = ARRAY_SIZE(anorak_freq_table), + .reg_prst_tbl = anorak_reg_preset_table, + .reg_prst_tbl_size = ARRAY_SIZE(anorak_reg_preset_table), + .fwname = "vpu33_4v", + .pas_id = 9, + .supports_mmrm = 0, + + /* caps related resorces */ .core_data = core_data_anorak, .core_data_size = ARRAY_SIZE(core_data_anorak), .inst_cap_data = instance_cap_data_anorak, diff --git a/driver/platform/pineapple/src/msm_vidc_pineapple.c b/driver/platform/pineapple/src/msm_vidc_pineapple.c index 64a63df395..bf86f88a97 100644 --- a/driver/platform/pineapple/src/msm_vidc_pineapple.c +++ b/driver/platform/pineapple/src/msm_vidc_pineapple.c @@ -4,6 +4,10 @@ * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. */ +#include +#include + +#include #include #include @@ -315,7 +319,6 @@ static struct msm_platform_core_capability core_data_pineapple[] = { {AV_SYNC_WINDOW_SIZE, 40}, {NON_FATAL_FAULTS, 1}, {ENC_AUTO_FRAMERATE, 1}, - {MMRM, 1}, {DEVICE_CAPS, V4L2_CAP_VIDEO_M2M_MPLANE | V4L2_CAP_META_CAPTURE | V4L2_CAP_STREAMING}, {SUPPORTS_REQUESTS, 1}, @@ -2626,7 +2629,84 @@ static struct msm_vidc_format_capability format_data_pineapple = { .matrix_coeff_info_size = ARRAY_SIZE(matrix_coeff_data_pineapple), }; +/* name, min_kbps, max_kbps */ +static const struct bw_table pineapple_bw_table[] = { + { "venus-cnoc", 1000, 1000 }, + { "venus-ddr", 1000, 15000000 }, + { "venus-llcc", 1000, 15000000 }, +}; + +/* name, hw_trigger */ +static const struct regulator_table pineapple_regulator_table[] = { + { "iris-ctl", 0 }, + { "vcodec", 1 }, +}; + +/* name, clock id, scaling */ +static const struct clk_table pineapple_clk_table[] = { + { "gcc_video_axi0", GCC_VIDEO_AXI0_CLK, 0 }, + { "core_clk", VIDEO_CC_MVS0C_CLK, 0 }, + { "vcodec_clk", VIDEO_CC_MVS0_CLK, 0 }, + { "video_cc_mvs0_clk_src", VIDEO_CC_MVS0_CLK_SRC, 1 }, +}; + +/* name */ +static const struct clk_rst_table pineapple_clk_reset_table[] = { + { "video_axi_reset" }, + { "video_core_reset" }, +}; + +/* name, llcc_id */ +static const struct subcache_table pineapple_subcache_table[] = { + { "vidsc0", LLCC_VIDSC0 }, +}; + +/* name, start, size, secure, dma_coherant */ +const struct context_bank_table pineapple_context_bank_table[] = { + {"qcom,vidc,cb-ns", 0x25800000, 0xba800000, 0, 1, MSM_VIDC_NON_SECURE }, + {"qcom,vidc,cb-ns-pxl", 0x00100000, 0xdff00000, 0, 1, MSM_VIDC_NON_SECURE_PIXEL }, + {"qcom,vidc,cb-sec-pxl", 0x00500000, 0xdfb00000, 1, 0, MSM_VIDC_SECURE_PIXEL }, + {"qcom,vidc,cb-sec-non-pxl", 0x01000000, 0x24800000, 1, 0, MSM_VIDC_SECURE_NONPIXEL }, + {"qcom,vidc,cb-sec-bitstream", 0x00500000, 0xdfb00000, 1, 0, MSM_VIDC_SECURE_BITSTREAM }, +}; + +/* freq */ +static struct freq_table pineapple_freq_table[] = { + {480000000}, {435000000}, {380000000}, {280000000} +}; + +/* register, value, mask */ +static const struct reg_preset_table pineapple_reg_preset_table[] = { + { 0xB0088, 0x0, 0x11 }, +}; + static const struct msm_vidc_platform_data pineapple_data = { + /* resources dependent on other module */ + .bw_tbl = pineapple_bw_table, + .bw_tbl_size = ARRAY_SIZE(pineapple_bw_table), + .regulator_tbl = pineapple_regulator_table, + .regulator_tbl_size = ARRAY_SIZE(pineapple_regulator_table), + .clk_tbl = pineapple_clk_table, + .clk_tbl_size = ARRAY_SIZE(pineapple_clk_table), + .clk_rst_tbl = pineapple_clk_reset_table, + .clk_rst_tbl_size = ARRAY_SIZE(pineapple_clk_reset_table), + .subcache_tbl = pineapple_subcache_table, + .subcache_tbl_size = ARRAY_SIZE(pineapple_subcache_table), + + /* populate context bank */ + .context_bank_tbl = pineapple_context_bank_table, + .context_bank_tbl_size = ARRAY_SIZE(pineapple_context_bank_table), + + /* platform specific resources */ + .freq_tbl = pineapple_freq_table, + .freq_tbl_size = ARRAY_SIZE(pineapple_freq_table), + .reg_prst_tbl = pineapple_reg_preset_table, + .reg_prst_tbl_size = ARRAY_SIZE(pineapple_reg_preset_table), + .fwname = "vpu33_4v", + .pas_id = 9, + .supports_mmrm = 0, + + /* caps related resorces */ .core_data = core_data_pineapple, .core_data_size = ARRAY_SIZE(core_data_pineapple), .inst_cap_data = instance_cap_data_pineapple, diff --git a/driver/platform/waipio/inc/msm_vidc_waipio.h b/driver/platform/waipio/inc/msm_vidc_waipio.h index bfea9a97e3..c40fcde3cb 100644 --- a/driver/platform/waipio/inc/msm_vidc_waipio.h +++ b/driver/platform/waipio/inc/msm_vidc_waipio.h @@ -12,9 +12,16 @@ #endif #if defined(CONFIG_MSM_VIDC_WAIPIO) +struct context_bank_info *msm_vidc_context_bank(struct msm_vidc_core *core, + enum msm_vidc_buffer_region region); int msm_vidc_init_platform_waipio(struct msm_vidc_core *core, struct device *dev); int msm_vidc_deinit_platform_waipio(struct msm_vidc_core *core, struct device *dev); #else +struct context_bank_info *msm_vidc_context_bank(struct msm_vidc_core *core, + enum msm_vidc_buffer_region region) +{ + return NULL; +} int msm_vidc_init_platform_waipio(struct msm_vidc_core *core, struct device *dev) { return -EINVAL; diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 607fe37ba0..b4257de3b5 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -4,8 +4,13 @@ * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. */ -#include +#include +#include +#include +#include + +#include #include "msm_vidc_waipio.h" #include "msm_vidc_platform.h" #include "msm_vidc_debug.h" @@ -78,7 +83,6 @@ static struct msm_platform_core_capability core_data_waipio[] = { {AV_SYNC_WINDOW_SIZE, 40}, {NON_FATAL_FAULTS, 1}, {ENC_AUTO_FRAMERATE, 1}, - {MMRM, 1}, {DEVICE_CAPS, V4L2_CAP_VIDEO_M2M_MPLANE | V4L2_CAP_META_CAPTURE | V4L2_CAP_STREAMING}, {SUPPORTS_REQUESTS, 1}, @@ -2169,7 +2173,84 @@ static struct msm_vidc_ubwc_config_data ubwc_config_waipio[] = { UBWC_CONFIG(8, 32, 16, 0, 1, 1, 1), }; +/* name, min_kbps, max_kbps */ +static const struct bw_table waipio_bw_table[] = { + { "venus-cnoc", 1000, 1000 }, + { "venus-ddr", 1000, 15000000 }, + { "venus-llcc", 1000, 15000000 }, +}; + +/* name, hw_trigger */ +static const struct regulator_table waipio_regulator_table[] = { + { "iris-ctl", 0 }, + { "vcodec", 1 }, +}; + +/* name, clock id, scaling */ +static const struct clk_table waipio_clk_table[] = { + { "gcc_video_axi0", GCC_VIDEO_AXI0_CLK, 0 }, + { "core_clk", VIDEO_CC_MVS0C_CLK, 0 }, + { "vcodec_clk", VIDEO_CC_MVS0_CLK, 0 }, + { "video_cc_mvs0_clk_src", VIDEO_CC_MVS0_CLK_SRC, 1 }, +}; + +/* name */ +static const struct clk_rst_table waipio_clk_reset_table[] = { + { "video_axi_reset" }, + { "video_core_reset" }, +}; + +/* name, llcc_id */ +static const struct subcache_table waipio_subcache_table[] = { + { "vidsc0", LLCC_VIDSC0 }, +}; + +/* name, start, size, secure, dma_coherant */ +const struct context_bank_table waipio_context_bank_table[] = { + {"qcom,vidc,cb-ns", 0x25800000, 0xba800000, 0, 1, MSM_VIDC_NON_SECURE }, + {"qcom,vidc,cb-ns-pxl", 0x00100000, 0xdff00000, 0, 1, MSM_VIDC_NON_SECURE_PIXEL }, + {"qcom,vidc,cb-sec-pxl", 0x00500000, 0xdfb00000, 1, 0, MSM_VIDC_SECURE_PIXEL }, + {"qcom,vidc,cb-sec-non-pxl", 0x01000000, 0x24800000, 1, 0, MSM_VIDC_SECURE_NONPIXEL }, + {"qcom,vidc,cb-sec-bitstream", 0x00500000, 0xdfb00000, 1, 0, MSM_VIDC_SECURE_BITSTREAM }, +}; + +/* freq */ +static struct freq_table waipio_freq_table[] = { + {444000000}, {366000000}, {338000000}, {239999999} +}; + +/* register, value, mask */ +static const struct reg_preset_table waipio_reg_preset_table[] = { + { 0xB0088, 0x0, 0x11 }, +}; + static const struct msm_vidc_platform_data waipio_data = { + /* resources dependent on other module */ + .bw_tbl = waipio_bw_table, + .bw_tbl_size = ARRAY_SIZE(waipio_bw_table), + .regulator_tbl = waipio_regulator_table, + .regulator_tbl_size = ARRAY_SIZE(waipio_regulator_table), + .clk_tbl = waipio_clk_table, + .clk_tbl_size = ARRAY_SIZE(waipio_clk_table), + .clk_rst_tbl = waipio_clk_reset_table, + .clk_rst_tbl_size = ARRAY_SIZE(waipio_clk_reset_table), + .subcache_tbl = waipio_subcache_table, + .subcache_tbl_size = ARRAY_SIZE(waipio_subcache_table), + + /* populate context bank */ + .context_bank_tbl = waipio_context_bank_table, + .context_bank_tbl_size = ARRAY_SIZE(waipio_context_bank_table), + + /* platform specific resources */ + .freq_tbl = waipio_freq_table, + .freq_tbl_size = ARRAY_SIZE(waipio_freq_table), + .reg_prst_tbl = waipio_reg_preset_table, + .reg_prst_tbl_size = ARRAY_SIZE(waipio_reg_preset_table), + .fwname = "vpu20_4v", + .pas_id = 9, + .supports_mmrm = 0, + + /* caps related resorces */ .core_data = core_data_waipio, .core_data_size = ARRAY_SIZE(core_data_waipio), .inst_cap_data = instance_cap_data_waipio, diff --git a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c index bae3504453..639f136f39 100644 --- a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c @@ -9,7 +9,6 @@ #include "msm_vidc_buffer.h" #include "msm_vidc_inst.h" #include "msm_vidc_core.h" -#include "msm_vidc_platform.h" #include "msm_vidc_driver.h" #include "msm_vidc_debug.h" #include "msm_media_info.h" @@ -203,7 +202,7 @@ static u32 msm_vidc_decoder_dpb_size_iris2(struct msm_vidc_inst *inst) { u32 size = 0; - u32 color_fmt, v4l2_fmt; + u32 color_fmt; u32 width, height; struct v4l2_format *f; diff --git a/driver/variant/iris2/src/msm_vidc_iris2.c b/driver/variant/iris2/src/msm_vidc_iris2.c index 51434d9d85..102b56346c 100644 --- a/driver/variant/iris2/src/msm_vidc_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_iris2.c @@ -10,7 +10,6 @@ #include "msm_vidc_core.h" #include "msm_vidc_driver.h" #include "msm_vidc_control.h" -#include "msm_vidc_dt.h" #include "msm_vidc_internal.h" #include "msm_vidc_buffer.h" #include "msm_vidc_debug.h" @@ -442,7 +441,7 @@ static int __power_off_iris2(struct msm_vidc_core *core) d_vpr_e("%s: failed to unvote buses\n", __func__); if (!(core->intr_status & WRAPPER_INTR_STATUS_A2HWD_BMSK_IRIS2)) - disable_irq_nosync(core->dt->irq); + disable_irq_nosync(core->resource->irq); core->intr_status = 0; core->power_enabled = false; @@ -506,7 +505,7 @@ fail_regulator: static int __power_on_iris2(struct msm_vidc_core *core) { const struct msm_vidc_resources_ops *res_ops = core->res_ops; - struct allowed_clock_rates_table *clk_tbl; + struct frequency_table *freq_tbl; u32 freq = 0; int rc = 0; @@ -534,9 +533,9 @@ static int __power_on_iris2(struct msm_vidc_core *core) /* video controller and hardware powered on successfully */ core->power_enabled = true; - clk_tbl = core->dt->allowed_clks_tbl; + freq_tbl = core->resource->freq_set.freq_tbl; freq = core->power.clk_freq ? core->power.clk_freq : - clk_tbl[0].clock_rate; + freq_tbl[0].freq; rc = res_ops->set_clks(core, freq); if (rc) { @@ -554,7 +553,7 @@ static int __power_on_iris2(struct msm_vidc_core *core) __interrupt_init_iris2(core); core->intr_status = 0; - enable_irq(core->dt->irq); + enable_irq(core->resource->irq); return rc; diff --git a/driver/variant/iris2/src/msm_vidc_power_iris2.c b/driver/variant/iris2/src/msm_vidc_power_iris2.c index 6b33cfc2a3..badec882bf 100644 --- a/driver/variant/iris2/src/msm_vidc_power_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_power_iris2.c @@ -8,7 +8,6 @@ #include "msm_vidc_core.h" #include "msm_vidc_driver.h" #include "msm_vidc_debug.h" -#include "msm_vidc_dt.h" u64 msm_vidc_calc_freq_iris2(struct msm_vidc_inst *inst, u32 data_size) { @@ -28,7 +27,7 @@ u64 msm_vidc_calc_freq_iris2(struct msm_vidc_inst *inst, u32 data_size) } core = inst->core; - if (!core->dt) { + if (!core->resource) { d_vpr_e("%s: invalid params\n", __func__); return freq; } diff --git a/driver/variant/iris33/src/msm_vidc_buffer_iris33.c b/driver/variant/iris33/src/msm_vidc_buffer_iris33.c index d1c95157b7..931fe85255 100644 --- a/driver/variant/iris33/src/msm_vidc_buffer_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_buffer_iris33.c @@ -10,7 +10,6 @@ #include "msm_vidc_buffer.h" #include "msm_vidc_inst.h" #include "msm_vidc_core.h" -#include "msm_vidc_platform.h" #include "msm_vidc_driver.h" #include "msm_vidc_debug.h" #include "msm_media_info.h" diff --git a/driver/variant/iris33/src/msm_vidc_iris33.c b/driver/variant/iris33/src/msm_vidc_iris33.c index 5c8aeead12..0c01f43b09 100644 --- a/driver/variant/iris33/src/msm_vidc_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_iris33.c @@ -12,7 +12,6 @@ #include "msm_vidc_core.h" #include "msm_vidc_driver.h" #include "msm_vidc_control.h" -#include "msm_vidc_dt.h" #include "msm_vidc_internal.h" #include "msm_vidc_buffer.h" #include "msm_vidc_debug.h" @@ -548,7 +547,7 @@ static int __power_off_iris33(struct msm_vidc_core *core) d_vpr_e("%s: failed to unvote buses\n", __func__); if (!(core->intr_status & WRAPPER_INTR_STATUS_A2HWD_BMSK_IRIS33)) - disable_irq_nosync(core->dt->irq); + disable_irq_nosync(core->resource->irq); core->intr_status = 0; core->power_enabled = false; @@ -612,7 +611,7 @@ fail_regulator: static int __power_on_iris33(struct msm_vidc_core *core) { const struct msm_vidc_resources_ops *res_ops = core->res_ops; - struct allowed_clock_rates_table *clk_tbl; + struct frequency_table *freq_tbl; u32 freq = 0; int rc = 0; @@ -640,9 +639,9 @@ static int __power_on_iris33(struct msm_vidc_core *core) /* video controller and hardware powered on successfully */ core->power_enabled = true; - clk_tbl = core->dt->allowed_clks_tbl; + freq_tbl = core->resource->freq_set.freq_tbl; freq = core->power.clk_freq ? core->power.clk_freq : - clk_tbl[0].clock_rate; + freq_tbl[0].freq; rc = res_ops->set_clks(core, freq); if (rc) { @@ -657,7 +656,7 @@ static int __power_on_iris33(struct msm_vidc_core *core) __interrupt_init_iris33(core); core->intr_status = 0; - enable_irq(core->dt->irq); + enable_irq(core->resource->irq); return rc; diff --git a/driver/variant/iris33/src/msm_vidc_power_iris33.c b/driver/variant/iris33/src/msm_vidc_power_iris33.c index c905d4cbce..1136cfb3f2 100644 --- a/driver/variant/iris33/src/msm_vidc_power_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_power_iris33.c @@ -9,7 +9,6 @@ #include "msm_vidc_core.h" #include "msm_vidc_driver.h" #include "msm_vidc_debug.h" -#include "msm_vidc_dt.h" u64 msm_vidc_calc_freq_iris33(struct msm_vidc_inst *inst, u32 data_size) { @@ -27,9 +26,9 @@ u64 msm_vidc_calc_freq_iris33(struct msm_vidc_inst *inst, u32 data_size) d_vpr_e("%s: invalid params\n", __func__); return freq; } - core = inst->core; - if (!core->dt || !core->dt->allowed_clks_tbl) { + + if (!core->resource || !core->resource->freq_set.freq_tbl) { d_vpr_e("%s: invalid params\n", __func__); return freq; } @@ -151,8 +150,8 @@ u64 msm_vidc_calc_freq_iris33(struct msm_vidc_inst *inst, u32 data_size) u32 bitrate_2stage[2] = {130, 120}; u32 bitrate_1stage = 100; u32 width, height; - u32 bitrate_entry, freq_entry, frequency_table_value; - struct allowed_clock_rates_table *allowed_clks_tbl; + u32 bitrate_entry, freq_entry, freq_tbl_value; + struct frequency_table *freq_tbl; struct v4l2_format *out_f = &inst->fmts[OUTPUT_PORT]; width = out_f->fmt.pix_mp.width; @@ -165,11 +164,11 @@ u64 msm_vidc_calc_freq_iris33(struct msm_vidc_inst *inst, u32 data_size) freq_entry = bitrate_entry; - allowed_clks_tbl = core->dt->allowed_clks_tbl; - frequency_table_value = allowed_clks_tbl[freq_entry].clock_rate / 1000000; + freq_tbl = core->resource->freq_set.freq_tbl; + freq_tbl_value = freq_tbl[freq_entry].freq / 1000000; input_bitrate_mbps = fps * data_size * 8 / (1024 * 1024); - vsp_hw_min_frequency = frequency_table_value * 1000 * input_bitrate_mbps; + vsp_hw_min_frequency = freq_tbl_value * 1000 * input_bitrate_mbps; if (inst->capabilities->cap[STAGE].value == MSM_VIDC_STAGE_2) { vsp_hw_min_frequency += @@ -233,9 +232,9 @@ u64 msm_vidc_calc_freq_iris33(struct msm_vidc_inst *inst, u32 data_size) * for non-AV1 codecs limit the frequency to NOM only * index 0 is TURBO, index 1 is NOM clock rate */ - if (core->dt->allowed_clks_tbl_size >= 2 && - freq > core->dt->allowed_clks_tbl[1].clock_rate) - freq = core->dt->allowed_clks_tbl[1].clock_rate; + if (core->resource->freq_set.count >= 2 && + freq > core->resource->freq_set.freq_tbl[1].freq) + freq = core->resource->freq_set.freq_tbl[1].freq; } i_vpr_p(inst, "%s: filled len %d, required freq %llu, fps %u, mbpf %u\n", diff --git a/driver/vidc/inc/venus_hfi.h b/driver/vidc/inc/venus_hfi.h index 99058da742..650e8eb305 100644 --- a/driver/vidc/inc/venus_hfi.h +++ b/driver/vidc/inc/venus_hfi.h @@ -11,7 +11,6 @@ #include #include -#include "msm_vidc_dt.h" #include "msm_vidc_internal.h" #include "msm_vidc_inst.h" #include "msm_vidc_core.h" diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 0bde551cbf..fbd3282dd9 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -12,7 +12,6 @@ #include "msm_vidc_inst.h" #include "msm_vidc_driver.h" #include "msm_vidc_internal.h" -#include "msm_vidc_platform.h" #include "msm_vidc_control.h" #include "msm_vidc_debug.h" #include "msm_vidc_power.h" diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index 19c393a913..28dc40eafd 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -10,7 +10,6 @@ #include "msm_vidc_inst.h" #include "msm_vidc_driver.h" #include "msm_vidc_internal.h" -#include "msm_vidc_platform.h" #include "msm_vidc_control.h" #include "msm_vidc_debug.h" #include "msm_vidc_power.h" diff --git a/driver/vidc/src/msm_vidc_control_ext.c b/driver/vidc/src/msm_vidc_control_ext.c index b526f2df19..ba127cc076 100644 --- a/driver/vidc/src/msm_vidc_control_ext.c +++ b/driver/vidc/src/msm_vidc_control_ext.c @@ -12,7 +12,6 @@ #include "msm_vidc_internal.h" #include "msm_vidc_driver.h" #include "msm_venc.h" -#include "msm_vidc_platform.h" int msm_vidc_adjust_ir_period(void *instance, struct v4l2_ctrl *ctrl) { From 3560442234234715bc9411ac31b4dd4bf1cf9f06 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Mon, 10 Oct 2022 10:57:25 +0530 Subject: [PATCH 0740/1061] video: driver: add resource ops macro support Added call_res_op() macro and used at all possible places to avoid invalid pointer dereference issue. Also added changes to cleanup unused functions. Change-Id: Id77711ad9eaf7b407208567b0fde1f2693588641 Signed-off-by: Govindaraj Rajagopal --- .../platform/common/inc/msm_vidc_platform.h | 1 - .../platform/common/src/msm_vidc_platform.c | 49 ------------------- .../variant/iris2/src/msm_vidc_buffer_iris2.c | 4 +- driver/variant/iris2/src/msm_vidc_iris2.c | 47 ++++++++---------- driver/variant/iris3/src/msm_vidc_iris3.c | 43 +++++++--------- .../variant/iris3/src/msm_vidc_power_iris3.c | 3 -- driver/variant/iris33/src/msm_vidc_iris33.c | 45 ++++++++--------- .../iris33/src/msm_vidc_power_iris33.c | 3 -- driver/vidc/inc/msm_vidc_control.h | 2 - driver/vidc/inc/msm_vidc_power.h | 1 - driver/vidc/inc/resources.h | 4 ++ driver/vidc/src/msm_vdec.c | 2 - driver/vidc/src/msm_venc.c | 9 +--- driver/vidc/src/msm_vidc_driver.c | 2 - driver/vidc/src/msm_vidc_power.c | 16 +----- driver/vidc/src/msm_vidc_probe.c | 4 +- driver/vidc/src/venus_hfi.c | 38 ++++++-------- 17 files changed, 84 insertions(+), 189 deletions(-) diff --git a/driver/platform/common/inc/msm_vidc_platform.h b/driver/platform/common/inc/msm_vidc_platform.h index 66738f520a..2e0a012d14 100644 --- a/driver/platform/common/inc/msm_vidc_platform.h +++ b/driver/platform/common/inc/msm_vidc_platform.h @@ -231,6 +231,5 @@ static inline bool is_mmrm_supported(struct msm_vidc_core *core) int msm_vidc_init_platform(struct platform_device *pdev); int msm_vidc_deinit_platform(struct platform_device *pdev); -int msm_vidc_read_efuse(struct msm_vidc_core *core); #endif // _MSM_VIDC_PLATFORM_H_ diff --git a/driver/platform/common/src/msm_vidc_platform.c b/driver/platform/common/src/msm_vidc_platform.c index 169f61c04c..ea099e87f5 100644 --- a/driver/platform/common/src/msm_vidc_platform.c +++ b/driver/platform/common/src/msm_vidc_platform.c @@ -6,7 +6,6 @@ #include #include -#include #include "msm_vidc_platform.h" #include "msm_vidc_debug.h" @@ -447,51 +446,3 @@ int msm_vidc_init_platform(struct platform_device *pdev) return rc; } - -int msm_vidc_read_efuse(struct msm_vidc_core *core) -{ - int rc = 0; - void __iomem *base; - u32 i = 0, efuse = 0, efuse_data_count = 0; - struct msm_vidc_efuse_data *efuse_data = NULL; - struct msm_vidc_platform_data *platform_data; - - if (!core || !core->platform || !core->pdev) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - platform_data = &core->platform->data; - efuse_data = platform_data->efuse_data; - efuse_data_count = platform_data->efuse_data_size; - - if (!efuse_data) - return 0; - - for (i = 0; i < efuse_data_count; i++) { - switch (efuse_data[i].purpose) { - case SKU_VERSION: - base = devm_ioremap(&core->pdev->dev, efuse_data[i].start_address, - efuse_data[i].size); - if (!base) { - d_vpr_e("failed efuse: start %#x, size %d\n", - efuse_data[i].start_address, - efuse_data[i].size); - return -EINVAL; - } - efuse = readl_relaxed(base); - platform_data->sku_version = - (efuse & efuse_data[i].mask) >> - efuse_data[i].shift; - break; - default: - break; - } - if (platform_data->sku_version) { - d_vpr_h("efuse 0x%x, platform version 0x%x\n", - efuse, platform_data->sku_version); - break; - } - } - return rc; -} diff --git a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c index 639f136f39..96e4feaa78 100644 --- a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c @@ -201,9 +201,7 @@ static u32 msm_vidc_decoder_persist_size_iris2(struct msm_vidc_inst *inst) static u32 msm_vidc_decoder_dpb_size_iris2(struct msm_vidc_inst *inst) { - u32 size = 0; - u32 color_fmt; - u32 width, height; + u32 color_fmt, width, height, size = 0; struct v4l2_format *f; if (!inst) { diff --git a/driver/variant/iris2/src/msm_vidc_iris2.c b/driver/variant/iris2/src/msm_vidc_iris2.c index 102b56346c..e365d2c0c4 100644 --- a/driver/variant/iris2/src/msm_vidc_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_iris2.c @@ -249,7 +249,6 @@ static int __setup_ucregion_memory_map_iris2(struct msm_vidc_core *vidc_core) static int __power_off_iris2_hardware(struct msm_vidc_core *core) { - const struct msm_vidc_resources_ops *res_ops = core->res_ops; int rc = 0, i; u32 value = 0; @@ -322,12 +321,12 @@ static int __power_off_iris2_hardware(struct msm_vidc_core *core) disable_power: /* power down process */ - rc = res_ops->gdsc_off(core, "vcodec"); + rc = call_res_op(core, gdsc_off, core, "vcodec"); if (rc) { d_vpr_e("%s: disable regulator vcodec failed\n", __func__); rc = 0; } - rc = res_ops->clk_disable(core, "vcodec_clk"); + rc = call_res_op(core, clk_disable, core, "vcodec_clk"); if (rc) { d_vpr_e("%s: disable unprepare vcodec_clk failed\n", __func__); rc = 0; @@ -338,7 +337,6 @@ disable_power: static int __power_off_iris2_controller(struct msm_vidc_core *core) { - const struct msm_vidc_resources_ops *res_ops = core->res_ops; int rc = 0; /* @@ -381,27 +379,27 @@ static int __power_off_iris2_controller(struct msm_vidc_core *core) d_vpr_h("%s: debug bridge release failed\n", __func__); /* Turn off MVP MVS0C core clock */ - rc = res_ops->clk_disable(core, "core_clk"); + rc = call_res_op(core, clk_disable, core, "core_clk"); if (rc) { d_vpr_e("%s: disable unprepare core_clk failed\n", __func__); rc = 0; } /* Disable GCC_VIDEO_AXI0_CLK clock */ - rc = res_ops->clk_disable(core, "gcc_video_axi0"); + rc = call_res_op(core, clk_disable, core, "gcc_video_axi0"); if (rc) { d_vpr_e("%s: disable unprepare gcc_video_axi0 failed\n", __func__); rc = 0; } - rc = res_ops->reset_bridge(core); + rc = call_res_op(core, reset_bridge, core); if (rc) { d_vpr_e("%s: reset bridge failed\n", __func__); rc = 0; } /* power down process */ - rc = res_ops->gdsc_off(core, "iris-ctl"); + rc = call_res_op(core, gdsc_off, core, "iris-ctl"); if (rc) { d_vpr_e("%s: disable regulator iris-ctl failed\n", __func__); rc = 0; @@ -412,7 +410,6 @@ static int __power_off_iris2_controller(struct msm_vidc_core *core) static int __power_off_iris2(struct msm_vidc_core *core) { - const struct msm_vidc_resources_ops *res_ops = core->res_ops; int rc = 0; if (!core || !core->capabilities) { @@ -427,7 +424,7 @@ static int __power_off_iris2(struct msm_vidc_core *core) * Reset video_cc_mvs0_clk_src value to resolve MMRM high video * clock projection issue. */ - rc = res_ops->set_clks(core, 0); + rc = call_res_op(core, set_clks, core, 0); if (rc) d_vpr_e("%s: resetting clocks failed\n", __func__); @@ -437,7 +434,8 @@ static int __power_off_iris2(struct msm_vidc_core *core) if (__power_off_iris2_controller(core)) d_vpr_e("%s: failed to power off controller\n", __func__); - if (res_ops->set_bw(core, 0, 0)) + rc = call_res_op(core, set_bw, core, 0, 0); + if (rc) d_vpr_e("%s: failed to unvote buses\n", __func__); if (!(core->intr_status & WRAPPER_INTR_STATUS_A2HWD_BMSK_IRIS2)) @@ -451,60 +449,57 @@ static int __power_off_iris2(struct msm_vidc_core *core) static int __power_on_iris2_controller(struct msm_vidc_core *core) { - const struct msm_vidc_resources_ops *res_ops = core->res_ops; int rc = 0; - rc = res_ops->gdsc_on(core, "iris-ctl"); + rc = call_res_op(core, gdsc_on, core, "iris-ctl"); if (rc) goto fail_regulator; - rc = res_ops->reset_bridge(core); + rc = call_res_op(core, reset_bridge, core); if (rc) goto fail_reset_ahb2axi; - rc = res_ops->clk_enable(core, "gcc_video_axi0"); + rc = call_res_op(core, clk_enable, core, "gcc_video_axi0"); if (rc) goto fail_clk_axi; - rc = res_ops->clk_enable(core, "core_clk"); + rc = call_res_op(core, clk_enable, core, "core_clk"); if (rc) goto fail_clk_controller; return 0; fail_clk_controller: - res_ops->clk_disable(core, "gcc_video_axi0"); + call_res_op(core, clk_disable, core, "gcc_video_axi0"); fail_clk_axi: fail_reset_ahb2axi: - res_ops->gdsc_off(core, "iris-ctl"); + call_res_op(core, gdsc_off, core, "iris-ctl"); fail_regulator: return rc; } static int __power_on_iris2_hardware(struct msm_vidc_core *core) { - const struct msm_vidc_resources_ops *res_ops = core->res_ops; int rc = 0; - rc = res_ops->gdsc_on(core, "vcodec"); + rc = call_res_op(core, gdsc_on, core, "vcodec"); if (rc) goto fail_regulator; - rc = res_ops->clk_enable(core, "vcodec_clk"); + rc = call_res_op(core, clk_enable, core, "vcodec_clk"); if (rc) goto fail_clk_controller; return 0; fail_clk_controller: - res_ops->gdsc_off(core, "vcodec"); + call_res_op(core, gdsc_off, core, "vcodec"); fail_regulator: return rc; } static int __power_on_iris2(struct msm_vidc_core *core) { - const struct msm_vidc_resources_ops *res_ops = core->res_ops; struct frequency_table *freq_tbl; u32 freq = 0; int rc = 0; @@ -513,7 +508,7 @@ static int __power_on_iris2(struct msm_vidc_core *core) return 0; /* Vote for all hardware resources */ - rc = res_ops->set_bw(core, INT_MAX, INT_MAX); + rc = call_res_op(core, set_bw, core, INT_MAX, INT_MAX); if (rc) { d_vpr_e("%s: failed to vote buses, rc %d\n", __func__, rc); goto fail_vote_buses; @@ -537,7 +532,7 @@ static int __power_on_iris2(struct msm_vidc_core *core) freq = core->power.clk_freq ? core->power.clk_freq : freq_tbl[0].freq; - rc = res_ops->set_clks(core, freq); + rc = call_res_op(core, set_clks, core, freq); if (rc) { d_vpr_e("%s: failed to scale clocks\n", __func__); rc = 0; @@ -560,7 +555,7 @@ static int __power_on_iris2(struct msm_vidc_core *core) fail_power_on_hardware: __power_off_iris2_controller(core); fail_power_on_controller: - res_ops->set_bw(core, 0, 0); + call_res_op(core, set_bw, core, 0, 0); fail_vote_buses: core->power_enabled = false; return rc; diff --git a/driver/variant/iris3/src/msm_vidc_iris3.c b/driver/variant/iris3/src/msm_vidc_iris3.c index eaf023b3c5..01a09c43fa 100644 --- a/driver/variant/iris3/src/msm_vidc_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_iris3.c @@ -269,7 +269,6 @@ static bool is_iris3_hw_power_collapsed(struct msm_vidc_core *core) static int __power_off_iris3_hardware(struct msm_vidc_core *core) { - const struct msm_vidc_resources_ops *res_ops = core->res_ops; int rc = 0, i; u32 value = 0; bool pwr_collapsed = false; @@ -361,13 +360,13 @@ static int __power_off_iris3_hardware(struct msm_vidc_core *core) disable_power: /* power down process */ - rc = res_ops->gdsc_off(core, "vcodec"); + rc = call_res_op(core, gdsc_off, core, "vcodec"); if (rc) { d_vpr_e("%s: disable regulator vcodec failed\n", __func__); rc = 0; } - rc = res_ops->clk_disable(core, "vcodec_clk"); + rc = call_res_op(core, clk_disable, core, "vcodec_clk"); if (rc) { d_vpr_e("%s: disable unprepare vcodec_clk failed\n", __func__); rc = 0; @@ -378,7 +377,6 @@ disable_power: static int __power_off_iris3_controller(struct msm_vidc_core *core) { - const struct msm_vidc_resources_ops *res_ops = core->res_ops; int rc = 0; /* @@ -439,14 +437,14 @@ static int __power_off_iris3_controller(struct msm_vidc_core *core) return rc; /* Turn off MVP MVS0C core clock */ - rc = res_ops->clk_disable(core, "core_clk"); + rc = call_res_op(core, clk_disable, core, "core_clk"); if (rc) { d_vpr_e("%s: disable unprepare core_clk failed\n", __func__); rc = 0; } /* power down process */ - rc = res_ops->gdsc_off(core, "iris-ctl"); + rc = call_res_op(core, gdsc_off, core, "iris-ctl"); if (rc) { d_vpr_e("%s: disable regulator iris-ctl failed\n", __func__); rc = 0; @@ -457,7 +455,6 @@ static int __power_off_iris3_controller(struct msm_vidc_core *core) static int __power_off_iris3(struct msm_vidc_core *core) { - const struct msm_vidc_resources_ops *res_ops = core->res_ops; int rc = 0; if (!core || !core->capabilities) { @@ -472,7 +469,7 @@ static int __power_off_iris3(struct msm_vidc_core *core) * Reset video_cc_mvs0_clk_src value to resolve MMRM high video * clock projection issue. */ - rc = res_ops->set_clks(core, 0); + rc = call_res_op(core, set_clks, core, 0); if (rc) d_vpr_e("%s: resetting clocks failed\n", __func__); @@ -482,7 +479,8 @@ static int __power_off_iris3(struct msm_vidc_core *core) if (__power_off_iris3_controller(core)) d_vpr_e("%s: failed to power off controller\n", __func__); - if (res_ops->set_bw(core, 0, 0)) + rc = call_res_op(core, set_bw, core, 0, 0); + if (rc) d_vpr_e("%s: failed to unvote buses\n", __func__); if (!(core->intr_status & WRAPPER_INTR_STATUS_A2HWD_BMSK_IRIS3)) @@ -496,60 +494,57 @@ static int __power_off_iris3(struct msm_vidc_core *core) static int __power_on_iris3_controller(struct msm_vidc_core *core) { - const struct msm_vidc_resources_ops *res_ops = core->res_ops; int rc = 0; - rc = res_ops->gdsc_on(core, "iris-ctl"); + rc = call_res_op(core, gdsc_on, core, "iris-ctl"); if (rc) goto fail_regulator; - rc = res_ops->reset_bridge(core); + rc = call_res_op(core, reset_bridge, core); if (rc) goto fail_reset_ahb2axi; - rc = res_ops->clk_enable(core, "gcc_video_axi0"); + rc = call_res_op(core, clk_enable, core, "gcc_video_axi0"); if (rc) goto fail_clk_axi; - rc = res_ops->clk_enable(core, "core_clk"); + rc = call_res_op(core, clk_enable, core, "core_clk"); if (rc) goto fail_clk_controller; return 0; fail_clk_controller: - res_ops->clk_disable(core, "gcc_video_axi0"); + call_res_op(core, clk_disable, core, "gcc_video_axi0"); fail_clk_axi: fail_reset_ahb2axi: - res_ops->gdsc_off(core, "iris-ctl"); + call_res_op(core, gdsc_off, core, "iris-ctl"); fail_regulator: return rc; } static int __power_on_iris3_hardware(struct msm_vidc_core *core) { - const struct msm_vidc_resources_ops *res_ops = core->res_ops; int rc = 0; - rc = res_ops->gdsc_on(core, "vcodec"); + rc = call_res_op(core, gdsc_on, core, "vcodec"); if (rc) goto fail_regulator; - rc = res_ops->clk_enable(core, "vcodec_clk"); + rc = call_res_op(core, clk_enable, core, "vcodec_clk"); if (rc) goto fail_clk_controller; return 0; fail_clk_controller: - res_ops->gdsc_off(core, "vcodec"); + call_res_op(core, gdsc_off, core, "vcodec"); fail_regulator: return rc; } static int __power_on_iris3(struct msm_vidc_core *core) { - const struct msm_vidc_resources_ops *res_ops = core->res_ops; struct frequency_table *freq_tbl; u32 freq = 0; int rc = 0; @@ -558,7 +553,7 @@ static int __power_on_iris3(struct msm_vidc_core *core) return 0; /* Vote for all hardware resources */ - rc = res_ops->set_bw(core, INT_MAX, INT_MAX); + rc = call_res_op(core, set_bw, core, INT_MAX, INT_MAX); if (rc) { d_vpr_e("%s: failed to vote buses, rc %d\n", __func__, rc); goto fail_vote_buses; @@ -582,7 +577,7 @@ static int __power_on_iris3(struct msm_vidc_core *core) freq = core->power.clk_freq ? core->power.clk_freq : freq_tbl[0].freq; - rc = res_ops->set_clks(core, freq); + rc = call_res_op(core, set_clks, core, freq); if (rc) { d_vpr_e("%s: failed to scale clocks\n", __func__); rc = 0; @@ -602,7 +597,7 @@ static int __power_on_iris3(struct msm_vidc_core *core) fail_power_on_hardware: __power_off_iris3_controller(core); fail_power_on_controller: - res_ops->set_bw(core, 0, 0); + call_res_op(core, set_bw, core, 0, 0); fail_vote_buses: core->power_enabled = false; return rc; diff --git a/driver/variant/iris3/src/msm_vidc_power_iris3.c b/driver/variant/iris3/src/msm_vidc_power_iris3.c index 5e42551ecb..1faa08a4ae 100644 --- a/driver/variant/iris3/src/msm_vidc_power_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_power_iris3.c @@ -265,7 +265,6 @@ static u64 __calculate_decoder(struct vidc_bus_vote_data *d) /* Derived parameters */ int lcu_per_frame, collocated_bytes_per_lcu, tnbr_per_lcu; unsigned long bitrate; - unsigned int num_vpp_pipes; fp_t bins_to_bit_factor, vsp_read_factor, vsp_write_factor, dpb_factor, dpb_write_factor, y_bw_no_ubwc_8bpp; @@ -317,8 +316,6 @@ static u64 __calculate_decoder(struct vidc_bus_vote_data *d) opb_write_compression_factor = opb_compression_enabled ? dpb_write_compression_factor : FP_ONE; - num_vpp_pipes = d->num_vpp_pipes; - if (d->use_sys_cache) { llc_ref_read_l2_cache_enabled = true; if (is_h264_category) diff --git a/driver/variant/iris33/src/msm_vidc_iris33.c b/driver/variant/iris33/src/msm_vidc_iris33.c index 0c01f43b09..70a3b7cb49 100644 --- a/driver/variant/iris33/src/msm_vidc_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_iris33.c @@ -280,7 +280,6 @@ static bool is_iris33_hw_power_collapsed(struct msm_vidc_core *core) static int __power_off_iris33_hardware(struct msm_vidc_core *core) { - const struct msm_vidc_resources_ops *res_ops = core->res_ops; int rc = 0, i; u32 value = 0; bool pwr_collapsed = false; @@ -368,13 +367,13 @@ static int __power_off_iris33_hardware(struct msm_vidc_core *core) disable_power: /* power down process */ - rc = res_ops->gdsc_off(core, "vcodec"); + rc = call_res_op(core, gdsc_off, core, "vcodec"); if (rc) { d_vpr_e("%s: disable regulator vcodec failed\n", __func__); rc = 0; } - rc = res_ops->clk_disable(core, "vcodec_clk"); + rc = call_res_op(core, clk_disable, core, "vcodec_clk"); if (rc) { d_vpr_e("%s: disable unprepare vcodec_clk failed\n", __func__); rc = 0; @@ -385,7 +384,6 @@ disable_power: static int __power_off_iris33_controller(struct msm_vidc_core *core) { - const struct msm_vidc_resources_ops *res_ops = core->res_ops; int rc = 0; int value = 0; @@ -493,21 +491,21 @@ static int __power_off_iris33_controller(struct msm_vidc_core *core) /* Turn off MVP MVS0C core clock */ - rc = res_ops->clk_disable(core, "core_clk"); + rc = call_res_op(core, clk_disable, core, "core_clk"); if (rc) { d_vpr_e("%s: disable unprepare core_clk failed\n", __func__); rc = 0; } /* power down process */ - rc = res_ops->gdsc_off(core, "iris-ctl"); + rc = call_res_op(core, gdsc_off, core, "iris-ctl"); if (rc) { d_vpr_e("%s: disable regulator iris-ctl failed\n", __func__); rc = 0; } /* Turn off GCC AXI clock */ - rc = res_ops->clk_disable(core, "gcc_video_axi0"); + rc = call_res_op(core, clk_disable, core, "gcc_video_axi0"); if (rc) { d_vpr_e("%s: disable unprepare core_clk failed\n", __func__); rc = 0; @@ -518,7 +516,6 @@ static int __power_off_iris33_controller(struct msm_vidc_core *core) static int __power_off_iris33(struct msm_vidc_core *core) { - const struct msm_vidc_resources_ops *res_ops = core->res_ops; int rc = 0; if (!core || !core->capabilities) { @@ -533,7 +530,7 @@ static int __power_off_iris33(struct msm_vidc_core *core) * Reset video_cc_mvs0_clk_src value to resolve MMRM high video * clock projection issue. */ - rc = res_ops->set_clks(core, 0); + rc = call_res_op(core, set_clks, core, 0); if (rc) d_vpr_e("%s: resetting clocks failed\n", __func__); @@ -543,7 +540,8 @@ static int __power_off_iris33(struct msm_vidc_core *core) if (__power_off_iris33_controller(core)) d_vpr_e("%s: failed to power off controller\n", __func__); - if (res_ops->set_bw(core, 0, 0)) + rc = call_res_op(core, set_bw, core, 0, 0); + if (rc) d_vpr_e("%s: failed to unvote buses\n", __func__); if (!(core->intr_status & WRAPPER_INTR_STATUS_A2HWD_BMSK_IRIS33)) @@ -557,60 +555,57 @@ static int __power_off_iris33(struct msm_vidc_core *core) static int __power_on_iris33_controller(struct msm_vidc_core *core) { - const struct msm_vidc_resources_ops *res_ops = core->res_ops; int rc = 0; - rc = res_ops->gdsc_on(core, "iris-ctl"); + rc = call_res_op(core, gdsc_on, core, "iris-ctl"); if (rc) goto fail_regulator; - rc = res_ops->reset_bridge(core); + rc = call_res_op(core, reset_bridge, core); if (rc) goto fail_reset_ahb2axi; - rc = res_ops->clk_enable(core, "gcc_video_axi0"); + rc = call_res_op(core, clk_enable, core, "gcc_video_axi0"); if (rc) goto fail_clk_axi; - rc = res_ops->clk_enable(core, "core_clk"); + rc = call_res_op(core, clk_enable, core, "core_clk"); if (rc) goto fail_clk_controller; return 0; fail_clk_controller: - res_ops->clk_disable(core, "gcc_video_axi0"); + call_res_op(core, clk_disable, core, "gcc_video_axi0"); fail_clk_axi: fail_reset_ahb2axi: - res_ops->gdsc_off(core, "iris-ctl"); + call_res_op(core, gdsc_off, core, "iris-ctl"); fail_regulator: return rc; } static int __power_on_iris33_hardware(struct msm_vidc_core *core) { - const struct msm_vidc_resources_ops *res_ops = core->res_ops; int rc = 0; - rc = res_ops->gdsc_on(core, "vcodec"); + rc = call_res_op(core, gdsc_on, core, "vcodec"); if (rc) goto fail_regulator; - rc = res_ops->clk_enable(core, "vcodec_clk"); + rc = call_res_op(core, clk_enable, core, "vcodec_clk"); if (rc) goto fail_clk_controller; return 0; fail_clk_controller: - res_ops->gdsc_off(core, "vcodec"); + call_res_op(core, gdsc_off, core, "vcodec"); fail_regulator: return rc; } static int __power_on_iris33(struct msm_vidc_core *core) { - const struct msm_vidc_resources_ops *res_ops = core->res_ops; struct frequency_table *freq_tbl; u32 freq = 0; int rc = 0; @@ -619,7 +614,7 @@ static int __power_on_iris33(struct msm_vidc_core *core) return 0; /* Vote for all hardware resources */ - rc = res_ops->set_bw(core, INT_MAX, INT_MAX); + rc = call_res_op(core, set_bw, core, INT_MAX, INT_MAX); if (rc) { d_vpr_e("%s: failed to vote buses, rc %d\n", __func__, rc); goto fail_vote_buses; @@ -643,7 +638,7 @@ static int __power_on_iris33(struct msm_vidc_core *core) freq = core->power.clk_freq ? core->power.clk_freq : freq_tbl[0].freq; - rc = res_ops->set_clks(core, freq); + rc = call_res_op(core, set_clks, core, freq); if (rc) { d_vpr_e("%s: failed to scale clocks\n", __func__); rc = 0; @@ -663,7 +658,7 @@ static int __power_on_iris33(struct msm_vidc_core *core) fail_power_on_hardware: __power_off_iris33_controller(core); fail_power_on_controller: - res_ops->set_bw(core, 0, 0); + call_res_op(core, set_bw, core, 0, 0); fail_vote_buses: core->power_enabled = false; return rc; diff --git a/driver/variant/iris33/src/msm_vidc_power_iris33.c b/driver/variant/iris33/src/msm_vidc_power_iris33.c index 1136cfb3f2..e133799772 100644 --- a/driver/variant/iris33/src/msm_vidc_power_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_power_iris33.c @@ -264,7 +264,6 @@ static u64 __calculate_decoder(struct vidc_bus_vote_data *d) /* Derived parameters */ int lcu_per_frame, collocated_bytes_per_lcu, tnbr_per_lcu; unsigned long bitrate; - unsigned int num_vpp_pipes; fp_t bins_to_bit_factor, vsp_read_factor, vsp_write_factor, dpb_factor, dpb_write_factor, y_bw_no_ubwc_8bpp; @@ -316,8 +315,6 @@ static u64 __calculate_decoder(struct vidc_bus_vote_data *d) opb_write_compression_factor = opb_compression_enabled ? dpb_write_compression_factor : FP_ONE; - num_vpp_pipes = d->num_vpp_pipes; - if (d->use_sys_cache) { llc_ref_read_l2_cache_enabled = true; if (is_h264_category) diff --git a/driver/vidc/inc/msm_vidc_control.h b/driver/vidc/inc/msm_vidc_control.h index 48a1809842..277db6da37 100644 --- a/driver/vidc/inc/msm_vidc_control.h +++ b/driver/vidc/inc/msm_vidc_control.h @@ -115,8 +115,6 @@ int msm_vidc_set_preprocess(void *instance, enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_reserve_duration(void *instance, enum msm_vidc_inst_capability_type cap_id); -int msm_vidc_set_u32_enum(void *instance, - enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_q16(void *instance, enum msm_vidc_inst_capability_type cap_id); int msm_vidc_v4l2_menu_to_hfi(struct msm_vidc_inst *inst, diff --git a/driver/vidc/inc/msm_vidc_power.h b/driver/vidc/inc/msm_vidc_power.h index 85564205f3..40836092ab 100644 --- a/driver/vidc/inc/msm_vidc_power.h +++ b/driver/vidc/inc/msm_vidc_power.h @@ -251,7 +251,6 @@ static inline int __bpp(enum msm_vidc_colorformat_type f) u64 msm_vidc_max_freq(struct msm_vidc_inst* inst); int msm_vidc_get_inst_load(struct msm_vidc_inst *inst); -int msm_vidc_get_mbps(struct msm_vidc_inst *inst); int msm_vidc_scale_power(struct msm_vidc_inst *inst, bool scale_buses); void msm_vidc_power_data_reset(struct msm_vidc_inst *inst); #endif diff --git a/driver/vidc/inc/resources.h b/driver/vidc/inc/resources.h index 9c2f926a2c..e24ccc0b80 100644 --- a/driver/vidc/inc/resources.h +++ b/driver/vidc/inc/resources.h @@ -197,6 +197,10 @@ struct msm_vidc_resource { int fw_cookie; }; +#define call_res_op(c, op, ...) \ + (((c) && (c)->res_ops && (c)->res_ops->op) ? \ + ((c)->res_ops->op(__VA_ARGS__)) : 0) + struct msm_vidc_resources_ops { int (*init)(struct msm_vidc_core *core); diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index fbd3282dd9..2d4ee6de2b 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -2186,8 +2186,6 @@ int msm_vdec_try_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) f->fmt.pix_mp.pixelformat = inst->fmts[OUTPUT_PORT].fmt.pix_mp.pixelformat; f->fmt.pix_mp.width = inst->fmts[OUTPUT_PORT].fmt.pix_mp.width; f->fmt.pix_mp.height = inst->fmts[OUTPUT_PORT].fmt.pix_mp.height; - pix_fmt = v4l2_colorformat_to_driver(inst, - f->fmt.pix_mp.pixelformat, __func__); } if (inst->bufq[INPUT_PORT].vb2q->streaming) { f->fmt.pix_mp.height = inst->fmts[INPUT_PORT].fmt.pix_mp.height; diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index 28dc40eafd..73a9213518 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -591,13 +591,11 @@ static int msm_venc_queue_input_internal_buffers(struct msm_vidc_inst *inst) static int msm_venc_get_output_internal_buffers(struct msm_vidc_inst *inst) { int i, rc = 0; - struct msm_vidc_core *core; - if (!inst || !inst->core) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - core = inst->core; for (i = 0; i < ARRAY_SIZE(msm_venc_output_internal_buffer_type); i++) { rc = msm_vidc_get_internal_buffers(inst, @@ -693,16 +691,14 @@ static int msm_venc_metadata_delivery(struct msm_vidc_inst *inst, enum msm_vidc_port_type port) { int rc = 0; - struct msm_vidc_core *core; u32 payload[32] = {0}; u32 i, count = 0; struct msm_vidc_inst_capability *capability; - if (!inst || !inst->core) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - core = inst->core; i_vpr_h(inst, "%s()\n", __func__); capability = inst->capabilities; @@ -1047,7 +1043,6 @@ int msm_venc_try_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) f->fmt.pix_mp.width = inst->fmts[OUTPUT_PORT].fmt.pix_mp.width; f->fmt.pix_mp.height = inst->fmts[OUTPUT_PORT].fmt.pix_mp.height; f->fmt.pix_mp.pixelformat = inst->fmts[OUTPUT_PORT].fmt.pix_mp.pixelformat; - pix_fmt = v4l2_codec_to_driver(inst, f->fmt.pix_mp.pixelformat, __func__); } } else if (f->type == INPUT_META_PLANE) { f->fmt.meta.dataformat = inst->fmts[INPUT_META_PORT].fmt.meta.dataformat; diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 9fbc863b59..c7b1b84b96 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -6398,14 +6398,12 @@ static int msm_vidc_check_inst_mbpf(struct msm_vidc_inst *inst) u32 msm_vidc_get_max_bitrate(struct msm_vidc_inst* inst) { - struct msm_vidc_inst_capability *capability; u32 max_bitrate = 0x7fffffff; if (!inst || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - capability = inst->capabilities; if (inst->capabilities->cap[LOWLATENCY_MODE].value) max_bitrate = min(max_bitrate, diff --git a/driver/vidc/src/msm_vidc_power.c b/driver/vidc/src/msm_vidc_power.c index 6a45130c9d..b7a91a3f3f 100644 --- a/driver/vidc/src/msm_vidc_power.c +++ b/driver/vidc/src/msm_vidc_power.c @@ -112,20 +112,8 @@ u64 msm_vidc_max_freq(struct msm_vidc_inst *inst) return freq; } -int msm_vidc_get_mbps(struct msm_vidc_inst *inst) -{ - u32 mbpf, fps, input_rate; - - mbpf = msm_vidc_get_mbs_per_frame(inst); - fps = msm_vidc_get_fps(inst); - input_rate = msm_vidc_get_input_rate(inst); - - return mbpf * max(fps, input_rate); -} - int msm_vidc_get_inst_load(struct msm_vidc_inst *inst) { - int load = 0; u32 mbpf, fps; u32 frame_rate, operating_rate, input_rate, timestamp_rate; @@ -136,7 +124,7 @@ int msm_vidc_get_inst_load(struct msm_vidc_inst *inst) /* return zero load for thumbnail and NRT session */ if (is_thumbnail_session(inst) || !is_realtime_session(inst)) - return load; + return 0; /* calculate load for RT session */ mbpf = msm_vidc_get_mbs_per_frame(inst); @@ -151,7 +139,7 @@ int msm_vidc_get_inst_load(struct msm_vidc_inst *inst) fps = max(fps, timestamp_rate); } - return load = mbpf * fps; + return mbpf * fps; } static int fill_dynamic_stats(struct msm_vidc_inst *inst, diff --git a/driver/vidc/src/msm_vidc_probe.c b/driver/vidc/src/msm_vidc_probe.c index 147e85d3d0..401aa1b226 100644 --- a/driver/vidc/src/msm_vidc_probe.c +++ b/driver/vidc/src/msm_vidc_probe.c @@ -51,7 +51,6 @@ static inline bool is_video_context_bank_device(struct device *dev) static int msm_vidc_init_resources(struct msm_vidc_core *core) { - const struct msm_vidc_resources_ops *res_ops; struct msm_vidc_resource *res = NULL; int rc = 0; @@ -59,7 +58,6 @@ static int msm_vidc_init_resources(struct msm_vidc_core *core) d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - res_ops = core->res_ops; res = devm_kzalloc(&core->pdev->dev, sizeof(*res), GFP_KERNEL); if (!res) { @@ -69,7 +67,7 @@ static int msm_vidc_init_resources(struct msm_vidc_core *core) res->core = core; core->resource = res; - rc = res_ops->init(core); + rc = call_res_op(core, init, core); if (rc) { d_vpr_e("%s: Failed to init resources: %d\n", __func__, rc); return rc; diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index f1e7529f90..e620c9069c 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -444,7 +444,6 @@ static int __release_subcaches(struct msm_vidc_core *core) static int __set_subcaches(struct msm_vidc_core *core) { - const struct msm_vidc_resources_ops *res_ops = core->res_ops; int rc = 0; struct subcache_info *sinfo; struct hfi_buffer buf; @@ -504,7 +503,7 @@ static int __set_subcaches(struct msm_vidc_core *core) return 0; err_fail_set_subacaches: - res_ops->llcc(core, false); + call_res_op(core, llcc, core, false); return rc; } @@ -567,7 +566,6 @@ static int __venus_power_on(struct msm_vidc_core *core) static int __suspend(struct msm_vidc_core *core) { - const struct msm_vidc_resources_ops *res_ops = core->res_ops; int rc = 0; if (!core) { @@ -590,7 +588,7 @@ static int __suspend(struct msm_vidc_core *core) goto err_tzbsp_suspend; } - res_ops->llcc(core, false); + call_res_op(core, llcc, core, false); __venus_power_off(core); d_vpr_h("Venus power off\n"); @@ -602,7 +600,6 @@ err_tzbsp_suspend: static int __resume(struct msm_vidc_core *core) { - const struct msm_vidc_resources_ops *res_ops = core->res_ops; int rc = 0; if (!core) { @@ -642,7 +639,7 @@ static int __resume(struct msm_vidc_core *core) * (s/w triggered) to fast (HW triggered) unless the h/w vote is * present. */ - res_ops->gdsc_hw_ctrl(core); + call_res_op(core, gdsc_hw_ctrl, core); /* Wait for boot completion */ rc = call_venus_op(core, boot_firmware, core); @@ -653,7 +650,7 @@ static int __resume(struct msm_vidc_core *core) __sys_set_debug(core, (msm_vidc_debug & FW_LOGMASK) >> FW_LOGSHIFT); - rc = res_ops->llcc(core, true); + rc = call_res_op(core, llcc, core, true); if (rc) { d_vpr_e("Failed to activate subcache\n"); goto err_reset_core; @@ -663,7 +660,7 @@ static int __resume(struct msm_vidc_core *core) rc = __sys_set_power_control(core, true); if (rc) { d_vpr_e("%s: set power control failed\n", __func__); - res_ops->gdsc_sw_ctrl(core); + call_res_op(core, gdsc_sw_ctrl, core); rc = 0; } @@ -684,7 +681,6 @@ err_venus_power_on: int __load_fw(struct msm_vidc_core *core) { - const struct msm_vidc_resources_ops *res_ops = core->res_ops; int rc = 0; d_vpr_h("%s\n", __func__); @@ -709,7 +705,7 @@ int __load_fw(struct msm_vidc_core *core) * (s/w triggered) to fast (HW triggered) unless the h/w vote is * present. */ - res_ops->gdsc_hw_ctrl(core); + call_res_op(core, gdsc_hw_ctrl, core); trace_msm_v4l2_vidc_fw_load("END"); return rc; @@ -722,13 +718,11 @@ fail_power: void __unload_fw(struct msm_vidc_core *core) { - int rc = 0; - if (!core->resource->fw_cookie) return; cancel_delayed_work(&core->pm_work); - rc = fw_unload(core); + fw_unload(core); __venus_power_off(core); core->cpu_watchdog = false; @@ -891,13 +885,13 @@ static int __sys_image_version(struct msm_vidc_core *core) int venus_hfi_core_init(struct msm_vidc_core *core) { - const struct msm_vidc_resources_ops *res_ops = core->res_ops; int rc = 0; if (!core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } + d_vpr_h("%s(): core %pK\n", __func__, core); rc = __strict_check(core, __func__); @@ -916,7 +910,7 @@ int venus_hfi_core_init(struct msm_vidc_core *core) if (rc) goto error; - rc = res_ops->llcc(core, true); + rc = call_res_op(core, llcc, core, true); if (rc) goto error; @@ -939,7 +933,7 @@ int venus_hfi_core_init(struct msm_vidc_core *core) rc = __sys_set_power_control(core, true); if (rc) { d_vpr_e("%s: set power control failed\n", __func__); - res_ops->gdsc_sw_ctrl(core); + call_res_op(core, gdsc_sw_ctrl, core); rc = 0; } @@ -953,13 +947,13 @@ error: int venus_hfi_core_deinit(struct msm_vidc_core *core, bool force) { - const struct msm_vidc_resources_ops *res_ops = core->res_ops; int rc = 0; if (!core) { d_vpr_h("%s(): invalid params\n", __func__); return -EINVAL; } + d_vpr_h("%s(): core %pK\n", __func__, core); rc = __strict_check(core, __func__); if (rc) @@ -970,7 +964,7 @@ int venus_hfi_core_deinit(struct msm_vidc_core *core, bool force) __resume(core); __flush_debug_queue(core, (!force ? core->packet : NULL), core->packet_size); __release_subcaches(core); - res_ops->llcc(core, false); + call_res_op(core, llcc, core, false); __unload_fw(core); /** * coredump need to be called after firmware unload, coredump also @@ -1997,7 +1991,6 @@ unlock: int venus_hfi_scale_clocks(struct msm_vidc_inst* inst, u64 freq) { - const struct msm_vidc_resources_ops *res_ops; int rc = 0; struct msm_vidc_core* core; @@ -2006,7 +1999,6 @@ int venus_hfi_scale_clocks(struct msm_vidc_inst* inst, u64 freq) return -EINVAL; } core = inst->core; - res_ops = core->res_ops; core_lock(core, __func__); rc = __resume(core); @@ -2014,7 +2006,7 @@ int venus_hfi_scale_clocks(struct msm_vidc_inst* inst, u64 freq) i_vpr_e(inst, "%s: Resume from power collapse failed\n", __func__); goto exit; } - rc = res_ops->set_clks(core, freq); + rc = call_res_op(core, set_clks, core, freq); if (rc) goto exit; @@ -2026,7 +2018,6 @@ exit: int venus_hfi_scale_buses(struct msm_vidc_inst *inst, u64 bw_ddr, u64 bw_llcc) { - const struct msm_vidc_resources_ops *res_ops; int rc = 0; struct msm_vidc_core* core; @@ -2035,7 +2026,6 @@ int venus_hfi_scale_buses(struct msm_vidc_inst *inst, u64 bw_ddr, u64 bw_llcc) return -EINVAL; } core = inst->core; - res_ops = core->res_ops; core_lock(core, __func__); rc = __resume(core); @@ -2043,7 +2033,7 @@ int venus_hfi_scale_buses(struct msm_vidc_inst *inst, u64 bw_ddr, u64 bw_llcc) i_vpr_e(inst, "%s: Resume from power collapse failed\n", __func__); goto exit; } - rc = res_ops->set_bw(core, bw_ddr, bw_llcc); + rc = call_res_op(core, set_bw, core, bw_ddr, bw_llcc); if (rc) goto exit; From 0e56253be6d62ab05280999311dcf85f683bd3b3 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Wed, 19 Oct 2022 11:45:44 +0530 Subject: [PATCH 0741/1061] video: driver: remove unused files msm_vidc_dt functionalities were distributed to other files and most of the dt parsing code was removed already. So added change to cleanup unused files. Change-Id: I3362c6cfa3f493b965167b9aeb0f5cf3ac8c2711 Signed-off-by: Govindaraj Rajagopal --- Kbuild | 1 - driver/vidc/inc/msm_vidc_dt.h | 12 ------------ driver/vidc/src/msm_vidc_dt.c | 9 --------- 3 files changed, 22 deletions(-) delete mode 100644 driver/vidc/inc/msm_vidc_dt.h delete mode 100644 driver/vidc/src/msm_vidc_dt.c diff --git a/Kbuild b/Kbuild index 1f5cc6795a..7217ca5daa 100644 --- a/Kbuild +++ b/Kbuild @@ -84,7 +84,6 @@ msm_video-objs += driver/vidc/src/msm_vidc_v4l2.o \ driver/vidc/src/msm_vidc_buffer.o \ driver/vidc/src/msm_vidc_power.o \ driver/vidc/src/msm_vidc_probe.o \ - driver/vidc/src/msm_vidc_dt.o \ driver/vidc/src/resources.o \ driver/vidc/src/firmware.o \ driver/vidc/src/msm_vidc_debug.o \ diff --git a/driver/vidc/inc/msm_vidc_dt.h b/driver/vidc/inc/msm_vidc_dt.h deleted file mode 100644 index 8045727ae8..0000000000 --- a/driver/vidc/inc/msm_vidc_dt.h +++ /dev/null @@ -1,12 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. - */ - -#ifndef _MSM_VIDC_DT_H_ -#define _MSM_VIDC_DT_H_ - -#include -#include - -#endif // _MSM_VIDC_DT_H_ diff --git a/driver/vidc/src/msm_vidc_dt.c b/driver/vidc/src/msm_vidc_dt.c deleted file mode 100644 index 0266347170..0000000000 --- a/driver/vidc/src/msm_vidc_dt.c +++ /dev/null @@ -1,9 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. - */ - -#include -#include -#include -#include From e7fa6b0af99c997a48b7dc11dd6148cb4bc4f1cd Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Wed, 28 Sep 2022 22:59:36 +0530 Subject: [PATCH 0742/1061] video: driver: add early notify control interface Added early notify feature related interfaces. Change-Id: Ic67a769ff44e00aeb81f3771989c282127a3e36c Signed-off-by: Govindaraj Rajagopal --- include/uapi/vidc/media/v4l2_vidc_extensions.h | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/include/uapi/vidc/media/v4l2_vidc_extensions.h b/include/uapi/vidc/media/v4l2_vidc_extensions.h index 0f3f15d52f..8215ee4d98 100644 --- a/include/uapi/vidc/media/v4l2_vidc_extensions.h +++ b/include/uapi/vidc/media/v4l2_vidc_extensions.h @@ -260,6 +260,12 @@ enum v4l2_mpeg_video_av1_tier { #define V4L2_CID_MPEG_VIDC_VUI_TIMING_INFO \ (V4L2_CID_MPEG_VIDC_BASE + 0x43) +#define V4L2_CID_MPEG_VIDC_EARLY_NOTIFY_ENABLE \ + (V4L2_CID_MPEG_VIDC_BASE + 0x44) + +#define V4L2_CID_MPEG_VIDC_EARLY_NOTIFY_LINE_COUNT \ + (V4L2_CID_MPEG_VIDC_BASE + 0x45) + /* add new controls above this line */ /* Deprecate below controls once availble in gki and gsi bionic header */ #ifndef V4L2_CID_MPEG_VIDEO_BASELAYER_PRIORITY_ID From fc19b2823126aba753d99fce54c94497e2f9c423 Mon Sep 17 00:00:00 2001 From: Deepa Guthyappa Madivalara Date: Mon, 17 Oct 2022 14:51:49 -0700 Subject: [PATCH 0743/1061] video: driver: fix VCODEC_VIDEO_CC_BASE address Fix VCODEC_VIDEO_CC_BASE from 0x00F00000 to 0x000F0000 Change-Id: Icda45653be646647ee563322651333cf6c9c4582 Signed-off-by: Deepa Guthyappa Madivalara --- driver/variant/iris33/src/msm_vidc_iris33.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/driver/variant/iris33/src/msm_vidc_iris33.c b/driver/variant/iris33/src/msm_vidc_iris33.c index 0c01f43b09..b89316ea00 100644 --- a/driver/variant/iris33/src/msm_vidc_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_iris33.c @@ -23,7 +23,7 @@ #define AON_MVP_NOC_RESET 0x0001F000 #define CPU_BASE_OFFS_IRIS33 0x000A0000 #define AON_BASE_OFFS 0x000E0000 -#define VCODEC_VIDEO_CC_BASE 0x00F00000 +#define VCODEC_VIDEO_CC_BASE 0x000F0000 #define CPU_CS_BASE_OFFS_IRIS33 (CPU_BASE_OFFS_IRIS33) #define CPU_IC_BASE_OFFS_IRIS33 (CPU_BASE_OFFS_IRIS33) From 3362c706424b3571838a8be96a486fdf2298fae0 Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Wed, 19 Oct 2022 10:40:54 -0700 Subject: [PATCH 0744/1061] video: driver: remove skip delayed unmap functionality Change-Id: Ibc3e8d565010aa5ac608aa648c533057c51f4bf4 Signed-off-by: Darshana Patil --- driver/vidc/inc/msm_vidc_driver.h | 8 -- driver/vidc/inc/msm_vidc_internal.h | 1 - driver/vidc/src/msm_vidc_driver.c | 180 ---------------------------- driver/vidc/src/msm_vidc_memory.c | 12 +- 4 files changed, 5 insertions(+), 196 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 687b34ea8d..8dc658684d 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -472,14 +472,6 @@ int msm_vidc_allocate_buffers(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type buf_type, u32 num_buffers); int msm_vidc_free_buffers(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type buf_type); -int msm_vidc_unmap_driver_buf(struct msm_vidc_inst *inst, - struct msm_vidc_buffer *buf); -int msm_vidc_map_driver_buf(struct msm_vidc_inst *inst, - struct msm_vidc_buffer *buf); -int msm_vidc_get_delayed_unmap(struct msm_vidc_inst *inst, - struct msm_vidc_map *map); -int msm_vidc_put_delayed_unmap(struct msm_vidc_inst *inst, - struct msm_vidc_map *map); void msm_vidc_update_stats(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buf, enum msm_vidc_debugfs_event etype); void msm_vidc_stats_handler(struct work_struct *work); diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 3144b5b14e..d3af40132e 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -853,7 +853,6 @@ struct msm_vidc_map { u64 device_addr; struct sg_table *table; struct dma_buf_attachment *attach; - u32 skip_delayed_unmap:1; }; struct msm_vidc_mappings { diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 9fbc863b59..0bf7f70842 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -2547,33 +2547,6 @@ int msm_vidc_process_readonly_buffers(struct msm_vidc_inst *inst, return rc; } -int msm_vidc_memory_unmap_completely(struct msm_vidc_inst *inst, - struct msm_vidc_map *map) -{ - int rc = 0; - - if (!inst || !map) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - if (!map->refcount) - return 0; - - while (map->refcount) { - rc = msm_vidc_memory_unmap(inst->core, map); - if (rc) - break; - if (!map->refcount) { - msm_vidc_memory_put_dmabuf(inst, map->dmabuf); - list_del(&map->list); - msm_memory_pool_free(inst, map); - break; - } - } - return rc; -} - int msm_vidc_set_auto_framerate(struct msm_vidc_inst *inst, u64 timestamp) { struct msm_vidc_core *core; @@ -2978,159 +2951,6 @@ int msm_vidc_ts_reorder_flush(struct msm_vidc_inst *inst) return 0; } -int msm_vidc_get_delayed_unmap(struct msm_vidc_inst *inst, struct msm_vidc_map *map) -{ - int rc = 0; - - if (!inst || !map) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - rc = msm_vidc_memory_map(inst->core, map); - if (rc) - return rc; - map->skip_delayed_unmap = 1; - - return 0; -} - -int msm_vidc_put_delayed_unmap(struct msm_vidc_inst *inst, struct msm_vidc_map *map) -{ - int rc = 0; - - if (!inst || !map) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - if (!map->skip_delayed_unmap) { - i_vpr_e(inst, "%s: no delayed unmap, addr %#llx\n", - __func__, map->device_addr); - return -EINVAL; - } - - map->skip_delayed_unmap = 0; - rc = msm_vidc_memory_unmap(inst->core, map); - if (rc) - i_vpr_e(inst, "%s: unmap failed\n", __func__); - - return rc; -} - -int msm_vidc_unmap_driver_buf(struct msm_vidc_inst *inst, - struct msm_vidc_buffer *buf) -{ - int rc = 0; - struct msm_vidc_mappings *mappings; - struct msm_vidc_map *map = NULL; - bool found = false; - - if (!inst || !buf) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - mappings = msm_vidc_get_mappings(inst, buf->type, __func__); - if (!mappings) - return -EINVAL; - - /* sanity check to see if it was not removed */ - list_for_each_entry(map, &mappings->list, list) { - if (map->dmabuf == buf->dmabuf) { - found = true; - break; - } - } - if (!found) { - print_vidc_buffer(VIDC_ERR, "err ", "no buf in mappings", inst, buf); - return -EINVAL; - } - - rc = msm_vidc_memory_unmap(inst->core, map); - if (rc) { - print_vidc_buffer(VIDC_ERR, "err ", "unmap failed", inst, buf); - return -EINVAL; - } - - /* finally delete if refcount is zero */ - if (!map->refcount) { - msm_vidc_memory_put_dmabuf(inst, map->dmabuf); - list_del(&map->list); - msm_memory_pool_free(inst, map); - } - - return rc; -} - -int msm_vidc_map_driver_buf(struct msm_vidc_inst *inst, - struct msm_vidc_buffer *buf) -{ - int rc = 0; - struct msm_vidc_mappings *mappings; - struct msm_vidc_map *map; - bool found = false; - - if (!inst || !buf) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - mappings = msm_vidc_get_mappings(inst, buf->type, __func__); - if (!mappings) - return -EINVAL; - - /* - * new buffer: map twice for delayed unmap feature sake - * existing buffer: map once - */ - list_for_each_entry(map, &mappings->list, list) { - if (map->dmabuf == buf->dmabuf) { - found = true; - break; - } - } - if (!found) { - /* new buffer case */ - map = msm_memory_pool_alloc(inst, MSM_MEM_POOL_MAP); - if (!map) { - i_vpr_e(inst, "%s: alloc failed\n", __func__); - return -ENOMEM; - } - INIT_LIST_HEAD(&map->list); - list_add_tail(&map->list, &mappings->list); - map->type = buf->type; - map->dmabuf = msm_vidc_memory_get_dmabuf(inst, buf->fd); - if (!map->dmabuf) { - rc = -EINVAL; - goto error; - } - map->region = msm_vidc_get_buffer_region(inst, buf->type, __func__); - /* delayed unmap feature needed for decoder output buffers */ - if (is_decode_session(inst) && is_output_buffer(buf->type)) { - rc = msm_vidc_get_delayed_unmap(inst, map); - if (rc) - goto error; - } - } - rc = msm_vidc_memory_map(inst->core, map); - if (rc) - goto error; - - buf->device_addr = map->device_addr; - - return 0; -error: - if (!found) { - if (is_decode_session(inst) && is_output_buffer(buf->type)) - msm_vidc_put_delayed_unmap(inst, map); - msm_vidc_memory_put_dmabuf(inst, map->dmabuf); - list_del_init(&map->list); - msm_memory_pool_free(inst, map); - } - return rc; -} - struct msm_vidc_buffer *msm_vidc_get_driver_buf(struct msm_vidc_inst *inst, struct vb2_buffer *vb2) { diff --git a/driver/vidc/src/msm_vidc_memory.c b/driver/vidc/src/msm_vidc_memory.c index 06c81cd6ec..3efe5a676d 100644 --- a/driver/vidc/src/msm_vidc_memory.c +++ b/driver/vidc/src/msm_vidc_memory.c @@ -215,13 +215,11 @@ int msm_vidc_memory_map(struct msm_vidc_core *core, struct msm_vidc_map *map) goto error_attach; } - if (!map->skip_delayed_unmap) { - /* - * Get the scatterlist for the given attachment - * Mapping of sg is taken care by map attachment - */ - attach->dma_map_attrs |= DMA_ATTR_DELAYED_UNMAP; - } + /* + * Get the scatterlist for the given attachment + * Mapping of sg is taken care by map attachment + */ + attach->dma_map_attrs |= DMA_ATTR_DELAYED_UNMAP; /* * We do not need dma_map function to perform cache operations From 4250372925c480d6e57e9980bf65fb1c3f5d5725 Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Wed, 19 Oct 2022 16:30:45 -0700 Subject: [PATCH 0745/1061] video: driver: add memory ops support add memory ops support so that different implementations can exist for memory_alloc, memory_free, memory_map and memory_unmap, dma buf attach, detach, map, unmap and get buffer region in upstream and downstream drivers. Change-Id: Ifabc34e7a8b0284579c1bc4a8f477fe558d068f4 Signed-off-by: Darshana Patil --- Kbuild | 1 + .../platform/common/inc/msm_vidc_platform.h | 37 ++ .../platform/common/src/msm_vidc_platform.c | 22 + driver/platform/kalama/src/msm_vidc_kalama.c | 21 + .../pineapple/src/msm_vidc_pineapple.c | 21 + driver/vidc/inc/msm_vidc_driver.h | 6 +- driver/vidc/inc/msm_vidc_internal.h | 13 - driver/vidc/inc/msm_vidc_memory.h | 30 +- driver/vidc/inc/msm_vidc_memory_ext.h | 22 + driver/vidc/src/msm_vidc.c | 3 +- driver/vidc/src/msm_vidc_driver.c | 327 +++++++------- driver/vidc/src/msm_vidc_memory.c | 402 ++---------------- driver/vidc/src/msm_vidc_memory_ext.c | 379 +++++++++++++++++ driver/vidc/src/msm_vidc_probe.c | 24 +- driver/vidc/src/msm_vidc_vb2.c | 34 +- driver/vidc/src/venus_hfi.c | 12 +- driver/vidc/src/venus_hfi_queue.c | 17 +- driver/vidc/src/venus_hfi_response.c | 15 +- 18 files changed, 776 insertions(+), 610 deletions(-) create mode 100644 driver/vidc/inc/msm_vidc_memory_ext.h create mode 100644 driver/vidc/src/msm_vidc_memory_ext.c diff --git a/Kbuild b/Kbuild index 7217ca5daa..f62bf008ce 100644 --- a/Kbuild +++ b/Kbuild @@ -88,6 +88,7 @@ msm_video-objs += driver/vidc/src/msm_vidc_v4l2.o \ driver/vidc/src/firmware.o \ driver/vidc/src/msm_vidc_debug.o \ driver/vidc/src/msm_vidc_memory.o \ + driver/vidc/src/msm_vidc_memory_ext.o \ driver/vidc/src/msm_vidc_fence.o \ driver/vidc/src/venus_hfi.o \ driver/vidc/src/venus_hfi_queue.o \ diff --git a/driver/platform/common/inc/msm_vidc_platform.h b/driver/platform/common/inc/msm_vidc_platform.h index 2e0a012d14..820f216ac2 100644 --- a/driver/platform/common/inc/msm_vidc_platform.h +++ b/driver/platform/common/inc/msm_vidc_platform.h @@ -11,6 +11,7 @@ #include "msm_vidc_internal.h" #include "msm_vidc_core.h" +#include "msm_vidc_memory.h" #define DDR_TYPE_LPDDR4 0x6 #define DDR_TYPE_LPDDR4X 0x7 @@ -219,6 +220,42 @@ struct msm_vidc_platform { struct msm_vidc_platform_data data; }; +#define call_mem_op(c, op, ...) \ + (((c) && (c)->mem_ops && (c)->mem_ops->op) ? \ + ((c)->mem_ops->op(__VA_ARGS__)) : 0) + +struct msm_vidc_memory_ops { + struct dma_buf_attachment *(*dma_buf_attach)(struct msm_vidc_core *core, + struct dma_buf *dbuf, struct device *dev); + int (*dma_buf_detach)(struct msm_vidc_core *core, struct dma_buf *dbuf, + struct dma_buf_attachment *attach); + struct sg_table *(*dma_buf_map_attachment)(struct msm_vidc_core *core, + struct dma_buf_attachment *attach); + int (*dma_buf_unmap_attachment)(struct msm_vidc_core *core, + struct dma_buf_attachment *attach, struct sg_table *table); + int (*memory_alloc)(struct msm_vidc_core *core, + struct msm_vidc_alloc *alloc); + int (*memory_free)(struct msm_vidc_core *core, + struct msm_vidc_alloc *alloc); + int (*memory_map)(struct msm_vidc_core *core, + struct msm_vidc_map *map); + int (*memory_unmap)(struct msm_vidc_core *core, + struct msm_vidc_map *map); + u32 (*buffer_region)(struct msm_vidc_inst *inst, + enum msm_vidc_buffer_type buffer_type); + struct dma_buf *(*dma_buf_get)(struct msm_vidc_inst *inst, + int fd); + void (*dma_buf_put)(struct msm_vidc_inst *inst, + struct dma_buf *dmabuf); + void (*dma_buf_put_completely)(struct msm_vidc_inst *inst, + struct msm_memory_dmabuf *buf); + int (*pools_init)(struct msm_vidc_inst *inst); + void (*pools_deinit)(struct msm_vidc_inst *inst); + void *(*pool_alloc)(struct msm_vidc_inst *inst, + enum msm_memory_pool_type type); + void (*pool_free)(struct msm_vidc_inst *inst, void *vidc_buf); +}; + static inline bool is_sys_cache_present(struct msm_vidc_core *core) { return !!core->platform->data.subcache_tbl_size; diff --git a/driver/platform/common/src/msm_vidc_platform.c b/driver/platform/common/src/msm_vidc_platform.c index ea099e87f5..3e0b16011f 100644 --- a/driver/platform/common/src/msm_vidc_platform.c +++ b/driver/platform/common/src/msm_vidc_platform.c @@ -15,6 +15,8 @@ #include "msm_vidc_core.h" #include "msm_vidc_debug.h" #include "msm_vidc_internal.h" +#include "msm_vidc_memory.h" + #if defined(CONFIG_MSM_VIDC_WAIPIO) #include "msm_vidc_waipio.h" #endif @@ -185,6 +187,25 @@ static struct v4l2_m2m_ops msm_v4l2_m2m_ops = { .job_abort = msm_v4l2_m2m_job_abort, }; +static struct msm_vidc_memory_ops msm_mem_ops = { + .dma_buf_attach = msm_vidc_dma_buf_attach, + .dma_buf_detach = msm_vidc_dma_buf_detach, + .dma_buf_map_attachment = msm_vidc_dma_buf_map_attachment, + .dma_buf_unmap_attachment = msm_vidc_dma_buf_unmap_attachment, + .memory_alloc = msm_vidc_memory_alloc, + .memory_free = msm_vidc_memory_free, + .memory_map = msm_vidc_memory_map, + .memory_unmap = msm_vidc_memory_unmap, + .buffer_region = msm_vidc_buffer_region, + .dma_buf_get = msm_vidc_dma_buf_get, + .dma_buf_put = msm_vidc_dma_buf_put, + .dma_buf_put_completely = msm_vidc_dma_buf_put_completely, + .pools_init = msm_vidc_pools_init, + .pools_deinit = msm_vidc_pools_deinit, + .pool_alloc = msm_vidc_pool_alloc, + .pool_free = msm_vidc_pool_free, +}; + static int msm_vidc_init_ops(struct msm_vidc_core *core) { if (!core) { @@ -201,6 +222,7 @@ static int msm_vidc_init_ops(struct msm_vidc_core *core) core->vb2_mem_ops = &msm_vb2_mem_ops; core->media_device_ops = &msm_v4l2_media_ops; core->v4l2_m2m_ops = &msm_v4l2_m2m_ops; + core->mem_ops = &msm_mem_ops; return 0; } diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index 8b0196d7ce..8386afa88d 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -16,6 +16,7 @@ #include "msm_vidc_debug.h" #include "msm_vidc_internal.h" #include "msm_vidc_control_ext.h" +#include "msm_vidc_memory_ext.h" #include "hfi_property.h" #include "msm_vidc_iris3.h" #include "hfi_command.h" @@ -2764,6 +2765,25 @@ static const struct msm_vidc_platform_data kalama_data_v2 = { .format_data = &format_data_kalama, }; +static struct msm_vidc_memory_ops kalama_msm_mem_ops = { + .dma_buf_attach = msm_vidc_dma_buf_attach_ext, + .dma_buf_detach = msm_vidc_dma_buf_detach, + .dma_buf_map_attachment = msm_vidc_dma_buf_map_attachment, + .dma_buf_unmap_attachment = msm_vidc_dma_buf_unmap_attachment, + .memory_alloc = msm_vidc_memory_alloc_ext, + .memory_free = msm_vidc_memory_free_ext, + .memory_map = msm_vidc_memory_map_ext, + .memory_unmap = msm_vidc_memory_unmap, + .buffer_region = msm_vidc_buffer_region_ext, + .dma_buf_get = msm_vidc_dma_buf_get, + .dma_buf_put = msm_vidc_dma_buf_put, + .dma_buf_put_completely = msm_vidc_dma_buf_put_completely, + .pools_init = msm_vidc_pools_init, + .pools_deinit = msm_vidc_pools_deinit, + .pool_alloc = msm_vidc_pool_alloc, + .pool_free = msm_vidc_pool_free, +}; + int msm_vidc_kalama_check_ddr_type(void) { u32 ddr_type; @@ -2794,6 +2814,7 @@ static int msm_vidc_init_data(struct msm_vidc_core *core, struct device *dev) else core->platform->data = kalama_data; + core->mem_ops = &kalama_msm_mem_ops; rc = msm_vidc_kalama_check_ddr_type(); if (rc) return rc; diff --git a/driver/platform/pineapple/src/msm_vidc_pineapple.c b/driver/platform/pineapple/src/msm_vidc_pineapple.c index bf86f88a97..57497665bc 100644 --- a/driver/platform/pineapple/src/msm_vidc_pineapple.c +++ b/driver/platform/pineapple/src/msm_vidc_pineapple.c @@ -16,6 +16,7 @@ #include "msm_vidc_debug.h" #include "msm_vidc_internal.h" #include "msm_vidc_control_ext.h" +#include "msm_vidc_memory_ext.h" #include "hfi_property.h" #include "msm_vidc_iris33.h" #include "hfi_command.h" @@ -2720,6 +2721,25 @@ static const struct msm_vidc_platform_data pineapple_data = { .format_data = &format_data_pineapple, }; +static struct msm_vidc_memory_ops pineapple_msm_mem_ops = { + .dma_buf_attach = msm_vidc_dma_buf_attach_ext, + .dma_buf_detach = msm_vidc_dma_buf_detach, + .dma_buf_map_attachment = msm_vidc_dma_buf_map_attachment, + .dma_buf_unmap_attachment = msm_vidc_dma_buf_unmap_attachment, + .memory_alloc = msm_vidc_memory_alloc_ext, + .memory_free = msm_vidc_memory_free_ext, + .memory_map = msm_vidc_memory_map_ext, + .memory_unmap = msm_vidc_memory_unmap, + .buffer_region = msm_vidc_buffer_region_ext, + .dma_buf_get = msm_vidc_dma_buf_get, + .dma_buf_put = msm_vidc_dma_buf_put, + .dma_buf_put_completely = msm_vidc_dma_buf_put_completely, + .pools_init = msm_vidc_pools_init, + .pools_deinit = msm_vidc_pools_deinit, + .pool_alloc = msm_vidc_pool_alloc, + .pool_free = msm_vidc_pool_free, +}; + int msm_vidc_pineapple_check_ddr_type(void) { u32 ddr_type; @@ -2746,6 +2766,7 @@ static int msm_vidc_init_data(struct msm_vidc_core *core) d_vpr_h("%s: initialize pineapple data\n", __func__); core->platform->data = pineapple_data; + core->mem_ops = &pineapple_msm_mem_ops; rc = msm_vidc_pineapple_check_ddr_type(); if (rc) return rc; diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 8dc658684d..d12f909b53 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -457,8 +457,6 @@ int msm_vidc_event_queue_deinit(struct msm_vidc_inst *inst); int msm_vidc_vb2_queue_init(struct msm_vidc_inst *inst); int msm_vidc_vb2_queue_deinit(struct msm_vidc_inst *inst); int msm_vidc_get_control(struct msm_vidc_inst *inst, struct v4l2_ctrl *ctrl); -u32 msm_vidc_get_buffer_region(struct msm_vidc_inst *inst, - enum msm_vidc_buffer_type buffer_type, const char *func); struct msm_vidc_buffers *msm_vidc_get_buffers(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type buffer_type, const char *func); struct msm_vidc_mappings *msm_vidc_get_mappings(struct msm_vidc_inst *inst, @@ -595,5 +593,9 @@ int msm_vidc_alloc_and_queue_input_internal_buffers(struct msm_vidc_inst *inst); int vb2_buffer_to_driver(struct vb2_buffer *vb2, struct msm_vidc_buffer *buf); struct msm_vidc_buffer *msm_vidc_fetch_buffer(struct msm_vidc_inst *inst, struct vb2_buffer *vb2); +struct context_bank_info *msm_vidc_get_context_bank_for_region(struct msm_vidc_core *core, + enum msm_vidc_buffer_region region); +struct context_bank_info *msm_vidc_get_context_bank_for_device( + struct msm_vidc_core *core, struct device *dev); #endif // _MSM_VIDC_DRIVER_H_ diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index d3af40132e..476d3871c5 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -955,17 +955,4 @@ struct msm_vidc_sfr { u8 rg_data[1]; }; -#define call_mem_op(c, op, ...) \ - (((c) && (c)->mem_ops && (c)->mem_ops->op) ? \ - ((c)->mem_ops->op(__VA_ARGS__)) : 0) - -struct msm_vidc_memory_ops { - int (*allocate)(void *inst, struct msm_vidc_buffer *mbuf); - int (*dma_map)(void *inst, struct msm_vidc_buffer *mbuf); - int (*dma_unmap)(void *inst, struct msm_vidc_buffer *mbuf); - int (*free)(void *inst, struct msm_vidc_buffer *mbuf); - int (*cache_op)(void *inst, struct msm_vidc_buffer *mbuf, - enum msm_vidc_cache_op cache_op); -}; - #endif // _MSM_VIDC_INTERNAL_H_ diff --git a/driver/vidc/inc/msm_vidc_memory.h b/driver/vidc/inc/msm_vidc_memory.h index c01dae35f1..2af6aa4294 100644 --- a/driver/vidc/inc/msm_vidc_memory.h +++ b/driver/vidc/inc/msm_vidc_memory.h @@ -53,28 +53,28 @@ int msm_vidc_memory_map(struct msm_vidc_core *core, struct msm_vidc_map *map); int msm_vidc_memory_unmap(struct msm_vidc_core *core, struct msm_vidc_map *map); -struct dma_buf *msm_vidc_memory_get_dmabuf(struct msm_vidc_inst *inst, +struct dma_buf *msm_vidc_dma_buf_get(struct msm_vidc_inst *inst, int fd); -void msm_vidc_memory_put_dmabuf(struct msm_vidc_inst *inst, +void msm_vidc_dma_buf_put(struct msm_vidc_inst *inst, struct dma_buf *dmabuf); -void msm_vidc_memory_put_dmabuf_completely(struct msm_vidc_inst *inst, +void msm_vidc_dma_buf_put_completely(struct msm_vidc_inst *inst, struct msm_memory_dmabuf *buf); -int msm_memory_pools_init(struct msm_vidc_inst *inst); -void msm_memory_pools_deinit(struct msm_vidc_inst *inst); -void *msm_memory_pool_alloc(struct msm_vidc_inst *inst, +int msm_vidc_pools_init(struct msm_vidc_inst *inst); +void msm_vidc_pools_deinit(struct msm_vidc_inst *inst); +void *msm_vidc_pool_alloc(struct msm_vidc_inst *inst, enum msm_memory_pool_type type); -void msm_memory_pool_free(struct msm_vidc_inst *inst, void *vidc_buf); +void msm_vidc_pool_free(struct msm_vidc_inst *inst, void *vidc_buf); int msm_vidc_vmem_alloc(unsigned long size, void **mem, const char *msg); void msm_vidc_vmem_free(void **addr); -struct context_bank_info *msm_vidc_get_context_bank(struct msm_vidc_core *core, - enum msm_vidc_buffer_region region); -struct dma_buf_attachment *msm_vidc_dma_buf_attach(struct dma_buf *dbuf, - struct device *dev); -int msm_vidc_dma_buf_detach(struct dma_buf *dbuf, +struct dma_buf_attachment *msm_vidc_dma_buf_attach(struct msm_vidc_core *core, + struct dma_buf *dbuf, struct device *dev); +int msm_vidc_dma_buf_detach(struct msm_vidc_core *core, struct dma_buf *dbuf, struct dma_buf_attachment *attach); -struct sg_table *msm_vidc_dma_buf_map_attachment( +struct sg_table *msm_vidc_dma_buf_map_attachment(struct msm_vidc_core *core, struct dma_buf_attachment *attach); -int msm_vidc_dma_buf_unmap_attachment(struct dma_buf_attachment *attach, - struct sg_table *table); +int msm_vidc_dma_buf_unmap_attachment(struct msm_vidc_core *core, + struct dma_buf_attachment *attach, struct sg_table *table); +u32 msm_vidc_buffer_region(struct msm_vidc_inst *inst, + enum msm_vidc_buffer_type buffer_type); #endif // _MSM_VIDC_MEMORY_H_ \ No newline at end of file diff --git a/driver/vidc/inc/msm_vidc_memory_ext.h b/driver/vidc/inc/msm_vidc_memory_ext.h new file mode 100644 index 0000000000..0d95ec52e1 --- /dev/null +++ b/driver/vidc/inc/msm_vidc_memory_ext.h @@ -0,0 +1,22 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. + * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#ifndef _MSM_VIDC_MEMORY_EXT_H_ +#define _MSM_VIDC_MEMORY_EXT_H_ + +#include "msm_vidc_memory.h" + +struct dma_buf_attachment *msm_vidc_dma_buf_attach_ext(struct msm_vidc_core *core, + struct dma_buf *dbuf, struct device *dev); +int msm_vidc_memory_alloc_ext(struct msm_vidc_core *core, + struct msm_vidc_alloc *alloc); +int msm_vidc_memory_free_ext(struct msm_vidc_core *core, struct msm_vidc_alloc *mem); +int msm_vidc_memory_map_ext(struct msm_vidc_core *core, + struct msm_vidc_map *map); +u32 msm_vidc_buffer_region_ext(struct msm_vidc_inst *inst, + enum msm_vidc_buffer_type buffer_type); + +#endif // _MSM_VIDC_MEMORY_EXT_H_ \ No newline at end of file diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index 11eea75c86..645a173bb0 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -21,6 +21,7 @@ #include "msm_vidc_memory.h" #include "venus_hfi_response.h" #include "msm_vidc.h" +#include "msm_vidc_platform.h" extern const char video_banner[]; @@ -910,7 +911,7 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) msm_vidc_update_debug_str(inst); i_vpr_h(inst, "Opening video instance: %d\n", session_type); - rc = msm_memory_pools_init(inst); + rc = call_mem_op(core, pools_init, inst); if (rc) { i_vpr_e(inst, "%s: failed to init pool buffers\n", __func__); msm_vidc_vmem_free((void **)&inst); diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 6273594983..305c1b9530 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -547,11 +547,13 @@ int msm_vidc_add_buffer_stats(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buf) { struct msm_vidc_buffer_stats *stats = NULL; + struct msm_vidc_core *core; - if (!inst || !buf) { + if (!inst || !inst->core || !buf) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } + core = inst->core; /* stats applicable only to input & output buffers */ if (buf->type != MSM_VIDC_BUF_INPUT && buf->type != MSM_VIDC_BUF_OUTPUT) @@ -564,7 +566,7 @@ int msm_vidc_add_buffer_stats(struct msm_vidc_inst *inst, if (buf->type != MSM_VIDC_BUF_INPUT) return 0; - stats = msm_memory_pool_alloc(inst, MSM_MEM_POOL_BUF_STATS); + stats = call_mem_op(core, pool_alloc, inst, MSM_MEM_POOL_BUF_STATS); if (!stats) return -ENOMEM; INIT_LIST_HEAD(&stats->list); @@ -583,11 +585,13 @@ int msm_vidc_remove_buffer_stats(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buf) { struct msm_vidc_buffer_stats *stats = NULL, *dummy_stats = NULL; + struct msm_vidc_core *core; - if (!inst || !buf) { + if (!inst || !inst->core || !buf) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } + core = inst->core; /* stats applicable only to input & output buffers */ if (buf->type != MSM_VIDC_BUF_INPUT && buf->type != MSM_VIDC_BUF_OUTPUT) @@ -610,7 +614,7 @@ int msm_vidc_remove_buffer_stats(struct msm_vidc_inst *inst, /* remove entry - no output attached */ if (stats->flags & MSM_VIDC_STATS_FLAG_NO_OUTPUT) { list_del_init(&stats->list); - msm_memory_pool_free(inst, stats); + call_mem_op(core, pool_free, inst, stats); } } else if (buf->type == MSM_VIDC_BUF_OUTPUT) { /* skip - ebd not arrived(single input - multiple output case) */ @@ -627,7 +631,7 @@ int msm_vidc_remove_buffer_stats(struct msm_vidc_inst *inst, print_buffer_stats(VIDC_STAT, "stat", inst, stats); - msm_memory_pool_free(inst, stats); + call_mem_op(core, pool_free, inst, stats); } } } @@ -638,16 +642,18 @@ int msm_vidc_remove_buffer_stats(struct msm_vidc_inst *inst, int msm_vidc_flush_buffer_stats(struct msm_vidc_inst *inst) { struct msm_vidc_buffer_stats *stats, *dummy_stats; + struct msm_vidc_core *core; - if (!inst) { + if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } + core = inst->core; i_vpr_l(inst, "%s: flush buffer_stats list\n", __func__); list_for_each_entry_safe(stats, dummy_stats, &inst->buffer_stats_list, list) { list_del_init(&stats->list); - msm_memory_pool_free(inst, stats); + call_mem_op(core, pool_free, inst, stats); } /* reset initial ts as well to avoid huge delta */ @@ -1042,88 +1048,6 @@ int v4l2_type_to_driver_port(struct msm_vidc_inst *inst, u32 type, return port; } -u32 msm_vidc_get_buffer_region(struct msm_vidc_inst *inst, - enum msm_vidc_buffer_type buffer_type, const char *func) -{ - u32 region = MSM_VIDC_NON_SECURE; - - if (!is_secure_session(inst)) { - switch (buffer_type) { - case MSM_VIDC_BUF_ARP: - region = MSM_VIDC_SECURE_NONPIXEL; - break; - case MSM_VIDC_BUF_INPUT: - if (is_encode_session(inst)) - region = MSM_VIDC_NON_SECURE_PIXEL; - else - region = MSM_VIDC_NON_SECURE; - break; - case MSM_VIDC_BUF_OUTPUT: - if (is_encode_session(inst)) - region = MSM_VIDC_NON_SECURE; - else - region = MSM_VIDC_NON_SECURE_PIXEL; - break; - case MSM_VIDC_BUF_DPB: - case MSM_VIDC_BUF_VPSS: - case MSM_VIDC_BUF_PARTIAL_DATA: - region = MSM_VIDC_NON_SECURE_PIXEL; - break; - case MSM_VIDC_BUF_INPUT_META: - case MSM_VIDC_BUF_OUTPUT_META: - case MSM_VIDC_BUF_BIN: - case MSM_VIDC_BUF_COMV: - case MSM_VIDC_BUF_NON_COMV: - case MSM_VIDC_BUF_LINE: - case MSM_VIDC_BUF_PERSIST: - region = MSM_VIDC_NON_SECURE; - break; - default: - i_vpr_e(inst, "%s: invalid driver buffer type %d\n", - func, buffer_type); - } - } else { - switch (buffer_type) { - case MSM_VIDC_BUF_INPUT: - if (is_encode_session(inst)) - region = MSM_VIDC_SECURE_PIXEL; - else - region = MSM_VIDC_SECURE_BITSTREAM; - break; - case MSM_VIDC_BUF_OUTPUT: - if (is_encode_session(inst)) - region = MSM_VIDC_SECURE_BITSTREAM; - else - region = MSM_VIDC_SECURE_PIXEL; - break; - case MSM_VIDC_BUF_INPUT_META: - case MSM_VIDC_BUF_OUTPUT_META: - region = MSM_VIDC_NON_SECURE; - break; - case MSM_VIDC_BUF_DPB: - case MSM_VIDC_BUF_VPSS: - case MSM_VIDC_BUF_PARTIAL_DATA: - region = MSM_VIDC_SECURE_PIXEL; - break; - case MSM_VIDC_BUF_BIN: - region = MSM_VIDC_SECURE_BITSTREAM; - break; - case MSM_VIDC_BUF_ARP: - case MSM_VIDC_BUF_COMV: - case MSM_VIDC_BUF_NON_COMV: - case MSM_VIDC_BUF_LINE: - case MSM_VIDC_BUF_PERSIST: - region = MSM_VIDC_SECURE_NONPIXEL; - break; - default: - i_vpr_e(inst, "%s: invalid driver buffer type %d\n", - func, buffer_type); - } - } - - return region; -} - struct msm_vidc_buffers *msm_vidc_get_buffers( struct msm_vidc_inst *inst, enum msm_vidc_buffer_type buffer_type, const char *func) @@ -2490,11 +2414,13 @@ int msm_vidc_process_readonly_buffers(struct msm_vidc_inst *inst, { int rc = 0; struct msm_vidc_buffer *ro_buf, *dummy; + struct msm_vidc_core *core; - if (!inst || !buf) { + if (!inst || !inst->core || !buf) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } + core = inst->core; if (!is_decode_session(inst) || !is_output_buffer(buf->type)) return 0; @@ -2529,19 +2455,21 @@ int msm_vidc_process_readonly_buffers(struct msm_vidc_inst *inst, print_vidc_buffer(VIDC_LOW, "low ", "ro buf removed", inst, ro_buf); /* unmap the buffer if driver holds mapping */ if (ro_buf->sg_table && ro_buf->attach) { - msm_vidc_dma_buf_unmap_attachment(ro_buf->attach, ro_buf->sg_table); - msm_vidc_dma_buf_detach(ro_buf->dmabuf, ro_buf->attach); + call_mem_op(core, dma_buf_unmap_attachment, core, + ro_buf->attach, ro_buf->sg_table); + call_mem_op(core, dma_buf_detach, core, + ro_buf->dmabuf, ro_buf->attach); ro_buf->dmabuf = NULL; ro_buf->attach = NULL; } if (ro_buf->dbuf_get) { - msm_vidc_memory_put_dmabuf(inst, ro_buf->dmabuf); + call_mem_op(core, dma_buf_put, inst, ro_buf->dmabuf); ro_buf->dmabuf = NULL; ro_buf->dbuf_get = 0; } list_del_init(&ro_buf->list); - msm_memory_pool_free(inst, ro_buf); + call_mem_op(core, pool_free, inst, ro_buf); } return rc; @@ -2613,15 +2541,17 @@ int msm_vidc_update_input_rate(struct msm_vidc_inst *inst, u64 time_us) { struct msm_vidc_input_timer *input_timer; struct msm_vidc_input_timer *prev_timer = NULL; + struct msm_vidc_core *core; u64 counter = 0; u64 input_timer_sum_us = 0; - if (!inst || !inst->capabilities) { + if (!inst || !inst->core || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } + core = inst->core; - input_timer = msm_memory_pool_alloc(inst, MSM_MEM_POOL_BUF_TIMER); + input_timer = call_mem_op(core, pool_alloc, inst, MSM_MEM_POOL_BUF_TIMER); if (!input_timer) return -ENOMEM; @@ -2646,7 +2576,7 @@ int msm_vidc_update_input_rate(struct msm_vidc_inst *inst, u64 time_us) input_timer = list_first_entry(&inst->input_timer_list, struct msm_vidc_input_timer, list); list_del_init(&input_timer->list); - msm_memory_pool_free(inst, input_timer); + call_mem_op(core, pool_free, inst, input_timer); } return 0; @@ -2655,16 +2585,18 @@ int msm_vidc_update_input_rate(struct msm_vidc_inst *inst, u64 time_us) int msm_vidc_flush_input_timer(struct msm_vidc_inst *inst) { struct msm_vidc_input_timer *input_timer, *dummy_timer; + struct msm_vidc_core *core; - if (!inst || !inst->capabilities) { + if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } + core = inst->core; i_vpr_l(inst, "%s: flush input_timer list\n", __func__); list_for_each_entry_safe(input_timer, dummy_timer, &inst->input_timer_list, list) { list_del_init(&input_timer->list); - msm_memory_pool_free(inst, input_timer); + call_mem_op(core, pool_free, inst, input_timer); } return 0; } @@ -2771,17 +2703,19 @@ static struct msm_vidc_timestamp *msm_vidc_get_least_rank_ts(struct msm_vidc_ins int msm_vidc_flush_ts(struct msm_vidc_inst *inst) { struct msm_vidc_timestamp *temp, *ts = NULL; + struct msm_vidc_core *core; - if (!inst) { - d_vpr_e("%s: Invalid params\n", __func__); + if (!inst || !inst->core ) { + d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } + core = inst->core; list_for_each_entry_safe(ts, temp, &inst->timestamps.list, sort.list) { i_vpr_l(inst, "%s: flushing ts: val %llu, rank %llu\n", __func__, ts->sort.val, ts->rank); list_del(&ts->sort.list); - msm_memory_pool_free(inst, ts); + call_mem_op(core, pool_free, inst, ts); } inst->timestamps.count = 0; inst->timestamps.rank = 0; @@ -2792,18 +2726,20 @@ int msm_vidc_flush_ts(struct msm_vidc_inst *inst) int msm_vidc_update_timestamp_rate(struct msm_vidc_inst *inst, u64 timestamp) { struct msm_vidc_timestamp *ts, *prev = NULL; + struct msm_vidc_core *core; int rc = 0; u32 window_size = 0; u32 timestamp_rate = 0; u64 ts_ms = 0; u32 counter = 0; - if (!inst) { - d_vpr_e("%s: Invalid params\n", __func__); + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } + core = inst->core; - ts = msm_memory_pool_alloc(inst, MSM_MEM_POOL_TIMESTAMP); + ts = call_mem_op(core, pool_alloc, inst, MSM_MEM_POOL_TIMESTAMP); if (!ts) { i_vpr_e(inst, "%s: ts alloc failed\n", __func__); return -ENOMEM; @@ -2831,7 +2767,7 @@ int msm_vidc_update_timestamp_rate(struct msm_vidc_inst *inst, u64 timestamp) } inst->timestamps.count--; list_del(&ts->sort.list); - msm_memory_pool_free(inst, ts); + call_mem_op(core, pool_free, inst, ts); } /* Calculate timestamp rate */ @@ -2855,15 +2791,17 @@ int msm_vidc_update_timestamp_rate(struct msm_vidc_inst *inst, u64 timestamp) int msm_vidc_ts_reorder_insert_timestamp(struct msm_vidc_inst *inst, u64 timestamp) { struct msm_vidc_timestamp *ts; + struct msm_vidc_core *core; int rc = 0; - if (!inst) { - d_vpr_e("%s: Invalid params\n", __func__); + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } + core = inst->core; /* allocate ts from pool */ - ts = msm_memory_pool_alloc(inst, MSM_MEM_POOL_TIMESTAMP); + ts = call_mem_op(core, pool_alloc, inst, MSM_MEM_POOL_TIMESTAMP); if (!ts) { i_vpr_e(inst, "%s: ts alloc failed\n", __func__); return -ENOMEM; @@ -2883,18 +2821,20 @@ int msm_vidc_ts_reorder_insert_timestamp(struct msm_vidc_inst *inst, u64 timesta int msm_vidc_ts_reorder_remove_timestamp(struct msm_vidc_inst *inst, u64 timestamp) { struct msm_vidc_timestamp *ts, *temp; + struct msm_vidc_core *core; - if (!inst) { - d_vpr_e("%s: Invalid params\n", __func__); + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } + core = inst->core; /* remove matching node */ list_for_each_entry_safe(ts, temp, &inst->ts_reorder.list, sort.list) { if (ts->sort.val == timestamp) { list_del_init(&ts->sort.list); inst->ts_reorder.count--; - msm_memory_pool_free(inst, ts); + call_mem_op(core, pool_free, inst, ts); break; } } @@ -2905,11 +2845,13 @@ int msm_vidc_ts_reorder_remove_timestamp(struct msm_vidc_inst *inst, u64 timesta int msm_vidc_ts_reorder_get_first_timestamp(struct msm_vidc_inst *inst, u64 *timestamp) { struct msm_vidc_timestamp *ts; + struct msm_vidc_core *core; - if (!inst || !timestamp) { + if (!inst || !inst->core || !timestamp) { d_vpr_e("%s: Invalid params\n", __func__); return -EINVAL; } + core = inst->core; /* check if list empty */ if (list_empty(&inst->ts_reorder.list)) { @@ -2926,7 +2868,7 @@ int msm_vidc_ts_reorder_get_first_timestamp(struct msm_vidc_inst *inst, u64 *tim *timestamp = ts->sort.val; inst->ts_reorder.count--; - msm_memory_pool_free(inst, ts); + call_mem_op(core, pool_free, inst, ts); return 0; } @@ -2934,17 +2876,19 @@ int msm_vidc_ts_reorder_get_first_timestamp(struct msm_vidc_inst *inst, u64 *tim int msm_vidc_ts_reorder_flush(struct msm_vidc_inst *inst) { struct msm_vidc_timestamp *temp, *ts = NULL; + struct msm_vidc_core *core; - if (!inst) { + if (!inst || !inst->core) { d_vpr_e("%s: Invalid params\n", __func__); return -EINVAL; } + core = inst->core; /* flush all entries */ list_for_each_entry_safe(ts, temp, &inst->ts_reorder.list, sort.list) { i_vpr_l(inst, "%s: flushing ts: val %lld\n", __func__, ts->sort.val); list_del(&ts->sort.list); - msm_memory_pool_free(inst, ts); + call_mem_op(core, pool_free, inst, ts); } inst->ts_reorder.count = 0; @@ -2956,11 +2900,13 @@ struct msm_vidc_buffer *msm_vidc_get_driver_buf(struct msm_vidc_inst *inst, { int rc = 0; struct msm_vidc_buffer *buf; + struct msm_vidc_core *core; - if (!inst || !vb2) { - d_vpr_e("%s: invalid params\n", __func__); + if (!inst || !inst->core || !vb2) { + d_vpr_e("%s: Invalid params\n", __func__); return NULL; } + core = inst->core; buf = msm_vidc_fetch_buffer(inst, vb2); if (!buf) { @@ -2978,7 +2924,7 @@ struct msm_vidc_buffer *msm_vidc_get_driver_buf(struct msm_vidc_inst *inst, if (is_decode_session(inst) && is_output_buffer(buf->type)) { /* get a reference */ if (!buf->dbuf_get) { - buf->dmabuf = msm_vidc_memory_get_dmabuf(inst, buf->fd); + buf->dmabuf = call_mem_op(core, dma_buf_get, inst, buf->fd); if (!buf->dmabuf) return NULL; buf->dbuf_get = 1; @@ -2998,18 +2944,20 @@ int msm_vidc_allocate_buffers(struct msm_vidc_inst *inst, int idx = 0; struct msm_vidc_buffer *buf = NULL; struct msm_vidc_buffers *buffers; + struct msm_vidc_core *core; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); + if (!inst || !inst->core) { + d_vpr_e("%s: Invalid params\n", __func__); return -EINVAL; } + core = inst->core; buffers = msm_vidc_get_buffers(inst, buf_type, __func__); if (!buffers) return -EINVAL; for (idx = 0; idx < num_buffers; idx++) { - buf = msm_memory_pool_alloc(inst, MSM_MEM_POOL_BUFFER); + buf = call_mem_op(core, pool_alloc, inst, MSM_MEM_POOL_BUFFER); if (!buf) { i_vpr_e(inst, "%s: alloc failed\n", __func__); return -EINVAL; @@ -3032,11 +2980,13 @@ int msm_vidc_free_buffers(struct msm_vidc_inst *inst, int buf_count = 0; struct msm_vidc_buffer *buf, *dummy; struct msm_vidc_buffers *buffers; + struct msm_vidc_core *core; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); + if (!inst || !inst->core) { + d_vpr_e("%s: Invalid params\n", __func__); return -EINVAL; } + core = inst->core; buffers = msm_vidc_get_buffers(inst, buf_type, __func__); if (!buffers) @@ -3046,7 +2996,7 @@ int msm_vidc_free_buffers(struct msm_vidc_inst *inst, buf_count++; print_vidc_buffer(VIDC_LOW, "low ", "free buffer", inst, buf); list_del_init(&buf->list); - msm_memory_pool_free(inst, buf); + call_mem_op(core, pool_free, inst, buf); } i_vpr_h(inst, "%s: freed %d buffers for type %s\n", __func__, buf_count, buf_name(buf_type)); @@ -3650,11 +3600,13 @@ int msm_vidc_destroy_internal_buffer(struct msm_vidc_inst *inst, struct msm_vidc_alloc *alloc, *alloc_dummy; struct msm_vidc_map *map, *map_dummy; struct msm_vidc_buffer *buf, *dummy; + struct msm_vidc_core *core; if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } + core = inst->core; if (!is_internal_buffer(buffer->type)) { i_vpr_e(inst, "%s: type: %s is not internal\n", @@ -3677,18 +3629,18 @@ int msm_vidc_destroy_internal_buffer(struct msm_vidc_inst *inst, list_for_each_entry_safe(map, map_dummy, &mappings->list, list) { if (map->dmabuf == buffer->dmabuf) { - msm_vidc_memory_unmap(inst->core, map); + call_mem_op(core, memory_unmap, core, map); list_del(&map->list); - msm_memory_pool_free(inst, map); + call_mem_op(core, pool_free, inst, map); break; } } list_for_each_entry_safe(alloc, alloc_dummy, &allocations->list, list) { if (alloc->dmabuf == buffer->dmabuf) { - msm_vidc_memory_free(inst->core, alloc); + call_mem_op(core, memory_free, core, alloc); list_del(&alloc->list); - msm_memory_pool_free(inst, alloc); + call_mem_op(core, pool_free, inst, alloc); break; } } @@ -3696,7 +3648,7 @@ int msm_vidc_destroy_internal_buffer(struct msm_vidc_inst *inst, list_for_each_entry_safe(buf, dummy, &buffers->list, list) { if (buf->dmabuf == buffer->dmabuf) { list_del(&buf->list); - msm_memory_pool_free(inst, buf); + call_mem_op(core, pool_free, inst, buf); break; } } @@ -3752,11 +3704,13 @@ int msm_vidc_create_internal_buffer(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buffer; struct msm_vidc_alloc *alloc; struct msm_vidc_map *map; + struct msm_vidc_core *core; if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } + core = inst->core; if (!is_internal_buffer(buffer_type)) { i_vpr_e(inst, "%s: type %s is not internal\n", __func__, buf_name(buffer_type)); @@ -3776,7 +3730,7 @@ int msm_vidc_create_internal_buffer(struct msm_vidc_inst *inst, if (!buffers->size) return 0; - buffer = msm_memory_pool_alloc(inst, MSM_MEM_POOL_BUFFER); + buffer = call_mem_op(core, pool_alloc, inst, MSM_MEM_POOL_BUFFER); if (!buffer) { i_vpr_e(inst, "%s: buf alloc failed\n", __func__); return -ENOMEM; @@ -3787,23 +3741,22 @@ int msm_vidc_create_internal_buffer(struct msm_vidc_inst *inst, buffer->buffer_size = buffers->size; list_add_tail(&buffer->list, &buffers->list); - alloc = msm_memory_pool_alloc(inst, MSM_MEM_POOL_ALLOC); + alloc = call_mem_op(core, pool_alloc, inst, MSM_MEM_POOL_ALLOC); if (!alloc) { i_vpr_e(inst, "%s: alloc failed\n", __func__); return -ENOMEM; } INIT_LIST_HEAD(&alloc->list); alloc->type = buffer_type; - alloc->region = msm_vidc_get_buffer_region(inst, - buffer_type, __func__); + alloc->region = call_mem_op(core, buffer_region, inst, buffer_type); alloc->size = buffer->buffer_size; alloc->secure = is_secure_region(alloc->region); - rc = msm_vidc_memory_alloc(inst->core, alloc); + rc = call_mem_op(core, memory_alloc, core, alloc); if (rc) return -ENOMEM; list_add_tail(&alloc->list, &allocations->list); - map = msm_memory_pool_alloc(inst, MSM_MEM_POOL_MAP); + map = call_mem_op(core, pool_alloc, inst, MSM_MEM_POOL_MAP); if (!map) { i_vpr_e(inst, "%s: map alloc failed\n", __func__); return -ENOMEM; @@ -3812,7 +3765,7 @@ int msm_vidc_create_internal_buffer(struct msm_vidc_inst *inst, map->type = alloc->type; map->region = alloc->region; map->dmabuf = alloc->dmabuf; - rc = msm_vidc_memory_map(inst->core, map); + rc = call_mem_op(core, memory_map, core, map); if (rc) return -ENOMEM; list_add_tail(&map->list, &mappings->list); @@ -5408,15 +5361,17 @@ int msm_vidc_flush_buffers(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type type) { int rc = 0; + struct msm_vidc_core *core; struct msm_vidc_buffers *buffers; struct msm_vidc_buffer *buf, *dummy; enum msm_vidc_buffer_type buffer_type[2]; int i; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); + if (!inst || !inst->core) { + d_vpr_e("%s: Invalid params\n", __func__); return -EINVAL; } + core = inst->core; if (type == MSM_VIDC_BUF_INPUT) { buffer_type[0] = MSM_VIDC_BUF_INPUT_META; @@ -5442,7 +5397,7 @@ int msm_vidc_flush_buffers(struct msm_vidc_inst *inst, if (!(buf->attr & MSM_VIDC_ATTR_BUFFER_DONE)) { if (is_decode_session(inst) && is_output_buffer(buf->type)) { if (buf->dbuf_get) { - msm_vidc_memory_put_dmabuf(inst, buf->dmabuf); + call_mem_op(core, dma_buf_put, inst, buf->dmabuf); buf->dbuf_get = 0; } } @@ -5461,11 +5416,13 @@ int msm_vidc_flush_read_only_buffers(struct msm_vidc_inst *inst, { int rc = 0; struct msm_vidc_buffer *ro_buf, *dummy; + struct msm_vidc_core *core; - if (!inst) { + if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } + core = inst->core; if (!is_decode_session(inst) || !is_output_buffer(type)) return 0; @@ -5475,18 +5432,20 @@ int msm_vidc_flush_read_only_buffers(struct msm_vidc_inst *inst, continue; print_vidc_buffer(VIDC_ERR, "high", "flush ro buf", inst, ro_buf); if (ro_buf->attach && ro_buf->sg_table) - msm_vidc_dma_buf_unmap_attachment(ro_buf->attach, ro_buf->sg_table); + call_mem_op(core, dma_buf_unmap_attachment, core, + ro_buf->attach, ro_buf->sg_table); if (ro_buf->attach && ro_buf->dmabuf) - msm_vidc_dma_buf_detach(ro_buf->dmabuf, ro_buf->attach); + call_mem_op(core, dma_buf_detach, core, + ro_buf->dmabuf, ro_buf->attach); if (ro_buf->dbuf_get) - msm_vidc_memory_put_dmabuf(inst, ro_buf->dmabuf); + call_mem_op(core, dma_buf_put, inst, ro_buf->dmabuf); ro_buf->attach = NULL; ro_buf->sg_table = NULL; ro_buf->dmabuf = NULL; ro_buf->dbuf_get = 0; ro_buf->device_addr = 0x0; list_del_init(&ro_buf->list); - msm_memory_pool_free(inst, ro_buf); + call_mem_op(core, pool_free, inst, ro_buf); } return rc; @@ -5502,6 +5461,7 @@ void msm_vidc_destroy_buffers(struct msm_vidc_inst *inst) struct msm_vidc_buffer_stats *stats, *dummy_stats; struct msm_vidc_inst_cap_entry *entry, *dummy_entry; struct msm_vidc_fence *fence, *dummy_fence; + struct msm_vidc_core *core; static const enum msm_vidc_buffer_type ext_buf_types[] = { MSM_VIDC_BUF_INPUT, @@ -5522,10 +5482,11 @@ void msm_vidc_destroy_buffers(struct msm_vidc_inst *inst) }; int i; - if (!inst) { + if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return; } + core = inst->core; for (i = 0; i < ARRAY_SIZE(internal_buf_types); i++) { buffers = msm_vidc_get_buffers(inst, internal_buf_types[i], __func__); @@ -5547,13 +5508,14 @@ void msm_vidc_destroy_buffers(struct msm_vidc_inst *inst) list_for_each_entry_safe(buf, dummy, &inst->buffers.read_only.list, list) { print_vidc_buffer(VIDC_ERR, "err ", "destroying ro buf", inst, buf); if (buf->attach && buf->sg_table) - msm_vidc_dma_buf_unmap_attachment(buf->attach, buf->sg_table); + call_mem_op(core, dma_buf_unmap_attachment, core, + buf->attach, buf->sg_table); if (buf->attach && buf->dmabuf) - msm_vidc_dma_buf_detach(buf->dmabuf, buf->attach); + call_mem_op(core, dma_buf_detach, core, buf->dmabuf, buf->attach); if (buf->dbuf_get) - msm_vidc_memory_put_dmabuf(inst, buf->dmabuf); + call_mem_op(core, dma_buf_put, inst, buf->dmabuf); list_del_init(&buf->list); - msm_memory_pool_free(inst, buf); + call_mem_op(core, pool_free, inst, buf); } for (i = 0; i < ARRAY_SIZE(ext_buf_types); i++) { @@ -5563,15 +5525,16 @@ void msm_vidc_destroy_buffers(struct msm_vidc_inst *inst) list_for_each_entry_safe(buf, dummy, &buffers->list, list) { if (buf->attach && buf->sg_table) - msm_vidc_dma_buf_unmap_attachment(buf->attach, buf->sg_table); + call_mem_op(core, dma_buf_unmap_attachment, core, + buf->attach, buf->sg_table); if (buf->attach && buf->dmabuf) - msm_vidc_dma_buf_detach(buf->dmabuf, buf->attach); + call_mem_op(core, dma_buf_detach, core, buf->dmabuf, buf->attach); if (buf->dbuf_get) { print_vidc_buffer(VIDC_ERR, "err ", "destroying: put dmabuf", inst, buf); - msm_vidc_memory_put_dmabuf(inst, buf->dmabuf); + call_mem_op(core, dma_buf_put, inst, buf->dmabuf); } list_del_init(&buf->list); - msm_memory_pool_free(inst, buf); + call_mem_op(core, pool_free, inst, buf); } } @@ -5579,27 +5542,27 @@ void msm_vidc_destroy_buffers(struct msm_vidc_inst *inst) i_vpr_e(inst, "%s: removing ts: val %lld, rank %lld\n", __func__, ts->sort.val, ts->rank); list_del(&ts->sort.list); - msm_memory_pool_free(inst, ts); + call_mem_op(core, pool_free, inst, ts); } list_for_each_entry_safe(ts, dummy_ts, &inst->ts_reorder.list, sort.list) { i_vpr_e(inst, "%s: removing reorder ts: val %lld\n", __func__, ts->sort.val); list_del(&ts->sort.list); - msm_memory_pool_free(inst, ts); + call_mem_op(core, pool_free, inst, ts); } list_for_each_entry_safe(timer, dummy_timer, &inst->input_timer_list, list) { i_vpr_e(inst, "%s: removing input_timer %lld\n", __func__, timer->time_us); list_del(&timer->list); - msm_memory_pool_free(inst, timer); + call_mem_op(core, pool_free, inst, timer); } list_for_each_entry_safe(stats, dummy_stats, &inst->buffer_stats_list, list) { print_buffer_stats(VIDC_ERR, "err ", inst, stats); list_del(&stats->list); - msm_memory_pool_free(inst, stats); + call_mem_op(core, pool_free, inst, stats); } list_for_each_entry_safe(dbuf, dummy_dbuf, &inst->dmabuf_tracker, list) { @@ -5616,7 +5579,7 @@ void msm_vidc_destroy_buffers(struct msm_vidc_inst *inst) } i_vpr_e(inst, "%s: removing dma_buf %#lx, inode %lu, refcount %u\n", __func__, dbuf->dmabuf, inode_num, dbuf->refcount); - msm_vidc_memory_put_dmabuf_completely(inst, dbuf); + call_mem_op(core, dma_buf_put_completely, inst, dbuf); } list_for_each_entry_safe(entry, dummy_entry, &inst->firmware_list, list) { @@ -5642,7 +5605,7 @@ void msm_vidc_destroy_buffers(struct msm_vidc_inst *inst) } /* destroy buffers from pool */ - msm_memory_pools_deinit(inst); + call_mem_op(core, pools_deinit, inst); } static void msm_vidc_close_helper(struct kref *kref) @@ -6647,3 +6610,47 @@ int msm_vidc_get_properties(struct msm_vidc_inst *inst) return 0; } + +struct context_bank_info *msm_vidc_get_context_bank_for_region( + struct msm_vidc_core *core, enum msm_vidc_buffer_region region) +{ + struct context_bank_info *cb = NULL, *match = NULL; + + if (!region || region >= MSM_VIDC_REGION_MAX) { + d_vpr_e("Invalid region %#x\n", region); + return NULL; + } + + venus_hfi_for_each_context_bank(core, cb) { + if (cb->region == region) { + match = cb; + break; + } + } + if (!match) + d_vpr_e("cb not found for region %#x\n", region); + + return match; +} + +struct context_bank_info *msm_vidc_get_context_bank_for_device( + struct msm_vidc_core *core, struct device *dev) +{ + struct context_bank_info *cb = NULL, *match = NULL; + + if (!core || !dev) { + d_vpr_e("%s: invalid params\n", __func__); + return NULL; + } + + venus_hfi_for_each_context_bank(core, cb) { + if (of_device_is_compatible(dev->of_node, cb->name)) { + match = cb; + break; + } + } + if (!match) + d_vpr_e("cb not found for dev %s\n", dev_name(dev)); + + return match; +} diff --git a/driver/vidc/src/msm_vidc_memory.c b/driver/vidc/src/msm_vidc_memory.c index 3efe5a676d..5b2b73d39e 100644 --- a/driver/vidc/src/msm_vidc_memory.c +++ b/driver/vidc/src/msm_vidc_memory.c @@ -23,34 +23,7 @@ MODULE_IMPORT_NS(DMA_BUF); #endif -struct msm_vidc_buf_region_name { - enum msm_vidc_buffer_region region; - char *name; -}; - -struct context_bank_info *msm_vidc_get_context_bank(struct msm_vidc_core *core, - enum msm_vidc_buffer_region region) -{ - struct context_bank_info *cb = NULL, *match = NULL; - - if (!region || region >= MSM_VIDC_REGION_MAX) { - d_vpr_e("Invalid region %#x\n", region); - return NULL; - } - - venus_hfi_for_each_context_bank(core, cb) { - if (cb->region == region) { - match = cb; - break; - } - } - if (!match) - d_vpr_e("cb not found for region %#x\n", region); - - return match; -} - -struct dma_buf *msm_vidc_memory_get_dmabuf(struct msm_vidc_inst *inst, int fd) +struct dma_buf *msm_vidc_dma_buf_get(struct msm_vidc_inst *inst, int fd) { struct msm_memory_dmabuf *buf = NULL; struct dma_buf *dmabuf = NULL; @@ -84,7 +57,7 @@ struct dma_buf *msm_vidc_memory_get_dmabuf(struct msm_vidc_inst *inst, int fd) } /* get tracker instance from pool */ - buf = msm_memory_pool_alloc(inst, MSM_MEM_POOL_DMABUF); + buf = msm_vidc_pool_alloc(inst, MSM_MEM_POOL_DMABUF); if (!buf) { i_vpr_e(inst, "%s: dmabuf alloc failed\n", __func__); dma_buf_put(dmabuf); @@ -101,7 +74,7 @@ struct dma_buf *msm_vidc_memory_get_dmabuf(struct msm_vidc_inst *inst, int fd) return dmabuf; } -void msm_vidc_memory_put_dmabuf(struct msm_vidc_inst *inst, struct dma_buf *dmabuf) +void msm_vidc_dma_buf_put(struct msm_vidc_inst *inst, struct dma_buf *dmabuf) { struct msm_memory_dmabuf *buf = NULL; bool found = false; @@ -135,10 +108,10 @@ void msm_vidc_memory_put_dmabuf(struct msm_vidc_inst *inst, struct dma_buf *dmab dma_buf_put(buf->dmabuf); /* put tracker instance back to pool */ - msm_memory_pool_free(inst, buf); + msm_vidc_pool_free(inst, buf); } -void msm_vidc_memory_put_dmabuf_completely(struct msm_vidc_inst *inst, +void msm_vidc_dma_buf_put_completely(struct msm_vidc_inst *inst, struct msm_memory_dmabuf *buf) { if (!inst || !buf) { @@ -156,17 +129,12 @@ void msm_vidc_memory_put_dmabuf_completely(struct msm_vidc_inst *inst, dma_buf_put(buf->dmabuf); /* put tracker instance back to pool */ - msm_memory_pool_free(inst, buf); + msm_vidc_pool_free(inst, buf); break; } } } -static bool is_non_secure_buffer(struct dma_buf *dmabuf) -{ - return mem_buf_dma_buf_exclusive_owner(dmabuf); -} - int msm_vidc_memory_map(struct msm_vidc_core *core, struct msm_vidc_map *map) { int rc = 0; @@ -184,22 +152,7 @@ int msm_vidc_memory_map(struct msm_vidc_core *core, struct msm_vidc_map *map) goto exit; } - /* reject non-secure mapping request for a secure buffer(or vice versa) */ - if (map->region == MSM_VIDC_NON_SECURE || map->region == MSM_VIDC_NON_SECURE_PIXEL) { - if (!is_non_secure_buffer(map->dmabuf)) { - d_vpr_e("%s: secure buffer mapping to non-secure region %d not allowed\n", - __func__, map->region); - return -EINVAL; - } - } else { - if (is_non_secure_buffer(map->dmabuf)) { - d_vpr_e("%s: non-secure buffer mapping to secure region %d not allowed\n", - __func__, map->region); - return -EINVAL; - } - } - - cb = msm_vidc_get_context_bank(core, map->region); + cb = msm_vidc_get_context_bank_for_region(core, map->region); if (!cb) { d_vpr_e("%s: Failed to get context bank device\n", __func__); @@ -208,41 +161,19 @@ int msm_vidc_memory_map(struct msm_vidc_core *core, struct msm_vidc_map *map) } /* Prepare a dma buf for dma on the given device */ - attach = dma_buf_attach(map->dmabuf, cb->dev); + attach = msm_vidc_dma_buf_attach(core, map->dmabuf, cb->dev); if (IS_ERR_OR_NULL(attach)) { rc = PTR_ERR(attach) ? PTR_ERR(attach) : -ENOMEM; d_vpr_e("Failed to attach dmabuf\n"); goto error_attach; } - /* - * Get the scatterlist for the given attachment - * Mapping of sg is taken care by map attachment - */ - attach->dma_map_attrs |= DMA_ATTR_DELAYED_UNMAP; - - /* - * We do not need dma_map function to perform cache operations - * on the whole buffer size and hence pass skip sync flag. - * We do the required cache operations separately for the - * required buffer size - */ - attach->dma_map_attrs |= DMA_ATTR_SKIP_CPU_SYNC; - if (is_sys_cache_present(core)) - attach->dma_map_attrs |= - DMA_ATTR_IOMMU_USE_UPSTREAM_HINT; - - table = dma_buf_map_attachment(attach, DMA_BIDIRECTIONAL); + table = msm_vidc_dma_buf_map_attachment(core, attach); if (IS_ERR_OR_NULL(table)) { rc = PTR_ERR(table) ? PTR_ERR(table) : -ENOMEM; d_vpr_e("Failed to map table\n"); goto error_table; } - if (!table->sgl) { - d_vpr_e("sgl is NULL\n"); - rc = -ENOMEM; - goto error_sg; - } map->device_addr = table->sgl->dma_address; map->table = table; @@ -256,10 +187,8 @@ exit: return 0; -error_sg: - dma_buf_unmap_attachment(attach, table, DMA_BIDIRECTIONAL); error_table: - dma_buf_detach(map->dmabuf, attach); + msm_vidc_dma_buf_detach(core, map->dmabuf, attach); error_attach: error_cb: return rc; @@ -289,8 +218,8 @@ int msm_vidc_memory_unmap(struct msm_vidc_core *core, if (map->refcount) goto exit; - dma_buf_unmap_attachment(map->attach, map->table, DMA_BIDIRECTIONAL); - dma_buf_detach(map->dmabuf, map->attach); + msm_vidc_dma_buf_unmap_attachment(core, map->attach, map->table); + msm_vidc_dma_buf_detach(core, map->dmabuf, map->attach); map->device_addr = 0x0; map->attach = NULL; @@ -300,13 +229,13 @@ exit: return rc; } -struct dma_buf_attachment *msm_vidc_dma_buf_attach(struct dma_buf *dbuf, - struct device *dev) +struct dma_buf_attachment *msm_vidc_dma_buf_attach(struct msm_vidc_core *core, + struct dma_buf *dbuf, struct device *dev) { int rc = 0; struct dma_buf_attachment *attach = NULL; - if (!dbuf || !dev) { + if (!core || !dbuf || !dev) { d_vpr_e("%s: invalid params\n", __func__); return NULL; } @@ -318,11 +247,17 @@ struct dma_buf_attachment *msm_vidc_dma_buf_attach(struct dma_buf *dbuf, return NULL;; } + /* + * We do not need dma_map function to perform cache operations + * on the whole buffer size and hence pass skip sync flag. + */ + attach->dma_map_attrs |= DMA_ATTR_SKIP_CPU_SYNC; + return attach; } -int msm_vidc_dma_buf_detach(struct dma_buf *dbuf, - struct dma_buf_attachment *attach) +int msm_vidc_dma_buf_detach(struct msm_vidc_core *core, + struct dma_buf *dbuf, struct dma_buf_attachment *attach) { int rc = 0; @@ -337,7 +272,7 @@ int msm_vidc_dma_buf_detach(struct dma_buf *dbuf, } struct sg_table *msm_vidc_dma_buf_map_attachment( - struct dma_buf_attachment *attach) + struct msm_vidc_core *core, struct dma_buf_attachment *attach) { int rc = 0; struct sg_table *table = NULL; @@ -353,12 +288,17 @@ struct sg_table *msm_vidc_dma_buf_map_attachment( d_vpr_e("Failed to map table, error %d\n", rc); return NULL; } + if (!table->sgl) { + d_vpr_e("%s: sgl is NULL\n", __func__); + msm_vidc_dma_buf_unmap_attachment(core, attach, table); + return NULL; + } return table; } -int msm_vidc_dma_buf_unmap_attachment(struct dma_buf_attachment *attach, - struct sg_table *table) +int msm_vidc_dma_buf_unmap_attachment(struct msm_vidc_core *core, + struct dma_buf_attachment *attach, struct sg_table *table) { int rc = 0; @@ -399,150 +339,17 @@ void msm_vidc_vmem_free(void **addr) int msm_vidc_memory_alloc(struct msm_vidc_core *core, struct msm_vidc_alloc *mem) { - int rc = 0; - int size = 0; - struct dma_heap *heap; - char *heap_name = NULL; - struct mem_buf_lend_kernel_arg lend_arg; - int vmids[1]; - int perms[1]; - - if (!mem) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - size = ALIGN(mem->size, SZ_4K); - - if (mem->secure) { - switch (mem->region) { - case MSM_VIDC_SECURE_PIXEL: - heap_name = "qcom,secure-pixel"; - break; - case MSM_VIDC_SECURE_NONPIXEL: - heap_name = "qcom,secure-non-pixel"; - break; - case MSM_VIDC_SECURE_BITSTREAM: - heap_name = "qcom,system"; - break; - default: - d_vpr_e("invalid secure region : %#x\n", mem->region); - return -EINVAL; - } - } else { - heap_name = "qcom,system"; - } - - heap = dma_heap_find(heap_name); - mem->dmabuf = dma_heap_buffer_alloc(heap, size, 0, 0); - if (IS_ERR_OR_NULL(mem->dmabuf)) { - d_vpr_e("%s: dma heap %s alloc failed\n", __func__, heap_name); - mem->dmabuf = NULL; - rc = -ENOMEM; - goto error; - } - - if (mem->secure && mem->type == MSM_VIDC_BUF_BIN) - { - vmids[0] = VMID_CP_BITSTREAM; - perms[0] = PERM_READ | PERM_WRITE; - - lend_arg.nr_acl_entries = ARRAY_SIZE(vmids); - lend_arg.vmids = vmids; - lend_arg.perms = perms; - - rc = mem_buf_lend(mem->dmabuf, &lend_arg); - if (rc) { - d_vpr_e("%s: BIN dmabuf %pK LEND failed, rc %d heap %s\n", - __func__, mem->dmabuf, rc, heap_name); - goto error; - } - } - - if (mem->map_kernel) { - dma_buf_begin_cpu_access(mem->dmabuf, DMA_BIDIRECTIONAL); - - /* - * Waipio uses Kernel version 5.10.x, - * Kalama uses Kernel Version 5.15.x, - * Pineapple uses Kernel Version 5.18.x - */ -#if (LINUX_VERSION_CODE < KERNEL_VERSION(5,15,0)) - mem->kvaddr = dma_buf_vmap(mem->dmabuf); - if (!mem->kvaddr) { - d_vpr_e("%s: kernel map failed\n", __func__); - rc = -EIO; - goto error; - } -#elif (LINUX_VERSION_CODE < KERNEL_VERSION(5,16,0)) - rc = dma_buf_vmap(mem->dmabuf, &mem->dmabuf_map); - if (rc) { - d_vpr_e("%s: kernel map failed\n", __func__); - rc = -EIO; - goto error; - } - mem->kvaddr = mem->dmabuf_map.vaddr; -#else - rc = dma_buf_vmap(mem->dmabuf, &mem->dmabuf_map); - if (rc) { - d_vpr_e("%s: kernel map failed\n", __func__); - rc = -EIO; - goto error; - } - mem->kvaddr = mem->dmabuf_map.vaddr; -#endif - } - - d_vpr_h( - "%s: dmabuf %pK, size %d, kvaddr %pK, buffer_type %s, secure %d, region %d\n", - __func__, mem->dmabuf, mem->size, mem->kvaddr, buf_name(mem->type), - mem->secure, mem->region); - trace_msm_vidc_dma_buffer("ALLOC", mem->dmabuf, mem->size, mem->kvaddr, - buf_name(mem->type), mem->secure, mem->region); - - return 0; - -error: - msm_vidc_memory_free(core, mem); - return rc; + d_vpr_e("%s: unsupported\n", __func__); + return -EINVAL; } int msm_vidc_memory_free(struct msm_vidc_core *core, struct msm_vidc_alloc *mem) { - int rc = 0; + d_vpr_e("%s: unsupported\n", __func__); + return -EINVAL; +} - if (!mem || !mem->dmabuf) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - d_vpr_h( - "%s: dmabuf %pK, size %d, kvaddr %pK, buffer_type %s, secure %d, region %d\n", - __func__, mem->dmabuf, mem->size, mem->kvaddr, buf_name(mem->type), - mem->secure, mem->region); - - trace_msm_vidc_dma_buffer("FREE", mem->dmabuf, mem->size, mem->kvaddr, - buf_name(mem->type), mem->secure, mem->region); - - if (mem->kvaddr) { -#if (LINUX_VERSION_CODE < KERNEL_VERSION(5,15,0)) - dma_buf_vunmap(mem->dmabuf, mem->kvaddr); -#else - dma_buf_vunmap(mem->dmabuf, &mem->dmabuf_map); -#endif - mem->kvaddr = NULL; - dma_buf_end_cpu_access(mem->dmabuf, DMA_BIDIRECTIONAL); - } - - if (mem->dmabuf) { - dma_heap_buffer_free(mem->dmabuf); - mem->dmabuf = NULL; - } - - return rc; -}; - -void *msm_memory_pool_alloc(struct msm_vidc_inst *inst, enum msm_memory_pool_type type) +void *msm_vidc_pool_alloc(struct msm_vidc_inst *inst, enum msm_memory_pool_type type) { struct msm_memory_alloc_header *hdr = NULL; struct msm_memory_pool *pool; @@ -584,7 +391,7 @@ void *msm_memory_pool_alloc(struct msm_vidc_inst *inst, enum msm_memory_pool_typ return hdr->buf; } -void msm_memory_pool_free(struct msm_vidc_inst *inst, void *vidc_buf) +void msm_vidc_pool_free(struct msm_vidc_inst *inst, void *vidc_buf) { struct msm_memory_alloc_header *hdr; struct msm_memory_pool *pool; @@ -659,7 +466,7 @@ static void msm_vidc_destroy_pool_buffers(struct msm_vidc_inst *inst, __func__, pool->name, fcount, bcount); } -void msm_memory_pools_deinit(struct msm_vidc_inst *inst) +void msm_vidc_pools_deinit(struct msm_vidc_inst *inst) { u32 i = 0; @@ -691,7 +498,7 @@ static const struct msm_vidc_type_size_name buftype_size_name_arr[] = { {MSM_MEM_POOL_BUF_STATS, sizeof(struct msm_vidc_buffer_stats), "MSM_MEM_POOL_BUF_STATS"}, }; -int msm_memory_pools_init(struct msm_vidc_inst *inst) +int msm_vidc_pools_init(struct msm_vidc_inst *inst) { u32 i; @@ -721,129 +528,8 @@ int msm_memory_pools_init(struct msm_vidc_inst *inst) return 0; } -/* -int msm_memory_cache_operations(struct msm_vidc_inst *inst, - struct dma_buf *dbuf, enum smem_cache_ops cache_op, - unsigned long offset, unsigned long size, u32 sid) +u32 msm_vidc_buffer_region(struct msm_vidc_inst *inst, + enum msm_vidc_buffer_type buffer_type) { - int rc = 0; - unsigned long flags = 0; - - if (!inst) { - d_vpr_e("%s: invalid parameters\n", __func__); - return -EINVAL; - } - - if (!dbuf) { - i_vpr_e(inst, "%s: invalid params\n", __func__); - return -EINVAL; - } - - rc = dma_buf_get_flags(dbuf, &flags); - if (rc) { - i_vpr_e(inst, "%s: dma_buf_get_flags failed, err %d\n", - __func__, rc); - return rc; - } else if (!(flags & ION_FLAG_CACHED)) { - return rc; - } - - switch (cache_op) { - case SMEM_CACHE_CLEAN: - case SMEM_CACHE_CLEAN_INVALIDATE: - rc = dma_buf_begin_cpu_access_partial(dbuf, DMA_TO_DEVICE, - offset, size); - if (rc) - break; - rc = dma_buf_end_cpu_access_partial(dbuf, DMA_TO_DEVICE, - offset, size); - break; - case SMEM_CACHE_INVALIDATE: - rc = dma_buf_begin_cpu_access_partial(dbuf, DMA_TO_DEVICE, - offset, size); - if (rc) - break; - rc = dma_buf_end_cpu_access_partial(dbuf, DMA_FROM_DEVICE, - offset, size); - break; - default: - i_vpr_e(inst, "%s: cache (%d) operation not supported\n", - __func__, cache_op); - rc = -EINVAL; - break; - } - - return rc; -} - -int msm_smem_memory_prefetch(struct msm_vidc_inst *inst) -{ - int i, rc = 0; - struct memory_regions *vidc_regions = NULL; - struct ion_prefetch_region ion_region[MEMORY_REGIONS_MAX]; - - if (!inst) { - d_vpr_e("%s: invalid parameters\n", __func__); - return -EINVAL; - } - - vidc_regions = &inst->regions; - if (vidc_regions->num_regions > MEMORY_REGIONS_MAX) { - i_vpr_e(inst, "%s: invalid num_regions %d, max %d\n", - __func__, vidc_regions->num_regions, - MEMORY_REGIONS_MAX); - return -EINVAL; - } - - memset(ion_region, 0, sizeof(ion_region)); - for (i = 0; i < vidc_regions->num_regions; i++) { - ion_region[i].size = vidc_regions->region[i].size; - ion_region[i].vmid = vidc_regions->region[i].vmid; - } - - rc = msm_ion_heap_prefetch(ION_SECURE_HEAP_ID, ion_region, - vidc_regions->num_regions); - if (rc) - i_vpr_e(inst, "%s: prefetch failed, ret: %d\n", - __func__, rc); - else - i_vpr_l(inst, "%s: prefetch succeeded\n", __func__); - - return rc; -} - -int msm_smem_memory_drain(struct msm_vidc_inst *inst) -{ - int i, rc = 0; - struct memory_regions *vidc_regions = NULL; - struct ion_prefetch_region ion_region[MEMORY_REGIONS_MAX]; - - if (!inst) { - d_vpr_e("%s: invalid parameters\n", __func__); - return -EINVAL; - } - - vidc_regions = &inst->regions; - if (vidc_regions->num_regions > MEMORY_REGIONS_MAX) { - i_vpr_e(inst, "%s: invalid num_regions %d, max %d\n", - __func__, vidc_regions->num_regions, - MEMORY_REGIONS_MAX); - return -EINVAL; - } - - memset(ion_region, 0, sizeof(ion_region)); - for (i = 0; i < vidc_regions->num_regions; i++) { - ion_region[i].size = vidc_regions->region[i].size; - ion_region[i].vmid = vidc_regions->region[i].vmid; - } - - rc = msm_ion_heap_drain(ION_SECURE_HEAP_ID, ion_region, - vidc_regions->num_regions); - if (rc) - i_vpr_e(inst, "%s: drain failed, ret: %d\n", __func__, rc); - else - i_vpr_l(inst, "%s: drain succeeded\n", __func__); - - return rc; -} -*/ + return MSM_VIDC_NON_SECURE; +} \ No newline at end of file diff --git a/driver/vidc/src/msm_vidc_memory_ext.c b/driver/vidc/src/msm_vidc_memory_ext.c new file mode 100644 index 0000000000..1abd35b8d8 --- /dev/null +++ b/driver/vidc/src/msm_vidc_memory_ext.c @@ -0,0 +1,379 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. + * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include +#include +#include +#include +#include + +#include "msm_vidc_core.h" +#include "msm_vidc_debug.h" +#include "msm_vidc_driver.h" +#include "msm_vidc_events.h" +#include "msm_vidc_platform.h" + +static bool is_non_secure_buffer(struct dma_buf *dmabuf) +{ + return mem_buf_dma_buf_exclusive_owner(dmabuf); +} + +struct dma_buf_attachment *msm_vidc_dma_buf_attach_ext(struct msm_vidc_core *core, + struct dma_buf *dbuf, struct device *dev) +{ + int rc = 0; + struct dma_buf_attachment *attach = NULL; + struct context_bank_info *cb = NULL; + + if (!core || !dbuf || !dev) { + d_vpr_e("%s: invalid params\n", __func__); + return NULL; + } + + cb = msm_vidc_get_context_bank_for_device(core, dev); + if (!cb) { + d_vpr_e("%s: Failed to get context bank device for %s\n", + __func__, dev_name(dev)); + return NULL; + } + + /* reject non-secure mapping request for a secure buffer(or vice versa) */ + if (cb->region == MSM_VIDC_NON_SECURE || cb->region == MSM_VIDC_NON_SECURE_PIXEL) { + if (!is_non_secure_buffer(dbuf)) { + d_vpr_e("%s: secure buffer mapping to non-secure region %d not allowed\n", + __func__, cb->region); + return NULL; + } + } else { + if (is_non_secure_buffer(dbuf)) { + d_vpr_e("%s: non-secure buffer mapping to secure region %d not allowed\n", + __func__, cb->region); + return NULL; + } + } + + attach = dma_buf_attach(dbuf, dev); + if (IS_ERR_OR_NULL(attach)) { + rc = PTR_ERR(attach) ? PTR_ERR(attach) : -1; + d_vpr_e("Failed to attach dmabuf, error %d\n", rc); + return NULL;; + } + + /* + * We do not need dma_map function to perform cache operations + * on the whole buffer size and hence pass skip sync flag. + */ + attach->dma_map_attrs |= DMA_ATTR_SKIP_CPU_SYNC; + /* + * Get the scatterlist for the given attachment + * Mapping of sg is taken care by map attachment + */ + attach->dma_map_attrs |= DMA_ATTR_DELAYED_UNMAP; + if (is_sys_cache_present(core)) + attach->dma_map_attrs |= DMA_ATTR_IOMMU_USE_UPSTREAM_HINT; + + return attach; +} + +int msm_vidc_memory_free_ext(struct msm_vidc_core *core, struct msm_vidc_alloc *mem) +{ + int rc = 0; + + if (!mem || !mem->dmabuf) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + d_vpr_h( + "%s: dmabuf %pK, size %d, kvaddr %pK, buffer_type %s, secure %d, region %d\n", + __func__, mem->dmabuf, mem->size, mem->kvaddr, buf_name(mem->type), + mem->secure, mem->region); + + trace_msm_vidc_dma_buffer("FREE", mem->dmabuf, mem->size, mem->kvaddr, + buf_name(mem->type), mem->secure, mem->region); + + if (mem->kvaddr) { +#if (LINUX_VERSION_CODE < KERNEL_VERSION(5,15,0)) + dma_buf_vunmap(mem->dmabuf, mem->kvaddr); +#else + dma_buf_vunmap(mem->dmabuf, &mem->dmabuf_map); +#endif + mem->kvaddr = NULL; + dma_buf_end_cpu_access(mem->dmabuf, DMA_BIDIRECTIONAL); + } + + if (mem->dmabuf) { + dma_heap_buffer_free(mem->dmabuf); + mem->dmabuf = NULL; + } + + return rc; +} + +int msm_vidc_memory_alloc_ext(struct msm_vidc_core *core, struct msm_vidc_alloc *mem) +{ + int rc = 0; + int size = 0; + struct dma_heap *heap; + char *heap_name = NULL; + struct mem_buf_lend_kernel_arg lend_arg; + int vmids[1]; + int perms[1]; + + if (!mem) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + size = ALIGN(mem->size, SZ_4K); + + if (mem->secure) { + switch (mem->region) { + case MSM_VIDC_SECURE_PIXEL: + heap_name = "qcom,secure-pixel"; + break; + case MSM_VIDC_SECURE_NONPIXEL: + heap_name = "qcom,secure-non-pixel"; + break; + case MSM_VIDC_SECURE_BITSTREAM: + heap_name = "qcom,system"; + break; + default: + d_vpr_e("invalid secure region : %#x\n", mem->region); + return -EINVAL; + } + } else { + heap_name = "qcom,system"; + } + + heap = dma_heap_find(heap_name); + mem->dmabuf = dma_heap_buffer_alloc(heap, size, 0, 0); + if (IS_ERR_OR_NULL(mem->dmabuf)) { + d_vpr_e("%s: dma heap %s alloc failed\n", __func__, heap_name); + mem->dmabuf = NULL; + rc = -ENOMEM; + goto error; + } + + if (mem->secure && mem->type == MSM_VIDC_BUF_BIN) + { + vmids[0] = VMID_CP_BITSTREAM; + perms[0] = PERM_READ | PERM_WRITE; + + lend_arg.nr_acl_entries = ARRAY_SIZE(vmids); + lend_arg.vmids = vmids; + lend_arg.perms = perms; + + rc = mem_buf_lend(mem->dmabuf, &lend_arg); + if (rc) { + d_vpr_e("%s: BIN dmabuf %pK LEND failed, rc %d heap %s\n", + __func__, mem->dmabuf, rc, heap_name); + goto error; + } + } + + if (mem->map_kernel) { + dma_buf_begin_cpu_access(mem->dmabuf, DMA_BIDIRECTIONAL); + + /* + * Waipio uses Kernel version 5.10.x, + * Kalama uses Kernel Version 5.15.x, + * Pineapple uses Kernel Version 5.18.x + */ +#if (LINUX_VERSION_CODE < KERNEL_VERSION(5,15,0)) + mem->kvaddr = dma_buf_vmap(mem->dmabuf); + if (!mem->kvaddr) { + d_vpr_e("%s: kernel map failed\n", __func__); + rc = -EIO; + goto error; + } +#elif (LINUX_VERSION_CODE < KERNEL_VERSION(5,16,0)) + rc = dma_buf_vmap(mem->dmabuf, &mem->dmabuf_map); + if (rc) { + d_vpr_e("%s: kernel map failed\n", __func__); + rc = -EIO; + goto error; + } + mem->kvaddr = mem->dmabuf_map.vaddr; +#else + rc = dma_buf_vmap(mem->dmabuf, &mem->dmabuf_map); + if (rc) { + d_vpr_e("%s: kernel map failed\n", __func__); + rc = -EIO; + goto error; + } + mem->kvaddr = mem->dmabuf_map.vaddr; +#endif + } + + d_vpr_h( + "%s: dmabuf %pK, size %d, kvaddr %pK, buffer_type %s, secure %d, region %d\n", + __func__, mem->dmabuf, mem->size, mem->kvaddr, buf_name(mem->type), + mem->secure, mem->region); + trace_msm_vidc_dma_buffer("ALLOC", mem->dmabuf, mem->size, mem->kvaddr, + buf_name(mem->type), mem->secure, mem->region); + + return 0; + +error: + msm_vidc_memory_free_ext(core, mem); + return rc; +} + +int msm_vidc_memory_map_ext(struct msm_vidc_core *core, struct msm_vidc_map *map) +{ + int rc = 0; + struct dma_buf_attachment *attach = NULL; + struct sg_table *table = NULL; + struct context_bank_info *cb = NULL; + + if (!core || !map) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (map->refcount) { + map->refcount++; + goto exit; + } + + /* reject non-secure mapping request for a secure buffer(or vice versa) */ + if (map->region == MSM_VIDC_NON_SECURE || map->region == MSM_VIDC_NON_SECURE_PIXEL) { + if (!is_non_secure_buffer(map->dmabuf)) { + d_vpr_e("%s: secure buffer mapping to non-secure region %d not allowed\n", + __func__, map->region); + return -EINVAL; + } + } else { + if (is_non_secure_buffer(map->dmabuf)) { + d_vpr_e("%s: non-secure buffer mapping to secure region %d not allowed\n", + __func__, map->region); + return -EINVAL; + } + } + + cb = msm_vidc_get_context_bank_for_region(core, map->region); + if (!cb) { + d_vpr_e("%s: Failed to get context bank device\n", + __func__); + rc = -EIO; + goto error_cb; + } + + /* Prepare a dma buf for dma on the given device */ + attach = msm_vidc_dma_buf_attach_ext(core, map->dmabuf, cb->dev); + if (IS_ERR_OR_NULL(attach)) { + rc = PTR_ERR(attach) ? PTR_ERR(attach) : -ENOMEM; + d_vpr_e("Failed to attach dmabuf\n"); + goto error_attach; + } + + table = msm_vidc_dma_buf_map_attachment(core, attach); + if (IS_ERR_OR_NULL(table)) { + rc = PTR_ERR(table) ? PTR_ERR(table) : -ENOMEM; + d_vpr_e("Failed to map table\n"); + goto error_table; + } + + map->device_addr = table->sgl->dma_address; + map->table = table; + map->attach = attach; + map->refcount++; + +exit: + d_vpr_l("%s: type %11s, device_addr %#llx, refcount %d, region %d\n", + __func__, buf_name(map->type), map->device_addr, map->refcount, map->region); + + return 0; + +error_table: + msm_vidc_dma_buf_detach(core, map->dmabuf, attach); +error_attach: +error_cb: + return rc; +} + +u32 msm_vidc_buffer_region_ext(struct msm_vidc_inst *inst, + enum msm_vidc_buffer_type buffer_type) +{ + u32 region = MSM_VIDC_NON_SECURE; + + if (!is_secure_session(inst)) { + switch (buffer_type) { + case MSM_VIDC_BUF_ARP: + region = MSM_VIDC_SECURE_NONPIXEL; + break; + case MSM_VIDC_BUF_INPUT: + if (is_encode_session(inst)) + region = MSM_VIDC_NON_SECURE_PIXEL; + else + region = MSM_VIDC_NON_SECURE; + break; + case MSM_VIDC_BUF_OUTPUT: + if (is_encode_session(inst)) + region = MSM_VIDC_NON_SECURE; + else + region = MSM_VIDC_NON_SECURE_PIXEL; + break; + case MSM_VIDC_BUF_DPB: + case MSM_VIDC_BUF_VPSS: + case MSM_VIDC_BUF_PARTIAL_DATA: + region = MSM_VIDC_NON_SECURE_PIXEL; + break; + case MSM_VIDC_BUF_INPUT_META: + case MSM_VIDC_BUF_OUTPUT_META: + case MSM_VIDC_BUF_BIN: + case MSM_VIDC_BUF_COMV: + case MSM_VIDC_BUF_NON_COMV: + case MSM_VIDC_BUF_LINE: + case MSM_VIDC_BUF_PERSIST: + region = MSM_VIDC_NON_SECURE; + break; + default: + i_vpr_e(inst, "%s: invalid driver buffer type %d\n", + __func__, buffer_type); + } + } else { + switch (buffer_type) { + case MSM_VIDC_BUF_INPUT: + if (is_encode_session(inst)) + region = MSM_VIDC_SECURE_PIXEL; + else + region = MSM_VIDC_SECURE_BITSTREAM; + break; + case MSM_VIDC_BUF_OUTPUT: + if (is_encode_session(inst)) + region = MSM_VIDC_SECURE_BITSTREAM; + else + region = MSM_VIDC_SECURE_PIXEL; + break; + case MSM_VIDC_BUF_INPUT_META: + case MSM_VIDC_BUF_OUTPUT_META: + region = MSM_VIDC_NON_SECURE; + break; + case MSM_VIDC_BUF_DPB: + case MSM_VIDC_BUF_VPSS: + case MSM_VIDC_BUF_PARTIAL_DATA: + region = MSM_VIDC_SECURE_PIXEL; + break; + case MSM_VIDC_BUF_BIN: + region = MSM_VIDC_SECURE_BITSTREAM; + break; + case MSM_VIDC_BUF_ARP: + case MSM_VIDC_BUF_COMV: + case MSM_VIDC_BUF_NON_COMV: + case MSM_VIDC_BUF_LINE: + case MSM_VIDC_BUF_PERSIST: + region = MSM_VIDC_SECURE_NONPIXEL; + break; + default: + i_vpr_e(inst, "%s: invalid driver buffer type %d\n", + __func__, buffer_type); + } + } + + return region; +} diff --git a/driver/vidc/src/msm_vidc_probe.c b/driver/vidc/src/msm_vidc_probe.c index 401aa1b226..01cfa57626 100644 --- a/driver/vidc/src/msm_vidc_probe.c +++ b/driver/vidc/src/msm_vidc_probe.c @@ -354,28 +354,6 @@ exit: return rc; } -static struct context_bank_info *get_context_bank( - struct msm_vidc_core *core, struct device *dev) -{ - struct context_bank_info *cb = NULL, *match = NULL; - - if (!core || !dev) { - d_vpr_e("%s: invalid params\n", __func__); - return NULL; - } - - venus_hfi_for_each_context_bank(core, cb) { - if (of_device_is_compatible(dev->of_node, cb->name)) { - match = cb; - break; - } - } - if (!match) - d_vpr_e("cb not found for dev %s\n", dev_name(dev)); - - return match; -} - static int msm_vidc_setup_context_bank(struct msm_vidc_core *core, struct device *dev) { @@ -387,7 +365,7 @@ static int msm_vidc_setup_context_bank(struct msm_vidc_core *core, return -EINVAL; } - cb = get_context_bank(core, dev); + cb = msm_vidc_get_context_bank_for_device(core, dev); if (!cb) { d_vpr_e("%s: Failed to get context bank device for %s\n", __func__, dev_name(dev)); diff --git a/driver/vidc/src/msm_vidc_vb2.c b/driver/vidc/src/msm_vidc_vb2.c index f74565326d..602ee39c9a 100644 --- a/driver/vidc/src/msm_vidc_vb2.c +++ b/driver/vidc/src/msm_vidc_vb2.c @@ -92,19 +92,12 @@ void *msm_vb2_attach_dmabuf(struct vb2_buffer *vb, struct device *dev, } buf->inst = inst; - buf->attach = msm_vidc_dma_buf_attach(dbuf, dev); + buf->attach = call_mem_op(core, dma_buf_attach, core, dbuf, dev); if (!buf->attach) { buf->attach = NULL; buf = NULL; goto exit; } - - buf->attach->dma_map_attrs |= DMA_ATTR_SKIP_CPU_SYNC; - buf->attach->dma_map_attrs |= DMA_ATTR_DELAYED_UNMAP; - if (is_sys_cache_present(core)) - buf->attach->dma_map_attrs |= - DMA_ATTR_IOMMU_USE_UPSTREAM_HINT; - buf->dmabuf = dbuf; print_vidc_buffer(VIDC_LOW, "low ", "attach", inst, buf); @@ -129,6 +122,7 @@ void msm_vb2_detach_dmabuf(void *buf_priv) { struct msm_vidc_buffer *vbuf = buf_priv; struct msm_vidc_buffer *ro_buf, *dummy; + struct msm_vidc_core *core; struct msm_vidc_inst *inst; if (!vbuf || !vbuf->inst) { @@ -141,6 +135,7 @@ void msm_vb2_detach_dmabuf(void *buf_priv) d_vpr_e("%s: invalid params %pK\n", __func__, inst); return; } + core = inst->core; if (is_decode_session(inst) && is_output_buffer(vbuf->type)) { list_for_each_entry_safe(ro_buf, dummy, &inst->buffers.read_only.list, list) { @@ -155,7 +150,7 @@ void msm_vb2_detach_dmabuf(void *buf_priv) print_vidc_buffer(VIDC_LOW, "low ", "detach", inst, vbuf); if (vbuf->attach && vbuf->dmabuf) { - msm_vidc_dma_buf_detach(vbuf->dmabuf, vbuf->attach); + call_mem_op(core, dma_buf_detach, core, vbuf->dmabuf, vbuf->attach); vbuf->attach = NULL; vbuf->dmabuf = NULL; vbuf->inst = NULL; @@ -171,6 +166,7 @@ int msm_vb2_map_dmabuf(void *buf_priv) { int rc = 0; struct msm_vidc_buffer *buf = buf_priv; + struct msm_vidc_core *core; struct msm_vidc_inst *inst; if (!buf || !buf->inst) { @@ -183,20 +179,14 @@ int msm_vb2_map_dmabuf(void *buf_priv) d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } + core = inst->core; - buf->sg_table = msm_vidc_dma_buf_map_attachment(buf->attach); - if (!buf->sg_table) { + buf->sg_table = call_mem_op(core, dma_buf_map_attachment, core, buf->attach); + if (!buf->sg_table || !buf->sg_table->sgl) { buf->sg_table = NULL; rc = -ENOMEM; goto exit; } - - if (!buf->sg_table->sgl) { - i_vpr_e(inst, "%s: sgl is NULL\n", __func__); - rc = -ENOMEM; - goto exit; - } - buf->device_addr = buf->sg_table->sgl->dma_address; print_vidc_buffer(VIDC_HIGH, "high", "map", inst, buf); @@ -211,6 +201,7 @@ void msm_vb2_unmap_dmabuf(void *buf_priv) { struct msm_vidc_buffer *vbuf = buf_priv; struct msm_vidc_buffer *ro_buf, *dummy; + struct msm_vidc_core *core; struct msm_vidc_inst *inst; if (!vbuf || !vbuf->inst) { @@ -223,6 +214,7 @@ void msm_vb2_unmap_dmabuf(void *buf_priv) d_vpr_e("%s: invalid params %pK\n", __func__, inst); return; } + core = inst->core; if (is_decode_session(inst) && is_output_buffer(vbuf->type)) { list_for_each_entry_safe(ro_buf, dummy, &inst->buffers.read_only.list, list) { @@ -239,7 +231,7 @@ void msm_vb2_unmap_dmabuf(void *buf_priv) print_vidc_buffer(VIDC_HIGH, "high", "unmap", inst, vbuf); if (vbuf->attach && vbuf->sg_table) { - msm_vidc_dma_buf_unmap_attachment(vbuf->attach, vbuf->sg_table); + call_mem_op(core, dma_buf_unmap_attachment, core, vbuf->attach, vbuf->sg_table); vbuf->sg_table = NULL; vbuf->device_addr = 0x0; } @@ -361,8 +353,8 @@ int msm_vidc_queue_setup(struct vb2_queue *q, return rc; } - region = msm_vidc_get_buffer_region(inst, buffer_type, __func__); - cb = msm_vidc_get_context_bank(core, region); + region = call_mem_op(core, buffer_region, inst, buffer_type); + cb = msm_vidc_get_context_bank_for_region(core, region); if (!cb) { d_vpr_e("%s: Failed to get context bank device\n", __func__); diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index e620c9069c..9d64f754f6 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -1300,11 +1300,13 @@ static int venus_hfi_cache_packet(struct msm_vidc_inst *inst) int rc = 0; struct hfi_header *hdr; struct hfi_pending_packet *packet; + struct msm_vidc_core *core; - if (!inst->packet) { + if (!inst || !inst->core || !inst->packet) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } + core = inst->core; hdr = (struct hfi_header *)inst->packet; if (hdr->size < sizeof(struct hfi_header)) { @@ -1312,7 +1314,7 @@ static int venus_hfi_cache_packet(struct msm_vidc_inst *inst) return -EINVAL; } - packet = msm_memory_pool_alloc(inst, MSM_MEM_POOL_PACKET); + packet = call_mem_op(core, pool_alloc, inst, MSM_MEM_POOL_PACKET); if (!packet) { i_vpr_e(inst, "%s: failed to allocate pending packet\n", __func__); return -ENOMEM; @@ -1811,11 +1813,13 @@ static int venus_hfi_add_pending_packets(struct msm_vidc_inst *inst) struct hfi_pending_packet *pkt_info, *dummy; struct hfi_header *hdr, *src_hdr; struct hfi_packet *src_pkt; + struct msm_vidc_core *core; - if (!inst || !inst->packet) { + if (!inst || !inst->core || !inst->packet) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } + core = inst->core; hdr = (struct hfi_header *)inst->packet; if (hdr->size < sizeof(struct hfi_header)) { @@ -1841,7 +1845,7 @@ static int venus_hfi_add_pending_packets(struct msm_vidc_inst *inst) } } list_del(&pkt_info->list); - msm_memory_pool_free(inst, pkt_info); + call_mem_op(core, pool_free, inst, pkt_info); } return rc; } diff --git a/driver/vidc/src/venus_hfi_queue.c b/driver/vidc/src/venus_hfi_queue.c index a8b2e8aaf0..4fea4fa357 100644 --- a/driver/vidc/src/venus_hfi_queue.c +++ b/driver/vidc/src/venus_hfi_queue.c @@ -8,6 +8,7 @@ #include "msm_vidc_debug.h" #include "msm_vidc_core.h" #include "msm_vidc_memory.h" +#include "msm_vidc_platform.h" static int __strict_check(struct msm_vidc_core *core, const char *function) { @@ -428,10 +429,10 @@ void venus_hfi_queue_deinit(struct msm_vidc_core *core) return; } - msm_vidc_memory_unmap(core, &core->iface_q_table.map); - msm_vidc_memory_free(core, &core->iface_q_table.alloc); - msm_vidc_memory_unmap(core, &core->sfr.map); - msm_vidc_memory_free(core, &core->sfr.alloc); + call_mem_op(core, memory_unmap, core, &core->iface_q_table.map); + call_mem_op(core, memory_free, core, &core->iface_q_table.alloc); + call_mem_op(core, memory_unmap, core, &core->sfr.map); + call_mem_op(core, memory_free, core, &core->sfr.alloc); for (i = 0; i < VIDC_IFACEQ_NUMQ; i++) { core->iface_queues[i].q_hdr = NULL; @@ -510,7 +511,7 @@ int venus_hfi_queue_init(struct msm_vidc_core *core) alloc.size = TOTAL_QSIZE; alloc.secure = false; alloc.map_kernel = true; - rc = msm_vidc_memory_alloc(core, &alloc); + rc = call_mem_op(core, memory_alloc, core, &alloc); if (rc) { d_vpr_e("%s: alloc failed\n", __func__); goto fail_alloc_queue; @@ -522,7 +523,7 @@ int venus_hfi_queue_init(struct msm_vidc_core *core) map.type = alloc.type; map.region = alloc.region; map.dmabuf = alloc.dmabuf; - rc = msm_vidc_memory_map(core, &map); + rc = call_mem_op(core, memory_map, core, &map); if (rc) { d_vpr_e("%s: alloc failed\n", __func__); goto fail_alloc_queue; @@ -582,7 +583,7 @@ int venus_hfi_queue_init(struct msm_vidc_core *core) alloc.size = ALIGNED_SFR_SIZE; alloc.secure = false; alloc.map_kernel = true; - rc = msm_vidc_memory_alloc(core, &alloc); + rc = call_mem_op(core, memory_alloc, core, &alloc); if (rc) { d_vpr_e("%s: sfr alloc failed\n", __func__); goto fail_alloc_queue; @@ -594,7 +595,7 @@ int venus_hfi_queue_init(struct msm_vidc_core *core) map.type = alloc.type; map.region = alloc.region; map.dmabuf = alloc.dmabuf; - rc = msm_vidc_memory_map(core, &map); + rc = call_mem_op(core, memory_map, core, &map); if (rc) { d_vpr_e("%s: sfr map failed\n", __func__); goto fail_alloc_queue; diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index d3a1a5edfd..81d2566be7 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -14,6 +14,7 @@ #include "msm_vidc_control.h" #include "msm_vidc_memory.h" #include "msm_vidc_fence.h" +#include "msm_vidc_platform.h" #define in_range(range, val) (((range.begin) < (val)) && ((range.end) > (val))) @@ -657,12 +658,14 @@ static int handle_read_only_buffer(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buf) { struct msm_vidc_buffer *ro_buf; + struct msm_vidc_core *core; bool found = false; - if (!inst || !buf) { + if (!inst || !inst->core || !buf) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } + core = inst->core; if (!is_decode_session(inst) || !is_output_buffer(buf->type)) return 0; @@ -681,7 +684,7 @@ static int handle_read_only_buffer(struct msm_vidc_inst *inst, * if present, do nothing */ if (!found) { - ro_buf = msm_memory_pool_alloc(inst, MSM_MEM_POOL_BUFFER); + ro_buf = call_mem_op(core, pool_alloc, inst, MSM_MEM_POOL_BUFFER); if (!ro_buf) { i_vpr_e(inst, "%s: buffer alloc failed\n", __func__); return -ENOMEM; @@ -857,12 +860,14 @@ static int handle_output_buffer(struct msm_vidc_inst *inst, int rc = 0; struct msm_vidc_buffers *buffers; struct msm_vidc_buffer *buf; + struct msm_vidc_core *core; bool found, fatal = false; - if (!inst || !inst->capabilities) { - d_vpr_e("%s: Invalid params\n", __func__); + if (!inst || !inst->core || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } + core = inst->core; /* handle drain last flag buffer */ if (buffer->flags & HFI_BUF_FW_FLAG_LAST) { @@ -982,7 +987,7 @@ static int handle_output_buffer(struct msm_vidc_inst *inst, } if (buf->dbuf_get) { - msm_vidc_memory_put_dmabuf(inst, buf->dmabuf); + call_mem_op(core, dma_buf_put, inst, buf->dmabuf); buf->dbuf_get = 0; } } From 23e5f249d688de7308b2bb8fb047630b2b5b1fcd Mon Sep 17 00:00:00 2001 From: Deepa Guthyappa Madivalara Date: Wed, 26 Oct 2022 12:10:08 -0700 Subject: [PATCH 0746/1061] video: driver: Add TURBO and LOWSVS_D1 clocks Update the clk table to support TURBO and LOWSVS_D1 clocks Change-Id: I69f710ae45df47f0e5190ec1be217b69f35abcf7 Signed-off-by: Deepa Guthyappa Madivalara --- driver/platform/pineapple/src/msm_vidc_pineapple.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/driver/platform/pineapple/src/msm_vidc_pineapple.c b/driver/platform/pineapple/src/msm_vidc_pineapple.c index bf86f88a97..683dfad5ed 100644 --- a/driver/platform/pineapple/src/msm_vidc_pineapple.c +++ b/driver/platform/pineapple/src/msm_vidc_pineapple.c @@ -2672,7 +2672,7 @@ const struct context_bank_table pineapple_context_bank_table[] = { /* freq */ static struct freq_table pineapple_freq_table[] = { - {480000000}, {435000000}, {380000000}, {280000000} + {533333333}, {480000000}, {435000000}, {380000000}, {280000000}, {196000000} }; /* register, value, mask */ From 6b0dcb4a4fc5f031d5363ddea2746000c2402f32 Mon Sep 17 00:00:00 2001 From: Ankush Mitra Date: Wed, 26 Oct 2022 15:52:45 +0530 Subject: [PATCH 0747/1061] video: driver: code re-structure memory ops support Re-structure the memory_ops code so that upstream driver use mem_ops defined on msm_vidc_memory.c and downstream driver use mem_ops defined on msm_vidc_memory_ext.c. It helps to modularize the code even further. Change-Id: Id00b0872d7a902a8540500df5efb5f546a9dbe41 Signed-off-by: Ankush Mitra --- .../platform/common/inc/msm_vidc_platform.h | 37 - .../platform/common/src/msm_vidc_platform.c | 21 +- driver/platform/kalama/src/msm_vidc_kalama.c | 21 +- .../pineapple/src/msm_vidc_pineapple.c | 21 +- driver/vidc/inc/msm_vidc_memory.h | 65 +- driver/vidc/inc/msm_vidc_memory_ext.h | 12 +- driver/vidc/src/msm_vidc.c | 3 +- driver/vidc/src/msm_vidc_driver.c | 62 +- driver/vidc/src/msm_vidc_memory.c | 685 +++++++++--------- driver/vidc/src/msm_vidc_memory_ext.c | 30 +- driver/vidc/src/venus_hfi.c | 4 +- driver/vidc/src/venus_hfi_response.c | 2 +- 12 files changed, 453 insertions(+), 510 deletions(-) diff --git a/driver/platform/common/inc/msm_vidc_platform.h b/driver/platform/common/inc/msm_vidc_platform.h index 820f216ac2..2e0a012d14 100644 --- a/driver/platform/common/inc/msm_vidc_platform.h +++ b/driver/platform/common/inc/msm_vidc_platform.h @@ -11,7 +11,6 @@ #include "msm_vidc_internal.h" #include "msm_vidc_core.h" -#include "msm_vidc_memory.h" #define DDR_TYPE_LPDDR4 0x6 #define DDR_TYPE_LPDDR4X 0x7 @@ -220,42 +219,6 @@ struct msm_vidc_platform { struct msm_vidc_platform_data data; }; -#define call_mem_op(c, op, ...) \ - (((c) && (c)->mem_ops && (c)->mem_ops->op) ? \ - ((c)->mem_ops->op(__VA_ARGS__)) : 0) - -struct msm_vidc_memory_ops { - struct dma_buf_attachment *(*dma_buf_attach)(struct msm_vidc_core *core, - struct dma_buf *dbuf, struct device *dev); - int (*dma_buf_detach)(struct msm_vidc_core *core, struct dma_buf *dbuf, - struct dma_buf_attachment *attach); - struct sg_table *(*dma_buf_map_attachment)(struct msm_vidc_core *core, - struct dma_buf_attachment *attach); - int (*dma_buf_unmap_attachment)(struct msm_vidc_core *core, - struct dma_buf_attachment *attach, struct sg_table *table); - int (*memory_alloc)(struct msm_vidc_core *core, - struct msm_vidc_alloc *alloc); - int (*memory_free)(struct msm_vidc_core *core, - struct msm_vidc_alloc *alloc); - int (*memory_map)(struct msm_vidc_core *core, - struct msm_vidc_map *map); - int (*memory_unmap)(struct msm_vidc_core *core, - struct msm_vidc_map *map); - u32 (*buffer_region)(struct msm_vidc_inst *inst, - enum msm_vidc_buffer_type buffer_type); - struct dma_buf *(*dma_buf_get)(struct msm_vidc_inst *inst, - int fd); - void (*dma_buf_put)(struct msm_vidc_inst *inst, - struct dma_buf *dmabuf); - void (*dma_buf_put_completely)(struct msm_vidc_inst *inst, - struct msm_memory_dmabuf *buf); - int (*pools_init)(struct msm_vidc_inst *inst); - void (*pools_deinit)(struct msm_vidc_inst *inst); - void *(*pool_alloc)(struct msm_vidc_inst *inst, - enum msm_memory_pool_type type); - void (*pool_free)(struct msm_vidc_inst *inst, void *vidc_buf); -}; - static inline bool is_sys_cache_present(struct msm_vidc_core *core) { return !!core->platform->data.subcache_tbl_size; diff --git a/driver/platform/common/src/msm_vidc_platform.c b/driver/platform/common/src/msm_vidc_platform.c index 3e0b16011f..a0a6b8fca5 100644 --- a/driver/platform/common/src/msm_vidc_platform.c +++ b/driver/platform/common/src/msm_vidc_platform.c @@ -187,25 +187,6 @@ static struct v4l2_m2m_ops msm_v4l2_m2m_ops = { .job_abort = msm_v4l2_m2m_job_abort, }; -static struct msm_vidc_memory_ops msm_mem_ops = { - .dma_buf_attach = msm_vidc_dma_buf_attach, - .dma_buf_detach = msm_vidc_dma_buf_detach, - .dma_buf_map_attachment = msm_vidc_dma_buf_map_attachment, - .dma_buf_unmap_attachment = msm_vidc_dma_buf_unmap_attachment, - .memory_alloc = msm_vidc_memory_alloc, - .memory_free = msm_vidc_memory_free, - .memory_map = msm_vidc_memory_map, - .memory_unmap = msm_vidc_memory_unmap, - .buffer_region = msm_vidc_buffer_region, - .dma_buf_get = msm_vidc_dma_buf_get, - .dma_buf_put = msm_vidc_dma_buf_put, - .dma_buf_put_completely = msm_vidc_dma_buf_put_completely, - .pools_init = msm_vidc_pools_init, - .pools_deinit = msm_vidc_pools_deinit, - .pool_alloc = msm_vidc_pool_alloc, - .pool_free = msm_vidc_pool_free, -}; - static int msm_vidc_init_ops(struct msm_vidc_core *core) { if (!core) { @@ -222,7 +203,7 @@ static int msm_vidc_init_ops(struct msm_vidc_core *core) core->vb2_mem_ops = &msm_vb2_mem_ops; core->media_device_ops = &msm_v4l2_media_ops; core->v4l2_m2m_ops = &msm_v4l2_m2m_ops; - core->mem_ops = &msm_mem_ops; + core->mem_ops = get_mem_ops(); return 0; } diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index 8386afa88d..2e71ca1251 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -2765,25 +2765,6 @@ static const struct msm_vidc_platform_data kalama_data_v2 = { .format_data = &format_data_kalama, }; -static struct msm_vidc_memory_ops kalama_msm_mem_ops = { - .dma_buf_attach = msm_vidc_dma_buf_attach_ext, - .dma_buf_detach = msm_vidc_dma_buf_detach, - .dma_buf_map_attachment = msm_vidc_dma_buf_map_attachment, - .dma_buf_unmap_attachment = msm_vidc_dma_buf_unmap_attachment, - .memory_alloc = msm_vidc_memory_alloc_ext, - .memory_free = msm_vidc_memory_free_ext, - .memory_map = msm_vidc_memory_map_ext, - .memory_unmap = msm_vidc_memory_unmap, - .buffer_region = msm_vidc_buffer_region_ext, - .dma_buf_get = msm_vidc_dma_buf_get, - .dma_buf_put = msm_vidc_dma_buf_put, - .dma_buf_put_completely = msm_vidc_dma_buf_put_completely, - .pools_init = msm_vidc_pools_init, - .pools_deinit = msm_vidc_pools_deinit, - .pool_alloc = msm_vidc_pool_alloc, - .pool_free = msm_vidc_pool_free, -}; - int msm_vidc_kalama_check_ddr_type(void) { u32 ddr_type; @@ -2814,7 +2795,7 @@ static int msm_vidc_init_data(struct msm_vidc_core *core, struct device *dev) else core->platform->data = kalama_data; - core->mem_ops = &kalama_msm_mem_ops; + core->mem_ops = get_mem_ops_ext(); rc = msm_vidc_kalama_check_ddr_type(); if (rc) return rc; diff --git a/driver/platform/pineapple/src/msm_vidc_pineapple.c b/driver/platform/pineapple/src/msm_vidc_pineapple.c index 57497665bc..3f79e6604c 100644 --- a/driver/platform/pineapple/src/msm_vidc_pineapple.c +++ b/driver/platform/pineapple/src/msm_vidc_pineapple.c @@ -2721,25 +2721,6 @@ static const struct msm_vidc_platform_data pineapple_data = { .format_data = &format_data_pineapple, }; -static struct msm_vidc_memory_ops pineapple_msm_mem_ops = { - .dma_buf_attach = msm_vidc_dma_buf_attach_ext, - .dma_buf_detach = msm_vidc_dma_buf_detach, - .dma_buf_map_attachment = msm_vidc_dma_buf_map_attachment, - .dma_buf_unmap_attachment = msm_vidc_dma_buf_unmap_attachment, - .memory_alloc = msm_vidc_memory_alloc_ext, - .memory_free = msm_vidc_memory_free_ext, - .memory_map = msm_vidc_memory_map_ext, - .memory_unmap = msm_vidc_memory_unmap, - .buffer_region = msm_vidc_buffer_region_ext, - .dma_buf_get = msm_vidc_dma_buf_get, - .dma_buf_put = msm_vidc_dma_buf_put, - .dma_buf_put_completely = msm_vidc_dma_buf_put_completely, - .pools_init = msm_vidc_pools_init, - .pools_deinit = msm_vidc_pools_deinit, - .pool_alloc = msm_vidc_pool_alloc, - .pool_free = msm_vidc_pool_free, -}; - int msm_vidc_pineapple_check_ddr_type(void) { u32 ddr_type; @@ -2766,7 +2747,7 @@ static int msm_vidc_init_data(struct msm_vidc_core *core) d_vpr_h("%s: initialize pineapple data\n", __func__); core->platform->data = pineapple_data; - core->mem_ops = &pineapple_msm_mem_ops; + core->mem_ops = get_mem_ops_ext(); rc = msm_vidc_pineapple_check_ddr_type(); if (rc) return rc; diff --git a/driver/vidc/inc/msm_vidc_memory.h b/driver/vidc/inc/msm_vidc_memory.h index 2af6aa4294..3e0e643004 100644 --- a/driver/vidc/inc/msm_vidc_memory.h +++ b/driver/vidc/inc/msm_vidc_memory.h @@ -45,36 +45,45 @@ struct msm_memory_pool { struct list_head busy_pool; /* list of struct msm_memory_alloc_header */ }; -int msm_vidc_memory_alloc(struct msm_vidc_core *core, - struct msm_vidc_alloc *alloc); -int msm_vidc_memory_free(struct msm_vidc_core *core, - struct msm_vidc_alloc *alloc); -int msm_vidc_memory_map(struct msm_vidc_core *core, - struct msm_vidc_map *map); -int msm_vidc_memory_unmap(struct msm_vidc_core *core, - struct msm_vidc_map *map); -struct dma_buf *msm_vidc_dma_buf_get(struct msm_vidc_inst *inst, - int fd); -void msm_vidc_dma_buf_put(struct msm_vidc_inst *inst, - struct dma_buf *dmabuf); -void msm_vidc_dma_buf_put_completely(struct msm_vidc_inst *inst, - struct msm_memory_dmabuf *buf); -int msm_vidc_pools_init(struct msm_vidc_inst *inst); -void msm_vidc_pools_deinit(struct msm_vidc_inst *inst); +int msm_vidc_vmem_alloc(unsigned long size, void **mem, const char *msg); +void msm_vidc_vmem_free(void **addr); void *msm_vidc_pool_alloc(struct msm_vidc_inst *inst, enum msm_memory_pool_type type); void msm_vidc_pool_free(struct msm_vidc_inst *inst, void *vidc_buf); -int msm_vidc_vmem_alloc(unsigned long size, void **mem, const char *msg); -void msm_vidc_vmem_free(void **addr); -struct dma_buf_attachment *msm_vidc_dma_buf_attach(struct msm_vidc_core *core, - struct dma_buf *dbuf, struct device *dev); -int msm_vidc_dma_buf_detach(struct msm_vidc_core *core, struct dma_buf *dbuf, - struct dma_buf_attachment *attach); -struct sg_table *msm_vidc_dma_buf_map_attachment(struct msm_vidc_core *core, - struct dma_buf_attachment *attach); -int msm_vidc_dma_buf_unmap_attachment(struct msm_vidc_core *core, - struct dma_buf_attachment *attach, struct sg_table *table); -u32 msm_vidc_buffer_region(struct msm_vidc_inst *inst, - enum msm_vidc_buffer_type buffer_type); +int msm_vidc_pools_init(struct msm_vidc_inst *inst); +void msm_vidc_pools_deinit(struct msm_vidc_inst *inst); + +#define call_mem_op(c, op, ...) \ + (((c) && (c)->mem_ops && (c)->mem_ops->op) ? \ + ((c)->mem_ops->op(__VA_ARGS__)) : 0) + +struct msm_vidc_memory_ops { + struct dma_buf *(*dma_buf_get)(struct msm_vidc_inst *inst, + int fd); + void (*dma_buf_put)(struct msm_vidc_inst *inst, + struct dma_buf *dmabuf); + void (*dma_buf_put_completely)(struct msm_vidc_inst *inst, + struct msm_memory_dmabuf *buf); + struct dma_buf_attachment *(*dma_buf_attach)(struct msm_vidc_core *core, + struct dma_buf *dbuf, struct device *dev); + int (*dma_buf_detach)(struct msm_vidc_core *core, struct dma_buf *dbuf, + struct dma_buf_attachment *attach); + struct sg_table *(*dma_buf_map_attachment)(struct msm_vidc_core *core, + struct dma_buf_attachment *attach); + int (*dma_buf_unmap_attachment)(struct msm_vidc_core *core, + struct dma_buf_attachment *attach, struct sg_table *table); + int (*memory_map)(struct msm_vidc_core *core, + struct msm_vidc_map *map); + int (*memory_unmap)(struct msm_vidc_core *core, + struct msm_vidc_map *map); + int (*memory_alloc)(struct msm_vidc_core *core, + struct msm_vidc_alloc *alloc); + int (*memory_free)(struct msm_vidc_core *core, + struct msm_vidc_alloc *alloc); + u32 (*buffer_region)(struct msm_vidc_inst *inst, + enum msm_vidc_buffer_type buffer_type); +}; + +struct msm_vidc_memory_ops *get_mem_ops(void); #endif // _MSM_VIDC_MEMORY_H_ \ No newline at end of file diff --git a/driver/vidc/inc/msm_vidc_memory_ext.h b/driver/vidc/inc/msm_vidc_memory_ext.h index 0d95ec52e1..bf3bfa63ee 100644 --- a/driver/vidc/inc/msm_vidc_memory_ext.h +++ b/driver/vidc/inc/msm_vidc_memory_ext.h @@ -7,16 +7,8 @@ #ifndef _MSM_VIDC_MEMORY_EXT_H_ #define _MSM_VIDC_MEMORY_EXT_H_ -#include "msm_vidc_memory.h" +struct msm_vidc_memory_ops; -struct dma_buf_attachment *msm_vidc_dma_buf_attach_ext(struct msm_vidc_core *core, - struct dma_buf *dbuf, struct device *dev); -int msm_vidc_memory_alloc_ext(struct msm_vidc_core *core, - struct msm_vidc_alloc *alloc); -int msm_vidc_memory_free_ext(struct msm_vidc_core *core, struct msm_vidc_alloc *mem); -int msm_vidc_memory_map_ext(struct msm_vidc_core *core, - struct msm_vidc_map *map); -u32 msm_vidc_buffer_region_ext(struct msm_vidc_inst *inst, - enum msm_vidc_buffer_type buffer_type); +struct msm_vidc_memory_ops *get_mem_ops_ext(void); #endif // _MSM_VIDC_MEMORY_EXT_H_ \ No newline at end of file diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index 645a173bb0..e4e3c7063e 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -21,7 +21,6 @@ #include "msm_vidc_memory.h" #include "venus_hfi_response.h" #include "msm_vidc.h" -#include "msm_vidc_platform.h" extern const char video_banner[]; @@ -911,7 +910,7 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) msm_vidc_update_debug_str(inst); i_vpr_h(inst, "Opening video instance: %d\n", session_type); - rc = call_mem_op(core, pools_init, inst); + rc = msm_vidc_pools_init(inst); if (rc) { i_vpr_e(inst, "%s: failed to init pool buffers\n", __func__); msm_vidc_vmem_free((void **)&inst); diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 305c1b9530..f3a201b770 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -566,7 +566,7 @@ int msm_vidc_add_buffer_stats(struct msm_vidc_inst *inst, if (buf->type != MSM_VIDC_BUF_INPUT) return 0; - stats = call_mem_op(core, pool_alloc, inst, MSM_MEM_POOL_BUF_STATS); + stats = msm_vidc_pool_alloc(inst, MSM_MEM_POOL_BUF_STATS); if (!stats) return -ENOMEM; INIT_LIST_HEAD(&stats->list); @@ -614,7 +614,7 @@ int msm_vidc_remove_buffer_stats(struct msm_vidc_inst *inst, /* remove entry - no output attached */ if (stats->flags & MSM_VIDC_STATS_FLAG_NO_OUTPUT) { list_del_init(&stats->list); - call_mem_op(core, pool_free, inst, stats); + msm_vidc_pool_free(inst, stats); } } else if (buf->type == MSM_VIDC_BUF_OUTPUT) { /* skip - ebd not arrived(single input - multiple output case) */ @@ -631,7 +631,7 @@ int msm_vidc_remove_buffer_stats(struct msm_vidc_inst *inst, print_buffer_stats(VIDC_STAT, "stat", inst, stats); - call_mem_op(core, pool_free, inst, stats); + msm_vidc_pool_free(inst, stats); } } } @@ -653,7 +653,7 @@ int msm_vidc_flush_buffer_stats(struct msm_vidc_inst *inst) i_vpr_l(inst, "%s: flush buffer_stats list\n", __func__); list_for_each_entry_safe(stats, dummy_stats, &inst->buffer_stats_list, list) { list_del_init(&stats->list); - call_mem_op(core, pool_free, inst, stats); + msm_vidc_pool_free(inst, stats); } /* reset initial ts as well to avoid huge delta */ @@ -2469,7 +2469,7 @@ int msm_vidc_process_readonly_buffers(struct msm_vidc_inst *inst, } list_del_init(&ro_buf->list); - call_mem_op(core, pool_free, inst, ro_buf); + msm_vidc_pool_free(inst, ro_buf); } return rc; @@ -2551,7 +2551,7 @@ int msm_vidc_update_input_rate(struct msm_vidc_inst *inst, u64 time_us) } core = inst->core; - input_timer = call_mem_op(core, pool_alloc, inst, MSM_MEM_POOL_BUF_TIMER); + input_timer = msm_vidc_pool_alloc(inst, MSM_MEM_POOL_BUF_TIMER); if (!input_timer) return -ENOMEM; @@ -2576,7 +2576,7 @@ int msm_vidc_update_input_rate(struct msm_vidc_inst *inst, u64 time_us) input_timer = list_first_entry(&inst->input_timer_list, struct msm_vidc_input_timer, list); list_del_init(&input_timer->list); - call_mem_op(core, pool_free, inst, input_timer); + msm_vidc_pool_free(inst, input_timer); } return 0; @@ -2596,7 +2596,7 @@ int msm_vidc_flush_input_timer(struct msm_vidc_inst *inst) i_vpr_l(inst, "%s: flush input_timer list\n", __func__); list_for_each_entry_safe(input_timer, dummy_timer, &inst->input_timer_list, list) { list_del_init(&input_timer->list); - call_mem_op(core, pool_free, inst, input_timer); + msm_vidc_pool_free(inst, input_timer); } return 0; } @@ -2715,7 +2715,7 @@ int msm_vidc_flush_ts(struct msm_vidc_inst *inst) i_vpr_l(inst, "%s: flushing ts: val %llu, rank %llu\n", __func__, ts->sort.val, ts->rank); list_del(&ts->sort.list); - call_mem_op(core, pool_free, inst, ts); + msm_vidc_pool_free(inst, ts); } inst->timestamps.count = 0; inst->timestamps.rank = 0; @@ -2739,7 +2739,7 @@ int msm_vidc_update_timestamp_rate(struct msm_vidc_inst *inst, u64 timestamp) } core = inst->core; - ts = call_mem_op(core, pool_alloc, inst, MSM_MEM_POOL_TIMESTAMP); + ts = msm_vidc_pool_alloc(inst, MSM_MEM_POOL_TIMESTAMP); if (!ts) { i_vpr_e(inst, "%s: ts alloc failed\n", __func__); return -ENOMEM; @@ -2767,7 +2767,7 @@ int msm_vidc_update_timestamp_rate(struct msm_vidc_inst *inst, u64 timestamp) } inst->timestamps.count--; list_del(&ts->sort.list); - call_mem_op(core, pool_free, inst, ts); + msm_vidc_pool_free(inst, ts); } /* Calculate timestamp rate */ @@ -2801,7 +2801,7 @@ int msm_vidc_ts_reorder_insert_timestamp(struct msm_vidc_inst *inst, u64 timesta core = inst->core; /* allocate ts from pool */ - ts = call_mem_op(core, pool_alloc, inst, MSM_MEM_POOL_TIMESTAMP); + ts = msm_vidc_pool_alloc(inst, MSM_MEM_POOL_TIMESTAMP); if (!ts) { i_vpr_e(inst, "%s: ts alloc failed\n", __func__); return -ENOMEM; @@ -2834,7 +2834,7 @@ int msm_vidc_ts_reorder_remove_timestamp(struct msm_vidc_inst *inst, u64 timesta if (ts->sort.val == timestamp) { list_del_init(&ts->sort.list); inst->ts_reorder.count--; - call_mem_op(core, pool_free, inst, ts); + msm_vidc_pool_free(inst, ts); break; } } @@ -2868,7 +2868,7 @@ int msm_vidc_ts_reorder_get_first_timestamp(struct msm_vidc_inst *inst, u64 *tim *timestamp = ts->sort.val; inst->ts_reorder.count--; - call_mem_op(core, pool_free, inst, ts); + msm_vidc_pool_free(inst, ts); return 0; } @@ -2888,7 +2888,7 @@ int msm_vidc_ts_reorder_flush(struct msm_vidc_inst *inst) list_for_each_entry_safe(ts, temp, &inst->ts_reorder.list, sort.list) { i_vpr_l(inst, "%s: flushing ts: val %lld\n", __func__, ts->sort.val); list_del(&ts->sort.list); - call_mem_op(core, pool_free, inst, ts); + msm_vidc_pool_free(inst, ts); } inst->ts_reorder.count = 0; @@ -2957,7 +2957,7 @@ int msm_vidc_allocate_buffers(struct msm_vidc_inst *inst, return -EINVAL; for (idx = 0; idx < num_buffers; idx++) { - buf = call_mem_op(core, pool_alloc, inst, MSM_MEM_POOL_BUFFER); + buf = msm_vidc_pool_alloc(inst, MSM_MEM_POOL_BUFFER); if (!buf) { i_vpr_e(inst, "%s: alloc failed\n", __func__); return -EINVAL; @@ -2996,7 +2996,7 @@ int msm_vidc_free_buffers(struct msm_vidc_inst *inst, buf_count++; print_vidc_buffer(VIDC_LOW, "low ", "free buffer", inst, buf); list_del_init(&buf->list); - call_mem_op(core, pool_free, inst, buf); + msm_vidc_pool_free(inst, buf); } i_vpr_h(inst, "%s: freed %d buffers for type %s\n", __func__, buf_count, buf_name(buf_type)); @@ -3631,7 +3631,7 @@ int msm_vidc_destroy_internal_buffer(struct msm_vidc_inst *inst, if (map->dmabuf == buffer->dmabuf) { call_mem_op(core, memory_unmap, core, map); list_del(&map->list); - call_mem_op(core, pool_free, inst, map); + msm_vidc_pool_free(inst, map); break; } } @@ -3640,7 +3640,7 @@ int msm_vidc_destroy_internal_buffer(struct msm_vidc_inst *inst, if (alloc->dmabuf == buffer->dmabuf) { call_mem_op(core, memory_free, core, alloc); list_del(&alloc->list); - call_mem_op(core, pool_free, inst, alloc); + msm_vidc_pool_free(inst, alloc); break; } } @@ -3648,7 +3648,7 @@ int msm_vidc_destroy_internal_buffer(struct msm_vidc_inst *inst, list_for_each_entry_safe(buf, dummy, &buffers->list, list) { if (buf->dmabuf == buffer->dmabuf) { list_del(&buf->list); - call_mem_op(core, pool_free, inst, buf); + msm_vidc_pool_free(inst, buf); break; } } @@ -3730,7 +3730,7 @@ int msm_vidc_create_internal_buffer(struct msm_vidc_inst *inst, if (!buffers->size) return 0; - buffer = call_mem_op(core, pool_alloc, inst, MSM_MEM_POOL_BUFFER); + buffer = msm_vidc_pool_alloc(inst, MSM_MEM_POOL_BUFFER); if (!buffer) { i_vpr_e(inst, "%s: buf alloc failed\n", __func__); return -ENOMEM; @@ -3741,7 +3741,7 @@ int msm_vidc_create_internal_buffer(struct msm_vidc_inst *inst, buffer->buffer_size = buffers->size; list_add_tail(&buffer->list, &buffers->list); - alloc = call_mem_op(core, pool_alloc, inst, MSM_MEM_POOL_ALLOC); + alloc = msm_vidc_pool_alloc(inst, MSM_MEM_POOL_ALLOC); if (!alloc) { i_vpr_e(inst, "%s: alloc failed\n", __func__); return -ENOMEM; @@ -3756,7 +3756,7 @@ int msm_vidc_create_internal_buffer(struct msm_vidc_inst *inst, return -ENOMEM; list_add_tail(&alloc->list, &allocations->list); - map = call_mem_op(core, pool_alloc, inst, MSM_MEM_POOL_MAP); + map = msm_vidc_pool_alloc(inst, MSM_MEM_POOL_MAP); if (!map) { i_vpr_e(inst, "%s: map alloc failed\n", __func__); return -ENOMEM; @@ -5445,7 +5445,7 @@ int msm_vidc_flush_read_only_buffers(struct msm_vidc_inst *inst, ro_buf->dbuf_get = 0; ro_buf->device_addr = 0x0; list_del_init(&ro_buf->list); - call_mem_op(core, pool_free, inst, ro_buf); + msm_vidc_pool_free(inst, ro_buf); } return rc; @@ -5515,7 +5515,7 @@ void msm_vidc_destroy_buffers(struct msm_vidc_inst *inst) if (buf->dbuf_get) call_mem_op(core, dma_buf_put, inst, buf->dmabuf); list_del_init(&buf->list); - call_mem_op(core, pool_free, inst, buf); + msm_vidc_pool_free(inst, buf); } for (i = 0; i < ARRAY_SIZE(ext_buf_types); i++) { @@ -5534,7 +5534,7 @@ void msm_vidc_destroy_buffers(struct msm_vidc_inst *inst) call_mem_op(core, dma_buf_put, inst, buf->dmabuf); } list_del_init(&buf->list); - call_mem_op(core, pool_free, inst, buf); + msm_vidc_pool_free(inst, buf); } } @@ -5542,27 +5542,27 @@ void msm_vidc_destroy_buffers(struct msm_vidc_inst *inst) i_vpr_e(inst, "%s: removing ts: val %lld, rank %lld\n", __func__, ts->sort.val, ts->rank); list_del(&ts->sort.list); - call_mem_op(core, pool_free, inst, ts); + msm_vidc_pool_free(inst, ts); } list_for_each_entry_safe(ts, dummy_ts, &inst->ts_reorder.list, sort.list) { i_vpr_e(inst, "%s: removing reorder ts: val %lld\n", __func__, ts->sort.val); list_del(&ts->sort.list); - call_mem_op(core, pool_free, inst, ts); + msm_vidc_pool_free(inst, ts); } list_for_each_entry_safe(timer, dummy_timer, &inst->input_timer_list, list) { i_vpr_e(inst, "%s: removing input_timer %lld\n", __func__, timer->time_us); list_del(&timer->list); - call_mem_op(core, pool_free, inst, timer); + msm_vidc_pool_free(inst, timer); } list_for_each_entry_safe(stats, dummy_stats, &inst->buffer_stats_list, list) { print_buffer_stats(VIDC_ERR, "err ", inst, stats); list_del(&stats->list); - call_mem_op(core, pool_free, inst, stats); + msm_vidc_pool_free(inst, stats); } list_for_each_entry_safe(dbuf, dummy_dbuf, &inst->dmabuf_tracker, list) { @@ -5605,7 +5605,7 @@ void msm_vidc_destroy_buffers(struct msm_vidc_inst *inst) } /* destroy buffers from pool */ - call_mem_op(core, pools_deinit, inst); + msm_vidc_pools_deinit(inst); } static void msm_vidc_close_helper(struct kref *kref) diff --git a/driver/vidc/src/msm_vidc_memory.c b/driver/vidc/src/msm_vidc_memory.c index 5b2b73d39e..7fc643b2fb 100644 --- a/driver/vidc/src/msm_vidc_memory.c +++ b/driver/vidc/src/msm_vidc_memory.c @@ -23,298 +23,28 @@ MODULE_IMPORT_NS(DMA_BUF); #endif -struct dma_buf *msm_vidc_dma_buf_get(struct msm_vidc_inst *inst, int fd) -{ - struct msm_memory_dmabuf *buf = NULL; - struct dma_buf *dmabuf = NULL; - bool found = false; +struct msm_vidc_type_size_name { + enum msm_memory_pool_type type; + u32 size; + char *name; +}; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return NULL; - } - - /* get local dmabuf ref for tracking */ - dmabuf = dma_buf_get(fd); - if (IS_ERR_OR_NULL(dmabuf)) { - d_vpr_e("Failed to get dmabuf for %d, error %ld\n", - fd, PTR_ERR(dmabuf)); - return NULL; - } - - /* track dmabuf - inc refcount if already present */ - list_for_each_entry(buf, &inst->dmabuf_tracker, list) { - if (buf->dmabuf == dmabuf) { - buf->refcount++; - found = true; - break; - } - } - if (found) { - /* put local dmabuf ref */ - dma_buf_put(dmabuf); - return dmabuf; - } - - /* get tracker instance from pool */ - buf = msm_vidc_pool_alloc(inst, MSM_MEM_POOL_DMABUF); - if (!buf) { - i_vpr_e(inst, "%s: dmabuf alloc failed\n", __func__); - dma_buf_put(dmabuf); - return NULL; - } - /* hold dmabuf strong ref in tracker */ - buf->dmabuf = dmabuf; - buf->refcount = 1; - INIT_LIST_HEAD(&buf->list); - - /* add new dmabuf entry to tracker */ - list_add_tail(&buf->list, &inst->dmabuf_tracker); - - return dmabuf; -} - -void msm_vidc_dma_buf_put(struct msm_vidc_inst *inst, struct dma_buf *dmabuf) -{ - struct msm_memory_dmabuf *buf = NULL; - bool found = false; - - if (!inst || !dmabuf) { - d_vpr_e("%s: invalid params\n", __func__); - return; - } - - /* track dmabuf - dec refcount if already present */ - list_for_each_entry(buf, &inst->dmabuf_tracker, list) { - if (buf->dmabuf == dmabuf) { - buf->refcount--; - found = true; - break; - } - } - if (!found) { - i_vpr_e(inst, "%s: invalid dmabuf %#x\n", __func__, dmabuf); - return; - } - - /* non-zero refcount - do nothing */ - if (buf->refcount) - return; - - /* remove dmabuf entry from tracker */ - list_del(&buf->list); - - /* release dmabuf strong ref from tracker */ - dma_buf_put(buf->dmabuf); - - /* put tracker instance back to pool */ - msm_vidc_pool_free(inst, buf); -} - -void msm_vidc_dma_buf_put_completely(struct msm_vidc_inst *inst, - struct msm_memory_dmabuf *buf) -{ - if (!inst || !buf) { - d_vpr_e("%s: invalid params\n", __func__); - return; - } - - while (buf->refcount) { - buf->refcount--; - if (!buf->refcount) { - /* remove dmabuf entry from tracker */ - list_del(&buf->list); - - /* release dmabuf strong ref from tracker */ - dma_buf_put(buf->dmabuf); - - /* put tracker instance back to pool */ - msm_vidc_pool_free(inst, buf); - break; - } - } -} - -int msm_vidc_memory_map(struct msm_vidc_core *core, struct msm_vidc_map *map) -{ - int rc = 0; - struct dma_buf_attachment *attach = NULL; - struct sg_table *table = NULL; - struct context_bank_info *cb = NULL; - - if (!core || !map) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - if (map->refcount) { - map->refcount++; - goto exit; - } - - cb = msm_vidc_get_context_bank_for_region(core, map->region); - if (!cb) { - d_vpr_e("%s: Failed to get context bank device\n", - __func__); - rc = -EIO; - goto error_cb; - } - - /* Prepare a dma buf for dma on the given device */ - attach = msm_vidc_dma_buf_attach(core, map->dmabuf, cb->dev); - if (IS_ERR_OR_NULL(attach)) { - rc = PTR_ERR(attach) ? PTR_ERR(attach) : -ENOMEM; - d_vpr_e("Failed to attach dmabuf\n"); - goto error_attach; - } - - table = msm_vidc_dma_buf_map_attachment(core, attach); - if (IS_ERR_OR_NULL(table)) { - rc = PTR_ERR(table) ? PTR_ERR(table) : -ENOMEM; - d_vpr_e("Failed to map table\n"); - goto error_table; - } - - map->device_addr = table->sgl->dma_address; - map->table = table; - map->attach = attach; - map->refcount++; - -exit: - d_vpr_l( - "%s: type %11s, device_addr %#llx, refcount %d, region %d\n", - __func__, buf_name(map->type), map->device_addr, map->refcount, map->region); - - return 0; - -error_table: - msm_vidc_dma_buf_detach(core, map->dmabuf, attach); -error_attach: -error_cb: - return rc; -} - -int msm_vidc_memory_unmap(struct msm_vidc_core *core, - struct msm_vidc_map *map) -{ - int rc = 0; - - if (!core || !map) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - if (map->refcount) { - map->refcount--; - } else { - d_vpr_e("unmap called while refcount is zero already\n"); - return -EINVAL; - } - - d_vpr_l( - "%s: type %11s, device_addr %#llx, refcount %d, region %d\n", - __func__, buf_name(map->type), map->device_addr, map->refcount, map->region); - - if (map->refcount) - goto exit; - - msm_vidc_dma_buf_unmap_attachment(core, map->attach, map->table); - msm_vidc_dma_buf_detach(core, map->dmabuf, map->attach); - - map->device_addr = 0x0; - map->attach = NULL; - map->table = NULL; - -exit: - return rc; -} - -struct dma_buf_attachment *msm_vidc_dma_buf_attach(struct msm_vidc_core *core, - struct dma_buf *dbuf, struct device *dev) -{ - int rc = 0; - struct dma_buf_attachment *attach = NULL; - - if (!core || !dbuf || !dev) { - d_vpr_e("%s: invalid params\n", __func__); - return NULL; - } - - attach = dma_buf_attach(dbuf, dev); - if (IS_ERR_OR_NULL(attach)) { - rc = PTR_ERR(attach) ? PTR_ERR(attach) : -1; - d_vpr_e("Failed to attach dmabuf, error %d\n", rc); - return NULL;; - } - - /* - * We do not need dma_map function to perform cache operations - * on the whole buffer size and hence pass skip sync flag. - */ - attach->dma_map_attrs |= DMA_ATTR_SKIP_CPU_SYNC; - - return attach; -} - -int msm_vidc_dma_buf_detach(struct msm_vidc_core *core, - struct dma_buf *dbuf, struct dma_buf_attachment *attach) -{ - int rc = 0; - - if (!dbuf || !attach) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - dma_buf_detach(dbuf, attach); - - return rc; -} - -struct sg_table *msm_vidc_dma_buf_map_attachment( - struct msm_vidc_core *core, struct dma_buf_attachment *attach) -{ - int rc = 0; - struct sg_table *table = NULL; - - if (!attach) { - d_vpr_e("%s: invalid params\n", __func__); - return NULL; - } - - table = dma_buf_map_attachment(attach, DMA_BIDIRECTIONAL); - if (IS_ERR_OR_NULL(table)) { - rc = PTR_ERR(table) ? PTR_ERR(table) : -1; - d_vpr_e("Failed to map table, error %d\n", rc); - return NULL; - } - if (!table->sgl) { - d_vpr_e("%s: sgl is NULL\n", __func__); - msm_vidc_dma_buf_unmap_attachment(core, attach, table); - return NULL; - } - - return table; -} - -int msm_vidc_dma_buf_unmap_attachment(struct msm_vidc_core *core, - struct dma_buf_attachment *attach, struct sg_table *table) -{ - int rc = 0; - - if (!attach || !table) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - dma_buf_unmap_attachment(attach, table, DMA_BIDIRECTIONAL); - - return rc; -} +static const struct msm_vidc_type_size_name buftype_size_name_arr[] = { + {MSM_MEM_POOL_BUFFER, sizeof(struct msm_vidc_buffer), "MSM_MEM_POOL_BUFFER" }, + {MSM_MEM_POOL_MAP, sizeof(struct msm_vidc_map), "MSM_MEM_POOL_MAP" }, + {MSM_MEM_POOL_ALLOC, sizeof(struct msm_vidc_alloc), "MSM_MEM_POOL_ALLOC" }, + {MSM_MEM_POOL_TIMESTAMP, sizeof(struct msm_vidc_timestamp), "MSM_MEM_POOL_TIMESTAMP" }, + {MSM_MEM_POOL_DMABUF, sizeof(struct msm_memory_dmabuf), "MSM_MEM_POOL_DMABUF" }, + {MSM_MEM_POOL_PACKET, sizeof(struct hfi_pending_packet) + MSM_MEM_POOL_PACKET_SIZE, + "MSM_MEM_POOL_PACKET"}, + {MSM_MEM_POOL_BUF_TIMER, sizeof(struct msm_vidc_input_timer), "MSM_MEM_POOL_BUF_TIMER" }, + {MSM_MEM_POOL_BUF_STATS, sizeof(struct msm_vidc_buffer_stats), "MSM_MEM_POOL_BUF_STATS"}, +}; int msm_vidc_vmem_alloc(unsigned long size, void **mem, const char *msg) { int rc = 0; + if (*mem) { d_vpr_e("%s: error: double alloc\n", msg); rc = -EINVAL; @@ -337,18 +67,6 @@ void msm_vidc_vmem_free(void **addr) } } -int msm_vidc_memory_alloc(struct msm_vidc_core *core, struct msm_vidc_alloc *mem) -{ - d_vpr_e("%s: unsupported\n", __func__); - return -EINVAL; -} - -int msm_vidc_memory_free(struct msm_vidc_core *core, struct msm_vidc_alloc *mem) -{ - d_vpr_e("%s: unsupported\n", __func__); - return -EINVAL; -} - void *msm_vidc_pool_alloc(struct msm_vidc_inst *inst, enum msm_memory_pool_type type) { struct msm_memory_alloc_header *hdr = NULL; @@ -466,38 +184,6 @@ static void msm_vidc_destroy_pool_buffers(struct msm_vidc_inst *inst, __func__, pool->name, fcount, bcount); } -void msm_vidc_pools_deinit(struct msm_vidc_inst *inst) -{ - u32 i = 0; - - if (!inst) { - d_vpr_e("%s: Invalid params\n", __func__); - return; - } - - /* destroy all buffers from all pool types */ - for (i = 0; i < MSM_MEM_POOL_MAX; i++) - msm_vidc_destroy_pool_buffers(inst, i); -} - -struct msm_vidc_type_size_name { - enum msm_memory_pool_type type; - u32 size; - char *name; -}; - -static const struct msm_vidc_type_size_name buftype_size_name_arr[] = { - {MSM_MEM_POOL_BUFFER, sizeof(struct msm_vidc_buffer), "MSM_MEM_POOL_BUFFER" }, - {MSM_MEM_POOL_MAP, sizeof(struct msm_vidc_map), "MSM_MEM_POOL_MAP" }, - {MSM_MEM_POOL_ALLOC, sizeof(struct msm_vidc_alloc), "MSM_MEM_POOL_ALLOC" }, - {MSM_MEM_POOL_TIMESTAMP, sizeof(struct msm_vidc_timestamp), "MSM_MEM_POOL_TIMESTAMP" }, - {MSM_MEM_POOL_DMABUF, sizeof(struct msm_memory_dmabuf), "MSM_MEM_POOL_DMABUF" }, - {MSM_MEM_POOL_PACKET, sizeof(struct hfi_pending_packet) + MSM_MEM_POOL_PACKET_SIZE, - "MSM_MEM_POOL_PACKET"}, - {MSM_MEM_POOL_BUF_TIMER, sizeof(struct msm_vidc_input_timer), "MSM_MEM_POOL_BUF_TIMER" }, - {MSM_MEM_POOL_BUF_STATS, sizeof(struct msm_vidc_buffer_stats), "MSM_MEM_POOL_BUF_STATS"}, -}; - int msm_vidc_pools_init(struct msm_vidc_inst *inst) { u32 i; @@ -528,8 +214,343 @@ int msm_vidc_pools_init(struct msm_vidc_inst *inst) return 0; } -u32 msm_vidc_buffer_region(struct msm_vidc_inst *inst, +void msm_vidc_pools_deinit(struct msm_vidc_inst *inst) +{ + u32 i = 0; + + if (!inst) { + d_vpr_e("%s: Invalid params\n", __func__); + return; + } + + /* destroy all buffers from all pool types */ + for (i = 0; i < MSM_MEM_POOL_MAX; i++) + msm_vidc_destroy_pool_buffers(inst, i); +} + +static struct dma_buf *msm_vidc_dma_buf_get(struct msm_vidc_inst *inst, int fd) +{ + struct msm_memory_dmabuf *buf = NULL; + struct dma_buf *dmabuf = NULL; + bool found = false; + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return NULL; + } + + /* get local dmabuf ref for tracking */ + dmabuf = dma_buf_get(fd); + if (IS_ERR_OR_NULL(dmabuf)) { + d_vpr_e("Failed to get dmabuf for %d, error %ld\n", + fd, PTR_ERR(dmabuf)); + return NULL; + } + + /* track dmabuf - inc refcount if already present */ + list_for_each_entry(buf, &inst->dmabuf_tracker, list) { + if (buf->dmabuf == dmabuf) { + buf->refcount++; + found = true; + break; + } + } + if (found) { + /* put local dmabuf ref */ + dma_buf_put(dmabuf); + return dmabuf; + } + + /* get tracker instance from pool */ + buf = msm_vidc_pool_alloc(inst, MSM_MEM_POOL_DMABUF); + if (!buf) { + i_vpr_e(inst, "%s: dmabuf alloc failed\n", __func__); + dma_buf_put(dmabuf); + return NULL; + } + /* hold dmabuf strong ref in tracker */ + buf->dmabuf = dmabuf; + buf->refcount = 1; + INIT_LIST_HEAD(&buf->list); + + /* add new dmabuf entry to tracker */ + list_add_tail(&buf->list, &inst->dmabuf_tracker); + + return dmabuf; +} + +static void msm_vidc_dma_buf_put(struct msm_vidc_inst *inst, struct dma_buf *dmabuf) +{ + struct msm_memory_dmabuf *buf = NULL; + bool found = false; + + if (!inst || !dmabuf) { + d_vpr_e("%s: invalid params\n", __func__); + return; + } + + /* track dmabuf - dec refcount if already present */ + list_for_each_entry(buf, &inst->dmabuf_tracker, list) { + if (buf->dmabuf == dmabuf) { + buf->refcount--; + found = true; + break; + } + } + if (!found) { + i_vpr_e(inst, "%s: invalid dmabuf %#x\n", __func__, dmabuf); + return; + } + + /* non-zero refcount - do nothing */ + if (buf->refcount) + return; + + /* remove dmabuf entry from tracker */ + list_del(&buf->list); + + /* release dmabuf strong ref from tracker */ + dma_buf_put(buf->dmabuf); + + /* put tracker instance back to pool */ + msm_vidc_pool_free(inst, buf); +} + +static void msm_vidc_dma_buf_put_completely(struct msm_vidc_inst *inst, + struct msm_memory_dmabuf *buf) +{ + if (!inst || !buf) { + d_vpr_e("%s: invalid params\n", __func__); + return; + } + + while (buf->refcount) { + buf->refcount--; + if (!buf->refcount) { + /* remove dmabuf entry from tracker */ + list_del(&buf->list); + + /* release dmabuf strong ref from tracker */ + dma_buf_put(buf->dmabuf); + + /* put tracker instance back to pool */ + msm_vidc_pool_free(inst, buf); + break; + } + } +} + +static struct dma_buf_attachment *msm_vidc_dma_buf_attach(struct msm_vidc_core *core, + struct dma_buf *dbuf, struct device *dev) +{ + int rc = 0; + struct dma_buf_attachment *attach = NULL; + + if (!core || !dbuf || !dev) { + d_vpr_e("%s: invalid params\n", __func__); + return NULL; + } + + attach = dma_buf_attach(dbuf, dev); + if (IS_ERR_OR_NULL(attach)) { + rc = PTR_ERR(attach) ? PTR_ERR(attach) : -1; + d_vpr_e("Failed to attach dmabuf, error %d\n", rc); + return NULL; + } + + /* + * We do not need dma_map function to perform cache operations + * on the whole buffer size and hence pass skip sync flag. + */ + attach->dma_map_attrs |= DMA_ATTR_SKIP_CPU_SYNC; + + return attach; +} + +static int msm_vidc_dma_buf_detach(struct msm_vidc_core *core, + struct dma_buf *dbuf, struct dma_buf_attachment *attach) +{ + int rc = 0; + + if (!dbuf || !attach) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + dma_buf_detach(dbuf, attach); + + return rc; +} + +static int msm_vidc_dma_buf_unmap_attachment(struct msm_vidc_core *core, + struct dma_buf_attachment *attach, struct sg_table *table) +{ + int rc = 0; + + if (!attach || !table) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + dma_buf_unmap_attachment(attach, table, DMA_BIDIRECTIONAL); + + return rc; +} + +static struct sg_table *msm_vidc_dma_buf_map_attachment( + struct msm_vidc_core *core, struct dma_buf_attachment *attach) +{ + int rc = 0; + struct sg_table *table = NULL; + + if (!attach) { + d_vpr_e("%s: invalid params\n", __func__); + return NULL; + } + + table = dma_buf_map_attachment(attach, DMA_BIDIRECTIONAL); + if (IS_ERR_OR_NULL(table)) { + rc = PTR_ERR(table) ? PTR_ERR(table) : -1; + d_vpr_e("Failed to map table, error %d\n", rc); + return NULL; + } + if (!table->sgl) { + d_vpr_e("%s: sgl is NULL\n", __func__); + msm_vidc_dma_buf_unmap_attachment(core, attach, table); + return NULL; + } + + return table; +} + +static int msm_vidc_memory_map(struct msm_vidc_core *core, struct msm_vidc_map *map) +{ + int rc = 0; + struct dma_buf_attachment *attach = NULL; + struct sg_table *table = NULL; + struct context_bank_info *cb = NULL; + + if (!core || !map) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (map->refcount) { + map->refcount++; + goto exit; + } + + cb = msm_vidc_get_context_bank_for_region(core, map->region); + if (!cb) { + d_vpr_e("%s: Failed to get context bank device\n", + __func__); + rc = -EIO; + goto error_cb; + } + + /* Prepare a dma buf for dma on the given device */ + attach = msm_vidc_dma_buf_attach(core, map->dmabuf, cb->dev); + if (IS_ERR_OR_NULL(attach)) { + rc = PTR_ERR(attach) ? PTR_ERR(attach) : -ENOMEM; + d_vpr_e("Failed to attach dmabuf\n"); + goto error_attach; + } + + table = msm_vidc_dma_buf_map_attachment(core, attach); + if (IS_ERR_OR_NULL(table)) { + rc = PTR_ERR(table) ? PTR_ERR(table) : -ENOMEM; + d_vpr_e("Failed to map table\n"); + goto error_table; + } + + map->device_addr = table->sgl->dma_address; + map->table = table; + map->attach = attach; + map->refcount++; + +exit: + d_vpr_l( + "%s: type %11s, device_addr %#llx, refcount %d, region %d\n", + __func__, buf_name(map->type), map->device_addr, map->refcount, map->region); + + return 0; + +error_table: + msm_vidc_dma_buf_detach(core, map->dmabuf, attach); +error_attach: +error_cb: + return rc; +} + +static int msm_vidc_memory_unmap(struct msm_vidc_core *core, + struct msm_vidc_map *map) +{ + int rc = 0; + + if (!core || !map) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (map->refcount) { + map->refcount--; + } else { + d_vpr_e("unmap called while refcount is zero already\n"); + return -EINVAL; + } + + d_vpr_l( + "%s: type %11s, device_addr %#llx, refcount %d, region %d\n", + __func__, buf_name(map->type), map->device_addr, map->refcount, map->region); + + if (map->refcount) + goto exit; + + msm_vidc_dma_buf_unmap_attachment(core, map->attach, map->table); + msm_vidc_dma_buf_detach(core, map->dmabuf, map->attach); + + map->device_addr = 0x0; + map->attach = NULL; + map->table = NULL; + +exit: + return rc; +} + +static int msm_vidc_memory_alloc(struct msm_vidc_core *core, struct msm_vidc_alloc *mem) +{ + d_vpr_e("%s: unsupported\n", __func__); + return -EINVAL; +} + +static int msm_vidc_memory_free(struct msm_vidc_core *core, struct msm_vidc_alloc *mem) +{ + d_vpr_e("%s: unsupported\n", __func__); + return -EINVAL; +} + +static u32 msm_vidc_buffer_region(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type buffer_type) { return MSM_VIDC_NON_SECURE; +} + +static struct msm_vidc_memory_ops msm_mem_ops = { + .dma_buf_get = msm_vidc_dma_buf_get, + .dma_buf_put = msm_vidc_dma_buf_put, + .dma_buf_put_completely = msm_vidc_dma_buf_put_completely, + .dma_buf_attach = msm_vidc_dma_buf_attach, + .dma_buf_detach = msm_vidc_dma_buf_detach, + .dma_buf_map_attachment = msm_vidc_dma_buf_map_attachment, + .dma_buf_unmap_attachment = msm_vidc_dma_buf_unmap_attachment, + .memory_map = msm_vidc_memory_map, + .memory_unmap = msm_vidc_memory_unmap, + .memory_alloc = msm_vidc_memory_alloc, + .memory_free = msm_vidc_memory_free, + .buffer_region = msm_vidc_buffer_region, +}; + +struct msm_vidc_memory_ops *get_mem_ops(void) +{ + return &msm_mem_ops; } \ No newline at end of file diff --git a/driver/vidc/src/msm_vidc_memory_ext.c b/driver/vidc/src/msm_vidc_memory_ext.c index 1abd35b8d8..66e5e39439 100644 --- a/driver/vidc/src/msm_vidc_memory_ext.c +++ b/driver/vidc/src/msm_vidc_memory_ext.c @@ -15,13 +15,14 @@ #include "msm_vidc_driver.h" #include "msm_vidc_events.h" #include "msm_vidc_platform.h" +#include "msm_vidc_memory.h" static bool is_non_secure_buffer(struct dma_buf *dmabuf) { return mem_buf_dma_buf_exclusive_owner(dmabuf); } -struct dma_buf_attachment *msm_vidc_dma_buf_attach_ext(struct msm_vidc_core *core, +static struct dma_buf_attachment *msm_vidc_dma_buf_attach_ext(struct msm_vidc_core *core, struct dma_buf *dbuf, struct device *dev) { int rc = 0; @@ -78,7 +79,7 @@ struct dma_buf_attachment *msm_vidc_dma_buf_attach_ext(struct msm_vidc_core *cor return attach; } -int msm_vidc_memory_free_ext(struct msm_vidc_core *core, struct msm_vidc_alloc *mem) +static int msm_vidc_memory_free_ext(struct msm_vidc_core *core, struct msm_vidc_alloc *mem) { int rc = 0; @@ -113,7 +114,7 @@ int msm_vidc_memory_free_ext(struct msm_vidc_core *core, struct msm_vidc_alloc * return rc; } -int msm_vidc_memory_alloc_ext(struct msm_vidc_core *core, struct msm_vidc_alloc *mem) +static int msm_vidc_memory_alloc_ext(struct msm_vidc_core *core, struct msm_vidc_alloc *mem) { int rc = 0; int size = 0; @@ -223,7 +224,7 @@ error: return rc; } -int msm_vidc_memory_map_ext(struct msm_vidc_core *core, struct msm_vidc_map *map) +static int msm_vidc_memory_map_ext(struct msm_vidc_core *core, struct msm_vidc_map *map) { int rc = 0; struct dma_buf_attachment *attach = NULL; @@ -271,7 +272,7 @@ int msm_vidc_memory_map_ext(struct msm_vidc_core *core, struct msm_vidc_map *map goto error_attach; } - table = msm_vidc_dma_buf_map_attachment(core, attach); + table = call_mem_op(core, dma_buf_map_attachment, core, attach); if (IS_ERR_OR_NULL(table)) { rc = PTR_ERR(table) ? PTR_ERR(table) : -ENOMEM; d_vpr_e("Failed to map table\n"); @@ -290,13 +291,13 @@ exit: return 0; error_table: - msm_vidc_dma_buf_detach(core, map->dmabuf, attach); + call_mem_op(core, dma_buf_detach, core, map->dmabuf, attach); error_attach: error_cb: return rc; } -u32 msm_vidc_buffer_region_ext(struct msm_vidc_inst *inst, +static u32 msm_vidc_buffer_region_ext(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type buffer_type) { u32 region = MSM_VIDC_NON_SECURE; @@ -377,3 +378,18 @@ u32 msm_vidc_buffer_region_ext(struct msm_vidc_inst *inst, return region; } + +struct msm_vidc_memory_ops *get_mem_ops_ext(void) +{ + struct msm_vidc_memory_ops *mem_ops = get_mem_ops(); + static struct msm_vidc_memory_ops mem_ops_ext; + + memcpy(&mem_ops_ext, mem_ops, sizeof(struct msm_vidc_memory_ops)); + mem_ops_ext.dma_buf_attach = msm_vidc_dma_buf_attach_ext; + mem_ops_ext.memory_free = msm_vidc_memory_free_ext; + mem_ops_ext.memory_alloc = msm_vidc_memory_alloc_ext; + mem_ops_ext.memory_map = msm_vidc_memory_map_ext; + mem_ops_ext.buffer_region = msm_vidc_buffer_region_ext; + + return &mem_ops_ext; +} diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index 9d64f754f6..4417c7707f 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -1314,7 +1314,7 @@ static int venus_hfi_cache_packet(struct msm_vidc_inst *inst) return -EINVAL; } - packet = call_mem_op(core, pool_alloc, inst, MSM_MEM_POOL_PACKET); + packet = msm_vidc_pool_alloc(inst, MSM_MEM_POOL_PACKET); if (!packet) { i_vpr_e(inst, "%s: failed to allocate pending packet\n", __func__); return -ENOMEM; @@ -1845,7 +1845,7 @@ static int venus_hfi_add_pending_packets(struct msm_vidc_inst *inst) } } list_del(&pkt_info->list); - call_mem_op(core, pool_free, inst, pkt_info); + msm_vidc_pool_free(inst, pkt_info); } return rc; } diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index 81d2566be7..c15ba27f2d 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -684,7 +684,7 @@ static int handle_read_only_buffer(struct msm_vidc_inst *inst, * if present, do nothing */ if (!found) { - ro_buf = call_mem_op(core, pool_alloc, inst, MSM_MEM_POOL_BUFFER); + ro_buf = msm_vidc_pool_alloc(inst, MSM_MEM_POOL_BUFFER); if (!ro_buf) { i_vpr_e(inst, "%s: buffer alloc failed\n", __func__); return -ENOMEM; From bf9dd01f97a40fecce2d682be09e0c23e626d18b Mon Sep 17 00:00:00 2001 From: Vedang Nagar Date: Wed, 19 Oct 2022 17:47:02 +0530 Subject: [PATCH 0748/1061] video: driver: Increase FW timeout to 4sec for debug logging Enabling debug logs in kernel driver can result in Linux kernel thread scheduling issues which causes unpredictable behavior. Therefore increased Hardware timeouts to 4sec if debug logs are enabled i.e. logs are more than default logs. Change-Id: Ic0d04bc0a740c8b11c77574ad3252ca2fa0696bb Signed-off-by: Vedang Nagar --- driver/vidc/inc/msm_vidc_debug.h | 10 ++++++++-- driver/vidc/src/msm_vidc_debug.c | 13 +++++++------ 2 files changed, 15 insertions(+), 8 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_debug.h b/driver/vidc/inc/msm_vidc_debug.h index 2b07215df9..62f50bb4e7 100644 --- a/driver/vidc/inc/msm_vidc_debug.h +++ b/driver/vidc/inc/msm_vidc_debug.h @@ -78,8 +78,14 @@ enum vidc_msg_prio { FW_PRINTK = 0x10000000, FW_FTRACE = 0x20000000, }; -#define FW_LOGSHIFT 16 -#define FW_LOGMASK 0x0FFF0000 + +#define DRV_LOG (VIDC_ERR | VIDC_PRINTK) +#define DRV_LOGSHIFT (0) +#define DRV_LOGMASK (0x0FFF) + +#define FW_LOG (FW_ERROR | FW_FATAL | FW_PRINTK) +#define FW_LOGSHIFT (16) +#define FW_LOGMASK (0x0FFF0000) #define dprintk_inst(__level, __level_str, inst, __fmt, ...) \ do { \ diff --git a/driver/vidc/src/msm_vidc_debug.c b/driver/vidc/src/msm_vidc_debug.c index 13ea7c374d..44f30287fb 100644 --- a/driver/vidc/src/msm_vidc_debug.c +++ b/driver/vidc/src/msm_vidc_debug.c @@ -19,7 +19,7 @@ extern struct msm_vidc_core *g_core; #define MSM_VIDC_MIN_STATS_DELAY_MS 200 #define MSM_VIDC_MAX_STATS_DELAY_MS 10000 -unsigned int msm_vidc_debug = VIDC_ERR | VIDC_PRINTK | FW_ERROR | FW_FATAL | FW_PRINTK; +unsigned int msm_vidc_debug = (DRV_LOG | FW_LOG); static int debug_level_set(const char *val, const struct kernel_param *kp) @@ -45,11 +45,12 @@ static int debug_level_set(const char *val, msm_vidc_debug = dvalue; - /* check only driver logmask */ - if ((dvalue & 0xFF) > (VIDC_ERR | VIDC_HIGH)) { - core->capabilities[HW_RESPONSE_TIMEOUT].value = 2 * HW_RESPONSE_TIMEOUT_VALUE; - core->capabilities[SW_PC_DELAY].value = 2 * SW_PC_DELAY_VALUE; - core->capabilities[FW_UNLOAD_DELAY].value = 2 * FW_UNLOAD_DELAY_VALUE; + /* check if driver or FW logmask is more than default level */ + if (((dvalue & DRV_LOGMASK) & ~(DRV_LOG)) || + ((dvalue & FW_LOGMASK) & ~(FW_LOG))) { + core->capabilities[HW_RESPONSE_TIMEOUT].value = 4 * HW_RESPONSE_TIMEOUT_VALUE; + core->capabilities[SW_PC_DELAY].value = 4 * SW_PC_DELAY_VALUE; + core->capabilities[FW_UNLOAD_DELAY].value = 4 * FW_UNLOAD_DELAY_VALUE; } else { /* reset timeout values, if user reduces the logging */ core->capabilities[HW_RESPONSE_TIMEOUT].value = HW_RESPONSE_TIMEOUT_VALUE; From fd5ef8da76c26749237f3ba1cd76b5bd30a04422 Mon Sep 17 00:00:00 2001 From: Mihir Ganu Date: Thu, 3 Nov 2022 20:45:34 -0700 Subject: [PATCH 0749/1061] video: driver: Enable MMRM support in pineapple Enable MMRM support in pineapple database. Change-Id: I896005510383145535f9e4b2800991f386dfcd73 Signed-off-by: Mihir Ganu --- driver/platform/pineapple/src/msm_vidc_pineapple.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/driver/platform/pineapple/src/msm_vidc_pineapple.c b/driver/platform/pineapple/src/msm_vidc_pineapple.c index 3f79e6604c..41b3b9a460 100644 --- a/driver/platform/pineapple/src/msm_vidc_pineapple.c +++ b/driver/platform/pineapple/src/msm_vidc_pineapple.c @@ -2705,7 +2705,7 @@ static const struct msm_vidc_platform_data pineapple_data = { .reg_prst_tbl_size = ARRAY_SIZE(pineapple_reg_preset_table), .fwname = "vpu33_4v", .pas_id = 9, - .supports_mmrm = 0, + .supports_mmrm = 1, /* caps related resorces */ .core_data = core_data_pineapple, From 166330d8a927df7b9ae0325c90be84ca952ee522 Mon Sep 17 00:00:00 2001 From: Dikshita Agarwal Date: Thu, 3 Nov 2022 12:13:24 +0530 Subject: [PATCH 0750/1061] video: driver: fix compilation issues with mainline kernel - Remove non-standard and unused header files. - Use proper format specifier for debug prints. Change-Id: I52927f635d7d0145404e41acf0dc351f2c44e7fe Signed-off-by: Dikshita Agarwal --- driver/vidc/inc/msm_vidc_debug.h | 2 +- driver/vidc/src/firmware.c | 2 +- driver/vidc/src/msm_vidc_debug.c | 2 +- driver/vidc/src/msm_vidc_driver.c | 4 ++-- driver/vidc/src/msm_vidc_memory.c | 15 +++------------ driver/vidc/src/msm_vidc_vb2.c | 2 -- driver/vidc/src/resources.c | 4 ++-- driver/vidc/src/venus_hfi_response.c | 12 ++++++------ 8 files changed, 16 insertions(+), 27 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_debug.h b/driver/vidc/inc/msm_vidc_debug.h index 2b07215df9..531edc954a 100644 --- a/driver/vidc/inc/msm_vidc_debug.h +++ b/driver/vidc/inc/msm_vidc_debug.h @@ -49,7 +49,7 @@ extern unsigned int msm_vidc_enable_bugon; #define FMT_STRING_FAULT_HANDLER \ "%s: faulting address: %lx\n" #define FMT_STRING_SET_CAP \ - "set cap: name: %24s, cap value: %#10x, hfi: %#10x\n" + "set cap: name: %24s, cap value: %#10x, hfi: %#10llx\n" /* To enable messages OR these values and * echo the result to debugfs file. diff --git a/driver/vidc/src/firmware.c b/driver/vidc/src/firmware.c index b4051a76f2..039deb57d7 100644 --- a/driver/vidc/src/firmware.c +++ b/driver/vidc/src/firmware.c @@ -143,7 +143,7 @@ static int __load_fw_to_memory(struct platform_device *pdev, virt = memremap(phys, res_size, MEMREMAP_WC); if (!virt) { d_vpr_e("%s: failed to remap fw memory phys %pa[p]\n", - __func__, phys); + __func__, &phys); return -ENOMEM; } diff --git a/driver/vidc/src/msm_vidc_debug.c b/driver/vidc/src/msm_vidc_debug.c index 13ea7c374d..7b6bb4432e 100644 --- a/driver/vidc/src/msm_vidc_debug.c +++ b/driver/vidc/src/msm_vidc_debug.c @@ -176,7 +176,7 @@ void msm_vidc_show_stats(void *inst) for (x = 0; x < MAX_PROFILING_POINTS; x++) { if (i->debug.pdata[x].name[0]) { if (i->debug.samples) { - i_vpr_p(i, "%s averaged %d ms/sample\n", + i_vpr_p(i, "%s averaged %llu ms/sample\n", i->debug.pdata[x].name, i->debug.pdata[x].cumulative / i->debug.samples); diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index f3a201b770..76e6c7774a 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -2855,7 +2855,7 @@ int msm_vidc_ts_reorder_get_first_timestamp(struct msm_vidc_inst *inst, u64 *tim /* check if list empty */ if (list_empty(&inst->ts_reorder.list)) { - i_vpr_e(inst, "%s: list empty. ts %lld\n", __func__, timestamp); + i_vpr_e(inst, "%s: list empty. ts %lld\n", __func__, *timestamp); return -EINVAL; } @@ -5577,7 +5577,7 @@ void msm_vidc_destroy_buffers(struct msm_vidc_inst *inst) inode_num = f_inode->i_ino; } } - i_vpr_e(inst, "%s: removing dma_buf %#lx, inode %lu, refcount %u\n", + i_vpr_e(inst, "%s: removing dma_buf %p, inode %lu, refcount %u\n", __func__, dbuf->dmabuf, inode_num, dbuf->refcount); call_mem_op(core, dma_buf_put_completely, inst, dbuf); } diff --git a/driver/vidc/src/msm_vidc_memory.c b/driver/vidc/src/msm_vidc_memory.c index 7fc643b2fb..39864cffa4 100644 --- a/driver/vidc/src/msm_vidc_memory.c +++ b/driver/vidc/src/msm_vidc_memory.c @@ -6,9 +6,6 @@ #include #include #include -#include -#include -#include #include "msm_vidc_memory.h" #include "msm_vidc_debug.h" @@ -122,7 +119,7 @@ void msm_vidc_pool_free(struct msm_vidc_inst *inst, void *vidc_buf) /* sanitize buffer addr */ if (hdr->buf != vidc_buf) { - i_vpr_e(inst, "%s: invalid buf addr %#x\n", __func__, vidc_buf); + i_vpr_e(inst, "%s: invalid buf addr %p\n", __func__, vidc_buf); return; } @@ -135,7 +132,7 @@ void msm_vidc_pool_free(struct msm_vidc_inst *inst, void *vidc_buf) /* catch double-free request */ if (!hdr->busy) { - i_vpr_e(inst, "%s: double free request. type %s, addr %#x\n", __func__, + i_vpr_e(inst, "%s: double free request. type %s, addr %p\n", __func__, pool->name, vidc_buf); return; } @@ -298,7 +295,7 @@ static void msm_vidc_dma_buf_put(struct msm_vidc_inst *inst, struct dma_buf *dma } } if (!found) { - i_vpr_e(inst, "%s: invalid dmabuf %#x\n", __func__, dmabuf); + i_vpr_e(inst, "%s: invalid dmabuf %p\n", __func__, dmabuf); return; } @@ -358,12 +355,6 @@ static struct dma_buf_attachment *msm_vidc_dma_buf_attach(struct msm_vidc_core * return NULL; } - /* - * We do not need dma_map function to perform cache operations - * on the whole buffer size and hence pass skip sync flag. - */ - attach->dma_map_attrs |= DMA_ATTR_SKIP_CPU_SYNC; - return attach; } diff --git a/driver/vidc/src/msm_vidc_vb2.c b/driver/vidc/src/msm_vidc_vb2.c index 602ee39c9a..2802254ea5 100644 --- a/driver/vidc/src/msm_vidc_vb2.c +++ b/driver/vidc/src/msm_vidc_vb2.c @@ -4,8 +4,6 @@ */ /* Copyright (c) 2022. Qualcomm Innovation Center, Inc. All rights reserved. */ -#include - #include "msm_vidc_vb2.h" #include "msm_vidc_core.h" #include "msm_vidc_inst.h" diff --git a/driver/vidc/src/resources.c b/driver/vidc/src/resources.c index b1dcbd3ec6..04aa031c4a 100644 --- a/driver/vidc/src/resources.c +++ b/driver/vidc/src/resources.c @@ -108,7 +108,7 @@ static int __init_register_base(struct msm_vidc_core *core) res->register_base_addr = devm_platform_ioremap_resource(core->pdev, 0); if (IS_ERR(res->register_base_addr)) { - d_vpr_e("%s: map reg addr failed %d\n", + d_vpr_e("%s: map reg addr failed %ld\n", __func__, PTR_ERR(res->register_base_addr)); return -EINVAL; } @@ -499,7 +499,7 @@ static int __init_freq_table(struct msm_vidc_core *core) /* print freq field freq_set */ d_vpr_h("%s: updated freq table\n", __func__); for (cnt = 0; cnt < clks->count; cnt++) - d_vpr_h("%s:\t %u\n", __func__, clks->freq_tbl[cnt].freq); + d_vpr_h("%s:\t %lu\n", __func__, clks->freq_tbl[cnt].freq); return rc; } diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index c15ba27f2d..206e23eec0 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -804,7 +804,7 @@ static int handle_input_buffer(struct msm_vidc_inst *inst, } } if (!found) { - i_vpr_e(inst, "%s: invalid buffer idx %d addr %#x data_offset %d\n", + i_vpr_e(inst, "%s: invalid buffer idx %d addr %#llx data_offset %d\n", __func__, buffer->index, buffer->base_address, buffer->data_offset); return -EINVAL; @@ -913,7 +913,7 @@ static int handle_output_buffer(struct msm_vidc_inst *inst, break; } if (!found) { - i_vpr_l(inst, "%s: invalid idx %d daddr %#x\n", + i_vpr_l(inst, "%s: invalid idx %d daddr %#llx\n", __func__, buffer->index, buffer->base_address); return 0; } @@ -1058,7 +1058,7 @@ static int handle_input_metadata_buffer(struct msm_vidc_inst *inst, } } if (!found) { - i_vpr_e(inst, "%s: invalid idx %d daddr %#x data_offset %d\n", + i_vpr_e(inst, "%s: invalid idx %d daddr %#llx data_offset %d\n", __func__, buffer->index, buffer->base_address, buffer->data_offset); return -EINVAL; @@ -1125,7 +1125,7 @@ static int handle_output_metadata_buffer(struct msm_vidc_inst *inst, } } if (!found) { - i_vpr_e(inst, "%s: invalid idx %d daddr %#x data_offset %d\n", + i_vpr_e(inst, "%s: invalid idx %d daddr %#llx data_offset %d\n", __func__, buffer->index, buffer->base_address, buffer->data_offset); return -EINVAL; @@ -1298,7 +1298,7 @@ static int handle_release_internal_buffer(struct msm_vidc_inst *inst, if (rc) return rc; } else { - i_vpr_e(inst, "%s: invalid idx %d daddr %#x\n", + i_vpr_e(inst, "%s: invalid idx %d daddr %#llx\n", __func__, buffer->index, buffer->base_address); return -EINVAL; } @@ -1320,7 +1320,7 @@ int handle_release_output_buffer(struct msm_vidc_inst *inst, } } if (!found) { - i_vpr_e(inst, "%s: invalid idx %d daddr %#x\n", + i_vpr_e(inst, "%s: invalid idx %d daddr %#llx\n", __func__, buffer->index, buffer->base_address); return -EINVAL; } From 1ac85a32373c72609bd5d7396850926470824169 Mon Sep 17 00:00:00 2001 From: Dikshita Agarwal Date: Fri, 4 Nov 2022 11:50:55 +0530 Subject: [PATCH 0751/1061] video: driver: check for regulator support before initializing Upstream doesn't support regulators, while downstream kernel does. So add a condition to check for regulator support before init. Change-Id: Icab8aec20796546a33ac571963f871d146970002 Signed-off-by: Dikshita Agarwal --- driver/platform/common/inc/msm_vidc_platform.h | 5 +++++ driver/vidc/src/resources.c | 6 ++++++ 2 files changed, 11 insertions(+) diff --git a/driver/platform/common/inc/msm_vidc_platform.h b/driver/platform/common/inc/msm_vidc_platform.h index 2e0a012d14..6a913d9fd0 100644 --- a/driver/platform/common/inc/msm_vidc_platform.h +++ b/driver/platform/common/inc/msm_vidc_platform.h @@ -229,6 +229,11 @@ static inline bool is_mmrm_supported(struct msm_vidc_core *core) return !!core->platform->data.supports_mmrm; } +static inline bool is_regulator_supported(struct msm_vidc_core *core) +{ + return !!core->platform->data.regulator_tbl_size; +} + int msm_vidc_init_platform(struct platform_device *pdev); int msm_vidc_deinit_platform(struct platform_device *pdev); diff --git a/driver/vidc/src/resources.c b/driver/vidc/src/resources.c index 04aa031c4a..070aa2d679 100644 --- a/driver/vidc/src/resources.c +++ b/driver/vidc/src/resources.c @@ -234,6 +234,12 @@ static int __init_regulators(struct msm_vidc_core *core) } regulators = &core->resource->regulator_set; + /* skip init if regulators not supported */ + if (!is_regulator_supported(core)) { + d_vpr_h("%s: regulators are not available in database\n", __func__); + return 0; + } + regulator_tbl = core->platform->data.regulator_tbl; regulator_count = core->platform->data.regulator_tbl_size; From 9c5b7fe1c503e3f2c50a492f18de8e1dba4b1445 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Tue, 1 Nov 2022 15:47:48 +0530 Subject: [PATCH 0752/1061] video: driver: power collapse for last session close power_collpase thread will initiate suspend sequence if no there is no transaction for 1.5 sec. So even after all session closed, power collapse thread will kick in only after 1.5 sec, which can be avoided. with this change power_collpase sequence will be initiated right after last session close. Change-Id: I4da231fa4a3d65bebbd19725db2f11d1478490dd Signed-off-by: Govindaraj Rajagopal --- driver/vidc/src/msm_vidc_driver.c | 55 ++++++++++++++++++++++++++++--- driver/vidc/src/venus_hfi.c | 8 +++-- 2 files changed, 56 insertions(+), 7 deletions(-) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index f3a201b770..505711263d 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -543,6 +543,43 @@ static u32 msm_vidc_get_buffer_stats_flag(struct msm_vidc_inst *inst) return flags; } +static int msm_vidc_suspend_locked(struct msm_vidc_core *core) +{ + int rc = 0; + + if (!core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + rc = venus_hfi_suspend(core); + if (rc) + return rc; + + return rc; +} + +static int msm_vidc_try_suspend(struct msm_vidc_inst *inst) +{ + struct msm_vidc_core *core; + int rc = 0; + + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + core = inst->core; + + core_lock(core, __func__); + if (list_empty(&core->instances) && list_empty(&core->dangling_instances)) { + i_vpr_h(inst, "%s: closed last open session. suspend video core\n", __func__); + msm_vidc_suspend_locked(core); + } + core_unlock(core, __func__); + + return rc; +} + int msm_vidc_add_buffer_stats(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buf) { @@ -4295,7 +4332,7 @@ static int msm_vidc_remove_dangling_session(struct msm_vidc_inst *inst) { struct msm_vidc_inst *i, *temp; struct msm_vidc_core *core; - u32 count = 0; + u32 count = 0, dcount = 0; if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); @@ -4312,9 +4349,12 @@ static int msm_vidc_remove_dangling_session(struct msm_vidc_inst *inst) break; } } - list_for_each_entry(i, &core->dangling_instances, list) + list_for_each_entry(i, &core->instances, list) count++; - i_vpr_h(inst, "%s: remaining dangling sessions %d\n", __func__, count); + list_for_each_entry(i, &core->dangling_instances, list) + dcount++; + i_vpr_h(inst, "%s: remaining sessions. active %d, dangling %d\n", + __func__, count, dcount); core_unlock(core, __func__); return 0; @@ -5305,10 +5345,14 @@ int msm_vidc_suspend(struct msm_vidc_core *core) return -EINVAL; } - rc = venus_hfi_suspend(core); + core_lock(core, __func__); + d_vpr_h("%s: initiate PM suspend\n", __func__); + rc = msm_vidc_suspend_locked(core); if (rc) - return rc; + goto exit; +exit: + core_unlock(core, __func__); return rc; } @@ -5625,6 +5669,7 @@ static void msm_vidc_close_helper(struct kref *kref) destroy_workqueue(inst->workq); msm_vidc_destroy_buffers(inst); msm_vidc_remove_dangling_session(inst); + msm_vidc_try_suspend(inst); mutex_destroy(&inst->client_lock); mutex_destroy(&inst->request_lock); mutex_destroy(&inst->lock); diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index 4417c7707f..f4af1f878e 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -1015,7 +1015,11 @@ int venus_hfi_suspend(struct msm_vidc_core *core) d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - core_lock(core, __func__); + + rc = __strict_check(core, __func__); + if (rc) + return rc; + d_vpr_h("Suspending Venus\n"); rc = __power_collapse(core, true); if (!rc) { @@ -1025,7 +1029,7 @@ int venus_hfi_suspend(struct msm_vidc_core *core) d_vpr_e("%s: Venus is busy\n", __func__); rc = -EBUSY; } - core_unlock(core, __func__); + return rc; } From 1931acf67514fa3899f5341cc0f36795e94fff57 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Mon, 7 Nov 2022 19:40:33 +0530 Subject: [PATCH 0753/1061] video: driver: misc changes to be inline with upstream - replace list_del() & list_add_tail() with list_move_tail(). - use sg_dma_address() macro at all possible places. Change-Id: Ie754b5a75a48299fbe71e9ec0217b93d8524264f Signed-off-by: Govindaraj Rajagopal --- driver/vidc/src/msm_vidc_driver.c | 6 ++---- driver/vidc/src/msm_vidc_memory.c | 16 ++++++---------- driver/vidc/src/msm_vidc_memory_ext.c | 2 +- driver/vidc/src/msm_vidc_vb2.c | 2 +- 4 files changed, 10 insertions(+), 16 deletions(-) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index f3a201b770..f89cc24123 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -4277,8 +4277,7 @@ int msm_vidc_remove_session(struct msm_vidc_inst *inst) core_lock(core, __func__); list_for_each_entry_safe(i, temp, &core->instances, list) { if (i->session_id == inst->session_id) { - list_del_init(&i->list); - list_add_tail(&i->list, &core->dangling_instances); + list_move_tail(&i->list, &core->dangling_instances); i_vpr_h(inst, "%s: removed session %#x\n", __func__, i->session_id); } @@ -4844,8 +4843,7 @@ int msm_vidc_core_deinit_locked(struct msm_vidc_core *core, bool force) /* unlink all sessions from core, if any */ list_for_each_entry_safe(inst, dummy, &core->instances, list) { msm_vidc_change_state(inst, MSM_VIDC_ERROR, __func__); - list_del_init(&inst->list); - list_add_tail(&inst->list, &core->dangling_instances); + list_move_tail(&inst->list, &core->dangling_instances); } msm_vidc_change_core_state(core, MSM_VIDC_CORE_DEINIT, __func__); diff --git a/driver/vidc/src/msm_vidc_memory.c b/driver/vidc/src/msm_vidc_memory.c index 7fc643b2fb..b85e45b608 100644 --- a/driver/vidc/src/msm_vidc_memory.c +++ b/driver/vidc/src/msm_vidc_memory.c @@ -82,14 +82,13 @@ void *msm_vidc_pool_alloc(struct msm_vidc_inst *inst, enum msm_memory_pool_type /* get 1st node from free pool */ hdr = list_first_entry(&pool->free_pool, struct msm_memory_alloc_header, list); - list_del_init(&hdr->list); + + /* move node from free pool to busy pool */ + list_move_tail(&hdr->list, &pool->busy_pool); /* reset existing data */ memset((char *)hdr->buf, 0, pool->size); - /* add to busy pool */ - list_add_tail(&hdr->list, &pool->busy_pool); - /* set busy flag to true. This is to catch double free request */ hdr->busy = true; @@ -141,11 +140,8 @@ void msm_vidc_pool_free(struct msm_vidc_inst *inst, void *vidc_buf) } hdr->busy = false; - /* remove from busy pool */ - list_del_init(&hdr->list); - - /* add to free pool */ - list_add_tail(&hdr->list, &pool->free_pool); + /* move node from busy pool to free pool */ + list_move_tail(&hdr->list, &pool->free_pool); } static void msm_vidc_destroy_pool_buffers(struct msm_vidc_inst *inst, @@ -463,7 +459,7 @@ static int msm_vidc_memory_map(struct msm_vidc_core *core, struct msm_vidc_map * goto error_table; } - map->device_addr = table->sgl->dma_address; + map->device_addr = sg_dma_address(table->sgl); map->table = table; map->attach = attach; map->refcount++; diff --git a/driver/vidc/src/msm_vidc_memory_ext.c b/driver/vidc/src/msm_vidc_memory_ext.c index 66e5e39439..c575514a64 100644 --- a/driver/vidc/src/msm_vidc_memory_ext.c +++ b/driver/vidc/src/msm_vidc_memory_ext.c @@ -279,7 +279,7 @@ static int msm_vidc_memory_map_ext(struct msm_vidc_core *core, struct msm_vidc_m goto error_table; } - map->device_addr = table->sgl->dma_address; + map->device_addr = sg_dma_address(table->sgl); map->table = table; map->attach = attach; map->refcount++; diff --git a/driver/vidc/src/msm_vidc_vb2.c b/driver/vidc/src/msm_vidc_vb2.c index 602ee39c9a..2f14d22397 100644 --- a/driver/vidc/src/msm_vidc_vb2.c +++ b/driver/vidc/src/msm_vidc_vb2.c @@ -187,7 +187,7 @@ int msm_vb2_map_dmabuf(void *buf_priv) rc = -ENOMEM; goto exit; } - buf->device_addr = buf->sg_table->sgl->dma_address; + buf->device_addr = sg_dma_address(buf->sg_table->sgl); print_vidc_buffer(VIDC_HIGH, "high", "map", inst, buf); exit: From c1bb733a6ba0f43e29b9935229eefa1d37ff358e Mon Sep 17 00:00:00 2001 From: Ankush Mitra Date: Wed, 17 Aug 2022 16:58:22 +0530 Subject: [PATCH 0754/1061] video: driver: Remove unused capabilities Cleanup of unused capabilities from platform caps list. Change-Id: I98f4beb96f41d2b8a3b4342f7d453a6abc046e55 Signed-off-by: Vedang Nagar Signed-off-by: Ankush Mitra --- driver/platform/anorak/src/msm_vidc_anorak.c | 26 ----------------- driver/platform/kalama/src/kalama.c | 17 ----------- driver/platform/kalama/src/msm_vidc_kalama.c | 28 +------------------ .../pineapple/src/msm_vidc_pineapple.c | 26 ----------------- driver/platform/pineapple/src/pineapple.c | 17 ----------- driver/platform/waipio/src/msm_vidc_waipio.c | 26 ----------------- driver/vidc/inc/msm_vidc_internal.h | 6 ++-- driver/vidc/src/msm_vidc_driver.c | 4 +-- 8 files changed, 4 insertions(+), 146 deletions(-) diff --git a/driver/platform/anorak/src/msm_vidc_anorak.c b/driver/platform/anorak/src/msm_vidc_anorak.c index 32f9c5d943..54613758f7 100644 --- a/driver/platform/anorak/src/msm_vidc_anorak.c +++ b/driver/platform/anorak/src/msm_vidc_anorak.c @@ -207,32 +207,6 @@ static struct msm_platform_inst_capability instance_cap_data_anorak[] = { {SECURE_MBPF, ENC, HEVC, 36, 36864, 1, 36864}, - /* ((1920 * 1088) / 256) * 480 fps */ - {MBPS, ENC, CODECS_ALL, 64, 3916800, 1, 3916800}, - - {MBPS, ENC, HEVC, 36, 3916800, 1, 3916800}, - - /* ((16384x16384)/256)@1fps */ - {MBPS, ENC, HEIC, 36, 1048576, 1, 1048576}, - - /* ((3840 * 2176) / 256) * 240 fps */ - {MBPS, DEC, CODECS_ALL, 64, 7833600, 1, 7833600}, - - /* ((4096 * 2304) / 256) * 120 */ - {MBPS, DEC, VP9, 36, 4423680, 1, 4423680}, - - /* ((8192x8192)/256)@1fps */ - {MBPS, DEC, HEIC, 64, 262144, 1, 262144 }, - - /* ((4096 * 2304) / 256) * 60 fps */ - {POWER_SAVE_MBPS, ENC, CODECS_ALL, 0, 2211840, 1, 2211840}, - - /* Enable check mbps for encoder */ - {CHECK_MBPS, ENC, CODECS_ALL, 0, 1, 1, 1}, - - /* Disable check mbps for encoder */ - {CHECK_MBPS, DEC, CODECS_ALL, 0, 1, 1, 0}, - {FRAME_RATE, ENC, CODECS_ALL, (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), 1, (DEFAULT_FPS << 16), diff --git a/driver/platform/kalama/src/kalama.c b/driver/platform/kalama/src/kalama.c index acec7c11dc..5637136062 100644 --- a/driver/platform/kalama/src/kalama.c +++ b/driver/platform/kalama/src/kalama.c @@ -298,23 +298,6 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { /* (4096 * 2304) / 256 */ {BATCH_FPS, DEC, H264|HEVC|VP9, 1, 120, 1, 120}, - /* ((1920 * 1088) / 256) * 480 fps */ - {MBPS, ENC, CODECS_ALL, 64, 3916800, 1, 3916800}, - - {MBPS, ENC, HEVC, 36, 3916800, 1, 3916800}, - - /* ((1920 * 1088) / 256) * 960 fps */ - {MBPS, DEC, CODECS_ALL, 64, 7833600, 1, 7833600}, - - /* ((4096 * 2304) / 256) * 120 */ - {MBPS, DEC, VP9, 36, 4423680, 1, 4423680}, - - /* Enable check mbps for encoder */ - {CHECK_MBPS, ENC, CODECS_ALL, 0, 1, 1, 1}, - - /* Disable check mbps for encoder */ - {CHECK_MBPS, DEC, CODECS_ALL, 0, 1, 1, 0}, - {FRAME_RATE, ENC, CODECS_ALL, (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), 1, (DEFAULT_FPS << 16), diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index 2e71ca1251..76898a05d7 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. - * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved. */ #include @@ -445,32 +445,6 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { {SECURE_MBPF, ENC, HEVC, 36, 36864, 1, 36864}, - /* ((1920 * 1088) / 256) * 480 fps */ - {MBPS, ENC, CODECS_ALL, 64, 3916800, 1, 3916800}, - - {MBPS, ENC, HEVC, 36, 3916800, 1, 3916800}, - - /* ((16384x16384)/256)@1fps */ - {MBPS, ENC, HEIC, 36, 1048576, 1, 1048576}, - - /* ((1920 * 1088) / 256) * 960 fps */ - {MBPS, DEC, CODECS_ALL, 64, 7833600, 1, 7833600}, - - /* ((4096 * 2304) / 256) * 120 */ - {MBPS, DEC, VP9, 36, 4423680, 1, 4423680}, - - /* ((8192x8192)/256)@1fps */ - {MBPS, DEC, HEIC, 64, 262144, 1, 262144 }, - - /* ((4096 * 2304) / 256) * 60 fps */ - {POWER_SAVE_MBPS, ENC, CODECS_ALL, 0, 2211840, 1, 2211840}, - - /* Enable check mbps for encoder */ - {CHECK_MBPS, ENC, CODECS_ALL, 0, 1, 1, 1}, - - /* Disable check mbps for encoder */ - {CHECK_MBPS, DEC, CODECS_ALL, 0, 1, 1, 0}, - {FRAME_RATE, ENC, CODECS_ALL, (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), 1, (DEFAULT_FPS << 16), diff --git a/driver/platform/pineapple/src/msm_vidc_pineapple.c b/driver/platform/pineapple/src/msm_vidc_pineapple.c index 3f79e6604c..823114ec9a 100644 --- a/driver/platform/pineapple/src/msm_vidc_pineapple.c +++ b/driver/platform/pineapple/src/msm_vidc_pineapple.c @@ -445,32 +445,6 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { {SECURE_MBPF, ENC, HEVC, 36, 36864, 1, 36864}, - /* ((1920 * 1088) / 256) * 480 fps */ - {MBPS, ENC, CODECS_ALL, 64, 3916800, 1, 3916800}, - - {MBPS, ENC, HEVC, 36, 3916800, 1, 3916800}, - - /* ((16384x16384)/256)@1fps */ - {MBPS, ENC, HEIC, 36, 1048576, 1, 1048576}, - - /* ((1920 * 1088) / 256) * 960 fps */ - {MBPS, DEC, CODECS_ALL, 64, 7833600, 1, 7833600}, - - /* ((4096 * 2304) / 256) * 120 */ - {MBPS, DEC, VP9, 36, 4423680, 1, 4423680}, - - /* ((8192x8192)/256)@1fps */ - {MBPS, DEC, HEIC, 64, 262144, 1, 262144 }, - - /* ((4096 * 2304) / 256) * 60 fps */ - {POWER_SAVE_MBPS, ENC, CODECS_ALL, 0, 2211840, 1, 2211840}, - - /* Enable check mbps for encoder */ - {CHECK_MBPS, ENC, CODECS_ALL, 0, 1, 1, 1}, - - /* Disable check mbps for encoder */ - {CHECK_MBPS, DEC, CODECS_ALL, 0, 1, 1, 0}, - {FRAME_RATE, ENC, CODECS_ALL, (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), 1, (DEFAULT_FPS << 16), diff --git a/driver/platform/pineapple/src/pineapple.c b/driver/platform/pineapple/src/pineapple.c index f55d42acad..f83377453e 100644 --- a/driver/platform/pineapple/src/pineapple.c +++ b/driver/platform/pineapple/src/pineapple.c @@ -300,23 +300,6 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { /* (4096 * 2304) / 256 */ {BATCH_FPS, DEC, H264|HEVC|VP9, 1, 120, 1, 120}, - /* ((1920 * 1088) / 256) * 480 fps */ - {MBPS, ENC, CODECS_ALL, 64, 3916800, 1, 3916800}, - - {MBPS, ENC, HEVC, 36, 3916800, 1, 3916800}, - - /* ((1920 * 1088) / 256) * 960 fps */ - {MBPS, DEC, CODECS_ALL, 64, 7833600, 1, 7833600}, - - /* ((4096 * 2304) / 256) * 120 */ - {MBPS, DEC, VP9, 36, 4423680, 1, 4423680}, - - /* Enable check mbps for encoder */ - {CHECK_MBPS, ENC, CODECS_ALL, 0, 1, 1, 1}, - - /* Disable check mbps for encoder */ - {CHECK_MBPS, DEC, CODECS_ALL, 0, 1, 1, 0}, - {FRAME_RATE, ENC, CODECS_ALL, (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), 1, (DEFAULT_FPS << 16), diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index b4257de3b5..73077649d9 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -204,32 +204,6 @@ static struct msm_platform_inst_capability instance_cap_data_waipio[] = { {SECURE_MBPF, ENC, HEVC, 36, 36864, 1, 36864}, - /* ((1920 * 1088) / 256) * 480 fps */ - {MBPS, ENC, CODECS_ALL, 64, 3916800, 1, 3916800}, - - {MBPS, ENC, HEVC, 36, 3916800, 1, 3916800}, - - /* ((16384x16384)/256)@1fps */ - {MBPS, ENC, HEIC, 36, 1048576, 1, 1048576}, - - /* ((1920 * 1088) / 256) * 960 fps */ - {MBPS, DEC, CODECS_ALL, 64, 7833600, 1, 7833600}, - - /* ((4096 * 2304) / 256) * 120 */ - {MBPS, DEC, VP9, 36, 4423680, 1, 4423680}, - - /* ((8192x8192)/256)@1fps */ - {MBPS, DEC, HEIC, 64, 262144, 1, 262144 }, - - /* ((4096 * 2304) / 256) * 60 fps */ - {POWER_SAVE_MBPS, ENC, CODECS_ALL, 0, 2211840, 1, 2211840}, - - /* Enable check mbps for encoder */ - {CHECK_MBPS, ENC, CODECS_ALL, 0, 1, 1, 1}, - - /* Disable check mbps for encoder */ - {CHECK_MBPS, DEC, CODECS_ALL, 0, 1, 1, 0}, - {FRAME_RATE, ENC, CODECS_ALL, (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), 1, (DEFAULT_FPS << 16), diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 476d3871c5..26ef886aa6 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* - * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. + * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. */ #ifndef _MSM_VIDC_INTERNAL_H_ @@ -437,9 +438,6 @@ enum msm_vidc_inst_capability_type { BATCH_FPS, LOSSLESS_MBPF, SECURE_MBPF, - MBPS, - POWER_SAVE_MBPS, - CHECK_MBPS, FRAME_RATE, OPERATING_RATE, INPUT_RATE, diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index f3a201b770..0e2246e618 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -1,6 +1,7 @@ // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2020-2022, The Linux Foundation. All rights reserved. + * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. */ #include @@ -97,9 +98,6 @@ static const struct msm_vidc_cap_name cap_name_arr[] = { {BATCH_FPS, "BATCH_FPS" }, {LOSSLESS_MBPF, "LOSSLESS_MBPF" }, {SECURE_MBPF, "SECURE_MBPF" }, - {MBPS, "MBPS" }, - {POWER_SAVE_MBPS, "POWER_SAVE_MBPS" }, - {CHECK_MBPS, "CHECK_MPBS" }, {FRAME_RATE, "FRAME_RATE" }, {OPERATING_RATE, "OPERATING_RATE" }, {INPUT_RATE, "INPUT_RATE" }, From e552b19ce8eba17ea6dff196ad978d77db65eb85 Mon Sep 17 00:00:00 2001 From: Ankush Mitra Date: Tue, 30 Aug 2022 11:04:13 +0800 Subject: [PATCH 0755/1061] video: driver: support upto level 6.2 for HEVC enc allow support upto level 6.2 for HEVC encoder. Change-Id: I21e958ecab30bf97bc10627b17e18cfa3070e4ef Signed-off-by: Jiajia Cong Signed-off-by: Ankush Mitra --- driver/platform/kalama/src/msm_vidc_kalama.c | 6 ++++-- driver/platform/pineapple/src/msm_vidc_pineapple.c | 6 ++++-- 2 files changed, 8 insertions(+), 4 deletions(-) diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index 76898a05d7..9c6fc19362 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -1255,7 +1255,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { {LEVEL, ENC, HEVC|HEIC, V4L2_MPEG_VIDEO_HEVC_LEVEL_1, - V4L2_MPEG_VIDEO_HEVC_LEVEL_6, + V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2, BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_1) | BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2) | BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1) | @@ -1266,7 +1266,9 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5) | BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1) | BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6), + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2), V4L2_MPEG_VIDEO_HEVC_LEVEL_5, V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, HFI_PROP_LEVEL, diff --git a/driver/platform/pineapple/src/msm_vidc_pineapple.c b/driver/platform/pineapple/src/msm_vidc_pineapple.c index 823114ec9a..88c5e5fb5c 100644 --- a/driver/platform/pineapple/src/msm_vidc_pineapple.c +++ b/driver/platform/pineapple/src/msm_vidc_pineapple.c @@ -1255,7 +1255,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { {LEVEL, ENC, HEVC|HEIC, V4L2_MPEG_VIDEO_HEVC_LEVEL_1, - V4L2_MPEG_VIDEO_HEVC_LEVEL_6, + V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2, BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_1) | BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2) | BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1) | @@ -1266,7 +1266,9 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5) | BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1) | BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6), + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2), V4L2_MPEG_VIDEO_HEVC_LEVEL_5, V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, HFI_PROP_LEVEL, From 78246c24fbe45a0474723b77ed1793f9dd52efd0 Mon Sep 17 00:00:00 2001 From: Ankush Mitra Date: Thu, 29 Sep 2022 15:43:14 +0530 Subject: [PATCH 0756/1061] video: driver: Enable CSD data in output meta data buffer Currently not enabling CSD data in output meta data buffer, due to invalid function invocation for conditional check. Change-Id: I96a4462abebb257bfcd91af9c725d577c4046feb Signed-off-by: Gaviraju Doddabettahalli Bettegowda Signed-off-by: Ankush Mitra --- driver/vidc/src/msm_vidc_control.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index dcfaf26310..0075500197 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -3104,7 +3104,7 @@ int msm_vidc_set_header_mode(void *instance, else hfi_value = HFI_SEQ_HEADER_SEPERATE_FRAME; - if (is_meta_rx_inp_enabled(inst, META_SEQ_HDR_NAL)) + if (is_meta_rx_out_enabled(inst, META_SEQ_HDR_NAL)) hfi_value |= HFI_SEQ_HEADER_METADATA; rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32_ENUM, From dc39a04e6eb36aaf9b8d6dcfb73d1497c4419bc1 Mon Sep 17 00:00:00 2001 From: Ankush Mitra Date: Wed, 7 Sep 2022 18:50:21 +0530 Subject: [PATCH 0757/1061] video: driver: follow vcodec power collapse seq for PC failure case if PC fails for 10 times then video driver is treating that situation as fatal and doing force core_deinit(), in this case firmware will not follow vcodec power_collapse sequence and if there any pending transaction from any session it will cause smmu_fault during next firmware_boot sequence. Added change to perform vcodec power_collapse from power_off_iris3_hardware() incase of core_deinit due to PC failure. Change-Id: I45e32985d87b5cc882c4f96f77d1cabc796e6ba0 Signed-off-by: Govindaraj Rajagopal Signed-off-by: Ankush Mitra --- driver/variant/iris3/src/msm_vidc_iris3.c | 15 +++++++++------ driver/variant/iris33/src/msm_vidc_iris33.c | 15 +++++++++------ driver/vidc/inc/msm_vidc_core.h | 4 +++- driver/vidc/src/msm_vidc_driver.c | 3 +++ driver/vidc/src/venus_hfi.c | 3 +++ 5 files changed, 27 insertions(+), 13 deletions(-) diff --git a/driver/variant/iris3/src/msm_vidc_iris3.c b/driver/variant/iris3/src/msm_vidc_iris3.c index 01a09c43fa..6dd48d6fab 100644 --- a/driver/variant/iris3/src/msm_vidc_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_iris3.c @@ -274,19 +274,22 @@ static int __power_off_iris3_hardware(struct msm_vidc_core *core) bool pwr_collapsed = false; /* - * Incase hw power control is enabled, when CPU WD occurred, check for power - * status to decide on executing NOC reset sequence before disabling power. - * If there is no CPU WD and hw_power_control is enabled, fw is expected + * Incase hw power control is enabled, for both CPU WD, video + * hw unresponsive cases, check for power status to decide on + * executing NOC reset sequence before disabling power. If there + * is no CPU WD and hw_power_control is enabled, fw is expected * to power collapse video hw always. */ if (core->hw_power_control) { pwr_collapsed = is_iris3_hw_power_collapsed(core); - if (core->cpu_watchdog) { + if (core->cpu_watchdog || core->video_unresponsive) { if (pwr_collapsed) { - d_vpr_e("%s: CPU WD and video hw power collapsed\n", __func__); + d_vpr_e("%s: video hw power collapsed %d, %d\n", + __func__, core->cpu_watchdog, core->video_unresponsive); goto disable_power; } else { - d_vpr_e("%s: CPU WD and video hw is power ON\n", __func__); + d_vpr_e("%s: video hw is power ON %d, %d\n", + __func__, core->cpu_watchdog, core->video_unresponsive); } } else { if (!pwr_collapsed) diff --git a/driver/variant/iris33/src/msm_vidc_iris33.c b/driver/variant/iris33/src/msm_vidc_iris33.c index afd92ca702..175bcb0e09 100644 --- a/driver/variant/iris33/src/msm_vidc_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_iris33.c @@ -285,19 +285,22 @@ static int __power_off_iris33_hardware(struct msm_vidc_core *core) bool pwr_collapsed = false; /* - * Incase hw power control is enabled, when CPU WD occurred, check for power - * status to decide on executing NOC reset sequence before disabling power. - * If there is no CPU WD and hw_power_control is enabled, fw is expected + * Incase hw power control is enabled, for both CPU WD, video + * hw unresponsive cases, check for power status to decide on + * executing NOC reset sequence before disabling power. If there + * is no CPU WD and hw_power_control is enabled, fw is expected * to power collapse video hw always. */ if (core->hw_power_control) { pwr_collapsed = is_iris33_hw_power_collapsed(core); - if (core->cpu_watchdog) { + if (core->cpu_watchdog || core->video_unresponsive) { if (pwr_collapsed) { - d_vpr_e("%s: CPU WD and video hw power collapsed\n", __func__); + d_vpr_e("%s: video hw power collapsed %d, %d\n", + __func__, core->cpu_watchdog, core->video_unresponsive); goto disable_power; } else { - d_vpr_e("%s: CPU WD and video hw is power ON\n", __func__); + d_vpr_e("%s: video hw is power ON %d, %d\n", + __func__, core->cpu_watchdog, core->video_unresponsive); } } else { if (!pwr_collapsed) diff --git a/driver/vidc/inc/msm_vidc_core.h b/driver/vidc/inc/msm_vidc_core.h index 0623bdfbe9..79d44c872e 100644 --- a/driver/vidc/inc/msm_vidc_core.h +++ b/driver/vidc/inc/msm_vidc_core.h @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* - * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. + * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. */ #ifndef _MSM_VIDC_CORE_H_ @@ -118,6 +119,7 @@ struct msm_vidc_core { bool hw_power_control; bool pm_suspended; bool cpu_watchdog; + bool video_unresponsive; }; #endif // _MSM_VIDC_CORE_H_ diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 0e2246e618..cf5bb73af4 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -4905,6 +4905,7 @@ int msm_vidc_core_init_wait(struct msm_vidc_core *core) } else { d_vpr_h("%s: sys init wait timedout. state %s\n", __func__, core_state_name(core->state)); + core->video_unresponsive = true; rc = -EINVAL; goto unlock; } @@ -4979,6 +4980,8 @@ int msm_vidc_inst_timeout(struct msm_vidc_inst *inst) rc = -EINVAL; goto unlock; } + /* mark video hw unresponsive */ + core->video_unresponsive = true; /* call core deinit for a valid instance timeout case */ msm_vidc_core_deinit_locked(core, true); diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index 4417c7707f..99833a62a9 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -687,6 +687,7 @@ int __load_fw(struct msm_vidc_core *core) core->handoff_done = false; core->hw_power_control = false; core->cpu_watchdog = false; + core->video_unresponsive = false; trace_msm_v4l2_vidc_fw_load("START"); rc = __venus_power_on(core); @@ -726,6 +727,7 @@ void __unload_fw(struct msm_vidc_core *core) __venus_power_off(core); core->cpu_watchdog = false; + core->video_unresponsive = false; d_vpr_h("%s done\n", __func__); } @@ -815,6 +817,7 @@ void venus_hfi_pm_work_handler(struct work_struct *work) d_vpr_e("Failed to PC for %d times\n", core->skip_pc_count); core->skip_pc_count = 0; + core->video_unresponsive = true; msm_vidc_core_deinit(core, true); return; } From b35fde25c454e0b31b37b184d49e9dbff43f7118 Mon Sep 17 00:00:00 2001 From: Ankush Mitra Date: Thu, 1 Sep 2022 14:13:46 +0800 Subject: [PATCH 0758/1061] Video Driver: fix frame freeze for HEVC 10bit all intra decoding 1. Allow turbo for HEVC 10bit all intra decoding; 2. Add 25 percent extra to VSP cycle for HEVC 10bit all intra decoding; Change-Id: I794b2a896f7e9444c8979abdb15b8e673a5270ee Signed-off-by: Zhongbo Shi Signed-off-by: Ankush Mitra --- driver/variant/iris3/src/msm_vidc_power_iris3.c | 16 ++++++++++++---- .../variant/iris33/src/msm_vidc_power_iris33.c | 14 +++++++++++--- driver/vidc/inc/msm_vidc_driver.h | 2 ++ driver/vidc/inc/msm_vidc_inst.h | 1 + driver/vidc/src/msm_vidc.c | 1 + driver/vidc/src/msm_vidc_driver.c | 16 ++++++++++++++++ driver/vidc/src/venus_hfi_response.c | 5 +++++ 7 files changed, 48 insertions(+), 7 deletions(-) diff --git a/driver/variant/iris3/src/msm_vidc_power_iris3.c b/driver/variant/iris3/src/msm_vidc_power_iris3.c index 1faa08a4ae..18a08c65b0 100644 --- a/driver/variant/iris3/src/msm_vidc_power_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_power_iris3.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. - * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved. */ #include "msm_vidc_power_iris3.h" @@ -213,6 +213,11 @@ u64 msm_vidc_calc_freq_iris3(struct msm_vidc_inst *inst, u32 data_size) if (fps >= 960) vsp_cycles += div_u64(vpp_cycles * 25, 100); + /* Add 25 percent extra for HEVC 10bit all intra use case */ + if (inst->iframe && is_hevc_10bit_decode_session(inst)) { + vsp_cycles += div_u64(vsp_cycles * 25, 100); + } + if (inst->codec == MSM_VIDC_VP9 && inst->capabilities->cap[STAGE].value == MSM_VIDC_STAGE_2 && @@ -228,11 +233,14 @@ u64 msm_vidc_calc_freq_iris3(struct msm_vidc_inst *inst, u32 data_size) freq = max(vpp_cycles, vsp_cycles); freq = max(freq, fw_cycles); - if (inst->codec != MSM_VIDC_AV1) { + if (inst->codec == MSM_VIDC_AV1 || + (inst->iframe && is_hevc_10bit_decode_session(inst))) { /* - * for non-AV1 codecs limit the frequency to NOM only - * index 0 is TURBO, index 1 is NOM clock rate + * for AV1 or HEVC 10bit and iframe case only allow TURBO and + * limit to NOM for all other cases */ + } else { + /* limit to NOM, index 0 is TURBO, index 1 is NOM clock rate */ if (core->resource->freq_set.count >= 2 && freq > core->resource->freq_set.freq_tbl[1].freq) freq = core->resource->freq_set.freq_tbl[1].freq; diff --git a/driver/variant/iris33/src/msm_vidc_power_iris33.c b/driver/variant/iris33/src/msm_vidc_power_iris33.c index e133799772..f5a775f151 100644 --- a/driver/variant/iris33/src/msm_vidc_power_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_power_iris33.c @@ -212,6 +212,11 @@ u64 msm_vidc_calc_freq_iris33(struct msm_vidc_inst *inst, u32 data_size) if (fps >= 960) vsp_cycles += div_u64(vpp_cycles * 25, 100); + /* Add 25 percent extra for HEVC 10bit all intra use case */ + if (inst->iframe && is_hevc_10bit_decode_session(inst)) { + vsp_cycles += div_u64(vsp_cycles * 25, 100); + } + if (inst->codec == MSM_VIDC_VP9 && inst->capabilities->cap[STAGE].value == MSM_VIDC_STAGE_2 && @@ -227,11 +232,14 @@ u64 msm_vidc_calc_freq_iris33(struct msm_vidc_inst *inst, u32 data_size) freq = max(vpp_cycles, vsp_cycles); freq = max(freq, fw_cycles); - if (inst->codec != MSM_VIDC_AV1) { + if (inst->codec == MSM_VIDC_AV1 || + (inst->iframe && is_hevc_10bit_decode_session(inst))) { /* - * for non-AV1 codecs limit the frequency to NOM only - * index 0 is TURBO, index 1 is NOM clock rate + * for AV1 or HEVC 10bit and iframe case only allow TURBO and + * limit to NOM for all other cases */ + } else { + /* limit to NOM, index 0 is TURBO, index 1 is NOM clock rate */ if (core->resource->freq_set.count >= 2 && freq > core->resource->freq_set.freq_tbl[1].freq) freq = core->resource->freq_set.freq_tbl[1].freq; diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index d12f909b53..0b93025bde 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. + * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. */ #ifndef _MSM_VIDC_DRIVER_H_ @@ -577,6 +578,7 @@ bool res_is_less_than(u32 width, u32 height, u32 ref_width, u32 ref_height); bool res_is_less_than_or_equal_to(u32 width, u32 height, u32 ref_width, u32 ref_height); +bool is_hevc_10bit_decode_session(struct msm_vidc_inst *inst); int signal_session_msg_receipt(struct msm_vidc_inst *inst, enum signal_session_response cmd); int msm_vidc_get_properties(struct msm_vidc_inst *inst); diff --git a/driver/vidc/inc/msm_vidc_inst.h b/driver/vidc/inc/msm_vidc_inst.h index 71d674433e..9da4473236 100644 --- a/driver/vidc/inc/msm_vidc_inst.h +++ b/driver/vidc/inc/msm_vidc_inst.h @@ -181,5 +181,6 @@ struct msm_vidc_inst { bool has_bframe; bool ir_enabled; u32 adjust_priority; + bool iframe; }; #endif // _MSM_VIDC_INST_H_ diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index e4e3c7063e..aa152d55bb 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -901,6 +901,7 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) inst->ipsc_properties_set = false; inst->opsc_properties_set = false; inst->has_bframe = false; + inst->iframe = false; inst->auto_framerate = DEFAULT_FPS << 16; inst->initial_time_us = ktime_get_ns() / 1000; kref_init(&inst->kref); diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index cf5bb73af4..15d4a873c7 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -1761,6 +1761,22 @@ bool msm_vidc_allow_psc_last_flag(struct msm_vidc_inst *inst) return false; } +bool is_hevc_10bit_decode_session(struct msm_vidc_inst *inst) +{ + bool is10bit = false; + enum msm_vidc_colorformat_type colorformat; + + colorformat = v4l2_colorformat_to_driver(inst, + inst->fmts[OUTPUT_PORT].fmt.pix_mp.pixelformat, __func__); + + if (colorformat == MSM_VIDC_FMT_TP10C || colorformat == MSM_VIDC_FMT_P010) + is10bit = true; + + return inst->domain == MSM_VIDC_DECODER && + inst->codec == MSM_VIDC_HEVC && + is10bit; +} + int msm_vidc_state_change_streamon(struct msm_vidc_inst *inst, enum msm_vidc_port_type port) { diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index c15ba27f2d..63d07918e4 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -1,6 +1,7 @@ // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. + * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. */ #include @@ -1661,6 +1662,10 @@ static int handle_property_with_payload(struct msm_vidc_inst *inst, inst->hfi_frame_info.picture_type = payload_ptr[0]; if (inst->hfi_frame_info.picture_type & HFI_PICTURE_B) inst->has_bframe = true; + if (inst->hfi_frame_info.picture_type & HFI_PICTURE_IDR) + inst->iframe = true; + else + inst->iframe = false; break; case HFI_PROP_SUBFRAME_INPUT: if (port != INPUT_PORT) { From 9a591ca5af67aab5a63e2818d0cbf7f453a1c897 Mon Sep 17 00:00:00 2001 From: Deepa Guthyappa Madivalara Date: Mon, 7 Nov 2022 14:30:05 -0800 Subject: [PATCH 0759/1061] video: driver: update definition same as prototype Update function definition to be same as prototype to avoid compile error Change-Id: I92be0d96ce1e95e858cca6e5cad8de0564a60e5b Signed-off-by: Deepa Guthyappa Madivalara --- driver/vidc/src/msm_vidc_debug.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/driver/vidc/src/msm_vidc_debug.c b/driver/vidc/src/msm_vidc_debug.c index 13ea7c374d..fa7adf2391 100644 --- a/driver/vidc/src/msm_vidc_debug.c +++ b/driver/vidc/src/msm_vidc_debug.c @@ -375,7 +375,7 @@ static const struct file_operations stability_fops = { .write = trigger_stability_write, }; -struct dentry* msm_vidc_debugfs_init_drv() +struct dentry* msm_vidc_debugfs_init_drv(void) { struct dentry *dir = NULL; From 9db29e4edad76bdde0bd455db91960b0ddc25593 Mon Sep 17 00:00:00 2001 From: Deepa Guthyappa Madivalara Date: Fri, 4 Nov 2022 16:56:34 -0700 Subject: [PATCH 0760/1061] video: driver: add assert and deassert reset functions - Add assert and deassert reset control functions to update power off sequence in pineapple chipset - Rename clock names to match with clock macros Change-Id: Ic6dc0daac8110597bfcb02cceba94d2b97548723 Signed-off-by: Maheshwar Ajja --- .../pineapple/src/msm_vidc_pineapple.c | 9 +- driver/variant/iris33/src/msm_vidc_iris33.c | 85 ++++++++++--------- driver/vidc/inc/resources.h | 4 + driver/vidc/src/resources.c | 59 +++++++++++++ 4 files changed, 113 insertions(+), 44 deletions(-) diff --git a/driver/platform/pineapple/src/msm_vidc_pineapple.c b/driver/platform/pineapple/src/msm_vidc_pineapple.c index 3f79e6604c..94137ccf58 100644 --- a/driver/platform/pineapple/src/msm_vidc_pineapple.c +++ b/driver/platform/pineapple/src/msm_vidc_pineapple.c @@ -2645,16 +2645,17 @@ static const struct regulator_table pineapple_regulator_table[] = { /* name, clock id, scaling */ static const struct clk_table pineapple_clk_table[] = { - { "gcc_video_axi0", GCC_VIDEO_AXI0_CLK, 0 }, - { "core_clk", VIDEO_CC_MVS0C_CLK, 0 }, - { "vcodec_clk", VIDEO_CC_MVS0_CLK, 0 }, + { "gcc_video_axi0_clk", GCC_VIDEO_AXI0_CLK, 0 }, + { "video_cc_mvs0c_clk", VIDEO_CC_MVS0C_CLK, 0 }, + { "video_cc_mvs0_clk", VIDEO_CC_MVS0_CLK, 0 }, { "video_cc_mvs0_clk_src", VIDEO_CC_MVS0_CLK_SRC, 1 }, }; /* name */ static const struct clk_rst_table pineapple_clk_reset_table[] = { { "video_axi_reset" }, - { "video_core_reset" }, + { "video_mvs0c_reset" }, + /*{ "video_xo_reset" }, TODO: add after clock driver support */ }; /* name, llcc_id */ diff --git a/driver/variant/iris33/src/msm_vidc_iris33.c b/driver/variant/iris33/src/msm_vidc_iris33.c index afd92ca702..14c7f42a2e 100644 --- a/driver/variant/iris33/src/msm_vidc_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_iris33.c @@ -23,7 +23,6 @@ #define AON_MVP_NOC_RESET 0x0001F000 #define CPU_BASE_OFFS_IRIS33 0x000A0000 #define AON_BASE_OFFS 0x000E0000 -#define VCODEC_VIDEO_CC_BASE 0x000F0000 #define CPU_CS_BASE_OFFS_IRIS33 (CPU_BASE_OFFS_IRIS33) #define CPU_IC_BASE_OFFS_IRIS33 (CPU_BASE_OFFS_IRIS33) @@ -178,13 +177,6 @@ #define VCODEC_NOC_ERL_MAIN_ERRLOG2_HIGH 0x00011234 #define VCODEC_NOC_ERL_MAIN_ERRLOG3_LOW 0x00011238 #define VCODEC_NOC_ERL_MAIN_ERRLOG3_HIGH 0x0001123C -/* - * -------------------------------------------------------------------------- - * MODULE: VCODEC_VIDEO_CC registers - * -------------------------------------------------------------------------- - */ -#define VCODEC_VIDEO_CC_MVS0C_CBCR (VCODEC_VIDEO_CC_BASE + 0x8064) -#define VCODEC_VIDEO_CC_XO_CBCR (VCODEC_VIDEO_CC_BASE + 0x8124) static int __interrupt_init_iris33(struct msm_vidc_core *vidc_core) @@ -373,9 +365,9 @@ disable_power: rc = 0; } - rc = call_res_op(core, clk_disable, core, "vcodec_clk"); + rc = call_res_op(core, clk_disable, core, "video_cc_mvs0_clk"); if (rc) { - d_vpr_e("%s: disable unprepare vcodec_clk failed\n", __func__); + d_vpr_e("%s: disable unprepare video_cc_mvs0_clk failed\n", __func__); rc = 0; } @@ -439,10 +431,10 @@ static int __power_off_iris33_controller(struct msm_vidc_core *core) if (rc) return rc; - /* enable MVP_CTL reset and enable Force Sleep Retention */ - rc = __write_register(core, VCODEC_VIDEO_CC_MVS0C_CBCR, 0x6005); + /* assert MVP_CTL reset */ + rc = call_res_op(core, reset_control_assert, core, "video_mvs0c_reset"); if (rc) - return rc; + d_vpr_h("%s: assert video_mvs0c_reset failed\n", __func__); /* enable MVP NoC reset */ rc = __write_register_masked(core, AON_WRAPPER_MVP_NOC_CORE_SW_RESET, @@ -450,21 +442,24 @@ static int __power_off_iris33_controller(struct msm_vidc_core *core) if (rc) return rc; - /* enable vcodec video_cc XO reset and disable video_cc XO clock */ rc = __read_register(core, AON_WRAPPER_SPARE, &value); if (rc) return rc; rc = __write_register(core, AON_WRAPPER_SPARE, value|0x2); - if (rc) - return rc; - rc = __write_register(core, VCODEC_VIDEO_CC_XO_CBCR, 0x4); if (rc) return rc; - /* De-assert MVP_CTL reset and enable Force Sleep Retention */ - rc = __write_register(core, VCODEC_VIDEO_CC_MVS0C_CBCR, 0x6001); + /* assert video_cc XO reset */ + rc = call_res_op(core, reset_control_assert, core, "video_xo_reset"); if (rc) - return rc; + d_vpr_e("%s: assert video_xo_reset failed\n", __func__); + + /* do we need 80us sleep before deassert? */ + usleep_range(80, 100); + /* De-assert MVP_CTL reset */ + rc = call_res_op(core, reset_control_deassert, core, "video_mvs0c_reset"); + if (rc) + d_vpr_h("%s: deassert video_mvs0c_reset failed\n", __func__); /* De-assert MVP NoC reset */ rc = __write_register_masked(core, AON_WRAPPER_MVP_NOC_CORE_SW_RESET, @@ -472,11 +467,11 @@ static int __power_off_iris33_controller(struct msm_vidc_core *core) if (rc) return rc; - /* De-assert video_cc XO reset and enable video_cc XO clock after 80us */ + /* De-assert video_cc XO reset */ usleep_range(80, 100); - rc = __write_register(core, VCODEC_VIDEO_CC_XO_CBCR, 0x1); + rc = call_res_op(core, reset_control_deassert, core, "video_xo_reset"); if (rc) - return rc; + d_vpr_e("%s: deassert video_xo_reset failed\n", __func__); /* Enable MVP NoC clock */ rc = __write_register_masked(core, AON_WRAPPER_MVP_NOC_CORE_CLK_CONTROL, @@ -484,16 +479,10 @@ static int __power_off_iris33_controller(struct msm_vidc_core *core) if (rc) return rc; - /* De-assert MVP_CTL Force Sleep Retention */ - rc = __write_register(core, VCODEC_VIDEO_CC_MVS0C_CBCR, 0x1); - if (rc) - return rc; - - /* Turn off MVP MVS0C core clock */ - rc = call_res_op(core, clk_disable, core, "core_clk"); + rc = call_res_op(core, clk_disable, core, "video_cc_mvs0c_clk"); if (rc) { - d_vpr_e("%s: disable unprepare core_clk failed\n", __func__); + d_vpr_e("%s: disable unprepare video_cc_mvs0c_clk failed\n", __func__); rc = 0; } @@ -505,9 +494,9 @@ static int __power_off_iris33_controller(struct msm_vidc_core *core) } /* Turn off GCC AXI clock */ - rc = call_res_op(core, clk_disable, core, "gcc_video_axi0"); + rc = call_res_op(core, clk_disable, core, "gcc_video_axi0_clk"); if (rc) { - d_vpr_e("%s: disable unprepare core_clk failed\n", __func__); + d_vpr_e("%s: disable unprepare gcc_video_axi0_clk failed\n", __func__); rc = 0; } @@ -561,24 +550,40 @@ static int __power_on_iris33_controller(struct msm_vidc_core *core) if (rc) goto fail_regulator; - rc = call_res_op(core, reset_bridge, core); + rc = call_res_op(core, reset_control_assert, core, "video_axi_reset"); if (rc) - goto fail_reset_ahb2axi; + goto fail_reset_assert_axi; + rc = call_res_op(core, reset_control_assert, core, "video_mvs0c_reset"); + if (rc) + goto fail_reset_assert_mvs0c; + /* add usleep between assert and deassert */ + usleep_range(1000, 1100); + rc = call_res_op(core, reset_control_deassert, core, "video_axi_reset"); + if (rc) + goto fail_reset_deassert_axi; + rc = call_res_op(core, reset_control_deassert, core, "video_mvs0c_reset"); + if (rc) + goto fail_reset_deassert_mvs0c; - rc = call_res_op(core, clk_enable, core, "gcc_video_axi0"); + rc = call_res_op(core, clk_enable, core, "gcc_video_axi0_clk"); if (rc) goto fail_clk_axi; - rc = call_res_op(core, clk_enable, core, "core_clk"); + rc = call_res_op(core, clk_enable, core, "video_cc_mvs0c_clk"); if (rc) goto fail_clk_controller; return 0; fail_clk_controller: - call_res_op(core, clk_disable, core, "gcc_video_axi0"); + call_res_op(core, clk_disable, core, "gcc_video_axi0_clk"); fail_clk_axi: -fail_reset_ahb2axi: +fail_reset_deassert_mvs0c: +fail_reset_deassert_axi: + call_res_op(core, reset_control_deassert, core, "video_mvs0c_reset"); +fail_reset_assert_mvs0c: + call_res_op(core, reset_control_deassert, core, "video_axi_reset"); +fail_reset_assert_axi: call_res_op(core, gdsc_off, core, "iris-ctl"); fail_regulator: return rc; @@ -592,7 +597,7 @@ static int __power_on_iris33_hardware(struct msm_vidc_core *core) if (rc) goto fail_regulator; - rc = call_res_op(core, clk_enable, core, "vcodec_clk"); + rc = call_res_op(core, clk_enable, core, "video_cc_mvs0_clk"); if (rc) goto fail_clk_controller; diff --git a/driver/vidc/inc/resources.h b/driver/vidc/inc/resources.h index e24ccc0b80..92b3cad892 100644 --- a/driver/vidc/inc/resources.h +++ b/driver/vidc/inc/resources.h @@ -205,6 +205,10 @@ struct msm_vidc_resources_ops { int (*init)(struct msm_vidc_core *core); int (*reset_bridge)(struct msm_vidc_core *core); + int (*reset_control_assert)(struct msm_vidc_core *core, + const char *name); + int (*reset_control_deassert)(struct msm_vidc_core *core, + const char *name); int (*gdsc_on)(struct msm_vidc_core *core, const char *name); int (*gdsc_off)(struct msm_vidc_core *core, const char *name); diff --git a/driver/vidc/src/resources.c b/driver/vidc/src/resources.c index b1dcbd3ec6..154453900d 100644 --- a/driver/vidc/src/resources.c +++ b/driver/vidc/src/resources.c @@ -1285,6 +1285,63 @@ static int __init_resources(struct msm_vidc_core *core) return rc; } +static int __reset_control_assert_name(struct msm_vidc_core *core, + const char *name) +{ + struct reset_info *rcinfo = NULL; + int rc = 0; + bool found = false; + + venus_hfi_for_each_reset_clock(core, rcinfo) { + if (strcmp(rcinfo->name, name)) + continue; + + found = true; + rc = reset_control_assert(rcinfo->rst); + if (rc) + d_vpr_e("%s: failed to assert reset control (%s), rc = %d\n", + __func__, rcinfo->name, rc); + else + d_vpr_h("%s: assert reset control (%s)\n", + __func__, rcinfo->name); + break; + } + if (!found) { + d_vpr_e("%s: reset control (%s) not found\n", __func__, name); + rc = -EINVAL; + } + + return rc; +} + +static int __reset_control_deassert_name(struct msm_vidc_core *core, + const char *name) +{ + struct reset_info *rcinfo = NULL; + int rc = 0; + bool found = false; + + venus_hfi_for_each_reset_clock(core, rcinfo) { + if (strcmp(rcinfo->name, name)) + continue; + found = true; + rc = reset_control_deassert(rcinfo->rst); + if (rc) + d_vpr_e("%s: deassert reset control for (%s) failed, rc %d\n", + __func__, rcinfo->name, rc); + else + d_vpr_h("%s: deassert reset control (%s)\n", + __func__, rcinfo->name); + break; + } + if (!found) { + d_vpr_e("%s: reset control (%s) not found\n", __func__, name); + rc = -EINVAL; + } + + return rc; +} + static int __reset_control_deassert(struct msm_vidc_core *core) { struct reset_info *rcinfo = NULL; @@ -1353,6 +1410,8 @@ static int __reset_ahb2axi_bridge(struct msm_vidc_core *core) static const struct msm_vidc_resources_ops res_ops = { .init = __init_resources, .reset_bridge = __reset_ahb2axi_bridge, + .reset_control_assert = __reset_control_assert_name, + .reset_control_deassert = __reset_control_deassert_name, .gdsc_on = __enable_regulator, .gdsc_off = __disable_regulator, .gdsc_hw_ctrl = __hand_off_regulators, From d934279ad447d35b53e7de8f4e20eb8575c2ca30 Mon Sep 17 00:00:00 2001 From: Maheshwar Ajja Date: Fri, 11 Nov 2022 18:46:49 -0800 Subject: [PATCH 0761/1061] video: driver: add resets in power off sequence Add assert and deassert axi and mvs0c resets to avoid video hardware unresponsive issues due to multiple power collapse sequence execution. Change-Id: I25ec99eab6b50111161ec9486ea1155bee63f7fc Signed-off-by: Maheshwar Ajja --- driver/variant/iris33/src/msm_vidc_iris33.c | 25 ++++++++++++++++----- 1 file changed, 20 insertions(+), 5 deletions(-) diff --git a/driver/variant/iris33/src/msm_vidc_iris33.c b/driver/variant/iris33/src/msm_vidc_iris33.c index e337d2a842..c4182861b4 100644 --- a/driver/variant/iris33/src/msm_vidc_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_iris33.c @@ -399,7 +399,7 @@ static int __power_off_iris33_controller(struct msm_vidc_core *core) rc = __read_register_with_poll_timeout(core, WRAPPER_IRIS_CPU_NOC_LPI_STATUS, 0x1, 0x1, 200, 2000); if (rc) - d_vpr_h("%s: WRAPPER_IRIS_CPU_NOC_LPI_CONTROL failed\n", __func__); + d_vpr_e("%s: WRAPPER_IRIS_CPU_NOC_LPI_CONTROL failed\n", __func__); /* Debug bridge LPI release */ rc = __write_register(core, WRAPPER_DEBUG_BRIDGE_LPI_CONTROL_IRIS33, 0x0); @@ -409,7 +409,7 @@ static int __power_off_iris33_controller(struct msm_vidc_core *core) rc = __read_register_with_poll_timeout(core, WRAPPER_DEBUG_BRIDGE_LPI_STATUS_IRIS33, 0xffffffff, 0x0, 200, 2000); if (rc) - d_vpr_h("%s: debug bridge release failed\n", __func__); + d_vpr_e("%s: debug bridge release failed\n", __func__); /* Reset MVP QNS4PDXFIFO */ rc = __write_register(core, WRAPPER_TZ_CTL_AXI_CLOCK_CONFIG, 0x3); @@ -428,6 +428,21 @@ static int __power_off_iris33_controller(struct msm_vidc_core *core) if (rc) return rc; + /* assert and deassert axi and mvs0c resets */ + rc = call_res_op(core, reset_control_assert, core, "video_axi_reset"); + if (rc) + d_vpr_e("%s: assert video_axi_reset failed\n", __func__); + rc = call_res_op(core, reset_control_assert, core, "video_mvs0c_reset"); + if (rc) + d_vpr_e("%s: assert video_mvs0c_reset failed\n", __func__); + usleep_range(400, 500); + rc = call_res_op(core, reset_control_deassert, core, "video_axi_reset"); + if (rc) + d_vpr_e("%s: de-assert video_axi_reset failed\n", __func__); + rc = call_res_op(core, reset_control_deassert, core, "video_mvs0c_reset"); + if (rc) + d_vpr_e("%s: de-assert video_mvs0c_reset failed\n", __func__); + /* Disable MVP NoC clock */ rc = __write_register_masked(core, AON_WRAPPER_MVP_NOC_CORE_CLK_CONTROL, 0x1, BIT(0)); @@ -437,7 +452,7 @@ static int __power_off_iris33_controller(struct msm_vidc_core *core) /* assert MVP_CTL reset */ rc = call_res_op(core, reset_control_assert, core, "video_mvs0c_reset"); if (rc) - d_vpr_h("%s: assert video_mvs0c_reset failed\n", __func__); + d_vpr_e("%s: assert video_mvs0c_reset failed\n", __func__); /* enable MVP NoC reset */ rc = __write_register_masked(core, AON_WRAPPER_MVP_NOC_CORE_SW_RESET, @@ -458,11 +473,11 @@ static int __power_off_iris33_controller(struct msm_vidc_core *core) d_vpr_e("%s: assert video_xo_reset failed\n", __func__); /* do we need 80us sleep before deassert? */ - usleep_range(80, 100); + usleep_range(400, 500); /* De-assert MVP_CTL reset */ rc = call_res_op(core, reset_control_deassert, core, "video_mvs0c_reset"); if (rc) - d_vpr_h("%s: deassert video_mvs0c_reset failed\n", __func__); + d_vpr_e("%s: deassert video_mvs0c_reset failed\n", __func__); /* De-assert MVP NoC reset */ rc = __write_register_masked(core, AON_WRAPPER_MVP_NOC_CORE_SW_RESET, From a51bbd64450a491af9f4c72c27b1714abaf5bcb6 Mon Sep 17 00:00:00 2001 From: Anshul Agarwal Date: Tue, 15 Nov 2022 23:21:57 +0530 Subject: [PATCH 0762/1061] video: driver: Remove slice interface capability Removed slice interface capability for Kalama and taro. Change-Id: Id7e90eff7457d004d70ba885af81a33e1feb7bb3 Signed-off-by: Gaviraju Doddabettahalli Bettegowda --- driver/platform/kalama/src/msm_vidc_kalama.c | 20 +++----------------- driver/platform/waipio/src/msm_vidc_waipio.c | 20 +++----------------- 2 files changed, 6 insertions(+), 34 deletions(-) diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index 9c6fc19362..80bc1d8eff 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -593,14 +593,6 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { V4L2_CID_MPEG_VIDC_SUPERFRAME, 0, CAP_FLAG_NONE}, - {SLICE_DECODE, DEC, H264|HEVC|AV1, - V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_MPEG_MSM_VIDC_DISABLE, - 0, - V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDEO_DECODER_SLICE_INTERFACE, - 0}, - {HEADER_MODE, ENC, CODECS_ALL, V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE, V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME, @@ -1992,7 +1984,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kala {META_OUTBUF_FENCE, DEC, H264|HEVC|VP9|AV1, {OUTPUT_ORDER}, - {LOWLATENCY_MODE, SLICE_DECODE}, + {LOWLATENCY_MODE}, msm_vidc_adjust_dec_outbuf_fence, NULL}, @@ -2020,12 +2012,6 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kala NULL, NULL}, - {SLICE_DECODE, DEC, H264|HEVC|AV1, - {LOWLATENCY_MODE, META_OUTBUF_FENCE, OUTPUT_ORDER}, - {0}, - NULL, - NULL}, - {HEADER_MODE, ENC, CODECS_ALL, {0}, {0}, @@ -2145,7 +2131,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kala {LOWLATENCY_MODE, DEC, H264|HEVC|VP9|AV1, {META_OUTBUF_FENCE}, - {STAGE, SLICE_DECODE}, + {STAGE}, msm_vidc_adjust_dec_lowlatency_mode, NULL}, @@ -2442,7 +2428,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kala {OUTPUT_ORDER, DEC, H264|HEVC|VP9|AV1, {THUMBNAIL_MODE, DISPLAY_DELAY, DISPLAY_DELAY_ENABLE}, - {META_OUTBUF_FENCE, SLICE_DECODE}, + {META_OUTBUF_FENCE}, msm_vidc_adjust_output_order, msm_vidc_set_u32}, diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 73077649d9..e2b6fffd3f 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -331,14 +331,6 @@ static struct msm_platform_inst_capability instance_cap_data_waipio[] = { V4L2_CID_MPEG_VIDC_SUPERFRAME, 0, CAP_FLAG_NONE}, - {SLICE_DECODE, DEC, H264|HEVC, - V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_MPEG_MSM_VIDC_DISABLE, - 0, - V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDEO_DECODER_SLICE_INTERFACE, - 0}, - {HEADER_MODE, ENC, CODECS_ALL, V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE, V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME, @@ -1581,7 +1573,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_waip {META_OUTBUF_FENCE, DEC, H264|HEVC|VP9, {OUTPUT_ORDER}, - {LOWLATENCY_MODE, SLICE_DECODE}, + {LOWLATENCY_MODE}, NULL, NULL}, @@ -1609,12 +1601,6 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_waip NULL, NULL}, - {SLICE_DECODE, DEC, H264|HEVC, - {LOWLATENCY_MODE, META_OUTBUF_FENCE, OUTPUT_ORDER}, - {0}, - NULL, - NULL}, - {HEADER_MODE, ENC, CODECS_ALL, {0}, {0}, @@ -1722,7 +1708,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_waip {LOWLATENCY_MODE, DEC, H264|HEVC|VP9, {META_OUTBUF_FENCE}, - {STAGE, SLICE_DECODE}, + {STAGE}, msm_vidc_adjust_dec_lowlatency_mode, NULL}, @@ -2007,7 +1993,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_waip {OUTPUT_ORDER, DEC, H264|HEVC|VP9, {THUMBNAIL_MODE, DISPLAY_DELAY, DISPLAY_DELAY_ENABLE}, - {META_OUTBUF_FENCE, SLICE_DECODE}, + {META_OUTBUF_FENCE}, msm_vidc_adjust_output_order, msm_vidc_set_u32}, From 2dd5543fedb5a018b96259e33993e0053c273c0e Mon Sep 17 00:00:00 2001 From: Deepa Guthyappa Madivalara Date: Tue, 15 Nov 2022 14:43:36 -0800 Subject: [PATCH 0763/1061] video: driver: disable SW power collapse temporarily Disable SW_PC temporarily Change-Id: Ief82b9b273d6a4c7383e0aab73c2a5da428c203a Signed-off-by: Deepa Guthyappa Madivalara --- driver/platform/pineapple/src/msm_vidc_pineapple.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/driver/platform/pineapple/src/msm_vidc_pineapple.c b/driver/platform/pineapple/src/msm_vidc_pineapple.c index ea7d76457d..04ddf3f9d6 100644 --- a/driver/platform/pineapple/src/msm_vidc_pineapple.c +++ b/driver/platform/pineapple/src/msm_vidc_pineapple.c @@ -306,7 +306,7 @@ static struct msm_platform_core_capability core_data_pineapple[] = { {MAX_MBPS_ALL_INTRA, 2088960}, /* 4096x2176/256 MBs@60fps */ {MAX_ENH_LAYER_COUNT, 5}, {NUM_VPP_PIPE, 4}, - {SW_PC, 1}, + {SW_PC, 0}, {FW_UNLOAD, 0}, {HW_RESPONSE_TIMEOUT, HW_RESPONSE_TIMEOUT_VALUE}, /* 1000 ms */ {SW_PC_DELAY, SW_PC_DELAY_VALUE }, /* 1500 ms (>HW_RESPONSE_TIMEOUT)*/ From 54f71aa5abb1603c7dd32ec8c7e0f53bdf8d31d2 Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Wed, 16 Nov 2022 15:45:17 -0800 Subject: [PATCH 0764/1061] Revert "video: driver: disable SW power collapse temporarily" Re-enable sw power collapse. This reverts commit 2dd5543fedb5a018b96259e33993e0053c273c0e. Change-Id: If6cd275551fcb1d3de1fa75b9cace9aa6649c7fa Signed-off-by: Darshana Patil --- driver/platform/pineapple/src/msm_vidc_pineapple.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/driver/platform/pineapple/src/msm_vidc_pineapple.c b/driver/platform/pineapple/src/msm_vidc_pineapple.c index df9ef8c71a..fb5f56cadf 100644 --- a/driver/platform/pineapple/src/msm_vidc_pineapple.c +++ b/driver/platform/pineapple/src/msm_vidc_pineapple.c @@ -306,7 +306,7 @@ static struct msm_platform_core_capability core_data_pineapple[] = { {MAX_MBPS_ALL_INTRA, 2088960}, /* 4096x2176/256 MBs@60fps */ {MAX_ENH_LAYER_COUNT, 5}, {NUM_VPP_PIPE, 4}, - {SW_PC, 0}, + {SW_PC, 1}, {FW_UNLOAD, 0}, {HW_RESPONSE_TIMEOUT, HW_RESPONSE_TIMEOUT_VALUE}, /* 1000 ms */ {SW_PC_DELAY, SW_PC_DELAY_VALUE }, /* 1500 ms (>HW_RESPONSE_TIMEOUT)*/ From 2638c201a8414f9a65446b338132f6e83d9b6845 Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Wed, 16 Nov 2022 15:49:57 -0800 Subject: [PATCH 0765/1061] video: driver: enable xo reset clock Enable xo reset clock since it is enabled from clock driver. Change-Id: Ica38616f514c9f2288a60fbfb3e0a3683c154b15 Signed-off-by: Darshana Patil --- driver/platform/pineapple/src/msm_vidc_pineapple.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/driver/platform/pineapple/src/msm_vidc_pineapple.c b/driver/platform/pineapple/src/msm_vidc_pineapple.c index fb5f56cadf..7933e0debb 100644 --- a/driver/platform/pineapple/src/msm_vidc_pineapple.c +++ b/driver/platform/pineapple/src/msm_vidc_pineapple.c @@ -2630,8 +2630,8 @@ static const struct clk_table pineapple_clk_table[] = { /* name */ static const struct clk_rst_table pineapple_clk_reset_table[] = { { "video_axi_reset" }, + { "video_xo_reset" }, { "video_mvs0c_reset" }, - /*{ "video_xo_reset" }, TODO: add after clock driver support */ }; /* name, llcc_id */ From 2eda86592a6bf2c3a020a0c42e2ccfa9d85826f0 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Mon, 14 Nov 2022 16:46:48 +0530 Subject: [PATCH 0766/1061] video: driver: use macros to prepare enums & string arrays video driver is maintaining multiple tables based on enum name pair. So this mapping might go wrong if new entry is inserted in different position. So added logic to prepare enums & static const char* arrays using macros. So compiler will take care of creation and maintaining order. Change-Id: Id3669cf3ce150b3ababb84dce18326220f41d88d Signed-off-by: Govindaraj Rajagopal --- driver/vidc/inc/msm_vidc_core.h | 12 +- driver/vidc/inc/msm_vidc_inst.h | 19 +- driver/vidc/inc/msm_vidc_internal.h | 441 ++++++++++++++-------------- driver/vidc/src/msm_vidc_driver.c | 289 ++---------------- 4 files changed, 271 insertions(+), 490 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_core.h b/driver/vidc/inc/msm_vidc_core.h index 79d44c872e..5c0e682aff 100644 --- a/driver/vidc/inc/msm_vidc_core.h +++ b/driver/vidc/inc/msm_vidc_core.h @@ -17,6 +17,12 @@ struct msm_vidc_core; #define MAX_EVENTS 30 +#define FOREACH_CORE_STATE(CORE_STATE) { \ + CORE_STATE(CORE_DEINIT) \ + CORE_STATE(CORE_INIT_WAIT) \ + CORE_STATE(CORE_INIT) \ +} + #define call_venus_op(d, op, ...) \ (((d) && (d)->venus_ops && (d)->venus_ops->op) ? \ ((d)->venus_ops->op(__VA_ARGS__)):0) @@ -57,11 +63,7 @@ struct msm_vidc_core_power { u64 bw_llcc; }; -enum msm_vidc_core_state { - MSM_VIDC_CORE_DEINIT = 0, - MSM_VIDC_CORE_INIT_WAIT = 1, - MSM_VIDC_CORE_INIT = 2, -}; +enum msm_vidc_core_state FOREACH_CORE_STATE(GENERATE_MSM_VIDC_ENUM); struct msm_vidc_core { struct platform_device *pdev; diff --git a/driver/vidc/inc/msm_vidc_inst.h b/driver/vidc/inc/msm_vidc_inst.h index 9da4473236..6196871220 100644 --- a/driver/vidc/inc/msm_vidc_inst.h +++ b/driver/vidc/inc/msm_vidc_inst.h @@ -13,6 +13,16 @@ struct msm_vidc_inst; +#define FOREACH_STATE(STATE) { \ + STATE(NONE) \ + STATE(OPEN) \ + STATE(INPUT_STREAMING) \ + STATE(OUTPUT_STREAMING) \ + STATE(STREAMING) \ + STATE(CLOSE) \ + STATE(ERROR) \ +} + #define call_session_op(c, op, ...) \ (((c) && (c)->session_ops && (c)->session_ops->op) ? \ ((c)->session_ops->op(__VA_ARGS__)) : 0) @@ -70,14 +80,7 @@ struct msm_vidc_buffers_info { struct msm_vidc_buffers partial_data; }; -enum msm_vidc_state { - MSM_VIDC_OPEN = 1, - MSM_VIDC_INPUT_STREAMING = 2, - MSM_VIDC_OUTPUT_STREAMING = 3, - MSM_VIDC_STREAMING = 4, - MSM_VIDC_CLOSE = 5, - MSM_VIDC_ERROR = 6, -}; +enum msm_vidc_state FOREACH_STATE(GENERATE_MSM_VIDC_ENUM); #define MSM_VIDC_SUB_STATE_NONE 0 #define MSM_VIDC_MAX_SUB_STATES 6 diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 26ef886aa6..5fe78f407b 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -173,6 +173,230 @@ enum msm_vidc_metadata_bits { #define MAX_DPB_LIST_ARRAY_SIZE (16 * 4) #define MAX_DPB_LIST_PAYLOAD_SIZE (16 * 4 * 4) +#define GENERATE_ENUM(ENUM) ENUM, +#define GENERATE_STRING(STRING) (#STRING), + +/* append MSM_VIDC_ to prepare enum */ +#define GENERATE_MSM_VIDC_ENUM(ENUM) MSM_VIDC_##ENUM, + +/* append MSM_VIDC_BUF_ to prepare enum */ +#define GENERATE_MSM_VIDC_BUF_ENUM(ENUM) MSM_VIDC_BUF_##ENUM, + +/** + * msm_vidc_prepare_dependency_list() api will prepare caps_list by looping over + * enums(msm_vidc_inst_capability_type) from 0 to INST_CAP_MAX and arranges the + * node in such a way that parents willbe at the front and dependent children + * in the back. + * + * caps_list preparation may become CPU intensive task, so to save CPU cycles, + * organize enum in proper order(root caps at the beginning and dependent caps + * at back), so that during caps_list preparation num CPU cycles spent will reduce. + * + * Note: It will work, if enum kept at different places, but not efficient. + * + * - place all metadata cap(META_*) af the front. + * - place all root(no parent) enums before PROFILE cap. + * - place all intermittent(having both parent and child) enums before MIN_FRAME_QP cap. + * - place all leaf(no child) enums before INST_CAP_MAX cap. + */ +#define FOREACH_CAP(CAP) { \ + CAP(INST_CAP_NONE) \ + CAP(META_SEQ_HDR_NAL) \ + CAP(META_BITSTREAM_RESOLUTION) \ + CAP(META_CROP_OFFSETS) \ + CAP(META_DPB_MISR) \ + CAP(META_OPB_MISR) \ + CAP(META_INTERLACE) \ + CAP(META_OUTBUF_FENCE) \ + CAP(META_LTR_MARK_USE) \ + CAP(META_TIMESTAMP) \ + CAP(META_CONCEALED_MB_CNT) \ + CAP(META_HIST_INFO) \ + CAP(META_PICTURE_TYPE) \ + CAP(META_SEI_MASTERING_DISP) \ + CAP(META_SEI_CLL) \ + CAP(META_HDR10PLUS) \ + CAP(META_BUF_TAG) \ + CAP(META_DPB_TAG_LIST) \ + CAP(META_SUBFRAME_OUTPUT) \ + CAP(META_ENC_QP_METADATA) \ + CAP(META_DEC_QP_METADATA) \ + CAP(META_MAX_NUM_REORDER_FRAMES) \ + CAP(META_EVA_STATS) \ + CAP(META_ROI_INFO) \ + CAP(META_SALIENCY_INFO) \ + CAP(META_TRANSCODING_STAT_INFO) \ + CAP(META_DOLBY_RPU) \ + CAP(FRAME_WIDTH) \ + CAP(LOSSLESS_FRAME_WIDTH) \ + CAP(SECURE_FRAME_WIDTH) \ + CAP(FRAME_HEIGHT) \ + CAP(LOSSLESS_FRAME_HEIGHT) \ + CAP(SECURE_FRAME_HEIGHT) \ + CAP(PIX_FMTS) \ + CAP(MIN_BUFFERS_INPUT) \ + CAP(MIN_BUFFERS_OUTPUT) \ + CAP(MBPF) \ + CAP(BATCH_MBPF) \ + CAP(BATCH_FPS) \ + CAP(LOSSLESS_MBPF) \ + CAP(SECURE_MBPF) \ + CAP(FRAME_RATE) \ + CAP(OPERATING_RATE) \ + CAP(INPUT_RATE) \ + CAP(TIMESTAMP_RATE) \ + CAP(SCALE_FACTOR) \ + CAP(MB_CYCLES_VSP) \ + CAP(MB_CYCLES_VPP) \ + CAP(MB_CYCLES_LP) \ + CAP(MB_CYCLES_FW) \ + CAP(MB_CYCLES_FW_VPP) \ + CAP(CLIENT_ID) \ + CAP(SECURE_MODE) \ + CAP(FENCE_ID) \ + CAP(FENCE_FD) \ + CAP(TS_REORDER) \ + CAP(HFLIP) \ + CAP(VFLIP) \ + CAP(ROTATION) \ + CAP(SUPER_FRAME) \ + CAP(HEADER_MODE) \ + CAP(PREPEND_SPSPPS_TO_IDR) \ + CAP(WITHOUT_STARTCODE) \ + CAP(NAL_LENGTH_FIELD) \ + CAP(REQUEST_I_FRAME) \ + CAP(BITRATE_MODE) \ + CAP(LOSSLESS) \ + CAP(FRAME_SKIP_MODE) \ + CAP(FRAME_RC_ENABLE) \ + CAP(GOP_CLOSURE) \ + CAP(CSC) \ + CAP(CSC_CUSTOM_MATRIX) \ + CAP(USE_LTR) \ + CAP(MARK_LTR) \ + CAP(BASELAYER_PRIORITY) \ + CAP(IR_TYPE) \ + CAP(AU_DELIMITER) \ + CAP(GRID) \ + CAP(I_FRAME_MIN_QP) \ + CAP(P_FRAME_MIN_QP) \ + CAP(B_FRAME_MIN_QP) \ + CAP(I_FRAME_MAX_QP) \ + CAP(P_FRAME_MAX_QP) \ + CAP(B_FRAME_MAX_QP) \ + CAP(LAYER_TYPE) \ + CAP(LAYER_ENABLE) \ + CAP(L0_BR) \ + CAP(L1_BR) \ + CAP(L2_BR) \ + CAP(L3_BR) \ + CAP(L4_BR) \ + CAP(L5_BR) \ + CAP(LEVEL) \ + CAP(HEVC_TIER) \ + CAP(AV1_TIER) \ + CAP(DISPLAY_DELAY_ENABLE) \ + CAP(DISPLAY_DELAY) \ + CAP(CONCEAL_COLOR_8BIT) \ + CAP(CONCEAL_COLOR_10BIT) \ + CAP(LF_MODE) \ + CAP(LF_ALPHA) \ + CAP(LF_BETA) \ + CAP(SLICE_MAX_BYTES) \ + CAP(SLICE_MAX_MB) \ + CAP(MB_RC) \ + CAP(CHROMA_QP_INDEX_OFFSET) \ + CAP(PIPE) \ + CAP(POC) \ + CAP(CODED_FRAMES) \ + CAP(BIT_DEPTH) \ + CAP(CODEC_CONFIG) \ + CAP(BITSTREAM_SIZE_OVERWRITE) \ + CAP(THUMBNAIL_MODE) \ + CAP(DEFAULT_HEADER) \ + CAP(RAP_FRAME) \ + CAP(SEQ_CHANGE_AT_SYNC_FRAME) \ + CAP(QUALITY_MODE) \ + CAP(PRIORITY) \ + CAP(FIRMWARE_PRIORITY_OFFSET) \ + CAP(CRITICAL_PRIORITY) \ + CAP(RESERVE_DURATION) \ + CAP(DPB_LIST) \ + CAP(FILM_GRAIN) \ + CAP(SUPER_BLOCK) \ + CAP(DRAP) \ + CAP(ENC_IP_CR) \ + CAP(COMPLEXITY) \ + CAP(CABAC_MAX_BITRATE) \ + CAP(CAVLC_MAX_BITRATE) \ + CAP(ALLINTRA_MAX_BITRATE) \ + CAP(LOWLATENCY_MAX_BITRATE) \ + CAP(LAST_FLAG_EVENT_ENABLE) \ + CAP(NUM_COMV) \ + CAP(PROFILE) \ + CAP(ENH_LAYER_COUNT) \ + CAP(BIT_RATE) \ + CAP(LOWLATENCY_MODE) \ + CAP(GOP_SIZE) \ + CAP(B_FRAME) \ + CAP(ALL_INTRA) \ + CAP(MIN_QUALITY) \ + CAP(CONTENT_ADAPTIVE_CODING) \ + CAP(BLUR_TYPES) \ + CAP(REQUEST_PREPROCESS) \ + CAP(SLICE_MODE) \ + CAP(MIN_FRAME_QP) \ + CAP(MAX_FRAME_QP) \ + CAP(I_FRAME_QP) \ + CAP(P_FRAME_QP) \ + CAP(B_FRAME_QP) \ + CAP(TIME_DELTA_BASED_RC) \ + CAP(CONSTANT_QUALITY) \ + CAP(VBV_DELAY) \ + CAP(PEAK_BITRATE) \ + CAP(ENTROPY_MODE) \ + CAP(TRANSFORM_8X8) \ + CAP(STAGE) \ + CAP(LTR_COUNT) \ + CAP(IR_PERIOD) \ + CAP(BITRATE_BOOST) \ + CAP(BLUR_RESOLUTION) \ + CAP(OUTPUT_ORDER) \ + CAP(INPUT_BUF_HOST_MAX_COUNT) \ + CAP(OUTPUT_BUF_HOST_MAX_COUNT) \ + CAP(DELIVERY_MODE) \ + CAP(VUI_TIMING_INFO) \ + CAP(SLICE_DECODE) \ + CAP(INST_CAP_MAX) \ +} + +#define FOREACH_BUF_TYPE(BUF_TYPE) { \ + BUF_TYPE(NONE) \ + BUF_TYPE(INPUT) \ + BUF_TYPE(OUTPUT) \ + BUF_TYPE(INPUT_META) \ + BUF_TYPE(OUTPUT_META) \ + BUF_TYPE(READ_ONLY) \ + BUF_TYPE(QUEUE) \ + BUF_TYPE(BIN) \ + BUF_TYPE(ARP) \ + BUF_TYPE(COMV) \ + BUF_TYPE(NON_COMV) \ + BUF_TYPE(LINE) \ + BUF_TYPE(DPB) \ + BUF_TYPE(PERSIST) \ + BUF_TYPE(VPSS) \ + BUF_TYPE(PARTIAL_DATA) \ +} + +#define FOREACH_ALLOW(ALLOW) { \ + ALLOW(MSM_VIDC_DISALLOW) \ + ALLOW(MSM_VIDC_ALLOW) \ + ALLOW(MSM_VIDC_DEFER) \ + ALLOW(MSM_VIDC_DISCARD) \ + ALLOW(MSM_VIDC_IGNORE) \ +} + enum msm_vidc_domain_type { MSM_VIDC_ENCODER = BIT(0), MSM_VIDC_DECODER = BIT(1), @@ -198,23 +422,7 @@ enum msm_vidc_colorformat_type { MSM_VIDC_FMT_META = BIT(31), }; -enum msm_vidc_buffer_type { - MSM_VIDC_BUF_INPUT = 1, - MSM_VIDC_BUF_OUTPUT = 2, - MSM_VIDC_BUF_INPUT_META = 3, - MSM_VIDC_BUF_OUTPUT_META = 4, - MSM_VIDC_BUF_READ_ONLY = 5, - MSM_VIDC_BUF_QUEUE = 6, - MSM_VIDC_BUF_BIN = 7, - MSM_VIDC_BUF_ARP = 8, - MSM_VIDC_BUF_COMV = 9, - MSM_VIDC_BUF_NON_COMV = 10, - MSM_VIDC_BUF_LINE = 11, - MSM_VIDC_BUF_DPB = 12, - MSM_VIDC_BUF_PERSIST = 13, - MSM_VIDC_BUF_VPSS = 14, - MSM_VIDC_BUF_PARTIAL_DATA = 15, -}; +enum msm_vidc_buffer_type FOREACH_BUF_TYPE(GENERATE_MSM_VIDC_BUF_ENUM); /* always match with v4l2 flags V4L2_BUF_FLAG_* */ enum msm_vidc_buffer_flags { @@ -381,196 +589,7 @@ enum msm_vidc_core_capability_type { CORE_CAP_MAX, }; -/** - * msm_vidc_prepare_dependency_list() api will prepare caps_list by looping over - * enums(msm_vidc_inst_capability_type) from 0 to INST_CAP_MAX and arranges the - * node in such a way that parents willbe at the front and dependent children - * in the back. - * - * caps_list preparation may become CPU intensive task, so to save CPU cycles, - * organize enum in proper order(root caps at the beginning and dependent caps - * at back), so that during caps_list preparation num CPU cycles spent will reduce. - * - * Note: It will work, if enum kept at different places, but not efficient. - */ -enum msm_vidc_inst_capability_type { - INST_CAP_NONE = 0, - /* place all metadata after this line - */ - META_SEQ_HDR_NAL, - META_BITSTREAM_RESOLUTION, - META_CROP_OFFSETS, - META_DPB_MISR, - META_OPB_MISR, - META_INTERLACE, - META_OUTBUF_FENCE, - META_LTR_MARK_USE, - META_TIMESTAMP, - META_CONCEALED_MB_CNT, - META_HIST_INFO, - META_PICTURE_TYPE, - META_SEI_MASTERING_DISP, - META_SEI_CLL, - META_HDR10PLUS, - META_BUF_TAG, - META_DPB_TAG_LIST, - META_SUBFRAME_OUTPUT, - META_ENC_QP_METADATA, - META_DEC_QP_METADATA, - META_MAX_NUM_REORDER_FRAMES, - META_EVA_STATS, - META_ROI_INFO, - META_SALIENCY_INFO, - META_TRANSCODING_STAT_INFO, - META_DOLBY_RPU, - /* end of metadata caps */ - FRAME_WIDTH, - LOSSLESS_FRAME_WIDTH, - SECURE_FRAME_WIDTH, - FRAME_HEIGHT, - LOSSLESS_FRAME_HEIGHT, - SECURE_FRAME_HEIGHT, - PIX_FMTS, - MIN_BUFFERS_INPUT, - MIN_BUFFERS_OUTPUT, - MBPF, - BATCH_MBPF, - BATCH_FPS, - LOSSLESS_MBPF, - SECURE_MBPF, - FRAME_RATE, - OPERATING_RATE, - INPUT_RATE, - TIMESTAMP_RATE, - SCALE_FACTOR, - MB_CYCLES_VSP, - MB_CYCLES_VPP, - MB_CYCLES_LP, - MB_CYCLES_FW, - MB_CYCLES_FW_VPP, - CLIENT_ID, - SECURE_MODE, - FENCE_ID, - FENCE_FD, - TS_REORDER, - HFLIP, - VFLIP, - ROTATION, - SUPER_FRAME, - HEADER_MODE, - PREPEND_SPSPPS_TO_IDR, - WITHOUT_STARTCODE, - NAL_LENGTH_FIELD, - REQUEST_I_FRAME, - BITRATE_MODE, - LOSSLESS, - FRAME_SKIP_MODE, - FRAME_RC_ENABLE, - GOP_CLOSURE, - CSC, - CSC_CUSTOM_MATRIX, - USE_LTR, - MARK_LTR, - BASELAYER_PRIORITY, - IR_TYPE, - AU_DELIMITER, - GRID, - I_FRAME_MIN_QP, - P_FRAME_MIN_QP, - B_FRAME_MIN_QP, - I_FRAME_MAX_QP, - P_FRAME_MAX_QP, - B_FRAME_MAX_QP, - LAYER_TYPE, - LAYER_ENABLE, - L0_BR, - L1_BR, - L2_BR, - L3_BR, - L4_BR, - L5_BR, - LEVEL, - HEVC_TIER, - AV1_TIER, - DISPLAY_DELAY_ENABLE, - DISPLAY_DELAY, - CONCEAL_COLOR_8BIT, - CONCEAL_COLOR_10BIT, - LF_MODE, - LF_ALPHA, - LF_BETA, - SLICE_MAX_BYTES, - SLICE_MAX_MB, - MB_RC, - CHROMA_QP_INDEX_OFFSET, - PIPE, - POC, - CODED_FRAMES, - BIT_DEPTH, - CODEC_CONFIG, - BITSTREAM_SIZE_OVERWRITE, - THUMBNAIL_MODE, - DEFAULT_HEADER, - RAP_FRAME, - SEQ_CHANGE_AT_SYNC_FRAME, - QUALITY_MODE, - PRIORITY, - FIRMWARE_PRIORITY_OFFSET, - CRITICAL_PRIORITY, - RESERVE_DURATION, - DPB_LIST, - FILM_GRAIN, - SUPER_BLOCK, - DRAP, - ENC_IP_CR, - COMPLEXITY, - CABAC_MAX_BITRATE, - CAVLC_MAX_BITRATE, - ALLINTRA_MAX_BITRATE, - LOWLATENCY_MAX_BITRATE, - LAST_FLAG_EVENT_ENABLE, - NUM_COMV, - /* place all root(no parent) enums before this line */ - - PROFILE, - ENH_LAYER_COUNT, - BIT_RATE, - LOWLATENCY_MODE, - GOP_SIZE, - B_FRAME, - ALL_INTRA, - MIN_QUALITY, - CONTENT_ADAPTIVE_CODING, - BLUR_TYPES, - REQUEST_PREPROCESS, - SLICE_MODE, - /* place all intermittent(having both parent and child) enums before this line */ - - MIN_FRAME_QP, - MAX_FRAME_QP, - I_FRAME_QP, - P_FRAME_QP, - B_FRAME_QP, - TIME_DELTA_BASED_RC, - CONSTANT_QUALITY, - VBV_DELAY, - PEAK_BITRATE, - ENTROPY_MODE, - TRANSFORM_8X8, - STAGE, - LTR_COUNT, - IR_PERIOD, - BITRATE_BOOST, - BLUR_RESOLUTION, - OUTPUT_ORDER, - INPUT_BUF_HOST_MAX_COUNT, - OUTPUT_BUF_HOST_MAX_COUNT, - DELIVERY_MODE, - VUI_TIMING_INFO, - SLICE_DECODE, - /* place all leaf(no child) enums before this line */ - INST_CAP_MAX, -}; +enum msm_vidc_inst_capability_type FOREACH_CAP(GENERATE_ENUM); enum msm_vidc_inst_capability_flags { CAP_FLAG_NONE = 0, @@ -927,13 +946,7 @@ struct msm_vidc_input_timer { u64 time_us; }; -enum msm_vidc_allow { - MSM_VIDC_DISALLOW = 0, - MSM_VIDC_ALLOW, - MSM_VIDC_DEFER, - MSM_VIDC_DISCARD, - MSM_VIDC_IGNORE, -}; +enum msm_vidc_allow FOREACH_ALLOW(GENERATE_ENUM); struct msm_vidc_ssr { bool trigger; diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 8283fb0f8a..01761be851 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -50,293 +50,67 @@ extern struct msm_vidc_core *g_core; #define STABILITY_PAYLOAD_ID 0xFFFFFFFF00000000 #define STABILITY_PAYLOAD_SHIFT 32 -struct msm_vidc_cap_name { - enum msm_vidc_inst_capability_type cap_id; - char *name; -}; - /* do not modify the cap names as it is used in test scripts */ -static const struct msm_vidc_cap_name cap_name_arr[] = { - {INST_CAP_NONE, "INST_CAP_NONE" }, - {META_SEQ_HDR_NAL, "META_SEQ_HDR_NAL" }, - {META_BITSTREAM_RESOLUTION, "META_BITSTREAM_RESOLUTION" }, - {META_CROP_OFFSETS, "META_CROP_OFFSETS" }, - {META_DPB_MISR, "META_DPB_MISR" }, - {META_OPB_MISR, "META_OPB_MISR" }, - {META_INTERLACE, "META_INTERLACE" }, - {META_OUTBUF_FENCE, "META_OUTBUF_FENCE" }, - {META_LTR_MARK_USE, "META_LTR_MARK_USE" }, - {META_TIMESTAMP, "META_TIMESTAMP" }, - {META_CONCEALED_MB_CNT, "META_CONCEALED_MB_CNT" }, - {META_HIST_INFO, "META_HIST_INFO" }, - {META_PICTURE_TYPE, "META_PICTURE_TYPE" }, - {META_SEI_MASTERING_DISP, "META_SEI_MASTERING_DISP" }, - {META_SEI_CLL, "META_SEI_CLL" }, - {META_HDR10PLUS, "META_HDR10PLUS" }, - {META_BUF_TAG, "META_BUF_TAG" }, - {META_DPB_TAG_LIST, "META_DPB_TAG_LIST" }, - {META_SUBFRAME_OUTPUT, "META_SUBFRAME_OUTPUT" }, - {META_ENC_QP_METADATA, "META_ENC_QP_METADATA" }, - {META_DEC_QP_METADATA, "META_DEC_QP_METADATA" }, - {META_MAX_NUM_REORDER_FRAMES, "META_MAX_NUM_REORDER_FRAMES"}, - {META_EVA_STATS, "META_EVA_STATS" }, - {META_ROI_INFO, "META_ROI_INFO" }, - {META_SALIENCY_INFO, "META_SALIENCY_INFO" }, - {META_TRANSCODING_STAT_INFO, "META_TRANSCODING_STAT_INFO" }, - {META_DOLBY_RPU, "META_DOLBY_RPU" }, - {FRAME_WIDTH, "FRAME_WIDTH" }, - {LOSSLESS_FRAME_WIDTH, "LOSSLESS_FRAME_WIDTH" }, - {SECURE_FRAME_WIDTH, "SECURE_FRAME_WIDTH" }, - {FRAME_HEIGHT, "FRAME_HEIGHT" }, - {LOSSLESS_FRAME_HEIGHT, "LOSSLESS_FRAME_HEIGHT" }, - {SECURE_FRAME_HEIGHT, "SECURE_FRAME_HEIGHT" }, - {PIX_FMTS, "PIX_FMTS" }, - {MIN_BUFFERS_INPUT, "MIN_BUFFERS_INPUT" }, - {MIN_BUFFERS_OUTPUT, "MIN_BUFFERS_OUTPUT" }, - {MBPF, "MBPF" }, - {BATCH_MBPF, "BATCH_MBPF" }, - {BATCH_FPS, "BATCH_FPS" }, - {LOSSLESS_MBPF, "LOSSLESS_MBPF" }, - {SECURE_MBPF, "SECURE_MBPF" }, - {FRAME_RATE, "FRAME_RATE" }, - {OPERATING_RATE, "OPERATING_RATE" }, - {INPUT_RATE, "INPUT_RATE" }, - {TIMESTAMP_RATE, "TIMESTAMP_RATE" }, - {SCALE_FACTOR, "SCALE_FACTOR" }, - {MB_CYCLES_VSP, "MB_CYCLES_VSP" }, - {MB_CYCLES_VPP, "MB_CYCLES_VPP" }, - {MB_CYCLES_LP, "MB_CYCLES_LP" }, - {MB_CYCLES_FW, "MB_CYCLES_FW" }, - {MB_CYCLES_FW_VPP, "MB_CYCLES_FW_VPP" }, - {CLIENT_ID, "CLIENT_ID" }, - {SECURE_MODE, "SECURE_MODE" }, - {FENCE_ID, "FENCE_ID" }, - {FENCE_FD, "FENCE_FD" }, - {TS_REORDER, "TS_REORDER" }, - {HFLIP, "HFLIP" }, - {VFLIP, "VFLIP" }, - {ROTATION, "ROTATION" }, - {SUPER_FRAME, "SUPER_FRAME" }, - {HEADER_MODE, "HEADER_MODE" }, - {PREPEND_SPSPPS_TO_IDR, "PREPEND_SPSPPS_TO_IDR" }, - {WITHOUT_STARTCODE, "WITHOUT_STARTCODE" }, - {NAL_LENGTH_FIELD, "NAL_LENGTH_FIELD" }, - {REQUEST_I_FRAME, "REQUEST_I_FRAME" }, - {BITRATE_MODE, "BITRATE_MODE" }, - {LOSSLESS, "LOSSLESS" }, - {FRAME_SKIP_MODE, "FRAME_SKIP_MODE" }, - {FRAME_RC_ENABLE, "FRAME_RC_ENABLE" }, - {GOP_CLOSURE, "GOP_CLOSURE" }, - {CSC, "CSC" }, - {CSC_CUSTOM_MATRIX, "CSC_CUSTOM_MATRIX" }, - {USE_LTR, "USE_LTR" }, - {MARK_LTR, "MARK_LTR" }, - {BASELAYER_PRIORITY, "BASELAYER_PRIORITY" }, - {IR_TYPE, "IR_TYPE" }, - {AU_DELIMITER, "AU_DELIMITER" }, - {GRID, "GRID" }, - {I_FRAME_MIN_QP, "I_FRAME_MIN_QP" }, - {P_FRAME_MIN_QP, "P_FRAME_MIN_QP" }, - {B_FRAME_MIN_QP, "B_FRAME_MIN_QP" }, - {I_FRAME_MAX_QP, "I_FRAME_MAX_QP" }, - {P_FRAME_MAX_QP, "P_FRAME_MAX_QP" }, - {B_FRAME_MAX_QP, "B_FRAME_MAX_QP" }, - {LAYER_TYPE, "LAYER_TYPE" }, - {LAYER_ENABLE, "LAYER_ENABLE" }, - {L0_BR, "L0_BR" }, - {L1_BR, "L1_BR" }, - {L2_BR, "L2_BR" }, - {L3_BR, "L3_BR" }, - {L4_BR, "L4_BR" }, - {L5_BR, "L5_BR" }, - {LEVEL, "LEVEL" }, - {HEVC_TIER, "HEVC_TIER" }, - {AV1_TIER, "AV1_TIER" }, - {DISPLAY_DELAY_ENABLE, "DISPLAY_DELAY_ENABLE" }, - {DISPLAY_DELAY, "DISPLAY_DELAY" }, - {CONCEAL_COLOR_8BIT, "CONCEAL_COLOR_8BIT" }, - {CONCEAL_COLOR_10BIT, "CONCEAL_COLOR_10BIT" }, - {LF_MODE, "LF_MODE" }, - {LF_ALPHA, "LF_ALPHA" }, - {LF_BETA, "LF_BETA" }, - {SLICE_MAX_BYTES, "SLICE_MAX_BYTES" }, - {SLICE_MAX_MB, "SLICE_MAX_MB" }, - {MB_RC, "MB_RC" }, - {CHROMA_QP_INDEX_OFFSET, "CHROMA_QP_INDEX_OFFSET" }, - {PIPE, "PIPE" }, - {POC, "POC" }, - {CODED_FRAMES, "CODED_FRAMES" }, - {BIT_DEPTH, "BIT_DEPTH" }, - {CODEC_CONFIG, "CODEC_CONFIG" }, - {BITSTREAM_SIZE_OVERWRITE, "BITSTREAM_SIZE_OVERWRITE" }, - {THUMBNAIL_MODE, "THUMBNAIL_MODE" }, - {DEFAULT_HEADER, "DEFAULT_HEADER" }, - {RAP_FRAME, "RAP_FRAME" }, - {SEQ_CHANGE_AT_SYNC_FRAME, "SEQ_CHANGE_AT_SYNC_FRAME" }, - {QUALITY_MODE, "QUALITY_MODE" }, - {PRIORITY, "PRIORITY" }, - {FIRMWARE_PRIORITY_OFFSET, "FIRMWARE_PRIORITY_OFFSET" }, - {CRITICAL_PRIORITY, "CRITICAL_PRIORITY" }, - {RESERVE_DURATION, "RESERVE_DURATION" }, - {DPB_LIST, "DPB_LIST" }, - {FILM_GRAIN, "FILM_GRAIN" }, - {SUPER_BLOCK, "SUPER_BLOCK" }, - {DRAP, "DRAP" }, - {ENC_IP_CR, "ENC_IP_CR" }, - {COMPLEXITY, "COMPLEXITY" }, - {CABAC_MAX_BITRATE, "CABAC_MAX_BITRATE" }, - {CAVLC_MAX_BITRATE, "CAVLC_MAX_BITRATE" }, - {ALLINTRA_MAX_BITRATE, "ALLINTRA_MAX_BITRATE" }, - {LOWLATENCY_MAX_BITRATE, "LOWLATENCY_MAX_BITRATE" }, - {LAST_FLAG_EVENT_ENABLE, "LAST_FLAG_EVENT_ENABLE" }, - {NUM_COMV, "NUM_COMV" }, - {PROFILE, "PROFILE" }, - {ENH_LAYER_COUNT, "ENH_LAYER_COUNT" }, - {BIT_RATE, "BIT_RATE" }, - {LOWLATENCY_MODE, "LOWLATENCY_MODE" }, - {GOP_SIZE, "GOP_SIZE" }, - {B_FRAME, "B_FRAME" }, - {ALL_INTRA, "ALL_INTRA" }, - {MIN_QUALITY, "MIN_QUALITY" }, - {CONTENT_ADAPTIVE_CODING, "CONTENT_ADAPTIVE_CODING" }, - {BLUR_TYPES, "BLUR_TYPES" }, - {REQUEST_PREPROCESS, "REQUEST_PREPROCESS" }, - {SLICE_MODE, "SLICE_MODE" }, - {MIN_FRAME_QP, "MIN_FRAME_QP" }, - {MAX_FRAME_QP, "MAX_FRAME_QP" }, - {I_FRAME_QP, "I_FRAME_QP" }, - {P_FRAME_QP, "P_FRAME_QP" }, - {B_FRAME_QP, "B_FRAME_QP" }, - {TIME_DELTA_BASED_RC, "TIME_DELTA_BASED_RC" }, - {CONSTANT_QUALITY, "CONSTANT_QUALITY" }, - {VBV_DELAY, "VBV_DELAY" }, - {PEAK_BITRATE, "PEAK_BITRATE" }, - {ENTROPY_MODE, "ENTROPY_MODE" }, - {TRANSFORM_8X8, "TRANSFORM_8X8" }, - {STAGE, "STAGE" }, - {LTR_COUNT, "LTR_COUNT" }, - {IR_PERIOD, "IR_PERIOD" }, - {BITRATE_BOOST, "BITRATE_BOOST" }, - {BLUR_RESOLUTION, "BLUR_RESOLUTION" }, - {OUTPUT_ORDER, "OUTPUT_ORDER" }, - {INPUT_BUF_HOST_MAX_COUNT, "INPUT_BUF_HOST_MAX_COUNT" }, - {OUTPUT_BUF_HOST_MAX_COUNT, "OUTPUT_BUF_HOST_MAX_COUNT" }, - {DELIVERY_MODE, "DELIVERY_MODE" }, - {VUI_TIMING_INFO, "VUI_TIMING_INFO" }, - {SLICE_DECODE, "SLICE_DECODE" }, - {INST_CAP_MAX, "INST_CAP_MAX" }, -}; +static const char * const cap_name_arr[] = + FOREACH_CAP(GENERATE_STRING); const char *cap_name(enum msm_vidc_inst_capability_type cap_id) { const char *name = "UNKNOWN CAP"; - if (cap_id > ARRAY_SIZE(cap_name_arr)) + if (cap_id >= ARRAY_SIZE(cap_name_arr)) goto exit; - if (cap_name_arr[cap_id].cap_id != cap_id) - goto exit; - - name = cap_name_arr[cap_id].name; + name = cap_name_arr[cap_id]; exit: return name; } -struct msm_vidc_buf_type_name { - enum msm_vidc_buffer_type type; - char *name; -}; - -static const struct msm_vidc_buf_type_name buf_type_name_arr[] = { - {MSM_VIDC_BUF_INPUT, "INPUT" }, - {MSM_VIDC_BUF_OUTPUT, "OUTPUT" }, - {MSM_VIDC_BUF_INPUT_META, "INPUT_META" }, - {MSM_VIDC_BUF_OUTPUT_META, "OUTPUT_META" }, - {MSM_VIDC_BUF_READ_ONLY, "READ_ONLY" }, - {MSM_VIDC_BUF_QUEUE, "QUEUE" }, - {MSM_VIDC_BUF_BIN, "BIN" }, - {MSM_VIDC_BUF_ARP, "ARP" }, - {MSM_VIDC_BUF_COMV, "COMV" }, - {MSM_VIDC_BUF_NON_COMV, "NON_COMV" }, - {MSM_VIDC_BUF_LINE, "LINE" }, - {MSM_VIDC_BUF_DPB, "DPB" }, - {MSM_VIDC_BUF_PERSIST, "PERSIST" }, - {MSM_VIDC_BUF_VPSS, "VPSS" }, - {MSM_VIDC_BUF_PARTIAL_DATA, "PARTIAL_DATA" }, -}; +static const char * const buf_type_name_arr[] = + FOREACH_BUF_TYPE(GENERATE_STRING); const char *buf_name(enum msm_vidc_buffer_type type) { const char *name = "UNKNOWN BUF"; - if (!type || type > ARRAY_SIZE(buf_type_name_arr)) + if (type >= ARRAY_SIZE(buf_type_name_arr)) goto exit; - if (buf_type_name_arr[type - 1].type != type) - goto exit; - - name = buf_type_name_arr[type - 1].name; + name = buf_type_name_arr[type]; exit: return name; } -struct msm_vidc_allow_name { - enum msm_vidc_allow allow; - char *name; -}; - -static const struct msm_vidc_allow_name inst_allow_name_arr[] = { - {MSM_VIDC_DISALLOW, "MSM_VIDC_DISALLOW" }, - {MSM_VIDC_ALLOW, "MSM_VIDC_ALLOW" }, - {MSM_VIDC_DEFER, "MSM_VIDC_DEFER" }, - {MSM_VIDC_DISCARD, "MSM_VIDC_DISCARD" }, - {MSM_VIDC_IGNORE, "MSM_VIDC_IGNORE" }, -}; +static const char * const inst_allow_name_arr[] = + FOREACH_ALLOW(GENERATE_STRING); const char *allow_name(enum msm_vidc_allow allow) { const char *name = "UNKNOWN"; - if (allow > ARRAY_SIZE(inst_allow_name_arr)) + if (allow >= ARRAY_SIZE(inst_allow_name_arr)) goto exit; - if (inst_allow_name_arr[allow].allow != allow) - goto exit; - - name = inst_allow_name_arr[allow].name; + name = inst_allow_name_arr[allow]; exit: return name; } -struct msm_vidc_state_name { - enum msm_vidc_state state; - char *name; -}; - /* do not modify the state names as it is used in test scripts */ -static const struct msm_vidc_state_name state_name_arr[] = { - {MSM_VIDC_OPEN, "OPEN" }, - {MSM_VIDC_INPUT_STREAMING, "INPUT_STREAMING" }, - {MSM_VIDC_OUTPUT_STREAMING, "OUTPUT_STREAMING" }, - {MSM_VIDC_STREAMING, "STREAMING" }, - {MSM_VIDC_CLOSE, "CLOSE" }, - {MSM_VIDC_ERROR, "ERROR" }, -}; +static const char * const state_name_arr[] = + FOREACH_STATE(GENERATE_STRING); const char *state_name(enum msm_vidc_state state) { const char *name = "UNKNOWN STATE"; - if (!state || state > ARRAY_SIZE(state_name_arr)) + if (state >= ARRAY_SIZE(state_name_arr)) goto exit; - if (state_name_arr[state - 1].state != state) - goto exit; - - name = state_name_arr[state - 1].name; + name = state_name_arr[state]; exit: return name; @@ -356,16 +130,8 @@ const char *sub_state_name(enum msm_vidc_sub_state sub_state) return "SUB_STATE_NONE"; } -struct msm_vidc_core_state_name { - enum msm_vidc_core_state state; - char *name; -}; - -static const struct msm_vidc_core_state_name core_state_name_arr[] = { - {MSM_VIDC_CORE_DEINIT, "CORE_DEINIT" }, - {MSM_VIDC_CORE_INIT_WAIT, "CORE_INIT_WAIT" }, - {MSM_VIDC_CORE_INIT, "CORE_INIT" }, -}; +static const char * const core_state_name_arr[] = + FOREACH_CORE_STATE(GENERATE_STRING); const char *core_state_name(enum msm_vidc_core_state state) { @@ -374,10 +140,7 @@ const char *core_state_name(enum msm_vidc_core_state state) if (state >= ARRAY_SIZE(core_state_name_arr)) goto exit; - if (core_state_name_arr[state].state != state) - goto exit; - - name = core_state_name_arr[state].name; + name = core_state_name_arr[state]; exit: return name; @@ -5057,13 +4820,13 @@ int msm_vidc_print_buffer_info(struct msm_vidc_inst *inst) } /* Print buffer details */ - for (i = 0; i < ARRAY_SIZE(buf_type_name_arr); i++) { - buffers = msm_vidc_get_buffers(inst, buf_type_name_arr[i].type, __func__); + for (i = 1; i < ARRAY_SIZE(buf_type_name_arr); i++) { + buffers = msm_vidc_get_buffers(inst, i, __func__); if (!buffers) continue; i_vpr_h(inst, "buf: type: %11s, count %2d, extra %2d, actual %2d, size %9u\n", - buf_type_name_arr[i].name, buffers->min_count, + buf_name(i), buffers->min_count, buffers->extra_count, buffers->actual_count, buffers->size); } @@ -5105,13 +4868,13 @@ int msm_vidc_print_inst_info(struct msm_vidc_inst *inst) frame_rate, bit_rate, bit_depth); /* Print buffer details */ - for (i = 0; i < ARRAY_SIZE(buf_type_name_arr); i++) { - buffers = msm_vidc_get_buffers(inst, buf_type_name_arr[i].type, __func__); + for (i = 1; i < ARRAY_SIZE(buf_type_name_arr); i++) { + buffers = msm_vidc_get_buffers(inst, i, __func__); if (!buffers) continue; i_vpr_e(inst, "count: type: %11s, min: %2d, extra: %2d, actual: %2d\n", - buf_type_name_arr[i].name, buffers->min_count, + buf_name(i), buffers->min_count, buffers->extra_count, buffers->actual_count); list_for_each_entry(buf, &buffers->list, list) { @@ -5127,7 +4890,7 @@ int msm_vidc_print_inst_info(struct msm_vidc_inst *inst) } i_vpr_e(inst, "buf: type: %11s, index: %2d, fd: %4d, size: %9u, off: %8u, filled: %9u, daddr: %#llx, inode: %8lu, ref: %2ld, flags: %8x, ts: %16lld, attr: %8x\n", - buf_type_name_arr[i].name, buf->index, buf->fd, buf->buffer_size, + buf_name(i), buf->index, buf->fd, buf->buffer_size, buf->data_offset, buf->data_size, buf->device_addr, inode_num, ref_count, buf->flags, buf->timestamp, buf->attr); } From 2113a7a8c566879ea40901b63dc8ff3742a03b02 Mon Sep 17 00:00:00 2001 From: Deepa Guthyappa Madivalara Date: Fri, 18 Nov 2022 16:19:18 -0800 Subject: [PATCH 0767/1061] video: driver: add support for vidvsp cache Adding support for vidvsp cache Change-Id: I0ef58106a9a5eab55ab01e4eaaf77d19d9b3a984 Signed-off-by: Deepa Guthyappa Madivalara --- driver/platform/pineapple/src/msm_vidc_pineapple.c | 1 + 1 file changed, 1 insertion(+) diff --git a/driver/platform/pineapple/src/msm_vidc_pineapple.c b/driver/platform/pineapple/src/msm_vidc_pineapple.c index 7933e0debb..9a06d01a6f 100644 --- a/driver/platform/pineapple/src/msm_vidc_pineapple.c +++ b/driver/platform/pineapple/src/msm_vidc_pineapple.c @@ -2637,6 +2637,7 @@ static const struct clk_rst_table pineapple_clk_reset_table[] = { /* name, llcc_id */ static const struct subcache_table pineapple_subcache_table[] = { { "vidsc0", LLCC_VIDSC0 }, + { "vidvsp", LLCC_VIDVSP }, }; /* name, start, size, secure, dma_coherant */ From 8030903f1e504050e5745e889d7ec256edca6edb Mon Sep 17 00:00:00 2001 From: Dikshita Agarwal Date: Fri, 4 Nov 2022 12:46:35 +0530 Subject: [PATCH 0768/1061] video: driver: add dma mask attribute to context banks Upstream driver doesn't support context bank address ranges, so add dma mask attribute to context bank to specify address range for upstream driver. Change-Id: I09191b500006d6c7abf364fbfa22377b480a4b4d Signed-off-by: Dikshita Agarwal --- driver/platform/anorak/src/msm_vidc_anorak.c | 12 ++++++------ .../platform/common/inc/msm_vidc_platform.h | 1 + driver/platform/kalama/src/msm_vidc_kalama.c | 12 ++++++------ .../pineapple/src/msm_vidc_pineapple.c | 12 ++++++------ driver/vidc/inc/resources.h | 1 + driver/vidc/src/msm_vidc_probe.c | 19 ++++++++++++++----- driver/vidc/src/resources.c | 6 ++++-- 7 files changed, 38 insertions(+), 25 deletions(-) diff --git a/driver/platform/anorak/src/msm_vidc_anorak.c b/driver/platform/anorak/src/msm_vidc_anorak.c index 32f9c5d943..42f63784f7 100644 --- a/driver/platform/anorak/src/msm_vidc_anorak.c +++ b/driver/platform/anorak/src/msm_vidc_anorak.c @@ -2451,13 +2451,13 @@ static const struct subcache_table anorak_subcache_table[] = { { "vidvsp", LLCC_VIDVSP }, }; -/* name, start, size, secure, dma_coherant, region */ +/* name, start, size, secure, dma_coherant, region, dma_mask */ const struct context_bank_table anorak_context_bank_table[] = { - {"qcom,vidc,cb-ns", 0x25800000, 0xba800000, 0, 1, MSM_VIDC_NON_SECURE }, - {"qcom,vidc,cb-ns-pxl", 0x00100000, 0xdff00000, 0, 1, MSM_VIDC_NON_SECURE_PIXEL }, - {"qcom,vidc,cb-sec-pxl", 0x00500000, 0xdfb00000, 1, 0, MSM_VIDC_SECURE_PIXEL }, - {"qcom,vidc,cb-sec-non-pxl", 0x01000000, 0x24800000, 1, 0, MSM_VIDC_SECURE_NONPIXEL }, - {"qcom,vidc,cb-sec-bitstream", 0x00500000, 0xdfb00000, 1, 0, MSM_VIDC_SECURE_BITSTREAM }, + {"qcom,vidc,cb-ns", 0x25800000, 0xba800000, 0, 1, MSM_VIDC_NON_SECURE, 0 }, + {"qcom,vidc,cb-ns-pxl", 0x00100000, 0xdff00000, 0, 1, MSM_VIDC_NON_SECURE_PIXEL, 0 }, + {"qcom,vidc,cb-sec-pxl", 0x00500000, 0xdfb00000, 1, 0, MSM_VIDC_SECURE_PIXEL, 0 }, + {"qcom,vidc,cb-sec-non-pxl", 0x01000000, 0x24800000, 1, 0, MSM_VIDC_SECURE_NONPIXEL, 0 }, + {"qcom,vidc,cb-sec-bitstream", 0x00500000, 0xdfb00000, 1, 0, MSM_VIDC_SECURE_BITSTREAM, 0 }, }; /* freq */ diff --git a/driver/platform/common/inc/msm_vidc_platform.h b/driver/platform/common/inc/msm_vidc_platform.h index 6a913d9fd0..30fe32be26 100644 --- a/driver/platform/common/inc/msm_vidc_platform.h +++ b/driver/platform/common/inc/msm_vidc_platform.h @@ -74,6 +74,7 @@ struct context_bank_table { bool secure; bool dma_coherant; u32 region; + u64 dma_mask; }; struct freq_table { diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index 2e71ca1251..d4c7ae4ff9 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -2662,13 +2662,13 @@ static const struct subcache_table kalama_subcache_table[] = { { "vidvsp", LLCC_VIDVSP }, }; -/* name, start, size, secure, dma_coherant, region */ +/* name, start, size, secure, dma_coherant, region, dma_mask */ const struct context_bank_table kalama_context_bank_table[] = { - {"qcom,vidc,cb-ns", 0x25800000, 0xba800000, 0, 1, MSM_VIDC_NON_SECURE }, - {"qcom,vidc,cb-ns-pxl", 0x00100000, 0xdff00000, 0, 1, MSM_VIDC_NON_SECURE_PIXEL }, - {"qcom,vidc,cb-sec-pxl", 0x00500000, 0xdfb00000, 1, 0, MSM_VIDC_SECURE_PIXEL }, - {"qcom,vidc,cb-sec-non-pxl", 0x01000000, 0x24800000, 1, 0, MSM_VIDC_SECURE_NONPIXEL }, - {"qcom,vidc,cb-sec-bitstream", 0x00500000, 0xdfb00000, 1, 0, MSM_VIDC_SECURE_BITSTREAM }, + {"qcom,vidc,cb-ns", 0x25800000, 0xba800000, 0, 1, MSM_VIDC_NON_SECURE, 0 }, + {"qcom,vidc,cb-ns-pxl", 0x00100000, 0xdff00000, 0, 1, MSM_VIDC_NON_SECURE_PIXEL, 0 }, + {"qcom,vidc,cb-sec-pxl", 0x00500000, 0xdfb00000, 1, 0, MSM_VIDC_SECURE_PIXEL, 0 }, + {"qcom,vidc,cb-sec-non-pxl", 0x01000000, 0x24800000, 1, 0, MSM_VIDC_SECURE_NONPIXEL, 0 }, + {"qcom,vidc,cb-sec-bitstream", 0x00500000, 0xdfb00000, 1, 0, MSM_VIDC_SECURE_BITSTREAM, 0 }, }; /* freq */ diff --git a/driver/platform/pineapple/src/msm_vidc_pineapple.c b/driver/platform/pineapple/src/msm_vidc_pineapple.c index 3f79e6604c..94825e2a00 100644 --- a/driver/platform/pineapple/src/msm_vidc_pineapple.c +++ b/driver/platform/pineapple/src/msm_vidc_pineapple.c @@ -2662,13 +2662,13 @@ static const struct subcache_table pineapple_subcache_table[] = { { "vidsc0", LLCC_VIDSC0 }, }; -/* name, start, size, secure, dma_coherant */ +/* name, start, size, secure, dma_coherant, region, dma_mask */ const struct context_bank_table pineapple_context_bank_table[] = { - {"qcom,vidc,cb-ns", 0x25800000, 0xba800000, 0, 1, MSM_VIDC_NON_SECURE }, - {"qcom,vidc,cb-ns-pxl", 0x00100000, 0xdff00000, 0, 1, MSM_VIDC_NON_SECURE_PIXEL }, - {"qcom,vidc,cb-sec-pxl", 0x00500000, 0xdfb00000, 1, 0, MSM_VIDC_SECURE_PIXEL }, - {"qcom,vidc,cb-sec-non-pxl", 0x01000000, 0x24800000, 1, 0, MSM_VIDC_SECURE_NONPIXEL }, - {"qcom,vidc,cb-sec-bitstream", 0x00500000, 0xdfb00000, 1, 0, MSM_VIDC_SECURE_BITSTREAM }, + {"qcom,vidc,cb-ns", 0x25800000, 0xba800000, 0, 1, MSM_VIDC_NON_SECURE, 0 }, + {"qcom,vidc,cb-ns-pxl", 0x00100000, 0xdff00000, 0, 1, MSM_VIDC_NON_SECURE_PIXEL, 0 }, + {"qcom,vidc,cb-sec-pxl", 0x00500000, 0xdfb00000, 1, 0, MSM_VIDC_SECURE_PIXEL, 0 }, + {"qcom,vidc,cb-sec-non-pxl", 0x01000000, 0x24800000, 1, 0, MSM_VIDC_SECURE_NONPIXEL, 0 }, + {"qcom,vidc,cb-sec-bitstream", 0x00500000, 0xdfb00000, 1, 0, MSM_VIDC_SECURE_BITSTREAM, 0 }, }; /* freq */ diff --git a/driver/vidc/inc/resources.h b/driver/vidc/inc/resources.h index e24ccc0b80..ca51f945b7 100644 --- a/driver/vidc/inc/resources.h +++ b/driver/vidc/inc/resources.h @@ -167,6 +167,7 @@ struct context_bank_info { struct device *dev; struct iommu_domain *domain; u32 region; + u64 dma_mask; }; struct context_bank_set { diff --git a/driver/vidc/src/msm_vidc_probe.c b/driver/vidc/src/msm_vidc_probe.c index 01cfa57626..ddb4548d2d 100644 --- a/driver/vidc/src/msm_vidc_probe.c +++ b/driver/vidc/src/msm_vidc_probe.c @@ -376,6 +376,14 @@ static int msm_vidc_setup_context_bank(struct msm_vidc_core *core, cb->dev = dev; cb->domain = iommu_get_domain_for_dev(cb->dev); + if (cb->dma_mask) { + rc = dma_set_mask_and_coherent(cb->dev, cb->dma_mask); + if (rc) { + d_vpr_e("%s: dma_set_mask_and_coherent failed\n", __func__); + return rc; + } + } + /* * When memory is fragmented, below configuration increases the * possibility to get a mapping for buffer in the configured CB. @@ -401,10 +409,11 @@ static int msm_vidc_setup_context_bank(struct msm_vidc_core *core, msm_vidc_smmu_fault_handler, (void *)core); d_vpr_h( - "%s: name %s addr start %x size %x secure %d dma_coherant %d region %d dev_name %s domain %pK\n", + "%s: name %s addr start %x size %x secure %d dma_coherant %d " + "region %d dev_name %s domain %pK dma_mask %llu\n", __func__, cb->name, cb->addr_range.start, cb->addr_range.size, cb->secure, cb->dma_coherant, - cb->region, dev_name(cb->dev), cb->domain); + cb->region, dev_name(cb->dev), cb->domain, cb->dma_mask); return rc; } @@ -610,7 +619,7 @@ static int msm_vidc_probe_video_device(struct platform_device *pdev) struct component_match *match = NULL; struct msm_vidc_core *core = NULL; struct device_node *child = NULL; - int sub_device_count = 0, nr = BASE_DEVICE_NUMBER; + int sub_node_count = 0, nr = BASE_DEVICE_NUMBER; d_vpr_h("%s: %s\n", __func__, dev_name(&pdev->dev)); @@ -709,7 +718,7 @@ static int msm_vidc_probe_video_device(struct platform_device *pdev) /* registering sub-device with component model framework */ for_each_available_child_of_node(pdev->dev.of_node, child) { - sub_device_count++; + sub_node_count++; of_node_get(child); component_match_add_release(&pdev->dev, &match, msm_vidc_component_release_of, msm_vidc_component_compare_of, child); @@ -721,7 +730,7 @@ static int msm_vidc_probe_video_device(struct platform_device *pdev) } } - d_vpr_h("populating sub devices. count %d\n", sub_device_count); + d_vpr_h("populating sub devices. count %d\n", sub_node_count); /* * Trigger probe for each sub-device i.e. qcom,msm-vidc,context-bank. * When msm_vidc_probe is called for each sub-device, parse the diff --git a/driver/vidc/src/resources.c b/driver/vidc/src/resources.c index 070aa2d679..5c2215bfc7 100644 --- a/driver/vidc/src/resources.c +++ b/driver/vidc/src/resources.c @@ -554,14 +554,16 @@ static int __init_context_banks(struct msm_vidc_core *core) cbs->context_bank_tbl[cnt].secure = cb_tbl[cnt].secure; cbs->context_bank_tbl[cnt].dma_coherant = cb_tbl[cnt].dma_coherant; cbs->context_bank_tbl[cnt].region = cb_tbl[cnt].region; + cbs->context_bank_tbl[cnt].dma_mask = cb_tbl[cnt].dma_mask; } /* print context_bank fiels */ venus_hfi_for_each_context_bank(core, cbinfo) { - d_vpr_h("%s: name %s addr start %#x size %#x secure %d coherant %d region %d\n", + d_vpr_h("%s: name %s addr start %#x size %#x secure %d " + "coherant %d region %d dma_mask %llu\n", __func__, cbinfo->name, cbinfo->addr_range.start, cbinfo->addr_range.size, cbinfo->secure, - cbinfo->dma_coherant, cbinfo->region); + cbinfo->dma_coherant, cbinfo->region, cbinfo->dma_mask); } return rc; From 1df215f203ae089b5bb05bca927bc124686ff411 Mon Sep 17 00:00:00 2001 From: Ankush Mitra Date: Mon, 21 Nov 2022 17:00:02 +0530 Subject: [PATCH 0769/1061] video: driver: Move adjust/set control functions to common/platform.c Move adjust/set control functions to common/platform.c as part of upstream effort. This is part 1 of the change. Change-Id: I8c440740fe785b5b052c4d44963ea34c21419fa4 Signed-off-by: Ankush Mitra --- .../platform/common/inc/msm_vidc_platform.h | 124 + .../platform/common/src/msm_vidc_platform.c | 3362 ++++++++++++++++- .../variant/iris2/src/msm_vidc_buffer_iris2.c | 2 +- driver/variant/iris2/src/msm_vidc_iris2.c | 3 +- .../variant/iris3/src/msm_vidc_buffer_iris3.c | 2 +- driver/variant/iris3/src/msm_vidc_iris3.c | 2 +- .../iris33/src/msm_vidc_buffer_iris33.c | 2 +- driver/variant/iris33/src/msm_vidc_iris33.c | 2 +- driver/vidc/inc/msm_vidc_control.h | 121 +- driver/vidc/src/msm_vdec.c | 2 +- driver/vidc/src/msm_venc.c | 1 + driver/vidc/src/msm_vidc_control.c | 3349 ---------------- driver/vidc/src/msm_vidc_control_ext.c | 1 + driver/vidc/src/venus_hfi_response.c | 1 - 14 files changed, 3495 insertions(+), 3479 deletions(-) diff --git a/driver/platform/common/inc/msm_vidc_platform.h b/driver/platform/common/inc/msm_vidc_platform.h index 6a913d9fd0..bf987b34e5 100644 --- a/driver/platform/common/inc/msm_vidc_platform.h +++ b/driver/platform/common/inc/msm_vidc_platform.h @@ -237,4 +237,128 @@ static inline bool is_regulator_supported(struct msm_vidc_core *core) int msm_vidc_init_platform(struct platform_device *pdev); int msm_vidc_deinit_platform(struct platform_device *pdev); +/* control framework support functions */ + +enum msm_vidc_inst_capability_type msm_vidc_get_cap_id( + struct msm_vidc_inst *inst, u32 id); +int msm_vidc_update_cap_value(struct msm_vidc_inst *inst, u32 cap, + s32 adjusted_val, const char *func); +bool is_parent_available(struct msm_vidc_inst *inst, + u32 cap_id, u32 check_parent, const char *func); +int msm_vidc_get_parent_value(struct msm_vidc_inst *inst, u32 cap, u32 parent, + s32 *value, const char *func); +u32 msm_vidc_get_port_info(struct msm_vidc_inst *inst, + enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_v4l2_menu_to_hfi(struct msm_vidc_inst *inst, + enum msm_vidc_inst_capability_type cap_id, u32 *value); +int msm_vidc_v4l2_to_hfi_enum(struct msm_vidc_inst *inst, + enum msm_vidc_inst_capability_type cap_id, u32 *value); +int msm_vidc_packetize_control(struct msm_vidc_inst *inst, + enum msm_vidc_inst_capability_type cap_id, u32 payload_type, + void *hfi_val, u32 payload_size, const char *func); + +int msm_vidc_adjust_bitrate(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_dynamic_layer_bitrate(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_bitrate_mode(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_entropy_mode(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_profile(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_ltr_count(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_use_ltr(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_mark_ltr(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_delta_based_rc(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_output_order(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_input_buf_host_max_count(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_output_buf_host_max_count(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_transform_8x8(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_chroma_qp_index_offset(void *instance, + struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_slice_count(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_layer_count(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_gop_size(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_b_frame(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_peak_bitrate(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_hevc_min_qp(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_hevc_max_qp(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_hevc_i_frame_qp(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_hevc_p_frame_qp(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_hevc_b_frame_qp(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_blur_type(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_blur_resolution(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_brs(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_bitrate_boost(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_min_quality(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_enc_lowlatency_mode(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_dec_lowlatency_mode(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_session_priority(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_roi_info(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_all_intra(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_dec_outbuf_fence(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_dec_slice_mode(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_preprocess(void *instance, struct v4l2_ctrl *ctrl); + +int msm_vidc_set_header_mode(void *instance, + enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_deblock_mode(void *instance, + enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_min_qp(void *instance, + enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_max_qp(void *instance, + enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_frame_qp(void *instance, + enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_req_sync_frame(void *instance, + enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_chroma_qp_index_offset(void *instance, + enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_slice_count(void *instance, + enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_layer_count_and_type(void *instance, + enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_gop_size(void *instance, + enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_bitrate(void *instance, + enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_dynamic_layer_bitrate(void *instance, + enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_u32(void *instance, + enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_u32_packed(void *instance, + enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_u32_enum(void *instance, + enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_constant_quality(void *instance, + enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_vbr_related_properties( + void *instance, enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_cbr_related_properties(void *instance, + enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_use_and_mark_ltr(void *instance, + enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_nal_length(void *instance, + enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_session_priority(void *instance, + enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_flip(void *instance, + enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_rotation(void *instance, + enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_blur_resolution(void *instance, + enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_stage(void *instance, + enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_pipe(void *instance, + enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_csc_custom_matrix(void *instance, + enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_level(void *instance, + enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_preprocess(void *instance, + enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_reserve_duration(void *instance, + enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_q16(void *instance, + enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_vui_timing_info(void *instance, + enum msm_vidc_inst_capability_type cap_id); + #endif // _MSM_VIDC_PLATFORM_H_ diff --git a/driver/platform/common/src/msm_vidc_platform.c b/driver/platform/common/src/msm_vidc_platform.c index a0a6b8fca5..d2074faa18 100644 --- a/driver/platform/common/src/msm_vidc_platform.c +++ b/driver/platform/common/src/msm_vidc_platform.c @@ -11,11 +11,15 @@ #include "msm_vidc_debug.h" #include "msm_vidc_v4l2.h" #include "msm_vidc_vb2.h" -#include "msm_vidc_control.h" #include "msm_vidc_core.h" #include "msm_vidc_debug.h" #include "msm_vidc_internal.h" #include "msm_vidc_memory.h" +#include "hfi_packet.h" +#include "hfi_property.h" +#include "venus_hfi.h" +#include "msm_vidc_control.h" +#include "msm_vidc_driver.h" #if defined(CONFIG_MSM_VIDC_WAIPIO) #include "msm_vidc_waipio.h" @@ -38,6 +42,12 @@ #if defined(CONFIG_MSM_VIDC_IRIS33) #include "msm_vidc_iris33.h" #endif + +#define CAP_TO_8BIT_QP(a) { \ + if ((a) < MIN_QP_8BIT) \ + (a) = MIN_QP_8BIT; \ +} + /* * Custom conversion coefficients for resolution: 176x144 negative * coeffs are converted to s4.9 format @@ -449,3 +459,3353 @@ int msm_vidc_init_platform(struct platform_device *pdev) return rc; } + +/****************** control framework utility functions **********************/ + +enum msm_vidc_inst_capability_type msm_vidc_get_cap_id( + struct msm_vidc_inst *inst, u32 id) +{ + enum msm_vidc_inst_capability_type i = INST_CAP_NONE + 1; + struct msm_vidc_inst_capability *capability; + enum msm_vidc_inst_capability_type cap_id = INST_CAP_NONE; + + capability = inst->capabilities; + do { + if (capability->cap[i].v4l2_id == id) { + cap_id = capability->cap[i].cap_id; + break; + } + i++; + } while (i < INST_CAP_MAX); + + return cap_id; +} + +int msm_vidc_update_cap_value(struct msm_vidc_inst *inst, u32 cap_id, + s32 adjusted_val, const char *func) +{ + int prev_value = 0; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + prev_value = inst->capabilities->cap[cap_id].value; + + if (is_meta_cap(inst, cap_id)) { + /* + * cumulative control value if client set same metadata + * control multiple times. + */ + if (adjusted_val & MSM_VIDC_META_ENABLE) { + /* enable metadata */ + inst->capabilities->cap[cap_id].value |= adjusted_val; + } else { + /* disable metadata */ + inst->capabilities->cap[cap_id].value &= ~adjusted_val; + } + } else { + inst->capabilities->cap[cap_id].value = adjusted_val; + } + + if (prev_value != inst->capabilities->cap[cap_id].value) { + i_vpr_h(inst, + "%s: updated database: name: %s, value: %#x -> %#x\n", + func, cap_name(cap_id), + prev_value, inst->capabilities->cap[cap_id].value); + } + + return 0; +} + +bool is_parent_available(struct msm_vidc_inst *inst, + u32 cap_id, u32 check_parent, const char *func) +{ + int i = 0; + u32 cap_parent; + + while (i < MAX_CAP_PARENTS && + inst->capabilities->cap[cap_id].parents[i]) { + cap_parent = inst->capabilities->cap[cap_id].parents[i]; + if (cap_parent == check_parent) + return true; + i++; + } + + i_vpr_e(inst, + "%s: missing parent %s for %s\n", + func, cap_name(check_parent), cap_name(cap_id)); + return false; +} + +int msm_vidc_get_parent_value(struct msm_vidc_inst *inst, + u32 cap_id, u32 parent, s32 *value, const char *func) +{ + int rc = 0; + + if (is_parent_available(inst, cap_id, parent, func)) { + switch (parent) { + case BITRATE_MODE: + *value = inst->hfi_rc_type; + break; + case LAYER_TYPE: + *value = inst->hfi_layer_type; + break; + default: + *value = inst->capabilities->cap[parent].value; + break; + } + } else { + rc = -EINVAL; + } + + return rc; +} + +u32 msm_vidc_get_port_info(struct msm_vidc_inst *inst, + enum msm_vidc_inst_capability_type cap_id) +{ + struct msm_vidc_inst_capability *capability = inst->capabilities; + + if (capability->cap[cap_id].flags & CAP_FLAG_INPUT_PORT && + capability->cap[cap_id].flags & CAP_FLAG_OUTPUT_PORT) { + if (inst->bufq[OUTPUT_PORT].vb2q->streaming) + return get_hfi_port(inst, INPUT_PORT); + else + return get_hfi_port(inst, OUTPUT_PORT); + } + + if (capability->cap[cap_id].flags & CAP_FLAG_INPUT_PORT) + return get_hfi_port(inst, INPUT_PORT); + else if (capability->cap[cap_id].flags & CAP_FLAG_OUTPUT_PORT) + return get_hfi_port(inst, OUTPUT_PORT); + else + return HFI_PORT_NONE; +} + +int msm_vidc_v4l2_menu_to_hfi(struct msm_vidc_inst *inst, + enum msm_vidc_inst_capability_type cap_id, u32 *value) +{ + struct msm_vidc_inst_capability *capability = inst->capabilities; + + switch (cap_id) { + case ENTROPY_MODE: + switch (capability->cap[cap_id].value) { + case V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC: + *value = 1; + break; + case V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC: + *value = 0; + break; + default: + *value = 1; + goto set_default; + } + return 0; + default: + i_vpr_e(inst, + "%s: mapping not specified for ctrl_id: %#x\n", + __func__, capability->cap[cap_id].v4l2_id); + return -EINVAL; + } + +set_default: + i_vpr_e(inst, + "%s: invalid value %d for ctrl id: %#x. Set default: %u\n", + __func__, capability->cap[cap_id].value, + capability->cap[cap_id].v4l2_id, *value); + return 0; +} + +int msm_vidc_v4l2_to_hfi_enum(struct msm_vidc_inst *inst, + enum msm_vidc_inst_capability_type cap_id, u32 *value) +{ + struct msm_vidc_inst_capability *capability = inst->capabilities; + + switch (cap_id) { + case BITRATE_MODE: + *value = inst->hfi_rc_type; + return 0; + case PROFILE: + case LEVEL: + case HEVC_TIER: + case AV1_TIER: + case BLUR_TYPES: + *value = capability->cap[cap_id].value; + return 0; + case LAYER_TYPE: + if (inst->codec == MSM_VIDC_HEVC) { + switch (capability->cap[cap_id].value) { + case V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B: + *value = HFI_HIER_B; + break; + case V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P: + //TODO (AS): check if this is right mapping + *value = HFI_HIER_P_SLIDING_WINDOW; + break; + default: + *value = HFI_HIER_P_SLIDING_WINDOW; + goto set_default; + } + } + return 0; + case ROTATION: + switch (capability->cap[cap_id].value) { + case 0: + *value = HFI_ROTATION_NONE; + break; + case 90: + *value = HFI_ROTATION_90; + break; + case 180: + *value = HFI_ROTATION_180; + break; + case 270: + *value = HFI_ROTATION_270; + break; + default: + *value = HFI_ROTATION_NONE; + goto set_default; + } + return 0; + case LF_MODE: + if (inst->codec == MSM_VIDC_HEVC) { + switch (capability->cap[cap_id].value) { + case V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_ENABLED: + *value = HFI_DEBLOCK_ALL_BOUNDARY; + break; + case V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_DISABLED: + *value = HFI_DEBLOCK_DISABLE; + break; + case DB_HEVC_DISABLE_SLICE_BOUNDARY: + *value = HFI_DEBLOCK_DISABLE_AT_SLICE_BOUNDARY; + break; + default: + *value = HFI_DEBLOCK_ALL_BOUNDARY; + goto set_default; + } + } else if (inst->codec == MSM_VIDC_H264) { + switch (capability->cap[cap_id].value) { + case V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED: + *value = HFI_DEBLOCK_ALL_BOUNDARY; + break; + case V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_DISABLED: + *value = HFI_DEBLOCK_DISABLE; + break; + case DB_H264_DISABLE_SLICE_BOUNDARY: + *value = HFI_DEBLOCK_DISABLE_AT_SLICE_BOUNDARY; + break; + default: + *value = HFI_DEBLOCK_ALL_BOUNDARY; + goto set_default; + } + } + return 0; + case NAL_LENGTH_FIELD: + switch (capability->cap[cap_id].value) { + case V4L2_MPEG_VIDEO_HEVC_SIZE_4: + *value = HFI_NAL_LENGTH_SIZE_4; + break; + default: + *value = HFI_NAL_LENGTH_STARTCODES; + goto set_default; + } + return 0; + default: + i_vpr_e(inst, + "%s: mapping not specified for ctrl_id: %#x\n", + __func__, capability->cap[cap_id].v4l2_id); + return -EINVAL; + } + +set_default: + i_vpr_e(inst, + "%s: invalid value %d for ctrl id: %#x. Set default: %u\n", + __func__, capability->cap[cap_id].value, + capability->cap[cap_id].v4l2_id, *value); + return 0; +} + +int msm_vidc_packetize_control(struct msm_vidc_inst *inst, + enum msm_vidc_inst_capability_type cap_id, u32 payload_type, + void *hfi_val, u32 payload_size, const char *func) +{ + int rc = 0; + u64 payload = 0; + + if (payload_size > sizeof(u32)) { + i_vpr_e(inst, "%s: payload size is more than u32 for cap[%d] %s\n", + func, cap_id, cap_name(cap_id)); + return -EINVAL; + } + + if (payload_size == sizeof(u32)) + payload = *(u32 *)hfi_val; + else if (payload_size == sizeof(u8)) + payload = *(u8 *)hfi_val; + else if (payload_size == sizeof(u16)) + payload = *(u16 *)hfi_val; + + i_vpr_h(inst, FMT_STRING_SET_CAP, + cap_name(cap_id), inst->capabilities->cap[cap_id].value, payload); + + rc = venus_hfi_session_property(inst, + inst->capabilities->cap[cap_id].hfi_id, + HFI_HOST_FLAGS_NONE, + msm_vidc_get_port_info(inst, cap_id), + payload_type, + hfi_val, + payload_size); + if (rc) { + i_vpr_e(inst, "%s: failed to set cap[%d] %s to fw\n", + func, cap_id, cap_name(cap_id)); + return rc; + } + + return 0; +} + +/*************** End of control framework utility functions ******************/ + +/*********************** Control Adjust functions ****************************/ + +int msm_vidc_adjust_entropy_mode(void *instance, struct v4l2_ctrl *ctrl) +{ + struct msm_vidc_inst_capability *capability; + s32 adjusted_value; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + s32 profile = -1; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + /* ctrl is always NULL in streamon case */ + adjusted_value = ctrl ? ctrl->val : + capability->cap[ENTROPY_MODE].value; + + if (inst->codec != MSM_VIDC_H264) { + i_vpr_e(inst, + "%s: incorrect entry in database. fix the database\n", + __func__); + return 0; + } + + if (msm_vidc_get_parent_value(inst, ENTROPY_MODE, + PROFILE, &profile, __func__)) + return -EINVAL; + + if (profile == V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE || + profile == V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_BASELINE) + adjusted_value = V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC; + + msm_vidc_update_cap_value(inst, ENTROPY_MODE, + adjusted_value, __func__); + + return 0; +} + +int msm_vidc_adjust_bitrate_mode(void *instance, struct v4l2_ctrl *ctrl) +{ + struct msm_vidc_inst_capability *capability; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + int lossless, frame_rc, bitrate_mode, frame_skip; + u32 hfi_value = 0; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + bitrate_mode = capability->cap[BITRATE_MODE].value; + lossless = capability->cap[LOSSLESS].value; + frame_rc = capability->cap[FRAME_RC_ENABLE].value; + frame_skip = capability->cap[FRAME_SKIP_MODE].value; + + if (lossless || (msm_vidc_lossless_encode && + inst->codec == MSM_VIDC_HEVC)) { + hfi_value = HFI_RC_LOSSLESS; + goto update; + } + + if (!frame_rc && !is_image_session(inst)) { + hfi_value = HFI_RC_OFF; + goto update; + } + + if (bitrate_mode == V4L2_MPEG_VIDEO_BITRATE_MODE_VBR) { + hfi_value = HFI_RC_VBR_CFR; + } else if (bitrate_mode == V4L2_MPEG_VIDEO_BITRATE_MODE_CBR) { + if (frame_skip) + hfi_value = HFI_RC_CBR_VFR; + else + hfi_value = HFI_RC_CBR_CFR; + } else if (bitrate_mode == V4L2_MPEG_VIDEO_BITRATE_MODE_CQ) { + hfi_value = HFI_RC_CQ; + } + +update: + inst->hfi_rc_type = hfi_value; + i_vpr_h(inst, "%s: hfi rc type: %#x\n", + __func__, inst->hfi_rc_type); + + return 0; +} + +int msm_vidc_adjust_profile(void *instance, struct v4l2_ctrl *ctrl) +{ + struct msm_vidc_inst_capability *capability; + s32 adjusted_value; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + s32 pix_fmt = -1; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + adjusted_value = ctrl ? ctrl->val : capability->cap[PROFILE].value; + + /* PIX_FMTS dependency is common across all chipsets. + * Hence, PIX_FMTS must be specified as Parent for HEVC profile. + * Otherwise it would be a database error that should be fixed. + */ + if (msm_vidc_get_parent_value(inst, PROFILE, PIX_FMTS, + &pix_fmt, __func__)) + return -EINVAL; + + /* 10 bit profile for 10 bit color format */ + if (pix_fmt == MSM_VIDC_FMT_TP10C || pix_fmt == MSM_VIDC_FMT_P010) { + if (is_image_session(inst)) + adjusted_value = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE; + else + adjusted_value = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10; + } else { + /* 8 bit profile for 8 bit color format */ + if (is_image_session(inst)) + adjusted_value = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE; + else + adjusted_value = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN; + } + + msm_vidc_update_cap_value(inst, PROFILE, + adjusted_value, __func__); + + return 0; +} + +int msm_vidc_adjust_ltr_count(void *instance, struct v4l2_ctrl *ctrl) +{ + struct msm_vidc_inst_capability *capability; + s32 adjusted_value; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + s32 rc_type = -1, all_intra = 0; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + adjusted_value = ctrl ? ctrl->val : capability->cap[LTR_COUNT].value; + + if (msm_vidc_get_parent_value(inst, LTR_COUNT, BITRATE_MODE, + &rc_type, __func__) || + msm_vidc_get_parent_value(inst, LTR_COUNT, ALL_INTRA, + &all_intra, __func__)) + return -EINVAL; + + if ((rc_type != HFI_RC_OFF && + rc_type != HFI_RC_CBR_CFR && + rc_type != HFI_RC_CBR_VFR) || + all_intra) { + adjusted_value = 0; + i_vpr_h(inst, + "%s: ltr count unsupported, rc_type: %#x, all_intra %d\n", + __func__, rc_type, all_intra); + } + + msm_vidc_update_cap_value(inst, LTR_COUNT, + adjusted_value, __func__); + + return 0; +} + +int msm_vidc_adjust_use_ltr(void *instance, struct v4l2_ctrl *ctrl) +{ + struct msm_vidc_inst_capability *capability; + s32 adjusted_value, ltr_count; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + adjusted_value = ctrl ? ctrl->val : capability->cap[USE_LTR].value; + + /* + * Since USE_LTR is only set dynamically, and LTR_COUNT is static + * control, no need to make LTR_COUNT as parent for USE_LTR as + * LTR_COUNT value will always be updated when dynamically USE_LTR + * is set + */ + ltr_count = capability->cap[LTR_COUNT].value; + if (!ltr_count) + return 0; + + if (adjusted_value <= 0 || + adjusted_value > ((1 << ltr_count) - 1)) { + /* + * USE_LTR is bitmask value, hence should be + * > 0 and <= (2 ^ LTR_COUNT) - 1 + */ + i_vpr_e(inst, "%s: invalid value %d\n", + __func__, adjusted_value); + return 0; + } + + /* USE_LTR value is a bitmask value */ + msm_vidc_update_cap_value(inst, USE_LTR, + adjusted_value, __func__); + + return 0; +} + +int msm_vidc_adjust_mark_ltr(void *instance, struct v4l2_ctrl *ctrl) +{ + struct msm_vidc_inst_capability *capability; + s32 adjusted_value, ltr_count; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + adjusted_value = ctrl ? ctrl->val : capability->cap[MARK_LTR].value; + + /* + * Since MARK_LTR is only set dynamically, and LTR_COUNT is static + * control, no need to make LTR_COUNT as parent for MARK_LTR as + * LTR_COUNT value will always be updated when dynamically MARK_LTR + * is set + */ + ltr_count = capability->cap[LTR_COUNT].value; + if (!ltr_count) + return 0; + + if (adjusted_value < 0 || + adjusted_value > (ltr_count - 1)) { + /* MARK_LTR value should be >= 0 and <= (LTR_COUNT - 1) */ + i_vpr_e(inst, "%s: invalid value %d\n", + __func__, adjusted_value); + return 0; + } + + msm_vidc_update_cap_value(inst, MARK_LTR, + adjusted_value, __func__); + + return 0; +} + +int msm_vidc_adjust_delta_based_rc(void *instance, struct v4l2_ctrl *ctrl) +{ + struct msm_vidc_inst_capability *capability; + s32 adjusted_value; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + s32 rc_type = -1; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + adjusted_value = ctrl ? ctrl->val : + capability->cap[TIME_DELTA_BASED_RC].value; + + if (msm_vidc_get_parent_value(inst, TIME_DELTA_BASED_RC, + BITRATE_MODE, &rc_type, __func__)) + return -EINVAL; + + if (rc_type == HFI_RC_OFF || + rc_type == HFI_RC_CQ) + adjusted_value = 0; + + msm_vidc_update_cap_value(inst, TIME_DELTA_BASED_RC, + adjusted_value, __func__); + + return 0; +} + +int msm_vidc_adjust_output_order(void *instance, struct v4l2_ctrl *ctrl) +{ + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + struct msm_vidc_inst_capability *capability; + s32 tn_mode = -1, display_delay = -1, display_delay_enable = -1; + u32 adjusted_value; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + adjusted_value = ctrl ? ctrl->val : + capability->cap[OUTPUT_ORDER].value; + + if (msm_vidc_get_parent_value(inst, OUTPUT_ORDER, THUMBNAIL_MODE, + &tn_mode, __func__) || + msm_vidc_get_parent_value(inst, OUTPUT_ORDER, DISPLAY_DELAY, + &display_delay, __func__) || + msm_vidc_get_parent_value(inst, OUTPUT_ORDER, DISPLAY_DELAY_ENABLE, + &display_delay_enable, __func__)) + return -EINVAL; + + if (tn_mode || (display_delay_enable && !display_delay)) + adjusted_value = 1; + + msm_vidc_update_cap_value(inst, OUTPUT_ORDER, + adjusted_value, __func__); + + return 0; +} + +int msm_vidc_adjust_input_buf_host_max_count(void *instance, struct v4l2_ctrl *ctrl) +{ + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + struct msm_vidc_inst_capability *capability; + u32 adjusted_value; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + adjusted_value = ctrl ? ctrl->val : + capability->cap[INPUT_BUF_HOST_MAX_COUNT].value; + + if (msm_vidc_is_super_buffer(inst) || is_image_session(inst)) + adjusted_value = DEFAULT_MAX_HOST_BURST_BUF_COUNT; + + msm_vidc_update_cap_value(inst, INPUT_BUF_HOST_MAX_COUNT, + adjusted_value, __func__); + + return 0; +} + +int msm_vidc_adjust_output_buf_host_max_count(void *instance, struct v4l2_ctrl *ctrl) +{ + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + struct msm_vidc_inst_capability *capability; + u32 adjusted_value; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + adjusted_value = ctrl ? ctrl->val : + capability->cap[OUTPUT_BUF_HOST_MAX_COUNT].value; + + if (msm_vidc_is_super_buffer(inst) || is_image_session(inst) || + is_enc_slice_delivery_mode(inst)) + adjusted_value = DEFAULT_MAX_HOST_BURST_BUF_COUNT; + + msm_vidc_update_cap_value(inst, OUTPUT_BUF_HOST_MAX_COUNT, + adjusted_value, __func__); + + return 0; +} + +int msm_vidc_adjust_transform_8x8(void *instance, struct v4l2_ctrl *ctrl) +{ + struct msm_vidc_inst_capability *capability; + s32 adjusted_value; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + s32 profile = -1; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + adjusted_value = ctrl ? ctrl->val : + capability->cap[TRANSFORM_8X8].value; + + if (inst->codec != MSM_VIDC_H264) { + i_vpr_e(inst, + "%s: incorrect entry in database. fix the database\n", + __func__); + return 0; + } + + if (msm_vidc_get_parent_value(inst, TRANSFORM_8X8, + PROFILE, &profile, __func__)) + return -EINVAL; + + if (profile != V4L2_MPEG_VIDEO_H264_PROFILE_HIGH && + profile != V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH) + adjusted_value = 0; + + msm_vidc_update_cap_value(inst, TRANSFORM_8X8, + adjusted_value, __func__); + + return 0; +} + +int msm_vidc_adjust_chroma_qp_index_offset(void *instance, + struct v4l2_ctrl *ctrl) +{ + struct msm_vidc_inst_capability *capability; + s32 adjusted_value; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + adjusted_value = ctrl ? ctrl->val : + capability->cap[CHROMA_QP_INDEX_OFFSET].value; + + if (adjusted_value != MIN_CHROMA_QP_OFFSET) + adjusted_value = MAX_CHROMA_QP_OFFSET; + + msm_vidc_update_cap_value(inst, CHROMA_QP_INDEX_OFFSET, + adjusted_value, __func__); + + return 0; +} + +static bool msm_vidc_check_all_layer_bitrate_set(struct msm_vidc_inst *inst) +{ + bool layer_bitrate_set = true; + u32 cap_id = 0, i, enh_layer_count; + u32 layer_br_caps[6] = {L0_BR, L1_BR, L2_BR, L3_BR, L4_BR, L5_BR}; + + enh_layer_count = inst->capabilities->cap[ENH_LAYER_COUNT].value; + + for (i = 0; i <= enh_layer_count; i++) { + if (i >= ARRAY_SIZE(layer_br_caps)) + break; + cap_id = layer_br_caps[i]; + if (!(inst->capabilities->cap[cap_id].flags & CAP_FLAG_CLIENT_SET)) { + layer_bitrate_set = false; + break; + } + } + + return layer_bitrate_set; +} + +static u32 msm_vidc_get_cumulative_bitrate(struct msm_vidc_inst *inst) +{ + int i; + u32 cap_id = 0; + u32 cumulative_br = 0; + s32 enh_layer_count; + u32 layer_br_caps[6] = {L0_BR, L1_BR, L2_BR, L3_BR, L4_BR, L5_BR}; + + enh_layer_count = inst->capabilities->cap[ENH_LAYER_COUNT].value; + + for (i = 0; i <= enh_layer_count; i++) { + if (i >= ARRAY_SIZE(layer_br_caps)) + break; + cap_id = layer_br_caps[i]; + cumulative_br += inst->capabilities->cap[cap_id].value; + } + + return cumulative_br; +} + +int msm_vidc_adjust_slice_count(void *instance, struct v4l2_ctrl *ctrl) +{ + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + struct msm_vidc_inst_capability *capability; + struct v4l2_format *output_fmt; + s32 adjusted_value, rc_type = -1, slice_mode, all_intra, enh_layer_count = 0; + u32 slice_val, mbpf = 0, mbps = 0, max_mbpf = 0, max_mbps = 0, bitrate = 0; + u32 update_cap, max_avg_slicesize, output_width, output_height; + u32 min_width, min_height, max_width, max_height, fps; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + slice_mode = ctrl ? ctrl->val : + capability->cap[SLICE_MODE].value; + + if (slice_mode == V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE) + return 0; + + if (msm_vidc_get_parent_value(inst, SLICE_MODE, + BITRATE_MODE, &rc_type, __func__) || + msm_vidc_get_parent_value(inst, SLICE_MODE, + ALL_INTRA, &all_intra, __func__) || + msm_vidc_get_parent_value(inst, SLICE_MODE, + ENH_LAYER_COUNT, &enh_layer_count, __func__)) + return -EINVAL; + + if (capability->cap[BIT_RATE].flags & CAP_FLAG_CLIENT_SET) { + bitrate = capability->cap[BIT_RATE].value; + } else if (msm_vidc_check_all_layer_bitrate_set(inst)) { + bitrate = msm_vidc_get_cumulative_bitrate(inst); + } else { + adjusted_value = V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE; + update_cap = SLICE_MODE; + i_vpr_h(inst, + "%s: client did not set bitrate & layerwise bitrates\n", + __func__); + goto exit; + } + + fps = capability->cap[FRAME_RATE].value >> 16; + if (fps > MAX_SLICES_FRAME_RATE || + (rc_type != HFI_RC_OFF && + rc_type != HFI_RC_CBR_CFR && + rc_type != HFI_RC_CBR_VFR && + rc_type != HFI_RC_VBR_CFR) || + all_intra) { + adjusted_value = V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE; + update_cap = SLICE_MODE; + i_vpr_h(inst, + "%s: slice unsupported, fps: %u, rc_type: %#x, all_intra %d\n", + __func__, fps, rc_type, all_intra); + goto exit; + } + + output_fmt = &inst->fmts[OUTPUT_PORT]; + output_width = output_fmt->fmt.pix_mp.width; + output_height = output_fmt->fmt.pix_mp.height; + + max_width = (slice_mode == V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_MB) ? + MAX_MB_SLICE_WIDTH : MAX_BYTES_SLICE_WIDTH; + max_height = (slice_mode == V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_MB) ? + MAX_MB_SLICE_HEIGHT : MAX_BYTES_SLICE_HEIGHT; + min_width = (inst->codec == MSM_VIDC_HEVC) ? + MIN_HEVC_SLICE_WIDTH : MIN_AVC_SLICE_WIDTH; + min_height = MIN_SLICE_HEIGHT; + + /* + * For V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_MB: + * - width >= 384 and height >= 128 + * - width and height <= 4096 + * For V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_BYTES: + * - width >= 192 and height >= 128 + * - width and height <= 1920 + */ + if (output_width < min_width || output_height < min_height || + output_width > max_width || output_height > max_width) { + adjusted_value = V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE; + update_cap = SLICE_MODE; + i_vpr_h(inst, + "%s: slice unsupported, codec: %#x wxh: [%dx%d]\n", + __func__, inst->codec, output_width, output_height); + goto exit; + } + + mbpf = NUM_MBS_PER_FRAME(output_height, output_width); + mbps = NUM_MBS_PER_SEC(output_height, output_width, fps); + max_mbpf = NUM_MBS_PER_FRAME(max_height, max_width); + max_mbps = NUM_MBS_PER_SEC(max_height, max_width, MAX_SLICES_FRAME_RATE); + + if (mbpf > max_mbpf || mbps > max_mbps) { + adjusted_value = V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE; + update_cap = SLICE_MODE; + i_vpr_h(inst, + "%s: Unsupported, mbpf[%u] > max[%u], mbps[%u] > max[%u]\n", + __func__, mbpf, max_mbpf, mbps, max_mbps); + goto exit; + } + + if (slice_mode == V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_MB) { + update_cap = SLICE_MAX_MB; + slice_val = capability->cap[SLICE_MAX_MB].value; + slice_val = max(slice_val, mbpf / MAX_SLICES_PER_FRAME); + } else { + slice_val = capability->cap[SLICE_MAX_BYTES].value; + update_cap = SLICE_MAX_BYTES; + if (rc_type != HFI_RC_OFF) { + max_avg_slicesize = ((bitrate / fps) / 8) / + MAX_SLICES_PER_FRAME; + slice_val = max(slice_val, max_avg_slicesize); + } + } + adjusted_value = slice_val; + +exit: + msm_vidc_update_cap_value(inst, update_cap, + adjusted_value, __func__); + + return 0; +} + +static int msm_vidc_adjust_static_layer_count_and_type(struct msm_vidc_inst *inst, + s32 layer_count) +{ + bool hb_requested = false; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (!layer_count) { + i_vpr_h(inst, "client not enabled layer encoding\n"); + goto exit; + } + + if (inst->hfi_rc_type == HFI_RC_CQ) { + i_vpr_h(inst, "rc type is CQ, disabling layer encoding\n"); + layer_count = 0; + goto exit; + } + + if (inst->codec == MSM_VIDC_H264) { + if (!inst->capabilities->cap[LAYER_ENABLE].value) { + layer_count = 0; + goto exit; + } + + hb_requested = (inst->capabilities->cap[LAYER_TYPE].value == + V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_B) ? + true : false; + } else if (inst->codec == MSM_VIDC_HEVC) { + hb_requested = (inst->capabilities->cap[LAYER_TYPE].value == + V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B) ? + true : false; + } + + if (hb_requested && inst->hfi_rc_type != HFI_RC_VBR_CFR) { + i_vpr_h(inst, + "%s: HB layer encoding is supported for VBR rc only\n", + __func__); + layer_count = 0; + goto exit; + } + + if (!is_meta_tx_inp_enabled(inst, META_EVA_STATS) && + hb_requested && (layer_count > 1)) { + layer_count = 1; + i_vpr_h(inst, + "%s: cvp disable supports only one enh layer HB\n", + __func__); + } + + /* decide hfi layer type */ + if (hb_requested) { + inst->hfi_layer_type = HFI_HIER_B; + } else { + /* HP requested */ + inst->hfi_layer_type = HFI_HIER_P_SLIDING_WINDOW; + if (inst->codec == MSM_VIDC_H264 && + inst->hfi_rc_type == HFI_RC_VBR_CFR) + inst->hfi_layer_type = HFI_HIER_P_HYBRID_LTR; + } + + /* sanitize layer count based on layer type and codec, and rc type */ + if (inst->hfi_layer_type == HFI_HIER_B) { + if (layer_count > MAX_ENH_LAYER_HB) + layer_count = MAX_ENH_LAYER_HB; + } else if (inst->hfi_layer_type == HFI_HIER_P_HYBRID_LTR) { + if (layer_count > MAX_AVC_ENH_LAYER_HYBRID_HP) + layer_count = MAX_AVC_ENH_LAYER_HYBRID_HP; + } else if (inst->hfi_layer_type == HFI_HIER_P_SLIDING_WINDOW) { + if (inst->codec == MSM_VIDC_H264) { + if (layer_count > MAX_AVC_ENH_LAYER_SLIDING_WINDOW) + layer_count = MAX_AVC_ENH_LAYER_SLIDING_WINDOW; + } else if (inst->codec == MSM_VIDC_HEVC) { + if (inst->hfi_rc_type == HFI_RC_VBR_CFR) { + if (layer_count > MAX_HEVC_VBR_ENH_LAYER_SLIDING_WINDOW) + layer_count = MAX_HEVC_VBR_ENH_LAYER_SLIDING_WINDOW; + } else { + if (layer_count > MAX_HEVC_NON_VBR_ENH_LAYER_SLIDING_WINDOW) + layer_count = MAX_HEVC_NON_VBR_ENH_LAYER_SLIDING_WINDOW; + } + } + } + +exit: + msm_vidc_update_cap_value(inst, ENH_LAYER_COUNT, + layer_count, __func__); + inst->capabilities->cap[ENH_LAYER_COUNT].max = layer_count; + return 0; +} + +int msm_vidc_adjust_layer_count(void *instance, struct v4l2_ctrl *ctrl) +{ + int rc = 0; + struct msm_vidc_inst_capability *capability; + s32 client_layer_count; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + client_layer_count = ctrl ? ctrl->val : + capability->cap[ENH_LAYER_COUNT].value; + + if (!is_parent_available(inst, ENH_LAYER_COUNT, + BITRATE_MODE, __func__) || + !is_parent_available(inst, ENH_LAYER_COUNT, + META_EVA_STATS, __func__)) + return -EINVAL; + + if (!inst->bufq[OUTPUT_PORT].vb2q->streaming) { + rc = msm_vidc_adjust_static_layer_count_and_type(inst, + client_layer_count); + if (rc) + goto exit; + } else { + if (inst->hfi_layer_type == HFI_HIER_P_HYBRID_LTR || + inst->hfi_layer_type == HFI_HIER_P_SLIDING_WINDOW) { + /* dynamic layer count change is only supported for HP */ + if (client_layer_count > + inst->capabilities->cap[ENH_LAYER_COUNT].max) + client_layer_count = + inst->capabilities->cap[ENH_LAYER_COUNT].max; + + msm_vidc_update_cap_value(inst, ENH_LAYER_COUNT, + client_layer_count, __func__); + } + } + +exit: + return rc; +} + +int msm_vidc_adjust_gop_size(void *instance, struct v4l2_ctrl *ctrl) +{ + struct msm_vidc_inst_capability *capability; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; + s32 adjusted_value, enh_layer_count = -1; + u32 min_gop_size, num_subgops; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + adjusted_value = ctrl ? ctrl->val : capability->cap[GOP_SIZE].value; + + if (msm_vidc_get_parent_value(inst, GOP_SIZE, + ENH_LAYER_COUNT, &enh_layer_count, __func__)) + return -EINVAL; + + if (!enh_layer_count) + goto exit; + + /* + * Layer encoding needs GOP size to be multiple of subgop size + * And subgop size is 2 ^ number of enhancement layers. + */ + + /* v4l2 layer count is the number of enhancement layers */ + min_gop_size = 1 << enh_layer_count; + num_subgops = (adjusted_value + (min_gop_size >> 1)) / + min_gop_size; + if (num_subgops) + adjusted_value = num_subgops * min_gop_size; + else + adjusted_value = min_gop_size; + +exit: + msm_vidc_update_cap_value(inst, GOP_SIZE, adjusted_value, __func__); + return 0; +} + +int msm_vidc_adjust_b_frame(void *instance, struct v4l2_ctrl *ctrl) +{ + struct msm_vidc_inst_capability *capability; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; + s32 adjusted_value, enh_layer_count = -1; + const u32 max_bframe_size = 7; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + adjusted_value = ctrl ? ctrl->val : capability->cap[B_FRAME].value; + + if (msm_vidc_get_parent_value(inst, B_FRAME, + ENH_LAYER_COUNT, &enh_layer_count, __func__)) + return -EINVAL; + + if (!enh_layer_count || inst->hfi_layer_type != HFI_HIER_B) { + adjusted_value = 0; + goto exit; + } + + adjusted_value = (1 << enh_layer_count) - 1; + /* Allowed Bframe values are 0, 1, 3, 7 */ + if (adjusted_value > max_bframe_size) + adjusted_value = max_bframe_size; + +exit: + msm_vidc_update_cap_value(inst, B_FRAME, adjusted_value, __func__); + return 0; +} + +int msm_vidc_adjust_bitrate(void *instance, struct v4l2_ctrl *ctrl) +{ + int i, rc = 0; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + struct msm_vidc_inst_capability *capability; + s32 adjusted_value, enh_layer_count; + u32 cumulative_bitrate = 0, cap_id = 0, cap_value = 0; + u32 layer_br_caps[6] = {L0_BR, L1_BR, L2_BR, L3_BR, L4_BR, L5_BR}; + u32 max_bitrate = 0; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + /* ignore layer bitrate when total bitrate is set */ + if (capability->cap[BIT_RATE].flags & CAP_FLAG_CLIENT_SET) { + /* + * For static case, ctrl is null. + * For dynamic case, only BIT_RATE cap uses this adjust function. + * Hence, no need to check for ctrl id to be BIT_RATE control, and not + * any of layer bitrate controls. + */ + adjusted_value = ctrl ? ctrl->val : capability->cap[BIT_RATE].value; + msm_vidc_update_cap_value(inst, BIT_RATE, adjusted_value, __func__); + + return 0; + } + + if (inst->bufq[OUTPUT_PORT].vb2q->streaming) + return 0; + + if (msm_vidc_get_parent_value(inst, BIT_RATE, + ENH_LAYER_COUNT, &enh_layer_count, __func__)) + return -EINVAL; + + /* get max bit rate for current session config*/ + max_bitrate = msm_vidc_get_max_bitrate(inst); + if (inst->capabilities->cap[BIT_RATE].value > max_bitrate) + msm_vidc_update_cap_value(inst, BIT_RATE, max_bitrate, __func__); + + /* + * ENH_LAYER_COUNT cap max is positive only if + * layer encoding is enabled during streamon. + */ + if (capability->cap[ENH_LAYER_COUNT].max) { + if (!msm_vidc_check_all_layer_bitrate_set(inst)) { + i_vpr_h(inst, + "%s: client did not set all layer bitrates\n", + __func__); + return 0; + } + + cumulative_bitrate = msm_vidc_get_cumulative_bitrate(inst); + + /* cap layer bitrates to max supported bitrate */ + if (cumulative_bitrate > max_bitrate) { + u32 decrement_in_value = 0; + u32 decrement_in_percent = ((cumulative_bitrate - max_bitrate) * 100) / + max_bitrate; + + cumulative_bitrate = 0; + for (i = 0; i <= enh_layer_count; i++) { + if (i >= ARRAY_SIZE(layer_br_caps)) + break; + cap_id = layer_br_caps[i]; + cap_value = inst->capabilities->cap[cap_id].value; + + decrement_in_value = (cap_value * + decrement_in_percent) / 100; + cumulative_bitrate += (cap_value - decrement_in_value); + + /* + * cap value for the L*_BR is changed. Hence, update cap, + * and add to FW_LIST to set new values to firmware. + */ + msm_vidc_update_cap_value(inst, cap_id, + (cap_value - decrement_in_value), __func__); + } + } + + i_vpr_h(inst, + "%s: update BIT_RATE with cumulative bitrate\n", + __func__); + msm_vidc_update_cap_value(inst, BIT_RATE, + cumulative_bitrate, __func__); + } + + return rc; +} + +int msm_vidc_adjust_dynamic_layer_bitrate(void *instance, struct v4l2_ctrl *ctrl) +{ + int rc = 0; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + struct msm_vidc_inst_capability *capability; + u32 cumulative_bitrate = 0; + u32 client_set_cap_id = INST_CAP_NONE; + u32 old_br = 0, new_br = 0, exceeded_br = 0; + s32 max_bitrate; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + if (!ctrl) + return 0; + + /* ignore layer bitrate when total bitrate is set */ + if (capability->cap[BIT_RATE].flags & CAP_FLAG_CLIENT_SET) + return 0; + + if (!inst->bufq[OUTPUT_PORT].vb2q->streaming) + return 0; + + /* + * ENH_LAYER_COUNT cap max is positive only if + * layer encoding is enabled during streamon. + */ + if (!capability->cap[ENH_LAYER_COUNT].max) { + i_vpr_e(inst, "%s: layers not enabled\n", __func__); + return -EINVAL; + } + + if (!msm_vidc_check_all_layer_bitrate_set(inst)) { + i_vpr_h(inst, + "%s: client did not set all layer bitrates\n", + __func__); + return 0; + } + + client_set_cap_id = msm_vidc_get_cap_id(inst, ctrl->id); + if (client_set_cap_id == INST_CAP_NONE) { + i_vpr_e(inst, "%s: could not find cap_id for ctrl %s\n", + __func__, ctrl->name); + return -EINVAL; + } + + cumulative_bitrate = msm_vidc_get_cumulative_bitrate(inst); + max_bitrate = inst->capabilities->cap[BIT_RATE].max; + old_br = capability->cap[client_set_cap_id].value; + new_br = ctrl->val; + + /* + * new bitrate is not supposed to cause cumulative bitrate to + * exceed max supported bitrate + */ + + if ((cumulative_bitrate - old_br + new_br) > max_bitrate) { + /* adjust new bitrate */ + exceeded_br = (cumulative_bitrate - old_br + new_br) - max_bitrate; + new_br = ctrl->val - exceeded_br; + } + msm_vidc_update_cap_value(inst, client_set_cap_id, new_br, __func__); + + /* adjust totol bitrate cap */ + i_vpr_h(inst, + "%s: update BIT_RATE with cumulative bitrate\n", + __func__); + msm_vidc_update_cap_value(inst, BIT_RATE, + msm_vidc_get_cumulative_bitrate(inst), __func__); + + return rc; +} + +int msm_vidc_adjust_peak_bitrate(void *instance, struct v4l2_ctrl *ctrl) +{ + struct msm_vidc_inst_capability *capability; + s32 adjusted_value; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + s32 rc_type = -1, bitrate = -1; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + adjusted_value = ctrl ? ctrl->val : + capability->cap[PEAK_BITRATE].value; + + if (msm_vidc_get_parent_value(inst, PEAK_BITRATE, + BITRATE_MODE, &rc_type, __func__)) + return -EINVAL; + + if (rc_type != HFI_RC_CBR_CFR && + rc_type != HFI_RC_CBR_VFR) + return 0; + + if (msm_vidc_get_parent_value(inst, PEAK_BITRATE, + BIT_RATE, &bitrate, __func__)) + return -EINVAL; + + /* Peak Bitrate should be larger than or equal to avg bitrate */ + if (capability->cap[PEAK_BITRATE].flags & CAP_FLAG_CLIENT_SET) { + if (adjusted_value < bitrate) + adjusted_value = bitrate; + } else { + adjusted_value = capability->cap[BIT_RATE].value; + } + + msm_vidc_update_cap_value(inst, PEAK_BITRATE, + adjusted_value, __func__); + + return 0; +} + +static int msm_vidc_adjust_hevc_qp(struct msm_vidc_inst *inst, + enum msm_vidc_inst_capability_type cap_id) +{ + struct msm_vidc_inst_capability *capability; + s32 pix_fmt = -1; + + capability = inst->capabilities; + + if (!(inst->codec == MSM_VIDC_HEVC || inst->codec == MSM_VIDC_HEIC)) { + i_vpr_e(inst, + "%s: incorrect cap[%d] %s entry in database, fix database\n", + __func__, cap_id, cap_name(cap_id)); + return -EINVAL; + } + + if (msm_vidc_get_parent_value(inst, cap_id, + PIX_FMTS, &pix_fmt, __func__)) + return -EINVAL; + + if (pix_fmt == MSM_VIDC_FMT_P010 || pix_fmt == MSM_VIDC_FMT_TP10C) + goto exit; + + CAP_TO_8BIT_QP(capability->cap[cap_id].value); + if (cap_id == MIN_FRAME_QP) { + CAP_TO_8BIT_QP(capability->cap[I_FRAME_MIN_QP].value); + CAP_TO_8BIT_QP(capability->cap[P_FRAME_MIN_QP].value); + CAP_TO_8BIT_QP(capability->cap[B_FRAME_MIN_QP].value); + } else if (cap_id == MAX_FRAME_QP) { + CAP_TO_8BIT_QP(capability->cap[I_FRAME_MAX_QP].value); + CAP_TO_8BIT_QP(capability->cap[P_FRAME_MAX_QP].value); + CAP_TO_8BIT_QP(capability->cap[B_FRAME_MAX_QP].value); + } + +exit: + return 0; +} + +int msm_vidc_adjust_hevc_min_qp(void *instance, struct v4l2_ctrl *ctrl) +{ + int rc = 0; + struct msm_vidc_inst_capability *capability; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + if (ctrl) + msm_vidc_update_cap_value(inst, MIN_FRAME_QP, + ctrl->val, __func__); + + rc = msm_vidc_adjust_hevc_qp(inst, MIN_FRAME_QP); + + return rc; +} + +int msm_vidc_adjust_hevc_max_qp(void *instance, struct v4l2_ctrl *ctrl) +{ + int rc = 0; + struct msm_vidc_inst_capability *capability; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + if (ctrl) + msm_vidc_update_cap_value(inst, MAX_FRAME_QP, + ctrl->val, __func__); + + rc = msm_vidc_adjust_hevc_qp(inst, MAX_FRAME_QP); + + return rc; +} + +int msm_vidc_adjust_hevc_i_frame_qp(void *instance, struct v4l2_ctrl *ctrl) +{ + int rc = 0; + struct msm_vidc_inst_capability *capability; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + if (ctrl) + msm_vidc_update_cap_value(inst, I_FRAME_QP, + ctrl->val, __func__); + + rc = msm_vidc_adjust_hevc_qp(inst, I_FRAME_QP); + if (rc) + return rc; + + return rc; +} + +int msm_vidc_adjust_hevc_p_frame_qp(void *instance, struct v4l2_ctrl *ctrl) +{ + int rc = 0; + struct msm_vidc_inst_capability *capability; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + if (ctrl) + msm_vidc_update_cap_value(inst, P_FRAME_QP, + ctrl->val, __func__); + + rc = msm_vidc_adjust_hevc_qp(inst, P_FRAME_QP); + if (rc) + return rc; + + return rc; +} + +int msm_vidc_adjust_hevc_b_frame_qp(void *instance, struct v4l2_ctrl *ctrl) +{ + int rc = 0; + struct msm_vidc_inst_capability *capability; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + if (ctrl) + msm_vidc_update_cap_value(inst, B_FRAME_QP, + ctrl->val, __func__); + + rc = msm_vidc_adjust_hevc_qp(inst, B_FRAME_QP); + if (rc) + return rc; + + return rc; +} + +int msm_vidc_adjust_blur_type(void *instance, struct v4l2_ctrl *ctrl) +{ + struct msm_vidc_inst_capability *capability; + s32 adjusted_value; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + s32 rc_type = -1, roi_enable = -1; + s32 pix_fmts = -1, min_quality = -1; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + adjusted_value = ctrl ? ctrl->val : + capability->cap[BLUR_TYPES].value; + + if (adjusted_value == MSM_VIDC_BLUR_NONE) + return 0; + + if (msm_vidc_get_parent_value(inst, BLUR_TYPES, BITRATE_MODE, + &rc_type, __func__) || + msm_vidc_get_parent_value(inst, BLUR_TYPES, PIX_FMTS, + &pix_fmts, __func__) || + msm_vidc_get_parent_value(inst, BLUR_TYPES, MIN_QUALITY, + &min_quality, __func__) || + msm_vidc_get_parent_value(inst, BLUR_TYPES, META_ROI_INFO, + &roi_enable, __func__)) + return -EINVAL; + + if (adjusted_value == MSM_VIDC_BLUR_EXTERNAL) { + if (is_scaling_enabled(inst) || min_quality) + adjusted_value = MSM_VIDC_BLUR_NONE; + } else if (adjusted_value == MSM_VIDC_BLUR_ADAPTIVE) { + if (is_scaling_enabled(inst) || min_quality || + (rc_type != HFI_RC_VBR_CFR && + rc_type != HFI_RC_CBR_CFR && + rc_type != HFI_RC_CBR_VFR) || + is_10bit_colorformat(pix_fmts) || roi_enable) { + adjusted_value = MSM_VIDC_BLUR_NONE; + } + } + + msm_vidc_update_cap_value(inst, BLUR_TYPES, + adjusted_value, __func__); + + return 0; +} + +int msm_vidc_adjust_all_intra(void *instance, struct v4l2_ctrl *ctrl) +{ + struct msm_vidc_inst_capability *capability; + s32 adjusted_value; + struct msm_vidc_core *core; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + s32 gop_size = -1, bframe = -1; + u32 width, height, fps, mbps, max_mbps; + + if (!inst || !inst->capabilities || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + adjusted_value = capability->cap[ALL_INTRA].value; + + if (msm_vidc_get_parent_value(inst, ALL_INTRA, GOP_SIZE, + &gop_size, __func__) || + msm_vidc_get_parent_value(inst, ALL_INTRA, B_FRAME, + &bframe, __func__)) + return -EINVAL; + + width = inst->crop.width; + height = inst->crop.height; + fps = msm_vidc_get_fps(inst); + mbps = NUM_MBS_PER_SEC(height, width, fps); + core = inst->core; + max_mbps = core->capabilities[MAX_MBPS_ALL_INTRA].value; + + if (mbps > max_mbps) { + adjusted_value = 0; + i_vpr_h(inst, "%s: mbps %d exceeds max supported mbps %d\n", + __func__, mbps, max_mbps); + goto exit; + } + + if (!gop_size && !bframe) + adjusted_value = 1; + +exit: + msm_vidc_update_cap_value(inst, ALL_INTRA, + adjusted_value, __func__); + + return 0; +} + +int msm_vidc_adjust_blur_resolution(void *instance, struct v4l2_ctrl *ctrl) +{ + struct msm_vidc_inst_capability *capability; + s32 adjusted_value; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + s32 blur_type = -1; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + adjusted_value = ctrl ? ctrl->val : + capability->cap[BLUR_RESOLUTION].value; + + if (msm_vidc_get_parent_value(inst, BLUR_RESOLUTION, BLUR_TYPES, + &blur_type, __func__)) + return -EINVAL; + + if (blur_type != MSM_VIDC_BLUR_EXTERNAL) + return 0; + + msm_vidc_update_cap_value(inst, BLUR_RESOLUTION, + adjusted_value, __func__); + + return 0; +} + +int msm_vidc_adjust_brs(void *instance, struct v4l2_ctrl *ctrl) +{ + struct msm_vidc_inst_capability *capability; + s32 adjusted_value; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + s32 rc_type = -1, layer_enabled = -1, layer_type = -1; + bool hp_requested = false; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + adjusted_value = ctrl ? ctrl->val : + capability->cap[CONTENT_ADAPTIVE_CODING].value; + + if (inst->bufq[OUTPUT_PORT].vb2q->streaming) + return 0; + + if (msm_vidc_get_parent_value(inst, CONTENT_ADAPTIVE_CODING, + BITRATE_MODE, &rc_type, __func__) || + msm_vidc_get_parent_value(inst, CONTENT_ADAPTIVE_CODING, + LAYER_ENABLE, &layer_enabled, __func__) || + msm_vidc_get_parent_value(inst, CONTENT_ADAPTIVE_CODING, + LAYER_TYPE, &layer_type, __func__)) + return -EINVAL; + + /* + * -BRS is supported only for VBR rc type. + * Hence, do not adjust or set to firmware for non VBR rc's + * -If HP is enabled then BRS is not allowed. + */ + if (rc_type != HFI_RC_VBR_CFR) { + adjusted_value = 0; + goto adjust; + } + + if (inst->codec == MSM_VIDC_H264) + layer_type = V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P; + else if (inst->codec == MSM_VIDC_HEVC) + layer_type = V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P; + + hp_requested = (inst->capabilities->cap[LAYER_TYPE].value == layer_type); + + /* + * Disable BRS in case of HP encoding + * Hence set adjust value to 0. + */ + if (layer_enabled == 1 && hp_requested) { + adjusted_value = 0; + goto adjust; + } + +adjust: + msm_vidc_update_cap_value(inst, CONTENT_ADAPTIVE_CODING, + adjusted_value, __func__); + + return 0; +} + +int msm_vidc_adjust_bitrate_boost(void *instance, struct v4l2_ctrl *ctrl) +{ + struct msm_vidc_inst_capability *capability; + s32 adjusted_value; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + s32 min_quality = -1, rc_type = -1; + u32 max_bitrate = 0, bitrate = 0; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + adjusted_value = ctrl ? ctrl->val : + capability->cap[BITRATE_BOOST].value; + + if (inst->bufq[OUTPUT_PORT].vb2q->streaming) + return 0; + + if (msm_vidc_get_parent_value(inst, BITRATE_BOOST, + MIN_QUALITY, &min_quality, __func__) || + msm_vidc_get_parent_value(inst, BITRATE_BOOST, + BITRATE_MODE, &rc_type, __func__)) + return -EINVAL; + + /* + * Bitrate Boost are supported only for VBR rc type. + * Hence, do not adjust or set to firmware for non VBR rc's + */ + if (rc_type != HFI_RC_VBR_CFR) { + adjusted_value = 0; + goto adjust; + } + + if (min_quality) { + adjusted_value = MAX_BITRATE_BOOST; + goto adjust; + } + + max_bitrate = msm_vidc_get_max_bitrate(inst); + bitrate = inst->capabilities->cap[BIT_RATE].value; + if (adjusted_value) { + if ((bitrate + bitrate / (100 / adjusted_value)) > max_bitrate) { + i_vpr_h(inst, + "%s: bitrate %d is beyond max bitrate %d, remove bitrate boost\n", + __func__, max_bitrate, bitrate); + adjusted_value = 0; + } + } + +adjust: + msm_vidc_update_cap_value(inst, BITRATE_BOOST, + adjusted_value, __func__); + + return 0; +} + +int msm_vidc_adjust_min_quality(void *instance, struct v4l2_ctrl *ctrl) +{ + struct msm_vidc_inst_capability *capability; + s32 adjusted_value; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + s32 roi_enable = -1, rc_type = -1, enh_layer_count = -1, pix_fmts = -1; + u32 width, height, frame_rate; + struct v4l2_format *f; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + adjusted_value = ctrl ? ctrl->val : capability->cap[MIN_QUALITY].value; + + /* + * Although MIN_QUALITY is static, one of its parents, + * ENH_LAYER_COUNT is dynamic cap. Hence, dynamic call + * may be made for MIN_QUALITY via ENH_LAYER_COUNT. + * Therefore, below streaming check is required to avoid + * runtime modification of MIN_QUALITY. + */ + if (inst->bufq[OUTPUT_PORT].vb2q->streaming) + return 0; + + if (msm_vidc_get_parent_value(inst, MIN_QUALITY, + BITRATE_MODE, &rc_type, __func__) || + msm_vidc_get_parent_value(inst, MIN_QUALITY, + META_ROI_INFO, &roi_enable, __func__) || + msm_vidc_get_parent_value(inst, MIN_QUALITY, + ENH_LAYER_COUNT, &enh_layer_count, __func__)) + return -EINVAL; + + /* + * Min Quality is supported only for VBR rc type. + * Hence, do not adjust or set to firmware for non VBR rc's + */ + if (rc_type != HFI_RC_VBR_CFR) { + adjusted_value = 0; + goto update_and_exit; + } + + frame_rate = inst->capabilities->cap[FRAME_RATE].value >> 16; + f = &inst->fmts[OUTPUT_PORT]; + width = f->fmt.pix_mp.width; + height = f->fmt.pix_mp.height; + + /* + * VBR Min Quality not supported for: + * - HEVC 10bit + * - ROI support + * - HP encoding + * - External Blur + * - Resolution beyond 1080P + * (It will fall back to CQCAC 25% or 0% (CAC) or CQCAC-OFF) + */ + if (inst->codec == MSM_VIDC_HEVC) { + if (msm_vidc_get_parent_value(inst, MIN_QUALITY, + PIX_FMTS, &pix_fmts, __func__)) + return -EINVAL; + + if (is_10bit_colorformat(pix_fmts)) { + i_vpr_h(inst, + "%s: min quality is supported only for 8 bit\n", + __func__); + adjusted_value = 0; + goto update_and_exit; + } + } + + if (res_is_greater_than(width, height, 1920, 1080)) { + i_vpr_h(inst, "%s: unsupported res, wxh %ux%u\n", + __func__, width, height); + adjusted_value = 0; + goto update_and_exit; + } + + if (frame_rate > 60) { + i_vpr_h(inst, "%s: unsupported fps %u\n", + __func__, frame_rate); + adjusted_value = 0; + goto update_and_exit; + } + + if (is_meta_tx_inp_enabled(inst, META_ROI_INFO)) { + i_vpr_h(inst, + "%s: min quality not supported with roi metadata\n", + __func__); + adjusted_value = 0; + goto update_and_exit; + } + + if (enh_layer_count > 0 && inst->hfi_layer_type != HFI_HIER_B) { + i_vpr_h(inst, + "%s: min quality not supported for HP encoding\n", + __func__); + adjusted_value = 0; + goto update_and_exit; + } + + /* Above conditions are met. Hence enable min quality */ + adjusted_value = MAX_SUPPORTED_MIN_QUALITY; + +update_and_exit: + msm_vidc_update_cap_value(inst, MIN_QUALITY, + adjusted_value, __func__); + + return 0; +} + +int msm_vidc_adjust_preprocess(void *instance, struct v4l2_ctrl *ctrl) +{ + s32 adjusted_value; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + s32 brs = -1, eva_status = -1; + u32 width, height, frame_rate, operating_rate, max_fps; + struct v4l2_format *f; + + if (!inst || !inst->capabilities || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + adjusted_value = inst->capabilities->cap[REQUEST_PREPROCESS].value; + + if (msm_vidc_get_parent_value(inst, REQUEST_PREPROCESS, CONTENT_ADAPTIVE_CODING, + &brs, __func__) || + msm_vidc_get_parent_value(inst, REQUEST_PREPROCESS, META_EVA_STATS, + &eva_status, __func__)) + return -EINVAL; + + width = inst->crop.width; + height = inst->crop.height; + frame_rate = msm_vidc_get_frame_rate(inst); + operating_rate = msm_vidc_get_operating_rate(inst); + + max_fps = max(frame_rate, operating_rate); + f = &inst->fmts[OUTPUT_PORT]; + + /* + * enable preprocess if + * client did not enable EVA metadata statistics and + * BRS enabled and upto 4k @ 60 fps + */ + if (!is_meta_tx_inp_enabled(inst, META_EVA_STATS) && + brs == 1 && + res_is_less_than_or_equal_to(width, height, 3840, 2160) && + max_fps <= 60) + adjusted_value = 1; + else + adjusted_value = 0; + + msm_vidc_update_cap_value(inst, REQUEST_PREPROCESS, + adjusted_value, __func__); + + return 0; +} + +int msm_vidc_adjust_enc_lowlatency_mode(void *instance, struct v4l2_ctrl *ctrl) +{ + struct msm_vidc_inst_capability *capability; + s32 adjusted_value; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + s32 rc_type = -1; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + adjusted_value = ctrl ? ctrl->val : + capability->cap[LOWLATENCY_MODE].value; + + if (msm_vidc_get_parent_value(inst, LOWLATENCY_MODE, BITRATE_MODE, + &rc_type, __func__)) + return -EINVAL; + + if (rc_type == HFI_RC_CBR_CFR || + rc_type == HFI_RC_CBR_VFR || + is_enc_slice_delivery_mode(inst)) + adjusted_value = 1; + + msm_vidc_update_cap_value(inst, LOWLATENCY_MODE, + adjusted_value, __func__); + + return 0; +} + +int msm_vidc_adjust_dec_lowlatency_mode(void *instance, struct v4l2_ctrl *ctrl) +{ + struct msm_vidc_inst_capability *capability; + s32 adjusted_value; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + s32 outbuf_fence = MSM_VIDC_META_DISABLE; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + adjusted_value = ctrl ? ctrl->val : + capability->cap[LOWLATENCY_MODE].value; + + if (msm_vidc_get_parent_value(inst, LOWLATENCY_MODE, META_OUTBUF_FENCE, + &outbuf_fence, __func__)) + return -EINVAL; + + /* enable lowlatency if outbuf fence is enabled */ + if (outbuf_fence & MSM_VIDC_META_ENABLE && + outbuf_fence & MSM_VIDC_META_RX_INPUT) + adjusted_value = 1; + + msm_vidc_update_cap_value(inst, LOWLATENCY_MODE, + adjusted_value, __func__); + + return 0; +} + +int msm_vidc_adjust_session_priority(void *instance, struct v4l2_ctrl *ctrl) +{ + int adjusted_value; + struct msm_vidc_inst_capability *capability; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + /* + * Priority handling + * Client will set 0 (realtime), 1+ (non-realtime) + * Driver adds NRT_PRIORITY_OFFSET (2) to clients non-realtime priority + * and hence PRIORITY values in the driver become 0, 3+. + * Driver may move decode realtime sessions to non-realtime by + * increasing priority by 1 to RT sessions in HW overloaded cases. + * So driver PRIORITY values can be 0, 1, 3+. + * When driver setting priority to firmware, driver adds + * FIRMWARE_PRIORITY_OFFSET (1) for all sessions except + * non-critical sessions. So finally firmware priority values ranges + * from 0 (Critical session), 1 (realtime session), + * 2+ (non-realtime session) + */ + if (ctrl) { + /* add offset when client sets non-realtime */ + if (ctrl->val) + adjusted_value = ctrl->val + NRT_PRIORITY_OFFSET; + else + adjusted_value = ctrl->val; + } else { + adjusted_value = capability->cap[PRIORITY].value; + } + + msm_vidc_update_cap_value(inst, PRIORITY, adjusted_value, __func__); + + return 0; +} + +int msm_vidc_adjust_roi_info(void *instance, struct v4l2_ctrl *ctrl) +{ + struct msm_vidc_inst_capability *capability; + s32 adjusted_value; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + s32 rc_type = -1, pix_fmt = -1; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + adjusted_value = ctrl ? ctrl->val : capability->cap[META_ROI_INFO].value; + + if (msm_vidc_get_parent_value(inst, META_ROI_INFO, BITRATE_MODE, + &rc_type, __func__)) + return -EINVAL; + + if (msm_vidc_get_parent_value(inst, META_ROI_INFO, PIX_FMTS, + &pix_fmt, __func__)) + return -EINVAL; + + if ((rc_type != HFI_RC_VBR_CFR && rc_type != HFI_RC_CBR_CFR + && rc_type != HFI_RC_CBR_VFR) || !is_8bit_colorformat(pix_fmt) + || is_scaling_enabled(inst) || is_rotation_90_or_270(inst)) + adjusted_value = 0; + + msm_vidc_update_cap_value(inst, META_ROI_INFO, + adjusted_value, __func__); + + return 0; +} + +int msm_vidc_adjust_dec_outbuf_fence(void *instance, struct v4l2_ctrl *ctrl) +{ + struct msm_vidc_inst_capability *capability; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + u32 adjusted_value = 0; + s32 picture_order = -1; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + adjusted_value = ctrl ? ctrl->val : capability->cap[META_OUTBUF_FENCE].value; + + if (msm_vidc_get_parent_value(inst, META_OUTBUF_FENCE, OUTPUT_ORDER, + &picture_order, __func__)) + return -EINVAL; + + if (picture_order == 0) { + /* disable outbuf fence */ + adjusted_value = MSM_VIDC_META_DISABLE | + MSM_VIDC_META_RX_INPUT; + } + + msm_vidc_update_cap_value(inst, META_OUTBUF_FENCE, + adjusted_value, __func__); + + return 0; +} + +int msm_vidc_adjust_dec_slice_mode(void *instance, struct v4l2_ctrl *ctrl) +{ + struct msm_vidc_inst_capability *capability; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + u32 adjusted_value = 0; + s32 low_latency = -1; + s32 picture_order = -1; + s32 outbuf_fence = 0; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + adjusted_value = ctrl ? ctrl->val : capability->cap[SLICE_DECODE].value; + + if (msm_vidc_get_parent_value(inst, SLICE_DECODE, LOWLATENCY_MODE, + &low_latency, __func__) || + msm_vidc_get_parent_value(inst, SLICE_DECODE, OUTPUT_ORDER, + &picture_order, __func__) || + msm_vidc_get_parent_value(inst, SLICE_DECODE, META_OUTBUF_FENCE, + &outbuf_fence, __func__)) + return -EINVAL; + + if (!low_latency || !picture_order || + !is_meta_rx_inp_enabled(inst, META_OUTBUF_FENCE)) + adjusted_value = 0; + + msm_vidc_update_cap_value(inst, SLICE_DECODE, + adjusted_value, __func__); + + return 0; +} + +/******************* End of Control Adjust functions *************************/ + +/************************* Control Set functions *****************************/ + +int msm_vidc_set_header_mode(void *instance, + enum msm_vidc_inst_capability_type cap_id) +{ + int rc = 0; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + int header_mode, prepend_sps_pps; + u32 hfi_value = 0; + struct msm_vidc_inst_capability *capability; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + header_mode = capability->cap[cap_id].value; + prepend_sps_pps = capability->cap[PREPEND_SPSPPS_TO_IDR].value; + + /* prioritize PREPEND_SPSPPS_TO_IDR mode over other header modes */ + if (prepend_sps_pps) + hfi_value = HFI_SEQ_HEADER_PREFIX_WITH_SYNC_FRAME; + else if (header_mode == V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME) + hfi_value = HFI_SEQ_HEADER_JOINED_WITH_1ST_FRAME; + else + hfi_value = HFI_SEQ_HEADER_SEPERATE_FRAME; + + if (is_meta_rx_out_enabled(inst, META_SEQ_HDR_NAL)) + hfi_value |= HFI_SEQ_HEADER_METADATA; + + rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32_ENUM, + &hfi_value, sizeof(u32), __func__); + if (rc) + return rc; + + return rc; +} + +int msm_vidc_set_deblock_mode(void *instance, + enum msm_vidc_inst_capability_type cap_id) +{ + int rc = 0; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + s32 alpha = 0, beta = 0; + u32 lf_mode, hfi_value = 0, lf_offset = 6; + struct msm_vidc_inst_capability *capability; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + rc = msm_vidc_v4l2_to_hfi_enum(inst, LF_MODE, &lf_mode); + if (rc) + return -EINVAL; + + beta = inst->capabilities->cap[LF_BETA].value + lf_offset; + alpha = inst->capabilities->cap[LF_ALPHA].value + lf_offset; + hfi_value = (alpha << 16) | (beta << 8) | lf_mode; + + rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_32_PACKED, + &hfi_value, sizeof(u32), __func__); + if (rc) + return rc; + + return rc; +} + +int msm_vidc_set_constant_quality(void *instance, + enum msm_vidc_inst_capability_type cap_id) +{ + int rc = 0; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; + u32 hfi_value = 0; + s32 rc_type = -1; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (msm_vidc_get_parent_value(inst, cap_id, + BITRATE_MODE, &rc_type, __func__)) + return -EINVAL; + + if (rc_type != HFI_RC_CQ) + return 0; + + hfi_value = inst->capabilities->cap[cap_id].value; + + rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32, + &hfi_value, sizeof(u32), __func__); + if (rc) + return rc; + + return rc; +} + +int msm_vidc_set_vbr_related_properties(void *instance, + enum msm_vidc_inst_capability_type cap_id) +{ + int rc = 0; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; + u32 hfi_value = 0; + s32 rc_type = -1; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (msm_vidc_get_parent_value(inst, cap_id, + BITRATE_MODE, &rc_type, __func__)) + return -EINVAL; + + if (rc_type != HFI_RC_VBR_CFR) + return 0; + + hfi_value = inst->capabilities->cap[cap_id].value; + + rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32, + &hfi_value, sizeof(u32), __func__); + if (rc) + return rc; + + return rc; +} + +int msm_vidc_set_cbr_related_properties(void *instance, + enum msm_vidc_inst_capability_type cap_id) +{ + int rc = 0; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; + u32 hfi_value = 0; + s32 rc_type = -1; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (msm_vidc_get_parent_value(inst, cap_id, + BITRATE_MODE, &rc_type, __func__)) + return -EINVAL; + + if (rc_type != HFI_RC_CBR_VFR && + rc_type != HFI_RC_CBR_CFR) + return 0; + + hfi_value = inst->capabilities->cap[cap_id].value; + + rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32, + &hfi_value, sizeof(u32), __func__); + if (rc) + return rc; + + return rc; +} + +int msm_vidc_set_use_and_mark_ltr(void *instance, + enum msm_vidc_inst_capability_type cap_id) +{ + int rc = 0; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; + u32 hfi_value = 0; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (!inst->capabilities->cap[LTR_COUNT].value || + (inst->capabilities->cap[cap_id].value == + INVALID_DEFAULT_MARK_OR_USE_LTR)) { + i_vpr_h(inst, + "%s: LTR_COUNT: %d %s: %d, cap %s is not set\n", + __func__, inst->capabilities->cap[LTR_COUNT].value, + cap_name(cap_id), + inst->capabilities->cap[cap_id].value, + cap_name(cap_id)); + return 0; + } + + hfi_value = inst->capabilities->cap[cap_id].value; + + rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32, + &hfi_value, sizeof(u32), __func__); + if (rc) + return rc; + + return rc; +} + +int msm_vidc_set_min_qp(void *instance, + enum msm_vidc_inst_capability_type cap_id) +{ + int rc = 0; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; + struct msm_vidc_inst_capability *capability; + s32 i_frame_qp = 0, p_frame_qp = 0, b_frame_qp = 0, min_qp_enable = 0; + u32 i_qp_enable = 0, p_qp_enable = 0, b_qp_enable = 0; + u32 client_qp_enable = 0, hfi_value = 0, offset = 0; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + if (capability->cap[MIN_FRAME_QP].flags & CAP_FLAG_CLIENT_SET) + min_qp_enable = 1; + + if (min_qp_enable || + (capability->cap[I_FRAME_MIN_QP].flags & CAP_FLAG_CLIENT_SET)) + i_qp_enable = 1; + if (min_qp_enable || + (capability->cap[P_FRAME_MIN_QP].flags & CAP_FLAG_CLIENT_SET)) + p_qp_enable = 1; + if (min_qp_enable || + (capability->cap[B_FRAME_MIN_QP].flags & CAP_FLAG_CLIENT_SET)) + b_qp_enable = 1; + + client_qp_enable = i_qp_enable | p_qp_enable << 1 | b_qp_enable << 2; + if (!client_qp_enable) { + i_vpr_h(inst, + "%s: client did not set min qp, cap %s is not set\n", + __func__, cap_name(cap_id)); + return 0; + } + + if (is_10bit_colorformat(capability->cap[PIX_FMTS].value)) + offset = 12; + + /* + * I_FRAME_MIN_QP, P_FRAME_MIN_QP, B_FRAME_MIN_QP, + * MIN_FRAME_QP caps have default value as MIN_QP_10BIT values. + * Hence, if client sets either one among MIN_FRAME_QP + * and (I_FRAME_MIN_QP or P_FRAME_MIN_QP or B_FRAME_MIN_QP), + * max of both caps will result into client set value. + */ + i_frame_qp = max(capability->cap[I_FRAME_MIN_QP].value, + capability->cap[MIN_FRAME_QP].value) + offset; + p_frame_qp = max(capability->cap[P_FRAME_MIN_QP].value, + capability->cap[MIN_FRAME_QP].value) + offset; + b_frame_qp = max(capability->cap[B_FRAME_MIN_QP].value, + capability->cap[MIN_FRAME_QP].value) + offset; + + hfi_value = i_frame_qp | p_frame_qp << 8 | b_frame_qp << 16 | + client_qp_enable << 24; + + rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_32_PACKED, + &hfi_value, sizeof(u32), __func__); + if (rc) + return rc; + + return rc; +} + +int msm_vidc_set_max_qp(void *instance, + enum msm_vidc_inst_capability_type cap_id) +{ + int rc = 0; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; + struct msm_vidc_inst_capability *capability; + s32 i_frame_qp = 0, p_frame_qp = 0, b_frame_qp = 0, max_qp_enable = 0; + u32 i_qp_enable = 0, p_qp_enable = 0, b_qp_enable = 0; + u32 client_qp_enable = 0, hfi_value = 0, offset = 0; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + if (capability->cap[MAX_FRAME_QP].flags & CAP_FLAG_CLIENT_SET) + max_qp_enable = 1; + + if (max_qp_enable || + (capability->cap[I_FRAME_MAX_QP].flags & CAP_FLAG_CLIENT_SET)) + i_qp_enable = 1; + if (max_qp_enable || + (capability->cap[P_FRAME_MAX_QP].flags & CAP_FLAG_CLIENT_SET)) + p_qp_enable = 1; + if (max_qp_enable || + (capability->cap[B_FRAME_MAX_QP].flags & CAP_FLAG_CLIENT_SET)) + b_qp_enable = 1; + + client_qp_enable = i_qp_enable | p_qp_enable << 1 | b_qp_enable << 2; + if (!client_qp_enable) { + i_vpr_h(inst, + "%s: client did not set max qp, cap %s is not set\n", + __func__, cap_name(cap_id)); + return 0; + } + + if (is_10bit_colorformat(capability->cap[PIX_FMTS].value)) + offset = 12; + + /* + * I_FRAME_MAX_QP, P_FRAME_MAX_QP, B_FRAME_MAX_QP, + * MAX_FRAME_QP caps have default value as MAX_QP values. + * Hence, if client sets either one among MAX_FRAME_QP + * and (I_FRAME_MAX_QP or P_FRAME_MAX_QP or B_FRAME_MAX_QP), + * min of both caps will result into client set value. + */ + i_frame_qp = min(capability->cap[I_FRAME_MAX_QP].value, + capability->cap[MAX_FRAME_QP].value) + offset; + p_frame_qp = min(capability->cap[P_FRAME_MAX_QP].value, + capability->cap[MAX_FRAME_QP].value) + offset; + b_frame_qp = min(capability->cap[B_FRAME_MAX_QP].value, + capability->cap[MAX_FRAME_QP].value) + offset; + + hfi_value = i_frame_qp | p_frame_qp << 8 | b_frame_qp << 16 | + client_qp_enable << 24; + + rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_32_PACKED, + &hfi_value, sizeof(u32), __func__); + if (rc) + return rc; + + return rc; +} + +int msm_vidc_set_frame_qp(void *instance, + enum msm_vidc_inst_capability_type cap_id) +{ + int rc = 0; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; + struct msm_vidc_inst_capability *capab; + s32 i_frame_qp = 0, p_frame_qp = 0, b_frame_qp = 0; + u32 i_qp_enable = 0, p_qp_enable = 0, b_qp_enable = 0; + u32 client_qp_enable = 0, hfi_value = 0, offset = 0; + s32 rc_type = -1; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capab = inst->capabilities; + + if (msm_vidc_get_parent_value(inst, cap_id, + BITRATE_MODE, &rc_type, __func__)) + return -EINVAL; + + if (inst->bufq[OUTPUT_PORT].vb2q->streaming) { + if (rc_type != HFI_RC_OFF) { + i_vpr_h(inst, + "%s: dynamic qp not allowed for rc type %d\n", + __func__, rc_type); + return 0; + } + } + + if (rc_type == HFI_RC_OFF) { + /* Mandatorily set for rc off case */ + i_qp_enable = p_qp_enable = b_qp_enable = 1; + } else { + /* Set only if client has set for NON rc off case */ + if (capab->cap[I_FRAME_QP].flags & CAP_FLAG_CLIENT_SET) + i_qp_enable = 1; + if (capab->cap[P_FRAME_QP].flags & CAP_FLAG_CLIENT_SET) + p_qp_enable = 1; + if (capab->cap[B_FRAME_QP].flags & CAP_FLAG_CLIENT_SET) + b_qp_enable = 1; + } + + client_qp_enable = i_qp_enable | p_qp_enable << 1 | b_qp_enable << 2; + if (!client_qp_enable) { + i_vpr_h(inst, + "%s: client did not set frame qp, cap %s is not set\n", + __func__, cap_name(cap_id)); + return 0; + } + + if (is_10bit_colorformat(capab->cap[PIX_FMTS].value)) + offset = 12; + + i_frame_qp = capab->cap[I_FRAME_QP].value + offset; + p_frame_qp = capab->cap[P_FRAME_QP].value + offset; + b_frame_qp = capab->cap[B_FRAME_QP].value + offset; + + hfi_value = i_frame_qp | p_frame_qp << 8 | b_frame_qp << 16 | + client_qp_enable << 24; + + rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_32_PACKED, + &hfi_value, sizeof(u32), __func__); + if (rc) + return rc; + + return rc; +} + +int msm_vidc_set_req_sync_frame(void *instance, + enum msm_vidc_inst_capability_type cap_id) +{ + int rc = 0; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; + s32 prepend_spspps; + u32 hfi_value = 0; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + prepend_spspps = inst->capabilities->cap[PREPEND_SPSPPS_TO_IDR].value; + if (prepend_spspps) + hfi_value = HFI_SYNC_FRAME_REQUEST_WITH_PREFIX_SEQ_HDR; + else + hfi_value = HFI_SYNC_FRAME_REQUEST_WITHOUT_SEQ_HDR; + + rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32_ENUM, + &hfi_value, sizeof(u32), __func__); + if (rc) + return rc; + + return rc; +} + +int msm_vidc_set_chroma_qp_index_offset(void *instance, + enum msm_vidc_inst_capability_type cap_id) +{ + int rc = 0; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; + u32 hfi_value = 0, chroma_qp_offset_mode = 0, chroma_qp = 0; + u32 offset = 12; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (inst->capabilities->cap[cap_id].flags & CAP_FLAG_CLIENT_SET) + chroma_qp_offset_mode = HFI_FIXED_CHROMAQP_OFFSET; + else + chroma_qp_offset_mode = HFI_ADAPTIVE_CHROMAQP_OFFSET; + + chroma_qp = inst->capabilities->cap[cap_id].value + offset; + hfi_value = chroma_qp_offset_mode | chroma_qp << 8 | chroma_qp << 16; + + rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_32_PACKED, + &hfi_value, sizeof(u32), __func__); + if (rc) + return rc; + + return rc; +} + +int msm_vidc_set_slice_count(void *instance, + enum msm_vidc_inst_capability_type cap_id) +{ + int rc = 0; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; + s32 slice_mode = -1; + u32 hfi_value = 0, set_cap_id = 0; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + slice_mode = inst->capabilities->cap[SLICE_MODE].value; + + if (slice_mode == V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE) { + i_vpr_h(inst, "%s: slice mode is: %u, ignore setting to fw\n", + __func__, slice_mode); + return 0; + } + if (slice_mode == V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_MB) { + hfi_value = (inst->codec == MSM_VIDC_HEVC) ? + ((inst->capabilities->cap[SLICE_MAX_MB].value + 3) / 4) : + inst->capabilities->cap[SLICE_MAX_MB].value; + set_cap_id = SLICE_MAX_MB; + } else if (slice_mode == V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_BYTES) { + hfi_value = inst->capabilities->cap[SLICE_MAX_BYTES].value; + set_cap_id = SLICE_MAX_BYTES; + } + + rc = msm_vidc_packetize_control(inst, set_cap_id, HFI_PAYLOAD_U32, + &hfi_value, sizeof(u32), __func__); + if (rc) + return rc; + + return rc; +} + +int msm_vidc_set_nal_length(void *instance, + enum msm_vidc_inst_capability_type cap_id) +{ + int rc = 0; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; + u32 hfi_value = HFI_NAL_LENGTH_STARTCODES; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (!inst->capabilities->cap[WITHOUT_STARTCODE].value) { + hfi_value = HFI_NAL_LENGTH_STARTCODES; + } else { + rc = msm_vidc_v4l2_to_hfi_enum(inst, NAL_LENGTH_FIELD, &hfi_value); + if (rc) + return -EINVAL; + } + + rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32_ENUM, + &hfi_value, sizeof(u32), __func__); + if (rc) + return rc; + + return rc; +} + +int msm_vidc_set_layer_count_and_type(void *instance, + enum msm_vidc_inst_capability_type cap_id) +{ + int rc = 0; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; + u32 hfi_layer_count, hfi_layer_type = 0; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (!inst->bufq[OUTPUT_PORT].vb2q->streaming) { + /* set layer type */ + hfi_layer_type = inst->hfi_layer_type; + cap_id = LAYER_TYPE; + + rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32_ENUM, + &hfi_layer_type, sizeof(u32), __func__); + if (rc) + goto exit; + } else { + if (inst->hfi_layer_type == HFI_HIER_B) { + i_vpr_l(inst, + "%s: HB dyn layers change is not supported\n", + __func__); + return 0; + } + } + + /* set layer count */ + cap_id = ENH_LAYER_COUNT; + /* hfi baselayer starts from 1 */ + hfi_layer_count = inst->capabilities->cap[ENH_LAYER_COUNT].value + 1; + + rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32, + &hfi_layer_count, sizeof(u32), __func__); + if (rc) + goto exit; + +exit: + return rc; +} + +int msm_vidc_set_gop_size(void *instance, + enum msm_vidc_inst_capability_type cap_id) +{ + int rc = 0; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; + u32 hfi_value; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (inst->bufq[OUTPUT_PORT].vb2q->streaming) { + if (inst->hfi_layer_type == HFI_HIER_B) { + i_vpr_l(inst, + "%s: HB dyn GOP setting is not supported\n", + __func__); + return 0; + } + } + + hfi_value = inst->capabilities->cap[GOP_SIZE].value; + + rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32, + &hfi_value, sizeof(u32), __func__); + if (rc) + return rc; + + return rc; +} + +int msm_vidc_set_bitrate(void *instance, + enum msm_vidc_inst_capability_type cap_id) +{ + int rc = 0, i; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; + u32 hfi_value = 0; + s32 rc_type = -1, enh_layer_count = -1; + u32 layer_br_caps[6] = {L0_BR, L1_BR, L2_BR, L3_BR, L4_BR, L5_BR}; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + /* set Total Bitrate */ + if (inst->capabilities->cap[BIT_RATE].flags & CAP_FLAG_CLIENT_SET) + goto set_total_bitrate; + + /* + * During runtime, if BIT_RATE cap CLIENT_SET flag is not set, + * then this function will be called due to change in ENH_LAYER_COUNT. + * In this case, client did not change bitrate, hence, no need to set + * to fw. + */ + if (inst->bufq[OUTPUT_PORT].vb2q->streaming) + return 0; + + if (msm_vidc_get_parent_value(inst, BIT_RATE, + BITRATE_MODE, &rc_type, __func__)) + return -EINVAL; + + if (rc_type != HFI_RC_CBR_CFR && rc_type != HFI_RC_CBR_VFR) { + i_vpr_h(inst, "%s: set total bitrate for non CBR rc type\n", + __func__); + goto set_total_bitrate; + } + + if (msm_vidc_get_parent_value(inst, BIT_RATE, + ENH_LAYER_COUNT, &enh_layer_count, __func__)) + return -EINVAL; + + /* + * ENH_LAYER_COUNT cap max is positive only if + * layer encoding is enabled during streamon. + */ + if (inst->capabilities->cap[ENH_LAYER_COUNT].max) { + if (!msm_vidc_check_all_layer_bitrate_set(inst)) + goto set_total_bitrate; + + /* set Layer Bitrate */ + for (i = 0; i <= enh_layer_count; i++) { + if (i >= ARRAY_SIZE(layer_br_caps)) + break; + cap_id = layer_br_caps[i]; + hfi_value = inst->capabilities->cap[cap_id].value; + rc = msm_vidc_packetize_control(inst, cap_id, + HFI_PAYLOAD_U32, &hfi_value, + sizeof(u32), __func__); + if (rc) + return rc; + } + goto exit; + } + +set_total_bitrate: + hfi_value = inst->capabilities->cap[BIT_RATE].value; + rc = msm_vidc_packetize_control(inst, BIT_RATE, HFI_PAYLOAD_U32, + &hfi_value, sizeof(u32), __func__); + if (rc) + return rc; +exit: + return rc; +} + +int msm_vidc_set_dynamic_layer_bitrate(void *instance, + enum msm_vidc_inst_capability_type cap_id) +{ + int rc = 0; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; + u32 hfi_value = 0; + s32 rc_type = -1; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (!inst->bufq[OUTPUT_PORT].vb2q->streaming) + return 0; + + /* set Total Bitrate */ + if (inst->capabilities->cap[BIT_RATE].flags & CAP_FLAG_CLIENT_SET) { + i_vpr_h(inst, + "%s: Total bitrate is set, ignore layer bitrate\n", + __func__); + return 0; + } + + /* + * ENH_LAYER_COUNT cap max is positive only if + * layer encoding is enabled during streamon. + */ + if (!inst->capabilities->cap[ENH_LAYER_COUNT].max || + !msm_vidc_check_all_layer_bitrate_set(inst)) { + i_vpr_h(inst, + "%s: invalid layer bitrate, ignore setting to fw\n", + __func__); + return 0; + } + + if (inst->hfi_rc_type == HFI_RC_CBR_CFR || + rc_type == HFI_RC_CBR_VFR) { + /* set layer bitrate for the client set layer */ + hfi_value = inst->capabilities->cap[cap_id].value; + rc = msm_vidc_packetize_control(inst, cap_id, + HFI_PAYLOAD_U32, &hfi_value, + sizeof(u32), __func__); + if (rc) + return rc; + } else { + /* + * All layer bitartes set for unsupported rc type. + * Hence accept layer bitrates, but set total bitrate prop + * with cumulative bitrate. + */ + hfi_value = inst->capabilities->cap[BIT_RATE].value; + rc = msm_vidc_packetize_control(inst, BIT_RATE, HFI_PAYLOAD_U32, + &hfi_value, sizeof(u32), __func__); + if (rc) + return rc; + } + + return rc; +} + +int msm_vidc_set_session_priority(void *instance, + enum msm_vidc_inst_capability_type cap_id) +{ + int rc = 0; + u32 hfi_value = 0; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + hfi_value = inst->capabilities->cap[cap_id].value; + if (!is_critical_priority_session(inst)) + hfi_value = inst->capabilities->cap[cap_id].value + + inst->capabilities->cap[FIRMWARE_PRIORITY_OFFSET].value; + + rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32, + &hfi_value, sizeof(u32), __func__); + if (rc) + return rc; + + return rc; +} + +int msm_vidc_set_flip(void *instance, + enum msm_vidc_inst_capability_type cap_id) +{ + int rc = 0; + u32 hflip, vflip, hfi_value = HFI_DISABLE_FLIP; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + hflip = inst->capabilities->cap[HFLIP].value; + vflip = inst->capabilities->cap[VFLIP].value; + + if (hflip) + hfi_value |= HFI_HORIZONTAL_FLIP; + + if (vflip) + hfi_value |= HFI_VERTICAL_FLIP; + + if (inst->bufq[OUTPUT_PORT].vb2q->streaming) { + if (hfi_value != HFI_DISABLE_FLIP) { + rc = msm_vidc_set_req_sync_frame(inst, + REQUEST_I_FRAME); + if (rc) + return rc; + } + } + + rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32_ENUM, + &hfi_value, sizeof(u32), __func__); + if (rc) + return rc; + + return rc; +} + +int msm_vidc_set_preprocess(void *instance, + enum msm_vidc_inst_capability_type cap_id) +{ + int rc = 0; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; + u32 hfi_value; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32_ENUM, + &hfi_value, sizeof(u32), __func__); + if (rc) + return rc; + + return rc; +} + +int msm_vidc_set_rotation(void *instance, + enum msm_vidc_inst_capability_type cap_id) +{ + int rc = 0; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; + u32 hfi_value; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + rc = msm_vidc_v4l2_to_hfi_enum(inst, cap_id, &hfi_value); + if (rc) + return -EINVAL; + + rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32, + &hfi_value, sizeof(u32), __func__); + if (rc) + return rc; + + return rc; +} + +int msm_vidc_set_blur_resolution(void *instance, + enum msm_vidc_inst_capability_type cap_id) +{ + int rc = 0; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; + s32 blur_type = -1; + u32 hfi_value, blur_width, blur_height; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (msm_vidc_get_parent_value(inst, cap_id, + BLUR_TYPES, &blur_type, __func__)) + return -EINVAL; + + if (blur_type != MSM_VIDC_BLUR_EXTERNAL) + return 0; + + hfi_value = inst->capabilities->cap[cap_id].value; + + blur_width = (hfi_value & 0xFFFF0000) >> 16; + blur_height = hfi_value & 0xFFFF; + + if (blur_width > inst->crop.width || + blur_height > inst->crop.height) { + i_vpr_e(inst, + "%s: blur wxh: %dx%d exceeds crop wxh: %dx%d\n", + __func__, blur_width, blur_height, + inst->crop.width, inst->crop.height); + hfi_value = 0; + } + + if (blur_width == inst->crop.width && + blur_height == inst->crop.height) { + i_vpr_e(inst, + "%s: blur wxh: %dx%d is equal to crop wxh: %dx%d\n", + __func__, blur_width, blur_height, + inst->crop.width, inst->crop.height); + hfi_value = 0; + } + + rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_32_PACKED, + &hfi_value, sizeof(u32), __func__); + if (rc) + return rc; + + return rc; +} + +static int msm_venc_set_csc_coeff(struct msm_vidc_inst *inst, + const char *prop_name, u32 hfi_id, void *payload, + u32 payload_size, u32 row_count, u32 column_count) +{ + int rc = 0; + + i_vpr_h(inst, + "set cap: name: %24s, hard coded %dx%d matrix array\n", + prop_name, row_count, column_count); + rc = venus_hfi_session_property(inst, + hfi_id, + HFI_HOST_FLAGS_NONE, + HFI_PORT_BITSTREAM, + HFI_PAYLOAD_S32_ARRAY, + payload, + payload_size); + if (rc) { + i_vpr_e(inst, + "%s: failed to set %s to fw\n", + __func__, prop_name); + } + + return rc; +} +int msm_vidc_set_csc_custom_matrix(void *instance, + enum msm_vidc_inst_capability_type cap_id) +{ + int rc = 0; + int i; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; + struct msm_vidc_core *core; + struct msm_vidc_csc_coeff *csc_coeff; + s32 matrix_payload[MAX_MATRIX_COEFFS + 2]; + s32 csc_bias_payload[MAX_BIAS_COEFFS + 2]; + s32 csc_limit_payload[MAX_LIMIT_COEFFS + 2]; + + if (!inst || !inst->capabilities || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + core = inst->core; + if (!core->platform) { + d_vpr_e("%s: invalid core platform\n", __func__); + return -EINVAL; + } + csc_coeff = &core->platform->data.csc_data; + + if (!inst->capabilities->cap[cap_id].value || + !inst->capabilities->cap[CSC].value) { + i_vpr_h(inst, + "%s: ignored as custom martix %u, csc %u\n", + __func__, inst->capabilities->cap[cap_id].value, + inst->capabilities->cap[CSC].value); + return 0; + } + + /* + * first 2 u32's of payload in each case are for + * row and column count, next remaining u32's are + * for the actual payload values. + */ + + /* set custom matrix */ + matrix_payload[0] = 3; + matrix_payload[1] = 3; + + for (i = 0; i < MAX_MATRIX_COEFFS; i++) { + if ((i + 2) >= ARRAY_SIZE(matrix_payload)) + break; + matrix_payload[i + 2] = + csc_coeff->vpe_csc_custom_matrix_coeff[i]; + } + + rc = msm_venc_set_csc_coeff(inst, "CSC_CUSTOM_MATRIX", + HFI_PROP_CSC_MATRIX, &matrix_payload[0], + ARRAY_SIZE(matrix_payload) * sizeof(s32), + matrix_payload[0], matrix_payload[1]); + if (rc) + return rc; + + /* set csc bias */ + csc_bias_payload[0] = 1; + csc_bias_payload[1] = 3; + + for (i = 0; i < MAX_BIAS_COEFFS; i++) { + if ((i + 2) >= ARRAY_SIZE(csc_bias_payload)) + break; + csc_bias_payload[i + 2] = + csc_coeff->vpe_csc_custom_bias_coeff[i]; + } + + rc = msm_venc_set_csc_coeff(inst, "CSC_BIAS", + HFI_PROP_CSC_BIAS, &csc_bias_payload[0], + ARRAY_SIZE(csc_bias_payload) * sizeof(s32), + csc_bias_payload[0], csc_bias_payload[1]); + if (rc) + return rc; + + /* set csc limit */ + csc_limit_payload[0] = 1; + csc_limit_payload[1] = 6; + + for (i = 0; i < MAX_LIMIT_COEFFS; i++) { + if ((i + 2) >= ARRAY_SIZE(csc_limit_payload)) + break; + csc_limit_payload[i + 2] = + csc_coeff->vpe_csc_custom_limit_coeff[i]; + } + + rc = msm_venc_set_csc_coeff(inst, "CSC_LIMIT", + HFI_PROP_CSC_LIMIT, &csc_limit_payload[0], + ARRAY_SIZE(csc_limit_payload) * sizeof(s32), + csc_limit_payload[0], csc_limit_payload[1]); + if (rc) + return rc; + + return rc; +} + +int msm_vidc_set_reserve_duration(void *instance, + enum msm_vidc_inst_capability_type cap_id) +{ + int rc = 0; + u32 hfi_value = 0; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + /* reserve hardware only when input port is streaming*/ + if (!inst->bufq[INPUT_PORT].vb2q->streaming) + return 0; + + if (!(inst->capabilities->cap[cap_id].flags & CAP_FLAG_CLIENT_SET)) + return 0; + + inst->capabilities->cap[cap_id].flags &= (~CAP_FLAG_CLIENT_SET); + + if (!is_critical_priority_session(inst)) { + i_vpr_h(inst, "%s: reserve duration allowed only for critical session\n", __func__); + return 0; + } + + hfi_value = inst->capabilities->cap[cap_id].value; + + rc = venus_hfi_reserve_hardware(inst, hfi_value); + if (rc) + return rc; + + return rc; +} + +int msm_vidc_set_level(void *instance, + enum msm_vidc_inst_capability_type cap_id) +{ + int rc = 0; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; + u32 hfi_value = 0; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + hfi_value = inst->capabilities->cap[cap_id].value; + if (!(inst->capabilities->cap[cap_id].flags & CAP_FLAG_CLIENT_SET)) + hfi_value = HFI_LEVEL_NONE; + + rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32_ENUM, + &hfi_value, sizeof(u32), __func__); + if (rc) + return rc; + + return rc; +} + +int msm_vidc_set_q16(void *instance, + enum msm_vidc_inst_capability_type cap_id) +{ + int rc = 0; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; + u32 hfi_value = 0; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + hfi_value = inst->capabilities->cap[cap_id].value; + + rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_Q16, + &hfi_value, sizeof(u32), __func__); + if (rc) + return rc; + + return rc; +} + +int msm_vidc_set_u32(void *instance, + enum msm_vidc_inst_capability_type cap_id) +{ + int rc = 0; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; + u32 hfi_value; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (inst->capabilities->cap[cap_id].flags & CAP_FLAG_MENU) { + rc = msm_vidc_v4l2_menu_to_hfi(inst, cap_id, &hfi_value); + if (rc) + return -EINVAL; + } else { + hfi_value = inst->capabilities->cap[cap_id].value; + } + + rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32, + &hfi_value, sizeof(u32), __func__); + if (rc) + return rc; + + return rc; +} + +int msm_vidc_set_u32_packed(void *instance, + enum msm_vidc_inst_capability_type cap_id) +{ + int rc = 0; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; + u32 hfi_value; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (inst->capabilities->cap[cap_id].flags & CAP_FLAG_MENU) { + rc = msm_vidc_v4l2_menu_to_hfi(inst, cap_id, &hfi_value); + if (rc) + return -EINVAL; + } else { + hfi_value = inst->capabilities->cap[cap_id].value; + } + + rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_32_PACKED, + &hfi_value, sizeof(u32), __func__); + if (rc) + return rc; + + return rc; +} + +int msm_vidc_set_u32_enum(void *instance, + enum msm_vidc_inst_capability_type cap_id) +{ + int rc = 0; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; + u32 hfi_value; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + rc = msm_vidc_v4l2_to_hfi_enum(inst, cap_id, &hfi_value); + if (rc) + return -EINVAL; + + rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32_ENUM, + &hfi_value, sizeof(u32), __func__); + if (rc) + return rc; + + return rc; +} + +int msm_vidc_set_s32(void *instance, + enum msm_vidc_inst_capability_type cap_id) +{ + int rc = 0; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; + s32 hfi_value = 0; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + hfi_value = inst->capabilities->cap[cap_id].value; + + rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_S32, + &hfi_value, sizeof(s32), __func__); + if (rc) + return rc; + + return rc; +} + +int msm_vidc_set_stage(void *instance, + enum msm_vidc_inst_capability_type cap_id) +{ + int rc = 0; + u32 stage = 0; + struct msm_vidc_core *core; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; + + if (!inst || !inst->capabilities || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + core = inst->core; + + rc = call_session_op(core, decide_work_mode, inst); + if (rc) { + i_vpr_e(inst, "%s: decide_work_mode failed\n", __func__); + return -EINVAL; + } + + stage = inst->capabilities->cap[STAGE].value; + + rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32, + &stage, sizeof(u32), __func__); + if (rc) + return rc; + + return rc; +} + +int msm_vidc_set_pipe(void *instance, + enum msm_vidc_inst_capability_type cap_id) +{ + int rc = 0; + u32 pipe; + struct msm_vidc_core *core; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; + + if (!inst || !inst->capabilities || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + core = inst->core; + + rc = call_session_op(core, decide_work_route, inst); + if (rc) { + i_vpr_e(inst, "%s: decide_work_route failed\n", + __func__); + return -EINVAL; + } + + pipe = inst->capabilities->cap[PIPE].value; + rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32, + &pipe, sizeof(u32), __func__); + if (rc) + return rc; + + return rc; +} + +int msm_vidc_set_vui_timing_info(void *instance, + enum msm_vidc_inst_capability_type cap_id) +{ + int rc = 0; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; + u32 hfi_value; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + /* + * hfi is HFI_PROP_DISABLE_VUI_TIMING_INFO and v4l2 cap is + * V4L2_CID_MPEG_VIDC_VUI_TIMING_INFO and hence reverse + * the hfi_value from cap_id value. + */ + if (inst->capabilities->cap[cap_id].value == 1) + hfi_value = 0; + else + hfi_value = 1; + + rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32, + &hfi_value, sizeof(u32), __func__); + if (rc) + return rc; + + return rc; +} + +/********************* End of Control Set functions **************************/ diff --git a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c index 96e4feaa78..c0b3a5d78a 100644 --- a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c @@ -12,7 +12,7 @@ #include "msm_vidc_driver.h" #include "msm_vidc_debug.h" #include "msm_media_info.h" -#include "msm_vidc_control.h" +#include "msm_vidc_platform.h" static u32 msm_vidc_decoder_bin_size_iris2(struct msm_vidc_inst *inst) { diff --git a/driver/variant/iris2/src/msm_vidc_iris2.c b/driver/variant/iris2/src/msm_vidc_iris2.c index e365d2c0c4..dc7eb96410 100644 --- a/driver/variant/iris2/src/msm_vidc_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_iris2.c @@ -9,11 +9,10 @@ #include "msm_vidc_inst.h" #include "msm_vidc_core.h" #include "msm_vidc_driver.h" -#include "msm_vidc_control.h" +#include "msm_vidc_plaform.h" #include "msm_vidc_internal.h" #include "msm_vidc_buffer.h" #include "msm_vidc_debug.h" -#include "msm_vidc_control.h" #include "msm_vidc_variant.h" #define VIDEO_ARCH_LX 1 diff --git a/driver/variant/iris3/src/msm_vidc_buffer_iris3.c b/driver/variant/iris3/src/msm_vidc_buffer_iris3.c index 5fb631f554..329781217b 100644 --- a/driver/variant/iris3/src/msm_vidc_buffer_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_buffer_iris3.c @@ -13,7 +13,7 @@ #include "msm_vidc_driver.h" #include "msm_vidc_debug.h" #include "msm_media_info.h" -#include "msm_vidc_control.h" +#include "msm_vidc_platform.h" static u32 msm_vidc_decoder_bin_size_iris3(struct msm_vidc_inst *inst) { diff --git a/driver/variant/iris3/src/msm_vidc_iris3.c b/driver/variant/iris3/src/msm_vidc_iris3.c index 6dd48d6fab..ed9895db84 100644 --- a/driver/variant/iris3/src/msm_vidc_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_iris3.c @@ -11,7 +11,7 @@ #include "msm_vidc_inst.h" #include "msm_vidc_core.h" #include "msm_vidc_driver.h" -#include "msm_vidc_control.h" +#include "msm_vidc_platform.h" #include "msm_vidc_internal.h" #include "msm_vidc_buffer.h" #include "msm_vidc_debug.h" diff --git a/driver/variant/iris33/src/msm_vidc_buffer_iris33.c b/driver/variant/iris33/src/msm_vidc_buffer_iris33.c index 931fe85255..9fb9ba882c 100644 --- a/driver/variant/iris33/src/msm_vidc_buffer_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_buffer_iris33.c @@ -13,7 +13,7 @@ #include "msm_vidc_driver.h" #include "msm_vidc_debug.h" #include "msm_media_info.h" -#include "msm_vidc_control.h" +#include "msm_vidc_platform.h" static u32 msm_vidc_decoder_bin_size_iris33(struct msm_vidc_inst *inst) { diff --git a/driver/variant/iris33/src/msm_vidc_iris33.c b/driver/variant/iris33/src/msm_vidc_iris33.c index c4182861b4..02cbdac651 100644 --- a/driver/variant/iris33/src/msm_vidc_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_iris33.c @@ -11,7 +11,7 @@ #include "msm_vidc_inst.h" #include "msm_vidc_core.h" #include "msm_vidc_driver.h" -#include "msm_vidc_control.h" +#include "msm_vidc_platform.h" #include "msm_vidc_internal.h" #include "msm_vidc_buffer.h" #include "msm_vidc_debug.h" diff --git a/driver/vidc/inc/msm_vidc_control.h b/driver/vidc/inc/msm_vidc_control.h index 277db6da37..ac549e05dd 100644 --- a/driver/vidc/inc/msm_vidc_control.h +++ b/driver/vidc/inc/msm_vidc_control.h @@ -14,128 +14,9 @@ int msm_vidc_ctrl_init(struct msm_vidc_inst *inst); int msm_vidc_ctrl_deinit(struct msm_vidc_inst *inst); int msm_v4l2_op_s_ctrl(struct v4l2_ctrl *ctrl); int msm_v4l2_op_g_volatile_ctrl(struct v4l2_ctrl *ctrl); -int msm_vidc_adjust_bitrate(void *instance, struct v4l2_ctrl *ctrl); -int msm_vidc_adjust_dynamic_layer_bitrate(void *instance, struct v4l2_ctrl *ctrl); -int msm_vidc_adjust_bitrate_mode(void *instance, struct v4l2_ctrl *ctrl); -int msm_vidc_adjust_entropy_mode(void *instance, struct v4l2_ctrl *ctrl); -int msm_vidc_adjust_profile(void *instance, struct v4l2_ctrl *ctrl); -int msm_vidc_adjust_ltr_count(void *instance, struct v4l2_ctrl *ctrl); -int msm_vidc_adjust_use_ltr(void *instance, struct v4l2_ctrl *ctrl); -int msm_vidc_adjust_mark_ltr(void *instance, struct v4l2_ctrl *ctrl); -int msm_vidc_adjust_delta_based_rc(void *instance, struct v4l2_ctrl *ctrl); -int msm_vidc_adjust_output_order(void *instance, struct v4l2_ctrl *ctrl); -int msm_vidc_adjust_input_buf_host_max_count(void *instance, struct v4l2_ctrl *ctrl); -int msm_vidc_adjust_output_buf_host_max_count(void *instance, struct v4l2_ctrl *ctrl); -int msm_vidc_adjust_transform_8x8(void *instance, struct v4l2_ctrl *ctrl); -int msm_vidc_adjust_chroma_qp_index_offset(void *instance, - struct v4l2_ctrl *ctrl); -int msm_vidc_adjust_slice_count(void *instance, struct v4l2_ctrl *ctrl); -int msm_vidc_adjust_layer_count(void *instance, struct v4l2_ctrl *ctrl); -int msm_vidc_adjust_gop_size(void *instance, struct v4l2_ctrl *ctrl); -int msm_vidc_adjust_b_frame(void *instance, struct v4l2_ctrl *ctrl); -int msm_vidc_adjust_peak_bitrate(void *instance, struct v4l2_ctrl *ctrl); -int msm_vidc_adjust_hevc_min_qp(void *instance, struct v4l2_ctrl *ctrl); -int msm_vidc_adjust_hevc_max_qp(void *instance, struct v4l2_ctrl *ctrl); -int msm_vidc_adjust_hevc_i_frame_qp(void *instance, struct v4l2_ctrl *ctrl); -int msm_vidc_adjust_hevc_p_frame_qp(void *instance, struct v4l2_ctrl *ctrl); -int msm_vidc_adjust_hevc_b_frame_qp(void *instance, struct v4l2_ctrl *ctrl); -int msm_vidc_adjust_blur_type(void *instance, struct v4l2_ctrl *ctrl); -int msm_vidc_adjust_blur_resolution(void *instance, struct v4l2_ctrl *ctrl); -int msm_vidc_adjust_brs(void *instance, struct v4l2_ctrl *ctrl); -int msm_vidc_adjust_bitrate_boost(void *instance, struct v4l2_ctrl *ctrl); -int msm_vidc_adjust_min_quality(void *instance, struct v4l2_ctrl *ctrl); -int msm_vidc_adjust_enc_lowlatency_mode(void *instance, struct v4l2_ctrl *ctrl); -int msm_vidc_adjust_dec_lowlatency_mode(void *instance, struct v4l2_ctrl *ctrl); -int msm_vidc_adjust_set_v4l2_properties(struct msm_vidc_inst *inst); int msm_vidc_prepare_dependency_list(struct msm_vidc_inst *inst); -int msm_vidc_adjust_session_priority(void *instance, struct v4l2_ctrl *ctrl); -int msm_vidc_adjust_roi_info(void *instance, struct v4l2_ctrl *ctrl); -int msm_vidc_adjust_all_intra(void *instance, struct v4l2_ctrl *ctrl); -int msm_vidc_adjust_dec_outbuf_fence(void *instance, struct v4l2_ctrl *ctrl); -int msm_vidc_adjust_dec_slice_mode(void *instance, struct v4l2_ctrl *ctrl); -int msm_vidc_adjust_preprocess(void *instance, struct v4l2_ctrl *ctrl); - -int msm_vidc_set_header_mode(void *instance, - enum msm_vidc_inst_capability_type cap_id); -int msm_vidc_set_deblock_mode(void *instance, - enum msm_vidc_inst_capability_type cap_id); -int msm_vidc_set_min_qp(void *instance, - enum msm_vidc_inst_capability_type cap_id); -int msm_vidc_set_max_qp(void *instance, - enum msm_vidc_inst_capability_type cap_id); -int msm_vidc_set_frame_qp(void *instance, - enum msm_vidc_inst_capability_type cap_id); -int msm_vidc_set_req_sync_frame(void *instance, - enum msm_vidc_inst_capability_type cap_id); -int msm_vidc_set_chroma_qp_index_offset(void *instance, - enum msm_vidc_inst_capability_type cap_id); -int msm_vidc_set_slice_count(void* instance, - enum msm_vidc_inst_capability_type cap_id); -int msm_vidc_set_layer_count_and_type(void *instance, - enum msm_vidc_inst_capability_type cap_id); -int msm_vidc_set_gop_size(void *instance, - enum msm_vidc_inst_capability_type cap_id); -int msm_vidc_set_bitrate(void *instance, - enum msm_vidc_inst_capability_type cap_id); -int msm_vidc_set_dynamic_layer_bitrate(void *instance, - enum msm_vidc_inst_capability_type cap_id); -int msm_vidc_set_u32(void *instance, - enum msm_vidc_inst_capability_type cap_id); -int msm_vidc_set_u32_packed(void *instance, - enum msm_vidc_inst_capability_type cap_id); -int msm_vidc_set_u32_enum(void *instance, - enum msm_vidc_inst_capability_type cap_id); -int msm_vidc_set_constant_quality(void *instance, - enum msm_vidc_inst_capability_type cap_id); -int msm_vidc_set_vbr_related_properties( - void *instance, enum msm_vidc_inst_capability_type cap_id); -int msm_vidc_set_cbr_related_properties(void *instance, - enum msm_vidc_inst_capability_type cap_id); -int msm_vidc_set_use_and_mark_ltr(void *instance, - enum msm_vidc_inst_capability_type cap_id); -int msm_vidc_set_nal_length(void* instance, - enum msm_vidc_inst_capability_type cap_id); -int msm_vidc_set_session_priority(void *instance, - enum msm_vidc_inst_capability_type cap_id); -int msm_vidc_set_flip(void *instance, - enum msm_vidc_inst_capability_type cap_id); -int msm_vidc_set_rotation(void *instance, - enum msm_vidc_inst_capability_type cap_id); -int msm_vidc_set_blur_resolution(void *instance, - enum msm_vidc_inst_capability_type cap_id); -int msm_vidc_set_stage(void *instance, - enum msm_vidc_inst_capability_type cap_id); -int msm_vidc_set_pipe(void *instance, - enum msm_vidc_inst_capability_type cap_id); -int msm_vidc_set_csc_custom_matrix(void *instance, - enum msm_vidc_inst_capability_type cap_id); -int msm_vidc_set_level(void *instance, - enum msm_vidc_inst_capability_type cap_id); -int msm_vidc_set_preprocess(void *instance, - enum msm_vidc_inst_capability_type cap_id); -int msm_vidc_set_reserve_duration(void *instance, - enum msm_vidc_inst_capability_type cap_id); -int msm_vidc_set_q16(void *instance, - enum msm_vidc_inst_capability_type cap_id); -int msm_vidc_v4l2_menu_to_hfi(struct msm_vidc_inst *inst, - enum msm_vidc_inst_capability_type cap_id, u32 *value); -int msm_vidc_packetize_control(struct msm_vidc_inst *inst, - enum msm_vidc_inst_capability_type cap_id, u32 payload_type, - void *hfi_val, u32 payload_size, const char *func); -bool is_parent_available(struct msm_vidc_inst *inst, - u32 cap_id, u32 check_parent, const char *func); +int msm_vidc_adjust_set_v4l2_properties(struct msm_vidc_inst *inst); bool is_valid_cap_id(enum msm_vidc_inst_capability_type cap_id); enum msm_vidc_inst_capability_type msm_vidc_get_cap_id( struct msm_vidc_inst *inst, u32 id); -int msm_vidc_v4l2_to_hfi_enum(struct msm_vidc_inst *inst, - enum msm_vidc_inst_capability_type cap_id, u32 *value); -int msm_vidc_update_cap_value(struct msm_vidc_inst *inst, u32 cap, - s32 adjusted_val, const char *func); -int msm_vidc_get_parent_value(struct msm_vidc_inst* inst, u32 cap, u32 parent, - s32 *value, const char *func); -u32 msm_vidc_get_port_info(struct msm_vidc_inst *inst, - enum msm_vidc_inst_capability_type cap_id); -int msm_vidc_set_vui_timing_info(void *instance, - enum msm_vidc_inst_capability_type cap_id); - #endif diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 2d4ee6de2b..c20d6e04b1 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -15,7 +15,7 @@ #include "msm_vidc_control.h" #include "msm_vidc_debug.h" #include "msm_vidc_power.h" -#include "msm_vidc_control.h" +#include "msm_vidc_platform.h" #include "msm_vidc_memory.h" #include "venus_hfi.h" #include "hfi_packet.h" diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index 73a9213518..0f4d6303ab 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -15,6 +15,7 @@ #include "msm_vidc_power.h" #include "venus_hfi.h" #include "hfi_packet.h" +#include "msm_vidc_platform.h" static const u32 msm_venc_input_set_prop[] = { HFI_PROP_COLOR_FORMAT, diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 0075500197..31049ec769 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -4,21 +4,12 @@ */ /* Copyright (c) 2022. Qualcomm Innovation Center, Inc. All rights reserved. */ -#include "msm_vidc_control.h" #include "msm_vidc_debug.h" -#include "hfi_packet.h" -#include "hfi_property.h" -#include "venus_hfi.h" #include "msm_vidc_internal.h" #include "msm_vidc_driver.h" #include "msm_venc.h" #include "msm_vidc_platform.h" -#define CAP_TO_8BIT_QP(a) { \ - if ((a) < MIN_QP_8BIT) \ - (a) = MIN_QP_8BIT; \ -} - extern struct msm_vidc_core *g_core; static bool is_priv_ctrl(u32 id) @@ -111,27 +102,6 @@ static const char *const mpeg_video_vidc_ir_type[] = { NULL, }; -u32 msm_vidc_get_port_info(struct msm_vidc_inst *inst, - enum msm_vidc_inst_capability_type cap_id) -{ - struct msm_vidc_inst_capability *capability = inst->capabilities; - - if (capability->cap[cap_id].flags & CAP_FLAG_INPUT_PORT && - capability->cap[cap_id].flags & CAP_FLAG_OUTPUT_PORT) { - if (inst->bufq[OUTPUT_PORT].vb2q->streaming) - return get_hfi_port(inst, INPUT_PORT); - else - return get_hfi_port(inst, OUTPUT_PORT); - } - - if (capability->cap[cap_id].flags & CAP_FLAG_INPUT_PORT) - return get_hfi_port(inst, INPUT_PORT); - else if (capability->cap[cap_id].flags & CAP_FLAG_OUTPUT_PORT) - return get_hfi_port(inst, OUTPUT_PORT); - else - return HFI_PORT_NONE; -} - static const char * const * msm_vidc_get_qmenu_type( struct msm_vidc_inst *inst, u32 cap_id) { @@ -281,64 +251,6 @@ static int swap_node(struct msm_vidc_inst_cap *rcap, return 0; } -int msm_vidc_packetize_control(struct msm_vidc_inst *inst, - enum msm_vidc_inst_capability_type cap_id, u32 payload_type, - void *hfi_val, u32 payload_size, const char *func) -{ - int rc = 0; - u64 payload = 0; - - if (payload_size > sizeof(u32)) { - i_vpr_e(inst, "%s: payload size is more than u32 for cap[%d] %s\n", - func, cap_id, cap_name(cap_id)); - return -EINVAL; - } - - if (payload_size == sizeof(u32)) - payload = *(u32 *)hfi_val; - else if (payload_size == sizeof(u8)) - payload = *(u8 *)hfi_val; - else if (payload_size == sizeof(u16)) - payload = *(u16 *)hfi_val; - - i_vpr_h(inst, FMT_STRING_SET_CAP, - cap_name(cap_id), inst->capabilities->cap[cap_id].value, payload); - - rc = venus_hfi_session_property(inst, - inst->capabilities->cap[cap_id].hfi_id, - HFI_HOST_FLAGS_NONE, - msm_vidc_get_port_info(inst, cap_id), - payload_type, - hfi_val, - payload_size); - if (rc) { - i_vpr_e(inst, "%s: failed to set cap[%d] %s to fw\n", - func, cap_id, cap_name(cap_id)); - return rc; - } - - return 0; -} - -enum msm_vidc_inst_capability_type msm_vidc_get_cap_id( - struct msm_vidc_inst *inst, u32 id) -{ - enum msm_vidc_inst_capability_type i = INST_CAP_NONE + 1; - struct msm_vidc_inst_capability *capability; - enum msm_vidc_inst_capability_type cap_id = INST_CAP_NONE; - - capability = inst->capabilities; - do { - if (capability->cap[i].v4l2_id == id) { - cap_id = capability->cap[i].cap_id; - break; - } - i++; - } while (i < INST_CAP_MAX); - - return cap_id; -} - static int msm_vidc_add_capid_to_fw_list(struct msm_vidc_inst *inst, enum msm_vidc_inst_capability_type cap_id) { @@ -385,126 +297,6 @@ static int msm_vidc_add_children(struct msm_vidc_inst *inst, return rc; } -bool is_parent_available(struct msm_vidc_inst *inst, - u32 cap_id, u32 check_parent, const char *func) -{ - int i = 0; - u32 cap_parent; - - while (i < MAX_CAP_PARENTS && - inst->capabilities->cap[cap_id].parents[i]) { - cap_parent = inst->capabilities->cap[cap_id].parents[i]; - if (cap_parent == check_parent) { - return true; - } - i++; - } - - i_vpr_e(inst, - "%s: missing parent %s for %s\n", - func, cap_name(check_parent), cap_name(cap_id)); - return false; -} - -int msm_vidc_update_cap_value(struct msm_vidc_inst *inst, u32 cap_id, - s32 adjusted_val, const char *func) -{ - int prev_value = 0; - - if (!inst || !inst->capabilities) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - prev_value = inst->capabilities->cap[cap_id].value; - - if (is_meta_cap(inst, cap_id)) { - /* - * cumulative control value if client set same metadata - * control multiple times. - */ - if (adjusted_val & MSM_VIDC_META_ENABLE) { - /* enable metadata */ - inst->capabilities->cap[cap_id].value |= adjusted_val; - } else { - /* disable metadata */ - inst->capabilities->cap[cap_id].value &= ~adjusted_val; - } - } else { - inst->capabilities->cap[cap_id].value = adjusted_val; - } - - if (prev_value != inst->capabilities->cap[cap_id].value) { - i_vpr_h(inst, - "%s: updated database: name: %s, value: %#x -> %#x\n", - func, cap_name(cap_id), - prev_value, inst->capabilities->cap[cap_id].value); - } - - return 0; -} - -int msm_vidc_get_parent_value(struct msm_vidc_inst* inst, - u32 cap_id, u32 parent, s32 *value, const char *func) -{ - int rc = 0; - - if (is_parent_available(inst, cap_id, parent, func)) { - switch (parent) { - case BITRATE_MODE: - *value = inst->hfi_rc_type; - break; - case LAYER_TYPE: - *value = inst->hfi_layer_type; - break; - default: - *value = inst->capabilities->cap[parent].value; - break; - } - } else { - rc = -EINVAL; - } - - return rc; -} - -static int msm_vidc_adjust_hevc_qp(struct msm_vidc_inst *inst, - enum msm_vidc_inst_capability_type cap_id) -{ - struct msm_vidc_inst_capability *capability; - s32 pix_fmt = -1; - - capability = inst->capabilities; - - if (!(inst->codec == MSM_VIDC_HEVC || inst->codec == MSM_VIDC_HEIC)) { - i_vpr_e(inst, - "%s: incorrect cap[%d] %s entry in database, fix database\n", - __func__, cap_id, cap_name(cap_id)); - return -EINVAL; - } - - if (msm_vidc_get_parent_value(inst, cap_id, - PIX_FMTS, &pix_fmt, __func__)) - return -EINVAL; - - if (pix_fmt == MSM_VIDC_FMT_P010 || pix_fmt == MSM_VIDC_FMT_TP10C) - goto exit; - - CAP_TO_8BIT_QP(capability->cap[cap_id].value); - if (cap_id == MIN_FRAME_QP) { - CAP_TO_8BIT_QP(capability->cap[I_FRAME_MIN_QP].value); - CAP_TO_8BIT_QP(capability->cap[P_FRAME_MIN_QP].value); - CAP_TO_8BIT_QP(capability->cap[B_FRAME_MIN_QP].value); - } else if (cap_id == MAX_FRAME_QP) { - CAP_TO_8BIT_QP(capability->cap[I_FRAME_MAX_QP].value); - CAP_TO_8BIT_QP(capability->cap[P_FRAME_MAX_QP].value); - CAP_TO_8BIT_QP(capability->cap[B_FRAME_MAX_QP].value); - } - -exit: - return 0; -} - static int msm_vidc_adjust_cap(struct msm_vidc_inst *inst, enum msm_vidc_inst_capability_type cap_id, struct v4l2_ctrl *ctrl, const char *func) @@ -1159,1731 +951,6 @@ unlock: return rc; } -int msm_vidc_adjust_entropy_mode(void *instance, struct v4l2_ctrl *ctrl) -{ - struct msm_vidc_inst_capability *capability; - s32 adjusted_value; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - s32 profile = -1; - - if (!inst || !inst->capabilities) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - capability = inst->capabilities; - - /* ctrl is always NULL in streamon case */ - adjusted_value = ctrl ? ctrl->val : - capability->cap[ENTROPY_MODE].value; - - if (inst->codec != MSM_VIDC_H264) { - i_vpr_e(inst, - "%s: incorrect entry in database. fix the database\n", - __func__); - return 0; - } - - if (msm_vidc_get_parent_value(inst, ENTROPY_MODE, - PROFILE, &profile, __func__)) - return -EINVAL; - - if (profile == V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE || - profile == V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_BASELINE) - adjusted_value = V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC; - - msm_vidc_update_cap_value(inst, ENTROPY_MODE, - adjusted_value, __func__); - - return 0; -} - -int msm_vidc_adjust_bitrate_mode(void *instance, struct v4l2_ctrl *ctrl) -{ - struct msm_vidc_inst_capability *capability; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - int lossless, frame_rc, bitrate_mode, frame_skip; - u32 hfi_value = 0; - - if (!inst || !inst->capabilities) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - capability = inst->capabilities; - - bitrate_mode = capability->cap[BITRATE_MODE].value; - lossless = capability->cap[LOSSLESS].value; - frame_rc = capability->cap[FRAME_RC_ENABLE].value; - frame_skip = capability->cap[FRAME_SKIP_MODE].value; - - if (lossless || (msm_vidc_lossless_encode && - inst->codec == MSM_VIDC_HEVC)) { - hfi_value = HFI_RC_LOSSLESS; - goto update; - } - - if (!frame_rc && !is_image_session(inst)) { - hfi_value = HFI_RC_OFF; - goto update; - } - - if (bitrate_mode == V4L2_MPEG_VIDEO_BITRATE_MODE_VBR) { - hfi_value = HFI_RC_VBR_CFR; - } else if (bitrate_mode == V4L2_MPEG_VIDEO_BITRATE_MODE_CBR) { - if (frame_skip) - hfi_value = HFI_RC_CBR_VFR; - else - hfi_value = HFI_RC_CBR_CFR; - } else if (bitrate_mode == V4L2_MPEG_VIDEO_BITRATE_MODE_CQ) { - hfi_value = HFI_RC_CQ; - } - -update: - inst->hfi_rc_type = hfi_value; - i_vpr_h(inst, "%s: hfi rc type: %#x\n", - __func__, inst->hfi_rc_type); - - return 0; -} - -int msm_vidc_adjust_profile(void *instance, struct v4l2_ctrl *ctrl) -{ - struct msm_vidc_inst_capability *capability; - s32 adjusted_value; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - s32 pix_fmt = -1; - - if (!inst || !inst->capabilities) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - capability = inst->capabilities; - - adjusted_value = ctrl ? ctrl->val : capability->cap[PROFILE].value; - - /* PIX_FMTS dependency is common across all chipsets. - * Hence, PIX_FMTS must be specified as Parent for HEVC profile. - * Otherwise it would be a database error that should be fixed. - */ - if (msm_vidc_get_parent_value(inst, PROFILE, PIX_FMTS, - &pix_fmt, __func__)) - return -EINVAL; - - /* 10 bit profile for 10 bit color format */ - if (pix_fmt == MSM_VIDC_FMT_TP10C || pix_fmt == MSM_VIDC_FMT_P010) { - if (is_image_session(inst)) - adjusted_value = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE; - else - adjusted_value = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10; - } else { - /* 8 bit profile for 8 bit color format */ - if (is_image_session(inst)) - adjusted_value = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE; - else - adjusted_value = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN; - } - - msm_vidc_update_cap_value(inst, PROFILE, - adjusted_value, __func__); - - return 0; -} - -int msm_vidc_adjust_ltr_count(void *instance, struct v4l2_ctrl *ctrl) -{ - struct msm_vidc_inst_capability *capability; - s32 adjusted_value; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - s32 rc_type = -1, all_intra = 0; - - if (!inst || !inst->capabilities) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - capability = inst->capabilities; - - adjusted_value = ctrl ? ctrl->val : capability->cap[LTR_COUNT].value; - - if (msm_vidc_get_parent_value(inst, LTR_COUNT, BITRATE_MODE, - &rc_type, __func__) || - msm_vidc_get_parent_value(inst, LTR_COUNT, ALL_INTRA, - &all_intra, __func__)) - return -EINVAL; - - if ((rc_type != HFI_RC_OFF && - rc_type != HFI_RC_CBR_CFR && - rc_type != HFI_RC_CBR_VFR) || - all_intra) { - adjusted_value = 0; - i_vpr_h(inst, - "%s: ltr count unsupported, rc_type: %#x, all_intra %d\n", - __func__,rc_type, all_intra); - } - - msm_vidc_update_cap_value(inst, LTR_COUNT, - adjusted_value, __func__); - - return 0; -} - -int msm_vidc_adjust_use_ltr(void *instance, struct v4l2_ctrl *ctrl) -{ - struct msm_vidc_inst_capability *capability; - s32 adjusted_value, ltr_count; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - - if (!inst || !inst->capabilities) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - capability = inst->capabilities; - - adjusted_value = ctrl ? ctrl->val : capability->cap[USE_LTR].value; - - /* - * Since USE_LTR is only set dynamically, and LTR_COUNT is static - * control, no need to make LTR_COUNT as parent for USE_LTR as - * LTR_COUNT value will always be updated when dynamically USE_LTR - * is set - */ - ltr_count = capability->cap[LTR_COUNT].value; - if (!ltr_count) - return 0; - - if (adjusted_value <= 0 || - adjusted_value > ((1 << ltr_count) - 1)) { - /* - * USE_LTR is bitmask value, hence should be - * > 0 and <= (2 ^ LTR_COUNT) - 1 - */ - i_vpr_e(inst, "%s: invalid value %d\n", - __func__, adjusted_value); - return 0; - } - - /* USE_LTR value is a bitmask value */ - msm_vidc_update_cap_value(inst, USE_LTR, - adjusted_value, __func__); - - return 0; -} - -int msm_vidc_adjust_mark_ltr(void *instance, struct v4l2_ctrl *ctrl) -{ - struct msm_vidc_inst_capability *capability; - s32 adjusted_value, ltr_count; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - - if (!inst || !inst->capabilities) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - capability = inst->capabilities; - - adjusted_value = ctrl ? ctrl->val : capability->cap[MARK_LTR].value; - - /* - * Since MARK_LTR is only set dynamically, and LTR_COUNT is static - * control, no need to make LTR_COUNT as parent for MARK_LTR as - * LTR_COUNT value will always be updated when dynamically MARK_LTR - * is set - */ - ltr_count = capability->cap[LTR_COUNT].value; - if (!ltr_count) - return 0; - - if (adjusted_value < 0 || - adjusted_value > (ltr_count - 1)) { - /* MARK_LTR value should be >= 0 and <= (LTR_COUNT - 1) */ - i_vpr_e(inst, "%s: invalid value %d\n", - __func__, adjusted_value); - return 0; - } - - msm_vidc_update_cap_value(inst, MARK_LTR, - adjusted_value, __func__); - - return 0; -} - -int msm_vidc_adjust_delta_based_rc(void *instance, struct v4l2_ctrl *ctrl) -{ - struct msm_vidc_inst_capability *capability; - s32 adjusted_value; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - s32 rc_type = -1; - - if (!inst || !inst->capabilities) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - capability = inst->capabilities; - - adjusted_value = ctrl ? ctrl->val : - capability->cap[TIME_DELTA_BASED_RC].value; - - if (msm_vidc_get_parent_value(inst, TIME_DELTA_BASED_RC, - BITRATE_MODE, &rc_type, __func__)) - return -EINVAL; - - if (rc_type == HFI_RC_OFF || - rc_type == HFI_RC_CQ) - adjusted_value = 0; - - msm_vidc_update_cap_value(inst, TIME_DELTA_BASED_RC, - adjusted_value, __func__); - - return 0; -} - -int msm_vidc_adjust_output_order(void *instance, struct v4l2_ctrl *ctrl) -{ - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - struct msm_vidc_inst_capability *capability; - s32 tn_mode = -1, display_delay = -1, display_delay_enable = -1; - u32 adjusted_value; - - if (!inst || !inst->capabilities) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - capability = inst->capabilities; - - adjusted_value = ctrl ? ctrl->val : - capability->cap[OUTPUT_ORDER].value; - - if (msm_vidc_get_parent_value(inst, OUTPUT_ORDER, THUMBNAIL_MODE, - &tn_mode, __func__) || - msm_vidc_get_parent_value(inst, OUTPUT_ORDER, DISPLAY_DELAY, - &display_delay, __func__) || - msm_vidc_get_parent_value(inst, OUTPUT_ORDER, DISPLAY_DELAY_ENABLE, - &display_delay_enable, __func__)) - return -EINVAL; - - if (tn_mode || (display_delay_enable && !display_delay)) - adjusted_value = 1; - - msm_vidc_update_cap_value(inst, OUTPUT_ORDER, - adjusted_value, __func__); - - return 0; -} - -int msm_vidc_adjust_input_buf_host_max_count(void *instance, struct v4l2_ctrl *ctrl) -{ - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - struct msm_vidc_inst_capability *capability; - u32 adjusted_value; - - if (!inst || !inst->capabilities) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - capability = inst->capabilities; - - adjusted_value = ctrl ? ctrl->val : - capability->cap[INPUT_BUF_HOST_MAX_COUNT].value; - - if (msm_vidc_is_super_buffer(inst) || is_image_session(inst)) - adjusted_value = DEFAULT_MAX_HOST_BURST_BUF_COUNT; - - msm_vidc_update_cap_value(inst, INPUT_BUF_HOST_MAX_COUNT, - adjusted_value, __func__); - - return 0; -} - -int msm_vidc_adjust_output_buf_host_max_count(void *instance, struct v4l2_ctrl *ctrl) -{ - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - struct msm_vidc_inst_capability *capability; - u32 adjusted_value; - - if (!inst || !inst->capabilities) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - capability = inst->capabilities; - - adjusted_value = ctrl ? ctrl->val : - capability->cap[OUTPUT_BUF_HOST_MAX_COUNT].value; - - if (msm_vidc_is_super_buffer(inst) || is_image_session(inst) || - is_enc_slice_delivery_mode(inst)) - adjusted_value = DEFAULT_MAX_HOST_BURST_BUF_COUNT; - - msm_vidc_update_cap_value(inst, OUTPUT_BUF_HOST_MAX_COUNT, - adjusted_value, __func__); - - return 0; -} - -int msm_vidc_adjust_transform_8x8(void *instance, struct v4l2_ctrl *ctrl) -{ - struct msm_vidc_inst_capability *capability; - s32 adjusted_value; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - s32 profile = -1; - - if (!inst || !inst->capabilities) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - capability = inst->capabilities; - - adjusted_value = ctrl ? ctrl->val : - capability->cap[TRANSFORM_8X8].value; - - if (inst->codec != MSM_VIDC_H264) { - i_vpr_e(inst, - "%s: incorrect entry in database. fix the database\n", - __func__); - return 0; - } - - if (msm_vidc_get_parent_value(inst, TRANSFORM_8X8, - PROFILE, &profile, __func__)) - return -EINVAL; - - if (profile != V4L2_MPEG_VIDEO_H264_PROFILE_HIGH && - profile != V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH) - adjusted_value = 0; - - msm_vidc_update_cap_value(inst, TRANSFORM_8X8, - adjusted_value, __func__); - - return 0; -} - -int msm_vidc_adjust_chroma_qp_index_offset(void *instance, - struct v4l2_ctrl *ctrl) -{ - struct msm_vidc_inst_capability *capability; - s32 adjusted_value; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - - if (!inst || !inst->capabilities) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - capability = inst->capabilities; - - adjusted_value = ctrl ? ctrl->val : - capability->cap[CHROMA_QP_INDEX_OFFSET].value; - - if (adjusted_value != MIN_CHROMA_QP_OFFSET) - adjusted_value = MAX_CHROMA_QP_OFFSET; - - msm_vidc_update_cap_value(inst, CHROMA_QP_INDEX_OFFSET, - adjusted_value, __func__); - - return 0; -} - -static bool msm_vidc_check_all_layer_bitrate_set(struct msm_vidc_inst *inst) -{ - bool layer_bitrate_set = true; - u32 cap_id = 0, i, enh_layer_count; - u32 layer_br_caps[6] = {L0_BR, L1_BR, L2_BR, L3_BR, L4_BR, L5_BR}; - - enh_layer_count = inst->capabilities->cap[ENH_LAYER_COUNT].value; - - for (i = 0; i <= enh_layer_count; i++) { - if (i >= ARRAY_SIZE(layer_br_caps)) - break; - cap_id = layer_br_caps[i]; - if (!(inst->capabilities->cap[cap_id].flags & CAP_FLAG_CLIENT_SET)) { - layer_bitrate_set = false; - break; - } - } - - return layer_bitrate_set; -} - -static u32 msm_vidc_get_cumulative_bitrate(struct msm_vidc_inst *inst) -{ - int i; - u32 cap_id = 0; - u32 cumulative_br = 0; - s32 enh_layer_count; - u32 layer_br_caps[6] = {L0_BR, L1_BR, L2_BR, L3_BR, L4_BR, L5_BR}; - - enh_layer_count = inst->capabilities->cap[ENH_LAYER_COUNT].value; - - for (i = 0; i <= enh_layer_count; i++) { - if (i >= ARRAY_SIZE(layer_br_caps)) - break; - cap_id = layer_br_caps[i]; - cumulative_br += inst->capabilities->cap[cap_id].value; - } - - return cumulative_br; -} - -int msm_vidc_adjust_slice_count(void *instance, struct v4l2_ctrl *ctrl) -{ - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - struct msm_vidc_inst_capability *capability; - struct v4l2_format *output_fmt; - s32 adjusted_value, rc_type = -1, slice_mode, all_intra, enh_layer_count = 0; - u32 slice_val, mbpf = 0, mbps = 0, max_mbpf = 0, max_mbps = 0, bitrate = 0; - u32 update_cap, max_avg_slicesize, output_width, output_height; - u32 min_width, min_height, max_width, max_height, fps; - - if (!inst || !inst->capabilities) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - capability = inst->capabilities; - - slice_mode = ctrl ? ctrl->val : - capability->cap[SLICE_MODE].value; - - if (slice_mode == V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE) - return 0; - - if (msm_vidc_get_parent_value(inst, SLICE_MODE, - BITRATE_MODE, &rc_type, __func__) || - msm_vidc_get_parent_value(inst, SLICE_MODE, - ALL_INTRA, &all_intra, __func__) || - msm_vidc_get_parent_value(inst, SLICE_MODE, - ENH_LAYER_COUNT, &enh_layer_count, __func__)) - return -EINVAL; - - if (capability->cap[BIT_RATE].flags & CAP_FLAG_CLIENT_SET) { - bitrate = capability->cap[BIT_RATE].value; - } else if (msm_vidc_check_all_layer_bitrate_set(inst)) { - bitrate = msm_vidc_get_cumulative_bitrate(inst); - } else { - adjusted_value = V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE; - update_cap = SLICE_MODE; - i_vpr_h(inst, - "%s: client did not set bitrate & layerwise bitrates\n", - __func__); - goto exit; - } - - fps = capability->cap[FRAME_RATE].value >> 16; - if (fps > MAX_SLICES_FRAME_RATE || - (rc_type != HFI_RC_OFF && - rc_type != HFI_RC_CBR_CFR && - rc_type != HFI_RC_CBR_VFR && - rc_type != HFI_RC_VBR_CFR) || - all_intra) { - adjusted_value = V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE; - update_cap = SLICE_MODE; - i_vpr_h(inst, - "%s: slice unsupported, fps: %u, rc_type: %#x, all_intra %d\n", - __func__, fps, rc_type, all_intra); - goto exit; - } - - output_fmt = &inst->fmts[OUTPUT_PORT]; - output_width = output_fmt->fmt.pix_mp.width; - output_height = output_fmt->fmt.pix_mp.height; - - max_width = (slice_mode == V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_MB) ? - MAX_MB_SLICE_WIDTH : MAX_BYTES_SLICE_WIDTH; - max_height = (slice_mode == V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_MB) ? - MAX_MB_SLICE_HEIGHT : MAX_BYTES_SLICE_HEIGHT; - min_width = (inst->codec == MSM_VIDC_HEVC) ? - MIN_HEVC_SLICE_WIDTH : MIN_AVC_SLICE_WIDTH; - min_height = MIN_SLICE_HEIGHT; - - /* - * For V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_MB: - * - width >= 384 and height >= 128 - * - width and height <= 4096 - * For V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_BYTES: - * - width >= 192 and height >= 128 - * - width and height <= 1920 - */ - if (output_width < min_width || output_height < min_height || - output_width > max_width || output_height > max_width) { - adjusted_value = V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE; - update_cap = SLICE_MODE; - i_vpr_h(inst, - "%s: slice unsupported, codec: %#x wxh: [%dx%d]\n", - __func__, inst->codec, output_width, output_height); - goto exit; - } - - mbpf = NUM_MBS_PER_FRAME(output_height, output_width); - mbps = NUM_MBS_PER_SEC(output_height, output_width, fps); - max_mbpf = NUM_MBS_PER_FRAME(max_height, max_width); - max_mbps = NUM_MBS_PER_SEC(max_height, max_width, MAX_SLICES_FRAME_RATE); - - if (mbpf > max_mbpf || mbps > max_mbps) { - adjusted_value = V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE; - update_cap = SLICE_MODE; - i_vpr_h(inst, - "%s: Unsupported, mbpf[%u] > max[%u], mbps[%u] > max[%u]\n", - __func__, mbpf, max_mbpf, mbps, max_mbps); - goto exit; - } - - if (slice_mode == V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_MB) { - update_cap = SLICE_MAX_MB; - slice_val = capability->cap[SLICE_MAX_MB].value; - slice_val = max(slice_val, mbpf / MAX_SLICES_PER_FRAME); - } else { - slice_val = capability->cap[SLICE_MAX_BYTES].value; - update_cap = SLICE_MAX_BYTES; - if (rc_type != HFI_RC_OFF) { - max_avg_slicesize = ((bitrate / fps) / 8) / - MAX_SLICES_PER_FRAME; - slice_val = max(slice_val, max_avg_slicesize); - } - } - adjusted_value = slice_val; - -exit: - msm_vidc_update_cap_value(inst, update_cap, - adjusted_value, __func__); - - return 0; -} - -static int msm_vidc_adjust_static_layer_count_and_type(struct msm_vidc_inst *inst, - s32 layer_count) -{ - bool hb_requested = false; - - if (!inst || !inst->capabilities) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - if (!layer_count) { - i_vpr_h(inst, "client not enabled layer encoding\n"); - goto exit; - } - - if (inst->hfi_rc_type == HFI_RC_CQ) { - i_vpr_h(inst, "rc type is CQ, disabling layer encoding\n"); - layer_count = 0; - goto exit; - } - - if (inst->codec == MSM_VIDC_H264) { - if (!inst->capabilities->cap[LAYER_ENABLE].value) { - layer_count = 0; - goto exit; - } - - hb_requested = (inst->capabilities->cap[LAYER_TYPE].value == - V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_B) ? - true : false; - } else if (inst->codec == MSM_VIDC_HEVC) { - hb_requested = (inst->capabilities->cap[LAYER_TYPE].value == - V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B) ? - true : false; - } - - if (hb_requested && inst->hfi_rc_type != HFI_RC_VBR_CFR) { - i_vpr_h(inst, - "%s: HB layer encoding is supported for VBR rc only\n", - __func__); - layer_count = 0; - goto exit; - } - - if (!is_meta_tx_inp_enabled(inst, META_EVA_STATS) && - hb_requested && (layer_count > 1)) { - layer_count = 1; - i_vpr_h(inst, - "%s: cvp disable supports only one enh layer HB\n", - __func__); - } - - /* decide hfi layer type */ - if (hb_requested) { - inst->hfi_layer_type = HFI_HIER_B; - } else { - /* HP requested */ - inst->hfi_layer_type = HFI_HIER_P_SLIDING_WINDOW; - if (inst->codec == MSM_VIDC_H264 && - inst->hfi_rc_type == HFI_RC_VBR_CFR) - inst->hfi_layer_type = HFI_HIER_P_HYBRID_LTR; - } - - /* sanitize layer count based on layer type and codec, and rc type */ - if (inst->hfi_layer_type == HFI_HIER_B) { - if (layer_count > MAX_ENH_LAYER_HB) - layer_count = MAX_ENH_LAYER_HB; - } else if (inst->hfi_layer_type == HFI_HIER_P_HYBRID_LTR) { - if (layer_count > MAX_AVC_ENH_LAYER_HYBRID_HP) - layer_count = MAX_AVC_ENH_LAYER_HYBRID_HP; - } else if (inst->hfi_layer_type == HFI_HIER_P_SLIDING_WINDOW) { - if (inst->codec == MSM_VIDC_H264) { - if (layer_count > MAX_AVC_ENH_LAYER_SLIDING_WINDOW) - layer_count = MAX_AVC_ENH_LAYER_SLIDING_WINDOW; - } else if (inst->codec == MSM_VIDC_HEVC) { - if (inst->hfi_rc_type == HFI_RC_VBR_CFR) { - if (layer_count > MAX_HEVC_VBR_ENH_LAYER_SLIDING_WINDOW) - layer_count = MAX_HEVC_VBR_ENH_LAYER_SLIDING_WINDOW; - } else { - if (layer_count > MAX_HEVC_NON_VBR_ENH_LAYER_SLIDING_WINDOW) - layer_count = MAX_HEVC_NON_VBR_ENH_LAYER_SLIDING_WINDOW; - } - } - } - -exit: - msm_vidc_update_cap_value(inst, ENH_LAYER_COUNT, - layer_count, __func__); - inst->capabilities->cap[ENH_LAYER_COUNT].max = layer_count; - return 0; -} - -int msm_vidc_adjust_layer_count(void *instance, struct v4l2_ctrl *ctrl) -{ - int rc = 0; - struct msm_vidc_inst_capability *capability; - s32 client_layer_count; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - - if (!inst || !inst->capabilities) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - capability = inst->capabilities; - - client_layer_count = ctrl ? ctrl->val : - capability->cap[ENH_LAYER_COUNT].value; - - if (!is_parent_available(inst, ENH_LAYER_COUNT, - BITRATE_MODE, __func__) || - !is_parent_available(inst, ENH_LAYER_COUNT, - META_EVA_STATS, __func__)) - return -EINVAL; - - if (!inst->bufq[OUTPUT_PORT].vb2q->streaming) { - rc = msm_vidc_adjust_static_layer_count_and_type(inst, - client_layer_count); - if (rc) - goto exit; - } else { - if (inst->hfi_layer_type == HFI_HIER_P_HYBRID_LTR || - inst->hfi_layer_type == HFI_HIER_P_SLIDING_WINDOW) { - /* dynamic layer count change is only supported for HP */ - if (client_layer_count > - inst->capabilities->cap[ENH_LAYER_COUNT].max) - client_layer_count = - inst->capabilities->cap[ENH_LAYER_COUNT].max; - - msm_vidc_update_cap_value(inst, ENH_LAYER_COUNT, - client_layer_count, __func__); - } - } - -exit: - return rc; -} - -int msm_vidc_adjust_gop_size(void *instance, struct v4l2_ctrl *ctrl) -{ - struct msm_vidc_inst_capability *capability; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; - s32 adjusted_value, enh_layer_count = -1; - u32 min_gop_size, num_subgops; - - if (!inst || !inst->capabilities) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - capability = inst->capabilities; - - adjusted_value = ctrl ? ctrl->val : capability->cap[GOP_SIZE].value; - - if (msm_vidc_get_parent_value(inst, GOP_SIZE, - ENH_LAYER_COUNT, &enh_layer_count, __func__)) - return -EINVAL; - - if (!enh_layer_count) - goto exit; - - /* - * Layer encoding needs GOP size to be multiple of subgop size - * And subgop size is 2 ^ number of enhancement layers. - */ - - /* v4l2 layer count is the number of enhancement layers */ - min_gop_size = 1 << enh_layer_count; - num_subgops = (adjusted_value + (min_gop_size >> 1)) / - min_gop_size; - if (num_subgops) - adjusted_value = num_subgops * min_gop_size; - else - adjusted_value = min_gop_size; - -exit: - msm_vidc_update_cap_value(inst, GOP_SIZE, adjusted_value, __func__); - return 0; -} - -int msm_vidc_adjust_b_frame(void *instance, struct v4l2_ctrl *ctrl) -{ - struct msm_vidc_inst_capability *capability; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; - s32 adjusted_value, enh_layer_count = -1; - const u32 max_bframe_size = 7; - - if (!inst || !inst->capabilities) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - capability = inst->capabilities; - - adjusted_value = ctrl ? ctrl->val : capability->cap[B_FRAME].value; - - if (msm_vidc_get_parent_value(inst, B_FRAME, - ENH_LAYER_COUNT, &enh_layer_count, __func__)) - return -EINVAL; - - if (!enh_layer_count || inst->hfi_layer_type != HFI_HIER_B) { - adjusted_value = 0; - goto exit; - } - - adjusted_value = (1 << enh_layer_count) - 1; - /* Allowed Bframe values are 0, 1, 3, 7 */ - if (adjusted_value > max_bframe_size) - adjusted_value = max_bframe_size; - -exit: - msm_vidc_update_cap_value(inst, B_FRAME, adjusted_value, __func__); - return 0; -} - -int msm_vidc_adjust_bitrate(void *instance, struct v4l2_ctrl *ctrl) -{ - int i, rc = 0; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - struct msm_vidc_inst_capability *capability; - s32 adjusted_value, enh_layer_count; - u32 cumulative_bitrate = 0, cap_id = 0, cap_value = 0; - u32 layer_br_caps[6] = {L0_BR, L1_BR, L2_BR, L3_BR, L4_BR, L5_BR}; - u32 max_bitrate = 0; - - if (!inst || !inst->capabilities) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - capability = inst->capabilities; - - /* ignore layer bitrate when total bitrate is set */ - if (capability->cap[BIT_RATE].flags & CAP_FLAG_CLIENT_SET) { - /* - * For static case, ctrl is null. - * For dynamic case, only BIT_RATE cap uses this adjust function. - * Hence, no need to check for ctrl id to be BIT_RATE control, and not - * any of layer bitrate controls. - */ - adjusted_value = ctrl ? ctrl->val : capability->cap[BIT_RATE].value; - msm_vidc_update_cap_value(inst, BIT_RATE, adjusted_value, __func__); - - return 0; - } - - if (inst->bufq[OUTPUT_PORT].vb2q->streaming) - return 0; - - if (msm_vidc_get_parent_value(inst, BIT_RATE, - ENH_LAYER_COUNT, &enh_layer_count, __func__)) - return -EINVAL; - - /* get max bit rate for current session config*/ - max_bitrate = msm_vidc_get_max_bitrate(inst); - if (inst->capabilities->cap[BIT_RATE].value > max_bitrate) - msm_vidc_update_cap_value(inst, BIT_RATE, max_bitrate, __func__); - - /* - * ENH_LAYER_COUNT cap max is positive only if - * layer encoding is enabled during streamon. - */ - if (capability->cap[ENH_LAYER_COUNT].max) { - if (!msm_vidc_check_all_layer_bitrate_set(inst)) { - i_vpr_h(inst, - "%s: client did not set all layer bitrates\n", - __func__); - return 0; - } - - cumulative_bitrate = msm_vidc_get_cumulative_bitrate(inst); - - /* cap layer bitrates to max supported bitrate */ - if (cumulative_bitrate > max_bitrate) { - u32 decrement_in_value = 0; - u32 decrement_in_percent = ((cumulative_bitrate - max_bitrate) * 100) / - max_bitrate; - - cumulative_bitrate = 0; - for (i = 0; i <= enh_layer_count; i++) { - if (i >= ARRAY_SIZE(layer_br_caps)) - break; - cap_id = layer_br_caps[i]; - cap_value = inst->capabilities->cap[cap_id].value; - - decrement_in_value = (cap_value * - decrement_in_percent) / 100; - cumulative_bitrate += (cap_value - decrement_in_value); - - /* - * cap value for the L*_BR is changed. Hence, update cap, - * and add to FW_LIST to set new values to firmware. - */ - msm_vidc_update_cap_value(inst, cap_id, - (cap_value - decrement_in_value), __func__); - } - } - - i_vpr_h(inst, - "%s: update BIT_RATE with cumulative bitrate\n", - __func__); - msm_vidc_update_cap_value(inst, BIT_RATE, - cumulative_bitrate, __func__); - } - - return rc; -} - -int msm_vidc_adjust_dynamic_layer_bitrate(void *instance, struct v4l2_ctrl *ctrl) -{ - int rc = 0; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - struct msm_vidc_inst_capability *capability; - u32 cumulative_bitrate = 0; - u32 client_set_cap_id = INST_CAP_NONE; - u32 old_br = 0, new_br = 0, exceeded_br = 0; - s32 max_bitrate; - - if (!inst || !inst->capabilities) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - capability = inst->capabilities; - - if (!ctrl) - return 0; - - /* ignore layer bitrate when total bitrate is set */ - if (capability->cap[BIT_RATE].flags & CAP_FLAG_CLIENT_SET) - return 0; - - if (!inst->bufq[OUTPUT_PORT].vb2q->streaming) - return 0; - - /* - * ENH_LAYER_COUNT cap max is positive only if - * layer encoding is enabled during streamon. - */ - if (!capability->cap[ENH_LAYER_COUNT].max) { - i_vpr_e(inst, "%s: layers not enabled\n", __func__); - return -EINVAL; - } - - if (!msm_vidc_check_all_layer_bitrate_set(inst)) { - i_vpr_h(inst, - "%s: client did not set all layer bitrates\n", - __func__); - return 0; - } - - client_set_cap_id = msm_vidc_get_cap_id(inst, ctrl->id); - if (client_set_cap_id == INST_CAP_NONE) { - i_vpr_e(inst, "%s: could not find cap_id for ctrl %s\n", - __func__, ctrl->name); - return -EINVAL; - } - - cumulative_bitrate = msm_vidc_get_cumulative_bitrate(inst); - max_bitrate = inst->capabilities->cap[BIT_RATE].max; - old_br = capability->cap[client_set_cap_id].value; - new_br = ctrl->val; - - /* - * new bitrate is not supposed to cause cumulative bitrate to - * exceed max supported bitrate - */ - - if ((cumulative_bitrate - old_br + new_br) > max_bitrate) { - /* adjust new bitrate */ - exceeded_br = (cumulative_bitrate - old_br + new_br) - max_bitrate; - new_br = ctrl->val - exceeded_br; - } - msm_vidc_update_cap_value(inst, client_set_cap_id, new_br, __func__); - - /* adjust totol bitrate cap */ - i_vpr_h(inst, - "%s: update BIT_RATE with cumulative bitrate\n", - __func__); - msm_vidc_update_cap_value(inst, BIT_RATE, - msm_vidc_get_cumulative_bitrate(inst), __func__); - - return rc; -} - -int msm_vidc_adjust_peak_bitrate(void *instance, struct v4l2_ctrl *ctrl) -{ - struct msm_vidc_inst_capability *capability; - s32 adjusted_value; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - s32 rc_type = -1, bitrate = -1; - - if (!inst || !inst->capabilities) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - capability = inst->capabilities; - - adjusted_value = ctrl ? ctrl->val : - capability->cap[PEAK_BITRATE].value; - - if (msm_vidc_get_parent_value(inst, PEAK_BITRATE, - BITRATE_MODE, &rc_type, __func__)) - return -EINVAL; - - if (rc_type != HFI_RC_CBR_CFR && - rc_type != HFI_RC_CBR_VFR) - return 0; - - if (msm_vidc_get_parent_value(inst, PEAK_BITRATE, - BIT_RATE, &bitrate, __func__)) - return -EINVAL; - - /* Peak Bitrate should be larger than or equal to avg bitrate */ - if (capability->cap[PEAK_BITRATE].flags & CAP_FLAG_CLIENT_SET) { - if (adjusted_value < bitrate) - adjusted_value = bitrate; - } else { - adjusted_value = capability->cap[BIT_RATE].value; - } - - msm_vidc_update_cap_value(inst, PEAK_BITRATE, - adjusted_value, __func__); - - return 0; -} - -int msm_vidc_adjust_hevc_min_qp(void *instance, struct v4l2_ctrl *ctrl) -{ - int rc = 0; - struct msm_vidc_inst_capability *capability; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - - if (!inst || !inst->capabilities) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - capability = inst->capabilities; - - if (ctrl) - msm_vidc_update_cap_value(inst, MIN_FRAME_QP, - ctrl->val, __func__); - - rc = msm_vidc_adjust_hevc_qp(inst, MIN_FRAME_QP); - - return rc; -} - -int msm_vidc_adjust_hevc_max_qp(void *instance, struct v4l2_ctrl *ctrl) -{ - int rc = 0; - struct msm_vidc_inst_capability *capability; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - - if (!inst || !inst->capabilities) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - capability = inst->capabilities; - - if (ctrl) - msm_vidc_update_cap_value(inst, MAX_FRAME_QP, - ctrl->val, __func__); - - rc = msm_vidc_adjust_hevc_qp(inst, MAX_FRAME_QP); - - return rc; -} - -int msm_vidc_adjust_hevc_i_frame_qp(void *instance, struct v4l2_ctrl *ctrl) -{ - int rc = 0; - struct msm_vidc_inst_capability *capability; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - - if (!inst || !inst->capabilities) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - capability = inst->capabilities; - - if (ctrl) - msm_vidc_update_cap_value(inst, I_FRAME_QP, - ctrl->val, __func__); - - rc = msm_vidc_adjust_hevc_qp(inst, I_FRAME_QP); - if (rc) - return rc; - - return rc; -} - -int msm_vidc_adjust_hevc_p_frame_qp(void *instance, struct v4l2_ctrl *ctrl) -{ - int rc = 0; - struct msm_vidc_inst_capability *capability; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - - if (!inst || !inst->capabilities) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - capability = inst->capabilities; - - if (ctrl) - msm_vidc_update_cap_value(inst, P_FRAME_QP, - ctrl->val, __func__); - - rc = msm_vidc_adjust_hevc_qp(inst, P_FRAME_QP); - if (rc) - return rc; - - return rc; -} - -int msm_vidc_adjust_hevc_b_frame_qp(void *instance, struct v4l2_ctrl *ctrl) -{ - int rc = 0; - struct msm_vidc_inst_capability *capability; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - - if (!inst || !inst->capabilities) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - capability = inst->capabilities; - - if (ctrl) - msm_vidc_update_cap_value(inst, B_FRAME_QP, - ctrl->val, __func__); - - rc = msm_vidc_adjust_hevc_qp(inst, B_FRAME_QP); - if (rc) - return rc; - - return rc; -} - -int msm_vidc_adjust_blur_type(void *instance, struct v4l2_ctrl *ctrl) -{ - struct msm_vidc_inst_capability *capability; - s32 adjusted_value; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - s32 rc_type = -1, roi_enable = -1; - s32 pix_fmts = -1, min_quality = -1; - - if (!inst || !inst->capabilities) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - capability = inst->capabilities; - - adjusted_value = ctrl ? ctrl->val : - capability->cap[BLUR_TYPES].value; - - if (adjusted_value == MSM_VIDC_BLUR_NONE) - return 0; - - if (msm_vidc_get_parent_value(inst, BLUR_TYPES, BITRATE_MODE, - &rc_type, __func__) || - msm_vidc_get_parent_value(inst, BLUR_TYPES, PIX_FMTS, - &pix_fmts, __func__) || - msm_vidc_get_parent_value(inst, BLUR_TYPES, MIN_QUALITY, - &min_quality, __func__) || - msm_vidc_get_parent_value(inst, BLUR_TYPES, META_ROI_INFO, - &roi_enable, __func__)) - return -EINVAL; - - if (adjusted_value == MSM_VIDC_BLUR_EXTERNAL) { - if (is_scaling_enabled(inst) || min_quality) { - adjusted_value = MSM_VIDC_BLUR_NONE; - } - } else if (adjusted_value == MSM_VIDC_BLUR_ADAPTIVE) { - if (is_scaling_enabled(inst) || min_quality || - (rc_type != HFI_RC_VBR_CFR && - rc_type != HFI_RC_CBR_CFR && - rc_type != HFI_RC_CBR_VFR) || - is_10bit_colorformat(pix_fmts) || roi_enable) { - adjusted_value = MSM_VIDC_BLUR_NONE; - } - } - - msm_vidc_update_cap_value(inst, BLUR_TYPES, - adjusted_value, __func__); - - return 0; -} - -int msm_vidc_adjust_all_intra(void *instance, struct v4l2_ctrl *ctrl) -{ - struct msm_vidc_inst_capability *capability; - s32 adjusted_value; - struct msm_vidc_core *core; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - s32 gop_size = -1, bframe = -1; - u32 width, height, fps, mbps, max_mbps; - - if (!inst || !inst->capabilities || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - capability = inst->capabilities; - - adjusted_value = capability->cap[ALL_INTRA].value; - - if (msm_vidc_get_parent_value(inst, ALL_INTRA, GOP_SIZE, - &gop_size, __func__) || - msm_vidc_get_parent_value(inst, ALL_INTRA, B_FRAME, - &bframe, __func__)) - return -EINVAL; - - width = inst->crop.width; - height = inst->crop.height; - fps = msm_vidc_get_fps(inst); - mbps = NUM_MBS_PER_SEC(height, width, fps); - core = inst->core; - max_mbps = core->capabilities[MAX_MBPS_ALL_INTRA].value; - - if (mbps > max_mbps) { - adjusted_value = 0; - i_vpr_h(inst, "%s: mbps %d exceeds max supported mbps %d\n", - __func__, mbps, max_mbps); - goto exit; - } - - if (!gop_size && !bframe) - adjusted_value = 1; - -exit: - msm_vidc_update_cap_value(inst, ALL_INTRA, - adjusted_value, __func__); - - return 0; -} - -int msm_vidc_adjust_blur_resolution(void *instance, struct v4l2_ctrl *ctrl) -{ - struct msm_vidc_inst_capability *capability; - s32 adjusted_value; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - s32 blur_type = -1; - - if (!inst || !inst->capabilities) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - capability = inst->capabilities; - - adjusted_value = ctrl ? ctrl->val : - capability->cap[BLUR_RESOLUTION].value; - - if (msm_vidc_get_parent_value(inst, BLUR_RESOLUTION, BLUR_TYPES, - &blur_type, __func__)) - return -EINVAL; - - if (blur_type != MSM_VIDC_BLUR_EXTERNAL) - return 0; - - msm_vidc_update_cap_value(inst, BLUR_RESOLUTION, - adjusted_value, __func__); - - return 0; -} - -int msm_vidc_adjust_brs(void *instance, struct v4l2_ctrl *ctrl) -{ - struct msm_vidc_inst_capability *capability; - s32 adjusted_value; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - s32 rc_type = -1, layer_enabled = -1, layer_type = -1; - bool hp_requested = false; - - if (!inst || !inst->capabilities) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - capability = inst->capabilities; - - adjusted_value = ctrl ? ctrl->val : - capability->cap[CONTENT_ADAPTIVE_CODING].value; - - if (inst->bufq[OUTPUT_PORT].vb2q->streaming) - return 0; - - if (msm_vidc_get_parent_value(inst, CONTENT_ADAPTIVE_CODING, - BITRATE_MODE, &rc_type, __func__) || - msm_vidc_get_parent_value(inst, CONTENT_ADAPTIVE_CODING, - LAYER_ENABLE, &layer_enabled, __func__) || - msm_vidc_get_parent_value(inst, CONTENT_ADAPTIVE_CODING, - LAYER_TYPE, &layer_type, __func__)) - return -EINVAL; - - /* - * -BRS is supported only for VBR rc type. - * Hence, do not adjust or set to firmware for non VBR rc's - * -If HP is enabled then BRS is not allowed. - */ - if (rc_type != HFI_RC_VBR_CFR) { - adjusted_value = 0; - goto adjust; - } - - if (inst->codec == MSM_VIDC_H264) { - layer_type = V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P; - } else if (inst->codec == MSM_VIDC_HEVC) { - layer_type = V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P; - } - hp_requested = (inst->capabilities->cap[LAYER_TYPE].value == layer_type); - - /* - * Disable BRS in case of HP encoding - * Hence set adjust value to 0. - */ - if (layer_enabled == 1 && hp_requested) { - adjusted_value = 0; - goto adjust; - } - -adjust: - msm_vidc_update_cap_value(inst, CONTENT_ADAPTIVE_CODING, - adjusted_value, __func__); - - return 0; -} - -int msm_vidc_adjust_bitrate_boost(void *instance, struct v4l2_ctrl *ctrl) -{ - struct msm_vidc_inst_capability *capability; - s32 adjusted_value; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - s32 min_quality = -1, rc_type = -1; - u32 max_bitrate = 0, bitrate = 0; - - if (!inst || !inst->capabilities) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - capability = inst->capabilities; - - adjusted_value = ctrl ? ctrl->val : - capability->cap[BITRATE_BOOST].value; - - if (inst->bufq[OUTPUT_PORT].vb2q->streaming) - return 0; - - if (msm_vidc_get_parent_value(inst, BITRATE_BOOST, - MIN_QUALITY, &min_quality, __func__) || - msm_vidc_get_parent_value(inst, BITRATE_BOOST, - BITRATE_MODE, &rc_type, __func__)) - return -EINVAL; - - /* - * Bitrate Boost are supported only for VBR rc type. - * Hence, do not adjust or set to firmware for non VBR rc's - */ - if (rc_type != HFI_RC_VBR_CFR) { - adjusted_value = 0; - goto adjust; - } - - if (min_quality) { - adjusted_value = MAX_BITRATE_BOOST; - goto adjust; - } - - max_bitrate = msm_vidc_get_max_bitrate(inst); - bitrate = inst->capabilities->cap[BIT_RATE].value; - if (adjusted_value) { - if ((bitrate + bitrate / (100 / adjusted_value)) > max_bitrate) { - i_vpr_h(inst, - "%s: bitrate %d is beyond max bitrate %d, remove bitrate boost\n", - __func__, max_bitrate, bitrate); - adjusted_value = 0; - } - } - -adjust: - msm_vidc_update_cap_value(inst, BITRATE_BOOST, - adjusted_value, __func__); - - return 0; -} - -int msm_vidc_adjust_min_quality(void *instance, struct v4l2_ctrl *ctrl) -{ - struct msm_vidc_inst_capability *capability; - s32 adjusted_value; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - s32 roi_enable = -1, rc_type = -1, enh_layer_count = -1, pix_fmts = -1; - u32 width, height, frame_rate; - struct v4l2_format *f; - - if (!inst || !inst->capabilities) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - capability = inst->capabilities; - - adjusted_value = ctrl ? ctrl->val : capability->cap[MIN_QUALITY].value; - - /* - * Although MIN_QUALITY is static, one of its parents, - * ENH_LAYER_COUNT is dynamic cap. Hence, dynamic call - * may be made for MIN_QUALITY via ENH_LAYER_COUNT. - * Therefore, below streaming check is required to avoid - * runtime modification of MIN_QUALITY. - */ - if (inst->bufq[OUTPUT_PORT].vb2q->streaming) - return 0; - - if (msm_vidc_get_parent_value(inst, MIN_QUALITY, - BITRATE_MODE, &rc_type, __func__) || - msm_vidc_get_parent_value(inst, MIN_QUALITY, - META_ROI_INFO, &roi_enable, __func__) || - msm_vidc_get_parent_value(inst, MIN_QUALITY, - ENH_LAYER_COUNT, &enh_layer_count, __func__)) - return -EINVAL; - - /* - * Min Quality is supported only for VBR rc type. - * Hence, do not adjust or set to firmware for non VBR rc's - */ - if (rc_type != HFI_RC_VBR_CFR) { - adjusted_value = 0; - goto update_and_exit; - } - - frame_rate = inst->capabilities->cap[FRAME_RATE].value >> 16; - f = &inst->fmts[OUTPUT_PORT]; - width = f->fmt.pix_mp.width; - height = f->fmt.pix_mp.height; - - /* - * VBR Min Quality not supported for: - * - HEVC 10bit - * - ROI support - * - HP encoding - * - External Blur - * - Resolution beyond 1080P - * (It will fall back to CQCAC 25% or 0% (CAC) or CQCAC-OFF) - */ - if (inst->codec == MSM_VIDC_HEVC) { - if (msm_vidc_get_parent_value(inst, MIN_QUALITY, - PIX_FMTS, &pix_fmts, __func__)) - return -EINVAL; - - if (is_10bit_colorformat(pix_fmts)) { - i_vpr_h(inst, - "%s: min quality is supported only for 8 bit\n", - __func__); - adjusted_value = 0; - goto update_and_exit; - } - } - - if (res_is_greater_than(width, height, 1920, 1080)) { - i_vpr_h(inst, "%s: unsupported res, wxh %ux%u\n", - __func__, width, height); - adjusted_value = 0; - goto update_and_exit; - } - - if (frame_rate > 60) { - i_vpr_h(inst, "%s: unsupported fps %u\n", - __func__, frame_rate); - adjusted_value = 0; - goto update_and_exit; - } - - if (is_meta_tx_inp_enabled(inst, META_ROI_INFO)) { - i_vpr_h(inst, - "%s: min quality not supported with roi metadata\n", - __func__); - adjusted_value = 0; - goto update_and_exit; - } - - if (enh_layer_count > 0 && inst->hfi_layer_type != HFI_HIER_B) { - i_vpr_h(inst, - "%s: min quality not supported for HP encoding\n", - __func__); - adjusted_value = 0; - goto update_and_exit; - } - - /* Above conditions are met. Hence enable min quality */ - adjusted_value = MAX_SUPPORTED_MIN_QUALITY; - -update_and_exit: - msm_vidc_update_cap_value(inst, MIN_QUALITY, - adjusted_value, __func__); - - return 0; -} - -int msm_vidc_adjust_preprocess(void *instance, struct v4l2_ctrl *ctrl) -{ - s32 adjusted_value; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - s32 brs = -1, eva_status = -1; - u32 width, height, frame_rate, operating_rate, max_fps; - struct v4l2_format *f; - - if (!inst || !inst->capabilities || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - adjusted_value = inst->capabilities->cap[REQUEST_PREPROCESS].value; - - if (msm_vidc_get_parent_value(inst, REQUEST_PREPROCESS, CONTENT_ADAPTIVE_CODING, - &brs, __func__) || - msm_vidc_get_parent_value(inst, REQUEST_PREPROCESS, META_EVA_STATS, - &eva_status, __func__)) - return -EINVAL; - - width = inst->crop.width; - height = inst->crop.height; - frame_rate = msm_vidc_get_frame_rate(inst);; - operating_rate = msm_vidc_get_operating_rate(inst);; - - max_fps = max(frame_rate, operating_rate); - f= &inst->fmts[OUTPUT_PORT]; - - /* - * enable preprocess if - * client did not enable EVA metadata statistics and - * BRS enabled and upto 4k @ 60 fps - */ - if (!is_meta_tx_inp_enabled(inst, META_EVA_STATS) && - brs == 1 && - res_is_less_than_or_equal_to(width, height, 3840, 2160) && - max_fps <= 60) - adjusted_value = 1; - else - adjusted_value = 0; - - msm_vidc_update_cap_value(inst, REQUEST_PREPROCESS, - adjusted_value, __func__); - - return 0; -} - -int msm_vidc_adjust_enc_lowlatency_mode(void *instance, struct v4l2_ctrl *ctrl) -{ - struct msm_vidc_inst_capability *capability; - s32 adjusted_value; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - s32 rc_type = -1; - - if (!inst || !inst->capabilities) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - capability = inst->capabilities; - - adjusted_value = ctrl ? ctrl->val : - capability->cap[LOWLATENCY_MODE].value; - - if (msm_vidc_get_parent_value(inst, LOWLATENCY_MODE, BITRATE_MODE, - &rc_type, __func__)) - return -EINVAL; - - if (rc_type == HFI_RC_CBR_CFR || - rc_type == HFI_RC_CBR_VFR || - is_enc_slice_delivery_mode(inst)) - adjusted_value = 1; - - msm_vidc_update_cap_value(inst, LOWLATENCY_MODE, - adjusted_value, __func__); - - return 0; -} - -int msm_vidc_adjust_dec_lowlatency_mode(void *instance, struct v4l2_ctrl *ctrl) -{ - struct msm_vidc_inst_capability *capability; - s32 adjusted_value; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - s32 outbuf_fence = MSM_VIDC_META_DISABLE; - - if (!inst || !inst->capabilities) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - capability = inst->capabilities; - - adjusted_value = ctrl ? ctrl->val : - capability->cap[LOWLATENCY_MODE].value; - - if (msm_vidc_get_parent_value(inst, LOWLATENCY_MODE, META_OUTBUF_FENCE, - &outbuf_fence, __func__)) - return -EINVAL; - - /* enable lowlatency if outbuf fence is enabled */ - if (outbuf_fence & MSM_VIDC_META_ENABLE && - outbuf_fence & MSM_VIDC_META_RX_INPUT) - adjusted_value = 1; - - msm_vidc_update_cap_value(inst, LOWLATENCY_MODE, - adjusted_value, __func__); - - return 0; -} - -int msm_vidc_adjust_session_priority(void *instance, struct v4l2_ctrl *ctrl) -{ - int adjusted_value; - struct msm_vidc_inst_capability *capability; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; - - if (!inst || !inst->capabilities) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - capability = inst->capabilities; - /* - * Priority handling - * Client will set 0 (realtime), 1+ (non-realtime) - * Driver adds NRT_PRIORITY_OFFSET (2) to clients non-realtime priority - * and hence PRIORITY values in the driver become 0, 3+. - * Driver may move decode realtime sessions to non-realtime by - * increasing priority by 1 to RT sessions in HW overloaded cases. - * So driver PRIORITY values can be 0, 1, 3+. - * When driver setting priority to firmware, driver adds - * FIRMWARE_PRIORITY_OFFSET (1) for all sessions except - * non-critical sessions. So finally firmware priority values ranges - * from 0 (Critical session), 1 (realtime session), - * 2+ (non-realtime session) - */ - if (ctrl) { - /* add offset when client sets non-realtime */ - if (ctrl->val) - adjusted_value = ctrl->val + NRT_PRIORITY_OFFSET; - else - adjusted_value = ctrl->val; - } else { - adjusted_value = capability->cap[PRIORITY].value; - } - - msm_vidc_update_cap_value(inst, PRIORITY, adjusted_value, __func__); - - return 0; -} - -int msm_vidc_adjust_roi_info(void *instance, struct v4l2_ctrl *ctrl) -{ - struct msm_vidc_inst_capability *capability; - s32 adjusted_value; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - s32 rc_type = -1, pix_fmt = -1; - - if (!inst || !inst->capabilities) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - capability = inst->capabilities; - - adjusted_value = ctrl ? ctrl->val : capability->cap[META_ROI_INFO].value; - - if (msm_vidc_get_parent_value(inst, META_ROI_INFO, BITRATE_MODE, - &rc_type, __func__)) - return -EINVAL; - - if (msm_vidc_get_parent_value(inst, META_ROI_INFO, PIX_FMTS, - &pix_fmt, __func__)) - return -EINVAL; - - if ((rc_type != HFI_RC_VBR_CFR && rc_type != HFI_RC_CBR_CFR - && rc_type != HFI_RC_CBR_VFR) || !is_8bit_colorformat(pix_fmt) - || is_scaling_enabled(inst) || is_rotation_90_or_270(inst)) - adjusted_value = 0; - - msm_vidc_update_cap_value(inst, META_ROI_INFO, - adjusted_value, __func__); - - return 0; -} - -int msm_vidc_adjust_dec_outbuf_fence(void *instance, struct v4l2_ctrl *ctrl) -{ - struct msm_vidc_inst_capability *capability; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - u32 adjusted_value = 0; - s32 picture_order = -1; - - if (!inst || !inst->capabilities) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - capability = inst->capabilities; - - adjusted_value = ctrl ? ctrl->val : capability->cap[META_OUTBUF_FENCE].value; - - if (msm_vidc_get_parent_value(inst, META_OUTBUF_FENCE, OUTPUT_ORDER, - &picture_order, __func__)) - return -EINVAL; - - if (picture_order == 0) { - /* disable outbuf fence */ - adjusted_value = MSM_VIDC_META_DISABLE | - MSM_VIDC_META_RX_INPUT; - } - - msm_vidc_update_cap_value(inst, META_OUTBUF_FENCE, - adjusted_value, __func__); - - return 0; -} - -int msm_vidc_adjust_dec_slice_mode(void *instance, struct v4l2_ctrl *ctrl) -{ - struct msm_vidc_inst_capability *capability; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - u32 adjusted_value = 0; - s32 low_latency = -1; - s32 picture_order = -1; - s32 outbuf_fence = 0; - - if (!inst || !inst->capabilities) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - capability = inst->capabilities; - - adjusted_value = ctrl ? ctrl->val : capability->cap[SLICE_DECODE].value; - - if (msm_vidc_get_parent_value(inst, SLICE_DECODE, LOWLATENCY_MODE, - &low_latency, __func__) || - msm_vidc_get_parent_value(inst, SLICE_DECODE, OUTPUT_ORDER, - &picture_order, __func__) || - msm_vidc_get_parent_value(inst, SLICE_DECODE, META_OUTBUF_FENCE, - &outbuf_fence, __func__)) - return -EINVAL; - - if (!low_latency || !picture_order || - !is_meta_rx_inp_enabled(inst, META_OUTBUF_FENCE)) - adjusted_value = 0; - - msm_vidc_update_cap_value(inst, SLICE_DECODE, - adjusted_value, __func__); - - return 0; -} - int msm_vidc_prepare_dependency_list(struct msm_vidc_inst *inst) { struct list_head root_list, opt_list; @@ -3077,1419 +1144,3 @@ int msm_vidc_adjust_set_v4l2_properties(struct msm_vidc_inst *inst) return rc; } - -int msm_vidc_set_header_mode(void *instance, - enum msm_vidc_inst_capability_type cap_id) -{ - int rc = 0; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - int header_mode, prepend_sps_pps; - u32 hfi_value = 0; - struct msm_vidc_inst_capability *capability; - - if (!inst || !inst->capabilities) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - capability = inst->capabilities; - - header_mode = capability->cap[cap_id].value; - prepend_sps_pps = capability->cap[PREPEND_SPSPPS_TO_IDR].value; - - /* prioritize PREPEND_SPSPPS_TO_IDR mode over other header modes */ - if (prepend_sps_pps) - hfi_value = HFI_SEQ_HEADER_PREFIX_WITH_SYNC_FRAME; - else if (header_mode == V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME) - hfi_value = HFI_SEQ_HEADER_JOINED_WITH_1ST_FRAME; - else - hfi_value = HFI_SEQ_HEADER_SEPERATE_FRAME; - - if (is_meta_rx_out_enabled(inst, META_SEQ_HDR_NAL)) - hfi_value |= HFI_SEQ_HEADER_METADATA; - - rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32_ENUM, - &hfi_value, sizeof(u32), __func__); - if (rc) - return rc; - - return rc; -} - -int msm_vidc_set_deblock_mode(void *instance, - enum msm_vidc_inst_capability_type cap_id) -{ - int rc = 0; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - s32 alpha = 0, beta = 0; - u32 lf_mode, hfi_value = 0, lf_offset = 6; - struct msm_vidc_inst_capability *capability; - - if (!inst || !inst->capabilities) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - capability = inst->capabilities; - - rc = msm_vidc_v4l2_to_hfi_enum(inst, LF_MODE, &lf_mode); - if (rc) - return -EINVAL; - - beta = inst->capabilities->cap[LF_BETA].value + lf_offset; - alpha = inst->capabilities->cap[LF_ALPHA].value + lf_offset; - hfi_value = (alpha << 16) | (beta << 8) | lf_mode; - - rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_32_PACKED, - &hfi_value, sizeof(u32), __func__); - if (rc) - return rc; - - return rc; -} - -int msm_vidc_set_constant_quality(void *instance, - enum msm_vidc_inst_capability_type cap_id) -{ - int rc = 0; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; - u32 hfi_value = 0; - s32 rc_type = -1; - - if (!inst || !inst->capabilities) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - if (msm_vidc_get_parent_value(inst, cap_id, - BITRATE_MODE, &rc_type, __func__)) - return -EINVAL; - - if (rc_type != HFI_RC_CQ) - return 0; - - hfi_value = inst->capabilities->cap[cap_id].value; - - rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32, - &hfi_value, sizeof(u32), __func__); - if (rc) - return rc; - - return rc; -} - -int msm_vidc_set_vbr_related_properties(void *instance, - enum msm_vidc_inst_capability_type cap_id) -{ - int rc = 0; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; - u32 hfi_value = 0; - s32 rc_type = -1; - - if (!inst || !inst->capabilities) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - if (msm_vidc_get_parent_value(inst, cap_id, - BITRATE_MODE, &rc_type, __func__)) - return -EINVAL; - - if (rc_type != HFI_RC_VBR_CFR) - return 0; - - hfi_value = inst->capabilities->cap[cap_id].value; - - rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32, - &hfi_value, sizeof(u32), __func__); - if (rc) - return rc; - - return rc; -} - -int msm_vidc_set_cbr_related_properties(void *instance, - enum msm_vidc_inst_capability_type cap_id) -{ - int rc = 0; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; - u32 hfi_value = 0; - s32 rc_type = -1; - - if (!inst || !inst->capabilities) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - if (msm_vidc_get_parent_value(inst, cap_id, - BITRATE_MODE, &rc_type, __func__)) - return -EINVAL; - - if (rc_type != HFI_RC_CBR_VFR && - rc_type != HFI_RC_CBR_CFR) - return 0; - - hfi_value = inst->capabilities->cap[cap_id].value; - - rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32, - &hfi_value, sizeof(u32), __func__); - if (rc) - return rc; - - return rc; -} - -int msm_vidc_set_use_and_mark_ltr(void *instance, - enum msm_vidc_inst_capability_type cap_id) -{ - int rc = 0; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; - u32 hfi_value = 0; - - if (!inst || !inst->capabilities) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - if (!inst->capabilities->cap[LTR_COUNT].value || - (inst->capabilities->cap[cap_id].value == - INVALID_DEFAULT_MARK_OR_USE_LTR)) { - i_vpr_h(inst, - "%s: LTR_COUNT: %d %s: %d, cap %s is not set\n", - __func__, inst->capabilities->cap[LTR_COUNT].value, - cap_name(cap_id), - inst->capabilities->cap[cap_id].value, - cap_name(cap_id)); - return 0; - } - - hfi_value = inst->capabilities->cap[cap_id].value; - - rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32, - &hfi_value, sizeof(u32), __func__); - if (rc) - return rc; - - return rc; -} - -int msm_vidc_set_min_qp(void *instance, - enum msm_vidc_inst_capability_type cap_id) -{ - int rc = 0; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; - struct msm_vidc_inst_capability *capability; - s32 i_frame_qp = 0, p_frame_qp = 0, b_frame_qp = 0, min_qp_enable = 0; - u32 i_qp_enable = 0, p_qp_enable = 0, b_qp_enable = 0; - u32 client_qp_enable = 0, hfi_value = 0, offset = 0; - - if (!inst || !inst->capabilities) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - capability = inst->capabilities; - - if (capability->cap[MIN_FRAME_QP].flags & CAP_FLAG_CLIENT_SET) - min_qp_enable = 1; - - if (min_qp_enable || - (capability->cap[I_FRAME_MIN_QP].flags & CAP_FLAG_CLIENT_SET)) - i_qp_enable = 1; - if (min_qp_enable || - (capability->cap[P_FRAME_MIN_QP].flags & CAP_FLAG_CLIENT_SET)) - p_qp_enable = 1; - if (min_qp_enable || - (capability->cap[B_FRAME_MIN_QP].flags & CAP_FLAG_CLIENT_SET)) - b_qp_enable = 1; - - client_qp_enable = i_qp_enable | p_qp_enable << 1 | b_qp_enable << 2; - if (!client_qp_enable) { - i_vpr_h(inst, - "%s: client did not set min qp, cap %s is not set\n", - __func__, cap_name(cap_id)); - return 0; - } - - if (is_10bit_colorformat(capability->cap[PIX_FMTS].value)) - offset = 12; - - /* - * I_FRAME_MIN_QP, P_FRAME_MIN_QP, B_FRAME_MIN_QP, - * MIN_FRAME_QP caps have default value as MIN_QP_10BIT values. - * Hence, if client sets either one among MIN_FRAME_QP - * and (I_FRAME_MIN_QP or P_FRAME_MIN_QP or B_FRAME_MIN_QP), - * max of both caps will result into client set value. - */ - i_frame_qp = max(capability->cap[I_FRAME_MIN_QP].value, - capability->cap[MIN_FRAME_QP].value) + offset; - p_frame_qp = max(capability->cap[P_FRAME_MIN_QP].value, - capability->cap[MIN_FRAME_QP].value) + offset; - b_frame_qp = max(capability->cap[B_FRAME_MIN_QP].value, - capability->cap[MIN_FRAME_QP].value) + offset; - - hfi_value = i_frame_qp | p_frame_qp << 8 | b_frame_qp << 16 | - client_qp_enable << 24; - - rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_32_PACKED, - &hfi_value, sizeof(u32), __func__); - if (rc) - return rc; - - return rc; -} - -int msm_vidc_set_max_qp(void *instance, - enum msm_vidc_inst_capability_type cap_id) -{ - int rc = 0; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; - struct msm_vidc_inst_capability *capability; - s32 i_frame_qp = 0, p_frame_qp = 0, b_frame_qp = 0, max_qp_enable = 0; - u32 i_qp_enable = 0, p_qp_enable = 0, b_qp_enable = 0; - u32 client_qp_enable = 0, hfi_value = 0, offset = 0; - - if (!inst || !inst->capabilities) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - capability = inst->capabilities; - - if (capability->cap[MAX_FRAME_QP].flags & CAP_FLAG_CLIENT_SET) - max_qp_enable = 1; - - if (max_qp_enable || - (capability->cap[I_FRAME_MAX_QP].flags & CAP_FLAG_CLIENT_SET)) - i_qp_enable = 1; - if (max_qp_enable || - (capability->cap[P_FRAME_MAX_QP].flags & CAP_FLAG_CLIENT_SET)) - p_qp_enable = 1; - if (max_qp_enable || - (capability->cap[B_FRAME_MAX_QP].flags & CAP_FLAG_CLIENT_SET)) - b_qp_enable = 1; - - client_qp_enable = i_qp_enable | p_qp_enable << 1 | b_qp_enable << 2; - if (!client_qp_enable) { - i_vpr_h(inst, - "%s: client did not set max qp, cap %s is not set\n", - __func__, cap_name(cap_id)); - return 0; - } - - if (is_10bit_colorformat(capability->cap[PIX_FMTS].value)) - offset = 12; - - /* - * I_FRAME_MAX_QP, P_FRAME_MAX_QP, B_FRAME_MAX_QP, - * MAX_FRAME_QP caps have default value as MAX_QP values. - * Hence, if client sets either one among MAX_FRAME_QP - * and (I_FRAME_MAX_QP or P_FRAME_MAX_QP or B_FRAME_MAX_QP), - * min of both caps will result into client set value. - */ - i_frame_qp = min(capability->cap[I_FRAME_MAX_QP].value, - capability->cap[MAX_FRAME_QP].value) + offset; - p_frame_qp = min(capability->cap[P_FRAME_MAX_QP].value, - capability->cap[MAX_FRAME_QP].value) + offset; - b_frame_qp = min(capability->cap[B_FRAME_MAX_QP].value, - capability->cap[MAX_FRAME_QP].value) + offset; - - hfi_value = i_frame_qp | p_frame_qp << 8 | b_frame_qp << 16 | - client_qp_enable << 24; - - rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_32_PACKED, - &hfi_value, sizeof(u32), __func__); - if (rc) - return rc; - - return rc; -} - -int msm_vidc_set_frame_qp(void *instance, - enum msm_vidc_inst_capability_type cap_id) -{ - int rc = 0; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; - struct msm_vidc_inst_capability *capab; - s32 i_frame_qp = 0, p_frame_qp = 0, b_frame_qp = 0; - u32 i_qp_enable = 0, p_qp_enable = 0, b_qp_enable = 0; - u32 client_qp_enable = 0, hfi_value = 0, offset = 0; - s32 rc_type = -1; - - if (!inst || !inst->capabilities) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - capab = inst->capabilities; - - if (msm_vidc_get_parent_value(inst, cap_id, - BITRATE_MODE, &rc_type, __func__)) - return -EINVAL; - - if (inst->bufq[OUTPUT_PORT].vb2q->streaming) { - if (rc_type != HFI_RC_OFF) { - i_vpr_h(inst, - "%s: dynamic qp not allowed for rc type %d\n", - __func__, rc_type); - return 0; - } - } - - if (rc_type == HFI_RC_OFF) { - /* Mandatorily set for rc off case */ - i_qp_enable = p_qp_enable = b_qp_enable = 1; - } else { - /* Set only if client has set for NON rc off case */ - if (capab->cap[I_FRAME_QP].flags & CAP_FLAG_CLIENT_SET) - i_qp_enable = 1; - if (capab->cap[P_FRAME_QP].flags & CAP_FLAG_CLIENT_SET) - p_qp_enable = 1; - if (capab->cap[B_FRAME_QP].flags & CAP_FLAG_CLIENT_SET) - b_qp_enable = 1; - } - - client_qp_enable = i_qp_enable | p_qp_enable << 1 | b_qp_enable << 2; - if (!client_qp_enable) { - i_vpr_h(inst, - "%s: client did not set frame qp, cap %s is not set\n", - __func__, cap_name(cap_id)); - return 0; - } - - if (is_10bit_colorformat(capab->cap[PIX_FMTS].value)) - offset = 12; - - i_frame_qp = capab->cap[I_FRAME_QP].value + offset; - p_frame_qp = capab->cap[P_FRAME_QP].value + offset; - b_frame_qp = capab->cap[B_FRAME_QP].value + offset; - - hfi_value = i_frame_qp | p_frame_qp << 8 | b_frame_qp << 16 | - client_qp_enable << 24; - - rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_32_PACKED, - &hfi_value, sizeof(u32), __func__); - if (rc) - return rc; - - return rc; -} - -int msm_vidc_set_req_sync_frame(void *instance, - enum msm_vidc_inst_capability_type cap_id) -{ - int rc = 0; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; - s32 prepend_spspps; - u32 hfi_value = 0; - - if (!inst || !inst->capabilities) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - prepend_spspps = inst->capabilities->cap[PREPEND_SPSPPS_TO_IDR].value; - if (prepend_spspps) - hfi_value = HFI_SYNC_FRAME_REQUEST_WITH_PREFIX_SEQ_HDR; - else - hfi_value = HFI_SYNC_FRAME_REQUEST_WITHOUT_SEQ_HDR; - - rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32_ENUM, - &hfi_value, sizeof(u32), __func__); - if (rc) - return rc; - - return rc; -} - -int msm_vidc_set_chroma_qp_index_offset(void *instance, - enum msm_vidc_inst_capability_type cap_id) -{ - int rc = 0; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; - u32 hfi_value = 0, chroma_qp_offset_mode = 0, chroma_qp = 0; - u32 offset = 12; - - if (!inst || !inst->capabilities) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - if (inst->capabilities->cap[cap_id].flags & CAP_FLAG_CLIENT_SET) - chroma_qp_offset_mode = HFI_FIXED_CHROMAQP_OFFSET; - else - chroma_qp_offset_mode = HFI_ADAPTIVE_CHROMAQP_OFFSET; - - chroma_qp = inst->capabilities->cap[cap_id].value + offset; - hfi_value = chroma_qp_offset_mode | chroma_qp << 8 | chroma_qp << 16 ; - - rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_32_PACKED, - &hfi_value, sizeof(u32), __func__); - if (rc) - return rc; - - return rc; -} - -int msm_vidc_set_slice_count(void* instance, - enum msm_vidc_inst_capability_type cap_id) -{ - int rc = 0; - struct msm_vidc_inst* inst = (struct msm_vidc_inst*)instance; - s32 slice_mode = -1; - u32 hfi_value = 0, set_cap_id = 0; - - if (!inst || !inst->capabilities) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - slice_mode = inst->capabilities->cap[SLICE_MODE].value; - - if (slice_mode == V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE) { - i_vpr_h(inst, "%s: slice mode is: %u, ignore setting to fw\n", - __func__, slice_mode); - return 0; - } - if (slice_mode == V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_MB) { - hfi_value = (inst->codec == MSM_VIDC_HEVC) ? - ((inst->capabilities->cap[SLICE_MAX_MB].value + 3) / 4) : - inst->capabilities->cap[SLICE_MAX_MB].value; - set_cap_id = SLICE_MAX_MB; - } else if (slice_mode == V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_BYTES) { - hfi_value = inst->capabilities->cap[SLICE_MAX_BYTES].value; - set_cap_id = SLICE_MAX_BYTES; - } - - rc = msm_vidc_packetize_control(inst, set_cap_id, HFI_PAYLOAD_U32, - &hfi_value, sizeof(u32), __func__); - if (rc) - return rc; - - return rc; -} - -int msm_vidc_set_nal_length(void* instance, - enum msm_vidc_inst_capability_type cap_id) -{ - int rc = 0; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; - u32 hfi_value = HFI_NAL_LENGTH_STARTCODES; - - if (!inst || !inst->capabilities) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - if (!inst->capabilities->cap[WITHOUT_STARTCODE].value) { - hfi_value = HFI_NAL_LENGTH_STARTCODES; - } else { - rc = msm_vidc_v4l2_to_hfi_enum(inst, NAL_LENGTH_FIELD, &hfi_value); - if (rc) - return -EINVAL; - } - - rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32_ENUM, - &hfi_value, sizeof(u32), __func__); - if (rc) - return rc; - - return rc; -} - -int msm_vidc_set_layer_count_and_type(void *instance, - enum msm_vidc_inst_capability_type cap_id) -{ - int rc = 0; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; - u32 hfi_layer_count, hfi_layer_type = 0; - - if (!inst || !inst->capabilities) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - if (!inst->bufq[OUTPUT_PORT].vb2q->streaming) { - /* set layer type */ - hfi_layer_type = inst->hfi_layer_type; - cap_id = LAYER_TYPE; - - rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32_ENUM, - &hfi_layer_type, sizeof(u32), __func__); - if (rc) - goto exit; - } else { - if (inst->hfi_layer_type == HFI_HIER_B) { - i_vpr_l(inst, - "%s: HB dyn layers change is not supported\n", - __func__); - return 0; - } - } - - /* set layer count */ - cap_id = ENH_LAYER_COUNT; - /* hfi baselayer starts from 1 */ - hfi_layer_count = inst->capabilities->cap[ENH_LAYER_COUNT].value + 1; - - rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32, - &hfi_layer_count, sizeof(u32), __func__); - if (rc) - goto exit; - -exit: - return rc; -} - -int msm_vidc_set_gop_size(void *instance, - enum msm_vidc_inst_capability_type cap_id) -{ - int rc = 0; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; - u32 hfi_value; - - if (!inst || !inst->capabilities) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - if (inst->bufq[OUTPUT_PORT].vb2q->streaming) { - if (inst->hfi_layer_type == HFI_HIER_B) { - i_vpr_l(inst, - "%s: HB dyn GOP setting is not supported\n", - __func__); - return 0; - } - } - - hfi_value = inst->capabilities->cap[GOP_SIZE].value; - - rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32, - &hfi_value, sizeof(u32), __func__); - if (rc) - return rc; - - return rc; -} - -int msm_vidc_set_bitrate(void *instance, - enum msm_vidc_inst_capability_type cap_id) -{ - int rc = 0, i; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; - u32 hfi_value = 0; - s32 rc_type = -1, enh_layer_count = -1; - u32 layer_br_caps[6] = {L0_BR, L1_BR, L2_BR, L3_BR, L4_BR, L5_BR}; - - if (!inst || !inst->capabilities) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - /* set Total Bitrate */ - if (inst->capabilities->cap[BIT_RATE].flags & CAP_FLAG_CLIENT_SET) - goto set_total_bitrate; - - /* - * During runtime, if BIT_RATE cap CLIENT_SET flag is not set, - * then this function will be called due to change in ENH_LAYER_COUNT. - * In this case, client did not change bitrate, hence, no need to set - * to fw. - */ - if (inst->bufq[OUTPUT_PORT].vb2q->streaming) - return 0; - - if (msm_vidc_get_parent_value(inst, BIT_RATE, - BITRATE_MODE, &rc_type, __func__)) - return -EINVAL; - - if (rc_type != HFI_RC_CBR_CFR && rc_type != HFI_RC_CBR_VFR) { - i_vpr_h(inst, "%s: set total bitrate for non CBR rc type\n", - __func__); - goto set_total_bitrate; - } - - if (msm_vidc_get_parent_value(inst, BIT_RATE, - ENH_LAYER_COUNT, &enh_layer_count, __func__)) - return -EINVAL; - - /* - * ENH_LAYER_COUNT cap max is positive only if - * layer encoding is enabled during streamon. - */ - if (inst->capabilities->cap[ENH_LAYER_COUNT].max) { - if (!msm_vidc_check_all_layer_bitrate_set(inst)) - goto set_total_bitrate; - - /* set Layer Bitrate */ - for (i = 0; i <= enh_layer_count; i++) { - if (i >= ARRAY_SIZE(layer_br_caps)) - break; - cap_id = layer_br_caps[i]; - hfi_value = inst->capabilities->cap[cap_id].value; - rc = msm_vidc_packetize_control(inst, cap_id, - HFI_PAYLOAD_U32, &hfi_value, - sizeof(u32), __func__); - if (rc) - return rc; - } - goto exit; - } - -set_total_bitrate: - hfi_value = inst->capabilities->cap[BIT_RATE].value; - rc = msm_vidc_packetize_control(inst, BIT_RATE, HFI_PAYLOAD_U32, - &hfi_value, sizeof(u32), __func__); - if (rc) - return rc; -exit: - return rc; -} - -int msm_vidc_set_dynamic_layer_bitrate(void *instance, - enum msm_vidc_inst_capability_type cap_id) -{ - int rc = 0; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; - u32 hfi_value = 0; - s32 rc_type = -1; - - if (!inst || !inst->capabilities) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - if (!inst->bufq[OUTPUT_PORT].vb2q->streaming) - return 0; - - /* set Total Bitrate */ - if (inst->capabilities->cap[BIT_RATE].flags & CAP_FLAG_CLIENT_SET) { - i_vpr_h(inst, - "%s: Total bitrate is set, ignore layer bitrate\n", - __func__); - return 0; - } - - /* - * ENH_LAYER_COUNT cap max is positive only if - * layer encoding is enabled during streamon. - */ - if (!inst->capabilities->cap[ENH_LAYER_COUNT].max || - !msm_vidc_check_all_layer_bitrate_set(inst)) { - i_vpr_h(inst, - "%s: invalid layer bitrate, ignore setting to fw\n", - __func__); - return 0; - } - - if (inst->hfi_rc_type == HFI_RC_CBR_CFR || - rc_type == HFI_RC_CBR_VFR) { - /* set layer bitrate for the client set layer */ - hfi_value = inst->capabilities->cap[cap_id].value; - rc = msm_vidc_packetize_control(inst, cap_id, - HFI_PAYLOAD_U32, &hfi_value, - sizeof(u32), __func__); - if (rc) - return rc; - } else { - /* - * All layer bitartes set for unsupported rc type. - * Hence accept layer bitrates, but set total bitrate prop - * with cumulative bitrate. - */ - hfi_value = inst->capabilities->cap[BIT_RATE].value; - rc = msm_vidc_packetize_control(inst, BIT_RATE, HFI_PAYLOAD_U32, - &hfi_value, sizeof(u32), __func__); - if (rc) - return rc; - } - - return rc; -} - -int msm_vidc_set_session_priority(void *instance, - enum msm_vidc_inst_capability_type cap_id) -{ - int rc = 0; - u32 hfi_value = 0; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; - - if (!inst || !inst->capabilities) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - hfi_value = inst->capabilities->cap[cap_id].value; - if (!is_critical_priority_session(inst)) - hfi_value = inst->capabilities->cap[cap_id].value + - inst->capabilities->cap[FIRMWARE_PRIORITY_OFFSET].value; - - rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32, - &hfi_value, sizeof(u32), __func__); - if (rc) - return rc; - - return rc; -} - -int msm_vidc_set_flip(void *instance, - enum msm_vidc_inst_capability_type cap_id) -{ - int rc = 0; - u32 hflip, vflip, hfi_value = HFI_DISABLE_FLIP; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; - - if (!inst || !inst->capabilities) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - hflip = inst->capabilities->cap[HFLIP].value; - vflip = inst->capabilities->cap[VFLIP].value; - - if (hflip) - hfi_value |= HFI_HORIZONTAL_FLIP; - - if (vflip) - hfi_value |= HFI_VERTICAL_FLIP; - - if (inst->bufq[OUTPUT_PORT].vb2q->streaming) { - if (hfi_value != HFI_DISABLE_FLIP) { - rc = msm_vidc_set_req_sync_frame(inst, - REQUEST_I_FRAME); - if (rc) - return rc; - } - } - - rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32_ENUM, - &hfi_value, sizeof(u32), __func__); - if (rc) - return rc; - - return rc; -} - -int msm_vidc_set_preprocess(void *instance, - enum msm_vidc_inst_capability_type cap_id) -{ - int rc = 0; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; - u32 hfi_value; - - if (!inst || !inst->capabilities) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32_ENUM, - &hfi_value, sizeof(u32), __func__); - if (rc) - return rc; - - return rc; -} - -int msm_vidc_set_rotation(void *instance, - enum msm_vidc_inst_capability_type cap_id) -{ - int rc = 0; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; - u32 hfi_value; - - if (!inst || !inst->capabilities) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - rc = msm_vidc_v4l2_to_hfi_enum(inst, cap_id, &hfi_value); - if (rc) - return -EINVAL; - - rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32, - &hfi_value, sizeof(u32), __func__); - if (rc) - return rc; - - return rc; -} - -int msm_vidc_set_blur_resolution(void *instance, - enum msm_vidc_inst_capability_type cap_id) -{ - int rc = 0; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; - s32 blur_type = -1; - u32 hfi_value, blur_width, blur_height; - - if (!inst || !inst->capabilities) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - if (msm_vidc_get_parent_value(inst, cap_id, - BLUR_TYPES, &blur_type, __func__)) - return -EINVAL; - - if (blur_type != MSM_VIDC_BLUR_EXTERNAL) - return 0; - - hfi_value = inst->capabilities->cap[cap_id].value; - - blur_width = (hfi_value & 0xFFFF0000) >> 16; - blur_height = hfi_value & 0xFFFF; - - if (blur_width > inst->crop.width || - blur_height > inst->crop.height) { - i_vpr_e(inst, - "%s: blur wxh: %dx%d exceeds crop wxh: %dx%d\n", - __func__, blur_width, blur_height, - inst->crop.width, inst->crop.height); - hfi_value = 0; - } - - if (blur_width == inst->crop.width && - blur_height == inst->crop.height) { - i_vpr_e(inst, - "%s: blur wxh: %dx%d is equal to crop wxh: %dx%d\n", - __func__, blur_width, blur_height, - inst->crop.width, inst->crop.height); - hfi_value = 0; - } - - rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_32_PACKED, - &hfi_value, sizeof(u32), __func__); - if (rc) - return rc; - - return rc; -} - -static int msm_venc_set_csc_coeff(struct msm_vidc_inst *inst, - const char *prop_name, u32 hfi_id, void *payload, - u32 payload_size, u32 row_count, u32 column_count) -{ - int rc = 0; - - i_vpr_h(inst, - "set cap: name: %24s, hard coded %dx%d matrix array\n", - prop_name, row_count, column_count); - rc = venus_hfi_session_property(inst, - hfi_id, - HFI_HOST_FLAGS_NONE, - HFI_PORT_BITSTREAM, - HFI_PAYLOAD_S32_ARRAY, - payload, - payload_size); - if (rc) { - i_vpr_e(inst, - "%s: failed to set %s to fw\n", - __func__, prop_name); - } - - return rc; -} -int msm_vidc_set_csc_custom_matrix(void *instance, - enum msm_vidc_inst_capability_type cap_id) -{ - int rc = 0; - int i; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; - struct msm_vidc_core *core; - struct msm_vidc_csc_coeff *csc_coeff; - s32 matrix_payload[MAX_MATRIX_COEFFS + 2]; - s32 csc_bias_payload[MAX_BIAS_COEFFS + 2]; - s32 csc_limit_payload[MAX_LIMIT_COEFFS + 2]; - - if (!inst || !inst->capabilities || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - core = inst->core; - if (!core->platform) { - d_vpr_e("%s: invalid core platform\n", __func__); - return -EINVAL; - } - csc_coeff = &core->platform->data.csc_data; - - if (!inst->capabilities->cap[cap_id].value || - !inst->capabilities->cap[CSC].value) { - i_vpr_h(inst, - "%s: ignored as custom martix %u, csc %u\n", - __func__, inst->capabilities->cap[cap_id].value, - inst->capabilities->cap[CSC].value); - return 0; - } - - /* - * first 2 u32's of payload in each case are for - * row and column count, next remaining u32's are - * for the actual payload values. - */ - - /* set custom matrix */ - matrix_payload[0] = 3; - matrix_payload[1] = 3; - - for(i = 0; i < MAX_MATRIX_COEFFS; i++) { - if ((i + 2) >= ARRAY_SIZE(matrix_payload)) - break; - matrix_payload[i + 2] = - csc_coeff->vpe_csc_custom_matrix_coeff[i]; - } - - rc = msm_venc_set_csc_coeff(inst, "CSC_CUSTOM_MATRIX", - HFI_PROP_CSC_MATRIX, &matrix_payload[0], - ARRAY_SIZE(matrix_payload) * sizeof(s32), - matrix_payload[0], matrix_payload[1]); - if (rc) - return rc; - - /* set csc bias */ - csc_bias_payload[0] = 1; - csc_bias_payload[1] = 3; - - for(i = 0; i < MAX_BIAS_COEFFS; i++) { - if ((i + 2) >= ARRAY_SIZE(csc_bias_payload)) - break; - csc_bias_payload[i + 2] = - csc_coeff->vpe_csc_custom_bias_coeff[i]; - } - - rc = msm_venc_set_csc_coeff(inst, "CSC_BIAS", - HFI_PROP_CSC_BIAS, &csc_bias_payload[0], - ARRAY_SIZE(csc_bias_payload) * sizeof(s32), - csc_bias_payload[0], csc_bias_payload[1]); - if (rc) - return rc; - - /* set csc limit */ - csc_limit_payload[0] = 1; - csc_limit_payload[1] = 6; - - for(i = 0; i < MAX_LIMIT_COEFFS; i++) { - if ((i + 2) >= ARRAY_SIZE(csc_limit_payload)) - break; - csc_limit_payload[i + 2] = - csc_coeff->vpe_csc_custom_limit_coeff[i]; - } - - rc = msm_venc_set_csc_coeff(inst, "CSC_LIMIT", - HFI_PROP_CSC_LIMIT, &csc_limit_payload[0], - ARRAY_SIZE(csc_limit_payload) * sizeof(s32), - csc_limit_payload[0], csc_limit_payload[1]); - if (rc) - return rc; - - return rc; -} - -int msm_vidc_set_reserve_duration(void *instance, - enum msm_vidc_inst_capability_type cap_id) -{ - int rc = 0; - u32 hfi_value = 0; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; - - if (!inst || !inst->capabilities) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - /* reserve hardware only when input port is streaming*/ - if (!inst->bufq[INPUT_PORT].vb2q->streaming) - return 0; - - if (!(inst->capabilities->cap[cap_id].flags & CAP_FLAG_CLIENT_SET)) - return 0; - - inst->capabilities->cap[cap_id].flags &= (~CAP_FLAG_CLIENT_SET); - - if (!is_critical_priority_session(inst)) { - i_vpr_h(inst, "%s: reserve duration allowed only for critical session\n", __func__); - return 0; - } - - hfi_value = inst->capabilities->cap[cap_id].value; - - rc = venus_hfi_reserve_hardware(inst, hfi_value); - if (rc) - return rc; - - return rc; -} - -int msm_vidc_set_level(void *instance, - enum msm_vidc_inst_capability_type cap_id) -{ - int rc = 0; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; - u32 hfi_value = 0; - - if (!inst || !inst->capabilities) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - hfi_value = inst->capabilities->cap[cap_id].value; - if (!(inst->capabilities->cap[cap_id].flags & CAP_FLAG_CLIENT_SET)) - hfi_value = HFI_LEVEL_NONE; - - rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32_ENUM, - &hfi_value, sizeof(u32), __func__); - if (rc) - return rc; - - return rc; -} - -int msm_vidc_set_q16(void *instance, - enum msm_vidc_inst_capability_type cap_id) -{ - int rc = 0; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; - u32 hfi_value = 0; - - if (!inst || !inst->capabilities) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - hfi_value = inst->capabilities->cap[cap_id].value; - - rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_Q16, - &hfi_value, sizeof(u32), __func__); - if (rc) - return rc; - - return rc; -} - -int msm_vidc_set_u32(void *instance, - enum msm_vidc_inst_capability_type cap_id) -{ - int rc = 0; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; - u32 hfi_value; - - if (!inst || !inst->capabilities) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - if (inst->capabilities->cap[cap_id].flags & CAP_FLAG_MENU) { - rc = msm_vidc_v4l2_menu_to_hfi(inst, cap_id, &hfi_value); - if (rc) - return -EINVAL; - } else { - hfi_value = inst->capabilities->cap[cap_id].value; - } - - rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32, - &hfi_value, sizeof(u32), __func__); - if (rc) - return rc; - - return rc; -} - -int msm_vidc_set_u32_packed(void *instance, - enum msm_vidc_inst_capability_type cap_id) -{ - int rc = 0; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; - u32 hfi_value; - - if (!inst || !inst->capabilities) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - if (inst->capabilities->cap[cap_id].flags & CAP_FLAG_MENU) { - rc = msm_vidc_v4l2_menu_to_hfi(inst, cap_id, &hfi_value); - if (rc) - return -EINVAL; - } else { - hfi_value = inst->capabilities->cap[cap_id].value; - } - - rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_32_PACKED, - &hfi_value, sizeof(u32), __func__); - if (rc) - return rc; - - return rc; -} - -int msm_vidc_set_u32_enum(void *instance, - enum msm_vidc_inst_capability_type cap_id) -{ - int rc = 0; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; - u32 hfi_value; - - if (!inst || !inst->capabilities) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - rc = msm_vidc_v4l2_to_hfi_enum(inst, cap_id, &hfi_value); - if (rc) - return -EINVAL; - - rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32_ENUM, - &hfi_value, sizeof(u32), __func__); - if (rc) - return rc; - - return rc; -} - -int msm_vidc_set_s32(void *instance, - enum msm_vidc_inst_capability_type cap_id) -{ - int rc = 0; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; - s32 hfi_value = 0; - - if (!inst || !inst->capabilities) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - hfi_value = inst->capabilities->cap[cap_id].value; - - rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_S32, - &hfi_value, sizeof(s32), __func__); - if (rc) - return rc; - - return rc; -} - -int msm_vidc_v4l2_menu_to_hfi(struct msm_vidc_inst *inst, - enum msm_vidc_inst_capability_type cap_id, u32 *value) -{ - struct msm_vidc_inst_capability *capability = inst->capabilities; - - switch (cap_id) { - case ENTROPY_MODE: - switch (capability->cap[cap_id].value) { - case V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC: - *value = 1; - break; - case V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC: - *value = 0; - break; - default: - *value = 1; - goto set_default; - } - return 0; - default: - i_vpr_e(inst, - "%s: mapping not specified for ctrl_id: %#x\n", - __func__, capability->cap[cap_id].v4l2_id); - return -EINVAL; - } - -set_default: - i_vpr_e(inst, - "%s: invalid value %d for ctrl id: %#x. Set default: %u\n", - __func__, capability->cap[cap_id].value, - capability->cap[cap_id].v4l2_id, *value); - return 0; -} - -int msm_vidc_v4l2_to_hfi_enum(struct msm_vidc_inst *inst, - enum msm_vidc_inst_capability_type cap_id, u32 *value) -{ - struct msm_vidc_inst_capability *capability = inst->capabilities; - - switch (cap_id) { - case BITRATE_MODE: - *value = inst->hfi_rc_type; - return 0; - case PROFILE: - case LEVEL: - case HEVC_TIER: - case AV1_TIER: - case BLUR_TYPES: - *value = capability->cap[cap_id].value; - return 0; - case LAYER_TYPE: - if (inst->codec == MSM_VIDC_HEVC) { - switch (capability->cap[cap_id].value) { - case V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B: - *value = HFI_HIER_B; - break; - case V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P: - //TODO (AS): check if this is right mapping - *value = HFI_HIER_P_SLIDING_WINDOW; - break; - default: - *value = HFI_HIER_P_SLIDING_WINDOW; - goto set_default; - } - } - return 0; - case ROTATION: - switch (capability->cap[cap_id].value) { - case 0: - *value = HFI_ROTATION_NONE; - break; - case 90: - *value = HFI_ROTATION_90; - break; - case 180: - *value = HFI_ROTATION_180; - break; - case 270: - *value = HFI_ROTATION_270; - break; - default: - *value = HFI_ROTATION_NONE; - goto set_default; - } - return 0; - case LF_MODE: - if (inst->codec == MSM_VIDC_HEVC) { - switch (capability->cap[cap_id].value) { - case V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_ENABLED: - *value = HFI_DEBLOCK_ALL_BOUNDARY; - break; - case V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_DISABLED: - *value = HFI_DEBLOCK_DISABLE; - break; - case DB_HEVC_DISABLE_SLICE_BOUNDARY: - *value = HFI_DEBLOCK_DISABLE_AT_SLICE_BOUNDARY; - break; - default: - *value = HFI_DEBLOCK_ALL_BOUNDARY; - goto set_default; - } - } else if (inst->codec == MSM_VIDC_H264) { - switch (capability->cap[cap_id].value) { - case V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED: - *value = HFI_DEBLOCK_ALL_BOUNDARY; - break; - case V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_DISABLED: - *value = HFI_DEBLOCK_DISABLE; - break; - case DB_H264_DISABLE_SLICE_BOUNDARY: - *value = HFI_DEBLOCK_DISABLE_AT_SLICE_BOUNDARY; - break; - default: - *value = HFI_DEBLOCK_ALL_BOUNDARY; - goto set_default; - } - } - return 0; - case NAL_LENGTH_FIELD: - switch (capability->cap[cap_id].value) { - case V4L2_MPEG_VIDEO_HEVC_SIZE_4: - *value = HFI_NAL_LENGTH_SIZE_4; - break; - default: - *value = HFI_NAL_LENGTH_STARTCODES; - goto set_default; - } - return 0; - default: - i_vpr_e(inst, - "%s: mapping not specified for ctrl_id: %#x\n", - __func__, capability->cap[cap_id].v4l2_id); - return -EINVAL; - } - -set_default: - i_vpr_e(inst, - "%s: invalid value %d for ctrl id: %#x. Set default: %u\n", - __func__, capability->cap[cap_id].value, - capability->cap[cap_id].v4l2_id, *value); - return 0; -} - -int msm_vidc_set_stage(void *instance, - enum msm_vidc_inst_capability_type cap_id) -{ - int rc = 0; - u32 stage = 0; - struct msm_vidc_core *core; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; - - if (!inst || !inst->capabilities || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - core = inst->core; - - rc = call_session_op(core, decide_work_mode, inst); - if (rc) { - i_vpr_e(inst, "%s: decide_work_mode failed\n", __func__); - return -EINVAL; - } - - stage = inst->capabilities->cap[STAGE].value; - - rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32, - &stage, sizeof(u32), __func__); - if (rc) - return rc; - - return rc; -} - -int msm_vidc_set_pipe(void *instance, - enum msm_vidc_inst_capability_type cap_id) -{ - int rc = 0; - u32 pipe; - struct msm_vidc_core *core; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; - - if (!inst || !inst->capabilities || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - core = inst->core; - - rc = call_session_op(core, decide_work_route, inst); - if (rc) { - i_vpr_e(inst, "%s: decide_work_route failed\n", - __func__); - return -EINVAL; - } - - pipe = inst->capabilities->cap[PIPE].value; - rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32, - &pipe, sizeof(u32), __func__); - if (rc) - return rc; - - return rc; -} - -int msm_vidc_set_vui_timing_info(void *instance, - enum msm_vidc_inst_capability_type cap_id) -{ - int rc = 0; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; - u32 hfi_value; - - if (!inst || !inst->capabilities) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - /* - * hfi is HFI_PROP_DISABLE_VUI_TIMING_INFO and v4l2 cap is - * V4L2_CID_MPEG_VIDC_VUI_TIMING_INFO and hence reverse - * the hfi_value from cap_id value. - */ - if (inst->capabilities->cap[cap_id].value == 1) - hfi_value = 0; - else - hfi_value = 1; - - rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32, - &hfi_value, sizeof(u32), __func__); - if (rc) - return rc; - - return rc; -} diff --git a/driver/vidc/src/msm_vidc_control_ext.c b/driver/vidc/src/msm_vidc_control_ext.c index ba127cc076..b526f2df19 100644 --- a/driver/vidc/src/msm_vidc_control_ext.c +++ b/driver/vidc/src/msm_vidc_control_ext.c @@ -12,6 +12,7 @@ #include "msm_vidc_internal.h" #include "msm_vidc_driver.h" #include "msm_venc.h" +#include "msm_vidc_platform.h" int msm_vidc_adjust_ir_period(void *instance, struct v4l2_ctrl *ctrl) { diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index aa1fb065e8..c0a9477e42 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -12,7 +12,6 @@ #include "msm_vidc_debug.h" #include "msm_vidc_driver.h" #include "msm_vdec.h" -#include "msm_vidc_control.h" #include "msm_vidc_memory.h" #include "msm_vidc_fence.h" #include "msm_vidc_platform.h" From 9b0140cf0397aa0fda5b4deb20f2e6e839e54c33 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Mon, 14 Nov 2022 20:22:08 +0530 Subject: [PATCH 0770/1061] video: driver: add core sub_state support Introduce core->sub_state similar to inst->sub_state. [1] pm_suspended - moved to this substate in case of PM suspend [2] handoff - moved to this state after successful handoff_regulator call. [3] fw_power_control - moved to this state in case of IFPC. [4] power_enable - will track core power_on/power_off status. [5] page_fault - used to rate_limit fault logs. [6] cpu_wd - indicates hw fired wd interrupt. [7] video_unresponsive - moved to this state if sync cmd fails. Change-Id: Iceb65cf404fd93aff7846860b0276307e4eab570 Signed-off-by: Govindaraj Rajagopal --- driver/variant/common/src/msm_vidc_variant.c | 9 +- driver/variant/iris2/src/msm_vidc_iris2.c | 22 ++- driver/variant/iris3/src/msm_vidc_iris3.c | 36 +++-- driver/variant/iris33/src/msm_vidc_iris33.c | 36 +++-- driver/vidc/inc/msm_vidc_core.h | 26 +++- driver/vidc/inc/msm_vidc_driver.h | 17 ++- driver/vidc/inc/msm_vidc_internal.h | 1 - driver/vidc/inc/venus_hfi.h | 1 - driver/vidc/src/msm_vidc_driver.c | 148 ++++++++++++++----- driver/vidc/src/msm_vidc_probe.c | 22 ++- driver/vidc/src/resources.c | 16 +- driver/vidc/src/venus_hfi.c | 77 ++++++---- driver/vidc/src/venus_hfi_queue.c | 9 +- driver/vidc/src/venus_hfi_response.c | 2 +- 14 files changed, 293 insertions(+), 129 deletions(-) diff --git a/driver/variant/common/src/msm_vidc_variant.c b/driver/variant/common/src/msm_vidc_variant.c index 293099d4c7..6587c0b29b 100644 --- a/driver/variant/common/src/msm_vidc_variant.c +++ b/driver/variant/common/src/msm_vidc_variant.c @@ -8,6 +8,7 @@ #include #include "msm_vidc_core.h" +#include "msm_vidc_driver.h" #include "msm_vidc_debug.h" #include "msm_vidc_variant.h" #include "msm_vidc_platform.h" @@ -44,7 +45,7 @@ int __write_register(struct msm_vidc_core *core, u32 reg, u32 value) if (rc) return rc; - if (!core->power_enabled) { + if (!is_core_sub_state(core, CORE_SUBSTATE_POWER_ENABLE)) { d_vpr_e("HFI Write register failed : Power is OFF\n"); return -EINVAL; } @@ -83,7 +84,7 @@ int __write_register_masked(struct msm_vidc_core *core, u32 reg, u32 value, if (rc) return rc; - if (!core->power_enabled) { + if (!is_core_sub_state(core, CORE_SUBSTATE_POWER_ENABLE)) { d_vpr_e("%s: register write failed, power is off\n", __func__); return -EINVAL; @@ -121,7 +122,7 @@ int __read_register(struct msm_vidc_core *core, u32 reg, u32 *value) return -EINVAL; } - if (!core->power_enabled) { + if (!is_core_sub_state(core, CORE_SUBSTATE_POWER_ENABLE)) { d_vpr_e("HFI Read register failed : Power is OFF\n"); return -EINVAL; } @@ -152,7 +153,7 @@ int __read_register_with_poll_timeout(struct msm_vidc_core *core, u32 reg, return -EINVAL; } - if (!core->power_enabled) { + if (!is_core_sub_state(core, CORE_SUBSTATE_POWER_ENABLE)) { d_vpr_e("%s failed: Power is OFF\n", __func__); return -EINVAL; } diff --git a/driver/variant/iris2/src/msm_vidc_iris2.c b/driver/variant/iris2/src/msm_vidc_iris2.c index e365d2c0c4..af9c582b29 100644 --- a/driver/variant/iris2/src/msm_vidc_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_iris2.c @@ -252,7 +252,7 @@ static int __power_off_iris2_hardware(struct msm_vidc_core *core) int rc = 0, i; u32 value = 0; - if (core->hw_power_control) { + if (is_core_sub_state(core, CORE_SUBSTATE_FW_PWR_CTRL)) { d_vpr_h("%s: hardware power control enabled\n", __func__); goto disable_power; } @@ -417,7 +417,7 @@ static int __power_off_iris2(struct msm_vidc_core *core) return -EINVAL; } - if (!core->power_enabled) + if (!is_core_sub_state(core, CORE_SUBSTATE_POWER_ENABLE)) return 0; /** @@ -442,7 +442,7 @@ static int __power_off_iris2(struct msm_vidc_core *core) disable_irq_nosync(core->resource->irq); core->intr_status = 0; - core->power_enabled = false; + msm_vidc_change_core_sub_state(core, CORE_SUBSTATE_POWER_ENABLE, 0, __func__); return rc; } @@ -504,9 +504,15 @@ static int __power_on_iris2(struct msm_vidc_core *core) u32 freq = 0; int rc = 0; - if (core->power_enabled) + if (is_core_sub_state(core, CORE_SUBSTATE_POWER_ENABLE)) return 0; + if (!core_in_valid_state(core)) { + d_vpr_e("%s: invalid core state %s\n", + __func__, core_state_name(core->state)); + return -EINVAL; + } + /* Vote for all hardware resources */ rc = call_res_op(core, set_bw, core, INT_MAX, INT_MAX); if (rc) { @@ -526,7 +532,9 @@ static int __power_on_iris2(struct msm_vidc_core *core) goto fail_power_on_hardware; } /* video controller and hardware powered on successfully */ - core->power_enabled = true; + rc = msm_vidc_change_core_sub_state(core, 0, CORE_SUBSTATE_POWER_ENABLE, __func__); + if (rc) + goto fail_power_on_substate; freq_tbl = core->resource->freq_set.freq_tbl; freq = core->power.clk_freq ? core->power.clk_freq : @@ -552,12 +560,14 @@ static int __power_on_iris2(struct msm_vidc_core *core) return rc; +fail_power_on_substate: + __power_off_iris2_hardware(core); fail_power_on_hardware: __power_off_iris2_controller(core); fail_power_on_controller: call_res_op(core, set_bw, core, 0, 0); fail_vote_buses: - core->power_enabled = false; + msm_vidc_change_core_sub_state(core, CORE_SUBSTATE_POWER_ENABLE, 0, __func__); return rc; } diff --git a/driver/variant/iris3/src/msm_vidc_iris3.c b/driver/variant/iris3/src/msm_vidc_iris3.c index 6dd48d6fab..0890c9f300 100644 --- a/driver/variant/iris3/src/msm_vidc_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_iris3.c @@ -277,24 +277,26 @@ static int __power_off_iris3_hardware(struct msm_vidc_core *core) * Incase hw power control is enabled, for both CPU WD, video * hw unresponsive cases, check for power status to decide on * executing NOC reset sequence before disabling power. If there - * is no CPU WD and hw_power_control is enabled, fw is expected + * is no CPU WD and hw power control is enabled, fw is expected * to power collapse video hw always. */ - if (core->hw_power_control) { + if (is_core_sub_state(core, CORE_SUBSTATE_FW_PWR_CTRL)) { pwr_collapsed = is_iris3_hw_power_collapsed(core); - if (core->cpu_watchdog || core->video_unresponsive) { + if (is_core_sub_state(core, CORE_SUBSTATE_CPU_WATCHDOG) || + is_core_sub_state(core, CORE_SUBSTATE_VIDEO_UNRESPONSIVE)) { if (pwr_collapsed) { - d_vpr_e("%s: video hw power collapsed %d, %d\n", - __func__, core->cpu_watchdog, core->video_unresponsive); + d_vpr_e("%s: video hw power collapsed %s\n", + __func__, core->sub_state_name); goto disable_power; } else { - d_vpr_e("%s: video hw is power ON %d, %d\n", - __func__, core->cpu_watchdog, core->video_unresponsive); + d_vpr_e("%s: video hw is power ON %s\n", + __func__, core->sub_state_name); } } else { if (!pwr_collapsed) d_vpr_e("%s: video hw is not power collapsed\n", __func__); + d_vpr_h("%s: disabling hw power\n", __func__); goto disable_power; } } @@ -465,7 +467,7 @@ static int __power_off_iris3(struct msm_vidc_core *core) return -EINVAL; } - if (!core->power_enabled) + if (!is_core_sub_state(core, CORE_SUBSTATE_POWER_ENABLE)) return 0; /** @@ -490,7 +492,7 @@ static int __power_off_iris3(struct msm_vidc_core *core) disable_irq_nosync(core->resource->irq); core->intr_status = 0; - core->power_enabled = false; + msm_vidc_change_core_sub_state(core, CORE_SUBSTATE_POWER_ENABLE, 0, __func__); return rc; } @@ -552,9 +554,15 @@ static int __power_on_iris3(struct msm_vidc_core *core) u32 freq = 0; int rc = 0; - if (core->power_enabled) + if (is_core_sub_state(core, CORE_SUBSTATE_POWER_ENABLE)) return 0; + if (!core_in_valid_state(core)) { + d_vpr_e("%s: invalid core state %s\n", + __func__, core_state_name(core->state)); + return -EINVAL; + } + /* Vote for all hardware resources */ rc = call_res_op(core, set_bw, core, INT_MAX, INT_MAX); if (rc) { @@ -574,7 +582,9 @@ static int __power_on_iris3(struct msm_vidc_core *core) goto fail_power_on_hardware; } /* video controller and hardware powered on successfully */ - core->power_enabled = true; + rc = msm_vidc_change_core_sub_state(core, 0, CORE_SUBSTATE_POWER_ENABLE, __func__); + if (rc) + goto fail_power_on_substate; freq_tbl = core->resource->freq_set.freq_tbl; freq = core->power.clk_freq ? core->power.clk_freq : @@ -597,12 +607,14 @@ static int __power_on_iris3(struct msm_vidc_core *core) return rc; +fail_power_on_substate: + __power_off_iris3_hardware(core); fail_power_on_hardware: __power_off_iris3_controller(core); fail_power_on_controller: call_res_op(core, set_bw, core, 0, 0); fail_vote_buses: - core->power_enabled = false; + msm_vidc_change_core_sub_state(core, CORE_SUBSTATE_POWER_ENABLE, 0, __func__); return rc; } diff --git a/driver/variant/iris33/src/msm_vidc_iris33.c b/driver/variant/iris33/src/msm_vidc_iris33.c index c4182861b4..dd863cfd7d 100644 --- a/driver/variant/iris33/src/msm_vidc_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_iris33.c @@ -280,24 +280,26 @@ static int __power_off_iris33_hardware(struct msm_vidc_core *core) * Incase hw power control is enabled, for both CPU WD, video * hw unresponsive cases, check for power status to decide on * executing NOC reset sequence before disabling power. If there - * is no CPU WD and hw_power_control is enabled, fw is expected + * is no CPU WD and hw power control is enabled, fw is expected * to power collapse video hw always. */ - if (core->hw_power_control) { + if (is_core_sub_state(core, CORE_SUBSTATE_FW_PWR_CTRL)) { pwr_collapsed = is_iris33_hw_power_collapsed(core); - if (core->cpu_watchdog || core->video_unresponsive) { + if (is_core_sub_state(core, CORE_SUBSTATE_CPU_WATCHDOG) || + is_core_sub_state(core, CORE_SUBSTATE_VIDEO_UNRESPONSIVE)) { if (pwr_collapsed) { - d_vpr_e("%s: video hw power collapsed %d, %d\n", - __func__, core->cpu_watchdog, core->video_unresponsive); + d_vpr_e("%s: video hw power collapsed %s\n", + __func__, core->sub_state_name); goto disable_power; } else { - d_vpr_e("%s: video hw is power ON %d, %d\n", - __func__, core->cpu_watchdog, core->video_unresponsive); + d_vpr_e("%s: video hw is power ON %s\n", + __func__, core->sub_state_name); } } else { if (!pwr_collapsed) d_vpr_e("%s: video hw is not power collapsed\n", __func__); + d_vpr_h("%s: disabling hw power\n", __func__); goto disable_power; } } @@ -530,7 +532,7 @@ static int __power_off_iris33(struct msm_vidc_core *core) return -EINVAL; } - if (!core->power_enabled) + if (!is_core_sub_state(core, CORE_SUBSTATE_POWER_ENABLE)) return 0; /** @@ -555,7 +557,7 @@ static int __power_off_iris33(struct msm_vidc_core *core) disable_irq_nosync(core->resource->irq); core->intr_status = 0; - core->power_enabled = false; + msm_vidc_change_core_sub_state(core, CORE_SUBSTATE_POWER_ENABLE, 0, __func__); return rc; } @@ -633,9 +635,15 @@ static int __power_on_iris33(struct msm_vidc_core *core) u32 freq = 0; int rc = 0; - if (core->power_enabled) + if (is_core_sub_state(core, CORE_SUBSTATE_POWER_ENABLE)) return 0; + if (!core_in_valid_state(core)) { + d_vpr_e("%s: invalid core state %s\n", + __func__, core_state_name(core->state)); + return -EINVAL; + } + /* Vote for all hardware resources */ rc = call_res_op(core, set_bw, core, INT_MAX, INT_MAX); if (rc) { @@ -655,7 +663,9 @@ static int __power_on_iris33(struct msm_vidc_core *core) goto fail_power_on_hardware; } /* video controller and hardware powered on successfully */ - core->power_enabled = true; + rc = msm_vidc_change_core_sub_state(core, 0, CORE_SUBSTATE_POWER_ENABLE, __func__); + if (rc) + goto fail_power_on_substate; freq_tbl = core->resource->freq_set.freq_tbl; freq = core->power.clk_freq ? core->power.clk_freq : @@ -678,12 +688,14 @@ static int __power_on_iris33(struct msm_vidc_core *core) return rc; +fail_power_on_substate: + __power_off_iris33_hardware(core); fail_power_on_hardware: __power_off_iris33_controller(core); fail_power_on_controller: call_res_op(core, set_bw, core, 0, 0); fail_vote_buses: - core->power_enabled = false; + msm_vidc_change_core_sub_state(core, CORE_SUBSTATE_POWER_ENABLE, 0, __func__); return rc; } diff --git a/driver/vidc/inc/msm_vidc_core.h b/driver/vidc/inc/msm_vidc_core.h index 5c0e682aff..e4c3e826ac 100644 --- a/driver/vidc/inc/msm_vidc_core.h +++ b/driver/vidc/inc/msm_vidc_core.h @@ -65,6 +65,18 @@ struct msm_vidc_core_power { enum msm_vidc_core_state FOREACH_CORE_STATE(GENERATE_MSM_VIDC_ENUM); +enum msm_vidc_core_sub_state { + CORE_SUBSTATE_NONE = 0x0, + CORE_SUBSTATE_POWER_ENABLE = BIT(0), + CORE_SUBSTATE_GDSC_HANDOFF = BIT(1), + CORE_SUBSTATE_PM_SUSPEND = BIT(2), + CORE_SUBSTATE_FW_PWR_CTRL = BIT(3), + CORE_SUBSTATE_PAGE_FAULT = BIT(4), + CORE_SUBSTATE_CPU_WATCHDOG = BIT(5), + CORE_SUBSTATE_VIDEO_UNRESPONSIVE = BIT(6), + CORE_SUBSTATE_MAX = BIT(7), +}; + struct msm_vidc_core { struct platform_device *pdev; struct msm_video_device vdev[2]; @@ -76,13 +88,14 @@ struct msm_vidc_core { struct dentry *debugfs_root; char fw_version[MAX_NAME_LENGTH]; enum msm_vidc_core_state state; + enum msm_vidc_core_sub_state sub_state; + char sub_state_name[MAX_NAME_LENGTH]; struct mutex lock; struct msm_vidc_resource *resource; struct msm_vidc_platform *platform; u32 intr_status; u32 spur_count; u32 reg_count; - bool power_enabled; u32 codecs_count; struct msm_vidc_core_capability *capabilities; struct msm_vidc_inst_capability *inst_caps; @@ -96,7 +109,6 @@ struct msm_vidc_core { struct work_struct ssr_work; struct msm_vidc_core_power power; struct msm_vidc_ssr ssr; - bool smmu_fault_handled; u32 skip_pc_count; u32 last_packet_type; u8 *packet; @@ -117,11 +129,11 @@ struct msm_vidc_core { u32 header_id; u32 packet_id; u32 sys_init_id; - bool handoff_done; - bool hw_power_control; - bool pm_suspended; - bool cpu_watchdog; - bool video_unresponsive; }; +static inline bool core_in_valid_state(struct msm_vidc_core *core) +{ + return core->state != MSM_VIDC_CORE_DEINIT; +} + #endif // _MSM_VIDC_CORE_H_ diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 0b93025bde..83c2bcdc1b 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -370,6 +370,17 @@ static inline bool is_sub_state(struct msm_vidc_inst *inst, return (inst->sub_state & sub_state); } +static inline bool is_core_state(struct msm_vidc_core *core, enum msm_vidc_core_state state) +{ + return core->state == state; +} + +static inline bool is_core_sub_state(struct msm_vidc_core *core, + enum msm_vidc_core_sub_state sub_state) +{ + return !!(core->sub_state & sub_state); +} + const char *cap_name(enum msm_vidc_inst_capability_type cap_id); const char *v4l2_pixelfmt_name(struct msm_vidc_inst *inst, u32 pixelfmt); const char *v4l2_type_name(u32 port); @@ -434,6 +445,9 @@ int msm_vidc_kill_session(struct msm_vidc_inst* inst); int msm_vidc_get_inst_capability(struct msm_vidc_inst *inst); int msm_vidc_change_core_state(struct msm_vidc_core *core, enum msm_vidc_core_state request_state, const char *func); +int msm_vidc_change_core_sub_state(struct msm_vidc_core *core, + enum msm_vidc_core_sub_state clear_sub_states, + enum msm_vidc_core_sub_state set_sub_states, const char *func); int msm_vidc_core_init(struct msm_vidc_core *core); int msm_vidc_core_init_wait(struct msm_vidc_core *core); int msm_vidc_core_deinit(struct msm_vidc_core *core, bool force); @@ -451,7 +465,7 @@ int msm_vidc_trigger_stability(struct msm_vidc_core *core, void msm_vidc_stability_handler(struct work_struct *work); int cancel_stability_work_sync(struct msm_vidc_inst *inst); void msm_vidc_fw_unload_handler(struct work_struct *work); -int msm_vidc_suspend(struct msm_vidc_core *core); +int msm_vidc_suspend_locked(struct msm_vidc_core *core); void msm_vidc_batch_handler(struct work_struct *work); int msm_vidc_event_queue_init(struct msm_vidc_inst *inst); int msm_vidc_event_queue_deinit(struct msm_vidc_inst *inst); @@ -516,6 +530,7 @@ enum msm_vidc_allow msm_vidc_allow_qbuf(struct msm_vidc_inst *inst, u32 type); enum msm_vidc_allow msm_vidc_allow_input_psc(struct msm_vidc_inst *inst); bool msm_vidc_allow_drain_last_flag(struct msm_vidc_inst *inst); bool msm_vidc_allow_psc_last_flag(struct msm_vidc_inst *inst); +bool msm_vidc_allow_pm_suspend(struct msm_vidc_core *core); int msm_vidc_state_change_streamon(struct msm_vidc_inst *inst, u32 type); int msm_vidc_state_change_streamoff(struct msm_vidc_inst *inst, u32 type); int msm_vidc_state_change_input_psc(struct msm_vidc_inst *inst); diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 5fe78f407b..2c8182161d 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -949,7 +949,6 @@ struct msm_vidc_input_timer { enum msm_vidc_allow FOREACH_ALLOW(GENERATE_ENUM); struct msm_vidc_ssr { - bool trigger; enum msm_vidc_ssr_trigger_type ssr_type; u32 sub_client_id; u32 test_addr; diff --git a/driver/vidc/inc/venus_hfi.h b/driver/vidc/inc/venus_hfi.h index 650e8eb305..48f759dabc 100644 --- a/driver/vidc/inc/venus_hfi.h +++ b/driver/vidc/inc/venus_hfi.h @@ -73,6 +73,5 @@ irqreturn_t venus_hfi_isr(int irq, void *data); irqreturn_t venus_hfi_isr_handler(int irq, void *data); int __prepare_pc(struct msm_vidc_core *core); -bool __core_in_valid_state(struct msm_vidc_core *core); #endif // _VENUS_HFI_H_ diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 01761be851..b6beae1710 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -146,6 +146,23 @@ exit: return name; } +const char *core_sub_state_name(enum msm_vidc_core_sub_state sub_state) +{ + switch (sub_state) { + case CORE_SUBSTATE_NONE: return "NONE "; + case CORE_SUBSTATE_GDSC_HANDOFF: return "GDSC_HANDOFF "; + case CORE_SUBSTATE_PM_SUSPEND: return "PM_SUSPEND "; + case CORE_SUBSTATE_FW_PWR_CTRL: return "FW_PWR_CTRL "; + case CORE_SUBSTATE_POWER_ENABLE: return "POWER_ENABLE "; + case CORE_SUBSTATE_PAGE_FAULT: return "PAGE_FAULT "; + case CORE_SUBSTATE_CPU_WATCHDOG: return "CPU_WATCHDOG "; + case CORE_SUBSTATE_VIDEO_UNRESPONSIVE: return "VIDEO_UNRESPONSIVE "; + case CORE_SUBSTATE_MAX: return "MAX "; + } + + return "UNKNOWN "; +} + const char *v4l2_type_name(u32 port) { switch (port) { @@ -304,7 +321,7 @@ static u32 msm_vidc_get_buffer_stats_flag(struct msm_vidc_inst *inst) return flags; } -static int msm_vidc_suspend_locked(struct msm_vidc_core *core) +int msm_vidc_suspend_locked(struct msm_vidc_core *core) { int rc = 0; @@ -1027,6 +1044,53 @@ int msm_vidc_change_core_state(struct msm_vidc_core *core, return 0; } +int msm_vidc_change_core_sub_state(struct msm_vidc_core *core, + enum msm_vidc_core_sub_state clear_sub_state, + enum msm_vidc_core_sub_state set_sub_state, const char *func) +{ + int i = 0; + enum msm_vidc_core_sub_state prev_sub_state; + + if (!core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + /* final value will not change */ + if (clear_sub_state == set_sub_state) + return 0; + + /* sanitize clear & set value */ + if (set_sub_state > CORE_SUBSTATE_MAX || + clear_sub_state > CORE_SUBSTATE_MAX) { + d_vpr_e("%s: invalid sub states. clear %#x or set %#x\n", + func, clear_sub_state, set_sub_state); + return -EINVAL; + } + + prev_sub_state = core->sub_state; + core->sub_state |= set_sub_state; + core->sub_state &= ~clear_sub_state; + + /* print substates only when there is a change */ + if (core->sub_state != prev_sub_state) { + strscpy(core->sub_state_name, "\0", sizeof(core->sub_state_name)); + for (i = 0; BIT(i) < CORE_SUBSTATE_MAX; i++) { + if (core->sub_state == CORE_SUBSTATE_NONE) { + strscpy(core->sub_state_name, "CORE_SUBSTATE_NONE", + sizeof(core->sub_state_name)); + break; + } + if (core->sub_state & BIT(i)) + strlcat(core->sub_state_name, core_sub_state_name(BIT(i)), + sizeof(core->sub_state_name)); + } + d_vpr_h("%s: core sub state changed to %s\n", func, core->sub_state_name); + } + + return 0; +} + int msm_vidc_change_state(struct msm_vidc_inst *inst, enum msm_vidc_state request_state, const char *func) { @@ -1561,6 +1625,29 @@ bool msm_vidc_allow_psc_last_flag(struct msm_vidc_inst *inst) return false; } +bool msm_vidc_allow_pm_suspend(struct msm_vidc_core *core) +{ + if (!core) { + d_vpr_e("%s: invalid param\n", __func__); + return false; + } + + /* core must be in valid state to do pm_suspend */ + if (!core_in_valid_state(core)) { + d_vpr_e("%s: invalid core state %s\n", + __func__, core_state_name(core->state)); + return false; + } + + /* check if power is enabled */ + if (!is_core_sub_state(core, CORE_SUBSTATE_POWER_ENABLE)) { + d_vpr_e("%s: Power already disabled\n", __func__); + return false; + } + + return true; +} + bool is_hevc_10bit_decode_session(struct msm_vidc_inst *inst) { bool is10bit = false; @@ -4640,7 +4727,7 @@ int msm_vidc_core_deinit_locked(struct msm_vidc_core *core, bool force) return rc; } - if (core->state == MSM_VIDC_CORE_DEINIT) + if (is_core_state(core, MSM_VIDC_CORE_DEINIT)) return 0; if (force) { @@ -4693,10 +4780,10 @@ int msm_vidc_core_init_wait(struct msm_vidc_core *core) } core_lock(core, __func__); - if (core->state == MSM_VIDC_CORE_INIT) { + if (is_core_state(core, MSM_VIDC_CORE_INIT)) { rc = 0; goto unlock; - } else if (core->state == MSM_VIDC_CORE_DEINIT) { + } else if (is_core_state(core, MSM_VIDC_CORE_DEINIT)) { rc = -EINVAL; goto unlock; } @@ -4715,14 +4802,16 @@ int msm_vidc_core_init_wait(struct msm_vidc_core *core) d_vpr_h("%s: state %s, interval %u, count %u, max_tries %u\n", __func__, core_state_name(core->state), interval, count, max_tries); - if (core->state == MSM_VIDC_CORE_INIT) { + if (is_core_state(core, MSM_VIDC_CORE_INIT)) { d_vpr_h("%s: sys init successful\n", __func__); rc = 0; goto unlock; } else { d_vpr_h("%s: sys init wait timedout. state %s\n", __func__, core_state_name(core->state)); - core->video_unresponsive = true; + /* mark video hw unresponsive */ + msm_vidc_change_core_sub_state(core, + 0, CORE_SUBSTATE_VIDEO_UNRESPONSIVE, __func__); rc = -EINVAL; goto unlock; } @@ -4743,14 +4832,14 @@ int msm_vidc_core_init(struct msm_vidc_core *core) } core_lock(core, __func__); - if (core->state == MSM_VIDC_CORE_INIT || - core->state == MSM_VIDC_CORE_INIT_WAIT) + if (is_core_state(core, MSM_VIDC_CORE_INIT) || + is_core_state(core, MSM_VIDC_CORE_INIT_WAIT)) goto unlock; msm_vidc_change_core_state(core, MSM_VIDC_CORE_INIT_WAIT, __func__); - core->smmu_fault_handled = false; - core->ssr.trigger = false; - core->pm_suspended = false; + /* clear PM suspend from core sub_state */ + msm_vidc_change_core_sub_state(core, CORE_SUBSTATE_PM_SUSPEND, 0, __func__); + msm_vidc_change_core_sub_state(core, CORE_SUBSTATE_PAGE_FAULT, 0, __func__); rc = venus_hfi_core_init(core); if (rc) { @@ -4798,7 +4887,8 @@ int msm_vidc_inst_timeout(struct msm_vidc_inst *inst) goto unlock; } /* mark video hw unresponsive */ - core->video_unresponsive = true; + msm_vidc_change_core_sub_state(core, + 0, CORE_SUBSTATE_VIDEO_UNRESPONSIVE, __func__); /* call core deinit for a valid instance timeout case */ msm_vidc_core_deinit_locked(core, true); @@ -4938,7 +5028,7 @@ int msm_vidc_smmu_fault_handler(struct iommu_domain *domain, return -EINVAL; } - if (core->smmu_fault_handled) { + if (is_core_sub_state(core, CORE_SUBSTATE_PAGE_FAULT)) { if (core->capabilities[NON_FATAL_FAULTS].value) { dprintk_ratelimit(VIDC_ERR, "err ", "%s: non-fatal pagefault address: %lx\n", @@ -4949,7 +5039,8 @@ int msm_vidc_smmu_fault_handler(struct iommu_domain *domain, d_vpr_e(FMT_STRING_FAULT_HANDLER, __func__, iova); - core->smmu_fault_handled = true; + /* mark smmu fault as handled */ + msm_vidc_change_core_sub_state(core, 0, CORE_SUBSTATE_PAGE_FAULT, __func__); /* print noc error log registers */ venus_hfi_noc_error_info(core); @@ -5005,20 +5096,17 @@ void msm_vidc_ssr_handler(struct work_struct *work) ssr = &core->ssr; core_lock(core, __func__); - if (core->state == MSM_VIDC_CORE_INIT) { + if (is_core_state(core, MSM_VIDC_CORE_INIT)) { /* * In current implementation, user-initiated SSR triggers * a fatal error from hardware. However, there is no way * to know if fatal error is due to SSR or not. Handle * user SSR as non-fatal. */ - core->ssr.trigger = true; rc = venus_hfi_trigger_ssr(core, ssr->ssr_type, ssr->sub_client_id, ssr->test_addr); - if (rc) { + if (rc) d_vpr_e("%s: trigger_ssr failed\n", __func__); - core->ssr.trigger = false; - } } else { d_vpr_e("%s: video core not initialized\n", __func__); } @@ -5114,26 +5202,6 @@ void msm_vidc_fw_unload_handler(struct work_struct *work) } -int msm_vidc_suspend(struct msm_vidc_core *core) -{ - int rc = 0; - - if (!core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - core_lock(core, __func__); - d_vpr_h("%s: initiate PM suspend\n", __func__); - rc = msm_vidc_suspend_locked(core); - if (rc) - goto exit; - -exit: - core_unlock(core, __func__); - return rc; -} - void msm_vidc_batch_handler(struct work_struct *work) { struct msm_vidc_inst *inst; @@ -5155,7 +5223,7 @@ void msm_vidc_batch_handler(struct work_struct *work) goto exit; } - if (core->pm_suspended) { + if (is_core_sub_state(core, CORE_SUBSTATE_PM_SUSPEND)) { i_vpr_h(inst, "%s: device in pm suspend state\n", __func__); goto exit; } diff --git a/driver/vidc/src/msm_vidc_probe.c b/driver/vidc/src/msm_vidc_probe.c index 01cfa57626..fd9f4765e5 100644 --- a/driver/vidc/src/msm_vidc_probe.c +++ b/driver/vidc/src/msm_vidc_probe.c @@ -806,6 +806,7 @@ static int msm_vidc_pm_suspend(struct device *dev) { int rc = 0; struct msm_vidc_core *core; + bool allow = false; /* * Bail out if @@ -822,15 +823,25 @@ static int msm_vidc_pm_suspend(struct device *dev) return -EINVAL; } + core_lock(core, __func__); + allow = msm_vidc_allow_pm_suspend(core); + if (!allow) { + d_vpr_e("%s: pm suspend not allowed\n", __func__); + rc = 0; + goto unlock; + } + d_vpr_h("%s\n", __func__); - rc = msm_vidc_suspend(core); + rc = msm_vidc_suspend_locked(core); if (rc == -ENOTSUPP) rc = 0; else if (rc) d_vpr_e("Failed to suspend: %d\n", rc); else - core->pm_suspended = true; + msm_vidc_change_core_sub_state(core, 0, CORE_SUBSTATE_PM_SUSPEND, __func__); +unlock: + core_unlock(core, __func__); return rc; } @@ -854,7 +865,12 @@ static int msm_vidc_pm_resume(struct device *dev) } d_vpr_h("%s\n", __func__); - core->pm_suspended = false; + + /* remove PM suspend from core sub_state */ + core_lock(core, __func__); + msm_vidc_change_core_sub_state(core, CORE_SUBSTATE_PM_SUSPEND, 0, __func__); + core_unlock(core, __func__); + return 0; } diff --git a/driver/vidc/src/resources.c b/driver/vidc/src/resources.c index 8a2772a562..97de92349b 100644 --- a/driver/vidc/src/resources.c +++ b/driver/vidc/src/resources.c @@ -16,6 +16,7 @@ #include "msm_vidc_core.h" #include "msm_vidc_debug.h" #include "msm_vidc_power.h" +#include "msm_vidc_driver.h" #include "msm_vidc_platform.h" #include "venus_hfi.h" @@ -666,7 +667,9 @@ static int __acquire_regulator(struct msm_vidc_core *core, if (regulator_get_mode(rinfo->regulator) == REGULATOR_MODE_NORMAL) { - core->handoff_done = false; + /* clear handoff from core sub_state */ + msm_vidc_change_core_sub_state(core, + CORE_SUBSTATE_GDSC_HANDOFF, 0, __func__); d_vpr_h("Skip acquire regulator %s\n", rinfo->name); goto exit; } @@ -683,7 +686,9 @@ static int __acquire_regulator(struct msm_vidc_core *core, rinfo->name); goto exit; } else { - core->handoff_done = false; + /* reset handoff from core sub_state */ + msm_vidc_change_core_sub_state(core, + CORE_SUBSTATE_GDSC_HANDOFF, 0, __func__); d_vpr_h("Acquired regulator control from HW: %s\n", rinfo->name); @@ -729,7 +734,9 @@ static int __hand_off_regulator(struct msm_vidc_core *core, rinfo->name); return rc; } else { - core->handoff_done = true; + /* set handoff done in core sub_state */ + msm_vidc_change_core_sub_state(core, + 0, CORE_SUBSTATE_GDSC_HANDOFF, __func__); d_vpr_h("Hand off regulator control to HW: %s\n", rinfo->name); } @@ -798,7 +805,8 @@ static int __disable_regulator(struct msm_vidc_core *core, const char *reg_name) WARN_ON(true); return rc; } - core->handoff_done = false; + /* reset handoff done from core sub_state */ + msm_vidc_change_core_sub_state(core, CORE_SUBSTATE_GDSC_HANDOFF, 0, __func__); rc = regulator_disable(rinfo->regulator); if (rc) { diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index 60e55ebee4..98e99b63a9 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -59,11 +59,6 @@ static int __strict_check(struct msm_vidc_core *core, const char *function) return fatal ? -EINVAL : 0; } -bool __core_in_valid_state(struct msm_vidc_core *core) -{ - return core->state != MSM_VIDC_CORE_DEINIT; -} - static bool __valdiate_session(struct msm_vidc_core *core, struct msm_vidc_inst *inst, const char *func) { @@ -253,12 +248,18 @@ static int __sys_set_power_control(struct msm_vidc_core *core, bool enable) { int rc = 0; - if (!core->handoff_done) { + if (!is_core_sub_state(core, CORE_SUBSTATE_GDSC_HANDOFF)) { d_vpr_e("%s: skipping as power control hanfoff was not done\n", __func__); return rc; } + if (!core_in_valid_state(core)) { + d_vpr_e("%s: invalid core state %s\n", + __func__, core_state_name(core->state)); + return rc; + } + rc = hfi_packet_sys_intraframe_powercollapse(core, core->packet, core->packet_size, enable); if (rc) @@ -268,7 +269,10 @@ static int __sys_set_power_control(struct msm_vidc_core *core, bool enable) if (rc) return rc; - core->hw_power_control = true; + rc = msm_vidc_change_core_sub_state(core, 0, CORE_SUBSTATE_FW_PWR_CTRL, __func__); + if (rc) + return rc; + d_vpr_h("%s: set hardware power control successful\n", __func__); return rc; @@ -300,12 +304,12 @@ static int __power_collapse(struct msm_vidc_core *core, bool force) d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - if (!core->power_enabled) { + if (!is_core_sub_state(core, CORE_SUBSTATE_POWER_ENABLE)) { d_vpr_h("%s: Power already disabled\n", __func__); goto exit; } - if (!__core_in_valid_state(core)) { + if (!core_in_valid_state(core)) { d_vpr_e("%s: Core not in init state\n", __func__); return -EINVAL; } @@ -534,7 +538,7 @@ static int __venus_power_off(struct msm_vidc_core* core) { int rc = 0; - if (!core->power_enabled) + if (!is_core_sub_state(core, CORE_SUBSTATE_POWER_ENABLE)) return 0; rc = call_venus_op(core, power_off, core); @@ -542,7 +546,7 @@ static int __venus_power_off(struct msm_vidc_core* core) d_vpr_e("Failed to power off, err: %d\n", rc); return rc; } - core->power_enabled = false; + msm_vidc_change_core_sub_state(core, CORE_SUBSTATE_POWER_ENABLE, 0, __func__); return rc; } @@ -551,7 +555,7 @@ static int __venus_power_on(struct msm_vidc_core *core) { int rc = 0; - if (core->power_enabled) + if (is_core_sub_state(core, CORE_SUBSTATE_POWER_ENABLE)) return 0; rc = call_venus_op(core, power_on, core); @@ -559,7 +563,10 @@ static int __venus_power_on(struct msm_vidc_core *core) d_vpr_e("Failed to power on, err: %d\n", rc); return rc; } - core->power_enabled = true; + + rc = msm_vidc_change_core_sub_state(core, 0, CORE_SUBSTATE_POWER_ENABLE, __func__); + if (rc) + return rc; return rc; } @@ -571,7 +578,7 @@ static int __suspend(struct msm_vidc_core *core) if (!core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; - } else if (!core->power_enabled) { + } else if (!is_core_sub_state(core, CORE_SUBSTATE_POWER_ENABLE)) { d_vpr_h("Power already disabled\n"); return 0; } @@ -605,9 +612,9 @@ static int __resume(struct msm_vidc_core *core) if (!core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; - } else if (core->power_enabled) { + } else if (is_core_sub_state(core, CORE_SUBSTATE_POWER_ENABLE)) { goto exit; - } else if (!__core_in_valid_state(core)) { + } else if (!core_in_valid_state(core)) { d_vpr_e("%s: core not in valid state\n", __func__); return -EINVAL; } @@ -617,8 +624,14 @@ static int __resume(struct msm_vidc_core *core) return rc; d_vpr_h("Resuming from power collapse\n"); - core->handoff_done = false; - core->hw_power_control = false; + /* reset handoff done from core sub_state */ + rc = msm_vidc_change_core_sub_state(core, CORE_SUBSTATE_GDSC_HANDOFF, 0, __func__); + if (rc) + return rc; + /* reset hw pwr ctrl from core sub_state */ + rc = msm_vidc_change_core_sub_state(core, CORE_SUBSTATE_FW_PWR_CTRL, 0, __func__); + if (rc) + return rc; rc = __venus_power_on(core); if (rc) { @@ -684,10 +697,8 @@ int __load_fw(struct msm_vidc_core *core) int rc = 0; d_vpr_h("%s\n", __func__); - core->handoff_done = false; - core->hw_power_control = false; - core->cpu_watchdog = false; - core->video_unresponsive = false; + /* clear all substates */ + msm_vidc_change_core_sub_state(core, CORE_SUBSTATE_MAX - 1, 0, __func__); trace_msm_v4l2_vidc_fw_load("START"); rc = __venus_power_on(core); @@ -726,8 +737,8 @@ void __unload_fw(struct msm_vidc_core *core) fw_unload(core); __venus_power_off(core); - core->cpu_watchdog = false; - core->video_unresponsive = false; + /* clear all substates */ + msm_vidc_change_core_sub_state(core, CORE_SUBSTATE_MAX - 1, 0, __func__); d_vpr_h("%s done\n", __func__); } @@ -738,7 +749,10 @@ static int __response_handler(struct msm_vidc_core *core) if (call_venus_op(core, watchdog, core, core->intr_status)) { struct hfi_packet pkt = {.type = HFI_SYS_ERROR_WD_TIMEOUT}; - core->cpu_watchdog = true; + + /* mark cpu watchdog error */ + msm_vidc_change_core_sub_state(core, + 0, CORE_SUBSTATE_CPU_WATCHDOG, __func__); d_vpr_e("%s: CPU WD error received\n", __func__); return handle_system_error(core, &pkt); @@ -817,15 +831,18 @@ void venus_hfi_pm_work_handler(struct work_struct *work) d_vpr_e("Failed to PC for %d times\n", core->skip_pc_count); core->skip_pc_count = 0; - core->video_unresponsive = true; + /* mark video hw unresponsive */ + msm_vidc_change_core_sub_state(core, + 0, CORE_SUBSTATE_VIDEO_UNRESPONSIVE, __func__); msm_vidc_core_deinit(core, true); return; } core_lock(core, __func__); /* core already deinited - skip power collapse */ - if (core->state == MSM_VIDC_CORE_DEINIT) { - d_vpr_e("%s: core is already de-inited\n", __func__); + if (is_core_state(core, MSM_VIDC_CORE_DEINIT)) { + d_vpr_e("%s: invalid core state %s\n", + __func__, core_state_name(core->state)); goto unlock; } @@ -962,7 +979,7 @@ int venus_hfi_core_deinit(struct msm_vidc_core *core, bool force) if (rc) return rc; - if (core->state == MSM_VIDC_CORE_DEINIT) + if (is_core_state(core, MSM_VIDC_CORE_DEINIT)) return 0; __resume(core); __flush_debug_queue(core, (!force ? core->packet : NULL), core->packet_size); @@ -993,7 +1010,7 @@ int venus_hfi_noc_error_info(struct msm_vidc_core *core) return 0; core_lock(core, __func__); - if (core->state == MSM_VIDC_CORE_DEINIT) + if (is_core_state(core, MSM_VIDC_CORE_DEINIT)) goto unlock; /* resume venus before accessing noc registers */ diff --git a/driver/vidc/src/venus_hfi_queue.c b/driver/vidc/src/venus_hfi_queue.c index 4fea4fa357..6fe2aaf82f 100644 --- a/driver/vidc/src/venus_hfi_queue.c +++ b/driver/vidc/src/venus_hfi_queue.c @@ -22,11 +22,6 @@ static int __strict_check(struct msm_vidc_core *core, const char *function) return fatal ? -EINVAL : 0; } -static bool __core_in_valid_state(struct msm_vidc_core *core) -{ - return core->state != MSM_VIDC_CORE_DEINIT; -} - static void __set_queue_hdr_defaults(struct hfi_queue_header *q_hdr) { q_hdr->qhdr_status = 0x1; @@ -290,7 +285,7 @@ static int __iface_cmdq_write_relaxed(struct msm_vidc_core *core, if (rc) return rc; - if (!__core_in_valid_state(core)) { + if (!core_in_valid_state(core)) { d_vpr_e("%s: fw not in init state\n", __func__); rc = -EINVAL; goto err_q_null; @@ -355,7 +350,7 @@ int venus_hfi_queue_msg_read(struct msm_vidc_core *core, void *pkt) return -EINVAL; } - if (!__core_in_valid_state(core)) { + if (!core_in_valid_state(core)) { d_vpr_e("%s: fw not in init state\n", __func__); rc = -EINVAL; goto read_error_null; diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index aa1fb065e8..c7f3ab82fc 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -495,7 +495,7 @@ static int handle_system_init(struct msm_vidc_core *core, { if (pkt->flags & HFI_FW_FLAGS_SUCCESS) { core_lock(core, __func__); - if (core->state == MSM_VIDC_CORE_INIT_WAIT && + if (is_core_state(core, MSM_VIDC_CORE_INIT_WAIT) && pkt->packet_id == core->sys_init_id) { msm_vidc_change_core_state(core, MSM_VIDC_CORE_INIT, __func__); d_vpr_h("%s: successful\n", __func__); From bce7898377f97e63773b50e10609e10708ac73f3 Mon Sep 17 00:00:00 2001 From: Deepa Guthyappa Madivalara Date: Wed, 23 Nov 2022 11:01:26 -0800 Subject: [PATCH 0771/1061] video: driver: disable power collapse for video on pineapple Disable video power collapse on pineapple chipset until power collapse sequence is successful. Change-Id: I2e7d0085e6d810fb79c2b1070c4bd498f443cfc8 Signed-off-by: Deepa Guthyappa Madivalara --- driver/platform/pineapple/src/msm_vidc_pineapple.c | 2 +- driver/vidc/src/venus_hfi.c | 5 +++++ 2 files changed, 6 insertions(+), 1 deletion(-) diff --git a/driver/platform/pineapple/src/msm_vidc_pineapple.c b/driver/platform/pineapple/src/msm_vidc_pineapple.c index 9a06d01a6f..8773015fe8 100644 --- a/driver/platform/pineapple/src/msm_vidc_pineapple.c +++ b/driver/platform/pineapple/src/msm_vidc_pineapple.c @@ -306,7 +306,7 @@ static struct msm_platform_core_capability core_data_pineapple[] = { {MAX_MBPS_ALL_INTRA, 2088960}, /* 4096x2176/256 MBs@60fps */ {MAX_ENH_LAYER_COUNT, 5}, {NUM_VPP_PIPE, 4}, - {SW_PC, 1}, + {SW_PC, 0}, {FW_UNLOAD, 0}, {HW_RESPONSE_TIMEOUT, HW_RESPONSE_TIMEOUT_VALUE}, /* 1000 ms */ {SW_PC_DELAY, SW_PC_DELAY_VALUE }, /* 1500 ms (>HW_RESPONSE_TIMEOUT)*/ diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index 60e55ebee4..546dde490b 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -1023,6 +1023,11 @@ int venus_hfi_suspend(struct msm_vidc_core *core) if (rc) return rc; + if (!core->capabilities[SW_PC].value) { + d_vpr_h("Skip suspending venus\n"); + return 0; + } + d_vpr_h("Suspending Venus\n"); rc = __power_collapse(core, true); if (!rc) { From 92a44da54b701a2199cf537badc9cbd13cf8478a Mon Sep 17 00:00:00 2001 From: Manikanta Kanamarlapudi Date: Fri, 2 Dec 2022 11:53:21 +0530 Subject: [PATCH 0772/1061] video: update the set function for BASELAYER_PRIORITY update the set function for BASELAYER_PRIORITY control. with out this change, configuration is not set to firmware. Change-Id: I57f01a8e02462ee9e8c221581043a8a70adbfcc5 Signed-off-by: Manikanta Kanamarlapudi --- driver/platform/pineapple/src/msm_vidc_pineapple.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/driver/platform/pineapple/src/msm_vidc_pineapple.c b/driver/platform/pineapple/src/msm_vidc_pineapple.c index 8773015fe8..d3e5376aa8 100644 --- a/driver/platform/pineapple/src/msm_vidc_pineapple.c +++ b/driver/platform/pineapple/src/msm_vidc_pineapple.c @@ -2179,6 +2179,12 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine NULL, msm_vidc_set_u32}, + {BASELAYER_PRIORITY, ENC, H264, + {0}, + {0}, + NULL, + msm_vidc_set_u32}, + {TIME_DELTA_BASED_RC, ENC, CODECS_ALL, {BITRATE_MODE}, {0}, From 832e9aefa843c4f044cead78af0243e69e1dfdd4 Mon Sep 17 00:00:00 2001 From: Deepa Guthyappa Madivalara Date: Tue, 6 Dec 2022 11:41:00 -0800 Subject: [PATCH 0773/1061] video: driver: remove extra mvs0c clock reset Remove addtional mvs0c clock reset which is not required from power off sequence Change-Id: I2077cb0ceee6451cd2d2af067ac8a7be3335dd16 Signed-off-by: Deepa Guthyappa Madivalara --- driver/variant/iris33/src/msm_vidc_iris33.c | 12 ------------ 1 file changed, 12 deletions(-) diff --git a/driver/variant/iris33/src/msm_vidc_iris33.c b/driver/variant/iris33/src/msm_vidc_iris33.c index c4182861b4..9088ae761d 100644 --- a/driver/variant/iris33/src/msm_vidc_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_iris33.c @@ -449,11 +449,6 @@ static int __power_off_iris33_controller(struct msm_vidc_core *core) if (rc) return rc; - /* assert MVP_CTL reset */ - rc = call_res_op(core, reset_control_assert, core, "video_mvs0c_reset"); - if (rc) - d_vpr_e("%s: assert video_mvs0c_reset failed\n", __func__); - /* enable MVP NoC reset */ rc = __write_register_masked(core, AON_WRAPPER_MVP_NOC_CORE_SW_RESET, 0x1, BIT(0)); @@ -472,13 +467,6 @@ static int __power_off_iris33_controller(struct msm_vidc_core *core) if (rc) d_vpr_e("%s: assert video_xo_reset failed\n", __func__); - /* do we need 80us sleep before deassert? */ - usleep_range(400, 500); - /* De-assert MVP_CTL reset */ - rc = call_res_op(core, reset_control_deassert, core, "video_mvs0c_reset"); - if (rc) - d_vpr_e("%s: deassert video_mvs0c_reset failed\n", __func__); - /* De-assert MVP NoC reset */ rc = __write_register_masked(core, AON_WRAPPER_MVP_NOC_CORE_SW_RESET, 0x0, BIT(0)); From 2c39d5b91b42abd4d827c87605e3145d837494ad Mon Sep 17 00:00:00 2001 From: Ankush Mitra Date: Mon, 28 Nov 2022 19:02:30 +0530 Subject: [PATCH 0774/1061] video: driver: prepare dependency list without parent Prepare dependency list only using children. Change-Id: Id79487825fed1f121821126589594b64820c85d3 Signed-off-by: Ankush Mitra --- driver/platform/anorak/src/msm_vidc_anorak.c | 14 +- driver/platform/kalama/src/msm_vidc_kalama.c | 14 +- .../pineapple/src/msm_vidc_pineapple.c | 14 +- driver/platform/waipio/src/msm_vidc_waipio.c | 14 +- driver/vidc/inc/msm_vidc_internal.h | 76 ++++----- driver/vidc/src/msm_vidc_control.c | 148 ++++-------------- 6 files changed, 120 insertions(+), 160 deletions(-) diff --git a/driver/platform/anorak/src/msm_vidc_anorak.c b/driver/platform/anorak/src/msm_vidc_anorak.c index 97e0654c82..5c4d4ae565 100644 --- a/driver/platform/anorak/src/msm_vidc_anorak.c +++ b/driver/platform/anorak/src/msm_vidc_anorak.c @@ -2306,12 +2306,18 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_anor NULL, msm_vidc_set_pipe}, - {THUMBNAIL_MODE, DEC, CODECS_ALL, + {THUMBNAIL_MODE, DEC, H264|HEVC|VP9|AV1, {0}, {OUTPUT_ORDER}, NULL, msm_vidc_set_u32}, + {THUMBNAIL_MODE, DEC, HEIC, + {0}, + {0}, + NULL, + msm_vidc_set_u32}, + {RAP_FRAME, DEC, CODECS_ALL, {0}, {0}, @@ -2360,10 +2366,14 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_anor msm_vidc_adjust_all_intra, NULL}, - {META_EVA_STATS, ENC, CODECS_ALL, + {META_EVA_STATS, ENC, H264|HEVC, {0}, {ENH_LAYER_COUNT, REQUEST_PREPROCESS}}, + {META_EVA_STATS, ENC, HEIC, + {0}, + {0}}, + {META_ROI_INFO, ENC, H264|HEVC, {BITRATE_MODE, PIX_FMTS}, {MIN_QUALITY, IR_PERIOD}, diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index de5cddf259..98427329e3 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -2492,12 +2492,18 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kala NULL, msm_vidc_set_pipe}, - {THUMBNAIL_MODE, DEC, CODECS_ALL, + {THUMBNAIL_MODE, DEC, H264|HEVC|VP9|AV1, {0}, {OUTPUT_ORDER}, NULL, msm_vidc_set_u32}, + {THUMBNAIL_MODE, DEC, HEIC, + {0}, + {0}, + NULL, + msm_vidc_set_u32}, + {RAP_FRAME, DEC, CODECS_ALL, {0}, {0}, @@ -2546,10 +2552,14 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kala msm_vidc_adjust_all_intra, NULL}, - {META_EVA_STATS, ENC, CODECS_ALL, + {META_EVA_STATS, ENC, H264|HEVC, {0}, {ENH_LAYER_COUNT, REQUEST_PREPROCESS}}, + {META_EVA_STATS, ENC, HEIC, + {0}, + {0}}, + {META_ROI_INFO, ENC, H264|HEVC, {BITRATE_MODE, PIX_FMTS}, {MIN_QUALITY, IR_PERIOD}, diff --git a/driver/platform/pineapple/src/msm_vidc_pineapple.c b/driver/platform/pineapple/src/msm_vidc_pineapple.c index d0dc4998f2..7f5367692b 100644 --- a/driver/platform/pineapple/src/msm_vidc_pineapple.c +++ b/driver/platform/pineapple/src/msm_vidc_pineapple.c @@ -2512,12 +2512,18 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine NULL, msm_vidc_set_pipe}, - {THUMBNAIL_MODE, DEC, CODECS_ALL, + {THUMBNAIL_MODE, DEC, H264|HEVC|VP9|AV1, {0}, {OUTPUT_ORDER}, NULL, msm_vidc_set_u32}, + {THUMBNAIL_MODE, DEC, HEIC, + {0}, + {0}, + NULL, + msm_vidc_set_u32}, + {RAP_FRAME, DEC, CODECS_ALL, {0}, {0}, @@ -2566,10 +2572,14 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine msm_vidc_adjust_all_intra, NULL}, - {META_EVA_STATS, ENC, CODECS_ALL, + {META_EVA_STATS, ENC, H264|HEVC, {0}, {ENH_LAYER_COUNT, REQUEST_PREPROCESS}}, + {META_EVA_STATS, ENC, HEIC, + {0}, + {0}}, + {META_ROI_INFO, ENC, H264|HEVC, {BITRATE_MODE, PIX_FMTS}, {MIN_QUALITY, IR_PERIOD}, diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index e2b6fffd3f..1315de97f1 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -2057,12 +2057,18 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_waip NULL, msm_vidc_set_pipe}, - {THUMBNAIL_MODE, DEC, CODECS_ALL, + {THUMBNAIL_MODE, DEC, H264|HEVC|VP9|AV1, {0}, {OUTPUT_ORDER}, NULL, msm_vidc_set_u32}, + {THUMBNAIL_MODE, DEC, HEIC, + {0}, + {0}, + NULL, + msm_vidc_set_u32}, + {RAP_FRAME, DEC, CODECS_ALL, {0}, {0}, @@ -2105,10 +2111,14 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_waip msm_vidc_adjust_all_intra, NULL}, - {META_EVA_STATS, ENC, CODECS_ALL, + {META_EVA_STATS, ENC, H264|HEVC, {0}, {ENH_LAYER_COUNT, REQUEST_PREPROCESS}}, + {META_EVA_STATS, ENC, HEIC, + {0}, + {0}}, + {META_ROI_INFO, ENC, H264|HEVC, {BITRATE_MODE, PIX_FMTS}, {MIN_QUALITY, IR_PERIOD}, diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 2c8182161d..800e91c7bf 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -189,15 +189,15 @@ enum msm_vidc_metadata_bits { * in the back. * * caps_list preparation may become CPU intensive task, so to save CPU cycles, - * organize enum in proper order(root caps at the beginning and dependent caps + * organize enum in proper order(leaf caps at the beginning and dependent parent caps * at back), so that during caps_list preparation num CPU cycles spent will reduce. * * Note: It will work, if enum kept at different places, but not efficient. * * - place all metadata cap(META_*) af the front. - * - place all root(no parent) enums before PROFILE cap. - * - place all intermittent(having both parent and child) enums before MIN_FRAME_QP cap. - * - place all leaf(no child) enums before INST_CAP_MAX cap. + * - place all leaf(no child) enums before PROFILE cap. + * - place all intermittent(having both parent and child) enums before FRAME_WIDTH cap. + * - place all root(no parent) enums before INST_CAP_MAX cap. */ #define FOREACH_CAP(CAP) { \ CAP(INST_CAP_NONE) \ @@ -227,6 +227,40 @@ enum msm_vidc_metadata_bits { CAP(META_SALIENCY_INFO) \ CAP(META_TRANSCODING_STAT_INFO) \ CAP(META_DOLBY_RPU) \ + CAP(MIN_FRAME_QP) \ + CAP(MAX_FRAME_QP) \ + CAP(I_FRAME_QP) \ + CAP(P_FRAME_QP) \ + CAP(B_FRAME_QP) \ + CAP(TIME_DELTA_BASED_RC) \ + CAP(CONSTANT_QUALITY) \ + CAP(VBV_DELAY) \ + CAP(PEAK_BITRATE) \ + CAP(ENTROPY_MODE) \ + CAP(TRANSFORM_8X8) \ + CAP(STAGE) \ + CAP(LTR_COUNT) \ + CAP(IR_PERIOD) \ + CAP(BITRATE_BOOST) \ + CAP(BLUR_RESOLUTION) \ + CAP(OUTPUT_ORDER) \ + CAP(INPUT_BUF_HOST_MAX_COUNT) \ + CAP(OUTPUT_BUF_HOST_MAX_COUNT) \ + CAP(DELIVERY_MODE) \ + CAP(VUI_TIMING_INFO) \ + CAP(SLICE_DECODE) \ + CAP(PROFILE) \ + CAP(ENH_LAYER_COUNT) \ + CAP(BIT_RATE) \ + CAP(LOWLATENCY_MODE) \ + CAP(GOP_SIZE) \ + CAP(B_FRAME) \ + CAP(ALL_INTRA) \ + CAP(MIN_QUALITY) \ + CAP(CONTENT_ADAPTIVE_CODING) \ + CAP(BLUR_TYPES) \ + CAP(REQUEST_PREPROCESS) \ + CAP(SLICE_MODE) \ CAP(FRAME_WIDTH) \ CAP(LOSSLESS_FRAME_WIDTH) \ CAP(SECURE_FRAME_WIDTH) \ @@ -333,40 +367,6 @@ enum msm_vidc_metadata_bits { CAP(LOWLATENCY_MAX_BITRATE) \ CAP(LAST_FLAG_EVENT_ENABLE) \ CAP(NUM_COMV) \ - CAP(PROFILE) \ - CAP(ENH_LAYER_COUNT) \ - CAP(BIT_RATE) \ - CAP(LOWLATENCY_MODE) \ - CAP(GOP_SIZE) \ - CAP(B_FRAME) \ - CAP(ALL_INTRA) \ - CAP(MIN_QUALITY) \ - CAP(CONTENT_ADAPTIVE_CODING) \ - CAP(BLUR_TYPES) \ - CAP(REQUEST_PREPROCESS) \ - CAP(SLICE_MODE) \ - CAP(MIN_FRAME_QP) \ - CAP(MAX_FRAME_QP) \ - CAP(I_FRAME_QP) \ - CAP(P_FRAME_QP) \ - CAP(B_FRAME_QP) \ - CAP(TIME_DELTA_BASED_RC) \ - CAP(CONSTANT_QUALITY) \ - CAP(VBV_DELAY) \ - CAP(PEAK_BITRATE) \ - CAP(ENTROPY_MODE) \ - CAP(TRANSFORM_8X8) \ - CAP(STAGE) \ - CAP(LTR_COUNT) \ - CAP(IR_PERIOD) \ - CAP(BITRATE_BOOST) \ - CAP(BLUR_RESOLUTION) \ - CAP(OUTPUT_ORDER) \ - CAP(INPUT_BUF_HOST_MAX_COUNT) \ - CAP(OUTPUT_BUF_HOST_MAX_COUNT) \ - CAP(DELIVERY_MODE) \ - CAP(VUI_TIMING_INFO) \ - CAP(SLICE_DECODE) \ CAP(INST_CAP_MAX) \ } diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 31049ec769..26a5b9d954 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -137,19 +137,14 @@ static const char * const * msm_vidc_get_qmenu_type( } } -static inline bool has_parents(struct msm_vidc_inst_cap *cap) -{ - return !!cap->parents[0]; -} - -static inline bool has_childrens(struct msm_vidc_inst_cap *cap) +static inline bool has_children(struct msm_vidc_inst_cap *cap) { return !!cap->children[0]; } -static inline bool is_root(struct msm_vidc_inst_cap *cap) +static inline bool is_leaf(struct msm_vidc_inst_cap *cap) { - return !has_parents(cap); + return !has_children(cap); } bool is_valid_cap_id(enum msm_vidc_inst_capability_type cap_id) @@ -162,16 +157,16 @@ static inline bool is_valid_cap(struct msm_vidc_inst_cap *cap) return is_valid_cap_id(cap->cap_id); } -static inline bool is_all_parents_visited( +static inline bool is_all_childrens_visited( struct msm_vidc_inst_cap *cap, bool lookup[INST_CAP_MAX]) { bool found = true; int i; - for (i = 0; i < MAX_CAP_PARENTS; i++) { - if (cap->parents[i] == INST_CAP_NONE) + for (i = 0; i < MAX_CAP_CHILDREN; i++) { + if (cap->children[i] == INST_CAP_NONE) continue; - if (!lookup[cap->parents[i]]) { + if (!lookup[cap->children[i]]) { found = false; break; } @@ -191,65 +186,28 @@ static int add_node_list(struct list_head *list, enum msm_vidc_inst_capability_t INIT_LIST_HEAD(&entry->list); entry->cap_id = cap_id; - list_add_tail(&entry->list, list); + list_add(&entry->list, list); return rc; } static int add_node( - struct list_head *list, struct msm_vidc_inst_cap *rcap, bool lookup[INST_CAP_MAX]) + struct list_head *list, struct msm_vidc_inst_cap *lcap, bool lookup[INST_CAP_MAX]) { int rc = 0; - if (lookup[rcap->cap_id]) + if (lookup[lcap->cap_id]) return 0; - rc = add_node_list(list, rcap->cap_id); + rc = add_node_list(list, lcap->cap_id); if (rc) return rc; - lookup[rcap->cap_id] = true; + lookup[lcap->cap_id] = true; return 0; } -static int swap_node(struct msm_vidc_inst_cap *rcap, - struct list_head *src_list, bool src_lookup[INST_CAP_MAX], - struct list_head *dest_list, bool dest_lookup[INST_CAP_MAX]) -{ - struct msm_vidc_inst_cap_entry *entry, *temp; - bool found = false; - /* cap must be available in src and not present in dest */ - if (!src_lookup[rcap->cap_id] || dest_lookup[rcap->cap_id]) { - d_vpr_e("%s: not found in src or already found in dest for cap %s\n", - __func__, cap_name(rcap->cap_id)); - return -EINVAL; - } - - /* check if entry present in src_list */ - list_for_each_entry_safe(entry, temp, src_list, list) { - if (entry->cap_id == rcap->cap_id) { - found = true; - break; - } - } - - if (!found) { - d_vpr_e("%s: cap %s not found in src list\n", - __func__, cap_name(rcap->cap_id)); - return -EINVAL; - } - - /* remove from src_list */ - list_del_init(&entry->list); - src_lookup[rcap->cap_id] = false; - - /* add it to dest_list */ - list_add_tail(&entry->list, dest_list); - dest_lookup[rcap->cap_id] = true; - - return 0; -} static int msm_vidc_add_capid_to_fw_list(struct msm_vidc_inst *inst, enum msm_vidc_inst_capability_type cap_id) @@ -953,11 +911,11 @@ unlock: int msm_vidc_prepare_dependency_list(struct msm_vidc_inst *inst) { - struct list_head root_list, opt_list; + struct list_head leaf_list, opt_list; struct msm_vidc_inst_capability *capability; - struct msm_vidc_inst_cap *cap, *rcap; + struct msm_vidc_inst_cap *cap, *lcap; struct msm_vidc_inst_cap_entry *entry = NULL, *temp = NULL; - bool root_visited[INST_CAP_MAX]; + bool leaf_visited[INST_CAP_MAX]; bool opt_visited[INST_CAP_MAX]; int tmp_count_total, tmp_count, num_nodes = 0; int i, rc = 0; @@ -974,75 +932,37 @@ int msm_vidc_prepare_dependency_list(struct msm_vidc_inst *inst) } /* init local list and lookup table entries */ - INIT_LIST_HEAD(&root_list); + INIT_LIST_HEAD(&leaf_list); INIT_LIST_HEAD(&opt_list); - memset(&root_visited, 0, sizeof(root_visited)); + memset(&leaf_visited, 0, sizeof(leaf_visited)); memset(&opt_visited, 0, sizeof(opt_visited)); - /* populate root nodes first */ + /* populate leaf nodes first */ for (i = 1; i < INST_CAP_MAX; i++) { - rcap = &capability->cap[i]; - if (!is_valid_cap(rcap)) + lcap = &capability->cap[i]; + if (!is_valid_cap(lcap)) continue; /* sanitize cap value */ - if (i != rcap->cap_id) { + if (i != lcap->cap_id) { i_vpr_e(inst, "%s: cap id mismatch. expected %s, actual %s\n", - __func__, cap_name(i), cap_name(rcap->cap_id)); + __func__, cap_name(i), cap_name(lcap->cap_id)); rc = -EINVAL; goto error; } - /* add all root nodes */ - if (is_root(rcap)) { - rc = add_node(&root_list, rcap, root_visited); + /* add all leaf nodes */ + if (is_leaf(lcap)) { + rc = add_node(&leaf_list, lcap, leaf_visited); if (rc) goto error; } else { - rc = add_node(&opt_list, rcap, opt_visited); + rc = add_node(&opt_list, lcap, opt_visited); if (rc) goto error; } } - /* add all dependent parents */ - list_for_each_entry_safe(entry, temp, &root_list, list) { - rcap = &capability->cap[entry->cap_id]; - /* skip leaf node */ - if (!has_childrens(rcap)) - continue; - - for (i = 0; i < MAX_CAP_CHILDREN; i++) { - if (!rcap->children[i]) - break; - - if (!is_valid_cap_id(rcap->children[i])) - continue; - - cap = &capability->cap[rcap->children[i]]; - if (!is_valid_cap(cap)) - continue; - - /** - * if child node is already part of root list - * then no need to add it again. - */ - if (root_visited[cap->cap_id]) - continue; - - /** - * if child node's all parents are already present in root list - * then add it to root list else remains in optional list. - */ - if (is_all_parents_visited(cap, root_visited)) { - rc = swap_node(cap, - &opt_list, opt_visited, &root_list, root_visited); - if (rc) - goto error; - } - } - } - /* find total optional list entries */ list_for_each_entry(entry, &opt_list, list) num_nodes++; @@ -1060,12 +980,12 @@ int msm_vidc_prepare_dependency_list(struct msm_vidc_inst *inst) cap = &capability->cap[entry->cap_id]; /** - * if all parents are visited then add this entry to - * root list else add it to the end of optional list. + * if all child are visited then add this entry to + * leaf list else add it to the end of optional list. */ - if (is_all_parents_visited(cap, root_visited)) { - list_add_tail(&entry->list, &root_list); - root_visited[entry->cap_id] = true; + if (is_all_childrens_visited(cap, leaf_visited)) { + list_add(&entry->list, &leaf_list); + leaf_visited[entry->cap_id] = true; tmp_count_total--; } else { list_add_tail(&entry->list, &opt_list); @@ -1093,7 +1013,7 @@ int msm_vidc_prepare_dependency_list(struct msm_vidc_inst *inst) } /* move elements to &inst->caps_list from local */ - list_replace_init(&root_list, &inst->caps_list); + list_replace_init(&leaf_list, &inst->caps_list); return 0; error: @@ -1102,8 +1022,8 @@ error: list_del_init(&entry->list); msm_vidc_vmem_free((void **)&entry); } - list_for_each_entry_safe(entry, temp, &root_list, list) { - i_vpr_e(inst, "%s: root_list: %s\n", __func__, cap_name(entry->cap_id)); + list_for_each_entry_safe(entry, temp, &leaf_list, list) { + i_vpr_e(inst, "%s: leaf_list: %s\n", __func__, cap_name(entry->cap_id)); list_del_init(&entry->list); msm_vidc_vmem_free((void **)&entry); } From bd1cd4368bd0dd8aecdd98f51f9eaa831e40af56 Mon Sep 17 00:00:00 2001 From: Ankush Mitra Date: Tue, 29 Nov 2022 20:29:24 +0530 Subject: [PATCH 0775/1061] video: driver: Prepare dependency list without parent This is change 2 of the Prepare dependency list without parent change. In this change we remove all parent information from the CAP database. Change-Id: Ie0b878050ae2d24e3c1a41cbd579ef0f19d42250 Signed-off-by: Ankush Mitra --- driver/platform/anorak/src/msm_vidc_anorak.c | 120 +---------------- .../platform/common/inc/msm_vidc_platform.h | 1 - .../platform/common/src/msm_vidc_platform.c | 13 +- driver/platform/kalama/src/msm_vidc_kalama.c | 119 +---------------- .../pineapple/src/msm_vidc_pineapple.c | 121 +----------------- driver/platform/waipio/src/msm_vidc_waipio.c | 110 +--------------- driver/variant/iris2/src/msm_vidc_iris2.c | 2 +- driver/vidc/inc/msm_vidc_internal.h | 1 - driver/vidc/src/msm_vidc_driver.c | 2 - 9 files changed, 27 insertions(+), 462 deletions(-) diff --git a/driver/platform/anorak/src/msm_vidc_anorak.c b/driver/platform/anorak/src/msm_vidc_anorak.c index 5c4d4ae565..9b9a297ba2 100644 --- a/driver/platform/anorak/src/msm_vidc_anorak.c +++ b/driver/platform/anorak/src/msm_vidc_anorak.c @@ -1752,119 +1752,97 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_anor */ {PIX_FMTS, ENC, H264, - {0}, {META_ROI_INFO, IR_PERIOD}}, {PIX_FMTS, ENC, HEVC, - {0}, {PROFILE, MIN_FRAME_QP, MAX_FRAME_QP, I_FRAME_QP, P_FRAME_QP, B_FRAME_QP, META_ROI_INFO, MIN_QUALITY, BLUR_TYPES, IR_PERIOD}}, {PIX_FMTS, ENC, HEIC, - {0}, {PROFILE}}, {PIX_FMTS, DEC, HEVC|HEIC, - {0}, {PROFILE}}, {FRAME_RATE, ENC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_q16}, {FRAME_RATE, DEC, CODECS_ALL, - {0}, {0}, msm_vidc_adjust_dec_frame_rate}, {OPERATING_RATE, DEC, CODECS_ALL, - {0}, {0}, msm_vidc_adjust_dec_operating_rate}, {SECURE_MODE, ENC|DEC, H264|HEVC|VP9|AV1, - {0}, {0}, NULL, msm_vidc_set_u32}, {META_OUTBUF_FENCE, DEC, H264|HEVC|VP9|AV1, - {OUTPUT_ORDER}, {LOWLATENCY_MODE, SLICE_DECODE}, msm_vidc_adjust_dec_outbuf_fence, NULL}, {HFLIP, ENC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_flip}, {VFLIP, ENC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_flip}, {ROTATION, ENC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_rotation}, {SUPER_FRAME, ENC, H264|HEVC, - {0}, {INPUT_BUF_HOST_MAX_COUNT, OUTPUT_BUF_HOST_MAX_COUNT}, NULL, NULL}, {SLICE_DECODE, DEC, H264|HEVC|AV1, - {LOWLATENCY_MODE, META_OUTBUF_FENCE, OUTPUT_ORDER}, {0}, msm_vidc_adjust_dec_slice_mode, msm_vidc_set_u32}, {HEADER_MODE, ENC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_header_mode}, {WITHOUT_STARTCODE, ENC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_nal_length}, {WITHOUT_STARTCODE, DEC, AV1, - {0}, {0}, NULL, msm_vidc_set_u32}, {REQUEST_I_FRAME, ENC, H264|HEVC, - {0}, {0}, NULL, msm_vidc_set_req_sync_frame}, {BIT_RATE, ENC, H264, - {ENH_LAYER_COUNT, BITRATE_MODE, ENTROPY_MODE, - ALL_INTRA, LOWLATENCY_MODE}, {PEAK_BITRATE, BITRATE_BOOST}, msm_vidc_adjust_bitrate, msm_vidc_set_bitrate}, {BIT_RATE, ENC, HEVC, - {ENH_LAYER_COUNT, BITRATE_MODE, ALL_INTRA, LOWLATENCY_MODE}, {PEAK_BITRATE, BITRATE_BOOST}, msm_vidc_adjust_bitrate, msm_vidc_set_bitrate}, {BITRATE_MODE, ENC, H264, - {0}, {LTR_COUNT, IR_PERIOD, TIME_DELTA_BASED_RC, I_FRAME_QP, P_FRAME_QP, B_FRAME_QP, ENH_LAYER_COUNT, BIT_RATE, META_ROI_INFO, MIN_QUALITY, BITRATE_BOOST, VBV_DELAY, @@ -1874,7 +1852,6 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_anor msm_vidc_set_u32_enum}, {BITRATE_MODE, ENC, HEVC, - {0}, {LTR_COUNT, IR_PERIOD, TIME_DELTA_BASED_RC, I_FRAME_QP, P_FRAME_QP, B_FRAME_QP, CONSTANT_QUALITY, ENH_LAYER_COUNT, BIT_RATE, META_ROI_INFO, MIN_QUALITY, BITRATE_BOOST, VBV_DELAY, @@ -1884,515 +1861,428 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_anor msm_vidc_set_u32_enum}, {BITRATE_MODE, ENC, HEIC, - {0}, {TIME_DELTA_BASED_RC, CONSTANT_QUALITY}, msm_vidc_adjust_bitrate_mode, msm_vidc_set_u32_enum}, {CONSTANT_QUALITY, ENC, HEVC|HEIC, - {BITRATE_MODE}, {0}, NULL, msm_vidc_set_constant_quality}, {GOP_SIZE, ENC, CODECS_ALL, - {ENH_LAYER_COUNT}, {ALL_INTRA}, msm_vidc_adjust_gop_size, msm_vidc_set_gop_size}, {GOP_SIZE, ENC, HEIC, - {0}, {0}, NULL, msm_vidc_set_u32}, {B_FRAME, ENC, H264|HEVC, - {ENH_LAYER_COUNT}, {ALL_INTRA}, msm_vidc_adjust_b_frame, msm_vidc_set_u32}, {B_FRAME, ENC, HEIC, - {0}, {0}, NULL, msm_vidc_set_u32}, {BLUR_TYPES, ENC, H264|HEVC, - {PIX_FMTS, BITRATE_MODE, MIN_QUALITY, META_ROI_INFO}, {BLUR_RESOLUTION}, msm_vidc_adjust_blur_type, msm_vidc_set_u32_enum}, {BLUR_RESOLUTION, ENC, H264|HEVC, - {BLUR_TYPES}, {0}, msm_vidc_adjust_blur_resolution, msm_vidc_set_blur_resolution}, {CSC_CUSTOM_MATRIX, ENC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_csc_custom_matrix}, {LOWLATENCY_MODE, ENC, H264 | HEVC, - {BITRATE_MODE, DELIVERY_MODE}, {STAGE, BIT_RATE}, msm_vidc_adjust_enc_lowlatency_mode, NULL}, {LOWLATENCY_MODE, DEC, H264|HEVC|VP9|AV1, - {META_OUTBUF_FENCE}, {STAGE, SLICE_DECODE}, msm_vidc_adjust_dec_lowlatency_mode, NULL}, {LTR_COUNT, ENC, H264|HEVC, - {BITRATE_MODE, ALL_INTRA}, {0}, msm_vidc_adjust_ltr_count, msm_vidc_set_u32}, {USE_LTR, ENC, H264|HEVC, - {0}, {0}, msm_vidc_adjust_use_ltr, msm_vidc_set_use_and_mark_ltr}, {MARK_LTR, ENC, H264|HEVC, - {0}, {0}, msm_vidc_adjust_mark_ltr, msm_vidc_set_use_and_mark_ltr}, {IR_PERIOD, ENC, H264|HEVC, - {BITRATE_MODE, ALL_INTRA, META_ROI_INFO, PIX_FMTS}, {0}, msm_vidc_adjust_ir_period, msm_vidc_set_ir_period}, {AU_DELIMITER, ENC, H264|HEVC, - {0}, {0}, NULL, msm_vidc_set_u32}, {TIME_DELTA_BASED_RC, ENC, CODECS_ALL, - {BITRATE_MODE}, {0}, msm_vidc_adjust_delta_based_rc, msm_vidc_set_u32}, {CONTENT_ADAPTIVE_CODING, ENC, H264|HEVC, - {BITRATE_MODE, LAYER_ENABLE, LAYER_TYPE}, {REQUEST_PREPROCESS}, msm_vidc_adjust_brs, msm_vidc_set_vbr_related_properties}, {REQUEST_PREPROCESS, ENC, H264|HEVC, - {CONTENT_ADAPTIVE_CODING, META_EVA_STATS}, {0}, msm_vidc_adjust_preprocess, msm_vidc_set_preprocess}, {BITRATE_BOOST, ENC, H264|HEVC, - {BITRATE_MODE, MIN_QUALITY, BIT_RATE}, {0}, msm_vidc_adjust_bitrate_boost_iris3, msm_vidc_set_vbr_related_properties}, {MIN_QUALITY, ENC, H264, - {BITRATE_MODE, ENH_LAYER_COUNT, META_ROI_INFO}, {BLUR_TYPES}, msm_vidc_adjust_min_quality, msm_vidc_set_vbr_related_properties}, {MIN_QUALITY, ENC, HEVC, - {BITRATE_MODE, PIX_FMTS, ENH_LAYER_COUNT, - META_ROI_INFO}, {BLUR_TYPES}, msm_vidc_adjust_min_quality, msm_vidc_set_vbr_related_properties}, {VBV_DELAY, ENC, H264|HEVC, - {BITRATE_MODE}, {0}, NULL, msm_vidc_set_cbr_related_properties}, {PEAK_BITRATE, ENC, H264|HEVC, - {BITRATE_MODE, BIT_RATE}, {0}, msm_vidc_adjust_peak_bitrate, msm_vidc_set_cbr_related_properties}, {MIN_FRAME_QP, ENC, H264, - {0}, {0}, NULL, msm_vidc_set_min_qp}, - {MIN_FRAME_QP, ENC, HEVC|HEIC, - {PIX_FMTS}, + {MIN_FRAME_QP, ENC, HEVC, {0}, msm_vidc_adjust_hevc_min_qp, msm_vidc_set_min_qp}, {MAX_FRAME_QP, ENC, H264, - {0}, {0}, NULL, msm_vidc_set_max_qp}, - {MAX_FRAME_QP, ENC, HEVC|HEIC, - {PIX_FMTS}, + {MAX_FRAME_QP, ENC, HEVC, {0}, msm_vidc_adjust_hevc_max_qp, msm_vidc_set_max_qp}, {I_FRAME_QP, ENC, HEVC, - {PIX_FMTS, BITRATE_MODE}, {0}, msm_vidc_adjust_hevc_i_frame_qp, msm_vidc_set_frame_qp}, {I_FRAME_QP, ENC, H264, - {BITRATE_MODE}, {0}, NULL, msm_vidc_set_frame_qp}, {P_FRAME_QP, ENC, HEVC, - {PIX_FMTS, BITRATE_MODE}, {0}, msm_vidc_adjust_hevc_p_frame_qp, msm_vidc_set_frame_qp}, {P_FRAME_QP, ENC, H264, - {BITRATE_MODE}, {0}, NULL, msm_vidc_set_frame_qp}, {B_FRAME_QP, ENC, HEVC, - {PIX_FMTS, BITRATE_MODE}, {0}, msm_vidc_adjust_hevc_b_frame_qp, msm_vidc_set_frame_qp}, {B_FRAME_QP, ENC, H264, - {BITRATE_MODE}, {0}, NULL, msm_vidc_set_frame_qp}, - {LAYER_TYPE, ENC, H264, - {0}, + {LAYER_TYPE, ENC, H264|HEVC, {CONTENT_ADAPTIVE_CODING}}, {LAYER_ENABLE, ENC, H264|HEVC, - {0}, {CONTENT_ADAPTIVE_CODING}}, {ENH_LAYER_COUNT, ENC, H264|HEVC, - {BITRATE_MODE, META_EVA_STATS}, {GOP_SIZE, B_FRAME, BIT_RATE, MIN_QUALITY, SLICE_MODE}, msm_vidc_adjust_layer_count, msm_vidc_set_layer_count_and_type}, {ENH_LAYER_COUNT, DEC, AV1, - {0}, {0}, NULL, msm_vidc_set_u32}, {L0_BR, ENC, H264|HEVC, - {0}, {0}, msm_vidc_adjust_dynamic_layer_bitrate, msm_vidc_set_dynamic_layer_bitrate}, {L1_BR, ENC, H264|HEVC, - {0}, {0}, msm_vidc_adjust_dynamic_layer_bitrate, msm_vidc_set_dynamic_layer_bitrate}, {L2_BR, ENC, H264|HEVC, - {0}, {0}, msm_vidc_adjust_dynamic_layer_bitrate, msm_vidc_set_dynamic_layer_bitrate}, {L3_BR, ENC, H264|HEVC, - {0}, {0}, msm_vidc_adjust_dynamic_layer_bitrate, msm_vidc_set_dynamic_layer_bitrate}, {L4_BR, ENC, H264|HEVC, - {0}, {0}, msm_vidc_adjust_dynamic_layer_bitrate, msm_vidc_set_dynamic_layer_bitrate}, {L5_BR, ENC, H264|HEVC, - {0}, {0}, msm_vidc_adjust_dynamic_layer_bitrate, msm_vidc_set_dynamic_layer_bitrate}, {ENTROPY_MODE, ENC, H264, - {PROFILE}, {BIT_RATE}, msm_vidc_adjust_entropy_mode, msm_vidc_set_u32}, {PROFILE, ENC, H264, - {0}, {ENTROPY_MODE, TRANSFORM_8X8}, NULL, msm_vidc_set_u32_enum}, {PROFILE, DEC, H264, - {0}, {ENTROPY_MODE}, NULL, msm_vidc_set_u32_enum}, {PROFILE, ENC|DEC, HEVC|HEIC, - {PIX_FMTS}, {0}, msm_vidc_adjust_profile, msm_vidc_set_u32_enum}, {PROFILE, DEC, VP9|AV1, - {0}, {0}, NULL, msm_vidc_set_u32_enum}, {LEVEL, DEC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_u32_enum}, {LEVEL, ENC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_level}, {AV1_TIER, DEC, AV1, - {0}, {0}, NULL, msm_vidc_set_u32_enum}, {HEVC_TIER, ENC|DEC, HEVC|HEIC, - {0}, {0}, NULL, msm_vidc_set_u32_enum}, {LF_MODE, ENC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_deblock_mode}, {SLICE_MODE, ENC, H264|HEVC, - {BITRATE_MODE, ALL_INTRA, ENH_LAYER_COUNT}, {STAGE, DELIVERY_MODE}, msm_vidc_adjust_slice_count, msm_vidc_set_slice_count}, {SLICE_MODE, ENC, HEIC, - {0}, {0}, msm_vidc_adjust_slice_count, msm_vidc_set_slice_count}, {TRANSFORM_8X8, ENC, H264, - {PROFILE}, {0}, msm_vidc_adjust_transform_8x8, msm_vidc_set_u32}, {CHROMA_QP_INDEX_OFFSET, ENC, HEVC, - {0}, {0}, msm_vidc_adjust_chroma_qp_index_offset, msm_vidc_set_chroma_qp_index_offset}, {DISPLAY_DELAY_ENABLE, DEC, H264|HEVC|VP9|AV1, - {0}, {OUTPUT_ORDER}, NULL, NULL}, {DISPLAY_DELAY, DEC, H264|HEVC|VP9|AV1, - {0}, {OUTPUT_ORDER}, NULL, NULL}, {OUTPUT_ORDER, DEC, H264|HEVC|VP9|AV1, - {THUMBNAIL_MODE, DISPLAY_DELAY, DISPLAY_DELAY_ENABLE}, {META_OUTBUF_FENCE, SLICE_DECODE}, msm_vidc_adjust_output_order, msm_vidc_set_u32}, {INPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL, - {0}, {0}, msm_vidc_adjust_input_buf_host_max_count, msm_vidc_set_u32}, {INPUT_BUF_HOST_MAX_COUNT, ENC, H264|HEVC, - {SUPER_FRAME}, {0}, msm_vidc_adjust_input_buf_host_max_count, msm_vidc_set_u32}, {OUTPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL, - {0}, {0}, msm_vidc_adjust_output_buf_host_max_count, msm_vidc_set_u32}, {OUTPUT_BUF_HOST_MAX_COUNT, ENC, H264|HEVC, - {SUPER_FRAME, DELIVERY_MODE}, {0}, msm_vidc_adjust_output_buf_host_max_count, msm_vidc_set_u32}, {CONCEAL_COLOR_8BIT, DEC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_u32_packed}, {CONCEAL_COLOR_10BIT, DEC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_u32_packed}, {STAGE, ENC | DEC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_stage}, {STAGE, ENC, H264|HEVC, - {LOWLATENCY_MODE, SLICE_MODE}, {0}, NULL, msm_vidc_set_stage}, {STAGE, DEC, H264|HEVC|VP9|AV1, - {LOWLATENCY_MODE}, {0}, NULL, msm_vidc_set_stage}, {PIPE, DEC|ENC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_pipe}, {THUMBNAIL_MODE, DEC, H264|HEVC|VP9|AV1, - {0}, {OUTPUT_ORDER}, NULL, msm_vidc_set_u32}, {THUMBNAIL_MODE, DEC, HEIC, - {0}, {0}, NULL, msm_vidc_set_u32}, {RAP_FRAME, DEC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_u32}, {PRIORITY, DEC|ENC, CODECS_ALL, - {0}, {0}, msm_vidc_adjust_session_priority, msm_vidc_set_session_priority}, {FIRMWARE_PRIORITY_OFFSET, DEC | ENC, CODECS_ALL, - {0}, {0}, NULL, NULL}, {CRITICAL_PRIORITY, ENC, CODECS_ALL, - {0}, {0}, NULL, NULL}, {RESERVE_DURATION, ENC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_reserve_duration}, {DPB_LIST, DEC, CODECS_ALL, - {0}, {0}, NULL, NULL}, {DRAP, DEC, AV1, - {0}, {0}, NULL, msm_vidc_set_u32}, {ALL_INTRA, ENC, H264|HEVC, - {GOP_SIZE, B_FRAME}, {LTR_COUNT, IR_PERIOD, SLICE_MODE, BIT_RATE}, msm_vidc_adjust_all_intra, NULL}, {META_EVA_STATS, ENC, H264|HEVC, - {0}, {ENH_LAYER_COUNT, REQUEST_PREPROCESS}}, {META_EVA_STATS, ENC, HEIC, - {0}, {0}}, {META_ROI_INFO, ENC, H264|HEVC, - {BITRATE_MODE, PIX_FMTS}, - {MIN_QUALITY, IR_PERIOD}, + {MIN_QUALITY, IR_PERIOD, BLUR_TYPES}, msm_vidc_adjust_roi_info, NULL}, {GRID, ENC, HEIC, - {0}, {0}, NULL, msm_vidc_set_u32}, {DELIVERY_MODE, ENC, H264|HEVC, - {SLICE_MODE}, {LOWLATENCY_MODE, OUTPUT_BUF_HOST_MAX_COUNT}, + {LOWLATENCY_MODE, OUTPUT_BUF_HOST_MAX_COUNT}, msm_vidc_adjust_delivery_mode, msm_vidc_set_u32}, {VUI_TIMING_INFO, ENC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_vui_timing_info}, diff --git a/driver/platform/common/inc/msm_vidc_platform.h b/driver/platform/common/inc/msm_vidc_platform.h index 9c24618eaf..40edd300fd 100644 --- a/driver/platform/common/inc/msm_vidc_platform.h +++ b/driver/platform/common/inc/msm_vidc_platform.h @@ -146,7 +146,6 @@ struct msm_platform_inst_cap_dependency { enum msm_vidc_inst_capability_type cap_id; enum msm_vidc_domain_type domain; enum msm_vidc_codec_type codec; - enum msm_vidc_inst_capability_type parents[MAX_CAP_PARENTS]; enum msm_vidc_inst_capability_type children[MAX_CAP_CHILDREN]; int (*adjust)(void *inst, struct v4l2_ctrl *ctrl); diff --git a/driver/platform/common/src/msm_vidc_platform.c b/driver/platform/common/src/msm_vidc_platform.c index d2074faa18..7150c46c8a 100644 --- a/driver/platform/common/src/msm_vidc_platform.c +++ b/driver/platform/common/src/msm_vidc_platform.c @@ -523,12 +523,15 @@ bool is_parent_available(struct msm_vidc_inst *inst, u32 cap_id, u32 check_parent, const char *func) { int i = 0; - u32 cap_parent; + u32 cap_child; - while (i < MAX_CAP_PARENTS && - inst->capabilities->cap[cap_id].parents[i]) { - cap_parent = inst->capabilities->cap[cap_id].parents[i]; - if (cap_parent == check_parent) + if (!is_valid_cap_id(cap_id) || !is_valid_cap_id(check_parent)) + return false; + + while (i < MAX_CAP_CHILDREN && + inst->capabilities->cap[check_parent].children[i]) { + cap_child = inst->capabilities->cap[check_parent].children[i]; + if (cap_child == cap_id) return true; i++; } diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index 98427329e3..4a1e8828a0 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -1944,113 +1944,92 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kala */ {PIX_FMTS, ENC, H264, - {0}, {META_ROI_INFO, IR_PERIOD}}, {PIX_FMTS, ENC, HEVC, - {0}, {PROFILE, MIN_FRAME_QP, MAX_FRAME_QP, I_FRAME_QP, P_FRAME_QP, B_FRAME_QP, META_ROI_INFO, MIN_QUALITY, BLUR_TYPES, IR_PERIOD}}, {PIX_FMTS, ENC, HEIC, - {0}, {PROFILE}}, {PIX_FMTS, DEC, HEVC|HEIC, - {0}, {PROFILE}}, {FRAME_RATE, ENC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_q16}, {FRAME_RATE, DEC, CODECS_ALL, - {0}, {0}, msm_vidc_adjust_dec_frame_rate}, {OPERATING_RATE, DEC, CODECS_ALL, - {0}, {0}, msm_vidc_adjust_dec_operating_rate}, {SECURE_MODE, ENC|DEC, H264|HEVC|VP9|AV1, - {0}, {0}, NULL, msm_vidc_set_u32}, {META_OUTBUF_FENCE, DEC, H264|HEVC|VP9|AV1, - {OUTPUT_ORDER}, {LOWLATENCY_MODE}, msm_vidc_adjust_dec_outbuf_fence, NULL}, {HFLIP, ENC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_flip}, {VFLIP, ENC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_flip}, {ROTATION, ENC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_rotation}, {SUPER_FRAME, ENC, H264|HEVC, - {0}, {INPUT_BUF_HOST_MAX_COUNT, OUTPUT_BUF_HOST_MAX_COUNT}, NULL, NULL}, {HEADER_MODE, ENC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_header_mode}, {WITHOUT_STARTCODE, ENC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_nal_length}, {WITHOUT_STARTCODE, DEC, AV1, - {0}, {0}, NULL, msm_vidc_set_u32}, {REQUEST_I_FRAME, ENC, H264|HEVC, - {0}, {0}, NULL, msm_vidc_set_req_sync_frame}, {BIT_RATE, ENC, H264, - {ENH_LAYER_COUNT, BITRATE_MODE, ENTROPY_MODE, - ALL_INTRA, LOWLATENCY_MODE}, {PEAK_BITRATE, BITRATE_BOOST}, msm_vidc_adjust_bitrate, msm_vidc_set_bitrate}, {BIT_RATE, ENC, HEVC, - {ENH_LAYER_COUNT, BITRATE_MODE, ALL_INTRA, LOWLATENCY_MODE}, {PEAK_BITRATE, BITRATE_BOOST}, msm_vidc_adjust_bitrate, msm_vidc_set_bitrate}, {BITRATE_MODE, ENC, H264, - {0}, {LTR_COUNT, IR_PERIOD, TIME_DELTA_BASED_RC, I_FRAME_QP, P_FRAME_QP, B_FRAME_QP, ENH_LAYER_COUNT, BIT_RATE, META_ROI_INFO, MIN_QUALITY, BITRATE_BOOST, VBV_DELAY, @@ -2060,7 +2039,6 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kala msm_vidc_set_u32_enum}, {BITRATE_MODE, ENC, HEVC, - {0}, {LTR_COUNT, IR_PERIOD, TIME_DELTA_BASED_RC, I_FRAME_QP, P_FRAME_QP, B_FRAME_QP, CONSTANT_QUALITY, ENH_LAYER_COUNT, BIT_RATE, META_ROI_INFO, MIN_QUALITY, BITRATE_BOOST, VBV_DELAY, @@ -2070,515 +2048,428 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kala msm_vidc_set_u32_enum}, {BITRATE_MODE, ENC, HEIC, - {0}, {TIME_DELTA_BASED_RC, CONSTANT_QUALITY}, msm_vidc_adjust_bitrate_mode, msm_vidc_set_u32_enum}, {CONSTANT_QUALITY, ENC, HEVC|HEIC, - {BITRATE_MODE}, {0}, NULL, msm_vidc_set_constant_quality}, {GOP_SIZE, ENC, CODECS_ALL, - {ENH_LAYER_COUNT}, {ALL_INTRA}, msm_vidc_adjust_gop_size, msm_vidc_set_gop_size}, {GOP_SIZE, ENC, HEIC, - {0}, {0}, NULL, msm_vidc_set_u32}, {B_FRAME, ENC, H264|HEVC, - {ENH_LAYER_COUNT}, {ALL_INTRA}, msm_vidc_adjust_b_frame, msm_vidc_set_u32}, {B_FRAME, ENC, HEIC, - {0}, {0}, NULL, msm_vidc_set_u32}, {BLUR_TYPES, ENC, H264|HEVC, - {PIX_FMTS, BITRATE_MODE, MIN_QUALITY, META_ROI_INFO}, {BLUR_RESOLUTION}, msm_vidc_adjust_blur_type, msm_vidc_set_u32_enum}, {BLUR_RESOLUTION, ENC, H264|HEVC, - {BLUR_TYPES}, {0}, msm_vidc_adjust_blur_resolution, msm_vidc_set_blur_resolution}, {CSC_CUSTOM_MATRIX, ENC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_csc_custom_matrix}, {LOWLATENCY_MODE, ENC, H264 | HEVC, - {BITRATE_MODE, DELIVERY_MODE}, {STAGE, BIT_RATE}, msm_vidc_adjust_enc_lowlatency_mode, NULL}, {LOWLATENCY_MODE, DEC, H264|HEVC|VP9|AV1, - {META_OUTBUF_FENCE}, {STAGE}, msm_vidc_adjust_dec_lowlatency_mode, NULL}, {LTR_COUNT, ENC, H264|HEVC, - {BITRATE_MODE, ALL_INTRA}, {0}, msm_vidc_adjust_ltr_count, msm_vidc_set_u32}, {USE_LTR, ENC, H264|HEVC, - {0}, {0}, msm_vidc_adjust_use_ltr, msm_vidc_set_use_and_mark_ltr}, {MARK_LTR, ENC, H264|HEVC, - {0}, {0}, msm_vidc_adjust_mark_ltr, msm_vidc_set_use_and_mark_ltr}, {IR_PERIOD, ENC, H264|HEVC, - {BITRATE_MODE, ALL_INTRA, META_ROI_INFO, PIX_FMTS}, {0}, msm_vidc_adjust_ir_period, msm_vidc_set_ir_period}, {AU_DELIMITER, ENC, H264|HEVC, - {0}, {0}, NULL, msm_vidc_set_u32}, {TIME_DELTA_BASED_RC, ENC, CODECS_ALL, - {BITRATE_MODE}, {0}, msm_vidc_adjust_delta_based_rc, msm_vidc_set_u32}, {CONTENT_ADAPTIVE_CODING, ENC, H264|HEVC, - {BITRATE_MODE, LAYER_ENABLE, LAYER_TYPE}, {REQUEST_PREPROCESS}, msm_vidc_adjust_brs, msm_vidc_set_vbr_related_properties}, {REQUEST_PREPROCESS, ENC, H264|HEVC, - {CONTENT_ADAPTIVE_CODING, META_EVA_STATS}, {0}, msm_vidc_adjust_preprocess, msm_vidc_set_preprocess}, {BITRATE_BOOST, ENC, H264|HEVC, - {BITRATE_MODE, MIN_QUALITY, BIT_RATE}, {0}, msm_vidc_adjust_bitrate_boost_iris3, msm_vidc_set_vbr_related_properties}, {MIN_QUALITY, ENC, H264, - {BITRATE_MODE, ENH_LAYER_COUNT, META_ROI_INFO}, {BLUR_TYPES}, msm_vidc_adjust_min_quality, msm_vidc_set_u32}, {MIN_QUALITY, ENC, HEVC, - {BITRATE_MODE, PIX_FMTS, ENH_LAYER_COUNT, - META_ROI_INFO}, {BLUR_TYPES}, msm_vidc_adjust_min_quality, msm_vidc_set_u32}, {VBV_DELAY, ENC, H264|HEVC, - {BITRATE_MODE}, {0}, NULL, msm_vidc_set_cbr_related_properties}, {PEAK_BITRATE, ENC, H264|HEVC, - {BITRATE_MODE, BIT_RATE}, {0}, msm_vidc_adjust_peak_bitrate, msm_vidc_set_cbr_related_properties}, {MIN_FRAME_QP, ENC, H264, - {0}, {0}, NULL, msm_vidc_set_min_qp}, - {MIN_FRAME_QP, ENC, HEVC|HEIC, - {PIX_FMTS}, + {MIN_FRAME_QP, ENC, HEVC, {0}, msm_vidc_adjust_hevc_min_qp, msm_vidc_set_min_qp}, {MAX_FRAME_QP, ENC, H264, - {0}, {0}, NULL, msm_vidc_set_max_qp}, - {MAX_FRAME_QP, ENC, HEVC|HEIC, - {PIX_FMTS}, + {MAX_FRAME_QP, ENC, HEVC, {0}, msm_vidc_adjust_hevc_max_qp, msm_vidc_set_max_qp}, {I_FRAME_QP, ENC, HEVC, - {PIX_FMTS, BITRATE_MODE}, {0}, msm_vidc_adjust_hevc_i_frame_qp, msm_vidc_set_frame_qp}, {I_FRAME_QP, ENC, H264, - {BITRATE_MODE}, {0}, NULL, msm_vidc_set_frame_qp}, {P_FRAME_QP, ENC, HEVC, - {PIX_FMTS, BITRATE_MODE}, {0}, msm_vidc_adjust_hevc_p_frame_qp, msm_vidc_set_frame_qp}, {P_FRAME_QP, ENC, H264, - {BITRATE_MODE}, {0}, NULL, msm_vidc_set_frame_qp}, {B_FRAME_QP, ENC, HEVC, - {PIX_FMTS, BITRATE_MODE}, {0}, msm_vidc_adjust_hevc_b_frame_qp, msm_vidc_set_frame_qp}, {B_FRAME_QP, ENC, H264, - {BITRATE_MODE}, {0}, NULL, msm_vidc_set_frame_qp}, - {LAYER_TYPE, ENC, H264, - {0}, + {LAYER_TYPE, ENC, H264|HEVC, {CONTENT_ADAPTIVE_CODING}}, {LAYER_ENABLE, ENC, H264|HEVC, - {0}, {CONTENT_ADAPTIVE_CODING}}, {ENH_LAYER_COUNT, ENC, H264|HEVC, - {BITRATE_MODE, META_EVA_STATS}, {GOP_SIZE, B_FRAME, BIT_RATE, MIN_QUALITY, SLICE_MODE}, msm_vidc_adjust_layer_count, msm_vidc_set_layer_count_and_type}, {ENH_LAYER_COUNT, DEC, AV1, - {0}, {0}, NULL, msm_vidc_set_u32}, {L0_BR, ENC, H264|HEVC, - {0}, {0}, msm_vidc_adjust_dynamic_layer_bitrate, msm_vidc_set_dynamic_layer_bitrate}, {L1_BR, ENC, H264|HEVC, - {0}, {0}, msm_vidc_adjust_dynamic_layer_bitrate, msm_vidc_set_dynamic_layer_bitrate}, {L2_BR, ENC, H264|HEVC, - {0}, {0}, msm_vidc_adjust_dynamic_layer_bitrate, msm_vidc_set_dynamic_layer_bitrate}, {L3_BR, ENC, H264|HEVC, - {0}, {0}, msm_vidc_adjust_dynamic_layer_bitrate, msm_vidc_set_dynamic_layer_bitrate}, {L4_BR, ENC, H264|HEVC, - {0}, {0}, msm_vidc_adjust_dynamic_layer_bitrate, msm_vidc_set_dynamic_layer_bitrate}, {L5_BR, ENC, H264|HEVC, - {0}, {0}, msm_vidc_adjust_dynamic_layer_bitrate, msm_vidc_set_dynamic_layer_bitrate}, {ENTROPY_MODE, ENC, H264, - {PROFILE}, {BIT_RATE}, msm_vidc_adjust_entropy_mode, msm_vidc_set_u32}, {PROFILE, ENC, H264, - {0}, {ENTROPY_MODE, TRANSFORM_8X8}, NULL, msm_vidc_set_u32_enum}, {PROFILE, DEC, H264, - {0}, {ENTROPY_MODE}, NULL, msm_vidc_set_u32_enum}, {PROFILE, ENC|DEC, HEVC|HEIC, - {PIX_FMTS}, {0}, msm_vidc_adjust_profile, msm_vidc_set_u32_enum}, {PROFILE, DEC, VP9|AV1, - {0}, {0}, NULL, msm_vidc_set_u32_enum}, {LEVEL, DEC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_u32_enum}, {LEVEL, ENC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_level}, {AV1_TIER, DEC, AV1, - {0}, {0}, NULL, msm_vidc_set_u32_enum}, {HEVC_TIER, ENC|DEC, HEVC|HEIC, - {0}, {0}, NULL, msm_vidc_set_u32_enum}, {LF_MODE, ENC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_deblock_mode}, {SLICE_MODE, ENC, H264|HEVC, - {BITRATE_MODE, ALL_INTRA, ENH_LAYER_COUNT}, {STAGE, DELIVERY_MODE}, msm_vidc_adjust_slice_count, msm_vidc_set_slice_count}, {SLICE_MODE, ENC, HEIC, - {0}, {0}, msm_vidc_adjust_slice_count, msm_vidc_set_slice_count}, {TRANSFORM_8X8, ENC, H264, - {PROFILE}, {0}, msm_vidc_adjust_transform_8x8, msm_vidc_set_u32}, {CHROMA_QP_INDEX_OFFSET, ENC, HEVC, - {0}, {0}, msm_vidc_adjust_chroma_qp_index_offset, msm_vidc_set_chroma_qp_index_offset}, {DISPLAY_DELAY_ENABLE, DEC, H264|HEVC|VP9|AV1, - {0}, {OUTPUT_ORDER}, NULL, NULL}, {DISPLAY_DELAY, DEC, H264|HEVC|VP9|AV1, - {0}, {OUTPUT_ORDER}, NULL, NULL}, {OUTPUT_ORDER, DEC, H264|HEVC|VP9|AV1, - {THUMBNAIL_MODE, DISPLAY_DELAY, DISPLAY_DELAY_ENABLE}, {META_OUTBUF_FENCE}, msm_vidc_adjust_output_order, msm_vidc_set_u32}, {INPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL, - {0}, {0}, msm_vidc_adjust_input_buf_host_max_count, msm_vidc_set_u32}, {INPUT_BUF_HOST_MAX_COUNT, ENC, H264|HEVC, - {SUPER_FRAME}, {0}, msm_vidc_adjust_input_buf_host_max_count, msm_vidc_set_u32}, {OUTPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL, - {0}, {0}, msm_vidc_adjust_output_buf_host_max_count, msm_vidc_set_u32}, {OUTPUT_BUF_HOST_MAX_COUNT, ENC, H264|HEVC, - {SUPER_FRAME, DELIVERY_MODE}, {0}, msm_vidc_adjust_output_buf_host_max_count, msm_vidc_set_u32}, {CONCEAL_COLOR_8BIT, DEC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_u32_packed}, {CONCEAL_COLOR_10BIT, DEC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_u32_packed}, {STAGE, ENC | DEC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_stage}, {STAGE, ENC, H264|HEVC, - {LOWLATENCY_MODE, SLICE_MODE}, {0}, NULL, msm_vidc_set_stage}, {STAGE, DEC, H264|HEVC|VP9|AV1, - {LOWLATENCY_MODE}, {0}, NULL, msm_vidc_set_stage}, {PIPE, DEC|ENC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_pipe}, {THUMBNAIL_MODE, DEC, H264|HEVC|VP9|AV1, - {0}, {OUTPUT_ORDER}, NULL, msm_vidc_set_u32}, {THUMBNAIL_MODE, DEC, HEIC, - {0}, {0}, NULL, msm_vidc_set_u32}, {RAP_FRAME, DEC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_u32}, {PRIORITY, DEC|ENC, CODECS_ALL, - {0}, {0}, msm_vidc_adjust_session_priority, msm_vidc_set_session_priority}, {FIRMWARE_PRIORITY_OFFSET, DEC | ENC, CODECS_ALL, - {0}, {0}, NULL, NULL}, {CRITICAL_PRIORITY, ENC, CODECS_ALL, - {0}, {0}, NULL, NULL}, {RESERVE_DURATION, ENC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_reserve_duration}, {DPB_LIST, DEC, CODECS_ALL, - {0}, {0}, NULL, NULL}, {DRAP, DEC, AV1, - {0}, {0}, NULL, msm_vidc_set_u32}, {ALL_INTRA, ENC, H264|HEVC, - {GOP_SIZE, B_FRAME}, {LTR_COUNT, IR_PERIOD, SLICE_MODE, BIT_RATE}, msm_vidc_adjust_all_intra, NULL}, {META_EVA_STATS, ENC, H264|HEVC, - {0}, {ENH_LAYER_COUNT, REQUEST_PREPROCESS}}, {META_EVA_STATS, ENC, HEIC, - {0}, {0}}, {META_ROI_INFO, ENC, H264|HEVC, - {BITRATE_MODE, PIX_FMTS}, - {MIN_QUALITY, IR_PERIOD}, + {MIN_QUALITY, IR_PERIOD, BLUR_TYPES}, msm_vidc_adjust_roi_info, NULL}, {GRID, ENC, HEIC, - {0}, {0}, NULL, msm_vidc_set_u32}, {DELIVERY_MODE, ENC, H264|HEVC, - {SLICE_MODE}, {LOWLATENCY_MODE, OUTPUT_BUF_HOST_MAX_COUNT}, + {LOWLATENCY_MODE, OUTPUT_BUF_HOST_MAX_COUNT}, msm_vidc_adjust_delivery_mode, msm_vidc_set_u32}, {VUI_TIMING_INFO, ENC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_vui_timing_info}, diff --git a/driver/platform/pineapple/src/msm_vidc_pineapple.c b/driver/platform/pineapple/src/msm_vidc_pineapple.c index 7f5367692b..2a46c862f0 100644 --- a/driver/platform/pineapple/src/msm_vidc_pineapple.c +++ b/driver/platform/pineapple/src/msm_vidc_pineapple.c @@ -1952,119 +1952,97 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine */ {PIX_FMTS, ENC, H264, - {0}, {META_ROI_INFO, IR_PERIOD}}, {PIX_FMTS, ENC, HEVC, - {0}, {PROFILE, MIN_FRAME_QP, MAX_FRAME_QP, I_FRAME_QP, P_FRAME_QP, B_FRAME_QP, META_ROI_INFO, MIN_QUALITY, BLUR_TYPES, IR_PERIOD}}, {PIX_FMTS, ENC, HEIC, - {0}, {PROFILE}}, {PIX_FMTS, DEC, HEVC|HEIC, - {0}, {PROFILE}}, {FRAME_RATE, ENC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_q16}, {FRAME_RATE, DEC, CODECS_ALL, - {0}, {0}, msm_vidc_adjust_dec_frame_rate}, {OPERATING_RATE, DEC, CODECS_ALL, - {0}, {0}, msm_vidc_adjust_dec_operating_rate}, {SECURE_MODE, ENC|DEC, H264|HEVC|VP9|AV1, - {0}, {0}, NULL, msm_vidc_set_u32}, {META_OUTBUF_FENCE, DEC, H264|HEVC|VP9|AV1, - {OUTPUT_ORDER}, {LOWLATENCY_MODE, SLICE_DECODE}, msm_vidc_adjust_dec_outbuf_fence, NULL}, {HFLIP, ENC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_flip}, {VFLIP, ENC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_flip}, {ROTATION, ENC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_rotation}, {SUPER_FRAME, ENC, H264|HEVC, - {0}, {INPUT_BUF_HOST_MAX_COUNT, OUTPUT_BUF_HOST_MAX_COUNT}, NULL, NULL}, {SLICE_DECODE, DEC, H264|HEVC|AV1, - {LOWLATENCY_MODE, META_OUTBUF_FENCE, OUTPUT_ORDER}, {0}, NULL, NULL}, {HEADER_MODE, ENC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_header_mode}, {WITHOUT_STARTCODE, ENC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_nal_length}, {WITHOUT_STARTCODE, DEC, AV1, - {0}, {0}, NULL, msm_vidc_set_u32}, {REQUEST_I_FRAME, ENC, H264|HEVC, - {0}, {0}, NULL, msm_vidc_set_req_sync_frame}, {BIT_RATE, ENC, H264, - {ENH_LAYER_COUNT, BITRATE_MODE, ENTROPY_MODE, - ALL_INTRA, LOWLATENCY_MODE}, {PEAK_BITRATE, BITRATE_BOOST}, msm_vidc_adjust_bitrate, msm_vidc_set_bitrate}, {BIT_RATE, ENC, HEVC, - {ENH_LAYER_COUNT, BITRATE_MODE, ALL_INTRA, LOWLATENCY_MODE}, {PEAK_BITRATE, BITRATE_BOOST}, msm_vidc_adjust_bitrate, msm_vidc_set_bitrate}, {BITRATE_MODE, ENC, H264, - {0}, {LTR_COUNT, IR_PERIOD, TIME_DELTA_BASED_RC, I_FRAME_QP, P_FRAME_QP, B_FRAME_QP, ENH_LAYER_COUNT, BIT_RATE, META_ROI_INFO, MIN_QUALITY, BITRATE_BOOST, VBV_DELAY, @@ -2074,7 +2052,6 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine msm_vidc_set_u32_enum}, {BITRATE_MODE, ENC, HEVC, - {0}, {LTR_COUNT, IR_PERIOD, TIME_DELTA_BASED_RC, I_FRAME_QP, P_FRAME_QP, B_FRAME_QP, CONSTANT_QUALITY, ENH_LAYER_COUNT, BIT_RATE, META_ROI_INFO, MIN_QUALITY, BITRATE_BOOST, VBV_DELAY, @@ -2084,521 +2061,433 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine msm_vidc_set_u32_enum}, {BITRATE_MODE, ENC, HEIC, - {0}, {TIME_DELTA_BASED_RC, CONSTANT_QUALITY}, msm_vidc_adjust_bitrate_mode, msm_vidc_set_u32_enum}, {CONSTANT_QUALITY, ENC, HEVC|HEIC, - {BITRATE_MODE}, {0}, NULL, msm_vidc_set_constant_quality}, {GOP_SIZE, ENC, CODECS_ALL, - {ENH_LAYER_COUNT}, {ALL_INTRA}, msm_vidc_adjust_gop_size, msm_vidc_set_gop_size}, {GOP_SIZE, ENC, HEIC, - {0}, {0}, NULL, msm_vidc_set_u32}, {B_FRAME, ENC, H264|HEVC, - {ENH_LAYER_COUNT}, {ALL_INTRA}, msm_vidc_adjust_b_frame, msm_vidc_set_u32}, {B_FRAME, ENC, HEIC, - {0}, {0}, NULL, msm_vidc_set_u32}, {BLUR_TYPES, ENC, H264|HEVC, - {PIX_FMTS, BITRATE_MODE, MIN_QUALITY, META_ROI_INFO}, {BLUR_RESOLUTION}, msm_vidc_adjust_blur_type, msm_vidc_set_u32_enum}, {BLUR_RESOLUTION, ENC, H264|HEVC, - {BLUR_TYPES}, {0}, msm_vidc_adjust_blur_resolution, msm_vidc_set_blur_resolution}, {CSC_CUSTOM_MATRIX, ENC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_csc_custom_matrix}, {LOWLATENCY_MODE, ENC, H264 | HEVC, - {BITRATE_MODE, DELIVERY_MODE}, {STAGE, BIT_RATE}, msm_vidc_adjust_enc_lowlatency_mode, NULL}, {LOWLATENCY_MODE, DEC, H264|HEVC|VP9|AV1, - {META_OUTBUF_FENCE}, {STAGE, SLICE_DECODE}, msm_vidc_adjust_dec_lowlatency_mode, NULL}, {LTR_COUNT, ENC, H264|HEVC, - {BITRATE_MODE, ALL_INTRA}, {0}, msm_vidc_adjust_ltr_count, msm_vidc_set_u32}, {USE_LTR, ENC, H264|HEVC, - {0}, {0}, msm_vidc_adjust_use_ltr, msm_vidc_set_use_and_mark_ltr}, {MARK_LTR, ENC, H264|HEVC, - {0}, {0}, msm_vidc_adjust_mark_ltr, msm_vidc_set_use_and_mark_ltr}, {IR_PERIOD, ENC, H264|HEVC, - {BITRATE_MODE, ALL_INTRA, META_ROI_INFO, PIX_FMTS}, {0}, msm_vidc_adjust_ir_period, msm_vidc_set_ir_period}, {AU_DELIMITER, ENC, H264|HEVC, - {0}, {0}, NULL, msm_vidc_set_u32}, {BASELAYER_PRIORITY, ENC, H264, - {0}, {0}, NULL, msm_vidc_set_u32}, {TIME_DELTA_BASED_RC, ENC, CODECS_ALL, - {BITRATE_MODE}, {0}, msm_vidc_adjust_delta_based_rc, msm_vidc_set_u32}, {CONTENT_ADAPTIVE_CODING, ENC, H264|HEVC, - {BITRATE_MODE, LAYER_ENABLE, LAYER_TYPE}, {REQUEST_PREPROCESS}, msm_vidc_adjust_brs, msm_vidc_set_vbr_related_properties}, {REQUEST_PREPROCESS, ENC, H264|HEVC, - {CONTENT_ADAPTIVE_CODING, META_EVA_STATS}, {0}, msm_vidc_adjust_preprocess, msm_vidc_set_preprocess}, {BITRATE_BOOST, ENC, H264|HEVC, - {BITRATE_MODE, MIN_QUALITY, BIT_RATE}, {0}, msm_vidc_adjust_bitrate_boost_iris33, msm_vidc_set_vbr_related_properties}, {MIN_QUALITY, ENC, H264, - {BITRATE_MODE, ENH_LAYER_COUNT, META_ROI_INFO}, {BLUR_TYPES}, msm_vidc_adjust_min_quality, msm_vidc_set_u32}, {MIN_QUALITY, ENC, HEVC, - {BITRATE_MODE, PIX_FMTS, ENH_LAYER_COUNT, - META_ROI_INFO}, {BLUR_TYPES}, msm_vidc_adjust_min_quality, msm_vidc_set_u32}, {VBV_DELAY, ENC, H264|HEVC, - {BITRATE_MODE}, {0}, NULL, msm_vidc_set_cbr_related_properties}, {PEAK_BITRATE, ENC, H264|HEVC, - {BITRATE_MODE, BIT_RATE}, {0}, msm_vidc_adjust_peak_bitrate, msm_vidc_set_cbr_related_properties}, {MIN_FRAME_QP, ENC, H264, - {0}, {0}, NULL, msm_vidc_set_min_qp}, - {MIN_FRAME_QP, ENC, HEVC|HEIC, - {PIX_FMTS}, + {MIN_FRAME_QP, ENC, HEVC, {0}, msm_vidc_adjust_hevc_min_qp, msm_vidc_set_min_qp}, {MAX_FRAME_QP, ENC, H264, - {0}, {0}, NULL, msm_vidc_set_max_qp}, - {MAX_FRAME_QP, ENC, HEVC|HEIC, - {PIX_FMTS}, + {MAX_FRAME_QP, ENC, HEVC, {0}, msm_vidc_adjust_hevc_max_qp, msm_vidc_set_max_qp}, {I_FRAME_QP, ENC, HEVC, - {PIX_FMTS, BITRATE_MODE}, {0}, msm_vidc_adjust_hevc_i_frame_qp, msm_vidc_set_frame_qp}, {I_FRAME_QP, ENC, H264, - {BITRATE_MODE}, {0}, NULL, msm_vidc_set_frame_qp}, {P_FRAME_QP, ENC, HEVC, - {PIX_FMTS, BITRATE_MODE}, {0}, msm_vidc_adjust_hevc_p_frame_qp, msm_vidc_set_frame_qp}, {P_FRAME_QP, ENC, H264, - {BITRATE_MODE}, {0}, NULL, msm_vidc_set_frame_qp}, {B_FRAME_QP, ENC, HEVC, - {PIX_FMTS, BITRATE_MODE}, {0}, msm_vidc_adjust_hevc_b_frame_qp, msm_vidc_set_frame_qp}, {B_FRAME_QP, ENC, H264, - {BITRATE_MODE}, {0}, NULL, msm_vidc_set_frame_qp}, - {LAYER_TYPE, ENC, H264, - {0}, + {LAYER_TYPE, ENC, H264|HEVC, {CONTENT_ADAPTIVE_CODING}}, {LAYER_ENABLE, ENC, H264|HEVC, - {0}, {CONTENT_ADAPTIVE_CODING}}, {ENH_LAYER_COUNT, ENC, H264|HEVC, - {BITRATE_MODE, META_EVA_STATS}, {GOP_SIZE, B_FRAME, BIT_RATE, MIN_QUALITY, SLICE_MODE}, msm_vidc_adjust_layer_count, msm_vidc_set_layer_count_and_type}, {ENH_LAYER_COUNT, DEC, AV1, - {0}, {0}, NULL, msm_vidc_set_u32}, {L0_BR, ENC, H264|HEVC, - {0}, {0}, msm_vidc_adjust_dynamic_layer_bitrate, msm_vidc_set_dynamic_layer_bitrate}, {L1_BR, ENC, H264|HEVC, - {0}, {0}, msm_vidc_adjust_dynamic_layer_bitrate, msm_vidc_set_dynamic_layer_bitrate}, {L2_BR, ENC, H264|HEVC, - {0}, {0}, msm_vidc_adjust_dynamic_layer_bitrate, msm_vidc_set_dynamic_layer_bitrate}, {L3_BR, ENC, H264|HEVC, - {0}, {0}, msm_vidc_adjust_dynamic_layer_bitrate, msm_vidc_set_dynamic_layer_bitrate}, {L4_BR, ENC, H264|HEVC, - {0}, {0}, msm_vidc_adjust_dynamic_layer_bitrate, msm_vidc_set_dynamic_layer_bitrate}, {L5_BR, ENC, H264|HEVC, - {0}, {0}, msm_vidc_adjust_dynamic_layer_bitrate, msm_vidc_set_dynamic_layer_bitrate}, {ENTROPY_MODE, ENC, H264, - {PROFILE}, {BIT_RATE}, msm_vidc_adjust_entropy_mode, msm_vidc_set_u32}, {PROFILE, ENC, H264, - {0}, {ENTROPY_MODE, TRANSFORM_8X8}, NULL, msm_vidc_set_u32_enum}, {PROFILE, DEC, H264, - {0}, {ENTROPY_MODE}, NULL, msm_vidc_set_u32_enum}, {PROFILE, ENC|DEC, HEVC|HEIC, - {PIX_FMTS}, {0}, msm_vidc_adjust_profile, msm_vidc_set_u32_enum}, {PROFILE, DEC, VP9|AV1, - {0}, {0}, NULL, msm_vidc_set_u32_enum}, {LEVEL, DEC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_u32_enum}, {LEVEL, ENC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_level}, {AV1_TIER, DEC, AV1, - {0}, {0}, NULL, msm_vidc_set_u32_enum}, {HEVC_TIER, ENC|DEC, HEVC|HEIC, - {0}, {0}, NULL, msm_vidc_set_u32_enum}, {LF_MODE, ENC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_deblock_mode}, {SLICE_MODE, ENC, H264|HEVC, - {BITRATE_MODE, ALL_INTRA, ENH_LAYER_COUNT}, {STAGE, DELIVERY_MODE}, msm_vidc_adjust_slice_count, msm_vidc_set_slice_count}, {SLICE_MODE, ENC, HEIC, - {0}, {0}, msm_vidc_adjust_slice_count, msm_vidc_set_slice_count}, {TRANSFORM_8X8, ENC, H264, - {PROFILE}, {0}, msm_vidc_adjust_transform_8x8, msm_vidc_set_u32}, {CHROMA_QP_INDEX_OFFSET, ENC, HEVC, - {0}, {0}, msm_vidc_adjust_chroma_qp_index_offset, msm_vidc_set_chroma_qp_index_offset}, {DISPLAY_DELAY_ENABLE, DEC, H264|HEVC|VP9|AV1, - {0}, {OUTPUT_ORDER}, NULL, NULL}, {DISPLAY_DELAY, DEC, H264|HEVC|VP9|AV1, - {0}, {OUTPUT_ORDER}, NULL, NULL}, {OUTPUT_ORDER, DEC, H264|HEVC|VP9|AV1, - {THUMBNAIL_MODE, DISPLAY_DELAY, DISPLAY_DELAY_ENABLE}, {META_OUTBUF_FENCE, SLICE_DECODE}, msm_vidc_adjust_output_order, msm_vidc_set_u32}, {INPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL, - {0}, {0}, msm_vidc_adjust_input_buf_host_max_count, msm_vidc_set_u32}, {INPUT_BUF_HOST_MAX_COUNT, ENC, H264|HEVC, - {SUPER_FRAME}, {0}, msm_vidc_adjust_input_buf_host_max_count, msm_vidc_set_u32}, {OUTPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL, - {0}, {0}, msm_vidc_adjust_output_buf_host_max_count, msm_vidc_set_u32}, {OUTPUT_BUF_HOST_MAX_COUNT, ENC, H264|HEVC, - {SUPER_FRAME, DELIVERY_MODE}, {0}, msm_vidc_adjust_output_buf_host_max_count, msm_vidc_set_u32}, {CONCEAL_COLOR_8BIT, DEC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_u32_packed}, {CONCEAL_COLOR_10BIT, DEC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_u32_packed}, {STAGE, ENC | DEC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_stage}, {STAGE, ENC, H264|HEVC, - {LOWLATENCY_MODE, SLICE_MODE}, {0}, NULL, msm_vidc_set_stage}, {STAGE, DEC, H264|HEVC|VP9|AV1, - {LOWLATENCY_MODE}, {0}, NULL, msm_vidc_set_stage}, {PIPE, DEC|ENC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_pipe}, {THUMBNAIL_MODE, DEC, H264|HEVC|VP9|AV1, - {0}, {OUTPUT_ORDER}, NULL, msm_vidc_set_u32}, {THUMBNAIL_MODE, DEC, HEIC, - {0}, {0}, NULL, msm_vidc_set_u32}, {RAP_FRAME, DEC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_u32}, {PRIORITY, DEC|ENC, CODECS_ALL, - {0}, {0}, msm_vidc_adjust_session_priority, msm_vidc_set_session_priority}, {FIRMWARE_PRIORITY_OFFSET, DEC | ENC, CODECS_ALL, - {0}, {0}, NULL, NULL}, {CRITICAL_PRIORITY, ENC, CODECS_ALL, - {0}, {0}, NULL, NULL}, {RESERVE_DURATION, ENC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_reserve_duration}, {DPB_LIST, DEC, CODECS_ALL, - {0}, {0}, NULL, NULL}, {DRAP, DEC, AV1, - {0}, {0}, NULL, msm_vidc_set_u32}, {ALL_INTRA, ENC, H264|HEVC, - {GOP_SIZE, B_FRAME}, {LTR_COUNT, IR_PERIOD, SLICE_MODE, BIT_RATE}, msm_vidc_adjust_all_intra, NULL}, {META_EVA_STATS, ENC, H264|HEVC, - {0}, {ENH_LAYER_COUNT, REQUEST_PREPROCESS}}, {META_EVA_STATS, ENC, HEIC, - {0}, {0}}, {META_ROI_INFO, ENC, H264|HEVC, - {BITRATE_MODE, PIX_FMTS}, - {MIN_QUALITY, IR_PERIOD}, + {MIN_QUALITY, IR_PERIOD, BLUR_TYPES}, msm_vidc_adjust_roi_info, NULL}, {GRID, ENC, HEIC, - {0}, {0}, NULL, msm_vidc_set_u32}, {DELIVERY_MODE, ENC, H264|HEVC, - {SLICE_MODE}, {LOWLATENCY_MODE, OUTPUT_BUF_HOST_MAX_COUNT}, + {LOWLATENCY_MODE, OUTPUT_BUF_HOST_MAX_COUNT}, msm_vidc_adjust_delivery_mode, msm_vidc_set_u32}, {VUI_TIMING_INFO, ENC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_vui_timing_info}, diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 1315de97f1..d7c9cbdb00 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -1533,100 +1533,82 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_waip */ {PIX_FMTS, ENC, H264, - {0}, {META_ROI_INFO, IR_PERIOD}}, {PIX_FMTS, ENC, HEVC, - {0}, {PROFILE, MIN_FRAME_QP, MAX_FRAME_QP, I_FRAME_QP, P_FRAME_QP, B_FRAME_QP, META_ROI_INFO, MIN_QUALITY, BLUR_TYPES, IR_PERIOD}}, {PIX_FMTS, ENC, HEIC, - {0}, {PROFILE}}, {PIX_FMTS, DEC, HEVC|HEIC, - {0}, {PROFILE}}, {FRAME_RATE, ENC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_q16}, {FRAME_RATE, DEC, CODECS_ALL, - {0}, {0}, msm_vidc_adjust_dec_frame_rate}, {OPERATING_RATE, DEC, CODECS_ALL, - {0}, {0}, msm_vidc_adjust_dec_operating_rate}, {SECURE_MODE, ENC|DEC, H264|HEVC|VP9, - {0}, {0}, NULL, msm_vidc_set_u32}, {META_OUTBUF_FENCE, DEC, H264|HEVC|VP9, - {OUTPUT_ORDER}, {LOWLATENCY_MODE}, NULL, NULL}, {HFLIP, ENC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_flip}, {VFLIP, ENC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_flip}, {ROTATION, ENC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_rotation}, {SUPER_FRAME, ENC, H264|HEVC, - {0}, {INPUT_BUF_HOST_MAX_COUNT, OUTPUT_BUF_HOST_MAX_COUNT}, NULL, NULL}, {HEADER_MODE, ENC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_header_mode}, {WITHOUT_STARTCODE, ENC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_nal_length}, {REQUEST_I_FRAME, ENC, H264|HEVC, - {0}, {0}, NULL, msm_vidc_set_req_sync_frame}, {BIT_RATE, ENC, H264|HEVC, - {ENH_LAYER_COUNT, BITRATE_MODE}, {PEAK_BITRATE}, msm_vidc_adjust_bitrate, msm_vidc_set_bitrate}, {BITRATE_MODE, ENC, H264, - {0}, {LTR_COUNT, IR_PERIOD, TIME_DELTA_BASED_RC, I_FRAME_QP, P_FRAME_QP, B_FRAME_QP, ENH_LAYER_COUNT, BIT_RATE, META_ROI_INFO, MIN_QUALITY, BITRATE_BOOST, VBV_DELAY, @@ -1636,7 +1618,6 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_waip msm_vidc_set_u32_enum}, {BITRATE_MODE, ENC, HEVC, - {0}, {LTR_COUNT, IR_PERIOD, TIME_DELTA_BASED_RC, I_FRAME_QP, P_FRAME_QP, B_FRAME_QP, CONSTANT_QUALITY, ENH_LAYER_COUNT, BIT_RATE, META_ROI_INFO, MIN_QUALITY, BITRATE_BOOST, VBV_DELAY, @@ -1646,493 +1627,408 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_waip msm_vidc_set_u32_enum}, {BITRATE_MODE, ENC, HEIC, - {0}, {TIME_DELTA_BASED_RC, CONSTANT_QUALITY}, msm_vidc_adjust_bitrate_mode, msm_vidc_set_u32_enum}, {CONSTANT_QUALITY, ENC, HEVC|HEIC, - {BITRATE_MODE}, {0}, NULL, msm_vidc_set_constant_quality}, {GOP_SIZE, ENC, CODECS_ALL, - {ENH_LAYER_COUNT}, {ALL_INTRA}, msm_vidc_adjust_gop_size, msm_vidc_set_gop_size}, {GOP_SIZE, ENC, HEIC, - {0}, {0}, NULL, msm_vidc_set_u32}, {B_FRAME, ENC, H264|HEVC, - {ENH_LAYER_COUNT}, {ALL_INTRA}, msm_vidc_adjust_b_frame, msm_vidc_set_u32}, {B_FRAME, ENC, HEIC, - {0}, {0}, NULL, msm_vidc_set_u32}, {BLUR_TYPES, ENC, H264|HEVC, - {PIX_FMTS, BITRATE_MODE, MIN_QUALITY, - CONTENT_ADAPTIVE_CODING, META_ROI_INFO}, {BLUR_RESOLUTION}, msm_vidc_adjust_blur_type_iris2, msm_vidc_set_u32_enum}, {BLUR_RESOLUTION, ENC, H264|HEVC, - {BLUR_TYPES}, {0}, msm_vidc_adjust_blur_resolution, msm_vidc_set_blur_resolution}, {CSC_CUSTOM_MATRIX, ENC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_csc_custom_matrix}, {LOWLATENCY_MODE, ENC, H264 | HEVC, - {BITRATE_MODE}, {STAGE}, msm_vidc_adjust_enc_lowlatency_mode, NULL}, {LOWLATENCY_MODE, DEC, H264|HEVC|VP9, - {META_OUTBUF_FENCE}, {STAGE}, msm_vidc_adjust_dec_lowlatency_mode, NULL}, {LTR_COUNT, ENC, H264|HEVC, - {BITRATE_MODE, ALL_INTRA}, {0}, msm_vidc_adjust_ltr_count, msm_vidc_set_u32}, {USE_LTR, ENC, H264|HEVC, - {0}, {0}, msm_vidc_adjust_use_ltr, msm_vidc_set_use_and_mark_ltr}, {MARK_LTR, ENC, H264|HEVC, - {0}, {0}, msm_vidc_adjust_mark_ltr, msm_vidc_set_use_and_mark_ltr}, {IR_PERIOD, ENC, H264|HEVC, - {BITRATE_MODE, ALL_INTRA, META_ROI_INFO, PIX_FMTS}, {0}, msm_vidc_adjust_ir_period, msm_vidc_set_ir_period}, {AU_DELIMITER, ENC, H264|HEVC, - {0}, {0}, NULL, msm_vidc_set_u32}, {TIME_DELTA_BASED_RC, ENC, CODECS_ALL, - {BITRATE_MODE}, {0}, msm_vidc_adjust_delta_based_rc, msm_vidc_set_u32}, {CONTENT_ADAPTIVE_CODING, ENC, H264|HEVC, - {BITRATE_MODE, LAYER_ENABLE, LAYER_TYPE}, {REQUEST_PREPROCESS}, msm_vidc_adjust_brs, msm_vidc_set_vbr_related_properties}, {REQUEST_PREPROCESS, ENC, H264|HEVC, - {CONTENT_ADAPTIVE_CODING, META_EVA_STATS}, {0}, msm_vidc_adjust_preprocess, NULL}, {BITRATE_BOOST, ENC, H264|HEVC, - {BITRATE_MODE, MIN_QUALITY}, {0}, msm_vidc_adjust_bitrate_boost, msm_vidc_set_vbr_related_properties}, {MIN_QUALITY, ENC, H264, - {BITRATE_MODE, ENH_LAYER_COUNT, META_ROI_INFO}, {BLUR_TYPES}, msm_vidc_adjust_min_quality, msm_vidc_set_vbr_related_properties}, {MIN_QUALITY, ENC, HEVC, - {BITRATE_MODE, PIX_FMTS, ENH_LAYER_COUNT, - META_ROI_INFO}, {BLUR_TYPES}, msm_vidc_adjust_min_quality, msm_vidc_set_vbr_related_properties}, {VBV_DELAY, ENC, H264|HEVC, - {BITRATE_MODE}, {0}, NULL, msm_vidc_set_cbr_related_properties}, {PEAK_BITRATE, ENC, H264|HEVC, - {BITRATE_MODE, BIT_RATE}, {0}, msm_vidc_adjust_peak_bitrate, msm_vidc_set_cbr_related_properties}, {MIN_FRAME_QP, ENC, H264, - {0}, {0}, NULL, msm_vidc_set_min_qp}, - {MIN_FRAME_QP, ENC, HEVC|HEIC, - {PIX_FMTS}, + {MIN_FRAME_QP, ENC, HEVC, {0}, msm_vidc_adjust_hevc_min_qp, msm_vidc_set_min_qp}, {MAX_FRAME_QP, ENC, H264, - {0}, {0}, NULL, msm_vidc_set_max_qp}, - {MAX_FRAME_QP, ENC, HEVC|HEIC, - {PIX_FMTS}, + {MAX_FRAME_QP, ENC, HEVC, {0}, msm_vidc_adjust_hevc_max_qp, msm_vidc_set_max_qp}, {I_FRAME_QP, ENC, HEVC, - {PIX_FMTS, BITRATE_MODE}, {0}, msm_vidc_adjust_hevc_i_frame_qp, msm_vidc_set_frame_qp}, {I_FRAME_QP, ENC, H264, - {BITRATE_MODE}, {0}, NULL, msm_vidc_set_frame_qp}, {P_FRAME_QP, ENC, HEVC, - {PIX_FMTS, BITRATE_MODE}, {0}, msm_vidc_adjust_hevc_p_frame_qp, msm_vidc_set_frame_qp}, {P_FRAME_QP, ENC, H264, - {BITRATE_MODE}, {0}, NULL, msm_vidc_set_frame_qp}, {B_FRAME_QP, ENC, HEVC, - {PIX_FMTS, BITRATE_MODE}, {0}, msm_vidc_adjust_hevc_b_frame_qp, msm_vidc_set_frame_qp}, {B_FRAME_QP, ENC, H264, - {BITRATE_MODE}, {0}, NULL, msm_vidc_set_frame_qp}, {LAYER_TYPE, ENC, H264|HEVC, - {0}, {CONTENT_ADAPTIVE_CODING}}, {LAYER_ENABLE, ENC, H264|HEVC, - {0}, {CONTENT_ADAPTIVE_CODING}}, {ENH_LAYER_COUNT, ENC, H264|HEVC, - {BITRATE_MODE, META_EVA_STATS}, {GOP_SIZE, B_FRAME, BIT_RATE, MIN_QUALITY, SLICE_MODE}, msm_vidc_adjust_layer_count, msm_vidc_set_layer_count_and_type}, {L0_BR, ENC, H264|HEVC, - {0}, {0}, msm_vidc_adjust_dynamic_layer_bitrate, msm_vidc_set_dynamic_layer_bitrate}, {L1_BR, ENC, H264|HEVC, - {0}, {0}, msm_vidc_adjust_dynamic_layer_bitrate, msm_vidc_set_dynamic_layer_bitrate}, {L2_BR, ENC, H264|HEVC, - {0}, {0}, msm_vidc_adjust_dynamic_layer_bitrate, msm_vidc_set_dynamic_layer_bitrate}, {L3_BR, ENC, H264|HEVC, - {0}, {0}, msm_vidc_adjust_dynamic_layer_bitrate, msm_vidc_set_dynamic_layer_bitrate}, {L4_BR, ENC, H264|HEVC, - {0}, {0}, msm_vidc_adjust_dynamic_layer_bitrate, msm_vidc_set_dynamic_layer_bitrate}, {L5_BR, ENC, H264|HEVC, - {0}, {0}, msm_vidc_adjust_dynamic_layer_bitrate, msm_vidc_set_dynamic_layer_bitrate}, {ENTROPY_MODE, ENC, H264, - {PROFILE}, {0}, msm_vidc_adjust_entropy_mode, msm_vidc_set_u32}, {PROFILE, ENC, H264, - {0}, {ENTROPY_MODE, TRANSFORM_8X8}, NULL, msm_vidc_set_u32_enum}, {PROFILE, DEC, H264, - {0}, {ENTROPY_MODE}, NULL, msm_vidc_set_u32_enum}, {PROFILE, ENC|DEC, HEVC|HEIC, - {PIX_FMTS}, {0}, msm_vidc_adjust_profile, msm_vidc_set_u32_enum}, {PROFILE, DEC, VP9, - {0}, {0}, NULL, msm_vidc_set_u32_enum}, {LEVEL, DEC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_u32_enum}, {LEVEL, ENC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_level}, {HEVC_TIER, ENC|DEC, HEVC|HEIC, - {0}, {0}, NULL, msm_vidc_set_u32_enum}, {LF_MODE, ENC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_deblock_mode}, {SLICE_MODE, ENC, H264|HEVC, - {BITRATE_MODE, ALL_INTRA, ENH_LAYER_COUNT}, {STAGE}, msm_vidc_adjust_slice_count, msm_vidc_set_slice_count}, {SLICE_MODE, ENC, HEIC, - {0}, {0}, msm_vidc_adjust_slice_count, msm_vidc_set_slice_count}, {TRANSFORM_8X8, ENC, H264, - {PROFILE}, {0}, msm_vidc_adjust_transform_8x8, msm_vidc_set_u32}, {CHROMA_QP_INDEX_OFFSET, ENC, HEVC, - {0}, {0}, msm_vidc_adjust_chroma_qp_index_offset, msm_vidc_set_chroma_qp_index_offset}, {DISPLAY_DELAY_ENABLE, DEC, H264|HEVC|VP9, - {0}, {OUTPUT_ORDER}, NULL, NULL}, {DISPLAY_DELAY, DEC, H264|HEVC|VP9, - {0}, {OUTPUT_ORDER}, NULL, NULL}, {OUTPUT_ORDER, DEC, H264|HEVC|VP9, - {THUMBNAIL_MODE, DISPLAY_DELAY, DISPLAY_DELAY_ENABLE}, {META_OUTBUF_FENCE}, msm_vidc_adjust_output_order, msm_vidc_set_u32}, {INPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL, - {0}, {0}, msm_vidc_adjust_input_buf_host_max_count, msm_vidc_set_u32}, {INPUT_BUF_HOST_MAX_COUNT, ENC, H264|HEVC, - {SUPER_FRAME}, {0}, msm_vidc_adjust_input_buf_host_max_count, msm_vidc_set_u32}, {OUTPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL, - {0}, {0}, msm_vidc_adjust_output_buf_host_max_count, msm_vidc_set_u32}, {OUTPUT_BUF_HOST_MAX_COUNT, ENC, H264|HEVC, - {SUPER_FRAME}, {0}, msm_vidc_adjust_output_buf_host_max_count, msm_vidc_set_u32}, {CONCEAL_COLOR_8BIT, DEC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_u32_packed}, {CONCEAL_COLOR_10BIT, DEC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_u32_packed}, {STAGE, ENC|DEC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_stage}, {STAGE, ENC, H264|HEVC, - {LOWLATENCY_MODE, SLICE_MODE}, {0}, NULL, msm_vidc_set_stage}, {STAGE, DEC, H264|HEVC|VP9, - {LOWLATENCY_MODE}, {0}, NULL, msm_vidc_set_stage}, {PIPE, DEC|ENC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_pipe}, {THUMBNAIL_MODE, DEC, H264|HEVC|VP9|AV1, - {0}, {OUTPUT_ORDER}, NULL, msm_vidc_set_u32}, {THUMBNAIL_MODE, DEC, HEIC, - {0}, {0}, NULL, msm_vidc_set_u32}, {RAP_FRAME, DEC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_u32}, {PRIORITY, DEC|ENC, CODECS_ALL, - {0}, {0}, msm_vidc_adjust_session_priority, msm_vidc_set_session_priority}, {FIRMWARE_PRIORITY_OFFSET, DEC | ENC, CODECS_ALL, - {0}, {0}, NULL, NULL}, {CRITICAL_PRIORITY, ENC, CODECS_ALL, - {0}, {0}, NULL, NULL}, {RESERVE_DURATION, ENC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_reserve_duration}, {DPB_LIST, DEC, CODECS_ALL, - {0}, {0}, NULL, NULL}, {ALL_INTRA, ENC, H264|HEVC, - {GOP_SIZE, B_FRAME}, {LTR_COUNT, IR_PERIOD, SLICE_MODE}, msm_vidc_adjust_all_intra, NULL}, {META_EVA_STATS, ENC, H264|HEVC, - {0}, {ENH_LAYER_COUNT, REQUEST_PREPROCESS}}, {META_EVA_STATS, ENC, HEIC, - {0}, {0}}, {META_ROI_INFO, ENC, H264|HEVC, - {BITRATE_MODE, PIX_FMTS}, - {MIN_QUALITY, IR_PERIOD}, + {MIN_QUALITY, IR_PERIOD, BLUR_TYPES}, msm_vidc_adjust_roi_info, NULL}, {META_ROI_INFO, ENC, HEIC, - {BITRATE_MODE, PIX_FMTS}, {0}, msm_vidc_adjust_roi_info, NULL}, {GRID, ENC, HEIC, - {0}, {0}, NULL, msm_vidc_set_u32}, diff --git a/driver/variant/iris2/src/msm_vidc_iris2.c b/driver/variant/iris2/src/msm_vidc_iris2.c index 133d8657b5..efe801b151 100644 --- a/driver/variant/iris2/src/msm_vidc_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_iris2.c @@ -9,7 +9,7 @@ #include "msm_vidc_inst.h" #include "msm_vidc_core.h" #include "msm_vidc_driver.h" -#include "msm_vidc_plaform.h" +#include "msm_vidc_platform.h" #include "msm_vidc_internal.h" #include "msm_vidc_buffer.h" #include "msm_vidc_debug.h" diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 800e91c7bf..0e250c7a06 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -612,7 +612,6 @@ struct msm_vidc_inst_cap { u32 v4l2_id; u32 hfi_id; enum msm_vidc_inst_capability_flags flags; - enum msm_vidc_inst_capability_type parents[MAX_CAP_PARENTS]; enum msm_vidc_inst_capability_type children[MAX_CAP_CHILDREN]; int (*adjust)(void *inst, struct v4l2_ctrl *ctrl); diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index b6beae1710..def57702a8 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -4568,8 +4568,6 @@ static void update_inst_cap_dependency( } capability->cap[in->cap_id].cap_id = in->cap_id; - memcpy(capability->cap[in->cap_id].parents, in->parents, - sizeof(capability->cap[in->cap_id].parents)); memcpy(capability->cap[in->cap_id].children, in->children, sizeof(capability->cap[in->cap_id].children)); capability->cap[in->cap_id].adjust = in->adjust; From da842a9f2f5ba76dc724eb45179b9fbc3b934abf Mon Sep 17 00:00:00 2001 From: Ankush Mitra Date: Fri, 9 Dec 2022 14:10:31 +0530 Subject: [PATCH 0776/1061] video: driver: Prepare dependency list without parent Resolve upstream compilation issue. Change-Id: Id0b08d0fc66291a415c966c90b804f9017790ef8 Signed-off-by: Ankush Mitra --- driver/platform/kalama/src/kalama.c | 82 ----------------------------- 1 file changed, 82 deletions(-) diff --git a/driver/platform/kalama/src/kalama.c b/driver/platform/kalama/src/kalama.c index 5637136062..b51ba1978c 100644 --- a/driver/platform/kalama/src/kalama.c +++ b/driver/platform/kalama/src/kalama.c @@ -1225,87 +1225,71 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kalama[] = { /* {cap, domain, codec, - * parents, * children, * adjust, set} */ {PIX_FMTS, ENC, H264, - {0}, {0}}, {PIX_FMTS, ENC, HEVC, - {0}, {PROFILE, MIN_FRAME_QP, MAX_FRAME_QP, I_FRAME_QP, P_FRAME_QP, B_FRAME_QP, MIN_QUALITY, BLUR_TYPES}}, {PIX_FMTS, DEC, HEVC, - {0}, {PROFILE}}, {FRAME_RATE, ENC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_q16}, {HFLIP, ENC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_flip}, {VFLIP, ENC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_flip}, {ROTATION, ENC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_rotation}, {SUPER_FRAME, ENC, H264|HEVC, - {0}, {INPUT_BUF_HOST_MAX_COUNT, OUTPUT_BUF_HOST_MAX_COUNT}, NULL, NULL}, {HEADER_MODE, ENC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_header_mode}, {WITHOUT_STARTCODE, ENC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_nal_length}, {REQUEST_I_FRAME, ENC, H264|HEVC, - {0}, {0}, NULL, msm_vidc_set_req_sync_frame}, {BIT_RATE, ENC, H264, - {ENH_LAYER_COUNT, BITRATE_MODE, ENTROPY_MODE, - ALL_INTRA, LOWLATENCY_MODE}, {PEAK_BITRATE}, msm_vidc_adjust_bitrate, msm_vidc_set_bitrate}, {BIT_RATE, ENC, HEVC, - {ENH_LAYER_COUNT, BITRATE_MODE, ALL_INTRA, LOWLATENCY_MODE}, {PEAK_BITRATE}, msm_vidc_adjust_bitrate, msm_vidc_set_bitrate}, {BITRATE_MODE, ENC, H264, - {0}, {LTR_COUNT, I_FRAME_QP, P_FRAME_QP, B_FRAME_QP, ENH_LAYER_COUNT, BIT_RATE, MIN_QUALITY, VBV_DELAY, @@ -1315,7 +1299,6 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kala msm_vidc_set_u32_enum}, {BITRATE_MODE, ENC, HEVC, - {0}, {LTR_COUNT, I_FRAME_QP, P_FRAME_QP, B_FRAME_QP, CONSTANT_QUALITY, ENH_LAYER_COUNT, BIT_RATE, MIN_QUALITY, VBV_DELAY, @@ -1325,387 +1308,322 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kala msm_vidc_set_u32_enum}, {CONSTANT_QUALITY, ENC, HEVC, - {BITRATE_MODE}, {0}, NULL, msm_vidc_set_constant_quality}, {GOP_SIZE, ENC, CODECS_ALL, - {ENH_LAYER_COUNT}, {ALL_INTRA}, msm_vidc_adjust_gop_size, msm_vidc_set_gop_size}, {B_FRAME, ENC, H264|HEVC, - {ENH_LAYER_COUNT}, {ALL_INTRA}, msm_vidc_adjust_b_frame, msm_vidc_set_u32}, {BLUR_TYPES, ENC, H264|HEVC, - {PIX_FMTS, BITRATE_MODE, MIN_QUALITY}, {0}, msm_vidc_adjust_blur_type, msm_vidc_set_u32_enum}, {LOWLATENCY_MODE, ENC, H264 | HEVC, - {BITRATE_MODE, DELIVERY_MODE}, {STAGE, BIT_RATE}, msm_vidc_adjust_enc_lowlatency_mode, NULL}, {LOWLATENCY_MODE, DEC, H264|HEVC|VP9, - {0}, {STAGE}, msm_vidc_adjust_dec_lowlatency_mode, NULL}, {LTR_COUNT, ENC, H264|HEVC, - {BITRATE_MODE, ALL_INTRA}, {0}, msm_vidc_adjust_ltr_count, msm_vidc_set_u32}, {USE_LTR, ENC, H264|HEVC, - {0}, {0}, msm_vidc_adjust_use_ltr, msm_vidc_set_use_and_mark_ltr}, {MARK_LTR, ENC, H264|HEVC, - {0}, {0}, msm_vidc_adjust_mark_ltr, msm_vidc_set_use_and_mark_ltr}, {AU_DELIMITER, ENC, H264|HEVC, - {0}, {0}, NULL, msm_vidc_set_u32}, {CONTENT_ADAPTIVE_CODING, ENC, H264|HEVC, - {BITRATE_MODE, LAYER_ENABLE, LAYER_TYPE}, {REQUEST_PREPROCESS}, msm_vidc_adjust_brs, msm_vidc_set_vbr_related_properties}, {REQUEST_PREPROCESS, ENC, H264|HEVC, - {CONTENT_ADAPTIVE_CODING}, {0}, msm_vidc_adjust_preprocess, msm_vidc_set_preprocess}, {MIN_QUALITY, ENC, H264, - {BITRATE_MODE, ENH_LAYER_COUNT}, {BLUR_TYPES}, msm_vidc_adjust_min_quality, msm_vidc_set_u32}, {MIN_QUALITY, ENC, HEVC, - {BITRATE_MODE, PIX_FMTS, ENH_LAYER_COUNT}, {BLUR_TYPES}, msm_vidc_adjust_min_quality, msm_vidc_set_u32}, {VBV_DELAY, ENC, H264|HEVC, - {BITRATE_MODE}, {0}, NULL, msm_vidc_set_cbr_related_properties}, {PEAK_BITRATE, ENC, H264|HEVC, - {BITRATE_MODE, BIT_RATE}, {0}, msm_vidc_adjust_peak_bitrate, msm_vidc_set_cbr_related_properties}, {MIN_FRAME_QP, ENC, H264, - {0}, {0}, NULL, msm_vidc_set_min_qp}, {MIN_FRAME_QP, ENC, HEVC, - {PIX_FMTS}, {0}, msm_vidc_adjust_hevc_min_qp, msm_vidc_set_min_qp}, {MAX_FRAME_QP, ENC, H264, - {0}, {0}, NULL, msm_vidc_set_max_qp}, {MAX_FRAME_QP, ENC, HEVC, - {PIX_FMTS}, {0}, msm_vidc_adjust_hevc_max_qp, msm_vidc_set_max_qp}, {I_FRAME_QP, ENC, HEVC, - {PIX_FMTS, BITRATE_MODE}, {0}, msm_vidc_adjust_hevc_i_frame_qp, msm_vidc_set_frame_qp}, {I_FRAME_QP, ENC, H264, - {BITRATE_MODE}, {0}, NULL, msm_vidc_set_frame_qp}, {P_FRAME_QP, ENC, HEVC, - {PIX_FMTS, BITRATE_MODE}, {0}, msm_vidc_adjust_hevc_p_frame_qp, msm_vidc_set_frame_qp}, {P_FRAME_QP, ENC, H264, - {BITRATE_MODE}, {0}, NULL, msm_vidc_set_frame_qp}, {B_FRAME_QP, ENC, HEVC, - {PIX_FMTS, BITRATE_MODE}, {0}, msm_vidc_adjust_hevc_b_frame_qp, msm_vidc_set_frame_qp}, {B_FRAME_QP, ENC, H264, - {BITRATE_MODE}, {0}, NULL, msm_vidc_set_frame_qp}, {LAYER_TYPE, ENC, H264, - {0}, {CONTENT_ADAPTIVE_CODING}}, {LAYER_ENABLE, ENC, H264|HEVC, - {0}, {CONTENT_ADAPTIVE_CODING}}, {ENH_LAYER_COUNT, ENC, H264|HEVC, - {BITRATE_MODE}, {GOP_SIZE, B_FRAME, BIT_RATE, MIN_QUALITY}, msm_vidc_adjust_layer_count, msm_vidc_set_layer_count_and_type}, {L0_BR, ENC, H264|HEVC, - {0}, {0}, msm_vidc_adjust_dynamic_layer_bitrate, msm_vidc_set_dynamic_layer_bitrate}, {L1_BR, ENC, H264|HEVC, - {0}, {0}, msm_vidc_adjust_dynamic_layer_bitrate, msm_vidc_set_dynamic_layer_bitrate}, {L2_BR, ENC, H264|HEVC, - {0}, {0}, msm_vidc_adjust_dynamic_layer_bitrate, msm_vidc_set_dynamic_layer_bitrate}, {L3_BR, ENC, H264|HEVC, - {0}, {0}, msm_vidc_adjust_dynamic_layer_bitrate, msm_vidc_set_dynamic_layer_bitrate}, {L4_BR, ENC, H264|HEVC, - {0}, {0}, msm_vidc_adjust_dynamic_layer_bitrate, msm_vidc_set_dynamic_layer_bitrate}, {L5_BR, ENC, H264|HEVC, - {0}, {0}, msm_vidc_adjust_dynamic_layer_bitrate, msm_vidc_set_dynamic_layer_bitrate}, {ENTROPY_MODE, ENC, H264, - {PROFILE}, {BIT_RATE}, msm_vidc_adjust_entropy_mode, msm_vidc_set_u32}, {PROFILE, ENC, H264, - {0}, {ENTROPY_MODE, TRANSFORM_8X8}, NULL, msm_vidc_set_u32_enum}, {PROFILE, DEC, H264, - {0}, {ENTROPY_MODE}, NULL, msm_vidc_set_u32_enum}, {PROFILE, ENC|DEC, HEVC, - {PIX_FMTS}, {0}, msm_vidc_adjust_profile, msm_vidc_set_u32_enum}, {PROFILE, DEC, VP9, - {0}, {0}, NULL, msm_vidc_set_u32_enum}, {LEVEL, DEC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_u32_enum}, {LEVEL, ENC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_level}, {HEVC_TIER, ENC|DEC, HEVC, - {0}, {0}, NULL, msm_vidc_set_u32_enum}, {LF_MODE, ENC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_deblock_mode}, {SLICE_MODE, ENC, H264|HEVC, - {BITRATE_MODE, ALL_INTRA}, {STAGE, DELIVERY_MODE}, msm_vidc_adjust_slice_count, msm_vidc_set_slice_count}, {TRANSFORM_8X8, ENC, H264, - {PROFILE}, {0}, msm_vidc_adjust_transform_8x8, msm_vidc_set_u32}, {CHROMA_QP_INDEX_OFFSET, ENC, HEVC, - {0}, {0}, msm_vidc_adjust_chroma_qp_index_offset, msm_vidc_set_chroma_qp_index_offset}, {DISPLAY_DELAY_ENABLE, DEC, H264|HEVC|VP9, - {0}, {OUTPUT_ORDER}, NULL, NULL}, {DISPLAY_DELAY, DEC, H264|HEVC|VP9, - {0}, {OUTPUT_ORDER}, NULL, NULL}, {OUTPUT_ORDER, DEC, H264|HEVC|VP9, - {THUMBNAIL_MODE, DISPLAY_DELAY, DISPLAY_DELAY_ENABLE}, {0}, msm_vidc_adjust_output_order, msm_vidc_set_u32}, {INPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL, - {0}, {0}, msm_vidc_adjust_input_buf_host_max_count, msm_vidc_set_u32}, {INPUT_BUF_HOST_MAX_COUNT, ENC, H264|HEVC, - {SUPER_FRAME}, {0}, msm_vidc_adjust_input_buf_host_max_count, msm_vidc_set_u32}, {OUTPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL, - {0}, {0}, msm_vidc_adjust_output_buf_host_max_count, msm_vidc_set_u32}, {OUTPUT_BUF_HOST_MAX_COUNT, ENC, H264|HEVC, - {SUPER_FRAME, DELIVERY_MODE}, {0}, msm_vidc_adjust_output_buf_host_max_count, msm_vidc_set_u32}, {CONCEAL_COLOR_8BIT, DEC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_u32_packed}, {CONCEAL_COLOR_10BIT, DEC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_u32_packed}, {STAGE, ENC | DEC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_stage}, {STAGE, ENC, H264|HEVC, - {LOWLATENCY_MODE, SLICE_MODE}, {0}, NULL, msm_vidc_set_stage}, {STAGE, DEC, H264|HEVC|VP9, - {LOWLATENCY_MODE}, {0}, NULL, msm_vidc_set_stage}, {PIPE, DEC|ENC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_pipe}, {THUMBNAIL_MODE, DEC, CODECS_ALL, - {0}, {OUTPUT_ORDER}, NULL, msm_vidc_set_u32}, {RAP_FRAME, DEC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_u32}, {FIRMWARE_PRIORITY_OFFSET, DEC | ENC, CODECS_ALL, - {0}, {0}, NULL, NULL}, {DPB_LIST, DEC, CODECS_ALL, - {0}, {0}, NULL, NULL}, {ALL_INTRA, ENC, H264|HEVC, - {GOP_SIZE, B_FRAME}, {LTR_COUNT, SLICE_MODE, BIT_RATE}, msm_vidc_adjust_all_intra, NULL}, From b3f107df87bb4c71dccfff58289fbe0937c21b24 Mon Sep 17 00:00:00 2001 From: Vedang Nagar Date: Thu, 3 Nov 2022 21:20:48 +0530 Subject: [PATCH 0777/1061] video: driver: Modify buffer_stats logic For super buffer usecase, All the ETB's gets queued with updated timestamp in hfi_buffer, therefore all the fbd's being recieved are of different timestamp. And only the last EBD is considered for dequeued flag and hence for remove_buffer_stat. Therefore when first FBD arrives which has the matched TS to the stat's TS will get skipped since last EBD in the batch has not arrived yet and rest all FBDs are with updated TS, hence the buffer stat doesn't get's removed from the list. Modified the logic to add stats during hfi_buffer queue and add stats for all sub-frames in super buffer usecase. Modified the logic for Multi-In single-Out usecase as well. Change-Id: I0643e6f64bdfc3cbfa67baeb1cf9157de92ce569 Signed-off-by: Vedang Nagar --- driver/vidc/inc/msm_vidc_driver.h | 4 +- driver/vidc/inc/msm_vidc_internal.h | 8 ++- driver/vidc/src/msm_vidc_driver.c | 88 +++++++++++++++++----------- driver/vidc/src/venus_hfi.c | 14 +++-- driver/vidc/src/venus_hfi_response.c | 8 ++- 5 files changed, 77 insertions(+), 45 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 83c2bcdc1b..c32bdf8781 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -599,9 +599,9 @@ int signal_session_msg_receipt(struct msm_vidc_inst *inst, int msm_vidc_get_properties(struct msm_vidc_inst *inst); int msm_vidc_update_input_rate(struct msm_vidc_inst *inst, u64 time_us); int msm_vidc_add_buffer_stats(struct msm_vidc_inst *inst, - struct msm_vidc_buffer *buf); + struct msm_vidc_buffer *buf, u64 timestamp); int msm_vidc_remove_buffer_stats(struct msm_vidc_inst *inst, - struct msm_vidc_buffer *buf); + struct msm_vidc_buffer *buf, u64 timestamp); int msm_vidc_flush_buffer_stats(struct msm_vidc_inst *inst); int msm_vidc_get_input_rate(struct msm_vidc_inst *inst); int msm_vidc_get_frame_rate(struct msm_vidc_inst *inst); diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 2c8182161d..9cf95f7cf9 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -917,12 +917,14 @@ struct msm_vidc_buffer_stats { u32 fbd_time_ms; u32 data_size; u32 flags; + u32 ts_offset; }; enum msm_vidc_buffer_stats_flag { - MSM_VIDC_STATS_FLAG_CORRUPT = BIT(0), - MSM_VIDC_STATS_FLAG_OVERFLOW = BIT(1), - MSM_VIDC_STATS_FLAG_NO_OUTPUT = BIT(2), + MSM_VIDC_STATS_FLAG_CORRUPT = BIT(0), + MSM_VIDC_STATS_FLAG_OVERFLOW = BIT(1), + MSM_VIDC_STATS_FLAG_NO_OUTPUT = BIT(2), + MSM_VIDC_STATS_FLAG_SUBFRAME_INPUT = BIT(3), }; struct msm_vidc_sort { diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index b6beae1710..7b39b619d9 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -318,6 +318,9 @@ static u32 msm_vidc_get_buffer_stats_flag(struct msm_vidc_inst *inst) if (inst->hfi_frame_info.no_output) flags |= MSM_VIDC_STATS_FLAG_NO_OUTPUT; + if (inst->hfi_frame_info.subframe_input) + flags |= MSM_VIDC_STATS_FLAG_SUBFRAME_INPUT; + return flags; } @@ -359,7 +362,7 @@ static int msm_vidc_try_suspend(struct msm_vidc_inst *inst) } int msm_vidc_add_buffer_stats(struct msm_vidc_inst *inst, - struct msm_vidc_buffer *buf) + struct msm_vidc_buffer *buf, u64 timestamp) { struct msm_vidc_buffer_stats *stats = NULL; struct msm_vidc_core *core; @@ -370,6 +373,9 @@ int msm_vidc_add_buffer_stats(struct msm_vidc_inst *inst, } core = inst->core; + if (!(msm_vidc_debug & VIDC_STAT)) + return 0; + /* stats applicable only to input & output buffers */ if (buf->type != MSM_VIDC_BUF_INPUT && buf->type != MSM_VIDC_BUF_OUTPUT) return -EINVAL; @@ -388,7 +394,8 @@ int msm_vidc_add_buffer_stats(struct msm_vidc_inst *inst, list_add_tail(&stats->list, &inst->buffer_stats_list); stats->frame_num = inst->debug_count.etb; - stats->timestamp = buf->timestamp; + stats->timestamp = timestamp; + stats->ts_offset = 0; stats->etb_time_ms = buf->start_time_ms; if (is_decode_session(inst)) stats->data_size = buf->data_size; @@ -397,10 +404,12 @@ int msm_vidc_add_buffer_stats(struct msm_vidc_inst *inst, } int msm_vidc_remove_buffer_stats(struct msm_vidc_inst *inst, - struct msm_vidc_buffer *buf) + struct msm_vidc_buffer *buf, u64 timestamp) { struct msm_vidc_buffer_stats *stats = NULL, *dummy_stats = NULL; + struct msm_vidc_buffer_stats *prev_stats = NULL; struct msm_vidc_core *core; + bool remove_stat = false, is_first_stat = false;; if (!inst || !inst->core || !buf) { d_vpr_e("%s: invalid params\n", __func__); @@ -408,6 +417,9 @@ int msm_vidc_remove_buffer_stats(struct msm_vidc_inst *inst, } core = inst->core; + if (!(msm_vidc_debug & VIDC_STAT)) + return 0; + /* stats applicable only to input & output buffers */ if (buf->type != MSM_VIDC_BUF_INPUT && buf->type != MSM_VIDC_BUF_OUTPUT) return -EINVAL; @@ -416,38 +428,51 @@ int msm_vidc_remove_buffer_stats(struct msm_vidc_inst *inst, buf->end_time_ms = (ktime_get_ns() / 1000 - inst->initial_time_us) / 1000; list_for_each_entry_safe(stats, dummy_stats, &inst->buffer_stats_list, list) { - if (stats->timestamp == buf->timestamp) { - if (buf->type == MSM_VIDC_BUF_INPUT) { - /* skip - already updated(multiple input - single output case) */ - if (stats->ebd_time_ms) - continue; + if (stats->timestamp - stats->ts_offset != timestamp) + continue; - /* ebd: update end ts and return */ - stats->ebd_time_ms = buf->end_time_ms; - stats->flags |= msm_vidc_get_buffer_stats_flag(inst); + remove_stat = false; + if (buf->type == MSM_VIDC_BUF_INPUT) { + /* skip - ebd already updated(multiple input - single output case) */ + if (stats->ebd_time_ms) + continue; - /* remove entry - no output attached */ - if (stats->flags & MSM_VIDC_STATS_FLAG_NO_OUTPUT) { - list_del_init(&stats->list); - msm_vidc_pool_free(inst, stats); - } - } else if (buf->type == MSM_VIDC_BUF_OUTPUT) { - /* skip - ebd not arrived(single input - multiple output case) */ - if (!stats->ebd_time_ms) - continue; + /* ebd: update end ts and return */ + stats->ebd_time_ms = buf->end_time_ms; + stats->flags |= msm_vidc_get_buffer_stats_flag(inst); - /* fbd: update end ts and remove entry */ - list_del_init(&stats->list); - stats->ftb_time_ms = buf->start_time_ms; - stats->fbd_time_ms = buf->end_time_ms; - stats->flags |= msm_vidc_get_buffer_stats_flag(inst); - if (is_encode_session(inst)) - stats->data_size = buf->data_size; + /* multi in - single out (interlace/slice decoding case) */ + is_first_stat = list_is_first(&stats->list, &inst->buffer_stats_list); + if (!is_first_stat) { + prev_stats = list_prev_entry(stats, list); - print_buffer_stats(VIDC_STAT, "stat", inst, stats); - - msm_vidc_pool_free(inst, stats); + /* add offset if FW requires more etb's to process output */ + if (prev_stats->flags & MSM_VIDC_STATS_FLAG_SUBFRAME_INPUT) + stats->ts_offset = stats->timestamp - prev_stats->timestamp; } + + /* remove entry - no output attached */ + remove_stat = !!(stats->flags & MSM_VIDC_STATS_FLAG_NO_OUTPUT); + remove_stat |= stats->ebd_time_ms && stats->fbd_time_ms; + } else if (buf->type == MSM_VIDC_BUF_OUTPUT) { + /* skip - ebd already updated(encoder superframe case) */ + if (stats->fbd_time_ms) + continue; + + /* fbd: update end ts */ + stats->ftb_time_ms = buf->start_time_ms; + stats->fbd_time_ms = buf->end_time_ms; + stats->flags |= msm_vidc_get_buffer_stats_flag(inst); + if (is_encode_session(inst)) + stats->data_size = buf->data_size; + + remove_stat |= stats->ebd_time_ms && stats->fbd_time_ms; + } + /* remove stats node */ + if (remove_stat) { + list_del_init(&stats->list); + print_buffer_stats(VIDC_STAT, "stat", inst, stats); + msm_vidc_pool_free(inst, stats); } } @@ -2832,9 +2857,6 @@ struct msm_vidc_buffer *msm_vidc_get_driver_buf(struct msm_vidc_inst *inst, } } - /* update start timestamp */ - msm_vidc_add_buffer_stats(inst, buf); - return buf; } diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index c151eadefb..046aa75515 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -1825,6 +1825,9 @@ int venus_hfi_queue_super_buffer(struct msm_vidc_inst *inst, if (rc) goto unlock; + /* update start timestamp */ + msm_vidc_add_buffer_stats(inst, buffer, hfi_buffer.timestamp); + cnt++; } unlock: @@ -1884,7 +1887,7 @@ int venus_hfi_queue_buffer(struct msm_vidc_inst *inst, { int rc = 0; struct msm_vidc_core *core; - struct hfi_buffer hfi_buffer; + struct hfi_buffer hfi_buffer, hfi_meta_buffer; if (!inst || !inst->core || !inst->packet || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); @@ -1920,7 +1923,7 @@ int venus_hfi_queue_buffer(struct msm_vidc_inst *inst, goto unlock; if (metabuf) { - rc = get_hfi_buffer(inst, metabuf, &hfi_buffer); + rc = get_hfi_buffer(inst, metabuf, &hfi_meta_buffer); if (rc) goto unlock; rc = hfi_create_packet(inst->packet, @@ -1930,8 +1933,8 @@ int venus_hfi_queue_buffer(struct msm_vidc_inst *inst, HFI_PAYLOAD_STRUCTURE, get_hfi_port_from_buffer_type(inst, metabuf->type), core->packet_id++, - &hfi_buffer, - sizeof(hfi_buffer)); + &hfi_meta_buffer, + sizeof(hfi_meta_buffer)); if (rc) goto unlock; } @@ -1964,6 +1967,9 @@ int venus_hfi_queue_buffer(struct msm_vidc_inst *inst, if (rc) goto unlock; + /* update start timestamp */ + msm_vidc_add_buffer_stats(inst, buffer, hfi_buffer.timestamp); + unlock: core_unlock(core, __func__); return rc; diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index 6c1b9e2a07..1418ef2f87 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -822,6 +822,8 @@ static int handle_input_buffer(struct msm_vidc_inst *inst, if (buffer->addr_offset / frame_size < batch_size - 1) { i_vpr_l(inst, "%s: superframe last buffer not reached: %u, %u, %u\n", __func__, buffer->addr_offset, frame_size, batch_size); + /* remove buffer stats for all the subframes in a superframe */ + msm_vidc_remove_buffer_stats(inst, buf, buffer->timestamp); return 0; } } @@ -848,8 +850,8 @@ static int handle_input_buffer(struct msm_vidc_inst *inst, print_vidc_buffer(VIDC_HIGH, "high", "dqbuf", inst, buf); msm_vidc_update_stats(inst, buf, MSM_VIDC_DEBUGFS_EVENT_EBD); - /* etd: update end timestamp and flags in stats entry */ - msm_vidc_remove_buffer_stats(inst, buf); + /* ebd: update end timestamp and flags in stats entry */ + msm_vidc_remove_buffer_stats(inst, buf, buffer->timestamp); return rc; } @@ -1026,7 +1028,7 @@ static int handle_output_buffer(struct msm_vidc_inst *inst, msm_vidc_update_stats(inst, buf, MSM_VIDC_DEBUGFS_EVENT_FBD); /* fbd: print stats and remove entry */ - msm_vidc_remove_buffer_stats(inst, buf); + msm_vidc_remove_buffer_stats(inst, buf, buffer->timestamp); return rc; } From 520a2893dfb128b23bd3602e3b41b0a741536798 Mon Sep 17 00:00:00 2001 From: Maheshwar Ajja Date: Wed, 14 Dec 2022 09:49:38 -0800 Subject: [PATCH 0778/1061] video: iris33: ensure AON spare register to become zero Poll for AON spare register BIT(0) to become zero before asserting XO reset from video driver to ensure CVP/EVA driver is not asserting XO reset around the same time. Asserting XO reset by both driver at the same time may result in unpredictable behavior. Change-Id: I71a0bd0175ef7701c9a855abbf3c2e741d937dfb Signed-off-by: Maheshwar Ajja --- driver/variant/iris33/src/msm_vidc_iris33.c | 17 +++++++++++++---- 1 file changed, 13 insertions(+), 4 deletions(-) diff --git a/driver/variant/iris33/src/msm_vidc_iris33.c b/driver/variant/iris33/src/msm_vidc_iris33.c index 70421da0af..162f8164c7 100644 --- a/driver/variant/iris33/src/msm_vidc_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_iris33.c @@ -457,9 +457,13 @@ static int __power_off_iris33_controller(struct msm_vidc_core *core) if (rc) return rc; - rc = __read_register(core, AON_WRAPPER_SPARE, &value); - if (rc) - return rc; + /* poll AON spare register bit0 to become zero with 50ms timeout */ + rc = __read_register_with_poll_timeout(core, AON_WRAPPER_SPARE, + 0x1, 0x0, 1000, 50 * 1000); + if (rc) + d_vpr_e("%s: AON spare register is not zero\n", __func__); + + /* enable bit(1) to avoid cvp noc xo reset */ rc = __write_register(core, AON_WRAPPER_SPARE, value|0x2); if (rc) return rc; @@ -473,7 +477,7 @@ static int __power_off_iris33_controller(struct msm_vidc_core *core) rc = __write_register_masked(core, AON_WRAPPER_MVP_NOC_CORE_SW_RESET, 0x0, BIT(0)); if (rc) - return rc; + d_vpr_e("%s: MVP_NOC_CORE_SW_RESET failed\n", __func__); /* De-assert video_cc XO reset */ usleep_range(80, 100); @@ -481,6 +485,11 @@ static int __power_off_iris33_controller(struct msm_vidc_core *core) if (rc) d_vpr_e("%s: deassert video_xo_reset failed\n", __func__); + /* reset AON spare register */ + rc = __write_register(core, AON_WRAPPER_SPARE, 0x0); + if (rc) + return rc; + /* Enable MVP NoC clock */ rc = __write_register_masked(core, AON_WRAPPER_MVP_NOC_CORE_CLK_CONTROL, 0x0, BIT(0)); From 3fd67c12747195321b9cdcb77fd6a45b5eb5bbbd Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Wed, 7 Dec 2022 19:42:55 +0530 Subject: [PATCH 0779/1061] video: driver: add error state support for core Introduced MSM_VIDC_CORE_ERROR state in core. It supports CPU_WATCHDOG and VIDEO_UNRESPONSIVE core substates. Change-Id: I6aa700c37782d64d64cd132ea13009dda22cc8d1 Signed-off-by: Govindaraj Rajagopal --- driver/vidc/inc/msm_vidc_core.h | 4 ++- driver/vidc/inc/msm_vidc_driver.h | 1 + driver/vidc/src/msm_vidc_driver.c | 43 +++++++++++++++++++++++++------ driver/vidc/src/venus_hfi.c | 11 +++++--- 4 files changed, 47 insertions(+), 12 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_core.h b/driver/vidc/inc/msm_vidc_core.h index e4c3e826ac..d4b9547a13 100644 --- a/driver/vidc/inc/msm_vidc_core.h +++ b/driver/vidc/inc/msm_vidc_core.h @@ -21,6 +21,7 @@ struct msm_vidc_core; CORE_STATE(CORE_DEINIT) \ CORE_STATE(CORE_INIT_WAIT) \ CORE_STATE(CORE_INIT) \ + CORE_STATE(CORE_ERROR) \ } #define call_venus_op(d, op, ...) \ @@ -133,7 +134,8 @@ struct msm_vidc_core { static inline bool core_in_valid_state(struct msm_vidc_core *core) { - return core->state != MSM_VIDC_CORE_DEINIT; + return (core->state == MSM_VIDC_CORE_INIT || + core->state == MSM_VIDC_CORE_INIT_WAIT); } #endif // _MSM_VIDC_CORE_H_ diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 83c2bcdc1b..6861703771 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -451,6 +451,7 @@ int msm_vidc_change_core_sub_state(struct msm_vidc_core *core, int msm_vidc_core_init(struct msm_vidc_core *core); int msm_vidc_core_init_wait(struct msm_vidc_core *core); int msm_vidc_core_deinit(struct msm_vidc_core *core, bool force); +int msm_vidc_core_deinit_locked(struct msm_vidc_core *core, bool force); int msm_vidc_inst_timeout(struct msm_vidc_inst *inst); int msm_vidc_print_buffer_info(struct msm_vidc_inst *inst); int msm_vidc_print_inst_info(struct msm_vidc_inst *inst); diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index def57702a8..7843422f28 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -1032,11 +1032,20 @@ int signal_session_msg_receipt(struct msm_vidc_inst *inst, int msm_vidc_change_core_state(struct msm_vidc_core *core, enum msm_vidc_core_state request_state, const char *func) { + int rc = 0; + if (!core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } + /* core must be locked */ + rc = __strict_check(core, func); + if (rc) { + d_vpr_e("%s(): core was not locked\n", func); + return rc; + } + d_vpr_h("%s: core state changed to %s from %s\n", func, core_state_name(request_state), core_state_name(core->state)); @@ -4781,7 +4790,10 @@ int msm_vidc_core_init_wait(struct msm_vidc_core *core) if (is_core_state(core, MSM_VIDC_CORE_INIT)) { rc = 0; goto unlock; - } else if (is_core_state(core, MSM_VIDC_CORE_DEINIT)) { + } else if (is_core_state(core, MSM_VIDC_CORE_DEINIT) || + is_core_state(core, MSM_VIDC_CORE_ERROR)) { + d_vpr_e("%s: invalid core state %s\n", + __func__, core_state_name(core->state)); rc = -EINVAL; goto unlock; } @@ -4804,18 +4816,24 @@ int msm_vidc_core_init_wait(struct msm_vidc_core *core) d_vpr_h("%s: sys init successful\n", __func__); rc = 0; goto unlock; - } else { + } else if (is_core_state(core, MSM_VIDC_CORE_INIT_WAIT)) { d_vpr_h("%s: sys init wait timedout. state %s\n", __func__, core_state_name(core->state)); + msm_vidc_change_core_state(core, MSM_VIDC_CORE_ERROR, __func__); /* mark video hw unresponsive */ msm_vidc_change_core_sub_state(core, 0, CORE_SUBSTATE_VIDEO_UNRESPONSIVE, __func__); + /* core deinit to handle error */ + msm_vidc_core_deinit_locked(core, true); + rc = -EINVAL; + goto unlock; + } else { + d_vpr_e("%s: invalid core state %s\n", + __func__, core_state_name(core->state)); rc = -EINVAL; goto unlock; } unlock: - if (rc) - msm_vidc_core_deinit_locked(core, true); core_unlock(core, __func__); return rc; } @@ -4830,9 +4848,14 @@ int msm_vidc_core_init(struct msm_vidc_core *core) } core_lock(core, __func__); - if (is_core_state(core, MSM_VIDC_CORE_INIT) || - is_core_state(core, MSM_VIDC_CORE_INIT_WAIT)) + if (core_in_valid_state(core)) { goto unlock; + } else if (is_core_state(core, MSM_VIDC_CORE_ERROR)) { + d_vpr_e("%s: invalid core state %s\n", + __func__, core_state_name(core->state)); + rc = -EINVAL; + goto unlock; + } msm_vidc_change_core_state(core, MSM_VIDC_CORE_INIT_WAIT, __func__); /* clear PM suspend from core sub_state */ @@ -4841,13 +4864,14 @@ int msm_vidc_core_init(struct msm_vidc_core *core) rc = venus_hfi_core_init(core); if (rc) { + msm_vidc_change_core_state(core, MSM_VIDC_CORE_ERROR, __func__); d_vpr_e("%s: core init failed\n", __func__); + /* do core deinit to handle error */ + msm_vidc_core_deinit_locked(core, true); goto unlock; } unlock: - if (rc) - msm_vidc_core_deinit_locked(core, true); core_unlock(core, __func__); return rc; } @@ -4885,6 +4909,7 @@ int msm_vidc_inst_timeout(struct msm_vidc_inst *inst) goto unlock; } /* mark video hw unresponsive */ + msm_vidc_change_core_state(core, MSM_VIDC_CORE_ERROR, __func__); msm_vidc_change_core_sub_state(core, 0, CORE_SUBSTATE_VIDEO_UNRESPONSIVE, __func__); @@ -5038,7 +5063,9 @@ int msm_vidc_smmu_fault_handler(struct iommu_domain *domain, d_vpr_e(FMT_STRING_FAULT_HANDLER, __func__, iova); /* mark smmu fault as handled */ + core_lock(core, __func__); msm_vidc_change_core_sub_state(core, 0, CORE_SUBSTATE_PAGE_FAULT, __func__); + core_unlock(core, __func__); /* print noc error log registers */ venus_hfi_noc_error_info(core); diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index c151eadefb..6c4e53423f 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -750,10 +750,13 @@ static int __response_handler(struct msm_vidc_core *core) if (call_venus_op(core, watchdog, core, core->intr_status)) { struct hfi_packet pkt = {.type = HFI_SYS_ERROR_WD_TIMEOUT}; + core_lock(core, __func__); + msm_vidc_change_core_state(core, MSM_VIDC_CORE_ERROR, __func__); /* mark cpu watchdog error */ msm_vidc_change_core_sub_state(core, 0, CORE_SUBSTATE_CPU_WATCHDOG, __func__); d_vpr_e("%s: CPU WD error received\n", __func__); + core_unlock(core, __func__); return handle_system_error(core, &pkt); } @@ -822,6 +825,7 @@ void venus_hfi_pm_work_handler(struct work_struct *work) return; } + core_lock(core, __func__); d_vpr_h("%s: try power collapse\n", __func__); /* * It is ok to check this variable outside the lock since @@ -831,14 +835,15 @@ void venus_hfi_pm_work_handler(struct work_struct *work) d_vpr_e("Failed to PC for %d times\n", core->skip_pc_count); core->skip_pc_count = 0; + msm_vidc_change_core_state(core, MSM_VIDC_CORE_ERROR, __func__); /* mark video hw unresponsive */ msm_vidc_change_core_sub_state(core, 0, CORE_SUBSTATE_VIDEO_UNRESPONSIVE, __func__); - msm_vidc_core_deinit(core, true); - return; + /* do core deinit to handle error */ + msm_vidc_core_deinit_locked(core, true); + goto unlock; } - core_lock(core, __func__); /* core already deinited - skip power collapse */ if (is_core_state(core, MSM_VIDC_CORE_DEINIT)) { d_vpr_e("%s: invalid core state %s\n", From c4982fbf1a300b18e5bfee5ebc10caf34edb3e6c Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Wed, 23 Nov 2022 21:39:11 +0530 Subject: [PATCH 0780/1061] video: driver: refine core state machine introduced core error state and added changes to refine core state machine. Change-Id: Ib3b94fd3798e902b7a6cfc5de45820558c89806e Signed-off-by: Govindaraj Rajagopal --- Kbuild | 1 + driver/variant/common/src/msm_vidc_variant.c | 1 + driver/variant/iris2/src/msm_vidc_iris2.c | 1 + driver/variant/iris3/src/msm_vidc_iris3.c | 1 + driver/variant/iris33/src/msm_vidc_iris33.c | 1 + driver/vidc/inc/msm_vidc_core.h | 31 +- driver/vidc/inc/msm_vidc_driver.h | 12 - driver/vidc/inc/msm_vidc_internal.h | 11 + driver/vidc/inc/msm_vidc_state.h | 59 +++ driver/vidc/src/msm_vidc_driver.c | 121 +---- driver/vidc/src/msm_vidc_probe.c | 5 +- driver/vidc/src/msm_vidc_state.c | 458 +++++++++++++++++++ driver/vidc/src/venus_hfi.c | 1 + driver/vidc/src/venus_hfi_response.c | 29 +- 14 files changed, 572 insertions(+), 160 deletions(-) create mode 100644 driver/vidc/inc/msm_vidc_state.h create mode 100644 driver/vidc/src/msm_vidc_state.c diff --git a/Kbuild b/Kbuild index f62bf008ce..95fdc366a2 100644 --- a/Kbuild +++ b/Kbuild @@ -79,6 +79,7 @@ msm_video-objs += driver/vidc/src/msm_vidc_v4l2.o \ driver/vidc/src/msm_vdec.o \ driver/vidc/src/msm_venc.o \ driver/vidc/src/msm_vidc_driver.o \ + driver/vidc/src/msm_vidc_state.o \ driver/vidc/src/msm_vidc_control.o \ driver/vidc/src/msm_vidc_control_ext.o \ driver/vidc/src/msm_vidc_buffer.o \ diff --git a/driver/variant/common/src/msm_vidc_variant.c b/driver/variant/common/src/msm_vidc_variant.c index 6587c0b29b..65841b7fbc 100644 --- a/driver/variant/common/src/msm_vidc_variant.c +++ b/driver/variant/common/src/msm_vidc_variant.c @@ -9,6 +9,7 @@ #include "msm_vidc_core.h" #include "msm_vidc_driver.h" +#include "msm_vidc_state.h" #include "msm_vidc_debug.h" #include "msm_vidc_variant.h" #include "msm_vidc_platform.h" diff --git a/driver/variant/iris2/src/msm_vidc_iris2.c b/driver/variant/iris2/src/msm_vidc_iris2.c index efe801b151..510dd5aa5e 100644 --- a/driver/variant/iris2/src/msm_vidc_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_iris2.c @@ -12,6 +12,7 @@ #include "msm_vidc_platform.h" #include "msm_vidc_internal.h" #include "msm_vidc_buffer.h" +#include "msm_vidc_state.h" #include "msm_vidc_debug.h" #include "msm_vidc_variant.h" diff --git a/driver/variant/iris3/src/msm_vidc_iris3.c b/driver/variant/iris3/src/msm_vidc_iris3.c index 07ce667187..3ff7f93a38 100644 --- a/driver/variant/iris3/src/msm_vidc_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_iris3.c @@ -14,6 +14,7 @@ #include "msm_vidc_platform.h" #include "msm_vidc_internal.h" #include "msm_vidc_buffer.h" +#include "msm_vidc_state.h" #include "msm_vidc_debug.h" #include "msm_vidc_variant.h" diff --git a/driver/variant/iris33/src/msm_vidc_iris33.c b/driver/variant/iris33/src/msm_vidc_iris33.c index 70421da0af..2c6d8f7512 100644 --- a/driver/variant/iris33/src/msm_vidc_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_iris33.c @@ -14,6 +14,7 @@ #include "msm_vidc_platform.h" #include "msm_vidc_internal.h" #include "msm_vidc_buffer.h" +#include "msm_vidc_state.h" #include "msm_vidc_debug.h" #include "msm_vidc_variant.h" diff --git a/driver/vidc/inc/msm_vidc_core.h b/driver/vidc/inc/msm_vidc_core.h index d4b9547a13..e95dcca496 100644 --- a/driver/vidc/inc/msm_vidc_core.h +++ b/driver/vidc/inc/msm_vidc_core.h @@ -10,6 +10,7 @@ #include #include "msm_vidc_internal.h" +#include "msm_vidc_state.h" #include "venus_hfi_queue.h" #include "resources.h" @@ -17,13 +18,6 @@ struct msm_vidc_core; #define MAX_EVENTS 30 -#define FOREACH_CORE_STATE(CORE_STATE) { \ - CORE_STATE(CORE_DEINIT) \ - CORE_STATE(CORE_INIT_WAIT) \ - CORE_STATE(CORE_INIT) \ - CORE_STATE(CORE_ERROR) \ -} - #define call_venus_op(d, op, ...) \ (((d) && (d)->venus_ops && (d)->venus_ops->op) ? \ ((d)->venus_ops->op(__VA_ARGS__)):0) @@ -64,20 +58,6 @@ struct msm_vidc_core_power { u64 bw_llcc; }; -enum msm_vidc_core_state FOREACH_CORE_STATE(GENERATE_MSM_VIDC_ENUM); - -enum msm_vidc_core_sub_state { - CORE_SUBSTATE_NONE = 0x0, - CORE_SUBSTATE_POWER_ENABLE = BIT(0), - CORE_SUBSTATE_GDSC_HANDOFF = BIT(1), - CORE_SUBSTATE_PM_SUSPEND = BIT(2), - CORE_SUBSTATE_FW_PWR_CTRL = BIT(3), - CORE_SUBSTATE_PAGE_FAULT = BIT(4), - CORE_SUBSTATE_CPU_WATCHDOG = BIT(5), - CORE_SUBSTATE_VIDEO_UNRESPONSIVE = BIT(6), - CORE_SUBSTATE_MAX = BIT(7), -}; - struct msm_vidc_core { struct platform_device *pdev; struct msm_video_device vdev[2]; @@ -89,6 +69,9 @@ struct msm_vidc_core { struct dentry *debugfs_root; char fw_version[MAX_NAME_LENGTH]; enum msm_vidc_core_state state; + int (*state_handle)(struct msm_vidc_core *core, + enum msm_vidc_core_event_type type, + struct msm_vidc_event_data *data); enum msm_vidc_core_sub_state sub_state; char sub_state_name[MAX_NAME_LENGTH]; struct mutex lock; @@ -132,10 +115,4 @@ struct msm_vidc_core { u32 sys_init_id; }; -static inline bool core_in_valid_state(struct msm_vidc_core *core) -{ - return (core->state == MSM_VIDC_CORE_INIT || - core->state == MSM_VIDC_CORE_INIT_WAIT); -} - #endif // _MSM_VIDC_CORE_H_ diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 6861703771..933e42ec45 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -370,17 +370,6 @@ static inline bool is_sub_state(struct msm_vidc_inst *inst, return (inst->sub_state & sub_state); } -static inline bool is_core_state(struct msm_vidc_core *core, enum msm_vidc_core_state state) -{ - return core->state == state; -} - -static inline bool is_core_sub_state(struct msm_vidc_core *core, - enum msm_vidc_core_sub_state sub_state) -{ - return !!(core->sub_state & sub_state); -} - const char *cap_name(enum msm_vidc_inst_capability_type cap_id); const char *v4l2_pixelfmt_name(struct msm_vidc_inst *inst, u32 pixelfmt); const char *v4l2_type_name(u32 port); @@ -412,7 +401,6 @@ int v4l2_type_to_driver_port(struct msm_vidc_inst *inst, u32 type, const char *func); const char *allow_name(enum msm_vidc_allow allow); const char *state_name(enum msm_vidc_state state); -const char *core_state_name(enum msm_vidc_core_state state); int msm_vidc_change_state(struct msm_vidc_inst *inst, enum msm_vidc_state request_state, const char *func); int msm_vidc_change_sub_state(struct msm_vidc_inst *inst, diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 0e250c7a06..0f00e5f294 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -636,6 +636,17 @@ struct msm_vidc_inst_cap_entry { enum msm_vidc_inst_capability_type cap_id; }; +struct msm_vidc_event_data { + union { + bool bval; + u32 uval; + u64 uval64; + s32 val; + s64 val64; + void *ptr; + } edata; +}; + struct debug_buf_count { u64 etb; u64 ftb; diff --git a/driver/vidc/inc/msm_vidc_state.h b/driver/vidc/inc/msm_vidc_state.h new file mode 100644 index 0000000000..9d3ca92e56 --- /dev/null +++ b/driver/vidc/inc/msm_vidc_state.h @@ -0,0 +1,59 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. + * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#ifndef _MSM_VIDC_STATE_H_ +#define _MSM_VIDC_STATE_H_ + +#include "msm_vidc_internal.h" + +struct msm_vidc_core; + +#define FOREACH_CORE_STATE(CORE_STATE) { \ + CORE_STATE(CORE_DEINIT) \ + CORE_STATE(CORE_INIT_WAIT) \ + CORE_STATE(CORE_INIT) \ + CORE_STATE(CORE_ERROR) \ +} + +enum msm_vidc_core_state FOREACH_CORE_STATE(GENERATE_MSM_VIDC_ENUM); + +enum msm_vidc_core_sub_state { + CORE_SUBSTATE_NONE = 0x0, + CORE_SUBSTATE_POWER_ENABLE = BIT(0), + CORE_SUBSTATE_GDSC_HANDOFF = BIT(1), + CORE_SUBSTATE_PM_SUSPEND = BIT(2), + CORE_SUBSTATE_FW_PWR_CTRL = BIT(3), + CORE_SUBSTATE_PAGE_FAULT = BIT(4), + CORE_SUBSTATE_CPU_WATCHDOG = BIT(5), + CORE_SUBSTATE_VIDEO_UNRESPONSIVE = BIT(6), + CORE_SUBSTATE_MAX = BIT(7), +}; + +enum msm_vidc_core_event_type { + CORE_EVENT_NONE = BIT(0), + CORE_EVENT_UPDATE_SUB_STATE = BIT(1), +}; + +struct msm_vidc_core_state_handle { + enum msm_vidc_core_state state; + int (*handle)(struct msm_vidc_core *core, + enum msm_vidc_core_event_type type, + struct msm_vidc_event_data *data); +}; + +enum msm_vidc_allow msm_vidc_allow_core_state_change( + struct msm_vidc_core *core, + enum msm_vidc_core_state req_state); +int msm_vidc_update_core_state(struct msm_vidc_core *core, + enum msm_vidc_core_state request_state, const char *func); +bool core_in_valid_state(struct msm_vidc_core *core); +bool is_core_state(struct msm_vidc_core *core, enum msm_vidc_core_state state); +bool is_core_sub_state(struct msm_vidc_core *core, + enum msm_vidc_core_sub_state sub_state); +const char *core_state_name(enum msm_vidc_core_state state); +const char *core_sub_state_name(enum msm_vidc_core_sub_state sub_state); + +#endif // _MSM_VIDC_STATE_H_ diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 7843422f28..b3efbdbbc7 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -13,6 +13,7 @@ #include "msm_vidc_internal.h" #include "msm_vidc_control.h" #include "msm_vidc_memory.h" +#include "msm_vidc_state.h" #include "msm_vidc_power.h" #include "msm_vidc_debug.h" #include "msm_vidc_power.h" @@ -130,39 +131,6 @@ const char *sub_state_name(enum msm_vidc_sub_state sub_state) return "SUB_STATE_NONE"; } -static const char * const core_state_name_arr[] = - FOREACH_CORE_STATE(GENERATE_STRING); - -const char *core_state_name(enum msm_vidc_core_state state) -{ - const char *name = "UNKNOWN STATE"; - - if (state >= ARRAY_SIZE(core_state_name_arr)) - goto exit; - - name = core_state_name_arr[state]; - -exit: - return name; -} - -const char *core_sub_state_name(enum msm_vidc_core_sub_state sub_state) -{ - switch (sub_state) { - case CORE_SUBSTATE_NONE: return "NONE "; - case CORE_SUBSTATE_GDSC_HANDOFF: return "GDSC_HANDOFF "; - case CORE_SUBSTATE_PM_SUSPEND: return "PM_SUSPEND "; - case CORE_SUBSTATE_FW_PWR_CTRL: return "FW_PWR_CTRL "; - case CORE_SUBSTATE_POWER_ENABLE: return "POWER_ENABLE "; - case CORE_SUBSTATE_PAGE_FAULT: return "PAGE_FAULT "; - case CORE_SUBSTATE_CPU_WATCHDOG: return "CPU_WATCHDOG "; - case CORE_SUBSTATE_VIDEO_UNRESPONSIVE: return "VIDEO_UNRESPONSIVE "; - case CORE_SUBSTATE_MAX: return "MAX "; - } - - return "UNKNOWN "; -} - const char *v4l2_type_name(u32 port) { switch (port) { @@ -1029,77 +997,6 @@ int signal_session_msg_receipt(struct msm_vidc_inst *inst, return 0; } -int msm_vidc_change_core_state(struct msm_vidc_core *core, - enum msm_vidc_core_state request_state, const char *func) -{ - int rc = 0; - - if (!core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - /* core must be locked */ - rc = __strict_check(core, func); - if (rc) { - d_vpr_e("%s(): core was not locked\n", func); - return rc; - } - - d_vpr_h("%s: core state changed to %s from %s\n", - func, core_state_name(request_state), - core_state_name(core->state)); - core->state = request_state; - return 0; -} - -int msm_vidc_change_core_sub_state(struct msm_vidc_core *core, - enum msm_vidc_core_sub_state clear_sub_state, - enum msm_vidc_core_sub_state set_sub_state, const char *func) -{ - int i = 0; - enum msm_vidc_core_sub_state prev_sub_state; - - if (!core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - /* final value will not change */ - if (clear_sub_state == set_sub_state) - return 0; - - /* sanitize clear & set value */ - if (set_sub_state > CORE_SUBSTATE_MAX || - clear_sub_state > CORE_SUBSTATE_MAX) { - d_vpr_e("%s: invalid sub states. clear %#x or set %#x\n", - func, clear_sub_state, set_sub_state); - return -EINVAL; - } - - prev_sub_state = core->sub_state; - core->sub_state |= set_sub_state; - core->sub_state &= ~clear_sub_state; - - /* print substates only when there is a change */ - if (core->sub_state != prev_sub_state) { - strscpy(core->sub_state_name, "\0", sizeof(core->sub_state_name)); - for (i = 0; BIT(i) < CORE_SUBSTATE_MAX; i++) { - if (core->sub_state == CORE_SUBSTATE_NONE) { - strscpy(core->sub_state_name, "CORE_SUBSTATE_NONE", - sizeof(core->sub_state_name)); - break; - } - if (core->sub_state & BIT(i)) - strlcat(core->sub_state_name, core_sub_state_name(BIT(i)), - sizeof(core->sub_state_name)); - } - d_vpr_h("%s: core sub state changed to %s\n", func, core->sub_state_name); - } - - return 0; -} - int msm_vidc_change_state(struct msm_vidc_inst *inst, enum msm_vidc_state request_state, const char *func) { @@ -4722,6 +4619,7 @@ int msm_vidc_core_deinit_locked(struct msm_vidc_core *core, bool force) { int rc = 0; struct msm_vidc_inst *inst, *dummy; + enum msm_vidc_allow allow; if (!core) { d_vpr_e("%s: invalid params\n", __func__); @@ -4737,6 +4635,13 @@ int msm_vidc_core_deinit_locked(struct msm_vidc_core *core, bool force) if (is_core_state(core, MSM_VIDC_CORE_DEINIT)) return 0; + /* print error for state change not allowed case */ + allow = msm_vidc_allow_core_state_change(core, MSM_VIDC_CORE_DEINIT); + if (allow != MSM_VIDC_ALLOW) + d_vpr_e("%s: %s core state change %s -> %s\n", __func__, + allow_name(allow), core_state_name(core->state), + core_state_name(MSM_VIDC_CORE_DEINIT)); + if (force) { d_vpr_e("%s(): force deinit core\n", __func__); } else { @@ -4840,6 +4745,7 @@ unlock: int msm_vidc_core_init(struct msm_vidc_core *core) { + enum msm_vidc_allow allow; int rc = 0; if (!core || !core->capabilities) { @@ -4857,6 +4763,13 @@ int msm_vidc_core_init(struct msm_vidc_core *core) goto unlock; } + /* print error for state change not allowed case */ + allow = msm_vidc_allow_core_state_change(core, MSM_VIDC_CORE_INIT_WAIT); + if (allow != MSM_VIDC_ALLOW) + d_vpr_e("%s: %s core state change %s -> %s\n", __func__, + allow_name(allow), core_state_name(core->state), + core_state_name(MSM_VIDC_CORE_INIT_WAIT)); + msm_vidc_change_core_state(core, MSM_VIDC_CORE_INIT_WAIT, __func__); /* clear PM suspend from core sub_state */ msm_vidc_change_core_sub_state(core, CORE_SUBSTATE_PM_SUSPEND, 0, __func__); diff --git a/driver/vidc/src/msm_vidc_probe.c b/driver/vidc/src/msm_vidc_probe.c index d3471a4392..333777e31c 100644 --- a/driver/vidc/src/msm_vidc_probe.c +++ b/driver/vidc/src/msm_vidc_probe.c @@ -19,6 +19,7 @@ #include "msm_vidc_internal.h" #include "msm_vidc_debug.h" #include "msm_vidc_driver.h" +#include "msm_vidc_state.h" #include "msm_vidc_platform.h" #include "msm_vidc_core.h" #include "msm_vidc_memory.h" @@ -274,7 +275,7 @@ static int msm_vidc_deinitialize_core(struct msm_vidc_core *core) d_vpr_h("%s()\n", __func__); mutex_destroy(&core->lock); - msm_vidc_change_core_state(core, MSM_VIDC_CORE_DEINIT, __func__); + msm_vidc_update_core_state(core, MSM_VIDC_CORE_DEINIT, __func__); msm_vidc_vmem_free((void **)&core->response_packet); msm_vidc_vmem_free((void **)&core->packet); @@ -303,7 +304,7 @@ static int msm_vidc_initialize_core(struct msm_vidc_core *core) } d_vpr_h("%s()\n", __func__); - msm_vidc_change_core_state(core, MSM_VIDC_CORE_DEINIT, __func__); + msm_vidc_update_core_state(core, MSM_VIDC_CORE_DEINIT, __func__); core->pm_workq = create_singlethread_workqueue("pm_workq"); if (!core->pm_workq) { diff --git a/driver/vidc/src/msm_vidc_state.c b/driver/vidc/src/msm_vidc_state.c new file mode 100644 index 0000000000..5fe4522d2b --- /dev/null +++ b/driver/vidc/src/msm_vidc_state.c @@ -0,0 +1,458 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. + * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include "msm_vidc_driver.h" +#include "msm_vidc_state.h" +#include "msm_vidc_debug.h" +#include "msm_vidc_core.h" + +bool core_in_valid_state(struct msm_vidc_core *core) +{ + return (core->state == MSM_VIDC_CORE_INIT || + core->state == MSM_VIDC_CORE_INIT_WAIT); +} + +bool is_core_state(struct msm_vidc_core *core, enum msm_vidc_core_state state) +{ + return core->state == state; +} + +static const char * const core_state_name_arr[] = + FOREACH_CORE_STATE(GENERATE_STRING); + +const char *core_state_name(enum msm_vidc_core_state state) +{ + const char *name = "UNKNOWN STATE"; + + if (state >= ARRAY_SIZE(core_state_name_arr)) + goto exit; + + name = core_state_name_arr[state]; + +exit: + return name; +} + +static int __strict_check(struct msm_vidc_core *core, const char *function) +{ + bool fatal = !mutex_is_locked(&core->lock); + + WARN_ON(fatal); + + if (fatal) + d_vpr_e("%s: strict check failed\n", function); + + return fatal ? -EINVAL : 0; +} + +static int msm_vidc_core_deinit_state(struct msm_vidc_core *core, + enum msm_vidc_core_event_type type, + struct msm_vidc_event_data *data) +{ + if (!core || !data) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + d_vpr_e("%s: unexpected core event type %u\n", __func__, type); + return -EINVAL; +} + +static int msm_vidc_core_init_wait_state(struct msm_vidc_core *core, + enum msm_vidc_core_event_type type, + struct msm_vidc_event_data *data) +{ + int rc = 0; + + if (!core || !data) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + switch (type) { + case CORE_EVENT_UPDATE_SUB_STATE: + { + u32 req_sub_state; + u32 allow_mask = -1; + + req_sub_state = data->edata.uval; + + /* none of the requested substate supported */ + if (!(req_sub_state & allow_mask)) { + d_vpr_e("%s: invalid substate update request %#x\n", + __func__, req_sub_state); + return -EINVAL; + } + + /* update core substate */ + core->sub_state |= req_sub_state & allow_mask; + return rc; + } + default: { + d_vpr_e("%s: unexpected core event type %u\n", + __func__, type); + return -EINVAL; + } + } + + return rc; +} + +static int msm_vidc_core_init_state(struct msm_vidc_core *core, + enum msm_vidc_core_event_type type, + struct msm_vidc_event_data *data) +{ + int rc = 0; + + if (!core || !data) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + switch (type) { + case CORE_EVENT_UPDATE_SUB_STATE: + { + u32 req_sub_state; + u32 allow_mask = -1; + + req_sub_state = data->edata.uval; + + /* none of the requested substate supported */ + if (!(req_sub_state & allow_mask)) { + d_vpr_e("%s: invalid substate update request %#x\n", + __func__, req_sub_state); + return -EINVAL; + } + + /* update core substate */ + core->sub_state |= req_sub_state & allow_mask; + return rc; + } + default: { + d_vpr_e("%s: unexpected core event type %u\n", + __func__, type); + return -EINVAL; + } + } + + return rc; +} + +static int msm_vidc_core_error_state(struct msm_vidc_core *core, + enum msm_vidc_core_event_type type, + struct msm_vidc_event_data *data) +{ + int rc = 0; + + if (!core || !data) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + switch (type) { + case CORE_EVENT_UPDATE_SUB_STATE: + { + u32 req_sub_state; + u32 allow_mask = -1; + + req_sub_state = data->edata.uval; + + /* none of the requested substate supported */ + if (!(req_sub_state & allow_mask)) { + d_vpr_e("%s: invalid substate update request %#x\n", + __func__, req_sub_state); + return -EINVAL; + } + + /* update core substate */ + core->sub_state |= req_sub_state & allow_mask; + return rc; + } + default: { + d_vpr_e("%s: unexpected core event type %u\n", + __func__, type); + return -EINVAL; + } + } + + return rc; +} + +struct msm_vidc_core_state_handle *msm_vidc_get_core_state_handle( + enum msm_vidc_core_state req_state) +{ + int cnt; + struct msm_vidc_core_state_handle *core_state_handle = NULL; + static struct msm_vidc_core_state_handle state_handle[] = { + {MSM_VIDC_CORE_DEINIT, msm_vidc_core_deinit_state }, + {MSM_VIDC_CORE_INIT_WAIT, msm_vidc_core_init_wait_state }, + {MSM_VIDC_CORE_INIT, msm_vidc_core_init_state }, + {MSM_VIDC_CORE_ERROR, msm_vidc_core_error_state }, + }; + + for (cnt = 0; cnt < ARRAY_SIZE(state_handle); cnt++) { + if (state_handle[cnt].state == req_state) { + core_state_handle = &state_handle[cnt]; + break; + } + } + + /* if req_state does not exist in the table */ + if (cnt == ARRAY_SIZE(state_handle)) { + d_vpr_e("%s: invalid core state \"%s\" requested\n", + __func__, core_state_name(req_state)); + return core_state_handle; + } + + return core_state_handle; +} + +int msm_vidc_update_core_state(struct msm_vidc_core *core, + enum msm_vidc_core_state request_state, const char *func) +{ + struct msm_vidc_core_state_handle *state_handle = NULL; + int rc = 0; + + /* get core state handler for requested state */ + state_handle = msm_vidc_get_core_state_handle(request_state); + if (!state_handle) + return -EINVAL; + + d_vpr_h("%s: core state changed to %s from %s\n", func, + core_state_name(state_handle->state), core_state_name(core->state)); + + /* finally update core state and handler */ + core->state = state_handle->state; + core->state_handle = state_handle->handle; + + return rc; +} + +struct msm_vidc_core_state_allow { + enum msm_vidc_core_state from; + enum msm_vidc_core_state to; + enum msm_vidc_allow allow; +}; + +enum msm_vidc_allow msm_vidc_allow_core_state_change( + struct msm_vidc_core *core, + enum msm_vidc_core_state req_state) +{ + int cnt; + enum msm_vidc_allow allow = MSM_VIDC_DISALLOW; + static struct msm_vidc_core_state_allow state[] = { + /* from, to, allow */ + {MSM_VIDC_CORE_DEINIT, MSM_VIDC_CORE_DEINIT, MSM_VIDC_IGNORE }, + {MSM_VIDC_CORE_DEINIT, MSM_VIDC_CORE_INIT_WAIT, MSM_VIDC_ALLOW }, + {MSM_VIDC_CORE_DEINIT, MSM_VIDC_CORE_INIT, MSM_VIDC_DISALLOW }, + {MSM_VIDC_CORE_DEINIT, MSM_VIDC_CORE_ERROR, MSM_VIDC_IGNORE }, + {MSM_VIDC_CORE_INIT_WAIT, MSM_VIDC_CORE_DEINIT, MSM_VIDC_DISALLOW }, + {MSM_VIDC_CORE_INIT_WAIT, MSM_VIDC_CORE_INIT_WAIT, MSM_VIDC_IGNORE }, + {MSM_VIDC_CORE_INIT_WAIT, MSM_VIDC_CORE_INIT, MSM_VIDC_ALLOW }, + {MSM_VIDC_CORE_INIT_WAIT, MSM_VIDC_CORE_ERROR, MSM_VIDC_ALLOW }, + {MSM_VIDC_CORE_INIT, MSM_VIDC_CORE_DEINIT, MSM_VIDC_ALLOW }, + {MSM_VIDC_CORE_INIT, MSM_VIDC_CORE_INIT_WAIT, MSM_VIDC_DISALLOW }, + {MSM_VIDC_CORE_INIT, MSM_VIDC_CORE_INIT, MSM_VIDC_IGNORE }, + {MSM_VIDC_CORE_INIT, MSM_VIDC_CORE_ERROR, MSM_VIDC_ALLOW }, + {MSM_VIDC_CORE_ERROR, MSM_VIDC_CORE_DEINIT, MSM_VIDC_ALLOW }, + {MSM_VIDC_CORE_ERROR, MSM_VIDC_CORE_INIT_WAIT, MSM_VIDC_IGNORE }, + {MSM_VIDC_CORE_ERROR, MSM_VIDC_CORE_INIT, MSM_VIDC_IGNORE }, + {MSM_VIDC_CORE_ERROR, MSM_VIDC_CORE_ERROR, MSM_VIDC_IGNORE }, + }; + + for (cnt = 0; cnt < ARRAY_SIZE(state); cnt++) { + if (state[cnt].from == core->state && state[cnt].to == req_state) { + allow = state[cnt].allow; + break; + } + } + + return allow; +} + +int msm_vidc_change_core_state(struct msm_vidc_core *core, + enum msm_vidc_core_state request_state, const char *func) +{ + enum msm_vidc_allow allow; + int rc = 0; + + if (!core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + /* core must be locked */ + rc = __strict_check(core, func); + if (rc) { + d_vpr_e("%s(): core was not locked\n", func); + return rc; + } + + /* current and requested state is same */ + if (core->state == request_state) + return 0; + + /* check if requested state movement is allowed */ + allow = msm_vidc_allow_core_state_change(core, request_state); + if (allow == MSM_VIDC_IGNORE) { + d_vpr_h("%s: %s core state change %s -> %s\n", func, + allow_name(allow), core_state_name(core->state), + core_state_name(request_state)); + return 0; + } else if (allow == MSM_VIDC_DISALLOW) { + d_vpr_e("%s: %s core state change %s -> %s\n", func, + allow_name(allow), core_state_name(core->state), + core_state_name(request_state)); + return -EINVAL; + } + + /* go ahead and update core state */ + rc = msm_vidc_update_core_state(core, request_state, func); + if (rc) + return rc; + + return rc; +} + +bool is_core_sub_state(struct msm_vidc_core *core, + enum msm_vidc_core_sub_state sub_state) +{ + return !!(core->sub_state & sub_state); +} + +const char *core_sub_state_name(enum msm_vidc_core_sub_state sub_state) +{ + switch (sub_state) { + case CORE_SUBSTATE_NONE: return "NONE "; + case CORE_SUBSTATE_GDSC_HANDOFF: return "GDSC_HANDOFF "; + case CORE_SUBSTATE_PM_SUSPEND: return "PM_SUSPEND "; + case CORE_SUBSTATE_FW_PWR_CTRL: return "FW_PWR_CTRL "; + case CORE_SUBSTATE_POWER_ENABLE: return "POWER_ENABLE "; + case CORE_SUBSTATE_PAGE_FAULT: return "PAGE_FAULT "; + case CORE_SUBSTATE_CPU_WATCHDOG: return "CPU_WATCHDOG "; + case CORE_SUBSTATE_VIDEO_UNRESPONSIVE: return "VIDEO_UNRESPONSIVE "; + case CORE_SUBSTATE_MAX: return "MAX "; + } + + return "UNKNOWN "; +} + +static int prepare_core_sub_state_name(enum msm_vidc_core_sub_state sub_state, + char *buf, u32 size) +{ + int i = 0; + + if (!buf || !size) + return -EINVAL; + + strscpy(buf, "\0", size); + if (sub_state == CORE_SUBSTATE_NONE) { + strscpy(buf, "CORE_SUBSTATE_NONE", size); + return 0; + } + + for (i = 0; BIT(i) < CORE_SUBSTATE_MAX; i++) { + if (sub_state & BIT(i)) + strlcat(buf, core_sub_state_name(BIT(i)), size); + } + + return 0; +} + +static int msm_vidc_update_core_sub_state(struct msm_vidc_core *core, + enum msm_vidc_core_sub_state sub_state, const char *func) +{ + struct msm_vidc_event_data data; + char sub_state_name[MAX_NAME_LENGTH]; + int ret = 0, rc = 0; + + if (!core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + /* no substate update */ + if (!sub_state) + return 0; + + /* invoke update core substate event */ + memset(&data, 0, sizeof(struct msm_vidc_event_data)); + data.edata.uval = sub_state; + rc = core->state_handle(core, CORE_EVENT_UPDATE_SUB_STATE, &data); + if (rc) { + ret = prepare_core_sub_state_name(sub_state, + sub_state_name, sizeof(sub_state_name) - 1); + if (!ret) + d_vpr_e("%s: state %s, requested invalid core substate %s\n", + func, core_state_name(core->state), sub_state_name); + return rc; + } + + return rc; +} + +int msm_vidc_change_core_sub_state(struct msm_vidc_core *core, + enum msm_vidc_core_sub_state clear_sub_state, + enum msm_vidc_core_sub_state set_sub_state, const char *func) +{ + int rc = 0; + enum msm_vidc_core_sub_state prev_sub_state; + + if (!core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + /* core must be locked */ + rc = __strict_check(core, func); + if (rc) { + d_vpr_e("%s(): core was not locked\n", func); + return rc; + } + + /* sanitize core state handler */ + if (!core->state_handle) { + d_vpr_e("%s: invalid core state handle\n", __func__); + return -EINVAL; + } + + /* final value will not change */ + if (clear_sub_state == set_sub_state) + return 0; + + /* sanitize clear & set value */ + if (set_sub_state > CORE_SUBSTATE_MAX || + clear_sub_state > CORE_SUBSTATE_MAX) { + d_vpr_e("%s: invalid sub states. clear %#x or set %#x\n", + func, clear_sub_state, set_sub_state); + return -EINVAL; + } + + prev_sub_state = core->sub_state; + + /* set sub state */ + rc = msm_vidc_update_core_sub_state(core, set_sub_state, func); + if (rc) + return rc; + + /* check if all core substates updated */ + if ((core->sub_state & set_sub_state) != set_sub_state) + d_vpr_e("%s: all substates not updated %#x, expected %#x\n", + func, core->sub_state & set_sub_state, set_sub_state); + + /* clear sub state */ + core->sub_state &= ~clear_sub_state; + + /* print substates only when there is a change */ + if (core->sub_state != prev_sub_state) { + rc = prepare_core_sub_state_name(core->sub_state, core->sub_state_name, + sizeof(core->sub_state_name) - 1); + if (!rc) + d_vpr_h("%s: core sub state changed to %s\n", func, core->sub_state_name); + } + + return 0; +} diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index 6c4e53423f..4ed7278503 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -27,6 +27,7 @@ #include "venus_hfi_response.h" #include "venus_hfi_queue.h" #include "msm_vidc_events.h" +#include "msm_vidc_state.h" #include "firmware.h" #define update_offset(offset, val) ((offset) += (val)) diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index 6c1b9e2a07..5cefd244c3 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -492,24 +492,23 @@ int handle_system_error(struct msm_vidc_core *core, static int handle_system_init(struct msm_vidc_core *core, struct hfi_packet *pkt) { - if (pkt->flags & HFI_FW_FLAGS_SUCCESS) { - core_lock(core, __func__); - if (is_core_state(core, MSM_VIDC_CORE_INIT_WAIT) && - pkt->packet_id == core->sys_init_id) { - msm_vidc_change_core_state(core, MSM_VIDC_CORE_INIT, __func__); - d_vpr_h("%s: successful\n", __func__); - } else if (core->state != MSM_VIDC_CORE_INIT_WAIT) { - d_vpr_e("%s: invalid core state %s\n", __func__, - core_state_name(core->state)); - } else if (pkt->packet_id != core->sys_init_id) { - d_vpr_e("%s: invalid pkt id %u, expected %u\n", __func__, - pkt->packet_id, core->sys_init_id); - } - core_unlock(core, __func__); - } else { + if (!(pkt->flags & HFI_FW_FLAGS_SUCCESS)) { d_vpr_h("%s: unhandled. flags=%d\n", __func__, pkt->flags); + return 0; } + core_lock(core, __func__); + if (pkt->packet_id != core->sys_init_id) { + d_vpr_e("%s: invalid pkt id %u, expected %u\n", __func__, + pkt->packet_id, core->sys_init_id); + goto unlock; + } + + msm_vidc_change_core_state(core, MSM_VIDC_CORE_INIT, __func__); + d_vpr_h("%s: successful\n", __func__); + +unlock: + core_unlock(core, __func__); return 0; } From d7e518a85c4617deb3b61a1872e4a72f27c651fe Mon Sep 17 00:00:00 2001 From: Dikshita Agarwal Date: Tue, 8 Nov 2022 16:36:05 +0530 Subject: [PATCH 0781/1061] video: driver: implement memory_ops for upstream - Implement upstream specific memory_alloc/map and memory_unmap/free API based on standard dma_alloc_attr() and dma_free_attr() APIs which allocates and map dma buffer. - Combine alloc and map, unmap and free. Change-Id: Ie85914beb72c3976febdc9e6a11c9199f2ea4192 Signed-off-by: Dikshita Agarwal --- driver/vidc/inc/msm_vidc_core.h | 3 +- driver/vidc/inc/msm_vidc_driver.h | 4 +- driver/vidc/inc/msm_vidc_inst.h | 35 ++---- driver/vidc/inc/msm_vidc_internal.h | 20 +--- driver/vidc/inc/msm_vidc_memory.h | 15 +-- driver/vidc/src/msm_vidc.c | 27 ++--- driver/vidc/src/msm_vidc_driver.c | 133 ++++++----------------- driver/vidc/src/msm_vidc_memory.c | 147 +++++++++----------------- driver/vidc/src/msm_vidc_memory_ext.c | 120 ++++++++++++++++----- driver/vidc/src/venus_hfi_queue.c | 79 +++++--------- 10 files changed, 242 insertions(+), 341 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_core.h b/driver/vidc/inc/msm_vidc_core.h index e4c3e826ac..567558c2a4 100644 --- a/driver/vidc/inc/msm_vidc_core.h +++ b/driver/vidc/inc/msm_vidc_core.h @@ -42,8 +42,7 @@ struct msm_vidc_mem_addr { u32 align_device_addr; u8 *align_virtual_addr; u32 mem_size; - struct msm_vidc_map map; - struct msm_vidc_alloc alloc; + struct msm_vidc_mem mem; }; struct msm_vidc_iface_q_info { diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 83c2bcdc1b..87e9728a2b 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -474,9 +474,7 @@ int msm_vidc_vb2_queue_deinit(struct msm_vidc_inst *inst); int msm_vidc_get_control(struct msm_vidc_inst *inst, struct v4l2_ctrl *ctrl); struct msm_vidc_buffers *msm_vidc_get_buffers(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type buffer_type, const char *func); -struct msm_vidc_mappings *msm_vidc_get_mappings(struct msm_vidc_inst *inst, - enum msm_vidc_buffer_type buffer_type, const char *func); -struct msm_vidc_allocations *msm_vidc_get_allocations( +struct msm_vidc_mem_list *msm_vidc_get_mem_info( struct msm_vidc_inst *inst, enum msm_vidc_buffer_type buffer_type, const char *func); struct msm_vidc_buffer *msm_vidc_get_driver_buf(struct msm_vidc_inst *inst, diff --git a/driver/vidc/inc/msm_vidc_inst.h b/driver/vidc/inc/msm_vidc_inst.h index 6196871220..a6cfb049fa 100644 --- a/driver/vidc/inc/msm_vidc_inst.h +++ b/driver/vidc/inc/msm_vidc_inst.h @@ -39,28 +39,16 @@ struct msm_vidc_session_ops { int (*extra_count)(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type type); }; -struct msm_vidc_allocations_info { - struct msm_vidc_allocations bin; - struct msm_vidc_allocations arp; - struct msm_vidc_allocations comv; - struct msm_vidc_allocations non_comv; - struct msm_vidc_allocations line; - struct msm_vidc_allocations dpb; - struct msm_vidc_allocations persist; - struct msm_vidc_allocations vpss; - struct msm_vidc_allocations partial_data; -}; - -struct msm_vidc_mappings_info { - struct msm_vidc_mappings bin; - struct msm_vidc_mappings arp; - struct msm_vidc_mappings comv; - struct msm_vidc_mappings non_comv; - struct msm_vidc_mappings line; - struct msm_vidc_mappings dpb; - struct msm_vidc_mappings persist; - struct msm_vidc_mappings vpss; - struct msm_vidc_mappings partial_data; +struct msm_vidc_mem_list_info { + struct msm_vidc_mem_list bin; + struct msm_vidc_mem_list arp; + struct msm_vidc_mem_list comv; + struct msm_vidc_mem_list non_comv; + struct msm_vidc_mem_list line; + struct msm_vidc_mem_list dpb; + struct msm_vidc_mem_list persist; + struct msm_vidc_mem_list vpss; + struct msm_vidc_mem_list partial_data; }; struct msm_vidc_buffers_info { @@ -136,8 +124,7 @@ struct msm_vidc_inst { struct vidc_bus_vote_data bus_data; struct msm_memory_pool pool[MSM_MEM_POOL_MAX]; struct msm_vidc_buffers_info buffers; - struct msm_vidc_mappings_info mappings; - struct msm_vidc_allocations_info allocations; + struct msm_vidc_mem_list_info mem_info; struct msm_vidc_timestamps timestamps; struct msm_vidc_timestamps ts_reorder; /* list of struct msm_vidc_timestamp */ bool subscribed_input_psc; diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 0e250c7a06..c98a5b15dd 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -836,7 +836,7 @@ struct msm_vidc_fence { int fd; }; -struct msm_vidc_alloc { +struct msm_vidc_mem { struct list_head list; enum msm_vidc_buffer_type type; enum msm_vidc_buffer_region region; @@ -854,25 +854,15 @@ struct msm_vidc_alloc { struct dma_buf_map dmabuf_map; #endif void *kvaddr; -}; - -struct msm_vidc_allocations { - struct list_head list; // list of "struct msm_vidc_alloc" -}; - -struct msm_vidc_map { - struct list_head list; - enum msm_vidc_buffer_type type; - enum msm_vidc_buffer_region region; - struct dma_buf *dmabuf; + dma_addr_t device_addr; + unsigned long attrs; u32 refcount; - u64 device_addr; struct sg_table *table; struct dma_buf_attachment *attach; }; -struct msm_vidc_mappings { - struct list_head list; // list of "struct msm_vidc_map" +struct msm_vidc_mem_list { + struct list_head list; // list of "struct msm_vidc_mem" }; struct msm_vidc_buffer { diff --git a/driver/vidc/inc/msm_vidc_memory.h b/driver/vidc/inc/msm_vidc_memory.h index 3e0e643004..0f908c8361 100644 --- a/driver/vidc/inc/msm_vidc_memory.h +++ b/driver/vidc/inc/msm_vidc_memory.h @@ -21,8 +21,7 @@ struct msm_memory_dmabuf { enum msm_memory_pool_type { MSM_MEM_POOL_BUFFER = 0, - MSM_MEM_POOL_MAP, - MSM_MEM_POOL_ALLOC, + MSM_MEM_POOL_ALLOC_MAP, MSM_MEM_POOL_TIMESTAMP, MSM_MEM_POOL_DMABUF, MSM_MEM_POOL_PACKET, @@ -72,14 +71,10 @@ struct msm_vidc_memory_ops { struct dma_buf_attachment *attach); int (*dma_buf_unmap_attachment)(struct msm_vidc_core *core, struct dma_buf_attachment *attach, struct sg_table *table); - int (*memory_map)(struct msm_vidc_core *core, - struct msm_vidc_map *map); - int (*memory_unmap)(struct msm_vidc_core *core, - struct msm_vidc_map *map); - int (*memory_alloc)(struct msm_vidc_core *core, - struct msm_vidc_alloc *alloc); - int (*memory_free)(struct msm_vidc_core *core, - struct msm_vidc_alloc *alloc); + int (*memory_alloc_map)(struct msm_vidc_core *core, + struct msm_vidc_mem *mem); + int (*memory_unmap_free)(struct msm_vidc_core *core, + struct msm_vidc_mem *mem); u32 (*buffer_region)(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type buffer_type); }; diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index aa152d55bb..c510659a5c 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -934,24 +934,15 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) INIT_LIST_HEAD(&inst->buffers.persist.list); INIT_LIST_HEAD(&inst->buffers.vpss.list); INIT_LIST_HEAD(&inst->buffers.partial_data.list); - INIT_LIST_HEAD(&inst->allocations.bin.list); - INIT_LIST_HEAD(&inst->allocations.arp.list); - INIT_LIST_HEAD(&inst->allocations.comv.list); - INIT_LIST_HEAD(&inst->allocations.non_comv.list); - INIT_LIST_HEAD(&inst->allocations.line.list); - INIT_LIST_HEAD(&inst->allocations.dpb.list); - INIT_LIST_HEAD(&inst->allocations.persist.list); - INIT_LIST_HEAD(&inst->allocations.vpss.list); - INIT_LIST_HEAD(&inst->allocations.partial_data.list); - INIT_LIST_HEAD(&inst->mappings.bin.list); - INIT_LIST_HEAD(&inst->mappings.arp.list); - INIT_LIST_HEAD(&inst->mappings.comv.list); - INIT_LIST_HEAD(&inst->mappings.non_comv.list); - INIT_LIST_HEAD(&inst->mappings.line.list); - INIT_LIST_HEAD(&inst->mappings.dpb.list); - INIT_LIST_HEAD(&inst->mappings.persist.list); - INIT_LIST_HEAD(&inst->mappings.vpss.list); - INIT_LIST_HEAD(&inst->mappings.partial_data.list); + INIT_LIST_HEAD(&inst->mem_info.bin.list); + INIT_LIST_HEAD(&inst->mem_info.arp.list); + INIT_LIST_HEAD(&inst->mem_info.comv.list); + INIT_LIST_HEAD(&inst->mem_info.non_comv.list); + INIT_LIST_HEAD(&inst->mem_info.line.list); + INIT_LIST_HEAD(&inst->mem_info.dpb.list); + INIT_LIST_HEAD(&inst->mem_info.persist.list); + INIT_LIST_HEAD(&inst->mem_info.vpss.list); + INIT_LIST_HEAD(&inst->mem_info.partial_data.list); INIT_LIST_HEAD(&inst->children_list); INIT_LIST_HEAD(&inst->firmware_list); INIT_LIST_HEAD(&inst->enc_input_crs); diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index def57702a8..493e6f9a75 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -905,59 +905,29 @@ struct msm_vidc_buffers *msm_vidc_get_buffers( } } -struct msm_vidc_mappings *msm_vidc_get_mappings( +struct msm_vidc_mem_list *msm_vidc_get_mem_info( struct msm_vidc_inst *inst, enum msm_vidc_buffer_type buffer_type, const char *func) { switch (buffer_type) { case MSM_VIDC_BUF_BIN: - return &inst->mappings.bin; + return &inst->mem_info.bin; case MSM_VIDC_BUF_ARP: - return &inst->mappings.arp; + return &inst->mem_info.arp; case MSM_VIDC_BUF_COMV: - return &inst->mappings.comv; + return &inst->mem_info.comv; case MSM_VIDC_BUF_NON_COMV: - return &inst->mappings.non_comv; + return &inst->mem_info.non_comv; case MSM_VIDC_BUF_LINE: - return &inst->mappings.line; + return &inst->mem_info.line; case MSM_VIDC_BUF_DPB: - return &inst->mappings.dpb; + return &inst->mem_info.dpb; case MSM_VIDC_BUF_PERSIST: - return &inst->mappings.persist; + return &inst->mem_info.persist; case MSM_VIDC_BUF_VPSS: - return &inst->mappings.vpss; + return &inst->mem_info.vpss; case MSM_VIDC_BUF_PARTIAL_DATA: - return &inst->mappings.partial_data; - default: - i_vpr_e(inst, "%s: invalid driver buffer type %d\n", - func, buffer_type); - return NULL; - } -} - -struct msm_vidc_allocations *msm_vidc_get_allocations( - struct msm_vidc_inst *inst, enum msm_vidc_buffer_type buffer_type, - const char *func) -{ - switch (buffer_type) { - case MSM_VIDC_BUF_BIN: - return &inst->allocations.bin; - case MSM_VIDC_BUF_ARP: - return &inst->allocations.arp; - case MSM_VIDC_BUF_COMV: - return &inst->allocations.comv; - case MSM_VIDC_BUF_NON_COMV: - return &inst->allocations.non_comv; - case MSM_VIDC_BUF_LINE: - return &inst->allocations.line; - case MSM_VIDC_BUF_DPB: - return &inst->allocations.dpb; - case MSM_VIDC_BUF_PERSIST: - return &inst->allocations.persist; - case MSM_VIDC_BUF_VPSS: - return &inst->allocations.vpss; - case MSM_VIDC_BUF_PARTIAL_DATA: - return &inst->allocations.partial_data; + return &inst->mem_info.partial_data; default: i_vpr_e(inst, "%s: invalid driver buffer type %d\n", func, buffer_type); @@ -3496,10 +3466,8 @@ int msm_vidc_destroy_internal_buffer(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buffer) { struct msm_vidc_buffers *buffers; - struct msm_vidc_allocations *allocations; - struct msm_vidc_mappings *mappings; - struct msm_vidc_alloc *alloc, *alloc_dummy; - struct msm_vidc_map *map, *map_dummy; + struct msm_vidc_mem_list *mem_list; + struct msm_vidc_mem *mem, *mem_dummy; struct msm_vidc_buffer *buf, *dummy; struct msm_vidc_core *core; @@ -3521,27 +3489,15 @@ int msm_vidc_destroy_internal_buffer(struct msm_vidc_inst *inst, buffers = msm_vidc_get_buffers(inst, buffer->type, __func__); if (!buffers) return -EINVAL; - allocations = msm_vidc_get_allocations(inst, buffer->type, __func__); - if (!allocations) - return -EINVAL; - mappings = msm_vidc_get_mappings(inst, buffer->type, __func__); - if (!mappings) + mem_list = msm_vidc_get_mem_info(inst, buffer->type, __func__); + if (!mem_list) return -EINVAL; - list_for_each_entry_safe(map, map_dummy, &mappings->list, list) { - if (map->dmabuf == buffer->dmabuf) { - call_mem_op(core, memory_unmap, core, map); - list_del(&map->list); - msm_vidc_pool_free(inst, map); - break; - } - } - - list_for_each_entry_safe(alloc, alloc_dummy, &allocations->list, list) { - if (alloc->dmabuf == buffer->dmabuf) { - call_mem_op(core, memory_free, core, alloc); - list_del(&alloc->list); - msm_vidc_pool_free(inst, alloc); + list_for_each_entry_safe(mem, mem_dummy, &mem_list->list, list) { + if (mem->dmabuf == buffer->dmabuf) { + call_mem_op(core, memory_unmap_free, core, mem); + list_del(&mem->list); + msm_vidc_pool_free(inst, mem); break; } } @@ -3600,11 +3556,9 @@ int msm_vidc_create_internal_buffer(struct msm_vidc_inst *inst, { int rc = 0; struct msm_vidc_buffers *buffers; - struct msm_vidc_allocations *allocations; - struct msm_vidc_mappings *mappings; + struct msm_vidc_mem_list *mem_list; struct msm_vidc_buffer *buffer; - struct msm_vidc_alloc *alloc; - struct msm_vidc_map *map; + struct msm_vidc_mem *mem; struct msm_vidc_core *core; if (!inst || !inst->core) { @@ -3621,11 +3575,8 @@ int msm_vidc_create_internal_buffer(struct msm_vidc_inst *inst, buffers = msm_vidc_get_buffers(inst, buffer_type, __func__); if (!buffers) return -EINVAL; - allocations = msm_vidc_get_allocations(inst, buffer_type, __func__); - if (!allocations) - return -EINVAL; - mappings = msm_vidc_get_mappings(inst, buffer_type, __func__); - if (!mappings) + mem_list = msm_vidc_get_mem_info(inst, buffer_type, __func__); + if (!mem_list) return -EINVAL; if (!buffers->size) @@ -3642,37 +3593,23 @@ int msm_vidc_create_internal_buffer(struct msm_vidc_inst *inst, buffer->buffer_size = buffers->size; list_add_tail(&buffer->list, &buffers->list); - alloc = msm_vidc_pool_alloc(inst, MSM_MEM_POOL_ALLOC); - if (!alloc) { - i_vpr_e(inst, "%s: alloc failed\n", __func__); + mem = msm_vidc_pool_alloc(inst, MSM_MEM_POOL_ALLOC_MAP); + if (!mem) { + i_vpr_e(inst, "%s: mem poo alloc failed\n", __func__); return -ENOMEM; } - INIT_LIST_HEAD(&alloc->list); - alloc->type = buffer_type; - alloc->region = call_mem_op(core, buffer_region, inst, buffer_type); - alloc->size = buffer->buffer_size; - alloc->secure = is_secure_region(alloc->region); - rc = call_mem_op(core, memory_alloc, core, alloc); + INIT_LIST_HEAD(&mem->list); + mem->type = buffer_type; + mem->region = call_mem_op(core, buffer_region, inst, buffer_type); + mem->size = buffer->buffer_size; + mem->secure = is_secure_region(mem->region); + rc = call_mem_op(core, memory_alloc_map, core, mem); if (rc) return -ENOMEM; - list_add_tail(&alloc->list, &allocations->list); + list_add_tail(&mem->list, &mem_list->list); - map = msm_vidc_pool_alloc(inst, MSM_MEM_POOL_MAP); - if (!map) { - i_vpr_e(inst, "%s: map alloc failed\n", __func__); - return -ENOMEM; - } - INIT_LIST_HEAD(&map->list); - map->type = alloc->type; - map->region = alloc->region; - map->dmabuf = alloc->dmabuf; - rc = call_mem_op(core, memory_map, core, map); - if (rc) - return -ENOMEM; - list_add_tail(&map->list, &mappings->list); - - buffer->dmabuf = alloc->dmabuf; - buffer->device_addr = map->device_addr; + buffer->dmabuf = mem->dmabuf; + buffer->device_addr = mem->device_addr; i_vpr_h(inst, "%s: create: type: %8s, size: %9u, device_addr %#llx\n", __func__, buf_name(buffer_type), buffers->size, buffer->device_addr); diff --git a/driver/vidc/src/msm_vidc_memory.c b/driver/vidc/src/msm_vidc_memory.c index ec3383df9b..80a7bf7aba 100644 --- a/driver/vidc/src/msm_vidc_memory.c +++ b/driver/vidc/src/msm_vidc_memory.c @@ -28,8 +28,7 @@ struct msm_vidc_type_size_name { static const struct msm_vidc_type_size_name buftype_size_name_arr[] = { {MSM_MEM_POOL_BUFFER, sizeof(struct msm_vidc_buffer), "MSM_MEM_POOL_BUFFER" }, - {MSM_MEM_POOL_MAP, sizeof(struct msm_vidc_map), "MSM_MEM_POOL_MAP" }, - {MSM_MEM_POOL_ALLOC, sizeof(struct msm_vidc_alloc), "MSM_MEM_POOL_ALLOC" }, + {MSM_MEM_POOL_ALLOC_MAP, sizeof(struct msm_vidc_mem), "MSM_MEM_POOL_ALLOC_MAP" }, {MSM_MEM_POOL_TIMESTAMP, sizeof(struct msm_vidc_timestamp), "MSM_MEM_POOL_TIMESTAMP" }, {MSM_MEM_POOL_DMABUF, sizeof(struct msm_memory_dmabuf), "MSM_MEM_POOL_DMABUF" }, {MSM_MEM_POOL_PACKET, sizeof(struct hfi_pending_packet) + MSM_MEM_POOL_PACKET_SIZE, @@ -410,112 +409,72 @@ static struct sg_table *msm_vidc_dma_buf_map_attachment( return table; } -static int msm_vidc_memory_map(struct msm_vidc_core *core, struct msm_vidc_map *map) +static int msm_vidc_memory_alloc_map(struct msm_vidc_core *core, struct msm_vidc_mem *mem) { - int rc = 0; - struct dma_buf_attachment *attach = NULL; - struct sg_table *table = NULL; + int size = 0; struct context_bank_info *cb = NULL; - if (!core || !map) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - if (map->refcount) { - map->refcount++; - goto exit; - } - - cb = msm_vidc_get_context_bank_for_region(core, map->region); - if (!cb) { - d_vpr_e("%s: Failed to get context bank device\n", - __func__); - rc = -EIO; - goto error_cb; - } - - /* Prepare a dma buf for dma on the given device */ - attach = msm_vidc_dma_buf_attach(core, map->dmabuf, cb->dev); - if (IS_ERR_OR_NULL(attach)) { - rc = PTR_ERR(attach) ? PTR_ERR(attach) : -ENOMEM; - d_vpr_e("Failed to attach dmabuf\n"); - goto error_attach; - } - - table = msm_vidc_dma_buf_map_attachment(core, attach); - if (IS_ERR_OR_NULL(table)) { - rc = PTR_ERR(table) ? PTR_ERR(table) : -ENOMEM; - d_vpr_e("Failed to map table\n"); - goto error_table; - } - - map->device_addr = sg_dma_address(table->sgl); - map->table = table; - map->attach = attach; - map->refcount++; - -exit: - d_vpr_l( - "%s: type %11s, device_addr %#llx, refcount %d, region %d\n", - __func__, buf_name(map->type), map->device_addr, map->refcount, map->region); - - return 0; - -error_table: - msm_vidc_dma_buf_detach(core, map->dmabuf, attach); -error_attach: -error_cb: - return rc; -} - -static int msm_vidc_memory_unmap(struct msm_vidc_core *core, - struct msm_vidc_map *map) -{ - int rc = 0; - - if (!core || !map) { + if (!mem) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - if (map->refcount) { - map->refcount--; - } else { - d_vpr_e("unmap called while refcount is zero already\n"); + size = ALIGN(mem->size, SZ_4K); + mem->attrs = DMA_ATTR_WRITE_COMBINE; + + cb = msm_vidc_get_context_bank_for_region(core, mem->region); + if (!cb) { + d_vpr_e("%s: Failed to get context bank device\n", + __func__); + return -EIO; + } + + mem->kvaddr = dma_alloc_attrs(cb->dev, size, &mem->device_addr, GFP_KERNEL, + mem->attrs); + if (!mem->kvaddr) { + d_vpr_e("%s: dma_alloc_attrs returned NULL\n", __func__); + return -ENOMEM; + } + + d_vpr_h( + "%s: dmabuf %pK, size %d, buffer_type %s, secure %d, region %d\n", + __func__, mem->kvaddr, mem->size, buf_name(mem->type), + mem->secure, mem->region); + + return 0; +} + +static int msm_vidc_memory_unmap_free(struct msm_vidc_core *core, struct msm_vidc_mem *mem) +{ + int rc = 0; + struct context_bank_info *cb = NULL; + + if (!mem || !mem->device_addr || !mem->kvaddr) { + d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - d_vpr_l( - "%s: type %11s, device_addr %#llx, refcount %d, region %d\n", - __func__, buf_name(map->type), map->device_addr, map->refcount, map->region); + d_vpr_h( + "%s: dmabuf %pK, size %d, kvaddr %pK, buffer_type %s, secure %d, region %d\n", + __func__, mem->device_addr, mem->size, mem->kvaddr, buf_name(mem->type), + mem->secure, mem->region); - if (map->refcount) - goto exit; + cb = msm_vidc_get_context_bank_for_region(core, mem->region); + if (!cb) { + d_vpr_e("%s: Failed to get context bank device\n", + __func__); + return -EIO; + } - msm_vidc_dma_buf_unmap_attachment(core, map->attach, map->table); - msm_vidc_dma_buf_detach(core, map->dmabuf, map->attach); + dma_free_attrs(cb->dev, mem->size, mem->kvaddr, mem->device_addr, + mem->attrs); - map->device_addr = 0x0; - map->attach = NULL; - map->table = NULL; + mem->kvaddr = NULL; + mem->device_addr = 0; -exit: return rc; } -static int msm_vidc_memory_alloc(struct msm_vidc_core *core, struct msm_vidc_alloc *mem) -{ - d_vpr_e("%s: unsupported\n", __func__); - return -EINVAL; -} - -static int msm_vidc_memory_free(struct msm_vidc_core *core, struct msm_vidc_alloc *mem) -{ - d_vpr_e("%s: unsupported\n", __func__); - return -EINVAL; -} - static u32 msm_vidc_buffer_region(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type buffer_type) { @@ -530,10 +489,8 @@ static struct msm_vidc_memory_ops msm_mem_ops = { .dma_buf_detach = msm_vidc_dma_buf_detach, .dma_buf_map_attachment = msm_vidc_dma_buf_map_attachment, .dma_buf_unmap_attachment = msm_vidc_dma_buf_unmap_attachment, - .memory_map = msm_vidc_memory_map, - .memory_unmap = msm_vidc_memory_unmap, - .memory_alloc = msm_vidc_memory_alloc, - .memory_free = msm_vidc_memory_free, + .memory_alloc_map = msm_vidc_memory_alloc_map, + .memory_unmap_free = msm_vidc_memory_unmap_free, .buffer_region = msm_vidc_buffer_region, }; diff --git a/driver/vidc/src/msm_vidc_memory_ext.c b/driver/vidc/src/msm_vidc_memory_ext.c index c575514a64..50712b45ce 100644 --- a/driver/vidc/src/msm_vidc_memory_ext.c +++ b/driver/vidc/src/msm_vidc_memory_ext.c @@ -79,7 +79,7 @@ static struct dma_buf_attachment *msm_vidc_dma_buf_attach_ext(struct msm_vidc_co return attach; } -static int msm_vidc_memory_free_ext(struct msm_vidc_core *core, struct msm_vidc_alloc *mem) +static int msm_vidc_memory_free_ext(struct msm_vidc_core *core, struct msm_vidc_mem *mem) { int rc = 0; @@ -114,7 +114,7 @@ static int msm_vidc_memory_free_ext(struct msm_vidc_core *core, struct msm_vidc_ return rc; } -static int msm_vidc_memory_alloc_ext(struct msm_vidc_core *core, struct msm_vidc_alloc *mem) +static int msm_vidc_memory_alloc_ext(struct msm_vidc_core *core, struct msm_vidc_mem *mem) { int rc = 0; int size = 0; @@ -224,39 +224,39 @@ error: return rc; } -static int msm_vidc_memory_map_ext(struct msm_vidc_core *core, struct msm_vidc_map *map) +static int msm_vidc_memory_map_ext(struct msm_vidc_core *core, struct msm_vidc_mem *mem) { int rc = 0; struct dma_buf_attachment *attach = NULL; struct sg_table *table = NULL; struct context_bank_info *cb = NULL; - if (!core || !map) { + if (!core || !mem) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - if (map->refcount) { - map->refcount++; + if (mem->refcount) { + mem->refcount++; goto exit; } /* reject non-secure mapping request for a secure buffer(or vice versa) */ - if (map->region == MSM_VIDC_NON_SECURE || map->region == MSM_VIDC_NON_SECURE_PIXEL) { - if (!is_non_secure_buffer(map->dmabuf)) { + if (mem->region == MSM_VIDC_NON_SECURE || mem->region == MSM_VIDC_NON_SECURE_PIXEL) { + if (!is_non_secure_buffer(mem->dmabuf)) { d_vpr_e("%s: secure buffer mapping to non-secure region %d not allowed\n", - __func__, map->region); + __func__, mem->region); return -EINVAL; } } else { - if (is_non_secure_buffer(map->dmabuf)) { + if (is_non_secure_buffer(mem->dmabuf)) { d_vpr_e("%s: non-secure buffer mapping to secure region %d not allowed\n", - __func__, map->region); + __func__, mem->region); return -EINVAL; } } - cb = msm_vidc_get_context_bank_for_region(core, map->region); + cb = msm_vidc_get_context_bank_for_region(core, mem->region); if (!cb) { d_vpr_e("%s: Failed to get context bank device\n", __func__); @@ -265,7 +265,7 @@ static int msm_vidc_memory_map_ext(struct msm_vidc_core *core, struct msm_vidc_m } /* Prepare a dma buf for dma on the given device */ - attach = msm_vidc_dma_buf_attach_ext(core, map->dmabuf, cb->dev); + attach = msm_vidc_dma_buf_attach_ext(core, mem->dmabuf, cb->dev); if (IS_ERR_OR_NULL(attach)) { rc = PTR_ERR(attach) ? PTR_ERR(attach) : -ENOMEM; d_vpr_e("Failed to attach dmabuf\n"); @@ -279,24 +279,59 @@ static int msm_vidc_memory_map_ext(struct msm_vidc_core *core, struct msm_vidc_m goto error_table; } - map->device_addr = sg_dma_address(table->sgl); - map->table = table; - map->attach = attach; - map->refcount++; + mem->device_addr = sg_dma_address(table->sgl); + mem->table = table; + mem->attach = attach; + mem->refcount++; exit: d_vpr_l("%s: type %11s, device_addr %#llx, refcount %d, region %d\n", - __func__, buf_name(map->type), map->device_addr, map->refcount, map->region); + __func__, buf_name(mem->type), mem->device_addr, mem->refcount, mem->region); return 0; error_table: - call_mem_op(core, dma_buf_detach, core, map->dmabuf, attach); + call_mem_op(core, dma_buf_detach, core, mem->dmabuf, attach); error_attach: error_cb: return rc; } +static int msm_vidc_memory_unmap_ext(struct msm_vidc_core *core, + struct msm_vidc_mem *mem) +{ + int rc = 0; + + if (!core || !mem) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (mem->refcount) { + mem->refcount--; + } else { + d_vpr_e("unmap called while refcount is zero already\n"); + return -EINVAL; + } + + d_vpr_l( + "%s: type %11s, device_addr %#llx, refcount %d, region %d\n", + __func__, buf_name(mem->type), mem->device_addr, mem->refcount, mem->region); + + if (mem->refcount) + goto exit; + + call_mem_op(core, dma_buf_unmap_attachment, core, mem->attach, mem->table); + call_mem_op(core, dma_buf_detach, core, mem->dmabuf, mem->attach); + + mem->device_addr = 0x0; + mem->attach = NULL; + mem->table = NULL; + +exit: + return rc; +} + static u32 msm_vidc_buffer_region_ext(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type buffer_type) { @@ -379,17 +414,54 @@ static u32 msm_vidc_buffer_region_ext(struct msm_vidc_inst *inst, return region; } +static int msm_vidc_memory_alloc_map_ext(struct msm_vidc_core *core, struct msm_vidc_mem *mem) +{ + int rc = 0; + + rc = msm_vidc_memory_alloc_ext(core, mem); + if (rc) { + d_vpr_e("%s: memory_alloc failed\n", __func__); + return -EINVAL; + } + + rc = msm_vidc_memory_map_ext(core, mem); + if (rc) { + d_vpr_e("%s: memory_map failed\n", __func__); + return -EINVAL; + } + + return rc; +} + +static int msm_vidc_memory_unmap_free_ext(struct msm_vidc_core *core, struct msm_vidc_mem *mem) +{ + int rc = 0; + + rc = msm_vidc_memory_unmap_ext(core, mem); + if (rc) { + d_vpr_e("%s: memory_unmap failed\n", __func__); + return -EINVAL; + } + + rc = msm_vidc_memory_free_ext(core, mem); + if (rc) { + d_vpr_e("%s: memory_free failed\n", __func__); + return -EINVAL; + } + + return rc; +} + struct msm_vidc_memory_ops *get_mem_ops_ext(void) { struct msm_vidc_memory_ops *mem_ops = get_mem_ops(); static struct msm_vidc_memory_ops mem_ops_ext; memcpy(&mem_ops_ext, mem_ops, sizeof(struct msm_vidc_memory_ops)); - mem_ops_ext.dma_buf_attach = msm_vidc_dma_buf_attach_ext; - mem_ops_ext.memory_free = msm_vidc_memory_free_ext; - mem_ops_ext.memory_alloc = msm_vidc_memory_alloc_ext; - mem_ops_ext.memory_map = msm_vidc_memory_map_ext; - mem_ops_ext.buffer_region = msm_vidc_buffer_region_ext; + mem_ops_ext.dma_buf_attach = msm_vidc_dma_buf_attach_ext; + mem_ops_ext.memory_alloc_map = msm_vidc_memory_alloc_map_ext; + mem_ops_ext.memory_unmap_free = msm_vidc_memory_unmap_free_ext; + mem_ops_ext.buffer_region = msm_vidc_buffer_region_ext; return &mem_ops_ext; } diff --git a/driver/vidc/src/venus_hfi_queue.c b/driver/vidc/src/venus_hfi_queue.c index 6fe2aaf82f..f4e2a07a71 100644 --- a/driver/vidc/src/venus_hfi_queue.c +++ b/driver/vidc/src/venus_hfi_queue.c @@ -424,10 +424,8 @@ void venus_hfi_queue_deinit(struct msm_vidc_core *core) return; } - call_mem_op(core, memory_unmap, core, &core->iface_q_table.map); - call_mem_op(core, memory_free, core, &core->iface_q_table.alloc); - call_mem_op(core, memory_unmap, core, &core->sfr.map); - call_mem_op(core, memory_free, core, &core->sfr.alloc); + call_mem_op(core, memory_unmap_free, core, &core->iface_q_table.mem); + call_mem_op(core, memory_unmap_free, core, &core->sfr.mem); for (i = 0; i < VIDC_IFACEQ_NUMQ; i++) { core->iface_queues[i].q_hdr = NULL; @@ -487,8 +485,7 @@ int venus_hfi_queue_init(struct msm_vidc_core *core) struct hfi_queue_table_header *q_tbl_hdr; struct hfi_queue_header *q_hdr; struct msm_vidc_iface_q_info *iface_q; - struct msm_vidc_alloc alloc; - struct msm_vidc_map map; + struct msm_vidc_mem mem; int offset = 0; u32 i; @@ -500,39 +497,28 @@ int venus_hfi_queue_init(struct msm_vidc_core *core) return 0; } - memset(&alloc, 0, sizeof(alloc)); - alloc.type = MSM_VIDC_BUF_QUEUE; - alloc.region = MSM_VIDC_NON_SECURE; - alloc.size = TOTAL_QSIZE; - alloc.secure = false; - alloc.map_kernel = true; - rc = call_mem_op(core, memory_alloc, core, &alloc); + memset(&mem, 0, sizeof(mem)); + mem.type = MSM_VIDC_BUF_QUEUE; + mem.region = MSM_VIDC_NON_SECURE; + mem.size = TOTAL_QSIZE; + mem.secure = false; + mem.map_kernel = true; + rc = call_mem_op(core, memory_alloc_map, core, &mem); if (rc) { - d_vpr_e("%s: alloc failed\n", __func__); + d_vpr_e("%s: alloc and map failed\n", __func__); goto fail_alloc_queue; } - core->iface_q_table.align_virtual_addr = alloc.kvaddr; - core->iface_q_table.alloc = alloc; - - memset(&map, 0, sizeof(map)); - map.type = alloc.type; - map.region = alloc.region; - map.dmabuf = alloc.dmabuf; - rc = call_mem_op(core, memory_map, core, &map); - if (rc) { - d_vpr_e("%s: alloc failed\n", __func__); - goto fail_alloc_queue; - } - core->iface_q_table.align_device_addr = map.device_addr; - core->iface_q_table.map = map; + core->iface_q_table.align_virtual_addr = mem.kvaddr; + core->iface_q_table.align_device_addr = mem.device_addr; + core->iface_q_table.mem = mem; core->iface_q_table.mem_size = VIDC_IFACEQ_TABLE_SIZE; offset += core->iface_q_table.mem_size; for (i = 0; i < VIDC_IFACEQ_NUMQ; i++) { iface_q = &core->iface_queues[i]; - iface_q->q_array.align_device_addr = map.device_addr + offset; - iface_q->q_array.align_virtual_addr = (void*)((char*)alloc.kvaddr + offset); + iface_q->q_array.align_device_addr = mem.device_addr + offset; + iface_q->q_array.align_virtual_addr = (void *)((char *)mem.kvaddr + offset); iface_q->q_array.mem_size = VIDC_IFACEQ_QUEUE_SIZE; offset += iface_q->q_array.mem_size; iface_q->q_hdr = VIDC_IFACEQ_GET_QHDR_START_ADDR( @@ -572,31 +558,20 @@ int venus_hfi_queue_init(struct msm_vidc_core *core) q_hdr->qhdr_rx_req = 0; /* sfr buffer */ - memset(&alloc, 0, sizeof(alloc)); - alloc.type = MSM_VIDC_BUF_QUEUE; - alloc.region = MSM_VIDC_NON_SECURE; - alloc.size = ALIGNED_SFR_SIZE; - alloc.secure = false; - alloc.map_kernel = true; - rc = call_mem_op(core, memory_alloc, core, &alloc); + memset(&mem, 0, sizeof(mem)); + mem.type = MSM_VIDC_BUF_QUEUE; + mem.region = MSM_VIDC_NON_SECURE; + mem.size = ALIGNED_SFR_SIZE; + mem.secure = false; + mem.map_kernel = true; + rc = call_mem_op(core, memory_alloc_map, core, &mem); if (rc) { - d_vpr_e("%s: sfr alloc failed\n", __func__); + d_vpr_e("%s: sfr alloc and map failed\n", __func__); goto fail_alloc_queue; } - core->sfr.align_virtual_addr = alloc.kvaddr; - core->sfr.alloc = alloc; - - memset(&map, 0, sizeof(map)); - map.type = alloc.type; - map.region = alloc.region; - map.dmabuf = alloc.dmabuf; - rc = call_mem_op(core, memory_map, core, &map); - if (rc) { - d_vpr_e("%s: sfr map failed\n", __func__); - goto fail_alloc_queue; - } - core->sfr.align_device_addr = map.device_addr; - core->sfr.map = map; + core->sfr.align_virtual_addr = mem.kvaddr; + core->sfr.align_device_addr = mem.device_addr; + core->sfr.mem = mem; core->sfr.mem_size = ALIGNED_SFR_SIZE; /* write sfr buffer size in first word */ From 1a42efcaef2caf74ee63d2b62b5a058786da44ae Mon Sep 17 00:00:00 2001 From: Vikash Garodia Date: Mon, 19 Dec 2022 12:29:08 +0530 Subject: [PATCH 0782/1061] video: driver: add sanity check for iommu domain Ensure the associated iommu domain is valid for the given context bank. Error out if there is no valid domain. Change-Id: I0ac601cc9bf306811145663e4a6ca293c0a3e3cb Signed-off-by: Vikash Garodia --- driver/vidc/src/msm_vidc_probe.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/driver/vidc/src/msm_vidc_probe.c b/driver/vidc/src/msm_vidc_probe.c index d3471a4392..904d45fa67 100644 --- a/driver/vidc/src/msm_vidc_probe.c +++ b/driver/vidc/src/msm_vidc_probe.c @@ -375,6 +375,10 @@ static int msm_vidc_setup_context_bank(struct msm_vidc_core *core, /* populate dev & domain field */ cb->dev = dev; cb->domain = iommu_get_domain_for_dev(cb->dev); + if (!cb->domain) { + d_vpr_e("%s: Failed to get iommu domain for %s\n", __func__, dev_name(dev)); + return -EIO; + } if (cb->dma_mask) { rc = dma_set_mask_and_coherent(cb->dev, cb->dma_mask); From 4716d7bc72c576da9a2b9f84686ddc3f2b27fbb8 Mon Sep 17 00:00:00 2001 From: Maheshwar Ajja Date: Fri, 16 Dec 2022 18:16:52 -0800 Subject: [PATCH 0783/1061] video: driver: set force mem and pheripheral on flags Set mvs0c clock flags (force mem and pheripheral on). Change-Id: I52380a30a4c74d9658f989377b5c77209cd8a33e Signed-off-by: Maheshwar Ajja --- driver/variant/iris33/src/msm_vidc_iris33.c | 19 +++++++++++++++++ driver/vidc/inc/resources.h | 4 ++++ driver/vidc/src/resources.c | 23 +++++++++++++++++++++ 3 files changed, 46 insertions(+) diff --git a/driver/variant/iris33/src/msm_vidc_iris33.c b/driver/variant/iris33/src/msm_vidc_iris33.c index 70421da0af..cff1e847e3 100644 --- a/driver/variant/iris33/src/msm_vidc_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_iris33.c @@ -434,6 +434,15 @@ static int __power_off_iris33_controller(struct msm_vidc_core *core) rc = call_res_op(core, reset_control_assert, core, "video_axi_reset"); if (rc) d_vpr_e("%s: assert video_axi_reset failed\n", __func__); + /* set retain mem and peripheral before asset mvs0c reset */ + rc = call_res_op(core, clk_set_flag, core, + "video_cc_mvs0c_clk", CLKFLAG_RETAIN_MEM); + if (rc) + d_vpr_e("%s: set retain mem failed\n", __func__); + rc = call_res_op(core, clk_set_flag, core, + "video_cc_mvs0c_clk", CLKFLAG_RETAIN_PERIPH); + if (rc) + d_vpr_e("%s: set retain peripheral failed\n", __func__); rc = call_res_op(core, reset_control_assert, core, "video_mvs0c_reset"); if (rc) d_vpr_e("%s: assert video_mvs0c_reset failed\n", __func__); @@ -487,6 +496,16 @@ static int __power_off_iris33_controller(struct msm_vidc_core *core) if (rc) return rc; + /* remove retain mem and retain peripheral */ + rc = call_res_op(core, clk_set_flag, core, + "video_cc_mvs0c_clk", CLKFLAG_NORETAIN_PERIPH); + if (rc) + d_vpr_e("%s: set noretain peripheral failed\n", __func__); + rc = call_res_op(core, clk_set_flag, core, + "video_cc_mvs0c_clk", CLKFLAG_NORETAIN_MEM); + if (rc) + d_vpr_e("%s: set noretain mem failed\n", __func__); + /* Turn off MVP MVS0C core clock */ rc = call_res_op(core, clk_disable, core, "video_cc_mvs0c_clk"); if (rc) { diff --git a/driver/vidc/inc/resources.h b/driver/vidc/inc/resources.h index f945f5e5fd..830ca2d796 100644 --- a/driver/vidc/inc/resources.h +++ b/driver/vidc/inc/resources.h @@ -6,6 +6,8 @@ #ifndef _MSM_VIDC_RESOURCES_H_ #define _MSM_VIDC_RESOURCES_H_ +#include + struct icc_path; struct regulator; struct clk; @@ -223,6 +225,8 @@ struct msm_vidc_resources_ops { int (*clk_disable)(struct msm_vidc_core *core, const char *name); int (*clk_enable)(struct msm_vidc_core *core, const char *name); + int (*clk_set_flag)(struct msm_vidc_core *core, + const char *name, enum branch_mem_flags flag); }; const struct msm_vidc_resources_ops *get_resources_ops(void); diff --git a/driver/vidc/src/resources.c b/driver/vidc/src/resources.c index 291a376d63..ca4ca83a1e 100644 --- a/driver/vidc/src/resources.c +++ b/driver/vidc/src/resources.c @@ -346,6 +346,28 @@ static int __init_clocks(struct msm_vidc_core *core) return rc; } +static int __clock_set_flag(struct msm_vidc_core *core, + const char *name, enum branch_mem_flags flag) +{ + struct clock_info *cinfo = NULL; + bool found = false; + + /* get clock handle */ + venus_hfi_for_each_clock(core, cinfo) { + if (strcmp(cinfo->name, name)) + continue; + found = true; + qcom_clk_set_flags(cinfo->clk, flag); + d_vpr_h("%s: set flag %d on clock %s\n", __func__, flag, name); + break; + } + if (!found) { + d_vpr_e("%s: failed to find clock: %s\n", __func__, name); + return -EINVAL; + } + return 0; +} + static int __init_reset_clocks(struct msm_vidc_core *core) { const struct clk_rst_table *rst_tbl; @@ -1437,6 +1459,7 @@ static const struct msm_vidc_resources_ops res_ops = { .set_clks = __set_clocks, .clk_enable = __prepare_enable_clock, .clk_disable = __disable_unprepare_clock, + .clk_set_flag = __clock_set_flag, }; const struct msm_vidc_resources_ops *get_resources_ops(void) From 9e8ced68f37ff2e80b17a5aa3d46e3b9e6eb3fef Mon Sep 17 00:00:00 2001 From: Ankush Mitra Date: Wed, 21 Dec 2022 12:40:41 +0530 Subject: [PATCH 0784/1061] video: driver: Pineapple CAP Database fix Fix the issue in pineapple CAP Database for SLICE_DECODE. Change-Id: I1b4dc51bbb23634aa372eba35b18ca9b6caada2d Signed-off-by: Ankush Mitra --- .../pineapple/src/msm_vidc_pineapple.c | 21 ++++++++++++++++--- 1 file changed, 18 insertions(+), 3 deletions(-) diff --git a/driver/platform/pineapple/src/msm_vidc_pineapple.c b/driver/platform/pineapple/src/msm_vidc_pineapple.c index 2a46c862f0..192e9679ab 100644 --- a/driver/platform/pineapple/src/msm_vidc_pineapple.c +++ b/driver/platform/pineapple/src/msm_vidc_pineapple.c @@ -1982,11 +1982,16 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine NULL, msm_vidc_set_u32}, - {META_OUTBUF_FENCE, DEC, H264|HEVC|VP9|AV1, + {META_OUTBUF_FENCE, DEC, H264|HEVC|AV1, {LOWLATENCY_MODE, SLICE_DECODE}, msm_vidc_adjust_dec_outbuf_fence, NULL}, + {META_OUTBUF_FENCE, DEC, VP9, + {LOWLATENCY_MODE}, + msm_vidc_adjust_dec_outbuf_fence, + NULL}, + {HFLIP, ENC, CODECS_ALL, {0}, NULL, @@ -2110,11 +2115,16 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine msm_vidc_adjust_enc_lowlatency_mode, NULL}, - {LOWLATENCY_MODE, DEC, H264|HEVC|VP9|AV1, + {LOWLATENCY_MODE, DEC, H264|HEVC|AV1, {STAGE, SLICE_DECODE}, msm_vidc_adjust_dec_lowlatency_mode, NULL}, + {LOWLATENCY_MODE, DEC, VP9, + {STAGE}, + msm_vidc_adjust_dec_lowlatency_mode, + NULL}, + {LTR_COUNT, ENC, H264|HEVC, {0}, msm_vidc_adjust_ltr_count, @@ -2361,11 +2371,16 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine NULL, NULL}, - {OUTPUT_ORDER, DEC, H264|HEVC|VP9|AV1, + {OUTPUT_ORDER, DEC, H264|HEVC|AV1, {META_OUTBUF_FENCE, SLICE_DECODE}, msm_vidc_adjust_output_order, msm_vidc_set_u32}, + {OUTPUT_ORDER, DEC, VP9, + {META_OUTBUF_FENCE}, + msm_vidc_adjust_output_order, + msm_vidc_set_u32}, + {INPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL, {0}, msm_vidc_adjust_input_buf_host_max_count, From 4f8d8b7f33aa30686ed68e1f15e7c7eb3418b795 Mon Sep 17 00:00:00 2001 From: Manikanta Kanamarlapudi Date: Mon, 5 Dec 2022 13:02:19 +0530 Subject: [PATCH 0785/1061] msm: vidc: Increase min o/p buffer count for AV1 Increase minumim output buffer count from 9 to 11 for AV1 decoder. Change-Id: I22c7d03c5ed0e3eba159c9009f4e313fe7b4b5cb Signed-off-by: Manikanta Kanamarlapudi --- driver/vidc/src/msm_vidc_buffer.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/driver/vidc/src/msm_vidc_buffer.c b/driver/vidc/src/msm_vidc_buffer.c index 78f90eb5c7..054ea17f8b 100644 --- a/driver/vidc/src/msm_vidc_buffer.c +++ b/driver/vidc/src/msm_vidc_buffer.c @@ -70,9 +70,11 @@ u32 msm_vidc_output_min_count(struct msm_vidc_inst *inst) output_min_count = 4; break; case MSM_VIDC_VP9: - case MSM_VIDC_AV1: output_min_count = 9; break; + case MSM_VIDC_AV1: + output_min_count = 11; + break; case MSM_VIDC_HEIC: output_min_count = 3; break; From bbcd8f6db37a43a5201680a3a8d3b776778e9d47 Mon Sep 17 00:00:00 2001 From: tkashyap Date: Wed, 21 Dec 2022 16:19:14 -0800 Subject: [PATCH 0786/1061] video: driver: Use iommu.h instead of dma-iommu.h Change-Id: If8e6e192e3320c36484e8348f3cb4215618867fb --- driver/vidc/src/msm_vidc_probe.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/driver/vidc/src/msm_vidc_probe.c b/driver/vidc/src/msm_vidc_probe.c index d3471a4392..064e53d914 100644 --- a/driver/vidc/src/msm_vidc_probe.c +++ b/driver/vidc/src/msm_vidc_probe.c @@ -11,7 +11,10 @@ #include #include #include +#include +#if (LINUX_VERSION_CODE < KERNEL_VERSION(5, 16, 0)) #include +#endif #ifdef CONFIG_MSM_MMRM #include #endif From e15f3afabd67c439dd2b5739b985300daa2213d6 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Fri, 23 Dec 2022 20:54:53 +0530 Subject: [PATCH 0787/1061] video: driver: add clock residency calculation support Add logic to derive clock residency values for each frequency levels. Change-Id: Iadad29d2733cb083fce627999a31dd96475b73c1 Signed-off-by: Govindaraj Rajagopal --- driver/vidc/inc/msm_vidc_driver.h | 2 + driver/vidc/inc/resources.h | 10 ++ driver/vidc/src/msm_vidc.c | 5 + driver/vidc/src/msm_vidc_driver.c | 28 ++++ driver/vidc/src/resources.c | 248 ++++++++++++++++++++++++++++-- 5 files changed, 281 insertions(+), 12 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index cf242e721d..ec9785ab66 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -439,6 +439,8 @@ int msm_vidc_change_core_sub_state(struct msm_vidc_core *core, int msm_vidc_core_init(struct msm_vidc_core *core); int msm_vidc_core_init_wait(struct msm_vidc_core *core); int msm_vidc_core_deinit(struct msm_vidc_core *core, bool force); +int msm_vidc_print_residency_stats(struct msm_vidc_core *core); +int msm_vidc_reset_residency_stats(struct msm_vidc_core *core); int msm_vidc_core_deinit_locked(struct msm_vidc_core *core, bool force); int msm_vidc_inst_timeout(struct msm_vidc_inst *inst); int msm_vidc_print_buffer_info(struct msm_vidc_inst *inst); diff --git a/driver/vidc/inc/resources.h b/driver/vidc/inc/resources.h index 830ca2d796..faa97f4906 100644 --- a/driver/vidc/inc/resources.h +++ b/driver/vidc/inc/resources.h @@ -117,6 +117,13 @@ struct regulator_set { u32 count; }; +struct clock_residency { + struct list_head list; + u64 rate; + u64 start_time_us; + u64 total_time_us; +}; + struct clock_info { struct clk *clk; const char *name; @@ -126,6 +133,7 @@ struct clock_info { #ifdef CONFIG_MSM_MMRM struct mmrm_client *mmrm_client; #endif + struct list_head residency_list; /* list of struct clock_residency */ }; struct clock_set { @@ -227,6 +235,8 @@ struct msm_vidc_resources_ops { int (*clk_enable)(struct msm_vidc_core *core, const char *name); int (*clk_set_flag)(struct msm_vidc_core *core, const char *name, enum branch_mem_flags flag); + int (*clk_print_residency_stats)(struct msm_vidc_core *core); + int (*clk_reset_residency_stats)(struct msm_vidc_core *core); }; const struct msm_vidc_resources_ops *get_resources_ops(void); diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index c510659a5c..dbf212dfc5 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -992,6 +992,10 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) i_vpr_e(inst, "%s: failed to get session id\n", __func__); goto error; } + + /* reset clock residency stats */ + msm_vidc_reset_residency_stats(core); + msm_vidc_scale_power(inst, true); rc = msm_vidc_session_open(inst); @@ -1031,6 +1035,7 @@ int msm_vidc_close(void *instance) inst_lock(inst, __func__); /* print final stats */ msm_vidc_print_stats(inst); + msm_vidc_print_residency_stats(core); msm_vidc_session_close(inst); msm_vidc_event_queue_deinit(inst); msm_vidc_vb2_queue_deinit(inst); diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index cb7b098ecd..510f857cf9 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -4726,6 +4726,34 @@ unlock: return rc; } +int msm_vidc_print_residency_stats(struct msm_vidc_core *core) +{ + int rc = 0; + + core_lock(core, __func__); + rc = call_res_op(core, clk_print_residency_stats, core); + if (rc) + goto unlock; + +unlock: + core_unlock(core, __func__); + return rc; +} + +int msm_vidc_reset_residency_stats(struct msm_vidc_core *core) +{ + int rc = 0; + + core_lock(core, __func__); + rc = call_res_op(core, clk_reset_residency_stats, core); + if (rc) + goto unlock; + +unlock: + core_unlock(core, __func__); + return rc; +} + int msm_vidc_inst_timeout(struct msm_vidc_inst *inst) { int rc = 0; diff --git a/driver/vidc/src/resources.c b/driver/vidc/src/resources.c index ca4ca83a1e..b730038818 100644 --- a/driver/vidc/src/resources.c +++ b/driver/vidc/src/resources.c @@ -288,11 +288,13 @@ static int __init_regulators(struct msm_vidc_core *core) static int __init_clocks(struct msm_vidc_core *core) { + struct clock_residency *residency = NULL; const struct clk_table *clk_tbl; + struct freq_table *freq_tbl; struct clock_set *clocks; struct clock_info *cinfo = NULL; - u32 clk_count = 0, cnt = 0; - int rc = 0; + u32 clk_count = 0, freq_count = 0; + int fcnt = 0, cnt = 0, rc = 0; if (!core || !core->resource || !core->platform) { d_vpr_e("%s: invalid params\n", __func__); @@ -325,6 +327,42 @@ static int __init_clocks(struct msm_vidc_core *core) clocks->clock_tbl[cnt].has_scaling = clk_tbl[cnt].scaling; } + freq_tbl = core->platform->data.freq_tbl; + freq_count = core->platform->data.freq_tbl_size; + + /* populate clk residency stats table */ + for (cnt = 0; cnt < clocks->count; cnt++) { + /* initialize residency_list */ + INIT_LIST_HEAD(&clocks->clock_tbl[cnt].residency_list); + + /* skip if scaling not supported */ + if (!clocks->clock_tbl[cnt].has_scaling) + continue; + + for (fcnt = 0; fcnt < freq_count; fcnt++) { + residency = devm_kzalloc(&core->pdev->dev, + sizeof(struct clock_residency), GFP_KERNEL); + if (!residency) { + d_vpr_e("%s: failed to alloc clk residency stat node\n", __func__); + return -ENOMEM; + } + + if (!freq_tbl) { + d_vpr_e("%s: invalid freq tbl %#x\n", __func__, freq_tbl); + return -EINVAL; + } + + /* update residency node */ + residency->rate = freq_tbl[fcnt].freq; + residency->start_time_us = 0; + residency->total_time_us = 0; + INIT_LIST_HEAD(&residency->list); + + /* add entry into residency_list */ + list_add_tail(&residency->list, &clocks->clock_tbl[cnt].residency_list); + } + } + /* print clock fields */ venus_hfi_for_each_clock(core, cinfo) { d_vpr_h("%s: clock name %s clock id %#x scaling %d\n", @@ -1066,6 +1104,133 @@ static int set_bw(struct msm_vidc_core *core, unsigned long bw_ddr, return __vote_buses(core, bw_ddr, bw_llcc); } +static int print_residency_stats(struct msm_vidc_core *core, struct clock_info *cl) +{ + struct clock_residency *residency = NULL; + u64 total_time_us = 0; + int rc = 0; + + if (!core || !cl) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + /* skip if scaling not supported */ + if (!cl->has_scaling) + return 0; + + /* grand total residency time */ + list_for_each_entry(residency, &cl->residency_list, list) + total_time_us += residency->total_time_us; + + /* sanity check to avoid divide by 0 */ + total_time_us = (total_time_us > 0) ? total_time_us : 1; + + /* print residency percent for each clock */ + list_for_each_entry(residency, &cl->residency_list, list) { + d_vpr_h("%s: %s clock rate [%d] total %lluus residency %u%%\n", + __func__, cl->name, residency->rate, residency->total_time_us, + residency->total_time_us * 100 / total_time_us); + } + + return rc; +} + +static int reset_residency_stats(struct msm_vidc_core *core, struct clock_info *cl) +{ + struct clock_residency *residency = NULL; + int rc = 0; + + if (!core || !cl) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + /* skip if scaling not supported */ + if (!cl->has_scaling) + return 0; + + d_vpr_h("%s: reset %s residency stats\n", __func__, cl->name); + + /* reset clock residency stats */ + list_for_each_entry(residency, &cl->residency_list, list) { + residency->start_time_us = 0; + residency->total_time_us = 0; + } + + return rc; +} + +static struct clock_residency *get_residency_stats(struct clock_info *cl, u64 rate) +{ + struct clock_residency *residency = NULL; + bool found = false; + + if (!cl) { + d_vpr_e("%s: invalid params\n", __func__); + return NULL; + } + + list_for_each_entry(residency, &cl->residency_list, list) { + if (residency->rate == rate) { + found = true; + break; + } + } + + return found ? residency : NULL; +} + +static int update_residency_stats( + struct msm_vidc_core *core, struct clock_info *cl, u64 rate) +{ + struct clock_residency *cur_residency = NULL, *prev_residency = NULL; + u64 cur_time_us = 0; + int rc = 0; + + if (!core || !cl) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + /* skip update if scaling not supported */ + if (!cl->has_scaling) + return 0; + + /* skip update if rate not changed */ + if (rate == cl->prev) + return 0; + + /* get current time in ns */ + cur_time_us = ktime_get_ns() / 1000; + + /* update previous rate residency end or total time */ + prev_residency = get_residency_stats(cl, cl->prev); + if (prev_residency) { + if (prev_residency->start_time_us) + prev_residency->total_time_us = cur_time_us - prev_residency->start_time_us; + + /* reset start time us */ + prev_residency->start_time_us = 0; + } + + /* clk disable case - no need to update new entry */ + if (rate == 0) + return 0; + + /* check if rate entry is present */ + cur_residency = get_residency_stats(cl, rate); + if (!cur_residency) { + d_vpr_e("%s: entry not found. rate %llu\n", __func__, rate); + return -EINVAL; + } + + /* update residency start time for current rate/freq */ + cur_residency->start_time_us = cur_time_us; + + return rc; +} + #ifdef CONFIG_MSM_MMRM static int __set_clk_rate(struct msm_vidc_core *core, struct clock_info *cl, u64 rate) @@ -1073,6 +1238,7 @@ static int __set_clk_rate(struct msm_vidc_core *core, struct clock_info *cl, int rc = 0; struct mmrm_client_data client_data; struct mmrm_client *client; + u64 srate; /* not registered */ if (!core || !cl || !core->platform) { @@ -1085,37 +1251,41 @@ static int __set_clk_rate(struct msm_vidc_core *core, struct clock_info *cl, return -EINVAL; } + /* update clock residency stats */ + update_residency_stats(core, cl, rate); + /* * This conversion is necessary since we are scaling clock values based on * the branch clock. However, mmrm driver expects source clock to be registered * and used for scaling. * TODO: Remove this scaling if using source clock instead of branch clock. */ - rate = rate * MSM_VIDC_CLOCK_SOURCE_SCALING_RATIO; + srate = rate * MSM_VIDC_CLOCK_SOURCE_SCALING_RATIO; /* bail early if requested clk rate is not changed */ if (rate == cl->prev) return 0; - d_vpr_p("Scaling clock %s to %llu, prev %llu\n", cl->name, rate, cl->prev); + d_vpr_p("Scaling clock %s to %llu, prev %llu\n", + cl->name, srate, cl->prev * MSM_VIDC_CLOCK_SOURCE_SCALING_RATIO); if (is_mmrm_supported(core)) { /* set clock rate to mmrm driver */ client = cl->mmrm_client; memset(&client_data, 0, sizeof(client_data)); client_data.num_hw_blocks = 1; - rc = mmrm_client_set_value(client, &client_data, rate); + rc = mmrm_client_set_value(client, &client_data, srate); if (rc) { d_vpr_e("%s: Failed to set mmrm clock rate %llu %s: %d\n", - __func__, rate, cl->name, rc); + __func__, srate, cl->name, rc); return rc; } } else { /* set clock rate to clock driver */ - rc = clk_set_rate(cl->clk, rate); + rc = clk_set_rate(cl->clk, srate); if (rc) { d_vpr_e("%s: Failed to set clock rate %llu %s: %d\n", - __func__, rate, cl->name, rc); + __func__, srate, cl->name, rc); return rc; } } @@ -1126,6 +1296,7 @@ static int __set_clk_rate(struct msm_vidc_core *core, struct clock_info *cl, static int __set_clk_rate(struct msm_vidc_core *core, struct clock_info *cl, u64 rate) { + u64 srate; int rc = 0; /* not registered */ @@ -1134,24 +1305,28 @@ static int __set_clk_rate(struct msm_vidc_core *core, struct clock_info *cl, return -EINVAL; } + /* update clock residency stats */ + update_residency_stats(core, cl, rate); + /* * This conversion is necessary since we are scaling clock values based on * the branch clock. However, mmrm driver expects source clock to be registered * and used for scaling. * TODO: Remove this scaling if using source clock instead of branch clock. */ - rate = rate * MSM_VIDC_CLOCK_SOURCE_SCALING_RATIO; + srate = rate * MSM_VIDC_CLOCK_SOURCE_SCALING_RATIO; /* bail early if requested clk rate is not changed */ if (rate == cl->prev) return 0; - d_vpr_p("Scaling clock %s to %llu, prev %llu\n", cl->name, rate, cl->prev); + d_vpr_p("Scaling clock %s to %llu, prev %llu\n", + cl->name, srate, cl->prev * MSM_VIDC_CLOCK_SOURCE_SCALING_RATIO); - rc = clk_set_rate(cl->clk, rate); + rc = clk_set_rate(cl->clk, srate); if (rc) { d_vpr_e("%s: Failed to set clock rate %llu %s: %d\n", - __func__, rate, cl->name, rc); + __func__, srate, cl->name, rc); return rc; } @@ -1241,6 +1416,9 @@ static int __prepare_enable_clock(struct msm_vidc_core *core, * it to the lowest frequency possible */ if (cl->has_scaling) { + /* reset clk residency stats */ + reset_residency_stats(core, cl); + rate = clk_round_rate(cl->clk, 0); /** * source clock is already multipled with scaling ratio and __set_clk_rate @@ -1445,6 +1623,50 @@ static int __reset_ahb2axi_bridge(struct msm_vidc_core *core) return rc; } +static int __print_clock_residency_stats(struct msm_vidc_core *core) +{ + struct clock_info *cl; + int rc = 0; + + if (!core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + venus_hfi_for_each_clock(core, cl) { + /* skip if scaling not supported */ + if (!cl->has_scaling) + continue; + + /* print clock residency stats */ + print_residency_stats(core, cl); + } + + return rc; +} + +static int __reset_clock_residency_stats(struct msm_vidc_core *core) +{ + struct clock_info *cl; + int rc = 0; + + if (!core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + venus_hfi_for_each_clock(core, cl) { + /* skip if scaling not supported */ + if (!cl->has_scaling) + continue; + + /* reset clock residency stats */ + reset_residency_stats(core, cl); + } + + return rc; +} + static const struct msm_vidc_resources_ops res_ops = { .init = __init_resources, .reset_bridge = __reset_ahb2axi_bridge, @@ -1460,6 +1682,8 @@ static const struct msm_vidc_resources_ops res_ops = { .clk_enable = __prepare_enable_clock, .clk_disable = __disable_unprepare_clock, .clk_set_flag = __clock_set_flag, + .clk_print_residency_stats = __print_clock_residency_stats, + .clk_reset_residency_stats = __reset_clock_residency_stats, }; const struct msm_vidc_resources_ops *get_resources_ops(void) From 1ce3863b21ddc5a0b7ce167bd9df4d115ed7f73e Mon Sep 17 00:00:00 2001 From: Megha Byahatti Date: Thu, 29 Dec 2022 13:15:06 +0530 Subject: [PATCH 0788/1061] video: driver: add database file for upstream taro Add database file for taro prepared based on upstream. This file won't be compiled for Android builds. Change-Id: I6804654b0574f4cc42d90278e4a022482c27ce99 Signed-off-by: Megha Byahatti Signed-off-by: Dikshita Agarwal --- driver/platform/waipio/src/waipio.c | 1770 +++++++++++++++++++++++++++ 1 file changed, 1770 insertions(+) create mode 100644 driver/platform/waipio/src/waipio.c diff --git a/driver/platform/waipio/src/waipio.c b/driver/platform/waipio/src/waipio.c new file mode 100644 index 0000000000..3173a26242 --- /dev/null +++ b/driver/platform/waipio/src/waipio.c @@ -0,0 +1,1770 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include +#include +#include + +#include "msm_vidc_control.h" +#include "msm_vidc_waipio.h" +#include "msm_vidc_platform.h" +#include "msm_vidc_debug.h" +#include "hfi_property.h" +#include "hfi_command.h" + +#define DEFAULT_VIDEO_CONCEAL_COLOR_BLACK 0x8020010 +#define MAX_LTR_FRAME_COUNT 2 +#define MAX_BASE_LAYER_PRIORITY_ID 63 +#define MAX_OP_POINT 31 +#define MAX_BITRATE 220000000 +#define DEFAULT_BITRATE 20000000 +#define MINIMUM_FPS 1 +#define MAXIMUM_FPS 480 +#define MAXIMUM_DEC_FPS 960 +#define MAX_QP 51 +#define DEFAULT_QP 20 +#define MAX_CONSTANT_QUALITY 100 +#define MIN_SLICE_BYTE_SIZE 512 +#define MAX_SLICE_BYTE_SIZE \ + ((MAX_BITRATE) >> 3) +#define MAX_SLICE_MB_SIZE \ + (((4096 + 15) >> 4) * ((2304 + 15) >> 4)) + +#define ENC MSM_VIDC_ENCODER +#define DEC MSM_VIDC_DECODER +#define H264 MSM_VIDC_H264 +#define HEVC MSM_VIDC_HEVC +#define VP9 MSM_VIDC_VP9 +#define CODECS_ALL (H264 | HEVC | VP9) +#define MAXIMUM_OVERRIDE_VP9_FPS 200 + +#ifndef V4L2_PIX_FMT_QC08C +#define V4L2_PIX_FMT_QC08C v4l2_fourcc('Q', '0', '8', 'C') +#endif + +#ifndef V4L2_PIX_FMT_QC10C +#define V4L2_PIX_FMT_QC10C v4l2_fourcc('Q', '1', '0', 'C') +#endif + +static struct codec_info codec_data_waipio[] = { + { + .v4l2_codec = V4L2_PIX_FMT_H264, + .vidc_codec = MSM_VIDC_H264, + .pixfmt_name = "AVC", + }, + { + .v4l2_codec = V4L2_PIX_FMT_HEVC, + .vidc_codec = MSM_VIDC_HEVC, + .pixfmt_name = "HEVC", + }, + { + .v4l2_codec = V4L2_PIX_FMT_VP9, + .vidc_codec = MSM_VIDC_VP9, + .pixfmt_name = "VP9", + }, +}; + +static struct color_format_info color_format_data_waipio[] = { + { + .v4l2_color_format = V4L2_PIX_FMT_NV12, + .vidc_color_format = MSM_VIDC_FMT_NV12, + .pixfmt_name = "NV12", + }, + { + .v4l2_color_format = V4L2_PIX_FMT_NV21, + .vidc_color_format = MSM_VIDC_FMT_NV21, + .pixfmt_name = "NV21", + }, + { + .v4l2_color_format = V4L2_PIX_FMT_QC08C, + .vidc_color_format = MSM_VIDC_FMT_NV12C, + .pixfmt_name = "NV12C", + }, + { + .v4l2_color_format = V4L2_PIX_FMT_QC10C, + .vidc_color_format = MSM_VIDC_FMT_TP10C, + .pixfmt_name = "TP10C", + }, + { + .v4l2_color_format = V4L2_PIX_FMT_RGBA32, + .vidc_color_format = MSM_VIDC_FMT_RGBA8888, + .pixfmt_name = "RGBA", + }, +}; + +static struct color_primaries_info color_primaries_data_waipio[] = { + { + .v4l2_color_primaries = V4L2_COLORSPACE_DEFAULT, + .vidc_color_primaries = MSM_VIDC_PRIMARIES_RESERVED, + }, + { + .v4l2_color_primaries = V4L2_COLORSPACE_REC709, + .vidc_color_primaries = MSM_VIDC_PRIMARIES_BT709, + }, + { + .v4l2_color_primaries = V4L2_COLORSPACE_470_SYSTEM_M, + .vidc_color_primaries = MSM_VIDC_PRIMARIES_BT470_SYSTEM_M, + }, + { + .v4l2_color_primaries = V4L2_COLORSPACE_470_SYSTEM_BG, + .vidc_color_primaries = MSM_VIDC_PRIMARIES_BT470_SYSTEM_BG, + }, + { + .v4l2_color_primaries = V4L2_COLORSPACE_SMPTE170M, + .vidc_color_primaries = MSM_VIDC_PRIMARIES_BT601_525, + }, + { + .v4l2_color_primaries = V4L2_COLORSPACE_SMPTE240M, + .vidc_color_primaries = MSM_VIDC_PRIMARIES_SMPTE_ST240M, + }, + { + .v4l2_color_primaries = V4L2_COLORSPACE_BT2020, + .vidc_color_primaries = MSM_VIDC_PRIMARIES_BT2020, + }, + { + .v4l2_color_primaries = V4L2_COLORSPACE_DCI_P3, + .vidc_color_primaries = MSM_VIDC_PRIMARIES_SMPTE_RP431_2, + }, +}; + +static struct transfer_char_info transfer_char_data_waipio[] = { + { + .v4l2_transfer_char = V4L2_XFER_FUNC_DEFAULT, + .vidc_transfer_char = MSM_VIDC_TRANSFER_RESERVED, + }, + { + .v4l2_transfer_char = V4L2_XFER_FUNC_709, + .vidc_transfer_char = MSM_VIDC_TRANSFER_BT709, + }, + { + .v4l2_transfer_char = V4L2_XFER_FUNC_SMPTE240M, + .vidc_transfer_char = MSM_VIDC_TRANSFER_SMPTE_ST240M, + }, + { + .v4l2_transfer_char = V4L2_XFER_FUNC_SRGB, + .vidc_transfer_char = MSM_VIDC_TRANSFER_SRGB_SYCC, + }, + { + .v4l2_transfer_char = V4L2_XFER_FUNC_SMPTE2084, + .vidc_transfer_char = MSM_VIDC_TRANSFER_SMPTE_ST2084_PQ, + }, +}; + +static struct matrix_coeff_info matrix_coeff_data_waipio[] = { + { + .v4l2_matrix_coeff = V4L2_YCBCR_ENC_DEFAULT, + .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_RESERVED, + }, + { + .v4l2_matrix_coeff = V4L2_YCBCR_ENC_709, + .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_BT709, + }, + { + .v4l2_matrix_coeff = V4L2_YCBCR_ENC_XV709, + .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_BT709, + }, + { + .v4l2_matrix_coeff = V4L2_YCBCR_ENC_XV601, + .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_BT470_SYS_BG_OR_BT601_625, + }, + { + .v4l2_matrix_coeff = V4L2_YCBCR_ENC_601, + .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_BT601_525_BT1358_525_OR_625, + }, + { + .v4l2_matrix_coeff = V4L2_YCBCR_ENC_SMPTE240M, + .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_SMPTE_ST240, + }, + { + .v4l2_matrix_coeff = V4L2_YCBCR_ENC_BT2020, + .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_BT2020_NON_CONSTANT, + }, + { + .v4l2_matrix_coeff = V4L2_YCBCR_ENC_BT2020_CONST_LUM, + .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_BT2020_CONSTANT, + }, +}; + +static struct msm_platform_core_capability core_data_waipio[] = { + /* {type, value} */ + {ENC_CODECS, H264|HEVC}, + {DEC_CODECS, H264|HEVC|VP9}, + {MAX_SESSION_COUNT, 16}, + {MAX_NUM_720P_SESSIONS, 16}, + {MAX_NUM_1080P_SESSIONS, 16}, + {MAX_NUM_4K_SESSIONS, 8}, + {MAX_NUM_8K_SESSIONS, 2}, + {MAX_RT_MBPF, 174080}, /* (8192x4352)/256 + (4096x2176)/256*/ + {MAX_MBPF, 278528}, /* ((8192x4352)/256) * 2 */ + {MAX_MBPS, 7833600}, /* max_load + * 7680x4320@60fps or 3840x2176@240fps + * which is greater than 4096x2176@120fps, + * 8192x4320@48fps + */ + {MAX_MBPF_HQ, 8160}, /* ((1920x1088)/256) */ + {MAX_MBPS_HQ, 489600}, /* ((1920x1088)/256)@60fps */ + {MAX_MBPF_B_FRAME, 32640}, /* 3840x2176/256 */ + {MAX_MBPS_B_FRAME, 1958400}, /* 3840x2176/256 MBs@60fps */ + {MAX_MBPS_ALL_INTRA, 1958400}, /* 3840x2176/256 MBs@60fps */ + {MAX_ENH_LAYER_COUNT, 5}, + {NUM_VPP_PIPE, 4}, + {SW_PC, 1}, + {FW_UNLOAD, 0}, + {HW_RESPONSE_TIMEOUT, HW_RESPONSE_TIMEOUT_VALUE}, /* 1000 ms */ + {SW_PC_DELAY, SW_PC_DELAY_VALUE }, /* 1500 ms (>HW_RESPONSE_TIMEOUT)*/ + {FW_UNLOAD_DELAY, FW_UNLOAD_DELAY_VALUE }, /* 3000 ms (>SW_PC_DELAY)*/ + {DCVS, 1}, + {DECODE_BATCH, 1}, + {DECODE_BATCH_TIMEOUT, 200}, + {STATS_TIMEOUT_MS, 2000}, + {NON_FATAL_FAULTS, 1}, + {ENC_AUTO_FRAMERATE, 1}, + {DEVICE_CAPS, V4L2_CAP_VIDEO_M2M_MPLANE | V4L2_CAP_STREAMING}, + {SUPPORTS_REQUESTS, 0}, +}; + +static struct msm_platform_inst_capability instance_cap_data_waipio[] = { + /* {cap, domain, codec, + * min, max, step_or_mask, value, + * v4l2_id, + * hfi_id, + * flags} + */ + + {FRAME_WIDTH, DEC, CODECS_ALL, 96, 8192, 1, 1920}, + + {FRAME_WIDTH, DEC, VP9, 96, 4096, 1, 1920}, + + {FRAME_WIDTH, ENC, CODECS_ALL, 128, 8192, 1, 1920}, + + {FRAME_WIDTH, ENC, HEVC, 96, 8192, 1, 1920}, + + {LOSSLESS_FRAME_WIDTH, ENC, CODECS_ALL, 128, 4096, 1, 1920}, + + {LOSSLESS_FRAME_WIDTH, ENC, HEVC, 96, 4096, 1, 1920}, + + {FRAME_HEIGHT, DEC, CODECS_ALL, 96, 8192, 1, 1080}, + + {FRAME_HEIGHT, DEC, VP9, 96, 4096, 1, 1080}, + + {FRAME_HEIGHT, ENC, CODECS_ALL, 128, 8192, 1, 1080}, + + {FRAME_HEIGHT, ENC, HEVC, 96, 8192, 1, 1080}, + + {LOSSLESS_FRAME_HEIGHT, ENC, CODECS_ALL, 128, 4096, 1, 1080}, + + {LOSSLESS_FRAME_HEIGHT, ENC, HEVC, 96, 4096, 1, 1080}, + + {PIX_FMTS, ENC|DEC, H264, + MSM_VIDC_FMT_NV12, + MSM_VIDC_FMT_NV12C, + MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C, + MSM_VIDC_FMT_NV12C}, + + {PIX_FMTS, ENC|DEC, HEVC|VP9, + MSM_VIDC_FMT_NV12, + MSM_VIDC_FMT_TP10C, + MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C | + MSM_VIDC_FMT_TP10C, + MSM_VIDC_FMT_NV12C}, + + {MIN_BUFFERS_INPUT, ENC|DEC, CODECS_ALL, 0, 64, 1, 4, + V4L2_CID_MIN_BUFFERS_FOR_OUTPUT, + 0, + CAP_FLAG_VOLATILE}, + + + {MIN_BUFFERS_OUTPUT, ENC|DEC, CODECS_ALL, + 0, 64, 1, 4, + V4L2_CID_MIN_BUFFERS_FOR_CAPTURE, + HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_VOLATILE}, + + /* (8192 * 4320) / 256 */ + {MBPF, ENC, CODECS_ALL, 64, 138240, 1, 138240}, + + {MBPF, ENC, HEVC, 36, 138240, 1, 138240}, + + {MBPF, DEC, CODECS_ALL, 36, 138240, 1, 138240}, + + /* (4096 * 2304) / 256 */ + {MBPF, DEC, VP9, 36, 36864, 1, 36864}, + + /* (4096 * 2304) / 256 */ + {LOSSLESS_MBPF, ENC, H264|HEVC, 64, 36864, 1, 36864}, + + /* Batch Mode Decode */ + /* TODO: update with new values based on updated voltage corner */ + {BATCH_MBPF, DEC, H264|HEVC|VP9, 64, 34816, 1, 34816}, + + /* (4096 * 2304) / 256 */ + {BATCH_FPS, DEC, H264|HEVC|VP9, 1, 120, 1, 120}, + + {FRAME_RATE, ENC, CODECS_ALL, + (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), + 1, (DEFAULT_FPS << 16), + 0, + HFI_PROP_FRAME_RATE, + CAP_FLAG_OUTPUT_PORT}, + + {OPERATING_RATE, ENC, CODECS_ALL, + (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), + 1, (DEFAULT_FPS << 16)}, + + {INPUT_RATE, ENC|DEC, CODECS_ALL, + (MINIMUM_FPS << 16), INT_MAX, + 1, (DEFAULT_FPS << 16)}, + + {TIMESTAMP_RATE, ENC|DEC, CODECS_ALL, + (MINIMUM_FPS << 16), INT_MAX, + 1, (DEFAULT_FPS << 16)}, + + {SCALE_FACTOR, ENC, H264|HEVC, 1, 8, 1, 8}, + + {MB_CYCLES_VSP, ENC, CODECS_ALL, 25, 25, 1, 25}, + + {MB_CYCLES_VSP, DEC, CODECS_ALL, 25, 25, 1, 25}, + + {MB_CYCLES_VSP, DEC, VP9, 60, 60, 1, 60}, + + {MB_CYCLES_VPP, ENC, CODECS_ALL, 675, 675, 1, 675}, + + {MB_CYCLES_VPP, DEC, CODECS_ALL, 200, 200, 1, 200}, + + {MB_CYCLES_LP, ENC, CODECS_ALL, 320, 320, 1, 320}, + + {MB_CYCLES_LP, DEC, CODECS_ALL, 200, 200, 1, 200}, + + {MB_CYCLES_FW, ENC|DEC, CODECS_ALL, 326389, 326389, 1, 326389}, + + {MB_CYCLES_FW_VPP, ENC|DEC, CODECS_ALL, 44156, 44156, 1, 44156}, + + {MB_CYCLES_FW_VPP, DEC, CODECS_ALL, 66234, 66234, 1, 66234}, + + {CLIENT_ID, ENC|DEC, CODECS_ALL, + INVALID_CLIENT_ID, INT_MAX, 1, INVALID_CLIENT_ID, + 0}, + + {HFLIP, ENC, CODECS_ALL, + 0, 1, 1, 0, + V4L2_CID_HFLIP, + HFI_PROP_FLIP, + CAP_FLAG_OUTPUT_PORT | + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {VFLIP, ENC, CODECS_ALL, + 0, 1, 1, 0, + V4L2_CID_VFLIP, + HFI_PROP_FLIP, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {ROTATION, ENC, CODECS_ALL, + 0, 270, 90, 0, + V4L2_CID_ROTATE, + HFI_PROP_ROTATION, + CAP_FLAG_OUTPUT_PORT}, + + {SUPER_FRAME, ENC, H264|HEVC, + 0, 32, 1, 0, + 0, 0, + CAP_FLAG_NONE}, + + {HEADER_MODE, ENC, CODECS_ALL, + V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE, + V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME, + BIT(V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE) | + BIT(V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME), + V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE, + V4L2_CID_MPEG_VIDEO_HEADER_MODE, + HFI_PROP_SEQ_HEADER_MODE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {PREPEND_SPSPPS_TO_IDR, ENC, CODECS_ALL, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDEO_PREPEND_SPSPPS_TO_IDR}, + + {WITHOUT_STARTCODE, ENC, CODECS_ALL, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE, + HFI_PROP_NAL_LENGTH_FIELD, + CAP_FLAG_OUTPUT_PORT}, + + {NAL_LENGTH_FIELD, ENC, CODECS_ALL, + V4L2_MPEG_VIDEO_HEVC_SIZE_0, + V4L2_MPEG_VIDEO_HEVC_SIZE_4, + BIT(V4L2_MPEG_VIDEO_HEVC_SIZE_0) | + BIT(V4L2_MPEG_VIDEO_HEVC_SIZE_4), + V4L2_MPEG_VIDEO_HEVC_SIZE_0, + V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD, + HFI_PROP_NAL_LENGTH_FIELD, + CAP_FLAG_MENU | CAP_FLAG_OUTPUT_PORT}, + + /* TODO: Firmware introduced enumeration type for this + * with and without seq header. + */ + {REQUEST_I_FRAME, ENC, H264|HEVC, + 0, 0, 0, 0, + V4L2_CID_MPEG_VIDEO_FORCE_KEY_FRAME, + HFI_PROP_REQUEST_SYNC_FRAME, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + /* Enc: Keeping CABAC and CAVLC as same bitrate. + * Dec: there's no use of Bitrate cap + */ + {BIT_RATE, ENC, H264|HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_BITRATE, + HFI_PROP_TOTAL_BITRATE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {BITRATE_MODE, ENC, H264, + V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, + V4L2_MPEG_VIDEO_BITRATE_MODE_CBR, + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_VBR) | + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CBR), + V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, + V4L2_CID_MPEG_VIDEO_BITRATE_MODE, + HFI_PROP_RATE_CONTROL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {BITRATE_MODE, ENC, HEVC, + V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, + V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_VBR) | + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CBR) | + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CQ), + V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, + V4L2_CID_MPEG_VIDEO_BITRATE_MODE, + HFI_PROP_RATE_CONTROL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {CABAC_MAX_BITRATE, ENC, H264|HEVC, 0, + 160000000, 1, 160000000}, + + {CAVLC_MAX_BITRATE, ENC, H264, 0, + 220000000, 1, 220000000}, + + {ALLINTRA_MAX_BITRATE, ENC, H264|HEVC, 0, + 245000000, 1, 245000000}, + + {LOWLATENCY_MAX_BITRATE, ENC, H264|HEVC, 0, + 70000000, 1, 70000000}, + + {NUM_COMV, DEC, CODECS_ALL, + 0, INT_MAX, 1, 0}, + + {LOSSLESS, ENC, HEVC, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU}, + + {FRAME_SKIP_MODE, ENC, H264|HEVC, + V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED, + V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT, + BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED) | + BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_LEVEL_LIMIT) | + BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT), + V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED, + V4L2_CID_MPEG_VIDEO_FRAME_SKIP_MODE, + 0, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {FRAME_RC_ENABLE, ENC, H264|HEVC, + 0, 1, 1, 1, + V4L2_CID_MPEG_VIDEO_FRAME_RC_ENABLE}, + + {CONSTANT_QUALITY, ENC, HEVC, + 1, MAX_CONSTANT_QUALITY, 1, 90, + V4L2_CID_MPEG_VIDEO_CONSTANT_QUALITY, + HFI_PROP_CONSTANT_QUALITY, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {GOP_SIZE, ENC, CODECS_ALL, + 0, INT_MAX, 1, 2 * DEFAULT_FPS - 1, + V4L2_CID_MPEG_VIDEO_GOP_SIZE, + HFI_PROP_MAX_GOP_FRAMES, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {GOP_CLOSURE, ENC, H264|HEVC, + 0, 1, 1, 1, + V4L2_CID_MPEG_VIDEO_GOP_CLOSURE, + 0}, + + {B_FRAME, ENC, H264|HEVC, + 0, 7, 1, 0, + V4L2_CID_MPEG_VIDEO_B_FRAMES, + HFI_PROP_MAX_B_FRAMES, + CAP_FLAG_OUTPUT_PORT}, + + {BLUR_TYPES, ENC, H264|HEVC, + MSM_VIDC_BLUR_NONE, MSM_VIDC_BLUR_EXTERNAL, + BIT(MSM_VIDC_BLUR_NONE) | BIT(MSM_VIDC_BLUR_EXTERNAL), + MSM_VIDC_BLUR_NONE, + 0, + HFI_PROP_BLUR_TYPES, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {CSC, ENC, CODECS_ALL, + 0, 1, 1, 0, + 0, + HFI_PROP_CSC}, + + {LOWLATENCY_MODE, ENC, H264|HEVC, + 0, 1, 1, 0, + 0, + 0, + CAP_FLAG_NONE}, + + {LOWLATENCY_MODE, DEC, H264|HEVC|VP9, + 0, 1, 1, 0, + 0, + HFI_PROP_SEQ_CHANGE_AT_SYNC_FRAME, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {LTR_COUNT, ENC, H264|HEVC, + 0, 2, 1, 0, + V4L2_CID_MPEG_VIDEO_LTR_COUNT, + HFI_PROP_LTR_COUNT, + CAP_FLAG_OUTPUT_PORT}, + + {USE_LTR, ENC, H264|HEVC, + 0, + ((1 << MAX_LTR_FRAME_COUNT) - 1), + 0, 0, + V4L2_CID_MPEG_VIDEO_USE_LTR_FRAMES, + HFI_PROP_LTR_USE, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {MARK_LTR, ENC, H264|HEVC, + INVALID_DEFAULT_MARK_OR_USE_LTR, + (MAX_LTR_FRAME_COUNT - 1), + 1, INVALID_DEFAULT_MARK_OR_USE_LTR, + V4L2_CID_MPEG_VIDEO_FRAME_LTR_INDEX, + HFI_PROP_LTR_MARK, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {BASELAYER_PRIORITY, ENC, H264, + 0, MAX_BASE_LAYER_PRIORITY_ID, 1, 0, + V4L2_CID_MPEG_VIDEO_BASELAYER_PRIORITY_ID, + HFI_PROP_BASELAYER_PRIORITYID, + CAP_FLAG_OUTPUT_PORT}, + + {AU_DELIMITER, ENC, H264|HEVC, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDEO_AU_DELIMITER, + HFI_PROP_AUD, + CAP_FLAG_OUTPUT_PORT}, + + {CONTENT_ADAPTIVE_CODING, ENC, H264|HEVC, + 0, 1, 1, 1, + 0, + HFI_PROP_CONTENT_ADAPTIVE_CODING, + CAP_FLAG_OUTPUT_PORT}, + + {REQUEST_PREPROCESS, ENC, H264|HEVC, + MSM_VIDC_PREPROCESS_NONE, + MSM_VIDC_PREPROCESS_TYPE0, + BIT(MSM_VIDC_PREPROCESS_NONE) | + BIT(MSM_VIDC_PREPROCESS_TYPE0), + MSM_VIDC_PREPROCESS_NONE, + 0, HFI_PROP_REQUEST_PREPROCESS, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {MIN_QUALITY, ENC, H264|HEVC, + 0, MAX_SUPPORTED_MIN_QUALITY, 70, MAX_SUPPORTED_MIN_QUALITY, + 0, + HFI_PROP_MAINTAIN_MIN_QUALITY, + CAP_FLAG_OUTPUT_PORT}, + + {VBV_DELAY, ENC, H264|HEVC, + 200, 300, 100, 300, + V4L2_CID_MPEG_VIDEO_VBV_DELAY, + HFI_PROP_VBV_DELAY, + CAP_FLAG_OUTPUT_PORT}, + + {PEAK_BITRATE, ENC, H264|HEVC, + /* default peak bitrate is 10% larger than avg bitrate */ + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_BITRATE_PEAK, + HFI_PROP_TOTAL_PEAK_BITRATE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {MIN_FRAME_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, + V4L2_CID_MPEG_VIDEO_H264_MIN_QP, + HFI_PROP_MIN_QP_PACKED, + CAP_FLAG_OUTPUT_PORT}, + + {MIN_FRAME_QP, ENC, HEVC, + MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, + V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP, + HFI_PROP_MIN_QP_PACKED, + CAP_FLAG_OUTPUT_PORT}, + + {I_FRAME_MIN_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, + V4L2_CID_MPEG_VIDEO_H264_I_FRAME_MIN_QP}, + + {I_FRAME_MIN_QP, ENC, HEVC, + MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, + V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_MIN_QP}, + + {P_FRAME_MIN_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, + V4L2_CID_MPEG_VIDEO_H264_P_FRAME_MIN_QP}, + + {P_FRAME_MIN_QP, ENC, HEVC, + MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, + V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_MIN_QP}, + + {B_FRAME_MIN_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, + V4L2_CID_MPEG_VIDEO_H264_B_FRAME_MIN_QP}, + + {B_FRAME_MIN_QP, ENC, HEVC, + MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, + V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_MIN_QP}, + + {MAX_FRAME_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_H264_MAX_QP, + HFI_PROP_MAX_QP_PACKED, + CAP_FLAG_OUTPUT_PORT}, + + {MAX_FRAME_QP, ENC, HEVC, + MIN_QP_10BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP, + HFI_PROP_MAX_QP_PACKED, + CAP_FLAG_OUTPUT_PORT}, + + {I_FRAME_MAX_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_H264_I_FRAME_MAX_QP}, + + {I_FRAME_MAX_QP, ENC, HEVC, + MIN_QP_10BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_MAX_QP}, + + {P_FRAME_MAX_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_H264_P_FRAME_MAX_QP}, + + {P_FRAME_MAX_QP, ENC, HEVC, + MIN_QP_10BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_MAX_QP}, + + {B_FRAME_MAX_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_H264_B_FRAME_MAX_QP}, + + {B_FRAME_MAX_QP, ENC, HEVC, + MIN_QP_10BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_MAX_QP}, + + {I_FRAME_QP, ENC, HEVC, + MIN_QP_10BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {I_FRAME_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {P_FRAME_QP, ENC, HEVC, + MIN_QP_10BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {P_FRAME_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {B_FRAME_QP, ENC, HEVC, + MIN_QP_10BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {B_FRAME_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_H264_B_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {LAYER_TYPE, ENC, HEVC, + V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B, + V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P, + BIT(V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B) | + BIT(V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P), + V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE, + HFI_PROP_LAYER_ENCODING_TYPE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LAYER_TYPE, ENC, H264, + V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_B, + V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P, + BIT(V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_B) | + BIT(V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P), + V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P, + V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_TYPE, + HFI_PROP_LAYER_ENCODING_TYPE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LAYER_ENABLE, ENC, H264, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING, + HFI_PROP_LAYER_ENCODING_TYPE, + CAP_FLAG_OUTPUT_PORT}, + + {LAYER_ENABLE, ENC, HEVC, + 0, 1, 1, 0, + 0, + 0, + CAP_FLAG_OUTPUT_PORT}, + + {ENH_LAYER_COUNT, ENC, HEVC, + 0, 5, 1, 0, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER, + HFI_PROP_LAYER_COUNT, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {ENH_LAYER_COUNT, ENC, H264, + 0, 5, 1, 0, + V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_LAYER, + HFI_PROP_LAYER_COUNT, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L0_BR, ENC, H264, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L0_BR, + HFI_PROP_BITRATE_LAYER1, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L0_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L0_BR, + HFI_PROP_BITRATE_LAYER1, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L1_BR, ENC, H264, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L1_BR, + HFI_PROP_BITRATE_LAYER2, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L1_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L1_BR, + HFI_PROP_BITRATE_LAYER2, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L2_BR, ENC, H264, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L2_BR, + HFI_PROP_BITRATE_LAYER3, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L2_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L2_BR, + HFI_PROP_BITRATE_LAYER3, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L3_BR, ENC, H264, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L3_BR, + HFI_PROP_BITRATE_LAYER4, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + {L3_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L3_BR, + HFI_PROP_BITRATE_LAYER4, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L4_BR, ENC, H264, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L4_BR, + HFI_PROP_BITRATE_LAYER5, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L4_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L4_BR, + HFI_PROP_BITRATE_LAYER5, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L5_BR, ENC, H264, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L5_BR, + HFI_PROP_BITRATE_LAYER6, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L5_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L5_BR, + HFI_PROP_BITRATE_LAYER6, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {ENTROPY_MODE, ENC, H264, + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC, + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, + BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC) | + BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC), + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, + V4L2_CID_MPEG_VIDEO_H264_ENTROPY_MODE, + HFI_PROP_CABAC_SESSION, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {ENTROPY_MODE, DEC, H264|HEVC|VP9, + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC, + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, + BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC) | + BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC), + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, + 0, + HFI_PROP_CABAC_SESSION}, + + {PROFILE, ENC|DEC, H264, + V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE, + V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH, + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_BASELINE) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_MAIN) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_HIGH), + V4L2_MPEG_VIDEO_H264_PROFILE_HIGH, + V4L2_CID_MPEG_VIDEO_H264_PROFILE, + HFI_PROP_PROFILE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {PROFILE, ENC|DEC, HEVC, + V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN, + V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE, + BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN) | + BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE) | + BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10) | + BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE), + V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN, + V4L2_CID_MPEG_VIDEO_HEVC_PROFILE, + HFI_PROP_PROFILE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {PROFILE, DEC, VP9, + V4L2_MPEG_VIDEO_VP9_PROFILE_0, + V4L2_MPEG_VIDEO_VP9_PROFILE_2, + BIT(V4L2_MPEG_VIDEO_VP9_PROFILE_0) | + BIT(V4L2_MPEG_VIDEO_VP9_PROFILE_2), + V4L2_MPEG_VIDEO_VP9_PROFILE_0, + V4L2_CID_MPEG_VIDEO_VP9_PROFILE, + HFI_PROP_PROFILE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LEVEL, ENC, H264, + V4L2_MPEG_VIDEO_H264_LEVEL_1_0, + V4L2_MPEG_VIDEO_H264_LEVEL_6_0, + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1B) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_3) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_0), + V4L2_MPEG_VIDEO_H264_LEVEL_5_0, + V4L2_CID_MPEG_VIDEO_H264_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LEVEL, ENC, HEVC, + V4L2_MPEG_VIDEO_HEVC_LEVEL_1, + V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2, + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2), + V4L2_MPEG_VIDEO_HEVC_LEVEL_5, + V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LEVEL, DEC, H264, + V4L2_MPEG_VIDEO_H264_LEVEL_1_0, + V4L2_MPEG_VIDEO_H264_LEVEL_6_2, + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1B) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_3) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_2), + V4L2_MPEG_VIDEO_H264_LEVEL_6_1, + V4L2_CID_MPEG_VIDEO_H264_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LEVEL, DEC, HEVC, + V4L2_MPEG_VIDEO_HEVC_LEVEL_1, + V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2, + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1)| + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2), + V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1, + V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LEVEL, DEC, VP9, + V4L2_MPEG_VIDEO_VP9_LEVEL_1_0, + V4L2_MPEG_VIDEO_VP9_LEVEL_6_0, + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_1_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_1_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_2_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_3_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_4_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_2) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_6_0), + V4L2_MPEG_VIDEO_VP9_LEVEL_6_0, + V4L2_CID_MPEG_VIDEO_VP9_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {HEVC_TIER, ENC|DEC, HEVC, + V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, + V4L2_MPEG_VIDEO_HEVC_TIER_HIGH, + BIT(V4L2_MPEG_VIDEO_HEVC_TIER_MAIN) | + BIT(V4L2_MPEG_VIDEO_HEVC_TIER_HIGH), + V4L2_MPEG_VIDEO_HEVC_TIER_HIGH, + V4L2_CID_MPEG_VIDEO_HEVC_TIER, + HFI_PROP_TIER, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LF_MODE, ENC, H264, + V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED, + DB_H264_DISABLE_SLICE_BOUNDARY, + BIT(V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED) | + BIT(V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_DISABLED) | + BIT(DB_H264_DISABLE_SLICE_BOUNDARY), + V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED, + V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_MODE, + HFI_PROP_DEBLOCKING_MODE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LF_MODE, ENC, HEVC, + V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_DISABLED, + DB_HEVC_DISABLE_SLICE_BOUNDARY, + BIT(V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_DISABLED) | + BIT(V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_ENABLED) | + BIT(DB_HEVC_DISABLE_SLICE_BOUNDARY), + V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_ENABLED, + V4L2_CID_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE, + HFI_PROP_DEBLOCKING_MODE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LF_ALPHA, ENC, H264, + -6, 6, 1, 0, + V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_ALPHA}, + + {LF_ALPHA, ENC, HEVC, + -6, 6, 1, 0, + V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2}, + + {LF_BETA, ENC, H264, + -6, 6, 1, 0, + V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_BETA}, + + {LF_BETA, ENC, HEVC, + -6, 6, 1, 0, + V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2}, + + {SLICE_MODE, ENC, H264|HEVC, + V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, + V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_BYTES, + BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE) | + BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_MB) | + BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_BYTES), + V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, + V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE, + 0, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {SLICE_MAX_BYTES, ENC, H264|HEVC, + MIN_SLICE_BYTE_SIZE, MAX_SLICE_BYTE_SIZE, + 1, MIN_SLICE_BYTE_SIZE, + V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES, + HFI_PROP_MULTI_SLICE_BYTES_COUNT, + CAP_FLAG_OUTPUT_PORT}, + + {SLICE_MAX_MB, ENC, H264|HEVC, + 1, MAX_SLICE_MB_SIZE, 1, 1, + V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB, + HFI_PROP_MULTI_SLICE_MB_COUNT, + CAP_FLAG_OUTPUT_PORT}, + + {MB_RC, ENC, H264|HEVC, + 0, 1, 1, 1, + V4L2_CID_MPEG_VIDEO_MB_RC_ENABLE, + 0, + CAP_FLAG_OUTPUT_PORT}, + + {TRANSFORM_8X8, ENC, H264, + 0, 1, 1, 1, + V4L2_CID_MPEG_VIDEO_H264_8X8_TRANSFORM, + HFI_PROP_8X8_TRANSFORM, + CAP_FLAG_OUTPUT_PORT}, + + {CHROMA_QP_INDEX_OFFSET, ENC, HEVC, + MIN_CHROMA_QP_OFFSET, MAX_CHROMA_QP_OFFSET, + 1, MAX_CHROMA_QP_OFFSET, + V4L2_CID_MPEG_VIDEO_H264_CHROMA_QP_INDEX_OFFSET, + HFI_PROP_CHROMA_QP_OFFSET, + CAP_FLAG_OUTPUT_PORT}, + + {DISPLAY_DELAY_ENABLE, DEC, H264|HEVC|VP9, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY_ENABLE, + HFI_PROP_DECODE_ORDER_OUTPUT, + CAP_FLAG_INPUT_PORT}, + + {DISPLAY_DELAY, DEC, H264|HEVC|VP9, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY, + HFI_PROP_DECODE_ORDER_OUTPUT, + CAP_FLAG_INPUT_PORT}, + + {OUTPUT_ORDER, DEC, H264|HEVC|VP9, + 0, 1, 1, 0, + 0, + HFI_PROP_DECODE_ORDER_OUTPUT, + CAP_FLAG_INPUT_PORT}, + + {INPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL, + DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT, + 1, DEFAULT_MAX_HOST_BUF_COUNT, + 0, + HFI_PROP_BUFFER_HOST_MAX_COUNT, + CAP_FLAG_INPUT_PORT}, + + {OUTPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL, + DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT, + 1, DEFAULT_MAX_HOST_BUF_COUNT, + 0, + HFI_PROP_BUFFER_HOST_MAX_COUNT, + CAP_FLAG_OUTPUT_PORT}, + + {CONCEAL_COLOR_8BIT, DEC, CODECS_ALL, 0x0, 0xff3fcff, 1, + DEFAULT_VIDEO_CONCEAL_COLOR_BLACK, + V4L2_CID_MPEG_VIDEO_MUTE_YUV, + HFI_PROP_CONCEAL_COLOR_8BIT, + CAP_FLAG_INPUT_PORT}, + + {CONCEAL_COLOR_10BIT, DEC, CODECS_ALL, 0x0, 0x3fffffff, 1, + DEFAULT_VIDEO_CONCEAL_COLOR_BLACK, + V4L2_CID_MPEG_VIDEO_MUTE_YUV, + HFI_PROP_CONCEAL_COLOR_10BIT, + CAP_FLAG_INPUT_PORT}, + + {STAGE, DEC|ENC, CODECS_ALL, + MSM_VIDC_STAGE_1, + MSM_VIDC_STAGE_2, 1, + MSM_VIDC_STAGE_2, + 0, + HFI_PROP_STAGE}, + + {PIPE, DEC|ENC, CODECS_ALL, + MSM_VIDC_PIPE_1, + MSM_VIDC_PIPE_4, 1, + MSM_VIDC_PIPE_4, + 0, + HFI_PROP_PIPE}, + + {POC, DEC, H264, 0, 2, 1, 1, + 0, + HFI_PROP_PIC_ORDER_CNT_TYPE}, + + {QUALITY_MODE, ENC, CODECS_ALL, + MSM_VIDC_MAX_QUALITY_MODE, + MSM_VIDC_POWER_SAVE_MODE, 1, + MSM_VIDC_POWER_SAVE_MODE}, + + {CODED_FRAMES, DEC, H264|HEVC, + CODED_FRAMES_PROGRESSIVE, CODED_FRAMES_INTERLACE, + 1, CODED_FRAMES_PROGRESSIVE, + 0, + HFI_PROP_CODED_FRAMES}, + + {BIT_DEPTH, DEC, CODECS_ALL, BIT_DEPTH_8, BIT_DEPTH_10, 1, BIT_DEPTH_8, + 0, + HFI_PROP_LUMA_CHROMA_BIT_DEPTH}, + + {CODEC_CONFIG, DEC, H264|HEVC, 0, 1, 1, 0, + 0, 0, + CAP_FLAG_DYNAMIC_ALLOWED}, + + {BITSTREAM_SIZE_OVERWRITE, DEC, CODECS_ALL, 0, INT_MAX, 1, 0, + 0}, + + {THUMBNAIL_MODE, DEC, CODECS_ALL, + 0, 1, 1, 0, + 0, + HFI_PROP_THUMBNAIL_MODE, + CAP_FLAG_INPUT_PORT}, + + {DEFAULT_HEADER, DEC, CODECS_ALL, + 0, 1, 1, 0, + 0, + HFI_PROP_DEC_DEFAULT_HEADER}, + + {RAP_FRAME, DEC, CODECS_ALL, + 0, 1, 1, 1, + 0, + HFI_PROP_DEC_START_FROM_RAP_FRAME, + CAP_FLAG_INPUT_PORT}, + + {SEQ_CHANGE_AT_SYNC_FRAME, DEC, CODECS_ALL, + 0, 1, 1, 1, + 0, + HFI_PROP_SEQ_CHANGE_AT_SYNC_FRAME, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {PRIORITY, DEC|ENC, CODECS_ALL, + 0, 1 + NRT_PRIORITY_OFFSET, 1, 1 + NRT_PRIORITY_OFFSET, + 0, + HFI_PROP_SESSION_PRIORITY, + CAP_FLAG_DYNAMIC_ALLOWED}, + + {FIRMWARE_PRIORITY_OFFSET, DEC | ENC, CODECS_ALL, + 1, 1, 1, 1}, + + {DPB_LIST, DEC, CODECS_ALL, + 0, 1, 1, 0, + 0, + HFI_PROP_DPB_LIST, + CAP_FLAG_OUTPUT_PORT}, + + {ALL_INTRA, ENC, H264|HEVC, + 0, 1, 1, 0, + 0, + 0, + CAP_FLAG_OUTPUT_PORT}, + + {COMPLEXITY, ENC, H264|HEVC, + 0, 100, + 1, DEFAULT_COMPLEXITY, + 0}, +}; + +static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_waipio[] = { + /* {cap, domain, codec, + * children, + * adjust, set} + */ + + {PIX_FMTS, ENC, H264, + {0}}, + + {PIX_FMTS, ENC, HEVC, + {PROFILE, MIN_FRAME_QP, MAX_FRAME_QP, I_FRAME_QP, P_FRAME_QP, + B_FRAME_QP, MIN_QUALITY, BLUR_TYPES}}, + + {PIX_FMTS, DEC, HEVC, + {PROFILE}}, + + {FRAME_RATE, ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_q16}, + + {HFLIP, ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_flip}, + + {VFLIP, ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_flip}, + + {ROTATION, ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_rotation}, + + {SUPER_FRAME, ENC, H264|HEVC, + {INPUT_BUF_HOST_MAX_COUNT, OUTPUT_BUF_HOST_MAX_COUNT}, + NULL, + NULL}, + + {HEADER_MODE, ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_header_mode}, + + {WITHOUT_STARTCODE, ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_nal_length}, + + {REQUEST_I_FRAME, ENC, H264|HEVC, + {0}, + NULL, + msm_vidc_set_req_sync_frame}, + + {BIT_RATE, ENC, H264, + {PEAK_BITRATE}, + msm_vidc_adjust_bitrate, + msm_vidc_set_bitrate}, + + {BIT_RATE, ENC, HEVC, + {PEAK_BITRATE}, + msm_vidc_adjust_bitrate, + msm_vidc_set_bitrate}, + + {BITRATE_MODE, ENC, H264, + {LTR_COUNT, I_FRAME_QP, P_FRAME_QP, + B_FRAME_QP, ENH_LAYER_COUNT, BIT_RATE, + MIN_QUALITY, VBV_DELAY, + PEAK_BITRATE, SLICE_MODE, CONTENT_ADAPTIVE_CODING, + BLUR_TYPES, LOWLATENCY_MODE}, + msm_vidc_adjust_bitrate_mode, + msm_vidc_set_u32_enum}, + + {BITRATE_MODE, ENC, HEVC, + {LTR_COUNT, I_FRAME_QP, P_FRAME_QP, + B_FRAME_QP, CONSTANT_QUALITY, ENH_LAYER_COUNT, + BIT_RATE, MIN_QUALITY, VBV_DELAY, + PEAK_BITRATE, SLICE_MODE, CONTENT_ADAPTIVE_CODING, + BLUR_TYPES, LOWLATENCY_MODE}, + msm_vidc_adjust_bitrate_mode, + msm_vidc_set_u32_enum}, + + {CONSTANT_QUALITY, ENC, HEVC, + {0}, + NULL, + msm_vidc_set_constant_quality}, + + {GOP_SIZE, ENC, CODECS_ALL, + {ALL_INTRA}, + msm_vidc_adjust_gop_size, + msm_vidc_set_gop_size}, + + {B_FRAME, ENC, H264|HEVC, + {ALL_INTRA}, + msm_vidc_adjust_b_frame, + msm_vidc_set_u32}, + + {BLUR_TYPES, ENC, H264|HEVC, + {0}, + msm_vidc_adjust_blur_type_iris2, + msm_vidc_set_u32_enum}, + + {LOWLATENCY_MODE, ENC, H264 | HEVC, + {STAGE, BIT_RATE}, + msm_vidc_adjust_enc_lowlatency_mode, + NULL}, + + {LOWLATENCY_MODE, DEC, H264|HEVC|VP9, + {STAGE}, + msm_vidc_adjust_dec_lowlatency_mode, + NULL}, + + {LTR_COUNT, ENC, H264|HEVC, + {0}, + msm_vidc_adjust_ltr_count, + msm_vidc_set_u32}, + + {USE_LTR, ENC, H264|HEVC, + {0}, + msm_vidc_adjust_use_ltr, + msm_vidc_set_use_and_mark_ltr}, + + {MARK_LTR, ENC, H264|HEVC, + {0}, + msm_vidc_adjust_mark_ltr, + msm_vidc_set_use_and_mark_ltr}, + + {AU_DELIMITER, ENC, H264|HEVC, + {0}, + NULL, + msm_vidc_set_u32}, + + {CONTENT_ADAPTIVE_CODING, ENC, H264|HEVC, + {REQUEST_PREPROCESS}, + msm_vidc_adjust_brs, + msm_vidc_set_vbr_related_properties}, + + {REQUEST_PREPROCESS, ENC, H264|HEVC, + {0}, + msm_vidc_adjust_preprocess, + msm_vidc_set_preprocess}, + + {MIN_QUALITY, ENC, H264, + {BLUR_TYPES}, + msm_vidc_adjust_min_quality, + msm_vidc_set_u32}, + + {MIN_QUALITY, ENC, HEVC, + {BLUR_TYPES}, + msm_vidc_adjust_min_quality, + msm_vidc_set_u32}, + + {VBV_DELAY, ENC, H264|HEVC, + {0}, + NULL, + msm_vidc_set_cbr_related_properties}, + + {PEAK_BITRATE, ENC, H264|HEVC, + {0}, + msm_vidc_adjust_peak_bitrate, + msm_vidc_set_cbr_related_properties}, + + {MIN_FRAME_QP, ENC, H264, + {0}, + NULL, + msm_vidc_set_min_qp}, + + {MIN_FRAME_QP, ENC, HEVC, + {0}, + msm_vidc_adjust_hevc_min_qp, + msm_vidc_set_min_qp}, + + {MAX_FRAME_QP, ENC, H264, + {0}, + NULL, + msm_vidc_set_max_qp}, + + {MAX_FRAME_QP, ENC, HEVC, + {0}, + msm_vidc_adjust_hevc_max_qp, + msm_vidc_set_max_qp}, + + {I_FRAME_QP, ENC, HEVC, + {0}, + msm_vidc_adjust_hevc_i_frame_qp, + msm_vidc_set_frame_qp}, + + {I_FRAME_QP, ENC, H264, + {0}, + NULL, + msm_vidc_set_frame_qp}, + + {P_FRAME_QP, ENC, HEVC, + {0}, + msm_vidc_adjust_hevc_p_frame_qp, + msm_vidc_set_frame_qp}, + + {P_FRAME_QP, ENC, H264, + {0}, + NULL, + msm_vidc_set_frame_qp}, + + {B_FRAME_QP, ENC, HEVC, + {0}, + msm_vidc_adjust_hevc_b_frame_qp, + msm_vidc_set_frame_qp}, + + {B_FRAME_QP, ENC, H264, + {0}, + NULL, + msm_vidc_set_frame_qp}, + + {LAYER_TYPE, ENC, H264, + {CONTENT_ADAPTIVE_CODING}}, + + {LAYER_ENABLE, ENC, H264|HEVC, + {CONTENT_ADAPTIVE_CODING}}, + + {ENH_LAYER_COUNT, ENC, H264|HEVC, + {GOP_SIZE, B_FRAME, BIT_RATE, MIN_QUALITY, SLICE_MODE}, + msm_vidc_adjust_layer_count, + msm_vidc_set_layer_count_and_type}, + + {L0_BR, ENC, H264|HEVC, + {0}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, + + {L1_BR, ENC, H264|HEVC, + {0}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, + + {L2_BR, ENC, H264|HEVC, + {0}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, + + {L3_BR, ENC, H264|HEVC, + {0}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, + + {L4_BR, ENC, H264|HEVC, + {0}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, + + {L5_BR, ENC, H264|HEVC, + {0}, + msm_vidc_adjust_dynamic_layer_bitrate, + msm_vidc_set_dynamic_layer_bitrate}, + + {ENTROPY_MODE, ENC, H264, + {BIT_RATE}, + msm_vidc_adjust_entropy_mode, + msm_vidc_set_u32}, + + {PROFILE, ENC, H264, + {ENTROPY_MODE, TRANSFORM_8X8}, + NULL, + msm_vidc_set_u32_enum}, + + {PROFILE, DEC, H264, + {ENTROPY_MODE}, + NULL, + msm_vidc_set_u32_enum}, + + {PROFILE, ENC|DEC, HEVC, + {0}, + msm_vidc_adjust_profile, + msm_vidc_set_u32_enum}, + + {PROFILE, DEC, VP9, + {0}, + NULL, + msm_vidc_set_u32_enum}, + + {LEVEL, DEC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_u32_enum}, + + {LEVEL, ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_level}, + + {HEVC_TIER, ENC|DEC, HEVC, + {0}, + NULL, + msm_vidc_set_u32_enum}, + + {LF_MODE, ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_deblock_mode}, + + {SLICE_MODE, ENC, H264|HEVC, + {STAGE}, + msm_vidc_adjust_slice_count, + msm_vidc_set_slice_count}, + + {TRANSFORM_8X8, ENC, H264, + {0}, + msm_vidc_adjust_transform_8x8, + msm_vidc_set_u32}, + + {CHROMA_QP_INDEX_OFFSET, ENC, HEVC, + {0}, + msm_vidc_adjust_chroma_qp_index_offset, + msm_vidc_set_chroma_qp_index_offset}, + + {DISPLAY_DELAY_ENABLE, DEC, H264|HEVC|VP9, + {OUTPUT_ORDER}, + NULL, + NULL}, + + {DISPLAY_DELAY, DEC, H264|HEVC|VP9, + {OUTPUT_ORDER}, + NULL, + NULL}, + + {OUTPUT_ORDER, DEC, H264|HEVC|VP9, + {0}, + msm_vidc_adjust_output_order, + msm_vidc_set_u32}, + + {INPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL, + {0}, + msm_vidc_adjust_input_buf_host_max_count, + msm_vidc_set_u32}, + + {INPUT_BUF_HOST_MAX_COUNT, ENC, H264|HEVC, + {0}, + msm_vidc_adjust_input_buf_host_max_count, + msm_vidc_set_u32}, + + {OUTPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL, + {0}, + msm_vidc_adjust_output_buf_host_max_count, + msm_vidc_set_u32}, + + {OUTPUT_BUF_HOST_MAX_COUNT, ENC, H264|HEVC, + {0}, + msm_vidc_adjust_output_buf_host_max_count, + msm_vidc_set_u32}, + + {CONCEAL_COLOR_8BIT, DEC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_u32_packed}, + + {CONCEAL_COLOR_10BIT, DEC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_u32_packed}, + + {STAGE, ENC|DEC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_stage}, + + {STAGE, ENC, H264|HEVC, + {0}, + NULL, + msm_vidc_set_stage}, + + {STAGE, DEC, H264|HEVC|VP9, + {0}, + NULL, + msm_vidc_set_stage}, + + {PIPE, DEC|ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_pipe}, + + {THUMBNAIL_MODE, DEC, CODECS_ALL, + {OUTPUT_ORDER}, + NULL, + msm_vidc_set_u32}, + + {RAP_FRAME, DEC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_u32}, + + {PRIORITY, DEC|ENC, CODECS_ALL, + {0}, + msm_vidc_adjust_session_priority, + msm_vidc_set_session_priority}, + + {FIRMWARE_PRIORITY_OFFSET, DEC | ENC, CODECS_ALL, + {0}, + NULL, + NULL}, + + {DPB_LIST, DEC, CODECS_ALL, + {0}, + NULL, + NULL}, + + {ALL_INTRA, ENC, H264|HEVC, + {LTR_COUNT, SLICE_MODE, BIT_RATE}, + msm_vidc_adjust_all_intra, + NULL}, +}; + +/* Default UBWC config for LPDDR5 */ +static struct msm_vidc_ubwc_config_data ubwc_config_waipio[] = { + UBWC_CONFIG(8, 32, 16, 0, 1, 1, 1), +}; + +static struct msm_vidc_format_capability format_data_waipio = { + .codec_info = codec_data_waipio, + .codec_info_size = ARRAY_SIZE(codec_data_waipio), + .color_format_info = color_format_data_waipio, + .color_format_info_size = ARRAY_SIZE(color_format_data_waipio), + .color_prim_info = color_primaries_data_waipio, + .color_prim_info_size = ARRAY_SIZE(color_primaries_data_waipio), + .transfer_char_info = transfer_char_data_waipio, + .transfer_char_info_size = ARRAY_SIZE(transfer_char_data_waipio), + .matrix_coeff_info = matrix_coeff_data_waipio, + .matrix_coeff_info_size = ARRAY_SIZE(matrix_coeff_data_waipio), +}; + +/* name, min_kbps, max_kbps */ +static const struct bw_table waipio_bw_table[] = { + { "venus-cnoc", 1000, 1000 }, + { "venus-ddr", 1000, 15000000 }, +}; + +/* name, clock id, scaling */ +static const struct clk_table waipio_clk_table[] = { + { "gcc_video_axi0", GCC_VIDEO_AXI0_CLK, 0 }, + { "core_clk", VIDEO_CC_MVS0C_CLK, 1 }, + { "vcodec_clk", VIDEO_CC_MVS0_CLK, 1 }, +}; + +/* name */ +static const struct clk_rst_table waipio_clk_reset_table[] = { + { "video_axi_reset" }, + { "video_core_reset" }, +}; + +/* name, start, size, secure, dma_coherant */ +const struct context_bank_table waipio_context_bank_table[] = { + {"qcom,vidc,cb-ns", 0x25800000, 0xba800000, 0, 1, MSM_VIDC_NON_SECURE, 0xe0000000 - 1}, + {"qcom,vidc,cb-sec-non-pxl", 0x01000000, 0x24800000, 1, 0, MSM_VIDC_SECURE_NONPIXEL, 0 }, +}; + +/* freq */ +static struct freq_table waipio_freq_table[] = { + {444000000}, {366000000}, {338000000}, {239999999} +}; + +/* register, value, mask */ +static const struct reg_preset_table waipio_reg_preset_table[] = { + { 0xB0088, 0x0, 0x11 }, +}; + +static const struct msm_vidc_platform_data waipio_data = { + /* resources dependent on other module */ + .bw_tbl = waipio_bw_table, + .bw_tbl_size = ARRAY_SIZE(waipio_bw_table), + .regulator_tbl = NULL, + .regulator_tbl_size = 0, + .clk_tbl = waipio_clk_table, + .clk_tbl_size = ARRAY_SIZE(waipio_clk_table), + .clk_rst_tbl = waipio_clk_reset_table, + .clk_rst_tbl_size = ARRAY_SIZE(waipio_clk_reset_table), + .subcache_tbl = NULL, + .subcache_tbl_size = 0, + + /* populate context bank */ + .context_bank_tbl = waipio_context_bank_table, + .context_bank_tbl_size = ARRAY_SIZE(waipio_context_bank_table), + + /* platform specific resources */ + .freq_tbl = waipio_freq_table, + .freq_tbl_size = ARRAY_SIZE(waipio_freq_table), + .reg_prst_tbl = waipio_reg_preset_table, + .reg_prst_tbl_size = ARRAY_SIZE(waipio_reg_preset_table), + .fwname = "vpu20_4v", + .pas_id = 9, + .supports_mmrm = 0, + + /* caps related resorces */ + .core_data = core_data_waipio, + .core_data_size = ARRAY_SIZE(core_data_waipio), + .inst_cap_data = instance_cap_data_waipio, + .inst_cap_data_size = ARRAY_SIZE(instance_cap_data_waipio), + .inst_cap_dependency_data = instance_cap_dependency_data_waipio, + .inst_cap_dependency_data_size = ARRAY_SIZE(instance_cap_dependency_data_waipio), + .csc_data.vpe_csc_custom_bias_coeff = vpe_csc_custom_bias_coeff, + .csc_data.vpe_csc_custom_matrix_coeff = vpe_csc_custom_matrix_coeff, + .csc_data.vpe_csc_custom_limit_coeff = vpe_csc_custom_limit_coeff, + .ubwc_config = ubwc_config_waipio, + .format_data = &format_data_waipio, +}; + +static int msm_vidc_init_data(struct msm_vidc_core *core, struct device *dev) +{ + int rc = 0; + + if (!core || !core->platform) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + d_vpr_h("%s: initialize waipio data\n", __func__); + + core->platform->data = waipio_data; + + return rc; +} + +int msm_vidc_init_platform_waipio(struct msm_vidc_core *core, struct device *dev) +{ + int rc = 0; + + rc = msm_vidc_init_data(core, dev); + if (rc) + return rc; + + return 0; +} + +int msm_vidc_deinit_platform_waipio(struct msm_vidc_core *core, struct device *dev) +{ + /* do nothing */ + return 0; +} From cf13b6dfe51b3277a1cb319802b5ecc967bde801 Mon Sep 17 00:00:00 2001 From: Ankush Mitra Date: Tue, 20 Sep 2022 14:12:56 +0530 Subject: [PATCH 0789/1061] video: driver: makefile change to compile upstream driver Makefile changes to include upstream driver specific files for successful compilation of upstream driver. Change-Id: I18b7d3324d49360b79104546df56b2d4f1fcbcd9 Signed-off-by: Dikshita Agarwal Signed-off-by: Ankush Mitra --- Android.mk | 6 +-- Kbuild | 100 +--------------------------------------------- Makefile | 6 ++- msm_video/Kbuild | 101 +++++++++++++++++++++++++++++++++++++++++++++++ video/Kbuild | 54 +++++++++++++++++++++++++ 5 files changed, 161 insertions(+), 106 deletions(-) create mode 100644 msm_video/Kbuild create mode 100644 video/Kbuild diff --git a/Android.mk b/Android.mk index 8302bf59cd..c1ecd96745 100644 --- a/Android.mk +++ b/Android.mk @@ -17,8 +17,6 @@ VIDEO_SELECT := CONFIG_MSM_VIDC_V4L2=m # This is set once per LOCAL_PATH, not per (kernel) module KBUILD_OPTIONS := VIDEO_ROOT=$(VIDEO_BLD_DIR) -KBUILD_OPTIONS += MODNAME=msm_video -KBUILD_OPTIONS += BOARD_PLATFORM=$(TARGET_BOARD_PLATFORM) KBUILD_OPTIONS += $(VIDEO_SELECT) KBUILD_OPTIONS += KBUILD_EXTRA_SYMBOLS=$(shell pwd)/$(call intermediates-dir-for,DLKM,mmrm-module-symvers)/Module.symvers @@ -32,7 +30,7 @@ include $(CLEAR_VARS) # For incremental compilation LOCAL_SRC_FILES := $(wildcard $(LOCAL_PATH)/**/*) $(wildcard $(LOCAL_PATH)/*) LOCAL_MODULE := msm_video.ko -LOCAL_MODULE_KBUILD_NAME := msm_video.ko +LOCAL_MODULE_KBUILD_NAME := msm_video/msm_video.ko LOCAL_MODULE_TAGS := optional LOCAL_MODULE_DEBUG_ENABLE := true LOCAL_MODULE_PATH := $(KERNEL_MODULES_OUT) @@ -40,7 +38,5 @@ LOCAL_MODULE_PATH := $(KERNEL_MODULES_OUT) LOCAL_REQUIRED_MODULES := mmrm-module-symvers LOCAL_ADDITIONAL_DEPENDENCIES := $(call intermediates-dir-for,DLKM,mmrm-module-symvers)/Module.symvers -# Include kp_module.ko in the /vendor/lib/modules (vendor.img) -# BOARD_VENDOR_KERNEL_MODULES += $(LOCAL_MODULE_PATH)/$(LOCAL_MODULE) include $(DLKM_DIR)/Build_external_kernelmodule.mk endif diff --git a/Kbuild b/Kbuild index 95fdc366a2..ef3e358001 100644 --- a/Kbuild +++ b/Kbuild @@ -1,99 +1 @@ -# SPDX-License-Identifier: GPL-2.0-only - -KBUILD_CPPFLAGS += -DCONFIG_MSM_MMRM=1 - -ifeq ($(CONFIG_ARCH_WAIPIO), y) -include $(VIDEO_ROOT)/config/waipio_video.conf -LINUXINCLUDE += -include $(VIDEO_ROOT)/config/waipio_video.h \ - -I$(VIDEO_ROOT)/driver/platform/waipio/inc -endif - -ifeq ($(CONFIG_ARCH_KALAMA), y) -include $(VIDEO_ROOT)/config/kalama_video.conf -LINUXINCLUDE += -include $(VIDEO_ROOT)/config/kalama_video.h \ - -I$(VIDEO_ROOT)/driver/platform/kalama/inc -endif - -ifeq ($(CONFIG_ARCH_PINEAPPLE), y) -include $(VIDEO_ROOT)/config/pineapple_video.conf -LINUXINCLUDE += -include $(VIDEO_ROOT)/config/pineapple_video.h \ - -I$(VIDEO_ROOT)/driver/platform/pineapple/inc -endif - -ifeq ($(CONFIG_ARCH_ANORAK), y) -include $(VIDEO_ROOT)/config/anorak_video.conf -LINUXINCLUDE += -include $(VIDEO_ROOT)/config/anorak_video.h \ - -I$(VIDEO_ROOT)/driver/platform/anorak/inc -endif - -LINUXINCLUDE += -I$(VIDEO_ROOT)/driver/vidc/inc \ - -I$(VIDEO_ROOT)/driver/platform/common/inc \ - -I$(VIDEO_ROOT)/driver/variant/common/inc \ - -I$(VIDEO_ROOT)/include/uapi/vidc - -USERINCLUDE += -I$(VIDEO_ROOT)/include/uapi/vidc/media \ - -I$(VIDEO_ROOT)/include/uapi/vidc - -obj-m += msm_video.o - -ifeq ($(CONFIG_MSM_VIDC_WAIPIO), y) -msm_video-objs += driver/platform/waipio/src/msm_vidc_waipio.o -endif - -ifeq ($(CONFIG_MSM_VIDC_KALAMA), y) -msm_video-objs += driver/platform/kalama/src/msm_vidc_kalama.o -endif - -ifeq ($(CONFIG_MSM_VIDC_PINEAPPLE), y) -msm_video-objs += driver/platform/pineapple/src/msm_vidc_pineapple.o -endif - -ifeq ($(CONFIG_MSM_VIDC_ANORAK), y) -msm_video-objs += driver/platform/anorak/src/msm_vidc_anorak.o -endif - -ifeq ($(CONFIG_MSM_VIDC_IRIS2), y) -LINUXINCLUDE += -I$(VIDEO_ROOT)/driver/variant/iris2/inc -msm_video-objs += driver/variant/iris2/src/msm_vidc_buffer_iris2.o \ - driver/variant/iris2/src/msm_vidc_power_iris2.o \ - driver/variant/iris2/src/msm_vidc_iris2.o -endif - -ifeq ($(CONFIG_MSM_VIDC_IRIS3), y) -LINUXINCLUDE += -I$(VIDEO_ROOT)/driver/variant/iris3/inc -msm_video-objs += driver/variant/iris3/src/msm_vidc_buffer_iris3.o \ - driver/variant/iris3/src/msm_vidc_power_iris3.o \ - driver/variant/iris3/src/msm_vidc_iris3.o -endif - -ifeq ($(CONFIG_MSM_VIDC_IRIS33), y) -LINUXINCLUDE += -I$(VIDEO_ROOT)/driver/variant/iris33/inc -msm_video-objs += driver/variant/iris33/src/msm_vidc_buffer_iris33.o \ - driver/variant/iris33/src/msm_vidc_power_iris33.o \ - driver/variant/iris33/src/msm_vidc_iris33.o -endif - -msm_video-objs += driver/vidc/src/msm_vidc_v4l2.o \ - driver/vidc/src/msm_vidc_vb2.o \ - driver/vidc/src/msm_vidc.o \ - driver/vidc/src/msm_vdec.o \ - driver/vidc/src/msm_venc.o \ - driver/vidc/src/msm_vidc_driver.o \ - driver/vidc/src/msm_vidc_state.o \ - driver/vidc/src/msm_vidc_control.o \ - driver/vidc/src/msm_vidc_control_ext.o \ - driver/vidc/src/msm_vidc_buffer.o \ - driver/vidc/src/msm_vidc_power.o \ - driver/vidc/src/msm_vidc_probe.o \ - driver/vidc/src/resources.o \ - driver/vidc/src/firmware.o \ - driver/vidc/src/msm_vidc_debug.o \ - driver/vidc/src/msm_vidc_memory.o \ - driver/vidc/src/msm_vidc_memory_ext.o \ - driver/vidc/src/msm_vidc_fence.o \ - driver/vidc/src/venus_hfi.o \ - driver/vidc/src/venus_hfi_queue.o \ - driver/vidc/src/hfi_packet.o \ - driver/vidc/src/venus_hfi_response.o \ - driver/platform/common/src/msm_vidc_platform.o \ - driver/variant/common/src/msm_vidc_variant.o +obj-m := msm_video/ video/ diff --git a/Makefile b/Makefile index 92b3f7f075..04a894a58b 100644 --- a/Makefile +++ b/Makefile @@ -1,7 +1,5 @@ # SPDX-License-Identifier: GPL-2.0-only -KBUILD_OPTIONS+= VIDEO_ROOT=$(KERNEL_SRC)/$(M) - VIDEO_COMPILE_TIME = $(shell date) VIDEO_COMPILE_BY = $(shell whoami | sed 's/\\/\\\\/') VIDEO_COMPILE_HOST = $(shell uname -n) @@ -15,7 +13,11 @@ $(VIDEO_GEN_PATH): $(shell find . -type f \( -iname \*.c -o -iname \*.h -o -inam echo '#define VIDEO_COMPILE_HOST "$(VIDEO_COMPILE_HOST)"' >> $(VIDEO_GEN_PATH) modules: $(VIDEO_GEN_PATH) + ln -sf $(VIDEO_ROOT)/driver $(VIDEO_ROOT)/msm_video/driver + ln -sf $(VIDEO_ROOT)/driver $(VIDEO_ROOT)/video/driver $(MAKE) -C $(KERNEL_SRC) M=$(M) modules $(KBUILD_OPTIONS) + rm $(VIDEO_ROOT)/msm_video/driver + rm $(VIDEO_ROOT)/video/driver modules_install: $(MAKE) INSTALL_MOD_STRIP=1 -C $(KERNEL_SRC) M=$(M) modules_install diff --git a/msm_video/Kbuild b/msm_video/Kbuild new file mode 100644 index 0000000000..5e1a7967e6 --- /dev/null +++ b/msm_video/Kbuild @@ -0,0 +1,101 @@ +# SPDX-License-Identifier: GPL-2.0-only + +KBUILD_CPPFLAGS += -DCONFIG_MSM_MMRM=1 +VIDEO_DRIVER_ABS_PATH := $(VIDEO_ROOT)/msm_video/driver +VIDEO_DRIVER_REL_PATH := ../msm_video/driver + +ifeq ($(CONFIG_ARCH_WAIPIO), y) +include $(VIDEO_ROOT)/config/waipio_video.conf +LINUXINCLUDE += -include $(VIDEO_ROOT)/config/waipio_video.h \ + -I$(VIDEO_DRIVER_ABS_PATH)/platform/waipio/inc +endif + +ifeq ($(CONFIG_ARCH_KALAMA), y) +include $(VIDEO_ROOT)/config/kalama_video.conf +LINUXINCLUDE += -include $(VIDEO_ROOT)/config/kalama_video.h \ + -I$(VIDEO_DRIVER_ABS_PATH)/platform/kalama/inc +endif + +ifeq ($(CONFIG_ARCH_PINEAPPLE), y) +include $(VIDEO_ROOT)/config/pineapple_video.conf +LINUXINCLUDE += -include $(VIDEO_ROOT)/config/pineapple_video.h \ + -I$(VIDEO_DRIVER_ABS_PATH)/platform/pineapple/inc +endif + +ifeq ($(CONFIG_ARCH_ANORAK), y) +include $(VIDEO_ROOT)/config/anorak_video.conf +LINUXINCLUDE += -include $(VIDEO_ROOT)/config/anorak_video.h \ + -I$(VIDEO_DRIVER_ABS_PATH)/platform/anorak/inc +endif + +LINUXINCLUDE += -I$(VIDEO_DRIVER_ABS_PATH)/vidc/inc \ + -I$(VIDEO_DRIVER_ABS_PATH)/platform/common/inc \ + -I$(VIDEO_DRIVER_ABS_PATH)/variant/common/inc \ + -I$(VIDEO_ROOT)/include/uapi/vidc + +USERINCLUDE += -I$(VIDEO_ROOT)/include/uapi/vidc/media \ + -I$(VIDEO_ROOT)/include/uapi/vidc + +obj-m += msm_video.o + +ifeq ($(CONFIG_MSM_VIDC_WAIPIO), y) +msm_video-objs += $(VIDEO_DRIVER_REL_PATH)/platform/waipio/src/msm_vidc_waipio.o +endif + +ifeq ($(CONFIG_MSM_VIDC_KALAMA), y) +msm_video-objs += $(VIDEO_DRIVER_REL_PATH)/platform/kalama/src/msm_vidc_kalama.o +endif + +ifeq ($(CONFIG_MSM_VIDC_PINEAPPLE), y) +msm_video-objs += $(VIDEO_DRIVER_REL_PATH)/platform/pineapple/src/msm_vidc_pineapple.o +endif + +ifeq ($(CONFIG_MSM_VIDC_ANORAK), y) +msm_video-objs += $(VIDEO_DRIVER_REL_PATH)/platform/anorak/src/msm_vidc_anorak.o +endif + +ifeq ($(CONFIG_MSM_VIDC_IRIS2), y) +LINUXINCLUDE += -I$(VIDEO_DRIVER_ABS_PATH)/variant/iris2/inc +msm_video-objs += $(VIDEO_DRIVER_REL_PATH)/variant/iris2/src/msm_vidc_buffer_iris2.o \ + $(VIDEO_DRIVER_REL_PATH)/variant/iris2/src/msm_vidc_power_iris2.o \ + $(VIDEO_DRIVER_REL_PATH)/variant/iris2/src/msm_vidc_iris2.o +endif + +ifeq ($(CONFIG_MSM_VIDC_IRIS3), y) +LINUXINCLUDE += -I$(VIDEO_DRIVER_ABS_PATH)/variant/iris3/inc +msm_video-objs += $(VIDEO_DRIVER_REL_PATH)/variant/iris3/src/msm_vidc_buffer_iris3.o \ + $(VIDEO_DRIVER_REL_PATH)/variant/iris3/src/msm_vidc_power_iris3.o \ + $(VIDEO_DRIVER_REL_PATH)/variant/iris3/src/msm_vidc_iris3.o +endif + +ifeq ($(CONFIG_MSM_VIDC_IRIS33), y) +LINUXINCLUDE += -I$(VIDEO_DRIVER_ABS_PATH)/variant/iris33/inc +msm_video-objs += $(VIDEO_DRIVER_REL_PATH)/variant/iris33/src/msm_vidc_buffer_iris33.o \ + $(VIDEO_DRIVER_REL_PATH)/variant/iris33/src/msm_vidc_power_iris33.o \ + $(VIDEO_DRIVER_REL_PATH)/variant/iris33/src/msm_vidc_iris33.o +endif + +msm_video-objs += $(VIDEO_DRIVER_REL_PATH)/vidc/src/msm_vidc_v4l2.o \ + $(VIDEO_DRIVER_REL_PATH)/vidc/src/msm_vidc_vb2.o \ + $(VIDEO_DRIVER_REL_PATH)/vidc/src/msm_vidc.o \ + $(VIDEO_DRIVER_REL_PATH)/vidc/src/msm_vdec.o \ + $(VIDEO_DRIVER_REL_PATH)/vidc/src/msm_venc.o \ + $(VIDEO_DRIVER_REL_PATH)/vidc/src/msm_vidc_driver.o \ + $(VIDEO_DRIVER_REL_PATH)/vidc/src/msm_vidc_state.o \ + $(VIDEO_DRIVER_REL_PATH)/vidc/src/msm_vidc_control.o \ + $(VIDEO_DRIVER_REL_PATH)/vidc/src/msm_vidc_control_ext.o \ + $(VIDEO_DRIVER_REL_PATH)/vidc/src/msm_vidc_buffer.o \ + $(VIDEO_DRIVER_REL_PATH)/vidc/src/msm_vidc_power.o \ + $(VIDEO_DRIVER_REL_PATH)/vidc/src/msm_vidc_probe.o \ + $(VIDEO_DRIVER_REL_PATH)/vidc/src/resources.o \ + $(VIDEO_DRIVER_REL_PATH)/vidc/src/firmware.o \ + $(VIDEO_DRIVER_REL_PATH)/vidc/src/msm_vidc_debug.o \ + $(VIDEO_DRIVER_REL_PATH)/vidc/src/msm_vidc_memory.o \ + $(VIDEO_DRIVER_REL_PATH)/vidc/src/msm_vidc_memory_ext.o \ + $(VIDEO_DRIVER_REL_PATH)/vidc/src/msm_vidc_fence.o \ + $(VIDEO_DRIVER_REL_PATH)/vidc/src/venus_hfi.o \ + $(VIDEO_DRIVER_REL_PATH)/vidc/src/venus_hfi_queue.o \ + $(VIDEO_DRIVER_REL_PATH)/vidc/src/hfi_packet.o \ + $(VIDEO_DRIVER_REL_PATH)/vidc/src/venus_hfi_response.o \ + $(VIDEO_DRIVER_REL_PATH)/platform/common/src/msm_vidc_platform.o \ + $(VIDEO_DRIVER_REL_PATH)/variant/common/src/msm_vidc_variant.o diff --git a/video/Kbuild b/video/Kbuild new file mode 100644 index 0000000000..8f34e74bd6 --- /dev/null +++ b/video/Kbuild @@ -0,0 +1,54 @@ +# SPDX-License-Identifier: GPL-2.0-only + +VIDEO_DRIVER_ABS_PATH := $(VIDEO_ROOT)/video/driver +VIDEO_DRIVER_REL_PATH := ../video/driver + +ifeq ($(CONFIG_ARCH_KALAMA), y) +include $(VIDEO_ROOT)/config/kalama_video.conf +LINUXINCLUDE += -include $(VIDEO_ROOT)/config/kalama_video.h \ + -I$(VIDEO_DRIVER_ABS_PATH)/platform/kalama/inc +endif + +LINUXINCLUDE += -I$(VIDEO_DRIVER_ABS_PATH)/vidc/inc \ + -I$(VIDEO_DRIVER_ABS_PATH)/platform/common/inc \ + -I$(VIDEO_DRIVER_ABS_PATH)/variant/common/inc \ + -I$(VIDEO_ROOT)/include/uapi/vidc + +USERINCLUDE += -I$(VIDEO_ROOT)/include/uapi/vidc/media \ + -I$(VIDEO_ROOT)/include/uapi/vidc + +obj-m += video.o + +ifeq ($(CONFIG_MSM_VIDC_KALAMA), y) +video-objs += $(VIDEO_DRIVER_REL_PATH)/platform/kalama/src/kalama.o +endif + +ifeq ($(CONFIG_MSM_VIDC_IRIS3), y) +LINUXINCLUDE += -I$(VIDEO_DRIVER_ABS_PATH)/variant/iris3/inc +video-objs += $(VIDEO_DRIVER_REL_PATH)/variant/iris3/src/msm_vidc_buffer_iris3.o \ + $(VIDEO_DRIVER_REL_PATH)/variant/iris3/src/msm_vidc_power_iris3.o \ + $(VIDEO_DRIVER_REL_PATH)/variant/iris3/src/msm_vidc_iris3.o +endif + +video-objs += $(VIDEO_DRIVER_REL_PATH)/vidc/src/msm_vidc_v4l2.o \ + $(VIDEO_DRIVER_REL_PATH)/vidc/src/msm_vidc_vb2.o \ + $(VIDEO_DRIVER_REL_PATH)/vidc/src/msm_vidc.o \ + $(VIDEO_DRIVER_REL_PATH)/vidc/src/msm_vdec.o \ + $(VIDEO_DRIVER_REL_PATH)/vidc/src/msm_venc.o \ + $(VIDEO_DRIVER_REL_PATH)/vidc/src/msm_vidc_driver.o \ + $(VIDEO_DRIVER_REL_PATH)/vidc/src/msm_vidc_state.o \ + $(VIDEO_DRIVER_REL_PATH)/vidc/src/msm_vidc_control.o \ + $(VIDEO_DRIVER_REL_PATH)/vidc/src/msm_vidc_buffer.o \ + $(VIDEO_DRIVER_REL_PATH)/vidc/src/msm_vidc_power.o \ + $(VIDEO_DRIVER_REL_PATH)/vidc/src/msm_vidc_probe.o \ + $(VIDEO_DRIVER_REL_PATH)/vidc/src/resources.o \ + $(VIDEO_DRIVER_REL_PATH)/vidc/src/firmware.o \ + $(VIDEO_DRIVER_REL_PATH)/vidc/src/msm_vidc_debug.o \ + $(VIDEO_DRIVER_REL_PATH)/vidc/src/msm_vidc_memory.o \ + $(VIDEO_DRIVER_REL_PATH)/vidc/src/msm_vidc_fence.o \ + $(VIDEO_DRIVER_REL_PATH)/vidc/src/venus_hfi.o \ + $(VIDEO_DRIVER_REL_PATH)/vidc/src/venus_hfi_queue.o \ + $(VIDEO_DRIVER_REL_PATH)/vidc/src/hfi_packet.o \ + $(VIDEO_DRIVER_REL_PATH)/vidc/src/venus_hfi_response.o \ + $(VIDEO_DRIVER_REL_PATH)/platform/common/src/msm_vidc_platform.o \ + $(VIDEO_DRIVER_REL_PATH)/variant/common/src/msm_vidc_variant.o From a0082a4c813cbb120c85efb856d5c877e691c861 Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Wed, 4 Jan 2023 12:58:31 -0800 Subject: [PATCH 0790/1061] video: driver: amend xo reset clock as shared resource Use devm_reset_control_get_exclusive_released() instead of devm_reset_control_get() to get the reset control of video_xo_reset clock as it is shared reset clock between eva and video drivers. Use reset_control_acquire() before assert and reset_control_release() after de-assert video_xo_reset clock to avoid eva driver operating on it in parallel. Change-Id: I4936ed7a4556bb56d4b28546084fc877080308ef Signed-off-by: Deepa Guthyappa Madivalara Signed-off-by: Darshana Patil --- driver/platform/anorak/src/msm_vidc_anorak.c | 4 +- .../platform/common/inc/msm_vidc_platform.h | 1 + driver/platform/kalama/src/msm_vidc_kalama.c | 4 +- .../pineapple/src/msm_vidc_pineapple.c | 8 +- driver/platform/waipio/src/msm_vidc_waipio.c | 6 +- driver/variant/iris33/src/msm_vidc_iris33.c | 30 +++++++ driver/vidc/inc/resources.h | 5 ++ driver/vidc/src/resources.c | 82 ++++++++++++++++++- 8 files changed, 126 insertions(+), 14 deletions(-) diff --git a/driver/platform/anorak/src/msm_vidc_anorak.c b/driver/platform/anorak/src/msm_vidc_anorak.c index 9b9a297ba2..ed82cd2193 100644 --- a/driver/platform/anorak/src/msm_vidc_anorak.c +++ b/driver/platform/anorak/src/msm_vidc_anorak.c @@ -2314,9 +2314,9 @@ static const struct clk_table anorak_clk_table[] = { { "video_cc_mvs0_clk_src", VIDEO_CC_MVS0_CLK_SRC, 1 }, }; -/* name */ +/* name, exclusive_release */ static const struct clk_rst_table anorak_clk_reset_table[] = { - { "video_axi_reset" }, + { "video_axi_reset", 0 }, }; /* name, llcc_id */ diff --git a/driver/platform/common/inc/msm_vidc_platform.h b/driver/platform/common/inc/msm_vidc_platform.h index 40edd300fd..9bd7c677df 100644 --- a/driver/platform/common/inc/msm_vidc_platform.h +++ b/driver/platform/common/inc/msm_vidc_platform.h @@ -60,6 +60,7 @@ struct clk_table { struct clk_rst_table { const char *name; + bool exclusive_release; }; struct subcache_table { diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index 4a1e8828a0..9f699d6ece 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -2514,9 +2514,9 @@ static const struct clk_table kalama_clk_table[] = { { "video_cc_mvs0_clk_src", VIDEO_CC_MVS0_CLK_SRC, 1 }, }; -/* name */ +/* name, exclusive_release */ static const struct clk_rst_table kalama_clk_reset_table[] = { - { "video_axi_reset" }, + { "video_axi_reset", 0 }, }; /* name, llcc_id */ diff --git a/driver/platform/pineapple/src/msm_vidc_pineapple.c b/driver/platform/pineapple/src/msm_vidc_pineapple.c index 192e9679ab..2a62101100 100644 --- a/driver/platform/pineapple/src/msm_vidc_pineapple.c +++ b/driver/platform/pineapple/src/msm_vidc_pineapple.c @@ -2547,11 +2547,11 @@ static const struct clk_table pineapple_clk_table[] = { { "video_cc_mvs0_clk_src", VIDEO_CC_MVS0_CLK_SRC, 1 }, }; -/* name */ +/* name, exclusive_release */ static const struct clk_rst_table pineapple_clk_reset_table[] = { - { "video_axi_reset" }, - { "video_xo_reset" }, - { "video_mvs0c_reset" }, + { "video_axi_reset", 0 }, + { "video_xo_reset", 1 }, + { "video_mvs0c_reset", 0 }, }; /* name, llcc_id */ diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index d7c9cbdb00..f2aaa59cd2 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -2060,10 +2060,10 @@ static const struct clk_table waipio_clk_table[] = { { "video_cc_mvs0_clk_src", VIDEO_CC_MVS0_CLK_SRC, 1 }, }; -/* name */ +/* name, exclusive_release */ static const struct clk_rst_table waipio_clk_reset_table[] = { - { "video_axi_reset" }, - { "video_core_reset" }, + { "video_axi_reset", 0 }, + { "video_core_reset", 0 }, }; /* name, llcc_id */ diff --git a/driver/variant/iris33/src/msm_vidc_iris33.c b/driver/variant/iris33/src/msm_vidc_iris33.c index cc358e7065..121753af6f 100644 --- a/driver/variant/iris33/src/msm_vidc_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_iris33.c @@ -4,6 +4,7 @@ * Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved. */ +#include #include "msm_vidc_iris33.h" #include "msm_vidc_buffer_iris33.h" #include "msm_vidc_power_iris33.h" @@ -384,6 +385,7 @@ static int __power_off_iris33_controller(struct msm_vidc_core *core) { int rc = 0; int value = 0; + u32 count = 0; /* * mask fal10_veto QLPAC error since fal10_veto can go 1 @@ -467,6 +469,28 @@ static int __power_off_iris33_controller(struct msm_vidc_core *core) if (rc) return rc; + /* + * need to acquire "video_xo_reset" before assert and release + * after de-assert "video_xo_reset" reset clock to avoid other + * drivers (eva driver) operating on this shared reset clock + * and AON_WRAPPER_SPARE register in parallel. + */ + count = 0; + do { + rc = call_res_op(core, reset_control_acquire, core, "video_xo_reset"); + if (rc) { + d_vpr_e("%s: failed to acquire video_xo_reset control\n", __func__); + } else { + count++; + usleep_range(1000, 1000); + } + } while (rc && count < 100); + + if (count >= 100) { + d_vpr_e("%s: timeout acquiring video_xo_reset\n", __func__); + goto skip_video_xo_reset; + } + /* poll AON spare register bit0 to become zero with 50ms timeout */ rc = __read_register_with_poll_timeout(core, AON_WRAPPER_SPARE, 0x1, 0x0, 1000, 50 * 1000); @@ -500,6 +524,12 @@ static int __power_off_iris33_controller(struct msm_vidc_core *core) if (rc) return rc; + /* release reset control for other consumers */ + rc = call_res_op(core, reset_control_release, core, "video_xo_reset"); + if (rc) + d_vpr_e("%s: failed to release video_xo_reset reset\n", __func__); + +skip_video_xo_reset: /* Enable MVP NoC clock */ rc = __write_register_masked(core, AON_WRAPPER_MVP_NOC_CORE_CLK_CONTROL, 0x0, BIT(0)); diff --git a/driver/vidc/inc/resources.h b/driver/vidc/inc/resources.h index 830ca2d796..463cb6cbba 100644 --- a/driver/vidc/inc/resources.h +++ b/driver/vidc/inc/resources.h @@ -136,6 +136,7 @@ struct clock_set { struct reset_info { struct reset_control *rst; const char *name; + bool exclusive_release; }; struct reset_set { @@ -208,6 +209,10 @@ struct msm_vidc_resources_ops { int (*init)(struct msm_vidc_core *core); int (*reset_bridge)(struct msm_vidc_core *core); + int (*reset_control_acquire)(struct msm_vidc_core *core, + const char *name); + int (*reset_control_release)(struct msm_vidc_core *core, + const char *name); int (*reset_control_assert)(struct msm_vidc_core *core, const char *name); int (*reset_control_deassert)(struct msm_vidc_core *core, diff --git a/driver/vidc/src/resources.c b/driver/vidc/src/resources.c index ca4ca83a1e..5bc2f7deaf 100644 --- a/driver/vidc/src/resources.c +++ b/driver/vidc/src/resources.c @@ -401,17 +401,24 @@ static int __init_reset_clocks(struct msm_vidc_core *core) rsts->count = rst_count; /* populate clock field from platform data */ - for (cnt = 0; cnt < rsts->count; cnt++) + for (cnt = 0; cnt < rsts->count; cnt++) { rsts->reset_tbl[cnt].name = rst_tbl[cnt].name; + rsts->reset_tbl[cnt].exclusive_release = rst_tbl[cnt].exclusive_release; + } /* print reset clock fields */ venus_hfi_for_each_reset_clock(core, rinfo) { - d_vpr_h("%s: reset clk %s\n", __func__, rinfo->name); + d_vpr_h("%s: reset clk %s, exclusive %d\n", + __func__, rinfo->name, rinfo->exclusive_release); } /* get reset clock handle */ venus_hfi_for_each_reset_clock(core, rinfo) { - rinfo->rst = devm_reset_control_get(&core->pdev->dev, rinfo->name); + if (rinfo->exclusive_release) + rinfo->rst = devm_reset_control_get_exclusive_released( + &core->pdev->dev, rinfo->name); + else + rinfo->rst = devm_reset_control_get(&core->pdev->dev, rinfo->name); if (IS_ERR_OR_NULL(rinfo->rst)) { d_vpr_e("%s: failed to get reset clock: %s\n", __func__, rinfo->name); rc = PTR_ERR(rinfo->rst) ? @@ -1323,6 +1330,73 @@ static int __init_resources(struct msm_vidc_core *core) return rc; } +static int __reset_control_acquire_name(struct msm_vidc_core *core, + const char *name) +{ + struct reset_info *rcinfo = NULL; + int rc = 0; + bool found = false; + + venus_hfi_for_each_reset_clock(core, rcinfo) { + if (strcmp(rcinfo->name, name)) + continue; + + /* this function is valid only for exclusive_release reset clocks*/ + if (!rcinfo->exclusive_release) { + d_vpr_e("%s: unsupported reset control (%s), exclusive %d\n", + __func__, name, rcinfo->exclusive_release); + return -EINVAL; + } + + found = true; + rc = reset_control_acquire(rcinfo->rst); + if (rc) + d_vpr_e("%s: failed to acquire reset control (%s), rc = %d\n", + __func__, rcinfo->name, rc); + else + d_vpr_h("%s: acquire reset control (%s)\n", + __func__, rcinfo->name); + break; + } + if (!found) { + d_vpr_e("%s: reset control (%s) not found\n", __func__, name); + rc = -EINVAL; + } + + return rc; +} + +static int __reset_control_release_name(struct msm_vidc_core *core, + const char *name) +{ + struct reset_info *rcinfo = NULL; + int rc = 0; + bool found = false; + + venus_hfi_for_each_reset_clock(core, rcinfo) { + if (strcmp(rcinfo->name, name)) + continue; + + /* this function is valid only for exclusive_release reset clocks*/ + if (!rcinfo->exclusive_release) { + d_vpr_e("%s: unsupported reset control (%s), exclusive %d\n", + __func__, name, rcinfo->exclusive_release); + return -EINVAL; + } + + found = true; + reset_control_release(rcinfo->rst); + d_vpr_h("%s: release reset control (%s)\n", __func__, rcinfo->name); + break; + } + if (!found) { + d_vpr_e("%s: reset control (%s) not found\n", __func__, name); + rc = -EINVAL; + } + + return rc; +} + static int __reset_control_assert_name(struct msm_vidc_core *core, const char *name) { @@ -1448,6 +1522,8 @@ static int __reset_ahb2axi_bridge(struct msm_vidc_core *core) static const struct msm_vidc_resources_ops res_ops = { .init = __init_resources, .reset_bridge = __reset_ahb2axi_bridge, + .reset_control_acquire = __reset_control_acquire_name, + .reset_control_release = __reset_control_release_name, .reset_control_assert = __reset_control_assert_name, .reset_control_deassert = __reset_control_deassert_name, .gdsc_on = __enable_regulator, From 88612676b6257ee30c709e6c6eefda55bc7918ef Mon Sep 17 00:00:00 2001 From: Mihir Ganu Date: Mon, 19 Dec 2022 11:30:47 -0800 Subject: [PATCH 0791/1061] video: driver: Enable power collapse Enable software power collapse. Change-Id: Ie542587465a1688e7bd0a7669b93b64620b2e356 Signed-off-by: Mihir Ganu --- driver/platform/pineapple/src/msm_vidc_pineapple.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/driver/platform/pineapple/src/msm_vidc_pineapple.c b/driver/platform/pineapple/src/msm_vidc_pineapple.c index 192e9679ab..0ac9d25ff8 100644 --- a/driver/platform/pineapple/src/msm_vidc_pineapple.c +++ b/driver/platform/pineapple/src/msm_vidc_pineapple.c @@ -306,7 +306,7 @@ static struct msm_platform_core_capability core_data_pineapple[] = { {MAX_MBPS_ALL_INTRA, 2088960}, /* 4096x2176/256 MBs@60fps */ {MAX_ENH_LAYER_COUNT, 5}, {NUM_VPP_PIPE, 4}, - {SW_PC, 0}, + {SW_PC, 1}, {FW_UNLOAD, 0}, {HW_RESPONSE_TIMEOUT, HW_RESPONSE_TIMEOUT_VALUE}, /* 1000 ms */ {SW_PC_DELAY, SW_PC_DELAY_VALUE }, /* 1500 ms (>HW_RESPONSE_TIMEOUT)*/ From cfe3869048cb529bb45cdebd5c4112adac618f62 Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Tue, 10 Jan 2023 16:38:40 -0800 Subject: [PATCH 0792/1061] video: driver: introduce macros from hfi_registers.h Introduce macros defined in hfi_registers.h interface file and cleanup unused macros. Change-Id: Icf05f2ca2fb69556a1c8d076c87af687fd98ed87 Signed-off-by: Darshana Patil --- driver/variant/iris33/src/msm_vidc_iris33.c | 190 +++++++------------- 1 file changed, 66 insertions(+), 124 deletions(-) diff --git a/driver/variant/iris33/src/msm_vidc_iris33.c b/driver/variant/iris33/src/msm_vidc_iris33.c index 121753af6f..81ba57d34d 100644 --- a/driver/variant/iris33/src/msm_vidc_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_iris33.c @@ -22,74 +22,58 @@ #define VIDEO_ARCH_LX 1 #define VCODEC_BASE_OFFS_IRIS33 0x00000000 -#define AON_MVP_NOC_RESET 0x0001F000 -#define CPU_BASE_OFFS_IRIS33 0x000A0000 -#define AON_BASE_OFFS 0x000E0000 -#define CPU_CS_BASE_OFFS_IRIS33 (CPU_BASE_OFFS_IRIS33) -#define CPU_IC_BASE_OFFS_IRIS33 (CPU_BASE_OFFS_IRIS33) +#define VCODEC_CPU_CS_IRIS33 0x000A0000 +#define AON_BASE_OFFS 0x000E0000 -#define CPU_CS_A2HSOFTINTCLR_IRIS33 (CPU_CS_BASE_OFFS_IRIS33 + 0x1C) -#define CPU_CS_VCICMD_IRIS33 (CPU_CS_BASE_OFFS_IRIS33 + 0x20) -#define CPU_CS_VCICMDARG0_IRIS33 (CPU_CS_BASE_OFFS_IRIS33 + 0x24) -#define CPU_CS_VCICMDARG1_IRIS33 (CPU_CS_BASE_OFFS_IRIS33 + 0x28) -#define CPU_CS_VCICMDARG2_IRIS33 (CPU_CS_BASE_OFFS_IRIS33 + 0x2C) -#define CPU_CS_VCICMDARG3_IRIS33 (CPU_CS_BASE_OFFS_IRIS33 + 0x30) -#define CPU_CS_VMIMSG_IRIS33 (CPU_CS_BASE_OFFS_IRIS33 + 0x34) -#define CPU_CS_VMIMSGAG0_IRIS33 (CPU_CS_BASE_OFFS_IRIS33 + 0x38) -#define CPU_CS_VMIMSGAG1_IRIS33 (CPU_CS_BASE_OFFS_IRIS33 + 0x3C) -#define CPU_CS_SCIACMD_IRIS33 (CPU_CS_BASE_OFFS_IRIS33 + 0x48) -#define CPU_CS_H2XSOFTINTEN_IRIS33 (CPU_CS_BASE_OFFS_IRIS33 + 0x148) +#define VCODEC_VPU_CPU_CS_VCICMDARG0_IRIS33 (VCODEC_CPU_CS_IRIS33 + 0x24) +#define VCODEC_VPU_CPU_CS_VCICMDARG1_IRIS33 (VCODEC_CPU_CS_IRIS33 + 0x28) +#define VCODEC_VPU_CPU_CS_SCIACMD_IRIS33 (VCODEC_CPU_CS_IRIS33 + 0x48) +#define VCODEC_VPU_CPU_CS_SCIACMDARG0_IRIS33 (VCODEC_CPU_CS_IRIS33 + 0x4C) +#define VCODEC_VPU_CPU_CS_SCIACMDARG1_IRIS33 (VCODEC_CPU_CS_IRIS33 + 0x50) +#define VCODEC_VPU_CPU_CS_SCIACMDARG2_IRIS33 (VCODEC_CPU_CS_IRIS33 + 0x54) +#define VCODEC_VPU_CPU_CS_SCIBCMD_IRIS33 (VCODEC_CPU_CS_IRIS33 + 0x5C) +#define VCODEC_VPU_CPU_CS_SCIBCMDARG0_IRIS33 (VCODEC_CPU_CS_IRIS33 + 0x60) +#define VCODEC_VPU_CPU_CS_SCIBARG1_IRIS33 (VCODEC_CPU_CS_IRIS33 + 0x64) +#define VCODEC_VPU_CPU_CS_SCIBARG2_IRIS33 (VCODEC_CPU_CS_IRIS33 + 0x68) -/* HFI_CTRL_STATUS */ -#define CPU_CS_SCIACMDARG0_IRIS33 (CPU_CS_BASE_OFFS_IRIS33 + 0x4C) -#define CPU_CS_SCIACMDARG0_HFI_CTRL_ERROR_STATUS_BMSK_IRIS33 0xfe -#define CPU_CS_SCIACMDARG0_HFI_CTRL_PC_READY_IRIS33 0x100 -#define CPU_CS_SCIACMDARG0_HFI_CTRL_INIT_IDLE_MSG_BMSK_IRIS33 0x40000000 +#define HFI_CTRL_INIT_IRIS33 VCODEC_VPU_CPU_CS_SCIACMD_IRIS33 +#define HFI_CTRL_STATUS_IRIS33 VCODEC_VPU_CPU_CS_SCIACMDARG0_IRIS33 +typedef enum +{ + HFI_CTRL_NOT_INIT = 0x0, + HFI_CTRL_READY = 0x1, + HFI_CTRL_ERROR_FATAL = 0x2, + HFI_CTRL_ERROR_UC_REGION_NOT_SET = 0x4, + HFI_CTRL_PC_READY = 0x100, + HFI_CTRL_VCODEC_IDLE = 0x40000000 +} hfi_ctrl_status_type; -/* HFI_QTBL_INFO */ -#define CPU_CS_SCIACMDARG1_IRIS33 (CPU_CS_BASE_OFFS_IRIS33 + 0x50) +#define HFI_QTBL_INFO_IRIS33 VCODEC_VPU_CPU_CS_SCIACMDARG1_IRIS33 +typedef enum +{ + HFI_QTBL_DISABLED = 0x00, + HFI_QTBL_ENABLED = 0x01, +} hfi_qtbl_status_type; -/* HFI_QTBL_ADDR */ -#define CPU_CS_SCIACMDARG2_IRIS33 (CPU_CS_BASE_OFFS_IRIS33 + 0x54) +#define HFI_QTBL_ADDR_IRIS33 VCODEC_VPU_CPU_CS_SCIACMDARG2_IRIS33 +#define HFI_MMAP_ADDR_IRIS33 VCODEC_VPU_CPU_CS_SCIBCMDARG0_IRIS33 +#define HFI_UC_REGION_ADDR_IRIS33 VCODEC_VPU_CPU_CS_SCIBARG1_IRIS33 +#define HFI_UC_REGION_SIZE_IRIS33 VCODEC_VPU_CPU_CS_SCIBARG2_IRIS33 +#define HFI_DEVICE_REGION_ADDR_IRIS33 VCODEC_VPU_CPU_CS_VCICMDARG0_IRIS33 +#define HFI_DEVICE_REGION_SIZE_IRIS33 VCODEC_VPU_CPU_CS_VCICMDARG1_IRIS33 +#define HFI_SFR_ADDR_IRIS33 VCODEC_VPU_CPU_CS_SCIBCMD_IRIS33 -/* HFI_VERSION_INFO */ -#define CPU_CS_SCIACMDARG3_IRIS33 (CPU_CS_BASE_OFFS_IRIS33 + 0x58) +#define CPU_CS_A2HSOFTINTCLR_IRIS33 (VCODEC_CPU_CS_IRIS33 + 0x1C) +#define CPU_CS_H2XSOFTINTEN_IRIS33 (VCODEC_CPU_CS_IRIS33 + 0x148) -/* SFR_ADDR */ -#define CPU_CS_SCIBCMD_IRIS33 (CPU_CS_BASE_OFFS_IRIS33 + 0x5C) - -/* MMAP_ADDR */ -#define CPU_CS_SCIBCMDARG0_IRIS33 (CPU_CS_BASE_OFFS_IRIS33 + 0x60) - -/* UC_REGION_ADDR */ -#define CPU_CS_SCIBARG1_IRIS33 (CPU_CS_BASE_OFFS_IRIS33 + 0x64) - -/* UC_REGION_ADDR */ -#define CPU_CS_SCIBARG2_IRIS33 (CPU_CS_BASE_OFFS_IRIS33 + 0x68) - -#define CPU_CS_AHB_BRIDGE_SYNC_RESET (CPU_CS_BASE_OFFS_IRIS33 + 0x160) -#define CPU_CS_AHB_BRIDGE_SYNC_RESET_STATUS (CPU_CS_BASE_OFFS_IRIS33 + 0x164) +#define CPU_CS_AHB_BRIDGE_SYNC_RESET (VCODEC_CPU_CS_IRIS33 + 0x160) /* FAL10 Feature Control */ -#define CPU_CS_X2RPMh_IRIS33 (CPU_CS_BASE_OFFS_IRIS33 + 0x168) -#define CPU_CS_X2RPMh_MASK0_BMSK_IRIS33 0x1 -#define CPU_CS_X2RPMh_MASK0_SHFT_IRIS33 0x0 -#define CPU_CS_X2RPMh_MASK1_BMSK_IRIS33 0x2 -#define CPU_CS_X2RPMh_MASK1_SHFT_IRIS33 0x1 -#define CPU_CS_X2RPMh_SWOVERRIDE_BMSK_IRIS33 0x4 -#define CPU_CS_X2RPMh_SWOVERRIDE_SHFT_IRIS33 0x3 +#define CPU_CS_X2RPMh_IRIS33 (VCODEC_CPU_CS_IRIS33 + 0x168) -#define CPU_IC_SOFTINT_IRIS33 (CPU_IC_BASE_OFFS_IRIS33 + 0x150) +#define CPU_IC_SOFTINT_IRIS33 (VCODEC_CPU_CS_IRIS33 + 0x150) #define CPU_IC_SOFTINT_H2A_SHFT_IRIS33 0x0 -/* - * -------------------------------------------------------------------------- - * MODULE: AON_MVP_NOC_RESET_REGISTERS - * -------------------------------------------------------------------------- - */ -#define AON_WRAPPER_MVP_NOC_RESET_REQ (AON_MVP_NOC_RESET + 0x000) -#define AON_WRAPPER_MVP_NOC_RESET_ACK (AON_MVP_NOC_RESET + 0x004) - /* * -------------------------------------------------------------------------- * MODULE: wrapper @@ -104,10 +88,6 @@ #define WRAPPER_INTR_MASK_A2HWD_BMSK_IRIS33 0x8 #define WRAPPER_INTR_MASK_A2HCPU_BMSK_IRIS33 0x4 -#define WRAPPER_CPU_CLOCK_CONFIG_IRIS33 (WRAPPER_BASE_OFFS_IRIS33 + 0x2000) -#define WRAPPER_CPU_CGC_DIS_IRIS33 (WRAPPER_BASE_OFFS_IRIS33 + 0x2010) -#define WRAPPER_CPU_STATUS_IRIS33 (WRAPPER_BASE_OFFS_IRIS33 + 0x2014) - #define WRAPPER_DEBUG_BRIDGE_LPI_CONTROL_IRIS33 (WRAPPER_BASE_OFFS_IRIS33 + 0x54) #define WRAPPER_DEBUG_BRIDGE_LPI_STATUS_IRIS33 (WRAPPER_BASE_OFFS_IRIS33 + 0x58) #define WRAPPER_IRIS_CPU_NOC_LPI_CONTROL (WRAPPER_BASE_OFFS_IRIS33 + 0x5C) @@ -121,33 +101,10 @@ * -------------------------------------------------------------------------- */ #define WRAPPER_TZ_BASE_OFFS 0x000C0000 -#define WRAPPER_TZ_CPU_CLOCK_CONFIG (WRAPPER_TZ_BASE_OFFS) #define WRAPPER_TZ_CPU_STATUS (WRAPPER_TZ_BASE_OFFS + 0x10) #define WRAPPER_TZ_CTL_AXI_CLOCK_CONFIG (WRAPPER_TZ_BASE_OFFS + 0x14) #define WRAPPER_TZ_QNS4PDXFIFO_RESET (WRAPPER_TZ_BASE_OFFS + 0x18) -#define CTRL_INIT_IRIS33 CPU_CS_SCIACMD_IRIS33 - -#define CTRL_STATUS_IRIS33 CPU_CS_SCIACMDARG0_IRIS33 -#define CTRL_ERROR_STATUS__M_IRIS33 \ - CPU_CS_SCIACMDARG0_HFI_CTRL_ERROR_STATUS_BMSK_IRIS33 -#define CTRL_INIT_IDLE_MSG_BMSK_IRIS33 \ - CPU_CS_SCIACMDARG0_HFI_CTRL_INIT_IDLE_MSG_BMSK_IRIS33 -#define CTRL_STATUS_PC_READY_IRIS33 \ - CPU_CS_SCIACMDARG0_HFI_CTRL_PC_READY_IRIS33 - - -#define QTBL_INFO_IRIS33 CPU_CS_SCIACMDARG1_IRIS33 - -#define QTBL_ADDR_IRIS33 CPU_CS_SCIACMDARG2_IRIS33 - -#define VERSION_INFO_IRIS33 CPU_CS_SCIACMDARG3_IRIS33 - -#define SFR_ADDR_IRIS33 CPU_CS_SCIBCMD_IRIS33 -#define MMAP_ADDR_IRIS33 CPU_CS_SCIBCMDARG0_IRIS33 -#define UC_REGION_ADDR_IRIS33 CPU_CS_SCIBARG1_IRIS33 -#define UC_REGION_SIZE_IRIS33 CPU_CS_SCIBARG2_IRIS33 - #define AON_WRAPPER_MVP_NOC_LPI_CONTROL (AON_BASE_OFFS) #define AON_WRAPPER_MVP_NOC_LPI_STATUS (AON_BASE_OFFS + 0x4) #define AON_WRAPPER_MVP_NOC_CORE_SW_RESET (AON_BASE_OFFS + 0x18) @@ -160,27 +117,6 @@ */ #define VCODEC_SS_IDLE_STATUSn (VCODEC_BASE_OFFS_IRIS33 + 0x70) -/* - * -------------------------------------------------------------------------- - * MODULE: vcodec noc error log registers (iris33) - * -------------------------------------------------------------------------- - */ -#define VCODEC_NOC_VIDEO_A_NOC_BASE_OFFS 0x00010000 -#define VCODEC_NOC_ERL_MAIN_SWID_LOW 0x00011200 -#define VCODEC_NOC_ERL_MAIN_SWID_HIGH 0x00011204 -#define VCODEC_NOC_ERL_MAIN_MAINCTL_LOW 0x00011208 -#define VCODEC_NOC_ERL_MAIN_ERRVLD_LOW 0x00011210 -#define VCODEC_NOC_ERL_MAIN_ERRCLR_LOW 0x00011218 -#define VCODEC_NOC_ERL_MAIN_ERRLOG0_LOW 0x00011220 -#define VCODEC_NOC_ERL_MAIN_ERRLOG0_HIGH 0x00011224 -#define VCODEC_NOC_ERL_MAIN_ERRLOG1_LOW 0x00011228 -#define VCODEC_NOC_ERL_MAIN_ERRLOG1_HIGH 0x0001122C -#define VCODEC_NOC_ERL_MAIN_ERRLOG2_LOW 0x00011230 -#define VCODEC_NOC_ERL_MAIN_ERRLOG2_HIGH 0x00011234 -#define VCODEC_NOC_ERL_MAIN_ERRLOG3_LOW 0x00011238 -#define VCODEC_NOC_ERL_MAIN_ERRLOG3_HIGH 0x0001123C - - static int __interrupt_init_iris33(struct msm_vidc_core *vidc_core) { struct msm_vidc_core *core = vidc_core; @@ -219,38 +155,38 @@ static int __setup_ucregion_memory_map_iris33(struct msm_vidc_core *vidc_core) } value = (u32)core->iface_q_table.align_device_addr; - rc = __write_register(core, UC_REGION_ADDR_IRIS33, value); + rc = __write_register(core, HFI_UC_REGION_ADDR_IRIS33, value); if (rc) return rc; value = SHARED_QSIZE; - rc = __write_register(core, UC_REGION_SIZE_IRIS33, value); + rc = __write_register(core, HFI_UC_REGION_SIZE_IRIS33, value); if (rc) return rc; value = (u32)core->iface_q_table.align_device_addr; - rc = __write_register(core, QTBL_ADDR_IRIS33, value); + rc = __write_register(core, HFI_QTBL_ADDR_IRIS33, value); if (rc) return rc; - rc = __write_register(core, QTBL_INFO_IRIS33, 0x01); + rc = __write_register(core, HFI_QTBL_INFO_IRIS33, HFI_QTBL_ENABLED); if (rc) return rc; /* update queues vaddr for debug purpose */ value = (u32)((u64)core->iface_q_table.align_virtual_addr); - rc = __write_register(core, CPU_CS_VCICMDARG0_IRIS33, value); + rc = __write_register(core, HFI_DEVICE_REGION_ADDR_IRIS33, value); if (rc) return rc; value = (u32)((u64)core->iface_q_table.align_virtual_addr >> 32); - rc = __write_register(core, CPU_CS_VCICMDARG1_IRIS33, value); + rc = __write_register(core, HFI_DEVICE_REGION_SIZE_IRIS33, value); if (rc) return rc; if (core->sfr.align_device_addr) { value = (u32)core->sfr.align_device_addr + VIDEO_ARCH_LX; - rc = __write_register(core, SFR_ADDR_IRIS33, value); + rc = __write_register(core, HFI_SFR_ADDR_IRIS33, value); if (rc) return rc; } @@ -758,11 +694,11 @@ static int __prepare_pc_iris33(struct msm_vidc_core *vidc_core) return -EINVAL; } - rc = __read_register(core, CTRL_STATUS_IRIS33, &ctrl_status); + rc = __read_register(core, HFI_CTRL_STATUS_IRIS33, &ctrl_status); if (rc) return rc; - pc_ready = ctrl_status & CTRL_STATUS_PC_READY_IRIS33; + pc_ready = ctrl_status & HFI_CTRL_PC_READY; idle_status = ctrl_status & BIT(30); if (pc_ready) { @@ -785,8 +721,8 @@ static int __prepare_pc_iris33(struct msm_vidc_core *vidc_core) goto skip_power_off; } - rc = __read_register_with_poll_timeout(core, CTRL_STATUS_IRIS33, - CTRL_STATUS_PC_READY_IRIS33, CTRL_STATUS_PC_READY_IRIS33, 250, 2500); + rc = __read_register_with_poll_timeout(core, HFI_CTRL_STATUS_IRIS33, + HFI_CTRL_PC_READY, HFI_CTRL_PC_READY, 250, 2500); if (rc) { d_vpr_e("%s: Skip PC. Ctrl status not set\n", __func__); goto skip_power_off; @@ -801,7 +737,7 @@ static int __prepare_pc_iris33(struct msm_vidc_core *vidc_core) return rc; skip_power_off: - rc = __read_register(core, CTRL_STATUS_IRIS33, &ctrl_status); + rc = __read_register(core, HFI_CTRL_STATUS_IRIS33, &ctrl_status); if (rc) return rc; rc = __read_register(core, WRAPPER_TZ_CPU_STATUS, &wfi_status); @@ -913,7 +849,7 @@ static int __clear_interrupt_iris33(struct msm_vidc_core *vidc_core) mask = (WRAPPER_INTR_STATUS_A2H_BMSK_IRIS33| WRAPPER_INTR_STATUS_A2HWD_BMSK_IRIS33| - CTRL_INIT_IDLE_MSG_BMSK_IRIS33); + HFI_CTRL_VCODEC_IDLE); if (intr_status & mask) { core->intr_status |= intr_status; @@ -948,17 +884,23 @@ static int __boot_firmware_iris33(struct msm_vidc_core *vidc_core) ctrl_init_val = BIT(0); - rc = __write_register(core, CTRL_INIT_IRIS33, ctrl_init_val); + rc = __write_register(core, HFI_CTRL_INIT_IRIS33, ctrl_init_val); if (rc) return rc; - while (!ctrl_status && count < max_tries) { - rc = __read_register(core, CTRL_STATUS_IRIS33, &ctrl_status); + while (count < max_tries) { + rc = __read_register(core, HFI_CTRL_STATUS_IRIS33, &ctrl_status); if (rc) return rc; - if ((ctrl_status & CTRL_ERROR_STATUS__M_IRIS33) == 0x4) { - d_vpr_e("invalid setting for UC_REGION\n"); + if ((ctrl_status & HFI_CTRL_ERROR_FATAL) || + (ctrl_status & HFI_CTRL_ERROR_UC_REGION_NOT_SET)) { + d_vpr_e("%s: boot firmware failed, ctrl status %#x\n", + __func__, ctrl_status); + return -EINVAL; + } else if (ctrl_status & HFI_CTRL_READY) { + d_vpr_h("%s: boot firmware is successful, ctrl status %#x\n", + __func__, ctrl_status); break; } @@ -967,7 +909,7 @@ static int __boot_firmware_iris33(struct msm_vidc_core *vidc_core) } if (count >= max_tries) { - d_vpr_e("Error booting up vidc firmware\n"); + d_vpr_e("Error booting up vidc firmware, ctrl status %#x\n", ctrl_status); return -ETIME; } From ea34534af057d46fe8ed425d051adb13e9d69429 Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Fri, 13 Jan 2023 14:58:17 -0800 Subject: [PATCH 0793/1061] video: driver: update copyright markings to 2023 update copyright markings to 2023 in all files. Change-Id: I6842d56c4a8fff6a7a93d0c1d4bc049041297b02 Signed-off-by: Darshana Patil --- config/anorak_video.h | 4 ++-- config/kalama_video.h | 4 ++-- config/pineapple_video.h | 4 ++-- config/waipio_video.h | 3 ++- driver/platform/anorak/inc/msm_vidc_anorak.h | 3 ++- driver/platform/anorak/src/msm_vidc_anorak.c | 4 ++-- driver/platform/common/inc/msm_vidc_platform.h | 9 +++++---- driver/platform/common/src/msm_vidc_platform.c | 6 +++--- driver/platform/kalama/inc/msm_vidc_kalama.h | 3 ++- driver/platform/kalama/src/kalama.c | 2 +- driver/platform/kalama/src/msm_vidc_kalama.c | 4 ++-- .../platform/pineapple/inc/msm_vidc_pineapple.h | 3 ++- .../platform/pineapple/src/msm_vidc_pineapple.c | 4 ++-- driver/platform/pineapple/src/pineapple.c | 4 ++-- driver/platform/waipio/inc/msm_vidc_waipio.h | 3 +++ driver/platform/waipio/src/msm_vidc_waipio.c | 4 ++-- driver/platform/waipio/src/waipio.c | 4 ++-- driver/variant/common/inc/msm_vidc_variant.h | 6 +++--- driver/variant/common/src/msm_vidc_variant.c | 6 ++---- driver/variant/iris2/inc/hfi_buffer_iris2.h | 15 ++++++++------- driver/variant/iris2/inc/msm_vidc_buffer_iris2.h | 2 ++ driver/variant/iris2/inc/msm_vidc_iris2.h | 3 +++ driver/variant/iris2/inc/msm_vidc_power_iris2.h | 3 ++- driver/variant/iris2/src/msm_vidc_buffer_iris2.c | 3 ++- driver/variant/iris2/src/msm_vidc_iris2.c | 3 ++- driver/variant/iris2/src/msm_vidc_power_iris2.c | 3 ++- driver/variant/iris3/inc/hfi_buffer_iris3.h | 16 ++++++++-------- driver/variant/iris3/inc/msm_vidc_buffer_iris3.h | 3 ++- driver/variant/iris3/inc/msm_vidc_iris3.h | 4 +++- driver/variant/iris3/inc/msm_vidc_power_iris3.h | 4 ++-- driver/variant/iris3/src/msm_vidc_buffer_iris3.c | 6 +++--- driver/variant/iris3/src/msm_vidc_iris3.c | 4 ++-- driver/variant/iris3/src/msm_vidc_power_iris3.c | 4 ++-- driver/variant/iris33/inc/hfi_buffer_iris33.h | 16 ++++++++-------- .../variant/iris33/inc/msm_vidc_buffer_iris33.h | 3 ++- driver/variant/iris33/inc/msm_vidc_iris33.h | 4 +++- .../variant/iris33/inc/msm_vidc_power_iris33.h | 4 ++-- .../variant/iris33/src/msm_vidc_buffer_iris33.c | 6 +++--- driver/variant/iris33/src/msm_vidc_iris33.c | 4 ++-- .../variant/iris33/src/msm_vidc_power_iris33.c | 4 ++-- driver/vidc/inc/firmware.h | 2 ++ driver/vidc/inc/fixedpoint.h | 2 +- driver/vidc/inc/hfi_command.h | 2 ++ driver/vidc/inc/hfi_packet.h | 2 ++ driver/vidc/inc/hfi_property.h | 2 +- driver/vidc/inc/msm_media_info.h | 2 ++ driver/vidc/inc/msm_vdec.h | 3 ++- driver/vidc/inc/msm_venc.h | 3 ++- driver/vidc/inc/msm_vidc.h | 2 ++ driver/vidc/inc/msm_vidc_buffer.h | 7 ++++--- driver/vidc/inc/msm_vidc_control.h | 4 ++-- driver/vidc/inc/msm_vidc_control_ext.h | 3 +-- driver/vidc/inc/msm_vidc_core.h | 4 ++-- driver/vidc/inc/msm_vidc_debug.h | 3 ++- driver/vidc/inc/msm_vidc_driver.h | 3 ++- driver/vidc/inc/msm_vidc_events.h | 2 ++ driver/vidc/inc/msm_vidc_fence.h | 3 ++- driver/vidc/inc/msm_vidc_inst.h | 3 ++- driver/vidc/inc/msm_vidc_internal.h | 10 +++++----- driver/vidc/inc/msm_vidc_memory.h | 3 ++- driver/vidc/inc/msm_vidc_memory_ext.h | 3 +-- driver/vidc/inc/msm_vidc_power.h | 2 ++ driver/vidc/inc/msm_vidc_state.h | 5 ++--- driver/vidc/inc/msm_vidc_v4l2.h | 2 ++ driver/vidc/inc/msm_vidc_vb2.h | 2 ++ driver/vidc/inc/resources.h | 5 +++-- driver/vidc/inc/venus_hfi.h | 3 +-- driver/vidc/inc/venus_hfi_queue.h | 15 ++++++++------- driver/vidc/inc/venus_hfi_response.h | 2 ++ driver/vidc/src/firmware.c | 4 ++-- driver/vidc/src/hfi_packet.c | 3 ++- driver/vidc/src/msm_vdec.c | 3 ++- driver/vidc/src/msm_venc.c | 3 ++- driver/vidc/src/msm_vidc.c | 3 ++- driver/vidc/src/msm_vidc_buffer.c | 3 ++- driver/vidc/src/msm_vidc_control.c | 4 ++-- driver/vidc/src/msm_vidc_control_ext.c | 4 ++-- driver/vidc/src/msm_vidc_debug.c | 2 ++ driver/vidc/src/msm_vidc_driver.c | 3 +-- driver/vidc/src/msm_vidc_fence.c | 4 ++-- driver/vidc/src/msm_vidc_memory.c | 3 ++- driver/vidc/src/msm_vidc_memory_ext.c | 4 ++-- driver/vidc/src/msm_vidc_power.c | 4 ++-- driver/vidc/src/msm_vidc_probe.c | 3 ++- driver/vidc/src/msm_vidc_state.c | 4 ++-- driver/vidc/src/msm_vidc_v4l2.c | 3 ++- driver/vidc/src/msm_vidc_vb2.c | 4 ++-- driver/vidc/src/resources.c | 4 ++-- driver/vidc/src/venus_hfi.c | 4 ++-- driver/vidc/src/venus_hfi_queue.c | 4 ++-- driver/vidc/src/venus_hfi_response.c | 3 ++- include/uapi/vidc/media/v4l2_vidc_extensions.h | 2 ++ 92 files changed, 218 insertions(+), 158 deletions(-) diff --git a/config/anorak_video.h b/config/anorak_video.h index 0d621eb4fc..f8d5462491 100644 --- a/config/anorak_video.h +++ b/config/anorak_video.h @@ -1,8 +1,8 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. - * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved. */ -#define CONFIG_MSM_VIDC_ANORAK 1 #define CONFIG_MSM_VIDC_IRIS3 1 +#define CONFIG_MSM_VIDC_ANORAK 1 diff --git a/config/kalama_video.h b/config/kalama_video.h index e61c0b3081..9e06036401 100644 --- a/config/kalama_video.h +++ b/config/kalama_video.h @@ -1,8 +1,8 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. - * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved. */ -#define CONFIG_MSM_VIDC_KALAMA 1 #define CONFIG_MSM_VIDC_IRIS3 1 +#define CONFIG_MSM_VIDC_KALAMA 1 diff --git a/config/pineapple_video.h b/config/pineapple_video.h index 032b4aafa6..ba96436124 100644 --- a/config/pineapple_video.h +++ b/config/pineapple_video.h @@ -1,8 +1,8 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2020-2022, The Linux Foundation. All rights reserved. - * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. */ -#define CONFIG_MSM_VIDC_PINEAPPLE 1 #define CONFIG_MSM_VIDC_IRIS33 1 +#define CONFIG_MSM_VIDC_PINEAPPLE 1 diff --git a/config/waipio_video.h b/config/waipio_video.h index 238fc3268d..90d0f22c07 100644 --- a/config/waipio_video.h +++ b/config/waipio_video.h @@ -1,7 +1,8 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. */ -#define CONFIG_MSM_VIDC_WAIPIO 1 #define CONFIG_MSM_VIDC_IRIS2 1 +#define CONFIG_MSM_VIDC_WAIPIO 1 diff --git a/driver/platform/anorak/inc/msm_vidc_anorak.h b/driver/platform/anorak/inc/msm_vidc_anorak.h index af9ab3bca4..1189292321 100644 --- a/driver/platform/anorak/inc/msm_vidc_anorak.h +++ b/driver/platform/anorak/inc/msm_vidc_anorak.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. - * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved. */ #ifndef _MSM_VIDC_ANORAK_H_ @@ -17,6 +17,7 @@ int msm_vidc_init_platform_anorak(struct msm_vidc_core *core, struct device *dev { return -EINVAL; } + int msm_vidc_deinit_platform_anorak(struct msm_vidc_core *core, struct device *dev) { return -EINVAL; diff --git a/driver/platform/anorak/src/msm_vidc_anorak.c b/driver/platform/anorak/src/msm_vidc_anorak.c index ed82cd2193..0a08c7667a 100644 --- a/driver/platform/anorak/src/msm_vidc_anorak.c +++ b/driver/platform/anorak/src/msm_vidc_anorak.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. - * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved. */ #include @@ -16,8 +16,8 @@ #include "msm_vidc_debug.h" #include "msm_vidc_internal.h" #include "msm_vidc_control_ext.h" -#include "hfi_property.h" #include "msm_vidc_iris3.h" +#include "hfi_property.h" #include "hfi_command.h" #define DEFAULT_VIDEO_CONCEAL_COLOR_BLACK 0x8020010 diff --git a/driver/platform/common/inc/msm_vidc_platform.h b/driver/platform/common/inc/msm_vidc_platform.h index 9bd7c677df..09c43ce226 100644 --- a/driver/platform/common/inc/msm_vidc_platform.h +++ b/driver/platform/common/inc/msm_vidc_platform.h @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. */ #ifndef _MSM_VIDC_PLATFORM_H_ @@ -12,10 +13,10 @@ #include "msm_vidc_internal.h" #include "msm_vidc_core.h" -#define DDR_TYPE_LPDDR4 0x6 -#define DDR_TYPE_LPDDR4X 0x7 -#define DDR_TYPE_LPDDR5 0x8 -#define DDR_TYPE_LPDDR5X 0x9 +#define DDR_TYPE_LPDDR4 0x6 +#define DDR_TYPE_LPDDR4X 0x7 +#define DDR_TYPE_LPDDR5 0x8 +#define DDR_TYPE_LPDDR5X 0x9 #define UBWC_CONFIG(mc, ml, hbb, bs1, bs2, bs3, bsp) \ { \ diff --git a/driver/platform/common/src/msm_vidc_platform.c b/driver/platform/common/src/msm_vidc_platform.c index 7150c46c8a..2e06742dd0 100644 --- a/driver/platform/common/src/msm_vidc_platform.c +++ b/driver/platform/common/src/msm_vidc_platform.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. - * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. */ #include @@ -15,11 +15,11 @@ #include "msm_vidc_debug.h" #include "msm_vidc_internal.h" #include "msm_vidc_memory.h" +#include "msm_vidc_control.h" +#include "msm_vidc_driver.h" #include "hfi_packet.h" #include "hfi_property.h" #include "venus_hfi.h" -#include "msm_vidc_control.h" -#include "msm_vidc_driver.h" #if defined(CONFIG_MSM_VIDC_WAIPIO) #include "msm_vidc_waipio.h" diff --git a/driver/platform/kalama/inc/msm_vidc_kalama.h b/driver/platform/kalama/inc/msm_vidc_kalama.h index 9d004502e1..e9ad036355 100644 --- a/driver/platform/kalama/inc/msm_vidc_kalama.h +++ b/driver/platform/kalama/inc/msm_vidc_kalama.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. - * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved. */ #ifndef _MSM_VIDC_KALAMA_H_ @@ -17,6 +17,7 @@ int msm_vidc_init_platform_kalama(struct msm_vidc_core *core, struct device *dev { return -EINVAL; } + int msm_vidc_deinit_platform_kalama(struct msm_vidc_core *core, struct device *dev) { return -EINVAL; diff --git a/driver/platform/kalama/src/kalama.c b/driver/platform/kalama/src/kalama.c index b51ba1978c..7014075780 100644 --- a/driver/platform/kalama/src/kalama.c +++ b/driver/platform/kalama/src/kalama.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. */ #include "msm_vidc_control.h" diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index 9f699d6ece..0c3ded4253 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. - * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved. */ #include @@ -17,8 +17,8 @@ #include "msm_vidc_internal.h" #include "msm_vidc_control_ext.h" #include "msm_vidc_memory_ext.h" -#include "hfi_property.h" #include "msm_vidc_iris3.h" +#include "hfi_property.h" #include "hfi_command.h" #define DEFAULT_VIDEO_CONCEAL_COLOR_BLACK 0x8020010 diff --git a/driver/platform/pineapple/inc/msm_vidc_pineapple.h b/driver/platform/pineapple/inc/msm_vidc_pineapple.h index a0cb18f80f..fbb0c1ca9b 100644 --- a/driver/platform/pineapple/inc/msm_vidc_pineapple.h +++ b/driver/platform/pineapple/inc/msm_vidc_pineapple.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2020-2022, The Linux Foundation. All rights reserved. - * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. */ #ifndef _MSM_VIDC_PINEAPPLE_H_ @@ -17,6 +17,7 @@ int msm_vidc_init_platform_pineapple(struct msm_vidc_core *core, struct device * { return -EINVAL; } + int msm_vidc_deinit_platform_pineapple(struct msm_vidc_core *core, struct device *dev) { return -EINVAL; diff --git a/driver/platform/pineapple/src/msm_vidc_pineapple.c b/driver/platform/pineapple/src/msm_vidc_pineapple.c index 46c32769ab..aeef3f0c06 100644 --- a/driver/platform/pineapple/src/msm_vidc_pineapple.c +++ b/driver/platform/pineapple/src/msm_vidc_pineapple.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2020-2022, The Linux Foundation. All rights reserved. - * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. */ #include @@ -17,8 +17,8 @@ #include "msm_vidc_internal.h" #include "msm_vidc_control_ext.h" #include "msm_vidc_memory_ext.h" -#include "hfi_property.h" #include "msm_vidc_iris33.h" +#include "hfi_property.h" #include "hfi_command.h" #define DEFAULT_VIDEO_CONCEAL_COLOR_BLACK 0x8020010 diff --git a/driver/platform/pineapple/src/pineapple.c b/driver/platform/pineapple/src/pineapple.c index f83377453e..fcc1ef7c11 100644 --- a/driver/platform/pineapple/src/pineapple.c +++ b/driver/platform/pineapple/src/pineapple.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. */ #include @@ -9,8 +9,8 @@ #include "msm_vidc_pineapple.h" #include "msm_vidc_platform.h" #include "msm_vidc_debug.h" -#include "hfi_property.h" #include "msm_vidc_iris33.h" +#include "hfi_property.h" #include "hfi_command.h" #define DEFAULT_VIDEO_CONCEAL_COLOR_BLACK 0x8020010 diff --git a/driver/platform/waipio/inc/msm_vidc_waipio.h b/driver/platform/waipio/inc/msm_vidc_waipio.h index c40fcde3cb..d230587d93 100644 --- a/driver/platform/waipio/inc/msm_vidc_waipio.h +++ b/driver/platform/waipio/inc/msm_vidc_waipio.h @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. */ #ifndef _MSM_VIDC_WAIPIO_H_ @@ -22,10 +23,12 @@ struct context_bank_info *msm_vidc_context_bank(struct msm_vidc_core *core, { return NULL; } + int msm_vidc_init_platform_waipio(struct msm_vidc_core *core, struct device *dev) { return -EINVAL; } + int msm_vidc_deinit_platform_waipio(struct msm_vidc_core *core, struct device *dev) { return -EINVAL; diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index f2aaa59cd2..1233ba431b 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. - * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. */ #include @@ -14,8 +14,8 @@ #include "msm_vidc_waipio.h" #include "msm_vidc_platform.h" #include "msm_vidc_debug.h" -#include "msm_vidc_internal.h" #include "msm_vidc_control_ext.h" +#include "msm_vidc_internal.h" #include "hfi_property.h" #include "hfi_command.h" diff --git a/driver/platform/waipio/src/waipio.c b/driver/platform/waipio/src/waipio.c index 3173a26242..a4e2007602 100644 --- a/driver/platform/waipio/src/waipio.c +++ b/driver/platform/waipio/src/waipio.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. */ #include @@ -8,8 +8,8 @@ #include #include "msm_vidc_control.h" -#include "msm_vidc_waipio.h" #include "msm_vidc_platform.h" +#include "msm_vidc_waipio.h" #include "msm_vidc_debug.h" #include "hfi_property.h" #include "hfi_command.h" diff --git a/driver/variant/common/inc/msm_vidc_variant.h b/driver/variant/common/inc/msm_vidc_variant.h index 1c09f48e79..dee6df24c5 100644 --- a/driver/variant/common/inc/msm_vidc_variant.h +++ b/driver/variant/common/inc/msm_vidc_variant.h @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2022, The Linux Foundation. All rights reserved. + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. */ #ifndef _MSM_VIDC_VARIANT_H_ @@ -11,12 +12,11 @@ struct msm_vidc_core; int __write_register_masked(struct msm_vidc_core *core, u32 reg, u32 value, - u32 mask); + u32 mask); int __write_register(struct msm_vidc_core *core, u32 reg, u32 value); int __read_register(struct msm_vidc_core *core, u32 reg, u32 *value); int __read_register_with_poll_timeout(struct msm_vidc_core *core, u32 reg, - u32 mask, u32 exp_val, u32 sleep_us, - u32 timeout_us); + u32 mask, u32 exp_val, u32 sleep_us, u32 timeout_us); int __set_registers(struct msm_vidc_core *core); #endif diff --git a/driver/variant/common/src/msm_vidc_variant.c b/driver/variant/common/src/msm_vidc_variant.c index 65841b7fbc..356baea21d 100644 --- a/driver/variant/common/src/msm_vidc_variant.c +++ b/driver/variant/common/src/msm_vidc_variant.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. - * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. */ #include @@ -56,9 +56,7 @@ int __write_register(struct msm_vidc_core *core, u32 reg, u32 value) base_addr += hwiosymaddr; writel_relaxed(value, base_addr); - /* - * Memory barrier to make sure value is written into the register. - */ + /* Memory barrier to make sure value is written into the register */ wmb(); return rc; diff --git a/driver/variant/iris2/inc/hfi_buffer_iris2.h b/driver/variant/iris2/inc/hfi_buffer_iris2.h index 1331c9bb70..f7e6ef379f 100644 --- a/driver/variant/iris2/inc/hfi_buffer_iris2.h +++ b/driver/variant/iris2/inc/hfi_buffer_iris2.h @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. */ #ifndef __HFI_BUFFER_IRIS2__ @@ -9,13 +10,13 @@ #include #include "hfi_property.h" -typedef u8 HFI_U8; -typedef s8 HFI_S8; -typedef u16 HFI_U16; -typedef s16 HFI_S16; -typedef u32 HFI_U32; -typedef s32 HFI_S32; -typedef u64 HFI_U64; +typedef u8 HFI_U8; +typedef s8 HFI_S8; +typedef u16 HFI_U16; +typedef s16 HFI_S16; +typedef u32 HFI_U32; +typedef s32 HFI_S32; +typedef u64 HFI_U64; typedef HFI_U32 HFI_BOOL; #ifndef MIN diff --git a/driver/variant/iris2/inc/msm_vidc_buffer_iris2.h b/driver/variant/iris2/inc/msm_vidc_buffer_iris2.h index 4fec123ee1..4263b0e49e 100644 --- a/driver/variant/iris2/inc/msm_vidc_buffer_iris2.h +++ b/driver/variant/iris2/inc/msm_vidc_buffer_iris2.h @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. */ #ifndef __H_MSM_VIDC_BUFFER_IRIS2_H__ @@ -14,4 +15,5 @@ int msm_buffer_min_count_iris2(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type buffer_type); int msm_buffer_extra_count_iris2(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type buffer_type); + #endif // __H_MSM_VIDC_BUFFER_IRIS2_H__ diff --git a/driver/variant/iris2/inc/msm_vidc_iris2.h b/driver/variant/iris2/inc/msm_vidc_iris2.h index dd6034cba7..bf6c4b4840 100644 --- a/driver/variant/iris2/inc/msm_vidc_iris2.h +++ b/driver/variant/iris2/inc/msm_vidc_iris2.h @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. */ #ifndef _MSM_VIDC_IRIS2_H_ @@ -17,10 +18,12 @@ static inline int msm_vidc_init_iris2(struct msm_vidc_core *core) { return -EINVAL; } + static inline int msm_vidc_deinit_iris2(struct msm_vidc_core *core) { return -EINVAL; } + static inline int msm_vidc_adjust_blur_type_iris2(void *instance, struct v4l2_ctrl *ctrl) { return -EINVAL; diff --git a/driver/variant/iris2/inc/msm_vidc_power_iris2.h b/driver/variant/iris2/inc/msm_vidc_power_iris2.h index 4eab42b234..e55ca5cc33 100644 --- a/driver/variant/iris2/inc/msm_vidc_power_iris2.h +++ b/driver/variant/iris2/inc/msm_vidc_power_iris2.h @@ -1,13 +1,14 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. */ #ifndef __H_MSM_VIDC_POWER_IRIS2_H__ #define __H_MSM_VIDC_POWER_IRIS2_H__ -#include "msm_vidc_power.h" #include "msm_vidc_inst.h" +#include "msm_vidc_power.h" u64 msm_vidc_calc_freq_iris2(struct msm_vidc_inst* inst, u32 data_size); int msm_vidc_calc_bw_iris2(struct msm_vidc_inst* inst, diff --git a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c index c0b3a5d78a..16333e6ecf 100644 --- a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c @@ -1,6 +1,7 @@ // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. */ #include "hfi_property.h" @@ -10,9 +11,9 @@ #include "msm_vidc_inst.h" #include "msm_vidc_core.h" #include "msm_vidc_driver.h" -#include "msm_vidc_debug.h" #include "msm_media_info.h" #include "msm_vidc_platform.h" +#include "msm_vidc_debug.h" static u32 msm_vidc_decoder_bin_size_iris2(struct msm_vidc_inst *inst) { diff --git a/driver/variant/iris2/src/msm_vidc_iris2.c b/driver/variant/iris2/src/msm_vidc_iris2.c index 510dd5aa5e..a61e67dffb 100644 --- a/driver/variant/iris2/src/msm_vidc_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_iris2.c @@ -1,11 +1,11 @@ // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. */ #include "msm_vidc_iris2.h" #include "msm_vidc_buffer_iris2.h" #include "msm_vidc_power_iris2.h" -#include "venus_hfi.h" #include "msm_vidc_inst.h" #include "msm_vidc_core.h" #include "msm_vidc_driver.h" @@ -15,6 +15,7 @@ #include "msm_vidc_state.h" #include "msm_vidc_debug.h" #include "msm_vidc_variant.h" +#include "venus_hfi.h" #define VIDEO_ARCH_LX 1 diff --git a/driver/variant/iris2/src/msm_vidc_power_iris2.c b/driver/variant/iris2/src/msm_vidc_power_iris2.c index badec882bf..4b28fa4495 100644 --- a/driver/variant/iris2/src/msm_vidc_power_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_power_iris2.c @@ -1,12 +1,13 @@ // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. */ #include "msm_vidc_power_iris2.h" #include "msm_vidc_inst.h" -#include "msm_vidc_core.h" #include "msm_vidc_driver.h" +#include "msm_vidc_core.h" #include "msm_vidc_debug.h" u64 msm_vidc_calc_freq_iris2(struct msm_vidc_inst *inst, u32 data_size) diff --git a/driver/variant/iris3/inc/hfi_buffer_iris3.h b/driver/variant/iris3/inc/hfi_buffer_iris3.h index 4043d09a49..a64a694660 100644 --- a/driver/variant/iris3/inc/hfi_buffer_iris3.h +++ b/driver/variant/iris3/inc/hfi_buffer_iris3.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. - * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved. */ #ifndef __HFI_BUFFER_IRIS3__ @@ -10,13 +10,13 @@ #include #include "hfi_property.h" -typedef u8 HFI_U8; -typedef s8 HFI_S8; -typedef u16 HFI_U16; -typedef s16 HFI_S16; -typedef u32 HFI_U32; -typedef s32 HFI_S32; -typedef u64 HFI_U64; +typedef u8 HFI_U8; +typedef s8 HFI_S8; +typedef u16 HFI_U16; +typedef s16 HFI_S16; +typedef u32 HFI_U32; +typedef s32 HFI_S32; +typedef u64 HFI_U64; typedef HFI_U32 HFI_BOOL; #ifndef MIN diff --git a/driver/variant/iris3/inc/msm_vidc_buffer_iris3.h b/driver/variant/iris3/inc/msm_vidc_buffer_iris3.h index a013e0e225..7548a9f25f 100644 --- a/driver/variant/iris3/inc/msm_vidc_buffer_iris3.h +++ b/driver/variant/iris3/inc/msm_vidc_buffer_iris3.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. - * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved. */ #ifndef __H_MSM_VIDC_BUFFER_IRIS3_H__ @@ -15,4 +15,5 @@ int msm_buffer_min_count_iris3(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type buffer_type); int msm_buffer_extra_count_iris3(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type buffer_type); + #endif // __H_MSM_VIDC_BUFFER_IRIS3_H__ diff --git a/driver/variant/iris3/inc/msm_vidc_iris3.h b/driver/variant/iris3/inc/msm_vidc_iris3.h index db74cb7664..60e50ba37c 100644 --- a/driver/variant/iris3/inc/msm_vidc_iris3.h +++ b/driver/variant/iris3/inc/msm_vidc_iris3.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. - * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved. */ #ifndef _MSM_VIDC_IRIS3_H_ @@ -18,10 +18,12 @@ static inline int msm_vidc_init_iris3(struct msm_vidc_core *core) { return -EINVAL; } + static inline int msm_vidc_deinit_iris3(struct msm_vidc_core *core) { return -EINVAL; } + static inline int msm_vidc_adjust_bitrate_boost_iris3(void *instance, struct v4l2_ctrl *ctrl) { return -EINVAL; diff --git a/driver/variant/iris3/inc/msm_vidc_power_iris3.h b/driver/variant/iris3/inc/msm_vidc_power_iris3.h index e4ae63f9e1..f0e4a5e017 100644 --- a/driver/variant/iris3/inc/msm_vidc_power_iris3.h +++ b/driver/variant/iris3/inc/msm_vidc_power_iris3.h @@ -1,14 +1,14 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. - * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved. */ #ifndef __H_MSM_VIDC_POWER_IRIS3_H__ #define __H_MSM_VIDC_POWER_IRIS3_H__ -#include "msm_vidc_power.h" #include "msm_vidc_inst.h" +#include "msm_vidc_power.h" u64 msm_vidc_calc_freq_iris3(struct msm_vidc_inst* inst, u32 data_size); int msm_vidc_calc_bw_iris3(struct msm_vidc_inst* inst, diff --git a/driver/variant/iris3/src/msm_vidc_buffer_iris3.c b/driver/variant/iris3/src/msm_vidc_buffer_iris3.c index 329781217b..99c72ec196 100644 --- a/driver/variant/iris3/src/msm_vidc_buffer_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_buffer_iris3.c @@ -1,11 +1,9 @@ // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. - * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved. */ -#include "hfi_property.h" -#include "hfi_buffer_iris3.h" #include "msm_vidc_buffer_iris3.h" #include "msm_vidc_buffer.h" #include "msm_vidc_inst.h" @@ -14,6 +12,8 @@ #include "msm_vidc_debug.h" #include "msm_media_info.h" #include "msm_vidc_platform.h" +#include "hfi_property.h" +#include "hfi_buffer_iris3.h" static u32 msm_vidc_decoder_bin_size_iris3(struct msm_vidc_inst *inst) { diff --git a/driver/variant/iris3/src/msm_vidc_iris3.c b/driver/variant/iris3/src/msm_vidc_iris3.c index 3ff7f93a38..b37ec64fc2 100644 --- a/driver/variant/iris3/src/msm_vidc_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_iris3.c @@ -1,13 +1,12 @@ // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. - * Copyright (c) 2021-2022, Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2021-2023, Qualcomm Innovation Center, Inc. All rights reserved. */ #include "msm_vidc_iris3.h" #include "msm_vidc_buffer_iris3.h" #include "msm_vidc_power_iris3.h" -#include "venus_hfi.h" #include "msm_vidc_inst.h" #include "msm_vidc_core.h" #include "msm_vidc_driver.h" @@ -17,6 +16,7 @@ #include "msm_vidc_state.h" #include "msm_vidc_debug.h" #include "msm_vidc_variant.h" +#include "venus_hfi.h" #define VIDEO_ARCH_LX 1 diff --git a/driver/variant/iris3/src/msm_vidc_power_iris3.c b/driver/variant/iris3/src/msm_vidc_power_iris3.c index 18a08c65b0..2ecaca5eac 100644 --- a/driver/variant/iris3/src/msm_vidc_power_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_power_iris3.c @@ -1,13 +1,13 @@ // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. - * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved. */ #include "msm_vidc_power_iris3.h" +#include "msm_vidc_driver.h" #include "msm_vidc_inst.h" #include "msm_vidc_core.h" -#include "msm_vidc_driver.h" #include "msm_vidc_debug.h" u64 msm_vidc_calc_freq_iris3(struct msm_vidc_inst *inst, u32 data_size) diff --git a/driver/variant/iris33/inc/hfi_buffer_iris33.h b/driver/variant/iris33/inc/hfi_buffer_iris33.h index 5b835353b6..69a32d68cd 100644 --- a/driver/variant/iris33/inc/hfi_buffer_iris33.h +++ b/driver/variant/iris33/inc/hfi_buffer_iris33.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2020-2022, The Linux Foundation. All rights reserved. - * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. */ #ifndef __HFI_BUFFER_IRIS3_3__ @@ -10,13 +10,13 @@ #include #include "hfi_property.h" -typedef u8 HFI_U8; -typedef s8 HFI_S8; -typedef u16 HFI_U16; -typedef s16 HFI_S16; -typedef u32 HFI_U32; -typedef s32 HFI_S32; -typedef u64 HFI_U64; +typedef u8 HFI_U8; +typedef s8 HFI_S8; +typedef u16 HFI_U16; +typedef s16 HFI_S16; +typedef u32 HFI_U32; +typedef s32 HFI_S32; +typedef u64 HFI_U64; typedef HFI_U32 HFI_BOOL; #ifndef MIN diff --git a/driver/variant/iris33/inc/msm_vidc_buffer_iris33.h b/driver/variant/iris33/inc/msm_vidc_buffer_iris33.h index 3571f7baf2..f5b4806a22 100644 --- a/driver/variant/iris33/inc/msm_vidc_buffer_iris33.h +++ b/driver/variant/iris33/inc/msm_vidc_buffer_iris33.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2020-2022, The Linux Foundation. All rights reserved. - * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. */ #ifndef __H_MSM_VIDC_BUFFER_IRIS3_3_H__ @@ -15,4 +15,5 @@ int msm_buffer_min_count_iris33(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type buffer_type); int msm_buffer_extra_count_iris33(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type buffer_type); + #endif // __H_MSM_VIDC_BUFFER_IRIS3_3_H__ diff --git a/driver/variant/iris33/inc/msm_vidc_iris33.h b/driver/variant/iris33/inc/msm_vidc_iris33.h index bcd59ff05e..ee2aaf03f8 100644 --- a/driver/variant/iris33/inc/msm_vidc_iris33.h +++ b/driver/variant/iris33/inc/msm_vidc_iris33.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2020-2022, The Linux Foundation. All rights reserved. - * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. */ #ifndef _MSM_VIDC_IRIS3_3_H_ @@ -18,10 +18,12 @@ static inline int msm_vidc_init_iris33(struct msm_vidc_core *core) { return -EINVAL; } + static inline int msm_vidc_deinit_iris33(struct msm_vidc_core *core) { return -EINVAL; } + static inline int msm_vidc_adjust_bitrate_boost_iris33(void *instance, struct v4l2_ctrl *ctrl) { return -EINVAL; diff --git a/driver/variant/iris33/inc/msm_vidc_power_iris33.h b/driver/variant/iris33/inc/msm_vidc_power_iris33.h index 1b7f64e826..31bf9e8dab 100644 --- a/driver/variant/iris33/inc/msm_vidc_power_iris33.h +++ b/driver/variant/iris33/inc/msm_vidc_power_iris33.h @@ -1,14 +1,14 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2020-2022, The Linux Foundation. All rights reserved. - * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. */ #ifndef __H_MSM_VIDC_POWER_IRIS3_3_H__ #define __H_MSM_VIDC_POWER_IRIS3_3_H__ -#include "msm_vidc_power.h" #include "msm_vidc_inst.h" +#include "msm_vidc_power.h" u64 msm_vidc_calc_freq_iris33(struct msm_vidc_inst* inst, u32 data_size); int msm_vidc_calc_bw_iris33(struct msm_vidc_inst* inst, diff --git a/driver/variant/iris33/src/msm_vidc_buffer_iris33.c b/driver/variant/iris33/src/msm_vidc_buffer_iris33.c index 9fb9ba882c..e7e80b65be 100644 --- a/driver/variant/iris33/src/msm_vidc_buffer_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_buffer_iris33.c @@ -1,11 +1,9 @@ // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2020-2022, The Linux Foundation. All rights reserved. - * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. */ -#include "hfi_property.h" -#include "hfi_buffer_iris33.h" #include "msm_vidc_buffer_iris33.h" #include "msm_vidc_buffer.h" #include "msm_vidc_inst.h" @@ -14,6 +12,8 @@ #include "msm_vidc_debug.h" #include "msm_media_info.h" #include "msm_vidc_platform.h" +#include "hfi_property.h" +#include "hfi_buffer_iris33.h" static u32 msm_vidc_decoder_bin_size_iris33(struct msm_vidc_inst *inst) { diff --git a/driver/variant/iris33/src/msm_vidc_iris33.c b/driver/variant/iris33/src/msm_vidc_iris33.c index 121753af6f..191cbb7e39 100644 --- a/driver/variant/iris33/src/msm_vidc_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_iris33.c @@ -1,14 +1,13 @@ // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2020-2022, The Linux Foundation. All rights reserved. - * Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2022-2023, Qualcomm Innovation Center, Inc. All rights reserved. */ #include #include "msm_vidc_iris33.h" #include "msm_vidc_buffer_iris33.h" #include "msm_vidc_power_iris33.h" -#include "venus_hfi.h" #include "msm_vidc_inst.h" #include "msm_vidc_core.h" #include "msm_vidc_driver.h" @@ -18,6 +17,7 @@ #include "msm_vidc_state.h" #include "msm_vidc_debug.h" #include "msm_vidc_variant.h" +#include "venus_hfi.h" #define VIDEO_ARCH_LX 1 diff --git a/driver/variant/iris33/src/msm_vidc_power_iris33.c b/driver/variant/iris33/src/msm_vidc_power_iris33.c index f5a775f151..6695bd3c7f 100644 --- a/driver/variant/iris33/src/msm_vidc_power_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_power_iris33.c @@ -1,13 +1,13 @@ // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2020-2022, The Linux Foundation. All rights reserved. - * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. */ #include "msm_vidc_power_iris33.h" +#include "msm_vidc_driver.h" #include "msm_vidc_inst.h" #include "msm_vidc_core.h" -#include "msm_vidc_driver.h" #include "msm_vidc_debug.h" u64 msm_vidc_calc_freq_iris33(struct msm_vidc_inst *inst, u32 data_size) diff --git a/driver/vidc/inc/firmware.h b/driver/vidc/inc/firmware.h index 07427fd516..5c0e76f3d9 100644 --- a/driver/vidc/inc/firmware.h +++ b/driver/vidc/inc/firmware.h @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2022, The Linux Foundation. All rights reserved. + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. */ #ifndef _MSM_VIDC_FIRMWARE_H_ @@ -13,4 +14,5 @@ int fw_unload(struct msm_vidc_core *core); int fw_suspend(struct msm_vidc_core *core); int fw_resume(struct msm_vidc_core *core); + #endif diff --git a/driver/vidc/inc/fixedpoint.h b/driver/vidc/inc/fixedpoint.h index e9861bf056..1929fa6d05 100644 --- a/driver/vidc/inc/fixedpoint.h +++ b/driver/vidc/inc/fixedpoint.h @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. */ #ifdef _FIXP_ARITH_H @@ -59,7 +60,6 @@ static inline fp_t fp_mult(fp_t a, fp_t b) return (a * b) >> FP_FRACTIONAL_BITS; } - static inline fp_t fp_div(fp_t a, fp_t b) { return (a << FP_FRACTIONAL_BITS) / b; diff --git a/driver/vidc/inc/hfi_command.h b/driver/vidc/inc/hfi_command.h index 33f9eb391e..74b87d6af0 100644 --- a/driver/vidc/inc/hfi_command.h +++ b/driver/vidc/inc/hfi_command.h @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. */ #ifndef __H_HFI_COMMAND_H__ @@ -12,6 +13,7 @@ #define HFI_VIDEO_ARCH_LX 0x1 + struct hfi_header { u32 size; u32 session_id; diff --git a/driver/vidc/inc/hfi_packet.h b/driver/vidc/inc/hfi_packet.h index 86871f25f9..cb26b07d17 100644 --- a/driver/vidc/inc/hfi_packet.h +++ b/driver/vidc/inc/hfi_packet.h @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. */ #ifndef _HFI_PACKET_H_ @@ -46,4 +47,5 @@ int hfi_packet_session_command(struct msm_vidc_inst *inst, u32 payload_type, void *payload, u32 payload_size); int hfi_packet_sys_intraframe_powercollapse(struct msm_vidc_core* core, u8* pkt, u32 pkt_size, u32 enable); + #endif // _HFI_PACKET_H_ diff --git a/driver/vidc/inc/hfi_property.h b/driver/vidc/inc/hfi_property.h index b70b95ee6e..084246c4a2 100644 --- a/driver/vidc/inc/hfi_property.h +++ b/driver/vidc/inc/hfi_property.h @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. */ #ifndef __H_HFI_PROPERTY_H__ @@ -357,7 +358,6 @@ enum hfi_syncframe_request_mode { HFI_SYNC_FRAME_REQUEST_WITHOUT_SEQ_HDR = 0x00000001, HFI_SYNC_FRAME_REQUEST_WITH_PREFIX_SEQ_HDR = 0x00000002, }; - #define HFI_PROP_REQUEST_SYNC_FRAME 0x03000145 #define HFI_PROP_MAX_GOP_FRAMES 0x03000146 diff --git a/driver/vidc/inc/msm_media_info.h b/driver/vidc/inc/msm_media_info.h index c0133270c2..31d25c1c9d 100644 --- a/driver/vidc/inc/msm_media_info.h +++ b/driver/vidc/inc/msm_media_info.h @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ /* * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. */ #ifndef __MSM_MEDIA_INFO_H__ @@ -91,6 +92,7 @@ static inline unsigned int video_y_stride_pix(unsigned int colorformat, default: break; } + invalid_input: return stride; } diff --git a/driver/vidc/inc/msm_vdec.h b/driver/vidc/inc/msm_vdec.h index b9f721e567..124fce3f8d 100644 --- a/driver/vidc/inc/msm_vdec.h +++ b/driver/vidc/inc/msm_vdec.h @@ -1,13 +1,14 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. */ #ifndef _MSM_VDEC_H_ #define _MSM_VDEC_H_ -#include "msm_vidc_core.h" #include "msm_vidc_inst.h" +#include "msm_vidc_core.h" int msm_vdec_streamoff_input(struct msm_vidc_inst *inst); int msm_vdec_streamon_input(struct msm_vidc_inst *inst); diff --git a/driver/vidc/inc/msm_venc.h b/driver/vidc/inc/msm_venc.h index b1519f6a82..fced6b5347 100644 --- a/driver/vidc/inc/msm_venc.h +++ b/driver/vidc/inc/msm_venc.h @@ -1,13 +1,14 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. */ #ifndef _MSM_VENC_H_ #define _MSM_VENC_H_ -#include "msm_vidc_core.h" #include "msm_vidc_inst.h" +#include "msm_vidc_core.h" int msm_venc_streamoff_input(struct msm_vidc_inst *inst); int msm_venc_streamon_input(struct msm_vidc_inst *inst); diff --git a/driver/vidc/inc/msm_vidc.h b/driver/vidc/inc/msm_vidc.h index 8ba440ffa3..6fd83f4822 100644 --- a/driver/vidc/inc/msm_vidc.h +++ b/driver/vidc/inc/msm_vidc.h @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. */ #ifndef _MSM_VIDC_H_ @@ -51,4 +52,5 @@ int msm_vidc_dqevent(void *instance, struct v4l2_event *event); int msm_vidc_g_crop(void *instance, struct v4l2_crop *a); int msm_vidc_enum_framesizes(void *instance, struct v4l2_frmsizeenum *fsize); int msm_vidc_enum_frameintervals(void *instance, struct v4l2_frmivalenum *fival); + #endif diff --git a/driver/vidc/inc/msm_vidc_buffer.h b/driver/vidc/inc/msm_vidc_buffer.h index b91fb8e169..1fb460b93d 100644 --- a/driver/vidc/inc/msm_vidc_buffer.h +++ b/driver/vidc/inc/msm_vidc_buffer.h @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. */ #ifndef __H_MSM_VIDC_BUFFER_H__ @@ -8,13 +9,13 @@ #include "msm_vidc_inst.h" -#define MIN_DEC_INPUT_BUFFERS 4 +#define MIN_DEC_INPUT_BUFFERS 4 #define MIN_DEC_OUTPUT_BUFFERS 4 -#define MIN_ENC_INPUT_BUFFERS 4 +#define MIN_ENC_INPUT_BUFFERS 4 #define MIN_ENC_OUTPUT_BUFFERS 4 -#define DCVS_ENC_EXTRA_INPUT_BUFFERS 4 +#define DCVS_ENC_EXTRA_INPUT_BUFFERS 4 #define DCVS_DEC_EXTRA_OUTPUT_BUFFERS 4 u32 msm_vidc_input_min_count(struct msm_vidc_inst *inst); diff --git a/driver/vidc/inc/msm_vidc_control.h b/driver/vidc/inc/msm_vidc_control.h index ac549e05dd..84081ba3b3 100644 --- a/driver/vidc/inc/msm_vidc_control.h +++ b/driver/vidc/inc/msm_vidc_control.h @@ -2,13 +2,13 @@ /* * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. */ -/* Copyright (c) 2022. Qualcomm Innovation Center, Inc. All rights reserved. */ +/* Copyright (c) 2022-2023. Qualcomm Innovation Center, Inc. All rights reserved. */ #ifndef _MSM_VIDC_CONTROL_H_ #define _MSM_VIDC_CONTROL_H_ -#include "msm_vidc_inst.h" #include "msm_vidc_internal.h" +#include "msm_vidc_inst.h" int msm_vidc_ctrl_init(struct msm_vidc_inst *inst); int msm_vidc_ctrl_deinit(struct msm_vidc_inst *inst); diff --git a/driver/vidc/inc/msm_vidc_control_ext.h b/driver/vidc/inc/msm_vidc_control_ext.h index 21eda3d256..bee0400202 100644 --- a/driver/vidc/inc/msm_vidc_control_ext.h +++ b/driver/vidc/inc/msm_vidc_control_ext.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* - * Copyright (c) 2022. Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2022-2023. Qualcomm Innovation Center, Inc. All rights reserved. */ #ifndef _MSM_VIDC_CONTROL_EXT_H_ @@ -12,7 +12,6 @@ int msm_vidc_adjust_ir_period(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_dec_frame_rate(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_dec_operating_rate(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_delivery_mode(void *instance, struct v4l2_ctrl *ctrl); - int msm_vidc_set_ir_period(void *instance, enum msm_vidc_inst_capability_type cap_id); diff --git a/driver/vidc/inc/msm_vidc_core.h b/driver/vidc/inc/msm_vidc_core.h index e2bea3c7a3..ea9bc192f8 100644 --- a/driver/vidc/inc/msm_vidc_core.h +++ b/driver/vidc/inc/msm_vidc_core.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. - * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. */ #ifndef _MSM_VIDC_CORE_H_ @@ -16,7 +16,7 @@ struct msm_vidc_core; -#define MAX_EVENTS 30 +#define MAX_EVENTS 30 #define call_venus_op(d, op, ...) \ (((d) && (d)->venus_ops && (d)->venus_ops->op) ? \ diff --git a/driver/vidc/inc/msm_vidc_debug.h b/driver/vidc/inc/msm_vidc_debug.h index 6a6fa8e6ac..83094620e7 100644 --- a/driver/vidc/inc/msm_vidc_debug.h +++ b/driver/vidc/inc/msm_vidc_debug.h @@ -1,15 +1,16 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. */ #ifndef __MSM_VIDC_DEBUG__ #define __MSM_VIDC_DEBUG__ +#include #include #include #include -#include #include #include diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index ec9785ab66..d069ac4fe9 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. - * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. */ #ifndef _MSM_VIDC_DRIVER_H_ @@ -603,5 +603,6 @@ struct context_bank_info *msm_vidc_get_context_bank_for_region(struct msm_vidc_c enum msm_vidc_buffer_region region); struct context_bank_info *msm_vidc_get_context_bank_for_device( struct msm_vidc_core *core, struct device *dev); + #endif // _MSM_VIDC_DRIVER_H_ diff --git a/driver/vidc/inc/msm_vidc_events.h b/driver/vidc/inc/msm_vidc_events.h index 8ffbc964d6..248dda606d 100644 --- a/driver/vidc/inc/msm_vidc_events.h +++ b/driver/vidc/inc/msm_vidc_events.h @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2012-2021, The Linux Foundation. All rights reserved. + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. */ #if !defined(_TRACE_MSM_VIDC_H) || defined(TRACE_HEADER_MULTI_READ) @@ -14,6 +15,7 @@ #define TRACE_INCLUDE_FILE msm_vidc_events #include + #include "msm_vidc_inst.h" DECLARE_EVENT_CLASS(msm_v4l2_vidc_inst, diff --git a/driver/vidc/inc/msm_vidc_fence.h b/driver/vidc/inc/msm_vidc_fence.h index 21f9cf481d..d94389f4d0 100644 --- a/driver/vidc/inc/msm_vidc_fence.h +++ b/driver/vidc/inc/msm_vidc_fence.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* - * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. */ #ifndef __H_MSM_VIDC_FENCE_H__ @@ -22,4 +22,5 @@ void msm_vidc_fence_destroy(struct msm_vidc_inst *inst, int msm_vidc_fence_init(struct msm_vidc_inst *inst); void msm_vidc_fence_deinit(struct msm_vidc_inst *inst); + #endif // __H_MSM_VIDC_FENCE_H__ diff --git a/driver/vidc/inc/msm_vidc_inst.h b/driver/vidc/inc/msm_vidc_inst.h index a6cfb049fa..0339489ef0 100644 --- a/driver/vidc/inc/msm_vidc_inst.h +++ b/driver/vidc/inc/msm_vidc_inst.h @@ -2,7 +2,7 @@ /* * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. */ -/* Copyright (c) 2022. Qualcomm Innovation Center, Inc. All rights reserved. */ +/* Copyright (c) 2022-2023. Qualcomm Innovation Center, Inc. All rights reserved. */ #ifndef _MSM_VIDC_INST_H_ #define _MSM_VIDC_INST_H_ @@ -173,4 +173,5 @@ struct msm_vidc_inst { u32 adjust_priority; bool iframe; }; + #endif // _MSM_VIDC_INST_H_ diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index abce58913e..95fd5b980d 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. - * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. */ #ifndef _MSM_VIDC_INTERNAL_H_ @@ -46,10 +46,10 @@ enum msm_vidc_metadata_bits { MSM_VIDC_META_MAX = 0x20, }; -#define MSM_VIDC_METADATA_SIZE (4 * 4096) /* 16 KB */ -#define ENCODE_INPUT_METADATA_SIZE (512 * 4096) /* 2 MB */ -#define DECODE_INPUT_METADATA_SIZE MSM_VIDC_METADATA_SIZE -#define MSM_VIDC_METADATA_DOLBY_RPU_SIZE (41 * 1024) /* 41 KB */ +#define MSM_VIDC_METADATA_SIZE (4 * 4096) /* 16 KB */ +#define ENCODE_INPUT_METADATA_SIZE (512 * 4096) /* 2 MB */ +#define DECODE_INPUT_METADATA_SIZE MSM_VIDC_METADATA_SIZE +#define MSM_VIDC_METADATA_DOLBY_RPU_SIZE (41 * 1024) /* 41 KB */ #define MAX_NAME_LENGTH 128 #define VENUS_VERSION_LENGTH 128 diff --git a/driver/vidc/inc/msm_vidc_memory.h b/driver/vidc/inc/msm_vidc_memory.h index 0f908c8361..38e35f67c4 100644 --- a/driver/vidc/inc/msm_vidc_memory.h +++ b/driver/vidc/inc/msm_vidc_memory.h @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. */ #ifndef _MSM_VIDC_MEMORY_H_ @@ -47,7 +48,7 @@ struct msm_memory_pool { int msm_vidc_vmem_alloc(unsigned long size, void **mem, const char *msg); void msm_vidc_vmem_free(void **addr); void *msm_vidc_pool_alloc(struct msm_vidc_inst *inst, - enum msm_memory_pool_type type); + enum msm_memory_pool_type type); void msm_vidc_pool_free(struct msm_vidc_inst *inst, void *vidc_buf); int msm_vidc_pools_init(struct msm_vidc_inst *inst); void msm_vidc_pools_deinit(struct msm_vidc_inst *inst); diff --git a/driver/vidc/inc/msm_vidc_memory_ext.h b/driver/vidc/inc/msm_vidc_memory_ext.h index bf3bfa63ee..af8613ec8e 100644 --- a/driver/vidc/inc/msm_vidc_memory_ext.h +++ b/driver/vidc/inc/msm_vidc_memory_ext.h @@ -1,14 +1,13 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. - * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. */ #ifndef _MSM_VIDC_MEMORY_EXT_H_ #define _MSM_VIDC_MEMORY_EXT_H_ struct msm_vidc_memory_ops; - struct msm_vidc_memory_ops *get_mem_ops_ext(void); #endif // _MSM_VIDC_MEMORY_EXT_H_ \ No newline at end of file diff --git a/driver/vidc/inc/msm_vidc_power.h b/driver/vidc/inc/msm_vidc_power.h index 40836092ab..b0d2d5c66f 100644 --- a/driver/vidc/inc/msm_vidc_power.h +++ b/driver/vidc/inc/msm_vidc_power.h @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. */ #ifndef _MSM_VIDC_POWER_H_ @@ -253,4 +254,5 @@ u64 msm_vidc_max_freq(struct msm_vidc_inst* inst); int msm_vidc_get_inst_load(struct msm_vidc_inst *inst); int msm_vidc_scale_power(struct msm_vidc_inst *inst, bool scale_buses); void msm_vidc_power_data_reset(struct msm_vidc_inst *inst); + #endif diff --git a/driver/vidc/inc/msm_vidc_state.h b/driver/vidc/inc/msm_vidc_state.h index 9d3ca92e56..c5a35089d8 100644 --- a/driver/vidc/inc/msm_vidc_state.h +++ b/driver/vidc/inc/msm_vidc_state.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. - * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. */ #ifndef _MSM_VIDC_STATE_H_ @@ -45,8 +45,7 @@ struct msm_vidc_core_state_handle { }; enum msm_vidc_allow msm_vidc_allow_core_state_change( - struct msm_vidc_core *core, - enum msm_vidc_core_state req_state); + struct msm_vidc_core *core, enum msm_vidc_core_state req_state); int msm_vidc_update_core_state(struct msm_vidc_core *core, enum msm_vidc_core_state request_state, const char *func); bool core_in_valid_state(struct msm_vidc_core *core); diff --git a/driver/vidc/inc/msm_vidc_v4l2.h b/driver/vidc/inc/msm_vidc_v4l2.h index f8748aa71c..4f7cf8d864 100644 --- a/driver/vidc/inc/msm_vidc_v4l2.h +++ b/driver/vidc/inc/msm_vidc_v4l2.h @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. */ #ifndef _MSM_VIDC_V4L2_H_ @@ -74,4 +75,5 @@ int msm_v4l2_request_validate(struct media_request *req); void msm_v4l2_request_queue(struct media_request *req); void msm_v4l2_m2m_device_run(void *priv); void msm_v4l2_m2m_job_abort(void *priv); + #endif // _MSM_VIDC_V4L2_H_ diff --git a/driver/vidc/inc/msm_vidc_vb2.h b/driver/vidc/inc/msm_vidc_vb2.h index b25bd6bcd7..50492af4f6 100644 --- a/driver/vidc/inc/msm_vidc_vb2.h +++ b/driver/vidc/inc/msm_vidc_vb2.h @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. */ #ifndef _MSM_VIDC_VB2_H_ @@ -43,4 +44,5 @@ void msm_vidc_buf_queue(struct vb2_buffer *vb2); void msm_vidc_buf_cleanup(struct vb2_buffer *vb); int msm_vidc_buf_out_validate(struct vb2_buffer *vb); void msm_vidc_buf_request_complete(struct vb2_buffer *vb); + #endif // _MSM_VIDC_VB2_H_ diff --git a/driver/vidc/inc/resources.h b/driver/vidc/inc/resources.h index cc00cc6120..a48348753f 100644 --- a/driver/vidc/inc/resources.h +++ b/driver/vidc/inc/resources.h @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2020-2022, The Linux Foundation. All rights reserved. + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. */ #ifndef _MSM_VIDC_RESOURCES_H_ @@ -19,8 +20,8 @@ struct msm_vidc_core; /* * These are helper macros to iterate over various lists within - * msm_vidc_core->resource. The intention is to cut down on a lot of boiler-plate - * code + * msm_vidc_core->resource. The intention is to cut down on a lot + * of boiler-plate code */ /* Read as "for each 'thing' in a set of 'thingies'" */ diff --git a/driver/vidc/inc/venus_hfi.h b/driver/vidc/inc/venus_hfi.h index 48f759dabc..2ca009e992 100644 --- a/driver/vidc/inc/venus_hfi.h +++ b/driver/vidc/inc/venus_hfi.h @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. */ #ifndef _VENUS_HFI_H_ @@ -67,11 +68,9 @@ int venus_hfi_scale_clocks(struct msm_vidc_inst* inst, u64 freq); int venus_hfi_scale_buses(struct msm_vidc_inst* inst, u64 bw_ddr, u64 bw_llcc); int venus_hfi_set_ir_period(struct msm_vidc_inst *inst, u32 ir_type, enum msm_vidc_inst_capability_type cap_id); - void venus_hfi_pm_work_handler(struct work_struct *work); irqreturn_t venus_hfi_isr(int irq, void *data); irqreturn_t venus_hfi_isr_handler(int irq, void *data); - int __prepare_pc(struct msm_vidc_core *core); #endif // _VENUS_HFI_H_ diff --git a/driver/vidc/inc/venus_hfi_queue.h b/driver/vidc/inc/venus_hfi_queue.h index 69f23cd584..7a4e97a589 100644 --- a/driver/vidc/inc/venus_hfi_queue.h +++ b/driver/vidc/inc/venus_hfi_queue.h @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2020-2022, The Linux Foundation. All rights reserved. + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. */ #ifndef _VENUS_HFI_QUEUE_H_ @@ -19,13 +20,13 @@ #define HFI_Q_ID_CTRL_TO_HOST_DEBUG_Q 2 #define HFI_MASK_QHDR_STATUS 0x000000ff -#define VIDC_IFACEQ_NUMQ 3 -#define VIDC_IFACEQ_CMDQ_IDX 0 -#define VIDC_IFACEQ_MSGQ_IDX 1 -#define VIDC_IFACEQ_DBGQ_IDX 2 -#define VIDC_IFACEQ_MAX_BUF_COUNT 50 -#define VIDC_IFACE_MAX_PARALLEL_CLNTS 16 -#define VIDC_IFACEQ_DFLT_QHDR 0x01010000 +#define VIDC_IFACEQ_NUMQ 3 +#define VIDC_IFACEQ_CMDQ_IDX 0 +#define VIDC_IFACEQ_MSGQ_IDX 1 +#define VIDC_IFACEQ_DBGQ_IDX 2 +#define VIDC_IFACEQ_MAX_BUF_COUNT 50 +#define VIDC_IFACE_MAX_PARALLEL_CLNTS 16 +#define VIDC_IFACEQ_DFLT_QHDR 0x01010000 struct hfi_queue_table_header { u32 qtbl_version; diff --git a/driver/vidc/inc/venus_hfi_response.h b/driver/vidc/inc/venus_hfi_response.h index 776164a8e8..1d76830a93 100644 --- a/driver/vidc/inc/venus_hfi_response.h +++ b/driver/vidc/inc/venus_hfi_response.h @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. */ #ifndef __VENUS_HFI_RESPONSE_H__ @@ -22,4 +23,5 @@ void fw_coredump(struct msm_vidc_core *core); int handle_release_output_buffer(struct msm_vidc_inst *inst, struct hfi_buffer *buffer); + #endif // __VENUS_HFI_RESPONSE_H__ diff --git a/driver/vidc/src/firmware.c b/driver/vidc/src/firmware.c index 039deb57d7..d18bb511ca 100644 --- a/driver/vidc/src/firmware.c +++ b/driver/vidc/src/firmware.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * Copyright (c) 2022. Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2022-2023. Qualcomm Innovation Center, Inc. All rights reserved. */ #include #include @@ -13,8 +13,8 @@ #include "msm_vidc_core.h" #include "msm_vidc_debug.h" #include "msm_vidc_events.h" -#include "firmware.h" #include "msm_vidc_platform.h" +#include "firmware.h" #define MAX_FIRMWARE_NAME_SIZE 128 diff --git a/driver/vidc/src/hfi_packet.c b/driver/vidc/src/hfi_packet.c index ed97776f85..f1ea0a4a46 100644 --- a/driver/vidc/src/hfi_packet.c +++ b/driver/vidc/src/hfi_packet.c @@ -1,14 +1,15 @@ // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. */ #include "hfi_packet.h" #include "msm_vidc_core.h" #include "msm_vidc_inst.h" #include "msm_vidc_driver.h" -#include "msm_vidc_debug.h" #include "msm_vidc_platform.h" +#include "msm_vidc_debug.h" u32 get_hfi_port(struct msm_vidc_inst *inst, enum msm_vidc_port_type port) diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index c20d6e04b1..5b2516d38c 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -2,7 +2,7 @@ /* * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. */ -/* Copyright (c) 2022. Qualcomm Innovation Center, Inc. All rights reserved. */ +/* Copyright (c) 2022-2023. Qualcomm Innovation Center, Inc. All rights reserved. */ #include "msm_media_info.h" #include @@ -19,6 +19,7 @@ #include "msm_vidc_memory.h" #include "venus_hfi.h" #include "hfi_packet.h" + /* TODO: update based on clips */ #define MAX_DEC_BATCH_SIZE 6 #define SKIP_BATCH_WINDOW 100 diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index 0f4d6303ab..690d9bb109 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -1,6 +1,7 @@ // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. */ #include "msm_media_info.h" @@ -11,8 +12,8 @@ #include "msm_vidc_driver.h" #include "msm_vidc_internal.h" #include "msm_vidc_control.h" -#include "msm_vidc_debug.h" #include "msm_vidc_power.h" +#include "msm_vidc_debug.h" #include "venus_hfi.h" #include "hfi_packet.h" #include "msm_vidc_platform.h" diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index dbf212dfc5..f81b1e54b7 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -2,10 +2,11 @@ /* * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. */ -/* Copyright (c) 2022. Qualcomm Innovation Center, Inc. All rights reserved. */ +/* Copyright (c) 2022-2023. Qualcomm Innovation Center, Inc. All rights reserved. */ #include #include + #include "msm_vidc_core.h" #include "msm_vidc_inst.h" #include "msm_vdec.h" diff --git a/driver/vidc/src/msm_vidc_buffer.c b/driver/vidc/src/msm_vidc_buffer.c index 78f90eb5c7..6828ce616e 100644 --- a/driver/vidc/src/msm_vidc_buffer.c +++ b/driver/vidc/src/msm_vidc_buffer.c @@ -1,6 +1,7 @@ // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. */ #include "msm_media_info.h" @@ -8,8 +9,8 @@ #include "msm_vidc_inst.h" #include "msm_vidc_core.h" #include "msm_vidc_driver.h" -#include "msm_vidc_debug.h" #include "msm_vidc_internal.h" +#include "msm_vidc_debug.h" /* Generic function for all targets. Not being used for iris2 */ u32 msm_vidc_input_min_count(struct msm_vidc_inst* inst) diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 26a5b9d954..1c7f7f8a41 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -2,13 +2,13 @@ /* * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. */ -/* Copyright (c) 2022. Qualcomm Innovation Center, Inc. All rights reserved. */ +/* Copyright (c) 2022-2023. Qualcomm Innovation Center, Inc. All rights reserved. */ -#include "msm_vidc_debug.h" #include "msm_vidc_internal.h" #include "msm_vidc_driver.h" #include "msm_venc.h" #include "msm_vidc_platform.h" +#include "msm_vidc_debug.h" extern struct msm_vidc_core *g_core; diff --git a/driver/vidc/src/msm_vidc_control_ext.c b/driver/vidc/src/msm_vidc_control_ext.c index b526f2df19..367dba0963 100644 --- a/driver/vidc/src/msm_vidc_control_ext.c +++ b/driver/vidc/src/msm_vidc_control_ext.c @@ -1,11 +1,10 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * Copyright (c) 2022. Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2022-2023. Qualcomm Innovation Center, Inc. All rights reserved. */ #include #include "msm_vidc_control_ext.h" -#include "msm_vidc_debug.h" #include "hfi_packet.h" #include "hfi_property.h" #include "venus_hfi.h" @@ -13,6 +12,7 @@ #include "msm_vidc_driver.h" #include "msm_venc.h" #include "msm_vidc_platform.h" +#include "msm_vidc_debug.h" int msm_vidc_adjust_ir_period(void *instance, struct v4l2_ctrl *ctrl) { diff --git a/driver/vidc/src/msm_vidc_debug.c b/driver/vidc/src/msm_vidc_debug.c index 133acf28e7..5fb35624b5 100644 --- a/driver/vidc/src/msm_vidc_debug.c +++ b/driver/vidc/src/msm_vidc_debug.c @@ -1,7 +1,9 @@ // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. */ + #define CREATE_TRACE_POINTS #include "msm_vidc_debug.h" #include "msm_vidc_driver.h" diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 510f857cf9..6724546f2b 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2020-2022, The Linux Foundation. All rights reserved. - * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. */ #include @@ -16,7 +16,6 @@ #include "msm_vidc_state.h" #include "msm_vidc_power.h" #include "msm_vidc_debug.h" -#include "msm_vidc_power.h" #include "msm_vidc.h" #include "msm_vdec.h" #include "msm_venc.h" diff --git a/driver/vidc/src/msm_vidc_fence.c b/driver/vidc/src/msm_vidc_fence.c index fcb8b639fd..8c941a5509 100644 --- a/driver/vidc/src/msm_vidc_fence.c +++ b/driver/vidc/src/msm_vidc_fence.c @@ -1,11 +1,11 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. */ #include "msm_vidc_fence.h" -#include "msm_vidc_debug.h" #include "msm_vidc_driver.h" +#include "msm_vidc_debug.h" extern struct msm_vidc_core *g_core; diff --git a/driver/vidc/src/msm_vidc_memory.c b/driver/vidc/src/msm_vidc_memory.c index 80a7bf7aba..e7dff4681e 100644 --- a/driver/vidc/src/msm_vidc_memory.c +++ b/driver/vidc/src/msm_vidc_memory.c @@ -1,6 +1,7 @@ // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. */ #include @@ -8,8 +9,8 @@ #include #include "msm_vidc_memory.h" -#include "msm_vidc_debug.h" #include "msm_vidc_internal.h" +#include "msm_vidc_debug.h" #include "msm_vidc_driver.h" #include "msm_vidc_core.h" #include "msm_vidc_events.h" diff --git a/driver/vidc/src/msm_vidc_memory_ext.c b/driver/vidc/src/msm_vidc_memory_ext.c index 50712b45ce..8ea094712b 100644 --- a/driver/vidc/src/msm_vidc_memory_ext.c +++ b/driver/vidc/src/msm_vidc_memory_ext.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. - * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. */ #include @@ -11,8 +11,8 @@ #include #include "msm_vidc_core.h" -#include "msm_vidc_debug.h" #include "msm_vidc_driver.h" +#include "msm_vidc_debug.h" #include "msm_vidc_events.h" #include "msm_vidc_platform.h" #include "msm_vidc_memory.h" diff --git a/driver/vidc/src/msm_vidc_power.c b/driver/vidc/src/msm_vidc_power.c index b7a91a3f3f..824f13484c 100644 --- a/driver/vidc/src/msm_vidc_power.c +++ b/driver/vidc/src/msm_vidc_power.c @@ -1,12 +1,12 @@ // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. - * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. */ #include "msm_vidc_power.h" -#include "msm_vidc_debug.h" #include "msm_vidc_internal.h" +#include "msm_vidc_debug.h" #include "msm_vidc_inst.h" #include "msm_vidc_core.h" #include "msm_vidc_driver.h" diff --git a/driver/vidc/src/msm_vidc_probe.c b/driver/vidc/src/msm_vidc_probe.c index 561ac1f2e6..f4522fcfcd 100644 --- a/driver/vidc/src/msm_vidc_probe.c +++ b/driver/vidc/src/msm_vidc_probe.c @@ -1,6 +1,7 @@ // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2020-2022, The Linux Foundation. All rights reserved. + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. */ #include @@ -20,8 +21,8 @@ #endif #include "msm_vidc_internal.h" -#include "msm_vidc_debug.h" #include "msm_vidc_driver.h" +#include "msm_vidc_debug.h" #include "msm_vidc_state.h" #include "msm_vidc_platform.h" #include "msm_vidc_core.h" diff --git a/driver/vidc/src/msm_vidc_state.c b/driver/vidc/src/msm_vidc_state.c index 5fe4522d2b..6f521deade 100644 --- a/driver/vidc/src/msm_vidc_state.c +++ b/driver/vidc/src/msm_vidc_state.c @@ -1,13 +1,13 @@ // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. - * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. */ #include "msm_vidc_driver.h" #include "msm_vidc_state.h" -#include "msm_vidc_debug.h" #include "msm_vidc_core.h" +#include "msm_vidc_debug.h" bool core_in_valid_state(struct msm_vidc_core *core) { diff --git a/driver/vidc/src/msm_vidc_v4l2.c b/driver/vidc/src/msm_vidc_v4l2.c index 9dcadd7085..f7b37ef78d 100644 --- a/driver/vidc/src/msm_vidc_v4l2.c +++ b/driver/vidc/src/msm_vidc_v4l2.c @@ -1,14 +1,15 @@ // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. */ #include "msm_vidc_v4l2.h" #include "msm_vidc_internal.h" #include "msm_vidc_core.h" #include "msm_vidc_inst.h" -#include "msm_vidc_debug.h" #include "msm_vidc_driver.h" +#include "msm_vidc_debug.h" #include "msm_vidc.h" #include "msm_vidc_events.h" diff --git a/driver/vidc/src/msm_vidc_vb2.c b/driver/vidc/src/msm_vidc_vb2.c index b92d394617..ec9c37da68 100644 --- a/driver/vidc/src/msm_vidc_vb2.c +++ b/driver/vidc/src/msm_vidc_vb2.c @@ -2,7 +2,7 @@ /* * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. */ -/* Copyright (c) 2022. Qualcomm Innovation Center, Inc. All rights reserved. */ +/* Copyright (c) 2022-2023. Qualcomm Innovation Center, Inc. All rights reserved. */ #include "msm_vidc_vb2.h" #include "msm_vidc_core.h" @@ -10,9 +10,9 @@ #include "msm_vidc_internal.h" #include "msm_vidc_driver.h" #include "msm_vidc_power.h" +#include "msm_vidc_debug.h" #include "msm_vdec.h" #include "msm_venc.h" -#include "msm_vidc_debug.h" #include "msm_vidc_control.h" #include "msm_vidc_platform.h" diff --git a/driver/vidc/src/resources.c b/driver/vidc/src/resources.c index 40c4a44238..559f2d7445 100644 --- a/driver/vidc/src/resources.c +++ b/driver/vidc/src/resources.c @@ -2,7 +2,7 @@ /* * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. */ -/* Copyright (c) 2022. Qualcomm Innovation Center, Inc. All rights reserved. */ +/* Copyright (c) 2022-2023. Qualcomm Innovation Center, Inc. All rights reserved. */ #include #include @@ -14,8 +14,8 @@ #endif #include "msm_vidc_core.h" -#include "msm_vidc_debug.h" #include "msm_vidc_power.h" +#include "msm_vidc_debug.h" #include "msm_vidc_driver.h" #include "msm_vidc_platform.h" #include "venus_hfi.h" diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index 4ed7278503..bce2ef3950 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -2,7 +2,7 @@ /* * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. */ -/* Copyright (c) 2022. Qualcomm Innovation Center, Inc. All rights reserved. */ +/* Copyright (c) 2022-2023. Qualcomm Innovation Center, Inc. All rights reserved. */ #include #include @@ -21,8 +21,8 @@ #include "msm_vidc_power.h" #include "msm_vidc_platform.h" #include "msm_vidc_memory.h" -#include "msm_vidc_driver.h" #include "msm_vidc_debug.h" +#include "msm_vidc_driver.h" #include "hfi_packet.h" #include "venus_hfi_response.h" #include "venus_hfi_queue.h" diff --git a/driver/vidc/src/venus_hfi_queue.c b/driver/vidc/src/venus_hfi_queue.c index f4e2a07a71..dcad7e3fe7 100644 --- a/driver/vidc/src/venus_hfi_queue.c +++ b/driver/vidc/src/venus_hfi_queue.c @@ -2,11 +2,11 @@ /* * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. */ - /* Copyright (c) 2022. Qualcomm Innovation Center, Inc. All rights reserved. */ + /* Copyright (c) 2022-2023. Qualcomm Innovation Center, Inc. All rights reserved. */ #include "venus_hfi_queue.h" -#include "msm_vidc_debug.h" #include "msm_vidc_core.h" +#include "msm_vidc_debug.h" #include "msm_vidc_memory.h" #include "msm_vidc_platform.h" diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index 5cefd244c3..0be8d85408 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -1,11 +1,12 @@ // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. - * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. */ #include #include + #include "hfi_packet.h" #include "venus_hfi.h" #include "venus_hfi_response.h" diff --git a/include/uapi/vidc/media/v4l2_vidc_extensions.h b/include/uapi/vidc/media/v4l2_vidc_extensions.h index 8215ee4d98..51d8a51b46 100644 --- a/include/uapi/vidc/media/v4l2_vidc_extensions.h +++ b/include/uapi/vidc/media/v4l2_vidc_extensions.h @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ /* * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. */ #ifndef __V4l2_VIDC_EXTENSIONS_H__ @@ -78,6 +79,7 @@ enum v4l2_mpeg_vidc_ir_type { V4L2_MPEG_VIDEO_VIDC_INTRA_REFRESH_RANDOM = 0x0, V4L2_MPEG_VIDEO_VIDC_INTRA_REFRESH_CYCLIC = 0x1, }; + #define V4L2_CID_MPEG_VIDC_TIME_DELTA_BASED_RC (V4L2_CID_MPEG_VIDC_BASE + 0xD) /* Encoder quality controls */ #define V4L2_CID_MPEG_VIDC_CONTENT_ADAPTIVE_CODING \ From 7ea481092e35a38e74336b726dff3ea497eee58f Mon Sep 17 00:00:00 2001 From: Chinmay Sawarkar Date: Fri, 13 Jan 2023 16:25:44 -0800 Subject: [PATCH 0794/1061] video: driver: Update non_comv_h265e buffer size HFI_BUFFER_NON_COMV_H265E updated to incorporate multi-tile single slice change. Change-Id: Ia1f48cc1680a411b107c1ee95377d493cb682739 Signed-off-by: Chinmay Sawarkar --- driver/variant/iris33/inc/hfi_buffer_iris33.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/driver/variant/iris33/inc/hfi_buffer_iris33.h b/driver/variant/iris33/inc/hfi_buffer_iris33.h index 5b835353b6..fe8784b2d7 100644 --- a/driver/variant/iris33/inc/hfi_buffer_iris33.h +++ b/driver/variant/iris33/inc/hfi_buffer_iris33.h @@ -1772,12 +1772,14 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ num_vpp_pipes_enc, 16, HFI_CODEC_ENCODE_AVC); \ } while (0) +#define SIZE_ONE_SLICE_BUF 256 #define HFI_BUFFER_NON_COMV_H265E(_size, frame_width, frame_height, \ num_vpp_pipes_enc) \ do \ { \ HFI_BUFFER_NON_COMV_ENC(_size, frame_width, frame_height, \ num_vpp_pipes_enc, 32, HFI_CODEC_ENCODE_HEVC); \ + _size += SIZE_ONE_SLICE_BUF; \ } while (0) #define SIZE_ENC_REF_BUFFER(size, frame_width, frame_height) \ From d8f253e2c0f9baef67f5e275d1e34c40add9907a Mon Sep 17 00:00:00 2001 From: Deepa Guthyappa Madivalara Date: Wed, 11 Jan 2023 06:34:12 -0800 Subject: [PATCH 0795/1061] video: driver: add support for pineapple V2 devices Adding support for pineapple V2 devices Change-Id: I9088895ff92ca34ee3b46bd99e0d068b478e083d Signed-off-by: Deepa Guthyappa Madivalara --- driver/platform/common/src/msm_vidc_platform.c | 12 ++++++++---- .../platform/pineapple/src/msm_vidc_pineapple.c | 16 +++++++++++++--- driver/vidc/src/msm_vidc_probe.c | 4 +++- 3 files changed, 24 insertions(+), 8 deletions(-) diff --git a/driver/platform/common/src/msm_vidc_platform.c b/driver/platform/common/src/msm_vidc_platform.c index 7150c46c8a..fcf655c96e 100644 --- a/driver/platform/common/src/msm_vidc_platform.c +++ b/driver/platform/common/src/msm_vidc_platform.c @@ -247,7 +247,8 @@ static int msm_vidc_deinit_platform_variant(struct msm_vidc_core *core, struct d } #endif #if defined(CONFIG_MSM_VIDC_PINEAPPLE) - if (of_device_is_compatible(dev->of_node, "qcom,sm8650-vidc")) { + if (of_device_is_compatible(dev->of_node, "qcom,sm8650-vidc") || + of_device_is_compatible(dev->of_node, "qcom,sm8650-vidc-v2")) { rc = msm_vidc_deinit_platform_pineapple(core, dev); if (rc) d_vpr_e("%s: failed with %d\n", __func__, rc); @@ -295,7 +296,8 @@ static int msm_vidc_init_platform_variant(struct msm_vidc_core *core, struct dev } #endif #if defined(CONFIG_MSM_VIDC_PINEAPPLE) - if (of_device_is_compatible(dev->of_node, "qcom,sm8650-vidc")) { + if (of_device_is_compatible(dev->of_node, "qcom,sm8650-vidc") || + of_device_is_compatible(dev->of_node, "qcom,sm8650-vidc-v2")) { rc = msm_vidc_init_platform_pineapple(core, dev); if (rc) d_vpr_e("%s: failed with %d\n", __func__, rc); @@ -343,7 +345,8 @@ static int msm_vidc_deinit_vpu(struct msm_vidc_core *core, struct device *dev) } #endif #if defined(CONFIG_MSM_VIDC_IRIS33) - if (of_device_is_compatible(dev->of_node, "qcom,sm8650-vidc")) { + if (of_device_is_compatible(dev->of_node, "qcom,sm8650-vidc") || + of_device_is_compatible(dev->of_node, "qcom,sm8650-vidc-v2")) { rc = msm_vidc_deinit_iris33(core); if (rc) d_vpr_e("%s: failed with %d\n", __func__, rc); @@ -380,7 +383,8 @@ static int msm_vidc_init_vpu(struct msm_vidc_core *core, struct device *dev) } #endif #if defined(CONFIG_MSM_VIDC_IRIS33) - if (of_device_is_compatible(dev->of_node, "qcom,sm8650-vidc")) { + if (of_device_is_compatible(dev->of_node, "qcom,sm8650-vidc") || + of_device_is_compatible(dev->of_node, "qcom,sm8650-vidc-v2")) { rc = msm_vidc_init_iris33(core); if (rc) d_vpr_e("%s: failed with %d\n", __func__, rc); diff --git a/driver/platform/pineapple/src/msm_vidc_pineapple.c b/driver/platform/pineapple/src/msm_vidc_pineapple.c index 2a62101100..4ee4ca3326 100644 --- a/driver/platform/pineapple/src/msm_vidc_pineapple.c +++ b/driver/platform/pineapple/src/msm_vidc_pineapple.c @@ -2574,6 +2574,10 @@ static struct freq_table pineapple_freq_table[] = { {533333333}, {480000000}, {435000000}, {380000000}, {280000000}, {196000000} }; +static struct freq_table pineapple_freq_table_v2[] = { + {533333333}, {480000000}, {435000000}, {380000000}, {300000000}, {196000000} +}; + /* register, value, mask */ static const struct reg_preset_table pineapple_reg_preset_table[] = { { 0xB0088, 0x0, 0x11 }, @@ -2634,17 +2638,23 @@ int msm_vidc_pineapple_check_ddr_type(void) return 0; } -static int msm_vidc_init_data(struct msm_vidc_core *core) +static int msm_vidc_init_data(struct msm_vidc_core *core, struct device *dev) { int rc = 0; - if (!core || !core->platform) { + if (!core || !core->platform || !dev) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } d_vpr_h("%s: initialize pineapple data\n", __func__); core->platform->data = pineapple_data; + if (of_device_is_compatible(dev->of_node, "qcom,sm8650-vidc-v2")) { + d_vpr_h("%s: update frequency table for pineapple v2\n", __func__); + core->platform->data.freq_tbl = pineapple_freq_table_v2; + core->platform->data.freq_tbl_size = ARRAY_SIZE(pineapple_freq_table_v2); + } + core->mem_ops = get_mem_ops_ext(); rc = msm_vidc_pineapple_check_ddr_type(); if (rc) @@ -2657,7 +2667,7 @@ int msm_vidc_init_platform_pineapple(struct msm_vidc_core *core, struct device * { int rc = 0; - rc = msm_vidc_init_data(core); + rc = msm_vidc_init_data(core, dev); if (rc) return rc; diff --git a/driver/vidc/src/msm_vidc_probe.c b/driver/vidc/src/msm_vidc_probe.c index 561ac1f2e6..d5d9f551bd 100644 --- a/driver/vidc/src/msm_vidc_probe.c +++ b/driver/vidc/src/msm_vidc_probe.c @@ -41,7 +41,8 @@ static inline bool is_video_device(struct device *dev) return !!(of_device_is_compatible(dev->of_node, "qcom,sm8450-vidc") || of_device_is_compatible(dev->of_node, "qcom,sm8550-vidc") || of_device_is_compatible(dev->of_node, "qcom,sm8550-vidc-v2") || - of_device_is_compatible(dev->of_node, "qcom,sm8650-vidc")); + of_device_is_compatible(dev->of_node, "qcom,sm8650-vidc")) || + of_device_is_compatible(dev->of_node, "qcom,sm8650-vidc-v2"); } static inline bool is_video_context_bank_device(struct device *dev) @@ -118,6 +119,7 @@ static const struct of_device_id msm_vidc_dt_match[] = { {.compatible = "qcom,sm8550-vidc"}, {.compatible = "qcom,sm8550-vidc-v2"}, {.compatible = "qcom,sm8650-vidc"}, + {.compatible = "qcom,sm8650-vidc-v2"}, {.compatible = "qcom,vidc,cb-ns-pxl"}, {.compatible = "qcom,vidc,cb-ns"}, {.compatible = "qcom,vidc,cb-sec-non-pxl"}, From f150010edb055b3ae16a9d9d6558b7903e5e08be Mon Sep 17 00:00:00 2001 From: Maheshwar Ajja Date: Tue, 17 Jan 2023 11:47:50 -0800 Subject: [PATCH 0796/1061] video: driver: use reset control api with kernel version 6 Use reset control acquire/release api's with kernel version >= 6 as they were not exposed in previous kernels. Change-Id: I2968fc50d77948c7f1a6f55be31360ad03971415 Signed-off-by: Maheshwar Ajja --- driver/vidc/src/resources.c | 17 ++++++++++++++++- 1 file changed, 16 insertions(+), 1 deletion(-) diff --git a/driver/vidc/src/resources.c b/driver/vidc/src/resources.c index 559f2d7445..b872b7520a 100644 --- a/driver/vidc/src/resources.c +++ b/driver/vidc/src/resources.c @@ -1527,7 +1527,12 @@ static int __reset_control_acquire_name(struct msm_vidc_core *core, } found = true; + /* reset_control_acquire is exposed in kernel version 6 */ +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(6, 0, 0)) rc = reset_control_acquire(rcinfo->rst); +#else + rc = -EINVAL; +#endif if (rc) d_vpr_e("%s: failed to acquire reset control (%s), rc = %d\n", __func__, rcinfo->name, rc); @@ -1563,8 +1568,18 @@ static int __reset_control_release_name(struct msm_vidc_core *core, } found = true; + /* reset_control_release exposed in kernel version 6 */ +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(6, 0, 0)) reset_control_release(rcinfo->rst); - d_vpr_h("%s: release reset control (%s)\n", __func__, rcinfo->name); +#else + rc = -EINVAL; +#endif + if (rc) + d_vpr_e("%s: release reset control (%s) failed\n", + __func__, rcinfo->name); + else + d_vpr_h("%s: release reset control (%s) done\n", + __func__, rcinfo->name); break; } if (!found) { From ab9b1a112b29cc522da8529e73496eabad55a026 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Fri, 6 Jan 2023 11:03:55 +0530 Subject: [PATCH 0797/1061] video: driver: add power domain and opp table support for video Added changes to support generic power domain and opp table. This is an alternative for downstream regulator framework. power domain can be enabled using below dtsi entries. power-domains = <&videocc MVS0C_GDSC>, <&videocc MVS0_GDSC>, <&rpmhpd SM8450_MXC>, <&rpmhpd SM8450_MMCX> power-domain-names = "iris-ctl", "vcodec", "mx", "mmcx"; Power domain handles willbe parsed at driver side using below api's. - dev_pm_domain_attach_by_name() - devm_pm_opp_attach_genpd() devm_pm_opp_attach_genpd() provides consumer virtual device handles and i.e linked to core->dev using device_link_add(). MXC, MMCX rails wilbe powered up by scaling desired rate using dev_pm_opp_set_rate(). Change-Id: I3d73434cb772078f031aec7cadc2d42ab930edd0 Signed-off-by: Govindaraj Rajagopal --- .../platform/common/inc/msm_vidc_platform.h | 13 +- .../platform/common/src/msm_vidc_platform.c | 9 + driver/platform/kalama/src/msm_vidc_kalama.c | 10 + .../pineapple/src/msm_vidc_pineapple.c | 10 + driver/platform/pineapple/src/pineapple.c | 1 + driver/platform/waipio/src/msm_vidc_waipio.c | 10 + driver/platform/waipio/src/waipio.c | 17 +- driver/variant/iris2/src/msm_vidc_iris2.c | 1 - driver/variant/iris3/src/msm_vidc_iris3.c | 1 - driver/variant/iris33/src/msm_vidc_iris33.c | 1 - driver/vidc/inc/resources.h | 16 + driver/vidc/inc/resources_ext.h | 13 + driver/vidc/src/resources.c | 599 +++++++++--------- driver/vidc/src/resources_ext.c | 516 +++++++++++++++ msm_video/Kbuild | 1 + 15 files changed, 899 insertions(+), 319 deletions(-) create mode 100644 driver/vidc/inc/resources_ext.h create mode 100644 driver/vidc/src/resources_ext.c diff --git a/driver/platform/common/inc/msm_vidc_platform.h b/driver/platform/common/inc/msm_vidc_platform.h index 09c43ce226..c5febce08f 100644 --- a/driver/platform/common/inc/msm_vidc_platform.h +++ b/driver/platform/common/inc/msm_vidc_platform.h @@ -48,6 +48,10 @@ struct bw_table { u32 max_kbps; }; +struct pd_table { + const char *name; +}; + struct regulator_table { const char *name; bool hw_trigger; @@ -187,6 +191,10 @@ struct msm_vidc_platform_data { unsigned int bw_tbl_size; const struct regulator_table *regulator_tbl; unsigned int regulator_tbl_size; + const struct pd_table *pd_tbl; + unsigned int pd_tbl_size; + const char **opp_tbl; + unsigned int opp_tbl_size; const struct clk_table *clk_tbl; unsigned int clk_tbl_size; const struct clk_rst_table *clk_rst_tbl; @@ -231,11 +239,6 @@ static inline bool is_mmrm_supported(struct msm_vidc_core *core) return !!core->platform->data.supports_mmrm; } -static inline bool is_regulator_supported(struct msm_vidc_core *core) -{ - return !!core->platform->data.regulator_tbl_size; -} - int msm_vidc_init_platform(struct platform_device *pdev); int msm_vidc_deinit_platform(struct platform_device *pdev); diff --git a/driver/platform/common/src/msm_vidc_platform.c b/driver/platform/common/src/msm_vidc_platform.c index 2e06742dd0..732a0c76f2 100644 --- a/driver/platform/common/src/msm_vidc_platform.c +++ b/driver/platform/common/src/msm_vidc_platform.c @@ -214,6 +214,15 @@ static int msm_vidc_init_ops(struct msm_vidc_core *core) core->media_device_ops = &msm_v4l2_media_ops; core->v4l2_m2m_ops = &msm_v4l2_m2m_ops; core->mem_ops = get_mem_ops(); + if (!core->mem_ops) { + d_vpr_e("%s: invalid memory ops\n", __func__); + return -EINVAL; + } + core->res_ops = get_resources_ops(); + if (!core->res_ops) { + d_vpr_e("%s: invalid resource ops\n", __func__); + return -EINVAL; + } return 0; } diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index 0c3ded4253..422aa4b5f4 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -17,6 +17,7 @@ #include "msm_vidc_internal.h" #include "msm_vidc_control_ext.h" #include "msm_vidc_memory_ext.h" +#include "resources_ext.h" #include "msm_vidc_iris3.h" #include "hfi_property.h" #include "hfi_command.h" @@ -2659,6 +2660,15 @@ static int msm_vidc_init_data(struct msm_vidc_core *core, struct device *dev) core->platform->data = kalama_data; core->mem_ops = get_mem_ops_ext(); + if (!core->mem_ops) { + d_vpr_e("%s: invalid memory ext ops\n", __func__); + return -EINVAL; + } + core->res_ops = get_res_ops_ext(); + if (!core->res_ops) { + d_vpr_e("%s: invalid resource ext ops\n", __func__); + return -EINVAL; + } rc = msm_vidc_kalama_check_ddr_type(); if (rc) return rc; diff --git a/driver/platform/pineapple/src/msm_vidc_pineapple.c b/driver/platform/pineapple/src/msm_vidc_pineapple.c index aeef3f0c06..e0fa7c6e0f 100644 --- a/driver/platform/pineapple/src/msm_vidc_pineapple.c +++ b/driver/platform/pineapple/src/msm_vidc_pineapple.c @@ -17,6 +17,7 @@ #include "msm_vidc_internal.h" #include "msm_vidc_control_ext.h" #include "msm_vidc_memory_ext.h" +#include "resources_ext.h" #include "msm_vidc_iris33.h" #include "hfi_property.h" #include "hfi_command.h" @@ -2646,6 +2647,15 @@ static int msm_vidc_init_data(struct msm_vidc_core *core) core->platform->data = pineapple_data; core->mem_ops = get_mem_ops_ext(); + if (!core->mem_ops) { + d_vpr_e("%s: invalid memory ext ops\n", __func__); + return -EINVAL; + } + core->res_ops = get_res_ops_ext(); + if (!core->res_ops) { + d_vpr_e("%s: invalid resource ext ops\n", __func__); + return -EINVAL; + } rc = msm_vidc_pineapple_check_ddr_type(); if (rc) return rc; diff --git a/driver/platform/pineapple/src/pineapple.c b/driver/platform/pineapple/src/pineapple.c index fcc1ef7c11..757a957d17 100644 --- a/driver/platform/pineapple/src/pineapple.c +++ b/driver/platform/pineapple/src/pineapple.c @@ -1771,6 +1771,7 @@ static int msm_vidc_init_data(struct msm_vidc_core *core) d_vpr_h("%s: initialize pineapple data\n", __func__); core->platform->data = pineapple_data; + rc = msm_vidc_pineapple_check_ddr_type(); if (rc) return rc; diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 1233ba431b..89f61e9d39 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -2140,6 +2140,16 @@ static int msm_vidc_init_data(struct msm_vidc_core *core) d_vpr_h("%s: initialize waipio data\n", __func__); core->platform->data = waipio_data; + core->mem_ops = get_mem_ops_ext(); + if (!core->mem_ops) { + d_vpr_e("%s: invalid memory ext ops\n", __func__); + return -EINVAL; + } + core->res_ops = get_res_ops_ext(); + if (!core->res_ops) { + d_vpr_e("%s: invalid resource ext ops\n", __func__); + return -EINVAL; + } return rc; } diff --git a/driver/platform/waipio/src/waipio.c b/driver/platform/waipio/src/waipio.c index a4e2007602..cd0df66208 100644 --- a/driver/platform/waipio/src/waipio.c +++ b/driver/platform/waipio/src/waipio.c @@ -1668,6 +1668,15 @@ static const struct bw_table waipio_bw_table[] = { { "venus-ddr", 1000, 15000000 }, }; +/* name */ +static const struct pd_table waipio_pd_table[] = { + { "iris-ctl" }, + { "vcodec" }, +}; + +/* name */ +static const char * const waipio_opp_table[] = { "mx", "mmcx", NULL }; + /* name, clock id, scaling */ static const struct clk_table waipio_clk_table[] = { { "gcc_video_axi0", GCC_VIDEO_AXI0_CLK, 0 }, @@ -1701,8 +1710,6 @@ static const struct msm_vidc_platform_data waipio_data = { /* resources dependent on other module */ .bw_tbl = waipio_bw_table, .bw_tbl_size = ARRAY_SIZE(waipio_bw_table), - .regulator_tbl = NULL, - .regulator_tbl_size = 0, .clk_tbl = waipio_clk_table, .clk_tbl_size = ARRAY_SIZE(waipio_clk_table), .clk_rst_tbl = waipio_clk_reset_table, @@ -1714,6 +1721,12 @@ static const struct msm_vidc_platform_data waipio_data = { .context_bank_tbl = waipio_context_bank_table, .context_bank_tbl_size = ARRAY_SIZE(waipio_context_bank_table), + /* populate power domain and opp table */ + .pd_tbl = waipio_pd_table, + .pd_tbl_size = ARRAY_SIZE(waipio_pd_table), + .opp_tbl = waipio_opp_table, + .opp_tbl_size = ARRAY_SIZE(waipio_opp_table), + /* platform specific resources */ .freq_tbl = waipio_freq_table, .freq_tbl_size = ARRAY_SIZE(waipio_freq_table), diff --git a/driver/variant/iris2/src/msm_vidc_iris2.c b/driver/variant/iris2/src/msm_vidc_iris2.c index a61e67dffb..85bb0c260c 100644 --- a/driver/variant/iris2/src/msm_vidc_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_iris2.c @@ -1038,7 +1038,6 @@ int msm_vidc_init_iris2(struct msm_vidc_core *core) d_vpr_h("%s()\n", __func__); core->venus_ops = &iris2_ops; core->session_ops = &msm_session_ops; - core->res_ops = get_resources_ops(); return 0; } diff --git a/driver/variant/iris3/src/msm_vidc_iris3.c b/driver/variant/iris3/src/msm_vidc_iris3.c index b37ec64fc2..bb998d8403 100644 --- a/driver/variant/iris3/src/msm_vidc_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_iris3.c @@ -1119,7 +1119,6 @@ int msm_vidc_init_iris3(struct msm_vidc_core *core) d_vpr_h("%s()\n", __func__); core->venus_ops = &iris3_ops; core->session_ops = &msm_session_ops; - core->res_ops = get_resources_ops(); return 0; } diff --git a/driver/variant/iris33/src/msm_vidc_iris33.c b/driver/variant/iris33/src/msm_vidc_iris33.c index 191cbb7e39..d7b54311ab 100644 --- a/driver/variant/iris33/src/msm_vidc_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_iris33.c @@ -1246,7 +1246,6 @@ int msm_vidc_init_iris33(struct msm_vidc_core *core) d_vpr_h("%s()\n", __func__); core->venus_ops = &iris33_ops; core->session_ops = &msm_session_ops; - core->res_ops = get_resources_ops(); return 0; } diff --git a/driver/vidc/inc/resources.h b/driver/vidc/inc/resources.h index a48348753f..48a4b2dc37 100644 --- a/driver/vidc/inc/resources.h +++ b/driver/vidc/inc/resources.h @@ -67,6 +67,10 @@ struct msm_vidc_core; venus_hfi_for_each_thing_reverse_continue(__device, __rinfo, \ regulator, __from) +/* Power domain set helpers */ +#define venus_hfi_for_each_power_domain(__device, __pdinfo) \ + venus_hfi_for_each_thing(__device, __pdinfo, power_domain) + /* Clock set helpers */ #define venus_hfi_for_each_clock(__device, __cinfo) \ venus_hfi_for_each_thing(__device, __cinfo, clock) @@ -118,6 +122,16 @@ struct regulator_set { u32 count; }; +struct power_domain_info { + struct device *genpd_dev; + const char *name; +}; + +struct power_domain_set { + struct power_domain_info *power_domain_tbl; + u32 count; +}; + struct clock_residency { struct list_head list; u64 rate; @@ -202,6 +216,7 @@ struct msm_vidc_resource { u32 irq; struct bus_set bus_set; struct regulator_set regulator_set; + struct power_domain_set power_domain_set; struct clock_set clock_set; struct reset_set reset_set; struct subcache_set subcache_set; @@ -227,6 +242,7 @@ struct msm_vidc_resources_ops { int (*reset_control_deassert)(struct msm_vidc_core *core, const char *name); + int (*gdsc_init)(struct msm_vidc_core *core); int (*gdsc_on)(struct msm_vidc_core *core, const char *name); int (*gdsc_off)(struct msm_vidc_core *core, const char *name); int (*gdsc_hw_ctrl)(struct msm_vidc_core *core); diff --git a/driver/vidc/inc/resources_ext.h b/driver/vidc/inc/resources_ext.h new file mode 100644 index 0000000000..30644b9796 --- /dev/null +++ b/driver/vidc/inc/resources_ext.h @@ -0,0 +1,13 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#ifndef _RESOURCES_EXT_H_ +#define _RESOURCES_EXT_H_ + +struct msm_vidc_resources_ops; + +const struct msm_vidc_resources_ops *get_res_ops_ext(void); + +#endif // _RESOURCES_EXT_H_ diff --git a/driver/vidc/src/resources.c b/driver/vidc/src/resources.c index 559f2d7445..98434f1a42 100644 --- a/driver/vidc/src/resources.c +++ b/driver/vidc/src/resources.c @@ -6,6 +6,9 @@ #include #include +#include +#include +#include #include #include #include @@ -32,6 +35,14 @@ enum reset_state { DEASSERT, }; +/* A comparator to compare loads (needed later on) */ +static inline int cmp(const void *a, const void *b) +{ + /* want to sort in reverse so flip the comparison */ + return ((struct freq_table *)b)->freq - + ((struct freq_table *)a)->freq; +} + static void __fatal_error(bool fatal) { WARN_ON(fatal); @@ -89,12 +100,125 @@ static struct mmrm_client *devm_mmrm_get(struct device *dev, struct mmrm_client_ } #endif -/* A comparator to compare loads (needed later on) */ -static inline int cmp(const void *a, const void *b) +static void devm_pd_release(void *res) { - /* want to sort in reverse so flip the comparison */ - return ((struct freq_table *)b)->freq - - ((struct freq_table *)a)->freq; + struct device *pd = (struct device *)res; + + d_vpr_h("%s(): %s\n", __func__, dev_name(pd)); + dev_pm_domain_detach(pd, true); +} + +static struct device *devm_pd_get(struct device *dev, const char *name) +{ + struct device *pd = NULL; + int rc = 0; + + pd = dev_pm_domain_attach_by_name(dev, name); + if (!pd) { + d_vpr_e("%s: pm domain attach failed %s\n", __func__, name); + return NULL; + } + + rc = devm_add_action_or_reset(dev, devm_pd_release, (void *)pd); + if (rc) { + d_vpr_e("%s: add action or reset failed %s\n", __func__, name); + return NULL; + } + + return pd; +} + +static void devm_opp_dl_release(void *res) +{ + struct device_link *link = (struct device_link *)res; + + d_vpr_h("%s(): %s\n", __func__, dev_name(&link->link_dev)); + device_link_del(link); +} + +static int devm_opp_dl_get(struct device *dev, struct device *supplier) +{ + u32 flag = DL_FLAG_RPM_ACTIVE | DL_FLAG_PM_RUNTIME | DL_FLAG_STATELESS; + struct device_link *link = NULL; + int rc = 0; + + link = device_link_add(dev, supplier, flag); + if (!link) { + d_vpr_e("%s: device link add failed\n", __func__); + return -EINVAL; + } + + rc = devm_add_action_or_reset(dev, devm_opp_dl_release, (void *)link); + if (rc) { + d_vpr_e("%s: add action or reset failed\n", __func__); + return rc; + } + + return rc; +} + +static void devm_pm_runtime_put_sync(void *res) +{ + struct device *dev = (struct device *)res; + + d_vpr_h("%s(): %s\n", __func__, dev_name(dev)); + pm_runtime_put_sync(dev); +} + +static int devm_pm_runtime_get_sync(struct device *dev) +{ + int rc = 0; + + rc = pm_runtime_get_sync(dev); + if (rc) { + d_vpr_e("%s: pm domain get sync failed\n", __func__); + return rc; + } + + rc = devm_add_action_or_reset(dev, devm_pm_runtime_put_sync, (void *)dev); + if (rc) { + d_vpr_e("%s: add action or reset failed\n", __func__); + return rc; + } + + return rc; +} + +static int __opp_set_rate(struct msm_vidc_core *core, u64 freq) +{ + unsigned long opp_freq = 0; + struct dev_pm_opp *opp; + int rc = 0; + + if (!core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + opp_freq = freq; + + /* find max(ceil) freq from opp table */ + opp = dev_pm_opp_find_freq_ceil(&core->pdev->dev, &opp_freq); + if (IS_ERR(opp)) { + opp = dev_pm_opp_find_freq_floor(&core->pdev->dev, &opp_freq); + if (IS_ERR(opp)) { + d_vpr_e("%s: unable to find freq %lld in opp table\n", __func__, freq); + return -EINVAL; + } + } + dev_pm_opp_put(opp); + + /* print freq value */ + d_vpr_h("%s: set rate %lld (requested %lld)\n", + __func__, opp_freq, freq); + + /* scale freq to power up mxc & mmcx */ + rc = dev_pm_opp_set_rate(&core->pdev->dev, opp_freq); + if (rc) { + d_vpr_e("%s: failed to set rate\n", __func__); + return rc; + } + + return rc; } static int __init_register_base(struct msm_vidc_core *core) @@ -221,68 +345,133 @@ static int __init_bus(struct msm_vidc_core *core) return rc; } -static int __init_regulators(struct msm_vidc_core *core) +static int __init_power_domains(struct msm_vidc_core *core) { - const struct regulator_table *regulator_tbl; - struct regulator_set *regulators; - struct regulator_info *rinfo = NULL; - u32 regulator_count = 0, cnt = 0; + struct power_domain_info *pdinfo = NULL; + const struct pd_table *pd_tbl; + struct power_domain_set *pds; + struct device **opp_vdevs; + const char **opp_tbl; + u32 pd_count = 0, opp_count = 0, cnt = 0; int rc = 0; if (!core || !core->resource || !core->platform) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - regulators = &core->resource->regulator_set; + pds = &core->resource->power_domain_set; - /* skip init if regulators not supported */ - if (!is_regulator_supported(core)) { - d_vpr_h("%s: regulators are not available in database\n", __func__); + pd_tbl = core->platform->data.pd_tbl; + pd_count = core->platform->data.pd_tbl_size; + + /* skip init if power domain not supported */ + if (!pd_count) { + d_vpr_h("%s: power domain entries not available in db\n", __func__); return 0; } - regulator_tbl = core->platform->data.regulator_tbl; - regulator_count = core->platform->data.regulator_tbl_size; - - if (!regulator_tbl || !regulator_count) { - d_vpr_e("%s: invalid regulator tbl %#x or count %d\n", - __func__, regulator_tbl, regulator_count); + /* sanitize power domain table */ + if (!pd_tbl) { + d_vpr_e("%s: invalid power domain tbl\n", __func__); return -EINVAL; } - /* allocate regulator_set */ - regulators->regulator_tbl = devm_kzalloc(&core->pdev->dev, - sizeof(*regulators->regulator_tbl) * regulator_count, GFP_KERNEL); - if (!regulators->regulator_tbl) { - d_vpr_e("%s: failed to alloc memory for regulator table\n", __func__); + /* allocate power_domain_set */ + pds->power_domain_tbl = devm_kzalloc(&core->pdev->dev, + sizeof(*pds->power_domain_tbl) * pd_count, GFP_KERNEL); + if (!pds->power_domain_tbl) { + d_vpr_e("%s: failed to alloc memory for pd table\n", __func__); return -ENOMEM; } - regulators->count = regulator_count; + pds->count = pd_count; - /* populate regulator fields */ - for (cnt = 0; cnt < regulators->count; cnt++) { - regulators->regulator_tbl[cnt].name = regulator_tbl[cnt].name; - regulators->regulator_tbl[cnt].hw_power_collapse = regulator_tbl[cnt].hw_trigger; - } + /* populate power domain fields */ + for (cnt = 0; cnt < pds->count; cnt++) + pds->power_domain_tbl[cnt].name = pd_tbl[cnt].name; - /* print regulator fields */ - venus_hfi_for_each_regulator(core, rinfo) { - d_vpr_h("%s: name %s hw_power_collapse %d\n", - __func__, rinfo->name, rinfo->hw_power_collapse); - } + /* print power domain fields */ + venus_hfi_for_each_power_domain(core, pdinfo) + d_vpr_h("%s: pd name %s\n", __func__, pdinfo->name); - /* get regulator handle */ - venus_hfi_for_each_regulator(core, rinfo) { - rinfo->regulator = devm_regulator_get(&core->pdev->dev, rinfo->name); - if (IS_ERR_OR_NULL(rinfo->regulator)) { - rc = PTR_ERR(rinfo->regulator) ? - PTR_ERR(rinfo->regulator) : -EBADHANDLE; - d_vpr_e("%s: failed to get regulator: %s\n", __func__, rinfo->name); - rinfo->regulator = NULL; + /* get power domain handle */ + venus_hfi_for_each_power_domain(core, pdinfo) { + pdinfo->genpd_dev = devm_pd_get(&core->pdev->dev, pdinfo->name); + if (IS_ERR_OR_NULL(pdinfo->genpd_dev)) { + rc = PTR_ERR(pdinfo->genpd_dev) ? + PTR_ERR(pdinfo->genpd_dev) : -EBADHANDLE; + d_vpr_e("%s: failed to get pd: %s\n", __func__, pdinfo->name); + pdinfo->genpd_dev = NULL; return rc; } } + opp_tbl = core->platform->data.opp_tbl; + opp_count = core->platform->data.opp_tbl_size; + + /* skip init if opp not supported */ + if (opp_count < 2) { + d_vpr_h("%s: opp entries not available\n", __func__); + return 0; + } + + /* sanitize opp table */ + if (!opp_tbl) { + d_vpr_e("%s: invalid opp table\n", __func__); + return -EINVAL; + } + + /* ignore NULL entry at the end of table */ + opp_count -= 1; + + /* print opp table entries */ + for (cnt = 0; cnt < opp_count; cnt++) + d_vpr_h("%s: opp name %s\n", __func__, opp_tbl[cnt]); + + /* populate opp power domains(for rails) */ + rc = devm_pm_opp_attach_genpd(&core->pdev->dev, opp_tbl, &opp_vdevs); + if (rc) + return rc; + + /* create device_links b/w consumer(dev) and multiple suppliers(mx, mmcx) */ + for (cnt = 0; cnt < opp_count; cnt++) { + rc = devm_opp_dl_get(&core->pdev->dev, opp_vdevs[cnt]); + if (rc) { + d_vpr_e("%s: failed to create dl: %s\n", + __func__, dev_name(opp_vdevs[cnt])); + return rc; + } + } + + /* initialize opp table from device tree */ + rc = devm_pm_opp_of_add_table(&core->pdev->dev); + if (rc) { + d_vpr_e("%s: failed to add opp table\n", __func__); + return rc; + } + + /** + * 1. power up mx & mmcx supply for RCG(mvs0_clk_src) + * 2. power up gdsc0c for mvs0c branch clk + * 3. power up gdsc0 for mvs0 branch clk + */ + + /** + * power up mxc, mmcx rails to enable supply for + * RCG(video_cc_mvs0_clk_src) + */ + /* enable runtime pm */ + rc = devm_pm_runtime_enable(&core->pdev->dev); + if (rc) { + d_vpr_e("%s: failed to enable runtime pm\n", __func__); + return rc; + } + /* power up rails(mxc & mmcx) */ + rc = devm_pm_runtime_get_sync(&core->pdev->dev); + if (rc) { + d_vpr_e("%s: failed to get sync runtime pm\n", __func__); + return rc; + } + return rc; } @@ -715,230 +904,77 @@ static int __register_mmrm(struct msm_vidc_core *core) } #endif - - -static int __acquire_regulator(struct msm_vidc_core *core, - struct regulator_info *rinfo) +static int __enable_power_domains(struct msm_vidc_core *core, const char *name) { + struct power_domain_info *pdinfo = NULL; int rc = 0; - if (!core || !rinfo) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; + /* power up rails(mxc & mmcx) to enable RCG(video_cc_mvs0_clk_src) */ + rc = __opp_set_rate(core, ULONG_MAX); + if (rc) { + d_vpr_e("%s: opp setrate failed\n", __func__); + return rc; } - if (rinfo->hw_power_collapse) { - if (!rinfo->regulator) { - d_vpr_e("%s: invalid regulator\n", __func__); - rc = -EINVAL; - goto exit; - } - - if (regulator_get_mode(rinfo->regulator) == - REGULATOR_MODE_NORMAL) { - /* clear handoff from core sub_state */ - msm_vidc_change_core_sub_state(core, - CORE_SUBSTATE_GDSC_HANDOFF, 0, __func__); - d_vpr_h("Skip acquire regulator %s\n", rinfo->name); - goto exit; - } - - rc = regulator_set_mode(rinfo->regulator, - REGULATOR_MODE_NORMAL); - if (rc) { - /* - * This is somewhat fatal, but nothing we can do - * about it. We can't disable the regulator w/o - * getting it back under s/w control - */ - d_vpr_e("Failed to acquire regulator control: %s\n", - rinfo->name); - goto exit; - } else { - /* reset handoff from core sub_state */ - msm_vidc_change_core_sub_state(core, - CORE_SUBSTATE_GDSC_HANDOFF, 0, __func__); - d_vpr_h("Acquired regulator control from HW: %s\n", - rinfo->name); - - } - - if (!regulator_is_enabled(rinfo->regulator)) { - d_vpr_e("%s: Regulator is not enabled %s\n", - __func__, rinfo->name); - __fatal_error(true); - } - } - -exit: - return rc; -} - -static int __acquire_regulators(struct msm_vidc_core *core) -{ - int rc = 0; - struct regulator_info *rinfo; - - venus_hfi_for_each_regulator(core, rinfo) - __acquire_regulator(core, rinfo); - - return rc; -} - -static int __hand_off_regulator(struct msm_vidc_core *core, - struct regulator_info *rinfo) -{ - int rc = 0; - - if (rinfo->hw_power_collapse) { - if (!rinfo->regulator) { - d_vpr_e("%s: invalid regulator\n", __func__); - return -EINVAL; - } - - rc = regulator_set_mode(rinfo->regulator, - REGULATOR_MODE_FAST); - if (rc) { - d_vpr_e("Failed to hand off regulator control: %s\n", - rinfo->name); - return rc; - } else { - /* set handoff done in core sub_state */ - msm_vidc_change_core_sub_state(core, - 0, CORE_SUBSTATE_GDSC_HANDOFF, __func__); - d_vpr_h("Hand off regulator control to HW: %s\n", - rinfo->name); - } - - if (!regulator_is_enabled(rinfo->regulator)) { - d_vpr_e("%s: Regulator is not enabled %s\n", - __func__, rinfo->name); - __fatal_error(true); - } - } - - return rc; -} - -static int __hand_off_regulators(struct msm_vidc_core *core) -{ - struct regulator_info *rinfo; - int rc = 0, c = 0; - - venus_hfi_for_each_regulator(core, rinfo) { - rc = __hand_off_regulator(core, rinfo); - /* - * If one regulator hand off failed, driver should take - * the control for other regulators back. - */ - if (rc) - goto err_reg_handoff_failed; - c++; - } - - return rc; -err_reg_handoff_failed: - venus_hfi_for_each_regulator_reverse_continue(core, rinfo, c) - __acquire_regulator(core, rinfo); - - return rc; -} - -static int __disable_regulator(struct msm_vidc_core *core, const char *reg_name) -{ - int rc = 0; - struct regulator_info *rinfo; - bool found; - - if (!core || !reg_name) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - found = false; - venus_hfi_for_each_regulator(core, rinfo) { - if (!rinfo->regulator) { - d_vpr_e("%s: invalid regulator %s\n", - __func__, rinfo->name); - return -EINVAL; - } - if (strcmp(rinfo->name, reg_name)) + /* power up (gdsc0/gdsc0c) to enable (mvs0/mvs0c) branch clock */ + venus_hfi_for_each_power_domain(core, pdinfo) { + if (strcmp(pdinfo->name, name)) continue; - found = true; - rc = __acquire_regulator(core, rinfo); + rc = pm_runtime_get_sync(pdinfo->genpd_dev); if (rc) { - d_vpr_e("%s: failed to acquire %s, rc = %d\n", - __func__, rinfo->name, rc); - /* Bring attention to this issue */ - WARN_ON(true); + d_vpr_e("%s: failed to get sync: %s\n", __func__, pdinfo->name); return rc; } - /* reset handoff done from core sub_state */ - msm_vidc_change_core_sub_state(core, CORE_SUBSTATE_GDSC_HANDOFF, 0, __func__); - - rc = regulator_disable(rinfo->regulator); - if (rc) { - d_vpr_e("%s: failed to disable %s, rc = %d\n", - __func__, rinfo->name, rc); - return rc; - } - d_vpr_h("%s: disabled regulator %s\n", __func__, rinfo->name); - break; - } - if (!found) { - d_vpr_e("%s: regulator %s not found\n", __func__, reg_name); - return -EINVAL; + d_vpr_h("%s: enabled power doamin %s\n", __func__, pdinfo->name); } return rc; } -static int __enable_regulator(struct msm_vidc_core *core, const char *reg_name) +static int __disable_power_domains(struct msm_vidc_core *core, const char *name) { + struct power_domain_info *pdinfo = NULL; int rc = 0; - struct regulator_info *rinfo; - bool found; - if (!core || !reg_name) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - found = false; - venus_hfi_for_each_regulator(core, rinfo) { - if (!rinfo->regulator) { - d_vpr_e("%s: invalid regulator %s\n", - __func__, rinfo->name); - return -EINVAL; - } - if (strcmp(rinfo->name, reg_name)) + /* power down (gdsc0/gdsc0c) to disable (mvs0/mvs0c) branch clock */ + venus_hfi_for_each_power_domain(core, pdinfo) { + if (strcmp(pdinfo->name, name)) continue; - found = true; - rc = regulator_enable(rinfo->regulator); + rc = pm_runtime_put_sync(pdinfo->genpd_dev); if (rc) { - d_vpr_e("%s: failed to enable %s, rc = %d\n", - __func__, rinfo->name, rc); + d_vpr_e("%s: failed to put sync: %s\n", __func__, pdinfo->name); return rc; } - if (!regulator_is_enabled(rinfo->regulator)) { - d_vpr_e("%s: regulator %s not enabled\n", - __func__, rinfo->name); - regulator_disable(rinfo->regulator); - return -EINVAL; - } - d_vpr_h("%s: enabled regulator %s\n", __func__, rinfo->name); - break; - } - if (!found) { - d_vpr_e("%s: regulator %s not found\n", __func__, reg_name); - return -EINVAL; + d_vpr_h("%s: disabled power doamin %s\n", __func__, pdinfo->name); } + /* power down rails(mxc & mmcx) to disable RCG(video_cc_mvs0_clk_src) */ + rc = __opp_set_rate(core, 0); + if (rc) { + d_vpr_e("%s: opp setrate failed\n", __func__); + return rc; + } + msm_vidc_change_core_sub_state(core, CORE_SUBSTATE_GDSC_HANDOFF, 0, __func__); + return rc; } +static int __hand_off_power_domains(struct msm_vidc_core *core) +{ + msm_vidc_change_core_sub_state(core, 0, CORE_SUBSTATE_GDSC_HANDOFF, __func__); + + return 0; +} + +static int __acquire_power_domains(struct msm_vidc_core *core) +{ + msm_vidc_change_core_sub_state(core, CORE_SUBSTATE_GDSC_HANDOFF, 0, __func__); + + return 0; +} + static int __disable_subcaches(struct msm_vidc_core *core) { struct subcache_info *sinfo; @@ -1238,68 +1274,6 @@ static int update_residency_stats( return rc; } -#ifdef CONFIG_MSM_MMRM -static int __set_clk_rate(struct msm_vidc_core *core, struct clock_info *cl, - u64 rate) -{ - int rc = 0; - struct mmrm_client_data client_data; - struct mmrm_client *client; - u64 srate; - - /* not registered */ - if (!core || !cl || !core->platform) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - if (is_mmrm_supported(core) && !cl->mmrm_client) { - d_vpr_e("%s: invalid mmrm client\n", __func__); - return -EINVAL; - } - - /* update clock residency stats */ - update_residency_stats(core, cl, rate); - - /* - * This conversion is necessary since we are scaling clock values based on - * the branch clock. However, mmrm driver expects source clock to be registered - * and used for scaling. - * TODO: Remove this scaling if using source clock instead of branch clock. - */ - srate = rate * MSM_VIDC_CLOCK_SOURCE_SCALING_RATIO; - - /* bail early if requested clk rate is not changed */ - if (rate == cl->prev) - return 0; - - d_vpr_p("Scaling clock %s to %llu, prev %llu\n", - cl->name, srate, cl->prev * MSM_VIDC_CLOCK_SOURCE_SCALING_RATIO); - - if (is_mmrm_supported(core)) { - /* set clock rate to mmrm driver */ - client = cl->mmrm_client; - memset(&client_data, 0, sizeof(client_data)); - client_data.num_hw_blocks = 1; - rc = mmrm_client_set_value(client, &client_data, srate); - if (rc) { - d_vpr_e("%s: Failed to set mmrm clock rate %llu %s: %d\n", - __func__, srate, cl->name, rc); - return rc; - } - } else { - /* set clock rate to clock driver */ - rc = clk_set_rate(cl->clk, srate); - if (rc) { - d_vpr_e("%s: Failed to set clock rate %llu %s: %d\n", - __func__, srate, cl->name, rc); - return rc; - } - } - cl->prev = rate; - return rc; -} -#else static int __set_clk_rate(struct msm_vidc_core *core, struct clock_info *cl, u64 rate) { @@ -1341,12 +1315,18 @@ static int __set_clk_rate(struct msm_vidc_core *core, struct clock_info *cl, return rc; } -#endif static int __set_clocks(struct msm_vidc_core *core, u64 freq) { - int rc = 0; struct clock_info *cl; + int rc = 0; + + /* scale mxc & mmcx rails */ + rc = __opp_set_rate(core, freq); + if (rc) { + d_vpr_e("%s: opp setrate failed %lld\n", __func__, freq); + return rc; + } venus_hfi_for_each_clock(core, cl) { if (cl->has_scaling) { @@ -1477,7 +1457,7 @@ static int __init_resources(struct msm_vidc_core *core) if (rc) return rc; - rc = __init_regulators(core); + rc = call_res_op(core, gdsc_init, core); if (rc) return rc; @@ -1748,10 +1728,11 @@ static const struct msm_vidc_resources_ops res_ops = { .reset_control_release = __reset_control_release_name, .reset_control_assert = __reset_control_assert_name, .reset_control_deassert = __reset_control_deassert_name, - .gdsc_on = __enable_regulator, - .gdsc_off = __disable_regulator, - .gdsc_hw_ctrl = __hand_off_regulators, - .gdsc_sw_ctrl = __acquire_regulators, + .gdsc_init = __init_power_domains, + .gdsc_on = __enable_power_domains, + .gdsc_off = __disable_power_domains, + .gdsc_hw_ctrl = __hand_off_power_domains, + .gdsc_sw_ctrl = __acquire_power_domains, .llcc = llcc_enable, .set_bw = set_bw, .set_clks = __set_clocks, diff --git a/driver/vidc/src/resources_ext.c b/driver/vidc/src/resources_ext.c new file mode 100644 index 0000000000..f500e75e74 --- /dev/null +++ b/driver/vidc/src/resources_ext.c @@ -0,0 +1,516 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. + * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include +#ifdef CONFIG_MSM_MMRM +#include +#endif + +#include "resources.h" +#include "msm_vidc_core.h" +#include "msm_vidc_debug.h" +#include "msm_vidc_power.h" +#include "msm_vidc_driver.h" +#include "msm_vidc_platform.h" + +static void __fatal_error(bool fatal) +{ + WARN_ON(fatal); +} + +static int __init_regulators(struct msm_vidc_core *core) +{ + const struct regulator_table *regulator_tbl; + struct regulator_set *regulators; + struct regulator_info *rinfo = NULL; + u32 regulator_count = 0, cnt = 0; + int rc = 0; + + if (!core || !core->resource || !core->platform) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + regulators = &core->resource->regulator_set; + + regulator_tbl = core->platform->data.regulator_tbl; + regulator_count = core->platform->data.regulator_tbl_size; + + /* skip init if regulators not supported */ + if (!regulator_count) { + d_vpr_h("%s: regulators are not available in database\n", __func__); + return 0; + } + + /* sanitize regulator table */ + if (!regulator_tbl) { + d_vpr_e("%s: invalid regulator tbl\n", __func__); + return -EINVAL; + } + + /* allocate regulator_set */ + regulators->regulator_tbl = devm_kzalloc(&core->pdev->dev, + sizeof(*regulators->regulator_tbl) * regulator_count, GFP_KERNEL); + if (!regulators->regulator_tbl) { + d_vpr_e("%s: failed to alloc memory for regulator table\n", __func__); + return -ENOMEM; + } + regulators->count = regulator_count; + + /* populate regulator fields */ + for (cnt = 0; cnt < regulators->count; cnt++) { + regulators->regulator_tbl[cnt].name = regulator_tbl[cnt].name; + regulators->regulator_tbl[cnt].hw_power_collapse = regulator_tbl[cnt].hw_trigger; + } + + /* print regulator fields */ + venus_hfi_for_each_regulator(core, rinfo) { + d_vpr_h("%s: name %s hw_power_collapse %d\n", + __func__, rinfo->name, rinfo->hw_power_collapse); + } + + /* get regulator handle */ + venus_hfi_for_each_regulator(core, rinfo) { + rinfo->regulator = devm_regulator_get(&core->pdev->dev, rinfo->name); + if (IS_ERR_OR_NULL(rinfo->regulator)) { + rc = PTR_ERR(rinfo->regulator) ? + PTR_ERR(rinfo->regulator) : -EBADHANDLE; + d_vpr_e("%s: failed to get regulator: %s\n", __func__, rinfo->name); + rinfo->regulator = NULL; + return rc; + } + } + + return rc; +} + +static int __acquire_regulator(struct msm_vidc_core *core, + struct regulator_info *rinfo) +{ + int rc = 0; + + if (!core || !rinfo) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (rinfo->hw_power_collapse) { + if (!rinfo->regulator) { + d_vpr_e("%s: invalid regulator\n", __func__); + rc = -EINVAL; + goto exit; + } + + if (regulator_get_mode(rinfo->regulator) == + REGULATOR_MODE_NORMAL) { + /* clear handoff from core sub_state */ + msm_vidc_change_core_sub_state(core, + CORE_SUBSTATE_GDSC_HANDOFF, 0, __func__); + d_vpr_h("Skip acquire regulator %s\n", rinfo->name); + goto exit; + } + + rc = regulator_set_mode(rinfo->regulator, + REGULATOR_MODE_NORMAL); + if (rc) { + /* + * This is somewhat fatal, but nothing we can do + * about it. We can't disable the regulator w/o + * getting it back under s/w control + */ + d_vpr_e("Failed to acquire regulator control: %s\n", + rinfo->name); + goto exit; + } else { + /* reset handoff from core sub_state */ + msm_vidc_change_core_sub_state(core, + CORE_SUBSTATE_GDSC_HANDOFF, 0, __func__); + d_vpr_h("Acquired regulator control from HW: %s\n", + rinfo->name); + + } + + if (!regulator_is_enabled(rinfo->regulator)) { + d_vpr_e("%s: Regulator is not enabled %s\n", + __func__, rinfo->name); + __fatal_error(true); + } + } + +exit: + return rc; +} + +static int __hand_off_regulator(struct msm_vidc_core *core, + struct regulator_info *rinfo) +{ + int rc = 0; + + if (rinfo->hw_power_collapse) { + if (!rinfo->regulator) { + d_vpr_e("%s: invalid regulator\n", __func__); + return -EINVAL; + } + + rc = regulator_set_mode(rinfo->regulator, + REGULATOR_MODE_FAST); + if (rc) { + d_vpr_e("Failed to hand off regulator control: %s\n", + rinfo->name); + return rc; + } else { + /* set handoff done in core sub_state */ + msm_vidc_change_core_sub_state(core, + 0, CORE_SUBSTATE_GDSC_HANDOFF, __func__); + d_vpr_h("Hand off regulator control to HW: %s\n", + rinfo->name); + } + + if (!regulator_is_enabled(rinfo->regulator)) { + d_vpr_e("%s: Regulator is not enabled %s\n", + __func__, rinfo->name); + __fatal_error(true); + } + } + + return rc; +} + +static int __enable_regulator(struct msm_vidc_core *core, const char *reg_name) +{ + int rc = 0; + struct regulator_info *rinfo; + bool found; + + if (!core || !reg_name) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + found = false; + venus_hfi_for_each_regulator(core, rinfo) { + if (!rinfo->regulator) { + d_vpr_e("%s: invalid regulator %s\n", + __func__, rinfo->name); + return -EINVAL; + } + if (strcmp(rinfo->name, reg_name)) + continue; + found = true; + + rc = regulator_enable(rinfo->regulator); + if (rc) { + d_vpr_e("%s: failed to enable %s, rc = %d\n", + __func__, rinfo->name, rc); + return rc; + } + if (!regulator_is_enabled(rinfo->regulator)) { + d_vpr_e("%s: regulator %s not enabled\n", + __func__, rinfo->name); + regulator_disable(rinfo->regulator); + return -EINVAL; + } + d_vpr_h("%s: enabled regulator %s\n", __func__, rinfo->name); + break; + } + if (!found) { + d_vpr_e("%s: regulator %s not found\n", __func__, reg_name); + return -EINVAL; + } + + return rc; +} + +static int __disable_regulator(struct msm_vidc_core *core, const char *reg_name) +{ + int rc = 0; + struct regulator_info *rinfo; + bool found; + + if (!core || !reg_name) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + found = false; + venus_hfi_for_each_regulator(core, rinfo) { + if (!rinfo->regulator) { + d_vpr_e("%s: invalid regulator %s\n", + __func__, rinfo->name); + return -EINVAL; + } + if (strcmp(rinfo->name, reg_name)) + continue; + found = true; + + rc = __acquire_regulator(core, rinfo); + if (rc) { + d_vpr_e("%s: failed to acquire %s, rc = %d\n", + __func__, rinfo->name, rc); + /* Bring attention to this issue */ + WARN_ON(true); + return rc; + } + /* reset handoff done from core sub_state */ + msm_vidc_change_core_sub_state(core, CORE_SUBSTATE_GDSC_HANDOFF, 0, __func__); + + rc = regulator_disable(rinfo->regulator); + if (rc) { + d_vpr_e("%s: failed to disable %s, rc = %d\n", + __func__, rinfo->name, rc); + return rc; + } + d_vpr_h("%s: disabled regulator %s\n", __func__, rinfo->name); + break; + } + if (!found) { + d_vpr_e("%s: regulator %s not found\n", __func__, reg_name); + return -EINVAL; + } + + return rc; +} + +static int __hand_off_regulators(struct msm_vidc_core *core) +{ + struct regulator_info *rinfo; + int rc = 0, c = 0; + + venus_hfi_for_each_regulator(core, rinfo) { + rc = __hand_off_regulator(core, rinfo); + /* + * If one regulator hand off failed, driver should take + * the control for other regulators back. + */ + if (rc) + goto err_reg_handoff_failed; + c++; + } + + return rc; +err_reg_handoff_failed: + venus_hfi_for_each_regulator_reverse_continue(core, rinfo, c) + __acquire_regulator(core, rinfo); + + return rc; +} + +static int __acquire_regulators(struct msm_vidc_core *core) +{ + int rc = 0; + struct regulator_info *rinfo; + + venus_hfi_for_each_regulator(core, rinfo) + __acquire_regulator(core, rinfo); + + return rc; +} + +static struct clock_residency *get_residency_stats(struct clock_info *cl, u64 rate) +{ + struct clock_residency *residency = NULL; + bool found = false; + + if (!cl) { + d_vpr_e("%s: invalid params\n", __func__); + return NULL; + } + + list_for_each_entry(residency, &cl->residency_list, list) { + if (residency->rate == rate) { + found = true; + break; + } + } + + return found ? residency : NULL; +} + +static int update_residency_stats( + struct msm_vidc_core *core, struct clock_info *cl, u64 rate) +{ + struct clock_residency *cur_residency = NULL, *prev_residency = NULL; + u64 cur_time_us = 0; + int rc = 0; + + if (!core || !cl) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + /* skip update if scaling not supported */ + if (!cl->has_scaling) + return 0; + + /* skip update if rate not changed */ + if (rate == cl->prev) + return 0; + + /* get current time in ns */ + cur_time_us = ktime_get_ns() / 1000; + + /* update previous rate residency end or total time */ + prev_residency = get_residency_stats(cl, cl->prev); + if (prev_residency) { + if (prev_residency->start_time_us) + prev_residency->total_time_us = cur_time_us - prev_residency->start_time_us; + + /* reset start time us */ + prev_residency->start_time_us = 0; + } + + /* clk disable case - no need to update new entry */ + if (rate == 0) + return 0; + + /* check if rate entry is present */ + cur_residency = get_residency_stats(cl, rate); + if (!cur_residency) { + d_vpr_e("%s: entry not found. rate %llu\n", __func__, rate); + return -EINVAL; + } + + /* update residency start time for current rate/freq */ + cur_residency->start_time_us = cur_time_us; + + return rc; +} + +#ifdef CONFIG_MSM_MMRM +static int __set_clk_rate(struct msm_vidc_core *core, struct clock_info *cl, + u64 rate) +{ + int rc = 0; + struct mmrm_client_data client_data; + struct mmrm_client *client; + u64 srate; + + /* not registered */ + if (!core || !cl || !core->platform) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (is_mmrm_supported(core) && !cl->mmrm_client) { + d_vpr_e("%s: invalid mmrm client\n", __func__); + return -EINVAL; + } + + /* update clock residency stats */ + update_residency_stats(core, cl, rate); + + /* + * This conversion is necessary since we are scaling clock values based on + * the branch clock. However, mmrm driver expects source clock to be registered + * and used for scaling. + * TODO: Remove this scaling if using source clock instead of branch clock. + */ + srate = rate * MSM_VIDC_CLOCK_SOURCE_SCALING_RATIO; + + /* bail early if requested clk rate is not changed */ + if (rate == cl->prev) + return 0; + + d_vpr_p("Scaling clock %s to %llu, prev %llu\n", + cl->name, srate, cl->prev * MSM_VIDC_CLOCK_SOURCE_SCALING_RATIO); + + if (is_mmrm_supported(core)) { + /* set clock rate to mmrm driver */ + client = cl->mmrm_client; + memset(&client_data, 0, sizeof(client_data)); + client_data.num_hw_blocks = 1; + rc = mmrm_client_set_value(client, &client_data, srate); + if (rc) { + d_vpr_e("%s: Failed to set mmrm clock rate %llu %s: %d\n", + __func__, srate, cl->name, rc); + return rc; + } + } else { + /* set clock rate to clock driver */ + rc = clk_set_rate(cl->clk, srate); + if (rc) { + d_vpr_e("%s: Failed to set clock rate %llu %s: %d\n", + __func__, srate, cl->name, rc); + return rc; + } + } + cl->prev = rate; + return rc; +} +#else +static int __set_clk_rate(struct msm_vidc_core *core, struct clock_info *cl, + u64 rate) +{ + u64 srate; + int rc = 0; + + /* not registered */ + if (!core || !cl || !core->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + /* update clock residency stats */ + update_residency_stats(core, cl, rate); + + /* + * This conversion is necessary since we are scaling clock values based on + * the branch clock. However, mmrm driver expects source clock to be registered + * and used for scaling. + * TODO: Remove this scaling if using source clock instead of branch clock. + */ + srate = rate * MSM_VIDC_CLOCK_SOURCE_SCALING_RATIO; + + /* bail early if requested clk rate is not changed */ + if (rate == cl->prev) + return 0; + + d_vpr_p("Scaling clock %s to %llu, prev %llu\n", + cl->name, srate, cl->prev * MSM_VIDC_CLOCK_SOURCE_SCALING_RATIO); + + rc = clk_set_rate(cl->clk, srate); + if (rc) { + d_vpr_e("%s: Failed to set clock rate %llu %s: %d\n", + __func__, srate, cl->name, rc); + return rc; + } + + cl->prev = rate; + + return rc; +} +#endif + +static int __set_clocks_ext(struct msm_vidc_core *core, u64 freq) +{ + int rc = 0; + struct clock_info *cl; + + venus_hfi_for_each_clock(core, cl) { + if (cl->has_scaling) { + rc = __set_clk_rate(core, cl, freq); + if (rc) + return rc; + } + } + + return 0; +} + +const struct msm_vidc_resources_ops *get_res_ops_ext(void) +{ + const struct msm_vidc_resources_ops *res_ops = get_resources_ops(); + static struct msm_vidc_resources_ops res_ops_ext; + + memcpy(&res_ops_ext, res_ops, sizeof(struct msm_vidc_resources_ops)); + res_ops_ext.gdsc_init = __init_regulators; + res_ops_ext.gdsc_on = __enable_regulator; + res_ops_ext.gdsc_off = __disable_regulator; + res_ops_ext.gdsc_hw_ctrl = __hand_off_regulators; + res_ops_ext.gdsc_sw_ctrl = __acquire_regulators; + res_ops_ext.set_clks = __set_clocks_ext; + + return &res_ops_ext; +} diff --git a/msm_video/Kbuild b/msm_video/Kbuild index 5e1a7967e6..d9144613bc 100644 --- a/msm_video/Kbuild +++ b/msm_video/Kbuild @@ -88,6 +88,7 @@ msm_video-objs += $(VIDEO_DRIVER_REL_PATH)/vidc/src/msm_vidc_v4l2.o \ $(VIDEO_DRIVER_REL_PATH)/vidc/src/msm_vidc_power.o \ $(VIDEO_DRIVER_REL_PATH)/vidc/src/msm_vidc_probe.o \ $(VIDEO_DRIVER_REL_PATH)/vidc/src/resources.o \ + $(VIDEO_DRIVER_REL_PATH)/vidc/src/resources_ext.o \ $(VIDEO_DRIVER_REL_PATH)/vidc/src/firmware.o \ $(VIDEO_DRIVER_REL_PATH)/vidc/src/msm_vidc_debug.o \ $(VIDEO_DRIVER_REL_PATH)/vidc/src/msm_vidc_memory.o \ From bf33925fa3f15cae13752cbee0657413b44597b8 Mon Sep 17 00:00:00 2001 From: Ashish Patil Date: Thu, 5 Jan 2023 20:22:03 -0800 Subject: [PATCH 0798/1061] video: driver:remove support for dynamic layers and bitrates - remove support of dynamic layer change for CBR - remove support of layerwise bitrate - any dynamic layer change request ignored without error for CBR_*FR cases - layerwise bitrate is mapped to cumulative bitrate Change-Id: I96c70fabd3c2bf94ce989b9e94620c166892b8e6 Signed-off-by: Ashish Patil --- driver/platform/anorak/src/msm_vidc_anorak.c | 38 ++++---- .../platform/common/inc/msm_vidc_platform.h | 4 +- .../platform/common/src/msm_vidc_platform.c | 90 ++++++------------- driver/platform/kalama/src/kalama.c | 38 ++++---- driver/platform/kalama/src/msm_vidc_kalama.c | 38 ++++---- .../pineapple/src/msm_vidc_pineapple.c | 38 ++++---- driver/platform/pineapple/src/pineapple.c | 50 +++++------ 7 files changed, 128 insertions(+), 168 deletions(-) diff --git a/driver/platform/anorak/src/msm_vidc_anorak.c b/driver/platform/anorak/src/msm_vidc_anorak.c index 0a08c7667a..2b404a0ee1 100644 --- a/driver/platform/anorak/src/msm_vidc_anorak.c +++ b/driver/platform/anorak/src/msm_vidc_anorak.c @@ -1833,12 +1833,12 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_anor msm_vidc_set_req_sync_frame}, {BIT_RATE, ENC, H264, - {PEAK_BITRATE, BITRATE_BOOST}, + {PEAK_BITRATE, BITRATE_BOOST, L0_BR}, msm_vidc_adjust_bitrate, msm_vidc_set_bitrate}, {BIT_RATE, ENC, HEVC, - {PEAK_BITRATE, BITRATE_BOOST}, + {PEAK_BITRATE, BITRATE_BOOST, L0_BR}, msm_vidc_adjust_bitrate, msm_vidc_set_bitrate}, @@ -2047,34 +2047,34 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_anor msm_vidc_set_u32}, {L0_BR, ENC, H264|HEVC, - {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, + {L1_BR}, + msm_vidc_adjust_layer_bitrate, + msm_vidc_set_layer_bitrate}, {L1_BR, ENC, H264|HEVC, - {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, + {L2_BR}, + msm_vidc_adjust_layer_bitrate, + msm_vidc_set_layer_bitrate}, {L2_BR, ENC, H264|HEVC, - {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, + {L3_BR}, + msm_vidc_adjust_layer_bitrate, + msm_vidc_set_layer_bitrate}, {L3_BR, ENC, H264|HEVC, - {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, + {L4_BR}, + msm_vidc_adjust_layer_bitrate, + msm_vidc_set_layer_bitrate}, {L4_BR, ENC, H264|HEVC, - {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, + {L5_BR}, + msm_vidc_adjust_layer_bitrate, + msm_vidc_set_layer_bitrate}, {L5_BR, ENC, H264|HEVC, {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, + msm_vidc_adjust_layer_bitrate, + msm_vidc_set_layer_bitrate}, {ENTROPY_MODE, ENC, H264, {BIT_RATE}, diff --git a/driver/platform/common/inc/msm_vidc_platform.h b/driver/platform/common/inc/msm_vidc_platform.h index 09c43ce226..281f8bd74e 100644 --- a/driver/platform/common/inc/msm_vidc_platform.h +++ b/driver/platform/common/inc/msm_vidc_platform.h @@ -260,7 +260,7 @@ int msm_vidc_packetize_control(struct msm_vidc_inst *inst, void *hfi_val, u32 payload_size, const char *func); int msm_vidc_adjust_bitrate(void *instance, struct v4l2_ctrl *ctrl); -int msm_vidc_adjust_dynamic_layer_bitrate(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_layer_bitrate(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_bitrate_mode(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_entropy_mode(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_profile(void *instance, struct v4l2_ctrl *ctrl); @@ -320,7 +320,7 @@ int msm_vidc_set_gop_size(void *instance, enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_bitrate(void *instance, enum msm_vidc_inst_capability_type cap_id); -int msm_vidc_set_dynamic_layer_bitrate(void *instance, +int msm_vidc_set_layer_bitrate(void *instance, enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_u32(void *instance, enum msm_vidc_inst_capability_type cap_id); diff --git a/driver/platform/common/src/msm_vidc_platform.c b/driver/platform/common/src/msm_vidc_platform.c index 63e2b7d151..bed18cc7cd 100644 --- a/driver/platform/common/src/msm_vidc_platform.c +++ b/driver/platform/common/src/msm_vidc_platform.c @@ -1482,6 +1482,14 @@ int msm_vidc_adjust_layer_count(void *instance, struct v4l2_ctrl *ctrl) if (rc) goto exit; } else { + if (inst->hfi_rc_type == HFI_RC_CBR_CFR || + inst->hfi_rc_type == HFI_RC_CBR_VFR) { + i_vpr_h(inst, + "%s: ignoring dynamic layer count change for CBR mode\n", + __func__); + goto exit; + } + if (inst->hfi_layer_type == HFI_HIER_P_HYBRID_LTR || inst->hfi_layer_type == HFI_HIER_P_SLIDING_WINDOW) { /* dynamic layer count change is only supported for HP */ @@ -1666,7 +1674,7 @@ int msm_vidc_adjust_bitrate(void *instance, struct v4l2_ctrl *ctrl) return rc; } -int msm_vidc_adjust_dynamic_layer_bitrate(void *instance, struct v4l2_ctrl *ctrl) +int msm_vidc_adjust_layer_bitrate(void *instance, struct v4l2_ctrl *ctrl) { int rc = 0; struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; @@ -1689,6 +1697,10 @@ int msm_vidc_adjust_dynamic_layer_bitrate(void *instance, struct v4l2_ctrl *ctrl if (capability->cap[BIT_RATE].flags & CAP_FLAG_CLIENT_SET) return 0; + /* + * This is no-op function because layer bitrates were already adjusted + * in msm_vidc_adjust_bitrate function + */ if (!inst->bufq[OUTPUT_PORT].vb2q->streaming) return 0; @@ -3134,11 +3146,9 @@ int msm_vidc_set_gop_size(void *instance, int msm_vidc_set_bitrate(void *instance, enum msm_vidc_inst_capability_type cap_id) { - int rc = 0, i; + int rc = 0; struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; u32 hfi_value = 0; - s32 rc_type = -1, enh_layer_count = -1; - u32 layer_br_caps[6] = {L0_BR, L1_BR, L2_BR, L3_BR, L4_BR, L5_BR}; if (!inst || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); @@ -3158,60 +3168,22 @@ int msm_vidc_set_bitrate(void *instance, if (inst->bufq[OUTPUT_PORT].vb2q->streaming) return 0; - if (msm_vidc_get_parent_value(inst, BIT_RATE, - BITRATE_MODE, &rc_type, __func__)) - return -EINVAL; - - if (rc_type != HFI_RC_CBR_CFR && rc_type != HFI_RC_CBR_VFR) { - i_vpr_h(inst, "%s: set total bitrate for non CBR rc type\n", - __func__); - goto set_total_bitrate; - } - - if (msm_vidc_get_parent_value(inst, BIT_RATE, - ENH_LAYER_COUNT, &enh_layer_count, __func__)) - return -EINVAL; - - /* - * ENH_LAYER_COUNT cap max is positive only if - * layer encoding is enabled during streamon. - */ - if (inst->capabilities->cap[ENH_LAYER_COUNT].max) { - if (!msm_vidc_check_all_layer_bitrate_set(inst)) - goto set_total_bitrate; - - /* set Layer Bitrate */ - for (i = 0; i <= enh_layer_count; i++) { - if (i >= ARRAY_SIZE(layer_br_caps)) - break; - cap_id = layer_br_caps[i]; - hfi_value = inst->capabilities->cap[cap_id].value; - rc = msm_vidc_packetize_control(inst, cap_id, - HFI_PAYLOAD_U32, &hfi_value, - sizeof(u32), __func__); - if (rc) - return rc; - } - goto exit; - } - set_total_bitrate: hfi_value = inst->capabilities->cap[BIT_RATE].value; rc = msm_vidc_packetize_control(inst, BIT_RATE, HFI_PAYLOAD_U32, &hfi_value, sizeof(u32), __func__); if (rc) return rc; -exit: + return rc; } -int msm_vidc_set_dynamic_layer_bitrate(void *instance, +int msm_vidc_set_layer_bitrate(void *instance, enum msm_vidc_inst_capability_type cap_id) { int rc = 0; struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; u32 hfi_value = 0; - s32 rc_type = -1; if (!inst || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); @@ -3241,27 +3213,15 @@ int msm_vidc_set_dynamic_layer_bitrate(void *instance, return 0; } - if (inst->hfi_rc_type == HFI_RC_CBR_CFR || - rc_type == HFI_RC_CBR_VFR) { - /* set layer bitrate for the client set layer */ - hfi_value = inst->capabilities->cap[cap_id].value; - rc = msm_vidc_packetize_control(inst, cap_id, - HFI_PAYLOAD_U32, &hfi_value, - sizeof(u32), __func__); - if (rc) - return rc; - } else { - /* - * All layer bitartes set for unsupported rc type. - * Hence accept layer bitrates, but set total bitrate prop - * with cumulative bitrate. - */ - hfi_value = inst->capabilities->cap[BIT_RATE].value; - rc = msm_vidc_packetize_control(inst, BIT_RATE, HFI_PAYLOAD_U32, - &hfi_value, sizeof(u32), __func__); - if (rc) - return rc; - } + /* + * Accept layerwise bitrate but set total bitrate which was already + * adjusted based on layer bitrate + */ + hfi_value = inst->capabilities->cap[BIT_RATE].value; + rc = msm_vidc_packetize_control(inst, BIT_RATE, HFI_PAYLOAD_U32, + &hfi_value, sizeof(u32), __func__); + if (rc) + return rc; return rc; } diff --git a/driver/platform/kalama/src/kalama.c b/driver/platform/kalama/src/kalama.c index 7014075780..2b6d04238c 100644 --- a/driver/platform/kalama/src/kalama.c +++ b/driver/platform/kalama/src/kalama.c @@ -1280,12 +1280,12 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kala msm_vidc_set_req_sync_frame}, {BIT_RATE, ENC, H264, - {PEAK_BITRATE}, + {PEAK_BITRATE, L0_BR}, msm_vidc_adjust_bitrate, msm_vidc_set_bitrate}, {BIT_RATE, ENC, HEVC, - {PEAK_BITRATE}, + {PEAK_BITRATE, L0_BR}, msm_vidc_adjust_bitrate, msm_vidc_set_bitrate}, @@ -1449,34 +1449,34 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kala msm_vidc_set_layer_count_and_type}, {L0_BR, ENC, H264|HEVC, - {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, + {L1_BR}, + msm_vidc_adjust_layer_bitrate, + msm_vidc_set_layer_bitrate}, {L1_BR, ENC, H264|HEVC, - {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, + {L2_BR}, + msm_vidc_adjust_layer_bitrate, + msm_vidc_set_layer_bitrate}, {L2_BR, ENC, H264|HEVC, - {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, + {L3_BR}, + msm_vidc_adjust_layer_bitrate, + msm_vidc_set_layer_bitrate}, {L3_BR, ENC, H264|HEVC, - {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, + {L4_BR}, + msm_vidc_adjust_layer_bitrate, + msm_vidc_set_layer_bitrate}, {L4_BR, ENC, H264|HEVC, - {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, + {L5_BR}, + msm_vidc_adjust_layer_bitrate, + msm_vidc_set_layer_bitrate}, {L5_BR, ENC, H264|HEVC, {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, + msm_vidc_adjust_layer_bitrate, + msm_vidc_set_layer_bitrate}, {ENTROPY_MODE, ENC, H264, {BIT_RATE}, diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index 0c3ded4253..098ada752b 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -2020,12 +2020,12 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kala msm_vidc_set_req_sync_frame}, {BIT_RATE, ENC, H264, - {PEAK_BITRATE, BITRATE_BOOST}, + {PEAK_BITRATE, BITRATE_BOOST, L0_BR}, msm_vidc_adjust_bitrate, msm_vidc_set_bitrate}, {BIT_RATE, ENC, HEVC, - {PEAK_BITRATE, BITRATE_BOOST}, + {PEAK_BITRATE, BITRATE_BOOST, L0_BR}, msm_vidc_adjust_bitrate, msm_vidc_set_bitrate}, @@ -2234,34 +2234,34 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kala msm_vidc_set_u32}, {L0_BR, ENC, H264|HEVC, - {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, + {L1_BR}, + msm_vidc_adjust_layer_bitrate, + msm_vidc_set_layer_bitrate}, {L1_BR, ENC, H264|HEVC, - {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, + {L2_BR}, + msm_vidc_adjust_layer_bitrate, + msm_vidc_set_layer_bitrate}, {L2_BR, ENC, H264|HEVC, - {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, + {L3_BR}, + msm_vidc_adjust_layer_bitrate, + msm_vidc_set_layer_bitrate}, {L3_BR, ENC, H264|HEVC, - {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, + {L4_BR}, + msm_vidc_adjust_layer_bitrate, + msm_vidc_set_layer_bitrate}, {L4_BR, ENC, H264|HEVC, - {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, + {L5_BR}, + msm_vidc_adjust_layer_bitrate, + msm_vidc_set_layer_bitrate}, {L5_BR, ENC, H264|HEVC, {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, + msm_vidc_adjust_layer_bitrate, + msm_vidc_set_layer_bitrate}, {ENTROPY_MODE, ENC, H264, {BIT_RATE}, diff --git a/driver/platform/pineapple/src/msm_vidc_pineapple.c b/driver/platform/pineapple/src/msm_vidc_pineapple.c index d49d5cf0a8..e69af20ab3 100644 --- a/driver/platform/pineapple/src/msm_vidc_pineapple.c +++ b/driver/platform/pineapple/src/msm_vidc_pineapple.c @@ -2038,12 +2038,12 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine msm_vidc_set_req_sync_frame}, {BIT_RATE, ENC, H264, - {PEAK_BITRATE, BITRATE_BOOST}, + {PEAK_BITRATE, BITRATE_BOOST, L0_BR}, msm_vidc_adjust_bitrate, msm_vidc_set_bitrate}, {BIT_RATE, ENC, HEVC, - {PEAK_BITRATE, BITRATE_BOOST}, + {PEAK_BITRATE, BITRATE_BOOST, L0_BR}, msm_vidc_adjust_bitrate, msm_vidc_set_bitrate}, @@ -2262,34 +2262,34 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine msm_vidc_set_u32}, {L0_BR, ENC, H264|HEVC, - {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, + {L1_BR}, + msm_vidc_adjust_layer_bitrate, + msm_vidc_set_layer_bitrate}, {L1_BR, ENC, H264|HEVC, - {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, + {L2_BR}, + msm_vidc_adjust_layer_bitrate, + msm_vidc_set_layer_bitrate}, {L2_BR, ENC, H264|HEVC, - {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, + {L3_BR}, + msm_vidc_adjust_layer_bitrate, + msm_vidc_set_layer_bitrate}, {L3_BR, ENC, H264|HEVC, - {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, + {L4_BR}, + msm_vidc_adjust_layer_bitrate, + msm_vidc_set_layer_bitrate}, {L4_BR, ENC, H264|HEVC, - {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, + {L5_BR}, + msm_vidc_adjust_layer_bitrate, + msm_vidc_set_layer_bitrate}, {L5_BR, ENC, H264|HEVC, {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, + msm_vidc_adjust_layer_bitrate, + msm_vidc_set_layer_bitrate}, {ENTROPY_MODE, ENC, H264, {BIT_RATE}, diff --git a/driver/platform/pineapple/src/pineapple.c b/driver/platform/pineapple/src/pineapple.c index fcc1ef7c11..cf99e581ed 100644 --- a/driver/platform/pineapple/src/pineapple.c +++ b/driver/platform/pineapple/src/pineapple.c @@ -1296,13 +1296,13 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine {BIT_RATE, ENC, H264, {ENH_LAYER_COUNT, BITRATE_MODE, ENTROPY_MODE, ALL_INTRA, LOWLATENCY_MODE}, - {PEAK_BITRATE}, + {PEAK_BITRATE, L0_BR}, msm_vidc_adjust_bitrate, msm_vidc_set_bitrate}, {BIT_RATE, ENC, HEVC, {ENH_LAYER_COUNT, BITRATE_MODE, ALL_INTRA, LOWLATENCY_MODE}, - {PEAK_BITRATE}, + {PEAK_BITRATE, L0_BR}, msm_vidc_adjust_bitrate, msm_vidc_set_bitrate}, @@ -1497,40 +1497,40 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine msm_vidc_set_layer_count_and_type}, {L0_BR, ENC, H264|HEVC, - {0}, - {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, + {BIT_RATE}, + {L1_BR}, + msm_vidc_adjust_layer_bitrate, + msm_vidc_set_layer_bitrate}, {L1_BR, ENC, H264|HEVC, - {0}, - {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, + {L0_BR}, + {L2_BR}, + msm_vidc_adjust_layer_bitrate, + msm_vidc_set_layer_bitrate}, {L2_BR, ENC, H264|HEVC, - {0}, - {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, + {L1_BR}, + {L3_BR}, + msm_vidc_adjust_layer_bitrate, + msm_vidc_set_layer_bitrate}, {L3_BR, ENC, H264|HEVC, - {0}, - {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, + {L2_BR}, + {L4_BR}, + msm_vidc_adjust_layer_bitrate, + msm_vidc_set_layer_bitrate}, {L4_BR, ENC, H264|HEVC, - {0}, - {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, + {L3_BR}, + {L5_BR}, + msm_vidc_adjust_layer_bitrate, + msm_vidc_set_layer_bitrate}, {L5_BR, ENC, H264|HEVC, + {L4_BR}, {0}, - {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, + msm_vidc_adjust_layer_bitrate, + msm_vidc_set_layer_bitrate}, {ENTROPY_MODE, ENC, H264, {PROFILE}, From 68df0645ec97fbb0289b86a17b64cc96c08f8dee Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Thu, 12 Jan 2023 10:34:52 -0800 Subject: [PATCH 0799/1061] video: driver: add support to send aon region via HFI_MMAP_ADDR - add support to intialise device region by reading data from platform to resources. - add support for iommu_map and iommu_unmap apis. - allocate a 4K page and send this address through HFI_MMAP_ADDR register. - map AON region, send virtual address and size as payload. Change-Id: I5aa26593309a220c5de62836e432c1bd5a63ba1d Signed-off-by: Darshana Patil --- .../platform/common/inc/msm_vidc_platform.h | 10 +++ .../pineapple/src/msm_vidc_pineapple.c | 7 ++ driver/variant/iris33/src/msm_vidc_iris33.c | 75 ++++++++++++++++--- driver/vidc/inc/msm_vidc_core.h | 2 + driver/vidc/inc/msm_vidc_internal.h | 7 ++ driver/vidc/inc/msm_vidc_memory.h | 6 +- driver/vidc/inc/resources.h | 18 +++++ driver/vidc/inc/venus_hfi.h | 2 + driver/vidc/inc/venus_hfi_queue.h | 7 +- driver/vidc/src/msm_vidc_memory.c | 60 +++++++++++++++ driver/vidc/src/resources.c | 54 +++++++++++++ driver/vidc/src/venus_hfi.c | 22 ++++++ driver/vidc/src/venus_hfi_queue.c | 65 ++++++++++++++++ 13 files changed, 323 insertions(+), 12 deletions(-) diff --git a/driver/platform/common/inc/msm_vidc_platform.h b/driver/platform/common/inc/msm_vidc_platform.h index 09c43ce226..98c8e05084 100644 --- a/driver/platform/common/inc/msm_vidc_platform.h +++ b/driver/platform/common/inc/msm_vidc_platform.h @@ -89,6 +89,14 @@ struct reg_preset_table { u32 mask; }; +struct device_region_table { + const char *name; + phys_addr_t phy_addr; + u32 size; + u32 dev_addr; + u32 region; +}; + struct msm_vidc_ubwc_config_data { u32 max_channels; u32 mal_length; @@ -199,6 +207,8 @@ struct msm_vidc_platform_data { unsigned int freq_tbl_size; const struct reg_preset_table *reg_prst_tbl; unsigned int reg_prst_tbl_size; + const struct device_region_table *dev_reg_tbl; + unsigned int dev_reg_tbl_size; struct msm_vidc_ubwc_config_data *ubwc_config; const char *fwname; u32 pas_id; diff --git a/driver/platform/pineapple/src/msm_vidc_pineapple.c b/driver/platform/pineapple/src/msm_vidc_pineapple.c index d49d5cf0a8..192dbfcb26 100644 --- a/driver/platform/pineapple/src/msm_vidc_pineapple.c +++ b/driver/platform/pineapple/src/msm_vidc_pineapple.c @@ -2583,6 +2583,11 @@ static const struct reg_preset_table pineapple_reg_preset_table[] = { { 0xB0088, 0x0, 0x11 }, }; +/* name, phys_addr, size, device_addr, device region type */ +static const struct device_region_table pineapple_device_region_table[] = { + { "aon-registers", 0x0AAE0000, 0x1000, 0xFFAE0000, MSM_VIDC_AON_REGISTERS }, +}; + static const struct msm_vidc_platform_data pineapple_data = { /* resources dependent on other module */ .bw_tbl = pineapple_bw_table, @@ -2605,6 +2610,8 @@ static const struct msm_vidc_platform_data pineapple_data = { .freq_tbl_size = ARRAY_SIZE(pineapple_freq_table), .reg_prst_tbl = pineapple_reg_preset_table, .reg_prst_tbl_size = ARRAY_SIZE(pineapple_reg_preset_table), + .dev_reg_tbl = pineapple_device_region_table, + .dev_reg_tbl_size = ARRAY_SIZE(pineapple_device_region_table), .fwname = "vpu33_4v", .pas_id = 9, .supports_mmrm = 1, diff --git a/driver/variant/iris33/src/msm_vidc_iris33.c b/driver/variant/iris33/src/msm_vidc_iris33.c index 17173eed83..42ba624fed 100644 --- a/driver/variant/iris33/src/msm_vidc_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_iris33.c @@ -143,9 +143,48 @@ static int __interrupt_init_iris33(struct msm_vidc_core *vidc_core) return 0; } -static int __setup_ucregion_memory_map_iris33(struct msm_vidc_core *vidc_core) +static int __get_device_region_info(struct msm_vidc_core *core, + u32 *min_dev_addr, u32 *dev_reg_size) +{ + struct device_region_set *dev_set; + u32 min_addr, max_addr, count = 0; + int rc = 0; + + if (!core || !core->resource) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + dev_set = &core->resource->device_region_set; + + if (!dev_set->count) { + d_vpr_h("%s: device region not available\n", __func__); + return 0; + } + + min_addr = 0xFFFFFFFF; + max_addr = 0x0; + for (count = 0; count < dev_set->count; count++) { + if (dev_set->device_region_tbl[count].dev_addr > max_addr) + max_addr = dev_set->device_region_tbl[count].dev_addr + + dev_set->device_region_tbl[count].size; + if (dev_set->device_region_tbl[count].dev_addr < min_addr) + min_addr = dev_set->device_region_tbl[count].dev_addr; + } + if (min_addr == 0xFFFFFFFF || max_addr == 0x0) { + d_vpr_e("%s: invalid device region\n", __func__); + return -EINVAL; + } + + *min_dev_addr = min_addr; + *dev_reg_size = max_addr - min_addr; + + return rc; +} + +static int __program_bootup_registers_iris33(struct msm_vidc_core *vidc_core) { struct msm_vidc_core *core = vidc_core; + u32 min_dev_reg_addr = 0, dev_reg_size = 0; u32 value; int rc = 0; @@ -173,16 +212,34 @@ static int __setup_ucregion_memory_map_iris33(struct msm_vidc_core *vidc_core) if (rc) return rc; - /* update queues vaddr for debug purpose */ - value = (u32)((u64)core->iface_q_table.align_virtual_addr); - rc = __write_register(core, HFI_DEVICE_REGION_ADDR_IRIS33, value); + if (core->mmap_buf.align_device_addr) { + value = (u32)core->mmap_buf.align_device_addr; + rc = __write_register(core, HFI_MMAP_ADDR_IRIS33, value); + if (rc) + return rc; + } else { + d_vpr_e("%s: skip mmap buffer programming\n", __func__); + /* ignore the error for now for backward compatibility */ + /* return -EINVAL; */ + } + + rc = __get_device_region_info(core, &min_dev_reg_addr, &dev_reg_size); if (rc) return rc; - value = (u32)((u64)core->iface_q_table.align_virtual_addr >> 32); - rc = __write_register(core, HFI_DEVICE_REGION_SIZE_IRIS33, value); - if (rc) - return rc; + if (min_dev_reg_addr && dev_reg_size) { + rc = __write_register(core, HFI_DEVICE_REGION_ADDR_IRIS33, min_dev_reg_addr); + if (rc) + return rc; + + rc = __write_register(core, HFI_DEVICE_REGION_SIZE_IRIS33, dev_reg_size); + if (rc) + return rc; + } else { + d_vpr_e("%s: skip device region programming\n", __func__); + /* ignore the error for now for backward compatibility */ + /* return -EINVAL; */ + } if (core->sfr.align_device_addr) { value = (u32)core->sfr.align_device_addr + VIDEO_ARCH_LX; @@ -878,7 +935,7 @@ static int __boot_firmware_iris33(struct msm_vidc_core *vidc_core) return 0; } - rc = __setup_ucregion_memory_map_iris33(core); + rc = __program_bootup_registers_iris33(core); if (rc) return rc; diff --git a/driver/vidc/inc/msm_vidc_core.h b/driver/vidc/inc/msm_vidc_core.h index ea9bc192f8..2125e67f1a 100644 --- a/driver/vidc/inc/msm_vidc_core.h +++ b/driver/vidc/inc/msm_vidc_core.h @@ -84,6 +84,8 @@ struct msm_vidc_core { struct msm_vidc_inst_capability *inst_caps; struct msm_vidc_mem_addr sfr; struct msm_vidc_mem_addr iface_q_table; + struct msm_vidc_mem_addr mmap_buf; + struct msm_vidc_mem_addr aon; struct msm_vidc_iface_q_info iface_queues[VIDC_IFACEQ_NUMQ]; struct delayed_work pm_work; struct workqueue_struct *pm_workq; diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 1fe57fb1de..7db0cf7cdd 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -456,6 +456,12 @@ enum msm_vidc_buffer_region { MSM_VIDC_REGION_MAX, }; +enum msm_vidc_device_region { + MSM_VIDC_DEVICE_REGION_NONE = 0, + MSM_VIDC_AON_REGISTERS, + MSM_VIDC_DEVICE_REGION_MAX, +}; + enum msm_vidc_port_type { INPUT_PORT = 0, OUTPUT_PORT, @@ -870,6 +876,7 @@ struct msm_vidc_mem { u32 refcount; struct sg_table *table; struct dma_buf_attachment *attach; + phys_addr_t phys_addr; }; struct msm_vidc_mem_list { diff --git a/driver/vidc/inc/msm_vidc_memory.h b/driver/vidc/inc/msm_vidc_memory.h index 38e35f67c4..5b3e0e69ce 100644 --- a/driver/vidc/inc/msm_vidc_memory.h +++ b/driver/vidc/inc/msm_vidc_memory.h @@ -78,8 +78,12 @@ struct msm_vidc_memory_ops { struct msm_vidc_mem *mem); u32 (*buffer_region)(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type buffer_type); + int (*iommu_map)(struct msm_vidc_core *core, + struct msm_vidc_mem *mem); + int (*iommu_unmap)(struct msm_vidc_core *core, + struct msm_vidc_mem *mem); }; struct msm_vidc_memory_ops *get_mem_ops(void); -#endif // _MSM_VIDC_MEMORY_H_ \ No newline at end of file +#endif // _MSM_VIDC_MEMORY_H_ diff --git a/driver/vidc/inc/resources.h b/driver/vidc/inc/resources.h index a48348753f..1a17dfd179 100644 --- a/driver/vidc/inc/resources.h +++ b/driver/vidc/inc/resources.h @@ -95,6 +95,10 @@ struct msm_vidc_core; #define venus_hfi_for_each_context_bank_reverse(__device, __sinfo) \ venus_hfi_for_each_thing_reverse(__device, __sinfo, context_bank) +/* Device region set helper */ +#define venus_hfi_for_each_device_region(__device, __sinfo) \ + venus_hfi_for_each_thing(__device, __sinfo, device_region) + struct bus_info { struct icc_path *icc; const char *name; @@ -196,6 +200,19 @@ struct freq_set { u32 count; }; +struct device_region_info { + const char *name; + phys_addr_t phy_addr; + u32 size; + u32 dev_addr; + u32 region; +}; + +struct device_region_set { + struct device_region_info *device_region_tbl; + u32 count; +}; + struct msm_vidc_resource { void *core; u8 __iomem *register_base_addr; @@ -207,6 +224,7 @@ struct msm_vidc_resource { struct subcache_set subcache_set; struct context_bank_set context_bank_set; struct freq_set freq_set; + struct device_region_set device_region_set; int fw_cookie; }; diff --git a/driver/vidc/inc/venus_hfi.h b/driver/vidc/inc/venus_hfi.h index 2ca009e992..652eb12bfa 100644 --- a/driver/vidc/inc/venus_hfi.h +++ b/driver/vidc/inc/venus_hfi.h @@ -72,5 +72,7 @@ void venus_hfi_pm_work_handler(struct work_struct *work); irqreturn_t venus_hfi_isr(int irq, void *data); irqreturn_t venus_hfi_isr_handler(int irq, void *data); int __prepare_pc(struct msm_vidc_core *core); +struct device_region_info *venus_hfi_get_device_region_info( + struct msm_vidc_core *core, enum msm_vidc_device_region region); #endif // _VENUS_HFI_H_ diff --git a/driver/vidc/inc/venus_hfi_queue.h b/driver/vidc/inc/venus_hfi_queue.h index 7a4e97a589..f4c188ef8d 100644 --- a/driver/vidc/inc/venus_hfi_queue.h +++ b/driver/vidc/inc/venus_hfi_queue.h @@ -68,16 +68,19 @@ struct hfi_queue_header { #define QDSS_SIZE 4096 #define SFR_SIZE 4096 +#define MMAP_BUF_SIZE 4096 #define QUEUE_SIZE (VIDC_IFACEQ_TABLE_SIZE + \ (VIDC_IFACEQ_QUEUE_SIZE * VIDC_IFACEQ_NUMQ)) #define ALIGNED_QDSS_SIZE ALIGN(QDSS_SIZE, SZ_4K) #define ALIGNED_SFR_SIZE ALIGN(SFR_SIZE, SZ_4K) +#define ALIGNED_MMAP_BUF_SIZE ALIGN(MMAP_BUF_SIZE, SZ_4K) #define ALIGNED_QUEUE_SIZE ALIGN(QUEUE_SIZE, SZ_4K) #define SHARED_QSIZE ALIGN(ALIGNED_SFR_SIZE + ALIGNED_QUEUE_SIZE + \ - ALIGNED_QDSS_SIZE, SZ_1M) -#define TOTAL_QSIZE (SHARED_QSIZE - ALIGNED_SFR_SIZE - ALIGNED_QDSS_SIZE) + ALIGNED_QDSS_SIZE + ALIGNED_MMAP_BUF_SIZE, SZ_1M) +#define TOTAL_QSIZE (SHARED_QSIZE - ALIGNED_SFR_SIZE - ALIGNED_QDSS_SIZE - \ + ALIGNED_MMAP_BUF_SIZE) struct msm_vidc_core; diff --git a/driver/vidc/src/msm_vidc_memory.c b/driver/vidc/src/msm_vidc_memory.c index e7dff4681e..4faee82eb9 100644 --- a/driver/vidc/src/msm_vidc_memory.c +++ b/driver/vidc/src/msm_vidc_memory.c @@ -482,6 +482,64 @@ static u32 msm_vidc_buffer_region(struct msm_vidc_inst *inst, return MSM_VIDC_NON_SECURE; } +static int msm_vidc_iommu_map(struct msm_vidc_core *core, struct msm_vidc_mem *mem) +{ + int rc = 0; + struct context_bank_info *cb = NULL; + + if (!core || !mem) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + cb = msm_vidc_get_context_bank_for_region(core, mem->region); + if (!cb) { + d_vpr_e("%s: Failed to get context bank device\n", __func__); + return -EIO; + } + + rc = iommu_map(cb->domain, mem->device_addr, mem->phys_addr, + mem->size, IOMMU_READ | IOMMU_WRITE | IOMMU_MMIO); + if (rc) { + d_vpr_e("iommu_map failed for device_addr 0x%x, size %d, rc:%d\n", + mem->device_addr, mem->size, rc); + return rc; + } + + d_vpr_h("%s: phys_addr %#x size %#x device_addr %#x, mem_region %d\n", + __func__, mem->phys_addr, mem->size, mem->device_addr, mem->region); + + return rc; +} + +static int msm_vidc_iommu_unmap(struct msm_vidc_core *core, struct msm_vidc_mem *mem) +{ + int rc = 0; + struct context_bank_info *cb = NULL; + + if (!core || !mem) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + cb = msm_vidc_get_context_bank_for_region(core, mem->region); + if (!cb) { + d_vpr_e("%s: Failed to get context bank device\n", + __func__); + return -EIO; + } + + d_vpr_h("%s: phys_addr %#x size %#x device_addr %#x, mem_region %d\n", + __func__, mem->phys_addr, mem->size, mem->device_addr, mem->region); + + iommu_unmap(cb->domain, mem->device_addr, mem->size); + mem->device_addr = 0x0; + mem->phys_addr = 0x0; + mem->size = 0; + + return rc; +} + static struct msm_vidc_memory_ops msm_mem_ops = { .dma_buf_get = msm_vidc_dma_buf_get, .dma_buf_put = msm_vidc_dma_buf_put, @@ -493,6 +551,8 @@ static struct msm_vidc_memory_ops msm_mem_ops = { .memory_alloc_map = msm_vidc_memory_alloc_map, .memory_unmap_free = msm_vidc_memory_unmap_free, .buffer_region = msm_vidc_buffer_region, + .iommu_map = msm_vidc_iommu_map, + .iommu_unmap = msm_vidc_iommu_unmap, }; struct msm_vidc_memory_ops *get_mem_ops(void) diff --git a/driver/vidc/src/resources.c b/driver/vidc/src/resources.c index b872b7520a..f0f32568f1 100644 --- a/driver/vidc/src/resources.c +++ b/driver/vidc/src/resources.c @@ -637,6 +637,56 @@ static int __init_context_banks(struct msm_vidc_core *core) return rc; } +static int __init_device_region(struct msm_vidc_core *core) +{ + const struct device_region_table *dev_reg_tbl; + struct device_region_set *dev_set; + struct device_region_info *dev_reg_info; + u32 dev_reg_count = 0, cnt = 0; + int rc = 0; + + if (!core || !core->resource || !core->platform) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + dev_set = &core->resource->device_region_set; + + dev_reg_tbl = core->platform->data.dev_reg_tbl; + dev_reg_count = core->platform->data.dev_reg_tbl_size; + + if (!dev_reg_tbl || !dev_reg_count) { + d_vpr_h("%s: device regions not available\n", __func__); + return 0; + } + + /* allocate device region table */ + dev_set->device_region_tbl = devm_kzalloc(&core->pdev->dev, + sizeof(*dev_set->device_region_tbl) * dev_reg_count, GFP_KERNEL); + if (!dev_set->device_region_tbl) { + d_vpr_e("%s: failed to alloc memory for device region table\n", __func__); + return -ENOMEM; + } + dev_set->count = dev_reg_count; + + /* populate device region fields from platform data */ + for (cnt = 0; cnt < dev_set->count; cnt++) { + dev_set->device_region_tbl[cnt].name = dev_reg_tbl[cnt].name; + dev_set->device_region_tbl[cnt].phy_addr = dev_reg_tbl[cnt].phy_addr; + dev_set->device_region_tbl[cnt].size = dev_reg_tbl[cnt].size; + dev_set->device_region_tbl[cnt].dev_addr = dev_reg_tbl[cnt].dev_addr; + dev_set->device_region_tbl[cnt].region = dev_reg_tbl[cnt].region; + } + + /* print device region fields */ + venus_hfi_for_each_device_region(core, dev_reg_info) { + d_vpr_h("%s: name %s phy_addr %#x size %#x dev_addr %#x dev_region %d\n", + __func__, dev_reg_info->name, dev_reg_info->phy_addr, dev_reg_info->size, + dev_reg_info->dev_addr, dev_reg_info->region); + } + + return rc; +} + #ifdef CONFIG_MSM_MMRM static int __register_mmrm(struct msm_vidc_core *core) { @@ -1501,6 +1551,10 @@ static int __init_resources(struct msm_vidc_core *core) if (rc) return rc; + rc = __init_device_region(core); + if (rc) + return rc; + rc = __register_mmrm(core); if (rc) return rc; diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index 5d65b89d8f..8454d4e8f3 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -2151,3 +2151,25 @@ exit: return rc; } + +struct device_region_info *venus_hfi_get_device_region_info( + struct msm_vidc_core *core, enum msm_vidc_device_region region) +{ + struct device_region_info *dev_reg = NULL, *match = NULL; + + if (!region || region >= MSM_VIDC_DEVICE_REGION_MAX) { + d_vpr_e("%s: invalid region %#x\n", __func__, region); + return NULL; + } + + venus_hfi_for_each_device_region(core, dev_reg) { + if (dev_reg->region == region) { + match = dev_reg; + break; + } + } + if (!match) + d_vpr_e("%s: device region %d not found\n", __func__, region); + + return match; +} diff --git a/driver/vidc/src/venus_hfi_queue.c b/driver/vidc/src/venus_hfi_queue.c index dcad7e3fe7..4597f49e81 100644 --- a/driver/vidc/src/venus_hfi_queue.c +++ b/driver/vidc/src/venus_hfi_queue.c @@ -9,6 +9,7 @@ #include "msm_vidc_debug.h" #include "msm_vidc_memory.h" #include "msm_vidc_platform.h" +#include "venus_hfi.h" static int __strict_check(struct msm_vidc_core *core, const char *function) { @@ -426,6 +427,8 @@ void venus_hfi_queue_deinit(struct msm_vidc_core *core) call_mem_op(core, memory_unmap_free, core, &core->iface_q_table.mem); call_mem_op(core, memory_unmap_free, core, &core->sfr.mem); + call_mem_op(core, iommu_unmap, core, &core->aon.mem); + call_mem_op(core, memory_unmap_free, core, &core->mmap_buf.mem); for (i = 0; i < VIDC_IFACEQ_NUMQ; i++) { core->iface_queues[i].q_hdr = NULL; @@ -438,6 +441,12 @@ void venus_hfi_queue_deinit(struct msm_vidc_core *core) core->sfr.align_virtual_addr = NULL; core->sfr.align_device_addr = 0; + + core->aon.align_virtual_addr = NULL; + core->aon.align_device_addr = 0; + + core->mmap_buf.align_virtual_addr = NULL; + core->mmap_buf.align_device_addr = 0; } int venus_hfi_reset_queue_header(struct msm_vidc_core *core) @@ -485,8 +494,10 @@ int venus_hfi_queue_init(struct msm_vidc_core *core) struct hfi_queue_table_header *q_tbl_hdr; struct hfi_queue_header *q_hdr; struct msm_vidc_iface_q_info *iface_q; + struct device_region_info *dev_reg; struct msm_vidc_mem mem; int offset = 0; + u32 *payload; u32 i; d_vpr_h("%s()\n", __func__); @@ -577,6 +588,60 @@ int venus_hfi_queue_init(struct msm_vidc_core *core) /* write sfr buffer size in first word */ *((u32 *)core->sfr.align_virtual_addr) = core->sfr.mem_size; + /* map aon registers */ + memset(&mem, 0, sizeof(mem)); + dev_reg = venus_hfi_get_device_region_info(core, MSM_VIDC_AON_REGISTERS); + if (!dev_reg) { + d_vpr_h("%s: aon device region not available\n", __func__); + goto skip_mmap_buffer; + } + mem.region = MSM_VIDC_NON_SECURE; + mem.phys_addr = dev_reg->phy_addr; + mem.size = dev_reg->size; + mem.device_addr = dev_reg->dev_addr; + rc = call_mem_op(core, iommu_map, core, &mem); + if (rc) { + d_vpr_e("%s: aon map failed\n", __func__); + goto fail_alloc_queue; + } + core->aon.align_virtual_addr = mem.kvaddr; + core->aon.align_device_addr = mem.device_addr; + core->aon.mem = mem; + + /* allocate 4k buffer for HFI_MMAP_ADDR */ + memset(&mem, 0, sizeof(mem)); + mem.type = MSM_VIDC_BUF_QUEUE; + mem.region = MSM_VIDC_NON_SECURE; + mem.size = ALIGNED_MMAP_BUF_SIZE; + mem.secure = false; + mem.map_kernel = true; + rc = call_mem_op(core, memory_alloc_map, core, &mem); + if (rc) { + d_vpr_e("%s: mmap buffer alloc and map failed\n", __func__); + goto fail_alloc_queue; + } + core->mmap_buf.align_virtual_addr = mem.kvaddr; + core->mmap_buf.align_device_addr = mem.device_addr; + core->mmap_buf.mem_size = ALIGNED_MMAP_BUF_SIZE; + core->mmap_buf.mem = mem; + /* initialize mmap buffer */ + /* payload of HFI_MMAP_ADDR: + * payload[0] : version + * ___________________ payloads in version 1 ________________ + * payload[1-2] : address and size of SFR + * payload[3-4] : address and size of IPCC lite memory + * payload[5-6] : address and size of AOSS global timers + * payload[7-8] : address and size of HW mutex registers + * payload[9-10] : address and size of IPCC registers + * payload[11-12] : address and size of AON registers + */ + memset(core->mmap_buf.align_virtual_addr, 0, ALIGNED_MMAP_BUF_SIZE); + payload = ((u32 *)core->mmap_buf.align_virtual_addr); + payload[0] = 1; + payload[11] = core->aon.mem.device_addr; + payload[12] = core->aon.mem.size; + +skip_mmap_buffer: return 0; fail_alloc_queue: return -ENOMEM; From a8dce0e07ea67ca17118434bd987f682f462a38c Mon Sep 17 00:00:00 2001 From: Snehal Bhamare Date: Tue, 24 Jan 2023 10:25:39 -0800 Subject: [PATCH 0800/1061] video: driver: fix array out of bounds exception Check array bounds before writing to array to resolve array bounds exceeded issue. Change-Id: If3bf593b7126b2e4d567d35dc08e4598e80900fe Signed-off-by: Snehal Bhamare --- driver/vidc/src/msm_vdec.c | 24 ++++++++++++++++++++++++ driver/vidc/src/msm_venc.c | 24 ++++++++++++++++++++++++ 2 files changed, 48 insertions(+) diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 5b2516d38c..a4905891f7 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -1012,6 +1012,12 @@ static int msm_vdec_subscribe_metadata(struct msm_vidc_inst *inst, if (is_meta_rx_inp_enabled(inst, i) && msm_vidc_allow_metadata_subscription( inst, i, port)) { + if (count + 1 >= sizeof(payload) / sizeof(u32)) { + i_vpr_e(inst, + "%s: input metadatas (%d) exceeded limit (%d)\n", + __func__, count, sizeof(payload) / sizeof(u32)); + return -EINVAL; + } payload[count + 1] = capability->cap[i].hfi_id; count++; } @@ -1021,6 +1027,12 @@ static int msm_vdec_subscribe_metadata(struct msm_vidc_inst *inst, if (is_meta_rx_out_enabled(inst, i) && msm_vidc_allow_metadata_subscription( inst, i, port)) { + if (count + 1 >= sizeof(payload) / sizeof(u32)) { + i_vpr_e(inst, + "%s: input metadatas (%d) exceeded limit (%d)\n", + __func__, count, sizeof(payload) / sizeof(u32)); + return -EINVAL; + } payload[count + 1] = capability->cap[i].hfi_id; count++; } @@ -1062,6 +1074,12 @@ static int msm_vdec_set_delivery_mode_metadata(struct msm_vidc_inst *inst, if (port == INPUT_PORT) { for (i = INST_CAP_NONE + 1; i < INST_CAP_MAX; i++) { if (is_meta_tx_inp_enabled(inst, i)) { + if (count + 1 >= sizeof(payload) / sizeof(u32)) { + i_vpr_e(inst, + "%s: input metadatas (%d) exceeded limit (%d)\n", + __func__, count, sizeof(payload) / sizeof(u32)); + return -EINVAL; + } payload[count + 1] = capability->cap[i].hfi_id; count++; } @@ -1071,6 +1089,12 @@ static int msm_vdec_set_delivery_mode_metadata(struct msm_vidc_inst *inst, if (is_meta_tx_out_enabled(inst, i) && msm_vidc_allow_metadata_delivery( inst, i, port)) { + if (count + 1 >= sizeof(payload) / sizeof(u32)) { + i_vpr_e(inst, + "%s: input metadatas (%d) exceeded limit (%d)\n", + __func__, count, sizeof(payload) / sizeof(u32)); + return -EINVAL; + } payload[count + 1] = capability->cap[i].hfi_id; count++; } diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index 690d9bb109..ccbec6ae24 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -709,6 +709,12 @@ static int msm_venc_metadata_delivery(struct msm_vidc_inst *inst, if (port == INPUT_PORT) { for (i = INST_CAP_NONE + 1; i < INST_CAP_MAX; i++) { if (is_meta_tx_inp_enabled(inst, i)) { + if (count + 1 >= sizeof(payload) / sizeof(u32)) { + i_vpr_e(inst, + "%s: input metadatas (%d) exceeded limit (%d)\n", + __func__, count, sizeof(payload) / sizeof(u32)); + return -EINVAL; + } payload[count + 1] = capability->cap[i].hfi_id; count++; } @@ -716,6 +722,12 @@ static int msm_venc_metadata_delivery(struct msm_vidc_inst *inst, } else if (port == OUTPUT_PORT) { for (i = INST_CAP_NONE + 1; i < INST_CAP_MAX; i++) { if (is_meta_tx_out_enabled(inst, i)) { + if (count + 1 >= sizeof(payload) / sizeof(u32)) { + i_vpr_e(inst, + "%s: input metadatas (%d) exceeded limit (%d)\n", + __func__, count, sizeof(payload) / sizeof(u32)); + return -EINVAL; + } payload[count + 1] = capability->cap[i].hfi_id; count++; } @@ -757,6 +769,12 @@ static int msm_venc_metadata_subscription(struct msm_vidc_inst *inst, if (port == INPUT_PORT) { for (i = INST_CAP_NONE + 1; i < INST_CAP_MAX; i++) { if (is_meta_rx_inp_enabled(inst, i)) { + if (count + 1 >= sizeof(payload) / sizeof(u32)) { + i_vpr_e(inst, + "%s: input metadatas (%d) exceeded limit (%d)\n", + __func__, count, sizeof(payload) / sizeof(u32)); + return -EINVAL; + } payload[count + 1] = capability->cap[i].hfi_id; count++; } @@ -764,6 +782,12 @@ static int msm_venc_metadata_subscription(struct msm_vidc_inst *inst, } else if (port == OUTPUT_PORT) { for (i = INST_CAP_NONE + 1; i < INST_CAP_MAX; i++) { if (is_meta_rx_out_enabled(inst, i)) { + if (count + 1 >= sizeof(payload) / sizeof(u32)) { + i_vpr_e(inst, + "%s: input metadatas (%d) exceeded limit (%d)\n", + __func__, count, sizeof(payload) / sizeof(u32)); + return -EINVAL; + } payload[count + 1] = capability->cap[i].hfi_id; count++; } From 7c365bdb94784e70e0d9545570f455035bb7c5e0 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Fri, 25 Nov 2022 21:28:41 +0530 Subject: [PATCH 0801/1061] video: driver: restructure video state machine Re-structure video driver statemachine to use event handler. Added event handler support for event states. Added change to handle event depending on the underlying state implementation. Change-Id: Ib55c12c6cadc4d780797a5aee75d5ea61e95c94f Signed-off-by: Govindaraj Rajagopal --- .../platform/common/src/msm_vidc_platform.c | 14 +- driver/vidc/inc/msm_vdec.h | 3 +- driver/vidc/inc/msm_venc.h | 3 +- driver/vidc/inc/msm_vidc.h | 3 +- driver/vidc/inc/msm_vidc_control.h | 1 + driver/vidc/inc/msm_vidc_driver.h | 11 +- driver/vidc/inc/msm_vidc_inst.h | 4 +- driver/vidc/inc/msm_vidc_internal.h | 2 +- driver/vidc/inc/msm_vidc_state.h | 28 +- driver/vidc/inc/msm_vidc_vb2.h | 17 +- driver/vidc/src/msm_vdec.c | 162 ++-- driver/vidc/src/msm_venc.c | 72 +- driver/vidc/src/msm_vidc.c | 56 +- driver/vidc/src/msm_vidc_control.c | 63 +- driver/vidc/src/msm_vidc_driver.c | 246 ++---- driver/vidc/src/msm_vidc_state.c | 738 +++++++++++++++++- driver/vidc/src/msm_vidc_v4l2.c | 40 +- driver/vidc/src/msm_vidc_vb2.c | 163 ++-- driver/vidc/src/venus_hfi_queue.c | 6 +- 19 files changed, 1174 insertions(+), 458 deletions(-) diff --git a/driver/platform/common/src/msm_vidc_platform.c b/driver/platform/common/src/msm_vidc_platform.c index 63e2b7d151..dae8cd0553 100644 --- a/driver/platform/common/src/msm_vidc_platform.c +++ b/driver/platform/common/src/msm_vidc_platform.c @@ -168,13 +168,13 @@ static struct v4l2_ctrl_ops msm_v4l2_ctrl_ops = { }; static struct vb2_ops msm_vb2_ops = { - .queue_setup = msm_vidc_queue_setup, - .start_streaming = msm_vidc_start_streaming, - .buf_queue = msm_vidc_buf_queue, - .buf_cleanup = msm_vidc_buf_cleanup, - .stop_streaming = msm_vidc_stop_streaming, - .buf_out_validate = msm_vidc_buf_out_validate, - .buf_request_complete = msm_vidc_buf_request_complete, + .queue_setup = msm_vb2_queue_setup, + .start_streaming = msm_vb2_start_streaming, + .buf_queue = msm_vb2_buf_queue, + .buf_cleanup = msm_vb2_buf_cleanup, + .stop_streaming = msm_vb2_stop_streaming, + .buf_out_validate = msm_vb2_buf_out_validate, + .buf_request_complete = msm_vb2_request_complete, }; static struct vb2_mem_ops msm_vb2_mem_ops = { diff --git a/driver/vidc/inc/msm_vdec.h b/driver/vidc/inc/msm_vdec.h index 124fce3f8d..dbe2ff10eb 100644 --- a/driver/vidc/inc/msm_vdec.h +++ b/driver/vidc/inc/msm_vdec.h @@ -28,7 +28,8 @@ int msm_vdec_inst_deinit(struct msm_vidc_inst *inst); int msm_vdec_init_input_subcr_params(struct msm_vidc_inst *inst); int msm_vdec_input_port_settings_change(struct msm_vidc_inst *inst); int msm_vdec_output_port_settings_change(struct msm_vidc_inst *inst); -int msm_vdec_process_cmd(struct msm_vidc_inst *inst, u32 cmd); +int msm_vdec_stop_cmd(struct msm_vidc_inst *inst); +int msm_vdec_start_cmd(struct msm_vidc_inst *inst); int msm_vdec_handle_release_buffer(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buf); int msm_vdec_set_num_comv(struct msm_vidc_inst *inst); diff --git a/driver/vidc/inc/msm_venc.h b/driver/vidc/inc/msm_venc.h index fced6b5347..594236fe0f 100644 --- a/driver/vidc/inc/msm_venc.h +++ b/driver/vidc/inc/msm_venc.h @@ -15,7 +15,8 @@ int msm_venc_streamon_input(struct msm_vidc_inst *inst); int msm_venc_streamoff_output(struct msm_vidc_inst *inst); int msm_venc_streamon_output(struct msm_vidc_inst *inst); int msm_venc_qbuf(struct msm_vidc_inst *inst, struct vb2_buffer *vb2); -int msm_venc_process_cmd(struct msm_vidc_inst *inst, u32 cmd); +int msm_venc_stop_cmd(struct msm_vidc_inst *inst); +int msm_venc_start_cmd(struct msm_vidc_inst *inst); int msm_venc_try_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f); int msm_venc_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f); int msm_venc_s_fmt_output(struct msm_vidc_inst *inst, struct v4l2_format *f); diff --git a/driver/vidc/inc/msm_vidc.h b/driver/vidc/inc/msm_vidc.h index 6fd83f4822..891c3db405 100644 --- a/driver/vidc/inc/msm_vidc.h +++ b/driver/vidc/inc/msm_vidc.h @@ -41,7 +41,8 @@ int msm_vidc_query_ctrl(void *instance, struct v4l2_queryctrl *ctrl); int msm_vidc_query_menu(void *instance, struct v4l2_querymenu *qmenu); int msm_vidc_streamoff(void *instance, enum v4l2_buf_type i); int msm_vidc_try_cmd(void *instance, union msm_v4l2_cmd *cmd); -int msm_vidc_cmd(void *instance, union msm_v4l2_cmd *cmd); +int msm_vidc_start_cmd(void *instance); +int msm_vidc_stop_cmd(void *instance); int msm_vidc_poll(void *instance, struct file *filp, struct poll_table_struct *pt); int msm_vidc_subscribe_event(void *instance, diff --git a/driver/vidc/inc/msm_vidc_control.h b/driver/vidc/inc/msm_vidc_control.h index 84081ba3b3..fe5e0d1714 100644 --- a/driver/vidc/inc/msm_vidc_control.h +++ b/driver/vidc/inc/msm_vidc_control.h @@ -14,6 +14,7 @@ int msm_vidc_ctrl_init(struct msm_vidc_inst *inst); int msm_vidc_ctrl_deinit(struct msm_vidc_inst *inst); int msm_v4l2_op_s_ctrl(struct v4l2_ctrl *ctrl); int msm_v4l2_op_g_volatile_ctrl(struct v4l2_ctrl *ctrl); +int msm_vidc_s_ctrl(struct msm_vidc_inst *inst, struct v4l2_ctrl *ctrl); int msm_vidc_prepare_dependency_list(struct msm_vidc_inst *inst); int msm_vidc_adjust_set_v4l2_properties(struct msm_vidc_inst *inst); bool is_valid_cap_id(enum msm_vidc_inst_capability_type cap_id); diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 4d65601633..76304676b8 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -404,8 +404,8 @@ const char *state_name(enum msm_vidc_state state); int msm_vidc_change_state(struct msm_vidc_inst *inst, enum msm_vidc_state request_state, const char *func); int msm_vidc_change_sub_state(struct msm_vidc_inst *inst, - enum msm_vidc_sub_state clear_sub_states, - enum msm_vidc_sub_state set_sub_states, const char *func); + enum msm_vidc_sub_state clear_sub_state, + enum msm_vidc_sub_state set_sub_state, const char *func); int msm_vidc_create_internal_buffer(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type buffer_type, u32 index); int msm_vidc_get_internal_buffers(struct msm_vidc_inst *inst, @@ -436,6 +436,8 @@ int msm_vidc_change_core_state(struct msm_vidc_core *core, int msm_vidc_change_core_sub_state(struct msm_vidc_core *core, enum msm_vidc_core_sub_state clear_sub_states, enum msm_vidc_core_sub_state set_sub_states, const char *func); +int prepare_sub_state_name(enum msm_vidc_sub_state sub_state, + char *buf, u32 size); int msm_vidc_core_init(struct msm_vidc_core *core); int msm_vidc_core_init_wait(struct msm_vidc_core *core); int msm_vidc_core_deinit(struct msm_vidc_core *core, bool force); @@ -482,6 +484,7 @@ int cancel_stats_work_sync(struct msm_vidc_inst *inst); void msm_vidc_print_stats(struct msm_vidc_inst *inst); enum msm_vidc_buffer_type v4l2_type_to_driver(u32 type, const char *func); +int msm_vidc_buf_queue(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buf); int msm_vidc_queue_buffer_single(struct msm_vidc_inst *inst, struct vb2_buffer *vb2); int msm_vidc_queue_deferred_buffers(struct msm_vidc_inst *inst, @@ -501,8 +504,6 @@ struct msm_vidc_inst *get_inst(struct msm_vidc_core *core, u32 session_id); void put_inst(struct msm_vidc_inst *inst); bool msm_vidc_allow_s_fmt(struct msm_vidc_inst *inst, u32 type); -bool msm_vidc_allow_s_ctrl(struct msm_vidc_inst *inst, - enum msm_vidc_inst_capability_type cap_id); bool msm_vidc_allow_metadata_delivery(struct msm_vidc_inst *inst, u32 cap_id, u32 port); bool msm_vidc_allow_metadata_subscription(struct msm_vidc_inst *inst, @@ -514,8 +515,6 @@ bool msm_vidc_allow_reqbufs(struct msm_vidc_inst *inst, u32 type); enum msm_vidc_allow msm_vidc_allow_stop(struct msm_vidc_inst *inst); bool msm_vidc_allow_start(struct msm_vidc_inst *inst); bool msm_vidc_allow_streamon(struct msm_vidc_inst *inst, u32 type); -enum msm_vidc_allow msm_vidc_allow_streamoff(struct msm_vidc_inst *inst, u32 type); -enum msm_vidc_allow msm_vidc_allow_qbuf(struct msm_vidc_inst *inst, u32 type); enum msm_vidc_allow msm_vidc_allow_input_psc(struct msm_vidc_inst *inst); bool msm_vidc_allow_drain_last_flag(struct msm_vidc_inst *inst); bool msm_vidc_allow_psc_last_flag(struct msm_vidc_inst *inst); diff --git a/driver/vidc/inc/msm_vidc_inst.h b/driver/vidc/inc/msm_vidc_inst.h index 0339489ef0..7ea7bd963b 100644 --- a/driver/vidc/inc/msm_vidc_inst.h +++ b/driver/vidc/inc/msm_vidc_inst.h @@ -9,12 +9,12 @@ #include "msm_vidc_internal.h" #include "msm_vidc_memory.h" +#include "msm_vidc_state.h" #include "hfi_property.h" struct msm_vidc_inst; #define FOREACH_STATE(STATE) { \ - STATE(NONE) \ STATE(OPEN) \ STATE(INPUT_STREAMING) \ STATE(OUTPUT_STREAMING) \ @@ -97,6 +97,8 @@ struct msm_vidc_inst { struct mutex request_lock; struct mutex client_lock; enum msm_vidc_state state; + int (*event_handle)(struct msm_vidc_inst *inst, + enum msm_vidc_event event, void *data); enum msm_vidc_sub_state sub_state; char sub_state_name[MAX_NAME_LENGTH]; enum msm_vidc_domain_type domain; diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 7db0cf7cdd..a12847fde7 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -377,7 +377,7 @@ enum msm_vidc_metadata_bits { BUF_TYPE(INPUT_META) \ BUF_TYPE(OUTPUT_META) \ BUF_TYPE(READ_ONLY) \ - BUF_TYPE(QUEUE) \ + BUF_TYPE(INTERFACE_QUEUE) \ BUF_TYPE(BIN) \ BUF_TYPE(ARP) \ BUF_TYPE(COMV) \ diff --git a/driver/vidc/inc/msm_vidc_state.h b/driver/vidc/inc/msm_vidc_state.h index c5a35089d8..12aa5045f3 100644 --- a/driver/vidc/inc/msm_vidc_state.h +++ b/driver/vidc/inc/msm_vidc_state.h @@ -10,6 +10,8 @@ #include "msm_vidc_internal.h" struct msm_vidc_core; +enum msm_vidc_state; +enum msm_vidc_sub_state; #define FOREACH_CORE_STATE(CORE_STATE) { \ CORE_STATE(CORE_DEINIT) \ @@ -18,6 +20,17 @@ struct msm_vidc_core; CORE_STATE(CORE_ERROR) \ } +#define FOREACH_EVENT(EVENT) { \ + EVENT(S_FMT) \ + EVENT(REQBUFS) \ + EVENT(S_CTRL) \ + EVENT(STREAMON) \ + EVENT(STREAMOFF) \ + EVENT(CMD_START) \ + EVENT(CMD_STOP) \ + EVENT(BUF_QUEUE) \ +} + enum msm_vidc_core_state FOREACH_CORE_STATE(GENERATE_MSM_VIDC_ENUM); enum msm_vidc_core_sub_state { @@ -37,13 +50,9 @@ enum msm_vidc_core_event_type { CORE_EVENT_UPDATE_SUB_STATE = BIT(1), }; -struct msm_vidc_core_state_handle { - enum msm_vidc_core_state state; - int (*handle)(struct msm_vidc_core *core, - enum msm_vidc_core_event_type type, - struct msm_vidc_event_data *data); -}; +enum msm_vidc_event FOREACH_EVENT(GENERATE_MSM_VIDC_ENUM); +/* core statemachine functions */ enum msm_vidc_allow msm_vidc_allow_core_state_change( struct msm_vidc_core *core, enum msm_vidc_core_state req_state); int msm_vidc_update_core_state(struct msm_vidc_core *core, @@ -55,4 +64,11 @@ bool is_core_sub_state(struct msm_vidc_core *core, const char *core_state_name(enum msm_vidc_core_state state); const char *core_sub_state_name(enum msm_vidc_core_sub_state sub_state); +/* inst statemachine functions */ +int msm_vidc_update_state(struct msm_vidc_inst *inst, + enum msm_vidc_state request_state, const char *func); +enum msm_vidc_allow msm_vidc_allow_state_change( + struct msm_vidc_inst *inst, + enum msm_vidc_state req_state); + #endif // _MSM_VIDC_STATE_H_ diff --git a/driver/vidc/inc/msm_vidc_vb2.h b/driver/vidc/inc/msm_vidc_vb2.h index 50492af4f6..3deb3a5598 100644 --- a/driver/vidc/inc/msm_vidc_vb2.h +++ b/driver/vidc/inc/msm_vidc_vb2.h @@ -35,14 +35,15 @@ int msm_vb2_map_dmabuf(void *buf_priv); void msm_vb2_unmap_dmabuf(void *buf_priv); /* vb2_ops */ -int msm_vidc_queue_setup(struct vb2_queue *q, +int msm_vb2_queue_setup(struct vb2_queue *q, unsigned int *num_buffers, unsigned int *num_planes, unsigned int sizes[], struct device *alloc_devs[]); -int msm_vidc_start_streaming(struct vb2_queue *q, unsigned int count); -void msm_vidc_stop_streaming(struct vb2_queue *q); -void msm_vidc_buf_queue(struct vb2_buffer *vb2); -void msm_vidc_buf_cleanup(struct vb2_buffer *vb); -int msm_vidc_buf_out_validate(struct vb2_buffer *vb); -void msm_vidc_buf_request_complete(struct vb2_buffer *vb); - +int msm_vidc_start_streaming(struct msm_vidc_inst *inst, struct vb2_queue *q); +int msm_vidc_stop_streaming(struct msm_vidc_inst *inst, struct vb2_queue *q); +int msm_vb2_start_streaming(struct vb2_queue *q, unsigned int count); +void msm_vb2_stop_streaming(struct vb2_queue *q); +void msm_vb2_buf_queue(struct vb2_buffer *vb2); +void msm_vb2_buf_cleanup(struct vb2_buffer *vb); +int msm_vb2_buf_out_validate(struct vb2_buffer *vb); +void msm_vb2_request_complete(struct vb2_buffer *vb); #endif // _MSM_VIDC_VB2_H_ diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 5b2516d38c..90cc6cf647 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -1874,11 +1874,8 @@ static int msm_vdec_qbuf_batch(struct msm_vidc_inst *inst, if (!buf) return -EINVAL; - allow = msm_vidc_allow_qbuf(inst, vb2->type); - if (allow == MSM_VIDC_DISALLOW) { - i_vpr_e(inst, "%s: qbuf not allowed\n", __func__); - return -EINVAL; - } else if (allow == MSM_VIDC_DEFER) { + if (is_state(inst, MSM_VIDC_OPEN) || + is_state(inst, MSM_VIDC_INPUT_STREAMING)) { print_vidc_buffer(VIDC_LOW, "low ", "qbuf deferred", inst, buf); return 0; } @@ -2068,95 +2065,96 @@ static int msm_vdec_alloc_and_queue_additional_dpb_buffers(struct msm_vidc_inst return 0; } -int msm_vdec_process_cmd(struct msm_vidc_inst *inst, u32 cmd) +int msm_vdec_stop_cmd(struct msm_vidc_inst *inst) { - int rc = 0; enum msm_vidc_allow allow = MSM_VIDC_DISALLOW; - struct msm_vidc_inst_capability *capability; + int rc = 0; - if (!inst || !inst->core || !inst->capabilities) { + i_vpr_h(inst, "received cmd: drain\n"); + allow = msm_vidc_allow_stop(inst); + if (allow == MSM_VIDC_DISALLOW) + return -EBUSY; + else if (allow == MSM_VIDC_IGNORE) + return 0; + else if (allow != MSM_VIDC_ALLOW) + return -EINVAL; + rc = msm_vidc_process_drain(inst); + if (rc) + return rc; + + return rc; +} + +int msm_vdec_start_cmd(struct msm_vidc_inst *inst) +{ + struct msm_vidc_inst_capability *capability; + int rc = 0; + + if (!inst || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } capability = inst->capabilities; - if (cmd == V4L2_DEC_CMD_STOP) { - i_vpr_h(inst, "received cmd: drain\n"); - allow = msm_vidc_allow_stop(inst); - if (allow == MSM_VIDC_DISALLOW) - return -EBUSY; - else if (allow == MSM_VIDC_IGNORE) - return 0; - else if (allow != MSM_VIDC_ALLOW) - return -EINVAL; - rc = msm_vidc_process_drain(inst); - if (rc) - return rc; - } else if (cmd == V4L2_DEC_CMD_START) { - i_vpr_h(inst, "received cmd: resume\n"); - vb2_clear_last_buffer_dequeued(inst->bufq[OUTPUT_META_PORT].vb2q); - vb2_clear_last_buffer_dequeued(inst->bufq[OUTPUT_PORT].vb2q); + i_vpr_h(inst, "received cmd: resume\n"); + vb2_clear_last_buffer_dequeued(inst->bufq[OUTPUT_META_PORT].vb2q); + vb2_clear_last_buffer_dequeued(inst->bufq[OUTPUT_PORT].vb2q); - if (capability->cap[CODED_FRAMES].value == CODED_FRAMES_INTERLACE && - !is_ubwc_colorformat(capability->cap[PIX_FMTS].value)) { - i_vpr_e(inst, - "%s: interlace with non-ubwc color format is unsupported\n", - __func__); - return -EINVAL; - } - - if (!msm_vidc_allow_start(inst)) - return -EBUSY; - - /* tune power features */ - inst->decode_batch.enable = msm_vidc_allow_decode_batch(inst); - msm_vidc_allow_dcvs(inst); - msm_vidc_power_data_reset(inst); - - /* - * client is completing partial port reconfiguration, - * hence reallocate input internal buffers before input port - * is resumed. - */ - if (is_sub_state(inst, MSM_VIDC_DRC) && - is_sub_state(inst, MSM_VIDC_DRC_LAST_BUFFER) && - is_sub_state(inst, MSM_VIDC_INPUT_PAUSE)) { - rc = msm_vidc_alloc_and_queue_input_internal_buffers(inst); - if (rc) - return rc; - - rc = msm_vidc_set_stage(inst, STAGE); - if (rc) - return rc; - - rc = msm_vidc_set_pipe(inst, PIPE); - if (rc) - return rc; - } - - /* allocate and queue extra dpb buffers */ - rc = msm_vdec_alloc_and_queue_additional_dpb_buffers(inst); - if (rc) - return rc; - - /* queue pending deferred buffers */ - rc = msm_vidc_queue_deferred_buffers(inst, MSM_VIDC_BUF_OUTPUT); - if (rc) - return rc; - - /* print final buffer counts & size details */ - msm_vidc_print_buffer_info(inst); - - rc = msm_vidc_process_resume(inst); - if (rc) - return rc; - - } else { - i_vpr_e(inst, "%s: unknown cmd %d\n", __func__, cmd); + if (capability->cap[CODED_FRAMES].value == CODED_FRAMES_INTERLACE && + !is_ubwc_colorformat(capability->cap[PIX_FMTS].value)) { + i_vpr_e(inst, + "%s: interlace with non-ubwc color format is unsupported\n", + __func__); return -EINVAL; } - return 0; + if (!msm_vidc_allow_start(inst)) + return -EBUSY; + + /* tune power features */ + inst->decode_batch.enable = msm_vidc_allow_decode_batch(inst); + msm_vidc_allow_dcvs(inst); + msm_vidc_power_data_reset(inst); + + /* + * client is completing partial port reconfiguration, + * hence reallocate input internal buffers before input port + * is resumed. + */ + if (is_sub_state(inst, MSM_VIDC_DRC) && + is_sub_state(inst, MSM_VIDC_DRC_LAST_BUFFER) && + is_sub_state(inst, MSM_VIDC_INPUT_PAUSE)) { + rc = msm_vidc_alloc_and_queue_input_internal_buffers(inst); + if (rc) + return rc; + + rc = msm_vidc_set_stage(inst, STAGE); + if (rc) + return rc; + + rc = msm_vidc_set_pipe(inst, PIPE); + if (rc) + return rc; + } + + /* allocate and queue extra dpb buffers */ + rc = msm_vdec_alloc_and_queue_additional_dpb_buffers(inst); + if (rc) + return rc; + + /* queue pending deferred buffers */ + rc = msm_vidc_queue_deferred_buffers(inst, MSM_VIDC_BUF_OUTPUT); + if (rc) + return rc; + + /* print final buffer counts & size details */ + msm_vidc_print_buffer_info(inst); + + rc = msm_vidc_process_resume(inst); + if (rc) + return rc; + + return rc; } int msm_vdec_try_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index 690d9bb109..0249915b88 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -881,50 +881,48 @@ int msm_venc_qbuf(struct msm_vidc_inst *inst, struct vb2_buffer *vb2) return rc; } -int msm_venc_process_cmd(struct msm_vidc_inst *inst, u32 cmd) +int msm_venc_stop_cmd(struct msm_vidc_inst *inst) +{ + enum msm_vidc_allow allow = MSM_VIDC_DISALLOW; + int rc = 0; + + i_vpr_h(inst, "received cmd: drain\n"); + allow = msm_vidc_allow_stop(inst); + if (allow == MSM_VIDC_DISALLOW) + return -EBUSY; + else if (allow == MSM_VIDC_IGNORE) + return 0; + else if (allow != MSM_VIDC_ALLOW) + return -EINVAL; + rc = msm_vidc_process_drain(inst); + if (rc) + return rc; + + return rc; +} + +int msm_venc_start_cmd(struct msm_vidc_inst *inst) { int rc = 0; - enum msm_vidc_allow allow = MSM_VIDC_DISALLOW; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } + i_vpr_h(inst, "received cmd: resume\n"); + if (!msm_vidc_allow_start(inst)) + return -EBUSY; + vb2_clear_last_buffer_dequeued(inst->bufq[OUTPUT_META_PORT].vb2q); + vb2_clear_last_buffer_dequeued(inst->bufq[OUTPUT_PORT].vb2q); - if (cmd == V4L2_ENC_CMD_STOP) { - i_vpr_h(inst, "received cmd: drain\n"); - allow = msm_vidc_allow_stop(inst); - if (allow == MSM_VIDC_DISALLOW) - return -EBUSY; - else if (allow == MSM_VIDC_IGNORE) - return 0; - else if (allow != MSM_VIDC_ALLOW) - return -EINVAL; - rc = msm_vidc_process_drain(inst); - if (rc) - return rc; - } else if (cmd == V4L2_ENC_CMD_START) { - i_vpr_h(inst, "received cmd: resume\n"); - if (!msm_vidc_allow_start(inst)) - return -EBUSY; - vb2_clear_last_buffer_dequeued(inst->bufq[OUTPUT_META_PORT].vb2q); - vb2_clear_last_buffer_dequeued(inst->bufq[OUTPUT_PORT].vb2q); + /* tune power features */ + msm_vidc_allow_dcvs(inst); + msm_vidc_power_data_reset(inst); - /* tune power features */ - msm_vidc_allow_dcvs(inst); - msm_vidc_power_data_reset(inst); + /* print final buffer counts & size details */ + msm_vidc_print_buffer_info(inst); - /* print final buffer counts & size details */ - msm_vidc_print_buffer_info(inst); + rc = msm_vidc_process_resume(inst); + if (rc) + return rc; - rc = msm_vidc_process_resume(inst); - if (rc) - return rc; - } else { - i_vpr_e(inst, "%s: unknown cmd %d\n", __func__, cmd); - return -EINVAL; - } - return 0; + return rc; } int msm_venc_streamoff_output(struct msm_vidc_inst *inst) diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index f81b1e54b7..449ffee961 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -658,26 +658,53 @@ int msm_vidc_try_cmd(void *instance, union msm_v4l2_cmd *cmd) } EXPORT_SYMBOL(msm_vidc_try_cmd); -int msm_vidc_cmd(void *instance, union msm_v4l2_cmd *cmd) +int msm_vidc_start_cmd(void *instance) { - int rc = 0; struct msm_vidc_inst *inst = instance; - struct v4l2_decoder_cmd *dec = NULL; - struct v4l2_encoder_cmd *enc = NULL; + int rc = 0; + + if (!is_decode_session(inst) && !is_encode_session(inst)) { + i_vpr_e(inst, "%s: invalid session %d\n", __func__, inst->domain); + return -EINVAL; + } if (is_decode_session(inst)) { - dec = (struct v4l2_decoder_cmd *)cmd; - rc = msm_vdec_process_cmd(inst, dec->cmd); + rc = msm_vdec_start_cmd(inst); + if (rc) + return rc; } else if (is_encode_session(inst)) { - enc = (struct v4l2_encoder_cmd *)cmd; - rc = msm_venc_process_cmd(inst, enc->cmd); + rc = msm_venc_start_cmd(inst); + if (rc) + return rc; } - if (rc) - return rc; - return 0; + return rc; } -EXPORT_SYMBOL(msm_vidc_cmd); +EXPORT_SYMBOL(msm_vidc_start_cmd); + +int msm_vidc_stop_cmd(void *instance) +{ + struct msm_vidc_inst *inst = instance; + int rc = 0; + + if (!is_decode_session(inst) && !is_encode_session(inst)) { + i_vpr_e(inst, "%s: invalid session %d\n", __func__, inst->domain); + return -EINVAL; + } + + if (is_decode_session(inst)) { + rc = msm_vdec_stop_cmd(inst); + if (rc) + return rc; + } else if (is_encode_session(inst)) { + rc = msm_venc_stop_cmd(inst); + if (rc) + return rc; + } + + return rc; +} +EXPORT_SYMBOL(msm_vidc_stop_cmd); int msm_vidc_enum_framesizes(void *instance, struct v4l2_frmsizeenum *fsize) { @@ -894,7 +921,7 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) inst->core = core; inst->domain = session_type; inst->session_id = hash32_ptr(inst); - msm_vidc_change_state(inst, MSM_VIDC_OPEN, __func__); + msm_vidc_update_state(inst, MSM_VIDC_OPEN, __func__); inst->sub_state = MSM_VIDC_SUB_STATE_NONE; strlcpy(inst->sub_state_name, "SUB_STATE_NONE", sizeof(inst->sub_state_name)); inst->active = true; @@ -1041,6 +1068,9 @@ int msm_vidc_close(void *instance) msm_vidc_event_queue_deinit(inst); msm_vidc_vb2_queue_deinit(inst); msm_vidc_remove_session(inst); + msm_vidc_change_state(inst, MSM_VIDC_CLOSE, __func__); + inst->sub_state = MSM_VIDC_SUB_STATE_NONE; + strscpy(inst->sub_state_name, "SUB_STATE_NONE", sizeof(inst->sub_state_name)); inst_unlock(inst, __func__); client_unlock(inst, __func__); cancel_stability_work_sync(inst); diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 1c7f7f8a41..38c7370e5b 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -841,29 +841,17 @@ static int msm_vidc_update_static_property(struct msm_vidc_inst *inst, return rc; } -int msm_v4l2_op_s_ctrl(struct v4l2_ctrl *ctrl) +int msm_vidc_s_ctrl(struct msm_vidc_inst *inst, struct v4l2_ctrl *ctrl) { - int rc = 0; - struct msm_vidc_inst *inst; enum msm_vidc_inst_capability_type cap_id; struct msm_vidc_inst_capability *capability; + int rc = 0; u32 port; - if (!ctrl) { - d_vpr_e("%s: invalid ctrl parameter\n", __func__); + if (!inst || !inst->capabilities || !ctrl) { + d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - - inst = container_of(ctrl->handler, - struct msm_vidc_inst, ctrl_handler); - inst = get_inst_ref(g_core, inst); - if (!inst || !inst->capabilities) { - d_vpr_e("%s: invalid parameters for inst\n", __func__); - return -EINVAL; - } - - client_lock(inst, __func__); - inst_lock(inst, __func__); capability = inst->capabilities; i_vpr_h(inst, FMT_STRING_SET_CTRL, @@ -871,15 +859,8 @@ int msm_v4l2_op_s_ctrl(struct v4l2_ctrl *ctrl) cap_id = msm_vidc_get_cap_id(inst, ctrl->id); if (!is_valid_cap_id(cap_id)) { - i_vpr_e(inst, "%s: could not find cap_id for ctrl %s\n", - __func__, ctrl->name); - rc = -EINVAL; - goto unlock; - } - - if (!msm_vidc_allow_s_ctrl(inst, cap_id)) { - rc = -EINVAL; - goto unlock; + i_vpr_e(inst, "%s: invalid cap_id for ctrl %s\n", __func__, ctrl->name); + return -EINVAL; } /* mark client set flag */ @@ -890,18 +871,44 @@ int msm_v4l2_op_s_ctrl(struct v4l2_ctrl *ctrl) /* static case */ rc = msm_vidc_update_static_property(inst, cap_id, ctrl); if (rc) - goto unlock; + return rc; } else { /* dynamic case */ rc = msm_vidc_adjust_dynamic_property(inst, cap_id, ctrl); if (rc) - goto unlock; + return rc; rc = msm_vidc_set_dynamic_property(inst); if (rc) - goto unlock; + return rc; } + return rc; +} + +int msm_v4l2_op_s_ctrl(struct v4l2_ctrl *ctrl) +{ + struct msm_vidc_inst *inst; + int rc = 0; + + if (!ctrl) { + d_vpr_e("%s: invalid ctrl parameter\n", __func__); + return -EINVAL; + } + + inst = container_of(ctrl->handler, struct msm_vidc_inst, ctrl_handler); + inst = get_inst_ref(g_core, inst); + if (!inst) { + d_vpr_e("%s: invalid instance\n", __func__); + return -EINVAL; + } + + client_lock(inst, __func__); + inst_lock(inst, __func__); + rc = inst->event_handle(inst, MSM_VIDC_S_CTRL, ctrl); + if (rc) + goto unlock; + unlock: inst_unlock(inst, __func__); client_unlock(inst, __func__); diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 349542e370..7b39fd855c 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -130,6 +130,28 @@ const char *sub_state_name(enum msm_vidc_sub_state sub_state) return "SUB_STATE_NONE"; } +int prepare_sub_state_name(enum msm_vidc_sub_state sub_state, + char *buf, u32 size) +{ + int i = 0; + + if (!buf || !size) + return -EINVAL; + + strscpy(buf, "\0", size); + if (sub_state == MSM_VIDC_SUB_STATE_NONE) { + strscpy(buf, "SUB_STATE_NONE", size); + return 0; + } + + for (i = 0; i < MSM_VIDC_MAX_SUB_STATES; i++) { + if (sub_state & BIT(i)) + strlcat(buf, sub_state_name(BIT(i)), size); + } + + return 0; +} + const char *v4l2_type_name(u32 port) { switch (port) { @@ -888,7 +910,7 @@ struct msm_vidc_buffers *msm_vidc_get_buffers( return &inst->buffers.vpss; case MSM_VIDC_BUF_PARTIAL_DATA: return &inst->buffers.partial_data; - case MSM_VIDC_BUF_QUEUE: + case MSM_VIDC_BUF_INTERFACE_QUEUE: return NULL; default: i_vpr_e(inst, "%s: invalid driver buffer type %d\n", @@ -994,16 +1016,14 @@ int signal_session_msg_receipt(struct msm_vidc_inst *inst, int msm_vidc_change_state(struct msm_vidc_inst *inst, enum msm_vidc_state request_state, const char *func) { + enum msm_vidc_allow allow; + int rc; + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - if (!request_state) { - i_vpr_e(inst, "%s: invalid request state\n", func); - return -EINVAL; - } - if (is_session_error(inst)) { i_vpr_h(inst, "%s: inst is in bad state, can not change state to %s\n", @@ -1011,17 +1031,23 @@ int msm_vidc_change_state(struct msm_vidc_inst *inst, return 0; } - if (request_state == MSM_VIDC_ERROR) - i_vpr_e(inst, FMT_STRING_STATE_CHANGE, - func, state_name(request_state), state_name(inst->state)); - else - i_vpr_h(inst, FMT_STRING_STATE_CHANGE, - func, state_name(request_state), state_name(inst->state)); + /* current and requested state is same */ + if (inst->state == request_state) + return 0; - trace_msm_vidc_common_state_change(inst, func, state_name(inst->state), + /* check if requested state movement is allowed */ + allow = msm_vidc_allow_state_change(inst, request_state); + if (allow != MSM_VIDC_ALLOW) { + i_vpr_e(inst, "%s: %s state change %s -> %s\n", func, + allow_name(allow), state_name(inst->state), state_name(request_state)); + return (allow == MSM_VIDC_DISALLOW ? -EINVAL : 0); + } - inst->state = request_state; + /* go ahead and update inst state */ + rc = msm_vidc_update_state(inst, request_state, func); + if (rc) + return rc; return 0; } @@ -1030,8 +1056,8 @@ int msm_vidc_change_sub_state(struct msm_vidc_inst *inst, enum msm_vidc_sub_state clear_sub_state, enum msm_vidc_sub_state set_sub_state, const char *func) { - int i = 0; enum msm_vidc_sub_state prev_sub_state; + int rc = 0; if (!inst) { d_vpr_e("%s: invalid params\n", __func__); @@ -1061,18 +1087,11 @@ int msm_vidc_change_sub_state(struct msm_vidc_inst *inst, /* print substates only when there is a change */ if (inst->sub_state != prev_sub_state) { - strlcpy(inst->sub_state_name, "\0", sizeof(inst->sub_state_name)); - for (i = 0; i < MSM_VIDC_MAX_SUB_STATES; i++) { - if (inst->sub_state == MSM_VIDC_SUB_STATE_NONE) { - strlcpy(inst->sub_state_name, "SUB_STATE_NONE", - sizeof(inst->sub_state_name)); - break; - } - if (inst->sub_state & BIT(i)) - strlcat(inst->sub_state_name, sub_state_name(BIT(i)), - sizeof(inst->sub_state_name)); - } - i_vpr_h(inst, "%s: sub state changed to %s\n", func, inst->sub_state_name); + rc = prepare_sub_state_name(inst->sub_state, inst->sub_state_name, + sizeof(inst->sub_state_name)); + if (!rc) + i_vpr_h(inst, "%s: state %s and sub state changed to %s\n", + func, state_name(inst->state), inst->sub_state_name); } return 0; @@ -1110,55 +1129,6 @@ exit: return allow; } -bool msm_vidc_allow_s_ctrl(struct msm_vidc_inst *inst, - enum msm_vidc_inst_capability_type cap_id) -{ - bool allow = false; - - if (!inst || !inst->capabilities) { - d_vpr_e("%s: invalid params\n", __func__); - return false; - } - if (is_state(inst, MSM_VIDC_OPEN)) { - allow = true; - goto exit; - } - - if (!inst->capabilities->cap[cap_id].cap_id || - !inst->capabilities->cap[cap_id].v4l2_id) { - allow = false; - goto exit; - } - - if (is_decode_session(inst)) { - if (!inst->bufq[INPUT_PORT].vb2q->streaming) { - allow = true; - goto exit; - } - if (inst->bufq[INPUT_PORT].vb2q->streaming) { - if (inst->capabilities->cap[cap_id].flags & - CAP_FLAG_DYNAMIC_ALLOWED) - allow = true; - } - } else if (is_encode_session(inst)) { - if (!inst->bufq[OUTPUT_PORT].vb2q->streaming) { - allow = true; - goto exit; - } - if (inst->bufq[OUTPUT_PORT].vb2q->streaming) { - if (inst->capabilities->cap[cap_id].flags & - CAP_FLAG_DYNAMIC_ALLOWED) - allow = true; - } - } - -exit: - if (!allow) - i_vpr_e(inst, "%s: cap_id %#x not allowed in state %s\n", - __func__, cap_id, state_name(inst->state)); - return allow; -} - bool msm_vidc_allow_metadata_delivery(struct msm_vidc_inst *inst, u32 cap_id, u32 port) { @@ -1387,79 +1357,6 @@ bool msm_vidc_allow_streamon(struct msm_vidc_inst *inst, u32 type) return false; } -enum msm_vidc_allow msm_vidc_allow_streamoff(struct msm_vidc_inst *inst, u32 type) -{ - enum msm_vidc_allow allow = MSM_VIDC_ALLOW; - - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return MSM_VIDC_DISALLOW; - } - if (type == INPUT_MPLANE) { - if (!inst->bufq[INPUT_PORT].vb2q->streaming) - allow = MSM_VIDC_IGNORE; - } else if (type == INPUT_META_PLANE) { - if (inst->bufq[INPUT_PORT].vb2q->streaming) - allow = MSM_VIDC_DISALLOW; - else if (!inst->bufq[INPUT_META_PORT].vb2q->streaming) - allow = MSM_VIDC_IGNORE; - } else if (type == OUTPUT_MPLANE) { - if (!inst->bufq[OUTPUT_PORT].vb2q->streaming) - allow = MSM_VIDC_IGNORE; - } else if (type == OUTPUT_META_PLANE) { - if (inst->bufq[OUTPUT_PORT].vb2q->streaming) - allow = MSM_VIDC_DISALLOW; - else if (!inst->bufq[OUTPUT_META_PORT].vb2q->streaming) - allow = MSM_VIDC_IGNORE; - } - if (allow != MSM_VIDC_ALLOW) - i_vpr_e(inst, "%s: type %d is %s in state %s\n", - __func__, type, allow_name(allow), - state_name(inst->state)); - - return allow; -} - -enum msm_vidc_allow msm_vidc_allow_qbuf(struct msm_vidc_inst *inst, u32 type) -{ - int port = 0; - - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return MSM_VIDC_DISALLOW; - } - - port = v4l2_type_to_driver_port(inst, type, __func__); - if (port < 0) - return MSM_VIDC_DISALLOW; - - /* defer queuing if streamon not completed */ - if (!inst->bufq[port].vb2q->streaming) - return MSM_VIDC_DEFER; - - if (type == INPUT_META_PLANE || type == OUTPUT_META_PLANE) - return MSM_VIDC_DEFER; - - if (type == INPUT_MPLANE) { - if (is_state(inst, MSM_VIDC_OPEN) || - is_state(inst, MSM_VIDC_OUTPUT_STREAMING)) - return MSM_VIDC_DEFER; - else - return MSM_VIDC_ALLOW; - } else if (type == OUTPUT_MPLANE) { - if (is_state(inst, MSM_VIDC_OPEN) || - is_state(inst, MSM_VIDC_INPUT_STREAMING)) - return MSM_VIDC_DEFER; - else - return MSM_VIDC_ALLOW; - } else { - i_vpr_e(inst, "%s: unknown buffer type %d\n", __func__, type); - return MSM_VIDC_DISALLOW; - } - - return MSM_VIDC_DISALLOW; -} - enum msm_vidc_allow msm_vidc_allow_input_psc(struct msm_vidc_inst *inst) { enum msm_vidc_allow allow = MSM_VIDC_ALLOW; @@ -3339,12 +3236,29 @@ int msm_vidc_queue_deferred_buffers(struct msm_vidc_inst *inst, enum msm_vidc_bu return 0; } +int msm_vidc_buf_queue(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buf) +{ + int rc = 0; + + if (!inst || !buf) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + msm_vidc_scale_power(inst, is_input_buffer(buf->type)); + + rc = msm_vidc_queue_buffer(inst, buf); + if (rc) + return rc; + + return rc; +} + int msm_vidc_queue_buffer_single(struct msm_vidc_inst *inst, struct vb2_buffer *vb2) { int rc = 0; struct msm_vidc_buffer *buf = NULL; struct msm_vidc_fence *fence = NULL; - enum msm_vidc_allow allow; if (!inst || !vb2 || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); @@ -3363,20 +3277,7 @@ int msm_vidc_queue_buffer_single(struct msm_vidc_inst *inst, struct vb2_buffer * buf->fence_id = fence->dma_fence.seqno; } - allow = msm_vidc_allow_qbuf(inst, vb2->type); - if (allow == MSM_VIDC_DISALLOW) { - i_vpr_e(inst, "%s: qbuf not allowed\n", __func__); - rc = -EINVAL; - goto exit; - } else if (allow == MSM_VIDC_DEFER) { - print_vidc_buffer(VIDC_LOW, "low ", "qbuf deferred", inst, buf); - rc = 0; - goto exit; - } - - msm_vidc_scale_power(inst, is_input_buffer(buf->type)); - - rc = msm_vidc_queue_buffer(inst, buf); + rc = inst->event_handle(inst, MSM_VIDC_BUF_QUEUE, buf); if (rc) goto exit; @@ -4198,10 +4099,6 @@ int msm_vidc_session_streamoff(struct msm_vidc_inst *inst, if (rc) goto error; - rc = msm_vidc_state_change_streamoff(inst, port); - if (rc) - goto error; - core = inst->core; i_vpr_h(inst, "%s: wait on port: %d for time: %d ms\n", __func__, port, core->capabilities[HW_RESPONSE_TIMEOUT].value); @@ -4241,6 +4138,10 @@ int msm_vidc_session_streamoff(struct msm_vidc_inst *inst, goto error; } + rc = msm_vidc_state_change_streamoff(inst, port); + if (rc) + goto error; + /* flush deferred buffers */ msm_vidc_flush_buffers(inst, buffer_type); msm_vidc_flush_read_only_buffers(inst, buffer_type); @@ -4290,10 +4191,6 @@ int msm_vidc_session_close(struct msm_vidc_inst *inst) } inst_lock(inst, __func__); - msm_vidc_change_state(inst, MSM_VIDC_CLOSE, __func__); - inst->sub_state = MSM_VIDC_SUB_STATE_NONE; - strlcpy(inst->sub_state_name, "SUB_STATE_NONE", sizeof(inst->sub_state_name)); - return rc; } @@ -5129,7 +5026,6 @@ void msm_vidc_fw_unload_handler(struct work_struct *work) void msm_vidc_batch_handler(struct work_struct *work) { struct msm_vidc_inst *inst; - enum msm_vidc_allow allow; struct msm_vidc_core *core; int rc = 0; @@ -5152,8 +5048,8 @@ void msm_vidc_batch_handler(struct work_struct *work) goto exit; } - allow = msm_vidc_allow_qbuf(inst, OUTPUT_MPLANE); - if (allow != MSM_VIDC_ALLOW) { + if (is_state(inst, MSM_VIDC_OPEN) || + is_state(inst, MSM_VIDC_INPUT_STREAMING)) { i_vpr_e(inst, "%s: not allowed in state: %s\n", __func__, state_name(inst->state)); goto exit; diff --git a/driver/vidc/src/msm_vidc_state.c b/driver/vidc/src/msm_vidc_state.c index 6f521deade..47f22241f4 100644 --- a/driver/vidc/src/msm_vidc_state.c +++ b/driver/vidc/src/msm_vidc_state.c @@ -4,10 +4,14 @@ * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. */ +#include "msm_vidc_control.h" #include "msm_vidc_driver.h" #include "msm_vidc_state.h" -#include "msm_vidc_core.h" #include "msm_vidc_debug.h" +#include "msm_vidc_core.h" +#include "msm_vidc_vb2.h" +#include "msm_vidc.h" +#include "msm_vidc_events.h" bool core_in_valid_state(struct msm_vidc_core *core) { @@ -36,6 +40,22 @@ exit: return name; } +static const char * const event_name_arr[] = + FOREACH_EVENT(GENERATE_STRING); + +static const char *event_name(enum msm_vidc_event event) +{ + const char *name = "UNKNOWN EVENT"; + + if (event >= ARRAY_SIZE(event_name_arr)) + goto exit; + + name = event_name_arr[event]; + +exit: + return name; +} + static int __strict_check(struct msm_vidc_core *core, const char *function) { bool fatal = !mutex_is_locked(&core->lock); @@ -48,6 +68,18 @@ static int __strict_check(struct msm_vidc_core *core, const char *function) return fatal ? -EINVAL : 0; } +static int __strict_inst_check(struct msm_vidc_inst *inst, const char *function) +{ + bool fatal = !mutex_is_locked(&inst->lock); + + WARN_ON(fatal); + + if (fatal) + d_vpr_e("%s: strict check failed\n", function); + + return fatal ? -EINVAL : 0; +} + static int msm_vidc_core_deinit_state(struct msm_vidc_core *core, enum msm_vidc_core_event_type type, struct msm_vidc_event_data *data) @@ -181,7 +213,14 @@ static int msm_vidc_core_error_state(struct msm_vidc_core *core, return rc; } -struct msm_vidc_core_state_handle *msm_vidc_get_core_state_handle( +struct msm_vidc_core_state_handle { + enum msm_vidc_core_state state; + int (*handle)(struct msm_vidc_core *core, + enum msm_vidc_core_event_type type, + struct msm_vidc_event_data *data); +}; + +static struct msm_vidc_core_state_handle *msm_vidc_get_core_state_handle( enum msm_vidc_core_state req_state) { int cnt; @@ -456,3 +495,698 @@ int msm_vidc_change_core_sub_state(struct msm_vidc_core *core, return 0; } + +static int msm_vidc_open_state(struct msm_vidc_inst *inst, + enum msm_vidc_event event, void *data) +{ + int rc = 0; + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + /* inst must be locked */ + rc = __strict_inst_check(inst, __func__); + if (rc) { + i_vpr_e(inst, "%s(): inst was not locked\n", __func__); + return -EINVAL; + } + + switch (event) { + case MSM_VIDC_S_FMT: + { + struct v4l2_format *f = (struct v4l2_format *)data; + + rc = msm_vidc_s_fmt(inst, f); + if (rc) + return rc; + break; + } + case MSM_VIDC_S_CTRL: + { + struct v4l2_ctrl *ctrl = (struct v4l2_ctrl *)data; + + /* allow set_control request in open state */ + rc = msm_vidc_s_ctrl(inst, ctrl); + if (rc) + return rc; + break; + } + case MSM_VIDC_REQBUFS: + { + struct v4l2_requestbuffers *b = (struct v4l2_requestbuffers *)data; + + rc = msm_vidc_reqbufs(inst, b); + if (rc) + return rc; + break; + } + case MSM_VIDC_STREAMON: + { + struct vb2_queue *q = (struct vb2_queue *)data; + + rc = msm_vidc_start_streaming(inst, q); + if (rc) + return rc; + break; + } + case MSM_VIDC_STREAMOFF: + { + struct vb2_queue *q = (struct vb2_queue *)data; + + /* ignore streamoff request in open state */ + i_vpr_e(inst, "%s: type %d is %s in state %s\n", + __func__, q->type, allow_name(MSM_VIDC_IGNORE), + state_name(inst->state)); + break; + } + case MSM_VIDC_CMD_START: + { + rc = msm_vidc_start_cmd(inst); + if (rc) + return rc; + break; + } + case MSM_VIDC_CMD_STOP: + { + rc = msm_vidc_stop_cmd(inst); + if (rc) + return rc; + break; + } + case MSM_VIDC_BUF_QUEUE: + { + struct msm_vidc_buffer *buf = (struct msm_vidc_buffer *)data; + + /* defer qbuf request in open state */ + print_vidc_buffer(VIDC_LOW, "low ", "qbuf deferred", inst, buf); + break; + } + default: + { + i_vpr_e(inst, "%s: unexpected event %s\n", __func__, event_name(event)); + return -EINVAL; + } + } + + return rc; +} + +static int msm_vidc_input_streaming_state(struct msm_vidc_inst *inst, + enum msm_vidc_event event, void *data) +{ + int rc = 0; + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + /* inst must be locked */ + rc = __strict_inst_check(inst, __func__); + if (rc) { + i_vpr_e(inst, "%s(): inst was not locked\n", __func__); + return -EINVAL; + } + + switch (event) { + case MSM_VIDC_S_FMT: + { + struct v4l2_format *f = (struct v4l2_format *)data; + + rc = msm_vidc_s_fmt(inst, f); + if (rc) + return rc; + break; + } + case MSM_VIDC_S_CTRL: + { + struct v4l2_ctrl *ctrl = (struct v4l2_ctrl *)data; + u32 cap_id = msm_vidc_get_cap_id(inst, ctrl->id); + + if (cap_id == INST_CAP_NONE) { + i_vpr_e(inst, "%s: invalid cap_id %u\n", __func__, cap_id); + return -EINVAL; + } + + /* disallow */ + if (is_decode_session(inst)) { + /* check dynamic allowed if master port is streaming */ + if (!(inst->capabilities->cap[cap_id].flags & CAP_FLAG_DYNAMIC_ALLOWED)) { + i_vpr_e(inst, "%s: cap_id %#x not allowed in state %s\n", + __func__, cap_id, state_name(inst->state)); + return -EINVAL; + } + } + + rc = msm_vidc_s_ctrl(inst, ctrl); + if (rc) + return rc; + break; + } + case MSM_VIDC_REQBUFS: + { + struct v4l2_requestbuffers *b = (struct v4l2_requestbuffers *)data; + + rc = msm_vidc_reqbufs(inst, b); + if (rc) + return rc; + break; + } + case MSM_VIDC_STREAMON: + { + struct vb2_queue *q = (struct vb2_queue *)data; + + rc = msm_vidc_start_streaming(inst, q); + if (rc) + return rc; + break; + } + case MSM_VIDC_STREAMOFF: + { + struct vb2_queue *q = (struct vb2_queue *)data; + enum msm_vidc_allow allow = MSM_VIDC_ALLOW; + + /* ignore */ + if (q->type == OUTPUT_MPLANE || q->type == OUTPUT_META_PLANE) + allow = MSM_VIDC_IGNORE; + /* disallow */ + else if (q->type == INPUT_META_PLANE) + allow = MSM_VIDC_DISALLOW; + + if (allow != MSM_VIDC_ALLOW) { + i_vpr_e(inst, "%s: type %d is %s in state %s\n", + __func__, q->type, allow_name(allow), + state_name(inst->state)); + return (allow == MSM_VIDC_DISALLOW ? -EINVAL : 0); + } + + /* sanitize type field */ + if (q->type != INPUT_MPLANE) { + i_vpr_e(inst, "%s: invalid type %d\n", __func__, q->type); + return -EINVAL; + } + + rc = msm_vidc_stop_streaming(inst, q); + if (rc) + return rc; + break; + } + case MSM_VIDC_CMD_START: + { + rc = msm_vidc_start_cmd(inst); + if (rc) + return rc; + break; + } + case MSM_VIDC_CMD_STOP: + { + rc = msm_vidc_stop_cmd(inst); + if (rc) + return rc; + break; + } + case MSM_VIDC_BUF_QUEUE: + { + struct msm_vidc_buffer *buf = (struct msm_vidc_buffer *)data; + + /* defer meta port */ + if (buf->type == MSM_VIDC_BUF_INPUT_META || buf->type == MSM_VIDC_BUF_OUTPUT_META) { + print_vidc_buffer(VIDC_LOW, "low ", "qbuf deferred", inst, buf); + return 0; + } + + /* disallow */ + if (buf->type != MSM_VIDC_BUF_INPUT && buf->type != MSM_VIDC_BUF_OUTPUT) { + i_vpr_e(inst, "%s: invalid buf type %u\n", __func__, buf->type); + return -EINVAL; + } + + /* defer output port */ + if (buf->type == MSM_VIDC_BUF_OUTPUT) { + print_vidc_buffer(VIDC_LOW, "low ", "qbuf deferred", inst, buf); + return 0; + } + + rc = msm_vidc_buf_queue(inst, buf); + if (rc) + return rc; + break; + } + default: + { + i_vpr_e(inst, "%s: unexpected event %s\n", __func__, event_name(event)); + return -EINVAL; + } + } + + return rc; +} + +static int msm_vidc_output_streaming_state(struct msm_vidc_inst *inst, + enum msm_vidc_event event, void *data) +{ + int rc = 0; + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + /* inst must be locked */ + rc = __strict_inst_check(inst, __func__); + if (rc) { + i_vpr_e(inst, "%s(): inst was not locked\n", __func__); + return -EINVAL; + } + + switch (event) { + case MSM_VIDC_S_FMT: + { + struct v4l2_format *f = (struct v4l2_format *)data; + + rc = msm_vidc_s_fmt(inst, f); + if (rc) + return rc; + break; + } + case MSM_VIDC_S_CTRL: + { + struct v4l2_ctrl *ctrl = (struct v4l2_ctrl *)data; + u32 cap_id = msm_vidc_get_cap_id(inst, ctrl->id); + + if (cap_id == INST_CAP_NONE) { + i_vpr_e(inst, "%s: invalid cap_id %u\n", __func__, cap_id); + return -EINVAL; + } + + /* disallow */ + if (is_encode_session(inst)) { + /* check dynamic allowed if master port is streaming */ + if (!(inst->capabilities->cap[cap_id].flags & CAP_FLAG_DYNAMIC_ALLOWED)) { + i_vpr_e(inst, "%s: cap_id %#x not allowed in state %s\n", + __func__, cap_id, state_name(inst->state)); + return -EINVAL; + } + } + + rc = msm_vidc_s_ctrl(inst, ctrl); + if (rc) + return rc; + break; + } + case MSM_VIDC_REQBUFS: + { + struct v4l2_requestbuffers *b = (struct v4l2_requestbuffers *)data; + + rc = msm_vidc_reqbufs(inst, b); + if (rc) + return rc; + break; + } + case MSM_VIDC_STREAMON: + { + struct vb2_queue *q = (struct vb2_queue *)data; + + rc = msm_vidc_start_streaming(inst, q); + if (rc) + return rc; + break; + } + case MSM_VIDC_STREAMOFF: + { + struct vb2_queue *q = (struct vb2_queue *)data; + enum msm_vidc_allow allow = MSM_VIDC_ALLOW; + + /* ignore */ + if (q->type == INPUT_MPLANE || q->type == INPUT_META_PLANE) + allow = MSM_VIDC_IGNORE; + /* disallow */ + else if (q->type == OUTPUT_META_PLANE) + allow = MSM_VIDC_DISALLOW; + + if (allow != MSM_VIDC_ALLOW) { + i_vpr_e(inst, "%s: type %d is %s in state %s\n", + __func__, q->type, allow_name(allow), + state_name(inst->state)); + return (allow == MSM_VIDC_DISALLOW ? -EINVAL : 0); + } + + /* sanitize type field */ + if (q->type != OUTPUT_MPLANE) { + i_vpr_e(inst, "%s: invalid type %d\n", __func__, q->type); + return -EINVAL; + } + + rc = msm_vidc_stop_streaming(inst, q); + if (rc) + return rc; + break; + } + case MSM_VIDC_CMD_START: + { + rc = msm_vidc_start_cmd(inst); + if (rc) + return rc; + break; + } + case MSM_VIDC_CMD_STOP: + { + rc = msm_vidc_stop_cmd(inst); + if (rc) + return rc; + break; + } + case MSM_VIDC_BUF_QUEUE: + { + struct msm_vidc_buffer *buf = (struct msm_vidc_buffer *)data; + + /* defer meta port */ + if (buf->type == MSM_VIDC_BUF_INPUT_META || buf->type == MSM_VIDC_BUF_OUTPUT_META) { + print_vidc_buffer(VIDC_LOW, "low ", "qbuf deferred", inst, buf); + return 0; + } + + /* disallow */ + if (buf->type != MSM_VIDC_BUF_INPUT && buf->type != MSM_VIDC_BUF_OUTPUT) { + i_vpr_e(inst, "%s: invalid buf type %u\n", __func__, buf->type); + return -EINVAL; + } + + /* defer input port */ + if (buf->type == MSM_VIDC_BUF_INPUT) { + print_vidc_buffer(VIDC_LOW, "low ", "qbuf deferred", inst, buf); + return 0; + } + + rc = msm_vidc_buf_queue(inst, buf); + if (rc) + return rc; + break; + } + default: { + i_vpr_e(inst, "%s: unexpected event %s\n", __func__, event_name(event)); + return -EINVAL; + } + } + + return rc; +} + +static int msm_vidc_streaming_state(struct msm_vidc_inst *inst, + enum msm_vidc_event event, void *data) +{ + int rc = 0; + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + /* inst must be locked */ + rc = __strict_inst_check(inst, __func__); + if (rc) { + i_vpr_e(inst, "%s(): inst was not locked\n", __func__); + return -EINVAL; + } + + switch (event) { + case MSM_VIDC_S_CTRL: + { + struct v4l2_ctrl *ctrl = (struct v4l2_ctrl *)data; + u32 cap_id = msm_vidc_get_cap_id(inst, ctrl->id); + + if (cap_id == INST_CAP_NONE) { + i_vpr_e(inst, "%s: invalid cap_id %u\n", __func__, cap_id); + return -EINVAL; + } + + /* disallow */ + if (!(inst->capabilities->cap[cap_id].flags & CAP_FLAG_DYNAMIC_ALLOWED)) { + i_vpr_e(inst, "%s: cap_id %#x not allowed in state %s\n", + __func__, cap_id, state_name(inst->state)); + return -EINVAL; + } + + rc = msm_vidc_s_ctrl(inst, ctrl); + if (rc) + return rc; + break; + } + case MSM_VIDC_STREAMOFF: + { + struct vb2_queue *q = (struct vb2_queue *)data; + + /* disallow */ + if (q->type == INPUT_META_PLANE || q->type == OUTPUT_META_PLANE) { + i_vpr_e(inst, "%s: type %d is %s in state %s\n", + __func__, q->type, allow_name(MSM_VIDC_DISALLOW), + state_name(inst->state)); + return -EINVAL; + } + + /* sanitize type field */ + if (q->type != INPUT_MPLANE && q->type != OUTPUT_MPLANE) { + i_vpr_e(inst, "%s: invalid type %d\n", __func__, q->type); + return -EINVAL; + } + + rc = msm_vidc_stop_streaming(inst, q); + if (rc) + return rc; + break; + } + case MSM_VIDC_CMD_START: + { + rc = msm_vidc_start_cmd(inst); + if (rc) + return rc; + break; + } + case MSM_VIDC_CMD_STOP: + { + rc = msm_vidc_stop_cmd(inst); + if (rc) + return rc; + break; + } + case MSM_VIDC_BUF_QUEUE: + { + struct msm_vidc_buffer *buf = (struct msm_vidc_buffer *)data; + + /* defer meta port */ + if (buf->type == MSM_VIDC_BUF_INPUT_META || buf->type == MSM_VIDC_BUF_OUTPUT_META) { + print_vidc_buffer(VIDC_LOW, "low ", "qbuf deferred", inst, buf); + return 0; + } + + /* disallow */ + if (buf->type != MSM_VIDC_BUF_INPUT && buf->type != MSM_VIDC_BUF_OUTPUT) { + i_vpr_e(inst, "%s: invalid buf type %u\n", __func__, buf->type); + return -EINVAL; + } + + rc = msm_vidc_buf_queue(inst, buf); + if (rc) + return rc; + break; + } + default: { + i_vpr_e(inst, "%s: unexpected event %s\n", __func__, event_name(event)); + return -EINVAL; + } + } + + return rc; +} + +static int msm_vidc_close_state(struct msm_vidc_inst *inst, + enum msm_vidc_event event, void *data) +{ + int rc = 0; + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + /* inst must be locked */ + rc = __strict_inst_check(inst, __func__); + if (rc) { + i_vpr_e(inst, "%s(): inst was not locked\n", __func__); + return -EINVAL; + } + + i_vpr_e(inst, "%s: unexpected event %s\n", __func__, event_name(event)); + + return -EINVAL; +} + +static int msm_vidc_error_state(struct msm_vidc_inst *inst, + enum msm_vidc_event event, void *data) +{ + int rc = 0; + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + /* inst must be locked */ + rc = __strict_inst_check(inst, __func__); + if (rc) { + i_vpr_e(inst, "%s(): inst was not locked\n", __func__); + return -EINVAL; + } + + switch (event) { + case MSM_VIDC_STREAMOFF: + { + struct vb2_queue *q = (struct vb2_queue *)data; + + rc = msm_vidc_stop_streaming(inst, q); + if (rc) + return rc; + break; + } + default: { + i_vpr_e(inst, "%s: unexpected event %s\n", __func__, event_name(event)); + return -EINVAL; + } + } + + return rc; +} + +struct msm_vidc_state_handle { + enum msm_vidc_state state; + int (*handle)(struct msm_vidc_inst *inst, + enum msm_vidc_event event, void *data); +}; + +static struct msm_vidc_state_handle *msm_vidc_get_state_handle( + struct msm_vidc_inst *inst, + enum msm_vidc_state req_state) +{ + int cnt; + struct msm_vidc_state_handle *inst_state_handle = NULL; + static struct msm_vidc_state_handle state_handle[] = { + {MSM_VIDC_OPEN, msm_vidc_open_state }, + {MSM_VIDC_INPUT_STREAMING, msm_vidc_input_streaming_state }, + {MSM_VIDC_OUTPUT_STREAMING, msm_vidc_output_streaming_state }, + {MSM_VIDC_STREAMING, msm_vidc_streaming_state }, + {MSM_VIDC_CLOSE, msm_vidc_close_state }, + {MSM_VIDC_ERROR, msm_vidc_error_state }, + }; + + for (cnt = 0; cnt < ARRAY_SIZE(state_handle); cnt++) { + if (state_handle[cnt].state == req_state) { + inst_state_handle = &state_handle[cnt]; + break; + } + } + + /* check if req_state does not exist in the table */ + if (cnt == ARRAY_SIZE(state_handle)) { + i_vpr_e(inst, "%s: invalid state %s\n", __func__, state_name(req_state)); + return inst_state_handle; + } + + return inst_state_handle; +} + +int msm_vidc_update_state(struct msm_vidc_inst *inst, + enum msm_vidc_state request_state, const char *func) +{ + struct msm_vidc_state_handle *state_handle = NULL; + int rc = 0; + + /* get inst state handler for requested state */ + state_handle = msm_vidc_get_state_handle(inst, request_state); + if (!state_handle) + return -EINVAL; + + if (request_state == MSM_VIDC_ERROR) + i_vpr_e(inst, FMT_STRING_STATE_CHANGE, + func, state_name(request_state), state_name(inst->state)); + else + i_vpr_h(inst, FMT_STRING_STATE_CHANGE, + func, state_name(request_state), state_name(inst->state)); + + trace_msm_vidc_common_state_change(inst, func, state_name(inst->state), + state_name(request_state)); + + /* finally update inst state and handler */ + inst->state = state_handle->state; + inst->event_handle = state_handle->handle; + + return rc; +} + +struct msm_vidc_state_allow { + enum msm_vidc_state from; + enum msm_vidc_state to; + enum msm_vidc_allow allow; +}; + +enum msm_vidc_allow msm_vidc_allow_state_change( + struct msm_vidc_inst *inst, + enum msm_vidc_state req_state) +{ + int cnt; + enum msm_vidc_allow allow = MSM_VIDC_DISALLOW; + static struct msm_vidc_state_allow state[] = { + /* from, to, allow */ + {MSM_VIDC_OPEN, MSM_VIDC_OPEN, MSM_VIDC_IGNORE }, + {MSM_VIDC_OPEN, MSM_VIDC_INPUT_STREAMING, MSM_VIDC_ALLOW }, + {MSM_VIDC_OPEN, MSM_VIDC_OUTPUT_STREAMING, MSM_VIDC_ALLOW }, + {MSM_VIDC_OPEN, MSM_VIDC_STREAMING, MSM_VIDC_DISALLOW }, + {MSM_VIDC_OPEN, MSM_VIDC_CLOSE, MSM_VIDC_ALLOW }, + {MSM_VIDC_OPEN, MSM_VIDC_ERROR, MSM_VIDC_ALLOW }, + + {MSM_VIDC_INPUT_STREAMING, MSM_VIDC_OPEN, MSM_VIDC_ALLOW }, + {MSM_VIDC_INPUT_STREAMING, MSM_VIDC_INPUT_STREAMING, MSM_VIDC_IGNORE }, + {MSM_VIDC_INPUT_STREAMING, MSM_VIDC_OUTPUT_STREAMING, MSM_VIDC_DISALLOW }, + {MSM_VIDC_INPUT_STREAMING, MSM_VIDC_STREAMING, MSM_VIDC_ALLOW }, + {MSM_VIDC_INPUT_STREAMING, MSM_VIDC_CLOSE, MSM_VIDC_ALLOW }, + {MSM_VIDC_INPUT_STREAMING, MSM_VIDC_ERROR, MSM_VIDC_ALLOW }, + + {MSM_VIDC_OUTPUT_STREAMING, MSM_VIDC_OPEN, MSM_VIDC_ALLOW }, + {MSM_VIDC_OUTPUT_STREAMING, MSM_VIDC_INPUT_STREAMING, MSM_VIDC_DISALLOW }, + {MSM_VIDC_OUTPUT_STREAMING, MSM_VIDC_OUTPUT_STREAMING, MSM_VIDC_IGNORE }, + {MSM_VIDC_OUTPUT_STREAMING, MSM_VIDC_STREAMING, MSM_VIDC_ALLOW }, + {MSM_VIDC_OUTPUT_STREAMING, MSM_VIDC_CLOSE, MSM_VIDC_ALLOW }, + {MSM_VIDC_OUTPUT_STREAMING, MSM_VIDC_ERROR, MSM_VIDC_ALLOW }, + + {MSM_VIDC_STREAMING, MSM_VIDC_OPEN, MSM_VIDC_DISALLOW }, + {MSM_VIDC_STREAMING, MSM_VIDC_INPUT_STREAMING, MSM_VIDC_ALLOW }, + {MSM_VIDC_STREAMING, MSM_VIDC_OUTPUT_STREAMING, MSM_VIDC_ALLOW }, + {MSM_VIDC_STREAMING, MSM_VIDC_STREAMING, MSM_VIDC_IGNORE }, + {MSM_VIDC_STREAMING, MSM_VIDC_CLOSE, MSM_VIDC_ALLOW }, + {MSM_VIDC_STREAMING, MSM_VIDC_ERROR, MSM_VIDC_ALLOW }, + + {MSM_VIDC_CLOSE, MSM_VIDC_OPEN, MSM_VIDC_DISALLOW }, + {MSM_VIDC_CLOSE, MSM_VIDC_INPUT_STREAMING, MSM_VIDC_DISALLOW }, + {MSM_VIDC_CLOSE, MSM_VIDC_OUTPUT_STREAMING, MSM_VIDC_DISALLOW }, + {MSM_VIDC_CLOSE, MSM_VIDC_STREAMING, MSM_VIDC_DISALLOW }, + {MSM_VIDC_CLOSE, MSM_VIDC_CLOSE, MSM_VIDC_IGNORE }, + {MSM_VIDC_CLOSE, MSM_VIDC_ERROR, MSM_VIDC_IGNORE }, + + {MSM_VIDC_ERROR, MSM_VIDC_OPEN, MSM_VIDC_IGNORE }, + {MSM_VIDC_ERROR, MSM_VIDC_INPUT_STREAMING, MSM_VIDC_IGNORE }, + {MSM_VIDC_ERROR, MSM_VIDC_OUTPUT_STREAMING, MSM_VIDC_IGNORE }, + {MSM_VIDC_ERROR, MSM_VIDC_STREAMING, MSM_VIDC_IGNORE }, + {MSM_VIDC_ERROR, MSM_VIDC_CLOSE, MSM_VIDC_ALLOW }, + {MSM_VIDC_ERROR, MSM_VIDC_ERROR, MSM_VIDC_IGNORE }, + }; + + for (cnt = 0; cnt < ARRAY_SIZE(state); cnt++) { + if (state[cnt].from == inst->state && state[cnt].to == req_state) { + allow = state[cnt].allow; + break; + } + } + + return allow; +} diff --git a/driver/vidc/src/msm_vidc_v4l2.c b/driver/vidc/src/msm_vidc_v4l2.c index f7b37ef78d..2fc8ea9662 100644 --- a/driver/vidc/src/msm_vidc_v4l2.c +++ b/driver/vidc/src/msm_vidc_v4l2.c @@ -166,7 +166,7 @@ int msm_v4l2_s_fmt(struct file *filp, void *fh, rc = -EBUSY; goto unlock; } - rc = msm_vidc_s_fmt((void *)inst, f); + rc = inst->event_handle(inst, MSM_VIDC_S_FMT, f); if (rc) goto unlock; @@ -332,7 +332,7 @@ int msm_v4l2_reqbufs(struct file *filp, void *fh, client_lock(inst, __func__); inst_lock(inst, __func__); - rc = msm_vidc_reqbufs((void *)inst, b); + rc = inst->event_handle(inst, MSM_VIDC_REQBUFS, b); if (rc) goto unlock; @@ -437,11 +437,11 @@ int msm_v4l2_qbuf(struct file *filp, void *fh, } /* - * do not acquire inst lock here. acquire it in msm_vidc_buf_queue. - * for requests, msm_vidc_buf_queue() is not called from here. + * do not acquire inst lock here. acquire it in msm_vb2_buf_queue. + * for requests, msm_vb2_buf_queue() is not called from here. * instead it's called as part of msm_v4l2_request_queue(). * hence acquire the inst lock in common function i.e - * msm_vidc_buf_queue, to handle both requests and non-request + * msm_vb2_buf_queue, to handle both requests and non-request * scenarios. */ rc = msm_vidc_qbuf(inst, vdev->v4l2_dev->mdev, b); @@ -618,6 +618,7 @@ int msm_v4l2_decoder_cmd(struct file *filp, void *fh, struct v4l2_decoder_cmd *dec) { struct msm_vidc_inst *inst = get_vidc_inst(filp, fh); + enum msm_vidc_event event; int rc = 0; inst = get_inst_ref(g_core, inst); @@ -633,7 +634,19 @@ int msm_v4l2_decoder_cmd(struct file *filp, void *fh, rc = -EBUSY; goto unlock; } - rc = msm_vidc_cmd((void *)inst, (union msm_v4l2_cmd *)dec); + if (!dec) { + i_vpr_e(inst, "%s: invalid params\n", __func__); + rc = -EINVAL; + goto unlock; + } + if (dec->cmd != V4L2_DEC_CMD_START && + dec->cmd != V4L2_DEC_CMD_STOP) { + i_vpr_e(inst, "%s: invalid cmd %#x\n", __func__, dec->cmd); + rc = -EINVAL; + goto unlock; + } + event = (dec->cmd == V4L2_DEC_CMD_START ? MSM_VIDC_CMD_START : MSM_VIDC_CMD_STOP); + rc = inst->event_handle(inst, event, NULL); if (rc) goto unlock; @@ -680,6 +693,7 @@ int msm_v4l2_encoder_cmd(struct file *filp, void *fh, struct v4l2_encoder_cmd *enc) { struct msm_vidc_inst *inst = get_vidc_inst(filp, fh); + enum msm_vidc_event event; int rc = 0; inst = get_inst_ref(g_core, inst); @@ -695,7 +709,19 @@ int msm_v4l2_encoder_cmd(struct file *filp, void *fh, rc = -EBUSY; goto unlock; } - rc = msm_vidc_cmd((void *)inst, (union msm_v4l2_cmd *)enc); + if (!enc) { + i_vpr_e(inst, "%s: invalid params\n", __func__); + rc = -EINVAL; + goto unlock; + } + if (enc->cmd != V4L2_ENC_CMD_START && + enc->cmd != V4L2_ENC_CMD_STOP) { + i_vpr_e(inst, "%s: invalid cmd %#x\n", __func__, enc->cmd); + rc = -EINVAL; + goto unlock; + } + event = (enc->cmd == V4L2_ENC_CMD_START ? MSM_VIDC_CMD_START : MSM_VIDC_CMD_STOP); + rc = inst->event_handle(inst, event, NULL); if (rc) goto unlock; diff --git a/driver/vidc/src/msm_vidc_vb2.c b/driver/vidc/src/msm_vidc_vb2.c index ec9c37da68..4d5ac278f8 100644 --- a/driver/vidc/src/msm_vidc_vb2.c +++ b/driver/vidc/src/msm_vidc_vb2.c @@ -239,7 +239,7 @@ exit: return; } -int msm_vidc_queue_setup(struct vb2_queue *q, +int msm_vb2_queue_setup(struct vb2_queue *q, unsigned int *num_buffers, unsigned int *num_planes, unsigned int sizes[], struct device *alloc_devs[]) { @@ -366,11 +366,10 @@ int msm_vidc_queue_setup(struct vb2_queue *q, return rc; } -int msm_vidc_start_streaming(struct vb2_queue *q, unsigned int count) +int msm_vb2_start_streaming(struct vb2_queue *q, unsigned int count) { int rc = 0; struct msm_vidc_inst *inst; - enum msm_vidc_buffer_type buf_type; if (!q || !q->drv_priv) { d_vpr_e("%s: invalid input, q = %pK\n", __func__, q); @@ -391,22 +390,46 @@ int msm_vidc_start_streaming(struct vb2_queue *q, unsigned int count) goto unlock; } - if (!msm_vidc_allow_streamon(inst, q->type)) { - rc = -EBUSY; + rc = inst->event_handle(inst, MSM_VIDC_STREAMON, q); + if (rc) { + i_vpr_e(inst, "Streamon: %s failed\n", v4l2_type_name(q->type)); + msm_vidc_change_state(inst, MSM_VIDC_ERROR, __func__); goto unlock; } +unlock: + inst_unlock(inst, __func__); + client_unlock(inst, __func__); + put_inst(inst); + + return rc; +} + +int msm_vidc_start_streaming(struct msm_vidc_inst *inst, struct vb2_queue *q) +{ + enum msm_vidc_buffer_type buf_type; + int rc = 0; + + if (!inst || !q) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (!msm_vidc_allow_streamon(inst, q->type)) + return -EBUSY; + if (q->type == INPUT_META_PLANE || q->type == OUTPUT_META_PLANE) { i_vpr_h(inst, "%s: nothing to start on %s\n", __func__, v4l2_type_name(q->type)); - rc = 0; - goto unlock; + return 0; + } + if (q->type != INPUT_MPLANE && q->type != OUTPUT_MPLANE) { + i_vpr_e(inst, "%s: invalid type %d\n", __func__, q->type); + return -EINVAL; } if (!is_decode_session(inst) && !is_encode_session(inst)) { - i_vpr_e(inst, "%s: invalid session %d\n", - __func__, inst->domain); - rc = -EINVAL; - goto unlock; + i_vpr_e(inst, "%s: invalid session %d\n", __func__, inst->domain); + return -EINVAL; } i_vpr_h(inst, "Streamon: %s\n", v4l2_type_name(q->type)); @@ -414,30 +437,30 @@ int msm_vidc_start_streaming(struct vb2_queue *q, unsigned int count) inst->once_per_session_set = true; rc = msm_vidc_prepare_dependency_list(inst); if (rc) - goto unlock; + return rc; rc = msm_vidc_session_set_codec(inst); if (rc) - goto unlock; + return rc; rc = msm_vidc_session_set_secure_mode(inst); if (rc) - goto unlock; + return rc; if (is_encode_session(inst)) { rc = msm_vidc_alloc_and_queue_session_internal_buffers(inst, MSM_VIDC_BUF_ARP); if (rc) - goto unlock; + return rc; } else if(is_decode_session(inst)) { rc = msm_vidc_session_set_default_header(inst); if (rc) - goto unlock; + return rc; rc = msm_vidc_alloc_and_queue_session_internal_buffers(inst, MSM_VIDC_BUF_PERSIST); if (rc) - goto unlock; + return rc; } } @@ -452,33 +475,26 @@ int msm_vidc_start_streaming(struct vb2_queue *q, unsigned int count) rc = msm_vdec_streamon_input(inst); else if (is_encode_session(inst)) rc = msm_venc_streamon_input(inst); - else - goto unlock; } else if (q->type == OUTPUT_MPLANE) { if (is_decode_session(inst)) rc = msm_vdec_streamon_output(inst); else if (is_encode_session(inst)) rc = msm_venc_streamon_output(inst); - else - goto unlock; - } else { - i_vpr_e(inst, "%s: invalid type %d\n", __func__, q->type); - goto unlock; } if (rc) - goto unlock; + return rc; /* print final buffer counts & size details */ msm_vidc_print_buffer_info(inst); buf_type = v4l2_type_to_driver(q->type, __func__); if (!buf_type) - goto unlock; + return -EINVAL; /* queue pending buffers */ rc = msm_vidc_queue_deferred_buffers(inst, buf_type); if (rc) - goto unlock; + return rc; /* initialize statistics timer(one time) */ if (!inst->stats.time_ms) @@ -487,71 +503,40 @@ int msm_vidc_start_streaming(struct vb2_queue *q, unsigned int count) /* schedule to print buffer statistics */ rc = schedule_stats_work(inst); if (rc) - goto unlock; + return rc; if ((q->type == INPUT_MPLANE && inst->bufq[OUTPUT_PORT].vb2q->streaming) || (q->type == OUTPUT_MPLANE && inst->bufq[INPUT_PORT].vb2q->streaming)) { rc = msm_vidc_get_properties(inst); if (rc) - goto unlock; + return rc; } i_vpr_h(inst, "Streamon: %s successful\n", v4l2_type_name(q->type)); - -unlock: - if (rc) { - i_vpr_e(inst, "Streamon: %s failed\n", v4l2_type_name(q->type)); - msm_vidc_change_state(inst, MSM_VIDC_ERROR, __func__); - } - inst_unlock(inst, __func__); - client_unlock(inst, __func__); - put_inst(inst); return rc; } -void msm_vidc_stop_streaming(struct vb2_queue *q) +int msm_vidc_stop_streaming(struct msm_vidc_inst *inst, struct vb2_queue *q) { int rc = 0; - struct msm_vidc_inst *inst; - enum msm_vidc_allow allow; - if (!q || !q->drv_priv) { - d_vpr_e("%s: invalid input, q = %pK\n", __func__, q); - return; - } - inst = q->drv_priv; - inst = get_inst_ref(g_core, inst); - if (!inst || !inst->core) { + if (!inst || !q) { d_vpr_e("%s: invalid params\n", __func__); - return; + return -EINVAL; } - client_lock(inst, __func__); - inst_lock(inst, __func__); if (q->type == INPUT_META_PLANE || q->type == OUTPUT_META_PLANE) { i_vpr_h(inst, "%s: nothing to stop on %s\n", __func__, v4l2_type_name(q->type)); - rc = 0; - goto unlock; + return 0; } - - allow = msm_vidc_allow_streamoff(inst, q->type); - if (allow == MSM_VIDC_DISALLOW) { - rc = -EBUSY; - goto unlock; - } else if (allow == MSM_VIDC_IGNORE) { - rc = 0; - goto unlock; - } else if (allow != MSM_VIDC_ALLOW) { - rc = -EINVAL; - goto unlock; + if (q->type != INPUT_MPLANE && q->type != OUTPUT_MPLANE) { + i_vpr_e(inst, "%s: invalid type %d\n", __func__, q->type); + return -EINVAL; } - if (!is_decode_session(inst) && !is_encode_session(inst)) { - i_vpr_e(inst, "%s: invalid session %d\n", - __func__, inst->domain); - rc = -EINVAL; - goto unlock; + i_vpr_e(inst, "%s: invalid session %d\n", __func__, inst->domain); + return -EINVAL; } i_vpr_h(inst, "Streamoff: %s\n", v4l2_type_name(q->type)); @@ -565,13 +550,9 @@ void msm_vidc_stop_streaming(struct vb2_queue *q) rc = msm_vdec_streamoff_output(inst); else if (is_encode_session(inst)) rc = msm_venc_streamoff_output(inst); - } else { - i_vpr_e(inst, "%s: invalid type %d\n", __func__, q->type); - rc = -EINVAL; - goto unlock; } if (rc) - goto unlock; + return rc; /* Input port streamoff */ if (q->type == INPUT_MPLANE) { @@ -583,19 +564,43 @@ void msm_vidc_stop_streaming(struct vb2_queue *q) } i_vpr_h(inst, "Streamoff: %s successful\n", v4l2_type_name(q->type)); + return rc; +} -unlock: +void msm_vb2_stop_streaming(struct vb2_queue *q) +{ + struct msm_vidc_inst *inst; + int rc = 0; + + if (!q || !q->drv_priv) { + d_vpr_e("%s: invalid input, q = %pK\n", __func__, q); + return; + } + inst = q->drv_priv; + inst = get_inst_ref(g_core, inst); + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return; + } + + client_lock(inst, __func__); + inst_lock(inst, __func__); + rc = inst->event_handle(inst, MSM_VIDC_STREAMOFF, q); if (rc) { i_vpr_e(inst, "Streamoff: %s failed\n", v4l2_type_name(q->type)); msm_vidc_change_state(inst, MSM_VIDC_ERROR, __func__); + goto unlock; } + +unlock: inst_unlock(inst, __func__); client_unlock(inst, __func__); put_inst(inst); + return; } -void msm_vidc_buf_queue(struct vb2_buffer *vb2) +void msm_vb2_buf_queue(struct vb2_buffer *vb2) { int rc = 0; struct msm_vidc_inst *inst; @@ -700,11 +705,11 @@ unlock: put_inst(inst); } -void msm_vidc_buf_cleanup(struct vb2_buffer *vb) +void msm_vb2_buf_cleanup(struct vb2_buffer *vb) { } -int msm_vidc_buf_out_validate(struct vb2_buffer *vb) +int msm_vb2_buf_out_validate(struct vb2_buffer *vb) { struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); @@ -712,7 +717,7 @@ int msm_vidc_buf_out_validate(struct vb2_buffer *vb) return 0; } -void msm_vidc_buf_request_complete(struct vb2_buffer *vb) +void msm_vb2_request_complete(struct vb2_buffer *vb) { struct msm_vidc_inst *inst = vb2_get_drv_priv(vb->vb2_queue); diff --git a/driver/vidc/src/venus_hfi_queue.c b/driver/vidc/src/venus_hfi_queue.c index 4597f49e81..36f276d244 100644 --- a/driver/vidc/src/venus_hfi_queue.c +++ b/driver/vidc/src/venus_hfi_queue.c @@ -509,7 +509,7 @@ int venus_hfi_queue_init(struct msm_vidc_core *core) } memset(&mem, 0, sizeof(mem)); - mem.type = MSM_VIDC_BUF_QUEUE; + mem.type = MSM_VIDC_BUF_INTERFACE_QUEUE; mem.region = MSM_VIDC_NON_SECURE; mem.size = TOTAL_QSIZE; mem.secure = false; @@ -570,7 +570,7 @@ int venus_hfi_queue_init(struct msm_vidc_core *core) /* sfr buffer */ memset(&mem, 0, sizeof(mem)); - mem.type = MSM_VIDC_BUF_QUEUE; + mem.type = MSM_VIDC_BUF_INTERFACE_QUEUE; mem.region = MSM_VIDC_NON_SECURE; mem.size = ALIGNED_SFR_SIZE; mem.secure = false; @@ -610,7 +610,7 @@ int venus_hfi_queue_init(struct msm_vidc_core *core) /* allocate 4k buffer for HFI_MMAP_ADDR */ memset(&mem, 0, sizeof(mem)); - mem.type = MSM_VIDC_BUF_QUEUE; + mem.type = MSM_VIDC_BUF_INTERFACE_QUEUE; mem.region = MSM_VIDC_NON_SECURE; mem.size = ALIGNED_MMAP_BUF_SIZE; mem.secure = false; From c175e36454fcdec7e8d7e5d6d89334ee0ceaf776 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Mon, 30 Jan 2023 10:53:20 +0530 Subject: [PATCH 0802/1061] video: driver: state handling code movement state handling changes were spread across multiple files. So re-arrange all state related handling changes into msm_vidc_state.h/.c file. Change-Id: I3826daa678d1e2b5ce7e74380d465e70b1b824c6 Signed-off-by: Govindaraj Rajagopal --- driver/vidc/inc/msm_vidc_driver.h | 19 -- driver/vidc/inc/msm_vidc_inst.h | 28 -- driver/vidc/inc/msm_vidc_state.h | 43 ++- driver/vidc/src/msm_vidc_driver.c | 137 ---------- driver/vidc/src/msm_vidc_state.c | 419 ++++++++++++++++++++---------- 5 files changed, 321 insertions(+), 325 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 76304676b8..931a2bcc2f 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -359,17 +359,6 @@ static inline bool is_enc_slice_delivery_mode(struct msm_vidc_inst *inst) inst->capabilities->cap[DELIVERY_MODE].value); } -static inline bool is_state(struct msm_vidc_inst *inst, enum msm_vidc_state state) -{ - return inst->state == state; -} - -static inline bool is_sub_state(struct msm_vidc_inst *inst, - enum msm_vidc_sub_state sub_state) -{ - return (inst->sub_state & sub_state); -} - const char *cap_name(enum msm_vidc_inst_capability_type cap_id); const char *v4l2_pixelfmt_name(struct msm_vidc_inst *inst, u32 pixelfmt); const char *v4l2_type_name(u32 port); @@ -400,12 +389,6 @@ u32 v4l2_matrix_coeff_from_driver(struct msm_vidc_inst *inst, int v4l2_type_to_driver_port(struct msm_vidc_inst *inst, u32 type, const char *func); const char *allow_name(enum msm_vidc_allow allow); -const char *state_name(enum msm_vidc_state state); -int msm_vidc_change_state(struct msm_vidc_inst *inst, - enum msm_vidc_state request_state, const char *func); -int msm_vidc_change_sub_state(struct msm_vidc_inst *inst, - enum msm_vidc_sub_state clear_sub_state, - enum msm_vidc_sub_state set_sub_state, const char *func); int msm_vidc_create_internal_buffer(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type buffer_type, u32 index); int msm_vidc_get_internal_buffers(struct msm_vidc_inst *inst, @@ -436,8 +419,6 @@ int msm_vidc_change_core_state(struct msm_vidc_core *core, int msm_vidc_change_core_sub_state(struct msm_vidc_core *core, enum msm_vidc_core_sub_state clear_sub_states, enum msm_vidc_core_sub_state set_sub_states, const char *func); -int prepare_sub_state_name(enum msm_vidc_sub_state sub_state, - char *buf, u32 size); int msm_vidc_core_init(struct msm_vidc_core *core); int msm_vidc_core_init_wait(struct msm_vidc_core *core); int msm_vidc_core_deinit(struct msm_vidc_core *core, bool force); diff --git a/driver/vidc/inc/msm_vidc_inst.h b/driver/vidc/inc/msm_vidc_inst.h index 7ea7bd963b..c6571ed65e 100644 --- a/driver/vidc/inc/msm_vidc_inst.h +++ b/driver/vidc/inc/msm_vidc_inst.h @@ -14,15 +14,6 @@ struct msm_vidc_inst; -#define FOREACH_STATE(STATE) { \ - STATE(OPEN) \ - STATE(INPUT_STREAMING) \ - STATE(OUTPUT_STREAMING) \ - STATE(STREAMING) \ - STATE(CLOSE) \ - STATE(ERROR) \ -} - #define call_session_op(c, op, ...) \ (((c) && (c)->session_ops && (c)->session_ops->op) ? \ ((c)->session_ops->op(__VA_ARGS__)) : 0) @@ -68,25 +59,6 @@ struct msm_vidc_buffers_info { struct msm_vidc_buffers partial_data; }; -enum msm_vidc_state FOREACH_STATE(GENERATE_MSM_VIDC_ENUM); - -#define MSM_VIDC_SUB_STATE_NONE 0 -#define MSM_VIDC_MAX_SUB_STATES 6 -/* - * max value of inst->sub_state if all - * the 6 valid bits are set i.e 111111==>63 - */ -#define MSM_VIDC_MAX_SUB_STATE_VALUE ((1 << MSM_VIDC_MAX_SUB_STATES) - 1) - -enum msm_vidc_sub_state { - MSM_VIDC_DRAIN = BIT(0), - MSM_VIDC_DRC = BIT(1), - MSM_VIDC_DRAIN_LAST_BUFFER = BIT(2), - MSM_VIDC_DRC_LAST_BUFFER = BIT(3), - MSM_VIDC_INPUT_PAUSE = BIT(4), - MSM_VIDC_OUTPUT_PAUSE = BIT(5), -}; - struct buf_queue { struct vb2_queue *vb2q; }; diff --git a/driver/vidc/inc/msm_vidc_state.h b/driver/vidc/inc/msm_vidc_state.h index 12aa5045f3..d995a044da 100644 --- a/driver/vidc/inc/msm_vidc_state.h +++ b/driver/vidc/inc/msm_vidc_state.h @@ -10,8 +10,6 @@ #include "msm_vidc_internal.h" struct msm_vidc_core; -enum msm_vidc_state; -enum msm_vidc_sub_state; #define FOREACH_CORE_STATE(CORE_STATE) { \ CORE_STATE(CORE_DEINIT) \ @@ -50,6 +48,34 @@ enum msm_vidc_core_event_type { CORE_EVENT_UPDATE_SUB_STATE = BIT(1), }; +#define FOREACH_STATE(STATE) { \ + STATE(OPEN) \ + STATE(INPUT_STREAMING) \ + STATE(OUTPUT_STREAMING) \ + STATE(STREAMING) \ + STATE(CLOSE) \ + STATE(ERROR) \ +} + +enum msm_vidc_state FOREACH_STATE(GENERATE_MSM_VIDC_ENUM); + +#define MSM_VIDC_SUB_STATE_NONE 0 +#define MSM_VIDC_MAX_SUB_STATES 6 +/* + * max value of inst->sub_state if all + * the 6 valid bits are set i.e 111111==>63 + */ +#define MSM_VIDC_MAX_SUB_STATE_VALUE ((1 << MSM_VIDC_MAX_SUB_STATES) - 1) + +enum msm_vidc_sub_state { + MSM_VIDC_DRAIN = BIT(0), + MSM_VIDC_DRC = BIT(1), + MSM_VIDC_DRAIN_LAST_BUFFER = BIT(2), + MSM_VIDC_DRC_LAST_BUFFER = BIT(3), + MSM_VIDC_INPUT_PAUSE = BIT(4), + MSM_VIDC_OUTPUT_PAUSE = BIT(5), +}; + enum msm_vidc_event FOREACH_EVENT(GENERATE_MSM_VIDC_ENUM); /* core statemachine functions */ @@ -67,8 +93,15 @@ const char *core_sub_state_name(enum msm_vidc_core_sub_state sub_state); /* inst statemachine functions */ int msm_vidc_update_state(struct msm_vidc_inst *inst, enum msm_vidc_state request_state, const char *func); -enum msm_vidc_allow msm_vidc_allow_state_change( - struct msm_vidc_inst *inst, - enum msm_vidc_state req_state); +int msm_vidc_change_state(struct msm_vidc_inst *inst, + enum msm_vidc_state request_state, const char *func); +int msm_vidc_change_sub_state(struct msm_vidc_inst *inst, + enum msm_vidc_sub_state clear_sub_state, + enum msm_vidc_sub_state set_sub_state, const char *func); +const char *state_name(enum msm_vidc_state state); +const char *sub_state_name(enum msm_vidc_sub_state sub_state); +bool is_state(struct msm_vidc_inst *inst, enum msm_vidc_state state); +bool is_sub_state(struct msm_vidc_inst *inst, + enum msm_vidc_sub_state sub_state); #endif // _MSM_VIDC_STATE_H_ diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 7b39fd855c..124be0db09 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -99,59 +99,6 @@ exit: return name; } -/* do not modify the state names as it is used in test scripts */ -static const char * const state_name_arr[] = - FOREACH_STATE(GENERATE_STRING); - -const char *state_name(enum msm_vidc_state state) -{ - const char *name = "UNKNOWN STATE"; - - if (state >= ARRAY_SIZE(state_name_arr)) - goto exit; - - name = state_name_arr[state]; - -exit: - return name; -} - -const char *sub_state_name(enum msm_vidc_sub_state sub_state) -{ - switch (sub_state) { - case MSM_VIDC_DRAIN: return "DRAIN "; - case MSM_VIDC_DRC: return "DRC "; - case MSM_VIDC_DRAIN_LAST_BUFFER: return "DRAIN_LAST_BUFFER "; - case MSM_VIDC_DRC_LAST_BUFFER: return "DRC_LAST_BUFFER "; - case MSM_VIDC_INPUT_PAUSE: return "INPUT_PAUSE "; - case MSM_VIDC_OUTPUT_PAUSE: return "OUTPUT_PAUSE "; - } - - return "SUB_STATE_NONE"; -} - -int prepare_sub_state_name(enum msm_vidc_sub_state sub_state, - char *buf, u32 size) -{ - int i = 0; - - if (!buf || !size) - return -EINVAL; - - strscpy(buf, "\0", size); - if (sub_state == MSM_VIDC_SUB_STATE_NONE) { - strscpy(buf, "SUB_STATE_NONE", size); - return 0; - } - - for (i = 0; i < MSM_VIDC_MAX_SUB_STATES; i++) { - if (sub_state & BIT(i)) - strlcat(buf, sub_state_name(BIT(i)), size); - } - - return 0; -} - const char *v4l2_type_name(u32 port) { switch (port) { @@ -1013,90 +960,6 @@ int signal_session_msg_receipt(struct msm_vidc_inst *inst, return 0; } -int msm_vidc_change_state(struct msm_vidc_inst *inst, - enum msm_vidc_state request_state, const char *func) -{ - enum msm_vidc_allow allow; - int rc; - - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - if (is_session_error(inst)) { - i_vpr_h(inst, - "%s: inst is in bad state, can not change state to %s\n", - func, state_name(request_state)); - return 0; - } - - /* current and requested state is same */ - if (inst->state == request_state) - return 0; - - /* check if requested state movement is allowed */ - allow = msm_vidc_allow_state_change(inst, request_state); - if (allow != MSM_VIDC_ALLOW) { - i_vpr_e(inst, "%s: %s state change %s -> %s\n", func, - allow_name(allow), state_name(inst->state), - state_name(request_state)); - return (allow == MSM_VIDC_DISALLOW ? -EINVAL : 0); - } - - /* go ahead and update inst state */ - rc = msm_vidc_update_state(inst, request_state, func); - if (rc) - return rc; - - return 0; -} - -int msm_vidc_change_sub_state(struct msm_vidc_inst *inst, - enum msm_vidc_sub_state clear_sub_state, - enum msm_vidc_sub_state set_sub_state, const char *func) -{ - enum msm_vidc_sub_state prev_sub_state; - int rc = 0; - - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - if (is_session_error(inst)) { - i_vpr_h(inst, - "%s: inst is in bad state, can not change sub state\n", func); - return 0; - } - - if (!clear_sub_state && !set_sub_state) - return 0; - - if ((clear_sub_state & set_sub_state) || - (set_sub_state > MSM_VIDC_MAX_SUB_STATE_VALUE) || - (clear_sub_state > MSM_VIDC_MAX_SUB_STATE_VALUE)) { - i_vpr_e(inst, "%s: invalid sub states to clear %#x or set %#x\n", - func, clear_sub_state, set_sub_state); - return -EINVAL; - } - - prev_sub_state = inst->sub_state; - inst->sub_state |= set_sub_state; - inst->sub_state &= ~clear_sub_state; - - /* print substates only when there is a change */ - if (inst->sub_state != prev_sub_state) { - rc = prepare_sub_state_name(inst->sub_state, inst->sub_state_name, - sizeof(inst->sub_state_name)); - if (!rc) - i_vpr_h(inst, "%s: state %s and sub state changed to %s\n", - func, state_name(inst->state), inst->sub_state_name); - } - - return 0; -} - bool msm_vidc_allow_s_fmt(struct msm_vidc_inst *inst, u32 type) { bool allow = false; diff --git a/driver/vidc/src/msm_vidc_state.c b/driver/vidc/src/msm_vidc_state.c index 47f22241f4..2d83cb8444 100644 --- a/driver/vidc/src/msm_vidc_state.c +++ b/driver/vidc/src/msm_vidc_state.c @@ -496,6 +496,136 @@ int msm_vidc_change_core_sub_state(struct msm_vidc_core *core, return 0; } +/* do not modify the state names as it is used in test scripts */ +static const char * const state_name_arr[] = + FOREACH_STATE(GENERATE_STRING); + +const char *state_name(enum msm_vidc_state state) +{ + const char *name = "UNKNOWN STATE"; + + if (state >= ARRAY_SIZE(state_name_arr)) + goto exit; + + name = state_name_arr[state]; + +exit: + return name; +} + +bool is_state(struct msm_vidc_inst *inst, enum msm_vidc_state state) +{ + return inst->state == state; +} + +bool is_sub_state(struct msm_vidc_inst *inst, enum msm_vidc_sub_state sub_state) +{ + return (inst->sub_state & sub_state); +} + +const char *sub_state_name(enum msm_vidc_sub_state sub_state) +{ + switch (sub_state) { + case MSM_VIDC_DRAIN: return "DRAIN "; + case MSM_VIDC_DRC: return "DRC "; + case MSM_VIDC_DRAIN_LAST_BUFFER: return "DRAIN_LAST_BUFFER "; + case MSM_VIDC_DRC_LAST_BUFFER: return "DRC_LAST_BUFFER "; + case MSM_VIDC_INPUT_PAUSE: return "INPUT_PAUSE "; + case MSM_VIDC_OUTPUT_PAUSE: return "OUTPUT_PAUSE "; + } + + return "SUB_STATE_NONE"; +} + +static int prepare_sub_state_name(enum msm_vidc_sub_state sub_state, + char *buf, u32 size) +{ + int i = 0; + + if (!buf || !size) + return -EINVAL; + + strscpy(buf, "\0", size); + if (sub_state == MSM_VIDC_SUB_STATE_NONE) { + strscpy(buf, "SUB_STATE_NONE", size); + return 0; + } + + for (i = 0; i < MSM_VIDC_MAX_SUB_STATES; i++) { + if (sub_state & BIT(i)) + strlcat(buf, sub_state_name(BIT(i)), size); + } + + return 0; +} + +struct msm_vidc_state_allow { + enum msm_vidc_state from; + enum msm_vidc_state to; + enum msm_vidc_allow allow; +}; + +static enum msm_vidc_allow msm_vidc_allow_state_change( + struct msm_vidc_inst *inst, + enum msm_vidc_state req_state) +{ + int cnt; + enum msm_vidc_allow allow = MSM_VIDC_DISALLOW; + static struct msm_vidc_state_allow state[] = { + /* from, to, allow */ + {MSM_VIDC_OPEN, MSM_VIDC_OPEN, MSM_VIDC_IGNORE }, + {MSM_VIDC_OPEN, MSM_VIDC_INPUT_STREAMING, MSM_VIDC_ALLOW }, + {MSM_VIDC_OPEN, MSM_VIDC_OUTPUT_STREAMING, MSM_VIDC_ALLOW }, + {MSM_VIDC_OPEN, MSM_VIDC_STREAMING, MSM_VIDC_DISALLOW }, + {MSM_VIDC_OPEN, MSM_VIDC_CLOSE, MSM_VIDC_ALLOW }, + {MSM_VIDC_OPEN, MSM_VIDC_ERROR, MSM_VIDC_ALLOW }, + + {MSM_VIDC_INPUT_STREAMING, MSM_VIDC_OPEN, MSM_VIDC_ALLOW }, + {MSM_VIDC_INPUT_STREAMING, MSM_VIDC_INPUT_STREAMING, MSM_VIDC_IGNORE }, + {MSM_VIDC_INPUT_STREAMING, MSM_VIDC_OUTPUT_STREAMING, MSM_VIDC_DISALLOW }, + {MSM_VIDC_INPUT_STREAMING, MSM_VIDC_STREAMING, MSM_VIDC_ALLOW }, + {MSM_VIDC_INPUT_STREAMING, MSM_VIDC_CLOSE, MSM_VIDC_ALLOW }, + {MSM_VIDC_INPUT_STREAMING, MSM_VIDC_ERROR, MSM_VIDC_ALLOW }, + + {MSM_VIDC_OUTPUT_STREAMING, MSM_VIDC_OPEN, MSM_VIDC_ALLOW }, + {MSM_VIDC_OUTPUT_STREAMING, MSM_VIDC_INPUT_STREAMING, MSM_VIDC_DISALLOW }, + {MSM_VIDC_OUTPUT_STREAMING, MSM_VIDC_OUTPUT_STREAMING, MSM_VIDC_IGNORE }, + {MSM_VIDC_OUTPUT_STREAMING, MSM_VIDC_STREAMING, MSM_VIDC_ALLOW }, + {MSM_VIDC_OUTPUT_STREAMING, MSM_VIDC_CLOSE, MSM_VIDC_ALLOW }, + {MSM_VIDC_OUTPUT_STREAMING, MSM_VIDC_ERROR, MSM_VIDC_ALLOW }, + + {MSM_VIDC_STREAMING, MSM_VIDC_OPEN, MSM_VIDC_DISALLOW }, + {MSM_VIDC_STREAMING, MSM_VIDC_INPUT_STREAMING, MSM_VIDC_ALLOW }, + {MSM_VIDC_STREAMING, MSM_VIDC_OUTPUT_STREAMING, MSM_VIDC_ALLOW }, + {MSM_VIDC_STREAMING, MSM_VIDC_STREAMING, MSM_VIDC_IGNORE }, + {MSM_VIDC_STREAMING, MSM_VIDC_CLOSE, MSM_VIDC_ALLOW }, + {MSM_VIDC_STREAMING, MSM_VIDC_ERROR, MSM_VIDC_ALLOW }, + + {MSM_VIDC_CLOSE, MSM_VIDC_OPEN, MSM_VIDC_DISALLOW }, + {MSM_VIDC_CLOSE, MSM_VIDC_INPUT_STREAMING, MSM_VIDC_DISALLOW }, + {MSM_VIDC_CLOSE, MSM_VIDC_OUTPUT_STREAMING, MSM_VIDC_DISALLOW }, + {MSM_VIDC_CLOSE, MSM_VIDC_STREAMING, MSM_VIDC_DISALLOW }, + {MSM_VIDC_CLOSE, MSM_VIDC_CLOSE, MSM_VIDC_IGNORE }, + {MSM_VIDC_CLOSE, MSM_VIDC_ERROR, MSM_VIDC_IGNORE }, + + {MSM_VIDC_ERROR, MSM_VIDC_OPEN, MSM_VIDC_IGNORE }, + {MSM_VIDC_ERROR, MSM_VIDC_INPUT_STREAMING, MSM_VIDC_IGNORE }, + {MSM_VIDC_ERROR, MSM_VIDC_OUTPUT_STREAMING, MSM_VIDC_IGNORE }, + {MSM_VIDC_ERROR, MSM_VIDC_STREAMING, MSM_VIDC_IGNORE }, + {MSM_VIDC_ERROR, MSM_VIDC_CLOSE, MSM_VIDC_ALLOW }, + {MSM_VIDC_ERROR, MSM_VIDC_ERROR, MSM_VIDC_IGNORE }, + }; + + for (cnt = 0; cnt < ARRAY_SIZE(state); cnt++) { + if (state[cnt].from == inst->state && state[cnt].to == req_state) { + allow = state[cnt].allow; + break; + } + } + + return allow; +} + static int msm_vidc_open_state(struct msm_vidc_inst *inst, enum msm_vidc_event event, void *data) { @@ -611,6 +741,33 @@ static int msm_vidc_input_streaming_state(struct msm_vidc_inst *inst, } switch (event) { + case MSM_VIDC_BUF_QUEUE: + { + struct msm_vidc_buffer *buf = (struct msm_vidc_buffer *)data; + + /* defer meta port */ + if (buf->type == MSM_VIDC_BUF_INPUT_META || buf->type == MSM_VIDC_BUF_OUTPUT_META) { + print_vidc_buffer(VIDC_LOW, "low ", "qbuf deferred", inst, buf); + return 0; + } + + /* disallow */ + if (buf->type != MSM_VIDC_BUF_INPUT && buf->type != MSM_VIDC_BUF_OUTPUT) { + i_vpr_e(inst, "%s: invalid buf type %u\n", __func__, buf->type); + return -EINVAL; + } + + /* defer output port */ + if (buf->type == MSM_VIDC_BUF_OUTPUT) { + print_vidc_buffer(VIDC_LOW, "low ", "qbuf deferred", inst, buf); + return 0; + } + + rc = msm_vidc_buf_queue(inst, buf); + if (rc) + return rc; + break; + } case MSM_VIDC_S_FMT: { struct v4l2_format *f = (struct v4l2_format *)data; @@ -707,33 +864,6 @@ static int msm_vidc_input_streaming_state(struct msm_vidc_inst *inst, return rc; break; } - case MSM_VIDC_BUF_QUEUE: - { - struct msm_vidc_buffer *buf = (struct msm_vidc_buffer *)data; - - /* defer meta port */ - if (buf->type == MSM_VIDC_BUF_INPUT_META || buf->type == MSM_VIDC_BUF_OUTPUT_META) { - print_vidc_buffer(VIDC_LOW, "low ", "qbuf deferred", inst, buf); - return 0; - } - - /* disallow */ - if (buf->type != MSM_VIDC_BUF_INPUT && buf->type != MSM_VIDC_BUF_OUTPUT) { - i_vpr_e(inst, "%s: invalid buf type %u\n", __func__, buf->type); - return -EINVAL; - } - - /* defer output port */ - if (buf->type == MSM_VIDC_BUF_OUTPUT) { - print_vidc_buffer(VIDC_LOW, "low ", "qbuf deferred", inst, buf); - return 0; - } - - rc = msm_vidc_buf_queue(inst, buf); - if (rc) - return rc; - break; - } default: { i_vpr_e(inst, "%s: unexpected event %s\n", __func__, event_name(event)); @@ -762,6 +892,33 @@ static int msm_vidc_output_streaming_state(struct msm_vidc_inst *inst, } switch (event) { + case MSM_VIDC_BUF_QUEUE: + { + struct msm_vidc_buffer *buf = (struct msm_vidc_buffer *)data; + + /* defer meta port */ + if (buf->type == MSM_VIDC_BUF_INPUT_META || buf->type == MSM_VIDC_BUF_OUTPUT_META) { + print_vidc_buffer(VIDC_LOW, "low ", "qbuf deferred", inst, buf); + return 0; + } + + /* disallow */ + if (buf->type != MSM_VIDC_BUF_INPUT && buf->type != MSM_VIDC_BUF_OUTPUT) { + i_vpr_e(inst, "%s: invalid buf type %u\n", __func__, buf->type); + return -EINVAL; + } + + /* defer input port */ + if (buf->type == MSM_VIDC_BUF_INPUT) { + print_vidc_buffer(VIDC_LOW, "low ", "qbuf deferred", inst, buf); + return 0; + } + + rc = msm_vidc_buf_queue(inst, buf); + if (rc) + return rc; + break; + } case MSM_VIDC_S_FMT: { struct v4l2_format *f = (struct v4l2_format *)data; @@ -858,33 +1015,6 @@ static int msm_vidc_output_streaming_state(struct msm_vidc_inst *inst, return rc; break; } - case MSM_VIDC_BUF_QUEUE: - { - struct msm_vidc_buffer *buf = (struct msm_vidc_buffer *)data; - - /* defer meta port */ - if (buf->type == MSM_VIDC_BUF_INPUT_META || buf->type == MSM_VIDC_BUF_OUTPUT_META) { - print_vidc_buffer(VIDC_LOW, "low ", "qbuf deferred", inst, buf); - return 0; - } - - /* disallow */ - if (buf->type != MSM_VIDC_BUF_INPUT && buf->type != MSM_VIDC_BUF_OUTPUT) { - i_vpr_e(inst, "%s: invalid buf type %u\n", __func__, buf->type); - return -EINVAL; - } - - /* defer input port */ - if (buf->type == MSM_VIDC_BUF_INPUT) { - print_vidc_buffer(VIDC_LOW, "low ", "qbuf deferred", inst, buf); - return 0; - } - - rc = msm_vidc_buf_queue(inst, buf); - if (rc) - return rc; - break; - } default: { i_vpr_e(inst, "%s: unexpected event %s\n", __func__, event_name(event)); return -EINVAL; @@ -912,6 +1042,27 @@ static int msm_vidc_streaming_state(struct msm_vidc_inst *inst, } switch (event) { + case MSM_VIDC_BUF_QUEUE: + { + struct msm_vidc_buffer *buf = (struct msm_vidc_buffer *)data; + + /* defer meta port */ + if (buf->type == MSM_VIDC_BUF_INPUT_META || buf->type == MSM_VIDC_BUF_OUTPUT_META) { + print_vidc_buffer(VIDC_LOW, "low ", "qbuf deferred", inst, buf); + return 0; + } + + /* disallow */ + if (buf->type != MSM_VIDC_BUF_INPUT && buf->type != MSM_VIDC_BUF_OUTPUT) { + i_vpr_e(inst, "%s: invalid buf type %u\n", __func__, buf->type); + return -EINVAL; + } + + rc = msm_vidc_buf_queue(inst, buf); + if (rc) + return rc; + break; + } case MSM_VIDC_S_CTRL: { struct v4l2_ctrl *ctrl = (struct v4l2_ctrl *)data; @@ -971,27 +1122,6 @@ static int msm_vidc_streaming_state(struct msm_vidc_inst *inst, return rc; break; } - case MSM_VIDC_BUF_QUEUE: - { - struct msm_vidc_buffer *buf = (struct msm_vidc_buffer *)data; - - /* defer meta port */ - if (buf->type == MSM_VIDC_BUF_INPUT_META || buf->type == MSM_VIDC_BUF_OUTPUT_META) { - print_vidc_buffer(VIDC_LOW, "low ", "qbuf deferred", inst, buf); - return 0; - } - - /* disallow */ - if (buf->type != MSM_VIDC_BUF_INPUT && buf->type != MSM_VIDC_BUF_OUTPUT) { - i_vpr_e(inst, "%s: invalid buf type %u\n", __func__, buf->type); - return -EINVAL; - } - - rc = msm_vidc_buf_queue(inst, buf); - if (rc) - return rc; - break; - } default: { i_vpr_e(inst, "%s: unexpected event %s\n", __func__, event_name(event)); return -EINVAL; @@ -1124,69 +1254,86 @@ int msm_vidc_update_state(struct msm_vidc_inst *inst, return rc; } -struct msm_vidc_state_allow { - enum msm_vidc_state from; - enum msm_vidc_state to; - enum msm_vidc_allow allow; -}; - -enum msm_vidc_allow msm_vidc_allow_state_change( - struct msm_vidc_inst *inst, - enum msm_vidc_state req_state) +int msm_vidc_change_state(struct msm_vidc_inst *inst, + enum msm_vidc_state request_state, const char *func) { - int cnt; - enum msm_vidc_allow allow = MSM_VIDC_DISALLOW; - static struct msm_vidc_state_allow state[] = { - /* from, to, allow */ - {MSM_VIDC_OPEN, MSM_VIDC_OPEN, MSM_VIDC_IGNORE }, - {MSM_VIDC_OPEN, MSM_VIDC_INPUT_STREAMING, MSM_VIDC_ALLOW }, - {MSM_VIDC_OPEN, MSM_VIDC_OUTPUT_STREAMING, MSM_VIDC_ALLOW }, - {MSM_VIDC_OPEN, MSM_VIDC_STREAMING, MSM_VIDC_DISALLOW }, - {MSM_VIDC_OPEN, MSM_VIDC_CLOSE, MSM_VIDC_ALLOW }, - {MSM_VIDC_OPEN, MSM_VIDC_ERROR, MSM_VIDC_ALLOW }, + enum msm_vidc_allow allow; + int rc; - {MSM_VIDC_INPUT_STREAMING, MSM_VIDC_OPEN, MSM_VIDC_ALLOW }, - {MSM_VIDC_INPUT_STREAMING, MSM_VIDC_INPUT_STREAMING, MSM_VIDC_IGNORE }, - {MSM_VIDC_INPUT_STREAMING, MSM_VIDC_OUTPUT_STREAMING, MSM_VIDC_DISALLOW }, - {MSM_VIDC_INPUT_STREAMING, MSM_VIDC_STREAMING, MSM_VIDC_ALLOW }, - {MSM_VIDC_INPUT_STREAMING, MSM_VIDC_CLOSE, MSM_VIDC_ALLOW }, - {MSM_VIDC_INPUT_STREAMING, MSM_VIDC_ERROR, MSM_VIDC_ALLOW }, - - {MSM_VIDC_OUTPUT_STREAMING, MSM_VIDC_OPEN, MSM_VIDC_ALLOW }, - {MSM_VIDC_OUTPUT_STREAMING, MSM_VIDC_INPUT_STREAMING, MSM_VIDC_DISALLOW }, - {MSM_VIDC_OUTPUT_STREAMING, MSM_VIDC_OUTPUT_STREAMING, MSM_VIDC_IGNORE }, - {MSM_VIDC_OUTPUT_STREAMING, MSM_VIDC_STREAMING, MSM_VIDC_ALLOW }, - {MSM_VIDC_OUTPUT_STREAMING, MSM_VIDC_CLOSE, MSM_VIDC_ALLOW }, - {MSM_VIDC_OUTPUT_STREAMING, MSM_VIDC_ERROR, MSM_VIDC_ALLOW }, - - {MSM_VIDC_STREAMING, MSM_VIDC_OPEN, MSM_VIDC_DISALLOW }, - {MSM_VIDC_STREAMING, MSM_VIDC_INPUT_STREAMING, MSM_VIDC_ALLOW }, - {MSM_VIDC_STREAMING, MSM_VIDC_OUTPUT_STREAMING, MSM_VIDC_ALLOW }, - {MSM_VIDC_STREAMING, MSM_VIDC_STREAMING, MSM_VIDC_IGNORE }, - {MSM_VIDC_STREAMING, MSM_VIDC_CLOSE, MSM_VIDC_ALLOW }, - {MSM_VIDC_STREAMING, MSM_VIDC_ERROR, MSM_VIDC_ALLOW }, - - {MSM_VIDC_CLOSE, MSM_VIDC_OPEN, MSM_VIDC_DISALLOW }, - {MSM_VIDC_CLOSE, MSM_VIDC_INPUT_STREAMING, MSM_VIDC_DISALLOW }, - {MSM_VIDC_CLOSE, MSM_VIDC_OUTPUT_STREAMING, MSM_VIDC_DISALLOW }, - {MSM_VIDC_CLOSE, MSM_VIDC_STREAMING, MSM_VIDC_DISALLOW }, - {MSM_VIDC_CLOSE, MSM_VIDC_CLOSE, MSM_VIDC_IGNORE }, - {MSM_VIDC_CLOSE, MSM_VIDC_ERROR, MSM_VIDC_IGNORE }, - - {MSM_VIDC_ERROR, MSM_VIDC_OPEN, MSM_VIDC_IGNORE }, - {MSM_VIDC_ERROR, MSM_VIDC_INPUT_STREAMING, MSM_VIDC_IGNORE }, - {MSM_VIDC_ERROR, MSM_VIDC_OUTPUT_STREAMING, MSM_VIDC_IGNORE }, - {MSM_VIDC_ERROR, MSM_VIDC_STREAMING, MSM_VIDC_IGNORE }, - {MSM_VIDC_ERROR, MSM_VIDC_CLOSE, MSM_VIDC_ALLOW }, - {MSM_VIDC_ERROR, MSM_VIDC_ERROR, MSM_VIDC_IGNORE }, - }; - - for (cnt = 0; cnt < ARRAY_SIZE(state); cnt++) { - if (state[cnt].from == inst->state && state[cnt].to == req_state) { - allow = state[cnt].allow; - break; - } + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; } - return allow; + if (is_session_error(inst)) { + i_vpr_h(inst, + "%s: inst is in bad state, can not change state to %s\n", + func, state_name(request_state)); + return 0; + } + + /* current and requested state is same */ + if (inst->state == request_state) + return 0; + + /* check if requested state movement is allowed */ + allow = msm_vidc_allow_state_change(inst, request_state); + if (allow != MSM_VIDC_ALLOW) { + i_vpr_e(inst, "%s: %s state change %s -> %s\n", func, + allow_name(allow), state_name(inst->state), + state_name(request_state)); + return (allow == MSM_VIDC_DISALLOW ? -EINVAL : 0); + } + + /* go ahead and update inst state */ + rc = msm_vidc_update_state(inst, request_state, func); + if (rc) + return rc; + + return 0; +} + +int msm_vidc_change_sub_state(struct msm_vidc_inst *inst, + enum msm_vidc_sub_state clear_sub_state, + enum msm_vidc_sub_state set_sub_state, const char *func) +{ + enum msm_vidc_sub_state prev_sub_state; + int rc = 0; + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (is_session_error(inst)) { + i_vpr_h(inst, + "%s: inst is in bad state, can not change sub state\n", func); + return 0; + } + + if (!clear_sub_state && !set_sub_state) + return 0; + + if ((clear_sub_state & set_sub_state) || + (set_sub_state > MSM_VIDC_MAX_SUB_STATE_VALUE) || + (clear_sub_state > MSM_VIDC_MAX_SUB_STATE_VALUE)) { + i_vpr_e(inst, "%s: invalid sub states to clear %#x or set %#x\n", + func, clear_sub_state, set_sub_state); + return -EINVAL; + } + + prev_sub_state = inst->sub_state; + inst->sub_state |= set_sub_state; + inst->sub_state &= ~clear_sub_state; + + /* print substates only when there is a change */ + if (inst->sub_state != prev_sub_state) { + rc = prepare_sub_state_name(inst->sub_state, inst->sub_state_name, + sizeof(inst->sub_state_name)); + if (!rc) + i_vpr_h(inst, "%s: state %s and sub state changed to %s\n", + func, state_name(inst->state), inst->sub_state_name); + } + + return 0; } From 654e6bb55dd00bbb347061b23d26740e0b1789b5 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Wed, 25 Jan 2023 16:23:45 -0800 Subject: [PATCH 0803/1061] video: driver: Add support to allow 5 LTR count Add support to allow 5 LTR count as per new requirement. Change-Id: Ic839ea61ae8dfe21bd8891f0f0dbaf26506d84ec Signed-off-by: Akshata Sahukar --- driver/platform/anorak/src/msm_vidc_anorak.c | 15 ++--- .../platform/common/src/msm_vidc_platform.c | 60 ++++++++++++++++++- driver/platform/kalama/src/kalama.c | 13 ++-- driver/platform/kalama/src/msm_vidc_kalama.c | 15 ++--- .../pineapple/src/msm_vidc_pineapple.c | 14 ++--- driver/platform/pineapple/src/pineapple.c | 15 +++-- driver/vidc/inc/msm_vidc_internal.h | 3 + 7 files changed, 96 insertions(+), 39 deletions(-) diff --git a/driver/platform/anorak/src/msm_vidc_anorak.c b/driver/platform/anorak/src/msm_vidc_anorak.c index 2b404a0ee1..59a518a112 100644 --- a/driver/platform/anorak/src/msm_vidc_anorak.c +++ b/driver/platform/anorak/src/msm_vidc_anorak.c @@ -21,7 +21,6 @@ #include "hfi_command.h" #define DEFAULT_VIDEO_CONCEAL_COLOR_BLACK 0x8020010 -#define MAX_LTR_FRAME_COUNT 2 #define MAX_BASE_LAYER_PRIORITY_ID 63 #define MAX_OP_POINT 31 #define MAX_BITRATE 220000000 @@ -594,14 +593,14 @@ static struct msm_platform_inst_capability instance_cap_data_anorak[] = { CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, {LTR_COUNT, ENC, H264|HEVC, - 0, 2, 1, 0, + 0, MAX_LTR_FRAME_COUNT_2, 1, 0, V4L2_CID_MPEG_VIDEO_LTR_COUNT, HFI_PROP_LTR_COUNT, CAP_FLAG_OUTPUT_PORT}, {USE_LTR, ENC, H264|HEVC, INVALID_DEFAULT_MARK_OR_USE_LTR, - ((1 << MAX_LTR_FRAME_COUNT) - 1), + ((1 << MAX_LTR_FRAME_COUNT_2) - 1), 1, INVALID_DEFAULT_MARK_OR_USE_LTR, V4L2_CID_MPEG_VIDEO_USE_LTR_FRAMES, HFI_PROP_LTR_USE, @@ -609,7 +608,7 @@ static struct msm_platform_inst_capability instance_cap_data_anorak[] = { {MARK_LTR, ENC, H264|HEVC, INVALID_DEFAULT_MARK_OR_USE_LTR, - (MAX_LTR_FRAME_COUNT - 1), + (MAX_LTR_FRAME_COUNT_2 - 1), 1, INVALID_DEFAULT_MARK_OR_USE_LTR, V4L2_CID_MPEG_VIDEO_FRAME_LTR_INDEX, HFI_PROP_LTR_MARK, @@ -1756,7 +1755,8 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_anor {PIX_FMTS, ENC, HEVC, {PROFILE, MIN_FRAME_QP, MAX_FRAME_QP, I_FRAME_QP, P_FRAME_QP, - B_FRAME_QP, META_ROI_INFO, MIN_QUALITY, BLUR_TYPES, IR_PERIOD}}, + B_FRAME_QP, META_ROI_INFO, MIN_QUALITY, BLUR_TYPES, IR_PERIOD, + LTR_COUNT}}, {PIX_FMTS, ENC, HEIC, {PROFILE}}, @@ -2031,13 +2031,14 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_anor msm_vidc_set_frame_qp}, {LAYER_TYPE, ENC, H264|HEVC, - {CONTENT_ADAPTIVE_CODING}}, + {CONTENT_ADAPTIVE_CODING, LTR_COUNT}}, {LAYER_ENABLE, ENC, H264|HEVC, {CONTENT_ADAPTIVE_CODING}}, {ENH_LAYER_COUNT, ENC, H264|HEVC, - {GOP_SIZE, B_FRAME, BIT_RATE, MIN_QUALITY, SLICE_MODE}, + {GOP_SIZE, B_FRAME, BIT_RATE, MIN_QUALITY, SLICE_MODE, + LTR_COUNT}, msm_vidc_adjust_layer_count, msm_vidc_set_layer_count_and_type}, diff --git a/driver/platform/common/src/msm_vidc_platform.c b/driver/platform/common/src/msm_vidc_platform.c index bed18cc7cd..40d18c5216 100644 --- a/driver/platform/common/src/msm_vidc_platform.c +++ b/driver/platform/common/src/msm_vidc_platform.c @@ -48,6 +48,23 @@ (a) = MIN_QP_8BIT; \ } +/* + * Below calculation for number of reference frames + * is picked up from hfi macro HFI_IRIS3_ENC_RECON_BUF_COUNT + */ +#define SLIDING_WINDOW_REF_FRAMES(codec, total_hp_layers, ltr_count, num_ref) { \ + if (codec == MSM_VIDC_HEVC) { \ + num_ref = (total_hp_layers + 1) >> 1; \ + } else if (codec == MSM_VIDC_H264) { \ + if (total_hp_layers < 4) \ + num_ref = (total_hp_layers - 1); \ + else \ + num_ref = total_hp_layers; \ + } \ + if (ltr_count) \ + num_ref = num_ref + ltr_count; \ +} + /* * Custom conversion coefficients for resolution: 176x144 negative * coeffs are converted to s4.9 format @@ -911,7 +928,9 @@ int msm_vidc_adjust_ltr_count(void *instance, struct v4l2_ctrl *ctrl) struct msm_vidc_inst_capability *capability; s32 adjusted_value; struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - s32 rc_type = -1, all_intra = 0; + s32 rc_type = -1, all_intra = 0, pix_fmts = MSM_VIDC_FMT_NONE; + s32 layer_type = -1, enh_layer_count = -1; + u32 num_ref_frames = 0, max_exceeding_ref_frames = 0; if (!inst || !inst->capabilities) { d_vpr_e("%s: invalid params\n", __func__); @@ -935,10 +954,45 @@ int msm_vidc_adjust_ltr_count(void *instance, struct v4l2_ctrl *ctrl) i_vpr_h(inst, "%s: ltr count unsupported, rc_type: %#x, all_intra %d\n", __func__, rc_type, all_intra); + goto exit; } - msm_vidc_update_cap_value(inst, LTR_COUNT, - adjusted_value, __func__); + if (!msm_vidc_get_parent_value(inst, LTR_COUNT, PIX_FMTS, + &pix_fmts, __func__)) { + if (is_10bit_colorformat(pix_fmts)) + adjusted_value = 0; + } + + if (!msm_vidc_get_parent_value(inst, LTR_COUNT, ENH_LAYER_COUNT, + &enh_layer_count, __func__) && + !msm_vidc_get_parent_value(inst, LTR_COUNT, LAYER_TYPE, + &layer_type, __func__)) { + if (layer_type == HFI_HIER_P_SLIDING_WINDOW) { + SLIDING_WINDOW_REF_FRAMES(inst->codec, + inst->capabilities->cap[ENH_LAYER_COUNT].value + 1, + adjusted_value, num_ref_frames); + if (num_ref_frames > MAX_ENCODING_REFERNCE_FRAMES) { + /* + * reduce ltr count to avoid num ref + * frames going beyond limit + */ + max_exceeding_ref_frames = num_ref_frames - + MAX_ENCODING_REFERNCE_FRAMES; + if (adjusted_value >= max_exceeding_ref_frames) + adjusted_value -= max_exceeding_ref_frames; + else + adjusted_value = 0; + } + } + i_vpr_h(inst, + "%s: ltr count %d enh_layers %d layer_type %d\n", + __func__, adjusted_value, + inst->capabilities->cap[ENH_LAYER_COUNT].value, + layer_type); + } + +exit: + msm_vidc_update_cap_value(inst, LTR_COUNT, adjusted_value, __func__); return 0; } diff --git a/driver/platform/kalama/src/kalama.c b/driver/platform/kalama/src/kalama.c index 2b6d04238c..f48df0f8fb 100644 --- a/driver/platform/kalama/src/kalama.c +++ b/driver/platform/kalama/src/kalama.c @@ -12,7 +12,6 @@ #include "hfi_command.h" #define DEFAULT_VIDEO_CONCEAL_COLOR_BLACK 0x8020010 -#define MAX_LTR_FRAME_COUNT 2 #define MAX_BASE_LAYER_PRIORITY_ID 63 #define MAX_OP_POINT 31 #define MAX_BITRATE 245000000 @@ -525,14 +524,14 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, {LTR_COUNT, ENC, H264|HEVC, - 0, 2, 1, 0, + 0, MAX_LTR_FRAME_COUNT_2, 1, 0, V4L2_CID_MPEG_VIDEO_LTR_COUNT, HFI_PROP_LTR_COUNT, CAP_FLAG_OUTPUT_PORT}, {USE_LTR, ENC, H264|HEVC, 0, - ((1 << MAX_LTR_FRAME_COUNT) - 1), + ((1 << MAX_LTR_FRAME_COUNT_2) - 1), 0, 0, V4L2_CID_MPEG_VIDEO_USE_LTR_FRAMES, HFI_PROP_LTR_USE, @@ -540,7 +539,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { {MARK_LTR, ENC, H264|HEVC, INVALID_DEFAULT_MARK_OR_USE_LTR, - (MAX_LTR_FRAME_COUNT - 1), + (MAX_LTR_FRAME_COUNT_2 - 1), 1, INVALID_DEFAULT_MARK_OR_USE_LTR, V4L2_CID_MPEG_VIDEO_FRAME_LTR_INDEX, HFI_PROP_LTR_MARK, @@ -1234,7 +1233,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kala {PIX_FMTS, ENC, HEVC, {PROFILE, MIN_FRAME_QP, MAX_FRAME_QP, I_FRAME_QP, P_FRAME_QP, - B_FRAME_QP, MIN_QUALITY, BLUR_TYPES}}, + B_FRAME_QP, MIN_QUALITY, BLUR_TYPES, LTR_COUNT}}, {PIX_FMTS, DEC, HEVC, {PROFILE}}, @@ -1441,10 +1440,10 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kala {CONTENT_ADAPTIVE_CODING}}, {LAYER_ENABLE, ENC, H264|HEVC, - {CONTENT_ADAPTIVE_CODING}}, + {CONTENT_ADAPTIVE_CODING, LTR_COUNT}}, {ENH_LAYER_COUNT, ENC, H264|HEVC, - {GOP_SIZE, B_FRAME, BIT_RATE, MIN_QUALITY}, + {GOP_SIZE, B_FRAME, BIT_RATE, MIN_QUALITY, LTR_COUNT}, msm_vidc_adjust_layer_count, msm_vidc_set_layer_count_and_type}, diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index 098ada752b..363f1e0ddf 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -22,7 +22,6 @@ #include "hfi_command.h" #define DEFAULT_VIDEO_CONCEAL_COLOR_BLACK 0x8020010 -#define MAX_LTR_FRAME_COUNT 2 #define MAX_BASE_LAYER_PRIORITY_ID 63 #define MAX_OP_POINT 31 #define MAX_BITRATE 245000000 @@ -804,14 +803,14 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, {LTR_COUNT, ENC, H264|HEVC, - 0, 2, 1, 0, + 0, MAX_LTR_FRAME_COUNT_2, 1, 0, V4L2_CID_MPEG_VIDEO_LTR_COUNT, HFI_PROP_LTR_COUNT, CAP_FLAG_OUTPUT_PORT}, {USE_LTR, ENC, H264|HEVC, 0, - ((1 << MAX_LTR_FRAME_COUNT) - 1), + ((1 << MAX_LTR_FRAME_COUNT_2) - 1), 0, 0, V4L2_CID_MPEG_VIDEO_USE_LTR_FRAMES, HFI_PROP_LTR_USE, @@ -819,7 +818,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { {MARK_LTR, ENC, H264|HEVC, INVALID_DEFAULT_MARK_OR_USE_LTR, - (MAX_LTR_FRAME_COUNT - 1), + (MAX_LTR_FRAME_COUNT_2 - 1), 1, INVALID_DEFAULT_MARK_OR_USE_LTR, V4L2_CID_MPEG_VIDEO_FRAME_LTR_INDEX, HFI_PROP_LTR_MARK, @@ -1948,7 +1947,8 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kala {PIX_FMTS, ENC, HEVC, {PROFILE, MIN_FRAME_QP, MAX_FRAME_QP, I_FRAME_QP, P_FRAME_QP, - B_FRAME_QP, META_ROI_INFO, MIN_QUALITY, BLUR_TYPES, IR_PERIOD}}, + B_FRAME_QP, META_ROI_INFO, MIN_QUALITY, BLUR_TYPES, IR_PERIOD, + LTR_COUNT}}, {PIX_FMTS, ENC, HEIC, {PROFILE}}, @@ -2218,13 +2218,14 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kala msm_vidc_set_frame_qp}, {LAYER_TYPE, ENC, H264|HEVC, - {CONTENT_ADAPTIVE_CODING}}, + {CONTENT_ADAPTIVE_CODING, LTR_COUNT}}, {LAYER_ENABLE, ENC, H264|HEVC, {CONTENT_ADAPTIVE_CODING}}, {ENH_LAYER_COUNT, ENC, H264|HEVC, - {GOP_SIZE, B_FRAME, BIT_RATE, MIN_QUALITY, SLICE_MODE}, + {GOP_SIZE, B_FRAME, BIT_RATE, MIN_QUALITY, SLICE_MODE, + LTR_COUNT}, msm_vidc_adjust_layer_count, msm_vidc_set_layer_count_and_type}, diff --git a/driver/platform/pineapple/src/msm_vidc_pineapple.c b/driver/platform/pineapple/src/msm_vidc_pineapple.c index e69af20ab3..eacedef348 100644 --- a/driver/platform/pineapple/src/msm_vidc_pineapple.c +++ b/driver/platform/pineapple/src/msm_vidc_pineapple.c @@ -22,7 +22,6 @@ #include "hfi_command.h" #define DEFAULT_VIDEO_CONCEAL_COLOR_BLACK 0x8020010 -#define MAX_LTR_FRAME_COUNT 2 #define MAX_BASE_LAYER_PRIORITY_ID 63 #define MAX_OP_POINT 31 #define MAX_BITRATE 245000000 @@ -812,14 +811,14 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, {LTR_COUNT, ENC, H264|HEVC, - 0, 2, 1, 0, + 0, MAX_LTR_FRAME_COUNT_5, 1, 0, V4L2_CID_MPEG_VIDEO_LTR_COUNT, HFI_PROP_LTR_COUNT, CAP_FLAG_OUTPUT_PORT}, {USE_LTR, ENC, H264|HEVC, 0, - ((1 << MAX_LTR_FRAME_COUNT) - 1), + ((1 << MAX_LTR_FRAME_COUNT_5) - 1), 0, 0, V4L2_CID_MPEG_VIDEO_USE_LTR_FRAMES, HFI_PROP_LTR_USE, @@ -827,7 +826,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { {MARK_LTR, ENC, H264|HEVC, INVALID_DEFAULT_MARK_OR_USE_LTR, - (MAX_LTR_FRAME_COUNT - 1), + (MAX_LTR_FRAME_COUNT_5 - 1), 1, INVALID_DEFAULT_MARK_OR_USE_LTR, V4L2_CID_MPEG_VIDEO_FRAME_LTR_INDEX, HFI_PROP_LTR_MARK, @@ -1956,7 +1955,8 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine {PIX_FMTS, ENC, HEVC, {PROFILE, MIN_FRAME_QP, MAX_FRAME_QP, I_FRAME_QP, P_FRAME_QP, - B_FRAME_QP, META_ROI_INFO, MIN_QUALITY, BLUR_TYPES, IR_PERIOD}}, + B_FRAME_QP, META_ROI_INFO, MIN_QUALITY, BLUR_TYPES, IR_PERIOD, + LTR_COUNT}}, {PIX_FMTS, ENC, HEIC, {PROFILE}}, @@ -2246,13 +2246,13 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine msm_vidc_set_frame_qp}, {LAYER_TYPE, ENC, H264|HEVC, - {CONTENT_ADAPTIVE_CODING}}, + {CONTENT_ADAPTIVE_CODING, LTR_COUNT}}, {LAYER_ENABLE, ENC, H264|HEVC, {CONTENT_ADAPTIVE_CODING}}, {ENH_LAYER_COUNT, ENC, H264|HEVC, - {GOP_SIZE, B_FRAME, BIT_RATE, MIN_QUALITY, SLICE_MODE}, + {GOP_SIZE, B_FRAME, BIT_RATE, MIN_QUALITY, SLICE_MODE, LTR_COUNT}, msm_vidc_adjust_layer_count, msm_vidc_set_layer_count_and_type}, diff --git a/driver/platform/pineapple/src/pineapple.c b/driver/platform/pineapple/src/pineapple.c index cf99e581ed..9e6f2dc830 100644 --- a/driver/platform/pineapple/src/pineapple.c +++ b/driver/platform/pineapple/src/pineapple.c @@ -14,7 +14,6 @@ #include "hfi_command.h" #define DEFAULT_VIDEO_CONCEAL_COLOR_BLACK 0x8020010 -#define MAX_LTR_FRAME_COUNT 2 #define MAX_BASE_LAYER_PRIORITY_ID 63 #define MAX_OP_POINT 31 #define MAX_BITRATE 245000000 @@ -527,14 +526,14 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, {LTR_COUNT, ENC, H264|HEVC, - 0, 2, 1, 0, + 0, MAX_LTR_FRAME_COUNT_5, 1, 0, V4L2_CID_MPEG_VIDEO_LTR_COUNT, HFI_PROP_LTR_COUNT, CAP_FLAG_OUTPUT_PORT}, {USE_LTR, ENC, H264|HEVC, 0, - ((1 << MAX_LTR_FRAME_COUNT) - 1), + ((1 << MAX_LTR_FRAME_COUNT_5) - 1), 0, 0, V4L2_CID_MPEG_VIDEO_USE_LTR_FRAMES, HFI_PROP_LTR_USE, @@ -542,7 +541,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { {MARK_LTR, ENC, H264|HEVC, INVALID_DEFAULT_MARK_OR_USE_LTR, - (MAX_LTR_FRAME_COUNT - 1), + (MAX_LTR_FRAME_COUNT_5 - 1), 1, INVALID_DEFAULT_MARK_OR_USE_LTR, V4L2_CID_MPEG_VIDEO_FRAME_LTR_INDEX, HFI_PROP_LTR_MARK, @@ -1239,7 +1238,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine {PIX_FMTS, ENC, HEVC, {0}, {PROFILE, MIN_FRAME_QP, MAX_FRAME_QP, I_FRAME_QP, P_FRAME_QP, - B_FRAME_QP, MIN_QUALITY, BLUR_TYPES}}, + B_FRAME_QP, MIN_QUALITY, BLUR_TYPES, LTR_COUNT}}, {PIX_FMTS, DEC, HEVC, {0}, @@ -1482,9 +1481,9 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine NULL, msm_vidc_set_frame_qp}, - {LAYER_TYPE, ENC, H264, + {LAYER_TYPE, ENC, H264|HEVC, {0}, - {CONTENT_ADAPTIVE_CODING}}, + {CONTENT_ADAPTIVE_CODING, LTR_COUNT}}, {LAYER_ENABLE, ENC, H264|HEVC, {0}, @@ -1492,7 +1491,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine {ENH_LAYER_COUNT, ENC, H264|HEVC, {BITRATE_MODE}, - {GOP_SIZE, B_FRAME, BIT_RATE, MIN_QUALITY}, + {GOP_SIZE, B_FRAME, BIT_RATE, MIN_QUALITY, LTR_COUNT}, msm_vidc_adjust_layer_count, msm_vidc_set_layer_count_and_type}, diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 1fe57fb1de..bcafd39a1a 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -98,6 +98,9 @@ enum msm_vidc_metadata_bits { #define MIN_QP_8BIT 1 #define INVALID_FD -1 #define INVALID_CLIENT_ID -1 +#define MAX_ENCODING_REFERNCE_FRAMES 7 +#define MAX_LTR_FRAME_COUNT_5 5 +#define MAX_LTR_FRAME_COUNT_2 2 #define DCVS_WINDOW 16 #define ENC_FPS_WINDOW 3 From 8acf4313fc70612a7adfdac48f97d5f21b1b8c6a Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Mon, 30 Jan 2023 10:55:42 -0800 Subject: [PATCH 0804/1061] video: driver: disable 5 LTR support disable 5 LTR support until corresponding fw changes are available. Change-Id: Iaafdffb4cfa6f1ccf4783bdb470ab4c57e739246 Signed-off-by: Akshata Sahukar --- .../pineapple/src/msm_vidc_pineapple.c | 18 +++++++++++++++--- driver/platform/pineapple/src/pineapple.c | 18 +++++++++++++++--- 2 files changed, 30 insertions(+), 6 deletions(-) diff --git a/driver/platform/pineapple/src/msm_vidc_pineapple.c b/driver/platform/pineapple/src/msm_vidc_pineapple.c index eacedef348..8d9c8eef3c 100644 --- a/driver/platform/pineapple/src/msm_vidc_pineapple.c +++ b/driver/platform/pineapple/src/msm_vidc_pineapple.c @@ -811,14 +811,22 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, {LTR_COUNT, ENC, H264|HEVC, - 0, MAX_LTR_FRAME_COUNT_5, 1, 0, + /* + * update with MAX_LTR_FRAME_COUNT_5 when + * 5 LTR support is added in firmware + */ + 0, MAX_LTR_FRAME_COUNT_2, 1, 0, V4L2_CID_MPEG_VIDEO_LTR_COUNT, HFI_PROP_LTR_COUNT, CAP_FLAG_OUTPUT_PORT}, {USE_LTR, ENC, H264|HEVC, 0, - ((1 << MAX_LTR_FRAME_COUNT_5) - 1), + /* + * update with MAX_LTR_FRAME_COUNT_5 when + * 5 LTR support is added in firmware + */ + ((1 << MAX_LTR_FRAME_COUNT_2) - 1), 0, 0, V4L2_CID_MPEG_VIDEO_USE_LTR_FRAMES, HFI_PROP_LTR_USE, @@ -826,7 +834,11 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { {MARK_LTR, ENC, H264|HEVC, INVALID_DEFAULT_MARK_OR_USE_LTR, - (MAX_LTR_FRAME_COUNT_5 - 1), + /* + * update with MAX_LTR_FRAME_COUNT_5 when + * 5 LTR support is added in firmware + */ + (MAX_LTR_FRAME_COUNT_2 - 1), 1, INVALID_DEFAULT_MARK_OR_USE_LTR, V4L2_CID_MPEG_VIDEO_FRAME_LTR_INDEX, HFI_PROP_LTR_MARK, diff --git a/driver/platform/pineapple/src/pineapple.c b/driver/platform/pineapple/src/pineapple.c index 9e6f2dc830..6f66b419ae 100644 --- a/driver/platform/pineapple/src/pineapple.c +++ b/driver/platform/pineapple/src/pineapple.c @@ -526,14 +526,22 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, {LTR_COUNT, ENC, H264|HEVC, - 0, MAX_LTR_FRAME_COUNT_5, 1, 0, + /* + * update with MAX_LTR_FRAME_COUNT_5 when + * 5 LTR support is added in firmware + */ + 0, MAX_LTR_FRAME_COUNT_2, 1, 0, V4L2_CID_MPEG_VIDEO_LTR_COUNT, HFI_PROP_LTR_COUNT, CAP_FLAG_OUTPUT_PORT}, {USE_LTR, ENC, H264|HEVC, 0, - ((1 << MAX_LTR_FRAME_COUNT_5) - 1), + /* + * update with MAX_LTR_FRAME_COUNT_5 when + * 5 LTR support is added in firmware + */ + ((1 << MAX_LTR_FRAME_COUNT_2) - 1), 0, 0, V4L2_CID_MPEG_VIDEO_USE_LTR_FRAMES, HFI_PROP_LTR_USE, @@ -541,7 +549,11 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { {MARK_LTR, ENC, H264|HEVC, INVALID_DEFAULT_MARK_OR_USE_LTR, - (MAX_LTR_FRAME_COUNT_5 - 1), + /* + * update with MAX_LTR_FRAME_COUNT_5 when + * 5 LTR support is added in firmware + */ + (MAX_LTR_FRAME_COUNT_2 - 1), 1, INVALID_DEFAULT_MARK_OR_USE_LTR, V4L2_CID_MPEG_VIDEO_FRAME_LTR_INDEX, HFI_PROP_LTR_MARK, From f1771aae41fc06e7b9300d5f65c122d081b1463c Mon Sep 17 00:00:00 2001 From: Ankush Mitra Date: Tue, 31 Jan 2023 12:20:52 +0530 Subject: [PATCH 0805/1061] video: driver: resolve subsystem restart failure Allow streamoff from msm_vidc_vb2_queue_deinit after errors to flush out the pending buffer in driver in order to avoid v4l2 framework printing below warning. videobuf2_common: driver bug: stop_streaming operation is leaving buf in active state. Call trace __vb2_queue_cancel+0x214/0x288 vb2_core_queue_release+0x28/0x5c vb2_queue_release+0x18/0x28 msm_vidc_vb2_queue_deinit+0x40/0x118 [msm_video] msm_vidc_close+0x7c/0x144 [msm_video] msm_v4l2_close+0x44/0x164 [msm_video] There is a deadlock if driver acquires inst lock in msm_vb2_stop_streaming, because this function will be called from msm_vidc_close which already acquired the inst lock. Hence, acquire inst lock in msm_v4l2_stramoff instead of msm_vb2_stop_streaming. Change-Id: Iec4c0e416a8a2705af28dbd5138f25d9f3016d12 Signed-off-by: Ankush Mitra --- driver/vidc/src/msm_vidc_driver.c | 53 +++++++++++++++++-------------- driver/vidc/src/msm_vidc_v4l2.c | 7 ++-- driver/vidc/src/msm_vidc_vb2.c | 9 ------ 3 files changed, 35 insertions(+), 34 deletions(-) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 7b39fd855c..8f763fffd9 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -3868,12 +3868,6 @@ int msm_vidc_vb2_queue_deinit(struct msm_vidc_inst *inst) return 0; } - vb2_queue_release(inst->bufq[OUTPUT_META_PORT].vb2q); - msm_vidc_vmem_free((void **)&inst->bufq[OUTPUT_META_PORT].vb2q); - inst->bufq[OUTPUT_META_PORT].vb2q = NULL; - vb2_queue_release(inst->bufq[INPUT_META_PORT].vb2q); - msm_vidc_vmem_free((void **)&inst->bufq[INPUT_META_PORT].vb2q); - inst->bufq[INPUT_META_PORT].vb2q = NULL; /* * vb2_queue_release() for input and output queues * is called from v4l2_m2m_ctx_release() @@ -3882,6 +3876,13 @@ int msm_vidc_vb2_queue_deinit(struct msm_vidc_inst *inst) inst->bufq[OUTPUT_PORT].vb2q = NULL; inst->bufq[INPUT_PORT].vb2q = NULL; v4l2_m2m_release(inst->m2m_dev); + + vb2_queue_release(inst->bufq[OUTPUT_META_PORT].vb2q); + msm_vidc_vmem_free((void **)&inst->bufq[OUTPUT_META_PORT].vb2q); + inst->bufq[OUTPUT_META_PORT].vb2q = NULL; + vb2_queue_release(inst->bufq[INPUT_META_PORT].vb2q); + msm_vidc_vmem_free((void **)&inst->bufq[INPUT_META_PORT].vb2q); + inst->bufq[INPUT_META_PORT].vb2q = NULL; inst->vb2q_init = false; return rc; @@ -4158,38 +4159,44 @@ int msm_vidc_session_close(struct msm_vidc_inst *inst) { int rc = 0; struct msm_vidc_core *core; + bool wait_for_response; if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } + core = inst->core; + wait_for_response = true; rc = venus_hfi_session_close(inst); - if (rc) - return rc; + if (rc) { + i_vpr_e(inst, "%s: session close cmd failed\n", __func__); + wait_for_response = false; + } /* we are not supposed to send any more commands after close */ i_vpr_h(inst, "%s: free session packet data\n", __func__); msm_vidc_vmem_free((void **)&inst->packet); inst->packet = NULL; - core = inst->core; - i_vpr_h(inst, "%s: wait on close for time: %d ms\n", + if (wait_for_response) { + i_vpr_h(inst, "%s: wait on close for time: %d ms\n", __func__, core->capabilities[HW_RESPONSE_TIMEOUT].value); - inst_unlock(inst, __func__); - rc = wait_for_completion_timeout( - &inst->completions[SIGNAL_CMD_CLOSE], - msecs_to_jiffies( - core->capabilities[HW_RESPONSE_TIMEOUT].value)); - if (!rc) { - i_vpr_e(inst, "%s: session close timed out\n", __func__); - rc = -ETIMEDOUT; - msm_vidc_inst_timeout(inst); - } else { - rc = 0; - i_vpr_h(inst, "%s: close successful\n", __func__); + inst_unlock(inst, __func__); + rc = wait_for_completion_timeout( + &inst->completions[SIGNAL_CMD_CLOSE], + msecs_to_jiffies( + core->capabilities[HW_RESPONSE_TIMEOUT].value)); + if (!rc) { + i_vpr_e(inst, "%s: session close timed out\n", __func__); + rc = -ETIMEDOUT; + msm_vidc_inst_timeout(inst); + } else { + rc = 0; + i_vpr_h(inst, "%s: close successful\n", __func__); + } + inst_lock(inst, __func__); } - inst_lock(inst, __func__); return rc; } diff --git a/driver/vidc/src/msm_vidc_v4l2.c b/driver/vidc/src/msm_vidc_v4l2.c index 2fc8ea9662..8e797786f9 100644 --- a/driver/vidc/src/msm_vidc_v4l2.c +++ b/driver/vidc/src/msm_vidc_v4l2.c @@ -514,11 +514,14 @@ int msm_v4l2_streamoff(struct file *filp, void *fh, return -EINVAL; } + client_lock(inst, __func__); + inst_lock(inst, __func__); rc = msm_vidc_streamoff((void *)inst, i); if (rc) - goto exit; + i_vpr_e(inst, "%s: msm_vidc_stramoff failed\n", __func__); -exit: + inst_unlock(inst, __func__); + client_unlock(inst, __func__); put_inst(inst); return rc; diff --git a/driver/vidc/src/msm_vidc_vb2.c b/driver/vidc/src/msm_vidc_vb2.c index 4d5ac278f8..2f2efa68e9 100644 --- a/driver/vidc/src/msm_vidc_vb2.c +++ b/driver/vidc/src/msm_vidc_vb2.c @@ -577,26 +577,17 @@ void msm_vb2_stop_streaming(struct vb2_queue *q) return; } inst = q->drv_priv; - inst = get_inst_ref(g_core, inst); if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return; } - client_lock(inst, __func__); - inst_lock(inst, __func__); rc = inst->event_handle(inst, MSM_VIDC_STREAMOFF, q); if (rc) { i_vpr_e(inst, "Streamoff: %s failed\n", v4l2_type_name(q->type)); msm_vidc_change_state(inst, MSM_VIDC_ERROR, __func__); - goto unlock; } -unlock: - inst_unlock(inst, __func__); - client_unlock(inst, __func__); - put_inst(inst); - return; } From faf2b173fe6d9b9581a7e2bb8440b852db4d6f01 Mon Sep 17 00:00:00 2001 From: tkashyap Date: Wed, 1 Feb 2023 16:30:06 -0800 Subject: [PATCH 0806/1061] video: driver: disable devm_pm_opp_attach_genpd Change-Id: Id09b49b3ff2b7b1c960314776dd91360913482d8 Signed-off-by: Tanya Kashyap --- driver/vidc/src/resources.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/driver/vidc/src/resources.c b/driver/vidc/src/resources.c index 2deb080028..30ab37802c 100644 --- a/driver/vidc/src/resources.c +++ b/driver/vidc/src/resources.c @@ -350,7 +350,7 @@ static int __init_power_domains(struct msm_vidc_core *core) struct power_domain_info *pdinfo = NULL; const struct pd_table *pd_tbl; struct power_domain_set *pds; - struct device **opp_vdevs; + struct device **opp_vdevs = NULL; const char **opp_tbl; u32 pd_count = 0, opp_count = 0, cnt = 0; int rc = 0; @@ -428,7 +428,8 @@ static int __init_power_domains(struct msm_vidc_core *core) d_vpr_h("%s: opp name %s\n", __func__, opp_tbl[cnt]); /* populate opp power domains(for rails) */ - rc = devm_pm_opp_attach_genpd(&core->pdev->dev, opp_tbl, &opp_vdevs); + //rc = devm_pm_opp_attach_genpd(&core->pdev->dev, opp_tbl, &opp_vdevs); + rc = -EINVAL; if (rc) return rc; From e318864d75a043ee4567ffd5856726d2a2737e44 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Fri, 3 Feb 2023 19:11:05 +0530 Subject: [PATCH 0807/1061] video: driver: fix video node open before probe issue [1] In upstream side, udev is attampting to open video nodes(video32 & video33) immediately after creation. But by that time probe might not completed and i.e resulting to NULL ptr dereference during open() call. [2] component_match_add_release() must be called only for video subdevices(contextbanks), but due to OPP table more entries getting added into component_match table. So master device bind is never getting invoked and probe sequence is never getting completed. Uploaded change to address above mentioned issuses. Change-Id: I8d2e8fb5644da7076f5f99feda9365629e9130fd Signed-off-by: Govindaraj Rajagopal --- driver/vidc/src/msm_vidc_probe.c | 219 ++++++++++++++++++------------- 1 file changed, 128 insertions(+), 91 deletions(-) diff --git a/driver/vidc/src/msm_vidc_probe.c b/driver/vidc/src/msm_vidc_probe.c index b079c66bfa..d2b895abc1 100644 --- a/driver/vidc/src/msm_vidc_probe.c +++ b/driver/vidc/src/msm_vidc_probe.c @@ -46,13 +46,18 @@ static inline bool is_video_device(struct device *dev) of_device_is_compatible(dev->of_node, "qcom,sm8650-vidc-v2"); } +static inline bool is_video_context_bank_device_node(struct device_node *of_node) +{ + return !!(of_device_is_compatible(of_node, "qcom,vidc,cb-sec-pxl") || + of_device_is_compatible(of_node, "qcom,vidc,cb-sec-bitstream") || + of_device_is_compatible(of_node, "qcom,vidc,cb-sec-non-pxl") || + of_device_is_compatible(of_node, "qcom,vidc,cb-ns") || + of_device_is_compatible(of_node, "qcom,vidc,cb-ns-pxl")); +} + static inline bool is_video_context_bank_device(struct device *dev) { - return !!(of_device_is_compatible(dev->of_node, "qcom,vidc,cb-sec-pxl") || - of_device_is_compatible(dev->of_node, "qcom,vidc,cb-sec-bitstream") || - of_device_is_compatible(dev->of_node, "qcom,vidc,cb-sec-non-pxl") || - of_device_is_compatible(dev->of_node, "qcom,vidc,cb-ns") || - of_device_is_compatible(dev->of_node, "qcom,vidc,cb-ns-pxl")); + return is_video_context_bank_device_node(dev->of_node); } static int msm_vidc_init_resources(struct msm_vidc_core *core) @@ -234,6 +239,78 @@ video_reg_failed: return rc; } +static int msm_vidc_initialize_media(struct msm_vidc_core *core) +{ + int rc = 0, nr = BASE_DEVICE_NUMBER; + + rc = v4l2_device_register(&core->pdev->dev, &core->v4l2_dev); + if (rc) { + d_vpr_e("Failed to register v4l2 device\n"); + return -EINVAL; + } + +#ifdef CONFIG_MEDIA_CONTROLLER + core->media_dev.dev = &core->pdev->dev; + strscpy(core->media_dev.model, "msm_vidc_media", sizeof(core->media_dev.model)); + media_device_init(&core->media_dev); + core->media_dev.ops = core->media_device_ops; + core->v4l2_dev.mdev = &core->media_dev; +#endif + + /* setup the decoder device */ + rc = msm_vidc_register_video_device(core, MSM_VIDC_DECODER, nr); + if (rc) { + d_vpr_e("Failed to register video decoder\n"); + goto dec_reg_failed; + } + + /* setup the encoder device */ + rc = msm_vidc_register_video_device(core, MSM_VIDC_ENCODER, nr + 1); + if (rc) { + d_vpr_e("Failed to register video encoder\n"); + goto enc_reg_failed; + } +#ifdef CONFIG_MEDIA_CONTROLLER + rc = media_device_register(&core->media_dev); + if (rc) { + d_vpr_e("%s: media_device_register failed with %d\n", __func__, rc); + goto media_reg_failed; + } +#endif + + return rc; +#ifdef CONFIG_MEDIA_CONTROLLER +media_reg_failed: +#endif + msm_vidc_unregister_video_device(core, MSM_VIDC_ENCODER); +enc_reg_failed: + msm_vidc_unregister_video_device(core, MSM_VIDC_DECODER); +dec_reg_failed: +#ifdef CONFIG_MEDIA_CONTROLLER + media_device_cleanup(&core->media_dev); +#endif + v4l2_device_unregister(&core->v4l2_dev); + + return rc; +} + +static int msm_vidc_deinitialize_media(struct msm_vidc_core *core) +{ + int rc = 0; + +#ifdef CONFIG_MEDIA_CONTROLLER + media_device_unregister(&core->media_dev); +#endif + msm_vidc_unregister_video_device(core, MSM_VIDC_ENCODER); + msm_vidc_unregister_video_device(core, MSM_VIDC_DECODER); +#ifdef CONFIG_MEDIA_CONTROLLER + media_device_cleanup(&core->media_dev); +#endif + v4l2_device_unregister(&core->v4l2_dev); + + return rc; +} + #ifdef CONFIG_MSM_MMRM static int msm_vidc_check_mmrm_support(struct msm_vidc_core *core) { @@ -436,26 +513,23 @@ static void msm_vidc_component_release_of(struct device *dev, void *data) of_node_put(data); } -static int msm_vidc_component_cb_bind(struct device *dev, - struct device *master, void *data) +static int msm_vidc_component_bind(struct device *dev, + struct device *parent, void *data) { struct msm_vidc_core *core; int rc = 0; - if (!dev) { - d_vpr_e("%s: invalid device\n", __func__); + if (!dev || !parent || !data) { + d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; - } else if (!dev->parent) { + } + core = (struct msm_vidc_core *)data; + + if (!dev->parent || dev->parent != parent) { d_vpr_e("%s: failed to find a parent for %s\n", __func__, dev_name(dev)); return -ENODEV; } - core = dev_get_drvdata(dev->parent); - if (!core) { - d_vpr_e("%s: failed to find cookie in parent device %s", - __func__, dev_name(dev->parent)); - return -EINVAL; - } rc = msm_vidc_setup_context_bank(core, dev); if (rc) { @@ -470,13 +544,13 @@ static int msm_vidc_component_cb_bind(struct device *dev, return rc; } -static void msm_vidc_component_cb_unbind(struct device *dev, - struct device *master, void *data) +static void msm_vidc_component_unbind(struct device *dev, + struct device *parent, void *data) { d_vpr_h("%s(): %s\n", __func__, dev_name(dev)); } -static int msm_vidc_component_bind(struct device *dev) +static int msm_vidc_component_master_bind(struct device *dev) { struct msm_vidc_core *core = dev_get_drvdata(dev); int rc = 0; @@ -489,6 +563,12 @@ static int msm_vidc_component_bind(struct device *dev) return rc; } + rc = msm_vidc_initialize_media(core); + if (rc) { + d_vpr_e("%s: media initialization failed\n", __func__); + return rc; + } + rc = venus_hfi_queue_init(core); if (rc) { d_vpr_e("%s: interface queues init failed\n", __func__); @@ -514,7 +594,7 @@ queues_deinit: return 0; } -static void msm_vidc_component_unbind(struct device *dev) +static void msm_vidc_component_master_unbind(struct device *dev) { struct msm_vidc_core *core = dev_get_drvdata(dev); @@ -522,21 +602,22 @@ static void msm_vidc_component_unbind(struct device *dev) msm_vidc_core_deinit(core, true); venus_hfi_queue_deinit(core); + msm_vidc_deinitialize_media(core); component_unbind_all(dev, core); d_vpr_h("%s(): succssful\n", __func__); } -static const struct component_ops msm_vidc_component_cb_ops = { - .bind = msm_vidc_component_cb_bind, - .unbind = msm_vidc_component_cb_unbind, -}; - -static const struct component_master_ops msm_vidc_component_ops = { +static const struct component_ops msm_vidc_component_ops = { .bind = msm_vidc_component_bind, .unbind = msm_vidc_component_unbind, }; +static const struct component_master_ops msm_vidc_component_master_ops = { + .bind = msm_vidc_component_master_bind, + .unbind = msm_vidc_component_master_unbind, +}; + static int msm_vidc_remove_video_device(struct platform_device *pdev) { struct msm_vidc_core* core; @@ -554,7 +635,7 @@ static int msm_vidc_remove_video_device(struct platform_device *pdev) d_vpr_h("%s()\n", __func__); /* destroy component master and deallocate match data */ - component_master_del(&pdev->dev, &msm_vidc_component_ops); + component_master_del(&pdev->dev, &msm_vidc_component_master_ops); d_vpr_h("depopulating sub devices\n"); /* @@ -564,19 +645,6 @@ static int msm_vidc_remove_video_device(struct platform_device *pdev) */ of_platform_depopulate(&pdev->dev); -#ifdef CONFIG_MEDIA_CONTROLLER - media_device_unregister(&core->media_dev); -#endif - msm_vidc_unregister_video_device(core, MSM_VIDC_ENCODER); - msm_vidc_unregister_video_device(core, MSM_VIDC_DECODER); - //device_remove_file(&core->vdev[MSM_VIDC_ENCODER].vdev.dev, - //&dev_attr_link_name); - //device_remove_file(&core->vdev[MSM_VIDC_DECODER].vdev.dev, - //&dev_attr_link_name); -#ifdef CONFIG_MEDIA_CONTROLLER - media_device_cleanup(&core->media_dev); -#endif - v4l2_device_unregister(&core->v4l2_dev); sysfs_remove_group(&pdev->dev.kobj, &msm_vidc_core_attr_group); msm_vidc_deinit_instance_caps(core); @@ -598,7 +666,7 @@ static int msm_vidc_remove_context_bank(struct platform_device *pdev) { d_vpr_h("%s(): %s\n", __func__, dev_name(&pdev->dev)); - component_del(&pdev->dev, &msm_vidc_component_cb_ops); + component_del(&pdev->dev, &msm_vidc_component_ops); return 0; } @@ -626,7 +694,7 @@ static int msm_vidc_probe_video_device(struct platform_device *pdev) struct component_match *match = NULL; struct msm_vidc_core *core = NULL; struct device_node *child = NULL; - int sub_node_count = 0, nr = BASE_DEVICE_NUMBER; + int cb_count = 0; d_vpr_h("%s: %s\n", __func__, dev_name(&pdev->dev)); @@ -679,40 +747,6 @@ static int msm_vidc_probe_video_device(struct platform_device *pdev) goto init_group_failed; } - rc = v4l2_device_register(&pdev->dev, &core->v4l2_dev); - if (rc) { - d_vpr_e("Failed to register v4l2 device\n"); - goto v4l2_reg_failed; - } - -#ifdef CONFIG_MEDIA_CONTROLLER - core->media_dev.dev = &core->pdev->dev; - strscpy(core->media_dev.model, "msm_vidc_media", sizeof(core->media_dev.model)); - media_device_init(&core->media_dev); - core->media_dev.ops = core->media_device_ops; - core->v4l2_dev.mdev = &core->media_dev; -#endif - - /* setup the decoder device */ - rc = msm_vidc_register_video_device(core, MSM_VIDC_DECODER, nr); - if (rc) { - d_vpr_e("Failed to register video decoder\n"); - goto dec_reg_failed; - } - - /* setup the encoder device */ - rc = msm_vidc_register_video_device(core, MSM_VIDC_ENCODER, nr + 1); - if (rc) { - d_vpr_e("Failed to register video encoder\n"); - goto enc_reg_failed; - } -#ifdef CONFIG_MEDIA_CONTROLLER - rc = media_device_register(&core->media_dev); - if (rc) { - d_vpr_e("%s: media_device_register failed with %d\n", __func__, rc); - goto media_reg_failed; - } -#endif rc = msm_vidc_check_mmrm_support(core); if (rc) { d_vpr_e("Failed to check MMRM scaling support\n"); @@ -725,8 +759,14 @@ static int msm_vidc_probe_video_device(struct platform_device *pdev) /* registering sub-device with component model framework */ for_each_available_child_of_node(pdev->dev.of_node, child) { - sub_node_count++; + /* consider only context bank devices */ + if (!is_video_context_bank_device_node(child)) + continue; + + /* take refcount on device node */ of_node_get(child); + + /* add entry into component_match array */ component_match_add_release(&pdev->dev, &match, msm_vidc_component_release_of, msm_vidc_component_compare_of, child); if (IS_ERR(match)) { @@ -735,9 +775,12 @@ static int msm_vidc_probe_video_device(struct platform_device *pdev) d_vpr_e("%s: component match add release failed\n", __func__); goto sub_dev_failed; } + + /* count context bank devices */ + cb_count++; } - d_vpr_h("populating sub devices. count %d\n", sub_node_count); + d_vpr_h("populating sub devices. count %d\n", cb_count); /* * Trigger probe for each sub-device i.e. qcom,msm-vidc,context-bank. * When msm_vidc_probe is called for each sub-device, parse the @@ -750,8 +793,12 @@ static int msm_vidc_probe_video_device(struct platform_device *pdev) goto sub_dev_failed; } - /* create component master and add match data */ - rc = component_master_add_with_match(&pdev->dev, &msm_vidc_component_ops, match); + /** + * create and try to bring up aggregate device for master. + * match is a component_match_array and acts as a placeholder for + * components added via component_add(). + */ + rc = component_master_add_with_match(&pdev->dev, &msm_vidc_component_master_ops, match); if (rc) { d_vpr_e("%s: component master add with match failed\n", __func__); goto master_add_failed; @@ -764,16 +811,6 @@ static int msm_vidc_probe_video_device(struct platform_device *pdev) master_add_failed: of_platform_depopulate(&pdev->dev); sub_dev_failed: -#ifdef CONFIG_MEDIA_CONTROLLER - media_device_unregister(&core->media_dev); -media_reg_failed: -#endif - msm_vidc_unregister_video_device(core, MSM_VIDC_ENCODER); -enc_reg_failed: - msm_vidc_unregister_video_device(core, MSM_VIDC_DECODER); -dec_reg_failed: - v4l2_device_unregister(&core->v4l2_dev); -v4l2_reg_failed: sysfs_remove_group(&pdev->dev.kobj, &msm_vidc_core_attr_group); init_group_failed: msm_vidc_deinit_instance_caps(core); @@ -796,7 +833,7 @@ static int msm_vidc_probe_context_bank(struct platform_device *pdev) { d_vpr_h("%s(): %s\n", __func__, dev_name(&pdev->dev)); - return component_add(&pdev->dev, &msm_vidc_component_cb_ops); + return component_add(&pdev->dev, &msm_vidc_component_ops); } static int msm_vidc_probe(struct platform_device *pdev) From 454e91b014526cf64e14dc3226451449ee905e70 Mon Sep 17 00:00:00 2001 From: Manikanta Kanamarlapudi Date: Tue, 31 Jan 2023 22:58:02 +0530 Subject: [PATCH 0808/1061] msm: vidc: enable DCVS for non realtime sessions - enable dcvs for non-realtime sessions (both encode/decode) - enable input queuing rate power scaling for non-realtime encoder Change-Id: Ie0fe2723837dbfc1cb63b693fc657f2d8df7c573 Signed-off-by: Manikanta Kanamarlapudi --- driver/vidc/src/msm_vidc_driver.c | 6 ------ driver/vidc/src/msm_vidc_power.c | 13 +++++++++++-- driver/vidc/src/msm_vidc_vb2.c | 2 +- 3 files changed, 12 insertions(+), 9 deletions(-) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 7b39fd855c..928a2f12a6 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -2844,12 +2844,6 @@ void msm_vidc_allow_dcvs(struct msm_vidc_inst *inst) goto exit; } - allow = is_realtime_session(inst); - if (!allow) { - i_vpr_h(inst, "%s: non-realtime session\n", __func__); - goto exit; - } - allow = !is_critical_priority_session(inst); if (!allow) { i_vpr_h(inst, "%s: critical priority session\n", __func__); diff --git a/driver/vidc/src/msm_vidc_power.c b/driver/vidc/src/msm_vidc_power.c index 824f13484c..48ad7bd53f 100644 --- a/driver/vidc/src/msm_vidc_power.c +++ b/driver/vidc/src/msm_vidc_power.c @@ -293,7 +293,7 @@ int msm_vidc_scale_buses(struct msm_vidc_inst *inst) /* scale bitrate if operating rate is larger than frame rate */ frame_rate = msm_vidc_get_frame_rate(inst); - operating_rate = msm_vidc_get_frame_rate(inst); + operating_rate = inst->max_rate; if (frame_rate && operating_rate && operating_rate > frame_rate) vote_data->bitrate = (vote_data->bitrate / frame_rate) * operating_rate; @@ -575,7 +575,16 @@ int msm_vidc_scale_power(struct msm_vidc_inst *inst, bool scale_buses) frame_rate = msm_vidc_get_frame_rate(inst); operating_rate = msm_vidc_get_operating_rate(inst); fps = max(frame_rate, operating_rate); - if (is_decode_session(inst)) { + /* + * Consider input queuing rate power scaling in below scenarios + * decoder: non-realtime and realtime as well because client + * may not set the frame rate / operating rate and + * we need to rely on input queue rate + * encoder: non-realtime only, for realtime client is expected to + * queue input buffers at the set frame rate / operating rate + */ + if (is_decode_session(inst) || + (is_encode_session(inst) && !is_realtime_session(inst))) { /* * when buffer detected fps is more than client set value by 12.5%, * utilize buffer detected fps to scale clock. diff --git a/driver/vidc/src/msm_vidc_vb2.c b/driver/vidc/src/msm_vidc_vb2.c index 4d5ac278f8..6a8ac1f09a 100644 --- a/driver/vidc/src/msm_vidc_vb2.c +++ b/driver/vidc/src/msm_vidc_vb2.c @@ -678,7 +678,7 @@ void msm_vb2_buf_queue(struct vb2_buffer *vb2) } inst->last_qbuf_time_ns = ktime_ns; - if (is_decode_session(inst) && vb2->type == INPUT_MPLANE) { + if (vb2->type == INPUT_MPLANE) { rc = msm_vidc_update_input_rate(inst, div_u64(ktime_ns, 1000)); if (rc) goto unlock; From a4d2b2d17870de88123a703d811349fa8828eec9 Mon Sep 17 00:00:00 2001 From: Dikshita Agarwal Date: Mon, 6 Feb 2023 17:34:00 +0530 Subject: [PATCH 0809/1061] video: driver: remove dynamic layers and bitrates support for taro Remove support for dynamic layers and bitrates for taro similar to other platforms. Change-Id: Ic316d9d566507ae924cff7a1ded10bcdd1f115e4 Signed-off-by: Dikshita Agarwal --- driver/platform/waipio/src/msm_vidc_waipio.c | 36 +++++++++---------- driver/platform/waipio/src/waipio.c | 38 ++++++++++---------- 2 files changed, 37 insertions(+), 37 deletions(-) diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 89f61e9d39..d875e836e5 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -1604,7 +1604,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_waip msm_vidc_set_req_sync_frame}, {BIT_RATE, ENC, H264|HEVC, - {PEAK_BITRATE}, + {PEAK_BITRATE, L0_BR}, msm_vidc_adjust_bitrate, msm_vidc_set_bitrate}, @@ -1808,34 +1808,34 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_waip msm_vidc_set_layer_count_and_type}, {L0_BR, ENC, H264|HEVC, - {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, + {L1_BR}, + msm_vidc_adjust_layer_bitrate, + msm_vidc_set_layer_bitrate}, {L1_BR, ENC, H264|HEVC, - {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, + {L2_BR}, + msm_vidc_adjust_layer_bitrate, + msm_vidc_set_layer_bitrate}, {L2_BR, ENC, H264|HEVC, - {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, + {L3_BR}, + msm_vidc_adjust_layer_bitrate, + msm_vidc_set_layer_bitrate}, {L3_BR, ENC, H264|HEVC, - {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, + {L4_BR}, + msm_vidc_adjust_layer_bitrate, + msm_vidc_set_layer_bitrate}, {L4_BR, ENC, H264|HEVC, - {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, + {L5_BR}, + msm_vidc_adjust_layer_bitrate, + msm_vidc_set_layer_bitrate}, {L5_BR, ENC, H264|HEVC, {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, + msm_vidc_adjust_layer_bitrate, + msm_vidc_set_layer_bitrate}, {ENTROPY_MODE, ENC, H264, {0}, diff --git a/driver/platform/waipio/src/waipio.c b/driver/platform/waipio/src/waipio.c index cd0df66208..edff258efa 100644 --- a/driver/platform/waipio/src/waipio.c +++ b/driver/platform/waipio/src/waipio.c @@ -1290,12 +1290,12 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_waip msm_vidc_set_req_sync_frame}, {BIT_RATE, ENC, H264, - {PEAK_BITRATE}, + {PEAK_BITRATE, L0_BR}, msm_vidc_adjust_bitrate, msm_vidc_set_bitrate}, {BIT_RATE, ENC, HEVC, - {PEAK_BITRATE}, + {PEAK_BITRATE, L0_BR}, msm_vidc_adjust_bitrate, msm_vidc_set_bitrate}, @@ -1459,34 +1459,34 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_waip msm_vidc_set_layer_count_and_type}, {L0_BR, ENC, H264|HEVC, - {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, + {L1_BR}, + msm_vidc_adjust_layer_bitrate, + msm_vidc_set_layer_bitrate}, {L1_BR, ENC, H264|HEVC, - {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, + {L2_BR}, + msm_vidc_adjust_layer_bitrate, + msm_vidc_set_layer_bitrate}, {L2_BR, ENC, H264|HEVC, - {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, + {L3_BR}, + msm_vidc_adjust_layer_bitrate, + msm_vidc_set_layer_bitrate}, {L3_BR, ENC, H264|HEVC, - {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, + {L4_BR}, + msm_vidc_adjust_layer_bitrate, + msm_vidc_set_layer_bitrate}, {L4_BR, ENC, H264|HEVC, - {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, + {L5_BR}, + msm_vidc_adjust_layer_bitrate, + msm_vidc_set_layer_bitrate}, {L5_BR, ENC, H264|HEVC, {0}, - msm_vidc_adjust_dynamic_layer_bitrate, - msm_vidc_set_dynamic_layer_bitrate}, + msm_vidc_adjust_layer_bitrate, + msm_vidc_set_layer_bitrate}, {ENTROPY_MODE, ENC, H264, {BIT_RATE}, From f13df6b014751199d78adb35d3ea119bf74649cd Mon Sep 17 00:00:00 2001 From: Dikshita Agarwal Date: Mon, 6 Feb 2023 10:54:20 +0530 Subject: [PATCH 0810/1061] video: variant: update buffer calculation in iris2 variant Update the buffer sizes for h264 codec in IRIS2 variant to align with updated buffer calculation for IRIS3. Change-Id: Ic211cdc88bb173f790ac11dad68ad248ed4a3f34 Signed-off-by: Dikshita Agarwal --- driver/variant/iris2/inc/hfi_buffer_iris2.h | 32 +++++++++++++------ .../variant/iris2/src/msm_vidc_buffer_iris2.c | 8 +++-- 2 files changed, 28 insertions(+), 12 deletions(-) diff --git a/driver/variant/iris2/inc/hfi_buffer_iris2.h b/driver/variant/iris2/inc/hfi_buffer_iris2.h index f7e6ef379f..a31218ecf6 100644 --- a/driver/variant/iris2/inc/hfi_buffer_iris2.h +++ b/driver/variant/iris2/inc/hfi_buffer_iris2.h @@ -371,7 +371,7 @@ typedef HFI_U32 HFI_BOOL; { \ HFI_U32 _height = HFI_ALIGN(frame_height, \ BUFFER_ALIGNMENT_32_BYTES); \ - _size = MIN((((_height + 15) >> 4) * 3 * 4), H264D_MAX_SLICE) *\ + _size = MIN((((_height + 15) >> 4) * 48), H264D_MAX_SLICE) *\ SIZE_H264D_BSE_CMD_PER_BUF; \ } while (0) @@ -380,7 +380,7 @@ typedef HFI_U32 HFI_BOOL; { \ HFI_U32 _height = HFI_ALIGN(frame_height, \ BUFFER_ALIGNMENT_32_BYTES); \ - _size = MIN((((_height + 15) >> 4) * 3 * 4), H264D_MAX_SLICE) * \ + _size = MIN((((_height + 15) >> 4) * 48), H264D_MAX_SLICE) * \ SIZE_H264D_VPP_CMD_PER_BUF; \ if (_size > VPP_CMD_MAX_SIZE) { _size = VPP_CMD_MAX_SIZE; } \ } while (0) @@ -512,9 +512,15 @@ typedef HFI_U32 HFI_BOOL; #define NUM_SLIST_BUF_H264 (256 + 32) #define SIZE_SLIST_BUF_H264 (512) #define SIZE_SEI_USERDATA (4096) -#define HFI_BUFFER_PERSIST_H264D(_size) \ - _size = HFI_ALIGN((SIZE_SLIST_BUF_H264 * NUM_SLIST_BUF_H264 + \ - NUM_HW_PIC_BUF * SIZE_SEI_USERDATA), VENUS_DMA_ALIGNMENT) +#define H264_NUM_FRM_INFO (66) +#define H264_DISPLAY_BUF_SIZE (3328) +#define SIZE_DOLBY_RPU_METADATA (41 * 1024) +#define HFI_BUFFER_PERSIST_H264D(_size, rpu_enabled) \ + (_size = HFI_ALIGN((SIZE_SLIST_BUF_H264 * NUM_SLIST_BUF_H264 + \ + H264_DISPLAY_BUF_SIZE * H264_NUM_FRM_INFO + \ + NUM_HW_PIC_BUF * SIZE_SEI_USERDATA + \ + (rpu_enabled) * NUM_HW_PIC_BUF * SIZE_DOLBY_RPU_METADATA), \ + VENUS_DMA_ALIGNMENT)) #define LCU_MAX_SIZE_PELS 64 #define LCU_MIN_SIZE_PELS 16 @@ -712,10 +718,14 @@ typedef HFI_U32 HFI_BOOL; #define H265_NUM_TILE_COL 32 #define H265_NUM_TILE_ROW 128 #define H265_NUM_TILE (H265_NUM_TILE_ROW * H265_NUM_TILE_COL + 1) -#define HFI_BUFFER_PERSIST_H265D(_size) \ - _size = HFI_ALIGN((SIZE_SLIST_BUF_H265 * NUM_SLIST_BUF_H265 + \ - H265_NUM_TILE * sizeof(HFI_U32) + NUM_HW_PIC_BUF * SIZE_SEI_USERDATA),\ - VENUS_DMA_ALIGNMENT) +#define H265_NUM_FRM_INFO (48) +#define H265_DISPLAY_BUF_SIZE (3072) +#define HFI_BUFFER_PERSIST_H265D(_size, rpu_enabled) \ + (_size = HFI_ALIGN((SIZE_SLIST_BUF_H265 * NUM_SLIST_BUF_H265 + \ + H265_NUM_FRM_INFO * H265_DISPLAY_BUF_SIZE + \ + H265_NUM_TILE * sizeof(HFI_U32) + NUM_HW_PIC_BUF * SIZE_SEI_USERDATA + \ + (rpu_enabled) * NUM_HW_PIC_BUF * SIZE_DOLBY_RPU_METADATA),\ + VENUS_DMA_ALIGNMENT)) #define SIZE_VPXD_LB_FE_LEFT_CTRL(frame_width, frame_height) \ MAX(((frame_height + 15) >> 4) * \ @@ -827,6 +837,7 @@ typedef HFI_U32 HFI_BOOL; #define VP9_NUM_FRAME_INFO_BUF 32 #define VP9_NUM_PROBABILITY_TABLE_BUF (VP9_NUM_FRAME_INFO_BUF + 4) #define VP9_PROB_TABLE_SIZE (3840) +#define VP9_FRAME_INFO_BUF_SIZE (6144) #define VP9_UDC_HEADER_BUF_SIZE (3 * 128) #define MAX_SUPERFRAME_HEADER_LEN (34) @@ -839,7 +850,8 @@ typedef HFI_U32 HFI_BOOL; VENUS_DMA_ALIGNMENT) + HFI_ALIGN(VP9_UDC_HEADER_BUF_SIZE, \ VENUS_DMA_ALIGNMENT) + HFI_ALIGN(VP9_NUM_FRAME_INFO_BUF * \ CCE_TILE_OFFSET_SIZE, VENUS_DMA_ALIGNMENT) + \ - HDR10_HIST_EXTRADATA_SIZE + HFI_ALIGN(VP9_NUM_FRAME_INFO_BUF * VP9_FRAME_INFO_BUF_SIZE, \ + VENUS_DMA_ALIGNMENT) + HDR10_HIST_EXTRADATA_SIZE #define HFI_BUFFER_LINE_MP2D(_size, frame_width, frame_height, \ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ diff --git a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c index 16333e6ecf..d5dce42a57 100644 --- a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c @@ -182,16 +182,20 @@ static u32 msm_vidc_decoder_line_size_iris2(struct msm_vidc_inst *inst) static u32 msm_vidc_decoder_persist_size_iris2(struct msm_vidc_inst *inst) { u32 size = 0; + u32 rpu_enabled = 0; if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return size; } + if (inst->capabilities->cap[META_DOLBY_RPU].value) + rpu_enabled = 1; + if (inst->codec == MSM_VIDC_H264) - HFI_BUFFER_PERSIST_H264D(size); + HFI_BUFFER_PERSIST_H264D(size, rpu_enabled); else if (inst->codec == MSM_VIDC_HEVC || inst->codec == MSM_VIDC_HEIC) - HFI_BUFFER_PERSIST_H265D(size); + HFI_BUFFER_PERSIST_H265D(size, rpu_enabled); else if (inst->codec == MSM_VIDC_VP9) HFI_BUFFER_PERSIST_VP9D(size); From ed80204a9e5bc90e7afb27a7b202bc9b7e0264f3 Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Fri, 3 Feb 2023 11:25:01 -0800 Subject: [PATCH 0811/1061] video: driver: add support to configure colorinfo via control - introduce control to set colorspace. client will use this to set private color info. Change-Id: I0099ef1525f4562d3be3a6e518d046fe5b9ef894 Signed-off-by: Darshana Patil --- driver/platform/kalama/src/msm_vidc_kalama.c | 11 +++ .../pineapple/src/msm_vidc_pineapple.c | 11 +++ driver/vidc/inc/msm_vidc_control_ext.h | 2 + driver/vidc/inc/msm_vidc_internal.h | 1 + driver/vidc/src/msm_venc.c | 5 ++ driver/vidc/src/msm_vidc_control_ext.c | 76 +++++++++++++++++++ .../uapi/vidc/media/v4l2_vidc_extensions.h | 30 ++++++++ 7 files changed, 136 insertions(+) diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index dacbbf1dcc..d13765423a 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -1935,6 +1935,12 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { V4L2_CID_MPEG_VIDC_H264_ENCODE_DELIVERY_MODE, HFI_PROP_ENABLE_SLICE_DELIVERY, CAP_FLAG_OUTPUT_PORT}, + + {SIGNAL_COLOR_INFO, ENC, CODECS_ALL, + 0, INT_MAX, 1, 0, + V4L2_CID_MPEG_VIDC_SIGNAL_COLOR_INFO, + HFI_PROP_SIGNAL_COLOR_INFO, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, }; static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kalama[] = { @@ -2474,6 +2480,11 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kala {0}, NULL, msm_vidc_set_vui_timing_info}, + + {SIGNAL_COLOR_INFO, ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_signal_color_info}, }; /* Default UBWC config for LPDDR5 */ diff --git a/driver/platform/pineapple/src/msm_vidc_pineapple.c b/driver/platform/pineapple/src/msm_vidc_pineapple.c index 6ff1a9cf63..c1faf03302 100644 --- a/driver/platform/pineapple/src/msm_vidc_pineapple.c +++ b/driver/platform/pineapple/src/msm_vidc_pineapple.c @@ -1943,6 +1943,12 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { V4L2_CID_MPEG_VIDC_H264_ENCODE_DELIVERY_MODE, HFI_PROP_ENABLE_SLICE_DELIVERY, CAP_FLAG_OUTPUT_PORT}, + + {SIGNAL_COLOR_INFO, ENC, CODECS_ALL, + 0, INT_MAX, 1, 0, + V4L2_CID_MPEG_VIDC_SIGNAL_COLOR_INFO, + HFI_PROP_SIGNAL_COLOR_INFO, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, }; static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pineapple[] = { @@ -2507,6 +2513,11 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine {0}, NULL, msm_vidc_set_vui_timing_info}, + + {SIGNAL_COLOR_INFO, ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_signal_color_info}, }; /* Default UBWC config for LPDDR5 */ diff --git a/driver/vidc/inc/msm_vidc_control_ext.h b/driver/vidc/inc/msm_vidc_control_ext.h index bee0400202..83499913b7 100644 --- a/driver/vidc/inc/msm_vidc_control_ext.h +++ b/driver/vidc/inc/msm_vidc_control_ext.h @@ -14,5 +14,7 @@ int msm_vidc_adjust_dec_operating_rate(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_delivery_mode(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_set_ir_period(void *instance, enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_signal_color_info(void *instance, + enum msm_vidc_inst_capability_type cap_id); #endif diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index a12847fde7..812adbc69b 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -367,6 +367,7 @@ enum msm_vidc_metadata_bits { CAP(LOWLATENCY_MAX_BITRATE) \ CAP(LAST_FLAG_EVENT_ENABLE) \ CAP(NUM_COMV) \ + CAP(SIGNAL_COLOR_INFO) \ CAP(INST_CAP_MAX) \ } diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index 584facf080..943004f647 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -323,6 +323,11 @@ static int msm_venc_set_colorspace(struct msm_vidc_inst* inst, return -EINVAL; } + if (inst->capabilities->cap[SIGNAL_COLOR_INFO].flags & CAP_FLAG_CLIENT_SET) { + i_vpr_h(inst, "%s: client configured colorspace via control\n", __func__); + return 0; + } + input_fmt = &inst->fmts[INPUT_PORT]; pix_fmt = v4l2_colorformat_to_driver(inst, input_fmt->fmt.pix_mp.pixelformat, __func__); diff --git a/driver/vidc/src/msm_vidc_control_ext.c b/driver/vidc/src/msm_vidc_control_ext.c index 367dba0963..4fb2466a2b 100644 --- a/driver/vidc/src/msm_vidc_control_ext.c +++ b/driver/vidc/src/msm_vidc_control_ext.c @@ -201,3 +201,79 @@ int msm_vidc_set_ir_period(void *instance, return rc; } +int msm_vidc_set_signal_color_info(void *instance, + enum msm_vidc_inst_capability_type cap_id) +{ + int rc = 0; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; + struct msm_vidc_inst_capability *capability; + u32 color_info, matrix_coeff, transfer_char, primaries, range; + u32 full_range = 0; + u32 colour_description_present_flag = 0; + u32 video_signal_type_present_flag = 0, hfi_value = 0; + struct v4l2_format *input_fmt; + u32 pix_fmt; + /* Unspecified video format */ + u32 video_format = 5; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + if (!(capability->cap[cap_id].flags & CAP_FLAG_CLIENT_SET)) { + i_vpr_h(inst, "%s: colorspace not configured via control\n", __func__); + return 0; + } + + color_info = capability->cap[cap_id].value; + matrix_coeff = color_info & 0xFF; + transfer_char = (color_info & 0xFF00) >> 8; + primaries = (color_info & 0xFF0000) >> 16; + range = (color_info & 0xFF000000) >> 24; + + input_fmt = &inst->fmts[INPUT_PORT]; + pix_fmt = v4l2_colorformat_to_driver(inst, + input_fmt->fmt.pix_mp.pixelformat, __func__); + if (primaries != V4L2_COLORSPACE_DEFAULT || + matrix_coeff != V4L2_YCBCR_ENC_DEFAULT || + transfer_char != V4L2_XFER_FUNC_DEFAULT) { + colour_description_present_flag = 1; + video_signal_type_present_flag = 1; + primaries = v4l2_color_primaries_to_driver(inst, + primaries, __func__); + matrix_coeff = v4l2_matrix_coeff_to_driver(inst, + matrix_coeff, __func__); + transfer_char = v4l2_transfer_char_to_driver(inst, + transfer_char, __func__); + } else if (is_rgba_colorformat(pix_fmt)) { + colour_description_present_flag = 1; + video_signal_type_present_flag = 1; + primaries = MSM_VIDC_PRIMARIES_BT709; + matrix_coeff = MSM_VIDC_MATRIX_COEFF_BT709; + transfer_char = MSM_VIDC_TRANSFER_BT709; + full_range = 0; + } + + if (range != V4L2_QUANTIZATION_DEFAULT) { + video_signal_type_present_flag = 1; + full_range = range == V4L2_QUANTIZATION_FULL_RANGE ? 1 : 0; + } + + hfi_value = (matrix_coeff & 0xFF) | + ((transfer_char << 8) & 0xFF00) | + ((primaries << 16) & 0xFF0000) | + ((colour_description_present_flag << 24) & 0x1000000) | + ((full_range << 25) & 0x2000000) | + ((video_format << 26) & 0x1C000000) | + ((video_signal_type_present_flag << 29) & 0x20000000); + + rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_32_PACKED, + &hfi_value, sizeof(u32), __func__); + if (rc) + return rc; + + return rc; +} + diff --git a/include/uapi/vidc/media/v4l2_vidc_extensions.h b/include/uapi/vidc/media/v4l2_vidc_extensions.h index 51d8a51b46..a011e62985 100644 --- a/include/uapi/vidc/media/v4l2_vidc_extensions.h +++ b/include/uapi/vidc/media/v4l2_vidc_extensions.h @@ -30,10 +30,20 @@ /* AV1 */ #define V4L2_PIX_FMT_AV1 v4l2_fourcc('A', 'V', '1', '0') /* start of vidc specific colorspace definitions */ +/* + * V4L2_COLORSPACE_VIDC_START, V4L2_XFER_FUNC_VIDC_START + * and V4L2_YCBCR_VIDC_START are introduced because + * V4L2_COLORSPACE_LAST, V4L2_XFER_FUNC_LAST, and + * V4L2_YCBCR_ENC_LAST respectively are not accessible + * in userspace. These values are needed in userspace + * to check if the colorspace info is private. + */ +#define V4L2_COLORSPACE_VIDC_START 100 #define V4L2_COLORSPACE_VIDC_GENERIC_FILM 101 #define V4L2_COLORSPACE_VIDC_EG431 102 #define V4L2_COLORSPACE_VIDC_EBU_TECH 103 +#define V4L2_XFER_FUNC_VIDC_START 200 #define V4L2_XFER_FUNC_VIDC_BT470_SYSTEM_M 201 #define V4L2_XFER_FUNC_VIDC_BT470_SYSTEM_BG 202 #define V4L2_XFER_FUNC_VIDC_BT601_525_OR_625 203 @@ -45,6 +55,7 @@ #define V4L2_XFER_FUNC_VIDC_HLG 209 /* should be 255 or below due to u8 limitation */ +#define V4L2_YCBCR_VIDC_START 240 #define V4L2_YCBCR_VIDC_SRGB_OR_SMPTE_ST428 241 #define V4L2_YCBCR_VIDC_FCC47_73_682 242 @@ -268,6 +279,25 @@ enum v4l2_mpeg_video_av1_tier { #define V4L2_CID_MPEG_VIDC_EARLY_NOTIFY_LINE_COUNT \ (V4L2_CID_MPEG_VIDC_BASE + 0x45) +/* + * This control is introduced to overcome v4l2 limitation + * of allowing only standard colorspace info via s_fmt. + * v4l_sanitize_colorspace() is introduced in s_fmt ioctl + * to reject private colorspace. Through this control, client + * can set private colorspace info and/or use this control + * to set colorspace dynamically. + * The control value is 32 bits packed as: + * [ 0 - 7] : matrix coefficients + * [ 8 - 15] : transfer characteristics + * [16 - 23] : colour primaries + * [24 - 31] : range + * This control is only for encoder. + * Currently g_fmt in v4l2 does not santize colorspace, + * hence this control is not introduced for decoder. + */ +#define V4L2_CID_MPEG_VIDC_SIGNAL_COLOR_INFO \ + (V4L2_CID_MPEG_VIDC_BASE + 0x46) + /* add new controls above this line */ /* Deprecate below controls once availble in gki and gsi bionic header */ #ifndef V4L2_CID_MPEG_VIDEO_BASELAYER_PRIORITY_ID From 5f648c7f8430db6b71b364fcb5c0215389788f84 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Mon, 6 Feb 2023 12:57:54 -0800 Subject: [PATCH 0812/1061] video: driver: Restrict all intra encode support to 4k@30 fps Restrict all intra encode support to 4k@30 fps from 4k@60 fps. Change-Id: If77d391ccfe4453fc37de369a9ca5923a39c9c26 Signed-off-by: Akshata Sahukar --- driver/platform/anorak/src/msm_vidc_anorak.c | 2 +- driver/platform/kalama/src/kalama.c | 2 +- driver/platform/kalama/src/msm_vidc_kalama.c | 2 +- driver/platform/pineapple/src/msm_vidc_pineapple.c | 2 +- driver/platform/pineapple/src/pineapple.c | 2 +- driver/platform/waipio/src/msm_vidc_waipio.c | 2 +- driver/platform/waipio/src/waipio.c | 2 +- 7 files changed, 7 insertions(+), 7 deletions(-) diff --git a/driver/platform/anorak/src/msm_vidc_anorak.c b/driver/platform/anorak/src/msm_vidc_anorak.c index 2b404a0ee1..1459a539bc 100644 --- a/driver/platform/anorak/src/msm_vidc_anorak.c +++ b/driver/platform/anorak/src/msm_vidc_anorak.c @@ -69,7 +69,7 @@ static struct msm_platform_core_capability core_data_anorak[] = { {MAX_MBPS_HQ, 489600}, /* ((1920x1088)/256)@60fps */ {MAX_MBPF_B_FRAME, 32640}, /* 3840x2176/256 */ {MAX_MBPS_B_FRAME, 1958400}, /* 3840x2176/256 MBs@60fps */ - {MAX_MBPS_ALL_INTRA, 2088960}, /* 4096x2176/256 MBs@60fps */ + {MAX_MBPS_ALL_INTRA, 1044480}, /* 4096x2176/256 MBs@30fps */ {MAX_ENH_LAYER_COUNT, 5}, {NUM_VPP_PIPE, 4}, {SW_PC, 1}, diff --git a/driver/platform/kalama/src/kalama.c b/driver/platform/kalama/src/kalama.c index 2b6d04238c..7c19f70d15 100644 --- a/driver/platform/kalama/src/kalama.c +++ b/driver/platform/kalama/src/kalama.c @@ -203,7 +203,7 @@ static struct msm_platform_core_capability core_data_kalama[] = { {MAX_MBPS_HQ, 489600}, /* ((1920x1088)/256)@60fps */ {MAX_MBPF_B_FRAME, 32640}, /* 3840x2176/256 */ {MAX_MBPS_B_FRAME, 1958400}, /* 3840x2176/256 MBs@60fps */ - {MAX_MBPS_ALL_INTRA, 2088960}, /* 4096x2176/256 MBs@60fps */ + {MAX_MBPS_ALL_INTRA, 1044480}, /* 4096x2176/256 MBs@30fps */ {MAX_ENH_LAYER_COUNT, 5}, {NUM_VPP_PIPE, 4}, {SW_PC, 1}, diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index dacbbf1dcc..ca350e9576 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -304,7 +304,7 @@ static struct msm_platform_core_capability core_data_kalama[] = { {MAX_MBPS_HQ, 489600}, /* ((1920x1088)/256)@60fps */ {MAX_MBPF_B_FRAME, 32640}, /* 3840x2176/256 */ {MAX_MBPS_B_FRAME, 1958400}, /* 3840x2176/256 MBs@60fps */ - {MAX_MBPS_ALL_INTRA, 2088960}, /* 4096x2176/256 MBs@60fps */ + {MAX_MBPS_ALL_INTRA, 1044480}, /* 4096x2176/256 MBs@30fps */ {MAX_ENH_LAYER_COUNT, 5}, {NUM_VPP_PIPE, 4}, {SW_PC, 1}, diff --git a/driver/platform/pineapple/src/msm_vidc_pineapple.c b/driver/platform/pineapple/src/msm_vidc_pineapple.c index 6ff1a9cf63..d47e544e33 100644 --- a/driver/platform/pineapple/src/msm_vidc_pineapple.c +++ b/driver/platform/pineapple/src/msm_vidc_pineapple.c @@ -304,7 +304,7 @@ static struct msm_platform_core_capability core_data_pineapple[] = { {MAX_MBPS_HQ, 489600}, /* ((1920x1088)/256)@60fps */ {MAX_MBPF_B_FRAME, 32640}, /* 3840x2176/256 */ {MAX_MBPS_B_FRAME, 1958400}, /* 3840x2176/256 MBs@60fps */ - {MAX_MBPS_ALL_INTRA, 2088960}, /* 4096x2176/256 MBs@60fps */ + {MAX_MBPS_ALL_INTRA, 1044480}, /* 4096x2176/256 MBs@30fps */ {MAX_ENH_LAYER_COUNT, 5}, {NUM_VPP_PIPE, 4}, {SW_PC, 1}, diff --git a/driver/platform/pineapple/src/pineapple.c b/driver/platform/pineapple/src/pineapple.c index 3474b3fd49..6222c8d2ef 100644 --- a/driver/platform/pineapple/src/pineapple.c +++ b/driver/platform/pineapple/src/pineapple.c @@ -205,7 +205,7 @@ static struct msm_platform_core_capability core_data_pineapple[] = { {MAX_MBPS_HQ, 489600}, /* ((1920x1088)/256)@60fps */ {MAX_MBPF_B_FRAME, 32640}, /* 3840x2176/256 */ {MAX_MBPS_B_FRAME, 1958400}, /* 3840x2176/256 MBs@60fps */ - {MAX_MBPS_ALL_INTRA, 2088960}, /* 4096x2176/256 MBs@60fps */ + {MAX_MBPS_ALL_INTRA, 1044480}, /* 4096x2176/256 MBs@30fps */ {MAX_ENH_LAYER_COUNT, 5}, {NUM_VPP_PIPE, 4}, {SW_PC, 1}, diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c index 89f61e9d39..ea3f5cbd75 100644 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ b/driver/platform/waipio/src/msm_vidc_waipio.c @@ -66,7 +66,7 @@ static struct msm_platform_core_capability core_data_waipio[] = { {MAX_MBPS_HQ, 489600}, /* ((1920x1088)/256)@60fps */ {MAX_MBPF_B_FRAME, 32640}, /* 3840x2176/256 */ {MAX_MBPS_B_FRAME, 1958400}, /* 3840x2176/256 MBs@60fps */ - {MAX_MBPS_ALL_INTRA, 1958400}, /* 3840x2176/256 MBs@60fps */ + {MAX_MBPS_ALL_INTRA, 1044480}, /* 4096x2176/256 MBs@30fps */ {MAX_ENH_LAYER_COUNT, 5}, {NUM_VPP_PIPE, 4}, {SW_PC, 1}, diff --git a/driver/platform/waipio/src/waipio.c b/driver/platform/waipio/src/waipio.c index cd0df66208..8fd4cfada8 100644 --- a/driver/platform/waipio/src/waipio.c +++ b/driver/platform/waipio/src/waipio.c @@ -207,7 +207,7 @@ static struct msm_platform_core_capability core_data_waipio[] = { {MAX_MBPS_HQ, 489600}, /* ((1920x1088)/256)@60fps */ {MAX_MBPF_B_FRAME, 32640}, /* 3840x2176/256 */ {MAX_MBPS_B_FRAME, 1958400}, /* 3840x2176/256 MBs@60fps */ - {MAX_MBPS_ALL_INTRA, 1958400}, /* 3840x2176/256 MBs@60fps */ + {MAX_MBPS_ALL_INTRA, 1044480}, /* 4096x2176/256 MBs@30fps */ {MAX_ENH_LAYER_COUNT, 5}, {NUM_VPP_PIPE, 4}, {SW_PC, 1}, From f123b6eece7e66f26fafbda76d998a84837ba065 Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Tue, 7 Feb 2023 12:07:33 -0800 Subject: [PATCH 0813/1061] video: driver: fix incorrect initialization of dmabuf Reinitialize dmabuf pointer to NULL only after dma_buf_put has been called on that buffer. Change-Id: I05e8c1d0901438bc39a9bf9faeed11e228cd7675 Signed-off-by: Darshana Patil --- driver/vidc/src/msm_vidc_driver.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 46436c5a85..be60c2cdf4 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -2020,7 +2020,7 @@ int msm_vidc_process_readonly_buffers(struct msm_vidc_inst *inst, ro_buf->attach, ro_buf->sg_table); call_mem_op(core, dma_buf_detach, core, ro_buf->dmabuf, ro_buf->attach); - ro_buf->dmabuf = NULL; + ro_buf->sg_table = NULL; ro_buf->attach = NULL; } if (ro_buf->dbuf_get) { From e65a251443a036d4b7463447110b4a1e0945f8c8 Mon Sep 17 00:00:00 2001 From: Zhongbo Shi Date: Wed, 16 Nov 2022 10:19:41 +0800 Subject: [PATCH 0814/1061] video: driver: Revise encoder port configs 1. Revise to config encoder RAW port with buffer actual aligned width and height in pixels to firmware; 2. Client also needs to config aligned input port width and height to driver; 3. Driver must config encoder RAW port crops; 4. Client also needs to config encoder input port crops; Change-Id: Idb85036df9a72e50239ddb46039ef1995b7f0689 Signed-off-by: Zhongbo Shi --- driver/vidc/src/msm_venc.c | 31 ++++++++++++++++++++----------- 1 file changed, 20 insertions(+), 11 deletions(-) diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index 584facf080..6430509ebd 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -21,6 +21,7 @@ static const u32 msm_venc_input_set_prop[] = { HFI_PROP_COLOR_FORMAT, HFI_PROP_RAW_RESOLUTION, + HFI_PROP_CROP_OFFSETS, HFI_PROP_LINEAR_STRIDE_SCANLINE, HFI_PROP_SIGNAL_COLOR_INFO, }; @@ -213,9 +214,10 @@ static int msm_venc_set_raw_resolution(struct msm_vidc_inst *inst, return -EINVAL; } - resolution = inst->crop.width << 16 | inst->crop.height; + resolution = (inst->fmts[port].fmt.pix_mp.width << 16) | + inst->fmts[port].fmt.pix_mp.height; i_vpr_h(inst, "%s: width: %d height: %d\n", __func__, - inst->crop.width, inst->crop.height); + inst->fmts[port].fmt.pix_mp.width, inst->fmts[port].fmt.pix_mp.height); rc = venus_hfi_session_property(inst, HFI_PROP_RAW_RESOLUTION, HFI_HOST_FLAGS_NONE, @@ -264,19 +266,25 @@ static int msm_venc_set_crop_offsets(struct msm_vidc_inst *inst, u32 crop[2] = {0}; u32 width, height; - if (port != OUTPUT_PORT) { + if (port != OUTPUT_PORT && port != INPUT_PORT) { i_vpr_e(inst, "%s: invalid port %d\n", __func__, port); return -EINVAL; } - left_offset = inst->compose.left; - top_offset = inst->compose.top; - - width = inst->compose.width; - height = inst->compose.height; - if (is_rotation_90_or_270(inst)) { - width = inst->compose.height; - height = inst->compose.width; + if (port == INPUT_PORT) { + left_offset = inst->crop.left; + top_offset = inst->crop.top; + width = inst->crop.width; + height = inst->crop.height; + } else { + left_offset = inst->compose.left; + top_offset = inst->compose.top; + width = inst->compose.width; + height = inst->compose.height; + if (is_rotation_90_or_270(inst)) { + width = inst->compose.height; + height = inst->compose.width; + } } right_offset = (inst->fmts[port].fmt.pix_mp.width - width); @@ -449,6 +457,7 @@ static int msm_venc_set_input_properties(struct msm_vidc_inst *inst) static const struct msm_venc_prop_type_handle prop_type_handle_arr[] = { {HFI_PROP_COLOR_FORMAT, msm_venc_set_colorformat }, {HFI_PROP_RAW_RESOLUTION, msm_venc_set_raw_resolution }, + {HFI_PROP_CROP_OFFSETS, msm_venc_set_crop_offsets }, {HFI_PROP_LINEAR_STRIDE_SCANLINE, msm_venc_set_stride_scanline }, {HFI_PROP_SIGNAL_COLOR_INFO, msm_venc_set_colorspace }, }; From 5cd85bc93cc0651968e32c276ecd98df8572eab9 Mon Sep 17 00:00:00 2001 From: Dikshita Agarwal Date: Wed, 8 Feb 2023 16:43:46 +0530 Subject: [PATCH 0815/1061] video: platform: taro: add default frame/operating rate Add default values for frame rate and operating rate for decoder. Change-Id: I0c9ed12fafd4655043bc408d7cee976278412a8f Signed-off-by: Dikshita Agarwal --- driver/platform/waipio/src/waipio.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/driver/platform/waipio/src/waipio.c b/driver/platform/waipio/src/waipio.c index edff258efa..fa6019d00c 100644 --- a/driver/platform/waipio/src/waipio.c +++ b/driver/platform/waipio/src/waipio.c @@ -302,14 +302,14 @@ static struct msm_platform_inst_capability instance_cap_data_waipio[] = { /* (4096 * 2304) / 256 */ {BATCH_FPS, DEC, H264|HEVC|VP9, 1, 120, 1, 120}, - {FRAME_RATE, ENC, CODECS_ALL, + {FRAME_RATE, ENC|DEC, CODECS_ALL, (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), 1, (DEFAULT_FPS << 16), 0, HFI_PROP_FRAME_RATE, CAP_FLAG_OUTPUT_PORT}, - {OPERATING_RATE, ENC, CODECS_ALL, + {OPERATING_RATE, ENC|DEC, CODECS_ALL, (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), 1, (DEFAULT_FPS << 16)}, From 06d84f081f0fbd6c888386bc90da4450f228f57f Mon Sep 17 00:00:00 2001 From: Manikanta Kanamarlapudi Date: Thu, 9 Feb 2023 20:03:36 +0530 Subject: [PATCH 0816/1061] msm: vidc: update dpb buffer size only for film grain content update buffer size only for film grain content. Change-Id: Ia9230d36ef0c917723fdb1eea82adfb8df3b3413 Signed-off-by: Manikanta Kanamarlapudi --- driver/variant/iris3/src/msm_vidc_buffer_iris3.c | 11 ++++++++--- driver/variant/iris33/src/msm_vidc_buffer_iris33.c | 11 ++++++++--- 2 files changed, 16 insertions(+), 6 deletions(-) diff --git a/driver/variant/iris3/src/msm_vidc_buffer_iris3.c b/driver/variant/iris3/src/msm_vidc_buffer_iris3.c index 99c72ec196..5d885be391 100644 --- a/driver/variant/iris3/src/msm_vidc_buffer_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_buffer_iris3.c @@ -290,9 +290,14 @@ static u32 msm_vidc_decoder_dpb_size_iris3(struct msm_vidc_inst *inst) * enabled bitstreams (UBWC & linear). */ color_fmt = inst->capabilities->cap[PIX_FMTS].value; - if (!is_linear_colorformat(color_fmt) && - inst->codec != MSM_VIDC_AV1) - return size; + if (!is_linear_colorformat(color_fmt)) { + if (inst->codec != MSM_VIDC_AV1) + return size; + + if (inst->codec == MSM_VIDC_AV1 && + !inst->capabilities->cap[FILM_GRAIN].value) + return size; + } f = &inst->fmts[OUTPUT_PORT]; width = f->fmt.pix_mp.width; diff --git a/driver/variant/iris33/src/msm_vidc_buffer_iris33.c b/driver/variant/iris33/src/msm_vidc_buffer_iris33.c index e7e80b65be..8c298be647 100644 --- a/driver/variant/iris33/src/msm_vidc_buffer_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_buffer_iris33.c @@ -290,9 +290,14 @@ static u32 msm_vidc_decoder_dpb_size_iris33(struct msm_vidc_inst *inst) * enabled bitstreams (UBWC & linear). */ color_fmt = inst->capabilities->cap[PIX_FMTS].value; - if (!is_linear_colorformat(color_fmt) && - inst->codec != MSM_VIDC_AV1) - return size; + if (!is_linear_colorformat(color_fmt)) { + if (inst->codec != MSM_VIDC_AV1) + return size; + + if (inst->codec == MSM_VIDC_AV1 && + !inst->capabilities->cap[FILM_GRAIN].value) + return size; + } f = &inst->fmts[OUTPUT_PORT]; width = f->fmt.pix_mp.width; From c1d99709cabdb35e655663bc1dc479002321e9f5 Mon Sep 17 00:00:00 2001 From: Dikshita Agarwal Date: Thu, 9 Feb 2023 22:21:02 +0530 Subject: [PATCH 0817/1061] video: driver: fix __set_clk_rate for upstream In downstream, driver vote for VIDEO_CC_MVS0_CLK_SRC which needs a multiplication factor of 3 to be applied to required freq while on upstream we vote for branch clk i.e. VIDEO_CC_MVS0_CLK hence this multiplication factor is not needed. Change-Id: I43131558b3882da303cfaa9bdb5d76080a83fc42 Signed-off-by: Dikshita Agarwal --- driver/platform/waipio/src/waipio.c | 4 ++-- driver/vidc/src/resources.c | 15 +++------------ 2 files changed, 5 insertions(+), 14 deletions(-) diff --git a/driver/platform/waipio/src/waipio.c b/driver/platform/waipio/src/waipio.c index 2475b1a535..8cc358d8c7 100644 --- a/driver/platform/waipio/src/waipio.c +++ b/driver/platform/waipio/src/waipio.c @@ -1680,7 +1680,7 @@ static const char * const waipio_opp_table[] = { "mx", "mmcx", NULL }; /* name, clock id, scaling */ static const struct clk_table waipio_clk_table[] = { { "gcc_video_axi0", GCC_VIDEO_AXI0_CLK, 0 }, - { "core_clk", VIDEO_CC_MVS0C_CLK, 1 }, + { "core_clk", VIDEO_CC_MVS0C_CLK, 0 }, { "vcodec_clk", VIDEO_CC_MVS0_CLK, 1 }, }; @@ -1698,7 +1698,7 @@ const struct context_bank_table waipio_context_bank_table[] = { /* freq */ static struct freq_table waipio_freq_table[] = { - {444000000}, {366000000}, {338000000}, {239999999} + {444000000}, {366000000}, {338000000}, {240000000} }; /* register, value, mask */ diff --git a/driver/vidc/src/resources.c b/driver/vidc/src/resources.c index 30ab37802c..5495c859fe 100644 --- a/driver/vidc/src/resources.c +++ b/driver/vidc/src/resources.c @@ -1328,7 +1328,6 @@ static int update_residency_stats( static int __set_clk_rate(struct msm_vidc_core *core, struct clock_info *cl, u64 rate) { - u64 srate; int rc = 0; /* not registered */ @@ -1340,25 +1339,17 @@ static int __set_clk_rate(struct msm_vidc_core *core, struct clock_info *cl, /* update clock residency stats */ update_residency_stats(core, cl, rate); - /* - * This conversion is necessary since we are scaling clock values based on - * the branch clock. However, mmrm driver expects source clock to be registered - * and used for scaling. - * TODO: Remove this scaling if using source clock instead of branch clock. - */ - srate = rate * MSM_VIDC_CLOCK_SOURCE_SCALING_RATIO; - /* bail early if requested clk rate is not changed */ if (rate == cl->prev) return 0; d_vpr_p("Scaling clock %s to %llu, prev %llu\n", - cl->name, srate, cl->prev * MSM_VIDC_CLOCK_SOURCE_SCALING_RATIO); + cl->name, rate, cl->prev); - rc = clk_set_rate(cl->clk, srate); + rc = clk_set_rate(cl->clk, rate); if (rc) { d_vpr_e("%s: Failed to set clock rate %llu %s: %d\n", - __func__, srate, cl->name, rc); + __func__, rate, cl->name, rc); return rc; } From 87654093334b9ba9a183b6f867ec9c76681de196 Mon Sep 17 00:00:00 2001 From: Vedang Nagar Date: Thu, 2 Feb 2023 20:35:11 +0530 Subject: [PATCH 0818/1061] video: driver: Fix unbalanced irq warning in interrupt handling In case of watchdog interrupt, power off sequence will get called which will make intr_status to 0 due to which enable_irq gets called from isr_handler irrespective of watchdog interrupt. Now during power up sequence again when the enable_irq gets called, it will through "Unbalanced enable for irq" error. Added a fix for the same. Call trace -> enable_irq+0x9c/0xf8 __power_on_ar50lt+0x2d4/0x320 [msm_video] __load_fw+0x92c/0x1368 [msm_video] venus_hfi_core_init+0x64/0x468 [msm_video] msm_vidc_core_init+0x158/0x4bc [msm_video] msm_vidc_open+0x90/0x804 [msm_video] Change-Id: Ic675d7540ef029e530a8cd5b87fb97f72e72057f Signed-off-by: Vedang Nagar --- driver/variant/iris2/src/msm_vidc_iris2.c | 3 +-- driver/variant/iris3/src/msm_vidc_iris3.c | 3 +-- driver/variant/iris33/src/msm_vidc_iris33.c | 3 +-- 3 files changed, 3 insertions(+), 6 deletions(-) diff --git a/driver/variant/iris2/src/msm_vidc_iris2.c b/driver/variant/iris2/src/msm_vidc_iris2.c index 85bb0c260c..032c2043d6 100644 --- a/driver/variant/iris2/src/msm_vidc_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_iris2.c @@ -439,9 +439,8 @@ static int __power_off_iris2(struct msm_vidc_core *core) if (rc) d_vpr_e("%s: failed to unvote buses\n", __func__); - if (!(core->intr_status & WRAPPER_INTR_STATUS_A2HWD_BMSK_IRIS2)) + if (!call_venus_op(core, watchdog, core, core->intr_status)) disable_irq_nosync(core->resource->irq); - core->intr_status = 0; msm_vidc_change_core_sub_state(core, CORE_SUBSTATE_POWER_ENABLE, 0, __func__); diff --git a/driver/variant/iris3/src/msm_vidc_iris3.c b/driver/variant/iris3/src/msm_vidc_iris3.c index bb998d8403..ef2b2c21b5 100644 --- a/driver/variant/iris3/src/msm_vidc_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_iris3.c @@ -489,9 +489,8 @@ static int __power_off_iris3(struct msm_vidc_core *core) if (rc) d_vpr_e("%s: failed to unvote buses\n", __func__); - if (!(core->intr_status & WRAPPER_INTR_STATUS_A2HWD_BMSK_IRIS3)) + if (!call_venus_op(core, watchdog, core, core->intr_status)) disable_irq_nosync(core->resource->irq); - core->intr_status = 0; msm_vidc_change_core_sub_state(core, CORE_SUBSTATE_POWER_ENABLE, 0, __func__); diff --git a/driver/variant/iris33/src/msm_vidc_iris33.c b/driver/variant/iris33/src/msm_vidc_iris33.c index 02d6169e3b..616232679d 100644 --- a/driver/variant/iris33/src/msm_vidc_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_iris33.c @@ -593,9 +593,8 @@ static int __power_off_iris33(struct msm_vidc_core *core) if (rc) d_vpr_e("%s: failed to unvote buses\n", __func__); - if (!(core->intr_status & WRAPPER_INTR_STATUS_A2HWD_BMSK_IRIS33)) + if (!call_venus_op(core, watchdog, core, core->intr_status)) disable_irq_nosync(core->resource->irq); - core->intr_status = 0; msm_vidc_change_core_sub_state(core, CORE_SUBSTATE_POWER_ENABLE, 0, __func__); From 9e5429a77d6315b571ad8bddc1470e7f6f9977ce Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Thu, 2 Feb 2023 17:03:37 +0530 Subject: [PATCH 0819/1061] video: driver: introduce substate allow table to populate allow_mask get allow_mask from substate allow table and decide to update/ignore based on that mask. Change-Id: I1cd465069717561aeadeeba7241128bd450d4933 Signed-off-by: Govindaraj Rajagopal --- driver/vidc/src/msm_vidc_state.c | 192 ++++++++++++++++++++++++++----- 1 file changed, 162 insertions(+), 30 deletions(-) diff --git a/driver/vidc/src/msm_vidc_state.c b/driver/vidc/src/msm_vidc_state.c index 2d83cb8444..698309848c 100644 --- a/driver/vidc/src/msm_vidc_state.c +++ b/driver/vidc/src/msm_vidc_state.c @@ -612,7 +612,7 @@ static enum msm_vidc_allow msm_vidc_allow_state_change( {MSM_VIDC_ERROR, MSM_VIDC_INPUT_STREAMING, MSM_VIDC_IGNORE }, {MSM_VIDC_ERROR, MSM_VIDC_OUTPUT_STREAMING, MSM_VIDC_IGNORE }, {MSM_VIDC_ERROR, MSM_VIDC_STREAMING, MSM_VIDC_IGNORE }, - {MSM_VIDC_ERROR, MSM_VIDC_CLOSE, MSM_VIDC_ALLOW }, + {MSM_VIDC_ERROR, MSM_VIDC_CLOSE, MSM_VIDC_IGNORE }, {MSM_VIDC_ERROR, MSM_VIDC_ERROR, MSM_VIDC_IGNORE }, }; @@ -686,9 +686,8 @@ static int msm_vidc_open_state(struct msm_vidc_inst *inst, struct vb2_queue *q = (struct vb2_queue *)data; /* ignore streamoff request in open state */ - i_vpr_e(inst, "%s: type %d is %s in state %s\n", - __func__, q->type, allow_name(MSM_VIDC_IGNORE), - state_name(inst->state)); + i_vpr_h(inst, "%s: streamoff of (%s) ignored in state (%s)\n", + __func__, v4l2_type_name(q->type), state_name(inst->state)); break; } case MSM_VIDC_CMD_START: @@ -823,20 +822,19 @@ static int msm_vidc_input_streaming_state(struct msm_vidc_inst *inst, case MSM_VIDC_STREAMOFF: { struct vb2_queue *q = (struct vb2_queue *)data; - enum msm_vidc_allow allow = MSM_VIDC_ALLOW; /* ignore */ - if (q->type == OUTPUT_MPLANE || q->type == OUTPUT_META_PLANE) - allow = MSM_VIDC_IGNORE; - /* disallow */ - else if (q->type == INPUT_META_PLANE) - allow = MSM_VIDC_DISALLOW; + if (q->type == OUTPUT_MPLANE || q->type == OUTPUT_META_PLANE) { + i_vpr_h(inst, "%s: streamoff of (%s) ignored in state (%s)\n", + __func__, v4l2_type_name(q->type), state_name(inst->state)); + return 0; + } - if (allow != MSM_VIDC_ALLOW) { - i_vpr_e(inst, "%s: type %d is %s in state %s\n", - __func__, q->type, allow_name(allow), - state_name(inst->state)); - return (allow == MSM_VIDC_DISALLOW ? -EINVAL : 0); + /* disallow */ + if (q->type == INPUT_META_PLANE) { + i_vpr_e(inst, "%s: streamoff of (%s) not allowed in state (%s)\n", + __func__, v4l2_type_name(q->type), state_name(inst->state)); + return -EINVAL; } /* sanitize type field */ @@ -974,20 +972,19 @@ static int msm_vidc_output_streaming_state(struct msm_vidc_inst *inst, case MSM_VIDC_STREAMOFF: { struct vb2_queue *q = (struct vb2_queue *)data; - enum msm_vidc_allow allow = MSM_VIDC_ALLOW; /* ignore */ - if (q->type == INPUT_MPLANE || q->type == INPUT_META_PLANE) - allow = MSM_VIDC_IGNORE; - /* disallow */ - else if (q->type == OUTPUT_META_PLANE) - allow = MSM_VIDC_DISALLOW; + if (q->type == INPUT_MPLANE || q->type == INPUT_META_PLANE) { + i_vpr_h(inst, "%s: streamoff of (%s) ignored in state (%s)\n", + __func__, v4l2_type_name(q->type), state_name(inst->state)); + return 0; + } - if (allow != MSM_VIDC_ALLOW) { - i_vpr_e(inst, "%s: type %d is %s in state %s\n", - __func__, q->type, allow_name(allow), - state_name(inst->state)); - return (allow == MSM_VIDC_DISALLOW ? -EINVAL : 0); + /* disallow */ + if (q->type == OUTPUT_META_PLANE) { + i_vpr_e(inst, "%s: streamoff of (%s) not allowed in state (%s)\n", + __func__, v4l2_type_name(q->type), state_name(inst->state)); + return -EINVAL; } /* sanitize type field */ @@ -1091,9 +1088,8 @@ static int msm_vidc_streaming_state(struct msm_vidc_inst *inst, /* disallow */ if (q->type == INPUT_META_PLANE || q->type == OUTPUT_META_PLANE) { - i_vpr_e(inst, "%s: type %d is %s in state %s\n", - __func__, q->type, allow_name(MSM_VIDC_DISALLOW), - state_name(inst->state)); + i_vpr_e(inst, "%s: streamoff of (%s) not allowed in state (%s)\n", + __func__, v4l2_type_name(q->type), state_name(inst->state)); return -EINVAL; } @@ -1293,6 +1289,134 @@ int msm_vidc_change_state(struct msm_vidc_inst *inst, return 0; } +struct msm_vidc_sub_state_allow { + enum msm_vidc_state state; + enum msm_vidc_allow allow; + u32 sub_state_mask; +}; + +static int msm_vidc_set_sub_state(struct msm_vidc_inst *inst, + enum msm_vidc_sub_state sub_state, const char *func) +{ + char sub_state_name[MAX_NAME_LENGTH]; + int cnt, rc = 0; + static struct msm_vidc_sub_state_allow sub_state_allow[] = { + /* state, allow, sub_state */ + {MSM_VIDC_OPEN, MSM_VIDC_DISALLOW, MSM_VIDC_DRC | + MSM_VIDC_DRAIN | + MSM_VIDC_DRC_LAST_BUFFER | + MSM_VIDC_DRAIN_LAST_BUFFER | + MSM_VIDC_INPUT_PAUSE | + MSM_VIDC_OUTPUT_PAUSE }, + + {MSM_VIDC_INPUT_STREAMING, MSM_VIDC_DISALLOW, MSM_VIDC_DRC_LAST_BUFFER | + MSM_VIDC_DRAIN_LAST_BUFFER | + MSM_VIDC_OUTPUT_PAUSE }, + {MSM_VIDC_INPUT_STREAMING, MSM_VIDC_ALLOW, MSM_VIDC_DRC | + MSM_VIDC_DRAIN | + MSM_VIDC_INPUT_PAUSE }, + + {MSM_VIDC_OUTPUT_STREAMING, MSM_VIDC_DISALLOW, MSM_VIDC_DRC | + MSM_VIDC_DRAIN | + MSM_VIDC_INPUT_PAUSE }, + {MSM_VIDC_OUTPUT_STREAMING, MSM_VIDC_ALLOW, MSM_VIDC_DRC_LAST_BUFFER | + MSM_VIDC_DRAIN_LAST_BUFFER | + MSM_VIDC_OUTPUT_PAUSE }, + + {MSM_VIDC_STREAMING, MSM_VIDC_ALLOW, MSM_VIDC_DRC | + MSM_VIDC_DRAIN | + MSM_VIDC_DRC_LAST_BUFFER | + MSM_VIDC_DRAIN_LAST_BUFFER | + MSM_VIDC_INPUT_PAUSE | + MSM_VIDC_OUTPUT_PAUSE }, + + {MSM_VIDC_CLOSE, MSM_VIDC_ALLOW, MSM_VIDC_DRC | + MSM_VIDC_DRAIN | + MSM_VIDC_DRC_LAST_BUFFER | + MSM_VIDC_DRAIN_LAST_BUFFER | + MSM_VIDC_INPUT_PAUSE | + MSM_VIDC_OUTPUT_PAUSE }, + + {MSM_VIDC_ERROR, MSM_VIDC_ALLOW, MSM_VIDC_DRC | + MSM_VIDC_DRAIN | + MSM_VIDC_DRC_LAST_BUFFER | + MSM_VIDC_DRAIN_LAST_BUFFER | + MSM_VIDC_INPUT_PAUSE | + MSM_VIDC_OUTPUT_PAUSE }, + }; + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + /* no substate to update */ + if (!sub_state) + return 0; + + /* check if any substate is disallowed */ + for (cnt = 0; cnt < ARRAY_SIZE(sub_state_allow); cnt++) { + /* skip other states */ + if (sub_state_allow[cnt].state != inst->state) + continue; + + /* continue if not disallowed */ + if (sub_state_allow[cnt].allow != MSM_VIDC_DISALLOW) + continue; + + if (sub_state_allow[cnt].sub_state_mask & sub_state) { + prepare_sub_state_name(sub_state, sub_state_name, sizeof(sub_state_name)); + i_vpr_e(inst, "%s: state (%s), disallow substate (%s)\n", + func, state_name(inst->state), sub_state_name); + return -EINVAL; + } + } + + /* remove ignorable substates from a given substate */ + for (cnt = 0; cnt < ARRAY_SIZE(sub_state_allow); cnt++) { + /* skip other states */ + if (sub_state_allow[cnt].state != inst->state) + continue; + + /* continue if not ignored */ + if (sub_state_allow[cnt].allow != MSM_VIDC_IGNORE) + continue; + + if (sub_state_allow[cnt].sub_state_mask & sub_state) { + prepare_sub_state_name(sub_state, sub_state_name, sizeof(sub_state_name)); + i_vpr_h(inst, "%s: state (%s), ignore substate (%s)\n", + func, state_name(inst->state), sub_state_name); + + /* remove ignorable substate bits from actual */ + sub_state &= ~(sub_state_allow[cnt].sub_state_mask & sub_state); + break; + } + } + + /* check if all substate bits are allowed */ + for (cnt = 0; cnt < ARRAY_SIZE(sub_state_allow); cnt++) { + /* skip other states */ + if (sub_state_allow[cnt].state != inst->state) + continue; + + /* continue if not allowed */ + if (sub_state_allow[cnt].allow != MSM_VIDC_ALLOW) + continue; + + if ((sub_state_allow[cnt].sub_state_mask & sub_state) != sub_state) { + prepare_sub_state_name(sub_state, sub_state_name, sizeof(sub_state_name)); + i_vpr_e(inst, "%s: state (%s), not all substates allowed (%s)\n", + func, state_name(inst->state), sub_state_name); + return -EINVAL; + } + } + + /* update substate */ + inst->sub_state |= sub_state; + + return rc; +} + int msm_vidc_change_sub_state(struct msm_vidc_inst *inst, enum msm_vidc_sub_state clear_sub_state, enum msm_vidc_sub_state set_sub_state, const char *func) @@ -1311,9 +1435,11 @@ int msm_vidc_change_sub_state(struct msm_vidc_inst *inst, return 0; } + /* final value will not change */ if (!clear_sub_state && !set_sub_state) return 0; + /* sanitize clear & set value */ if ((clear_sub_state & set_sub_state) || (set_sub_state > MSM_VIDC_MAX_SUB_STATE_VALUE) || (clear_sub_state > MSM_VIDC_MAX_SUB_STATE_VALUE)) { @@ -1323,7 +1449,13 @@ int msm_vidc_change_sub_state(struct msm_vidc_inst *inst, } prev_sub_state = inst->sub_state; - inst->sub_state |= set_sub_state; + + /* set sub state */ + rc = msm_vidc_set_sub_state(inst, set_sub_state, __func__); + if (rc) + return rc; + + /* clear sub state */ inst->sub_state &= ~clear_sub_state; /* print substates only when there is a change */ From 908ab6358ba7e507138849acb31d3c90792fabf8 Mon Sep 17 00:00:00 2001 From: Ankush Mitra Date: Mon, 13 Feb 2023 11:51:40 +0530 Subject: [PATCH 0820/1061] video: driver: introduction of new debug print Introduce d_vpr_hs to print both VIDC_HIGH or VIDC_STAT log. Change-Id: Ie7bfa8df033b30689eca6ad6a4637978730eadf7 Signed-off-by: Ankush Mitra --- driver/vidc/inc/msm_vidc_debug.h | 2 ++ driver/vidc/src/msm_vidc_driver.c | 6 +++--- driver/vidc/src/resources.c | 4 ++-- 3 files changed, 7 insertions(+), 5 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_debug.h b/driver/vidc/inc/msm_vidc_debug.h index 83094620e7..c9d84c6f00 100644 --- a/driver/vidc/inc/msm_vidc_debug.h +++ b/driver/vidc/inc/msm_vidc_debug.h @@ -130,6 +130,8 @@ enum vidc_msg_prio { #define d_vpr_t(__fmt, ...) dprintk_core(VIDC_PKT, "pkt ", __fmt, ##__VA_ARGS__) #define d_vpr_b(__fmt, ...) dprintk_core(VIDC_BUS, "bus ", __fmt, ##__VA_ARGS__) #define d_vpr_s(__fmt, ...) dprintk_core(VIDC_STAT, "stat", __fmt, ##__VA_ARGS__) +#define d_vpr_hs(__fmt, ...) \ + dprintk_core(VIDC_HIGH | VIDC_STAT, "high", __fmt, ##__VA_ARGS__) #define dprintk_ratelimit(__level, __level_str, __fmt, ...) \ do { \ diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 6f77a9e517..73e461436a 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -309,7 +309,7 @@ int msm_vidc_add_buffer_stats(struct msm_vidc_inst *inst, } core = inst->core; - if (!(msm_vidc_debug & VIDC_STAT)) + if (!(msm_vidc_debug & VIDC_LOW)) return 0; /* stats applicable only to input & output buffers */ @@ -353,7 +353,7 @@ int msm_vidc_remove_buffer_stats(struct msm_vidc_inst *inst, } core = inst->core; - if (!(msm_vidc_debug & VIDC_STAT)) + if (!(msm_vidc_debug & VIDC_LOW)) return 0; /* stats applicable only to input & output buffers */ @@ -407,7 +407,7 @@ int msm_vidc_remove_buffer_stats(struct msm_vidc_inst *inst, /* remove stats node */ if (remove_stat) { list_del_init(&stats->list); - print_buffer_stats(VIDC_STAT, "stat", inst, stats); + print_buffer_stats(VIDC_LOW, "low ", inst, stats); msm_vidc_pool_free(inst, stats); } } diff --git a/driver/vidc/src/resources.c b/driver/vidc/src/resources.c index 30ab37802c..d3e2d44b7e 100644 --- a/driver/vidc/src/resources.c +++ b/driver/vidc/src/resources.c @@ -1222,9 +1222,9 @@ static int print_residency_stats(struct msm_vidc_core *core, struct clock_info * /* print residency percent for each clock */ list_for_each_entry(residency, &cl->residency_list, list) { - d_vpr_h("%s: %s clock rate [%d] total %lluus residency %u%%\n", + d_vpr_hs("%s: %s clock rate [%d] total %lluus residency %u%%\n", __func__, cl->name, residency->rate, residency->total_time_us, - residency->total_time_us * 100 / total_time_us); + (residency->total_time_us * 100 + total_time_us - 1) / total_time_us); } return rc; From 6e414ca7a751ee164499b2868bf500b85d5ac79a Mon Sep 17 00:00:00 2001 From: Chinmay Sawarkar Date: Mon, 11 Apr 2022 18:52:44 -0700 Subject: [PATCH 0821/1061] video: driver: kalama power calculations New bandwidth and frequency calculation functions for kalama. Change-Id: Iaca0be832c42e00bb7404f7cfbac5bbf03427144 Signed-off-by: Ashish Patil --- .../platform/common/inc/perf_static_model.h | 237 +++++ .../platform/kalama/inc/kalama_technology.h | 246 +++++ .../variant/iris3/inc/msm_vidc_power_iris3.h | 2 + driver/variant/iris3/src/msm_vidc_bus_iris3.c | 922 ++++++++++++++++++ .../variant/iris3/src/msm_vidc_clock_iris3.c | 548 +++++++++++ .../variant/iris3/src/msm_vidc_power_iris3.c | 372 ++++++- msm_video/Kbuild | 2 + video/Kbuild | 2 + 8 files changed, 2329 insertions(+), 2 deletions(-) create mode 100644 driver/platform/common/inc/perf_static_model.h create mode 100644 driver/platform/kalama/inc/kalama_technology.h create mode 100644 driver/variant/iris3/src/msm_vidc_bus_iris3.c create mode 100644 driver/variant/iris3/src/msm_vidc_clock_iris3.c diff --git a/driver/platform/common/inc/perf_static_model.h b/driver/platform/common/inc/perf_static_model.h new file mode 100644 index 0000000000..cc1f78a492 --- /dev/null +++ b/driver/platform/common/inc/perf_static_model.h @@ -0,0 +1,237 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#ifndef _PERF_STATIC_MODEL_H_ +#define _PERF_STATIC_MODEL_H_ + +#include + +/* Reordered CODECS to match Bitrate Table rows */ +#define CODEC_H264_CAVLC 0 +#define CODEC_H264 1 +#define CODEC_HEVC 2 +#define CODEC_VP9 3 +#define CODEC_AV1 4 + +#define CODEC_BSE_FrameFactor 0 +#define CODEC_BSE_MBFactor 1 +#define CODEC_BSE_LUC_SIZE 2 + +#define CODEC_GOP_IPP 0 +#define CODEC_GOP_IbP 1 +#define CODEC_GOP_I1B2b1P 2 +#define CODEC_GOP_I3B4b1P 3 +#define CODEC_GOP_PONLY 4 +#define CODEC_GOP_bONLY 5 +#define CODEC_GOP_BONLY 6 +#define CODEC_GOP_IONLY 7 + +#define CODEC_ENCODER_GOP_Bb_ENTRY 0 +#define CODEC_ENCODER_GOP_P_ENTRY 1 +#define CODEC_ENCODER_GOP_FACTORY_ENTRY 2 + +#define CODEC_ENTROPY_CODING_CAVLC 0 +#define CODEC_ENTROPY_CODING_CABAC 1 + +#define CODEC_VSPVPP_MODE_1S 1 +#define CODEC_VSPVPP_MODE_2S 2 + +#define COMP_SETTING_PWC 0 +#define COMP_SETTING_AVG 1 +#define COMP_SETTING_POWER 2 + +#define CODEC_BITDEPTH_8 8 +#define CODEC_BITDEPTH_10 10 + +#define ENCODE_YUV 0 +#define ENCODE_RGB 1 + +#define COMPLEXITY_PWC 0 +#define COMPLEXITY_AVG 1 +#define COMPLEXITY_POWER 2 + +#define MAX_LINE 2048 +#ifndef VENUS_MAX_FILENAME_LENGTH +#define VENUS_MAX_FILENAME_LENGTH 1024 +#endif + +#define CODEC_ENCODER 1 +#define CODEC_DECODER 2 + +#define COMPLEXITY_THRESHOLD 2 + +enum chipset_generation { + MSM_KONA = 0, + MSM_LAHAINA, + MSM_WAIPIO, + MSM_MAKENA, + MSM_KALAMA, + MSM_QOGNITION, + MSM_MAX, +}; + +enum regression_mode { + /* ignores client set cr and bitrate settings */ + REGRESSION_MODE_SANITY = 1, + /* cr and bitrate default mode */ + REGRESSION_MODE_DEFAULT, + /* custom mode where client will set cr and bitrate values */ + REGRESSION_MODE_CUSTOM, +}; + +/* + * If firmware provided motion_vector_complexity is >= 2 then set the + * complexity_setting as PWC (performance worst case) + * If the motion_vector_complexity is < 2 then set the complexity_setting + * as AVG (average case value) + */ +enum complexity_setting { + COMPLEXITY_SETTING_PWC = 0, + COMPLEXITY_SETTING_AVG = 1, + COMPLEXITY_SETTING_PWR = 2, +}; + +/* + * If firmware provided motion_vector_complexity is >= 2 then set the + * refframe_complexity as PWC (performance worst case) + * If the motion_vector_complexity is < 2 then set the refframe_complexity + * as AVG (average case value) + */ +enum refframe_complexity { + REFFRAME_COMPLEXITY_PWC = 4, + REFFRAME_COMPLEXITY_AVG = 2, + REFFRAME_COMPLEXITY_PWR = 1, +}; + +struct api_calculation_input { + /*2: decoder; 1: encoder */ + u32 decoder_or_encoder; + + /* enum chipset_generation */ + u32 chipset_gen; + + u32 codec; + u32 lcu_size; + u32 pipe_num; + u32 frame_rate; + u32 frame_width; + u32 frame_height; + u32 vsp_vpp_mode; + u32 entropy_coding_mode; + u32 hierachical_layer; + + /* PWC, AVG/POWER */ + u32 complexity_setting; + + u32 status_llc_onoff; + u32 bitdepth; + u32 linear_opb; + + /* AV1D FG */ + u32 split_opb; + + u32 linear_ipb; + u32 lossy_ipb; + u32 ipb_yuvrgb; + u32 encoder_multiref; + u32 bitrate_mbps; + u32 refframe_complexity; + u32 cr_ipb; + u32 cr_rpb; + u32 cr_dpb; + u32 cr_opb; + u32 av1d_commer_tile_enable; + u32 regression_mode; + + /* used in aurora for depth map decode */ + u32 lumaonly_decode; + +}; + +struct corner_voting { + u32 percent_lowbound; + u32 percent_highbound; +}; + +struct api_calculation_freq_output { + u32 vpp_min_freq; + u32 vsp_min_freq; + u32 tensilica_min_freq; + u32 hw_min_freq; + u32 enc_hqmode; + struct corner_voting usecase_corner; +}; + +struct api_calculation_bw_output { + u32 vsp_read_noc; + u32 vsp_write_noc; + u32 vsp_read_ddr; + u32 vsp_write_ddr; + u32 vsp_rd_wr_total_noc; + u32 vsp_rd_wr_total_ddr; + + u32 collocated_rd_noc; + u32 collocated_wr_noc; + u32 collocated_rd_ddr; + u32 collocated_wr_ddr; + u32 collocated_rd_wr_total_noc; + u32 collocated_rd_wr_total_ddr; + + u32 dpb_rd_y_noc; + u32 dpb_rd_crcb_noc; + u32 dpb_rdwr_duetooverlap_noc; + u32 dpb_wr_noc; + u32 dpb_rd_y_ddr; + u32 dpb_rd_crcb_ddr; + u32 dpb_rdwr_duetooverlap_ddr; + u32 dpb_wr_ddr; + u32 dpb_rd_wr_total_noc; + u32 dpb_rd_wr_total_ddr; + + u32 opb_write_total_noc; + u32 opb_write_total_ddr; + + u32 ipb_rd_total_noc; + u32 ipb_rd_total_ddr; + + u32 bse_tlb_rd_noc; + u32 bse_tlb_wr_noc; + u32 bse_tlb_rd_ddr; + u32 bse_tlb_wr_ddr; + u32 bse_rd_wr_total_noc; + u32 bse_rd_wr_total_ddr; + + u32 statistics_rd_noc; + u32 statistics_wr_noc; + u32 statistics_rd_ddr; + u32 statistics_wr_ddr; + + u32 mmu_rd_noc; + u32 mmu_rd_ddr; + + u32 noc_bw_rd; + u32 noc_bw_wr; + u32 ddr_bw_rd; + u32 ddr_bw_wr; + + /* llc BW components for aurora */ + u32 dpb_rd_y_llc; + u32 dpb_rd_crcb_llc; + u32 dpb_wr_llc; + u32 bse_tlb_rd_llc; + u32 bse_tlb_wr_llc; + u32 vsp_read_llc; + u32 vsp_write_llc; + + u32 llc_bw_rd; + u32 llc_bw_wr; +}; + +int msm_vidc_calculate_frequency(struct api_calculation_input codec_input, + struct api_calculation_freq_output *codec_output); +int msm_vidc_calculate_bandwidth(struct api_calculation_input codec_input, + struct api_calculation_bw_output *codec_output); + +#endif /*_PERF_STATIC_MODEL_H_ */ diff --git a/driver/platform/kalama/inc/kalama_technology.h b/driver/platform/kalama/inc/kalama_technology.h new file mode 100644 index 0000000000..08412c75d6 --- /dev/null +++ b/driver/platform/kalama/inc/kalama_technology.h @@ -0,0 +1,246 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include "perf_static_model.h" + +#define ENABLE_FINEBITRATE_SUBUHD60 0 + +/* + * Chipset Generation Technology: SW/FW overhead profiling + * need update with new numbers + */ +static u32 frequency_table_kalama[2][6] = +{ + /* //make lowsvs_D1 as invalid; */ + {533, 444, 366, 338, 240, 0}, + {800, 666, 549, 507, 360, 0}, +}; + + /* + * TODO Move to kalama.c + * TODO Replace hardcoded values with + * ENCODER_VPP_TARGET_CLK_PER_MB_KALAMA in CPP file. + */ + + /* Tensilica cycles */ +#define DECODER_VPP_FW_OVERHEAD_KALAMA 66234 + +/* Tensilica cycles; this is measured in Lahaina 1stage with FW profiling */ +#define DECODER_VPPVSP1STAGE_FW_OVERHEAD_KALAMA 93000 + +#define DECODER_VSP_FW_OVERHEAD_KALAMA \ + DECODER_VPPVSP1STAGE_FW_OVERHEAD_KALAMA - DECODER_VPP_FW_OVERHEAD_KALAMA + +/* Tensilica cycles; encoder has ARP register */ +#define ENCODER_VPP_FW_OVERHEAD_KALAMA 48405 + +#define ENCODER_VPPVSP1STAGE_FW_OVERHEAD_KALAMA \ + ENCODER_VPP_FW_OVERHEAD_KALAMA + DECODER_VSP_FW_OVERHEAD_KALAMA + +#define DECODER_SW_OVERHEAD_KALAMA 489583 +#define ENCODER_SW_OVERHEAD_KALAMA 489583 + +/* Video IP Core Technology: pipefloor and pipe penlaty */ +static u32 encoder_vpp_target_clk_per_mb_kalama[2] = {320, 675}; +static u32 decoder_vpp_target_clk_per_mb_kalama = 200; + +/* + * These pipe penalty numbers only applies to 4 pipe + * For 2pipe and 1pipe, these numbers need recalibrate + */ +static u32 pipe_penalty_kalama[3][3] = +{ + /* NON AV1 */ + {1059, 1059, 1059}, + /* AV1 RECOMMENDED TILE 1080P_V2XH1, UHD_V2X2, 8KUHD_V8X2 */ + {1410, 1248, 1226}, + /* AV1 YOUTUBE/NETFLIX TILE 1080P_V4XH2_V4X1, UHD_V8X4_V8X1, 8KUHD_V8X8_V8X1 */ + {2039, 2464, 1191}, +}; + +/* + * Video IP Core Technology: bitrate constraint + * HW limit bitrate table (these values are measured end to end fw/sw impacts are also considered) + * TODO Can we convert to Cycles/MB? This will remove DIVISION. + */ +static u32 bitrate_table_kalama_2stage_fp[5][10] = +{ + /* h264 cavlc */ + {0, 220, 220, 220, 220, 220, 220, 220, 220, 220}, + /* h264 cabac */ + {0, 140, 150, 160, 175, 190, 190, 190, 190, 190}, + /* h265 */ + {90, 140, 160, 180, 190, 200, 200, 200, 200, 200}, + /* vp9 */ + {90, 90, 90, 90, 90, 90, 90, 90, 90, 90}, + /* av1 */ + {130, 130, 120, 120, 120, 120, 120, 120, 120, 120}, +}; + +/* HW limit bitrate table (these values are measured end to end fw/sw impacts are also considered) */ +static u32 bitrate_table_kalama_1stage_fp[5][10] = /* 1-stage assume IPPP */ +{ + /* h264 cavlc */ + {0, 220, 220, 220, 220, 220, 220, 220, 220, 220}, + /* h264 cabac */ + {0, 110, 150, 150, 150, 150, 150, 150, 150, 150}, + /* h265 */ + {0, 140, 150, 150, 150, 150, 150, 150, 150, 150}, + /* vp9 */ + {0, 70, 70, 70, 70, 70, 70, 70, 70, 70}, + /* av1 */ + {0, 100, 100, 100, 100, 100, 100, 100, 100, 100}, +}; + +/* rec pwc and power bitrate table */ +static u32 bitrate_table_kalama_rec_fp[5][10] = +{ + /* rec. worst bitrate based on bitrate table */ +#if ENABLE_FINEBITRATE_SUBUHD60 + /* h264 cavlc */ + {0, 168, 150, 120, 100, 90, 50, 32, 20, 14}, + /* h264 cabac 8bit */ + {0, 134, 109, 84, 67, 56, 35, 23, 14, 10}, + /* h265 10bit assumption */ + {70, 140, 116, 92, 74, 62, 39, 25, 16, 11}, + /* vp9 (profiled content from youtube and nflx) */ + {70, 70, 65, 55, 45, 35, 20, 8, 6, 5}, + /* av1 (profiled content from youtube and nflx) */ + {100, 100, 85, 70, 55, 30, 15, 5, 5, 5}, +#else + /* h264 cavlc */ + {0, 168, 150, 120, 100, 90, 90, 90, 90, 90}, + /* h264 cabac 8bit */ + {0, 134, 109, 84, 67, 56, 56, 56, 56, 56}, + /* h265 10bit assumption */ + {70, 140, 116, 92, 74, 62, 62, 62, 62, 62}, + /* vp9 */ + {70, 70, 65, 55, 45, 35, 35, 35, 35, 35}, + /* av1 */ + {100, 100, 85, 70, 55, 50, 50, 50, 50, 50}, +#endif +}; + +static u32 input_bitrate_fp = 0; + +/* 8KUHD60; UHD240; 1080p960 with B */ +static u32 fp_pixel_count_bar0 = 3840 * 2160 * 240; +/* 8KUHD60; UHD240; 1080p960 without B */ +static u32 fp_pixel_count_bar1 = 3840 * 2160 * 240; +/* 1080p720 */ +static u32 fp_pixel_count_bar2 = 3840 * 2160 * 180; +/* UHD120 */ +static u32 fp_pixel_count_bar3 = 3840 * 2160 * 120; +/* UHD90 */ +static u32 fp_pixel_count_bar4 = 3840 * 2160 * 90; +/* UHD60 */ +static u32 fp_pixel_count_bar5 = 3840 * 2160 * 60; +/* UHD30; FHD120; HD240 */ +static u32 fp_pixel_count_bar6 = 3840 * 2160 * 30; +/* FHD60 */ +static u32 fp_pixel_count_bar7 = 1920 * 1080 * 60; +/* FHD30 */ +static u32 fp_pixel_count_bar8 = 1920 * 1080 * 30; +/* HD30 */ +static u32 fp_pixel_count_bar9 = 1280 * 720 * 30; + +static u32 codec_encoder_gop_complexity_table_fp[8][3]; +static u32 codec_mbspersession_kalama; + +static u32 cr_table_basic_kalama[7][4] = +{ + {1920, 1080, 20, 40}, + {3840, 2160, 42, 84}, + {4096, 2160, 44, 88}, + {4096, 2304, 48, 96}, + {1280, 720, 7, 14}, + {2560, 1440, 32, 64}, + {7680, 4320, 84, 168}, +}; + +/* 100x */ +static u32 dpbopb_ubwc30_cr_table_cratio_kalama[7][12] = +{ + {237, 399, 272, 137, 225, 158, 185, 259, 203, 138, 167, 152}, + {269, 404, 302, 202, 367, 238, 210, 299, 232, 134, 181, 149}, + {269, 404, 302, 202, 367, 238, 210, 299, 232, 134, 181, 149}, + {269, 404, 302, 202, 367, 238, 210, 299, 232, 134, 181, 149}, + {237, 399, 272, 137, 225, 158, 185, 259, 203, 138, 167, 152}, + {269, 404, 302, 202, 367, 238, 210, 299, 232, 134, 181, 149}, + {269, 404, 302, 202, 367, 238, 210, 299, 232, 134, 181, 149}, +}; + +/* 100x */ +static u32 rpb_ubwc30_cr_table_cratio_kalama[7][12] = +{ + {193, 294, 218, 135, 214, 155, 175, 241, 191, 139, 162, 149}, + {285, 406, 316, 207, 373, 243, 201, 280, 221, 139, 177, 152}, + {285, 406, 316, 207, 373, 243, 201, 280, 221, 139, 177, 152}, + {285, 406, 316, 207, 373, 243, 201, 280, 221, 139, 177, 152}, + {193, 294, 218, 135, 214, 155, 175, 241, 191, 139, 162, 149}, + {285, 406, 316, 207, 373, 243, 201, 280, 221, 139, 177, 152}, + {285, 406, 316, 207, 373, 243, 201, 280, 221, 139, 177, 152}, +}; + +/* 100x */ +static u32 ipblossy_ubwc30_cr_table_cratio_kalama[7][12] = +{ + {215, 215, 215, 174, 174, 174, 266, 266, 266, 231, 231, 231}, + {254, 254, 254, 219, 219, 219, 292, 292, 292, 249, 249, 249}, + {254, 254, 254, 219, 219, 219, 292, 292, 292, 249, 249, 249}, + {254, 254, 254, 219, 219, 219, 292, 292, 292, 249, 249, 249}, + {215, 215, 215, 174, 174, 174, 266, 266, 266, 231, 231, 231}, + {254, 254, 254, 219, 219, 219, 292, 292, 292, 249, 249, 249}, + {254, 254, 254, 219, 219, 219, 292, 292, 292, 249, 249, 249}, +}; + +/* 100x */ +static u32 ipblossless_ubwc30_cr_table_cratio_kalama[7][12] = +{ + {185, 215, 194, 147, 178, 159, 162, 181, 169, 138, 161, 146}, + {186, 217, 195, 151, 183, 161, 164, 182, 170, 140, 168, 148}, + {186, 217, 195, 151, 183, 161, 164, 182, 170, 140, 168, 148}, + {186, 217, 195, 151, 183, 161, 164, 182, 170, 140, 168, 148}, + {185, 215, 194, 147, 178, 159, 162, 181, 169, 138, 161, 146}, + {186, 217, 195, 151, 183, 161, 164, 182, 170, 140, 168, 148}, + {186, 217, 195, 151, 183, 161, 164, 182, 170, 140, 168, 148}, +}; + +/* 100x */ +static u32 en_original_compression_factor_rgba_pwd_kalama = 243; +/* 100x */ +static u32 en_original_compression_factor_rgba_avg_kalama = 454; + +static u32 av1_num_tiles_kalama[7][3] = +{ + {2, 1, 1}, + {4, 2, 2}, + {4, 2, 2}, + {4, 2, 2}, + {1, 1, 1}, + {2, 1, 1}, + {16, 4, 4}, +}; + +/* H I J K L M N O P + * TotalW Total R Frequency Write Read + * Name B b P B b P B b P + * I3B4b1P 0.5 1.875 3 4 1 1 0 1 2 2 1 + * I1B2b1P 0.5 1.75 1 2 1 1 0 1 2 2 1 + * IbP 0.5 1.5 0 1 1 1 0 1 2 2 1 + * IPP 1 1 0 0 1 1 0 1 2 2 1 + * P 1 1 0 0 1 1 0 1 2 2 1 + * smallB 0 2 0 1 0 1 0 1 2 2 1 + * bigB 1 2 1 0 0 1 0 1 2 2 1 + * + * Total W = SUMPRODUCT(H16:J16, K16 : M16) / SUM(H16:J16) + * Total R = SUMPRODUCT(H16:J16, N16 : P16) / SUM(H16:J16) +*/ + +/* 1000x */ +static u32 kalama_en_readfactor[7] = {1000, 1500, 1750, 1875, 1000, 2000, 2000}; +/* 1000x */ +static u32 kalama_en_writefactor[7] = {1000, 500, 500, 500, 1000, 0, 1000}; +static u32 kalama_en_frame_num_parallel = 1; diff --git a/driver/variant/iris3/inc/msm_vidc_power_iris3.h b/driver/variant/iris3/inc/msm_vidc_power_iris3.h index f0e4a5e017..b994e92666 100644 --- a/driver/variant/iris3/inc/msm_vidc_power_iris3.h +++ b/driver/variant/iris3/inc/msm_vidc_power_iris3.h @@ -10,6 +10,8 @@ #include "msm_vidc_inst.h" #include "msm_vidc_power.h" +#define ENABLE_LEGACY_POWER_CALCULATIONS 0 + u64 msm_vidc_calc_freq_iris3(struct msm_vidc_inst* inst, u32 data_size); int msm_vidc_calc_bw_iris3(struct msm_vidc_inst* inst, struct vidc_bus_vote_data* vote_data); diff --git a/driver/variant/iris3/src/msm_vidc_bus_iris3.c b/driver/variant/iris3/src/msm_vidc_bus_iris3.c new file mode 100644 index 0000000000..96b0f57981 --- /dev/null +++ b/driver/variant/iris3/src/msm_vidc_bus_iris3.c @@ -0,0 +1,922 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include "kalama_technology.h" +#include "msm_vidc_debug.h" + +u32 calculate_number_lcus_kalama(u32 width, u32 height, u32 lcu_size) +{ + u32 mbs_width = (width % lcu_size) ? + (width / lcu_size + 1) : (width / lcu_size); + u32 mbs_height = (height % lcu_size) ? + (height / lcu_size + 1) : (height / lcu_size); + + return mbs_width * mbs_height; +} + +u32 calculate_number_ubwctiles_kalama( + u32 width, u32 height, u32 tile_w, u32 tile_h) +{ + u32 tiles_width = (width % tile_w) ? + (width / tile_w + 1) : (width / tile_w); + u32 tiles_height = (height % tile_h) ? + (height / tile_h + 1) : (height / tile_h); + + return tiles_width * tiles_height; +} + +struct compression_factors { + u32 dpb_cf_y; + u32 dpb_cf_cbcr; + u32 opb_cf_ycbcr; + u32 dpb_cr_y; + u32 ipb_cr_y; + u32 ipb_cr; +} compression_factor; + +u32 get_compression_factors(struct compression_factors *compression_factor, + struct api_calculation_input codec_input) +{ + u8 cr_index_entry, cr_index_y, cr_index_c, cr_index_uni; + u32 frame_width; + u32 frame_height; + + frame_width = codec_input.frame_width; + frame_height = codec_input.frame_height; + if (frame_width * frame_height <= 1920 * 1080) + cr_index_entry = 0; + else + cr_index_entry = 1; + + if (codec_input.bitdepth == CODEC_BITDEPTH_8) { + /* NOT PWC or average and power case */ + if (codec_input.complexity_setting != 0) { + cr_index_y = 0; + cr_index_c = 1; + cr_index_uni = 2; + } else { + cr_index_y = 3; + cr_index_c = 4; + cr_index_uni = 5; + } + } else { + /* NOT PWC or average and power case */ + if (codec_input.complexity_setting != 0) { + cr_index_y = 6; + cr_index_c = 7; + cr_index_uni = 8; + } else { + cr_index_y = 9; + cr_index_c = 10; + cr_index_uni = 11; + } + } + + if (codec_input.decoder_or_encoder == CODEC_DECODER) { + compression_factor->dpb_cf_y = + dpbopb_ubwc30_cr_table_cratio_kalama[cr_index_entry][cr_index_y]; + compression_factor->dpb_cf_cbcr = + dpbopb_ubwc30_cr_table_cratio_kalama[cr_index_entry][cr_index_c]; + compression_factor->opb_cf_ycbcr = + dpbopb_ubwc30_cr_table_cratio_kalama[cr_index_entry][cr_index_uni]; + + if ((codec_input.regression_mode == 3) && + /* input cr numbers from interface */ + ((codec_input.cr_dpb != 0) || (codec_input.cr_opb != 0))) { + compression_factor->dpb_cf_y = (u32)(codec_input.cr_dpb * 100); + compression_factor->dpb_cf_cbcr = (u32)(codec_input.cr_dpb * 100); + compression_factor->opb_cf_ycbcr = (u32)(codec_input.cr_opb * 100); + } + } else { /* encoder */ + /* + * IPB CR Table Choice; static sheet (if framewidth<3840, use lossless table) + * (else, use lossy table) + * stick to this choice for SW purpose (no change for SW) + */ + if (frame_width < 3840) { + compression_factor->ipb_cr = + ipblossless_ubwc30_cr_table_cratio_kalama[cr_index_entry][cr_index_uni]; + compression_factor->ipb_cr_y = + ipblossless_ubwc30_cr_table_cratio_kalama[cr_index_entry][cr_index_y]; + } else { + compression_factor->ipb_cr = + ipblossy_ubwc30_cr_table_cratio_kalama[cr_index_entry][cr_index_uni]; + compression_factor->ipb_cr_y = + ipblossy_ubwc30_cr_table_cratio_kalama[cr_index_entry][cr_index_y]; + } + + compression_factor->dpb_cf_y = + rpb_ubwc30_cr_table_cratio_kalama[cr_index_entry][cr_index_y]; + + compression_factor->dpb_cf_cbcr = + rpb_ubwc30_cr_table_cratio_kalama[cr_index_entry][cr_index_c]; + + if ((codec_input.regression_mode == 3) && + /* input cr from interface */ + ((codec_input.cr_ipb != 0) || (codec_input.cr_rpb != 0))) { + compression_factor->dpb_cf_y = (u32)(codec_input.cr_rpb * 100); + compression_factor->dpb_cf_cbcr = (u32)(codec_input.cr_rpb * 100); + compression_factor->ipb_cr_y = (u32)(codec_input.cr_ipb * 100); + } + } + + return 0; +} + +static int calculate_bandwidth_decoder_iris3( + struct api_calculation_input codec_input, + struct api_calculation_bw_output *codec_output) +{ + /* common control parameters */ + u32 frame_width; + u32 frame_height; + u32 frame_lcu_size = 16; /* initialized to h264 */ + u32 lcu_per_frame; + u32 target_bitrate; + u32 collocated_bytes_per_lcu = 16; /* initialized to h264 */ + u32 av1d_segment_read_per_lcu; + u32 av1d_fe_leftlinebuffer_perlcu_tileboudary; + + u32 frame420_y_bw_linear_8bpp; + u32 frame420_y_bw_no_ubwc_tile_10bpp; + u32 frame420_y_bw_linear_10bpp; + + u16 ubwc_tile_w; + u16 ubwc_tile_h; + + u32 dpb_compression_factor_y; + u32 dpb_compression_factor_cbcr; + + u32 reconstructed_write_bw_factor_rd; + u32 reference_y_read_bw_factor; + u32 reference_cbcr_read_bw_factor; + + /* decoder control parameters */ + u32 decoder_vsp_read_factor = 6; + u32 bins_to_bits_factor = 4; + + u32 dpb_to_opb_ratios_ds = 1; + + u8 llc_enabled_ref_y_rd = 1; + u8 llc_enable_ref_crcb_rd = 1; + u8 llc_enabled_bse_tlb = 1; + /* this is for 2pipe and 1pipe LLC */ + u8 llc_enable_probtable_av1d_21pipe = 0; + + u32 opb_compression_factor_ycbcr; + u32 dpb_ubwc_tile_width_pixels; + u32 dpb_ubwc_tile_height_pixels; + u32 decoder_frame_complexity_factor; + u32 llc_saving = 130; /* Initialized to H264 */ + + u16 av1_tile_numbers; + u32 av1_collated_seg_buffer_rd_wr; + /* need divide by 1M at later step; */ + u32 av1_probability_table_rdwr_bytesperframe = 22784; + u32 av1_fe_left_line_buffer_rdwr; + + u32 bse_tlb_byte_per_lcu = 0; + + u32 large_bw_calculation_fp = 0; + + llc_enabled_ref_y_rd = (codec_input.status_llc_onoff) ? 1 : 0; + llc_enable_ref_crcb_rd = (codec_input.status_llc_onoff) ? 1 : 0; + /* H265D BSE tlb in LLC will be pored in Kailua */ + llc_enabled_bse_tlb = (codec_input.status_llc_onoff) ? 1 : 0; + + frame_width = codec_input.frame_width; + frame_height = codec_input.frame_height; + if ((codec_input.codec == CODEC_H264) || + (codec_input.codec == CODEC_H264_CAVLC)) { + frame_lcu_size = 16; + collocated_bytes_per_lcu = 16; + llc_saving = 130; + } else if (codec_input.codec == CODEC_HEVC) { + if (codec_input.lcu_size == 32) { + frame_lcu_size = 32; + collocated_bytes_per_lcu = 64; + llc_saving = 114; + } else if (codec_input.lcu_size == 64) { + frame_lcu_size = 64; + collocated_bytes_per_lcu = 256; + llc_saving = 107; + } + } else if (codec_input.codec == CODEC_VP9) { + if (codec_input.lcu_size == 32) { + frame_lcu_size = 32; + collocated_bytes_per_lcu = 64; + llc_saving = 114; + } else if (codec_input.lcu_size == 64) { + frame_lcu_size = 64; + collocated_bytes_per_lcu = 256; + llc_saving = 107; + } + } else if (codec_input.codec == CODEC_AV1) { + u32 av1d_leftline_cdef = (2944 + 896 + 896); + u32 av1d_leftline_scaling = (2176 + 1408 + 1408); + u32 av1d_leftline_fg = (1280); + u32 av1d_leftline_lr = (1536 + 1024 + 1024); + + av1d_fe_leftlinebuffer_perlcu_tileboudary = + av1d_leftline_cdef + av1d_leftline_scaling + + av1d_leftline_fg + av1d_leftline_lr; + + if (codec_input.lcu_size == 128) { + frame_lcu_size = 128; + collocated_bytes_per_lcu = 4 * 512; + av1d_segment_read_per_lcu = 512; + llc_saving = 104; + } else if (codec_input.lcu_size == 32) { + frame_lcu_size = 32; + collocated_bytes_per_lcu = 4 * 512 / (128 * 128 / 32 / 32); + av1d_segment_read_per_lcu = 512 / (128 * 128 / 32 / 32); + av1d_fe_leftlinebuffer_perlcu_tileboudary = + av1d_fe_leftlinebuffer_perlcu_tileboudary / (128 * 128 / 32 / 32); + llc_saving = 114; + } else if (codec_input.lcu_size == 64) { + frame_lcu_size = 64; + collocated_bytes_per_lcu = 4 * 512 / (128 * 128 / 64 / 64); + av1d_segment_read_per_lcu = 512 / (128 * 128 / 64 / 64); + av1d_fe_leftlinebuffer_perlcu_tileboudary = + av1d_fe_leftlinebuffer_perlcu_tileboudary / (128 * 128 / 64 / 64); + llc_saving = 107; + } + } + + lcu_per_frame = + calculate_number_lcus_kalama(frame_width, frame_height, frame_lcu_size); + + target_bitrate = (u32)(codec_input.bitrate_mbps); /* Mbps */ + + ubwc_tile_w = (codec_input.bitdepth == CODEC_BITDEPTH_8) ? 32 : 48; + ubwc_tile_h = (codec_input.bitdepth == CODEC_BITDEPTH_8) ? 8 : 4; + + frame420_y_bw_linear_8bpp = + ((calculate_number_ubwctiles_kalama(frame_width, frame_height, 32, 8) * + 256 * codec_input.frame_rate + 999) / 1000 + 999) / 1000; + + frame420_y_bw_no_ubwc_tile_10bpp = + ((calculate_number_ubwctiles_kalama(frame_width, frame_height, 48, 4) * + 256 * codec_input.frame_rate + 999) / 1000 + 999) / 1000; + frame420_y_bw_linear_10bpp = ((frame_width * frame_height * + codec_input.frame_rate * 2 + 999) / 1000 + 999) / 1000; + + /* TODO Integrate Compression Ratio returned by FW */ + get_compression_factors(&compression_factor, codec_input); + dpb_compression_factor_y = compression_factor.dpb_cf_y; + dpb_compression_factor_cbcr = compression_factor.dpb_cf_cbcr; + opb_compression_factor_ycbcr = compression_factor.opb_cf_ycbcr; + + dpb_ubwc_tile_width_pixels = ubwc_tile_w; + + dpb_ubwc_tile_height_pixels = ubwc_tile_h; + + decoder_frame_complexity_factor = + (codec_input.complexity_setting == 0) ? + 400 : ((codec_input.complexity_setting == 1) ? 266 : 100); + + reconstructed_write_bw_factor_rd = (codec_input.complexity_setting == 0) ? + 105 : 100; + + reference_y_read_bw_factor = llc_saving; + + reference_cbcr_read_bw_factor = llc_saving; + + if (codec_input.codec == CODEC_AV1) { + u8 av1tile_index_entry, av1tile_complexity; + + if (frame_width * frame_height <= 1280 * 720) + av1tile_index_entry = 4; + else if (frame_width * frame_height <= 1920 * 1080) + av1tile_index_entry = 0; + else if (frame_width * frame_height <= 2560 * 1440) + av1tile_index_entry = 5; + else if (frame_width * frame_height <= 4096 * 2304) + av1tile_index_entry = 1; + else + av1tile_index_entry = 6; + + /* NOT PWC //or average and power case */ + if (codec_input.complexity_setting != 0) + av1tile_complexity = 1; + else + av1tile_complexity = 0; + + av1_tile_numbers = av1_num_tiles_kalama[av1tile_index_entry][av1tile_complexity]; + + /* these bw can be ignored */ + av1_collated_seg_buffer_rd_wr = + ((av1d_segment_read_per_lcu * lcu_per_frame * + codec_input.frame_rate + 999) / 1000 + 999) / 1000; + + av1_fe_left_line_buffer_rdwr = + (((av1d_fe_leftlinebuffer_perlcu_tileboudary * + frame_height * (av1_tile_numbers > 1 ? av1_tile_numbers / 2 : 0) + + 999) / 1000 + 999) / 1000 + (frame_lcu_size - 1)) / frame_lcu_size; + } + + if (codec_input.codec == CODEC_HEVC) { + if (codec_input.lcu_size == 32) + bse_tlb_byte_per_lcu = 64; + else if (codec_input.lcu_size == 16) + bse_tlb_byte_per_lcu = 32; + else + bse_tlb_byte_per_lcu = 128; + } else if ((codec_input.codec == CODEC_H264) || + (codec_input.codec == CODEC_H264_CAVLC)) { + bse_tlb_byte_per_lcu = 64; + } else if (codec_input.codec == CODEC_VP9) { + bse_tlb_byte_per_lcu = 304; + } else if (codec_input.codec == CODEC_AV1) { + if (codec_input.lcu_size == 128) + bse_tlb_byte_per_lcu = 2064; + else if (codec_input.lcu_size == 64) + bse_tlb_byte_per_lcu = 1056; + else if (codec_input.lcu_size == 32) + bse_tlb_byte_per_lcu = 2064 / (128 * 128 / 32 / 32); + } + + codec_output->noc_bw_rd = 0; + codec_output->noc_bw_wr = 0; + codec_output->ddr_bw_rd = 0; + codec_output->ddr_bw_wr = 0; + + large_bw_calculation_fp = 0; + large_bw_calculation_fp = ((target_bitrate * + decoder_vsp_read_factor + 7) / 8); + + codec_output->vsp_read_noc = large_bw_calculation_fp; + + codec_output->vsp_read_ddr = codec_output->vsp_read_noc; + + large_bw_calculation_fp = ((target_bitrate * + bins_to_bits_factor + 7) / 8); + + codec_output->vsp_write_noc = large_bw_calculation_fp; + codec_output->vsp_write_ddr = codec_output->vsp_write_noc; + + /* accumulation */ + codec_output->noc_bw_rd += codec_output->vsp_read_noc; + codec_output->ddr_bw_rd += codec_output->vsp_read_ddr; + codec_output->noc_bw_wr += codec_output->vsp_write_noc; + codec_output->ddr_bw_wr += codec_output->vsp_write_ddr; + + large_bw_calculation_fp = 0; + large_bw_calculation_fp = ((collocated_bytes_per_lcu * + lcu_per_frame * codec_input.frame_rate + 999) / 1000 + 999) / 1000; + codec_output->collocated_rd_noc = large_bw_calculation_fp; + codec_output->collocated_wr_noc = codec_output->collocated_rd_noc; + codec_output->collocated_rd_ddr = codec_output->collocated_rd_noc; + codec_output->collocated_wr_ddr = codec_output->collocated_wr_noc; + + codec_output->collocated_rd_wr_total_noc = + (u32)(codec_output->collocated_rd_noc + codec_output->collocated_wr_noc); + + codec_output->collocated_rd_wr_total_ddr = + codec_output->collocated_rd_wr_total_noc; + + /* accumulation */ + codec_output->noc_bw_rd += codec_output->collocated_rd_noc; + codec_output->noc_bw_wr += codec_output->collocated_wr_noc; + codec_output->ddr_bw_rd += codec_output->collocated_rd_ddr; + codec_output->ddr_bw_wr += codec_output->collocated_wr_ddr; + + large_bw_calculation_fp = 0; + large_bw_calculation_fp = ((codec_input.bitdepth == CODEC_BITDEPTH_8) ? + frame420_y_bw_linear_8bpp : + frame420_y_bw_no_ubwc_tile_10bpp) * decoder_frame_complexity_factor; + + large_bw_calculation_fp = + (large_bw_calculation_fp + dpb_compression_factor_y - 1) / + dpb_compression_factor_y; + + codec_output->dpb_rd_y_noc = large_bw_calculation_fp; + + large_bw_calculation_fp = ((codec_input.bitdepth == CODEC_BITDEPTH_8) ? + frame420_y_bw_linear_8bpp : frame420_y_bw_no_ubwc_tile_10bpp) * + decoder_frame_complexity_factor; + + large_bw_calculation_fp = + (large_bw_calculation_fp + dpb_compression_factor_cbcr - 1) / + dpb_compression_factor_cbcr / 2; + + codec_output->dpb_rd_crcb_noc = large_bw_calculation_fp; + codec_output->dpb_rdwr_duetooverlap_noc = 0; + + large_bw_calculation_fp = ((codec_input.bitdepth == CODEC_BITDEPTH_8) ? + frame420_y_bw_linear_8bpp : frame420_y_bw_no_ubwc_tile_10bpp) * + reconstructed_write_bw_factor_rd; + + large_bw_calculation_fp = ((codec_input.bitdepth == CODEC_BITDEPTH_8) ? + frame420_y_bw_linear_8bpp : frame420_y_bw_no_ubwc_tile_10bpp) * + reconstructed_write_bw_factor_rd; + + large_bw_calculation_fp = large_bw_calculation_fp * + (dpb_compression_factor_y / 2 + dpb_compression_factor_cbcr); + + large_bw_calculation_fp = (large_bw_calculation_fp + dpb_compression_factor_y - 1) / + dpb_compression_factor_y; + + large_bw_calculation_fp = + (large_bw_calculation_fp + dpb_compression_factor_cbcr - 1) / + dpb_compression_factor_cbcr; + + codec_output->dpb_wr_noc = large_bw_calculation_fp; + + codec_output->dpb_rd_y_ddr = (llc_enabled_ref_y_rd) ? + ((codec_output->dpb_rd_y_noc * 100 + reference_y_read_bw_factor - 1) / + reference_y_read_bw_factor) : codec_output->dpb_rd_y_noc; + + codec_output->dpb_rd_crcb_ddr = (llc_enable_ref_crcb_rd) ? + ((codec_output->dpb_rd_crcb_noc * 100 + + reference_cbcr_read_bw_factor - 1) / + reference_cbcr_read_bw_factor) : codec_output->dpb_rd_crcb_noc; + + codec_output->dpb_rdwr_duetooverlap_ddr = 0; + codec_output->dpb_wr_ddr = codec_output->dpb_wr_noc; + + /* accumulation */ + codec_output->noc_bw_rd += codec_output->dpb_rd_y_noc; + codec_output->noc_bw_rd += codec_output->dpb_rd_crcb_noc; + codec_output->noc_bw_rd += codec_output->dpb_rdwr_duetooverlap_noc; + codec_output->noc_bw_wr += codec_output->dpb_wr_noc; + codec_output->ddr_bw_rd += codec_output->dpb_rd_y_ddr; + codec_output->ddr_bw_rd += codec_output->dpb_rd_crcb_ddr; + codec_output->ddr_bw_rd += codec_output->dpb_rdwr_duetooverlap_ddr; + codec_output->ddr_bw_wr += codec_output->dpb_wr_ddr; + + if (codec_input.linear_opb || codec_input.split_opb) { + if (codec_input.linear_opb) { + if (codec_input.bitdepth == CODEC_BITDEPTH_8) { + large_bw_calculation_fp = ((frame420_y_bw_linear_8bpp) * + 3 / 2 / dpb_to_opb_ratios_ds); + + codec_output->opb_write_total_noc = large_bw_calculation_fp; + } else { + large_bw_calculation_fp = ((frame420_y_bw_linear_10bpp) * + 3 / 2 / dpb_to_opb_ratios_ds); + + codec_output->opb_write_total_noc = large_bw_calculation_fp; + } + } else { /* (CODEC_INPUT.split_opb) */ + if (codec_input.bitdepth == CODEC_BITDEPTH_8) { + large_bw_calculation_fp = + (frame420_y_bw_linear_8bpp * 3 / 2 / dpb_to_opb_ratios_ds * + 100 + opb_compression_factor_ycbcr - 1) / + opb_compression_factor_ycbcr; + + codec_output->opb_write_total_noc = large_bw_calculation_fp; + } else { + large_bw_calculation_fp = + (frame420_y_bw_no_ubwc_tile_10bpp * 3 / 2 / + dpb_to_opb_ratios_ds * 100 + + opb_compression_factor_ycbcr - 1) / + opb_compression_factor_ycbcr; + + codec_output->opb_write_total_noc = large_bw_calculation_fp; + } + } + } else { + codec_output->opb_write_total_noc = 0; + } + + codec_output->opb_write_total_ddr = codec_output->opb_write_total_noc; + + /* accumulation */ + codec_output->noc_bw_wr += codec_output->opb_write_total_noc; + codec_output->ddr_bw_wr += codec_output->opb_write_total_ddr; + + large_bw_calculation_fp = ((bse_tlb_byte_per_lcu * lcu_per_frame * + codec_input.frame_rate + 999) / 1000 + 999) / 1000; + + codec_output->bse_tlb_rd_noc = large_bw_calculation_fp; + + if (llc_enabled_bse_tlb) + codec_output->bse_tlb_rd_ddr = 0; + else + codec_output->bse_tlb_rd_ddr = codec_output->bse_tlb_rd_noc; + + codec_output->bse_tlb_wr_noc = codec_output->bse_tlb_rd_noc; + + if (llc_enabled_bse_tlb) + codec_output->bse_tlb_wr_ddr = 0; + else + codec_output->bse_tlb_wr_ddr = codec_output->bse_tlb_wr_noc; + + /* accumulation */ + codec_output->noc_bw_rd += codec_output->bse_tlb_rd_noc; + codec_output->ddr_bw_rd += codec_output->bse_tlb_rd_ddr; + codec_output->noc_bw_wr += codec_output->bse_tlb_wr_noc; + codec_output->ddr_bw_wr += codec_output->bse_tlb_wr_ddr; + + if (codec_input.codec == CODEC_AV1) { + codec_output->statistics_rd_noc = (av1_collated_seg_buffer_rd_wr + + av1_probability_table_rdwr_bytesperframe * av1_tile_numbers / + 1000 / 1000 + av1_fe_left_line_buffer_rdwr); + + codec_output->statistics_wr_noc = (av1_collated_seg_buffer_rd_wr + + av1_probability_table_rdwr_bytesperframe * av1_tile_numbers / + 1000 / 1000 + av1_fe_left_line_buffer_rdwr); + + if (llc_enable_probtable_av1d_21pipe) { + /* assert(CODEC_INPUT.pipe_num != 4); */ + codec_output->statistics_rd_ddr = codec_output->statistics_rd_noc - + av1_probability_table_rdwr_bytesperframe * + av1_tile_numbers / 1000 / 1000; + + codec_output->statistics_wr_ddr = codec_output->statistics_wr_noc - + av1_probability_table_rdwr_bytesperframe * + av1_tile_numbers / 1000 / 1000; + } else { + codec_output->statistics_rd_ddr = codec_output->statistics_rd_noc; + codec_output->statistics_wr_ddr = codec_output->statistics_wr_noc; + } + + /* accumulation */ + codec_output->noc_bw_rd += codec_output->statistics_rd_noc; + codec_output->ddr_bw_rd += codec_output->statistics_rd_ddr; + codec_output->noc_bw_wr += codec_output->statistics_wr_noc; + codec_output->ddr_bw_wr += codec_output->statistics_wr_ddr; + } + + + codec_output->mmu_rd_ddr = 0; + codec_output->mmu_rd_noc = 0; + /* accumulation */ + codec_output->noc_bw_rd += codec_output->mmu_rd_noc; + codec_output->ddr_bw_rd += codec_output->mmu_rd_ddr; + + return 0; +} + +static int calculate_bandwidth_encoder_iris3( + struct api_calculation_input codec_input, + struct api_calculation_bw_output *codec_output) +{ + /* common control parameters */ + u32 frame_width; + u32 frame_height; + u32 frame_lcu_size; + u32 lcu_per_frame; + u32 target_bitrate; + u32 collocated_bytes_per_lcu; + + u32 frame420_y_bw_linear_8bpp; + u32 frame420_y_bw_no_ubwc_tile_10bpp; + u32 frame420_y_bw_linear_10bpp; + + u16 ubwc_tile_w; + u16 ubwc_tile_h; + + u32 dpb_compression_factor_y; + u32 dpb_compression_factor_cbcr; + + u32 reconstructed_write_bw_factor_rd; + u32 reference_y_read_bw_factor; + u32 reference_crcb_read_bw_factor; + + /* encoder control parameters */ + u32 en_vertical_tiles_width = 960; + + u8 en_rotation_90_270 = 0; + /* TODO Can we use (codec_input.status_llc_onoff) for enc_llc_*? */ + u8 en_llc_enable_ref_rd_crcb = 0; + u8 en_llc_enable_rec_wr_uncompleted = 0; + u8 en_llc_enable_ref_rd_y_overlap = 0; + + u32 en_bins_to_bits_factor = 4; + u32 en_search_windows_size_horizontal = 96; + + u32 en_tile_number; + u32 ipb_compression_factor_y; + u32 ipb_compression_factor; + + u32 large_bw_calculation_fp = 0; + + /* TODO Are these really needed in Encoder? */ + u32 bse_tlb_byte_per_lcu = 0; + u8 llc_enabled_bse_tlb = 1; + + /*H265D BSE tlb in LLC will be pored in Kailua */ + llc_enabled_bse_tlb = (codec_input.status_llc_onoff) ? 1 : 0; + + frame_width = codec_input.frame_width; + frame_height = codec_input.frame_height; + if ((codec_input.codec == CODEC_H264) || + (codec_input.codec == CODEC_H264_CAVLC)) { + frame_lcu_size = 16; + collocated_bytes_per_lcu = 16; + } if (codec_input.codec == CODEC_HEVC) { + frame_lcu_size = 32; + collocated_bytes_per_lcu = 64; + } else { + /* TODO What is the value for VP9, AV1? */ + frame_lcu_size = 16; + collocated_bytes_per_lcu = 16; /* TODO Fixes Uninitialized compilation error. */ + } + + lcu_per_frame = + calculate_number_lcus_kalama(frame_width, frame_height, frame_lcu_size); + + bse_tlb_byte_per_lcu = 16; /* TODO Should be in common declaration */ + + target_bitrate = (u32)(codec_input.bitrate_mbps); /* Mbps */ + + ubwc_tile_w = (codec_input.bitdepth == CODEC_BITDEPTH_8) ? 32 : 48; + ubwc_tile_h = (codec_input.bitdepth == CODEC_BITDEPTH_8) ? 8 : 4; + + /* yuv */ + if (codec_input.ipb_yuvrgb == 0) { + frame420_y_bw_linear_8bpp = + ((calculate_number_ubwctiles_kalama(frame_width, frame_height, + 32, 8) * 256 * codec_input.frame_rate + 999) / 1000 + 999) / 1000; + } else { /* RGBA */ + frame420_y_bw_linear_8bpp = + ((calculate_number_ubwctiles_kalama(frame_width, frame_height, + 6, 4) * 256 * codec_input.frame_rate + 999) / 1000 + 999) / 1000; + } + + frame420_y_bw_no_ubwc_tile_10bpp = + ((calculate_number_ubwctiles_kalama(frame_width, frame_height, 48, 4) * + 256 * codec_input.frame_rate + 999) / 1000 + 999) / 1000; + + frame420_y_bw_linear_10bpp = ((frame_width * frame_height * + codec_input.frame_rate * 2 + 999) / 1000 + 999) / 1000; + + /* TODO Integrate Compression Ratio returned by FW */ + get_compression_factors(&compression_factor, codec_input); + dpb_compression_factor_y = compression_factor.dpb_cf_y; + dpb_compression_factor_cbcr = compression_factor.dpb_cf_cbcr; + ipb_compression_factor_y = compression_factor.ipb_cr_y; + ipb_compression_factor = compression_factor.ipb_cr; + + en_tile_number = (frame_width % en_vertical_tiles_width) ? + ((frame_width / en_vertical_tiles_width) + 1) : + (frame_width / en_vertical_tiles_width); + + en_tile_number = en_tile_number * 100; + + /* ceil is same as excel roundup (float, 0); */ + reconstructed_write_bw_factor_rd = ((en_tile_number - 100) * 2 * + ((codec_input.lcu_size + ubwc_tile_w - 1) / ubwc_tile_w) * + ubwc_tile_w + (frame_width - 1)) / (frame_width)+100; + + reference_y_read_bw_factor = ((en_tile_number - 100) * 2 * + ((en_search_windows_size_horizontal + ubwc_tile_w - 1) / ubwc_tile_w) * + ubwc_tile_w + (frame_width - 1)) / frame_width + 100; + + reference_crcb_read_bw_factor = 150; + + codec_output->noc_bw_rd = 0; + codec_output->noc_bw_wr = 0; + codec_output->ddr_bw_rd = 0; + codec_output->ddr_bw_wr = 0; + + large_bw_calculation_fp = (target_bitrate * en_bins_to_bits_factor + 7) / 8; + codec_output->vsp_read_noc = large_bw_calculation_fp; + codec_output->vsp_read_ddr = codec_output->vsp_read_noc; + large_bw_calculation_fp = (target_bitrate + 7) / 8; + + codec_output->vsp_write_noc = codec_output->vsp_read_noc + + large_bw_calculation_fp; + + codec_output->vsp_write_ddr = codec_output->vsp_write_noc; + + /* accumulation */ + codec_output->noc_bw_rd += codec_output->vsp_read_noc; + codec_output->ddr_bw_rd += codec_output->vsp_read_ddr; + codec_output->noc_bw_wr += codec_output->vsp_write_noc; + codec_output->ddr_bw_wr += codec_output->vsp_write_ddr; + + large_bw_calculation_fp = ((collocated_bytes_per_lcu * lcu_per_frame * + codec_input.frame_rate + 999) / 1000 + 999) / 1000; + + codec_output->collocated_rd_noc = large_bw_calculation_fp; + codec_output->collocated_wr_noc = codec_output->collocated_rd_noc; + codec_output->collocated_rd_ddr = codec_output->collocated_rd_noc; + codec_output->collocated_wr_ddr = codec_output->collocated_wr_noc; + + codec_output->collocated_rd_wr_total_noc = + (u32)(codec_output->collocated_rd_noc + codec_output->collocated_wr_noc); + codec_output->collocated_rd_wr_total_ddr = + codec_output->collocated_rd_wr_total_noc; + + /* accumulation */ + codec_output->noc_bw_rd += codec_output->collocated_rd_noc; + codec_output->noc_bw_wr += codec_output->collocated_wr_noc; + codec_output->ddr_bw_rd += codec_output->collocated_rd_ddr; + codec_output->ddr_bw_wr += codec_output->collocated_wr_ddr; + + large_bw_calculation_fp = 0; + + large_bw_calculation_fp = ((codec_input.bitdepth == CODEC_BITDEPTH_8) ? + frame420_y_bw_linear_8bpp : + frame420_y_bw_no_ubwc_tile_10bpp) * reference_y_read_bw_factor; + + large_bw_calculation_fp = (large_bw_calculation_fp * + kalama_en_readfactor[codec_input.hierachical_layer]); + + large_bw_calculation_fp = (large_bw_calculation_fp + + dpb_compression_factor_y - 1) / dpb_compression_factor_y; + + large_bw_calculation_fp = (large_bw_calculation_fp + 999) / 1000; + + codec_output->dpb_rd_y_noc = large_bw_calculation_fp; + + large_bw_calculation_fp = 0; + + large_bw_calculation_fp = ((codec_input.bitdepth == CODEC_BITDEPTH_8) ? + frame420_y_bw_linear_8bpp : + frame420_y_bw_no_ubwc_tile_10bpp) * reference_crcb_read_bw_factor / 2; + + large_bw_calculation_fp = large_bw_calculation_fp * + kalama_en_readfactor[codec_input.hierachical_layer]; + + large_bw_calculation_fp = (large_bw_calculation_fp + + dpb_compression_factor_cbcr - 1) / dpb_compression_factor_cbcr; + + large_bw_calculation_fp = (large_bw_calculation_fp + 999) / 1000; + codec_output->dpb_rd_crcb_noc = large_bw_calculation_fp; + + large_bw_calculation_fp = 0; + + large_bw_calculation_fp = ((codec_input.bitdepth == CODEC_BITDEPTH_8) ? + frame420_y_bw_linear_8bpp : frame420_y_bw_no_ubwc_tile_10bpp) * + reconstructed_write_bw_factor_rd * + kalama_en_writefactor[codec_input.hierachical_layer] / + kalama_en_frame_num_parallel; + + large_bw_calculation_fp = (large_bw_calculation_fp + 999) / 1000; + + large_bw_calculation_fp = large_bw_calculation_fp * + (dpb_compression_factor_cbcr + dpb_compression_factor_y / 2); + + large_bw_calculation_fp = (large_bw_calculation_fp + + dpb_compression_factor_y - 1) / dpb_compression_factor_y; + + large_bw_calculation_fp = (large_bw_calculation_fp + + dpb_compression_factor_cbcr - 1) / dpb_compression_factor_cbcr; + + codec_output->dpb_wr_noc = large_bw_calculation_fp; + + /* + * Summary: + * by default (for both HFR and HSR cases) : + * -Any resolution and fps >= 120, enable layering. + * (120 -> 3, 240 -> 4, 480 -> 5) + * - (once we enable layering) : 50 per cent frames are Non - reference + * frames.recon write is disable by Venus firmware + * - Customer has ability to enable / disable layering. + * Hence, recon write savings would not be there if customer explicitly disables layer encoding. + */ + + /*HFR Cases use alternating rec write if not PWC*/ + if ((codec_input.frame_rate >= 120) && (codec_input.complexity_setting != 0)) + codec_output->dpb_wr_noc = codec_output->dpb_wr_noc / 2; + + /* for power cases with [B1] adaptive non-ref b frame */ + /* power caes IbP non reference b */ + if ((codec_input.hierachical_layer >= 1) && + (codec_input.hierachical_layer <= 3) && + (codec_input.complexity_setting != 0)) + codec_output->dpb_wr_noc = codec_output->dpb_wr_noc / 2; + + large_bw_calculation_fp = 0; + large_bw_calculation_fp = codec_output->dpb_wr_noc * + (reconstructed_write_bw_factor_rd - 100); + + large_bw_calculation_fp = (large_bw_calculation_fp + + reconstructed_write_bw_factor_rd - 1) / reconstructed_write_bw_factor_rd; + + codec_output->dpb_rdwr_duetooverlap_noc = large_bw_calculation_fp; + + codec_output->dpb_rd_y_ddr = (en_llc_enable_ref_rd_y_overlap) ? + (codec_output->dpb_rd_y_noc * 100 + reference_y_read_bw_factor - 1) / + reference_y_read_bw_factor : codec_output->dpb_rd_y_noc; + + codec_output->dpb_rd_crcb_ddr = (en_llc_enable_ref_rd_crcb) ? + (codec_output->dpb_rd_crcb_noc * 100 + reference_crcb_read_bw_factor - 1) / + reference_crcb_read_bw_factor : codec_output->dpb_rd_crcb_noc; + + codec_output->dpb_rdwr_duetooverlap_ddr = (en_llc_enable_rec_wr_uncompleted) ? + 0 : codec_output->dpb_rdwr_duetooverlap_noc; + + codec_output->dpb_wr_ddr = (en_llc_enable_rec_wr_uncompleted) ? + 0 : codec_output->dpb_wr_noc; + + /* accumulation */ + codec_output->noc_bw_rd += codec_output->dpb_rd_y_noc; + codec_output->noc_bw_rd += codec_output->dpb_rd_crcb_noc; + codec_output->noc_bw_rd += codec_output->dpb_rdwr_duetooverlap_noc; + codec_output->noc_bw_wr += codec_output->dpb_wr_noc; + codec_output->ddr_bw_rd += codec_output->dpb_rd_y_ddr; + codec_output->ddr_bw_rd += codec_output->dpb_rd_crcb_ddr; + codec_output->ddr_bw_rd += codec_output->dpb_rdwr_duetooverlap_ddr; + codec_output->ddr_bw_wr += codec_output->dpb_wr_ddr; + + if (codec_input.bitdepth == CODEC_BITDEPTH_8) { + if (codec_input.ipb_yuvrgb == 0) { /* yuv */ + large_bw_calculation_fp = ((frame420_y_bw_linear_8bpp) * 3 / 2); + codec_output->ipb_rd_total_noc = large_bw_calculation_fp; + if (codec_input.linear_ipb == 0) { + codec_output->ipb_rd_total_noc = + (large_bw_calculation_fp * 100 + ipb_compression_factor - 1) / + ipb_compression_factor; + } + } else { /* rgb */ + large_bw_calculation_fp = frame420_y_bw_linear_8bpp; + codec_output->ipb_rd_total_noc = large_bw_calculation_fp; + if (codec_input.linear_ipb == 0) { + if (codec_input.complexity_setting == 0) /* pwc */ + codec_output->ipb_rd_total_noc = + (large_bw_calculation_fp * 100 + + en_original_compression_factor_rgba_pwd_kalama - 1) / + en_original_compression_factor_rgba_pwd_kalama; + else + codec_output->ipb_rd_total_noc = + (large_bw_calculation_fp * 100 + + en_original_compression_factor_rgba_avg_kalama - 1) / + en_original_compression_factor_rgba_avg_kalama; + } + } + } else { + if (codec_input.linear_ipb == 1) { + large_bw_calculation_fp = (frame420_y_bw_linear_10bpp) * 3 / 2; + codec_output->ipb_rd_total_noc = large_bw_calculation_fp; + } else { + large_bw_calculation_fp = (frame420_y_bw_no_ubwc_tile_10bpp * + 300 / 2 + ipb_compression_factor - 1) / ipb_compression_factor; + codec_output->ipb_rd_total_noc = large_bw_calculation_fp; + } + } + + if (en_rotation_90_270) { + if (codec_input.codec == CODEC_HEVC) { + if ((codec_input.bitdepth == CODEC_BITDEPTH_8) && + (codec_input.ipb_yuvrgb == 0)) + codec_output->ipb_rd_total_noc = codec_output->ipb_rd_total_noc + * 1; + else + codec_output->ipb_rd_total_noc = codec_output->ipb_rd_total_noc + * 3; + } else { + codec_output->ipb_rd_total_noc = codec_output->ipb_rd_total_noc * 2; + } + } + + codec_output->ipb_rd_total_ddr = codec_output->ipb_rd_total_noc; + + /* accumulation */ + codec_output->noc_bw_rd += codec_output->ipb_rd_total_noc; + codec_output->ddr_bw_rd += codec_output->ipb_rd_total_ddr; + + codec_output->bse_tlb_rd_noc = + ((bse_tlb_byte_per_lcu * lcu_per_frame * codec_input.frame_rate + 999) + / 1000 + 999) / 1000; + + if (llc_enabled_bse_tlb) /* TODO should be common declaration */ + codec_output->bse_tlb_rd_ddr = 0; + else + codec_output->bse_tlb_rd_ddr = codec_output->bse_tlb_rd_noc; + + codec_output->bse_tlb_wr_noc = codec_output->bse_tlb_rd_noc; + + if (llc_enabled_bse_tlb) + codec_output->bse_tlb_wr_ddr = 0; + else + codec_output->bse_tlb_wr_ddr = codec_output->bse_tlb_wr_noc; + + /* accumulation */ + codec_output->noc_bw_rd += codec_output->bse_tlb_rd_noc; + codec_output->ddr_bw_rd += codec_output->bse_tlb_rd_ddr; + codec_output->noc_bw_wr += codec_output->bse_tlb_wr_noc; + codec_output->ddr_bw_wr += codec_output->bse_tlb_wr_ddr; + + codec_output->mmu_rd_ddr = 0; + codec_output->mmu_rd_noc = 0; + /* accumulation */ + codec_output->noc_bw_rd += codec_output->mmu_rd_noc; + codec_output->ddr_bw_rd += codec_output->mmu_rd_ddr; + + return 0; +} + +int msm_vidc_calculate_bandwidth(struct api_calculation_input codec_input, + struct api_calculation_bw_output *codec_output) +{ + int rc = 0; + + if (codec_input.decoder_or_encoder == CODEC_DECODER) { + rc = calculate_bandwidth_decoder_iris3(codec_input, codec_output); + } else if (codec_input.decoder_or_encoder == CODEC_ENCODER) { + rc = calculate_bandwidth_encoder_iris3(codec_input, codec_output); + } else { + d_vpr_e("%s: invalid codec\n", codec_input.decoder_or_encoder); + return -EINVAL; + } + + return rc; +} + diff --git a/driver/variant/iris3/src/msm_vidc_clock_iris3.c b/driver/variant/iris3/src/msm_vidc_clock_iris3.c new file mode 100644 index 0000000000..0b2c587f68 --- /dev/null +++ b/driver/variant/iris3/src/msm_vidc_clock_iris3.c @@ -0,0 +1,548 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include "kalama_technology.h" +#include "msm_vidc_debug.h" + +static u32 calculate_number_mbs_kalama(u32 width, u32 height, u32 lcu_size) +{ + u32 mbs_width = (width % lcu_size) ? + (width / lcu_size + 1) : (width / lcu_size); + + u32 mbs_height = (height % lcu_size) ? + (height / lcu_size + 1) : (height / lcu_size); + + return mbs_width * mbs_height * (lcu_size / 16) * (lcu_size / 16); +} + +static int initialize_encoder_complexity_table() +{ + /* Beging Calculate Encoder GOP Complexity Table and HW Floor numbers */ + codec_encoder_gop_complexity_table_fp + [CODEC_GOP_I3B4b1P][CODEC_ENCODER_GOP_Bb_ENTRY] = 70000; + + codec_encoder_gop_complexity_table_fp + [CODEC_GOP_I3B4b1P][CODEC_ENCODER_GOP_P_ENTRY] = 10000; + + codec_encoder_gop_complexity_table_fp + [CODEC_GOP_I3B4b1P][CODEC_ENCODER_GOP_FACTORY_ENTRY] = + (codec_encoder_gop_complexity_table_fp + [CODEC_GOP_I3B4b1P][CODEC_ENCODER_GOP_Bb_ENTRY] * 150 + + codec_encoder_gop_complexity_table_fp + [CODEC_GOP_I3B4b1P][CODEC_ENCODER_GOP_P_ENTRY] * 100); + + codec_encoder_gop_complexity_table_fp + [CODEC_GOP_I3B4b1P][CODEC_ENCODER_GOP_FACTORY_ENTRY] = + codec_encoder_gop_complexity_table_fp + [CODEC_GOP_I3B4b1P][CODEC_ENCODER_GOP_FACTORY_ENTRY] + + (codec_encoder_gop_complexity_table_fp + [CODEC_GOP_I3B4b1P][CODEC_ENCODER_GOP_Bb_ENTRY] + + codec_encoder_gop_complexity_table_fp + [CODEC_GOP_I3B4b1P][CODEC_ENCODER_GOP_P_ENTRY] - 1); + + codec_encoder_gop_complexity_table_fp + [CODEC_GOP_I3B4b1P][CODEC_ENCODER_GOP_FACTORY_ENTRY] = + codec_encoder_gop_complexity_table_fp + [CODEC_GOP_I3B4b1P][CODEC_ENCODER_GOP_FACTORY_ENTRY] / + (codec_encoder_gop_complexity_table_fp + [CODEC_GOP_I3B4b1P][CODEC_ENCODER_GOP_Bb_ENTRY] + + codec_encoder_gop_complexity_table_fp + [CODEC_GOP_I3B4b1P][CODEC_ENCODER_GOP_P_ENTRY]); + + codec_encoder_gop_complexity_table_fp + [CODEC_GOP_I1B2b1P][CODEC_ENCODER_GOP_Bb_ENTRY] = 30000; + + codec_encoder_gop_complexity_table_fp + [CODEC_GOP_I1B2b1P][CODEC_ENCODER_GOP_P_ENTRY] = 10000; + + codec_encoder_gop_complexity_table_fp + [CODEC_GOP_I1B2b1P][CODEC_ENCODER_GOP_FACTORY_ENTRY] = + (codec_encoder_gop_complexity_table_fp + [CODEC_GOP_I1B2b1P][CODEC_ENCODER_GOP_Bb_ENTRY] * 150 + + codec_encoder_gop_complexity_table_fp + [CODEC_GOP_I1B2b1P][CODEC_ENCODER_GOP_P_ENTRY] * 100); + + codec_encoder_gop_complexity_table_fp + [CODEC_GOP_I1B2b1P][CODEC_ENCODER_GOP_FACTORY_ENTRY] = + codec_encoder_gop_complexity_table_fp + [CODEC_GOP_I1B2b1P][CODEC_ENCODER_GOP_FACTORY_ENTRY] + + (codec_encoder_gop_complexity_table_fp + [CODEC_GOP_I1B2b1P][CODEC_ENCODER_GOP_Bb_ENTRY] + + codec_encoder_gop_complexity_table_fp + [CODEC_GOP_I1B2b1P][CODEC_ENCODER_GOP_P_ENTRY] - 1); + + codec_encoder_gop_complexity_table_fp + [CODEC_GOP_I1B2b1P][CODEC_ENCODER_GOP_FACTORY_ENTRY] = + codec_encoder_gop_complexity_table_fp + [CODEC_GOP_I1B2b1P][CODEC_ENCODER_GOP_FACTORY_ENTRY] / + (codec_encoder_gop_complexity_table_fp + [CODEC_GOP_I1B2b1P][CODEC_ENCODER_GOP_Bb_ENTRY] + + codec_encoder_gop_complexity_table_fp + [CODEC_GOP_I1B2b1P][CODEC_ENCODER_GOP_P_ENTRY]); + + codec_encoder_gop_complexity_table_fp + [CODEC_GOP_IbP][CODEC_ENCODER_GOP_Bb_ENTRY] = 10000; + + codec_encoder_gop_complexity_table_fp + [CODEC_GOP_IbP][CODEC_ENCODER_GOP_P_ENTRY] = 10000; + + codec_encoder_gop_complexity_table_fp + [CODEC_GOP_IbP][CODEC_ENCODER_GOP_FACTORY_ENTRY] = + (codec_encoder_gop_complexity_table_fp + [CODEC_GOP_IbP][CODEC_ENCODER_GOP_Bb_ENTRY] * 150 + + codec_encoder_gop_complexity_table_fp + [CODEC_GOP_IbP][CODEC_ENCODER_GOP_P_ENTRY] * 100); + + codec_encoder_gop_complexity_table_fp + [CODEC_GOP_IbP][CODEC_ENCODER_GOP_FACTORY_ENTRY] = + codec_encoder_gop_complexity_table_fp + [CODEC_GOP_IbP][CODEC_ENCODER_GOP_FACTORY_ENTRY] + + (codec_encoder_gop_complexity_table_fp + [CODEC_GOP_IbP][CODEC_ENCODER_GOP_Bb_ENTRY] + + codec_encoder_gop_complexity_table_fp + [CODEC_GOP_IbP][CODEC_ENCODER_GOP_P_ENTRY] - 1); + + codec_encoder_gop_complexity_table_fp + [CODEC_GOP_IbP][CODEC_ENCODER_GOP_FACTORY_ENTRY] = + codec_encoder_gop_complexity_table_fp + [CODEC_GOP_IbP][CODEC_ENCODER_GOP_FACTORY_ENTRY] / + (codec_encoder_gop_complexity_table_fp + [CODEC_GOP_IbP][CODEC_ENCODER_GOP_Bb_ENTRY] + + codec_encoder_gop_complexity_table_fp + [CODEC_GOP_IbP][CODEC_ENCODER_GOP_P_ENTRY]); + + codec_encoder_gop_complexity_table_fp + [CODEC_GOP_IPP][CODEC_ENCODER_GOP_Bb_ENTRY] = 0; + + codec_encoder_gop_complexity_table_fp + [CODEC_GOP_IPP][CODEC_ENCODER_GOP_P_ENTRY] = 1; + + codec_encoder_gop_complexity_table_fp + [CODEC_GOP_IPP][CODEC_ENCODER_GOP_FACTORY_ENTRY] = + (codec_encoder_gop_complexity_table_fp + [CODEC_GOP_IPP][CODEC_ENCODER_GOP_Bb_ENTRY] * 150 + + codec_encoder_gop_complexity_table_fp + [CODEC_GOP_IPP][CODEC_ENCODER_GOP_P_ENTRY] * 100); + + codec_encoder_gop_complexity_table_fp + [CODEC_GOP_IPP][CODEC_ENCODER_GOP_FACTORY_ENTRY] = + codec_encoder_gop_complexity_table_fp + [CODEC_GOP_IPP][CODEC_ENCODER_GOP_FACTORY_ENTRY] + + (codec_encoder_gop_complexity_table_fp + [CODEC_GOP_IPP][CODEC_ENCODER_GOP_Bb_ENTRY] + + codec_encoder_gop_complexity_table_fp + [CODEC_GOP_IPP][CODEC_ENCODER_GOP_P_ENTRY] - 1); + + codec_encoder_gop_complexity_table_fp + [CODEC_GOP_IPP][CODEC_ENCODER_GOP_FACTORY_ENTRY] = + codec_encoder_gop_complexity_table_fp + [CODEC_GOP_IPP][CODEC_ENCODER_GOP_FACTORY_ENTRY] / + (codec_encoder_gop_complexity_table_fp + [CODEC_GOP_IPP][CODEC_ENCODER_GOP_Bb_ENTRY] + + codec_encoder_gop_complexity_table_fp + [CODEC_GOP_IPP][CODEC_ENCODER_GOP_P_ENTRY]); + + return 0; +} + +u32 get_bitrate_entry(u32 pixle_count) +{ + u32 bitrate_entry = 0; + + if (pixle_count >= fp_pixel_count_bar1) + bitrate_entry = 1; + else if (pixle_count >= fp_pixel_count_bar2) + bitrate_entry = 2; + else if (pixle_count >= fp_pixel_count_bar3) + bitrate_entry = 3; + else if (pixle_count >= fp_pixel_count_bar4) + bitrate_entry = 4; + else if (pixle_count >= fp_pixel_count_bar5) + bitrate_entry = 5; + else if (pixle_count >= fp_pixel_count_bar6) + bitrate_entry = 6; + else if (pixle_count >= fp_pixel_count_bar7) + bitrate_entry = 7; + else if (pixle_count >= fp_pixel_count_bar8) + bitrate_entry = 8; + else if (pixle_count >= fp_pixel_count_bar9) + bitrate_entry = 9; + else + bitrate_entry = 9; + + return bitrate_entry; +} + +static int calculate_vsp_min_freq(struct api_calculation_input codec_input, + struct api_calculation_freq_output *codec_output) +{ + /* + * VSP calculation + * different methodology from Lahaina + */ + u32 vsp_hw_min_frequency = 0; + /* UInt32 decoder_vsp_fw_overhead = 100 + 5; // amplified by 100x */ + u32 fw_sw_vsp_offset = 1000 + 55; /* amplified by 1000x */ + + /* + * Ignore fw_sw_vsp_offset, as this is baked into the reference bitrate tables. + * As a consequence remove x1000 multipler as well. + */ + u32 codec = codec_input.codec; + /* UInt32 *bitratetable; */ + u32 pixle_count = codec_input.frame_width * + codec_input.frame_height * codec_input.frame_rate; + + u8 bitrate_entry = get_bitrate_entry(pixle_count); /* TODO EXTRACT */ + + input_bitrate_fp = ((u32)(codec_input.bitrate_mbps * 100 + 99)) / 100; + vsp_hw_min_frequency = frequency_table_kalama[0][1] * input_bitrate_fp * 1000; + + /* 8KUHD60fps with B frame */ + if ((pixle_count >= fp_pixel_count_bar0) && + (codec_input.hierachical_layer != CODEC_GOP_IPP)) { + /* + * FORMULA: VSPfreq = NOMINAL * (InputBitrate / ReferenceBitrate); + * ReferenceBitrate = 0 for, + * - 1Stage TURBO, all Codecs. + * - 2Stage TURBO, H264 & H265. + * + * 8KUHD60fps with B frame + * - bitrate_entry = 0 + * - Clock=NOMINAL for H264 & 2Stage H265. Because bitrate table entry for TURBO is 0. + * + * TODO : Reduce these conditions by removing the zero entries from Bitrate table. + */ + vsp_hw_min_frequency = frequency_table_kalama[0][1] * + input_bitrate_fp * 1000; + + if (codec_input.codec == CODEC_AV1) + vsp_hw_min_frequency = frequency_table_kalama[0][0] * + input_bitrate_fp * 1000; + + if ((codec_input.codec == CODEC_H264) || + (codec_input.codec == CODEC_H264_CAVLC) || + ((codec_input.codec == CODEC_HEVC) && + (codec_input.vsp_vpp_mode == CODEC_VSPVPP_MODE_1S))) { + vsp_hw_min_frequency = + DIV_ROUND_UP(frequency_table_kalama[0][1], fw_sw_vsp_offset); + } else if (((codec_input.codec == CODEC_HEVC) && + (codec_input.vsp_vpp_mode == CODEC_VSPVPP_MODE_2S)) + || (codec_input.codec == CODEC_VP9) + || (codec_input.codec == CODEC_AV1)) { + if (codec_input.vsp_vpp_mode == CODEC_VSPVPP_MODE_2S) { + vsp_hw_min_frequency = DIV_ROUND_UP(vsp_hw_min_frequency, + (bitrate_table_kalama_2stage_fp[codec][0] * fw_sw_vsp_offset)); + } else { + vsp_hw_min_frequency = DIV_ROUND_UP(vsp_hw_min_frequency, + (bitrate_table_kalama_1stage_fp[codec][0] * fw_sw_vsp_offset)); + } + } + } else { + vsp_hw_min_frequency = frequency_table_kalama[0][1] * + input_bitrate_fp * 1000; + + if (codec_input.codec == CODEC_AV1 && bitrate_entry == 1) + vsp_hw_min_frequency = frequency_table_kalama[0][0] * + input_bitrate_fp * 1000; + + if ((codec_input.codec == CODEC_H264_CAVLC) && + (codec_input.entropy_coding_mode == CODEC_ENTROPY_CODING_CAVLC)) + codec = CODEC_H264_CAVLC; + else if ((codec_input.codec == CODEC_H264) && + (codec_input.entropy_coding_mode == CODEC_ENTROPY_CODING_CABAC)) + codec = CODEC_H264; + + if (codec_input.vsp_vpp_mode == CODEC_VSPVPP_MODE_2S) + vsp_hw_min_frequency = DIV_ROUND_UP(vsp_hw_min_frequency, + (bitrate_table_kalama_2stage_fp[codec][bitrate_entry]) * + fw_sw_vsp_offset); + else + vsp_hw_min_frequency = DIV_ROUND_UP(vsp_hw_min_frequency, + (bitrate_table_kalama_1stage_fp[codec][bitrate_entry]) * + fw_sw_vsp_offset); + } + + codec_output->vsp_min_freq = vsp_hw_min_frequency; + return 0; +} + +static u32 calculate_pipe_penalty(struct api_calculation_input codec_input) +{ + u32 pipe_penalty_codec = 0; + u8 avid_commercial_content = 0; + u32 pixel_count = 0; + + /* decoder */ + if (codec_input.decoder_or_encoder == CODEC_DECODER) { + pipe_penalty_codec = pipe_penalty_kalama[0][0]; + avid_commercial_content = codec_input.av1d_commer_tile_enable; + if (codec_input.codec == CODEC_AV1) { + pixel_count = codec_input.frame_width * codec_input.frame_height; + if (pixel_count <= 1920 * 1080) + pipe_penalty_codec = + pipe_penalty_kalama[avid_commercial_content + 1][0]; + else if (pixel_count < 3840 * 2160) + pipe_penalty_codec = + (pipe_penalty_kalama[avid_commercial_content + 1][0] + + pipe_penalty_kalama[avid_commercial_content + 1][1]) / 2; + else if ((pixel_count == 3840 * 2160) || + (pixel_count == 4096 * 2160) || (pixel_count == 4096 * 2304)) + pipe_penalty_codec = pipe_penalty_kalama[avid_commercial_content + 1][1]; + else if (pixel_count < 7680 * 4320) + pipe_penalty_codec = + (pipe_penalty_kalama[avid_commercial_content + 1][1] + + pipe_penalty_kalama[avid_commercial_content + 1][2]) / 2; + else + pipe_penalty_codec = + pipe_penalty_kalama[avid_commercial_content + 1][2]; + } + } else { + pipe_penalty_codec = 101; + } + + return pipe_penalty_codec; +} + +static int calculate_vpp_min_freq(struct api_calculation_input codec_input, + struct api_calculation_freq_output *codec_output) +{ + u32 vpp_hw_min_frequency = 0; + u32 fmin = 0; + u32 tensilica_min_frequency = 0; + u32 decoder_vsp_fw_overhead = 100 + 5; /* amplified by 100x */ + /* UInt32 fw_sw_vsp_offset = 1000 + 55; amplified by 1000x */ + /* TODO from calculate_sw_vsp_min_freq */ + u32 vsp_hw_min_frequency = codec_output->vsp_min_freq; + u32 pipe_penalty_codec = 0; + u32 fmin_fwoverhead105 = 0; + u32 fmin_measured_fwoverhead = 0; + u32 lpmode_uhd_cycle_permb = 0; + u32 hqmode1080p_cycle_permb = 0; + u32 encoder_vpp_target_clk_per_mb = 0; + + codec_mbspersession_kalama = + calculate_number_mbs_kalama(codec_input.frame_width, + codec_input.frame_height, codec_input.lcu_size) * + codec_input.frame_rate; + + /* Section 2. 0 VPP/VSP calculation */ + if (codec_input.decoder_or_encoder == CODEC_DECODER) { /* decoder */ + vpp_hw_min_frequency = ((decoder_vpp_target_clk_per_mb_kalama) * + (codec_mbspersession_kalama) + codec_input.pipe_num - 1) / + (codec_input.pipe_num); + + vpp_hw_min_frequency = (vpp_hw_min_frequency + 99999) / 1000000; + + if (codec_input.pipe_num > 1) { + pipe_penalty_codec = calculate_pipe_penalty(codec_input); + vpp_hw_min_frequency = (vpp_hw_min_frequency * + pipe_penalty_codec + 999) / 1000; + } + + if (codec_input.vsp_vpp_mode == CODEC_VSPVPP_MODE_2S) { + /* FW overhead, convert FW cycles to impact to one pipe */ + u64 decoder_vpp_fw_overhead = 0; + decoder_vpp_fw_overhead = + DIV_ROUND_UP((DECODER_VPP_FW_OVERHEAD_KALAMA * 10 * + codec_input.frame_rate), 15); + + decoder_vpp_fw_overhead = + DIV_ROUND_UP((decoder_vpp_fw_overhead * 1000), + (codec_mbspersession_kalama * + decoder_vpp_target_clk_per_mb_kalama / codec_input.pipe_num)); + + decoder_vpp_fw_overhead += 1000; + decoder_vpp_fw_overhead = (decoder_vpp_fw_overhead < 1050) ? + 1050 : decoder_vpp_fw_overhead; + + /* VPP HW + FW */ + if (codec_input.linear_opb == 1 && codec_input.bitdepth == CODEC_BITDEPTH_10) + /* multiply by 1.20 for 10b case */ + decoder_vpp_fw_overhead = 1200 + decoder_vpp_fw_overhead - 1000; + + vpp_hw_min_frequency = (vpp_hw_min_frequency * + decoder_vpp_fw_overhead + 999) / 1000; + + /* VSP HW+FW */ + vsp_hw_min_frequency = + (vsp_hw_min_frequency * decoder_vsp_fw_overhead + 99) / 100; + + fmin = (vpp_hw_min_frequency > vsp_hw_min_frequency) ? + vpp_hw_min_frequency : vsp_hw_min_frequency; + } else { + /* 1-stage need SW cycles + FW cycles + HW time */ + if (codec_input.linear_opb == 1 && codec_input.bitdepth == CODEC_BITDEPTH_10) + /* multiply by 1.20 for 10b linear case */ + vpp_hw_min_frequency = + (vpp_hw_min_frequency * 1200 + 999) / 1000; + + /* + * HW time + * comment: 02/23/2021 SY: the bitrate is measured bitrate, + * the overlapping effect is already considered into bitrate. + * no need to add extra anymore + */ + fmin = (vpp_hw_min_frequency > vsp_hw_min_frequency) ? + vpp_hw_min_frequency : vsp_hw_min_frequency; + + /* FW time */ + fmin_fwoverhead105 = (fmin * 105 + 99) / 100; + fmin_measured_fwoverhead = fmin + + (((DECODER_VPPVSP1STAGE_FW_OVERHEAD_KALAMA * + codec_input.frame_rate * 10 + 14) / 15 + 999) / 1000 + 999) / + 1000; + + fmin = (fmin_fwoverhead105 > fmin_measured_fwoverhead) ? + fmin_fwoverhead105 : fmin_measured_fwoverhead; + } + + tensilica_min_frequency = (DECODER_SW_OVERHEAD_KALAMA * 10 + 14) / 15; + tensilica_min_frequency = (tensilica_min_frequency + 999) / 1000; + tensilica_min_frequency = tensilica_min_frequency * codec_input.frame_rate; + tensilica_min_frequency = (tensilica_min_frequency + 999) / 1000; + fmin = (tensilica_min_frequency > fmin) ? tensilica_min_frequency : fmin; + } else { /* encoder */ + /* Decide LP/HQ */ + u8 hq_mode = 0; + if (codec_input.pipe_num > 1) + if (codec_input.frame_width * codec_input.frame_height <= + 1920 * 1080) + if (codec_input.frame_width * codec_input.frame_height * + codec_input.frame_rate <= 1920 * 1080 * 60) + hq_mode = 1; + + codec_output->enc_hqmode = hq_mode; + + /* Section 1. 0 */ + /* TODO ONETIME call, should be in another place. */ + initialize_encoder_complexity_table(); + + /* End Calculate Encoder GOP Complexity Table */ + + /* VPP base cycle */ + lpmode_uhd_cycle_permb = (320 * + codec_encoder_gop_complexity_table_fp + [codec_input.hierachical_layer][CODEC_ENCODER_GOP_FACTORY_ENTRY] + + 99) / 100; + + if ((codec_input.frame_width == 1920) && + ((codec_input.frame_height == 1080) || + (codec_input.frame_height == 1088)) && + (codec_input.frame_rate >= 480)) + lpmode_uhd_cycle_permb = (90 * 4 * + codec_encoder_gop_complexity_table_fp + [codec_input.hierachical_layer][CODEC_ENCODER_GOP_FACTORY_ENTRY] + + 99) / 100; + + if ((codec_input.frame_width == 1280) && + ((codec_input.frame_height == 720) || + (codec_input.frame_height == 768)) && + (codec_input.frame_rate >= 960)) + lpmode_uhd_cycle_permb = (99 * 4 * + codec_encoder_gop_complexity_table_fp + [codec_input.hierachical_layer][CODEC_ENCODER_GOP_FACTORY_ENTRY] + + 99) / 100; + + hqmode1080p_cycle_permb = (675 * + codec_encoder_gop_complexity_table_fp + [codec_input.hierachical_layer][CODEC_ENCODER_GOP_FACTORY_ENTRY] + + 99) / 100; + + encoder_vpp_target_clk_per_mb = (hq_mode) ? + hqmode1080p_cycle_permb : lpmode_uhd_cycle_permb; + + vpp_hw_min_frequency = ((encoder_vpp_target_clk_per_mb) * + (codec_mbspersession_kalama) + codec_input.pipe_num - 1) / + (codec_input.pipe_num); + + vpp_hw_min_frequency = (vpp_hw_min_frequency + 99999) / 1000000; + + if (codec_input.pipe_num > 1) { + u32 pipe_penalty_codec = 101; + vpp_hw_min_frequency = (vpp_hw_min_frequency * + pipe_penalty_codec + 99) / 100; + } + + if (codec_input.vsp_vpp_mode == CODEC_VSPVPP_MODE_2S) { + /* FW overhead, convert FW cycles to impact to one pipe */ + u64 encoder_vpp_fw_overhead = 0; + + encoder_vpp_fw_overhead = + DIV_ROUND_UP((ENCODER_VPP_FW_OVERHEAD_KALAMA * 10 * + codec_input.frame_rate), 15); + + encoder_vpp_fw_overhead = + DIV_ROUND_UP((encoder_vpp_fw_overhead * 1000), + (codec_mbspersession_kalama * encoder_vpp_target_clk_per_mb / + codec_input.pipe_num)); + + encoder_vpp_fw_overhead += 1000; + + encoder_vpp_fw_overhead = (encoder_vpp_fw_overhead < 1050) ? + 1050 : encoder_vpp_fw_overhead; + + /* VPP HW + FW */ + vpp_hw_min_frequency = (vpp_hw_min_frequency * + encoder_vpp_fw_overhead + 999) / 1000; + + /* TODO : decoder_vsp_fw_overhead? */ + vsp_hw_min_frequency = (vsp_hw_min_frequency * + decoder_vsp_fw_overhead + 99) / 100; + + fmin = (vpp_hw_min_frequency > vsp_hw_min_frequency) ? + vpp_hw_min_frequency : vsp_hw_min_frequency; + } else { + /* HW time */ + fmin = (vpp_hw_min_frequency > vsp_hw_min_frequency) ? + vpp_hw_min_frequency : vsp_hw_min_frequency; + + /* FW time */ + fmin_fwoverhead105 = (fmin * 105 + 99) / 100; + fmin_measured_fwoverhead = fmin + + (((DECODER_VPPVSP1STAGE_FW_OVERHEAD_KALAMA * + codec_input.frame_rate * 10 + 14) / 15 + 999) / + 1000 + 999) / 1000; + + fmin = (fmin_fwoverhead105 > fmin_measured_fwoverhead) ? + fmin_fwoverhead105 : fmin_measured_fwoverhead; + /* SW time */ + } + + tensilica_min_frequency = (ENCODER_SW_OVERHEAD_KALAMA * 10 + 14) / 15; + tensilica_min_frequency = (tensilica_min_frequency + 999) / 1000; + + tensilica_min_frequency = tensilica_min_frequency * + codec_input.frame_rate; + + tensilica_min_frequency = (tensilica_min_frequency + 999) / 1000; + + fmin = (tensilica_min_frequency > fmin) ? + tensilica_min_frequency : fmin; + } + + codec_output->vpp_min_freq = vpp_hw_min_frequency; + codec_output->vsp_min_freq = vsp_hw_min_frequency; + codec_output->tensilica_min_freq = tensilica_min_frequency; + codec_output->hw_min_freq = fmin; + + return 0; +} + +int msm_vidc_calculate_frequency(struct api_calculation_input codec_input, + struct api_calculation_freq_output *codec_output) +{ + int rc = 0; + + rc = calculate_vsp_min_freq(codec_input, codec_output); + if (rc) + return rc; + + rc = calculate_vpp_min_freq(codec_input, codec_output); + if (rc) + return rc; + + return rc; +} \ No newline at end of file diff --git a/driver/variant/iris3/src/msm_vidc_power_iris3.c b/driver/variant/iris3/src/msm_vidc_power_iris3.c index 2ecaca5eac..49a2d77d9c 100644 --- a/driver/variant/iris3/src/msm_vidc_power_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_power_iris3.c @@ -9,8 +9,373 @@ #include "msm_vidc_inst.h" #include "msm_vidc_core.h" #include "msm_vidc_debug.h" +#include "perf_static_model.h" +#include "msm_vidc_power.h" + +static u64 __calculate_decoder(struct vidc_bus_vote_data *d); +static u64 __calculate_encoder(struct vidc_bus_vote_data *d); +static u64 __calculate(struct msm_vidc_inst* inst, struct vidc_bus_vote_data *d); +static u64 msm_vidc_calc_freq_iris3_legacy(struct msm_vidc_inst *inst, u32 data_size); + +static int msm_vidc_init_codec_input_freq(struct msm_vidc_inst *inst, u32 data_size, + struct api_calculation_input *codec_input) +{ + enum msm_vidc_port_type port; + u32 color_fmt; + + if (inst->domain == MSM_VIDC_ENCODER) { + codec_input->decoder_or_encoder = CODEC_ENCODER; + } else if (inst->domain == MSM_VIDC_DECODER) { + codec_input->decoder_or_encoder = CODEC_DECODER; + } else { + d_vpr_e("%s: invalid domain %d\n", __func__, inst->domain); + return -EINVAL; + } + + codec_input->chipset_gen = MSM_KALAMA; + + if (inst->codec == MSM_VIDC_H264) { + codec_input->codec = CODEC_H264; + codec_input->lcu_size = 16; + if (inst->capabilities->cap[ENTROPY_MODE].value == + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC) + codec_input->entropy_coding_mode = CODEC_ENTROPY_CODING_CABAC; + else + codec_input->entropy_coding_mode = CODEC_ENTROPY_CODING_CAVLC; + } else if (inst->codec == MSM_VIDC_HEVC) { + codec_input->codec = CODEC_HEVC; + codec_input->lcu_size = 32; + } else if (inst->codec == MSM_VIDC_VP9) { + codec_input->codec = CODEC_VP9; + codec_input->lcu_size = 16; + } else if (inst->codec == MSM_VIDC_AV1) { + codec_input->codec = CODEC_AV1; + codec_input->lcu_size = 32; + } else { + d_vpr_e("%s: invalid codec %d\n", __func__, inst->codec); + return -EINVAL; + } + + codec_input->pipe_num = inst->capabilities->cap[PIPE].value; + codec_input->frame_rate = inst->max_rate; + + port = inst->domain == MSM_VIDC_DECODER ? INPUT_PORT : OUTPUT_PORT; + codec_input->frame_width = inst->fmts[port].fmt.pix_mp.width; + codec_input->frame_height = inst->fmts[port].fmt.pix_mp.height; + + if (inst->capabilities->cap[STAGE].value == MSM_VIDC_STAGE_1) { + codec_input->vsp_vpp_mode = CODEC_VSPVPP_MODE_1S; + } else if (inst->capabilities->cap[STAGE].value == MSM_VIDC_STAGE_2) { + codec_input->vsp_vpp_mode = CODEC_VSPVPP_MODE_2S; + } else { + d_vpr_e("%s: invalid stage %d\n", __func__, + inst->capabilities->cap[STAGE].value); + return -EINVAL; + } + + if (inst->capabilities->cap[BIT_DEPTH].value == BIT_DEPTH_8) + codec_input->bitdepth = CODEC_BITDEPTH_8; + else + codec_input->bitdepth = CODEC_BITDEPTH_10; + + /* + * Used for calculating Encoder GOP Complexity + * hierachical_layer=0..7 used as Array Index + * inst->capabilities->cap[B_FRAME].value=[ 0 1 2 ] + * TODO how to map? + */ + + /* set as IPP */ + codec_input->hierachical_layer = 0; + + if (inst->domain == MSM_VIDC_DECODER) + color_fmt = v4l2_colorformat_to_driver(inst, + inst->fmts[OUTPUT_PORT].fmt.pix_mp.pixelformat, __func__); + else + color_fmt = v4l2_colorformat_to_driver(inst, + inst->fmts[INPUT_PORT].fmt.pix_mp.pixelformat, __func__); + + codec_input->linear_opb = is_linear_colorformat(color_fmt); + codec_input->bitrate_mbps = + (codec_input->frame_rate * data_size * 8) / 1000000; + + /* disable av1d commercial tile */ + codec_input->av1d_commer_tile_enable = 0; + /* set as sanity mode */ + codec_input->regression_mode = 1; + + return 0; +} + +static int msm_vidc_init_codec_input_bus(struct msm_vidc_inst *inst, struct vidc_bus_vote_data *d, + struct api_calculation_input *codec_input) +{ + u32 complexity_factor_int = 0, complexity_factor_frac = 0; + bool opb_compression_enabled = false; + + if (!d) + return -EINVAL; + + if (d->domain == MSM_VIDC_ENCODER) { + codec_input->decoder_or_encoder = CODEC_ENCODER; + } else if (d->domain == MSM_VIDC_DECODER) { + codec_input->decoder_or_encoder = CODEC_DECODER; + } else { + d_vpr_e("%s: invalid domain %d\n", __func__, d->domain); + return -EINVAL; + } + + codec_input->chipset_gen = MSM_KALAMA; + + if (d->codec == MSM_VIDC_H264) { + codec_input->codec = CODEC_H264; + } else if (d->codec == MSM_VIDC_HEVC) { + codec_input->codec = CODEC_HEVC; + } else if (d->codec == MSM_VIDC_VP9) { + codec_input->codec = CODEC_VP9; + } else if (d->codec == MSM_VIDC_AV1) { + codec_input->codec = CODEC_AV1; + } else { + d_vpr_e("%s: invalid codec %d\n", __func__, d->codec); + return -EINVAL; + } + + codec_input->lcu_size = d->lcu_size; + codec_input->pipe_num = d->num_vpp_pipes; + codec_input->frame_rate = d->fps; + codec_input->frame_width = d->input_width; + codec_input->frame_height = d->input_height; + + if (d->work_mode == MSM_VIDC_STAGE_1) { + codec_input->vsp_vpp_mode = CODEC_VSPVPP_MODE_1S; + } else if (d->work_mode == MSM_VIDC_STAGE_2) { + codec_input->vsp_vpp_mode = CODEC_VSPVPP_MODE_2S; + } else { + d_vpr_e("%s: invalid stage %d\n", __func__, d->work_mode); + return -EINVAL; + } + + if (inst->capabilities->cap[ENTROPY_MODE].value == + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC) { + codec_input->entropy_coding_mode = CODEC_ENTROPY_CODING_CABAC; + } else if (inst->capabilities->cap[ENTROPY_MODE].value == + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC) { + codec_input->entropy_coding_mode = CODEC_ENTROPY_CODING_CAVLC; + } else { + d_vpr_e("%s: invalid entropy %d\n", __func__, + inst->capabilities->cap[ENTROPY_MODE].value); + return -EINVAL; + } + + /* + * Used for calculating Encoder GOP Complexity + * hierachical_layer=0..7 used as Array Index + * TODO how to map? + */ + codec_input->hierachical_layer = 0; /* set as IPP */ + + /* + * If the calculated motion_vector_complexity is > 2 then set the + * complexity_setting and refframe_complexity to be pwc(performance worst case) + * values. If the motion_vector_complexity is < 2 then set the complexity_setting + * and refframe_complexity to be average case values. + */ + + complexity_factor_int = Q16_INT(d->complexity_factor); + complexity_factor_frac = Q16_FRAC(d->complexity_factor); + + if (complexity_factor_int < COMPLEXITY_THRESHOLD || + (complexity_factor_int == COMPLEXITY_THRESHOLD && + complexity_factor_frac == 0)) { + /* set as average case values */ + codec_input->complexity_setting = COMPLEXITY_SETTING_AVG; + codec_input->refframe_complexity = REFFRAME_COMPLEXITY_AVG; + } else { + /* set as pwc */ + codec_input->complexity_setting = COMPLEXITY_SETTING_PWC; + codec_input->refframe_complexity = REFFRAME_COMPLEXITY_PWC; + } + + codec_input->status_llc_onoff = d->use_sys_cache; + + if (__bpp(d->color_formats[0]) == 8) + codec_input->bitdepth = CODEC_BITDEPTH_8; + else + codec_input->bitdepth = CODEC_BITDEPTH_10; + + if (d->num_formats == 1) { + codec_input->split_opb = 0; + codec_input->linear_opb = !__ubwc(d->color_formats[0]); + } else if (d->num_formats == 2) { + codec_input->split_opb = 1; + codec_input->linear_opb = !__ubwc(d->color_formats[1]); + } else { + d_vpr_e("%s: invalid num_formats %d\n", + __func__, d->num_formats); + return -EINVAL; + } + + codec_input->linear_ipb = 0; /* set as ubwc ipb */ + + /* TODO Confirm if we always LOSSLESS mode ie lossy_ipb = 0*/ + codec_input->lossy_ipb = 0; /* set as lossless ipb */ + + /* TODO Confirm if no multiref */ + codec_input->encoder_multiref = 0; /* set as no multiref */ + codec_input->bitrate_mbps = (d->bitrate / 1000000); /* bps 10; set as 10mbps */ + + opb_compression_enabled = d->num_formats >= 2 && __ubwc(d->color_formats[1]); + + /* ANDROID CR is in Q16 format, StaticModel CR in x100 format */ + codec_input->cr_dpb = ((Q16_INT(d->compression_ratio)*100) + + Q16_FRAC(d->compression_ratio)); + + codec_input->cr_opb = opb_compression_enabled ? + codec_input->cr_dpb : FP_ONE; + + codec_input->cr_ipb = ((Q16_INT(d->input_cr)*100) + Q16_FRAC(d->input_cr)); + codec_input->cr_rpb = codec_input->cr_dpb; /* cr_rpb ony for encoder */ + + /* disable by default, only enable for aurora depth map session */ + codec_input->lumaonly_decode = 0; + /* TODO: disable av1d commercial tile */ + codec_input->av1d_commer_tile_enable = 0; + /* set as custom regression mode, as are using cr,cf values from FW */ + codec_input->regression_mode = REGRESSION_MODE_CUSTOM; + + + /* Dump all the variables for easier debugging */ + if (msm_vidc_debug & VIDC_BUS) { + struct dump dump[] = { + {"complexity_factor_int", "%d", complexity_factor_int}, + {"complexity_factor_frac", "%d", complexity_factor_frac}, + {"refframe_complexity", "%d", codec_input->refframe_complexity}, + {"complexity_setting", "%d", codec_input->complexity_setting}, + {"cr_dpb", "%d", codec_input->cr_dpb}, + {"cr_opb", "%d", codec_input->cr_opb}, + {"cr_ipb", "%d", codec_input->cr_ipb}, + {"cr_rpb", "%d", codec_input->cr_rpb}, + {"lcu size", "%d", codec_input->lcu_size}, + {"pipe number", "%d", codec_input->pipe_num}, + {"frame_rate", "%d", codec_input->frame_rate}, + {"frame_width", "%d", codec_input->frame_width}, + {"frame_height", "%d", codec_input->frame_height}, + {"work_mode","%d", d->work_mode}, + {"encoder_or_decode", "%d", inst->domain}, + {"chipset_gen", "%d", codec_input->chipset_gen}, + {"codec_input", "%d", codec_input->codec}, + {"entropy_coding_mode", "%d", codec_input->entropy_coding_mode}, + {"hierachical_layer", "%d", codec_input->hierachical_layer}, + {"status_llc_onoff", "%d", codec_input->status_llc_onoff}, + {"bit_depth", "%d", codec_input->bitdepth}, + {"split_opb", "%d", codec_input->split_opb}, + {"linear_opb", "%d", codec_input->linear_opb}, + {"linear_ipb", "%d", codec_input->linear_ipb}, + {"lossy_ipb", "%d", codec_input->lossy_ipb}, + {"encoder_multiref", "%d", codec_input->encoder_multiref}, + {"bitrate_mbps", "%d", codec_input->bitrate_mbps}, + {"lumaonly_decode", "%d", codec_input->lumaonly_decode}, + {"av1d_commer_tile_enable", "%d", codec_input->av1d_commer_tile_enable}, + {"regression_mode", "%d", codec_input->regression_mode}, + }; + __dump(dump, ARRAY_SIZE(dump)); + } + + return 0; +} + +static u64 msm_vidc_calc_freq_iris3_new(struct msm_vidc_inst *inst, u32 data_size) +{ + u64 freq = 0; + struct msm_vidc_core* core; + int ret = 0; + struct api_calculation_input codec_input; + struct api_calculation_freq_output codec_output; + u32 fps, mbpf; + + if (!inst || !inst->core || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return freq; + } + + core = inst->core; + + mbpf = msm_vidc_get_mbs_per_frame(inst); + fps = inst->max_rate; + + memset(&codec_input, 0, sizeof(struct api_calculation_input)); + memset(&codec_output, 0, sizeof(struct api_calculation_freq_output)); + ret = msm_vidc_init_codec_input_freq(inst, data_size, &codec_input); + if (ret) + return freq; + ret = msm_vidc_calculate_frequency(codec_input, &codec_output); + if (ret) + return freq; + freq = codec_output.hw_min_freq * 1000000; /* Convert to Hz */ + + i_vpr_p(inst, "%s: filled len %d, required freq %llu, fps %u, mbpf %u\n", + __func__, data_size, freq, fps, mbpf); + + if (inst->codec == MSM_VIDC_AV1 || + (inst->iframe && is_hevc_10bit_decode_session(inst))) { + /* + * for AV1 or HEVC 10bit and iframe case only allow TURBO and + * limit to NOM for all other cases + */ + } else { + /* limit to NOM, index 0 is TURBO, index 1 is NOM clock rate */ + if (core->resource->freq_set.count >= 2 && + freq > core->resource->freq_set.freq_tbl[1].freq) + freq = core->resource->freq_set.freq_tbl[1].freq; + } + + return freq; +} + +static int msm_vidc_calc_bw_iris3_new(struct msm_vidc_inst *inst, + struct vidc_bus_vote_data *vidc_data) +{ + u32 ret = 0; + struct api_calculation_input codec_input; + struct api_calculation_bw_output codec_output; + + memset(&codec_input, 0, sizeof(struct api_calculation_input)); + memset(&codec_output, 0, sizeof(struct api_calculation_bw_output)); + + ret = msm_vidc_init_codec_input_bus(inst, vidc_data, &codec_input); + if (ret) + return ret; + ret = msm_vidc_calculate_bandwidth(codec_input, &codec_output); + if (ret) + return ret; + + vidc_data->calc_bw_ddr = kbps(codec_output.ddr_bw_rd + codec_output.ddr_bw_wr); + vidc_data->calc_bw_llcc = kbps(codec_output.noc_bw_rd + codec_output.noc_bw_wr); + + i_vpr_l(inst, "%s: calc_bw_ddr %lu calc_bw_llcc %lu", + __func__, vidc_data->calc_bw_ddr, vidc_data->calc_bw_llcc); + + return ret; +} u64 msm_vidc_calc_freq_iris3(struct msm_vidc_inst *inst, u32 data_size) +{ + u64 freq = 0; + + if (!inst || !inst->core || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return freq; + } + + if (ENABLE_LEGACY_POWER_CALCULATIONS) + freq = msm_vidc_calc_freq_iris3_legacy(inst, data_size); + else + freq = msm_vidc_calc_freq_iris3_new(inst, data_size); + + return freq; +} + +static u64 msm_vidc_calc_freq_iris3_legacy(struct msm_vidc_inst *inst, u32 data_size) { u64 freq = 0; struct msm_vidc_core* core; @@ -802,7 +1167,10 @@ int msm_vidc_calc_bw_iris3(struct msm_vidc_inst *inst, if (!vidc_data) return value; - value = __calculate(inst, vidc_data); + if (ENABLE_LEGACY_POWER_CALCULATIONS) + value = __calculate(inst, vidc_data); + else + value = msm_vidc_calc_bw_iris3_new(inst, vidc_data); return value; -} +} \ No newline at end of file diff --git a/msm_video/Kbuild b/msm_video/Kbuild index d9144613bc..611e95d82c 100644 --- a/msm_video/Kbuild +++ b/msm_video/Kbuild @@ -65,6 +65,8 @@ ifeq ($(CONFIG_MSM_VIDC_IRIS3), y) LINUXINCLUDE += -I$(VIDEO_DRIVER_ABS_PATH)/variant/iris3/inc msm_video-objs += $(VIDEO_DRIVER_REL_PATH)/variant/iris3/src/msm_vidc_buffer_iris3.o \ $(VIDEO_DRIVER_REL_PATH)/variant/iris3/src/msm_vidc_power_iris3.o \ + $(VIDEO_DRIVER_REL_PATH)/variant/iris3/src/msm_vidc_bus_iris3.o \ + $(VIDEO_DRIVER_REL_PATH)/variant/iris3/src/msm_vidc_clock_iris3.o \ $(VIDEO_DRIVER_REL_PATH)/variant/iris3/src/msm_vidc_iris3.o endif diff --git a/video/Kbuild b/video/Kbuild index 8f34e74bd6..624db117d3 100644 --- a/video/Kbuild +++ b/video/Kbuild @@ -27,6 +27,8 @@ ifeq ($(CONFIG_MSM_VIDC_IRIS3), y) LINUXINCLUDE += -I$(VIDEO_DRIVER_ABS_PATH)/variant/iris3/inc video-objs += $(VIDEO_DRIVER_REL_PATH)/variant/iris3/src/msm_vidc_buffer_iris3.o \ $(VIDEO_DRIVER_REL_PATH)/variant/iris3/src/msm_vidc_power_iris3.o \ + $(VIDEO_DRIVER_REL_PATH)/variant/iris3/src/msm_vidc_bus_iris3.o \ + $(VIDEO_DRIVER_REL_PATH)/variant/iris3/src/msm_vidc_clock_iris3.o \ $(VIDEO_DRIVER_REL_PATH)/variant/iris3/src/msm_vidc_iris3.o endif From 3e353fd5ffe8d05b08a68b5ec494bacc66635779 Mon Sep 17 00:00:00 2001 From: Vedang Nagar Date: Fri, 17 Feb 2023 18:53:48 +0530 Subject: [PATCH 0822/1061] video: driver: Move _clock_set_flag() implementation Move _clock_set_flag() function implementation from resource.c to resource_ext.c file. Change-Id: I4b977c7f840b94da578fcaac53b8fdc4bba86fca Signed-off-by: Vedang Nagar --- driver/vidc/src/resources.c | 23 ----------------------- driver/vidc/src/resources_ext.c | 23 +++++++++++++++++++++++ 2 files changed, 23 insertions(+), 23 deletions(-) diff --git a/driver/vidc/src/resources.c b/driver/vidc/src/resources.c index a8b8a16c14..09bacdf35f 100644 --- a/driver/vidc/src/resources.c +++ b/driver/vidc/src/resources.c @@ -574,28 +574,6 @@ static int __init_clocks(struct msm_vidc_core *core) return rc; } -static int __clock_set_flag(struct msm_vidc_core *core, - const char *name, enum branch_mem_flags flag) -{ - struct clock_info *cinfo = NULL; - bool found = false; - - /* get clock handle */ - venus_hfi_for_each_clock(core, cinfo) { - if (strcmp(cinfo->name, name)) - continue; - found = true; - qcom_clk_set_flags(cinfo->clk, flag); - d_vpr_h("%s: set flag %d on clock %s\n", __func__, flag, name); - break; - } - if (!found) { - d_vpr_e("%s: failed to find clock: %s\n", __func__, name); - return -EINVAL; - } - return 0; -} - static int __init_reset_clocks(struct msm_vidc_core *core) { const struct clk_rst_table *rst_tbl; @@ -1799,7 +1777,6 @@ static const struct msm_vidc_resources_ops res_ops = { .set_clks = __set_clocks, .clk_enable = __prepare_enable_clock, .clk_disable = __disable_unprepare_clock, - .clk_set_flag = __clock_set_flag, .clk_print_residency_stats = __print_clock_residency_stats, .clk_reset_residency_stats = __reset_clock_residency_stats, }; diff --git a/driver/vidc/src/resources_ext.c b/driver/vidc/src/resources_ext.c index f500e75e74..bcd5cca7aa 100644 --- a/driver/vidc/src/resources_ext.c +++ b/driver/vidc/src/resources_ext.c @@ -499,6 +499,28 @@ static int __set_clocks_ext(struct msm_vidc_core *core, u64 freq) return 0; } +static int __clock_set_flag_ext(struct msm_vidc_core *core, + const char *name, enum branch_mem_flags flag) +{ + struct clock_info *cinfo = NULL; + bool found = false; + + /* get clock handle */ + venus_hfi_for_each_clock(core, cinfo) { + if (strcmp(cinfo->name, name)) + continue; + found = true; + qcom_clk_set_flags(cinfo->clk, flag); + d_vpr_h("%s: set flag %d on clock %s\n", __func__, flag, name); + break; + } + if (!found) { + d_vpr_e("%s: failed to find clock: %s\n", __func__, name); + return -EINVAL; + } + return 0; +} + const struct msm_vidc_resources_ops *get_res_ops_ext(void) { const struct msm_vidc_resources_ops *res_ops = get_resources_ops(); @@ -511,6 +533,7 @@ const struct msm_vidc_resources_ops *get_res_ops_ext(void) res_ops_ext.gdsc_hw_ctrl = __hand_off_regulators; res_ops_ext.gdsc_sw_ctrl = __acquire_regulators; res_ops_ext.set_clks = __set_clocks_ext; + res_ops_ext.clk_set_flag = __clock_set_flag_ext; return &res_ops_ext; } From e96ab4ac795abed527beba82aa34a122ac1ee039 Mon Sep 17 00:00:00 2001 From: Ankush Mitra Date: Thu, 16 Feb 2023 19:42:47 +0530 Subject: [PATCH 0823/1061] video: driver: set PM_SUSPEND in power collapsed state Set substate PM_SUSPEND even if video core was already power collapsed. Change-Id: I15740d8e44fe89c6b34c0412dca1064539cdac35 Signed-off-by: Ankush Mitra --- driver/vidc/inc/msm_vidc_driver.h | 2 +- driver/vidc/src/msm_vidc_driver.c | 10 +++++----- driver/vidc/src/msm_vidc_probe.c | 12 +++++++++--- 3 files changed, 15 insertions(+), 9 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 931a2bcc2f..9458225c8b 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -499,7 +499,7 @@ bool msm_vidc_allow_streamon(struct msm_vidc_inst *inst, u32 type); enum msm_vidc_allow msm_vidc_allow_input_psc(struct msm_vidc_inst *inst); bool msm_vidc_allow_drain_last_flag(struct msm_vidc_inst *inst); bool msm_vidc_allow_psc_last_flag(struct msm_vidc_inst *inst); -bool msm_vidc_allow_pm_suspend(struct msm_vidc_core *core); +enum msm_vidc_allow msm_vidc_allow_pm_suspend(struct msm_vidc_core *core); int msm_vidc_state_change_streamon(struct msm_vidc_inst *inst, u32 type); int msm_vidc_state_change_streamoff(struct msm_vidc_inst *inst, u32 type); int msm_vidc_state_change_input_psc(struct msm_vidc_inst *inst); diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 73e461436a..a2745b1fb8 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -1285,27 +1285,27 @@ bool msm_vidc_allow_psc_last_flag(struct msm_vidc_inst *inst) return false; } -bool msm_vidc_allow_pm_suspend(struct msm_vidc_core *core) +enum msm_vidc_allow msm_vidc_allow_pm_suspend(struct msm_vidc_core *core) { if (!core) { d_vpr_e("%s: invalid param\n", __func__); - return false; + return MSM_VIDC_DISALLOW; } /* core must be in valid state to do pm_suspend */ if (!core_in_valid_state(core)) { d_vpr_e("%s: invalid core state %s\n", __func__, core_state_name(core->state)); - return false; + return MSM_VIDC_DISALLOW; } /* check if power is enabled */ if (!is_core_sub_state(core, CORE_SUBSTATE_POWER_ENABLE)) { d_vpr_e("%s: Power already disabled\n", __func__); - return false; + return MSM_VIDC_IGNORE; } - return true; + return MSM_VIDC_ALLOW; } bool is_hevc_10bit_decode_session(struct msm_vidc_inst *inst) diff --git a/driver/vidc/src/msm_vidc_probe.c b/driver/vidc/src/msm_vidc_probe.c index bd8d863dfd..92cb939175 100644 --- a/driver/vidc/src/msm_vidc_probe.c +++ b/driver/vidc/src/msm_vidc_probe.c @@ -863,7 +863,7 @@ static int msm_vidc_pm_suspend(struct device *dev) { int rc = 0; struct msm_vidc_core *core; - bool allow = false; + enum msm_vidc_allow allow = MSM_VIDC_DISALLOW; /* * Bail out if @@ -882,8 +882,14 @@ static int msm_vidc_pm_suspend(struct device *dev) core_lock(core, __func__); allow = msm_vidc_allow_pm_suspend(core); - if (!allow) { - d_vpr_e("%s: pm suspend not allowed\n", __func__); + + if (allow == MSM_VIDC_IGNORE) { + d_vpr_h("%s: pm already suspended\n", __func__); + msm_vidc_change_core_sub_state(core, 0, CORE_SUBSTATE_PM_SUSPEND, __func__); + rc = 0; + goto unlock; + } else if (allow != MSM_VIDC_ALLOW) { + d_vpr_h("%s: pm suspend not allowed\n", __func__); rc = 0; goto unlock; } From 3d18438cb0178d7b03e9330fceea8c6d8e22a226 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Fri, 17 Feb 2023 14:43:27 -0800 Subject: [PATCH 0824/1061] video: driver: fix blur parent check Blur pixel fmt parent check is specific to HEVC codec. Fix this to avoid session failure. Change-Id: I0323627383d56d1382e17f7a4b2cbb11edd6bf46 Signed-off-by: Akshata Sahukar --- driver/platform/common/src/msm_vidc_platform.c | 14 +++++++++++--- driver/platform/pineapple/src/msm_vidc_pineapple.c | 7 +------ 2 files changed, 12 insertions(+), 9 deletions(-) diff --git a/driver/platform/common/src/msm_vidc_platform.c b/driver/platform/common/src/msm_vidc_platform.c index 108a4873e6..09ee2c7caf 100644 --- a/driver/platform/common/src/msm_vidc_platform.c +++ b/driver/platform/common/src/msm_vidc_platform.c @@ -2029,8 +2029,6 @@ int msm_vidc_adjust_blur_type(void *instance, struct v4l2_ctrl *ctrl) if (msm_vidc_get_parent_value(inst, BLUR_TYPES, BITRATE_MODE, &rc_type, __func__) || - msm_vidc_get_parent_value(inst, BLUR_TYPES, PIX_FMTS, - &pix_fmts, __func__) || msm_vidc_get_parent_value(inst, BLUR_TYPES, MIN_QUALITY, &min_quality, __func__) || msm_vidc_get_parent_value(inst, BLUR_TYPES, META_ROI_INFO, @@ -2045,11 +2043,21 @@ int msm_vidc_adjust_blur_type(void *instance, struct v4l2_ctrl *ctrl) (rc_type != HFI_RC_VBR_CFR && rc_type != HFI_RC_CBR_CFR && rc_type != HFI_RC_CBR_VFR) || - is_10bit_colorformat(pix_fmts) || roi_enable) { + roi_enable) { adjusted_value = MSM_VIDC_BLUR_NONE; + goto exit; + } + + if (inst->codec == MSM_VIDC_HEVC) { + if (msm_vidc_get_parent_value(inst, BLUR_TYPES, PIX_FMTS, + &pix_fmts, __func__)) + return -EINVAL; + if (is_10bit_colorformat(pix_fmts)) + adjusted_value = MSM_VIDC_BLUR_NONE; } } +exit: msm_vidc_update_cap_value(inst, BLUR_TYPES, adjusted_value, __func__); diff --git a/driver/platform/pineapple/src/msm_vidc_pineapple.c b/driver/platform/pineapple/src/msm_vidc_pineapple.c index f1eb56eaea..a20dfdce48 100644 --- a/driver/platform/pineapple/src/msm_vidc_pineapple.c +++ b/driver/platform/pineapple/src/msm_vidc_pineapple.c @@ -2194,12 +2194,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine msm_vidc_adjust_bitrate_boost_iris33, msm_vidc_set_vbr_related_properties}, - {MIN_QUALITY, ENC, H264, - {BLUR_TYPES}, - msm_vidc_adjust_min_quality, - msm_vidc_set_u32}, - - {MIN_QUALITY, ENC, HEVC, + {MIN_QUALITY, ENC, H264 | HEVC, {BLUR_TYPES}, msm_vidc_adjust_min_quality, msm_vidc_set_u32}, From c3c85e9653a3660c964df52067750df03138255a Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Thu, 9 Feb 2023 15:13:41 +0530 Subject: [PATCH 0825/1061] video: driver: remove config dependencies remove all conditional compilation in video driver. With this change, all files willbe always compiled and will be available in final kernel object file. Change-Id: I9843c246e23bd1ee4fb8918e5cfa840e2defd432 Signed-off-by: Govindaraj Rajagopal --- config/anorak_video.conf | 2 - config/anorak_video.h | 8 - config/kalama_video.conf | 1 - config/kalama_video.h | 1 - config/pineapple_video.conf | 1 - config/pineapple_video.h | 1 - config/waipio_video.conf | 2 - config/waipio_video.h | 8 - driver/platform/anorak/inc/msm_vidc_anorak.h | 27 - driver/platform/anorak/src/msm_vidc_anorak.c | 2435 ----------------- .../platform/common/inc/msm_vidc_platform.h | 10 +- .../platform/common/src/msm_vidc_platform.c | 284 +- driver/platform/kalama/inc/msm_vidc_kalama.h | 8 +- driver/platform/kalama/src/kalama.c | 1694 ------------ driver/platform/kalama/src/msm_vidc_kalama.c | 13 +- .../pineapple/inc/msm_vidc_pineapple.h | 8 +- .../pineapple/src/msm_vidc_pineapple.c | 13 +- driver/platform/pineapple/src/pineapple.c | 88 +- driver/platform/waipio/inc/msm_vidc_waipio.h | 10 +- driver/platform/waipio/src/msm_vidc_waipio.c | 2172 --------------- driver/platform/waipio/src/waipio.c | 8 +- driver/variant/iris2/inc/msm_vidc_iris2.h | 2 +- driver/variant/iris3/inc/msm_vidc_iris3.h | 2 +- driver/variant/iris33/inc/msm_vidc_iris33.h | 2 +- driver/vidc/src/resources.c | 2 +- msm_video/Kbuild | 91 +- video/Kbuild | 49 +- 27 files changed, 239 insertions(+), 6703 deletions(-) delete mode 100644 config/anorak_video.conf delete mode 100644 config/anorak_video.h delete mode 100644 config/waipio_video.conf delete mode 100644 config/waipio_video.h delete mode 100644 driver/platform/anorak/inc/msm_vidc_anorak.h delete mode 100644 driver/platform/anorak/src/msm_vidc_anorak.c delete mode 100644 driver/platform/kalama/src/kalama.c delete mode 100644 driver/platform/waipio/src/msm_vidc_waipio.c diff --git a/config/anorak_video.conf b/config/anorak_video.conf deleted file mode 100644 index c71011602e..0000000000 --- a/config/anorak_video.conf +++ /dev/null @@ -1,2 +0,0 @@ -export CONFIG_MSM_VIDC_ANORAK=y -export CONFIG_MSM_VIDC_IRIS3=y diff --git a/config/anorak_video.h b/config/anorak_video.h deleted file mode 100644 index f8d5462491..0000000000 --- a/config/anorak_video.h +++ /dev/null @@ -1,8 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. - * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved. - */ - -#define CONFIG_MSM_VIDC_IRIS3 1 -#define CONFIG_MSM_VIDC_ANORAK 1 diff --git a/config/kalama_video.conf b/config/kalama_video.conf index 311ddbf314..545bba0e96 100644 --- a/config/kalama_video.conf +++ b/config/kalama_video.conf @@ -1,2 +1 @@ export CONFIG_MSM_VIDC_KALAMA=y -export CONFIG_MSM_VIDC_IRIS3=y diff --git a/config/kalama_video.h b/config/kalama_video.h index 9e06036401..f5665b1f85 100644 --- a/config/kalama_video.h +++ b/config/kalama_video.h @@ -4,5 +4,4 @@ * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved. */ -#define CONFIG_MSM_VIDC_IRIS3 1 #define CONFIG_MSM_VIDC_KALAMA 1 diff --git a/config/pineapple_video.conf b/config/pineapple_video.conf index 176e5533a6..c5ccde9008 100644 --- a/config/pineapple_video.conf +++ b/config/pineapple_video.conf @@ -1,2 +1 @@ export CONFIG_MSM_VIDC_PINEAPPLE=y -export CONFIG_MSM_VIDC_IRIS33=y diff --git a/config/pineapple_video.h b/config/pineapple_video.h index ba96436124..62e7ebd927 100644 --- a/config/pineapple_video.h +++ b/config/pineapple_video.h @@ -4,5 +4,4 @@ * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. */ -#define CONFIG_MSM_VIDC_IRIS33 1 #define CONFIG_MSM_VIDC_PINEAPPLE 1 diff --git a/config/waipio_video.conf b/config/waipio_video.conf deleted file mode 100644 index 227440fb21..0000000000 --- a/config/waipio_video.conf +++ /dev/null @@ -1,2 +0,0 @@ -export CONFIG_MSM_VIDC_WAIPIO=y -export CONFIG_MSM_VIDC_IRIS2=y diff --git a/config/waipio_video.h b/config/waipio_video.h deleted file mode 100644 index 90d0f22c07..0000000000 --- a/config/waipio_video.h +++ /dev/null @@ -1,8 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. - * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. - */ - -#define CONFIG_MSM_VIDC_IRIS2 1 -#define CONFIG_MSM_VIDC_WAIPIO 1 diff --git a/driver/platform/anorak/inc/msm_vidc_anorak.h b/driver/platform/anorak/inc/msm_vidc_anorak.h deleted file mode 100644 index 1189292321..0000000000 --- a/driver/platform/anorak/inc/msm_vidc_anorak.h +++ /dev/null @@ -1,27 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. - * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved. - */ - -#ifndef _MSM_VIDC_ANORAK_H_ -#define _MSM_VIDC_ANORAK_H_ - -#include "msm_vidc_core.h" - -#if defined(CONFIG_MSM_VIDC_ANORAK) -int msm_vidc_init_platform_anorak(struct msm_vidc_core *core, struct device *dev); -int msm_vidc_deinit_platform_anorak(struct msm_vidc_core *core, struct device *dev); -#else -int msm_vidc_init_platform_anorak(struct msm_vidc_core *core, struct device *dev) -{ - return -EINVAL; -} - -int msm_vidc_deinit_platform_anorak(struct msm_vidc_core *core, struct device *dev) -{ - return -EINVAL; -} -#endif - -#endif // _MSM_VIDC_ANORAK_H_ diff --git a/driver/platform/anorak/src/msm_vidc_anorak.c b/driver/platform/anorak/src/msm_vidc_anorak.c deleted file mode 100644 index 2d47824a29..0000000000 --- a/driver/platform/anorak/src/msm_vidc_anorak.c +++ /dev/null @@ -1,2435 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. - * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved. - */ - -#include -#include - -#include -#include - -#include -#include "msm_vidc_anorak.h" -#include "msm_vidc_platform.h" -#include "msm_vidc_debug.h" -#include "msm_vidc_internal.h" -#include "msm_vidc_control_ext.h" -#include "msm_vidc_iris3.h" -#include "hfi_property.h" -#include "hfi_command.h" - -#define DEFAULT_VIDEO_CONCEAL_COLOR_BLACK 0x8020010 -#define MAX_BASE_LAYER_PRIORITY_ID 63 -#define MAX_OP_POINT 31 -#define MAX_BITRATE 220000000 -#define DEFAULT_BITRATE 20000000 -#define MINIMUM_FPS 1 -#define MAXIMUM_FPS 480 -#define MAX_QP 51 -#define DEFAULT_QP 20 -#define MAX_CONSTANT_QUALITY 100 -#define MIN_SLICE_BYTE_SIZE 512 -#define MAX_SLICE_BYTE_SIZE \ - ((MAX_BITRATE) >> 3) -#define MAX_SLICE_MB_SIZE \ - (((4096 + 15) >> 4) * ((2304 + 15) >> 4)) - -#define ENC MSM_VIDC_ENCODER -#define DEC MSM_VIDC_DECODER -#define H264 MSM_VIDC_H264 -#define HEVC MSM_VIDC_HEVC -#define VP9 MSM_VIDC_VP9 -#define AV1 MSM_VIDC_AV1 -#define HEIC MSM_VIDC_HEIC -#define CODECS_ALL (H264 | HEVC | VP9 | HEIC | AV1) -#define MAXIMUM_OVERRIDE_VP9_FPS 200 - -static struct msm_platform_core_capability core_data_anorak[] = { - /* {type, value} */ - {ENC_CODECS, H264|HEVC|HEIC}, - {DEC_CODECS, H264|HEVC|VP9|AV1|HEIC}, - {MAX_SESSION_COUNT, 16}, - {MAX_NUM_720P_SESSIONS, 16}, - {MAX_NUM_1080P_SESSIONS, 16}, - {MAX_NUM_4K_SESSIONS, 8}, - {MAX_NUM_8K_SESSIONS, 2}, - {MAX_SECURE_SESSION_COUNT, 3}, - {MAX_RT_MBPF, 174080}, /* (8192x4352)/256 + (4096x2176)/256*/ - {MAX_MBPF, 278528}, /* ((8192x4352)/256) * 2 */ - {MAX_MBPS, 7833600}, /* max_load - * 7680x4320@60fps or 3840x2176@240fps - * which is greater than 4096x2176@120fps, - * 8192x4320@48fps - */ - {MAX_IMAGE_MBPF, 1048576}, /* (16384x16384)/256 */ - {MAX_MBPF_HQ, 8160}, /* ((1920x1088)/256) */ - {MAX_MBPS_HQ, 489600}, /* ((1920x1088)/256)@60fps */ - {MAX_MBPF_B_FRAME, 32640}, /* 3840x2176/256 */ - {MAX_MBPS_B_FRAME, 1958400}, /* 3840x2176/256 MBs@60fps */ - {MAX_MBPS_ALL_INTRA, 1044480}, /* 4096x2176/256 MBs@30fps */ - {MAX_ENH_LAYER_COUNT, 5}, - {NUM_VPP_PIPE, 4}, - {SW_PC, 1}, - {FW_UNLOAD, 0}, - {HW_RESPONSE_TIMEOUT, HW_RESPONSE_TIMEOUT_VALUE}, /* 1000 ms */ - {SW_PC_DELAY, SW_PC_DELAY_VALUE }, /* 1500 ms (>HW_RESPONSE_TIMEOUT)*/ - {FW_UNLOAD_DELAY, FW_UNLOAD_DELAY_VALUE }, /* 3000 ms (>SW_PC_DELAY)*/ - {PAGEFAULT_NON_FATAL, 1}, - {PAGETABLE_CACHING, 0}, - {DCVS, 1}, - {DECODE_BATCH, 1}, - {DECODE_BATCH_TIMEOUT, 200}, - {STATS_TIMEOUT_MS, 2000}, - {AV_SYNC_WINDOW_SIZE, 40}, - {NON_FATAL_FAULTS, 1}, - {ENC_AUTO_FRAMERATE, 1}, - {DEVICE_CAPS, V4L2_CAP_VIDEO_M2M_MPLANE | V4L2_CAP_META_CAPTURE | - V4L2_CAP_STREAMING}, - {SUPPORTS_REQUESTS, 1}, -}; - -static struct msm_platform_inst_capability instance_cap_data_anorak[] = { - /* {cap, domain, codec, - * min, max, step_or_mask, value, - * v4l2_id, - * hfi_id, - * flags} - */ - - {FRAME_WIDTH, DEC, CODECS_ALL, 96, 8192, 1, 1920}, - - {FRAME_WIDTH, DEC, VP9, 96, 4096, 1, 1920}, - - {FRAME_WIDTH, ENC, CODECS_ALL, 128, 8192, 1, 1920}, - - {FRAME_WIDTH, ENC, HEVC, 96, 8192, 1, 1920}, - - {FRAME_WIDTH, ENC, HEIC, 128, 16384, 1, 16384}, - - {LOSSLESS_FRAME_WIDTH, ENC, CODECS_ALL, 128, 4096, 1, 1920}, - - {LOSSLESS_FRAME_WIDTH, ENC, HEVC, 96, 4096, 1, 1920}, - - {SECURE_FRAME_WIDTH, DEC, CODECS_ALL, 96, 4096, 1, 1920}, - - {SECURE_FRAME_WIDTH, ENC, CODECS_ALL, 128, 4096, 1, 1920}, - - {SECURE_FRAME_WIDTH, ENC, HEVC, 96, 4096, 1, 1920}, - - {FRAME_HEIGHT, DEC, CODECS_ALL, 96, 8192, 1, 1080}, - - {FRAME_HEIGHT, DEC, VP9, 96, 4096, 1, 1080}, - - {FRAME_HEIGHT, ENC, CODECS_ALL, 128, 8192, 1, 1080}, - - {FRAME_HEIGHT, ENC, HEVC, 96, 8192, 1, 1080}, - - {FRAME_HEIGHT, ENC, HEIC, 128, 16384, 1, 16384}, - - {LOSSLESS_FRAME_HEIGHT, ENC, CODECS_ALL, 128, 4096, 1, 1080}, - - {LOSSLESS_FRAME_HEIGHT, ENC, HEVC, 96, 4096, 1, 1080}, - - {SECURE_FRAME_HEIGHT, DEC, CODECS_ALL, 96, 4096, 1, 1080}, - - {SECURE_FRAME_HEIGHT, ENC, CODECS_ALL, 128, 4096, 1, 1080}, - - {SECURE_FRAME_HEIGHT, ENC, HEVC, 96, 4096, 1, 1080}, - - {PIX_FMTS, ENC|DEC, H264, - MSM_VIDC_FMT_NV12, - MSM_VIDC_FMT_NV12C, - MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C, - MSM_VIDC_FMT_NV12C}, - - {PIX_FMTS, ENC|DEC, HEVC|VP9|AV1, - MSM_VIDC_FMT_NV12, - MSM_VIDC_FMT_TP10C, - MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C | - MSM_VIDC_FMT_P010 | MSM_VIDC_FMT_TP10C, - MSM_VIDC_FMT_NV12C}, - - {PIX_FMTS, ENC, HEIC, - MSM_VIDC_FMT_NV12, - MSM_VIDC_FMT_P010, - MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_P010, - MSM_VIDC_FMT_NV12}, - - {PIX_FMTS, DEC, HEIC, - MSM_VIDC_FMT_NV12, - MSM_VIDC_FMT_TP10C, - MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C | - MSM_VIDC_FMT_P010 | MSM_VIDC_FMT_TP10C, - MSM_VIDC_FMT_NV12C}, - - {MIN_BUFFERS_INPUT, ENC|DEC, CODECS_ALL, 0, 64, 1, 4, - V4L2_CID_MIN_BUFFERS_FOR_OUTPUT}, - - {MIN_BUFFERS_INPUT, ENC|DEC, HEIC, 0, 64, 1, 1, - V4L2_CID_MIN_BUFFERS_FOR_OUTPUT}, - - {MIN_BUFFERS_OUTPUT, ENC|DEC, CODECS_ALL, - 0, 64, 1, 4, - V4L2_CID_MIN_BUFFERS_FOR_CAPTURE, - HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT, - CAP_FLAG_OUTPUT_PORT}, - - /* (8192 * 4320) / 256 */ - {MBPF, ENC, CODECS_ALL, 64, 138240, 1, 138240}, - - {MBPF, ENC, HEVC, 36, 138240, 1, 138240}, - - /* ((16384x16384)/256) */ - {MBPF, ENC, HEIC, 36, 1048576, 1, 1048576}, - - {MBPF, DEC, CODECS_ALL, 36, 138240, 1, 138240}, - - /* (4096 * 2304) / 256 */ - {MBPF, DEC, VP9, 36, 36864, 1, 36864}, - - /* ((8192x8192)/256) */ - {MBPF, DEC, HEIC, 64, 262144, 1, 262144 }, - - /* (4096 * 2304) / 256 */ - {LOSSLESS_MBPF, ENC, H264|HEVC, 64, 36864, 1, 36864}, - - /* Batch Mode Decode */ - /* TODO: update with new values based on updated voltage corner */ - {BATCH_MBPF, DEC, H264|HEVC|VP9|AV1, 64, 34816, 1, 34816}, - - /* (4096 * 2304) / 256 */ - {BATCH_FPS, DEC, H264|HEVC|VP9|AV1, 1, 120, 1, 120}, - - {SECURE_MBPF, ENC|DEC, H264|HEVC|VP9|AV1, 64, 36864, 1, 36864}, - - {SECURE_MBPF, ENC, HEVC, 36, 36864, 1, 36864}, - - {FRAME_RATE, ENC, CODECS_ALL, - (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), - 1, (DEFAULT_FPS << 16), - 0, - HFI_PROP_FRAME_RATE, - CAP_FLAG_OUTPUT_PORT}, - - {FRAME_RATE, ENC, HEIC, - (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), - 1, (MINIMUM_FPS << 16), - 0, - HFI_PROP_FRAME_RATE, - CAP_FLAG_OUTPUT_PORT}, - - {FRAME_RATE, DEC, CODECS_ALL, - (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), - 1, (DEFAULT_FPS << 16), - V4L2_CID_MPEG_VIDC_FRAME_RATE, - 0, - CAP_FLAG_OUTPUT_PORT | - CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - - {FRAME_RATE, DEC, VP9, - (MINIMUM_FPS << 16), (MAXIMUM_OVERRIDE_VP9_FPS << 16), - 1, (DEFAULT_FPS << 16), - V4L2_CID_MPEG_VIDC_FRAME_RATE, - 0, - CAP_FLAG_OUTPUT_PORT | - CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - - {OPERATING_RATE, ENC, CODECS_ALL, - (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), - 1, (DEFAULT_FPS << 16)}, - - {OPERATING_RATE, DEC, CODECS_ALL, - (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), - 1, (DEFAULT_FPS << 16), - V4L2_CID_MPEG_VIDC_OPERATING_RATE, - 0, - CAP_FLAG_OUTPUT_PORT | - CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - - {OPERATING_RATE, DEC, VP9, - (MINIMUM_FPS << 16), (MAXIMUM_OVERRIDE_VP9_FPS << 16), - 1, (DEFAULT_FPS << 16), - V4L2_CID_MPEG_VIDC_OPERATING_RATE, - 0, - CAP_FLAG_OUTPUT_PORT | - CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - - {INPUT_RATE, ENC|DEC, CODECS_ALL, - (MINIMUM_FPS << 16), INT_MAX, - 1, (DEFAULT_FPS << 16)}, - - {TIMESTAMP_RATE, ENC|DEC, CODECS_ALL, - (MINIMUM_FPS << 16), INT_MAX, - 1, (DEFAULT_FPS << 16)}, - - {SCALE_FACTOR, ENC, H264|HEVC, 1, 8, 1, 8}, - - {MB_CYCLES_VSP, ENC, CODECS_ALL, 25, 25, 1, 25}, - - {MB_CYCLES_VSP, DEC, CODECS_ALL, 25, 25, 1, 25}, - - {MB_CYCLES_VSP, DEC, VP9|AV1, 60, 60, 1, 60}, - - {MB_CYCLES_VPP, ENC, CODECS_ALL, 675, 675, 1, 675}, - - {MB_CYCLES_VPP, DEC, CODECS_ALL, 200, 200, 1, 200}, - - {MB_CYCLES_LP, ENC, CODECS_ALL, 320, 320, 1, 320}, - - {MB_CYCLES_LP, DEC, CODECS_ALL, 200, 200, 1, 200}, - - {MB_CYCLES_FW, ENC|DEC, CODECS_ALL, 489583, 489583, 1, 489583}, - - {MB_CYCLES_FW_VPP, ENC, CODECS_ALL, 48405, 48405, 1, 48405}, - - {MB_CYCLES_FW_VPP, DEC, CODECS_ALL, 66234, 66234, 1, 66234}, - - {CLIENT_ID, ENC|DEC, CODECS_ALL, - INVALID_CLIENT_ID, INT_MAX, 1, INVALID_CLIENT_ID, - V4L2_CID_MPEG_VIDC_CLIENT_ID}, - - {SECURE_MODE, ENC|DEC, H264|HEVC|VP9|AV1, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_SECURE, - HFI_PROP_SECURE, - CAP_FLAG_NONE}, - - /* - * Client will enable V4L2_CID_MPEG_VIDC_METADATA_OUTBUF_FENCE - * to get fence_id in input metadata buffer done. - */ - {META_OUTBUF_FENCE, DEC, H264|HEVC|VP9|AV1, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_INPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_OUTBUF_FENCE, - HFI_PROP_FENCE, - CAP_FLAG_BITMASK | CAP_FLAG_META}, - - /* - * Client to do set_ctrl with FENCE_ID to set fence_id - * and then client will do get_ctrl with FENCE_FD to get - * fence_fd corresponding to client set fence_id. - */ - {FENCE_ID, DEC, CODECS_ALL, - 0, INT_MAX, 1, 0, - V4L2_CID_MPEG_VIDC_SW_FENCE_ID, - 0, - CAP_FLAG_DYNAMIC_ALLOWED | CAP_FLAG_OUTPUT_PORT}, - - {FENCE_FD, DEC, CODECS_ALL, - INVALID_FD, INT_MAX, 1, INVALID_FD, - V4L2_CID_MPEG_VIDC_SW_FENCE_FD}, - - {TS_REORDER, DEC, H264|HEVC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_TS_REORDER}, - - {HFLIP, ENC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_HFLIP, - HFI_PROP_FLIP, - CAP_FLAG_OUTPUT_PORT | - CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - - {VFLIP, ENC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_VFLIP, - HFI_PROP_FLIP, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {ROTATION, ENC, CODECS_ALL, - 0, 270, 90, 0, - V4L2_CID_ROTATE, - HFI_PROP_ROTATION, - CAP_FLAG_OUTPUT_PORT}, - - {SUPER_FRAME, ENC, H264|HEVC, - 0, 32, 1, 0, - V4L2_CID_MPEG_VIDC_SUPERFRAME, 0, - CAP_FLAG_NONE}, - - {SLICE_DECODE, DEC, H264|HEVC|AV1, - V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_MPEG_MSM_VIDC_ENABLE, - 1, - V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDEO_DECODER_SLICE_INTERFACE, - HFI_PROP_SLICE_DECODE, - CAP_FLAG_INPUT_PORT}, - - {HEADER_MODE, ENC, CODECS_ALL, - V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE, - V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME, - BIT(V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE) | - BIT(V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME), - V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE, - V4L2_CID_MPEG_VIDEO_HEADER_MODE, - HFI_PROP_SEQ_HEADER_MODE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {PREPEND_SPSPPS_TO_IDR, ENC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDEO_PREPEND_SPSPPS_TO_IDR}, - - {VUI_TIMING_INFO, ENC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_VUI_TIMING_INFO, - HFI_PROP_DISABLE_VUI_TIMING_INFO, - CAP_FLAG_OUTPUT_PORT}, - - {WITHOUT_STARTCODE, ENC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE, - HFI_PROP_NAL_LENGTH_FIELD, - CAP_FLAG_OUTPUT_PORT}, - - {WITHOUT_STARTCODE, DEC, AV1, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_DISABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE, - HFI_PROP_NAL_LENGTH_FIELD, - CAP_FLAG_INPUT_PORT}, - - {NAL_LENGTH_FIELD, ENC, CODECS_ALL, - V4L2_MPEG_VIDEO_HEVC_SIZE_0, - V4L2_MPEG_VIDEO_HEVC_SIZE_4, - BIT(V4L2_MPEG_VIDEO_HEVC_SIZE_0) | - BIT(V4L2_MPEG_VIDEO_HEVC_SIZE_4), - V4L2_MPEG_VIDEO_HEVC_SIZE_0, - V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD, - HFI_PROP_NAL_LENGTH_FIELD, - CAP_FLAG_MENU | CAP_FLAG_OUTPUT_PORT}, - - /* TODO: Firmware introduced enumeration type for this - * with and without seq header. - */ - {REQUEST_I_FRAME, ENC, H264|HEVC, - 0, 0, 0, 0, - V4L2_CID_MPEG_VIDEO_FORCE_KEY_FRAME, - HFI_PROP_REQUEST_SYNC_FRAME, - CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - - /* Enc: Keeping CABAC and CAVLC as same bitrate. - * Dec: there's no use of Bitrate cap - */ - {BIT_RATE, ENC, H264|HEVC, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_BITRATE, - HFI_PROP_TOTAL_BITRATE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {BITRATE_MODE, ENC, H264, - V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, - V4L2_MPEG_VIDEO_BITRATE_MODE_CBR, - BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_VBR) | - BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CBR), - V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, - V4L2_CID_MPEG_VIDEO_BITRATE_MODE, - HFI_PROP_RATE_CONTROL, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {BITRATE_MODE, ENC, HEVC, - V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, - V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, - BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_VBR) | - BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CBR) | - BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CQ), - V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, - V4L2_CID_MPEG_VIDEO_BITRATE_MODE, - HFI_PROP_RATE_CONTROL, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {BITRATE_MODE, ENC, HEIC, - V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, - V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, - BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CQ), - V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, - V4L2_CID_MPEG_VIDEO_BITRATE_MODE, - HFI_PROP_RATE_CONTROL, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {CABAC_MAX_BITRATE, ENC, H264|HEVC, 0, - 160000000, 1, 160000000}, - - {CAVLC_MAX_BITRATE, ENC, H264, 0, - 220000000, 1, 220000000}, - - {ALLINTRA_MAX_BITRATE, ENC, H264|HEVC, 0, - 220000000, 1, 220000000}, - - {LOWLATENCY_MAX_BITRATE, ENC, H264|HEVC, 0, - 70000000, 1, 70000000}, - - {NUM_COMV, DEC, CODECS_ALL, - 0, INT_MAX, 1, 0}, - - {LOSSLESS, ENC, HEVC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU}, - - {FRAME_SKIP_MODE, ENC, H264|HEVC|HEIC, - V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED, - V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT, - BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED) | - BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_LEVEL_LIMIT) | - BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT), - V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED, - V4L2_CID_MPEG_VIDEO_FRAME_SKIP_MODE, - 0, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {FRAME_RC_ENABLE, ENC, H264|HEVC|HEIC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_ENABLE, - V4L2_CID_MPEG_VIDEO_FRAME_RC_ENABLE}, - - {CONSTANT_QUALITY, ENC, HEVC, - 1, MAX_CONSTANT_QUALITY, 1, 90, - V4L2_CID_MPEG_VIDEO_CONSTANT_QUALITY, - HFI_PROP_CONSTANT_QUALITY, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {CONSTANT_QUALITY, ENC, HEIC, - 1, MAX_CONSTANT_QUALITY, 1, 100, - V4L2_CID_MPEG_VIDEO_CONSTANT_QUALITY, - HFI_PROP_CONSTANT_QUALITY, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {GOP_SIZE, ENC, CODECS_ALL, - 0, INT_MAX, 1, 2 * DEFAULT_FPS - 1, - V4L2_CID_MPEG_VIDEO_GOP_SIZE, - HFI_PROP_MAX_GOP_FRAMES, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {GOP_SIZE, ENC, HEIC, - 0, INT_MAX, 1, 0 /* all intra */, - V4L2_CID_MPEG_VIDEO_GOP_SIZE, - HFI_PROP_MAX_GOP_FRAMES, - CAP_FLAG_OUTPUT_PORT | - CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - - {GOP_CLOSURE, ENC, H264|HEVC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_ENABLE, - V4L2_CID_MPEG_VIDEO_GOP_CLOSURE, - 0}, - - {B_FRAME, ENC, H264|HEVC, - 0, 7, 1, 0, - V4L2_CID_MPEG_VIDEO_B_FRAMES, - HFI_PROP_MAX_B_FRAMES, - CAP_FLAG_OUTPUT_PORT}, - - {B_FRAME, ENC, HEIC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDEO_B_FRAMES, - HFI_PROP_MAX_B_FRAMES, - CAP_FLAG_OUTPUT_PORT}, - - {BLUR_TYPES, ENC, H264|HEVC, - VIDC_BLUR_NONE, VIDC_BLUR_EXTERNAL, - BIT(VIDC_BLUR_NONE) | BIT(VIDC_BLUR_EXTERNAL), - VIDC_BLUR_NONE, - V4L2_CID_MPEG_VIDC_VIDEO_BLUR_TYPES, - HFI_PROP_BLUR_TYPES, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {BLUR_RESOLUTION, ENC, H264|HEVC, - 0, S32_MAX, 1, 0, - V4L2_CID_MPEG_VIDC_VIDEO_BLUR_RESOLUTION, - HFI_PROP_BLUR_RESOLUTION, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {CSC, ENC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - 0, - HFI_PROP_CSC}, - - {CSC_CUSTOM_MATRIX, ENC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_VIDEO_VPE_CSC_CUSTOM_MATRIX, - HFI_PROP_CSC_MATRIX, - CAP_FLAG_OUTPUT_PORT}, - - {LOWLATENCY_MODE, ENC, H264|HEVC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_LOWLATENCY_REQUEST, - 0, - CAP_FLAG_NONE}, - - {LOWLATENCY_MODE, DEC, H264|HEVC|VP9|AV1, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_LOWLATENCY_REQUEST, - HFI_PROP_SEQ_CHANGE_AT_SYNC_FRAME, - CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - - {LTR_COUNT, ENC, H264|HEVC, - 0, MAX_LTR_FRAME_COUNT_2, 1, 0, - V4L2_CID_MPEG_VIDEO_LTR_COUNT, - HFI_PROP_LTR_COUNT, - CAP_FLAG_OUTPUT_PORT}, - - {USE_LTR, ENC, H264|HEVC, - INVALID_DEFAULT_MARK_OR_USE_LTR, - ((1 << MAX_LTR_FRAME_COUNT_2) - 1), - 1, INVALID_DEFAULT_MARK_OR_USE_LTR, - V4L2_CID_MPEG_VIDEO_USE_LTR_FRAMES, - HFI_PROP_LTR_USE, - CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - - {MARK_LTR, ENC, H264|HEVC, - INVALID_DEFAULT_MARK_OR_USE_LTR, - (MAX_LTR_FRAME_COUNT_2 - 1), - 1, INVALID_DEFAULT_MARK_OR_USE_LTR, - V4L2_CID_MPEG_VIDEO_FRAME_LTR_INDEX, - HFI_PROP_LTR_MARK, - CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - - {BASELAYER_PRIORITY, ENC, H264, - 0, MAX_BASE_LAYER_PRIORITY_ID, 1, 0, - V4L2_CID_MPEG_VIDEO_BASELAYER_PRIORITY_ID, - HFI_PROP_BASELAYER_PRIORITYID, - CAP_FLAG_OUTPUT_PORT}, - - {IR_TYPE, ENC, H264|HEVC, - V4L2_MPEG_VIDEO_VIDC_INTRA_REFRESH_RANDOM, - V4L2_MPEG_VIDEO_VIDC_INTRA_REFRESH_CYCLIC, - BIT(V4L2_MPEG_VIDEO_VIDC_INTRA_REFRESH_RANDOM) | - BIT(V4L2_MPEG_VIDEO_VIDC_INTRA_REFRESH_CYCLIC), - V4L2_MPEG_VIDEO_VIDC_INTRA_REFRESH_RANDOM, - V4L2_CID_MPEG_VIDEO_VIDC_INTRA_REFRESH_TYPE, - 0, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {IR_PERIOD, ENC, H264|HEVC, - 0, INT_MAX, 1, 0, - V4L2_CID_MPEG_VIDC_INTRA_REFRESH_PERIOD, - 0, - CAP_FLAG_INPUT_PORT | CAP_FLAG_OUTPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {AU_DELIMITER, ENC, H264|HEVC, - V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDEO_AU_DELIMITER, - HFI_PROP_AUD, - CAP_FLAG_OUTPUT_PORT}, - - {TIME_DELTA_BASED_RC, ENC, H264|HEVC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_ENABLE, - V4L2_CID_MPEG_VIDC_TIME_DELTA_BASED_RC, - HFI_PROP_TIME_DELTA_BASED_RATE_CONTROL, - CAP_FLAG_OUTPUT_PORT}, - - {TIME_DELTA_BASED_RC, ENC, HEIC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_TIME_DELTA_BASED_RC, - HFI_PROP_TIME_DELTA_BASED_RATE_CONTROL, - CAP_FLAG_OUTPUT_PORT}, - - {CONTENT_ADAPTIVE_CODING, ENC, H264|HEVC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_ENABLE, - V4L2_CID_MPEG_VIDC_CONTENT_ADAPTIVE_CODING, - HFI_PROP_CONTENT_ADAPTIVE_CODING, - CAP_FLAG_OUTPUT_PORT}, - - {REQUEST_PREPROCESS, ENC, H264|HEVC, - MSM_VIDC_PREPROCESS_NONE, - MSM_VIDC_PREPROCESS_TYPE0, - BIT(MSM_VIDC_PREPROCESS_NONE) | - BIT(MSM_VIDC_PREPROCESS_TYPE0), - MSM_VIDC_PREPROCESS_NONE, - 0, HFI_PROP_REQUEST_PREPROCESS, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {BITRATE_BOOST, ENC, H264|HEVC, - 0, MAX_BITRATE_BOOST, 25, MAX_BITRATE_BOOST, - V4L2_CID_MPEG_VIDC_QUALITY_BITRATE_BOOST, - HFI_PROP_BITRATE_BOOST, - CAP_FLAG_OUTPUT_PORT}, - - {MIN_QUALITY, ENC, H264|HEVC, - 0, MAX_SUPPORTED_MIN_QUALITY, 70, MAX_SUPPORTED_MIN_QUALITY, - 0, - HFI_PROP_MAINTAIN_MIN_QUALITY, - CAP_FLAG_OUTPUT_PORT}, - - {VBV_DELAY, ENC, H264|HEVC, - 200, 300, 100, 300, - V4L2_CID_MPEG_VIDEO_VBV_DELAY, - HFI_PROP_VBV_DELAY, - CAP_FLAG_OUTPUT_PORT}, - - {PEAK_BITRATE, ENC, H264|HEVC, - /* default peak bitrate is 10% larger than avg bitrate */ - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_BITRATE_PEAK, - HFI_PROP_TOTAL_PEAK_BITRATE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {MIN_FRAME_QP, ENC, H264, - MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, - V4L2_CID_MPEG_VIDEO_H264_MIN_QP, - HFI_PROP_MIN_QP_PACKED, - CAP_FLAG_OUTPUT_PORT}, - - {MIN_FRAME_QP, ENC, HEVC|HEIC, - MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, - V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP, - HFI_PROP_MIN_QP_PACKED, - CAP_FLAG_OUTPUT_PORT}, - - {I_FRAME_MIN_QP, ENC, H264, - MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, - V4L2_CID_MPEG_VIDEO_H264_I_FRAME_MIN_QP}, - - {I_FRAME_MIN_QP, ENC, HEVC|HEIC, - MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, - V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_MIN_QP}, - - {P_FRAME_MIN_QP, ENC, H264, - MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, - V4L2_CID_MPEG_VIDEO_H264_P_FRAME_MIN_QP}, - - {P_FRAME_MIN_QP, ENC, HEVC|HEIC, - MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, - V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_MIN_QP}, - - {B_FRAME_MIN_QP, ENC, H264, - MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, - V4L2_CID_MPEG_VIDEO_H264_B_FRAME_MIN_QP}, - - {B_FRAME_MIN_QP, ENC, HEVC|HEIC, - MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, - V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_MIN_QP}, - - {MAX_FRAME_QP, ENC, H264, - MIN_QP_8BIT, MAX_QP, 1, MAX_QP, - V4L2_CID_MPEG_VIDEO_H264_MAX_QP, - HFI_PROP_MAX_QP_PACKED, - CAP_FLAG_OUTPUT_PORT}, - - {MAX_FRAME_QP, ENC, HEVC|HEIC, - MIN_QP_10BIT, MAX_QP, 1, MAX_QP, - V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP, - HFI_PROP_MAX_QP_PACKED, - CAP_FLAG_OUTPUT_PORT}, - - {I_FRAME_MAX_QP, ENC, H264, - MIN_QP_8BIT, MAX_QP, 1, MAX_QP, - V4L2_CID_MPEG_VIDEO_H264_I_FRAME_MAX_QP}, - - {I_FRAME_MAX_QP, ENC, HEVC|HEIC, - MIN_QP_10BIT, MAX_QP, 1, MAX_QP, - V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_MAX_QP}, - - {P_FRAME_MAX_QP, ENC, H264, - MIN_QP_8BIT, MAX_QP, 1, MAX_QP, - V4L2_CID_MPEG_VIDEO_H264_P_FRAME_MAX_QP}, - - {P_FRAME_MAX_QP, ENC, HEVC|HEIC, - MIN_QP_10BIT, MAX_QP, 1, MAX_QP, - V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_MAX_QP}, - - {B_FRAME_MAX_QP, ENC, H264, - MIN_QP_8BIT, MAX_QP, 1, MAX_QP, - V4L2_CID_MPEG_VIDEO_H264_B_FRAME_MAX_QP}, - - {B_FRAME_MAX_QP, ENC, HEVC|HEIC, - MIN_QP_10BIT, MAX_QP, 1, MAX_QP, - V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_MAX_QP}, - - {I_FRAME_QP, ENC, HEVC, - MIN_QP_10BIT, MAX_QP, 1, DEFAULT_QP, - V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP, - HFI_PROP_QP_PACKED, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {I_FRAME_QP, ENC, H264, - MIN_QP_8BIT, MAX_QP, 1, DEFAULT_QP, - V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP, - HFI_PROP_QP_PACKED, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {P_FRAME_QP, ENC, HEVC, - MIN_QP_10BIT, MAX_QP, 1, DEFAULT_QP, - V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP, - HFI_PROP_QP_PACKED, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {P_FRAME_QP, ENC, H264, - MIN_QP_8BIT, MAX_QP, 1, DEFAULT_QP, - V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP, - HFI_PROP_QP_PACKED, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {B_FRAME_QP, ENC, HEVC, - MIN_QP_10BIT, MAX_QP, 1, DEFAULT_QP, - V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP, - HFI_PROP_QP_PACKED, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {B_FRAME_QP, ENC, H264, - MIN_QP_8BIT, MAX_QP, 1, DEFAULT_QP, - V4L2_CID_MPEG_VIDEO_H264_B_FRAME_QP, - HFI_PROP_QP_PACKED, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {LAYER_TYPE, ENC, HEVC, - V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B, - V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P, - BIT(V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B) | - BIT(V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P), - V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P, - V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE, - HFI_PROP_LAYER_ENCODING_TYPE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {LAYER_TYPE, ENC, H264, - V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_B, - V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P, - BIT(V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_B) | - BIT(V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P), - V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P, - V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_TYPE, - HFI_PROP_LAYER_ENCODING_TYPE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {LAYER_ENABLE, ENC, H264, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING, - HFI_PROP_LAYER_ENCODING_TYPE, - CAP_FLAG_OUTPUT_PORT}, - - {LAYER_ENABLE, ENC, HEVC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - 0, - 0, - CAP_FLAG_OUTPUT_PORT}, - - {ENH_LAYER_COUNT, ENC, HEVC, - 0, 5, 1, 0, - V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER, - HFI_PROP_LAYER_COUNT, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {ENH_LAYER_COUNT, ENC, H264, - 0, 5, 1, 0, - V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_LAYER, - HFI_PROP_LAYER_COUNT, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {ENH_LAYER_COUNT, DEC, AV1, - 0, MAX_OP_POINT, 1, 0, - 0, - HFI_PROP_AV1_OP_POINT, - CAP_FLAG_INPUT_PORT}, - - {L0_BR, ENC, H264, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L0_BR, - HFI_PROP_BITRATE_LAYER1, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {L0_BR, ENC, HEVC, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L0_BR, - HFI_PROP_BITRATE_LAYER1, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {L1_BR, ENC, H264, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L1_BR, - HFI_PROP_BITRATE_LAYER2, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {L1_BR, ENC, HEVC, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L1_BR, - HFI_PROP_BITRATE_LAYER2, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {L2_BR, ENC, H264, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L2_BR, - HFI_PROP_BITRATE_LAYER3, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {L2_BR, ENC, HEVC, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L2_BR, - HFI_PROP_BITRATE_LAYER3, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {L3_BR, ENC, H264, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L3_BR, - HFI_PROP_BITRATE_LAYER4, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - {L3_BR, ENC, HEVC, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L3_BR, - HFI_PROP_BITRATE_LAYER4, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {L4_BR, ENC, H264, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L4_BR, - HFI_PROP_BITRATE_LAYER5, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {L4_BR, ENC, HEVC, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L4_BR, - HFI_PROP_BITRATE_LAYER5, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {L5_BR, ENC, H264, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L5_BR, - HFI_PROP_BITRATE_LAYER6, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {L5_BR, ENC, HEVC, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L5_BR, - HFI_PROP_BITRATE_LAYER6, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {ENTROPY_MODE, ENC, H264, - V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC, - V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, - BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC) | - BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC), - V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, - V4L2_CID_MPEG_VIDEO_H264_ENTROPY_MODE, - HFI_PROP_CABAC_SESSION, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {ENTROPY_MODE, DEC, H264|HEVC|VP9|AV1, - V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC, - V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, - BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC) | - BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC), - V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, - 0, - HFI_PROP_CABAC_SESSION}, - - {PROFILE, ENC|DEC, H264, - V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE, - V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH, - BIT(V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE) | - BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH) | - BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_BASELINE) | - BIT(V4L2_MPEG_VIDEO_H264_PROFILE_MAIN) | - BIT(V4L2_MPEG_VIDEO_H264_PROFILE_HIGH), - V4L2_MPEG_VIDEO_H264_PROFILE_HIGH, - V4L2_CID_MPEG_VIDEO_H264_PROFILE, - HFI_PROP_PROFILE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {PROFILE, ENC|DEC, HEVC|HEIC, - V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN, - V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE, - BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN) | - BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE) | - BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10) | - BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE), - V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN, - V4L2_CID_MPEG_VIDEO_HEVC_PROFILE, - HFI_PROP_PROFILE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {PROFILE, DEC, VP9, - V4L2_MPEG_VIDEO_VP9_PROFILE_0, - V4L2_MPEG_VIDEO_VP9_PROFILE_2, - BIT(V4L2_MPEG_VIDEO_VP9_PROFILE_0) | - BIT(V4L2_MPEG_VIDEO_VP9_PROFILE_2), - V4L2_MPEG_VIDEO_VP9_PROFILE_0, - V4L2_CID_MPEG_VIDEO_VP9_PROFILE, - HFI_PROP_PROFILE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {PROFILE, DEC, AV1, - V4L2_MPEG_VIDEO_AV1_PROFILE_MAIN, - V4L2_MPEG_VIDEO_AV1_PROFILE_MAIN, - BIT(V4L2_MPEG_VIDEO_AV1_PROFILE_MAIN), - V4L2_MPEG_VIDEO_AV1_PROFILE_MAIN, - V4L2_CID_MPEG_VIDEO_AV1_PROFILE, - HFI_PROP_PROFILE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {LEVEL, ENC, H264, - V4L2_MPEG_VIDEO_H264_LEVEL_1_0, - V4L2_MPEG_VIDEO_H264_LEVEL_6_0, - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1B) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_3) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_0), - V4L2_MPEG_VIDEO_H264_LEVEL_5_0, - V4L2_CID_MPEG_VIDEO_H264_LEVEL, - HFI_PROP_LEVEL, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {LEVEL, ENC, HEVC|HEIC, - V4L2_MPEG_VIDEO_HEVC_LEVEL_1, - V4L2_MPEG_VIDEO_HEVC_LEVEL_6, - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6), - V4L2_MPEG_VIDEO_HEVC_LEVEL_5, - V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, - HFI_PROP_LEVEL, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {LEVEL, DEC, H264, - V4L2_MPEG_VIDEO_H264_LEVEL_1_0, - V4L2_MPEG_VIDEO_H264_LEVEL_6_2, - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1B) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_3) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_2), - V4L2_MPEG_VIDEO_H264_LEVEL_6_1, - V4L2_CID_MPEG_VIDEO_H264_LEVEL, - HFI_PROP_LEVEL, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {LEVEL, DEC, HEVC|HEIC, - V4L2_MPEG_VIDEO_HEVC_LEVEL_1, - V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2, - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1)| - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2), - V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1, - V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, - HFI_PROP_LEVEL, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {LEVEL, DEC, VP9, - V4L2_MPEG_VIDEO_VP9_LEVEL_1_0, - V4L2_MPEG_VIDEO_VP9_LEVEL_6_0, - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_1_0) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_1_1) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_2_0) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_2_1) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_3_0) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_3_1) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_4_0) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_4_1) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_0) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_1) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_2) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_6_0), - V4L2_MPEG_VIDEO_VP9_LEVEL_6_0, - V4L2_CID_MPEG_VIDEO_VP9_LEVEL, - HFI_PROP_LEVEL, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {LEVEL, DEC, AV1, - V4L2_MPEG_VIDEO_AV1_LEVEL_2_0, - V4L2_MPEG_VIDEO_AV1_LEVEL_6_1, - BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_2_0) | - BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_2_1) | - BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_2_2) | - BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_2_3) | - BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_3_0) | - BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_3_1) | - BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_3_2) | - BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_3_3) | - BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_4_0) | - BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_4_1) | - BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_4_2) | - BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_4_3) | - BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_5_0) | - BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_5_1) | - BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_5_2) | - BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_5_3) | - BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_6_0) | - BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_6_1), - V4L2_MPEG_VIDEO_AV1_LEVEL_6_1, - V4L2_CID_MPEG_VIDEO_AV1_LEVEL, - HFI_PROP_LEVEL, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {AV1_TIER, DEC, AV1, - V4L2_MPEG_VIDEO_AV1_TIER_MAIN, - V4L2_MPEG_VIDEO_AV1_TIER_HIGH, - BIT(V4L2_MPEG_VIDEO_AV1_TIER_MAIN) | - BIT(V4L2_MPEG_VIDEO_AV1_TIER_HIGH), - V4L2_MPEG_VIDEO_AV1_TIER_HIGH, - V4L2_CID_MPEG_VIDEO_AV1_TIER, - HFI_PROP_TIER, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {HEVC_TIER, ENC|DEC, HEVC, - V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, - V4L2_MPEG_VIDEO_HEVC_TIER_HIGH, - BIT(V4L2_MPEG_VIDEO_HEVC_TIER_MAIN) | - BIT(V4L2_MPEG_VIDEO_HEVC_TIER_HIGH), - V4L2_MPEG_VIDEO_HEVC_TIER_HIGH, - V4L2_CID_MPEG_VIDEO_HEVC_TIER, - HFI_PROP_TIER, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {HEVC_TIER, ENC|DEC, HEIC, - V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, - V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, - BIT(V4L2_MPEG_VIDEO_HEVC_TIER_MAIN), - V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, - V4L2_CID_MPEG_VIDEO_HEVC_TIER, - HFI_PROP_TIER, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {LF_MODE, ENC, H264, - V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED, - DB_H264_DISABLE_SLICE_BOUNDARY, - BIT(V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED) | - BIT(V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_DISABLED) | - BIT(DB_H264_DISABLE_SLICE_BOUNDARY), - V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED, - V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_MODE, - HFI_PROP_DEBLOCKING_MODE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {LF_MODE, ENC, HEVC|HEIC, - V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_DISABLED, - DB_HEVC_DISABLE_SLICE_BOUNDARY, - BIT(V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_DISABLED) | - BIT(V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_ENABLED) | - BIT(DB_HEVC_DISABLE_SLICE_BOUNDARY), - V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_ENABLED, - V4L2_CID_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE, - HFI_PROP_DEBLOCKING_MODE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {LF_ALPHA, ENC, H264, - -6, 6, 1, 0, - V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_ALPHA}, - - {LF_ALPHA, ENC, HEVC|HEIC, - -6, 6, 1, 0, - V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2}, - - {LF_BETA, ENC, H264, - -6, 6, 1, 0, - V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_BETA}, - - {LF_BETA, ENC, HEVC|HEIC, - -6, 6, 1, 0, - V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2}, - - {SLICE_MODE, ENC, H264|HEVC, - V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, - V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_BYTES, - BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE) | - BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_MB) | - BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_BYTES), - V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, - V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE, - 0, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {SLICE_MODE, ENC, HEIC, - V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, - V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, - BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE), - V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, - V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE, - 0, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {SLICE_MAX_BYTES, ENC, H264|HEVC, - MIN_SLICE_BYTE_SIZE, MAX_SLICE_BYTE_SIZE, - 1, MIN_SLICE_BYTE_SIZE, - V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES, - HFI_PROP_MULTI_SLICE_BYTES_COUNT, - CAP_FLAG_OUTPUT_PORT}, - - {SLICE_MAX_MB, ENC, H264|HEVC, - 1, MAX_SLICE_MB_SIZE, 1, 1, - V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB, - HFI_PROP_MULTI_SLICE_MB_COUNT, - CAP_FLAG_OUTPUT_PORT}, - - {MB_RC, ENC, H264|HEVC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_ENABLE, - V4L2_CID_MPEG_VIDEO_MB_RC_ENABLE, - 0, - CAP_FLAG_OUTPUT_PORT}, - - {TRANSFORM_8X8, ENC, H264, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_ENABLE, - V4L2_CID_MPEG_VIDEO_H264_8X8_TRANSFORM, - HFI_PROP_8X8_TRANSFORM, - CAP_FLAG_OUTPUT_PORT}, - - {CHROMA_QP_INDEX_OFFSET, ENC, HEVC, - MIN_CHROMA_QP_OFFSET, MAX_CHROMA_QP_OFFSET, - 1, MAX_CHROMA_QP_OFFSET, - V4L2_CID_MPEG_VIDEO_H264_CHROMA_QP_INDEX_OFFSET, - HFI_PROP_CHROMA_QP_OFFSET, - CAP_FLAG_OUTPUT_PORT}, - - {DISPLAY_DELAY_ENABLE, DEC, H264|HEVC|VP9|AV1, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY_ENABLE, - HFI_PROP_DECODE_ORDER_OUTPUT, - CAP_FLAG_INPUT_PORT}, - - {DISPLAY_DELAY, DEC, H264|HEVC|VP9|AV1, - 0, 1, 1, 0, - V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY, - HFI_PROP_DECODE_ORDER_OUTPUT, - CAP_FLAG_INPUT_PORT}, - - {OUTPUT_ORDER, DEC, H264|HEVC|VP9|AV1, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - 0, - HFI_PROP_DECODE_ORDER_OUTPUT, - CAP_FLAG_INPUT_PORT}, - - {INPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL, - DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT, - 1, DEFAULT_MAX_HOST_BUF_COUNT, - 0, - HFI_PROP_BUFFER_HOST_MAX_COUNT, - CAP_FLAG_INPUT_PORT}, - - {OUTPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL, - DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT, - 1, DEFAULT_MAX_HOST_BUF_COUNT, - 0, - HFI_PROP_BUFFER_HOST_MAX_COUNT, - CAP_FLAG_OUTPUT_PORT}, - - {CONCEAL_COLOR_8BIT, DEC, CODECS_ALL, 0x0, 0xff3fcff, 1, - DEFAULT_VIDEO_CONCEAL_COLOR_BLACK, - V4L2_CID_MPEG_VIDEO_MUTE_YUV, - HFI_PROP_CONCEAL_COLOR_8BIT, - CAP_FLAG_INPUT_PORT}, - - {CONCEAL_COLOR_10BIT, DEC, CODECS_ALL, 0x0, 0x3fffffff, 1, - DEFAULT_VIDEO_CONCEAL_COLOR_BLACK, - V4L2_CID_MPEG_VIDEO_MUTE_YUV, - HFI_PROP_CONCEAL_COLOR_10BIT, - CAP_FLAG_INPUT_PORT}, - - {STAGE, DEC|ENC, CODECS_ALL, - MSM_VIDC_STAGE_1, - MSM_VIDC_STAGE_2, 1, - MSM_VIDC_STAGE_2, - 0, - HFI_PROP_STAGE}, - - {PIPE, DEC|ENC, CODECS_ALL, - MSM_VIDC_PIPE_1, - MSM_VIDC_PIPE_4, 1, - MSM_VIDC_PIPE_4, - 0, - HFI_PROP_PIPE}, - - {POC, DEC, H264, 0, 2, 1, 1, - 0, - HFI_PROP_PIC_ORDER_CNT_TYPE}, - - {QUALITY_MODE, ENC, CODECS_ALL, - MSM_VIDC_MAX_QUALITY_MODE, - MSM_VIDC_POWER_SAVE_MODE, 1, - MSM_VIDC_POWER_SAVE_MODE}, - - {CODED_FRAMES, DEC, H264|HEVC|HEIC, - CODED_FRAMES_PROGRESSIVE, CODED_FRAMES_INTERLACE, - 1, CODED_FRAMES_PROGRESSIVE, - 0, - HFI_PROP_CODED_FRAMES}, - - {BIT_DEPTH, DEC, CODECS_ALL, BIT_DEPTH_8, BIT_DEPTH_10, 1, BIT_DEPTH_8, - 0, - HFI_PROP_LUMA_CHROMA_BIT_DEPTH}, - - {CODEC_CONFIG, DEC, H264|HEVC|HEIC|AV1, 0, 1, 1, 0, - V4L2_CID_MPEG_VIDC_CODEC_CONFIG, 0, - CAP_FLAG_DYNAMIC_ALLOWED}, - - {BITSTREAM_SIZE_OVERWRITE, DEC, CODECS_ALL, 0, INT_MAX, 1, 0, - V4L2_CID_MPEG_VIDC_MIN_BITSTREAM_SIZE_OVERWRITE}, - - {THUMBNAIL_MODE, DEC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_THUMBNAIL_MODE, - HFI_PROP_THUMBNAIL_MODE, - CAP_FLAG_INPUT_PORT}, - - {DEFAULT_HEADER, DEC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - 0, - HFI_PROP_DEC_DEFAULT_HEADER}, - - {RAP_FRAME, DEC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_ENABLE, - 0, - HFI_PROP_DEC_START_FROM_RAP_FRAME, - CAP_FLAG_INPUT_PORT}, - - {SEQ_CHANGE_AT_SYNC_FRAME, DEC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_ENABLE, - 0, - HFI_PROP_SEQ_CHANGE_AT_SYNC_FRAME, - CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - - {PRIORITY, DEC|ENC, CODECS_ALL, - 0, 1 + NRT_PRIORITY_OFFSET, 1, 1 + NRT_PRIORITY_OFFSET, - V4L2_CID_MPEG_VIDC_PRIORITY, - HFI_PROP_SESSION_PRIORITY, - CAP_FLAG_DYNAMIC_ALLOWED}, - - {FIRMWARE_PRIORITY_OFFSET, DEC | ENC, CODECS_ALL, - 1, 1, 1, 1}, - - {CRITICAL_PRIORITY, ENC, CODECS_ALL, - 0, 1, 1, 0, - V4L2_CID_MPEG_VIDC_CRITICAL_PRIORITY}, - - {RESERVE_DURATION, ENC, CODECS_ALL, - 0, INT_MAX, 1, 0, - V4L2_CID_MPEG_VIDC_RESERVE_DURATION, - HFI_CMD_RESERVE, - CAP_FLAG_DYNAMIC_ALLOWED}, - - {ENC_IP_CR, ENC, CODECS_ALL, - 0, S32_MAX, 1, 0, - V4L2_CID_MPEG_VIDC_ENC_INPUT_COMPRESSION_RATIO, - 0, CAP_FLAG_DYNAMIC_ALLOWED}, - - {DPB_LIST, DEC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - 0, - HFI_PROP_DPB_LIST, - CAP_FLAG_OUTPUT_PORT}, - - {FILM_GRAIN, DEC, AV1, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_AV1D_FILM_GRAIN_PRESENT, - HFI_PROP_AV1_FILM_GRAIN_PRESENT}, - - {SUPER_BLOCK, DEC, AV1, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - 0, - HFI_PROP_AV1_SUPER_BLOCK_ENABLED}, - - {DRAP, DEC, AV1, - 0, S32_MAX, 1, 0, - 0, - HFI_PROP_AV1_DRAP_CONFIG, - CAP_FLAG_INPUT_PORT}, - - {LAST_FLAG_EVENT_ENABLE, DEC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_LAST_FLAG_EVENT_ENABLE}, - - {META_BITSTREAM_RESOLUTION, DEC, AV1, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_INPUT | - V4L2_MPEG_VIDC_META_RX_OUTPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_BITSTREAM_RESOLUTION, - HFI_PROP_BITSTREAM_RESOLUTION, - CAP_FLAG_BITMASK | CAP_FLAG_META}, - - {META_CROP_OFFSETS, DEC, AV1, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_INPUT | - V4L2_MPEG_VIDC_META_RX_OUTPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_CROP_OFFSETS, - HFI_PROP_CROP_OFFSETS, - CAP_FLAG_BITMASK | CAP_FLAG_META}, - - {ALL_INTRA, ENC, H264|HEVC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - 0, - 0, - CAP_FLAG_OUTPUT_PORT}, - - {META_LTR_MARK_USE, ENC, H264|HEVC, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_LTR_MARK_USE_DETAILS, - HFI_PROP_LTR_MARK_USE_DETAILS, - CAP_FLAG_BITMASK | CAP_FLAG_META}, - - {META_SEQ_HDR_NAL, ENC, CODECS_ALL, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_SEQ_HEADER_NAL, - HFI_PROP_METADATA_SEQ_HEADER_NAL, - CAP_FLAG_BITMASK | CAP_FLAG_META}, - - {META_DPB_MISR, DEC, CODECS_ALL, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_DPB_LUMA_CHROMA_MISR, - HFI_PROP_DPB_LUMA_CHROMA_MISR, - CAP_FLAG_BITMASK | CAP_FLAG_META}, - - {META_OPB_MISR, DEC, CODECS_ALL, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_OPB_LUMA_CHROMA_MISR, - HFI_PROP_OPB_LUMA_CHROMA_MISR, - CAP_FLAG_BITMASK | CAP_FLAG_META}, - - {META_INTERLACE, DEC, H264, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_INTERLACE, - HFI_PROP_INTERLACE_INFO, - CAP_FLAG_BITMASK | CAP_FLAG_META}, - - {META_TIMESTAMP, DEC | ENC, CODECS_ALL, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_TIMESTAMP, - HFI_PROP_TIMESTAMP, - CAP_FLAG_BITMASK | CAP_FLAG_META}, - - {META_CONCEALED_MB_CNT, DEC, CODECS_ALL, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_CONCEALED_MB_COUNT, - HFI_PROP_CONEALED_MB_COUNT, - CAP_FLAG_BITMASK | CAP_FLAG_META}, - - {META_HIST_INFO, DEC, HEVC|AV1|VP9, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_HISTOGRAM_INFO, - HFI_PROP_HISTOGRAM_INFO, - CAP_FLAG_BITMASK | CAP_FLAG_META}, - - {META_TRANSCODING_STAT_INFO, DEC, HEVC|H264, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_TRANSCODE_STAT_INFO, - HFI_PROP_TRANSCODING_STAT_INFO, - CAP_FLAG_BITMASK | CAP_FLAG_META}, - - {META_TRANSCODING_STAT_INFO, ENC, HEVC|H264, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_TX_INPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_TRANSCODE_STAT_INFO, - HFI_PROP_TRANSCODING_STAT_INFO, - CAP_FLAG_BITMASK | CAP_FLAG_META}, - - {META_PICTURE_TYPE, DEC, CODECS_ALL, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_INPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_PICTURE_TYPE, - HFI_PROP_PICTURE_TYPE, - CAP_FLAG_BITMASK | CAP_FLAG_META}, - - {META_SEI_MASTERING_DISP, ENC, HEVC|HEIC, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_TX_INPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_SEI_MASTERING_DISPLAY_COLOUR, - HFI_PROP_SEI_MASTERING_DISPLAY_COLOUR, - CAP_FLAG_BITMASK | CAP_FLAG_META}, - - {META_SEI_MASTERING_DISP, DEC, HEVC|HEIC|AV1, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_INPUT | - V4L2_MPEG_VIDC_META_RX_OUTPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_SEI_MASTERING_DISPLAY_COLOUR, - HFI_PROP_SEI_MASTERING_DISPLAY_COLOUR, - CAP_FLAG_BITMASK | CAP_FLAG_META}, - - {META_SEI_CLL, ENC, HEVC|HEIC, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_TX_INPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_SEI_CONTENT_LIGHT_LEVEL, - HFI_PROP_SEI_CONTENT_LIGHT_LEVEL, - CAP_FLAG_BITMASK | CAP_FLAG_META}, - - {META_SEI_CLL, DEC, HEVC|HEIC|AV1, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_INPUT | - V4L2_MPEG_VIDC_META_RX_OUTPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_SEI_CONTENT_LIGHT_LEVEL, - HFI_PROP_SEI_CONTENT_LIGHT_LEVEL, - CAP_FLAG_BITMASK | CAP_FLAG_META}, - - {META_HDR10PLUS, ENC, HEVC|HEIC, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_TX_INPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_HDR10PLUS, - HFI_PROP_SEI_HDR10PLUS_USERDATA, - CAP_FLAG_BITMASK | CAP_FLAG_META}, - - {META_HDR10PLUS, DEC, HEVC|HEIC|AV1, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_INPUT | - V4L2_MPEG_VIDC_META_RX_OUTPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_HDR10PLUS, - HFI_PROP_SEI_HDR10PLUS_USERDATA, - CAP_FLAG_BITMASK | CAP_FLAG_META}, - - {META_DOLBY_RPU, ENC, HEVC, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_TX_INPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_DOLBY_RPU, - HFI_PROP_DOLBY_RPU_METADATA, - CAP_FLAG_BITMASK | CAP_FLAG_META}, - - {META_DOLBY_RPU, DEC, H264|HEVC, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_DOLBY_RPU, - HFI_PROP_DOLBY_RPU_METADATA, - CAP_FLAG_BITMASK | CAP_FLAG_META}, - - {META_EVA_STATS, ENC, CODECS_ALL, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_TX_INPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_EVA_STATS, - HFI_PROP_EVA_STAT_INFO, - CAP_FLAG_BITMASK | CAP_FLAG_META}, - - {META_BUF_TAG, ENC, CODECS_ALL, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_TX_INPUT | - V4L2_MPEG_VIDC_META_RX_OUTPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_BUFFER_TAG, - HFI_PROP_BUFFER_TAG, - CAP_FLAG_BITMASK | CAP_FLAG_META}, - - /* - * when fence enabled, client needs output buffer_tag - * in input metadata buffer done. - */ - {META_BUF_TAG, DEC, CODECS_ALL, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_TX_INPUT | - V4L2_MPEG_VIDC_META_TX_OUTPUT | V4L2_MPEG_VIDC_META_RX_INPUT | - V4L2_MPEG_VIDC_META_RX_OUTPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_BUFFER_TAG, - HFI_PROP_BUFFER_TAG, - CAP_FLAG_BITMASK | CAP_FLAG_META}, - - {META_DPB_TAG_LIST, DEC, CODECS_ALL, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_DPB_TAG_LIST, - HFI_PROP_DPB_TAG_LIST, - CAP_FLAG_BITMASK | CAP_FLAG_META}, - - {META_SUBFRAME_OUTPUT, ENC, HEIC | H264 | HEVC, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_SUBFRAME_OUTPUT, - HFI_PROP_SUBFRAME_OUTPUT, - CAP_FLAG_BITMASK | CAP_FLAG_META}, - - {META_SUBFRAME_OUTPUT, DEC, CODECS_ALL, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_SUBFRAME_OUTPUT, - HFI_PROP_SUBFRAME_OUTPUT, - CAP_FLAG_BITMASK | CAP_FLAG_META}, - - {META_ENC_QP_METADATA, ENC, CODECS_ALL, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_ENC_QP_METADATA, - HFI_PROP_ENC_QP_METADATA, - CAP_FLAG_BITMASK | CAP_FLAG_META}, - - {META_ROI_INFO, ENC, H264|HEVC, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_TX_INPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_ROI_INFO, - HFI_PROP_ROI_INFO, - CAP_FLAG_INPUT_PORT | CAP_FLAG_BITMASK | CAP_FLAG_META}, - - {META_SALIENCY_INFO, ENC, H264|HEVC, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_TX_INPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_SALIENCY_INFO, - HFI_PROP_ROI_AS_SALIENCY_INFO, - CAP_FLAG_INPUT_PORT | CAP_FLAG_BITMASK | CAP_FLAG_META}, - - {META_DEC_QP_METADATA, DEC, CODECS_ALL, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_DEC_QP_METADATA, - HFI_PROP_DEC_QP_METADATA, - CAP_FLAG_BITMASK | CAP_FLAG_META}, - - {GRID, ENC, HEIC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_ENABLE, - 0, - HFI_PROP_HEIC_GRID_ENABLE, - CAP_FLAG_OUTPUT_PORT}, - - {COMPLEXITY, ENC, H264|HEVC, - 0, 100, - 1, DEFAULT_COMPLEXITY, - V4L2_CID_MPEG_VIDC_VENC_COMPLEXITY}, - - {META_MAX_NUM_REORDER_FRAMES, DEC, HEVC | H264, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_MAX_NUM_REORDER_FRAMES, - HFI_PROP_MAX_NUM_REORDER_FRAMES, - CAP_FLAG_BITMASK | CAP_FLAG_META}, - - {DELIVERY_MODE, ENC, HEVC, - 0, 1, 1, 0, - V4L2_CID_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE, - HFI_PROP_ENABLE_SLICE_DELIVERY, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {DELIVERY_MODE, ENC, H264, - 0, 1, 1, 0, - V4L2_CID_MPEG_VIDC_H264_ENCODE_DELIVERY_MODE, - HFI_PROP_ENABLE_SLICE_DELIVERY, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, -}; - -static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_anorak[] = { - /* {cap, domain, codec, - * parents, - * children, - * adjust, set} - */ - - {PIX_FMTS, ENC, H264, - {META_ROI_INFO, IR_PERIOD}}, - - {PIX_FMTS, ENC, HEVC, - {PROFILE, MIN_FRAME_QP, MAX_FRAME_QP, I_FRAME_QP, P_FRAME_QP, - B_FRAME_QP, META_ROI_INFO, MIN_QUALITY, BLUR_TYPES, IR_PERIOD, - LTR_COUNT}}, - - {PIX_FMTS, ENC, HEIC, - {PROFILE}}, - - {PIX_FMTS, DEC, HEVC|HEIC, - {PROFILE}}, - - {FRAME_RATE, ENC, CODECS_ALL, - {0}, - NULL, - msm_vidc_set_q16}, - - {FRAME_RATE, DEC, CODECS_ALL, - {0}, - msm_vidc_adjust_dec_frame_rate}, - - {OPERATING_RATE, DEC, CODECS_ALL, - {0}, - msm_vidc_adjust_dec_operating_rate}, - - {SECURE_MODE, ENC|DEC, H264|HEVC|VP9|AV1, - {0}, - NULL, - msm_vidc_set_u32}, - - {META_OUTBUF_FENCE, DEC, H264|HEVC|VP9|AV1, - {LOWLATENCY_MODE, SLICE_DECODE}, - msm_vidc_adjust_dec_outbuf_fence, - NULL}, - - {HFLIP, ENC, CODECS_ALL, - {0}, - NULL, - msm_vidc_set_flip}, - - {VFLIP, ENC, CODECS_ALL, - {0}, - NULL, - msm_vidc_set_flip}, - - {ROTATION, ENC, CODECS_ALL, - {0}, - NULL, - msm_vidc_set_rotation}, - - {SUPER_FRAME, ENC, H264|HEVC, - {INPUT_BUF_HOST_MAX_COUNT, OUTPUT_BUF_HOST_MAX_COUNT}, - NULL, - NULL}, - - {SLICE_DECODE, DEC, H264|HEVC|AV1, - {0}, - msm_vidc_adjust_dec_slice_mode, - msm_vidc_set_u32}, - - {HEADER_MODE, ENC, CODECS_ALL, - {0}, - NULL, - msm_vidc_set_header_mode}, - - {WITHOUT_STARTCODE, ENC, CODECS_ALL, - {0}, - NULL, - msm_vidc_set_nal_length}, - - {WITHOUT_STARTCODE, DEC, AV1, - {0}, - NULL, - msm_vidc_set_u32}, - - {REQUEST_I_FRAME, ENC, H264|HEVC, - {0}, - NULL, - msm_vidc_set_req_sync_frame}, - - {BIT_RATE, ENC, H264, - {PEAK_BITRATE, BITRATE_BOOST, L0_BR}, - msm_vidc_adjust_bitrate, - msm_vidc_set_bitrate}, - - {BIT_RATE, ENC, HEVC, - {PEAK_BITRATE, BITRATE_BOOST, L0_BR}, - msm_vidc_adjust_bitrate, - msm_vidc_set_bitrate}, - - {BITRATE_MODE, ENC, H264, - {LTR_COUNT, IR_PERIOD, TIME_DELTA_BASED_RC, I_FRAME_QP, - P_FRAME_QP, B_FRAME_QP, ENH_LAYER_COUNT, BIT_RATE, - META_ROI_INFO, MIN_QUALITY, BITRATE_BOOST, VBV_DELAY, - PEAK_BITRATE, SLICE_MODE, CONTENT_ADAPTIVE_CODING, - BLUR_TYPES, LOWLATENCY_MODE}, - msm_vidc_adjust_bitrate_mode, - msm_vidc_set_u32_enum}, - - {BITRATE_MODE, ENC, HEVC, - {LTR_COUNT, IR_PERIOD, TIME_DELTA_BASED_RC, I_FRAME_QP, - P_FRAME_QP, B_FRAME_QP, CONSTANT_QUALITY, ENH_LAYER_COUNT, - BIT_RATE, META_ROI_INFO, MIN_QUALITY, BITRATE_BOOST, VBV_DELAY, - PEAK_BITRATE, SLICE_MODE, CONTENT_ADAPTIVE_CODING, - BLUR_TYPES, LOWLATENCY_MODE}, - msm_vidc_adjust_bitrate_mode, - msm_vidc_set_u32_enum}, - - {BITRATE_MODE, ENC, HEIC, - {TIME_DELTA_BASED_RC, CONSTANT_QUALITY}, - msm_vidc_adjust_bitrate_mode, - msm_vidc_set_u32_enum}, - - {CONSTANT_QUALITY, ENC, HEVC|HEIC, - {0}, - NULL, - msm_vidc_set_constant_quality}, - - {GOP_SIZE, ENC, CODECS_ALL, - {ALL_INTRA}, - msm_vidc_adjust_gop_size, - msm_vidc_set_gop_size}, - - {GOP_SIZE, ENC, HEIC, - {0}, - NULL, - msm_vidc_set_u32}, - - {B_FRAME, ENC, H264|HEVC, - {ALL_INTRA}, - msm_vidc_adjust_b_frame, - msm_vidc_set_u32}, - - {B_FRAME, ENC, HEIC, - {0}, - NULL, - msm_vidc_set_u32}, - - {BLUR_TYPES, ENC, H264|HEVC, - {BLUR_RESOLUTION}, - msm_vidc_adjust_blur_type, - msm_vidc_set_u32_enum}, - - {BLUR_RESOLUTION, ENC, H264|HEVC, - {0}, - msm_vidc_adjust_blur_resolution, - msm_vidc_set_blur_resolution}, - - {CSC_CUSTOM_MATRIX, ENC, CODECS_ALL, - {0}, - NULL, - msm_vidc_set_csc_custom_matrix}, - - {LOWLATENCY_MODE, ENC, H264 | HEVC, - {STAGE, BIT_RATE}, - msm_vidc_adjust_enc_lowlatency_mode, - NULL}, - - {LOWLATENCY_MODE, DEC, H264|HEVC|VP9|AV1, - {STAGE, SLICE_DECODE}, - msm_vidc_adjust_dec_lowlatency_mode, - NULL}, - - {LTR_COUNT, ENC, H264|HEVC, - {0}, - msm_vidc_adjust_ltr_count, - msm_vidc_set_u32}, - - {USE_LTR, ENC, H264|HEVC, - {0}, - msm_vidc_adjust_use_ltr, - msm_vidc_set_use_and_mark_ltr}, - - {MARK_LTR, ENC, H264|HEVC, - {0}, - msm_vidc_adjust_mark_ltr, - msm_vidc_set_use_and_mark_ltr}, - - {IR_PERIOD, ENC, H264|HEVC, - {0}, - msm_vidc_adjust_ir_period, - msm_vidc_set_ir_period}, - - {AU_DELIMITER, ENC, H264|HEVC, - {0}, - NULL, - msm_vidc_set_u32}, - - {TIME_DELTA_BASED_RC, ENC, CODECS_ALL, - {0}, - msm_vidc_adjust_delta_based_rc, - msm_vidc_set_u32}, - - {CONTENT_ADAPTIVE_CODING, ENC, H264|HEVC, - {REQUEST_PREPROCESS}, - msm_vidc_adjust_brs, - msm_vidc_set_vbr_related_properties}, - - {REQUEST_PREPROCESS, ENC, H264|HEVC, - {0}, - msm_vidc_adjust_preprocess, - msm_vidc_set_preprocess}, - - {BITRATE_BOOST, ENC, H264|HEVC, - {0}, - msm_vidc_adjust_bitrate_boost_iris3, - msm_vidc_set_vbr_related_properties}, - - {MIN_QUALITY, ENC, H264, - {BLUR_TYPES}, - msm_vidc_adjust_min_quality, - msm_vidc_set_vbr_related_properties}, - - {MIN_QUALITY, ENC, HEVC, - {BLUR_TYPES}, - msm_vidc_adjust_min_quality, - msm_vidc_set_vbr_related_properties}, - - {VBV_DELAY, ENC, H264|HEVC, - {0}, - NULL, - msm_vidc_set_cbr_related_properties}, - - {PEAK_BITRATE, ENC, H264|HEVC, - {0}, - msm_vidc_adjust_peak_bitrate, - msm_vidc_set_cbr_related_properties}, - - {MIN_FRAME_QP, ENC, H264, - {0}, - NULL, - msm_vidc_set_min_qp}, - - {MIN_FRAME_QP, ENC, HEVC, - {0}, - msm_vidc_adjust_hevc_min_qp, - msm_vidc_set_min_qp}, - - {MAX_FRAME_QP, ENC, H264, - {0}, - NULL, - msm_vidc_set_max_qp}, - - {MAX_FRAME_QP, ENC, HEVC, - {0}, - msm_vidc_adjust_hevc_max_qp, - msm_vidc_set_max_qp}, - - {I_FRAME_QP, ENC, HEVC, - {0}, - msm_vidc_adjust_hevc_i_frame_qp, - msm_vidc_set_frame_qp}, - - {I_FRAME_QP, ENC, H264, - {0}, - NULL, - msm_vidc_set_frame_qp}, - - {P_FRAME_QP, ENC, HEVC, - {0}, - msm_vidc_adjust_hevc_p_frame_qp, - msm_vidc_set_frame_qp}, - - {P_FRAME_QP, ENC, H264, - {0}, - NULL, - msm_vidc_set_frame_qp}, - - {B_FRAME_QP, ENC, HEVC, - {0}, - msm_vidc_adjust_hevc_b_frame_qp, - msm_vidc_set_frame_qp}, - - {B_FRAME_QP, ENC, H264, - {0}, - NULL, - msm_vidc_set_frame_qp}, - - {LAYER_TYPE, ENC, H264|HEVC, - {CONTENT_ADAPTIVE_CODING, LTR_COUNT}}, - - {LAYER_ENABLE, ENC, H264|HEVC, - {CONTENT_ADAPTIVE_CODING}}, - - {ENH_LAYER_COUNT, ENC, H264|HEVC, - {GOP_SIZE, B_FRAME, BIT_RATE, MIN_QUALITY, SLICE_MODE, - LTR_COUNT}, - msm_vidc_adjust_layer_count, - msm_vidc_set_layer_count_and_type}, - - {ENH_LAYER_COUNT, DEC, AV1, - {0}, - NULL, - msm_vidc_set_u32}, - - {L0_BR, ENC, H264|HEVC, - {L1_BR}, - msm_vidc_adjust_layer_bitrate, - msm_vidc_set_layer_bitrate}, - - {L1_BR, ENC, H264|HEVC, - {L2_BR}, - msm_vidc_adjust_layer_bitrate, - msm_vidc_set_layer_bitrate}, - - {L2_BR, ENC, H264|HEVC, - {L3_BR}, - msm_vidc_adjust_layer_bitrate, - msm_vidc_set_layer_bitrate}, - - {L3_BR, ENC, H264|HEVC, - {L4_BR}, - msm_vidc_adjust_layer_bitrate, - msm_vidc_set_layer_bitrate}, - - {L4_BR, ENC, H264|HEVC, - {L5_BR}, - msm_vidc_adjust_layer_bitrate, - msm_vidc_set_layer_bitrate}, - - {L5_BR, ENC, H264|HEVC, - {0}, - msm_vidc_adjust_layer_bitrate, - msm_vidc_set_layer_bitrate}, - - {ENTROPY_MODE, ENC, H264, - {BIT_RATE}, - msm_vidc_adjust_entropy_mode, - msm_vidc_set_u32}, - - {PROFILE, ENC, H264, - {ENTROPY_MODE, TRANSFORM_8X8}, - NULL, - msm_vidc_set_u32_enum}, - - {PROFILE, DEC, H264, - {ENTROPY_MODE}, - NULL, - msm_vidc_set_u32_enum}, - - {PROFILE, ENC|DEC, HEVC|HEIC, - {0}, - msm_vidc_adjust_profile, - msm_vidc_set_u32_enum}, - - {PROFILE, DEC, VP9|AV1, - {0}, - NULL, - msm_vidc_set_u32_enum}, - - {LEVEL, DEC, CODECS_ALL, - {0}, - NULL, - msm_vidc_set_u32_enum}, - - {LEVEL, ENC, CODECS_ALL, - {0}, - NULL, - msm_vidc_set_level}, - - {AV1_TIER, DEC, AV1, - {0}, - NULL, - msm_vidc_set_u32_enum}, - - {HEVC_TIER, ENC|DEC, HEVC|HEIC, - {0}, - NULL, - msm_vidc_set_u32_enum}, - - {LF_MODE, ENC, CODECS_ALL, - {0}, - NULL, - msm_vidc_set_deblock_mode}, - - {SLICE_MODE, ENC, H264|HEVC, - {STAGE, DELIVERY_MODE}, - msm_vidc_adjust_slice_count, - msm_vidc_set_slice_count}, - - {SLICE_MODE, ENC, HEIC, - {0}, - msm_vidc_adjust_slice_count, - msm_vidc_set_slice_count}, - - {TRANSFORM_8X8, ENC, H264, - {0}, - msm_vidc_adjust_transform_8x8, - msm_vidc_set_u32}, - - {CHROMA_QP_INDEX_OFFSET, ENC, HEVC, - {0}, - msm_vidc_adjust_chroma_qp_index_offset, - msm_vidc_set_chroma_qp_index_offset}, - - {DISPLAY_DELAY_ENABLE, DEC, H264|HEVC|VP9|AV1, - {OUTPUT_ORDER}, - NULL, - NULL}, - - {DISPLAY_DELAY, DEC, H264|HEVC|VP9|AV1, - {OUTPUT_ORDER}, - NULL, - NULL}, - - {OUTPUT_ORDER, DEC, H264|HEVC|VP9|AV1, - {META_OUTBUF_FENCE, SLICE_DECODE}, - msm_vidc_adjust_output_order, - msm_vidc_set_u32}, - - {INPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL, - {0}, - msm_vidc_adjust_input_buf_host_max_count, - msm_vidc_set_u32}, - - {INPUT_BUF_HOST_MAX_COUNT, ENC, H264|HEVC, - {0}, - msm_vidc_adjust_input_buf_host_max_count, - msm_vidc_set_u32}, - - {OUTPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL, - {0}, - msm_vidc_adjust_output_buf_host_max_count, - msm_vidc_set_u32}, - - {OUTPUT_BUF_HOST_MAX_COUNT, ENC, H264|HEVC, - {0}, - msm_vidc_adjust_output_buf_host_max_count, - msm_vidc_set_u32}, - - {CONCEAL_COLOR_8BIT, DEC, CODECS_ALL, - {0}, - NULL, - msm_vidc_set_u32_packed}, - - {CONCEAL_COLOR_10BIT, DEC, CODECS_ALL, - {0}, - NULL, - msm_vidc_set_u32_packed}, - - {STAGE, ENC | DEC, CODECS_ALL, - {0}, - NULL, - msm_vidc_set_stage}, - - {STAGE, ENC, H264|HEVC, - {0}, - NULL, - msm_vidc_set_stage}, - - {STAGE, DEC, H264|HEVC|VP9|AV1, - {0}, - NULL, - msm_vidc_set_stage}, - - {PIPE, DEC|ENC, CODECS_ALL, - {0}, - NULL, - msm_vidc_set_pipe}, - - {THUMBNAIL_MODE, DEC, H264|HEVC|VP9|AV1, - {OUTPUT_ORDER}, - NULL, - msm_vidc_set_u32}, - - {THUMBNAIL_MODE, DEC, HEIC, - {0}, - NULL, - msm_vidc_set_u32}, - - {RAP_FRAME, DEC, CODECS_ALL, - {0}, - NULL, - msm_vidc_set_u32}, - - {PRIORITY, DEC|ENC, CODECS_ALL, - {0}, - msm_vidc_adjust_session_priority, - msm_vidc_set_session_priority}, - - {FIRMWARE_PRIORITY_OFFSET, DEC | ENC, CODECS_ALL, - {0}, - NULL, - NULL}, - - {CRITICAL_PRIORITY, ENC, CODECS_ALL, - {0}, - NULL, - NULL}, - - {RESERVE_DURATION, ENC, CODECS_ALL, - {0}, - NULL, - msm_vidc_set_reserve_duration}, - - {DPB_LIST, DEC, CODECS_ALL, - {0}, - NULL, - NULL}, - - {DRAP, DEC, AV1, - {0}, - NULL, - msm_vidc_set_u32}, - - {ALL_INTRA, ENC, H264|HEVC, - {LTR_COUNT, IR_PERIOD, SLICE_MODE, BIT_RATE}, - msm_vidc_adjust_all_intra, - NULL}, - - {META_EVA_STATS, ENC, H264|HEVC, - {ENH_LAYER_COUNT, REQUEST_PREPROCESS}}, - - {META_EVA_STATS, ENC, HEIC, - {0}}, - - {META_ROI_INFO, ENC, H264|HEVC, - {MIN_QUALITY, IR_PERIOD, BLUR_TYPES}, - msm_vidc_adjust_roi_info, - NULL}, - - {GRID, ENC, HEIC, - {0}, - NULL, - msm_vidc_set_u32}, - - {DELIVERY_MODE, ENC, H264|HEVC, - {LOWLATENCY_MODE, OUTPUT_BUF_HOST_MAX_COUNT}, - msm_vidc_adjust_delivery_mode, - msm_vidc_set_u32}, - - {VUI_TIMING_INFO, ENC, CODECS_ALL, - {0}, - NULL, - msm_vidc_set_vui_timing_info}, -}; - -/* Default UBWC config for LPDDR5 */ -static struct msm_vidc_ubwc_config_data ubwc_config_anorak[] = { - UBWC_CONFIG(8, 32, 16, 0, 1, 1, 1), -}; - -/* name, min_kbps, max_kbps */ -static const struct bw_table anorak_bw_table[] = { - { "venus-cnoc", 1000, 1000 }, - { "venus-ddr", 1000, 15000000 }, - { "venus-llcc", 1000, 15000000 }, -}; - -/* name, hw_trigger */ -static const struct regulator_table anorak_regulator_table[] = { - { "iris-ctl", 0 }, - { "vcodec", 1 }, -}; - -/* name, clock id, scaling */ -static const struct clk_table anorak_clk_table[] = { - { "gcc_video_axi0", GCC_VIDEO_AXI0_CLK, 0 }, - { "core_clk", VIDEO_CC_MVS0C_CLK, 0 }, - { "vcodec_clk", VIDEO_CC_MVS0_CLK, 0 }, - { "video_cc_mvs0_clk_src", VIDEO_CC_MVS0_CLK_SRC, 1 }, -}; - -/* name, exclusive_release */ -static const struct clk_rst_table anorak_clk_reset_table[] = { - { "video_axi_reset", 0 }, -}; - -/* name, llcc_id */ -static const struct subcache_table anorak_subcache_table[] = { - { "vidsc0", LLCC_VIDSC0 }, - { "vidvsp", LLCC_VIDVSP }, -}; - -/* name, start, size, secure, dma_coherant, region, dma_mask */ -const struct context_bank_table anorak_context_bank_table[] = { - {"qcom,vidc,cb-ns", 0x25800000, 0xba800000, 0, 1, MSM_VIDC_NON_SECURE, 0 }, - {"qcom,vidc,cb-ns-pxl", 0x00100000, 0xdff00000, 0, 1, MSM_VIDC_NON_SECURE_PIXEL, 0 }, - {"qcom,vidc,cb-sec-pxl", 0x00500000, 0xdfb00000, 1, 0, MSM_VIDC_SECURE_PIXEL, 0 }, - {"qcom,vidc,cb-sec-non-pxl", 0x01000000, 0x24800000, 1, 0, MSM_VIDC_SECURE_NONPIXEL, 0 }, - {"qcom,vidc,cb-sec-bitstream", 0x00500000, 0xdfb00000, 1, 0, MSM_VIDC_SECURE_BITSTREAM, 0 }, -}; - -/* freq */ -static struct freq_table anorak_freq_table[] = { - {533000000}, {444000000}, {366000000}, {338000000}, {240000000} -}; - -/* register, value, mask */ -static const struct reg_preset_table anorak_reg_preset_table[] = { - { 0xB0088, 0x0, 0x11 }, -}; - -static const struct msm_vidc_platform_data anorak_data = { - /* resources dependent on other module */ - .bw_tbl = anorak_bw_table, - .bw_tbl_size = ARRAY_SIZE(anorak_bw_table), - .regulator_tbl = anorak_regulator_table, - .regulator_tbl_size = ARRAY_SIZE(anorak_regulator_table), - .clk_tbl = anorak_clk_table, - .clk_tbl_size = ARRAY_SIZE(anorak_clk_table), - .clk_rst_tbl = anorak_clk_reset_table, - .clk_rst_tbl_size = ARRAY_SIZE(anorak_clk_reset_table), - .subcache_tbl = anorak_subcache_table, - .subcache_tbl_size = ARRAY_SIZE(anorak_subcache_table), - - /* populate context bank */ - .context_bank_tbl = anorak_context_bank_table, - .context_bank_tbl_size = ARRAY_SIZE(anorak_context_bank_table), - - /* platform specific resources */ - .freq_tbl = anorak_freq_table, - .freq_tbl_size = ARRAY_SIZE(anorak_freq_table), - .reg_prst_tbl = anorak_reg_preset_table, - .reg_prst_tbl_size = ARRAY_SIZE(anorak_reg_preset_table), - .fwname = "vpu33_4v", - .pas_id = 9, - .supports_mmrm = 0, - - /* caps related resorces */ - .core_data = core_data_anorak, - .core_data_size = ARRAY_SIZE(core_data_anorak), - .inst_cap_data = instance_cap_data_anorak, - .inst_cap_data_size = ARRAY_SIZE(instance_cap_data_anorak), - .inst_cap_dependency_data = instance_cap_dependency_data_anorak, - .inst_cap_dependency_data_size = ARRAY_SIZE(instance_cap_dependency_data_anorak), - .csc_data.vpe_csc_custom_bias_coeff = vpe_csc_custom_bias_coeff, - .csc_data.vpe_csc_custom_matrix_coeff = vpe_csc_custom_matrix_coeff, - .csc_data.vpe_csc_custom_limit_coeff = vpe_csc_custom_limit_coeff, - .ubwc_config = ubwc_config_anorak, -}; - -int msm_vidc_anorak_check_ddr_type(void) -{ - u32 ddr_type; - - ddr_type = of_fdt_get_ddrtype(); - if (ddr_type != DDR_TYPE_LPDDR5 && - ddr_type != DDR_TYPE_LPDDR5X) { - d_vpr_e("%s: wrong ddr type %d\n", __func__, ddr_type); - return -EINVAL; - } else { - d_vpr_h("%s: ddr type %d\n", __func__, ddr_type); - } - return 0; -} - -static int msm_vidc_init_data(struct msm_vidc_core *core) -{ - int rc = 0; - - if (!core || !core->platform) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - d_vpr_h("%s: initialize anorak data\n", __func__); - - core->platform->data = anorak_data; - rc = msm_vidc_anorak_check_ddr_type(); - if (rc) - return rc; - - return rc; -} - -int msm_vidc_init_platform_anorak(struct msm_vidc_core *core, struct device *dev) -{ - int rc = 0; - - rc = msm_vidc_init_data(core); - if (rc) - return rc; - - return 0; -} - -int msm_vidc_deinit_platform_anorak(struct msm_vidc_core *core, struct device *dev) -{ - /* do nothing */ - return 0; -} diff --git a/driver/platform/common/inc/msm_vidc_platform.h b/driver/platform/common/inc/msm_vidc_platform.h index 9d661bf549..0ef2a03c1d 100644 --- a/driver/platform/common/inc/msm_vidc_platform.h +++ b/driver/platform/common/inc/msm_vidc_platform.h @@ -167,6 +167,14 @@ struct msm_platform_inst_cap_dependency { enum msm_vidc_inst_capability_type cap_id); }; +struct msm_vidc_compat_handle { + const char *compat; + int (*init_platform)(struct msm_vidc_core *core); + int (*deinit_platform)(struct msm_vidc_core *core); + int (*init_iris)(struct msm_vidc_core *core); + int (*deinit_iris)(struct msm_vidc_core *core); +}; + struct msm_vidc_csc_coeff { u32 *vpe_csc_custom_matrix_coeff; u32 *vpe_csc_custom_bias_coeff; @@ -201,7 +209,7 @@ struct msm_vidc_platform_data { unsigned int regulator_tbl_size; const struct pd_table *pd_tbl; unsigned int pd_tbl_size; - const char **opp_tbl; + const char * const *opp_tbl; unsigned int opp_tbl_size; const struct clk_table *clk_tbl; unsigned int clk_tbl_size; diff --git a/driver/platform/common/src/msm_vidc_platform.c b/driver/platform/common/src/msm_vidc_platform.c index 09ee2c7caf..1e9b39d16d 100644 --- a/driver/platform/common/src/msm_vidc_platform.c +++ b/driver/platform/common/src/msm_vidc_platform.c @@ -21,26 +21,17 @@ #include "hfi_property.h" #include "venus_hfi.h" -#if defined(CONFIG_MSM_VIDC_WAIPIO) -#include "msm_vidc_waipio.h" +#if defined(CONFIG_MSM_VIDC_PINEAPPLE) +#include "msm_vidc_pineapple.h" +#include "msm_vidc_iris33.h" #endif #if defined(CONFIG_MSM_VIDC_KALAMA) #include "msm_vidc_kalama.h" -#endif -#if defined(CONFIG_MSM_VIDC_PINEAPPLE) -#include "msm_vidc_pineapple.h" -#endif -#if defined(CONFIG_MSM_VIDC_ANORAK) -#include "msm_vidc_anorak.h" -#endif -#if defined(CONFIG_MSM_VIDC_IRIS2) -#include "msm_vidc_iris2.h" -#endif -#if defined(CONFIG_MSM_VIDC_IRIS3) #include "msm_vidc_iris3.h" #endif -#if defined(CONFIG_MSM_VIDC_IRIS33) -#include "msm_vidc_iris33.h" +#if defined(CONFIG_MSM_VIDC_WAIPIO) +#include "msm_vidc_waipio.h" +#include "msm_vidc_iris2.h" #endif #define CAP_TO_8BIT_QP(a) { \ @@ -214,6 +205,50 @@ static struct v4l2_m2m_ops msm_v4l2_m2m_ops = { .job_abort = msm_v4l2_m2m_job_abort, }; +static const struct msm_vidc_compat_handle compat_handle[] = { +#if defined(CONFIG_MSM_VIDC_PINEAPPLE) + { + .compat = "qcom,sm8650-vidc", + .init_platform = msm_vidc_init_platform_pineapple, + .deinit_platform = msm_vidc_deinit_platform_pineapple, + .init_iris = msm_vidc_init_iris33, + .deinit_iris = msm_vidc_deinit_iris33, + }, + { + .compat = "qcom,sm8650-vidc-v2", + .init_platform = msm_vidc_init_platform_pineapple, + .deinit_platform = msm_vidc_deinit_platform_pineapple, + .init_iris = msm_vidc_init_iris33, + .deinit_iris = msm_vidc_deinit_iris33, + }, +#endif +#if defined(CONFIG_MSM_VIDC_KALAMA) + { + .compat = "qcom,sm8550-vidc", + .init_platform = msm_vidc_init_platform_kalama, + .deinit_platform = msm_vidc_deinit_platform_kalama, + .init_iris = msm_vidc_init_iris3, + .deinit_iris = msm_vidc_deinit_iris3, + }, + { + .compat = "qcom,sm8550-vidc-v2", + .init_platform = msm_vidc_init_platform_kalama, + .deinit_platform = msm_vidc_deinit_platform_kalama, + .init_iris = msm_vidc_init_iris3, + .deinit_iris = msm_vidc_deinit_iris3, + }, +#endif +#if defined(CONFIG_MSM_VIDC_WAIPIO) + { + .compat = "qcom,sm8450-vidc", + .init_platform = msm_vidc_init_platform_waipio, + .deinit_platform = msm_vidc_deinit_platform_waipio, + .init_iris = msm_vidc_init_iris2, + .deinit_iris = msm_vidc_deinit_iris2, + }, +#endif +}; + static int msm_vidc_init_ops(struct msm_vidc_core *core) { if (!core) { @@ -244,179 +279,138 @@ static int msm_vidc_init_ops(struct msm_vidc_core *core) return 0; } -static int msm_vidc_deinit_platform_variant(struct msm_vidc_core *core, struct device *dev) +static int msm_vidc_deinit_platform_variant(struct msm_vidc_core *core) { - int rc = -EINVAL; + struct device *dev = NULL; + int i, rc = 0; - if (!core || !dev) { + if (!core || !core->pdev) { d_vpr_e("%s: Invalid params\n", __func__); return -EINVAL; } + dev = &core->pdev->dev; d_vpr_h("%s()\n", __func__); -#if defined(CONFIG_MSM_VIDC_WAIPIO) - if (of_device_is_compatible(dev->of_node, "qcom,sm8450-vidc")) { - rc = msm_vidc_deinit_platform_waipio(core, dev); - if (rc) - d_vpr_e("%s: failed with %d\n", __func__, rc); - return rc; + /* select platform based on compatible match */ + for (i = 0; i < ARRAY_SIZE(compat_handle); i++) { + if (of_device_is_compatible(dev->of_node, compat_handle[i].compat)) { + rc = compat_handle[i].deinit_platform(core); + if (rc) { + d_vpr_e("%s: (%s) init failed with %d\n", + __func__, compat_handle[i].compat, rc); + return rc; + } + break; + } } -#endif -#if defined(CONFIG_MSM_VIDC_KALAMA) - if (of_device_is_compatible(dev->of_node, "qcom,sm8550-vidc") || - of_device_is_compatible(dev->of_node, "qcom,sm8550-vidc-v2")) { - rc = msm_vidc_deinit_platform_kalama(core, dev); - if (rc) - d_vpr_e("%s: failed with %d\n", __func__, rc); - return rc; + + /* handle unknown compat type */ + if (i == ARRAY_SIZE(compat_handle)) { + d_vpr_e("%s: Unsupported device: (%s)\n", __func__, dev_name(dev)); + return -EINVAL; } -#endif -#if defined(CONFIG_MSM_VIDC_PINEAPPLE) - if (of_device_is_compatible(dev->of_node, "qcom,sm8650-vidc") || - of_device_is_compatible(dev->of_node, "qcom,sm8650-vidc-v2")) { - rc = msm_vidc_deinit_platform_pineapple(core, dev); - if (rc) - d_vpr_e("%s: failed with %d\n", __func__, rc); - return rc; - } -#endif -#if defined(CONFIG_MSM_VIDC_ANORAK) - if (of_device_is_compatible(dev->of_node, "qcom,sxr2230p-vidc")) { - rc = msm_vidc_deinit_platform_anorak(core, dev); - if (rc) - d_vpr_e("%s: failed with %d\n", __func__, rc); - return rc; - } -#endif return rc; } -static int msm_vidc_init_platform_variant(struct msm_vidc_core *core, struct device *dev) +static int msm_vidc_init_platform_variant(struct msm_vidc_core *core) { - int rc = -EINVAL; + struct device *dev = NULL; + int i, rc = 0; - if (!core || !dev) { + if (!core || !core->pdev) { d_vpr_e("%s: Invalid params\n", __func__); return -EINVAL; } + dev = &core->pdev->dev; d_vpr_h("%s()\n", __func__); -#if defined(CONFIG_MSM_VIDC_WAIPIO) - if (of_device_is_compatible(dev->of_node, "qcom,sm8450-vidc")) { - rc = msm_vidc_init_platform_waipio(core, dev); - if (rc) - d_vpr_e("%s: failed with %d\n", __func__, rc); - return rc; + /* select platform based on compatible match */ + for (i = 0; i < ARRAY_SIZE(compat_handle); i++) { + if (of_device_is_compatible(dev->of_node, compat_handle[i].compat)) { + rc = compat_handle[i].init_platform(core); + if (rc) { + d_vpr_e("%s: (%s) init failed with %d\n", + __func__, compat_handle[i].compat, rc); + return rc; + } + break; + } } -#endif -#if defined(CONFIG_MSM_VIDC_KALAMA) - if (of_device_is_compatible(dev->of_node, "qcom,sm8550-vidc") || - of_device_is_compatible(dev->of_node, "qcom,sm8550-vidc-v2")) { - rc = msm_vidc_init_platform_kalama(core, dev); - if (rc) - d_vpr_e("%s: failed with %d\n", __func__, rc); - return rc; + + /* handle unknown compat type */ + if (i == ARRAY_SIZE(compat_handle)) { + d_vpr_e("%s: Unsupported device: (%s)\n", __func__, dev_name(dev)); + return -EINVAL; } -#endif -#if defined(CONFIG_MSM_VIDC_PINEAPPLE) - if (of_device_is_compatible(dev->of_node, "qcom,sm8650-vidc") || - of_device_is_compatible(dev->of_node, "qcom,sm8650-vidc-v2")) { - rc = msm_vidc_init_platform_pineapple(core, dev); - if (rc) - d_vpr_e("%s: failed with %d\n", __func__, rc); - return rc; - } -#endif -#if defined(CONFIG_MSM_VIDC_ANORAK) - if (of_device_is_compatible(dev->of_node, "qcom,sxr2230p-vidc")) { - rc = msm_vidc_init_platform_anorak(core, dev); - if (rc) - d_vpr_e("%s: failed with %d\n", __func__, rc); - return rc; - } -#endif return rc; } -static int msm_vidc_deinit_vpu(struct msm_vidc_core *core, struct device *dev) +static int msm_vidc_deinit_vpu(struct msm_vidc_core *core) { - int rc = -EINVAL; + struct device *dev = NULL; + int i, rc = 0; - if (!core || !dev) { + if (!core || !core->pdev) { d_vpr_e("%s: Invalid params\n", __func__); return -EINVAL; } + dev = &core->pdev->dev; - d_vpr_h("%s()\n", __func__); + /* select platform based on compatible match */ + for (i = 0; i < ARRAY_SIZE(compat_handle); i++) { + if (of_device_is_compatible(dev->of_node, compat_handle[i].compat)) { + rc = compat_handle[i].deinit_iris(core); + if (rc) { + d_vpr_e("%s: (%s) init failed with %d\n", + __func__, compat_handle[i].compat, rc); + return rc; + } + break; + } + } -#if defined(CONFIG_MSM_VIDC_IRIS2) - if (of_device_is_compatible(dev->of_node, "qcom,sm8450-vidc")) { - rc = msm_vidc_deinit_iris2(core); - if (rc) - d_vpr_e("%s: failed with %d\n", __func__, rc); - return rc; + /* handle unknown compat type */ + if (i == ARRAY_SIZE(compat_handle)) { + d_vpr_e("%s: Unsupported device: (%s)\n", __func__, dev_name(dev)); + return -EINVAL; } -#endif -#if defined(CONFIG_MSM_VIDC_IRIS3) - if (of_device_is_compatible(dev->of_node, "qcom,sm8550-vidc") || - of_device_is_compatible(dev->of_node, "qcom,sm8550-vidc-v2")) { - rc = msm_vidc_deinit_iris3(core); - if (rc) - d_vpr_e("%s: failed with %d\n", __func__, rc); - return rc; - } -#endif -#if defined(CONFIG_MSM_VIDC_IRIS33) - if (of_device_is_compatible(dev->of_node, "qcom,sm8650-vidc") || - of_device_is_compatible(dev->of_node, "qcom,sm8650-vidc-v2")) { - rc = msm_vidc_deinit_iris33(core); - if (rc) - d_vpr_e("%s: failed with %d\n", __func__, rc); - return rc; - } -#endif + return rc; } -static int msm_vidc_init_vpu(struct msm_vidc_core *core, struct device *dev) +static int msm_vidc_init_vpu(struct msm_vidc_core *core) { - int rc = -EINVAL; + struct device *dev = NULL; + int i, rc = 0; - if (!core || !dev) { + if (!core || !core->pdev) { d_vpr_e("%s: Invalid params\n", __func__); return -EINVAL; } + dev = &core->pdev->dev; -#if defined(CONFIG_MSM_VIDC_IRIS2) - if (of_device_is_compatible(dev->of_node, "qcom,sm8450-vidc")) { - rc = msm_vidc_init_iris2(core); - if (rc) - d_vpr_e("%s: failed with %d\n", __func__, rc); - return rc; + /* select platform based on compatible match */ + for (i = 0; i < ARRAY_SIZE(compat_handle); i++) { + if (of_device_is_compatible(dev->of_node, compat_handle[i].compat)) { + rc = compat_handle[i].init_iris(core); + if (rc) { + d_vpr_e("%s: (%s) init failed with %d\n", + __func__, compat_handle[i].compat, rc); + return rc; + } + break; + } } -#endif -#if defined(CONFIG_MSM_VIDC_IRIS3) - if (of_device_is_compatible(dev->of_node, "qcom,sm8550-vidc") || - of_device_is_compatible(dev->of_node, "qcom,sm8550-vidc-v2")) { - rc = msm_vidc_init_iris3(core); - if (rc) - d_vpr_e("%s: failed with %d\n", __func__, rc); - return rc; + + /* handle unknown compat type */ + if (i == ARRAY_SIZE(compat_handle)) { + d_vpr_e("%s: Unsupported device: (%s)\n", __func__, dev_name(dev)); + return -EINVAL; } -#endif -#if defined(CONFIG_MSM_VIDC_IRIS33) - if (of_device_is_compatible(dev->of_node, "qcom,sm8650-vidc") || - of_device_is_compatible(dev->of_node, "qcom,sm8650-vidc-v2")) { - rc = msm_vidc_init_iris33(core); - if (rc) - d_vpr_e("%s: failed with %d\n", __func__, rc); - return rc; - } -#endif return rc; } @@ -439,8 +433,8 @@ int msm_vidc_deinit_platform(struct platform_device *pdev) d_vpr_h("%s()\n", __func__); - msm_vidc_deinit_vpu(core, &pdev->dev); - msm_vidc_deinit_platform_variant(core, &pdev->dev); + msm_vidc_deinit_vpu(core); + msm_vidc_deinit_platform_variant(core); msm_vidc_vmem_free((void **)&core->platform); return 0; @@ -479,11 +473,11 @@ int msm_vidc_init_platform(struct platform_device *pdev) if (rc) return rc; - rc = msm_vidc_init_platform_variant(core, &pdev->dev); + rc = msm_vidc_init_platform_variant(core); if (rc) return rc; - rc = msm_vidc_init_vpu(core, &pdev->dev); + rc = msm_vidc_init_vpu(core); if (rc) return rc; diff --git a/driver/platform/kalama/inc/msm_vidc_kalama.h b/driver/platform/kalama/inc/msm_vidc_kalama.h index e9ad036355..8fd11db56c 100644 --- a/driver/platform/kalama/inc/msm_vidc_kalama.h +++ b/driver/platform/kalama/inc/msm_vidc_kalama.h @@ -10,15 +10,15 @@ #include "msm_vidc_core.h" #if defined(CONFIG_MSM_VIDC_KALAMA) -int msm_vidc_init_platform_kalama(struct msm_vidc_core *core, struct device *dev); -int msm_vidc_deinit_platform_kalama(struct msm_vidc_core *core, struct device *dev); +int msm_vidc_init_platform_kalama(struct msm_vidc_core *core); +int msm_vidc_deinit_platform_kalama(struct msm_vidc_core *core); #else -int msm_vidc_init_platform_kalama(struct msm_vidc_core *core, struct device *dev) +int msm_vidc_init_platform_kalama(struct msm_vidc_core *core) { return -EINVAL; } -int msm_vidc_deinit_platform_kalama(struct msm_vidc_core *core, struct device *dev) +int msm_vidc_deinit_platform_kalama(struct msm_vidc_core *core) { return -EINVAL; } diff --git a/driver/platform/kalama/src/kalama.c b/driver/platform/kalama/src/kalama.c deleted file mode 100644 index 547009c089..0000000000 --- a/driver/platform/kalama/src/kalama.c +++ /dev/null @@ -1,1694 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. - */ - -#include "msm_vidc_control.h" -#include "msm_vidc_kalama.h" -#include "msm_vidc_platform.h" -#include "msm_vidc_debug.h" -#include "hfi_property.h" -#include "msm_vidc_iris3.h" -#include "hfi_command.h" - -#define DEFAULT_VIDEO_CONCEAL_COLOR_BLACK 0x8020010 -#define MAX_BASE_LAYER_PRIORITY_ID 63 -#define MAX_OP_POINT 31 -#define MAX_BITRATE 245000000 -#define DEFAULT_BITRATE 20000000 -#define MINIMUM_FPS 1 -#define MAXIMUM_FPS 480 -#define MAX_QP 51 -#define DEFAULT_QP 20 -#define MAX_CONSTANT_QUALITY 100 -#define MIN_SLICE_BYTE_SIZE 512 -#define MAX_SLICE_BYTE_SIZE \ - ((MAX_BITRATE) >> 3) -#define MAX_SLICE_MB_SIZE \ - (((4096 + 15) >> 4) * ((2304 + 15) >> 4)) - -#define ENC MSM_VIDC_ENCODER -#define DEC MSM_VIDC_DECODER -#define H264 MSM_VIDC_H264 -#define HEVC MSM_VIDC_HEVC -#define VP9 MSM_VIDC_VP9 -#define CODECS_ALL (H264 | HEVC | VP9) -#define MAXIMUM_OVERRIDE_VP9_FPS 180 - -#ifndef V4L2_PIX_FMT_QC08C -#define V4L2_PIX_FMT_QC08C v4l2_fourcc('Q', '0', '8', 'C') -#endif - -#ifndef V4L2_PIX_FMT_QC10C -#define V4L2_PIX_FMT_QC10C v4l2_fourcc('Q', '1', '0', 'C') -#endif - -static struct codec_info codec_data_kalama[] = { - { - .v4l2_codec = V4L2_PIX_FMT_H264, - .vidc_codec = MSM_VIDC_H264, - .pixfmt_name = "AVC", - }, - { - .v4l2_codec = V4L2_PIX_FMT_HEVC, - .vidc_codec = MSM_VIDC_HEVC, - .pixfmt_name = "HEVC", - }, - { - .v4l2_codec = V4L2_PIX_FMT_VP9, - .vidc_codec = MSM_VIDC_VP9, - .pixfmt_name = "VP9", - }, -}; - -static struct color_format_info color_format_data_kalama[] = { - { - .v4l2_color_format = V4L2_PIX_FMT_NV12, - .vidc_color_format = MSM_VIDC_FMT_NV12, - .pixfmt_name = "NV12", - }, - { - .v4l2_color_format = V4L2_PIX_FMT_NV21, - .vidc_color_format = MSM_VIDC_FMT_NV21, - .pixfmt_name = "NV21", - }, - { - .v4l2_color_format = V4L2_PIX_FMT_QC08C, - .vidc_color_format = MSM_VIDC_FMT_NV12C, - .pixfmt_name = "NV12C", - }, - { - .v4l2_color_format = V4L2_PIX_FMT_QC10C, - .vidc_color_format = MSM_VIDC_FMT_TP10C, - .pixfmt_name = "TP10C", - }, - { - .v4l2_color_format = V4L2_PIX_FMT_RGBA32, - .vidc_color_format = MSM_VIDC_FMT_RGBA8888, - .pixfmt_name = "RGBA", - }, -}; - -static struct color_primaries_info color_primaries_data_kalama[] = { - { - .v4l2_color_primaries = V4L2_COLORSPACE_DEFAULT, - .vidc_color_primaries = MSM_VIDC_PRIMARIES_RESERVED, - }, - { - .v4l2_color_primaries = V4L2_COLORSPACE_REC709, - .vidc_color_primaries = MSM_VIDC_PRIMARIES_BT709, - }, - { - .v4l2_color_primaries = V4L2_COLORSPACE_470_SYSTEM_M, - .vidc_color_primaries = MSM_VIDC_PRIMARIES_BT470_SYSTEM_M, - }, - { - .v4l2_color_primaries = V4L2_COLORSPACE_470_SYSTEM_BG, - .vidc_color_primaries = MSM_VIDC_PRIMARIES_BT470_SYSTEM_BG, - }, - { - .v4l2_color_primaries = V4L2_COLORSPACE_SMPTE170M, - .vidc_color_primaries = MSM_VIDC_PRIMARIES_BT601_525, - }, - { - .v4l2_color_primaries = V4L2_COLORSPACE_SMPTE240M, - .vidc_color_primaries = MSM_VIDC_PRIMARIES_SMPTE_ST240M, - }, - { - .v4l2_color_primaries = V4L2_COLORSPACE_BT2020, - .vidc_color_primaries = MSM_VIDC_PRIMARIES_BT2020, - }, - { - .v4l2_color_primaries = V4L2_COLORSPACE_DCI_P3, - .vidc_color_primaries = MSM_VIDC_PRIMARIES_SMPTE_RP431_2, - }, -}; - -static struct transfer_char_info transfer_char_data_kalama[] = { - { - .v4l2_transfer_char = V4L2_XFER_FUNC_DEFAULT, - .vidc_transfer_char = MSM_VIDC_TRANSFER_RESERVED, - }, - { - .v4l2_transfer_char = V4L2_XFER_FUNC_709, - .vidc_transfer_char = MSM_VIDC_TRANSFER_BT709, - }, - { - .v4l2_transfer_char = V4L2_XFER_FUNC_SMPTE240M, - .vidc_transfer_char = MSM_VIDC_TRANSFER_SMPTE_ST240M, - }, - { - .v4l2_transfer_char = V4L2_XFER_FUNC_SRGB, - .vidc_transfer_char = MSM_VIDC_TRANSFER_SRGB_SYCC, - }, - { - .v4l2_transfer_char = V4L2_XFER_FUNC_SMPTE2084, - .vidc_transfer_char = MSM_VIDC_TRANSFER_SMPTE_ST2084_PQ, - }, -}; - -static struct matrix_coeff_info matrix_coeff_data_kalama[] = { - { - .v4l2_matrix_coeff = V4L2_YCBCR_ENC_DEFAULT, - .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_RESERVED, - }, - { - .v4l2_matrix_coeff = V4L2_YCBCR_ENC_709, - .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_BT709, - }, - { - .v4l2_matrix_coeff = V4L2_YCBCR_ENC_XV709, - .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_BT709, - }, - { - .v4l2_matrix_coeff = V4L2_YCBCR_ENC_XV601, - .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_BT470_SYS_BG_OR_BT601_625, - }, - { - .v4l2_matrix_coeff = V4L2_YCBCR_ENC_601, - .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_BT601_525_BT1358_525_OR_625, - }, - { - .v4l2_matrix_coeff = V4L2_YCBCR_ENC_SMPTE240M, - .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_SMPTE_ST240, - }, - { - .v4l2_matrix_coeff = V4L2_YCBCR_ENC_BT2020, - .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_BT2020_NON_CONSTANT, - }, - { - .v4l2_matrix_coeff = V4L2_YCBCR_ENC_BT2020_CONST_LUM, - .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_BT2020_CONSTANT, - }, -}; - -static struct msm_platform_core_capability core_data_kalama[] = { - /* {type, value} */ - {ENC_CODECS, H264|HEVC}, - {DEC_CODECS, H264|HEVC|VP9}, - {MAX_SESSION_COUNT, 16}, - {MAX_NUM_720P_SESSIONS, 16}, - {MAX_NUM_1080P_SESSIONS, 16}, - {MAX_NUM_4K_SESSIONS, 8}, - {MAX_NUM_8K_SESSIONS, 2}, - {MAX_RT_MBPF, 174080}, /* (8192x4352)/256 + (4096x2176)/256*/ - {MAX_MBPF, 278528}, /* ((8192x4352)/256) * 2 */ - {MAX_MBPS, 7833600}, /* max_load - * 7680x4320@60fps or 3840x2176@240fps - * which is greater than 4096x2176@120fps, - * 8192x4320@48fps - */ - {MAX_MBPF_HQ, 8160}, /* ((1920x1088)/256) */ - {MAX_MBPS_HQ, 489600}, /* ((1920x1088)/256)@60fps */ - {MAX_MBPF_B_FRAME, 32640}, /* 3840x2176/256 */ - {MAX_MBPS_B_FRAME, 1958400}, /* 3840x2176/256 MBs@60fps */ - {MAX_MBPS_ALL_INTRA, 1044480}, /* 4096x2176/256 MBs@30fps */ - {MAX_ENH_LAYER_COUNT, 5}, - {NUM_VPP_PIPE, 4}, - {SW_PC, 1}, - {FW_UNLOAD, 0}, - {HW_RESPONSE_TIMEOUT, HW_RESPONSE_TIMEOUT_VALUE}, /* 1000 ms */ - {SW_PC_DELAY, SW_PC_DELAY_VALUE }, /* 1500 ms (>HW_RESPONSE_TIMEOUT)*/ - {FW_UNLOAD_DELAY, FW_UNLOAD_DELAY_VALUE }, /* 3000 ms (>SW_PC_DELAY)*/ - {DCVS, 1}, - {DECODE_BATCH, 1}, - {DECODE_BATCH_TIMEOUT, 200}, - {STATS_TIMEOUT_MS, 2000}, - {NON_FATAL_FAULTS, 1}, - {ENC_AUTO_FRAMERATE, 1}, - {DEVICE_CAPS, V4L2_CAP_VIDEO_M2M_MPLANE | V4L2_CAP_STREAMING}, - {SUPPORTS_REQUESTS, 0}, -}; - -static struct msm_platform_inst_capability instance_cap_data_kalama[] = { - /* {cap, domain, codec, - * min, max, step_or_mask, value, - * v4l2_id, - * hfi_id, - * flags} - */ - - {FRAME_WIDTH, DEC, CODECS_ALL, 96, 8192, 1, 1920}, - - {FRAME_WIDTH, DEC, VP9, 96, 4096, 1, 1920}, - - {FRAME_WIDTH, ENC, CODECS_ALL, 128, 8192, 1, 1920}, - - {FRAME_WIDTH, ENC, HEVC, 96, 8192, 1, 1920}, - - {LOSSLESS_FRAME_WIDTH, ENC, CODECS_ALL, 128, 4096, 1, 1920}, - - {LOSSLESS_FRAME_WIDTH, ENC, HEVC, 96, 4096, 1, 1920}, - - {FRAME_HEIGHT, DEC, CODECS_ALL, 96, 8192, 1, 1080}, - - {FRAME_HEIGHT, DEC, VP9, 96, 4096, 1, 1080}, - - {FRAME_HEIGHT, ENC, CODECS_ALL, 128, 8192, 1, 1080}, - - {FRAME_HEIGHT, ENC, HEVC, 96, 8192, 1, 1080}, - - {LOSSLESS_FRAME_HEIGHT, ENC, CODECS_ALL, 128, 4096, 1, 1080}, - - {LOSSLESS_FRAME_HEIGHT, ENC, HEVC, 96, 4096, 1, 1080}, - - {PIX_FMTS, ENC|DEC, H264, - MSM_VIDC_FMT_NV12, - MSM_VIDC_FMT_NV12C, - MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C, - MSM_VIDC_FMT_NV12C}, - - {PIX_FMTS, ENC|DEC, HEVC|VP9, - MSM_VIDC_FMT_NV12, - MSM_VIDC_FMT_TP10C, - MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C | - MSM_VIDC_FMT_TP10C, - MSM_VIDC_FMT_NV12C}, - - {MIN_BUFFERS_INPUT, ENC|DEC, CODECS_ALL, 0, 64, 1, 4, - V4L2_CID_MIN_BUFFERS_FOR_OUTPUT, - 0, - CAP_FLAG_VOLATILE}, - - - {MIN_BUFFERS_OUTPUT, ENC|DEC, CODECS_ALL, - 0, 64, 1, 4, - V4L2_CID_MIN_BUFFERS_FOR_CAPTURE, - HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_VOLATILE}, - - /* (8192 * 4320) / 256 */ - {MBPF, ENC, CODECS_ALL, 64, 138240, 1, 138240}, - - {MBPF, ENC, HEVC, 36, 138240, 1, 138240}, - - {MBPF, DEC, CODECS_ALL, 36, 138240, 1, 138240}, - - /* (4096 * 2304) / 256 */ - {MBPF, DEC, VP9, 36, 36864, 1, 36864}, - - /* (4096 * 2304) / 256 */ - {LOSSLESS_MBPF, ENC, H264|HEVC, 64, 36864, 1, 36864}, - - /* Batch Mode Decode */ - /* TODO: update with new values based on updated voltage corner */ - {BATCH_MBPF, DEC, H264|HEVC|VP9, 64, 34816, 1, 34816}, - - /* (4096 * 2304) / 256 */ - {BATCH_FPS, DEC, H264|HEVC|VP9, 1, 120, 1, 120}, - - {FRAME_RATE, ENC, CODECS_ALL, - (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), - 1, (DEFAULT_FPS << 16), - 0, - HFI_PROP_FRAME_RATE, - CAP_FLAG_OUTPUT_PORT}, - - {OPERATING_RATE, ENC, CODECS_ALL, - (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), - 1, (DEFAULT_FPS << 16)}, - - {INPUT_RATE, ENC|DEC, CODECS_ALL, - (MINIMUM_FPS << 16), INT_MAX, - 1, (DEFAULT_FPS << 16)}, - - {TIMESTAMP_RATE, ENC|DEC, CODECS_ALL, - (MINIMUM_FPS << 16), INT_MAX, - 1, (DEFAULT_FPS << 16)}, - - {SCALE_FACTOR, ENC, H264|HEVC, 1, 8, 1, 8}, - - {MB_CYCLES_VSP, ENC, CODECS_ALL, 25, 25, 1, 25}, - - {MB_CYCLES_VSP, DEC, CODECS_ALL, 25, 25, 1, 25}, - - {MB_CYCLES_VSP, DEC, VP9, 60, 60, 1, 60}, - - {MB_CYCLES_VPP, ENC, CODECS_ALL, 675, 675, 1, 675}, - - {MB_CYCLES_VPP, DEC, CODECS_ALL, 200, 200, 1, 200}, - - {MB_CYCLES_LP, ENC, CODECS_ALL, 320, 320, 1, 320}, - - {MB_CYCLES_LP, DEC, CODECS_ALL, 200, 200, 1, 200}, - - {MB_CYCLES_FW, ENC|DEC, CODECS_ALL, 489583, 489583, 1, 489583}, - - {MB_CYCLES_FW_VPP, ENC, CODECS_ALL, 48405, 48405, 1, 48405}, - - {MB_CYCLES_FW_VPP, DEC, CODECS_ALL, 66234, 66234, 1, 66234}, - - {CLIENT_ID, ENC|DEC, CODECS_ALL, - INVALID_CLIENT_ID, INT_MAX, 1, INVALID_CLIENT_ID, - 0}, - - {HFLIP, ENC, CODECS_ALL, - 0, 1, 1, 0, - V4L2_CID_HFLIP, - HFI_PROP_FLIP, - CAP_FLAG_OUTPUT_PORT | - CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - - {VFLIP, ENC, CODECS_ALL, - 0, 1, 1, 0, - V4L2_CID_VFLIP, - HFI_PROP_FLIP, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {ROTATION, ENC, CODECS_ALL, - 0, 270, 90, 0, - V4L2_CID_ROTATE, - HFI_PROP_ROTATION, - CAP_FLAG_OUTPUT_PORT}, - - {SUPER_FRAME, ENC, H264|HEVC, - 0, 32, 1, 0, - 0, 0, - CAP_FLAG_NONE}, - - {SLICE_DECODE, DEC, CODECS_ALL, - 0, 0, 0, 0, - V4L2_CID_MPEG_VIDEO_DECODER_SLICE_INTERFACE, - 0}, - - {HEADER_MODE, ENC, CODECS_ALL, - V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE, - V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME, - BIT(V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE) | - BIT(V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME), - V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE, - V4L2_CID_MPEG_VIDEO_HEADER_MODE, - HFI_PROP_SEQ_HEADER_MODE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {PREPEND_SPSPPS_TO_IDR, ENC, CODECS_ALL, - 0, 1, 1, 0, - V4L2_CID_MPEG_VIDEO_PREPEND_SPSPPS_TO_IDR}, - - {WITHOUT_STARTCODE, ENC, CODECS_ALL, - 0, 1, 1, 0, - V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE, - HFI_PROP_NAL_LENGTH_FIELD, - CAP_FLAG_OUTPUT_PORT}, - - {NAL_LENGTH_FIELD, ENC, CODECS_ALL, - V4L2_MPEG_VIDEO_HEVC_SIZE_0, - V4L2_MPEG_VIDEO_HEVC_SIZE_4, - BIT(V4L2_MPEG_VIDEO_HEVC_SIZE_0) | - BIT(V4L2_MPEG_VIDEO_HEVC_SIZE_4), - V4L2_MPEG_VIDEO_HEVC_SIZE_0, - V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD, - HFI_PROP_NAL_LENGTH_FIELD, - CAP_FLAG_MENU | CAP_FLAG_OUTPUT_PORT}, - - /* TODO: Firmware introduced enumeration type for this - * with and without seq header. - */ - {REQUEST_I_FRAME, ENC, H264|HEVC, - 0, 0, 0, 0, - V4L2_CID_MPEG_VIDEO_FORCE_KEY_FRAME, - HFI_PROP_REQUEST_SYNC_FRAME, - CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - - /* Enc: Keeping CABAC and CAVLC as same bitrate. - * Dec: there's no use of Bitrate cap - */ - {BIT_RATE, ENC, H264|HEVC, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_BITRATE, - HFI_PROP_TOTAL_BITRATE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {BITRATE_MODE, ENC, H264, - V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, - V4L2_MPEG_VIDEO_BITRATE_MODE_CBR, - BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_VBR) | - BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CBR), - V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, - V4L2_CID_MPEG_VIDEO_BITRATE_MODE, - HFI_PROP_RATE_CONTROL, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {BITRATE_MODE, ENC, HEVC, - V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, - V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, - BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_VBR) | - BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CBR) | - BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CQ), - V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, - V4L2_CID_MPEG_VIDEO_BITRATE_MODE, - HFI_PROP_RATE_CONTROL, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {CABAC_MAX_BITRATE, ENC, H264|HEVC, 0, - 160000000, 1, 160000000}, - - {CAVLC_MAX_BITRATE, ENC, H264, 0, - 220000000, 1, 220000000}, - - {ALLINTRA_MAX_BITRATE, ENC, H264|HEVC, 0, - 245000000, 1, 245000000}, - - {LOWLATENCY_MAX_BITRATE, ENC, H264|HEVC, 0, - 70000000, 1, 70000000}, - - {LOSSLESS, ENC, HEVC, - 0, 1, 1, 0, - V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU}, - - {FRAME_SKIP_MODE, ENC, H264|HEVC, - V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED, - V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT, - BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED) | - BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_LEVEL_LIMIT) | - BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT), - V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED, - V4L2_CID_MPEG_VIDEO_FRAME_SKIP_MODE, - 0, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {FRAME_RC_ENABLE, ENC, H264|HEVC, - 0, 1, 1, 1, - V4L2_CID_MPEG_VIDEO_FRAME_RC_ENABLE}, - - {CONSTANT_QUALITY, ENC, HEVC, - 1, MAX_CONSTANT_QUALITY, 1, 90, - V4L2_CID_MPEG_VIDEO_CONSTANT_QUALITY, - HFI_PROP_CONSTANT_QUALITY, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {GOP_SIZE, ENC, CODECS_ALL, - 0, INT_MAX, 1, 2 * DEFAULT_FPS - 1, - V4L2_CID_MPEG_VIDEO_GOP_SIZE, - HFI_PROP_MAX_GOP_FRAMES, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {GOP_CLOSURE, ENC, H264|HEVC, - 0, 1, 1, 1, - V4L2_CID_MPEG_VIDEO_GOP_CLOSURE, - 0}, - - {B_FRAME, ENC, H264|HEVC, - 0, 7, 1, 0, - V4L2_CID_MPEG_VIDEO_B_FRAMES, - HFI_PROP_MAX_B_FRAMES, - CAP_FLAG_OUTPUT_PORT}, - - {BLUR_TYPES, ENC, H264|HEVC, - MSM_VIDC_BLUR_NONE, MSM_VIDC_BLUR_EXTERNAL, - BIT(MSM_VIDC_BLUR_NONE) | BIT(MSM_VIDC_BLUR_EXTERNAL), - MSM_VIDC_BLUR_NONE, - 0, - HFI_PROP_BLUR_TYPES, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {CSC, ENC, CODECS_ALL, - 0, 1, 1, 0, - 0, - HFI_PROP_CSC}, - - {LOWLATENCY_MODE, ENC, H264|HEVC, - 0, 1, 1, 0, - 0, - 0, - CAP_FLAG_NONE}, - - {LOWLATENCY_MODE, DEC, H264|HEVC|VP9, - 0, 1, 1, 0, - 0, - HFI_PROP_SEQ_CHANGE_AT_SYNC_FRAME, - CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - - {LTR_COUNT, ENC, H264|HEVC, - 0, MAX_LTR_FRAME_COUNT_2, 1, 0, - V4L2_CID_MPEG_VIDEO_LTR_COUNT, - HFI_PROP_LTR_COUNT, - CAP_FLAG_OUTPUT_PORT}, - - {USE_LTR, ENC, H264|HEVC, - 0, - ((1 << MAX_LTR_FRAME_COUNT_2) - 1), - 0, 0, - V4L2_CID_MPEG_VIDEO_USE_LTR_FRAMES, - HFI_PROP_LTR_USE, - CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - - {MARK_LTR, ENC, H264|HEVC, - INVALID_DEFAULT_MARK_OR_USE_LTR, - (MAX_LTR_FRAME_COUNT_2 - 1), - 1, INVALID_DEFAULT_MARK_OR_USE_LTR, - V4L2_CID_MPEG_VIDEO_FRAME_LTR_INDEX, - HFI_PROP_LTR_MARK, - CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - - {BASELAYER_PRIORITY, ENC, H264, - 0, MAX_BASE_LAYER_PRIORITY_ID, 1, 0, - V4L2_CID_MPEG_VIDEO_BASELAYER_PRIORITY_ID, - HFI_PROP_BASELAYER_PRIORITYID, - CAP_FLAG_OUTPUT_PORT}, - - {AU_DELIMITER, ENC, H264|HEVC, - 0, 1, 1, 0, - V4L2_CID_MPEG_VIDEO_AU_DELIMITER, - HFI_PROP_AUD, - CAP_FLAG_OUTPUT_PORT}, - - {CONTENT_ADAPTIVE_CODING, ENC, H264|HEVC, - 0, 1, 1, 1, - 0, - HFI_PROP_CONTENT_ADAPTIVE_CODING, - CAP_FLAG_OUTPUT_PORT}, - - {REQUEST_PREPROCESS, ENC, H264|HEVC, - MSM_VIDC_PREPROCESS_NONE, - MSM_VIDC_PREPROCESS_TYPE0, - BIT(MSM_VIDC_PREPROCESS_NONE) | - BIT(MSM_VIDC_PREPROCESS_TYPE0), - MSM_VIDC_PREPROCESS_NONE, - 0, HFI_PROP_REQUEST_PREPROCESS, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {MIN_QUALITY, ENC, H264|HEVC, - 0, MAX_SUPPORTED_MIN_QUALITY, 70, MAX_SUPPORTED_MIN_QUALITY, - 0, - HFI_PROP_MAINTAIN_MIN_QUALITY, - CAP_FLAG_OUTPUT_PORT}, - - {VBV_DELAY, ENC, H264|HEVC, - 200, 300, 100, 300, - V4L2_CID_MPEG_VIDEO_VBV_DELAY, - HFI_PROP_VBV_DELAY, - CAP_FLAG_OUTPUT_PORT}, - - {PEAK_BITRATE, ENC, H264|HEVC, - /* default peak bitrate is 10% larger than avg bitrate */ - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_BITRATE_PEAK, - HFI_PROP_TOTAL_PEAK_BITRATE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {MIN_FRAME_QP, ENC, H264, - MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, - V4L2_CID_MPEG_VIDEO_H264_MIN_QP, - HFI_PROP_MIN_QP_PACKED, - CAP_FLAG_OUTPUT_PORT}, - - {MIN_FRAME_QP, ENC, HEVC, - MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, - V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP, - HFI_PROP_MIN_QP_PACKED, - CAP_FLAG_OUTPUT_PORT}, - - {I_FRAME_MIN_QP, ENC, H264, - MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, - V4L2_CID_MPEG_VIDEO_H264_I_FRAME_MIN_QP}, - - {I_FRAME_MIN_QP, ENC, HEVC, - MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, - V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_MIN_QP}, - - {P_FRAME_MIN_QP, ENC, H264, - MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, - V4L2_CID_MPEG_VIDEO_H264_P_FRAME_MIN_QP}, - - {P_FRAME_MIN_QP, ENC, HEVC, - MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, - V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_MIN_QP}, - - {B_FRAME_MIN_QP, ENC, H264, - MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, - V4L2_CID_MPEG_VIDEO_H264_B_FRAME_MIN_QP}, - - {B_FRAME_MIN_QP, ENC, HEVC, - MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, - V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_MIN_QP}, - - {MAX_FRAME_QP, ENC, H264, - MIN_QP_8BIT, MAX_QP, 1, MAX_QP, - V4L2_CID_MPEG_VIDEO_H264_MAX_QP, - HFI_PROP_MAX_QP_PACKED, - CAP_FLAG_OUTPUT_PORT}, - - {MAX_FRAME_QP, ENC, HEVC, - MIN_QP_10BIT, MAX_QP, 1, MAX_QP, - V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP, - HFI_PROP_MAX_QP_PACKED, - CAP_FLAG_OUTPUT_PORT}, - - {I_FRAME_MAX_QP, ENC, H264, - MIN_QP_8BIT, MAX_QP, 1, MAX_QP, - V4L2_CID_MPEG_VIDEO_H264_I_FRAME_MAX_QP}, - - {I_FRAME_MAX_QP, ENC, HEVC, - MIN_QP_10BIT, MAX_QP, 1, MAX_QP, - V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_MAX_QP}, - - {P_FRAME_MAX_QP, ENC, H264, - MIN_QP_8BIT, MAX_QP, 1, MAX_QP, - V4L2_CID_MPEG_VIDEO_H264_P_FRAME_MAX_QP}, - - {P_FRAME_MAX_QP, ENC, HEVC, - MIN_QP_10BIT, MAX_QP, 1, MAX_QP, - V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_MAX_QP}, - - {B_FRAME_MAX_QP, ENC, H264, - MIN_QP_8BIT, MAX_QP, 1, MAX_QP, - V4L2_CID_MPEG_VIDEO_H264_B_FRAME_MAX_QP}, - - {B_FRAME_MAX_QP, ENC, HEVC, - MIN_QP_10BIT, MAX_QP, 1, MAX_QP, - V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_MAX_QP}, - - {I_FRAME_QP, ENC, HEVC, - MIN_QP_10BIT, MAX_QP, 1, DEFAULT_QP, - V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP, - HFI_PROP_QP_PACKED, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {I_FRAME_QP, ENC, H264, - MIN_QP_8BIT, MAX_QP, 1, DEFAULT_QP, - V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP, - HFI_PROP_QP_PACKED, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {P_FRAME_QP, ENC, HEVC, - MIN_QP_10BIT, MAX_QP, 1, DEFAULT_QP, - V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP, - HFI_PROP_QP_PACKED, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {P_FRAME_QP, ENC, H264, - MIN_QP_8BIT, MAX_QP, 1, DEFAULT_QP, - V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP, - HFI_PROP_QP_PACKED, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {B_FRAME_QP, ENC, HEVC, - MIN_QP_10BIT, MAX_QP, 1, DEFAULT_QP, - V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP, - HFI_PROP_QP_PACKED, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {B_FRAME_QP, ENC, H264, - MIN_QP_8BIT, MAX_QP, 1, DEFAULT_QP, - V4L2_CID_MPEG_VIDEO_H264_B_FRAME_QP, - HFI_PROP_QP_PACKED, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {LAYER_TYPE, ENC, HEVC, - V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B, - V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P, - BIT(V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B) | - BIT(V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P), - V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P, - V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE, - HFI_PROP_LAYER_ENCODING_TYPE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {LAYER_TYPE, ENC, H264, - V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_B, - V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P, - BIT(V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_B) | - BIT(V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P), - V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P, - V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_TYPE, - HFI_PROP_LAYER_ENCODING_TYPE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {LAYER_ENABLE, ENC, H264, - 0, 1, 1, 0, - V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING, - HFI_PROP_LAYER_ENCODING_TYPE, - CAP_FLAG_OUTPUT_PORT}, - - {LAYER_ENABLE, ENC, HEVC, - 0, 1, 1, 0, - 0, - 0, - CAP_FLAG_OUTPUT_PORT}, - - {ENH_LAYER_COUNT, ENC, HEVC, - 0, 5, 1, 0, - V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER, - HFI_PROP_LAYER_COUNT, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {ENH_LAYER_COUNT, ENC, H264, - 0, 5, 1, 0, - V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_LAYER, - HFI_PROP_LAYER_COUNT, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {L0_BR, ENC, H264, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L0_BR, - HFI_PROP_BITRATE_LAYER1, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {L0_BR, ENC, HEVC, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L0_BR, - HFI_PROP_BITRATE_LAYER1, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {L1_BR, ENC, H264, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L1_BR, - HFI_PROP_BITRATE_LAYER2, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {L1_BR, ENC, HEVC, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L1_BR, - HFI_PROP_BITRATE_LAYER2, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {L2_BR, ENC, H264, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L2_BR, - HFI_PROP_BITRATE_LAYER3, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {L2_BR, ENC, HEVC, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L2_BR, - HFI_PROP_BITRATE_LAYER3, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {L3_BR, ENC, H264, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L3_BR, - HFI_PROP_BITRATE_LAYER4, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - {L3_BR, ENC, HEVC, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L3_BR, - HFI_PROP_BITRATE_LAYER4, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {L4_BR, ENC, H264, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L4_BR, - HFI_PROP_BITRATE_LAYER5, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {L4_BR, ENC, HEVC, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L4_BR, - HFI_PROP_BITRATE_LAYER5, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {L5_BR, ENC, H264, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L5_BR, - HFI_PROP_BITRATE_LAYER6, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {L5_BR, ENC, HEVC, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L5_BR, - HFI_PROP_BITRATE_LAYER6, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {ENTROPY_MODE, ENC, H264, - V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC, - V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, - BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC) | - BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC), - V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, - V4L2_CID_MPEG_VIDEO_H264_ENTROPY_MODE, - HFI_PROP_CABAC_SESSION, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {ENTROPY_MODE, DEC, H264|HEVC|VP9, - V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC, - V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, - BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC) | - BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC), - V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, - 0, - HFI_PROP_CABAC_SESSION}, - - {PROFILE, ENC|DEC, H264, - V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE, - V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH, - BIT(V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE) | - BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH) | - BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_BASELINE) | - BIT(V4L2_MPEG_VIDEO_H264_PROFILE_MAIN) | - BIT(V4L2_MPEG_VIDEO_H264_PROFILE_HIGH), - V4L2_MPEG_VIDEO_H264_PROFILE_HIGH, - V4L2_CID_MPEG_VIDEO_H264_PROFILE, - HFI_PROP_PROFILE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {PROFILE, ENC|DEC, HEVC, - V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN, - V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE, - BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN) | - BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE) | - BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10) | - BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE), - V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN, - V4L2_CID_MPEG_VIDEO_HEVC_PROFILE, - HFI_PROP_PROFILE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {PROFILE, DEC, VP9, - V4L2_MPEG_VIDEO_VP9_PROFILE_0, - V4L2_MPEG_VIDEO_VP9_PROFILE_2, - BIT(V4L2_MPEG_VIDEO_VP9_PROFILE_0) | - BIT(V4L2_MPEG_VIDEO_VP9_PROFILE_2), - V4L2_MPEG_VIDEO_VP9_PROFILE_0, - V4L2_CID_MPEG_VIDEO_VP9_PROFILE, - HFI_PROP_PROFILE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {LEVEL, ENC, H264, - V4L2_MPEG_VIDEO_H264_LEVEL_1_0, - V4L2_MPEG_VIDEO_H264_LEVEL_6_0, - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1B) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_3) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_0), - V4L2_MPEG_VIDEO_H264_LEVEL_5_0, - V4L2_CID_MPEG_VIDEO_H264_LEVEL, - HFI_PROP_LEVEL, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {LEVEL, ENC, HEVC, - V4L2_MPEG_VIDEO_HEVC_LEVEL_1, - V4L2_MPEG_VIDEO_HEVC_LEVEL_6, - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6), - V4L2_MPEG_VIDEO_HEVC_LEVEL_5, - V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, - HFI_PROP_LEVEL, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {LEVEL, DEC, H264, - V4L2_MPEG_VIDEO_H264_LEVEL_1_0, - V4L2_MPEG_VIDEO_H264_LEVEL_6_2, - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1B) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_3) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_2), - V4L2_MPEG_VIDEO_H264_LEVEL_6_1, - V4L2_CID_MPEG_VIDEO_H264_LEVEL, - HFI_PROP_LEVEL, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {LEVEL, DEC, HEVC, - V4L2_MPEG_VIDEO_HEVC_LEVEL_1, - V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2, - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1)| - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2), - V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1, - V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, - HFI_PROP_LEVEL, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {LEVEL, DEC, VP9, - V4L2_MPEG_VIDEO_VP9_LEVEL_1_0, - V4L2_MPEG_VIDEO_VP9_LEVEL_6_0, - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_1_0) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_1_1) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_2_0) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_2_1) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_3_0) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_3_1) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_4_0) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_4_1) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_0) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_1) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_2) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_6_0), - V4L2_MPEG_VIDEO_VP9_LEVEL_6_0, - V4L2_CID_MPEG_VIDEO_VP9_LEVEL, - HFI_PROP_LEVEL, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {HEVC_TIER, ENC|DEC, HEVC, - V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, - V4L2_MPEG_VIDEO_HEVC_TIER_HIGH, - BIT(V4L2_MPEG_VIDEO_HEVC_TIER_MAIN) | - BIT(V4L2_MPEG_VIDEO_HEVC_TIER_HIGH), - V4L2_MPEG_VIDEO_HEVC_TIER_HIGH, - V4L2_CID_MPEG_VIDEO_HEVC_TIER, - HFI_PROP_TIER, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {LF_MODE, ENC, H264, - V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED, - DB_H264_DISABLE_SLICE_BOUNDARY, - BIT(V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED) | - BIT(V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_DISABLED) | - BIT(DB_H264_DISABLE_SLICE_BOUNDARY), - V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED, - V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_MODE, - HFI_PROP_DEBLOCKING_MODE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {LF_MODE, ENC, HEVC, - V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_DISABLED, - DB_HEVC_DISABLE_SLICE_BOUNDARY, - BIT(V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_DISABLED) | - BIT(V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_ENABLED) | - BIT(DB_HEVC_DISABLE_SLICE_BOUNDARY), - V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_ENABLED, - V4L2_CID_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE, - HFI_PROP_DEBLOCKING_MODE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {LF_ALPHA, ENC, H264, - -6, 6, 1, 0, - V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_ALPHA}, - - {LF_ALPHA, ENC, HEVC, - -6, 6, 1, 0, - V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2}, - - {LF_BETA, ENC, H264, - -6, 6, 1, 0, - V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_BETA}, - - {LF_BETA, ENC, HEVC, - -6, 6, 1, 0, - V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2}, - - {SLICE_MODE, ENC, H264|HEVC, - V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, - V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_BYTES, - BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE) | - BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_MB) | - BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_BYTES), - V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, - V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE, - 0, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {SLICE_MAX_BYTES, ENC, H264|HEVC, - MIN_SLICE_BYTE_SIZE, MAX_SLICE_BYTE_SIZE, - 1, MIN_SLICE_BYTE_SIZE, - V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES, - HFI_PROP_MULTI_SLICE_BYTES_COUNT, - CAP_FLAG_OUTPUT_PORT}, - - {SLICE_MAX_MB, ENC, H264|HEVC, - 1, MAX_SLICE_MB_SIZE, 1, 1, - V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB, - HFI_PROP_MULTI_SLICE_MB_COUNT, - CAP_FLAG_OUTPUT_PORT}, - - {MB_RC, ENC, H264|HEVC, - 0, 1, 1, 1, - V4L2_CID_MPEG_VIDEO_MB_RC_ENABLE, - 0, - CAP_FLAG_OUTPUT_PORT}, - - {TRANSFORM_8X8, ENC, H264, - 0, 1, 1, 1, - V4L2_CID_MPEG_VIDEO_H264_8X8_TRANSFORM, - HFI_PROP_8X8_TRANSFORM, - CAP_FLAG_OUTPUT_PORT}, - - {CHROMA_QP_INDEX_OFFSET, ENC, HEVC, - MIN_CHROMA_QP_OFFSET, MAX_CHROMA_QP_OFFSET, - 1, MAX_CHROMA_QP_OFFSET, - V4L2_CID_MPEG_VIDEO_H264_CHROMA_QP_INDEX_OFFSET, - HFI_PROP_CHROMA_QP_OFFSET, - CAP_FLAG_OUTPUT_PORT}, - - {DISPLAY_DELAY_ENABLE, DEC, H264|HEVC|VP9, - 0, 1, 1, 0, - V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY_ENABLE, - HFI_PROP_DECODE_ORDER_OUTPUT, - CAP_FLAG_INPUT_PORT}, - - {DISPLAY_DELAY, DEC, H264|HEVC|VP9, - 0, 1, 1, 0, - V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY, - HFI_PROP_DECODE_ORDER_OUTPUT, - CAP_FLAG_INPUT_PORT}, - - {OUTPUT_ORDER, DEC, H264|HEVC|VP9, - 0, 1, 1, 0, - 0, - HFI_PROP_DECODE_ORDER_OUTPUT, - CAP_FLAG_INPUT_PORT}, - - {INPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL, - DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT, - 1, DEFAULT_MAX_HOST_BUF_COUNT, - 0, - HFI_PROP_BUFFER_HOST_MAX_COUNT, - CAP_FLAG_INPUT_PORT}, - - {OUTPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL, - DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT, - 1, DEFAULT_MAX_HOST_BUF_COUNT, - 0, - HFI_PROP_BUFFER_HOST_MAX_COUNT, - CAP_FLAG_OUTPUT_PORT}, - - {CONCEAL_COLOR_8BIT, DEC, CODECS_ALL, 0x0, 0xff3fcff, 1, - DEFAULT_VIDEO_CONCEAL_COLOR_BLACK, - V4L2_CID_MPEG_VIDEO_MUTE_YUV, - HFI_PROP_CONCEAL_COLOR_8BIT, - CAP_FLAG_INPUT_PORT}, - - {CONCEAL_COLOR_10BIT, DEC, CODECS_ALL, 0x0, 0x3fffffff, 1, - DEFAULT_VIDEO_CONCEAL_COLOR_BLACK, - V4L2_CID_MPEG_VIDEO_MUTE_YUV, - HFI_PROP_CONCEAL_COLOR_10BIT, - CAP_FLAG_INPUT_PORT}, - - {STAGE, DEC|ENC, CODECS_ALL, - MSM_VIDC_STAGE_1, - MSM_VIDC_STAGE_2, 1, - MSM_VIDC_STAGE_2, - 0, - HFI_PROP_STAGE}, - - {PIPE, DEC|ENC, CODECS_ALL, - MSM_VIDC_PIPE_1, - MSM_VIDC_PIPE_4, 1, - MSM_VIDC_PIPE_4, - 0, - HFI_PROP_PIPE}, - - {POC, DEC, H264, 0, 2, 1, 1, - 0, - HFI_PROP_PIC_ORDER_CNT_TYPE}, - - {QUALITY_MODE, ENC, CODECS_ALL, - MSM_VIDC_MAX_QUALITY_MODE, - MSM_VIDC_POWER_SAVE_MODE, 1, - MSM_VIDC_POWER_SAVE_MODE}, - - {CODED_FRAMES, DEC, H264|HEVC, - CODED_FRAMES_PROGRESSIVE, CODED_FRAMES_INTERLACE, - 1, CODED_FRAMES_PROGRESSIVE, - 0, - HFI_PROP_CODED_FRAMES}, - - {BIT_DEPTH, DEC, CODECS_ALL, BIT_DEPTH_8, BIT_DEPTH_10, 1, BIT_DEPTH_8, - 0, - HFI_PROP_LUMA_CHROMA_BIT_DEPTH}, - - {CODEC_CONFIG, DEC, H264|HEVC, 0, 1, 1, 0, - 0, 0, - CAP_FLAG_DYNAMIC_ALLOWED}, - - {BITSTREAM_SIZE_OVERWRITE, DEC, CODECS_ALL, 0, INT_MAX, 1, 0, - 0}, - - {THUMBNAIL_MODE, DEC, CODECS_ALL, - 0, 1, 1, 0, - 0, - HFI_PROP_THUMBNAIL_MODE, - CAP_FLAG_INPUT_PORT}, - - {DEFAULT_HEADER, DEC, CODECS_ALL, - 0, 1, 1, 0, - 0, - HFI_PROP_DEC_DEFAULT_HEADER}, - - {RAP_FRAME, DEC, CODECS_ALL, - 0, 1, 1, 1, - 0, - HFI_PROP_DEC_START_FROM_RAP_FRAME, - CAP_FLAG_INPUT_PORT}, - - {SEQ_CHANGE_AT_SYNC_FRAME, DEC, CODECS_ALL, - 0, 1, 1, 1, - 0, - HFI_PROP_SEQ_CHANGE_AT_SYNC_FRAME, - CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - - {FIRMWARE_PRIORITY_OFFSET, DEC | ENC, CODECS_ALL, - 1, 1, 1, 1}, - - {DPB_LIST, DEC, CODECS_ALL, - 0, 1, 1, 0, - 0, - HFI_PROP_DPB_LIST, - CAP_FLAG_OUTPUT_PORT}, - - {ALL_INTRA, ENC, H264|HEVC, - 0, 1, 1, 0, - 0, - 0, - CAP_FLAG_OUTPUT_PORT}, - - {COMPLEXITY, ENC, H264|HEVC, - 0, 100, - 1, DEFAULT_COMPLEXITY, - 0}, -}; - -static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kalama[] = { - /* {cap, domain, codec, - * children, - * adjust, set} - */ - - {PIX_FMTS, ENC, H264, - {0}}, - - {PIX_FMTS, ENC, HEVC, - {PROFILE, MIN_FRAME_QP, MAX_FRAME_QP, I_FRAME_QP, P_FRAME_QP, - B_FRAME_QP, MIN_QUALITY, BLUR_TYPES, LTR_COUNT}}, - - {PIX_FMTS, DEC, HEVC, - {PROFILE}}, - - {FRAME_RATE, ENC, CODECS_ALL, - {0}, - NULL, - msm_vidc_set_q16}, - - {HFLIP, ENC, CODECS_ALL, - {0}, - NULL, - msm_vidc_set_flip}, - - {VFLIP, ENC, CODECS_ALL, - {0}, - NULL, - msm_vidc_set_flip}, - - {ROTATION, ENC, CODECS_ALL, - {0}, - NULL, - msm_vidc_set_rotation}, - - {SUPER_FRAME, ENC, H264|HEVC, - {INPUT_BUF_HOST_MAX_COUNT, OUTPUT_BUF_HOST_MAX_COUNT}, - NULL, - NULL}, - - {HEADER_MODE, ENC, CODECS_ALL, - {0}, - NULL, - msm_vidc_set_header_mode}, - - {WITHOUT_STARTCODE, ENC, CODECS_ALL, - {0}, - NULL, - msm_vidc_set_nal_length}, - - {REQUEST_I_FRAME, ENC, H264|HEVC, - {0}, - NULL, - msm_vidc_set_req_sync_frame}, - - {BIT_RATE, ENC, H264, - {PEAK_BITRATE, L0_BR}, - msm_vidc_adjust_bitrate, - msm_vidc_set_bitrate}, - - {BIT_RATE, ENC, HEVC, - {PEAK_BITRATE, L0_BR}, - msm_vidc_adjust_bitrate, - msm_vidc_set_bitrate}, - - {BITRATE_MODE, ENC, H264, - {LTR_COUNT, I_FRAME_QP, P_FRAME_QP, - B_FRAME_QP, ENH_LAYER_COUNT, BIT_RATE, - MIN_QUALITY, VBV_DELAY, - PEAK_BITRATE, SLICE_MODE, CONTENT_ADAPTIVE_CODING, - BLUR_TYPES, LOWLATENCY_MODE}, - msm_vidc_adjust_bitrate_mode, - msm_vidc_set_u32_enum}, - - {BITRATE_MODE, ENC, HEVC, - {LTR_COUNT, I_FRAME_QP, P_FRAME_QP, - B_FRAME_QP, CONSTANT_QUALITY, ENH_LAYER_COUNT, - BIT_RATE, MIN_QUALITY, VBV_DELAY, - PEAK_BITRATE, SLICE_MODE, CONTENT_ADAPTIVE_CODING, - BLUR_TYPES, LOWLATENCY_MODE}, - msm_vidc_adjust_bitrate_mode, - msm_vidc_set_u32_enum}, - - {CONSTANT_QUALITY, ENC, HEVC, - {0}, - NULL, - msm_vidc_set_constant_quality}, - - {GOP_SIZE, ENC, CODECS_ALL, - {ALL_INTRA}, - msm_vidc_adjust_gop_size, - msm_vidc_set_gop_size}, - - {B_FRAME, ENC, H264|HEVC, - {ALL_INTRA}, - msm_vidc_adjust_b_frame, - msm_vidc_set_u32}, - - {BLUR_TYPES, ENC, H264|HEVC, - {0}, - msm_vidc_adjust_blur_type, - msm_vidc_set_u32_enum}, - - {LOWLATENCY_MODE, ENC, H264 | HEVC, - {STAGE, BIT_RATE}, - msm_vidc_adjust_enc_lowlatency_mode, - NULL}, - - {LOWLATENCY_MODE, DEC, H264|HEVC|VP9, - {STAGE}, - msm_vidc_adjust_dec_lowlatency_mode, - NULL}, - - {LTR_COUNT, ENC, H264|HEVC, - {0}, - msm_vidc_adjust_ltr_count, - msm_vidc_set_u32}, - - {USE_LTR, ENC, H264|HEVC, - {0}, - msm_vidc_adjust_use_ltr, - msm_vidc_set_use_and_mark_ltr}, - - {MARK_LTR, ENC, H264|HEVC, - {0}, - msm_vidc_adjust_mark_ltr, - msm_vidc_set_use_and_mark_ltr}, - - {AU_DELIMITER, ENC, H264|HEVC, - {0}, - NULL, - msm_vidc_set_u32}, - - {CONTENT_ADAPTIVE_CODING, ENC, H264|HEVC, - {REQUEST_PREPROCESS}, - msm_vidc_adjust_brs, - msm_vidc_set_vbr_related_properties}, - - {REQUEST_PREPROCESS, ENC, H264|HEVC, - {0}, - msm_vidc_adjust_preprocess, - msm_vidc_set_preprocess}, - - {MIN_QUALITY, ENC, H264, - {BLUR_TYPES}, - msm_vidc_adjust_min_quality, - msm_vidc_set_u32}, - - {MIN_QUALITY, ENC, HEVC, - {BLUR_TYPES}, - msm_vidc_adjust_min_quality, - msm_vidc_set_u32}, - - {VBV_DELAY, ENC, H264|HEVC, - {0}, - NULL, - msm_vidc_set_cbr_related_properties}, - - {PEAK_BITRATE, ENC, H264|HEVC, - {0}, - msm_vidc_adjust_peak_bitrate, - msm_vidc_set_cbr_related_properties}, - - {MIN_FRAME_QP, ENC, H264, - {0}, - NULL, - msm_vidc_set_min_qp}, - - {MIN_FRAME_QP, ENC, HEVC, - {0}, - msm_vidc_adjust_hevc_min_qp, - msm_vidc_set_min_qp}, - - {MAX_FRAME_QP, ENC, H264, - {0}, - NULL, - msm_vidc_set_max_qp}, - - {MAX_FRAME_QP, ENC, HEVC, - {0}, - msm_vidc_adjust_hevc_max_qp, - msm_vidc_set_max_qp}, - - {I_FRAME_QP, ENC, HEVC, - {0}, - msm_vidc_adjust_hevc_i_frame_qp, - msm_vidc_set_frame_qp}, - - {I_FRAME_QP, ENC, H264, - {0}, - NULL, - msm_vidc_set_frame_qp}, - - {P_FRAME_QP, ENC, HEVC, - {0}, - msm_vidc_adjust_hevc_p_frame_qp, - msm_vidc_set_frame_qp}, - - {P_FRAME_QP, ENC, H264, - {0}, - NULL, - msm_vidc_set_frame_qp}, - - {B_FRAME_QP, ENC, HEVC, - {0}, - msm_vidc_adjust_hevc_b_frame_qp, - msm_vidc_set_frame_qp}, - - {B_FRAME_QP, ENC, H264, - {0}, - NULL, - msm_vidc_set_frame_qp}, - - {LAYER_TYPE, ENC, H264, - {CONTENT_ADAPTIVE_CODING}}, - - {LAYER_ENABLE, ENC, H264|HEVC, - {CONTENT_ADAPTIVE_CODING, LTR_COUNT}}, - - {ENH_LAYER_COUNT, ENC, H264|HEVC, - {GOP_SIZE, B_FRAME, BIT_RATE, MIN_QUALITY, LTR_COUNT}, - msm_vidc_adjust_layer_count, - msm_vidc_set_layer_count_and_type}, - - {L0_BR, ENC, H264|HEVC, - {L1_BR}, - msm_vidc_adjust_layer_bitrate, - msm_vidc_set_layer_bitrate}, - - {L1_BR, ENC, H264|HEVC, - {L2_BR}, - msm_vidc_adjust_layer_bitrate, - msm_vidc_set_layer_bitrate}, - - {L2_BR, ENC, H264|HEVC, - {L3_BR}, - msm_vidc_adjust_layer_bitrate, - msm_vidc_set_layer_bitrate}, - - {L3_BR, ENC, H264|HEVC, - {L4_BR}, - msm_vidc_adjust_layer_bitrate, - msm_vidc_set_layer_bitrate}, - - {L4_BR, ENC, H264|HEVC, - {L5_BR}, - msm_vidc_adjust_layer_bitrate, - msm_vidc_set_layer_bitrate}, - - {L5_BR, ENC, H264|HEVC, - {0}, - msm_vidc_adjust_layer_bitrate, - msm_vidc_set_layer_bitrate}, - - {ENTROPY_MODE, ENC, H264, - {BIT_RATE}, - msm_vidc_adjust_entropy_mode, - msm_vidc_set_u32}, - - {PROFILE, ENC, H264, - {ENTROPY_MODE, TRANSFORM_8X8}, - NULL, - msm_vidc_set_u32_enum}, - - {PROFILE, DEC, H264, - {ENTROPY_MODE}, - NULL, - msm_vidc_set_u32_enum}, - - {PROFILE, ENC|DEC, HEVC, - {0}, - msm_vidc_adjust_profile, - msm_vidc_set_u32_enum}, - - {PROFILE, DEC, VP9, - {0}, - NULL, - msm_vidc_set_u32_enum}, - - {LEVEL, DEC, CODECS_ALL, - {0}, - NULL, - msm_vidc_set_u32_enum}, - - {LEVEL, ENC, CODECS_ALL, - {0}, - NULL, - msm_vidc_set_level}, - - {HEVC_TIER, ENC|DEC, HEVC, - {0}, - NULL, - msm_vidc_set_u32_enum}, - - {LF_MODE, ENC, CODECS_ALL, - {0}, - NULL, - msm_vidc_set_deblock_mode}, - - {SLICE_MODE, ENC, H264|HEVC, - {STAGE, DELIVERY_MODE}, - msm_vidc_adjust_slice_count, - msm_vidc_set_slice_count}, - - {TRANSFORM_8X8, ENC, H264, - {0}, - msm_vidc_adjust_transform_8x8, - msm_vidc_set_u32}, - - {CHROMA_QP_INDEX_OFFSET, ENC, HEVC, - {0}, - msm_vidc_adjust_chroma_qp_index_offset, - msm_vidc_set_chroma_qp_index_offset}, - - {DISPLAY_DELAY_ENABLE, DEC, H264|HEVC|VP9, - {OUTPUT_ORDER}, - NULL, - NULL}, - - {DISPLAY_DELAY, DEC, H264|HEVC|VP9, - {OUTPUT_ORDER}, - NULL, - NULL}, - - {OUTPUT_ORDER, DEC, H264|HEVC|VP9, - {0}, - msm_vidc_adjust_output_order, - msm_vidc_set_u32}, - - {INPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL, - {0}, - msm_vidc_adjust_input_buf_host_max_count, - msm_vidc_set_u32}, - - {INPUT_BUF_HOST_MAX_COUNT, ENC, H264|HEVC, - {0}, - msm_vidc_adjust_input_buf_host_max_count, - msm_vidc_set_u32}, - - {OUTPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL, - {0}, - msm_vidc_adjust_output_buf_host_max_count, - msm_vidc_set_u32}, - - {OUTPUT_BUF_HOST_MAX_COUNT, ENC, H264|HEVC, - {0}, - msm_vidc_adjust_output_buf_host_max_count, - msm_vidc_set_u32}, - - {CONCEAL_COLOR_8BIT, DEC, CODECS_ALL, - {0}, - NULL, - msm_vidc_set_u32_packed}, - - {CONCEAL_COLOR_10BIT, DEC, CODECS_ALL, - {0}, - NULL, - msm_vidc_set_u32_packed}, - - {STAGE, ENC | DEC, CODECS_ALL, - {0}, - NULL, - msm_vidc_set_stage}, - - {STAGE, ENC, H264|HEVC, - {0}, - NULL, - msm_vidc_set_stage}, - - {STAGE, DEC, H264|HEVC|VP9, - {0}, - NULL, - msm_vidc_set_stage}, - - {PIPE, DEC|ENC, CODECS_ALL, - {0}, - NULL, - msm_vidc_set_pipe}, - - {THUMBNAIL_MODE, DEC, CODECS_ALL, - {OUTPUT_ORDER}, - NULL, - msm_vidc_set_u32}, - - {RAP_FRAME, DEC, CODECS_ALL, - {0}, - NULL, - msm_vidc_set_u32}, - - {FIRMWARE_PRIORITY_OFFSET, DEC | ENC, CODECS_ALL, - {0}, - NULL, - NULL}, - - {DPB_LIST, DEC, CODECS_ALL, - {0}, - NULL, - NULL}, - - {ALL_INTRA, ENC, H264|HEVC, - {LTR_COUNT, SLICE_MODE, BIT_RATE}, - msm_vidc_adjust_all_intra, - NULL}, -}; - -/* Default UBWC config for LPDDR5 */ -static struct msm_vidc_ubwc_config_data ubwc_config_kalama[] = { - UBWC_CONFIG(8, 32, 16, 0, 1, 1, 1), -}; - -static struct msm_vidc_format_capability format_data_kalama = { - .codec_info = codec_data_kalama, - .codec_info_size = ARRAY_SIZE(codec_data_kalama), - .color_format_info = color_format_data_kalama, - .color_format_info_size = ARRAY_SIZE(color_format_data_kalama), - .color_prim_info = color_primaries_data_kalama, - .color_prim_info_size = ARRAY_SIZE(color_primaries_data_kalama), - .transfer_char_info = transfer_char_data_kalama, - .transfer_char_info_size = ARRAY_SIZE(transfer_char_data_kalama), - .matrix_coeff_info = matrix_coeff_data_kalama, - .matrix_coeff_info_size = ARRAY_SIZE(matrix_coeff_data_kalama), -}; - -static const struct msm_vidc_platform_data kalama_data = { - .core_data = core_data_kalama, - .core_data_size = ARRAY_SIZE(core_data_kalama), - .inst_cap_data = instance_cap_data_kalama, - .inst_cap_data_size = ARRAY_SIZE(instance_cap_data_kalama), - .inst_cap_dependency_data = instance_cap_dependency_data_kalama, - .inst_cap_dependency_data_size = ARRAY_SIZE(instance_cap_dependency_data_kalama), - .csc_data.vpe_csc_custom_bias_coeff = vpe_csc_custom_bias_coeff, - .csc_data.vpe_csc_custom_matrix_coeff = vpe_csc_custom_matrix_coeff, - .csc_data.vpe_csc_custom_limit_coeff = vpe_csc_custom_limit_coeff, - .ubwc_config = ubwc_config_kalama, - .format_data = &format_data_kalama, -}; - -static int msm_vidc_init_data(struct msm_vidc_core *core) -{ - int rc = 0; - - if (!core || !core->platform) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - d_vpr_h("%s: initialize kalama data\n", __func__); - - core->platform->data = kalama_data; - - return rc; -} - -int msm_vidc_init_platform_kalama(struct msm_vidc_core *core, struct device *dev) -{ - int rc = 0; - - rc = msm_vidc_init_data(core); - if (rc) - return rc; - - return 0; -} - -int msm_vidc_deinit_platform_kalama(struct msm_vidc_core *core, struct device *dev) -{ - /* do nothing */ - return 0; -} - diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index 4f9cddebdb..684e6552a4 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -2656,14 +2656,17 @@ int msm_vidc_kalama_check_ddr_type(void) return 0; } -static int msm_vidc_init_data(struct msm_vidc_core *core, struct device *dev) +static int msm_vidc_init_data(struct msm_vidc_core *core) { + struct device *dev = NULL; int rc = 0; - if (!core || !core->platform || !dev) { + if (!core || !core->pdev || !core->platform) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } + dev = &core->pdev->dev; + d_vpr_h("%s: initialize kalama data\n", __func__); if (of_device_is_compatible(dev->of_node, "qcom,sm8550-vidc-v2")) @@ -2688,18 +2691,18 @@ static int msm_vidc_init_data(struct msm_vidc_core *core, struct device *dev) return rc; } -int msm_vidc_init_platform_kalama(struct msm_vidc_core *core, struct device *dev) +int msm_vidc_init_platform_kalama(struct msm_vidc_core *core) { int rc = 0; - rc = msm_vidc_init_data(core, dev); + rc = msm_vidc_init_data(core); if (rc) return rc; return 0; } -int msm_vidc_deinit_platform_kalama(struct msm_vidc_core *core, struct device *dev) +int msm_vidc_deinit_platform_kalama(struct msm_vidc_core *core) { /* do nothing */ return 0; diff --git a/driver/platform/pineapple/inc/msm_vidc_pineapple.h b/driver/platform/pineapple/inc/msm_vidc_pineapple.h index fbb0c1ca9b..17f16a2b66 100644 --- a/driver/platform/pineapple/inc/msm_vidc_pineapple.h +++ b/driver/platform/pineapple/inc/msm_vidc_pineapple.h @@ -10,15 +10,15 @@ #include "msm_vidc_core.h" #if defined(CONFIG_MSM_VIDC_PINEAPPLE) -int msm_vidc_init_platform_pineapple(struct msm_vidc_core *core, struct device *dev); -int msm_vidc_deinit_platform_pineapple(struct msm_vidc_core *core, struct device *dev); +int msm_vidc_init_platform_pineapple(struct msm_vidc_core *core); +int msm_vidc_deinit_platform_pineapple(struct msm_vidc_core *core); #else -int msm_vidc_init_platform_pineapple(struct msm_vidc_core *core, struct device *dev) +int msm_vidc_init_platform_pineapple(struct msm_vidc_core *core) { return -EINVAL; } -int msm_vidc_deinit_platform_pineapple(struct msm_vidc_core *core, struct device *dev) +int msm_vidc_deinit_platform_pineapple(struct msm_vidc_core *core) { return -EINVAL; } diff --git a/driver/platform/pineapple/src/msm_vidc_pineapple.c b/driver/platform/pineapple/src/msm_vidc_pineapple.c index a20dfdce48..739b2e86f7 100644 --- a/driver/platform/pineapple/src/msm_vidc_pineapple.c +++ b/driver/platform/pineapple/src/msm_vidc_pineapple.c @@ -2664,14 +2664,17 @@ int msm_vidc_pineapple_check_ddr_type(void) return 0; } -static int msm_vidc_init_data(struct msm_vidc_core *core, struct device *dev) +static int msm_vidc_init_data(struct msm_vidc_core *core) { + struct device *dev = NULL; int rc = 0; - if (!core || !core->platform || !dev) { + if (!core || !core->pdev || !core->platform) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } + dev = &core->pdev->dev; + d_vpr_h("%s: initialize pineapple data\n", __func__); core->platform->data = pineapple_data; @@ -2698,18 +2701,18 @@ static int msm_vidc_init_data(struct msm_vidc_core *core, struct device *dev) return rc; } -int msm_vidc_init_platform_pineapple(struct msm_vidc_core *core, struct device *dev) +int msm_vidc_init_platform_pineapple(struct msm_vidc_core *core) { int rc = 0; - rc = msm_vidc_init_data(core, dev); + rc = msm_vidc_init_data(core); if (rc) return rc; return 0; } -int msm_vidc_deinit_platform_pineapple(struct msm_vidc_core *core, struct device *dev) +int msm_vidc_deinit_platform_pineapple(struct msm_vidc_core *core) { /* do nothing */ return 0; diff --git a/driver/platform/pineapple/src/pineapple.c b/driver/platform/pineapple/src/pineapple.c index ce9397e38e..3448cde2a6 100644 --- a/driver/platform/pineapple/src/pineapple.c +++ b/driver/platform/pineapple/src/pineapple.c @@ -1243,82 +1243,64 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine * adjust, set} */ - {PIX_FMTS, ENC, H264, - {0}, - {0}}, - {PIX_FMTS, ENC, HEVC, - {0}, {PROFILE, MIN_FRAME_QP, MAX_FRAME_QP, I_FRAME_QP, P_FRAME_QP, B_FRAME_QP, MIN_QUALITY, BLUR_TYPES, LTR_COUNT}}, {PIX_FMTS, DEC, HEVC, - {0}, {PROFILE}}, {FRAME_RATE, ENC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_q16}, {HFLIP, ENC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_flip}, {VFLIP, ENC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_flip}, {ROTATION, ENC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_rotation}, {SUPER_FRAME, ENC, H264|HEVC, - {0}, {INPUT_BUF_HOST_MAX_COUNT, OUTPUT_BUF_HOST_MAX_COUNT}, NULL, NULL}, {HEADER_MODE, ENC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_header_mode}, {WITHOUT_STARTCODE, ENC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_nal_length}, {REQUEST_I_FRAME, ENC, H264|HEVC, - {0}, {0}, NULL, msm_vidc_set_req_sync_frame}, {BIT_RATE, ENC, H264, - {ENH_LAYER_COUNT, BITRATE_MODE, ENTROPY_MODE, - ALL_INTRA, LOWLATENCY_MODE}, {PEAK_BITRATE, L0_BR}, msm_vidc_adjust_bitrate, msm_vidc_set_bitrate}, {BIT_RATE, ENC, HEVC, - {ENH_LAYER_COUNT, BITRATE_MODE, ALL_INTRA, LOWLATENCY_MODE}, {PEAK_BITRATE, L0_BR}, msm_vidc_adjust_bitrate, msm_vidc_set_bitrate}, {BITRATE_MODE, ENC, H264, - {0}, {LTR_COUNT, I_FRAME_QP, P_FRAME_QP, B_FRAME_QP, ENH_LAYER_COUNT, BIT_RATE, MIN_QUALITY, VBV_DELAY, @@ -1328,7 +1310,6 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine msm_vidc_set_u32_enum}, {BITRATE_MODE, ENC, HEVC, - {0}, {LTR_COUNT, I_FRAME_QP, P_FRAME_QP, B_FRAME_QP, CONSTANT_QUALITY, ENH_LAYER_COUNT, BIT_RATE, MIN_QUALITY, VBV_DELAY, @@ -1338,387 +1319,322 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine msm_vidc_set_u32_enum}, {CONSTANT_QUALITY, ENC, HEVC, - {BITRATE_MODE}, {0}, NULL, msm_vidc_set_constant_quality}, {GOP_SIZE, ENC, CODECS_ALL, - {ENH_LAYER_COUNT}, {ALL_INTRA}, msm_vidc_adjust_gop_size, msm_vidc_set_gop_size}, {B_FRAME, ENC, H264|HEVC, - {ENH_LAYER_COUNT}, {ALL_INTRA}, msm_vidc_adjust_b_frame, msm_vidc_set_u32}, {BLUR_TYPES, ENC, H264|HEVC, - {PIX_FMTS, BITRATE_MODE, MIN_QUALITY}, {0}, msm_vidc_adjust_blur_type, msm_vidc_set_u32_enum}, {LOWLATENCY_MODE, ENC, H264 | HEVC, - {BITRATE_MODE, DELIVERY_MODE}, {STAGE, BIT_RATE}, msm_vidc_adjust_enc_lowlatency_mode, NULL}, {LOWLATENCY_MODE, DEC, H264|HEVC|VP9, - {0}, {STAGE}, msm_vidc_adjust_dec_lowlatency_mode, NULL}, {LTR_COUNT, ENC, H264|HEVC, - {BITRATE_MODE, ALL_INTRA}, {0}, msm_vidc_adjust_ltr_count, msm_vidc_set_u32}, {USE_LTR, ENC, H264|HEVC, - {0}, {0}, msm_vidc_adjust_use_ltr, msm_vidc_set_use_and_mark_ltr}, {MARK_LTR, ENC, H264|HEVC, - {0}, {0}, msm_vidc_adjust_mark_ltr, msm_vidc_set_use_and_mark_ltr}, {AU_DELIMITER, ENC, H264|HEVC, - {0}, {0}, NULL, msm_vidc_set_u32}, {CONTENT_ADAPTIVE_CODING, ENC, H264|HEVC, - {BITRATE_MODE, LAYER_ENABLE, LAYER_TYPE}, {REQUEST_PREPROCESS}, msm_vidc_adjust_brs, msm_vidc_set_vbr_related_properties}, {REQUEST_PREPROCESS, ENC, H264|HEVC, - {CONTENT_ADAPTIVE_CODING}, {0}, msm_vidc_adjust_preprocess, msm_vidc_set_preprocess}, {MIN_QUALITY, ENC, H264, - {BITRATE_MODE, ENH_LAYER_COUNT}, {BLUR_TYPES}, msm_vidc_adjust_min_quality, msm_vidc_set_u32}, {MIN_QUALITY, ENC, HEVC, - {BITRATE_MODE, PIX_FMTS, ENH_LAYER_COUNT}, {BLUR_TYPES}, msm_vidc_adjust_min_quality, msm_vidc_set_u32}, {VBV_DELAY, ENC, H264|HEVC, - {BITRATE_MODE}, {0}, NULL, msm_vidc_set_cbr_related_properties}, {PEAK_BITRATE, ENC, H264|HEVC, - {BITRATE_MODE, BIT_RATE}, {0}, msm_vidc_adjust_peak_bitrate, msm_vidc_set_cbr_related_properties}, {MIN_FRAME_QP, ENC, H264, - {0}, {0}, NULL, msm_vidc_set_min_qp}, {MIN_FRAME_QP, ENC, HEVC, - {PIX_FMTS}, {0}, msm_vidc_adjust_hevc_min_qp, msm_vidc_set_min_qp}, {MAX_FRAME_QP, ENC, H264, - {0}, {0}, NULL, msm_vidc_set_max_qp}, {MAX_FRAME_QP, ENC, HEVC, - {PIX_FMTS}, {0}, msm_vidc_adjust_hevc_max_qp, msm_vidc_set_max_qp}, {I_FRAME_QP, ENC, HEVC, - {PIX_FMTS, BITRATE_MODE}, {0}, msm_vidc_adjust_hevc_i_frame_qp, msm_vidc_set_frame_qp}, {I_FRAME_QP, ENC, H264, - {BITRATE_MODE}, {0}, NULL, msm_vidc_set_frame_qp}, {P_FRAME_QP, ENC, HEVC, - {PIX_FMTS, BITRATE_MODE}, {0}, msm_vidc_adjust_hevc_p_frame_qp, msm_vidc_set_frame_qp}, {P_FRAME_QP, ENC, H264, - {BITRATE_MODE}, {0}, NULL, msm_vidc_set_frame_qp}, {B_FRAME_QP, ENC, HEVC, - {PIX_FMTS, BITRATE_MODE}, {0}, msm_vidc_adjust_hevc_b_frame_qp, msm_vidc_set_frame_qp}, {B_FRAME_QP, ENC, H264, - {BITRATE_MODE}, {0}, NULL, msm_vidc_set_frame_qp}, {LAYER_TYPE, ENC, H264|HEVC, - {0}, {CONTENT_ADAPTIVE_CODING, LTR_COUNT}}, {LAYER_ENABLE, ENC, H264|HEVC, - {0}, {CONTENT_ADAPTIVE_CODING}}, {ENH_LAYER_COUNT, ENC, H264|HEVC, - {BITRATE_MODE}, {GOP_SIZE, B_FRAME, BIT_RATE, MIN_QUALITY, LTR_COUNT}, msm_vidc_adjust_layer_count, msm_vidc_set_layer_count_and_type}, {L0_BR, ENC, H264|HEVC, - {BIT_RATE}, {L1_BR}, msm_vidc_adjust_layer_bitrate, msm_vidc_set_layer_bitrate}, {L1_BR, ENC, H264|HEVC, - {L0_BR}, {L2_BR}, msm_vidc_adjust_layer_bitrate, msm_vidc_set_layer_bitrate}, {L2_BR, ENC, H264|HEVC, - {L1_BR}, {L3_BR}, msm_vidc_adjust_layer_bitrate, msm_vidc_set_layer_bitrate}, {L3_BR, ENC, H264|HEVC, - {L2_BR}, {L4_BR}, msm_vidc_adjust_layer_bitrate, msm_vidc_set_layer_bitrate}, {L4_BR, ENC, H264|HEVC, - {L3_BR}, {L5_BR}, msm_vidc_adjust_layer_bitrate, msm_vidc_set_layer_bitrate}, {L5_BR, ENC, H264|HEVC, - {L4_BR}, {0}, msm_vidc_adjust_layer_bitrate, msm_vidc_set_layer_bitrate}, {ENTROPY_MODE, ENC, H264, - {PROFILE}, {BIT_RATE}, msm_vidc_adjust_entropy_mode, msm_vidc_set_u32}, {PROFILE, ENC, H264, - {0}, {ENTROPY_MODE, TRANSFORM_8X8}, NULL, msm_vidc_set_u32_enum}, {PROFILE, DEC, H264, - {0}, {ENTROPY_MODE}, NULL, msm_vidc_set_u32_enum}, {PROFILE, ENC|DEC, HEVC, - {PIX_FMTS}, {0}, msm_vidc_adjust_profile, msm_vidc_set_u32_enum}, {PROFILE, DEC, VP9, - {0}, {0}, NULL, msm_vidc_set_u32_enum}, {LEVEL, DEC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_u32_enum}, {LEVEL, ENC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_level}, {HEVC_TIER, ENC|DEC, HEVC, - {0}, {0}, NULL, msm_vidc_set_u32_enum}, {LF_MODE, ENC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_deblock_mode}, {SLICE_MODE, ENC, H264|HEVC, - {BITRATE_MODE, ALL_INTRA}, {STAGE, DELIVERY_MODE}, msm_vidc_adjust_slice_count, msm_vidc_set_slice_count}, {TRANSFORM_8X8, ENC, H264, - {PROFILE}, {0}, msm_vidc_adjust_transform_8x8, msm_vidc_set_u32}, {CHROMA_QP_INDEX_OFFSET, ENC, HEVC, - {0}, {0}, msm_vidc_adjust_chroma_qp_index_offset, msm_vidc_set_chroma_qp_index_offset}, {DISPLAY_DELAY_ENABLE, DEC, H264|HEVC|VP9, - {0}, {OUTPUT_ORDER}, NULL, NULL}, {DISPLAY_DELAY, DEC, H264|HEVC|VP9, - {0}, {OUTPUT_ORDER}, NULL, NULL}, {OUTPUT_ORDER, DEC, H264|HEVC|VP9, - {THUMBNAIL_MODE, DISPLAY_DELAY, DISPLAY_DELAY_ENABLE}, {0}, msm_vidc_adjust_output_order, msm_vidc_set_u32}, {INPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL, - {0}, {0}, msm_vidc_adjust_input_buf_host_max_count, msm_vidc_set_u32}, {INPUT_BUF_HOST_MAX_COUNT, ENC, H264|HEVC, - {SUPER_FRAME}, {0}, msm_vidc_adjust_input_buf_host_max_count, msm_vidc_set_u32}, {OUTPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL, - {0}, {0}, msm_vidc_adjust_output_buf_host_max_count, msm_vidc_set_u32}, {OUTPUT_BUF_HOST_MAX_COUNT, ENC, H264|HEVC, - {SUPER_FRAME, DELIVERY_MODE}, {0}, msm_vidc_adjust_output_buf_host_max_count, msm_vidc_set_u32}, {CONCEAL_COLOR_8BIT, DEC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_u32_packed}, {CONCEAL_COLOR_10BIT, DEC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_u32_packed}, {STAGE, ENC | DEC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_stage}, {STAGE, ENC, H264|HEVC, - {LOWLATENCY_MODE, SLICE_MODE}, {0}, NULL, msm_vidc_set_stage}, {STAGE, DEC, H264|HEVC|VP9, - {LOWLATENCY_MODE}, {0}, NULL, msm_vidc_set_stage}, {PIPE, DEC|ENC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_pipe}, {THUMBNAIL_MODE, DEC, CODECS_ALL, - {0}, {OUTPUT_ORDER}, NULL, msm_vidc_set_u32}, {RAP_FRAME, DEC, CODECS_ALL, - {0}, {0}, NULL, msm_vidc_set_u32}, {FIRMWARE_PRIORITY_OFFSET, DEC | ENC, CODECS_ALL, - {0}, {0}, NULL, NULL}, {DPB_LIST, DEC, CODECS_ALL, - {0}, {0}, NULL, NULL}, {ALL_INTRA, ENC, H264|HEVC, - {GOP_SIZE, B_FRAME}, {LTR_COUNT, SLICE_MODE, BIT_RATE}, msm_vidc_adjust_all_intra, NULL}, @@ -1790,7 +1706,7 @@ static int msm_vidc_init_data(struct msm_vidc_core *core) return rc; } -int msm_vidc_init_platform_pineapple(struct msm_vidc_core *core, struct device *dev) +int msm_vidc_init_platform_pineapple(struct msm_vidc_core *core) { int rc = 0; @@ -1801,7 +1717,7 @@ int msm_vidc_init_platform_pineapple(struct msm_vidc_core *core, struct device * return 0; } -int msm_vidc_deinit_platform_pineapple(struct msm_vidc_core *core, struct device *dev) +int msm_vidc_deinit_platform_pineapple(struct msm_vidc_core *core) { /* do nothing */ return 0; diff --git a/driver/platform/waipio/inc/msm_vidc_waipio.h b/driver/platform/waipio/inc/msm_vidc_waipio.h index d230587d93..1eebe1ede8 100644 --- a/driver/platform/waipio/inc/msm_vidc_waipio.h +++ b/driver/platform/waipio/inc/msm_vidc_waipio.h @@ -8,15 +8,13 @@ #define _MSM_VIDC_WAIPIO_H_ #include "msm_vidc_core.h" -#if defined(CONFIG_MSM_VIDC_IRIS2) #include "msm_vidc_iris2.h" -#endif #if defined(CONFIG_MSM_VIDC_WAIPIO) struct context_bank_info *msm_vidc_context_bank(struct msm_vidc_core *core, enum msm_vidc_buffer_region region); -int msm_vidc_init_platform_waipio(struct msm_vidc_core *core, struct device *dev); -int msm_vidc_deinit_platform_waipio(struct msm_vidc_core *core, struct device *dev); +int msm_vidc_init_platform_waipio(struct msm_vidc_core *core); +int msm_vidc_deinit_platform_waipio(struct msm_vidc_core *core); #else struct context_bank_info *msm_vidc_context_bank(struct msm_vidc_core *core, enum msm_vidc_buffer_region region) @@ -24,12 +22,12 @@ struct context_bank_info *msm_vidc_context_bank(struct msm_vidc_core *core, return NULL; } -int msm_vidc_init_platform_waipio(struct msm_vidc_core *core, struct device *dev) +int msm_vidc_init_platform_waipio(struct msm_vidc_core *core) { return -EINVAL; } -int msm_vidc_deinit_platform_waipio(struct msm_vidc_core *core, struct device *dev) +int msm_vidc_deinit_platform_waipio(struct msm_vidc_core *core) { return -EINVAL; } diff --git a/driver/platform/waipio/src/msm_vidc_waipio.c b/driver/platform/waipio/src/msm_vidc_waipio.c deleted file mode 100644 index 7a0d473836..0000000000 --- a/driver/platform/waipio/src/msm_vidc_waipio.c +++ /dev/null @@ -1,2172 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. - * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. - */ - -#include -#include - -#include -#include - -#include -#include "msm_vidc_waipio.h" -#include "msm_vidc_platform.h" -#include "msm_vidc_debug.h" -#include "msm_vidc_control_ext.h" -#include "msm_vidc_internal.h" -#include "hfi_property.h" -#include "hfi_command.h" - -#define DEFAULT_VIDEO_CONCEAL_COLOR_BLACK 0x8020010 -#define MAX_LTR_FRAME_COUNT 2 -#define MAX_BASE_LAYER_PRIORITY_ID 63 -#define MAX_BITRATE 220000000 -#define DEFAULT_BITRATE 20000000 -#define MINIMUM_FPS 1 -#define MAXIMUM_FPS 480 -#define MAX_QP 51 -#define DEFAULT_QP 20 -#define MAX_CONSTANT_QUALITY 100 -#define MIN_SLICE_BYTE_SIZE 512 -#define MAX_SLICE_BYTE_SIZE \ - ((MAX_BITRATE) >> 3) -#define MAX_SLICE_MB_SIZE \ - (((4096 + 15) >> 4) * ((2304 + 15) >> 4)) - -#define ENC MSM_VIDC_ENCODER -#define DEC MSM_VIDC_DECODER -#define H264 MSM_VIDC_H264 -#define HEVC MSM_VIDC_HEVC -#define VP9 MSM_VIDC_VP9 -#define HEIC MSM_VIDC_HEIC -#define CODECS_ALL (H264 | HEVC | VP9 | HEIC) -#define MAXIMUM_OVERRIDE_VP9_FPS 200 - -static struct msm_platform_core_capability core_data_waipio[] = { - /* {type, value} */ - {ENC_CODECS, H264|HEVC|HEIC}, - {DEC_CODECS, H264|HEVC|VP9|HEIC}, - {MAX_SESSION_COUNT, 16}, - {MAX_NUM_720P_SESSIONS, 16}, - {MAX_NUM_1080P_SESSIONS, 16}, - {MAX_NUM_4K_SESSIONS, 8}, - {MAX_NUM_8K_SESSIONS, 2}, - {MAX_SECURE_SESSION_COUNT, 3}, - {MAX_RT_MBPF, 174080}, /* (8192x4352)/256 + (4096x2176)/256*/ - {MAX_MBPF, 278528}, /* ((8192x4352)/256) * 2 */ - {MAX_MBPS, 7833600}, /* max_load - * 7680x4320@60fps or 3840x2176@240fps - * which is greater than 4096x2176@120fps, - * 8192x4320@48fps - */ - {MAX_IMAGE_MBPF, 1048576}, /* (16384x16384)/256 */ - {MAX_MBPF_HQ, 8160}, /* ((1920x1088)/256) */ - {MAX_MBPS_HQ, 489600}, /* ((1920x1088)/256)@60fps */ - {MAX_MBPF_B_FRAME, 32640}, /* 3840x2176/256 */ - {MAX_MBPS_B_FRAME, 1958400}, /* 3840x2176/256 MBs@60fps */ - {MAX_MBPS_ALL_INTRA, 1044480}, /* 4096x2176/256 MBs@30fps */ - {MAX_ENH_LAYER_COUNT, 5}, - {NUM_VPP_PIPE, 4}, - {SW_PC, 1}, - {FW_UNLOAD, 0}, - {HW_RESPONSE_TIMEOUT, HW_RESPONSE_TIMEOUT_VALUE}, /* 1000 ms */ - {SW_PC_DELAY, SW_PC_DELAY_VALUE }, /* 1500 ms (>HW_RESPONSE_TIMEOUT)*/ - {FW_UNLOAD_DELAY, FW_UNLOAD_DELAY_VALUE }, /* 3000 ms (>SW_PC_DELAY)*/ - {PAGEFAULT_NON_FATAL, 1}, - {PAGETABLE_CACHING, 0}, - {DCVS, 1}, - {DECODE_BATCH, 1}, - {DECODE_BATCH_TIMEOUT, 200}, - {STATS_TIMEOUT_MS, 2000}, - {AV_SYNC_WINDOW_SIZE, 40}, - {NON_FATAL_FAULTS, 1}, - {ENC_AUTO_FRAMERATE, 1}, - {DEVICE_CAPS, V4L2_CAP_VIDEO_M2M_MPLANE | V4L2_CAP_META_CAPTURE | - V4L2_CAP_STREAMING}, - {SUPPORTS_REQUESTS, 1}, -}; - -static struct msm_platform_inst_capability instance_cap_data_waipio[] = { - /* {cap, domain, codec, - * min, max, step_or_mask, value, - * v4l2_id, - * hfi_id, - * flags} - */ - - {FRAME_WIDTH, DEC, CODECS_ALL, 96, 8192, 1, 1920}, - - {FRAME_WIDTH, DEC, VP9, 96, 4096, 1, 1920}, - - {FRAME_WIDTH, ENC, CODECS_ALL, 128, 8192, 1, 1920}, - - {FRAME_WIDTH, ENC, HEVC, 96, 8192, 1, 1920}, - - {FRAME_WIDTH, ENC, HEIC, 128, 16384, 1, 16384}, - - {LOSSLESS_FRAME_WIDTH, ENC, H264, 128, 4096, 1, 1920}, - - {LOSSLESS_FRAME_WIDTH, ENC, HEVC, 96, 4096, 1, 1920}, - - {SECURE_FRAME_WIDTH, DEC, H264|HEVC|VP9, 96, 4096, 1, 1920}, - - {SECURE_FRAME_WIDTH, ENC, H264, 128, 4096, 1, 1920}, - - {SECURE_FRAME_WIDTH, ENC, HEVC, 96, 4096, 1, 1920}, - - {FRAME_HEIGHT, DEC, CODECS_ALL, 96, 8192, 1, 1080}, - - {FRAME_HEIGHT, DEC, VP9, 96, 4096, 1, 1080}, - - {FRAME_HEIGHT, ENC, CODECS_ALL, 128, 8192, 1, 1080}, - - {FRAME_HEIGHT, ENC, HEVC, 96, 8192, 1, 1080}, - - {FRAME_HEIGHT, ENC, HEIC, 128, 16384, 1, 16384}, - - {LOSSLESS_FRAME_HEIGHT, ENC, H264, 128, 4096, 1, 1080}, - - {LOSSLESS_FRAME_HEIGHT, ENC, HEVC, 96, 4096, 1, 1080}, - - {SECURE_FRAME_HEIGHT, DEC, H264|HEVC|VP9, 96, 4096, 1, 1080}, - - {SECURE_FRAME_HEIGHT, ENC, H264, 128, 4096, 1, 1080}, - - {SECURE_FRAME_HEIGHT, ENC, HEVC, 96, 4096, 1, 1080}, - - {PIX_FMTS, ENC|DEC, H264, - MSM_VIDC_FMT_NV12, - MSM_VIDC_FMT_NV12C, - MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C, - MSM_VIDC_FMT_NV12C}, - - {PIX_FMTS, ENC|DEC, HEVC|VP9, - MSM_VIDC_FMT_NV12, - MSM_VIDC_FMT_TP10C, - MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C | - MSM_VIDC_FMT_P010 | MSM_VIDC_FMT_TP10C, - MSM_VIDC_FMT_NV12C}, - - {PIX_FMTS, ENC, HEIC, - MSM_VIDC_FMT_NV12, - MSM_VIDC_FMT_P010, - MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_P010, - MSM_VIDC_FMT_NV12}, - - {PIX_FMTS, DEC, HEIC, - MSM_VIDC_FMT_NV12, - MSM_VIDC_FMT_TP10C, - MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C | - MSM_VIDC_FMT_P010 | MSM_VIDC_FMT_TP10C, - MSM_VIDC_FMT_NV12C}, - - {MIN_BUFFERS_INPUT, ENC|DEC, CODECS_ALL, 0, 64, 1, 4, - V4L2_CID_MIN_BUFFERS_FOR_OUTPUT}, - - {MIN_BUFFERS_INPUT, ENC|DEC, HEIC, 0, 64, 1, 1, - V4L2_CID_MIN_BUFFERS_FOR_OUTPUT}, - - {MIN_BUFFERS_OUTPUT, ENC|DEC, CODECS_ALL, - 0, 64, 1, 4, - V4L2_CID_MIN_BUFFERS_FOR_CAPTURE, - HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT, - CAP_FLAG_OUTPUT_PORT}, - - /* (8192 * 4320) / 256 */ - {MBPF, ENC, CODECS_ALL, 64, 138240, 1, 138240}, - - {MBPF, ENC, HEVC, 36, 138240, 1, 138240}, - - /* ((16384x16384)/256) */ - {MBPF, ENC, HEIC, 36, 1048576, 1, 1048576}, - - {MBPF, DEC, CODECS_ALL, 36, 138240, 1, 138240}, - - /* (4096 * 2304) / 256 */ - {MBPF, DEC, VP9, 36, 36864, 1, 36864}, - - /* ((8192x8192)/256) */ - {MBPF, DEC, HEIC, 64, 262144, 1, 262144 }, - - /* (4096 * 2304) / 256 */ - {LOSSLESS_MBPF, ENC, H264|HEVC, 64, 36864, 1, 36864}, - - /* Batch Mode Decode */ - /* TODO: update with new values based on updated voltage corner */ - {BATCH_MBPF, DEC, H264|HEVC|VP9, 64, 34816, 1, 34816}, - - /* (4096 * 2304) / 256 */ - {BATCH_FPS, DEC, H264|HEVC|VP9, 1, 120, 1, 120}, - - {SECURE_MBPF, ENC|DEC, H264|HEVC|VP9, 64, 36864, 1, 36864}, - - {SECURE_MBPF, ENC, HEVC, 36, 36864, 1, 36864}, - - {FRAME_RATE, ENC, CODECS_ALL, - (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), - 1, (DEFAULT_FPS << 16), - 0, - HFI_PROP_FRAME_RATE, - CAP_FLAG_OUTPUT_PORT}, - - {FRAME_RATE, ENC, HEIC, - (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), - 1, (MINIMUM_FPS << 16), - 0, - HFI_PROP_FRAME_RATE, - CAP_FLAG_OUTPUT_PORT}, - - {FRAME_RATE, DEC, CODECS_ALL, - (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), - 1, (DEFAULT_FPS << 16), - V4L2_CID_MPEG_VIDC_FRAME_RATE, - 0, - CAP_FLAG_OUTPUT_PORT | - CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - - {FRAME_RATE, DEC, VP9, - (MINIMUM_FPS << 16), (MAXIMUM_OVERRIDE_VP9_FPS << 16), - 1, (DEFAULT_FPS << 16), - V4L2_CID_MPEG_VIDC_FRAME_RATE, - 0, - CAP_FLAG_OUTPUT_PORT | - CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - - {OPERATING_RATE, ENC, CODECS_ALL, - (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), - 1, (DEFAULT_FPS << 16)}, - - {OPERATING_RATE, DEC, CODECS_ALL, - (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), - 1, (DEFAULT_FPS << 16), - V4L2_CID_MPEG_VIDC_OPERATING_RATE, - 0, - CAP_FLAG_OUTPUT_PORT | - CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - - {OPERATING_RATE, DEC, VP9, - (MINIMUM_FPS << 16), (MAXIMUM_OVERRIDE_VP9_FPS << 16), - 1, (DEFAULT_FPS << 16), - V4L2_CID_MPEG_VIDC_OPERATING_RATE, - 0, - CAP_FLAG_OUTPUT_PORT | - CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - - {INPUT_RATE, ENC|DEC, CODECS_ALL, - (MINIMUM_FPS << 16), INT_MAX, - 1, (DEFAULT_FPS << 16)}, - - {TIMESTAMP_RATE, ENC|DEC, CODECS_ALL, - (MINIMUM_FPS << 16), INT_MAX, - 1, (DEFAULT_FPS << 16)}, - - {SCALE_FACTOR, ENC, H264|HEVC, 1, 8, 1, 8}, - - {MB_CYCLES_VSP, ENC, CODECS_ALL, 25, 25, 1, 25}, - - {MB_CYCLES_VSP, DEC, CODECS_ALL, 25, 25, 1, 25}, - - {MB_CYCLES_VSP, DEC, VP9, 60, 60, 1, 60}, - - {MB_CYCLES_VPP, ENC, CODECS_ALL, 675, 675, 1, 675}, - - {MB_CYCLES_VPP, DEC, CODECS_ALL, 200, 200, 1, 200}, - - {MB_CYCLES_LP, ENC, CODECS_ALL, 320, 320, 1, 320}, - - {MB_CYCLES_LP, DEC, CODECS_ALL, 200, 200, 1, 200}, - - {MB_CYCLES_FW, ENC|DEC, CODECS_ALL, 326389, 326389, 1, 326389}, - - {MB_CYCLES_FW_VPP, ENC|DEC, CODECS_ALL, 44156, 44156, 1, 44156}, - - {SECURE_MODE, ENC|DEC, H264|HEVC|VP9, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_SECURE, - HFI_PROP_SECURE, - CAP_FLAG_NONE}, - - {META_OUTBUF_FENCE, DEC, H264|HEVC|VP9, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_DISABLE, - 0, V4L2_MPEG_VIDC_META_DISABLE, - 0, - 0, - CAP_FLAG_BITMASK | CAP_FLAG_META}, - - {TS_REORDER, DEC, H264|HEVC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_TS_REORDER}, - - {HFLIP, ENC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_HFLIP, - HFI_PROP_FLIP, - CAP_FLAG_OUTPUT_PORT | - CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - - {VFLIP, ENC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_VFLIP, - HFI_PROP_FLIP, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {ROTATION, ENC, CODECS_ALL, - 0, 270, 90, 0, - V4L2_CID_ROTATE, - HFI_PROP_ROTATION, - CAP_FLAG_OUTPUT_PORT}, - - {SUPER_FRAME, ENC, H264|HEVC, - 0, 32, 1, 0, - V4L2_CID_MPEG_VIDC_SUPERFRAME, 0, - CAP_FLAG_NONE}, - - {HEADER_MODE, ENC, CODECS_ALL, - V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE, - V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME, - BIT(V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE) | - BIT(V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME), - V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE, - V4L2_CID_MPEG_VIDEO_HEADER_MODE, - HFI_PROP_SEQ_HEADER_MODE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {PREPEND_SPSPPS_TO_IDR, ENC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDEO_PREPEND_SPSPPS_TO_IDR}, - - {WITHOUT_STARTCODE, ENC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE, - HFI_PROP_NAL_LENGTH_FIELD, - CAP_FLAG_OUTPUT_PORT}, - - {NAL_LENGTH_FIELD, ENC, CODECS_ALL, - V4L2_MPEG_VIDEO_HEVC_SIZE_0, - V4L2_MPEG_VIDEO_HEVC_SIZE_4, - BIT(V4L2_MPEG_VIDEO_HEVC_SIZE_0) | - BIT(V4L2_MPEG_VIDEO_HEVC_SIZE_4), - V4L2_MPEG_VIDEO_HEVC_SIZE_0, - V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD, - HFI_PROP_NAL_LENGTH_FIELD, - CAP_FLAG_MENU | CAP_FLAG_OUTPUT_PORT}, - - /* TODO: Firmware introduced enumeration type for this - * with and without seq header. - */ - {REQUEST_I_FRAME, ENC, H264|HEVC, - 0, 0, 0, 0, - V4L2_CID_MPEG_VIDEO_FORCE_KEY_FRAME, - HFI_PROP_REQUEST_SYNC_FRAME, - CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - - /* Enc: Keeping CABAC and CAVLC as same bitrate. - * Dec: there's no use of Bitrate cap - */ - {BIT_RATE, ENC, H264|HEVC, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_BITRATE, - HFI_PROP_TOTAL_BITRATE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {BITRATE_MODE, ENC, H264, - V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, - V4L2_MPEG_VIDEO_BITRATE_MODE_CBR, - BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_VBR) | - BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CBR), - V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, - V4L2_CID_MPEG_VIDEO_BITRATE_MODE, - HFI_PROP_RATE_CONTROL, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {BITRATE_MODE, ENC, HEVC, - V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, - V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, - BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_VBR) | - BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CBR) | - BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CQ), - V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, - V4L2_CID_MPEG_VIDEO_BITRATE_MODE, - HFI_PROP_RATE_CONTROL, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {BITRATE_MODE, ENC, HEIC, - V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, - V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, - BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CQ), - V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, - V4L2_CID_MPEG_VIDEO_BITRATE_MODE, - HFI_PROP_RATE_CONTROL, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {LOSSLESS, ENC, HEVC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU}, - - {FRAME_SKIP_MODE, ENC, H264|HEVC|HEIC, - V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED, - V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT, - BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED) | - BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_LEVEL_LIMIT) | - BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT), - V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED, - V4L2_CID_MPEG_VIDEO_FRAME_SKIP_MODE, - 0, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {FRAME_RC_ENABLE, ENC, H264|HEVC|HEIC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_ENABLE, - V4L2_CID_MPEG_VIDEO_FRAME_RC_ENABLE}, - - {CONSTANT_QUALITY, ENC, HEVC, - 1, MAX_CONSTANT_QUALITY, 1, 90, - V4L2_CID_MPEG_VIDEO_CONSTANT_QUALITY, - HFI_PROP_CONSTANT_QUALITY, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {CONSTANT_QUALITY, ENC, HEIC, - 1, MAX_CONSTANT_QUALITY, 1, 100, - V4L2_CID_MPEG_VIDEO_CONSTANT_QUALITY, - HFI_PROP_CONSTANT_QUALITY, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {GOP_SIZE, ENC, CODECS_ALL, - 0, INT_MAX, 1, 2 * DEFAULT_FPS - 1, - V4L2_CID_MPEG_VIDEO_GOP_SIZE, - HFI_PROP_MAX_GOP_FRAMES, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {GOP_SIZE, ENC, HEIC, - 0, INT_MAX, 1, 0 /* all intra */, - V4L2_CID_MPEG_VIDEO_GOP_SIZE, - HFI_PROP_MAX_GOP_FRAMES, - CAP_FLAG_OUTPUT_PORT | - CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - - {GOP_CLOSURE, ENC, H264|HEVC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_ENABLE, - V4L2_CID_MPEG_VIDEO_GOP_CLOSURE, - 0}, - - {B_FRAME, ENC, H264|HEVC, - 0, 7, 1, 0, - V4L2_CID_MPEG_VIDEO_B_FRAMES, - HFI_PROP_MAX_B_FRAMES, - CAP_FLAG_OUTPUT_PORT}, - - {B_FRAME, ENC, HEIC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDEO_B_FRAMES, - HFI_PROP_MAX_B_FRAMES, - CAP_FLAG_OUTPUT_PORT}, - - {BLUR_TYPES, ENC, H264|HEVC, - VIDC_BLUR_NONE, VIDC_BLUR_ADAPTIVE, - BIT(VIDC_BLUR_NONE) | BIT(VIDC_BLUR_EXTERNAL) | BIT(VIDC_BLUR_ADAPTIVE), - VIDC_BLUR_ADAPTIVE, - V4L2_CID_MPEG_VIDC_VIDEO_BLUR_TYPES, - HFI_PROP_BLUR_TYPES, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {BLUR_RESOLUTION, ENC, H264|HEVC, - 0, S32_MAX, 1, 0, - V4L2_CID_MPEG_VIDC_VIDEO_BLUR_RESOLUTION, - HFI_PROP_BLUR_RESOLUTION, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {CSC, ENC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - 0, - HFI_PROP_CSC}, - - {CSC_CUSTOM_MATRIX, ENC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_VIDEO_VPE_CSC_CUSTOM_MATRIX, - HFI_PROP_CSC_MATRIX, - CAP_FLAG_OUTPUT_PORT}, - - {LOWLATENCY_MODE, ENC, H264|HEVC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_LOWLATENCY_REQUEST, - 0, - CAP_FLAG_NONE}, - - {LOWLATENCY_MODE, DEC, H264|HEVC|VP9, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_LOWLATENCY_REQUEST, - HFI_PROP_SEQ_CHANGE_AT_SYNC_FRAME, - CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - - {LTR_COUNT, ENC, H264|HEVC, - 0, 2, 1, 0, - V4L2_CID_MPEG_VIDEO_LTR_COUNT, - HFI_PROP_LTR_COUNT, - CAP_FLAG_OUTPUT_PORT}, - - {USE_LTR, ENC, H264|HEVC, - INVALID_DEFAULT_MARK_OR_USE_LTR, - ((1 << MAX_LTR_FRAME_COUNT) - 1), - 1, INVALID_DEFAULT_MARK_OR_USE_LTR, - V4L2_CID_MPEG_VIDEO_USE_LTR_FRAMES, - HFI_PROP_LTR_USE, - CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - - {MARK_LTR, ENC, H264|HEVC, - INVALID_DEFAULT_MARK_OR_USE_LTR, - (MAX_LTR_FRAME_COUNT - 1), - 1, INVALID_DEFAULT_MARK_OR_USE_LTR, - V4L2_CID_MPEG_VIDEO_FRAME_LTR_INDEX, - HFI_PROP_LTR_MARK, - CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - - {BASELAYER_PRIORITY, ENC, H264, - 0, MAX_BASE_LAYER_PRIORITY_ID, 1, 0, - V4L2_CID_MPEG_VIDEO_BASELAYER_PRIORITY_ID, - HFI_PROP_BASELAYER_PRIORITYID, - CAP_FLAG_OUTPUT_PORT}, - - {IR_TYPE, ENC, H264|HEVC, - V4L2_MPEG_VIDEO_VIDC_INTRA_REFRESH_RANDOM, - V4L2_MPEG_VIDEO_VIDC_INTRA_REFRESH_RANDOM, - BIT(V4L2_MPEG_VIDEO_VIDC_INTRA_REFRESH_RANDOM), - V4L2_MPEG_VIDEO_VIDC_INTRA_REFRESH_RANDOM, - V4L2_CID_MPEG_VIDEO_VIDC_INTRA_REFRESH_TYPE, - 0, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {IR_PERIOD, ENC, H264|HEVC, - 0, INT_MAX, 1, 0, - V4L2_CID_MPEG_VIDC_INTRA_REFRESH_PERIOD, - 0, - CAP_FLAG_INPUT_PORT | CAP_FLAG_OUTPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {AU_DELIMITER, ENC, H264|HEVC, - V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDEO_AU_DELIMITER, - HFI_PROP_AUD, - CAP_FLAG_OUTPUT_PORT}, - - {TIME_DELTA_BASED_RC, ENC, H264|HEVC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_ENABLE, - V4L2_CID_MPEG_VIDC_TIME_DELTA_BASED_RC, - HFI_PROP_TIME_DELTA_BASED_RATE_CONTROL, - CAP_FLAG_OUTPUT_PORT}, - - {TIME_DELTA_BASED_RC, ENC, HEIC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_TIME_DELTA_BASED_RC, - HFI_PROP_TIME_DELTA_BASED_RATE_CONTROL, - CAP_FLAG_OUTPUT_PORT}, - - {CONTENT_ADAPTIVE_CODING, ENC, H264|HEVC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_ENABLE, - V4L2_CID_MPEG_VIDC_CONTENT_ADAPTIVE_CODING, - HFI_PROP_CONTENT_ADAPTIVE_CODING, - CAP_FLAG_OUTPUT_PORT}, - - {REQUEST_PREPROCESS, ENC, H264|HEVC, - MSM_VIDC_PREPROCESS_NONE, - MSM_VIDC_PREPROCESS_NONE, - BIT(MSM_VIDC_PREPROCESS_NONE), - MSM_VIDC_PREPROCESS_NONE, - 0, HFI_PROP_REQUEST_PREPROCESS, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {BITRATE_BOOST, ENC, H264|HEVC, - 0, MAX_BITRATE_BOOST, 25, MAX_BITRATE_BOOST, - V4L2_CID_MPEG_VIDC_QUALITY_BITRATE_BOOST, - HFI_PROP_BITRATE_BOOST, - CAP_FLAG_OUTPUT_PORT}, - - {MIN_QUALITY, ENC, H264|HEVC, - 0, MAX_SUPPORTED_MIN_QUALITY, 70, MAX_SUPPORTED_MIN_QUALITY, - 0, - HFI_PROP_MAINTAIN_MIN_QUALITY, - CAP_FLAG_OUTPUT_PORT}, - - {VBV_DELAY, ENC, H264|HEVC, - 200, 300, 100, 300, - V4L2_CID_MPEG_VIDEO_VBV_DELAY, - HFI_PROP_VBV_DELAY, - CAP_FLAG_OUTPUT_PORT}, - - {PEAK_BITRATE, ENC, H264|HEVC, - /* default peak bitrate is 10% larger than avg bitrate */ - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_BITRATE_PEAK, - HFI_PROP_TOTAL_PEAK_BITRATE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {MIN_FRAME_QP, ENC, H264, - MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, - V4L2_CID_MPEG_VIDEO_H264_MIN_QP, - HFI_PROP_MIN_QP_PACKED, - CAP_FLAG_OUTPUT_PORT}, - - {MIN_FRAME_QP, ENC, HEVC|HEIC, - MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, - V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP, - HFI_PROP_MIN_QP_PACKED, - CAP_FLAG_OUTPUT_PORT}, - - {I_FRAME_MIN_QP, ENC, H264, - MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, - V4L2_CID_MPEG_VIDEO_H264_I_FRAME_MIN_QP}, - - {I_FRAME_MIN_QP, ENC, HEVC|HEIC, - MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, - V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_MIN_QP}, - - {P_FRAME_MIN_QP, ENC, H264, - MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, - V4L2_CID_MPEG_VIDEO_H264_P_FRAME_MIN_QP}, - - {P_FRAME_MIN_QP, ENC, HEVC|HEIC, - MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, - V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_MIN_QP}, - - {B_FRAME_MIN_QP, ENC, H264, - MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, - V4L2_CID_MPEG_VIDEO_H264_B_FRAME_MIN_QP}, - - {B_FRAME_MIN_QP, ENC, HEVC|HEIC, - MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, - V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_MIN_QP}, - - {MAX_FRAME_QP, ENC, H264, - MIN_QP_8BIT, MAX_QP, 1, MAX_QP, - V4L2_CID_MPEG_VIDEO_H264_MAX_QP, - HFI_PROP_MAX_QP_PACKED, - CAP_FLAG_OUTPUT_PORT}, - - {MAX_FRAME_QP, ENC, HEVC|HEIC, - MIN_QP_10BIT, MAX_QP, 1, MAX_QP, - V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP, - HFI_PROP_MAX_QP_PACKED, - CAP_FLAG_OUTPUT_PORT}, - - {I_FRAME_MAX_QP, ENC, H264, - MIN_QP_8BIT, MAX_QP, 1, MAX_QP, - V4L2_CID_MPEG_VIDEO_H264_I_FRAME_MAX_QP}, - - {I_FRAME_MAX_QP, ENC, HEVC|HEIC, - MIN_QP_10BIT, MAX_QP, 1, MAX_QP, - V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_MAX_QP}, - - {P_FRAME_MAX_QP, ENC, H264, - MIN_QP_8BIT, MAX_QP, 1, MAX_QP, - V4L2_CID_MPEG_VIDEO_H264_P_FRAME_MAX_QP}, - - {P_FRAME_MAX_QP, ENC, HEVC|HEIC, - MIN_QP_10BIT, MAX_QP, 1, MAX_QP, - V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_MAX_QP}, - - {B_FRAME_MAX_QP, ENC, H264, - MIN_QP_8BIT, MAX_QP, 1, MAX_QP, - V4L2_CID_MPEG_VIDEO_H264_B_FRAME_MAX_QP}, - - {B_FRAME_MAX_QP, ENC, HEVC|HEIC, - MIN_QP_10BIT, MAX_QP, 1, MAX_QP, - V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_MAX_QP}, - - {I_FRAME_QP, ENC, HEVC, - MIN_QP_10BIT, MAX_QP, 1, DEFAULT_QP, - V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP, - HFI_PROP_QP_PACKED, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {I_FRAME_QP, ENC, H264, - MIN_QP_8BIT, MAX_QP, 1, DEFAULT_QP, - V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP, - HFI_PROP_QP_PACKED, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {P_FRAME_QP, ENC, HEVC, - MIN_QP_10BIT, MAX_QP, 1, DEFAULT_QP, - V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP, - HFI_PROP_QP_PACKED, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {P_FRAME_QP, ENC, H264, - MIN_QP_8BIT, MAX_QP, 1, DEFAULT_QP, - V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP, - HFI_PROP_QP_PACKED, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {B_FRAME_QP, ENC, HEVC, - MIN_QP_10BIT, MAX_QP, 1, DEFAULT_QP, - V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP, - HFI_PROP_QP_PACKED, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {B_FRAME_QP, ENC, H264, - MIN_QP_8BIT, MAX_QP, 1, DEFAULT_QP, - V4L2_CID_MPEG_VIDEO_H264_B_FRAME_QP, - HFI_PROP_QP_PACKED, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {LAYER_TYPE, ENC, HEVC, - V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B, - V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P, - BIT(V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B) | - BIT(V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P), - V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P, - V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE, - HFI_PROP_LAYER_ENCODING_TYPE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {LAYER_TYPE, ENC, H264, - V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_B, - V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P, - BIT(V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_B) | - BIT(V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P), - V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P, - V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_TYPE, - HFI_PROP_LAYER_ENCODING_TYPE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {LAYER_ENABLE, ENC, H264, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING, - HFI_PROP_LAYER_ENCODING_TYPE, - CAP_FLAG_OUTPUT_PORT}, - - {LAYER_ENABLE, ENC, HEVC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - 0, - 0, - CAP_FLAG_OUTPUT_PORT}, - - {ENH_LAYER_COUNT, ENC, HEVC, - 0, 5, 1, 0, - V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER, - HFI_PROP_LAYER_COUNT, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {ENH_LAYER_COUNT, ENC, H264, - 0, 5, 1, 0, - V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_LAYER, - HFI_PROP_LAYER_COUNT, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {L0_BR, ENC, H264, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L0_BR, - HFI_PROP_BITRATE_LAYER1, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {L0_BR, ENC, HEVC, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L0_BR, - HFI_PROP_BITRATE_LAYER1, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {L1_BR, ENC, H264, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L1_BR, - HFI_PROP_BITRATE_LAYER2, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {L1_BR, ENC, HEVC, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L1_BR, - HFI_PROP_BITRATE_LAYER2, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {L2_BR, ENC, H264, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L2_BR, - HFI_PROP_BITRATE_LAYER3, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {L2_BR, ENC, HEVC, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L2_BR, - HFI_PROP_BITRATE_LAYER3, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {L3_BR, ENC, H264, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L3_BR, - HFI_PROP_BITRATE_LAYER4, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - {L3_BR, ENC, HEVC, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L3_BR, - HFI_PROP_BITRATE_LAYER4, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {L4_BR, ENC, H264, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L4_BR, - HFI_PROP_BITRATE_LAYER5, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {L4_BR, ENC, HEVC, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L4_BR, - HFI_PROP_BITRATE_LAYER5, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {L5_BR, ENC, H264, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L5_BR, - HFI_PROP_BITRATE_LAYER6, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {L5_BR, ENC, HEVC, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L5_BR, - HFI_PROP_BITRATE_LAYER6, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {ENTROPY_MODE, ENC, H264, - V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC, - V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, - BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC) | - BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC), - V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, - V4L2_CID_MPEG_VIDEO_H264_ENTROPY_MODE, - HFI_PROP_CABAC_SESSION, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {ENTROPY_MODE, DEC, H264|HEVC|VP9, - V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC, - V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, - BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC) | - BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC), - V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, - 0, - HFI_PROP_CABAC_SESSION}, - - {PROFILE, ENC|DEC, H264, - V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE, - V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH, - BIT(V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE) | - BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH) | - BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_BASELINE) | - BIT(V4L2_MPEG_VIDEO_H264_PROFILE_MAIN) | - BIT(V4L2_MPEG_VIDEO_H264_PROFILE_HIGH), - V4L2_MPEG_VIDEO_H264_PROFILE_HIGH, - V4L2_CID_MPEG_VIDEO_H264_PROFILE, - HFI_PROP_PROFILE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {PROFILE, ENC|DEC, HEVC|HEIC, - V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN, - V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE, - BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN) | - BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE) | - BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10) | - BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE), - V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN, - V4L2_CID_MPEG_VIDEO_HEVC_PROFILE, - HFI_PROP_PROFILE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {PROFILE, DEC, VP9, - V4L2_MPEG_VIDEO_VP9_PROFILE_0, - V4L2_MPEG_VIDEO_VP9_PROFILE_2, - BIT(V4L2_MPEG_VIDEO_VP9_PROFILE_0) | - BIT(V4L2_MPEG_VIDEO_VP9_PROFILE_2), - V4L2_MPEG_VIDEO_VP9_PROFILE_0, - V4L2_CID_MPEG_VIDEO_VP9_PROFILE, - HFI_PROP_PROFILE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {LEVEL, ENC, H264, - V4L2_MPEG_VIDEO_H264_LEVEL_1_0, - V4L2_MPEG_VIDEO_H264_LEVEL_6_0, - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1B) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_3) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_0), - V4L2_MPEG_VIDEO_H264_LEVEL_5_0, - V4L2_CID_MPEG_VIDEO_H264_LEVEL, - HFI_PROP_LEVEL, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {LEVEL, ENC, HEVC|HEIC, - V4L2_MPEG_VIDEO_HEVC_LEVEL_1, - V4L2_MPEG_VIDEO_HEVC_LEVEL_6, - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6), - V4L2_MPEG_VIDEO_HEVC_LEVEL_5, - V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, - HFI_PROP_LEVEL, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {LEVEL, DEC, H264, - V4L2_MPEG_VIDEO_H264_LEVEL_1_0, - V4L2_MPEG_VIDEO_H264_LEVEL_6_2, - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1B) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_3) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_1), - V4L2_MPEG_VIDEO_H264_LEVEL_6_1, - V4L2_CID_MPEG_VIDEO_H264_LEVEL, - HFI_PROP_LEVEL, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {LEVEL, DEC, HEVC|HEIC, - V4L2_MPEG_VIDEO_HEVC_LEVEL_1, - V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2, - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1), - V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1, - V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, - HFI_PROP_LEVEL, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {LEVEL, DEC, VP9, - V4L2_MPEG_VIDEO_VP9_LEVEL_1_0, - V4L2_MPEG_VIDEO_VP9_LEVEL_6_0, - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_1_0) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_1_1) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_2_0) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_2_1) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_3_0) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_3_1) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_4_0) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_4_1) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_0) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_1) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_2) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_6_0), - V4L2_MPEG_VIDEO_VP9_LEVEL_6_0, - V4L2_CID_MPEG_VIDEO_VP9_LEVEL, - HFI_PROP_LEVEL, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {HEVC_TIER, ENC|DEC, HEVC, - V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, - V4L2_MPEG_VIDEO_HEVC_TIER_HIGH, - BIT(V4L2_MPEG_VIDEO_HEVC_TIER_MAIN) | - BIT(V4L2_MPEG_VIDEO_HEVC_TIER_HIGH), - V4L2_MPEG_VIDEO_HEVC_TIER_HIGH, - V4L2_CID_MPEG_VIDEO_HEVC_TIER, - HFI_PROP_TIER, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {HEVC_TIER, ENC|DEC, HEIC, - V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, - V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, - BIT(V4L2_MPEG_VIDEO_HEVC_TIER_MAIN), - V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, - V4L2_CID_MPEG_VIDEO_HEVC_TIER, - HFI_PROP_TIER, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {LF_MODE, ENC, H264, - V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED, - DB_H264_DISABLE_SLICE_BOUNDARY, - BIT(V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED) | - BIT(V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_DISABLED) | - BIT(DB_H264_DISABLE_SLICE_BOUNDARY), - V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED, - V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_MODE, - HFI_PROP_DEBLOCKING_MODE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {LF_MODE, ENC, HEVC|HEIC, - V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_DISABLED, - DB_HEVC_DISABLE_SLICE_BOUNDARY, - BIT(V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_DISABLED) | - BIT(V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_ENABLED) | - BIT(DB_HEVC_DISABLE_SLICE_BOUNDARY), - V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_ENABLED, - V4L2_CID_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE, - HFI_PROP_DEBLOCKING_MODE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {LF_ALPHA, ENC, H264, - -6, 6, 1, 0, - V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_ALPHA}, - - {LF_ALPHA, ENC, HEVC|HEIC, - -6, 6, 1, 0, - V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2}, - - {LF_BETA, ENC, H264, - -6, 6, 1, 0, - V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_BETA}, - - {LF_BETA, ENC, HEVC|HEIC, - -6, 6, 1, 0, - V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2}, - - {SLICE_MODE, ENC, H264|HEVC, - V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, - V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_BYTES, - BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE) | - BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_MB) | - BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_BYTES), - V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, - V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE, - 0, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {SLICE_MODE, ENC, HEIC, - V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, - V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, - BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE), - V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, - V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE, - 0, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {SLICE_MAX_BYTES, ENC, H264|HEVC, - MIN_SLICE_BYTE_SIZE, MAX_SLICE_BYTE_SIZE, - 1, MIN_SLICE_BYTE_SIZE, - V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES, - HFI_PROP_MULTI_SLICE_BYTES_COUNT, - CAP_FLAG_OUTPUT_PORT}, - - {SLICE_MAX_MB, ENC, H264|HEVC, - 1, MAX_SLICE_MB_SIZE, 1, 1, - V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB, - HFI_PROP_MULTI_SLICE_MB_COUNT, - CAP_FLAG_OUTPUT_PORT}, - - {MB_RC, ENC, H264|HEVC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_ENABLE, - V4L2_CID_MPEG_VIDEO_MB_RC_ENABLE, - 0, - CAP_FLAG_OUTPUT_PORT}, - - {TRANSFORM_8X8, ENC, H264, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_ENABLE, - V4L2_CID_MPEG_VIDEO_H264_8X8_TRANSFORM, - HFI_PROP_8X8_TRANSFORM, - CAP_FLAG_OUTPUT_PORT}, - - {CHROMA_QP_INDEX_OFFSET, ENC, HEVC, - MIN_CHROMA_QP_OFFSET, MAX_CHROMA_QP_OFFSET, - 1, MAX_CHROMA_QP_OFFSET, - V4L2_CID_MPEG_VIDEO_H264_CHROMA_QP_INDEX_OFFSET, - HFI_PROP_CHROMA_QP_OFFSET, - CAP_FLAG_OUTPUT_PORT}, - - {DISPLAY_DELAY_ENABLE, DEC, H264|HEVC|VP9, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY_ENABLE, - HFI_PROP_DECODE_ORDER_OUTPUT, - CAP_FLAG_INPUT_PORT}, - - {DISPLAY_DELAY, DEC, H264|HEVC|VP9, - 0, 1, 1, 0, - V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY, - HFI_PROP_DECODE_ORDER_OUTPUT, - CAP_FLAG_INPUT_PORT}, - - {OUTPUT_ORDER, DEC, H264|HEVC|VP9, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - 0, - HFI_PROP_DECODE_ORDER_OUTPUT, - CAP_FLAG_INPUT_PORT}, - - {INPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL, - DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT, - 1, DEFAULT_MAX_HOST_BUF_COUNT, - 0, - HFI_PROP_BUFFER_HOST_MAX_COUNT, - CAP_FLAG_INPUT_PORT}, - - {OUTPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL, - DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT, - 1, DEFAULT_MAX_HOST_BUF_COUNT, - 0, - HFI_PROP_BUFFER_HOST_MAX_COUNT, - CAP_FLAG_OUTPUT_PORT}, - - {CONCEAL_COLOR_8BIT, DEC, CODECS_ALL, 0x0, 0xff3fcff, 1, - DEFAULT_VIDEO_CONCEAL_COLOR_BLACK, - V4L2_CID_MPEG_VIDEO_MUTE_YUV, - HFI_PROP_CONCEAL_COLOR_8BIT, - CAP_FLAG_INPUT_PORT}, - - {CONCEAL_COLOR_10BIT, DEC, CODECS_ALL, 0x0, 0x3fffffff, 1, - DEFAULT_VIDEO_CONCEAL_COLOR_BLACK, - V4L2_CID_MPEG_VIDEO_MUTE_YUV, - HFI_PROP_CONCEAL_COLOR_10BIT, - CAP_FLAG_INPUT_PORT}, - - {STAGE, DEC|ENC, CODECS_ALL, - MSM_VIDC_STAGE_1, - MSM_VIDC_STAGE_2, 1, - MSM_VIDC_STAGE_2, - 0, - HFI_PROP_STAGE}, - - {PIPE, DEC|ENC, CODECS_ALL, - MSM_VIDC_PIPE_1, - MSM_VIDC_PIPE_4, 1, - MSM_VIDC_PIPE_4, - 0, - HFI_PROP_PIPE}, - - {POC, DEC, H264, 0, 2, 1, 1, - 0, - HFI_PROP_PIC_ORDER_CNT_TYPE}, - - {QUALITY_MODE, ENC, CODECS_ALL, - MSM_VIDC_MAX_QUALITY_MODE, - MSM_VIDC_POWER_SAVE_MODE, 1, - MSM_VIDC_POWER_SAVE_MODE}, - - {CODED_FRAMES, DEC, H264|HEVC|HEIC, - CODED_FRAMES_PROGRESSIVE, CODED_FRAMES_INTERLACE, - 1, CODED_FRAMES_PROGRESSIVE, - 0, - HFI_PROP_CODED_FRAMES}, - - {BIT_DEPTH, DEC, CODECS_ALL, BIT_DEPTH_8, BIT_DEPTH_10, 1, BIT_DEPTH_8, - 0, - HFI_PROP_LUMA_CHROMA_BIT_DEPTH}, - - {CODEC_CONFIG, DEC, H264|HEVC|HEIC, 0, 1, 1, 0, - V4L2_CID_MPEG_VIDC_CODEC_CONFIG, 0, - CAP_FLAG_DYNAMIC_ALLOWED}, - - {BITSTREAM_SIZE_OVERWRITE, DEC, CODECS_ALL, 0, INT_MAX, 1, 0, - V4L2_CID_MPEG_VIDC_MIN_BITSTREAM_SIZE_OVERWRITE}, - - {THUMBNAIL_MODE, DEC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_THUMBNAIL_MODE, - HFI_PROP_THUMBNAIL_MODE, - CAP_FLAG_INPUT_PORT}, - - {DEFAULT_HEADER, DEC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - 0, - HFI_PROP_DEC_DEFAULT_HEADER}, - - {RAP_FRAME, DEC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_ENABLE, - 0, - HFI_PROP_DEC_START_FROM_RAP_FRAME, - CAP_FLAG_INPUT_PORT}, - - {SEQ_CHANGE_AT_SYNC_FRAME, DEC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_ENABLE, - 0, - HFI_PROP_SEQ_CHANGE_AT_SYNC_FRAME, - CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - - {PRIORITY, DEC|ENC, CODECS_ALL, - 0, 1 + NRT_PRIORITY_OFFSET, 1, 1 + NRT_PRIORITY_OFFSET, - V4L2_CID_MPEG_VIDC_PRIORITY, - HFI_PROP_SESSION_PRIORITY, - CAP_FLAG_DYNAMIC_ALLOWED}, - - {FIRMWARE_PRIORITY_OFFSET, DEC | ENC, CODECS_ALL, - 1, 1, 1, 1}, - - {CRITICAL_PRIORITY, ENC, CODECS_ALL, - 0, 1, 1, 0, - V4L2_CID_MPEG_VIDC_CRITICAL_PRIORITY}, - - {RESERVE_DURATION, ENC, CODECS_ALL, - 0, INT_MAX, 1, 0, - V4L2_CID_MPEG_VIDC_RESERVE_DURATION, - HFI_CMD_RESERVE, - CAP_FLAG_DYNAMIC_ALLOWED}, - - {ENC_IP_CR, ENC, CODECS_ALL, - 0, S32_MAX, 1, 0, - V4L2_CID_MPEG_VIDC_ENC_INPUT_COMPRESSION_RATIO, - 0, CAP_FLAG_DYNAMIC_ALLOWED}, - - {DPB_LIST, DEC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - 0, - HFI_PROP_DPB_LIST, - CAP_FLAG_OUTPUT_PORT}, - - {ALL_INTRA, ENC, H264|HEVC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - 0, - 0, - CAP_FLAG_OUTPUT_PORT}, - - {META_LTR_MARK_USE, ENC, H264|HEVC, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_LTR_MARK_USE_DETAILS, - HFI_PROP_LTR_MARK_USE_DETAILS, - CAP_FLAG_BITMASK | CAP_FLAG_META}, - - {META_SEQ_HDR_NAL, ENC, CODECS_ALL, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_SEQ_HEADER_NAL, - HFI_PROP_METADATA_SEQ_HEADER_NAL, - CAP_FLAG_BITMASK | CAP_FLAG_META}, - - {META_DPB_MISR, DEC, CODECS_ALL, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_DPB_LUMA_CHROMA_MISR, - HFI_PROP_DPB_LUMA_CHROMA_MISR, - CAP_FLAG_BITMASK | CAP_FLAG_META}, - - {META_OPB_MISR, DEC, CODECS_ALL, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_OPB_LUMA_CHROMA_MISR, - HFI_PROP_OPB_LUMA_CHROMA_MISR, - CAP_FLAG_BITMASK | CAP_FLAG_META}, - - {META_INTERLACE, DEC, H264, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_INTERLACE, - HFI_PROP_INTERLACE_INFO, - CAP_FLAG_BITMASK | CAP_FLAG_META}, - - {META_TIMESTAMP, DEC | ENC, CODECS_ALL, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_TIMESTAMP, - HFI_PROP_TIMESTAMP, - CAP_FLAG_BITMASK | CAP_FLAG_META}, - - {META_CONCEALED_MB_CNT, DEC, CODECS_ALL, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_CONCEALED_MB_COUNT, - HFI_PROP_CONEALED_MB_COUNT, - CAP_FLAG_BITMASK | CAP_FLAG_META}, - - {META_HIST_INFO, DEC, CODECS_ALL, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_HISTOGRAM_INFO, - HFI_PROP_HISTOGRAM_INFO, - CAP_FLAG_BITMASK | CAP_FLAG_META}, - - {META_SEI_MASTERING_DISP, ENC, HEVC|HEIC, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_TX_INPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_SEI_MASTERING_DISPLAY_COLOUR, - HFI_PROP_SEI_MASTERING_DISPLAY_COLOUR, - CAP_FLAG_BITMASK | CAP_FLAG_META}, - - {META_SEI_MASTERING_DISP, DEC, HEVC|HEIC, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_INPUT | - V4L2_MPEG_VIDC_META_RX_OUTPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_SEI_MASTERING_DISPLAY_COLOUR, - HFI_PROP_SEI_MASTERING_DISPLAY_COLOUR, - CAP_FLAG_BITMASK | CAP_FLAG_META}, - - {META_SEI_CLL, ENC, HEVC|HEIC, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_TX_INPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_SEI_CONTENT_LIGHT_LEVEL, - HFI_PROP_SEI_CONTENT_LIGHT_LEVEL, - CAP_FLAG_BITMASK | CAP_FLAG_META}, - - {META_SEI_CLL, DEC, HEVC|HEIC, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_INPUT | - V4L2_MPEG_VIDC_META_RX_OUTPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_SEI_CONTENT_LIGHT_LEVEL, - HFI_PROP_SEI_CONTENT_LIGHT_LEVEL, - CAP_FLAG_BITMASK | CAP_FLAG_META}, - - {META_HDR10PLUS, ENC, HEVC|HEIC, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_TX_INPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_HDR10PLUS, - HFI_PROP_SEI_HDR10PLUS_USERDATA, - CAP_FLAG_BITMASK | CAP_FLAG_META}, - - {META_HDR10PLUS, DEC, HEVC|HEIC, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_INPUT | - V4L2_MPEG_VIDC_META_RX_OUTPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_HDR10PLUS, - HFI_PROP_SEI_HDR10PLUS_USERDATA, - CAP_FLAG_BITMASK | CAP_FLAG_META}, - - {META_EVA_STATS, ENC, CODECS_ALL, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_TX_INPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_EVA_STATS, - HFI_PROP_EVA_STAT_INFO, - CAP_FLAG_BITMASK | CAP_FLAG_META}, - - {META_BUF_TAG, ENC, CODECS_ALL, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_TX_INPUT | - V4L2_MPEG_VIDC_META_RX_OUTPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_BUFFER_TAG, - HFI_PROP_BUFFER_TAG, - CAP_FLAG_BITMASK | CAP_FLAG_META}, - - {META_BUF_TAG, DEC, CODECS_ALL, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_TX_INPUT | - V4L2_MPEG_VIDC_META_TX_OUTPUT | V4L2_MPEG_VIDC_META_RX_INPUT | - V4L2_MPEG_VIDC_META_RX_OUTPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_BUFFER_TAG, - HFI_PROP_BUFFER_TAG, - CAP_FLAG_BITMASK | CAP_FLAG_META}, - - {META_DPB_TAG_LIST, DEC, CODECS_ALL, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_DPB_TAG_LIST, - HFI_PROP_DPB_TAG_LIST, - CAP_FLAG_BITMASK | CAP_FLAG_META}, - - {META_SUBFRAME_OUTPUT, ENC, HEIC, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_SUBFRAME_OUTPUT, - HFI_PROP_SUBFRAME_OUTPUT, - CAP_FLAG_BITMASK | CAP_FLAG_META}, - - {META_SUBFRAME_OUTPUT, DEC, CODECS_ALL, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_SUBFRAME_OUTPUT, - HFI_PROP_SUBFRAME_OUTPUT, - CAP_FLAG_BITMASK | CAP_FLAG_META}, - - {META_ENC_QP_METADATA, ENC, CODECS_ALL, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_ENC_QP_METADATA, - HFI_PROP_ENC_QP_METADATA, - CAP_FLAG_BITMASK | CAP_FLAG_META}, - - {META_ROI_INFO, ENC, CODECS_ALL, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_TX_INPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_ROI_INFO, - HFI_PROP_ROI_INFO, - CAP_FLAG_INPUT_PORT | CAP_FLAG_BITMASK | CAP_FLAG_META}, - - {META_SALIENCY_INFO, ENC, H264|HEVC, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_TX_INPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_SALIENCY_INFO, - HFI_PROP_ROI_AS_SALIENCY_INFO, - CAP_FLAG_INPUT_PORT | CAP_FLAG_BITMASK | CAP_FLAG_META}, - - {META_DEC_QP_METADATA, DEC, CODECS_ALL, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_DEC_QP_METADATA, - HFI_PROP_DEC_QP_METADATA, - CAP_FLAG_BITMASK | CAP_FLAG_META}, - - {GRID, ENC, HEIC, - V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_ENABLE, - 0, - HFI_PROP_HEIC_GRID_ENABLE, - CAP_FLAG_OUTPUT_PORT}, - - {COMPLEXITY, ENC, H264 | HEVC, - 0, 100, - 1, DEFAULT_COMPLEXITY, - V4L2_CID_MPEG_VIDC_VENC_COMPLEXITY}, - - {META_MAX_NUM_REORDER_FRAMES, DEC, HEVC | H264, - V4L2_MPEG_VIDC_META_DISABLE, - V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT, - 0, V4L2_MPEG_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_MAX_NUM_REORDER_FRAMES, - HFI_PROP_MAX_NUM_REORDER_FRAMES, - CAP_FLAG_BITMASK | CAP_FLAG_META}, -}; - -static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_waipio[] = { - /* {cap, domain, codec, - * parents, - * children, - * adjust, set} - */ - - {PIX_FMTS, ENC, H264, - {META_ROI_INFO, IR_PERIOD}}, - - {PIX_FMTS, ENC, HEVC, - {PROFILE, MIN_FRAME_QP, MAX_FRAME_QP, I_FRAME_QP, P_FRAME_QP, - B_FRAME_QP, META_ROI_INFO, MIN_QUALITY, BLUR_TYPES, IR_PERIOD}}, - - {PIX_FMTS, ENC, HEIC, - {PROFILE}}, - - {PIX_FMTS, DEC, HEVC|HEIC, - {PROFILE}}, - - {FRAME_RATE, ENC, CODECS_ALL, - {0}, - NULL, - msm_vidc_set_q16}, - - {FRAME_RATE, DEC, CODECS_ALL, - {0}, - msm_vidc_adjust_dec_frame_rate}, - - {OPERATING_RATE, DEC, CODECS_ALL, - {0}, - msm_vidc_adjust_dec_operating_rate}, - - {SECURE_MODE, ENC|DEC, H264|HEVC|VP9, - {0}, - NULL, - msm_vidc_set_u32}, - - {META_OUTBUF_FENCE, DEC, H264|HEVC|VP9, - {LOWLATENCY_MODE}, - NULL, - NULL}, - - {HFLIP, ENC, CODECS_ALL, - {0}, - NULL, - msm_vidc_set_flip}, - - {VFLIP, ENC, CODECS_ALL, - {0}, - NULL, - msm_vidc_set_flip}, - - {ROTATION, ENC, CODECS_ALL, - {0}, - NULL, - msm_vidc_set_rotation}, - - {SUPER_FRAME, ENC, H264|HEVC, - {INPUT_BUF_HOST_MAX_COUNT, OUTPUT_BUF_HOST_MAX_COUNT}, - NULL, - NULL}, - - {HEADER_MODE, ENC, CODECS_ALL, - {0}, - NULL, - msm_vidc_set_header_mode}, - - {WITHOUT_STARTCODE, ENC, CODECS_ALL, - {0}, - NULL, - msm_vidc_set_nal_length}, - - {REQUEST_I_FRAME, ENC, H264|HEVC, - {0}, - NULL, - msm_vidc_set_req_sync_frame}, - - {BIT_RATE, ENC, H264|HEVC, - {PEAK_BITRATE, L0_BR}, - msm_vidc_adjust_bitrate, - msm_vidc_set_bitrate}, - - {BITRATE_MODE, ENC, H264, - {LTR_COUNT, IR_PERIOD, TIME_DELTA_BASED_RC, I_FRAME_QP, - P_FRAME_QP, B_FRAME_QP, ENH_LAYER_COUNT, BIT_RATE, - META_ROI_INFO, MIN_QUALITY, BITRATE_BOOST, VBV_DELAY, - PEAK_BITRATE, SLICE_MODE, CONTENT_ADAPTIVE_CODING, - BLUR_TYPES, LOWLATENCY_MODE}, - msm_vidc_adjust_bitrate_mode, - msm_vidc_set_u32_enum}, - - {BITRATE_MODE, ENC, HEVC, - {LTR_COUNT, IR_PERIOD, TIME_DELTA_BASED_RC, I_FRAME_QP, - P_FRAME_QP, B_FRAME_QP, CONSTANT_QUALITY, ENH_LAYER_COUNT, - BIT_RATE, META_ROI_INFO, MIN_QUALITY, BITRATE_BOOST, VBV_DELAY, - PEAK_BITRATE, SLICE_MODE, CONTENT_ADAPTIVE_CODING, - BLUR_TYPES, LOWLATENCY_MODE}, - msm_vidc_adjust_bitrate_mode, - msm_vidc_set_u32_enum}, - - {BITRATE_MODE, ENC, HEIC, - {TIME_DELTA_BASED_RC, CONSTANT_QUALITY}, - msm_vidc_adjust_bitrate_mode, - msm_vidc_set_u32_enum}, - - {CONSTANT_QUALITY, ENC, HEVC|HEIC, - {0}, - NULL, - msm_vidc_set_constant_quality}, - - {GOP_SIZE, ENC, CODECS_ALL, - {ALL_INTRA}, - msm_vidc_adjust_gop_size, - msm_vidc_set_gop_size}, - - {GOP_SIZE, ENC, HEIC, - {0}, - NULL, - msm_vidc_set_u32}, - - {B_FRAME, ENC, H264|HEVC, - {ALL_INTRA}, - msm_vidc_adjust_b_frame, - msm_vidc_set_u32}, - - {B_FRAME, ENC, HEIC, - {0}, - NULL, - msm_vidc_set_u32}, - - {BLUR_TYPES, ENC, H264|HEVC, - {BLUR_RESOLUTION}, - msm_vidc_adjust_blur_type_iris2, - msm_vidc_set_u32_enum}, - - {BLUR_RESOLUTION, ENC, H264|HEVC, - {0}, - msm_vidc_adjust_blur_resolution, - msm_vidc_set_blur_resolution}, - - {CSC_CUSTOM_MATRIX, ENC, CODECS_ALL, - {0}, - NULL, - msm_vidc_set_csc_custom_matrix}, - - {LOWLATENCY_MODE, ENC, H264 | HEVC, - {STAGE}, - msm_vidc_adjust_enc_lowlatency_mode, - NULL}, - - {LOWLATENCY_MODE, DEC, H264|HEVC|VP9, - {STAGE}, - msm_vidc_adjust_dec_lowlatency_mode, - NULL}, - - {LTR_COUNT, ENC, H264|HEVC, - {0}, - msm_vidc_adjust_ltr_count, - msm_vidc_set_u32}, - - {USE_LTR, ENC, H264|HEVC, - {0}, - msm_vidc_adjust_use_ltr, - msm_vidc_set_use_and_mark_ltr}, - - {MARK_LTR, ENC, H264|HEVC, - {0}, - msm_vidc_adjust_mark_ltr, - msm_vidc_set_use_and_mark_ltr}, - - {IR_PERIOD, ENC, H264|HEVC, - {0}, - msm_vidc_adjust_ir_period, - msm_vidc_set_ir_period}, - - {AU_DELIMITER, ENC, H264|HEVC, - {0}, - NULL, - msm_vidc_set_u32}, - - {TIME_DELTA_BASED_RC, ENC, CODECS_ALL, - {0}, - msm_vidc_adjust_delta_based_rc, - msm_vidc_set_u32}, - - {CONTENT_ADAPTIVE_CODING, ENC, H264|HEVC, - {REQUEST_PREPROCESS}, - msm_vidc_adjust_brs, - msm_vidc_set_vbr_related_properties}, - - {REQUEST_PREPROCESS, ENC, H264|HEVC, - {0}, - msm_vidc_adjust_preprocess, - NULL}, - - {BITRATE_BOOST, ENC, H264|HEVC, - {0}, - msm_vidc_adjust_bitrate_boost, - msm_vidc_set_vbr_related_properties}, - - {MIN_QUALITY, ENC, H264, - {BLUR_TYPES}, - msm_vidc_adjust_min_quality, - msm_vidc_set_vbr_related_properties}, - - {MIN_QUALITY, ENC, HEVC, - {BLUR_TYPES}, - msm_vidc_adjust_min_quality, - msm_vidc_set_vbr_related_properties}, - - {VBV_DELAY, ENC, H264|HEVC, - {0}, - NULL, - msm_vidc_set_cbr_related_properties}, - - {PEAK_BITRATE, ENC, H264|HEVC, - {0}, - msm_vidc_adjust_peak_bitrate, - msm_vidc_set_cbr_related_properties}, - - {MIN_FRAME_QP, ENC, H264, - {0}, - NULL, - msm_vidc_set_min_qp}, - - {MIN_FRAME_QP, ENC, HEVC, - {0}, - msm_vidc_adjust_hevc_min_qp, - msm_vidc_set_min_qp}, - - {MAX_FRAME_QP, ENC, H264, - {0}, - NULL, - msm_vidc_set_max_qp}, - - {MAX_FRAME_QP, ENC, HEVC, - {0}, - msm_vidc_adjust_hevc_max_qp, - msm_vidc_set_max_qp}, - - {I_FRAME_QP, ENC, HEVC, - {0}, - msm_vidc_adjust_hevc_i_frame_qp, - msm_vidc_set_frame_qp}, - - {I_FRAME_QP, ENC, H264, - {0}, - NULL, - msm_vidc_set_frame_qp}, - - {P_FRAME_QP, ENC, HEVC, - {0}, - msm_vidc_adjust_hevc_p_frame_qp, - msm_vidc_set_frame_qp}, - - {P_FRAME_QP, ENC, H264, - {0}, - NULL, - msm_vidc_set_frame_qp}, - - {B_FRAME_QP, ENC, HEVC, - {0}, - msm_vidc_adjust_hevc_b_frame_qp, - msm_vidc_set_frame_qp}, - - {B_FRAME_QP, ENC, H264, - {0}, - NULL, - msm_vidc_set_frame_qp}, - - {LAYER_TYPE, ENC, H264|HEVC, - {CONTENT_ADAPTIVE_CODING}}, - - {LAYER_ENABLE, ENC, H264|HEVC, - {CONTENT_ADAPTIVE_CODING}}, - - {ENH_LAYER_COUNT, ENC, H264|HEVC, - {GOP_SIZE, B_FRAME, BIT_RATE, MIN_QUALITY, SLICE_MODE}, - msm_vidc_adjust_layer_count, - msm_vidc_set_layer_count_and_type}, - - {L0_BR, ENC, H264|HEVC, - {L1_BR}, - msm_vidc_adjust_layer_bitrate, - msm_vidc_set_layer_bitrate}, - - {L1_BR, ENC, H264|HEVC, - {L2_BR}, - msm_vidc_adjust_layer_bitrate, - msm_vidc_set_layer_bitrate}, - - {L2_BR, ENC, H264|HEVC, - {L3_BR}, - msm_vidc_adjust_layer_bitrate, - msm_vidc_set_layer_bitrate}, - - {L3_BR, ENC, H264|HEVC, - {L4_BR}, - msm_vidc_adjust_layer_bitrate, - msm_vidc_set_layer_bitrate}, - - {L4_BR, ENC, H264|HEVC, - {L5_BR}, - msm_vidc_adjust_layer_bitrate, - msm_vidc_set_layer_bitrate}, - - {L5_BR, ENC, H264|HEVC, - {0}, - msm_vidc_adjust_layer_bitrate, - msm_vidc_set_layer_bitrate}, - - {ENTROPY_MODE, ENC, H264, - {0}, - msm_vidc_adjust_entropy_mode, - msm_vidc_set_u32}, - - {PROFILE, ENC, H264, - {ENTROPY_MODE, TRANSFORM_8X8}, - NULL, - msm_vidc_set_u32_enum}, - - {PROFILE, DEC, H264, - {ENTROPY_MODE}, - NULL, - msm_vidc_set_u32_enum}, - - {PROFILE, ENC|DEC, HEVC|HEIC, - {0}, - msm_vidc_adjust_profile, - msm_vidc_set_u32_enum}, - - {PROFILE, DEC, VP9, - {0}, - NULL, - msm_vidc_set_u32_enum}, - - {LEVEL, DEC, CODECS_ALL, - {0}, - NULL, - msm_vidc_set_u32_enum}, - - {LEVEL, ENC, CODECS_ALL, - {0}, - NULL, - msm_vidc_set_level}, - - {HEVC_TIER, ENC|DEC, HEVC|HEIC, - {0}, - NULL, - msm_vidc_set_u32_enum}, - - {LF_MODE, ENC, CODECS_ALL, - {0}, - NULL, - msm_vidc_set_deblock_mode}, - - {SLICE_MODE, ENC, H264|HEVC, - {STAGE}, - msm_vidc_adjust_slice_count, - msm_vidc_set_slice_count}, - - {SLICE_MODE, ENC, HEIC, - {0}, - msm_vidc_adjust_slice_count, - msm_vidc_set_slice_count}, - - {TRANSFORM_8X8, ENC, H264, - {0}, - msm_vidc_adjust_transform_8x8, - msm_vidc_set_u32}, - - {CHROMA_QP_INDEX_OFFSET, ENC, HEVC, - {0}, - msm_vidc_adjust_chroma_qp_index_offset, - msm_vidc_set_chroma_qp_index_offset}, - - {DISPLAY_DELAY_ENABLE, DEC, H264|HEVC|VP9, - {OUTPUT_ORDER}, - NULL, - NULL}, - - {DISPLAY_DELAY, DEC, H264|HEVC|VP9, - {OUTPUT_ORDER}, - NULL, - NULL}, - - {OUTPUT_ORDER, DEC, H264|HEVC|VP9, - {META_OUTBUF_FENCE}, - msm_vidc_adjust_output_order, - msm_vidc_set_u32}, - - {INPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL, - {0}, - msm_vidc_adjust_input_buf_host_max_count, - msm_vidc_set_u32}, - - {INPUT_BUF_HOST_MAX_COUNT, ENC, H264|HEVC, - {0}, - msm_vidc_adjust_input_buf_host_max_count, - msm_vidc_set_u32}, - - {OUTPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL, - {0}, - msm_vidc_adjust_output_buf_host_max_count, - msm_vidc_set_u32}, - - {OUTPUT_BUF_HOST_MAX_COUNT, ENC, H264|HEVC, - {0}, - msm_vidc_adjust_output_buf_host_max_count, - msm_vidc_set_u32}, - - {CONCEAL_COLOR_8BIT, DEC, CODECS_ALL, - {0}, - NULL, - msm_vidc_set_u32_packed}, - - {CONCEAL_COLOR_10BIT, DEC, CODECS_ALL, - {0}, - NULL, - msm_vidc_set_u32_packed}, - - {STAGE, ENC|DEC, CODECS_ALL, - {0}, - NULL, - msm_vidc_set_stage}, - - {STAGE, ENC, H264|HEVC, - {0}, - NULL, - msm_vidc_set_stage}, - - {STAGE, DEC, H264|HEVC|VP9, - {0}, - NULL, - msm_vidc_set_stage}, - - {PIPE, DEC|ENC, CODECS_ALL, - {0}, - NULL, - msm_vidc_set_pipe}, - - {THUMBNAIL_MODE, DEC, H264|HEVC|VP9|AV1, - {OUTPUT_ORDER}, - NULL, - msm_vidc_set_u32}, - - {THUMBNAIL_MODE, DEC, HEIC, - {0}, - NULL, - msm_vidc_set_u32}, - - {RAP_FRAME, DEC, CODECS_ALL, - {0}, - NULL, - msm_vidc_set_u32}, - - {PRIORITY, DEC|ENC, CODECS_ALL, - {0}, - msm_vidc_adjust_session_priority, - msm_vidc_set_session_priority}, - - {FIRMWARE_PRIORITY_OFFSET, DEC | ENC, CODECS_ALL, - {0}, - NULL, - NULL}, - - {CRITICAL_PRIORITY, ENC, CODECS_ALL, - {0}, - NULL, - NULL}, - - {RESERVE_DURATION, ENC, CODECS_ALL, - {0}, - NULL, - msm_vidc_set_reserve_duration}, - - {DPB_LIST, DEC, CODECS_ALL, - {0}, - NULL, - NULL}, - - {ALL_INTRA, ENC, H264|HEVC, - {LTR_COUNT, IR_PERIOD, SLICE_MODE}, - msm_vidc_adjust_all_intra, - NULL}, - - {META_EVA_STATS, ENC, H264|HEVC, - {ENH_LAYER_COUNT, REQUEST_PREPROCESS}}, - - {META_EVA_STATS, ENC, HEIC, - {0}}, - - {META_ROI_INFO, ENC, H264|HEVC, - {MIN_QUALITY, IR_PERIOD, BLUR_TYPES}, - msm_vidc_adjust_roi_info, - NULL}, - - {META_ROI_INFO, ENC, HEIC, - {0}, - msm_vidc_adjust_roi_info, - NULL}, - - {GRID, ENC, HEIC, - {0}, - NULL, - msm_vidc_set_u32}, -}; - -/* Default UBWC config for LPDDR5 */ -static struct msm_vidc_ubwc_config_data ubwc_config_waipio[] = { - UBWC_CONFIG(8, 32, 16, 0, 1, 1, 1), -}; - -/* name, min_kbps, max_kbps */ -static const struct bw_table waipio_bw_table[] = { - { "venus-cnoc", 1000, 1000 }, - { "venus-ddr", 1000, 15000000 }, - { "venus-llcc", 1000, 15000000 }, -}; - -/* name, hw_trigger */ -static const struct regulator_table waipio_regulator_table[] = { - { "iris-ctl", 0 }, - { "vcodec", 1 }, -}; - -/* name, clock id, scaling */ -static const struct clk_table waipio_clk_table[] = { - { "gcc_video_axi0", GCC_VIDEO_AXI0_CLK, 0 }, - { "core_clk", VIDEO_CC_MVS0C_CLK, 0 }, - { "vcodec_clk", VIDEO_CC_MVS0_CLK, 0 }, - { "video_cc_mvs0_clk_src", VIDEO_CC_MVS0_CLK_SRC, 1 }, -}; - -/* name, exclusive_release */ -static const struct clk_rst_table waipio_clk_reset_table[] = { - { "video_axi_reset", 0 }, - { "video_core_reset", 0 }, -}; - -/* name, llcc_id */ -static const struct subcache_table waipio_subcache_table[] = { - { "vidsc0", LLCC_VIDSC0 }, -}; - -/* name, start, size, secure, dma_coherant */ -const struct context_bank_table waipio_context_bank_table[] = { - {"qcom,vidc,cb-ns", 0x25800000, 0xba800000, 0, 1, MSM_VIDC_NON_SECURE }, - {"qcom,vidc,cb-ns-pxl", 0x00100000, 0xdff00000, 0, 1, MSM_VIDC_NON_SECURE_PIXEL }, - {"qcom,vidc,cb-sec-pxl", 0x00500000, 0xdfb00000, 1, 0, MSM_VIDC_SECURE_PIXEL }, - {"qcom,vidc,cb-sec-non-pxl", 0x01000000, 0x24800000, 1, 0, MSM_VIDC_SECURE_NONPIXEL }, - {"qcom,vidc,cb-sec-bitstream", 0x00500000, 0xdfb00000, 1, 0, MSM_VIDC_SECURE_BITSTREAM }, -}; - -/* freq */ -static struct freq_table waipio_freq_table[] = { - {444000000}, {366000000}, {338000000}, {239999999} -}; - -/* register, value, mask */ -static const struct reg_preset_table waipio_reg_preset_table[] = { - { 0xB0088, 0x0, 0x11 }, -}; - -static const struct msm_vidc_platform_data waipio_data = { - /* resources dependent on other module */ - .bw_tbl = waipio_bw_table, - .bw_tbl_size = ARRAY_SIZE(waipio_bw_table), - .regulator_tbl = waipio_regulator_table, - .regulator_tbl_size = ARRAY_SIZE(waipio_regulator_table), - .clk_tbl = waipio_clk_table, - .clk_tbl_size = ARRAY_SIZE(waipio_clk_table), - .clk_rst_tbl = waipio_clk_reset_table, - .clk_rst_tbl_size = ARRAY_SIZE(waipio_clk_reset_table), - .subcache_tbl = waipio_subcache_table, - .subcache_tbl_size = ARRAY_SIZE(waipio_subcache_table), - - /* populate context bank */ - .context_bank_tbl = waipio_context_bank_table, - .context_bank_tbl_size = ARRAY_SIZE(waipio_context_bank_table), - - /* platform specific resources */ - .freq_tbl = waipio_freq_table, - .freq_tbl_size = ARRAY_SIZE(waipio_freq_table), - .reg_prst_tbl = waipio_reg_preset_table, - .reg_prst_tbl_size = ARRAY_SIZE(waipio_reg_preset_table), - .fwname = "vpu20_4v", - .pas_id = 9, - .supports_mmrm = 0, - - /* caps related resorces */ - .core_data = core_data_waipio, - .core_data_size = ARRAY_SIZE(core_data_waipio), - .inst_cap_data = instance_cap_data_waipio, - .inst_cap_data_size = ARRAY_SIZE(instance_cap_data_waipio), - .inst_cap_dependency_data = instance_cap_dependency_data_waipio, - .inst_cap_dependency_data_size = ARRAY_SIZE(instance_cap_dependency_data_waipio), - .csc_data.vpe_csc_custom_bias_coeff = vpe_csc_custom_bias_coeff, - .csc_data.vpe_csc_custom_matrix_coeff = vpe_csc_custom_matrix_coeff, - .csc_data.vpe_csc_custom_limit_coeff = vpe_csc_custom_limit_coeff, - .ubwc_config = ubwc_config_waipio, -}; - -static int msm_vidc_init_data(struct msm_vidc_core *core) -{ - int rc = 0; - - if (!core || !core->platform) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - d_vpr_h("%s: initialize waipio data\n", __func__); - - core->platform->data = waipio_data; - core->mem_ops = get_mem_ops_ext(); - if (!core->mem_ops) { - d_vpr_e("%s: invalid memory ext ops\n", __func__); - return -EINVAL; - } - core->res_ops = get_res_ops_ext(); - if (!core->res_ops) { - d_vpr_e("%s: invalid resource ext ops\n", __func__); - return -EINVAL; - } - - return rc; -} - -int msm_vidc_init_platform_waipio(struct msm_vidc_core *core, struct device *dev) -{ - int rc = 0; - - rc = msm_vidc_init_data(core); - if (rc) - return rc; - - return 0; -} - -int msm_vidc_deinit_platform_waipio(struct msm_vidc_core *core, struct device *dev) -{ - /* do nothing */ - return 0; -} diff --git a/driver/platform/waipio/src/waipio.c b/driver/platform/waipio/src/waipio.c index 8cc358d8c7..68e6c2f7b1 100644 --- a/driver/platform/waipio/src/waipio.c +++ b/driver/platform/waipio/src/waipio.c @@ -1750,7 +1750,7 @@ static const struct msm_vidc_platform_data waipio_data = { .format_data = &format_data_waipio, }; -static int msm_vidc_init_data(struct msm_vidc_core *core, struct device *dev) +static int msm_vidc_init_data(struct msm_vidc_core *core) { int rc = 0; @@ -1765,18 +1765,18 @@ static int msm_vidc_init_data(struct msm_vidc_core *core, struct device *dev) return rc; } -int msm_vidc_init_platform_waipio(struct msm_vidc_core *core, struct device *dev) +int msm_vidc_init_platform_waipio(struct msm_vidc_core *core) { int rc = 0; - rc = msm_vidc_init_data(core, dev); + rc = msm_vidc_init_data(core); if (rc) return rc; return 0; } -int msm_vidc_deinit_platform_waipio(struct msm_vidc_core *core, struct device *dev) +int msm_vidc_deinit_platform_waipio(struct msm_vidc_core *core) { /* do nothing */ return 0; diff --git a/driver/variant/iris2/inc/msm_vidc_iris2.h b/driver/variant/iris2/inc/msm_vidc_iris2.h index bf6c4b4840..fcb54a7e82 100644 --- a/driver/variant/iris2/inc/msm_vidc_iris2.h +++ b/driver/variant/iris2/inc/msm_vidc_iris2.h @@ -9,7 +9,7 @@ #include "msm_vidc_core.h" -#if defined(CONFIG_MSM_VIDC_IRIS2) +#if defined(CONFIG_MSM_VIDC_WAIPIO) int msm_vidc_init_iris2(struct msm_vidc_core *core); int msm_vidc_deinit_iris2(struct msm_vidc_core *core); int msm_vidc_adjust_blur_type_iris2(void *instance, struct v4l2_ctrl *ctrl); diff --git a/driver/variant/iris3/inc/msm_vidc_iris3.h b/driver/variant/iris3/inc/msm_vidc_iris3.h index 60e50ba37c..8a4cece4cf 100644 --- a/driver/variant/iris3/inc/msm_vidc_iris3.h +++ b/driver/variant/iris3/inc/msm_vidc_iris3.h @@ -9,7 +9,7 @@ #include "msm_vidc_core.h" -#if defined(CONFIG_MSM_VIDC_IRIS3) +#if defined(CONFIG_MSM_VIDC_KALAMA) int msm_vidc_init_iris3(struct msm_vidc_core *core); int msm_vidc_deinit_iris3(struct msm_vidc_core *core); int msm_vidc_adjust_bitrate_boost_iris3(void *instance, struct v4l2_ctrl *ctrl); diff --git a/driver/variant/iris33/inc/msm_vidc_iris33.h b/driver/variant/iris33/inc/msm_vidc_iris33.h index ee2aaf03f8..af23941d52 100644 --- a/driver/variant/iris33/inc/msm_vidc_iris33.h +++ b/driver/variant/iris33/inc/msm_vidc_iris33.h @@ -9,7 +9,7 @@ #include "msm_vidc_core.h" -#if defined(CONFIG_MSM_VIDC_IRIS33) +#if defined(CONFIG_MSM_VIDC_PINEAPPLE) int msm_vidc_init_iris33(struct msm_vidc_core *core); int msm_vidc_deinit_iris33(struct msm_vidc_core *core); int msm_vidc_adjust_bitrate_boost_iris33(void *instance, struct v4l2_ctrl *ctrl); diff --git a/driver/vidc/src/resources.c b/driver/vidc/src/resources.c index 09bacdf35f..4160707709 100644 --- a/driver/vidc/src/resources.c +++ b/driver/vidc/src/resources.c @@ -351,7 +351,7 @@ static int __init_power_domains(struct msm_vidc_core *core) const struct pd_table *pd_tbl; struct power_domain_set *pds; struct device **opp_vdevs = NULL; - const char **opp_tbl; + const char * const *opp_tbl; u32 pd_count = 0, opp_count = 0, cnt = 0; int rc = 0; diff --git a/msm_video/Kbuild b/msm_video/Kbuild index 611e95d82c..6eb67fcb65 100644 --- a/msm_video/Kbuild +++ b/msm_video/Kbuild @@ -4,80 +4,51 @@ KBUILD_CPPFLAGS += -DCONFIG_MSM_MMRM=1 VIDEO_DRIVER_ABS_PATH := $(VIDEO_ROOT)/msm_video/driver VIDEO_DRIVER_REL_PATH := ../msm_video/driver -ifeq ($(CONFIG_ARCH_WAIPIO), y) -include $(VIDEO_ROOT)/config/waipio_video.conf -LINUXINCLUDE += -include $(VIDEO_ROOT)/config/waipio_video.h \ - -I$(VIDEO_DRIVER_ABS_PATH)/platform/waipio/inc +ifeq ($(CONFIG_ARCH_PINEAPPLE), y) +include $(VIDEO_ROOT)/config/pineapple_video.conf +LINUXINCLUDE += -include $(VIDEO_ROOT)/config/pineapple_video.h endif ifeq ($(CONFIG_ARCH_KALAMA), y) include $(VIDEO_ROOT)/config/kalama_video.conf -LINUXINCLUDE += -include $(VIDEO_ROOT)/config/kalama_video.h \ - -I$(VIDEO_DRIVER_ABS_PATH)/platform/kalama/inc -endif - -ifeq ($(CONFIG_ARCH_PINEAPPLE), y) -include $(VIDEO_ROOT)/config/pineapple_video.conf -LINUXINCLUDE += -include $(VIDEO_ROOT)/config/pineapple_video.h \ - -I$(VIDEO_DRIVER_ABS_PATH)/platform/pineapple/inc -endif - -ifeq ($(CONFIG_ARCH_ANORAK), y) -include $(VIDEO_ROOT)/config/anorak_video.conf -LINUXINCLUDE += -include $(VIDEO_ROOT)/config/anorak_video.h \ - -I$(VIDEO_DRIVER_ABS_PATH)/platform/anorak/inc -endif - -LINUXINCLUDE += -I$(VIDEO_DRIVER_ABS_PATH)/vidc/inc \ - -I$(VIDEO_DRIVER_ABS_PATH)/platform/common/inc \ - -I$(VIDEO_DRIVER_ABS_PATH)/variant/common/inc \ - -I$(VIDEO_ROOT)/include/uapi/vidc - -USERINCLUDE += -I$(VIDEO_ROOT)/include/uapi/vidc/media \ - -I$(VIDEO_ROOT)/include/uapi/vidc - -obj-m += msm_video.o - -ifeq ($(CONFIG_MSM_VIDC_WAIPIO), y) -msm_video-objs += $(VIDEO_DRIVER_REL_PATH)/platform/waipio/src/msm_vidc_waipio.o -endif - -ifeq ($(CONFIG_MSM_VIDC_KALAMA), y) -msm_video-objs += $(VIDEO_DRIVER_REL_PATH)/platform/kalama/src/msm_vidc_kalama.o +LINUXINCLUDE += -include $(VIDEO_ROOT)/config/kalama_video.h endif ifeq ($(CONFIG_MSM_VIDC_PINEAPPLE), y) -msm_video-objs += $(VIDEO_DRIVER_REL_PATH)/platform/pineapple/src/msm_vidc_pineapple.o +LINUXINCLUDE += -I$(VIDEO_DRIVER_ABS_PATH)/platform/pineapple/inc \ + -I$(VIDEO_DRIVER_ABS_PATH)/variant/iris33/inc endif - -ifeq ($(CONFIG_MSM_VIDC_ANORAK), y) -msm_video-objs += $(VIDEO_DRIVER_REL_PATH)/platform/anorak/src/msm_vidc_anorak.o +ifeq ($(CONFIG_MSM_VIDC_KALAMA), y) +LINUXINCLUDE += -I$(VIDEO_DRIVER_ABS_PATH)/platform/kalama/inc \ + -I$(VIDEO_DRIVER_ABS_PATH)/variant/iris3/inc endif +LINUXINCLUDE += -I$(VIDEO_DRIVER_ABS_PATH)/platform/common/inc \ + -I$(VIDEO_DRIVER_ABS_PATH)/variant/common/inc \ + -I$(VIDEO_DRIVER_ABS_PATH)/vidc/inc \ + -I$(VIDEO_ROOT)/include/uapi/vidc -ifeq ($(CONFIG_MSM_VIDC_IRIS2), y) -LINUXINCLUDE += -I$(VIDEO_DRIVER_ABS_PATH)/variant/iris2/inc -msm_video-objs += $(VIDEO_DRIVER_REL_PATH)/variant/iris2/src/msm_vidc_buffer_iris2.o \ - $(VIDEO_DRIVER_REL_PATH)/variant/iris2/src/msm_vidc_power_iris2.o \ - $(VIDEO_DRIVER_REL_PATH)/variant/iris2/src/msm_vidc_iris2.o +USERINCLUDE += -I$(VIDEO_ROOT)/include/uapi/vidc/media \ + -I$(VIDEO_ROOT)/include/uapi/vidc + +obj-m += msm_video.o + +ifeq ($(CONFIG_MSM_VIDC_PINEAPPLE), y) +msm_video-objs += $(VIDEO_DRIVER_REL_PATH)/platform/pineapple/src/msm_vidc_pineapple.o \ + $(VIDEO_DRIVER_REL_PATH)/variant/iris33/src/msm_vidc_buffer_iris33.o \ + $(VIDEO_DRIVER_REL_PATH)/variant/iris33/src/msm_vidc_power_iris33.o \ + $(VIDEO_DRIVER_REL_PATH)/variant/iris33/src/msm_vidc_iris33.o endif - -ifeq ($(CONFIG_MSM_VIDC_IRIS3), y) -LINUXINCLUDE += -I$(VIDEO_DRIVER_ABS_PATH)/variant/iris3/inc -msm_video-objs += $(VIDEO_DRIVER_REL_PATH)/variant/iris3/src/msm_vidc_buffer_iris3.o \ +ifeq ($(CONFIG_MSM_VIDC_KALAMA), y) +msm_video-objs += $(VIDEO_DRIVER_REL_PATH)/platform/kalama/src/msm_vidc_kalama.o \ + $(VIDEO_DRIVER_REL_PATH)/variant/iris3/src/msm_vidc_buffer_iris3.o \ $(VIDEO_DRIVER_REL_PATH)/variant/iris3/src/msm_vidc_power_iris3.o \ $(VIDEO_DRIVER_REL_PATH)/variant/iris3/src/msm_vidc_bus_iris3.o \ $(VIDEO_DRIVER_REL_PATH)/variant/iris3/src/msm_vidc_clock_iris3.o \ $(VIDEO_DRIVER_REL_PATH)/variant/iris3/src/msm_vidc_iris3.o endif - -ifeq ($(CONFIG_MSM_VIDC_IRIS33), y) -LINUXINCLUDE += -I$(VIDEO_DRIVER_ABS_PATH)/variant/iris33/inc -msm_video-objs += $(VIDEO_DRIVER_REL_PATH)/variant/iris33/src/msm_vidc_buffer_iris33.o \ - $(VIDEO_DRIVER_REL_PATH)/variant/iris33/src/msm_vidc_power_iris33.o \ - $(VIDEO_DRIVER_REL_PATH)/variant/iris33/src/msm_vidc_iris33.o -endif - -msm_video-objs += $(VIDEO_DRIVER_REL_PATH)/vidc/src/msm_vidc_v4l2.o \ +msm_video-objs += $(VIDEO_DRIVER_REL_PATH)/platform/common/src/msm_vidc_platform.o \ + $(VIDEO_DRIVER_REL_PATH)/variant/common/src/msm_vidc_variant.o \ + $(VIDEO_DRIVER_REL_PATH)/vidc/src/msm_vidc_v4l2.o \ $(VIDEO_DRIVER_REL_PATH)/vidc/src/msm_vidc_vb2.o \ $(VIDEO_DRIVER_REL_PATH)/vidc/src/msm_vidc.o \ $(VIDEO_DRIVER_REL_PATH)/vidc/src/msm_vdec.o \ @@ -99,6 +70,4 @@ msm_video-objs += $(VIDEO_DRIVER_REL_PATH)/vidc/src/msm_vidc_v4l2.o \ $(VIDEO_DRIVER_REL_PATH)/vidc/src/venus_hfi.o \ $(VIDEO_DRIVER_REL_PATH)/vidc/src/venus_hfi_queue.o \ $(VIDEO_DRIVER_REL_PATH)/vidc/src/hfi_packet.o \ - $(VIDEO_DRIVER_REL_PATH)/vidc/src/venus_hfi_response.o \ - $(VIDEO_DRIVER_REL_PATH)/platform/common/src/msm_vidc_platform.o \ - $(VIDEO_DRIVER_REL_PATH)/variant/common/src/msm_vidc_variant.o + $(VIDEO_DRIVER_REL_PATH)/vidc/src/venus_hfi_response.o diff --git a/video/Kbuild b/video/Kbuild index 624db117d3..2999a18b2b 100644 --- a/video/Kbuild +++ b/video/Kbuild @@ -3,36 +3,35 @@ VIDEO_DRIVER_ABS_PATH := $(VIDEO_ROOT)/video/driver VIDEO_DRIVER_REL_PATH := ../video/driver -ifeq ($(CONFIG_ARCH_KALAMA), y) -include $(VIDEO_ROOT)/config/kalama_video.conf -LINUXINCLUDE += -include $(VIDEO_ROOT)/config/kalama_video.h \ - -I$(VIDEO_DRIVER_ABS_PATH)/platform/kalama/inc +ifeq ($(CONFIG_ARCH_PINEAPPLE), y) +include $(VIDEO_ROOT)/config/pineapple_video.conf +LINUXINCLUDE += -include $(VIDEO_ROOT)/config/pineapple_video.h endif -LINUXINCLUDE += -I$(VIDEO_DRIVER_ABS_PATH)/vidc/inc \ - -I$(VIDEO_DRIVER_ABS_PATH)/platform/common/inc \ - -I$(VIDEO_DRIVER_ABS_PATH)/variant/common/inc \ - -I$(VIDEO_ROOT)/include/uapi/vidc +ifeq ($(CONFIG_MSM_VIDC_PINEAPPLE), y) +LINUXINCLUDE += -I$(VIDEO_DRIVER_ABS_PATH)/platform/pineapple/inc \ + -I$(VIDEO_DRIVER_ABS_PATH)/variant/iris33/inc +endif -USERINCLUDE += -I$(VIDEO_ROOT)/include/uapi/vidc/media \ - -I$(VIDEO_ROOT)/include/uapi/vidc +LINUXINCLUDE += -I$(VIDEO_DRIVER_ABS_PATH)/platform/common/inc \ + -I$(VIDEO_DRIVER_ABS_PATH)/variant/common/inc \ + -I$(VIDEO_DRIVER_ABS_PATH)/vidc/inc \ + -I$(VIDEO_ROOT)/include/uapi/vidc + +USERINCLUDE += -I$(VIDEO_ROOT)/include/uapi/vidc/media \ + -I$(VIDEO_ROOT)/include/uapi/vidc obj-m += video.o -ifeq ($(CONFIG_MSM_VIDC_KALAMA), y) -video-objs += $(VIDEO_DRIVER_REL_PATH)/platform/kalama/src/kalama.o +ifeq ($(CONFIG_MSM_VIDC_PINEAPPLE), y) +video-objs += $(VIDEO_DRIVER_REL_PATH)/platform/pineapple/src/pineapple.o \ + $(VIDEO_DRIVER_REL_PATH)/variant/iris33/src/msm_vidc_buffer_iris33.o \ + $(VIDEO_DRIVER_REL_PATH)/variant/iris33/src/msm_vidc_power_iris33.o \ + $(VIDEO_DRIVER_REL_PATH)/variant/iris33/src/msm_vidc_iris33.o endif - -ifeq ($(CONFIG_MSM_VIDC_IRIS3), y) -LINUXINCLUDE += -I$(VIDEO_DRIVER_ABS_PATH)/variant/iris3/inc -video-objs += $(VIDEO_DRIVER_REL_PATH)/variant/iris3/src/msm_vidc_buffer_iris3.o \ - $(VIDEO_DRIVER_REL_PATH)/variant/iris3/src/msm_vidc_power_iris3.o \ - $(VIDEO_DRIVER_REL_PATH)/variant/iris3/src/msm_vidc_bus_iris3.o \ - $(VIDEO_DRIVER_REL_PATH)/variant/iris3/src/msm_vidc_clock_iris3.o \ - $(VIDEO_DRIVER_REL_PATH)/variant/iris3/src/msm_vidc_iris3.o -endif - -video-objs += $(VIDEO_DRIVER_REL_PATH)/vidc/src/msm_vidc_v4l2.o \ +video-objs += $(VIDEO_DRIVER_REL_PATH)/platform/common/src/msm_vidc_platform.o \ + $(VIDEO_DRIVER_REL_PATH)/variant/common/src/msm_vidc_variant.o \ + $(VIDEO_DRIVER_REL_PATH)/vidc/src/msm_vidc_v4l2.o \ $(VIDEO_DRIVER_REL_PATH)/vidc/src/msm_vidc_vb2.o \ $(VIDEO_DRIVER_REL_PATH)/vidc/src/msm_vidc.o \ $(VIDEO_DRIVER_REL_PATH)/vidc/src/msm_vdec.o \ @@ -51,6 +50,4 @@ video-objs += $(VIDEO_DRIVER_REL_PATH)/vidc/src/msm_vidc_v4l2.o \ $(VIDEO_DRIVER_REL_PATH)/vidc/src/venus_hfi.o \ $(VIDEO_DRIVER_REL_PATH)/vidc/src/venus_hfi_queue.o \ $(VIDEO_DRIVER_REL_PATH)/vidc/src/hfi_packet.o \ - $(VIDEO_DRIVER_REL_PATH)/vidc/src/venus_hfi_response.o \ - $(VIDEO_DRIVER_REL_PATH)/platform/common/src/msm_vidc_platform.o \ - $(VIDEO_DRIVER_REL_PATH)/variant/common/src/msm_vidc_variant.o + $(VIDEO_DRIVER_REL_PATH)/vidc/src/venus_hfi_response.o From e044c01cccaaedb68c856248e042b8332521fca8 Mon Sep 17 00:00:00 2001 From: Maheshwar Ajja Date: Tue, 21 Feb 2023 13:20:55 -0800 Subject: [PATCH 0826/1061] video-driver: resolve retry assert xo reset issue In assert xo reset failure case, count increment and usleep are skipped resulting in indefinite while loop. Correct the conditions to avoid looping indefinitely. Change-Id: I38fae272f0c7c676e1454e1fb0a8bfee860ea2f0 Signed-off-by: Maheshwar Ajja --- driver/variant/iris33/src/msm_vidc_iris33.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/driver/variant/iris33/src/msm_vidc_iris33.c b/driver/variant/iris33/src/msm_vidc_iris33.c index 616232679d..d0d616edd0 100644 --- a/driver/variant/iris33/src/msm_vidc_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_iris33.c @@ -471,13 +471,16 @@ static int __power_off_iris33_controller(struct msm_vidc_core *core) count = 0; do { rc = call_res_op(core, reset_control_acquire, core, "video_xo_reset"); - if (rc) { - d_vpr_e("%s: failed to acquire video_xo_reset control\n", __func__); + if (!rc) { + break; } else { + d_vpr_e( + "%s: failed to acquire video_xo_reset control, count %d\n", + __func__, count); count++; usleep_range(1000, 1000); } - } while (rc && count < 100); + } while (count < 100); if (count >= 100) { d_vpr_e("%s: timeout acquiring video_xo_reset\n", __func__); From 373880e521aafbafa9259c37151ea38591c3a8f0 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Thu, 16 Feb 2023 14:50:07 +0530 Subject: [PATCH 0827/1061] video: driver: add s_fmt allow checks inside state handler use state specific checks inside state_handler instead of relying global msm_vidc_allow_s_fmt function. Change-Id: I92af08e4cd5d49f763c5a2d381af86eb10a4c061 Signed-off-by: Govindaraj Rajagopal --- driver/vidc/src/msm_vidc.c | 3 --- driver/vidc/src/msm_vidc_state.c | 15 +++++++++++++++ 2 files changed, 15 insertions(+), 3 deletions(-) diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index 449ffee961..6912fc6a88 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -253,9 +253,6 @@ int msm_vidc_s_fmt(void *instance, struct v4l2_format *f) return -EINVAL; } - if (!msm_vidc_allow_s_fmt(inst, f->type)) - return -EBUSY; - if (inst->domain == MSM_VIDC_DECODER) rc = msm_vdec_s_fmt(inst, f); if (inst->domain == MSM_VIDC_ENCODER) diff --git a/driver/vidc/src/msm_vidc_state.c b/driver/vidc/src/msm_vidc_state.c index 698309848c..7ff318133d 100644 --- a/driver/vidc/src/msm_vidc_state.c +++ b/driver/vidc/src/msm_vidc_state.c @@ -648,6 +648,7 @@ static int msm_vidc_open_state(struct msm_vidc_inst *inst, { struct v4l2_format *f = (struct v4l2_format *)data; + /* allow s_fmt request in open state */ rc = msm_vidc_s_fmt(inst, f); if (rc) return rc; @@ -771,6 +772,13 @@ static int msm_vidc_input_streaming_state(struct msm_vidc_inst *inst, { struct v4l2_format *f = (struct v4l2_format *)data; + /* disallow */ + if (f->type == INPUT_MPLANE || f->type == INPUT_META_PLANE) { + i_vpr_e(inst, "%s: (%s) not allowed for (%s) port\n", + __func__, event_name(event), v4l2_type_name(f->type)); + return -EBUSY; + } + rc = msm_vidc_s_fmt(inst, f); if (rc) return rc; @@ -921,6 +929,13 @@ static int msm_vidc_output_streaming_state(struct msm_vidc_inst *inst, { struct v4l2_format *f = (struct v4l2_format *)data; + /* disallow */ + if (f->type == OUTPUT_MPLANE || f->type == OUTPUT_META_PLANE) { + i_vpr_e(inst, "%s: (%s) not allowed for (%s) port\n", + __func__, event_name(event), v4l2_type_name(f->type)); + return -EBUSY; + } + rc = msm_vidc_s_fmt(inst, f); if (rc) return rc; From 3ba2cb9ed1c917669c9c4fe77ea4d57888dc1323 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Thu, 16 Feb 2023 15:02:50 +0530 Subject: [PATCH 0828/1061] video: driver: add reqbuf allow checks inside state handler use state specific checks inside state_handler instead of relying global msm_vidc_allow_reqbufs function. Change-Id: Iaf7f23e4e2ef9b714e3d4c2900c2753d74150fd1 Signed-off-by: Govindaraj Rajagopal --- driver/vidc/inc/msm_vidc_driver.h | 1 - driver/vidc/src/msm_vidc.c | 5 ----- driver/vidc/src/msm_vidc_driver.c | 32 ------------------------------- driver/vidc/src/msm_vidc_state.c | 15 +++++++++++++++ 4 files changed, 15 insertions(+), 38 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 931a2bcc2f..827cb803e7 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -492,7 +492,6 @@ bool msm_vidc_allow_metadata_subscription(struct msm_vidc_inst *inst, bool msm_vidc_allow_property(struct msm_vidc_inst *inst, u32 hfi_id); int msm_vidc_update_property_cap(struct msm_vidc_inst *inst, u32 hfi_id, bool allow); -bool msm_vidc_allow_reqbufs(struct msm_vidc_inst *inst, u32 type); enum msm_vidc_allow msm_vidc_allow_stop(struct msm_vidc_inst *inst); bool msm_vidc_allow_start(struct msm_vidc_inst *inst); bool msm_vidc_allow_streamon(struct msm_vidc_inst *inst, u32 type); diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index 6912fc6a88..4c3b21469c 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -397,11 +397,6 @@ int msm_vidc_reqbufs(void *instance, struct v4l2_requestbuffers *b) return -EINVAL; } - if (!msm_vidc_allow_reqbufs(inst, b->type)) { - rc = -EBUSY; - goto exit; - } - port = v4l2_type_to_driver_port(inst, b->type, __func__); if (port < 0) { rc = -EINVAL; diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 73e461436a..5046bcdc64 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -1115,38 +1115,6 @@ int msm_vidc_update_property_cap(struct msm_vidc_inst *inst, u32 hfi_id, return rc; } -bool msm_vidc_allow_reqbufs(struct msm_vidc_inst *inst, u32 type) -{ - bool allow = false; - - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return false; - } - if (is_state(inst, MSM_VIDC_OPEN)) { - allow = true; - goto exit; - } - if (type == OUTPUT_MPLANE || type == OUTPUT_META_PLANE) { - if (is_state(inst, MSM_VIDC_INPUT_STREAMING)) { - allow = true; - goto exit; - } - } - if (type == INPUT_MPLANE || type == INPUT_META_PLANE) { - if (is_state(inst, MSM_VIDC_OUTPUT_STREAMING)) { - allow = true; - goto exit; - } - } - -exit: - if (!allow) - i_vpr_e(inst, "%s: type %d not allowed in state %s\n", - __func__, type, state_name(inst->state)); - return allow; -} - enum msm_vidc_allow msm_vidc_allow_stop(struct msm_vidc_inst *inst) { enum msm_vidc_allow allow = MSM_VIDC_DISALLOW; diff --git a/driver/vidc/src/msm_vidc_state.c b/driver/vidc/src/msm_vidc_state.c index 7ff318133d..2f084e7dd9 100644 --- a/driver/vidc/src/msm_vidc_state.c +++ b/driver/vidc/src/msm_vidc_state.c @@ -668,6 +668,7 @@ static int msm_vidc_open_state(struct msm_vidc_inst *inst, { struct v4l2_requestbuffers *b = (struct v4l2_requestbuffers *)data; + /* allow reqbufs request in open state */ rc = msm_vidc_reqbufs(inst, b); if (rc) return rc; @@ -813,6 +814,13 @@ static int msm_vidc_input_streaming_state(struct msm_vidc_inst *inst, { struct v4l2_requestbuffers *b = (struct v4l2_requestbuffers *)data; + /* disallow */ + if (b->type == INPUT_MPLANE || b->type == INPUT_META_PLANE) { + i_vpr_e(inst, "%s: (%s) not allowed for (%s) port\n", + __func__, event_name(event), v4l2_type_name(b->type)); + return -EBUSY; + } + rc = msm_vidc_reqbufs(inst, b); if (rc) return rc; @@ -970,6 +978,13 @@ static int msm_vidc_output_streaming_state(struct msm_vidc_inst *inst, { struct v4l2_requestbuffers *b = (struct v4l2_requestbuffers *)data; + /* disallow */ + if (b->type == OUTPUT_MPLANE || b->type == OUTPUT_META_PLANE) { + i_vpr_e(inst, "%s: (%s) not allowed for (%s) port\n", + __func__, event_name(event), v4l2_type_name(b->type)); + return -EBUSY; + } + rc = msm_vidc_reqbufs(inst, b); if (rc) return rc; From 4afdecc4fd536ed2fb95ff6eee1e66d7390dbf5c Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Thu, 16 Feb 2023 15:10:25 +0530 Subject: [PATCH 0829/1061] video: driver: add streamon allow checks inside state handler use state specific checks inside state_handler instead of relying global msm_vidc_allow_streamon function. Change-Id: I67948831612ebb33cdd12a2e9f8561b6095e9433 Signed-off-by: Govindaraj Rajagopal --- driver/vidc/inc/msm_vidc_driver.h | 1 - driver/vidc/src/msm_vidc_driver.c | 21 --------------------- driver/vidc/src/msm_vidc_state.c | 15 +++++++++++++++ driver/vidc/src/msm_vidc_vb2.c | 3 --- 4 files changed, 15 insertions(+), 25 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 827cb803e7..991b76e6d9 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -494,7 +494,6 @@ int msm_vidc_update_property_cap(struct msm_vidc_inst *inst, u32 hfi_id, bool allow); enum msm_vidc_allow msm_vidc_allow_stop(struct msm_vidc_inst *inst); bool msm_vidc_allow_start(struct msm_vidc_inst *inst); -bool msm_vidc_allow_streamon(struct msm_vidc_inst *inst, u32 type); enum msm_vidc_allow msm_vidc_allow_input_psc(struct msm_vidc_inst *inst); bool msm_vidc_allow_drain_last_flag(struct msm_vidc_inst *inst); bool msm_vidc_allow_psc_last_flag(struct msm_vidc_inst *inst); diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 5046bcdc64..a20595713e 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -1167,27 +1167,6 @@ bool msm_vidc_allow_start(struct msm_vidc_inst *inst) return allow; } -bool msm_vidc_allow_streamon(struct msm_vidc_inst *inst, u32 type) -{ - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return false; - } - if (type == INPUT_MPLANE || type == INPUT_META_PLANE) { - if (is_state(inst, MSM_VIDC_OPEN) || - is_state(inst, MSM_VIDC_OUTPUT_STREAMING)) - return true; - } else if (type == OUTPUT_MPLANE || type == OUTPUT_META_PLANE) { - if (is_state(inst, MSM_VIDC_OPEN) || - is_state(inst, MSM_VIDC_INPUT_STREAMING)) - return true; - } - - i_vpr_e(inst, "%s: type %d not allowed in state %s\n", - __func__, type, state_name(inst->state)); - return false; -} - enum msm_vidc_allow msm_vidc_allow_input_psc(struct msm_vidc_inst *inst) { enum msm_vidc_allow allow = MSM_VIDC_ALLOW; diff --git a/driver/vidc/src/msm_vidc_state.c b/driver/vidc/src/msm_vidc_state.c index 2f084e7dd9..097f73358b 100644 --- a/driver/vidc/src/msm_vidc_state.c +++ b/driver/vidc/src/msm_vidc_state.c @@ -678,6 +678,7 @@ static int msm_vidc_open_state(struct msm_vidc_inst *inst, { struct vb2_queue *q = (struct vb2_queue *)data; + /* allow streamon request in open state */ rc = msm_vidc_start_streaming(inst, q); if (rc) return rc; @@ -830,6 +831,13 @@ static int msm_vidc_input_streaming_state(struct msm_vidc_inst *inst, { struct vb2_queue *q = (struct vb2_queue *)data; + /* disallow */ + if (q->type == INPUT_MPLANE || q->type == INPUT_META_PLANE) { + i_vpr_e(inst, "%s: (%s) not allowed for (%s) type\n", + __func__, event_name(event), v4l2_type_name(q->type)); + return -EBUSY; + } + rc = msm_vidc_start_streaming(inst, q); if (rc) return rc; @@ -994,6 +1002,13 @@ static int msm_vidc_output_streaming_state(struct msm_vidc_inst *inst, { struct vb2_queue *q = (struct vb2_queue *)data; + /* disallow */ + if (q->type == OUTPUT_MPLANE || q->type == OUTPUT_META_PLANE) { + i_vpr_e(inst, "%s: (%s) not allowed for (%s) type\n", + __func__, event_name(event), v4l2_type_name(q->type)); + return -EBUSY; + } + rc = msm_vidc_start_streaming(inst, q); if (rc) return rc; diff --git a/driver/vidc/src/msm_vidc_vb2.c b/driver/vidc/src/msm_vidc_vb2.c index 26ce6916a0..fb853ac11c 100644 --- a/driver/vidc/src/msm_vidc_vb2.c +++ b/driver/vidc/src/msm_vidc_vb2.c @@ -415,9 +415,6 @@ int msm_vidc_start_streaming(struct msm_vidc_inst *inst, struct vb2_queue *q) return -EINVAL; } - if (!msm_vidc_allow_streamon(inst, q->type)) - return -EBUSY; - if (q->type == INPUT_META_PLANE || q->type == OUTPUT_META_PLANE) { i_vpr_h(inst, "%s: nothing to start on %s\n", __func__, v4l2_type_name(q->type)); From a6e521d62991c137a3714b2d249175d081c92235 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Thu, 16 Feb 2023 15:34:12 +0530 Subject: [PATCH 0830/1061] video: driver: add start cmd allow checks inside state handler use state specific checks inside state_handler instead of relying global msm_vidc_allow_start function. Change-Id: I04182ee3b63fa9044acf4f40adc47ea97eaa7538 Signed-off-by: Govindaraj Rajagopal --- driver/vidc/inc/msm_vidc_driver.h | 1 - driver/vidc/inc/msm_vidc_state.h | 2 ++ driver/vidc/src/msm_vdec.c | 3 --- driver/vidc/src/msm_venc.c | 3 +-- driver/vidc/src/msm_vidc_driver.c | 25 ----------------- driver/vidc/src/msm_vidc_state.c | 45 ++++++++++++++++++++++++++++--- 6 files changed, 44 insertions(+), 35 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 991b76e6d9..a96f863e99 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -493,7 +493,6 @@ bool msm_vidc_allow_property(struct msm_vidc_inst *inst, u32 hfi_id); int msm_vidc_update_property_cap(struct msm_vidc_inst *inst, u32 hfi_id, bool allow); enum msm_vidc_allow msm_vidc_allow_stop(struct msm_vidc_inst *inst); -bool msm_vidc_allow_start(struct msm_vidc_inst *inst); enum msm_vidc_allow msm_vidc_allow_input_psc(struct msm_vidc_inst *inst); bool msm_vidc_allow_drain_last_flag(struct msm_vidc_inst *inst); bool msm_vidc_allow_psc_last_flag(struct msm_vidc_inst *inst); diff --git a/driver/vidc/inc/msm_vidc_state.h b/driver/vidc/inc/msm_vidc_state.h index d995a044da..6dec161d3a 100644 --- a/driver/vidc/inc/msm_vidc_state.h +++ b/driver/vidc/inc/msm_vidc_state.h @@ -91,6 +91,8 @@ const char *core_state_name(enum msm_vidc_core_state state); const char *core_sub_state_name(enum msm_vidc_core_sub_state sub_state); /* inst statemachine functions */ +bool is_drc_pending(struct msm_vidc_inst *inst); +bool is_drain_pending(struct msm_vidc_inst *inst); int msm_vidc_update_state(struct msm_vidc_inst *inst, enum msm_vidc_state request_state, const char *func); int msm_vidc_change_state(struct msm_vidc_inst *inst, diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 50396430c1..5d53b79db9 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -2132,9 +2132,6 @@ int msm_vdec_start_cmd(struct msm_vidc_inst *inst) return -EINVAL; } - if (!msm_vidc_allow_start(inst)) - return -EBUSY; - /* tune power features */ inst->decode_batch.enable = msm_vidc_allow_decode_batch(inst); msm_vidc_allow_dcvs(inst); diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index 943004f647..f0c36956e6 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -935,8 +935,7 @@ int msm_venc_start_cmd(struct msm_vidc_inst *inst) int rc = 0; i_vpr_h(inst, "received cmd: resume\n"); - if (!msm_vidc_allow_start(inst)) - return -EBUSY; + vb2_clear_last_buffer_dequeued(inst->bufq[OUTPUT_META_PORT].vb2q); vb2_clear_last_buffer_dequeued(inst->bufq[OUTPUT_PORT].vb2q); diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index a20595713e..d82f80fcf3 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -1142,31 +1142,6 @@ enum msm_vidc_allow msm_vidc_allow_stop(struct msm_vidc_inst *inst) return allow; } -bool msm_vidc_allow_start(struct msm_vidc_inst *inst) -{ - bool allow = false; - - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return allow; - } - - /* client would call start (resume) to complete DRC/drain sequence */ - if (inst->state == MSM_VIDC_INPUT_STREAMING || - inst->state == MSM_VIDC_OUTPUT_STREAMING || - inst->state == MSM_VIDC_STREAMING) { - if ((is_sub_state(inst, MSM_VIDC_DRC) && - is_sub_state(inst, MSM_VIDC_DRC_LAST_BUFFER)) || - (is_sub_state(inst, MSM_VIDC_DRAIN) && - is_sub_state(inst, MSM_VIDC_DRAIN_LAST_BUFFER))) - allow = true; - } - if (!allow) - i_vpr_e(inst, "%s: not allowed in state %s, sub state %s\n", - __func__, state_name(inst->state), inst->sub_state_name); - return allow; -} - enum msm_vidc_allow msm_vidc_allow_input_psc(struct msm_vidc_inst *inst) { enum msm_vidc_allow allow = MSM_VIDC_ALLOW; diff --git a/driver/vidc/src/msm_vidc_state.c b/driver/vidc/src/msm_vidc_state.c index 097f73358b..1e6fb6d2a5 100644 --- a/driver/vidc/src/msm_vidc_state.c +++ b/driver/vidc/src/msm_vidc_state.c @@ -24,6 +24,18 @@ bool is_core_state(struct msm_vidc_core *core, enum msm_vidc_core_state state) return core->state == state; } +bool is_drc_pending(struct msm_vidc_inst *inst) +{ + return is_sub_state(inst, MSM_VIDC_DRC) && + is_sub_state(inst, MSM_VIDC_DRC_LAST_BUFFER); +} + +bool is_drain_pending(struct msm_vidc_inst *inst) +{ + return is_sub_state(inst, MSM_VIDC_DRAIN) && + is_sub_state(inst, MSM_VIDC_DRAIN_LAST_BUFFER); +} + static const char * const core_state_name_arr[] = FOREACH_CORE_STATE(GENERATE_STRING); @@ -695,10 +707,11 @@ static int msm_vidc_open_state(struct msm_vidc_inst *inst, } case MSM_VIDC_CMD_START: { - rc = msm_vidc_start_cmd(inst); - if (rc) - return rc; - break; + /* disallow start cmd request in open state */ + i_vpr_e(inst, "%s: (%s) not allowed, sub_state (%s)\n", + __func__, event_name(event), inst->sub_state_name); + + return -EBUSY; } case MSM_VIDC_CMD_STOP: { @@ -874,6 +887,14 @@ static int msm_vidc_input_streaming_state(struct msm_vidc_inst *inst, } case MSM_VIDC_CMD_START: { + /* disallow if START called for non DRC/drain cases */ + if (!is_drc_pending(inst) && !is_drain_pending(inst)) { + i_vpr_e(inst, "%s: (%s) not allowed, sub_state (%s)\n", + __func__, event_name(event), inst->sub_state_name); + return -EBUSY; + } + + /* client would call start(resume) to complete DRC/drain sequence */ rc = msm_vidc_start_cmd(inst); if (rc) return rc; @@ -1045,6 +1066,14 @@ static int msm_vidc_output_streaming_state(struct msm_vidc_inst *inst, } case MSM_VIDC_CMD_START: { + /* disallow if START called for non DRC/drain cases */ + if (!is_drc_pending(inst) && !is_drain_pending(inst)) { + i_vpr_e(inst, "%s: (%s) not allowed, sub_state (%s)\n", + __func__, event_name(event), inst->sub_state_name); + return -EBUSY; + } + + /* client would call start(resume) to complete DRC/drain sequence */ rc = msm_vidc_start_cmd(inst); if (rc) return rc; @@ -1151,6 +1180,14 @@ static int msm_vidc_streaming_state(struct msm_vidc_inst *inst, } case MSM_VIDC_CMD_START: { + /* disallow if START called for non DRC/drain cases */ + if (!is_drc_pending(inst) && !is_drain_pending(inst)) { + i_vpr_e(inst, "%s: (%s) not allowed, sub_state (%s)\n", + __func__, event_name(event), inst->sub_state_name); + return -EBUSY; + } + + /* client would call start(resume) to complete DRC/drain sequence */ rc = msm_vidc_start_cmd(inst); if (rc) return rc; From ab6770c11f3e66cc0c29a1dd0ad9e14251976c78 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Thu, 16 Feb 2023 16:00:59 +0530 Subject: [PATCH 0831/1061] video: driver: add stop cmd allow checks inside state handler use state specific checks inside state_handler instead of relying global msm_vidc_allow_stop function. Change-Id: I83d81aa0f840412a4c61f15673a6246f0f84be7f Signed-off-by: Govindaraj Rajagopal --- driver/vidc/inc/msm_vidc_driver.h | 1 - driver/vidc/src/msm_vdec.c | 8 -------- driver/vidc/src/msm_venc.c | 8 -------- driver/vidc/src/msm_vidc_driver.c | 27 --------------------------- driver/vidc/src/msm_vidc_state.c | 28 +++++++++++++++++++++------- 5 files changed, 21 insertions(+), 51 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index a96f863e99..61a7575e40 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -492,7 +492,6 @@ bool msm_vidc_allow_metadata_subscription(struct msm_vidc_inst *inst, bool msm_vidc_allow_property(struct msm_vidc_inst *inst, u32 hfi_id); int msm_vidc_update_property_cap(struct msm_vidc_inst *inst, u32 hfi_id, bool allow); -enum msm_vidc_allow msm_vidc_allow_stop(struct msm_vidc_inst *inst); enum msm_vidc_allow msm_vidc_allow_input_psc(struct msm_vidc_inst *inst); bool msm_vidc_allow_drain_last_flag(struct msm_vidc_inst *inst); bool msm_vidc_allow_psc_last_flag(struct msm_vidc_inst *inst); diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 5d53b79db9..6e8cf27907 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -2091,17 +2091,9 @@ static int msm_vdec_alloc_and_queue_additional_dpb_buffers(struct msm_vidc_inst int msm_vdec_stop_cmd(struct msm_vidc_inst *inst) { - enum msm_vidc_allow allow = MSM_VIDC_DISALLOW; int rc = 0; i_vpr_h(inst, "received cmd: drain\n"); - allow = msm_vidc_allow_stop(inst); - if (allow == MSM_VIDC_DISALLOW) - return -EBUSY; - else if (allow == MSM_VIDC_IGNORE) - return 0; - else if (allow != MSM_VIDC_ALLOW) - return -EINVAL; rc = msm_vidc_process_drain(inst); if (rc) return rc; diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index f0c36956e6..c9ccf2a100 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -912,17 +912,9 @@ int msm_venc_qbuf(struct msm_vidc_inst *inst, struct vb2_buffer *vb2) int msm_venc_stop_cmd(struct msm_vidc_inst *inst) { - enum msm_vidc_allow allow = MSM_VIDC_DISALLOW; int rc = 0; i_vpr_h(inst, "received cmd: drain\n"); - allow = msm_vidc_allow_stop(inst); - if (allow == MSM_VIDC_DISALLOW) - return -EBUSY; - else if (allow == MSM_VIDC_IGNORE) - return 0; - else if (allow != MSM_VIDC_ALLOW) - return -EINVAL; rc = msm_vidc_process_drain(inst); if (rc) return rc; diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index d82f80fcf3..a8c83d40cd 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -1115,33 +1115,6 @@ int msm_vidc_update_property_cap(struct msm_vidc_inst *inst, u32 hfi_id, return rc; } -enum msm_vidc_allow msm_vidc_allow_stop(struct msm_vidc_inst *inst) -{ - enum msm_vidc_allow allow = MSM_VIDC_DISALLOW; - - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return allow; - } - - /* allow stop (drain) if input port is streaming */ - if (is_state(inst, MSM_VIDC_INPUT_STREAMING) || - is_state(inst, MSM_VIDC_STREAMING)) { - /* do not allow back to back drain */ - if (!(is_sub_state(inst, MSM_VIDC_DRAIN))) - allow = MSM_VIDC_ALLOW; - } else if (is_state(inst, MSM_VIDC_OPEN)) { - allow = MSM_VIDC_IGNORE; - i_vpr_e(inst, "%s: ignored in state %s, sub state %s\n", - __func__, state_name(inst->state), inst->sub_state_name); - } else { - i_vpr_e(inst, "%s: not allowed in state %s, sub state %s\n", - __func__, state_name(inst->state), inst->sub_state_name); - } - - return allow; -} - enum msm_vidc_allow msm_vidc_allow_input_psc(struct msm_vidc_inst *inst) { enum msm_vidc_allow allow = MSM_VIDC_ALLOW; diff --git a/driver/vidc/src/msm_vidc_state.c b/driver/vidc/src/msm_vidc_state.c index 1e6fb6d2a5..ec9d30bcd2 100644 --- a/driver/vidc/src/msm_vidc_state.c +++ b/driver/vidc/src/msm_vidc_state.c @@ -715,9 +715,9 @@ static int msm_vidc_open_state(struct msm_vidc_inst *inst, } case MSM_VIDC_CMD_STOP: { - rc = msm_vidc_stop_cmd(inst); - if (rc) - return rc; + /* ignore stop cmd request in open state */ + i_vpr_h(inst, "%s: (%s) ignored, sub_state (%s)\n", + __func__, event_name(event), inst->sub_state_name); break; } case MSM_VIDC_BUF_QUEUE: @@ -902,6 +902,13 @@ static int msm_vidc_input_streaming_state(struct msm_vidc_inst *inst, } case MSM_VIDC_CMD_STOP: { + /* back to back drain not allowed */ + if (is_sub_state(inst, MSM_VIDC_DRAIN)) { + i_vpr_e(inst, "%s: drain (%s) not allowed, sub_state (%s)\n\n", + __func__, event_name(event), inst->sub_state_name); + return -EBUSY; + } + rc = msm_vidc_stop_cmd(inst); if (rc) return rc; @@ -1081,10 +1088,10 @@ static int msm_vidc_output_streaming_state(struct msm_vidc_inst *inst, } case MSM_VIDC_CMD_STOP: { - rc = msm_vidc_stop_cmd(inst); - if (rc) - return rc; - break; + /* drain not allowed as input is not streaming */ + i_vpr_e(inst, "%s: drain (%s) not allowed, sub state %s\n", + __func__, event_name(event), inst->sub_state_name); + return -EBUSY; } default: { i_vpr_e(inst, "%s: unexpected event %s\n", __func__, event_name(event)); @@ -1195,6 +1202,13 @@ static int msm_vidc_streaming_state(struct msm_vidc_inst *inst, } case MSM_VIDC_CMD_STOP: { + /* back to back drain not allowed */ + if (is_sub_state(inst, MSM_VIDC_DRAIN)) { + i_vpr_e(inst, "%s: drain (%s) not allowed, sub_state (%s)\n\n", + __func__, event_name(event), inst->sub_state_name); + return -EBUSY; + } + rc = msm_vidc_stop_cmd(inst); if (rc) return rc; From ed46ad9aecbe20accdb3eb116424e15285d69d65 Mon Sep 17 00:00:00 2001 From: Chinmay Sawarkar Date: Fri, 17 Feb 2023 16:01:16 -0800 Subject: [PATCH 0832/1061] video: driver: Add new hfi buffer flags New hfi buffer flags to send memory region information to firmware. Change-Id: I3a320622d0ed01a5e583dbeceb2648a57f618a66 Signed-off-by: Chinmay Sawarkar --- driver/vidc/inc/hfi_command.h | 10 +++++----- driver/vidc/inc/msm_vidc_internal.h | 1 + driver/vidc/src/hfi_packet.c | 22 ++++++++++++++++++++++ driver/vidc/src/msm_vidc_driver.c | 2 ++ 4 files changed, 30 insertions(+), 5 deletions(-) diff --git a/driver/vidc/inc/hfi_command.h b/driver/vidc/inc/hfi_command.h index 74b87d6af0..7b98f06382 100644 --- a/driver/vidc/inc/hfi_command.h +++ b/driver/vidc/inc/hfi_command.h @@ -51,11 +51,6 @@ enum hfi_packet_host_flags { HFI_HOST_FLAGS_RESPONSE_REQUIRED = 0x00000002, HFI_HOST_FLAGS_NON_DISCARDABLE = 0x00000004, HFI_HOST_FLAGS_GET_PROPERTY = 0x00000008, - HFI_HOST_FLAGS_CB_NON_SECURE = 0x00000010, - HFI_HOST_FLAGS_CB_SECURE_PIXEL = 0x00000020, - HFI_HOST_FLAGS_CB_SECURE_BITSTREAM = 0x00000040, - HFI_HOST_FLAGS_CB_SECURE_NON_PIXEL = 0x00000080, - HFI_HOST_FLAGS_CB_NON_SECURE_PIXEL = 0x00000100, }; enum hfi_packet_firmware_flags { @@ -110,6 +105,11 @@ enum hfi_buffer_host_flags { HFI_BUF_HOST_FLAG_RELEASE = 0x00000001, HFI_BUF_HOST_FLAG_READONLY = 0x00000010, HFI_BUF_HOST_FLAG_CODEC_CONFIG = 0x00000100, + HFI_BUF_HOST_FLAGS_CB_NON_SECURE = 0x00000200, + HFI_BUF_HOST_FLAGS_CB_SECURE_PIXEL = 0x00000400, + HFI_BUF_HOST_FLAGS_CB_SECURE_BITSTREAM = 0x00000800, + HFI_BUF_HOST_FLAGS_CB_SECURE_NON_PIXEL = 0x00001000, + HFI_BUF_HOST_FLAGS_CB_NON_SECURE_PIXEL = 0x00002000, }; enum hfi_buffer_firmware_flags { diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 2fc5bfc2fa..7351563d98 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -891,6 +891,7 @@ struct msm_vidc_buffer { struct list_head list; struct msm_vidc_inst *inst; enum msm_vidc_buffer_type type; + enum msm_vidc_buffer_region region; u32 index; int fd; u32 buffer_size; diff --git a/driver/vidc/src/hfi_packet.c b/driver/vidc/src/hfi_packet.c index f1ea0a4a46..ae85d60506 100644 --- a/driver/vidc/src/hfi_packet.c +++ b/driver/vidc/src/hfi_packet.c @@ -288,6 +288,27 @@ u32 get_hfi_colorformat(struct msm_vidc_inst *inst, return hfi_colorformat; } +static u32 get_hfi_region_flag(enum msm_vidc_buffer_region region) +{ + + switch (region) { + case MSM_VIDC_NON_SECURE: + return HFI_BUF_HOST_FLAGS_CB_NON_SECURE; + case MSM_VIDC_NON_SECURE_PIXEL: + return HFI_BUF_HOST_FLAGS_CB_NON_SECURE_PIXEL; + case MSM_VIDC_SECURE_PIXEL: + return HFI_BUF_HOST_FLAGS_CB_SECURE_PIXEL; + case MSM_VIDC_SECURE_NONPIXEL: + return HFI_BUF_HOST_FLAGS_CB_SECURE_NON_PIXEL; + case MSM_VIDC_SECURE_BITSTREAM: + return HFI_BUF_HOST_FLAGS_CB_SECURE_BITSTREAM; + case MSM_VIDC_REGION_MAX: + case MSM_VIDC_REGION_NONE: + default: + return HFI_BUF_HOST_FLAG_NONE; + } +} + int get_hfi_buffer(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buffer, struct hfi_buffer *buf) { @@ -310,6 +331,7 @@ int get_hfi_buffer(struct msm_vidc_inst *inst, buf->flags |= HFI_BUF_HOST_FLAG_RELEASE; if (buffer->flags & MSM_VIDC_BUF_FLAG_CODECCONFIG) buf->flags |= HFI_BUF_HOST_FLAG_CODEC_CONFIG; + buf->flags |= get_hfi_region_flag(buffer->region); buf->timestamp = buffer->timestamp; return 0; diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index a2745b1fb8..6da2c009a4 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -2524,6 +2524,7 @@ int msm_vidc_allocate_buffers(struct msm_vidc_inst *inst, list_add_tail(&buf->list, &buffers->list); buf->type = buf_type; buf->index = idx; + buf->region = call_mem_op(core, buffer_region, inst, buf_type); } i_vpr_h(inst, "%s: allocated %d buffers for type %s\n", __func__, num_buffers, buf_name(buf_type)); @@ -3295,6 +3296,7 @@ int msm_vidc_create_internal_buffer(struct msm_vidc_inst *inst, buffer->dmabuf = mem->dmabuf; buffer->device_addr = mem->device_addr; + buffer->region = mem->region; i_vpr_h(inst, "%s: create: type: %8s, size: %9u, device_addr %#llx\n", __func__, buf_name(buffer_type), buffers->size, buffer->device_addr); From e28d357256dd17cf63b7f98b259e0d582d9c93e7 Mon Sep 17 00:00:00 2001 From: Ashish Patil Date: Fri, 17 Feb 2023 14:49:19 -0800 Subject: [PATCH 0833/1061] video: driver: lanai power calculations New bandwidth and frequency calculation functions for lanai. Change-Id: I0ec4a74bc24598628fe94a6ebbe9df5e3cb71a9c Signed-off-by: Ashish Patil --- .../platform/common/inc/perf_static_model.h | 1 + .../pineapple/inc/pineapple_technology.h | 250 +++++ .../iris33/inc/msm_vidc_power_iris33.h | 2 + .../variant/iris33/src/msm_vidc_bus_iris33.c | 921 ++++++++++++++++++ .../iris33/src/msm_vidc_clock_iris33.c | 548 +++++++++++ .../iris33/src/msm_vidc_power_iris33.c | 377 ++++++- msm_video/Kbuild | 2 + video/Kbuild | 2 + 8 files changed, 2099 insertions(+), 4 deletions(-) create mode 100644 driver/platform/pineapple/inc/pineapple_technology.h create mode 100644 driver/variant/iris33/src/msm_vidc_bus_iris33.c create mode 100644 driver/variant/iris33/src/msm_vidc_clock_iris33.c diff --git a/driver/platform/common/inc/perf_static_model.h b/driver/platform/common/inc/perf_static_model.h index cc1f78a492..d6b1a34311 100644 --- a/driver/platform/common/inc/perf_static_model.h +++ b/driver/platform/common/inc/perf_static_model.h @@ -69,6 +69,7 @@ enum chipset_generation { MSM_MAKENA, MSM_KALAMA, MSM_QOGNITION, + MSM_PINEAPPLE, MSM_MAX, }; diff --git a/driver/platform/pineapple/inc/pineapple_technology.h b/driver/platform/pineapple/inc/pineapple_technology.h new file mode 100644 index 0000000000..57dbdde004 --- /dev/null +++ b/driver/platform/pineapple/inc/pineapple_technology.h @@ -0,0 +1,250 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include "perf_static_model.h" + +#define ENABLE_FINEBITRATE_SUBUHD60 0 + +/* + * Chipset Generation Technology: SW/FW overhead profiling + * need update with new numbers + */ +static u32 frequency_table_pineapple[2][6] = +{ + /* //make lowsvs_D1 as invalid; */ + {533, 480, 435, 380, 300, 196}, + {840, 720, 652, 570, 450, 294}, +}; + + /* + * TODO Move to pineapple.c + * TODO Replace hardcoded values with + * ENCODER_VPP_TARGET_CLK_PER_MB_PINEAPPLE in CPP file. + */ + +/* Tensilica cycles profiled by FW team in lanai device Feb 2022 */ +#define DECODER_VPP_FW_OVERHEAD_PINEAPPLE_AV1D ((80000*3)/2)); +#define DECODER_VPP_FW_OVERHEAD_PINEAPPLE_NONAV1D ((60000*3)/2); + + /* Tensilica cycles */ +#define DECODER_VPP_FW_OVERHEAD_PINEAPPLE (0) + +/* Tensilica cycles; this is measured in Lahaina 1stage with FW profiling */ +#define DECODER_VPPVSP1STAGE_FW_OVERHEAD_PINEAPPLE (93000) + +#define DECODER_VSP_FW_OVERHEAD_PINEAPPLE \ + DECODER_VPPVSP1STAGE_FW_OVERHEAD_PINEAPPLE - DECODER_VPP_FW_OVERHEAD_PINEAPPLE + +/* Tensilica cycles; encoder has ARP register */ +#define ENCODER_VPP_FW_OVERHEAD_PINEAPPLE (69000*3/2) + +#define ENCODER_VPPVSP1STAGE_FW_OVERHEAD_PINEAPPLE \ + ENCODER_VPP_FW_OVERHEAD_PINEAPPLE + DECODER_VSP_FW_OVERHEAD_PINEAPPLE + +#define DECODER_SW_OVERHEAD_PINEAPPLE (489583) +#define ENCODER_SW_OVERHEAD_PINEAPPLE (489583) + +/* Video IP Core Technology: pipefloor and pipe penlaty */ +static u32 encoder_vpp_target_clk_per_mb_pineapple[2] = {320, 675}; +static u32 decoder_vpp_target_clk_per_mb_pineapple = 200; + +/* + * These pipe penalty numbers only applies to 4 pipe + * For 2pipe and 1pipe, these numbers need recalibrate + */ +static u32 pipe_penalty_pineapple[3][3] = +{ + /* NON AV1 */ + {1059, 1059, 1059}, + /* AV1 RECOMMENDED TILE 1080P_V2XH1, UHD_V2X2, 8KUHD_V8X2 */ + {1410, 1248, 1226}, + /* AV1 YOUTUBE/NETFLIX TILE 1080P_V4XH2_V4X1, UHD_V8X4_V8X1, 8KUHD_V8X8_V8X1 */ + {2039, 2464, 1191}, +}; + +/* + * Video IP Core Technology: bitrate constraint + * HW limit bitrate table (these values are measured end to end fw/sw impacts are also considered) + * TODO Can we convert to Cycles/MB? This will remove DIVISION. + */ +static u32 bitrate_table_pineapple_2stage_fp[5][10] = +{ + /* h264 cavlc */ + {0, 220, 220, 220, 220, 220, 220, 220, 220, 220}, + /* h264 cabac */ + {0, 140, 150, 160, 175, 190, 190, 190, 190, 190}, + /* h265 */ + {90, 140, 160, 180, 190, 200, 200, 200, 200, 200}, + /* vp9 */ + {90, 90, 90, 90, 90, 90, 90, 90, 90, 90}, + /* av1 */ + {130, 130, 120, 120, 120, 120, 120, 120, 120, 120}, +}; + +/* HW limit bitrate table (these values are measured end to end fw/sw impacts are also considered) */ +static u32 bitrate_table_pineapple_1stage_fp[5][10] = /* 1-stage assume IPPP */ +{ + /* h264 cavlc */ + {0, 220, 220, 220, 220, 220, 220, 220, 220, 220}, + /* h264 cabac */ + {0, 110, 150, 150, 150, 150, 150, 150, 150, 150}, + /* h265 */ + {0, 140, 150, 150, 150, 150, 150, 150, 150, 150}, + /* vp9 */ + {0, 70, 70, 70, 70, 70, 70, 70, 70, 70}, + /* av1 */ + {0, 100, 100, 100, 100, 100, 100, 100, 100, 100}, +}; + +/* rec pwc and power bitrate table */ +static u32 bitrate_table_pineapple_rec_fp[5][10] = +{ + /* rec. worst bitrate based on bitrate table */ +#if ENABLE_FINEBITRATE_SUBUHD60 + /* h264 cavlc */ + {0, 168, 150, 120, 100, 90, 50, 32, 20, 14}, + /* h264 cabac 8bit */ + {0, 134, 109, 84, 67, 56, 35, 23, 14, 10}, + /* h265 10bit assumption */ + {70, 140, 116, 92, 74, 62, 39, 25, 16, 11}, + /* vp9 (profiled content from youtube and nflx) */ + {70, 70, 65, 55, 45, 35, 20, 8, 6, 5}, + /* av1 (profiled content from youtube and nflx) */ + {100, 100, 85, 70, 55, 30, 15, 5, 5, 5}, +#else + /* h264 cavlc */ + {0, 168, 150, 120, 100, 90, 90, 90, 90, 90}, + /* h264 cabac 8bit */ + {0, 134, 109, 84, 67, 56, 56, 56, 56, 56}, + /* h265 10bit assumption */ + {70, 140, 116, 92, 74, 62, 62, 62, 62, 62}, + /* vp9 */ + {70, 70, 65, 55, 45, 35, 35, 35, 35, 35}, + /* av1 */ + {100, 100, 85, 70, 55, 50, 50, 50, 50, 50}, +#endif +}; + +static u32 input_bitrate_fp = 0; + +/* 8KUHD60; UHD240; 1080p960 with B */ +static u32 fp_pixel_count_bar0 = 3840 * 2160 * 240; +/* 8KUHD60; UHD240; 1080p960 without B */ +static u32 fp_pixel_count_bar1 = 3840 * 2160 * 240; +/* 1080p720 */ +static u32 fp_pixel_count_bar2 = 3840 * 2160 * 180; +/* UHD120 */ +static u32 fp_pixel_count_bar3 = 3840 * 2160 * 120; +/* UHD90 */ +static u32 fp_pixel_count_bar4 = 3840 * 2160 * 90; +/* UHD60 */ +static u32 fp_pixel_count_bar5 = 3840 * 2160 * 60; +/* UHD30; FHD120; HD240 */ +static u32 fp_pixel_count_bar6 = 3840 * 2160 * 30; +/* FHD60 */ +static u32 fp_pixel_count_bar7 = 1920 * 1080 * 60; +/* FHD30 */ +static u32 fp_pixel_count_bar8 = 1920 * 1080 * 30; +/* HD30 */ +static u32 fp_pixel_count_bar9 = 1280 * 720 * 30; + +static u32 codec_encoder_gop_complexity_table_fp[8][3]; +static u32 codec_mbspersession_pineaple; + +static u32 cr_table_basic_pineapple[7][4] = +{ + {1920, 1080, 20, 40}, + {3840, 2160, 42, 84}, + {4096, 2160, 44, 88}, + {4096, 2304, 48, 96}, + {1280, 720, 7, 14}, + {2560, 1440, 32, 64}, + {7680, 4320, 84, 168}, +}; + +/* 100x */ +static u32 dpbopb_ubwc30_cr_table_cratio_pineapple[7][12] = +{ + {237, 399, 272, 137, 225, 158, 185, 259, 203, 138, 167, 152}, + {269, 404, 302, 202, 367, 238, 210, 299, 232, 134, 181, 149}, + {269, 404, 302, 202, 367, 238, 210, 299, 232, 134, 181, 149}, + {269, 404, 302, 202, 367, 238, 210, 299, 232, 134, 181, 149}, + {237, 399, 272, 137, 225, 158, 185, 259, 203, 138, 167, 152}, + {269, 404, 302, 202, 367, 238, 210, 299, 232, 134, 181, 149}, + {269, 404, 302, 202, 367, 238, 210, 299, 232, 134, 181, 149}, +}; + +/* 100x */ +static u32 rpb_ubwc30_cr_table_cratio_pineapple[7][12] = +{ + {193, 294, 218, 135, 214, 155, 175, 241, 191, 139, 162, 149}, + {285, 406, 316, 207, 373, 243, 201, 280, 221, 139, 177, 152}, + {285, 406, 316, 207, 373, 243, 201, 280, 221, 139, 177, 152}, + {285, 406, 316, 207, 373, 243, 201, 280, 221, 139, 177, 152}, + {193, 294, 218, 135, 214, 155, 175, 241, 191, 139, 162, 149}, + {285, 406, 316, 207, 373, 243, 201, 280, 221, 139, 177, 152}, + {285, 406, 316, 207, 373, 243, 201, 280, 221, 139, 177, 152}, +}; + +/* 100x */ +static u32 ipblossy_ubwc30_cr_table_cratio_pineapple[7][12] = +{ + {215, 215, 215, 174, 174, 174, 266, 266, 266, 231, 231, 231}, + {254, 254, 254, 219, 219, 219, 292, 292, 292, 249, 249, 249}, + {254, 254, 254, 219, 219, 219, 292, 292, 292, 249, 249, 249}, + {254, 254, 254, 219, 219, 219, 292, 292, 292, 249, 249, 249}, + {215, 215, 215, 174, 174, 174, 266, 266, 266, 231, 231, 231}, + {254, 254, 254, 219, 219, 219, 292, 292, 292, 249, 249, 249}, + {254, 254, 254, 219, 219, 219, 292, 292, 292, 249, 249, 249}, +}; + +/* 100x */ +static u32 ipblossless_ubwc30_cr_table_cratio_pineapple[7][12] = +{ + {185, 215, 194, 147, 178, 159, 162, 181, 169, 138, 161, 146}, + {186, 217, 195, 151, 183, 161, 164, 182, 170, 140, 168, 148}, + {186, 217, 195, 151, 183, 161, 164, 182, 170, 140, 168, 148}, + {186, 217, 195, 151, 183, 161, 164, 182, 170, 140, 168, 148}, + {185, 215, 194, 147, 178, 159, 162, 181, 169, 138, 161, 146}, + {186, 217, 195, 151, 183, 161, 164, 182, 170, 140, 168, 148}, + {186, 217, 195, 151, 183, 161, 164, 182, 170, 140, 168, 148}, +}; + +/* 100x */ +static u32 en_original_compression_factor_rgba_pwd_pineapple = 243; +/* 100x */ +static u32 en_original_compression_factor_rgba_avg_pineapple = 454; + +static u32 av1_num_tiles_pineapple[7][3] = +{ + {2, 1, 1}, + {4, 2, 2}, + {4, 2, 2}, + {4, 2, 2}, + {1, 1, 1}, + {2, 1, 1}, + {16, 4, 4}, +}; + +/* H I J K L M N O P + * TotalW Total R Frequency Write Read + * Name B b P B b P B b P + * I3B4b1P 0.5 1.875 3 4 1 1 0 1 2 2 1 + * I1B2b1P 0.5 1.75 1 2 1 1 0 1 2 2 1 + * IbP 0.5 1.5 0 1 1 1 0 1 2 2 1 + * IPP 1 1 0 0 1 1 0 1 2 2 1 + * P 1 1 0 0 1 1 0 1 2 2 1 + * smallB 0 2 0 1 0 1 0 1 2 2 1 + * bigB 1 2 1 0 0 1 0 1 2 2 1 + * + * Total W = SUMPRODUCT(H16:J16, K16 : M16) / SUM(H16:J16) + * Total R = SUMPRODUCT(H16:J16, N16 : P16) / SUM(H16:J16) +*/ + +/* 1000x */ +static u32 pineapple_en_readfactor[7] = {1000, 1500, 1750, 1875, 1000, 2000, 2000}; +/* 1000x */ +static u32 pineapple_en_writefactor[7] = {1000, 500, 500, 500, 1000, 0, 1000}; +static u32 pineapple_en_frame_num_parallel = 1; diff --git a/driver/variant/iris33/inc/msm_vidc_power_iris33.h b/driver/variant/iris33/inc/msm_vidc_power_iris33.h index 31bf9e8dab..1047f4cfa3 100644 --- a/driver/variant/iris33/inc/msm_vidc_power_iris33.h +++ b/driver/variant/iris33/inc/msm_vidc_power_iris33.h @@ -10,6 +10,8 @@ #include "msm_vidc_inst.h" #include "msm_vidc_power.h" +#define ENABLE_LEGACY_POWER_CALCULATIONS 1 + u64 msm_vidc_calc_freq_iris33(struct msm_vidc_inst* inst, u32 data_size); int msm_vidc_calc_bw_iris33(struct msm_vidc_inst* inst, struct vidc_bus_vote_data* vote_data); diff --git a/driver/variant/iris33/src/msm_vidc_bus_iris33.c b/driver/variant/iris33/src/msm_vidc_bus_iris33.c new file mode 100644 index 0000000000..41568fed7a --- /dev/null +++ b/driver/variant/iris33/src/msm_vidc_bus_iris33.c @@ -0,0 +1,921 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include "pineapple_technology.h" +#include "msm_vidc_debug.h" + +u32 calculate_number_lcus_pineapple(u32 width, u32 height, u32 lcu_size) +{ + u32 mbs_width = (width % lcu_size) ? + (width / lcu_size + 1) : (width / lcu_size); + u32 mbs_height = (height % lcu_size) ? + (height / lcu_size + 1) : (height / lcu_size); + + return mbs_width * mbs_height; +} + +u32 calculate_number_ubwctiles_pineapple( + u32 width, u32 height, u32 tile_w, u32 tile_h) +{ + u32 tiles_width = (width % tile_w) ? + (width / tile_w + 1) : (width / tile_w); + u32 tiles_height = (height % tile_h) ? + (height / tile_h + 1) : (height / tile_h); + + return tiles_width * tiles_height; +} + +struct compression_factors { + u32 dpb_cf_y; + u32 dpb_cf_cbcr; + u32 opb_cf_ycbcr; + u32 dpb_cr_y; + u32 ipb_cr_y; + u32 ipb_cr; +} compression_factor; + +u32 get_compression_factors(struct compression_factors *compression_factor, + struct api_calculation_input codec_input) +{ + u8 cr_index_entry, cr_index_y, cr_index_c, cr_index_uni; + u32 frame_width; + u32 frame_height; + + frame_width = codec_input.frame_width; + frame_height = codec_input.frame_height; + if (frame_width * frame_height <= 1920 * 1080) + cr_index_entry = 0; + else + cr_index_entry = 1; + + if (codec_input.bitdepth == CODEC_BITDEPTH_8) { + /* NOT PWC or average and power case */ + if (codec_input.complexity_setting != 0) { + cr_index_y = 0; + cr_index_c = 1; + cr_index_uni = 2; + } else { + cr_index_y = 3; + cr_index_c = 4; + cr_index_uni = 5; + } + } else { + /* NOT PWC or average and power case */ + if (codec_input.complexity_setting != 0) { + cr_index_y = 6; + cr_index_c = 7; + cr_index_uni = 8; + } else { + cr_index_y = 9; + cr_index_c = 10; + cr_index_uni = 11; + } + } + + if (codec_input.decoder_or_encoder == CODEC_DECODER) { + compression_factor->dpb_cf_y = + dpbopb_ubwc30_cr_table_cratio_pineapple[cr_index_entry][cr_index_y]; + compression_factor->dpb_cf_cbcr = + dpbopb_ubwc30_cr_table_cratio_pineapple[cr_index_entry][cr_index_c]; + compression_factor->opb_cf_ycbcr = + dpbopb_ubwc30_cr_table_cratio_pineapple[cr_index_entry][cr_index_uni]; + + if ((codec_input.regression_mode == 3) && + /* input cr numbers from interface */ + ((codec_input.cr_dpb != 0) || (codec_input.cr_opb != 0))) { + compression_factor->dpb_cf_y = (u32)(codec_input.cr_dpb * 100); + compression_factor->dpb_cf_cbcr = (u32)(codec_input.cr_dpb * 100); + compression_factor->opb_cf_ycbcr = (u32)(codec_input.cr_opb * 100); + } + } else { /* encoder */ + /* + * IPB CR Table Choice; static sheet (if framewidth<3840, use lossless table) + * (else, use lossy table) + * stick to this choice for SW purpose (no change for SW) + */ + if (frame_width < 3840) { + compression_factor->ipb_cr = + ipblossless_ubwc30_cr_table_cratio_pineapple[cr_index_entry][cr_index_uni]; + compression_factor->ipb_cr_y = + ipblossless_ubwc30_cr_table_cratio_pineapple[cr_index_entry][cr_index_y]; + } else { + compression_factor->ipb_cr = + ipblossy_ubwc30_cr_table_cratio_pineapple[cr_index_entry][cr_index_uni]; + compression_factor->ipb_cr_y = + ipblossy_ubwc30_cr_table_cratio_pineapple[cr_index_entry][cr_index_y]; + } + + compression_factor->dpb_cf_y = + rpb_ubwc30_cr_table_cratio_pineapple[cr_index_entry][cr_index_y]; + + compression_factor->dpb_cf_cbcr = + rpb_ubwc30_cr_table_cratio_pineapple[cr_index_entry][cr_index_c]; + + if ((codec_input.regression_mode == 3) && + /* input cr from interface */ + ((codec_input.cr_ipb != 0) || (codec_input.cr_rpb != 0))) { + compression_factor->dpb_cf_y = (u32)(codec_input.cr_rpb * 100); + compression_factor->dpb_cf_cbcr = (u32)(codec_input.cr_rpb * 100); + compression_factor->ipb_cr_y = (u32)(codec_input.cr_ipb * 100); + } + } + + return 0; +} + +static int calculate_bandwidth_decoder_iris3( + struct api_calculation_input codec_input, + struct api_calculation_bw_output *codec_output) +{ + /* common control parameters */ + u32 frame_width; + u32 frame_height; + u32 frame_lcu_size = 16; /* initialized to h264 */ + u32 lcu_per_frame; + u32 target_bitrate; + u32 collocated_bytes_per_lcu = 16; /* initialized to h264 */ + u32 av1d_segment_read_per_lcu; + u32 av1d_fe_leftlinebuffer_perlcu_tileboudary; + + u32 frame420_y_bw_linear_8bpp; + u32 frame420_y_bw_no_ubwc_tile_10bpp; + u32 frame420_y_bw_linear_10bpp; + + u16 ubwc_tile_w; + u16 ubwc_tile_h; + + u32 dpb_compression_factor_y; + u32 dpb_compression_factor_cbcr; + + u32 reconstructed_write_bw_factor_rd; + u32 reference_y_read_bw_factor; + u32 reference_cbcr_read_bw_factor; + + /* decoder control parameters */ + u32 decoder_vsp_read_factor = 6; + u32 bins_to_bits_factor = 4; + + u32 dpb_to_opb_ratios_ds = 1; + + u8 llc_enabled_ref_y_rd = 1; + u8 llc_enable_ref_crcb_rd = 1; + u8 llc_enabled_bse_tlb = 1; + /* this is for 2pipe and 1pipe LLC */ + u8 llc_enable_probtable_av1d_21pipe = 0; + + u32 opb_compression_factor_ycbcr; + u32 dpb_ubwc_tile_width_pixels; + u32 dpb_ubwc_tile_height_pixels; + u32 decoder_frame_complexity_factor; + u32 llc_saving = 130; /* Initialized to H264 */ + + u16 av1_tile_numbers; + u32 av1_collated_seg_buffer_rd_wr; + /* need divide by 1M at later step; */ + u32 av1_probability_table_rdwr_bytesperframe = 22784; + u32 av1_fe_left_line_buffer_rdwr; + + u32 bse_tlb_byte_per_lcu = 0; + + u32 large_bw_calculation_fp = 0; + + llc_enabled_ref_y_rd = (codec_input.status_llc_onoff) ? 1 : 0; + llc_enable_ref_crcb_rd = (codec_input.status_llc_onoff) ? 1 : 0; + /* H265D BSE tlb in LLC will be pored in Kailua */ + llc_enabled_bse_tlb = (codec_input.status_llc_onoff) ? 1 : 0; + + frame_width = codec_input.frame_width; + frame_height = codec_input.frame_height; + if ((codec_input.codec == CODEC_H264) || + (codec_input.codec == CODEC_H264_CAVLC)) { + frame_lcu_size = 16; + collocated_bytes_per_lcu = 16; + llc_saving = 130; + } else if (codec_input.codec == CODEC_HEVC) { + if (codec_input.lcu_size == 32) { + frame_lcu_size = 32; + collocated_bytes_per_lcu = 64; + llc_saving = 114; + } else if (codec_input.lcu_size == 64) { + frame_lcu_size = 64; + collocated_bytes_per_lcu = 256; + llc_saving = 107; + } + } else if (codec_input.codec == CODEC_VP9) { + if (codec_input.lcu_size == 32) { + frame_lcu_size = 32; + collocated_bytes_per_lcu = 64; + llc_saving = 114; + } else if (codec_input.lcu_size == 64) { + frame_lcu_size = 64; + collocated_bytes_per_lcu = 256; + llc_saving = 107; + } + } else if (codec_input.codec == CODEC_AV1) { + u32 av1d_leftline_cdef = (2944 + 896 + 896); + u32 av1d_leftline_scaling = (2176 + 1408 + 1408); + u32 av1d_leftline_fg = (1280); + u32 av1d_leftline_lr = (1536 + 1024 + 1024); + + av1d_fe_leftlinebuffer_perlcu_tileboudary = + av1d_leftline_cdef + av1d_leftline_scaling + + av1d_leftline_fg + av1d_leftline_lr; + + if (codec_input.lcu_size == 128) { + frame_lcu_size = 128; + collocated_bytes_per_lcu = 4 * 512; + av1d_segment_read_per_lcu = 512; + llc_saving = 104; + } else if (codec_input.lcu_size == 32) { + frame_lcu_size = 32; + collocated_bytes_per_lcu = 4 * 512 / (128 * 128 / 32 / 32); + av1d_segment_read_per_lcu = 512 / (128 * 128 / 32 / 32); + av1d_fe_leftlinebuffer_perlcu_tileboudary = + av1d_fe_leftlinebuffer_perlcu_tileboudary / (128 * 128 / 32 / 32); + llc_saving = 114; + } else if (codec_input.lcu_size == 64) { + frame_lcu_size = 64; + collocated_bytes_per_lcu = 4 * 512 / (128 * 128 / 64 / 64); + av1d_segment_read_per_lcu = 512 / (128 * 128 / 64 / 64); + av1d_fe_leftlinebuffer_perlcu_tileboudary = + av1d_fe_leftlinebuffer_perlcu_tileboudary / (128 * 128 / 64 / 64); + llc_saving = 107; + } + } + + lcu_per_frame = + calculate_number_lcus_pineapple(frame_width, frame_height, frame_lcu_size); + + target_bitrate = (u32)(codec_input.bitrate_mbps); /* Mbps */ + + ubwc_tile_w = (codec_input.bitdepth == CODEC_BITDEPTH_8) ? 32 : 48; + ubwc_tile_h = (codec_input.bitdepth == CODEC_BITDEPTH_8) ? 8 : 4; + + frame420_y_bw_linear_8bpp = + ((calculate_number_ubwctiles_pineapple(frame_width, frame_height, 32, 8) * + 256 * codec_input.frame_rate + 999) / 1000 + 999) / 1000; + + frame420_y_bw_no_ubwc_tile_10bpp = + ((calculate_number_ubwctiles_pineapple(frame_width, frame_height, 48, 4) * + 256 * codec_input.frame_rate + 999) / 1000 + 999) / 1000; + frame420_y_bw_linear_10bpp = ((frame_width * frame_height * + codec_input.frame_rate * 2 + 999) / 1000 + 999) / 1000; + + /* TODO Integrate Compression Ratio returned by FW */ + get_compression_factors(&compression_factor, codec_input); + dpb_compression_factor_y = compression_factor.dpb_cf_y; + dpb_compression_factor_cbcr = compression_factor.dpb_cf_cbcr; + opb_compression_factor_ycbcr = compression_factor.opb_cf_ycbcr; + + dpb_ubwc_tile_width_pixels = ubwc_tile_w; + + dpb_ubwc_tile_height_pixels = ubwc_tile_h; + + decoder_frame_complexity_factor = + (codec_input.complexity_setting == 0) ? + 400 : ((codec_input.complexity_setting == 1) ? 266 : 100); + + reconstructed_write_bw_factor_rd = (codec_input.complexity_setting == 0) ? + 105 : 100; + + reference_y_read_bw_factor = llc_saving; + + reference_cbcr_read_bw_factor = llc_saving; + + if (codec_input.codec == CODEC_AV1) { + u8 av1tile_index_entry, av1tile_complexity; + + if (frame_width * frame_height <= 1280 * 720) + av1tile_index_entry = 4; + else if (frame_width * frame_height <= 1920 * 1080) + av1tile_index_entry = 0; + else if (frame_width * frame_height <= 2560 * 1440) + av1tile_index_entry = 5; + else if (frame_width * frame_height <= 4096 * 2304) + av1tile_index_entry = 1; + else + av1tile_index_entry = 6; + + /* NOT PWC //or average and power case */ + if (codec_input.complexity_setting != 0) + av1tile_complexity = 1; + else + av1tile_complexity = 0; + + av1_tile_numbers = av1_num_tiles_pineapple[av1tile_index_entry][av1tile_complexity]; + + /* these bw can be ignored */ + av1_collated_seg_buffer_rd_wr = + ((av1d_segment_read_per_lcu * lcu_per_frame * + codec_input.frame_rate + 999) / 1000 + 999) / 1000; + + av1_fe_left_line_buffer_rdwr = + (((av1d_fe_leftlinebuffer_perlcu_tileboudary * + frame_height * (av1_tile_numbers > 1 ? av1_tile_numbers / 2 : 0) + + 999) / 1000 + 999) / 1000 + (frame_lcu_size - 1)) / frame_lcu_size; + } + + if (codec_input.codec == CODEC_HEVC) { + if (codec_input.lcu_size == 32) + bse_tlb_byte_per_lcu = 64; + else if (codec_input.lcu_size == 16) + bse_tlb_byte_per_lcu = 32; + else + bse_tlb_byte_per_lcu = 128; + } else if ((codec_input.codec == CODEC_H264) || + (codec_input.codec == CODEC_H264_CAVLC)) { + bse_tlb_byte_per_lcu = 64; + } else if (codec_input.codec == CODEC_VP9) { + bse_tlb_byte_per_lcu = 304; + } else if (codec_input.codec == CODEC_AV1) { + if (codec_input.lcu_size == 128) + bse_tlb_byte_per_lcu = 2064; + else if (codec_input.lcu_size == 64) + bse_tlb_byte_per_lcu = 1056; + else if (codec_input.lcu_size == 32) + bse_tlb_byte_per_lcu = 2064 / (128 * 128 / 32 / 32); + } + + codec_output->noc_bw_rd = 0; + codec_output->noc_bw_wr = 0; + codec_output->ddr_bw_rd = 0; + codec_output->ddr_bw_wr = 0; + + large_bw_calculation_fp = 0; + large_bw_calculation_fp = ((target_bitrate * + decoder_vsp_read_factor + 7) / 8); + + codec_output->vsp_read_noc = large_bw_calculation_fp; + + codec_output->vsp_read_ddr = codec_output->vsp_read_noc; + + large_bw_calculation_fp = ((target_bitrate * + bins_to_bits_factor + 7) / 8); + + codec_output->vsp_write_noc = large_bw_calculation_fp; + codec_output->vsp_write_ddr = codec_output->vsp_write_noc; + + /* accumulation */ + codec_output->noc_bw_rd += codec_output->vsp_read_noc; + codec_output->ddr_bw_rd += codec_output->vsp_read_ddr; + codec_output->noc_bw_wr += codec_output->vsp_write_noc; + codec_output->ddr_bw_wr += codec_output->vsp_write_ddr; + + large_bw_calculation_fp = 0; + large_bw_calculation_fp = ((collocated_bytes_per_lcu * + lcu_per_frame * codec_input.frame_rate + 999) / 1000 + 999) / 1000; + codec_output->collocated_rd_noc = large_bw_calculation_fp; + codec_output->collocated_wr_noc = codec_output->collocated_rd_noc; + codec_output->collocated_rd_ddr = codec_output->collocated_rd_noc; + codec_output->collocated_wr_ddr = codec_output->collocated_wr_noc; + + codec_output->collocated_rd_wr_total_noc = + (u32)(codec_output->collocated_rd_noc + codec_output->collocated_wr_noc); + + codec_output->collocated_rd_wr_total_ddr = + codec_output->collocated_rd_wr_total_noc; + + /* accumulation */ + codec_output->noc_bw_rd += codec_output->collocated_rd_noc; + codec_output->noc_bw_wr += codec_output->collocated_wr_noc; + codec_output->ddr_bw_rd += codec_output->collocated_rd_ddr; + codec_output->ddr_bw_wr += codec_output->collocated_wr_ddr; + + large_bw_calculation_fp = 0; + large_bw_calculation_fp = ((codec_input.bitdepth == CODEC_BITDEPTH_8) ? + frame420_y_bw_linear_8bpp : + frame420_y_bw_no_ubwc_tile_10bpp) * decoder_frame_complexity_factor; + + large_bw_calculation_fp = + (large_bw_calculation_fp + dpb_compression_factor_y - 1) / + dpb_compression_factor_y; + + codec_output->dpb_rd_y_noc = large_bw_calculation_fp; + + large_bw_calculation_fp = ((codec_input.bitdepth == CODEC_BITDEPTH_8) ? + frame420_y_bw_linear_8bpp : frame420_y_bw_no_ubwc_tile_10bpp) * + decoder_frame_complexity_factor; + + large_bw_calculation_fp = + (large_bw_calculation_fp + dpb_compression_factor_cbcr - 1) / + dpb_compression_factor_cbcr / 2; + + codec_output->dpb_rd_crcb_noc = large_bw_calculation_fp; + codec_output->dpb_rdwr_duetooverlap_noc = 0; + + large_bw_calculation_fp = ((codec_input.bitdepth == CODEC_BITDEPTH_8) ? + frame420_y_bw_linear_8bpp : frame420_y_bw_no_ubwc_tile_10bpp) * + reconstructed_write_bw_factor_rd; + + large_bw_calculation_fp = ((codec_input.bitdepth == CODEC_BITDEPTH_8) ? + frame420_y_bw_linear_8bpp : frame420_y_bw_no_ubwc_tile_10bpp) * + reconstructed_write_bw_factor_rd; + + large_bw_calculation_fp = large_bw_calculation_fp * + (dpb_compression_factor_y / 2 + dpb_compression_factor_cbcr); + + large_bw_calculation_fp = (large_bw_calculation_fp + dpb_compression_factor_y - 1) / + dpb_compression_factor_y; + + large_bw_calculation_fp = + (large_bw_calculation_fp + dpb_compression_factor_cbcr - 1) / + dpb_compression_factor_cbcr; + + codec_output->dpb_wr_noc = large_bw_calculation_fp; + + codec_output->dpb_rd_y_ddr = (llc_enabled_ref_y_rd) ? + ((codec_output->dpb_rd_y_noc * 100 + reference_y_read_bw_factor - 1) / + reference_y_read_bw_factor) : codec_output->dpb_rd_y_noc; + + codec_output->dpb_rd_crcb_ddr = (llc_enable_ref_crcb_rd) ? + ((codec_output->dpb_rd_crcb_noc * 100 + + reference_cbcr_read_bw_factor - 1) / + reference_cbcr_read_bw_factor) : codec_output->dpb_rd_crcb_noc; + + codec_output->dpb_rdwr_duetooverlap_ddr = 0; + codec_output->dpb_wr_ddr = codec_output->dpb_wr_noc; + + /* accumulation */ + codec_output->noc_bw_rd += codec_output->dpb_rd_y_noc; + codec_output->noc_bw_rd += codec_output->dpb_rd_crcb_noc; + codec_output->noc_bw_rd += codec_output->dpb_rdwr_duetooverlap_noc; + codec_output->noc_bw_wr += codec_output->dpb_wr_noc; + codec_output->ddr_bw_rd += codec_output->dpb_rd_y_ddr; + codec_output->ddr_bw_rd += codec_output->dpb_rd_crcb_ddr; + codec_output->ddr_bw_rd += codec_output->dpb_rdwr_duetooverlap_ddr; + codec_output->ddr_bw_wr += codec_output->dpb_wr_ddr; + + if (codec_input.linear_opb || codec_input.split_opb) { + if (codec_input.linear_opb) { + if (codec_input.bitdepth == CODEC_BITDEPTH_8) { + large_bw_calculation_fp = ((frame420_y_bw_linear_8bpp) * + 3 / 2 / dpb_to_opb_ratios_ds); + + codec_output->opb_write_total_noc = large_bw_calculation_fp; + } else { + large_bw_calculation_fp = ((frame420_y_bw_linear_10bpp) * + 3 / 2 / dpb_to_opb_ratios_ds); + + codec_output->opb_write_total_noc = large_bw_calculation_fp; + } + } else { /* (CODEC_INPUT.split_opb) */ + if (codec_input.bitdepth == CODEC_BITDEPTH_8) { + large_bw_calculation_fp = + (frame420_y_bw_linear_8bpp * 3 / 2 / dpb_to_opb_ratios_ds * + 100 + opb_compression_factor_ycbcr - 1) / + opb_compression_factor_ycbcr; + + codec_output->opb_write_total_noc = large_bw_calculation_fp; + } else { + large_bw_calculation_fp = + (frame420_y_bw_no_ubwc_tile_10bpp * 3 / 2 / + dpb_to_opb_ratios_ds * 100 + + opb_compression_factor_ycbcr - 1) / + opb_compression_factor_ycbcr; + + codec_output->opb_write_total_noc = large_bw_calculation_fp; + } + } + } else { + codec_output->opb_write_total_noc = 0; + } + + codec_output->opb_write_total_ddr = codec_output->opb_write_total_noc; + + /* accumulation */ + codec_output->noc_bw_wr += codec_output->opb_write_total_noc; + codec_output->ddr_bw_wr += codec_output->opb_write_total_ddr; + + large_bw_calculation_fp = ((bse_tlb_byte_per_lcu * lcu_per_frame * + codec_input.frame_rate + 999) / 1000 + 999) / 1000; + + codec_output->bse_tlb_rd_noc = large_bw_calculation_fp; + + if (llc_enabled_bse_tlb) + codec_output->bse_tlb_rd_ddr = 0; + else + codec_output->bse_tlb_rd_ddr = codec_output->bse_tlb_rd_noc; + + codec_output->bse_tlb_wr_noc = codec_output->bse_tlb_rd_noc; + + if (llc_enabled_bse_tlb) + codec_output->bse_tlb_wr_ddr = 0; + else + codec_output->bse_tlb_wr_ddr = codec_output->bse_tlb_wr_noc; + + /* accumulation */ + codec_output->noc_bw_rd += codec_output->bse_tlb_rd_noc; + codec_output->ddr_bw_rd += codec_output->bse_tlb_rd_ddr; + codec_output->noc_bw_wr += codec_output->bse_tlb_wr_noc; + codec_output->ddr_bw_wr += codec_output->bse_tlb_wr_ddr; + + if (codec_input.codec == CODEC_AV1) { + codec_output->statistics_rd_noc = (av1_collated_seg_buffer_rd_wr + + av1_probability_table_rdwr_bytesperframe * av1_tile_numbers / + 1000 / 1000 + av1_fe_left_line_buffer_rdwr); + + codec_output->statistics_wr_noc = (av1_collated_seg_buffer_rd_wr + + av1_probability_table_rdwr_bytesperframe * av1_tile_numbers / + 1000 / 1000 + av1_fe_left_line_buffer_rdwr); + + if (llc_enable_probtable_av1d_21pipe) { + /* assert(CODEC_INPUT.pipe_num != 4); */ + codec_output->statistics_rd_ddr = codec_output->statistics_rd_noc - + av1_probability_table_rdwr_bytesperframe * + av1_tile_numbers / 1000 / 1000; + + codec_output->statistics_wr_ddr = codec_output->statistics_wr_noc - + av1_probability_table_rdwr_bytesperframe * + av1_tile_numbers / 1000 / 1000; + } else { + codec_output->statistics_rd_ddr = codec_output->statistics_rd_noc; + codec_output->statistics_wr_ddr = codec_output->statistics_wr_noc; + } + + /* accumulation */ + codec_output->noc_bw_rd += codec_output->statistics_rd_noc; + codec_output->ddr_bw_rd += codec_output->statistics_rd_ddr; + codec_output->noc_bw_wr += codec_output->statistics_wr_noc; + codec_output->ddr_bw_wr += codec_output->statistics_wr_ddr; + } + + + codec_output->mmu_rd_ddr = 0; + codec_output->mmu_rd_noc = 0; + /* accumulation */ + codec_output->noc_bw_rd += codec_output->mmu_rd_noc; + codec_output->ddr_bw_rd += codec_output->mmu_rd_ddr; + + return 0; +} + +static int calculate_bandwidth_encoder_iris3( + struct api_calculation_input codec_input, + struct api_calculation_bw_output *codec_output) +{ + /* common control parameters */ + u32 frame_width; + u32 frame_height; + u32 frame_lcu_size; + u32 lcu_per_frame; + u32 target_bitrate; + u32 collocated_bytes_per_lcu; + + u32 frame420_y_bw_linear_8bpp; + u32 frame420_y_bw_no_ubwc_tile_10bpp; + u32 frame420_y_bw_linear_10bpp; + + u16 ubwc_tile_w; + u16 ubwc_tile_h; + + u32 dpb_compression_factor_y; + u32 dpb_compression_factor_cbcr; + + u32 reconstructed_write_bw_factor_rd; + u32 reference_y_read_bw_factor; + u32 reference_crcb_read_bw_factor; + + /* encoder control parameters */ + u32 en_vertical_tiles_width = 960; + + u8 en_rotation_90_270 = 0; + /* TODO Can we use (codec_input.status_llc_onoff) for enc_llc_*? */ + u8 en_llc_enable_ref_rd_crcb = 0; + u8 en_llc_enable_rec_wr_uncompleted = 0; + u8 en_llc_enable_ref_rd_y_overlap = 0; + + u32 en_bins_to_bits_factor = 4; + u32 en_search_windows_size_horizontal = 96; + + u32 en_tile_number; + u32 ipb_compression_factor_y; + u32 ipb_compression_factor; + + u32 large_bw_calculation_fp = 0; + + /* TODO Are these really needed in Encoder? */ + u32 bse_tlb_byte_per_lcu = 0; + u8 llc_enabled_bse_tlb = 1; + + /*H265D BSE tlb in LLC will be pored in Kailua */ + llc_enabled_bse_tlb = (codec_input.status_llc_onoff) ? 1 : 0; + + frame_width = codec_input.frame_width; + frame_height = codec_input.frame_height; + if ((codec_input.codec == CODEC_H264) || + (codec_input.codec == CODEC_H264_CAVLC)) { + frame_lcu_size = 16; + collocated_bytes_per_lcu = 16; + } if (codec_input.codec == CODEC_HEVC) { + frame_lcu_size = 32; + collocated_bytes_per_lcu = 64; + } else { + /* TODO What is the value for VP9, AV1? */ + frame_lcu_size = 16; + collocated_bytes_per_lcu = 16; /* TODO Fixes Uninitialized compilation error. */ + } + + lcu_per_frame = + calculate_number_lcus_pineapple(frame_width, frame_height, frame_lcu_size); + + bse_tlb_byte_per_lcu = 16; /* TODO Should be in common declaration */ + + target_bitrate = (u32)(codec_input.bitrate_mbps); /* Mbps */ + + ubwc_tile_w = (codec_input.bitdepth == CODEC_BITDEPTH_8) ? 32 : 48; + ubwc_tile_h = (codec_input.bitdepth == CODEC_BITDEPTH_8) ? 8 : 4; + + /* yuv */ + if (codec_input.ipb_yuvrgb == 0) { + frame420_y_bw_linear_8bpp = + ((calculate_number_ubwctiles_pineapple(frame_width, frame_height, + 32, 8) * 256 * codec_input.frame_rate + 999) / 1000 + 999) / 1000; + } else { /* RGBA */ + frame420_y_bw_linear_8bpp = + ((calculate_number_ubwctiles_pineapple(frame_width, frame_height, + 6, 4) * 256 * codec_input.frame_rate + 999) / 1000 + 999) / 1000; + } + + frame420_y_bw_no_ubwc_tile_10bpp = + ((calculate_number_ubwctiles_pineapple(frame_width, frame_height, 48, 4) * + 256 * codec_input.frame_rate + 999) / 1000 + 999) / 1000; + + frame420_y_bw_linear_10bpp = ((frame_width * frame_height * + codec_input.frame_rate * 2 + 999) / 1000 + 999) / 1000; + + /* TODO Integrate Compression Ratio returned by FW */ + get_compression_factors(&compression_factor, codec_input); + dpb_compression_factor_y = compression_factor.dpb_cf_y; + dpb_compression_factor_cbcr = compression_factor.dpb_cf_cbcr; + ipb_compression_factor_y = compression_factor.ipb_cr_y; + ipb_compression_factor = compression_factor.ipb_cr; + + en_tile_number = (frame_width % en_vertical_tiles_width) ? + ((frame_width / en_vertical_tiles_width) + 1) : + (frame_width / en_vertical_tiles_width); + + en_tile_number = en_tile_number * 100; + + /* ceil is same as excel roundup (float, 0); */ + reconstructed_write_bw_factor_rd = ((en_tile_number - 100) * 2 * + ((codec_input.lcu_size + ubwc_tile_w - 1) / ubwc_tile_w) * + ubwc_tile_w + (frame_width - 1)) / (frame_width)+100; + + reference_y_read_bw_factor = ((en_tile_number - 100) * 2 * + ((en_search_windows_size_horizontal + ubwc_tile_w - 1) / ubwc_tile_w) * + ubwc_tile_w + (frame_width - 1)) / frame_width + 100; + + reference_crcb_read_bw_factor = 150; + + codec_output->noc_bw_rd = 0; + codec_output->noc_bw_wr = 0; + codec_output->ddr_bw_rd = 0; + codec_output->ddr_bw_wr = 0; + + large_bw_calculation_fp = (target_bitrate * en_bins_to_bits_factor + 7) / 8; + codec_output->vsp_read_noc = large_bw_calculation_fp; + codec_output->vsp_read_ddr = codec_output->vsp_read_noc; + large_bw_calculation_fp = (target_bitrate + 7) / 8; + + codec_output->vsp_write_noc = codec_output->vsp_read_noc + + large_bw_calculation_fp; + + codec_output->vsp_write_ddr = codec_output->vsp_write_noc; + + /* accumulation */ + codec_output->noc_bw_rd += codec_output->vsp_read_noc; + codec_output->ddr_bw_rd += codec_output->vsp_read_ddr; + codec_output->noc_bw_wr += codec_output->vsp_write_noc; + codec_output->ddr_bw_wr += codec_output->vsp_write_ddr; + + large_bw_calculation_fp = ((collocated_bytes_per_lcu * lcu_per_frame * + codec_input.frame_rate + 999) / 1000 + 999) / 1000; + + codec_output->collocated_rd_noc = large_bw_calculation_fp; + codec_output->collocated_wr_noc = codec_output->collocated_rd_noc; + codec_output->collocated_rd_ddr = codec_output->collocated_rd_noc; + codec_output->collocated_wr_ddr = codec_output->collocated_wr_noc; + + codec_output->collocated_rd_wr_total_noc = + (u32)(codec_output->collocated_rd_noc + codec_output->collocated_wr_noc); + codec_output->collocated_rd_wr_total_ddr = + codec_output->collocated_rd_wr_total_noc; + + /* accumulation */ + codec_output->noc_bw_rd += codec_output->collocated_rd_noc; + codec_output->noc_bw_wr += codec_output->collocated_wr_noc; + codec_output->ddr_bw_rd += codec_output->collocated_rd_ddr; + codec_output->ddr_bw_wr += codec_output->collocated_wr_ddr; + + large_bw_calculation_fp = 0; + + large_bw_calculation_fp = ((codec_input.bitdepth == CODEC_BITDEPTH_8) ? + frame420_y_bw_linear_8bpp : + frame420_y_bw_no_ubwc_tile_10bpp) * reference_y_read_bw_factor; + + large_bw_calculation_fp = (large_bw_calculation_fp * + pineapple_en_readfactor[codec_input.hierachical_layer]); + + large_bw_calculation_fp = (large_bw_calculation_fp + + dpb_compression_factor_y - 1) / dpb_compression_factor_y; + + large_bw_calculation_fp = (large_bw_calculation_fp + 999) / 1000; + + codec_output->dpb_rd_y_noc = large_bw_calculation_fp; + + large_bw_calculation_fp = 0; + + large_bw_calculation_fp = ((codec_input.bitdepth == CODEC_BITDEPTH_8) ? + frame420_y_bw_linear_8bpp : + frame420_y_bw_no_ubwc_tile_10bpp) * reference_crcb_read_bw_factor / 2; + + large_bw_calculation_fp = large_bw_calculation_fp * + pineapple_en_readfactor[codec_input.hierachical_layer]; + + large_bw_calculation_fp = (large_bw_calculation_fp + + dpb_compression_factor_cbcr - 1) / dpb_compression_factor_cbcr; + + large_bw_calculation_fp = (large_bw_calculation_fp + 999) / 1000; + codec_output->dpb_rd_crcb_noc = large_bw_calculation_fp; + + large_bw_calculation_fp = 0; + + large_bw_calculation_fp = ((codec_input.bitdepth == CODEC_BITDEPTH_8) ? + frame420_y_bw_linear_8bpp : frame420_y_bw_no_ubwc_tile_10bpp) * + reconstructed_write_bw_factor_rd * + pineapple_en_writefactor[codec_input.hierachical_layer] / + pineapple_en_frame_num_parallel; + + large_bw_calculation_fp = (large_bw_calculation_fp + 999) / 1000; + + large_bw_calculation_fp = large_bw_calculation_fp * + (dpb_compression_factor_cbcr + dpb_compression_factor_y / 2); + + large_bw_calculation_fp = (large_bw_calculation_fp + + dpb_compression_factor_y - 1) / dpb_compression_factor_y; + + large_bw_calculation_fp = (large_bw_calculation_fp + + dpb_compression_factor_cbcr - 1) / dpb_compression_factor_cbcr; + + codec_output->dpb_wr_noc = large_bw_calculation_fp; + + /* + * Summary: + * by default (for both HFR and HSR cases) : + * -Any resolution and fps >= 120, enable layering. + * (120 -> 3, 240 -> 4, 480 -> 5) + * - (once we enable layering) : 50 per cent frames are Non - reference + * frames.recon write is disable by Venus firmware + * - Customer has ability to enable / disable layering. + * Hence, recon write savings would not be there if customer explicitly disables layer encoding. + */ + + /*HFR Cases use alternating rec write if not PWC*/ + if ((codec_input.frame_rate >= 120) && (codec_input.complexity_setting != 0)) + codec_output->dpb_wr_noc = codec_output->dpb_wr_noc / 2; + + /* for power cases with [B1] adaptive non-ref b frame */ + /* power caes IbP non reference b */ + if ((codec_input.hierachical_layer >= 1) && + (codec_input.hierachical_layer <= 3) && + (codec_input.complexity_setting != 0)) + codec_output->dpb_wr_noc = codec_output->dpb_wr_noc / 2; + + large_bw_calculation_fp = 0; + large_bw_calculation_fp = codec_output->dpb_wr_noc * + (reconstructed_write_bw_factor_rd - 100); + + large_bw_calculation_fp = (large_bw_calculation_fp + + reconstructed_write_bw_factor_rd - 1) / reconstructed_write_bw_factor_rd; + + codec_output->dpb_rdwr_duetooverlap_noc = large_bw_calculation_fp; + + codec_output->dpb_rd_y_ddr = (en_llc_enable_ref_rd_y_overlap) ? + (codec_output->dpb_rd_y_noc * 100 + reference_y_read_bw_factor - 1) / + reference_y_read_bw_factor : codec_output->dpb_rd_y_noc; + + codec_output->dpb_rd_crcb_ddr = (en_llc_enable_ref_rd_crcb) ? + (codec_output->dpb_rd_crcb_noc * 100 + reference_crcb_read_bw_factor - 1) / + reference_crcb_read_bw_factor : codec_output->dpb_rd_crcb_noc; + + codec_output->dpb_rdwr_duetooverlap_ddr = (en_llc_enable_rec_wr_uncompleted) ? + 0 : codec_output->dpb_rdwr_duetooverlap_noc; + + codec_output->dpb_wr_ddr = (en_llc_enable_rec_wr_uncompleted) ? + 0 : codec_output->dpb_wr_noc; + + /* accumulation */ + codec_output->noc_bw_rd += codec_output->dpb_rd_y_noc; + codec_output->noc_bw_rd += codec_output->dpb_rd_crcb_noc; + codec_output->noc_bw_rd += codec_output->dpb_rdwr_duetooverlap_noc; + codec_output->noc_bw_wr += codec_output->dpb_wr_noc; + codec_output->ddr_bw_rd += codec_output->dpb_rd_y_ddr; + codec_output->ddr_bw_rd += codec_output->dpb_rd_crcb_ddr; + codec_output->ddr_bw_rd += codec_output->dpb_rdwr_duetooverlap_ddr; + codec_output->ddr_bw_wr += codec_output->dpb_wr_ddr; + + if (codec_input.bitdepth == CODEC_BITDEPTH_8) { + if (codec_input.ipb_yuvrgb == 0) { /* yuv */ + large_bw_calculation_fp = ((frame420_y_bw_linear_8bpp) * 3 / 2); + codec_output->ipb_rd_total_noc = large_bw_calculation_fp; + if (codec_input.linear_ipb == 0) { + codec_output->ipb_rd_total_noc = + (large_bw_calculation_fp * 100 + ipb_compression_factor - 1) / + ipb_compression_factor; + } + } else { /* rgb */ + large_bw_calculation_fp = frame420_y_bw_linear_8bpp; + codec_output->ipb_rd_total_noc = large_bw_calculation_fp; + if (codec_input.linear_ipb == 0) { + if (codec_input.complexity_setting == 0) /* pwc */ + codec_output->ipb_rd_total_noc = + (large_bw_calculation_fp * 100 + + en_original_compression_factor_rgba_pwd_pineapple - 1) / + en_original_compression_factor_rgba_pwd_pineapple; + else + codec_output->ipb_rd_total_noc = + (large_bw_calculation_fp * 100 + + en_original_compression_factor_rgba_avg_pineapple - 1) / + en_original_compression_factor_rgba_avg_pineapple; + } + } + } else { + if (codec_input.linear_ipb == 1) { + large_bw_calculation_fp = (frame420_y_bw_linear_10bpp) * 3 / 2; + codec_output->ipb_rd_total_noc = large_bw_calculation_fp; + } else { + large_bw_calculation_fp = (frame420_y_bw_no_ubwc_tile_10bpp * + 300 / 2 + ipb_compression_factor - 1) / ipb_compression_factor; + codec_output->ipb_rd_total_noc = large_bw_calculation_fp; + } + } + + if (en_rotation_90_270) { + if (codec_input.codec == CODEC_HEVC) { + if ((codec_input.bitdepth == CODEC_BITDEPTH_8) && + (codec_input.ipb_yuvrgb == 0)) + codec_output->ipb_rd_total_noc = codec_output->ipb_rd_total_noc + * 1; + else + codec_output->ipb_rd_total_noc = codec_output->ipb_rd_total_noc + * 3; + } else { + codec_output->ipb_rd_total_noc = codec_output->ipb_rd_total_noc * 2; + } + } + + codec_output->ipb_rd_total_ddr = codec_output->ipb_rd_total_noc; + + /* accumulation */ + codec_output->noc_bw_rd += codec_output->ipb_rd_total_noc; + codec_output->ddr_bw_rd += codec_output->ipb_rd_total_ddr; + + codec_output->bse_tlb_rd_noc = + ((bse_tlb_byte_per_lcu * lcu_per_frame * codec_input.frame_rate + 999) + / 1000 + 999) / 1000; + + if (llc_enabled_bse_tlb) /* TODO should be common declaration */ + codec_output->bse_tlb_rd_ddr = 0; + else + codec_output->bse_tlb_rd_ddr = codec_output->bse_tlb_rd_noc; + + codec_output->bse_tlb_wr_noc = codec_output->bse_tlb_rd_noc; + + if (llc_enabled_bse_tlb) + codec_output->bse_tlb_wr_ddr = 0; + else + codec_output->bse_tlb_wr_ddr = codec_output->bse_tlb_wr_noc; + + /* accumulation */ + codec_output->noc_bw_rd += codec_output->bse_tlb_rd_noc; + codec_output->ddr_bw_rd += codec_output->bse_tlb_rd_ddr; + codec_output->noc_bw_wr += codec_output->bse_tlb_wr_noc; + codec_output->ddr_bw_wr += codec_output->bse_tlb_wr_ddr; + + codec_output->mmu_rd_ddr = 0; + codec_output->mmu_rd_noc = 0; + /* accumulation */ + codec_output->noc_bw_rd += codec_output->mmu_rd_noc; + codec_output->ddr_bw_rd += codec_output->mmu_rd_ddr; + + return 0; +} + +int msm_vidc_calculate_bandwidth(struct api_calculation_input codec_input, + struct api_calculation_bw_output *codec_output) +{ + int rc = 0; + + if (codec_input.decoder_or_encoder == CODEC_DECODER) { + rc = calculate_bandwidth_decoder_iris3(codec_input, codec_output); + } else if (codec_input.decoder_or_encoder == CODEC_ENCODER) { + rc = calculate_bandwidth_encoder_iris3(codec_input, codec_output); + } else { + d_vpr_e("%s: invalid codec\n", codec_input.decoder_or_encoder); + return -EINVAL; + } + + return rc; +} \ No newline at end of file diff --git a/driver/variant/iris33/src/msm_vidc_clock_iris33.c b/driver/variant/iris33/src/msm_vidc_clock_iris33.c new file mode 100644 index 0000000000..b09be23775 --- /dev/null +++ b/driver/variant/iris33/src/msm_vidc_clock_iris33.c @@ -0,0 +1,548 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include "pineapple_technology.h" +#include "msm_vidc_debug.h" + +static u32 calculate_number_mbs_pineapple(u32 width, u32 height, u32 lcu_size) +{ + u32 mbs_width = (width % lcu_size) ? + (width / lcu_size + 1) : (width / lcu_size); + + u32 mbs_height = (height % lcu_size) ? + (height / lcu_size + 1) : (height / lcu_size); + + return mbs_width * mbs_height * (lcu_size / 16) * (lcu_size / 16); +} + +static int initialize_encoder_complexity_table(void) +{ + /* Beging Calculate Encoder GOP Complexity Table and HW Floor numbers */ + codec_encoder_gop_complexity_table_fp + [CODEC_GOP_I3B4b1P][CODEC_ENCODER_GOP_Bb_ENTRY] = 70000; + + codec_encoder_gop_complexity_table_fp + [CODEC_GOP_I3B4b1P][CODEC_ENCODER_GOP_P_ENTRY] = 10000; + + codec_encoder_gop_complexity_table_fp + [CODEC_GOP_I3B4b1P][CODEC_ENCODER_GOP_FACTORY_ENTRY] = + (codec_encoder_gop_complexity_table_fp + [CODEC_GOP_I3B4b1P][CODEC_ENCODER_GOP_Bb_ENTRY] * 150 + + codec_encoder_gop_complexity_table_fp + [CODEC_GOP_I3B4b1P][CODEC_ENCODER_GOP_P_ENTRY] * 100); + + codec_encoder_gop_complexity_table_fp + [CODEC_GOP_I3B4b1P][CODEC_ENCODER_GOP_FACTORY_ENTRY] = + codec_encoder_gop_complexity_table_fp + [CODEC_GOP_I3B4b1P][CODEC_ENCODER_GOP_FACTORY_ENTRY] + + (codec_encoder_gop_complexity_table_fp + [CODEC_GOP_I3B4b1P][CODEC_ENCODER_GOP_Bb_ENTRY] + + codec_encoder_gop_complexity_table_fp + [CODEC_GOP_I3B4b1P][CODEC_ENCODER_GOP_P_ENTRY] - 1); + + codec_encoder_gop_complexity_table_fp + [CODEC_GOP_I3B4b1P][CODEC_ENCODER_GOP_FACTORY_ENTRY] = + codec_encoder_gop_complexity_table_fp + [CODEC_GOP_I3B4b1P][CODEC_ENCODER_GOP_FACTORY_ENTRY] / + (codec_encoder_gop_complexity_table_fp + [CODEC_GOP_I3B4b1P][CODEC_ENCODER_GOP_Bb_ENTRY] + + codec_encoder_gop_complexity_table_fp + [CODEC_GOP_I3B4b1P][CODEC_ENCODER_GOP_P_ENTRY]); + + codec_encoder_gop_complexity_table_fp + [CODEC_GOP_I1B2b1P][CODEC_ENCODER_GOP_Bb_ENTRY] = 30000; + + codec_encoder_gop_complexity_table_fp + [CODEC_GOP_I1B2b1P][CODEC_ENCODER_GOP_P_ENTRY] = 10000; + + codec_encoder_gop_complexity_table_fp + [CODEC_GOP_I1B2b1P][CODEC_ENCODER_GOP_FACTORY_ENTRY] = + (codec_encoder_gop_complexity_table_fp + [CODEC_GOP_I1B2b1P][CODEC_ENCODER_GOP_Bb_ENTRY] * 150 + + codec_encoder_gop_complexity_table_fp + [CODEC_GOP_I1B2b1P][CODEC_ENCODER_GOP_P_ENTRY] * 100); + + codec_encoder_gop_complexity_table_fp + [CODEC_GOP_I1B2b1P][CODEC_ENCODER_GOP_FACTORY_ENTRY] = + codec_encoder_gop_complexity_table_fp + [CODEC_GOP_I1B2b1P][CODEC_ENCODER_GOP_FACTORY_ENTRY] + + (codec_encoder_gop_complexity_table_fp + [CODEC_GOP_I1B2b1P][CODEC_ENCODER_GOP_Bb_ENTRY] + + codec_encoder_gop_complexity_table_fp + [CODEC_GOP_I1B2b1P][CODEC_ENCODER_GOP_P_ENTRY] - 1); + + codec_encoder_gop_complexity_table_fp + [CODEC_GOP_I1B2b1P][CODEC_ENCODER_GOP_FACTORY_ENTRY] = + codec_encoder_gop_complexity_table_fp + [CODEC_GOP_I1B2b1P][CODEC_ENCODER_GOP_FACTORY_ENTRY] / + (codec_encoder_gop_complexity_table_fp + [CODEC_GOP_I1B2b1P][CODEC_ENCODER_GOP_Bb_ENTRY] + + codec_encoder_gop_complexity_table_fp + [CODEC_GOP_I1B2b1P][CODEC_ENCODER_GOP_P_ENTRY]); + + codec_encoder_gop_complexity_table_fp + [CODEC_GOP_IbP][CODEC_ENCODER_GOP_Bb_ENTRY] = 10000; + + codec_encoder_gop_complexity_table_fp + [CODEC_GOP_IbP][CODEC_ENCODER_GOP_P_ENTRY] = 10000; + + codec_encoder_gop_complexity_table_fp + [CODEC_GOP_IbP][CODEC_ENCODER_GOP_FACTORY_ENTRY] = + (codec_encoder_gop_complexity_table_fp + [CODEC_GOP_IbP][CODEC_ENCODER_GOP_Bb_ENTRY] * 150 + + codec_encoder_gop_complexity_table_fp + [CODEC_GOP_IbP][CODEC_ENCODER_GOP_P_ENTRY] * 100); + + codec_encoder_gop_complexity_table_fp + [CODEC_GOP_IbP][CODEC_ENCODER_GOP_FACTORY_ENTRY] = + codec_encoder_gop_complexity_table_fp + [CODEC_GOP_IbP][CODEC_ENCODER_GOP_FACTORY_ENTRY] + + (codec_encoder_gop_complexity_table_fp + [CODEC_GOP_IbP][CODEC_ENCODER_GOP_Bb_ENTRY] + + codec_encoder_gop_complexity_table_fp + [CODEC_GOP_IbP][CODEC_ENCODER_GOP_P_ENTRY] - 1); + + codec_encoder_gop_complexity_table_fp + [CODEC_GOP_IbP][CODEC_ENCODER_GOP_FACTORY_ENTRY] = + codec_encoder_gop_complexity_table_fp + [CODEC_GOP_IbP][CODEC_ENCODER_GOP_FACTORY_ENTRY] / + (codec_encoder_gop_complexity_table_fp + [CODEC_GOP_IbP][CODEC_ENCODER_GOP_Bb_ENTRY] + + codec_encoder_gop_complexity_table_fp + [CODEC_GOP_IbP][CODEC_ENCODER_GOP_P_ENTRY]); + + codec_encoder_gop_complexity_table_fp + [CODEC_GOP_IPP][CODEC_ENCODER_GOP_Bb_ENTRY] = 0; + + codec_encoder_gop_complexity_table_fp + [CODEC_GOP_IPP][CODEC_ENCODER_GOP_P_ENTRY] = 1; + + codec_encoder_gop_complexity_table_fp + [CODEC_GOP_IPP][CODEC_ENCODER_GOP_FACTORY_ENTRY] = + (codec_encoder_gop_complexity_table_fp + [CODEC_GOP_IPP][CODEC_ENCODER_GOP_Bb_ENTRY] * 150 + + codec_encoder_gop_complexity_table_fp + [CODEC_GOP_IPP][CODEC_ENCODER_GOP_P_ENTRY] * 100); + + codec_encoder_gop_complexity_table_fp + [CODEC_GOP_IPP][CODEC_ENCODER_GOP_FACTORY_ENTRY] = + codec_encoder_gop_complexity_table_fp + [CODEC_GOP_IPP][CODEC_ENCODER_GOP_FACTORY_ENTRY] + + (codec_encoder_gop_complexity_table_fp + [CODEC_GOP_IPP][CODEC_ENCODER_GOP_Bb_ENTRY] + + codec_encoder_gop_complexity_table_fp + [CODEC_GOP_IPP][CODEC_ENCODER_GOP_P_ENTRY] - 1); + + codec_encoder_gop_complexity_table_fp + [CODEC_GOP_IPP][CODEC_ENCODER_GOP_FACTORY_ENTRY] = + codec_encoder_gop_complexity_table_fp + [CODEC_GOP_IPP][CODEC_ENCODER_GOP_FACTORY_ENTRY] / + (codec_encoder_gop_complexity_table_fp + [CODEC_GOP_IPP][CODEC_ENCODER_GOP_Bb_ENTRY] + + codec_encoder_gop_complexity_table_fp + [CODEC_GOP_IPP][CODEC_ENCODER_GOP_P_ENTRY]); + + return 0; +} + +u32 get_bitrate_entry(u32 pixle_count) +{ + u32 bitrate_entry = 0; + + if (pixle_count >= fp_pixel_count_bar1) + bitrate_entry = 1; + else if (pixle_count >= fp_pixel_count_bar2) + bitrate_entry = 2; + else if (pixle_count >= fp_pixel_count_bar3) + bitrate_entry = 3; + else if (pixle_count >= fp_pixel_count_bar4) + bitrate_entry = 4; + else if (pixle_count >= fp_pixel_count_bar5) + bitrate_entry = 5; + else if (pixle_count >= fp_pixel_count_bar6) + bitrate_entry = 6; + else if (pixle_count >= fp_pixel_count_bar7) + bitrate_entry = 7; + else if (pixle_count >= fp_pixel_count_bar8) + bitrate_entry = 8; + else if (pixle_count >= fp_pixel_count_bar9) + bitrate_entry = 9; + else + bitrate_entry = 9; + + return bitrate_entry; +} + +static int calculate_vsp_min_freq(struct api_calculation_input codec_input, + struct api_calculation_freq_output *codec_output) +{ + /* + * VSP calculation + * different methodology from Lahaina + */ + u32 vsp_hw_min_frequency = 0; + /* UInt32 decoder_vsp_fw_overhead = 100 + 5; // amplified by 100x */ + u32 fw_sw_vsp_offset = 1000 + 55; /* amplified by 1000x */ + + /* + * Ignore fw_sw_vsp_offset, as this is baked into the reference bitrate tables. + * As a consequence remove x1000 multipler as well. + */ + u32 codec = codec_input.codec; + /* UInt32 *bitratetable; */ + u32 pixle_count = codec_input.frame_width * + codec_input.frame_height * codec_input.frame_rate; + + u8 bitrate_entry = get_bitrate_entry(pixle_count); /* TODO EXTRACT */ + + input_bitrate_fp = ((u32)(codec_input.bitrate_mbps * 100 + 99)) / 100; + vsp_hw_min_frequency = frequency_table_pineapple[0][1] * input_bitrate_fp * 1000; + + /* 8KUHD60fps with B frame */ + if ((pixle_count >= fp_pixel_count_bar0) && + (codec_input.hierachical_layer != CODEC_GOP_IPP)) { + /* + * FORMULA: VSPfreq = NOMINAL * (InputBitrate / ReferenceBitrate); + * ReferenceBitrate = 0 for, + * - 1Stage TURBO, all Codecs. + * - 2Stage TURBO, H264 & H265. + * + * 8KUHD60fps with B frame + * - bitrate_entry = 0 + * - Clock=NOMINAL for H264 & 2Stage H265. Because bitrate table entry for TURBO is 0. + * + * TODO : Reduce these conditions by removing the zero entries from Bitrate table. + */ + vsp_hw_min_frequency = frequency_table_pineapple[0][1] * + input_bitrate_fp * 1000; + + if (codec_input.codec == CODEC_AV1) + vsp_hw_min_frequency = frequency_table_pineapple[0][0] * + input_bitrate_fp * 1000; + + if ((codec_input.codec == CODEC_H264) || + (codec_input.codec == CODEC_H264_CAVLC) || + ((codec_input.codec == CODEC_HEVC) && + (codec_input.vsp_vpp_mode == CODEC_VSPVPP_MODE_1S))) { + vsp_hw_min_frequency = + DIV_ROUND_UP(frequency_table_pineapple[0][1], fw_sw_vsp_offset); + } else if (((codec_input.codec == CODEC_HEVC) && + (codec_input.vsp_vpp_mode == CODEC_VSPVPP_MODE_2S)) + || (codec_input.codec == CODEC_VP9) + || (codec_input.codec == CODEC_AV1)) { + if (codec_input.vsp_vpp_mode == CODEC_VSPVPP_MODE_2S) { + vsp_hw_min_frequency = DIV_ROUND_UP(vsp_hw_min_frequency, + (bitrate_table_pineapple_2stage_fp[codec][0] * fw_sw_vsp_offset)); + } else { + vsp_hw_min_frequency = DIV_ROUND_UP(vsp_hw_min_frequency, + (bitrate_table_pineapple_1stage_fp[codec][0] * fw_sw_vsp_offset)); + } + } + } else { + vsp_hw_min_frequency = frequency_table_pineapple[0][1] * + input_bitrate_fp * 1000; + + if (codec_input.codec == CODEC_AV1 && bitrate_entry == 1) + vsp_hw_min_frequency = frequency_table_pineapple[0][0] * + input_bitrate_fp * 1000; + + if ((codec_input.codec == CODEC_H264_CAVLC) && + (codec_input.entropy_coding_mode == CODEC_ENTROPY_CODING_CAVLC)) + codec = CODEC_H264_CAVLC; + else if ((codec_input.codec == CODEC_H264) && + (codec_input.entropy_coding_mode == CODEC_ENTROPY_CODING_CABAC)) + codec = CODEC_H264; + + if (codec_input.vsp_vpp_mode == CODEC_VSPVPP_MODE_2S) + vsp_hw_min_frequency = DIV_ROUND_UP(vsp_hw_min_frequency, + (bitrate_table_pineapple_2stage_fp[codec][bitrate_entry]) * + fw_sw_vsp_offset); + else + vsp_hw_min_frequency = DIV_ROUND_UP(vsp_hw_min_frequency, + (bitrate_table_pineapple_1stage_fp[codec][bitrate_entry]) * + fw_sw_vsp_offset); + } + + codec_output->vsp_min_freq = vsp_hw_min_frequency; + return 0; +} + +static u32 calculate_pipe_penalty(struct api_calculation_input codec_input) +{ + u32 pipe_penalty_codec = 0; + u8 avid_commercial_content = 0; + u32 pixel_count = 0; + + /* decoder */ + if (codec_input.decoder_or_encoder == CODEC_DECODER) { + pipe_penalty_codec = pipe_penalty_pineapple[0][0]; + avid_commercial_content = codec_input.av1d_commer_tile_enable; + if (codec_input.codec == CODEC_AV1) { + pixel_count = codec_input.frame_width * codec_input.frame_height; + if (pixel_count <= 1920 * 1080) + pipe_penalty_codec = + pipe_penalty_pineapple[avid_commercial_content + 1][0]; + else if (pixel_count < 3840 * 2160) + pipe_penalty_codec = + (pipe_penalty_pineapple[avid_commercial_content + 1][0] + + pipe_penalty_pineapple[avid_commercial_content + 1][1]) / 2; + else if ((pixel_count == 3840 * 2160) || + (pixel_count == 4096 * 2160) || (pixel_count == 4096 * 2304)) + pipe_penalty_codec = pipe_penalty_pineapple[avid_commercial_content + 1][1]; + else if (pixel_count < 7680 * 4320) + pipe_penalty_codec = + (pipe_penalty_pineapple[avid_commercial_content + 1][1] + + pipe_penalty_pineapple[avid_commercial_content + 1][2]) / 2; + else + pipe_penalty_codec = + pipe_penalty_pineapple[avid_commercial_content + 1][2]; + } + } else { + pipe_penalty_codec = 101; + } + + return pipe_penalty_codec; +} + +static int calculate_vpp_min_freq(struct api_calculation_input codec_input, + struct api_calculation_freq_output *codec_output) +{ + u32 vpp_hw_min_frequency = 0; + u32 fmin = 0; + u32 tensilica_min_frequency = 0; + u32 decoder_vsp_fw_overhead = 100 + 5; /* amplified by 100x */ + /* UInt32 fw_sw_vsp_offset = 1000 + 55; amplified by 1000x */ + /* TODO from calculate_sw_vsp_min_freq */ + u32 vsp_hw_min_frequency = codec_output->vsp_min_freq; + u32 pipe_penalty_codec = 0; + u32 fmin_fwoverhead105 = 0; + u32 fmin_measured_fwoverhead = 0; + u32 lpmode_uhd_cycle_permb = 0; + u32 hqmode1080p_cycle_permb = 0; + u32 encoder_vpp_target_clk_per_mb = 0; + + codec_mbspersession_pineaple = + calculate_number_mbs_pineapple(codec_input.frame_width, + codec_input.frame_height, codec_input.lcu_size) * + codec_input.frame_rate; + + /* Section 2. 0 VPP/VSP calculation */ + if (codec_input.decoder_or_encoder == CODEC_DECODER) { /* decoder */ + vpp_hw_min_frequency = ((decoder_vpp_target_clk_per_mb_pineapple) * + (codec_mbspersession_pineaple) + codec_input.pipe_num - 1) / + (codec_input.pipe_num); + + vpp_hw_min_frequency = (vpp_hw_min_frequency + 99999) / 1000000; + + if (codec_input.pipe_num > 1) { + pipe_penalty_codec = calculate_pipe_penalty(codec_input); + vpp_hw_min_frequency = (vpp_hw_min_frequency * + pipe_penalty_codec + 999) / 1000; + } + + if (codec_input.vsp_vpp_mode == CODEC_VSPVPP_MODE_2S) { + /* FW overhead, convert FW cycles to impact to one pipe */ + u64 decoder_vpp_fw_overhead = 0; + decoder_vpp_fw_overhead = + DIV_ROUND_UP((DECODER_VPP_FW_OVERHEAD_PINEAPPLE * 10 * + codec_input.frame_rate), 15); + + decoder_vpp_fw_overhead = + DIV_ROUND_UP((decoder_vpp_fw_overhead * 1000), + (codec_mbspersession_pineaple * + decoder_vpp_target_clk_per_mb_pineapple / codec_input.pipe_num)); + + decoder_vpp_fw_overhead += 1000; + decoder_vpp_fw_overhead = (decoder_vpp_fw_overhead < 1050) ? + 1050 : decoder_vpp_fw_overhead; + + /* VPP HW + FW */ + if (codec_input.linear_opb == 1 && codec_input.bitdepth == CODEC_BITDEPTH_10) + /* multiply by 1.20 for 10b case */ + decoder_vpp_fw_overhead = 1200 + decoder_vpp_fw_overhead - 1000; + + vpp_hw_min_frequency = (vpp_hw_min_frequency * + decoder_vpp_fw_overhead + 999) / 1000; + + /* VSP HW+FW */ + vsp_hw_min_frequency = + (vsp_hw_min_frequency * decoder_vsp_fw_overhead + 99) / 100; + + fmin = (vpp_hw_min_frequency > vsp_hw_min_frequency) ? + vpp_hw_min_frequency : vsp_hw_min_frequency; + } else { + /* 1-stage need SW cycles + FW cycles + HW time */ + if (codec_input.linear_opb == 1 && codec_input.bitdepth == CODEC_BITDEPTH_10) + /* multiply by 1.20 for 10b linear case */ + vpp_hw_min_frequency = + (vpp_hw_min_frequency * 1200 + 999) / 1000; + + /* + * HW time + * comment: 02/23/2021 SY: the bitrate is measured bitrate, + * the overlapping effect is already considered into bitrate. + * no need to add extra anymore + */ + fmin = (vpp_hw_min_frequency > vsp_hw_min_frequency) ? + vpp_hw_min_frequency : vsp_hw_min_frequency; + + /* FW time */ + fmin_fwoverhead105 = (fmin * 105 + 99) / 100; + fmin_measured_fwoverhead = fmin + + (((DECODER_VPPVSP1STAGE_FW_OVERHEAD_PINEAPPLE * + codec_input.frame_rate * 10 + 14) / 15 + 999) / 1000 + 999) / + 1000; + + fmin = (fmin_fwoverhead105 > fmin_measured_fwoverhead) ? + fmin_fwoverhead105 : fmin_measured_fwoverhead; + } + + tensilica_min_frequency = (DECODER_SW_OVERHEAD_PINEAPPLE * 10 + 14) / 15; + tensilica_min_frequency = (tensilica_min_frequency + 999) / 1000; + tensilica_min_frequency = tensilica_min_frequency * codec_input.frame_rate; + tensilica_min_frequency = (tensilica_min_frequency + 999) / 1000; + fmin = (tensilica_min_frequency > fmin) ? tensilica_min_frequency : fmin; + } else { /* encoder */ + /* Decide LP/HQ */ + u8 hq_mode = 0; + if (codec_input.pipe_num > 1) + if (codec_input.frame_width * codec_input.frame_height <= + 1920 * 1080) + if (codec_input.frame_width * codec_input.frame_height * + codec_input.frame_rate <= 1920 * 1080 * 60) + hq_mode = 1; + + codec_output->enc_hqmode = hq_mode; + + /* Section 1. 0 */ + /* TODO ONETIME call, should be in another place. */ + initialize_encoder_complexity_table(); + + /* End Calculate Encoder GOP Complexity Table */ + + /* VPP base cycle */ + lpmode_uhd_cycle_permb = (320 * + codec_encoder_gop_complexity_table_fp + [codec_input.hierachical_layer][CODEC_ENCODER_GOP_FACTORY_ENTRY] + + 99) / 100; + + if ((codec_input.frame_width == 1920) && + ((codec_input.frame_height == 1080) || + (codec_input.frame_height == 1088)) && + (codec_input.frame_rate >= 480)) + lpmode_uhd_cycle_permb = (90 * 4 * + codec_encoder_gop_complexity_table_fp + [codec_input.hierachical_layer][CODEC_ENCODER_GOP_FACTORY_ENTRY] + + 99) / 100; + + if ((codec_input.frame_width == 1280) && + ((codec_input.frame_height == 720) || + (codec_input.frame_height == 768)) && + (codec_input.frame_rate >= 960)) + lpmode_uhd_cycle_permb = (99 * 4 * + codec_encoder_gop_complexity_table_fp + [codec_input.hierachical_layer][CODEC_ENCODER_GOP_FACTORY_ENTRY] + + 99) / 100; + + hqmode1080p_cycle_permb = (675 * + codec_encoder_gop_complexity_table_fp + [codec_input.hierachical_layer][CODEC_ENCODER_GOP_FACTORY_ENTRY] + + 99) / 100; + + encoder_vpp_target_clk_per_mb = (hq_mode) ? + hqmode1080p_cycle_permb : lpmode_uhd_cycle_permb; + + vpp_hw_min_frequency = ((encoder_vpp_target_clk_per_mb) * + (codec_mbspersession_pineaple) + codec_input.pipe_num - 1) / + (codec_input.pipe_num); + + vpp_hw_min_frequency = (vpp_hw_min_frequency + 99999) / 1000000; + + if (codec_input.pipe_num > 1) { + u32 pipe_penalty_codec = 101; + vpp_hw_min_frequency = (vpp_hw_min_frequency * + pipe_penalty_codec + 99) / 100; + } + + if (codec_input.vsp_vpp_mode == CODEC_VSPVPP_MODE_2S) { + /* FW overhead, convert FW cycles to impact to one pipe */ + u64 encoder_vpp_fw_overhead = 0; + + encoder_vpp_fw_overhead = + DIV_ROUND_UP((ENCODER_VPP_FW_OVERHEAD_PINEAPPLE * 10 * + codec_input.frame_rate), 15); + + encoder_vpp_fw_overhead = + DIV_ROUND_UP((encoder_vpp_fw_overhead * 1000), + (codec_mbspersession_pineaple * encoder_vpp_target_clk_per_mb / + codec_input.pipe_num)); + + encoder_vpp_fw_overhead += 1000; + + encoder_vpp_fw_overhead = (encoder_vpp_fw_overhead < 1050) ? + 1050 : encoder_vpp_fw_overhead; + + /* VPP HW + FW */ + vpp_hw_min_frequency = (vpp_hw_min_frequency * + encoder_vpp_fw_overhead + 999) / 1000; + + /* TODO : decoder_vsp_fw_overhead? */ + vsp_hw_min_frequency = (vsp_hw_min_frequency * + decoder_vsp_fw_overhead + 99) / 100; + + fmin = (vpp_hw_min_frequency > vsp_hw_min_frequency) ? + vpp_hw_min_frequency : vsp_hw_min_frequency; + } else { + /* HW time */ + fmin = (vpp_hw_min_frequency > vsp_hw_min_frequency) ? + vpp_hw_min_frequency : vsp_hw_min_frequency; + + /* FW time */ + fmin_fwoverhead105 = (fmin * 105 + 99) / 100; + fmin_measured_fwoverhead = fmin + + (((DECODER_VPPVSP1STAGE_FW_OVERHEAD_PINEAPPLE * + codec_input.frame_rate * 10 + 14) / 15 + 999) / + 1000 + 999) / 1000; + + fmin = (fmin_fwoverhead105 > fmin_measured_fwoverhead) ? + fmin_fwoverhead105 : fmin_measured_fwoverhead; + /* SW time */ + } + + tensilica_min_frequency = (ENCODER_SW_OVERHEAD_PINEAPPLE * 10 + 14) / 15; + tensilica_min_frequency = (tensilica_min_frequency + 999) / 1000; + + tensilica_min_frequency = tensilica_min_frequency * + codec_input.frame_rate; + + tensilica_min_frequency = (tensilica_min_frequency + 999) / 1000; + + fmin = (tensilica_min_frequency > fmin) ? + tensilica_min_frequency : fmin; + } + + codec_output->vpp_min_freq = vpp_hw_min_frequency; + codec_output->vsp_min_freq = vsp_hw_min_frequency; + codec_output->tensilica_min_freq = tensilica_min_frequency; + codec_output->hw_min_freq = fmin; + + return 0; +} + +int msm_vidc_calculate_frequency(struct api_calculation_input codec_input, + struct api_calculation_freq_output *codec_output) +{ + int rc = 0; + + rc = calculate_vsp_min_freq(codec_input, codec_output); + if (rc) + return rc; + + rc = calculate_vpp_min_freq(codec_input, codec_output); + if (rc) + return rc; + + return rc; +} \ No newline at end of file diff --git a/driver/variant/iris33/src/msm_vidc_power_iris33.c b/driver/variant/iris33/src/msm_vidc_power_iris33.c index 6695bd3c7f..77b6516f7c 100644 --- a/driver/variant/iris33/src/msm_vidc_power_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_power_iris33.c @@ -9,8 +9,373 @@ #include "msm_vidc_inst.h" #include "msm_vidc_core.h" #include "msm_vidc_debug.h" +#include "perf_static_model.h" +#include "msm_vidc_power.h" + +static u64 __calculate_decoder(struct vidc_bus_vote_data *d); +static u64 __calculate_encoder(struct vidc_bus_vote_data *d); +static u64 __calculate(struct msm_vidc_inst* inst, struct vidc_bus_vote_data *d); +static u64 msm_vidc_calc_freq_iris33_legacy(struct msm_vidc_inst *inst, u32 data_size); + +static int msm_vidc_init_codec_input_freq(struct msm_vidc_inst *inst, u32 data_size, + struct api_calculation_input *codec_input) +{ + enum msm_vidc_port_type port; + u32 color_fmt; + + if (inst->domain == MSM_VIDC_ENCODER) { + codec_input->decoder_or_encoder = CODEC_ENCODER; + } else if (inst->domain == MSM_VIDC_DECODER) { + codec_input->decoder_or_encoder = CODEC_DECODER; + } else { + d_vpr_e("%s: invalid domain %d\n", __func__, inst->domain); + return -EINVAL; + } + + codec_input->chipset_gen = MSM_PINEAPPLE; + + if (inst->codec == MSM_VIDC_H264) { + codec_input->codec = CODEC_H264; + codec_input->lcu_size = 16; + if (inst->capabilities->cap[ENTROPY_MODE].value == + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC) + codec_input->entropy_coding_mode = CODEC_ENTROPY_CODING_CABAC; + else + codec_input->entropy_coding_mode = CODEC_ENTROPY_CODING_CAVLC; + } else if (inst->codec == MSM_VIDC_HEVC) { + codec_input->codec = CODEC_HEVC; + codec_input->lcu_size = 32; + } else if (inst->codec == MSM_VIDC_VP9) { + codec_input->codec = CODEC_VP9; + codec_input->lcu_size = 16; + } else if (inst->codec == MSM_VIDC_AV1) { + codec_input->codec = CODEC_AV1; + codec_input->lcu_size = 32; + } else { + d_vpr_e("%s: invalid codec %d\n", __func__, inst->codec); + return -EINVAL; + } + + codec_input->pipe_num = inst->capabilities->cap[PIPE].value; + codec_input->frame_rate = inst->max_rate; + + port = inst->domain == MSM_VIDC_DECODER ? INPUT_PORT : OUTPUT_PORT; + codec_input->frame_width = inst->fmts[port].fmt.pix_mp.width; + codec_input->frame_height = inst->fmts[port].fmt.pix_mp.height; + + if (inst->capabilities->cap[STAGE].value == MSM_VIDC_STAGE_1) { + codec_input->vsp_vpp_mode = CODEC_VSPVPP_MODE_1S; + } else if (inst->capabilities->cap[STAGE].value == MSM_VIDC_STAGE_2) { + codec_input->vsp_vpp_mode = CODEC_VSPVPP_MODE_2S; + } else { + d_vpr_e("%s: invalid stage %d\n", __func__, + inst->capabilities->cap[STAGE].value); + return -EINVAL; + } + + if (inst->capabilities->cap[BIT_DEPTH].value == BIT_DEPTH_8) + codec_input->bitdepth = CODEC_BITDEPTH_8; + else + codec_input->bitdepth = CODEC_BITDEPTH_10; + + /* + * Used for calculating Encoder GOP Complexity + * hierachical_layer=0..7 used as Array Index + * inst->capabilities->cap[B_FRAME].value=[ 0 1 2 ] + * TODO how to map? + */ + + /* set as IPP */ + codec_input->hierachical_layer = 0; + + if (inst->domain == MSM_VIDC_DECODER) + color_fmt = v4l2_colorformat_to_driver(inst, + inst->fmts[OUTPUT_PORT].fmt.pix_mp.pixelformat, __func__); + else + color_fmt = v4l2_colorformat_to_driver(inst, + inst->fmts[INPUT_PORT].fmt.pix_mp.pixelformat, __func__); + + codec_input->linear_opb = is_linear_colorformat(color_fmt); + codec_input->bitrate_mbps = + (codec_input->frame_rate * data_size * 8) / 1000000; + + /* disable av1d commercial tile */ + codec_input->av1d_commer_tile_enable = 0; + /* set as sanity mode */ + codec_input->regression_mode = 1; + + return 0; +} + +static int msm_vidc_init_codec_input_bus(struct msm_vidc_inst *inst, struct vidc_bus_vote_data *d, + struct api_calculation_input *codec_input) +{ + u32 complexity_factor_int = 0, complexity_factor_frac = 0; + bool opb_compression_enabled = false; + + if (!d) + return -EINVAL; + + if (d->domain == MSM_VIDC_ENCODER) { + codec_input->decoder_or_encoder = CODEC_ENCODER; + } else if (d->domain == MSM_VIDC_DECODER) { + codec_input->decoder_or_encoder = CODEC_DECODER; + } else { + d_vpr_e("%s: invalid domain %d\n", __func__, d->domain); + return -EINVAL; + } + + codec_input->chipset_gen = MSM_PINEAPPLE; + + if (d->codec == MSM_VIDC_H264) { + codec_input->codec = CODEC_H264; + } else if (d->codec == MSM_VIDC_HEVC) { + codec_input->codec = CODEC_HEVC; + } else if (d->codec == MSM_VIDC_VP9) { + codec_input->codec = CODEC_VP9; + } else if (d->codec == MSM_VIDC_AV1) { + codec_input->codec = CODEC_AV1; + } else { + d_vpr_e("%s: invalid codec %d\n", __func__, d->codec); + return -EINVAL; + } + + codec_input->lcu_size = d->lcu_size; + codec_input->pipe_num = d->num_vpp_pipes; + codec_input->frame_rate = d->fps; + codec_input->frame_width = d->input_width; + codec_input->frame_height = d->input_height; + + if (d->work_mode == MSM_VIDC_STAGE_1) { + codec_input->vsp_vpp_mode = CODEC_VSPVPP_MODE_1S; + } else if (d->work_mode == MSM_VIDC_STAGE_2) { + codec_input->vsp_vpp_mode = CODEC_VSPVPP_MODE_2S; + } else { + d_vpr_e("%s: invalid stage %d\n", __func__, d->work_mode); + return -EINVAL; + } + + if (inst->capabilities->cap[ENTROPY_MODE].value == + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC) { + codec_input->entropy_coding_mode = CODEC_ENTROPY_CODING_CABAC; + } else if (inst->capabilities->cap[ENTROPY_MODE].value == + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC) { + codec_input->entropy_coding_mode = CODEC_ENTROPY_CODING_CAVLC; + } else { + d_vpr_e("%s: invalid entropy %d\n", __func__, + inst->capabilities->cap[ENTROPY_MODE].value); + return -EINVAL; + } + + /* + * Used for calculating Encoder GOP Complexity + * hierachical_layer=0..7 used as Array Index + * TODO how to map? + */ + codec_input->hierachical_layer = 0; /* set as IPP */ + + /* + * If the calculated motion_vector_complexity is > 2 then set the + * complexity_setting and refframe_complexity to be pwc(performance worst case) + * values. If the motion_vector_complexity is < 2 then set the complexity_setting + * and refframe_complexity to be average case values. + */ + + complexity_factor_int = Q16_INT(d->complexity_factor); + complexity_factor_frac = Q16_FRAC(d->complexity_factor); + + if (complexity_factor_int < COMPLEXITY_THRESHOLD || + (complexity_factor_int == COMPLEXITY_THRESHOLD && + complexity_factor_frac == 0)) { + /* set as average case values */ + codec_input->complexity_setting = COMPLEXITY_SETTING_AVG; + codec_input->refframe_complexity = REFFRAME_COMPLEXITY_AVG; + } else { + /* set as pwc */ + codec_input->complexity_setting = COMPLEXITY_SETTING_PWC; + codec_input->refframe_complexity = REFFRAME_COMPLEXITY_PWC; + } + + codec_input->status_llc_onoff = d->use_sys_cache; + + if (__bpp(d->color_formats[0]) == 8) + codec_input->bitdepth = CODEC_BITDEPTH_8; + else + codec_input->bitdepth = CODEC_BITDEPTH_10; + + if (d->num_formats == 1) { + codec_input->split_opb = 0; + codec_input->linear_opb = !__ubwc(d->color_formats[0]); + } else if (d->num_formats == 2) { + codec_input->split_opb = 1; + codec_input->linear_opb = !__ubwc(d->color_formats[1]); + } else { + d_vpr_e("%s: invalid num_formats %d\n", + __func__, d->num_formats); + return -EINVAL; + } + + codec_input->linear_ipb = 0; /* set as ubwc ipb */ + + /* TODO Confirm if we always LOSSLESS mode ie lossy_ipb = 0*/ + codec_input->lossy_ipb = 0; /* set as lossless ipb */ + + /* TODO Confirm if no multiref */ + codec_input->encoder_multiref = 0; /* set as no multiref */ + codec_input->bitrate_mbps = (d->bitrate / 1000000); /* bps 10; set as 10mbps */ + + opb_compression_enabled = d->num_formats >= 2 && __ubwc(d->color_formats[1]); + + /* ANDROID CR is in Q16 format, StaticModel CR in x100 format */ + codec_input->cr_dpb = ((Q16_INT(d->compression_ratio)*100) + + Q16_FRAC(d->compression_ratio)); + + codec_input->cr_opb = opb_compression_enabled ? + codec_input->cr_dpb : FP_ONE; + + codec_input->cr_ipb = ((Q16_INT(d->input_cr)*100) + Q16_FRAC(d->input_cr)); + codec_input->cr_rpb = codec_input->cr_dpb; /* cr_rpb ony for encoder */ + + /* disable by default, only enable for aurora depth map session */ + codec_input->lumaonly_decode = 0; + /* TODO: disable av1d commercial tile */ + codec_input->av1d_commer_tile_enable = 0; + /* set as custom regression mode, as are using cr,cf values from FW */ + codec_input->regression_mode = REGRESSION_MODE_CUSTOM; + + + /* Dump all the variables for easier debugging */ + if (msm_vidc_debug & VIDC_BUS) { + struct dump dump[] = { + {"complexity_factor_int", "%d", complexity_factor_int}, + {"complexity_factor_frac", "%d", complexity_factor_frac}, + {"refframe_complexity", "%d", codec_input->refframe_complexity}, + {"complexity_setting", "%d", codec_input->complexity_setting}, + {"cr_dpb", "%d", codec_input->cr_dpb}, + {"cr_opb", "%d", codec_input->cr_opb}, + {"cr_ipb", "%d", codec_input->cr_ipb}, + {"cr_rpb", "%d", codec_input->cr_rpb}, + {"lcu size", "%d", codec_input->lcu_size}, + {"pipe number", "%d", codec_input->pipe_num}, + {"frame_rate", "%d", codec_input->frame_rate}, + {"frame_width", "%d", codec_input->frame_width}, + {"frame_height", "%d", codec_input->frame_height}, + {"work_mode","%d", d->work_mode}, + {"encoder_or_decode", "%d", inst->domain}, + {"chipset_gen", "%d", codec_input->chipset_gen}, + {"codec_input", "%d", codec_input->codec}, + {"entropy_coding_mode", "%d", codec_input->entropy_coding_mode}, + {"hierachical_layer", "%d", codec_input->hierachical_layer}, + {"status_llc_onoff", "%d", codec_input->status_llc_onoff}, + {"bit_depth", "%d", codec_input->bitdepth}, + {"split_opb", "%d", codec_input->split_opb}, + {"linear_opb", "%d", codec_input->linear_opb}, + {"linear_ipb", "%d", codec_input->linear_ipb}, + {"lossy_ipb", "%d", codec_input->lossy_ipb}, + {"encoder_multiref", "%d", codec_input->encoder_multiref}, + {"bitrate_mbps", "%d", codec_input->bitrate_mbps}, + {"lumaonly_decode", "%d", codec_input->lumaonly_decode}, + {"av1d_commer_tile_enable", "%d", codec_input->av1d_commer_tile_enable}, + {"regression_mode", "%d", codec_input->regression_mode}, + }; + __dump(dump, ARRAY_SIZE(dump)); + } + + return 0; +} + +static u64 msm_vidc_calc_freq_iris33_new(struct msm_vidc_inst *inst, u32 data_size) +{ + u64 freq = 0; + struct msm_vidc_core* core; + int ret = 0; + struct api_calculation_input codec_input; + struct api_calculation_freq_output codec_output; + u32 fps, mbpf; + + if (!inst || !inst->core || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return freq; + } + + core = inst->core; + + mbpf = msm_vidc_get_mbs_per_frame(inst); + fps = inst->max_rate; + + memset(&codec_input, 0, sizeof(struct api_calculation_input)); + memset(&codec_output, 0, sizeof(struct api_calculation_freq_output)); + ret = msm_vidc_init_codec_input_freq(inst, data_size, &codec_input); + if (ret) + return freq; + ret = msm_vidc_calculate_frequency(codec_input, &codec_output); + if (ret) + return freq; + freq = codec_output.hw_min_freq * 1000000; /* Convert to Hz */ + + i_vpr_p(inst, "%s: filled len %d, required freq %llu, fps %u, mbpf %u\n", + __func__, data_size, freq, fps, mbpf); + + if (inst->codec == MSM_VIDC_AV1 || + (inst->iframe && is_hevc_10bit_decode_session(inst))) { + /* + * for AV1 or HEVC 10bit and iframe case only allow TURBO and + * limit to NOM for all other cases + */ + } else { + /* limit to NOM, index 0 is TURBO, index 1 is NOM clock rate */ + if (core->resource->freq_set.count >= 2 && + freq > core->resource->freq_set.freq_tbl[1].freq) + freq = core->resource->freq_set.freq_tbl[1].freq; + } + + return freq; +} + +static int msm_vidc_calc_bw_iris33_new(struct msm_vidc_inst *inst, + struct vidc_bus_vote_data *vidc_data) +{ + u32 ret = 0; + struct api_calculation_input codec_input; + struct api_calculation_bw_output codec_output; + + memset(&codec_input, 0, sizeof(struct api_calculation_input)); + memset(&codec_output, 0, sizeof(struct api_calculation_bw_output)); + + ret = msm_vidc_init_codec_input_bus(inst, vidc_data, &codec_input); + if (ret) + return ret; + ret = msm_vidc_calculate_bandwidth(codec_input, &codec_output); + if (ret) + return ret; + + vidc_data->calc_bw_ddr = kbps(codec_output.ddr_bw_rd + codec_output.ddr_bw_wr); + vidc_data->calc_bw_llcc = kbps(codec_output.noc_bw_rd + codec_output.noc_bw_wr); + + i_vpr_l(inst, "%s: calc_bw_ddr %lu calc_bw_llcc %lu", + __func__, vidc_data->calc_bw_ddr, vidc_data->calc_bw_llcc); + + return ret; +} u64 msm_vidc_calc_freq_iris33(struct msm_vidc_inst *inst, u32 data_size) +{ + u64 freq = 0; + + if (!inst || !inst->core || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return freq; + } + + if (ENABLE_LEGACY_POWER_CALCULATIONS) + freq = msm_vidc_calc_freq_iris33_legacy(inst, data_size); + else + freq = msm_vidc_calc_freq_iris33_new(inst, data_size); + + return freq; +} + +u64 msm_vidc_calc_freq_iris33_legacy(struct msm_vidc_inst *inst, u32 data_size) { u64 freq = 0; struct msm_vidc_core* core; @@ -28,7 +393,8 @@ u64 msm_vidc_calc_freq_iris33(struct msm_vidc_inst *inst, u32 data_size) } core = inst->core; - if (!core->resource || !core->resource->freq_set.freq_tbl) { + if (!core->resource || !core->resource->freq_set.freq_tbl || + !core->resource->freq_set.count) { d_vpr_e("%s: invalid params\n", __func__); return freq; } @@ -140,7 +506,7 @@ u64 msm_vidc_calc_freq_iris33(struct msm_vidc_inst *inst, u32 data_size) /* VSP */ if (inst->codec == MSM_VIDC_AV1) { /* - * For AV1: Use VSP calculations from Kalama perf model. + * For AV1: Use VSP calculations from Lanai perf model. * For legacy codecs, use vsp_cycles based on legacy MB_CYCLES_VSP. */ u32 decoder_vsp_fw_overhead = 105; @@ -801,7 +1167,10 @@ int msm_vidc_calc_bw_iris33(struct msm_vidc_inst *inst, if (!vidc_data) return value; - value = __calculate(inst, vidc_data); + if (ENABLE_LEGACY_POWER_CALCULATIONS) + value = __calculate(inst, vidc_data); + else + value = msm_vidc_calc_bw_iris33_new(inst, vidc_data); return value; -} +} \ No newline at end of file diff --git a/msm_video/Kbuild b/msm_video/Kbuild index 6eb67fcb65..3f3a17bf65 100644 --- a/msm_video/Kbuild +++ b/msm_video/Kbuild @@ -36,6 +36,8 @@ ifeq ($(CONFIG_MSM_VIDC_PINEAPPLE), y) msm_video-objs += $(VIDEO_DRIVER_REL_PATH)/platform/pineapple/src/msm_vidc_pineapple.o \ $(VIDEO_DRIVER_REL_PATH)/variant/iris33/src/msm_vidc_buffer_iris33.o \ $(VIDEO_DRIVER_REL_PATH)/variant/iris33/src/msm_vidc_power_iris33.o \ + $(VIDEO_DRIVER_REL_PATH)/variant/iris33/src/msm_vidc_bus_iris33.o \ + $(VIDEO_DRIVER_REL_PATH)/variant/iris33/src/msm_vidc_clock_iris33.o \ $(VIDEO_DRIVER_REL_PATH)/variant/iris33/src/msm_vidc_iris33.o endif ifeq ($(CONFIG_MSM_VIDC_KALAMA), y) diff --git a/video/Kbuild b/video/Kbuild index 2999a18b2b..aac7f52922 100644 --- a/video/Kbuild +++ b/video/Kbuild @@ -27,6 +27,8 @@ ifeq ($(CONFIG_MSM_VIDC_PINEAPPLE), y) video-objs += $(VIDEO_DRIVER_REL_PATH)/platform/pineapple/src/pineapple.o \ $(VIDEO_DRIVER_REL_PATH)/variant/iris33/src/msm_vidc_buffer_iris33.o \ $(VIDEO_DRIVER_REL_PATH)/variant/iris33/src/msm_vidc_power_iris33.o \ + $(VIDEO_DRIVER_REL_PATH)/variant/iris33/src/msm_vidc_bus_iris33.o \ + $(VIDEO_DRIVER_REL_PATH)/variant/iris33/src/msm_vidc_clock_iris33.o \ $(VIDEO_DRIVER_REL_PATH)/variant/iris33/src/msm_vidc_iris33.o endif video-objs += $(VIDEO_DRIVER_REL_PATH)/platform/common/src/msm_vidc_platform.o \ From 4a578d26fd17dfd7e1efd7b01bb4afa4a735229a Mon Sep 17 00:00:00 2001 From: Megha Byahatti Date: Fri, 24 Feb 2023 13:20:20 +0530 Subject: [PATCH 0834/1061] video: driver: Move adjust/set control_ext API's to common/platform_ext.h/.c Remove msm_vidc_control_ext.h/.c Change-Id: I5636705b38b7c5613baf8761953ae31963e6ffd3 Signed-off-by: Megha Byahatti --- .../common/inc/msm_vidc_platform_ext.h} | 4 ++-- .../common/src/msm_vidc_platform_ext.c} | 2 +- driver/platform/kalama/src/msm_vidc_kalama.c | 2 +- driver/platform/pineapple/src/msm_vidc_pineapple.c | 2 +- msm_video/Kbuild | 2 +- 5 files changed, 6 insertions(+), 6 deletions(-) rename driver/{vidc/inc/msm_vidc_control_ext.h => platform/common/inc/msm_vidc_platform_ext.h} (90%) rename driver/{vidc/src/msm_vidc_control_ext.c => platform/common/src/msm_vidc_platform_ext.c} (99%) diff --git a/driver/vidc/inc/msm_vidc_control_ext.h b/driver/platform/common/inc/msm_vidc_platform_ext.h similarity index 90% rename from driver/vidc/inc/msm_vidc_control_ext.h rename to driver/platform/common/inc/msm_vidc_platform_ext.h index 83499913b7..9a9457ea96 100644 --- a/driver/vidc/inc/msm_vidc_control_ext.h +++ b/driver/platform/common/inc/msm_vidc_platform_ext.h @@ -3,8 +3,8 @@ * Copyright (c) 2022-2023. Qualcomm Innovation Center, Inc. All rights reserved. */ -#ifndef _MSM_VIDC_CONTROL_EXT_H_ -#define _MSM_VIDC_CONTROL_EXT_H_ +#ifndef _MSM_VIDC_PLATFORM_EXT_H_ +#define _MSM_VIDC_PLATFORM_EXT_H_ #include "msm_vidc_control.h" diff --git a/driver/vidc/src/msm_vidc_control_ext.c b/driver/platform/common/src/msm_vidc_platform_ext.c similarity index 99% rename from driver/vidc/src/msm_vidc_control_ext.c rename to driver/platform/common/src/msm_vidc_platform_ext.c index 4fb2466a2b..d742f34076 100644 --- a/driver/vidc/src/msm_vidc_control_ext.c +++ b/driver/platform/common/src/msm_vidc_platform_ext.c @@ -4,7 +4,7 @@ */ #include -#include "msm_vidc_control_ext.h" +#include "msm_vidc_platform_ext.h" #include "hfi_packet.h" #include "hfi_property.h" #include "venus_hfi.h" diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index 684e6552a4..41f380327e 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -15,7 +15,7 @@ #include "msm_vidc_platform.h" #include "msm_vidc_debug.h" #include "msm_vidc_internal.h" -#include "msm_vidc_control_ext.h" +#include "msm_vidc_platform_ext.h" #include "msm_vidc_memory_ext.h" #include "resources_ext.h" #include "msm_vidc_iris3.h" diff --git a/driver/platform/pineapple/src/msm_vidc_pineapple.c b/driver/platform/pineapple/src/msm_vidc_pineapple.c index 739b2e86f7..42fad973b2 100644 --- a/driver/platform/pineapple/src/msm_vidc_pineapple.c +++ b/driver/platform/pineapple/src/msm_vidc_pineapple.c @@ -15,7 +15,7 @@ #include "msm_vidc_platform.h" #include "msm_vidc_debug.h" #include "msm_vidc_internal.h" -#include "msm_vidc_control_ext.h" +#include "msm_vidc_platform_ext.h" #include "msm_vidc_memory_ext.h" #include "resources_ext.h" #include "msm_vidc_iris33.h" diff --git a/msm_video/Kbuild b/msm_video/Kbuild index 6eb67fcb65..d7ec447a7a 100644 --- a/msm_video/Kbuild +++ b/msm_video/Kbuild @@ -47,6 +47,7 @@ msm_video-objs += $(VIDEO_DRIVER_REL_PATH)/platform/kalama/src/msm_vidc_kalama.o $(VIDEO_DRIVER_REL_PATH)/variant/iris3/src/msm_vidc_iris3.o endif msm_video-objs += $(VIDEO_DRIVER_REL_PATH)/platform/common/src/msm_vidc_platform.o \ + $(VIDEO_DRIVER_REL_PATH)/platform/common/src/msm_vidc_platform_ext.o \ $(VIDEO_DRIVER_REL_PATH)/variant/common/src/msm_vidc_variant.o \ $(VIDEO_DRIVER_REL_PATH)/vidc/src/msm_vidc_v4l2.o \ $(VIDEO_DRIVER_REL_PATH)/vidc/src/msm_vidc_vb2.o \ @@ -56,7 +57,6 @@ msm_video-objs += $(VIDEO_DRIVER_REL_PATH)/platform/common/src/msm_vidc_platform $(VIDEO_DRIVER_REL_PATH)/vidc/src/msm_vidc_driver.o \ $(VIDEO_DRIVER_REL_PATH)/vidc/src/msm_vidc_state.o \ $(VIDEO_DRIVER_REL_PATH)/vidc/src/msm_vidc_control.o \ - $(VIDEO_DRIVER_REL_PATH)/vidc/src/msm_vidc_control_ext.o \ $(VIDEO_DRIVER_REL_PATH)/vidc/src/msm_vidc_buffer.o \ $(VIDEO_DRIVER_REL_PATH)/vidc/src/msm_vidc_power.o \ $(VIDEO_DRIVER_REL_PATH)/vidc/src/msm_vidc_probe.o \ From 17bc01b78f2bd27890cae9ba8acc35aa5c5c3923 Mon Sep 17 00:00:00 2001 From: Vedang Nagar Date: Fri, 24 Feb 2023 18:30:28 +0530 Subject: [PATCH 0835/1061] video: driver: Move clk/qcom.h to external reseource file Move qcom.h header file from resources.h to resources_ext file. Change-Id: I81735461f093fe724a51d66538be1cc562fc0e24 Signed-off-by: Vedang Nagar --- driver/variant/iris33/src/msm_vidc_iris33.c | 8 ++-- driver/vidc/inc/resources.h | 13 +++-- driver/vidc/src/resources_ext.c | 53 +++++++++++++++++---- 3 files changed, 59 insertions(+), 15 deletions(-) diff --git a/driver/variant/iris33/src/msm_vidc_iris33.c b/driver/variant/iris33/src/msm_vidc_iris33.c index d0d616edd0..b0c3eec567 100644 --- a/driver/variant/iris33/src/msm_vidc_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_iris33.c @@ -432,11 +432,11 @@ static int __power_off_iris33_controller(struct msm_vidc_core *core) d_vpr_e("%s: assert video_axi_reset failed\n", __func__); /* set retain mem and peripheral before asset mvs0c reset */ rc = call_res_op(core, clk_set_flag, core, - "video_cc_mvs0c_clk", CLKFLAG_RETAIN_MEM); + "video_cc_mvs0c_clk", MSM_VIDC_CLKFLAG_RETAIN_MEM); if (rc) d_vpr_e("%s: set retain mem failed\n", __func__); rc = call_res_op(core, clk_set_flag, core, - "video_cc_mvs0c_clk", CLKFLAG_RETAIN_PERIPH); + "video_cc_mvs0c_clk", MSM_VIDC_CLKFLAG_RETAIN_PERIPH); if (rc) d_vpr_e("%s: set retain peripheral failed\n", __func__); rc = call_res_op(core, reset_control_assert, core, "video_mvs0c_reset"); @@ -534,11 +534,11 @@ skip_video_xo_reset: /* remove retain mem and retain peripheral */ rc = call_res_op(core, clk_set_flag, core, - "video_cc_mvs0c_clk", CLKFLAG_NORETAIN_PERIPH); + "video_cc_mvs0c_clk", MSM_VIDC_CLKFLAG_NORETAIN_PERIPH); if (rc) d_vpr_e("%s: set noretain peripheral failed\n", __func__); rc = call_res_op(core, clk_set_flag, core, - "video_cc_mvs0c_clk", CLKFLAG_NORETAIN_MEM); + "video_cc_mvs0c_clk", MSM_VIDC_CLKFLAG_NORETAIN_MEM); if (rc) d_vpr_e("%s: set noretain mem failed\n", __func__); diff --git a/driver/vidc/inc/resources.h b/driver/vidc/inc/resources.h index bee1748e66..baa890a1b2 100644 --- a/driver/vidc/inc/resources.h +++ b/driver/vidc/inc/resources.h @@ -7,8 +7,6 @@ #ifndef _MSM_VIDC_RESOURCES_H_ #define _MSM_VIDC_RESOURCES_H_ -#include - struct icc_path; struct regulator; struct clk; @@ -103,6 +101,15 @@ struct msm_vidc_core; #define venus_hfi_for_each_device_region(__device, __sinfo) \ venus_hfi_for_each_thing(__device, __sinfo, device_region) +enum msm_vidc_branch_mem_flags { + MSM_VIDC_CLKFLAG_RETAIN_PERIPH, + MSM_VIDC_CLKFLAG_NORETAIN_PERIPH, + MSM_VIDC_CLKFLAG_RETAIN_MEM, + MSM_VIDC_CLKFLAG_NORETAIN_MEM, + MSM_VIDC_CLKFLAG_PERIPH_OFF_SET, + MSM_VIDC_CLKFLAG_PERIPH_OFF_CLEAR, +}; + struct bus_info { struct icc_path *icc; const char *name; @@ -274,7 +281,7 @@ struct msm_vidc_resources_ops { int (*clk_disable)(struct msm_vidc_core *core, const char *name); int (*clk_enable)(struct msm_vidc_core *core, const char *name); int (*clk_set_flag)(struct msm_vidc_core *core, - const char *name, enum branch_mem_flags flag); + const char *name, enum msm_vidc_branch_mem_flags flag); int (*clk_print_residency_stats)(struct msm_vidc_core *core); int (*clk_reset_residency_stats)(struct msm_vidc_core *core); }; diff --git a/driver/vidc/src/resources_ext.c b/driver/vidc/src/resources_ext.c index bcd5cca7aa..40af6b0d75 100644 --- a/driver/vidc/src/resources_ext.c +++ b/driver/vidc/src/resources_ext.c @@ -5,6 +5,8 @@ */ #include +#include + #ifdef CONFIG_MSM_MMRM #include #endif @@ -499,19 +501,54 @@ static int __set_clocks_ext(struct msm_vidc_core *core, u64 freq) return 0; } -static int __clock_set_flag_ext(struct msm_vidc_core *core, - const char *name, enum branch_mem_flags flag) +static int qcom_clk_get_branch_flag(enum msm_vidc_branch_mem_flags vidc_flag, + enum branch_mem_flags *clk_flag) { - struct clock_info *cinfo = NULL; - bool found = false; + switch (vidc_flag) { + case MSM_VIDC_CLKFLAG_RETAIN_PERIPH: + *clk_flag = CLKFLAG_RETAIN_PERIPH; + break; + case MSM_VIDC_CLKFLAG_NORETAIN_PERIPH: + *clk_flag = CLKFLAG_NORETAIN_PERIPH; + break; + case MSM_VIDC_CLKFLAG_RETAIN_MEM: + *clk_flag = CLKFLAG_RETAIN_MEM; + break; + case MSM_VIDC_CLKFLAG_NORETAIN_MEM: + *clk_flag = CLKFLAG_NORETAIN_MEM; + break; + case MSM_VIDC_CLKFLAG_PERIPH_OFF_SET: + *clk_flag = CLKFLAG_PERIPH_OFF_SET; + break; + case MSM_VIDC_CLKFLAG_PERIPH_OFF_CLEAR: + *clk_flag = CLKFLAG_PERIPH_OFF_CLEAR; + break; + default: + d_vpr_e("%s: invalid clk flag: %d\n", __func__, vidc_flag); + return -EINVAL; + } + return 0; +} - /* get clock handle */ - venus_hfi_for_each_clock(core, cinfo) { +static int __clock_set_flag_ext(struct msm_vidc_core *core, + const char *name, enum msm_vidc_branch_mem_flags flag) +{ + int rc = 0; + struct clock_info *cinfo = NULL; + bool found = false; + enum branch_mem_flags mem_flag; + + /* get clock handle */ + venus_hfi_for_each_clock(core, cinfo) { if (strcmp(cinfo->name, name)) continue; found = true; - qcom_clk_set_flags(cinfo->clk, flag); - d_vpr_h("%s: set flag %d on clock %s\n", __func__, flag, name); + rc = qcom_clk_get_branch_flag(flag, &mem_flag); + if (rc) + return rc; + + qcom_clk_set_flags(cinfo->clk, mem_flag); + d_vpr_h("%s: set flag %d on clock %s\n", __func__, mem_flag, name); break; } if (!found) { From 28c761d7bf1fe6e58d8bc18dc06fe750f68cc391 Mon Sep 17 00:00:00 2001 From: Maheshwar Ajja Date: Tue, 28 Feb 2023 23:06:03 -0800 Subject: [PATCH 0836/1061] video: driver: resolve skip unmap in system error cases If there is any system error from firmware then driver will remove instance from core->instances.list. msm_vb2_detach(unmap)_dmabuf() returning failure because get_inst_ref() returning NULL as the instance was removed from in core->instances.list, but instance is still alive and buffers can still be detached(unmapped). Skipping detach(unmap) buffers resulting in below warning when the buffer's final dma reference is removed by v4l2 framework (dma_buf_put(fd)) after msm_vb2_detach(unmap)_dmabuf() functions. msm_dma_buf_freed: DMA buffer ffffff8884ebe600 destroyed with outstanding iommu mappings Call trace: msm_dma_buf_freed+0x130/0x334 [msm_dma_iommu_mapping] qcom_sg_release+0x30/0x50 [qcom_dma_heaps] dma_buf_release+0x48/0xa8 __dentry_kill+0x178/0x268 dentry_kill+0xc4/0x110 dput+0xa4/0x110 __fput+0x170/0x260 ____fput+0x18/0x28 task_work_run+0xc0/0xe8 Eventually when client closed the session, driver will try to cleanup the missing buffers and hence driver calls unmap buffers which is resulting in below list_del corruption issue as dma_buf including sg_list was already removed for it msm_dma_unmap_sg_attrs: (ffffff8916a92c00) was never mapped WARNING: CPU: 2 PID: 2258 at drivers/iommu/msm_dma_iommu_mapping.c:377 msm_dma_unmap_sg_attrs+0x9c/0x1e4 [msm_dma_iommu_mapping] Call trace: msm_dma_unmap_sg_attrs+0x9c/0x1e4 [msm_dma_iommu_mapping] qcom_sg_unmap_dma_buf+0xc0/0xf0 [qcom_dma_heaps] dma_buf_unmap_attachment+0x48/0xa0 msm_vidc_dma_buf_unmap_attachment+0x2c/0x80 [msm_video] msm_vidc_destroy_buffers+0x510/0xb74 [msm_video] put_inst+0x158/0x3fc [msm_video] msm_vidc_close+0xe4/0x16c [msm_video] v4l2_release+0x7c/0x108 __fput+0xe4/0x260 ____fput+0x18/0x28 task_work_run+0xc0/0xe8 list_del corruption. prev->next should be ffffff8891db3c90, but was ffffff8916a92c10. (prev=ffffff8916a92c10) As we know instance will always be alive in msm_vb2_detach(unmap)_dmabuf() function, we can safely remove get_inst_ref() to avoid skipping detach(unmap) calls to avoid list_del corruption issues. Change-Id: If292a39ab1cde17da3cbb634370b6ff6692e496a Signed-off-by: Maheshwar Ajja --- driver/vidc/src/msm_vidc_vb2.c | 4 ---- 1 file changed, 4 deletions(-) diff --git a/driver/vidc/src/msm_vidc_vb2.c b/driver/vidc/src/msm_vidc_vb2.c index fb853ac11c..f114c24675 100644 --- a/driver/vidc/src/msm_vidc_vb2.c +++ b/driver/vidc/src/msm_vidc_vb2.c @@ -128,7 +128,6 @@ void msm_vb2_detach_dmabuf(void *buf_priv) return; } inst = vbuf->inst; - inst = get_inst_ref(g_core, inst); if (!inst || !inst->core) { d_vpr_e("%s: invalid params %pK\n", __func__, inst); return; @@ -156,7 +155,6 @@ void msm_vb2_detach_dmabuf(void *buf_priv) vbuf->inst = NULL; exit: - put_inst(inst); return; } @@ -207,7 +205,6 @@ void msm_vb2_unmap_dmabuf(void *buf_priv) return; } inst = vbuf->inst; - inst = get_inst_ref(g_core, inst); if (!inst || !inst->core) { d_vpr_e("%s: invalid params %pK\n", __func__, inst); return; @@ -235,7 +232,6 @@ void msm_vb2_unmap_dmabuf(void *buf_priv) } exit: - put_inst(inst); return; } From 6a12b606091ff486f3c4e20371de93660d2b0d73 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Thu, 2 Mar 2023 13:36:18 -0800 Subject: [PATCH 0837/1061] video: driver: Add new metadata payload header flags Add new metadata payload header flags to specify a particular metadata is bitstream buffer oriented or raw buffer oriented. This is required specially in decoder fence case where input metadata done buffer will contain both input(bitstream) buffer tag as well as output(raw) buffer tag. Change-Id: I43c201c67639d8ab761971f2bc38fe9ec3e80b5f Signed-off-by: Akshata Sahukar --- include/uapi/vidc/media/v4l2_vidc_extensions.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/uapi/vidc/media/v4l2_vidc_extensions.h b/include/uapi/vidc/media/v4l2_vidc_extensions.h index a011e62985..147a1b1952 100644 --- a/include/uapi/vidc/media/v4l2_vidc_extensions.h +++ b/include/uapi/vidc/media/v4l2_vidc_extensions.h @@ -393,6 +393,8 @@ enum v4l2_mpeg_vidc_metapayload_header_flags { METADATA_FLAGS_NONE = 0, METADATA_FLAGS_TOP_FIELD = (1 << 0), METADATA_FLAGS_BOTTOM_FIELD = (1 << 1), + METADATA_FLAGS_BITSTREAM = (1 << 2), + METADATA_FLAGS_RAW = (1 << 3), }; enum saliency_roi_info { From f90831dc936647e7d7d6b3343b4e749705934667 Mon Sep 17 00:00:00 2001 From: Ankush Mitra Date: Thu, 2 Mar 2023 12:21:29 +0530 Subject: [PATCH 0838/1061] video: driver: Take avg bitrate for clk scaling In case of decode batch IDR frame can impact the bitrate based clk scaling. To tackle this use avg filled len in case of decode batching. Change-Id: I1b2701857118bfa1f1a4fd0c0498ee016c02e8d5 Signed-off-by: Ankush Mitra --- driver/vidc/src/msm_vidc_power.c | 19 +++++++++++++++++-- 1 file changed, 17 insertions(+), 2 deletions(-) diff --git a/driver/vidc/src/msm_vidc_power.c b/driver/vidc/src/msm_vidc_power.c index 48ad7bd53f..44bf8e5402 100644 --- a/driver/vidc/src/msm_vidc_power.c +++ b/driver/vidc/src/msm_vidc_power.c @@ -552,6 +552,7 @@ int msm_vidc_scale_power(struct msm_vidc_inst *inst, bool scale_buses) struct msm_vidc_core *core; struct msm_vidc_buffer *vbuf; u32 data_size = 0; + u32 cnt = 0; u32 fps; u32 frame_rate, operating_rate; u32 timestamp_rate = 0, input_rate = 0; @@ -568,8 +569,22 @@ int msm_vidc_scale_power(struct msm_vidc_inst *inst, bool scale_buses) inst->active = true; } - list_for_each_entry(vbuf, &inst->buffers.input.list, list) - data_size = max(data_size, vbuf->data_size); + /* + * consider avg. filled length in decode batching case + * to avoid overvoting for the entire batch due to single + * frame with huge filled length + */ + if (inst->decode_batch.enable) { + list_for_each_entry(vbuf, &inst->buffers.input.list, list) { + data_size += vbuf->data_size; + cnt++; + } + if (cnt) + data_size /= cnt; + } else { + list_for_each_entry(vbuf, &inst->buffers.input.list, list) + data_size = max(data_size, vbuf->data_size); + } inst->max_input_data_size = data_size; frame_rate = msm_vidc_get_frame_rate(inst); From db80783d41d1cedd3ab012fa210fa75369657f69 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Tue, 21 Feb 2023 15:59:10 +0530 Subject: [PATCH 0839/1061] video: driver: handle uninitialized variables in open In msm_vidc_open() create_singlethread_workqueue() is failing, so msm_vidc_close() is called and i.e attempting to de-initialize some uninitialized structures and resulting into stability issues. So handle msm_vidc_open() failure with in same api, instead of calling msm_vidc_close() and re-organize deinit sequence. Change-Id: I843cf07eaf18f4ea764842fd1c87b78d115580d3 Signed-off-by: Govindaraj Rajagopal --- driver/vidc/inc/msm_vidc_driver.h | 1 + driver/vidc/inc/msm_vidc_inst.h | 1 - driver/vidc/src/msm_vidc.c | 67 +++++++++++++++++---------- driver/vidc/src/msm_vidc_driver.c | 75 +++++++++++++++++++------------ 4 files changed, 90 insertions(+), 54 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 90fb2c3dac..3991761329 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -403,6 +403,7 @@ int msm_vidc_release_internal_buffers(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type buffer_type); int msm_vidc_vb2_buffer_done(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buf); +int msm_vidc_remove_dangling_session(struct msm_vidc_inst *inst); int msm_vidc_remove_session(struct msm_vidc_inst *inst); int msm_vidc_add_session(struct msm_vidc_inst *inst); int msm_vidc_session_open(struct msm_vidc_inst *inst); diff --git a/driver/vidc/inc/msm_vidc_inst.h b/driver/vidc/inc/msm_vidc_inst.h index c6571ed65e..139b528d0d 100644 --- a/driver/vidc/inc/msm_vidc_inst.h +++ b/driver/vidc/inc/msm_vidc_inst.h @@ -136,7 +136,6 @@ struct msm_vidc_inst { bool active; u64 last_qbuf_time_ns; u64 initial_time_us; - bool vb2q_init; u32 max_input_data_size; u32 dpb_list_payload[MAX_DPB_LIST_ARRAY_SIZE]; u32 max_map_output_count; diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index 4c3b21469c..0422842e96 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -910,6 +910,11 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) if (rc) return NULL; + rc = msm_vidc_vmem_alloc(sizeof(struct msm_vidc_inst_capability), + (void **)&inst->capabilities, "inst capability"); + if (rc) + goto fail_alloc_inst_caps; + inst->core = core; inst->domain = session_type; inst->session_id = hash32_ptr(inst); @@ -931,11 +936,16 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) msm_vidc_update_debug_str(inst); i_vpr_h(inst, "Opening video instance: %d\n", session_type); + rc = msm_vidc_add_session(inst); + if (rc) { + i_vpr_e(inst, "%s: failed to add session\n", __func__); + goto fail_add_session; + } + rc = msm_vidc_pools_init(inst); if (rc) { i_vpr_e(inst, "%s: failed to init pool buffers\n", __func__); - msm_vidc_vmem_free((void **)&inst); - return NULL; + goto fail_pools_init; } INIT_LIST_HEAD(&inst->caps_list); INIT_LIST_HEAD(&inst->timestamps.list); @@ -977,41 +987,30 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) inst->workq = create_singlethread_workqueue("workq"); if (!inst->workq) { i_vpr_e(inst, "%s: create workq failed\n", __func__); - goto error; + goto fail_create_workq; } INIT_DELAYED_WORK(&inst->stats_work, msm_vidc_stats_handler); INIT_WORK(&inst->stability_work, msm_vidc_stability_handler); - rc = msm_vidc_vmem_alloc(sizeof(struct msm_vidc_inst_capability), - (void **)&inst->capabilities, "inst capability"); - if (rc) - goto error; - rc = msm_vidc_event_queue_init(inst); if (rc) - goto error; + goto fail_eventq_init; rc = msm_vidc_vb2_queue_init(inst); if (rc) - goto error; + goto fail_vb2q_init; if (is_decode_session(inst)) rc = msm_vdec_inst_init(inst); else if (is_encode_session(inst)) rc = msm_venc_inst_init(inst); if (rc) - goto error; + goto fail_inst_init; rc = msm_vidc_fence_init(inst); if (rc) - goto error; - - rc = msm_vidc_add_session(inst); - if (rc) { - i_vpr_e(inst, "%s: failed to get session id\n", __func__); - goto error; - } + goto fail_fence_init; /* reset clock residency stats */ msm_vidc_reset_residency_stats(core); @@ -1021,7 +1020,7 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) rc = msm_vidc_session_open(inst); if (rc) { msm_vidc_core_deinit(core, true); - goto error; + goto fail_session_open; } inst->debugfs_root = @@ -1031,8 +1030,31 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) return inst; -error: - msm_vidc_close(inst); +fail_session_open: + msm_vidc_fence_deinit(inst); +fail_fence_init: + if (is_decode_session(inst)) + msm_vdec_inst_deinit(inst); + else if (is_encode_session(inst)) + msm_venc_inst_deinit(inst); +fail_inst_init: + msm_vidc_vb2_queue_deinit(inst); +fail_vb2q_init: + msm_vidc_event_queue_deinit(inst); +fail_eventq_init: + destroy_workqueue(inst->workq); +fail_create_workq: + msm_vidc_pools_deinit(inst); +fail_pools_init: + msm_vidc_remove_session(inst); + msm_vidc_remove_dangling_session(inst); +fail_add_session: + mutex_destroy(&inst->client_lock); + mutex_destroy(&inst->request_lock); + mutex_destroy(&inst->lock); + msm_vidc_vmem_free((void **)&inst->capabilities); +fail_alloc_inst_caps: + msm_vidc_vmem_free((void **)&inst); return NULL; } EXPORT_SYMBOL(msm_vidc_open); @@ -1057,9 +1079,6 @@ int msm_vidc_close(void *instance) msm_vidc_print_stats(inst); msm_vidc_print_residency_stats(core); msm_vidc_session_close(inst); - msm_vidc_event_queue_deinit(inst); - msm_vidc_vb2_queue_deinit(inst); - msm_vidc_remove_session(inst); msm_vidc_change_state(inst, MSM_VIDC_CLOSE, __func__); inst->sub_state = MSM_VIDC_SUB_STATE_NONE; strscpy(inst->sub_state_name, "SUB_STATE_NONE", sizeof(inst->sub_state_name)); diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 274b0d4b22..b7764bef2f 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -276,20 +276,18 @@ int msm_vidc_suspend_locked(struct msm_vidc_core *core) return rc; } -static int msm_vidc_try_suspend(struct msm_vidc_inst *inst) +static int msm_vidc_try_suspend(struct msm_vidc_core *core) { - struct msm_vidc_core *core; int rc = 0; - if (!inst || !inst->core) { + if (!core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - core = inst->core; core_lock(core, __func__); if (list_empty(&core->instances) && list_empty(&core->dangling_instances)) { - i_vpr_h(inst, "%s: closed last open session. suspend video core\n", __func__); + d_vpr_h("%s: closed last open session. suspend video core\n", __func__); msm_vidc_suspend_locked(core); } core_unlock(core, __func__); @@ -2743,17 +2741,6 @@ static void msm_vidc_update_input_cr(struct msm_vidc_inst *inst, u32 idx, u32 cr } } -static void msm_vidc_free_input_cr_list(struct msm_vidc_inst *inst) -{ - struct msm_vidc_input_cr_data *temp, *next; - - list_for_each_entry_safe(temp, next, &inst->enc_input_crs, list) { - list_del(&temp->list); - msm_vidc_vmem_free((void **)&temp); - } - INIT_LIST_HEAD(&inst->enc_input_crs); -} - void msm_vidc_update_stats(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buf, enum msm_vidc_debugfs_event etype) { @@ -3436,6 +3423,12 @@ int msm_vidc_event_queue_init(struct msm_vidc_inst *inst) } core = inst->core; + /* do not init, if already inited */ + if (inst->event_handler.vdev) { + i_vpr_e(inst, "%s: already inited\n", __func__); + return -EINVAL; + } + if (is_decode_session(inst)) index = 0; else if (is_encode_session(inst)) @@ -3461,11 +3454,12 @@ int msm_vidc_event_queue_deinit(struct msm_vidc_inst *inst) /* do not deinit, if not already inited */ if (!inst->event_handler.vdev) { - i_vpr_e(inst, "%s: already not inited\n", __func__); + i_vpr_h(inst, "%s: already not inited\n", __func__); return 0; } v4l2_fh_del(&inst->event_handler); + inst->event_handler.ctrl_handler = NULL; v4l2_fh_exit(&inst->event_handler); return rc; @@ -3548,9 +3542,9 @@ int msm_vidc_vb2_queue_init(struct msm_vidc_inst *inst) } core = inst->core; - if (inst->vb2q_init) { - i_vpr_h(inst, "%s: vb2q already inited\n", __func__); - return 0; + if (inst->m2m_dev) { + i_vpr_e(inst, "%s: vb2q already inited\n", __func__); + return -EINVAL; } inst->m2m_dev = v4l2_m2m_init(core->v4l2_m2m_ops); @@ -3563,6 +3557,7 @@ int msm_vidc_vb2_queue_init(struct msm_vidc_inst *inst) /* v4l2_m2m_ctx_init will do input & output queues initialization */ inst->m2m_ctx = v4l2_m2m_ctx_init(inst->m2m_dev, inst, m2m_queue_init); if (!inst->m2m_ctx) { + rc = -EINVAL; i_vpr_e(inst, "%s: v4l2_m2m_ctx_init failed\n", __func__); goto fail_m2m_ctx_init; } @@ -3587,7 +3582,6 @@ int msm_vidc_vb2_queue_init(struct msm_vidc_inst *inst) rc = vb2q_init(inst, inst->bufq[OUTPUT_META_PORT].vb2q, OUTPUT_META_PLANE); if (rc) goto fail_out_meta_vb2q_init; - inst->vb2q_init = true; return 0; @@ -3601,10 +3595,13 @@ fail_in_meta_vb2q_init: inst->bufq[INPUT_META_PORT].vb2q = NULL; fail_in_meta_alloc: v4l2_m2m_ctx_release(inst->m2m_ctx); + inst->m2m_ctx = NULL; + inst->event_handler.m2m_ctx = NULL; inst->bufq[OUTPUT_PORT].vb2q = NULL; inst->bufq[INPUT_PORT].vb2q = NULL; fail_m2m_ctx_init: v4l2_m2m_release(inst->m2m_dev); + inst->m2m_dev = NULL; fail_m2m_init: return rc; } @@ -3617,7 +3614,7 @@ int msm_vidc_vb2_queue_deinit(struct msm_vidc_inst *inst) d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - if (!inst->vb2q_init) { + if (!inst->m2m_dev) { i_vpr_h(inst, "%s: vb2q already deinited\n", __func__); return 0; } @@ -3627,9 +3624,11 @@ int msm_vidc_vb2_queue_deinit(struct msm_vidc_inst *inst) * is called from v4l2_m2m_ctx_release() */ v4l2_m2m_ctx_release(inst->m2m_ctx); + inst->m2m_ctx = NULL; inst->bufq[OUTPUT_PORT].vb2q = NULL; inst->bufq[INPUT_PORT].vb2q = NULL; v4l2_m2m_release(inst->m2m_dev); + inst->m2m_dev = NULL; vb2_queue_release(inst->bufq[OUTPUT_META_PORT].vb2q); msm_vidc_vmem_free((void **)&inst->bufq[OUTPUT_META_PORT].vb2q); @@ -3637,7 +3636,6 @@ int msm_vidc_vb2_queue_deinit(struct msm_vidc_inst *inst) vb2_queue_release(inst->bufq[INPUT_META_PORT].vb2q); msm_vidc_vmem_free((void **)&inst->bufq[INPUT_META_PORT].vb2q); inst->bufq[INPUT_META_PORT].vb2q = NULL; - inst->vb2q_init = false; return rc; } @@ -3711,7 +3709,7 @@ int msm_vidc_remove_session(struct msm_vidc_inst *inst) return 0; } -static int msm_vidc_remove_dangling_session(struct msm_vidc_inst *inst) +int msm_vidc_remove_dangling_session(struct msm_vidc_inst *inst) { struct msm_vidc_inst *i, *temp; struct msm_vidc_core *core; @@ -4931,6 +4929,7 @@ void msm_vidc_destroy_buffers(struct msm_vidc_inst *inst) struct msm_vidc_input_timer *timer, *dummy_timer; struct msm_vidc_buffer_stats *stats, *dummy_stats; struct msm_vidc_inst_cap_entry *entry, *dummy_entry; + struct msm_vidc_input_cr_data *cr, *dummy_cr; struct msm_vidc_fence *fence, *dummy_fence; struct msm_vidc_core *core; @@ -5070,6 +5069,11 @@ void msm_vidc_destroy_buffers(struct msm_vidc_inst *inst) msm_vidc_vmem_free((void **)&entry); } + list_for_each_entry_safe(cr, dummy_cr, &inst->enc_input_crs, list) { + list_del(&cr->list); + msm_vidc_vmem_free((void **)&cr); + } + list_for_each_entry_safe(fence, dummy_fence, &inst->fence_list, list) { i_vpr_e(inst, "%s: destroying fence %s\n", __func__, fence->name); msm_vidc_fence_destroy(inst, (u32)fence->dma_fence.seqno); @@ -5083,25 +5087,38 @@ static void msm_vidc_close_helper(struct kref *kref) { struct msm_vidc_inst *inst = container_of(kref, struct msm_vidc_inst, kref); + struct msm_vidc_core *core; + + core = inst->core; i_vpr_h(inst, "%s()\n", __func__); - msm_vidc_fence_deinit(inst); msm_vidc_debugfs_deinit_inst(inst); + msm_vidc_fence_deinit(inst); if (is_decode_session(inst)) msm_vdec_inst_deinit(inst); else if (is_encode_session(inst)) msm_venc_inst_deinit(inst); - msm_vidc_free_input_cr_list(inst); - if (inst->workq) - destroy_workqueue(inst->workq); + /** + * Lock is not necessay here, but in force close case, + * vb2q_deinit() will attempt to call stop_streaming() + * vb2 callback and i.e expecting inst lock to be taken. + * So acquire lock before calling vb2q_deinit. + */ + inst_lock(inst, __func__); + msm_vidc_vb2_queue_deinit(inst); + msm_vidc_event_queue_deinit(inst); + inst_unlock(inst, __func__); + destroy_workqueue(inst->workq); msm_vidc_destroy_buffers(inst); + msm_vidc_remove_session(inst); msm_vidc_remove_dangling_session(inst); - msm_vidc_try_suspend(inst); mutex_destroy(&inst->client_lock); mutex_destroy(&inst->request_lock); mutex_destroy(&inst->lock); msm_vidc_vmem_free((void **)&inst->capabilities); msm_vidc_vmem_free((void **)&inst); + /* try suspending video hardware */ + msm_vidc_try_suspend(core); } struct msm_vidc_inst *get_inst_ref(struct msm_vidc_core *core, From 2b974f7ad0036789260f1506660d3e015a1baf23 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Mon, 27 Feb 2023 12:33:09 -0800 Subject: [PATCH 0840/1061] video: driver: Align hfi files to pick synx fence changes Align hfi property and registers file with to pick synx fence related interface changes Change-Id: I19e5cce4d67f2f1eeacf917f9e688d2bb20f6585 Signed-off-by: Akshata Sahukar --- driver/variant/iris33/src/msm_vidc_iris33.c | 1 + driver/vidc/inc/hfi_property.h | 21 +++++++++++++++++++++ 2 files changed, 22 insertions(+) diff --git a/driver/variant/iris33/src/msm_vidc_iris33.c b/driver/variant/iris33/src/msm_vidc_iris33.c index b0c3eec567..c6d4d466f0 100644 --- a/driver/variant/iris33/src/msm_vidc_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_iris33.c @@ -44,6 +44,7 @@ typedef enum HFI_CTRL_READY = 0x1, HFI_CTRL_ERROR_FATAL = 0x2, HFI_CTRL_ERROR_UC_REGION_NOT_SET = 0x4, + HFI_CTRL_ERROR_HW_FENCE_QUEUE = 0x8, HFI_CTRL_PC_READY = 0x100, HFI_CTRL_VCODEC_IDLE = 0x40000000 } hfi_ctrl_status_type; diff --git a/driver/vidc/inc/hfi_property.h b/driver/vidc/inc/hfi_property.h index 084246c4a2..3887baa06d 100644 --- a/driver/vidc/inc/hfi_property.h +++ b/driver/vidc/inc/hfi_property.h @@ -46,6 +46,8 @@ struct hfi_debug_header { }; #define HFI_PROP_DEBUG_LOG_LEVEL 0x0300000b +#define HFI_PROP_FENCE_CLIENT_DATA 0x0300000d + enum hfi_codec_type { HFI_CODEC_DECODE_AVC = 1, HFI_CODEC_ENCODE_AVC = 2, @@ -571,6 +573,23 @@ enum hfi_saliency_type { #define HFI_PROP_SLICE_DECODE 0x03000196 +/* u32 */ +enum hfi_fence_type { + HFI_SW_FENCE = 0x00000001, + HFI_SYNX_V2_FENCE = 0x00000002, +}; + +#define HFI_PROP_FENCE_TYPE 0x0300019D + +enum hfi_fence_direction_type { + HFI_FENCE_TX_ENABLE = 0x00000001, + HFI_FENCE_RX_ENABLE = 0x00000002, +}; + +#define HFI_PROP_FENCE_DIRECTION 0x0300019E + +#define HFI_PROP_FENCE_ERROR_DATA_CORRUPT 0x0300019F + #define HFI_PROP_END 0x03FFFFFF #define HFI_SESSION_ERROR_BEGIN 0x04000000 @@ -617,6 +636,8 @@ enum hfi_saliency_type { #define HFI_INFO_HFI_FLAG_PSC_LAST 0x06000007 +#define HFI_INFO_FENCE_SIGNAL_ERROR 0x06000008 + #define HFI_INFORMATION_END 0x06FFFFFF #endif //__H_HFI_PROPERTY_H__ From 133bfb56eaeb2332affd90daca99d24081360c86 Mon Sep 17 00:00:00 2001 From: Zhongbo Shi Date: Thu, 19 Jan 2023 15:25:01 +0800 Subject: [PATCH 0841/1061] video: driver: move DPB_LIST to input port 1. Move DPB_LIST subscription on input port instead of output port. 2. Move decoder port PSC and properties to platform data. Change-Id: I5711e0ba915ebe4136f64d1440ae331b787f4d61 Signed-off-by: Zhongbo Shi --- .../platform/common/inc/msm_vidc_platform.h | 12 ++ driver/platform/kalama/src/msm_vidc_kalama.c | 73 ++++++++ .../pineapple/src/msm_vidc_pineapple.c | 75 +++++++- driver/vidc/inc/msm_vidc_internal.h | 1 + driver/vidc/src/msm_vdec.c | 167 +++++++++--------- driver/vidc/src/venus_hfi_response.c | 2 +- 6 files changed, 242 insertions(+), 88 deletions(-) diff --git a/driver/platform/common/inc/msm_vidc_platform.h b/driver/platform/common/inc/msm_vidc_platform.h index 0ef2a03c1d..e0ad9f815e 100644 --- a/driver/platform/common/inc/msm_vidc_platform.h +++ b/driver/platform/common/inc/msm_vidc_platform.h @@ -240,6 +240,18 @@ struct msm_vidc_platform_data { unsigned int efuse_data_size; unsigned int sku_version; struct msm_vidc_format_capability *format_data; + const u32 *psc_avc_tbl; + unsigned int psc_avc_tbl_size; + const u32 *psc_hevc_tbl; + unsigned int psc_hevc_tbl_size; + const u32 *psc_vp9_tbl; + unsigned int psc_vp9_tbl_size; + const u32 *psc_av1_tbl; + unsigned int psc_av1_tbl_size; + const u32 *dec_input_prop; + unsigned int dec_input_prop_size; + const u32 *dec_output_prop; + unsigned int dec_output_prop_size; }; struct msm_vidc_platform { diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index 41f380327e..0d97360be8 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -2561,6 +2561,65 @@ static const struct reg_preset_table kalama_reg_preset_table[] = { { 0xB0088, 0x0, 0x11 }, }; +/* decoder properties */ +static const u32 kalama_vdec_psc_avc[] = { + HFI_PROP_BITSTREAM_RESOLUTION, + HFI_PROP_CROP_OFFSETS, + HFI_PROP_CODED_FRAMES, + HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT, + HFI_PROP_PIC_ORDER_CNT_TYPE, + HFI_PROP_PROFILE, + HFI_PROP_LEVEL, + HFI_PROP_SIGNAL_COLOR_INFO, +}; + +static const u32 kalama_vdec_psc_hevc[] = { + HFI_PROP_BITSTREAM_RESOLUTION, + HFI_PROP_CROP_OFFSETS, + HFI_PROP_LUMA_CHROMA_BIT_DEPTH, + HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT, + HFI_PROP_PROFILE, + HFI_PROP_LEVEL, + HFI_PROP_TIER, + HFI_PROP_SIGNAL_COLOR_INFO, +}; + +static const u32 kalama_vdec_psc_vp9[] = { + HFI_PROP_BITSTREAM_RESOLUTION, + HFI_PROP_CROP_OFFSETS, + HFI_PROP_LUMA_CHROMA_BIT_DEPTH, + HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT, + HFI_PROP_PROFILE, + HFI_PROP_LEVEL, +}; + +static const u32 kalama_vdec_psc_av1[] = { + HFI_PROP_BITSTREAM_RESOLUTION, + HFI_PROP_CROP_OFFSETS, + HFI_PROP_LUMA_CHROMA_BIT_DEPTH, + HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT, + HFI_PROP_AV1_FILM_GRAIN_PRESENT, + HFI_PROP_AV1_SUPER_BLOCK_ENABLED, + HFI_PROP_PROFILE, + HFI_PROP_LEVEL, + HFI_PROP_TIER, + HFI_PROP_SIGNAL_COLOR_INFO, +}; + +static const u32 kalama_vdec_input_properties[] = { + HFI_PROP_NO_OUTPUT, + HFI_PROP_SUBFRAME_INPUT, +}; + +static const u32 kalama_vdec_output_properties[] = { + HFI_PROP_WORST_COMPRESSION_RATIO, + HFI_PROP_WORST_COMPLEXITY_FACTOR, + HFI_PROP_PICTURE_TYPE, + HFI_PROP_DPB_LIST, + HFI_PROP_CABAC_SESSION, + HFI_PROP_FENCE, +}; + static const struct msm_vidc_platform_data kalama_data = { /* resources dependent on other module */ .bw_tbl = kalama_bw_table, @@ -2599,6 +2658,20 @@ static const struct msm_vidc_platform_data kalama_data = { .csc_data.vpe_csc_custom_limit_coeff = vpe_csc_custom_limit_coeff, .ubwc_config = ubwc_config_kalama, .format_data = &format_data_kalama, + + /* decoder properties related*/ + .psc_avc_tbl = kalama_vdec_psc_avc, + .psc_avc_tbl_size = ARRAY_SIZE(kalama_vdec_psc_avc), + .psc_hevc_tbl = kalama_vdec_psc_hevc, + .psc_hevc_tbl_size = ARRAY_SIZE(kalama_vdec_psc_hevc), + .psc_vp9_tbl = kalama_vdec_psc_vp9, + .psc_vp9_tbl_size = ARRAY_SIZE(kalama_vdec_psc_vp9), + .psc_av1_tbl = kalama_vdec_psc_av1, + .psc_av1_tbl_size = ARRAY_SIZE(kalama_vdec_psc_av1), + .dec_input_prop = kalama_vdec_input_properties, + .dec_input_prop_size = ARRAY_SIZE(kalama_vdec_input_properties), + .dec_output_prop = kalama_vdec_output_properties, + .dec_output_prop_size = ARRAY_SIZE(kalama_vdec_output_properties), }; static const struct msm_vidc_platform_data kalama_data_v2 = { diff --git a/driver/platform/pineapple/src/msm_vidc_pineapple.c b/driver/platform/pineapple/src/msm_vidc_pineapple.c index 42fad973b2..05cb63d8a7 100644 --- a/driver/platform/pineapple/src/msm_vidc_pineapple.c +++ b/driver/platform/pineapple/src/msm_vidc_pineapple.c @@ -1635,7 +1635,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { 0, 1, 1, 0, 0, HFI_PROP_DPB_LIST, - CAP_FLAG_OUTPUT_PORT}, + CAP_FLAG_INPUT_PORT}, {FILM_GRAIN, DEC, AV1, 0, 1, 1, 0, @@ -2607,6 +2607,65 @@ static const struct device_region_table pineapple_device_region_table[] = { { "aon-registers", 0x0AAE0000, 0x1000, 0xFFAE0000, MSM_VIDC_AON_REGISTERS }, }; +/* decoder properties */ +static const u32 pineapple_vdec_psc_avc[] = { + HFI_PROP_BITSTREAM_RESOLUTION, + HFI_PROP_CROP_OFFSETS, + HFI_PROP_CODED_FRAMES, + HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT, + HFI_PROP_PIC_ORDER_CNT_TYPE, + HFI_PROP_PROFILE, + HFI_PROP_LEVEL, + HFI_PROP_SIGNAL_COLOR_INFO, +}; + +static const u32 pineapple_vdec_psc_hevc[] = { + HFI_PROP_BITSTREAM_RESOLUTION, + HFI_PROP_CROP_OFFSETS, + HFI_PROP_LUMA_CHROMA_BIT_DEPTH, + HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT, + HFI_PROP_PROFILE, + HFI_PROP_LEVEL, + HFI_PROP_TIER, + HFI_PROP_SIGNAL_COLOR_INFO, +}; + +static const u32 pineapple_vdec_psc_vp9[] = { + HFI_PROP_BITSTREAM_RESOLUTION, + HFI_PROP_CROP_OFFSETS, + HFI_PROP_LUMA_CHROMA_BIT_DEPTH, + HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT, + HFI_PROP_PROFILE, + HFI_PROP_LEVEL, +}; + +static const u32 pineapple_vdec_psc_av1[] = { + HFI_PROP_BITSTREAM_RESOLUTION, + HFI_PROP_CROP_OFFSETS, + HFI_PROP_LUMA_CHROMA_BIT_DEPTH, + HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT, + HFI_PROP_AV1_FILM_GRAIN_PRESENT, + HFI_PROP_AV1_SUPER_BLOCK_ENABLED, + HFI_PROP_PROFILE, + HFI_PROP_LEVEL, + HFI_PROP_TIER, + HFI_PROP_SIGNAL_COLOR_INFO, +}; + +static const u32 pineapple_vdec_input_properties[] = { + HFI_PROP_NO_OUTPUT, + HFI_PROP_SUBFRAME_INPUT, + HFI_PROP_DPB_LIST, +}; + +static const u32 pineapple_vdec_output_properties[] = { + HFI_PROP_WORST_COMPRESSION_RATIO, + HFI_PROP_WORST_COMPLEXITY_FACTOR, + HFI_PROP_PICTURE_TYPE, + HFI_PROP_CABAC_SESSION, + HFI_PROP_FENCE, +}; + static const struct msm_vidc_platform_data pineapple_data = { /* resources dependent on other module */ .bw_tbl = pineapple_bw_table, @@ -2647,6 +2706,20 @@ static const struct msm_vidc_platform_data pineapple_data = { .csc_data.vpe_csc_custom_limit_coeff = vpe_csc_custom_limit_coeff, .ubwc_config = ubwc_config_pineapple, .format_data = &format_data_pineapple, + + /* decoder properties related*/ + .psc_avc_tbl = pineapple_vdec_psc_avc, + .psc_avc_tbl_size = ARRAY_SIZE(pineapple_vdec_psc_avc), + .psc_hevc_tbl = pineapple_vdec_psc_hevc, + .psc_hevc_tbl_size = ARRAY_SIZE(pineapple_vdec_psc_hevc), + .psc_vp9_tbl = pineapple_vdec_psc_vp9, + .psc_vp9_tbl_size = ARRAY_SIZE(pineapple_vdec_psc_vp9), + .psc_av1_tbl = pineapple_vdec_psc_av1, + .psc_av1_tbl_size = ARRAY_SIZE(pineapple_vdec_psc_av1), + .dec_input_prop = pineapple_vdec_input_properties, + .dec_input_prop_size = ARRAY_SIZE(pineapple_vdec_input_properties), + .dec_output_prop = pineapple_vdec_output_properties, + .dec_output_prop_size = ARRAY_SIZE(pineapple_vdec_output_properties), }; int msm_vidc_pineapple_check_ddr_type(void) diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 7351563d98..d6dea35e60 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -772,6 +772,7 @@ struct msm_vidc_subscription_params { u32 tier; u32 av1_film_grain_present; u32 av1_super_block_enabled; + u32 dpb_list_enabled; }; struct msm_vidc_hfi_frame_info { diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 6e8cf27907..7c187f7cda 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -24,64 +24,6 @@ #define MAX_DEC_BATCH_SIZE 6 #define SKIP_BATCH_WINDOW 100 -static const u32 msm_vdec_subscribe_for_psc_avc[] = { - HFI_PROP_BITSTREAM_RESOLUTION, - HFI_PROP_CROP_OFFSETS, - HFI_PROP_CODED_FRAMES, - HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT, - HFI_PROP_PIC_ORDER_CNT_TYPE, - HFI_PROP_PROFILE, - HFI_PROP_LEVEL, - HFI_PROP_SIGNAL_COLOR_INFO, -}; - -static const u32 msm_vdec_subscribe_for_psc_hevc[] = { - HFI_PROP_BITSTREAM_RESOLUTION, - HFI_PROP_CROP_OFFSETS, - HFI_PROP_LUMA_CHROMA_BIT_DEPTH, - HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT, - HFI_PROP_PROFILE, - HFI_PROP_LEVEL, - HFI_PROP_TIER, - HFI_PROP_SIGNAL_COLOR_INFO, -}; - -static const u32 msm_vdec_subscribe_for_psc_vp9[] = { - HFI_PROP_BITSTREAM_RESOLUTION, - HFI_PROP_CROP_OFFSETS, - HFI_PROP_LUMA_CHROMA_BIT_DEPTH, - HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT, - HFI_PROP_PROFILE, - HFI_PROP_LEVEL, -}; - -static const u32 msm_vdec_subscribe_for_psc_av1[] = { - HFI_PROP_BITSTREAM_RESOLUTION, - HFI_PROP_CROP_OFFSETS, - HFI_PROP_LUMA_CHROMA_BIT_DEPTH, - HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT, - HFI_PROP_AV1_FILM_GRAIN_PRESENT, - HFI_PROP_AV1_SUPER_BLOCK_ENABLED, - HFI_PROP_PROFILE, - HFI_PROP_LEVEL, - HFI_PROP_TIER, - HFI_PROP_SIGNAL_COLOR_INFO, -}; - -static const u32 msm_vdec_input_subscribe_for_properties[] = { - HFI_PROP_NO_OUTPUT, - HFI_PROP_SUBFRAME_INPUT, -}; - -static const u32 msm_vdec_output_subscribe_for_properties[] = { - HFI_PROP_WORST_COMPRESSION_RATIO, - HFI_PROP_WORST_COMPLEXITY_FACTOR, - HFI_PROP_PICTURE_TYPE, - HFI_PROP_DPB_LIST, - HFI_PROP_CABAC_SESSION, - HFI_PROP_FENCE, -}; - static const u32 msm_vdec_internal_buffer_type[] = { MSM_VIDC_BUF_BIN, MSM_VIDC_BUF_COMV, @@ -884,22 +826,27 @@ static int msm_vdec_subscribe_input_port_settings_change(struct msm_vidc_inst *i d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - core = inst->core; i_vpr_h(inst, "%s()\n", __func__); + core = inst->core; + if (!core->platform) { + d_vpr_e("%s: invalid platform data\n", __func__); + return -EINVAL; + } + payload[0] = HFI_MODE_PORT_SETTINGS_CHANGE; if (inst->codec == MSM_VIDC_H264) { - subscribe_psc_size = ARRAY_SIZE(msm_vdec_subscribe_for_psc_avc); - psc = msm_vdec_subscribe_for_psc_avc; + subscribe_psc_size = core->platform->data.psc_avc_tbl_size; + psc = core->platform->data.psc_avc_tbl; } else if (inst->codec == MSM_VIDC_HEVC || inst->codec == MSM_VIDC_HEIC) { - subscribe_psc_size = ARRAY_SIZE(msm_vdec_subscribe_for_psc_hevc); - psc = msm_vdec_subscribe_for_psc_hevc; + subscribe_psc_size = core->platform->data.psc_hevc_tbl_size; + psc = core->platform->data.psc_hevc_tbl; } else if (inst->codec == MSM_VIDC_VP9) { - subscribe_psc_size = ARRAY_SIZE(msm_vdec_subscribe_for_psc_vp9); - psc = msm_vdec_subscribe_for_psc_vp9; + subscribe_psc_size = core->platform->data.psc_vp9_tbl_size; + psc = core->platform->data.psc_vp9_tbl; } else if (inst->codec == MSM_VIDC_AV1) { - subscribe_psc_size = ARRAY_SIZE(msm_vdec_subscribe_for_psc_av1); - psc = msm_vdec_subscribe_for_psc_av1; + subscribe_psc_size = core->platform->data.psc_av1_tbl_size; + psc = core->platform->data.psc_av1_tbl; } else { i_vpr_e(inst, "%s: unsupported codec: %d\n", __func__, inst->codec); psc = NULL; @@ -949,30 +896,61 @@ static int msm_vdec_subscribe_property(struct msm_vidc_inst *inst, u32 payload[32] = {0}; u32 i, count = 0; bool allow = false; + struct msm_vidc_core *core; + u32 subscribe_prop_size; + const u32 *subcribe_prop; - if (!inst) { + if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } + core = inst->core; i_vpr_h(inst, "%s()\n", __func__); + if (!core->platform) { + d_vpr_e("%s: invalid platform data\n", __func__); + return -EINVAL; + } + payload[0] = HFI_MODE_PROPERTY; if (port == INPUT_PORT) { - for (i = 0; i < ARRAY_SIZE(msm_vdec_input_subscribe_for_properties); i++) { - payload[count + 1] = msm_vdec_input_subscribe_for_properties[i]; - count++; - } - } else if (port == OUTPUT_PORT) { - for (i = 0; i < ARRAY_SIZE(msm_vdec_output_subscribe_for_properties); i++) { + subscribe_prop_size = core->platform->data.dec_input_prop_size; + subcribe_prop = core->platform->data.dec_input_prop; + for (i = 0; i < subscribe_prop_size; i++) { allow = msm_vidc_allow_property(inst, - msm_vdec_output_subscribe_for_properties[i]); + subcribe_prop[i]); if (allow) { - payload[count + 1] = msm_vdec_output_subscribe_for_properties[i]; + payload[count + 1] = subcribe_prop[i]; count++; } + + if (subcribe_prop[i] == HFI_PROP_DPB_LIST) { + inst->subcr_params[port].dpb_list_enabled = true; + i_vpr_h(inst, "%s: DPB_LIST suscribed on input port", __func__); + } + msm_vidc_update_property_cap(inst, - msm_vdec_output_subscribe_for_properties[i], allow); + subcribe_prop[i], allow); + } + } else if (port == OUTPUT_PORT) { + subscribe_prop_size = core->platform->data.dec_output_prop_size; + subcribe_prop = core->platform->data.dec_output_prop; + for (i = 0; i < subscribe_prop_size; i++) { + allow = msm_vidc_allow_property(inst, + subcribe_prop[i]); + if (allow) { + payload[count + 1] = subcribe_prop[i]; + count++; + } + + if (subcribe_prop[i] == HFI_PROP_DPB_LIST) { + inst->subcr_params[port].dpb_list_enabled = true; + i_vpr_h(inst, "%s: DPB_LIST suscribed on output port", __func__); + } + + msm_vidc_update_property_cap(inst, + subcribe_prop[i], allow); } } else { i_vpr_e(inst, "%s: invalid port: %d\n", __func__, port); @@ -1592,6 +1570,7 @@ static int msm_vdec_subscribe_output_port_settings_change(struct msm_vidc_inst * enum msm_vidc_port_type port) { int rc = 0; + struct msm_vidc_core *core; u32 payload[32] = {0}; u32 prop_type, payload_size, payload_type; u32 i; @@ -1599,25 +1578,31 @@ static int msm_vdec_subscribe_output_port_settings_change(struct msm_vidc_inst * u32 subscribe_psc_size = 0; const u32 *psc = NULL; - if (!inst) { + if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } i_vpr_h(inst, "%s()\n", __func__); + core = inst->core; + if (!core->platform) { + d_vpr_e("%s: invalid platform data\n", __func__); + return -EINVAL; + } + payload[0] = HFI_MODE_PORT_SETTINGS_CHANGE; if (inst->codec == MSM_VIDC_H264) { - subscribe_psc_size = ARRAY_SIZE(msm_vdec_subscribe_for_psc_avc); - psc = msm_vdec_subscribe_for_psc_avc; + subscribe_psc_size = core->platform->data.psc_avc_tbl_size; + psc = core->platform->data.psc_avc_tbl; } else if (inst->codec == MSM_VIDC_HEVC || inst->codec == MSM_VIDC_HEIC) { - subscribe_psc_size = ARRAY_SIZE(msm_vdec_subscribe_for_psc_hevc); - psc = msm_vdec_subscribe_for_psc_hevc; + subscribe_psc_size = core->platform->data.psc_hevc_tbl_size; + psc = core->platform->data.psc_hevc_tbl; } else if (inst->codec == MSM_VIDC_VP9) { - subscribe_psc_size = ARRAY_SIZE(msm_vdec_subscribe_for_psc_vp9); - psc = msm_vdec_subscribe_for_psc_vp9; + subscribe_psc_size = core->platform->data.psc_vp9_tbl_size; + psc = core->platform->data.psc_vp9_tbl; } else if (inst->codec == MSM_VIDC_AV1) { - subscribe_psc_size = ARRAY_SIZE(msm_vdec_subscribe_for_psc_av1); - psc = msm_vdec_subscribe_for_psc_av1; + subscribe_psc_size = core->platform->data.psc_av1_tbl_size; + psc = core->platform->data.psc_av1_tbl; } else { i_vpr_e(inst, "%s: unsupported codec: %d\n", __func__, inst->codec); psc = NULL; @@ -1935,6 +1920,13 @@ static int msm_vdec_release_nonref_buffers(struct msm_vidc_inst *inst) return -EINVAL; } + /* + * if DPB_LIST subscribed on output port then driver need to + * hold MAX_BPB_COUNT of read only buffer at least. + */ + if (!inst->subcr_params[OUTPUT_PORT].dpb_list_enabled) + goto release_buffers; + /* count read_only buffers which are not pending release in read_only list */ list_for_each_entry(ro_buf, &inst->buffers.read_only.list, list) { if (!(ro_buf->attr & MSM_VIDC_ATTR_READ_ONLY)) @@ -1980,6 +1972,7 @@ static int msm_vdec_release_nonref_buffers(struct msm_vidc_inst *inst) i_vpr_l(inst, "%s: fw ro buf count %d, non-ref ro count %d\n", __func__, fw_ro_count, nonref_ro_count); +release_buffers: /* release the eligible buffers as per above condition */ list_for_each_entry(ro_buf, &inst->buffers.read_only.list, list) { found = false; @@ -2706,6 +2699,8 @@ int msm_vdec_inst_init(struct msm_vidc_inst *inst) inst->buffers.output_meta.extra_count = 0; inst->buffers.output_meta.actual_count = 0; inst->buffers.output_meta.size = 0; + inst->subcr_params[INPUT_PORT].dpb_list_enabled = 0; + inst->subcr_params[OUTPUT_PORT].dpb_list_enabled = 0; rc = msm_vdec_codec_change(inst, inst->fmts[INPUT_PORT].fmt.pix_mp.pixelformat); diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index 53db3e6dc6..7269b5e058 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -1694,7 +1694,7 @@ static int handle_property_with_payload(struct msm_vidc_inst *inst, __func__); break; case HFI_PROP_DPB_LIST: - if (is_decode_session(inst) && port == OUTPUT_PORT && + if (is_decode_session(inst) && inst->capabilities->cap[DPB_LIST].value) { rc = handle_dpb_list_property(inst, pkt); if (rc) From 33ec7e400ec79e06310628ac6f976ca1d55c8b65 Mon Sep 17 00:00:00 2001 From: Zhongbo Shi Date: Wed, 23 Nov 2022 14:05:33 +0800 Subject: [PATCH 0842/1061] video: driver: move DPB_TAG_LIST to input meta port 1. Move DPB_TAG_LIST from ouput meta port to input meta port; 2. Remove meta_max_reorder_num_frame; Change-Id: I1783ee9cdb1092f90706dc485d247c51f36a9a65 Signed-off-by: Zhongbo Shi --- driver/platform/pineapple/src/msm_vidc_pineapple.c | 10 +--------- driver/vidc/src/msm_vidc_driver.c | 8 ++------ 2 files changed, 3 insertions(+), 15 deletions(-) diff --git a/driver/platform/pineapple/src/msm_vidc_pineapple.c b/driver/platform/pineapple/src/msm_vidc_pineapple.c index 42fad973b2..c0c1f2d77b 100644 --- a/driver/platform/pineapple/src/msm_vidc_pineapple.c +++ b/driver/platform/pineapple/src/msm_vidc_pineapple.c @@ -1870,7 +1870,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { {META_DPB_TAG_LIST, DEC, CODECS_ALL, MSM_VIDC_META_DISABLE, - MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_INPUT, 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_DPB_TAG_LIST, HFI_PROP_DPB_TAG_LIST, @@ -1935,14 +1935,6 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { 1, DEFAULT_COMPLEXITY, V4L2_CID_MPEG_VIDC_VENC_COMPLEXITY}, - {META_MAX_NUM_REORDER_FRAMES, DEC, HEVC | H264, - MSM_VIDC_META_DISABLE, - MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, - 0, MSM_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_MAX_NUM_REORDER_FRAMES, - HFI_PROP_MAX_NUM_REORDER_FRAMES, - CAP_FLAG_BITMASK | CAP_FLAG_META}, - {DELIVERY_MODE, ENC, HEVC, 0, 1, 1, 0, V4L2_CID_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE, diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index b7764bef2f..db277d6d49 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -1021,12 +1021,6 @@ bool msm_vidc_allow_metadata_subscription(struct msm_vidc_inst *inst, u32 cap_id is_allowed = false; } break; - default: - is_allowed = true; - break; - } - } else if (port == OUTPUT_PORT) { - switch (cap_id) { case META_DPB_TAG_LIST: if (!is_ubwc_colorformat(inst->capabilities->cap[PIX_FMTS].value)) { i_vpr_h(inst, @@ -1039,6 +1033,8 @@ bool msm_vidc_allow_metadata_subscription(struct msm_vidc_inst *inst, u32 cap_id is_allowed = true; break; } + } else if (port == OUTPUT_PORT) { + is_allowed = true; } else { i_vpr_e(inst, "%s: invalid port %d\n", __func__, port); is_allowed = false; From 552670ad6b4b2ef3148b48f0746630fefdaaf48f Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Mon, 6 Feb 2023 16:39:55 -0800 Subject: [PATCH 0843/1061] video: driver: encoder delay start: CSC Introduce a control for client to enable or disable csc. Disable csc for 10-bit encoding based on color format. Change-Id: Ia49324332ce9b05b6f1a1283fa758638a8cc3ab8 Signed-off-by: Darshana Patil --- .../common/inc/msm_vidc_platform_ext.h | 1 + .../common/src/msm_vidc_platform_ext.c | 30 +++++++++++++++++++ driver/platform/kalama/src/msm_vidc_kalama.c | 2 +- .../pineapple/src/msm_vidc_pineapple.c | 13 +++++--- driver/vidc/src/msm_venc.c | 16 ---------- .../uapi/vidc/media/v4l2_vidc_extensions.h | 4 +++ 6 files changed, 45 insertions(+), 21 deletions(-) diff --git a/driver/platform/common/inc/msm_vidc_platform_ext.h b/driver/platform/common/inc/msm_vidc_platform_ext.h index 9a9457ea96..284bbb4504 100644 --- a/driver/platform/common/inc/msm_vidc_platform_ext.h +++ b/driver/platform/common/inc/msm_vidc_platform_ext.h @@ -16,5 +16,6 @@ int msm_vidc_set_ir_period(void *instance, enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_signal_color_info(void *instance, enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_adjust_csc(void *instance, struct v4l2_ctrl *ctrl); #endif diff --git a/driver/platform/common/src/msm_vidc_platform_ext.c b/driver/platform/common/src/msm_vidc_platform_ext.c index d742f34076..6301a96dc9 100644 --- a/driver/platform/common/src/msm_vidc_platform_ext.c +++ b/driver/platform/common/src/msm_vidc_platform_ext.c @@ -277,3 +277,33 @@ int msm_vidc_set_signal_color_info(void *instance, return rc; } +int msm_vidc_adjust_csc(void *instance, struct v4l2_ctrl *ctrl) +{ + struct msm_vidc_inst_capability *capability; + s32 adjusted_value; + s32 pix_fmt = -1; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + if (is_decode_session(inst)) + return 0; + + adjusted_value = ctrl ? ctrl->val : capability->cap[CSC].value; + + if (msm_vidc_get_parent_value(inst, CSC, PIX_FMTS, + &pix_fmt, __func__)) + return -EINVAL; + + /* disable csc for 10-bit encoding */ + if (is_10bit_colorformat(pix_fmt)) + adjusted_value = 0; + + msm_vidc_update_cap_value(inst, CSC, adjusted_value, __func__); + + return 0; +} \ No newline at end of file diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index 0d97360be8..7107a1a792 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -782,7 +782,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { {CSC, ENC, CODECS_ALL, 0, 1, 1, 0, - 0, + V4L2_CID_MPEG_VIDC_CSC, HFI_PROP_CSC}, {CSC_CUSTOM_MATRIX, ENC, CODECS_ALL, diff --git a/driver/platform/pineapple/src/msm_vidc_pineapple.c b/driver/platform/pineapple/src/msm_vidc_pineapple.c index c07e143403..908491ff21 100644 --- a/driver/platform/pineapple/src/msm_vidc_pineapple.c +++ b/driver/platform/pineapple/src/msm_vidc_pineapple.c @@ -790,7 +790,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { {CSC, ENC, CODECS_ALL, 0, 1, 1, 0, - 0, + V4L2_CID_MPEG_VIDC_CSC, HFI_PROP_CSC}, {CSC_CUSTOM_MATRIX, ENC, CODECS_ALL, @@ -1962,15 +1962,15 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine */ {PIX_FMTS, ENC, H264, - {META_ROI_INFO, IR_PERIOD}}, + {META_ROI_INFO, IR_PERIOD, CSC}}, {PIX_FMTS, ENC, HEVC, {PROFILE, MIN_FRAME_QP, MAX_FRAME_QP, I_FRAME_QP, P_FRAME_QP, B_FRAME_QP, META_ROI_INFO, MIN_QUALITY, BLUR_TYPES, IR_PERIOD, - LTR_COUNT}}, + LTR_COUNT, CSC}}, {PIX_FMTS, ENC, HEIC, - {PROFILE}}, + {PROFILE, CSC}}, {PIX_FMTS, DEC, HEVC|HEIC, {PROFILE}}, @@ -2116,6 +2116,11 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine msm_vidc_adjust_blur_resolution, msm_vidc_set_blur_resolution}, + {CSC, ENC, CODECS_ALL, + {0}, + msm_vidc_adjust_csc, + msm_vidc_set_u32}, + {CSC_CUSTOM_MATRIX, ENC, CODECS_ALL, {0}, NULL, diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index 71a9f6db42..9ef1d517de 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -386,19 +386,6 @@ static int msm_venc_set_colorspace(struct msm_vidc_inst* inst, return 0; } -static bool msm_venc_csc_required(struct msm_vidc_inst* inst) -{ - struct v4l2_format *in_fmt = &inst->fmts[INPUT_PORT]; - struct v4l2_format *out_fmt = &inst->fmts[OUTPUT_PORT]; - - /* video hardware supports conversion to REC709 CSC only */ - if (in_fmt->fmt.pix_mp.colorspace != out_fmt->fmt.pix_mp.colorspace && - out_fmt->fmt.pix_mp.colorspace == V4L2_COLORSPACE_REC709) - return true; - - return false; -} - static int msm_venc_set_csc(struct msm_vidc_inst* inst, enum msm_vidc_port_type port) { @@ -410,9 +397,6 @@ static int msm_venc_set_csc(struct msm_vidc_inst* inst, return -EINVAL; } - msm_vidc_update_cap_value(inst, CSC, - msm_venc_csc_required(inst) ? 1 : 0, __func__); - csc = inst->capabilities->cap[CSC].value; i_vpr_h(inst, "%s: csc: %u\n", __func__, csc); rc = venus_hfi_session_property(inst, diff --git a/include/uapi/vidc/media/v4l2_vidc_extensions.h b/include/uapi/vidc/media/v4l2_vidc_extensions.h index 147a1b1952..a9add13b63 100644 --- a/include/uapi/vidc/media/v4l2_vidc_extensions.h +++ b/include/uapi/vidc/media/v4l2_vidc_extensions.h @@ -298,6 +298,10 @@ enum v4l2_mpeg_video_av1_tier { #define V4L2_CID_MPEG_VIDC_SIGNAL_COLOR_INFO \ (V4L2_CID_MPEG_VIDC_BASE + 0x46) +/* control to enable csc */ +#define V4L2_CID_MPEG_VIDC_CSC \ + (V4L2_CID_MPEG_VIDC_BASE + 0x47) + /* add new controls above this line */ /* Deprecate below controls once availble in gki and gsi bionic header */ #ifndef V4L2_CID_MPEG_VIDEO_BASELAYER_PRIORITY_ID From fb2e2c57158b85874f5e915dfc4265fafb0972a0 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Mon, 27 Feb 2023 12:36:17 -0800 Subject: [PATCH 0844/1061] video: driver: Align hfi files to pick ring buffer changes Align hfi property and memory file to pick interface changes for encoder ring buffer support Change-Id: Icde4cdffe5275d416c51c36e562bb832027b0fa1 Signed-off-by: Akshata Sahukar --- driver/variant/iris33/inc/hfi_buffer_iris33.h | 14 +++++++------- driver/vidc/inc/hfi_property.h | 2 ++ 2 files changed, 9 insertions(+), 7 deletions(-) diff --git a/driver/variant/iris33/inc/hfi_buffer_iris33.h b/driver/variant/iris33/inc/hfi_buffer_iris33.h index 95de9d6ad7..2f2bc169df 100644 --- a/driver/variant/iris33/inc/hfi_buffer_iris33.h +++ b/driver/variant/iris33/inc/hfi_buffer_iris33.h @@ -1447,7 +1447,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ } while (0) #define HFI_BUFFER_BIN_ENC(_size, rc_type, frame_width, frame_height, lcu_size, \ - work_mode, num_vpp_pipes, profile) \ + work_mode, num_vpp_pipes, profile, ring_buf_count) \ do \ { \ HFI_U32 bitstream_size = 0, total_bitbin_buffers = 0, \ @@ -1456,8 +1456,8 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ frame_height, work_mode, lcu_size, profile); \ if (work_mode == HFI_WORKMODE_2) \ { \ - total_bitbin_buffers = 3; \ - bitbin_size = bitstream_size * 12 / 10; \ + total_bitbin_buffers = (ring_buf_count > 3) ? ring_buf_count : 3; \ + bitbin_size = bitstream_size * 17 / 10; \ bitbin_size = HFI_ALIGN(bitbin_size, \ VENUS_DMA_ALIGNMENT); \ } \ @@ -1482,19 +1482,19 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ } while (0) #define HFI_BUFFER_BIN_H264E(_size, rc_type, frame_width, frame_height, \ - work_mode, num_vpp_pipes, profile) \ + work_mode, num_vpp_pipes, profile, ring_buf_count) \ do \ { \ HFI_BUFFER_BIN_ENC(_size, rc_type, frame_width, frame_height, 16, \ - work_mode, num_vpp_pipes, profile); \ + work_mode, num_vpp_pipes, profile, ring_buf_count); \ } while (0) #define HFI_BUFFER_BIN_H265E(_size, rc_type, frame_width, frame_height, \ - work_mode, num_vpp_pipes, profile) \ + work_mode, num_vpp_pipes, profile, ring_buf_count) \ do \ { \ HFI_BUFFER_BIN_ENC(_size, rc_type, frame_width, frame_height, 32,\ - work_mode, num_vpp_pipes, profile); \ + work_mode, num_vpp_pipes, profile, ring_buf_count); \ } while (0) #define SIZE_ENC_SLICE_INFO_BUF(num_lcu_in_frame) HFI_ALIGN((256 + \ diff --git a/driver/vidc/inc/hfi_property.h b/driver/vidc/inc/hfi_property.h index 3887baa06d..b468017a7e 100644 --- a/driver/vidc/inc/hfi_property.h +++ b/driver/vidc/inc/hfi_property.h @@ -573,6 +573,8 @@ enum hfi_saliency_type { #define HFI_PROP_SLICE_DECODE 0x03000196 +#define HFI_PROP_ENC_RING_BIN_BUF 0x0300019C + /* u32 */ enum hfi_fence_type { HFI_SW_FENCE = 0x00000001, From 9a5fea8ef32a57a11215839aa38c67e386b140c9 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Thu, 2 Mar 2023 17:44:47 -0800 Subject: [PATCH 0845/1061] video: driver: Add support to enable enc ring buffer Add support to enable ring buffer for enc intermediate bin buffer to improve encoding performance. Change-Id: Ifbf50cb48278c62c09a20bc7626a3b6288813830 Signed-off-by: Akshata Sahukar --- .../pineapple/src/msm_vidc_pineapple.c | 67 +++++++++++ driver/platform/pineapple/src/pineapple.c | 67 +++++++++++ .../iris33/inc/msm_vidc_power_iris33.h | 1 + .../iris33/src/msm_vidc_buffer_iris33.c | 7 +- driver/variant/iris33/src/msm_vidc_iris33.c | 1 + .../iris33/src/msm_vidc_power_iris33.c | 109 +++++++++++++++++- driver/vidc/inc/msm_vidc_inst.h | 1 + driver/vidc/inc/msm_vidc_internal.h | 2 + driver/vidc/src/msm_venc.c | 35 +++++- 9 files changed, 282 insertions(+), 8 deletions(-) diff --git a/driver/platform/pineapple/src/msm_vidc_pineapple.c b/driver/platform/pineapple/src/msm_vidc_pineapple.c index c07e143403..451c303afa 100644 --- a/driver/platform/pineapple/src/msm_vidc_pineapple.c +++ b/driver/platform/pineapple/src/msm_vidc_pineapple.c @@ -21,6 +21,7 @@ #include "msm_vidc_iris33.h" #include "hfi_property.h" #include "hfi_command.h" +#include "venus_hfi.h" #define DEFAULT_VIDEO_CONCEAL_COLOR_BLACK 0x8020010 #define MAX_BASE_LAYER_PRIORITY_ID 63 @@ -325,6 +326,64 @@ static struct msm_platform_core_capability core_data_pineapple[] = { {SUPPORTS_REQUESTS, 1}, }; +static int msm_vidc_set_ring_buffer_count_pineapple(void *instance, + enum msm_vidc_inst_capability_type cap_id) +{ + int rc = 0; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + struct v4l2_format *output_fmt, *input_fmt; + struct msm_vidc_core* core; + u32 count = 0, data_size = 0, pixel_count = 0, fps = 0; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + core = inst->core; + output_fmt = &inst->fmts[OUTPUT_PORT]; + input_fmt = &inst->fmts[INPUT_PORT]; + + fps = inst->capabilities->cap[FRAME_RATE].value >> 16; + pixel_count = output_fmt->fmt.pix_mp.width * + output_fmt->fmt.pix_mp.height; + + /* check if current session supports ring buffer enablement */ + if (!(pixel_count >= 7680 * 4320 && fps >= 30) && + !(pixel_count >= 3840 * 2160 && fps >= 120) && + !(pixel_count >= 1920 * 1080 && fps >= 480) && + !(pixel_count >= 1280 * 720 && fps >= 960)) { + i_vpr_h(inst, + "%s: session %ux%u@%u fps does not support ring buffer\n", + __func__, output_fmt->fmt.pix_mp.width, + output_fmt->fmt.pix_mp.height, fps); + inst->capabilities->cap[cap_id].value = 0; + } else { + data_size = input_fmt->fmt.pix_mp.plane_fmt[0].sizeimage; + rc = call_session_op(core, ring_buf_count, inst, data_size); + if (rc) { + i_vpr_e(inst, "%s: failed to calculate ring buf count\n", + __func__); + /* ignore error */ + rc = 0; + inst->capabilities->cap[cap_id].value = 0; + } + } + + count = inst->capabilities->cap[cap_id].value; + i_vpr_h(inst, "%s: ring buffer count: %u\n", __func__, count); + rc = venus_hfi_session_property(inst, + HFI_PROP_ENC_RING_BIN_BUF, + HFI_HOST_FLAGS_NONE, + HFI_PORT_BITSTREAM, + HFI_PAYLOAD_U32, + &count, + sizeof(u32)); + if (rc) + return rc; + + return rc; +} + static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { /* {cap, domain, codec, * min, max, step_or_mask, value, @@ -525,6 +584,9 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { {MB_CYCLES_FW_VPP, DEC, CODECS_ALL, 66234, 66234, 1, 66234}, + {ENC_RING_BUFFER_COUNT, ENC, CODECS_ALL, + 0, MAX_ENC_RING_BUF_COUNT, 1, 0}, + {CLIENT_ID, ENC|DEC, CODECS_ALL, INVALID_CLIENT_ID, INT_MAX, 1, INVALID_CLIENT_ID, V4L2_CID_MPEG_VIDC_CLIENT_ID}, @@ -1988,6 +2050,11 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine {0}, msm_vidc_adjust_dec_operating_rate}, + {ENC_RING_BUFFER_COUNT, ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_ring_buffer_count_pineapple}, + {SECURE_MODE, ENC|DEC, H264|HEVC|VP9|AV1, {0}, NULL, diff --git a/driver/platform/pineapple/src/pineapple.c b/driver/platform/pineapple/src/pineapple.c index 3448cde2a6..97987933c1 100644 --- a/driver/platform/pineapple/src/pineapple.c +++ b/driver/platform/pineapple/src/pineapple.c @@ -12,6 +12,7 @@ #include "msm_vidc_iris33.h" #include "hfi_property.h" #include "hfi_command.h" +#include "venus_hfi.h" #define DEFAULT_VIDEO_CONCEAL_COLOR_BLACK 0x8020010 #define MAX_BASE_LAYER_PRIORITY_ID 63 @@ -222,6 +223,64 @@ static struct msm_platform_core_capability core_data_pineapple[] = { {SUPPORTS_REQUESTS, 0}, }; +static int msm_vidc_set_ring_buffer_count_pineapple(void *instance, + enum msm_vidc_inst_capability_type cap_id) +{ + int rc = 0; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + struct v4l2_format *output_fmt, *input_fmt; + struct msm_vidc_core* core; + u32 count = 0, data_size = 0, pixel_count = 0, fps = 0; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + core = inst->core; + output_fmt = &inst->fmts[OUTPUT_PORT]; + input_fmt = &inst->fmts[INPUT_PORT]; + + fps = inst->capabilities->cap[FRAME_RATE].value >> 16; + pixel_count = output_fmt->fmt.pix_mp.width * + output_fmt->fmt.pix_mp.height; + + /* check if current session supports ring buffer enablement */ + if (!(pixel_count >= 7680 * 4320 && fps >= 30) && + !(pixel_count >= 3840 * 2160 && fps >= 120) && + !(pixel_count >= 1920 * 1080 && fps >= 480) && + !(pixel_count >= 1280 * 720 && fps >= 960)) { + i_vpr_h(inst, + "%s: session %ux%u@%u fps does not support ring buffer\n", + __func__, output_fmt->fmt.pix_mp.width, + output_fmt->fmt.pix_mp.height, fps); + inst->capabilities->cap[cap_id].value = 0; + } else { + data_size = input_fmt->fmt.pix_mp.plane_fmt[0].sizeimage; + rc = call_session_op(core, ring_buf_count, inst, data_size); + if (rc) { + i_vpr_e(inst, "%s: failed to calculate ring buf count\n", + __func__); + /* ignore error */ + rc = 0; + inst->capabilities->cap[cap_id].value = 0; + } + } + + count = inst->capabilities->cap[cap_id].value; + i_vpr_h(inst, "%s: ring buffer count: %u\n", __func__, count); + rc = venus_hfi_session_property(inst, + HFI_PROP_ENC_RING_BIN_BUF, + HFI_HOST_FLAGS_NONE, + HFI_PORT_BITSTREAM, + HFI_PAYLOAD_U32, + &count, + sizeof(u32)); + if (rc) + return rc; + + return rc; +} + static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { /* {cap, domain, codec, * min, max, step_or_mask, value, @@ -340,6 +399,9 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { {MB_CYCLES_FW_VPP, DEC, CODECS_ALL, 66234, 66234, 1, 66234}, + {ENC_RING_BUFFER_COUNT, ENC, CODECS_ALL, + 0, MAX_ENC_RING_BUF_COUNT, 1, 0}, + {CLIENT_ID, ENC|DEC, CODECS_ALL, INVALID_CLIENT_ID, INT_MAX, 1, INVALID_CLIENT_ID, 0}, @@ -1255,6 +1317,11 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine NULL, msm_vidc_set_q16}, + {ENC_RING_BUFFER_COUNT, ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_ring_buffer_count_pineapple}, + {HFLIP, ENC, CODECS_ALL, {0}, NULL, diff --git a/driver/variant/iris33/inc/msm_vidc_power_iris33.h b/driver/variant/iris33/inc/msm_vidc_power_iris33.h index 1047f4cfa3..cff964540b 100644 --- a/driver/variant/iris33/inc/msm_vidc_power_iris33.h +++ b/driver/variant/iris33/inc/msm_vidc_power_iris33.h @@ -12,6 +12,7 @@ #define ENABLE_LEGACY_POWER_CALCULATIONS 1 +int msm_vidc_ring_buf_count_iris33(struct msm_vidc_inst *inst, u32 data_size); u64 msm_vidc_calc_freq_iris33(struct msm_vidc_inst* inst, u32 data_size); int msm_vidc_calc_bw_iris33(struct msm_vidc_inst* inst, struct vidc_bus_vote_data* vote_data); diff --git a/driver/variant/iris33/src/msm_vidc_buffer_iris33.c b/driver/variant/iris33/src/msm_vidc_buffer_iris33.c index 8c298be647..7086b04d33 100644 --- a/driver/variant/iris33/src/msm_vidc_buffer_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_buffer_iris33.c @@ -338,7 +338,7 @@ static u32 msm_vidc_encoder_bin_size_iris33(struct msm_vidc_inst *inst) { struct msm_vidc_core *core; u32 size = 0; - u32 width, height, num_vpp_pipes, stage, profile; + u32 width, height, num_vpp_pipes, stage, profile, ring_buf_count; struct v4l2_format *f; if (!inst || !inst->core || !inst->capabilities) { @@ -356,13 +356,14 @@ static u32 msm_vidc_encoder_bin_size_iris33(struct msm_vidc_inst *inst) width = f->fmt.pix_mp.width; height = f->fmt.pix_mp.height; profile = inst->capabilities->cap[PROFILE].value; + ring_buf_count = inst->capabilities->cap[ENC_RING_BUFFER_COUNT].value; if (inst->codec == MSM_VIDC_H264) HFI_BUFFER_BIN_H264E(size, inst->hfi_rc_type, width, - height, stage, num_vpp_pipes, profile); + height, stage, num_vpp_pipes, profile, ring_buf_count); else if (inst->codec == MSM_VIDC_HEVC || inst->codec == MSM_VIDC_HEIC) HFI_BUFFER_BIN_H265E(size, inst->hfi_rc_type, width, - height, stage, num_vpp_pipes, profile); + height, stage, num_vpp_pipes, profile, ring_buf_count); i_vpr_l(inst, "%s: size %d\n", __func__, size); return size; diff --git a/driver/variant/iris33/src/msm_vidc_iris33.c b/driver/variant/iris33/src/msm_vidc_iris33.c index c6d4d466f0..4281c42550 100644 --- a/driver/variant/iris33/src/msm_vidc_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_iris33.c @@ -1231,6 +1231,7 @@ static struct msm_vidc_session_ops msm_session_ops = { .buffer_size = msm_buffer_size_iris33, .min_count = msm_buffer_min_count_iris33, .extra_count = msm_buffer_extra_count_iris33, + .ring_buf_count = msm_vidc_ring_buf_count_iris33, .calc_freq = msm_vidc_calc_freq_iris33, .calc_bw = msm_vidc_calc_bw_iris33, .decide_work_route = msm_vidc_decide_work_route_iris33, diff --git a/driver/variant/iris33/src/msm_vidc_power_iris33.c b/driver/variant/iris33/src/msm_vidc_power_iris33.c index 77b6516f7c..3760dc4a77 100644 --- a/driver/variant/iris33/src/msm_vidc_power_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_power_iris33.c @@ -12,6 +12,8 @@ #include "perf_static_model.h" #include "msm_vidc_power.h" +#define VPP_MIN_FREQ_MARGIN_PERCENT 5 /* to be tuned */ + static u64 __calculate_decoder(struct vidc_bus_vote_data *d); static u64 __calculate_encoder(struct vidc_bus_vote_data *d); static u64 __calculate(struct msm_vidc_inst* inst, struct vidc_bus_vote_data *d); @@ -284,6 +286,49 @@ static int msm_vidc_init_codec_input_bus(struct msm_vidc_inst *inst, struct vidc return 0; } +static bool is_vpp_cycles_close_to_freq_corner(struct msm_vidc_core *core, + u64 vpp_min_freq) +{ + u64 margin_freq = 0; + u64 closest_freq_upper_corner = 0; + u32 margin_percent = 0; + int i = 0; + + if (!core || !core->resource || !core->resource->freq_set.freq_tbl || + !core->resource->freq_set.count) { + d_vpr_e("%s: invalid params\n", __func__); + return false; + } + + vpp_min_freq = vpp_min_freq * 1000000; /* convert to hz */ + + closest_freq_upper_corner = + core->resource->freq_set.freq_tbl[0].freq; + + if (vpp_min_freq > closest_freq_upper_corner) + return false; + + /* get the closest freq corner for vpp_min_freq */ + for (i = 0; i < core->resource->freq_set.count; i++) { + if (vpp_min_freq <= + core->resource->freq_set.freq_tbl[i].freq) { + closest_freq_upper_corner = + core->resource->freq_set.freq_tbl[i].freq; + } else { + break; + } + } + + margin_freq = closest_freq_upper_corner - vpp_min_freq; + margin_percent = div_u64((margin_freq * 100), closest_freq_upper_corner); + + /* check if margin is less than cutoff */ + if (margin_percent < VPP_MIN_FREQ_MARGIN_PERCENT) + return true; + + return false; +} + static u64 msm_vidc_calc_freq_iris33_new(struct msm_vidc_inst *inst, u32 data_size) { u64 freq = 0; @@ -311,6 +356,25 @@ static u64 msm_vidc_calc_freq_iris33_new(struct msm_vidc_inst *inst, u32 data_si ret = msm_vidc_calculate_frequency(codec_input, &codec_output); if (ret) return freq; + + if (inst->domain == MSM_VIDC_ENCODER) { + if (!inst->capabilities->cap[ENC_RING_BUFFER_COUNT].value && + is_vpp_cycles_close_to_freq_corner(core, + codec_output.vpp_min_freq)) { + /* + * if ring buffer not enabled and required vpp cycles + * is too close to the frequency corner then increase + * the vpp cycles by VPP_MIN_FREQ_MARGIN_PERCENT + */ + codec_output.vpp_min_freq += div_u64( + codec_output.vpp_min_freq * + VPP_MIN_FREQ_MARGIN_PERCENT, 100); + codec_output.hw_min_freq = max( + codec_output.hw_min_freq, + codec_output.vpp_min_freq); + } + } + freq = codec_output.hw_min_freq * 1000000; /* Convert to Hz */ i_vpr_p(inst, "%s: filled len %d, required freq %llu, fps %u, mbpf %u\n", @@ -1173,4 +1237,47 @@ int msm_vidc_calc_bw_iris33(struct msm_vidc_inst *inst, value = msm_vidc_calc_bw_iris33_new(inst, vidc_data); return value; -} \ No newline at end of file +} + +int msm_vidc_ring_buf_count_iris33(struct msm_vidc_inst *inst, u32 data_size) +{ + int rc = 0; + struct msm_vidc_core *core; + struct api_calculation_input codec_input; + struct api_calculation_freq_output codec_output; + + if (!inst || !inst->core || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + core = inst->core; + + if (!core->resource || !core->resource->freq_set.freq_tbl || + !core->resource->freq_set.count) { + i_vpr_e(inst, "%s: invalid frequency table\n", __func__); + return -EINVAL; + } + + if (ENABLE_LEGACY_POWER_CALCULATIONS) + return 0; + + memset(&codec_input, 0, sizeof(struct api_calculation_input)); + memset(&codec_output, 0, sizeof(struct api_calculation_freq_output)); + rc = msm_vidc_init_codec_input_freq(inst, data_size, &codec_input); + if (rc) + return rc; + rc = msm_vidc_calculate_frequency(codec_input, &codec_output); + if (rc) + return rc; + + /* check if vpp_min_freq is exceeding closest freq corner margin */ + if (is_vpp_cycles_close_to_freq_corner(core, + codec_output.vpp_min_freq)) + /* enables ring buffer */ + inst->capabilities->cap[ENC_RING_BUFFER_COUNT].value = + MAX_ENC_RING_BUF_COUNT; + else + inst->capabilities->cap[ENC_RING_BUFFER_COUNT].value = 0; + + return 0; +} diff --git a/driver/vidc/inc/msm_vidc_inst.h b/driver/vidc/inc/msm_vidc_inst.h index 139b528d0d..7c288e5e78 100644 --- a/driver/vidc/inc/msm_vidc_inst.h +++ b/driver/vidc/inc/msm_vidc_inst.h @@ -28,6 +28,7 @@ struct msm_vidc_session_ops { int (*buffer_size)(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type type); int (*min_count)(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type type); int (*extra_count)(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type type); + int (*ring_buf_count)(struct msm_vidc_inst *inst, u32 data_size); }; struct msm_vidc_mem_list_info { diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index d6dea35e60..7f84fc40a4 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -101,6 +101,7 @@ enum msm_vidc_metadata_bits { #define MAX_ENCODING_REFERNCE_FRAMES 7 #define MAX_LTR_FRAME_COUNT_5 5 #define MAX_LTR_FRAME_COUNT_2 2 +#define MAX_ENC_RING_BUF_COUNT 5 /* to be tuned */ #define DCVS_WINDOW 16 #define ENC_FPS_WINDOW 3 @@ -288,6 +289,7 @@ enum msm_vidc_metadata_bits { CAP(MB_CYCLES_LP) \ CAP(MB_CYCLES_FW) \ CAP(MB_CYCLES_FW_VPP) \ + CAP(ENC_RING_BUFFER_COUNT) \ CAP(CLIENT_ID) \ CAP(SECURE_MODE) \ CAP(FENCE_ID) \ diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index 71a9f6db42..853950f92b 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -456,6 +456,29 @@ static int msm_venc_set_quality_mode(struct msm_vidc_inst *inst) return 0; } +static int msm_venc_set_ring_buffer_count(struct msm_vidc_inst *inst) +{ + int rc = 0; + struct msm_vidc_inst_cap *cap; + + if (!inst->capabilities) { + i_vpr_e(inst, "%s: invalid params\n", __func__); + return -EINVAL; + } + cap = &inst->capabilities->cap[ENC_RING_BUFFER_COUNT]; + + if (!cap->set) + return 0; + + rc = cap->set(inst, ENC_RING_BUFFER_COUNT); + if (rc) { + i_vpr_e(inst, "%s: set cap failed\n", __func__); + return rc; + } + + return 0; +} + static int msm_venc_set_input_properties(struct msm_vidc_inst *inst) { int i, j, rc = 0; @@ -544,6 +567,10 @@ static int msm_venc_set_internal_properties(struct msm_vidc_inst *inst) if (rc) return rc; + rc = msm_venc_set_ring_buffer_count(inst); + if (rc) + return rc; + return rc; } @@ -1006,6 +1033,10 @@ int msm_venc_streamon_output(struct msm_vidc_inst *inst) if (rc) goto error; + rc = msm_venc_set_internal_properties(inst); + if (rc) + goto error; + rc = msm_venc_get_output_internal_buffers(inst); if (rc) goto error; @@ -1018,10 +1049,6 @@ int msm_venc_streamon_output(struct msm_vidc_inst *inst) if (rc) goto error; - rc = msm_venc_set_internal_properties(inst); - if (rc) - goto error; - rc = msm_venc_property_subscription(inst, OUTPUT_PORT); if (rc) goto error; From dd0e6d5f70abe9b16893ebd90ecae5275b87692e Mon Sep 17 00:00:00 2001 From: Ashish Patil Date: Thu, 23 Feb 2023 19:15:54 -0800 Subject: [PATCH 0846/1061] video: driver: update power calculations Update power calculation to avoid low framerate or frame drop issues Change-Id: Ice306a44d4ea8242d965c0e5d03edffc0f5e0f8b Signed-off-by: Ashish Patil --- .../platform/common/inc/perf_static_model.h | 2 +- .../pineapple/inc/pineapple_technology.h | 4 +- .../variant/iris33/src/msm_vidc_bus_iris33.c | 32 ++++++-- .../iris33/src/msm_vidc_clock_iris33.c | 62 ++++++++------ .../iris33/src/msm_vidc_power_iris33.c | 82 +++++++++++-------- 5 files changed, 116 insertions(+), 66 deletions(-) diff --git a/driver/platform/common/inc/perf_static_model.h b/driver/platform/common/inc/perf_static_model.h index d6b1a34311..dff9eea546 100644 --- a/driver/platform/common/inc/perf_static_model.h +++ b/driver/platform/common/inc/perf_static_model.h @@ -161,7 +161,7 @@ struct api_calculation_freq_output { u32 vsp_min_freq; u32 tensilica_min_freq; u32 hw_min_freq; - u32 enc_hqmode; + u32 enc_hqmode; struct corner_voting usecase_corner; }; diff --git a/driver/platform/pineapple/inc/pineapple_technology.h b/driver/platform/pineapple/inc/pineapple_technology.h index 57dbdde004..78041169e0 100644 --- a/driver/platform/pineapple/inc/pineapple_technology.h +++ b/driver/platform/pineapple/inc/pineapple_technology.h @@ -25,8 +25,8 @@ static u32 frequency_table_pineapple[2][6] = */ /* Tensilica cycles profiled by FW team in lanai device Feb 2022 */ -#define DECODER_VPP_FW_OVERHEAD_PINEAPPLE_AV1D ((80000*3)/2)); -#define DECODER_VPP_FW_OVERHEAD_PINEAPPLE_NONAV1D ((60000*3)/2); +#define DECODER_VPP_FW_OVERHEAD_PINEAPPLE_AV1D ((80000*3)/2) +#define DECODER_VPP_FW_OVERHEAD_PINEAPPLE_NONAV1D ((60000*3)/2) /* Tensilica cycles */ #define DECODER_VPP_FW_OVERHEAD_PINEAPPLE (0) diff --git a/driver/variant/iris33/src/msm_vidc_bus_iris33.c b/driver/variant/iris33/src/msm_vidc_bus_iris33.c index 41568fed7a..44afe2e5fd 100644 --- a/driver/variant/iris33/src/msm_vidc_bus_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_bus_iris33.c @@ -125,7 +125,7 @@ u32 get_compression_factors(struct compression_factors *compression_factor, return 0; } -static int calculate_bandwidth_decoder_iris3( +static int calculate_bandwidth_decoder_iris33( struct api_calculation_input codec_input, struct api_calculation_bw_output *codec_output) { @@ -298,7 +298,7 @@ static int calculate_bandwidth_decoder_iris3( else av1tile_index_entry = 6; - /* NOT PWC //or average and power case */ + /* NOT PWC or average and power case */ if (codec_input.complexity_setting != 0) av1tile_complexity = 1; else @@ -551,7 +551,7 @@ static int calculate_bandwidth_decoder_iris3( return 0; } -static int calculate_bandwidth_encoder_iris3( +static int calculate_bandwidth_encoder_iris33( struct api_calculation_input codec_input, struct api_calculation_bw_output *codec_output) { @@ -703,6 +703,16 @@ static int calculate_bandwidth_encoder_iris3( codec_output->collocated_rd_wr_total_ddr = codec_output->collocated_rd_wr_total_noc; + /* I frame only */ + if (codec_input.hierachical_layer == 7) { + codec_output->collocated_rd_noc = 0; + codec_output->collocated_wr_noc = 0; + codec_output->collocated_rd_ddr = 0; + codec_output->collocated_wr_ddr = 0; + codec_output->collocated_rd_wr_total_noc = 0; + codec_output->collocated_rd_wr_total_ddr = 0; + } + /* accumulation */ codec_output->noc_bw_rd += codec_output->collocated_rd_noc; codec_output->noc_bw_wr += codec_output->collocated_wr_noc; @@ -806,6 +816,18 @@ static int calculate_bandwidth_encoder_iris3( codec_output->dpb_wr_ddr = (en_llc_enable_rec_wr_uncompleted) ? 0 : codec_output->dpb_wr_noc; + /* I frame only */ + if (codec_input.hierachical_layer == 7) { + codec_output->dpb_rd_y_noc = 0; + codec_output->dpb_rd_crcb_noc =0; + codec_output->dpb_rdwr_duetooverlap_noc =0; + codec_output->dpb_wr_noc =0; + codec_output->dpb_rd_y_ddr=0; + codec_output->dpb_rd_crcb_ddr =0; + codec_output->dpb_rdwr_duetooverlap_ddr=0; + codec_output->dpb_wr_ddr =0; + } + /* accumulation */ codec_output->noc_bw_rd += codec_output->dpb_rd_y_noc; codec_output->noc_bw_rd += codec_output->dpb_rd_crcb_noc; @@ -909,9 +931,9 @@ int msm_vidc_calculate_bandwidth(struct api_calculation_input codec_input, int rc = 0; if (codec_input.decoder_or_encoder == CODEC_DECODER) { - rc = calculate_bandwidth_decoder_iris3(codec_input, codec_output); + rc = calculate_bandwidth_decoder_iris33(codec_input, codec_output); } else if (codec_input.decoder_or_encoder == CODEC_ENCODER) { - rc = calculate_bandwidth_encoder_iris3(codec_input, codec_output); + rc = calculate_bandwidth_encoder_iris33(codec_input, codec_output); } else { d_vpr_e("%s: invalid codec\n", codec_input.decoder_or_encoder); return -EINVAL; diff --git a/driver/variant/iris33/src/msm_vidc_clock_iris33.c b/driver/variant/iris33/src/msm_vidc_clock_iris33.c index b09be23775..cbc617c10b 100644 --- a/driver/variant/iris33/src/msm_vidc_clock_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_clock_iris33.c @@ -198,7 +198,6 @@ static int calculate_vsp_min_freq(struct api_calculation_input codec_input, u8 bitrate_entry = get_bitrate_entry(pixle_count); /* TODO EXTRACT */ input_bitrate_fp = ((u32)(codec_input.bitrate_mbps * 100 + 99)) / 100; - vsp_hw_min_frequency = frequency_table_pineapple[0][1] * input_bitrate_fp * 1000; /* 8KUHD60fps with B frame */ if ((pixle_count >= fp_pixel_count_bar0) && @@ -215,54 +214,60 @@ static int calculate_vsp_min_freq(struct api_calculation_input codec_input, * * TODO : Reduce these conditions by removing the zero entries from Bitrate table. */ - vsp_hw_min_frequency = frequency_table_pineapple[0][1] * + + vsp_hw_min_frequency = frequency_table_pineapple[0][2] * input_bitrate_fp * 1000; if (codec_input.codec == CODEC_AV1) - vsp_hw_min_frequency = frequency_table_pineapple[0][0] * + vsp_hw_min_frequency = frequency_table_pineapple[0][1] * input_bitrate_fp * 1000; if ((codec_input.codec == CODEC_H264) || - (codec_input.codec == CODEC_H264_CAVLC) || - ((codec_input.codec == CODEC_HEVC) && - (codec_input.vsp_vpp_mode == CODEC_VSPVPP_MODE_1S))) { + (codec_input.codec == CODEC_H264_CAVLC)) { + vsp_hw_min_frequency = (frequency_table_pineapple[0][2] * 1000 + + (fw_sw_vsp_offset - 1)); vsp_hw_min_frequency = - DIV_ROUND_UP(frequency_table_pineapple[0][1], fw_sw_vsp_offset); - } else if (((codec_input.codec == CODEC_HEVC) && - (codec_input.vsp_vpp_mode == CODEC_VSPVPP_MODE_2S)) - || (codec_input.codec == CODEC_VP9) - || (codec_input.codec == CODEC_AV1)) { + DIV_ROUND_UP(vsp_hw_min_frequency, fw_sw_vsp_offset); + } else { if (codec_input.vsp_vpp_mode == CODEC_VSPVPP_MODE_2S) { + vsp_hw_min_frequency = vsp_hw_min_frequency + + (bitrate_table_pineapple_2stage_fp[codec][0] * + fw_sw_vsp_offset - 1); vsp_hw_min_frequency = DIV_ROUND_UP(vsp_hw_min_frequency, - (bitrate_table_pineapple_2stage_fp[codec][0] * fw_sw_vsp_offset)); + (bitrate_table_pineapple_2stage_fp[codec][0]) * + fw_sw_vsp_offset); } else { + vsp_hw_min_frequency = vsp_hw_min_frequency + + (bitrate_table_pineapple_1stage_fp[codec][0] * + fw_sw_vsp_offset - 1); vsp_hw_min_frequency = DIV_ROUND_UP(vsp_hw_min_frequency, - (bitrate_table_pineapple_1stage_fp[codec][0] * fw_sw_vsp_offset)); + (bitrate_table_pineapple_1stage_fp[codec][0]) * + fw_sw_vsp_offset); } } } else { - vsp_hw_min_frequency = frequency_table_pineapple[0][1] * + vsp_hw_min_frequency = frequency_table_pineapple[0][2] * input_bitrate_fp * 1000; if (codec_input.codec == CODEC_AV1 && bitrate_entry == 1) - vsp_hw_min_frequency = frequency_table_pineapple[0][0] * + vsp_hw_min_frequency = frequency_table_pineapple[0][1] * input_bitrate_fp * 1000; - if ((codec_input.codec == CODEC_H264_CAVLC) && - (codec_input.entropy_coding_mode == CODEC_ENTROPY_CODING_CAVLC)) - codec = CODEC_H264_CAVLC; - else if ((codec_input.codec == CODEC_H264) && - (codec_input.entropy_coding_mode == CODEC_ENTROPY_CODING_CABAC)) - codec = CODEC_H264; - - if (codec_input.vsp_vpp_mode == CODEC_VSPVPP_MODE_2S) + if (codec_input.vsp_vpp_mode == CODEC_VSPVPP_MODE_2S) { + vsp_hw_min_frequency = vsp_hw_min_frequency + + (bitrate_table_pineapple_2stage_fp[codec][bitrate_entry] * + fw_sw_vsp_offset - 1); vsp_hw_min_frequency = DIV_ROUND_UP(vsp_hw_min_frequency, (bitrate_table_pineapple_2stage_fp[codec][bitrate_entry]) * fw_sw_vsp_offset); - else + } else { + vsp_hw_min_frequency = vsp_hw_min_frequency + + (bitrate_table_pineapple_1stage_fp[codec][bitrate_entry] * + fw_sw_vsp_offset - 1); vsp_hw_min_frequency = DIV_ROUND_UP(vsp_hw_min_frequency, (bitrate_table_pineapple_1stage_fp[codec][bitrate_entry]) * fw_sw_vsp_offset); + } } codec_output->vsp_min_freq = vsp_hw_min_frequency; @@ -322,6 +327,7 @@ static int calculate_vpp_min_freq(struct api_calculation_input codec_input, u32 lpmode_uhd_cycle_permb = 0; u32 hqmode1080p_cycle_permb = 0; u32 encoder_vpp_target_clk_per_mb = 0; + u32 decoder_vpp_fw_overhead = DECODER_VPP_FW_OVERHEAD_PINEAPPLE; codec_mbspersession_pineaple = calculate_number_mbs_pineapple(codec_input.frame_width, @@ -342,11 +348,16 @@ static int calculate_vpp_min_freq(struct api_calculation_input codec_input, pipe_penalty_codec + 999) / 1000; } + if (codec_input.codec == CODEC_AV1) + decoder_vpp_fw_overhead = DECODER_VPP_FW_OVERHEAD_PINEAPPLE_AV1D; + else + decoder_vpp_fw_overhead = DECODER_VPP_FW_OVERHEAD_PINEAPPLE_NONAV1D; + if (codec_input.vsp_vpp_mode == CODEC_VSPVPP_MODE_2S) { /* FW overhead, convert FW cycles to impact to one pipe */ u64 decoder_vpp_fw_overhead = 0; decoder_vpp_fw_overhead = - DIV_ROUND_UP((DECODER_VPP_FW_OVERHEAD_PINEAPPLE * 10 * + DIV_ROUND_UP((decoder_vpp_fw_overhead * 10 * codec_input.frame_rate), 15); decoder_vpp_fw_overhead = @@ -407,6 +418,7 @@ static int calculate_vpp_min_freq(struct api_calculation_input codec_input, } else { /* encoder */ /* Decide LP/HQ */ u8 hq_mode = 0; + if (codec_input.pipe_num > 1) if (codec_input.frame_width * codec_input.frame_height <= 1920 * 1080) diff --git a/driver/variant/iris33/src/msm_vidc_power_iris33.c b/driver/variant/iris33/src/msm_vidc_power_iris33.c index 3760dc4a77..b632b5dcac 100644 --- a/driver/variant/iris33/src/msm_vidc_power_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_power_iris33.c @@ -40,10 +40,13 @@ static int msm_vidc_init_codec_input_freq(struct msm_vidc_inst *inst, u32 data_s codec_input->codec = CODEC_H264; codec_input->lcu_size = 16; if (inst->capabilities->cap[ENTROPY_MODE].value == - V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC) + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC) { codec_input->entropy_coding_mode = CODEC_ENTROPY_CODING_CABAC; - else + codec_input->codec = CODEC_H264; + } else { codec_input->entropy_coding_mode = CODEC_ENTROPY_CODING_CAVLC; + codec_input->codec = CODEC_H264_CAVLC; + } } else if (inst->codec == MSM_VIDC_HEVC) { codec_input->codec = CODEC_HEVC; codec_input->lcu_size = 32; @@ -98,8 +101,13 @@ static int msm_vidc_init_codec_input_freq(struct msm_vidc_inst *inst, u32 data_s inst->fmts[INPUT_PORT].fmt.pix_mp.pixelformat, __func__); codec_input->linear_opb = is_linear_colorformat(color_fmt); - codec_input->bitrate_mbps = - (codec_input->frame_rate * data_size * 8) / 1000000; + + if (inst->domain == MSM_VIDC_DECODER) + codec_input->bitrate_mbps = + (codec_input->frame_rate * data_size * 8) / 1000000; + else + codec_input->bitrate_mbps = + inst->capabilities->cap[BIT_RATE].value / 1000000; /* disable av1d commercial tile */ codec_input->av1d_commer_tile_enable = 0; @@ -130,7 +138,19 @@ static int msm_vidc_init_codec_input_bus(struct msm_vidc_inst *inst, struct vidc codec_input->chipset_gen = MSM_PINEAPPLE; if (d->codec == MSM_VIDC_H264) { - codec_input->codec = CODEC_H264; + if (inst->capabilities->cap[ENTROPY_MODE].value == + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC) { + codec_input->entropy_coding_mode = CODEC_ENTROPY_CODING_CABAC; + codec_input->codec = CODEC_H264; + } else if (inst->capabilities->cap[ENTROPY_MODE].value == + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC) { + codec_input->entropy_coding_mode = CODEC_ENTROPY_CODING_CAVLC; + codec_input->codec = CODEC_H264_CAVLC; + } else { + d_vpr_e("%s: invalid entropy %d\n", __func__, + inst->capabilities->cap[ENTROPY_MODE].value); + return -EINVAL; + } } else if (d->codec == MSM_VIDC_HEVC) { codec_input->codec = CODEC_HEVC; } else if (d->codec == MSM_VIDC_VP9) { @@ -157,18 +177,6 @@ static int msm_vidc_init_codec_input_bus(struct msm_vidc_inst *inst, struct vidc return -EINVAL; } - if (inst->capabilities->cap[ENTROPY_MODE].value == - V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC) { - codec_input->entropy_coding_mode = CODEC_ENTROPY_CODING_CABAC; - } else if (inst->capabilities->cap[ENTROPY_MODE].value == - V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC) { - codec_input->entropy_coding_mode = CODEC_ENTROPY_CODING_CAVLC; - } else { - d_vpr_e("%s: invalid entropy %d\n", __func__, - inst->capabilities->cap[ENTROPY_MODE].value); - return -EINVAL; - } - /* * Used for calculating Encoder GOP Complexity * hierachical_layer=0..7 used as Array Index @@ -224,19 +232,24 @@ static int msm_vidc_init_codec_input_bus(struct msm_vidc_inst *inst, struct vidc /* TODO Confirm if no multiref */ codec_input->encoder_multiref = 0; /* set as no multiref */ - codec_input->bitrate_mbps = (d->bitrate / 1000000); /* bps 10; set as 10mbps */ + codec_input->bitrate_mbps = (d->bitrate / 1000000); opb_compression_enabled = d->num_formats >= 2 && __ubwc(d->color_formats[1]); - /* ANDROID CR is in Q16 format, StaticModel CR in x100 format */ - codec_input->cr_dpb = ((Q16_INT(d->compression_ratio)*100) + - Q16_FRAC(d->compression_ratio)); - - codec_input->cr_opb = opb_compression_enabled ? - codec_input->cr_dpb : FP_ONE; - - codec_input->cr_ipb = ((Q16_INT(d->input_cr)*100) + Q16_FRAC(d->input_cr)); - codec_input->cr_rpb = codec_input->cr_dpb; /* cr_rpb ony for encoder */ + /* video driver CR is in Q16 format, StaticModel CR in x100 format */ + if (d->domain == MSM_VIDC_DECODER) { + codec_input->cr_dpb = ((Q16_INT(d->compression_ratio)*100) + + Q16_FRAC(d->compression_ratio)); + codec_input->cr_opb = codec_input->cr_dpb; + if (codec_input->split_opb == 1) { + /* need to check the value if linear opb, currently set min cr */ + codec_input->cr_opb = 100; + } + } else { + codec_input->cr_ipb = ((Q16_INT(d->input_cr)*100) + Q16_FRAC(d->input_cr)); + codec_input->cr_rpb = ((Q16_INT(d->compression_ratio)*100) + + Q16_FRAC(d->compression_ratio)); + } /* disable by default, only enable for aurora depth map session */ codec_input->lumaonly_decode = 0; @@ -375,10 +388,12 @@ static u64 msm_vidc_calc_freq_iris33_new(struct msm_vidc_inst *inst, u32 data_si } } - freq = codec_output.hw_min_freq * 1000000; /* Convert to Hz */ + freq = (u64)codec_output.hw_min_freq * 1000000; /* Convert to Hz */ - i_vpr_p(inst, "%s: filled len %d, required freq %llu, fps %u, mbpf %u\n", - __func__, data_size, freq, fps, mbpf); + i_vpr_p(inst, "%s: filled len %d, required freq %llu, vpp %u, vsp %u, tensilica %u, hw_freq %u, fps %u, mbpf %u\n", + __func__, data_size, freq, codec_output.vpp_min_freq, + codec_output.vsp_min_freq, codec_output.tensilica_min_freq, + codec_output.hw_min_freq, fps, mbpf); if (inst->codec == MSM_VIDC_AV1 || (inst->iframe && is_hevc_10bit_decode_session(inst))) { @@ -662,6 +677,10 @@ u64 msm_vidc_calc_freq_iris33_legacy(struct msm_vidc_inst *inst, u32 data_size) freq = max(vpp_cycles, vsp_cycles); freq = max(freq, fw_cycles); + i_vpr_p(inst, "%s: filled len %d, required freq %llu, vpp %llu, vsp %llu, fw_cycles %llu, fps %u, mbpf %u\n", + __func__, data_size, freq, + vpp_cycles, vsp_cycles, fw_cycles, fps, mbpf); + if (inst->codec == MSM_VIDC_AV1 || (inst->iframe && is_hevc_10bit_decode_session(inst))) { /* @@ -675,9 +694,6 @@ u64 msm_vidc_calc_freq_iris33_legacy(struct msm_vidc_inst *inst, u32 data_size) freq = core->resource->freq_set.freq_tbl[1].freq; } - i_vpr_p(inst, "%s: filled len %d, required freq %llu, fps %u, mbpf %u\n", - __func__, data_size, freq, fps, mbpf); - return freq; } From dde3e01a6365bcf9774a757d9c75383542af53d6 Mon Sep 17 00:00:00 2001 From: Ashish Patil Date: Tue, 7 Mar 2023 18:19:59 -0800 Subject: [PATCH 0847/1061] video: driver: enabling new power calculation changes Change-Id: I9ea52a2f766921f8012a951f5e07a2d18d5d7e55 Signed-off-by: Ashish Patil --- driver/variant/iris33/inc/msm_vidc_power_iris33.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/driver/variant/iris33/inc/msm_vidc_power_iris33.h b/driver/variant/iris33/inc/msm_vidc_power_iris33.h index cff964540b..ec51a7fe35 100644 --- a/driver/variant/iris33/inc/msm_vidc_power_iris33.h +++ b/driver/variant/iris33/inc/msm_vidc_power_iris33.h @@ -10,7 +10,7 @@ #include "msm_vidc_inst.h" #include "msm_vidc_power.h" -#define ENABLE_LEGACY_POWER_CALCULATIONS 1 +#define ENABLE_LEGACY_POWER_CALCULATIONS 0 int msm_vidc_ring_buf_count_iris33(struct msm_vidc_inst *inst, u32 data_size); u64 msm_vidc_calc_freq_iris33(struct msm_vidc_inst* inst, u32 data_size); From 441d4be45e8d8e4e9ca87adfbb675d36090deb64 Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Wed, 8 Mar 2023 14:35:20 -0800 Subject: [PATCH 0848/1061] video: driver: encoder delay start: superframe make superframe control as dynamic. Change-Id: I54525aa1e31b3078e13e77c59474bf6b7298cf0d Signed-off-by: Darshana Patil --- driver/platform/pineapple/src/msm_vidc_pineapple.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/driver/platform/pineapple/src/msm_vidc_pineapple.c b/driver/platform/pineapple/src/msm_vidc_pineapple.c index d9ab1e1413..d9fa6e4293 100644 --- a/driver/platform/pineapple/src/msm_vidc_pineapple.c +++ b/driver/platform/pineapple/src/msm_vidc_pineapple.c @@ -653,7 +653,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { {SUPER_FRAME, ENC, H264|HEVC, 0, 32, 1, 0, V4L2_CID_MPEG_VIDC_SUPERFRAME, 0, - CAP_FLAG_NONE}, + CAP_FLAG_DYNAMIC_ALLOWED}, {SLICE_DECODE, DEC, H264|HEVC|AV1, V4L2_MPEG_MSM_VIDC_DISABLE, From a27c15b1c54650dcee00c4c0c6e3a8fe432a3c15 Mon Sep 17 00:00:00 2001 From: Ankush Mitra Date: Wed, 1 Mar 2023 21:15:32 +0530 Subject: [PATCH 0849/1061] video: driver: resume video core before running ssr command Resume video hardware if it is already power collapse to SSR command else SSR command will not take effect. Change-Id: I74def614a5a5174c052d14f47cecd1f1a619529e Signed-off-by: Ankush Mitra --- driver/vidc/src/msm_vidc_driver.c | 4 ++++ driver/vidc/src/venus_hfi.c | 10 ++++++++++ 2 files changed, 14 insertions(+) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index b7764bef2f..3ba4c39461 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -4652,6 +4652,8 @@ int msm_vidc_trigger_ssr(struct msm_vidc_core *core, * reserved: 8-31 bits * test_addr: 32-63 bits */ + d_vpr_e("%s: trigger ssr is called. trigger ssr val: %#llx\n", + __func__, trigger_ssr_val); ssr->ssr_type = (trigger_ssr_val & (unsigned long)SSR_TYPE) >> SSR_TYPE_SHIFT; ssr->sub_client_id = (trigger_ssr_val & @@ -4675,6 +4677,8 @@ void msm_vidc_ssr_handler(struct work_struct *work) } ssr = &core->ssr; + d_vpr_e("%s: ssr handler is called, core state: %s\n", + __func__, core_state_name(core->state)); core_lock(core, __func__); if (is_core_state(core, MSM_VIDC_CORE_INIT)) { /* diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index 8454d4e8f3..d866ba40dc 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -1075,6 +1075,16 @@ int venus_hfi_trigger_ssr(struct msm_vidc_core *core, u32 type, return -EINVAL; } + /* + * call resume before preparing ssr hfi packet in core->packet + * otherwise ssr hfi packet in core->packet will be overwritten + * by __resume() call (inside __cmdq_write) which is preparing + * ifpc hfi packets in core->packet + */ + rc = __resume(core); + if (rc) + return rc; + payload[0] = client_id << 4 | type; payload[1] = addr; From 964752c27c6b112eba6e437042302c9bce539f52 Mon Sep 17 00:00:00 2001 From: Ankush Mitra Date: Wed, 4 Jan 2023 14:34:39 +0530 Subject: [PATCH 0850/1061] video: driver: Remove hard parent dependency Remove hard parent dependency adjust it accordingly. Change-Id: I8d5de2ba4199570f366745b980b451099467ebaa Signed-off-by: Ankush Mitra --- .../platform/common/src/msm_vidc_platform.c | 184 ++++++++++++------ driver/vidc/inc/msm_vidc_control.h | 2 + driver/vidc/src/msm_vidc_control.c | 16 +- driver/vidc/src/msm_vidc_driver.c | 30 ++- 4 files changed, 159 insertions(+), 73 deletions(-) diff --git a/driver/platform/common/src/msm_vidc_platform.c b/driver/platform/common/src/msm_vidc_platform.c index 1e9b39d16d..1078ca18e4 100644 --- a/driver/platform/common/src/msm_vidc_platform.c +++ b/driver/platform/common/src/msm_vidc_platform.c @@ -944,19 +944,25 @@ int msm_vidc_adjust_ltr_count(void *instance, struct v4l2_ctrl *ctrl) adjusted_value = ctrl ? ctrl->val : capability->cap[LTR_COUNT].value; if (msm_vidc_get_parent_value(inst, LTR_COUNT, BITRATE_MODE, - &rc_type, __func__) || - msm_vidc_get_parent_value(inst, LTR_COUNT, ALL_INTRA, - &all_intra, __func__)) + &rc_type, __func__)) return -EINVAL; if ((rc_type != HFI_RC_OFF && rc_type != HFI_RC_CBR_CFR && - rc_type != HFI_RC_CBR_VFR) || - all_intra) { + rc_type != HFI_RC_CBR_VFR)) { adjusted_value = 0; i_vpr_h(inst, - "%s: ltr count unsupported, rc_type: %#x, all_intra %d\n", - __func__, rc_type, all_intra); + "%s: ltr count unsupported, rc_type: %#x\n", + __func__, rc_type); + goto exit; + } + + if (is_valid_cap(inst, ALL_INTRA)) { + if (msm_vidc_get_parent_value(inst, LTR_COUNT, + ALL_INTRA, &all_intra, __func__)) + return -EINVAL; + if (all_intra) + adjusted_value = 0; goto exit; } @@ -1126,17 +1132,24 @@ int msm_vidc_adjust_output_order(void *instance, struct v4l2_ctrl *ctrl) adjusted_value = ctrl ? ctrl->val : capability->cap[OUTPUT_ORDER].value; - if (msm_vidc_get_parent_value(inst, OUTPUT_ORDER, THUMBNAIL_MODE, - &tn_mode, __func__) || - msm_vidc_get_parent_value(inst, OUTPUT_ORDER, DISPLAY_DELAY, + if (msm_vidc_get_parent_value(inst, OUTPUT_ORDER, DISPLAY_DELAY, &display_delay, __func__) || msm_vidc_get_parent_value(inst, OUTPUT_ORDER, DISPLAY_DELAY_ENABLE, &display_delay_enable, __func__)) return -EINVAL; - if (tn_mode || (display_delay_enable && !display_delay)) + if (display_delay_enable && !display_delay) adjusted_value = 1; + if (is_valid_cap(inst, THUMBNAIL_MODE)) { + if (msm_vidc_get_parent_value(inst, OUTPUT_ORDER, THUMBNAIL_MODE, + &tn_mode, __func__)) + return -EINVAL; + + if (tn_mode == 1) + adjusted_value = 1; + } + msm_vidc_update_cap_value(inst, OUTPUT_ORDER, adjusted_value, __func__); @@ -1300,7 +1313,8 @@ int msm_vidc_adjust_slice_count(void *instance, struct v4l2_ctrl *ctrl) struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; struct msm_vidc_inst_capability *capability; struct v4l2_format *output_fmt; - s32 adjusted_value, rc_type = -1, slice_mode, all_intra, enh_layer_count = 0; + s32 adjusted_value, rc_type = -1, slice_mode, all_intra = 0, + enh_layer_count = 0; u32 slice_val, mbpf = 0, mbps = 0, max_mbpf = 0, max_mbps = 0, bitrate = 0; u32 update_cap, max_avg_slicesize, output_width, output_height; u32 min_width, min_height, max_width, max_height, fps; @@ -1320,14 +1334,14 @@ int msm_vidc_adjust_slice_count(void *instance, struct v4l2_ctrl *ctrl) if (msm_vidc_get_parent_value(inst, SLICE_MODE, BITRATE_MODE, &rc_type, __func__) || msm_vidc_get_parent_value(inst, SLICE_MODE, - ALL_INTRA, &all_intra, __func__) || - msm_vidc_get_parent_value(inst, SLICE_MODE, ENH_LAYER_COUNT, &enh_layer_count, __func__)) return -EINVAL; if (capability->cap[BIT_RATE].flags & CAP_FLAG_CLIENT_SET) { bitrate = capability->cap[BIT_RATE].value; - } else if (msm_vidc_check_all_layer_bitrate_set(inst)) { + } else if (!msm_vidc_get_parent_value(inst, SLICE_MODE, + ENH_LAYER_COUNT, &enh_layer_count, __func__) && + msm_vidc_check_all_layer_bitrate_set(inst)) { bitrate = msm_vidc_get_cumulative_bitrate(inst); } else { adjusted_value = V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE; @@ -1343,16 +1357,29 @@ int msm_vidc_adjust_slice_count(void *instance, struct v4l2_ctrl *ctrl) (rc_type != HFI_RC_OFF && rc_type != HFI_RC_CBR_CFR && rc_type != HFI_RC_CBR_VFR && - rc_type != HFI_RC_VBR_CFR) || - all_intra) { + rc_type != HFI_RC_VBR_CFR)) { adjusted_value = V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE; update_cap = SLICE_MODE; i_vpr_h(inst, - "%s: slice unsupported, fps: %u, rc_type: %#x, all_intra %d\n", - __func__, fps, rc_type, all_intra); + "%s: slice unsupported, fps: %u, rc_type: %#x\n", + __func__, fps, rc_type); goto exit; } + if (is_valid_cap(inst, ALL_INTRA)) { + if (msm_vidc_get_parent_value(inst, SLICE_MODE, + ALL_INTRA, &all_intra, __func__)) + return -EINVAL; + + if (all_intra == 1) { + adjusted_value = V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE; + update_cap = SLICE_MODE; + i_vpr_h(inst, + "%s: slice unsupported, all_intra %d\n", __func__, all_intra); + goto exit; + } + } + output_fmt = &inst->fmts[OUTPUT_PORT]; output_width = output_fmt->fmt.pix_mp.width; output_height = output_fmt->fmt.pix_mp.height; @@ -1463,12 +1490,15 @@ static int msm_vidc_adjust_static_layer_count_and_type(struct msm_vidc_inst *ins goto exit; } - if (!is_meta_tx_inp_enabled(inst, META_EVA_STATS) && - hb_requested && (layer_count > 1)) { - layer_count = 1; - i_vpr_h(inst, - "%s: cvp disable supports only one enh layer HB\n", - __func__); + if (hb_requested && layer_count > 1) { + if (!is_valid_cap(inst, META_EVA_STATS) || + !is_meta_tx_inp_enabled(inst, META_EVA_STATS)) { + i_vpr_h(inst, + "%s: only one layer of heirB supported as eva statistics not available\n", + __func__); + layer_count = 1; + goto exit; + } } /* decide hfi layer type */ @@ -1528,9 +1558,7 @@ int msm_vidc_adjust_layer_count(void *instance, struct v4l2_ctrl *ctrl) capability->cap[ENH_LAYER_COUNT].value; if (!is_parent_available(inst, ENH_LAYER_COUNT, - BITRATE_MODE, __func__) || - !is_parent_available(inst, ENH_LAYER_COUNT, - META_EVA_STATS, __func__)) + BITRATE_MODE, __func__)) return -EINVAL; if (!inst->bufq[OUTPUT_PORT].vb2q->streaming) { @@ -2024,20 +2052,27 @@ int msm_vidc_adjust_blur_type(void *instance, struct v4l2_ctrl *ctrl) if (msm_vidc_get_parent_value(inst, BLUR_TYPES, BITRATE_MODE, &rc_type, __func__) || msm_vidc_get_parent_value(inst, BLUR_TYPES, MIN_QUALITY, - &min_quality, __func__) || - msm_vidc_get_parent_value(inst, BLUR_TYPES, META_ROI_INFO, - &roi_enable, __func__)) + &min_quality, __func__)) return -EINVAL; if (adjusted_value == MSM_VIDC_BLUR_EXTERNAL) { if (is_scaling_enabled(inst) || min_quality) adjusted_value = MSM_VIDC_BLUR_NONE; } else if (adjusted_value == MSM_VIDC_BLUR_ADAPTIVE) { + if (is_valid_cap(inst, META_ROI_INFO)) { + if (msm_vidc_get_parent_value(inst, BLUR_TYPES, + META_ROI_INFO, &roi_enable, __func__)) + return -EINVAL; + if (is_meta_tx_inp_enabled(inst, META_ROI_INFO)) { + adjusted_value = MSM_VIDC_BLUR_NONE; + goto exit; + } + } + if (is_scaling_enabled(inst) || min_quality || (rc_type != HFI_RC_VBR_CFR && rc_type != HFI_RC_CBR_CFR && - rc_type != HFI_RC_CBR_VFR) || - roi_enable) { + rc_type != HFI_RC_CBR_VFR)) { adjusted_value = MSM_VIDC_BLUR_NONE; goto exit; } @@ -2283,8 +2318,6 @@ int msm_vidc_adjust_min_quality(void *instance, struct v4l2_ctrl *ctrl) if (msm_vidc_get_parent_value(inst, MIN_QUALITY, BITRATE_MODE, &rc_type, __func__) || msm_vidc_get_parent_value(inst, MIN_QUALITY, - META_ROI_INFO, &roi_enable, __func__) || - msm_vidc_get_parent_value(inst, MIN_QUALITY, ENH_LAYER_COUNT, &enh_layer_count, __func__)) return -EINVAL; @@ -2339,12 +2372,17 @@ int msm_vidc_adjust_min_quality(void *instance, struct v4l2_ctrl *ctrl) goto update_and_exit; } - if (is_meta_tx_inp_enabled(inst, META_ROI_INFO)) { - i_vpr_h(inst, - "%s: min quality not supported with roi metadata\n", - __func__); - adjusted_value = 0; - goto update_and_exit; + if (is_valid_cap(inst, META_ROI_INFO)) { + if (msm_vidc_get_parent_value(inst, MIN_QUALITY, + META_ROI_INFO, &roi_enable, __func__)) + return -EINVAL; + if (is_meta_tx_inp_enabled(inst, META_ROI_INFO)) { + i_vpr_h(inst, + "%s: min quality not supported with roi metadata\n", + __func__); + adjusted_value = 0; + goto update_and_exit; + } } if (enh_layer_count > 0 && inst->hfi_layer_type != HFI_HIER_B) { @@ -2369,7 +2407,7 @@ int msm_vidc_adjust_preprocess(void *instance, struct v4l2_ctrl *ctrl) { s32 adjusted_value; struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - s32 brs = -1, eva_status = -1; + s32 brs = 0, eva_status = -1; u32 width, height, frame_rate, operating_rate, max_fps; struct v4l2_format *f; @@ -2380,12 +2418,6 @@ int msm_vidc_adjust_preprocess(void *instance, struct v4l2_ctrl *ctrl) adjusted_value = inst->capabilities->cap[REQUEST_PREPROCESS].value; - if (msm_vidc_get_parent_value(inst, REQUEST_PREPROCESS, CONTENT_ADAPTIVE_CODING, - &brs, __func__) || - msm_vidc_get_parent_value(inst, REQUEST_PREPROCESS, META_EVA_STATS, - &eva_status, __func__)) - return -EINVAL; - width = inst->crop.width; height = inst->crop.height; frame_rate = msm_vidc_get_frame_rate(inst); @@ -2399,14 +2431,47 @@ int msm_vidc_adjust_preprocess(void *instance, struct v4l2_ctrl *ctrl) * client did not enable EVA metadata statistics and * BRS enabled and upto 4k @ 60 fps */ - if (!is_meta_tx_inp_enabled(inst, META_EVA_STATS) && - brs == 1 && - res_is_less_than_or_equal_to(width, height, 3840, 2160) && + if (is_valid_cap(inst, META_EVA_STATS)) { + if (msm_vidc_get_parent_value(inst, + REQUEST_PREPROCESS, + META_EVA_STATS, + &eva_status, __func__)) + return -EINVAL; + /* preprocess not required if client provides eva statistics */ + if (is_meta_tx_inp_enabled(inst, META_EVA_STATS)) { + adjusted_value = 0; + goto update_preprocess; + } + } + + if (is_valid_cap(inst, CONTENT_ADAPTIVE_CODING)) { + if (msm_vidc_get_parent_value(inst, + REQUEST_PREPROCESS, + CONTENT_ADAPTIVE_CODING, + &brs, __func__)) + return -EINVAL; + if (brs == 0) { + /* preprocess not required as BRS not enabled */ + adjusted_value = 0; + goto update_preprocess; + } + } else { + /* preprocess not required as BRS not available */ + adjusted_value = 0; + goto update_preprocess; + } + + /* + * eva statistics not available and BRS enabled, so + * preprocess can be enabled upto 4k @ 60 fps + */ + if (res_is_less_than_or_equal_to(width, height, 3840, 2160) && max_fps <= 60) adjusted_value = 1; else adjusted_value = 0; +update_preprocess: msm_vidc_update_cap_value(inst, REQUEST_PREPROCESS, adjusted_value, __func__); @@ -2460,14 +2525,15 @@ int msm_vidc_adjust_dec_lowlatency_mode(void *instance, struct v4l2_ctrl *ctrl) adjusted_value = ctrl ? ctrl->val : capability->cap[LOWLATENCY_MODE].value; - if (msm_vidc_get_parent_value(inst, LOWLATENCY_MODE, META_OUTBUF_FENCE, - &outbuf_fence, __func__)) - return -EINVAL; - - /* enable lowlatency if outbuf fence is enabled */ - if (outbuf_fence & MSM_VIDC_META_ENABLE && - outbuf_fence & MSM_VIDC_META_RX_INPUT) - adjusted_value = 1; + if (is_valid_cap(inst, META_OUTBUF_FENCE)) { + if (msm_vidc_get_parent_value(inst, LOWLATENCY_MODE, META_OUTBUF_FENCE, + &outbuf_fence, __func__)) + return -EINVAL; + /* enable lowlatency if outbuf fence is enabled */ + if (outbuf_fence & MSM_VIDC_META_ENABLE && + outbuf_fence & MSM_VIDC_META_RX_INPUT) + adjusted_value = 1; + } msm_vidc_update_cap_value(inst, LOWLATENCY_MODE, adjusted_value, __func__); diff --git a/driver/vidc/inc/msm_vidc_control.h b/driver/vidc/inc/msm_vidc_control.h index fe5e0d1714..64d8d5c3e6 100644 --- a/driver/vidc/inc/msm_vidc_control.h +++ b/driver/vidc/inc/msm_vidc_control.h @@ -18,6 +18,8 @@ int msm_vidc_s_ctrl(struct msm_vidc_inst *inst, struct v4l2_ctrl *ctrl); int msm_vidc_prepare_dependency_list(struct msm_vidc_inst *inst); int msm_vidc_adjust_set_v4l2_properties(struct msm_vidc_inst *inst); bool is_valid_cap_id(enum msm_vidc_inst_capability_type cap_id); +bool is_valid_cap(struct msm_vidc_inst *inst, + enum msm_vidc_inst_capability_type cap_id); enum msm_vidc_inst_capability_type msm_vidc_get_cap_id( struct msm_vidc_inst *inst, u32 id); #endif diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 38c7370e5b..4b3de8aece 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -152,9 +152,15 @@ bool is_valid_cap_id(enum msm_vidc_inst_capability_type cap_id) return cap_id > INST_CAP_NONE && cap_id < INST_CAP_MAX; } -static inline bool is_valid_cap(struct msm_vidc_inst_cap *cap) +bool is_valid_cap(struct msm_vidc_inst *inst, + enum msm_vidc_inst_capability_type cap_id) { - return is_valid_cap_id(cap->cap_id); + if (!inst || !inst->capabilities) + return false; + if (cap_id <= INST_CAP_NONE || cap_id >= INST_CAP_MAX) + return false; + + return !!inst->capabilities->cap[cap_id].cap_id; } static inline bool is_all_childrens_visited( @@ -268,7 +274,7 @@ static int msm_vidc_adjust_cap(struct msm_vidc_inst *inst, /* validate cap */ cap = &inst->capabilities->cap[cap_id]; - if (!is_valid_cap(cap)) + if (!is_valid_cap(inst, cap->cap_id)) return 0; /* check if adjust supported */ @@ -301,7 +307,7 @@ static int msm_vidc_set_cap(struct msm_vidc_inst *inst, /* validate cap */ cap = &inst->capabilities->cap[cap_id]; - if (!is_valid_cap(cap)) + if (!is_valid_cap(inst, cap->cap_id)) return 0; /* check if set supported */ @@ -947,7 +953,7 @@ int msm_vidc_prepare_dependency_list(struct msm_vidc_inst *inst) /* populate leaf nodes first */ for (i = 1; i < INST_CAP_MAX; i++) { lcap = &capability->cap[i]; - if (!is_valid_cap(lcap)) + if (!is_valid_cap(inst, lcap->cap_id)) continue; /* sanitize cap value */ diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index db277d6d49..b3a3241180 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -4046,17 +4046,17 @@ exit: return rc; } -static void update_inst_capability(struct msm_platform_inst_capability *in, +static int update_inst_capability(struct msm_platform_inst_capability *in, struct msm_vidc_inst_capability *capability) { if (!in || !capability) { d_vpr_e("%s: invalid params %pK %pK\n", __func__, in, capability); - return; + return -EINVAL; } if (in->cap_id >= INST_CAP_MAX) { d_vpr_e("%s: invalid cap id %d\n", __func__, in->cap_id); - return; + return -EINVAL; } capability->cap[in->cap_id].cap_id = in->cap_id; @@ -4067,27 +4067,35 @@ static void update_inst_capability(struct msm_platform_inst_capability *in, capability->cap[in->cap_id].flags = in->flags; capability->cap[in->cap_id].v4l2_id = in->v4l2_id; capability->cap[in->cap_id].hfi_id = in->hfi_id; + + return 0; } -static void update_inst_cap_dependency( +static int update_inst_cap_dependency( struct msm_platform_inst_cap_dependency *in, struct msm_vidc_inst_capability *capability) { if (!in || !capability) { d_vpr_e("%s: invalid params %pK %pK\n", __func__, in, capability); - return; + return -EINVAL; } if (in->cap_id >= INST_CAP_MAX) { d_vpr_e("%s: invalid cap id %d\n", __func__, in->cap_id); - return; + return -EINVAL; + } + + if (capability->cap[in->cap_id].cap_id != in->cap_id) { + d_vpr_e("%s: invalid cap id %d\n", __func__, in->cap_id); + return -EINVAL; } - capability->cap[in->cap_id].cap_id = in->cap_id; memcpy(capability->cap[in->cap_id].children, in->children, sizeof(capability->cap[in->cap_id].children)); capability->cap[in->cap_id].adjust = in->adjust; capability->cap[in->cap_id].set = in->set; + + return 0; } int msm_vidc_deinit_instance_caps(struct msm_vidc_core *core) @@ -4199,8 +4207,10 @@ int msm_vidc_init_instance_caps(struct msm_vidc_core *core) (platform_cap_data[i].codec & core->inst_caps[j].codec)) { /* update core capability */ - update_inst_capability(&platform_cap_data[i], + rc = update_inst_capability(&platform_cap_data[i], &core->inst_caps[j]); + if (rc) + return rc; } } } @@ -4214,9 +4224,11 @@ int msm_vidc_init_instance_caps(struct msm_vidc_core *core) (platform_cap_dependency_data[i].codec & core->inst_caps[j].codec)) { /* update core dependency capability */ - update_inst_cap_dependency( + rc = update_inst_cap_dependency( &platform_cap_dependency_data[i], &core->inst_caps[j]); + if (rc) + return rc; } } } From a0798a6902e46ec0d28d7f32becdbbde5e005d24 Mon Sep 17 00:00:00 2001 From: Chinmay Sawarkar Date: Wed, 22 Feb 2023 14:27:40 -0800 Subject: [PATCH 0851/1061] video: driver: Change ARP buffer context bank In non secure case, ARP buffer will use CB0. Change-Id: Id7bb33906d374f230b2054455e6efdc41e710abe Signed-off-by: Chinmay Sawarkar --- driver/vidc/src/msm_vidc_memory_ext.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/driver/vidc/src/msm_vidc_memory_ext.c b/driver/vidc/src/msm_vidc_memory_ext.c index 8ea094712b..9db5313168 100644 --- a/driver/vidc/src/msm_vidc_memory_ext.c +++ b/driver/vidc/src/msm_vidc_memory_ext.c @@ -340,7 +340,7 @@ static u32 msm_vidc_buffer_region_ext(struct msm_vidc_inst *inst, if (!is_secure_session(inst)) { switch (buffer_type) { case MSM_VIDC_BUF_ARP: - region = MSM_VIDC_SECURE_NONPIXEL; + region = MSM_VIDC_NON_SECURE; break; case MSM_VIDC_BUF_INPUT: if (is_encode_session(inst)) From 9019b6bc09a1a5edaba387f06af2163143a2e17b Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Thu, 9 Mar 2023 12:57:19 -0800 Subject: [PATCH 0852/1061] Revert "video: driver: disable 5 LTR support" This reverts commit 8acf4313fc70612a7adfdac48f97d5f21b1b8c6a. Change-Id: I5adc9e59b2b56a4616330bf7a2aec402ca827232 --- .../pineapple/src/msm_vidc_pineapple.c | 18 +++--------------- driver/platform/pineapple/src/pineapple.c | 18 +++--------------- 2 files changed, 6 insertions(+), 30 deletions(-) diff --git a/driver/platform/pineapple/src/msm_vidc_pineapple.c b/driver/platform/pineapple/src/msm_vidc_pineapple.c index d9fa6e4293..df43576965 100644 --- a/driver/platform/pineapple/src/msm_vidc_pineapple.c +++ b/driver/platform/pineapple/src/msm_vidc_pineapple.c @@ -874,22 +874,14 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, {LTR_COUNT, ENC, H264|HEVC, - /* - * update with MAX_LTR_FRAME_COUNT_5 when - * 5 LTR support is added in firmware - */ - 0, MAX_LTR_FRAME_COUNT_2, 1, 0, + 0, MAX_LTR_FRAME_COUNT_5, 1, 0, V4L2_CID_MPEG_VIDEO_LTR_COUNT, HFI_PROP_LTR_COUNT, CAP_FLAG_OUTPUT_PORT}, {USE_LTR, ENC, H264|HEVC, 0, - /* - * update with MAX_LTR_FRAME_COUNT_5 when - * 5 LTR support is added in firmware - */ - ((1 << MAX_LTR_FRAME_COUNT_2) - 1), + ((1 << MAX_LTR_FRAME_COUNT_5) - 1), 0, 0, V4L2_CID_MPEG_VIDEO_USE_LTR_FRAMES, HFI_PROP_LTR_USE, @@ -897,11 +889,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { {MARK_LTR, ENC, H264|HEVC, INVALID_DEFAULT_MARK_OR_USE_LTR, - /* - * update with MAX_LTR_FRAME_COUNT_5 when - * 5 LTR support is added in firmware - */ - (MAX_LTR_FRAME_COUNT_2 - 1), + (MAX_LTR_FRAME_COUNT_5 - 1), 1, INVALID_DEFAULT_MARK_OR_USE_LTR, V4L2_CID_MPEG_VIDEO_FRAME_LTR_INDEX, HFI_PROP_LTR_MARK, diff --git a/driver/platform/pineapple/src/pineapple.c b/driver/platform/pineapple/src/pineapple.c index 97987933c1..d4021d6dba 100644 --- a/driver/platform/pineapple/src/pineapple.c +++ b/driver/platform/pineapple/src/pineapple.c @@ -588,22 +588,14 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, {LTR_COUNT, ENC, H264|HEVC, - /* - * update with MAX_LTR_FRAME_COUNT_5 when - * 5 LTR support is added in firmware - */ - 0, MAX_LTR_FRAME_COUNT_2, 1, 0, + 0, MAX_LTR_FRAME_COUNT_5, 1, 0, V4L2_CID_MPEG_VIDEO_LTR_COUNT, HFI_PROP_LTR_COUNT, CAP_FLAG_OUTPUT_PORT}, {USE_LTR, ENC, H264|HEVC, 0, - /* - * update with MAX_LTR_FRAME_COUNT_5 when - * 5 LTR support is added in firmware - */ - ((1 << MAX_LTR_FRAME_COUNT_2) - 1), + ((1 << MAX_LTR_FRAME_COUNT_5) - 1), 0, 0, V4L2_CID_MPEG_VIDEO_USE_LTR_FRAMES, HFI_PROP_LTR_USE, @@ -611,11 +603,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { {MARK_LTR, ENC, H264|HEVC, INVALID_DEFAULT_MARK_OR_USE_LTR, - /* - * update with MAX_LTR_FRAME_COUNT_5 when - * 5 LTR support is added in firmware - */ - (MAX_LTR_FRAME_COUNT_2 - 1), + (MAX_LTR_FRAME_COUNT_5 - 1), 1, INVALID_DEFAULT_MARK_OR_USE_LTR, V4L2_CID_MPEG_VIDEO_FRAME_LTR_INDEX, HFI_PROP_LTR_MARK, From 1cf504b16512ce40de58076d904c2157fadac6c1 Mon Sep 17 00:00:00 2001 From: Deepa Guthyappa Madivalara Date: Mon, 13 Mar 2023 16:13:52 -0700 Subject: [PATCH 0853/1061] video: driver: replace V4l2 macros with availble upstream macros Replace prior macros from downstream driver as these are now defined in upstream V4l2 include files Change-Id: I7d1677cd7ef95c05219e043e0c78d29299036bed Signed-off-by: Deepa Guthyappa Madivalara --- driver/platform/common/src/msm_vidc_platform_ext.c | 4 ++-- driver/platform/kalama/src/msm_vidc_kalama.c | 14 +++++++------- driver/platform/pineapple/src/msm_vidc_pineapple.c | 14 +++++++------- include/uapi/vidc/media/v4l2_vidc_extensions.h | 10 ---------- 4 files changed, 16 insertions(+), 26 deletions(-) diff --git a/driver/platform/common/src/msm_vidc_platform_ext.c b/driver/platform/common/src/msm_vidc_platform_ext.c index 6301a96dc9..1cef5bb78c 100644 --- a/driver/platform/common/src/msm_vidc_platform_ext.c +++ b/driver/platform/common/src/msm_vidc_platform_ext.c @@ -175,7 +175,7 @@ int msm_vidc_set_ir_period(void *instance, core = inst->core; if (inst->capabilities->cap[IR_TYPE].value == - V4L2_MPEG_VIDEO_VIDC_INTRA_REFRESH_RANDOM) { + V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_RANDOM) { if (inst->bufq[OUTPUT_PORT].vb2q->streaming) { i_vpr_h(inst, "%s: dynamic random intra refresh not allowed\n", __func__); @@ -183,7 +183,7 @@ int msm_vidc_set_ir_period(void *instance, } ir_type = HFI_PROP_IR_RANDOM_PERIOD; } else if (inst->capabilities->cap[IR_TYPE].value == - V4L2_MPEG_VIDEO_VIDC_INTRA_REFRESH_CYCLIC) { + V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_CYCLIC) { ir_type = HFI_PROP_IR_CYCLIC_PERIOD; } else { i_vpr_e(inst, "%s: invalid ir_type %d\n", diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index 7107a1a792..b60101272f 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -832,18 +832,18 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { CAP_FLAG_OUTPUT_PORT}, {IR_TYPE, ENC, H264|HEVC, - V4L2_MPEG_VIDEO_VIDC_INTRA_REFRESH_RANDOM, - V4L2_MPEG_VIDEO_VIDC_INTRA_REFRESH_CYCLIC, - BIT(V4L2_MPEG_VIDEO_VIDC_INTRA_REFRESH_RANDOM) | - BIT(V4L2_MPEG_VIDEO_VIDC_INTRA_REFRESH_CYCLIC), - V4L2_MPEG_VIDEO_VIDC_INTRA_REFRESH_RANDOM, - V4L2_CID_MPEG_VIDEO_VIDC_INTRA_REFRESH_TYPE, + V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_RANDOM, + V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_CYCLIC, + BIT(V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_RANDOM) | + BIT(V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_CYCLIC), + V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_RANDOM, + V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE, 0, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, {IR_PERIOD, ENC, H264|HEVC, 0, INT_MAX, 1, 0, - V4L2_CID_MPEG_VIDC_INTRA_REFRESH_PERIOD, + V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD, 0, CAP_FLAG_INPUT_PORT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, diff --git a/driver/platform/pineapple/src/msm_vidc_pineapple.c b/driver/platform/pineapple/src/msm_vidc_pineapple.c index d9fa6e4293..2209aab2ef 100644 --- a/driver/platform/pineapple/src/msm_vidc_pineapple.c +++ b/driver/platform/pineapple/src/msm_vidc_pineapple.c @@ -914,18 +914,18 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { CAP_FLAG_OUTPUT_PORT}, {IR_TYPE, ENC, H264|HEVC, - V4L2_MPEG_VIDEO_VIDC_INTRA_REFRESH_RANDOM, - V4L2_MPEG_VIDEO_VIDC_INTRA_REFRESH_CYCLIC, - BIT(V4L2_MPEG_VIDEO_VIDC_INTRA_REFRESH_RANDOM) | - BIT(V4L2_MPEG_VIDEO_VIDC_INTRA_REFRESH_CYCLIC), - V4L2_MPEG_VIDEO_VIDC_INTRA_REFRESH_RANDOM, - V4L2_CID_MPEG_VIDEO_VIDC_INTRA_REFRESH_TYPE, + V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_RANDOM, + V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_CYCLIC, + BIT(V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_RANDOM) | + BIT(V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_CYCLIC), + V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_RANDOM, + V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE, 0, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, {IR_PERIOD, ENC, H264|HEVC, 0, INT_MAX, 1, 0, - V4L2_CID_MPEG_VIDC_INTRA_REFRESH_PERIOD, + V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD, 0, CAP_FLAG_INPUT_PORT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, diff --git a/include/uapi/vidc/media/v4l2_vidc_extensions.h b/include/uapi/vidc/media/v4l2_vidc_extensions.h index a9add13b63..9d0e1c7b97 100644 --- a/include/uapi/vidc/media/v4l2_vidc_extensions.h +++ b/include/uapi/vidc/media/v4l2_vidc_extensions.h @@ -81,16 +81,6 @@ #define V4L2_CID_MPEG_VIDC_FRAME_RATE (V4L2_CID_MPEG_VIDC_BASE + 0x5) #define V4L2_CID_MPEG_VIDC_OPERATING_RATE (V4L2_CID_MPEG_VIDC_BASE + 0x6) -/* Encoder Intra refresh period */ -#define V4L2_CID_MPEG_VIDC_INTRA_REFRESH_PERIOD (V4L2_CID_MPEG_VIDC_BASE + 0xB) -/* Encoder Intra refresh type */ -#define V4L2_CID_MPEG_VIDEO_VIDC_INTRA_REFRESH_TYPE \ - (V4L2_CID_MPEG_VIDC_BASE + 0xC) -enum v4l2_mpeg_vidc_ir_type { - V4L2_MPEG_VIDEO_VIDC_INTRA_REFRESH_RANDOM = 0x0, - V4L2_MPEG_VIDEO_VIDC_INTRA_REFRESH_CYCLIC = 0x1, -}; - #define V4L2_CID_MPEG_VIDC_TIME_DELTA_BASED_RC (V4L2_CID_MPEG_VIDC_BASE + 0xD) /* Encoder quality controls */ #define V4L2_CID_MPEG_VIDC_CONTENT_ADAPTIVE_CODING \ From f00fe9f305e6baf243cf1feacac1606c7b637d9b Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Tue, 14 Mar 2023 12:13:29 -0700 Subject: [PATCH 0854/1061] video: driver: fix LTR adjustment LTR is not correctly getting adjusted due to incorrect goto statement leading to failure in premerge with test_AVC_NV12C_3LTR_4Layers_Adjutment_Encode testcase. Fix this. Change-Id: Ieda4f33d6679f645c2eb349e8ddf1015a3814711 Signed-off-by: Akshata Sahukar --- driver/platform/common/src/msm_vidc_platform.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/driver/platform/common/src/msm_vidc_platform.c b/driver/platform/common/src/msm_vidc_platform.c index 1078ca18e4..2d5472f56a 100644 --- a/driver/platform/common/src/msm_vidc_platform.c +++ b/driver/platform/common/src/msm_vidc_platform.c @@ -961,9 +961,10 @@ int msm_vidc_adjust_ltr_count(void *instance, struct v4l2_ctrl *ctrl) if (msm_vidc_get_parent_value(inst, LTR_COUNT, ALL_INTRA, &all_intra, __func__)) return -EINVAL; - if (all_intra) + if (all_intra) { adjusted_value = 0; - goto exit; + goto exit; + } } if (!msm_vidc_get_parent_value(inst, LTR_COUNT, PIX_FMTS, From 6432572ed6a7d1a139aa62b4454ba7521815a587 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Mon, 16 Jan 2023 17:37:57 +0530 Subject: [PATCH 0855/1061] video: driver: use devm for resource management use devm_add_action_or_reset() to register custom objects with devm. This function wil invoke release callback during rmmod/remove sequence. Change-Id: I87cf79741123bc3b1c624f8f44ba146deedaf32b Signed-off-by: Govindaraj Rajagopal --- driver/vidc/src/resources.c | 56 ++++++++++++++++++++----------------- 1 file changed, 30 insertions(+), 26 deletions(-) diff --git a/driver/vidc/src/resources.c b/driver/vidc/src/resources.c index 4160707709..0ae6454bed 100644 --- a/driver/vidc/src/resources.c +++ b/driver/vidc/src/resources.c @@ -48,53 +48,57 @@ static void __fatal_error(bool fatal) WARN_ON(fatal); } -static void devm_llcc_release(struct device *dev, void *res) +static void devm_llcc_release(void *res) { d_vpr_h("%s()\n", __func__); - llcc_slice_putd(*(struct llcc_slice_desc **)res); + llcc_slice_putd((struct llcc_slice_desc *)res); } static struct llcc_slice_desc *devm_llcc_get(struct device *dev, u32 id) { - struct llcc_slice_desc **ptr, *llcc; - - ptr = devres_alloc(devm_llcc_release, sizeof(*ptr), GFP_KERNEL); - if (!ptr) - return ERR_PTR(-ENOMEM); + struct llcc_slice_desc *llcc = NULL; + int rc = 0; llcc = llcc_slice_getd(id); - if (!IS_ERR(llcc)) { - *ptr = llcc; - devres_add(dev, ptr); - } else { - devres_free(ptr); - } + if (!llcc) + return NULL; + + /** + * register release callback with devm, so that when device goes + * out of scope(during remove sequence), devm will take care of + * de-register part by invoking release callback. + */ + rc = devm_add_action_or_reset(dev, devm_llcc_release, (void *)llcc); + if (rc) + return NULL; return llcc; } #ifdef CONFIG_MSM_MMRM -static void devm_mmrm_release(struct device *dev, void *res) +static void devm_mmrm_release(void *res) { d_vpr_h("%s()\n", __func__); - mmrm_client_deregister(*(struct mmrm_client **)res); + mmrm_client_deregister((struct mmrm_client *)res); } static struct mmrm_client *devm_mmrm_get(struct device *dev, struct mmrm_client_desc *desc) { - struct mmrm_client **ptr, *mmrm; - - ptr = devres_alloc(devm_mmrm_release, sizeof(*ptr), GFP_KERNEL); - if (!ptr) - return ERR_PTR(-ENOMEM); + struct mmrm_client *mmrm = NULL; + int rc = 0; mmrm = mmrm_client_register(desc); - if (!IS_ERR(mmrm)) { - *ptr = mmrm; - devres_add(dev, ptr); - } else { - devres_free(ptr); - } + if (!mmrm) + return NULL; + + /** + * register release callback with devm, so that when device goes + * out of scope(during remove sequence), devm will take care of + * de-register part by invoking release callback. + */ + rc = devm_add_action_or_reset(dev, devm_mmrm_release, (void *)mmrm); + if (rc) + return NULL; return mmrm; } From d2b9c98869ba4dce9a4c425265ff684475dad241 Mon Sep 17 00:00:00 2001 From: Deepa Guthyappa Madivalara Date: Thu, 16 Mar 2023 22:21:54 -0700 Subject: [PATCH 0856/1061] video: driver: replace V4l2 macros with availble upstream macros - Replace prior macros from downstream driver as these are now defined in upstream V4l2 include files Change-Id: I34dc063df0c2ca2194c115d310d7fe5026cd573e Signed-off-by: Deepa Guthyappa Madivalara --- driver/platform/kalama/src/msm_vidc_kalama.c | 6 +- .../pineapple/src/msm_vidc_pineapple.c | 6 +- .../uapi/vidc/media/v4l2_vidc_extensions.h | 103 ------------------ 3 files changed, 6 insertions(+), 109 deletions(-) diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index b60101272f..17f4fa3130 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -89,12 +89,12 @@ static struct color_format_info color_format_data_kalama[] = { .pixfmt_name = "NV21", }, { - .v4l2_color_format = V4L2_PIX_FMT_VIDC_NV12C, + .v4l2_color_format = V4L2_PIX_FMT_QC08C, .vidc_color_format = MSM_VIDC_FMT_NV12C, .pixfmt_name = "NV12C", }, { - .v4l2_color_format = V4L2_PIX_FMT_VIDC_TP10C, + .v4l2_color_format = V4L2_PIX_FMT_QC10C, .vidc_color_format = MSM_VIDC_FMT_TP10C, .pixfmt_name = "TP10C", }, @@ -109,7 +109,7 @@ static struct color_format_info color_format_data_kalama[] = { .pixfmt_name = "RGBAC", }, { - .v4l2_color_format = V4L2_PIX_FMT_VIDC_P010, + .v4l2_color_format = V4L2_PIX_FMT_P010, .vidc_color_format = MSM_VIDC_FMT_P010, .pixfmt_name = "P010", }, diff --git a/driver/platform/pineapple/src/msm_vidc_pineapple.c b/driver/platform/pineapple/src/msm_vidc_pineapple.c index bfbfaf911c..d738702ca1 100644 --- a/driver/platform/pineapple/src/msm_vidc_pineapple.c +++ b/driver/platform/pineapple/src/msm_vidc_pineapple.c @@ -90,12 +90,12 @@ static struct color_format_info color_format_data_pineapple[] = { .pixfmt_name = "NV21", }, { - .v4l2_color_format = V4L2_PIX_FMT_VIDC_NV12C, + .v4l2_color_format = V4L2_PIX_FMT_QC08C, .vidc_color_format = MSM_VIDC_FMT_NV12C, .pixfmt_name = "NV12C", }, { - .v4l2_color_format = V4L2_PIX_FMT_VIDC_TP10C, + .v4l2_color_format = V4L2_PIX_FMT_QC10C, .vidc_color_format = MSM_VIDC_FMT_TP10C, .pixfmt_name = "TP10C", }, @@ -110,7 +110,7 @@ static struct color_format_info color_format_data_pineapple[] = { .pixfmt_name = "RGBAC", }, { - .v4l2_color_format = V4L2_PIX_FMT_VIDC_P010, + .v4l2_color_format = V4L2_PIX_FMT_P010, .vidc_color_format = MSM_VIDC_FMT_P010, .pixfmt_name = "P010", }, diff --git a/include/uapi/vidc/media/v4l2_vidc_extensions.h b/include/uapi/vidc/media/v4l2_vidc_extensions.h index 9d0e1c7b97..bb6157f801 100644 --- a/include/uapi/vidc/media/v4l2_vidc_extensions.h +++ b/include/uapi/vidc/media/v4l2_vidc_extensions.h @@ -10,18 +10,6 @@ #include #include -/* - * supported standard color formats - * V4L2_PIX_FMT_NV12 Y/CbCr 4:2:0 - * V4L2_PIX_FMT_RGBA32 RGBA-8-8-8-8 - */ - /* Below are additional color formats */ -/* 12 Y/CbCr 4:2:0 compressed */ -#define V4L2_PIX_FMT_VIDC_NV12C v4l2_fourcc('Q', '1', '2', 'C') -/* Y/CbCr 4:2:0, 10 bits per channel compressed */ -#define V4L2_PIX_FMT_VIDC_TP10C v4l2_fourcc('Q', '1', '0', 'C') -/* Y/CbCr 4:2:0, 10 bits per channel */ -#define V4L2_PIX_FMT_VIDC_P010 v4l2_fourcc('P', '0', '1', '0') /* 32 RGBA-8-8-8-8 compressed */ #define V4L2_PIX_FMT_VIDC_ARGB32C v4l2_fourcc('Q', '2', '4', 'C') #define V4L2_META_FMT_VIDC v4l2_fourcc('Q', 'M', 'E', 'T') @@ -292,97 +280,6 @@ enum v4l2_mpeg_video_av1_tier { #define V4L2_CID_MPEG_VIDC_CSC \ (V4L2_CID_MPEG_VIDC_BASE + 0x47) -/* add new controls above this line */ -/* Deprecate below controls once availble in gki and gsi bionic header */ -#ifndef V4L2_CID_MPEG_VIDEO_BASELAYER_PRIORITY_ID -#define V4L2_CID_MPEG_VIDEO_BASELAYER_PRIORITY_ID \ - (V4L2_CID_MPEG_BASE + 230) -#endif -#ifndef V4L2_CID_MPEG_VIDEO_AU_DELIMITER -#define V4L2_CID_MPEG_VIDEO_AU_DELIMITER \ - (V4L2_CID_MPEG_BASE + 231) -#endif -#ifndef V4L2_CID_MPEG_VIDEO_LTR_COUNT -#define V4L2_CID_MPEG_VIDEO_LTR_COUNT \ - (V4L2_CID_MPEG_BASE + 232) -#endif -#ifndef V4L2_CID_MPEG_VIDEO_FRAME_LTR_INDEX -#define V4L2_CID_MPEG_VIDEO_FRAME_LTR_INDEX \ - (V4L2_CID_MPEG_BASE + 233) -#endif -#ifndef V4L2_CID_MPEG_VIDEO_USE_LTR_FRAMES -#define V4L2_CID_MPEG_VIDEO_USE_LTR_FRAMES \ - (V4L2_CID_MPEG_BASE + 234) -#endif -#ifndef V4L2_CID_MPEG_VIDEO_H264_B_FRAME_MIN_QP -#define V4L2_CID_MPEG_VIDEO_H264_B_FRAME_MIN_QP \ - (V4L2_CID_MPEG_BASE + 389) -#endif -#ifndef V4L2_CID_MPEG_VIDEO_H264_B_FRAME_MAX_QP -#define V4L2_CID_MPEG_VIDEO_H264_B_FRAME_MAX_QP \ - (V4L2_CID_MPEG_BASE + 390) -#endif -#ifndef V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L0_BR -#define V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L0_BR \ - (V4L2_CID_MPEG_BASE + 391) -#endif -#ifndef V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L1_BR -#define V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L1_BR \ - (V4L2_CID_MPEG_BASE + 392) -#endif -#ifndef V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L2_BR -#define V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L2_BR \ - (V4L2_CID_MPEG_BASE + 393) -#endif -#ifndef V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L3_BR -#define V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L3_BR \ - (V4L2_CID_MPEG_BASE + 394) -#endif -#ifndef V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L4_BR -#define V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L4_BR \ - (V4L2_CID_MPEG_BASE + 395) -#endif -#ifndef V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L5_BR -#define V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L5_BR \ - (V4L2_CID_MPEG_BASE + 396) -#endif -#ifndef V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L6_BR -#define V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L6_BR \ - (V4L2_CID_MPEG_BASE + 397) -#endif -#ifndef V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_MIN_QP -#define V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_MIN_QP \ - (V4L2_CID_MPEG_BASE + 647) -#endif -#ifndef V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_MAX_QP -#define V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_MAX_QP \ - (V4L2_CID_MPEG_BASE + 648) -#endif -#ifndef V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_MIN_QP -#define V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_MIN_QP \ - (V4L2_CID_MPEG_BASE + 649) -#endif -#ifndef V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_MAX_QP -#define V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_MAX_QP \ - (V4L2_CID_MPEG_BASE + 650) -#endif -#ifndef V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_MIN_QP -#define V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_MIN_QP \ - (V4L2_CID_MPEG_BASE + 651) -#endif -#ifndef V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_MAX_QP -#define V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_MAX_QP \ - (V4L2_CID_MPEG_BASE + 652) -#endif -#ifndef V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY -#define V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY \ - (V4L2_CID_MPEG_BASE + 653) -#endif -#ifndef V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY_ENABLE -#define V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY_ENABLE \ - (V4L2_CID_MPEG_BASE + 654) -#endif - enum v4l2_mpeg_vidc_metapayload_header_flags { METADATA_FLAGS_NONE = 0, METADATA_FLAGS_TOP_FIELD = (1 << 0), From 33d0b20141074ea18cbec50028b712fb012d1b3e Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Fri, 3 Feb 2023 16:58:07 -0800 Subject: [PATCH 0857/1061] video: driver: Add support for Synx V2 fences Add Synx V2 fences support to improve latency in video decode usecases. Change-Id: If21f8b65895364a804f8e03580b09c44b377c199 Signed-off-by: Akshata Sahukar --- Android.mk | 3 + .../platform/common/src/msm_vidc_platform.c | 6 + driver/platform/kalama/src/msm_vidc_kalama.c | 1 + .../pineapple/src/msm_vidc_pineapple.c | 8 + driver/platform/pineapple/src/pineapple.c | 1 + driver/platform/waipio/src/waipio.c | 1 + driver/vidc/inc/msm_vidc_core.h | 11 +- driver/vidc/inc/msm_vidc_fence.h | 28 +- driver/vidc/inc/msm_vidc_internal.h | 4 + driver/vidc/inc/msm_vidc_memory.h | 6 +- driver/vidc/inc/msm_vidc_memory_ext.h | 5 +- driver/vidc/inc/msm_vidc_synx.h | 13 + driver/vidc/src/msm_vidc_driver.c | 22 +- driver/vidc/src/msm_vidc_fence.c | 38 +- driver/vidc/src/msm_vidc_memory.c | 118 +++++- driver/vidc/src/msm_vidc_memory_ext.c | 4 +- driver/vidc/src/msm_vidc_probe.c | 37 ++ driver/vidc/src/msm_vidc_synx.c | 394 ++++++++++++++++++ driver/vidc/src/venus_hfi_queue.c | 19 + driver/vidc/src/venus_hfi_response.c | 4 +- msm_video/Kbuild | 6 +- 21 files changed, 678 insertions(+), 51 deletions(-) create mode 100644 driver/vidc/inc/msm_vidc_synx.h create mode 100644 driver/vidc/src/msm_vidc_synx.c diff --git a/Android.mk b/Android.mk index c1ecd96745..7cf534b7a8 100644 --- a/Android.mk +++ b/Android.mk @@ -20,6 +20,7 @@ KBUILD_OPTIONS := VIDEO_ROOT=$(VIDEO_BLD_DIR) KBUILD_OPTIONS += $(VIDEO_SELECT) KBUILD_OPTIONS += KBUILD_EXTRA_SYMBOLS=$(shell pwd)/$(call intermediates-dir-for,DLKM,mmrm-module-symvers)/Module.symvers +KBUILD_OPTIONS += KBUILD_EXTRA_SYMBOLS+=$(shell pwd)/$(call intermediates-dir-for,DLKM,hw-fence-module-symvers)/Module.symvers ########################################################### DLKM_DIR := device/qcom/common/dlkm @@ -36,7 +37,9 @@ LOCAL_MODULE_DEBUG_ENABLE := true LOCAL_MODULE_PATH := $(KERNEL_MODULES_OUT) LOCAL_REQUIRED_MODULES := mmrm-module-symvers +LOCAL_REQUIRED_MODULES += hw-fence-module-symvers LOCAL_ADDITIONAL_DEPENDENCIES := $(call intermediates-dir-for,DLKM,mmrm-module-symvers)/Module.symvers +LOCAL_ADDITIONAL_DEPENDENCIES += $(call intermediates-dir-for,DLKM,hw-fence-module-symvers)/Module.symvers include $(DLKM_DIR)/Build_external_kernelmodule.mk endif diff --git a/driver/platform/common/src/msm_vidc_platform.c b/driver/platform/common/src/msm_vidc_platform.c index 2d5472f56a..2afe05d853 100644 --- a/driver/platform/common/src/msm_vidc_platform.c +++ b/driver/platform/common/src/msm_vidc_platform.c @@ -17,6 +17,7 @@ #include "msm_vidc_memory.h" #include "msm_vidc_control.h" #include "msm_vidc_driver.h" +#include "msm_vidc_fence.h" #include "hfi_packet.h" #include "hfi_property.h" #include "venus_hfi.h" @@ -275,6 +276,11 @@ static int msm_vidc_init_ops(struct msm_vidc_core *core) d_vpr_e("%s: invalid resource ops\n", __func__); return -EINVAL; } + core->fence_ops = get_dma_fence_ops(); + if (!core->fence_ops) { + d_vpr_e("%s: invalid dma fence ops\n", __func__); + return -EINVAL; + } return 0; } diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index b60101272f..205244dd84 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -322,6 +322,7 @@ static struct msm_platform_core_capability core_data_kalama[] = { {ENC_AUTO_FRAMERATE, 1}, {DEVICE_CAPS, V4L2_CAP_VIDEO_M2M_MPLANE | V4L2_CAP_META_CAPTURE | V4L2_CAP_STREAMING}, + {SUPPORTS_SYNX_FENCE, 0}, {SUPPORTS_REQUESTS, 1}, }; diff --git a/driver/platform/pineapple/src/msm_vidc_pineapple.c b/driver/platform/pineapple/src/msm_vidc_pineapple.c index bfbfaf911c..1c59c859fa 100644 --- a/driver/platform/pineapple/src/msm_vidc_pineapple.c +++ b/driver/platform/pineapple/src/msm_vidc_pineapple.c @@ -17,6 +17,7 @@ #include "msm_vidc_internal.h" #include "msm_vidc_platform_ext.h" #include "msm_vidc_memory_ext.h" +#include "msm_vidc_synx.h" #include "resources_ext.h" #include "msm_vidc_iris33.h" #include "hfi_property.h" @@ -323,6 +324,7 @@ static struct msm_platform_core_capability core_data_pineapple[] = { {ENC_AUTO_FRAMERATE, 1}, {DEVICE_CAPS, V4L2_CAP_VIDEO_M2M_MPLANE | V4L2_CAP_META_CAPTURE | V4L2_CAP_STREAMING}, + {SUPPORTS_SYNX_FENCE, 0}, /* disabled temporarily */ {SUPPORTS_REQUESTS, 1}, }; @@ -2819,6 +2821,12 @@ static int msm_vidc_init_data(struct msm_vidc_core *core) d_vpr_e("%s: invalid resource ext ops\n", __func__); return -EINVAL; } + core->fence_ops = get_synx_fence_ops(); + if (!core->fence_ops) { + d_vpr_e("%s: invalid synx fence ops\n", __func__); + return -EINVAL; + } + rc = msm_vidc_pineapple_check_ddr_type(); if (rc) return rc; diff --git a/driver/platform/pineapple/src/pineapple.c b/driver/platform/pineapple/src/pineapple.c index d4021d6dba..177a8d78a1 100644 --- a/driver/platform/pineapple/src/pineapple.c +++ b/driver/platform/pineapple/src/pineapple.c @@ -220,6 +220,7 @@ static struct msm_platform_core_capability core_data_pineapple[] = { {NON_FATAL_FAULTS, 1}, {ENC_AUTO_FRAMERATE, 1}, {DEVICE_CAPS, V4L2_CAP_VIDEO_M2M_MPLANE | V4L2_CAP_STREAMING}, + {SUPPORTS_SYNX_FENCE, 0}, {SUPPORTS_REQUESTS, 0}, }; diff --git a/driver/platform/waipio/src/waipio.c b/driver/platform/waipio/src/waipio.c index 68e6c2f7b1..61a2b2b8c5 100644 --- a/driver/platform/waipio/src/waipio.c +++ b/driver/platform/waipio/src/waipio.c @@ -222,6 +222,7 @@ static struct msm_platform_core_capability core_data_waipio[] = { {NON_FATAL_FAULTS, 1}, {ENC_AUTO_FRAMERATE, 1}, {DEVICE_CAPS, V4L2_CAP_VIDEO_M2M_MPLANE | V4L2_CAP_STREAMING}, + {SUPPORTS_SYNX_FENCE, 0}, {SUPPORTS_REQUESTS, 0}, }; diff --git a/driver/vidc/inc/msm_vidc_core.h b/driver/vidc/inc/msm_vidc_core.h index 2125e67f1a..27f5015106 100644 --- a/driver/vidc/inc/msm_vidc_core.h +++ b/driver/vidc/inc/msm_vidc_core.h @@ -33,6 +33,13 @@ struct msm_vidc_venus_ops { int (*noc_error_info)(struct msm_vidc_core *core); }; +struct msm_vidc_synx_fence_data { + u32 client_id; + void *session; + u32 client_flags; /* not used */ + struct msm_vidc_mem queue; +}; + struct msm_vidc_mem_addr { u32 align_device_addr; u8 *align_virtual_addr; @@ -109,11 +116,13 @@ struct msm_vidc_core { struct msm_vidc_venus_ops *venus_ops; const struct msm_vidc_resources_ops *res_ops; struct msm_vidc_session_ops *session_ops; - struct msm_vidc_memory_ops *mem_ops; + const struct msm_vidc_memory_ops *mem_ops; struct media_device_ops *media_device_ops; + const struct msm_vidc_fence_ops *fence_ops; u32 header_id; u32 packet_id; u32 sys_init_id; + struct msm_vidc_synx_fence_data synx_fence_data; }; #endif // _MSM_VIDC_CORE_H_ diff --git a/driver/vidc/inc/msm_vidc_fence.h b/driver/vidc/inc/msm_vidc_fence.h index d94389f4d0..6b87d2edb9 100644 --- a/driver/vidc/inc/msm_vidc_fence.h +++ b/driver/vidc/inc/msm_vidc_fence.h @@ -9,18 +9,26 @@ #include "msm_vidc_inst.h" #include "msm_vidc_buffer.h" -struct msm_vidc_fence *msm_vidc_fence_create( - struct msm_vidc_inst *inst); -int msm_vidc_create_fence_fd(struct msm_vidc_inst *inst, - struct msm_vidc_fence *fence); -struct msm_vidc_fence *msm_vidc_get_fence_from_id( - struct msm_vidc_inst *inst, u32 fence_id); -int msm_vidc_fence_signal(struct msm_vidc_inst *inst, - u32 fence_id); -void msm_vidc_fence_destroy(struct msm_vidc_inst *inst, - u32 fence_id); int msm_vidc_fence_init(struct msm_vidc_inst *inst); void msm_vidc_fence_deinit(struct msm_vidc_inst *inst); +#define call_fence_op(c, op, ...) \ + (((c) && (c)->fence_ops && (c)->fence_ops->op) ? \ + ((c)->fence_ops->op(__VA_ARGS__)) : 0) + +struct msm_vidc_fence_ops { + int (*fence_register)(struct msm_vidc_core *core); + int (*fence_deregister)(struct msm_vidc_core *core); + struct msm_vidc_fence *(*fence_create)(struct msm_vidc_inst *inst); + int (*fence_create_fd)(struct msm_vidc_inst *inst, + struct msm_vidc_fence *fence); + void (*fence_destroy)(struct msm_vidc_inst *inst, + u64 fence_id); + int (*fence_signal)(struct msm_vidc_inst *inst, + u64 fence_id); + void (*fence_recover)(struct msm_vidc_core *core); +}; + +const struct msm_vidc_fence_ops *get_dma_fence_ops(void); #endif // __H_MSM_VIDC_FENCE_H__ diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 7f84fc40a4..7e666200f0 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -598,6 +598,7 @@ enum msm_vidc_core_capability_type { ENC_AUTO_FRAMERATE, DEVICE_CAPS, SUPPORTS_REQUESTS, + SUPPORTS_SYNX_FENCE, CORE_CAP_MAX, }; @@ -858,6 +859,8 @@ struct msm_vidc_fence { spinlock_t lock; struct sync_file *sync_file; int fd; + u64 fence_id; + void *session; }; struct msm_vidc_mem { @@ -884,6 +887,7 @@ struct msm_vidc_mem { struct sg_table *table; struct dma_buf_attachment *attach; phys_addr_t phys_addr; + enum dma_data_direction direction; }; struct msm_vidc_mem_list { diff --git a/driver/vidc/inc/msm_vidc_memory.h b/driver/vidc/inc/msm_vidc_memory.h index 5b3e0e69ce..1606d39408 100644 --- a/driver/vidc/inc/msm_vidc_memory.h +++ b/driver/vidc/inc/msm_vidc_memory.h @@ -76,6 +76,10 @@ struct msm_vidc_memory_ops { struct msm_vidc_mem *mem); int (*memory_unmap_free)(struct msm_vidc_core *core, struct msm_vidc_mem *mem); + int (*mem_dma_map_page)(struct msm_vidc_core *core, + struct msm_vidc_mem *mem); + int (*mem_dma_unmap_page)(struct msm_vidc_core *core, + struct msm_vidc_mem *mem); u32 (*buffer_region)(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type buffer_type); int (*iommu_map)(struct msm_vidc_core *core, @@ -84,6 +88,6 @@ struct msm_vidc_memory_ops { struct msm_vidc_mem *mem); }; -struct msm_vidc_memory_ops *get_mem_ops(void); +const struct msm_vidc_memory_ops *get_mem_ops(void); #endif // _MSM_VIDC_MEMORY_H_ diff --git a/driver/vidc/inc/msm_vidc_memory_ext.h b/driver/vidc/inc/msm_vidc_memory_ext.h index af8613ec8e..de4f9d0d0a 100644 --- a/driver/vidc/inc/msm_vidc_memory_ext.h +++ b/driver/vidc/inc/msm_vidc_memory_ext.h @@ -7,7 +7,8 @@ #ifndef _MSM_VIDC_MEMORY_EXT_H_ #define _MSM_VIDC_MEMORY_EXT_H_ -struct msm_vidc_memory_ops; -struct msm_vidc_memory_ops *get_mem_ops_ext(void); +#include "msm_vidc_memory.h" + +const struct msm_vidc_memory_ops *get_mem_ops_ext(void); #endif // _MSM_VIDC_MEMORY_EXT_H_ \ No newline at end of file diff --git a/driver/vidc/inc/msm_vidc_synx.h b/driver/vidc/inc/msm_vidc_synx.h new file mode 100644 index 0000000000..75e1705cac --- /dev/null +++ b/driver/vidc/inc/msm_vidc_synx.h @@ -0,0 +1,13 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#ifndef _H_MSM_VIDC_SYNX_H_ +#define _H_MSM_VIDC_SYNX_H_ + +#include "msm_vidc_fence.h" + +const struct msm_vidc_fence_ops *get_synx_fence_ops(void); + +#endif //_H_MSM_VIDC_SYNX_H_ diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 7f594be6da..9437f8e145 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -1682,17 +1682,19 @@ int msm_vidc_get_fence_fd(struct msm_vidc_inst *inst, int *fence_fd) { int rc = 0; struct msm_vidc_fence *fence, *dummy_fence; + struct msm_vidc_core *core; bool found = false; *fence_fd = INVALID_FD; - if (!inst || !inst->capabilities) { + if (!inst || !inst->capabilities || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } + core = inst->core; list_for_each_entry_safe(fence, dummy_fence, &inst->fence_list, list) { - if (fence->dma_fence.seqno == + if (fence->fence_id == (u64)inst->capabilities->cap[FENCE_ID].value) { found = true; break; @@ -1706,7 +1708,7 @@ int msm_vidc_get_fence_fd(struct msm_vidc_inst *inst, int *fence_fd) } if (fence->fd == INVALID_FD) { - rc = msm_vidc_create_fence_fd(inst, fence); + rc = call_fence_op(core, fence_create_fd, inst, fence); if (rc) goto exit; } @@ -2995,11 +2997,13 @@ int msm_vidc_queue_buffer_single(struct msm_vidc_inst *inst, struct vb2_buffer * int rc = 0; struct msm_vidc_buffer *buf = NULL; struct msm_vidc_fence *fence = NULL; + struct msm_vidc_core *core = NULL; - if (!inst || !vb2 || !inst->capabilities) { + if (!inst || !vb2 || !inst->capabilities || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } + core = inst->core; buf = msm_vidc_get_driver_buf(inst, vb2); if (!buf) @@ -3007,10 +3011,10 @@ int msm_vidc_queue_buffer_single(struct msm_vidc_inst *inst, struct vb2_buffer * if (is_meta_rx_inp_enabled(inst, META_OUTBUF_FENCE) && is_output_buffer(buf->type)) { - fence = msm_vidc_fence_create(inst); + fence = call_fence_op(core, fence_create, inst); if (!fence) - return rc; - buf->fence_id = fence->dma_fence.seqno; + return -EINVAL; + buf->fence_id = fence->fence_id; } rc = inst->event_handle(inst, MSM_VIDC_BUF_QUEUE, buf); @@ -3021,7 +3025,7 @@ exit: if (rc) { i_vpr_e(inst, "%s: qbuf failed\n", __func__); if (fence) - msm_vidc_fence_destroy(inst, (u32)fence->dma_fence.seqno); + call_fence_op(core, fence_destroy, inst, fence->fence_id); } return rc; } @@ -5088,7 +5092,7 @@ void msm_vidc_destroy_buffers(struct msm_vidc_inst *inst) list_for_each_entry_safe(fence, dummy_fence, &inst->fence_list, list) { i_vpr_e(inst, "%s: destroying fence %s\n", __func__, fence->name); - msm_vidc_fence_destroy(inst, (u32)fence->dma_fence.seqno); + call_fence_op(core, fence_destroy, inst, fence->fence_id); } /* destroy buffers from pool */ diff --git a/driver/vidc/src/msm_vidc_fence.c b/driver/vidc/src/msm_vidc_fence.c index 8c941a5509..ee1a288ced 100644 --- a/driver/vidc/src/msm_vidc_fence.c +++ b/driver/vidc/src/msm_vidc_fence.c @@ -7,8 +7,6 @@ #include "msm_vidc_driver.h" #include "msm_vidc_debug.h" -extern struct msm_vidc_core *g_core; - static const char *msm_vidc_dma_fence_get_driver_name(struct dma_fence *df) { struct msm_vidc_fence *fence; @@ -76,6 +74,8 @@ struct msm_vidc_fence *msm_vidc_fence_create(struct msm_vidc_inst *inst) if (inst->fence_context.seq_num >= INT_MAX) inst->fence_context.seq_num = 0; + fence->fence_id = fence->dma_fence.seqno; + INIT_LIST_HEAD(&fence->list); list_add_tail(&fence->list, &inst->fence_list); i_vpr_l(inst, "%s: created %s\n", __func__, fence->name); @@ -83,7 +83,7 @@ struct msm_vidc_fence *msm_vidc_fence_create(struct msm_vidc_inst *inst) return fence; } -int msm_vidc_create_fence_fd(struct msm_vidc_inst *inst, +int msm_vidc_dma_fence_create_fd(struct msm_vidc_inst *inst, struct msm_vidc_fence *fence) { int rc = 0; @@ -119,8 +119,8 @@ err_fd: return rc; } -struct msm_vidc_fence *msm_vidc_get_fence_from_id( - struct msm_vidc_inst *inst, u32 fence_id) +static struct msm_vidc_fence *msm_vidc_get_dma_fence_from_id( + struct msm_vidc_inst *inst, u64 fence_id) { struct msm_vidc_fence *fence, *dummy_fence; bool found = false; @@ -131,19 +131,22 @@ struct msm_vidc_fence *msm_vidc_get_fence_from_id( } list_for_each_entry_safe(fence, dummy_fence, &inst->fence_list, list) { - if (fence->dma_fence.seqno == (u64)fence_id) { + if (fence->fence_id == fence_id) { found = true; break; } } - if (!found) + if (!found) { + i_vpr_l(inst, "%s: no fence available for id: %u\n", + __func__, fence_id); return NULL; + } return fence; } -int msm_vidc_fence_signal(struct msm_vidc_inst *inst, u32 fence_id) +static int msm_vidc_fence_signal(struct msm_vidc_inst *inst, u64 fence_id) { int rc = 0; struct msm_vidc_fence *fence; @@ -153,7 +156,7 @@ int msm_vidc_fence_signal(struct msm_vidc_inst *inst, u32 fence_id) return -EINVAL; } - fence = msm_vidc_get_fence_from_id(inst, fence_id); + fence = msm_vidc_get_dma_fence_from_id(inst, fence_id); if (!fence) { i_vpr_e(inst, "%s: no fence available to signal with id: %u\n", __func__, fence_id); @@ -163,6 +166,7 @@ int msm_vidc_fence_signal(struct msm_vidc_inst *inst, u32 fence_id) i_vpr_l(inst, "%s: fence %s\n", __func__, fence->name); list_del_init(&fence->list); + dma_fence_signal(&fence->dma_fence); dma_fence_put(&fence->dma_fence); @@ -171,7 +175,7 @@ exit: } -void msm_vidc_fence_destroy(struct msm_vidc_inst *inst, u32 fence_id) +static void msm_vidc_fence_destroy(struct msm_vidc_inst *inst, u64 fence_id) { struct msm_vidc_fence *fence; @@ -180,7 +184,7 @@ void msm_vidc_fence_destroy(struct msm_vidc_inst *inst, u32 fence_id) return; } - fence = msm_vidc_get_fence_from_id(inst, fence_id); + fence = msm_vidc_get_dma_fence_from_id(inst, fence_id); if (!fence) { return; } @@ -221,3 +225,15 @@ void msm_vidc_fence_deinit(struct msm_vidc_inst *inst) snprintf(inst->fence_context.name, sizeof(inst->fence_context.name), "%s", ""); } + +static const struct msm_vidc_fence_ops msm_dma_fence_ops = { + .fence_create = msm_vidc_fence_create, + .fence_destroy = msm_vidc_fence_destroy, + .fence_signal = msm_vidc_fence_signal, + .fence_create_fd = msm_vidc_dma_fence_create_fd, +}; + +const struct msm_vidc_fence_ops *get_dma_fence_ops(void) +{ + return &msm_dma_fence_ops; +} diff --git a/driver/vidc/src/msm_vidc_memory.c b/driver/vidc/src/msm_vidc_memory.c index 4faee82eb9..385828de0d 100644 --- a/driver/vidc/src/msm_vidc_memory.c +++ b/driver/vidc/src/msm_vidc_memory.c @@ -425,8 +425,7 @@ static int msm_vidc_memory_alloc_map(struct msm_vidc_core *core, struct msm_vidc cb = msm_vidc_get_context_bank_for_region(core, mem->region); if (!cb) { - d_vpr_e("%s: Failed to get context bank device\n", - __func__); + d_vpr_e("%s: failed to get context bank device\n", __func__); return -EIO; } @@ -457,18 +456,17 @@ static int msm_vidc_memory_unmap_free(struct msm_vidc_core *core, struct msm_vid d_vpr_h( "%s: dmabuf %pK, size %d, kvaddr %pK, buffer_type %s, secure %d, region %d\n", - __func__, mem->device_addr, mem->size, mem->kvaddr, buf_name(mem->type), - mem->secure, mem->region); + __func__, mem->device_addr, mem->size, mem->kvaddr, + buf_name(mem->type), mem->secure, mem->region); cb = msm_vidc_get_context_bank_for_region(core, mem->region); if (!cb) { - d_vpr_e("%s: Failed to get context bank device\n", - __func__); + d_vpr_e("%s: failed to get context bank device\n", __func__); return -EIO; } dma_free_attrs(cb->dev, mem->size, mem->kvaddr, mem->device_addr, - mem->attrs); + mem->attrs); mem->kvaddr = NULL; mem->device_addr = 0; @@ -476,6 +474,99 @@ static int msm_vidc_memory_unmap_free(struct msm_vidc_core *core, struct msm_vid return rc; } +static int msm_vidc_dma_map_page(struct msm_vidc_core *core, + struct msm_vidc_mem *mem) +{ + int rc = 0; + struct context_bank_info *cb = NULL; + dma_addr_t dma_addr; + + if (!core || !mem) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (mem->refcount) { + mem->refcount++; + goto exit; + } + + cb = msm_vidc_get_context_bank_for_region(core, mem->region); + if (!cb) { + d_vpr_e("%s: Failed to get context bank device\n", + __func__); + rc = -EIO; + goto error; + } + + /* map and obtain dma address for physically contiguous memory */ + dma_addr = dma_map_page(cb->dev, phys_to_page(mem->phys_addr), + 0, (size_t)mem->size, mem->direction); + + rc = dma_mapping_error(cb->dev, dma_addr); + if (rc) { + d_vpr_e("%s: Failed to map memory\n", __func__); + goto error; + } + + mem->device_addr = dma_addr; + mem->refcount++; + +exit: + d_vpr_l( + "%s: type %11s, device_addr %#llx, size %u region %d, refcount %d\n", + __func__, buf_name(mem->type), mem->device_addr, + mem->size, mem->region, mem->refcount); + + return 0; + +error: + return rc; +} + +static int msm_vidc_dma_unmap_page(struct msm_vidc_core *core, + struct msm_vidc_mem *mem) +{ + int rc = 0; + struct context_bank_info *cb = NULL; + + if (!core || !mem) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (mem->refcount) { + mem->refcount--; + } else { + d_vpr_e("unmap called while refcount is zero already\n"); + return -EINVAL; + } + + cb = msm_vidc_get_context_bank_for_region(core, mem->region); + if (!cb) { + d_vpr_e("%s: Failed to get context bank device\n", + __func__); + rc = -EIO; + goto exit; + } + + d_vpr_l( + "%s: type %11s, device_addr %#x, refcount %d, region %d\n", + __func__, buf_name(mem->type), mem->device_addr, + mem->refcount, mem->region); + + if (mem->refcount) + goto exit; + + dma_unmap_page(cb->dev, (dma_addr_t)(mem->device_addr), + mem->size, mem->direction); + + mem->device_addr = 0x0; + +exit: + return rc; +} + static u32 msm_vidc_buffer_region(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type buffer_type) { @@ -494,7 +585,8 @@ static int msm_vidc_iommu_map(struct msm_vidc_core *core, struct msm_vidc_mem *m cb = msm_vidc_get_context_bank_for_region(core, mem->region); if (!cb) { - d_vpr_e("%s: Failed to get context bank device\n", __func__); + d_vpr_e("%s: failed to get context bank device for region: %d\n", + __func__, mem->region); return -EIO; } @@ -524,8 +616,8 @@ static int msm_vidc_iommu_unmap(struct msm_vidc_core *core, struct msm_vidc_mem cb = msm_vidc_get_context_bank_for_region(core, mem->region); if (!cb) { - d_vpr_e("%s: Failed to get context bank device\n", - __func__); + d_vpr_e("%s: failed to get context bank device for region: %d\n", + __func__, mem->region); return -EIO; } @@ -540,7 +632,7 @@ static int msm_vidc_iommu_unmap(struct msm_vidc_core *core, struct msm_vidc_mem return rc; } -static struct msm_vidc_memory_ops msm_mem_ops = { +static const struct msm_vidc_memory_ops msm_mem_ops = { .dma_buf_get = msm_vidc_dma_buf_get, .dma_buf_put = msm_vidc_dma_buf_put, .dma_buf_put_completely = msm_vidc_dma_buf_put_completely, @@ -550,12 +642,14 @@ static struct msm_vidc_memory_ops msm_mem_ops = { .dma_buf_unmap_attachment = msm_vidc_dma_buf_unmap_attachment, .memory_alloc_map = msm_vidc_memory_alloc_map, .memory_unmap_free = msm_vidc_memory_unmap_free, + .mem_dma_map_page = msm_vidc_dma_map_page, + .mem_dma_unmap_page = msm_vidc_dma_unmap_page, .buffer_region = msm_vidc_buffer_region, .iommu_map = msm_vidc_iommu_map, .iommu_unmap = msm_vidc_iommu_unmap, }; -struct msm_vidc_memory_ops *get_mem_ops(void) +const struct msm_vidc_memory_ops *get_mem_ops(void) { return &msm_mem_ops; } diff --git a/driver/vidc/src/msm_vidc_memory_ext.c b/driver/vidc/src/msm_vidc_memory_ext.c index 9db5313168..2ef9d590e1 100644 --- a/driver/vidc/src/msm_vidc_memory_ext.c +++ b/driver/vidc/src/msm_vidc_memory_ext.c @@ -452,9 +452,9 @@ static int msm_vidc_memory_unmap_free_ext(struct msm_vidc_core *core, struct msm return rc; } -struct msm_vidc_memory_ops *get_mem_ops_ext(void) +const struct msm_vidc_memory_ops *get_mem_ops_ext(void) { - struct msm_vidc_memory_ops *mem_ops = get_mem_ops(); + const struct msm_vidc_memory_ops *mem_ops = get_mem_ops(); static struct msm_vidc_memory_ops mem_ops_ext; memcpy(&mem_ops_ext, mem_ops, sizeof(struct msm_vidc_memory_ops)); diff --git a/driver/vidc/src/msm_vidc_probe.c b/driver/vidc/src/msm_vidc_probe.c index 92cb939175..5539a659ba 100644 --- a/driver/vidc/src/msm_vidc_probe.c +++ b/driver/vidc/src/msm_vidc_probe.c @@ -24,6 +24,7 @@ #include "msm_vidc_driver.h" #include "msm_vidc_debug.h" #include "msm_vidc_state.h" +#include "msm_vidc_fence.h" #include "msm_vidc_platform.h" #include "msm_vidc_core.h" #include "msm_vidc_memory.h" @@ -567,6 +568,41 @@ static int msm_vidc_component_master_bind(struct device *dev) return rc; } + /* register for synx fence */ + if (core->capabilities[SUPPORTS_SYNX_FENCE].value) { + rc = call_fence_op(core, fence_register, core); + if (rc) { + d_vpr_e("%s: failed to register synx fence\n", + __func__); + core->capabilities[SUPPORTS_SYNX_FENCE].value = 0; + /* + * - Bail out the session for time being for this + * case where synx fence register call retunrs error + * to help with debugging + * - Re-initialize fence ops with dma_fence_ops. + * This is required once we start ignoring this + * synx fence register call error. + */ + core->fence_ops = get_dma_fence_ops(); + if (!core->fence_ops) { + d_vpr_e("%s: invalid dma fence ops\n", __func__); + return -EINVAL; + } + + return rc; + } + } else { + /* + * override synx fence ops with dma fence ops for + * time being until synx fence support is enabled + */ + core->fence_ops = get_dma_fence_ops(); + if (!core->fence_ops) { + d_vpr_e("%s: invalid dma fence ops\n", __func__); + return -EINVAL; + } + } + rc = msm_vidc_initialize_media(core); if (rc) { d_vpr_e("%s: media initialization failed\n", __func__); @@ -607,6 +643,7 @@ static void msm_vidc_component_master_unbind(struct device *dev) msm_vidc_core_deinit(core, true); venus_hfi_queue_deinit(core); msm_vidc_deinitialize_media(core); + call_fence_op(core, fence_deregister, core); component_unbind_all(dev, core); d_vpr_h("%s(): succssful\n", __func__); diff --git a/driver/vidc/src/msm_vidc_synx.c b/driver/vidc/src/msm_vidc_synx.c new file mode 100644 index 0000000000..8e0b38339d --- /dev/null +++ b/driver/vidc/src/msm_vidc_synx.c @@ -0,0 +1,394 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include +#include "msm_vidc_core.h" +#include "msm_vidc_internal.h" +#include "msm_vidc_fence.h" +#include "msm_vidc_debug.h" +#include + +#define MSM_VIDC_SYNX_FENCE_CLIENT_ID SYNX_CLIENT_HW_FENCE_VID_CTX0 +#define MSM_VIDC_SYNX_CREATE_DMA_FENCE SYNX_CREATE_DMA_FENCE +#define MAX_SYNX_FENCE_SESSION_NAME 64 + +static const char *msm_vidc_synx_dma_fence_get_driver_name(struct dma_fence *df) +{ + struct msm_vidc_fence *fence; + + if (df) { + fence = container_of(df, struct msm_vidc_fence, dma_fence); + return fence->name; + } + return "msm_vidc_synx_dma_fence_get_driver_name: invalid fence"; +} + +static const char *msm_vidc_synx_dma_fence_get_timeline_name(struct dma_fence *df) +{ + struct msm_vidc_fence *fence; + + if (df) { + fence = container_of(df, struct msm_vidc_fence, dma_fence); + return fence->name; + } + return "msm_vidc_synx_dma_fence_get_timeline_name: invalid fence"; +} + +static void msm_vidc_synx_fence_release(struct dma_fence *df) +{ + struct msm_vidc_fence *fence; + int rc = 0; + + if (!df) { + d_vpr_e("%s: invalid dma fence\n", __func__); + return; + } + + fence = container_of(df, struct msm_vidc_fence, dma_fence); + if (!fence) { + d_vpr_e("%s: invalid fence\n", __func__); + return; + } + d_vpr_l("%s: name %s\n", __func__, fence->name); + + /* destroy associated synx fence */ + if (fence->session) { + rc = synx_hwfence_release((struct synx_session *)fence->session, + (u32)fence->fence_id); + if (rc) + d_vpr_e("%s: failed to destroy synx fence for %s\n", + __func__, fence->name); + } + + msm_vidc_vmem_free((void **)&fence); + return; +} + +static const struct dma_fence_ops msm_vidc_synx_dma_fence_ops = { + .get_driver_name = msm_vidc_synx_dma_fence_get_driver_name, + .get_timeline_name = msm_vidc_synx_dma_fence_get_timeline_name, + .release = msm_vidc_synx_fence_release, +}; + +static struct msm_vidc_fence *msm_vidc_get_synx_fence_from_id( + struct msm_vidc_inst *inst, u64 fence_id) +{ + struct msm_vidc_fence *fence, *dummy_fence; + bool found = false; + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return NULL; + } + + list_for_each_entry_safe(fence, dummy_fence, &inst->fence_list, list) { + if (fence->fence_id == fence_id) { + found = true; + break; + } + } + + if (!found) { + i_vpr_l(inst, "%s: no fence available for id: %u\n", + __func__, fence_id); + return NULL; + } + + return fence; +} + +static void msm_vidc_synx_fence_destroy(struct msm_vidc_inst *inst, u64 fence_id) +{ + struct msm_vidc_fence *fence; + + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return; + } + + fence = msm_vidc_get_synx_fence_from_id(inst, fence_id); + if (!fence) { + return; + } + + i_vpr_e(inst, "%s: fence %s\n", __func__, fence->name); + list_del_init(&fence->list); + + dma_fence_set_error(&fence->dma_fence, -EINVAL); + dma_fence_signal(&fence->dma_fence); + dma_fence_put(&fence->dma_fence); +} + +static int msm_vidc_synx_fence_register(struct msm_vidc_core *core) +{ + struct synx_initialization_params params; + struct synx_session *session = NULL; + char synx_session_name[MAX_SYNX_FENCE_SESSION_NAME]; + struct synx_queue_desc queue_desc; + + if (!core && !core->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (!core->capabilities[SUPPORTS_SYNX_FENCE].value) + return 0; + + /* fill synx_initialization_params */ + memset(¶ms, 0, sizeof(struct synx_initialization_params)); + memset(&queue_desc, 0, sizeof(struct synx_queue_desc)); + + params.id = (enum synx_client_id)MSM_VIDC_SYNX_FENCE_CLIENT_ID; + snprintf(synx_session_name, MAX_SYNX_FENCE_SESSION_NAME, + "video synx fence"); + params.name = synx_session_name; + params.ptr = &queue_desc; + + session = + (struct synx_session *)synx_hwfence_initialize(¶ms); + if (IS_ERR_OR_NULL(session)) { + d_vpr_e("%s: invalid synx fence session\n", __func__); + return -EINVAL; + } + + /* fill core synx fence data */ + core->synx_fence_data.client_id = (u32)params.id; + core->synx_fence_data.session = (void *)session; + core->synx_fence_data.queue.size = (u32)queue_desc.size; + core->synx_fence_data.queue.kvaddr = queue_desc.vaddr; + core->synx_fence_data.queue.phys_addr = (phys_addr_t)queue_desc.dev_addr; + + core->synx_fence_data.queue.type = MSM_VIDC_BUF_INTERFACE_QUEUE; + core->synx_fence_data.queue.region = MSM_VIDC_NON_SECURE; + core->synx_fence_data.queue.direction = DMA_BIDIRECTIONAL; + + d_vpr_h("%s: successfully registered synx fence\n", __func__); + return 0; +} + +static int msm_vidc_synx_fence_deregister(struct msm_vidc_core *core) +{ + int rc = 0; + + if (!core || !core->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (!core->capabilities[SUPPORTS_SYNX_FENCE].value) + return 0; + + rc = synx_hwfence_uninitialize( + (struct synx_session *)core->synx_fence_data.session); + if (rc) { + d_vpr_e("%s: failed to deregister synx fence\n", __func__); + /* ignore error */ + rc = 0; + } else { + d_vpr_l("%s: successfully deregistered synx fence\n", __func__); + } + + return rc; +} + +static struct msm_vidc_fence *msm_vidc_synx_dma_fence_create(struct msm_vidc_inst *inst) +{ + struct msm_vidc_fence *fence = NULL; + int rc = 0; + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return NULL; + } + + rc = msm_vidc_vmem_alloc(sizeof(*fence), (void **)&fence, __func__); + if (rc) + return NULL; + + fence->fd = INVALID_FD; + spin_lock_init(&fence->lock); + dma_fence_init(&fence->dma_fence, &msm_vidc_synx_dma_fence_ops, + &fence->lock, inst->fence_context.ctx_num, + ++inst->fence_context.seq_num); + snprintf(fence->name, sizeof(fence->name), "synx %s: %llu", + inst->fence_context.name, inst->fence_context.seq_num); + + fence->fence_id = fence->dma_fence.seqno; + + INIT_LIST_HEAD(&fence->list); + list_add_tail(&fence->list, &inst->fence_list); + i_vpr_l(inst, "%s: created %s\n", __func__, fence->name); + + return fence; +} + +static struct msm_vidc_fence *msm_vidc_synx_fence_create(struct msm_vidc_inst *inst) +{ + int rc = 0; + struct msm_vidc_fence *fence = NULL; + struct msm_vidc_core *core = NULL; + struct synx_create_params params; + u32 fence_id = 0; + + if (!inst || !inst->core || !fence) { + d_vpr_e("%s: invalid params\n", __func__); + return NULL; + } + core = inst->core; + if (!core->capabilities) { + d_vpr_e("%s: invalid core caps\n", __func__); + return NULL; + } + + /* return if synx fence is not supported */ + if (!core->capabilities[SUPPORTS_SYNX_FENCE].value) + return NULL; + + /* create dma fence */ + fence = msm_vidc_synx_dma_fence_create(inst); + if (!fence) { + i_vpr_e(inst, "%s: failed to create dma fence\n", __func__); + return NULL; + } + + if (!core->synx_fence_data.session) { + i_vpr_e(inst, "%s: invalid synx fence session\n", __func__); + goto destroy_dma_fence; + } + + /* fill synx fence params structure */ + memset(¶ms, 0, sizeof(struct synx_create_params)); + params.name = fence->name; + params.fence = (void *)&fence->dma_fence; + params.h_synx = &fence_id; + params.flags = MSM_VIDC_SYNX_CREATE_DMA_FENCE; + + /* create hw fence */ + rc = synx_hwfence_create( + (struct synx_session *)core->synx_fence_data.session, + ¶ms); + if (rc) { + i_vpr_e(inst, "%s: failed to create hw fence for %s", + __func__, fence->name); + goto destroy_dma_fence; + } + + fence->fence_id = (u64)(*(params.h_synx)); + /* this copy of hw fence client handle is req. to destroy synx fence */ + fence->session = core->synx_fence_data.session; + i_vpr_l(inst, "%s: successfully created synx fence with id: %llu", + __func__, fence->fence_id); + + return fence; + +destroy_dma_fence: + msm_vidc_synx_fence_destroy(inst, fence->fence_id); + return NULL; +} + +int msm_vidc_synx_fence_create_fd(struct msm_vidc_inst *inst, + struct msm_vidc_fence *fence) +{ + int rc = 0; + + if (!inst || !fence) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + fence->fd = get_unused_fd_flags(0); + if (fence->fd < 0) { + i_vpr_e(inst, "%s: getting fd (%d) failed\n", __func__, + fence->fd); + rc = -EINVAL; + goto err_fd; + } + fence->sync_file = sync_file_create(&fence->dma_fence); + if (!fence->sync_file) { + i_vpr_e(inst, "%s: sync_file_create failed\n", __func__); + rc = -EINVAL; + goto err_sync_file; + } + fd_install(fence->fd, fence->sync_file->file); + + i_vpr_l(inst, "%s: created fd %d for fence %s\n", __func__, + fence->fd, fence->name); + + return 0; + +err_sync_file: + put_unused_fd(fence->fd); +err_fd: + return rc; +} + +static int msm_vidc_synx_fence_signal(struct msm_vidc_inst *inst, u64 fence_id) +{ + int rc = 0; + struct msm_vidc_fence *fence; + struct msm_vidc_core *core; + + if (!inst || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + core = inst->core; + if (!core->capabilities) { + d_vpr_e("%s: invalid core caps\n", __func__); + return -EINVAL; + } + + fence = msm_vidc_get_synx_fence_from_id(inst, fence_id); + if (!fence) { + i_vpr_e(inst, "%s: no fence available to signal with id: %u\n", + __func__, fence_id); + rc = -EINVAL; + goto exit; + } + + i_vpr_l(inst, "%s: fence %s\n", __func__, fence->name); + list_del_init(&fence->list); + + dma_fence_signal(&fence->dma_fence); + dma_fence_put(&fence->dma_fence); + +exit: + return rc; +} + +static void msm_vidc_synx_fence_recover(struct msm_vidc_core *core) +{ + int rc = 0; + + if (!core) { + d_vpr_e("%s: invalid paras\n", __func__); + return; + } + + rc = synx_hwfence_recover( + (enum synx_client_id)core->synx_fence_data.client_id); + if (rc) + d_vpr_e("%s: failed to recover synx fences for client id: %d", + __func__, + (enum synx_client_id)core->synx_fence_data.client_id); + + return; +} + +const struct msm_vidc_fence_ops *get_synx_fence_ops(void) +{ + static struct msm_vidc_fence_ops synx_ops; + + synx_ops.fence_register = msm_vidc_synx_fence_register; + synx_ops.fence_deregister = msm_vidc_synx_fence_deregister; + synx_ops.fence_create = msm_vidc_synx_fence_create; + synx_ops.fence_create_fd = msm_vidc_synx_fence_create_fd; + synx_ops.fence_destroy = msm_vidc_synx_fence_destroy; + synx_ops.fence_signal = msm_vidc_synx_fence_signal; + synx_ops.fence_recover = msm_vidc_synx_fence_recover; + + return &synx_ops; +} diff --git a/driver/vidc/src/venus_hfi_queue.c b/driver/vidc/src/venus_hfi_queue.c index 36f276d244..f37c59cf2b 100644 --- a/driver/vidc/src/venus_hfi_queue.c +++ b/driver/vidc/src/venus_hfi_queue.c @@ -429,6 +429,8 @@ void venus_hfi_queue_deinit(struct msm_vidc_core *core) call_mem_op(core, memory_unmap_free, core, &core->sfr.mem); call_mem_op(core, iommu_unmap, core, &core->aon.mem); call_mem_op(core, memory_unmap_free, core, &core->mmap_buf.mem); + call_mem_op(core, mem_dma_unmap_page, core, + &core->synx_fence_data.queue); for (i = 0; i < VIDC_IFACEQ_NUMQ; i++) { core->iface_queues[i].q_hdr = NULL; @@ -588,6 +590,20 @@ int venus_hfi_queue_init(struct msm_vidc_core *core) /* write sfr buffer size in first word */ *((u32 *)core->sfr.align_virtual_addr) = core->sfr.mem_size; + /* map synx fence tx/rx queue buffer */ + if (core->capabilities[SUPPORTS_SYNX_FENCE].value) { + /* + * queue memory is already allocated by synx fence + * driver during msm_vidc_synx_fence_register(..) call + */ + rc = call_mem_op(core, mem_dma_map_page, core, + &core->synx_fence_data.queue); + if (rc) { + d_vpr_e("%s: synx fence queue buffer map failed\n", __func__); + goto fail_alloc_queue; + } + } + /* map aon registers */ memset(&mem, 0, sizeof(mem)); dev_reg = venus_hfi_get_device_region_info(core, MSM_VIDC_AON_REGISTERS); @@ -634,12 +650,15 @@ int venus_hfi_queue_init(struct msm_vidc_core *core) * payload[7-8] : address and size of HW mutex registers * payload[9-10] : address and size of IPCC registers * payload[11-12] : address and size of AON registers + * payload[13-14] : address and size of synx fence queue memory */ memset(core->mmap_buf.align_virtual_addr, 0, ALIGNED_MMAP_BUF_SIZE); payload = ((u32 *)core->mmap_buf.align_virtual_addr); payload[0] = 1; payload[11] = core->aon.mem.device_addr; payload[12] = core->aon.mem.size; + payload[13] = core->synx_fence_data.queue.device_addr; + payload[14] = core->synx_fence_data.queue.size; skip_mmap_buffer: return 0; diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index 7269b5e058..b9352110f8 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -1001,11 +1001,11 @@ static int handle_output_buffer(struct msm_vidc_inst *inst, if (inst->hfi_frame_info.fence_id) { if (buf->data_size) { /* signal fence */ - msm_vidc_fence_signal(inst, + call_fence_op(core, fence_signal, inst, inst->hfi_frame_info.fence_id); } else { /* destroy fence */ - msm_vidc_fence_destroy(inst, + call_fence_op(core, fence_destroy, inst, inst->hfi_frame_info.fence_id); } } diff --git a/msm_video/Kbuild b/msm_video/Kbuild index 5eca4dff08..b2337c4cb3 100644 --- a/msm_video/Kbuild +++ b/msm_video/Kbuild @@ -25,7 +25,10 @@ endif LINUXINCLUDE += -I$(VIDEO_DRIVER_ABS_PATH)/platform/common/inc \ -I$(VIDEO_DRIVER_ABS_PATH)/variant/common/inc \ -I$(VIDEO_DRIVER_ABS_PATH)/vidc/inc \ - -I$(VIDEO_ROOT)/include/uapi/vidc + -I$(VIDEO_ROOT)/include/uapi/vidc \ + -I$(VIDEO_ROOT)/../mm-drivers/hw_fence/include/ \ + -I$(VIDEO_ROOT)/../synx-kernel/msm/synx/ \ + -I$(VIDEO_ROOT)/../synx-kernel/include/uapi/synx/media/ USERINCLUDE += -I$(VIDEO_ROOT)/include/uapi/vidc/media \ -I$(VIDEO_ROOT)/include/uapi/vidc @@ -69,6 +72,7 @@ msm_video-objs += $(VIDEO_DRIVER_REL_PATH)/platform/common/src/msm_vidc_platform $(VIDEO_DRIVER_REL_PATH)/vidc/src/msm_vidc_memory.o \ $(VIDEO_DRIVER_REL_PATH)/vidc/src/msm_vidc_memory_ext.o \ $(VIDEO_DRIVER_REL_PATH)/vidc/src/msm_vidc_fence.o \ + $(VIDEO_DRIVER_REL_PATH)/vidc/src/msm_vidc_synx.o \ $(VIDEO_DRIVER_REL_PATH)/vidc/src/venus_hfi.o \ $(VIDEO_DRIVER_REL_PATH)/vidc/src/venus_hfi_queue.o \ $(VIDEO_DRIVER_REL_PATH)/vidc/src/hfi_packet.o \ From eaf80f36cb45b27a52dbf56b1371770950dff995 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Thu, 9 Feb 2023 19:04:41 -0800 Subject: [PATCH 0858/1061] video: driver: Add support to map synx fence registers Add support to map below mentioned registers required for synx v2 fence support - FENCE - QTMR0_F0V1_QTMR_V1_CNTPCT_LO - QTMR0_F0V1_QTMR_V1_CNTPCT_HI Change-Id: I43a80ca9be282eb4bbfc46a8d62d875478619516 Signed-off-by: Akshata Sahukar --- .../pineapple/src/msm_vidc_pineapple.c | 16 ++- driver/vidc/inc/msm_vidc_core.h | 4 +- driver/vidc/inc/msm_vidc_internal.h | 4 +- driver/vidc/src/venus_hfi_queue.c | 122 ++++++++++++++---- 4 files changed, 115 insertions(+), 31 deletions(-) diff --git a/driver/platform/pineapple/src/msm_vidc_pineapple.c b/driver/platform/pineapple/src/msm_vidc_pineapple.c index 1c59c859fa..ff057aa49f 100644 --- a/driver/platform/pineapple/src/msm_vidc_pineapple.c +++ b/driver/platform/pineapple/src/msm_vidc_pineapple.c @@ -2658,7 +2658,21 @@ static const struct reg_preset_table pineapple_reg_preset_table[] = { /* name, phys_addr, size, device_addr, device region type */ static const struct device_region_table pineapple_device_region_table[] = { - { "aon-registers", 0x0AAE0000, 0x1000, 0xFFAE0000, MSM_VIDC_AON_REGISTERS }, + { + "aon-registers", + 0x0AAE0000, 0x1000, 0xFFAE0000, + MSM_VIDC_AON + }, + { + "ipc_protocol4_client8_version-registers", + 0x00508000, 0x1000, 0xFFADD000, + MSM_VIDC_PROTOCOL_FENCE_CLIENT_VPU + }, + { + "qtimer_f0v1_qtmr_v1_cntpct_lo", + 0x17421000, 0x1000, 0xFFADC000, + MSM_VIDC_QTIMER + }, }; /* decoder properties */ diff --git a/driver/vidc/inc/msm_vidc_core.h b/driver/vidc/inc/msm_vidc_core.h index 27f5015106..1da71123ee 100644 --- a/driver/vidc/inc/msm_vidc_core.h +++ b/driver/vidc/inc/msm_vidc_core.h @@ -92,7 +92,9 @@ struct msm_vidc_core { struct msm_vidc_mem_addr sfr; struct msm_vidc_mem_addr iface_q_table; struct msm_vidc_mem_addr mmap_buf; - struct msm_vidc_mem_addr aon; + struct msm_vidc_mem_addr aon_reg; + struct msm_vidc_mem_addr fence_reg; + struct msm_vidc_mem_addr qtimer_reg; struct msm_vidc_iface_q_info iface_queues[VIDC_IFACEQ_NUMQ]; struct delayed_work pm_work; struct workqueue_struct *pm_workq; diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 7e666200f0..be4383f4f0 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -464,7 +464,9 @@ enum msm_vidc_buffer_region { enum msm_vidc_device_region { MSM_VIDC_DEVICE_REGION_NONE = 0, - MSM_VIDC_AON_REGISTERS, + MSM_VIDC_AON, + MSM_VIDC_PROTOCOL_FENCE_CLIENT_VPU, + MSM_VIDC_QTIMER, MSM_VIDC_DEVICE_REGION_MAX, }; diff --git a/driver/vidc/src/venus_hfi_queue.c b/driver/vidc/src/venus_hfi_queue.c index f37c59cf2b..4322b148cd 100644 --- a/driver/vidc/src/venus_hfi_queue.c +++ b/driver/vidc/src/venus_hfi_queue.c @@ -427,7 +427,9 @@ void venus_hfi_queue_deinit(struct msm_vidc_core *core) call_mem_op(core, memory_unmap_free, core, &core->iface_q_table.mem); call_mem_op(core, memory_unmap_free, core, &core->sfr.mem); - call_mem_op(core, iommu_unmap, core, &core->aon.mem); + call_mem_op(core, iommu_unmap, core, &core->aon_reg.mem); + call_mem_op(core, iommu_unmap, core, &core->fence_reg.mem); + call_mem_op(core, iommu_unmap, core, &core->qtimer_reg.mem); call_mem_op(core, memory_unmap_free, core, &core->mmap_buf.mem); call_mem_op(core, mem_dma_unmap_page, core, &core->synx_fence_data.queue); @@ -444,8 +446,14 @@ void venus_hfi_queue_deinit(struct msm_vidc_core *core) core->sfr.align_virtual_addr = NULL; core->sfr.align_device_addr = 0; - core->aon.align_virtual_addr = NULL; - core->aon.align_device_addr = 0; + core->aon_reg.align_virtual_addr = NULL; + core->aon_reg.align_device_addr = 0; + + core->fence_reg.align_virtual_addr = NULL; + core->fence_reg.align_device_addr = 0; + + core->qtimer_reg.align_virtual_addr = NULL; + core->qtimer_reg.align_device_addr = 0; core->mmap_buf.align_virtual_addr = NULL; core->mmap_buf.align_device_addr = 0; @@ -490,13 +498,52 @@ int venus_hfi_reset_queue_header(struct msm_vidc_core *core) return rc; } +static int venus_hfi_iommu_map_registers(struct msm_vidc_core *core, + enum msm_vidc_device_region reg_region, + enum msm_vidc_buffer_region buf_region, + struct msm_vidc_mem_addr *core_mem) +{ + int rc = 0; + struct device_region_info *dev_reg; + struct msm_vidc_mem mem; + + if (!core_mem) { + d_vpr_h("%s: invalid params\n", __func__); + return -EINVAL; + } + + memset(&mem, 0, sizeof(mem)); + dev_reg = venus_hfi_get_device_region_info(core, reg_region); + if (!dev_reg) { + d_vpr_h("%s: %u device region not available\n", + __func__, reg_region); + goto skip_mmap_buffer; + } + + mem.region = buf_region; + mem.phys_addr = dev_reg->phy_addr; + mem.size = dev_reg->size; + mem.device_addr = dev_reg->dev_addr; + rc = call_mem_op(core, iommu_map, core, &mem); + if (rc) { + d_vpr_e("%s: %u map failed\n", __func__, reg_region); + goto fail_alloc_queue; + } + core_mem->align_device_addr = mem.device_addr; + core_mem->mem = mem; + +skip_mmap_buffer: + return 0; +fail_alloc_queue: + return -ENOMEM; +} + int venus_hfi_queue_init(struct msm_vidc_core *core) { int rc = 0; struct hfi_queue_table_header *q_tbl_hdr; struct hfi_queue_header *q_hdr; struct msm_vidc_iface_q_info *iface_q; - struct device_region_info *dev_reg; struct msm_vidc_mem mem; int offset = 0; u32 *payload; @@ -504,6 +551,11 @@ int venus_hfi_queue_init(struct msm_vidc_core *core) d_vpr_h("%s()\n", __func__); + if (!core || !core->capabilities) { + d_vpr_h("%s: invalid params\n", __func__); + return -EINVAL; + } + if (core->iface_q_table.align_virtual_addr) { d_vpr_h("%s: queues already allocated\n", __func__); venus_hfi_reset_queue_header(core); @@ -604,25 +656,25 @@ int venus_hfi_queue_init(struct msm_vidc_core *core) } } - /* map aon registers */ - memset(&mem, 0, sizeof(mem)); - dev_reg = venus_hfi_get_device_region_info(core, MSM_VIDC_AON_REGISTERS); - if (!dev_reg) { - d_vpr_h("%s: aon device region not available\n", __func__); - goto skip_mmap_buffer; - } - mem.region = MSM_VIDC_NON_SECURE; - mem.phys_addr = dev_reg->phy_addr; - mem.size = dev_reg->size; - mem.device_addr = dev_reg->dev_addr; - rc = call_mem_op(core, iommu_map, core, &mem); - if (rc) { - d_vpr_e("%s: aon map failed\n", __func__); - goto fail_alloc_queue; - } - core->aon.align_virtual_addr = mem.kvaddr; - core->aon.align_device_addr = mem.device_addr; - core->aon.mem = mem; + /* map aon_reg registers */ + rc = venus_hfi_iommu_map_registers(core, MSM_VIDC_AON, + MSM_VIDC_NON_SECURE, &core->aon_reg); + if (rc) + return rc; + + /* map fence registers */ + rc = venus_hfi_iommu_map_registers(core, + MSM_VIDC_PROTOCOL_FENCE_CLIENT_VPU, + MSM_VIDC_NON_SECURE, &core->fence_reg); + if (rc) + return rc; + + /* map qtimer low registers */ + rc = venus_hfi_iommu_map_registers(core, + MSM_VIDC_QTIMER, + MSM_VIDC_NON_SECURE, &core->qtimer_reg); + if (rc) + return rc; /* allocate 4k buffer for HFI_MMAP_ADDR */ memset(&mem, 0, sizeof(mem)); @@ -651,17 +703,31 @@ int venus_hfi_queue_init(struct msm_vidc_core *core) * payload[9-10] : address and size of IPCC registers * payload[11-12] : address and size of AON registers * payload[13-14] : address and size of synx fence queue memory + * payload[19-20] : address and size of IPC_PROTOCOL4_CLIENT_VERSION registers + * payload[21-22] : address and size of FENCE QTIMER registers */ memset(core->mmap_buf.align_virtual_addr, 0, ALIGNED_MMAP_BUF_SIZE); payload = ((u32 *)core->mmap_buf.align_virtual_addr); payload[0] = 1; - payload[11] = core->aon.mem.device_addr; - payload[12] = core->aon.mem.size; - payload[13] = core->synx_fence_data.queue.device_addr; - payload[14] = core->synx_fence_data.queue.size; + if (core->aon_reg.mem.device_addr) { + payload[11] = core->aon_reg.mem.device_addr; + payload[12] = core->aon_reg.mem.size; + } + if (core->synx_fence_data.queue.device_addr) { + payload[13] = core->synx_fence_data.queue.device_addr; + payload[14] = core->synx_fence_data.queue.size; + } + if (core->fence_reg.mem.device_addr) { + payload[19] = core->fence_reg.mem.device_addr; + payload[20] = core->fence_reg.mem.size; + } + if (core->qtimer_reg.mem.device_addr) { + payload[21] = core->qtimer_reg.mem.device_addr; + payload[22] = core->qtimer_reg.mem.size; + } -skip_mmap_buffer: return 0; + fail_alloc_queue: return -ENOMEM; } From 625745bf0074c7d8c75b39e0646d284f15b73b17 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Wed, 15 Mar 2023 18:23:11 -0700 Subject: [PATCH 0859/1061] video: driver: Add debugfs support to disable synx v2 fence Add debugfs support to disable synx fence falling back to dma sw fence via parameter "msm_vidc_disable_synx_fence" Change-Id: I46b4833c2dfabec95f5ff34a0aef42043f8f6f5c Signed-off-by: Akshata Sahukar --- .../pineapple/src/msm_vidc_pineapple.c | 2 +- driver/vidc/inc/msm_vidc_debug.h | 1 + driver/vidc/src/msm_vidc_debug.c | 6 +++ driver/vidc/src/msm_vidc_probe.c | 51 +++++++++---------- 4 files changed, 33 insertions(+), 27 deletions(-) diff --git a/driver/platform/pineapple/src/msm_vidc_pineapple.c b/driver/platform/pineapple/src/msm_vidc_pineapple.c index ff057aa49f..eba17c4c08 100644 --- a/driver/platform/pineapple/src/msm_vidc_pineapple.c +++ b/driver/platform/pineapple/src/msm_vidc_pineapple.c @@ -324,7 +324,7 @@ static struct msm_platform_core_capability core_data_pineapple[] = { {ENC_AUTO_FRAMERATE, 1}, {DEVICE_CAPS, V4L2_CAP_VIDEO_M2M_MPLANE | V4L2_CAP_META_CAPTURE | V4L2_CAP_STREAMING}, - {SUPPORTS_SYNX_FENCE, 0}, /* disabled temporarily */ + {SUPPORTS_SYNX_FENCE, 1}, {SUPPORTS_REQUESTS, 1}, }; diff --git a/driver/vidc/inc/msm_vidc_debug.h b/driver/vidc/inc/msm_vidc_debug.h index c9d84c6f00..3ac1444402 100644 --- a/driver/vidc/inc/msm_vidc_debug.h +++ b/driver/vidc/inc/msm_vidc_debug.h @@ -39,6 +39,7 @@ extern int msm_vidc_ddr_bw; extern int msm_vidc_llc_bw; extern bool msm_vidc_fw_dump; extern unsigned int msm_vidc_enable_bugon; +extern bool msm_vidc_disable_synx_fence; /* do not modify the log message as it is used in test scripts */ #define FMT_STRING_SET_CTRL \ diff --git a/driver/vidc/src/msm_vidc_debug.c b/driver/vidc/src/msm_vidc_debug.c index 5fb35624b5..af05a9b725 100644 --- a/driver/vidc/src/msm_vidc_debug.c +++ b/driver/vidc/src/msm_vidc_debug.c @@ -124,6 +124,10 @@ module_param_cb(msm_vidc_fw_dump, &msm_vidc_fw_dump_fops, &g_core, 0644); bool msm_vidc_lossless_encode = !true; EXPORT_SYMBOL(msm_vidc_lossless_encode); +/* disabled synx fence by default temporarily */ +bool msm_vidc_disable_synx_fence = !false; +EXPORT_SYMBOL(msm_vidc_disable_synx_fence); + bool msm_vidc_syscache_disable = !true; EXPORT_SYMBOL(msm_vidc_syscache_disable); @@ -398,6 +402,8 @@ struct dentry* msm_vidc_debugfs_init_drv(void) &msm_vidc_syscache_disable); debugfs_create_bool("lossless_encoding", 0644, dir, &msm_vidc_lossless_encode); + debugfs_create_bool("disable_synx_v2_fence", 0644, dir, + &msm_vidc_disable_synx_fence); debugfs_create_u32("enable_bugon", 0644, dir, &msm_vidc_enable_bugon); diff --git a/driver/vidc/src/msm_vidc_probe.c b/driver/vidc/src/msm_vidc_probe.c index 5539a659ba..e00fcf3ddf 100644 --- a/driver/vidc/src/msm_vidc_probe.c +++ b/driver/vidc/src/msm_vidc_probe.c @@ -568,38 +568,37 @@ static int msm_vidc_component_master_bind(struct device *dev) return rc; } - /* register for synx fence */ if (core->capabilities[SUPPORTS_SYNX_FENCE].value) { - rc = call_fence_op(core, fence_register, core); - if (rc) { - d_vpr_e("%s: failed to register synx fence\n", - __func__); - core->capabilities[SUPPORTS_SYNX_FENCE].value = 0; - /* - * - Bail out the session for time being for this - * case where synx fence register call retunrs error - * to help with debugging - * - Re-initialize fence ops with dma_fence_ops. - * This is required once we start ignoring this - * synx fence register call error. - */ + if (msm_vidc_disable_synx_fence) { + /* override synx fence ops with dma fence ops */ core->fence_ops = get_dma_fence_ops(); if (!core->fence_ops) { d_vpr_e("%s: invalid dma fence ops\n", __func__); return -EINVAL; } - - return rc; - } - } else { - /* - * override synx fence ops with dma fence ops for - * time being until synx fence support is enabled - */ - core->fence_ops = get_dma_fence_ops(); - if (!core->fence_ops) { - d_vpr_e("%s: invalid dma fence ops\n", __func__); - return -EINVAL; + core->capabilities[SUPPORTS_SYNX_FENCE].value = 0; + } else { + /* register for synx fence */ + rc = call_fence_op(core, fence_register, core); + if (rc) { + d_vpr_e("%s: failed to register synx fence\n", + __func__); + core->capabilities[SUPPORTS_SYNX_FENCE].value = 0; + /* + * - Bail out the session for time being for this + * case where synx fence register call retunrs error + * to help with debugging + * - Re-initialize fence ops with dma_fence_ops. + * This is required once we start ignoring this + * synx fence register call error. + */ + core->fence_ops = get_dma_fence_ops(); + if (!core->fence_ops) { + d_vpr_e("%s: invalid dma fence ops\n", __func__); + return -EINVAL; + } + return rc; + } } } From ed089ff4e541245ced91843fc7b934fe265c2706 Mon Sep 17 00:00:00 2001 From: Maheshwar Ajja Date: Thu, 23 Feb 2023 11:50:33 -0800 Subject: [PATCH 0860/1061] video: driver: add driver version Add driver version for clients to query and manage accordginly. Change-Id: I5e8c51a4f18c28c0ed4d5a8bdaf0660d175c420a Signed-off-by: Maheshwar Ajja --- driver/platform/kalama/src/msm_vidc_kalama.c | 5 +++++ driver/platform/pineapple/src/msm_vidc_pineapple.c | 5 +++++ driver/vidc/inc/msm_vidc_internal.h | 1 + driver/vidc/src/msm_vidc_control.c | 6 ++++++ include/uapi/vidc/media/v4l2_vidc_extensions.h | 3 +++ 5 files changed, 20 insertions(+) diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index 17f4fa3130..801e22d675 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -22,6 +22,8 @@ #include "hfi_property.h" #include "hfi_command.h" +/* version: major[24:31], minor[16:23], revision[0:15] */ +#define DRIVER_VERSION 0x04000000 #define DEFAULT_VIDEO_CONCEAL_COLOR_BLACK 0x8020010 #define MAX_BASE_LAYER_PRIORITY_ID 63 #define MAX_OP_POINT 31 @@ -332,6 +334,9 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { * hfi_id, * flags} */ + {DRV_VERSION, DEC|ENC, CODECS_ALL, + 0, INT_MAX, 1, DRIVER_VERSION, + V4L2_CID_MPEG_VIDC_DRIVER_VERSION}, {FRAME_WIDTH, DEC, CODECS_ALL, 96, 8192, 1, 1920}, diff --git a/driver/platform/pineapple/src/msm_vidc_pineapple.c b/driver/platform/pineapple/src/msm_vidc_pineapple.c index d738702ca1..7c90077a01 100644 --- a/driver/platform/pineapple/src/msm_vidc_pineapple.c +++ b/driver/platform/pineapple/src/msm_vidc_pineapple.c @@ -23,6 +23,8 @@ #include "hfi_command.h" #include "venus_hfi.h" +/* version: major[24:31], minor[16:23], revision[0:15] */ +#define DRIVER_VERSION 0x04000000 #define DEFAULT_VIDEO_CONCEAL_COLOR_BLACK 0x8020010 #define MAX_BASE_LAYER_PRIORITY_ID 63 #define MAX_OP_POINT 31 @@ -391,6 +393,9 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { * hfi_id, * flags} */ + {DRV_VERSION, DEC|ENC, CODECS_ALL, + 0, INT_MAX, 1, DRIVER_VERSION, + V4L2_CID_MPEG_VIDC_DRIVER_VERSION}, {FRAME_WIDTH, DEC, CODECS_ALL, 96, 8192, 1, 1920}, diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 7f84fc40a4..5f91139d70 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -231,6 +231,7 @@ enum msm_vidc_metadata_bits { CAP(META_SALIENCY_INFO) \ CAP(META_TRANSCODING_STAT_INFO) \ CAP(META_DOLBY_RPU) \ + CAP(DRV_VERSION) \ CAP(MIN_FRAME_QP) \ CAP(MAX_FRAME_QP) \ CAP(I_FRAME_QP) \ diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 4b3de8aece..31bf14d39b 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -772,6 +772,12 @@ static int msm_vidc_update_static_property(struct msm_vidc_inst *inst, return -EINVAL; } + if (cap_id == DRV_VERSION) { + i_vpr_e(inst, "%s: driver version update not allowed\n", + __func__); + return -EINVAL; + } + /* update value to db */ msm_vidc_update_cap_value(inst, cap_id, ctrl->val, __func__); diff --git a/include/uapi/vidc/media/v4l2_vidc_extensions.h b/include/uapi/vidc/media/v4l2_vidc_extensions.h index bb6157f801..6f4a8ad92b 100644 --- a/include/uapi/vidc/media/v4l2_vidc_extensions.h +++ b/include/uapi/vidc/media/v4l2_vidc_extensions.h @@ -280,6 +280,9 @@ enum v4l2_mpeg_video_av1_tier { #define V4L2_CID_MPEG_VIDC_CSC \ (V4L2_CID_MPEG_VIDC_BASE + 0x47) +#define V4L2_CID_MPEG_VIDC_DRIVER_VERSION \ + (V4L2_CID_MPEG_VIDC_BASE + 0x48) + enum v4l2_mpeg_vidc_metapayload_header_flags { METADATA_FLAGS_NONE = 0, METADATA_FLAGS_TOP_FIELD = (1 << 0), From 90bd7764403e86dc8a9127e1190a1757fab2dfed Mon Sep 17 00:00:00 2001 From: Rakshitha Shakamuri Date: Mon, 13 Mar 2023 11:05:43 -0700 Subject: [PATCH 0861/1061] video-driver: support for bazel compilation Adding Bazel files and making changes to support same. Change-Id: I95656a9b36b86010bd74896b0d7394d72c9b0f5d --- BUILD.bazel | 49 ++++++++++++++++++++ target.bzl | 16 +++++++ video_driver_build.bzl | 103 +++++++++++++++++++++++++++++++++++++++++ video_modules.bzl | 85 ++++++++++++++++++++++++++++++++++ 4 files changed, 253 insertions(+) create mode 100644 BUILD.bazel create mode 100644 target.bzl create mode 100644 video_driver_build.bzl create mode 100644 video_modules.bzl diff --git a/BUILD.bazel b/BUILD.bazel new file mode 100644 index 0000000000..f50948f169 --- /dev/null +++ b/BUILD.bazel @@ -0,0 +1,49 @@ +load("//build/kernel/kleaf:kernel.bzl", "ddk_headers") + +package( + default_visibility = [ + "//visibility:public"], +) + +ddk_headers( + name = "uapi_headers", + hdrs = glob([ + "include/uapi/vidc/media/*.h", + ]), + includes = ["include/uapi/vidc/media"] +) + +ddk_headers( + name = "pineapple_headers", + hdrs = glob([ + "driver/platform/pineapple/inc/*.h", + ]), + includes = ["driver/platform/pineapple/inc"] +) + +ddk_headers( + name = "iris33_headers", + hdrs = glob([ + "driver/variant/iris33/inc/*.h", + ]), + includes = ["driver/variant/iris33/inc"] +) + +ddk_headers( + name = "vidc_headers", + hdrs = glob([ + "driver/vidc/inc/*.h", + "driver/variant/common/inc/*.h", + "driver/platform/common/inc/*.h" + ]), + includes = ["driver/vidc/inc", "driver/variant/common/inc", "driver/platform/common/inc"] +) + +ddk_headers( + name = "video_driver_headers", + # hdrs = [":pineapple_configs", "uapi_headers", "pineapple_headers", "iris33_headers", "vidc_headers"] + hdrs = [":uapi_headers", "pineapple_headers", "iris33_headers", "vidc_headers"] +) + +load(":target.bzl", "define_pineapple") +define_pineapple() diff --git a/target.bzl b/target.bzl new file mode 100644 index 0000000000..a3a43f228c --- /dev/null +++ b/target.bzl @@ -0,0 +1,16 @@ +load(":video_modules.bzl", "video_driver_modules") +load(":video_driver_build.bzl", "define_consolidate_gki_modules") + +def define_pineapple(): + define_consolidate_gki_modules( + target = "pineapple", + registry = video_driver_modules, + modules = [ + "msm_video" + # "video" + ], + config_options = [ + "CONFIG_MSM_VIDC_IRIS33", + "CONFIG_MSM_VIDC_PINEAPPLE", + ], + ) \ No newline at end of file diff --git a/video_driver_build.bzl b/video_driver_build.bzl new file mode 100644 index 0000000000..3c6ced493c --- /dev/null +++ b/video_driver_build.bzl @@ -0,0 +1,103 @@ +load("//build/kernel/kleaf:kernel.bzl", "ddk_module", "ddk_submodule") +load("//build/bazel_common_rules/dist:dist.bzl", "copy_to_dist_dir") + +def _register_module_to_map(module_map, name, path, config_option, srcs, config_srcs, deps, config_deps): + processed_config_srcs = {} + + for config_src_name in config_srcs: + config_src = config_srcs[config_src_name] + + if type(config_src) == "list": + processed_config_srcs[config_src_name] = {True: config_src} + else: + processed_config_srcs[config_src_name] = config_src + + module = struct( + name = name, + path = path, + srcs = srcs, + config_srcs = processed_config_srcs, + config_option = config_option, + deps = deps, + ) + module_map[name] = module + +def _get_config_choices(map, options): + choices = [] + for option in map: + choices.extend(map[option].get(option in options,[])) + return choices + +def _get_kernel_build_options(modules, config_options): + all_options = {option: True for option in config_options} + all_options = all_options | {module.config_option: True for module in modules if module.config_option} + return all_options + +def _get_kernel_build_module_srcs(module, options, formatter): + srcs = module.srcs + _get_config_choices(module.config_srcs, options) + print("-",module.name,",",module.config_option,",srcs =",srcs) + module_path = "{}/".format(module.path) if module.path else "" + globbed_srcs = native.glob(["{}{}".format(module_path, formatter(src)) for src in srcs]) + return globbed_srcs + +def _get_kernel_build_module_deps(module, options, formatter): + return [formatter(dep) for dep in module.deps] + +def video_module_entry(hdrs = []): + module_map = {} + def register(name, path = None, config_option = None, srcs = [], config_srcs = {}, deps = [], config_deps = {}): + _register_module_to_map(module_map, name, path, config_option, srcs, config_srcs, deps, config_deps) + return struct( + register = register, + get = module_map.get, + hdrs = hdrs, + module_map = module_map + ) + +def define_target_variant_modules(target, variant, registry, modules, config_options = []): + kernel_build = "{}_{}".format(target, variant) + kernel_build_label = "//msm-kernel:{}".format(kernel_build) + modules = [registry.get(module_name) for module_name in modules] + options = _get_kernel_build_options(modules, config_options) + build_print = lambda message : print("{}: {}".format(kernel_build, message)) + formatter = lambda s : s.replace("%b", kernel_build).replace("%t", target) + headers = ["//msm-kernel:all_headers"] + registry.hdrs + [":{}_headers".format(target)] + print(headers) + all_module_rules = [] + + for module in modules: + rule_name = "{}_{}".format(kernel_build, module.name) + module_srcs = _get_kernel_build_module_srcs(module, options, formatter) + + if not module_srcs: + continue + + ddk_submodule( + name = rule_name, + srcs = module_srcs, + out = "{}.ko".format(module.name), + deps = headers + _get_kernel_build_module_deps(module, options, formatter), + local_defines = options.keys(), + ) + all_module_rules.append(rule_name) + + ddk_module( + name = "{}_video_driver_modules".format(kernel_build), + kernel_build = kernel_build_label, + deps = all_module_rules, + ) + copy_to_dist_dir( + name = "{}_video_driver_modules_dist".format(kernel_build), + data = [":{}_video_driver_modules".format(kernel_build)], + dist_dir = "out/target/product/{}/dlkm/lib/modules/".format(target), + flat = True, + wipe_dist_dir = False, + allow_duplicate_filenames = False, + mode_overrides = {"**/*": "644"}, + log = "info", + ) + +def define_consolidate_gki_modules(target, registry, modules, config_options = []): + # print(modules) + define_target_variant_modules(target, "consolidate", registry, modules, config_options) + define_target_variant_modules(target, "gki", registry, modules, config_options) \ No newline at end of file diff --git a/video_modules.bzl b/video_modules.bzl new file mode 100644 index 0000000000..0a8a2c19c7 --- /dev/null +++ b/video_modules.bzl @@ -0,0 +1,85 @@ +load(":video_driver_build.bzl", "video_module_entry") + +video_driver_modules = video_module_entry([":video_driver_headers"]) +module_entry = video_driver_modules.register + +module_entry( + name = "msm_video", + srcs = [ # vidc common files + "driver/vidc/src/msm_vidc_v4l2.c", + "driver/vidc/src/msm_vidc_vb2.c", + "driver/vidc/src/msm_vidc.c", + "driver/vidc/src/msm_vdec.c", + "driver/vidc/src/msm_venc.c", + "driver/vidc/src/msm_vidc_driver.c", + "driver/vidc/src/msm_vidc_state.c", + "driver/vidc/src/msm_vidc_control.c", + "driver/vidc/src/msm_vidc_control_ext.c", + "driver/vidc/src/msm_vidc_buffer.c", + "driver/vidc/src/msm_vidc_power.c", + "driver/vidc/src/msm_vidc_probe.c", + "driver/vidc/src/resources.c", + "driver/vidc/src/resources_ext.c", + "driver/vidc/src/firmware.c", + "driver/vidc/src/msm_vidc_debug.c", + "driver/vidc/src/msm_vidc_memory.c", + "driver/vidc/src/msm_vidc_memory_ext.c", + "driver/vidc/src/msm_vidc_fence.c", + "driver/vidc/src/venus_hfi.c", + "driver/vidc/src/venus_hfi_queue.c", + "driver/vidc/src/hfi_packet.c", + "driver/vidc/src/venus_hfi_response.c", + "driver/platform/common/src/msm_vidc_platform.c", + "driver/variant/common/src/msm_vidc_variant.c", + ], + config_srcs = { + "CONFIG_MSM_VIDC_IRIS33" : [ + "driver/variant/iris33/src/msm_vidc_buffer_iris33.c", + "driver/variant/iris33/src/msm_vidc_power_iris33.c", + "driver/variant/iris33/src/msm_vidc_iris33.c", + ], + "CONFIG_MSM_VIDC_PINEAPPLE" : [ + "driver/platform/pineapple/src/msm_vidc_pineapple.c", + ], + } +) + +module_entry( + name = "video", + srcs = [ # vidc common files + "driver/vidc/src/msm_vidc_v4l2.c", + "driver/vidc/src/msm_vidc_vb2.c", + "driver/vidc/src/msm_vidc.c", + "driver/vidc/src/msm_vdec.c", + "driver/vidc/src/msm_venc.c", + "driver/vidc/src/msm_vidc_driver.c", + "driver/vidc/src/msm_vidc_state.c", + "driver/vidc/src/msm_vidc_control.c", + "driver/vidc/src/msm_vidc_buffer.c", + "driver/vidc/src/msm_vidc_power.c", + "driver/vidc/src/msm_vidc_probe.c", + "driver/vidc/src/resources.c", + "driver/vidc/src/firmware.c", + "driver/vidc/src/msm_vidc_debug.c", + "driver/vidc/src/msm_vidc_memory.c", + "driver/vidc/src/msm_vidc_fence.c", + "driver/vidc/src/venus_hfi.c", + "driver/vidc/src/venus_hfi_queue.c", + "driver/vidc/src/hfi_packet.c", + "driver/vidc/src/venus_hfi_response.c", + "driver/platform/common/src/msm_vidc_platform.c", + "driver/variant/common/src/msm_vidc_variant.c", + ], + config_srcs = { + "CONFIG_MSM_VIDC_IRIS33" : [ + "driver/variant/iris33/src/msm_vidc_buffer_iris33.c", + "driver/variant/iris3/src/msm_vidc_power_iris3.o", + "driver/variant/iris3/src/msm_vidc_bus_iris3.o", + "driver/variant/iris3/src/msm_vidc_clock_iris3.o", + "driver/variant/iris3/src/msm_vidc_iris3.o" + ], + "CONFIG_MSM_VIDC_PINEAPPLE" : [ + "driver/platform/pineapple/src/msm_vidc_pineapple.c", + ], + } +) \ No newline at end of file From 753fae6969190e5d555e1f858aa993f0e07732d7 Mon Sep 17 00:00:00 2001 From: Vedang Nagar Date: Tue, 21 Mar 2023 21:05:20 +0530 Subject: [PATCH 0862/1061] video: driver: Remove Odd width and Height check Remove odd width and height check during streamon Change-Id: Ie8e86f83d4b65603d5797f4b10b87b049e0cb04d --- driver/vidc/src/msm_vidc_driver.c | 11 ----------- 1 file changed, 11 deletions(-) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 9437f8e145..945b7a99d0 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -5854,17 +5854,6 @@ static int msm_vidc_check_resolution_supported(struct msm_vidc_inst *inst) max_height = capability->cap[FRAME_HEIGHT].max; } - /* reject odd resolution session */ - if (is_encode_session(inst) && - (is_odd(width) || is_odd(height) || - is_odd(inst->compose.width) || - is_odd(inst->compose.height))) { - i_vpr_e(inst, "%s: resolution is not even. wxh [%u x %u], compose [%u x %u]\n", - __func__, width, height, inst->compose.width, - inst->compose.height); - return -EINVAL; - } - /* check if input width and height is in supported range */ if (is_decode_session(inst) || is_encode_session(inst)) { if (!in_range(width, min_width, max_width) || From fc6a238b096cfa70400c0758a31e3992a4f9f215 Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Mon, 6 Mar 2023 17:24:14 -0800 Subject: [PATCH 0863/1061] video: driver: enable dynamic metadata - enable Eva stats, hdr10/10+ as dynamic metadata. - Make eva stats dependent on bitrate mode. Also remove preprocess and layer count as child of Eva stats. - Make Hdr10/10+ dependent on profile. - Adjust transcoding stats metadata based on bitrate mode, fps and resolution. Change-Id: I7b110962e29db50cb321d69a0fb301950436da6f Signed-off-by: Darshana Patil --- .../platform/common/inc/msm_vidc_platform.h | 5 + .../platform/common/src/msm_vidc_platform.c | 244 +++++++++++++++--- .../pineapple/src/msm_vidc_pineapple.c | 54 +++- driver/vidc/inc/hfi_command.h | 1 + driver/vidc/inc/msm_vidc_driver.h | 36 ++- driver/vidc/inc/msm_vidc_internal.h | 6 +- driver/vidc/src/msm_venc.c | 51 ++++ .../uapi/vidc/media/v4l2_vidc_extensions.h | 3 +- 8 files changed, 352 insertions(+), 48 deletions(-) diff --git a/driver/platform/common/inc/msm_vidc_platform.h b/driver/platform/common/inc/msm_vidc_platform.h index e0ad9f815e..5874719c65 100644 --- a/driver/platform/common/inc/msm_vidc_platform.h +++ b/driver/platform/common/inc/msm_vidc_platform.h @@ -330,6 +330,11 @@ int msm_vidc_adjust_all_intra(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_dec_outbuf_fence(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_dec_slice_mode(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_preprocess(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_eva_stats(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_sei_mastering_disp(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_sei_cll(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_hdr10plus(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_transcoding_stats(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_set_header_mode(void *instance, enum msm_vidc_inst_capability_type cap_id); diff --git a/driver/platform/common/src/msm_vidc_platform.c b/driver/platform/common/src/msm_vidc_platform.c index 2afe05d853..976441d367 100644 --- a/driver/platform/common/src/msm_vidc_platform.c +++ b/driver/platform/common/src/msm_vidc_platform.c @@ -524,11 +524,19 @@ int msm_vidc_update_cap_value(struct msm_vidc_inst *inst, u32 cap_id, prev_value = inst->capabilities->cap[cap_id].value; if (is_meta_cap(inst, cap_id)) { + if (adjusted_val & MSM_VIDC_META_ENABLE && + adjusted_val & MSM_VIDC_META_DYN_ENABLE) { + i_vpr_e(inst, + "%s: %s cannot be enabled both statically and dynamically", + __func__, cap_name(cap_id)); + return -EINVAL; + } /* * cumulative control value if client set same metadata * control multiple times. */ - if (adjusted_val & MSM_VIDC_META_ENABLE) { + if (adjusted_val & MSM_VIDC_META_ENABLE || + adjusted_val & MSM_VIDC_META_DYN_ENABLE) { /* enable metadata */ inst->capabilities->cap[cap_id].value |= adjusted_val; } else { @@ -1497,17 +1505,6 @@ static int msm_vidc_adjust_static_layer_count_and_type(struct msm_vidc_inst *ins goto exit; } - if (hb_requested && layer_count > 1) { - if (!is_valid_cap(inst, META_EVA_STATS) || - !is_meta_tx_inp_enabled(inst, META_EVA_STATS)) { - i_vpr_h(inst, - "%s: only one layer of heirB supported as eva statistics not available\n", - __func__); - layer_count = 1; - goto exit; - } - } - /* decide hfi layer type */ if (hb_requested) { inst->hfi_layer_type = HFI_HIER_B; @@ -2414,7 +2411,7 @@ int msm_vidc_adjust_preprocess(void *instance, struct v4l2_ctrl *ctrl) { s32 adjusted_value; struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - s32 brs = 0, eva_status = -1; + s32 brs = 0; u32 width, height, frame_rate, operating_rate, max_fps; struct v4l2_format *f; @@ -2435,22 +2432,8 @@ int msm_vidc_adjust_preprocess(void *instance, struct v4l2_ctrl *ctrl) /* * enable preprocess if - * client did not enable EVA metadata statistics and * BRS enabled and upto 4k @ 60 fps */ - if (is_valid_cap(inst, META_EVA_STATS)) { - if (msm_vidc_get_parent_value(inst, - REQUEST_PREPROCESS, - META_EVA_STATS, - &eva_status, __func__)) - return -EINVAL; - /* preprocess not required if client provides eva statistics */ - if (is_meta_tx_inp_enabled(inst, META_EVA_STATS)) { - adjusted_value = 0; - goto update_preprocess; - } - } - if (is_valid_cap(inst, CONTENT_ADAPTIVE_CODING)) { if (msm_vidc_get_parent_value(inst, REQUEST_PREPROCESS, @@ -2468,10 +2451,6 @@ int msm_vidc_adjust_preprocess(void *instance, struct v4l2_ctrl *ctrl) goto update_preprocess; } - /* - * eva statistics not available and BRS enabled, so - * preprocess can be enabled upto 4k @ 60 fps - */ if (res_is_less_than_or_equal_to(width, height, 3840, 2160) && max_fps <= 60) adjusted_value = 1; @@ -2688,6 +2667,209 @@ int msm_vidc_adjust_dec_slice_mode(void *instance, struct v4l2_ctrl *ctrl) return 0; } +int msm_vidc_adjust_eva_stats(void *instance, struct v4l2_ctrl *ctrl) +{ + struct msm_vidc_inst_capability *capability; + s32 adjusted_value; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + s32 rc_type = -1; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + adjusted_value = ctrl ? ctrl->val : capability->cap[META_EVA_STATS].value; + + if (msm_vidc_get_parent_value(inst, META_EVA_STATS, BITRATE_MODE, + &rc_type, __func__)) + return -EINVAL; + + /* disable Eva stats metadata for CQ rate control */ + if (rc_type == HFI_RC_CQ) { + i_vpr_h(inst, "%s: unsupported for CQ rate control\n", __func__); + adjusted_value = 0; + } + + msm_vidc_update_cap_value(inst, META_EVA_STATS, + adjusted_value, __func__); + + return 0; +} + +int msm_vidc_adjust_sei_mastering_disp(void *instance, struct v4l2_ctrl *ctrl) +{ + struct msm_vidc_inst_capability *capability; + s32 adjusted_value; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + s32 profile = -1; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + adjusted_value = ctrl ? ctrl->val : capability->cap[META_SEI_MASTERING_DISP].value; + + if (msm_vidc_get_parent_value(inst, META_SEI_MASTERING_DISP, PROFILE, + &profile, __func__)) + return -EINVAL; + + if (inst->codec != MSM_VIDC_HEVC && inst->codec != MSM_VIDC_HEIC) { + adjusted_value = 0; + goto adjust; + } + + if ((inst->codec == MSM_VIDC_HEVC && + profile != V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10) || + (inst->codec == MSM_VIDC_HEIC && + profile != V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE)) { + adjusted_value = 0; + goto adjust; + } + +adjust: + msm_vidc_update_cap_value(inst, META_SEI_MASTERING_DISP, + adjusted_value, __func__); + return 0; +} + +int msm_vidc_adjust_sei_cll(void *instance, struct v4l2_ctrl *ctrl) +{ + struct msm_vidc_inst_capability *capability; + s32 adjusted_value; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + s32 profile = -1; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + adjusted_value = ctrl ? ctrl->val : capability->cap[META_SEI_CLL].value; + + if (msm_vidc_get_parent_value(inst, META_SEI_CLL, PROFILE, + &profile, __func__)) + return -EINVAL; + + if (inst->codec != MSM_VIDC_HEVC && inst->codec != MSM_VIDC_HEIC) { + adjusted_value = 0; + goto adjust; + } + + if ((inst->codec == MSM_VIDC_HEVC && + profile != V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10) || + (inst->codec == MSM_VIDC_HEIC && + profile != V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE)) { + adjusted_value = 0; + goto adjust; + } + +adjust: + msm_vidc_update_cap_value(inst, META_SEI_CLL, adjusted_value, __func__); + return 0; +} + +int msm_vidc_adjust_hdr10plus(void *instance, struct v4l2_ctrl *ctrl) +{ + struct msm_vidc_inst_capability *capability; + s32 adjusted_value; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + s32 profile = -1; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + adjusted_value = ctrl ? ctrl->val : capability->cap[META_HDR10PLUS].value; + + if (msm_vidc_get_parent_value(inst, META_HDR10PLUS, PROFILE, + &profile, __func__)) + return -EINVAL; + + if (inst->codec != MSM_VIDC_HEVC && inst->codec != MSM_VIDC_HEIC) { + adjusted_value = 0; + goto adjust; + } + + if ((inst->codec == MSM_VIDC_HEVC && + profile != V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10) || + (inst->codec == MSM_VIDC_HEIC && + profile != V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE)) { + adjusted_value = 0; + goto adjust; + } + +adjust: + msm_vidc_update_cap_value(inst, META_HDR10PLUS, adjusted_value, __func__); + return 0; +} + +int msm_vidc_adjust_transcoding_stats(void *instance, struct v4l2_ctrl *ctrl) +{ + struct msm_vidc_inst_capability *capability; + s32 adjusted_value; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + s32 rc_type = -1; + u32 width, height, fps; + struct v4l2_format *f; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + + adjusted_value = ctrl ? ctrl->val : + capability->cap[META_TRANSCODING_STAT_INFO].value; + + if (msm_vidc_get_parent_value(inst, META_TRANSCODING_STAT_INFO, + BITRATE_MODE, &rc_type, __func__)) + return -EINVAL; + + /* + * transcoding stats metadata is supported for: + * - VBR bitrate mode + * - fps <= 60 + * - Resolution <= 4K + */ + if (rc_type != HFI_RC_VBR_CFR) { + i_vpr_h(inst, "%s: unsupported rc_type: %#x\n", + __func__, rc_type); + adjusted_value = 0; + goto exit; + } + + fps = capability->cap[FRAME_RATE].value >> 16; + if (fps > MAX_TRANSCODING_STATS_FRAME_RATE) { + i_vpr_h(inst, "%s: unsupported fps %u\n", __func__, fps); + adjusted_value = 0; + goto exit; + } + + f = &inst->fmts[OUTPUT_PORT]; + width = f->fmt.pix_mp.width; + height = f->fmt.pix_mp.height; + if (res_is_greater_than(width, height, + MAX_TRANSCODING_STATS_WIDTH, MAX_TRANSCODING_STATS_HEIGHT)) { + i_vpr_h(inst, "%s: unsupported res, wxh %ux%u\n", + __func__, width, height); + adjusted_value = 0; + goto exit; + } + +exit: + msm_vidc_update_cap_value(inst, META_TRANSCODING_STAT_INFO, + adjusted_value, __func__); + + return 0; +} + /******************* End of Control Adjust functions *************************/ /************************* Control Set functions *****************************/ diff --git a/driver/platform/pineapple/src/msm_vidc_pineapple.c b/driver/platform/pineapple/src/msm_vidc_pineapple.c index 39c60ed46d..bf83d8a693 100644 --- a/driver/platform/pineapple/src/msm_vidc_pineapple.c +++ b/driver/platform/pineapple/src/msm_vidc_pineapple.c @@ -1824,7 +1824,8 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { {META_SEI_MASTERING_DISP, ENC, HEVC|HEIC, MSM_VIDC_META_DISABLE, - MSM_VIDC_META_ENABLE | MSM_VIDC_META_TX_INPUT, + MSM_VIDC_META_ENABLE | + MSM_VIDC_META_DYN_ENABLE | MSM_VIDC_META_TX_INPUT, 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_SEI_MASTERING_DISPLAY_COLOUR, HFI_PROP_SEI_MASTERING_DISPLAY_COLOUR, @@ -1841,7 +1842,8 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { {META_SEI_CLL, ENC, HEVC|HEIC, MSM_VIDC_META_DISABLE, - MSM_VIDC_META_ENABLE | MSM_VIDC_META_TX_INPUT, + MSM_VIDC_META_ENABLE | + MSM_VIDC_META_DYN_ENABLE | MSM_VIDC_META_TX_INPUT, 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_SEI_CONTENT_LIGHT_LEVEL, HFI_PROP_SEI_CONTENT_LIGHT_LEVEL, @@ -1858,7 +1860,8 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { {META_HDR10PLUS, ENC, HEVC|HEIC, MSM_VIDC_META_DISABLE, - MSM_VIDC_META_ENABLE | MSM_VIDC_META_TX_INPUT, + MSM_VIDC_META_ENABLE | + MSM_VIDC_META_DYN_ENABLE | MSM_VIDC_META_TX_INPUT, 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_HDR10PLUS, HFI_PROP_SEI_HDR10PLUS_USERDATA, @@ -1889,9 +1892,10 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { HFI_PROP_DOLBY_RPU_METADATA, CAP_FLAG_BITMASK | CAP_FLAG_META}, - {META_EVA_STATS, ENC, CODECS_ALL, + {META_EVA_STATS, ENC, H264|HEVC, MSM_VIDC_META_DISABLE, - MSM_VIDC_META_ENABLE | MSM_VIDC_META_TX_INPUT, + MSM_VIDC_META_ENABLE | + MSM_VIDC_META_DYN_ENABLE | MSM_VIDC_META_TX_INPUT, 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_EVA_STATS, HFI_PROP_EVA_STAT_INFO, @@ -2120,7 +2124,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine P_FRAME_QP, B_FRAME_QP, ENH_LAYER_COUNT, BIT_RATE, META_ROI_INFO, MIN_QUALITY, BITRATE_BOOST, VBV_DELAY, PEAK_BITRATE, SLICE_MODE, CONTENT_ADAPTIVE_CODING, - BLUR_TYPES, LOWLATENCY_MODE}, + BLUR_TYPES, LOWLATENCY_MODE, META_TRANSCODING_STAT_INFO}, msm_vidc_adjust_bitrate_mode, msm_vidc_set_u32_enum}, @@ -2129,7 +2133,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine P_FRAME_QP, B_FRAME_QP, CONSTANT_QUALITY, ENH_LAYER_COUNT, BIT_RATE, META_ROI_INFO, MIN_QUALITY, BITRATE_BOOST, VBV_DELAY, PEAK_BITRATE, SLICE_MODE, CONTENT_ADAPTIVE_CODING, - BLUR_TYPES, LOWLATENCY_MODE}, + BLUR_TYPES, LOWLATENCY_MODE, META_EVA_STATS, META_TRANSCODING_STAT_INFO}, msm_vidc_adjust_bitrate_mode, msm_vidc_set_u32_enum}, @@ -2374,7 +2378,12 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine NULL, msm_vidc_set_u32_enum}, - {PROFILE, ENC|DEC, HEVC|HEIC, + {PROFILE, ENC, HEVC|HEIC, + {META_SEI_MASTERING_DISP, META_SEI_CLL, META_HDR10PLUS}, + msm_vidc_adjust_profile, + msm_vidc_set_u32_enum}, + + {PROFILE, DEC, HEVC|HEIC, {0}, msm_vidc_adjust_profile, msm_vidc_set_u32_enum}, @@ -2549,11 +2558,10 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine msm_vidc_adjust_all_intra, NULL}, - {META_EVA_STATS, ENC, H264|HEVC, - {ENH_LAYER_COUNT, REQUEST_PREPROCESS}}, - - {META_EVA_STATS, ENC, HEIC, - {0}}, + {META_EVA_STATS, ENC, HEVC, + {0}, + msm_vidc_adjust_eva_stats, + NULL}, {META_ROI_INFO, ENC, H264|HEVC, {MIN_QUALITY, IR_PERIOD, BLUR_TYPES}, @@ -2579,6 +2587,26 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine {0}, NULL, msm_vidc_set_signal_color_info}, + + {META_SEI_MASTERING_DISP, ENC, HEVC|HEIC, + {0}, + msm_vidc_adjust_sei_mastering_disp, + NULL}, + + {META_SEI_CLL, ENC, HEVC|HEIC, + {0}, + msm_vidc_adjust_sei_cll, + NULL}, + + {META_HDR10PLUS, ENC, HEVC|HEIC, + {0}, + msm_vidc_adjust_hdr10plus, + NULL}, + + {META_TRANSCODING_STAT_INFO, ENC, HEVC|H264, + {0}, + msm_vidc_adjust_transcoding_stats, + NULL}, }; /* Default UBWC config for LPDDR5 */ diff --git a/driver/vidc/inc/hfi_command.h b/driver/vidc/inc/hfi_command.h index 7b98f06382..b58dae5e3a 100644 --- a/driver/vidc/inc/hfi_command.h +++ b/driver/vidc/inc/hfi_command.h @@ -148,6 +148,7 @@ enum hfi_property_mode_type { HFI_MODE_PORT_SETTINGS_CHANGE = 0x00000001, HFI_MODE_PROPERTY = 0x00000002, HFI_MODE_METADATA = 0x00000004, + HFI_MODE_DYNAMIC_METADATA = 0x00000005, }; enum hfi_reserve_type { diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 3991761329..b8ffe63e56 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -151,6 +151,20 @@ static inline bool is_meta_tx_inp_enabled(struct msm_vidc_inst *inst, u32 cap) return enabled; } +static inline bool is_dyn_meta_tx_inp_enabled(struct msm_vidc_inst *inst, u32 cap) +{ + bool enabled = false; + + if (!is_meta_cap(inst, cap)) + return false; + + if (inst->capabilities->cap[cap].value & MSM_VIDC_META_DYN_ENABLE && + inst->capabilities->cap[cap].value & MSM_VIDC_META_TX_INPUT) + enabled = true; + + return enabled; +} + static inline bool is_meta_tx_out_enabled(struct msm_vidc_inst *inst, u32 cap) { bool enabled = false; @@ -165,13 +179,28 @@ static inline bool is_meta_tx_out_enabled(struct msm_vidc_inst *inst, u32 cap) return enabled; } +static inline bool is_dyn_meta_tx_out_enabled(struct msm_vidc_inst *inst, u32 cap) +{ + bool enabled = false; + + if (!is_meta_cap(inst, cap)) + return false; + + if (inst->capabilities->cap[cap].value & MSM_VIDC_META_DYN_ENABLE && + inst->capabilities->cap[cap].value & MSM_VIDC_META_TX_OUTPUT) + enabled = true; + + return enabled; +} + static inline bool is_any_meta_tx_out_enabled(struct msm_vidc_inst *inst) { bool enabled = false; u32 i; for (i = INST_CAP_NONE + 1; i < INST_CAP_MAX; i++) { - if (is_meta_tx_out_enabled(inst, i)) { + if (is_meta_tx_out_enabled(inst, i) || + is_dyn_meta_tx_out_enabled(inst, i)) { enabled = true; break; } @@ -186,7 +215,8 @@ static inline bool is_any_meta_tx_inp_enabled(struct msm_vidc_inst *inst) u32 i; for (i = INST_CAP_NONE + 1; i < INST_CAP_MAX; i++) { - if (is_meta_tx_inp_enabled(inst, i)) { + if (is_meta_tx_inp_enabled(inst, i) || + is_dyn_meta_tx_inp_enabled(inst, i)) { enabled = true; break; } @@ -202,6 +232,7 @@ static inline bool is_input_meta_enabled(struct msm_vidc_inst *inst) for (i = INST_CAP_NONE + 1; i < INST_CAP_MAX; i++) { if (is_meta_tx_inp_enabled(inst, i) || + is_dyn_meta_tx_inp_enabled(inst, i) || is_meta_rx_inp_enabled(inst, i)) { enabled = true; break; @@ -218,6 +249,7 @@ static inline bool is_output_meta_enabled(struct msm_vidc_inst *inst) for (i = INST_CAP_NONE + 1; i < INST_CAP_MAX; i++) { if (is_meta_tx_out_enabled(inst, i) || + is_dyn_meta_tx_out_enabled(inst, i) || is_meta_rx_out_enabled(inst, i)) { enabled = true; break; diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index be4383f4f0..b7dc7aff98 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -43,7 +43,8 @@ enum msm_vidc_metadata_bits { MSM_VIDC_META_TX_OUTPUT = 0x4, MSM_VIDC_META_RX_INPUT = 0x8, MSM_VIDC_META_RX_OUTPUT = 0x10, - MSM_VIDC_META_MAX = 0x20, + MSM_VIDC_META_DYN_ENABLE = 0x20, + MSM_VIDC_META_MAX = 0x40, }; #define MSM_VIDC_METADATA_SIZE (4 * 4096) /* 16 KB */ @@ -102,6 +103,9 @@ enum msm_vidc_metadata_bits { #define MAX_LTR_FRAME_COUNT_5 5 #define MAX_LTR_FRAME_COUNT_2 2 #define MAX_ENC_RING_BUF_COUNT 5 /* to be tuned */ +#define MAX_TRANSCODING_STATS_FRAME_RATE 60 +#define MAX_TRANSCODING_STATS_WIDTH 4096 +#define MAX_TRANSCODING_STATS_HEIGHT 2304 #define DCVS_WINDOW 16 #define ENC_FPS_WINDOW 3 diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index 70acf0d4e8..c603e65b6e 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -774,6 +774,53 @@ static int msm_venc_metadata_delivery(struct msm_vidc_inst *inst, return rc; } +static int msm_venc_dynamic_metadata_delivery(struct msm_vidc_inst *inst, + enum msm_vidc_port_type port) +{ + int rc = 0; + u32 payload[32] = {0}; + u32 i, count = 0; + struct msm_vidc_inst_capability *capability; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + i_vpr_h(inst, "%s()\n", __func__); + + capability = inst->capabilities; + payload[0] = HFI_MODE_DYNAMIC_METADATA; + + if (port != INPUT_PORT) { + i_vpr_e(inst, "%s: invalid port: %d\n", __func__, port); + return -EINVAL; + } + + for (i = INST_CAP_NONE + 1; i < INST_CAP_MAX; i++) { + if (is_dyn_meta_tx_inp_enabled(inst, i)) { + if (count + 1 >= sizeof(payload) / sizeof(u32)) { + i_vpr_e(inst, + "%s: dynamic input metadatas (%d) exceeded limit (%d)\n", + __func__, count, sizeof(payload) / sizeof(u32)); + return -EINVAL; + } + payload[count + 1] = capability->cap[i].hfi_id; + count++; + } + } + + rc = venus_hfi_session_command(inst, + HFI_CMD_DELIVERY_MODE, + port, + HFI_PAYLOAD_U32_ARRAY, + &payload[0], + (count + 1) * sizeof(u32)); + if (rc) + return rc; + + return rc; +} + static int msm_venc_metadata_subscription(struct msm_vidc_inst *inst, enum msm_vidc_port_type port) { @@ -902,6 +949,10 @@ int msm_venc_streamon_input(struct msm_vidc_inst *inst) if (rc) goto error; + rc = msm_venc_dynamic_metadata_delivery(inst, INPUT_PORT); + if (rc) + goto error; + rc = msm_vidc_process_streamon_input(inst); if (rc) goto error; diff --git a/include/uapi/vidc/media/v4l2_vidc_extensions.h b/include/uapi/vidc/media/v4l2_vidc_extensions.h index bb6157f801..7362fa543e 100644 --- a/include/uapi/vidc/media/v4l2_vidc_extensions.h +++ b/include/uapi/vidc/media/v4l2_vidc_extensions.h @@ -97,7 +97,8 @@ enum v4l2_mpeg_vidc_metadata_bits { V4L2_MPEG_VIDC_META_TX_OUTPUT = 0x4, V4L2_MPEG_VIDC_META_RX_INPUT = 0x8, V4L2_MPEG_VIDC_META_RX_OUTPUT = 0x10, - V4L2_MPEG_VIDC_META_MAX = 0x20, + V4L2_MPEG_VIDC_META_DYN_ENABLE = 0x20, + V4L2_MPEG_VIDC_META_MAX = 0x40, }; #define V4L2_CID_MPEG_VIDC_METADATA_LTR_MARK_USE_DETAILS \ From 6712a694be31fe35ed77d6182543419e6f4ad435 Mon Sep 17 00:00:00 2001 From: Vedang Nagar Date: Tue, 7 Mar 2023 14:22:28 +0530 Subject: [PATCH 0864/1061] video: driver: Move all strict check into msm_vidc_driver Move all __strict_check functions to msm_vidc_driver. Change-Id: I74f3017f96f1426773698c1b44bca7b6d30df216 Signed-off-by: Vedang Nagar --- driver/variant/common/src/msm_vidc_variant.c | 18 +----------------- driver/vidc/inc/venus_hfi.h | 2 ++ driver/vidc/src/msm_vidc_driver.c | 17 ----------------- driver/vidc/src/msm_vidc_state.c | 13 +------------ driver/vidc/src/venus_hfi.c | 2 +- driver/vidc/src/venus_hfi_queue.c | 12 ------------ 6 files changed, 5 insertions(+), 59 deletions(-) diff --git a/driver/variant/common/src/msm_vidc_variant.c b/driver/variant/common/src/msm_vidc_variant.c index 356baea21d..cc1d410719 100644 --- a/driver/variant/common/src/msm_vidc_variant.c +++ b/driver/variant/common/src/msm_vidc_variant.c @@ -13,23 +13,7 @@ #include "msm_vidc_debug.h" #include "msm_vidc_variant.h" #include "msm_vidc_platform.h" - -static void __fatal_error(bool fatal) -{ - WARN_ON(fatal); -} - -static int __strict_check(struct msm_vidc_core *core, const char *function) -{ - bool fatal = !mutex_is_locked(&core->lock); - - __fatal_error(fatal); - - if (fatal) - d_vpr_e("%s: strict check failed\n", function); - - return fatal ? -EINVAL : 0; -} +#include "venus_hfi.h" int __write_register(struct msm_vidc_core *core, u32 reg, u32 value) { diff --git a/driver/vidc/inc/venus_hfi.h b/driver/vidc/inc/venus_hfi.h index 652eb12bfa..c0107891a2 100644 --- a/driver/vidc/inc/venus_hfi.h +++ b/driver/vidc/inc/venus_hfi.h @@ -33,6 +33,8 @@ struct hfi_pending_packet { void *data; }; +int __strict_check(struct msm_vidc_core *core, + const char *function); int venus_hfi_session_property(struct msm_vidc_inst *inst, u32 pkt_type, u32 flags, u32 port, u32 payload_type, void *payload, u32 payload_size); diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 9437f8e145..b9c5ddd57c 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -224,23 +224,6 @@ static void print_buffer_stats(u32 tag, const char *tag_str, struct msm_vidc_ins stats->data_size, stats->flags); } -static void __fatal_error(bool fatal) -{ - WARN_ON(fatal); -} - -static int __strict_check(struct msm_vidc_core *core, const char *function) -{ - bool fatal = !mutex_is_locked(&core->lock); - - __fatal_error(fatal); - - if (fatal) - d_vpr_e("%s: strict check failed\n", function); - - return fatal ? -EINVAL : 0; -} - static u32 msm_vidc_get_buffer_stats_flag(struct msm_vidc_inst *inst) { u32 flags = 0; diff --git a/driver/vidc/src/msm_vidc_state.c b/driver/vidc/src/msm_vidc_state.c index ec9d30bcd2..e87e51055c 100644 --- a/driver/vidc/src/msm_vidc_state.c +++ b/driver/vidc/src/msm_vidc_state.c @@ -12,6 +12,7 @@ #include "msm_vidc_vb2.h" #include "msm_vidc.h" #include "msm_vidc_events.h" +#include "venus_hfi.h" bool core_in_valid_state(struct msm_vidc_core *core) { @@ -68,18 +69,6 @@ exit: return name; } -static int __strict_check(struct msm_vidc_core *core, const char *function) -{ - bool fatal = !mutex_is_locked(&core->lock); - - WARN_ON(fatal); - - if (fatal) - d_vpr_e("%s: strict check failed\n", function); - - return fatal ? -EINVAL : 0; -} - static int __strict_inst_check(struct msm_vidc_inst *inst, const char *function) { bool fatal = !mutex_is_locked(&inst->lock); diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index d866ba40dc..169eec04c0 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -48,7 +48,7 @@ static void __fatal_error(bool fatal) WARN_ON(fatal); } -static int __strict_check(struct msm_vidc_core *core, const char *function) +int __strict_check(struct msm_vidc_core *core, const char *function) { bool fatal = !mutex_is_locked(&core->lock); diff --git a/driver/vidc/src/venus_hfi_queue.c b/driver/vidc/src/venus_hfi_queue.c index 4322b148cd..849f8153d6 100644 --- a/driver/vidc/src/venus_hfi_queue.c +++ b/driver/vidc/src/venus_hfi_queue.c @@ -11,18 +11,6 @@ #include "msm_vidc_platform.h" #include "venus_hfi.h" -static int __strict_check(struct msm_vidc_core *core, const char *function) -{ - bool fatal = !mutex_is_locked(&core->lock); - - WARN_ON(fatal); - - if (fatal) - d_vpr_e("%s: strict check failed\n", function); - - return fatal ? -EINVAL : 0; -} - static void __set_queue_hdr_defaults(struct hfi_queue_header *q_hdr) { q_hdr->qhdr_status = 0x1; From c6535adfacda6357127c3626ec4c4f4233cb53bf Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Thu, 23 Mar 2023 12:54:19 +0530 Subject: [PATCH 0865/1061] video: driver: add streamoff handling in close state Allow msm_vidc_stop_streaming() in msm_vidc_close_state() state handler. Change-Id: Id1c78991a8b3398e7f696500adb4a33be239ca9f Signed-off-by: Govindaraj Rajagopal --- driver/vidc/src/msm_vidc_state.c | 18 ++++++++++++++++-- 1 file changed, 16 insertions(+), 2 deletions(-) diff --git a/driver/vidc/src/msm_vidc_state.c b/driver/vidc/src/msm_vidc_state.c index e87e51055c..3e3a95590a 100644 --- a/driver/vidc/src/msm_vidc_state.c +++ b/driver/vidc/src/msm_vidc_state.c @@ -1229,9 +1229,23 @@ static int msm_vidc_close_state(struct msm_vidc_inst *inst, return -EINVAL; } - i_vpr_e(inst, "%s: unexpected event %s\n", __func__, event_name(event)); + switch (event) { + case MSM_VIDC_STREAMOFF: + { + struct vb2_queue *q = (struct vb2_queue *)data; - return -EINVAL; + rc = msm_vidc_stop_streaming(inst, q); + if (rc) + return rc; + break; + } + default: { + i_vpr_e(inst, "%s: unexpected event %s\n", __func__, event_name(event)); + return -EINVAL; + } + } + + return rc; } static int msm_vidc_error_state(struct msm_vidc_inst *inst, From a5b376a5dab4c23ee446f0295a4d3fe10da7e9b8 Mon Sep 17 00:00:00 2001 From: Rakshitha Shakamuri Date: Mon, 20 Mar 2023 20:34:05 -0700 Subject: [PATCH 0866/1061] video-driver: enable ddk compilation and additional changes on Bazel. msm_video and video modules compile using ddk. Change-Id: I5ddba19f973a13807a80c8d619bcc83b09307787 --- Android.mk | 1 + BUILD.bazel | 2 +- driver/vidc/src/msm_vidc_probe.c | 6 +++--- target.bzl | 5 ++--- video_driver_build.bzl | 1 - video_modules.bzl | 32 ++++++++++++++++++-------------- 6 files changed, 25 insertions(+), 22 deletions(-) diff --git a/Android.mk b/Android.mk index 7cf534b7a8..02288d48f5 100644 --- a/Android.mk +++ b/Android.mk @@ -35,6 +35,7 @@ LOCAL_MODULE_KBUILD_NAME := msm_video/msm_video.ko LOCAL_MODULE_TAGS := optional LOCAL_MODULE_DEBUG_ENABLE := true LOCAL_MODULE_PATH := $(KERNEL_MODULES_OUT) +ENABLE_DDK_BUILD := false LOCAL_REQUIRED_MODULES := mmrm-module-symvers LOCAL_REQUIRED_MODULES += hw-fence-module-symvers diff --git a/BUILD.bazel b/BUILD.bazel index f50948f169..36d6bc88d4 100644 --- a/BUILD.bazel +++ b/BUILD.bazel @@ -10,7 +10,7 @@ ddk_headers( hdrs = glob([ "include/uapi/vidc/media/*.h", ]), - includes = ["include/uapi/vidc/media"] + includes = ["include/uapi/vidc"] ) ddk_headers( diff --git a/driver/vidc/src/msm_vidc_probe.c b/driver/vidc/src/msm_vidc_probe.c index e00fcf3ddf..dbd8f14569 100644 --- a/driver/vidc/src/msm_vidc_probe.c +++ b/driver/vidc/src/msm_vidc_probe.c @@ -13,6 +13,7 @@ #include #include #include +#include #if (LINUX_VERSION_CODE < KERNEL_VERSION(5, 16, 0)) #include #endif @@ -29,14 +30,13 @@ #include "msm_vidc_core.h" #include "msm_vidc_memory.h" #include "venus_hfi.h" -#include "video_generated_h" #define BASE_DEVICE_NUMBER 32 struct msm_vidc_core *g_core; -const char video_banner[] = "Video-Banner: (" VIDEO_COMPILE_BY "@" - VIDEO_COMPILE_HOST ") (" VIDEO_COMPILE_TIME ")"; +const char video_banner[] = "Video-Banner: (" __stringify(VIDEO_COMPILE_BY) "@" + __stringify(VIDEO_COMPILE_HOST) ") (" __stringify(VIDEO_COMPILE_TIME) ")"; static inline bool is_video_device(struct device *dev) { diff --git a/target.bzl b/target.bzl index a3a43f228c..5e76380980 100644 --- a/target.bzl +++ b/target.bzl @@ -6,11 +6,10 @@ def define_pineapple(): target = "pineapple", registry = video_driver_modules, modules = [ - "msm_video" - # "video" + "msm_video", + "video", ], config_options = [ - "CONFIG_MSM_VIDC_IRIS33", "CONFIG_MSM_VIDC_PINEAPPLE", ], ) \ No newline at end of file diff --git a/video_driver_build.bzl b/video_driver_build.bzl index 3c6ced493c..7ad7dcd7b8 100644 --- a/video_driver_build.bzl +++ b/video_driver_build.bzl @@ -98,6 +98,5 @@ def define_target_variant_modules(target, variant, registry, modules, config_opt ) def define_consolidate_gki_modules(target, registry, modules, config_options = []): - # print(modules) define_target_variant_modules(target, "consolidate", registry, modules, config_options) define_target_variant_modules(target, "gki", registry, modules, config_options) \ No newline at end of file diff --git a/video_modules.bzl b/video_modules.bzl index 0a8a2c19c7..e6b3f4db3c 100644 --- a/video_modules.bzl +++ b/video_modules.bzl @@ -5,7 +5,7 @@ module_entry = video_driver_modules.register module_entry( name = "msm_video", - srcs = [ # vidc common files + srcs = [ "driver/vidc/src/msm_vidc_v4l2.c", "driver/vidc/src/msm_vidc_vb2.c", "driver/vidc/src/msm_vidc.c", @@ -30,23 +30,29 @@ module_entry( "driver/vidc/src/hfi_packet.c", "driver/vidc/src/venus_hfi_response.c", "driver/platform/common/src/msm_vidc_platform.c", + "driver/platform/common/src/msm_vidc_platform_ext.c", "driver/variant/common/src/msm_vidc_variant.c", + "driver/vidc/src/msm_vidc_synx.c", ], config_srcs = { - "CONFIG_MSM_VIDC_IRIS33" : [ + "CONFIG_MSM_VIDC_PINEAPPLE" : [ "driver/variant/iris33/src/msm_vidc_buffer_iris33.c", + "driver/variant/iris33/src/msm_vidc_bus_iris33.c", + "driver/variant/iris33/src/msm_vidc_clock_iris33.c", "driver/variant/iris33/src/msm_vidc_power_iris33.c", "driver/variant/iris33/src/msm_vidc_iris33.c", - ], - "CONFIG_MSM_VIDC_PINEAPPLE" : [ "driver/platform/pineapple/src/msm_vidc_pineapple.c", ], - } + }, + deps = [ + "//techpack/mm-drivers:hw_fence_headers", + "//techpack/synx-kernel:synx_headers", + ], ) module_entry( name = "video", - srcs = [ # vidc common files + srcs = [ "driver/vidc/src/msm_vidc_v4l2.c", "driver/vidc/src/msm_vidc_vb2.c", "driver/vidc/src/msm_vidc.c", @@ -71,15 +77,13 @@ module_entry( "driver/variant/common/src/msm_vidc_variant.c", ], config_srcs = { - "CONFIG_MSM_VIDC_IRIS33" : [ - "driver/variant/iris33/src/msm_vidc_buffer_iris33.c", - "driver/variant/iris3/src/msm_vidc_power_iris3.o", - "driver/variant/iris3/src/msm_vidc_bus_iris3.o", - "driver/variant/iris3/src/msm_vidc_clock_iris3.o", - "driver/variant/iris3/src/msm_vidc_iris3.o" - ], "CONFIG_MSM_VIDC_PINEAPPLE" : [ - "driver/platform/pineapple/src/msm_vidc_pineapple.c", + "driver/platform/pineapple/src/pineapple.c", + "driver/variant/iris33/src/msm_vidc_buffer_iris33.c", + "driver/variant/iris33/src/msm_vidc_power_iris33.c", + "driver/variant/iris33/src/msm_vidc_bus_iris33.c", + "driver/variant/iris33/src/msm_vidc_clock_iris33.c", + "driver/variant/iris33/src/msm_vidc_iris33.c", ], } ) \ No newline at end of file From c750ba048bc922d05afeedc9a87adfaf20756b51 Mon Sep 17 00:00:00 2001 From: Megha Byahatti Date: Mon, 20 Mar 2023 11:16:11 +0530 Subject: [PATCH 0867/1061] video: driver: add try_fmt allow checks inside state handler Remove msm_vidc_allow_s_fmt function and use state specific MSM_VIDC_TRY_FMT checks inside state_handler Change-Id: I405b9cfb89e4daadafcc05eb99e66e2b0aad328e Signed-off-by: Megha Byahatti --- driver/vidc/inc/msm_vidc_driver.h | 1 - driver/vidc/inc/msm_vidc_state.h | 1 + driver/vidc/src/msm_vidc.c | 3 --- driver/vidc/src/msm_vidc_driver.c | 32 ----------------------- driver/vidc/src/msm_vidc_state.c | 42 +++++++++++++++++++++++++++++++ driver/vidc/src/msm_vidc_v4l2.c | 2 +- 6 files changed, 44 insertions(+), 37 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 3991761329..8d3e3dffbf 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -485,7 +485,6 @@ struct msm_vidc_inst *get_inst_ref(struct msm_vidc_core *core, struct msm_vidc_inst *get_inst(struct msm_vidc_core *core, u32 session_id); void put_inst(struct msm_vidc_inst *inst); -bool msm_vidc_allow_s_fmt(struct msm_vidc_inst *inst, u32 type); bool msm_vidc_allow_metadata_delivery(struct msm_vidc_inst *inst, u32 cap_id, u32 port); bool msm_vidc_allow_metadata_subscription(struct msm_vidc_inst *inst, diff --git a/driver/vidc/inc/msm_vidc_state.h b/driver/vidc/inc/msm_vidc_state.h index 6dec161d3a..4b60e8a2d9 100644 --- a/driver/vidc/inc/msm_vidc_state.h +++ b/driver/vidc/inc/msm_vidc_state.h @@ -19,6 +19,7 @@ struct msm_vidc_core; } #define FOREACH_EVENT(EVENT) { \ + EVENT(TRY_FMT) \ EVENT(S_FMT) \ EVENT(REQBUFS) \ EVENT(S_CTRL) \ diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index 0422842e96..80f710e846 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -228,9 +228,6 @@ int msm_vidc_try_fmt(void *instance, struct v4l2_format *f) return -EINVAL; } - if (!msm_vidc_allow_s_fmt(inst, f->type)) - return -EBUSY; - if (inst->domain == MSM_VIDC_DECODER) rc = msm_vdec_try_fmt(inst, f); if (inst->domain == MSM_VIDC_ENCODER) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 7f594be6da..ec1bfe7aad 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -958,38 +958,6 @@ int signal_session_msg_receipt(struct msm_vidc_inst *inst, return 0; } -bool msm_vidc_allow_s_fmt(struct msm_vidc_inst *inst, u32 type) -{ - bool allow = false; - - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return false; - } - if (is_state(inst, MSM_VIDC_OPEN)) { - allow = true; - goto exit; - } - if (type == OUTPUT_MPLANE || type == OUTPUT_META_PLANE) { - if (is_state(inst, MSM_VIDC_INPUT_STREAMING)) { - allow = true; - goto exit; - } - } - if (type == INPUT_MPLANE || type == INPUT_META_PLANE) { - if (is_state(inst, MSM_VIDC_OUTPUT_STREAMING)) { - allow = true; - goto exit; - } - } - -exit: - if (!allow) - i_vpr_e(inst, "%s: type %d not allowed in state %s\n", - __func__, type, state_name(inst->state)); - return allow; -} - bool msm_vidc_allow_metadata_delivery(struct msm_vidc_inst *inst, u32 cap_id, u32 port) { diff --git a/driver/vidc/src/msm_vidc_state.c b/driver/vidc/src/msm_vidc_state.c index ec9d30bcd2..bddff5f5f2 100644 --- a/driver/vidc/src/msm_vidc_state.c +++ b/driver/vidc/src/msm_vidc_state.c @@ -656,6 +656,16 @@ static int msm_vidc_open_state(struct msm_vidc_inst *inst, } switch (event) { + case MSM_VIDC_TRY_FMT: + { + struct v4l2_format *f = (struct v4l2_format *)data; + + /* allow try_fmt request in open state */ + rc = msm_vidc_try_fmt(inst, f); + if (rc) + return rc; + break; + } case MSM_VIDC_S_FMT: { struct v4l2_format *f = (struct v4l2_format *)data; @@ -783,6 +793,22 @@ static int msm_vidc_input_streaming_state(struct msm_vidc_inst *inst, return rc; break; } + case MSM_VIDC_TRY_FMT: + { + struct v4l2_format *f = (struct v4l2_format *)data; + + /* disallow */ + if (f->type == INPUT_MPLANE || f->type == INPUT_META_PLANE) { + i_vpr_e(inst, "%s: (%s) not allowed for (%s) port\n", + __func__, event_name(event), v4l2_type_name(f->type)); + return -EBUSY; + } + + rc = msm_vidc_try_fmt(inst, f); + if (rc) + return rc; + break; + } case MSM_VIDC_S_FMT: { struct v4l2_format *f = (struct v4l2_format *)data; @@ -969,6 +995,22 @@ static int msm_vidc_output_streaming_state(struct msm_vidc_inst *inst, return rc; break; } + case MSM_VIDC_TRY_FMT: + { + struct v4l2_format *f = (struct v4l2_format *)data; + + /* disallow */ + if (f->type == OUTPUT_MPLANE || f->type == OUTPUT_META_PLANE) { + i_vpr_e(inst, "%s: (%s) not allowed for (%s) port\n", + __func__, event_name(event), v4l2_type_name(f->type)); + return -EBUSY; + } + + rc = msm_vidc_try_fmt(inst, f); + if (rc) + return rc; + break; + } case MSM_VIDC_S_FMT: { struct v4l2_format *f = (struct v4l2_format *)data; diff --git a/driver/vidc/src/msm_vidc_v4l2.c b/driver/vidc/src/msm_vidc_v4l2.c index 8e797786f9..ab916c43d3 100644 --- a/driver/vidc/src/msm_vidc_v4l2.c +++ b/driver/vidc/src/msm_vidc_v4l2.c @@ -135,7 +135,7 @@ int msm_v4l2_try_fmt(struct file *filp, void *fh, struct v4l2_format *f) rc = -EBUSY; goto unlock; } - rc = msm_vidc_try_fmt((void *)inst, f); + rc = inst->event_handle(inst, MSM_VIDC_TRY_FMT, f); if (rc) goto unlock; From c3f3af1e0e3bfc4d4a57eca044225bd1ea8b8df9 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Thu, 23 Mar 2023 13:52:27 +0530 Subject: [PATCH 0868/1061] video: driver: enable memory tracking in stats handler track internal memory usage periodically and print memory usage stats using stats handler. Change-Id: Idd16647dbe4aab3fc617a8f7fc0d3c81f459bb5d Signed-off-by: Govindaraj Rajagopal --- driver/vidc/inc/msm_vidc_debug.h | 7 +++- driver/vidc/inc/msm_vidc_driver.h | 1 + driver/vidc/src/msm_vdec.c | 3 ++ driver/vidc/src/msm_venc.c | 3 ++ driver/vidc/src/msm_vidc.c | 2 + driver/vidc/src/msm_vidc_driver.c | 64 ++++++++++++++++++++++++++++++- driver/vidc/src/msm_vidc_vb2.c | 6 +++ 7 files changed, 84 insertions(+), 2 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_debug.h b/driver/vidc/inc/msm_vidc_debug.h index 3ac1444402..18ccbd538a 100644 --- a/driver/vidc/inc/msm_vidc_debug.h +++ b/driver/vidc/inc/msm_vidc_debug.h @@ -111,7 +111,7 @@ enum vidc_msg_prio { #define i_vpr_hp(inst, __fmt, ...) \ dprintk_inst(VIDC_HIGH | VIDC_PERF, "high", inst, __fmt, ##__VA_ARGS__) #define i_vpr_hs(inst, __fmt, ...) \ - dprintk_inst(VIDC_HIGH | VIDC_STAT, "high", inst, __fmt, ##__VA_ARGS__) + dprintk_inst(VIDC_HIGH | VIDC_STAT, "stat", inst, __fmt, ##__VA_ARGS__) #define dprintk_core(__level, __level_str, __fmt, ...) \ do { \ @@ -181,4 +181,9 @@ void msm_vidc_debugfs_update(void *inst, int msm_vidc_check_ratelimit(void); void msm_vidc_show_stats(void *inst); +static inline bool is_stats_enabled(void) +{ + return !!(msm_vidc_debug & VIDC_STAT); +} + #endif diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index b8ffe63e56..9f0676ef67 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -496,6 +496,7 @@ void msm_vidc_stats_handler(struct work_struct *work); int schedule_stats_work(struct msm_vidc_inst *inst); int cancel_stats_work_sync(struct msm_vidc_inst *inst); void msm_vidc_print_stats(struct msm_vidc_inst *inst); +void msm_vidc_print_memory_stats(struct msm_vidc_inst *inst); enum msm_vidc_buffer_type v4l2_type_to_driver(u32 type, const char *func); int msm_vidc_buf_queue(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buf); diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 7c187f7cda..6e79d40e82 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -2156,6 +2156,9 @@ int msm_vdec_start_cmd(struct msm_vidc_inst *inst) /* print final buffer counts & size details */ msm_vidc_print_buffer_info(inst); + /* print internal buffer memory usage stats */ + msm_vidc_print_memory_stats(inst); + rc = msm_vidc_process_resume(inst); if (rc) return rc; diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index c603e65b6e..2cbc85a365 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -1009,6 +1009,9 @@ int msm_venc_start_cmd(struct msm_vidc_inst *inst) /* print final buffer counts & size details */ msm_vidc_print_buffer_info(inst); + /* print internal buffer memory usage stats */ + msm_vidc_print_memory_stats(inst); + rc = msm_vidc_process_resume(inst); if (rc) return rc; diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index 0422842e96..0e9a41714c 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -1077,6 +1077,8 @@ int msm_vidc_close(void *instance) inst_lock(inst, __func__); /* print final stats */ msm_vidc_print_stats(inst); + /* print internal buffer memory usage stats */ + msm_vidc_print_memory_stats(inst); msm_vidc_print_residency_stats(core); msm_vidc_session_close(inst); msm_vidc_change_state(inst, MSM_VIDC_CLOSE, __func__); diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 7513d3b633..31b0beb40e 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -2760,7 +2760,7 @@ void msm_vidc_print_stats(struct msm_vidc_inst *inst) bitrate_kbps = (inst->stats.data_size * 8 * 1000) / (dt_ms * 1024); i_vpr_hs(inst, - "stats: counts (etb,ebd,ftb,fbd): %u %u %u %u (total %llu %llu %llu %llu), achieved bitrate %lldKbps fps %u/s, frame rate %u, operating rate %u, priority %u, dt %ums\n", + "counts (etb,ebd,ftb,fbd): %u %u %u %u (total %llu %llu %llu %llu), achieved bitrate %lldKbps fps %u/s, frame rate %u, operating rate %u, priority %u, dt %ums\n", etb, ebd, ftb, fbd, inst->debug_count.etb, inst->debug_count.ebd, inst->debug_count.ftb, inst->debug_count.fbd, bitrate_kbps, achieved_fps, frame_rate, operating_rate, priority, dt_ms); @@ -2770,6 +2770,63 @@ void msm_vidc_print_stats(struct msm_vidc_inst *inst) inst->stats.time_ms = time_ms; } +void msm_vidc_print_memory_stats(struct msm_vidc_inst *inst) +{ + static enum msm_vidc_buffer_type buf_type_arr[9] = { + MSM_VIDC_BUF_BIN, + MSM_VIDC_BUF_ARP, + MSM_VIDC_BUF_COMV, + MSM_VIDC_BUF_NON_COMV, + MSM_VIDC_BUF_LINE, + MSM_VIDC_BUF_DPB, + MSM_VIDC_BUF_PERSIST, + MSM_VIDC_BUF_VPSS, + MSM_VIDC_BUF_PARTIAL_DATA, + }; + u32 count_arr[9]; + u32 size_arr[9]; + u32 size_kb_arr[9]; + u64 total_size = 0; + struct msm_vidc_buffers *buffers; + int cnt; + + if (!inst) { + i_vpr_e(inst, "%s: invalid params\n", __func__); + return; + } + + /* reset array values */ + memset(&count_arr, 0, sizeof(count_arr)); + memset(&size_arr, 0, sizeof(size_arr)); + memset(&size_kb_arr, 0, sizeof(size_kb_arr)); + + /* populate buffer details */ + for (cnt = 0; cnt < 9; cnt++) { + buffers = msm_vidc_get_buffers(inst, buf_type_arr[cnt], __func__); + if (!buffers) + continue; + + size_arr[cnt] = buffers->size; + count_arr[cnt] = buffers->min_count; + size_kb_arr[cnt] = (size_arr[cnt] * count_arr[cnt]) / 1024; + total_size += size_arr[cnt] * count_arr[cnt]; + } + + /* print internal memory stats */ + i_vpr_hs(inst, + "%s %u kb(%ux%d) %s %u kb(%ux%d) %s %u kb(%ux%d) %s %u kb(%ux%d) %s %u kb(%ux%d) %s %u kb(%ux%d) %s %u kb(%ux%d) %s %u kb(%ux%d) %s %u kb(%ux%d) total %llu kb\n", + buf_name(buf_type_arr[0]), size_kb_arr[0], size_arr[0], count_arr[0], + buf_name(buf_type_arr[1]), size_kb_arr[1], size_arr[1], count_arr[1], + buf_name(buf_type_arr[2]), size_kb_arr[2], size_arr[2], count_arr[2], + buf_name(buf_type_arr[3]), size_kb_arr[3], size_arr[3], count_arr[3], + buf_name(buf_type_arr[4]), size_kb_arr[4], size_arr[4], count_arr[4], + buf_name(buf_type_arr[5]), size_kb_arr[5], size_arr[5], count_arr[5], + buf_name(buf_type_arr[6]), size_kb_arr[6], size_arr[6], count_arr[6], + buf_name(buf_type_arr[7]), size_kb_arr[7], size_arr[7], count_arr[7], + buf_name(buf_type_arr[8]), size_kb_arr[8], size_arr[8], count_arr[8], + (total_size / 1024)); +} + int schedule_stats_work(struct msm_vidc_inst *inst) { struct msm_vidc_core *core; @@ -2779,6 +2836,11 @@ int schedule_stats_work(struct msm_vidc_inst *inst) return -EINVAL; } + if (!is_stats_enabled()) { + i_vpr_h(inst, "%s: stats not enabled. Skip scheduling\n", __func__); + return 0; + } + /** * Hfi session is already closed and inst also going to be * closed soon. So skip scheduling new stats_work to avoid diff --git a/driver/vidc/src/msm_vidc_vb2.c b/driver/vidc/src/msm_vidc_vb2.c index f114c24675..9b48eb8a2f 100644 --- a/driver/vidc/src/msm_vidc_vb2.c +++ b/driver/vidc/src/msm_vidc_vb2.c @@ -480,6 +480,9 @@ int msm_vidc_start_streaming(struct msm_vidc_inst *inst, struct vb2_queue *q) /* print final buffer counts & size details */ msm_vidc_print_buffer_info(inst); + /* print internal buffer memory usage stats */ + msm_vidc_print_memory_stats(inst); + buf_type = v4l2_type_to_driver(q->type, __func__); if (!buf_type) return -EINVAL; @@ -556,6 +559,9 @@ int msm_vidc_stop_streaming(struct msm_vidc_inst *inst, struct vb2_queue *q) msm_vidc_flush_buffer_stats(inst); } + /* print internal buffer memory usage stats */ + msm_vidc_print_memory_stats(inst); + i_vpr_h(inst, "Streamoff: %s successful\n", v4l2_type_name(q->type)); return rc; } From 54c1508e6062e4d16414a705c1a26318790fc25d Mon Sep 17 00:00:00 2001 From: Mihir Ganu Date: Mon, 27 Mar 2023 12:57:16 -0700 Subject: [PATCH 0869/1061] video: driver: Remove metadata definitions from UAPI Remove metadata definitions from UAPI. Change-Id: I27c5474c5124a6d69d815f2277fc92b090e4011f Signed-off-by: Mihir Ganu --- .../uapi/vidc/media/v4l2_vidc_extensions.h | 99 ------------------- 1 file changed, 99 deletions(-) diff --git a/include/uapi/vidc/media/v4l2_vidc_extensions.h b/include/uapi/vidc/media/v4l2_vidc_extensions.h index a046d15d8b..391706d96d 100644 --- a/include/uapi/vidc/media/v4l2_vidc_extensions.h +++ b/include/uapi/vidc/media/v4l2_vidc_extensions.h @@ -88,19 +88,6 @@ enum v4l2_mpeg_vidc_blur_types { /* TODO: jdas: compound control for matrix */ #define V4L2_CID_MPEG_VIDC_VIDEO_VPE_CSC_CUSTOM_MATRIX \ (V4L2_CID_MPEG_VIDC_BASE + 0x12) - -/* various Metadata - encoder & decoder */ -enum v4l2_mpeg_vidc_metadata_bits { - V4L2_MPEG_VIDC_META_DISABLE = 0x0, - V4L2_MPEG_VIDC_META_ENABLE = 0x1, - V4L2_MPEG_VIDC_META_TX_INPUT = 0x2, - V4L2_MPEG_VIDC_META_TX_OUTPUT = 0x4, - V4L2_MPEG_VIDC_META_RX_INPUT = 0x8, - V4L2_MPEG_VIDC_META_RX_OUTPUT = 0x10, - V4L2_MPEG_VIDC_META_DYN_ENABLE = 0x20, - V4L2_MPEG_VIDC_META_MAX = 0x40, -}; - #define V4L2_CID_MPEG_VIDC_METADATA_LTR_MARK_USE_DETAILS \ (V4L2_CID_MPEG_VIDC_BASE + 0x13) #define V4L2_CID_MPEG_VIDC_METADATA_SEQ_HEADER_NAL \ @@ -284,86 +271,6 @@ enum v4l2_mpeg_video_av1_tier { #define V4L2_CID_MPEG_VIDC_DRIVER_VERSION \ (V4L2_CID_MPEG_VIDC_BASE + 0x48) -enum v4l2_mpeg_vidc_metapayload_header_flags { - METADATA_FLAGS_NONE = 0, - METADATA_FLAGS_TOP_FIELD = (1 << 0), - METADATA_FLAGS_BOTTOM_FIELD = (1 << 1), - METADATA_FLAGS_BITSTREAM = (1 << 2), - METADATA_FLAGS_RAW = (1 << 3), -}; - -enum saliency_roi_info { - METADATA_SALIENCY_NONE, - METADATA_SALIENCY_TYPE0, -}; - -struct msm_vidc_metabuf_header { - __u32 count; - __u32 size; - __u32 version; - __u32 reserved[5]; -}; -struct msm_vidc_metapayload_header { - __u32 type; - __u32 size; - __u32 version; - __u32 offset; - __u32 flags; - __u32 reserved[3]; -}; -enum v4l2_mpeg_vidc_metadata { - METADATA_BITSTREAM_RESOLUTION = 0x03000103, - METADATA_CROP_OFFSETS = 0x03000105, - METADATA_LTR_MARK_USE_DETAILS = 0x03000137, - METADATA_SEQ_HEADER_NAL = 0x0300014a, - METADATA_DPB_LUMA_CHROMA_MISR = 0x03000153, - METADATA_OPB_LUMA_CHROMA_MISR = 0x03000154, - METADATA_INTERLACE = 0x03000156, - METADATA_TIMESTAMP = 0x0300015c, - METADATA_CONCEALED_MB_COUNT = 0x0300015f, - METADATA_HISTOGRAM_INFO = 0x03000161, - METADATA_PICTURE_TYPE = 0x03000162, - METADATA_SEI_MASTERING_DISPLAY_COLOUR = 0x03000163, - METADATA_SEI_CONTENT_LIGHT_LEVEL = 0x03000164, - METADATA_HDR10PLUS = 0x03000165, - METADATA_EVA_STATS = 0x03000167, - METADATA_BUFFER_TAG = 0x0300016b, - METADATA_SUBFRAME_OUTPUT = 0x0300016d, - METADATA_ENC_QP_METADATA = 0x0300016e, - METADATA_DEC_QP_METADATA = 0x0300016f, - METADATA_ROI_INFO = 0x03000173, - METADATA_DPB_TAG_LIST = 0x03000179, - METADATA_MAX_NUM_REORDER_FRAMES = 0x03000127, - METADATA_SALIENCY_INFO = 0x0300018A, - METADATA_FENCE = 0x0300018B, - METADATA_TRANSCODING_STAT_INFO = 0x03000191, - METADATA_DV_RPU = 0x03000192, -}; -enum meta_interlace_info { - META_INTERLACE_INFO_NONE = 0x00000000, - META_INTERLACE_FRAME_PROGRESSIVE = 0x00000001, - META_INTERLACE_FRAME_MBAFF = 0x00000002, - META_INTERLACE_FRAME_INTERLEAVE_TOPFIELD_FIRST = 0x00000004, - META_INTERLACE_FRAME_INTERLEAVE_BOTTOMFIELD_FIRST = 0x00000008, - META_INTERLACE_FRAME_INTERLACE_TOPFIELD_FIRST = 0x00000010, - META_INTERLACE_FRAME_INTERLACE_BOTTOMFIELD_FIRST = 0x00000020, -}; - -/* - * enum meta_picture_type - specifies input picture type - * @META_PICTURE_TYPE_NEW: start of new frame or first slice in a frame - */ -enum meta_picture_type { - META_PICTURE_TYPE_IDR = 0x00000001, - META_PICTURE_TYPE_P = 0x00000002, - META_PICTURE_TYPE_B = 0x00000004, - META_PICTURE_TYPE_I = 0x00000008, - META_PICTURE_TYPE_CRA = 0x00000010, - META_PICTURE_TYPE_BLA = 0x00000020, - META_PICTURE_TYPE_NOSHOW = 0x00000040, - META_PICTURE_TYPE_NEW = 0x00000080, -}; - /* vendor controls end */ /* vendor events start */ @@ -385,10 +292,4 @@ enum meta_picture_type { /* vendor events end */ -/* Default metadata size (align to 4KB) */ -#define MSM_VIDC_METADATA_SIZE (4 * 4096) /* 16 KB */ -#define ENCODE_INPUT_METADATA_SIZE (512 * 4096) /* 2 MB */ -#define DECODE_INPUT_METADATA_SIZE MSM_VIDC_METADATA_SIZE -#define MSM_VIDC_METADATA_DOLBY_RPU_SIZE (41 * 1024) /* 41 KB */ - #endif From 203f619b7fbd9394859654e9da3f67bf5a5cc323 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Wed, 15 Mar 2023 18:42:14 -0700 Subject: [PATCH 0870/1061] video: driver: Add support to handle synx fence related hfi props/info Add support to handle synx v2 fence related hfi properties and infos mentioned below: - HFI_PROP_FENCE_CLIENT_DATA - HFI_PROP_FENCE_TYPE - HFI_PROP_FENCE_DIRECTION - HFI_PROP_FENCE_ERROR_DATA_CORRUPT - HFI_INFO_FENCE_SIGNAL_ERROR Change-Id: Ifac0230dbeb0da80c104860c0e115167e82e85c6 Signed-off-by: Akshata Sahukar --- .../platform/common/inc/msm_vidc_platform.h | 7 + .../platform/common/src/msm_vidc_platform.c | 129 ++++++++++++++++++ .../pineapple/src/msm_vidc_pineapple.c | 71 +++++++++- driver/vidc/inc/msm_vidc_internal.h | 18 +++ driver/vidc/src/hfi_packet.c | 21 ++- driver/vidc/src/venus_hfi_response.c | 89 ++++++++++-- 6 files changed, 320 insertions(+), 15 deletions(-) diff --git a/driver/platform/common/inc/msm_vidc_platform.h b/driver/platform/common/inc/msm_vidc_platform.h index 5874719c65..c2486a52f3 100644 --- a/driver/platform/common/inc/msm_vidc_platform.h +++ b/driver/platform/common/inc/msm_vidc_platform.h @@ -328,6 +328,9 @@ int msm_vidc_adjust_session_priority(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_roi_info(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_all_intra(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_dec_outbuf_fence(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_dec_outbuf_fence_type(void *instance, struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_dec_outbuf_fence_direction(void *instance, + struct v4l2_ctrl *ctrl); int msm_vidc_adjust_dec_slice_mode(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_preprocess(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_eva_stats(void *instance, struct v4l2_ctrl *ctrl); @@ -400,5 +403,9 @@ int msm_vidc_set_q16(void *instance, enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_vui_timing_info(void *instance, enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_outbuf_fence_type(void *instance, + enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_outbuf_fence_direction(void *instance, + enum msm_vidc_inst_capability_type cap_id); #endif // _MSM_VIDC_PLATFORM_H_ diff --git a/driver/platform/common/src/msm_vidc_platform.c b/driver/platform/common/src/msm_vidc_platform.c index 976441d367..874c6e1bee 100644 --- a/driver/platform/common/src/msm_vidc_platform.c +++ b/driver/platform/common/src/msm_vidc_platform.c @@ -2632,6 +2632,83 @@ int msm_vidc_adjust_dec_outbuf_fence(void *instance, struct v4l2_ctrl *ctrl) return 0; } +int msm_vidc_adjust_dec_outbuf_fence_type(void *instance, struct v4l2_ctrl *ctrl) +{ + struct msm_vidc_inst_capability *capability; + s32 adjusted_value, meta_outbuf_fence = 0; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + struct msm_vidc_core *core; + + if (!inst || !inst->capabilities || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + core = inst->core; + if (!core->capabilities) { + d_vpr_e("%s: invalid core caps\n", __func__); + return -EINVAL; + } + + adjusted_value = ctrl ? ctrl->val : + capability->cap[OUTBUF_FENCE_TYPE].value; + + if (msm_vidc_get_parent_value(inst, OUTBUF_FENCE_TYPE, + META_OUTBUF_FENCE, &meta_outbuf_fence, __func__)) + return -EINVAL; + + if (is_meta_rx_inp_enabled(inst, META_OUTBUF_FENCE)) { + if (core->capabilities[SUPPORTS_SYNX_FENCE].value) + adjusted_value = MSM_VIDC_SYNX_V2_FENCE; + else + adjusted_value = MSM_VIDC_SW_FENCE; + } else { + adjusted_value = MSM_VIDC_FENCE_NONE; + } + + msm_vidc_update_cap_value(inst, OUTBUF_FENCE_TYPE, + adjusted_value, __func__); + + return 0; +} + +int msm_vidc_adjust_dec_outbuf_fence_direction(void *instance, struct v4l2_ctrl *ctrl) +{ + struct msm_vidc_inst_capability *capability; + s32 adjusted_value, meta_outbuf_fence = 0; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + struct msm_vidc_core *core; + + if (!inst || !inst->capabilities || !inst->core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + capability = inst->capabilities; + core = inst->core; + if (!core->capabilities) { + d_vpr_e("%s: invalid core caps\n", __func__); + return -EINVAL; + } + + adjusted_value = ctrl ? ctrl->val : + capability->cap[OUTBUF_FENCE_DIRECTION].value; + + if (msm_vidc_get_parent_value(inst, OUTBUF_FENCE_DIRECTION, + META_OUTBUF_FENCE, &meta_outbuf_fence, __func__)) + return -EINVAL; + + if (is_meta_rx_inp_enabled(inst, META_OUTBUF_FENCE)) { + adjusted_value = MSM_VIDC_FENCE_DIR_TX; + } else { + adjusted_value = MSM_VIDC_FENCE_DIR_NONE; + } + + msm_vidc_update_cap_value(inst, OUTBUF_FENCE_DIRECTION, + adjusted_value, __func__); + + return 0; +} + int msm_vidc_adjust_dec_slice_mode(void *instance, struct v4l2_ctrl *ctrl) { struct msm_vidc_inst_capability *capability; @@ -4095,4 +4172,56 @@ int msm_vidc_set_vui_timing_info(void *instance, return rc; } +int msm_vidc_set_outbuf_fence_type(void *instance, + enum msm_vidc_inst_capability_type cap_id) +{ + int rc = 0; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; + u32 hfi_value; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (inst->capabilities->cap[OUTBUF_FENCE_TYPE].value == + MSM_VIDC_FENCE_NONE) + return 0; + + hfi_value = inst->capabilities->cap[cap_id].value; + + rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32_ENUM, + &hfi_value, sizeof(u32), __func__); + if (rc) + return rc; + + return rc; +} + +int msm_vidc_set_outbuf_fence_direction(void *instance, + enum msm_vidc_inst_capability_type cap_id) +{ + int rc = 0; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; + u32 hfi_value; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + if (inst->capabilities->cap[OUTBUF_FENCE_DIRECTION].value == + MSM_VIDC_FENCE_DIR_NONE) + return 0; + + hfi_value = inst->capabilities->cap[cap_id].value; + + rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32_ENUM, + &hfi_value, sizeof(u32), __func__); + if (rc) + return rc; + + return rc; +} + /********************* End of Control Set functions **************************/ diff --git a/driver/platform/pineapple/src/msm_vidc_pineapple.c b/driver/platform/pineapple/src/msm_vidc_pineapple.c index 278e05da9e..7dd50d4842 100644 --- a/driver/platform/pineapple/src/msm_vidc_pineapple.c +++ b/driver/platform/pineapple/src/msm_vidc_pineapple.c @@ -633,6 +633,47 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { 0, CAP_FLAG_VOLATILE}, + /* Fence type for input buffer. Currently unsed */ + {INBUF_FENCE_TYPE, DEC, CODECS_ALL, + MSM_VIDC_FENCE_NONE, MSM_VIDC_FENCE_NONE, + BIT(MSM_VIDC_FENCE_NONE), + MSM_VIDC_FENCE_NONE, + 0, + HFI_PROP_FENCE_TYPE, + CAP_FLAG_MENU | CAP_FLAG_INPUT_PORT}, + + {OUTBUF_FENCE_TYPE, DEC, CODECS_ALL, + MSM_VIDC_FENCE_NONE, MSM_VIDC_SYNX_V2_FENCE, + BIT(MSM_VIDC_FENCE_NONE) | BIT(MSM_VIDC_SW_FENCE) | + BIT(MSM_VIDC_SYNX_V2_FENCE), + MSM_VIDC_FENCE_NONE, + 0, + HFI_PROP_FENCE_TYPE, + CAP_FLAG_MENU | CAP_FLAG_OUTPUT_PORT}, + + /* Fence direction for input buffer. Currently unsed */ + {INBUF_FENCE_DIRECTION, DEC, CODECS_ALL, + MSM_VIDC_FENCE_DIR_NONE, MSM_VIDC_FENCE_DIR_NONE, + BIT(MSM_VIDC_FENCE_DIR_NONE), + MSM_VIDC_FENCE_DIR_NONE, + 0, + HFI_PROP_FENCE_DIRECTION, + CAP_FLAG_MENU | CAP_FLAG_INPUT_PORT}, + + {OUTBUF_FENCE_DIRECTION, DEC, CODECS_ALL, + MSM_VIDC_FENCE_DIR_NONE, MSM_VIDC_FENCE_DIR_RX, + BIT(MSM_VIDC_FENCE_DIR_NONE) | BIT(MSM_VIDC_FENCE_DIR_TX) | + BIT(MSM_VIDC_FENCE_DIR_RX), + MSM_VIDC_FENCE_DIR_NONE, + 0, + HFI_PROP_FENCE_DIRECTION, + CAP_FLAG_MENU | CAP_FLAG_OUTPUT_PORT}, + + {FENCE_ERROR_DATA_CORRUPT, DEC, CODECS_ALL, + 0, 1, 1, 0, + 0, + HFI_PROP_FENCE_ERROR_DATA_CORRUPT}, + {TS_REORDER, DEC, H264|HEVC, 0, 1, 1, 0, V4L2_CID_MPEG_VIDC_TS_REORDER}, @@ -2060,15 +2101,41 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine msm_vidc_set_u32}, {META_OUTBUF_FENCE, DEC, H264|HEVC|AV1, - {LOWLATENCY_MODE, SLICE_DECODE}, + {LOWLATENCY_MODE, SLICE_DECODE, + OUTBUF_FENCE_TYPE, OUTBUF_FENCE_DIRECTION}, msm_vidc_adjust_dec_outbuf_fence, NULL}, {META_OUTBUF_FENCE, DEC, VP9, - {LOWLATENCY_MODE}, + {LOWLATENCY_MODE, OUTBUF_FENCE_TYPE, OUTBUF_FENCE_DIRECTION}, msm_vidc_adjust_dec_outbuf_fence, NULL}, + {INBUF_FENCE_TYPE, DEC, CODECS_ALL, + {0}, + NULL, + NULL}, + + {OUTBUF_FENCE_TYPE, DEC, CODECS_ALL, + {0}, + msm_vidc_adjust_dec_outbuf_fence_type, + msm_vidc_set_outbuf_fence_type}, + + {INBUF_FENCE_DIRECTION, DEC, CODECS_ALL, + {0}, + NULL, + NULL}, + + {OUTBUF_FENCE_DIRECTION, DEC, CODECS_ALL, + {0}, + msm_vidc_adjust_dec_outbuf_fence_direction, + msm_vidc_set_outbuf_fence_direction}, + + {FENCE_ERROR_DATA_CORRUPT, DEC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_u32}, + {HFLIP, ENC, CODECS_ALL, {0}, NULL, diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 06275a2634..c53c5c2c7a 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -258,6 +258,10 @@ enum msm_vidc_metadata_bits { CAP(DELIVERY_MODE) \ CAP(VUI_TIMING_INFO) \ CAP(SLICE_DECODE) \ + CAP(INBUF_FENCE_TYPE) \ + CAP(OUTBUF_FENCE_TYPE) \ + CAP(INBUF_FENCE_DIRECTION) \ + CAP(OUTBUF_FENCE_DIRECTION) \ CAP(PROFILE) \ CAP(ENH_LAYER_COUNT) \ CAP(BIT_RATE) \ @@ -299,6 +303,7 @@ enum msm_vidc_metadata_bits { CAP(SECURE_MODE) \ CAP(FENCE_ID) \ CAP(FENCE_FD) \ + CAP(FENCE_ERROR_DATA_CORRUPT) \ CAP(TS_REORDER) \ CAP(HFLIP) \ CAP(VFLIP) \ @@ -794,6 +799,7 @@ struct msm_vidc_hfi_frame_info { u32 data_corrupt; u32 overflow; u32 fence_id; + u32 fence_error; }; struct msm_vidc_decode_vpp_delay { @@ -853,6 +859,18 @@ struct msm_vidc_power { u32 fw_cf; }; +enum msm_vidc_fence_type { + MSM_VIDC_FENCE_NONE = 0, + MSM_VIDC_SW_FENCE = 1, + MSM_VIDC_SYNX_V2_FENCE = 2, +}; + +enum msm_vidc_fence_direction { + MSM_VIDC_FENCE_DIR_NONE = 0, + MSM_VIDC_FENCE_DIR_TX = 1, + MSM_VIDC_FENCE_DIR_RX = 2, +}; + struct msm_vidc_fence_context { char name[MAX_NAME_LENGTH]; u64 ctx_num; diff --git a/driver/vidc/src/hfi_packet.c b/driver/vidc/src/hfi_packet.c index ae85d60506..214b3025ab 100644 --- a/driver/vidc/src/hfi_packet.c +++ b/driver/vidc/src/hfi_packet.c @@ -401,8 +401,9 @@ int hfi_packet_sys_init(struct msm_vidc_core *core, { int rc = 0; u32 payload = 0; + u32 synx_client_data[2]; - if (!core || !pkt) { + if (!core || !pkt || !core->capabilities) { d_vpr_e("%s: Invalid params\n", __func__); return -EINVAL; } @@ -528,6 +529,24 @@ int hfi_packet_sys_init(struct msm_vidc_core *core, if (rc) goto err_sys_init; + /* HFI_PROP_FENCE_CLIENT_DATA */ + if (core->capabilities[SUPPORTS_SYNX_FENCE].value) { + synx_client_data[0] = core->synx_fence_data.client_id; + synx_client_data[1] = core->synx_fence_data.client_flags; + d_vpr_h("%s: synx fence client id: %u client flags: %u\n", + __func__, synx_client_data[0], synx_client_data[1]); + rc = hfi_create_packet(pkt, pkt_size, + HFI_PROP_FENCE_CLIENT_DATA, + HFI_HOST_FLAGS_NONE, + HFI_PAYLOAD_U32_ARRAY, + HFI_PORT_NONE, + core->packet_id++, + synx_client_data, + sizeof(u32) * 2); + if (rc) + goto err_sys_init; + } + d_vpr_h("System init packet created\n"); return rc; diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index b9352110f8..fc3c4c9248 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -342,6 +342,10 @@ static int handle_session_info(struct msm_vidc_inst *inst, info = "buffer overflow"; inst->hfi_frame_info.overflow = 1; break; + case HFI_INFO_FENCE_SIGNAL_ERROR: + info = "synx v2 fence error"; + inst->hfi_frame_info.fence_error = 1; + break; case HFI_INFO_HFI_FLAG_DRAIN_LAST: info = "drain last flag"; rc = handle_session_last_flag_info(inst, pkt); @@ -856,6 +860,76 @@ static int handle_input_buffer(struct msm_vidc_inst *inst, return rc; } +static int msm_vidc_handle_fence_signal(struct msm_vidc_inst *inst, + struct msm_vidc_buffer *buf) +{ + int rc = 0; + bool signal_error = false; + struct msm_vidc_core *core = inst->core; + + if (!buf) { + i_vpr_e(inst, "%s: invalid params\n", __func__); + return -EINVAL; + } + + if (inst->capabilities->cap[OUTBUF_FENCE_TYPE].value == + MSM_VIDC_FENCE_NONE) + return 0; + + if (is_meta_rx_inp_enabled(inst, META_OUTBUF_FENCE)) { + if (!inst->hfi_frame_info.fence_id) { + i_vpr_e(inst, + "%s: fence id is not received although fencing is enabled\n", + __func__); + return -EINVAL; + } + } else { + if (inst->hfi_frame_info.fence_id) + i_vpr_e(inst, + "%s: fence id is received although fencing is not enabled\n", + __func__); + return 0; + } + + if (inst->capabilities->cap[OUTBUF_FENCE_TYPE].value == + MSM_VIDC_SYNX_V2_FENCE) { + if (inst->hfi_frame_info.fence_error) + signal_error = true; + } else if (inst->capabilities->cap[OUTBUF_FENCE_TYPE].value == + MSM_VIDC_SW_FENCE) { + if (!buf->data_size) + signal_error = true; + + if (inst->hfi_frame_info.fence_error) + i_vpr_e(inst, + "%s: fence error info recieved for SW fence\n", + __func__); + } else { + i_vpr_e(inst, "%s: invalid fence type\n", __func__); + return -EINVAL; + } + + /* fence signalling */ + if (signal_error) { + /* signal fence error */ + i_vpr_l(inst, + "%s: signalling fence error for buf idx %d daddr %#llx\n", + __func__, buf->index, buf->device_addr); + call_fence_op(core, fence_destroy, inst, + inst->hfi_frame_info.fence_id); + } else { + /* signal fence success*/ + rc = call_fence_op(core, fence_signal, inst, + inst->hfi_frame_info.fence_id); + if (rc) { + i_vpr_e(inst, "%s: failed to signal fence\n", __func__); + return -EINVAL; + } + } + + return 0; +} + static int handle_output_buffer(struct msm_vidc_inst *inst, struct hfi_buffer *buffer) { @@ -997,18 +1071,9 @@ static int handle_output_buffer(struct msm_vidc_inst *inst, buf->flags = 0; buf->flags = get_driver_buffer_flags(inst, buffer->flags); - /* fence signalling */ - if (inst->hfi_frame_info.fence_id) { - if (buf->data_size) { - /* signal fence */ - call_fence_op(core, fence_signal, inst, - inst->hfi_frame_info.fence_id); - } else { - /* destroy fence */ - call_fence_op(core, fence_destroy, inst, - inst->hfi_frame_info.fence_id); - } - } + rc = msm_vidc_handle_fence_signal(inst, buf); + if (rc) + msm_vidc_change_state(inst, MSM_VIDC_ERROR, __func__); if (is_decode_session(inst)) { inst->power.fw_cr = inst->hfi_frame_info.cr; From be793d6501f5f729edd3fbdd8fc8fb452a3f2485 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Mon, 27 Mar 2023 18:04:09 -0700 Subject: [PATCH 0871/1061] video: driver: misc synx fence changes - Make synx fence debugfs support as module parameter - Update sync fence related register device addresses to eliminate memory holes - Enable hw fence config parameter to enable compilation of hw fence definitions in display driver - Handle synx fence queue memory error in control status register. - Fix msm_vidc_debug and msm_vidc_fw_dump module params ro accept values during module instantiation. Change-Id: Ib3ab7e80cfc4e440c0b3170292e1943888298875 Signed-off-by: Akshata Sahukar --- .../pineapple/src/msm_vidc_pineapple.c | 24 ++++---- driver/variant/iris33/src/msm_vidc_iris33.c | 3 +- driver/vidc/inc/msm_vidc_debug.h | 2 +- driver/vidc/src/msm_vidc_debug.c | 60 +++++++++++++------ driver/vidc/src/msm_vidc_probe.c | 33 ++++------ driver/vidc/src/msm_vidc_synx.c | 2 + 6 files changed, 68 insertions(+), 56 deletions(-) diff --git a/driver/platform/pineapple/src/msm_vidc_pineapple.c b/driver/platform/pineapple/src/msm_vidc_pineapple.c index 7dd50d4842..d3302657b9 100644 --- a/driver/platform/pineapple/src/msm_vidc_pineapple.c +++ b/driver/platform/pineapple/src/msm_vidc_pineapple.c @@ -634,7 +634,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { CAP_FLAG_VOLATILE}, /* Fence type for input buffer. Currently unsed */ - {INBUF_FENCE_TYPE, DEC, CODECS_ALL, + {INBUF_FENCE_TYPE, DEC, H264|HEVC|VP9|AV1, MSM_VIDC_FENCE_NONE, MSM_VIDC_FENCE_NONE, BIT(MSM_VIDC_FENCE_NONE), MSM_VIDC_FENCE_NONE, @@ -642,7 +642,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { HFI_PROP_FENCE_TYPE, CAP_FLAG_MENU | CAP_FLAG_INPUT_PORT}, - {OUTBUF_FENCE_TYPE, DEC, CODECS_ALL, + {OUTBUF_FENCE_TYPE, DEC, H264|HEVC|VP9|AV1, MSM_VIDC_FENCE_NONE, MSM_VIDC_SYNX_V2_FENCE, BIT(MSM_VIDC_FENCE_NONE) | BIT(MSM_VIDC_SW_FENCE) | BIT(MSM_VIDC_SYNX_V2_FENCE), @@ -652,7 +652,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { CAP_FLAG_MENU | CAP_FLAG_OUTPUT_PORT}, /* Fence direction for input buffer. Currently unsed */ - {INBUF_FENCE_DIRECTION, DEC, CODECS_ALL, + {INBUF_FENCE_DIRECTION, DEC, H264|HEVC|VP9|AV1, MSM_VIDC_FENCE_DIR_NONE, MSM_VIDC_FENCE_DIR_NONE, BIT(MSM_VIDC_FENCE_DIR_NONE), MSM_VIDC_FENCE_DIR_NONE, @@ -660,7 +660,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { HFI_PROP_FENCE_DIRECTION, CAP_FLAG_MENU | CAP_FLAG_INPUT_PORT}, - {OUTBUF_FENCE_DIRECTION, DEC, CODECS_ALL, + {OUTBUF_FENCE_DIRECTION, DEC, H264|HEVC|VP9|AV1, MSM_VIDC_FENCE_DIR_NONE, MSM_VIDC_FENCE_DIR_RX, BIT(MSM_VIDC_FENCE_DIR_NONE) | BIT(MSM_VIDC_FENCE_DIR_TX) | BIT(MSM_VIDC_FENCE_DIR_RX), @@ -669,7 +669,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { HFI_PROP_FENCE_DIRECTION, CAP_FLAG_MENU | CAP_FLAG_OUTPUT_PORT}, - {FENCE_ERROR_DATA_CORRUPT, DEC, CODECS_ALL, + {FENCE_ERROR_DATA_CORRUPT, DEC, H264|HEVC|VP9|AV1, 0, 1, 1, 0, 0, HFI_PROP_FENCE_ERROR_DATA_CORRUPT}, @@ -2111,27 +2111,27 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine msm_vidc_adjust_dec_outbuf_fence, NULL}, - {INBUF_FENCE_TYPE, DEC, CODECS_ALL, + {INBUF_FENCE_TYPE, DEC, H264|HEVC|VP9|AV1, {0}, NULL, NULL}, - {OUTBUF_FENCE_TYPE, DEC, CODECS_ALL, + {OUTBUF_FENCE_TYPE, DEC, H264|HEVC|VP9|AV1, {0}, msm_vidc_adjust_dec_outbuf_fence_type, msm_vidc_set_outbuf_fence_type}, - {INBUF_FENCE_DIRECTION, DEC, CODECS_ALL, + {INBUF_FENCE_DIRECTION, DEC, H264|HEVC|VP9|AV1, {0}, NULL, NULL}, - {OUTBUF_FENCE_DIRECTION, DEC, CODECS_ALL, + {OUTBUF_FENCE_DIRECTION, DEC, H264|HEVC|VP9|AV1, {0}, msm_vidc_adjust_dec_outbuf_fence_direction, msm_vidc_set_outbuf_fence_direction}, - {FENCE_ERROR_DATA_CORRUPT, DEC, CODECS_ALL, + {FENCE_ERROR_DATA_CORRUPT, DEC, H264|HEVC|VP9|AV1, {0}, NULL, msm_vidc_set_u32}, @@ -2765,12 +2765,12 @@ static const struct device_region_table pineapple_device_region_table[] = { }, { "ipc_protocol4_client8_version-registers", - 0x00508000, 0x1000, 0xFFADD000, + 0x00508000, 0x1000, 0xFFADF000, MSM_VIDC_PROTOCOL_FENCE_CLIENT_VPU }, { "qtimer_f0v1_qtmr_v1_cntpct_lo", - 0x17421000, 0x1000, 0xFFADC000, + 0x17421000, 0x1000, 0xFFADE000, MSM_VIDC_QTIMER }, }; diff --git a/driver/variant/iris33/src/msm_vidc_iris33.c b/driver/variant/iris33/src/msm_vidc_iris33.c index 4281c42550..9d9aee708c 100644 --- a/driver/variant/iris33/src/msm_vidc_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_iris33.c @@ -954,7 +954,8 @@ static int __boot_firmware_iris33(struct msm_vidc_core *vidc_core) return rc; if ((ctrl_status & HFI_CTRL_ERROR_FATAL) || - (ctrl_status & HFI_CTRL_ERROR_UC_REGION_NOT_SET)) { + (ctrl_status & HFI_CTRL_ERROR_UC_REGION_NOT_SET) || + (ctrl_status & HFI_CTRL_ERROR_HW_FENCE_QUEUE)) { d_vpr_e("%s: boot firmware failed, ctrl status %#x\n", __func__, ctrl_status); return -EINVAL; diff --git a/driver/vidc/inc/msm_vidc_debug.h b/driver/vidc/inc/msm_vidc_debug.h index 3ac1444402..57f90b3334 100644 --- a/driver/vidc/inc/msm_vidc_debug.h +++ b/driver/vidc/inc/msm_vidc_debug.h @@ -39,7 +39,7 @@ extern int msm_vidc_ddr_bw; extern int msm_vidc_llc_bw; extern bool msm_vidc_fw_dump; extern unsigned int msm_vidc_enable_bugon; -extern bool msm_vidc_disable_synx_fence; +extern bool msm_vidc_synx_fence_enable; /* do not modify the log message as it is used in test scripts */ #define FMT_STRING_SET_CTRL \ diff --git a/driver/vidc/src/msm_vidc_debug.c b/driver/vidc/src/msm_vidc_debug.c index af05a9b725..3f15528f6f 100644 --- a/driver/vidc/src/msm_vidc_debug.c +++ b/driver/vidc/src/msm_vidc_debug.c @@ -22,6 +22,8 @@ extern struct msm_vidc_core *g_core; #define MSM_VIDC_MAX_STATS_DELAY_MS 10000 unsigned int msm_vidc_debug = (DRV_LOG | FW_LOG); +/* disabled synx fence by default temporarily */ +bool msm_vidc_synx_fence_enable = false; static int debug_level_set(const char *val, const struct kernel_param *kp) @@ -34,12 +36,6 @@ static int debug_level_set(const char *val, d_vpr_e("%s: Invalid params\n", __func__); return -EINVAL; } - core = *(struct msm_vidc_core **)kp->arg; - - if (!core || !core->capabilities) { - d_vpr_e("%s: Invalid core/capabilities\n", __func__); - return -EINVAL; - } ret = kstrtouint(val, 0, &dvalue); if (ret) @@ -47,6 +43,13 @@ static int debug_level_set(const char *val, msm_vidc_debug = dvalue; + core = *(struct msm_vidc_core **)kp->arg; + + if (!core || !core->capabilities) { + d_vpr_e("%s: Invalid core/capabilities\n", __func__); + return 0; + } + /* check if driver or FW logmask is more than default level */ if (((dvalue & DRV_LOGMASK) & ~(DRV_LOG)) || ((dvalue & FW_LOGMASK) & ~(FW_LOG))) { @@ -82,7 +85,6 @@ static const struct kernel_param_ops msm_vidc_debug_fops = { static int fw_dump_set(const char *val, const struct kernel_param *kp) { - struct msm_vidc_core *core = NULL; unsigned int dvalue; int ret; @@ -90,12 +92,6 @@ static int fw_dump_set(const char *val, d_vpr_e("%s: Invalid params\n", __func__); return -EINVAL; } - core = *(struct msm_vidc_core **) kp->arg; - - if (!core || !core->capabilities) { - d_vpr_e("%s: Invalid core/capabilities\n", __func__); - return -EINVAL; - } ret = kstrtouint(val, 0, &dvalue); if (ret) @@ -118,16 +114,44 @@ static const struct kernel_param_ops msm_vidc_fw_dump_fops = { .get = fw_dump_get, }; +static int synx_fence_set(const char *val, + const struct kernel_param *kp) +{ + unsigned int dvalue; + int ret; + + if (!kp || !kp->arg || !val) { + d_vpr_e("%s: Invalid params\n", __func__); + return -EINVAL; + } + + ret = kstrtouint(val, 0, &dvalue); + if (ret) + return ret; + + msm_vidc_synx_fence_enable = dvalue; + + return 0; +} + +static int synx_fence_get(char *buffer, const struct kernel_param *kp) +{ + return scnprintf(buffer, PAGE_SIZE, "%#x", msm_vidc_synx_fence_enable); +} + +static const struct kernel_param_ops msm_vidc_synx_fence_debug_fops = { + .set = synx_fence_set, + .get = synx_fence_get, +}; + module_param_cb(msm_vidc_debug, &msm_vidc_debug_fops, &g_core, 0644); module_param_cb(msm_vidc_fw_dump, &msm_vidc_fw_dump_fops, &g_core, 0644); +module_param_cb(msm_vidc_synx_fence_enable, + &msm_vidc_synx_fence_debug_fops, &g_core, 0644); bool msm_vidc_lossless_encode = !true; EXPORT_SYMBOL(msm_vidc_lossless_encode); -/* disabled synx fence by default temporarily */ -bool msm_vidc_disable_synx_fence = !false; -EXPORT_SYMBOL(msm_vidc_disable_synx_fence); - bool msm_vidc_syscache_disable = !true; EXPORT_SYMBOL(msm_vidc_syscache_disable); @@ -402,8 +426,6 @@ struct dentry* msm_vidc_debugfs_init_drv(void) &msm_vidc_syscache_disable); debugfs_create_bool("lossless_encoding", 0644, dir, &msm_vidc_lossless_encode); - debugfs_create_bool("disable_synx_v2_fence", 0644, dir, - &msm_vidc_disable_synx_fence); debugfs_create_u32("enable_bugon", 0644, dir, &msm_vidc_enable_bugon); diff --git a/driver/vidc/src/msm_vidc_probe.c b/driver/vidc/src/msm_vidc_probe.c index e00fcf3ddf..1ab77d4033 100644 --- a/driver/vidc/src/msm_vidc_probe.c +++ b/driver/vidc/src/msm_vidc_probe.c @@ -569,7 +569,16 @@ static int msm_vidc_component_master_bind(struct device *dev) } if (core->capabilities[SUPPORTS_SYNX_FENCE].value) { - if (msm_vidc_disable_synx_fence) { + if (msm_vidc_synx_fence_enable) { + /* register for synx fence */ + rc = call_fence_op(core, fence_register, core); + if (rc) { + d_vpr_e("%s: failed to register synx fence\n", + __func__); + core->capabilities[SUPPORTS_SYNX_FENCE].value = 0; + return rc; + } + } else { /* override synx fence ops with dma fence ops */ core->fence_ops = get_dma_fence_ops(); if (!core->fence_ops) { @@ -577,28 +586,6 @@ static int msm_vidc_component_master_bind(struct device *dev) return -EINVAL; } core->capabilities[SUPPORTS_SYNX_FENCE].value = 0; - } else { - /* register for synx fence */ - rc = call_fence_op(core, fence_register, core); - if (rc) { - d_vpr_e("%s: failed to register synx fence\n", - __func__); - core->capabilities[SUPPORTS_SYNX_FENCE].value = 0; - /* - * - Bail out the session for time being for this - * case where synx fence register call retunrs error - * to help with debugging - * - Re-initialize fence ops with dma_fence_ops. - * This is required once we start ignoring this - * synx fence register call error. - */ - core->fence_ops = get_dma_fence_ops(); - if (!core->fence_ops) { - d_vpr_e("%s: invalid dma fence ops\n", __func__); - return -EINVAL; - } - return rc; - } } } diff --git a/driver/vidc/src/msm_vidc_synx.c b/driver/vidc/src/msm_vidc_synx.c index 8e0b38339d..946d56ec4c 100644 --- a/driver/vidc/src/msm_vidc_synx.c +++ b/driver/vidc/src/msm_vidc_synx.c @@ -145,6 +145,7 @@ static int msm_vidc_synx_fence_register(struct msm_vidc_core *core) "video synx fence"); params.name = synx_session_name; params.ptr = &queue_desc; + params.flags = SYNX_INIT_MAX; /* unused */ session = (struct synx_session *)synx_hwfence_initialize(¶ms); @@ -155,6 +156,7 @@ static int msm_vidc_synx_fence_register(struct msm_vidc_core *core) /* fill core synx fence data */ core->synx_fence_data.client_id = (u32)params.id; + core->synx_fence_data.client_flags = (u32)params.flags; core->synx_fence_data.session = (void *)session; core->synx_fence_data.queue.size = (u32)queue_desc.size; core->synx_fence_data.queue.kvaddr = queue_desc.vaddr; From dabd91e62e47f9740a930eacde033520418ed960 Mon Sep 17 00:00:00 2001 From: Ashish Patil Date: Mon, 20 Mar 2023 17:14:39 -0700 Subject: [PATCH 0872/1061] video: driver: adding encoder GOP awareness settings in the power calculation power calculation is optimized by using encoder reference handling and GOP details. Change-Id: I29707fcd152f89e213532afc9c4b6191d23b4d6c Signed-off-by: Ashish Patil --- .../pineapple/inc/pineapple_technology.h | 4 +- .../variant/iris33/src/msm_vidc_bus_iris33.c | 4 +- .../iris33/src/msm_vidc_power_iris33.c | 45 ++++++++++++------- 3 files changed, 34 insertions(+), 19 deletions(-) diff --git a/driver/platform/pineapple/inc/pineapple_technology.h b/driver/platform/pineapple/inc/pineapple_technology.h index 78041169e0..9bbf9621a6 100644 --- a/driver/platform/pineapple/inc/pineapple_technology.h +++ b/driver/platform/pineapple/inc/pineapple_technology.h @@ -244,7 +244,7 @@ static u32 av1_num_tiles_pineapple[7][3] = */ /* 1000x */ -static u32 pineapple_en_readfactor[7] = {1000, 1500, 1750, 1875, 1000, 2000, 2000}; +static u32 pineapple_en_readfactor[8] = {1000, 1500, 1750, 1875, 1000, 2000, 2000, 1000}; /* 1000x */ -static u32 pineapple_en_writefactor[7] = {1000, 500, 500, 500, 1000, 0, 1000}; +static u32 pineapple_en_writefactor[8] = {1000, 500, 500, 500, 1000, 0, 1000, 1000}; static u32 pineapple_en_frame_num_parallel = 1; diff --git a/driver/variant/iris33/src/msm_vidc_bus_iris33.c b/driver/variant/iris33/src/msm_vidc_bus_iris33.c index 44afe2e5fd..1486a4dc8c 100644 --- a/driver/variant/iris33/src/msm_vidc_bus_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_bus_iris33.c @@ -704,7 +704,7 @@ static int calculate_bandwidth_encoder_iris33( codec_output->collocated_rd_wr_total_noc; /* I frame only */ - if (codec_input.hierachical_layer == 7) { + if (codec_input.hierachical_layer == CODEC_GOP_IONLY) { codec_output->collocated_rd_noc = 0; codec_output->collocated_wr_noc = 0; codec_output->collocated_rd_ddr = 0; @@ -817,7 +817,7 @@ static int calculate_bandwidth_encoder_iris33( 0 : codec_output->dpb_wr_noc; /* I frame only */ - if (codec_input.hierachical_layer == 7) { + if (codec_input.hierachical_layer == CODEC_GOP_IONLY) { codec_output->dpb_rd_y_noc = 0; codec_output->dpb_rd_crcb_noc =0; codec_output->dpb_rdwr_duetooverlap_noc =0; diff --git a/driver/variant/iris33/src/msm_vidc_power_iris33.c b/driver/variant/iris33/src/msm_vidc_power_iris33.c index b632b5dcac..6b8b0b054b 100644 --- a/driver/variant/iris33/src/msm_vidc_power_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_power_iris33.c @@ -19,6 +19,32 @@ static u64 __calculate_encoder(struct vidc_bus_vote_data *d); static u64 __calculate(struct msm_vidc_inst* inst, struct vidc_bus_vote_data *d); static u64 msm_vidc_calc_freq_iris33_legacy(struct msm_vidc_inst *inst, u32 data_size); + +static int msm_vidc_get_hier_layer_val(struct msm_vidc_inst *inst) +{ + int hierachical_layer = CODEC_GOP_IPP; + + if (inst->domain == MSM_VIDC_ENCODER) { + if (inst->capabilities->cap[ALL_INTRA].value) { + /* no P and B frames case */ + hierachical_layer = CODEC_GOP_IONLY; + } else if (inst->capabilities->cap[B_FRAME].value == 0) { + /* no B frames case */ + hierachical_layer = CODEC_GOP_IPP; + } else { /* P and B frames enabled case */ + if (inst->capabilities->cap[ENH_LAYER_COUNT].value == 0 || + inst->capabilities->cap[ENH_LAYER_COUNT].value == 1) + hierachical_layer = CODEC_GOP_IbP; + else if (inst->capabilities->cap[ENH_LAYER_COUNT].value == 2) + hierachical_layer = CODEC_GOP_I1B2b1P; + else + hierachical_layer = CODEC_GOP_I3B4b1P; + } + } + + return hierachical_layer; +} + static int msm_vidc_init_codec_input_freq(struct msm_vidc_inst *inst, u32 data_size, struct api_calculation_input *codec_input) { @@ -83,15 +109,8 @@ static int msm_vidc_init_codec_input_freq(struct msm_vidc_inst *inst, u32 data_s else codec_input->bitdepth = CODEC_BITDEPTH_10; - /* - * Used for calculating Encoder GOP Complexity - * hierachical_layer=0..7 used as Array Index - * inst->capabilities->cap[B_FRAME].value=[ 0 1 2 ] - * TODO how to map? - */ - - /* set as IPP */ - codec_input->hierachical_layer = 0; + codec_input->hierachical_layer = + msm_vidc_get_hier_layer_val(inst); if (inst->domain == MSM_VIDC_DECODER) color_fmt = v4l2_colorformat_to_driver(inst, @@ -177,12 +196,8 @@ static int msm_vidc_init_codec_input_bus(struct msm_vidc_inst *inst, struct vidc return -EINVAL; } - /* - * Used for calculating Encoder GOP Complexity - * hierachical_layer=0..7 used as Array Index - * TODO how to map? - */ - codec_input->hierachical_layer = 0; /* set as IPP */ + codec_input->hierachical_layer = + msm_vidc_get_hier_layer_val(inst); /* * If the calculated motion_vector_complexity is > 2 then set the From 7affdd10313d5872c05613d595d81ce8423014f4 Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Thu, 23 Mar 2023 16:34:35 -0700 Subject: [PATCH 0873/1061] video: driver: adjust properties during reqbufs - Adjust v4l2 properties during reqbufs of master port. Set properties to firmware during streamon of master port. - Calculate buffer size and buffer counts during reqbufs call of each port. - This is done to recalculate buffer sizes and counts after client has configured all the controls and updated size and count can be returned to client before streamon. Change-Id: Ifc7ee36456d5d4e1c862952de581af3d7ae126b0 Signed-off-by: Darshana Patil --- driver/vidc/inc/msm_vidc_control.h | 3 +- driver/vidc/inc/msm_vidc_inst.h | 2 + driver/vidc/src/msm_vdec.c | 6 ++- driver/vidc/src/msm_venc.c | 2 +- driver/vidc/src/msm_vidc.c | 1 + driver/vidc/src/msm_vidc_buffer.c | 3 ++ driver/vidc/src/msm_vidc_control.c | 20 ++++++--- driver/vidc/src/msm_vidc_vb2.c | 67 ++++++++++++++---------------- 8 files changed, 61 insertions(+), 43 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_control.h b/driver/vidc/inc/msm_vidc_control.h index 64d8d5c3e6..e63595d14f 100644 --- a/driver/vidc/inc/msm_vidc_control.h +++ b/driver/vidc/inc/msm_vidc_control.h @@ -16,7 +16,8 @@ int msm_v4l2_op_s_ctrl(struct v4l2_ctrl *ctrl); int msm_v4l2_op_g_volatile_ctrl(struct v4l2_ctrl *ctrl); int msm_vidc_s_ctrl(struct msm_vidc_inst *inst, struct v4l2_ctrl *ctrl); int msm_vidc_prepare_dependency_list(struct msm_vidc_inst *inst); -int msm_vidc_adjust_set_v4l2_properties(struct msm_vidc_inst *inst); +int msm_vidc_adjust_v4l2_properties(struct msm_vidc_inst *inst); +int msm_vidc_set_v4l2_properties(struct msm_vidc_inst *inst); bool is_valid_cap_id(enum msm_vidc_inst_capability_type cap_id); bool is_valid_cap(struct msm_vidc_inst *inst, enum msm_vidc_inst_capability_type cap_id); diff --git a/driver/vidc/inc/msm_vidc_inst.h b/driver/vidc/inc/msm_vidc_inst.h index 7c288e5e78..62cebc8dea 100644 --- a/driver/vidc/inc/msm_vidc_inst.h +++ b/driver/vidc/inc/msm_vidc_inst.h @@ -127,6 +127,7 @@ struct msm_vidc_inst { bool once_per_session_set; bool ipsc_properties_set; bool opsc_properties_set; + bool caps_list_prepared; struct dentry *debugfs_root; struct msm_vidc_debug debug; struct debug_buf_count debug_count; @@ -146,6 +147,7 @@ struct msm_vidc_inst { bool ir_enabled; u32 adjust_priority; bool iframe; + u32 fw_min_count; }; #endif // _MSM_VIDC_INST_H_ diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 6e79d40e82..48018eb1b3 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -1338,8 +1338,11 @@ static int msm_vdec_read_input_subcr_params(struct msm_vidc_inst *inst) inst->fmts[OUTPUT_PORT].fmt.pix_mp.quantization; inst->buffers.output.min_count = subsc_params.fw_min_count; + inst->fw_min_count = subsc_params.fw_min_count; inst->buffers.output.extra_count = call_session_op(core, extra_count, inst, MSM_VIDC_BUF_OUTPUT); + inst->buffers.output_meta.min_count = inst->buffers.output.min_count; + inst->buffers.output_meta.extra_count = inst->buffers.output.extra_count; if (is_thumbnail_session(inst) && inst->codec != MSM_VIDC_VP9) { if (inst->buffers.output.min_count != 1) { i_vpr_e(inst, "%s: invalid min count %d in thumbnail case\n", @@ -1448,7 +1451,7 @@ int msm_vdec_streamon_input(struct msm_vidc_inst *inst) if (rc) goto error; - rc = msm_vidc_adjust_set_v4l2_properties(inst); + rc = msm_vidc_set_v4l2_properties(inst); if (rc) goto error; @@ -2692,6 +2695,7 @@ int msm_vdec_inst_init(struct msm_vidc_inst *inst) inst->buffers.output.extra_count; inst->buffers.output.size = f->fmt.pix_mp.plane_fmt[0].sizeimage; inst->max_map_output_count = MAX_MAP_OUTPUT_COUNT; + inst->fw_min_count = 0; f = &inst->fmts[OUTPUT_META_PORT]; f->type = OUTPUT_META_PLANE; diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index 2cbc85a365..e5d3c9639d 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -1067,7 +1067,7 @@ int msm_venc_streamon_output(struct msm_vidc_inst *inst) if (rc) goto error; - rc = msm_vidc_adjust_set_v4l2_properties(inst); + rc = msm_vidc_set_v4l2_properties(inst); if (rc) goto error; diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index 822289ed50..2dd690e433 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -922,6 +922,7 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) inst->request = false; inst->ipsc_properties_set = false; inst->opsc_properties_set = false; + inst->caps_list_prepared = false; inst->has_bframe = false; inst->iframe = false; inst->auto_framerate = DEFAULT_FPS << 16; diff --git a/driver/vidc/src/msm_vidc_buffer.c b/driver/vidc/src/msm_vidc_buffer.c index b9018307ce..af6d802ecb 100644 --- a/driver/vidc/src/msm_vidc_buffer.c +++ b/driver/vidc/src/msm_vidc_buffer.c @@ -65,6 +65,9 @@ u32 msm_vidc_output_min_count(struct msm_vidc_inst *inst) return 1; if (is_decode_session(inst)) { + if (inst->fw_min_count) + return inst->fw_min_count; + switch (inst->codec) { case MSM_VIDC_H264: case MSM_VIDC_HEVC: diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 31bf14d39b..2b852ace9d 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -1049,11 +1049,7 @@ error: return rc; } -/* - * Loop over instance capabilities from caps_list - * and call adjust and set function - */ -int msm_vidc_adjust_set_v4l2_properties(struct msm_vidc_inst *inst) +int msm_vidc_adjust_v4l2_properties(struct msm_vidc_inst *inst) { struct msm_vidc_inst_cap_entry *entry = NULL, *temp = NULL; int rc = 0; @@ -1074,6 +1070,20 @@ int msm_vidc_adjust_set_v4l2_properties(struct msm_vidc_inst *inst) return rc; } + return rc; +} + +int msm_vidc_set_v4l2_properties(struct msm_vidc_inst *inst) +{ + struct msm_vidc_inst_cap_entry *entry = NULL, *temp = NULL; + int rc = 0; + + if (!inst || !inst->capabilities) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + i_vpr_h(inst, "%s()\n", __func__); + /* set all caps from caps_list */ list_for_each_entry_safe(entry, temp, &inst->caps_list, list) { rc = msm_vidc_set_cap(inst, entry->cap_id, __func__); diff --git a/driver/vidc/src/msm_vidc_vb2.c b/driver/vidc/src/msm_vidc_vb2.c index 9b48eb8a2f..d3c25c7f96 100644 --- a/driver/vidc/src/msm_vidc_vb2.c +++ b/driver/vidc/src/msm_vidc_vb2.c @@ -247,6 +247,7 @@ int msm_vb2_queue_setup(struct vb2_queue *q, enum msm_vidc_buffer_type buffer_type = 0; enum msm_vidc_buffer_region region = MSM_VIDC_REGION_NONE; struct context_bank_info *cb = NULL; + struct msm_vidc_buffers *buffers; if (!q || !num_buffers || !num_planes || !sizes || !q->drv_priv) { @@ -270,6 +271,24 @@ int msm_vb2_queue_setup(struct vb2_queue *q, if (port < 0) return -EINVAL; + /* prepare dependency list once per session */ + if (!inst->caps_list_prepared) { + rc = msm_vidc_prepare_dependency_list(inst); + if (rc) + return rc; + inst->caps_list_prepared = true; + } + + /* adjust v4l2 properties for master port */ + if ((is_encode_session(inst) && port == OUTPUT_PORT) || + (is_decode_session(inst) && port == INPUT_PORT)) { + rc = msm_vidc_adjust_v4l2_properties(inst); + if (rc) { + i_vpr_e(inst, "%s: failed to adjust properties\n", __func__); + return rc; + } + } + if (*num_planes && (port == INPUT_PORT || port == OUTPUT_PORT)) { f = &inst->fmts[port]; if (*num_planes != f->fmt.pix_mp.num_planes) { @@ -295,44 +314,26 @@ int msm_vb2_queue_setup(struct vb2_queue *q, return rc; } - if (port == INPUT_PORT) { - *num_planes = 1; - if (*num_buffers < inst->buffers.input.min_count + - inst->buffers.input.extra_count) - *num_buffers = inst->buffers.input.min_count + - inst->buffers.input.extra_count; - inst->buffers.input.actual_count = *num_buffers; + buffers = msm_vidc_get_buffers(inst, buffer_type, __func__); + if (!buffers) + return -EINVAL; - } else if (port == INPUT_META_PORT) { - *num_planes = 1; - if (*num_buffers < inst->buffers.input_meta.min_count + - inst->buffers.input_meta.extra_count) - *num_buffers = inst->buffers.input_meta.min_count + - inst->buffers.input_meta.extra_count; - inst->buffers.input_meta.actual_count = *num_buffers; - - } else if (port == OUTPUT_PORT) { - *num_planes = 1; - if (*num_buffers < inst->buffers.output.min_count + - inst->buffers.output.extra_count) - *num_buffers = inst->buffers.output.min_count + - inst->buffers.output.extra_count; - inst->buffers.output.actual_count = *num_buffers; - - } else if (port == OUTPUT_META_PORT) { - *num_planes = 1; - if (*num_buffers < inst->buffers.output_meta.min_count + - inst->buffers.output_meta.extra_count) - *num_buffers = inst->buffers.output_meta.min_count + - inst->buffers.output_meta.extra_count; - inst->buffers.output_meta.actual_count = *num_buffers; - } + buffers->min_count = call_session_op(core, min_count, inst, buffer_type); + buffers->extra_count = call_session_op(core, extra_count, inst, buffer_type); + if (*num_buffers < buffers->min_count + buffers->extra_count) + *num_buffers = buffers->min_count + buffers->extra_count; + buffers->actual_count = *num_buffers; + *num_planes = 1; + buffers->size = call_session_op(core, buffer_size, inst, buffer_type); if (port == INPUT_PORT || port == OUTPUT_PORT) { + inst->fmts[port].fmt.pix_mp.plane_fmt[0].sizeimage = buffers->size; sizes[0] = inst->fmts[port].fmt.pix_mp.plane_fmt[0].sizeimage; } else if (port == OUTPUT_META_PORT) { + inst->fmts[port].fmt.meta.buffersize = buffers->size; sizes[0] = inst->fmts[port].fmt.meta.buffersize; } else if (port == INPUT_META_PORT) { + inst->fmts[port].fmt.meta.buffersize = buffers->size; if (inst->capabilities->cap[SUPER_FRAME].value) sizes[0] = inst->capabilities->cap[SUPER_FRAME].value * inst->fmts[port].fmt.meta.buffersize; @@ -428,10 +429,6 @@ int msm_vidc_start_streaming(struct msm_vidc_inst *inst, struct vb2_queue *q) if (!inst->once_per_session_set) { inst->once_per_session_set = true; - rc = msm_vidc_prepare_dependency_list(inst); - if (rc) - return rc; - rc = msm_vidc_session_set_codec(inst); if (rc) return rc; From 78c90f4173600880643ef3050581fe80fa756df6 Mon Sep 17 00:00:00 2001 From: Maheshwar Ajja Date: Fri, 23 Dec 2022 11:20:26 -0800 Subject: [PATCH 0874/1061] video: driver: set QOS registers Move Qos register programming to driver. Use reset_control_acquire api to ensure xo clk is on before programming Change-Id: I52bf416da42675d206e1124368f75f627b8b2e9f Signed-off-by: Maheshwar Ajja --- .../pineapple/src/msm_vidc_pineapple.c | 13 +++++++- driver/variant/common/src/msm_vidc_variant.c | 4 +-- driver/variant/iris33/src/msm_vidc_iris33.c | 31 +++++++++++++++++++ 3 files changed, 45 insertions(+), 3 deletions(-) diff --git a/driver/platform/pineapple/src/msm_vidc_pineapple.c b/driver/platform/pineapple/src/msm_vidc_pineapple.c index d3302657b9..7dd723bf32 100644 --- a/driver/platform/pineapple/src/msm_vidc_pineapple.c +++ b/driver/platform/pineapple/src/msm_vidc_pineapple.c @@ -2753,7 +2753,18 @@ static struct freq_table pineapple_freq_table_v2[] = { /* register, value, mask */ static const struct reg_preset_table pineapple_reg_preset_table[] = { - { 0xB0088, 0x0, 0x11 }, + { 0xB0088, 0x0, 0x11 }, + { 0x13030, 0x33332222, 0xFFFFFFFF}, + { 0x13034, 0x44444444, 0xFFFFFFFF}, + { 0x13038, 0x1022, 0xFFFFFFFF}, + { 0x13040, 0x0, 0xFFFFFFFF}, + { 0x13048, 0xFFFF, 0xFFFFFFFF}, + { 0x13430, 0x33332222, 0xFFFFFFFF}, + { 0x13434, 0x44444444, 0xFFFFFFFF}, + { 0x13438, 0x1022, 0xFFFFFFFF}, + { 0x13440, 0x0, 0xFFFFFFFF}, + { 0x13448, 0xFFFF, 0xFFFFFFFF}, + { 0xA013C, 0x99, 0xFFFFFFFF}, }; /* name, phys_addr, size, device_addr, device region type */ diff --git a/driver/variant/common/src/msm_vidc_variant.c b/driver/variant/common/src/msm_vidc_variant.c index cc1d410719..4d2e27ab0f 100644 --- a/driver/variant/common/src/msm_vidc_variant.c +++ b/driver/variant/common/src/msm_vidc_variant.c @@ -176,8 +176,8 @@ int __set_registers(struct msm_vidc_core *core) return 0; for (cnt = 0; cnt < prst_count; cnt++) { - rc = __write_register_masked(core, reg_prst->reg, - reg_prst->value, reg_prst->mask); + rc = __write_register_masked(core, reg_prst[cnt].reg, + reg_prst[cnt].value, reg_prst[cnt].mask); if (rc) return rc; } diff --git a/driver/variant/iris33/src/msm_vidc_iris33.c b/driver/variant/iris33/src/msm_vidc_iris33.c index 9d9aee708c..cd336c49b5 100644 --- a/driver/variant/iris33/src/msm_vidc_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_iris33.c @@ -677,6 +677,7 @@ static int __power_on_iris33(struct msm_vidc_core *core) struct frequency_table *freq_tbl; u32 freq = 0; int rc = 0; + int count = 0; if (is_core_sub_state(core, CORE_SUBSTATE_POWER_ENABLE)) return 0; @@ -722,15 +723,45 @@ static int __power_on_iris33(struct msm_vidc_core *core) /* * Re-program all of the registers that get reset as a result of * regulator_disable() and _enable() + * When video module writing to QOS registers EVA module is not + * supposed to do video_xo_reset operations else we will see register + * access failure, so acquire video_xo_reset to ensure EVA module is + * not doing assert or de-assert on video_xo_reset. */ + do { + rc = call_res_op(core, reset_control_acquire, core, "video_xo_reset"); + if (!rc) { + break; + } else { + d_vpr_e( + "%s: failed to acquire video_xo_reset control, count %d\n", + __func__, count); + count++; + usleep_range(1000, 1000); + } + } while (count < 100); + + if (count >= 100) { + d_vpr_e("%s: timeout acquiring video_xo_reset\n", __func__); + goto fail_assert_xo_reset; + } + __set_registers(core); + /* release reset control for other consumers */ + rc = call_res_op(core, reset_control_release, core, "video_xo_reset"); + if (rc) { + d_vpr_e("%s: failed to release video_xo_reset reset\n", __func__); + goto fail_deassert_xo_reset; + } __interrupt_init_iris33(core); core->intr_status = 0; enable_irq(core->resource->irq); return rc; +fail_deassert_xo_reset: +fail_assert_xo_reset: fail_power_on_substate: __power_off_iris33_hardware(core); fail_power_on_hardware: From e450d8eaa3326bc0f4a5100dc4631c3220c1106c Mon Sep 17 00:00:00 2001 From: Ankush Mitra Date: Sat, 25 Mar 2023 15:36:17 +0530 Subject: [PATCH 0875/1061] video: driver: remove capability pointer Remove capability pointer and allocate memory with max cap size. Change-Id: I7f53e3b35439f91b72f057695b6e63f71bfecc0a Signed-off-by: Ankush Mitra --- .../platform/common/src/msm_vidc_platform.c | 676 ++++++++---------- .../common/src/msm_vidc_platform_ext.c | 48 +- .../pineapple/src/msm_vidc_pineapple.c | 10 +- driver/platform/pineapple/src/pineapple.c | 10 +- .../variant/iris2/src/msm_vidc_buffer_iris2.c | 42 +- driver/variant/iris2/src/msm_vidc_iris2.c | 36 +- .../variant/iris2/src/msm_vidc_power_iris2.c | 50 +- .../variant/iris3/src/msm_vidc_buffer_iris3.c | 72 +- driver/variant/iris3/src/msm_vidc_iris3.c | 50 +- .../variant/iris3/src/msm_vidc_power_iris3.c | 80 +-- .../iris33/src/msm_vidc_buffer_iris33.c | 74 +- driver/variant/iris33/src/msm_vidc_iris33.c | 50 +- .../iris33/src/msm_vidc_power_iris33.c | 98 +-- driver/vidc/inc/msm_vidc_driver.h | 52 +- driver/vidc/inc/msm_vidc_inst.h | 2 +- driver/vidc/src/msm_vdec.c | 102 ++- driver/vidc/src/msm_venc.c | 73 +- driver/vidc/src/msm_vidc.c | 43 +- driver/vidc/src/msm_vidc_buffer.c | 30 +- driver/vidc/src/msm_vidc_control.c | 135 ++-- driver/vidc/src/msm_vidc_debug.c | 5 +- driver/vidc/src/msm_vidc_driver.c | 245 ++++--- driver/vidc/src/msm_vidc_power.c | 18 +- driver/vidc/src/msm_vidc_state.c | 6 +- driver/vidc/src/msm_vidc_vb2.c | 6 +- driver/vidc/src/venus_hfi.c | 16 +- driver/vidc/src/venus_hfi_response.c | 48 +- 27 files changed, 955 insertions(+), 1122 deletions(-) diff --git a/driver/platform/common/src/msm_vidc_platform.c b/driver/platform/common/src/msm_vidc_platform.c index 874c6e1bee..574834f18f 100644 --- a/driver/platform/common/src/msm_vidc_platform.c +++ b/driver/platform/common/src/msm_vidc_platform.c @@ -496,13 +496,12 @@ enum msm_vidc_inst_capability_type msm_vidc_get_cap_id( struct msm_vidc_inst *inst, u32 id) { enum msm_vidc_inst_capability_type i = INST_CAP_NONE + 1; - struct msm_vidc_inst_capability *capability; + enum msm_vidc_inst_capability_type cap_id = INST_CAP_NONE; - capability = inst->capabilities; do { - if (capability->cap[i].v4l2_id == id) { - cap_id = capability->cap[i].cap_id; + if (inst->capabilities[i].v4l2_id == id) { + cap_id = inst->capabilities[i].cap_id; break; } i++; @@ -516,12 +515,12 @@ int msm_vidc_update_cap_value(struct msm_vidc_inst *inst, u32 cap_id, { int prev_value = 0; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - prev_value = inst->capabilities->cap[cap_id].value; + prev_value = inst->capabilities[cap_id].value; if (is_meta_cap(inst, cap_id)) { if (adjusted_val & MSM_VIDC_META_ENABLE && @@ -538,20 +537,20 @@ int msm_vidc_update_cap_value(struct msm_vidc_inst *inst, u32 cap_id, if (adjusted_val & MSM_VIDC_META_ENABLE || adjusted_val & MSM_VIDC_META_DYN_ENABLE) { /* enable metadata */ - inst->capabilities->cap[cap_id].value |= adjusted_val; + inst->capabilities[cap_id].value |= adjusted_val; } else { /* disable metadata */ - inst->capabilities->cap[cap_id].value &= ~adjusted_val; + inst->capabilities[cap_id].value &= ~adjusted_val; } } else { - inst->capabilities->cap[cap_id].value = adjusted_val; + inst->capabilities[cap_id].value = adjusted_val; } - if (prev_value != inst->capabilities->cap[cap_id].value) { + if (prev_value != inst->capabilities[cap_id].value) { i_vpr_h(inst, "%s: updated database: name: %s, value: %#x -> %#x\n", func, cap_name(cap_id), - prev_value, inst->capabilities->cap[cap_id].value); + prev_value, inst->capabilities[cap_id].value); } return 0; @@ -567,8 +566,8 @@ bool is_parent_available(struct msm_vidc_inst *inst, return false; while (i < MAX_CAP_CHILDREN && - inst->capabilities->cap[check_parent].children[i]) { - cap_child = inst->capabilities->cap[check_parent].children[i]; + inst->capabilities[check_parent].children[i]) { + cap_child = inst->capabilities[check_parent].children[i]; if (cap_child == cap_id) return true; i++; @@ -594,7 +593,7 @@ int msm_vidc_get_parent_value(struct msm_vidc_inst *inst, *value = inst->hfi_layer_type; break; default: - *value = inst->capabilities->cap[parent].value; + *value = inst->capabilities[parent].value; break; } } else { @@ -607,19 +606,17 @@ int msm_vidc_get_parent_value(struct msm_vidc_inst *inst, u32 msm_vidc_get_port_info(struct msm_vidc_inst *inst, enum msm_vidc_inst_capability_type cap_id) { - struct msm_vidc_inst_capability *capability = inst->capabilities; - - if (capability->cap[cap_id].flags & CAP_FLAG_INPUT_PORT && - capability->cap[cap_id].flags & CAP_FLAG_OUTPUT_PORT) { + if (inst->capabilities[cap_id].flags & CAP_FLAG_INPUT_PORT && + inst->capabilities[cap_id].flags & CAP_FLAG_OUTPUT_PORT) { if (inst->bufq[OUTPUT_PORT].vb2q->streaming) return get_hfi_port(inst, INPUT_PORT); else return get_hfi_port(inst, OUTPUT_PORT); } - if (capability->cap[cap_id].flags & CAP_FLAG_INPUT_PORT) + if (inst->capabilities[cap_id].flags & CAP_FLAG_INPUT_PORT) return get_hfi_port(inst, INPUT_PORT); - else if (capability->cap[cap_id].flags & CAP_FLAG_OUTPUT_PORT) + else if (inst->capabilities[cap_id].flags & CAP_FLAG_OUTPUT_PORT) return get_hfi_port(inst, OUTPUT_PORT); else return HFI_PORT_NONE; @@ -628,11 +625,9 @@ u32 msm_vidc_get_port_info(struct msm_vidc_inst *inst, int msm_vidc_v4l2_menu_to_hfi(struct msm_vidc_inst *inst, enum msm_vidc_inst_capability_type cap_id, u32 *value) { - struct msm_vidc_inst_capability *capability = inst->capabilities; - switch (cap_id) { case ENTROPY_MODE: - switch (capability->cap[cap_id].value) { + switch (inst->capabilities[cap_id].value) { case V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC: *value = 1; break; @@ -647,23 +642,21 @@ int msm_vidc_v4l2_menu_to_hfi(struct msm_vidc_inst *inst, default: i_vpr_e(inst, "%s: mapping not specified for ctrl_id: %#x\n", - __func__, capability->cap[cap_id].v4l2_id); + __func__, inst->capabilities[cap_id].v4l2_id); return -EINVAL; } set_default: i_vpr_e(inst, "%s: invalid value %d for ctrl id: %#x. Set default: %u\n", - __func__, capability->cap[cap_id].value, - capability->cap[cap_id].v4l2_id, *value); + __func__, inst->capabilities[cap_id].value, + inst->capabilities[cap_id].v4l2_id, *value); return 0; } int msm_vidc_v4l2_to_hfi_enum(struct msm_vidc_inst *inst, enum msm_vidc_inst_capability_type cap_id, u32 *value) { - struct msm_vidc_inst_capability *capability = inst->capabilities; - switch (cap_id) { case BITRATE_MODE: *value = inst->hfi_rc_type; @@ -673,11 +666,11 @@ int msm_vidc_v4l2_to_hfi_enum(struct msm_vidc_inst *inst, case HEVC_TIER: case AV1_TIER: case BLUR_TYPES: - *value = capability->cap[cap_id].value; + *value = inst->capabilities[cap_id].value; return 0; case LAYER_TYPE: if (inst->codec == MSM_VIDC_HEVC) { - switch (capability->cap[cap_id].value) { + switch (inst->capabilities[cap_id].value) { case V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B: *value = HFI_HIER_B; break; @@ -692,7 +685,7 @@ int msm_vidc_v4l2_to_hfi_enum(struct msm_vidc_inst *inst, } return 0; case ROTATION: - switch (capability->cap[cap_id].value) { + switch (inst->capabilities[cap_id].value) { case 0: *value = HFI_ROTATION_NONE; break; @@ -712,7 +705,7 @@ int msm_vidc_v4l2_to_hfi_enum(struct msm_vidc_inst *inst, return 0; case LF_MODE: if (inst->codec == MSM_VIDC_HEVC) { - switch (capability->cap[cap_id].value) { + switch (inst->capabilities[cap_id].value) { case V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_ENABLED: *value = HFI_DEBLOCK_ALL_BOUNDARY; break; @@ -727,7 +720,7 @@ int msm_vidc_v4l2_to_hfi_enum(struct msm_vidc_inst *inst, goto set_default; } } else if (inst->codec == MSM_VIDC_H264) { - switch (capability->cap[cap_id].value) { + switch (inst->capabilities[cap_id].value) { case V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED: *value = HFI_DEBLOCK_ALL_BOUNDARY; break; @@ -744,7 +737,7 @@ int msm_vidc_v4l2_to_hfi_enum(struct msm_vidc_inst *inst, } return 0; case NAL_LENGTH_FIELD: - switch (capability->cap[cap_id].value) { + switch (inst->capabilities[cap_id].value) { case V4L2_MPEG_VIDEO_HEVC_SIZE_4: *value = HFI_NAL_LENGTH_SIZE_4; break; @@ -756,15 +749,15 @@ int msm_vidc_v4l2_to_hfi_enum(struct msm_vidc_inst *inst, default: i_vpr_e(inst, "%s: mapping not specified for ctrl_id: %#x\n", - __func__, capability->cap[cap_id].v4l2_id); + __func__, inst->capabilities[cap_id].v4l2_id); return -EINVAL; } set_default: i_vpr_e(inst, "%s: invalid value %d for ctrl id: %#x. Set default: %u\n", - __func__, capability->cap[cap_id].value, - capability->cap[cap_id].v4l2_id, *value); + __func__, inst->capabilities[cap_id].value, + inst->capabilities[cap_id].v4l2_id, *value); return 0; } @@ -789,10 +782,10 @@ int msm_vidc_packetize_control(struct msm_vidc_inst *inst, payload = *(u16 *)hfi_val; i_vpr_h(inst, FMT_STRING_SET_CAP, - cap_name(cap_id), inst->capabilities->cap[cap_id].value, payload); + cap_name(cap_id), inst->capabilities[cap_id].value, payload); rc = venus_hfi_session_property(inst, - inst->capabilities->cap[cap_id].hfi_id, + inst->capabilities[cap_id].hfi_id, HFI_HOST_FLAGS_NONE, msm_vidc_get_port_info(inst, cap_id), payload_type, @@ -813,20 +806,18 @@ int msm_vidc_packetize_control(struct msm_vidc_inst *inst, int msm_vidc_adjust_entropy_mode(void *instance, struct v4l2_ctrl *ctrl) { - struct msm_vidc_inst_capability *capability; s32 adjusted_value; struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; s32 profile = -1; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - capability = inst->capabilities; /* ctrl is always NULL in streamon case */ adjusted_value = ctrl ? ctrl->val : - capability->cap[ENTROPY_MODE].value; + inst->capabilities[ENTROPY_MODE].value; if (inst->codec != MSM_VIDC_H264) { i_vpr_e(inst, @@ -851,21 +842,19 @@ int msm_vidc_adjust_entropy_mode(void *instance, struct v4l2_ctrl *ctrl) int msm_vidc_adjust_bitrate_mode(void *instance, struct v4l2_ctrl *ctrl) { - struct msm_vidc_inst_capability *capability; struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; int lossless, frame_rc, bitrate_mode, frame_skip; u32 hfi_value = 0; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - capability = inst->capabilities; - bitrate_mode = capability->cap[BITRATE_MODE].value; - lossless = capability->cap[LOSSLESS].value; - frame_rc = capability->cap[FRAME_RC_ENABLE].value; - frame_skip = capability->cap[FRAME_SKIP_MODE].value; + bitrate_mode = inst->capabilities[BITRATE_MODE].value; + lossless = inst->capabilities[LOSSLESS].value; + frame_rc = inst->capabilities[FRAME_RC_ENABLE].value; + frame_skip = inst->capabilities[FRAME_SKIP_MODE].value; if (lossless || (msm_vidc_lossless_encode && inst->codec == MSM_VIDC_HEVC)) { @@ -899,18 +888,16 @@ update: int msm_vidc_adjust_profile(void *instance, struct v4l2_ctrl *ctrl) { - struct msm_vidc_inst_capability *capability; s32 adjusted_value; struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; s32 pix_fmt = -1; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - capability = inst->capabilities; - adjusted_value = ctrl ? ctrl->val : capability->cap[PROFILE].value; + adjusted_value = ctrl ? ctrl->val : inst->capabilities[PROFILE].value; /* PIX_FMTS dependency is common across all chipsets. * Hence, PIX_FMTS must be specified as Parent for HEVC profile. @@ -942,20 +929,18 @@ int msm_vidc_adjust_profile(void *instance, struct v4l2_ctrl *ctrl) int msm_vidc_adjust_ltr_count(void *instance, struct v4l2_ctrl *ctrl) { - struct msm_vidc_inst_capability *capability; s32 adjusted_value; struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; s32 rc_type = -1, all_intra = 0, pix_fmts = MSM_VIDC_FMT_NONE; s32 layer_type = -1, enh_layer_count = -1; u32 num_ref_frames = 0, max_exceeding_ref_frames = 0; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - capability = inst->capabilities; - adjusted_value = ctrl ? ctrl->val : capability->cap[LTR_COUNT].value; + adjusted_value = ctrl ? ctrl->val : inst->capabilities[LTR_COUNT].value; if (msm_vidc_get_parent_value(inst, LTR_COUNT, BITRATE_MODE, &rc_type, __func__)) @@ -993,7 +978,7 @@ int msm_vidc_adjust_ltr_count(void *instance, struct v4l2_ctrl *ctrl) &layer_type, __func__)) { if (layer_type == HFI_HIER_P_SLIDING_WINDOW) { SLIDING_WINDOW_REF_FRAMES(inst->codec, - inst->capabilities->cap[ENH_LAYER_COUNT].value + 1, + inst->capabilities[ENH_LAYER_COUNT].value + 1, adjusted_value, num_ref_frames); if (num_ref_frames > MAX_ENCODING_REFERNCE_FRAMES) { /* @@ -1011,7 +996,7 @@ int msm_vidc_adjust_ltr_count(void *instance, struct v4l2_ctrl *ctrl) i_vpr_h(inst, "%s: ltr count %d enh_layers %d layer_type %d\n", __func__, adjusted_value, - inst->capabilities->cap[ENH_LAYER_COUNT].value, + inst->capabilities[ENH_LAYER_COUNT].value, layer_type); } @@ -1023,17 +1008,15 @@ exit: int msm_vidc_adjust_use_ltr(void *instance, struct v4l2_ctrl *ctrl) { - struct msm_vidc_inst_capability *capability; s32 adjusted_value, ltr_count; struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - capability = inst->capabilities; - adjusted_value = ctrl ? ctrl->val : capability->cap[USE_LTR].value; + adjusted_value = ctrl ? ctrl->val : inst->capabilities[USE_LTR].value; /* * Since USE_LTR is only set dynamically, and LTR_COUNT is static @@ -1041,7 +1024,7 @@ int msm_vidc_adjust_use_ltr(void *instance, struct v4l2_ctrl *ctrl) * LTR_COUNT value will always be updated when dynamically USE_LTR * is set */ - ltr_count = capability->cap[LTR_COUNT].value; + ltr_count = inst->capabilities[LTR_COUNT].value; if (!ltr_count) return 0; @@ -1065,17 +1048,15 @@ int msm_vidc_adjust_use_ltr(void *instance, struct v4l2_ctrl *ctrl) int msm_vidc_adjust_mark_ltr(void *instance, struct v4l2_ctrl *ctrl) { - struct msm_vidc_inst_capability *capability; s32 adjusted_value, ltr_count; struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - capability = inst->capabilities; - adjusted_value = ctrl ? ctrl->val : capability->cap[MARK_LTR].value; + adjusted_value = ctrl ? ctrl->val : inst->capabilities[MARK_LTR].value; /* * Since MARK_LTR is only set dynamically, and LTR_COUNT is static @@ -1083,7 +1064,7 @@ int msm_vidc_adjust_mark_ltr(void *instance, struct v4l2_ctrl *ctrl) * LTR_COUNT value will always be updated when dynamically MARK_LTR * is set */ - ltr_count = capability->cap[LTR_COUNT].value; + ltr_count = inst->capabilities[LTR_COUNT].value; if (!ltr_count) return 0; @@ -1103,19 +1084,17 @@ int msm_vidc_adjust_mark_ltr(void *instance, struct v4l2_ctrl *ctrl) int msm_vidc_adjust_delta_based_rc(void *instance, struct v4l2_ctrl *ctrl) { - struct msm_vidc_inst_capability *capability; s32 adjusted_value; struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; s32 rc_type = -1; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - capability = inst->capabilities; adjusted_value = ctrl ? ctrl->val : - capability->cap[TIME_DELTA_BASED_RC].value; + inst->capabilities[TIME_DELTA_BASED_RC].value; if (msm_vidc_get_parent_value(inst, TIME_DELTA_BASED_RC, BITRATE_MODE, &rc_type, __func__)) @@ -1134,18 +1113,17 @@ int msm_vidc_adjust_delta_based_rc(void *instance, struct v4l2_ctrl *ctrl) int msm_vidc_adjust_output_order(void *instance, struct v4l2_ctrl *ctrl) { struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - struct msm_vidc_inst_capability *capability; + s32 tn_mode = -1, display_delay = -1, display_delay_enable = -1; u32 adjusted_value; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - capability = inst->capabilities; adjusted_value = ctrl ? ctrl->val : - capability->cap[OUTPUT_ORDER].value; + inst->capabilities[OUTPUT_ORDER].value; if (msm_vidc_get_parent_value(inst, OUTPUT_ORDER, DISPLAY_DELAY, &display_delay, __func__) || @@ -1174,17 +1152,16 @@ int msm_vidc_adjust_output_order(void *instance, struct v4l2_ctrl *ctrl) int msm_vidc_adjust_input_buf_host_max_count(void *instance, struct v4l2_ctrl *ctrl) { struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - struct msm_vidc_inst_capability *capability; + u32 adjusted_value; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - capability = inst->capabilities; adjusted_value = ctrl ? ctrl->val : - capability->cap[INPUT_BUF_HOST_MAX_COUNT].value; + inst->capabilities[INPUT_BUF_HOST_MAX_COUNT].value; if (msm_vidc_is_super_buffer(inst) || is_image_session(inst)) adjusted_value = DEFAULT_MAX_HOST_BURST_BUF_COUNT; @@ -1198,17 +1175,16 @@ int msm_vidc_adjust_input_buf_host_max_count(void *instance, struct v4l2_ctrl *c int msm_vidc_adjust_output_buf_host_max_count(void *instance, struct v4l2_ctrl *ctrl) { struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - struct msm_vidc_inst_capability *capability; + u32 adjusted_value; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - capability = inst->capabilities; adjusted_value = ctrl ? ctrl->val : - capability->cap[OUTPUT_BUF_HOST_MAX_COUNT].value; + inst->capabilities[OUTPUT_BUF_HOST_MAX_COUNT].value; if (msm_vidc_is_super_buffer(inst) || is_image_session(inst) || is_enc_slice_delivery_mode(inst)) @@ -1222,19 +1198,17 @@ int msm_vidc_adjust_output_buf_host_max_count(void *instance, struct v4l2_ctrl * int msm_vidc_adjust_transform_8x8(void *instance, struct v4l2_ctrl *ctrl) { - struct msm_vidc_inst_capability *capability; s32 adjusted_value; struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; s32 profile = -1; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - capability = inst->capabilities; adjusted_value = ctrl ? ctrl->val : - capability->cap[TRANSFORM_8X8].value; + inst->capabilities[TRANSFORM_8X8].value; if (inst->codec != MSM_VIDC_H264) { i_vpr_e(inst, @@ -1260,18 +1234,16 @@ int msm_vidc_adjust_transform_8x8(void *instance, struct v4l2_ctrl *ctrl) int msm_vidc_adjust_chroma_qp_index_offset(void *instance, struct v4l2_ctrl *ctrl) { - struct msm_vidc_inst_capability *capability; s32 adjusted_value; struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - capability = inst->capabilities; adjusted_value = ctrl ? ctrl->val : - capability->cap[CHROMA_QP_INDEX_OFFSET].value; + inst->capabilities[CHROMA_QP_INDEX_OFFSET].value; if (adjusted_value != MIN_CHROMA_QP_OFFSET) adjusted_value = MAX_CHROMA_QP_OFFSET; @@ -1288,13 +1260,13 @@ static bool msm_vidc_check_all_layer_bitrate_set(struct msm_vidc_inst *inst) u32 cap_id = 0, i, enh_layer_count; u32 layer_br_caps[6] = {L0_BR, L1_BR, L2_BR, L3_BR, L4_BR, L5_BR}; - enh_layer_count = inst->capabilities->cap[ENH_LAYER_COUNT].value; + enh_layer_count = inst->capabilities[ENH_LAYER_COUNT].value; for (i = 0; i <= enh_layer_count; i++) { if (i >= ARRAY_SIZE(layer_br_caps)) break; cap_id = layer_br_caps[i]; - if (!(inst->capabilities->cap[cap_id].flags & CAP_FLAG_CLIENT_SET)) { + if (!(inst->capabilities[cap_id].flags & CAP_FLAG_CLIENT_SET)) { layer_bitrate_set = false; break; } @@ -1311,13 +1283,13 @@ static u32 msm_vidc_get_cumulative_bitrate(struct msm_vidc_inst *inst) s32 enh_layer_count; u32 layer_br_caps[6] = {L0_BR, L1_BR, L2_BR, L3_BR, L4_BR, L5_BR}; - enh_layer_count = inst->capabilities->cap[ENH_LAYER_COUNT].value; + enh_layer_count = inst->capabilities[ENH_LAYER_COUNT].value; for (i = 0; i <= enh_layer_count; i++) { if (i >= ARRAY_SIZE(layer_br_caps)) break; cap_id = layer_br_caps[i]; - cumulative_br += inst->capabilities->cap[cap_id].value; + cumulative_br += inst->capabilities[cap_id].value; } return cumulative_br; @@ -1326,7 +1298,7 @@ static u32 msm_vidc_get_cumulative_bitrate(struct msm_vidc_inst *inst) int msm_vidc_adjust_slice_count(void *instance, struct v4l2_ctrl *ctrl) { struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - struct msm_vidc_inst_capability *capability; + struct v4l2_format *output_fmt; s32 adjusted_value, rc_type = -1, slice_mode, all_intra = 0, enh_layer_count = 0; @@ -1334,14 +1306,13 @@ int msm_vidc_adjust_slice_count(void *instance, struct v4l2_ctrl *ctrl) u32 update_cap, max_avg_slicesize, output_width, output_height; u32 min_width, min_height, max_width, max_height, fps; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - capability = inst->capabilities; slice_mode = ctrl ? ctrl->val : - capability->cap[SLICE_MODE].value; + inst->capabilities[SLICE_MODE].value; if (slice_mode == V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE) return 0; @@ -1352,8 +1323,8 @@ int msm_vidc_adjust_slice_count(void *instance, struct v4l2_ctrl *ctrl) ENH_LAYER_COUNT, &enh_layer_count, __func__)) return -EINVAL; - if (capability->cap[BIT_RATE].flags & CAP_FLAG_CLIENT_SET) { - bitrate = capability->cap[BIT_RATE].value; + if (inst->capabilities[BIT_RATE].flags & CAP_FLAG_CLIENT_SET) { + bitrate = inst->capabilities[BIT_RATE].value; } else if (!msm_vidc_get_parent_value(inst, SLICE_MODE, ENH_LAYER_COUNT, &enh_layer_count, __func__) && msm_vidc_check_all_layer_bitrate_set(inst)) { @@ -1367,7 +1338,7 @@ int msm_vidc_adjust_slice_count(void *instance, struct v4l2_ctrl *ctrl) goto exit; } - fps = capability->cap[FRAME_RATE].value >> 16; + fps = inst->capabilities[FRAME_RATE].value >> 16; if (fps > MAX_SLICES_FRAME_RATE || (rc_type != HFI_RC_OFF && rc_type != HFI_RC_CBR_CFR && @@ -1441,10 +1412,10 @@ int msm_vidc_adjust_slice_count(void *instance, struct v4l2_ctrl *ctrl) if (slice_mode == V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_MB) { update_cap = SLICE_MAX_MB; - slice_val = capability->cap[SLICE_MAX_MB].value; + slice_val = inst->capabilities[SLICE_MAX_MB].value; slice_val = max(slice_val, mbpf / MAX_SLICES_PER_FRAME); } else { - slice_val = capability->cap[SLICE_MAX_BYTES].value; + slice_val = inst->capabilities[SLICE_MAX_BYTES].value; update_cap = SLICE_MAX_BYTES; if (rc_type != HFI_RC_OFF) { max_avg_slicesize = ((bitrate / fps) / 8) / @@ -1466,7 +1437,7 @@ static int msm_vidc_adjust_static_layer_count_and_type(struct msm_vidc_inst *ins { bool hb_requested = false; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -1483,16 +1454,16 @@ static int msm_vidc_adjust_static_layer_count_and_type(struct msm_vidc_inst *ins } if (inst->codec == MSM_VIDC_H264) { - if (!inst->capabilities->cap[LAYER_ENABLE].value) { + if (!inst->capabilities[LAYER_ENABLE].value) { layer_count = 0; goto exit; } - hb_requested = (inst->capabilities->cap[LAYER_TYPE].value == + hb_requested = (inst->capabilities[LAYER_TYPE].value == V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_B) ? true : false; } else if (inst->codec == MSM_VIDC_HEVC) { - hb_requested = (inst->capabilities->cap[LAYER_TYPE].value == + hb_requested = (inst->capabilities[LAYER_TYPE].value == V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B) ? true : false; } @@ -1541,25 +1512,24 @@ static int msm_vidc_adjust_static_layer_count_and_type(struct msm_vidc_inst *ins exit: msm_vidc_update_cap_value(inst, ENH_LAYER_COUNT, layer_count, __func__); - inst->capabilities->cap[ENH_LAYER_COUNT].max = layer_count; + inst->capabilities[ENH_LAYER_COUNT].max = layer_count; return 0; } int msm_vidc_adjust_layer_count(void *instance, struct v4l2_ctrl *ctrl) { int rc = 0; - struct msm_vidc_inst_capability *capability; + s32 client_layer_count; struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - capability = inst->capabilities; client_layer_count = ctrl ? ctrl->val : - capability->cap[ENH_LAYER_COUNT].value; + inst->capabilities[ENH_LAYER_COUNT].value; if (!is_parent_available(inst, ENH_LAYER_COUNT, BITRATE_MODE, __func__)) @@ -1583,9 +1553,9 @@ int msm_vidc_adjust_layer_count(void *instance, struct v4l2_ctrl *ctrl) inst->hfi_layer_type == HFI_HIER_P_SLIDING_WINDOW) { /* dynamic layer count change is only supported for HP */ if (client_layer_count > - inst->capabilities->cap[ENH_LAYER_COUNT].max) + inst->capabilities[ENH_LAYER_COUNT].max) client_layer_count = - inst->capabilities->cap[ENH_LAYER_COUNT].max; + inst->capabilities[ENH_LAYER_COUNT].max; msm_vidc_update_cap_value(inst, ENH_LAYER_COUNT, client_layer_count, __func__); @@ -1598,18 +1568,16 @@ exit: int msm_vidc_adjust_gop_size(void *instance, struct v4l2_ctrl *ctrl) { - struct msm_vidc_inst_capability *capability; struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; s32 adjusted_value, enh_layer_count = -1; u32 min_gop_size, num_subgops; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - capability = inst->capabilities; - adjusted_value = ctrl ? ctrl->val : capability->cap[GOP_SIZE].value; + adjusted_value = ctrl ? ctrl->val : inst->capabilities[GOP_SIZE].value; if (msm_vidc_get_parent_value(inst, GOP_SIZE, ENH_LAYER_COUNT, &enh_layer_count, __func__)) @@ -1639,18 +1607,16 @@ exit: int msm_vidc_adjust_b_frame(void *instance, struct v4l2_ctrl *ctrl) { - struct msm_vidc_inst_capability *capability; struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; s32 adjusted_value, enh_layer_count = -1; const u32 max_bframe_size = 7; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - capability = inst->capabilities; - adjusted_value = ctrl ? ctrl->val : capability->cap[B_FRAME].value; + adjusted_value = ctrl ? ctrl->val : inst->capabilities[B_FRAME].value; if (msm_vidc_get_parent_value(inst, B_FRAME, ENH_LAYER_COUNT, &enh_layer_count, __func__)) @@ -1675,27 +1641,26 @@ int msm_vidc_adjust_bitrate(void *instance, struct v4l2_ctrl *ctrl) { int i, rc = 0; struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - struct msm_vidc_inst_capability *capability; + s32 adjusted_value, enh_layer_count; u32 cumulative_bitrate = 0, cap_id = 0, cap_value = 0; u32 layer_br_caps[6] = {L0_BR, L1_BR, L2_BR, L3_BR, L4_BR, L5_BR}; u32 max_bitrate = 0; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - capability = inst->capabilities; /* ignore layer bitrate when total bitrate is set */ - if (capability->cap[BIT_RATE].flags & CAP_FLAG_CLIENT_SET) { + if (inst->capabilities[BIT_RATE].flags & CAP_FLAG_CLIENT_SET) { /* * For static case, ctrl is null. * For dynamic case, only BIT_RATE cap uses this adjust function. * Hence, no need to check for ctrl id to be BIT_RATE control, and not * any of layer bitrate controls. */ - adjusted_value = ctrl ? ctrl->val : capability->cap[BIT_RATE].value; + adjusted_value = ctrl ? ctrl->val : inst->capabilities[BIT_RATE].value; msm_vidc_update_cap_value(inst, BIT_RATE, adjusted_value, __func__); return 0; @@ -1710,14 +1675,14 @@ int msm_vidc_adjust_bitrate(void *instance, struct v4l2_ctrl *ctrl) /* get max bit rate for current session config*/ max_bitrate = msm_vidc_get_max_bitrate(inst); - if (inst->capabilities->cap[BIT_RATE].value > max_bitrate) + if (inst->capabilities[BIT_RATE].value > max_bitrate) msm_vidc_update_cap_value(inst, BIT_RATE, max_bitrate, __func__); /* * ENH_LAYER_COUNT cap max is positive only if * layer encoding is enabled during streamon. */ - if (capability->cap[ENH_LAYER_COUNT].max) { + if (inst->capabilities[ENH_LAYER_COUNT].max) { if (!msm_vidc_check_all_layer_bitrate_set(inst)) { i_vpr_h(inst, "%s: client did not set all layer bitrates\n", @@ -1738,7 +1703,7 @@ int msm_vidc_adjust_bitrate(void *instance, struct v4l2_ctrl *ctrl) if (i >= ARRAY_SIZE(layer_br_caps)) break; cap_id = layer_br_caps[i]; - cap_value = inst->capabilities->cap[cap_id].value; + cap_value = inst->capabilities[cap_id].value; decrement_in_value = (cap_value * decrement_in_percent) / 100; @@ -1767,23 +1732,22 @@ int msm_vidc_adjust_layer_bitrate(void *instance, struct v4l2_ctrl *ctrl) { int rc = 0; struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - struct msm_vidc_inst_capability *capability; + u32 cumulative_bitrate = 0; u32 client_set_cap_id = INST_CAP_NONE; u32 old_br = 0, new_br = 0, exceeded_br = 0; s32 max_bitrate; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - capability = inst->capabilities; if (!ctrl) return 0; /* ignore layer bitrate when total bitrate is set */ - if (capability->cap[BIT_RATE].flags & CAP_FLAG_CLIENT_SET) + if (inst->capabilities[BIT_RATE].flags & CAP_FLAG_CLIENT_SET) return 0; /* @@ -1797,7 +1761,7 @@ int msm_vidc_adjust_layer_bitrate(void *instance, struct v4l2_ctrl *ctrl) * ENH_LAYER_COUNT cap max is positive only if * layer encoding is enabled during streamon. */ - if (!capability->cap[ENH_LAYER_COUNT].max) { + if (!inst->capabilities[ENH_LAYER_COUNT].max) { i_vpr_e(inst, "%s: layers not enabled\n", __func__); return -EINVAL; } @@ -1817,8 +1781,8 @@ int msm_vidc_adjust_layer_bitrate(void *instance, struct v4l2_ctrl *ctrl) } cumulative_bitrate = msm_vidc_get_cumulative_bitrate(inst); - max_bitrate = inst->capabilities->cap[BIT_RATE].max; - old_br = capability->cap[client_set_cap_id].value; + max_bitrate = inst->capabilities[BIT_RATE].max; + old_br = inst->capabilities[client_set_cap_id].value; new_br = ctrl->val; /* @@ -1845,19 +1809,17 @@ int msm_vidc_adjust_layer_bitrate(void *instance, struct v4l2_ctrl *ctrl) int msm_vidc_adjust_peak_bitrate(void *instance, struct v4l2_ctrl *ctrl) { - struct msm_vidc_inst_capability *capability; s32 adjusted_value; struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; s32 rc_type = -1, bitrate = -1; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - capability = inst->capabilities; adjusted_value = ctrl ? ctrl->val : - capability->cap[PEAK_BITRATE].value; + inst->capabilities[PEAK_BITRATE].value; if (msm_vidc_get_parent_value(inst, PEAK_BITRATE, BITRATE_MODE, &rc_type, __func__)) @@ -1872,11 +1834,11 @@ int msm_vidc_adjust_peak_bitrate(void *instance, struct v4l2_ctrl *ctrl) return -EINVAL; /* Peak Bitrate should be larger than or equal to avg bitrate */ - if (capability->cap[PEAK_BITRATE].flags & CAP_FLAG_CLIENT_SET) { + if (inst->capabilities[PEAK_BITRATE].flags & CAP_FLAG_CLIENT_SET) { if (adjusted_value < bitrate) adjusted_value = bitrate; } else { - adjusted_value = capability->cap[BIT_RATE].value; + adjusted_value = inst->capabilities[BIT_RATE].value; } msm_vidc_update_cap_value(inst, PEAK_BITRATE, @@ -1888,10 +1850,8 @@ int msm_vidc_adjust_peak_bitrate(void *instance, struct v4l2_ctrl *ctrl) static int msm_vidc_adjust_hevc_qp(struct msm_vidc_inst *inst, enum msm_vidc_inst_capability_type cap_id) { - struct msm_vidc_inst_capability *capability; s32 pix_fmt = -1; - capability = inst->capabilities; if (!(inst->codec == MSM_VIDC_HEVC || inst->codec == MSM_VIDC_HEIC)) { i_vpr_e(inst, @@ -1907,15 +1867,15 @@ static int msm_vidc_adjust_hevc_qp(struct msm_vidc_inst *inst, if (pix_fmt == MSM_VIDC_FMT_P010 || pix_fmt == MSM_VIDC_FMT_TP10C) goto exit; - CAP_TO_8BIT_QP(capability->cap[cap_id].value); + CAP_TO_8BIT_QP(inst->capabilities[cap_id].value); if (cap_id == MIN_FRAME_QP) { - CAP_TO_8BIT_QP(capability->cap[I_FRAME_MIN_QP].value); - CAP_TO_8BIT_QP(capability->cap[P_FRAME_MIN_QP].value); - CAP_TO_8BIT_QP(capability->cap[B_FRAME_MIN_QP].value); + CAP_TO_8BIT_QP(inst->capabilities[I_FRAME_MIN_QP].value); + CAP_TO_8BIT_QP(inst->capabilities[P_FRAME_MIN_QP].value); + CAP_TO_8BIT_QP(inst->capabilities[B_FRAME_MIN_QP].value); } else if (cap_id == MAX_FRAME_QP) { - CAP_TO_8BIT_QP(capability->cap[I_FRAME_MAX_QP].value); - CAP_TO_8BIT_QP(capability->cap[P_FRAME_MAX_QP].value); - CAP_TO_8BIT_QP(capability->cap[B_FRAME_MAX_QP].value); + CAP_TO_8BIT_QP(inst->capabilities[I_FRAME_MAX_QP].value); + CAP_TO_8BIT_QP(inst->capabilities[P_FRAME_MAX_QP].value); + CAP_TO_8BIT_QP(inst->capabilities[B_FRAME_MAX_QP].value); } exit: @@ -1925,14 +1885,13 @@ exit: int msm_vidc_adjust_hevc_min_qp(void *instance, struct v4l2_ctrl *ctrl) { int rc = 0; - struct msm_vidc_inst_capability *capability; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - capability = inst->capabilities; if (ctrl) msm_vidc_update_cap_value(inst, MIN_FRAME_QP, @@ -1946,14 +1905,13 @@ int msm_vidc_adjust_hevc_min_qp(void *instance, struct v4l2_ctrl *ctrl) int msm_vidc_adjust_hevc_max_qp(void *instance, struct v4l2_ctrl *ctrl) { int rc = 0; - struct msm_vidc_inst_capability *capability; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - capability = inst->capabilities; if (ctrl) msm_vidc_update_cap_value(inst, MAX_FRAME_QP, @@ -1967,14 +1925,13 @@ int msm_vidc_adjust_hevc_max_qp(void *instance, struct v4l2_ctrl *ctrl) int msm_vidc_adjust_hevc_i_frame_qp(void *instance, struct v4l2_ctrl *ctrl) { int rc = 0; - struct msm_vidc_inst_capability *capability; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - capability = inst->capabilities; if (ctrl) msm_vidc_update_cap_value(inst, I_FRAME_QP, @@ -1990,14 +1947,13 @@ int msm_vidc_adjust_hevc_i_frame_qp(void *instance, struct v4l2_ctrl *ctrl) int msm_vidc_adjust_hevc_p_frame_qp(void *instance, struct v4l2_ctrl *ctrl) { int rc = 0; - struct msm_vidc_inst_capability *capability; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - capability = inst->capabilities; if (ctrl) msm_vidc_update_cap_value(inst, P_FRAME_QP, @@ -2013,14 +1969,13 @@ int msm_vidc_adjust_hevc_p_frame_qp(void *instance, struct v4l2_ctrl *ctrl) int msm_vidc_adjust_hevc_b_frame_qp(void *instance, struct v4l2_ctrl *ctrl) { int rc = 0; - struct msm_vidc_inst_capability *capability; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - capability = inst->capabilities; if (ctrl) msm_vidc_update_cap_value(inst, B_FRAME_QP, @@ -2035,20 +1990,18 @@ int msm_vidc_adjust_hevc_b_frame_qp(void *instance, struct v4l2_ctrl *ctrl) int msm_vidc_adjust_blur_type(void *instance, struct v4l2_ctrl *ctrl) { - struct msm_vidc_inst_capability *capability; s32 adjusted_value; struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; s32 rc_type = -1, roi_enable = -1; s32 pix_fmts = -1, min_quality = -1; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - capability = inst->capabilities; adjusted_value = ctrl ? ctrl->val : - capability->cap[BLUR_TYPES].value; + inst->capabilities[BLUR_TYPES].value; if (adjusted_value == MSM_VIDC_BLUR_NONE) return 0; @@ -2099,20 +2052,18 @@ exit: int msm_vidc_adjust_all_intra(void *instance, struct v4l2_ctrl *ctrl) { - struct msm_vidc_inst_capability *capability; s32 adjusted_value; struct msm_vidc_core *core; struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; s32 gop_size = -1, bframe = -1; u32 width, height, fps, mbps, max_mbps; - if (!inst || !inst->capabilities || !inst->core) { + if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - capability = inst->capabilities; - adjusted_value = capability->cap[ALL_INTRA].value; + adjusted_value = inst->capabilities[ALL_INTRA].value; if (msm_vidc_get_parent_value(inst, ALL_INTRA, GOP_SIZE, &gop_size, __func__) || @@ -2146,19 +2097,17 @@ exit: int msm_vidc_adjust_blur_resolution(void *instance, struct v4l2_ctrl *ctrl) { - struct msm_vidc_inst_capability *capability; s32 adjusted_value; struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; s32 blur_type = -1; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - capability = inst->capabilities; adjusted_value = ctrl ? ctrl->val : - capability->cap[BLUR_RESOLUTION].value; + inst->capabilities[BLUR_RESOLUTION].value; if (msm_vidc_get_parent_value(inst, BLUR_RESOLUTION, BLUR_TYPES, &blur_type, __func__)) @@ -2175,20 +2124,18 @@ int msm_vidc_adjust_blur_resolution(void *instance, struct v4l2_ctrl *ctrl) int msm_vidc_adjust_brs(void *instance, struct v4l2_ctrl *ctrl) { - struct msm_vidc_inst_capability *capability; s32 adjusted_value; struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; s32 rc_type = -1, layer_enabled = -1, layer_type = -1; bool hp_requested = false; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - capability = inst->capabilities; adjusted_value = ctrl ? ctrl->val : - capability->cap[CONTENT_ADAPTIVE_CODING].value; + inst->capabilities[CONTENT_ADAPTIVE_CODING].value; if (inst->bufq[OUTPUT_PORT].vb2q->streaming) return 0; @@ -2216,7 +2163,7 @@ int msm_vidc_adjust_brs(void *instance, struct v4l2_ctrl *ctrl) else if (inst->codec == MSM_VIDC_HEVC) layer_type = V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P; - hp_requested = (inst->capabilities->cap[LAYER_TYPE].value == layer_type); + hp_requested = (inst->capabilities[LAYER_TYPE].value == layer_type); /* * Disable BRS in case of HP encoding @@ -2236,20 +2183,18 @@ adjust: int msm_vidc_adjust_bitrate_boost(void *instance, struct v4l2_ctrl *ctrl) { - struct msm_vidc_inst_capability *capability; s32 adjusted_value; struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; s32 min_quality = -1, rc_type = -1; u32 max_bitrate = 0, bitrate = 0; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - capability = inst->capabilities; adjusted_value = ctrl ? ctrl->val : - capability->cap[BITRATE_BOOST].value; + inst->capabilities[BITRATE_BOOST].value; if (inst->bufq[OUTPUT_PORT].vb2q->streaming) return 0; @@ -2275,7 +2220,7 @@ int msm_vidc_adjust_bitrate_boost(void *instance, struct v4l2_ctrl *ctrl) } max_bitrate = msm_vidc_get_max_bitrate(inst); - bitrate = inst->capabilities->cap[BIT_RATE].value; + bitrate = inst->capabilities[BIT_RATE].value; if (adjusted_value) { if ((bitrate + bitrate / (100 / adjusted_value)) > max_bitrate) { i_vpr_h(inst, @@ -2294,20 +2239,18 @@ adjust: int msm_vidc_adjust_min_quality(void *instance, struct v4l2_ctrl *ctrl) { - struct msm_vidc_inst_capability *capability; s32 adjusted_value; struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; s32 roi_enable = -1, rc_type = -1, enh_layer_count = -1, pix_fmts = -1; u32 width, height, frame_rate; struct v4l2_format *f; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - capability = inst->capabilities; - adjusted_value = ctrl ? ctrl->val : capability->cap[MIN_QUALITY].value; + adjusted_value = ctrl ? ctrl->val : inst->capabilities[MIN_QUALITY].value; /* * Although MIN_QUALITY is static, one of its parents, @@ -2334,7 +2277,7 @@ int msm_vidc_adjust_min_quality(void *instance, struct v4l2_ctrl *ctrl) goto update_and_exit; } - frame_rate = inst->capabilities->cap[FRAME_RATE].value >> 16; + frame_rate = inst->capabilities[FRAME_RATE].value >> 16; f = &inst->fmts[OUTPUT_PORT]; width = f->fmt.pix_mp.width; height = f->fmt.pix_mp.height; @@ -2415,12 +2358,12 @@ int msm_vidc_adjust_preprocess(void *instance, struct v4l2_ctrl *ctrl) u32 width, height, frame_rate, operating_rate, max_fps; struct v4l2_format *f; - if (!inst || !inst->capabilities || !inst->core) { + if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - adjusted_value = inst->capabilities->cap[REQUEST_PREPROCESS].value; + adjusted_value = inst->capabilities[REQUEST_PREPROCESS].value; width = inst->crop.width; height = inst->crop.height; @@ -2466,19 +2409,17 @@ update_preprocess: int msm_vidc_adjust_enc_lowlatency_mode(void *instance, struct v4l2_ctrl *ctrl) { - struct msm_vidc_inst_capability *capability; s32 adjusted_value; struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; s32 rc_type = -1; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - capability = inst->capabilities; adjusted_value = ctrl ? ctrl->val : - capability->cap[LOWLATENCY_MODE].value; + inst->capabilities[LOWLATENCY_MODE].value; if (msm_vidc_get_parent_value(inst, LOWLATENCY_MODE, BITRATE_MODE, &rc_type, __func__)) @@ -2497,19 +2438,17 @@ int msm_vidc_adjust_enc_lowlatency_mode(void *instance, struct v4l2_ctrl *ctrl) int msm_vidc_adjust_dec_lowlatency_mode(void *instance, struct v4l2_ctrl *ctrl) { - struct msm_vidc_inst_capability *capability; s32 adjusted_value; struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; s32 outbuf_fence = MSM_VIDC_META_DISABLE; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - capability = inst->capabilities; adjusted_value = ctrl ? ctrl->val : - capability->cap[LOWLATENCY_MODE].value; + inst->capabilities[LOWLATENCY_MODE].value; if (is_valid_cap(inst, META_OUTBUF_FENCE)) { if (msm_vidc_get_parent_value(inst, LOWLATENCY_MODE, META_OUTBUF_FENCE, @@ -2530,14 +2469,13 @@ int msm_vidc_adjust_dec_lowlatency_mode(void *instance, struct v4l2_ctrl *ctrl) int msm_vidc_adjust_session_priority(void *instance, struct v4l2_ctrl *ctrl) { int adjusted_value; - struct msm_vidc_inst_capability *capability; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - capability = inst->capabilities; /* * Priority handling * Client will set 0 (realtime), 1+ (non-realtime) @@ -2559,7 +2497,7 @@ int msm_vidc_adjust_session_priority(void *instance, struct v4l2_ctrl *ctrl) else adjusted_value = ctrl->val; } else { - adjusted_value = capability->cap[PRIORITY].value; + adjusted_value = inst->capabilities[PRIORITY].value; } msm_vidc_update_cap_value(inst, PRIORITY, adjusted_value, __func__); @@ -2569,18 +2507,16 @@ int msm_vidc_adjust_session_priority(void *instance, struct v4l2_ctrl *ctrl) int msm_vidc_adjust_roi_info(void *instance, struct v4l2_ctrl *ctrl) { - struct msm_vidc_inst_capability *capability; s32 adjusted_value; struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; s32 rc_type = -1, pix_fmt = -1; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - capability = inst->capabilities; - adjusted_value = ctrl ? ctrl->val : capability->cap[META_ROI_INFO].value; + adjusted_value = ctrl ? ctrl->val : inst->capabilities[META_ROI_INFO].value; if (msm_vidc_get_parent_value(inst, META_ROI_INFO, BITRATE_MODE, &rc_type, __func__)) @@ -2603,18 +2539,16 @@ int msm_vidc_adjust_roi_info(void *instance, struct v4l2_ctrl *ctrl) int msm_vidc_adjust_dec_outbuf_fence(void *instance, struct v4l2_ctrl *ctrl) { - struct msm_vidc_inst_capability *capability; struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; u32 adjusted_value = 0; s32 picture_order = -1; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - capability = inst->capabilities; - adjusted_value = ctrl ? ctrl->val : capability->cap[META_OUTBUF_FENCE].value; + adjusted_value = ctrl ? ctrl->val : inst->capabilities[META_OUTBUF_FENCE].value; if (msm_vidc_get_parent_value(inst, META_OUTBUF_FENCE, OUTPUT_ORDER, &picture_order, __func__)) @@ -2634,12 +2568,12 @@ int msm_vidc_adjust_dec_outbuf_fence(void *instance, struct v4l2_ctrl *ctrl) int msm_vidc_adjust_dec_outbuf_fence_type(void *instance, struct v4l2_ctrl *ctrl) { - struct msm_vidc_inst_capability *capability; + struct msm_vidc_inst_cap *capability; s32 adjusted_value, meta_outbuf_fence = 0; struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; struct msm_vidc_core *core; - if (!inst || !inst->capabilities || !inst->core) { + if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -2651,7 +2585,7 @@ int msm_vidc_adjust_dec_outbuf_fence_type(void *instance, struct v4l2_ctrl *ctrl } adjusted_value = ctrl ? ctrl->val : - capability->cap[OUTBUF_FENCE_TYPE].value; + capability[OUTBUF_FENCE_TYPE].value; if (msm_vidc_get_parent_value(inst, OUTBUF_FENCE_TYPE, META_OUTBUF_FENCE, &meta_outbuf_fence, __func__)) @@ -2674,12 +2608,12 @@ int msm_vidc_adjust_dec_outbuf_fence_type(void *instance, struct v4l2_ctrl *ctrl int msm_vidc_adjust_dec_outbuf_fence_direction(void *instance, struct v4l2_ctrl *ctrl) { - struct msm_vidc_inst_capability *capability; + struct msm_vidc_inst_cap *capability; s32 adjusted_value, meta_outbuf_fence = 0; struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; struct msm_vidc_core *core; - if (!inst || !inst->capabilities || !inst->core) { + if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -2691,7 +2625,7 @@ int msm_vidc_adjust_dec_outbuf_fence_direction(void *instance, struct v4l2_ctrl } adjusted_value = ctrl ? ctrl->val : - capability->cap[OUTBUF_FENCE_DIRECTION].value; + capability[OUTBUF_FENCE_DIRECTION].value; if (msm_vidc_get_parent_value(inst, OUTBUF_FENCE_DIRECTION, META_OUTBUF_FENCE, &meta_outbuf_fence, __func__)) @@ -2711,20 +2645,18 @@ int msm_vidc_adjust_dec_outbuf_fence_direction(void *instance, struct v4l2_ctrl int msm_vidc_adjust_dec_slice_mode(void *instance, struct v4l2_ctrl *ctrl) { - struct msm_vidc_inst_capability *capability; struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; u32 adjusted_value = 0; s32 low_latency = -1; s32 picture_order = -1; s32 outbuf_fence = 0; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - capability = inst->capabilities; - adjusted_value = ctrl ? ctrl->val : capability->cap[SLICE_DECODE].value; + adjusted_value = ctrl ? ctrl->val : inst->capabilities[SLICE_DECODE].value; if (msm_vidc_get_parent_value(inst, SLICE_DECODE, LOWLATENCY_MODE, &low_latency, __func__) || @@ -2746,18 +2678,16 @@ int msm_vidc_adjust_dec_slice_mode(void *instance, struct v4l2_ctrl *ctrl) int msm_vidc_adjust_eva_stats(void *instance, struct v4l2_ctrl *ctrl) { - struct msm_vidc_inst_capability *capability; s32 adjusted_value; struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; s32 rc_type = -1; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - capability = inst->capabilities; - adjusted_value = ctrl ? ctrl->val : capability->cap[META_EVA_STATS].value; + adjusted_value = ctrl ? ctrl->val : inst->capabilities[META_EVA_STATS].value; if (msm_vidc_get_parent_value(inst, META_EVA_STATS, BITRATE_MODE, &rc_type, __func__)) @@ -2777,18 +2707,16 @@ int msm_vidc_adjust_eva_stats(void *instance, struct v4l2_ctrl *ctrl) int msm_vidc_adjust_sei_mastering_disp(void *instance, struct v4l2_ctrl *ctrl) { - struct msm_vidc_inst_capability *capability; s32 adjusted_value; struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; s32 profile = -1; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - capability = inst->capabilities; - adjusted_value = ctrl ? ctrl->val : capability->cap[META_SEI_MASTERING_DISP].value; + adjusted_value = ctrl ? ctrl->val : inst->capabilities[META_SEI_MASTERING_DISP].value; if (msm_vidc_get_parent_value(inst, META_SEI_MASTERING_DISP, PROFILE, &profile, __func__)) @@ -2815,18 +2743,16 @@ adjust: int msm_vidc_adjust_sei_cll(void *instance, struct v4l2_ctrl *ctrl) { - struct msm_vidc_inst_capability *capability; s32 adjusted_value; struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; s32 profile = -1; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - capability = inst->capabilities; - adjusted_value = ctrl ? ctrl->val : capability->cap[META_SEI_CLL].value; + adjusted_value = ctrl ? ctrl->val : inst->capabilities[META_SEI_CLL].value; if (msm_vidc_get_parent_value(inst, META_SEI_CLL, PROFILE, &profile, __func__)) @@ -2852,18 +2778,16 @@ adjust: int msm_vidc_adjust_hdr10plus(void *instance, struct v4l2_ctrl *ctrl) { - struct msm_vidc_inst_capability *capability; s32 adjusted_value; struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; s32 profile = -1; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - capability = inst->capabilities; - adjusted_value = ctrl ? ctrl->val : capability->cap[META_HDR10PLUS].value; + adjusted_value = ctrl ? ctrl->val : inst->capabilities[META_HDR10PLUS].value; if (msm_vidc_get_parent_value(inst, META_HDR10PLUS, PROFILE, &profile, __func__)) @@ -2889,21 +2813,19 @@ adjust: int msm_vidc_adjust_transcoding_stats(void *instance, struct v4l2_ctrl *ctrl) { - struct msm_vidc_inst_capability *capability; s32 adjusted_value; struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; s32 rc_type = -1; u32 width, height, fps; struct v4l2_format *f; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - capability = inst->capabilities; adjusted_value = ctrl ? ctrl->val : - capability->cap[META_TRANSCODING_STAT_INFO].value; + inst->capabilities[META_TRANSCODING_STAT_INFO].value; if (msm_vidc_get_parent_value(inst, META_TRANSCODING_STAT_INFO, BITRATE_MODE, &rc_type, __func__)) @@ -2922,7 +2844,7 @@ int msm_vidc_adjust_transcoding_stats(void *instance, struct v4l2_ctrl *ctrl) goto exit; } - fps = capability->cap[FRAME_RATE].value >> 16; + fps = inst->capabilities[FRAME_RATE].value >> 16; if (fps > MAX_TRANSCODING_STATS_FRAME_RATE) { i_vpr_h(inst, "%s: unsupported fps %u\n", __func__, fps); adjusted_value = 0; @@ -2958,16 +2880,15 @@ int msm_vidc_set_header_mode(void *instance, struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; int header_mode, prepend_sps_pps; u32 hfi_value = 0; - struct msm_vidc_inst_capability *capability; - if (!inst || !inst->capabilities) { + + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - capability = inst->capabilities; - header_mode = capability->cap[cap_id].value; - prepend_sps_pps = capability->cap[PREPEND_SPSPPS_TO_IDR].value; + header_mode = inst->capabilities[cap_id].value; + prepend_sps_pps = inst->capabilities[PREPEND_SPSPPS_TO_IDR].value; /* prioritize PREPEND_SPSPPS_TO_IDR mode over other header modes */ if (prepend_sps_pps) @@ -2995,20 +2916,19 @@ int msm_vidc_set_deblock_mode(void *instance, struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; s32 alpha = 0, beta = 0; u32 lf_mode, hfi_value = 0, lf_offset = 6; - struct msm_vidc_inst_capability *capability; - if (!inst || !inst->capabilities) { + + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - capability = inst->capabilities; rc = msm_vidc_v4l2_to_hfi_enum(inst, LF_MODE, &lf_mode); if (rc) return -EINVAL; - beta = inst->capabilities->cap[LF_BETA].value + lf_offset; - alpha = inst->capabilities->cap[LF_ALPHA].value + lf_offset; + beta = inst->capabilities[LF_BETA].value + lf_offset; + alpha = inst->capabilities[LF_ALPHA].value + lf_offset; hfi_value = (alpha << 16) | (beta << 8) | lf_mode; rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_32_PACKED, @@ -3027,7 +2947,7 @@ int msm_vidc_set_constant_quality(void *instance, u32 hfi_value = 0; s32 rc_type = -1; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -3039,7 +2959,7 @@ int msm_vidc_set_constant_quality(void *instance, if (rc_type != HFI_RC_CQ) return 0; - hfi_value = inst->capabilities->cap[cap_id].value; + hfi_value = inst->capabilities[cap_id].value; rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32, &hfi_value, sizeof(u32), __func__); @@ -3057,7 +2977,7 @@ int msm_vidc_set_vbr_related_properties(void *instance, u32 hfi_value = 0; s32 rc_type = -1; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -3069,7 +2989,7 @@ int msm_vidc_set_vbr_related_properties(void *instance, if (rc_type != HFI_RC_VBR_CFR) return 0; - hfi_value = inst->capabilities->cap[cap_id].value; + hfi_value = inst->capabilities[cap_id].value; rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32, &hfi_value, sizeof(u32), __func__); @@ -3087,7 +3007,7 @@ int msm_vidc_set_cbr_related_properties(void *instance, u32 hfi_value = 0; s32 rc_type = -1; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -3100,7 +3020,7 @@ int msm_vidc_set_cbr_related_properties(void *instance, rc_type != HFI_RC_CBR_CFR) return 0; - hfi_value = inst->capabilities->cap[cap_id].value; + hfi_value = inst->capabilities[cap_id].value; rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32, &hfi_value, sizeof(u32), __func__); @@ -3117,24 +3037,24 @@ int msm_vidc_set_use_and_mark_ltr(void *instance, struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; u32 hfi_value = 0; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - if (!inst->capabilities->cap[LTR_COUNT].value || - (inst->capabilities->cap[cap_id].value == + if (!inst->capabilities[LTR_COUNT].value || + (inst->capabilities[cap_id].value == INVALID_DEFAULT_MARK_OR_USE_LTR)) { i_vpr_h(inst, "%s: LTR_COUNT: %d %s: %d, cap %s is not set\n", - __func__, inst->capabilities->cap[LTR_COUNT].value, + __func__, inst->capabilities[LTR_COUNT].value, cap_name(cap_id), - inst->capabilities->cap[cap_id].value, + inst->capabilities[cap_id].value, cap_name(cap_id)); return 0; } - hfi_value = inst->capabilities->cap[cap_id].value; + hfi_value = inst->capabilities[cap_id].value; rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32, &hfi_value, sizeof(u32), __func__); @@ -3149,28 +3069,27 @@ int msm_vidc_set_min_qp(void *instance, { int rc = 0; struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; - struct msm_vidc_inst_capability *capability; + s32 i_frame_qp = 0, p_frame_qp = 0, b_frame_qp = 0, min_qp_enable = 0; u32 i_qp_enable = 0, p_qp_enable = 0, b_qp_enable = 0; u32 client_qp_enable = 0, hfi_value = 0, offset = 0; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - capability = inst->capabilities; - if (capability->cap[MIN_FRAME_QP].flags & CAP_FLAG_CLIENT_SET) + if (inst->capabilities[MIN_FRAME_QP].flags & CAP_FLAG_CLIENT_SET) min_qp_enable = 1; if (min_qp_enable || - (capability->cap[I_FRAME_MIN_QP].flags & CAP_FLAG_CLIENT_SET)) + (inst->capabilities[I_FRAME_MIN_QP].flags & CAP_FLAG_CLIENT_SET)) i_qp_enable = 1; if (min_qp_enable || - (capability->cap[P_FRAME_MIN_QP].flags & CAP_FLAG_CLIENT_SET)) + (inst->capabilities[P_FRAME_MIN_QP].flags & CAP_FLAG_CLIENT_SET)) p_qp_enable = 1; if (min_qp_enable || - (capability->cap[B_FRAME_MIN_QP].flags & CAP_FLAG_CLIENT_SET)) + (inst->capabilities[B_FRAME_MIN_QP].flags & CAP_FLAG_CLIENT_SET)) b_qp_enable = 1; client_qp_enable = i_qp_enable | p_qp_enable << 1 | b_qp_enable << 2; @@ -3181,7 +3100,7 @@ int msm_vidc_set_min_qp(void *instance, return 0; } - if (is_10bit_colorformat(capability->cap[PIX_FMTS].value)) + if (is_10bit_colorformat(inst->capabilities[PIX_FMTS].value)) offset = 12; /* @@ -3191,12 +3110,12 @@ int msm_vidc_set_min_qp(void *instance, * and (I_FRAME_MIN_QP or P_FRAME_MIN_QP or B_FRAME_MIN_QP), * max of both caps will result into client set value. */ - i_frame_qp = max(capability->cap[I_FRAME_MIN_QP].value, - capability->cap[MIN_FRAME_QP].value) + offset; - p_frame_qp = max(capability->cap[P_FRAME_MIN_QP].value, - capability->cap[MIN_FRAME_QP].value) + offset; - b_frame_qp = max(capability->cap[B_FRAME_MIN_QP].value, - capability->cap[MIN_FRAME_QP].value) + offset; + i_frame_qp = max(inst->capabilities[I_FRAME_MIN_QP].value, + inst->capabilities[MIN_FRAME_QP].value) + offset; + p_frame_qp = max(inst->capabilities[P_FRAME_MIN_QP].value, + inst->capabilities[MIN_FRAME_QP].value) + offset; + b_frame_qp = max(inst->capabilities[B_FRAME_MIN_QP].value, + inst->capabilities[MIN_FRAME_QP].value) + offset; hfi_value = i_frame_qp | p_frame_qp << 8 | b_frame_qp << 16 | client_qp_enable << 24; @@ -3214,28 +3133,27 @@ int msm_vidc_set_max_qp(void *instance, { int rc = 0; struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; - struct msm_vidc_inst_capability *capability; + s32 i_frame_qp = 0, p_frame_qp = 0, b_frame_qp = 0, max_qp_enable = 0; u32 i_qp_enable = 0, p_qp_enable = 0, b_qp_enable = 0; u32 client_qp_enable = 0, hfi_value = 0, offset = 0; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - capability = inst->capabilities; - if (capability->cap[MAX_FRAME_QP].flags & CAP_FLAG_CLIENT_SET) + if (inst->capabilities[MAX_FRAME_QP].flags & CAP_FLAG_CLIENT_SET) max_qp_enable = 1; if (max_qp_enable || - (capability->cap[I_FRAME_MAX_QP].flags & CAP_FLAG_CLIENT_SET)) + (inst->capabilities[I_FRAME_MAX_QP].flags & CAP_FLAG_CLIENT_SET)) i_qp_enable = 1; if (max_qp_enable || - (capability->cap[P_FRAME_MAX_QP].flags & CAP_FLAG_CLIENT_SET)) + (inst->capabilities[P_FRAME_MAX_QP].flags & CAP_FLAG_CLIENT_SET)) p_qp_enable = 1; if (max_qp_enable || - (capability->cap[B_FRAME_MAX_QP].flags & CAP_FLAG_CLIENT_SET)) + (inst->capabilities[B_FRAME_MAX_QP].flags & CAP_FLAG_CLIENT_SET)) b_qp_enable = 1; client_qp_enable = i_qp_enable | p_qp_enable << 1 | b_qp_enable << 2; @@ -3246,7 +3164,7 @@ int msm_vidc_set_max_qp(void *instance, return 0; } - if (is_10bit_colorformat(capability->cap[PIX_FMTS].value)) + if (is_10bit_colorformat(inst->capabilities[PIX_FMTS].value)) offset = 12; /* @@ -3256,12 +3174,12 @@ int msm_vidc_set_max_qp(void *instance, * and (I_FRAME_MAX_QP or P_FRAME_MAX_QP or B_FRAME_MAX_QP), * min of both caps will result into client set value. */ - i_frame_qp = min(capability->cap[I_FRAME_MAX_QP].value, - capability->cap[MAX_FRAME_QP].value) + offset; - p_frame_qp = min(capability->cap[P_FRAME_MAX_QP].value, - capability->cap[MAX_FRAME_QP].value) + offset; - b_frame_qp = min(capability->cap[B_FRAME_MAX_QP].value, - capability->cap[MAX_FRAME_QP].value) + offset; + i_frame_qp = min(inst->capabilities[I_FRAME_MAX_QP].value, + inst->capabilities[MAX_FRAME_QP].value) + offset; + p_frame_qp = min(inst->capabilities[P_FRAME_MAX_QP].value, + inst->capabilities[MAX_FRAME_QP].value) + offset; + b_frame_qp = min(inst->capabilities[B_FRAME_MAX_QP].value, + inst->capabilities[MAX_FRAME_QP].value) + offset; hfi_value = i_frame_qp | p_frame_qp << 8 | b_frame_qp << 16 | client_qp_enable << 24; @@ -3279,13 +3197,13 @@ int msm_vidc_set_frame_qp(void *instance, { int rc = 0; struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; - struct msm_vidc_inst_capability *capab; + struct msm_vidc_inst_cap *capab; s32 i_frame_qp = 0, p_frame_qp = 0, b_frame_qp = 0; u32 i_qp_enable = 0, p_qp_enable = 0, b_qp_enable = 0; u32 client_qp_enable = 0, hfi_value = 0, offset = 0; s32 rc_type = -1; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -3309,11 +3227,11 @@ int msm_vidc_set_frame_qp(void *instance, i_qp_enable = p_qp_enable = b_qp_enable = 1; } else { /* Set only if client has set for NON rc off case */ - if (capab->cap[I_FRAME_QP].flags & CAP_FLAG_CLIENT_SET) + if (capab[I_FRAME_QP].flags & CAP_FLAG_CLIENT_SET) i_qp_enable = 1; - if (capab->cap[P_FRAME_QP].flags & CAP_FLAG_CLIENT_SET) + if (capab[P_FRAME_QP].flags & CAP_FLAG_CLIENT_SET) p_qp_enable = 1; - if (capab->cap[B_FRAME_QP].flags & CAP_FLAG_CLIENT_SET) + if (capab[B_FRAME_QP].flags & CAP_FLAG_CLIENT_SET) b_qp_enable = 1; } @@ -3325,12 +3243,12 @@ int msm_vidc_set_frame_qp(void *instance, return 0; } - if (is_10bit_colorformat(capab->cap[PIX_FMTS].value)) + if (is_10bit_colorformat(capab[PIX_FMTS].value)) offset = 12; - i_frame_qp = capab->cap[I_FRAME_QP].value + offset; - p_frame_qp = capab->cap[P_FRAME_QP].value + offset; - b_frame_qp = capab->cap[B_FRAME_QP].value + offset; + i_frame_qp = capab[I_FRAME_QP].value + offset; + p_frame_qp = capab[P_FRAME_QP].value + offset; + b_frame_qp = capab[B_FRAME_QP].value + offset; hfi_value = i_frame_qp | p_frame_qp << 8 | b_frame_qp << 16 | client_qp_enable << 24; @@ -3351,12 +3269,12 @@ int msm_vidc_set_req_sync_frame(void *instance, s32 prepend_spspps; u32 hfi_value = 0; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - prepend_spspps = inst->capabilities->cap[PREPEND_SPSPPS_TO_IDR].value; + prepend_spspps = inst->capabilities[PREPEND_SPSPPS_TO_IDR].value; if (prepend_spspps) hfi_value = HFI_SYNC_FRAME_REQUEST_WITH_PREFIX_SEQ_HDR; else @@ -3378,17 +3296,17 @@ int msm_vidc_set_chroma_qp_index_offset(void *instance, u32 hfi_value = 0, chroma_qp_offset_mode = 0, chroma_qp = 0; u32 offset = 12; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - if (inst->capabilities->cap[cap_id].flags & CAP_FLAG_CLIENT_SET) + if (inst->capabilities[cap_id].flags & CAP_FLAG_CLIENT_SET) chroma_qp_offset_mode = HFI_FIXED_CHROMAQP_OFFSET; else chroma_qp_offset_mode = HFI_ADAPTIVE_CHROMAQP_OFFSET; - chroma_qp = inst->capabilities->cap[cap_id].value + offset; + chroma_qp = inst->capabilities[cap_id].value + offset; hfi_value = chroma_qp_offset_mode | chroma_qp << 8 | chroma_qp << 16; rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_32_PACKED, @@ -3407,12 +3325,12 @@ int msm_vidc_set_slice_count(void *instance, s32 slice_mode = -1; u32 hfi_value = 0, set_cap_id = 0; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - slice_mode = inst->capabilities->cap[SLICE_MODE].value; + slice_mode = inst->capabilities[SLICE_MODE].value; if (slice_mode == V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE) { i_vpr_h(inst, "%s: slice mode is: %u, ignore setting to fw\n", @@ -3421,11 +3339,11 @@ int msm_vidc_set_slice_count(void *instance, } if (slice_mode == V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_MB) { hfi_value = (inst->codec == MSM_VIDC_HEVC) ? - ((inst->capabilities->cap[SLICE_MAX_MB].value + 3) / 4) : - inst->capabilities->cap[SLICE_MAX_MB].value; + ((inst->capabilities[SLICE_MAX_MB].value + 3) / 4) : + inst->capabilities[SLICE_MAX_MB].value; set_cap_id = SLICE_MAX_MB; } else if (slice_mode == V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_BYTES) { - hfi_value = inst->capabilities->cap[SLICE_MAX_BYTES].value; + hfi_value = inst->capabilities[SLICE_MAX_BYTES].value; set_cap_id = SLICE_MAX_BYTES; } @@ -3444,12 +3362,12 @@ int msm_vidc_set_nal_length(void *instance, struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; u32 hfi_value = HFI_NAL_LENGTH_STARTCODES; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - if (!inst->capabilities->cap[WITHOUT_STARTCODE].value) { + if (!inst->capabilities[WITHOUT_STARTCODE].value) { hfi_value = HFI_NAL_LENGTH_STARTCODES; } else { rc = msm_vidc_v4l2_to_hfi_enum(inst, NAL_LENGTH_FIELD, &hfi_value); @@ -3472,7 +3390,7 @@ int msm_vidc_set_layer_count_and_type(void *instance, struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; u32 hfi_layer_count, hfi_layer_type = 0; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -3498,7 +3416,7 @@ int msm_vidc_set_layer_count_and_type(void *instance, /* set layer count */ cap_id = ENH_LAYER_COUNT; /* hfi baselayer starts from 1 */ - hfi_layer_count = inst->capabilities->cap[ENH_LAYER_COUNT].value + 1; + hfi_layer_count = inst->capabilities[ENH_LAYER_COUNT].value + 1; rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32, &hfi_layer_count, sizeof(u32), __func__); @@ -3516,7 +3434,7 @@ int msm_vidc_set_gop_size(void *instance, struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; u32 hfi_value; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -3530,7 +3448,7 @@ int msm_vidc_set_gop_size(void *instance, } } - hfi_value = inst->capabilities->cap[GOP_SIZE].value; + hfi_value = inst->capabilities[GOP_SIZE].value; rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32, &hfi_value, sizeof(u32), __func__); @@ -3547,13 +3465,13 @@ int msm_vidc_set_bitrate(void *instance, struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; u32 hfi_value = 0; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } /* set Total Bitrate */ - if (inst->capabilities->cap[BIT_RATE].flags & CAP_FLAG_CLIENT_SET) + if (inst->capabilities[BIT_RATE].flags & CAP_FLAG_CLIENT_SET) goto set_total_bitrate; /* @@ -3566,7 +3484,7 @@ int msm_vidc_set_bitrate(void *instance, return 0; set_total_bitrate: - hfi_value = inst->capabilities->cap[BIT_RATE].value; + hfi_value = inst->capabilities[BIT_RATE].value; rc = msm_vidc_packetize_control(inst, BIT_RATE, HFI_PAYLOAD_U32, &hfi_value, sizeof(u32), __func__); if (rc) @@ -3582,7 +3500,7 @@ int msm_vidc_set_layer_bitrate(void *instance, struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; u32 hfi_value = 0; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -3591,7 +3509,7 @@ int msm_vidc_set_layer_bitrate(void *instance, return 0; /* set Total Bitrate */ - if (inst->capabilities->cap[BIT_RATE].flags & CAP_FLAG_CLIENT_SET) { + if (inst->capabilities[BIT_RATE].flags & CAP_FLAG_CLIENT_SET) { i_vpr_h(inst, "%s: Total bitrate is set, ignore layer bitrate\n", __func__); @@ -3602,7 +3520,7 @@ int msm_vidc_set_layer_bitrate(void *instance, * ENH_LAYER_COUNT cap max is positive only if * layer encoding is enabled during streamon. */ - if (!inst->capabilities->cap[ENH_LAYER_COUNT].max || + if (!inst->capabilities[ENH_LAYER_COUNT].max || !msm_vidc_check_all_layer_bitrate_set(inst)) { i_vpr_h(inst, "%s: invalid layer bitrate, ignore setting to fw\n", @@ -3614,7 +3532,7 @@ int msm_vidc_set_layer_bitrate(void *instance, * Accept layerwise bitrate but set total bitrate which was already * adjusted based on layer bitrate */ - hfi_value = inst->capabilities->cap[BIT_RATE].value; + hfi_value = inst->capabilities[BIT_RATE].value; rc = msm_vidc_packetize_control(inst, BIT_RATE, HFI_PAYLOAD_U32, &hfi_value, sizeof(u32), __func__); if (rc) @@ -3630,15 +3548,15 @@ int msm_vidc_set_session_priority(void *instance, u32 hfi_value = 0; struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - hfi_value = inst->capabilities->cap[cap_id].value; + hfi_value = inst->capabilities[cap_id].value; if (!is_critical_priority_session(inst)) - hfi_value = inst->capabilities->cap[cap_id].value + - inst->capabilities->cap[FIRMWARE_PRIORITY_OFFSET].value; + hfi_value = inst->capabilities[cap_id].value + + inst->capabilities[FIRMWARE_PRIORITY_OFFSET].value; rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32, &hfi_value, sizeof(u32), __func__); @@ -3655,13 +3573,13 @@ int msm_vidc_set_flip(void *instance, u32 hflip, vflip, hfi_value = HFI_DISABLE_FLIP; struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - hflip = inst->capabilities->cap[HFLIP].value; - vflip = inst->capabilities->cap[VFLIP].value; + hflip = inst->capabilities[HFLIP].value; + vflip = inst->capabilities[VFLIP].value; if (hflip) hfi_value |= HFI_HORIZONTAL_FLIP; @@ -3693,7 +3611,7 @@ int msm_vidc_set_preprocess(void *instance, struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; u32 hfi_value; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -3713,7 +3631,7 @@ int msm_vidc_set_rotation(void *instance, struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; u32 hfi_value; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -3738,7 +3656,7 @@ int msm_vidc_set_blur_resolution(void *instance, s32 blur_type = -1; u32 hfi_value, blur_width, blur_height; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -3750,7 +3668,7 @@ int msm_vidc_set_blur_resolution(void *instance, if (blur_type != MSM_VIDC_BLUR_EXTERNAL) return 0; - hfi_value = inst->capabilities->cap[cap_id].value; + hfi_value = inst->capabilities[cap_id].value; blur_width = (hfi_value & 0xFFFF0000) >> 16; blur_height = hfi_value & 0xFFFF; @@ -3817,7 +3735,7 @@ int msm_vidc_set_csc_custom_matrix(void *instance, s32 csc_bias_payload[MAX_BIAS_COEFFS + 2]; s32 csc_limit_payload[MAX_LIMIT_COEFFS + 2]; - if (!inst || !inst->capabilities || !inst->core) { + if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -3828,12 +3746,12 @@ int msm_vidc_set_csc_custom_matrix(void *instance, } csc_coeff = &core->platform->data.csc_data; - if (!inst->capabilities->cap[cap_id].value || - !inst->capabilities->cap[CSC].value) { + if (!inst->capabilities[cap_id].value || + !inst->capabilities[CSC].value) { i_vpr_h(inst, "%s: ignored as custom martix %u, csc %u\n", - __func__, inst->capabilities->cap[cap_id].value, - inst->capabilities->cap[CSC].value); + __func__, inst->capabilities[cap_id].value, + inst->capabilities[CSC].value); return 0; } @@ -3907,7 +3825,7 @@ int msm_vidc_set_reserve_duration(void *instance, u32 hfi_value = 0; struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -3916,17 +3834,17 @@ int msm_vidc_set_reserve_duration(void *instance, if (!inst->bufq[INPUT_PORT].vb2q->streaming) return 0; - if (!(inst->capabilities->cap[cap_id].flags & CAP_FLAG_CLIENT_SET)) + if (!(inst->capabilities[cap_id].flags & CAP_FLAG_CLIENT_SET)) return 0; - inst->capabilities->cap[cap_id].flags &= (~CAP_FLAG_CLIENT_SET); + inst->capabilities[cap_id].flags &= (~CAP_FLAG_CLIENT_SET); if (!is_critical_priority_session(inst)) { i_vpr_h(inst, "%s: reserve duration allowed only for critical session\n", __func__); return 0; } - hfi_value = inst->capabilities->cap[cap_id].value; + hfi_value = inst->capabilities[cap_id].value; rc = venus_hfi_reserve_hardware(inst, hfi_value); if (rc) @@ -3942,13 +3860,13 @@ int msm_vidc_set_level(void *instance, struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; u32 hfi_value = 0; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - hfi_value = inst->capabilities->cap[cap_id].value; - if (!(inst->capabilities->cap[cap_id].flags & CAP_FLAG_CLIENT_SET)) + hfi_value = inst->capabilities[cap_id].value; + if (!(inst->capabilities[cap_id].flags & CAP_FLAG_CLIENT_SET)) hfi_value = HFI_LEVEL_NONE; rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32_ENUM, @@ -3966,12 +3884,12 @@ int msm_vidc_set_q16(void *instance, struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; u32 hfi_value = 0; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - hfi_value = inst->capabilities->cap[cap_id].value; + hfi_value = inst->capabilities[cap_id].value; rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_Q16, &hfi_value, sizeof(u32), __func__); @@ -3988,17 +3906,17 @@ int msm_vidc_set_u32(void *instance, struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; u32 hfi_value; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - if (inst->capabilities->cap[cap_id].flags & CAP_FLAG_MENU) { + if (inst->capabilities[cap_id].flags & CAP_FLAG_MENU) { rc = msm_vidc_v4l2_menu_to_hfi(inst, cap_id, &hfi_value); if (rc) return -EINVAL; } else { - hfi_value = inst->capabilities->cap[cap_id].value; + hfi_value = inst->capabilities[cap_id].value; } rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32, @@ -4016,17 +3934,17 @@ int msm_vidc_set_u32_packed(void *instance, struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; u32 hfi_value; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - if (inst->capabilities->cap[cap_id].flags & CAP_FLAG_MENU) { + if (inst->capabilities[cap_id].flags & CAP_FLAG_MENU) { rc = msm_vidc_v4l2_menu_to_hfi(inst, cap_id, &hfi_value); if (rc) return -EINVAL; } else { - hfi_value = inst->capabilities->cap[cap_id].value; + hfi_value = inst->capabilities[cap_id].value; } rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_32_PACKED, @@ -4044,7 +3962,7 @@ int msm_vidc_set_u32_enum(void *instance, struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; u32 hfi_value; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -4068,11 +3986,11 @@ int msm_vidc_set_s32(void *instance, struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; s32 hfi_value = 0; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - hfi_value = inst->capabilities->cap[cap_id].value; + hfi_value = inst->capabilities[cap_id].value; rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_S32, &hfi_value, sizeof(s32), __func__); @@ -4090,7 +4008,7 @@ int msm_vidc_set_stage(void *instance, struct msm_vidc_core *core; struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; - if (!inst || !inst->capabilities || !inst->core) { + if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -4102,7 +4020,7 @@ int msm_vidc_set_stage(void *instance, return -EINVAL; } - stage = inst->capabilities->cap[STAGE].value; + stage = inst->capabilities[STAGE].value; rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32, &stage, sizeof(u32), __func__); @@ -4120,7 +4038,7 @@ int msm_vidc_set_pipe(void *instance, struct msm_vidc_core *core; struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; - if (!inst || !inst->capabilities || !inst->core) { + if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -4133,7 +4051,7 @@ int msm_vidc_set_pipe(void *instance, return -EINVAL; } - pipe = inst->capabilities->cap[PIPE].value; + pipe = inst->capabilities[PIPE].value; rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32, &pipe, sizeof(u32), __func__); if (rc) @@ -4149,7 +4067,7 @@ int msm_vidc_set_vui_timing_info(void *instance, struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; u32 hfi_value; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -4159,7 +4077,7 @@ int msm_vidc_set_vui_timing_info(void *instance, * V4L2_CID_MPEG_VIDC_VUI_TIMING_INFO and hence reverse * the hfi_value from cap_id value. */ - if (inst->capabilities->cap[cap_id].value == 1) + if (inst->capabilities[cap_id].value == 1) hfi_value = 0; else hfi_value = 1; @@ -4179,16 +4097,16 @@ int msm_vidc_set_outbuf_fence_type(void *instance, struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; u32 hfi_value; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - if (inst->capabilities->cap[OUTBUF_FENCE_TYPE].value == + if (inst->capabilities[OUTBUF_FENCE_TYPE].value == MSM_VIDC_FENCE_NONE) return 0; - hfi_value = inst->capabilities->cap[cap_id].value; + hfi_value = inst->capabilities[cap_id].value; rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32_ENUM, &hfi_value, sizeof(u32), __func__); @@ -4205,16 +4123,16 @@ int msm_vidc_set_outbuf_fence_direction(void *instance, struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; u32 hfi_value; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - if (inst->capabilities->cap[OUTBUF_FENCE_DIRECTION].value == + if (inst->capabilities[OUTBUF_FENCE_DIRECTION].value == MSM_VIDC_FENCE_DIR_NONE) return 0; - hfi_value = inst->capabilities->cap[cap_id].value; + hfi_value = inst->capabilities[cap_id].value; rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32_ENUM, &hfi_value, sizeof(u32), __func__); diff --git a/driver/platform/common/src/msm_vidc_platform_ext.c b/driver/platform/common/src/msm_vidc_platform_ext.c index 1cef5bb78c..0d973b7e16 100644 --- a/driver/platform/common/src/msm_vidc_platform_ext.c +++ b/driver/platform/common/src/msm_vidc_platform_ext.c @@ -16,18 +16,16 @@ int msm_vidc_adjust_ir_period(void *instance, struct v4l2_ctrl *ctrl) { - struct msm_vidc_inst_capability *capability; s32 adjusted_value, all_intra = 0, roi_enable = 0, pix_fmts = MSM_VIDC_FMT_NONE; struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - capability = inst->capabilities; - adjusted_value = ctrl ? ctrl->val : capability->cap[IR_PERIOD].value; + adjusted_value = ctrl ? ctrl->val : inst->capabilities[IR_PERIOD].value; if (msm_vidc_get_parent_value(inst, IR_PERIOD, ALL_INTRA, &all_intra, __func__) || @@ -82,11 +80,10 @@ exit: int msm_vidc_adjust_dec_frame_rate(void *instance, struct v4l2_ctrl *ctrl) { - struct msm_vidc_inst_capability *capability; struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; u32 adjusted_value = 0; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -96,8 +93,7 @@ int msm_vidc_adjust_dec_frame_rate(void *instance, struct v4l2_ctrl *ctrl) return -EINVAL; } - capability = inst->capabilities; - adjusted_value = ctrl ? ctrl->val : capability->cap[FRAME_RATE].value; + adjusted_value = ctrl ? ctrl->val : inst->capabilities[FRAME_RATE].value; msm_vidc_update_cap_value(inst, FRAME_RATE, adjusted_value, __func__); return 0; @@ -105,11 +101,10 @@ int msm_vidc_adjust_dec_frame_rate(void *instance, struct v4l2_ctrl *ctrl) int msm_vidc_adjust_dec_operating_rate(void *instance, struct v4l2_ctrl *ctrl) { - struct msm_vidc_inst_capability *capability; struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; u32 adjusted_value = 0; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -119,8 +114,7 @@ int msm_vidc_adjust_dec_operating_rate(void *instance, struct v4l2_ctrl *ctrl) return -EINVAL; } - capability = inst->capabilities; - adjusted_value = ctrl ? ctrl->val : capability->cap[OPERATING_RATE].value; + adjusted_value = ctrl ? ctrl->val : inst->capabilities[OPERATING_RATE].value; msm_vidc_update_cap_value(inst, OPERATING_RATE, adjusted_value, __func__); return 0; @@ -128,12 +122,11 @@ int msm_vidc_adjust_dec_operating_rate(void *instance, struct v4l2_ctrl *ctrl) int msm_vidc_adjust_delivery_mode(void *instance, struct v4l2_ctrl *ctrl) { - struct msm_vidc_inst_capability *capability; s32 adjusted_value; s32 slice_mode = -1; struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -141,9 +134,8 @@ int msm_vidc_adjust_delivery_mode(void *instance, struct v4l2_ctrl *ctrl) if (is_decode_session(inst)) return 0; - capability = inst->capabilities; - adjusted_value = ctrl ? ctrl->val : capability->cap[DELIVERY_MODE].value; + adjusted_value = ctrl ? ctrl->val : inst->capabilities[DELIVERY_MODE].value; if (msm_vidc_get_parent_value(inst, DELIVERY_MODE, SLICE_MODE, &slice_mode, __func__)) @@ -167,14 +159,14 @@ int msm_vidc_set_ir_period(void *instance, u32 ir_type = 0; struct msm_vidc_core *core; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } core = inst->core; - if (inst->capabilities->cap[IR_TYPE].value == + if (inst->capabilities[IR_TYPE].value == V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_RANDOM) { if (inst->bufq[OUTPUT_PORT].vb2q->streaming) { i_vpr_h(inst, "%s: dynamic random intra refresh not allowed\n", @@ -182,19 +174,19 @@ int msm_vidc_set_ir_period(void *instance, return 0; } ir_type = HFI_PROP_IR_RANDOM_PERIOD; - } else if (inst->capabilities->cap[IR_TYPE].value == + } else if (inst->capabilities[IR_TYPE].value == V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_CYCLIC) { ir_type = HFI_PROP_IR_CYCLIC_PERIOD; } else { i_vpr_e(inst, "%s: invalid ir_type %d\n", - __func__, inst->capabilities->cap[IR_TYPE]); + __func__, inst->capabilities[IR_TYPE]); return -EINVAL; } rc = venus_hfi_set_ir_period(inst, ir_type, cap_id); if (rc) { i_vpr_e(inst, "%s: failed to set ir period %d\n", - __func__, inst->capabilities->cap[IR_PERIOD].value); + __func__, inst->capabilities[IR_PERIOD].value); return rc; } @@ -206,7 +198,6 @@ int msm_vidc_set_signal_color_info(void *instance, { int rc = 0; struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; - struct msm_vidc_inst_capability *capability; u32 color_info, matrix_coeff, transfer_char, primaries, range; u32 full_range = 0; u32 colour_description_present_flag = 0; @@ -216,18 +207,17 @@ int msm_vidc_set_signal_color_info(void *instance, /* Unspecified video format */ u32 video_format = 5; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - capability = inst->capabilities; - if (!(capability->cap[cap_id].flags & CAP_FLAG_CLIENT_SET)) { + if (!(inst->capabilities[cap_id].flags & CAP_FLAG_CLIENT_SET)) { i_vpr_h(inst, "%s: colorspace not configured via control\n", __func__); return 0; } - color_info = capability->cap[cap_id].value; + color_info = inst->capabilities[cap_id].value; matrix_coeff = color_info & 0xFF; transfer_char = (color_info & 0xFF00) >> 8; primaries = (color_info & 0xFF0000) >> 16; @@ -279,21 +269,19 @@ int msm_vidc_set_signal_color_info(void *instance, int msm_vidc_adjust_csc(void *instance, struct v4l2_ctrl *ctrl) { - struct msm_vidc_inst_capability *capability; s32 adjusted_value; s32 pix_fmt = -1; struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - capability = inst->capabilities; if (is_decode_session(inst)) return 0; - adjusted_value = ctrl ? ctrl->val : capability->cap[CSC].value; + adjusted_value = ctrl ? ctrl->val : inst->capabilities[CSC].value; if (msm_vidc_get_parent_value(inst, CSC, PIX_FMTS, &pix_fmt, __func__)) diff --git a/driver/platform/pineapple/src/msm_vidc_pineapple.c b/driver/platform/pineapple/src/msm_vidc_pineapple.c index d3302657b9..a860ba834c 100644 --- a/driver/platform/pineapple/src/msm_vidc_pineapple.c +++ b/driver/platform/pineapple/src/msm_vidc_pineapple.c @@ -339,7 +339,7 @@ static int msm_vidc_set_ring_buffer_count_pineapple(void *instance, struct msm_vidc_core* core; u32 count = 0, data_size = 0, pixel_count = 0, fps = 0; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -347,7 +347,7 @@ static int msm_vidc_set_ring_buffer_count_pineapple(void *instance, output_fmt = &inst->fmts[OUTPUT_PORT]; input_fmt = &inst->fmts[INPUT_PORT]; - fps = inst->capabilities->cap[FRAME_RATE].value >> 16; + fps = inst->capabilities[FRAME_RATE].value >> 16; pixel_count = output_fmt->fmt.pix_mp.width * output_fmt->fmt.pix_mp.height; @@ -360,7 +360,7 @@ static int msm_vidc_set_ring_buffer_count_pineapple(void *instance, "%s: session %ux%u@%u fps does not support ring buffer\n", __func__, output_fmt->fmt.pix_mp.width, output_fmt->fmt.pix_mp.height, fps); - inst->capabilities->cap[cap_id].value = 0; + inst->capabilities[cap_id].value = 0; } else { data_size = input_fmt->fmt.pix_mp.plane_fmt[0].sizeimage; rc = call_session_op(core, ring_buf_count, inst, data_size); @@ -369,11 +369,11 @@ static int msm_vidc_set_ring_buffer_count_pineapple(void *instance, __func__); /* ignore error */ rc = 0; - inst->capabilities->cap[cap_id].value = 0; + inst->capabilities[cap_id].value = 0; } } - count = inst->capabilities->cap[cap_id].value; + count = inst->capabilities[cap_id].value; i_vpr_h(inst, "%s: ring buffer count: %u\n", __func__, count); rc = venus_hfi_session_property(inst, HFI_PROP_ENC_RING_BIN_BUF, diff --git a/driver/platform/pineapple/src/pineapple.c b/driver/platform/pineapple/src/pineapple.c index 177a8d78a1..39f88eae46 100644 --- a/driver/platform/pineapple/src/pineapple.c +++ b/driver/platform/pineapple/src/pineapple.c @@ -233,7 +233,7 @@ static int msm_vidc_set_ring_buffer_count_pineapple(void *instance, struct msm_vidc_core* core; u32 count = 0, data_size = 0, pixel_count = 0, fps = 0; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -241,7 +241,7 @@ static int msm_vidc_set_ring_buffer_count_pineapple(void *instance, output_fmt = &inst->fmts[OUTPUT_PORT]; input_fmt = &inst->fmts[INPUT_PORT]; - fps = inst->capabilities->cap[FRAME_RATE].value >> 16; + fps = inst->capabilities[FRAME_RATE].value >> 16; pixel_count = output_fmt->fmt.pix_mp.width * output_fmt->fmt.pix_mp.height; @@ -254,7 +254,7 @@ static int msm_vidc_set_ring_buffer_count_pineapple(void *instance, "%s: session %ux%u@%u fps does not support ring buffer\n", __func__, output_fmt->fmt.pix_mp.width, output_fmt->fmt.pix_mp.height, fps); - inst->capabilities->cap[cap_id].value = 0; + inst->capabilities[cap_id].value = 0; } else { data_size = input_fmt->fmt.pix_mp.plane_fmt[0].sizeimage; rc = call_session_op(core, ring_buf_count, inst, data_size); @@ -263,11 +263,11 @@ static int msm_vidc_set_ring_buffer_count_pineapple(void *instance, __func__); /* ignore error */ rc = 0; - inst->capabilities->cap[cap_id].value = 0; + inst->capabilities[cap_id].value = 0; } } - count = inst->capabilities->cap[cap_id].value; + count = inst->capabilities[cap_id].value; i_vpr_h(inst, "%s: ring buffer count: %u\n", __func__, count); rc = venus_hfi_session_property(inst, HFI_PROP_ENC_RING_BIN_BUF, diff --git a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c index d5dce42a57..07b6749f64 100644 --- a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c @@ -24,7 +24,7 @@ static u32 msm_vidc_decoder_bin_size_iris2(struct msm_vidc_inst *inst) bool is_interlaced; u32 vpp_delay; - if (!inst || !inst->core || !inst->capabilities) { + if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return size; } @@ -39,7 +39,7 @@ static u32 msm_vidc_decoder_bin_size_iris2(struct msm_vidc_inst *inst) vpp_delay = inst->decode_vpp_delay.size; else vpp_delay = DEFAULT_BSE_VPP_DELAY; - if (inst->capabilities->cap[CODED_FRAMES].value == + if (inst->capabilities[CODED_FRAMES].value == CODED_FRAMES_PROGRESSIVE) is_interlaced = false; else @@ -189,7 +189,7 @@ static u32 msm_vidc_decoder_persist_size_iris2(struct msm_vidc_inst *inst) return size; } - if (inst->capabilities->cap[META_DOLBY_RPU].value) + if (inst->capabilities[META_DOLBY_RPU].value) rpu_enabled = 1; if (inst->codec == MSM_VIDC_H264) @@ -214,7 +214,7 @@ static u32 msm_vidc_decoder_dpb_size_iris2(struct msm_vidc_inst *inst) return size; } - color_fmt = inst->capabilities->cap[PIX_FMTS].value; + color_fmt = inst->capabilities[PIX_FMTS].value; if (!is_linear_colorformat(color_fmt)) return size; @@ -258,7 +258,7 @@ static u32 msm_vidc_encoder_bin_size_iris2(struct msm_vidc_inst *inst) u32 width, height, num_vpp_pipes, stage; struct v4l2_format *f; - if (!inst || !inst->core || !inst->capabilities) { + if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return size; } @@ -268,7 +268,7 @@ static u32 msm_vidc_encoder_bin_size_iris2(struct msm_vidc_inst *inst) return size; } num_vpp_pipes = core->capabilities[NUM_VPP_PIPE].value; - stage = inst->capabilities->cap[STAGE].value; + stage = inst->capabilities[STAGE].value; f = &inst->fmts[OUTPUT_PORT]; width = f->fmt.pix_mp.width; height = f->fmt.pix_mp.height; @@ -291,13 +291,13 @@ static u32 msm_vidc_get_recon_buf_count(struct msm_vidc_inst *inst) bool is_hybrid_hp = false; u32 hfi_codec = 0; - n_bframe = inst->capabilities->cap[B_FRAME].value; - ltr_count = inst->capabilities->cap[LTR_COUNT].value; + n_bframe = inst->capabilities[B_FRAME].value; + ltr_count = inst->capabilities[LTR_COUNT].value; if (inst->hfi_layer_type == HFI_HIER_B) { - hb_layers = inst->capabilities->cap[ENH_LAYER_COUNT].value + 1; + hb_layers = inst->capabilities[ENH_LAYER_COUNT].value + 1; } else { - hp_layers = inst->capabilities->cap[ENH_LAYER_COUNT].value + 1; + hp_layers = inst->capabilities[ENH_LAYER_COUNT].value + 1; if (inst->hfi_layer_type == HFI_HIER_P_HYBRID_LTR) is_hybrid_hp = true; } @@ -319,7 +319,7 @@ static u32 msm_vidc_encoder_comv_size_iris2(struct msm_vidc_inst* inst) u32 width, height, num_recon = 0; struct v4l2_format* f; - if (!inst || !inst->core || !inst->capabilities) { + if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return size; } @@ -381,12 +381,12 @@ static u32 msm_vidc_encoder_line_size_iris2(struct msm_vidc_inst *inst) return size; } core = inst->core; - if (!core->capabilities || !inst->capabilities) { + if (!core->capabilities) { i_vpr_e(inst, "%s: invalid capabilities\n", __func__); return size; } num_vpp_pipes = core->capabilities[NUM_VPP_PIPE].value; - pixfmt = inst->capabilities->cap[PIX_FMTS].value; + pixfmt = inst->capabilities[PIX_FMTS].value; f = &inst->fmts[OUTPUT_PORT]; width = f->fmt.pix_mp.width; @@ -409,7 +409,7 @@ static u32 msm_vidc_encoder_dpb_size_iris2(struct msm_vidc_inst *inst) struct v4l2_format *f; bool is_tenbit; - if (!inst || !inst->core || !inst->capabilities) { + if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return 0; } @@ -418,7 +418,7 @@ static u32 msm_vidc_encoder_dpb_size_iris2(struct msm_vidc_inst *inst) width = f->fmt.pix_mp.width; height = f->fmt.pix_mp.height; - pixfmt = inst->capabilities->cap[PIX_FMTS].value; + pixfmt = inst->capabilities[PIX_FMTS].value; is_tenbit = (pixfmt == MSM_VIDC_FMT_P010 || pixfmt == MSM_VIDC_FMT_TP10C); if (inst->codec == MSM_VIDC_H264) @@ -452,7 +452,7 @@ static u32 msm_vidc_encoder_vpss_size_iris2(struct msm_vidc_inst* inst) u32 width, height, driver_colorfmt; struct v4l2_format* f; - if (!inst || !inst->core || !inst->capabilities) { + if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return 0; } @@ -478,7 +478,7 @@ static u32 msm_vidc_encoder_vpss_size_iris2(struct msm_vidc_inst* inst) driver_colorfmt = v4l2_colorformat_to_driver(inst, f->fmt.pix_mp.pixelformat, __func__); is_tenbit = is_10bit_colorformat(driver_colorfmt); - if (inst->capabilities->cap[BLUR_TYPES].value != MSM_VIDC_BLUR_NONE) + if (inst->capabilities[BLUR_TYPES].value != MSM_VIDC_BLUR_NONE) blur = true; HFI_BUFFER_VPSS_ENC(size, width, height, ds_enable, blur, is_tenbit); @@ -562,7 +562,7 @@ static int msm_vidc_input_min_count_iris2(struct msm_vidc_inst* inst) u32 input_min_count = 0; u32 total_hb_layer = 0; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return 0; } @@ -571,9 +571,9 @@ static int msm_vidc_input_min_count_iris2(struct msm_vidc_inst* inst) input_min_count = MIN_DEC_INPUT_BUFFERS; } else if (is_encode_session(inst)) { total_hb_layer = is_hierb_type_requested(inst) ? - inst->capabilities->cap[ENH_LAYER_COUNT].value + 1 : 0; + inst->capabilities[ENH_LAYER_COUNT].value + 1 : 0; if (inst->codec == MSM_VIDC_H264 && - !inst->capabilities->cap[LAYER_ENABLE].value) { + !inst->capabilities[LAYER_ENABLE].value) { total_hb_layer = 0; } HFI_IRIS2_ENC_MIN_INPUT_BUF_COUNT(input_min_count, @@ -601,7 +601,7 @@ static int msm_buffer_dpb_count(struct msm_vidc_inst *inst) /* decoder dpb buffer count */ if (is_decode_session(inst)) { - color_fmt = inst->capabilities->cap[PIX_FMTS].value; + color_fmt = inst->capabilities[PIX_FMTS].value; if (is_linear_colorformat(color_fmt)) count = inst->buffers.output.min_count; diff --git a/driver/variant/iris2/src/msm_vidc_iris2.c b/driver/variant/iris2/src/msm_vidc_iris2.c index 032c2043d6..4819bd4be0 100644 --- a/driver/variant/iris2/src/msm_vidc_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_iris2.c @@ -815,7 +815,7 @@ int msm_vidc_decide_work_mode_iris2(struct msm_vidc_inst* inst) u32 width, height; bool res_ok = false; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -833,9 +833,9 @@ int msm_vidc_decide_work_mode_iris2(struct msm_vidc_inst* inst) height = inp_f->fmt.pix_mp.height; width = inp_f->fmt.pix_mp.width; res_ok = res_is_less_than(width, height, 1280, 720); - if (inst->capabilities->cap[CODED_FRAMES].value == + if (inst->capabilities[CODED_FRAMES].value == CODED_FRAMES_INTERLACE || - inst->capabilities->cap[LOWLATENCY_MODE].value || + inst->capabilities[LOWLATENCY_MODE].value || res_ok) { work_mode = MSM_VIDC_STAGE_1; } @@ -844,13 +844,13 @@ int msm_vidc_decide_work_mode_iris2(struct msm_vidc_inst* inst) width = inst->crop.width; res_ok = !res_is_greater_than(width, height, 4096, 2160); if (res_ok && - (inst->capabilities->cap[LOWLATENCY_MODE].value)) { + (inst->capabilities[LOWLATENCY_MODE].value)) { work_mode = MSM_VIDC_STAGE_1; } - if (inst->capabilities->cap[LOSSLESS].value) + if (inst->capabilities[LOSSLESS].value) work_mode = MSM_VIDC_STAGE_2; - if (!inst->capabilities->cap[GOP_SIZE].value) + if (!inst->capabilities[GOP_SIZE].value) work_mode = MSM_VIDC_STAGE_2; } else { i_vpr_e(inst, "%s: invalid session type\n", __func__); @@ -859,8 +859,8 @@ int msm_vidc_decide_work_mode_iris2(struct msm_vidc_inst* inst) exit: i_vpr_h(inst, "Configuring work mode = %u low latency = %u, gop size = %u\n", - work_mode, inst->capabilities->cap[LOWLATENCY_MODE].value, - inst->capabilities->cap[GOP_SIZE].value); + work_mode, inst->capabilities[LOWLATENCY_MODE].value, + inst->capabilities[GOP_SIZE].value); msm_vidc_update_cap_value(inst, STAGE, work_mode, __func__); return 0; @@ -883,13 +883,13 @@ int msm_vidc_decide_work_route_iris2(struct msm_vidc_inst* inst) goto exit; if (is_decode_session(inst)) { - if (inst->capabilities->cap[CODED_FRAMES].value == + if (inst->capabilities[CODED_FRAMES].value == CODED_FRAMES_INTERLACE) work_route = MSM_VIDC_PIPE_1; } else if (is_encode_session(inst)) { u32 slice_mode; - slice_mode = inst->capabilities->cap[SLICE_MODE].value; + slice_mode = inst->capabilities[SLICE_MODE].value; /*TODO Pipe=1 for legacy CBR*/ if (slice_mode == V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_BYTES) @@ -909,21 +909,18 @@ exit: int msm_vidc_adjust_blur_type_iris2(void *instance, struct v4l2_ctrl *ctrl) { - struct msm_vidc_inst_capability *capability; s32 adjusted_value; struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; s32 rc_type = -1, cac = -1; s32 pix_fmts = -1, min_quality = -1; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - capability = inst->capabilities; - adjusted_value = ctrl ? ctrl->val : - capability->cap[BLUR_TYPES].value; + inst->capabilities[BLUR_TYPES].value; if (adjusted_value == MSM_VIDC_BLUR_NONE) return 0; @@ -959,18 +956,15 @@ int msm_vidc_adjust_blur_type_iris2(void *instance, struct v4l2_ctrl *ctrl) int msm_vidc_decide_quality_mode_iris2(struct msm_vidc_inst* inst) { - struct msm_vidc_inst_capability* capability = NULL; struct msm_vidc_core *core; u32 mbpf, mbps, max_hq_mbpf, max_hq_mbps; u32 mode = MSM_VIDC_POWER_SAVE_MODE; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - capability = inst->capabilities; - if (!is_encode_session(inst)) return 0; @@ -989,13 +983,13 @@ int msm_vidc_decide_quality_mode_iris2(struct msm_vidc_inst* inst) /* NRT session to have max quality unless client configures lesser complexity */ if (!is_realtime_session(inst) && mbpf <= max_hq_mbpf) { mode = MSM_VIDC_MAX_QUALITY_MODE; - if (capability->cap[COMPLEXITY].value < DEFAULT_COMPLEXITY) + if (inst->capabilities[COMPLEXITY].value < DEFAULT_COMPLEXITY) mode = MSM_VIDC_POWER_SAVE_MODE; goto exit; } /* Power saving always disabled for CQ and LOSSLESS RC modes. */ - if (capability->cap[LOSSLESS].value || + if (inst->capabilities[LOSSLESS].value || (mbpf <= max_hq_mbpf && mbps <= max_hq_mbps)) mode = MSM_VIDC_MAX_QUALITY_MODE; diff --git a/driver/variant/iris2/src/msm_vidc_power_iris2.c b/driver/variant/iris2/src/msm_vidc_power_iris2.c index 4b28fa4495..a24c569bb9 100644 --- a/driver/variant/iris2/src/msm_vidc_power_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_power_iris2.c @@ -22,7 +22,7 @@ u64 msm_vidc_calc_freq_iris2(struct msm_vidc_inst *inst, u32 data_size) u32 base_cycles = 0; u32 fps, mbpf; - if (!inst || !inst->core || !inst->capabilities) { + if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return freq; } @@ -42,26 +42,26 @@ u64 msm_vidc_calc_freq_iris2(struct msm_vidc_inst *inst, u32 data_size) * Even though, most part is common now, in future it may change * between them. */ - fw_cycles = fps * inst->capabilities->cap[MB_CYCLES_FW].value; - fw_vpp_cycles = fps * inst->capabilities->cap[MB_CYCLES_FW_VPP].value; + fw_cycles = fps * inst->capabilities[MB_CYCLES_FW].value; + fw_vpp_cycles = fps * inst->capabilities[MB_CYCLES_FW_VPP].value; if (inst->domain == MSM_VIDC_ENCODER) { vpp_cycles_per_mb = is_low_power_session(inst) ? - inst->capabilities->cap[MB_CYCLES_LP].value : - inst->capabilities->cap[MB_CYCLES_VPP].value; + inst->capabilities[MB_CYCLES_LP].value : + inst->capabilities[MB_CYCLES_VPP].value; vpp_cycles = mbs_per_second * vpp_cycles_per_mb / - inst->capabilities->cap[PIPE].value; + inst->capabilities[PIPE].value; /* Factor 1.25 for IbP and 1.375 for I1B2b1P GOP structure */ - if (inst->capabilities->cap[B_FRAME].value > 1) + if (inst->capabilities[B_FRAME].value > 1) vpp_cycles += (vpp_cycles / 4) + (vpp_cycles / 8); - else if (inst->capabilities->cap[B_FRAME].value) + else if (inst->capabilities[B_FRAME].value) vpp_cycles += vpp_cycles / 4; /* 21 / 20 is minimum overhead factor */ vpp_cycles += max(div_u64(vpp_cycles, 20), fw_vpp_cycles); /* 1.01 is multi-pipe overhead */ - if (inst->capabilities->cap[PIPE].value > 1) + if (inst->capabilities[PIPE].value > 1) vpp_cycles += div_u64(vpp_cycles, 100); /* * 1080p@480fps usecase needs exactly 338MHz @@ -80,20 +80,20 @@ u64 msm_vidc_calc_freq_iris2(struct msm_vidc_inst *inst, u32 data_size) /* VSP */ /* bitrate is based on fps, scale it using operating rate */ - operating_rate = inst->capabilities->cap[OPERATING_RATE].value >> 16; + operating_rate = inst->capabilities[OPERATING_RATE].value >> 16; if (operating_rate > - (inst->capabilities->cap[FRAME_RATE].value >> 16) && - (inst->capabilities->cap[FRAME_RATE].value >> 16)) { + (inst->capabilities[FRAME_RATE].value >> 16) && + (inst->capabilities[FRAME_RATE].value >> 16)) { vsp_factor_num = operating_rate; - vsp_factor_den = inst->capabilities->cap[FRAME_RATE].value >> 16; + vsp_factor_den = inst->capabilities[FRAME_RATE].value >> 16; } - vsp_cycles = div_u64(((u64)inst->capabilities->cap[BIT_RATE].value * + vsp_cycles = div_u64(((u64)inst->capabilities[BIT_RATE].value * vsp_factor_num), vsp_factor_den); - base_cycles = inst->capabilities->cap[MB_CYCLES_VSP].value; + base_cycles = inst->capabilities[MB_CYCLES_VSP].value; if (inst->codec == MSM_VIDC_VP9) { vsp_cycles = div_u64(vsp_cycles * 170, 100); - } else if (inst->capabilities->cap[ENTROPY_MODE].value == + } else if (inst->capabilities[ENTROPY_MODE].value == V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC) { vsp_cycles = div_u64(vsp_cycles * 135, 100); } else { @@ -103,30 +103,30 @@ u64 msm_vidc_calc_freq_iris2(struct msm_vidc_inst *inst, u32 data_size) /* VSP FW Overhead 1.05 */ vsp_cycles = div_u64(vsp_cycles * 21, 20); - if (inst->capabilities->cap[STAGE].value == MSM_VIDC_STAGE_1) + if (inst->capabilities[STAGE].value == MSM_VIDC_STAGE_1) vsp_cycles = vsp_cycles * 3; vsp_cycles += mbs_per_second * base_cycles; } else if (inst->domain == MSM_VIDC_DECODER) { /* VPP */ - vpp_cycles = mbs_per_second * inst->capabilities->cap[MB_CYCLES_VPP].value / - inst->capabilities->cap[PIPE].value; + vpp_cycles = mbs_per_second * inst->capabilities[MB_CYCLES_VPP].value / + inst->capabilities[PIPE].value; /* 21 / 20 is minimum overhead factor */ vpp_cycles += max(vpp_cycles / 20, fw_vpp_cycles); /* 1.059 is multi-pipe overhead */ - if (inst->capabilities->cap[PIPE].value > 1) + if (inst->capabilities[PIPE].value > 1) vpp_cycles += div_u64(vpp_cycles * 59, 1000); /* VSP */ base_cycles = inst->has_bframe ? - 80 : inst->capabilities->cap[MB_CYCLES_VSP].value; + 80 : inst->capabilities[MB_CYCLES_VSP].value; bitrate = fps * data_size * 8; vsp_cycles = bitrate; if (inst->codec == MSM_VIDC_VP9) { vsp_cycles = div_u64(vsp_cycles * 170, 100); - } else if (inst->capabilities->cap[ENTROPY_MODE].value == + } else if (inst->capabilities[ENTROPY_MODE].value == V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC) { vsp_cycles = div_u64(vsp_cycles * 135, 100); } else { @@ -136,7 +136,7 @@ u64 msm_vidc_calc_freq_iris2(struct msm_vidc_inst *inst, u32 data_size) /* VSP FW overhead 1.05 */ vsp_cycles = div_u64(vsp_cycles * 21, 20); - if (inst->capabilities->cap[STAGE].value == MSM_VIDC_STAGE_1) + if (inst->capabilities[STAGE].value == MSM_VIDC_STAGE_1) vsp_cycles = vsp_cycles * 3; vsp_cycles += mbs_per_second * base_cycles; @@ -146,9 +146,9 @@ u64 msm_vidc_calc_freq_iris2(struct msm_vidc_inst *inst, u32 data_size) vsp_cycles += div_u64(vpp_cycles * 25, 100); if (inst->codec == MSM_VIDC_VP9 && - inst->capabilities->cap[STAGE].value == + inst->capabilities[STAGE].value == MSM_VIDC_STAGE_2 && - inst->capabilities->cap[PIPE].value == 4 && + inst->capabilities[PIPE].value == 4 && bitrate > 90000000) vsp_cycles = msm_vidc_max_freq(inst); } else { diff --git a/driver/variant/iris3/src/msm_vidc_buffer_iris3.c b/driver/variant/iris3/src/msm_vidc_buffer_iris3.c index 5d885be391..294c0963a3 100644 --- a/driver/variant/iris3/src/msm_vidc_buffer_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_buffer_iris3.c @@ -24,7 +24,7 @@ static u32 msm_vidc_decoder_bin_size_iris3(struct msm_vidc_inst *inst) bool is_interlaced; u32 vpp_delay; - if (!inst || !inst->core || !inst->capabilities) { + if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return size; } @@ -39,7 +39,7 @@ static u32 msm_vidc_decoder_bin_size_iris3(struct msm_vidc_inst *inst) vpp_delay = inst->decode_vpp_delay.size; else vpp_delay = DEFAULT_BSE_VPP_DELAY; - if (inst->capabilities->cap[CODED_FRAMES].value == + if (inst->capabilities[CODED_FRAMES].value == CODED_FRAMES_PROGRESSIVE) is_interlaced = false; else @@ -70,7 +70,7 @@ static u32 msm_vidc_decoder_comv_size_iris3(struct msm_vidc_inst* inst) u32 width, height, num_comv, vpp_delay; struct v4l2_format *f; - if (!inst || !inst->core || !inst->capabilities) { + if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return size; } @@ -111,7 +111,7 @@ static u32 msm_vidc_decoder_comv_size_iris3(struct msm_vidc_inst* inst) * should not be allocated separately. * When DRAP is disabled, COMV buffer must be allocated. */ - if (inst->capabilities->cap[DRAP].value) + if (inst->capabilities[DRAP].value) size = 0; else HFI_BUFFER_COMV_AV1D(size, width, height, num_comv); @@ -242,7 +242,7 @@ static u32 msm_vidc_decoder_persist_size_iris3(struct msm_vidc_inst *inst) return size; } - if (inst->capabilities->cap[META_DOLBY_RPU].value) + if (inst->capabilities[META_DOLBY_RPU].value) rpu_enabled = 1; if (inst->codec == MSM_VIDC_H264) { @@ -259,10 +259,10 @@ static u32 msm_vidc_decoder_persist_size_iris3(struct msm_vidc_inst *inst) * When DRAP is disabled, COMV buffer should not be included in PERSIST * buffer. */ - if (inst->capabilities->cap[DRAP].value) + if (inst->capabilities[DRAP].value) HFI_BUFFER_PERSIST_AV1D(size, - inst->capabilities->cap[FRAME_WIDTH].max, - inst->capabilities->cap[FRAME_HEIGHT].max, 16); + inst->capabilities[FRAME_WIDTH].max, + inst->capabilities[FRAME_HEIGHT].max, 16); else HFI_BUFFER_PERSIST_AV1D(size, 0, 0, 0); } @@ -289,13 +289,13 @@ static u32 msm_vidc_decoder_dpb_size_iris3(struct msm_vidc_inst *inst) * for linear formats. For AV1, DPB is needed for film-grain * enabled bitstreams (UBWC & linear). */ - color_fmt = inst->capabilities->cap[PIX_FMTS].value; + color_fmt = inst->capabilities[PIX_FMTS].value; if (!is_linear_colorformat(color_fmt)) { if (inst->codec != MSM_VIDC_AV1) return size; if (inst->codec == MSM_VIDC_AV1 && - !inst->capabilities->cap[FILM_GRAIN].value) + !inst->capabilities[FILM_GRAIN].value) return size; } @@ -341,7 +341,7 @@ static u32 msm_vidc_encoder_bin_size_iris3(struct msm_vidc_inst *inst) u32 width, height, num_vpp_pipes, stage, profile; struct v4l2_format *f; - if (!inst || !inst->core || !inst->capabilities) { + if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return size; } @@ -351,11 +351,11 @@ static u32 msm_vidc_encoder_bin_size_iris3(struct msm_vidc_inst *inst) return size; } num_vpp_pipes = core->capabilities[NUM_VPP_PIPE].value; - stage = inst->capabilities->cap[STAGE].value; + stage = inst->capabilities[STAGE].value; f = &inst->fmts[OUTPUT_PORT]; width = f->fmt.pix_mp.width; height = f->fmt.pix_mp.height; - profile = inst->capabilities->cap[PROFILE].value; + profile = inst->capabilities[PROFILE].value; if (inst->codec == MSM_VIDC_H264) HFI_BUFFER_BIN_H264E(size, inst->hfi_rc_type, width, @@ -375,13 +375,13 @@ static u32 msm_vidc_get_recon_buf_count(struct msm_vidc_inst *inst) bool is_hybrid_hp = false; u32 hfi_codec = 0; - n_bframe = inst->capabilities->cap[B_FRAME].value; - ltr_count = inst->capabilities->cap[LTR_COUNT].value; + n_bframe = inst->capabilities[B_FRAME].value; + ltr_count = inst->capabilities[LTR_COUNT].value; if (inst->hfi_layer_type == HFI_HIER_B) { - hb_layers = inst->capabilities->cap[ENH_LAYER_COUNT].value + 1; + hb_layers = inst->capabilities[ENH_LAYER_COUNT].value + 1; } else { - hp_layers = inst->capabilities->cap[ENH_LAYER_COUNT].value + 1; + hp_layers = inst->capabilities[ENH_LAYER_COUNT].value + 1; if (inst->hfi_layer_type == HFI_HIER_P_HYBRID_LTR) is_hybrid_hp = true; } @@ -403,7 +403,7 @@ static u32 msm_vidc_encoder_comv_size_iris3(struct msm_vidc_inst* inst) u32 width, height, num_recon = 0; struct v4l2_format* f; - if (!inst || !inst->core || !inst->capabilities) { + if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return size; } @@ -465,12 +465,12 @@ static u32 msm_vidc_encoder_line_size_iris3(struct msm_vidc_inst *inst) return size; } core = inst->core; - if (!core->capabilities || !inst->capabilities) { + if (!core->capabilities) { i_vpr_e(inst, "%s: invalid capabilities\n", __func__); return size; } num_vpp_pipes = core->capabilities[NUM_VPP_PIPE].value; - pixfmt = inst->capabilities->cap[PIX_FMTS].value; + pixfmt = inst->capabilities[PIX_FMTS].value; f = &inst->fmts[OUTPUT_PORT]; width = f->fmt.pix_mp.width; @@ -493,7 +493,7 @@ static u32 msm_vidc_encoder_dpb_size_iris3(struct msm_vidc_inst *inst) struct v4l2_format *f; bool is_tenbit; - if (!inst || !inst->core || !inst->capabilities) { + if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return 0; } @@ -502,7 +502,7 @@ static u32 msm_vidc_encoder_dpb_size_iris3(struct msm_vidc_inst *inst) width = f->fmt.pix_mp.width; height = f->fmt.pix_mp.height; - pixfmt = inst->capabilities->cap[PIX_FMTS].value; + pixfmt = inst->capabilities[PIX_FMTS].value; is_tenbit = (pixfmt == MSM_VIDC_FMT_P010 || pixfmt == MSM_VIDC_FMT_TP10C); if (inst->codec == MSM_VIDC_H264) @@ -536,7 +536,7 @@ static u32 msm_vidc_encoder_vpss_size_iris3(struct msm_vidc_inst* inst) u32 width, height, driver_colorfmt; struct v4l2_format* f; - if (!inst || !inst->core || !inst->capabilities) { + if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return 0; } @@ -562,7 +562,7 @@ static u32 msm_vidc_encoder_vpss_size_iris3(struct msm_vidc_inst* inst) driver_colorfmt = v4l2_colorformat_to_driver(inst, f->fmt.pix_mp.pixelformat, __func__); is_tenbit = is_10bit_colorformat(driver_colorfmt); - if (inst->capabilities->cap[BLUR_TYPES].value != MSM_VIDC_BLUR_NONE) + if (inst->capabilities[BLUR_TYPES].value != MSM_VIDC_BLUR_NONE) blur = true; HFI_BUFFER_VPSS_ENC(size, width, height, ds_enable, blur, is_tenbit); @@ -579,7 +579,7 @@ static u32 msm_vidc_encoder_output_size_iris3(struct msm_vidc_inst *inst) u32 hfi_rc_type = HFI_RC_VBR_CFR; enum msm_vidc_codec_type codec; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -589,8 +589,8 @@ static u32 msm_vidc_encoder_output_size_iris3(struct msm_vidc_inst *inst) if (codec == MSM_VIDC_HEVC || codec == MSM_VIDC_HEIC) is_ten_bit = true; - bitrate_mode = inst->capabilities->cap[BITRATE_MODE].value; - frame_rc = inst->capabilities->cap[FRAME_RC_ENABLE].value; + bitrate_mode = inst->capabilities[BITRATE_MODE].value; + frame_rc = inst->capabilities[FRAME_RC_ENABLE].value; if (!frame_rc && !is_image_session(inst)) hfi_rc_type = HFI_RC_OFF; else if (bitrate_mode == V4L2_MPEG_VIDEO_BITRATE_MODE_CQ) @@ -681,7 +681,7 @@ static int msm_vidc_input_min_count_iris3(struct msm_vidc_inst* inst) u32 input_min_count = 0; u32 total_hb_layer = 0; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return 0; } @@ -690,9 +690,9 @@ static int msm_vidc_input_min_count_iris3(struct msm_vidc_inst* inst) input_min_count = MIN_DEC_INPUT_BUFFERS; } else if (is_encode_session(inst)) { total_hb_layer = is_hierb_type_requested(inst) ? - inst->capabilities->cap[ENH_LAYER_COUNT].value + 1 : 0; + inst->capabilities[ENH_LAYER_COUNT].value + 1 : 0; if (inst->codec == MSM_VIDC_H264 && - !inst->capabilities->cap[LAYER_ENABLE].value) { + !inst->capabilities[LAYER_ENABLE].value) { total_hb_layer = 0; } HFI_IRIS3_ENC_MIN_INPUT_BUF_COUNT(input_min_count, @@ -720,10 +720,10 @@ static int msm_buffer_dpb_count(struct msm_vidc_inst *inst) /* decoder dpb buffer count */ if (is_decode_session(inst)) { - color_fmt = inst->capabilities->cap[PIX_FMTS].value; + color_fmt = inst->capabilities[PIX_FMTS].value; if (is_linear_colorformat(color_fmt) || (inst->codec == MSM_VIDC_AV1 && - (inst->capabilities->cap[FILM_GRAIN].value))) + (inst->capabilities[FILM_GRAIN].value))) count = inst->buffers.output.min_count; return count; @@ -743,13 +743,13 @@ static int msm_buffer_delivery_mode_based_min_count_iris3(struct msm_vidc_inst * u32 slice_mode = 0; u32 delivery_mode = 0; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return count; } - slice_mode = inst->capabilities->cap[SLICE_MODE].value; - delivery_mode = inst->capabilities->cap[DELIVERY_MODE].value; + slice_mode = inst->capabilities[SLICE_MODE].value; + delivery_mode = inst->capabilities[DELIVERY_MODE].value; if (slice_mode != V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_MB || (!delivery_mode)) @@ -759,7 +759,7 @@ static int msm_buffer_delivery_mode_based_min_count_iris3(struct msm_vidc_inst * width = f->fmt.pix_mp.width; height = f->fmt.pix_mp.height; - max_mbs_per_slice = inst->capabilities->cap[SLICE_MAX_MB].value; + max_mbs_per_slice = inst->capabilities[SLICE_MAX_MB].value; if (inst->codec == MSM_VIDC_H264) hfi_codec = HFI_CODEC_ENCODE_AVC; diff --git a/driver/variant/iris3/src/msm_vidc_iris3.c b/driver/variant/iris3/src/msm_vidc_iris3.c index ef2b2c21b5..6d81273ecb 100644 --- a/driver/variant/iris3/src/msm_vidc_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_iris3.c @@ -862,7 +862,7 @@ int msm_vidc_decide_work_mode_iris3(struct msm_vidc_inst* inst) u32 width, height; bool res_ok = false; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -880,9 +880,9 @@ int msm_vidc_decide_work_mode_iris3(struct msm_vidc_inst* inst) height = inp_f->fmt.pix_mp.height; width = inp_f->fmt.pix_mp.width; res_ok = res_is_less_than(width, height, 1280, 720); - if (inst->capabilities->cap[CODED_FRAMES].value == + if (inst->capabilities[CODED_FRAMES].value == CODED_FRAMES_INTERLACE || - inst->capabilities->cap[LOWLATENCY_MODE].value || + inst->capabilities[LOWLATENCY_MODE].value || res_ok) { work_mode = MSM_VIDC_STAGE_1; } @@ -891,17 +891,17 @@ int msm_vidc_decide_work_mode_iris3(struct msm_vidc_inst* inst) width = inst->crop.width; res_ok = !res_is_greater_than(width, height, 4096, 2160); if (res_ok && - (inst->capabilities->cap[LOWLATENCY_MODE].value)) { + (inst->capabilities[LOWLATENCY_MODE].value)) { work_mode = MSM_VIDC_STAGE_1; } - if (inst->capabilities->cap[SLICE_MODE].value == + if (inst->capabilities[SLICE_MODE].value == V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_BYTES) { work_mode = MSM_VIDC_STAGE_1; } - if (inst->capabilities->cap[LOSSLESS].value) + if (inst->capabilities[LOSSLESS].value) work_mode = MSM_VIDC_STAGE_2; - if (!inst->capabilities->cap[GOP_SIZE].value) + if (!inst->capabilities[GOP_SIZE].value) work_mode = MSM_VIDC_STAGE_2; } else { i_vpr_e(inst, "%s: invalid session type\n", __func__); @@ -910,8 +910,8 @@ int msm_vidc_decide_work_mode_iris3(struct msm_vidc_inst* inst) exit: i_vpr_h(inst, "Configuring work mode = %u low latency = %u, gop size = %u\n", - work_mode, inst->capabilities->cap[LOWLATENCY_MODE].value, - inst->capabilities->cap[GOP_SIZE].value); + work_mode, inst->capabilities[LOWLATENCY_MODE].value, + inst->capabilities[GOP_SIZE].value); msm_vidc_update_cap_value(inst, STAGE, work_mode, __func__); return 0; @@ -934,13 +934,13 @@ int msm_vidc_decide_work_route_iris3(struct msm_vidc_inst* inst) goto exit; if (is_decode_session(inst)) { - if (inst->capabilities->cap[CODED_FRAMES].value == + if (inst->capabilities[CODED_FRAMES].value == CODED_FRAMES_INTERLACE) work_route = MSM_VIDC_PIPE_1; } else if (is_encode_session(inst)) { u32 slice_mode; - slice_mode = inst->capabilities->cap[SLICE_MODE].value; + slice_mode = inst->capabilities[SLICE_MODE].value; /*TODO Pipe=1 for legacy CBR*/ if (slice_mode == V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_BYTES) @@ -960,30 +960,27 @@ exit: int msm_vidc_decide_quality_mode_iris3(struct msm_vidc_inst* inst) { - struct msm_vidc_inst_capability* capability = NULL; struct msm_vidc_core *core; u32 mbpf, mbps, max_hq_mbpf, max_hq_mbps; u32 mode = MSM_VIDC_POWER_SAVE_MODE; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - capability = inst->capabilities; - if (!is_encode_session(inst)) return 0; /* image or lossless or all intra runs at quality mode */ - if (is_image_session(inst) || capability->cap[LOSSLESS].value || - capability->cap[ALL_INTRA].value) { + if (is_image_session(inst) || inst->capabilities[LOSSLESS].value || + inst->capabilities[ALL_INTRA].value) { mode = MSM_VIDC_MAX_QUALITY_MODE; goto decision_done; } /* for lesser complexity, make LP for all resolution */ - if (capability->cap[COMPLEXITY].value < DEFAULT_COMPLEXITY) { + if (inst->capabilities[COMPLEXITY].value < DEFAULT_COMPLEXITY) { mode = MSM_VIDC_POWER_SAVE_MODE; goto decision_done; } @@ -995,8 +992,8 @@ int msm_vidc_decide_quality_mode_iris3(struct msm_vidc_inst* inst) max_hq_mbps = core->capabilities[MAX_MBPS_HQ].value;; if (!is_realtime_session(inst)) { - if (((capability->cap[COMPLEXITY].flags & CAP_FLAG_CLIENT_SET) && - (capability->cap[COMPLEXITY].value >= DEFAULT_COMPLEXITY)) || + if (((inst->capabilities[COMPLEXITY].flags & CAP_FLAG_CLIENT_SET) && + (inst->capabilities[COMPLEXITY].value >= DEFAULT_COMPLEXITY)) || mbpf <= max_hq_mbpf) { mode = MSM_VIDC_MAX_QUALITY_MODE; goto decision_done; @@ -1014,7 +1011,6 @@ decision_done: int msm_vidc_adjust_bitrate_boost_iris3(void* instance, struct v4l2_ctrl *ctrl) { - struct msm_vidc_inst_capability* capability = NULL; s32 adjusted_value; struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; s32 rc_type = -1; @@ -1022,15 +1018,13 @@ int msm_vidc_adjust_bitrate_boost_iris3(void* instance, struct v4l2_ctrl *ctrl) struct v4l2_format *f; u32 max_bitrate = 0, bitrate = 0; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - capability = inst->capabilities; - adjusted_value = ctrl ? ctrl->val : - capability->cap[BITRATE_BOOST].value; + inst->capabilities[BITRATE_BOOST].value; if (inst->bufq[OUTPUT_PORT].vb2q->streaming) return 0; @@ -1048,7 +1042,7 @@ int msm_vidc_adjust_bitrate_boost_iris3(void* instance, struct v4l2_ctrl *ctrl) goto adjust; } - frame_rate = inst->capabilities->cap[FRAME_RATE].value >> 16; + frame_rate = inst->capabilities[FRAME_RATE].value >> 16; f= &inst->fmts[OUTPUT_PORT]; width = f->fmt.pix_mp.width; height = f->fmt.pix_mp.height; @@ -1058,7 +1052,7 @@ int msm_vidc_adjust_bitrate_boost_iris3(void* instance, struct v4l2_ctrl *ctrl) * if client did not set, keep max bitrate boost upto 4k@60fps * and remove bitrate boost after 4k@60fps */ - if (capability->cap[BITRATE_BOOST].flags & CAP_FLAG_CLIENT_SET) { + if (inst->capabilities[BITRATE_BOOST].flags & CAP_FLAG_CLIENT_SET) { /* accept client set bitrate boost value as is */ } else { if (res_is_less_than_or_equal_to(width, height, 4096, 2176) && @@ -1069,7 +1063,7 @@ int msm_vidc_adjust_bitrate_boost_iris3(void* instance, struct v4l2_ctrl *ctrl) } max_bitrate = msm_vidc_get_max_bitrate(inst); - bitrate = inst->capabilities->cap[BIT_RATE].value; + bitrate = inst->capabilities[BIT_RATE].value; if (adjusted_value) { if ((bitrate + bitrate / (100 / adjusted_value)) > max_bitrate) { i_vpr_h(inst, diff --git a/driver/variant/iris3/src/msm_vidc_power_iris3.c b/driver/variant/iris3/src/msm_vidc_power_iris3.c index 49a2d77d9c..969c8b0eec 100644 --- a/driver/variant/iris3/src/msm_vidc_power_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_power_iris3.c @@ -37,7 +37,7 @@ static int msm_vidc_init_codec_input_freq(struct msm_vidc_inst *inst, u32 data_s if (inst->codec == MSM_VIDC_H264) { codec_input->codec = CODEC_H264; codec_input->lcu_size = 16; - if (inst->capabilities->cap[ENTROPY_MODE].value == + if (inst->capabilities[ENTROPY_MODE].value == V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC) codec_input->entropy_coding_mode = CODEC_ENTROPY_CODING_CABAC; else @@ -56,24 +56,24 @@ static int msm_vidc_init_codec_input_freq(struct msm_vidc_inst *inst, u32 data_s return -EINVAL; } - codec_input->pipe_num = inst->capabilities->cap[PIPE].value; + codec_input->pipe_num = inst->capabilities[PIPE].value; codec_input->frame_rate = inst->max_rate; port = inst->domain == MSM_VIDC_DECODER ? INPUT_PORT : OUTPUT_PORT; codec_input->frame_width = inst->fmts[port].fmt.pix_mp.width; codec_input->frame_height = inst->fmts[port].fmt.pix_mp.height; - if (inst->capabilities->cap[STAGE].value == MSM_VIDC_STAGE_1) { + if (inst->capabilities[STAGE].value == MSM_VIDC_STAGE_1) { codec_input->vsp_vpp_mode = CODEC_VSPVPP_MODE_1S; - } else if (inst->capabilities->cap[STAGE].value == MSM_VIDC_STAGE_2) { + } else if (inst->capabilities[STAGE].value == MSM_VIDC_STAGE_2) { codec_input->vsp_vpp_mode = CODEC_VSPVPP_MODE_2S; } else { d_vpr_e("%s: invalid stage %d\n", __func__, - inst->capabilities->cap[STAGE].value); + inst->capabilities[STAGE].value); return -EINVAL; } - if (inst->capabilities->cap[BIT_DEPTH].value == BIT_DEPTH_8) + if (inst->capabilities[BIT_DEPTH].value == BIT_DEPTH_8) codec_input->bitdepth = CODEC_BITDEPTH_8; else codec_input->bitdepth = CODEC_BITDEPTH_10; @@ -81,7 +81,7 @@ static int msm_vidc_init_codec_input_freq(struct msm_vidc_inst *inst, u32 data_s /* * Used for calculating Encoder GOP Complexity * hierachical_layer=0..7 used as Array Index - * inst->capabilities->cap[B_FRAME].value=[ 0 1 2 ] + * inst->capabilities[B_FRAME].value=[ 0 1 2] * TODO how to map? */ @@ -155,15 +155,15 @@ static int msm_vidc_init_codec_input_bus(struct msm_vidc_inst *inst, struct vidc return -EINVAL; } - if (inst->capabilities->cap[ENTROPY_MODE].value == + if (inst->capabilities[ENTROPY_MODE].value == V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC) { codec_input->entropy_coding_mode = CODEC_ENTROPY_CODING_CABAC; - } else if (inst->capabilities->cap[ENTROPY_MODE].value == + } else if (inst->capabilities[ENTROPY_MODE].value == V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC) { codec_input->entropy_coding_mode = CODEC_ENTROPY_CODING_CAVLC; } else { d_vpr_e("%s: invalid entropy %d\n", __func__, - inst->capabilities->cap[ENTROPY_MODE].value); + inst->capabilities[ENTROPY_MODE].value); return -EINVAL; } @@ -293,7 +293,7 @@ static u64 msm_vidc_calc_freq_iris3_new(struct msm_vidc_inst *inst, u32 data_siz struct api_calculation_freq_output codec_output; u32 fps, mbpf; - if (!inst || !inst->core || !inst->capabilities) { + if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return freq; } @@ -362,7 +362,7 @@ u64 msm_vidc_calc_freq_iris3(struct msm_vidc_inst *inst, u32 data_size) { u64 freq = 0; - if (!inst || !inst->core || !inst->capabilities) { + if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return freq; } @@ -387,7 +387,7 @@ static u64 msm_vidc_calc_freq_iris3_legacy(struct msm_vidc_inst *inst, u32 data_ u32 base_cycles = 0; u32 fps, mbpf; - if (!inst || !inst->core || !inst->capabilities) { + if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return freq; } @@ -408,26 +408,26 @@ static u64 msm_vidc_calc_freq_iris3_legacy(struct msm_vidc_inst *inst, u32 data_ * Even though, most part is common now, in future it may change * between them. */ - fw_cycles = fps * inst->capabilities->cap[MB_CYCLES_FW].value; - fw_vpp_cycles = fps * inst->capabilities->cap[MB_CYCLES_FW_VPP].value; + fw_cycles = fps * inst->capabilities[MB_CYCLES_FW].value; + fw_vpp_cycles = fps * inst->capabilities[MB_CYCLES_FW_VPP].value; if (inst->domain == MSM_VIDC_ENCODER) { vpp_cycles_per_mb = is_low_power_session(inst) ? - inst->capabilities->cap[MB_CYCLES_LP].value : - inst->capabilities->cap[MB_CYCLES_VPP].value; + inst->capabilities[MB_CYCLES_LP].value : + inst->capabilities[MB_CYCLES_VPP].value; vpp_cycles = mbs_per_second * vpp_cycles_per_mb / - inst->capabilities->cap[PIPE].value; + inst->capabilities[PIPE].value; /* Factor 1.25 for IbP and 1.375 for I1B2b1P GOP structure */ - if (inst->capabilities->cap[B_FRAME].value > 1) + if (inst->capabilities[B_FRAME].value > 1) vpp_cycles += (vpp_cycles / 4) + (vpp_cycles / 8); - else if (inst->capabilities->cap[B_FRAME].value) + else if (inst->capabilities[B_FRAME].value) vpp_cycles += vpp_cycles / 4; /* 21 / 20 is minimum overhead factor */ vpp_cycles += max(div_u64(vpp_cycles, 20), fw_vpp_cycles); /* 1.01 is multi-pipe overhead */ - if (inst->capabilities->cap[PIPE].value > 1) + if (inst->capabilities[PIPE].value > 1) vpp_cycles += div_u64(vpp_cycles, 100); /* * 1080p@480fps usecase needs exactly 338MHz @@ -445,25 +445,25 @@ static u64 msm_vidc_calc_freq_iris3_legacy(struct msm_vidc_inst *inst, u32 data_ vpp_cycles += div_u64(vpp_cycles * 5, 100); /* increase vpp_cycles by 50% for preprocessing */ - if (inst->capabilities->cap[REQUEST_PREPROCESS].value) + if (inst->capabilities[REQUEST_PREPROCESS].value) vpp_cycles = vpp_cycles + vpp_cycles / 2; /* VSP */ /* bitrate is based on fps, scale it using operating rate */ - operating_rate = inst->capabilities->cap[OPERATING_RATE].value >> 16; + operating_rate = inst->capabilities[OPERATING_RATE].value >> 16; if (operating_rate > - (inst->capabilities->cap[FRAME_RATE].value >> 16) && - (inst->capabilities->cap[FRAME_RATE].value >> 16)) { + (inst->capabilities[FRAME_RATE].value >> 16) && + (inst->capabilities[FRAME_RATE].value >> 16)) { vsp_factor_num = operating_rate; - vsp_factor_den = inst->capabilities->cap[FRAME_RATE].value >> 16; + vsp_factor_den = inst->capabilities[FRAME_RATE].value >> 16; } - vsp_cycles = div_u64(((u64)inst->capabilities->cap[BIT_RATE].value * + vsp_cycles = div_u64(((u64)inst->capabilities[BIT_RATE].value * vsp_factor_num), vsp_factor_den); - base_cycles = inst->capabilities->cap[MB_CYCLES_VSP].value; + base_cycles = inst->capabilities[MB_CYCLES_VSP].value; if (inst->codec == MSM_VIDC_VP9) { vsp_cycles = div_u64(vsp_cycles * 170, 100); - } else if (inst->capabilities->cap[ENTROPY_MODE].value == + } else if (inst->capabilities[ENTROPY_MODE].value == V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC) { vsp_cycles = div_u64(vsp_cycles * 135, 100); } else { @@ -473,18 +473,18 @@ static u64 msm_vidc_calc_freq_iris3_legacy(struct msm_vidc_inst *inst, u32 data_ /* VSP FW Overhead 1.05 */ vsp_cycles = div_u64(vsp_cycles * 21, 20); - if (inst->capabilities->cap[STAGE].value == MSM_VIDC_STAGE_1) + if (inst->capabilities[STAGE].value == MSM_VIDC_STAGE_1) vsp_cycles = vsp_cycles * 3; vsp_cycles += mbs_per_second * base_cycles; } else if (inst->domain == MSM_VIDC_DECODER) { /* VPP */ - vpp_cycles = mbs_per_second * inst->capabilities->cap[MB_CYCLES_VPP].value / - inst->capabilities->cap[PIPE].value; + vpp_cycles = mbs_per_second * inst->capabilities[MB_CYCLES_VPP].value / + inst->capabilities[PIPE].value; /* 21 / 20 is minimum overhead factor */ vpp_cycles += max(vpp_cycles / 20, fw_vpp_cycles); - if (inst->capabilities->cap[PIPE].value > 1) { + if (inst->capabilities[PIPE].value > 1) { if (inst->codec == MSM_VIDC_AV1) { /* * Additional vpp_cycles are required for bitstreams with @@ -493,7 +493,7 @@ static u64 msm_vidc_calc_freq_iris3_legacy(struct msm_vidc_inst *inst, u32 data_ * non-recommended tiles: 1080P_V4XH2_V4X1, UHD_V8X4_V8X1, * 8KUHD_V8X8_V8X1 */ - if (inst->capabilities->cap[SUPER_BLOCK].value) + if (inst->capabilities[SUPER_BLOCK].value) vpp_cycles += div_u64(vpp_cycles * 1464, 1000); else vpp_cycles += div_u64(vpp_cycles * 410, 1000); @@ -536,7 +536,7 @@ static u64 msm_vidc_calc_freq_iris3_legacy(struct msm_vidc_inst *inst, u32 data_ input_bitrate_mbps = fps * data_size * 8 / (1024 * 1024); vsp_hw_min_frequency = freq_tbl_value * 1000 * input_bitrate_mbps; - if (inst->capabilities->cap[STAGE].value == MSM_VIDC_STAGE_2) { + if (inst->capabilities[STAGE].value == MSM_VIDC_STAGE_2) { vsp_hw_min_frequency += (bitrate_2stage[bitrate_entry] * fw_sw_vsp_offset - 1); vsp_hw_min_frequency = div_u64(vsp_hw_min_frequency, @@ -553,13 +553,13 @@ static u64 msm_vidc_calc_freq_iris3_legacy(struct msm_vidc_inst *inst, u32 data_ vsp_cycles = vsp_hw_min_frequency * 1000000; } else { base_cycles = inst->has_bframe ? - 80 : inst->capabilities->cap[MB_CYCLES_VSP].value; + 80 : inst->capabilities[MB_CYCLES_VSP].value; bitrate = fps * data_size * 8; vsp_cycles = bitrate; if (inst->codec == MSM_VIDC_VP9) { vsp_cycles = div_u64(vsp_cycles * 170, 100); - } else if (inst->capabilities->cap[ENTROPY_MODE].value == + } else if (inst->capabilities[ENTROPY_MODE].value == V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC) { vsp_cycles = div_u64(vsp_cycles * 135, 100); } else { @@ -569,7 +569,7 @@ static u64 msm_vidc_calc_freq_iris3_legacy(struct msm_vidc_inst *inst, u32 data_ /* VSP FW overhead 1.05 */ vsp_cycles = div_u64(vsp_cycles * 21, 20); - if (inst->capabilities->cap[STAGE].value == MSM_VIDC_STAGE_1) + if (inst->capabilities[STAGE].value == MSM_VIDC_STAGE_1) vsp_cycles = vsp_cycles * 3; vsp_cycles += mbs_per_second * base_cycles; @@ -584,9 +584,9 @@ static u64 msm_vidc_calc_freq_iris3_legacy(struct msm_vidc_inst *inst, u32 data_ } if (inst->codec == MSM_VIDC_VP9 && - inst->capabilities->cap[STAGE].value == + inst->capabilities[STAGE].value == MSM_VIDC_STAGE_2 && - inst->capabilities->cap[PIPE].value == 4 && + inst->capabilities[PIPE].value == 4 && bitrate > 90000000) vsp_cycles = msm_vidc_max_freq(inst); } diff --git a/driver/variant/iris33/src/msm_vidc_buffer_iris33.c b/driver/variant/iris33/src/msm_vidc_buffer_iris33.c index 7086b04d33..1e0eb8545f 100644 --- a/driver/variant/iris33/src/msm_vidc_buffer_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_buffer_iris33.c @@ -24,7 +24,7 @@ static u32 msm_vidc_decoder_bin_size_iris33(struct msm_vidc_inst *inst) bool is_interlaced; u32 vpp_delay; - if (!inst || !inst->core || !inst->capabilities) { + if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return size; } @@ -39,7 +39,7 @@ static u32 msm_vidc_decoder_bin_size_iris33(struct msm_vidc_inst *inst) vpp_delay = inst->decode_vpp_delay.size; else vpp_delay = DEFAULT_BSE_VPP_DELAY; - if (inst->capabilities->cap[CODED_FRAMES].value == + if (inst->capabilities[CODED_FRAMES].value == CODED_FRAMES_PROGRESSIVE) is_interlaced = false; else @@ -70,7 +70,7 @@ static u32 msm_vidc_decoder_comv_size_iris33(struct msm_vidc_inst* inst) u32 width, height, num_comv, vpp_delay; struct v4l2_format *f; - if (!inst || !inst->core || !inst->capabilities) { + if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return size; } @@ -111,7 +111,7 @@ static u32 msm_vidc_decoder_comv_size_iris33(struct msm_vidc_inst* inst) * should not be allocated separately. * When DRAP is disabled, COMV buffer must be allocated. */ - if (inst->capabilities->cap[DRAP].value) + if (inst->capabilities[DRAP].value) size = 0; else HFI_BUFFER_COMV_AV1D(size, width, height, num_comv); @@ -242,7 +242,7 @@ static u32 msm_vidc_decoder_persist_size_iris33(struct msm_vidc_inst *inst) return size; } - if (inst->capabilities->cap[META_DOLBY_RPU].value) + if (inst->capabilities[META_DOLBY_RPU].value) rpu_enabled = 1; if (inst->codec == MSM_VIDC_H264) { @@ -259,10 +259,10 @@ static u32 msm_vidc_decoder_persist_size_iris33(struct msm_vidc_inst *inst) * When DRAP is disabled, COMV buffer should not be included in PERSIST * buffer. */ - if (inst->capabilities->cap[DRAP].value) + if (inst->capabilities[DRAP].value) HFI_BUFFER_PERSIST_AV1D(size, - inst->capabilities->cap[FRAME_WIDTH].max, - inst->capabilities->cap[FRAME_HEIGHT].max, 16); + inst->capabilities[FRAME_WIDTH].max, + inst->capabilities[FRAME_HEIGHT].max, 16); else HFI_BUFFER_PERSIST_AV1D(size, 0, 0, 0); } @@ -289,13 +289,13 @@ static u32 msm_vidc_decoder_dpb_size_iris33(struct msm_vidc_inst *inst) * for linear formats. For AV1, DPB is needed for film-grain * enabled bitstreams (UBWC & linear). */ - color_fmt = inst->capabilities->cap[PIX_FMTS].value; + color_fmt = inst->capabilities[PIX_FMTS].value; if (!is_linear_colorformat(color_fmt)) { if (inst->codec != MSM_VIDC_AV1) return size; if (inst->codec == MSM_VIDC_AV1 && - !inst->capabilities->cap[FILM_GRAIN].value) + !inst->capabilities[FILM_GRAIN].value) return size; } @@ -341,7 +341,7 @@ static u32 msm_vidc_encoder_bin_size_iris33(struct msm_vidc_inst *inst) u32 width, height, num_vpp_pipes, stage, profile, ring_buf_count; struct v4l2_format *f; - if (!inst || !inst->core || !inst->capabilities) { + if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return size; } @@ -351,12 +351,12 @@ static u32 msm_vidc_encoder_bin_size_iris33(struct msm_vidc_inst *inst) return size; } num_vpp_pipes = core->capabilities[NUM_VPP_PIPE].value; - stage = inst->capabilities->cap[STAGE].value; + stage = inst->capabilities[STAGE].value; f = &inst->fmts[OUTPUT_PORT]; width = f->fmt.pix_mp.width; height = f->fmt.pix_mp.height; - profile = inst->capabilities->cap[PROFILE].value; - ring_buf_count = inst->capabilities->cap[ENC_RING_BUFFER_COUNT].value; + profile = inst->capabilities[PROFILE].value; + ring_buf_count = inst->capabilities[ENC_RING_BUFFER_COUNT].value; if (inst->codec == MSM_VIDC_H264) HFI_BUFFER_BIN_H264E(size, inst->hfi_rc_type, width, @@ -376,13 +376,13 @@ static u32 msm_vidc_get_recon_buf_count(struct msm_vidc_inst *inst) bool is_hybrid_hp = false; u32 hfi_codec = 0; - n_bframe = inst->capabilities->cap[B_FRAME].value; - ltr_count = inst->capabilities->cap[LTR_COUNT].value; + n_bframe = inst->capabilities[B_FRAME].value; + ltr_count = inst->capabilities[LTR_COUNT].value; if (inst->hfi_layer_type == HFI_HIER_B) { - hb_layers = inst->capabilities->cap[ENH_LAYER_COUNT].value + 1; + hb_layers = inst->capabilities[ENH_LAYER_COUNT].value + 1; } else { - hp_layers = inst->capabilities->cap[ENH_LAYER_COUNT].value + 1; + hp_layers = inst->capabilities[ENH_LAYER_COUNT].value + 1; if (inst->hfi_layer_type == HFI_HIER_P_HYBRID_LTR) is_hybrid_hp = true; } @@ -404,7 +404,7 @@ static u32 msm_vidc_encoder_comv_size_iris33(struct msm_vidc_inst* inst) u32 width, height, num_recon = 0; struct v4l2_format* f; - if (!inst || !inst->core || !inst->capabilities) { + if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return size; } @@ -466,12 +466,12 @@ static u32 msm_vidc_encoder_line_size_iris33(struct msm_vidc_inst *inst) return size; } core = inst->core; - if (!core->capabilities || !inst->capabilities) { + if (!core->capabilities) { i_vpr_e(inst, "%s: invalid capabilities\n", __func__); return size; } num_vpp_pipes = core->capabilities[NUM_VPP_PIPE].value; - pixfmt = inst->capabilities->cap[PIX_FMTS].value; + pixfmt = inst->capabilities[PIX_FMTS].value; f = &inst->fmts[OUTPUT_PORT]; width = f->fmt.pix_mp.width; @@ -494,7 +494,7 @@ static u32 msm_vidc_encoder_dpb_size_iris33(struct msm_vidc_inst *inst) struct v4l2_format *f; bool is_tenbit; - if (!inst || !inst->core || !inst->capabilities) { + if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return 0; } @@ -503,7 +503,7 @@ static u32 msm_vidc_encoder_dpb_size_iris33(struct msm_vidc_inst *inst) width = f->fmt.pix_mp.width; height = f->fmt.pix_mp.height; - pixfmt = inst->capabilities->cap[PIX_FMTS].value; + pixfmt = inst->capabilities[PIX_FMTS].value; is_tenbit = (pixfmt == MSM_VIDC_FMT_P010 || pixfmt == MSM_VIDC_FMT_TP10C); if (inst->codec == MSM_VIDC_H264) @@ -537,7 +537,7 @@ static u32 msm_vidc_encoder_vpss_size_iris33(struct msm_vidc_inst* inst) u32 width, height, driver_colorfmt; struct v4l2_format* f; - if (!inst || !inst->core || !inst->capabilities) { + if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return 0; } @@ -563,7 +563,7 @@ static u32 msm_vidc_encoder_vpss_size_iris33(struct msm_vidc_inst* inst) driver_colorfmt = v4l2_colorformat_to_driver(inst, f->fmt.pix_mp.pixelformat, __func__); is_tenbit = is_10bit_colorformat(driver_colorfmt); - if (inst->capabilities->cap[BLUR_TYPES].value != MSM_VIDC_BLUR_NONE) + if (inst->capabilities[BLUR_TYPES].value != MSM_VIDC_BLUR_NONE) blur = true; HFI_BUFFER_VPSS_ENC(size, width, height, ds_enable, blur, is_tenbit); @@ -580,7 +580,7 @@ static u32 msm_vidc_encoder_output_size_iris33(struct msm_vidc_inst *inst) u32 hfi_rc_type = HFI_RC_VBR_CFR; enum msm_vidc_codec_type codec; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -590,8 +590,8 @@ static u32 msm_vidc_encoder_output_size_iris33(struct msm_vidc_inst *inst) if (codec == MSM_VIDC_HEVC || codec == MSM_VIDC_HEIC) is_ten_bit = true; - bitrate_mode = inst->capabilities->cap[BITRATE_MODE].value; - frame_rc = inst->capabilities->cap[FRAME_RC_ENABLE].value; + bitrate_mode = inst->capabilities[BITRATE_MODE].value; + frame_rc = inst->capabilities[FRAME_RC_ENABLE].value; if (!frame_rc && !is_image_session(inst)) hfi_rc_type = HFI_RC_OFF; else if (bitrate_mode == V4L2_MPEG_VIDEO_BITRATE_MODE_CQ) @@ -682,7 +682,7 @@ static int msm_vidc_input_min_count_iris33(struct msm_vidc_inst* inst) u32 input_min_count = 0; u32 total_hb_layer = 0; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return 0; } @@ -691,9 +691,9 @@ static int msm_vidc_input_min_count_iris33(struct msm_vidc_inst* inst) input_min_count = MIN_DEC_INPUT_BUFFERS; } else if (is_encode_session(inst)) { total_hb_layer = is_hierb_type_requested(inst) ? - inst->capabilities->cap[ENH_LAYER_COUNT].value + 1 : 0; + inst->capabilities[ENH_LAYER_COUNT].value + 1 : 0; if (inst->codec == MSM_VIDC_H264 && - !inst->capabilities->cap[LAYER_ENABLE].value) { + !inst->capabilities[LAYER_ENABLE].value) { total_hb_layer = 0; } HFI_IRIS3_ENC_MIN_INPUT_BUF_COUNT(input_min_count, @@ -721,10 +721,10 @@ static int msm_buffer_dpb_count(struct msm_vidc_inst *inst) /* decoder dpb buffer count */ if (is_decode_session(inst)) { - color_fmt = inst->capabilities->cap[PIX_FMTS].value; + color_fmt = inst->capabilities[PIX_FMTS].value; if (is_linear_colorformat(color_fmt) || (inst->codec == MSM_VIDC_AV1 && - (inst->capabilities->cap[FILM_GRAIN].value))) + (inst->capabilities[FILM_GRAIN].value))) count = inst->buffers.output.min_count; return count; @@ -744,13 +744,13 @@ static int msm_buffer_delivery_mode_based_min_count_iris33(struct msm_vidc_inst u32 slice_mode = 0; u32 delivery_mode = 0; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return count; } - slice_mode = inst->capabilities->cap[SLICE_MODE].value; - delivery_mode = inst->capabilities->cap[DELIVERY_MODE].value; + slice_mode = inst->capabilities[SLICE_MODE].value; + delivery_mode = inst->capabilities[DELIVERY_MODE].value; if (slice_mode != V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_MB || (!delivery_mode)) @@ -760,7 +760,7 @@ static int msm_buffer_delivery_mode_based_min_count_iris33(struct msm_vidc_inst width = f->fmt.pix_mp.width; height = f->fmt.pix_mp.height; - max_mbs_per_slice = inst->capabilities->cap[SLICE_MAX_MB].value; + max_mbs_per_slice = inst->capabilities[SLICE_MAX_MB].value; if (inst->codec == MSM_VIDC_H264) hfi_codec = HFI_CODEC_ENCODE_AVC; diff --git a/driver/variant/iris33/src/msm_vidc_iris33.c b/driver/variant/iris33/src/msm_vidc_iris33.c index 9d9aee708c..315efaf52b 100644 --- a/driver/variant/iris33/src/msm_vidc_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_iris33.c @@ -993,7 +993,7 @@ int msm_vidc_decide_work_mode_iris33(struct msm_vidc_inst* inst) u32 width, height; bool res_ok = false; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -1011,9 +1011,9 @@ int msm_vidc_decide_work_mode_iris33(struct msm_vidc_inst* inst) height = inp_f->fmt.pix_mp.height; width = inp_f->fmt.pix_mp.width; res_ok = res_is_less_than(width, height, 1280, 720); - if (inst->capabilities->cap[CODED_FRAMES].value == + if (inst->capabilities[CODED_FRAMES].value == CODED_FRAMES_INTERLACE || - inst->capabilities->cap[LOWLATENCY_MODE].value || + inst->capabilities[LOWLATENCY_MODE].value || res_ok) { work_mode = MSM_VIDC_STAGE_1; } @@ -1022,17 +1022,17 @@ int msm_vidc_decide_work_mode_iris33(struct msm_vidc_inst* inst) width = inst->crop.width; res_ok = !res_is_greater_than(width, height, 4096, 2160); if (res_ok && - (inst->capabilities->cap[LOWLATENCY_MODE].value)) { + (inst->capabilities[LOWLATENCY_MODE].value)) { work_mode = MSM_VIDC_STAGE_1; } - if (inst->capabilities->cap[SLICE_MODE].value == + if (inst->capabilities[SLICE_MODE].value == V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_BYTES) { work_mode = MSM_VIDC_STAGE_1; } - if (inst->capabilities->cap[LOSSLESS].value) + if (inst->capabilities[LOSSLESS].value) work_mode = MSM_VIDC_STAGE_2; - if (!inst->capabilities->cap[GOP_SIZE].value) + if (!inst->capabilities[GOP_SIZE].value) work_mode = MSM_VIDC_STAGE_2; } else { i_vpr_e(inst, "%s: invalid session type\n", __func__); @@ -1041,8 +1041,8 @@ int msm_vidc_decide_work_mode_iris33(struct msm_vidc_inst* inst) exit: i_vpr_h(inst, "Configuring work mode = %u low latency = %u, gop size = %u\n", - work_mode, inst->capabilities->cap[LOWLATENCY_MODE].value, - inst->capabilities->cap[GOP_SIZE].value); + work_mode, inst->capabilities[LOWLATENCY_MODE].value, + inst->capabilities[GOP_SIZE].value); msm_vidc_update_cap_value(inst, STAGE, work_mode, __func__); return 0; @@ -1065,13 +1065,13 @@ int msm_vidc_decide_work_route_iris33(struct msm_vidc_inst* inst) goto exit; if (is_decode_session(inst)) { - if (inst->capabilities->cap[CODED_FRAMES].value == + if (inst->capabilities[CODED_FRAMES].value == CODED_FRAMES_INTERLACE) work_route = MSM_VIDC_PIPE_1; } else if (is_encode_session(inst)) { u32 slice_mode; - slice_mode = inst->capabilities->cap[SLICE_MODE].value; + slice_mode = inst->capabilities[SLICE_MODE].value; /*TODO Pipe=1 for legacy CBR*/ if (slice_mode == V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_BYTES) @@ -1091,30 +1091,27 @@ exit: int msm_vidc_decide_quality_mode_iris33(struct msm_vidc_inst* inst) { - struct msm_vidc_inst_capability* capability = NULL; struct msm_vidc_core *core; u32 mbpf, mbps, max_hq_mbpf, max_hq_mbps; u32 mode = MSM_VIDC_POWER_SAVE_MODE; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - capability = inst->capabilities; - if (!is_encode_session(inst)) return 0; /* image or lossless or all intra runs at quality mode */ - if (is_image_session(inst) || capability->cap[LOSSLESS].value || - capability->cap[ALL_INTRA].value) { + if (is_image_session(inst) || inst->capabilities[LOSSLESS].value || + inst->capabilities[ALL_INTRA].value) { mode = MSM_VIDC_MAX_QUALITY_MODE; goto decision_done; } /* for lesser complexity, make LP for all resolution */ - if (capability->cap[COMPLEXITY].value < DEFAULT_COMPLEXITY) { + if (inst->capabilities[COMPLEXITY].value < DEFAULT_COMPLEXITY) { mode = MSM_VIDC_POWER_SAVE_MODE; goto decision_done; } @@ -1126,8 +1123,8 @@ int msm_vidc_decide_quality_mode_iris33(struct msm_vidc_inst* inst) max_hq_mbps = core->capabilities[MAX_MBPS_HQ].value;; if (!is_realtime_session(inst)) { - if (((capability->cap[COMPLEXITY].flags & CAP_FLAG_CLIENT_SET) && - (capability->cap[COMPLEXITY].value >= DEFAULT_COMPLEXITY)) || + if (((inst->capabilities[COMPLEXITY].flags & CAP_FLAG_CLIENT_SET) && + (inst->capabilities[COMPLEXITY].value >= DEFAULT_COMPLEXITY)) || mbpf <= max_hq_mbpf) { mode = MSM_VIDC_MAX_QUALITY_MODE; goto decision_done; @@ -1145,7 +1142,6 @@ decision_done: int msm_vidc_adjust_bitrate_boost_iris33(void* instance, struct v4l2_ctrl *ctrl) { - struct msm_vidc_inst_capability* capability = NULL; s32 adjusted_value; struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; s32 rc_type = -1; @@ -1153,15 +1149,13 @@ int msm_vidc_adjust_bitrate_boost_iris33(void* instance, struct v4l2_ctrl *ctrl) struct v4l2_format *f; u32 max_bitrate = 0, bitrate = 0; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - capability = inst->capabilities; - adjusted_value = ctrl ? ctrl->val : - capability->cap[BITRATE_BOOST].value; + inst->capabilities[BITRATE_BOOST].value; if (inst->bufq[OUTPUT_PORT].vb2q->streaming) return 0; @@ -1179,7 +1173,7 @@ int msm_vidc_adjust_bitrate_boost_iris33(void* instance, struct v4l2_ctrl *ctrl) goto adjust; } - frame_rate = inst->capabilities->cap[FRAME_RATE].value >> 16; + frame_rate = inst->capabilities[FRAME_RATE].value >> 16; f= &inst->fmts[OUTPUT_PORT]; width = f->fmt.pix_mp.width; height = f->fmt.pix_mp.height; @@ -1189,7 +1183,7 @@ int msm_vidc_adjust_bitrate_boost_iris33(void* instance, struct v4l2_ctrl *ctrl) * if client did not set, keep max bitrate boost upto 4k@60fps * and remove bitrate boost after 4k@60fps */ - if (capability->cap[BITRATE_BOOST].flags & CAP_FLAG_CLIENT_SET) { + if (inst->capabilities[BITRATE_BOOST].flags & CAP_FLAG_CLIENT_SET) { /* accept client set bitrate boost value as is */ } else { if (res_is_less_than_or_equal_to(width, height, 4096, 2176) && @@ -1200,7 +1194,7 @@ int msm_vidc_adjust_bitrate_boost_iris33(void* instance, struct v4l2_ctrl *ctrl) } max_bitrate = msm_vidc_get_max_bitrate(inst); - bitrate = inst->capabilities->cap[BIT_RATE].value; + bitrate = inst->capabilities[BIT_RATE].value; if (adjusted_value) { if ((bitrate + bitrate / (100 / adjusted_value)) > max_bitrate) { i_vpr_h(inst, diff --git a/driver/variant/iris33/src/msm_vidc_power_iris33.c b/driver/variant/iris33/src/msm_vidc_power_iris33.c index 6b8b0b054b..c7224d8e6e 100644 --- a/driver/variant/iris33/src/msm_vidc_power_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_power_iris33.c @@ -25,17 +25,17 @@ static int msm_vidc_get_hier_layer_val(struct msm_vidc_inst *inst) int hierachical_layer = CODEC_GOP_IPP; if (inst->domain == MSM_VIDC_ENCODER) { - if (inst->capabilities->cap[ALL_INTRA].value) { + if (inst->capabilities[ALL_INTRA].value) { /* no P and B frames case */ hierachical_layer = CODEC_GOP_IONLY; - } else if (inst->capabilities->cap[B_FRAME].value == 0) { + } else if (inst->capabilities[B_FRAME].value == 0) { /* no B frames case */ hierachical_layer = CODEC_GOP_IPP; } else { /* P and B frames enabled case */ - if (inst->capabilities->cap[ENH_LAYER_COUNT].value == 0 || - inst->capabilities->cap[ENH_LAYER_COUNT].value == 1) + if (inst->capabilities[ENH_LAYER_COUNT].value == 0 || + inst->capabilities[ENH_LAYER_COUNT].value == 1) hierachical_layer = CODEC_GOP_IbP; - else if (inst->capabilities->cap[ENH_LAYER_COUNT].value == 2) + else if (inst->capabilities[ENH_LAYER_COUNT].value == 2) hierachical_layer = CODEC_GOP_I1B2b1P; else hierachical_layer = CODEC_GOP_I3B4b1P; @@ -65,7 +65,7 @@ static int msm_vidc_init_codec_input_freq(struct msm_vidc_inst *inst, u32 data_s if (inst->codec == MSM_VIDC_H264) { codec_input->codec = CODEC_H264; codec_input->lcu_size = 16; - if (inst->capabilities->cap[ENTROPY_MODE].value == + if (inst->capabilities[ENTROPY_MODE].value == V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC) { codec_input->entropy_coding_mode = CODEC_ENTROPY_CODING_CABAC; codec_input->codec = CODEC_H264; @@ -87,24 +87,24 @@ static int msm_vidc_init_codec_input_freq(struct msm_vidc_inst *inst, u32 data_s return -EINVAL; } - codec_input->pipe_num = inst->capabilities->cap[PIPE].value; + codec_input->pipe_num = inst->capabilities[PIPE].value; codec_input->frame_rate = inst->max_rate; port = inst->domain == MSM_VIDC_DECODER ? INPUT_PORT : OUTPUT_PORT; codec_input->frame_width = inst->fmts[port].fmt.pix_mp.width; codec_input->frame_height = inst->fmts[port].fmt.pix_mp.height; - if (inst->capabilities->cap[STAGE].value == MSM_VIDC_STAGE_1) { + if (inst->capabilities[STAGE].value == MSM_VIDC_STAGE_1) { codec_input->vsp_vpp_mode = CODEC_VSPVPP_MODE_1S; - } else if (inst->capabilities->cap[STAGE].value == MSM_VIDC_STAGE_2) { + } else if (inst->capabilities[STAGE].value == MSM_VIDC_STAGE_2) { codec_input->vsp_vpp_mode = CODEC_VSPVPP_MODE_2S; } else { d_vpr_e("%s: invalid stage %d\n", __func__, - inst->capabilities->cap[STAGE].value); + inst->capabilities[STAGE].value); return -EINVAL; } - if (inst->capabilities->cap[BIT_DEPTH].value == BIT_DEPTH_8) + if (inst->capabilities[BIT_DEPTH].value == BIT_DEPTH_8) codec_input->bitdepth = CODEC_BITDEPTH_8; else codec_input->bitdepth = CODEC_BITDEPTH_10; @@ -126,7 +126,7 @@ static int msm_vidc_init_codec_input_freq(struct msm_vidc_inst *inst, u32 data_s (codec_input->frame_rate * data_size * 8) / 1000000; else codec_input->bitrate_mbps = - inst->capabilities->cap[BIT_RATE].value / 1000000; + inst->capabilities[BIT_RATE].value / 1000000; /* disable av1d commercial tile */ codec_input->av1d_commer_tile_enable = 0; @@ -157,17 +157,17 @@ static int msm_vidc_init_codec_input_bus(struct msm_vidc_inst *inst, struct vidc codec_input->chipset_gen = MSM_PINEAPPLE; if (d->codec == MSM_VIDC_H264) { - if (inst->capabilities->cap[ENTROPY_MODE].value == + if (inst->capabilities[ENTROPY_MODE].value == V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC) { codec_input->entropy_coding_mode = CODEC_ENTROPY_CODING_CABAC; codec_input->codec = CODEC_H264; - } else if (inst->capabilities->cap[ENTROPY_MODE].value == + } else if (inst->capabilities[ENTROPY_MODE].value == V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC) { codec_input->entropy_coding_mode = CODEC_ENTROPY_CODING_CAVLC; codec_input->codec = CODEC_H264_CAVLC; } else { d_vpr_e("%s: invalid entropy %d\n", __func__, - inst->capabilities->cap[ENTROPY_MODE].value); + inst->capabilities[ENTROPY_MODE].value); return -EINVAL; } } else if (d->codec == MSM_VIDC_HEVC) { @@ -366,7 +366,7 @@ static u64 msm_vidc_calc_freq_iris33_new(struct msm_vidc_inst *inst, u32 data_si struct api_calculation_freq_output codec_output; u32 fps, mbpf; - if (!inst || !inst->core || !inst->capabilities) { + if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return freq; } @@ -386,7 +386,7 @@ static u64 msm_vidc_calc_freq_iris33_new(struct msm_vidc_inst *inst, u32 data_si return freq; if (inst->domain == MSM_VIDC_ENCODER) { - if (!inst->capabilities->cap[ENC_RING_BUFFER_COUNT].value && + if (!inst->capabilities[ENC_RING_BUFFER_COUNT].value && is_vpp_cycles_close_to_freq_corner(core, codec_output.vpp_min_freq)) { /* @@ -456,7 +456,7 @@ u64 msm_vidc_calc_freq_iris33(struct msm_vidc_inst *inst, u32 data_size) { u64 freq = 0; - if (!inst || !inst->core || !inst->capabilities) { + if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return freq; } @@ -481,7 +481,7 @@ u64 msm_vidc_calc_freq_iris33_legacy(struct msm_vidc_inst *inst, u32 data_size) u32 base_cycles = 0; u32 fps, mbpf; - if (!inst || !inst->core || !inst->capabilities) { + if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return freq; } @@ -502,26 +502,26 @@ u64 msm_vidc_calc_freq_iris33_legacy(struct msm_vidc_inst *inst, u32 data_size) * Even though, most part is common now, in future it may change * between them. */ - fw_cycles = fps * inst->capabilities->cap[MB_CYCLES_FW].value; - fw_vpp_cycles = fps * inst->capabilities->cap[MB_CYCLES_FW_VPP].value; + fw_cycles = fps * inst->capabilities[MB_CYCLES_FW].value; + fw_vpp_cycles = fps * inst->capabilities[MB_CYCLES_FW_VPP].value; if (inst->domain == MSM_VIDC_ENCODER) { vpp_cycles_per_mb = is_low_power_session(inst) ? - inst->capabilities->cap[MB_CYCLES_LP].value : - inst->capabilities->cap[MB_CYCLES_VPP].value; + inst->capabilities[MB_CYCLES_LP].value : + inst->capabilities[MB_CYCLES_VPP].value; vpp_cycles = mbs_per_second * vpp_cycles_per_mb / - inst->capabilities->cap[PIPE].value; + inst->capabilities[PIPE].value; /* Factor 1.25 for IbP and 1.375 for I1B2b1P GOP structure */ - if (inst->capabilities->cap[B_FRAME].value > 1) + if (inst->capabilities[B_FRAME].value > 1) vpp_cycles += (vpp_cycles / 4) + (vpp_cycles / 8); - else if (inst->capabilities->cap[B_FRAME].value) + else if (inst->capabilities[B_FRAME].value) vpp_cycles += vpp_cycles / 4; /* 21 / 20 is minimum overhead factor */ vpp_cycles += max(div_u64(vpp_cycles, 20), fw_vpp_cycles); /* 1.01 is multi-pipe overhead */ - if (inst->capabilities->cap[PIPE].value > 1) + if (inst->capabilities[PIPE].value > 1) vpp_cycles += div_u64(vpp_cycles, 100); /* * 1080p@480fps usecase needs exactly 338MHz @@ -539,25 +539,25 @@ u64 msm_vidc_calc_freq_iris33_legacy(struct msm_vidc_inst *inst, u32 data_size) vpp_cycles += div_u64(vpp_cycles * 5, 100); /* increase vpp_cycles by 50% for preprocessing */ - if (inst->capabilities->cap[REQUEST_PREPROCESS].value) + if (inst->capabilities[REQUEST_PREPROCESS].value) vpp_cycles = vpp_cycles + vpp_cycles / 2; /* VSP */ /* bitrate is based on fps, scale it using operating rate */ - operating_rate = inst->capabilities->cap[OPERATING_RATE].value >> 16; + operating_rate = inst->capabilities[OPERATING_RATE].value >> 16; if (operating_rate > - (inst->capabilities->cap[FRAME_RATE].value >> 16) && - (inst->capabilities->cap[FRAME_RATE].value >> 16)) { + (inst->capabilities[FRAME_RATE].value >> 16) && + (inst->capabilities[FRAME_RATE].value >> 16)) { vsp_factor_num = operating_rate; - vsp_factor_den = inst->capabilities->cap[FRAME_RATE].value >> 16; + vsp_factor_den = inst->capabilities[FRAME_RATE].value >> 16; } - vsp_cycles = div_u64(((u64)inst->capabilities->cap[BIT_RATE].value * + vsp_cycles = div_u64(((u64)inst->capabilities[BIT_RATE].value * vsp_factor_num), vsp_factor_den); - base_cycles = inst->capabilities->cap[MB_CYCLES_VSP].value; + base_cycles = inst->capabilities[MB_CYCLES_VSP].value; if (inst->codec == MSM_VIDC_VP9) { vsp_cycles = div_u64(vsp_cycles * 170, 100); - } else if (inst->capabilities->cap[ENTROPY_MODE].value == + } else if (inst->capabilities[ENTROPY_MODE].value == V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC) { vsp_cycles = div_u64(vsp_cycles * 135, 100); } else { @@ -567,18 +567,18 @@ u64 msm_vidc_calc_freq_iris33_legacy(struct msm_vidc_inst *inst, u32 data_size) /* VSP FW Overhead 1.05 */ vsp_cycles = div_u64(vsp_cycles * 21, 20); - if (inst->capabilities->cap[STAGE].value == MSM_VIDC_STAGE_1) + if (inst->capabilities[STAGE].value == MSM_VIDC_STAGE_1) vsp_cycles = vsp_cycles * 3; vsp_cycles += mbs_per_second * base_cycles; } else if (inst->domain == MSM_VIDC_DECODER) { /* VPP */ - vpp_cycles = mbs_per_second * inst->capabilities->cap[MB_CYCLES_VPP].value / - inst->capabilities->cap[PIPE].value; + vpp_cycles = mbs_per_second * inst->capabilities[MB_CYCLES_VPP].value / + inst->capabilities[PIPE].value; /* 21 / 20 is minimum overhead factor */ vpp_cycles += max(vpp_cycles / 20, fw_vpp_cycles); - if (inst->capabilities->cap[PIPE].value > 1) { + if (inst->capabilities[PIPE].value > 1) { if (inst->codec == MSM_VIDC_AV1) { /* * Additional vpp_cycles are required for bitstreams with @@ -587,7 +587,7 @@ u64 msm_vidc_calc_freq_iris33_legacy(struct msm_vidc_inst *inst, u32 data_size) * non-recommended tiles: 1080P_V4XH2_V4X1, UHD_V8X4_V8X1, * 8KUHD_V8X8_V8X1 */ - if (inst->capabilities->cap[SUPER_BLOCK].value) + if (inst->capabilities[SUPER_BLOCK].value) vpp_cycles += div_u64(vpp_cycles * 1464, 1000); else vpp_cycles += div_u64(vpp_cycles * 410, 1000); @@ -630,7 +630,7 @@ u64 msm_vidc_calc_freq_iris33_legacy(struct msm_vidc_inst *inst, u32 data_size) input_bitrate_mbps = fps * data_size * 8 / (1024 * 1024); vsp_hw_min_frequency = freq_tbl_value * 1000 * input_bitrate_mbps; - if (inst->capabilities->cap[STAGE].value == MSM_VIDC_STAGE_2) { + if (inst->capabilities[STAGE].value == MSM_VIDC_STAGE_2) { vsp_hw_min_frequency += (bitrate_2stage[bitrate_entry] * fw_sw_vsp_offset - 1); vsp_hw_min_frequency = div_u64(vsp_hw_min_frequency, @@ -647,13 +647,13 @@ u64 msm_vidc_calc_freq_iris33_legacy(struct msm_vidc_inst *inst, u32 data_size) vsp_cycles = vsp_hw_min_frequency * 1000000; } else { base_cycles = inst->has_bframe ? - 80 : inst->capabilities->cap[MB_CYCLES_VSP].value; + 80 : inst->capabilities[MB_CYCLES_VSP].value; bitrate = fps * data_size * 8; vsp_cycles = bitrate; if (inst->codec == MSM_VIDC_VP9) { vsp_cycles = div_u64(vsp_cycles * 170, 100); - } else if (inst->capabilities->cap[ENTROPY_MODE].value == + } else if (inst->capabilities[ENTROPY_MODE].value == V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC) { vsp_cycles = div_u64(vsp_cycles * 135, 100); } else { @@ -663,7 +663,7 @@ u64 msm_vidc_calc_freq_iris33_legacy(struct msm_vidc_inst *inst, u32 data_size) /* VSP FW overhead 1.05 */ vsp_cycles = div_u64(vsp_cycles * 21, 20); - if (inst->capabilities->cap[STAGE].value == MSM_VIDC_STAGE_1) + if (inst->capabilities[STAGE].value == MSM_VIDC_STAGE_1) vsp_cycles = vsp_cycles * 3; vsp_cycles += mbs_per_second * base_cycles; @@ -678,9 +678,9 @@ u64 msm_vidc_calc_freq_iris33_legacy(struct msm_vidc_inst *inst, u32 data_size) } if (inst->codec == MSM_VIDC_VP9 && - inst->capabilities->cap[STAGE].value == + inst->capabilities[STAGE].value == MSM_VIDC_STAGE_2 && - inst->capabilities->cap[PIPE].value == 4 && + inst->capabilities[PIPE].value == 4 && bitrate > 90000000) vsp_cycles = msm_vidc_max_freq(inst); } @@ -1277,7 +1277,7 @@ int msm_vidc_ring_buf_count_iris33(struct msm_vidc_inst *inst, u32 data_size) struct api_calculation_input codec_input; struct api_calculation_freq_output codec_output; - if (!inst || !inst->core || !inst->capabilities) { + if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -1305,10 +1305,10 @@ int msm_vidc_ring_buf_count_iris33(struct msm_vidc_inst *inst, u32 data_size) if (is_vpp_cycles_close_to_freq_corner(core, codec_output.vpp_min_freq)) /* enables ring buffer */ - inst->capabilities->cap[ENC_RING_BUFFER_COUNT].value = + inst->capabilities[ENC_RING_BUFFER_COUNT].value = MAX_ENC_RING_BUF_COUNT; else - inst->capabilities->cap[ENC_RING_BUFFER_COUNT].value = 0; + inst->capabilities[ENC_RING_BUFFER_COUNT].value = 0; return 0; } diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 481d8c8732..313d8bcff3 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -45,7 +45,7 @@ static inline bool is_image_session(struct msm_vidc_inst *inst) static inline bool is_secure_session(struct msm_vidc_inst *inst) { - return !!(inst->capabilities->cap[SECURE_MODE].value); + return !!(inst->capabilities[SECURE_MODE].value); } static inline bool is_input_buffer(enum msm_vidc_buffer_type buffer_type) @@ -70,7 +70,7 @@ static inline bool is_output_meta_buffer(enum msm_vidc_buffer_type buffer_type) static inline bool is_ts_reorder_allowed(struct msm_vidc_inst *inst) { - return !!(inst->capabilities->cap[TS_REORDER].value && + return !!(inst->capabilities[TS_REORDER].value && is_decode_session(inst) && !is_image_session(inst)); } @@ -84,8 +84,8 @@ static inline bool is_scaling_enabled(struct msm_vidc_inst *inst) static inline bool is_rotation_90_or_270(struct msm_vidc_inst *inst) { - return inst->capabilities->cap[ROTATION].value == 90 || - inst->capabilities->cap[ROTATION].value == 270; + return inst->capabilities[ROTATION].value == 90 || + inst->capabilities[ROTATION].value == 270; } static inline bool is_internal_buffer(enum msm_vidc_buffer_type buffer_type) @@ -103,7 +103,7 @@ static inline bool is_internal_buffer(enum msm_vidc_buffer_type buffer_type) static inline bool is_meta_cap(struct msm_vidc_inst *inst, u32 cap) { - if (inst->capabilities->cap[cap].flags & CAP_FLAG_META) + if (inst->capabilities[cap].flags & CAP_FLAG_META) return true; return false; @@ -116,8 +116,8 @@ static inline bool is_meta_rx_inp_enabled(struct msm_vidc_inst *inst, u32 cap) if (!is_meta_cap(inst, cap)) return false; - if (inst->capabilities->cap[cap].value & MSM_VIDC_META_ENABLE && - inst->capabilities->cap[cap].value & MSM_VIDC_META_RX_INPUT) + if (inst->capabilities[cap].value & MSM_VIDC_META_ENABLE && + inst->capabilities[cap].value & MSM_VIDC_META_RX_INPUT) enabled = true; return enabled; @@ -130,8 +130,8 @@ static inline bool is_meta_rx_out_enabled(struct msm_vidc_inst *inst, u32 cap) if (!is_meta_cap(inst, cap)) return false; - if (inst->capabilities->cap[cap].value & MSM_VIDC_META_ENABLE && - inst->capabilities->cap[cap].value & MSM_VIDC_META_RX_OUTPUT) + if (inst->capabilities[cap].value & MSM_VIDC_META_ENABLE && + inst->capabilities[cap].value & MSM_VIDC_META_RX_OUTPUT) enabled = true; return enabled; @@ -144,8 +144,8 @@ static inline bool is_meta_tx_inp_enabled(struct msm_vidc_inst *inst, u32 cap) if (!is_meta_cap(inst, cap)) return false; - if (inst->capabilities->cap[cap].value & MSM_VIDC_META_ENABLE && - inst->capabilities->cap[cap].value & MSM_VIDC_META_TX_INPUT) + if (inst->capabilities[cap].value & MSM_VIDC_META_ENABLE && + inst->capabilities[cap].value & MSM_VIDC_META_TX_INPUT) enabled = true; return enabled; @@ -158,8 +158,8 @@ static inline bool is_dyn_meta_tx_inp_enabled(struct msm_vidc_inst *inst, u32 ca if (!is_meta_cap(inst, cap)) return false; - if (inst->capabilities->cap[cap].value & MSM_VIDC_META_DYN_ENABLE && - inst->capabilities->cap[cap].value & MSM_VIDC_META_TX_INPUT) + if (inst->capabilities[cap].value & MSM_VIDC_META_DYN_ENABLE && + inst->capabilities[cap].value & MSM_VIDC_META_TX_INPUT) enabled = true; return enabled; @@ -172,8 +172,8 @@ static inline bool is_meta_tx_out_enabled(struct msm_vidc_inst *inst, u32 cap) if (!is_meta_cap(inst, cap)) return false; - if (inst->capabilities->cap[cap].value & MSM_VIDC_META_ENABLE && - inst->capabilities->cap[cap].value & MSM_VIDC_META_TX_OUTPUT) + if (inst->capabilities[cap].value & MSM_VIDC_META_ENABLE && + inst->capabilities[cap].value & MSM_VIDC_META_TX_OUTPUT) enabled = true; return enabled; @@ -186,8 +186,8 @@ static inline bool is_dyn_meta_tx_out_enabled(struct msm_vidc_inst *inst, u32 ca if (!is_meta_cap(inst, cap)) return false; - if (inst->capabilities->cap[cap].value & MSM_VIDC_META_DYN_ENABLE && - inst->capabilities->cap[cap].value & MSM_VIDC_META_TX_OUTPUT) + if (inst->capabilities[cap].value & MSM_VIDC_META_DYN_ENABLE && + inst->capabilities[cap].value & MSM_VIDC_META_TX_OUTPUT) enabled = true; return enabled; @@ -323,37 +323,37 @@ static inline bool is_rgba_colorformat(enum msm_vidc_colorformat_type colorforma static inline bool is_thumbnail_session(struct msm_vidc_inst *inst) { - return !!(inst->capabilities->cap[THUMBNAIL_MODE].value); + return !!(inst->capabilities[THUMBNAIL_MODE].value); } static inline bool is_low_power_session(struct msm_vidc_inst *inst) { - return (inst->capabilities->cap[QUALITY_MODE].value == + return (inst->capabilities[QUALITY_MODE].value == MSM_VIDC_POWER_SAVE_MODE); } static inline bool is_realtime_session(struct msm_vidc_inst *inst) { - return inst->capabilities->cap[PRIORITY].value == 0 ? true : false; + return inst->capabilities[PRIORITY].value == 0 ? true : false; } static inline bool is_critical_priority_session(struct msm_vidc_inst *inst) { - return !!(inst->capabilities->cap[CRITICAL_PRIORITY].value); + return !!(inst->capabilities[CRITICAL_PRIORITY].value); } static inline bool is_lowlatency_session(struct msm_vidc_inst *inst) { - return !!(inst->capabilities->cap[LOWLATENCY_MODE].value); + return !!(inst->capabilities[LOWLATENCY_MODE].value); } static inline bool is_hierb_type_requested(struct msm_vidc_inst *inst) { return (inst->codec == MSM_VIDC_H264 && - inst->capabilities->cap[LAYER_TYPE].value == + inst->capabilities[LAYER_TYPE].value == V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_B) || (inst->codec == MSM_VIDC_HEVC && - inst->capabilities->cap[LAYER_TYPE].value == + inst->capabilities[LAYER_TYPE].value == V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B); } @@ -386,9 +386,9 @@ static inline bool is_enc_slice_delivery_mode(struct msm_vidc_inst *inst) if (is_decode_session(inst)) return false; - return (inst->capabilities->cap[SLICE_MODE].value == + return (inst->capabilities[SLICE_MODE].value == V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_MB && - inst->capabilities->cap[DELIVERY_MODE].value); + inst->capabilities[DELIVERY_MODE].value); } const char *cap_name(enum msm_vidc_inst_capability_type cap_id); diff --git a/driver/vidc/inc/msm_vidc_inst.h b/driver/vidc/inc/msm_vidc_inst.h index 62cebc8dea..7491cdfec9 100644 --- a/driver/vidc/inc/msm_vidc_inst.h +++ b/driver/vidc/inc/msm_vidc_inst.h @@ -132,7 +132,7 @@ struct msm_vidc_inst { struct msm_vidc_debug debug; struct debug_buf_count debug_count; struct msm_vidc_statistics stats; - struct msm_vidc_inst_capability *capabilities; + struct msm_vidc_inst_cap capabilities[INST_CAP_MAX+1]; struct completion completions[MAX_SIGNAL]; struct msm_vidc_fence_context fence_context; bool active; diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 48018eb1b3..8540f533fb 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -291,7 +291,7 @@ static int msm_vdec_set_cabac(struct msm_vidc_inst *inst, return -EINVAL; } - cabac = inst->capabilities->cap[ENTROPY_MODE].value; + cabac = inst->capabilities[ENTROPY_MODE].value; inst->subcr_params[port].cabac = cabac; i_vpr_h(inst, "%s: entropy mode: %d", __func__, cabac); rc = venus_hfi_session_property(inst, @@ -318,7 +318,7 @@ static int msm_vdec_set_coded_frames(struct msm_vidc_inst *inst, return -EINVAL; } - if (inst->capabilities->cap[CODED_FRAMES].value == + if (inst->capabilities[CODED_FRAMES].value == CODED_FRAMES_PROGRESSIVE) coded_frames = HFI_BITMASK_FRAME_MBS_ONLY_FLAG; inst->subcr_params[port].coded_frames = coded_frames; @@ -472,7 +472,7 @@ static int msm_vdec_set_profile(struct msm_vidc_inst *inst, return -EINVAL; } - profile = inst->capabilities->cap[PROFILE].value; + profile = inst->capabilities[PROFILE].value; inst->subcr_params[port].profile = profile; i_vpr_h(inst, "%s: profile: %d", __func__, profile); rc = venus_hfi_session_property(inst, @@ -501,7 +501,7 @@ static int msm_vdec_set_level(struct msm_vidc_inst *inst, return -EINVAL; } - level = inst->capabilities->cap[LEVEL].value; + level = inst->capabilities[LEVEL].value; inst->subcr_params[port].level = level; i_vpr_h(inst, "%s: level: %d", __func__, level); rc = venus_hfi_session_property(inst, @@ -530,7 +530,7 @@ static int msm_vdec_set_tier(struct msm_vidc_inst *inst, return -EINVAL; } - tier = inst->capabilities->cap[HEVC_TIER].value; + tier = inst->capabilities[HEVC_TIER].value; inst->subcr_params[port].tier = tier; i_vpr_h(inst, "%s: tier: %d", __func__, tier); rc = venus_hfi_session_property(inst, @@ -560,7 +560,7 @@ static int msm_vdec_set_av1_film_grain_present(struct msm_vidc_inst *inst, } inst->subcr_params[port].av1_film_grain_present = - inst->capabilities->cap[FILM_GRAIN].value; + inst->capabilities[FILM_GRAIN].value; fg_present = inst->subcr_params[port].av1_film_grain_present; i_vpr_h(inst, "%s: film grain present: %d", __func__, fg_present); rc = venus_hfi_session_property(inst, @@ -590,7 +590,7 @@ static int msm_vdec_set_av1_superblock_enabled(struct msm_vidc_inst *inst, } inst->subcr_params[port].av1_super_block_enabled = - inst->capabilities->cap[SUPER_BLOCK].value; + inst->capabilities[SUPER_BLOCK].value; sb_enabled = inst->subcr_params[port].av1_super_block_enabled; i_vpr_h(inst, "%s: super block enabled: %d", __func__, sb_enabled); rc = venus_hfi_session_property(inst, @@ -617,9 +617,9 @@ static int msm_vdec_set_opb_enable(struct msm_vidc_inst *inst) if (inst->codec != MSM_VIDC_AV1) return 0; - color_fmt = inst->capabilities->cap[PIX_FMTS].value; + color_fmt = inst->capabilities[PIX_FMTS].value; if (is_linear_colorformat(color_fmt) || - inst->capabilities->cap[FILM_GRAIN].value) + inst->capabilities[FILM_GRAIN].value) opb_enable = 1; i_vpr_h(inst, "%s: OPB enable: %d", __func__, opb_enable); @@ -975,15 +975,13 @@ static int msm_vdec_subscribe_metadata(struct msm_vidc_inst *inst, int rc = 0; u32 payload[32] = {0}; u32 i, count = 0; - struct msm_vidc_inst_capability *capability; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } i_vpr_h(inst, "%s()\n", __func__); - capability = inst->capabilities; payload[0] = HFI_MODE_METADATA; if (port == INPUT_PORT) { for (i = INST_CAP_NONE + 1; i < INST_CAP_MAX; i++) { @@ -996,7 +994,7 @@ static int msm_vdec_subscribe_metadata(struct msm_vidc_inst *inst, __func__, count, sizeof(payload) / sizeof(u32)); return -EINVAL; } - payload[count + 1] = capability->cap[i].hfi_id; + payload[count + 1] = inst->capabilities[i].hfi_id; count++; } } @@ -1011,7 +1009,7 @@ static int msm_vdec_subscribe_metadata(struct msm_vidc_inst *inst, __func__, count, sizeof(payload) / sizeof(u32)); return -EINVAL; } - payload[count + 1] = capability->cap[i].hfi_id; + payload[count + 1] = inst->capabilities[i].hfi_id; count++; } } @@ -1038,15 +1036,13 @@ static int msm_vdec_set_delivery_mode_metadata(struct msm_vidc_inst *inst, int rc = 0; u32 payload[32] = {0}; u32 i, count = 0; - struct msm_vidc_inst_capability *capability; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } i_vpr_h(inst, "%s()\n", __func__); - capability = inst->capabilities; payload[0] = HFI_MODE_METADATA; if (port == INPUT_PORT) { @@ -1058,7 +1054,7 @@ static int msm_vdec_set_delivery_mode_metadata(struct msm_vidc_inst *inst, __func__, count, sizeof(payload) / sizeof(u32)); return -EINVAL; } - payload[count + 1] = capability->cap[i].hfi_id; + payload[count + 1] = inst->capabilities[i].hfi_id; count++; } } @@ -1073,7 +1069,7 @@ static int msm_vdec_set_delivery_mode_metadata(struct msm_vidc_inst *inst, __func__, count, sizeof(payload) / sizeof(u32)); return -EINVAL; } - payload[count + 1] = capability->cap[i].hfi_id; + payload[count + 1] = inst->capabilities[i].hfi_id; count++; } } @@ -1100,26 +1096,24 @@ static int msm_vdec_set_delivery_mode_property(struct msm_vidc_inst *inst, int rc = 0; u32 payload[32] = {0}; u32 i, count = 0; - struct msm_vidc_inst_capability *capability; static const u32 property_output_list[] = { META_OUTBUF_FENCE, }; static const u32 property_input_list[] = {}; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } i_vpr_h(inst, "%s()\n", __func__); - capability = inst->capabilities; payload[0] = HFI_MODE_PROPERTY; if (port == INPUT_PORT) { for (i = 0; i < ARRAY_SIZE(property_input_list); i++) { - if (capability->cap[property_input_list[i]].value) { + if (inst->capabilities[property_input_list[i]].value) { payload[count + 1] = - capability->cap[property_input_list[i]].hfi_id; + inst->capabilities[property_input_list[i]].hfi_id; count++; } } @@ -1135,13 +1129,13 @@ static int msm_vdec_set_delivery_mode_property(struct msm_vidc_inst *inst, * delivery mode property. */ payload[count + 1] = - capability->cap[property_output_list[i]].hfi_id; + inst->capabilities[property_output_list[i]].hfi_id; count++; continue; } - if (capability->cap[property_output_list[i]].value) { + if (inst->capabilities[property_output_list[i]].value) { payload[count + 1] = - capability->cap[property_output_list[i]].hfi_id; + inst->capabilities[property_output_list[i]].hfi_id; count++; } } @@ -1171,7 +1165,7 @@ int msm_vdec_init_input_subcr_params(struct msm_vidc_inst *inst) u32 colour_description_present_flag = 0; u32 video_signal_type_present_flag = 0; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -1211,12 +1205,12 @@ int msm_vdec_init_input_subcr_params(struct msm_vidc_inst *inst) ((video_format << 26) & 0x1C000000) | ((video_signal_type_present_flag << 29) & 0x20000000); - subsc_params->profile = inst->capabilities->cap[PROFILE].value; - subsc_params->level = inst->capabilities->cap[LEVEL].value; - subsc_params->tier = inst->capabilities->cap[HEVC_TIER].value; - subsc_params->pic_order_cnt = inst->capabilities->cap[POC].value; - subsc_params->bit_depth = inst->capabilities->cap[BIT_DEPTH].value; - if (inst->capabilities->cap[CODED_FRAMES].value == + subsc_params->profile = inst->capabilities[PROFILE].value; + subsc_params->level = inst->capabilities[LEVEL].value; + subsc_params->tier = inst->capabilities[HEVC_TIER].value; + subsc_params->pic_order_cnt = inst->capabilities[POC].value; + subsc_params->bit_depth = inst->capabilities[BIT_DEPTH].value; + if (inst->capabilities[CODED_FRAMES].value == CODED_FRAMES_PROGRESSIVE) subsc_params->coded_frames = HFI_BITMASK_FRAME_MBS_ONLY_FLAG; else @@ -1230,12 +1224,12 @@ int msm_vdec_set_num_comv(struct msm_vidc_inst *inst) int rc = 0; u32 num_comv = 0; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - num_comv = inst->capabilities->cap[NUM_COMV].value; + num_comv = inst->capabilities[NUM_COMV].value; i_vpr_h(inst, "%s: num COMV: %d", __func__, num_comv); rc = venus_hfi_session_property(inst, HFI_PROP_COMV_BUFFER_COUNT, @@ -1263,7 +1257,7 @@ static int msm_vdec_read_input_subcr_params(struct msm_vidc_inst *inst) u32 video_signal_type_present_flag = 0; enum msm_vidc_colorformat_type output_fmt; - if (!inst || !inst->core || !inst->capabilities) { + if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -1377,7 +1371,7 @@ static int msm_vdec_read_input_subcr_params(struct msm_vidc_inst *inst) } /* disable META_OUTBUF_FENCE if session is Interlace type */ - if (inst->capabilities->cap[CODED_FRAMES].value == + if (inst->capabilities[CODED_FRAMES].value == CODED_FRAMES_INTERLACE) { msm_vidc_update_cap_value(inst, META_OUTBUF_FENCE, MSM_VIDC_META_RX_INPUT | @@ -1762,13 +1756,11 @@ static int msm_vdec_update_max_map_output_count(struct msm_vidc_inst *inst) int msm_vdec_streamon_output(struct msm_vidc_inst *inst) { int rc = 0; - struct msm_vidc_inst_capability *capability; - if (!inst || !inst->core || !inst->capabilities) { + if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - capability = inst->capabilities; if (is_output_meta_enabled(inst) && !inst->bufq[OUTPUT_META_PORT].vb2q->streaming) { @@ -1778,8 +1770,8 @@ int msm_vdec_streamon_output(struct msm_vidc_inst *inst) return -EINVAL; } - if (capability->cap[CODED_FRAMES].value == CODED_FRAMES_INTERLACE && - !is_ubwc_colorformat(capability->cap[PIX_FMTS].value)) { + if (inst->capabilities[CODED_FRAMES].value == CODED_FRAMES_INTERLACE && + !is_ubwc_colorformat(inst->capabilities[PIX_FMTS].value)) { i_vpr_e(inst, "%s: interlace with non-ubwc color format is unsupported\n", __func__); @@ -2006,13 +1998,13 @@ int msm_vdec_qbuf(struct msm_vidc_inst *inst, struct vb2_buffer *vb2) { int rc = 0; - if (!inst || !vb2 || !inst->capabilities) { + if (!inst || !vb2) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } if (inst->adjust_priority) { - s32 priority = inst->capabilities->cap[PRIORITY].value; + s32 priority = inst->capabilities[PRIORITY].value; priority += inst->adjust_priority; inst->adjust_priority = 0; @@ -2029,7 +2021,7 @@ int msm_vdec_qbuf(struct msm_vidc_inst *inst, struct vb2_buffer *vb2) return rc; if (vb2->type == OUTPUT_MPLANE) { - if (inst->capabilities->cap[DPB_LIST].value) { + if (inst->capabilities[DPB_LIST].value) { rc = msm_vdec_release_nonref_buffers(inst); if (rc) return rc; @@ -2099,21 +2091,19 @@ int msm_vdec_stop_cmd(struct msm_vidc_inst *inst) int msm_vdec_start_cmd(struct msm_vidc_inst *inst) { - struct msm_vidc_inst_capability *capability; int rc = 0; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - capability = inst->capabilities; i_vpr_h(inst, "received cmd: resume\n"); vb2_clear_last_buffer_dequeued(inst->bufq[OUTPUT_META_PORT].vb2q); vb2_clear_last_buffer_dequeued(inst->bufq[OUTPUT_PORT].vb2q); - if (capability->cap[CODED_FRAMES].value == CODED_FRAMES_INTERLACE && - !is_ubwc_colorformat(capability->cap[PIX_FMTS].value)) { + if (inst->capabilities[CODED_FRAMES].value == CODED_FRAMES_INTERLACE && + !is_ubwc_colorformat(inst->capabilities[PIX_FMTS].value)) { i_vpr_e(inst, "%s: interlace with non-ubwc color format is unsupported\n", __func__); @@ -2527,13 +2517,13 @@ static int msm_vdec_check_colorformat_supported(struct msm_vidc_inst* inst, * bit_depth 10 bit supports 10 bit colorformats only * interlace supports ubwc colorformats only */ - if (inst->capabilities->cap[BIT_DEPTH].value == BIT_DEPTH_8 && + if (inst->capabilities[BIT_DEPTH].value == BIT_DEPTH_8 && !is_8bit_colorformat(colorformat)) supported = false; - if (inst->capabilities->cap[BIT_DEPTH].value == BIT_DEPTH_10 && + if (inst->capabilities[BIT_DEPTH].value == BIT_DEPTH_10 && !is_10bit_colorformat(colorformat)) supported = false; - if (inst->capabilities->cap[CODED_FRAMES].value == + if (inst->capabilities[CODED_FRAMES].value == CODED_FRAMES_INTERLACE && !is_ubwc_colorformat(colorformat)) supported = false; @@ -2548,7 +2538,7 @@ int msm_vdec_enum_fmt(struct msm_vidc_inst *inst, struct v4l2_fmtdesc *f) u32 array[32] = {0}; u32 i = 0; - if (!inst || !inst->core || !inst->capabilities || !f || + if (!inst || !inst->core || !f || f->index >= ARRAY_SIZE(array)) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; @@ -2576,7 +2566,7 @@ int msm_vdec_enum_fmt(struct msm_vidc_inst *inst, struct v4l2_fmtdesc *f) f->flags = V4L2_FMT_FLAG_COMPRESSED; strlcpy(f->description, "codec", sizeof(f->description)); } else if (f->type == OUTPUT_MPLANE) { - u32 formats = inst->capabilities->cap[PIX_FMTS].step_or_mask; + u32 formats = inst->capabilities[PIX_FMTS].step_or_mask; u32 idx = 0; for (i = 0; i <= 31; i++) { diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index e5d3c9639d..17aa6ff4c8 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -122,7 +122,7 @@ static int msm_venc_set_colorformat(struct msm_vidc_inst *inst, pixelformat = inst->fmts[INPUT_PORT].fmt.pix_mp.pixelformat; colorformat = v4l2_colorformat_to_driver(inst, pixelformat, __func__); - if (!(colorformat & inst->capabilities->cap[PIX_FMTS].step_or_mask)) { + if (!(colorformat & inst->capabilities[PIX_FMTS].step_or_mask)) { i_vpr_e(inst, "%s: invalid pixelformat %s\n", __func__, v4l2_pixelfmt_name(inst, pixelformat)); return -EINVAL; @@ -156,7 +156,7 @@ static int msm_venc_set_stride_scanline(struct msm_vidc_inst *inst, return -EINVAL; } - color_format = inst->capabilities->cap[PIX_FMTS].value; + color_format = inst->capabilities[PIX_FMTS].value; if (!is_linear_colorformat(color_format)) { i_vpr_h(inst, "%s: not a linear color fmt, property is not set\n", @@ -331,7 +331,7 @@ static int msm_venc_set_colorspace(struct msm_vidc_inst* inst, return -EINVAL; } - if (inst->capabilities->cap[SIGNAL_COLOR_INFO].flags & CAP_FLAG_CLIENT_SET) { + if (inst->capabilities[SIGNAL_COLOR_INFO].flags & CAP_FLAG_CLIENT_SET) { i_vpr_h(inst, "%s: client configured colorspace via control\n", __func__); return 0; } @@ -397,7 +397,7 @@ static int msm_venc_set_csc(struct msm_vidc_inst* inst, return -EINVAL; } - csc = inst->capabilities->cap[CSC].value; + csc = inst->capabilities[CSC].value; i_vpr_h(inst, "%s: csc: %u\n", __func__, csc); rc = venus_hfi_session_property(inst, HFI_PROP_CSC, @@ -416,7 +416,6 @@ static int msm_venc_set_quality_mode(struct msm_vidc_inst *inst) { int rc = 0; struct msm_vidc_core* core = inst->core; - struct msm_vidc_inst_capability *capability = inst->capabilities; u32 mode; rc = call_session_op(core, decide_quality_mode, inst); @@ -426,7 +425,7 @@ static int msm_venc_set_quality_mode(struct msm_vidc_inst *inst) return -EINVAL; } - mode = capability->cap[QUALITY_MODE].value; + mode = inst->capabilities[QUALITY_MODE].value; i_vpr_h(inst, "%s: quality_mode: %u\n", __func__, mode); rc = venus_hfi_session_property(inst, HFI_PROP_QUALITY_MODE, @@ -445,11 +444,7 @@ static int msm_venc_set_ring_buffer_count(struct msm_vidc_inst *inst) int rc = 0; struct msm_vidc_inst_cap *cap; - if (!inst->capabilities) { - i_vpr_e(inst, "%s: invalid params\n", __func__); - return -EINVAL; - } - cap = &inst->capabilities->cap[ENC_RING_BUFFER_COUNT]; + cap = &inst->capabilities[ENC_RING_BUFFER_COUNT]; if (!cap->set) return 0; @@ -720,7 +715,6 @@ static int msm_venc_metadata_delivery(struct msm_vidc_inst *inst, int rc = 0; u32 payload[32] = {0}; u32 i, count = 0; - struct msm_vidc_inst_capability *capability; if (!inst) { d_vpr_e("%s: invalid params\n", __func__); @@ -728,7 +722,6 @@ static int msm_venc_metadata_delivery(struct msm_vidc_inst *inst, } i_vpr_h(inst, "%s()\n", __func__); - capability = inst->capabilities; payload[0] = HFI_MODE_METADATA; if (port == INPUT_PORT) { @@ -740,7 +733,7 @@ static int msm_venc_metadata_delivery(struct msm_vidc_inst *inst, __func__, count, sizeof(payload) / sizeof(u32)); return -EINVAL; } - payload[count + 1] = capability->cap[i].hfi_id; + payload[count + 1] = inst->capabilities[i].hfi_id; count++; } } @@ -753,7 +746,7 @@ static int msm_venc_metadata_delivery(struct msm_vidc_inst *inst, __func__, count, sizeof(payload) / sizeof(u32)); return -EINVAL; } - payload[count + 1] = capability->cap[i].hfi_id; + payload[count + 1] = inst->capabilities[i].hfi_id; count++; } } @@ -780,15 +773,13 @@ static int msm_venc_dynamic_metadata_delivery(struct msm_vidc_inst *inst, int rc = 0; u32 payload[32] = {0}; u32 i, count = 0; - struct msm_vidc_inst_capability *capability; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } i_vpr_h(inst, "%s()\n", __func__); - capability = inst->capabilities; payload[0] = HFI_MODE_DYNAMIC_METADATA; if (port != INPUT_PORT) { @@ -804,7 +795,7 @@ static int msm_venc_dynamic_metadata_delivery(struct msm_vidc_inst *inst, __func__, count, sizeof(payload) / sizeof(u32)); return -EINVAL; } - payload[count + 1] = capability->cap[i].hfi_id; + payload[count + 1] = inst->capabilities[i].hfi_id; count++; } } @@ -827,7 +818,6 @@ static int msm_venc_metadata_subscription(struct msm_vidc_inst *inst, int rc = 0; u32 payload[32] = {0}; u32 i, count = 0; - struct msm_vidc_inst_capability *capability; if (!inst) { d_vpr_e("%s: invalid params\n", __func__); @@ -835,7 +825,6 @@ static int msm_venc_metadata_subscription(struct msm_vidc_inst *inst, } i_vpr_h(inst, "%s()\n", __func__); - capability = inst->capabilities; payload[0] = HFI_MODE_METADATA; if (port == INPUT_PORT) { @@ -847,7 +836,7 @@ static int msm_venc_metadata_subscription(struct msm_vidc_inst *inst, __func__, count, sizeof(payload) / sizeof(u32)); return -EINVAL; } - payload[count + 1] = capability->cap[i].hfi_id; + payload[count + 1] = inst->capabilities[i].hfi_id; count++; } } @@ -860,7 +849,7 @@ static int msm_venc_metadata_subscription(struct msm_vidc_inst *inst, __func__, count, sizeof(payload) / sizeof(u32)); return -EINVAL; } - payload[count + 1] = capability->cap[i].hfi_id; + payload[count + 1] = inst->capabilities[i].hfi_id; count++; } } @@ -885,7 +874,7 @@ int msm_venc_streamoff_input(struct msm_vidc_inst *inst) { int rc = 0; - if (!inst || !inst->core || !inst->capabilities) { + if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -901,7 +890,7 @@ int msm_venc_streamon_input(struct msm_vidc_inst *inst) { int rc = 0; - if (!inst || !inst->core || !inst->capabilities) { + if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -969,7 +958,7 @@ int msm_venc_qbuf(struct msm_vidc_inst *inst, struct vb2_buffer *vb2) { int rc = 0; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -1024,7 +1013,7 @@ int msm_venc_streamoff_output(struct msm_vidc_inst *inst) int rc = 0; struct msm_vidc_core *core; - if (!inst || !inst->core || !inst->capabilities) { + if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -1036,7 +1025,7 @@ int msm_venc_streamoff_output(struct msm_vidc_inst *inst) } /* restore LAYER_COUNT max allowed value */ - inst->capabilities->cap[ENH_LAYER_COUNT].max = + inst->capabilities[ENH_LAYER_COUNT].max = core->capabilities[MAX_ENH_LAYER_COUNT].value; rc = msm_vidc_session_streamoff(inst, OUTPUT_PORT); @@ -1050,7 +1039,7 @@ int msm_venc_streamon_output(struct msm_vidc_inst *inst) { int rc = 0; - if (!inst || !inst->core || !inst->capabilities) { + if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -1282,7 +1271,7 @@ static int msm_venc_s_fmt_input(struct msm_vidc_inst *inst, struct v4l2_format * struct msm_vidc_core *core; u32 pix_fmt, width, height, size, bytesperline; - if (!inst || !inst->core || !inst->capabilities) { + if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -1629,7 +1618,6 @@ int msm_venc_s_param(struct msm_vidc_inst *inst, struct v4l2_streamparm *s_parm) { int rc = 0; - struct msm_vidc_inst_capability *capability = NULL; struct v4l2_fract *timeperframe = NULL; u32 q16_rate, max_rate, default_rate; u64 us_per_frame = 0, input_rate = 0; @@ -1639,18 +1627,17 @@ int msm_venc_s_param(struct msm_vidc_inst *inst, d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - capability = inst->capabilities; if (s_parm->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) { timeperframe = &s_parm->parm.output.timeperframe; - max_rate = capability->cap[OPERATING_RATE].max >> 16; - default_rate = capability->cap[OPERATING_RATE].value >> 16; + max_rate = inst->capabilities[OPERATING_RATE].max >> 16; + default_rate = inst->capabilities[OPERATING_RATE].value >> 16; s_parm->parm.output.capability = V4L2_CAP_TIMEPERFRAME; } else { timeperframe = &s_parm->parm.capture.timeperframe; is_frame_rate = true; - max_rate = capability->cap[FRAME_RATE].max >> 16; - default_rate = capability->cap[FRAME_RATE].value >> 16; + max_rate = inst->capabilities[FRAME_RATE].max >> 16; + default_rate = inst->capabilities[FRAME_RATE].value >> 16; s_parm->parm.capture.capability = V4L2_CAP_TIMEPERFRAME; } @@ -1700,9 +1687,9 @@ int msm_venc_s_param(struct msm_vidc_inst *inst, } if (is_frame_rate) - capability->cap[FRAME_RATE].flags |= CAP_FLAG_CLIENT_SET; + inst->capabilities[FRAME_RATE].flags |= CAP_FLAG_CLIENT_SET; else - capability->cap[OPERATING_RATE].flags |= CAP_FLAG_CLIENT_SET; + inst->capabilities[OPERATING_RATE].flags |= CAP_FLAG_CLIENT_SET; /* * In static case, frame rate is set via * inst database set function mentioned in @@ -1741,26 +1728,24 @@ exit: int msm_venc_g_param(struct msm_vidc_inst *inst, struct v4l2_streamparm *s_parm) { - struct msm_vidc_inst_capability *capability = NULL; struct v4l2_fract *timeperframe = NULL; if (!inst || !s_parm) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - capability = inst->capabilities; if (s_parm->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) { timeperframe = &s_parm->parm.output.timeperframe; timeperframe->numerator = 1; timeperframe->denominator = - capability->cap[OPERATING_RATE].value >> 16; + inst->capabilities[OPERATING_RATE].value >> 16; s_parm->parm.output.capability = V4L2_CAP_TIMEPERFRAME; } else { timeperframe = &s_parm->parm.capture.timeperframe; timeperframe->numerator = 1; timeperframe->denominator = - capability->cap[FRAME_RATE].value >> 16; + inst->capabilities[FRAME_RATE].value >> 16; s_parm->parm.capture.capability = V4L2_CAP_TIMEPERFRAME; } @@ -1805,7 +1790,7 @@ int msm_venc_enum_fmt(struct msm_vidc_inst *inst, struct v4l2_fmtdesc *f) u32 array[32] = {0}; u32 i = 0; - if (!inst || !inst->core || !inst->capabilities || !f || + if (!inst || !inst->core || !f || f->index >= ARRAY_SIZE(array)) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; @@ -1836,7 +1821,7 @@ int msm_venc_enum_fmt(struct msm_vidc_inst *inst, struct v4l2_fmtdesc *f) f->flags = V4L2_FMT_FLAG_COMPRESSED; strlcpy(f->description, "codec", sizeof(f->description)); } else if (f->type == INPUT_MPLANE) { - u32 formats = inst->capabilities->cap[PIX_FMTS].step_or_mask; + u32 formats = inst->capabilities[PIX_FMTS].step_or_mask; u32 idx = 0; for (i = 0; i <= 31; i++) { diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index 2dd690e433..f81a45058f 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -698,7 +698,6 @@ EXPORT_SYMBOL(msm_vidc_stop_cmd); int msm_vidc_enum_framesizes(void *instance, struct v4l2_frmsizeenum *fsize) { struct msm_vidc_inst *inst = instance; - struct msm_vidc_inst_capability *capability; enum msm_vidc_colorformat_type colorfmt; enum msm_vidc_codec_type codec; u32 meta_fmt; @@ -708,11 +707,6 @@ int msm_vidc_enum_framesizes(void *instance, struct v4l2_frmsizeenum *fsize) __func__, inst, fsize); return -EINVAL; } - if (!inst->capabilities) { - i_vpr_e(inst, "%s: capabilities not available\n", __func__); - return -EINVAL; - } - capability = inst->capabilities; /* only index 0 allowed as per v4l2 spec */ if (fsize->index) @@ -734,14 +728,14 @@ int msm_vidc_enum_framesizes(void *instance, struct v4l2_frmsizeenum *fsize) } fsize->type = V4L2_FRMSIZE_TYPE_STEPWISE; - fsize->stepwise.min_width = capability->cap[FRAME_WIDTH].min; - fsize->stepwise.max_width = capability->cap[FRAME_WIDTH].max; + fsize->stepwise.min_width = inst->capabilities[FRAME_WIDTH].min; + fsize->stepwise.max_width = inst->capabilities[FRAME_WIDTH].max; fsize->stepwise.step_width = - capability->cap[FRAME_WIDTH].step_or_mask; - fsize->stepwise.min_height = capability->cap[FRAME_HEIGHT].min; - fsize->stepwise.max_height = capability->cap[FRAME_HEIGHT].max; + inst->capabilities[FRAME_WIDTH].step_or_mask; + fsize->stepwise.min_height = inst->capabilities[FRAME_HEIGHT].min; + fsize->stepwise.max_height = inst->capabilities[FRAME_HEIGHT].max; fsize->stepwise.step_height = - capability->cap[FRAME_HEIGHT].step_or_mask; + inst->capabilities[FRAME_HEIGHT].step_or_mask; return 0; } @@ -751,7 +745,6 @@ int msm_vidc_enum_frameintervals(void *instance, struct v4l2_frmivalenum *fival) { struct msm_vidc_inst *inst = instance; struct msm_vidc_core *core; - struct msm_vidc_inst_capability *capability; enum msm_vidc_colorformat_type colorfmt; u32 fps, mbpf; u32 meta_fmt; @@ -769,11 +762,6 @@ int msm_vidc_enum_frameintervals(void *instance, struct v4l2_frmivalenum *fival) core = inst->core; - if (!inst->capabilities || !core->capabilities) { - i_vpr_e(inst, "%s: capabilities not available\n", __func__); - return -EINVAL; - } - capability = inst->capabilities; /* only index 0 allowed as per v4l2 spec */ if (fival->index) @@ -791,10 +779,10 @@ int msm_vidc_enum_frameintervals(void *instance, struct v4l2_frmivalenum *fival) } /* validate resolution */ - if (fival->width > capability->cap[FRAME_WIDTH].max || - fival->width < capability->cap[FRAME_WIDTH].min || - fival->height > capability->cap[FRAME_HEIGHT].max || - fival->height < capability->cap[FRAME_HEIGHT].min) { + if (fival->width > inst->capabilities[FRAME_WIDTH].max || + fival->width < inst->capabilities[FRAME_WIDTH].min || + fival->height > inst->capabilities[FRAME_HEIGHT].max || + fival->height < inst->capabilities[FRAME_HEIGHT].min) { i_vpr_e(inst, "%s: unsupported resolution %u x %u\n", __func__, fival->width, fival->height); return -EINVAL; @@ -807,11 +795,11 @@ int msm_vidc_enum_frameintervals(void *instance, struct v4l2_frmivalenum *fival) fival->type = V4L2_FRMIVAL_TYPE_STEPWISE; fival->stepwise.min.numerator = 1; fival->stepwise.min.denominator = - min_t(u32, fps, capability->cap[FRAME_RATE].max); + min_t(u32, fps, inst->capabilities[FRAME_RATE].max); fival->stepwise.max.numerator = 1; fival->stepwise.max.denominator = 1; fival->stepwise.step.numerator = 1; - fival->stepwise.step.denominator = capability->cap[FRAME_RATE].max; + fival->stepwise.step.denominator = inst->capabilities[FRAME_RATE].max; return 0; } @@ -907,11 +895,6 @@ void *msm_vidc_open(void *vidc_core, u32 session_type) if (rc) return NULL; - rc = msm_vidc_vmem_alloc(sizeof(struct msm_vidc_inst_capability), - (void **)&inst->capabilities, "inst capability"); - if (rc) - goto fail_alloc_inst_caps; - inst->core = core; inst->domain = session_type; inst->session_id = hash32_ptr(inst); @@ -1050,8 +1033,6 @@ fail_add_session: mutex_destroy(&inst->client_lock); mutex_destroy(&inst->request_lock); mutex_destroy(&inst->lock); - msm_vidc_vmem_free((void **)&inst->capabilities); -fail_alloc_inst_caps: msm_vidc_vmem_free((void **)&inst); return NULL; } diff --git a/driver/vidc/src/msm_vidc_buffer.c b/driver/vidc/src/msm_vidc_buffer.c index af6d802ecb..0d33ae6bfc 100644 --- a/driver/vidc/src/msm_vidc_buffer.c +++ b/driver/vidc/src/msm_vidc_buffer.c @@ -18,7 +18,7 @@ u32 msm_vidc_input_min_count(struct msm_vidc_inst* inst) u32 input_min_count = 0; u32 hb_enh_layer = 0; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return 0; } @@ -29,9 +29,9 @@ u32 msm_vidc_input_min_count(struct msm_vidc_inst* inst) input_min_count = MIN_ENC_INPUT_BUFFERS; if (is_hierb_type_requested(inst)) { hb_enh_layer = - inst->capabilities->cap[ENH_LAYER_COUNT].value; + inst->capabilities[ENH_LAYER_COUNT].value; if (inst->codec == MSM_VIDC_H264 && - !inst->capabilities->cap[LAYER_ENABLE].value) { + !inst->capabilities[LAYER_ENABLE].value) { hb_enh_layer = 0; } if (hb_enh_layer) @@ -215,13 +215,13 @@ u32 msm_vidc_decoder_input_size(struct msm_vidc_inst *inst) u32 bitstream_size_overwrite = 0; enum msm_vidc_codec_type codec; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return 0; } bitstream_size_overwrite = - inst->capabilities->cap[BITSTREAM_SIZE_OVERWRITE].value; + inst->capabilities[BITSTREAM_SIZE_OVERWRITE].value; if (bitstream_size_overwrite) { frame_size = bitstream_size_overwrite; i_vpr_h(inst, "client configured bitstream buffer size %d\n", @@ -241,7 +241,7 @@ u32 msm_vidc_decoder_input_size(struct msm_vidc_inst *inst) num_mbs = msm_vidc_get_mbs_per_frame(inst); if (num_mbs > NUM_MBS_4k) { div_factor = 4; - base_res_mbs = inst->capabilities->cap[MBPF].value; + base_res_mbs = inst->capabilities[MBPF].value; } else { base_res_mbs = NUM_MBS_4k; if (codec == MSM_VIDC_VP9) @@ -294,7 +294,7 @@ u32 msm_vidc_decoder_output_meta_size(struct msm_vidc_inst *inst) { u32 size = MSM_VIDC_METADATA_SIZE; - if (inst->capabilities->cap[META_DOLBY_RPU].value) + if (inst->capabilities[META_DOLBY_RPU].value) size += MSM_VIDC_METADATA_DOLBY_RPU_SIZE; return ALIGN(size, SZ_4K); @@ -329,7 +329,7 @@ u32 msm_vidc_enc_delivery_mode_based_output_buf_size(struct msm_vidc_inst *inst, u32 total_mb_count; struct v4l2_format *f; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return frame_size; } @@ -340,7 +340,7 @@ u32 msm_vidc_enc_delivery_mode_based_output_buf_size(struct msm_vidc_inst *inst, f->fmt.pix_mp.pixelformat != V4L2_PIX_FMT_H264) return frame_size; - if (inst->capabilities->cap[SLICE_MODE].value != V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_MB) + if (inst->capabilities[SLICE_MODE].value != V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_MB) return frame_size; if (!is_enc_slice_delivery_mode(inst)) @@ -353,7 +353,7 @@ u32 msm_vidc_enc_delivery_mode_based_output_buf_size(struct msm_vidc_inst *inst, height_in_lcus = (height + lcu_size - 1) / lcu_size; total_mb_count = width_in_lcus * height_in_lcus; - slice_size = ((frame_size * inst->capabilities->cap[SLICE_MAX_MB].value) \ + slice_size = ((frame_size * inst->capabilities[SLICE_MAX_MB].value) + total_mb_count - 1) / total_mb_count; slice_size = ALIGN(slice_size, SZ_4K); @@ -368,7 +368,7 @@ u32 msm_vidc_encoder_output_size(struct msm_vidc_inst *inst) struct v4l2_format *f; enum msm_vidc_codec_type codec; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return 0; } @@ -391,7 +391,7 @@ u32 msm_vidc_encoder_output_size(struct msm_vidc_inst *inst) /* Image session: 2 x yuv size */ if (is_image_session(inst) || - inst->capabilities->cap[BITRATE_MODE].value == V4L2_MPEG_VIDEO_BITRATE_MODE_CQ) + inst->capabilities[BITRATE_MODE].value == V4L2_MPEG_VIDEO_BITRATE_MODE_CQ) goto skip_calc; if (mbs_per_frame <= NUM_MBS_360P) @@ -442,14 +442,14 @@ u32 msm_vidc_encoder_input_meta_size(struct msm_vidc_inst *inst) struct v4l2_format *f; u32 width, height; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return 0; } size = MSM_VIDC_METADATA_SIZE; - if (inst->capabilities->cap[META_ROI_INFO].value) { + if (inst->capabilities[META_ROI_INFO].value) { lcu_size = 16; f = &inst->fmts[OUTPUT_PORT]; @@ -467,7 +467,7 @@ u32 msm_vidc_encoder_input_meta_size(struct msm_vidc_inst *inst) size = ALIGN(size, SZ_4K); } - if (inst->capabilities->cap[META_DOLBY_RPU].value) { + if (inst->capabilities[META_DOLBY_RPU].value) { size += MSM_VIDC_METADATA_DOLBY_RPU_SIZE; size = ALIGN(size, SZ_4K); } diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 2b852ace9d..19e1cfa1b0 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -155,12 +155,12 @@ bool is_valid_cap_id(enum msm_vidc_inst_capability_type cap_id) bool is_valid_cap(struct msm_vidc_inst *inst, enum msm_vidc_inst_capability_type cap_id) { - if (!inst || !inst->capabilities) + if (!inst) return false; if (cap_id <= INST_CAP_NONE || cap_id >= INST_CAP_MAX) return false; - return !!inst->capabilities->cap[cap_id].cap_id; + return !!inst->capabilities[cap_id].cap_id; } static inline bool is_all_childrens_visited( @@ -244,7 +244,7 @@ static int msm_vidc_add_children(struct msm_vidc_inst *inst, struct msm_vidc_inst_cap *cap; int i, rc = 0; - cap = &inst->capabilities->cap[cap_id]; + cap = &inst->capabilities[cap_id]; for (i = 0; i < MAX_CAP_CHILDREN; i++) { if (!cap->children[i]) @@ -273,7 +273,7 @@ static int msm_vidc_adjust_cap(struct msm_vidc_inst *inst, return 0; /* validate cap */ - cap = &inst->capabilities->cap[cap_id]; + cap = &inst->capabilities[cap_id]; if (!is_valid_cap(inst, cap->cap_id)) return 0; @@ -306,7 +306,7 @@ static int msm_vidc_set_cap(struct msm_vidc_inst *inst, return 0; /* validate cap */ - cap = &inst->capabilities->cap[cap_id]; + cap = &inst->capabilities[cap_id]; if (!is_valid_cap(inst, cap->cap_id)) return 0; @@ -328,15 +328,15 @@ static int msm_vidc_adjust_dynamic_property(struct msm_vidc_inst *inst, enum msm_vidc_inst_capability_type cap_id, struct v4l2_ctrl *ctrl) { struct msm_vidc_inst_cap_entry *entry = NULL, *temp = NULL; - struct msm_vidc_inst_capability *capability; + struct msm_vidc_inst_cap *cap; s32 prev_value; int rc = 0; - if (!inst || !inst->capabilities || !ctrl) { + if (!inst || !ctrl) { d_vpr_e("%s: invalid param\n", __func__); return -EINVAL; } - capability = inst->capabilities; + cap = &inst->capabilities[0]; /* sanitize cap_id */ if (!is_valid_cap_id(cap_id)) { @@ -344,7 +344,7 @@ static int msm_vidc_adjust_dynamic_property(struct msm_vidc_inst *inst, return -EINVAL; } - if (!(capability->cap[cap_id].flags & CAP_FLAG_DYNAMIC_ALLOWED)) { + if (!(cap[cap_id].flags & CAP_FLAG_DYNAMIC_ALLOWED)) { i_vpr_h(inst, "%s: dynamic setting of cap[%d] %s is not allowed\n", __func__, cap_id, cap_name(cap_id)); @@ -352,12 +352,12 @@ static int msm_vidc_adjust_dynamic_property(struct msm_vidc_inst *inst, } i_vpr_h(inst, "%s: cap[%d] %s\n", __func__, cap_id, cap_name(cap_id)); - prev_value = capability->cap[cap_id].value; + prev_value = cap[cap_id].value; rc = msm_vidc_adjust_cap(inst, cap_id, ctrl, __func__); if (rc) return rc; - if (capability->cap[cap_id].value == prev_value && cap_id == GOP_SIZE) { + if (cap[cap_id].value == prev_value && cap_id == GOP_SIZE) { /* * Ignore setting same GOP size value to firmware to avoid * unnecessary generation of IDR frame. @@ -371,7 +371,7 @@ static int msm_vidc_adjust_dynamic_property(struct msm_vidc_inst *inst, goto error; /* add children only if cap value modified */ - if (capability->cap[cap_id].value == prev_value) + if (cap[cap_id].value == prev_value) return 0; rc = msm_vidc_add_children(inst, cap_id); @@ -384,20 +384,20 @@ static int msm_vidc_adjust_dynamic_property(struct msm_vidc_inst *inst, goto error; } - if (!capability->cap[entry->cap_id].adjust) { + if (!cap[entry->cap_id].adjust) { i_vpr_e(inst, "%s: child cap must have ajdust function %s\n", __func__, cap_name(entry->cap_id)); rc = -EINVAL; goto error; } - prev_value = capability->cap[entry->cap_id].value; + prev_value = cap[entry->cap_id].value; rc = msm_vidc_adjust_cap(inst, entry->cap_id, NULL, __func__); if (rc) goto error; /* add children if cap value modified */ - if (capability->cap[entry->cap_id].value != prev_value) { + if (cap[entry->cap_id].value != prev_value) { /* add cap_id to firmware list always */ rc = msm_vidc_add_capid_to_fw_list(inst, entry->cap_id); if (rc) @@ -484,18 +484,18 @@ int msm_vidc_ctrl_deinit(struct msm_vidc_inst *inst) int msm_vidc_ctrl_init(struct msm_vidc_inst *inst) { int rc = 0; - struct msm_vidc_inst_capability *capability; + struct msm_vidc_inst_cap *cap; struct msm_vidc_core *core; int idx = 0; struct v4l2_ctrl_config ctrl_cfg = {0}; int num_ctrls = 0, ctrl_idx = 0; - if (!inst || !inst->core || !inst->capabilities) { + if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } core = inst->core; - capability = inst->capabilities; + cap = &inst->capabilities[0]; if (!core->v4l2_ctrl_ops) { i_vpr_e(inst, "%s: no control ops\n", __func__); @@ -503,7 +503,7 @@ int msm_vidc_ctrl_init(struct msm_vidc_inst *inst) } for (idx = 0; idx < INST_CAP_MAX; idx++) { - if (capability->cap[idx].v4l2_id) + if (cap[idx].v4l2_id) num_ctrls++; } if (!num_ctrls) { @@ -526,13 +526,13 @@ int msm_vidc_ctrl_init(struct msm_vidc_inst *inst) for (idx = 0; idx < INST_CAP_MAX; idx++) { struct v4l2_ctrl *ctrl; - if (!capability->cap[idx].v4l2_id) + if (!cap[idx].v4l2_id) continue; if (ctrl_idx >= num_ctrls) { i_vpr_e(inst, "%s: invalid ctrl %#x, max allowed %d\n", - __func__, capability->cap[idx].v4l2_id, + __func__, cap[idx].v4l2_id, num_ctrls); rc = -EINVAL; goto error; @@ -540,27 +540,27 @@ int msm_vidc_ctrl_init(struct msm_vidc_inst *inst) i_vpr_l(inst, "%s: cap[%d] %24s, value %d min %d max %d step_or_mask %#x flags %#x v4l2_id %#x hfi_id %#x\n", __func__, idx, cap_name(idx), - capability->cap[idx].value, - capability->cap[idx].min, - capability->cap[idx].max, - capability->cap[idx].step_or_mask, - capability->cap[idx].flags, - capability->cap[idx].v4l2_id, - capability->cap[idx].hfi_id); + cap[idx].value, + cap[idx].min, + cap[idx].max, + cap[idx].step_or_mask, + cap[idx].flags, + cap[idx].v4l2_id, + cap[idx].hfi_id); memset(&ctrl_cfg, 0, sizeof(struct v4l2_ctrl_config)); - if (is_priv_ctrl(capability->cap[idx].v4l2_id)) { + if (is_priv_ctrl(cap[idx].v4l2_id)) { /* add private control */ - ctrl_cfg.def = capability->cap[idx].value; + ctrl_cfg.def = cap[idx].value; ctrl_cfg.flags = 0; - ctrl_cfg.id = capability->cap[idx].v4l2_id; - ctrl_cfg.max = capability->cap[idx].max; - ctrl_cfg.min = capability->cap[idx].min; + ctrl_cfg.id = cap[idx].v4l2_id; + ctrl_cfg.max = cap[idx].max; + ctrl_cfg.min = cap[idx].min; ctrl_cfg.ops = core->v4l2_ctrl_ops; - if (capability->cap[idx].flags & CAP_FLAG_MENU) + if (cap[idx].flags & CAP_FLAG_MENU) ctrl_cfg.type = V4L2_CTRL_TYPE_MENU; - else if (capability->cap[idx].flags & CAP_FLAG_BITMASK) + else if (cap[idx].flags & CAP_FLAG_BITMASK) ctrl_cfg.type = V4L2_CTRL_TYPE_BITMASK; else ctrl_cfg.type = V4L2_CTRL_TYPE_INTEGER; @@ -576,14 +576,14 @@ int msm_vidc_ctrl_init(struct msm_vidc_inst *inst) } if (ctrl_cfg.type == V4L2_CTRL_TYPE_MENU) { ctrl_cfg.menu_skip_mask = - ~(capability->cap[idx].step_or_mask); + ~(cap[idx].step_or_mask); ctrl_cfg.qmenu = msm_vidc_get_qmenu_type(inst, - capability->cap[idx].cap_id); + cap[idx].cap_id); } else { ctrl_cfg.step = - capability->cap[idx].step_or_mask; + cap[idx].step_or_mask; } - ctrl_cfg.name = cap_name(capability->cap[idx].cap_id); + ctrl_cfg.name = cap_name(cap[idx].cap_id); if (!ctrl_cfg.name) { i_vpr_e(inst, "%s: %#x ctrl name is null\n", __func__, ctrl_cfg.id); @@ -593,27 +593,27 @@ int msm_vidc_ctrl_init(struct msm_vidc_inst *inst) ctrl = v4l2_ctrl_new_custom(&inst->ctrl_handler, &ctrl_cfg, NULL); } else { - if (capability->cap[idx].flags & CAP_FLAG_MENU) { + if (cap[idx].flags & CAP_FLAG_MENU) { ctrl = v4l2_ctrl_new_std_menu( &inst->ctrl_handler, core->v4l2_ctrl_ops, - capability->cap[idx].v4l2_id, - capability->cap[idx].max, - ~(capability->cap[idx].step_or_mask), - capability->cap[idx].value); + cap[idx].v4l2_id, + cap[idx].max, + ~(cap[idx].step_or_mask), + cap[idx].value); } else { ctrl = v4l2_ctrl_new_std(&inst->ctrl_handler, core->v4l2_ctrl_ops, - capability->cap[idx].v4l2_id, - capability->cap[idx].min, - capability->cap[idx].max, - capability->cap[idx].step_or_mask, - capability->cap[idx].value); + cap[idx].v4l2_id, + cap[idx].min, + cap[idx].max, + cap[idx].step_or_mask, + cap[idx].value); } } if (!ctrl) { i_vpr_e(inst, "%s: invalid ctrl %#x cap %24s\n", __func__, - capability->cap[idx].v4l2_id, cap_name(idx)); + cap[idx].v4l2_id, cap_name(idx)); rc = -EINVAL; goto error; } @@ -622,12 +622,12 @@ int msm_vidc_ctrl_init(struct msm_vidc_inst *inst) if (rc) { i_vpr_e(inst, "error adding ctrl (%#x) to ctrl handle, %d\n", - capability->cap[idx].v4l2_id, + cap[idx].v4l2_id, inst->ctrl_handler.error); goto error; } - if (capability->cap[idx].flags & CAP_FLAG_VOLATILE) + if (cap[idx].flags & CAP_FLAG_VOLATILE) ctrl->flags |= V4L2_CTRL_FLAG_VOLATILE; ctrl->flags |= V4L2_CTRL_FLAG_EXECUTE_ON_WRITE; @@ -706,10 +706,8 @@ static int msm_vidc_allow_secure_session(struct msm_vidc_inst *inst) core_lock(core, __func__); list_for_each_entry(i, &core->instances, list) { - if (i->capabilities) { - if (i->capabilities->cap[SECURE_MODE].value) - count++; - } + if (i->capabilities[SECURE_MODE].value) + count++; } if (count > core->capabilities[MAX_SECURE_SESSION_COUNT].value) { @@ -856,15 +854,15 @@ static int msm_vidc_update_static_property(struct msm_vidc_inst *inst, int msm_vidc_s_ctrl(struct msm_vidc_inst *inst, struct v4l2_ctrl *ctrl) { enum msm_vidc_inst_capability_type cap_id; - struct msm_vidc_inst_capability *capability; + struct msm_vidc_inst_cap *cap; int rc = 0; u32 port; - if (!inst || !inst->capabilities || !ctrl) { + if (!inst || !ctrl) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - capability = inst->capabilities; + cap = &inst->capabilities[0]; i_vpr_h(inst, FMT_STRING_SET_CTRL, __func__, state_name(inst->state), ctrl->name, ctrl->id, ctrl->val); @@ -876,7 +874,7 @@ int msm_vidc_s_ctrl(struct msm_vidc_inst *inst, struct v4l2_ctrl *ctrl) } /* mark client set flag */ - capability->cap[cap_id].flags |= CAP_FLAG_CLIENT_SET; + cap[cap_id].flags |= CAP_FLAG_CLIENT_SET; port = is_encode_session(inst) ? OUTPUT_PORT : INPUT_PORT; if (!inst->bufq[port].vb2q->streaming) { @@ -931,19 +929,18 @@ unlock: int msm_vidc_prepare_dependency_list(struct msm_vidc_inst *inst) { struct list_head leaf_list, opt_list; - struct msm_vidc_inst_capability *capability; - struct msm_vidc_inst_cap *cap, *lcap; + struct msm_vidc_inst_cap *cap, *lcap, *temp_cap; struct msm_vidc_inst_cap_entry *entry = NULL, *temp = NULL; bool leaf_visited[INST_CAP_MAX]; bool opt_visited[INST_CAP_MAX]; int tmp_count_total, tmp_count, num_nodes = 0; int i, rc = 0; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - capability = inst->capabilities; + cap = &inst->capabilities[0]; if (!list_empty(&inst->caps_list)) { i_vpr_h(inst, "%s: dependency list already prepared\n", __func__); @@ -958,7 +955,7 @@ int msm_vidc_prepare_dependency_list(struct msm_vidc_inst *inst) /* populate leaf nodes first */ for (i = 1; i < INST_CAP_MAX; i++) { - lcap = &capability->cap[i]; + lcap = &cap[i]; if (!is_valid_cap(inst, lcap->cap_id)) continue; @@ -996,13 +993,13 @@ int msm_vidc_prepare_dependency_list(struct msm_vidc_inst *inst) list_del_init(&entry->list); opt_visited[entry->cap_id] = false; tmp_count--; - cap = &capability->cap[entry->cap_id]; + temp_cap = &cap[entry->cap_id]; /** * if all child are visited then add this entry to * leaf list else add it to the end of optional list. */ - if (is_all_childrens_visited(cap, leaf_visited)) { + if (is_all_childrens_visited(temp_cap, leaf_visited)) { list_add(&entry->list, &leaf_list); leaf_visited[entry->cap_id] = true; tmp_count_total--; @@ -1054,7 +1051,7 @@ int msm_vidc_adjust_v4l2_properties(struct msm_vidc_inst *inst) struct msm_vidc_inst_cap_entry *entry = NULL, *temp = NULL; int rc = 0; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -1078,7 +1075,7 @@ int msm_vidc_set_v4l2_properties(struct msm_vidc_inst *inst) struct msm_vidc_inst_cap_entry *entry = NULL, *temp = NULL; int rc = 0; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } diff --git a/driver/vidc/src/msm_vidc_debug.c b/driver/vidc/src/msm_vidc_debug.c index 3f15528f6f..9823687391 100644 --- a/driver/vidc/src/msm_vidc_debug.c +++ b/driver/vidc/src/msm_vidc_debug.c @@ -503,8 +503,7 @@ static ssize_t inst_info_read(struct file *file, char __user *buf, ssize_t len = 0; struct v4l2_format *f; - if (!idata || !idata->core || !idata->inst || - !idata->inst->capabilities) { + if (!idata || !idata->core || !idata->inst) { d_vpr_e("%s: invalid params %pK\n", __func__, idata); return 0; } @@ -534,7 +533,7 @@ static ssize_t inst_info_read(struct file *file, char __user *buf, cur += write_str(cur, end - cur, "height: %d\n", f->fmt.pix_mp.height); cur += write_str(cur, end - cur, "width: %d\n", f->fmt.pix_mp.width); cur += write_str(cur, end - cur, "fps: %d\n", - inst->capabilities->cap[FRAME_RATE].value >> 16); + inst->capabilities[FRAME_RATE].value >> 16); cur += write_str(cur, end - cur, "state: %d\n", inst->state); cur += write_str(cur, end - cur, "secure: %d\n", is_secure_session(inst)); diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 9ebee2a8a6..d45cc1454d 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -952,7 +952,7 @@ bool msm_vidc_allow_metadata_subscription(struct msm_vidc_inst *inst, u32 cap_id { bool is_allowed = true; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return false; } @@ -973,7 +973,7 @@ bool msm_vidc_allow_metadata_subscription(struct msm_vidc_inst *inst, u32 cap_id } break; case META_DPB_TAG_LIST: - if (!is_ubwc_colorformat(inst->capabilities->cap[PIX_FMTS].value)) { + if (!is_ubwc_colorformat(inst->capabilities[PIX_FMTS].value)) { i_vpr_h(inst, "%s: cap: %24s not allowed for split mode\n", __func__, cap_name(cap_id)); @@ -998,7 +998,7 @@ bool msm_vidc_allow_property(struct msm_vidc_inst *inst, u32 hfi_id) { bool is_allowed = true; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return false; } @@ -1010,7 +1010,7 @@ bool msm_vidc_allow_property(struct msm_vidc_inst *inst, u32 hfi_id) is_allowed = true; break; case HFI_PROP_DPB_LIST: - if (!is_ubwc_colorformat(inst->capabilities->cap[PIX_FMTS].value)) { + if (!is_ubwc_colorformat(inst->capabilities[PIX_FMTS].value)) { i_vpr_h(inst, "%s: cap: %24s not allowed for split mode\n", __func__, cap_name(DPB_LIST)); @@ -1038,7 +1038,7 @@ int msm_vidc_update_property_cap(struct msm_vidc_inst *inst, u32 hfi_id, { int rc = 0; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -1518,7 +1518,7 @@ int msm_vidc_process_drain_last_flag(struct msm_vidc_inst *inst) int rc = 0; struct v4l2_event event = {0}; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -1528,7 +1528,7 @@ int msm_vidc_process_drain_last_flag(struct msm_vidc_inst *inst) return rc; if (is_decode_session(inst) && - !inst->capabilities->cap[LAST_FLAG_EVENT_ENABLE].value) { + !inst->capabilities[LAST_FLAG_EVENT_ENABLE].value) { i_vpr_h(inst, "%s: last flag event not enabled\n", __func__); return 0; } @@ -1544,7 +1544,7 @@ int msm_vidc_process_psc_last_flag(struct msm_vidc_inst *inst) int rc = 0; struct v4l2_event event = {0}; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -1554,7 +1554,7 @@ int msm_vidc_process_psc_last_flag(struct msm_vidc_inst *inst) return rc; if (is_decode_session(inst) && - !inst->capabilities->cap[LAST_FLAG_EVENT_ENABLE].value) { + !inst->capabilities[LAST_FLAG_EVENT_ENABLE].value) { i_vpr_h(inst, "%s: last flag event not enabled\n", __func__); return 0; } @@ -1638,7 +1638,7 @@ int msm_vidc_get_fence_fd(struct msm_vidc_inst *inst, int *fence_fd) *fence_fd = INVALID_FD; - if (!inst || !inst->capabilities || !inst->core) { + if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -1646,7 +1646,7 @@ int msm_vidc_get_fence_fd(struct msm_vidc_inst *inst, int *fence_fd) list_for_each_entry_safe(fence, dummy_fence, &inst->fence_list, list) { if (fence->fence_id == - (u64)inst->capabilities->cap[FENCE_ID].value) { + (u64)inst->capabilities[FENCE_ID].value) { found = true; break; } @@ -1654,7 +1654,7 @@ int msm_vidc_get_fence_fd(struct msm_vidc_inst *inst, int *fence_fd) if (!found) { i_vpr_h(inst, "%s: could not find matching fence for fence id: %d\n", - __func__, inst->capabilities->cap[FENCE_ID].value); + __func__, inst->capabilities[FENCE_ID].value); goto exit; } @@ -1699,7 +1699,7 @@ int msm_vidc_get_control(struct msm_vidc_inst *inst, struct v4l2_ctrl *ctrl) i_vpr_h(inst, "g_min: input buffers %d\n", ctrl->val); break; case FILM_GRAIN: - ctrl->val = inst->capabilities->cap[FILM_GRAIN].value; + ctrl->val = inst->capabilities[FILM_GRAIN].value; i_vpr_h(inst, "%s: film grain present: %d\n", __func__, ctrl->val); break; @@ -1740,7 +1740,7 @@ int msm_vidc_get_fps(struct msm_vidc_inst *inst) int fps; u32 frame_rate, operating_rate; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -1887,7 +1887,7 @@ int msm_vidc_set_auto_framerate(struct msm_vidc_inst *inst, u64 timestamp) u64 time_us = 0; int rc = 0; - if (!inst || !inst->core || !inst->capabilities) { + if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -1895,7 +1895,7 @@ int msm_vidc_set_auto_framerate(struct msm_vidc_inst *inst, u64 timestamp) core = inst->core; if (!core->capabilities[ENC_AUTO_FRAMERATE].value || is_image_session(inst) || msm_vidc_is_super_buffer(inst) || - !inst->capabilities->cap[TIME_DELTA_BASED_RC].value) + !inst->capabilities[TIME_DELTA_BASED_RC].value) goto exit; rc = msm_vidc_update_timestamp_rate(inst, timestamp); @@ -1908,8 +1908,8 @@ int msm_vidc_set_auto_framerate(struct msm_vidc_inst *inst, u64 timestamp) prev_fr = curr_fr; curr_fr = time_us ? DIV64_U64_ROUND_CLOSEST(USEC_PER_SEC, time_us) << 16 : inst->auto_framerate; - if (curr_fr > inst->capabilities->cap[FRAME_RATE].max) - curr_fr = inst->capabilities->cap[FRAME_RATE].max; + if (curr_fr > inst->capabilities[FRAME_RATE].max) + curr_fr = inst->capabilities[FRAME_RATE].max; } prev = ts; counter++; @@ -1948,7 +1948,7 @@ int msm_vidc_update_input_rate(struct msm_vidc_inst *inst, u64 time_us) u64 counter = 0; u64 input_timer_sum_us = 0; - if (!inst || !inst->core || !inst->capabilities) { + if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -1970,7 +1970,7 @@ int msm_vidc_update_input_rate(struct msm_vidc_inst *inst, u64 time_us) } if (input_timer_sum_us && counter >= INPUT_TIMER_LIST_SIZE) - inst->capabilities->cap[INPUT_RATE].value = + inst->capabilities[INPUT_RATE].value = (s32)(DIV64_U64_ROUND_CLOSEST(counter * 1000000, input_timer_sum_us) << 16); @@ -2006,42 +2006,42 @@ int msm_vidc_flush_input_timer(struct msm_vidc_inst *inst) int msm_vidc_get_input_rate(struct msm_vidc_inst *inst) { - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: Invalid params\n", __func__); return 0; } - return inst->capabilities->cap[INPUT_RATE].value >> 16; + return inst->capabilities[INPUT_RATE].value >> 16; } int msm_vidc_get_timestamp_rate(struct msm_vidc_inst *inst) { - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: Invalid params\n", __func__); return 0; } - return inst->capabilities->cap[TIMESTAMP_RATE].value >> 16; + return inst->capabilities[TIMESTAMP_RATE].value >> 16; } int msm_vidc_get_frame_rate(struct msm_vidc_inst *inst) { - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: Invalid params\n", __func__); return 0; } - return inst->capabilities->cap[FRAME_RATE].value >> 16; + return inst->capabilities[FRAME_RATE].value >> 16; } int msm_vidc_get_operating_rate(struct msm_vidc_inst *inst) { - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: Invalid params\n", __func__); return 0; } - return inst->capabilities->cap[OPERATING_RATE].value >> 16; + return inst->capabilities[OPERATING_RATE].value >> 16; } static int msm_vidc_insert_sort(struct list_head *head, @@ -2108,7 +2108,7 @@ int msm_vidc_flush_ts(struct msm_vidc_inst *inst) struct msm_vidc_timestamp *temp, *ts = NULL; struct msm_vidc_core *core; - if (!inst || !inst->core ) { + if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -2477,16 +2477,12 @@ struct msm_vidc_buffer *get_meta_buffer(struct msm_vidc_inst *inst, bool msm_vidc_is_super_buffer(struct msm_vidc_inst *inst) { - struct msm_vidc_inst_capability *capability = NULL; - - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: Invalid params\n", __func__); return false; } - capability = inst->capabilities; - - return !!capability->cap[SUPER_FRAME].value; + return !!inst->capabilities[SUPER_FRAME].value; } static bool is_single_session(struct msm_vidc_inst *inst) @@ -2514,7 +2510,7 @@ void msm_vidc_allow_dcvs(struct msm_vidc_inst *inst) struct msm_vidc_core *core; u32 fps; - if (!inst || !inst->core || !inst->capabilities) { + if (!inst || !inst->core) { d_vpr_e("%s: Invalid args: %pK\n", __func__, inst); return; } @@ -2570,7 +2566,7 @@ void msm_vidc_allow_dcvs(struct msm_vidc_inst *inst) fps = msm_vidc_get_fps(inst); if (is_decode_session(inst) && - fps >= inst->capabilities->cap[FRAME_RATE].max) { + fps >= inst->capabilities[FRAME_RATE].max) { allow = false; i_vpr_h(inst, "%s: unsupported fps %d\n", __func__, fps); goto exit; @@ -2585,17 +2581,17 @@ exit: bool msm_vidc_allow_decode_batch(struct msm_vidc_inst *inst) { - struct msm_vidc_inst_capability *capability; + struct msm_vidc_inst_cap *cap; struct msm_vidc_core *core; bool allow = false; u32 value = 0; - if (!inst || !inst->core || !inst->capabilities) { + if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return false; } core = inst->core; - capability = inst->capabilities; + cap = &inst->capabilities[0]; allow = inst->decode_batch.enable; if (!allow) { @@ -2646,18 +2642,18 @@ bool msm_vidc_allow_decode_batch(struct msm_vidc_inst *inst) } value = msm_vidc_get_fps(inst); - allow = value < capability->cap[BATCH_FPS].value; + allow = value < cap[BATCH_FPS].value; if (!allow) { i_vpr_h(inst, "%s: unsupported fps %u, max %u\n", __func__, - value, capability->cap[BATCH_FPS].value); + value, cap[BATCH_FPS].value); goto exit; } value = msm_vidc_get_mbs_per_frame(inst); - allow = value < capability->cap[BATCH_MBPF].value; + allow = value < cap[BATCH_MBPF].value; if (!allow) { i_vpr_h(inst, "%s: unsupported mbpf %u, max %u\n", __func__, - value, capability->cap[BATCH_MBPF].value); + value, cap[BATCH_MBPF].value); goto exit; } @@ -2693,7 +2689,7 @@ static void msm_vidc_update_input_cr(struct msm_vidc_inst *inst, u32 idx, u32 cr void msm_vidc_update_stats(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buf, enum msm_vidc_debugfs_event etype) { - if (!inst || !buf || !inst->capabilities) { + if (!inst || !buf) { d_vpr_e("%s: invalid params\n", __func__); return; } @@ -2710,7 +2706,7 @@ void msm_vidc_print_stats(struct msm_vidc_inst *inst) u32 frame_rate, operating_rate, achieved_fps, priority, etb, ebd, ftb, fbd, dt_ms; u64 bitrate_kbps = 0, time_ms = ktime_get_ns() / 1000 / 1000; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return; } @@ -2719,9 +2715,9 @@ void msm_vidc_print_stats(struct msm_vidc_inst *inst) ebd = inst->debug_count.ebd - inst->stats.count.ebd; ftb = inst->debug_count.ftb - inst->stats.count.ftb; fbd = inst->debug_count.fbd - inst->stats.count.fbd; - frame_rate = inst->capabilities->cap[FRAME_RATE].value >> 16; - operating_rate = inst->capabilities->cap[OPERATING_RATE].value >> 16; - priority = inst->capabilities->cap[PRIORITY].value; + frame_rate = inst->capabilities[FRAME_RATE].value >> 16; + operating_rate = inst->capabilities[OPERATING_RATE].value >> 16; + priority = inst->capabilities[PRIORITY].value; dt_ms = time_ms - inst->stats.time_ms; achieved_fps = (fbd * 1000) / dt_ms; @@ -2862,19 +2858,19 @@ static int msm_vidc_queue_buffer(struct msm_vidc_inst *inst, struct msm_vidc_buf int rc = 0; u32 cr = 0; - if (!inst || !buf || !inst->capabilities) { + if (!inst || !buf) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } if (is_encode_session(inst) && is_input_buffer(buf->type)) { - cr = inst->capabilities->cap[ENC_IP_CR].value; + cr = inst->capabilities[ENC_IP_CR].value; msm_vidc_update_input_cr(inst, buf->index, cr); msm_vidc_update_cap_value(inst, ENC_IP_CR, 0, __func__); } if (is_decode_session(inst) && is_input_buffer(buf->type) && - inst->capabilities->cap[CODEC_CONFIG].value) { + inst->capabilities[CODEC_CONFIG].value) { buf->flags |= MSM_VIDC_BUF_FLAG_CODECCONFIG; msm_vidc_update_cap_value(inst, CODEC_CONFIG, 0, __func__); } @@ -3012,7 +3008,7 @@ int msm_vidc_queue_buffer_single(struct msm_vidc_inst *inst, struct vb2_buffer * struct msm_vidc_fence *fence = NULL; struct msm_vidc_core *core = NULL; - if (!inst || !vb2 || !inst->capabilities || !inst->core) { + if (!inst || !vb2 || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -3374,7 +3370,7 @@ int msm_vidc_vb2_buffer_done(struct msm_vidc_inst *inst, struct vb2_v4l2_buffer *vbuf; bool found; - if (!inst || !inst->capabilities || !buf) { + if (!inst || !buf) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -3822,7 +3818,7 @@ int msm_vidc_session_set_default_header(struct msm_vidc_inst *inst) return -EINVAL; } - default_header = inst->capabilities->cap[DEFAULT_HEADER].value; + default_header = inst->capabilities[DEFAULT_HEADER].value; i_vpr_h(inst, "%s: default header: %d", __func__, default_header); rc = venus_hfi_session_property(inst, HFI_PROP_DEC_DEFAULT_HEADER, @@ -3990,7 +3986,7 @@ int msm_vidc_get_inst_capability(struct msm_vidc_inst *inst) int i; struct msm_vidc_core *core; - if (!inst || !inst->core || !inst->capabilities) { + if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -4002,8 +3998,8 @@ int msm_vidc_get_inst_capability(struct msm_vidc_inst *inst) i_vpr_h(inst, "%s: copied capabilities with %#x codec, %#x domain\n", __func__, inst->codec, inst->domain); - memcpy(inst->capabilities, &core->inst_caps[i], - sizeof(struct msm_vidc_inst_capability)); + memcpy(&inst->capabilities[0], &core->inst_caps[i].cap[0], + (INST_CAP_MAX + 1) * sizeof(struct msm_vidc_inst_cap)); } } @@ -4540,7 +4536,7 @@ int msm_vidc_print_inst_info(struct msm_vidc_inst *inst) long ref_count = -1; int i = 0; - if (!inst || !inst->capabilities) { + if (!inst) { i_vpr_e(inst, "%s: invalid params\n", __func__); return -EINVAL; } @@ -4550,9 +4546,9 @@ int msm_vidc_print_inst_info(struct msm_vidc_inst *inst) port = is_decode ? INPUT_PORT : OUTPUT_PORT; width = inst->fmts[port].fmt.pix_mp.width; height = inst->fmts[port].fmt.pix_mp.height; - bit_depth = inst->capabilities->cap[BIT_DEPTH].value & 0xFFFF; - bit_rate = inst->capabilities->cap[BIT_RATE].value; - frame_rate = inst->capabilities->cap[FRAME_RATE].value >> 16; + bit_depth = inst->capabilities[BIT_DEPTH].value & 0xFFFF; + bit_rate = inst->capabilities[BIT_RATE].value; + frame_rate = inst->capabilities[FRAME_RATE].value >> 16; i_vpr_e(inst, "%s %s session, HxW: %d x %d, fps: %d, bitrate: %d, bit-depth: %d\n", is_secure ? "Secure" : "Non-Secure", @@ -5144,7 +5140,6 @@ static void msm_vidc_close_helper(struct kref *kref) mutex_destroy(&inst->client_lock); mutex_destroy(&inst->request_lock); mutex_destroy(&inst->lock); - msm_vidc_vmem_free((void **)&inst->capabilities); msm_vidc_vmem_free((void **)&inst); /* try suspending video hardware */ msm_vidc_try_suspend(core); @@ -5438,8 +5433,8 @@ int msm_vidc_update_debug_str(struct msm_vidc_inst *inst) return -EINVAL; } - if (inst->capabilities) - client_id = inst->capabilities->cap[CLIENT_ID].value; + + client_id = inst->capabilities[CLIENT_ID].value; sid = inst->session_id; codec = get_codec_str(inst->codec); @@ -5461,7 +5456,7 @@ static int msm_vidc_print_insts_info(struct msm_vidc_core *core) { struct msm_vidc_inst *inst; u32 height, width, fps, orate; - struct msm_vidc_inst_capability *capability; + struct msm_vidc_inst_cap *cap; struct v4l2_format *out_f; struct v4l2_format *inp_f; char prop[64]; @@ -5473,13 +5468,13 @@ static int msm_vidc_print_insts_info(struct msm_vidc_core *core) list_for_each_entry(inst, &core->instances, list) { out_f = &inst->fmts[OUTPUT_PORT]; inp_f = &inst->fmts[INPUT_PORT]; - capability = inst->capabilities; + cap = &inst->capabilities[0]; memset(&prop, 0, sizeof(prop)); width = max(out_f->fmt.pix_mp.width, inp_f->fmt.pix_mp.width); height = max(out_f->fmt.pix_mp.height, inp_f->fmt.pix_mp.height); - fps = capability->cap[FRAME_RATE].value >> 16; - orate = capability->cap[OPERATING_RATE].value >> 16; + fps = cap[FRAME_RATE].value >> 16; + orate = cap[OPERATING_RATE].value >> 16; if (is_realtime_session(inst)) strlcat(prop, "RT ", sizeof(prop)); @@ -5520,7 +5515,7 @@ int msm_vidc_check_core_mbps(struct msm_vidc_inst *inst) struct msm_vidc_core *core; struct msm_vidc_inst *instance; - if (!inst || !inst->core || !inst->capabilities) { + if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -5675,20 +5670,20 @@ int msm_vidc_check_core_mbpf(struct msm_vidc_inst *inst) static int msm_vidc_check_inst_mbpf(struct msm_vidc_inst *inst) { u32 mbpf = 0, max_mbpf = 0; - struct msm_vidc_inst_capability *capability; + struct msm_vidc_inst_cap *cap; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - capability = inst->capabilities; + cap = &inst->capabilities[0]; if (is_secure_session(inst)) - max_mbpf = capability->cap[SECURE_MBPF].max; - else if (is_encode_session(inst) && capability->cap[LOSSLESS].value) - max_mbpf = capability->cap[LOSSLESS_MBPF].max; + max_mbpf = cap[SECURE_MBPF].max; + else if (is_encode_session(inst) && cap[LOSSLESS].value) + max_mbpf = cap[LOSSLESS_MBPF].max; else - max_mbpf = capability->cap[MBPF].max; + max_mbpf = cap[MBPF].max; /* check current session mbpf */ mbpf = msm_vidc_get_mbs_per_frame(inst); @@ -5705,63 +5700,63 @@ u32 msm_vidc_get_max_bitrate(struct msm_vidc_inst* inst) { u32 max_bitrate = 0x7fffffff; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - if (inst->capabilities->cap[LOWLATENCY_MODE].value) + if (inst->capabilities[LOWLATENCY_MODE].value) max_bitrate = min(max_bitrate, - (u32)inst->capabilities->cap[LOWLATENCY_MAX_BITRATE].max); + (u32)inst->capabilities[LOWLATENCY_MAX_BITRATE].max); - if (inst->capabilities->cap[ALL_INTRA].value) + if (inst->capabilities[ALL_INTRA].value) max_bitrate = min(max_bitrate, - (u32)inst->capabilities->cap[ALLINTRA_MAX_BITRATE].max); + (u32)inst->capabilities[ALLINTRA_MAX_BITRATE].max); if (inst->codec == MSM_VIDC_HEVC) { max_bitrate = min(max_bitrate, - (u32)inst->capabilities->cap[CABAC_MAX_BITRATE].max); + (u32)inst->capabilities[CABAC_MAX_BITRATE].max); } else if (inst->codec == MSM_VIDC_H264) { - if (inst->capabilities->cap[ENTROPY_MODE].value == + if (inst->capabilities[ENTROPY_MODE].value == V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC) max_bitrate = min(max_bitrate, - (u32)inst->capabilities->cap[CAVLC_MAX_BITRATE].max); + (u32)inst->capabilities[CAVLC_MAX_BITRATE].max); else max_bitrate = min(max_bitrate, - (u32)inst->capabilities->cap[CABAC_MAX_BITRATE].max); + (u32)inst->capabilities[CABAC_MAX_BITRATE].max); } if (max_bitrate == 0x7fffffff || !max_bitrate) - max_bitrate = min(max_bitrate, (u32)inst->capabilities->cap[BIT_RATE].max); + max_bitrate = min(max_bitrate, (u32)inst->capabilities[BIT_RATE].max); return max_bitrate; } static bool msm_vidc_allow_image_encode_session(struct msm_vidc_inst *inst) { - struct msm_vidc_inst_capability *capability; + struct msm_vidc_inst_cap *cap; struct v4l2_format *fmt; u32 min_width, min_height, max_width, max_height, pix_fmt, profile; bool allow = false; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return false; } - capability = inst->capabilities; + cap = &inst->capabilities[0]; if (!is_image_encode_session(inst)) { i_vpr_e(inst, "%s: not an image encode session\n", __func__); return false; } - pix_fmt = capability->cap[PIX_FMTS].value; - profile = capability->cap[PROFILE].value; + pix_fmt = cap[PIX_FMTS].value; + profile = cap[PROFILE].value; /* is input with & height is in allowed range */ - min_width = capability->cap[FRAME_WIDTH].min; - max_width = capability->cap[FRAME_WIDTH].max; - min_height = capability->cap[FRAME_HEIGHT].min; - max_height = capability->cap[FRAME_HEIGHT].max; + min_width = cap[FRAME_WIDTH].min; + max_width = cap[FRAME_WIDTH].max; + min_height = cap[FRAME_HEIGHT].min; + max_height = cap[FRAME_HEIGHT].max; fmt = &inst->fmts[INPUT_PORT]; if (!in_range(fmt->fmt.pix_mp.width, min_width, max_width) || !in_range(fmt->fmt.pix_mp.height, min_height, max_height)) { @@ -5790,35 +5785,35 @@ static bool msm_vidc_allow_image_encode_session(struct msm_vidc_inst *inst) } /* is bitrate mode CQ */ - allow = capability->cap[BITRATE_MODE].value == V4L2_MPEG_VIDEO_BITRATE_MODE_CQ; + allow = cap[BITRATE_MODE].value == V4L2_MPEG_VIDEO_BITRATE_MODE_CQ; if (!allow) { i_vpr_e(inst, "%s: bitrate mode is not CQ: %#x\n", __func__, - capability->cap[BITRATE_MODE].value); + cap[BITRATE_MODE].value); goto exit; } /* is all intra */ - allow = !capability->cap[GOP_SIZE].value; - allow &= !capability->cap[B_FRAME].value; + allow = !cap[GOP_SIZE].value; + allow &= !cap[B_FRAME].value; if (!allow) { i_vpr_e(inst, "%s: not all intra: gop: %u, bframe: %u\n", __func__, - capability->cap[GOP_SIZE].value, capability->cap[B_FRAME].value); + cap[GOP_SIZE].value, cap[B_FRAME].value); goto exit; } /* is time delta based rc disabled */ - allow = !capability->cap[TIME_DELTA_BASED_RC].value; + allow = !cap[TIME_DELTA_BASED_RC].value; if (!allow) { i_vpr_e(inst, "%s: time delta based rc not disabled: %#x\n", __func__, - capability->cap[TIME_DELTA_BASED_RC].value); + cap[TIME_DELTA_BASED_RC].value); goto exit; } /* is frame skip mode disabled */ - allow = !capability->cap[FRAME_SKIP_MODE].value; + allow = !cap[FRAME_SKIP_MODE].value; if (!allow) { i_vpr_e(inst, "%s: frame skip mode not disabled: %#x\n", __func__, - capability->cap[FRAME_SKIP_MODE].value); + cap[FRAME_SKIP_MODE].value); goto exit; } @@ -5831,16 +5826,16 @@ exit: static int msm_vidc_check_resolution_supported(struct msm_vidc_inst *inst) { - struct msm_vidc_inst_capability *capability; + struct msm_vidc_inst_cap *cap; u32 width = 0, height = 0, min_width, min_height, max_width, max_height; bool is_interlaced = false; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - capability = inst->capabilities; + cap = &inst->capabilities[0]; if (is_decode_session(inst)) { width = inst->fmts[INPUT_PORT].fmt.pix_mp.width; @@ -5851,20 +5846,20 @@ static int msm_vidc_check_resolution_supported(struct msm_vidc_inst *inst) } if (is_secure_session(inst)) { - min_width = capability->cap[SECURE_FRAME_WIDTH].min; - max_width = capability->cap[SECURE_FRAME_WIDTH].max; - min_height = capability->cap[SECURE_FRAME_HEIGHT].min; - max_height = capability->cap[SECURE_FRAME_HEIGHT].max; - } else if (is_encode_session(inst) && capability->cap[LOSSLESS].value) { - min_width = capability->cap[LOSSLESS_FRAME_WIDTH].min; - max_width = capability->cap[LOSSLESS_FRAME_WIDTH].max; - min_height = capability->cap[LOSSLESS_FRAME_HEIGHT].min; - max_height = capability->cap[LOSSLESS_FRAME_HEIGHT].max; + min_width = cap[SECURE_FRAME_WIDTH].min; + max_width = cap[SECURE_FRAME_WIDTH].max; + min_height = cap[SECURE_FRAME_HEIGHT].min; + max_height = cap[SECURE_FRAME_HEIGHT].max; + } else if (is_encode_session(inst) && cap[LOSSLESS].value) { + min_width = cap[LOSSLESS_FRAME_WIDTH].min; + max_width = cap[LOSSLESS_FRAME_WIDTH].max; + min_height = cap[LOSSLESS_FRAME_HEIGHT].min; + max_height = cap[LOSSLESS_FRAME_HEIGHT].max; } else { - min_width = capability->cap[FRAME_WIDTH].min; - max_width = capability->cap[FRAME_WIDTH].max; - min_height = capability->cap[FRAME_HEIGHT].min; - max_height = capability->cap[FRAME_HEIGHT].max; + min_width = cap[FRAME_WIDTH].min; + max_width = cap[FRAME_WIDTH].max; + min_height = cap[FRAME_HEIGHT].min; + max_height = cap[FRAME_HEIGHT].max; } /* check if input width and height is in supported range */ @@ -5880,7 +5875,7 @@ static int msm_vidc_check_resolution_supported(struct msm_vidc_inst *inst) } /* check interlace supported resolution */ - is_interlaced = capability->cap[CODED_FRAMES].value == CODED_FRAMES_INTERLACE; + is_interlaced = cap[CODED_FRAMES].value == CODED_FRAMES_INTERLACE; if (is_interlaced && (width > INTERLACE_WIDTH_MAX || height > INTERLACE_HEIGHT_MAX || NUM_MBS_PER_FRAME(width, height) > INTERLACE_MB_PER_FRAME_MAX)) { i_vpr_e(inst, "%s: unsupported interlace wxh [%u x %u], max [%u x %u]\n", @@ -6032,7 +6027,7 @@ int msm_vidc_check_scaling_supported(struct msm_vidc_inst *inst) { u32 iwidth, owidth, iheight, oheight, ds_factor; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -6051,7 +6046,7 @@ int msm_vidc_check_scaling_supported(struct msm_vidc_inst *inst) iheight = inst->crop.height; owidth = inst->compose.width; oheight = inst->compose.height; - ds_factor = inst->capabilities->cap[SCALE_FACTOR].value; + ds_factor = inst->capabilities[SCALE_FACTOR].value; /* upscaling: encoder doesnot support upscaling */ if (owidth > iwidth || oheight > iheight) { @@ -6087,7 +6082,7 @@ int msm_vidc_get_properties(struct msm_vidc_inst *inst) {HFI_PROP_QUALITY_MODE, HFI_PORT_BITSTREAM} }; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } diff --git a/driver/vidc/src/msm_vidc_power.c b/driver/vidc/src/msm_vidc_power.c index 44bf8e5402..60a720c045 100644 --- a/driver/vidc/src/msm_vidc_power.c +++ b/driver/vidc/src/msm_vidc_power.c @@ -117,7 +117,7 @@ int msm_vidc_get_inst_load(struct msm_vidc_inst *inst) u32 mbpf, fps; u32 frame_rate, operating_rate, input_rate, timestamp_rate; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -251,7 +251,7 @@ int msm_vidc_scale_buses(struct msm_vidc_inst *inst) struct v4l2_format *inp_f; u32 operating_rate, frame_rate; - if (!inst || !inst->core || !inst->capabilities) { + if (!inst || !inst->core) { d_vpr_e("%s: invalid params: %pK\n", __func__, inst); return -EINVAL; } @@ -281,15 +281,15 @@ int msm_vidc_scale_buses(struct msm_vidc_inst *inst) inst->codec == MSM_VIDC_VP9) ? 32 : 16; if (inst->codec == MSM_VIDC_AV1) vote_data->lcu_size = - inst->capabilities->cap[SUPER_BLOCK].value ? 128 : 64; + inst->capabilities[SUPER_BLOCK].value ? 128 : 64; vote_data->fps = inst->max_rate; if (inst->domain == MSM_VIDC_ENCODER) { vote_data->domain = MSM_VIDC_ENCODER; - vote_data->bitrate = inst->capabilities->cap[BIT_RATE].value; - vote_data->rotation = inst->capabilities->cap[ROTATION].value; + vote_data->bitrate = inst->capabilities[BIT_RATE].value; + vote_data->rotation = inst->capabilities[ROTATION].value; vote_data->b_frames_enabled = - inst->capabilities->cap[B_FRAME].value > 0; + inst->capabilities[B_FRAME].value > 0; /* scale bitrate if operating rate is larger than frame rate */ frame_rate = msm_vidc_get_frame_rate(inst); @@ -301,7 +301,7 @@ int msm_vidc_scale_buses(struct msm_vidc_inst *inst) vote_data->color_formats[0] = v4l2_colorformat_to_driver(inst, inst->fmts[INPUT_PORT].fmt.pix_mp.pixelformat, __func__); vote_data->vpss_preprocessing_enabled = - inst->capabilities->cap[REQUEST_PREPROCESS].value; + inst->capabilities[REQUEST_PREPROCESS].value; } else if (inst->domain == MSM_VIDC_DECODER) { u32 color_format; @@ -322,7 +322,7 @@ int msm_vidc_scale_buses(struct msm_vidc_inst *inst) } vote_data->color_formats[1] = color_format; } else if (inst->codec == MSM_VIDC_AV1 && - inst->capabilities->cap[FILM_GRAIN].value) { + inst->capabilities[FILM_GRAIN].value) { /* * UBWC formats with AV1 film grain requires dpb-opb * split mode @@ -335,7 +335,7 @@ int msm_vidc_scale_buses(struct msm_vidc_inst *inst) vote_data->color_formats[0] = color_format; } } - vote_data->work_mode = inst->capabilities->cap[STAGE].value; + vote_data->work_mode = inst->capabilities[STAGE].value; if (core->resource->subcache_set.set_to_fw) vote_data->use_sys_cache = true; vote_data->num_vpp_pipes = core->capabilities[NUM_VPP_PIPE].value; diff --git a/driver/vidc/src/msm_vidc_state.c b/driver/vidc/src/msm_vidc_state.c index ef8f8c31a6..4d1ec760b8 100644 --- a/driver/vidc/src/msm_vidc_state.c +++ b/driver/vidc/src/msm_vidc_state.c @@ -827,7 +827,7 @@ static int msm_vidc_input_streaming_state(struct msm_vidc_inst *inst, /* disallow */ if (is_decode_session(inst)) { /* check dynamic allowed if master port is streaming */ - if (!(inst->capabilities->cap[cap_id].flags & CAP_FLAG_DYNAMIC_ALLOWED)) { + if (!(inst->capabilities[cap_id].flags & CAP_FLAG_DYNAMIC_ALLOWED)) { i_vpr_e(inst, "%s: cap_id %#x not allowed in state %s\n", __func__, cap_id, state_name(inst->state)); return -EINVAL; @@ -1029,7 +1029,7 @@ static int msm_vidc_output_streaming_state(struct msm_vidc_inst *inst, /* disallow */ if (is_encode_session(inst)) { /* check dynamic allowed if master port is streaming */ - if (!(inst->capabilities->cap[cap_id].flags & CAP_FLAG_DYNAMIC_ALLOWED)) { + if (!(inst->capabilities[cap_id].flags & CAP_FLAG_DYNAMIC_ALLOWED)) { i_vpr_e(inst, "%s: cap_id %#x not allowed in state %s\n", __func__, cap_id, state_name(inst->state)); return -EINVAL; @@ -1183,7 +1183,7 @@ static int msm_vidc_streaming_state(struct msm_vidc_inst *inst, } /* disallow */ - if (!(inst->capabilities->cap[cap_id].flags & CAP_FLAG_DYNAMIC_ALLOWED)) { + if (!(inst->capabilities[cap_id].flags & CAP_FLAG_DYNAMIC_ALLOWED)) { i_vpr_e(inst, "%s: cap_id %#x not allowed in state %s\n", __func__, cap_id, state_name(inst->state)); return -EINVAL; diff --git a/driver/vidc/src/msm_vidc_vb2.c b/driver/vidc/src/msm_vidc_vb2.c index d3c25c7f96..19c90a16fd 100644 --- a/driver/vidc/src/msm_vidc_vb2.c +++ b/driver/vidc/src/msm_vidc_vb2.c @@ -334,8 +334,8 @@ int msm_vb2_queue_setup(struct vb2_queue *q, sizes[0] = inst->fmts[port].fmt.meta.buffersize; } else if (port == INPUT_META_PORT) { inst->fmts[port].fmt.meta.buffersize = buffers->size; - if (inst->capabilities->cap[SUPER_FRAME].value) - sizes[0] = inst->capabilities->cap[SUPER_FRAME].value * + if (inst->capabilities[SUPER_FRAME].value) + sizes[0] = inst->capabilities[SUPER_FRAME].value * inst->fmts[port].fmt.meta.buffersize; else sizes[0] = inst->fmts[port].fmt.meta.buffersize; @@ -374,7 +374,7 @@ int msm_vb2_start_streaming(struct vb2_queue *q, unsigned int count) } inst = q->drv_priv; inst = get_inst_ref(g_core, inst); - if (!inst || !inst->core || !inst->capabilities) { + if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index 169eec04c0..a7b77f19e7 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -1319,7 +1319,7 @@ int venus_hfi_session_set_secure_mode(struct msm_vidc_inst *inst) if (rc) goto unlock; - secure_mode = inst->capabilities->cap[SECURE_MODE].value; + secure_mode = inst->capabilities[SECURE_MODE].value; rc = hfi_create_packet(inst->packet, inst->packet_size, HFI_PROP_SECURE, HFI_HOST_FLAGS_NONE, @@ -1738,16 +1738,14 @@ int venus_hfi_queue_super_buffer(struct msm_vidc_inst *inst, struct msm_vidc_core *core; struct hfi_buffer hfi_buffer; struct hfi_buffer hfi_meta_buffer; - struct msm_vidc_inst_capability *capability; u32 frame_size, meta_size, batch_size, cnt = 0; u64 ts_delta_us; - if (!inst || !inst->core || !inst->capabilities || !inst->packet) { + if (!inst || !inst->core || !inst->packet) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } core = inst->core; - capability = inst->capabilities; core_lock(core, __func__); if (!__valdiate_session(core, inst, __func__)) { @@ -1767,10 +1765,10 @@ int venus_hfi_queue_super_buffer(struct msm_vidc_inst *inst, goto unlock; } - batch_size = capability->cap[SUPER_FRAME].value; + batch_size = inst->capabilities[SUPER_FRAME].value; frame_size = call_session_op(core, buffer_size, inst, MSM_VIDC_BUF_INPUT); meta_size = call_session_op(core, buffer_size, inst, MSM_VIDC_BUF_INPUT_META); - ts_delta_us = 1000000 / (capability->cap[FRAME_RATE].value >> 16); + ts_delta_us = 1000000 / (inst->capabilities[FRAME_RATE].value >> 16); /* Sanitize super yuv buffer */ if (frame_size * batch_size != buffer->buffer_size) { @@ -1905,7 +1903,7 @@ int venus_hfi_queue_buffer(struct msm_vidc_inst *inst, struct msm_vidc_core *core; struct hfi_buffer hfi_buffer, hfi_meta_buffer; - if (!inst || !inst->core || !inst->packet || !inst->capabilities) { + if (!inst || !inst->core || !inst->packet) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -2113,7 +2111,7 @@ int venus_hfi_set_ir_period(struct msm_vidc_inst *inst, u32 ir_type, core_lock(core, __func__); - ir_period = inst->capabilities->cap[cap_id].value; + ir_period = inst->capabilities[cap_id].value; rc = hfi_create_header(inst->packet, inst->packet_size, inst->session_id, core->header_id++); @@ -2151,7 +2149,7 @@ int venus_hfi_set_ir_period(struct msm_vidc_inst *inst, u32 ir_type, rc = __cmdq_write(inst->core, inst->packet); if (rc) { - i_vpr_e(inst, "%s: failed to set cap[%d] %s to fw\n", + i_vpr_e(inst, "%s: failed to set inst->capabilities[%d] %s to fw\n", __func__, cap_id, cap_name(cap_id)); goto exit; } diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index fc3c4c9248..52c3a0342d 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -629,13 +629,13 @@ static int get_driver_buffer_flags(struct msm_vidc_inst *inst, u32 hfi_flags) driver_flags |= MSM_VIDC_BUF_FLAG_ERROR; if (inst->hfi_frame_info.no_output) { - if (inst->capabilities->cap[META_BUF_TAG].value && + if (inst->capabilities[META_BUF_TAG].value && !(hfi_flags & HFI_BUF_FW_FLAG_CODEC_CONFIG)) driver_flags |= MSM_VIDC_BUF_FLAG_ERROR; } if (inst->hfi_frame_info.subframe_input) - if (inst->capabilities->cap[META_BUF_TAG].value) + if (inst->capabilities[META_BUF_TAG].value) driver_flags |= MSM_VIDC_BUF_FLAG_ERROR; if (hfi_flags & HFI_BUF_FW_FLAG_CODEC_CONFIG) @@ -650,7 +650,7 @@ static int get_driver_buffer_flags(struct msm_vidc_inst *inst, u32 hfi_flags) if ((is_encode_session(inst) && (hfi_flags & HFI_BUF_FW_FLAG_LAST)) || (is_decode_session(inst) && - !inst->capabilities->cap[LAST_FLAG_EVENT_ENABLE].value && + !inst->capabilities[LAST_FLAG_EVENT_ENABLE].value && ((hfi_flags & HFI_BUF_FW_FLAG_LAST) || (hfi_flags & HFI_BUF_FW_FLAG_PSC_LAST)))) driver_flags |= MSM_VIDC_BUF_FLAG_LAST; @@ -791,7 +791,7 @@ static int handle_input_buffer(struct msm_vidc_inst *inst, u32 frame_size, batch_size; bool found; - if (!inst || !buffer || !inst->capabilities || !inst->core) { + if (!inst || !buffer || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -817,7 +817,7 @@ static int handle_input_buffer(struct msm_vidc_inst *inst, /* attach dequeued flag for, only last frame in the batch */ if (msm_vidc_is_super_buffer(inst)) { frame_size = call_session_op(core, buffer_size, inst, MSM_VIDC_BUF_INPUT); - batch_size = inst->capabilities->cap[SUPER_FRAME].value; + batch_size = inst->capabilities[SUPER_FRAME].value; if (!frame_size || !batch_size) { i_vpr_e(inst, "%s: invalid size: frame %u, batch %u\n", __func__, frame_size, batch_size); @@ -872,7 +872,7 @@ static int msm_vidc_handle_fence_signal(struct msm_vidc_inst *inst, return -EINVAL; } - if (inst->capabilities->cap[OUTBUF_FENCE_TYPE].value == + if (inst->capabilities[OUTBUF_FENCE_TYPE].value == MSM_VIDC_FENCE_NONE) return 0; @@ -891,11 +891,11 @@ static int msm_vidc_handle_fence_signal(struct msm_vidc_inst *inst, return 0; } - if (inst->capabilities->cap[OUTBUF_FENCE_TYPE].value == + if (inst->capabilities[OUTBUF_FENCE_TYPE].value == MSM_VIDC_SYNX_V2_FENCE) { if (inst->hfi_frame_info.fence_error) signal_error = true; - } else if (inst->capabilities->cap[OUTBUF_FENCE_TYPE].value == + } else if (inst->capabilities[OUTBUF_FENCE_TYPE].value == MSM_VIDC_SW_FENCE) { if (!buf->data_size) signal_error = true; @@ -939,7 +939,7 @@ static int handle_output_buffer(struct msm_vidc_inst *inst, struct msm_vidc_core *core; bool found, fatal = false; - if (!inst || !inst->core || !inst->capabilities) { + if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -1046,7 +1046,7 @@ static int handle_output_buffer(struct msm_vidc_inst *inst, if (is_decode_session(inst)) { /* RO flag is not expected for linear colorformat */ - if (is_linear_colorformat(inst->capabilities->cap[PIX_FMTS].value) && + if (is_linear_colorformat(inst->capabilities[PIX_FMTS].value) && (buffer->flags & HFI_BUF_FW_FLAG_READONLY)) { buffer->flags &= ~HFI_BUF_FW_FLAG_READONLY; print_vidc_buffer( @@ -1108,7 +1108,7 @@ static int handle_input_metadata_buffer(struct msm_vidc_inst *inst, u32 frame_size, batch_size; bool found; - if (!inst || !buffer || !inst->capabilities || !inst->core) { + if (!inst || !buffer || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -1133,7 +1133,7 @@ static int handle_input_metadata_buffer(struct msm_vidc_inst *inst, /* attach dequeued flag for, only last frame in the batch */ if (msm_vidc_is_super_buffer(inst)) { frame_size = call_session_op(core, buffer_size, inst, MSM_VIDC_BUF_INPUT_META); - batch_size = inst->capabilities->cap[SUPER_FRAME].value; + batch_size = inst->capabilities[SUPER_FRAME].value; if (!frame_size || !batch_size) { i_vpr_e(inst, "%s: invalid size: frame %u, batch %u\n", __func__, frame_size, batch_size); @@ -1158,7 +1158,7 @@ static int handle_input_metadata_buffer(struct msm_vidc_inst *inst, if ((is_encode_session(inst) && (buffer->flags & HFI_BUF_FW_FLAG_LAST)) || (is_decode_session(inst) && - !inst->capabilities->cap[LAST_FLAG_EVENT_ENABLE].value && + !inst->capabilities[LAST_FLAG_EVENT_ENABLE].value && ((buffer->flags & HFI_BUF_FW_FLAG_LAST) || (buffer->flags & HFI_BUF_FW_FLAG_PSC_LAST)))) buf->flags |= MSM_VIDC_BUF_FLAG_LAST; @@ -1175,7 +1175,7 @@ static int handle_output_metadata_buffer(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buf; bool found; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: Invalid params\n", __func__); return -EINVAL; } @@ -1210,7 +1210,7 @@ static int handle_output_metadata_buffer(struct msm_vidc_inst *inst, if ((is_encode_session(inst) && (buffer->flags & HFI_BUF_FW_FLAG_LAST)) || (is_decode_session(inst) && - !inst->capabilities->cap[LAST_FLAG_EVENT_ENABLE].value && + !inst->capabilities[LAST_FLAG_EVENT_ENABLE].value && ((buffer->flags & HFI_BUF_FW_FLAG_LAST) || (buffer->flags & HFI_BUF_FW_FLAG_PSC_LAST)))) buf->flags |= MSM_VIDC_BUF_FLAG_LAST; @@ -1760,7 +1760,7 @@ static int handle_property_with_payload(struct msm_vidc_inst *inst, break; case HFI_PROP_DPB_LIST: if (is_decode_session(inst) && - inst->capabilities->cap[DPB_LIST].value) { + inst->capabilities[DPB_LIST].value) { rc = handle_dpb_list_property(inst, pkt); if (rc) break; @@ -1768,27 +1768,27 @@ static int handle_property_with_payload(struct msm_vidc_inst *inst, i_vpr_e(inst, "%s: invalid property %#x for %s port %d dpb cap value %d\n", __func__, pkt->type, is_decode_session(inst) ? "decode" : "encode", - port, inst->capabilities->cap[DPB_LIST].value); + port, inst->capabilities[DPB_LIST].value); } break; case HFI_PROP_QUALITY_MODE: - if (inst->capabilities->cap[QUALITY_MODE].value != payload_ptr[0]) + if (inst->capabilities[QUALITY_MODE].value != payload_ptr[0]) i_vpr_e(inst, "%s: fw quality mode(%d) not matching the capability value(%d)\n", __func__, payload_ptr[0], - inst->capabilities->cap[QUALITY_MODE].value); + inst->capabilities[QUALITY_MODE].value); break; case HFI_PROP_STAGE: - if (inst->capabilities->cap[STAGE].value != payload_ptr[0]) + if (inst->capabilities[STAGE].value != payload_ptr[0]) i_vpr_e(inst, "%s: fw stage mode(%d) not matching the capability value(%d)\n", - __func__, payload_ptr[0], inst->capabilities->cap[STAGE].value); + __func__, payload_ptr[0], inst->capabilities[STAGE].value); break; case HFI_PROP_PIPE: - if (inst->capabilities->cap[PIPE].value != payload_ptr[0]) + if (inst->capabilities[PIPE].value != payload_ptr[0]) i_vpr_e(inst, "%s: fw pipe mode(%d) not matching the capability value(%d)\n", - __func__, payload_ptr[0], inst->capabilities->cap[PIPE].value); + __func__, payload_ptr[0], inst->capabilities[PIPE].value); break; case HFI_PROP_FENCE: inst->hfi_frame_info.fence_id = payload_ptr[0]; @@ -1831,7 +1831,7 @@ static int handle_session_property(struct msm_vidc_inst *inst, int rc = 0; u32 port; - if (!inst || !inst->capabilities) { + if (!inst) { d_vpr_e("%s: Invalid params\n", __func__); return -EINVAL; } From 9c8c04c7b36df72bcfba19146677b293e9c72204 Mon Sep 17 00:00:00 2001 From: Megha Byahatti Date: Wed, 5 Apr 2023 14:19:19 +0530 Subject: [PATCH 0876/1061] video-driver: Move decoder port PSC and properties to platform data - Add changes in platform/waipio.c to fix failure in Upstream decoder usecase Change-Id: Iea470afadb5b489ac28cd3b0b36c0caf8528be14 Signed-off-by: Megha Byahatti --- driver/platform/waipio/src/waipio.c | 58 +++++++++++++++++++++++++++++ 1 file changed, 58 insertions(+) diff --git a/driver/platform/waipio/src/waipio.c b/driver/platform/waipio/src/waipio.c index 61a2b2b8c5..724dac134b 100644 --- a/driver/platform/waipio/src/waipio.c +++ b/driver/platform/waipio/src/waipio.c @@ -1707,6 +1707,52 @@ static const struct reg_preset_table waipio_reg_preset_table[] = { { 0xB0088, 0x0, 0x11 }, }; +/* decoder properties */ +static const u32 waipio_vdec_psc_avc[] = { + HFI_PROP_BITSTREAM_RESOLUTION, + HFI_PROP_CROP_OFFSETS, + HFI_PROP_CODED_FRAMES, + HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT, + HFI_PROP_PIC_ORDER_CNT_TYPE, + HFI_PROP_PROFILE, + HFI_PROP_LEVEL, + HFI_PROP_SIGNAL_COLOR_INFO, +}; + +static const u32 waipio_vdec_psc_hevc[] = { + HFI_PROP_BITSTREAM_RESOLUTION, + HFI_PROP_CROP_OFFSETS, + HFI_PROP_LUMA_CHROMA_BIT_DEPTH, + HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT, + HFI_PROP_PROFILE, + HFI_PROP_LEVEL, + HFI_PROP_TIER, + HFI_PROP_SIGNAL_COLOR_INFO, +}; + +static const u32 waipio_vdec_psc_vp9[] = { + HFI_PROP_BITSTREAM_RESOLUTION, + HFI_PROP_CROP_OFFSETS, + HFI_PROP_LUMA_CHROMA_BIT_DEPTH, + HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT, + HFI_PROP_PROFILE, + HFI_PROP_LEVEL, +}; + +static const u32 waipio_vdec_input_properties[] = { + HFI_PROP_NO_OUTPUT, + HFI_PROP_SUBFRAME_INPUT, +}; + +static const u32 waipio_vdec_output_properties[] = { + HFI_PROP_WORST_COMPRESSION_RATIO, + HFI_PROP_WORST_COMPLEXITY_FACTOR, + HFI_PROP_PICTURE_TYPE, + HFI_PROP_DPB_LIST, + HFI_PROP_CABAC_SESSION, + HFI_PROP_FENCE, +}; + static const struct msm_vidc_platform_data waipio_data = { /* resources dependent on other module */ .bw_tbl = waipio_bw_table, @@ -1749,6 +1795,18 @@ static const struct msm_vidc_platform_data waipio_data = { .csc_data.vpe_csc_custom_limit_coeff = vpe_csc_custom_limit_coeff, .ubwc_config = ubwc_config_waipio, .format_data = &format_data_waipio, + + /* decoder properties related*/ + .psc_avc_tbl = waipio_vdec_psc_avc, + .psc_avc_tbl_size = ARRAY_SIZE(waipio_vdec_psc_avc), + .psc_hevc_tbl = waipio_vdec_psc_hevc, + .psc_hevc_tbl_size = ARRAY_SIZE(waipio_vdec_psc_hevc), + .psc_vp9_tbl = waipio_vdec_psc_vp9, + .psc_vp9_tbl_size = ARRAY_SIZE(waipio_vdec_psc_vp9), + .dec_input_prop = waipio_vdec_input_properties, + .dec_input_prop_size = ARRAY_SIZE(waipio_vdec_input_properties), + .dec_output_prop = waipio_vdec_output_properties, + .dec_output_prop_size = ARRAY_SIZE(waipio_vdec_output_properties), }; static int msm_vidc_init_data(struct msm_vidc_core *core) From b803968cf608c45dffbf16176ee96c92d6e7d588 Mon Sep 17 00:00:00 2001 From: Mihir Ganu Date: Wed, 5 Apr 2023 10:50:11 -0700 Subject: [PATCH 0877/1061] video: driver: Move private color definitions from UAPI Move private color definitions from UAPI to driver internal header file to reduce UAPI dependencies. Change-Id: I667c3efc965fdc7b7dc1ad52e1b0bcf0c964e979 Signed-off-by: Mihir Ganu --- driver/vidc/inc/msm_vidc_internal.h | 31 +++++++++++++++++++ .../uapi/vidc/media/v4l2_vidc_extensions.h | 30 ------------------ 2 files changed, 31 insertions(+), 30 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index c53c5c2c7a..a1e61797fb 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -24,6 +24,37 @@ struct msm_vidc_inst; +/* start of vidc specific colorspace definitions */ +/* + * V4L2_COLORSPACE_VIDC_START, V4L2_XFER_FUNC_VIDC_START + * and V4L2_YCBCR_VIDC_START are introduced because + * V4L2_COLORSPACE_LAST, V4L2_XFER_FUNC_LAST, and + * V4L2_YCBCR_ENC_LAST respectively are not accessible + * in userspace. These values are needed in userspace + * to check if the colorspace info is private. + */ +#define V4L2_COLORSPACE_VIDC_START 100 +#define V4L2_COLORSPACE_VIDC_GENERIC_FILM 101 +#define V4L2_COLORSPACE_VIDC_EG431 102 +#define V4L2_COLORSPACE_VIDC_EBU_TECH 103 + +#define V4L2_XFER_FUNC_VIDC_START 200 +#define V4L2_XFER_FUNC_VIDC_BT470_SYSTEM_M 201 +#define V4L2_XFER_FUNC_VIDC_BT470_SYSTEM_BG 202 +#define V4L2_XFER_FUNC_VIDC_BT601_525_OR_625 203 +#define V4L2_XFER_FUNC_VIDC_LINEAR 204 +#define V4L2_XFER_FUNC_VIDC_XVYCC 205 +#define V4L2_XFER_FUNC_VIDC_BT1361 206 +#define V4L2_XFER_FUNC_VIDC_BT2020 207 +#define V4L2_XFER_FUNC_VIDC_ST428 208 +#define V4L2_XFER_FUNC_VIDC_HLG 209 + +/* should be 255 or below due to u8 limitation */ +#define V4L2_YCBCR_VIDC_START 240 +#define V4L2_YCBCR_VIDC_SRGB_OR_SMPTE_ST428 241 +#define V4L2_YCBCR_VIDC_FCC47_73_682 242 +/* end of vidc specific colorspace definitions */ + /* TODO : remove once available in mainline kernel */ #ifndef V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE #define V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE (3) diff --git a/include/uapi/vidc/media/v4l2_vidc_extensions.h b/include/uapi/vidc/media/v4l2_vidc_extensions.h index 391706d96d..36f0f2d7a2 100644 --- a/include/uapi/vidc/media/v4l2_vidc_extensions.h +++ b/include/uapi/vidc/media/v4l2_vidc_extensions.h @@ -17,37 +17,7 @@ #define V4L2_PIX_FMT_HEIC v4l2_fourcc('H', 'E', 'I', 'C') /* AV1 */ #define V4L2_PIX_FMT_AV1 v4l2_fourcc('A', 'V', '1', '0') -/* start of vidc specific colorspace definitions */ -/* - * V4L2_COLORSPACE_VIDC_START, V4L2_XFER_FUNC_VIDC_START - * and V4L2_YCBCR_VIDC_START are introduced because - * V4L2_COLORSPACE_LAST, V4L2_XFER_FUNC_LAST, and - * V4L2_YCBCR_ENC_LAST respectively are not accessible - * in userspace. These values are needed in userspace - * to check if the colorspace info is private. - */ -#define V4L2_COLORSPACE_VIDC_START 100 -#define V4L2_COLORSPACE_VIDC_GENERIC_FILM 101 -#define V4L2_COLORSPACE_VIDC_EG431 102 -#define V4L2_COLORSPACE_VIDC_EBU_TECH 103 -#define V4L2_XFER_FUNC_VIDC_START 200 -#define V4L2_XFER_FUNC_VIDC_BT470_SYSTEM_M 201 -#define V4L2_XFER_FUNC_VIDC_BT470_SYSTEM_BG 202 -#define V4L2_XFER_FUNC_VIDC_BT601_525_OR_625 203 -#define V4L2_XFER_FUNC_VIDC_LINEAR 204 -#define V4L2_XFER_FUNC_VIDC_XVYCC 205 -#define V4L2_XFER_FUNC_VIDC_BT1361 206 -#define V4L2_XFER_FUNC_VIDC_BT2020 207 -#define V4L2_XFER_FUNC_VIDC_ST428 208 -#define V4L2_XFER_FUNC_VIDC_HLG 209 - -/* should be 255 or below due to u8 limitation */ -#define V4L2_YCBCR_VIDC_START 240 -#define V4L2_YCBCR_VIDC_SRGB_OR_SMPTE_ST428 241 -#define V4L2_YCBCR_VIDC_FCC47_73_682 242 - -/* end of vidc specific colorspace definitions */ #ifndef V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE #define V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE (3) #endif From 6bdbae50f275d25e96884464b804a24da0e9409e Mon Sep 17 00:00:00 2001 From: Ankush Mitra Date: Wed, 5 Apr 2023 16:52:57 +0530 Subject: [PATCH 0878/1061] video: driver: remove core capability pointer Remove core capability pointer. Change-Id: I42f4c5cb7f8a0791b8c5f84d5f0d953be3bf80d6 Signed-off-by: Ankush Mitra --- .../platform/common/src/msm_vidc_platform.c | 8 ---- .../variant/iris2/src/msm_vidc_buffer_iris2.c | 29 +++---------- driver/variant/iris2/src/msm_vidc_iris2.c | 2 +- .../variant/iris3/src/msm_vidc_buffer_iris3.c | 27 ++---------- .../iris33/src/msm_vidc_buffer_iris33.c | 27 ++---------- driver/variant/iris33/src/msm_vidc_iris33.c | 2 +- driver/vidc/inc/msm_vidc_core.h | 2 +- driver/vidc/src/hfi_packet.c | 2 +- driver/vidc/src/msm_venc.c | 4 -- driver/vidc/src/msm_vidc_control.c | 5 --- driver/vidc/src/msm_vidc_debug.c | 2 +- driver/vidc/src/msm_vidc_driver.c | 43 ++----------------- driver/vidc/src/msm_vidc_probe.c | 4 +- driver/vidc/src/msm_vidc_synx.c | 12 +----- driver/vidc/src/resources.c | 2 +- driver/vidc/src/resources_ext.c | 2 +- driver/vidc/src/venus_hfi.c | 6 +-- driver/vidc/src/venus_hfi_queue.c | 2 +- 18 files changed, 29 insertions(+), 152 deletions(-) diff --git a/driver/platform/common/src/msm_vidc_platform.c b/driver/platform/common/src/msm_vidc_platform.c index 574834f18f..d5b7b0fa30 100644 --- a/driver/platform/common/src/msm_vidc_platform.c +++ b/driver/platform/common/src/msm_vidc_platform.c @@ -2579,10 +2579,6 @@ int msm_vidc_adjust_dec_outbuf_fence_type(void *instance, struct v4l2_ctrl *ctrl } capability = inst->capabilities; core = inst->core; - if (!core->capabilities) { - d_vpr_e("%s: invalid core caps\n", __func__); - return -EINVAL; - } adjusted_value = ctrl ? ctrl->val : capability[OUTBUF_FENCE_TYPE].value; @@ -2619,10 +2615,6 @@ int msm_vidc_adjust_dec_outbuf_fence_direction(void *instance, struct v4l2_ctrl } capability = inst->capabilities; core = inst->core; - if (!core->capabilities) { - d_vpr_e("%s: invalid core caps\n", __func__); - return -EINVAL; - } adjusted_value = ctrl ? ctrl->val : capability[OUTBUF_FENCE_DIRECTION].value; diff --git a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c index 07b6749f64..d15722aec9 100644 --- a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c @@ -30,10 +30,6 @@ static u32 msm_vidc_decoder_bin_size_iris2(struct msm_vidc_inst *inst) } core = inst->core; - if (!core->capabilities) { - i_vpr_e(inst, "%s: invalid capabilities\n", __func__); - return size; - } num_vpp_pipes = core->capabilities[NUM_VPP_PIPE].value; if (inst->decode_vpp_delay.enable) vpp_delay = inst->decode_vpp_delay.size; @@ -104,10 +100,7 @@ static u32 msm_vidc_decoder_non_comv_size_iris2(struct msm_vidc_inst* inst) return size; } core = inst->core; - if (!core->capabilities) { - i_vpr_e(inst, "%s: invalid core capabilities\n", __func__); - return size; - } + num_vpp_pipes = core->capabilities[NUM_VPP_PIPE].value; f = &inst->fmts[INPUT_PORT]; @@ -137,10 +130,7 @@ static u32 msm_vidc_decoder_line_size_iris2(struct msm_vidc_inst *inst) return size; } core = inst->core; - if (!core->capabilities) { - i_vpr_e(inst, "%s: invalid capabilities\n", __func__); - return size; - } + num_vpp_pipes = core->capabilities[NUM_VPP_PIPE].value; color_fmt = v4l2_colorformat_to_driver(inst, @@ -263,10 +253,7 @@ static u32 msm_vidc_encoder_bin_size_iris2(struct msm_vidc_inst *inst) return size; } core = inst->core; - if (!core->capabilities) { - i_vpr_e(inst, "%s: invalid core capabilities\n", __func__); - return size; - } + num_vpp_pipes = core->capabilities[NUM_VPP_PIPE].value; stage = inst->capabilities[STAGE].value; f = &inst->fmts[OUTPUT_PORT]; @@ -350,10 +337,7 @@ static u32 msm_vidc_encoder_non_comv_size_iris2(struct msm_vidc_inst* inst) return size; } core = inst->core; - if (!core->capabilities) { - i_vpr_e(inst, "%s: invalid core capabilities\n", __func__); - return size; - } + num_vpp_pipes = core->capabilities[NUM_VPP_PIPE].value; f = &inst->fmts[OUTPUT_PORT]; width = f->fmt.pix_mp.width; @@ -381,10 +365,7 @@ static u32 msm_vidc_encoder_line_size_iris2(struct msm_vidc_inst *inst) return size; } core = inst->core; - if (!core->capabilities) { - i_vpr_e(inst, "%s: invalid capabilities\n", __func__); - return size; - } + num_vpp_pipes = core->capabilities[NUM_VPP_PIPE].value; pixfmt = inst->capabilities[PIX_FMTS].value; diff --git a/driver/variant/iris2/src/msm_vidc_iris2.c b/driver/variant/iris2/src/msm_vidc_iris2.c index 4819bd4be0..b65e16694c 100644 --- a/driver/variant/iris2/src/msm_vidc_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_iris2.c @@ -413,7 +413,7 @@ static int __power_off_iris2(struct msm_vidc_core *core) { int rc = 0; - if (!core || !core->capabilities) { + if (!core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } diff --git a/driver/variant/iris3/src/msm_vidc_buffer_iris3.c b/driver/variant/iris3/src/msm_vidc_buffer_iris3.c index 294c0963a3..79f5688588 100644 --- a/driver/variant/iris3/src/msm_vidc_buffer_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_buffer_iris3.c @@ -30,10 +30,6 @@ static u32 msm_vidc_decoder_bin_size_iris3(struct msm_vidc_inst *inst) } core = inst->core; - if (!core->capabilities) { - i_vpr_e(inst, "%s: invalid capabilities\n", __func__); - return size; - } num_vpp_pipes = core->capabilities[NUM_VPP_PIPE].value; if (inst->decode_vpp_delay.enable) vpp_delay = inst->decode_vpp_delay.size; @@ -133,10 +129,7 @@ static u32 msm_vidc_decoder_non_comv_size_iris3(struct msm_vidc_inst* inst) return size; } core = inst->core; - if (!core->capabilities) { - i_vpr_e(inst, "%s: invalid core capabilities\n", __func__); - return size; - } + num_vpp_pipes = core->capabilities[NUM_VPP_PIPE].value; f = &inst->fmts[INPUT_PORT]; @@ -166,10 +159,6 @@ static u32 msm_vidc_decoder_line_size_iris3(struct msm_vidc_inst *inst) return size; } core = inst->core; - if (!core->capabilities) { - i_vpr_e(inst, "%s: invalid capabilities\n", __func__); - return size; - } num_vpp_pipes = core->capabilities[NUM_VPP_PIPE].value; color_fmt = v4l2_colorformat_to_driver(inst, @@ -346,10 +335,7 @@ static u32 msm_vidc_encoder_bin_size_iris3(struct msm_vidc_inst *inst) return size; } core = inst->core; - if (!core->capabilities) { - i_vpr_e(inst, "%s: invalid core capabilities\n", __func__); - return size; - } + num_vpp_pipes = core->capabilities[NUM_VPP_PIPE].value; stage = inst->capabilities[STAGE].value; f = &inst->fmts[OUTPUT_PORT]; @@ -434,10 +420,7 @@ static u32 msm_vidc_encoder_non_comv_size_iris3(struct msm_vidc_inst* inst) return size; } core = inst->core; - if (!core->capabilities) { - i_vpr_e(inst, "%s: invalid core capabilities\n", __func__); - return size; - } + num_vpp_pipes = core->capabilities[NUM_VPP_PIPE].value; f = &inst->fmts[OUTPUT_PORT]; width = f->fmt.pix_mp.width; @@ -465,10 +448,6 @@ static u32 msm_vidc_encoder_line_size_iris3(struct msm_vidc_inst *inst) return size; } core = inst->core; - if (!core->capabilities) { - i_vpr_e(inst, "%s: invalid capabilities\n", __func__); - return size; - } num_vpp_pipes = core->capabilities[NUM_VPP_PIPE].value; pixfmt = inst->capabilities[PIX_FMTS].value; diff --git a/driver/variant/iris33/src/msm_vidc_buffer_iris33.c b/driver/variant/iris33/src/msm_vidc_buffer_iris33.c index 1e0eb8545f..0ebcc4c40d 100644 --- a/driver/variant/iris33/src/msm_vidc_buffer_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_buffer_iris33.c @@ -30,10 +30,6 @@ static u32 msm_vidc_decoder_bin_size_iris33(struct msm_vidc_inst *inst) } core = inst->core; - if (!core->capabilities) { - i_vpr_e(inst, "%s: invalid capabilities\n", __func__); - return size; - } num_vpp_pipes = core->capabilities[NUM_VPP_PIPE].value; if (inst->decode_vpp_delay.enable) vpp_delay = inst->decode_vpp_delay.size; @@ -133,10 +129,7 @@ static u32 msm_vidc_decoder_non_comv_size_iris33(struct msm_vidc_inst* inst) return size; } core = inst->core; - if (!core->capabilities) { - i_vpr_e(inst, "%s: invalid core capabilities\n", __func__); - return size; - } + num_vpp_pipes = core->capabilities[NUM_VPP_PIPE].value; f = &inst->fmts[INPUT_PORT]; @@ -166,10 +159,6 @@ static u32 msm_vidc_decoder_line_size_iris33(struct msm_vidc_inst *inst) return size; } core = inst->core; - if (!core->capabilities) { - i_vpr_e(inst, "%s: invalid capabilities\n", __func__); - return size; - } num_vpp_pipes = core->capabilities[NUM_VPP_PIPE].value; color_fmt = v4l2_colorformat_to_driver(inst, @@ -346,10 +335,7 @@ static u32 msm_vidc_encoder_bin_size_iris33(struct msm_vidc_inst *inst) return size; } core = inst->core; - if (!core->capabilities) { - i_vpr_e(inst, "%s: invalid core capabilities\n", __func__); - return size; - } + num_vpp_pipes = core->capabilities[NUM_VPP_PIPE].value; stage = inst->capabilities[STAGE].value; f = &inst->fmts[OUTPUT_PORT]; @@ -435,10 +421,7 @@ static u32 msm_vidc_encoder_non_comv_size_iris33(struct msm_vidc_inst* inst) return size; } core = inst->core; - if (!core->capabilities) { - i_vpr_e(inst, "%s: invalid core capabilities\n", __func__); - return size; - } + num_vpp_pipes = core->capabilities[NUM_VPP_PIPE].value; f = &inst->fmts[OUTPUT_PORT]; width = f->fmt.pix_mp.width; @@ -466,10 +449,6 @@ static u32 msm_vidc_encoder_line_size_iris33(struct msm_vidc_inst *inst) return size; } core = inst->core; - if (!core->capabilities) { - i_vpr_e(inst, "%s: invalid capabilities\n", __func__); - return size; - } num_vpp_pipes = core->capabilities[NUM_VPP_PIPE].value; pixfmt = inst->capabilities[PIX_FMTS].value; diff --git a/driver/variant/iris33/src/msm_vidc_iris33.c b/driver/variant/iris33/src/msm_vidc_iris33.c index 315efaf52b..1d2ed1041c 100644 --- a/driver/variant/iris33/src/msm_vidc_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_iris33.c @@ -571,7 +571,7 @@ static int __power_off_iris33(struct msm_vidc_core *core) { int rc = 0; - if (!core || !core->capabilities) { + if (!core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } diff --git a/driver/vidc/inc/msm_vidc_core.h b/driver/vidc/inc/msm_vidc_core.h index 1da71123ee..2f67bdfc5b 100644 --- a/driver/vidc/inc/msm_vidc_core.h +++ b/driver/vidc/inc/msm_vidc_core.h @@ -87,7 +87,7 @@ struct msm_vidc_core { u32 spur_count; u32 reg_count; u32 codecs_count; - struct msm_vidc_core_capability *capabilities; + struct msm_vidc_core_capability capabilities[CORE_CAP_MAX+1]; struct msm_vidc_inst_capability *inst_caps; struct msm_vidc_mem_addr sfr; struct msm_vidc_mem_addr iface_q_table; diff --git a/driver/vidc/src/hfi_packet.c b/driver/vidc/src/hfi_packet.c index 214b3025ab..c0227c21b3 100644 --- a/driver/vidc/src/hfi_packet.c +++ b/driver/vidc/src/hfi_packet.c @@ -403,7 +403,7 @@ int hfi_packet_sys_init(struct msm_vidc_core *core, u32 payload = 0; u32 synx_client_data[2]; - if (!core || !pkt || !core->capabilities) { + if (!core || !pkt) { d_vpr_e("%s: Invalid params\n", __func__); return -EINVAL; } diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index 17aa6ff4c8..512bcac41c 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -1019,10 +1019,6 @@ int msm_venc_streamoff_output(struct msm_vidc_inst *inst) } core = inst->core; - if (!core->capabilities) { - i_vpr_e(inst, "%s: core capabilities is NULL\n", __func__); - return -EINVAL; - } /* restore LAYER_COUNT max allowed value */ inst->capabilities[ENH_LAYER_COUNT].max = diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 19e1cfa1b0..ae3bae0fc0 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -699,11 +699,6 @@ static int msm_vidc_allow_secure_session(struct msm_vidc_inst *inst) } core = inst->core; - if (!core->capabilities) { - i_vpr_e(inst, "%s: invalid params\n", __func__); - return -EINVAL; - } - core_lock(core, __func__); list_for_each_entry(i, &core->instances, list) { if (i->capabilities[SECURE_MODE].value) diff --git a/driver/vidc/src/msm_vidc_debug.c b/driver/vidc/src/msm_vidc_debug.c index 9823687391..858ff3fe7f 100644 --- a/driver/vidc/src/msm_vidc_debug.c +++ b/driver/vidc/src/msm_vidc_debug.c @@ -45,7 +45,7 @@ static int debug_level_set(const char *val, core = *(struct msm_vidc_core **)kp->arg; - if (!core || !core->capabilities) { + if (!core) { d_vpr_e("%s: Invalid core/capabilities\n", __func__); return 0; } diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index d45cc1454d..7258820cda 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -3513,10 +3513,6 @@ static int m2m_queue_init(void *priv, struct vb2_queue *src_vq, return -EINVAL; } core = inst->core; - if (!core->capabilities) { - d_vpr_e("%s: invalid core capabilities\n", __func__); - return -EINVAL; - } src_vq->supports_requests = core->capabilities[SUPPORTS_REQUESTS].value; src_vq->lock = &inst->request_lock; @@ -3662,11 +3658,6 @@ int msm_vidc_add_session(struct msm_vidc_inst *inst) } core = inst->core; - if (!core->capabilities) { - i_vpr_e(inst, "%s: invalid params\n", __func__); - return -EINVAL; - } - core_lock(core, __func__); if (core->state != MSM_VIDC_CORE_INIT) { i_vpr_e(inst, "%s: invalid state %s\n", @@ -4006,22 +3997,6 @@ int msm_vidc_get_inst_capability(struct msm_vidc_inst *inst) return rc; } -int msm_vidc_deinit_core_caps(struct msm_vidc_core *core) -{ - int rc = 0; - - if (!core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - msm_vidc_vmem_free((void **)&core->capabilities); - core->capabilities = NULL; - d_vpr_h("%s: Core capabilities freed\n", __func__); - - return rc; -} - int msm_vidc_init_core_caps(struct msm_vidc_core *core) { int rc = 0; @@ -4042,11 +4017,6 @@ int msm_vidc_init_core_caps(struct msm_vidc_core *core) goto exit; } - rc = msm_vidc_vmem_alloc((sizeof(struct msm_vidc_core_capability) * - (CORE_CAP_MAX + 1)), (void **)&core->capabilities, __func__); - if (rc) - goto exit; - num_platform_caps = core->platform->data.core_data_size; /* loop over platform caps */ @@ -4138,7 +4108,7 @@ int msm_vidc_init_instance_caps(struct msm_vidc_core *core) struct msm_platform_inst_capability *platform_cap_data = NULL; struct msm_platform_inst_cap_dependency *platform_cap_dependency_data = NULL; - if (!core || !core->platform || !core->capabilities) { + if (!core || !core->platform) { d_vpr_e("%s: invalid params\n", __func__); rc = -EINVAL; goto error; @@ -4321,7 +4291,7 @@ int msm_vidc_core_init_wait(struct msm_vidc_core *core) const int interval = 10; int max_tries, count = 0, rc = 0; - if (!core || !core->capabilities) { + if (!core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -4383,7 +4353,7 @@ int msm_vidc_core_init(struct msm_vidc_core *core) enum msm_vidc_allow allow; int rc = 0; - if (!core || !core->capabilities) { + if (!core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -4621,7 +4591,7 @@ int msm_vidc_smmu_fault_handler(struct iommu_domain *domain, { struct msm_vidc_core *core = data; - if (!domain || !core || !core->capabilities) { + if (!domain || !core) { d_vpr_e("%s: invalid params %pK %pK\n", __func__, domain, core); return -EINVAL; @@ -5899,11 +5869,6 @@ static int msm_vidc_check_max_sessions(struct msm_vidc_inst *inst) } core = inst->core; - if (!core->capabilities) { - i_vpr_e(inst, "%s: invalid params\n", __func__); - return -EINVAL; - } - core_lock(core, __func__); list_for_each_entry(i, &core->instances, list) { /* skip image sessions count */ diff --git a/driver/vidc/src/msm_vidc_probe.c b/driver/vidc/src/msm_vidc_probe.c index ad31393eaf..61e9375ddf 100644 --- a/driver/vidc/src/msm_vidc_probe.c +++ b/driver/vidc/src/msm_vidc_probe.c @@ -174,7 +174,7 @@ static int msm_vidc_register_video_device(struct msm_vidc_core *core, d_vpr_h("%s: domain %d\n", __func__, type); - if (!core || !core->capabilities) { + if (!core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -675,7 +675,6 @@ static int msm_vidc_remove_video_device(struct platform_device *pdev) sysfs_remove_group(&pdev->dev.kobj, &msm_vidc_core_attr_group); msm_vidc_deinit_instance_caps(core); - msm_vidc_deinit_core_caps(core); msm_vidc_deinit_platform(pdev); msm_vidc_deinitialize_core(core); @@ -842,7 +841,6 @@ sub_dev_failed: init_group_failed: msm_vidc_deinit_instance_caps(core); init_inst_caps_fail: - msm_vidc_deinit_core_caps(core); init_res_failed: msm_vidc_deinit_platform(pdev); init_plat_failed: diff --git a/driver/vidc/src/msm_vidc_synx.c b/driver/vidc/src/msm_vidc_synx.c index 946d56ec4c..5e6434204e 100644 --- a/driver/vidc/src/msm_vidc_synx.c +++ b/driver/vidc/src/msm_vidc_synx.c @@ -128,7 +128,7 @@ static int msm_vidc_synx_fence_register(struct msm_vidc_core *core) char synx_session_name[MAX_SYNX_FENCE_SESSION_NAME]; struct synx_queue_desc queue_desc; - if (!core && !core->capabilities) { + if (!core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -174,7 +174,7 @@ static int msm_vidc_synx_fence_deregister(struct msm_vidc_core *core) { int rc = 0; - if (!core || !core->capabilities) { + if (!core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -239,10 +239,6 @@ static struct msm_vidc_fence *msm_vidc_synx_fence_create(struct msm_vidc_inst *i return NULL; } core = inst->core; - if (!core->capabilities) { - d_vpr_e("%s: invalid core caps\n", __func__); - return NULL; - } /* return if synx fence is not supported */ if (!core->capabilities[SUPPORTS_SYNX_FENCE].value) @@ -338,10 +334,6 @@ static int msm_vidc_synx_fence_signal(struct msm_vidc_inst *inst, u64 fence_id) } core = inst->core; - if (!core->capabilities) { - d_vpr_e("%s: invalid core caps\n", __func__); - return -EINVAL; - } fence = msm_vidc_get_synx_fence_from_id(inst, fence_id); if (!fence) { diff --git a/driver/vidc/src/resources.c b/driver/vidc/src/resources.c index 0ae6454bed..65ce0abe3b 100644 --- a/driver/vidc/src/resources.c +++ b/driver/vidc/src/resources.c @@ -1313,7 +1313,7 @@ static int __set_clk_rate(struct msm_vidc_core *core, struct clock_info *cl, int rc = 0; /* not registered */ - if (!core || !cl || !core->capabilities) { + if (!core || !cl) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } diff --git a/driver/vidc/src/resources_ext.c b/driver/vidc/src/resources_ext.c index 40af6b0d75..a88ecb8a6e 100644 --- a/driver/vidc/src/resources_ext.c +++ b/driver/vidc/src/resources_ext.c @@ -449,7 +449,7 @@ static int __set_clk_rate(struct msm_vidc_core *core, struct clock_info *cl, int rc = 0; /* not registered */ - if (!core || !cl || !core->capabilities) { + if (!core || !cl) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index a7b77f19e7..9412111eb8 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -88,7 +88,7 @@ static bool __valdiate_session(struct msm_vidc_core *core, static void __schedule_power_collapse_work(struct msm_vidc_core *core) { - if (!core || !core->capabilities) { + if (!core) { d_vpr_e("%s: invalid params\n", __func__); return; } @@ -108,7 +108,7 @@ static void __schedule_power_collapse_work(struct msm_vidc_core *core) static void __cancel_power_collapse_work(struct msm_vidc_core *core) { - if (!core || !core->capabilities) { + if (!core) { d_vpr_e("%s: invalid params\n", __func__); return; } @@ -1006,7 +1006,7 @@ int venus_hfi_noc_error_info(struct msm_vidc_core *core) { int rc = 0; - if (!core || !core->capabilities) { + if (!core) { d_vpr_e("%s: Invalid parameters: %pK\n", __func__, core); return -EINVAL; diff --git a/driver/vidc/src/venus_hfi_queue.c b/driver/vidc/src/venus_hfi_queue.c index 849f8153d6..cb5aa1b472 100644 --- a/driver/vidc/src/venus_hfi_queue.c +++ b/driver/vidc/src/venus_hfi_queue.c @@ -539,7 +539,7 @@ int venus_hfi_queue_init(struct msm_vidc_core *core) d_vpr_h("%s()\n", __func__); - if (!core || !core->capabilities) { + if (!core) { d_vpr_h("%s: invalid params\n", __func__); return -EINVAL; } From cb18a42fa6fc91023127c0667f99f867826cf869 Mon Sep 17 00:00:00 2001 From: Ashish Patil Date: Wed, 29 Mar 2023 10:41:00 -0700 Subject: [PATCH 0879/1061] video: driver: added support for av1 uniform tile handling for power calculations If the av1 tile rows and columns are greater than recommended decoder av1 settings,vote for higher frequency. Change-Id: Iea9f542e0b925a9ecb063c11b1827f31164f5a7b Signed-off-by: Ashish Patil --- .../platform/common/inc/perf_static_model.h | 1 - .../pineapple/src/msm_vidc_pineapple.c | 1 + .../iris33/src/msm_vidc_power_iris33.c | 34 ++++++++++++++++--- driver/vidc/inc/hfi_property.h | 2 ++ driver/vidc/inc/msm_vidc_internal.h | 3 ++ driver/vidc/src/msm_vidc_driver.c | 2 ++ driver/vidc/src/msm_vidc_power.c | 2 ++ driver/vidc/src/venus_hfi_response.c | 11 ++++++ 8 files changed, 50 insertions(+), 6 deletions(-) diff --git a/driver/platform/common/inc/perf_static_model.h b/driver/platform/common/inc/perf_static_model.h index dff9eea546..6cc67a89f0 100644 --- a/driver/platform/common/inc/perf_static_model.h +++ b/driver/platform/common/inc/perf_static_model.h @@ -148,7 +148,6 @@ struct api_calculation_input { /* used in aurora for depth map decode */ u32 lumaonly_decode; - }; struct corner_voting { diff --git a/driver/platform/pineapple/src/msm_vidc_pineapple.c b/driver/platform/pineapple/src/msm_vidc_pineapple.c index a860ba834c..d8e588d8ad 100644 --- a/driver/platform/pineapple/src/msm_vidc_pineapple.c +++ b/driver/platform/pineapple/src/msm_vidc_pineapple.c @@ -2824,6 +2824,7 @@ static const u32 pineapple_vdec_input_properties[] = { HFI_PROP_NO_OUTPUT, HFI_PROP_SUBFRAME_INPUT, HFI_PROP_DPB_LIST, + HFI_PROP_AV1_TILE_ROWS_COLUMNS, }; static const u32 pineapple_vdec_output_properties[] = { diff --git a/driver/variant/iris33/src/msm_vidc_power_iris33.c b/driver/variant/iris33/src/msm_vidc_power_iris33.c index c7224d8e6e..27a95cdc5e 100644 --- a/driver/variant/iris33/src/msm_vidc_power_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_power_iris33.c @@ -49,7 +49,7 @@ static int msm_vidc_init_codec_input_freq(struct msm_vidc_inst *inst, u32 data_s struct api_calculation_input *codec_input) { enum msm_vidc_port_type port; - u32 color_fmt; + u32 color_fmt, tile_rows_columns = 0; if (inst->domain == MSM_VIDC_ENCODER) { codec_input->decoder_or_encoder = CODEC_ENCODER; @@ -78,10 +78,11 @@ static int msm_vidc_init_codec_input_freq(struct msm_vidc_inst *inst, u32 data_s codec_input->lcu_size = 32; } else if (inst->codec == MSM_VIDC_VP9) { codec_input->codec = CODEC_VP9; - codec_input->lcu_size = 16; + codec_input->lcu_size = 32; } else if (inst->codec == MSM_VIDC_AV1) { codec_input->codec = CODEC_AV1; - codec_input->lcu_size = 32; + codec_input->lcu_size = + inst->capabilities[SUPER_BLOCK].value ? 128 : 64; } else { d_vpr_e("%s: invalid codec %d\n", __func__, inst->codec); return -EINVAL; @@ -128,8 +129,31 @@ static int msm_vidc_init_codec_input_freq(struct msm_vidc_inst *inst, u32 data_s codec_input->bitrate_mbps = inst->capabilities[BIT_RATE].value / 1000000; - /* disable av1d commercial tile */ - codec_input->av1d_commer_tile_enable = 0; + /* av1d commercial tile */ + if (inst->codec == MSM_VIDC_AV1 && codec_input->lcu_size == 128) { + tile_rows_columns = inst->power.fw_av1_tile_rows * + inst->power.fw_av1_tile_columns; + + /* check resolution and tile info */ + codec_input->av1d_commer_tile_enable = 1; + + if (res_is_less_than_or_equal_to(1920, 1088, codec_input->frame_width, + codec_input->frame_height)) { + if (tile_rows_columns <= 2) + codec_input->av1d_commer_tile_enable = 0; + } else if (res_is_less_than_or_equal_to(4096, 2172, codec_input->frame_width, + codec_input->frame_height)) { + if (tile_rows_columns <= 4) + codec_input->av1d_commer_tile_enable = 0; + } else if (res_is_less_than_or_equal_to(8192, 4320, codec_input->frame_width, + codec_input->frame_height)) { + if (tile_rows_columns <= 16) + codec_input->av1d_commer_tile_enable = 0; + } + } else { + codec_input->av1d_commer_tile_enable = 0; + } + /* set as sanity mode */ codec_input->regression_mode = 1; diff --git a/driver/vidc/inc/hfi_property.h b/driver/vidc/inc/hfi_property.h index b468017a7e..97bd6c095d 100644 --- a/driver/vidc/inc/hfi_property.h +++ b/driver/vidc/inc/hfi_property.h @@ -549,6 +549,8 @@ enum hfi_nal_length_field_type { #define HFI_PROP_OPB_ENABLE 0x03000184 +#define HFI_PROP_AV1_TILE_ROWS_COLUMNS 0x03000187 + #define HFI_PROP_AV1_DRAP_CONFIG 0x03000189 enum hfi_saliency_type { diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index c53c5c2c7a..1e06cf335a 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -800,6 +800,7 @@ struct msm_vidc_hfi_frame_info { u32 overflow; u32 fence_id; u32 fence_error; + u32 av1_tile_rows_columns; }; struct msm_vidc_decode_vpp_delay { @@ -857,6 +858,8 @@ struct msm_vidc_power { u32 dcvs_flags; u32 fw_cr; u32 fw_cf; + u32 fw_av1_tile_rows; + u32 fw_av1_tile_columns; }; enum msm_vidc_fence_type { diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index d45cc1454d..52d1cbc3f5 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -1007,6 +1007,7 @@ bool msm_vidc_allow_property(struct msm_vidc_inst *inst, u32 hfi_id) case HFI_PROP_WORST_COMPRESSION_RATIO: case HFI_PROP_WORST_COMPLEXITY_FACTOR: case HFI_PROP_PICTURE_TYPE: + case HFI_PROP_AV1_TILE_ROWS_COLUMNS: is_allowed = true; break; case HFI_PROP_DPB_LIST: @@ -1047,6 +1048,7 @@ int msm_vidc_update_property_cap(struct msm_vidc_inst *inst, u32 hfi_id, case HFI_PROP_WORST_COMPRESSION_RATIO: case HFI_PROP_WORST_COMPLEXITY_FACTOR: case HFI_PROP_PICTURE_TYPE: + case HFI_PROP_AV1_TILE_ROWS_COLUMNS: break; case HFI_PROP_DPB_LIST: if (!allow) diff --git a/driver/vidc/src/msm_vidc_power.c b/driver/vidc/src/msm_vidc_power.c index 60a720c045..c27f2246e6 100644 --- a/driver/vidc/src/msm_vidc_power.c +++ b/driver/vidc/src/msm_vidc_power.c @@ -699,6 +699,8 @@ void msm_vidc_power_data_reset(struct msm_vidc_inst *inst) inst->power.buffer_counter = 0; inst->power.fw_cr = 0; inst->power.fw_cf = INT_MAX; + inst->power.fw_av1_tile_rows = 1; + inst->power.fw_av1_tile_columns = 1; rc = msm_vidc_scale_power(inst, true); if (rc) diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index 52c3a0342d..4af14407e2 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -837,6 +837,13 @@ static int handle_input_buffer(struct msm_vidc_inst *inst, return 0; } + if (is_decode_session(inst) && inst->codec == MSM_VIDC_AV1) { + inst->power.fw_av1_tile_rows = + inst->hfi_frame_info.av1_tile_rows_columns >> 16; + inst->power.fw_av1_tile_columns = + inst->hfi_frame_info.av1_tile_rows_columns & 0x0000FFFF; + } + buf->data_size = buffer->data_size; buf->attr &= ~MSM_VIDC_ATTR_QUEUED; buf->attr |= MSM_VIDC_ATTR_DEQUEUED; @@ -1748,6 +1755,10 @@ static int handle_property_with_payload(struct msm_vidc_inst *inst, case HFI_PROP_WORST_COMPLEXITY_FACTOR: inst->hfi_frame_info.cf = payload_ptr[0]; break; + case HFI_PROP_AV1_TILE_ROWS_COLUMNS: + inst->hfi_frame_info.av1_tile_rows_columns = + payload_ptr[0]; + break; case HFI_PROP_CABAC_SESSION: if (payload_ptr[0] == 1) msm_vidc_update_cap_value(inst, ENTROPY_MODE, From b995df9490bde1a8548f0b6c3d5caa71c117ba90 Mon Sep 17 00:00:00 2001 From: Jiajia Cong Date: Tue, 4 Apr 2023 13:22:53 +0800 Subject: [PATCH 0880/1061] msm: vidc: allow TURBO for specific sessions 1. AV1 decoding session. 2. 10-bit I-Frame decoding session. 3. NRT decoding/encoding session. Change-Id: Ia308d71d03d303213029d4125204065dc1ff9509 Signed-off-by: Jiajia Cong --- .../iris33/src/msm_vidc_power_iris33.c | 22 ++++++++++++------- 1 file changed, 14 insertions(+), 8 deletions(-) diff --git a/driver/variant/iris33/src/msm_vidc_power_iris33.c b/driver/variant/iris33/src/msm_vidc_power_iris33.c index 27a95cdc5e..42c2fe63a4 100644 --- a/driver/variant/iris33/src/msm_vidc_power_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_power_iris33.c @@ -434,16 +434,19 @@ static u64 msm_vidc_calc_freq_iris33_new(struct msm_vidc_inst *inst, u32 data_si codec_output.vsp_min_freq, codec_output.tensilica_min_freq, codec_output.hw_min_freq, fps, mbpf); - if (inst->codec == MSM_VIDC_AV1 || - (inst->iframe && is_hevc_10bit_decode_session(inst))) { + if (inst->codec == MSM_VIDC_AV1 || (inst->iframe && is_hevc_10bit_decode_session(inst)) || + (!is_realtime_session(inst))) { /* - * for AV1 or HEVC 10bit and iframe case only allow TURBO and + * TURBO is only allowed for: + * 1. AV1 decoding session + * 2. 10-bit I-Frame decoding session + * 3. NRT decoding/encoding session * limit to NOM for all other cases */ } else { /* limit to NOM, index 0 is TURBO, index 1 is NOM clock rate */ if (core->resource->freq_set.count >= 2 && - freq > core->resource->freq_set.freq_tbl[1].freq) + freq > core->resource->freq_set.freq_tbl[1].freq) freq = core->resource->freq_set.freq_tbl[1].freq; } @@ -720,16 +723,19 @@ u64 msm_vidc_calc_freq_iris33_legacy(struct msm_vidc_inst *inst, u32 data_size) __func__, data_size, freq, vpp_cycles, vsp_cycles, fw_cycles, fps, mbpf); - if (inst->codec == MSM_VIDC_AV1 || - (inst->iframe && is_hevc_10bit_decode_session(inst))) { + if (inst->codec == MSM_VIDC_AV1 || (inst->iframe && is_hevc_10bit_decode_session(inst)) || + (!is_realtime_session(inst))) { /* - * for AV1 or HEVC 10bit and iframe case only allow TURBO and + * TURBO is only allowed for: + * 1. AV1 decoding session + * 2. 10-bit I-Frame decoding session + * 3. NRT decoding/encoding session * limit to NOM for all other cases */ } else { /* limit to NOM, index 0 is TURBO, index 1 is NOM clock rate */ if (core->resource->freq_set.count >= 2 && - freq > core->resource->freq_set.freq_tbl[1].freq) + freq > core->resource->freq_set.freq_tbl[1].freq) freq = core->resource->freq_set.freq_tbl[1].freq; } From c46cdcb67f73c10426a4365e2fcc344630881181 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Wed, 5 Apr 2023 16:54:43 -0700 Subject: [PATCH 0881/1061] video: driver: Use HEIC as private codec type Remove HEIC codec definition from UAPI and use it as private codec type Change-Id: I4023b638f56e9db11c74ae8894f8451ada05c6e8 Signed-off-by: Akshata Sahukar --- driver/platform/common/inc/msm_vidc_platform_ext.h | 3 +++ driver/platform/kalama/src/msm_vidc_kalama.c | 2 +- driver/platform/pineapple/src/msm_vidc_pineapple.c | 2 +- include/uapi/vidc/media/v4l2_vidc_extensions.h | 2 -- 4 files changed, 5 insertions(+), 4 deletions(-) diff --git a/driver/platform/common/inc/msm_vidc_platform_ext.h b/driver/platform/common/inc/msm_vidc_platform_ext.h index 284bbb4504..b134938db2 100644 --- a/driver/platform/common/inc/msm_vidc_platform_ext.h +++ b/driver/platform/common/inc/msm_vidc_platform_ext.h @@ -8,6 +8,9 @@ #include "msm_vidc_control.h" +/* HEIC encoder and decoder */ +#define V4L2_PIX_FMT_VIDC_HEIC v4l2_fourcc('H', 'E', 'I', 'C') + int msm_vidc_adjust_ir_period(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_dec_frame_rate(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_dec_operating_rate(void *instance, struct v4l2_ctrl *ctrl); diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index 0b7bbc9fd6..66645e5a00 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -73,7 +73,7 @@ static struct codec_info codec_data_kalama[] = { .pixfmt_name = "AV1", }, { - .v4l2_codec = V4L2_PIX_FMT_HEIC, + .v4l2_codec = V4L2_PIX_FMT_VIDC_HEIC, .vidc_codec = MSM_VIDC_HEIC, .pixfmt_name = "HEIC", }, diff --git a/driver/platform/pineapple/src/msm_vidc_pineapple.c b/driver/platform/pineapple/src/msm_vidc_pineapple.c index 4c8e9b89ef..8b92d7db01 100644 --- a/driver/platform/pineapple/src/msm_vidc_pineapple.c +++ b/driver/platform/pineapple/src/msm_vidc_pineapple.c @@ -75,7 +75,7 @@ static struct codec_info codec_data_pineapple[] = { .pixfmt_name = "AV1", }, { - .v4l2_codec = V4L2_PIX_FMT_HEIC, + .v4l2_codec = V4L2_PIX_FMT_VIDC_HEIC, .vidc_codec = MSM_VIDC_HEIC, .pixfmt_name = "HEIC", }, diff --git a/include/uapi/vidc/media/v4l2_vidc_extensions.h b/include/uapi/vidc/media/v4l2_vidc_extensions.h index 36f0f2d7a2..89d60f134b 100644 --- a/include/uapi/vidc/media/v4l2_vidc_extensions.h +++ b/include/uapi/vidc/media/v4l2_vidc_extensions.h @@ -13,8 +13,6 @@ /* 32 RGBA-8-8-8-8 compressed */ #define V4L2_PIX_FMT_VIDC_ARGB32C v4l2_fourcc('Q', '2', '4', 'C') #define V4L2_META_FMT_VIDC v4l2_fourcc('Q', 'M', 'E', 'T') -/* HEIC encoder and decoder */ -#define V4L2_PIX_FMT_HEIC v4l2_fourcc('H', 'E', 'I', 'C') /* AV1 */ #define V4L2_PIX_FMT_AV1 v4l2_fourcc('A', 'V', '1', '0') From 25b67cad8e65f02a833a6eb9d92958f63048d6db Mon Sep 17 00:00:00 2001 From: Ashish Patil Date: Fri, 7 Apr 2023 11:27:07 -0700 Subject: [PATCH 0882/1061] video: driver: modifying log level modifying log level from error to high in power suspend API Change-Id: I6df3572506fb8cc12b7b0eb60cb1fa8049eacf5e Signed-off-by: Ashish Patil --- driver/vidc/src/msm_vidc_driver.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 49f60788ab..18e20a3a54 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -1143,7 +1143,7 @@ enum msm_vidc_allow msm_vidc_allow_pm_suspend(struct msm_vidc_core *core) /* check if power is enabled */ if (!is_core_sub_state(core, CORE_SUBSTATE_POWER_ENABLE)) { - d_vpr_e("%s: Power already disabled\n", __func__); + d_vpr_h("%s: Power already disabled\n", __func__); return MSM_VIDC_IGNORE; } From bdffd5e76250460610b9eaf1a65110f8e7fa178d Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Fri, 7 Apr 2023 16:05:28 -0700 Subject: [PATCH 0883/1061] video: driver: enable dynamic support for META_TRANSCODING_STAT_INFO enable support to send META_TRANSCODING_STAT_INFO via HFI_MODE_DYNAMIC_METADATA. Change-Id: I32435e2e30a7a5d50c53645b7c92bbe38f7c90b3 Signed-off-by: Darshana Patil --- driver/platform/pineapple/src/msm_vidc_pineapple.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/driver/platform/pineapple/src/msm_vidc_pineapple.c b/driver/platform/pineapple/src/msm_vidc_pineapple.c index 8b92d7db01..e6a4bb53d5 100644 --- a/driver/platform/pineapple/src/msm_vidc_pineapple.c +++ b/driver/platform/pineapple/src/msm_vidc_pineapple.c @@ -1854,7 +1854,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { {META_TRANSCODING_STAT_INFO, ENC, HEVC|H264, MSM_VIDC_META_DISABLE, - MSM_VIDC_META_ENABLE | MSM_VIDC_META_TX_INPUT, + MSM_VIDC_META_DYN_ENABLE | MSM_VIDC_META_TX_INPUT, 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_TRANSCODE_STAT_INFO, HFI_PROP_TRANSCODING_STAT_INFO, From 0ed6c8a929d03f0dcf86f3446e5b8c48424d2988 Mon Sep 17 00:00:00 2001 From: Ankush Mitra Date: Tue, 11 Apr 2023 15:49:25 +0530 Subject: [PATCH 0884/1061] video: driver: ignore set control for DRV_VERSION Ignore set control for DRV_VERSION. Change-Id: Id81ee10486d5e4c4fefd410b5236653174278066 Signed-off-by: Ankush Mitra --- driver/vidc/src/msm_vidc_control.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index ae3bae0fc0..e84a9fd20d 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -766,9 +766,9 @@ static int msm_vidc_update_static_property(struct msm_vidc_inst *inst, } if (cap_id == DRV_VERSION) { - i_vpr_e(inst, "%s: driver version update not allowed\n", + i_vpr_h(inst, "%s: driver version update not allowed\n", __func__); - return -EINVAL; + return 0; } /* update value to db */ From 0b7870402eee63958ff612eaa8d6fb260215f9c2 Mon Sep 17 00:00:00 2001 From: Ashish Patil Date: Thu, 6 Apr 2023 13:36:55 -0700 Subject: [PATCH 0885/1061] video: driver: Add info for uniform AV1 tile handling read the av1 uniform tile handling propert from fw and display it. Required in debugging av1 usecases for power calculation Change-Id: I443e5afd591a8131c667c64cebb417fc022693ac Signed-off-by: Ashish Patil --- .../pineapple/src/msm_vidc_pineapple.c | 1 + .../iris33/src/msm_vidc_power_iris33.c | 33 ++++++++++++++++--- driver/vidc/inc/hfi_property.h | 2 ++ driver/vidc/inc/msm_vidc_internal.h | 1 + driver/vidc/src/msm_vidc_driver.c | 9 ++++- driver/vidc/src/venus_hfi_response.c | 8 +++++ 6 files changed, 48 insertions(+), 6 deletions(-) diff --git a/driver/platform/pineapple/src/msm_vidc_pineapple.c b/driver/platform/pineapple/src/msm_vidc_pineapple.c index e6a4bb53d5..ee9ae8479d 100644 --- a/driver/platform/pineapple/src/msm_vidc_pineapple.c +++ b/driver/platform/pineapple/src/msm_vidc_pineapple.c @@ -2836,6 +2836,7 @@ static const u32 pineapple_vdec_input_properties[] = { HFI_PROP_SUBFRAME_INPUT, HFI_PROP_DPB_LIST, HFI_PROP_AV1_TILE_ROWS_COLUMNS, + HFI_PROP_AV1_UNIFORM_TILE_SPACING, }; static const u32 pineapple_vdec_output_properties[] = { diff --git a/driver/variant/iris33/src/msm_vidc_power_iris33.c b/driver/variant/iris33/src/msm_vidc_power_iris33.c index 42c2fe63a4..c4f6e9dbf7 100644 --- a/driver/variant/iris33/src/msm_vidc_power_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_power_iris33.c @@ -154,8 +154,8 @@ static int msm_vidc_init_codec_input_freq(struct msm_vidc_inst *inst, u32 data_s codec_input->av1d_commer_tile_enable = 0; } - /* set as sanity mode */ - codec_input->regression_mode = 1; + /* set as sanity mode, this regression mode has no effect on power calculations */ + codec_input->regression_mode = REGRESSION_MODE_SANITY; return 0; } @@ -163,7 +163,7 @@ static int msm_vidc_init_codec_input_freq(struct msm_vidc_inst *inst, u32 data_s static int msm_vidc_init_codec_input_bus(struct msm_vidc_inst *inst, struct vidc_bus_vote_data *d, struct api_calculation_input *codec_input) { - u32 complexity_factor_int = 0, complexity_factor_frac = 0; + u32 complexity_factor_int = 0, complexity_factor_frac = 0, tile_rows_columns = 0; bool opb_compression_enabled = false; if (!d) @@ -292,11 +292,34 @@ static int msm_vidc_init_codec_input_bus(struct msm_vidc_inst *inst, struct vidc /* disable by default, only enable for aurora depth map session */ codec_input->lumaonly_decode = 0; - /* TODO: disable av1d commercial tile */ - codec_input->av1d_commer_tile_enable = 0; + /* set as custom regression mode, as are using cr,cf values from FW */ codec_input->regression_mode = REGRESSION_MODE_CUSTOM; + /* av1d commercial tile */ + if (inst->codec == MSM_VIDC_AV1 && codec_input->lcu_size == 128) { + tile_rows_columns = inst->power.fw_av1_tile_rows * + inst->power.fw_av1_tile_columns; + + /* check resolution and tile info */ + codec_input->av1d_commer_tile_enable = 1; + + if (res_is_less_than_or_equal_to(1920, 1088, codec_input->frame_width, + codec_input->frame_height)) { + if (tile_rows_columns <= 2) + codec_input->av1d_commer_tile_enable = 0; + } else if (res_is_less_than_or_equal_to(4096, 2172, codec_input->frame_width, + codec_input->frame_height)) { + if (tile_rows_columns <= 4) + codec_input->av1d_commer_tile_enable = 0; + } else if (res_is_less_than_or_equal_to(8192, 4320, codec_input->frame_width, + codec_input->frame_height)) { + if (tile_rows_columns <= 16) + codec_input->av1d_commer_tile_enable = 0; + } + } else { + codec_input->av1d_commer_tile_enable = 0; + } /* Dump all the variables for easier debugging */ if (msm_vidc_debug & VIDC_BUS) { diff --git a/driver/vidc/inc/hfi_property.h b/driver/vidc/inc/hfi_property.h index 97bd6c095d..8cd366e910 100644 --- a/driver/vidc/inc/hfi_property.h +++ b/driver/vidc/inc/hfi_property.h @@ -575,6 +575,8 @@ enum hfi_saliency_type { #define HFI_PROP_SLICE_DECODE 0x03000196 +#define HFI_PROP_AV1_UNIFORM_TILE_SPACING 0x03000197 + #define HFI_PROP_ENC_RING_BIN_BUF 0x0300019C /* u32 */ diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index f4824a7f02..11479d8eb4 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -832,6 +832,7 @@ struct msm_vidc_hfi_frame_info { u32 fence_id; u32 fence_error; u32 av1_tile_rows_columns; + bool av1_non_uniform_tile_spacing; }; struct msm_vidc_decode_vpp_delay { diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 18e20a3a54..3beff8395d 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -1007,9 +1007,15 @@ bool msm_vidc_allow_property(struct msm_vidc_inst *inst, u32 hfi_id) case HFI_PROP_WORST_COMPRESSION_RATIO: case HFI_PROP_WORST_COMPLEXITY_FACTOR: case HFI_PROP_PICTURE_TYPE: - case HFI_PROP_AV1_TILE_ROWS_COLUMNS: is_allowed = true; break; + case HFI_PROP_AV1_TILE_ROWS_COLUMNS: + case HFI_PROP_AV1_UNIFORM_TILE_SPACING: + if (inst->codec == MSM_VIDC_AV1) + is_allowed = true; + else + is_allowed = false; + break; case HFI_PROP_DPB_LIST: if (!is_ubwc_colorformat(inst->capabilities[PIX_FMTS].value)) { i_vpr_h(inst, @@ -1049,6 +1055,7 @@ int msm_vidc_update_property_cap(struct msm_vidc_inst *inst, u32 hfi_id, case HFI_PROP_WORST_COMPLEXITY_FACTOR: case HFI_PROP_PICTURE_TYPE: case HFI_PROP_AV1_TILE_ROWS_COLUMNS: + case HFI_PROP_AV1_UNIFORM_TILE_SPACING: break; case HFI_PROP_DPB_LIST: if (!allow) diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index 4af14407e2..b65ab269f1 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -842,6 +842,10 @@ static int handle_input_buffer(struct msm_vidc_inst *inst, inst->hfi_frame_info.av1_tile_rows_columns >> 16; inst->power.fw_av1_tile_columns = inst->hfi_frame_info.av1_tile_rows_columns & 0x0000FFFF; + + if (inst->hfi_frame_info.av1_non_uniform_tile_spacing) + i_vpr_l(inst, "%s: av1_non_uniform_tile_spacing %d\n", + __func__, inst->hfi_frame_info.av1_non_uniform_tile_spacing); } buf->data_size = buffer->data_size; @@ -1759,6 +1763,10 @@ static int handle_property_with_payload(struct msm_vidc_inst *inst, inst->hfi_frame_info.av1_tile_rows_columns = payload_ptr[0]; break; + case HFI_PROP_AV1_UNIFORM_TILE_SPACING: + if (!payload_ptr[0]) + inst->hfi_frame_info.av1_non_uniform_tile_spacing = true; + break; case HFI_PROP_CABAC_SESSION: if (payload_ptr[0] == 1) msm_vidc_update_cap_value(inst, ENTROPY_MODE, From e0f81d8681fef2b85288437d6218888d38aa02ba Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Fri, 14 Apr 2023 15:34:25 +0530 Subject: [PATCH 0886/1061] video: driver: allow updating substate for CORE_DEINIT case Currently updating substate in CORE_DEINIT state was not allowed. So i.e leading to issues at page fault cases. Added change to allow updating substate for CODE_DEINIT case as well. Change-Id: I1c2cd089ca5c2172c8d672ef1f3701bec7bcc8c2 Signed-off-by: Govindaraj Rajagopal --- driver/vidc/src/msm_vidc_state.c | 31 +++++++++++++++++++++++++++++-- 1 file changed, 29 insertions(+), 2 deletions(-) diff --git a/driver/vidc/src/msm_vidc_state.c b/driver/vidc/src/msm_vidc_state.c index 4d1ec760b8..43210dd750 100644 --- a/driver/vidc/src/msm_vidc_state.c +++ b/driver/vidc/src/msm_vidc_state.c @@ -85,13 +85,40 @@ static int msm_vidc_core_deinit_state(struct msm_vidc_core *core, enum msm_vidc_core_event_type type, struct msm_vidc_event_data *data) { + int rc = 0; + if (!core || !data) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - d_vpr_e("%s: unexpected core event type %u\n", __func__, type); - return -EINVAL; + switch (type) { + case CORE_EVENT_UPDATE_SUB_STATE: + { + u32 req_sub_state; + u32 allow_mask = -1; + + req_sub_state = data->edata.uval; + + /* none of the requested substate supported */ + if (!(req_sub_state & allow_mask)) { + d_vpr_e("%s: invalid substate update request %#x\n", + __func__, req_sub_state); + return -EINVAL; + } + + /* update core substate */ + core->sub_state |= req_sub_state & allow_mask; + return rc; + } + default: { + d_vpr_e("%s: unexpected core event type %u\n", + __func__, type); + return -EINVAL; + } + } + + return rc; } static int msm_vidc_core_init_wait_state(struct msm_vidc_core *core, From c4f5dc6069e81e3a6825d5698a570b4415e4263e Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Fri, 14 Apr 2023 13:44:57 +0530 Subject: [PATCH 0887/1061] video: driver: fix queuing too many output buffers to firmware Client is setting NV12 fmt as OP format before initial reconfig So during input port stream_on, subscribe_input_property is failing due to ubwc check(NV12 fmt), so DPB_LIST cap is getting disabled, but later client is setting NV12C during reconfig. So msm_vdec_release_nonref_buffers() during qbuf is bypassed and release cmd is never sent to fw for pending ro buffers. Infact entire RO handling at driver side is disabled. Looks like due to some reason client was not requeueing same buffers at same slot, So eventually number of pending RO buffers increasing over the time. Once count shoots more than 256 fw assertion happens and i.e leading to system error. Remove UBWC check while subscribing input port properties, so DPB_LIST willbe subscribed always and avoids above mentioned issues. Change-Id: I57ea0ea637ae3a57fcad430b212dcdb10f8e6d0f Signed-off-by: Govindaraj Rajagopal --- driver/platform/kalama/src/msm_vidc_kalama.c | 11 ----- .../pineapple/src/msm_vidc_pineapple.c | 11 ----- driver/platform/pineapple/src/pineapple.c | 11 ----- driver/platform/waipio/src/waipio.c | 11 ----- driver/vidc/inc/msm_vidc_driver.h | 2 - driver/vidc/inc/msm_vidc_internal.h | 1 - driver/vidc/src/msm_vdec.c | 14 ++----- driver/vidc/src/msm_vidc_driver.c | 42 ------------------- driver/vidc/src/venus_hfi_response.c | 7 ++-- 9 files changed, 6 insertions(+), 104 deletions(-) diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index 66645e5a00..357f58ccbf 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -1617,12 +1617,6 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { V4L2_CID_MPEG_VIDC_ENC_INPUT_COMPRESSION_RATIO, 0, CAP_FLAG_DYNAMIC_ALLOWED}, - {DPB_LIST, DEC, CODECS_ALL, - 0, 1, 1, 0, - 0, - HFI_PROP_DPB_LIST, - CAP_FLAG_OUTPUT_PORT}, - {FILM_GRAIN, DEC, AV1, 0, 1, 1, 0, V4L2_CID_MPEG_VIDC_AV1D_FILM_GRAIN_PRESENT, @@ -2447,11 +2441,6 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kala NULL, msm_vidc_set_reserve_duration}, - {DPB_LIST, DEC, CODECS_ALL, - {0}, - NULL, - NULL}, - {DRAP, DEC, AV1, {0}, NULL, diff --git a/driver/platform/pineapple/src/msm_vidc_pineapple.c b/driver/platform/pineapple/src/msm_vidc_pineapple.c index ee9ae8479d..3c5ddd5a47 100644 --- a/driver/platform/pineapple/src/msm_vidc_pineapple.c +++ b/driver/platform/pineapple/src/msm_vidc_pineapple.c @@ -1729,12 +1729,6 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { V4L2_CID_MPEG_VIDC_ENC_INPUT_COMPRESSION_RATIO, 0, CAP_FLAG_DYNAMIC_ALLOWED}, - {DPB_LIST, DEC, CODECS_ALL, - 0, 1, 1, 0, - 0, - HFI_PROP_DPB_LIST, - CAP_FLAG_INPUT_PORT}, - {FILM_GRAIN, DEC, AV1, 0, 1, 1, 0, V4L2_CID_MPEG_VIDC_AV1D_FILM_GRAIN_PRESENT, @@ -2615,11 +2609,6 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine NULL, msm_vidc_set_reserve_duration}, - {DPB_LIST, DEC, CODECS_ALL, - {0}, - NULL, - NULL}, - {DRAP, DEC, AV1, {0}, NULL, diff --git a/driver/platform/pineapple/src/pineapple.c b/driver/platform/pineapple/src/pineapple.c index 39f88eae46..09a9bcca8b 100644 --- a/driver/platform/pineapple/src/pineapple.c +++ b/driver/platform/pineapple/src/pineapple.c @@ -1269,12 +1269,6 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { {FIRMWARE_PRIORITY_OFFSET, DEC | ENC, CODECS_ALL, 1, 1, 1, 1}, - {DPB_LIST, DEC, CODECS_ALL, - 0, 1, 1, 0, - 0, - HFI_PROP_DPB_LIST, - CAP_FLAG_OUTPUT_PORT}, - {ALL_INTRA, ENC, H264|HEVC, 0, 1, 1, 0, 0, @@ -1685,11 +1679,6 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine NULL, NULL}, - {DPB_LIST, DEC, CODECS_ALL, - {0}, - NULL, - NULL}, - {ALL_INTRA, ENC, H264|HEVC, {LTR_COUNT, SLICE_MODE, BIT_RATE}, msm_vidc_adjust_all_intra, diff --git a/driver/platform/waipio/src/waipio.c b/driver/platform/waipio/src/waipio.c index 724dac134b..de971202f1 100644 --- a/driver/platform/waipio/src/waipio.c +++ b/driver/platform/waipio/src/waipio.c @@ -1216,12 +1216,6 @@ static struct msm_platform_inst_capability instance_cap_data_waipio[] = { {FIRMWARE_PRIORITY_OFFSET, DEC | ENC, CODECS_ALL, 1, 1, 1, 1}, - {DPB_LIST, DEC, CODECS_ALL, - 0, 1, 1, 0, - 0, - HFI_PROP_DPB_LIST, - CAP_FLAG_OUTPUT_PORT}, - {ALL_INTRA, ENC, H264|HEVC, 0, 1, 1, 0, 0, @@ -1634,11 +1628,6 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_waip NULL, NULL}, - {DPB_LIST, DEC, CODECS_ALL, - {0}, - NULL, - NULL}, - {ALL_INTRA, ENC, H264|HEVC, {LTR_COUNT, SLICE_MODE, BIT_RATE}, msm_vidc_adjust_all_intra, diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 313d8bcff3..e1cd2e13fe 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -523,8 +523,6 @@ bool msm_vidc_allow_metadata_delivery(struct msm_vidc_inst *inst, bool msm_vidc_allow_metadata_subscription(struct msm_vidc_inst *inst, u32 cap_id, u32 port); bool msm_vidc_allow_property(struct msm_vidc_inst *inst, u32 hfi_id); -int msm_vidc_update_property_cap(struct msm_vidc_inst *inst, u32 hfi_id, - bool allow); enum msm_vidc_allow msm_vidc_allow_input_psc(struct msm_vidc_inst *inst); bool msm_vidc_allow_drain_last_flag(struct msm_vidc_inst *inst); bool msm_vidc_allow_psc_last_flag(struct msm_vidc_inst *inst); diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 11479d8eb4..bb9519c613 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -401,7 +401,6 @@ enum msm_vidc_metadata_bits { CAP(FIRMWARE_PRIORITY_OFFSET) \ CAP(CRITICAL_PRIORITY) \ CAP(RESERVE_DURATION) \ - CAP(DPB_LIST) \ CAP(FILM_GRAIN) \ CAP(SUPER_BLOCK) \ CAP(DRAP) \ diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 8540f533fb..cd1a5ff7b8 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -929,9 +929,6 @@ static int msm_vdec_subscribe_property(struct msm_vidc_inst *inst, inst->subcr_params[port].dpb_list_enabled = true; i_vpr_h(inst, "%s: DPB_LIST suscribed on input port", __func__); } - - msm_vidc_update_property_cap(inst, - subcribe_prop[i], allow); } } else if (port == OUTPUT_PORT) { subscribe_prop_size = core->platform->data.dec_output_prop_size; @@ -948,9 +945,6 @@ static int msm_vdec_subscribe_property(struct msm_vidc_inst *inst, inst->subcr_params[port].dpb_list_enabled = true; i_vpr_h(inst, "%s: DPB_LIST suscribed on output port", __func__); } - - msm_vidc_update_property_cap(inst, - subcribe_prop[i], allow); } } else { i_vpr_e(inst, "%s: invalid port: %d\n", __func__, port); @@ -2021,11 +2015,9 @@ int msm_vdec_qbuf(struct msm_vidc_inst *inst, struct vb2_buffer *vb2) return rc; if (vb2->type == OUTPUT_MPLANE) { - if (inst->capabilities[DPB_LIST].value) { - rc = msm_vdec_release_nonref_buffers(inst); - if (rc) - return rc; - } + rc = msm_vdec_release_nonref_buffers(inst); + if (rc) + return rc; } return rc; diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 3beff8395d..e53cbe656c 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -1004,11 +1004,6 @@ bool msm_vidc_allow_property(struct msm_vidc_inst *inst, u32 hfi_id) } switch (hfi_id) { - case HFI_PROP_WORST_COMPRESSION_RATIO: - case HFI_PROP_WORST_COMPLEXITY_FACTOR: - case HFI_PROP_PICTURE_TYPE: - is_allowed = true; - break; case HFI_PROP_AV1_TILE_ROWS_COLUMNS: case HFI_PROP_AV1_UNIFORM_TILE_SPACING: if (inst->codec == MSM_VIDC_AV1) @@ -1016,14 +1011,6 @@ bool msm_vidc_allow_property(struct msm_vidc_inst *inst, u32 hfi_id) else is_allowed = false; break; - case HFI_PROP_DPB_LIST: - if (!is_ubwc_colorformat(inst->capabilities[PIX_FMTS].value)) { - i_vpr_h(inst, - "%s: cap: %24s not allowed for split mode\n", - __func__, cap_name(DPB_LIST)); - is_allowed = false; - } - break; case HFI_PROP_FENCE: if (!is_meta_rx_inp_enabled(inst, META_OUTBUF_FENCE)) { i_vpr_h(inst, @@ -1040,35 +1027,6 @@ bool msm_vidc_allow_property(struct msm_vidc_inst *inst, u32 hfi_id) return is_allowed; } -int msm_vidc_update_property_cap(struct msm_vidc_inst *inst, u32 hfi_id, - bool allow) -{ - int rc = 0; - - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - switch (hfi_id) { - case HFI_PROP_WORST_COMPRESSION_RATIO: - case HFI_PROP_WORST_COMPLEXITY_FACTOR: - case HFI_PROP_PICTURE_TYPE: - case HFI_PROP_AV1_TILE_ROWS_COLUMNS: - case HFI_PROP_AV1_UNIFORM_TILE_SPACING: - break; - case HFI_PROP_DPB_LIST: - if (!allow) - memset(inst->dpb_list_payload, 0, MAX_DPB_LIST_ARRAY_SIZE); - msm_vidc_update_cap_value(inst, DPB_LIST, allow, __func__); - break; - default: - break; - } - - return rc; -} - enum msm_vidc_allow msm_vidc_allow_input_psc(struct msm_vidc_inst *inst) { enum msm_vidc_allow allow = MSM_VIDC_ALLOW; diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index b65ab269f1..4d83120442 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -1778,16 +1778,15 @@ static int handle_property_with_payload(struct msm_vidc_inst *inst, __func__); break; case HFI_PROP_DPB_LIST: - if (is_decode_session(inst) && - inst->capabilities[DPB_LIST].value) { + if (is_decode_session(inst)) { rc = handle_dpb_list_property(inst, pkt); if (rc) break; } else { i_vpr_e(inst, - "%s: invalid property %#x for %s port %d dpb cap value %d\n", + "%s: invalid dpb property %#x for %s port %d\n", __func__, pkt->type, is_decode_session(inst) ? "decode" : "encode", - port, inst->capabilities[DPB_LIST].value); + port); } break; case HFI_PROP_QUALITY_MODE: From 9696ea378903a05243a1948a0ea861a0c8acfc06 Mon Sep 17 00:00:00 2001 From: Mihir Ganu Date: Tue, 11 Apr 2023 14:03:39 -0700 Subject: [PATCH 0888/1061] video: driver: Amend the internal buffer reuse logic Amend the driver internal buffer reuse logic: 1. If firmware releases the buffers as a response to driver request (e.g during RESUME), destroy internal buffers explicitly after firmware releases them. 2. If firmware releases the buffers independently, (e.g as a part of STOP command), remove the QUEUED attribute but do not destroy them. During the following port streamon sequence, driver can determine if buffers can be reused or if they should be destroyed. 3. Do not reset buffer list size/count field when destroying released internal buffers as the list can contain new active buffers. Resetting causes a race condition and interferes with buffer reuse checks. Change-Id: I030949d2400daa40b6b97b51f086ccc1b41e080f Signed-off-by: Mihir Ganu --- driver/vidc/src/msm_vdec.c | 55 ++++++++++++++++++++++++++++ driver/vidc/src/msm_venc.c | 51 ++++++++++++++++++++++++++ driver/vidc/src/msm_vidc_driver.c | 18 ++------- driver/vidc/src/venus_hfi_response.c | 20 +++++++--- 4 files changed, 125 insertions(+), 19 deletions(-) diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 8540f533fb..0c3d918758 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -32,6 +32,10 @@ static const u32 msm_vdec_internal_buffer_type[] = { MSM_VIDC_BUF_PARTIAL_DATA, }; +static const u32 msm_vdec_output_internal_buffer_type[] = { + MSM_VIDC_BUF_DPB, +}; + struct msm_vdec_prop_type_handle { u32 type; int (*handle)(struct msm_vidc_inst *inst, enum msm_vidc_port_type port); @@ -732,6 +736,49 @@ static int msm_vdec_get_output_internal_buffers(struct msm_vidc_inst *inst) return rc; } +static int msm_vdec_destroy_internal_buffers(struct msm_vidc_inst *inst, + enum msm_vidc_port_type port) +{ + int rc = 0; + struct msm_vidc_buffers *buffers; + struct msm_vidc_buffer *buf, *dummy; + const u32 *internal_buf_type; + u32 i, len; + + if (port == INPUT_PORT) { + internal_buf_type = msm_vdec_internal_buffer_type; + len = ARRAY_SIZE(msm_vdec_internal_buffer_type); + } else { + internal_buf_type = msm_vdec_output_internal_buffer_type; + len = ARRAY_SIZE(msm_vdec_output_internal_buffer_type); + } + + for (i = 0; i < len; i++) { + buffers = msm_vidc_get_buffers(inst, internal_buf_type[i], __func__); + if (!buffers) + return -EINVAL; + + if (buffers->reuse) { + i_vpr_l(inst, "%s: reuse enabled for %s\n", __func__, + buf_name(internal_buf_type[i])); + continue; + } + + list_for_each_entry_safe(buf, dummy, &buffers->list, list) { + i_vpr_h(inst, + "%s: destroying internal buffer: type %d idx %d fd %d addr %#llx size %d\n", + __func__, buf->type, buf->index, buf->fd, + buf->device_addr, buf->buffer_size); + + rc = msm_vidc_destroy_internal_buffer(inst, buf); + if (rc) + return rc; + } + } + + return 0; +} + int msm_vdec_create_input_internal_buffers(struct msm_vidc_inst *inst) { int rc = 0; @@ -1460,6 +1507,10 @@ int msm_vdec_streamon_input(struct msm_vidc_inst *inst) if (rc) goto error; + rc = msm_vdec_destroy_internal_buffers(inst, INPUT_PORT); + if (rc) + goto error; + rc = msm_vdec_create_input_internal_buffers(inst); if (rc) goto error; @@ -1820,6 +1871,10 @@ int msm_vdec_streamon_output(struct msm_vidc_inst *inst) if (rc) goto error; + rc = msm_vdec_destroy_internal_buffers(inst, OUTPUT_PORT); + if (rc) + goto error; + rc = msm_vdec_create_output_internal_buffers(inst); if (rc) goto error; diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index 512bcac41c..febf85e643 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -572,6 +572,49 @@ static int msm_venc_get_input_internal_buffers(struct msm_vidc_inst *inst) return rc; } +static int msm_venc_destroy_internal_buffers(struct msm_vidc_inst *inst, + enum msm_vidc_port_type port) +{ + int rc = 0; + struct msm_vidc_buffers *buffers; + struct msm_vidc_buffer *buf, *dummy; + const u32 *internal_buf_type; + u32 i, len; + + if (port == INPUT_PORT) { + internal_buf_type = msm_venc_input_internal_buffer_type; + len = ARRAY_SIZE(msm_venc_input_internal_buffer_type); + } else { + internal_buf_type = msm_venc_output_internal_buffer_type; + len = ARRAY_SIZE(msm_venc_output_internal_buffer_type); + } + + for (i = 0; i < len; i++) { + buffers = msm_vidc_get_buffers(inst, internal_buf_type[i], __func__); + if (!buffers) + return -EINVAL; + + if (buffers->reuse) { + i_vpr_l(inst, "%s: reuse enabled for %s\n", __func__, + buf_name(internal_buf_type[i])); + continue; + } + + list_for_each_entry_safe(buf, dummy, &buffers->list, list) { + i_vpr_h(inst, + "%s: destroying internal buffer: type %d idx %d fd %d addr %#llx size %d\n", + __func__, buf->type, buf->index, buf->fd, + buf->device_addr, buf->buffer_size); + + rc = msm_vidc_destroy_internal_buffer(inst, buf); + if (rc) + return rc; + } + } + + return 0; +} + static int msm_venc_create_input_internal_buffers(struct msm_vidc_inst *inst) { int i, rc = 0; @@ -922,6 +965,10 @@ int msm_venc_streamon_input(struct msm_vidc_inst *inst) if (rc) goto error; + rc = msm_venc_destroy_internal_buffers(inst, INPUT_PORT); + if (rc) + goto error; + rc = msm_venc_create_input_internal_buffers(inst); if (rc) goto error; @@ -1064,6 +1111,10 @@ int msm_venc_streamon_output(struct msm_vidc_inst *inst) if (rc) goto error; + rc = msm_venc_destroy_internal_buffers(inst, OUTPUT_PORT); + if (rc) + goto error; + rc = msm_venc_create_output_internal_buffers(inst); if (rc) goto error; diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 3beff8395d..54eb3984b3 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -3096,9 +3096,6 @@ int msm_vidc_destroy_internal_buffer(struct msm_vidc_inst *inst, } } - buffers->size = 0; - buffers->min_count = buffers->extra_count = buffers->actual_count = 0; - return 0; } @@ -3126,8 +3123,7 @@ int msm_vidc_get_internal_buffers(struct msm_vidc_inst *inst, if (!buffers) return -EINVAL; - if (buf_size <= buffers->size && - buf_count <= buffers->min_count) { + if (buf_size <= buffers->size && buf_count <= buffers->min_count) { buffers->reuse = true; } else { buffers->reuse = false; @@ -3263,15 +3259,9 @@ int msm_vidc_queue_internal_buffers(struct msm_vidc_inst *inst, if (!buffers) return -EINVAL; - if (buffers->reuse) { - i_vpr_l(inst, "%s: reuse enabled for %s buf\n", - __func__, buf_name(buffer_type)); - return 0; - } - list_for_each_entry_safe(buffer, dummy, &buffers->list, list) { /* do not queue pending release buffers */ - if (buffer->flags & MSM_VIDC_ATTR_PENDING_RELEASE) + if (buffer->attr & MSM_VIDC_ATTR_PENDING_RELEASE) continue; /* do not queue already queued buffers */ if (buffer->attr & MSM_VIDC_ATTR_QUEUED) @@ -4493,10 +4483,10 @@ int msm_vidc_print_buffer_info(struct msm_vidc_inst *inst) if (!buffers) continue; - i_vpr_h(inst, "buf: type: %11s, count %2d, extra %2d, actual %2d, size %9u\n", + i_vpr_h(inst, "buf: type: %15s, min %2d, extra %2d, actual %2d, size %9u, reuse %d\n", buf_name(i), buffers->min_count, buffers->extra_count, buffers->actual_count, - buffers->size); + buffers->size, buffers->reuse); } return 0; diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index b65ab269f1..554da3b121 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -1367,18 +1367,28 @@ static int handle_release_internal_buffer(struct msm_vidc_inst *inst, break; } } + if (!found) { + i_vpr_e(inst, "%s: invalid idx %d daddr %#llx\n", + __func__, buffer->index, buffer->base_address); + return -EINVAL; + } if (!is_internal_buffer(buf->type)) return 0; - if (found) { + /* remove QUEUED attribute */ + buf->attr &= ~MSM_VIDC_ATTR_QUEUED; + + /* + * firmware will return/release internal buffer in two cases + * - driver sent release cmd in which case driver should destroy the buffer + * - as part stop cmd in which case driver can reuse the buffer, so skip + * destroying the buffer + */ + if (buf->attr & MSM_VIDC_ATTR_PENDING_RELEASE) { rc = msm_vidc_destroy_internal_buffer(inst, buf); if (rc) return rc; - } else { - i_vpr_e(inst, "%s: invalid idx %d daddr %#llx\n", - __func__, buffer->index, buffer->base_address); - return -EINVAL; } return rc; } From 0a26c4b8ce85d55fa113d217adc9fbf6091f7059 Mon Sep 17 00:00:00 2001 From: Ankush Mitra Date: Thu, 20 Apr 2023 17:50:37 +0530 Subject: [PATCH 0889/1061] video: driver: separate i/o subscribe prop codec wise Separate i/o subscribe prop codec wise. Change-Id: Ib4ba9d6d491f26bad9798c0d4d9be62b272d6421 Signed-off-by: Ankush Mitra --- .../platform/common/inc/msm_vidc_platform.h | 20 ++++-- .../pineapple/src/msm_vidc_pineapple.c | 63 +++++++++++++++++-- driver/vidc/src/msm_vdec.c | 39 ++++++++++-- 3 files changed, 108 insertions(+), 14 deletions(-) diff --git a/driver/platform/common/inc/msm_vidc_platform.h b/driver/platform/common/inc/msm_vidc_platform.h index c2486a52f3..a454812535 100644 --- a/driver/platform/common/inc/msm_vidc_platform.h +++ b/driver/platform/common/inc/msm_vidc_platform.h @@ -248,10 +248,22 @@ struct msm_vidc_platform_data { unsigned int psc_vp9_tbl_size; const u32 *psc_av1_tbl; unsigned int psc_av1_tbl_size; - const u32 *dec_input_prop; - unsigned int dec_input_prop_size; - const u32 *dec_output_prop; - unsigned int dec_output_prop_size; + const u32 *dec_input_prop_avc; + unsigned int dec_input_prop_size_avc; + const u32 *dec_input_prop_hevc; + unsigned int dec_input_prop_size_hevc; + const u32 *dec_input_prop_vp9; + unsigned int dec_input_prop_size_vp9; + const u32 *dec_input_prop_av1; + unsigned int dec_input_prop_size_av1; + const u32 *dec_output_prop_avc; + unsigned int dec_output_prop_size_avc; + const u32 *dec_output_prop_hevc; + unsigned int dec_output_prop_size_hevc; + const u32 *dec_output_prop_vp9; + unsigned int dec_output_prop_size_vp9; + const u32 *dec_output_prop_av1; + unsigned int dec_output_prop_size_av1; }; struct msm_vidc_platform { diff --git a/driver/platform/pineapple/src/msm_vidc_pineapple.c b/driver/platform/pineapple/src/msm_vidc_pineapple.c index 3c5ddd5a47..e011d7535d 100644 --- a/driver/platform/pineapple/src/msm_vidc_pineapple.c +++ b/driver/platform/pineapple/src/msm_vidc_pineapple.c @@ -2820,7 +2820,25 @@ static const u32 pineapple_vdec_psc_av1[] = { HFI_PROP_SIGNAL_COLOR_INFO, }; -static const u32 pineapple_vdec_input_properties[] = { +static const u32 pineapple_vdec_input_properties_avc[] = { + HFI_PROP_NO_OUTPUT, + HFI_PROP_SUBFRAME_INPUT, + HFI_PROP_DPB_LIST, +}; + +static const u32 pineapple_vdec_input_properties_hevc[] = { + HFI_PROP_NO_OUTPUT, + HFI_PROP_SUBFRAME_INPUT, + HFI_PROP_DPB_LIST, +}; + +static const u32 pineapple_vdec_input_properties_vp9[] = { + HFI_PROP_NO_OUTPUT, + HFI_PROP_SUBFRAME_INPUT, + HFI_PROP_DPB_LIST, +}; + +static const u32 pineapple_vdec_input_properties_av1[] = { HFI_PROP_NO_OUTPUT, HFI_PROP_SUBFRAME_INPUT, HFI_PROP_DPB_LIST, @@ -2828,7 +2846,7 @@ static const u32 pineapple_vdec_input_properties[] = { HFI_PROP_AV1_UNIFORM_TILE_SPACING, }; -static const u32 pineapple_vdec_output_properties[] = { +static const u32 pineapple_vdec_output_properties_avc[] = { HFI_PROP_WORST_COMPRESSION_RATIO, HFI_PROP_WORST_COMPLEXITY_FACTOR, HFI_PROP_PICTURE_TYPE, @@ -2836,6 +2854,27 @@ static const u32 pineapple_vdec_output_properties[] = { HFI_PROP_FENCE, }; +static const u32 pineapple_vdec_output_properties_hevc[] = { + HFI_PROP_WORST_COMPRESSION_RATIO, + HFI_PROP_WORST_COMPLEXITY_FACTOR, + HFI_PROP_PICTURE_TYPE, + HFI_PROP_FENCE, +}; + +static const u32 pineapple_vdec_output_properties_vp9[] = { + HFI_PROP_WORST_COMPRESSION_RATIO, + HFI_PROP_WORST_COMPLEXITY_FACTOR, + HFI_PROP_PICTURE_TYPE, + HFI_PROP_FENCE, +}; + +static const u32 pineapple_vdec_output_properties_av1[] = { + HFI_PROP_WORST_COMPRESSION_RATIO, + HFI_PROP_WORST_COMPLEXITY_FACTOR, + HFI_PROP_PICTURE_TYPE, + HFI_PROP_FENCE, +}; + static const struct msm_vidc_platform_data pineapple_data = { /* resources dependent on other module */ .bw_tbl = pineapple_bw_table, @@ -2886,10 +2925,22 @@ static const struct msm_vidc_platform_data pineapple_data = { .psc_vp9_tbl_size = ARRAY_SIZE(pineapple_vdec_psc_vp9), .psc_av1_tbl = pineapple_vdec_psc_av1, .psc_av1_tbl_size = ARRAY_SIZE(pineapple_vdec_psc_av1), - .dec_input_prop = pineapple_vdec_input_properties, - .dec_input_prop_size = ARRAY_SIZE(pineapple_vdec_input_properties), - .dec_output_prop = pineapple_vdec_output_properties, - .dec_output_prop_size = ARRAY_SIZE(pineapple_vdec_output_properties), + .dec_input_prop_avc = pineapple_vdec_input_properties_avc, + .dec_input_prop_hevc = pineapple_vdec_input_properties_hevc, + .dec_input_prop_vp9 = pineapple_vdec_input_properties_vp9, + .dec_input_prop_av1 = pineapple_vdec_input_properties_av1, + .dec_input_prop_size_avc = ARRAY_SIZE(pineapple_vdec_input_properties_avc), + .dec_input_prop_size_hevc = ARRAY_SIZE(pineapple_vdec_input_properties_hevc), + .dec_input_prop_size_vp9 = ARRAY_SIZE(pineapple_vdec_input_properties_vp9), + .dec_input_prop_size_av1 = ARRAY_SIZE(pineapple_vdec_input_properties_av1), + .dec_output_prop_avc = pineapple_vdec_output_properties_avc, + .dec_output_prop_hevc = pineapple_vdec_output_properties_hevc, + .dec_output_prop_vp9 = pineapple_vdec_output_properties_vp9, + .dec_output_prop_av1 = pineapple_vdec_output_properties_av1, + .dec_output_prop_size_avc = ARRAY_SIZE(pineapple_vdec_output_properties_avc), + .dec_output_prop_size_hevc = ARRAY_SIZE(pineapple_vdec_output_properties_hevc), + .dec_output_prop_size_vp9 = ARRAY_SIZE(pineapple_vdec_output_properties_vp9), + .dec_output_prop_size_av1 = ARRAY_SIZE(pineapple_vdec_output_properties_av1), }; int msm_vidc_pineapple_check_ddr_type(void) diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 653b1136a7..b5bef7a02f 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -962,8 +962,24 @@ static int msm_vdec_subscribe_property(struct msm_vidc_inst *inst, payload[0] = HFI_MODE_PROPERTY; if (port == INPUT_PORT) { - subscribe_prop_size = core->platform->data.dec_input_prop_size; - subcribe_prop = core->platform->data.dec_input_prop; + if (inst->codec == MSM_VIDC_H264) { + subscribe_prop_size = core->platform->data.dec_input_prop_size_avc; + subcribe_prop = core->platform->data.dec_input_prop_avc; + } else if (inst->codec == MSM_VIDC_HEVC || inst->codec == MSM_VIDC_HEIC) { + subscribe_prop_size = core->platform->data.dec_input_prop_size_hevc; + subcribe_prop = core->platform->data.dec_input_prop_hevc; + } else if (inst->codec == MSM_VIDC_VP9) { + subscribe_prop_size = core->platform->data.dec_input_prop_size_vp9; + subcribe_prop = core->platform->data.dec_input_prop_vp9; + } else if (inst->codec == MSM_VIDC_AV1) { + subscribe_prop_size = core->platform->data.dec_input_prop_size_av1; + subcribe_prop = core->platform->data.dec_input_prop_av1; + } else { + i_vpr_e(inst, "%s: unsupported codec: %d\n", __func__, inst->codec); + subcribe_prop = NULL; + return -EINVAL; + } + for (i = 0; i < subscribe_prop_size; i++) { allow = msm_vidc_allow_property(inst, subcribe_prop[i]); @@ -978,8 +994,23 @@ static int msm_vdec_subscribe_property(struct msm_vidc_inst *inst, } } } else if (port == OUTPUT_PORT) { - subscribe_prop_size = core->platform->data.dec_output_prop_size; - subcribe_prop = core->platform->data.dec_output_prop; + if (inst->codec == MSM_VIDC_H264) { + subscribe_prop_size = core->platform->data.dec_output_prop_size_avc; + subcribe_prop = core->platform->data.dec_output_prop_avc; + } else if (inst->codec == MSM_VIDC_HEVC || inst->codec == MSM_VIDC_HEIC) { + subscribe_prop_size = core->platform->data.dec_output_prop_size_hevc; + subcribe_prop = core->platform->data.dec_output_prop_hevc; + } else if (inst->codec == MSM_VIDC_VP9) { + subscribe_prop_size = core->platform->data.dec_output_prop_size_vp9; + subcribe_prop = core->platform->data.dec_output_prop_vp9; + } else if (inst->codec == MSM_VIDC_AV1) { + subscribe_prop_size = core->platform->data.dec_output_prop_size_av1; + subcribe_prop = core->platform->data.dec_output_prop_av1; + } else { + i_vpr_e(inst, "%s: unsupported codec: %d\n", __func__, inst->codec); + subcribe_prop = NULL; + return -EINVAL; + } for (i = 0; i < subscribe_prop_size; i++) { allow = msm_vidc_allow_property(inst, subcribe_prop[i]); From 862bae6da81b6777e1a2739fb1a72879fe448f92 Mon Sep 17 00:00:00 2001 From: Deepa Guthyappa Madivalara Date: Thu, 6 Apr 2023 16:38:42 -0700 Subject: [PATCH 0890/1061] video: driver: move NOC registers programming from Firmware to Software - program required NOC registers in power on - update NOC error handling when fw raises HFI_SYS_ERROR_NOC - skip reading NOC error log registers from smmu fault handler as they are updated only when sys error from firmware is processed and fault handling is completed Change-Id: I0195515ff1640aabe8e6db85803b49fde645808f Signed-off-by: Deepa Guthyappa Madivalara --- driver/variant/iris33/src/msm_vidc_iris33.c | 95 ++++++++++++++++++++- driver/vidc/src/msm_vidc_driver.c | 3 - driver/vidc/src/venus_hfi_response.c | 10 +-- 3 files changed, 97 insertions(+), 11 deletions(-) diff --git a/driver/variant/iris33/src/msm_vidc_iris33.c b/driver/variant/iris33/src/msm_vidc_iris33.c index acc7d31c88..a85874e576 100644 --- a/driver/variant/iris33/src/msm_vidc_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_iris33.c @@ -118,6 +118,18 @@ typedef enum */ #define VCODEC_SS_IDLE_STATUSn (VCODEC_BASE_OFFS_IRIS33 + 0x70) +/* + * -------------------------------------------------------------------------- + * MODULE: VCODEC_NOC + * -------------------------------------------------------------------------- + */ +#define NOC_BASE_OFFS 0x00010000 +#define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_MAINCTL_LOW (NOC_BASE_OFFS + 0xA008) +#define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRCLR_LOW (NOC_BASE_OFFS + 0xA018) +#define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG2_LOW (NOC_BASE_OFFS + 0xA030) +#define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG3_LOW (NOC_BASE_OFFS + 0xA038) +#define NOC_SIDEBANDMANAGER_MAIN_SIDEBANDMANAGER_FAULTINEN0_LOW (NOC_BASE_OFFS + 0x7040) + static int __interrupt_init_iris33(struct msm_vidc_core *vidc_core) { struct msm_vidc_core *core = vidc_core; @@ -748,18 +760,38 @@ static int __power_on_iris33(struct msm_vidc_core *core) __set_registers(core); + /* Programm NOC error registers before releasing xo reset */ + rc = __write_register(core, + NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_MAINCTL_LOW, 0x3); + if (rc) { + d_vpr_e( + "%s: failed to set NOC_ERL_MAIN_ERRORLOGGER_MAINCTL_LOW\n", + __func__); + goto fail_program_noc_regs; + } + rc = __write_register(core, + NOC_SIDEBANDMANAGER_MAIN_SIDEBANDMANAGER_FAULTINEN0_LOW, 0x1); + if (rc) { + d_vpr_e( + "%s: failed to set NOC_SIDEBANDMANAGER_FAULTINEN0_LOW\n", + __func__); + goto fail_program_noc_regs; + } + /* release reset control for other consumers */ rc = call_res_op(core, reset_control_release, core, "video_xo_reset"); if (rc) { d_vpr_e("%s: failed to release video_xo_reset reset\n", __func__); goto fail_deassert_xo_reset; } + __interrupt_init_iris33(core); core->intr_status = 0; enable_irq(core->resource->irq); return rc; +fail_program_noc_regs: fail_deassert_xo_reset: fail_assert_xo_reset: fail_power_on_substate: @@ -770,6 +802,7 @@ fail_power_on_controller: call_res_op(core, set_bw, core, 0, 0); fail_vote_buses: msm_vidc_change_core_sub_state(core, CORE_SUBSTATE_POWER_ENABLE, 0, __func__); + return rc; } @@ -875,9 +908,10 @@ static int __watchdog_iris33(struct msm_vidc_core *vidc_core, u32 intr_status) return rc; } -static int __noc_error_info_iris33(struct msm_vidc_core *vidc_core) +static int __noc_error_info_iris33(struct msm_vidc_core *core) { - struct msm_vidc_core *core = vidc_core; + u32 value, count = 0; + int rc = 0; if (!core) { d_vpr_e("%s: invalid params\n", __func__); @@ -920,7 +954,62 @@ static int __noc_error_info_iris33(struct msm_vidc_core *vidc_core) d_vpr_e("VCODEC_NOC_ERL_MAIN_ERRLOG3_HIGH: %#x\n", val); */ - return 0; + if (is_iris33_hw_power_collapsed(core)) { + d_vpr_e("%s: video hardware already power collapsed\n", __func__); + return rc; + } + + /* + * Acquire video_xo_reset to ensure EVA module is + * not doing assert or de-assert on video_xo_reset + * while reading noc registers + */ + d_vpr_e("%s: read NOC ERR LOG registers\n", __func__); + do { + rc = call_res_op(core, reset_control_acquire, core, "video_xo_reset"); + if (!rc) { + break; + } else { + d_vpr_e( + "%s: failed to acquire video_xo_reset control, count %d\n", + __func__, count); + count++; + usleep_range(1000, 1000); + } + } while (count < 100); + + if (count >= 100) { + d_vpr_e("%s: timeout acquiring video_xo_reset\n", __func__); + goto fail_assert_xo_reset; + } + + rc = __read_register(core, + NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG2_LOW, &value); + if (!rc) + d_vpr_e("%s: NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG2_LOW: %#x\n", + __func__, value); + + rc = __read_register(core, + NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG3_LOW, &value); + if (!rc) + d_vpr_e("%s: NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG3_LOW: %#x\n", + __func__, value); + + rc = __write_register(core, + NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRCLR_LOW, 0x1); + if (rc) + d_vpr_e("%s: error clearing NOC reg\n", __func__); + + /* release reset control for other consumers */ + rc = call_res_op(core, reset_control_release, core, "video_xo_reset"); + if (rc) { + d_vpr_e("%s: failed to release video_xo_reset reset\n", __func__); + goto fail_deassert_xo_reset; + } + +fail_deassert_xo_reset: +fail_assert_xo_reset: + return rc; } static int __clear_interrupt_iris33(struct msm_vidc_core *vidc_core) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 0d0d253a57..826954a067 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -4570,9 +4570,6 @@ int msm_vidc_smmu_fault_handler(struct iommu_domain *domain, msm_vidc_change_core_sub_state(core, 0, CORE_SUBSTATE_PAGE_FAULT, __func__); core_unlock(core, __func__); - /* print noc error log registers */ - venus_hfi_noc_error_info(core); - msm_vidc_print_core_info(core); /* * Return -ENOSYS to elicit the default behaviour of smmu driver. diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index 4f04bda9be..dcde7fddad 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -472,17 +472,17 @@ int handle_system_error(struct msm_vidc_core *core, d_vpr_e("%s: system error received\n", __func__); print_sfr_message(core); - venus_hfi_noc_error_info(core); if (pkt) { /* enable force bugon for requested type */ - if (pkt->type == HFI_SYS_ERROR_FATAL) + if (pkt->type == HFI_SYS_ERROR_FATAL) { bug_on = !!(msm_vidc_enable_bugon & MSM_VIDC_BUG_ON_FATAL); - else if (pkt->type == HFI_SYS_ERROR_NOC) + } else if (pkt->type == HFI_SYS_ERROR_NOC) { bug_on = !!(msm_vidc_enable_bugon & MSM_VIDC_BUG_ON_NOC); - else if (pkt->type == HFI_SYS_ERROR_WD_TIMEOUT) + venus_hfi_noc_error_info(core); + } else if (pkt->type == HFI_SYS_ERROR_WD_TIMEOUT) { bug_on = !!(msm_vidc_enable_bugon & MSM_VIDC_BUG_ON_WD_TIMEOUT); - + } if (bug_on) { d_vpr_e("%s: force bugon for type %#x\n", __func__, pkt->type); MSM_VIDC_FATAL(true); From ed0cdf0c3f61fc8f5bd05d48c8fb0d442725c3ba Mon Sep 17 00:00:00 2001 From: Mihir Ganu Date: Thu, 20 Apr 2023 09:46:57 -0700 Subject: [PATCH 0891/1061] video: driver: Move private controls from UAPI - Move vendor private controls from UAPI to internal headers. - Add guards for AV1 format. Change-Id: Ida6348aa393be26f0be1b18ed4e08477bdaabac0 Signed-off-by: Mihir Ganu --- driver/platform/kalama/src/msm_vidc_kalama.c | 299 ++++++++++++++++-- .../pineapple/src/msm_vidc_pineapple.c | 299 ++++++++++++++++-- .../uapi/vidc/media/v4l2_vidc_extensions.h | 227 +------------ 3 files changed, 539 insertions(+), 286 deletions(-) diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index 357f58ccbf..047acab099 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -22,6 +22,239 @@ #include "hfi_property.h" #include "hfi_command.h" +#define V4L2_META_FMT_VIDC v4l2_fourcc('Q', 'M', 'E', 'T') + +#ifndef V4L2_CID_MPEG_VIDC_SECURE +#define V4L2_CID_MPEG_VIDC_SECURE (V4L2_CID_MPEG_VIDC_BASE + 0x1) +#endif + +#ifndef V4L2_CID_MPEG_VIDC_LOWLATENCY_REQUEST +#define V4L2_CID_MPEG_VIDC_LOWLATENCY_REQUEST (V4L2_CID_MPEG_VIDC_BASE + 0x3) +#endif + +/* FIXme: */ +#define V4L2_CID_MPEG_VIDC_CODEC_CONFIG (V4L2_CID_MPEG_VIDC_BASE + 0x4) +#define V4L2_CID_MPEG_VIDC_FRAME_RATE (V4L2_CID_MPEG_VIDC_BASE + 0x5) +#define V4L2_CID_MPEG_VIDC_OPERATING_RATE (V4L2_CID_MPEG_VIDC_BASE + 0x6) + +#ifndef V4L2_CID_MPEG_VIDC_TIME_DELTA_BASED_RC +#define V4L2_CID_MPEG_VIDC_TIME_DELTA_BASED_RC (V4L2_CID_MPEG_VIDC_BASE + 0xD) +#endif + +/* Encoder quality controls */ +#define V4L2_CID_MPEG_VIDC_CONTENT_ADAPTIVE_CODING \ + (V4L2_CID_MPEG_VIDC_BASE + 0xE) +#define V4L2_CID_MPEG_VIDC_QUALITY_BITRATE_BOOST \ + (V4L2_CID_MPEG_VIDC_BASE + 0xF) +#define V4L2_CID_MPEG_VIDC_VIDEO_BLUR_TYPES \ + (V4L2_CID_MPEG_VIDC_BASE + 0x10) +enum v4l2_mpeg_vidc_blur_types { + VIDC_BLUR_NONE = 0x0, + VIDC_BLUR_EXTERNAL = 0x1, + VIDC_BLUR_ADAPTIVE = 0x2, +}; +/* (blur width) << 16 | (blur height) */ +#define V4L2_CID_MPEG_VIDC_VIDEO_BLUR_RESOLUTION \ + (V4L2_CID_MPEG_VIDC_BASE + 0x11) +/* TODO: jdas: compound control for matrix */ +#define V4L2_CID_MPEG_VIDC_VIDEO_VPE_CSC_CUSTOM_MATRIX \ + (V4L2_CID_MPEG_VIDC_BASE + 0x12) +#define V4L2_CID_MPEG_VIDC_METADATA_LTR_MARK_USE_DETAILS \ + (V4L2_CID_MPEG_VIDC_BASE + 0x13) +#define V4L2_CID_MPEG_VIDC_METADATA_SEQ_HEADER_NAL \ + (V4L2_CID_MPEG_VIDC_BASE + 0x14) +#define V4L2_CID_MPEG_VIDC_METADATA_DPB_LUMA_CHROMA_MISR \ + (V4L2_CID_MPEG_VIDC_BASE + 0x15) +#define V4L2_CID_MPEG_VIDC_METADATA_OPB_LUMA_CHROMA_MISR \ + (V4L2_CID_MPEG_VIDC_BASE + 0x16) +#define V4L2_CID_MPEG_VIDC_METADATA_INTERLACE \ + (V4L2_CID_MPEG_VIDC_BASE + 0x17) +#define V4L2_CID_MPEG_VIDC_METADATA_CONCEALED_MB_COUNT \ + (V4L2_CID_MPEG_VIDC_BASE + 0x18) +#define V4L2_CID_MPEG_VIDC_METADATA_HISTOGRAM_INFO \ + (V4L2_CID_MPEG_VIDC_BASE + 0x19) +#define V4L2_CID_MPEG_VIDC_METADATA_SEI_MASTERING_DISPLAY_COLOUR \ + (V4L2_CID_MPEG_VIDC_BASE + 0x1A) +#define V4L2_CID_MPEG_VIDC_METADATA_SEI_CONTENT_LIGHT_LEVEL \ + (V4L2_CID_MPEG_VIDC_BASE + 0x1B) +#define V4L2_CID_MPEG_VIDC_METADATA_HDR10PLUS \ + (V4L2_CID_MPEG_VIDC_BASE + 0x1C) +#define V4L2_CID_MPEG_VIDC_METADATA_EVA_STATS \ + (V4L2_CID_MPEG_VIDC_BASE + 0x1D) +#define V4L2_CID_MPEG_VIDC_METADATA_BUFFER_TAG \ + (V4L2_CID_MPEG_VIDC_BASE + 0x1E) +#define V4L2_CID_MPEG_VIDC_METADATA_SUBFRAME_OUTPUT \ + (V4L2_CID_MPEG_VIDC_BASE + 0x1F) +#define V4L2_CID_MPEG_VIDC_METADATA_ROI_INFO \ + (V4L2_CID_MPEG_VIDC_BASE + 0x20) +#define V4L2_CID_MPEG_VIDC_METADATA_TIMESTAMP \ + (V4L2_CID_MPEG_VIDC_BASE + 0x21) +#define V4L2_CID_MPEG_VIDC_METADATA_ENC_QP_METADATA \ + (V4L2_CID_MPEG_VIDC_BASE + 0x22) +#define V4L2_CID_MPEG_VIDC_MIN_BITSTREAM_SIZE_OVERWRITE \ + (V4L2_CID_MPEG_VIDC_BASE + 0x23) +#define V4L2_CID_MPEG_VIDC_METADATA_BITSTREAM_RESOLUTION \ + (V4L2_CID_MPEG_VIDC_BASE + 0x24) +#define V4L2_CID_MPEG_VIDC_METADATA_CROP_OFFSETS \ + (V4L2_CID_MPEG_VIDC_BASE + 0x25) +#define V4L2_CID_MPEG_VIDC_METADATA_SALIENCY_INFO \ + (V4L2_CID_MPEG_VIDC_BASE + 0x26) +#define V4L2_CID_MPEG_VIDC_METADATA_TRANSCODE_STAT_INFO \ + (V4L2_CID_MPEG_VIDC_BASE + 0x27) + +/* Encoder Super frame control */ +#define V4L2_CID_MPEG_VIDC_SUPERFRAME (V4L2_CID_MPEG_VIDC_BASE + 0x28) +/* Thumbnail Mode control */ +#define V4L2_CID_MPEG_VIDC_THUMBNAIL_MODE (V4L2_CID_MPEG_VIDC_BASE + 0x29) + +/* Priority control */ +#ifndef V4L2_CID_MPEG_VIDC_PRIORITY +#define V4L2_CID_MPEG_VIDC_PRIORITY (V4L2_CID_MPEG_VIDC_BASE + 0x2A) +#endif + +/* Metadata DPB Tag List*/ +#define V4L2_CID_MPEG_VIDC_METADATA_DPB_TAG_LIST \ + (V4L2_CID_MPEG_VIDC_BASE + 0x2B) +/* Encoder Input Compression Ratio control */ +#define V4L2_CID_MPEG_VIDC_ENC_INPUT_COMPRESSION_RATIO \ + (V4L2_CID_MPEG_VIDC_BASE + 0x2C) +#define V4L2_CID_MPEG_VIDC_METADATA_DEC_QP_METADATA \ + (V4L2_CID_MPEG_VIDC_BASE + 0x2E) + +/* Encoder Complexity control */ +#ifndef V4L2_CID_MPEG_VIDC_VENC_COMPLEXITY +#define V4L2_CID_MPEG_VIDC_VENC_COMPLEXITY \ + (V4L2_CID_MPEG_VIDC_BASE + 0x2F) +#endif + +/* Decoder Max Number of Reorder Frames */ +#ifndef V4L2_CID_MPEG_VIDC_METADATA_MAX_NUM_REORDER_FRAMES +#define V4L2_CID_MPEG_VIDC_METADATA_MAX_NUM_REORDER_FRAMES \ + (V4L2_CID_MPEG_VIDC_BASE + 0x30) +#endif + +/* Control IDs for AV1 */ +#define V4L2_CID_MPEG_VIDC_AV1_PROFILE (V4L2_CID_MPEG_VIDC_BASE + 0x31) +enum v4l2_mpeg_vidc_av1_profile { + V4L2_MPEG_VIDC_AV1_PROFILE_MAIN = 0, + V4L2_MPEG_VIDC_AV1_PROFILE_HIGH = 1, + V4L2_MPEG_VIDC_AV1_PROFILE_PROFESSIONAL = 2, +}; + +#define V4L2_CID_MPEG_VIDC_AV1_LEVEL (V4L2_CID_MPEG_VIDC_BASE + 0x32) +enum v4l2_mpeg_vidc_av1_level { + V4L2_MPEG_VIDC_AV1_LEVEL_2_0 = 0, + V4L2_MPEG_VIDC_AV1_LEVEL_2_1 = 1, + V4L2_MPEG_VIDC_AV1_LEVEL_2_2 = 2, + V4L2_MPEG_VIDC_AV1_LEVEL_2_3 = 3, + V4L2_MPEG_VIDC_AV1_LEVEL_3_0 = 4, + V4L2_MPEG_VIDC_AV1_LEVEL_3_1 = 5, + V4L2_MPEG_VIDC_AV1_LEVEL_3_2 = 6, + V4L2_MPEG_VIDC_AV1_LEVEL_3_3 = 7, + V4L2_MPEG_VIDC_AV1_LEVEL_4_0 = 8, + V4L2_MPEG_VIDC_AV1_LEVEL_4_1 = 9, + V4L2_MPEG_VIDC_AV1_LEVEL_4_2 = 10, + V4L2_MPEG_VIDC_AV1_LEVEL_4_3 = 11, + V4L2_MPEG_VIDC_AV1_LEVEL_5_0 = 12, + V4L2_MPEG_VIDC_AV1_LEVEL_5_1 = 13, + V4L2_MPEG_VIDC_AV1_LEVEL_5_2 = 14, + V4L2_MPEG_VIDC_AV1_LEVEL_5_3 = 15, + V4L2_MPEG_VIDC_AV1_LEVEL_6_0 = 16, + V4L2_MPEG_VIDC_AV1_LEVEL_6_1 = 17, + V4L2_MPEG_VIDC_AV1_LEVEL_6_2 = 18, + V4L2_MPEG_VIDC_AV1_LEVEL_6_3 = 19, + V4L2_MPEG_VIDC_AV1_LEVEL_7_0 = 20, + V4L2_MPEG_VIDC_AV1_LEVEL_7_1 = 21, + V4L2_MPEG_VIDC_AV1_LEVEL_7_2 = 22, + V4L2_MPEG_VIDC_AV1_LEVEL_7_3 = 23, +}; + +#define V4L2_CID_MPEG_VIDC_AV1_TIER (V4L2_CID_MPEG_VIDC_BASE + 0x33) +enum v4l2_mpeg_vidc_av1_tier { + V4L2_MPEG_VIDC_AV1_TIER_MAIN = 0, + V4L2_MPEG_VIDC_AV1_TIER_HIGH = 1, +}; +/* Decoder Timestamp Reorder control */ +#define V4L2_CID_MPEG_VIDC_TS_REORDER (V4L2_CID_MPEG_VIDC_BASE + 0x34) +/* AV1 Decoder Film Grain */ +#define V4L2_CID_MPEG_VIDC_AV1D_FILM_GRAIN_PRESENT \ + (V4L2_CID_MPEG_VIDC_BASE + 0x35) +/* Enables Output buffer fence id via input metadata */ +#define V4L2_CID_MPEG_VIDC_METADATA_OUTBUF_FENCE \ + (V4L2_CID_MPEG_VIDC_BASE + 0x38) +/* Control to set fence id to driver in order get corresponding fence fd */ +#define V4L2_CID_MPEG_VIDC_SW_FENCE_ID \ + (V4L2_CID_MPEG_VIDC_BASE + 0x39) +/* + * Control to get fence fd from driver for the fence id + * set via V4L2_CID_MPEG_VIDC_SW_FENCE_ID + */ +#define V4L2_CID_MPEG_VIDC_SW_FENCE_FD \ + (V4L2_CID_MPEG_VIDC_BASE + 0x3A) +#define V4L2_CID_MPEG_VIDC_METADATA_PICTURE_TYPE \ + (V4L2_CID_MPEG_VIDC_BASE + 0x3B) + +/* Encoder Slice Delivery Mode + * set format has a dependency on this control + * and gets invoked when this control is updated. + */ +#define V4L2_CID_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE \ + (V4L2_CID_MPEG_VIDC_BASE + 0x3C) + +#define V4L2_CID_MPEG_VIDC_H264_ENCODE_DELIVERY_MODE \ + (V4L2_CID_MPEG_VIDC_BASE + 0x3D) + +#define V4L2_CID_MPEG_VIDC_CRITICAL_PRIORITY \ + (V4L2_CID_MPEG_VIDC_BASE + 0x3E) +#define V4L2_CID_MPEG_VIDC_RESERVE_DURATION \ + (V4L2_CID_MPEG_VIDC_BASE + 0x3F) + +#define V4L2_CID_MPEG_VIDC_METADATA_DOLBY_RPU \ + (V4L2_CID_MPEG_VIDC_BASE + 0x40) + +#define V4L2_CID_MPEG_VIDC_CLIENT_ID \ + (V4L2_CID_MPEG_VIDC_BASE + 0x41) + +#define V4L2_CID_MPEG_VIDC_LAST_FLAG_EVENT_ENABLE \ + (V4L2_CID_MPEG_VIDC_BASE + 0x42) + +#ifndef V4L2_CID_MPEG_VIDC_VUI_TIMING_INFO +#define V4L2_CID_MPEG_VIDC_VUI_TIMING_INFO \ + (V4L2_CID_MPEG_VIDC_BASE + 0x43) +#endif + +#define V4L2_CID_MPEG_VIDC_EARLY_NOTIFY_ENABLE \ + (V4L2_CID_MPEG_VIDC_BASE + 0x44) + +#define V4L2_CID_MPEG_VIDC_EARLY_NOTIFY_LINE_COUNT \ + (V4L2_CID_MPEG_VIDC_BASE + 0x45) + +/* + * This control is introduced to overcome v4l2 limitation + * of allowing only standard colorspace info via s_fmt. + * v4l_sanitize_colorspace() is introduced in s_fmt ioctl + * to reject private colorspace. Through this control, client + * can set private colorspace info and/or use this control + * to set colorspace dynamically. + * The control value is 32 bits packed as: + * [ 0 - 7] : matrix coefficients + * [ 8 - 15] : transfer characteristics + * [16 - 23] : colour primaries + * [24 - 31] : range + * This control is only for encoder. + * Currently g_fmt in v4l2 does not santize colorspace, + * hence this control is not introduced for decoder. + */ +#define V4L2_CID_MPEG_VIDC_SIGNAL_COLOR_INFO \ + (V4L2_CID_MPEG_VIDC_BASE + 0x46) + +/* control to enable csc */ +#define V4L2_CID_MPEG_VIDC_CSC \ + (V4L2_CID_MPEG_VIDC_BASE + 0x47) + +#define V4L2_CID_MPEG_VIDC_DRIVER_VERSION \ + (V4L2_CID_MPEG_VIDC_BASE + 0x48) + /* version: major[24:31], minor[16:23], revision[0:15] */ #define DRIVER_VERSION 0x04000000 #define DEFAULT_VIDEO_CONCEAL_COLOR_BLACK 0x8020010 @@ -1217,11 +1450,11 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, {PROFILE, DEC, AV1, - V4L2_MPEG_VIDEO_AV1_PROFILE_MAIN, - V4L2_MPEG_VIDEO_AV1_PROFILE_MAIN, - BIT(V4L2_MPEG_VIDEO_AV1_PROFILE_MAIN), - V4L2_MPEG_VIDEO_AV1_PROFILE_MAIN, - V4L2_CID_MPEG_VIDEO_AV1_PROFILE, + V4L2_MPEG_VIDC_AV1_PROFILE_MAIN, + V4L2_MPEG_VIDC_AV1_PROFILE_MAIN, + BIT(V4L2_MPEG_VIDC_AV1_PROFILE_MAIN), + V4L2_MPEG_VIDC_AV1_PROFILE_MAIN, + V4L2_CID_MPEG_VIDC_AV1_PROFILE, HFI_PROP_PROFILE, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, @@ -1342,38 +1575,38 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, {LEVEL, DEC, AV1, - V4L2_MPEG_VIDEO_AV1_LEVEL_2_0, - V4L2_MPEG_VIDEO_AV1_LEVEL_6_1, - BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_2_0) | - BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_2_1) | - BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_2_2) | - BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_2_3) | - BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_3_0) | - BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_3_1) | - BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_3_2) | - BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_3_3) | - BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_4_0) | - BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_4_1) | - BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_4_2) | - BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_4_3) | - BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_5_0) | - BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_5_1) | - BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_5_2) | - BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_5_3) | - BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_6_0) | - BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_6_1), - V4L2_MPEG_VIDEO_AV1_LEVEL_6_1, - V4L2_CID_MPEG_VIDEO_AV1_LEVEL, + V4L2_MPEG_VIDC_AV1_LEVEL_2_0, + V4L2_MPEG_VIDC_AV1_LEVEL_6_1, + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_2_0) | + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_2_2) | + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_2_3) | + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_3_0) | + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_3_2) | + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_3_3) | + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_4_0) | + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_4_2) | + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_4_3) | + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_5_0) | + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_5_1) | + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_5_2) | + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_5_3) | + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_6_0) | + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_6_1), + V4L2_MPEG_VIDC_AV1_LEVEL_6_1, + V4L2_CID_MPEG_VIDC_AV1_LEVEL, HFI_PROP_LEVEL, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, {AV1_TIER, DEC, AV1, - V4L2_MPEG_VIDEO_AV1_TIER_MAIN, - V4L2_MPEG_VIDEO_AV1_TIER_HIGH, - BIT(V4L2_MPEG_VIDEO_AV1_TIER_MAIN) | - BIT(V4L2_MPEG_VIDEO_AV1_TIER_HIGH), - V4L2_MPEG_VIDEO_AV1_TIER_HIGH, - V4L2_CID_MPEG_VIDEO_AV1_TIER, + V4L2_MPEG_VIDC_AV1_TIER_MAIN, + V4L2_MPEG_VIDC_AV1_TIER_HIGH, + BIT(V4L2_MPEG_VIDC_AV1_TIER_MAIN) | + BIT(V4L2_MPEG_VIDC_AV1_TIER_HIGH), + V4L2_MPEG_VIDC_AV1_TIER_HIGH, + V4L2_CID_MPEG_VIDC_AV1_TIER, HFI_PROP_TIER, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, diff --git a/driver/platform/pineapple/src/msm_vidc_pineapple.c b/driver/platform/pineapple/src/msm_vidc_pineapple.c index 3c5ddd5a47..6c2d33c2be 100644 --- a/driver/platform/pineapple/src/msm_vidc_pineapple.c +++ b/driver/platform/pineapple/src/msm_vidc_pineapple.c @@ -24,6 +24,239 @@ #include "hfi_command.h" #include "venus_hfi.h" +#define V4L2_META_FMT_VIDC v4l2_fourcc('Q', 'M', 'E', 'T') + +#ifndef V4L2_CID_MPEG_VIDC_SECURE +#define V4L2_CID_MPEG_VIDC_SECURE (V4L2_CID_MPEG_VIDC_BASE + 0x1) +#endif + +#ifndef V4L2_CID_MPEG_VIDC_LOWLATENCY_REQUEST +#define V4L2_CID_MPEG_VIDC_LOWLATENCY_REQUEST (V4L2_CID_MPEG_VIDC_BASE + 0x3) +#endif + +/* FIXme: */ +#define V4L2_CID_MPEG_VIDC_CODEC_CONFIG (V4L2_CID_MPEG_VIDC_BASE + 0x4) +#define V4L2_CID_MPEG_VIDC_FRAME_RATE (V4L2_CID_MPEG_VIDC_BASE + 0x5) +#define V4L2_CID_MPEG_VIDC_OPERATING_RATE (V4L2_CID_MPEG_VIDC_BASE + 0x6) + +#ifndef V4L2_CID_MPEG_VIDC_TIME_DELTA_BASED_RC +#define V4L2_CID_MPEG_VIDC_TIME_DELTA_BASED_RC (V4L2_CID_MPEG_VIDC_BASE + 0xD) +#endif + +/* Encoder quality controls */ +#define V4L2_CID_MPEG_VIDC_CONTENT_ADAPTIVE_CODING \ + (V4L2_CID_MPEG_VIDC_BASE + 0xE) +#define V4L2_CID_MPEG_VIDC_QUALITY_BITRATE_BOOST \ + (V4L2_CID_MPEG_VIDC_BASE + 0xF) +#define V4L2_CID_MPEG_VIDC_VIDEO_BLUR_TYPES \ + (V4L2_CID_MPEG_VIDC_BASE + 0x10) +enum v4l2_mpeg_vidc_blur_types { + VIDC_BLUR_NONE = 0x0, + VIDC_BLUR_EXTERNAL = 0x1, + VIDC_BLUR_ADAPTIVE = 0x2, +}; +/* (blur width) << 16 | (blur height) */ +#define V4L2_CID_MPEG_VIDC_VIDEO_BLUR_RESOLUTION \ + (V4L2_CID_MPEG_VIDC_BASE + 0x11) +/* TODO: jdas: compound control for matrix */ +#define V4L2_CID_MPEG_VIDC_VIDEO_VPE_CSC_CUSTOM_MATRIX \ + (V4L2_CID_MPEG_VIDC_BASE + 0x12) +#define V4L2_CID_MPEG_VIDC_METADATA_LTR_MARK_USE_DETAILS \ + (V4L2_CID_MPEG_VIDC_BASE + 0x13) +#define V4L2_CID_MPEG_VIDC_METADATA_SEQ_HEADER_NAL \ + (V4L2_CID_MPEG_VIDC_BASE + 0x14) +#define V4L2_CID_MPEG_VIDC_METADATA_DPB_LUMA_CHROMA_MISR \ + (V4L2_CID_MPEG_VIDC_BASE + 0x15) +#define V4L2_CID_MPEG_VIDC_METADATA_OPB_LUMA_CHROMA_MISR \ + (V4L2_CID_MPEG_VIDC_BASE + 0x16) +#define V4L2_CID_MPEG_VIDC_METADATA_INTERLACE \ + (V4L2_CID_MPEG_VIDC_BASE + 0x17) +#define V4L2_CID_MPEG_VIDC_METADATA_CONCEALED_MB_COUNT \ + (V4L2_CID_MPEG_VIDC_BASE + 0x18) +#define V4L2_CID_MPEG_VIDC_METADATA_HISTOGRAM_INFO \ + (V4L2_CID_MPEG_VIDC_BASE + 0x19) +#define V4L2_CID_MPEG_VIDC_METADATA_SEI_MASTERING_DISPLAY_COLOUR \ + (V4L2_CID_MPEG_VIDC_BASE + 0x1A) +#define V4L2_CID_MPEG_VIDC_METADATA_SEI_CONTENT_LIGHT_LEVEL \ + (V4L2_CID_MPEG_VIDC_BASE + 0x1B) +#define V4L2_CID_MPEG_VIDC_METADATA_HDR10PLUS \ + (V4L2_CID_MPEG_VIDC_BASE + 0x1C) +#define V4L2_CID_MPEG_VIDC_METADATA_EVA_STATS \ + (V4L2_CID_MPEG_VIDC_BASE + 0x1D) +#define V4L2_CID_MPEG_VIDC_METADATA_BUFFER_TAG \ + (V4L2_CID_MPEG_VIDC_BASE + 0x1E) +#define V4L2_CID_MPEG_VIDC_METADATA_SUBFRAME_OUTPUT \ + (V4L2_CID_MPEG_VIDC_BASE + 0x1F) +#define V4L2_CID_MPEG_VIDC_METADATA_ROI_INFO \ + (V4L2_CID_MPEG_VIDC_BASE + 0x20) +#define V4L2_CID_MPEG_VIDC_METADATA_TIMESTAMP \ + (V4L2_CID_MPEG_VIDC_BASE + 0x21) +#define V4L2_CID_MPEG_VIDC_METADATA_ENC_QP_METADATA \ + (V4L2_CID_MPEG_VIDC_BASE + 0x22) +#define V4L2_CID_MPEG_VIDC_MIN_BITSTREAM_SIZE_OVERWRITE \ + (V4L2_CID_MPEG_VIDC_BASE + 0x23) +#define V4L2_CID_MPEG_VIDC_METADATA_BITSTREAM_RESOLUTION \ + (V4L2_CID_MPEG_VIDC_BASE + 0x24) +#define V4L2_CID_MPEG_VIDC_METADATA_CROP_OFFSETS \ + (V4L2_CID_MPEG_VIDC_BASE + 0x25) +#define V4L2_CID_MPEG_VIDC_METADATA_SALIENCY_INFO \ + (V4L2_CID_MPEG_VIDC_BASE + 0x26) +#define V4L2_CID_MPEG_VIDC_METADATA_TRANSCODE_STAT_INFO \ + (V4L2_CID_MPEG_VIDC_BASE + 0x27) + +/* Encoder Super frame control */ +#define V4L2_CID_MPEG_VIDC_SUPERFRAME (V4L2_CID_MPEG_VIDC_BASE + 0x28) +/* Thumbnail Mode control */ +#define V4L2_CID_MPEG_VIDC_THUMBNAIL_MODE (V4L2_CID_MPEG_VIDC_BASE + 0x29) + +/* Priority control */ +#ifndef V4L2_CID_MPEG_VIDC_PRIORITY +#define V4L2_CID_MPEG_VIDC_PRIORITY (V4L2_CID_MPEG_VIDC_BASE + 0x2A) +#endif + +/* Metadata DPB Tag List*/ +#define V4L2_CID_MPEG_VIDC_METADATA_DPB_TAG_LIST \ + (V4L2_CID_MPEG_VIDC_BASE + 0x2B) +/* Encoder Input Compression Ratio control */ +#define V4L2_CID_MPEG_VIDC_ENC_INPUT_COMPRESSION_RATIO \ + (V4L2_CID_MPEG_VIDC_BASE + 0x2C) +#define V4L2_CID_MPEG_VIDC_METADATA_DEC_QP_METADATA \ + (V4L2_CID_MPEG_VIDC_BASE + 0x2E) + +/* Encoder Complexity control */ +#ifndef V4L2_CID_MPEG_VIDC_VENC_COMPLEXITY +#define V4L2_CID_MPEG_VIDC_VENC_COMPLEXITY \ + (V4L2_CID_MPEG_VIDC_BASE + 0x2F) +#endif + +/* Decoder Max Number of Reorder Frames */ +#ifndef V4L2_CID_MPEG_VIDC_METADATA_MAX_NUM_REORDER_FRAMES +#define V4L2_CID_MPEG_VIDC_METADATA_MAX_NUM_REORDER_FRAMES \ + (V4L2_CID_MPEG_VIDC_BASE + 0x30) +#endif + +/* Control IDs for AV1 */ +#define V4L2_CID_MPEG_VIDC_AV1_PROFILE (V4L2_CID_MPEG_VIDC_BASE + 0x31) +enum v4l2_mpeg_vidc_av1_profile { + V4L2_MPEG_VIDC_AV1_PROFILE_MAIN = 0, + V4L2_MPEG_VIDC_AV1_PROFILE_HIGH = 1, + V4L2_MPEG_VIDC_AV1_PROFILE_PROFESSIONAL = 2, +}; + +#define V4L2_CID_MPEG_VIDC_AV1_LEVEL (V4L2_CID_MPEG_VIDC_BASE + 0x32) +enum v4l2_mpeg_vidc_av1_level { + V4L2_MPEG_VIDC_AV1_LEVEL_2_0 = 0, + V4L2_MPEG_VIDC_AV1_LEVEL_2_1 = 1, + V4L2_MPEG_VIDC_AV1_LEVEL_2_2 = 2, + V4L2_MPEG_VIDC_AV1_LEVEL_2_3 = 3, + V4L2_MPEG_VIDC_AV1_LEVEL_3_0 = 4, + V4L2_MPEG_VIDC_AV1_LEVEL_3_1 = 5, + V4L2_MPEG_VIDC_AV1_LEVEL_3_2 = 6, + V4L2_MPEG_VIDC_AV1_LEVEL_3_3 = 7, + V4L2_MPEG_VIDC_AV1_LEVEL_4_0 = 8, + V4L2_MPEG_VIDC_AV1_LEVEL_4_1 = 9, + V4L2_MPEG_VIDC_AV1_LEVEL_4_2 = 10, + V4L2_MPEG_VIDC_AV1_LEVEL_4_3 = 11, + V4L2_MPEG_VIDC_AV1_LEVEL_5_0 = 12, + V4L2_MPEG_VIDC_AV1_LEVEL_5_1 = 13, + V4L2_MPEG_VIDC_AV1_LEVEL_5_2 = 14, + V4L2_MPEG_VIDC_AV1_LEVEL_5_3 = 15, + V4L2_MPEG_VIDC_AV1_LEVEL_6_0 = 16, + V4L2_MPEG_VIDC_AV1_LEVEL_6_1 = 17, + V4L2_MPEG_VIDC_AV1_LEVEL_6_2 = 18, + V4L2_MPEG_VIDC_AV1_LEVEL_6_3 = 19, + V4L2_MPEG_VIDC_AV1_LEVEL_7_0 = 20, + V4L2_MPEG_VIDC_AV1_LEVEL_7_1 = 21, + V4L2_MPEG_VIDC_AV1_LEVEL_7_2 = 22, + V4L2_MPEG_VIDC_AV1_LEVEL_7_3 = 23, +}; + +#define V4L2_CID_MPEG_VIDC_AV1_TIER (V4L2_CID_MPEG_VIDC_BASE + 0x33) +enum v4l2_mpeg_vidc_av1_tier { + V4L2_MPEG_VIDC_AV1_TIER_MAIN = 0, + V4L2_MPEG_VIDC_AV1_TIER_HIGH = 1, +}; +/* Decoder Timestamp Reorder control */ +#define V4L2_CID_MPEG_VIDC_TS_REORDER (V4L2_CID_MPEG_VIDC_BASE + 0x34) +/* AV1 Decoder Film Grain */ +#define V4L2_CID_MPEG_VIDC_AV1D_FILM_GRAIN_PRESENT \ + (V4L2_CID_MPEG_VIDC_BASE + 0x35) +/* Enables Output buffer fence id via input metadata */ +#define V4L2_CID_MPEG_VIDC_METADATA_OUTBUF_FENCE \ + (V4L2_CID_MPEG_VIDC_BASE + 0x38) +/* Control to set fence id to driver in order get corresponding fence fd */ +#define V4L2_CID_MPEG_VIDC_SW_FENCE_ID \ + (V4L2_CID_MPEG_VIDC_BASE + 0x39) +/* + * Control to get fence fd from driver for the fence id + * set via V4L2_CID_MPEG_VIDC_SW_FENCE_ID + */ +#define V4L2_CID_MPEG_VIDC_SW_FENCE_FD \ + (V4L2_CID_MPEG_VIDC_BASE + 0x3A) +#define V4L2_CID_MPEG_VIDC_METADATA_PICTURE_TYPE \ + (V4L2_CID_MPEG_VIDC_BASE + 0x3B) + +/* Encoder Slice Delivery Mode + * set format has a dependency on this control + * and gets invoked when this control is updated. + */ +#define V4L2_CID_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE \ + (V4L2_CID_MPEG_VIDC_BASE + 0x3C) + +#define V4L2_CID_MPEG_VIDC_H264_ENCODE_DELIVERY_MODE \ + (V4L2_CID_MPEG_VIDC_BASE + 0x3D) + +#define V4L2_CID_MPEG_VIDC_CRITICAL_PRIORITY \ + (V4L2_CID_MPEG_VIDC_BASE + 0x3E) +#define V4L2_CID_MPEG_VIDC_RESERVE_DURATION \ + (V4L2_CID_MPEG_VIDC_BASE + 0x3F) + +#define V4L2_CID_MPEG_VIDC_METADATA_DOLBY_RPU \ + (V4L2_CID_MPEG_VIDC_BASE + 0x40) + +#define V4L2_CID_MPEG_VIDC_CLIENT_ID \ + (V4L2_CID_MPEG_VIDC_BASE + 0x41) + +#define V4L2_CID_MPEG_VIDC_LAST_FLAG_EVENT_ENABLE \ + (V4L2_CID_MPEG_VIDC_BASE + 0x42) + +#ifndef V4L2_CID_MPEG_VIDC_VUI_TIMING_INFO +#define V4L2_CID_MPEG_VIDC_VUI_TIMING_INFO \ + (V4L2_CID_MPEG_VIDC_BASE + 0x43) +#endif + +#define V4L2_CID_MPEG_VIDC_EARLY_NOTIFY_ENABLE \ + (V4L2_CID_MPEG_VIDC_BASE + 0x44) + +#define V4L2_CID_MPEG_VIDC_EARLY_NOTIFY_LINE_COUNT \ + (V4L2_CID_MPEG_VIDC_BASE + 0x45) + +/* + * This control is introduced to overcome v4l2 limitation + * of allowing only standard colorspace info via s_fmt. + * v4l_sanitize_colorspace() is introduced in s_fmt ioctl + * to reject private colorspace. Through this control, client + * can set private colorspace info and/or use this control + * to set colorspace dynamically. + * The control value is 32 bits packed as: + * [ 0 - 7] : matrix coefficients + * [ 8 - 15] : transfer characteristics + * [16 - 23] : colour primaries + * [24 - 31] : range + * This control is only for encoder. + * Currently g_fmt in v4l2 does not santize colorspace, + * hence this control is not introduced for decoder. + */ +#define V4L2_CID_MPEG_VIDC_SIGNAL_COLOR_INFO \ + (V4L2_CID_MPEG_VIDC_BASE + 0x46) + +/* control to enable csc */ +#define V4L2_CID_MPEG_VIDC_CSC \ + (V4L2_CID_MPEG_VIDC_BASE + 0x47) + +#define V4L2_CID_MPEG_VIDC_DRIVER_VERSION \ + (V4L2_CID_MPEG_VIDC_BASE + 0x48) + /* version: major[24:31], minor[16:23], revision[0:15] */ #define DRIVER_VERSION 0x04000000 #define DEFAULT_VIDEO_CONCEAL_COLOR_BLACK 0x8020010 @@ -1329,11 +1562,11 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, {PROFILE, DEC, AV1, - V4L2_MPEG_VIDEO_AV1_PROFILE_MAIN, - V4L2_MPEG_VIDEO_AV1_PROFILE_MAIN, - BIT(V4L2_MPEG_VIDEO_AV1_PROFILE_MAIN), - V4L2_MPEG_VIDEO_AV1_PROFILE_MAIN, - V4L2_CID_MPEG_VIDEO_AV1_PROFILE, + V4L2_MPEG_VIDC_AV1_PROFILE_MAIN, + V4L2_MPEG_VIDC_AV1_PROFILE_MAIN, + BIT(V4L2_MPEG_VIDC_AV1_PROFILE_MAIN), + V4L2_MPEG_VIDC_AV1_PROFILE_MAIN, + V4L2_CID_MPEG_VIDC_AV1_PROFILE, HFI_PROP_PROFILE, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, @@ -1454,38 +1687,38 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, {LEVEL, DEC, AV1, - V4L2_MPEG_VIDEO_AV1_LEVEL_2_0, - V4L2_MPEG_VIDEO_AV1_LEVEL_6_1, - BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_2_0) | - BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_2_1) | - BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_2_2) | - BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_2_3) | - BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_3_0) | - BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_3_1) | - BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_3_2) | - BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_3_3) | - BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_4_0) | - BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_4_1) | - BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_4_2) | - BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_4_3) | - BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_5_0) | - BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_5_1) | - BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_5_2) | - BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_5_3) | - BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_6_0) | - BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_6_1), - V4L2_MPEG_VIDEO_AV1_LEVEL_6_1, - V4L2_CID_MPEG_VIDEO_AV1_LEVEL, + V4L2_MPEG_VIDC_AV1_LEVEL_2_0, + V4L2_MPEG_VIDC_AV1_LEVEL_6_1, + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_2_0) | + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_2_2) | + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_2_3) | + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_3_0) | + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_3_2) | + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_3_3) | + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_4_0) | + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_4_2) | + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_4_3) | + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_5_0) | + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_5_1) | + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_5_2) | + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_5_3) | + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_6_0) | + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_6_1), + V4L2_MPEG_VIDC_AV1_LEVEL_6_1, + V4L2_CID_MPEG_VIDC_AV1_LEVEL, HFI_PROP_LEVEL, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, {AV1_TIER, DEC, AV1, - V4L2_MPEG_VIDEO_AV1_TIER_MAIN, - V4L2_MPEG_VIDEO_AV1_TIER_HIGH, - BIT(V4L2_MPEG_VIDEO_AV1_TIER_MAIN) | - BIT(V4L2_MPEG_VIDEO_AV1_TIER_HIGH), - V4L2_MPEG_VIDEO_AV1_TIER_HIGH, - V4L2_CID_MPEG_VIDEO_AV1_TIER, + V4L2_MPEG_VIDC_AV1_TIER_MAIN, + V4L2_MPEG_VIDC_AV1_TIER_HIGH, + BIT(V4L2_MPEG_VIDC_AV1_TIER_MAIN) | + BIT(V4L2_MPEG_VIDC_AV1_TIER_HIGH), + V4L2_MPEG_VIDC_AV1_TIER_HIGH, + V4L2_CID_MPEG_VIDC_AV1_TIER, HFI_PROP_TIER, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, diff --git a/include/uapi/vidc/media/v4l2_vidc_extensions.h b/include/uapi/vidc/media/v4l2_vidc_extensions.h index 89d60f134b..dcec056301 100644 --- a/include/uapi/vidc/media/v4l2_vidc_extensions.h +++ b/include/uapi/vidc/media/v4l2_vidc_extensions.h @@ -12,9 +12,10 @@ /* 32 RGBA-8-8-8-8 compressed */ #define V4L2_PIX_FMT_VIDC_ARGB32C v4l2_fourcc('Q', '2', '4', 'C') -#define V4L2_META_FMT_VIDC v4l2_fourcc('Q', 'M', 'E', 'T') /* AV1 */ +#ifndef V4L2_PIX_FMT_AV1 #define V4L2_PIX_FMT_AV1 v4l2_fourcc('A', 'V', '1', '0') +#endif #ifndef V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE #define V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE (3) @@ -32,232 +33,18 @@ #define V4L2_CID_MPEG_VIDC_SECURE (V4L2_CID_MPEG_VIDC_BASE + 0x1) #define V4L2_CID_MPEG_VIDC_LOWLATENCY_REQUEST (V4L2_CID_MPEG_VIDC_BASE + 0x3) -/* FIXme: */ -#define V4L2_CID_MPEG_VIDC_CODEC_CONFIG (V4L2_CID_MPEG_VIDC_BASE + 0x4) -#define V4L2_CID_MPEG_VIDC_FRAME_RATE (V4L2_CID_MPEG_VIDC_BASE + 0x5) -#define V4L2_CID_MPEG_VIDC_OPERATING_RATE (V4L2_CID_MPEG_VIDC_BASE + 0x6) - #define V4L2_CID_MPEG_VIDC_TIME_DELTA_BASED_RC (V4L2_CID_MPEG_VIDC_BASE + 0xD) -/* Encoder quality controls */ -#define V4L2_CID_MPEG_VIDC_CONTENT_ADAPTIVE_CODING \ - (V4L2_CID_MPEG_VIDC_BASE + 0xE) -#define V4L2_CID_MPEG_VIDC_QUALITY_BITRATE_BOOST \ - (V4L2_CID_MPEG_VIDC_BASE + 0xF) -#define V4L2_CID_MPEG_VIDC_VIDEO_BLUR_TYPES \ - (V4L2_CID_MPEG_VIDC_BASE + 0x10) -enum v4l2_mpeg_vidc_blur_types { - VIDC_BLUR_NONE = 0x0, - VIDC_BLUR_EXTERNAL = 0x1, - VIDC_BLUR_ADAPTIVE = 0x2, -}; -/* (blur width) << 16 | (blur height) */ -#define V4L2_CID_MPEG_VIDC_VIDEO_BLUR_RESOLUTION \ - (V4L2_CID_MPEG_VIDC_BASE + 0x11) -/* TODO: jdas: compound control for matrix */ -#define V4L2_CID_MPEG_VIDC_VIDEO_VPE_CSC_CUSTOM_MATRIX \ - (V4L2_CID_MPEG_VIDC_BASE + 0x12) -#define V4L2_CID_MPEG_VIDC_METADATA_LTR_MARK_USE_DETAILS \ - (V4L2_CID_MPEG_VIDC_BASE + 0x13) -#define V4L2_CID_MPEG_VIDC_METADATA_SEQ_HEADER_NAL \ - (V4L2_CID_MPEG_VIDC_BASE + 0x14) -#define V4L2_CID_MPEG_VIDC_METADATA_DPB_LUMA_CHROMA_MISR \ - (V4L2_CID_MPEG_VIDC_BASE + 0x15) -#define V4L2_CID_MPEG_VIDC_METADATA_OPB_LUMA_CHROMA_MISR \ - (V4L2_CID_MPEG_VIDC_BASE + 0x16) -#define V4L2_CID_MPEG_VIDC_METADATA_INTERLACE \ - (V4L2_CID_MPEG_VIDC_BASE + 0x17) -#define V4L2_CID_MPEG_VIDC_METADATA_CONCEALED_MB_COUNT \ - (V4L2_CID_MPEG_VIDC_BASE + 0x18) -#define V4L2_CID_MPEG_VIDC_METADATA_HISTOGRAM_INFO \ - (V4L2_CID_MPEG_VIDC_BASE + 0x19) -#define V4L2_CID_MPEG_VIDC_METADATA_SEI_MASTERING_DISPLAY_COLOUR \ - (V4L2_CID_MPEG_VIDC_BASE + 0x1A) -#define V4L2_CID_MPEG_VIDC_METADATA_SEI_CONTENT_LIGHT_LEVEL \ - (V4L2_CID_MPEG_VIDC_BASE + 0x1B) -#define V4L2_CID_MPEG_VIDC_METADATA_HDR10PLUS \ - (V4L2_CID_MPEG_VIDC_BASE + 0x1C) -#define V4L2_CID_MPEG_VIDC_METADATA_EVA_STATS \ - (V4L2_CID_MPEG_VIDC_BASE + 0x1D) -#define V4L2_CID_MPEG_VIDC_METADATA_BUFFER_TAG \ - (V4L2_CID_MPEG_VIDC_BASE + 0x1E) -#define V4L2_CID_MPEG_VIDC_METADATA_SUBFRAME_OUTPUT \ - (V4L2_CID_MPEG_VIDC_BASE + 0x1F) -#define V4L2_CID_MPEG_VIDC_METADATA_ROI_INFO \ - (V4L2_CID_MPEG_VIDC_BASE + 0x20) -#define V4L2_CID_MPEG_VIDC_METADATA_TIMESTAMP \ - (V4L2_CID_MPEG_VIDC_BASE + 0x21) -#define V4L2_CID_MPEG_VIDC_METADATA_ENC_QP_METADATA \ - (V4L2_CID_MPEG_VIDC_BASE + 0x22) -#define V4L2_CID_MPEG_VIDC_MIN_BITSTREAM_SIZE_OVERWRITE \ - (V4L2_CID_MPEG_VIDC_BASE + 0x23) -#define V4L2_CID_MPEG_VIDC_METADATA_BITSTREAM_RESOLUTION \ - (V4L2_CID_MPEG_VIDC_BASE + 0x24) -#define V4L2_CID_MPEG_VIDC_METADATA_CROP_OFFSETS \ - (V4L2_CID_MPEG_VIDC_BASE + 0x25) -#define V4L2_CID_MPEG_VIDC_METADATA_SALIENCY_INFO \ - (V4L2_CID_MPEG_VIDC_BASE + 0x26) -#define V4L2_CID_MPEG_VIDC_METADATA_TRANSCODE_STAT_INFO \ - (V4L2_CID_MPEG_VIDC_BASE + 0x27) - -/* Encoder Super frame control */ -#define V4L2_CID_MPEG_VIDC_SUPERFRAME (V4L2_CID_MPEG_VIDC_BASE + 0x28) -/* Thumbnail Mode control */ -#define V4L2_CID_MPEG_VIDC_THUMBNAIL_MODE (V4L2_CID_MPEG_VIDC_BASE + 0x29) -/* Priority control */ #define V4L2_CID_MPEG_VIDC_PRIORITY (V4L2_CID_MPEG_VIDC_BASE + 0x2A) -/* Metadata DPB Tag List*/ -#define V4L2_CID_MPEG_VIDC_METADATA_DPB_TAG_LIST \ - (V4L2_CID_MPEG_VIDC_BASE + 0x2B) -/* Encoder Input Compression Ratio control */ -#define V4L2_CID_MPEG_VIDC_ENC_INPUT_COMPRESSION_RATIO \ - (V4L2_CID_MPEG_VIDC_BASE + 0x2C) -#define V4L2_CID_MPEG_VIDC_METADATA_DEC_QP_METADATA \ - (V4L2_CID_MPEG_VIDC_BASE + 0x2E) + /* Encoder Complexity control */ #define V4L2_CID_MPEG_VIDC_VENC_COMPLEXITY \ - (V4L2_CID_MPEG_VIDC_BASE + 0x2F) + (V4L2_CID_MPEG_VIDC_BASE + 0x2F) + /* Decoder Max Number of Reorder Frames */ #define V4L2_CID_MPEG_VIDC_METADATA_MAX_NUM_REORDER_FRAMES \ - (V4L2_CID_MPEG_VIDC_BASE + 0x30) -/* Control IDs for AV1 */ -#define V4L2_CID_MPEG_VIDEO_AV1_PROFILE (V4L2_CID_MPEG_VIDC_BASE + 0x31) -enum v4l2_mpeg_video_av1_profile { - V4L2_MPEG_VIDEO_AV1_PROFILE_MAIN = 0, - V4L2_MPEG_VIDEO_AV1_PROFILE_HIGH = 1, - V4L2_MPEG_VIDEO_AV1_PROFILE_PROFESSIONAL = 2, -}; - -#define V4L2_CID_MPEG_VIDEO_AV1_LEVEL (V4L2_CID_MPEG_VIDC_BASE + 0x32) -enum v4l2_mpeg_video_av1_level { - V4L2_MPEG_VIDEO_AV1_LEVEL_2_0 = 0, - V4L2_MPEG_VIDEO_AV1_LEVEL_2_1 = 1, - V4L2_MPEG_VIDEO_AV1_LEVEL_2_2 = 2, - V4L2_MPEG_VIDEO_AV1_LEVEL_2_3 = 3, - V4L2_MPEG_VIDEO_AV1_LEVEL_3_0 = 4, - V4L2_MPEG_VIDEO_AV1_LEVEL_3_1 = 5, - V4L2_MPEG_VIDEO_AV1_LEVEL_3_2 = 6, - V4L2_MPEG_VIDEO_AV1_LEVEL_3_3 = 7, - V4L2_MPEG_VIDEO_AV1_LEVEL_4_0 = 8, - V4L2_MPEG_VIDEO_AV1_LEVEL_4_1 = 9, - V4L2_MPEG_VIDEO_AV1_LEVEL_4_2 = 10, - V4L2_MPEG_VIDEO_AV1_LEVEL_4_3 = 11, - V4L2_MPEG_VIDEO_AV1_LEVEL_5_0 = 12, - V4L2_MPEG_VIDEO_AV1_LEVEL_5_1 = 13, - V4L2_MPEG_VIDEO_AV1_LEVEL_5_2 = 14, - V4L2_MPEG_VIDEO_AV1_LEVEL_5_3 = 15, - V4L2_MPEG_VIDEO_AV1_LEVEL_6_0 = 16, - V4L2_MPEG_VIDEO_AV1_LEVEL_6_1 = 17, - V4L2_MPEG_VIDEO_AV1_LEVEL_6_2 = 18, - V4L2_MPEG_VIDEO_AV1_LEVEL_6_3 = 19, - V4L2_MPEG_VIDEO_AV1_LEVEL_7_0 = 20, - V4L2_MPEG_VIDEO_AV1_LEVEL_7_1 = 21, - V4L2_MPEG_VIDEO_AV1_LEVEL_7_2 = 22, - V4L2_MPEG_VIDEO_AV1_LEVEL_7_3 = 23, -}; - -#define V4L2_CID_MPEG_VIDEO_AV1_TIER (V4L2_CID_MPEG_VIDC_BASE + 0x33) -enum v4l2_mpeg_video_av1_tier { - V4L2_MPEG_VIDEO_AV1_TIER_MAIN = 0, - V4L2_MPEG_VIDEO_AV1_TIER_HIGH = 1, -}; -/* Decoder Timestamp Reorder control */ -#define V4L2_CID_MPEG_VIDC_TS_REORDER (V4L2_CID_MPEG_VIDC_BASE + 0x34) -/* AV1 Decoder Film Grain */ -#define V4L2_CID_MPEG_VIDC_AV1D_FILM_GRAIN_PRESENT \ - (V4L2_CID_MPEG_VIDC_BASE + 0x35) -/* Enables Output buffer fence id via input metadata */ -#define V4L2_CID_MPEG_VIDC_METADATA_OUTBUF_FENCE \ - (V4L2_CID_MPEG_VIDC_BASE + 0x38) -/* Control to set fence id to driver in order get corresponding fence fd */ -#define V4L2_CID_MPEG_VIDC_SW_FENCE_ID \ - (V4L2_CID_MPEG_VIDC_BASE + 0x39) -/* - * Control to get fence fd from driver for the fence id - * set via V4L2_CID_MPEG_VIDC_SW_FENCE_ID - */ -#define V4L2_CID_MPEG_VIDC_SW_FENCE_FD \ - (V4L2_CID_MPEG_VIDC_BASE + 0x3A) -#define V4L2_CID_MPEG_VIDC_METADATA_PICTURE_TYPE \ - (V4L2_CID_MPEG_VIDC_BASE + 0x3B) - -/* Encoder Slice Delivery Mode - * set format has a dependency on this control - * and gets invoked when this control is updated. - */ -#define V4L2_CID_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE \ - (V4L2_CID_MPEG_VIDC_BASE + 0x3C) - -#define V4L2_CID_MPEG_VIDC_H264_ENCODE_DELIVERY_MODE \ - (V4L2_CID_MPEG_VIDC_BASE + 0x3D) - -#define V4L2_CID_MPEG_VIDC_CRITICAL_PRIORITY \ - (V4L2_CID_MPEG_VIDC_BASE + 0x3E) -#define V4L2_CID_MPEG_VIDC_RESERVE_DURATION \ - (V4L2_CID_MPEG_VIDC_BASE + 0x3F) - -#define V4L2_CID_MPEG_VIDC_METADATA_DOLBY_RPU \ - (V4L2_CID_MPEG_VIDC_BASE + 0x40) - -#define V4L2_CID_MPEG_VIDC_CLIENT_ID \ - (V4L2_CID_MPEG_VIDC_BASE + 0x41) - -#define V4L2_CID_MPEG_VIDC_LAST_FLAG_EVENT_ENABLE \ - (V4L2_CID_MPEG_VIDC_BASE + 0x42) + (V4L2_CID_MPEG_VIDC_BASE + 0x30) #define V4L2_CID_MPEG_VIDC_VUI_TIMING_INFO \ - (V4L2_CID_MPEG_VIDC_BASE + 0x43) - -#define V4L2_CID_MPEG_VIDC_EARLY_NOTIFY_ENABLE \ - (V4L2_CID_MPEG_VIDC_BASE + 0x44) - -#define V4L2_CID_MPEG_VIDC_EARLY_NOTIFY_LINE_COUNT \ - (V4L2_CID_MPEG_VIDC_BASE + 0x45) - -/* - * This control is introduced to overcome v4l2 limitation - * of allowing only standard colorspace info via s_fmt. - * v4l_sanitize_colorspace() is introduced in s_fmt ioctl - * to reject private colorspace. Through this control, client - * can set private colorspace info and/or use this control - * to set colorspace dynamically. - * The control value is 32 bits packed as: - * [ 0 - 7] : matrix coefficients - * [ 8 - 15] : transfer characteristics - * [16 - 23] : colour primaries - * [24 - 31] : range - * This control is only for encoder. - * Currently g_fmt in v4l2 does not santize colorspace, - * hence this control is not introduced for decoder. - */ -#define V4L2_CID_MPEG_VIDC_SIGNAL_COLOR_INFO \ - (V4L2_CID_MPEG_VIDC_BASE + 0x46) - -/* control to enable csc */ -#define V4L2_CID_MPEG_VIDC_CSC \ - (V4L2_CID_MPEG_VIDC_BASE + 0x47) - -#define V4L2_CID_MPEG_VIDC_DRIVER_VERSION \ - (V4L2_CID_MPEG_VIDC_BASE + 0x48) - -/* vendor controls end */ - -/* vendor events start */ - -/* - * Vendor event structure looks like below (reference videodev2.h) - * struct v4l2_event { - * __u32 type; - * union { - * struct v4l2_event_src_change src_change; - * ... - * / ********** vendor event structure ******** / - * __u8 data[64]; - * } u; - * __u32 pending; - * ... - * } - */ - -/* vendor events end */ + (V4L2_CID_MPEG_VIDC_BASE + 0x43) #endif From 3e0952dacc13c637d0b0b20d5ed2fe158c200f1c Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Fri, 21 Apr 2023 13:32:37 -0700 Subject: [PATCH 0892/1061] video: driver: fix release issue for superbuffer In VP9 superframe usecase one ETB has multiple FBDs, and the EBD is after the first FBD.When driver receives first FBD that is not in DPB_LIST, it releases this buffer. Later on when the EBD arrives with dpb list property and it turns out that first FBD for which release was sent is actually in DPB_LIST, causing FW assertion. To fix this issue, in the reverse path, when handling dpb list property, mark those read only buffers which are not in dpb list as release eligible. Later, in the qbuf path for output buffers, send release for all those buffers which were earlier marked as release eligible. Change-Id: I5d6035b808653478311f41ebe53f60e728c7dd2a Signed-off-by: Darshana Patil --- driver/vidc/inc/msm_vidc_inst.h | 6 ++-- driver/vidc/inc/msm_vidc_internal.h | 2 +- driver/vidc/src/msm_vdec.c | 49 ++++++++++++++++++++++++---- driver/vidc/src/venus_hfi_response.c | 35 ++++++++++++++++++++ 4 files changed, 81 insertions(+), 11 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_inst.h b/driver/vidc/inc/msm_vidc_inst.h index 7491cdfec9..271b08ef15 100644 --- a/driver/vidc/inc/msm_vidc_inst.h +++ b/driver/vidc/inc/msm_vidc_inst.h @@ -102,10 +102,6 @@ struct msm_vidc_inst { struct msm_vidc_mem_list_info mem_info; struct msm_vidc_timestamps timestamps; struct msm_vidc_timestamps ts_reorder; /* list of struct msm_vidc_timestamp */ - bool subscribed_input_psc; - bool subscribed_output_psc; - bool subscribed_input_prop; - bool subscribed_output_prop; struct msm_vidc_subscription_params subcr_params[MAX_PORT]; struct msm_vidc_hfi_frame_info hfi_frame_info; struct msm_vidc_decode_batch decode_batch; @@ -140,6 +136,8 @@ struct msm_vidc_inst { u64 initial_time_us; u32 max_input_data_size; u32 dpb_list_payload[MAX_DPB_LIST_ARRAY_SIZE]; + bool input_dpb_list_enabled; + bool output_dpb_list_enabled; u32 max_map_output_count; u32 auto_framerate; u32 max_rate; diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index bb9519c613..cd77690b92 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -490,6 +490,7 @@ enum msm_vidc_buffer_attributes { MSM_VIDC_ATTR_QUEUED = BIT(3), MSM_VIDC_ATTR_DEQUEUED = BIT(4), MSM_VIDC_ATTR_BUFFER_DONE = BIT(5), + MSM_VIDC_ATTR_RELEASE_ELIGIBLE = BIT(6), }; enum msm_vidc_buffer_region { @@ -817,7 +818,6 @@ struct msm_vidc_subscription_params { u32 tier; u32 av1_film_grain_present; u32 av1_super_block_enabled; - u32 dpb_list_enabled; }; struct msm_vidc_hfi_frame_info { diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 653b1136a7..e6188970ae 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -973,7 +973,7 @@ static int msm_vdec_subscribe_property(struct msm_vidc_inst *inst, } if (subcribe_prop[i] == HFI_PROP_DPB_LIST) { - inst->subcr_params[port].dpb_list_enabled = true; + inst->input_dpb_list_enabled = true; i_vpr_h(inst, "%s: DPB_LIST suscribed on input port", __func__); } } @@ -989,7 +989,7 @@ static int msm_vdec_subscribe_property(struct msm_vidc_inst *inst, } if (subcribe_prop[i] == HFI_PROP_DPB_LIST) { - inst->subcr_params[port].dpb_list_enabled = true; + inst->output_dpb_list_enabled = true; i_vpr_h(inst, "%s: DPB_LIST suscribed on output port", __func__); } } @@ -1951,6 +1951,34 @@ static int msm_vdec_qbuf_batch(struct msm_vidc_inst *inst, return rc; } +static int msm_vdec_release_eligible_buffers(struct msm_vidc_inst *inst) +{ + int rc = 0; + struct msm_vidc_buffer *ro_buf; + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + list_for_each_entry(ro_buf, &inst->buffers.read_only.list, list) { + /* release only release eligible read-only buffers */ + if (!(ro_buf->attr & MSM_VIDC_ATTR_RELEASE_ELIGIBLE)) + continue; + /* skip releasing buffers for which release cmd was already sent */ + if (ro_buf->attr & MSM_VIDC_ATTR_PENDING_RELEASE) + continue; + rc = venus_hfi_release_buffer(inst, ro_buf); + if (rc) + return rc; + ro_buf->attr |= MSM_VIDC_ATTR_PENDING_RELEASE; + ro_buf->attr &= ~MSM_VIDC_ATTR_RELEASE_ELIGIBLE; + print_vidc_buffer(VIDC_LOW, "low ", "release buf", inst, ro_buf); + } + + return rc; +} + static int msm_vdec_release_nonref_buffers(struct msm_vidc_inst *inst) { int rc = 0; @@ -1968,7 +1996,7 @@ static int msm_vdec_release_nonref_buffers(struct msm_vidc_inst *inst) * if DPB_LIST subscribed on output port then driver need to * hold MAX_BPB_COUNT of read only buffer at least. */ - if (!inst->subcr_params[OUTPUT_PORT].dpb_list_enabled) + if (!inst->output_dpb_list_enabled) goto release_buffers; /* count read_only buffers which are not pending release in read_only list */ @@ -2069,8 +2097,17 @@ int msm_vdec_qbuf(struct msm_vidc_inst *inst, struct vb2_buffer *vb2) if (rc) return rc; + /* + * if DPB_LIST property is subscribed on output port, then + * driver needs to hold at least MAX_BPB_COUNT of read only + * buffers. So call msm_vdec_release_nonref_buffers() to handle + * the same. + */ if (vb2->type == OUTPUT_MPLANE) { - rc = msm_vdec_release_nonref_buffers(inst); + if (inst->input_dpb_list_enabled) + rc = msm_vdec_release_eligible_buffers(inst); + else if (inst->output_dpb_list_enabled) + rc = msm_vdec_release_nonref_buffers(inst); if (rc) return rc; } @@ -2743,8 +2780,8 @@ int msm_vdec_inst_init(struct msm_vidc_inst *inst) inst->buffers.output_meta.extra_count = 0; inst->buffers.output_meta.actual_count = 0; inst->buffers.output_meta.size = 0; - inst->subcr_params[INPUT_PORT].dpb_list_enabled = 0; - inst->subcr_params[OUTPUT_PORT].dpb_list_enabled = 0; + inst->input_dpb_list_enabled = false; + inst->output_dpb_list_enabled = false; rc = msm_vdec_codec_change(inst, inst->fmts[INPUT_PORT].fmt.pix_mp.pixelformat); diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index 4f04bda9be..57ea71b0d9 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -1669,6 +1669,9 @@ static int handle_dpb_list_property(struct msm_vidc_inst *inst, u32 payload_size, num_words_in_payload; u8 *payload_start; int i = 0; + struct msm_vidc_buffer *ro_buf; + bool found = false; + u64 device_addr; payload_size = pkt->size - sizeof(struct hfi_packet); num_words_in_payload = payload_size / 4; @@ -1684,6 +1687,12 @@ static int handle_dpb_list_property(struct msm_vidc_inst *inst, } memcpy(inst->dpb_list_payload, payload_start, payload_size); + /* + * dpb_list_payload details: + * payload[0-1] : 64 bits base_address of DPB-1 + * payload[2] : 32 bits addr_offset of DPB-1 + * payload[3] : 32 bits data_offset of DPB-1 + */ for (i = 0; (i + 3) < num_words_in_payload; i = i + 4) { i_vpr_l(inst, "%s: base addr %#x %#x, addr offset %#x, data offset %#x\n", @@ -1691,6 +1700,32 @@ static int handle_dpb_list_property(struct msm_vidc_inst *inst, inst->dpb_list_payload[i + 2], inst->dpb_list_payload[i + 3]); } + list_for_each_entry(ro_buf, &inst->buffers.read_only.list, list) { + found = false; + /* do not mark RELEASE_ELIGIBLE for non-read only buffers */ + if (!(ro_buf->attr & MSM_VIDC_ATTR_READ_ONLY)) + continue; + /* no need to mark RELEASE_ELIGIBLE again */ + if (ro_buf->attr & MSM_VIDC_ATTR_RELEASE_ELIGIBLE) + continue; + /* + * do not add RELEASE_ELIGIBLE to buffers for which driver + * sent release cmd already + */ + if (ro_buf->attr & MSM_VIDC_ATTR_PENDING_RELEASE) + continue; + for (i = 0; (i + 3) < num_words_in_payload; i = i + 4) { + device_addr = *((u64 *)(&inst->dpb_list_payload[i])); + if (ro_buf->device_addr == device_addr) { + found = true; + break; + } + } + /* mark a buffer as RELEASE_ELIGIBLE if not found in dpb list */ + if (!found) + ro_buf->attr |= MSM_VIDC_ATTR_RELEASE_ELIGIBLE; + } + return 0; } From 2160e99d3d69bbfc7f20282ee582a8707c5fd8df Mon Sep 17 00:00:00 2001 From: Ashish Patil Date: Wed, 19 Apr 2023 18:10:11 -0700 Subject: [PATCH 0893/1061] video: driver: adding average banwidth in stats logs average calculation for llcc and ddr bandwidth for 2 seconds window is printed in stats logs Change-Id: I3507a0117c65b723644d00c89c7d466130d4a467 Signed-off-by: Ashish Patil --- driver/vidc/inc/msm_vidc_internal.h | 2 ++ driver/vidc/src/msm_vidc_driver.c | 9 ++++++--- driver/vidc/src/msm_vidc_power.c | 12 ++++++++++++ 3 files changed, 20 insertions(+), 3 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index bb9519c613..56897fa463 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -713,6 +713,8 @@ struct msm_vidc_statistics { struct debug_buf_count count; u64 data_size; u64 time_ms; + u32 avg_bw_llcc; + u32 avg_bw_ddr; }; enum efuse_purpose { diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 0d0d253a57..57664b9a31 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -2691,13 +2691,16 @@ void msm_vidc_print_stats(struct msm_vidc_inst *inst) bitrate_kbps = (inst->stats.data_size * 8 * 1000) / (dt_ms * 1024); i_vpr_hs(inst, - "counts (etb,ebd,ftb,fbd): %u %u %u %u (total %llu %llu %llu %llu), achieved bitrate %lldKbps fps %u/s, frame rate %u, operating rate %u, priority %u, dt %ums\n", + "counts (etb,ebd,ftb,fbd): %u %u %u %u (total %llu %llu %llu %llu), achieved bitrate %lldKbps fps %u/s, frame rate %u, operating rate %u, priority %u, avg bw llcc %ukhz, avb bw ddr %ukhz, dt %ums\n", etb, ebd, ftb, fbd, inst->debug_count.etb, inst->debug_count.ebd, - inst->debug_count.ftb, inst->debug_count.fbd, - bitrate_kbps, achieved_fps, frame_rate, operating_rate, priority, dt_ms); + inst->debug_count.ftb, inst->debug_count.fbd, bitrate_kbps, + achieved_fps, frame_rate, operating_rate, priority, + inst->stats.avg_bw_llcc, inst->stats.avg_bw_ddr, dt_ms); inst->stats.count = inst->debug_count; inst->stats.data_size = 0; + inst->stats.avg_bw_llcc = 0; + inst->stats.avg_bw_ddr = 0; inst->stats.time_ms = time_ms; } diff --git a/driver/vidc/src/msm_vidc_power.c b/driver/vidc/src/msm_vidc_power.c index c27f2246e6..ac62ca7af9 100644 --- a/driver/vidc/src/msm_vidc_power.c +++ b/driver/vidc/src/msm_vidc_power.c @@ -346,6 +346,18 @@ int msm_vidc_scale_buses(struct msm_vidc_inst *inst) inst->power.ddr_bw = vote_data->calc_bw_ddr; inst->power.sys_cache_bw = vote_data->calc_bw_llcc; + if (!inst->stats.avg_bw_llcc) + inst->stats.avg_bw_llcc = inst->power.sys_cache_bw; + else + inst->stats.avg_bw_llcc = + (inst->stats.avg_bw_llcc + inst->power.sys_cache_bw) / 2; + + if (!inst->stats.avg_bw_ddr) + inst->stats.avg_bw_ddr = inst->power.ddr_bw; + else + inst->stats.avg_bw_ddr = + (inst->stats.avg_bw_ddr + inst->power.ddr_bw) / 2; + set_buses: inst->power.power_mode = vote_data->power_mode; rc = msm_vidc_set_buses(inst); From 246d7ad41319f87f053cdde0ed160213e065169a Mon Sep 17 00:00:00 2001 From: Vedang Nagar Date: Wed, 26 Apr 2023 13:38:10 +0530 Subject: [PATCH 0894/1061] video: driver: Compute Average Bitrate only for Queued/Deffered buffers For Decode batching enabled case, max_data_size is being calculated as the average of the data_size for all the buffers. These buffers may contains EBD as well having data_size as 0, which may reduce the average value by significant numbers and hence reducing vsp numbers which may lead to vote clock to low corners. This may lead to slow decoding and hence Framework may drop the frames. Therefore, compute Average data_size only for Queued/Deffered bufs. Change-Id: I12f155852dd750701b9448d3900b75f470eac126 Signed-off-by: Vedang Nagar --- driver/vidc/src/msm_vidc_power.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/driver/vidc/src/msm_vidc_power.c b/driver/vidc/src/msm_vidc_power.c index ac62ca7af9..405e80ae59 100644 --- a/driver/vidc/src/msm_vidc_power.c +++ b/driver/vidc/src/msm_vidc_power.c @@ -588,8 +588,11 @@ int msm_vidc_scale_power(struct msm_vidc_inst *inst, bool scale_buses) */ if (inst->decode_batch.enable) { list_for_each_entry(vbuf, &inst->buffers.input.list, list) { - data_size += vbuf->data_size; - cnt++; + if (vbuf->attr & MSM_VIDC_ATTR_DEFERRED || + vbuf->attr & MSM_VIDC_ATTR_QUEUED) { + data_size += vbuf->data_size; + cnt++; + } } if (cnt) data_size /= cnt; From 6aaa2d38ddfce88835a307b7ea7313e77b4267c3 Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Wed, 26 Apr 2023 17:26:13 -0700 Subject: [PATCH 0895/1061] video: driver: reset pending_release flag When fw sends FBD with release done flag, reset driver pending_release flag. Without this fix, a buffer will wrongly marked as pending_release although release done was already arrived from fw leading to issues when trying to mark buffer as release_eligible or when sending release command to fw. Change-Id: Ib6b9f6233b133442057f3938159f6f0f33fc90f8 Signed-off-by: Darshana Patil --- driver/vidc/src/venus_hfi_response.c | 1 + 1 file changed, 1 insertion(+) diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index 57ea71b0d9..8cf9ba600b 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -1414,6 +1414,7 @@ int handle_release_output_buffer(struct msm_vidc_inst *inst, } buf->attr &= ~MSM_VIDC_ATTR_READ_ONLY; + buf->attr &= ~MSM_VIDC_ATTR_PENDING_RELEASE; print_vidc_buffer(VIDC_LOW, "low ", "release done", inst, buf); return rc; From c7216017e1365a2156fb0a47bfff543b40af2df5 Mon Sep 17 00:00:00 2001 From: Ashish Patil Date: Thu, 27 Apr 2023 12:59:14 -0700 Subject: [PATCH 0896/1061] video: driver: moving private controls to common platform folder Move private controls from each platform source files to common header file Change-Id: I22d8aa7f81919d950eed6b1f4ccd020c803a7ce9 Signed-off-by: Ashish Patil --- .../common/inc/msm_vidc_platform_ext.h | 233 ++++++++++++++++++ driver/platform/kalama/src/msm_vidc_kalama.c | 232 ----------------- .../pineapple/src/msm_vidc_pineapple.c | 232 ----------------- 3 files changed, 233 insertions(+), 464 deletions(-) diff --git a/driver/platform/common/inc/msm_vidc_platform_ext.h b/driver/platform/common/inc/msm_vidc_platform_ext.h index b134938db2..ce49be4cc2 100644 --- a/driver/platform/common/inc/msm_vidc_platform_ext.h +++ b/driver/platform/common/inc/msm_vidc_platform_ext.h @@ -11,6 +11,239 @@ /* HEIC encoder and decoder */ #define V4L2_PIX_FMT_VIDC_HEIC v4l2_fourcc('H', 'E', 'I', 'C') +#define V4L2_META_FMT_VIDC v4l2_fourcc('Q', 'M', 'E', 'T') + +#ifndef V4L2_CID_MPEG_VIDC_SECURE +#define V4L2_CID_MPEG_VIDC_SECURE (V4L2_CID_MPEG_VIDC_BASE + 0x1) +#endif + +#ifndef V4L2_CID_MPEG_VIDC_LOWLATENCY_REQUEST +#define V4L2_CID_MPEG_VIDC_LOWLATENCY_REQUEST (V4L2_CID_MPEG_VIDC_BASE + 0x3) +#endif + +/* FIXme: */ +#define V4L2_CID_MPEG_VIDC_CODEC_CONFIG (V4L2_CID_MPEG_VIDC_BASE + 0x4) +#define V4L2_CID_MPEG_VIDC_FRAME_RATE (V4L2_CID_MPEG_VIDC_BASE + 0x5) +#define V4L2_CID_MPEG_VIDC_OPERATING_RATE (V4L2_CID_MPEG_VIDC_BASE + 0x6) + +#ifndef V4L2_CID_MPEG_VIDC_TIME_DELTA_BASED_RC +#define V4L2_CID_MPEG_VIDC_TIME_DELTA_BASED_RC (V4L2_CID_MPEG_VIDC_BASE + 0xD) +#endif + +/* Encoder quality controls */ +#define V4L2_CID_MPEG_VIDC_CONTENT_ADAPTIVE_CODING \ + (V4L2_CID_MPEG_VIDC_BASE + 0xE) +#define V4L2_CID_MPEG_VIDC_QUALITY_BITRATE_BOOST \ + (V4L2_CID_MPEG_VIDC_BASE + 0xF) +#define V4L2_CID_MPEG_VIDC_VIDEO_BLUR_TYPES \ + (V4L2_CID_MPEG_VIDC_BASE + 0x10) +enum v4l2_mpeg_vidc_blur_types { + VIDC_BLUR_NONE = 0x0, + VIDC_BLUR_EXTERNAL = 0x1, + VIDC_BLUR_ADAPTIVE = 0x2, +}; +/* (blur width) << 16 | (blur height) */ +#define V4L2_CID_MPEG_VIDC_VIDEO_BLUR_RESOLUTION \ + (V4L2_CID_MPEG_VIDC_BASE + 0x11) +/* TODO: jdas: compound control for matrix */ +#define V4L2_CID_MPEG_VIDC_VIDEO_VPE_CSC_CUSTOM_MATRIX \ + (V4L2_CID_MPEG_VIDC_BASE + 0x12) +#define V4L2_CID_MPEG_VIDC_METADATA_LTR_MARK_USE_DETAILS \ + (V4L2_CID_MPEG_VIDC_BASE + 0x13) +#define V4L2_CID_MPEG_VIDC_METADATA_SEQ_HEADER_NAL \ + (V4L2_CID_MPEG_VIDC_BASE + 0x14) +#define V4L2_CID_MPEG_VIDC_METADATA_DPB_LUMA_CHROMA_MISR \ + (V4L2_CID_MPEG_VIDC_BASE + 0x15) +#define V4L2_CID_MPEG_VIDC_METADATA_OPB_LUMA_CHROMA_MISR \ + (V4L2_CID_MPEG_VIDC_BASE + 0x16) +#define V4L2_CID_MPEG_VIDC_METADATA_INTERLACE \ + (V4L2_CID_MPEG_VIDC_BASE + 0x17) +#define V4L2_CID_MPEG_VIDC_METADATA_CONCEALED_MB_COUNT \ + (V4L2_CID_MPEG_VIDC_BASE + 0x18) +#define V4L2_CID_MPEG_VIDC_METADATA_HISTOGRAM_INFO \ + (V4L2_CID_MPEG_VIDC_BASE + 0x19) +#define V4L2_CID_MPEG_VIDC_METADATA_SEI_MASTERING_DISPLAY_COLOUR \ + (V4L2_CID_MPEG_VIDC_BASE + 0x1A) +#define V4L2_CID_MPEG_VIDC_METADATA_SEI_CONTENT_LIGHT_LEVEL \ + (V4L2_CID_MPEG_VIDC_BASE + 0x1B) +#define V4L2_CID_MPEG_VIDC_METADATA_HDR10PLUS \ + (V4L2_CID_MPEG_VIDC_BASE + 0x1C) +#define V4L2_CID_MPEG_VIDC_METADATA_EVA_STATS \ + (V4L2_CID_MPEG_VIDC_BASE + 0x1D) +#define V4L2_CID_MPEG_VIDC_METADATA_BUFFER_TAG \ + (V4L2_CID_MPEG_VIDC_BASE + 0x1E) +#define V4L2_CID_MPEG_VIDC_METADATA_SUBFRAME_OUTPUT \ + (V4L2_CID_MPEG_VIDC_BASE + 0x1F) +#define V4L2_CID_MPEG_VIDC_METADATA_ROI_INFO \ + (V4L2_CID_MPEG_VIDC_BASE + 0x20) +#define V4L2_CID_MPEG_VIDC_METADATA_TIMESTAMP \ + (V4L2_CID_MPEG_VIDC_BASE + 0x21) +#define V4L2_CID_MPEG_VIDC_METADATA_ENC_QP_METADATA \ + (V4L2_CID_MPEG_VIDC_BASE + 0x22) +#define V4L2_CID_MPEG_VIDC_MIN_BITSTREAM_SIZE_OVERWRITE \ + (V4L2_CID_MPEG_VIDC_BASE + 0x23) +#define V4L2_CID_MPEG_VIDC_METADATA_BITSTREAM_RESOLUTION \ + (V4L2_CID_MPEG_VIDC_BASE + 0x24) +#define V4L2_CID_MPEG_VIDC_METADATA_CROP_OFFSETS \ + (V4L2_CID_MPEG_VIDC_BASE + 0x25) +#define V4L2_CID_MPEG_VIDC_METADATA_SALIENCY_INFO \ + (V4L2_CID_MPEG_VIDC_BASE + 0x26) +#define V4L2_CID_MPEG_VIDC_METADATA_TRANSCODE_STAT_INFO \ + (V4L2_CID_MPEG_VIDC_BASE + 0x27) + +/* Encoder Super frame control */ +#define V4L2_CID_MPEG_VIDC_SUPERFRAME (V4L2_CID_MPEG_VIDC_BASE + 0x28) +/* Thumbnail Mode control */ +#define V4L2_CID_MPEG_VIDC_THUMBNAIL_MODE (V4L2_CID_MPEG_VIDC_BASE + 0x29) + +/* Priority control */ +#ifndef V4L2_CID_MPEG_VIDC_PRIORITY +#define V4L2_CID_MPEG_VIDC_PRIORITY (V4L2_CID_MPEG_VIDC_BASE + 0x2A) +#endif + +/* Metadata DPB Tag List*/ +#define V4L2_CID_MPEG_VIDC_METADATA_DPB_TAG_LIST \ + (V4L2_CID_MPEG_VIDC_BASE + 0x2B) +/* Encoder Input Compression Ratio control */ +#define V4L2_CID_MPEG_VIDC_ENC_INPUT_COMPRESSION_RATIO \ + (V4L2_CID_MPEG_VIDC_BASE + 0x2C) +#define V4L2_CID_MPEG_VIDC_METADATA_DEC_QP_METADATA \ + (V4L2_CID_MPEG_VIDC_BASE + 0x2E) + +/* Encoder Complexity control */ +#ifndef V4L2_CID_MPEG_VIDC_VENC_COMPLEXITY +#define V4L2_CID_MPEG_VIDC_VENC_COMPLEXITY \ + (V4L2_CID_MPEG_VIDC_BASE + 0x2F) +#endif + +/* Decoder Max Number of Reorder Frames */ +#ifndef V4L2_CID_MPEG_VIDC_METADATA_MAX_NUM_REORDER_FRAMES +#define V4L2_CID_MPEG_VIDC_METADATA_MAX_NUM_REORDER_FRAMES \ + (V4L2_CID_MPEG_VIDC_BASE + 0x30) +#endif + +/* Control IDs for AV1 */ +#define V4L2_CID_MPEG_VIDC_AV1_PROFILE (V4L2_CID_MPEG_VIDC_BASE + 0x31) +enum v4l2_mpeg_vidc_av1_profile { + V4L2_MPEG_VIDC_AV1_PROFILE_MAIN = 0, + V4L2_MPEG_VIDC_AV1_PROFILE_HIGH = 1, + V4L2_MPEG_VIDC_AV1_PROFILE_PROFESSIONAL = 2, +}; + +#define V4L2_CID_MPEG_VIDC_AV1_LEVEL (V4L2_CID_MPEG_VIDC_BASE + 0x32) +enum v4l2_mpeg_vidc_av1_level { + V4L2_MPEG_VIDC_AV1_LEVEL_2_0 = 0, + V4L2_MPEG_VIDC_AV1_LEVEL_2_1 = 1, + V4L2_MPEG_VIDC_AV1_LEVEL_2_2 = 2, + V4L2_MPEG_VIDC_AV1_LEVEL_2_3 = 3, + V4L2_MPEG_VIDC_AV1_LEVEL_3_0 = 4, + V4L2_MPEG_VIDC_AV1_LEVEL_3_1 = 5, + V4L2_MPEG_VIDC_AV1_LEVEL_3_2 = 6, + V4L2_MPEG_VIDC_AV1_LEVEL_3_3 = 7, + V4L2_MPEG_VIDC_AV1_LEVEL_4_0 = 8, + V4L2_MPEG_VIDC_AV1_LEVEL_4_1 = 9, + V4L2_MPEG_VIDC_AV1_LEVEL_4_2 = 10, + V4L2_MPEG_VIDC_AV1_LEVEL_4_3 = 11, + V4L2_MPEG_VIDC_AV1_LEVEL_5_0 = 12, + V4L2_MPEG_VIDC_AV1_LEVEL_5_1 = 13, + V4L2_MPEG_VIDC_AV1_LEVEL_5_2 = 14, + V4L2_MPEG_VIDC_AV1_LEVEL_5_3 = 15, + V4L2_MPEG_VIDC_AV1_LEVEL_6_0 = 16, + V4L2_MPEG_VIDC_AV1_LEVEL_6_1 = 17, + V4L2_MPEG_VIDC_AV1_LEVEL_6_2 = 18, + V4L2_MPEG_VIDC_AV1_LEVEL_6_3 = 19, + V4L2_MPEG_VIDC_AV1_LEVEL_7_0 = 20, + V4L2_MPEG_VIDC_AV1_LEVEL_7_1 = 21, + V4L2_MPEG_VIDC_AV1_LEVEL_7_2 = 22, + V4L2_MPEG_VIDC_AV1_LEVEL_7_3 = 23, +}; + +#define V4L2_CID_MPEG_VIDC_AV1_TIER (V4L2_CID_MPEG_VIDC_BASE + 0x33) +enum v4l2_mpeg_vidc_av1_tier { + V4L2_MPEG_VIDC_AV1_TIER_MAIN = 0, + V4L2_MPEG_VIDC_AV1_TIER_HIGH = 1, +}; +/* Decoder Timestamp Reorder control */ +#define V4L2_CID_MPEG_VIDC_TS_REORDER (V4L2_CID_MPEG_VIDC_BASE + 0x34) +/* AV1 Decoder Film Grain */ +#define V4L2_CID_MPEG_VIDC_AV1D_FILM_GRAIN_PRESENT \ + (V4L2_CID_MPEG_VIDC_BASE + 0x35) +/* Enables Output buffer fence id via input metadata */ +#define V4L2_CID_MPEG_VIDC_METADATA_OUTBUF_FENCE \ + (V4L2_CID_MPEG_VIDC_BASE + 0x38) +/* Control to set fence id to driver in order get corresponding fence fd */ +#define V4L2_CID_MPEG_VIDC_SW_FENCE_ID \ + (V4L2_CID_MPEG_VIDC_BASE + 0x39) +/* + * Control to get fence fd from driver for the fence id + * set via V4L2_CID_MPEG_VIDC_SW_FENCE_ID + */ +#define V4L2_CID_MPEG_VIDC_SW_FENCE_FD \ + (V4L2_CID_MPEG_VIDC_BASE + 0x3A) +#define V4L2_CID_MPEG_VIDC_METADATA_PICTURE_TYPE \ + (V4L2_CID_MPEG_VIDC_BASE + 0x3B) + +/* Encoder Slice Delivery Mode + * set format has a dependency on this control + * and gets invoked when this control is updated. + */ +#define V4L2_CID_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE \ + (V4L2_CID_MPEG_VIDC_BASE + 0x3C) + +#define V4L2_CID_MPEG_VIDC_H264_ENCODE_DELIVERY_MODE \ + (V4L2_CID_MPEG_VIDC_BASE + 0x3D) + +#define V4L2_CID_MPEG_VIDC_CRITICAL_PRIORITY \ + (V4L2_CID_MPEG_VIDC_BASE + 0x3E) +#define V4L2_CID_MPEG_VIDC_RESERVE_DURATION \ + (V4L2_CID_MPEG_VIDC_BASE + 0x3F) + +#define V4L2_CID_MPEG_VIDC_METADATA_DOLBY_RPU \ + (V4L2_CID_MPEG_VIDC_BASE + 0x40) + +#define V4L2_CID_MPEG_VIDC_CLIENT_ID \ + (V4L2_CID_MPEG_VIDC_BASE + 0x41) + +#define V4L2_CID_MPEG_VIDC_LAST_FLAG_EVENT_ENABLE \ + (V4L2_CID_MPEG_VIDC_BASE + 0x42) + +#ifndef V4L2_CID_MPEG_VIDC_VUI_TIMING_INFO +#define V4L2_CID_MPEG_VIDC_VUI_TIMING_INFO \ + (V4L2_CID_MPEG_VIDC_BASE + 0x43) +#endif + +#define V4L2_CID_MPEG_VIDC_EARLY_NOTIFY_ENABLE \ + (V4L2_CID_MPEG_VIDC_BASE + 0x44) + +#define V4L2_CID_MPEG_VIDC_EARLY_NOTIFY_LINE_COUNT \ + (V4L2_CID_MPEG_VIDC_BASE + 0x45) + +/* + * This control is introduced to overcome v4l2 limitation + * of allowing only standard colorspace info via s_fmt. + * v4l_sanitize_colorspace() is introduced in s_fmt ioctl + * to reject private colorspace. Through this control, client + * can set private colorspace info and/or use this control + * to set colorspace dynamically. + * The control value is 32 bits packed as: + * [ 0 - 7] : matrix coefficients + * [ 8 - 15] : transfer characteristics + * [16 - 23] : colour primaries + * [24 - 31] : range + * This control is only for encoder. + * Currently g_fmt in v4l2 does not santize colorspace, + * hence this control is not introduced for decoder. + */ +#define V4L2_CID_MPEG_VIDC_SIGNAL_COLOR_INFO \ + (V4L2_CID_MPEG_VIDC_BASE + 0x46) + +/* control to enable csc */ +#define V4L2_CID_MPEG_VIDC_CSC \ + (V4L2_CID_MPEG_VIDC_BASE + 0x47) + +#define V4L2_CID_MPEG_VIDC_DRIVER_VERSION \ + (V4L2_CID_MPEG_VIDC_BASE + 0x48) + int msm_vidc_adjust_ir_period(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_dec_frame_rate(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_dec_operating_rate(void *instance, struct v4l2_ctrl *ctrl); diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index 047acab099..4e20acc3a5 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -22,238 +22,6 @@ #include "hfi_property.h" #include "hfi_command.h" -#define V4L2_META_FMT_VIDC v4l2_fourcc('Q', 'M', 'E', 'T') - -#ifndef V4L2_CID_MPEG_VIDC_SECURE -#define V4L2_CID_MPEG_VIDC_SECURE (V4L2_CID_MPEG_VIDC_BASE + 0x1) -#endif - -#ifndef V4L2_CID_MPEG_VIDC_LOWLATENCY_REQUEST -#define V4L2_CID_MPEG_VIDC_LOWLATENCY_REQUEST (V4L2_CID_MPEG_VIDC_BASE + 0x3) -#endif - -/* FIXme: */ -#define V4L2_CID_MPEG_VIDC_CODEC_CONFIG (V4L2_CID_MPEG_VIDC_BASE + 0x4) -#define V4L2_CID_MPEG_VIDC_FRAME_RATE (V4L2_CID_MPEG_VIDC_BASE + 0x5) -#define V4L2_CID_MPEG_VIDC_OPERATING_RATE (V4L2_CID_MPEG_VIDC_BASE + 0x6) - -#ifndef V4L2_CID_MPEG_VIDC_TIME_DELTA_BASED_RC -#define V4L2_CID_MPEG_VIDC_TIME_DELTA_BASED_RC (V4L2_CID_MPEG_VIDC_BASE + 0xD) -#endif - -/* Encoder quality controls */ -#define V4L2_CID_MPEG_VIDC_CONTENT_ADAPTIVE_CODING \ - (V4L2_CID_MPEG_VIDC_BASE + 0xE) -#define V4L2_CID_MPEG_VIDC_QUALITY_BITRATE_BOOST \ - (V4L2_CID_MPEG_VIDC_BASE + 0xF) -#define V4L2_CID_MPEG_VIDC_VIDEO_BLUR_TYPES \ - (V4L2_CID_MPEG_VIDC_BASE + 0x10) -enum v4l2_mpeg_vidc_blur_types { - VIDC_BLUR_NONE = 0x0, - VIDC_BLUR_EXTERNAL = 0x1, - VIDC_BLUR_ADAPTIVE = 0x2, -}; -/* (blur width) << 16 | (blur height) */ -#define V4L2_CID_MPEG_VIDC_VIDEO_BLUR_RESOLUTION \ - (V4L2_CID_MPEG_VIDC_BASE + 0x11) -/* TODO: jdas: compound control for matrix */ -#define V4L2_CID_MPEG_VIDC_VIDEO_VPE_CSC_CUSTOM_MATRIX \ - (V4L2_CID_MPEG_VIDC_BASE + 0x12) -#define V4L2_CID_MPEG_VIDC_METADATA_LTR_MARK_USE_DETAILS \ - (V4L2_CID_MPEG_VIDC_BASE + 0x13) -#define V4L2_CID_MPEG_VIDC_METADATA_SEQ_HEADER_NAL \ - (V4L2_CID_MPEG_VIDC_BASE + 0x14) -#define V4L2_CID_MPEG_VIDC_METADATA_DPB_LUMA_CHROMA_MISR \ - (V4L2_CID_MPEG_VIDC_BASE + 0x15) -#define V4L2_CID_MPEG_VIDC_METADATA_OPB_LUMA_CHROMA_MISR \ - (V4L2_CID_MPEG_VIDC_BASE + 0x16) -#define V4L2_CID_MPEG_VIDC_METADATA_INTERLACE \ - (V4L2_CID_MPEG_VIDC_BASE + 0x17) -#define V4L2_CID_MPEG_VIDC_METADATA_CONCEALED_MB_COUNT \ - (V4L2_CID_MPEG_VIDC_BASE + 0x18) -#define V4L2_CID_MPEG_VIDC_METADATA_HISTOGRAM_INFO \ - (V4L2_CID_MPEG_VIDC_BASE + 0x19) -#define V4L2_CID_MPEG_VIDC_METADATA_SEI_MASTERING_DISPLAY_COLOUR \ - (V4L2_CID_MPEG_VIDC_BASE + 0x1A) -#define V4L2_CID_MPEG_VIDC_METADATA_SEI_CONTENT_LIGHT_LEVEL \ - (V4L2_CID_MPEG_VIDC_BASE + 0x1B) -#define V4L2_CID_MPEG_VIDC_METADATA_HDR10PLUS \ - (V4L2_CID_MPEG_VIDC_BASE + 0x1C) -#define V4L2_CID_MPEG_VIDC_METADATA_EVA_STATS \ - (V4L2_CID_MPEG_VIDC_BASE + 0x1D) -#define V4L2_CID_MPEG_VIDC_METADATA_BUFFER_TAG \ - (V4L2_CID_MPEG_VIDC_BASE + 0x1E) -#define V4L2_CID_MPEG_VIDC_METADATA_SUBFRAME_OUTPUT \ - (V4L2_CID_MPEG_VIDC_BASE + 0x1F) -#define V4L2_CID_MPEG_VIDC_METADATA_ROI_INFO \ - (V4L2_CID_MPEG_VIDC_BASE + 0x20) -#define V4L2_CID_MPEG_VIDC_METADATA_TIMESTAMP \ - (V4L2_CID_MPEG_VIDC_BASE + 0x21) -#define V4L2_CID_MPEG_VIDC_METADATA_ENC_QP_METADATA \ - (V4L2_CID_MPEG_VIDC_BASE + 0x22) -#define V4L2_CID_MPEG_VIDC_MIN_BITSTREAM_SIZE_OVERWRITE \ - (V4L2_CID_MPEG_VIDC_BASE + 0x23) -#define V4L2_CID_MPEG_VIDC_METADATA_BITSTREAM_RESOLUTION \ - (V4L2_CID_MPEG_VIDC_BASE + 0x24) -#define V4L2_CID_MPEG_VIDC_METADATA_CROP_OFFSETS \ - (V4L2_CID_MPEG_VIDC_BASE + 0x25) -#define V4L2_CID_MPEG_VIDC_METADATA_SALIENCY_INFO \ - (V4L2_CID_MPEG_VIDC_BASE + 0x26) -#define V4L2_CID_MPEG_VIDC_METADATA_TRANSCODE_STAT_INFO \ - (V4L2_CID_MPEG_VIDC_BASE + 0x27) - -/* Encoder Super frame control */ -#define V4L2_CID_MPEG_VIDC_SUPERFRAME (V4L2_CID_MPEG_VIDC_BASE + 0x28) -/* Thumbnail Mode control */ -#define V4L2_CID_MPEG_VIDC_THUMBNAIL_MODE (V4L2_CID_MPEG_VIDC_BASE + 0x29) - -/* Priority control */ -#ifndef V4L2_CID_MPEG_VIDC_PRIORITY -#define V4L2_CID_MPEG_VIDC_PRIORITY (V4L2_CID_MPEG_VIDC_BASE + 0x2A) -#endif - -/* Metadata DPB Tag List*/ -#define V4L2_CID_MPEG_VIDC_METADATA_DPB_TAG_LIST \ - (V4L2_CID_MPEG_VIDC_BASE + 0x2B) -/* Encoder Input Compression Ratio control */ -#define V4L2_CID_MPEG_VIDC_ENC_INPUT_COMPRESSION_RATIO \ - (V4L2_CID_MPEG_VIDC_BASE + 0x2C) -#define V4L2_CID_MPEG_VIDC_METADATA_DEC_QP_METADATA \ - (V4L2_CID_MPEG_VIDC_BASE + 0x2E) - -/* Encoder Complexity control */ -#ifndef V4L2_CID_MPEG_VIDC_VENC_COMPLEXITY -#define V4L2_CID_MPEG_VIDC_VENC_COMPLEXITY \ - (V4L2_CID_MPEG_VIDC_BASE + 0x2F) -#endif - -/* Decoder Max Number of Reorder Frames */ -#ifndef V4L2_CID_MPEG_VIDC_METADATA_MAX_NUM_REORDER_FRAMES -#define V4L2_CID_MPEG_VIDC_METADATA_MAX_NUM_REORDER_FRAMES \ - (V4L2_CID_MPEG_VIDC_BASE + 0x30) -#endif - -/* Control IDs for AV1 */ -#define V4L2_CID_MPEG_VIDC_AV1_PROFILE (V4L2_CID_MPEG_VIDC_BASE + 0x31) -enum v4l2_mpeg_vidc_av1_profile { - V4L2_MPEG_VIDC_AV1_PROFILE_MAIN = 0, - V4L2_MPEG_VIDC_AV1_PROFILE_HIGH = 1, - V4L2_MPEG_VIDC_AV1_PROFILE_PROFESSIONAL = 2, -}; - -#define V4L2_CID_MPEG_VIDC_AV1_LEVEL (V4L2_CID_MPEG_VIDC_BASE + 0x32) -enum v4l2_mpeg_vidc_av1_level { - V4L2_MPEG_VIDC_AV1_LEVEL_2_0 = 0, - V4L2_MPEG_VIDC_AV1_LEVEL_2_1 = 1, - V4L2_MPEG_VIDC_AV1_LEVEL_2_2 = 2, - V4L2_MPEG_VIDC_AV1_LEVEL_2_3 = 3, - V4L2_MPEG_VIDC_AV1_LEVEL_3_0 = 4, - V4L2_MPEG_VIDC_AV1_LEVEL_3_1 = 5, - V4L2_MPEG_VIDC_AV1_LEVEL_3_2 = 6, - V4L2_MPEG_VIDC_AV1_LEVEL_3_3 = 7, - V4L2_MPEG_VIDC_AV1_LEVEL_4_0 = 8, - V4L2_MPEG_VIDC_AV1_LEVEL_4_1 = 9, - V4L2_MPEG_VIDC_AV1_LEVEL_4_2 = 10, - V4L2_MPEG_VIDC_AV1_LEVEL_4_3 = 11, - V4L2_MPEG_VIDC_AV1_LEVEL_5_0 = 12, - V4L2_MPEG_VIDC_AV1_LEVEL_5_1 = 13, - V4L2_MPEG_VIDC_AV1_LEVEL_5_2 = 14, - V4L2_MPEG_VIDC_AV1_LEVEL_5_3 = 15, - V4L2_MPEG_VIDC_AV1_LEVEL_6_0 = 16, - V4L2_MPEG_VIDC_AV1_LEVEL_6_1 = 17, - V4L2_MPEG_VIDC_AV1_LEVEL_6_2 = 18, - V4L2_MPEG_VIDC_AV1_LEVEL_6_3 = 19, - V4L2_MPEG_VIDC_AV1_LEVEL_7_0 = 20, - V4L2_MPEG_VIDC_AV1_LEVEL_7_1 = 21, - V4L2_MPEG_VIDC_AV1_LEVEL_7_2 = 22, - V4L2_MPEG_VIDC_AV1_LEVEL_7_3 = 23, -}; - -#define V4L2_CID_MPEG_VIDC_AV1_TIER (V4L2_CID_MPEG_VIDC_BASE + 0x33) -enum v4l2_mpeg_vidc_av1_tier { - V4L2_MPEG_VIDC_AV1_TIER_MAIN = 0, - V4L2_MPEG_VIDC_AV1_TIER_HIGH = 1, -}; -/* Decoder Timestamp Reorder control */ -#define V4L2_CID_MPEG_VIDC_TS_REORDER (V4L2_CID_MPEG_VIDC_BASE + 0x34) -/* AV1 Decoder Film Grain */ -#define V4L2_CID_MPEG_VIDC_AV1D_FILM_GRAIN_PRESENT \ - (V4L2_CID_MPEG_VIDC_BASE + 0x35) -/* Enables Output buffer fence id via input metadata */ -#define V4L2_CID_MPEG_VIDC_METADATA_OUTBUF_FENCE \ - (V4L2_CID_MPEG_VIDC_BASE + 0x38) -/* Control to set fence id to driver in order get corresponding fence fd */ -#define V4L2_CID_MPEG_VIDC_SW_FENCE_ID \ - (V4L2_CID_MPEG_VIDC_BASE + 0x39) -/* - * Control to get fence fd from driver for the fence id - * set via V4L2_CID_MPEG_VIDC_SW_FENCE_ID - */ -#define V4L2_CID_MPEG_VIDC_SW_FENCE_FD \ - (V4L2_CID_MPEG_VIDC_BASE + 0x3A) -#define V4L2_CID_MPEG_VIDC_METADATA_PICTURE_TYPE \ - (V4L2_CID_MPEG_VIDC_BASE + 0x3B) - -/* Encoder Slice Delivery Mode - * set format has a dependency on this control - * and gets invoked when this control is updated. - */ -#define V4L2_CID_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE \ - (V4L2_CID_MPEG_VIDC_BASE + 0x3C) - -#define V4L2_CID_MPEG_VIDC_H264_ENCODE_DELIVERY_MODE \ - (V4L2_CID_MPEG_VIDC_BASE + 0x3D) - -#define V4L2_CID_MPEG_VIDC_CRITICAL_PRIORITY \ - (V4L2_CID_MPEG_VIDC_BASE + 0x3E) -#define V4L2_CID_MPEG_VIDC_RESERVE_DURATION \ - (V4L2_CID_MPEG_VIDC_BASE + 0x3F) - -#define V4L2_CID_MPEG_VIDC_METADATA_DOLBY_RPU \ - (V4L2_CID_MPEG_VIDC_BASE + 0x40) - -#define V4L2_CID_MPEG_VIDC_CLIENT_ID \ - (V4L2_CID_MPEG_VIDC_BASE + 0x41) - -#define V4L2_CID_MPEG_VIDC_LAST_FLAG_EVENT_ENABLE \ - (V4L2_CID_MPEG_VIDC_BASE + 0x42) - -#ifndef V4L2_CID_MPEG_VIDC_VUI_TIMING_INFO -#define V4L2_CID_MPEG_VIDC_VUI_TIMING_INFO \ - (V4L2_CID_MPEG_VIDC_BASE + 0x43) -#endif - -#define V4L2_CID_MPEG_VIDC_EARLY_NOTIFY_ENABLE \ - (V4L2_CID_MPEG_VIDC_BASE + 0x44) - -#define V4L2_CID_MPEG_VIDC_EARLY_NOTIFY_LINE_COUNT \ - (V4L2_CID_MPEG_VIDC_BASE + 0x45) - -/* - * This control is introduced to overcome v4l2 limitation - * of allowing only standard colorspace info via s_fmt. - * v4l_sanitize_colorspace() is introduced in s_fmt ioctl - * to reject private colorspace. Through this control, client - * can set private colorspace info and/or use this control - * to set colorspace dynamically. - * The control value is 32 bits packed as: - * [ 0 - 7] : matrix coefficients - * [ 8 - 15] : transfer characteristics - * [16 - 23] : colour primaries - * [24 - 31] : range - * This control is only for encoder. - * Currently g_fmt in v4l2 does not santize colorspace, - * hence this control is not introduced for decoder. - */ -#define V4L2_CID_MPEG_VIDC_SIGNAL_COLOR_INFO \ - (V4L2_CID_MPEG_VIDC_BASE + 0x46) - -/* control to enable csc */ -#define V4L2_CID_MPEG_VIDC_CSC \ - (V4L2_CID_MPEG_VIDC_BASE + 0x47) - -#define V4L2_CID_MPEG_VIDC_DRIVER_VERSION \ - (V4L2_CID_MPEG_VIDC_BASE + 0x48) /* version: major[24:31], minor[16:23], revision[0:15] */ #define DRIVER_VERSION 0x04000000 diff --git a/driver/platform/pineapple/src/msm_vidc_pineapple.c b/driver/platform/pineapple/src/msm_vidc_pineapple.c index 55e81b45e1..a222815338 100644 --- a/driver/platform/pineapple/src/msm_vidc_pineapple.c +++ b/driver/platform/pineapple/src/msm_vidc_pineapple.c @@ -24,238 +24,6 @@ #include "hfi_command.h" #include "venus_hfi.h" -#define V4L2_META_FMT_VIDC v4l2_fourcc('Q', 'M', 'E', 'T') - -#ifndef V4L2_CID_MPEG_VIDC_SECURE -#define V4L2_CID_MPEG_VIDC_SECURE (V4L2_CID_MPEG_VIDC_BASE + 0x1) -#endif - -#ifndef V4L2_CID_MPEG_VIDC_LOWLATENCY_REQUEST -#define V4L2_CID_MPEG_VIDC_LOWLATENCY_REQUEST (V4L2_CID_MPEG_VIDC_BASE + 0x3) -#endif - -/* FIXme: */ -#define V4L2_CID_MPEG_VIDC_CODEC_CONFIG (V4L2_CID_MPEG_VIDC_BASE + 0x4) -#define V4L2_CID_MPEG_VIDC_FRAME_RATE (V4L2_CID_MPEG_VIDC_BASE + 0x5) -#define V4L2_CID_MPEG_VIDC_OPERATING_RATE (V4L2_CID_MPEG_VIDC_BASE + 0x6) - -#ifndef V4L2_CID_MPEG_VIDC_TIME_DELTA_BASED_RC -#define V4L2_CID_MPEG_VIDC_TIME_DELTA_BASED_RC (V4L2_CID_MPEG_VIDC_BASE + 0xD) -#endif - -/* Encoder quality controls */ -#define V4L2_CID_MPEG_VIDC_CONTENT_ADAPTIVE_CODING \ - (V4L2_CID_MPEG_VIDC_BASE + 0xE) -#define V4L2_CID_MPEG_VIDC_QUALITY_BITRATE_BOOST \ - (V4L2_CID_MPEG_VIDC_BASE + 0xF) -#define V4L2_CID_MPEG_VIDC_VIDEO_BLUR_TYPES \ - (V4L2_CID_MPEG_VIDC_BASE + 0x10) -enum v4l2_mpeg_vidc_blur_types { - VIDC_BLUR_NONE = 0x0, - VIDC_BLUR_EXTERNAL = 0x1, - VIDC_BLUR_ADAPTIVE = 0x2, -}; -/* (blur width) << 16 | (blur height) */ -#define V4L2_CID_MPEG_VIDC_VIDEO_BLUR_RESOLUTION \ - (V4L2_CID_MPEG_VIDC_BASE + 0x11) -/* TODO: jdas: compound control for matrix */ -#define V4L2_CID_MPEG_VIDC_VIDEO_VPE_CSC_CUSTOM_MATRIX \ - (V4L2_CID_MPEG_VIDC_BASE + 0x12) -#define V4L2_CID_MPEG_VIDC_METADATA_LTR_MARK_USE_DETAILS \ - (V4L2_CID_MPEG_VIDC_BASE + 0x13) -#define V4L2_CID_MPEG_VIDC_METADATA_SEQ_HEADER_NAL \ - (V4L2_CID_MPEG_VIDC_BASE + 0x14) -#define V4L2_CID_MPEG_VIDC_METADATA_DPB_LUMA_CHROMA_MISR \ - (V4L2_CID_MPEG_VIDC_BASE + 0x15) -#define V4L2_CID_MPEG_VIDC_METADATA_OPB_LUMA_CHROMA_MISR \ - (V4L2_CID_MPEG_VIDC_BASE + 0x16) -#define V4L2_CID_MPEG_VIDC_METADATA_INTERLACE \ - (V4L2_CID_MPEG_VIDC_BASE + 0x17) -#define V4L2_CID_MPEG_VIDC_METADATA_CONCEALED_MB_COUNT \ - (V4L2_CID_MPEG_VIDC_BASE + 0x18) -#define V4L2_CID_MPEG_VIDC_METADATA_HISTOGRAM_INFO \ - (V4L2_CID_MPEG_VIDC_BASE + 0x19) -#define V4L2_CID_MPEG_VIDC_METADATA_SEI_MASTERING_DISPLAY_COLOUR \ - (V4L2_CID_MPEG_VIDC_BASE + 0x1A) -#define V4L2_CID_MPEG_VIDC_METADATA_SEI_CONTENT_LIGHT_LEVEL \ - (V4L2_CID_MPEG_VIDC_BASE + 0x1B) -#define V4L2_CID_MPEG_VIDC_METADATA_HDR10PLUS \ - (V4L2_CID_MPEG_VIDC_BASE + 0x1C) -#define V4L2_CID_MPEG_VIDC_METADATA_EVA_STATS \ - (V4L2_CID_MPEG_VIDC_BASE + 0x1D) -#define V4L2_CID_MPEG_VIDC_METADATA_BUFFER_TAG \ - (V4L2_CID_MPEG_VIDC_BASE + 0x1E) -#define V4L2_CID_MPEG_VIDC_METADATA_SUBFRAME_OUTPUT \ - (V4L2_CID_MPEG_VIDC_BASE + 0x1F) -#define V4L2_CID_MPEG_VIDC_METADATA_ROI_INFO \ - (V4L2_CID_MPEG_VIDC_BASE + 0x20) -#define V4L2_CID_MPEG_VIDC_METADATA_TIMESTAMP \ - (V4L2_CID_MPEG_VIDC_BASE + 0x21) -#define V4L2_CID_MPEG_VIDC_METADATA_ENC_QP_METADATA \ - (V4L2_CID_MPEG_VIDC_BASE + 0x22) -#define V4L2_CID_MPEG_VIDC_MIN_BITSTREAM_SIZE_OVERWRITE \ - (V4L2_CID_MPEG_VIDC_BASE + 0x23) -#define V4L2_CID_MPEG_VIDC_METADATA_BITSTREAM_RESOLUTION \ - (V4L2_CID_MPEG_VIDC_BASE + 0x24) -#define V4L2_CID_MPEG_VIDC_METADATA_CROP_OFFSETS \ - (V4L2_CID_MPEG_VIDC_BASE + 0x25) -#define V4L2_CID_MPEG_VIDC_METADATA_SALIENCY_INFO \ - (V4L2_CID_MPEG_VIDC_BASE + 0x26) -#define V4L2_CID_MPEG_VIDC_METADATA_TRANSCODE_STAT_INFO \ - (V4L2_CID_MPEG_VIDC_BASE + 0x27) - -/* Encoder Super frame control */ -#define V4L2_CID_MPEG_VIDC_SUPERFRAME (V4L2_CID_MPEG_VIDC_BASE + 0x28) -/* Thumbnail Mode control */ -#define V4L2_CID_MPEG_VIDC_THUMBNAIL_MODE (V4L2_CID_MPEG_VIDC_BASE + 0x29) - -/* Priority control */ -#ifndef V4L2_CID_MPEG_VIDC_PRIORITY -#define V4L2_CID_MPEG_VIDC_PRIORITY (V4L2_CID_MPEG_VIDC_BASE + 0x2A) -#endif - -/* Metadata DPB Tag List*/ -#define V4L2_CID_MPEG_VIDC_METADATA_DPB_TAG_LIST \ - (V4L2_CID_MPEG_VIDC_BASE + 0x2B) -/* Encoder Input Compression Ratio control */ -#define V4L2_CID_MPEG_VIDC_ENC_INPUT_COMPRESSION_RATIO \ - (V4L2_CID_MPEG_VIDC_BASE + 0x2C) -#define V4L2_CID_MPEG_VIDC_METADATA_DEC_QP_METADATA \ - (V4L2_CID_MPEG_VIDC_BASE + 0x2E) - -/* Encoder Complexity control */ -#ifndef V4L2_CID_MPEG_VIDC_VENC_COMPLEXITY -#define V4L2_CID_MPEG_VIDC_VENC_COMPLEXITY \ - (V4L2_CID_MPEG_VIDC_BASE + 0x2F) -#endif - -/* Decoder Max Number of Reorder Frames */ -#ifndef V4L2_CID_MPEG_VIDC_METADATA_MAX_NUM_REORDER_FRAMES -#define V4L2_CID_MPEG_VIDC_METADATA_MAX_NUM_REORDER_FRAMES \ - (V4L2_CID_MPEG_VIDC_BASE + 0x30) -#endif - -/* Control IDs for AV1 */ -#define V4L2_CID_MPEG_VIDC_AV1_PROFILE (V4L2_CID_MPEG_VIDC_BASE + 0x31) -enum v4l2_mpeg_vidc_av1_profile { - V4L2_MPEG_VIDC_AV1_PROFILE_MAIN = 0, - V4L2_MPEG_VIDC_AV1_PROFILE_HIGH = 1, - V4L2_MPEG_VIDC_AV1_PROFILE_PROFESSIONAL = 2, -}; - -#define V4L2_CID_MPEG_VIDC_AV1_LEVEL (V4L2_CID_MPEG_VIDC_BASE + 0x32) -enum v4l2_mpeg_vidc_av1_level { - V4L2_MPEG_VIDC_AV1_LEVEL_2_0 = 0, - V4L2_MPEG_VIDC_AV1_LEVEL_2_1 = 1, - V4L2_MPEG_VIDC_AV1_LEVEL_2_2 = 2, - V4L2_MPEG_VIDC_AV1_LEVEL_2_3 = 3, - V4L2_MPEG_VIDC_AV1_LEVEL_3_0 = 4, - V4L2_MPEG_VIDC_AV1_LEVEL_3_1 = 5, - V4L2_MPEG_VIDC_AV1_LEVEL_3_2 = 6, - V4L2_MPEG_VIDC_AV1_LEVEL_3_3 = 7, - V4L2_MPEG_VIDC_AV1_LEVEL_4_0 = 8, - V4L2_MPEG_VIDC_AV1_LEVEL_4_1 = 9, - V4L2_MPEG_VIDC_AV1_LEVEL_4_2 = 10, - V4L2_MPEG_VIDC_AV1_LEVEL_4_3 = 11, - V4L2_MPEG_VIDC_AV1_LEVEL_5_0 = 12, - V4L2_MPEG_VIDC_AV1_LEVEL_5_1 = 13, - V4L2_MPEG_VIDC_AV1_LEVEL_5_2 = 14, - V4L2_MPEG_VIDC_AV1_LEVEL_5_3 = 15, - V4L2_MPEG_VIDC_AV1_LEVEL_6_0 = 16, - V4L2_MPEG_VIDC_AV1_LEVEL_6_1 = 17, - V4L2_MPEG_VIDC_AV1_LEVEL_6_2 = 18, - V4L2_MPEG_VIDC_AV1_LEVEL_6_3 = 19, - V4L2_MPEG_VIDC_AV1_LEVEL_7_0 = 20, - V4L2_MPEG_VIDC_AV1_LEVEL_7_1 = 21, - V4L2_MPEG_VIDC_AV1_LEVEL_7_2 = 22, - V4L2_MPEG_VIDC_AV1_LEVEL_7_3 = 23, -}; - -#define V4L2_CID_MPEG_VIDC_AV1_TIER (V4L2_CID_MPEG_VIDC_BASE + 0x33) -enum v4l2_mpeg_vidc_av1_tier { - V4L2_MPEG_VIDC_AV1_TIER_MAIN = 0, - V4L2_MPEG_VIDC_AV1_TIER_HIGH = 1, -}; -/* Decoder Timestamp Reorder control */ -#define V4L2_CID_MPEG_VIDC_TS_REORDER (V4L2_CID_MPEG_VIDC_BASE + 0x34) -/* AV1 Decoder Film Grain */ -#define V4L2_CID_MPEG_VIDC_AV1D_FILM_GRAIN_PRESENT \ - (V4L2_CID_MPEG_VIDC_BASE + 0x35) -/* Enables Output buffer fence id via input metadata */ -#define V4L2_CID_MPEG_VIDC_METADATA_OUTBUF_FENCE \ - (V4L2_CID_MPEG_VIDC_BASE + 0x38) -/* Control to set fence id to driver in order get corresponding fence fd */ -#define V4L2_CID_MPEG_VIDC_SW_FENCE_ID \ - (V4L2_CID_MPEG_VIDC_BASE + 0x39) -/* - * Control to get fence fd from driver for the fence id - * set via V4L2_CID_MPEG_VIDC_SW_FENCE_ID - */ -#define V4L2_CID_MPEG_VIDC_SW_FENCE_FD \ - (V4L2_CID_MPEG_VIDC_BASE + 0x3A) -#define V4L2_CID_MPEG_VIDC_METADATA_PICTURE_TYPE \ - (V4L2_CID_MPEG_VIDC_BASE + 0x3B) - -/* Encoder Slice Delivery Mode - * set format has a dependency on this control - * and gets invoked when this control is updated. - */ -#define V4L2_CID_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE \ - (V4L2_CID_MPEG_VIDC_BASE + 0x3C) - -#define V4L2_CID_MPEG_VIDC_H264_ENCODE_DELIVERY_MODE \ - (V4L2_CID_MPEG_VIDC_BASE + 0x3D) - -#define V4L2_CID_MPEG_VIDC_CRITICAL_PRIORITY \ - (V4L2_CID_MPEG_VIDC_BASE + 0x3E) -#define V4L2_CID_MPEG_VIDC_RESERVE_DURATION \ - (V4L2_CID_MPEG_VIDC_BASE + 0x3F) - -#define V4L2_CID_MPEG_VIDC_METADATA_DOLBY_RPU \ - (V4L2_CID_MPEG_VIDC_BASE + 0x40) - -#define V4L2_CID_MPEG_VIDC_CLIENT_ID \ - (V4L2_CID_MPEG_VIDC_BASE + 0x41) - -#define V4L2_CID_MPEG_VIDC_LAST_FLAG_EVENT_ENABLE \ - (V4L2_CID_MPEG_VIDC_BASE + 0x42) - -#ifndef V4L2_CID_MPEG_VIDC_VUI_TIMING_INFO -#define V4L2_CID_MPEG_VIDC_VUI_TIMING_INFO \ - (V4L2_CID_MPEG_VIDC_BASE + 0x43) -#endif - -#define V4L2_CID_MPEG_VIDC_EARLY_NOTIFY_ENABLE \ - (V4L2_CID_MPEG_VIDC_BASE + 0x44) - -#define V4L2_CID_MPEG_VIDC_EARLY_NOTIFY_LINE_COUNT \ - (V4L2_CID_MPEG_VIDC_BASE + 0x45) - -/* - * This control is introduced to overcome v4l2 limitation - * of allowing only standard colorspace info via s_fmt. - * v4l_sanitize_colorspace() is introduced in s_fmt ioctl - * to reject private colorspace. Through this control, client - * can set private colorspace info and/or use this control - * to set colorspace dynamically. - * The control value is 32 bits packed as: - * [ 0 - 7] : matrix coefficients - * [ 8 - 15] : transfer characteristics - * [16 - 23] : colour primaries - * [24 - 31] : range - * This control is only for encoder. - * Currently g_fmt in v4l2 does not santize colorspace, - * hence this control is not introduced for decoder. - */ -#define V4L2_CID_MPEG_VIDC_SIGNAL_COLOR_INFO \ - (V4L2_CID_MPEG_VIDC_BASE + 0x46) - -/* control to enable csc */ -#define V4L2_CID_MPEG_VIDC_CSC \ - (V4L2_CID_MPEG_VIDC_BASE + 0x47) - -#define V4L2_CID_MPEG_VIDC_DRIVER_VERSION \ - (V4L2_CID_MPEG_VIDC_BASE + 0x48) /* version: major[24:31], minor[16:23], revision[0:15] */ #define DRIVER_VERSION 0x04000000 From b4a1aefdd1b35e04d8db287347c9caae5b73f618 Mon Sep 17 00:00:00 2001 From: Vedang Nagar Date: Mon, 27 Mar 2023 08:58:06 +0530 Subject: [PATCH 0897/1061] msm: vidc: Fix race condition between s_fmt & query_ctrl - In s_fmt, there might be a codec change and here we are free the ctrl handler, at the same time client may call query ctrl and this will lead to null pointer access. - To resolve null pointer access, do not free ctrl handler and add new codec controls to the same ctrl handler. Change-Id: Iee87d5cb4d65e31d405cb1fc9f82bebab696d027 Signed-off-by: Vedang Nagar --- driver/vidc/inc/msm_vidc_control.h | 4 +- driver/vidc/inc/msm_vidc_core.h | 3 +- driver/vidc/inc/msm_vidc_inst.h | 1 - driver/vidc/inc/msm_vidc_internal.h | 4 ++ driver/vidc/src/msm_vdec.c | 12 ++--- driver/vidc/src/msm_venc.c | 14 +++--- driver/vidc/src/msm_vidc_control.c | 68 ++++++++++++++++++++++------- driver/vidc/src/msm_vidc_driver.c | 20 +++++---- 8 files changed, 86 insertions(+), 40 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_control.h b/driver/vidc/inc/msm_vidc_control.h index e63595d14f..75bd54c0c6 100644 --- a/driver/vidc/inc/msm_vidc_control.h +++ b/driver/vidc/inc/msm_vidc_control.h @@ -10,8 +10,8 @@ #include "msm_vidc_internal.h" #include "msm_vidc_inst.h" -int msm_vidc_ctrl_init(struct msm_vidc_inst *inst); -int msm_vidc_ctrl_deinit(struct msm_vidc_inst *inst); +int msm_vidc_ctrl_handler_init(struct msm_vidc_inst *inst, bool init); +int msm_vidc_ctrl_handler_deinit(struct msm_vidc_inst *inst); int msm_v4l2_op_s_ctrl(struct v4l2_ctrl *ctrl); int msm_v4l2_op_g_volatile_ctrl(struct v4l2_ctrl *ctrl); int msm_vidc_s_ctrl(struct msm_vidc_inst *inst, struct v4l2_ctrl *ctrl); diff --git a/driver/vidc/inc/msm_vidc_core.h b/driver/vidc/inc/msm_vidc_core.h index 2f67bdfc5b..10b2485703 100644 --- a/driver/vidc/inc/msm_vidc_core.h +++ b/driver/vidc/inc/msm_vidc_core.h @@ -86,7 +86,8 @@ struct msm_vidc_core { u32 intr_status; u32 spur_count; u32 reg_count; - u32 codecs_count; + u32 enc_codecs_count; + u32 dec_codecs_count; struct msm_vidc_core_capability capabilities[CORE_CAP_MAX+1]; struct msm_vidc_inst_capability *inst_caps; struct msm_vidc_mem_addr sfr; diff --git a/driver/vidc/inc/msm_vidc_inst.h b/driver/vidc/inc/msm_vidc_inst.h index 271b08ef15..fff133ff94 100644 --- a/driver/vidc/inc/msm_vidc_inst.h +++ b/driver/vidc/inc/msm_vidc_inst.h @@ -87,7 +87,6 @@ struct msm_vidc_inst { struct v4l2_fh event_handler; struct v4l2_m2m_dev *m2m_dev; struct v4l2_m2m_ctx *m2m_ctx; - struct v4l2_ctrl **ctrls; u32 num_ctrls; enum hfi_rate_control hfi_rc_type; enum hfi_layer_encoding_type hfi_layer_type; diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 31bba18fd4..e7d84ad87b 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -1047,4 +1047,8 @@ struct msm_vidc_sfr { u8 rg_data[1]; }; +struct msm_vidc_ctrl_data { + bool skip_s_ctrl; +}; + #endif // _MSM_VIDC_INTERNAL_H_ diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 3367056afb..e461146cf9 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -44,6 +44,10 @@ struct msm_vdec_prop_type_handle { static int msm_vdec_codec_change(struct msm_vidc_inst *inst, u32 v4l2_codec) { int rc = 0; + bool session_init = false; + + if (!inst->codec) + session_init = true; if (inst->codec && inst->fmts[INPUT_PORT].fmt.pix_mp.pixelformat == v4l2_codec) return 0; @@ -68,11 +72,7 @@ static int msm_vdec_codec_change(struct msm_vidc_inst *inst, u32 v4l2_codec) if (rc) goto exit; - rc = msm_vidc_ctrl_deinit(inst); - if (rc) - goto exit; - - rc = msm_vidc_ctrl_init(inst); + rc = msm_vidc_ctrl_handler_init(inst, session_init); if(rc) goto exit; @@ -2832,7 +2832,7 @@ int msm_vdec_inst_deinit(struct msm_vidc_inst *inst) } /* cancel pending batch work */ cancel_batch_work(inst); - rc = msm_vidc_ctrl_deinit(inst); + rc = msm_vidc_ctrl_handler_deinit(inst); if (rc) return rc; diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index febf85e643..cd1b1eb597 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -62,6 +62,10 @@ struct msm_venc_prop_type_handle { static int msm_venc_codec_change(struct msm_vidc_inst *inst, u32 v4l2_codec) { int rc = 0; + bool session_init = false; + + if (!inst->codec) + session_init = true; if (inst->codec && inst->fmts[OUTPUT_PORT].fmt.pix_mp.pixelformat == v4l2_codec) return 0; @@ -86,12 +90,8 @@ static int msm_venc_codec_change(struct msm_vidc_inst *inst, u32 v4l2_codec) if (rc) goto exit; - rc = msm_vidc_ctrl_deinit(inst); - if (rc) - goto exit; - - rc = msm_vidc_ctrl_init(inst); - if (rc) + rc = msm_vidc_ctrl_handler_init(inst, session_init); + if(rc) goto exit; rc = msm_vidc_update_buffer_count(inst, INPUT_PORT); @@ -2018,7 +2018,7 @@ int msm_venc_inst_deinit(struct msm_vidc_inst *inst) d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - rc = msm_vidc_ctrl_deinit(inst); + rc = msm_vidc_ctrl_handler_deinit(inst); if (rc) return rc; diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index e84a9fd20d..08e07432ae 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -466,7 +466,7 @@ error: return rc; } -int msm_vidc_ctrl_deinit(struct msm_vidc_inst *inst) +int msm_vidc_ctrl_handler_deinit(struct msm_vidc_inst *inst) { if (!inst) { d_vpr_e("%s: invalid parameters\n", __func__); @@ -475,13 +475,11 @@ int msm_vidc_ctrl_deinit(struct msm_vidc_inst *inst) i_vpr_h(inst, "%s(): num ctrls %d\n", __func__, inst->num_ctrls); v4l2_ctrl_handler_free(&inst->ctrl_handler); memset(&inst->ctrl_handler, 0, sizeof(struct v4l2_ctrl_handler)); - msm_vidc_vmem_free((void **)&inst->ctrls); - inst->ctrls = NULL; return 0; } -int msm_vidc_ctrl_init(struct msm_vidc_inst *inst) +int msm_vidc_ctrl_handler_init(struct msm_vidc_inst *inst, bool init) { int rc = 0; struct msm_vidc_inst_cap *cap; @@ -489,6 +487,7 @@ int msm_vidc_ctrl_init(struct msm_vidc_inst *inst) int idx = 0; struct v4l2_ctrl_config ctrl_cfg = {0}; int num_ctrls = 0, ctrl_idx = 0; + u64 codecs_count, step_or_mask; if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); @@ -511,16 +510,18 @@ int msm_vidc_ctrl_init(struct msm_vidc_inst *inst) __func__); return -EINVAL; } - rc = msm_vidc_vmem_alloc(num_ctrls * sizeof(struct v4l2_ctrl *), - (void **)&inst->ctrls, __func__); - if (rc) - return rc; - rc = v4l2_ctrl_handler_init(&inst->ctrl_handler, num_ctrls); - if (rc) { - i_vpr_e(inst, "control handler init failed, %d\n", - inst->ctrl_handler.error); - goto error; + if (init) { + codecs_count = is_encode_session(inst) ? + core->enc_codecs_count : + core->dec_codecs_count; + rc = v4l2_ctrl_handler_init(&inst->ctrl_handler, + INST_CAP_MAX * codecs_count); + if (rc) { + i_vpr_e(inst, "control handler init failed, %d\n", + inst->ctrl_handler.error); + goto error; + } } for (idx = 0; idx < INST_CAP_MAX; idx++) { @@ -550,6 +551,32 @@ int msm_vidc_ctrl_init(struct msm_vidc_inst *inst) memset(&ctrl_cfg, 0, sizeof(struct v4l2_ctrl_config)); + /* + * few controls might have been already initialized in instance initialization, + * so modify the range values for them instead of initializing them again + */ + if (!init) { + struct msm_vidc_ctrl_data ctrl_priv_data; + + ctrl = v4l2_ctrl_find(&inst->ctrl_handler, cap[idx].v4l2_id); + if (ctrl) { + step_or_mask = (cap[idx].flags & CAP_FLAG_MENU) ? + ~(cap[idx].step_or_mask) : + cap[idx].step_or_mask; + memset(&ctrl_priv_data, 0, sizeof(struct msm_vidc_ctrl_data)); + ctrl_priv_data.skip_s_ctrl = true; + ctrl->priv = &ctrl_priv_data; + v4l2_ctrl_modify_range(ctrl, + cap[idx].min, + cap[idx].max, + step_or_mask, + cap[idx].value); + /* reset private data to null to ensure s_ctrl not skipped */ + ctrl->priv = NULL; + continue; + } + } + if (is_priv_ctrl(cap[idx].v4l2_id)) { /* add private control */ ctrl_cfg.def = cap[idx].value; @@ -631,7 +658,6 @@ int msm_vidc_ctrl_init(struct msm_vidc_inst *inst) ctrl->flags |= V4L2_CTRL_FLAG_VOLATILE; ctrl->flags |= V4L2_CTRL_FLAG_EXECUTE_ON_WRITE; - inst->ctrls[ctrl_idx] = ctrl; ctrl_idx++; } inst->num_ctrls = num_ctrls; @@ -639,7 +665,7 @@ int msm_vidc_ctrl_init(struct msm_vidc_inst *inst) return 0; error: - msm_vidc_ctrl_deinit(inst); + msm_vidc_ctrl_handler_deinit(inst); return rc; } @@ -894,6 +920,7 @@ int msm_vidc_s_ctrl(struct msm_vidc_inst *inst, struct v4l2_ctrl *ctrl) int msm_v4l2_op_s_ctrl(struct v4l2_ctrl *ctrl) { struct msm_vidc_inst *inst; + struct msm_vidc_ctrl_data *priv_ctrl_data; int rc = 0; if (!ctrl) { @@ -901,6 +928,17 @@ int msm_v4l2_op_s_ctrl(struct v4l2_ctrl *ctrl) return -EINVAL; } + /* + * v4l2_ctrl_modify_range may internally call s_ctrl + * which will again try to acquire lock leading to deadlock, + * Add check to avoid such scenario. + */ + priv_ctrl_data = ctrl->priv ? ctrl->priv : NULL; + if (priv_ctrl_data && priv_ctrl_data->skip_s_ctrl) { + d_vpr_l("%s: skip s_ctrl (%s)\n", __func__, ctrl->name); + return 0; + } + inst = container_of(ctrl->handler, struct msm_vidc_inst, ctrl_handler); inst = get_inst_ref(g_core, inst); if (!inst) { diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 57664b9a31..2398746fc4 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -3935,6 +3935,7 @@ int msm_vidc_get_inst_capability(struct msm_vidc_inst *inst) { int rc = 0; int i; + u32 codecs_count = 0; struct msm_vidc_core *core; if (!inst || !inst->core) { @@ -3943,7 +3944,9 @@ int msm_vidc_get_inst_capability(struct msm_vidc_inst *inst) } core = inst->core; - for (i = 0; i < core->codecs_count; i++) { + codecs_count = core->enc_codecs_count + core->dec_codecs_count; + + for (i = 0; i < codecs_count; i++) { if (core->inst_caps[i].domain == inst->domain && core->inst_caps[i].codec == inst->codec) { i_vpr_h(inst, @@ -4061,8 +4064,8 @@ int msm_vidc_init_instance_caps(struct msm_vidc_core *core) { int rc = 0; u8 enc_valid_codecs, dec_valid_codecs; - u8 count_bits, enc_codec_count; - u8 codecs_count = 0; + u8 count_bits, codecs_count = 0; + u8 enc_codecs_count = 0, dec_codecs_count = 0; int i, j, check_bit; int num_platform_cap_data, num_platform_cap_dependency_data; struct msm_platform_inst_capability *platform_cap_data = NULL; @@ -4092,14 +4095,15 @@ int msm_vidc_init_instance_caps(struct msm_vidc_core *core) enc_valid_codecs = core->capabilities[ENC_CODECS].value; count_bits = enc_valid_codecs; - COUNT_BITS(count_bits, codecs_count); - enc_codec_count = codecs_count; + COUNT_BITS(count_bits, enc_codecs_count); + core->enc_codecs_count = enc_codecs_count; dec_valid_codecs = core->capabilities[DEC_CODECS].value; count_bits = dec_valid_codecs; - COUNT_BITS(count_bits, codecs_count); + COUNT_BITS(count_bits, dec_codecs_count); + core->dec_codecs_count = dec_codecs_count; - core->codecs_count = codecs_count; + codecs_count = enc_codecs_count + dec_codecs_count; rc = msm_vidc_vmem_alloc(codecs_count * sizeof(struct msm_vidc_inst_capability), (void **)&core->inst_caps, __func__); if (rc) @@ -4107,7 +4111,7 @@ int msm_vidc_init_instance_caps(struct msm_vidc_core *core) check_bit = 0; /* determine codecs for enc domain */ - for (i = 0; i < enc_codec_count; i++) { + for (i = 0; i < enc_codecs_count; i++) { while (check_bit < (sizeof(enc_valid_codecs) * 8)) { if (enc_valid_codecs & BIT(check_bit)) { core->inst_caps[i].domain = MSM_VIDC_ENCODER; From 2468a6c91b0c281dd005bdceb87c8fa303813a53 Mon Sep 17 00:00:00 2001 From: Ankush Mitra Date: Fri, 28 Apr 2023 16:41:38 +0530 Subject: [PATCH 0898/1061] video: driver: separate i/o subscribe prop codec wise Separate i/o subscribe prop codec wise. Change-Id: Ia7f63b571142507eb4d7d5ea1c0197aa74679448 Signed-off-by: Ankush Mitra --- driver/platform/kalama/src/msm_vidc_kalama.c | 65 ++++++++++++++++++-- driver/platform/waipio/src/waipio.c | 46 ++++++++++++-- 2 files changed, 99 insertions(+), 12 deletions(-) diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index 4e20acc3a5..73cfc72a9d 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -2602,12 +2602,29 @@ static const u32 kalama_vdec_psc_av1[] = { HFI_PROP_SIGNAL_COLOR_INFO, }; -static const u32 kalama_vdec_input_properties[] = { +static const u32 kalama_vdec_input_properties_avc[] = { HFI_PROP_NO_OUTPUT, HFI_PROP_SUBFRAME_INPUT, }; -static const u32 kalama_vdec_output_properties[] = { +static const u32 kalama_vdec_input_properties_hevc[] = { + HFI_PROP_NO_OUTPUT, + HFI_PROP_SUBFRAME_INPUT, +}; + +static const u32 kalama_vdec_input_properties_vp9[] = { + HFI_PROP_NO_OUTPUT, + HFI_PROP_SUBFRAME_INPUT, +}; + +static const u32 kalama_vdec_input_properties_av1[] = { + HFI_PROP_NO_OUTPUT, + HFI_PROP_SUBFRAME_INPUT, + HFI_PROP_AV1_TILE_ROWS_COLUMNS, + HFI_PROP_AV1_UNIFORM_TILE_SPACING, +}; + +static const u32 kalama_vdec_output_properties_avc[] = { HFI_PROP_WORST_COMPRESSION_RATIO, HFI_PROP_WORST_COMPLEXITY_FACTOR, HFI_PROP_PICTURE_TYPE, @@ -2616,6 +2633,30 @@ static const u32 kalama_vdec_output_properties[] = { HFI_PROP_FENCE, }; +static const u32 kalama_vdec_output_properties_hevc[] = { + HFI_PROP_WORST_COMPRESSION_RATIO, + HFI_PROP_WORST_COMPLEXITY_FACTOR, + HFI_PROP_PICTURE_TYPE, + HFI_PROP_DPB_LIST, + HFI_PROP_FENCE, +}; + +static const u32 kalama_vdec_output_properties_vp9[] = { + HFI_PROP_WORST_COMPRESSION_RATIO, + HFI_PROP_WORST_COMPLEXITY_FACTOR, + HFI_PROP_PICTURE_TYPE, + HFI_PROP_DPB_LIST, + HFI_PROP_FENCE, +}; + +static const u32 kalama_vdec_output_properties_av1[] = { + HFI_PROP_WORST_COMPRESSION_RATIO, + HFI_PROP_WORST_COMPLEXITY_FACTOR, + HFI_PROP_PICTURE_TYPE, + HFI_PROP_DPB_LIST, + HFI_PROP_FENCE, +}; + static const struct msm_vidc_platform_data kalama_data = { /* resources dependent on other module */ .bw_tbl = kalama_bw_table, @@ -2664,10 +2705,22 @@ static const struct msm_vidc_platform_data kalama_data = { .psc_vp9_tbl_size = ARRAY_SIZE(kalama_vdec_psc_vp9), .psc_av1_tbl = kalama_vdec_psc_av1, .psc_av1_tbl_size = ARRAY_SIZE(kalama_vdec_psc_av1), - .dec_input_prop = kalama_vdec_input_properties, - .dec_input_prop_size = ARRAY_SIZE(kalama_vdec_input_properties), - .dec_output_prop = kalama_vdec_output_properties, - .dec_output_prop_size = ARRAY_SIZE(kalama_vdec_output_properties), + .dec_input_prop_avc = kalama_vdec_input_properties_avc, + .dec_input_prop_hevc = kalama_vdec_input_properties_hevc, + .dec_input_prop_vp9 = kalama_vdec_input_properties_vp9, + .dec_input_prop_av1 = kalama_vdec_input_properties_av1, + .dec_input_prop_size_avc = ARRAY_SIZE(kalama_vdec_input_properties_avc), + .dec_input_prop_size_hevc = ARRAY_SIZE(kalama_vdec_input_properties_hevc), + .dec_input_prop_size_vp9 = ARRAY_SIZE(kalama_vdec_input_properties_vp9), + .dec_input_prop_size_av1 = ARRAY_SIZE(kalama_vdec_input_properties_av1), + .dec_output_prop_avc = kalama_vdec_output_properties_avc, + .dec_output_prop_hevc = kalama_vdec_output_properties_hevc, + .dec_output_prop_vp9 = kalama_vdec_output_properties_vp9, + .dec_output_prop_av1 = kalama_vdec_output_properties_av1, + .dec_output_prop_size_avc = ARRAY_SIZE(kalama_vdec_output_properties_avc), + .dec_output_prop_size_hevc = ARRAY_SIZE(kalama_vdec_output_properties_hevc), + .dec_output_prop_size_vp9 = ARRAY_SIZE(kalama_vdec_output_properties_vp9), + .dec_output_prop_size_av1 = ARRAY_SIZE(kalama_vdec_output_properties_av1), }; static const struct msm_vidc_platform_data kalama_data_v2 = { diff --git a/driver/platform/waipio/src/waipio.c b/driver/platform/waipio/src/waipio.c index de971202f1..f78e1b6804 100644 --- a/driver/platform/waipio/src/waipio.c +++ b/driver/platform/waipio/src/waipio.c @@ -1728,12 +1728,22 @@ static const u32 waipio_vdec_psc_vp9[] = { HFI_PROP_LEVEL, }; -static const u32 waipio_vdec_input_properties[] = { +static const u32 waipio_vdec_input_properties_avc[] = { HFI_PROP_NO_OUTPUT, HFI_PROP_SUBFRAME_INPUT, }; -static const u32 waipio_vdec_output_properties[] = { +static const u32 waipio_vdec_input_properties_hevc[] = { + HFI_PROP_NO_OUTPUT, + HFI_PROP_SUBFRAME_INPUT, +}; + +static const u32 waipio_vdec_input_properties_vp9[] = { + HFI_PROP_NO_OUTPUT, + HFI_PROP_SUBFRAME_INPUT, +}; + +static const u32 waipio_vdec_output_properties_avc[] = { HFI_PROP_WORST_COMPRESSION_RATIO, HFI_PROP_WORST_COMPLEXITY_FACTOR, HFI_PROP_PICTURE_TYPE, @@ -1742,6 +1752,22 @@ static const u32 waipio_vdec_output_properties[] = { HFI_PROP_FENCE, }; +static const u32 waipio_vdec_output_properties_hevc[] = { + HFI_PROP_WORST_COMPRESSION_RATIO, + HFI_PROP_WORST_COMPLEXITY_FACTOR, + HFI_PROP_PICTURE_TYPE, + HFI_PROP_DPB_LIST, + HFI_PROP_FENCE, +}; + +static const u32 waipio_vdec_output_properties_vp9[] = { + HFI_PROP_WORST_COMPRESSION_RATIO, + HFI_PROP_WORST_COMPLEXITY_FACTOR, + HFI_PROP_PICTURE_TYPE, + HFI_PROP_DPB_LIST, + HFI_PROP_FENCE, +}; + static const struct msm_vidc_platform_data waipio_data = { /* resources dependent on other module */ .bw_tbl = waipio_bw_table, @@ -1792,10 +1818,18 @@ static const struct msm_vidc_platform_data waipio_data = { .psc_hevc_tbl_size = ARRAY_SIZE(waipio_vdec_psc_hevc), .psc_vp9_tbl = waipio_vdec_psc_vp9, .psc_vp9_tbl_size = ARRAY_SIZE(waipio_vdec_psc_vp9), - .dec_input_prop = waipio_vdec_input_properties, - .dec_input_prop_size = ARRAY_SIZE(waipio_vdec_input_properties), - .dec_output_prop = waipio_vdec_output_properties, - .dec_output_prop_size = ARRAY_SIZE(waipio_vdec_output_properties), + .dec_input_prop_avc = waipio_vdec_input_properties_avc, + .dec_input_prop_hevc = waipio_vdec_input_properties_hevc, + .dec_input_prop_vp9 = waipio_vdec_input_properties_vp9, + .dec_input_prop_size_avc = ARRAY_SIZE(waipio_vdec_input_properties_avc), + .dec_input_prop_size_hevc = ARRAY_SIZE(waipio_vdec_input_properties_hevc), + .dec_input_prop_size_vp9 = ARRAY_SIZE(waipio_vdec_input_properties_vp9), + .dec_output_prop_avc = waipio_vdec_output_properties_avc, + .dec_output_prop_hevc = waipio_vdec_output_properties_hevc, + .dec_output_prop_vp9 = waipio_vdec_output_properties_vp9, + .dec_output_prop_size_avc = ARRAY_SIZE(waipio_vdec_output_properties_avc), + .dec_output_prop_size_hevc = ARRAY_SIZE(waipio_vdec_output_properties_hevc), + .dec_output_prop_size_vp9 = ARRAY_SIZE(waipio_vdec_output_properties_vp9), }; static int msm_vidc_init_data(struct msm_vidc_core *core) From 982e626d007ddbe17f9bc3ba9cae9f22311531ea Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Wed, 26 Apr 2023 22:35:53 -0700 Subject: [PATCH 0899/1061] video: driver: Add support to 1kx1k tile for HEIC encoding - Introduce new control to set HEIC encoder tile size from HAL - Support 1k x 1k tile encoding along with existing 512 x 512 tiling Change-Id: Iaeffe421f8311d818695c3ae9af7cabcc8892043 Signed-off-by: Akshata Sahukar --- .../platform/common/inc/msm_vidc_platform_ext.h | 3 +++ driver/platform/kalama/src/msm_vidc_kalama.c | 10 +++++++--- .../platform/pineapple/src/msm_vidc_pineapple.c | 10 +++++++--- driver/vidc/inc/msm_vidc_driver.h | 1 - driver/vidc/inc/msm_vidc_internal.h | 4 +++- driver/vidc/src/msm_venc.c | 17 +++++++++-------- driver/vidc/src/msm_vidc_buffer.c | 8 ++++---- driver/vidc/src/msm_vidc_driver.c | 4 ++-- 8 files changed, 35 insertions(+), 22 deletions(-) diff --git a/driver/platform/common/inc/msm_vidc_platform_ext.h b/driver/platform/common/inc/msm_vidc_platform_ext.h index ce49be4cc2..250c8cfe07 100644 --- a/driver/platform/common/inc/msm_vidc_platform_ext.h +++ b/driver/platform/common/inc/msm_vidc_platform_ext.h @@ -244,6 +244,9 @@ enum v4l2_mpeg_vidc_av1_tier { #define V4L2_CID_MPEG_VIDC_DRIVER_VERSION \ (V4L2_CID_MPEG_VIDC_BASE + 0x48) +#define V4L2_CID_MPEG_VIDC_GRID_WIDTH \ + (V4L2_CID_MPEG_VIDC_BASE + 0x49) + int msm_vidc_adjust_ir_period(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_dec_frame_rate(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_dec_operating_rate(void *instance, struct v4l2_ctrl *ctrl); diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index 4e20acc3a5..c7b5b6904e 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -22,7 +22,6 @@ #include "hfi_property.h" #include "hfi_command.h" - /* version: major[24:31], minor[16:23], revision[0:15] */ #define DRIVER_VERSION 0x04000000 #define DEFAULT_VIDEO_CONCEAL_COLOR_BLACK 0x8020010 @@ -1905,12 +1904,17 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { HFI_PROP_DEC_QP_METADATA, CAP_FLAG_BITMASK | CAP_FLAG_META}, - {GRID, ENC, HEIC, + {GRID_ENABLE, ENC, HEIC, 0, 1, 1, 1, 0, HFI_PROP_HEIC_GRID_ENABLE, CAP_FLAG_OUTPUT_PORT}, + {GRID_SIZE, ENC, HEIC, + HEIC_GRID_WIDTH, HEIC_GRID_WIDTH * 2, + HEIC_GRID_WIDTH, HEIC_GRID_WIDTH, + V4L2_CID_MPEG_VIDC_GRID_WIDTH}, + {COMPLEXITY, ENC, H264|HEVC, 0, 100, 1, DEFAULT_COMPLEXITY, @@ -2463,7 +2467,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kala msm_vidc_adjust_roi_info, NULL}, - {GRID, ENC, HEIC, + {GRID_ENABLE, ENC, HEIC, {0}, NULL, msm_vidc_set_u32}, diff --git a/driver/platform/pineapple/src/msm_vidc_pineapple.c b/driver/platform/pineapple/src/msm_vidc_pineapple.c index a222815338..403d4baa78 100644 --- a/driver/platform/pineapple/src/msm_vidc_pineapple.c +++ b/driver/platform/pineapple/src/msm_vidc_pineapple.c @@ -24,7 +24,6 @@ #include "hfi_command.h" #include "venus_hfi.h" - /* version: major[24:31], minor[16:23], revision[0:15] */ #define DRIVER_VERSION 0x04000000 #define DEFAULT_VIDEO_CONCEAL_COLOR_BLACK 0x8020010 @@ -2021,12 +2020,17 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { HFI_PROP_DEC_QP_METADATA, CAP_FLAG_BITMASK | CAP_FLAG_META}, - {GRID, ENC, HEIC, + {GRID_ENABLE, ENC, HEIC, 0, 1, 1, 1, 0, HFI_PROP_HEIC_GRID_ENABLE, CAP_FLAG_OUTPUT_PORT}, + {GRID_SIZE, ENC, HEIC, + HEIC_GRID_WIDTH, HEIC_GRID_WIDTH * 2, + HEIC_GRID_WIDTH, HEIC_GRID_WIDTH, + V4L2_CID_MPEG_VIDC_GRID_WIDTH}, + {COMPLEXITY, ENC, H264|HEVC, 0, 100, 1, DEFAULT_COMPLEXITY, @@ -2630,7 +2634,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine msm_vidc_adjust_roi_info, NULL}, - {GRID, ENC, HEIC, + {GRID_ENABLE, ENC, HEIC, {0}, NULL, msm_vidc_set_u32}, diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index e1cd2e13fe..a1af43b97c 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -14,7 +14,6 @@ #include "msm_vidc_inst.h" #define MSM_VIDC_SESSION_INACTIVE_THRESHOLD_MS 1000 -#define HEIC_GRID_DIMENSION 512 enum msm_vidc_debugfs_event; diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 31bba18fd4..eba596f099 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -137,6 +137,7 @@ enum msm_vidc_metadata_bits { #define MAX_TRANSCODING_STATS_FRAME_RATE 60 #define MAX_TRANSCODING_STATS_WIDTH 4096 #define MAX_TRANSCODING_STATS_HEIGHT 2304 +#define HEIC_GRID_WIDTH 512 #define DCVS_WINDOW 16 #define ENC_FPS_WINDOW 3 @@ -357,7 +358,8 @@ enum msm_vidc_metadata_bits { CAP(BASELAYER_PRIORITY) \ CAP(IR_TYPE) \ CAP(AU_DELIMITER) \ - CAP(GRID) \ + CAP(GRID_ENABLE) \ + CAP(GRID_SIZE) \ CAP(I_FRAME_MIN_QP) \ CAP(P_FRAME_MIN_QP) \ CAP(B_FRAME_MIN_QP) \ diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index febf85e643..2b544aa07c 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -150,6 +150,7 @@ static int msm_venc_set_stride_scanline(struct msm_vidc_inst *inst, u32 color_format, stride_y, scanline_y; u32 stride_uv = 0, scanline_uv = 0; u32 payload[2]; + u32 grid_size; if (port != INPUT_PORT) { i_vpr_e(inst, "%s: invalid port %d\n", __func__, port); @@ -165,8 +166,9 @@ static int msm_venc_set_stride_scanline(struct msm_vidc_inst *inst, } if (is_image_session(inst)) { - stride_y = ALIGN(inst->fmts[INPUT_PORT].fmt.pix_mp.width, HEIC_GRID_DIMENSION); - scanline_y = ALIGN(inst->fmts[INPUT_PORT].fmt.pix_mp.height, HEIC_GRID_DIMENSION); + grid_size = inst->capabilities[GRID_SIZE].value; + stride_y = ALIGN(inst->fmts[INPUT_PORT].fmt.pix_mp.width, grid_size); + scanline_y = ALIGN(inst->fmts[INPUT_PORT].fmt.pix_mp.height, grid_size); } else if (is_rgba_colorformat(color_format)) { stride_y = video_rgb_stride_pix(color_format, inst->fmts[INPUT_PORT].fmt.pix_mp.width); @@ -1232,7 +1234,8 @@ int msm_venc_s_fmt_output(struct msm_vidc_inst *inst, struct v4l2_format *f) fmt->fmt.pix_mp.height = ALIGN(height, codec_align); /* use grid dimension for image session */ if (is_image_session(inst)) - fmt->fmt.pix_mp.width = fmt->fmt.pix_mp.height = HEIC_GRID_DIMENSION; + fmt->fmt.pix_mp.width = fmt->fmt.pix_mp.height = + inst->capabilities[GRID_SIZE].value; fmt->fmt.pix_mp.num_planes = 1; fmt->fmt.pix_mp.plane_fmt[0].bytesperline = 0; fmt->fmt.pix_mp.plane_fmt[0].sizeimage = call_session_op(core, @@ -1332,7 +1335,8 @@ static int msm_venc_s_fmt_input(struct msm_vidc_inst *inst, struct v4l2_format * height = f->fmt.pix_mp.height; if (is_image_session(inst)) { - bytesperline = ALIGN(f->fmt.pix_mp.width, HEIC_GRID_DIMENSION) * + bytesperline = ALIGN(f->fmt.pix_mp.width, + inst->capabilities[GRID_SIZE].value) * (is_10bit_colorformat(pix_fmt) ? 2 : 1); } else if (is_rgba_colorformat(pix_fmt)) { bytesperline = video_rgb_stride_bytes(pix_fmt, f->fmt.pix_mp.width); @@ -1347,10 +1351,7 @@ static int msm_venc_s_fmt_input(struct msm_vidc_inst *inst, struct v4l2_format * fmt->fmt.pix_mp.num_planes = 1; fmt->fmt.pix_mp.pixelformat = f->fmt.pix_mp.pixelformat; fmt->fmt.pix_mp.plane_fmt[0].bytesperline = bytesperline; - if (is_image_session(inst)) - size = bytesperline * height * 3 / 2; - else - size = call_session_op(core, buffer_size, inst, MSM_VIDC_BUF_INPUT); + size = call_session_op(core, buffer_size, inst, MSM_VIDC_BUF_INPUT); fmt->fmt.pix_mp.plane_fmt[0].sizeimage = size; /* update input port colorspace info */ fmt->fmt.pix_mp.colorspace = f->fmt.pix_mp.colorspace; diff --git a/driver/vidc/src/msm_vidc_buffer.c b/driver/vidc/src/msm_vidc_buffer.c index 0d33ae6bfc..c64d4f275b 100644 --- a/driver/vidc/src/msm_vidc_buffer.c +++ b/driver/vidc/src/msm_vidc_buffer.c @@ -313,8 +313,8 @@ u32 msm_vidc_encoder_input_size(struct msm_vidc_inst *inst) colorformat = v4l2_colorformat_to_driver(inst, f->fmt.pix_mp.pixelformat, __func__); if (is_image_session(inst)) { - width = ALIGN(width, HEIC_GRID_DIMENSION); - height = ALIGN(height, HEIC_GRID_DIMENSION); + width = ALIGN(width, inst->capabilities[GRID_SIZE].value); + height = ALIGN(height, inst->capabilities[GRID_SIZE].value); } size = video_buffer_size(colorformat, width, height, true); return size; @@ -460,8 +460,8 @@ u32 msm_vidc_encoder_input_meta_size(struct msm_vidc_inst *inst) width = f->fmt.pix_mp.width; height = f->fmt.pix_mp.height; if (is_image_session(inst)) { - width = ALIGN(width, HEIC_GRID_DIMENSION); - height = ALIGN(height, HEIC_GRID_DIMENSION); + width = ALIGN(width, inst->capabilities[GRID_SIZE].value); + height = ALIGN(height, inst->capabilities[GRID_SIZE].value); } size += ROI_METADATA_SIZE(width, height, lcu_size); size = ALIGN(size, SZ_4K); diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 57664b9a31..3e6b8b6110 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -5706,8 +5706,8 @@ static bool msm_vidc_allow_image_encode_session(struct msm_vidc_inst *inst) /* is output grid dimension */ fmt = &inst->fmts[OUTPUT_PORT]; - allow = fmt->fmt.pix_mp.width == HEIC_GRID_DIMENSION; - allow &= fmt->fmt.pix_mp.height == HEIC_GRID_DIMENSION; + allow = fmt->fmt.pix_mp.width == cap[GRID_SIZE].value; + allow &= fmt->fmt.pix_mp.height == cap[GRID_SIZE].value; if (!allow) { i_vpr_e(inst, "%s: output is not a grid dimension: %u x %u\n", __func__, fmt->fmt.pix_mp.width, fmt->fmt.pix_mp.height); From 540823c3ac25a990782ba71367ecc18d57a3b669 Mon Sep 17 00:00:00 2001 From: Vedang Nagar Date: Fri, 28 Apr 2023 16:52:21 +0530 Subject: [PATCH 0900/1061] video: driver: Remove Suspend call from Close function During msm_vidc_close, we are trying to perform suspend which will unload the firmware. This is done to reduce the latency since it will power collapse after 1.5 seconds. But, during bootup time, for each codec, framework tries to open and close each session for each codec. As part of this, it will try to do power collapse/power on each time, hence increasing the bootup latency. Therefore Removed suspend call from close to avoid bootup latency because video fw will anyway power collapse the video hardware and firmware will also go into WFI mode. Change-Id: Idbe015a6a2ef4dd1573ef01fd69d638fea7be519 Signed-off-by: Vedang Nagar --- driver/vidc/src/msm_vidc_driver.c | 21 --------------------- 1 file changed, 21 deletions(-) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index f00c9476cf..963c0a002c 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -259,25 +259,6 @@ int msm_vidc_suspend_locked(struct msm_vidc_core *core) return rc; } -static int msm_vidc_try_suspend(struct msm_vidc_core *core) -{ - int rc = 0; - - if (!core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - core_lock(core, __func__); - if (list_empty(&core->instances) && list_empty(&core->dangling_instances)) { - d_vpr_h("%s: closed last open session. suspend video core\n", __func__); - msm_vidc_suspend_locked(core); - } - core_unlock(core, __func__); - - return rc; -} - int msm_vidc_add_buffer_stats(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buf, u64 timestamp) { @@ -5075,8 +5056,6 @@ static void msm_vidc_close_helper(struct kref *kref) mutex_destroy(&inst->request_lock); mutex_destroy(&inst->lock); msm_vidc_vmem_free((void **)&inst); - /* try suspending video hardware */ - msm_vidc_try_suspend(core); } struct msm_vidc_inst *get_inst_ref(struct msm_vidc_core *core, From 956eb82150f0ed36dfc2ebbebb8feb516cd84794 Mon Sep 17 00:00:00 2001 From: Ankush Mitra Date: Wed, 3 May 2023 15:17:21 +0530 Subject: [PATCH 0901/1061] video: driver: adjust the residency print Adjust the residency print to have more closer integer value. Change-Id: Idc9605bd6be8f65ab8ec7b61059660abbf2e85fb Signed-off-by: Ankush Mitra --- driver/vidc/src/resources.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/driver/vidc/src/resources.c b/driver/vidc/src/resources.c index 65ce0abe3b..6d0fded470 100644 --- a/driver/vidc/src/resources.c +++ b/driver/vidc/src/resources.c @@ -1206,7 +1206,7 @@ static int print_residency_stats(struct msm_vidc_core *core, struct clock_info * list_for_each_entry(residency, &cl->residency_list, list) { d_vpr_hs("%s: %s clock rate [%d] total %lluus residency %u%%\n", __func__, cl->name, residency->rate, residency->total_time_us, - (residency->total_time_us * 100 + total_time_us - 1) / total_time_us); + (residency->total_time_us * 100 + total_time_us / 2) / total_time_us); } return rc; From 64c1a34e9b92bae3d576b37dbd666e50dad94217 Mon Sep 17 00:00:00 2001 From: Ankush Mitra Date: Thu, 4 May 2023 10:11:05 +0530 Subject: [PATCH 0902/1061] video: driver: fix logic of is_hevc_10_bit_decode_session api This api should not call v4l2_colorformat_to_driver in case of encode session. Change-Id: Ibb702e427eef3f78a62213bb181750a1403679e5 Signed-off-by: Ankush Mitra --- driver/vidc/src/msm_vidc_driver.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 0258d014af..df92a3c1d3 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -1101,6 +1101,10 @@ bool is_hevc_10bit_decode_session(struct msm_vidc_inst *inst) bool is10bit = false; enum msm_vidc_colorformat_type colorformat; + /* in case of decoder session return false */ + if (!is_decode_session(inst)) + return false; + colorformat = v4l2_colorformat_to_driver(inst, inst->fmts[OUTPUT_PORT].fmt.pix_mp.pixelformat, __func__); From ebf341013664babe9d343b7664928c0e7a7100c6 Mon Sep 17 00:00:00 2001 From: Mihir Ganu Date: Thu, 4 May 2023 11:21:48 -0700 Subject: [PATCH 0903/1061] video: driver: Remove the unsupported ARGB32C format. Remove the unsupported ARGB32C (RGBA8888 UBWC) pixel format. Change-Id: Ia5ce610c4d3306b5f50f5132c9533bd9e86f0a6f Signed-off-by: Mihir Ganu --- driver/platform/kalama/src/msm_vidc_kalama.c | 5 ----- driver/platform/pineapple/src/msm_vidc_pineapple.c | 5 ----- include/uapi/vidc/media/v4l2_vidc_extensions.h | 2 -- 3 files changed, 12 deletions(-) diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index a87eeac8b0..b6819eaea3 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -105,11 +105,6 @@ static struct color_format_info color_format_data_kalama[] = { .vidc_color_format = MSM_VIDC_FMT_RGBA8888, .pixfmt_name = "RGBA", }, - { - .v4l2_color_format = V4L2_PIX_FMT_VIDC_ARGB32C, - .vidc_color_format = MSM_VIDC_FMT_RGBA8888C, - .pixfmt_name = "RGBAC", - }, { .v4l2_color_format = V4L2_PIX_FMT_P010, .vidc_color_format = MSM_VIDC_FMT_P010, diff --git a/driver/platform/pineapple/src/msm_vidc_pineapple.c b/driver/platform/pineapple/src/msm_vidc_pineapple.c index 403d4baa78..6ff980d1e8 100644 --- a/driver/platform/pineapple/src/msm_vidc_pineapple.c +++ b/driver/platform/pineapple/src/msm_vidc_pineapple.c @@ -107,11 +107,6 @@ static struct color_format_info color_format_data_pineapple[] = { .vidc_color_format = MSM_VIDC_FMT_RGBA8888, .pixfmt_name = "RGBA", }, - { - .v4l2_color_format = V4L2_PIX_FMT_VIDC_ARGB32C, - .vidc_color_format = MSM_VIDC_FMT_RGBA8888C, - .pixfmt_name = "RGBAC", - }, { .v4l2_color_format = V4L2_PIX_FMT_P010, .vidc_color_format = MSM_VIDC_FMT_P010, diff --git a/include/uapi/vidc/media/v4l2_vidc_extensions.h b/include/uapi/vidc/media/v4l2_vidc_extensions.h index dcec056301..b433457d9c 100644 --- a/include/uapi/vidc/media/v4l2_vidc_extensions.h +++ b/include/uapi/vidc/media/v4l2_vidc_extensions.h @@ -10,8 +10,6 @@ #include #include -/* 32 RGBA-8-8-8-8 compressed */ -#define V4L2_PIX_FMT_VIDC_ARGB32C v4l2_fourcc('Q', '2', '4', 'C') /* AV1 */ #ifndef V4L2_PIX_FMT_AV1 #define V4L2_PIX_FMT_AV1 v4l2_fourcc('A', 'V', '1', '0') From 3365847f8f14362859b1a3fb1653f87b836555ee Mon Sep 17 00:00:00 2001 From: DEEPA GUTHYAPPA MADIVALARA Date: Thu, 4 May 2023 12:36:58 -0700 Subject: [PATCH 0904/1061] Revert "video: driver: move NOC registers programming from Firmware to Software" This reverts commit 862bae6da81b6777e1a2739fb1a72879fe448f92. Change-Id: Ida18c4ba7cc352240f5cc8596d9ac8caa45e6e04 --- driver/variant/iris33/src/msm_vidc_iris33.c | 95 +-------------------- driver/vidc/src/msm_vidc_driver.c | 3 + driver/vidc/src/venus_hfi_response.c | 10 +-- 3 files changed, 11 insertions(+), 97 deletions(-) diff --git a/driver/variant/iris33/src/msm_vidc_iris33.c b/driver/variant/iris33/src/msm_vidc_iris33.c index a85874e576..acc7d31c88 100644 --- a/driver/variant/iris33/src/msm_vidc_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_iris33.c @@ -118,18 +118,6 @@ typedef enum */ #define VCODEC_SS_IDLE_STATUSn (VCODEC_BASE_OFFS_IRIS33 + 0x70) -/* - * -------------------------------------------------------------------------- - * MODULE: VCODEC_NOC - * -------------------------------------------------------------------------- - */ -#define NOC_BASE_OFFS 0x00010000 -#define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_MAINCTL_LOW (NOC_BASE_OFFS + 0xA008) -#define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRCLR_LOW (NOC_BASE_OFFS + 0xA018) -#define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG2_LOW (NOC_BASE_OFFS + 0xA030) -#define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG3_LOW (NOC_BASE_OFFS + 0xA038) -#define NOC_SIDEBANDMANAGER_MAIN_SIDEBANDMANAGER_FAULTINEN0_LOW (NOC_BASE_OFFS + 0x7040) - static int __interrupt_init_iris33(struct msm_vidc_core *vidc_core) { struct msm_vidc_core *core = vidc_core; @@ -760,38 +748,18 @@ static int __power_on_iris33(struct msm_vidc_core *core) __set_registers(core); - /* Programm NOC error registers before releasing xo reset */ - rc = __write_register(core, - NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_MAINCTL_LOW, 0x3); - if (rc) { - d_vpr_e( - "%s: failed to set NOC_ERL_MAIN_ERRORLOGGER_MAINCTL_LOW\n", - __func__); - goto fail_program_noc_regs; - } - rc = __write_register(core, - NOC_SIDEBANDMANAGER_MAIN_SIDEBANDMANAGER_FAULTINEN0_LOW, 0x1); - if (rc) { - d_vpr_e( - "%s: failed to set NOC_SIDEBANDMANAGER_FAULTINEN0_LOW\n", - __func__); - goto fail_program_noc_regs; - } - /* release reset control for other consumers */ rc = call_res_op(core, reset_control_release, core, "video_xo_reset"); if (rc) { d_vpr_e("%s: failed to release video_xo_reset reset\n", __func__); goto fail_deassert_xo_reset; } - __interrupt_init_iris33(core); core->intr_status = 0; enable_irq(core->resource->irq); return rc; -fail_program_noc_regs: fail_deassert_xo_reset: fail_assert_xo_reset: fail_power_on_substate: @@ -802,7 +770,6 @@ fail_power_on_controller: call_res_op(core, set_bw, core, 0, 0); fail_vote_buses: msm_vidc_change_core_sub_state(core, CORE_SUBSTATE_POWER_ENABLE, 0, __func__); - return rc; } @@ -908,10 +875,9 @@ static int __watchdog_iris33(struct msm_vidc_core *vidc_core, u32 intr_status) return rc; } -static int __noc_error_info_iris33(struct msm_vidc_core *core) +static int __noc_error_info_iris33(struct msm_vidc_core *vidc_core) { - u32 value, count = 0; - int rc = 0; + struct msm_vidc_core *core = vidc_core; if (!core) { d_vpr_e("%s: invalid params\n", __func__); @@ -954,62 +920,7 @@ static int __noc_error_info_iris33(struct msm_vidc_core *core) d_vpr_e("VCODEC_NOC_ERL_MAIN_ERRLOG3_HIGH: %#x\n", val); */ - if (is_iris33_hw_power_collapsed(core)) { - d_vpr_e("%s: video hardware already power collapsed\n", __func__); - return rc; - } - - /* - * Acquire video_xo_reset to ensure EVA module is - * not doing assert or de-assert on video_xo_reset - * while reading noc registers - */ - d_vpr_e("%s: read NOC ERR LOG registers\n", __func__); - do { - rc = call_res_op(core, reset_control_acquire, core, "video_xo_reset"); - if (!rc) { - break; - } else { - d_vpr_e( - "%s: failed to acquire video_xo_reset control, count %d\n", - __func__, count); - count++; - usleep_range(1000, 1000); - } - } while (count < 100); - - if (count >= 100) { - d_vpr_e("%s: timeout acquiring video_xo_reset\n", __func__); - goto fail_assert_xo_reset; - } - - rc = __read_register(core, - NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG2_LOW, &value); - if (!rc) - d_vpr_e("%s: NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG2_LOW: %#x\n", - __func__, value); - - rc = __read_register(core, - NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG3_LOW, &value); - if (!rc) - d_vpr_e("%s: NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG3_LOW: %#x\n", - __func__, value); - - rc = __write_register(core, - NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRCLR_LOW, 0x1); - if (rc) - d_vpr_e("%s: error clearing NOC reg\n", __func__); - - /* release reset control for other consumers */ - rc = call_res_op(core, reset_control_release, core, "video_xo_reset"); - if (rc) { - d_vpr_e("%s: failed to release video_xo_reset reset\n", __func__); - goto fail_deassert_xo_reset; - } - -fail_deassert_xo_reset: -fail_assert_xo_reset: - return rc; + return 0; } static int __clear_interrupt_iris33(struct msm_vidc_core *vidc_core) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 826954a067..0d0d253a57 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -4570,6 +4570,9 @@ int msm_vidc_smmu_fault_handler(struct iommu_domain *domain, msm_vidc_change_core_sub_state(core, 0, CORE_SUBSTATE_PAGE_FAULT, __func__); core_unlock(core, __func__); + /* print noc error log registers */ + venus_hfi_noc_error_info(core); + msm_vidc_print_core_info(core); /* * Return -ENOSYS to elicit the default behaviour of smmu driver. diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index dcde7fddad..4f04bda9be 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -472,17 +472,17 @@ int handle_system_error(struct msm_vidc_core *core, d_vpr_e("%s: system error received\n", __func__); print_sfr_message(core); + venus_hfi_noc_error_info(core); if (pkt) { /* enable force bugon for requested type */ - if (pkt->type == HFI_SYS_ERROR_FATAL) { + if (pkt->type == HFI_SYS_ERROR_FATAL) bug_on = !!(msm_vidc_enable_bugon & MSM_VIDC_BUG_ON_FATAL); - } else if (pkt->type == HFI_SYS_ERROR_NOC) { + else if (pkt->type == HFI_SYS_ERROR_NOC) bug_on = !!(msm_vidc_enable_bugon & MSM_VIDC_BUG_ON_NOC); - venus_hfi_noc_error_info(core); - } else if (pkt->type == HFI_SYS_ERROR_WD_TIMEOUT) { + else if (pkt->type == HFI_SYS_ERROR_WD_TIMEOUT) bug_on = !!(msm_vidc_enable_bugon & MSM_VIDC_BUG_ON_WD_TIMEOUT); - } + if (bug_on) { d_vpr_e("%s: force bugon for type %#x\n", __func__, pkt->type); MSM_VIDC_FATAL(true); From c2bbf335119467480b5800b0920950b86d23090d Mon Sep 17 00:00:00 2001 From: Deepa Guthyappa Madivalara Date: Fri, 5 May 2023 15:17:08 -0700 Subject: [PATCH 0905/1061] video: driver: move NOC registers programming from Firmware to Software - program required NOC registers in power on - update NOC error handling when fw raises HFI_SYS_ERROR_NOC - skip reading NOC error log registers from smmu fault handler as they are updated only when sys error from firmware is processed and fault handling is completed Change-Id: If396995d8bd6c77e6a92c0c2a8a7fb245be48854 Signed-off-by: Deepa Guthyappa Madivalara --- driver/variant/iris33/src/msm_vidc_iris33.c | 95 ++++++++++++++++++++- driver/vidc/src/msm_vidc_driver.c | 3 - driver/vidc/src/venus_hfi_response.c | 10 +-- 3 files changed, 97 insertions(+), 11 deletions(-) diff --git a/driver/variant/iris33/src/msm_vidc_iris33.c b/driver/variant/iris33/src/msm_vidc_iris33.c index acc7d31c88..a85874e576 100644 --- a/driver/variant/iris33/src/msm_vidc_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_iris33.c @@ -118,6 +118,18 @@ typedef enum */ #define VCODEC_SS_IDLE_STATUSn (VCODEC_BASE_OFFS_IRIS33 + 0x70) +/* + * -------------------------------------------------------------------------- + * MODULE: VCODEC_NOC + * -------------------------------------------------------------------------- + */ +#define NOC_BASE_OFFS 0x00010000 +#define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_MAINCTL_LOW (NOC_BASE_OFFS + 0xA008) +#define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRCLR_LOW (NOC_BASE_OFFS + 0xA018) +#define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG2_LOW (NOC_BASE_OFFS + 0xA030) +#define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG3_LOW (NOC_BASE_OFFS + 0xA038) +#define NOC_SIDEBANDMANAGER_MAIN_SIDEBANDMANAGER_FAULTINEN0_LOW (NOC_BASE_OFFS + 0x7040) + static int __interrupt_init_iris33(struct msm_vidc_core *vidc_core) { struct msm_vidc_core *core = vidc_core; @@ -748,18 +760,38 @@ static int __power_on_iris33(struct msm_vidc_core *core) __set_registers(core); + /* Programm NOC error registers before releasing xo reset */ + rc = __write_register(core, + NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_MAINCTL_LOW, 0x3); + if (rc) { + d_vpr_e( + "%s: failed to set NOC_ERL_MAIN_ERRORLOGGER_MAINCTL_LOW\n", + __func__); + goto fail_program_noc_regs; + } + rc = __write_register(core, + NOC_SIDEBANDMANAGER_MAIN_SIDEBANDMANAGER_FAULTINEN0_LOW, 0x1); + if (rc) { + d_vpr_e( + "%s: failed to set NOC_SIDEBANDMANAGER_FAULTINEN0_LOW\n", + __func__); + goto fail_program_noc_regs; + } + /* release reset control for other consumers */ rc = call_res_op(core, reset_control_release, core, "video_xo_reset"); if (rc) { d_vpr_e("%s: failed to release video_xo_reset reset\n", __func__); goto fail_deassert_xo_reset; } + __interrupt_init_iris33(core); core->intr_status = 0; enable_irq(core->resource->irq); return rc; +fail_program_noc_regs: fail_deassert_xo_reset: fail_assert_xo_reset: fail_power_on_substate: @@ -770,6 +802,7 @@ fail_power_on_controller: call_res_op(core, set_bw, core, 0, 0); fail_vote_buses: msm_vidc_change_core_sub_state(core, CORE_SUBSTATE_POWER_ENABLE, 0, __func__); + return rc; } @@ -875,9 +908,10 @@ static int __watchdog_iris33(struct msm_vidc_core *vidc_core, u32 intr_status) return rc; } -static int __noc_error_info_iris33(struct msm_vidc_core *vidc_core) +static int __noc_error_info_iris33(struct msm_vidc_core *core) { - struct msm_vidc_core *core = vidc_core; + u32 value, count = 0; + int rc = 0; if (!core) { d_vpr_e("%s: invalid params\n", __func__); @@ -920,7 +954,62 @@ static int __noc_error_info_iris33(struct msm_vidc_core *vidc_core) d_vpr_e("VCODEC_NOC_ERL_MAIN_ERRLOG3_HIGH: %#x\n", val); */ - return 0; + if (is_iris33_hw_power_collapsed(core)) { + d_vpr_e("%s: video hardware already power collapsed\n", __func__); + return rc; + } + + /* + * Acquire video_xo_reset to ensure EVA module is + * not doing assert or de-assert on video_xo_reset + * while reading noc registers + */ + d_vpr_e("%s: read NOC ERR LOG registers\n", __func__); + do { + rc = call_res_op(core, reset_control_acquire, core, "video_xo_reset"); + if (!rc) { + break; + } else { + d_vpr_e( + "%s: failed to acquire video_xo_reset control, count %d\n", + __func__, count); + count++; + usleep_range(1000, 1000); + } + } while (count < 100); + + if (count >= 100) { + d_vpr_e("%s: timeout acquiring video_xo_reset\n", __func__); + goto fail_assert_xo_reset; + } + + rc = __read_register(core, + NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG2_LOW, &value); + if (!rc) + d_vpr_e("%s: NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG2_LOW: %#x\n", + __func__, value); + + rc = __read_register(core, + NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG3_LOW, &value); + if (!rc) + d_vpr_e("%s: NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG3_LOW: %#x\n", + __func__, value); + + rc = __write_register(core, + NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRCLR_LOW, 0x1); + if (rc) + d_vpr_e("%s: error clearing NOC reg\n", __func__); + + /* release reset control for other consumers */ + rc = call_res_op(core, reset_control_release, core, "video_xo_reset"); + if (rc) { + d_vpr_e("%s: failed to release video_xo_reset reset\n", __func__); + goto fail_deassert_xo_reset; + } + +fail_deassert_xo_reset: +fail_assert_xo_reset: + return rc; } static int __clear_interrupt_iris33(struct msm_vidc_core *vidc_core) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 9c4d0a413a..df92a3c1d3 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -4562,9 +4562,6 @@ int msm_vidc_smmu_fault_handler(struct iommu_domain *domain, msm_vidc_change_core_sub_state(core, 0, CORE_SUBSTATE_PAGE_FAULT, __func__); core_unlock(core, __func__); - /* print noc error log registers */ - venus_hfi_noc_error_info(core); - msm_vidc_print_core_info(core); /* * Return -ENOSYS to elicit the default behaviour of smmu driver. diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index 8cf9ba600b..bc80c53148 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -472,17 +472,17 @@ int handle_system_error(struct msm_vidc_core *core, d_vpr_e("%s: system error received\n", __func__); print_sfr_message(core); - venus_hfi_noc_error_info(core); if (pkt) { /* enable force bugon for requested type */ - if (pkt->type == HFI_SYS_ERROR_FATAL) + if (pkt->type == HFI_SYS_ERROR_FATAL) { bug_on = !!(msm_vidc_enable_bugon & MSM_VIDC_BUG_ON_FATAL); - else if (pkt->type == HFI_SYS_ERROR_NOC) + } else if (pkt->type == HFI_SYS_ERROR_NOC) { bug_on = !!(msm_vidc_enable_bugon & MSM_VIDC_BUG_ON_NOC); - else if (pkt->type == HFI_SYS_ERROR_WD_TIMEOUT) + venus_hfi_noc_error_info(core); + } else if (pkt->type == HFI_SYS_ERROR_WD_TIMEOUT) { bug_on = !!(msm_vidc_enable_bugon & MSM_VIDC_BUG_ON_WD_TIMEOUT); - + } if (bug_on) { d_vpr_e("%s: force bugon for type %#x\n", __func__, pkt->type); MSM_VIDC_FATAL(true); From 29f2ca242972fcc6bc8c59f47e0c94163f2fb065 Mon Sep 17 00:00:00 2001 From: Ashish Patil Date: Mon, 8 May 2023 10:48:46 -0700 Subject: [PATCH 0906/1061] video: driver: updating the residency calculation logic - Instead of accumulating the residency stats for complete session, the residency stats for previous instance of a particular clock were overwritten by residency stats of next instance of that clock. - Modified to the logic to accumulate the residency stats for complete session. Change-Id: Ic37579ba0c28f86cda41481b0615a0bb9a54846e Signed-off-by: Ashish Patil --- driver/vidc/src/resources.c | 2 +- driver/vidc/src/resources_ext.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/driver/vidc/src/resources.c b/driver/vidc/src/resources.c index 6d0fded470..f7ed7f40fe 100644 --- a/driver/vidc/src/resources.c +++ b/driver/vidc/src/resources.c @@ -1284,7 +1284,7 @@ static int update_residency_stats( prev_residency = get_residency_stats(cl, cl->prev); if (prev_residency) { if (prev_residency->start_time_us) - prev_residency->total_time_us = cur_time_us - prev_residency->start_time_us; + prev_residency->total_time_us += cur_time_us - prev_residency->start_time_us; /* reset start time us */ prev_residency->start_time_us = 0; diff --git a/driver/vidc/src/resources_ext.c b/driver/vidc/src/resources_ext.c index a88ecb8a6e..66f6e073c8 100644 --- a/driver/vidc/src/resources_ext.c +++ b/driver/vidc/src/resources_ext.c @@ -357,7 +357,7 @@ static int update_residency_stats( prev_residency = get_residency_stats(cl, cl->prev); if (prev_residency) { if (prev_residency->start_time_us) - prev_residency->total_time_us = cur_time_us - prev_residency->start_time_us; + prev_residency->total_time_us += cur_time_us - prev_residency->start_time_us; /* reset start time us */ prev_residency->start_time_us = 0; From 0eee7ddf6d282568d6a29b670e1b34716a8620e0 Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Tue, 9 May 2023 14:47:20 -0700 Subject: [PATCH 0907/1061] video: driver: print offsets in packet log print read index and write index in packet log for easier debugging. Change-Id: I4ba797ed141d74ba51941ef8a9f09db359b407e9 Signed-off-by: Darshana Patil --- driver/vidc/src/venus_hfi_queue.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/driver/vidc/src/venus_hfi_queue.c b/driver/vidc/src/venus_hfi_queue.c index cb5aa1b472..d6be4adf20 100644 --- a/driver/vidc/src/venus_hfi_queue.c +++ b/driver/vidc/src/venus_hfi_queue.c @@ -31,6 +31,8 @@ static void __dump_packet(u8 *packet, const char *function, void *qinfo) { u32 c = 0, session_id, packet_size = *(u32 *)packet; const int row_size = 32; + struct msm_vidc_iface_q_info *q; + struct hfi_queue_header *q_hdr; /* * row must contain enough for 0xdeadbaad * 8 to be converted into * "de ad ba ab " * 8 + '\0' @@ -38,7 +40,10 @@ static void __dump_packet(u8 *packet, const char *function, void *qinfo) char row[3 * 32]; session_id = *((u32 *)packet + 1); - d_vpr_t("%08x: %s: %pK\n", session_id, function, qinfo); + q = (struct msm_vidc_iface_q_info *)qinfo; + q_hdr = (struct hfi_queue_header *)q->q_hdr; + d_vpr_t("%08x: %s: %pK: read_idx = %u, write_idx = %u\n", + session_id, function, qinfo, q_hdr->qhdr_read_idx, q_hdr->qhdr_write_idx); for (c = 0; c * row_size < packet_size; ++c) { int bytes_to_read = ((c + 1) * row_size > packet_size) ? From 52e24a2f0c958343b0e43c6cab9413a12723ddf5 Mon Sep 17 00:00:00 2001 From: Gaviraju Doddabettahalli Bettegowda Date: Wed, 10 May 2023 08:49:56 +0530 Subject: [PATCH 0908/1061] video: driver: Update align buffer size For decoder input buffers, firmware (BSE HW) needs 256 aligned buffer size otherwise it will truncate or ignore the data after 256 aligned size which may lead to error concealment. To resolve above issue, need to update buffer size aligned with 256 Change-Id: I7782d23e293a63ca9cb650fbefc574e5d4ad2f24 Signed-off-by: Gaviraju Doddabettahalli Bettegowda --- driver/vidc/src/hfi_packet.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/driver/vidc/src/hfi_packet.c b/driver/vidc/src/hfi_packet.c index c0227c21b3..9fcbf239df 100644 --- a/driver/vidc/src/hfi_packet.c +++ b/driver/vidc/src/hfi_packet.c @@ -323,6 +323,13 @@ int get_hfi_buffer(struct msm_vidc_inst *inst, buf->base_address = buffer->device_addr; buf->addr_offset = 0; buf->buffer_size = buffer->buffer_size; + /* + * for decoder input buffers, firmware (BSE HW) needs 256 aligned + * buffer size otherwise it will truncate or ignore the data after 256 + * aligned size which may lead to error concealment + */ + if (is_decode_session(inst) && is_input_buffer(buffer->type)) + buf->buffer_size = ALIGN(buffer->buffer_size, 256); buf->data_offset = buffer->data_offset; buf->data_size = buffer->data_size; if (buffer->attr & MSM_VIDC_ATTR_READ_ONLY) From a9547c3239afc47c862d56cee50118faab53922e Mon Sep 17 00:00:00 2001 From: Deepa Guthyappa Madivalara Date: Wed, 10 May 2023 16:47:57 -0700 Subject: [PATCH 0909/1061] video: driver: Clear NOC_ErrCLr_low only in power on - In noc error handler do not clear NOC_ERL_ErrorLogger_main_ErrorLogger_ErrClr_Low, to avoid sending any pending transactions, move clearing to power on Change-Id: Ib620f3dcb93b92f2c03eb2126c47d5b97526556d Signed-off-by: Deepa Guthyappa Madivalara --- driver/variant/iris33/src/msm_vidc_iris33.c | 19 +++++++++++++------ 1 file changed, 13 insertions(+), 6 deletions(-) diff --git a/driver/variant/iris33/src/msm_vidc_iris33.c b/driver/variant/iris33/src/msm_vidc_iris33.c index a85874e576..2e2f476197 100644 --- a/driver/variant/iris33/src/msm_vidc_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_iris33.c @@ -760,7 +760,19 @@ static int __power_on_iris33(struct msm_vidc_core *core) __set_registers(core); - /* Programm NOC error registers before releasing xo reset */ + /* + * Programm NOC error registers before releasing xo reset + * Clear error logger registers and then enable StallEn + */ + rc = __write_register(core, + NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRCLR_LOW, 0x1); + if (rc) { + d_vpr_e( + "%s: error clearing NOC_MAIN_ERRORLOGGER_ERRCLR_LOW\n", + __func__); + goto fail_program_noc_regs; + } + rc = __write_register(core, NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_MAINCTL_LOW, 0x3); if (rc) { @@ -995,11 +1007,6 @@ static int __noc_error_info_iris33(struct msm_vidc_core *core) d_vpr_e("%s: NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG3_LOW: %#x\n", __func__, value); - rc = __write_register(core, - NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRCLR_LOW, 0x1); - if (rc) - d_vpr_e("%s: error clearing NOC reg\n", __func__); - /* release reset control for other consumers */ rc = call_res_op(core, reset_control_release, core, "video_xo_reset"); if (rc) { From c971548bee5c93b91239f8185d6a5e5b0aac1f13 Mon Sep 17 00:00:00 2001 From: Deepa Guthyappa Madivalara Date: Wed, 10 May 2023 17:12:59 -0700 Subject: [PATCH 0910/1061] video: driver: execute NOC reset sequence always in power off - always execute noc reset sequnce in power off - try to disable hw power always before power down Change-Id: I76757cccea06a398d1a79310edb688608607a413 Signed-off-by: Deepa Guthyappa Madivalara --- driver/variant/iris33/src/msm_vidc_iris33.c | 33 ++++++++------------- 1 file changed, 12 insertions(+), 21 deletions(-) diff --git a/driver/variant/iris33/src/msm_vidc_iris33.c b/driver/variant/iris33/src/msm_vidc_iris33.c index a85874e576..541c52c893 100644 --- a/driver/variant/iris33/src/msm_vidc_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_iris33.c @@ -285,30 +285,21 @@ static int __power_off_iris33_hardware(struct msm_vidc_core *core) bool pwr_collapsed = false; /* - * Incase hw power control is enabled, for both CPU WD, video - * hw unresponsive cases, check for power status to decide on - * executing NOC reset sequence before disabling power. If there + * Incase hw power control is enabled, for any error case + * CPU WD, video hw unresponsive cases, NOC error case etc, + * execute NOC reset sequence before disabling power. If there * is no CPU WD and hw power control is enabled, fw is expected * to power collapse video hw always. */ if (is_core_sub_state(core, CORE_SUBSTATE_FW_PWR_CTRL)) { pwr_collapsed = is_iris33_hw_power_collapsed(core); - if (is_core_sub_state(core, CORE_SUBSTATE_CPU_WATCHDOG) || - is_core_sub_state(core, CORE_SUBSTATE_VIDEO_UNRESPONSIVE)) { - if (pwr_collapsed) { - d_vpr_e("%s: video hw power collapsed %s\n", - __func__, core->sub_state_name); - goto disable_power; - } else { - d_vpr_e("%s: video hw is power ON %s\n", - __func__, core->sub_state_name); - } - } else { - if (!pwr_collapsed) - d_vpr_e("%s: video hw is not power collapsed\n", __func__); - - d_vpr_h("%s: disabling hw power\n", __func__); + if (pwr_collapsed) { + d_vpr_h("%s: video hw power collapsed %s\n", + __func__, core->sub_state_name); goto disable_power; + } else { + d_vpr_e("%s: video hw is power ON, try power collpase hw %s\n", + __func__, core->sub_state_name); } } @@ -321,7 +312,7 @@ static int __power_off_iris33_hardware(struct msm_vidc_core *core) return rc; if (value) { - d_vpr_h("%s: core clock config not enabled, enabling it to read vcodec registers\n", + d_vpr_e("%s: core clock config not enabled, enabling it to read vcodec registers\n", __func__); rc = __write_register(core, WRAPPER_CORE_CLOCK_CONFIG_IRIS33, 0); if (rc) @@ -336,7 +327,7 @@ static int __power_off_iris33_hardware(struct msm_vidc_core *core) rc = __read_register_with_poll_timeout(core, VCODEC_SS_IDLE_STATUSn + 4*i, 0x400000, 0x400000, 2000, 20000); if (rc) - d_vpr_h("%s: VCODEC_SS_IDLE_STATUSn (%d) is not idle (%#x)\n", + d_vpr_e("%s: VCODEC_SS_IDLE_STATUSn (%d) is not idle (%#x)\n", __func__, i, value); } @@ -349,7 +340,7 @@ static int __power_off_iris33_hardware(struct msm_vidc_core *core) rc = __read_register_with_poll_timeout(core, AON_WRAPPER_MVP_NOC_LPI_STATUS, 0x1, 0x1, 200, 2000); if (rc) - d_vpr_h("%s: AON_WRAPPER_MVP_NOC_LPI_CONTROL failed\n", __func__); + d_vpr_e("%s: AON_WRAPPER_MVP_NOC_LPI_CONTROL failed\n", __func__); rc = __write_register_masked(core, AON_WRAPPER_MVP_NOC_LPI_CONTROL, 0x0, BIT(0)); From dbc5f268c97a56b535f6d41a238f2dd8130fdcb3 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Fri, 12 May 2023 11:10:35 -0700 Subject: [PATCH 0911/1061] video: driver: Align dec dpb buffer size calculation with HFI Align decoder dpb buffer size calculated via HFI macro HFI_NV12_UBWC_IL_CALC_BUF_SIZE_V2 with HFI file Change-Id: I431bbee8bca07d87713bc7706259f679ab0734bd Signed-off-by: Akshata Sahukar --- driver/variant/iris33/inc/hfi_buffer_iris33.h | 4 ++-- driver/variant/iris33/src/msm_vidc_buffer_iris33.c | 9 ++++++++- 2 files changed, 10 insertions(+), 3 deletions(-) diff --git a/driver/variant/iris33/inc/hfi_buffer_iris33.h b/driver/variant/iris33/inc/hfi_buffer_iris33.h index 2f2bc169df..81a168df30 100644 --- a/driver/variant/iris33/inc/hfi_buffer_iris33.h +++ b/driver/variant/iris33/inc/hfi_buffer_iris33.h @@ -89,7 +89,7 @@ typedef HFI_U32 HFI_BOOL; y_buffer_height_multiple, uv_stride_multiple, \ uv_buffer_height_multiple, y_metadata_stride_multiple, \ y_metadata_buffer_height_multiple, \ - uv_metadata_stride_multiple, uv_metadata_buffer_height_multiple) \ + uv_metadata_stride_multiple, uv_metadata_buffer_height_multiple, binterlace) \ do \ { \ HFI_U32 y_buf_size, uv_buf_size, y_meta_size, uv_meta_size; \ @@ -122,7 +122,7 @@ typedef HFI_U32 HFI_BOOL; HFI_UBWC_METADATA_PLANE_BUFFER_SIZE(uv_meta_size, stride, \ _height); \ buf_size = (y_buf_size + uv_buf_size + y_meta_size + \ - uv_meta_size) << 1;\ + uv_meta_size) << binterlace;\ } while (0) #define HFI_YUV420_TP10_CALC_Y_STRIDE(stride, frame_width, stride_multiple) \ diff --git a/driver/variant/iris33/src/msm_vidc_buffer_iris33.c b/driver/variant/iris33/src/msm_vidc_buffer_iris33.c index 0ebcc4c40d..dc13f60d24 100644 --- a/driver/variant/iris33/src/msm_vidc_buffer_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_buffer_iris33.c @@ -266,6 +266,7 @@ static u32 msm_vidc_decoder_dpb_size_iris33(struct msm_vidc_inst *inst) u32 size = 0; u32 color_fmt; u32 width, height; + u32 interlace = 0; struct v4l2_format *f; if (!inst) { @@ -292,6 +293,11 @@ static u32 msm_vidc_decoder_dpb_size_iris33(struct msm_vidc_inst *inst) width = f->fmt.pix_mp.width; height = f->fmt.pix_mp.height; + + if (inst->codec == MSM_VIDC_H264 && + res_is_less_than_or_equal_to(width, height, 1920, 1088)) + interlace = 1; + if (color_fmt == MSM_VIDC_FMT_NV12 || color_fmt == MSM_VIDC_FMT_NV12C) { color_fmt = MSM_VIDC_FMT_NV12C; @@ -303,7 +309,8 @@ static u32 msm_vidc_decoder_dpb_size_iris33(struct msm_vidc_inst *inst) video_y_meta_stride(color_fmt, width), video_y_meta_scanlines(color_fmt, height), video_uv_meta_stride(color_fmt, width), - video_uv_meta_scanlines(color_fmt, height)); + video_uv_meta_scanlines(color_fmt, height), + interlace); } else if (color_fmt == MSM_VIDC_FMT_P010 || color_fmt == MSM_VIDC_FMT_TP10C) { color_fmt = MSM_VIDC_FMT_TP10C; From 4ccc58cfa9abb8147cdbf924179ca01236d71bfd Mon Sep 17 00:00:00 2001 From: Vedang Nagar Date: Sat, 13 May 2023 01:50:22 +0530 Subject: [PATCH 0912/1061] video: driver: Update BaseLayer priority ID as Dynamic Property Update BaseLayerPriority ID as dynamic property for pineapple Change-Id: Ib036c8c47190842dff76fa45d50a65385ef28dca Signed-off-by: Vedang Nagar --- driver/platform/pineapple/src/msm_vidc_pineapple.c | 2 +- driver/platform/pineapple/src/pineapple.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/driver/platform/pineapple/src/msm_vidc_pineapple.c b/driver/platform/pineapple/src/msm_vidc_pineapple.c index 6ff980d1e8..a0ed2c61cc 100644 --- a/driver/platform/pineapple/src/msm_vidc_pineapple.c +++ b/driver/platform/pineapple/src/msm_vidc_pineapple.c @@ -942,7 +942,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { 0, MAX_BASE_LAYER_PRIORITY_ID, 1, 0, V4L2_CID_MPEG_VIDEO_BASELAYER_PRIORITY_ID, HFI_PROP_BASELAYER_PRIORITYID, - CAP_FLAG_OUTPUT_PORT}, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, {IR_TYPE, ENC, H264|HEVC, V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_RANDOM, diff --git a/driver/platform/pineapple/src/pineapple.c b/driver/platform/pineapple/src/pineapple.c index 09a9bcca8b..8d3be9e6f4 100644 --- a/driver/platform/pineapple/src/pineapple.c +++ b/driver/platform/pineapple/src/pineapple.c @@ -614,7 +614,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { 0, MAX_BASE_LAYER_PRIORITY_ID, 1, 0, V4L2_CID_MPEG_VIDEO_BASELAYER_PRIORITY_ID, HFI_PROP_BASELAYER_PRIORITYID, - CAP_FLAG_OUTPUT_PORT}, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, {AU_DELIMITER, ENC, H264|HEVC, 0, 1, 1, 0, From 1b94bd81741a8fff51a5c3b67a327b84a21df6e2 Mon Sep 17 00:00:00 2001 From: Deepa Guthyappa Madivalara Date: Mon, 1 May 2023 11:39:56 -0700 Subject: [PATCH 0913/1061] video: driver: amend frame/operating rate settings Amend frame rate or operating rate settings for encoder to preserve precision value if numerator is greater than 1. Change-Id: Idc84b07f7a5558b564efaac21d663a0deda207c2 Signed-off-by: Maheshwar Ajja --- driver/vidc/src/msm_venc.c | 54 ++++++++++++++++++-------------------- 1 file changed, 25 insertions(+), 29 deletions(-) diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index 13c14ba2be..6e2b24749d 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -1667,8 +1667,8 @@ int msm_venc_s_param(struct msm_vidc_inst *inst, { int rc = 0; struct v4l2_fract *timeperframe = NULL; - u32 q16_rate, max_rate, default_rate; - u64 us_per_frame = 0, input_rate = 0; + u32 input_rate_q16, max_rate_q16; + u32 input_rate, default_rate; bool is_frame_rate = false; if (!inst || !s_parm) { @@ -1677,14 +1677,16 @@ int msm_venc_s_param(struct msm_vidc_inst *inst, } if (s_parm->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) { + /* operating rate */ timeperframe = &s_parm->parm.output.timeperframe; - max_rate = inst->capabilities[OPERATING_RATE].max >> 16; + max_rate_q16 = inst->capabilities[OPERATING_RATE].max; default_rate = inst->capabilities[OPERATING_RATE].value >> 16; s_parm->parm.output.capability = V4L2_CAP_TIMEPERFRAME; } else { + /* frame rate */ timeperframe = &s_parm->parm.capture.timeperframe; is_frame_rate = true; - max_rate = inst->capabilities[FRAME_RATE].max >> 16; + max_rate_q16 = inst->capabilities[FRAME_RATE].max; default_rate = inst->capabilities[FRAME_RATE].value >> 16; s_parm->parm.capture.capability = V4L2_CAP_TIMEPERFRAME; } @@ -1698,25 +1700,26 @@ int msm_venc_s_param(struct msm_vidc_inst *inst, timeperframe->denominator = default_rate; } - us_per_frame = timeperframe->numerator * (u64)USEC_PER_SEC; - do_div(us_per_frame, timeperframe->denominator); + input_rate = (timeperframe->denominator / timeperframe->numerator); + if (input_rate > (max_rate_q16 >> 16)) { + input_rate_q16 = max_rate_q16; + i_vpr_h(inst, "%s: type %s, %s value %u limited to %u\n", + __func__, v4l2_type_name(s_parm->type), + is_frame_rate ? "frame rate" : "operating rate", + input_rate_q16, max_rate_q16); + } else { + input_rate_q16 = input_rate << 16; + input_rate_q16 |= + (timeperframe->denominator % timeperframe->numerator); - if (!us_per_frame) { - i_vpr_e(inst, "%s: us_per_frame is zero\n", __func__); - rc = -EINVAL; - goto exit; } - - input_rate = (u64)USEC_PER_SEC; - do_div(input_rate, us_per_frame); - - i_vpr_h(inst, "%s: type %s, %s value %llu\n", + i_vpr_h(inst, "%s: type %s, %s value %u\n", __func__, v4l2_type_name(s_parm->type), - is_frame_rate ? "frame rate" : "operating rate", input_rate); + is_frame_rate ? "frame rate" : "operating rate", + input_rate_q16 >> 16); - q16_rate = (u32)input_rate << 16; msm_vidc_update_cap_value(inst, is_frame_rate ? FRAME_RATE : OPERATING_RATE, - q16_rate, __func__); + input_rate_q16, __func__); if (is_realtime_session(inst) && ((s_parm->type == INPUT_MPLANE && inst->bufq[INPUT_PORT].vb2q->streaming) || (s_parm->type == OUTPUT_MPLANE && inst->bufq[OUTPUT_PORT].vb2q->streaming))) { @@ -1725,13 +1728,6 @@ int msm_venc_s_param(struct msm_vidc_inst *inst, i_vpr_e(inst, "%s: unsupported load\n", __func__); goto reset_rate; } - rc = input_rate > max_rate; - if (rc) { - i_vpr_e(inst, "%s: unsupported rate %llu, max %u\n", __func__, - input_rate, max_rate); - rc = -ENOMEM; - goto reset_rate; - } } if (is_frame_rate) @@ -1750,22 +1746,22 @@ int msm_venc_s_param(struct msm_vidc_inst *inst, HFI_HOST_FLAGS_NONE, HFI_PORT_BITSTREAM, HFI_PAYLOAD_Q16, - &q16_rate, + &input_rate_q16, sizeof(u32)); if (rc) { i_vpr_e(inst, "%s: failed to set frame rate to fw\n", __func__); goto exit; } - inst->auto_framerate = q16_rate; + inst->auto_framerate = input_rate_q16; } return 0; reset_rate: if (rc) { - i_vpr_e(inst, "%s: setting rate %llu failed, reset to %u\n", __func__, - input_rate, default_rate); + i_vpr_e(inst, "%s: setting rate %u failed, reset to %u\n", __func__, + input_rate_q16 >> 16, default_rate); msm_vidc_update_cap_value(inst, is_frame_rate ? FRAME_RATE : OPERATING_RATE, default_rate << 16, __func__); } From 2ba0f6e1e730530177a53dfa8ded2c3ab0a85ad9 Mon Sep 17 00:00:00 2001 From: Deepa Guthyappa Madivalara Date: Tue, 25 Apr 2023 15:28:58 -0700 Subject: [PATCH 0914/1061] video: driver: operating rate changes for latency improvements 1. allow any client set operating rate (less than 2^15) 2. remove operating rate dependency for admission control 3. allow turbo for low latency case as well Change-Id: I4b0f29c3756a592a9baedec8996653e5cb5292d5 Signed-off-by: Deepa Guthyappa Madivalara --- .../pineapple/src/msm_vidc_pineapple.c | 12 +---- .../iris33/src/msm_vidc_power_iris33.c | 16 +++--- driver/vidc/inc/msm_vidc_driver.h | 1 - driver/vidc/inc/msm_vidc_power.h | 1 - driver/vidc/src/msm_vidc_driver.c | 52 +++++++++++++++---- driver/vidc/src/msm_vidc_power.c | 30 ----------- 6 files changed, 53 insertions(+), 59 deletions(-) diff --git a/driver/platform/pineapple/src/msm_vidc_pineapple.c b/driver/platform/pineapple/src/msm_vidc_pineapple.c index 6ff980d1e8..917a448356 100644 --- a/driver/platform/pineapple/src/msm_vidc_pineapple.c +++ b/driver/platform/pineapple/src/msm_vidc_pineapple.c @@ -537,19 +537,11 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, {OPERATING_RATE, ENC, CODECS_ALL, - (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), + (MINIMUM_FPS << 16), INT_MAX, 1, (DEFAULT_FPS << 16)}, {OPERATING_RATE, DEC, CODECS_ALL, - (MINIMUM_FPS << 16), (MAXIMUM_DEC_FPS << 16), - 1, (DEFAULT_FPS << 16), - V4L2_CID_MPEG_VIDC_OPERATING_RATE, - 0, - CAP_FLAG_OUTPUT_PORT | - CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - - {OPERATING_RATE, DEC, VP9, - (MINIMUM_FPS << 16), (MAXIMUM_OVERRIDE_VP9_FPS << 16), + (MINIMUM_FPS << 16), INT_MAX, 1, (DEFAULT_FPS << 16), V4L2_CID_MPEG_VIDC_OPERATING_RATE, 0, diff --git a/driver/variant/iris33/src/msm_vidc_power_iris33.c b/driver/variant/iris33/src/msm_vidc_power_iris33.c index c4f6e9dbf7..00e7825bec 100644 --- a/driver/variant/iris33/src/msm_vidc_power_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_power_iris33.c @@ -452,18 +452,22 @@ static u64 msm_vidc_calc_freq_iris33_new(struct msm_vidc_inst *inst, u32 data_si freq = (u64)codec_output.hw_min_freq * 1000000; /* Convert to Hz */ - i_vpr_p(inst, "%s: filled len %d, required freq %llu, vpp %u, vsp %u, tensilica %u, hw_freq %u, fps %u, mbpf %u\n", + i_vpr_p(inst, + "%s: filled len %d, required freq %llu, vpp %u, vsp %u, tensilica %u, hw_freq %u, fps %u, mbpf %u\n", __func__, data_size, freq, codec_output.vpp_min_freq, codec_output.vsp_min_freq, codec_output.tensilica_min_freq, codec_output.hw_min_freq, fps, mbpf); - if (inst->codec == MSM_VIDC_AV1 || (inst->iframe && is_hevc_10bit_decode_session(inst)) || - (!is_realtime_session(inst))) { + if (!is_realtime_session(inst) || + inst->codec == MSM_VIDC_AV1 || + is_lowlatency_session(inst) || + (inst->iframe && is_hevc_10bit_decode_session(inst))) { /* * TURBO is only allowed for: - * 1. AV1 decoding session - * 2. 10-bit I-Frame decoding session - * 3. NRT decoding/encoding session + * - NRT decoding/encoding session + * - AV1 decoding session + * - Low latency session + * - 10-bit I-Frame decoding session * limit to NOM for all other cases */ } else { diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index a1af43b97c..4673e1a153 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -567,7 +567,6 @@ int msm_vidc_update_debug_str(struct msm_vidc_inst *inst); void msm_vidc_allow_dcvs(struct msm_vidc_inst *inst); bool msm_vidc_allow_decode_batch(struct msm_vidc_inst *inst); int msm_vidc_check_session_supported(struct msm_vidc_inst *inst); -bool msm_vidc_ignore_session_load(struct msm_vidc_inst *inst); int msm_vidc_check_core_mbps(struct msm_vidc_inst *inst); int msm_vidc_check_core_mbpf(struct msm_vidc_inst *inst); int msm_vidc_check_scaling_supported(struct msm_vidc_inst *inst); diff --git a/driver/vidc/inc/msm_vidc_power.h b/driver/vidc/inc/msm_vidc_power.h index b0d2d5c66f..fd1cd19bc0 100644 --- a/driver/vidc/inc/msm_vidc_power.h +++ b/driver/vidc/inc/msm_vidc_power.h @@ -251,7 +251,6 @@ static inline int __bpp(enum msm_vidc_colorformat_type f) } u64 msm_vidc_max_freq(struct msm_vidc_inst* inst); -int msm_vidc_get_inst_load(struct msm_vidc_inst *inst); int msm_vidc_scale_power(struct msm_vidc_inst *inst, bool scale_buses); void msm_vidc_power_data_reset(struct msm_vidc_inst *inst); diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index df92a3c1d3..1dc2cf9b6d 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -5408,7 +5408,37 @@ static int msm_vidc_print_insts_info(struct msm_vidc_core *core) return 0; } -bool msm_vidc_ignore_session_load(struct msm_vidc_inst *inst) { +static int msm_vidc_get_inst_load(struct msm_vidc_inst *inst) +{ + u32 mbpf, fps; + u32 input_rate, timestamp_rate, operating_rate; + + if (!inst) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + /* + * Encoder: consider frame rate + * Decoder: consider max(frame rate, operating rate, + * timestamp rate, input queue rate) + */ + mbpf = msm_vidc_get_mbs_per_frame(inst); + fps = msm_vidc_get_frame_rate(inst); + + if (is_decode_session(inst)) { + input_rate = msm_vidc_get_input_rate(inst); + timestamp_rate = msm_vidc_get_timestamp_rate(inst); + operating_rate = msm_vidc_get_operating_rate(inst); + fps = max(fps, operating_rate); + fps = max(fps, input_rate); + fps = max(fps, timestamp_rate); + } + + return mbpf * fps; +} + +static bool msm_vidc_ignore_session_load(struct msm_vidc_inst *inst) { if (!inst) { d_vpr_e("%s: invalid params\n", __func__); @@ -5416,7 +5446,7 @@ bool msm_vidc_ignore_session_load(struct msm_vidc_inst *inst) { } if (!is_realtime_session(inst) || is_thumbnail_session(inst) || - is_image_session(inst)) + is_image_session(inst) || is_session_error(inst)) return true; return false; @@ -5424,8 +5454,7 @@ bool msm_vidc_ignore_session_load(struct msm_vidc_inst *inst) { int msm_vidc_check_core_mbps(struct msm_vidc_inst *inst) { - u32 mbps = 0, total_mbps = 0, enc_mbps = 0; - u32 critical_mbps = 0; + u64 mbps = 0, total_mbps = 0, enc_mbps = 0, critical_mbps = 0; struct msm_vidc_core *core; struct msm_vidc_inst *instance; @@ -5438,9 +5467,9 @@ int msm_vidc_check_core_mbps(struct msm_vidc_inst *inst) /* skip mbps check for non-realtime, thumnail, image sessions */ if (msm_vidc_ignore_session_load(inst)) { i_vpr_h(inst, - "%s: skip mbps check due to NRT %d, TH %d, IMG %d\n", __func__, - !is_realtime_session(inst), is_thumbnail_session(inst), - is_image_session(inst)); + "%s: skip mbps check due to NRT %d, TH %d, IMG %d, error session %d\n", + __func__, !is_realtime_session(inst), is_thumbnail_session(inst), + is_image_session(inst), is_session_error(inst)); return 0; } @@ -5459,11 +5488,8 @@ int msm_vidc_check_core_mbps(struct msm_vidc_inst *inst) core_lock(core, __func__); list_for_each_entry(instance, &core->instances, list) { - /* ignore invalid/error session */ - if (is_session_error(instance)) - continue; - /* ignore thumbnail, image, and non realtime sessions */ + /* ignore thumbnail, image, non realtime, error sessions */ if (msm_vidc_ignore_session_load(instance)) continue; @@ -5498,6 +5524,10 @@ int msm_vidc_check_core_mbps(struct msm_vidc_inst *inst) core_unlock(core, __func__); } } else if (is_decode_session(inst)){ + /* + * if total_mbps is greater than max_mbps then allow this + * decoder by reducing its piority (moving it to NRT) + */ if (total_mbps > core->capabilities[MAX_MBPS].value) { inst->adjust_priority = RT_DEC_DOWN_PRORITY_OFFSET; i_vpr_h(inst, "%s: pending adjust priority by %d\n", diff --git a/driver/vidc/src/msm_vidc_power.c b/driver/vidc/src/msm_vidc_power.c index 405e80ae59..732970ef2c 100644 --- a/driver/vidc/src/msm_vidc_power.c +++ b/driver/vidc/src/msm_vidc_power.c @@ -112,36 +112,6 @@ u64 msm_vidc_max_freq(struct msm_vidc_inst *inst) return freq; } -int msm_vidc_get_inst_load(struct msm_vidc_inst *inst) -{ - u32 mbpf, fps; - u32 frame_rate, operating_rate, input_rate, timestamp_rate; - - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - /* return zero load for thumbnail and NRT session */ - if (is_thumbnail_session(inst) || !is_realtime_session(inst)) - return 0; - - /* calculate load for RT session */ - mbpf = msm_vidc_get_mbs_per_frame(inst); - frame_rate = msm_vidc_get_frame_rate(inst); - operating_rate = msm_vidc_get_operating_rate(inst); - fps = max(frame_rate, operating_rate); - - if (is_decode_session(inst)) { - input_rate = msm_vidc_get_input_rate(inst); - timestamp_rate = msm_vidc_get_timestamp_rate(inst); - fps = max(fps, input_rate); - fps = max(fps, timestamp_rate); - } - - return mbpf * fps; -} - static int fill_dynamic_stats(struct msm_vidc_inst *inst, struct vidc_bus_vote_data *vote_data) { From 99fa31a0bbfe766a1266a351573fc41c276acefb Mon Sep 17 00:00:00 2001 From: Chen Sun Date: Mon, 15 May 2023 07:03:58 +0530 Subject: [PATCH 0915/1061] video: driver: fix kw issue of pointer NULL checking Add NULL check to fix kw issue of possible NULL dereference Change-Id: Ia2518b43a855831277981a662d10f24e122748ba Signed-off-by: Chen Sun --- driver/vidc/src/msm_vidc_memory_ext.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/driver/vidc/src/msm_vidc_memory_ext.c b/driver/vidc/src/msm_vidc_memory_ext.c index 2ef9d590e1..5609f67c36 100644 --- a/driver/vidc/src/msm_vidc_memory_ext.c +++ b/driver/vidc/src/msm_vidc_memory_ext.c @@ -151,6 +151,12 @@ static int msm_vidc_memory_alloc_ext(struct msm_vidc_core *core, struct msm_vidc } heap = dma_heap_find(heap_name); + if (IS_ERR_OR_NULL(heap)) { + d_vpr_e("%s: dma heap %s find failed\n", __func__, heap_name); + heap = NULL; + rc = -ENOMEM; + goto error; + } mem->dmabuf = dma_heap_buffer_alloc(heap, size, 0, 0); if (IS_ERR_OR_NULL(mem->dmabuf)) { d_vpr_e("%s: dma heap %s alloc failed\n", __func__, heap_name); From 78f8b4095fe5b39f6400bef0c16de60ba9421158 Mon Sep 17 00:00:00 2001 From: Rakshitha Shakamuri Date: Mon, 3 Apr 2023 15:07:01 -0700 Subject: [PATCH 0916/1061] video-driver: additional changes to support bazel Adding new macro to enable bazel compilation by default Change-Id: Id8b9682a99a693c80be65c09b8e4b3d492284b63 Signed-off-by: Rakshitha Shakamuri --- Android.mk | 3 ++- video_modules.bzl | 4 ++-- 2 files changed, 4 insertions(+), 3 deletions(-) diff --git a/Android.mk b/Android.mk index 02288d48f5..49a88afa51 100644 --- a/Android.mk +++ b/Android.mk @@ -35,7 +35,8 @@ LOCAL_MODULE_KBUILD_NAME := msm_video/msm_video.ko LOCAL_MODULE_TAGS := optional LOCAL_MODULE_DEBUG_ENABLE := true LOCAL_MODULE_PATH := $(KERNEL_MODULES_OUT) -ENABLE_DDK_BUILD := false +LOCAL_MODULE_DDK_BUILD := true +LOCAL_MODULE_KO_DIRS := msm_video/msm_video.ko LOCAL_REQUIRED_MODULES := mmrm-module-symvers LOCAL_REQUIRED_MODULES += hw-fence-module-symvers diff --git a/video_modules.bzl b/video_modules.bzl index e6b3f4db3c..f5d751945c 100644 --- a/video_modules.bzl +++ b/video_modules.bzl @@ -45,8 +45,8 @@ module_entry( ], }, deps = [ - "//techpack/mm-drivers:hw_fence_headers", - "//techpack/synx-kernel:synx_headers", + "//vendor/qcom/opensource/mm-drivers:hw_fence_headers", + "//vendor/qcom/opensource/synx-kernel:synx_headers", ], ) From 3424965c49b9298300ab0527618e951fcad4fb9a Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Wed, 3 May 2023 13:28:44 -0700 Subject: [PATCH 0917/1061] video: driver: enable EOS event for encoder In case of encoder drain followed by immediate stop usecase, fw might send drain last flag info packet instead of last flag buffer due to insufficent output buffers. In this scenario, driver signals EOS through an event. To avoid sending last flag buffer in some usecases and EOS event in other usecases, to maintain consistency, always send last flag information via EOS event to client. Change-Id: Ib816603fb171a5f3f72f163614588490514f8c59 Signed-off-by: Darshana Patil --- .../pineapple/src/msm_vidc_pineapple.c | 2 +- driver/vidc/src/msm_vidc_driver.c | 6 +- driver/vidc/src/venus_hfi_response.c | 63 +++++++++---------- 3 files changed, 33 insertions(+), 38 deletions(-) diff --git a/driver/platform/pineapple/src/msm_vidc_pineapple.c b/driver/platform/pineapple/src/msm_vidc_pineapple.c index 71070fea27..46793a9e98 100644 --- a/driver/platform/pineapple/src/msm_vidc_pineapple.c +++ b/driver/platform/pineapple/src/msm_vidc_pineapple.c @@ -1733,7 +1733,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { HFI_PROP_AV1_DRAP_CONFIG, CAP_FLAG_INPUT_PORT}, - {LAST_FLAG_EVENT_ENABLE, DEC, CODECS_ALL, + {LAST_FLAG_EVENT_ENABLE, DEC|ENC, CODECS_ALL, 0, 1, 1, 0, V4L2_CID_MPEG_VIDC_LAST_FLAG_EVENT_ENABLE}, diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 1dc2cf9b6d..1e4f72f15b 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -1479,8 +1479,7 @@ int msm_vidc_process_drain_last_flag(struct msm_vidc_inst *inst) if (rc) return rc; - if (is_decode_session(inst) && - !inst->capabilities[LAST_FLAG_EVENT_ENABLE].value) { + if (!inst->capabilities[LAST_FLAG_EVENT_ENABLE].value) { i_vpr_h(inst, "%s: last flag event not enabled\n", __func__); return 0; } @@ -1505,8 +1504,7 @@ int msm_vidc_process_psc_last_flag(struct msm_vidc_inst *inst) if (rc) return rc; - if (is_decode_session(inst) && - !inst->capabilities[LAST_FLAG_EVENT_ENABLE].value) { + if (!inst->capabilities[LAST_FLAG_EVENT_ENABLE].value) { i_vpr_h(inst, "%s: last flag event not enabled\n", __func__); return 0; } diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index bc80c53148..6c685b2e6f 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -641,20 +641,17 @@ static int get_driver_buffer_flags(struct msm_vidc_inst *inst, u32 hfi_flags) if (hfi_flags & HFI_BUF_FW_FLAG_CODEC_CONFIG) driver_flags |= MSM_VIDC_BUF_FLAG_CODECCONFIG; - /* - * attach last flag to the buffer for encode session. - * For decode session attach only if control(LAST_FLAG_EVENT_ENABLE) - * is not set by client. If this control is enabled, last flag - * info will be sent via event(V4L2_EVENT_EOS) to client. - */ - if ((is_encode_session(inst) && - (hfi_flags & HFI_BUF_FW_FLAG_LAST)) || - (is_decode_session(inst) && - !inst->capabilities[LAST_FLAG_EVENT_ENABLE].value && - ((hfi_flags & HFI_BUF_FW_FLAG_LAST) || - (hfi_flags & HFI_BUF_FW_FLAG_PSC_LAST)))) + if (hfi_flags & HFI_BUF_FW_FLAG_LAST || + hfi_flags & HFI_BUF_FW_FLAG_PSC_LAST) driver_flags |= MSM_VIDC_BUF_FLAG_LAST; + /* + * if last flag event is enabled then remove BUF_FLAG_LAST + * because last flag information will be sent via V4L2_EVENT_EOS + */ + if (inst->capabilities[LAST_FLAG_EVENT_ENABLE].value) + driver_flags &= ~MSM_VIDC_BUF_FLAG_LAST; + return driver_flags; } @@ -768,15 +765,9 @@ static int handle_drain_last_flag_buffer(struct msm_vidc_inst *inst, if (!msm_vidc_allow_drain_last_flag(inst)) return -EINVAL; - if (is_decode_session(inst)) { - rc = msm_vidc_process_drain_last_flag(inst); - if (rc) - return rc; - } else if (is_encode_session(inst)) { - rc = msm_vidc_state_change_drain_last_flag(inst); - if (rc) - return rc; - } + rc = msm_vidc_process_drain_last_flag(inst); + if (rc) + return rc; return rc; } @@ -1166,14 +1157,17 @@ static int handle_input_metadata_buffer(struct msm_vidc_inst *inst, buf->attr &= ~MSM_VIDC_ATTR_QUEUED; buf->attr |= MSM_VIDC_ATTR_DEQUEUED; buf->flags = 0; - if ((is_encode_session(inst) && - (buffer->flags & HFI_BUF_FW_FLAG_LAST)) || - (is_decode_session(inst) && - !inst->capabilities[LAST_FLAG_EVENT_ENABLE].value && - ((buffer->flags & HFI_BUF_FW_FLAG_LAST) || - (buffer->flags & HFI_BUF_FW_FLAG_PSC_LAST)))) + if (buffer->flags & HFI_BUF_FW_FLAG_LAST || + buffer->flags & HFI_BUF_FW_FLAG_PSC_LAST) buf->flags |= MSM_VIDC_BUF_FLAG_LAST; + /* + * if last flag event is enabled then remove BUF_FLAG_LAST + * because last flag information will be sent via V4L2_EVENT_EOS + */ + if (inst->capabilities[LAST_FLAG_EVENT_ENABLE].value) + buf->flags &= ~MSM_VIDC_BUF_FLAG_LAST; + print_vidc_buffer(VIDC_LOW, "low ", "dqbuf", inst, buf); return rc; } @@ -1218,14 +1212,17 @@ static int handle_output_metadata_buffer(struct msm_vidc_inst *inst, buf->attr &= ~MSM_VIDC_ATTR_QUEUED; buf->attr |= MSM_VIDC_ATTR_DEQUEUED; buf->flags = 0; - if ((is_encode_session(inst) && - (buffer->flags & HFI_BUF_FW_FLAG_LAST)) || - (is_decode_session(inst) && - !inst->capabilities[LAST_FLAG_EVENT_ENABLE].value && - ((buffer->flags & HFI_BUF_FW_FLAG_LAST) || - (buffer->flags & HFI_BUF_FW_FLAG_PSC_LAST)))) + if (buffer->flags & HFI_BUF_FW_FLAG_LAST || + buffer->flags & HFI_BUF_FW_FLAG_PSC_LAST) buf->flags |= MSM_VIDC_BUF_FLAG_LAST; + /* + * if last flag event is enabled then remove BUF_FLAG_LAST + * because last flag information will be sent via V4L2_EVENT_EOS + */ + if (inst->capabilities[LAST_FLAG_EVENT_ENABLE].value) + buf->flags &= ~MSM_VIDC_BUF_FLAG_LAST; + print_vidc_buffer(VIDC_LOW, "low ", "dqbuf", inst, buf); return rc; } From def6b6328bc08d9a3ff66bf615e0aee9ba15825d Mon Sep 17 00:00:00 2001 From: Deepa Guthyappa Madivalara Date: Wed, 26 Apr 2023 15:43:34 -0700 Subject: [PATCH 0918/1061] video: driver: ring buffer enhancements 1. use max of operating and frame rate for fps 2. vpp_cycles is considered close to frequency corner if vpp_min_freq is greater than max required frequency Change-Id: I9dc995ca16e4eeae18497a8648dfef64e16dfbc2 Signed-off-by: Deepa Guthyappa Madivalara --- .../pineapple/src/msm_vidc_pineapple.c | 36 ++++++++++++------- driver/platform/pineapple/src/pineapple.c | 34 +++++++++++------- .../iris33/src/msm_vidc_power_iris33.c | 14 +++++--- 3 files changed, 54 insertions(+), 30 deletions(-) diff --git a/driver/platform/pineapple/src/msm_vidc_pineapple.c b/driver/platform/pineapple/src/msm_vidc_pineapple.c index 71070fea27..3108a1f06c 100644 --- a/driver/platform/pineapple/src/msm_vidc_pineapple.c +++ b/driver/platform/pineapple/src/msm_vidc_pineapple.c @@ -333,6 +333,7 @@ static int msm_vidc_set_ring_buffer_count_pineapple(void *instance, struct v4l2_format *output_fmt, *input_fmt; struct msm_vidc_core* core; u32 count = 0, data_size = 0, pixel_count = 0, fps = 0; + u32 frame_rate = 0, operating_rate = 0; if (!inst) { d_vpr_e("%s: invalid params\n", __func__); @@ -342,30 +343,39 @@ static int msm_vidc_set_ring_buffer_count_pineapple(void *instance, output_fmt = &inst->fmts[OUTPUT_PORT]; input_fmt = &inst->fmts[INPUT_PORT]; - fps = inst->capabilities[FRAME_RATE].value >> 16; + frame_rate = inst->capabilities[FRAME_RATE].value >> 16; + operating_rate = inst->capabilities[OPERATING_RATE].value >> 16; + fps = max(frame_rate, operating_rate); pixel_count = output_fmt->fmt.pix_mp.width * output_fmt->fmt.pix_mp.height; - /* check if current session supports ring buffer enablement */ - if (!(pixel_count >= 7680 * 4320 && fps >= 30) && - !(pixel_count >= 3840 * 2160 && fps >= 120) && - !(pixel_count >= 1920 * 1080 && fps >= 480) && - !(pixel_count >= 1280 * 720 && fps >= 960)) { - i_vpr_h(inst, - "%s: session %ux%u@%u fps does not support ring buffer\n", - __func__, output_fmt->fmt.pix_mp.width, - output_fmt->fmt.pix_mp.height, fps); - inst->capabilities[cap_id].value = 0; - } else { + /* + * try to enable ring buffer feature if +  * resolution >= 8k and fps >= 30fps and +  * resolution >= 4k and fps >= 120fps and +  * resolution >= 1080p and fps >= 480fps and +  * resolution >= 720p and fps >= 960fps + */ + if ((pixel_count >= 7680 * 4320 && fps >= 30) || + (pixel_count >= 3840 * 2160 && fps >= 120) || + (pixel_count >= 1920 * 1080 && fps >= 480) || + (pixel_count >= 1280 * 720 && fps >= 960)) { data_size = input_fmt->fmt.pix_mp.plane_fmt[0].sizeimage; + i_vpr_h(inst, "%s: calculate ring buffer count\n", __func__); rc = call_session_op(core, ring_buf_count, inst, data_size); if (rc) { - i_vpr_e(inst, "%s: failed to calculate ring buf count\n", + i_vpr_e(inst, "%s: failed to calculate ring buffer count\n", __func__); /* ignore error */ rc = 0; inst->capabilities[cap_id].value = 0; } + } else { + i_vpr_h(inst, + "%s: session %ux%u@%u fps does not support ring buffer\n", + __func__, output_fmt->fmt.pix_mp.width, + output_fmt->fmt.pix_mp.height, fps); + inst->capabilities[cap_id].value = 0; } count = inst->capabilities[cap_id].value; diff --git a/driver/platform/pineapple/src/pineapple.c b/driver/platform/pineapple/src/pineapple.c index 8d3be9e6f4..86acfa7eb3 100644 --- a/driver/platform/pineapple/src/pineapple.c +++ b/driver/platform/pineapple/src/pineapple.c @@ -232,6 +232,7 @@ static int msm_vidc_set_ring_buffer_count_pineapple(void *instance, struct v4l2_format *output_fmt, *input_fmt; struct msm_vidc_core* core; u32 count = 0, data_size = 0, pixel_count = 0, fps = 0; + u32 frame_rate = 0, operating_rate = 0; if (!inst) { d_vpr_e("%s: invalid params\n", __func__); @@ -241,22 +242,25 @@ static int msm_vidc_set_ring_buffer_count_pineapple(void *instance, output_fmt = &inst->fmts[OUTPUT_PORT]; input_fmt = &inst->fmts[INPUT_PORT]; - fps = inst->capabilities[FRAME_RATE].value >> 16; + frame_rate = inst->capabilities[FRAME_RATE].value >> 16; + operating_rate = inst->capabilities[OPERATING_RATE].value >> 16; + fps = max(frame_rate, operating_rate); pixel_count = output_fmt->fmt.pix_mp.width * output_fmt->fmt.pix_mp.height; - /* check if current session supports ring buffer enablement */ - if (!(pixel_count >= 7680 * 4320 && fps >= 30) && - !(pixel_count >= 3840 * 2160 && fps >= 120) && - !(pixel_count >= 1920 * 1080 && fps >= 480) && - !(pixel_count >= 1280 * 720 && fps >= 960)) { - i_vpr_h(inst, - "%s: session %ux%u@%u fps does not support ring buffer\n", - __func__, output_fmt->fmt.pix_mp.width, - output_fmt->fmt.pix_mp.height, fps); - inst->capabilities[cap_id].value = 0; - } else { + /* + * try to enable ring buffer feature if +  * resolution >= 8k and fps >= 30fps and +  * resolution >= 4k and fps >= 120fps and +  * resolution >= 1080p and fps >= 480fps and +  * resolution >= 720p and fps >= 960fps + */ + if ((pixel_count >= 7680 * 4320 && fps >= 30) && + (pixel_count >= 3840 * 2160 && fps >= 120) && + (pixel_count >= 1920 * 1080 && fps >= 480) && + (pixel_count >= 1280 * 720 && fps >= 960)) { data_size = input_fmt->fmt.pix_mp.plane_fmt[0].sizeimage; + i_vpr_h(inst, "%s: calculate ring buffer count\n", __func__); rc = call_session_op(core, ring_buf_count, inst, data_size); if (rc) { i_vpr_e(inst, "%s: failed to calculate ring buf count\n", @@ -265,6 +269,12 @@ static int msm_vidc_set_ring_buffer_count_pineapple(void *instance, rc = 0; inst->capabilities[cap_id].value = 0; } + } else { + i_vpr_h(inst, + "%s: session %ux%u@%u fps does not support ring buffer\n", + __func__, output_fmt->fmt.pix_mp.width, + output_fmt->fmt.pix_mp.height, fps); + inst->capabilities[cap_id].value = 0; } count = inst->capabilities[cap_id].value; diff --git a/driver/variant/iris33/src/msm_vidc_power_iris33.c b/driver/variant/iris33/src/msm_vidc_power_iris33.c index 00e7825bec..7526c99bc6 100644 --- a/driver/variant/iris33/src/msm_vidc_power_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_power_iris33.c @@ -380,8 +380,9 @@ static bool is_vpp_cycles_close_to_freq_corner(struct msm_vidc_core *core, closest_freq_upper_corner = core->resource->freq_set.freq_tbl[0].freq; + /* return true if vpp_min_freq is more than max frequency */ if (vpp_min_freq > closest_freq_upper_corner) - return false; + return true; /* get the closest freq corner for vpp_min_freq */ for (i = 0; i < core->resource->freq_set.count; i++) { @@ -1360,12 +1361,15 @@ int msm_vidc_ring_buf_count_iris33(struct msm_vidc_inst *inst, u32 data_size) /* check if vpp_min_freq is exceeding closest freq corner margin */ if (is_vpp_cycles_close_to_freq_corner(core, - codec_output.vpp_min_freq)) - /* enables ring buffer */ + codec_output.vpp_min_freq)) { + /* enable ring buffer */ + i_vpr_h(inst, + "%s: vpp_min_freq %d, ring_buffer_count %d\n", + __func__, codec_output.vpp_min_freq, MAX_ENC_RING_BUF_COUNT); inst->capabilities[ENC_RING_BUFFER_COUNT].value = MAX_ENC_RING_BUF_COUNT; - else + } else { inst->capabilities[ENC_RING_BUFFER_COUNT].value = 0; - + } return 0; } From 3018f2c1d35f542bc7c48e98cd01657aeb37164d Mon Sep 17 00:00:00 2001 From: Vedang Nagar Date: Tue, 23 May 2023 20:43:38 +0530 Subject: [PATCH 0919/1061] video: driver: Update session priority setting Modify session priority controls - ___________________________________________________________ | Description | HAL Value |Driver value|FW Value| |_________________|__________________|____________|________| |Critical Priority| Vendor Extension | Via control| 0 | | RT | 0 | 0 | 1 | | NRT | -1 to -4 | 1-4 | 2-5 | |_________________|__________________|____________|________| Change-Id: I7b28109bde3968f38c2e3cc42cf4cf5dd195cc10 Signed-off-by: Vedang Nagar --- .../platform/common/src/msm_vidc_platform.c | 31 +++++++++---------- driver/platform/kalama/src/msm_vidc_kalama.c | 2 +- .../pineapple/src/msm_vidc_pineapple.c | 2 +- driver/platform/waipio/src/waipio.c | 2 +- 4 files changed, 18 insertions(+), 19 deletions(-) diff --git a/driver/platform/common/src/msm_vidc_platform.c b/driver/platform/common/src/msm_vidc_platform.c index d5b7b0fa30..8304f025db 100644 --- a/driver/platform/common/src/msm_vidc_platform.c +++ b/driver/platform/common/src/msm_vidc_platform.c @@ -2478,27 +2478,26 @@ int msm_vidc_adjust_session_priority(void *instance, struct v4l2_ctrl *ctrl) } /* * Priority handling - * Client will set 0 (realtime), 1+ (non-realtime) - * Driver adds NRT_PRIORITY_OFFSET (2) to clients non-realtime priority - * and hence PRIORITY values in the driver become 0, 3+. - * Driver may move decode realtime sessions to non-realtime by - * increasing priority by 1 to RT sessions in HW overloaded cases. - * So driver PRIORITY values can be 0, 1, 3+. + * Client will set 0 (realtime), (1 to 4) (non-realtime) * When driver setting priority to firmware, driver adds * FIRMWARE_PRIORITY_OFFSET (1) for all sessions except * non-critical sessions. So finally firmware priority values ranges * from 0 (Critical session), 1 (realtime session), - * 2+ (non-realtime session) + * (2 to 5) (non-realtime session). + * Driver may move decode realtime sessions to non-realtime by + * increasing priority by 1 to RT sessions in HW overloaded cases. + * Following will be priority based on requirement - + * ___________________________________________________________ + * | Description | HAL Value |Driver value|FW Value| + * |_________________|__________________|____________|________| + * |Critical Priority| Vendor Extension | Via control| 0 | + * | RT | 0 | 0 | 1 | + * | NRT | -1 to -4 | 1-4 | 2-5 | + * |_________________|__________________|____________|________| */ - if (ctrl) { - /* add offset when client sets non-realtime */ - if (ctrl->val) - adjusted_value = ctrl->val + NRT_PRIORITY_OFFSET; - else - adjusted_value = ctrl->val; - } else { - adjusted_value = inst->capabilities[PRIORITY].value; - } + + adjusted_value = ctrl ? ctrl->val : + inst->capabilities[PRIORITY].value; msm_vidc_update_cap_value(inst, PRIORITY, adjusted_value, __func__); diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index b6819eaea3..4d54aa3e45 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -1589,7 +1589,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, {PRIORITY, DEC|ENC, CODECS_ALL, - 0, 1 + NRT_PRIORITY_OFFSET, 1, 1 + NRT_PRIORITY_OFFSET, + 0, 4, 1, 4, V4L2_CID_MPEG_VIDC_PRIORITY, HFI_PROP_SESSION_PRIORITY, CAP_FLAG_DYNAMIC_ALLOWED}, diff --git a/driver/platform/pineapple/src/msm_vidc_pineapple.c b/driver/platform/pineapple/src/msm_vidc_pineapple.c index 71070fea27..32717fae26 100644 --- a/driver/platform/pineapple/src/msm_vidc_pineapple.c +++ b/driver/platform/pineapple/src/msm_vidc_pineapple.c @@ -1693,7 +1693,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, {PRIORITY, DEC|ENC, CODECS_ALL, - 0, 1 + NRT_PRIORITY_OFFSET, 1, 1 + NRT_PRIORITY_OFFSET, + 0, 4, 1, 4, V4L2_CID_MPEG_VIDC_PRIORITY, HFI_PROP_SESSION_PRIORITY, CAP_FLAG_DYNAMIC_ALLOWED}, diff --git a/driver/platform/waipio/src/waipio.c b/driver/platform/waipio/src/waipio.c index f78e1b6804..9c6d802653 100644 --- a/driver/platform/waipio/src/waipio.c +++ b/driver/platform/waipio/src/waipio.c @@ -1208,7 +1208,7 @@ static struct msm_platform_inst_capability instance_cap_data_waipio[] = { CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, {PRIORITY, DEC|ENC, CODECS_ALL, - 0, 1 + NRT_PRIORITY_OFFSET, 1, 1 + NRT_PRIORITY_OFFSET, + 0, 4, 1, 4, 0, HFI_PROP_SESSION_PRIORITY, CAP_FLAG_DYNAMIC_ALLOWED}, From 3c69ab69a47fdc979c80a1d30bccf6237ed0be64 Mon Sep 17 00:00:00 2001 From: Vikash Garodia Date: Wed, 24 May 2023 19:30:59 +0530 Subject: [PATCH 0920/1061] video: driver: fix few warnings reported by static code check tool Static tool reported few coding style related warnings. This patch fixes the same. Change-Id: If7c75d8ecf0e2c1128bdd6f3fd3fb6148fcd457d Signed-off-by: Vikash Garodia --- driver/vidc/src/hfi_packet.c | 10 +- driver/vidc/src/venus_hfi.c | 137 ++++----------------------- driver/vidc/src/venus_hfi_queue.c | 10 +- driver/vidc/src/venus_hfi_response.c | 15 ++- 4 files changed, 38 insertions(+), 134 deletions(-) diff --git a/driver/vidc/src/hfi_packet.c b/driver/vidc/src/hfi_packet.c index 9fcbf239df..e8caebe1fd 100644 --- a/driver/vidc/src/hfi_packet.c +++ b/driver/vidc/src/hfi_packet.c @@ -22,7 +22,7 @@ u32 get_hfi_port(struct msm_vidc_inst *inst, } if (is_decode_session(inst)) { - switch(port) { + switch (port) { case INPUT_PORT: case INPUT_META_PORT: hfi_port = HFI_PORT_BITSTREAM; @@ -70,7 +70,7 @@ u32 get_hfi_port_from_buffer_type(struct msm_vidc_inst *inst, } if (is_decode_session(inst)) { - switch(buffer_type) { + switch (buffer_type) { case MSM_VIDC_BUF_INPUT: case MSM_VIDC_BUF_INPUT_META: case MSM_VIDC_BUF_BIN: @@ -257,7 +257,7 @@ u32 get_hfi_colorformat(struct msm_vidc_inst *inst, return hfi_colorformat; } - switch(colorformat) { + switch (colorformat) { case MSM_VIDC_FMT_NV12: hfi_colorformat = HFI_COLOR_FMT_NV12; break; @@ -723,8 +723,8 @@ err_cmd: return rc; } -int hfi_packet_sys_intraframe_powercollapse(struct msm_vidc_core* core, - u8* pkt, u32 pkt_size, u32 enable) +int hfi_packet_sys_intraframe_powercollapse(struct msm_vidc_core *core, + u8 *pkt, u32 pkt_size, u32 enable) { int rc = 0; u32 payload = 0; diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index 9412111eb8..17b5c12879 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -225,26 +225,6 @@ exit: return rc; } -/* -static int __sys_set_coverage(struct msm_vidc_core *core, - u32 mode) -{ - int rc = 0; - - //rc = call_hfi_pkt_op(core, sys_coverage_config, pkt, mode); - if (rc) { - d_vpr_e("Coverage mode setting to FW failed\n"); - return -ENOTEMPTY; - } - - //if (__cmdq_write(core, pkt, sid)) { - // d_vpr_e("Failed to send coverage pkt to f/w\n"); - // return -ENOTEMPTY; - //} - - return 0; -} -*/ static int __sys_set_power_control(struct msm_vidc_core *core, bool enable) { int rc = 0; @@ -332,64 +312,10 @@ skip_power_off: d_vpr_e("%s: skipped\n", __func__); return -EAGAIN; } - -#if 0 // TODO -static int __core_set_resource(struct msm_vidc_core *core, - struct vidc_resource_hdr *resource_hdr, void *resource_value) -{ - int rc = 0; - - if (!core || !resource_hdr || !resource_value) { - d_vpr_e("%s: invalid params %pK %pK %pK\n", __func__, - core, resource_hdr, resource_value); - return -EINVAL; - } - - //rc = hfi_packet_sys_set_resource(core, core->packet, core->packet_size, - // resource_hdr, resource_value); - if (rc) { - d_vpr_e("set_res: failed to create packet\n"); - goto err_create_pkt; - } - - //rc = __cmdq_write(core, core->packet); - if (rc) - rc = -ENOTEMPTY; - -err_create_pkt: - return rc; -} - -static int __core_release_resource(struct msm_vidc_core *core, - struct vidc_resource_hdr *resource_hdr) -{ - int rc = 0; - - if (!core || !resource_hdr) { - d_vpr_e("%s: invalid params %pK %pK\n", - __func__, core, resource_hdr); - return -EINVAL; - } - - //rc = hfi_packet_sys_release_resource(core, core->packet, core->packet_size, resource_hdr); - if (rc) { - d_vpr_e("release_res: failed to create packet\n"); - goto err_create_pkt; - } - - //rc = __cmdq_write(core, core->packet); - if (rc) - rc = -ENOTEMPTY; - -err_create_pkt: - return rc; -} -#endif - static int __release_subcaches(struct msm_vidc_core *core) { int rc = 0; - struct subcache_info* sinfo; + struct subcache_info *sinfo; struct hfi_buffer buf; if (msm_vidc_syscache_disable || !is_sys_cache_present(core)) @@ -512,30 +438,7 @@ err_fail_set_subacaches: return rc; } -/* -static int __set_ubwc_config(struct msm_vidc_core *core) -{ - int rc = 0; - - if (!core->platform->data.ubwc_config) { - d_vpr_h("%s: invalid ubwc config\n", __func__); - return -EINVAL; - } - - //rc = hfi_packet_sys_ubwc_config(core, core->packet, core->packet_size); - if (rc) - return rc; - - //rc = __cmdq_write(core, core->packet)); - if (rc) - return rc; - - d_vpr_h("Configured UBWC Config\n"); - return rc; -} -*/ - -static int __venus_power_off(struct msm_vidc_core* core) +static int __venus_power_off(struct msm_vidc_core *core) { int rc = 0; @@ -697,7 +600,8 @@ int __load_fw(struct msm_vidc_core *core) { int rc = 0; - d_vpr_h("%s\n", __func__); + d_vpr_h("%s: loading video firmware\n", __func__); + /* clear all substates */ msm_vidc_change_core_sub_state(core, CORE_SUBSTATE_MAX - 1, 0, __func__); @@ -713,11 +617,11 @@ int __load_fw(struct msm_vidc_core *core) goto fail_load_fw; /* - * Hand off control of regulators to h/w _after_ loading fw. - * Note that the GDSC will turn off when switching from normal - * (s/w triggered) to fast (HW triggered) unless the h/w vote is - * present. - */ + * Hand off control of regulators to h/w _after_ loading fw. + * Note that the GDSC will turn off when switching from normal + * (s/w triggered) to fast (HW triggered) unless the h/w vote is + * present. + */ call_res_op(core, gdsc_hw_ctrl, core); trace_msm_v4l2_vidc_fw_load("END"); @@ -741,7 +645,7 @@ void __unload_fw(struct msm_vidc_core *core) /* clear all substates */ msm_vidc_change_core_sub_state(core, CORE_SUBSTATE_MAX - 1, 0, __func__); - d_vpr_h("%s done\n", __func__); + d_vpr_h("%s unloaded video firmware\n", __func__); } static int __response_handler(struct msm_vidc_core *core) @@ -790,7 +694,8 @@ irqreturn_t venus_hfi_isr_handler(int irq, void *data) struct msm_vidc_core *core = data; int num_responses = 0, rc = 0; - d_vpr_l("%s()\n", __func__); + d_vpr_l("%s: received interrupt from hardware\n", __func__); + if (!core) { d_vpr_e("%s: invalid params\n", __func__); return IRQ_NONE; @@ -1431,7 +1336,7 @@ unlock: int venus_hfi_session_close(struct msm_vidc_inst *inst) { int rc = 0; - struct msm_vidc_core* core; + struct msm_vidc_core *core; if (!inst || !inst->packet) { d_vpr_e("%s: invalid params\n", __func__); @@ -1470,7 +1375,7 @@ unlock: int venus_hfi_start(struct msm_vidc_inst *inst, enum msm_vidc_port_type port) { int rc = 0; - struct msm_vidc_core* core; + struct msm_vidc_core *core; if (!inst || !inst->core || !inst->packet) { d_vpr_e("%s: invalid params\n", __func__); @@ -1513,7 +1418,7 @@ unlock: int venus_hfi_stop(struct msm_vidc_inst *inst, enum msm_vidc_port_type port) { int rc = 0; - struct msm_vidc_core* core; + struct msm_vidc_core *core; if (!inst || !inst->core || !inst->packet) { d_vpr_e("%s: invalid params\n", __func__); @@ -1557,7 +1462,7 @@ unlock: int venus_hfi_session_pause(struct msm_vidc_inst *inst, enum msm_vidc_port_type port) { int rc = 0; - struct msm_vidc_core* core; + struct msm_vidc_core *core; if (!inst || !inst->core || !inst->packet) { d_vpr_e("%s: invalid params\n", __func__); @@ -1601,7 +1506,7 @@ int venus_hfi_session_resume(struct msm_vidc_inst *inst, enum msm_vidc_port_type port, u32 payload) { int rc = 0; - struct msm_vidc_core* core; + struct msm_vidc_core *core; if (!inst || !inst->core || !inst->packet) { d_vpr_e("%s: invalid params\n", __func__); @@ -1644,7 +1549,7 @@ unlock: int venus_hfi_session_drain(struct msm_vidc_inst *inst, enum msm_vidc_port_type port) { int rc = 0; - struct msm_vidc_core* core; + struct msm_vidc_core *core; if (!inst || !inst->core || !inst->packet) { d_vpr_e("%s: invalid params\n", __func__); @@ -2042,10 +1947,10 @@ unlock: return rc; } -int venus_hfi_scale_clocks(struct msm_vidc_inst* inst, u64 freq) +int venus_hfi_scale_clocks(struct msm_vidc_inst *inst, u64 freq) { int rc = 0; - struct msm_vidc_core* core; + struct msm_vidc_core *core; if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); @@ -2072,7 +1977,7 @@ exit: int venus_hfi_scale_buses(struct msm_vidc_inst *inst, u64 bw_ddr, u64 bw_llcc) { int rc = 0; - struct msm_vidc_core* core; + struct msm_vidc_core *core; if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); diff --git a/driver/vidc/src/venus_hfi_queue.c b/driver/vidc/src/venus_hfi_queue.c index d6be4adf20..a8c1f4945d 100644 --- a/driver/vidc/src/venus_hfi_queue.c +++ b/driver/vidc/src/venus_hfi_queue.c @@ -38,6 +38,7 @@ static void __dump_packet(u8 *packet, const char *function, void *qinfo) * "de ad ba ab " * 8 + '\0' */ char row[3 * 32]; + session_id = *((u32 *)packet + 1); q = (struct msm_vidc_iface_q_info *)qinfo; @@ -300,11 +301,10 @@ static int __iface_cmdq_write_relaxed(struct msm_vidc_core *core, goto err_q_null; } - if (!__write_queue(q_info, (u8 *)pkt, requires_interrupt)) { + if (!__write_queue(q_info, (u8 *)pkt, requires_interrupt)) rc = 0; - } else { + else d_vpr_e("queue full\n"); - } err_q_null: return rc; @@ -411,7 +411,7 @@ void venus_hfi_queue_deinit(struct msm_vidc_core *core) { int i; - d_vpr_h("%s()\n", __func__); + d_vpr_h("%s: deinitializing interface queue\n", __func__); if (!core->iface_q_table.align_virtual_addr) { d_vpr_h("%s: queues already deallocated\n", __func__); @@ -542,7 +542,7 @@ int venus_hfi_queue_init(struct msm_vidc_core *core) u32 *payload; u32 i; - d_vpr_h("%s()\n", __func__); + d_vpr_h("%s: initializing interface queue\n", __func__); if (!core) { d_vpr_h("%s: invalid params\n", __func__); diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index 6c685b2e6f..6b304dc1ee 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -608,19 +608,18 @@ static int get_driver_buffer_flags(struct msm_vidc_inst *inst, u32 hfi_flags) { u32 driver_flags = 0; - if (inst->hfi_frame_info.picture_type & HFI_PICTURE_IDR) { + if (inst->hfi_frame_info.picture_type & HFI_PICTURE_IDR) driver_flags |= MSM_VIDC_BUF_FLAG_KEYFRAME; - } else if (inst->hfi_frame_info.picture_type & HFI_PICTURE_P) { + else if (inst->hfi_frame_info.picture_type & HFI_PICTURE_P) driver_flags |= MSM_VIDC_BUF_FLAG_PFRAME; - } else if (inst->hfi_frame_info.picture_type & HFI_PICTURE_B) { + else if (inst->hfi_frame_info.picture_type & HFI_PICTURE_B) driver_flags |= MSM_VIDC_BUF_FLAG_BFRAME; - } else if (inst->hfi_frame_info.picture_type & HFI_PICTURE_I) { + else if (inst->hfi_frame_info.picture_type & HFI_PICTURE_I) driver_flags |= MSM_VIDC_BUF_FLAG_KEYFRAME; - } else if (inst->hfi_frame_info.picture_type & HFI_PICTURE_CRA) { + else if (inst->hfi_frame_info.picture_type & HFI_PICTURE_CRA) driver_flags |= MSM_VIDC_BUF_FLAG_KEYFRAME; - } else if (inst->hfi_frame_info.picture_type & HFI_PICTURE_BLA) { + else if (inst->hfi_frame_info.picture_type & HFI_PICTURE_BLA) driver_flags |= MSM_VIDC_BUF_FLAG_KEYFRAME; - } if (inst->hfi_frame_info.data_corrupt) driver_flags |= MSM_VIDC_BUF_FLAG_ERROR; @@ -904,7 +903,7 @@ static int msm_vidc_handle_fence_signal(struct msm_vidc_inst *inst, if (inst->hfi_frame_info.fence_error) i_vpr_e(inst, - "%s: fence error info recieved for SW fence\n", + "%s: fence error info received for SW fence\n", __func__); } else { i_vpr_e(inst, "%s: invalid fence type\n", __func__); From e2663ce820d3e2dbb4ce0fe294466d6993c5b122 Mon Sep 17 00:00:00 2001 From: Vedang Nagar Date: Tue, 16 May 2023 17:33:36 +0530 Subject: [PATCH 0921/1061] video: driver: Remove inst check in video driver Remove inst check from all the functions in video driver. Inst check is present in most of the functions in video driver which is not required. Keep check only at root level functions and remove from rest all of the functions. Change-Id: Ib310cd3df5e8612a9fc3a5aa654dff4203a12906 Signed-off-by: Vedang Nagar --- .../platform/common/src/msm_vidc_platform.c | 400 ------------- .../common/src/msm_vidc_platform_ext.c | 35 -- .../pineapple/src/msm_vidc_pineapple.c | 4 - driver/platform/pineapple/src/pineapple.c | 4 - .../variant/iris2/src/msm_vidc_buffer_iris2.c | 79 --- driver/variant/iris2/src/msm_vidc_iris2.c | 20 - .../variant/iris2/src/msm_vidc_power_iris2.c | 9 - .../variant/iris3/src/msm_vidc_buffer_iris3.c | 94 --- driver/variant/iris3/src/msm_vidc_iris3.c | 20 - .../variant/iris3/src/msm_vidc_power_iris3.c | 14 - .../iris33/src/msm_vidc_buffer_iris33.c | 94 --- driver/variant/iris33/src/msm_vidc_iris33.c | 20 - .../iris33/src/msm_vidc_power_iris33.c | 18 - driver/vidc/inc/msm_vidc.h | 64 +- driver/vidc/inc/msm_vidc_debug.h | 13 +- driver/vidc/src/hfi_packet.c | 31 +- driver/vidc/src/msm_vdec.c | 147 +---- driver/vidc/src/msm_venc.c | 140 +---- driver/vidc/src/msm_vidc.c | 253 ++------ driver/vidc/src/msm_vidc_buffer.c | 43 -- driver/vidc/src/msm_vidc_control.c | 48 -- driver/vidc/src/msm_vidc_debug.c | 70 +-- driver/vidc/src/msm_vidc_driver.c | 566 +----------------- driver/vidc/src/msm_vidc_fence.c | 34 -- driver/vidc/src/msm_vidc_memory.c | 25 +- driver/vidc/src/msm_vidc_power.c | 38 -- driver/vidc/src/msm_vidc_state.c | 45 -- driver/vidc/src/msm_vidc_synx.c | 29 - driver/vidc/src/msm_vidc_v4l2.c | 76 ++- driver/vidc/src/msm_vidc_vb2.c | 39 +- driver/vidc/src/venus_hfi.c | 50 +- driver/vidc/src/venus_hfi_response.c | 59 -- 32 files changed, 205 insertions(+), 2376 deletions(-) diff --git a/driver/platform/common/src/msm_vidc_platform.c b/driver/platform/common/src/msm_vidc_platform.c index 8304f025db..092e179cb9 100644 --- a/driver/platform/common/src/msm_vidc_platform.c +++ b/driver/platform/common/src/msm_vidc_platform.c @@ -515,11 +515,6 @@ int msm_vidc_update_cap_value(struct msm_vidc_inst *inst, u32 cap_id, { int prev_value = 0; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - prev_value = inst->capabilities[cap_id].value; if (is_meta_cap(inst, cap_id)) { @@ -810,11 +805,6 @@ int msm_vidc_adjust_entropy_mode(void *instance, struct v4l2_ctrl *ctrl) struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; s32 profile = -1; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - /* ctrl is always NULL in streamon case */ adjusted_value = ctrl ? ctrl->val : inst->capabilities[ENTROPY_MODE].value; @@ -846,11 +836,6 @@ int msm_vidc_adjust_bitrate_mode(void *instance, struct v4l2_ctrl *ctrl) int lossless, frame_rc, bitrate_mode, frame_skip; u32 hfi_value = 0; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - bitrate_mode = inst->capabilities[BITRATE_MODE].value; lossless = inst->capabilities[LOSSLESS].value; frame_rc = inst->capabilities[FRAME_RC_ENABLE].value; @@ -892,11 +877,6 @@ int msm_vidc_adjust_profile(void *instance, struct v4l2_ctrl *ctrl) struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; s32 pix_fmt = -1; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - adjusted_value = ctrl ? ctrl->val : inst->capabilities[PROFILE].value; /* PIX_FMTS dependency is common across all chipsets. @@ -935,11 +915,6 @@ int msm_vidc_adjust_ltr_count(void *instance, struct v4l2_ctrl *ctrl) s32 layer_type = -1, enh_layer_count = -1; u32 num_ref_frames = 0, max_exceeding_ref_frames = 0; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - adjusted_value = ctrl ? ctrl->val : inst->capabilities[LTR_COUNT].value; if (msm_vidc_get_parent_value(inst, LTR_COUNT, BITRATE_MODE, @@ -1011,11 +986,6 @@ int msm_vidc_adjust_use_ltr(void *instance, struct v4l2_ctrl *ctrl) s32 adjusted_value, ltr_count; struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - adjusted_value = ctrl ? ctrl->val : inst->capabilities[USE_LTR].value; /* @@ -1051,11 +1021,6 @@ int msm_vidc_adjust_mark_ltr(void *instance, struct v4l2_ctrl *ctrl) s32 adjusted_value, ltr_count; struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - adjusted_value = ctrl ? ctrl->val : inst->capabilities[MARK_LTR].value; /* @@ -1088,11 +1053,6 @@ int msm_vidc_adjust_delta_based_rc(void *instance, struct v4l2_ctrl *ctrl) struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; s32 rc_type = -1; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - adjusted_value = ctrl ? ctrl->val : inst->capabilities[TIME_DELTA_BASED_RC].value; @@ -1117,11 +1077,6 @@ int msm_vidc_adjust_output_order(void *instance, struct v4l2_ctrl *ctrl) s32 tn_mode = -1, display_delay = -1, display_delay_enable = -1; u32 adjusted_value; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - adjusted_value = ctrl ? ctrl->val : inst->capabilities[OUTPUT_ORDER].value; @@ -1155,11 +1110,6 @@ int msm_vidc_adjust_input_buf_host_max_count(void *instance, struct v4l2_ctrl *c u32 adjusted_value; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - adjusted_value = ctrl ? ctrl->val : inst->capabilities[INPUT_BUF_HOST_MAX_COUNT].value; @@ -1178,11 +1128,6 @@ int msm_vidc_adjust_output_buf_host_max_count(void *instance, struct v4l2_ctrl * u32 adjusted_value; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - adjusted_value = ctrl ? ctrl->val : inst->capabilities[OUTPUT_BUF_HOST_MAX_COUNT].value; @@ -1202,11 +1147,6 @@ int msm_vidc_adjust_transform_8x8(void *instance, struct v4l2_ctrl *ctrl) struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; s32 profile = -1; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - adjusted_value = ctrl ? ctrl->val : inst->capabilities[TRANSFORM_8X8].value; @@ -1237,11 +1177,6 @@ int msm_vidc_adjust_chroma_qp_index_offset(void *instance, s32 adjusted_value; struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - adjusted_value = ctrl ? ctrl->val : inst->capabilities[CHROMA_QP_INDEX_OFFSET].value; @@ -1306,11 +1241,6 @@ int msm_vidc_adjust_slice_count(void *instance, struct v4l2_ctrl *ctrl) u32 update_cap, max_avg_slicesize, output_width, output_height; u32 min_width, min_height, max_width, max_height, fps; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - slice_mode = ctrl ? ctrl->val : inst->capabilities[SLICE_MODE].value; @@ -1437,11 +1367,6 @@ static int msm_vidc_adjust_static_layer_count_and_type(struct msm_vidc_inst *ins { bool hb_requested = false; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - if (!layer_count) { i_vpr_h(inst, "client not enabled layer encoding\n"); goto exit; @@ -1523,11 +1448,6 @@ int msm_vidc_adjust_layer_count(void *instance, struct v4l2_ctrl *ctrl) s32 client_layer_count; struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - client_layer_count = ctrl ? ctrl->val : inst->capabilities[ENH_LAYER_COUNT].value; @@ -1572,11 +1492,6 @@ int msm_vidc_adjust_gop_size(void *instance, struct v4l2_ctrl *ctrl) s32 adjusted_value, enh_layer_count = -1; u32 min_gop_size, num_subgops; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - adjusted_value = ctrl ? ctrl->val : inst->capabilities[GOP_SIZE].value; if (msm_vidc_get_parent_value(inst, GOP_SIZE, @@ -1611,11 +1526,6 @@ int msm_vidc_adjust_b_frame(void *instance, struct v4l2_ctrl *ctrl) s32 adjusted_value, enh_layer_count = -1; const u32 max_bframe_size = 7; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - adjusted_value = ctrl ? ctrl->val : inst->capabilities[B_FRAME].value; if (msm_vidc_get_parent_value(inst, B_FRAME, @@ -1647,11 +1557,6 @@ int msm_vidc_adjust_bitrate(void *instance, struct v4l2_ctrl *ctrl) u32 layer_br_caps[6] = {L0_BR, L1_BR, L2_BR, L3_BR, L4_BR, L5_BR}; u32 max_bitrate = 0; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - /* ignore layer bitrate when total bitrate is set */ if (inst->capabilities[BIT_RATE].flags & CAP_FLAG_CLIENT_SET) { /* @@ -1738,11 +1643,6 @@ int msm_vidc_adjust_layer_bitrate(void *instance, struct v4l2_ctrl *ctrl) u32 old_br = 0, new_br = 0, exceeded_br = 0; s32 max_bitrate; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - if (!ctrl) return 0; @@ -1813,11 +1713,6 @@ int msm_vidc_adjust_peak_bitrate(void *instance, struct v4l2_ctrl *ctrl) struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; s32 rc_type = -1, bitrate = -1; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - adjusted_value = ctrl ? ctrl->val : inst->capabilities[PEAK_BITRATE].value; @@ -1888,11 +1783,6 @@ int msm_vidc_adjust_hevc_min_qp(void *instance, struct v4l2_ctrl *ctrl) struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - if (ctrl) msm_vidc_update_cap_value(inst, MIN_FRAME_QP, ctrl->val, __func__); @@ -1908,11 +1798,6 @@ int msm_vidc_adjust_hevc_max_qp(void *instance, struct v4l2_ctrl *ctrl) struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - if (ctrl) msm_vidc_update_cap_value(inst, MAX_FRAME_QP, ctrl->val, __func__); @@ -1928,11 +1813,6 @@ int msm_vidc_adjust_hevc_i_frame_qp(void *instance, struct v4l2_ctrl *ctrl) struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - if (ctrl) msm_vidc_update_cap_value(inst, I_FRAME_QP, ctrl->val, __func__); @@ -1950,11 +1830,6 @@ int msm_vidc_adjust_hevc_p_frame_qp(void *instance, struct v4l2_ctrl *ctrl) struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - if (ctrl) msm_vidc_update_cap_value(inst, P_FRAME_QP, ctrl->val, __func__); @@ -1972,11 +1847,6 @@ int msm_vidc_adjust_hevc_b_frame_qp(void *instance, struct v4l2_ctrl *ctrl) struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - if (ctrl) msm_vidc_update_cap_value(inst, B_FRAME_QP, ctrl->val, __func__); @@ -1995,11 +1865,6 @@ int msm_vidc_adjust_blur_type(void *instance, struct v4l2_ctrl *ctrl) s32 rc_type = -1, roi_enable = -1; s32 pix_fmts = -1, min_quality = -1; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - adjusted_value = ctrl ? ctrl->val : inst->capabilities[BLUR_TYPES].value; @@ -2058,11 +1923,6 @@ int msm_vidc_adjust_all_intra(void *instance, struct v4l2_ctrl *ctrl) s32 gop_size = -1, bframe = -1; u32 width, height, fps, mbps, max_mbps; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - adjusted_value = inst->capabilities[ALL_INTRA].value; if (msm_vidc_get_parent_value(inst, ALL_INTRA, GOP_SIZE, @@ -2101,11 +1961,6 @@ int msm_vidc_adjust_blur_resolution(void *instance, struct v4l2_ctrl *ctrl) struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; s32 blur_type = -1; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - adjusted_value = ctrl ? ctrl->val : inst->capabilities[BLUR_RESOLUTION].value; @@ -2129,11 +1984,6 @@ int msm_vidc_adjust_brs(void *instance, struct v4l2_ctrl *ctrl) s32 rc_type = -1, layer_enabled = -1, layer_type = -1; bool hp_requested = false; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - adjusted_value = ctrl ? ctrl->val : inst->capabilities[CONTENT_ADAPTIVE_CODING].value; @@ -2188,11 +2038,6 @@ int msm_vidc_adjust_bitrate_boost(void *instance, struct v4l2_ctrl *ctrl) s32 min_quality = -1, rc_type = -1; u32 max_bitrate = 0, bitrate = 0; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - adjusted_value = ctrl ? ctrl->val : inst->capabilities[BITRATE_BOOST].value; @@ -2245,11 +2090,6 @@ int msm_vidc_adjust_min_quality(void *instance, struct v4l2_ctrl *ctrl) u32 width, height, frame_rate; struct v4l2_format *f; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - adjusted_value = ctrl ? ctrl->val : inst->capabilities[MIN_QUALITY].value; /* @@ -2358,11 +2198,6 @@ int msm_vidc_adjust_preprocess(void *instance, struct v4l2_ctrl *ctrl) u32 width, height, frame_rate, operating_rate, max_fps; struct v4l2_format *f; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - adjusted_value = inst->capabilities[REQUEST_PREPROCESS].value; width = inst->crop.width; @@ -2413,11 +2248,6 @@ int msm_vidc_adjust_enc_lowlatency_mode(void *instance, struct v4l2_ctrl *ctrl) struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; s32 rc_type = -1; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - adjusted_value = ctrl ? ctrl->val : inst->capabilities[LOWLATENCY_MODE].value; @@ -2442,11 +2272,6 @@ int msm_vidc_adjust_dec_lowlatency_mode(void *instance, struct v4l2_ctrl *ctrl) struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; s32 outbuf_fence = MSM_VIDC_META_DISABLE; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - adjusted_value = ctrl ? ctrl->val : inst->capabilities[LOWLATENCY_MODE].value; @@ -2472,10 +2297,6 @@ int msm_vidc_adjust_session_priority(void *instance, struct v4l2_ctrl *ctrl) struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } /* * Priority handling * Client will set 0 (realtime), (1 to 4) (non-realtime) @@ -2510,11 +2331,6 @@ int msm_vidc_adjust_roi_info(void *instance, struct v4l2_ctrl *ctrl) struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; s32 rc_type = -1, pix_fmt = -1; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - adjusted_value = ctrl ? ctrl->val : inst->capabilities[META_ROI_INFO].value; if (msm_vidc_get_parent_value(inst, META_ROI_INFO, BITRATE_MODE, @@ -2542,11 +2358,6 @@ int msm_vidc_adjust_dec_outbuf_fence(void *instance, struct v4l2_ctrl *ctrl) u32 adjusted_value = 0; s32 picture_order = -1; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - adjusted_value = ctrl ? ctrl->val : inst->capabilities[META_OUTBUF_FENCE].value; if (msm_vidc_get_parent_value(inst, META_OUTBUF_FENCE, OUTPUT_ORDER, @@ -2572,10 +2383,6 @@ int msm_vidc_adjust_dec_outbuf_fence_type(void *instance, struct v4l2_ctrl *ctrl struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; struct msm_vidc_core *core; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } capability = inst->capabilities; core = inst->core; @@ -2608,10 +2415,6 @@ int msm_vidc_adjust_dec_outbuf_fence_direction(void *instance, struct v4l2_ctrl struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; struct msm_vidc_core *core; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } capability = inst->capabilities; core = inst->core; @@ -2642,11 +2445,6 @@ int msm_vidc_adjust_dec_slice_mode(void *instance, struct v4l2_ctrl *ctrl) s32 picture_order = -1; s32 outbuf_fence = 0; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - adjusted_value = ctrl ? ctrl->val : inst->capabilities[SLICE_DECODE].value; if (msm_vidc_get_parent_value(inst, SLICE_DECODE, LOWLATENCY_MODE, @@ -2673,11 +2471,6 @@ int msm_vidc_adjust_eva_stats(void *instance, struct v4l2_ctrl *ctrl) struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; s32 rc_type = -1; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - adjusted_value = ctrl ? ctrl->val : inst->capabilities[META_EVA_STATS].value; if (msm_vidc_get_parent_value(inst, META_EVA_STATS, BITRATE_MODE, @@ -2702,11 +2495,6 @@ int msm_vidc_adjust_sei_mastering_disp(void *instance, struct v4l2_ctrl *ctrl) struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; s32 profile = -1; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - adjusted_value = ctrl ? ctrl->val : inst->capabilities[META_SEI_MASTERING_DISP].value; if (msm_vidc_get_parent_value(inst, META_SEI_MASTERING_DISP, PROFILE, @@ -2738,11 +2526,6 @@ int msm_vidc_adjust_sei_cll(void *instance, struct v4l2_ctrl *ctrl) struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; s32 profile = -1; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - adjusted_value = ctrl ? ctrl->val : inst->capabilities[META_SEI_CLL].value; if (msm_vidc_get_parent_value(inst, META_SEI_CLL, PROFILE, @@ -2773,11 +2556,6 @@ int msm_vidc_adjust_hdr10plus(void *instance, struct v4l2_ctrl *ctrl) struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; s32 profile = -1; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - adjusted_value = ctrl ? ctrl->val : inst->capabilities[META_HDR10PLUS].value; if (msm_vidc_get_parent_value(inst, META_HDR10PLUS, PROFILE, @@ -2810,11 +2588,6 @@ int msm_vidc_adjust_transcoding_stats(void *instance, struct v4l2_ctrl *ctrl) u32 width, height, fps; struct v4l2_format *f; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - adjusted_value = ctrl ? ctrl->val : inst->capabilities[META_TRANSCODING_STAT_INFO].value; @@ -2872,12 +2645,6 @@ int msm_vidc_set_header_mode(void *instance, int header_mode, prepend_sps_pps; u32 hfi_value = 0; - - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - header_mode = inst->capabilities[cap_id].value; prepend_sps_pps = inst->capabilities[PREPEND_SPSPPS_TO_IDR].value; @@ -2908,12 +2675,6 @@ int msm_vidc_set_deblock_mode(void *instance, s32 alpha = 0, beta = 0; u32 lf_mode, hfi_value = 0, lf_offset = 6; - - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - rc = msm_vidc_v4l2_to_hfi_enum(inst, LF_MODE, &lf_mode); if (rc) return -EINVAL; @@ -2938,11 +2699,6 @@ int msm_vidc_set_constant_quality(void *instance, u32 hfi_value = 0; s32 rc_type = -1; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - if (msm_vidc_get_parent_value(inst, cap_id, BITRATE_MODE, &rc_type, __func__)) return -EINVAL; @@ -2968,11 +2724,6 @@ int msm_vidc_set_vbr_related_properties(void *instance, u32 hfi_value = 0; s32 rc_type = -1; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - if (msm_vidc_get_parent_value(inst, cap_id, BITRATE_MODE, &rc_type, __func__)) return -EINVAL; @@ -2998,11 +2749,6 @@ int msm_vidc_set_cbr_related_properties(void *instance, u32 hfi_value = 0; s32 rc_type = -1; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - if (msm_vidc_get_parent_value(inst, cap_id, BITRATE_MODE, &rc_type, __func__)) return -EINVAL; @@ -3028,11 +2774,6 @@ int msm_vidc_set_use_and_mark_ltr(void *instance, struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; u32 hfi_value = 0; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - if (!inst->capabilities[LTR_COUNT].value || (inst->capabilities[cap_id].value == INVALID_DEFAULT_MARK_OR_USE_LTR)) { @@ -3065,11 +2806,6 @@ int msm_vidc_set_min_qp(void *instance, u32 i_qp_enable = 0, p_qp_enable = 0, b_qp_enable = 0; u32 client_qp_enable = 0, hfi_value = 0, offset = 0; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - if (inst->capabilities[MIN_FRAME_QP].flags & CAP_FLAG_CLIENT_SET) min_qp_enable = 1; @@ -3129,11 +2865,6 @@ int msm_vidc_set_max_qp(void *instance, u32 i_qp_enable = 0, p_qp_enable = 0, b_qp_enable = 0; u32 client_qp_enable = 0, hfi_value = 0, offset = 0; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - if (inst->capabilities[MAX_FRAME_QP].flags & CAP_FLAG_CLIENT_SET) max_qp_enable = 1; @@ -3193,11 +2924,6 @@ int msm_vidc_set_frame_qp(void *instance, u32 i_qp_enable = 0, p_qp_enable = 0, b_qp_enable = 0; u32 client_qp_enable = 0, hfi_value = 0, offset = 0; s32 rc_type = -1; - - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } capab = inst->capabilities; if (msm_vidc_get_parent_value(inst, cap_id, @@ -3260,11 +2986,6 @@ int msm_vidc_set_req_sync_frame(void *instance, s32 prepend_spspps; u32 hfi_value = 0; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - prepend_spspps = inst->capabilities[PREPEND_SPSPPS_TO_IDR].value; if (prepend_spspps) hfi_value = HFI_SYNC_FRAME_REQUEST_WITH_PREFIX_SEQ_HDR; @@ -3287,11 +3008,6 @@ int msm_vidc_set_chroma_qp_index_offset(void *instance, u32 hfi_value = 0, chroma_qp_offset_mode = 0, chroma_qp = 0; u32 offset = 12; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - if (inst->capabilities[cap_id].flags & CAP_FLAG_CLIENT_SET) chroma_qp_offset_mode = HFI_FIXED_CHROMAQP_OFFSET; else @@ -3316,11 +3032,6 @@ int msm_vidc_set_slice_count(void *instance, s32 slice_mode = -1; u32 hfi_value = 0, set_cap_id = 0; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - slice_mode = inst->capabilities[SLICE_MODE].value; if (slice_mode == V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE) { @@ -3353,11 +3064,6 @@ int msm_vidc_set_nal_length(void *instance, struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; u32 hfi_value = HFI_NAL_LENGTH_STARTCODES; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - if (!inst->capabilities[WITHOUT_STARTCODE].value) { hfi_value = HFI_NAL_LENGTH_STARTCODES; } else { @@ -3381,11 +3087,6 @@ int msm_vidc_set_layer_count_and_type(void *instance, struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; u32 hfi_layer_count, hfi_layer_type = 0; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - if (!inst->bufq[OUTPUT_PORT].vb2q->streaming) { /* set layer type */ hfi_layer_type = inst->hfi_layer_type; @@ -3425,11 +3126,6 @@ int msm_vidc_set_gop_size(void *instance, struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; u32 hfi_value; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - if (inst->bufq[OUTPUT_PORT].vb2q->streaming) { if (inst->hfi_layer_type == HFI_HIER_B) { i_vpr_l(inst, @@ -3456,11 +3152,6 @@ int msm_vidc_set_bitrate(void *instance, struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; u32 hfi_value = 0; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - /* set Total Bitrate */ if (inst->capabilities[BIT_RATE].flags & CAP_FLAG_CLIENT_SET) goto set_total_bitrate; @@ -3491,11 +3182,6 @@ int msm_vidc_set_layer_bitrate(void *instance, struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; u32 hfi_value = 0; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - if (!inst->bufq[OUTPUT_PORT].vb2q->streaming) return 0; @@ -3539,11 +3225,6 @@ int msm_vidc_set_session_priority(void *instance, u32 hfi_value = 0; struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - hfi_value = inst->capabilities[cap_id].value; if (!is_critical_priority_session(inst)) hfi_value = inst->capabilities[cap_id].value + @@ -3564,11 +3245,6 @@ int msm_vidc_set_flip(void *instance, u32 hflip, vflip, hfi_value = HFI_DISABLE_FLIP; struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - hflip = inst->capabilities[HFLIP].value; vflip = inst->capabilities[VFLIP].value; @@ -3602,11 +3278,6 @@ int msm_vidc_set_preprocess(void *instance, struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; u32 hfi_value; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32_ENUM, &hfi_value, sizeof(u32), __func__); if (rc) @@ -3622,11 +3293,6 @@ int msm_vidc_set_rotation(void *instance, struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; u32 hfi_value; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - rc = msm_vidc_v4l2_to_hfi_enum(inst, cap_id, &hfi_value); if (rc) return -EINVAL; @@ -3647,11 +3313,6 @@ int msm_vidc_set_blur_resolution(void *instance, s32 blur_type = -1; u32 hfi_value, blur_width, blur_height; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - if (msm_vidc_get_parent_value(inst, cap_id, BLUR_TYPES, &blur_type, __func__)) return -EINVAL; @@ -3726,10 +3387,6 @@ int msm_vidc_set_csc_custom_matrix(void *instance, s32 csc_bias_payload[MAX_BIAS_COEFFS + 2]; s32 csc_limit_payload[MAX_LIMIT_COEFFS + 2]; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } core = inst->core; if (!core->platform) { d_vpr_e("%s: invalid core platform\n", __func__); @@ -3816,11 +3473,6 @@ int msm_vidc_set_reserve_duration(void *instance, u32 hfi_value = 0; struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - /* reserve hardware only when input port is streaming*/ if (!inst->bufq[INPUT_PORT].vb2q->streaming) return 0; @@ -3851,11 +3503,6 @@ int msm_vidc_set_level(void *instance, struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; u32 hfi_value = 0; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - hfi_value = inst->capabilities[cap_id].value; if (!(inst->capabilities[cap_id].flags & CAP_FLAG_CLIENT_SET)) hfi_value = HFI_LEVEL_NONE; @@ -3875,11 +3522,6 @@ int msm_vidc_set_q16(void *instance, struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; u32 hfi_value = 0; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - hfi_value = inst->capabilities[cap_id].value; rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_Q16, @@ -3897,11 +3539,6 @@ int msm_vidc_set_u32(void *instance, struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; u32 hfi_value; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - if (inst->capabilities[cap_id].flags & CAP_FLAG_MENU) { rc = msm_vidc_v4l2_menu_to_hfi(inst, cap_id, &hfi_value); if (rc) @@ -3925,11 +3562,6 @@ int msm_vidc_set_u32_packed(void *instance, struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; u32 hfi_value; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - if (inst->capabilities[cap_id].flags & CAP_FLAG_MENU) { rc = msm_vidc_v4l2_menu_to_hfi(inst, cap_id, &hfi_value); if (rc) @@ -3953,11 +3585,6 @@ int msm_vidc_set_u32_enum(void *instance, struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; u32 hfi_value; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - rc = msm_vidc_v4l2_to_hfi_enum(inst, cap_id, &hfi_value); if (rc) return -EINVAL; @@ -3977,10 +3604,6 @@ int msm_vidc_set_s32(void *instance, struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; s32 hfi_value = 0; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } hfi_value = inst->capabilities[cap_id].value; rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_S32, @@ -3999,10 +3622,6 @@ int msm_vidc_set_stage(void *instance, struct msm_vidc_core *core; struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } core = inst->core; rc = call_session_op(core, decide_work_mode, inst); @@ -4029,10 +3648,6 @@ int msm_vidc_set_pipe(void *instance, struct msm_vidc_core *core; struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } core = inst->core; rc = call_session_op(core, decide_work_route, inst); @@ -4058,11 +3673,6 @@ int msm_vidc_set_vui_timing_info(void *instance, struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; u32 hfi_value; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - /* * hfi is HFI_PROP_DISABLE_VUI_TIMING_INFO and v4l2 cap is * V4L2_CID_MPEG_VIDC_VUI_TIMING_INFO and hence reverse @@ -4088,11 +3698,6 @@ int msm_vidc_set_outbuf_fence_type(void *instance, struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; u32 hfi_value; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - if (inst->capabilities[OUTBUF_FENCE_TYPE].value == MSM_VIDC_FENCE_NONE) return 0; @@ -4114,11 +3719,6 @@ int msm_vidc_set_outbuf_fence_direction(void *instance, struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; u32 hfi_value; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - if (inst->capabilities[OUTBUF_FENCE_DIRECTION].value == MSM_VIDC_FENCE_DIR_NONE) return 0; diff --git a/driver/platform/common/src/msm_vidc_platform_ext.c b/driver/platform/common/src/msm_vidc_platform_ext.c index 0d973b7e16..96c974553a 100644 --- a/driver/platform/common/src/msm_vidc_platform_ext.c +++ b/driver/platform/common/src/msm_vidc_platform_ext.c @@ -20,11 +20,6 @@ int msm_vidc_adjust_ir_period(void *instance, struct v4l2_ctrl *ctrl) pix_fmts = MSM_VIDC_FMT_NONE; struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - adjusted_value = ctrl ? ctrl->val : inst->capabilities[IR_PERIOD].value; if (msm_vidc_get_parent_value(inst, IR_PERIOD, ALL_INTRA, @@ -83,11 +78,6 @@ int msm_vidc_adjust_dec_frame_rate(void *instance, struct v4l2_ctrl *ctrl) struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; u32 adjusted_value = 0; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - if (is_encode_session(inst)) { d_vpr_e("%s: adjust framerate invalid for enc\n", __func__); return -EINVAL; @@ -104,11 +94,6 @@ int msm_vidc_adjust_dec_operating_rate(void *instance, struct v4l2_ctrl *ctrl) struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; u32 adjusted_value = 0; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - if (is_encode_session(inst)) { d_vpr_e("%s: adjust operating rate invalid for enc\n", __func__); return -EINVAL; @@ -126,11 +111,6 @@ int msm_vidc_adjust_delivery_mode(void *instance, struct v4l2_ctrl *ctrl) s32 slice_mode = -1; struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - if (is_decode_session(inst)) return 0; @@ -159,11 +139,6 @@ int msm_vidc_set_ir_period(void *instance, u32 ir_type = 0; struct msm_vidc_core *core; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - core = inst->core; if (inst->capabilities[IR_TYPE].value == @@ -207,11 +182,6 @@ int msm_vidc_set_signal_color_info(void *instance, /* Unspecified video format */ u32 video_format = 5; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - if (!(inst->capabilities[cap_id].flags & CAP_FLAG_CLIENT_SET)) { i_vpr_h(inst, "%s: colorspace not configured via control\n", __func__); return 0; @@ -273,11 +243,6 @@ int msm_vidc_adjust_csc(void *instance, struct v4l2_ctrl *ctrl) s32 pix_fmt = -1; struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - if (is_decode_session(inst)) return 0; diff --git a/driver/platform/pineapple/src/msm_vidc_pineapple.c b/driver/platform/pineapple/src/msm_vidc_pineapple.c index e5f9d463d6..2862603b07 100644 --- a/driver/platform/pineapple/src/msm_vidc_pineapple.c +++ b/driver/platform/pineapple/src/msm_vidc_pineapple.c @@ -335,10 +335,6 @@ static int msm_vidc_set_ring_buffer_count_pineapple(void *instance, u32 count = 0, data_size = 0, pixel_count = 0, fps = 0; u32 frame_rate = 0, operating_rate = 0; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } core = inst->core; output_fmt = &inst->fmts[OUTPUT_PORT]; input_fmt = &inst->fmts[INPUT_PORT]; diff --git a/driver/platform/pineapple/src/pineapple.c b/driver/platform/pineapple/src/pineapple.c index 86acfa7eb3..7a25e18a90 100644 --- a/driver/platform/pineapple/src/pineapple.c +++ b/driver/platform/pineapple/src/pineapple.c @@ -234,10 +234,6 @@ static int msm_vidc_set_ring_buffer_count_pineapple(void *instance, u32 count = 0, data_size = 0, pixel_count = 0, fps = 0; u32 frame_rate = 0, operating_rate = 0; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } core = inst->core; output_fmt = &inst->fmts[OUTPUT_PORT]; input_fmt = &inst->fmts[INPUT_PORT]; diff --git a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c index d15722aec9..dd9bac7de8 100644 --- a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c @@ -24,10 +24,6 @@ static u32 msm_vidc_decoder_bin_size_iris2(struct msm_vidc_inst *inst) bool is_interlaced; u32 vpp_delay; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return size; - } core = inst->core; num_vpp_pipes = core->capabilities[NUM_VPP_PIPE].value; @@ -64,11 +60,6 @@ static u32 msm_vidc_decoder_comv_size_iris2(struct msm_vidc_inst* inst) u32 width, height, out_min_count, vpp_delay; struct v4l2_format* f; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return size; - } - f = &inst->fmts[INPUT_PORT]; width = f->fmt.pix_mp.width; height = f->fmt.pix_mp.height; @@ -95,10 +86,6 @@ static u32 msm_vidc_decoder_non_comv_size_iris2(struct msm_vidc_inst* inst) struct msm_vidc_core* core; struct v4l2_format* f; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return size; - } core = inst->core; num_vpp_pipes = core->capabilities[NUM_VPP_PIPE].value; @@ -125,10 +112,6 @@ static u32 msm_vidc_decoder_line_size_iris2(struct msm_vidc_inst *inst) bool is_opb; u32 color_fmt; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return size; - } core = inst->core; num_vpp_pipes = core->capabilities[NUM_VPP_PIPE].value; @@ -174,11 +157,6 @@ static u32 msm_vidc_decoder_persist_size_iris2(struct msm_vidc_inst *inst) u32 size = 0; u32 rpu_enabled = 0; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return size; - } - if (inst->capabilities[META_DOLBY_RPU].value) rpu_enabled = 1; @@ -199,11 +177,6 @@ static u32 msm_vidc_decoder_dpb_size_iris2(struct msm_vidc_inst *inst) u32 color_fmt, width, height, size = 0; struct v4l2_format *f; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return size; - } - color_fmt = inst->capabilities[PIX_FMTS].value; if (!is_linear_colorformat(color_fmt)) return size; @@ -248,10 +221,6 @@ static u32 msm_vidc_encoder_bin_size_iris2(struct msm_vidc_inst *inst) u32 width, height, num_vpp_pipes, stage; struct v4l2_format *f; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return size; - } core = inst->core; num_vpp_pipes = core->capabilities[NUM_VPP_PIPE].value; @@ -306,11 +275,6 @@ static u32 msm_vidc_encoder_comv_size_iris2(struct msm_vidc_inst* inst) u32 width, height, num_recon = 0; struct v4l2_format* f; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return size; - } - f = &inst->fmts[OUTPUT_PORT]; width = f->fmt.pix_mp.width; height = f->fmt.pix_mp.height; @@ -332,10 +296,6 @@ static u32 msm_vidc_encoder_non_comv_size_iris2(struct msm_vidc_inst* inst) u32 width, height, num_vpp_pipes; struct v4l2_format* f; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return size; - } core = inst->core; num_vpp_pipes = core->capabilities[NUM_VPP_PIPE].value; @@ -360,10 +320,6 @@ static u32 msm_vidc_encoder_line_size_iris2(struct msm_vidc_inst *inst) bool is_tenbit = false; struct v4l2_format *f; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return size; - } core = inst->core; num_vpp_pipes = core->capabilities[NUM_VPP_PIPE].value; @@ -390,11 +346,6 @@ static u32 msm_vidc_encoder_dpb_size_iris2(struct msm_vidc_inst *inst) struct v4l2_format *f; bool is_tenbit; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return 0; - } - f = &inst->fmts[OUTPUT_PORT]; width = f->fmt.pix_mp.width; height = f->fmt.pix_mp.height; @@ -415,11 +366,6 @@ static u32 msm_vidc_encoder_arp_size_iris2(struct msm_vidc_inst *inst) { u32 size = 0; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return 0; - } - HFI_BUFFER_ARP_ENC(size); i_vpr_l(inst, "%s: size %d\n", __func__, size); return size; @@ -433,11 +379,6 @@ static u32 msm_vidc_encoder_vpss_size_iris2(struct msm_vidc_inst* inst) u32 width, height, driver_colorfmt; struct v4l2_format* f; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return 0; - } - ds_enable = is_scaling_enabled(inst); msm_vidc_v4l2_to_hfi_enum(inst, ROTATION, &rotation_val); @@ -543,11 +484,6 @@ static int msm_vidc_input_min_count_iris2(struct msm_vidc_inst* inst) u32 input_min_count = 0; u32 total_hb_layer = 0; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return 0; - } - if (is_decode_session(inst)) { input_min_count = MIN_DEC_INPUT_BUFFERS; } else if (is_encode_session(inst)) { @@ -575,11 +511,6 @@ static int msm_buffer_dpb_count(struct msm_vidc_inst *inst) int count = 0; u32 color_fmt; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return 0; - } - /* decoder dpb buffer count */ if (is_decode_session(inst)) { color_fmt = inst->capabilities[PIX_FMTS].value; @@ -598,11 +529,6 @@ int msm_buffer_min_count_iris2(struct msm_vidc_inst *inst, { int count = 0; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return 0; - } - switch (buffer_type) { case MSM_VIDC_BUF_INPUT: case MSM_VIDC_BUF_INPUT_META: @@ -637,11 +563,6 @@ int msm_buffer_extra_count_iris2(struct msm_vidc_inst *inst, { int count = 0; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return 0; - } - switch (buffer_type) { case MSM_VIDC_BUF_INPUT: case MSM_VIDC_BUF_INPUT_META: diff --git a/driver/variant/iris2/src/msm_vidc_iris2.c b/driver/variant/iris2/src/msm_vidc_iris2.c index b65e16694c..c478b7ff9d 100644 --- a/driver/variant/iris2/src/msm_vidc_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_iris2.c @@ -815,11 +815,6 @@ int msm_vidc_decide_work_mode_iris2(struct msm_vidc_inst* inst) u32 width, height; bool res_ok = false; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - work_mode = MSM_VIDC_STAGE_2; inp_f = &inst->fmts[INPUT_PORT]; @@ -871,11 +866,6 @@ int msm_vidc_decide_work_route_iris2(struct msm_vidc_inst* inst) u32 work_route; struct msm_vidc_core* core; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - core = inst->core; work_route = core->capabilities[NUM_VPP_PIPE].value; @@ -914,11 +904,6 @@ int msm_vidc_adjust_blur_type_iris2(void *instance, struct v4l2_ctrl *ctrl) s32 rc_type = -1, cac = -1; s32 pix_fmts = -1, min_quality = -1; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - adjusted_value = ctrl ? ctrl->val : inst->capabilities[BLUR_TYPES].value; @@ -960,11 +945,6 @@ int msm_vidc_decide_quality_mode_iris2(struct msm_vidc_inst* inst) u32 mbpf, mbps, max_hq_mbpf, max_hq_mbps; u32 mode = MSM_VIDC_POWER_SAVE_MODE; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - if (!is_encode_session(inst)) return 0; diff --git a/driver/variant/iris2/src/msm_vidc_power_iris2.c b/driver/variant/iris2/src/msm_vidc_power_iris2.c index a24c569bb9..be3697fcaa 100644 --- a/driver/variant/iris2/src/msm_vidc_power_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_power_iris2.c @@ -22,16 +22,7 @@ u64 msm_vidc_calc_freq_iris2(struct msm_vidc_inst *inst, u32 data_size) u32 base_cycles = 0; u32 fps, mbpf; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return freq; - } - core = inst->core; - if (!core->resource) { - d_vpr_e("%s: invalid params\n", __func__); - return freq; - } mbpf = msm_vidc_get_mbs_per_frame(inst); fps = inst->max_rate; diff --git a/driver/variant/iris3/src/msm_vidc_buffer_iris3.c b/driver/variant/iris3/src/msm_vidc_buffer_iris3.c index 79f5688588..4d69beb044 100644 --- a/driver/variant/iris3/src/msm_vidc_buffer_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_buffer_iris3.c @@ -24,10 +24,6 @@ static u32 msm_vidc_decoder_bin_size_iris3(struct msm_vidc_inst *inst) bool is_interlaced; u32 vpp_delay; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return size; - } core = inst->core; num_vpp_pipes = core->capabilities[NUM_VPP_PIPE].value; @@ -66,11 +62,6 @@ static u32 msm_vidc_decoder_comv_size_iris3(struct msm_vidc_inst* inst) u32 width, height, num_comv, vpp_delay; struct v4l2_format *f; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return size; - } - f = &inst->fmts[INPUT_PORT]; width = f->fmt.pix_mp.width; height = f->fmt.pix_mp.height; @@ -124,10 +115,6 @@ static u32 msm_vidc_decoder_non_comv_size_iris3(struct msm_vidc_inst* inst) struct msm_vidc_core* core; struct v4l2_format* f; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return size; - } core = inst->core; num_vpp_pipes = core->capabilities[NUM_VPP_PIPE].value; @@ -154,10 +141,6 @@ static u32 msm_vidc_decoder_line_size_iris3(struct msm_vidc_inst *inst) bool is_opb; u32 color_fmt; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return size; - } core = inst->core; num_vpp_pipes = core->capabilities[NUM_VPP_PIPE].value; @@ -205,11 +188,6 @@ static u32 msm_vidc_decoder_partial_data_size_iris3(struct msm_vidc_inst *inst) u32 width, height; struct v4l2_format *f; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return size; - } - f = &inst->fmts[INPUT_PORT]; width = f->fmt.pix_mp.width; height = f->fmt.pix_mp.height; @@ -226,11 +204,6 @@ static u32 msm_vidc_decoder_persist_size_iris3(struct msm_vidc_inst *inst) u32 size = 0; u32 rpu_enabled = 0; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return size; - } - if (inst->capabilities[META_DOLBY_RPU].value) rpu_enabled = 1; @@ -268,11 +241,6 @@ static u32 msm_vidc_decoder_dpb_size_iris3(struct msm_vidc_inst *inst) u32 width, height; struct v4l2_format *f; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return size; - } - /* * For legacy codecs (non-AV1), DPB is calculated only * for linear formats. For AV1, DPB is needed for film-grain @@ -330,10 +298,6 @@ static u32 msm_vidc_encoder_bin_size_iris3(struct msm_vidc_inst *inst) u32 width, height, num_vpp_pipes, stage, profile; struct v4l2_format *f; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return size; - } core = inst->core; num_vpp_pipes = core->capabilities[NUM_VPP_PIPE].value; @@ -389,11 +353,6 @@ static u32 msm_vidc_encoder_comv_size_iris3(struct msm_vidc_inst* inst) u32 width, height, num_recon = 0; struct v4l2_format* f; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return size; - } - f = &inst->fmts[OUTPUT_PORT]; width = f->fmt.pix_mp.width; height = f->fmt.pix_mp.height; @@ -415,10 +374,6 @@ static u32 msm_vidc_encoder_non_comv_size_iris3(struct msm_vidc_inst* inst) u32 width, height, num_vpp_pipes; struct v4l2_format* f; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return size; - } core = inst->core; num_vpp_pipes = core->capabilities[NUM_VPP_PIPE].value; @@ -443,10 +398,6 @@ static u32 msm_vidc_encoder_line_size_iris3(struct msm_vidc_inst *inst) bool is_tenbit = false; struct v4l2_format *f; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return size; - } core = inst->core; num_vpp_pipes = core->capabilities[NUM_VPP_PIPE].value; pixfmt = inst->capabilities[PIX_FMTS].value; @@ -472,11 +423,6 @@ static u32 msm_vidc_encoder_dpb_size_iris3(struct msm_vidc_inst *inst) struct v4l2_format *f; bool is_tenbit; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return 0; - } - f = &inst->fmts[OUTPUT_PORT]; width = f->fmt.pix_mp.width; height = f->fmt.pix_mp.height; @@ -497,11 +443,6 @@ static u32 msm_vidc_encoder_arp_size_iris3(struct msm_vidc_inst *inst) { u32 size = 0; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return 0; - } - HFI_BUFFER_ARP_ENC(size); i_vpr_l(inst, "%s: size %d\n", __func__, size); return size; @@ -515,11 +456,6 @@ static u32 msm_vidc_encoder_vpss_size_iris3(struct msm_vidc_inst* inst) u32 width, height, driver_colorfmt; struct v4l2_format* f; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return 0; - } - ds_enable = is_scaling_enabled(inst); msm_vidc_v4l2_to_hfi_enum(inst, ROTATION, &rotation_val); @@ -558,11 +494,6 @@ static u32 msm_vidc_encoder_output_size_iris3(struct msm_vidc_inst *inst) u32 hfi_rc_type = HFI_RC_VBR_CFR; enum msm_vidc_codec_type codec; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - f = &inst->fmts[OUTPUT_PORT]; codec = v4l2_codec_to_driver(inst, f->fmt.pix_mp.pixelformat, __func__); if (codec == MSM_VIDC_HEVC || codec == MSM_VIDC_HEIC) @@ -660,11 +591,6 @@ static int msm_vidc_input_min_count_iris3(struct msm_vidc_inst* inst) u32 input_min_count = 0; u32 total_hb_layer = 0; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return 0; - } - if (is_decode_session(inst)) { input_min_count = MIN_DEC_INPUT_BUFFERS; } else if (is_encode_session(inst)) { @@ -692,11 +618,6 @@ static int msm_buffer_dpb_count(struct msm_vidc_inst *inst) int count = 0; u32 color_fmt; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return 0; - } - /* decoder dpb buffer count */ if (is_decode_session(inst)) { color_fmt = inst->capabilities[PIX_FMTS].value; @@ -722,11 +643,6 @@ static int msm_buffer_delivery_mode_based_min_count_iris3(struct msm_vidc_inst * u32 slice_mode = 0; u32 delivery_mode = 0; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return count; - } - slice_mode = inst->capabilities[SLICE_MODE].value; delivery_mode = inst->capabilities[DELIVERY_MODE].value; @@ -756,11 +672,6 @@ int msm_buffer_min_count_iris3(struct msm_vidc_inst *inst, { int count = 0; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return 0; - } - switch (buffer_type) { case MSM_VIDC_BUF_INPUT: case MSM_VIDC_BUF_INPUT_META: @@ -797,11 +708,6 @@ int msm_buffer_extra_count_iris3(struct msm_vidc_inst *inst, { int count = 0; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return 0; - } - switch (buffer_type) { case MSM_VIDC_BUF_INPUT: case MSM_VIDC_BUF_INPUT_META: diff --git a/driver/variant/iris3/src/msm_vidc_iris3.c b/driver/variant/iris3/src/msm_vidc_iris3.c index 6d81273ecb..976e2fedc1 100644 --- a/driver/variant/iris3/src/msm_vidc_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_iris3.c @@ -862,11 +862,6 @@ int msm_vidc_decide_work_mode_iris3(struct msm_vidc_inst* inst) u32 width, height; bool res_ok = false; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - work_mode = MSM_VIDC_STAGE_2; inp_f = &inst->fmts[INPUT_PORT]; @@ -922,11 +917,6 @@ int msm_vidc_decide_work_route_iris3(struct msm_vidc_inst* inst) u32 work_route; struct msm_vidc_core* core; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - core = inst->core; work_route = core->capabilities[NUM_VPP_PIPE].value; @@ -964,11 +954,6 @@ int msm_vidc_decide_quality_mode_iris3(struct msm_vidc_inst* inst) u32 mbpf, mbps, max_hq_mbpf, max_hq_mbps; u32 mode = MSM_VIDC_POWER_SAVE_MODE; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - if (!is_encode_session(inst)) return 0; @@ -1018,11 +1003,6 @@ int msm_vidc_adjust_bitrate_boost_iris3(void* instance, struct v4l2_ctrl *ctrl) struct v4l2_format *f; u32 max_bitrate = 0, bitrate = 0; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - adjusted_value = ctrl ? ctrl->val : inst->capabilities[BITRATE_BOOST].value; diff --git a/driver/variant/iris3/src/msm_vidc_power_iris3.c b/driver/variant/iris3/src/msm_vidc_power_iris3.c index 969c8b0eec..3b94833cbb 100644 --- a/driver/variant/iris3/src/msm_vidc_power_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_power_iris3.c @@ -293,11 +293,6 @@ static u64 msm_vidc_calc_freq_iris3_new(struct msm_vidc_inst *inst, u32 data_siz struct api_calculation_freq_output codec_output; u32 fps, mbpf; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return freq; - } - core = inst->core; mbpf = msm_vidc_get_mbs_per_frame(inst); @@ -362,11 +357,6 @@ u64 msm_vidc_calc_freq_iris3(struct msm_vidc_inst *inst, u32 data_size) { u64 freq = 0; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return freq; - } - if (ENABLE_LEGACY_POWER_CALCULATIONS) freq = msm_vidc_calc_freq_iris3_legacy(inst, data_size); else @@ -387,10 +377,6 @@ static u64 msm_vidc_calc_freq_iris3_legacy(struct msm_vidc_inst *inst, u32 data_ u32 base_cycles = 0; u32 fps, mbpf; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return freq; - } core = inst->core; if (!core->resource || !core->resource->freq_set.freq_tbl || diff --git a/driver/variant/iris33/src/msm_vidc_buffer_iris33.c b/driver/variant/iris33/src/msm_vidc_buffer_iris33.c index dc13f60d24..b6d77771ff 100644 --- a/driver/variant/iris33/src/msm_vidc_buffer_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_buffer_iris33.c @@ -24,10 +24,6 @@ static u32 msm_vidc_decoder_bin_size_iris33(struct msm_vidc_inst *inst) bool is_interlaced; u32 vpp_delay; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return size; - } core = inst->core; num_vpp_pipes = core->capabilities[NUM_VPP_PIPE].value; @@ -66,11 +62,6 @@ static u32 msm_vidc_decoder_comv_size_iris33(struct msm_vidc_inst* inst) u32 width, height, num_comv, vpp_delay; struct v4l2_format *f; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return size; - } - f = &inst->fmts[INPUT_PORT]; width = f->fmt.pix_mp.width; height = f->fmt.pix_mp.height; @@ -124,10 +115,6 @@ static u32 msm_vidc_decoder_non_comv_size_iris33(struct msm_vidc_inst* inst) struct msm_vidc_core* core; struct v4l2_format* f; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return size; - } core = inst->core; num_vpp_pipes = core->capabilities[NUM_VPP_PIPE].value; @@ -154,10 +141,6 @@ static u32 msm_vidc_decoder_line_size_iris33(struct msm_vidc_inst *inst) bool is_opb; u32 color_fmt; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return size; - } core = inst->core; num_vpp_pipes = core->capabilities[NUM_VPP_PIPE].value; @@ -205,11 +188,6 @@ static u32 msm_vidc_decoder_partial_data_size_iris33(struct msm_vidc_inst *inst) u32 width, height; struct v4l2_format *f; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return size; - } - f = &inst->fmts[INPUT_PORT]; width = f->fmt.pix_mp.width; height = f->fmt.pix_mp.height; @@ -226,11 +204,6 @@ static u32 msm_vidc_decoder_persist_size_iris33(struct msm_vidc_inst *inst) u32 size = 0; u32 rpu_enabled = 0; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return size; - } - if (inst->capabilities[META_DOLBY_RPU].value) rpu_enabled = 1; @@ -269,11 +242,6 @@ static u32 msm_vidc_decoder_dpb_size_iris33(struct msm_vidc_inst *inst) u32 interlace = 0; struct v4l2_format *f; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return size; - } - /* * For legacy codecs (non-AV1), DPB is calculated only * for linear formats. For AV1, DPB is needed for film-grain @@ -337,10 +305,6 @@ static u32 msm_vidc_encoder_bin_size_iris33(struct msm_vidc_inst *inst) u32 width, height, num_vpp_pipes, stage, profile, ring_buf_count; struct v4l2_format *f; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return size; - } core = inst->core; num_vpp_pipes = core->capabilities[NUM_VPP_PIPE].value; @@ -397,11 +361,6 @@ static u32 msm_vidc_encoder_comv_size_iris33(struct msm_vidc_inst* inst) u32 width, height, num_recon = 0; struct v4l2_format* f; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return size; - } - f = &inst->fmts[OUTPUT_PORT]; width = f->fmt.pix_mp.width; height = f->fmt.pix_mp.height; @@ -423,10 +382,6 @@ static u32 msm_vidc_encoder_non_comv_size_iris33(struct msm_vidc_inst* inst) u32 width, height, num_vpp_pipes; struct v4l2_format* f; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return size; - } core = inst->core; num_vpp_pipes = core->capabilities[NUM_VPP_PIPE].value; @@ -451,10 +406,6 @@ static u32 msm_vidc_encoder_line_size_iris33(struct msm_vidc_inst *inst) bool is_tenbit = false; struct v4l2_format *f; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return size; - } core = inst->core; num_vpp_pipes = core->capabilities[NUM_VPP_PIPE].value; pixfmt = inst->capabilities[PIX_FMTS].value; @@ -480,11 +431,6 @@ static u32 msm_vidc_encoder_dpb_size_iris33(struct msm_vidc_inst *inst) struct v4l2_format *f; bool is_tenbit; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return 0; - } - f = &inst->fmts[OUTPUT_PORT]; width = f->fmt.pix_mp.width; height = f->fmt.pix_mp.height; @@ -505,11 +451,6 @@ static u32 msm_vidc_encoder_arp_size_iris33(struct msm_vidc_inst *inst) { u32 size = 0; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return 0; - } - HFI_BUFFER_ARP_ENC(size); i_vpr_l(inst, "%s: size %d\n", __func__, size); return size; @@ -523,11 +464,6 @@ static u32 msm_vidc_encoder_vpss_size_iris33(struct msm_vidc_inst* inst) u32 width, height, driver_colorfmt; struct v4l2_format* f; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return 0; - } - ds_enable = is_scaling_enabled(inst); msm_vidc_v4l2_to_hfi_enum(inst, ROTATION, &rotation_val); @@ -566,11 +502,6 @@ static u32 msm_vidc_encoder_output_size_iris33(struct msm_vidc_inst *inst) u32 hfi_rc_type = HFI_RC_VBR_CFR; enum msm_vidc_codec_type codec; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - f = &inst->fmts[OUTPUT_PORT]; codec = v4l2_codec_to_driver(inst, f->fmt.pix_mp.pixelformat, __func__); if (codec == MSM_VIDC_HEVC || codec == MSM_VIDC_HEIC) @@ -668,11 +599,6 @@ static int msm_vidc_input_min_count_iris33(struct msm_vidc_inst* inst) u32 input_min_count = 0; u32 total_hb_layer = 0; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return 0; - } - if (is_decode_session(inst)) { input_min_count = MIN_DEC_INPUT_BUFFERS; } else if (is_encode_session(inst)) { @@ -700,11 +626,6 @@ static int msm_buffer_dpb_count(struct msm_vidc_inst *inst) int count = 0; u32 color_fmt; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return 0; - } - /* decoder dpb buffer count */ if (is_decode_session(inst)) { color_fmt = inst->capabilities[PIX_FMTS].value; @@ -730,11 +651,6 @@ static int msm_buffer_delivery_mode_based_min_count_iris33(struct msm_vidc_inst u32 slice_mode = 0; u32 delivery_mode = 0; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return count; - } - slice_mode = inst->capabilities[SLICE_MODE].value; delivery_mode = inst->capabilities[DELIVERY_MODE].value; @@ -764,11 +680,6 @@ int msm_buffer_min_count_iris33(struct msm_vidc_inst *inst, { int count = 0; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return 0; - } - switch (buffer_type) { case MSM_VIDC_BUF_INPUT: case MSM_VIDC_BUF_INPUT_META: @@ -805,11 +716,6 @@ int msm_buffer_extra_count_iris33(struct msm_vidc_inst *inst, { int count = 0; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return 0; - } - switch (buffer_type) { case MSM_VIDC_BUF_INPUT: case MSM_VIDC_BUF_INPUT_META: diff --git a/driver/variant/iris33/src/msm_vidc_iris33.c b/driver/variant/iris33/src/msm_vidc_iris33.c index 7931da6256..3364d93139 100644 --- a/driver/variant/iris33/src/msm_vidc_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_iris33.c @@ -1111,11 +1111,6 @@ int msm_vidc_decide_work_mode_iris33(struct msm_vidc_inst* inst) u32 width, height; bool res_ok = false; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - work_mode = MSM_VIDC_STAGE_2; inp_f = &inst->fmts[INPUT_PORT]; @@ -1171,11 +1166,6 @@ int msm_vidc_decide_work_route_iris33(struct msm_vidc_inst* inst) u32 work_route; struct msm_vidc_core* core; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - core = inst->core; work_route = core->capabilities[NUM_VPP_PIPE].value; @@ -1213,11 +1203,6 @@ int msm_vidc_decide_quality_mode_iris33(struct msm_vidc_inst* inst) u32 mbpf, mbps, max_hq_mbpf, max_hq_mbps; u32 mode = MSM_VIDC_POWER_SAVE_MODE; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - if (!is_encode_session(inst)) return 0; @@ -1267,11 +1252,6 @@ int msm_vidc_adjust_bitrate_boost_iris33(void* instance, struct v4l2_ctrl *ctrl) struct v4l2_format *f; u32 max_bitrate = 0, bitrate = 0; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - adjusted_value = ctrl ? ctrl->val : inst->capabilities[BITRATE_BOOST].value; diff --git a/driver/variant/iris33/src/msm_vidc_power_iris33.c b/driver/variant/iris33/src/msm_vidc_power_iris33.c index 7526c99bc6..bb14d8a413 100644 --- a/driver/variant/iris33/src/msm_vidc_power_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_power_iris33.c @@ -414,11 +414,6 @@ static u64 msm_vidc_calc_freq_iris33_new(struct msm_vidc_inst *inst, u32 data_si struct api_calculation_freq_output codec_output; u32 fps, mbpf; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return freq; - } - core = inst->core; mbpf = msm_vidc_get_mbs_per_frame(inst); @@ -511,11 +506,6 @@ u64 msm_vidc_calc_freq_iris33(struct msm_vidc_inst *inst, u32 data_size) { u64 freq = 0; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return freq; - } - if (ENABLE_LEGACY_POWER_CALCULATIONS) freq = msm_vidc_calc_freq_iris33_legacy(inst, data_size); else @@ -536,10 +526,6 @@ u64 msm_vidc_calc_freq_iris33_legacy(struct msm_vidc_inst *inst, u32 data_size) u32 base_cycles = 0; u32 fps, mbpf; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return freq; - } core = inst->core; if (!core->resource || !core->resource->freq_set.freq_tbl || @@ -1335,10 +1321,6 @@ int msm_vidc_ring_buf_count_iris33(struct msm_vidc_inst *inst, u32 data_size) struct api_calculation_input codec_input; struct api_calculation_freq_output codec_output; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } core = inst->core; if (!core->resource || !core->resource->freq_set.freq_tbl || diff --git a/driver/vidc/inc/msm_vidc.h b/driver/vidc/inc/msm_vidc.h index 891c3db405..1cb9e9dd5e 100644 --- a/driver/vidc/inc/msm_vidc.h +++ b/driver/vidc/inc/msm_vidc.h @@ -15,43 +15,43 @@ union msm_v4l2_cmd { struct v4l2_encoder_cmd enc; }; -void *msm_vidc_open(void *core, u32 session_type); -int msm_vidc_close(void *instance); -int msm_vidc_querycap(void *instance, struct v4l2_capability *cap); -int msm_vidc_enum_fmt(void *instance, struct v4l2_fmtdesc *f); -int msm_vidc_try_fmt(void *instance, struct v4l2_format *f); -int msm_vidc_s_fmt(void *instance, struct v4l2_format *f); -int msm_vidc_g_fmt(void *instance, struct v4l2_format *f); -int msm_vidc_s_selection(void* instance, struct v4l2_selection* s); -int msm_vidc_g_selection(void* instance, struct v4l2_selection* s); -int msm_vidc_s_param(void *instance, struct v4l2_streamparm *sp); -int msm_vidc_g_param(void *instance, struct v4l2_streamparm *sp); -int msm_vidc_reqbufs(void *instance, struct v4l2_requestbuffers *b); -int msm_vidc_querybuf(void *instance, struct v4l2_buffer *b); -int msm_vidc_create_bufs(void *instance, struct v4l2_create_buffers *b); -int msm_vidc_prepare_buf(void *instance, struct media_device *mdev, +void *msm_vidc_open(struct msm_vidc_core *core, u32 session_type); +int msm_vidc_close(struct msm_vidc_inst *inst); +int msm_vidc_querycap(struct msm_vidc_inst *inst, struct v4l2_capability *cap); +int msm_vidc_enum_fmt(struct msm_vidc_inst *inst, struct v4l2_fmtdesc *f); +int msm_vidc_try_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f); +int msm_vidc_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f); +int msm_vidc_g_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f); +int msm_vidc_s_selection(struct msm_vidc_inst *inst, struct v4l2_selection* s); +int msm_vidc_g_selection(struct msm_vidc_inst *inst, struct v4l2_selection* s); +int msm_vidc_s_param(struct msm_vidc_inst *inst, struct v4l2_streamparm *sp); +int msm_vidc_g_param(struct msm_vidc_inst *inst, struct v4l2_streamparm *sp); +int msm_vidc_reqbufs(struct msm_vidc_inst *inst, struct v4l2_requestbuffers *b); +int msm_vidc_querybuf(struct msm_vidc_inst *inst, struct v4l2_buffer *b); +int msm_vidc_create_bufs(struct msm_vidc_inst *inst, struct v4l2_create_buffers *b); +int msm_vidc_prepare_buf(struct msm_vidc_inst *inst, struct media_device *mdev, struct v4l2_buffer *b); -int msm_vidc_release_buffer(void *instance, int buffer_type, +int msm_vidc_release_buffer(struct msm_vidc_inst *inst, int buffer_type, unsigned int buffer_index); -int msm_vidc_qbuf(void *instance, struct media_device *mdev, +int msm_vidc_qbuf(struct msm_vidc_inst *inst, struct media_device *mdev, struct v4l2_buffer *b); -int msm_vidc_dqbuf(void *instance, struct v4l2_buffer *b); -int msm_vidc_streamon(void *instance, enum v4l2_buf_type i); -int msm_vidc_query_ctrl(void *instance, struct v4l2_queryctrl *ctrl); -int msm_vidc_query_menu(void *instance, struct v4l2_querymenu *qmenu); -int msm_vidc_streamoff(void *instance, enum v4l2_buf_type i); -int msm_vidc_try_cmd(void *instance, union msm_v4l2_cmd *cmd); -int msm_vidc_start_cmd(void *instance); -int msm_vidc_stop_cmd(void *instance); -int msm_vidc_poll(void *instance, struct file *filp, +int msm_vidc_dqbuf(struct msm_vidc_inst *inst, struct v4l2_buffer *b); +int msm_vidc_streamon(struct msm_vidc_inst *inst, enum v4l2_buf_type i); +int msm_vidc_query_ctrl(struct msm_vidc_inst *inst, struct v4l2_queryctrl *ctrl); +int msm_vidc_query_menu(struct msm_vidc_inst *inst, struct v4l2_querymenu *qmenu); +int msm_vidc_streamoff(struct msm_vidc_inst *inst, enum v4l2_buf_type i); +int msm_vidc_try_cmd(struct msm_vidc_inst *inst, union msm_v4l2_cmd *cmd); +int msm_vidc_start_cmd(struct msm_vidc_inst *inst); +int msm_vidc_stop_cmd(struct msm_vidc_inst *inst); +int msm_vidc_poll(struct msm_vidc_inst *inst, struct file *filp, struct poll_table_struct *pt); -int msm_vidc_subscribe_event(void *instance, +int msm_vidc_subscribe_event(struct msm_vidc_inst *inst, const struct v4l2_event_subscription *sub); -int msm_vidc_unsubscribe_event(void *instance, +int msm_vidc_unsubscribe_event(struct msm_vidc_inst *inst, const struct v4l2_event_subscription *sub); -int msm_vidc_dqevent(void *instance, struct v4l2_event *event); -int msm_vidc_g_crop(void *instance, struct v4l2_crop *a); -int msm_vidc_enum_framesizes(void *instance, struct v4l2_frmsizeenum *fsize); -int msm_vidc_enum_frameintervals(void *instance, struct v4l2_frmivalenum *fival); +int msm_vidc_dqevent(struct msm_vidc_inst *inst, struct v4l2_event *event); +int msm_vidc_g_crop(struct msm_vidc_inst *inst, struct v4l2_crop *a); +int msm_vidc_enum_framesizes(struct msm_vidc_inst *inst, struct v4l2_frmsizeenum *fsize); +int msm_vidc_enum_frameintervals(struct msm_vidc_inst *inst, struct v4l2_frmivalenum *fival); #endif diff --git a/driver/vidc/inc/msm_vidc_debug.h b/driver/vidc/inc/msm_vidc_debug.h index 84bc7820c1..cec04fcbae 100644 --- a/driver/vidc/inc/msm_vidc_debug.h +++ b/driver/vidc/inc/msm_vidc_debug.h @@ -14,6 +14,9 @@ #include #include +struct msm_vidc_core; +struct msm_vidc_inst; + #ifndef VIDC_DBG_LABEL #define VIDC_DBG_LABEL "msm_vidc" #endif @@ -172,14 +175,14 @@ enum msm_vidc_bug_on_error { }; struct dentry *msm_vidc_debugfs_init_drv(void); -struct dentry *msm_vidc_debugfs_init_core(void *core); -struct dentry *msm_vidc_debugfs_init_inst(void *inst, +struct dentry *msm_vidc_debugfs_init_core(struct msm_vidc_core *core); +struct dentry *msm_vidc_debugfs_init_inst(struct msm_vidc_inst *inst, struct dentry *parent); -void msm_vidc_debugfs_deinit_inst(void *inst); -void msm_vidc_debugfs_update(void *inst, +void msm_vidc_debugfs_deinit_inst(struct msm_vidc_inst *inst); +void msm_vidc_debugfs_update(struct msm_vidc_inst *inst, enum msm_vidc_debugfs_event e); int msm_vidc_check_ratelimit(void); -void msm_vidc_show_stats(void *inst); +void msm_vidc_show_stats(struct msm_vidc_inst *inst); static inline bool is_stats_enabled(void) { diff --git a/driver/vidc/src/hfi_packet.c b/driver/vidc/src/hfi_packet.c index e8caebe1fd..b13ee022cc 100644 --- a/driver/vidc/src/hfi_packet.c +++ b/driver/vidc/src/hfi_packet.c @@ -16,11 +16,6 @@ u32 get_hfi_port(struct msm_vidc_inst *inst, { u32 hfi_port = HFI_PORT_NONE; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return hfi_port; - } - if (is_decode_session(inst)) { switch (port) { case INPUT_PORT: @@ -64,11 +59,6 @@ u32 get_hfi_port_from_buffer_type(struct msm_vidc_inst *inst, { u32 hfi_port = HFI_PORT_NONE; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return hfi_port; - } - if (is_decode_session(inst)) { switch (buffer_type) { case MSM_VIDC_BUF_INPUT: @@ -219,11 +209,6 @@ u32 hfi_buf_type_to_driver(enum msm_vidc_domain_type domain, u32 get_hfi_codec(struct msm_vidc_inst *inst) { - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return 0; - } - switch (inst->codec) { case MSM_VIDC_H264: if (inst->domain == MSM_VIDC_ENCODER) @@ -252,12 +237,7 @@ u32 get_hfi_colorformat(struct msm_vidc_inst *inst, { u32 hfi_colorformat = HFI_COLOR_FMT_NV12_UBWC; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return hfi_colorformat; - } - - switch (colorformat) { + switch(colorformat) { case MSM_VIDC_FMT_NV12: hfi_colorformat = HFI_COLOR_FMT_NV12; break; @@ -312,11 +292,6 @@ static u32 get_hfi_region_flag(enum msm_vidc_buffer_region region) int get_hfi_buffer(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buffer, struct hfi_buffer *buf) { - if (!inst || !buffer || !buf) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - memset(buf, 0, sizeof(struct hfi_buffer)); buf->type = hfi_buf_type_from_driver(inst->domain, buffer->type); buf->index = buffer->index; @@ -691,10 +666,6 @@ int hfi_packet_session_command(struct msm_vidc_inst *inst, int rc = 0; struct msm_vidc_core *core; - if (!inst || !inst->core || !inst->packet) { - d_vpr_e("%s: Invalid params\n", __func__); - return -EINVAL; - } core = inst->core; rc = hfi_create_header(inst->packet, inst->packet_size, diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index e461146cf9..40705c67af 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -673,11 +673,6 @@ static int msm_vdec_set_output_properties(struct msm_vidc_inst *inst) { int rc = 0; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - rc = msm_vdec_set_opb_enable(inst); if (rc) return rc; @@ -706,11 +701,6 @@ int msm_vdec_get_input_internal_buffers(struct msm_vidc_inst *inst) int rc = 0; u32 i = 0; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - for (i = 0; i < ARRAY_SIZE(msm_vdec_internal_buffer_type); i++) { rc = msm_vidc_get_internal_buffers(inst, msm_vdec_internal_buffer_type[i]); if (rc) @@ -724,11 +714,6 @@ static int msm_vdec_get_output_internal_buffers(struct msm_vidc_inst *inst) { int rc = 0; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - rc = msm_vidc_get_internal_buffers(inst, MSM_VIDC_BUF_DPB); if (rc) return rc; @@ -869,10 +854,6 @@ static int msm_vdec_subscribe_input_port_settings_change(struct msm_vidc_inst *i {HFI_PROP_AV1_SUPER_BLOCK_ENABLED, msm_vdec_set_av1_superblock_enabled }, }; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } i_vpr_h(inst, "%s()\n", __func__); core = inst->core; @@ -947,10 +928,6 @@ static int msm_vdec_subscribe_property(struct msm_vidc_inst *inst, u32 subscribe_prop_size; const u32 *subcribe_prop; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } core = inst->core; i_vpr_h(inst, "%s()\n", __func__); @@ -1048,10 +1025,6 @@ static int msm_vdec_subscribe_metadata(struct msm_vidc_inst *inst, u32 payload[32] = {0}; u32 i, count = 0; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } i_vpr_h(inst, "%s()\n", __func__); payload[0] = HFI_MODE_METADATA; @@ -1109,10 +1082,6 @@ static int msm_vdec_set_delivery_mode_metadata(struct msm_vidc_inst *inst, u32 payload[32] = {0}; u32 i, count = 0; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } i_vpr_h(inst, "%s()\n", __func__); payload[0] = HFI_MODE_METADATA; @@ -1173,10 +1142,6 @@ static int msm_vdec_set_delivery_mode_property(struct msm_vidc_inst *inst, }; static const u32 property_input_list[] = {}; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } i_vpr_h(inst, "%s()\n", __func__); payload[0] = HFI_MODE_PROPERTY; @@ -1237,10 +1202,6 @@ int msm_vdec_init_input_subcr_params(struct msm_vidc_inst *inst) u32 colour_description_present_flag = 0; u32 video_signal_type_present_flag = 0; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } subsc_params = &inst->subcr_params[INPUT_PORT]; subsc_params->bitstream_resolution = @@ -1296,11 +1257,6 @@ int msm_vdec_set_num_comv(struct msm_vidc_inst *inst) int rc = 0; u32 num_comv = 0; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - num_comv = inst->capabilities[NUM_COMV].value; i_vpr_h(inst, "%s: num COMV: %d", __func__, num_comv); rc = venus_hfi_session_property(inst, @@ -1329,10 +1285,6 @@ static int msm_vdec_read_input_subcr_params(struct msm_vidc_inst *inst) u32 video_signal_type_present_flag = 0; enum msm_vidc_colorformat_type output_fmt; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } core = inst->core; subsc_params = inst->subcr_params[INPUT_PORT]; @@ -1484,11 +1436,6 @@ int msm_vdec_streamoff_input(struct msm_vidc_inst *inst) { int rc = 0; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - rc = msm_vidc_session_streamoff(inst, INPUT_PORT); if (rc) return rc; @@ -1500,11 +1447,6 @@ int msm_vdec_streamon_input(struct msm_vidc_inst *inst) { int rc = 0; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - if (is_input_meta_enabled(inst) && !inst->bufq[INPUT_META_PORT].vb2q->streaming) { i_vpr_e(inst, @@ -1625,11 +1567,6 @@ int msm_vdec_streamoff_output(struct msm_vidc_inst *inst) { int rc = 0; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - /* cancel pending batch work */ cancel_batch_work(inst); rc = msm_vidc_session_streamoff(inst, OUTPUT_PORT); @@ -1651,10 +1588,6 @@ static int msm_vdec_subscribe_output_port_settings_change(struct msm_vidc_inst * u32 subscribe_psc_size = 0; const u32 *psc = NULL; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } i_vpr_h(inst, "%s()\n", __func__); core = inst->core; @@ -1797,11 +1730,6 @@ static int msm_vdec_update_max_map_output_count(struct msm_vidc_inst *inst) struct v4l2_format *f; u32 width, height, count; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - f = &inst->fmts[OUTPUT_PORT]; width = f->fmt.pix_mp.width; height = f->fmt.pix_mp.height; @@ -1833,11 +1761,6 @@ int msm_vdec_streamon_output(struct msm_vidc_inst *inst) { int rc = 0; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - if (is_output_meta_enabled(inst) && !inst->bufq[OUTPUT_META_PORT].vb2q->streaming) { i_vpr_e(inst, @@ -1925,11 +1848,6 @@ static inline enum msm_vidc_allow msm_vdec_allow_queue_deferred_buffers( { int count; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return MSM_VIDC_DISALLOW; - } - /* do not defer buffers initially to avoid latency issues */ if (inst->power.buffer_counter <= SKIP_BATCH_WINDOW) return MSM_VIDC_ALLOW; @@ -1949,7 +1867,7 @@ static int msm_vdec_qbuf_batch(struct msm_vidc_inst *inst, enum msm_vidc_allow allow; int rc; - if (!inst || !vb2 || !inst->decode_batch.size) { + if (!inst->decode_batch.size) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -1987,11 +1905,6 @@ static int msm_vdec_release_eligible_buffers(struct msm_vidc_inst *inst) int rc = 0; struct msm_vidc_buffer *ro_buf; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - list_for_each_entry(ro_buf, &inst->buffers.read_only.list, list) { /* release only release eligible read-only buffers */ if (!(ro_buf->attr & MSM_VIDC_ATTR_RELEASE_ELIGIBLE)) @@ -2018,11 +1931,6 @@ static int msm_vdec_release_nonref_buffers(struct msm_vidc_inst *inst) int i = 0; bool found = false; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - /* * if DPB_LIST subscribed on output port then driver need to * hold MAX_BPB_COUNT of read only buffer at least. @@ -2106,11 +2014,6 @@ int msm_vdec_qbuf(struct msm_vidc_inst *inst, struct vb2_buffer *vb2) { int rc = 0; - if (!inst || !vb2) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - if (inst->adjust_priority) { s32 priority = inst->capabilities[PRIORITY].value; @@ -2152,11 +2055,6 @@ static int msm_vdec_alloc_and_queue_additional_dpb_buffers(struct msm_vidc_inst struct msm_vidc_buffer *buffer = NULL; int i, cur_min_count = 0, rc = 0; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - /* get latest min_count and size */ rc = msm_vidc_get_internal_buffers(inst, MSM_VIDC_BUF_DPB); if (rc) @@ -2208,11 +2106,6 @@ int msm_vdec_start_cmd(struct msm_vidc_inst *inst) { int rc = 0; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - i_vpr_h(inst, "received cmd: resume\n"); vb2_clear_last_buffer_dequeued(inst->bufq[OUTPUT_META_PORT].vb2q); vb2_clear_last_buffer_dequeued(inst->bufq[OUTPUT_PORT].vb2q); @@ -2280,11 +2173,6 @@ int msm_vdec_try_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) struct v4l2_pix_format_mplane *pixmp = &f->fmt.pix_mp; u32 pix_fmt; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - memset(pixmp->reserved, 0, sizeof(pixmp->reserved)); if (f->type == INPUT_MPLANE) { pix_fmt = v4l2_codec_to_driver(inst, f->fmt.pix_mp.pixelformat, __func__); @@ -2352,10 +2240,6 @@ int msm_vdec_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) u32 codec_align; enum msm_vidc_colorformat_type colorformat; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } core = inst->core; msm_vdec_try_fmt(inst, f); @@ -2528,11 +2412,6 @@ int msm_vdec_g_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) int rc = 0; int port; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - port = v4l2_type_to_driver_port(inst, f->type, __func__); if (port < 0) return -EINVAL; @@ -2544,20 +2423,12 @@ int msm_vdec_g_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) int msm_vdec_s_selection(struct msm_vidc_inst* inst, struct v4l2_selection* s) { - if (!inst || !s) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } i_vpr_e(inst, "%s: unsupported\n", __func__); return -EINVAL; } int msm_vdec_g_selection(struct msm_vidc_inst* inst, struct v4l2_selection* s) { - if (!inst || !s) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } if (s->type != OUTPUT_MPLANE && s->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) { i_vpr_e(inst, "%s: invalid type %d\n", __func__, s->type); return -EINVAL; @@ -2592,11 +2463,6 @@ int msm_vdec_subscribe_event(struct msm_vidc_inst *inst, { int rc = 0; - if (!inst || !sub) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - switch (sub->type) { case V4L2_EVENT_EOS: rc = v4l2_event_subscribe(&inst->event_handler, sub, MAX_EVENTS, NULL); @@ -2653,8 +2519,7 @@ int msm_vdec_enum_fmt(struct msm_vidc_inst *inst, struct v4l2_fmtdesc *f) u32 array[32] = {0}; u32 i = 0; - if (!inst || !inst->core || !f || - f->index >= ARRAY_SIZE(array)) { + if (f->index >= ARRAY_SIZE(array)) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -2726,10 +2591,6 @@ int msm_vdec_inst_init(struct msm_vidc_inst *inst) struct v4l2_format *f; enum msm_vidc_colorformat_type colorformat; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } core = inst->core; INIT_DELAYED_WORK(&inst->decode_batch.work, msm_vidc_batch_handler); @@ -2826,10 +2687,6 @@ int msm_vdec_inst_deinit(struct msm_vidc_inst *inst) { int rc = 0; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } /* cancel pending batch work */ cancel_batch_work(inst); rc = msm_vidc_ctrl_handler_deinit(inst); diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index 6e2b24749d..9f361d6653 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -471,11 +471,6 @@ static int msm_venc_set_input_properties(struct msm_vidc_inst *inst) {HFI_PROP_SIGNAL_COLOR_INFO, msm_venc_set_colorspace }, }; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - i_vpr_h(inst, "%s()\n", __func__); for (i = 0; i < ARRAY_SIZE(msm_venc_input_set_prop); i++) { /* set session input properties */ @@ -507,11 +502,6 @@ static int msm_venc_set_output_properties(struct msm_vidc_inst *inst) {HFI_PROP_CSC, msm_venc_set_csc }, }; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - i_vpr_h(inst, "%s()\n", __func__); for (i = 0; i < ARRAY_SIZE(msm_venc_output_set_prop); i++) { /* set session output properties */ @@ -538,10 +528,6 @@ static int msm_venc_set_internal_properties(struct msm_vidc_inst *inst) { int rc = 0; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } i_vpr_h(inst, "%s()\n", __func__); rc = msm_venc_set_quality_mode(inst); @@ -621,11 +607,6 @@ static int msm_venc_create_input_internal_buffers(struct msm_vidc_inst *inst) { int i, rc = 0; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - for (i = 0; i < ARRAY_SIZE(msm_venc_input_internal_buffer_type); i++) { rc = msm_vidc_create_internal_buffers(inst, msm_venc_input_internal_buffer_type[i]); @@ -640,11 +621,6 @@ static int msm_venc_queue_input_internal_buffers(struct msm_vidc_inst *inst) { int i, rc = 0; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - for (i = 0; i < ARRAY_SIZE(msm_venc_input_internal_buffer_type); i++) { rc = msm_vidc_queue_internal_buffers(inst, msm_venc_input_internal_buffer_type[i]); @@ -659,11 +635,6 @@ static int msm_venc_get_output_internal_buffers(struct msm_vidc_inst *inst) { int i, rc = 0; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - for (i = 0; i < ARRAY_SIZE(msm_venc_output_internal_buffer_type); i++) { rc = msm_vidc_get_internal_buffers(inst, msm_venc_output_internal_buffer_type[i]); @@ -678,11 +649,6 @@ static int msm_venc_create_output_internal_buffers(struct msm_vidc_inst *inst) { int i, rc = 0; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - for (i = 0; i < ARRAY_SIZE(msm_venc_output_internal_buffer_type); i++) { rc = msm_vidc_create_internal_buffers(inst, msm_venc_output_internal_buffer_type[i]); @@ -697,11 +663,6 @@ static int msm_venc_queue_output_internal_buffers(struct msm_vidc_inst *inst) { int i, rc = 0; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - for (i = 0; i < ARRAY_SIZE(msm_venc_output_internal_buffer_type); i++) { rc = msm_vidc_queue_internal_buffers(inst, msm_venc_output_internal_buffer_type[i]); @@ -720,10 +681,6 @@ static int msm_venc_property_subscription(struct msm_vidc_inst *inst, u32 i; u32 payload_size = 0; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } i_vpr_h(inst, "%s()\n", __func__); payload[0] = HFI_MODE_PROPERTY; @@ -761,10 +718,6 @@ static int msm_venc_metadata_delivery(struct msm_vidc_inst *inst, u32 payload[32] = {0}; u32 i, count = 0; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } i_vpr_h(inst, "%s()\n", __func__); payload[0] = HFI_MODE_METADATA; @@ -819,10 +772,6 @@ static int msm_venc_dynamic_metadata_delivery(struct msm_vidc_inst *inst, u32 payload[32] = {0}; u32 i, count = 0; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } i_vpr_h(inst, "%s()\n", __func__); payload[0] = HFI_MODE_DYNAMIC_METADATA; @@ -864,10 +813,6 @@ static int msm_venc_metadata_subscription(struct msm_vidc_inst *inst, u32 payload[32] = {0}; u32 i, count = 0; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } i_vpr_h(inst, "%s()\n", __func__); payload[0] = HFI_MODE_METADATA; @@ -919,11 +864,6 @@ int msm_venc_streamoff_input(struct msm_vidc_inst *inst) { int rc = 0; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - rc = msm_vidc_session_streamoff(inst, INPUT_PORT); if (rc) return rc; @@ -935,11 +875,6 @@ int msm_venc_streamon_input(struct msm_vidc_inst *inst) { int rc = 0; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - if (is_input_meta_enabled(inst) && !inst->bufq[INPUT_META_PORT].vb2q->streaming) { i_vpr_e(inst, @@ -1007,11 +942,6 @@ int msm_venc_qbuf(struct msm_vidc_inst *inst, struct vb2_buffer *vb2) { int rc = 0; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - rc = msm_vidc_queue_buffer_single(inst, vb2); if (rc) return rc; @@ -1062,11 +992,6 @@ int msm_venc_streamoff_output(struct msm_vidc_inst *inst) int rc = 0; struct msm_vidc_core *core; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - core = inst->core; /* restore LAYER_COUNT max allowed value */ @@ -1084,11 +1009,6 @@ int msm_venc_streamon_output(struct msm_vidc_inst *inst) { int rc = 0; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - if (is_output_meta_enabled(inst) && !inst->bufq[OUTPUT_META_PORT].vb2q->streaming) { i_vpr_e(inst, @@ -1151,11 +1071,6 @@ int msm_venc_try_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) struct v4l2_pix_format_mplane *pixmp = &f->fmt.pix_mp; u32 pix_fmt; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - memset(pixmp->reserved, 0, sizeof(pixmp->reserved)); if (f->type == INPUT_MPLANE) { @@ -1203,10 +1118,6 @@ int msm_venc_s_fmt_output(struct msm_vidc_inst *inst, struct v4l2_format *f) u32 width, height; enum msm_vidc_codec_type codec; - if (!inst || !inst->core || !f) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } core = inst->core; msm_venc_try_fmt(inst, f); @@ -1284,10 +1195,6 @@ static int msm_venc_s_fmt_output_meta(struct msm_vidc_inst *inst, struct v4l2_fo struct v4l2_format *fmt; struct msm_vidc_core *core; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } core = inst->core; fmt = &inst->fmts[OUTPUT_META_PORT]; @@ -1321,10 +1228,6 @@ static int msm_venc_s_fmt_input(struct msm_vidc_inst *inst, struct v4l2_format * struct msm_vidc_core *core; u32 pix_fmt, width, height, size, bytesperline; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } core = inst->core; msm_venc_try_fmt(inst, f); @@ -1424,10 +1327,6 @@ static int msm_venc_s_fmt_input_meta(struct msm_vidc_inst *inst, struct v4l2_for struct v4l2_format *fmt; struct msm_vidc_core *core; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } core = inst->core; fmt = &inst->fmts[INPUT_META_PORT]; @@ -1458,11 +1357,6 @@ int msm_venc_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) { int rc = 0; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - if (f->type == INPUT_MPLANE) { rc = msm_venc_s_fmt_input(inst, f); if (rc) @@ -1497,11 +1391,6 @@ int msm_venc_g_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) int rc = 0; int port; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - port = v4l2_type_to_driver_port(inst, f->type, __func__); if (port < 0) return -EINVAL; @@ -1516,10 +1405,6 @@ int msm_venc_s_selection(struct msm_vidc_inst* inst, struct v4l2_selection* s) int rc = 0; struct v4l2_format *output_fmt; - if (!inst || !s) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } if (s->type != INPUT_MPLANE && s->type != V4L2_BUF_TYPE_VIDEO_OUTPUT) { i_vpr_e(inst, "%s: invalid type %d\n", __func__, s->type); return -EINVAL; @@ -1622,10 +1507,6 @@ int msm_venc_g_selection(struct msm_vidc_inst* inst, struct v4l2_selection* s) { int rc = 0; - if (!inst || !s) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } if (s->type != INPUT_MPLANE && s->type != V4L2_BUF_TYPE_VIDEO_OUTPUT) { i_vpr_e(inst, "%s: invalid type %d\n", __func__, s->type); return -EINVAL; @@ -1671,11 +1552,6 @@ int msm_venc_s_param(struct msm_vidc_inst *inst, u32 input_rate, default_rate; bool is_frame_rate = false; - if (!inst || !s_parm) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - if (s_parm->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) { /* operating rate */ timeperframe = &s_parm->parm.output.timeperframe; @@ -1774,11 +1650,6 @@ int msm_venc_g_param(struct msm_vidc_inst *inst, { struct v4l2_fract *timeperframe = NULL; - if (!inst || !s_parm) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - if (s_parm->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) { timeperframe = &s_parm->parm.output.timeperframe; timeperframe->numerator = 1; @@ -1834,8 +1705,7 @@ int msm_venc_enum_fmt(struct msm_vidc_inst *inst, struct v4l2_fmtdesc *f) u32 array[32] = {0}; u32 i = 0; - if (!inst || !inst->core || !f || - f->index >= ARRAY_SIZE(array)) { + if (f->index >= ARRAY_SIZE(array)) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -1907,10 +1777,6 @@ int msm_venc_inst_init(struct msm_vidc_inst *inst) struct v4l2_format *f; enum msm_vidc_colorformat_type colorformat; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } i_vpr_h(inst, "%s()\n", __func__); core = inst->core; @@ -2011,10 +1877,6 @@ int msm_venc_inst_deinit(struct msm_vidc_inst *inst) { int rc = 0; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } rc = msm_vidc_ctrl_handler_deinit(inst); if (rc) return rc; diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index f81a45058f..07d6d3531e 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -49,7 +49,7 @@ static int get_poll_flags(struct msm_vidc_inst *inst, u32 port) struct vb2_buffer *vb = NULL; unsigned long flags = 0; - if (!inst || port >= MAX_PORT) { + if (port >= MAX_PORT) { d_vpr_e("%s: invalid params, inst %pK, port %d\n", __func__, inst, port); return poll; @@ -72,16 +72,11 @@ static int get_poll_flags(struct msm_vidc_inst *inst, u32 port) return poll; } -int msm_vidc_poll(void *instance, struct file *filp, +int msm_vidc_poll(struct msm_vidc_inst *inst, struct file *filp, struct poll_table_struct *wait) { int poll = 0; - struct msm_vidc_inst *inst = instance; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return POLLERR; - } if (is_session_error(inst)) { i_vpr_e(inst, "%s: inst in error state\n", __func__); return POLLERR; @@ -103,17 +98,9 @@ int msm_vidc_poll(void *instance, struct file *filp, return poll; } -EXPORT_SYMBOL(msm_vidc_poll); -int msm_vidc_querycap(void *instance, struct v4l2_capability *cap) +int msm_vidc_querycap(struct msm_vidc_inst *inst, struct v4l2_capability *cap) { - struct msm_vidc_inst *inst = instance; - - if (!inst || !cap) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - strlcpy(cap->driver, MSM_VIDC_DRV_NAME, sizeof(cap->driver)); strlcpy(cap->bus_info, MSM_VIDC_BUS_NAME, sizeof(cap->bus_info)); cap->version = MSM_VIDC_VERSION; @@ -129,17 +116,9 @@ int msm_vidc_querycap(void *instance, struct v4l2_capability *cap) return 0; } -EXPORT_SYMBOL(msm_vidc_querycap); -int msm_vidc_enum_fmt(void *instance, struct v4l2_fmtdesc *f) +int msm_vidc_enum_fmt(struct msm_vidc_inst *inst, struct v4l2_fmtdesc *f) { - struct msm_vidc_inst *inst = instance; - - if (!inst || !f) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - if (inst->domain == MSM_VIDC_DECODER) return msm_vdec_enum_fmt(inst, f); if (inst->domain == MSM_VIDC_ENCODER) @@ -147,20 +126,12 @@ int msm_vidc_enum_fmt(void *instance, struct v4l2_fmtdesc *f) return -EINVAL; } -EXPORT_SYMBOL(msm_vidc_enum_fmt); -int msm_vidc_query_ctrl(void *instance, struct v4l2_queryctrl *q_ctrl) +int msm_vidc_query_ctrl(struct msm_vidc_inst *inst, struct v4l2_queryctrl *q_ctrl) { int rc = 0; - struct msm_vidc_inst *inst = instance; struct v4l2_ctrl *ctrl; - if (!inst || !q_ctrl) { - d_vpr_e("%s: invalid params %pK %pK\n", - __func__, inst, q_ctrl); - return -EINVAL; - } - ctrl = v4l2_ctrl_find(&inst->ctrl_handler, q_ctrl->id); if (!ctrl) { i_vpr_e(inst, "%s: get_ctrl failed for id %d\n", @@ -178,20 +149,12 @@ int msm_vidc_query_ctrl(void *instance, struct v4l2_queryctrl *q_ctrl) q_ctrl->default_value, q_ctrl->step, q_ctrl->flags); return rc; } -EXPORT_SYMBOL(msm_vidc_query_ctrl); -int msm_vidc_query_menu(void *instance, struct v4l2_querymenu *qmenu) +int msm_vidc_query_menu(struct msm_vidc_inst *inst, struct v4l2_querymenu *qmenu) { int rc = 0; - struct msm_vidc_inst *inst = instance; struct v4l2_ctrl *ctrl; - if (!inst || !qmenu) { - d_vpr_e("%s: invalid params %pK %pK\n", - __func__, inst, qmenu); - return -EINVAL; - } - ctrl = v4l2_ctrl_find(&inst->ctrl_handler, qmenu->id); if (!ctrl) { i_vpr_e(inst, "%s: get_ctrl failed for id %d\n", @@ -216,17 +179,10 @@ int msm_vidc_query_menu(void *instance, struct v4l2_querymenu *qmenu) rc ? "not supported" : "supported"); return rc; } -EXPORT_SYMBOL(msm_vidc_query_menu); -int msm_vidc_try_fmt(void *instance, struct v4l2_format *f) +int msm_vidc_try_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) { int rc = 0; - struct msm_vidc_inst *inst = instance; - - if (!inst || !f) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } if (inst->domain == MSM_VIDC_DECODER) rc = msm_vdec_try_fmt(inst, f); @@ -238,17 +194,10 @@ int msm_vidc_try_fmt(void *instance, struct v4l2_format *f) __func__, f->type, rc); return rc; } -EXPORT_SYMBOL(msm_vidc_try_fmt); -int msm_vidc_s_fmt(void *instance, struct v4l2_format *f) +int msm_vidc_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) { int rc = 0; - struct msm_vidc_inst *inst = instance; - - if (!inst || !f) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } if (inst->domain == MSM_VIDC_DECODER) rc = msm_vdec_s_fmt(inst, f); @@ -260,17 +209,10 @@ int msm_vidc_s_fmt(void *instance, struct v4l2_format *f) __func__, f->type, rc); return rc; } -EXPORT_SYMBOL(msm_vidc_s_fmt); -int msm_vidc_g_fmt(void *instance, struct v4l2_format *f) +int msm_vidc_g_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) { int rc = 0; - struct msm_vidc_inst *inst = instance; - - if (!inst || !f) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } if (is_decode_session(inst)) rc = msm_vdec_g_fmt(inst, f); @@ -291,17 +233,10 @@ int msm_vidc_g_fmt(void *instance, struct v4l2_format *f) return 0; } -EXPORT_SYMBOL(msm_vidc_g_fmt); -int msm_vidc_s_selection(void *instance, struct v4l2_selection *s) +int msm_vidc_s_selection(struct msm_vidc_inst *inst, struct v4l2_selection *s) { int rc = 0; - struct msm_vidc_inst *inst = instance; - - if (!inst || !s) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } if (is_decode_session(inst)) rc = msm_vdec_s_selection(inst, s); @@ -310,17 +245,10 @@ int msm_vidc_s_selection(void *instance, struct v4l2_selection *s) return rc; } -EXPORT_SYMBOL(msm_vidc_s_selection); -int msm_vidc_g_selection(void *instance, struct v4l2_selection *s) +int msm_vidc_g_selection(struct msm_vidc_inst *inst, struct v4l2_selection *s) { int rc = 0; - struct msm_vidc_inst *inst = instance; - - if (!inst || !s) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } if (is_decode_session(inst)) rc = msm_vdec_g_selection(inst, s); @@ -329,24 +257,17 @@ int msm_vidc_g_selection(void *instance, struct v4l2_selection *s) return rc; } -EXPORT_SYMBOL(msm_vidc_g_selection); -int msm_vidc_s_param(void *instance, struct v4l2_streamparm *param) +int msm_vidc_s_param(struct msm_vidc_inst *inst, struct v4l2_streamparm *param) { int rc = 0; - struct msm_vidc_inst *inst = instance; - - if (!inst || !param) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } if (param->type != V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE && param->type != V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) return -EINVAL; if (is_encode_session(inst)) { - rc = msm_venc_s_param(instance, param); + rc = msm_venc_s_param(inst, param); } else { i_vpr_e(inst, "%s: invalid domain %#x\n", __func__, inst->domain); @@ -355,24 +276,17 @@ int msm_vidc_s_param(void *instance, struct v4l2_streamparm *param) return rc; } -EXPORT_SYMBOL(msm_vidc_s_param); -int msm_vidc_g_param(void *instance, struct v4l2_streamparm *param) +int msm_vidc_g_param(struct msm_vidc_inst *inst, struct v4l2_streamparm *param) { int rc = 0; - struct msm_vidc_inst *inst = instance; - - if (!inst || !param) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } if (param->type != V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE && param->type != V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) return -EINVAL; if (is_encode_session(inst)) { - rc = msm_venc_g_param(instance, param); + rc = msm_venc_g_param(inst, param); } else { i_vpr_e(inst, "%s: invalid domain %#x\n", __func__, inst->domain); @@ -381,19 +295,12 @@ int msm_vidc_g_param(void *instance, struct v4l2_streamparm *param) return rc; } -EXPORT_SYMBOL(msm_vidc_g_param); -int msm_vidc_reqbufs(void *instance, struct v4l2_requestbuffers *b) +int msm_vidc_reqbufs(struct msm_vidc_inst *inst, struct v4l2_requestbuffers *b) { int rc = 0; - struct msm_vidc_inst *inst = instance; int port; - if (!inst || !b) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - port = v4l2_type_to_driver_port(inst, b->type, __func__); if (port < 0) { rc = -EINVAL; @@ -410,19 +317,12 @@ int msm_vidc_reqbufs(void *instance, struct v4l2_requestbuffers *b) exit: return rc; } -EXPORT_SYMBOL(msm_vidc_reqbufs); -int msm_vidc_querybuf(void *instance, struct v4l2_buffer *b) +int msm_vidc_querybuf(struct msm_vidc_inst *inst, struct v4l2_buffer *b) { int rc = 0; - struct msm_vidc_inst *inst = instance; int port; - if (!inst || !b) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - port = v4l2_type_to_driver_port(inst, b->type, __func__); if (port < 0) { rc = -EINVAL; @@ -439,20 +339,13 @@ int msm_vidc_querybuf(void *instance, struct v4l2_buffer *b) exit: return rc; } -EXPORT_SYMBOL(msm_vidc_querybuf); -int msm_vidc_create_bufs(void *instance, struct v4l2_create_buffers *b) +int msm_vidc_create_bufs(struct msm_vidc_inst *inst, struct v4l2_create_buffers *b) { int rc = 0; - struct msm_vidc_inst *inst = instance; int port; struct v4l2_format *f; - if (!inst || !b) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - f = &b->format; port = v4l2_type_to_driver_port(inst, f->type, __func__); if (port < 0) { @@ -470,16 +363,14 @@ int msm_vidc_create_bufs(void *instance, struct v4l2_create_buffers *b) exit: return rc; } -EXPORT_SYMBOL(msm_vidc_create_bufs); -int msm_vidc_prepare_buf(void *instance, struct media_device *mdev, +int msm_vidc_prepare_buf(struct msm_vidc_inst *inst, struct media_device *mdev, struct v4l2_buffer *b) { int rc = 0; - struct msm_vidc_inst *inst = instance; struct vb2_queue *q; - if (!inst || !inst->core || !b || !valid_v4l2_buffer(b, inst)) { + if (!valid_v4l2_buffer(b, inst)) { d_vpr_e("%s: invalid params %pK %pK\n", __func__, inst, b); return -EINVAL; } @@ -499,16 +390,14 @@ int msm_vidc_prepare_buf(void *instance, struct media_device *mdev, exit: return rc; } -EXPORT_SYMBOL(msm_vidc_prepare_buf); -int msm_vidc_qbuf(void *instance, struct media_device *mdev, +int msm_vidc_qbuf(struct msm_vidc_inst *inst, struct media_device *mdev, struct v4l2_buffer *b) { int rc = 0; - struct msm_vidc_inst *inst = instance; struct vb2_queue *q; - if (!inst || !inst->core || !b || !valid_v4l2_buffer(b, inst)) { + if (!valid_v4l2_buffer(b, inst)) { d_vpr_e("%s: invalid params %pK %pK\n", __func__, inst, b); return -EINVAL; } @@ -526,15 +415,13 @@ int msm_vidc_qbuf(void *instance, struct media_device *mdev, exit: return rc; } -EXPORT_SYMBOL(msm_vidc_qbuf); -int msm_vidc_dqbuf(void *instance, struct v4l2_buffer *b) +int msm_vidc_dqbuf(struct msm_vidc_inst *inst, struct v4l2_buffer *b) { int rc = 0; - struct msm_vidc_inst *inst = instance; struct vb2_queue *q; - if (!inst || !b || !valid_v4l2_buffer(b, inst)) { + if (!valid_v4l2_buffer(b, inst)) { d_vpr_e("%s: invalid params %pK %pK\n", __func__, inst, b); return -EINVAL; } @@ -556,19 +443,12 @@ int msm_vidc_dqbuf(void *instance, struct v4l2_buffer *b) exit: return rc; } -EXPORT_SYMBOL(msm_vidc_dqbuf); -int msm_vidc_streamon(void *instance, enum v4l2_buf_type type) +int msm_vidc_streamon(struct msm_vidc_inst *inst, enum v4l2_buf_type type) { int rc = 0; - struct msm_vidc_inst *inst = instance; int port; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - port = v4l2_type_to_driver_port(inst, type, __func__); if (port < 0) { rc = -EINVAL; @@ -585,19 +465,12 @@ int msm_vidc_streamon(void *instance, enum v4l2_buf_type type) exit: return rc; } -EXPORT_SYMBOL(msm_vidc_streamon); -int msm_vidc_streamoff(void *instance, enum v4l2_buf_type type) +int msm_vidc_streamoff(struct msm_vidc_inst *inst, enum v4l2_buf_type type) { int rc = 0; - struct msm_vidc_inst *inst = instance; int port; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - port = v4l2_type_to_driver_port(inst, type, __func__); if (port < 0) { rc = -EINVAL; @@ -614,12 +487,10 @@ int msm_vidc_streamoff(void *instance, enum v4l2_buf_type type) exit: return rc; } -EXPORT_SYMBOL(msm_vidc_streamoff); -int msm_vidc_try_cmd(void *instance, union msm_v4l2_cmd *cmd) +int msm_vidc_try_cmd(struct msm_vidc_inst *inst, union msm_v4l2_cmd *cmd) { int rc = 0; - struct msm_vidc_inst *inst = instance; struct v4l2_decoder_cmd *dec = NULL; struct v4l2_encoder_cmd *enc = NULL; @@ -645,11 +516,9 @@ int msm_vidc_try_cmd(void *instance, union msm_v4l2_cmd *cmd) return rc; } -EXPORT_SYMBOL(msm_vidc_try_cmd); -int msm_vidc_start_cmd(void *instance) +int msm_vidc_start_cmd(struct msm_vidc_inst *inst) { - struct msm_vidc_inst *inst = instance; int rc = 0; if (!is_decode_session(inst) && !is_encode_session(inst)) { @@ -669,11 +538,9 @@ int msm_vidc_start_cmd(void *instance) return rc; } -EXPORT_SYMBOL(msm_vidc_start_cmd); -int msm_vidc_stop_cmd(void *instance) +int msm_vidc_stop_cmd(struct msm_vidc_inst *inst) { - struct msm_vidc_inst *inst = instance; int rc = 0; if (!is_decode_session(inst) && !is_encode_session(inst)) { @@ -693,21 +560,13 @@ int msm_vidc_stop_cmd(void *instance) return rc; } -EXPORT_SYMBOL(msm_vidc_stop_cmd); -int msm_vidc_enum_framesizes(void *instance, struct v4l2_frmsizeenum *fsize) +int msm_vidc_enum_framesizes(struct msm_vidc_inst *inst, struct v4l2_frmsizeenum *fsize) { - struct msm_vidc_inst *inst = instance; enum msm_vidc_colorformat_type colorfmt; enum msm_vidc_codec_type codec; u32 meta_fmt; - if (!inst || !fsize) { - d_vpr_e("%s: invalid params: %pK %pK\n", - __func__, inst, fsize); - return -EINVAL; - } - /* only index 0 allowed as per v4l2 spec */ if (fsize->index) return -EINVAL; @@ -739,22 +598,14 @@ int msm_vidc_enum_framesizes(void *instance, struct v4l2_frmsizeenum *fsize) return 0; } -EXPORT_SYMBOL(msm_vidc_enum_framesizes); -int msm_vidc_enum_frameintervals(void *instance, struct v4l2_frmivalenum *fival) +int msm_vidc_enum_frameintervals(struct msm_vidc_inst *inst, struct v4l2_frmivalenum *fival) { - struct msm_vidc_inst *inst = instance; struct msm_vidc_core *core; enum msm_vidc_colorformat_type colorfmt; u32 fps, mbpf; u32 meta_fmt; - if (!inst || !fival) { - d_vpr_e("%s: invalid params: %pK %pK\n", - __func__, inst, fival); - return -EINVAL; - } - if (is_decode_session(inst)) { i_vpr_e(inst, "%s: not supported by decoder\n", __func__); return -ENOTTY; @@ -803,18 +654,11 @@ int msm_vidc_enum_frameintervals(void *instance, struct v4l2_frmivalenum *fival) return 0; } -EXPORT_SYMBOL(msm_vidc_enum_frameintervals); -int msm_vidc_subscribe_event(void *instance, +int msm_vidc_subscribe_event(struct msm_vidc_inst *inst, const struct v4l2_event_subscription *sub) { int rc = 0; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; - - if (!inst || !sub) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } i_vpr_h(inst, "%s: type %d id %d\n", __func__, sub->type, sub->id); @@ -825,18 +669,12 @@ int msm_vidc_subscribe_event(void *instance, return rc; } -EXPORT_SYMBOL(msm_vidc_subscribe_event); -int msm_vidc_unsubscribe_event(void *instance, +int msm_vidc_unsubscribe_event(struct msm_vidc_inst *inst, const struct v4l2_event_subscription *sub) { int rc = 0; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; - if (!inst || !sub) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } i_vpr_h(inst, "%s: type %d id %d\n", __func__, sub->type, sub->id); rc = v4l2_event_unsubscribe(&inst->event_handler, sub); if (rc) @@ -844,33 +682,24 @@ int msm_vidc_unsubscribe_event(void *instance, __func__, sub->type, sub->id); return rc; } -EXPORT_SYMBOL(msm_vidc_unsubscribe_event); -int msm_vidc_dqevent(void *instance, struct v4l2_event *event) +int msm_vidc_dqevent(struct msm_vidc_inst *inst, struct v4l2_event *event) { int rc = 0; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; - if (!inst || !event) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } rc = v4l2_event_dequeue(&inst->event_handler, event, false); if (rc) i_vpr_e(inst, "%s: fialed\n", __func__); return rc; } -EXPORT_SYMBOL(msm_vidc_dqevent); -void *msm_vidc_open(void *vidc_core, u32 session_type) +void *msm_vidc_open(struct msm_vidc_core *core, u32 session_type) { int rc = 0; struct msm_vidc_inst *inst = NULL; - struct msm_vidc_core *core; int i = 0; d_vpr_h("%s: %s\n", __func__, video_banner); - core = vidc_core; if (!core) { d_vpr_e("%s: invalid params\n", __func__); return NULL; @@ -1036,19 +865,12 @@ fail_add_session: msm_vidc_vmem_free((void **)&inst); return NULL; } -EXPORT_SYMBOL(msm_vidc_open); -int msm_vidc_close(void *instance) +int msm_vidc_close(struct msm_vidc_inst *inst) { int rc = 0; - struct msm_vidc_inst *inst = instance; struct msm_vidc_core *core; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - core = inst->core; i_vpr_h(inst, "%s()\n", __func__); @@ -1072,5 +894,4 @@ int msm_vidc_close(void *instance) msm_vidc_schedule_core_deinit(core); return rc; -} -EXPORT_SYMBOL(msm_vidc_close); +} \ No newline at end of file diff --git a/driver/vidc/src/msm_vidc_buffer.c b/driver/vidc/src/msm_vidc_buffer.c index c64d4f275b..2ed946bb81 100644 --- a/driver/vidc/src/msm_vidc_buffer.c +++ b/driver/vidc/src/msm_vidc_buffer.c @@ -18,11 +18,6 @@ u32 msm_vidc_input_min_count(struct msm_vidc_inst* inst) u32 input_min_count = 0; u32 hb_enh_layer = 0; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return 0; - } - if (is_decode_session(inst)) { input_min_count = MIN_DEC_INPUT_BUFFERS; } else if (is_encode_session(inst)) { @@ -53,11 +48,6 @@ u32 msm_vidc_output_min_count(struct msm_vidc_inst *inst) { u32 output_min_count; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return 0; - } - if (!is_decode_session(inst) && !is_encode_session(inst)) return 0; @@ -98,10 +88,6 @@ u32 msm_vidc_input_extra_count(struct msm_vidc_inst *inst) u32 count = 0; struct msm_vidc_core *core; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params %pK\n", __func__, inst); - return 0; - } core = inst->core; /* @@ -137,10 +123,6 @@ u32 msm_vidc_output_extra_count(struct msm_vidc_inst *inst) u32 count = 0; struct msm_vidc_core *core; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params %pK\n", __func__, inst); - return 0; - } core = inst->core; /* @@ -173,11 +155,6 @@ u32 msm_vidc_internal_buffer_count(struct msm_vidc_inst *inst, { u32 count = 0; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return 0; - } - if (is_encode_session(inst)) return 1; @@ -215,11 +192,6 @@ u32 msm_vidc_decoder_input_size(struct msm_vidc_inst *inst) u32 bitstream_size_overwrite = 0; enum msm_vidc_codec_type codec; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return 0; - } - bitstream_size_overwrite = inst->capabilities[BITSTREAM_SIZE_OVERWRITE].value; if (bitstream_size_overwrite) { @@ -329,11 +301,6 @@ u32 msm_vidc_enc_delivery_mode_based_output_buf_size(struct msm_vidc_inst *inst, u32 total_mb_count; struct v4l2_format *f; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return frame_size; - } - f = &inst->fmts[OUTPUT_PORT]; if (f->fmt.pix_mp.pixelformat != V4L2_PIX_FMT_HEVC && @@ -368,11 +335,6 @@ u32 msm_vidc_encoder_output_size(struct msm_vidc_inst *inst) struct v4l2_format *f; enum msm_vidc_codec_type codec; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return 0; - } - f = &inst->fmts[OUTPUT_PORT]; codec = v4l2_codec_to_driver(inst, f->fmt.pix_mp.pixelformat, __func__); /* @@ -442,11 +404,6 @@ u32 msm_vidc_encoder_input_meta_size(struct msm_vidc_inst *inst) struct v4l2_format *f; u32 width, height; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return 0; - } - size = MSM_VIDC_METADATA_SIZE; if (inst->capabilities[META_ROI_INFO].value) { diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 08e07432ae..1cbfdf0018 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -155,8 +155,6 @@ bool is_valid_cap_id(enum msm_vidc_inst_capability_type cap_id) bool is_valid_cap(struct msm_vidc_inst *inst, enum msm_vidc_inst_capability_type cap_id) { - if (!inst) - return false; if (cap_id <= INST_CAP_NONE || cap_id >= INST_CAP_MAX) return false; @@ -332,10 +330,6 @@ static int msm_vidc_adjust_dynamic_property(struct msm_vidc_inst *inst, s32 prev_value; int rc = 0; - if (!inst || !ctrl) { - d_vpr_e("%s: invalid param\n", __func__); - return -EINVAL; - } cap = &inst->capabilities[0]; /* sanitize cap_id */ @@ -440,10 +434,6 @@ static int msm_vidc_set_dynamic_property(struct msm_vidc_inst *inst) struct msm_vidc_inst_cap_entry *entry = NULL, *temp = NULL; int rc = 0; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } i_vpr_h(inst, "%s()\n", __func__); list_for_each_entry_safe(entry, temp, &inst->firmware_list, list) { @@ -468,10 +458,6 @@ error: int msm_vidc_ctrl_handler_deinit(struct msm_vidc_inst *inst) { - if (!inst) { - d_vpr_e("%s: invalid parameters\n", __func__); - return -EINVAL; - } i_vpr_h(inst, "%s(): num ctrls %d\n", __func__, inst->num_ctrls); v4l2_ctrl_handler_free(&inst->ctrl_handler); memset(&inst->ctrl_handler, 0, sizeof(struct v4l2_ctrl_handler)); @@ -489,10 +475,6 @@ int msm_vidc_ctrl_handler_init(struct msm_vidc_inst *inst, bool init) int num_ctrls = 0, ctrl_idx = 0; u64 codecs_count, step_or_mask; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } core = inst->core; cap = &inst->capabilities[0]; @@ -676,11 +658,6 @@ static int msm_vidc_update_buffer_count_if_needed(struct msm_vidc_inst* inst, int rc = 0; bool update_input_port = false, update_output_port = false; - if (!inst) { - d_vpr_e("%s: invalid parameters\n", __func__); - return -EINVAL; - } - switch (cap_id) { case LAYER_TYPE: case ENH_LAYER_COUNT: @@ -719,10 +696,6 @@ static int msm_vidc_allow_secure_session(struct msm_vidc_inst *inst) struct msm_vidc_core *core; u32 count = 0; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } core = inst->core; core_lock(core, __func__); @@ -786,11 +759,6 @@ static int msm_vidc_update_static_property(struct msm_vidc_inst *inst, { int rc = 0; - if (!inst || !ctrl) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - if (cap_id == DRV_VERSION) { i_vpr_h(inst, "%s: driver version update not allowed\n", __func__); @@ -879,10 +847,6 @@ int msm_vidc_s_ctrl(struct msm_vidc_inst *inst, struct v4l2_ctrl *ctrl) int rc = 0; u32 port; - if (!inst || !ctrl) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } cap = &inst->capabilities[0]; i_vpr_h(inst, FMT_STRING_SET_CTRL, @@ -969,10 +933,6 @@ int msm_vidc_prepare_dependency_list(struct msm_vidc_inst *inst) int tmp_count_total, tmp_count, num_nodes = 0; int i, rc = 0; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } cap = &inst->capabilities[0]; if (!list_empty(&inst->caps_list)) { @@ -1084,10 +1044,6 @@ int msm_vidc_adjust_v4l2_properties(struct msm_vidc_inst *inst) struct msm_vidc_inst_cap_entry *entry = NULL, *temp = NULL; int rc = 0; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } i_vpr_h(inst, "%s()\n", __func__); /* adjust all possible caps from caps_list */ @@ -1108,10 +1064,6 @@ int msm_vidc_set_v4l2_properties(struct msm_vidc_inst *inst) struct msm_vidc_inst_cap_entry *entry = NULL, *temp = NULL; int rc = 0; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } i_vpr_h(inst, "%s()\n", __func__); /* set all caps from caps_list */ diff --git a/driver/vidc/src/msm_vidc_debug.c b/driver/vidc/src/msm_vidc_debug.c index 858ff3fe7f..a1d86add53 100644 --- a/driver/vidc/src/msm_vidc_debug.c +++ b/driver/vidc/src/msm_vidc_debug.c @@ -173,48 +173,42 @@ struct core_inst_pair { }; /* debug fs support */ -static inline void tic(struct msm_vidc_inst *i, enum profiling_points p, +static inline void tic(struct msm_vidc_inst *inst, enum profiling_points p, char *b) { - if (!i->debug.pdata[p].name[0]) - memcpy(i->debug.pdata[p].name, b, 64); - if (i->debug.pdata[p].sampling) { - i->debug.pdata[p].start = ktime_get_ns() / 1000 / 1000; - i->debug.pdata[p].sampling = false; + if (!inst->debug.pdata[p].name[0]) + memcpy(inst->debug.pdata[p].name, b, 64); + if (inst->debug.pdata[p].sampling) { + inst->debug.pdata[p].start = ktime_get_ns() / 1000 / 1000; + inst->debug.pdata[p].sampling = false; } } -static inline void toc(struct msm_vidc_inst *i, enum profiling_points p) +static inline void toc(struct msm_vidc_inst *inst, enum profiling_points p) { - if (!i->debug.pdata[p].sampling) { - i->debug.pdata[p].stop = ktime_get_ns() / 1000 / 1000; - i->debug.pdata[p].cumulative += i->debug.pdata[p].stop - - i->debug.pdata[p].start; - i->debug.pdata[p].sampling = true; + if (!inst->debug.pdata[p].sampling) { + inst->debug.pdata[p].stop = ktime_get_ns() / 1000 / 1000; + inst->debug.pdata[p].cumulative += inst->debug.pdata[p].stop - + inst->debug.pdata[p].start; + inst->debug.pdata[p].sampling = true; } } -void msm_vidc_show_stats(void *inst) +void msm_vidc_show_stats(struct msm_vidc_inst *inst) { int x; - struct msm_vidc_inst *i = (struct msm_vidc_inst *) inst; - - if (!i) { - d_vpr_e("%s: invalid params\n", __func__); - return; - } for (x = 0; x < MAX_PROFILING_POINTS; x++) { - if (i->debug.pdata[x].name[0]) { - if (i->debug.samples) { - i_vpr_p(i, "%s averaged %llu ms/sample\n", - i->debug.pdata[x].name, - i->debug.pdata[x].cumulative / - i->debug.samples); + if (inst->debug.pdata[x].name[0]) { + if (inst->debug.samples) { + i_vpr_p(inst, "%s averaged %llu ms/sample\n", + inst->debug.pdata[x].name, + inst->debug.pdata[x].cumulative / + inst->debug.samples); } - i_vpr_p(i, "%s Samples: %d\n", - i->debug.pdata[x].name, i->debug.samples); + i_vpr_p(inst, "%s Samples: %d\n", + inst->debug.pdata[x].name, inst->debug.samples); } } } @@ -438,11 +432,10 @@ failed_create_dir: return NULL; } -struct dentry *msm_vidc_debugfs_init_core(void *core_in) +struct dentry *msm_vidc_debugfs_init_core(struct msm_vidc_core *core) { struct dentry *dir = NULL; char debugfs_name[MAX_DEBUGFS_NAME]; - struct msm_vidc_core *core = (struct msm_vidc_core *) core_in; struct dentry *parent; if (!core || !core->debugfs_parent) { @@ -592,17 +585,12 @@ static const struct file_operations inst_info_fops = { .release = inst_info_release, }; -struct dentry *msm_vidc_debugfs_init_inst(void *instance, struct dentry *parent) +struct dentry *msm_vidc_debugfs_init_inst(struct msm_vidc_inst *inst, struct dentry *parent) { struct dentry *dir = NULL, *info = NULL; char debugfs_name[MAX_DEBUGFS_NAME]; struct core_inst_pair *idata = NULL; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - goto exit; - } snprintf(debugfs_name, MAX_DEBUGFS_NAME, "inst_%d", inst->session_id); if (msm_vidc_vmem_alloc(sizeof(struct core_inst_pair), (void **)&idata, __func__)) @@ -641,12 +629,11 @@ exit: return dir; } -void msm_vidc_debugfs_deinit_inst(void *instance) +void msm_vidc_debugfs_deinit_inst(struct msm_vidc_inst *inst) { struct dentry *dentry = NULL; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - if (!inst || !inst->debugfs_root) + if (!inst->debugfs_root) return; dentry = inst->debugfs_root; @@ -660,17 +647,12 @@ void msm_vidc_debugfs_deinit_inst(void *instance) inst->debugfs_root = NULL; } -void msm_vidc_debugfs_update(void *instance, +void msm_vidc_debugfs_update(struct msm_vidc_inst *inst, enum msm_vidc_debugfs_event e) { - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; struct msm_vidc_debug *d; char a[64] = "Frame processing"; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return; - } d = &inst->debug; switch (e) { diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 1e4f72f15b..990f230630 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -118,11 +118,6 @@ const char *v4l2_pixelfmt_name(struct msm_vidc_inst *inst, u32 pixfmt) const struct color_format_info *color_format_info; u32 i, size; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - goto exit; - } - core = inst->core; if (!core->platform || !core->platform->data.format_data) { d_vpr_e("%s: invalid core platform\n", __func__); @@ -156,7 +151,7 @@ void print_vidc_buffer(u32 tag, const char *tag_str, const char *str, struct msm unsigned long inode_num = 0; long ref_count = -1; - if (!inst || !vbuf || !tag_str || !str) + if (!vbuf || !tag_str || !str) return; dbuf = (struct dma_buf *)vbuf->dmabuf; @@ -185,9 +180,6 @@ void print_vidc_buffer(u32 tag, const char *tag_str, const char *str, struct msm void print_vb2_buffer(const char *str, struct msm_vidc_inst *inst, struct vb2_buffer *vb2) { - if (!inst || !vb2) - return; - if (vb2->type == INPUT_MPLANE || vb2->type == OUTPUT_MPLANE) { i_vpr_e(inst, "%s: %s: idx %2d fd %d off %d size %d filled %d\n", @@ -208,7 +200,7 @@ void print_vb2_buffer(const char *str, struct msm_vidc_inst *inst, static void print_buffer_stats(u32 tag, const char *tag_str, struct msm_vidc_inst *inst, struct msm_vidc_buffer_stats *stats) { - if (!tag_str || !inst || !stats) + if (!tag_str || !stats) return; /* skip flushed buffer stats */ @@ -263,13 +255,6 @@ int msm_vidc_add_buffer_stats(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buf, u64 timestamp) { struct msm_vidc_buffer_stats *stats = NULL; - struct msm_vidc_core *core; - - if (!inst || !inst->core || !buf) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - core = inst->core; if (!(msm_vidc_debug & VIDC_LOW)) return 0; @@ -306,15 +291,8 @@ int msm_vidc_remove_buffer_stats(struct msm_vidc_inst *inst, { struct msm_vidc_buffer_stats *stats = NULL, *dummy_stats = NULL; struct msm_vidc_buffer_stats *prev_stats = NULL; - struct msm_vidc_core *core; bool remove_stat = false, is_first_stat = false;; - if (!inst || !inst->core || !buf) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - core = inst->core; - if (!(msm_vidc_debug & VIDC_LOW)) return 0; @@ -380,13 +358,6 @@ int msm_vidc_remove_buffer_stats(struct msm_vidc_inst *inst, int msm_vidc_flush_buffer_stats(struct msm_vidc_inst *inst) { struct msm_vidc_buffer_stats *stats, *dummy_stats; - struct msm_vidc_core *core; - - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - core = inst->core; i_vpr_l(inst, "%s: flush buffer_stats list\n", __func__); list_for_each_entry_safe(stats, dummy_stats, &inst->buffer_stats_list, list) { @@ -458,11 +429,6 @@ enum msm_vidc_codec_type v4l2_codec_to_driver(struct msm_vidc_inst *inst, u32 i, size; enum msm_vidc_codec_type codec = 0; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - core = inst->core; if (!core->platform || !core->platform->data.format_data) { d_vpr_e("%s: invalid core platform\n", __func__); @@ -488,11 +454,6 @@ u32 v4l2_codec_from_driver(struct msm_vidc_inst *inst, u32 i, size; u32 v4l2_codec = 0; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - core = inst->core; if (!core->platform || !core->platform->data.format_data) { d_vpr_e("%s: invalid core platform\n", __func__); @@ -519,11 +480,6 @@ enum msm_vidc_colorformat_type v4l2_colorformat_to_driver( u32 i, size; enum msm_vidc_colorformat_type colorformat = 0; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - core = inst->core; if (!core->platform || !core->platform->data.format_data) { d_vpr_e("%s: invalid core platform\n", __func__); @@ -550,11 +506,6 @@ u32 v4l2_colorformat_from_driver(struct msm_vidc_inst *inst, u32 i, size; u32 v4l2_colorformat = 0; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - core = inst->core; if (!core->platform || !core->platform->data.format_data) { d_vpr_e("%s: invalid core platform\n", __func__); @@ -580,11 +531,6 @@ u32 v4l2_color_primaries_to_driver(struct msm_vidc_inst *inst, u32 i, size; u32 vidc_color_primaries = MSM_VIDC_PRIMARIES_RESERVED; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - core = inst->core; if (!core->platform || !core->platform->data.format_data) { d_vpr_e("%s: invalid core platform\n", __func__); @@ -612,11 +558,6 @@ u32 v4l2_color_primaries_from_driver(struct msm_vidc_inst *inst, u32 i, size; u32 v4l2_primaries = V4L2_COLORSPACE_DEFAULT; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - core = inst->core; if (!core->platform || !core->platform->data.format_data) { d_vpr_e("%s: invalid core platform\n", __func__); @@ -644,11 +585,6 @@ u32 v4l2_transfer_char_to_driver(struct msm_vidc_inst *inst, u32 i, size; u32 vidc_transfer_char = MSM_VIDC_TRANSFER_RESERVED; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - core = inst->core; if (!core->platform || !core->platform->data.format_data) { d_vpr_e("%s: invalid core platform\n", __func__); @@ -676,11 +612,6 @@ u32 v4l2_transfer_char_from_driver(struct msm_vidc_inst *inst, u32 i, size; u32 v4l2_transfer_char = V4L2_XFER_FUNC_DEFAULT; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - core = inst->core; if (!core->platform || !core->platform->data.format_data) { d_vpr_e("%s: invalid core platform\n", __func__); @@ -708,11 +639,6 @@ u32 v4l2_matrix_coeff_to_driver(struct msm_vidc_inst *inst, u32 i, size; u32 vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_RESERVED; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - core = inst->core; if (!core->platform || !core->platform->data.format_data) { d_vpr_e("%s: invalid core platform\n", __func__); @@ -740,11 +666,6 @@ u32 v4l2_matrix_coeff_from_driver(struct msm_vidc_inst *inst, u32 i, size; u32 v4l2_matrix_coeff = V4L2_YCBCR_ENC_DEFAULT; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - core = inst->core; if (!core->platform || !core->platform->data.format_data) { d_vpr_e("%s: invalid core platform\n", __func__); @@ -933,11 +854,6 @@ bool msm_vidc_allow_metadata_subscription(struct msm_vidc_inst *inst, u32 cap_id { bool is_allowed = true; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return false; - } - if (port == INPUT_PORT) { switch (cap_id) { case META_BUF_TAG: @@ -979,11 +895,6 @@ bool msm_vidc_allow_property(struct msm_vidc_inst *inst, u32 hfi_id) { bool is_allowed = true; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return false; - } - switch (hfi_id) { case HFI_PROP_AV1_TILE_ROWS_COLUMNS: case HFI_PROP_AV1_UNIFORM_TILE_SPACING: @@ -1012,11 +923,6 @@ enum msm_vidc_allow msm_vidc_allow_input_psc(struct msm_vidc_inst *inst) { enum msm_vidc_allow allow = MSM_VIDC_ALLOW; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return MSM_VIDC_DISALLOW; - } - /* * if drc sequence is not completed by client, fw is not * expected to raise another ipsc @@ -1032,11 +938,6 @@ enum msm_vidc_allow msm_vidc_allow_input_psc(struct msm_vidc_inst *inst) bool msm_vidc_allow_drain_last_flag(struct msm_vidc_inst *inst) { - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return false; - } - /* * drain last flag is expected only when DRAIN, INPUT_PAUSE * is set and DRAIN_LAST_BUFFER is not set @@ -1053,11 +954,6 @@ bool msm_vidc_allow_drain_last_flag(struct msm_vidc_inst *inst) bool msm_vidc_allow_psc_last_flag(struct msm_vidc_inst *inst) { - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return false; - } - /* * drc last flag is expected only when DRC, INPUT_PAUSE * is set and DRC_LAST_BUFFER is not set @@ -1122,11 +1018,6 @@ int msm_vidc_state_change_streamon(struct msm_vidc_inst *inst, int rc = 0; enum msm_vidc_state new_state = MSM_VIDC_ERROR; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - if (port == INPUT_META_PORT || port == OUTPUT_META_PORT) return 0; @@ -1155,11 +1046,6 @@ int msm_vidc_state_change_streamoff(struct msm_vidc_inst *inst, int rc = 0; enum msm_vidc_state new_state = MSM_VIDC_ERROR; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - if (port == INPUT_META_PORT || port == OUTPUT_META_PORT) return 0; @@ -1188,11 +1074,6 @@ int msm_vidc_process_drain(struct msm_vidc_inst *inst) { int rc = 0; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - rc = venus_hfi_session_drain(inst, INPUT_PORT); if (rc) return rc; @@ -1211,11 +1092,6 @@ int msm_vidc_process_resume(struct msm_vidc_inst *inst) enum msm_vidc_sub_state clear_sub_state = MSM_VIDC_SUB_STATE_NONE; bool drain_pending = false; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - msm_vidc_scale_power(inst, true); /* first check DRC pending else check drain pending */ @@ -1275,11 +1151,6 @@ int msm_vidc_process_streamon_input(struct msm_vidc_inst *inst) enum msm_vidc_sub_state clear_sub_state = MSM_VIDC_SUB_STATE_NONE; enum msm_vidc_sub_state set_sub_state = MSM_VIDC_SUB_STATE_NONE; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - msm_vidc_scale_power(inst, true); rc = venus_hfi_start(inst, INPUT_PORT); @@ -1327,11 +1198,6 @@ int msm_vidc_process_streamon_output(struct msm_vidc_inst *inst) enum msm_vidc_sub_state set_sub_state = MSM_VIDC_SUB_STATE_NONE; bool drain_pending = false; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - msm_vidc_scale_power(inst, true); /* @@ -1406,11 +1272,6 @@ int msm_vidc_process_stop_done(struct msm_vidc_inst *inst, int rc = 0; enum msm_vidc_sub_state set_sub_state = MSM_VIDC_SUB_STATE_NONE; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - if (signal_type == SIGNAL_CMD_STOP_INPUT) { set_sub_state = MSM_VIDC_INPUT_PAUSE; /* @@ -1449,11 +1310,6 @@ int msm_vidc_process_drain_done(struct msm_vidc_inst *inst) { int rc = 0; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - if (is_sub_state(inst, MSM_VIDC_DRAIN)) { rc = msm_vidc_change_sub_state(inst, 0, MSM_VIDC_INPUT_PAUSE, __func__); if (rc) @@ -1470,11 +1326,6 @@ int msm_vidc_process_drain_last_flag(struct msm_vidc_inst *inst) int rc = 0; struct v4l2_event event = {0}; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - rc = msm_vidc_state_change_drain_last_flag(inst); if (rc) return rc; @@ -1495,11 +1346,6 @@ int msm_vidc_process_psc_last_flag(struct msm_vidc_inst *inst) int rc = 0; struct v4l2_event event = {0}; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - rc = msm_vidc_state_change_psc_last_flag(inst); if (rc) return rc; @@ -1520,11 +1366,6 @@ int msm_vidc_state_change_input_psc(struct msm_vidc_inst *inst) int rc = 0; enum msm_vidc_sub_state set_sub_state = MSM_VIDC_SUB_STATE_NONE; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - /* * if output port is not streaming, then do not set DRC substate * because DRC_LAST_FLAG is not going to be received. Update @@ -1548,11 +1389,6 @@ int msm_vidc_state_change_drain_last_flag(struct msm_vidc_inst *inst) int rc = 0; enum msm_vidc_sub_state set_sub_state = MSM_VIDC_SUB_STATE_NONE; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - set_sub_state = MSM_VIDC_DRAIN_LAST_BUFFER | MSM_VIDC_OUTPUT_PAUSE; rc = msm_vidc_change_sub_state(inst, 0, set_sub_state, __func__); if (rc) @@ -1566,11 +1402,6 @@ int msm_vidc_state_change_psc_last_flag(struct msm_vidc_inst *inst) int rc = 0; enum msm_vidc_sub_state set_sub_state = MSM_VIDC_SUB_STATE_NONE; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - set_sub_state = MSM_VIDC_DRC_LAST_BUFFER | MSM_VIDC_OUTPUT_PAUSE; rc = msm_vidc_change_sub_state(inst, 0, set_sub_state, __func__); if (rc) @@ -1587,11 +1418,6 @@ int msm_vidc_get_fence_fd(struct msm_vidc_inst *inst, int *fence_fd) bool found = false; *fence_fd = INVALID_FD; - - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } core = inst->core; list_for_each_entry_safe(fence, dummy_fence, &inst->fence_list, list) { @@ -1625,11 +1451,6 @@ int msm_vidc_get_control(struct msm_vidc_inst *inst, struct v4l2_ctrl *ctrl) int rc = 0; enum msm_vidc_inst_capability_type cap_id; - if (!inst || !ctrl) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - cap_id = msm_vidc_get_cap_id(inst, ctrl->id); if (!is_valid_cap_id(cap_id)) { i_vpr_e(inst, "%s: could not find cap_id for ctrl %s\n", @@ -1690,11 +1511,6 @@ int msm_vidc_get_fps(struct msm_vidc_inst *inst) int fps; u32 frame_rate, operating_rate; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - frame_rate = msm_vidc_get_frame_rate(inst); operating_rate = msm_vidc_get_operating_rate(inst); @@ -1713,10 +1529,6 @@ int msm_vidc_num_buffers(struct msm_vidc_inst *inst, struct msm_vidc_buffer *vbuf; struct msm_vidc_buffers *buffers; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return count; - } if (type == MSM_VIDC_BUF_OUTPUT) { buffers = &inst->buffers.output; } else if (type == MSM_VIDC_BUF_INPUT) { @@ -1769,10 +1581,6 @@ int msm_vidc_process_readonly_buffers(struct msm_vidc_inst *inst, struct msm_vidc_buffer *ro_buf, *dummy; struct msm_vidc_core *core; - if (!inst || !inst->core || !buf) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } core = inst->core; if (!is_decode_session(inst) || !is_output_buffer(buf->type)) @@ -1837,11 +1645,6 @@ int msm_vidc_set_auto_framerate(struct msm_vidc_inst *inst, u64 timestamp) u64 time_us = 0; int rc = 0; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - core = inst->core; if (!core->capabilities[ENC_AUTO_FRAMERATE].value || is_image_session(inst) || msm_vidc_is_super_buffer(inst) || @@ -1897,11 +1700,6 @@ int msm_vidc_update_input_rate(struct msm_vidc_inst *inst, u64 time_us) struct msm_vidc_core *core; u64 counter = 0; u64 input_timer_sum_us = 0; - - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } core = inst->core; input_timer = msm_vidc_pool_alloc(inst, MSM_MEM_POOL_BUF_TIMER); @@ -1939,11 +1737,6 @@ int msm_vidc_flush_input_timer(struct msm_vidc_inst *inst) { struct msm_vidc_input_timer *input_timer, *dummy_timer; struct msm_vidc_core *core; - - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } core = inst->core; i_vpr_l(inst, "%s: flush input_timer list\n", __func__); @@ -1956,41 +1749,21 @@ int msm_vidc_flush_input_timer(struct msm_vidc_inst *inst) int msm_vidc_get_input_rate(struct msm_vidc_inst *inst) { - if (!inst) { - d_vpr_e("%s: Invalid params\n", __func__); - return 0; - } - return inst->capabilities[INPUT_RATE].value >> 16; } int msm_vidc_get_timestamp_rate(struct msm_vidc_inst *inst) { - if (!inst) { - d_vpr_e("%s: Invalid params\n", __func__); - return 0; - } - return inst->capabilities[TIMESTAMP_RATE].value >> 16; } int msm_vidc_get_frame_rate(struct msm_vidc_inst *inst) { - if (!inst) { - d_vpr_e("%s: Invalid params\n", __func__); - return 0; - } - return inst->capabilities[FRAME_RATE].value >> 16; } int msm_vidc_get_operating_rate(struct msm_vidc_inst *inst) { - if (!inst) { - d_vpr_e("%s: Invalid params\n", __func__); - return 0; - } - return inst->capabilities[OPERATING_RATE].value >> 16; } @@ -2038,11 +1811,6 @@ static struct msm_vidc_timestamp *msm_vidc_get_least_rank_ts(struct msm_vidc_ins struct msm_vidc_timestamp *ts, *final = NULL; u64 least_rank = INT_MAX; - if (!inst) { - d_vpr_e("%s: Invalid params\n", __func__); - return NULL; - } - list_for_each_entry(ts, &inst->timestamps.list, sort.list) { if (ts->rank < least_rank) { least_rank = ts->rank; @@ -2057,11 +1825,6 @@ int msm_vidc_flush_ts(struct msm_vidc_inst *inst) { struct msm_vidc_timestamp *temp, *ts = NULL; struct msm_vidc_core *core; - - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } core = inst->core; list_for_each_entry_safe(ts, temp, &inst->timestamps.list, sort.list) { @@ -2085,11 +1848,6 @@ int msm_vidc_update_timestamp_rate(struct msm_vidc_inst *inst, u64 timestamp) u32 timestamp_rate = 0; u64 ts_ms = 0; u32 counter = 0; - - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } core = inst->core; ts = msm_vidc_pool_alloc(inst, MSM_MEM_POOL_TIMESTAMP); @@ -2146,11 +1904,6 @@ int msm_vidc_ts_reorder_insert_timestamp(struct msm_vidc_inst *inst, u64 timesta struct msm_vidc_timestamp *ts; struct msm_vidc_core *core; int rc = 0; - - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } core = inst->core; /* allocate ts from pool */ @@ -2175,11 +1928,6 @@ int msm_vidc_ts_reorder_remove_timestamp(struct msm_vidc_inst *inst, u64 timesta { struct msm_vidc_timestamp *ts, *temp; struct msm_vidc_core *core; - - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } core = inst->core; /* remove matching node */ @@ -2200,10 +1948,6 @@ int msm_vidc_ts_reorder_get_first_timestamp(struct msm_vidc_inst *inst, u64 *tim struct msm_vidc_timestamp *ts; struct msm_vidc_core *core; - if (!inst || !inst->core || !timestamp) { - d_vpr_e("%s: Invalid params\n", __func__); - return -EINVAL; - } core = inst->core; /* check if list empty */ @@ -2230,11 +1974,6 @@ int msm_vidc_ts_reorder_flush(struct msm_vidc_inst *inst) { struct msm_vidc_timestamp *temp, *ts = NULL; struct msm_vidc_core *core; - - if (!inst || !inst->core) { - d_vpr_e("%s: Invalid params\n", __func__); - return -EINVAL; - } core = inst->core; /* flush all entries */ @@ -2255,10 +1994,6 @@ struct msm_vidc_buffer *msm_vidc_get_driver_buf(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buf; struct msm_vidc_core *core; - if (!inst || !inst->core || !vb2) { - d_vpr_e("%s: Invalid params\n", __func__); - return NULL; - } core = inst->core; buf = msm_vidc_fetch_buffer(inst, vb2); @@ -2295,11 +2030,6 @@ int msm_vidc_allocate_buffers(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buf = NULL; struct msm_vidc_buffers *buffers; struct msm_vidc_core *core; - - if (!inst || !inst->core) { - d_vpr_e("%s: Invalid params\n", __func__); - return -EINVAL; - } core = inst->core; buffers = msm_vidc_get_buffers(inst, buf_type, __func__); @@ -2332,11 +2062,6 @@ int msm_vidc_free_buffers(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buf, *dummy; struct msm_vidc_buffers *buffers; struct msm_vidc_core *core; - - if (!inst || !inst->core) { - d_vpr_e("%s: Invalid params\n", __func__); - return -EINVAL; - } core = inst->core; buffers = msm_vidc_get_buffers(inst, buf_type, __func__); @@ -2363,11 +2088,6 @@ struct msm_vidc_buffer *msm_vidc_fetch_buffer(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type buf_type; bool found = false; - if (!inst || !vb2) { - d_vpr_e("%s: invalid params\n", __func__); - return NULL; - } - buf_type = v4l2_type_to_driver(vb2->type, __func__); if (!buf_type) return NULL; @@ -2399,11 +2119,6 @@ struct msm_vidc_buffer *get_meta_buffer(struct msm_vidc_inst *inst, struct msm_vidc_buffers *buffers; bool found = false; - if (!inst || !buf) { - d_vpr_e("%s: invalid params\n", __func__); - return NULL; - } - if (buf->type == MSM_VIDC_BUF_INPUT) { buffers = &inst->buffers.input_meta; } else if (buf->type == MSM_VIDC_BUF_OUTPUT) { @@ -2427,11 +2142,6 @@ struct msm_vidc_buffer *get_meta_buffer(struct msm_vidc_inst *inst, bool msm_vidc_is_super_buffer(struct msm_vidc_inst *inst) { - if (!inst) { - d_vpr_e("%s: Invalid params\n", __func__); - return false; - } - return !!inst->capabilities[SUPER_FRAME].value; } @@ -2440,10 +2150,6 @@ static bool is_single_session(struct msm_vidc_inst *inst) struct msm_vidc_core *core; u32 count = 0; - if (!inst) { - d_vpr_e("%s: Invalid params\n", __func__); - return false; - } core = inst->core; core_lock(core, __func__); @@ -2460,10 +2166,6 @@ void msm_vidc_allow_dcvs(struct msm_vidc_inst *inst) struct msm_vidc_core *core; u32 fps; - if (!inst || !inst->core) { - d_vpr_e("%s: Invalid args: %pK\n", __func__, inst); - return; - } core = inst->core; allow = !msm_vidc_clock_voting; @@ -2536,10 +2238,6 @@ bool msm_vidc_allow_decode_batch(struct msm_vidc_inst *inst) bool allow = false; u32 value = 0; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return false; - } core = inst->core; cap = &inst->capabilities[0]; @@ -2639,11 +2337,6 @@ static void msm_vidc_update_input_cr(struct msm_vidc_inst *inst, u32 idx, u32 cr void msm_vidc_update_stats(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buf, enum msm_vidc_debugfs_event etype) { - if (!inst || !buf) { - d_vpr_e("%s: invalid params\n", __func__); - return; - } - if ((is_decode_session(inst) && etype == MSM_VIDC_DEBUGFS_EVENT_ETB) || (is_encode_session(inst) && etype == MSM_VIDC_DEBUGFS_EVENT_FBD)) inst->stats.data_size += buf->data_size; @@ -2656,11 +2349,6 @@ void msm_vidc_print_stats(struct msm_vidc_inst *inst) u32 frame_rate, operating_rate, achieved_fps, priority, etb, ebd, ftb, fbd, dt_ms; u64 bitrate_kbps = 0, time_ms = ktime_get_ns() / 1000 / 1000; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return; - } - etb = inst->debug_count.etb - inst->stats.count.etb; ebd = inst->debug_count.ebd - inst->stats.count.ebd; ftb = inst->debug_count.ftb - inst->stats.count.ftb; @@ -2707,11 +2395,6 @@ void msm_vidc_print_memory_stats(struct msm_vidc_inst *inst) struct msm_vidc_buffers *buffers; int cnt; - if (!inst) { - i_vpr_e(inst, "%s: invalid params\n", __func__); - return; - } - /* reset array values */ memset(&count_arr, 0, sizeof(count_arr)); memset(&size_arr, 0, sizeof(size_arr)); @@ -2776,10 +2459,6 @@ int schedule_stats_work(struct msm_vidc_inst *inst) int cancel_stats_work_sync(struct msm_vidc_inst *inst) { - if (!inst) { - d_vpr_e("%s: Invalid arguments\n", __func__); - return -EINVAL; - } cancel_delayed_work_sync(&inst->stats_work); return 0; @@ -2811,11 +2490,6 @@ static int msm_vidc_queue_buffer(struct msm_vidc_inst *inst, struct msm_vidc_buf int rc = 0; u32 cr = 0; - if (!inst || !buf) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - if (is_encode_session(inst) && is_input_buffer(buf->type)) { cr = inst->capabilities[ENC_IP_CR].value; msm_vidc_update_input_cr(inst, buf->index, cr); @@ -2884,11 +2558,6 @@ int msm_vidc_alloc_and_queue_input_internal_buffers(struct msm_vidc_inst *inst) { int rc = 0; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - rc = msm_vdec_get_input_internal_buffers(inst); if (rc) return rc; @@ -2914,11 +2583,6 @@ int msm_vidc_queue_deferred_buffers(struct msm_vidc_inst *inst, enum msm_vidc_bu struct msm_vidc_buffer *buf; int rc = 0; - if (!inst || !buf_type) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - buffers = msm_vidc_get_buffers(inst, buf_type, __func__); if (!buffers) return -EINVAL; @@ -2940,11 +2604,6 @@ int msm_vidc_buf_queue(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buf) { int rc = 0; - if (!inst || !buf) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - msm_vidc_scale_power(inst, is_input_buffer(buf->type)); rc = msm_vidc_queue_buffer(inst, buf); @@ -2961,10 +2620,6 @@ int msm_vidc_queue_buffer_single(struct msm_vidc_inst *inst, struct vb2_buffer * struct msm_vidc_fence *fence = NULL; struct msm_vidc_core *core = NULL; - if (!inst || !vb2 || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } core = inst->core; buf = msm_vidc_get_driver_buf(inst, vb2); @@ -3000,11 +2655,6 @@ int msm_vidc_destroy_internal_buffer(struct msm_vidc_inst *inst, struct msm_vidc_mem *mem, *mem_dummy; struct msm_vidc_buffer *buf, *dummy; struct msm_vidc_core *core; - - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } core = inst->core; if (!is_internal_buffer(buffer->type)) { @@ -3050,11 +2700,6 @@ int msm_vidc_get_internal_buffers(struct msm_vidc_inst *inst, u32 buf_count; struct msm_vidc_core *core; struct msm_vidc_buffers *buffers; - - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } core = inst->core; buf_size = call_session_op(core, buffer_size, @@ -3086,11 +2731,6 @@ int msm_vidc_create_internal_buffer(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buffer; struct msm_vidc_mem *mem; struct msm_vidc_core *core; - - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } core = inst->core; if (!is_internal_buffer(buffer_type)) { i_vpr_e(inst, "%s: type %s is not internal\n", @@ -3150,11 +2790,6 @@ int msm_vidc_create_internal_buffers(struct msm_vidc_inst *inst, struct msm_vidc_buffers *buffers; int i; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - buffers = msm_vidc_get_buffers(inst, buffer_type, __func__); if (!buffers) return -EINVAL; @@ -3179,11 +2814,6 @@ int msm_vidc_queue_internal_buffers(struct msm_vidc_inst *inst, int rc = 0; struct msm_vidc_buffers *buffers; struct msm_vidc_buffer *buffer, *dummy; - - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } if (!is_internal_buffer(buffer_type)) { i_vpr_e(inst, "%s: %s is not internal\n", __func__, buf_name(buffer_type)); return 0; @@ -3228,11 +2858,6 @@ int msm_vidc_alloc_and_queue_session_internal_buffers(struct msm_vidc_inst *inst { int rc = 0; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - if (buffer_type != MSM_VIDC_BUF_ARP && buffer_type != MSM_VIDC_BUF_PERSIST) { i_vpr_e(inst, "%s: invalid buffer type: %s\n", @@ -3263,11 +2888,6 @@ int msm_vidc_release_internal_buffers(struct msm_vidc_inst *inst, int rc = 0; struct msm_vidc_buffers *buffers; struct msm_vidc_buffer *buffer, *dummy; - - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } if (!is_internal_buffer(buffer_type)) { i_vpr_e(inst, "%s: %s is not internal\n", __func__, buf_name(buffer_type)); @@ -3313,10 +2933,6 @@ int msm_vidc_vb2_buffer_done(struct msm_vidc_inst *inst, struct vb2_v4l2_buffer *vbuf; bool found; - if (!inst || !buf) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } type = v4l2_type_from_driver(buf->type, __func__); if (!type) return -EINVAL; @@ -3368,11 +2984,6 @@ int msm_vidc_event_queue_init(struct msm_vidc_inst *inst) int rc = 0; int index; struct msm_vidc_core *core; - - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } core = inst->core; /* do not init, if already inited */ @@ -3399,11 +3010,6 @@ int msm_vidc_event_queue_deinit(struct msm_vidc_inst *inst) { int rc = 0; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - /* do not deinit, if not already inited */ if (!inst->event_handler.vdev) { i_vpr_h(inst, "%s: already not inited\n", __func__); @@ -3423,10 +3029,6 @@ static int vb2q_init(struct msm_vidc_inst *inst, int rc = 0; struct msm_vidc_core *core; - if (!inst || !q || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } core = inst->core; q->type = type; @@ -3483,11 +3085,6 @@ int msm_vidc_vb2_queue_init(struct msm_vidc_inst *inst) { int rc = 0; struct msm_vidc_core *core; - - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } core = inst->core; if (inst->m2m_dev) { @@ -3558,10 +3155,6 @@ int msm_vidc_vb2_queue_deinit(struct msm_vidc_inst *inst) { int rc = 0; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } if (!inst->m2m_dev) { i_vpr_h(inst, "%s: vb2q already deinited\n", __func__); return 0; @@ -3594,11 +3187,6 @@ int msm_vidc_add_session(struct msm_vidc_inst *inst) struct msm_vidc_inst *i; struct msm_vidc_core *core; u32 count = 0; - - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } core = inst->core; core_lock(core, __func__); @@ -3629,11 +3217,6 @@ int msm_vidc_remove_session(struct msm_vidc_inst *inst) struct msm_vidc_inst *i, *temp; struct msm_vidc_core *core; u32 count = 0; - - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } core = inst->core; core_lock(core, __func__); @@ -3657,11 +3240,6 @@ int msm_vidc_remove_dangling_session(struct msm_vidc_inst *inst) struct msm_vidc_inst *i, *temp; struct msm_vidc_core *core; u32 count = 0, dcount = 0; - - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } core = inst->core; core_lock(core, __func__); @@ -3688,11 +3266,6 @@ int msm_vidc_session_open(struct msm_vidc_inst *inst) { int rc = 0; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - inst->packet_size = 4096; rc = msm_vidc_vmem_alloc(inst->packet_size, (void **)&inst->packet, __func__); if (rc) @@ -3714,11 +3287,6 @@ int msm_vidc_session_set_codec(struct msm_vidc_inst *inst) { int rc = 0; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - rc = venus_hfi_session_set_codec(inst); if (rc) return rc; @@ -3730,11 +3298,6 @@ int msm_vidc_session_set_secure_mode(struct msm_vidc_inst *inst) { int rc = 0; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - rc = venus_hfi_session_set_secure_mode(inst); if (rc) return rc; @@ -3747,11 +3310,6 @@ int msm_vidc_session_set_default_header(struct msm_vidc_inst *inst) int rc = 0; u32 default_header = false; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - default_header = inst->capabilities[DEFAULT_HEADER].value; i_vpr_h(inst, "%s: default header: %d", __func__, default_header); rc = venus_hfi_session_property(inst, @@ -3775,11 +3333,6 @@ int msm_vidc_session_streamoff(struct msm_vidc_inst *inst, enum signal_session_response signal_type; enum msm_vidc_buffer_type buffer_type; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - if (port == INPUT_PORT) { signal_type = SIGNAL_CMD_STOP_INPUT; buffer_type = MSM_VIDC_BUF_INPUT; @@ -3855,11 +3408,6 @@ int msm_vidc_session_close(struct msm_vidc_inst *inst) int rc = 0; struct msm_vidc_core *core; bool wait_for_response; - - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } core = inst->core; wait_for_response = true; @@ -3898,10 +3446,6 @@ int msm_vidc_session_close(struct msm_vidc_inst *inst) int msm_vidc_kill_session(struct msm_vidc_inst *inst) { - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } if (!inst->session_id) { i_vpr_e(inst, "%s: already killed\n", __func__); return 0; @@ -3920,11 +3464,6 @@ int msm_vidc_get_inst_capability(struct msm_vidc_inst *inst) int i; u32 codecs_count = 0; struct msm_vidc_core *core; - - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } core = inst->core; codecs_count = core->enc_codecs_count + core->dec_codecs_count; @@ -4375,11 +3914,6 @@ int msm_vidc_inst_timeout(struct msm_vidc_inst *inst) struct msm_vidc_core *core; struct msm_vidc_inst *instance; bool found; - - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } core = inst->core; core_lock(core, __func__); @@ -4420,11 +3954,6 @@ int msm_vidc_print_buffer_info(struct msm_vidc_inst *inst) struct msm_vidc_buffers *buffers; int i; - if (!inst) { - i_vpr_e(inst, "%s: invalid params\n", __func__); - return -EINVAL; - } - /* Print buffer details */ for (i = 1; i < ARRAY_SIZE(buf_type_name_arr); i++) { buffers = msm_vidc_get_buffers(inst, i, __func__); @@ -4453,11 +3982,6 @@ int msm_vidc_print_inst_info(struct msm_vidc_inst *inst) long ref_count = -1; int i = 0; - if (!inst) { - i_vpr_e(inst, "%s: invalid params\n", __func__); - return -EINVAL; - } - is_secure = is_secure_session(inst); is_decode = inst->domain == MSM_VIDC_DECODER; port = is_decode ? INPUT_PORT : OUTPUT_PORT; @@ -4774,11 +4298,6 @@ int msm_vidc_flush_buffers(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buf, *dummy; enum msm_vidc_buffer_type buffer_type[2]; int i; - - if (!inst || !inst->core) { - d_vpr_e("%s: Invalid params\n", __func__); - return -EINVAL; - } core = inst->core; if (type == MSM_VIDC_BUF_INPUT) { @@ -4825,11 +4344,6 @@ int msm_vidc_flush_read_only_buffers(struct msm_vidc_inst *inst, int rc = 0; struct msm_vidc_buffer *ro_buf, *dummy; struct msm_vidc_core *core; - - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } core = inst->core; if (!is_decode_session(inst) || !is_output_buffer(type)) @@ -4891,10 +4405,6 @@ void msm_vidc_destroy_buffers(struct msm_vidc_inst *inst) }; int i; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return; - } core = inst->core; for (i = 0; i < ARRAY_SIZE(internal_buf_types); i++) { @@ -5105,11 +4615,6 @@ struct msm_vidc_inst *get_inst(struct msm_vidc_core *core, void put_inst(struct msm_vidc_inst *inst) { - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return; - } - kref_put(&inst->kref, msm_vidc_close_helper); } @@ -5162,11 +4667,6 @@ int msm_vidc_update_bitstream_buffer_size(struct msm_vidc_inst *inst) { struct msm_vidc_core *core; struct v4l2_format *fmt; - - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } core = inst->core; if (is_decode_session(inst)) { @@ -5182,11 +4682,6 @@ int msm_vidc_update_meta_port_settings(struct msm_vidc_inst *inst) { struct msm_vidc_core *core; struct v4l2_format *fmt; - - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } core = inst->core; fmt = &inst->fmts[INPUT_META_PORT]; @@ -5216,11 +4711,6 @@ int msm_vidc_update_meta_port_settings(struct msm_vidc_inst *inst) int msm_vidc_update_buffer_count(struct msm_vidc_inst *inst, u32 port) { struct msm_vidc_core *core; - - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } core = inst->core; switch (port) { @@ -5345,7 +4835,6 @@ int msm_vidc_update_debug_str(struct msm_vidc_inst *inst) return -EINVAL; } - client_id = inst->capabilities[CLIENT_ID].value; sid = inst->session_id; @@ -5438,11 +4927,6 @@ static int msm_vidc_get_inst_load(struct msm_vidc_inst *inst) static bool msm_vidc_ignore_session_load(struct msm_vidc_inst *inst) { - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - if (!is_realtime_session(inst) || is_thumbnail_session(inst) || is_image_session(inst) || is_session_error(inst)) return true; @@ -5456,10 +4940,6 @@ int msm_vidc_check_core_mbps(struct msm_vidc_inst *inst) struct msm_vidc_core *core; struct msm_vidc_inst *instance; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } core = inst->core; /* skip mbps check for non-realtime, thumnail, image sessions */ @@ -5545,11 +5025,6 @@ int msm_vidc_check_core_mbpf(struct msm_vidc_inst *inst) u32 critical_mbpf = 0; struct msm_vidc_core *core; struct msm_vidc_inst *instance; - - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } core = inst->core; core_lock(core, __func__); @@ -5614,10 +5089,6 @@ static int msm_vidc_check_inst_mbpf(struct msm_vidc_inst *inst) u32 mbpf = 0, max_mbpf = 0; struct msm_vidc_inst_cap *cap; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } cap = &inst->capabilities[0]; if (is_secure_session(inst)) @@ -5642,11 +5113,6 @@ u32 msm_vidc_get_max_bitrate(struct msm_vidc_inst* inst) { u32 max_bitrate = 0x7fffffff; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - if (inst->capabilities[LOWLATENCY_MODE].value) max_bitrate = min(max_bitrate, (u32)inst->capabilities[LOWLATENCY_MAX_BITRATE].max); @@ -5680,10 +5146,6 @@ static bool msm_vidc_allow_image_encode_session(struct msm_vidc_inst *inst) u32 min_width, min_height, max_width, max_height, pix_fmt, profile; bool allow = false; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return false; - } cap = &inst->capabilities[0]; if (!is_image_encode_session(inst)) { @@ -5773,10 +5235,6 @@ static int msm_vidc_check_resolution_supported(struct msm_vidc_inst *inst) max_width, max_height; bool is_interlaced = false; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } cap = &inst->capabilities[0]; if (is_decode_session(inst)) { @@ -5834,11 +5292,6 @@ static int msm_vidc_check_max_sessions(struct msm_vidc_inst *inst) u32 num_1080p_sessions = 0, num_4k_sessions = 0, num_8k_sessions = 0; struct msm_vidc_inst *i; struct msm_vidc_core *core; - - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } core = inst->core; core_lock(core, __func__); @@ -5911,11 +5364,6 @@ int msm_vidc_check_session_supported(struct msm_vidc_inst *inst) bool allow = false; int rc = 0; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - if (is_image_session(inst) && is_secure_session(inst)) { i_vpr_e(inst, "%s: secure image session not supported\n", __func__); rc = -EINVAL; @@ -5964,11 +5412,6 @@ int msm_vidc_check_scaling_supported(struct msm_vidc_inst *inst) { u32 iwidth, owidth, iheight, oheight, ds_factor; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - if (is_image_session(inst) || is_decode_session(inst)) { i_vpr_h(inst, "%s: Scaling is supported for encode session only\n", __func__); return 0; @@ -6019,11 +5462,6 @@ int msm_vidc_get_properties(struct msm_vidc_inst *inst) {HFI_PROP_QUALITY_MODE, HFI_PORT_BITSTREAM} }; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - for (i = 0; i < ARRAY_SIZE(fw_query_params); i++) { if (is_decode_session(inst)) { diff --git a/driver/vidc/src/msm_vidc_fence.c b/driver/vidc/src/msm_vidc_fence.c index ee1a288ced..efdb8b28cf 100644 --- a/driver/vidc/src/msm_vidc_fence.c +++ b/driver/vidc/src/msm_vidc_fence.c @@ -53,11 +53,6 @@ struct msm_vidc_fence *msm_vidc_fence_create(struct msm_vidc_inst *inst) struct msm_vidc_fence *fence = NULL; int rc = 0; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return NULL; - } - rc = msm_vidc_vmem_alloc(sizeof(*fence), (void **)&fence, __func__); if (rc) return NULL; @@ -88,11 +83,6 @@ int msm_vidc_dma_fence_create_fd(struct msm_vidc_inst *inst, { int rc = 0; - if (!inst || !fence) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - fence->fd = get_unused_fd_flags(0); if (fence->fd < 0) { i_vpr_e(inst, "%s: getting fd (%d) failed\n", __func__, @@ -125,11 +115,6 @@ static struct msm_vidc_fence *msm_vidc_get_dma_fence_from_id( struct msm_vidc_fence *fence, *dummy_fence; bool found = false; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return NULL; - } - list_for_each_entry_safe(fence, dummy_fence, &inst->fence_list, list) { if (fence->fence_id == fence_id) { found = true; @@ -151,11 +136,6 @@ static int msm_vidc_fence_signal(struct msm_vidc_inst *inst, u64 fence_id) int rc = 0; struct msm_vidc_fence *fence; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - fence = msm_vidc_get_dma_fence_from_id(inst, fence_id); if (!fence) { i_vpr_e(inst, "%s: no fence available to signal with id: %u\n", @@ -179,11 +159,6 @@ static void msm_vidc_fence_destroy(struct msm_vidc_inst *inst, u64 fence_id) { struct msm_vidc_fence *fence; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return; - } - fence = msm_vidc_get_dma_fence_from_id(inst, fence_id); if (!fence) { return; @@ -200,11 +175,6 @@ int msm_vidc_fence_init(struct msm_vidc_inst *inst) { int rc = 0; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - inst->fence_context.ctx_num = dma_fence_context_alloc(1); snprintf(inst->fence_context.name, sizeof(inst->fence_context.name), "msm_vidc_fence: %s: %llu", inst->debug_str, @@ -216,10 +186,6 @@ int msm_vidc_fence_init(struct msm_vidc_inst *inst) void msm_vidc_fence_deinit(struct msm_vidc_inst *inst) { - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return; - } i_vpr_h(inst, "%s: %s\n", __func__, inst->fence_context.name); inst->fence_context.ctx_num = 0; snprintf(inst->fence_context.name, sizeof(inst->fence_context.name), diff --git a/driver/vidc/src/msm_vidc_memory.c b/driver/vidc/src/msm_vidc_memory.c index 385828de0d..4d066518e5 100644 --- a/driver/vidc/src/msm_vidc_memory.c +++ b/driver/vidc/src/msm_vidc_memory.c @@ -69,7 +69,7 @@ void *msm_vidc_pool_alloc(struct msm_vidc_inst *inst, enum msm_memory_pool_type struct msm_memory_alloc_header *hdr = NULL; struct msm_memory_pool *pool; - if (!inst || type < 0 || type >= MSM_MEM_POOL_MAX) { + if (type < 0 || type >= MSM_MEM_POOL_MAX) { d_vpr_e("%s: Invalid params\n", __func__); return NULL; } @@ -110,7 +110,7 @@ void msm_vidc_pool_free(struct msm_vidc_inst *inst, void *vidc_buf) struct msm_memory_alloc_header *hdr; struct msm_memory_pool *pool; - if (!inst || !vidc_buf) { + if (!vidc_buf) { d_vpr_e("%s: Invalid params\n", __func__); return; } @@ -148,7 +148,7 @@ static void msm_vidc_destroy_pool_buffers(struct msm_vidc_inst *inst, struct msm_memory_pool *pool; u32 fcount = 0, bcount = 0; - if (!inst || type < 0 || type >= MSM_MEM_POOL_MAX) { + if (type < 0 || type >= MSM_MEM_POOL_MAX) { d_vpr_e("%s: Invalid params\n", __func__); return; } @@ -181,11 +181,6 @@ int msm_vidc_pools_init(struct msm_vidc_inst *inst) { u32 i; - if (!inst) { - d_vpr_e("%s: Invalid params\n", __func__); - return -EINVAL; - } - if (ARRAY_SIZE(buftype_size_name_arr) != MSM_MEM_POOL_MAX) { i_vpr_e(inst, "%s: num elements mismatch %lu %u\n", __func__, ARRAY_SIZE(buftype_size_name_arr), MSM_MEM_POOL_MAX); @@ -211,11 +206,6 @@ void msm_vidc_pools_deinit(struct msm_vidc_inst *inst) { u32 i = 0; - if (!inst) { - d_vpr_e("%s: Invalid params\n", __func__); - return; - } - /* destroy all buffers from all pool types */ for (i = 0; i < MSM_MEM_POOL_MAX; i++) msm_vidc_destroy_pool_buffers(inst, i); @@ -227,11 +217,6 @@ static struct dma_buf *msm_vidc_dma_buf_get(struct msm_vidc_inst *inst, int fd) struct dma_buf *dmabuf = NULL; bool found = false; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return NULL; - } - /* get local dmabuf ref for tracking */ dmabuf = dma_buf_get(fd); if (IS_ERR_OR_NULL(dmabuf)) { @@ -277,7 +262,7 @@ static void msm_vidc_dma_buf_put(struct msm_vidc_inst *inst, struct dma_buf *dma struct msm_memory_dmabuf *buf = NULL; bool found = false; - if (!inst || !dmabuf) { + if (!dmabuf) { d_vpr_e("%s: invalid params\n", __func__); return; } @@ -312,7 +297,7 @@ static void msm_vidc_dma_buf_put(struct msm_vidc_inst *inst, struct dma_buf *dma static void msm_vidc_dma_buf_put_completely(struct msm_vidc_inst *inst, struct msm_memory_dmabuf *buf) { - if (!inst || !buf) { + if (!buf) { d_vpr_e("%s: invalid params\n", __func__); return; } diff --git a/driver/vidc/src/msm_vidc_power.c b/driver/vidc/src/msm_vidc_power.c index 732970ef2c..42a74be0cc 100644 --- a/driver/vidc/src/msm_vidc_power.c +++ b/driver/vidc/src/msm_vidc_power.c @@ -94,10 +94,6 @@ u64 msm_vidc_max_freq(struct msm_vidc_inst *inst) struct frequency_table *freq_tbl; u64 freq = 0; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return freq; - } core = inst->core; if (!core->resource || !core->resource->freq_set.freq_tbl || @@ -166,10 +162,6 @@ static int msm_vidc_set_buses(struct msm_vidc_inst* inst) u64 total_bw_ddr = 0, total_bw_llcc = 0; u64 curr_time_ns; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } core = inst->core; mutex_lock(&core->lock); @@ -221,10 +213,6 @@ int msm_vidc_scale_buses(struct msm_vidc_inst *inst) struct v4l2_format *inp_f; u32 operating_rate, frame_rate; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params: %pK\n", __func__, inst); - return -EINVAL; - } core = inst->core; if (!core->resource) { i_vpr_e(inst, "%s: invalid resource params\n", __func__); @@ -348,10 +336,6 @@ int msm_vidc_set_clocks(struct msm_vidc_inst* inst) u64 curr_time_ns; int i = 0; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } core = inst->core; if (!core->resource || !core->resource->freq_set.freq_tbl || @@ -428,11 +412,6 @@ static int msm_vidc_apply_dcvs(struct msm_vidc_inst *inst) int bufs_with_fw = 0; struct msm_vidc_power *power; - if (!inst) { - d_vpr_e("%s: invalid params %pK\n", __func__, inst); - return -EINVAL; - } - /* skip dcvs */ if (!inst->power.dcvs_mode) return 0; @@ -503,10 +482,6 @@ int msm_vidc_scale_clocks(struct msm_vidc_inst *inst) { struct msm_vidc_core* core; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } core = inst->core; if (inst->power.buffer_counter < DCVS_WINDOW || @@ -539,10 +514,6 @@ int msm_vidc_scale_power(struct msm_vidc_inst *inst, bool scale_buses) u32 frame_rate, operating_rate; u32 timestamp_rate = 0, input_rate = 0; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params %pK\n", __func__, inst); - return -EINVAL; - } core = inst->core; if (!inst->active) { @@ -637,11 +608,6 @@ void msm_vidc_dcvs_data_reset(struct msm_vidc_inst *inst) struct msm_vidc_power *dcvs; u32 min_count, actual_count, max_count; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return; - } - dcvs = &inst->power; if (is_encode_session(inst)) { min_count = inst->buffers.input.min_count; @@ -673,10 +639,6 @@ void msm_vidc_power_data_reset(struct msm_vidc_inst *inst) { int rc = 0; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return; - } i_vpr_hp(inst, "%s\n", __func__); msm_vidc_dcvs_data_reset(inst); diff --git a/driver/vidc/src/msm_vidc_state.c b/driver/vidc/src/msm_vidc_state.c index 43210dd750..40bf07970a 100644 --- a/driver/vidc/src/msm_vidc_state.c +++ b/driver/vidc/src/msm_vidc_state.c @@ -659,11 +659,6 @@ static int msm_vidc_open_state(struct msm_vidc_inst *inst, { int rc = 0; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - /* inst must be locked */ rc = __strict_inst_check(inst, __func__); if (rc) { @@ -769,11 +764,6 @@ static int msm_vidc_input_streaming_state(struct msm_vidc_inst *inst, { int rc = 0; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - /* inst must be locked */ rc = __strict_inst_check(inst, __func__); if (rc) { @@ -971,11 +961,6 @@ static int msm_vidc_output_streaming_state(struct msm_vidc_inst *inst, { int rc = 0; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - /* inst must be locked */ rc = __strict_inst_check(inst, __func__); if (rc) { @@ -1165,11 +1150,6 @@ static int msm_vidc_streaming_state(struct msm_vidc_inst *inst, { int rc = 0; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - /* inst must be locked */ rc = __strict_inst_check(inst, __func__); if (rc) { @@ -1286,11 +1266,6 @@ static int msm_vidc_close_state(struct msm_vidc_inst *inst, { int rc = 0; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - /* inst must be locked */ rc = __strict_inst_check(inst, __func__); if (rc) { @@ -1322,11 +1297,6 @@ static int msm_vidc_error_state(struct msm_vidc_inst *inst, { int rc = 0; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - /* inst must be locked */ rc = __strict_inst_check(inst, __func__); if (rc) { @@ -1424,11 +1394,6 @@ int msm_vidc_change_state(struct msm_vidc_inst *inst, enum msm_vidc_allow allow; int rc; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - if (is_session_error(inst)) { i_vpr_h(inst, "%s: inst is in bad state, can not change state to %s\n", @@ -1513,11 +1478,6 @@ static int msm_vidc_set_sub_state(struct msm_vidc_inst *inst, MSM_VIDC_OUTPUT_PAUSE }, }; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - /* no substate to update */ if (!sub_state) return 0; @@ -1592,11 +1552,6 @@ int msm_vidc_change_sub_state(struct msm_vidc_inst *inst, enum msm_vidc_sub_state prev_sub_state; int rc = 0; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - if (is_session_error(inst)) { i_vpr_h(inst, "%s: inst is in bad state, can not change sub state\n", func); diff --git a/driver/vidc/src/msm_vidc_synx.c b/driver/vidc/src/msm_vidc_synx.c index 5e6434204e..5604984d80 100644 --- a/driver/vidc/src/msm_vidc_synx.c +++ b/driver/vidc/src/msm_vidc_synx.c @@ -78,11 +78,6 @@ static struct msm_vidc_fence *msm_vidc_get_synx_fence_from_id( struct msm_vidc_fence *fence, *dummy_fence; bool found = false; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return NULL; - } - list_for_each_entry_safe(fence, dummy_fence, &inst->fence_list, list) { if (fence->fence_id == fence_id) { found = true; @@ -103,11 +98,6 @@ static void msm_vidc_synx_fence_destroy(struct msm_vidc_inst *inst, u64 fence_id { struct msm_vidc_fence *fence; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return; - } - fence = msm_vidc_get_synx_fence_from_id(inst, fence_id); if (!fence) { return; @@ -200,11 +190,6 @@ static struct msm_vidc_fence *msm_vidc_synx_dma_fence_create(struct msm_vidc_ins struct msm_vidc_fence *fence = NULL; int rc = 0; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return NULL; - } - rc = msm_vidc_vmem_alloc(sizeof(*fence), (void **)&fence, __func__); if (rc) return NULL; @@ -234,10 +219,6 @@ static struct msm_vidc_fence *msm_vidc_synx_fence_create(struct msm_vidc_inst *i struct synx_create_params params; u32 fence_id = 0; - if (!inst || !inst->core || !fence) { - d_vpr_e("%s: invalid params\n", __func__); - return NULL; - } core = inst->core; /* return if synx fence is not supported */ @@ -291,11 +272,6 @@ int msm_vidc_synx_fence_create_fd(struct msm_vidc_inst *inst, { int rc = 0; - if (!inst || !fence) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - fence->fd = get_unused_fd_flags(0); if (fence->fd < 0) { i_vpr_e(inst, "%s: getting fd (%d) failed\n", __func__, @@ -328,11 +304,6 @@ static int msm_vidc_synx_fence_signal(struct msm_vidc_inst *inst, u64 fence_id) struct msm_vidc_fence *fence; struct msm_vidc_core *core; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - core = inst->core; fence = msm_vidc_get_synx_fence_from_id(inst, fence_id); diff --git a/driver/vidc/src/msm_vidc_v4l2.c b/driver/vidc/src/msm_vidc_v4l2.c index ab916c43d3..fa3a9f8ca4 100644 --- a/driver/vidc/src/msm_vidc_v4l2.c +++ b/driver/vidc/src/msm_vidc_v4l2.c @@ -25,9 +25,23 @@ static struct msm_vidc_inst *get_vidc_inst(struct file *filp, void *fh) unsigned int msm_v4l2_poll(struct file *filp, struct poll_table_struct *pt) { + int poll = 0; struct msm_vidc_inst *inst = get_vidc_inst(filp, NULL); - return msm_vidc_poll((void *)inst, filp, pt); + inst = get_inst_ref(g_core, inst); + if (!inst) { + d_vpr_e("%s: invalid instance\n", __func__); + return POLLERR; + } + + poll = msm_vidc_poll((void *)inst, filp, pt); + if (poll) { + goto exit; + } + +exit: + put_inst(inst); + return poll; } int msm_v4l2_open(struct file *filp) @@ -57,6 +71,11 @@ int msm_v4l2_close(struct file *filp) struct msm_vidc_inst *inst; inst = get_vidc_inst(filp, NULL); + if (!inst) { + d_vpr_e("%s: invalid instance\n", __func__); + return -EINVAL; + } + trace_msm_v4l2_vidc_close("START", inst); rc = msm_vidc_close(inst); @@ -72,7 +91,7 @@ int msm_v4l2_querycap(struct file *filp, void *fh, int rc = 0; inst = get_inst_ref(g_core, inst); - if (!inst) { + if (!inst || !cap) { d_vpr_e("%s: invalid instance\n", __func__); return -EINVAL; } @@ -98,7 +117,7 @@ int msm_v4l2_enum_fmt(struct file *filp, void *fh, int rc = 0; inst = get_inst_ref(g_core, inst); - if (!inst) { + if (!inst || !f) { d_vpr_e("%s: invalid instance\n", __func__); return -EINVAL; } @@ -123,7 +142,7 @@ int msm_v4l2_try_fmt(struct file *filp, void *fh, struct v4l2_format *f) int rc = 0; inst = get_inst_ref(g_core, inst); - if (!inst) { + if (!inst || !f) { d_vpr_e("%s: invalid instance\n", __func__); return -EINVAL; } @@ -154,7 +173,7 @@ int msm_v4l2_s_fmt(struct file *filp, void *fh, int rc = 0; inst = get_inst_ref(g_core, inst); - if (!inst) { + if (!inst || !f) { d_vpr_e("%s: invalid instance\n", __func__); return -EINVAL; } @@ -185,7 +204,7 @@ int msm_v4l2_g_fmt(struct file *filp, void *fh, int rc = 0; inst = get_inst_ref(g_core, inst); - if (!inst) { + if (!inst || !f) { d_vpr_e("%s: invalid instance\n", __func__); return -EINVAL; } @@ -211,7 +230,7 @@ int msm_v4l2_s_selection(struct file *filp, void *fh, int rc = 0; inst = get_inst_ref(g_core, inst); - if (!inst) { + if (!inst || !s) { d_vpr_e("%s: invalid instance\n", __func__); return -EINVAL; } @@ -242,7 +261,7 @@ int msm_v4l2_g_selection(struct file *filp, void *fh, int rc = 0; inst = get_inst_ref(g_core, inst); - if (!inst) { + if (!inst || !s) { d_vpr_e("%s: invalid instance\n", __func__); return -EINVAL; } @@ -268,7 +287,7 @@ int msm_v4l2_s_parm(struct file *filp, void *fh, int rc = 0; inst = get_inst_ref(g_core, inst); - if (!inst) { + if (!inst || !a) { d_vpr_e("%s: invalid instance\n", __func__); return -EINVAL; } @@ -299,7 +318,7 @@ int msm_v4l2_g_parm(struct file *filp, void *fh, int rc = 0; inst = get_inst_ref(g_core, inst); - if (!inst) { + if (!inst || !a) { d_vpr_e("%s: invalid instance\n", __func__); return -EINVAL; } @@ -325,7 +344,7 @@ int msm_v4l2_reqbufs(struct file *filp, void *fh, int rc = 0; inst = get_inst_ref(g_core, inst); - if (!inst) { + if (!inst || !b) { d_vpr_e("%s: invalid instance\n", __func__); return -EINVAL; } @@ -351,7 +370,7 @@ int msm_v4l2_querybuf(struct file *filp, void *fh, int rc = 0; inst = get_inst_ref(g_core, inst); - if (!inst) { + if (!inst || !b) { d_vpr_e("%s: invalid instance\n", __func__); return -EINVAL; } @@ -377,7 +396,7 @@ int msm_v4l2_create_bufs(struct file *filp, void *fh, int rc = 0; inst = get_inst_ref(g_core, inst); - if (!inst) { + if (!inst || !b) { d_vpr_e("%s: invalid instance\n", __func__); return -EINVAL; } @@ -404,7 +423,7 @@ int msm_v4l2_prepare_buf(struct file *filp, void *fh, int rc = 0; inst = get_inst_ref(g_core, inst); - if (!inst) { + if (!inst || !b) { d_vpr_e("%s: invalid instance\n", __func__); return -EINVAL; } @@ -431,7 +450,7 @@ int msm_v4l2_qbuf(struct file *filp, void *fh, int rc = 0; inst = get_inst_ref(g_core, inst); - if (!inst) { + if (!inst || !b) { d_vpr_e("%s: invalid instance\n", __func__); return -EINVAL; } @@ -461,7 +480,7 @@ int msm_v4l2_dqbuf(struct file *filp, void *fh, int rc = 0; inst = get_inst_ref(g_core, inst); - if (!inst) { + if (!inst || !b) { d_vpr_e("%s: invalid instance\n", __func__); return -EINVAL; } @@ -535,7 +554,7 @@ int msm_v4l2_subscribe_event(struct v4l2_fh *fh, inst = container_of(fh, struct msm_vidc_inst, event_handler); inst = get_inst_ref(g_core, inst); - if (!inst) { + if (!inst || !sub) { d_vpr_e("%s: invalid instance\n", __func__); return -EINVAL; } @@ -567,7 +586,7 @@ int msm_v4l2_unsubscribe_event(struct v4l2_fh *fh, inst = container_of(fh, struct msm_vidc_inst, event_handler); inst = get_inst_ref(g_core, inst); - if (!inst) { + if (!inst || !sub) { d_vpr_e("%s: invalid instance\n", __func__); return -EINVAL; } @@ -593,7 +612,7 @@ int msm_v4l2_try_decoder_cmd(struct file *filp, void *fh, int rc = 0; inst = get_inst_ref(g_core, inst); - if (!inst) { + if (!inst || !dec) { d_vpr_e("%s: invalid instance\n", __func__); return -EINVAL; } @@ -668,7 +687,7 @@ int msm_v4l2_try_encoder_cmd(struct file *filp, void *fh, int rc = 0; inst = get_inst_ref(g_core, inst); - if (!inst) { + if (!inst || !enc) { d_vpr_e("%s: invalid instance\n", __func__); return -EINVAL; } @@ -743,8 +762,9 @@ int msm_v4l2_enum_framesizes(struct file *filp, void *fh, int rc = 0; inst = get_inst_ref(g_core, inst); - if (!inst) { - d_vpr_e("%s: invalid instance\n", __func__); + if (!inst || !fsize) { + d_vpr_e("%s: invalid params: %pK %pK\n", + __func__, inst, fsize); return -EINVAL; } @@ -769,8 +789,9 @@ int msm_v4l2_enum_frameintervals(struct file *filp, void *fh, int rc = 0; inst = get_inst_ref(g_core, inst); - if (!inst) { - d_vpr_e("%s: invalid instance\n", __func__); + if (!inst || !fival) { + d_vpr_e("%s: invalid params: %pK %pK\n", + __func__, inst, fival); return -EINVAL; } @@ -795,7 +816,7 @@ int msm_v4l2_queryctrl(struct file *filp, void *fh, int rc = 0; inst = get_inst_ref(g_core, inst); - if (!inst) { + if (!inst || !ctrl) { d_vpr_e("%s: invalid instance\n", __func__); return -EINVAL; } @@ -821,8 +842,9 @@ int msm_v4l2_querymenu(struct file *filp, void *fh, int rc = 0; inst = get_inst_ref(g_core, inst); - if (!inst) { - d_vpr_e("%s: invalid instance\n", __func__); + if (!inst || !qmenu) { + d_vpr_e("%s: invalid params %pK %pK\n", + __func__, inst, qmenu); return -EINVAL; } diff --git a/driver/vidc/src/msm_vidc_vb2.c b/driver/vidc/src/msm_vidc_vb2.c index 19c90a16fd..db4218fd00 100644 --- a/driver/vidc/src/msm_vidc_vb2.c +++ b/driver/vidc/src/msm_vidc_vb2.c @@ -23,10 +23,6 @@ struct vb2_queue *msm_vidc_get_vb2q(struct msm_vidc_inst *inst, { struct vb2_queue *q = NULL; - if (!inst) { - d_vpr_e("%s: invalid params\n", func); - return NULL; - } if (type == INPUT_MPLANE) { q = inst->bufq[INPUT_PORT].vb2q; } else if (type == OUTPUT_MPLANE) { @@ -407,11 +403,6 @@ int msm_vidc_start_streaming(struct msm_vidc_inst *inst, struct vb2_queue *q) enum msm_vidc_buffer_type buf_type; int rc = 0; - if (!inst || !q) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - if (q->type == INPUT_META_PLANE || q->type == OUTPUT_META_PLANE) { i_vpr_h(inst, "%s: nothing to start on %s\n", __func__, v4l2_type_name(q->type)); @@ -513,11 +504,6 @@ int msm_vidc_stop_streaming(struct msm_vidc_inst *inst, struct vb2_queue *q) { int rc = 0; - if (!inst || !q) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - if (q->type == INPUT_META_PLANE || q->type == OUTPUT_META_PLANE) { i_vpr_h(inst, "%s: nothing to stop on %s\n", __func__, v4l2_type_name(q->type)); @@ -594,6 +580,11 @@ void msm_vb2_buf_queue(struct vb2_buffer *vb2) u64 timestamp_us = 0; u64 ktime_ns = ktime_get_ns(); + if (!vb2) { + d_vpr_e("%s: invalid params\n", __func__); + return; + } + inst = vb2_get_drv_priv(vb2->vb2_queue); if (!inst) { d_vpr_e("%s: invalid params\n", __func__); @@ -698,15 +689,31 @@ void msm_vb2_buf_cleanup(struct vb2_buffer *vb) int msm_vb2_buf_out_validate(struct vb2_buffer *vb) { - struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); + struct vb2_v4l2_buffer *vbuf; + if (!vb) { + d_vpr_e("%s: invalid vb\n", __func__); + return -EINVAL; + } + + vbuf = to_vb2_v4l2_buffer(vb); vbuf->field = V4L2_FIELD_NONE; return 0; } void msm_vb2_request_complete(struct vb2_buffer *vb) { - struct msm_vidc_inst *inst = vb2_get_drv_priv(vb->vb2_queue); + struct msm_vidc_inst *inst; + + if (!vb) { + d_vpr_e("%s: invalid vb\n", __func__); + return; + } + inst = vb2_get_drv_priv(vb->vb2_queue); + if (!inst) { + d_vpr_e("%s: invalid inst\n", __func__); + return; + } i_vpr_l(inst, "%s: vb type %d, index %d\n", __func__, vb->type, vb->index); diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index 17b5c12879..a7138a959c 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -67,7 +67,7 @@ static bool __valdiate_session(struct msm_vidc_core *core, struct msm_vidc_inst *temp; int rc = 0; - if (!core || !inst) + if (!core) return false; rc = __strict_check(core, __func__); @@ -1029,7 +1029,7 @@ int venus_hfi_trigger_stability(struct msm_vidc_inst *inst, u32 type, u32 payload[2]; int rc = 0; - if (!inst || !inst->core || !inst->packet) { + if (!inst->packet) { d_vpr_e("%s: Invalid params\n", __func__); return -EINVAL; } @@ -1075,7 +1075,7 @@ int venus_hfi_reserve_hardware(struct msm_vidc_inst *inst, u32 duration) enum hfi_reserve_type payload; int rc = 0; - if (!inst || !inst->core || !inst->packet) { + if (!inst->packet) { d_vpr_e("%s: Invalid params\n", __func__); return -EINVAL; } @@ -1121,7 +1121,7 @@ int venus_hfi_session_open(struct msm_vidc_inst *inst) int rc = 0; struct msm_vidc_core *core; - if (!inst || !inst->core || !inst->packet) { + if (!inst->packet) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -1163,7 +1163,7 @@ int venus_hfi_session_set_codec(struct msm_vidc_inst *inst) struct msm_vidc_core *core; u32 codec; - if (!inst || !inst->core || !inst->packet) { + if (!inst->packet) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -1207,7 +1207,7 @@ int venus_hfi_session_set_secure_mode(struct msm_vidc_inst *inst) struct msm_vidc_core *core; u32 secure_mode; - if (!inst || !inst->core || !inst->packet) { + if (!inst->packet) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -1252,7 +1252,7 @@ static int venus_hfi_cache_packet(struct msm_vidc_inst *inst) struct hfi_pending_packet *packet; struct msm_vidc_core *core; - if (!inst || !inst->core || !inst->packet) { + if (!inst->packet) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -1291,7 +1291,7 @@ int venus_hfi_session_property(struct msm_vidc_inst *inst, int rc = 0; struct msm_vidc_core *core; - if (!inst || !inst->core || !inst->packet) { + if (!inst->packet) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -1338,7 +1338,7 @@ int venus_hfi_session_close(struct msm_vidc_inst *inst) int rc = 0; struct msm_vidc_core *core; - if (!inst || !inst->packet) { + if (!inst->packet) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -1377,7 +1377,7 @@ int venus_hfi_start(struct msm_vidc_inst *inst, enum msm_vidc_port_type port) int rc = 0; struct msm_vidc_core *core; - if (!inst || !inst->core || !inst->packet) { + if (!inst->packet) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -1420,7 +1420,7 @@ int venus_hfi_stop(struct msm_vidc_inst *inst, enum msm_vidc_port_type port) int rc = 0; struct msm_vidc_core *core; - if (!inst || !inst->core || !inst->packet) { + if (!inst->packet) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -1464,7 +1464,7 @@ int venus_hfi_session_pause(struct msm_vidc_inst *inst, enum msm_vidc_port_type int rc = 0; struct msm_vidc_core *core; - if (!inst || !inst->core || !inst->packet) { + if (!inst->packet) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -1508,7 +1508,7 @@ int venus_hfi_session_resume(struct msm_vidc_inst *inst, int rc = 0; struct msm_vidc_core *core; - if (!inst || !inst->core || !inst->packet) { + if (!inst->packet) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -1551,7 +1551,7 @@ int venus_hfi_session_drain(struct msm_vidc_inst *inst, enum msm_vidc_port_type int rc = 0; struct msm_vidc_core *core; - if (!inst || !inst->core || !inst->packet) { + if (!inst->packet) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -1597,7 +1597,7 @@ int venus_hfi_session_command(struct msm_vidc_inst *inst, int rc = 0; struct msm_vidc_core *core; - if (!inst || !inst->core || !inst->packet) { + if (!inst->packet) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -1646,7 +1646,7 @@ int venus_hfi_queue_super_buffer(struct msm_vidc_inst *inst, u32 frame_size, meta_size, batch_size, cnt = 0; u64 ts_delta_us; - if (!inst || !inst->core || !inst->packet) { + if (!inst->packet) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -1766,7 +1766,7 @@ static int venus_hfi_add_pending_packets(struct msm_vidc_inst *inst) struct hfi_packet *src_pkt; struct msm_vidc_core *core; - if (!inst || !inst->core || !inst->packet) { + if (!inst->packet) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -1808,7 +1808,7 @@ int venus_hfi_queue_buffer(struct msm_vidc_inst *inst, struct msm_vidc_core *core; struct hfi_buffer hfi_buffer, hfi_meta_buffer; - if (!inst || !inst->core || !inst->packet) { + if (!inst->packet) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -1901,7 +1901,7 @@ int venus_hfi_release_buffer(struct msm_vidc_inst *inst, struct msm_vidc_core *core; struct hfi_buffer hfi_buffer; - if (!inst || !inst->core || !inst->packet || !buffer) { + if (!inst->packet || !buffer) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -1952,10 +1952,6 @@ int venus_hfi_scale_clocks(struct msm_vidc_inst *inst, u64 freq) int rc = 0; struct msm_vidc_core *core; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } core = inst->core; core_lock(core, __func__); @@ -1979,10 +1975,6 @@ int venus_hfi_scale_buses(struct msm_vidc_inst *inst, u64 bw_ddr, u64 bw_llcc) int rc = 0; struct msm_vidc_core *core; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } core = inst->core; core_lock(core, __func__); @@ -2008,10 +2000,6 @@ int venus_hfi_set_ir_period(struct msm_vidc_inst *inst, u32 ir_type, struct msm_vidc_core *core; u32 ir_period, sync_frame_req = 0; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } core = inst->core; core_lock(core, __func__); diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index 6b304dc1ee..3a260eb656 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -45,9 +45,6 @@ struct msm_vidc_hfi_packet_handle { void print_psc_properties(const char *str, struct msm_vidc_inst *inst, struct msm_vidc_subscription_params subsc_params) { - if (!inst || !str) - return; - i_vpr_h(inst, "%s: width %d, height %d, crop offsets[0] %#x, crop offsets[1] %#x, bit depth %#x, coded frames %d " "fw min count %d, poc %d, color info %d, profile %d, level %d, tier %d, fg present %d, sb enabled %d\n", @@ -132,11 +129,6 @@ u32 vidc_port_from_hfi(struct msm_vidc_inst *inst, bool is_valid_hfi_port(struct msm_vidc_inst *inst, u32 port, u32 buffer_type, const char *func) { - if (!inst) { - i_vpr_e(inst, "%s: invalid params\n", func); - return false; - } - if (port == HFI_PORT_NONE && buffer_type != HFI_BUFFER_ARP && buffer_type != HFI_BUFFER_PERSIST) @@ -156,11 +148,6 @@ invalid: bool is_valid_hfi_buffer_type(struct msm_vidc_inst *inst, u32 buffer_type, const char *func) { - if (!inst) { - i_vpr_e(inst, "%s: invalid params\n", func); - return false; - } - if (buffer_type != HFI_BUFFER_BITSTREAM && buffer_type != HFI_BUFFER_RAW && buffer_type != HFI_BUFFER_METADATA && @@ -255,11 +242,6 @@ static bool check_for_packet_payload(struct msm_vidc_inst *inst, { u32 payload_size = 0; - if (!inst || !pkt) { - d_vpr_e("%s: invalid params\n", __func__); - return false; - } - if (pkt->payload_info == HFI_PAYLOAD_NONE) { i_vpr_h(inst, "%s: no playload available for packet %#x\n", func, pkt->type); @@ -661,10 +643,6 @@ static int handle_read_only_buffer(struct msm_vidc_inst *inst, struct msm_vidc_core *core; bool found = false; - if (!inst || !inst->core || !buf) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } core = inst->core; if (!is_decode_session(inst) || !is_output_buffer(buf->type)) @@ -714,11 +692,6 @@ static int handle_non_read_only_buffer(struct msm_vidc_inst *inst, { struct msm_vidc_buffer *ro_buf; - if (!inst || !buffer) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - if (!is_decode_session(inst) || buffer->type != HFI_BUFFER_RAW) return 0; @@ -781,10 +754,6 @@ static int handle_input_buffer(struct msm_vidc_inst *inst, u32 frame_size, batch_size; bool found; - if (!inst || !buffer || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } core = inst->core; buffers = msm_vidc_get_buffers(inst, MSM_VIDC_BUF_INPUT, __func__); if (!buffers) @@ -868,11 +837,6 @@ static int msm_vidc_handle_fence_signal(struct msm_vidc_inst *inst, bool signal_error = false; struct msm_vidc_core *core = inst->core; - if (!buf) { - i_vpr_e(inst, "%s: invalid params\n", __func__); - return -EINVAL; - } - if (inst->capabilities[OUTBUF_FENCE_TYPE].value == MSM_VIDC_FENCE_NONE) return 0; @@ -940,10 +904,6 @@ static int handle_output_buffer(struct msm_vidc_inst *inst, struct msm_vidc_core *core; bool found, fatal = false; - if (!inst || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } core = inst->core; /* handle drain last flag buffer */ @@ -1109,10 +1069,6 @@ static int handle_input_metadata_buffer(struct msm_vidc_inst *inst, u32 frame_size, batch_size; bool found; - if (!inst || !buffer || !inst->core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } core = inst->core; buffers = msm_vidc_get_buffers(inst, MSM_VIDC_BUF_INPUT_META, __func__); if (!buffers) @@ -1179,11 +1135,6 @@ static int handle_output_metadata_buffer(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buf; bool found; - if (!inst) { - d_vpr_e("%s: Invalid params\n", __func__); - return -EINVAL; - } - buffers = msm_vidc_get_buffers(inst, MSM_VIDC_BUF_OUTPUT_META, __func__); if (!buffers) return -EINVAL; @@ -1891,11 +1842,6 @@ static int handle_session_property(struct msm_vidc_inst *inst, int rc = 0; u32 port; - if (!inst) { - d_vpr_e("%s: Invalid params\n", __func__); - return -EINVAL; - } - i_vpr_l(inst, "%s: property type %#x\n", __func__, pkt->type); port = vidc_port_from_hfi(inst, pkt->port); @@ -2075,11 +2021,6 @@ static int handle_session_response(struct msm_vidc_core *core, int i, rc = 0; bool found_ipsc = false; - if (!core || !hdr) { - d_vpr_e("%s: Invalid params\n", __func__); - return -EINVAL; - } - inst = get_inst(core, hdr->session_id); if (!inst) { d_vpr_e("%s: Invalid inst\n", __func__); From 2e9e234e56eaeff54ce82db43d477e97a6a2ec65 Mon Sep 17 00:00:00 2001 From: Deepa Guthyappa Madivalara Date: Tue, 23 May 2023 15:59:04 -0700 Subject: [PATCH 0922/1061] video: driver: allow fractional frame rate - remove truncation for frame rate and allow fractional value as well Change-Id: I7e48d3b4cb9ecf674fb17a08bbd8c3c0617d12a7 Signed-off-by: Deepa Guthyappa Madivalara --- driver/vidc/src/msm_venc.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index 6e2b24749d..0b17d8e14d 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -1711,12 +1711,12 @@ int msm_venc_s_param(struct msm_vidc_inst *inst, input_rate_q16 = input_rate << 16; input_rate_q16 |= (timeperframe->denominator % timeperframe->numerator); - } - i_vpr_h(inst, "%s: type %s, %s value %u\n", + + i_vpr_h(inst, "%s: type %s, %s value %u.%u\n", __func__, v4l2_type_name(s_parm->type), is_frame_rate ? "frame rate" : "operating rate", - input_rate_q16 >> 16); + input_rate_q16 >> 16, input_rate_q16 & 0xffff); msm_vidc_update_cap_value(inst, is_frame_rate ? FRAME_RATE : OPERATING_RATE, input_rate_q16, __func__); From e3415ddbef06b4b5954752cb4476f8e17a581ae6 Mon Sep 17 00:00:00 2001 From: Ankush Mitra Date: Fri, 26 May 2023 16:12:56 +0530 Subject: [PATCH 0923/1061] video: driver: changing "foo* bar" to "foo *bar" This change will resolve some of the static code checker err. Change-Id: I62edcbc8740dd932f5662b0bad1548374a0c9188 Signed-off-by: Ankush Mitra --- .../variant/iris2/inc/msm_vidc_power_iris2.h | 6 ++--- .../variant/iris2/src/msm_vidc_buffer_iris2.c | 26 +++++++++---------- driver/variant/iris2/src/msm_vidc_iris2.c | 8 +++--- .../variant/iris2/src/msm_vidc_power_iris2.c | 4 +-- .../variant/iris3/inc/msm_vidc_power_iris3.h | 6 ++--- .../variant/iris3/src/msm_vidc_buffer_iris3.c | 24 ++++++++--------- driver/variant/iris3/src/msm_vidc_iris3.c | 10 +++---- .../variant/iris3/src/msm_vidc_power_iris3.c | 8 +++--- .../iris33/inc/msm_vidc_power_iris33.h | 6 ++--- .../iris33/src/msm_vidc_buffer_iris33.c | 24 ++++++++--------- driver/variant/iris33/src/msm_vidc_iris33.c | 10 +++---- .../iris33/src/msm_vidc_power_iris33.c | 8 +++--- 12 files changed, 70 insertions(+), 70 deletions(-) diff --git a/driver/variant/iris2/inc/msm_vidc_power_iris2.h b/driver/variant/iris2/inc/msm_vidc_power_iris2.h index e55ca5cc33..01f04627bc 100644 --- a/driver/variant/iris2/inc/msm_vidc_power_iris2.h +++ b/driver/variant/iris2/inc/msm_vidc_power_iris2.h @@ -10,8 +10,8 @@ #include "msm_vidc_inst.h" #include "msm_vidc_power.h" -u64 msm_vidc_calc_freq_iris2(struct msm_vidc_inst* inst, u32 data_size); -int msm_vidc_calc_bw_iris2(struct msm_vidc_inst* inst, - struct vidc_bus_vote_data* vote_data); +u64 msm_vidc_calc_freq_iris2(struct msm_vidc_inst *inst, u32 data_size); +int msm_vidc_calc_bw_iris2(struct msm_vidc_inst *inst, + struct vidc_bus_vote_data *vote_data); #endif diff --git a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c index dd9bac7de8..371ec666a6 100644 --- a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c @@ -54,11 +54,11 @@ static u32 msm_vidc_decoder_bin_size_iris2(struct msm_vidc_inst *inst) return size; } -static u32 msm_vidc_decoder_comv_size_iris2(struct msm_vidc_inst* inst) +static u32 msm_vidc_decoder_comv_size_iris2(struct msm_vidc_inst *inst) { u32 size = 0; u32 width, height, out_min_count, vpp_delay; - struct v4l2_format* f; + struct v4l2_format *f; f = &inst->fmts[INPUT_PORT]; width = f->fmt.pix_mp.width; @@ -79,12 +79,12 @@ static u32 msm_vidc_decoder_comv_size_iris2(struct msm_vidc_inst* inst) return size; } -static u32 msm_vidc_decoder_non_comv_size_iris2(struct msm_vidc_inst* inst) +static u32 msm_vidc_decoder_non_comv_size_iris2(struct msm_vidc_inst *inst) { u32 size = 0; u32 width, height, num_vpp_pipes; - struct msm_vidc_core* core; - struct v4l2_format* f; + struct msm_vidc_core *core; + struct v4l2_format *f; core = inst->core; @@ -269,11 +269,11 @@ static u32 msm_vidc_get_recon_buf_count(struct msm_vidc_inst *inst) return num_buf_recon; } -static u32 msm_vidc_encoder_comv_size_iris2(struct msm_vidc_inst* inst) +static u32 msm_vidc_encoder_comv_size_iris2(struct msm_vidc_inst *inst) { u32 size = 0; u32 width, height, num_recon = 0; - struct v4l2_format* f; + struct v4l2_format *f; f = &inst->fmts[OUTPUT_PORT]; width = f->fmt.pix_mp.width; @@ -289,12 +289,12 @@ static u32 msm_vidc_encoder_comv_size_iris2(struct msm_vidc_inst* inst) return size; } -static u32 msm_vidc_encoder_non_comv_size_iris2(struct msm_vidc_inst* inst) +static u32 msm_vidc_encoder_non_comv_size_iris2(struct msm_vidc_inst *inst) { - struct msm_vidc_core* core; + struct msm_vidc_core *core; u32 size = 0; u32 width, height, num_vpp_pipes; - struct v4l2_format* f; + struct v4l2_format *f; core = inst->core; @@ -371,13 +371,13 @@ static u32 msm_vidc_encoder_arp_size_iris2(struct msm_vidc_inst *inst) return size; } -static u32 msm_vidc_encoder_vpss_size_iris2(struct msm_vidc_inst* inst) +static u32 msm_vidc_encoder_vpss_size_iris2(struct msm_vidc_inst *inst) { u32 size = 0; bool ds_enable = false, is_tenbit = false, blur = false; u32 rotation_val = HFI_ROTATION_NONE; u32 width, height, driver_colorfmt; - struct v4l2_format* f; + struct v4l2_format *f; ds_enable = is_scaling_enabled(inst); msm_vidc_v4l2_to_hfi_enum(inst, ROTATION, &rotation_val); @@ -479,7 +479,7 @@ exit: return size; } -static int msm_vidc_input_min_count_iris2(struct msm_vidc_inst* inst) +static int msm_vidc_input_min_count_iris2(struct msm_vidc_inst *inst) { u32 input_min_count = 0; u32 total_hb_layer = 0; diff --git a/driver/variant/iris2/src/msm_vidc_iris2.c b/driver/variant/iris2/src/msm_vidc_iris2.c index c478b7ff9d..cd177477e0 100644 --- a/driver/variant/iris2/src/msm_vidc_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_iris2.c @@ -808,7 +808,7 @@ static int __boot_firmware_iris2(struct msm_vidc_core *vidc_core) return rc; } -int msm_vidc_decide_work_mode_iris2(struct msm_vidc_inst* inst) +int msm_vidc_decide_work_mode_iris2(struct msm_vidc_inst *inst) { u32 work_mode; struct v4l2_format *inp_f; @@ -861,10 +861,10 @@ exit: return 0; } -int msm_vidc_decide_work_route_iris2(struct msm_vidc_inst* inst) +int msm_vidc_decide_work_route_iris2(struct msm_vidc_inst *inst) { u32 work_route; - struct msm_vidc_core* core; + struct msm_vidc_core *core; core = inst->core; work_route = core->capabilities[NUM_VPP_PIPE].value; @@ -939,7 +939,7 @@ int msm_vidc_adjust_blur_type_iris2(void *instance, struct v4l2_ctrl *ctrl) return 0; } -int msm_vidc_decide_quality_mode_iris2(struct msm_vidc_inst* inst) +int msm_vidc_decide_quality_mode_iris2(struct msm_vidc_inst *inst) { struct msm_vidc_core *core; u32 mbpf, mbps, max_hq_mbpf, max_hq_mbps; diff --git a/driver/variant/iris2/src/msm_vidc_power_iris2.c b/driver/variant/iris2/src/msm_vidc_power_iris2.c index be3697fcaa..a66902e00b 100644 --- a/driver/variant/iris2/src/msm_vidc_power_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_power_iris2.c @@ -13,7 +13,7 @@ u64 msm_vidc_calc_freq_iris2(struct msm_vidc_inst *inst, u32 data_size) { u64 freq = 0; - struct msm_vidc_core* core; + struct msm_vidc_core *core; u64 vsp_cycles = 0, vpp_cycles = 0, fw_cycles = 0; u64 fw_vpp_cycles = 0, bitrate = 0; u32 vpp_cycles_per_mb; @@ -674,7 +674,7 @@ static u64 __calculate_encoder(struct vidc_bus_vote_data *d) return ret; } -static u64 __calculate(struct msm_vidc_inst* inst, struct vidc_bus_vote_data *d) +static u64 __calculate(struct msm_vidc_inst *inst, struct vidc_bus_vote_data *d) { u64 value = 0; diff --git a/driver/variant/iris3/inc/msm_vidc_power_iris3.h b/driver/variant/iris3/inc/msm_vidc_power_iris3.h index b994e92666..e0a5cbcd39 100644 --- a/driver/variant/iris3/inc/msm_vidc_power_iris3.h +++ b/driver/variant/iris3/inc/msm_vidc_power_iris3.h @@ -12,8 +12,8 @@ #define ENABLE_LEGACY_POWER_CALCULATIONS 0 -u64 msm_vidc_calc_freq_iris3(struct msm_vidc_inst* inst, u32 data_size); -int msm_vidc_calc_bw_iris3(struct msm_vidc_inst* inst, - struct vidc_bus_vote_data* vote_data); +u64 msm_vidc_calc_freq_iris3(struct msm_vidc_inst *inst, u32 data_size); +int msm_vidc_calc_bw_iris3(struct msm_vidc_inst *inst, + struct vidc_bus_vote_data *vote_data); #endif diff --git a/driver/variant/iris3/src/msm_vidc_buffer_iris3.c b/driver/variant/iris3/src/msm_vidc_buffer_iris3.c index 4d69beb044..be045c692d 100644 --- a/driver/variant/iris3/src/msm_vidc_buffer_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_buffer_iris3.c @@ -56,7 +56,7 @@ static u32 msm_vidc_decoder_bin_size_iris3(struct msm_vidc_inst *inst) return size; } -static u32 msm_vidc_decoder_comv_size_iris3(struct msm_vidc_inst* inst) +static u32 msm_vidc_decoder_comv_size_iris3(struct msm_vidc_inst *inst) { u32 size = 0; u32 width, height, num_comv, vpp_delay; @@ -108,12 +108,12 @@ static u32 msm_vidc_decoder_comv_size_iris3(struct msm_vidc_inst* inst) return size; } -static u32 msm_vidc_decoder_non_comv_size_iris3(struct msm_vidc_inst* inst) +static u32 msm_vidc_decoder_non_comv_size_iris3(struct msm_vidc_inst *inst) { u32 size = 0; u32 width, height, num_vpp_pipes; - struct msm_vidc_core* core; - struct v4l2_format* f; + struct msm_vidc_core *core; + struct v4l2_format *f; core = inst->core; @@ -347,11 +347,11 @@ static u32 msm_vidc_get_recon_buf_count(struct msm_vidc_inst *inst) return num_buf_recon; } -static u32 msm_vidc_encoder_comv_size_iris3(struct msm_vidc_inst* inst) +static u32 msm_vidc_encoder_comv_size_iris3(struct msm_vidc_inst *inst) { u32 size = 0; u32 width, height, num_recon = 0; - struct v4l2_format* f; + struct v4l2_format *f; f = &inst->fmts[OUTPUT_PORT]; width = f->fmt.pix_mp.width; @@ -367,12 +367,12 @@ static u32 msm_vidc_encoder_comv_size_iris3(struct msm_vidc_inst* inst) return size; } -static u32 msm_vidc_encoder_non_comv_size_iris3(struct msm_vidc_inst* inst) +static u32 msm_vidc_encoder_non_comv_size_iris3(struct msm_vidc_inst *inst) { - struct msm_vidc_core* core; + struct msm_vidc_core *core; u32 size = 0; u32 width, height, num_vpp_pipes; - struct v4l2_format* f; + struct v4l2_format *f; core = inst->core; @@ -448,13 +448,13 @@ static u32 msm_vidc_encoder_arp_size_iris3(struct msm_vidc_inst *inst) return size; } -static u32 msm_vidc_encoder_vpss_size_iris3(struct msm_vidc_inst* inst) +static u32 msm_vidc_encoder_vpss_size_iris3(struct msm_vidc_inst *inst) { u32 size = 0; bool ds_enable = false, is_tenbit = false, blur = false; u32 rotation_val = HFI_ROTATION_NONE; u32 width, height, driver_colorfmt; - struct v4l2_format* f; + struct v4l2_format *f; ds_enable = is_scaling_enabled(inst); msm_vidc_v4l2_to_hfi_enum(inst, ROTATION, &rotation_val); @@ -586,7 +586,7 @@ exit: return size; } -static int msm_vidc_input_min_count_iris3(struct msm_vidc_inst* inst) +static int msm_vidc_input_min_count_iris3(struct msm_vidc_inst *inst) { u32 input_min_count = 0; u32 total_hb_layer = 0; diff --git a/driver/variant/iris3/src/msm_vidc_iris3.c b/driver/variant/iris3/src/msm_vidc_iris3.c index 976e2fedc1..60335eeded 100644 --- a/driver/variant/iris3/src/msm_vidc_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_iris3.c @@ -855,7 +855,7 @@ static int __boot_firmware_iris3(struct msm_vidc_core *vidc_core) return rc; } -int msm_vidc_decide_work_mode_iris3(struct msm_vidc_inst* inst) +int msm_vidc_decide_work_mode_iris3(struct msm_vidc_inst *inst) { u32 work_mode; struct v4l2_format *inp_f; @@ -912,10 +912,10 @@ exit: return 0; } -int msm_vidc_decide_work_route_iris3(struct msm_vidc_inst* inst) +int msm_vidc_decide_work_route_iris3(struct msm_vidc_inst *inst) { u32 work_route; - struct msm_vidc_core* core; + struct msm_vidc_core *core; core = inst->core; work_route = core->capabilities[NUM_VPP_PIPE].value; @@ -948,7 +948,7 @@ exit: return 0; } -int msm_vidc_decide_quality_mode_iris3(struct msm_vidc_inst* inst) +int msm_vidc_decide_quality_mode_iris3(struct msm_vidc_inst *inst) { struct msm_vidc_core *core; u32 mbpf, mbps, max_hq_mbpf, max_hq_mbps; @@ -994,7 +994,7 @@ decision_done: return 0; } -int msm_vidc_adjust_bitrate_boost_iris3(void* instance, struct v4l2_ctrl *ctrl) +int msm_vidc_adjust_bitrate_boost_iris3(void *instance, struct v4l2_ctrl *ctrl) { s32 adjusted_value; struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; diff --git a/driver/variant/iris3/src/msm_vidc_power_iris3.c b/driver/variant/iris3/src/msm_vidc_power_iris3.c index 3b94833cbb..bb85c20065 100644 --- a/driver/variant/iris3/src/msm_vidc_power_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_power_iris3.c @@ -14,7 +14,7 @@ static u64 __calculate_decoder(struct vidc_bus_vote_data *d); static u64 __calculate_encoder(struct vidc_bus_vote_data *d); -static u64 __calculate(struct msm_vidc_inst* inst, struct vidc_bus_vote_data *d); +static u64 __calculate(struct msm_vidc_inst *inst, struct vidc_bus_vote_data *d); static u64 msm_vidc_calc_freq_iris3_legacy(struct msm_vidc_inst *inst, u32 data_size); static int msm_vidc_init_codec_input_freq(struct msm_vidc_inst *inst, u32 data_size, @@ -287,7 +287,7 @@ static int msm_vidc_init_codec_input_bus(struct msm_vidc_inst *inst, struct vidc static u64 msm_vidc_calc_freq_iris3_new(struct msm_vidc_inst *inst, u32 data_size) { u64 freq = 0; - struct msm_vidc_core* core; + struct msm_vidc_core *core; int ret = 0; struct api_calculation_input codec_input; struct api_calculation_freq_output codec_output; @@ -368,7 +368,7 @@ u64 msm_vidc_calc_freq_iris3(struct msm_vidc_inst *inst, u32 data_size) static u64 msm_vidc_calc_freq_iris3_legacy(struct msm_vidc_inst *inst, u32 data_size) { u64 freq = 0; - struct msm_vidc_core* core; + struct msm_vidc_core *core; u64 vsp_cycles = 0, vpp_cycles = 0, fw_cycles = 0; u64 fw_vpp_cycles = 0, bitrate = 0; u32 vpp_cycles_per_mb; @@ -1127,7 +1127,7 @@ static u64 __calculate_encoder(struct vidc_bus_vote_data *d) return ret; } -static u64 __calculate(struct msm_vidc_inst* inst, struct vidc_bus_vote_data *d) +static u64 __calculate(struct msm_vidc_inst *inst, struct vidc_bus_vote_data *d) { u64 value = 0; diff --git a/driver/variant/iris33/inc/msm_vidc_power_iris33.h b/driver/variant/iris33/inc/msm_vidc_power_iris33.h index ec51a7fe35..180a68e6c1 100644 --- a/driver/variant/iris33/inc/msm_vidc_power_iris33.h +++ b/driver/variant/iris33/inc/msm_vidc_power_iris33.h @@ -13,8 +13,8 @@ #define ENABLE_LEGACY_POWER_CALCULATIONS 0 int msm_vidc_ring_buf_count_iris33(struct msm_vidc_inst *inst, u32 data_size); -u64 msm_vidc_calc_freq_iris33(struct msm_vidc_inst* inst, u32 data_size); -int msm_vidc_calc_bw_iris33(struct msm_vidc_inst* inst, - struct vidc_bus_vote_data* vote_data); +u64 msm_vidc_calc_freq_iris33(struct msm_vidc_inst *inst, u32 data_size); +int msm_vidc_calc_bw_iris33(struct msm_vidc_inst *inst, + struct vidc_bus_vote_data *vote_data); #endif diff --git a/driver/variant/iris33/src/msm_vidc_buffer_iris33.c b/driver/variant/iris33/src/msm_vidc_buffer_iris33.c index b6d77771ff..07e3d19b97 100644 --- a/driver/variant/iris33/src/msm_vidc_buffer_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_buffer_iris33.c @@ -56,7 +56,7 @@ static u32 msm_vidc_decoder_bin_size_iris33(struct msm_vidc_inst *inst) return size; } -static u32 msm_vidc_decoder_comv_size_iris33(struct msm_vidc_inst* inst) +static u32 msm_vidc_decoder_comv_size_iris33(struct msm_vidc_inst *inst) { u32 size = 0; u32 width, height, num_comv, vpp_delay; @@ -108,12 +108,12 @@ static u32 msm_vidc_decoder_comv_size_iris33(struct msm_vidc_inst* inst) return size; } -static u32 msm_vidc_decoder_non_comv_size_iris33(struct msm_vidc_inst* inst) +static u32 msm_vidc_decoder_non_comv_size_iris33(struct msm_vidc_inst *inst) { u32 size = 0; u32 width, height, num_vpp_pipes; - struct msm_vidc_core* core; - struct v4l2_format* f; + struct msm_vidc_core *core; + struct v4l2_format *f; core = inst->core; @@ -355,11 +355,11 @@ static u32 msm_vidc_get_recon_buf_count(struct msm_vidc_inst *inst) return num_buf_recon; } -static u32 msm_vidc_encoder_comv_size_iris33(struct msm_vidc_inst* inst) +static u32 msm_vidc_encoder_comv_size_iris33(struct msm_vidc_inst *inst) { u32 size = 0; u32 width, height, num_recon = 0; - struct v4l2_format* f; + struct v4l2_format *f; f = &inst->fmts[OUTPUT_PORT]; width = f->fmt.pix_mp.width; @@ -375,12 +375,12 @@ static u32 msm_vidc_encoder_comv_size_iris33(struct msm_vidc_inst* inst) return size; } -static u32 msm_vidc_encoder_non_comv_size_iris33(struct msm_vidc_inst* inst) +static u32 msm_vidc_encoder_non_comv_size_iris33(struct msm_vidc_inst *inst) { - struct msm_vidc_core* core; + struct msm_vidc_core *core; u32 size = 0; u32 width, height, num_vpp_pipes; - struct v4l2_format* f; + struct v4l2_format *f; core = inst->core; @@ -456,13 +456,13 @@ static u32 msm_vidc_encoder_arp_size_iris33(struct msm_vidc_inst *inst) return size; } -static u32 msm_vidc_encoder_vpss_size_iris33(struct msm_vidc_inst* inst) +static u32 msm_vidc_encoder_vpss_size_iris33(struct msm_vidc_inst *inst) { u32 size = 0; bool ds_enable = false, is_tenbit = false, blur = false; u32 rotation_val = HFI_ROTATION_NONE; u32 width, height, driver_colorfmt; - struct v4l2_format* f; + struct v4l2_format *f; ds_enable = is_scaling_enabled(inst); msm_vidc_v4l2_to_hfi_enum(inst, ROTATION, &rotation_val); @@ -594,7 +594,7 @@ exit: return size; } -static int msm_vidc_input_min_count_iris33(struct msm_vidc_inst* inst) +static int msm_vidc_input_min_count_iris33(struct msm_vidc_inst *inst) { u32 input_min_count = 0; u32 total_hb_layer = 0; diff --git a/driver/variant/iris33/src/msm_vidc_iris33.c b/driver/variant/iris33/src/msm_vidc_iris33.c index 3364d93139..1bd769e010 100644 --- a/driver/variant/iris33/src/msm_vidc_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_iris33.c @@ -1104,7 +1104,7 @@ static int __boot_firmware_iris33(struct msm_vidc_core *vidc_core) return rc; } -int msm_vidc_decide_work_mode_iris33(struct msm_vidc_inst* inst) +int msm_vidc_decide_work_mode_iris33(struct msm_vidc_inst *inst) { u32 work_mode; struct v4l2_format *inp_f; @@ -1161,10 +1161,10 @@ exit: return 0; } -int msm_vidc_decide_work_route_iris33(struct msm_vidc_inst* inst) +int msm_vidc_decide_work_route_iris33(struct msm_vidc_inst *inst) { u32 work_route; - struct msm_vidc_core* core; + struct msm_vidc_core *core; core = inst->core; work_route = core->capabilities[NUM_VPP_PIPE].value; @@ -1197,7 +1197,7 @@ exit: return 0; } -int msm_vidc_decide_quality_mode_iris33(struct msm_vidc_inst* inst) +int msm_vidc_decide_quality_mode_iris33(struct msm_vidc_inst *inst) { struct msm_vidc_core *core; u32 mbpf, mbps, max_hq_mbpf, max_hq_mbps; @@ -1243,7 +1243,7 @@ decision_done: return 0; } -int msm_vidc_adjust_bitrate_boost_iris33(void* instance, struct v4l2_ctrl *ctrl) +int msm_vidc_adjust_bitrate_boost_iris33(void *instance, struct v4l2_ctrl *ctrl) { s32 adjusted_value; struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; diff --git a/driver/variant/iris33/src/msm_vidc_power_iris33.c b/driver/variant/iris33/src/msm_vidc_power_iris33.c index bb14d8a413..812f435bc0 100644 --- a/driver/variant/iris33/src/msm_vidc_power_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_power_iris33.c @@ -16,7 +16,7 @@ static u64 __calculate_decoder(struct vidc_bus_vote_data *d); static u64 __calculate_encoder(struct vidc_bus_vote_data *d); -static u64 __calculate(struct msm_vidc_inst* inst, struct vidc_bus_vote_data *d); +static u64 __calculate(struct msm_vidc_inst *inst, struct vidc_bus_vote_data *d); static u64 msm_vidc_calc_freq_iris33_legacy(struct msm_vidc_inst *inst, u32 data_size); @@ -408,7 +408,7 @@ static bool is_vpp_cycles_close_to_freq_corner(struct msm_vidc_core *core, static u64 msm_vidc_calc_freq_iris33_new(struct msm_vidc_inst *inst, u32 data_size) { u64 freq = 0; - struct msm_vidc_core* core; + struct msm_vidc_core *core; int ret = 0; struct api_calculation_input codec_input; struct api_calculation_freq_output codec_output; @@ -517,7 +517,7 @@ u64 msm_vidc_calc_freq_iris33(struct msm_vidc_inst *inst, u32 data_size) u64 msm_vidc_calc_freq_iris33_legacy(struct msm_vidc_inst *inst, u32 data_size) { u64 freq = 0; - struct msm_vidc_core* core; + struct msm_vidc_core *core; u64 vsp_cycles = 0, vpp_cycles = 0, fw_cycles = 0; u64 fw_vpp_cycles = 0, bitrate = 0; u32 vpp_cycles_per_mb; @@ -1280,7 +1280,7 @@ static u64 __calculate_encoder(struct vidc_bus_vote_data *d) return ret; } -static u64 __calculate(struct msm_vidc_inst* inst, struct vidc_bus_vote_data *d) +static u64 __calculate(struct msm_vidc_inst *inst, struct vidc_bus_vote_data *d) { u64 value = 0; From a04f985cda67fce0a71839931ed7508da7711140 Mon Sep 17 00:00:00 2001 From: Ankush Mitra Date: Mon, 29 May 2023 17:42:04 +0530 Subject: [PATCH 0924/1061] video: driver: move "{" to the previous line This will fix some static code checker err. Change-Id: I664e96dd2d65f694c3f2523e1f4aeb08a40f660a Signed-off-by: Ankush Mitra --- driver/variant/iris2/inc/hfi_buffer_iris2.h | 178 +++++---------- driver/variant/iris3/inc/hfi_buffer_iris3.h | 212 ++++++------------ driver/variant/iris3/src/msm_vidc_iris3.c | 2 +- .../variant/iris3/src/msm_vidc_power_iris3.c | 2 +- driver/variant/iris33/inc/hfi_buffer_iris33.h | 212 ++++++------------ driver/variant/iris33/src/msm_vidc_iris33.c | 2 +- .../iris33/src/msm_vidc_power_iris33.c | 2 +- 7 files changed, 205 insertions(+), 405 deletions(-) diff --git a/driver/variant/iris2/inc/hfi_buffer_iris2.h b/driver/variant/iris2/inc/hfi_buffer_iris2.h index a31218ecf6..440be920a7 100644 --- a/driver/variant/iris2/inc/hfi_buffer_iris2.h +++ b/driver/variant/iris2/inc/hfi_buffer_iris2.h @@ -90,8 +90,7 @@ typedef HFI_U32 HFI_BOOL; uv_buffer_height_multiple, y_metadata_stride_multiple, \ y_metadata_buffer_height_multiple, \ uv_metadata_stride_multiple, uv_metadata_buffer_height_multiple) \ - do \ - { \ + do { \ HFI_U32 y_buf_size, uv_buf_size, y_meta_size, uv_meta_size; \ HFI_U32 stride, _height; \ HFI_U32 half_height = (frame_height + 1) >> 1; \ @@ -159,8 +158,7 @@ typedef HFI_U32 HFI_BOOL; #define HFI_YUV420_TP10_UBWC_CALC_BUF_SIZE(buf_size, y_stride, y_buf_height, \ uv_stride, uv_buf_height, y_md_stride, y_md_height, uv_md_stride, \ uv_md_height)\ - do \ - { \ + do { \ HFI_U32 y_data_size, uv_data_size, y_md_size, uv_md_size; \ HFI_YUV420_TP10_UBWC_CALC_Y_BUF_SIZE(y_data_size, y_stride,\ y_buf_height); \ @@ -191,8 +189,7 @@ typedef HFI_U32 HFI_BOOL; #define HFI_YUV420_P010_CALC_BUF_SIZE(buf_size, y_data_size, y_stride, \ y_buf_height, uv_data_size, uv_stride, uv_buf_height) \ - do \ - { \ + do { \ y_data_size = HFI_ALIGN(y_stride * y_buf_height, \ HFI_ALIGNMENT_4096);\ uv_data_size = HFI_ALIGN(uv_stride * uv_buf_height, \ @@ -292,8 +289,7 @@ typedef HFI_U32 HFI_BOOL; #define MAX_TILE_COLUMNS 32 #define SIZE_VPSS_LB(Size, frame_width, frame_height, num_vpp_pipes) \ - do \ - { \ + do { \ HFI_U32 vpss_4tap_top_buffer_size, vpss_div2_top_buffer_size, \ vpss_4tap_left_buffer_size, vpss_div2_left_buffer_size; \ HFI_U32 opb_wr_top_line_luma_buffer_size, \ @@ -367,8 +363,7 @@ typedef HFI_U32 HFI_BOOL; (NUM_HW_PIC_BUF * size_per_buf) #define SIZE_H264D_BSE_CMD_BUF(_size, frame_width, frame_height) \ - do \ - { \ + do { \ HFI_U32 _height = HFI_ALIGN(frame_height, \ BUFFER_ALIGNMENT_32_BYTES); \ _size = MIN((((_height + 15) >> 4) * 48), H264D_MAX_SLICE) *\ @@ -376,8 +371,7 @@ typedef HFI_U32 HFI_BOOL; } while (0) #define SIZE_H264D_VPP_CMD_BUF(_size, frame_width, frame_height) \ - do \ - { \ + do { \ HFI_U32 _height = HFI_ALIGN(frame_height, \ BUFFER_ALIGNMENT_32_BYTES); \ _size = MIN((((_height + 15) >> 4) * 48), H264D_MAX_SLICE) * \ @@ -387,8 +381,7 @@ typedef HFI_U32 HFI_BOOL; #define HFI_BUFFER_COMV_H264D(coMV_size, frame_width, \ frame_height, _yuv_bufcount_min) \ - do \ - { \ + do { \ HFI_U32 frame_width_in_mbs = ((frame_width + 15) >> 4); \ HFI_U32 frame_height_in_mbs = ((frame_height + 15) >> 4); \ HFI_U32 col_mv_aligned_width = (frame_width_in_mbs << 7); \ @@ -419,8 +412,7 @@ typedef HFI_U32 HFI_BOOL; #define HFI_BUFFER_NON_COMV_H264D(_size, frame_width, frame_height, \ num_vpp_pipes) \ - do \ - { \ + do { \ HFI_U32 _size_bse, _size_vpp; \ SIZE_H264D_BSE_CMD_BUF(_size_bse, frame_width, frame_height); \ SIZE_H264D_VPP_CMD_BUF(_size_vpp, frame_width, frame_height); \ @@ -433,8 +425,7 @@ typedef HFI_U32 HFI_BOOL; #define HFI_BUFFER_LINE_H264D(_size, frame_width, frame_height, \ is_opb, num_vpp_pipes) \ - do \ - { \ + do { \ HFI_U32 vpss_lb_size = 0; \ _size = HFI_ALIGN(SIZE_H264D_LB_FE_TOP_DATA(frame_width, \ frame_height), VENUS_DMA_ALIGNMENT) + \ @@ -470,8 +461,7 @@ typedef HFI_U32 HFI_BOOL; #define SIZE_H264D_HW_BIN_BUFFER(_size, frame_width, frame_height, \ delay, num_vpp_pipes) \ - do \ - { \ + do { \ HFI_U32 size_yuv, size_bin_hdr, size_bin_res; \ size_yuv = ((frame_width * frame_height) <= \ BIN_BUFFER_THRESHOLD) ?\ @@ -492,8 +482,7 @@ typedef HFI_U32 HFI_BOOL; #define HFI_BUFFER_BIN_H264D(_size, frame_width, frame_height, is_interlaced, \ delay, num_vpp_pipes) \ - do \ - { \ + do { \ HFI_U32 n_aligned_w = HFI_ALIGN(frame_width, \ BUFFER_ALIGNMENT_16_BYTES);\ HFI_U32 n_aligned_h = HFI_ALIGN(frame_height, \ @@ -570,8 +559,7 @@ typedef HFI_U32 HFI_BOOL; SIZE_H264D_QP(frame_width, frame_height) #define SIZE_H265D_BSE_CMD_BUF(_size, frame_width, frame_height)\ - do \ - { \ + do { \ _size = HFI_ALIGN(((HFI_ALIGN(frame_width, \ LCU_MAX_SIZE_PELS) / LCU_MIN_SIZE_PELS) * \ (HFI_ALIGN(frame_height, LCU_MAX_SIZE_PELS) /\ @@ -581,8 +569,7 @@ typedef HFI_U32 HFI_BOOL; } while (0) #define SIZE_H265D_VPP_CMD_BUF(_size, frame_width, frame_height) \ - do \ - { \ + do { \ _size = HFI_ALIGN(((HFI_ALIGN(frame_width, LCU_MAX_SIZE_PELS) /\ LCU_MIN_SIZE_PELS) * (HFI_ALIGN(frame_height, \ LCU_MAX_SIZE_PELS) / LCU_MIN_SIZE_PELS)) * \ @@ -598,8 +585,7 @@ typedef HFI_U32 HFI_BOOL; #define HFI_BUFFER_COMV_H265D(_size, frame_width, frame_height, \ _yuv_bufcount_min) \ - do \ - { \ + do { \ _size = HFI_ALIGN(((((frame_width + 15) >> 4) * \ ((frame_height + 15) >> 4)) << 8), \ BUFFER_ALIGNMENT_512_BYTES); \ @@ -611,8 +597,7 @@ typedef HFI_U32 HFI_BOOL; #define HFI_BUFFER_NON_COMV_H265D(_size, frame_width, frame_height, \ num_vpp_pipes) \ - do \ - { \ + do { \ HFI_U32 _size_bse, _size_vpp; \ SIZE_H265D_BSE_CMD_BUF(_size_bse, frame_width, \ frame_height); \ @@ -635,8 +620,7 @@ typedef HFI_U32 HFI_BOOL; #define HFI_BUFFER_LINE_H265D(_size, frame_width, frame_height, \ is_opb, num_vpp_pipes) \ - do \ - { \ + do { \ HFI_U32 vpss_lb_size = 0; \ _size = HFI_ALIGN(SIZE_H265D_LB_FE_TOP_DATA(frame_width, \ frame_height), VENUS_DMA_ALIGNMENT) + \ @@ -673,8 +657,7 @@ typedef HFI_U32 HFI_BOOL; #define SIZE_H265D_HW_BIN_BUFFER(_size, frame_width, frame_height, \ delay, num_vpp_pipes) \ - do \ - { \ + do { \ HFI_U32 size_yuv, size_bin_hdr, size_bin_res; \ size_yuv = ((frame_width * frame_height) <= \ BIN_BUFFER_THRESHOLD) ? \ @@ -696,8 +679,7 @@ typedef HFI_U32 HFI_BOOL; #define HFI_BUFFER_BIN_H265D(_size, frame_width, frame_height, \ is_interlaced, delay, num_vpp_pipes) \ - do \ - { \ + do { \ HFI_U32 n_aligned_w = HFI_ALIGN(frame_width, \ BUFFER_ALIGNMENT_16_BYTES); \ HFI_U32 n_aligned_h = HFI_ALIGN(frame_height, \ @@ -766,8 +748,7 @@ typedef HFI_U32 HFI_BOOL; SIZE_H264D_QP(frame_width, frame_height) #define HFI_IRIS2_VP9D_LB_SIZE(_size, frame_width, frame_height, num_vpp_pipes)\ - do \ - { \ + do { \ _size = HFI_ALIGN(SIZE_VPXD_LB_FE_LEFT_CTRL(frame_width, \ frame_height),VENUS_DMA_ALIGNMENT) * num_vpp_pipes + \ HFI_ALIGN(SIZE_VPXD_LB_SE_LEFT_CTRL(frame_width, frame_height),\ @@ -790,14 +771,12 @@ typedef HFI_U32 HFI_BOOL; #define HFI_BUFFER_LINE_VP9D(_size, frame_width, frame_height, \ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ - do \ - { \ + do { \ HFI_U32 _lb_size = 0; \ HFI_U32 vpss_lb_size = 0; \ HFI_IRIS2_VP9D_LB_SIZE(_lb_size, frame_width, frame_height,\ num_vpp_pipes); \ - if (is_opb) \ - { \ + if (is_opb) { \ SIZE_VPSS_LB(vpss_lb_size, frame_width, frame_height, \ num_vpp_pipes); \ } \ @@ -810,13 +789,11 @@ typedef HFI_U32 HFI_BOOL; #define HFI_BUFFER_BIN_VP9D(_size, frame_width, frame_height, \ is_interlaced, num_vpp_pipes) \ - do \ - { \ + do { \ HFI_U32 _size_yuv = HFI_ALIGN(frame_width, \ BUFFER_ALIGNMENT_16_BYTES) *\ HFI_ALIGN(frame_height, BUFFER_ALIGNMENT_16_BYTES) * 3 / 2; \ - if (!is_interlaced) \ - { \ + if (!is_interlaced) { \ _size = HFI_ALIGN(((MAX(_size_yuv, \ ((BIN_BUFFER_THRESHOLD * 3) >> 1)) * \ VPX_DECODER_FRAME_BIN_HDR_BUDGET_RATIO * \ @@ -828,10 +805,8 @@ typedef HFI_U32 HFI_BOOL; VENUS_DMA_ALIGNMENT); \ _size = _size * num_vpp_pipes; \ } \ - else \ - { \ + else \ _size = 0; \ - } \ } while (0) #define VP9_NUM_FRAME_INFO_BUF 32 @@ -890,8 +865,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define HFI_BUFFER_BITSTREAM_ENC(size, frame_width, frame_height, \ rc_type, is_ten_bit) \ - do \ - { \ + do { \ HFI_U32 aligned_width, aligned_height, bitstream_size; \ aligned_width = HFI_ALIGN(frame_width, 32); \ aligned_height = HFI_ALIGN(frame_height, 32); \ @@ -921,8 +895,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ } while (0) #define SIZE_ROI_METADATA_ENC(size_roi, frame_width, frame_height, lcu_size)\ - do \ - { \ + do { \ HFI_U32 width_in_lcus = 0, height_in_lcus = 0, n_shift = 0; \ while (lcu_size && !(lcu_size & 0x1)) \ { \ @@ -937,8 +910,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define HFI_BUFFER_INPUT_METADATA_ENC(size, frame_width, frame_height, \ is_roi_enabled, lcu_size) \ - do \ - { \ + do { \ HFI_U32 roi_size = 0; \ if (is_roi_enabled) \ { \ @@ -951,23 +923,20 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define HFI_BUFFER_INPUT_METADATA_H264E(size_metadata, frame_width, \ frame_height, is_roi_enabled) \ - do \ - { \ + do { \ HFI_BUFFER_INPUT_METADATA_ENC(size_metadata, frame_width, \ frame_height, is_roi_enabled, 16); \ }while (0) #define HFI_BUFFER_INPUT_METADATA_H265E(size_metadata, frame_width, \ frame_height, is_roi_enabled) \ - do \ - { \ + do { \ HFI_BUFFER_INPUT_METADATA_ENC(size_metadata, frame_width, \ frame_height, is_roi_enabled, 32); \ } while (0) #define HFI_BUFFER_ARP_ENC(size) \ - do \ - { \ + do { \ size = 204800; \ } while (0) @@ -987,8 +956,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define HFI_IRIS2_ENC_RECON_BUF_COUNT(num_recon, n_bframe, ltr_count, \ _total_hp_layers, _total_hb_layers, hybrid_hp, codec_standard) \ - do \ - { \ + do { \ HFI_U32 num_ref = 1; \ if (n_bframe) \ num_ref = 2; \ @@ -1018,8 +986,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define SIZE_BIN_BITSTREAM_ENC(_size, rc_type, frame_width, frame_height, \ work_mode, lcu_size) \ - do \ - { \ + do { \ HFI_U32 size_aligned_width = 0, size_aligned_height = 0; \ HFI_U32 bitstream_size_eval = 0; \ size_aligned_width = HFI_ALIGN((frame_width), lcu_size); \ @@ -1064,8 +1031,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define SIZE_ENC_SINGLE_PIPE(size, rc_type, bitbin_size, num_vpp_pipes, \ frame_width, frame_height, lcu_size) \ - do \ - { \ + do { \ HFI_U32 size_single_pipe_eval = 0, sao_bin_buffer_size = 0, \ _padded_bin_sz = 0; \ HFI_U32 size_aligned_width = 0, size_aligned_height = 0; \ @@ -1101,8 +1067,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define HFI_BUFFER_BIN_ENC(_size, rc_type, frame_width, frame_height, lcu_size, \ work_mode, num_vpp_pipes) \ - do \ - { \ + do { \ HFI_U32 bitstream_size = 0, total_bitbin_buffers = 0, \ size_single_pipe = 0, bitbin_size = 0; \ SIZE_BIN_BITSTREAM_ENC(bitstream_size, rc_type, frame_width, \ @@ -1136,16 +1101,14 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define HFI_BUFFER_BIN_H264E(_size, rc_type, frame_width, frame_height, \ work_mode, num_vpp_pipes) \ - do \ - { \ + do { \ HFI_BUFFER_BIN_ENC(_size, rc_type, frame_width, frame_height, 16, \ work_mode, num_vpp_pipes); \ } while (0) #define HFI_BUFFER_BIN_H265E(_size, rc_type, frame_width, frame_height, \ work_mode, num_vpp_pipes) \ - do \ - { \ + do { \ HFI_BUFFER_BIN_ENC(_size, rc_type, frame_width, frame_height, 32,\ work_mode, num_vpp_pipes); \ } while (0) @@ -1158,8 +1121,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ HFI_ALIGN(frame_width_coded, VENUS_DMA_ALIGNMENT) #define SIZE_LINEBUFF_DATA(_size, is_ten_bit, frame_width_coded) \ - do \ - { \ + do { \ _size = is_ten_bit ? (((((10 * (frame_width_coded) +\ 1024) + (VENUS_DMA_ALIGNMENT - 1)) & \ (~(VENUS_DMA_ALIGNMENT - 1))) * 1) + \ @@ -1175,8 +1137,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define SIZE_LEFT_LINEBUFF_CTRL(_size, standard, frame_height_coded, \ num_vpp_pipes_enc) \ - do \ - { \ + do { \ _size = (standard == HFI_CODEC_ENCODE_HEVC) ? \ (((frame_height_coded) + \ (BUF_SIZE_ALIGN_32)) / BUF_SIZE_ALIGN_32 * 4 * 16) : \ @@ -1192,8 +1153,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define SIZE_LEFT_LINEBUFF_RECON_PIX(_size, is_ten_bit, frame_height_coded, \ num_vpp_pipes_enc) \ - do \ - { \ + do { \ _size = (((is_ten_bit + 1) * 2 * (frame_height_coded) + \ VENUS_DMA_ALIGNMENT) + \ (VENUS_DMA_ALIGNMENT << (num_vpp_pipes_enc - 1)) - 1) & \ @@ -1201,8 +1161,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ } while (0) #define SIZE_TOP_LINEBUFF_CTRL_FE(_size, frame_width_coded, standard) \ - do \ - { \ + do { \ _size = (standard == HFI_CODEC_ENCODE_HEVC) ? (64 * \ ((frame_width_coded) >> 5)) : (VENUS_DMA_ALIGNMENT + 16 * \ ((frame_width_coded) >> 4)); \ @@ -1217,8 +1176,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define SIZE_LEFT_LINEBUFF_METADATA_RECON_Y(_size, frame_height_coded, \ is_ten_bit, num_vpp_pipes_enc) \ - do \ - { \ + do { \ _size = ((VENUS_DMA_ALIGNMENT + 64 * ((frame_height_coded) / \ (8 * (is_ten_bit ? 4 : 8))))); \ _size = HFI_ALIGN(_size, VENUS_DMA_ALIGNMENT); \ @@ -1227,8 +1185,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define SIZE_LEFT_LINEBUFF_METADATA_RECON_UV(_size, frame_height_coded, \ is_ten_bit, num_vpp_pipes_enc) \ - do \ - { \ + do { \ _size = ((VENUS_DMA_ALIGNMENT + 64 * ((frame_height_coded) / \ (4 * (is_ten_bit ? 4 : 8))))); \ _size = HFI_ALIGN(_size, VENUS_DMA_ALIGNMENT); \ @@ -1236,8 +1193,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ } while (0) #define SIZE_LINEBUFF_RECON_PIX(_size, is_ten_bit, frame_width_coded) \ - do \ - { \ + do { \ _size = ((is_ten_bit ? 3 : 2) * (frame_width_coded)); \ _size = HFI_ALIGN(_size, VENUS_DMA_ALIGNMENT); \ } while (0) @@ -1247,8 +1203,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define SIZE_FRAME_RC_BUF_SIZE(_size, standard, frame_height_coded, \ num_vpp_pipes_enc) \ - do \ - { \ + do { \ _size = (standard == HFI_CODEC_ENCODE_HEVC) ? (256 + 16 * \ (14 + ((((frame_height_coded) >> 5) + 7) >> 3))) : \ (256 + 16 * (14 + ((((frame_height_coded) >> 4) + 7) >> 3))); \ @@ -1288,8 +1243,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define HFI_BUFFER_LINE_ENC(_size, frame_width, frame_height, is_ten_bit, \ num_vpp_pipes_enc, lcu_size, standard) \ - do \ - { \ + do { \ HFI_U32 width_in_lcus = 0, height_in_lcus = 0, \ frame_width_coded = 0, frame_height_coded = 0; \ HFI_U32 line_buff_data_size = 0, left_line_buff_ctrl_size = 0, \ @@ -1336,24 +1290,21 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define HFI_BUFFER_LINE_H264E(_size, frame_width, frame_height, is_ten_bit, \ num_vpp_pipes) \ - do \ - { \ + do { \ HFI_BUFFER_LINE_ENC(_size, frame_width, frame_height, 0, \ num_vpp_pipes, 16, HFI_CODEC_ENCODE_AVC); \ } while (0) #define HFI_BUFFER_LINE_H265E(_size, frame_width, frame_height, is_ten_bit, \ num_vpp_pipes) \ - do \ - { \ + do { \ HFI_BUFFER_LINE_ENC(_size, frame_width, frame_height, \ is_ten_bit, num_vpp_pipes, 32, HFI_CODEC_ENCODE_HEVC); \ } while (0) #define HFI_BUFFER_COMV_ENC(_size, frame_width, frame_height, lcu_size, \ num_recon, standard) \ - do \ - { \ + do { \ HFI_U32 size_colloc_mv = 0, size_colloc_rc = 0; \ HFI_U32 mb_width = ((frame_width) + 15) >> 4; \ HFI_U32 mb_height = ((frame_height) + 15) >> 4; \ @@ -1375,23 +1326,20 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ } while (0) #define HFI_BUFFER_COMV_H264E(_size, frame_width, frame_height, num_recon) \ - do \ - { \ + do { \ HFI_BUFFER_COMV_ENC(_size, frame_width, frame_height, 16, \ num_recon, HFI_CODEC_ENCODE_AVC); \ } while (0) #define HFI_BUFFER_COMV_H265E(_size, frame_width, frame_height, num_recon) \ - do \ - { \ + do { \ HFI_BUFFER_COMV_ENC(_size, frame_width, frame_height, 32,\ num_recon, HFI_CODEC_ENCODE_HEVC); \ } while (0) #define HFI_BUFFER_NON_COMV_ENC(_size, frame_width, frame_height, \ num_vpp_pipes_enc, lcu_size, standard) \ - do \ - { \ + do { \ HFI_U32 width_in_lcus = 0, height_in_lcus = 0, \ frame_width_coded = 0, frame_height_coded = 0, \ num_lcu_in_frame = 0, num_lcumb = 0; \ @@ -1419,23 +1367,20 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define HFI_BUFFER_NON_COMV_H264E(_size, frame_width, frame_height, \ num_vpp_pipes_enc) \ - do \ - { \ + do { \ HFI_BUFFER_NON_COMV_ENC(_size, frame_width, frame_height, \ num_vpp_pipes_enc, 16, HFI_CODEC_ENCODE_AVC); \ } while (0) #define HFI_BUFFER_NON_COMV_H265E(_size, frame_width, frame_height, \ num_vpp_pipes_enc) \ - do \ - { \ + do { \ HFI_BUFFER_NON_COMV_ENC(_size, frame_width, frame_height, \ num_vpp_pipes_enc, 32, HFI_CODEC_ENCODE_HEVC); \ } while (0) #define SIZE_ENC_REF_BUFFER(size, frame_width, frame_height) \ - do \ - { \ + do { \ HFI_U32 u_buffer_width = 0, u_buffer_height = 0, \ u_chroma_buffer_height = 0; \ u_buffer_height = HFI_ALIGN(frame_height, \ @@ -1450,8 +1395,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ } while (0) #define SIZE_ENC_TEN_BIT_REF_BUFFER(size, frame_width, frame_height) \ - do \ - { \ + do { \ HFI_U32 ref_buf_height = 0, ref_luma_stride_in_bytes = 0, \ u_ref_stride = 0, luma_size = 0, ref_chrm_height_in_bytes = 0, \ chroma_size = 0, ref_buf_size = 0; \ @@ -1477,8 +1421,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ } while (0) #define HFI_BUFFER_DPB_ENC(_size, frame_width, frame_height, is_ten_bit) \ - do \ - { \ + do { \ HFI_U32 metadata_stride, metadata_buf_height, meta_size_y, \ meta_size_c; \ HFI_U32 ten_bit_ref_buf_size = 0, ref_buf_size = 0; \ @@ -1518,20 +1461,17 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ } while (0) #define HFI_BUFFER_DPB_H264E(_size, frame_width, frame_height) \ - do \ - { \ + do { \ HFI_BUFFER_DPB_ENC(_size, frame_width, frame_height, 0); \ } while (0) #define HFI_BUFFER_DPB_H265E(_size, frame_width, frame_height, is_ten_bit) \ - do \ - { \ + do { \ HFI_BUFFER_DPB_ENC(_size, frame_width, frame_height, is_ten_bit); \ } while (0) #define HFI_BUFFER_VPSS_ENC(vpss_size, dswidth, dsheight, ds_enable, blur, is_ten_bit) \ - do \ - { \ + do { \ vpss_size = 0; \ if (ds_enable || blur) \ { \ diff --git a/driver/variant/iris3/inc/hfi_buffer_iris3.h b/driver/variant/iris3/inc/hfi_buffer_iris3.h index a64a694660..eb4e8b147e 100644 --- a/driver/variant/iris3/inc/hfi_buffer_iris3.h +++ b/driver/variant/iris3/inc/hfi_buffer_iris3.h @@ -90,8 +90,7 @@ typedef HFI_U32 HFI_BOOL; uv_buffer_height_multiple, y_metadata_stride_multiple, \ y_metadata_buffer_height_multiple, \ uv_metadata_stride_multiple, uv_metadata_buffer_height_multiple) \ - do \ - { \ + do { \ HFI_U32 y_buf_size, uv_buf_size, y_meta_size, uv_meta_size; \ HFI_U32 stride, _height; \ HFI_U32 half_height = (frame_height + 1) >> 1; \ @@ -159,8 +158,7 @@ typedef HFI_U32 HFI_BOOL; #define HFI_YUV420_TP10_UBWC_CALC_BUF_SIZE(buf_size, y_stride, y_buf_height, \ uv_stride, uv_buf_height, y_md_stride, y_md_height, uv_md_stride, \ uv_md_height)\ - do \ - { \ + do { \ HFI_U32 y_data_size, uv_data_size, y_md_size, uv_md_size; \ HFI_YUV420_TP10_UBWC_CALC_Y_BUF_SIZE(y_data_size, y_stride,\ y_buf_height); \ @@ -191,8 +189,7 @@ typedef HFI_U32 HFI_BOOL; #define HFI_YUV420_P010_CALC_BUF_SIZE(buf_size, y_data_size, y_stride, \ y_buf_height, uv_data_size, uv_stride, uv_buf_height) \ - do \ - { \ + do { \ y_data_size = HFI_ALIGN(y_stride * y_buf_height, \ HFI_ALIGNMENT_4096);\ uv_data_size = HFI_ALIGN(uv_stride * uv_buf_height, \ @@ -292,8 +289,7 @@ typedef HFI_U32 HFI_BOOL; #define MAX_TILE_COLUMNS 32 #define SIZE_VPSS_LB(Size, frame_width, frame_height, num_vpp_pipes) \ - do \ - { \ + do { \ HFI_U32 vpss_4tap_top_buffer_size, vpss_div2_top_buffer_size, \ vpss_4tap_left_buffer_size, vpss_div2_left_buffer_size; \ HFI_U32 opb_wr_top_line_luma_buffer_size, \ @@ -367,8 +363,7 @@ typedef HFI_U32 HFI_BOOL; (NUM_HW_PIC_BUF * size_per_buf) #define SIZE_H264D_BSE_CMD_BUF(_size, frame_width, frame_height) \ - do \ - { \ + do { \ HFI_U32 _height = HFI_ALIGN(frame_height, \ BUFFER_ALIGNMENT_32_BYTES); \ _size = MIN((((_height + 15) >> 4) * 48), H264D_MAX_SLICE) *\ @@ -376,8 +371,7 @@ typedef HFI_U32 HFI_BOOL; } while (0) #define SIZE_H264D_VPP_CMD_BUF(_size, frame_width, frame_height) \ - do \ - { \ + do { \ HFI_U32 _height = HFI_ALIGN(frame_height, \ BUFFER_ALIGNMENT_32_BYTES); \ _size = MIN((((_height + 15) >> 4) * 48), H264D_MAX_SLICE) * \ @@ -387,8 +381,7 @@ typedef HFI_U32 HFI_BOOL; #define HFI_BUFFER_COMV_H264D(coMV_size, frame_width, \ frame_height, _comv_bufcount) \ - do \ - { \ + do { \ HFI_U32 frame_width_in_mbs = ((frame_width + 15) >> 4); \ HFI_U32 frame_height_in_mbs = ((frame_height + 15) >> 4); \ HFI_U32 col_mv_aligned_width = (frame_width_in_mbs << 7); \ @@ -419,8 +412,7 @@ typedef HFI_U32 HFI_BOOL; #define HFI_BUFFER_NON_COMV_H264D(_size, frame_width, frame_height, \ num_vpp_pipes) \ - do \ - { \ + do { \ HFI_U32 _size_bse, _size_vpp; \ SIZE_H264D_BSE_CMD_BUF(_size_bse, frame_width, frame_height); \ SIZE_H264D_VPP_CMD_BUF(_size_vpp, frame_width, frame_height); \ @@ -433,8 +425,7 @@ typedef HFI_U32 HFI_BOOL; #define HFI_BUFFER_LINE_H264D(_size, frame_width, frame_height, \ is_opb, num_vpp_pipes) \ - do \ - { \ + do { \ HFI_U32 vpss_lb_size = 0; \ _size = HFI_ALIGN(SIZE_H264D_LB_FE_TOP_DATA(frame_width, \ frame_height), VENUS_DMA_ALIGNMENT) + \ @@ -470,8 +461,7 @@ typedef HFI_U32 HFI_BOOL; #define SIZE_H264D_HW_BIN_BUFFER(_size, frame_width, frame_height, \ delay, num_vpp_pipes) \ - do \ - { \ + do { \ HFI_U32 size_yuv, size_bin_hdr, size_bin_res; \ size_yuv = ((frame_width * frame_height) <= \ BIN_BUFFER_THRESHOLD) ?\ @@ -492,8 +482,7 @@ typedef HFI_U32 HFI_BOOL; #define HFI_BUFFER_BIN_H264D(_size, frame_width, frame_height, is_interlaced, \ delay, num_vpp_pipes) \ - do \ - { \ + do { \ HFI_U32 n_aligned_w = HFI_ALIGN(frame_width, \ BUFFER_ALIGNMENT_16_BYTES);\ HFI_U32 n_aligned_h = HFI_ALIGN(frame_height, \ @@ -570,8 +559,7 @@ typedef HFI_U32 HFI_BOOL; SIZE_H264D_QP(frame_width, frame_height) #define SIZE_H265D_BSE_CMD_BUF(_size, frame_width, frame_height)\ - do \ - { \ + do { \ _size = HFI_ALIGN(((HFI_ALIGN(frame_width, \ LCU_MAX_SIZE_PELS) / LCU_MIN_SIZE_PELS) * \ (HFI_ALIGN(frame_height, LCU_MAX_SIZE_PELS) /\ @@ -581,8 +569,7 @@ typedef HFI_U32 HFI_BOOL; } while (0) #define SIZE_H265D_VPP_CMD_BUF(_size, frame_width, frame_height) \ - do \ - { \ + do { \ _size = HFI_ALIGN(((HFI_ALIGN(frame_width, LCU_MAX_SIZE_PELS) /\ LCU_MIN_SIZE_PELS) * (HFI_ALIGN(frame_height, \ LCU_MAX_SIZE_PELS) / LCU_MIN_SIZE_PELS)) * \ @@ -598,8 +585,7 @@ typedef HFI_U32 HFI_BOOL; #define HFI_BUFFER_COMV_H265D(_size, frame_width, frame_height, \ _comv_bufcount) \ - do \ - { \ + do { \ _size = HFI_ALIGN(((((frame_width + 15) >> 4) * \ ((frame_height + 15) >> 4)) << 8), \ BUFFER_ALIGNMENT_512_BYTES); \ @@ -611,8 +597,7 @@ typedef HFI_U32 HFI_BOOL; #define HFI_BUFFER_NON_COMV_H265D(_size, frame_width, frame_height, \ num_vpp_pipes) \ - do \ - { \ + do { \ HFI_U32 _size_bse, _size_vpp; \ SIZE_H265D_BSE_CMD_BUF(_size_bse, frame_width, \ frame_height); \ @@ -635,8 +620,7 @@ typedef HFI_U32 HFI_BOOL; #define HFI_BUFFER_LINE_H265D(_size, frame_width, frame_height, \ is_opb, num_vpp_pipes) \ - do \ - { \ + do { \ HFI_U32 vpss_lb_size = 0; \ _size = HFI_ALIGN(SIZE_H265D_LB_FE_TOP_DATA(frame_width, \ frame_height), VENUS_DMA_ALIGNMENT) + \ @@ -673,8 +657,7 @@ typedef HFI_U32 HFI_BOOL; #define SIZE_H265D_HW_BIN_BUFFER(_size, frame_width, frame_height, \ delay, num_vpp_pipes) \ - do \ - { \ + do { \ HFI_U32 size_yuv, size_bin_hdr, size_bin_res; \ size_yuv = ((frame_width * frame_height) <= \ BIN_BUFFER_THRESHOLD) ? \ @@ -696,8 +679,7 @@ typedef HFI_U32 HFI_BOOL; #define HFI_BUFFER_BIN_H265D(_size, frame_width, frame_height, \ is_interlaced, delay, num_vpp_pipes) \ - do \ - { \ + do { \ HFI_U32 n_aligned_w = HFI_ALIGN(frame_width, \ BUFFER_ALIGNMENT_16_BYTES); \ HFI_U32 n_aligned_h = HFI_ALIGN(frame_height, \ @@ -766,8 +748,7 @@ typedef HFI_U32 HFI_BOOL; SIZE_H264D_QP(frame_width, frame_height) #define HFI_IRIS3_VP9D_LB_SIZE(_size, frame_width, frame_height, num_vpp_pipes)\ - do \ - { \ + do { \ _size = HFI_ALIGN(SIZE_VPXD_LB_FE_LEFT_CTRL(frame_width, \ frame_height),VENUS_DMA_ALIGNMENT) * num_vpp_pipes + \ HFI_ALIGN(SIZE_VPXD_LB_SE_LEFT_CTRL(frame_width, frame_height),\ @@ -790,14 +771,12 @@ typedef HFI_U32 HFI_BOOL; #define HFI_BUFFER_LINE_VP9D(_size, frame_width, frame_height, \ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ - do \ - { \ + do { \ HFI_U32 _lb_size = 0; \ HFI_U32 vpss_lb_size = 0; \ HFI_IRIS3_VP9D_LB_SIZE(_lb_size, frame_width, frame_height,\ num_vpp_pipes); \ - if (is_opb) \ - { \ + if (is_opb) { \ SIZE_VPSS_LB(vpss_lb_size, frame_width, frame_height, \ num_vpp_pipes); \ } \ @@ -810,13 +789,11 @@ typedef HFI_U32 HFI_BOOL; #define HFI_BUFFER_BIN_VP9D(_size, frame_width, frame_height, \ is_interlaced, num_vpp_pipes) \ - do \ - { \ + do { \ HFI_U32 _size_yuv = HFI_ALIGN(frame_width, \ BUFFER_ALIGNMENT_16_BYTES) *\ HFI_ALIGN(frame_height, BUFFER_ALIGNMENT_16_BYTES) * 3 / 2; \ - if (!is_interlaced) \ - { \ + if (!is_interlaced) { \ _size = HFI_ALIGN(((MAX(_size_yuv, \ ((BIN_BUFFER_THRESHOLD * 3) >> 1)) * \ VPX_DECODER_FRAME_BIN_HDR_BUDGET_RATIO * \ @@ -828,10 +805,8 @@ typedef HFI_U32 HFI_BOOL; VENUS_DMA_ALIGNMENT); \ _size = _size * num_vpp_pipes; \ } \ - else \ - { \ + else \ _size = 0; \ - } \ } while (0) #define VP9_NUM_FRAME_INFO_BUF 32 @@ -894,7 +869,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define HFI_BUFFER_COMV_AV1D(_size, frame_width, frame_height, \ _comv_bufcount) \ - do { \ + do { \ \ _size = 2 * HFI_ALIGN(MAX(((frame_width + 63) / 64) * \ ((frame_height + 63) / 64) * 512, \ ((frame_width + 127) / 128) * \ @@ -964,24 +939,21 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ SIZE_H264D_QP(frame_width, frame_height) #define SIZE_AV1D_LB_OPB_WR1_NV12_UBWC(_size, frame_width, frame_height) \ - do \ - { \ + do { \ HFI_U32 y_width, y_width_a = 128; \ HFI_NV12_IL_CALC_Y_STRIDE(y_width, frame_width, y_width_a); \ _size = (256 * ((y_width + 31) / 32 + (AV1D_MAX_TILE_COLS - 1))); \ } while (0) #define SIZE_AV1D_LB_OPB_WR1_TP10_UBWC(_size, frame_width, frame_height) \ - do \ - { \ + do { \ HFI_U32 y_width, y_width_a = 256; \ HFI_YUV420_TP10_CALC_Y_STRIDE(y_width, frame_width, y_width_a); \ _size = (256 * ((y_width + 47) / 48 + (AV1D_MAX_TILE_COLS - 1))); \ } while (0) #define SIZE_AV1D_IBC_NV12_UBWC(_size, frame_width, frame_height) \ - do \ - { \ + do { \ HFI_U32 y_width_a = 128, y_height_a = 32; \ HFI_U32 uv_width_a = 128, uv_height_a = 32; \ HFI_U32 yBufSize, uvBufSize, y_width, y_height, uv_width, uv_height; \ @@ -1017,8 +989,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ } while (0) #define SIZE_AV1D_IBC_TP10_UBWC(_size, frame_width, frame_height) \ - do \ - { \ + do { \ HFI_U32 y_width_a = 256, y_height_a = 16, \ uv_width_a = 256, uv_height_a = 16; \ HFI_U32 yBufSize, uvBufSize, y_width, y_height, uv_width, uv_height; \ @@ -1056,8 +1027,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define HFI_BUFFER_LINE_AV1D(_size, frame_width, frame_height, isOPB, \ num_vpp_pipes) \ - do \ - { \ + do { \ HFI_U32 vpssLBSize, opbwr1BufSize, opbwr8, opbwr10; \ _size = HFI_ALIGN(SIZE_AV1D_LB_FE_TOP_DATA(frame_width, frame_height), \ VENUS_DMA_ALIGNMENT) + \ @@ -1092,7 +1062,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ } while (0) #define HFI_BUFFER_IBC_AV1D(_size, frame_width, frame_height) \ - do { \ + do { \ \ HFI_U32 ibc8, ibc10; \ SIZE_AV1D_IBC_NV12_UBWC(ibc8, frame_width, frame_height); \ SIZE_AV1D_IBC_TP10_UBWC(ibc10, frame_width, frame_height); \ @@ -1105,8 +1075,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ * but limit buffer size for high resolution */ #define SIZE_AV1D_HW_BIN_BUFFER(_size, frame_width, frame_height, delay, \ num_vpp_pipes) \ - do \ - { \ + do { \ HFI_U32 size_yuv, size_bin_hdr, size_bin_res; \ size_yuv = ((frame_width * frame_height) <= BIN_BUFFER_THRESHOLD) ? \ ((BIN_BUFFER_THRESHOLD * 3) >> 1) : \ @@ -1126,8 +1095,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define HFI_BUFFER_BIN_AV1D(_size, frame_width, frame_height, isInterlaced, \ delay, num_vpp_pipes) \ - do \ - { \ + do { \ HFI_U32 nAlignedW = HFI_ALIGN(frame_width, BUFFER_ALIGNMENT_16_BYTES); \ HFI_U32 nAlignedH = HFI_ALIGN(frame_height, BUFFER_ALIGNMENT_16_BYTES); \ if (!isInterlaced) \ @@ -1159,8 +1127,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ AV1D_SIZE_BSE_COL_MV_128x128)) #define HFI_BUFFER_PERSIST_AV1D(_size, max_width, max_height, total_ref_count) \ - do \ - { \ + do { \ HFI_U32 comv_size; \ HFI_BUFFER_COMV_AV1D(comv_size, max_width, max_height, total_ref_count); \ _size = \ @@ -1175,8 +1142,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define HFI_BUFFER_BITSTREAM_ENC(size, frame_width, frame_height, \ rc_type, is_ten_bit) \ - do \ - { \ + do { \ HFI_U32 aligned_width, aligned_height, bitstream_size, yuv_size; \ aligned_width = HFI_ALIGN(frame_width, 32); \ aligned_height = HFI_ALIGN(frame_height, 32); \ @@ -1210,8 +1176,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define HFI_IRIS3_ENC_TILE_SIZE_INFO(tile_size, tile_count, last_tile_size, \ frame_width_coded, codec_standard) \ - do \ - { \ + do { \ HFI_U32 without_tile_enc_width; \ HFI_U32 min_tile_size = 352, fixed_tile_width = 960; \ without_tile_enc_width = min_tile_size + fixed_tile_width; \ @@ -1237,8 +1202,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define HFI_IRIS3_ENC_MB_BASED_MULTI_SLICE_COUNT(total_slice_count, frame_width, frame_height, \ codec_standard, multi_slice_max_mb_count) \ - do \ - { \ + do { \ HFI_U32 tile_size, tile_count, last_tile_size, \ slice_count_per_tile, slice_count_in_last_tile; \ HFI_U32 mbs_in_one_tile, mbs_in_last_tile; \ @@ -1267,8 +1231,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ } while (0) #define SIZE_ROI_METADATA_ENC(size_roi, frame_width, frame_height, lcu_size)\ - do \ - { \ + do { \ HFI_U32 width_in_lcus = 0, height_in_lcus = 0, n_shift = 0; \ while (lcu_size && !(lcu_size & 0x1)) \ { \ @@ -1283,8 +1246,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define HFI_BUFFER_INPUT_METADATA_ENC(size, frame_width, frame_height, \ is_roi_enabled, lcu_size) \ - do \ - { \ + do { \ HFI_U32 roi_size = 0; \ if (is_roi_enabled) \ { \ @@ -1297,23 +1259,20 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define HFI_BUFFER_INPUT_METADATA_H264E(size_metadata, frame_width, \ frame_height, is_roi_enabled) \ - do \ - { \ + do { \ HFI_BUFFER_INPUT_METADATA_ENC(size_metadata, frame_width, \ frame_height, is_roi_enabled, 16); \ }while (0) #define HFI_BUFFER_INPUT_METADATA_H265E(size_metadata, frame_width, \ frame_height, is_roi_enabled) \ - do \ - { \ + do { \ HFI_BUFFER_INPUT_METADATA_ENC(size_metadata, frame_width, \ frame_height, is_roi_enabled, 32); \ } while (0) #define HFI_BUFFER_ARP_ENC(size) \ - do \ - { \ + do { \ size = 204800; \ } while (0) @@ -1333,8 +1292,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define HFI_IRIS3_ENC_RECON_BUF_COUNT(num_recon, n_bframe, ltr_count, \ _total_hp_layers, _total_hb_layers, hybrid_hp, codec_standard) \ - do \ - { \ + do { \ HFI_U32 num_ref = 1; \ if (n_bframe) \ num_ref = 2; \ @@ -1364,8 +1322,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define SIZE_BIN_BITSTREAM_ENC(_size, rc_type, frame_width, frame_height, \ work_mode, lcu_size, profile) \ - do \ - { \ + do { \ HFI_U32 size_aligned_width = 0, size_aligned_height = 0; \ HFI_U32 bitstream_size_eval = 0; \ size_aligned_width = HFI_ALIGN((frame_width), lcu_size); \ @@ -1411,8 +1368,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define SIZE_ENC_SINGLE_PIPE(size, rc_type, bitbin_size, num_vpp_pipes, \ frame_width, frame_height, lcu_size) \ - do \ - { \ + do { \ HFI_U32 size_single_pipe_eval = 0, sao_bin_buffer_size = 0, \ _padded_bin_sz = 0; \ HFI_U32 size_aligned_width = 0, size_aligned_height = 0; \ @@ -1448,8 +1404,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define HFI_BUFFER_BIN_ENC(_size, rc_type, frame_width, frame_height, lcu_size, \ work_mode, num_vpp_pipes, profile) \ - do \ - { \ + do { \ HFI_U32 bitstream_size = 0, total_bitbin_buffers = 0, \ size_single_pipe = 0, bitbin_size = 0; \ SIZE_BIN_BITSTREAM_ENC(bitstream_size, rc_type, frame_width, \ @@ -1483,16 +1438,14 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define HFI_BUFFER_BIN_H264E(_size, rc_type, frame_width, frame_height, \ work_mode, num_vpp_pipes, profile) \ - do \ - { \ + do { \ HFI_BUFFER_BIN_ENC(_size, rc_type, frame_width, frame_height, 16, \ work_mode, num_vpp_pipes, profile); \ } while (0) #define HFI_BUFFER_BIN_H265E(_size, rc_type, frame_width, frame_height, \ work_mode, num_vpp_pipes, profile) \ - do \ - { \ + do { \ HFI_BUFFER_BIN_ENC(_size, rc_type, frame_width, frame_height, 32,\ work_mode, num_vpp_pipes, profile); \ } while (0) @@ -1505,8 +1458,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ HFI_ALIGN(frame_width_coded, VENUS_DMA_ALIGNMENT) #define SIZE_LINEBUFF_DATA(_size, is_ten_bit, frame_width_coded) \ - do \ - { \ + do { \ _size = is_ten_bit ? (((((10 * (frame_width_coded) +\ 1024) + (VENUS_DMA_ALIGNMENT - 1)) & \ (~(VENUS_DMA_ALIGNMENT - 1))) * 1) + \ @@ -1522,8 +1474,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define SIZE_LEFT_LINEBUFF_CTRL(_size, standard, frame_height_coded, \ num_vpp_pipes_enc) \ - do \ - { \ + do { \ _size = (standard == HFI_CODEC_ENCODE_HEVC) ? \ (((frame_height_coded) + \ (BUF_SIZE_ALIGN_32)) / BUF_SIZE_ALIGN_32 * 4 * 16) : \ @@ -1539,8 +1490,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define SIZE_LEFT_LINEBUFF_RECON_PIX(_size, is_ten_bit, frame_height_coded, \ num_vpp_pipes_enc) \ - do \ - { \ + do { \ _size = (((is_ten_bit + 1) * 2 * (frame_height_coded) + \ VENUS_DMA_ALIGNMENT) + \ (VENUS_DMA_ALIGNMENT << (num_vpp_pipes_enc - 1)) - 1) & \ @@ -1548,8 +1498,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ } while (0) #define SIZE_TOP_LINEBUFF_CTRL_FE(_size, frame_width_coded, standard) \ - do \ - { \ + do { \ _size = (standard == HFI_CODEC_ENCODE_HEVC) ? (64 * \ ((frame_width_coded) >> 5)) : (VENUS_DMA_ALIGNMENT + 16 * \ ((frame_width_coded) >> 4)); \ @@ -1564,8 +1513,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define SIZE_LEFT_LINEBUFF_METADATA_RECON_Y(_size, frame_height_coded, \ is_ten_bit, num_vpp_pipes_enc) \ - do \ - { \ + do { \ _size = ((VENUS_DMA_ALIGNMENT + 64 * ((frame_height_coded) / \ (8 * (is_ten_bit ? 4 : 8))))); \ _size = HFI_ALIGN(_size, VENUS_DMA_ALIGNMENT); \ @@ -1574,8 +1522,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define SIZE_LEFT_LINEBUFF_METADATA_RECON_UV(_size, frame_height_coded, \ is_ten_bit, num_vpp_pipes_enc) \ - do \ - { \ + do { \ _size = ((VENUS_DMA_ALIGNMENT + 64 * ((frame_height_coded) / \ (4 * (is_ten_bit ? 4 : 8))))); \ _size = HFI_ALIGN(_size, VENUS_DMA_ALIGNMENT); \ @@ -1583,8 +1530,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ } while (0) #define SIZE_LINEBUFF_RECON_PIX(_size, is_ten_bit, frame_width_coded) \ - do \ - { \ + do { \ _size = ((is_ten_bit ? 3 : 2) * (frame_width_coded)); \ _size = HFI_ALIGN(_size, VENUS_DMA_ALIGNMENT); \ } while (0) @@ -1594,8 +1540,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define SIZE_FRAME_RC_BUF_SIZE(_size, standard, frame_height_coded, \ num_vpp_pipes_enc) \ - do \ - { \ + do { \ _size = (standard == HFI_CODEC_ENCODE_HEVC) ? (256 + 16 * \ (14 + ((((frame_height_coded) >> 5) + 7) >> 3))) : \ (256 + 16 * (14 + ((((frame_height_coded) >> 4) + 7) >> 3))); \ @@ -1635,8 +1580,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define HFI_BUFFER_LINE_ENC(_size, frame_width, frame_height, is_ten_bit, \ num_vpp_pipes_enc, lcu_size, standard) \ - do \ - { \ + do { \ HFI_U32 width_in_lcus = 0, height_in_lcus = 0, \ frame_width_coded = 0, frame_height_coded = 0; \ HFI_U32 line_buff_data_size = 0, left_line_buff_ctrl_size = 0, \ @@ -1683,24 +1627,21 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define HFI_BUFFER_LINE_H264E(_size, frame_width, frame_height, is_ten_bit, \ num_vpp_pipes) \ - do \ - { \ + do { \ HFI_BUFFER_LINE_ENC(_size, frame_width, frame_height, 0, \ num_vpp_pipes, 16, HFI_CODEC_ENCODE_AVC); \ } while (0) #define HFI_BUFFER_LINE_H265E(_size, frame_width, frame_height, is_ten_bit, \ num_vpp_pipes) \ - do \ - { \ + do { \ HFI_BUFFER_LINE_ENC(_size, frame_width, frame_height, \ is_ten_bit, num_vpp_pipes, 32, HFI_CODEC_ENCODE_HEVC); \ } while (0) #define HFI_BUFFER_COMV_ENC(_size, frame_width, frame_height, lcu_size, \ num_recon, standard) \ - do \ - { \ + do { \ HFI_U32 size_colloc_mv = 0, size_colloc_rc = 0; \ HFI_U32 mb_width = ((frame_width) + 15) >> 4; \ HFI_U32 mb_height = ((frame_height) + 15) >> 4; \ @@ -1722,23 +1663,20 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ } while (0) #define HFI_BUFFER_COMV_H264E(_size, frame_width, frame_height, num_recon) \ - do \ - { \ + do { \ HFI_BUFFER_COMV_ENC(_size, frame_width, frame_height, 16, \ num_recon, HFI_CODEC_ENCODE_AVC); \ } while (0) #define HFI_BUFFER_COMV_H265E(_size, frame_width, frame_height, num_recon) \ - do \ - { \ + do { \ HFI_BUFFER_COMV_ENC(_size, frame_width, frame_height, 32,\ num_recon, HFI_CODEC_ENCODE_HEVC); \ } while (0) #define HFI_BUFFER_NON_COMV_ENC(_size, frame_width, frame_height, \ num_vpp_pipes_enc, lcu_size, standard) \ - do \ - { \ + do { \ HFI_U32 width_in_lcus = 0, height_in_lcus = 0, \ frame_width_coded = 0, frame_height_coded = 0, \ num_lcu_in_frame = 0, num_lcumb = 0; \ @@ -1766,23 +1704,20 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define HFI_BUFFER_NON_COMV_H264E(_size, frame_width, frame_height, \ num_vpp_pipes_enc) \ - do \ - { \ + do { \ HFI_BUFFER_NON_COMV_ENC(_size, frame_width, frame_height, \ num_vpp_pipes_enc, 16, HFI_CODEC_ENCODE_AVC); \ } while (0) #define HFI_BUFFER_NON_COMV_H265E(_size, frame_width, frame_height, \ num_vpp_pipes_enc) \ - do \ - { \ + do { \ HFI_BUFFER_NON_COMV_ENC(_size, frame_width, frame_height, \ num_vpp_pipes_enc, 32, HFI_CODEC_ENCODE_HEVC); \ } while (0) #define SIZE_ENC_REF_BUFFER(size, frame_width, frame_height) \ - do \ - { \ + do { \ HFI_U32 u_buffer_width = 0, u_buffer_height = 0, \ u_chroma_buffer_height = 0; \ u_buffer_height = HFI_ALIGN(frame_height, \ @@ -1797,8 +1732,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ } while (0) #define SIZE_ENC_TEN_BIT_REF_BUFFER(size, frame_width, frame_height) \ - do \ - { \ + do { \ HFI_U32 ref_buf_height = 0, ref_luma_stride_in_bytes = 0, \ u_ref_stride = 0, luma_size = 0, ref_chrm_height_in_bytes = 0, \ chroma_size = 0, ref_buf_size = 0; \ @@ -1824,8 +1758,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ } while (0) #define HFI_BUFFER_DPB_ENC(_size, frame_width, frame_height, is_ten_bit) \ - do \ - { \ + do { \ HFI_U32 metadata_stride, metadata_buf_height, meta_size_y, \ meta_size_c; \ HFI_U32 ten_bit_ref_buf_size = 0, ref_buf_size = 0; \ @@ -1865,20 +1798,17 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ } while (0) #define HFI_BUFFER_DPB_H264E(_size, frame_width, frame_height) \ - do \ - { \ + do { \ HFI_BUFFER_DPB_ENC(_size, frame_width, frame_height, 0); \ } while (0) #define HFI_BUFFER_DPB_H265E(_size, frame_width, frame_height, is_ten_bit) \ - do \ - { \ + do { \ HFI_BUFFER_DPB_ENC(_size, frame_width, frame_height, is_ten_bit); \ } while (0) #define HFI_BUFFER_VPSS_ENC(vpss_size, dswidth, dsheight, ds_enable, blur, is_ten_bit) \ - do \ - { \ + do { \ vpss_size = 0; \ if (ds_enable || blur) \ { \ diff --git a/driver/variant/iris3/src/msm_vidc_iris3.c b/driver/variant/iris3/src/msm_vidc_iris3.c index 60335eeded..42e31305df 100644 --- a/driver/variant/iris3/src/msm_vidc_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_iris3.c @@ -1023,7 +1023,7 @@ int msm_vidc_adjust_bitrate_boost_iris3(void *instance, struct v4l2_ctrl *ctrl) } frame_rate = inst->capabilities[FRAME_RATE].value >> 16; - f= &inst->fmts[OUTPUT_PORT]; + f = &inst->fmts[OUTPUT_PORT]; width = f->fmt.pix_mp.width; height = f->fmt.pix_mp.height; diff --git a/driver/variant/iris3/src/msm_vidc_power_iris3.c b/driver/variant/iris3/src/msm_vidc_power_iris3.c index bb85c20065..9338d3d273 100644 --- a/driver/variant/iris3/src/msm_vidc_power_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_power_iris3.c @@ -260,7 +260,7 @@ static int msm_vidc_init_codec_input_bus(struct msm_vidc_inst *inst, struct vidc {"frame_rate", "%d", codec_input->frame_rate}, {"frame_width", "%d", codec_input->frame_width}, {"frame_height", "%d", codec_input->frame_height}, - {"work_mode","%d", d->work_mode}, + {"work_mode", "%d", d->work_mode}, {"encoder_or_decode", "%d", inst->domain}, {"chipset_gen", "%d", codec_input->chipset_gen}, {"codec_input", "%d", codec_input->codec}, diff --git a/driver/variant/iris33/inc/hfi_buffer_iris33.h b/driver/variant/iris33/inc/hfi_buffer_iris33.h index 81a168df30..9588687133 100644 --- a/driver/variant/iris33/inc/hfi_buffer_iris33.h +++ b/driver/variant/iris33/inc/hfi_buffer_iris33.h @@ -90,8 +90,7 @@ typedef HFI_U32 HFI_BOOL; uv_buffer_height_multiple, y_metadata_stride_multiple, \ y_metadata_buffer_height_multiple, \ uv_metadata_stride_multiple, uv_metadata_buffer_height_multiple, binterlace) \ - do \ - { \ + do { \ HFI_U32 y_buf_size, uv_buf_size, y_meta_size, uv_meta_size; \ HFI_U32 stride, _height; \ HFI_U32 half_height = (frame_height + 1) >> 1; \ @@ -159,8 +158,7 @@ typedef HFI_U32 HFI_BOOL; #define HFI_YUV420_TP10_UBWC_CALC_BUF_SIZE(buf_size, y_stride, y_buf_height, \ uv_stride, uv_buf_height, y_md_stride, y_md_height, uv_md_stride, \ uv_md_height)\ - do \ - { \ + do { \ HFI_U32 y_data_size, uv_data_size, y_md_size, uv_md_size; \ HFI_YUV420_TP10_UBWC_CALC_Y_BUF_SIZE(y_data_size, y_stride,\ y_buf_height); \ @@ -191,8 +189,7 @@ typedef HFI_U32 HFI_BOOL; #define HFI_YUV420_P010_CALC_BUF_SIZE(buf_size, y_data_size, y_stride, \ y_buf_height, uv_data_size, uv_stride, uv_buf_height) \ - do \ - { \ + do { \ y_data_size = HFI_ALIGN(y_stride * y_buf_height, \ HFI_ALIGNMENT_4096);\ uv_data_size = HFI_ALIGN(uv_stride * uv_buf_height, \ @@ -292,8 +289,7 @@ typedef HFI_U32 HFI_BOOL; #define MAX_TILE_COLUMNS 32 #define SIZE_VPSS_LB(Size, frame_width, frame_height, num_vpp_pipes) \ - do \ - { \ + do { \ HFI_U32 vpss_4tap_top_buffer_size, vpss_div2_top_buffer_size, \ vpss_4tap_left_buffer_size, vpss_div2_left_buffer_size; \ HFI_U32 opb_wr_top_line_luma_buffer_size, \ @@ -367,8 +363,7 @@ typedef HFI_U32 HFI_BOOL; (NUM_HW_PIC_BUF * size_per_buf) #define SIZE_H264D_BSE_CMD_BUF(_size, frame_width, frame_height) \ - do \ - { \ + do { \ HFI_U32 _height = HFI_ALIGN(frame_height, \ BUFFER_ALIGNMENT_32_BYTES); \ _size = MIN((((_height + 15) >> 4) * 48), H264D_MAX_SLICE) *\ @@ -376,8 +371,7 @@ typedef HFI_U32 HFI_BOOL; } while (0) #define SIZE_H264D_VPP_CMD_BUF(_size, frame_width, frame_height) \ - do \ - { \ + do { \ HFI_U32 _height = HFI_ALIGN(frame_height, \ BUFFER_ALIGNMENT_32_BYTES); \ _size = MIN((((_height + 15) >> 4) * 48), H264D_MAX_SLICE) * \ @@ -387,8 +381,7 @@ typedef HFI_U32 HFI_BOOL; #define HFI_BUFFER_COMV_H264D(coMV_size, frame_width, \ frame_height, _comv_bufcount) \ - do \ - { \ + do { \ HFI_U32 frame_width_in_mbs = ((frame_width + 15) >> 4); \ HFI_U32 frame_height_in_mbs = ((frame_height + 15) >> 4); \ HFI_U32 col_mv_aligned_width = (frame_width_in_mbs << 7); \ @@ -419,8 +412,7 @@ typedef HFI_U32 HFI_BOOL; #define HFI_BUFFER_NON_COMV_H264D(_size, frame_width, frame_height, \ num_vpp_pipes) \ - do \ - { \ + do { \ HFI_U32 _size_bse, _size_vpp; \ SIZE_H264D_BSE_CMD_BUF(_size_bse, frame_width, frame_height); \ SIZE_H264D_VPP_CMD_BUF(_size_vpp, frame_width, frame_height); \ @@ -433,8 +425,7 @@ typedef HFI_U32 HFI_BOOL; #define HFI_BUFFER_LINE_H264D(_size, frame_width, frame_height, \ is_opb, num_vpp_pipes) \ - do \ - { \ + do { \ HFI_U32 vpss_lb_size = 0; \ _size = HFI_ALIGN(SIZE_H264D_LB_FE_TOP_DATA(frame_width, \ frame_height), VENUS_DMA_ALIGNMENT) + \ @@ -470,8 +461,7 @@ typedef HFI_U32 HFI_BOOL; #define SIZE_H264D_HW_BIN_BUFFER(_size, frame_width, frame_height, \ delay, num_vpp_pipes) \ - do \ - { \ + do { \ HFI_U32 size_yuv, size_bin_hdr, size_bin_res; \ size_yuv = ((frame_width * frame_height) <= \ BIN_BUFFER_THRESHOLD) ?\ @@ -492,8 +482,7 @@ typedef HFI_U32 HFI_BOOL; #define HFI_BUFFER_BIN_H264D(_size, frame_width, frame_height, is_interlaced, \ delay, num_vpp_pipes) \ - do \ - { \ + do { \ HFI_U32 n_aligned_w = HFI_ALIGN(frame_width, \ BUFFER_ALIGNMENT_16_BYTES);\ HFI_U32 n_aligned_h = HFI_ALIGN(frame_height, \ @@ -570,8 +559,7 @@ typedef HFI_U32 HFI_BOOL; SIZE_H264D_QP(frame_width, frame_height) #define SIZE_H265D_BSE_CMD_BUF(_size, frame_width, frame_height)\ - do \ - { \ + do { \ _size = HFI_ALIGN(((HFI_ALIGN(frame_width, \ LCU_MAX_SIZE_PELS) / LCU_MIN_SIZE_PELS) * \ (HFI_ALIGN(frame_height, LCU_MAX_SIZE_PELS) /\ @@ -581,8 +569,7 @@ typedef HFI_U32 HFI_BOOL; } while (0) #define SIZE_H265D_VPP_CMD_BUF(_size, frame_width, frame_height) \ - do \ - { \ + do { \ _size = HFI_ALIGN(((HFI_ALIGN(frame_width, LCU_MAX_SIZE_PELS) /\ LCU_MIN_SIZE_PELS) * (HFI_ALIGN(frame_height, \ LCU_MAX_SIZE_PELS) / LCU_MIN_SIZE_PELS)) * \ @@ -598,8 +585,7 @@ typedef HFI_U32 HFI_BOOL; #define HFI_BUFFER_COMV_H265D(_size, frame_width, frame_height, \ _comv_bufcount) \ - do \ - { \ + do { \ _size = HFI_ALIGN(((((frame_width + 15) >> 4) * \ ((frame_height + 15) >> 4)) << 8), \ BUFFER_ALIGNMENT_512_BYTES); \ @@ -611,8 +597,7 @@ typedef HFI_U32 HFI_BOOL; #define HFI_BUFFER_NON_COMV_H265D(_size, frame_width, frame_height, \ num_vpp_pipes) \ - do \ - { \ + do { \ HFI_U32 _size_bse, _size_vpp; \ SIZE_H265D_BSE_CMD_BUF(_size_bse, frame_width, \ frame_height); \ @@ -635,8 +620,7 @@ typedef HFI_U32 HFI_BOOL; #define HFI_BUFFER_LINE_H265D(_size, frame_width, frame_height, \ is_opb, num_vpp_pipes) \ - do \ - { \ + do { \ HFI_U32 vpss_lb_size = 0; \ _size = HFI_ALIGN(SIZE_H265D_LB_FE_TOP_DATA(frame_width, \ frame_height), VENUS_DMA_ALIGNMENT) + \ @@ -673,8 +657,7 @@ typedef HFI_U32 HFI_BOOL; #define SIZE_H265D_HW_BIN_BUFFER(_size, frame_width, frame_height, \ delay, num_vpp_pipes) \ - do \ - { \ + do { \ HFI_U32 size_yuv, size_bin_hdr, size_bin_res; \ size_yuv = ((frame_width * frame_height) <= \ BIN_BUFFER_THRESHOLD) ? \ @@ -696,8 +679,7 @@ typedef HFI_U32 HFI_BOOL; #define HFI_BUFFER_BIN_H265D(_size, frame_width, frame_height, \ is_interlaced, delay, num_vpp_pipes) \ - do \ - { \ + do { \ HFI_U32 n_aligned_w = HFI_ALIGN(frame_width, \ BUFFER_ALIGNMENT_16_BYTES); \ HFI_U32 n_aligned_h = HFI_ALIGN(frame_height, \ @@ -766,8 +748,7 @@ typedef HFI_U32 HFI_BOOL; SIZE_H264D_QP(frame_width, frame_height) #define HFI_IRIS3_VP9D_LB_SIZE(_size, frame_width, frame_height, num_vpp_pipes)\ - do \ - { \ + do { \ _size = HFI_ALIGN(SIZE_VPXD_LB_FE_LEFT_CTRL(frame_width, \ frame_height),VENUS_DMA_ALIGNMENT) * num_vpp_pipes + \ HFI_ALIGN(SIZE_VPXD_LB_SE_LEFT_CTRL(frame_width, frame_height),\ @@ -790,14 +771,12 @@ typedef HFI_U32 HFI_BOOL; #define HFI_BUFFER_LINE_VP9D(_size, frame_width, frame_height, \ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ - do \ - { \ + do { \ HFI_U32 _lb_size = 0; \ HFI_U32 vpss_lb_size = 0; \ HFI_IRIS3_VP9D_LB_SIZE(_lb_size, frame_width, frame_height,\ num_vpp_pipes); \ - if (is_opb) \ - { \ + if (is_opb) { \ SIZE_VPSS_LB(vpss_lb_size, frame_width, frame_height, \ num_vpp_pipes); \ } \ @@ -810,13 +789,11 @@ typedef HFI_U32 HFI_BOOL; #define HFI_BUFFER_BIN_VP9D(_size, frame_width, frame_height, \ is_interlaced, num_vpp_pipes) \ - do \ - { \ + do { \ HFI_U32 _size_yuv = HFI_ALIGN(frame_width, \ BUFFER_ALIGNMENT_16_BYTES) *\ HFI_ALIGN(frame_height, BUFFER_ALIGNMENT_16_BYTES) * 3 / 2; \ - if (!is_interlaced) \ - { \ + if (!is_interlaced) { \ _size = HFI_ALIGN(((MAX(_size_yuv, \ ((BIN_BUFFER_THRESHOLD * 3) >> 1)) * \ VPX_DECODER_FRAME_BIN_HDR_BUDGET_RATIO * \ @@ -828,10 +805,8 @@ typedef HFI_U32 HFI_BOOL; VENUS_DMA_ALIGNMENT); \ _size = _size * num_vpp_pipes; \ } \ - else \ - { \ + else \ _size = 0; \ - } \ } while (0) #define VP9_NUM_FRAME_INFO_BUF 32 @@ -894,7 +869,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define HFI_BUFFER_COMV_AV1D(_size, frame_width, frame_height, \ _comv_bufcount) \ - do { \ + do { \ _size = 2 * HFI_ALIGN(MAX(((frame_width + 63) / 64) * \ ((frame_height + 63) / 64) * 512, \ ((frame_width + 127) / 128) * \ @@ -964,24 +939,21 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ SIZE_H264D_QP(frame_width, frame_height) #define SIZE_AV1D_LB_OPB_WR1_NV12_UBWC(_size, frame_width, frame_height) \ - do \ - { \ + do { \ HFI_U32 y_width, y_width_a = 128; \ HFI_NV12_IL_CALC_Y_STRIDE(y_width, frame_width, y_width_a); \ _size = (256 * ((y_width + 31) / 32 + (AV1D_MAX_TILE_COLS - 1))); \ } while (0) #define SIZE_AV1D_LB_OPB_WR1_TP10_UBWC(_size, frame_width, frame_height) \ - do \ - { \ + do { \ HFI_U32 y_width, y_width_a = 256; \ HFI_YUV420_TP10_CALC_Y_STRIDE(y_width, frame_width, y_width_a); \ _size = (256 * ((y_width + 47) / 48 + (AV1D_MAX_TILE_COLS - 1))); \ } while (0) #define SIZE_AV1D_IBC_NV12_UBWC(_size, frame_width, frame_height) \ - do \ - { \ + do { \ HFI_U32 y_width_a = 128, y_height_a = 32; \ HFI_U32 uv_width_a = 128, uv_height_a = 32; \ HFI_U32 yBufSize, uvBufSize, y_width, y_height, uv_width, uv_height; \ @@ -1017,8 +989,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ } while (0) #define SIZE_AV1D_IBC_TP10_UBWC(_size, frame_width, frame_height) \ - do \ - { \ + do { \ HFI_U32 y_width_a = 256, y_height_a = 16, \ uv_width_a = 256, uv_height_a = 16; \ HFI_U32 yBufSize, uvBufSize, y_width, y_height, uv_width, uv_height; \ @@ -1056,8 +1027,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define HFI_BUFFER_LINE_AV1D(_size, frame_width, frame_height, isOPB, \ num_vpp_pipes) \ - do \ - { \ + do { \ HFI_U32 vpssLBSize, opbwr1BufSize, opbwr8, opbwr10; \ _size = HFI_ALIGN(SIZE_AV1D_LB_FE_TOP_DATA(frame_width, frame_height), \ VENUS_DMA_ALIGNMENT) + \ @@ -1092,7 +1062,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ } while (0) #define HFI_BUFFER_IBC_AV1D(_size, frame_width, frame_height) \ - do { \ + do { \ HFI_U32 ibc8, ibc10; \ SIZE_AV1D_IBC_NV12_UBWC(ibc8, frame_width, frame_height); \ SIZE_AV1D_IBC_TP10_UBWC(ibc10, frame_width, frame_height); \ @@ -1105,8 +1075,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ * but limit buffer size for high resolution */ #define SIZE_AV1D_HW_BIN_BUFFER(_size, frame_width, frame_height, delay, \ num_vpp_pipes) \ - do \ - { \ + do { \ HFI_U32 size_yuv, size_bin_hdr, size_bin_res; \ size_yuv = ((frame_width * frame_height) <= BIN_BUFFER_THRESHOLD) ? \ ((BIN_BUFFER_THRESHOLD * 3) >> 1) : \ @@ -1126,8 +1095,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define HFI_BUFFER_BIN_AV1D(_size, frame_width, frame_height, isInterlaced, \ delay, num_vpp_pipes) \ - do \ - { \ + do { \ HFI_U32 nAlignedW = HFI_ALIGN(frame_width, BUFFER_ALIGNMENT_16_BYTES); \ HFI_U32 nAlignedH = HFI_ALIGN(frame_height, BUFFER_ALIGNMENT_16_BYTES); \ if (!isInterlaced) \ @@ -1159,8 +1127,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ AV1D_SIZE_BSE_COL_MV_128x128)) #define HFI_BUFFER_PERSIST_AV1D(_size, max_width, max_height, total_ref_count) \ - do \ - { \ + do { \ HFI_U32 comv_size; \ HFI_BUFFER_COMV_AV1D(comv_size, max_width, max_height, total_ref_count); \ _size = \ @@ -1175,8 +1142,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define HFI_BUFFER_BITSTREAM_ENC(size, frame_width, frame_height, \ rc_type, is_ten_bit) \ - do \ - { \ + do { \ HFI_U32 aligned_width, aligned_height, bitstream_size, yuv_size; \ aligned_width = HFI_ALIGN(frame_width, 32); \ aligned_height = HFI_ALIGN(frame_height, 32); \ @@ -1210,8 +1176,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define HFI_IRIS3_ENC_TILE_SIZE_INFO(tile_size, tile_count, last_tile_size, \ frame_width_coded, codec_standard) \ - do \ - { \ + do { \ HFI_U32 without_tile_enc_width; \ HFI_U32 min_tile_size = 352, fixed_tile_width = 960; \ without_tile_enc_width = min_tile_size + fixed_tile_width; \ @@ -1237,8 +1202,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define HFI_IRIS3_ENC_MB_BASED_MULTI_SLICE_COUNT(total_slice_count, frame_width, frame_height, \ codec_standard, multi_slice_max_mb_count) \ - do \ - { \ + do { \ HFI_U32 tile_size, tile_count, last_tile_size, \ slice_count_per_tile, slice_count_in_last_tile; \ HFI_U32 mbs_in_one_tile, mbs_in_last_tile; \ @@ -1267,8 +1231,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ } while (0) #define SIZE_ROI_METADATA_ENC(size_roi, frame_width, frame_height, lcu_size)\ - do \ - { \ + do { \ HFI_U32 width_in_lcus = 0, height_in_lcus = 0, n_shift = 0; \ while (lcu_size && !(lcu_size & 0x1)) \ { \ @@ -1283,8 +1246,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define HFI_BUFFER_INPUT_METADATA_ENC(size, frame_width, frame_height, \ is_roi_enabled, lcu_size) \ - do \ - { \ + do { \ HFI_U32 roi_size = 0; \ if (is_roi_enabled) \ { \ @@ -1297,23 +1259,20 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define HFI_BUFFER_INPUT_METADATA_H264E(size_metadata, frame_width, \ frame_height, is_roi_enabled) \ - do \ - { \ + do { \ HFI_BUFFER_INPUT_METADATA_ENC(size_metadata, frame_width, \ frame_height, is_roi_enabled, 16); \ }while (0) #define HFI_BUFFER_INPUT_METADATA_H265E(size_metadata, frame_width, \ frame_height, is_roi_enabled) \ - do \ - { \ + do { \ HFI_BUFFER_INPUT_METADATA_ENC(size_metadata, frame_width, \ frame_height, is_roi_enabled, 32); \ } while (0) #define HFI_BUFFER_ARP_ENC(size) \ - do \ - { \ + do { \ size = 204800; \ } while (0) @@ -1333,8 +1292,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define HFI_IRIS3_ENC_RECON_BUF_COUNT(num_recon, n_bframe, ltr_count, \ _total_hp_layers, _total_hb_layers, hybrid_hp, codec_standard) \ - do \ - { \ + do { \ HFI_U32 num_ref = 1; \ if (n_bframe) \ num_ref = 2; \ @@ -1364,8 +1322,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define SIZE_BIN_BITSTREAM_ENC(_size, rc_type, frame_width, frame_height, \ work_mode, lcu_size, profile) \ - do \ - { \ + do { \ HFI_U32 size_aligned_width = 0, size_aligned_height = 0; \ HFI_U32 bitstream_size_eval = 0; \ size_aligned_width = HFI_ALIGN((frame_width), lcu_size); \ @@ -1411,8 +1368,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define SIZE_ENC_SINGLE_PIPE(size, rc_type, bitbin_size, num_vpp_pipes, \ frame_width, frame_height, lcu_size) \ - do \ - { \ + do { \ HFI_U32 size_single_pipe_eval = 0, sao_bin_buffer_size = 0, \ _padded_bin_sz = 0; \ HFI_U32 size_aligned_width = 0, size_aligned_height = 0; \ @@ -1448,8 +1404,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define HFI_BUFFER_BIN_ENC(_size, rc_type, frame_width, frame_height, lcu_size, \ work_mode, num_vpp_pipes, profile, ring_buf_count) \ - do \ - { \ + do { \ HFI_U32 bitstream_size = 0, total_bitbin_buffers = 0, \ size_single_pipe = 0, bitbin_size = 0; \ SIZE_BIN_BITSTREAM_ENC(bitstream_size, rc_type, frame_width, \ @@ -1483,16 +1438,14 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define HFI_BUFFER_BIN_H264E(_size, rc_type, frame_width, frame_height, \ work_mode, num_vpp_pipes, profile, ring_buf_count) \ - do \ - { \ + do { \ HFI_BUFFER_BIN_ENC(_size, rc_type, frame_width, frame_height, 16, \ work_mode, num_vpp_pipes, profile, ring_buf_count); \ } while (0) #define HFI_BUFFER_BIN_H265E(_size, rc_type, frame_width, frame_height, \ work_mode, num_vpp_pipes, profile, ring_buf_count) \ - do \ - { \ + do { \ HFI_BUFFER_BIN_ENC(_size, rc_type, frame_width, frame_height, 32,\ work_mode, num_vpp_pipes, profile, ring_buf_count); \ } while (0) @@ -1505,8 +1458,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ HFI_ALIGN(frame_width_coded, VENUS_DMA_ALIGNMENT) #define SIZE_LINEBUFF_DATA(_size, is_ten_bit, frame_width_coded) \ - do \ - { \ + do { \ _size = is_ten_bit ? (((((10 * (frame_width_coded) +\ 1024) + (VENUS_DMA_ALIGNMENT - 1)) & \ (~(VENUS_DMA_ALIGNMENT - 1))) * 1) + \ @@ -1522,8 +1474,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define SIZE_LEFT_LINEBUFF_CTRL(_size, standard, frame_height_coded, \ num_vpp_pipes_enc) \ - do \ - { \ + do { \ _size = (standard == HFI_CODEC_ENCODE_HEVC) ? \ (((frame_height_coded) + \ (BUF_SIZE_ALIGN_32)) / BUF_SIZE_ALIGN_32 * 4 * 16) : \ @@ -1539,8 +1490,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define SIZE_LEFT_LINEBUFF_RECON_PIX(_size, is_ten_bit, frame_height_coded, \ num_vpp_pipes_enc) \ - do \ - { \ + do { \ _size = (((is_ten_bit + 1) * 2 * (frame_height_coded) + \ VENUS_DMA_ALIGNMENT) + \ (VENUS_DMA_ALIGNMENT << (num_vpp_pipes_enc - 1)) - 1) & \ @@ -1548,8 +1498,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ } while (0) #define SIZE_TOP_LINEBUFF_CTRL_FE(_size, frame_width_coded, standard) \ - do \ - { \ + do { \ _size = (standard == HFI_CODEC_ENCODE_HEVC) ? (64 * \ ((frame_width_coded) >> 5)) : (VENUS_DMA_ALIGNMENT + 16 * \ ((frame_width_coded) >> 4)); \ @@ -1564,8 +1513,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define SIZE_LEFT_LINEBUFF_METADATA_RECON_Y(_size, frame_height_coded, \ is_ten_bit, num_vpp_pipes_enc) \ - do \ - { \ + do { \ _size = ((VENUS_DMA_ALIGNMENT + 64 * ((frame_height_coded) / \ (8 * (is_ten_bit ? 4 : 8))))); \ _size = HFI_ALIGN(_size, VENUS_DMA_ALIGNMENT); \ @@ -1574,8 +1522,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define SIZE_LEFT_LINEBUFF_METADATA_RECON_UV(_size, frame_height_coded, \ is_ten_bit, num_vpp_pipes_enc) \ - do \ - { \ + do { \ _size = ((VENUS_DMA_ALIGNMENT + 64 * ((frame_height_coded) / \ (4 * (is_ten_bit ? 4 : 8))))); \ _size = HFI_ALIGN(_size, VENUS_DMA_ALIGNMENT); \ @@ -1583,8 +1530,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ } while (0) #define SIZE_LINEBUFF_RECON_PIX(_size, is_ten_bit, frame_width_coded) \ - do \ - { \ + do { \ _size = ((is_ten_bit ? 3 : 2) * (frame_width_coded)); \ _size = HFI_ALIGN(_size, VENUS_DMA_ALIGNMENT); \ } while (0) @@ -1594,8 +1540,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define SIZE_FRAME_RC_BUF_SIZE(_size, standard, frame_height_coded, \ num_vpp_pipes_enc) \ - do \ - { \ + do { \ _size = (standard == HFI_CODEC_ENCODE_HEVC) ? (256 + 16 * \ (14 + ((((frame_height_coded) >> 5) + 7) >> 3))) : \ (256 + 16 * (14 + ((((frame_height_coded) >> 4) + 7) >> 3))); \ @@ -1635,8 +1580,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define HFI_BUFFER_LINE_ENC(_size, frame_width, frame_height, is_ten_bit, \ num_vpp_pipes_enc, lcu_size, standard) \ - do \ - { \ + do { \ HFI_U32 width_in_lcus = 0, height_in_lcus = 0, \ frame_width_coded = 0, frame_height_coded = 0; \ HFI_U32 line_buff_data_size = 0, left_line_buff_ctrl_size = 0, \ @@ -1683,24 +1627,21 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define HFI_BUFFER_LINE_H264E(_size, frame_width, frame_height, is_ten_bit, \ num_vpp_pipes) \ - do \ - { \ + do { \ HFI_BUFFER_LINE_ENC(_size, frame_width, frame_height, 0, \ num_vpp_pipes, 16, HFI_CODEC_ENCODE_AVC); \ } while (0) #define HFI_BUFFER_LINE_H265E(_size, frame_width, frame_height, is_ten_bit, \ num_vpp_pipes) \ - do \ - { \ + do { \ HFI_BUFFER_LINE_ENC(_size, frame_width, frame_height, \ is_ten_bit, num_vpp_pipes, 32, HFI_CODEC_ENCODE_HEVC); \ } while (0) #define HFI_BUFFER_COMV_ENC(_size, frame_width, frame_height, lcu_size, \ num_recon, standard) \ - do \ - { \ + do { \ HFI_U32 size_colloc_mv = 0, size_colloc_rc = 0; \ HFI_U32 mb_width = ((frame_width) + 15) >> 4; \ HFI_U32 mb_height = ((frame_height) + 15) >> 4; \ @@ -1722,23 +1663,20 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ } while (0) #define HFI_BUFFER_COMV_H264E(_size, frame_width, frame_height, num_recon) \ - do \ - { \ + do { \ HFI_BUFFER_COMV_ENC(_size, frame_width, frame_height, 16, \ num_recon, HFI_CODEC_ENCODE_AVC); \ } while (0) #define HFI_BUFFER_COMV_H265E(_size, frame_width, frame_height, num_recon) \ - do \ - { \ + do { \ HFI_BUFFER_COMV_ENC(_size, frame_width, frame_height, 32,\ num_recon, HFI_CODEC_ENCODE_HEVC); \ } while (0) #define HFI_BUFFER_NON_COMV_ENC(_size, frame_width, frame_height, \ num_vpp_pipes_enc, lcu_size, standard) \ - do \ - { \ + do { \ HFI_U32 width_in_lcus = 0, height_in_lcus = 0, \ frame_width_coded = 0, frame_height_coded = 0, \ num_lcu_in_frame = 0, num_lcumb = 0; \ @@ -1766,8 +1704,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define HFI_BUFFER_NON_COMV_H264E(_size, frame_width, frame_height, \ num_vpp_pipes_enc) \ - do \ - { \ + do { \ HFI_BUFFER_NON_COMV_ENC(_size, frame_width, frame_height, \ num_vpp_pipes_enc, 16, HFI_CODEC_ENCODE_AVC); \ } while (0) @@ -1775,16 +1712,14 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define SIZE_ONE_SLICE_BUF 256 #define HFI_BUFFER_NON_COMV_H265E(_size, frame_width, frame_height, \ num_vpp_pipes_enc) \ - do \ - { \ + do { \ HFI_BUFFER_NON_COMV_ENC(_size, frame_width, frame_height, \ num_vpp_pipes_enc, 32, HFI_CODEC_ENCODE_HEVC); \ _size += SIZE_ONE_SLICE_BUF; \ } while (0) #define SIZE_ENC_REF_BUFFER(size, frame_width, frame_height) \ - do \ - { \ + do { \ HFI_U32 u_buffer_width = 0, u_buffer_height = 0, \ u_chroma_buffer_height = 0; \ u_buffer_height = HFI_ALIGN(frame_height, \ @@ -1799,8 +1734,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ } while (0) #define SIZE_ENC_TEN_BIT_REF_BUFFER(size, frame_width, frame_height) \ - do \ - { \ + do { \ HFI_U32 ref_buf_height = 0, ref_luma_stride_in_bytes = 0, \ u_ref_stride = 0, luma_size = 0, ref_chrm_height_in_bytes = 0, \ chroma_size = 0, ref_buf_size = 0; \ @@ -1826,8 +1760,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ } while (0) #define HFI_BUFFER_DPB_ENC(_size, frame_width, frame_height, is_ten_bit) \ - do \ - { \ + do { \ HFI_U32 metadata_stride, metadata_buf_height, meta_size_y, \ meta_size_c; \ HFI_U32 ten_bit_ref_buf_size = 0, ref_buf_size = 0; \ @@ -1867,20 +1800,17 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ } while (0) #define HFI_BUFFER_DPB_H264E(_size, frame_width, frame_height) \ - do \ - { \ + do { \ HFI_BUFFER_DPB_ENC(_size, frame_width, frame_height, 0); \ } while (0) #define HFI_BUFFER_DPB_H265E(_size, frame_width, frame_height, is_ten_bit) \ - do \ - { \ + do { \ HFI_BUFFER_DPB_ENC(_size, frame_width, frame_height, is_ten_bit); \ } while (0) #define HFI_BUFFER_VPSS_ENC(vpss_size, dswidth, dsheight, ds_enable, blur, is_ten_bit) \ - do \ - { \ + do { \ vpss_size = 0; \ if (ds_enable || blur) \ { \ diff --git a/driver/variant/iris33/src/msm_vidc_iris33.c b/driver/variant/iris33/src/msm_vidc_iris33.c index 1bd769e010..6569413b9f 100644 --- a/driver/variant/iris33/src/msm_vidc_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_iris33.c @@ -1272,7 +1272,7 @@ int msm_vidc_adjust_bitrate_boost_iris33(void *instance, struct v4l2_ctrl *ctrl) } frame_rate = inst->capabilities[FRAME_RATE].value >> 16; - f= &inst->fmts[OUTPUT_PORT]; + f = &inst->fmts[OUTPUT_PORT]; width = f->fmt.pix_mp.width; height = f->fmt.pix_mp.height; diff --git a/driver/variant/iris33/src/msm_vidc_power_iris33.c b/driver/variant/iris33/src/msm_vidc_power_iris33.c index 812f435bc0..f0b369ae69 100644 --- a/driver/variant/iris33/src/msm_vidc_power_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_power_iris33.c @@ -337,7 +337,7 @@ static int msm_vidc_init_codec_input_bus(struct msm_vidc_inst *inst, struct vidc {"frame_rate", "%d", codec_input->frame_rate}, {"frame_width", "%d", codec_input->frame_width}, {"frame_height", "%d", codec_input->frame_height}, - {"work_mode","%d", d->work_mode}, + {"work_mode", "%d", d->work_mode}, {"encoder_or_decode", "%d", inst->domain}, {"chipset_gen", "%d", codec_input->chipset_gen}, {"codec_input", "%d", codec_input->codec}, From 5bbe9a0002d1daa6859265f2012e504cfd296ba0 Mon Sep 17 00:00:00 2001 From: Ashish Patil Date: Tue, 30 May 2023 10:59:14 -0700 Subject: [PATCH 0925/1061] video: driver: remove private controls from interface file - These private controls are added by driver clients in their respective modules Change-Id: Ie8d3dbee73e481d3651a6d5849ae7859bf5d42b0 --- include/uapi/vidc/media/v4l2_vidc_extensions.h | 16 ---------------- 1 file changed, 16 deletions(-) diff --git a/include/uapi/vidc/media/v4l2_vidc_extensions.h b/include/uapi/vidc/media/v4l2_vidc_extensions.h index b433457d9c..781e0d80d2 100644 --- a/include/uapi/vidc/media/v4l2_vidc_extensions.h +++ b/include/uapi/vidc/media/v4l2_vidc_extensions.h @@ -29,20 +29,4 @@ #define V4L2_MPEG_MSM_VIDC_DISABLE 0 #define V4L2_MPEG_MSM_VIDC_ENABLE 1 -#define V4L2_CID_MPEG_VIDC_SECURE (V4L2_CID_MPEG_VIDC_BASE + 0x1) -#define V4L2_CID_MPEG_VIDC_LOWLATENCY_REQUEST (V4L2_CID_MPEG_VIDC_BASE + 0x3) -#define V4L2_CID_MPEG_VIDC_TIME_DELTA_BASED_RC (V4L2_CID_MPEG_VIDC_BASE + 0xD) -#define V4L2_CID_MPEG_VIDC_PRIORITY (V4L2_CID_MPEG_VIDC_BASE + 0x2A) - -/* Encoder Complexity control */ -#define V4L2_CID_MPEG_VIDC_VENC_COMPLEXITY \ - (V4L2_CID_MPEG_VIDC_BASE + 0x2F) - -/* Decoder Max Number of Reorder Frames */ -#define V4L2_CID_MPEG_VIDC_METADATA_MAX_NUM_REORDER_FRAMES \ - (V4L2_CID_MPEG_VIDC_BASE + 0x30) - -#define V4L2_CID_MPEG_VIDC_VUI_TIMING_INFO \ - (V4L2_CID_MPEG_VIDC_BASE + 0x43) - #endif From 7d25fa161bdc327b314ad12ba87e400bcba3e3d5 Mon Sep 17 00:00:00 2001 From: Ankush Mitra Date: Wed, 31 May 2023 19:20:20 +0530 Subject: [PATCH 0926/1061] video: driver: changing "foo* bar" to "foo *bar" This change will resolve this checker err from all directory. Change-Id: I7b7b3af554c97fef9d81210fdf8984d2a53facbc Signed-off-by: Ankush Mitra --- .../platform/pineapple/src/msm_vidc_pineapple.c | 2 +- driver/platform/pineapple/src/pineapple.c | 2 +- driver/vidc/inc/hfi_packet.h | 4 ++-- driver/vidc/inc/msm_vdec.h | 4 ++-- driver/vidc/inc/msm_venc.h | 4 ++-- driver/vidc/inc/msm_vidc.h | 4 ++-- driver/vidc/inc/msm_vidc_driver.h | 14 +++++++------- driver/vidc/inc/msm_vidc_inst.h | 2 +- driver/vidc/inc/msm_vidc_power.h | 12 ++++++------ driver/vidc/inc/msm_vidc_v4l2.h | 8 ++++---- driver/vidc/inc/venus_hfi.h | 4 ++-- driver/vidc/src/msm_vdec.c | 6 +++--- driver/vidc/src/msm_venc.c | 10 +++++----- driver/vidc/src/msm_vidc_buffer.c | 2 +- driver/vidc/src/msm_vidc_control.c | 4 ++-- driver/vidc/src/msm_vidc_debug.c | 12 ++++++------ driver/vidc/src/msm_vidc_driver.c | 2 +- driver/vidc/src/msm_vidc_power.c | 16 ++++++++-------- driver/vidc/src/msm_vidc_probe.c | 2 +- 19 files changed, 57 insertions(+), 57 deletions(-) diff --git a/driver/platform/pineapple/src/msm_vidc_pineapple.c b/driver/platform/pineapple/src/msm_vidc_pineapple.c index 2862603b07..035c7cdc2f 100644 --- a/driver/platform/pineapple/src/msm_vidc_pineapple.c +++ b/driver/platform/pineapple/src/msm_vidc_pineapple.c @@ -331,7 +331,7 @@ static int msm_vidc_set_ring_buffer_count_pineapple(void *instance, int rc = 0; struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; struct v4l2_format *output_fmt, *input_fmt; - struct msm_vidc_core* core; + struct msm_vidc_core *core; u32 count = 0, data_size = 0, pixel_count = 0, fps = 0; u32 frame_rate = 0, operating_rate = 0; diff --git a/driver/platform/pineapple/src/pineapple.c b/driver/platform/pineapple/src/pineapple.c index 7a25e18a90..542c192619 100644 --- a/driver/platform/pineapple/src/pineapple.c +++ b/driver/platform/pineapple/src/pineapple.c @@ -230,7 +230,7 @@ static int msm_vidc_set_ring_buffer_count_pineapple(void *instance, int rc = 0; struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; struct v4l2_format *output_fmt, *input_fmt; - struct msm_vidc_core* core; + struct msm_vidc_core *core; u32 count = 0, data_size = 0, pixel_count = 0, fps = 0; u32 frame_rate = 0, operating_rate = 0; diff --git a/driver/vidc/inc/hfi_packet.h b/driver/vidc/inc/hfi_packet.h index cb26b07d17..62756c3d5e 100644 --- a/driver/vidc/inc/hfi_packet.h +++ b/driver/vidc/inc/hfi_packet.h @@ -45,7 +45,7 @@ int hfi_packet_sys_debug_config(struct msm_vidc_core *core, int hfi_packet_session_command(struct msm_vidc_inst *inst, u32 pkt_type, u32 flags, u32 port, u32 session_id, u32 payload_type, void *payload, u32 payload_size); -int hfi_packet_sys_intraframe_powercollapse(struct msm_vidc_core* core, - u8* pkt, u32 pkt_size, u32 enable); +int hfi_packet_sys_intraframe_powercollapse(struct msm_vidc_core *core, + u8 *pkt, u32 pkt_size, u32 enable); #endif // _HFI_PACKET_H_ diff --git a/driver/vidc/inc/msm_vdec.h b/driver/vidc/inc/msm_vdec.h index dbe2ff10eb..3a3b95c233 100644 --- a/driver/vidc/inc/msm_vdec.h +++ b/driver/vidc/inc/msm_vdec.h @@ -18,8 +18,8 @@ int msm_vdec_qbuf(struct msm_vidc_inst *inst, struct vb2_buffer *vb2); int msm_vdec_try_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f); int msm_vdec_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f); int msm_vdec_g_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f); -int msm_vdec_s_selection(struct msm_vidc_inst* inst, struct v4l2_selection* s); -int msm_vdec_g_selection(struct msm_vidc_inst* inst, struct v4l2_selection* s); +int msm_vdec_s_selection(struct msm_vidc_inst *inst, struct v4l2_selection *s); +int msm_vdec_g_selection(struct msm_vidc_inst *inst, struct v4l2_selection *s); int msm_vdec_subscribe_event(struct msm_vidc_inst *inst, const struct v4l2_event_subscription *sub); int msm_vdec_enum_fmt(struct msm_vidc_inst *inst, struct v4l2_fmtdesc *f); diff --git a/driver/vidc/inc/msm_venc.h b/driver/vidc/inc/msm_venc.h index 594236fe0f..895d2f6705 100644 --- a/driver/vidc/inc/msm_venc.h +++ b/driver/vidc/inc/msm_venc.h @@ -21,8 +21,8 @@ int msm_venc_try_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f); int msm_venc_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f); int msm_venc_s_fmt_output(struct msm_vidc_inst *inst, struct v4l2_format *f); int msm_venc_g_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f); -int msm_venc_s_selection(struct msm_vidc_inst* inst, struct v4l2_selection* s); -int msm_venc_g_selection(struct msm_vidc_inst* inst, struct v4l2_selection* s); +int msm_venc_s_selection(struct msm_vidc_inst *inst, struct v4l2_selection *s); +int msm_venc_g_selection(struct msm_vidc_inst *inst, struct v4l2_selection *s); int msm_venc_s_param(struct msm_vidc_inst *inst, struct v4l2_streamparm *s_parm); int msm_venc_g_param(struct msm_vidc_inst *inst, diff --git a/driver/vidc/inc/msm_vidc.h b/driver/vidc/inc/msm_vidc.h index 1cb9e9dd5e..45b5ad29bc 100644 --- a/driver/vidc/inc/msm_vidc.h +++ b/driver/vidc/inc/msm_vidc.h @@ -22,8 +22,8 @@ int msm_vidc_enum_fmt(struct msm_vidc_inst *inst, struct v4l2_fmtdesc *f); int msm_vidc_try_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f); int msm_vidc_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f); int msm_vidc_g_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f); -int msm_vidc_s_selection(struct msm_vidc_inst *inst, struct v4l2_selection* s); -int msm_vidc_g_selection(struct msm_vidc_inst *inst, struct v4l2_selection* s); +int msm_vidc_s_selection(struct msm_vidc_inst *inst, struct v4l2_selection *s); +int msm_vidc_g_selection(struct msm_vidc_inst *inst, struct v4l2_selection *s); int msm_vidc_s_param(struct msm_vidc_inst *inst, struct v4l2_streamparm *sp); int msm_vidc_g_param(struct msm_vidc_inst *inst, struct v4l2_streamparm *sp); int msm_vidc_reqbufs(struct msm_vidc_inst *inst, struct v4l2_requestbuffers *b); diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 4673e1a153..b7c503c888 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -444,7 +444,7 @@ int msm_vidc_session_set_default_header(struct msm_vidc_inst *inst); int msm_vidc_session_streamoff(struct msm_vidc_inst *inst, enum msm_vidc_port_type port); int msm_vidc_session_close(struct msm_vidc_inst *inst); -int msm_vidc_kill_session(struct msm_vidc_inst* inst); +int msm_vidc_kill_session(struct msm_vidc_inst *inst); int msm_vidc_get_inst_capability(struct msm_vidc_inst *inst); int msm_vidc_change_core_state(struct msm_vidc_core *core, enum msm_vidc_core_state request_state, const char *func); @@ -506,7 +506,7 @@ int msm_vidc_queue_deferred_buffers(struct msm_vidc_inst *inst, int msm_vidc_destroy_internal_buffer(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buffer); void msm_vidc_destroy_buffers(struct msm_vidc_inst *inst); -int msm_vidc_flush_buffers(struct msm_vidc_inst* inst, +int msm_vidc_flush_buffers(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type type); int msm_vidc_flush_read_only_buffers(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type type); @@ -541,7 +541,7 @@ int msm_vidc_process_drain_done(struct msm_vidc_inst *inst); int msm_vidc_process_drain_last_flag(struct msm_vidc_inst *inst); int msm_vidc_process_psc_last_flag(struct msm_vidc_inst *inst); int msm_vidc_get_mbs_per_frame(struct msm_vidc_inst *inst); -u32 msm_vidc_get_max_bitrate(struct msm_vidc_inst* inst); +u32 msm_vidc_get_max_bitrate(struct msm_vidc_inst *inst); int msm_vidc_get_fps(struct msm_vidc_inst *inst); int msm_vidc_num_buffers(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type type, enum msm_vidc_buffer_attributes attr); @@ -559,10 +559,10 @@ int msm_vidc_update_meta_port_settings(struct msm_vidc_inst *inst); int msm_vidc_update_buffer_count(struct msm_vidc_inst *inst, u32 port); void msm_vidc_schedule_core_deinit(struct msm_vidc_core *core); bool msm_vidc_is_super_buffer(struct msm_vidc_inst *inst); -int msm_vidc_init_core_caps(struct msm_vidc_core* core); -int msm_vidc_init_instance_caps(struct msm_vidc_core* core); -int msm_vidc_deinit_core_caps(struct msm_vidc_core* core); -int msm_vidc_deinit_instance_caps(struct msm_vidc_core* core); +int msm_vidc_init_core_caps(struct msm_vidc_core *core); +int msm_vidc_init_instance_caps(struct msm_vidc_core *core); +int msm_vidc_deinit_core_caps(struct msm_vidc_core *core); +int msm_vidc_deinit_instance_caps(struct msm_vidc_core *core); int msm_vidc_update_debug_str(struct msm_vidc_inst *inst); void msm_vidc_allow_dcvs(struct msm_vidc_inst *inst); bool msm_vidc_allow_decode_batch(struct msm_vidc_inst *inst); diff --git a/driver/vidc/inc/msm_vidc_inst.h b/driver/vidc/inc/msm_vidc_inst.h index fff133ff94..e387ea0e35 100644 --- a/driver/vidc/inc/msm_vidc_inst.h +++ b/driver/vidc/inc/msm_vidc_inst.h @@ -21,7 +21,7 @@ struct msm_vidc_inst; struct msm_vidc_session_ops { u64 (*calc_freq)(struct msm_vidc_inst *inst, u32 data_size); int (*calc_bw)(struct msm_vidc_inst *inst, - struct vidc_bus_vote_data* vote_data); + struct vidc_bus_vote_data *vote_data); int (*decide_work_route)(struct msm_vidc_inst *inst); int (*decide_work_mode)(struct msm_vidc_inst *inst); int (*decide_quality_mode)(struct msm_vidc_inst *inst); diff --git a/driver/vidc/inc/msm_vidc_power.h b/driver/vidc/inc/msm_vidc_power.h index fd1cd19bc0..7acd0af36d 100644 --- a/driver/vidc/inc/msm_vidc_power.h +++ b/driver/vidc/inc/msm_vidc_power.h @@ -199,7 +199,7 @@ static struct lut { }, }; -static inline u32 get_type_frm_name(const char* name) +static inline u32 get_type_frm_name(const char *name) { if (!strcmp(name, "venus-llcc")) return LLCC; @@ -213,13 +213,13 @@ static inline u32 get_type_frm_name(const char* name) #define DUMP_FP_FMT "%FP" /* special format for fp_t */ struct dump { - char* key; - char* format; + char *key; + char *format; size_t val; }; -struct lut const* __lut(int width, int height, int fps); -fp_t __compression_ratio(struct lut const* entry, int bpp); +struct lut const *__lut(int width, int height, int fps); +fp_t __compression_ratio(struct lut const *entry, int bpp); void __dump(struct dump dump[], int len); static inline bool __ubwc(enum msm_vidc_colorformat_type f) @@ -250,7 +250,7 @@ static inline int __bpp(enum msm_vidc_colorformat_type f) } } -u64 msm_vidc_max_freq(struct msm_vidc_inst* inst); +u64 msm_vidc_max_freq(struct msm_vidc_inst *inst); int msm_vidc_scale_power(struct msm_vidc_inst *inst, bool scale_buses); void msm_vidc_power_data_reset(struct msm_vidc_inst *inst); diff --git a/driver/vidc/inc/msm_vidc_v4l2.h b/driver/vidc/inc/msm_vidc_v4l2.h index 4f7cf8d864..bb985bb64c 100644 --- a/driver/vidc/inc/msm_vidc_v4l2.h +++ b/driver/vidc/inc/msm_vidc_v4l2.h @@ -25,10 +25,10 @@ int msm_v4l2_s_fmt(struct file *file, void *fh, struct v4l2_format *f); int msm_v4l2_g_fmt(struct file *file, void *fh, struct v4l2_format *f); -int msm_v4l2_s_selection(struct file* file, void* fh, - struct v4l2_selection* s); -int msm_v4l2_g_selection(struct file* file, void* fh, - struct v4l2_selection* s); +int msm_v4l2_s_selection(struct file *file, void *fh, + struct v4l2_selection *s); +int msm_v4l2_g_selection(struct file *file, void *fh, + struct v4l2_selection *s); int msm_v4l2_s_parm(struct file *file, void *fh, struct v4l2_streamparm *a); int msm_v4l2_g_parm(struct file *file, void *fh, diff --git a/driver/vidc/inc/venus_hfi.h b/driver/vidc/inc/venus_hfi.h index c0107891a2..6eab24e44c 100644 --- a/driver/vidc/inc/venus_hfi.h +++ b/driver/vidc/inc/venus_hfi.h @@ -66,8 +66,8 @@ int venus_hfi_trigger_ssr(struct msm_vidc_core *core, u32 type, int venus_hfi_trigger_stability(struct msm_vidc_inst *inst, u32 type, u32 client_id, u32 val); int venus_hfi_reserve_hardware(struct msm_vidc_inst *inst, u32 duration); -int venus_hfi_scale_clocks(struct msm_vidc_inst* inst, u64 freq); -int venus_hfi_scale_buses(struct msm_vidc_inst* inst, u64 bw_ddr, u64 bw_llcc); +int venus_hfi_scale_clocks(struct msm_vidc_inst *inst, u64 freq); +int venus_hfi_scale_buses(struct msm_vidc_inst *inst, u64 bw_ddr, u64 bw_llcc); int venus_hfi_set_ir_period(struct msm_vidc_inst *inst, u32 ir_type, enum msm_vidc_inst_capability_type cap_id); void venus_hfi_pm_work_handler(struct work_struct *work); diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 40705c67af..4ff5971b11 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -2421,13 +2421,13 @@ int msm_vdec_g_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) return rc; } -int msm_vdec_s_selection(struct msm_vidc_inst* inst, struct v4l2_selection* s) +int msm_vdec_s_selection(struct msm_vidc_inst *inst, struct v4l2_selection *s) { i_vpr_e(inst, "%s: unsupported\n", __func__); return -EINVAL; } -int msm_vdec_g_selection(struct msm_vidc_inst* inst, struct v4l2_selection* s) +int msm_vdec_g_selection(struct msm_vidc_inst *inst, struct v4l2_selection *s) { if (s->type != OUTPUT_MPLANE && s->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) { i_vpr_e(inst, "%s: invalid type %d\n", __func__, s->type); @@ -2484,7 +2484,7 @@ int msm_vdec_subscribe_event(struct msm_vidc_inst *inst, return rc; } -static int msm_vdec_check_colorformat_supported(struct msm_vidc_inst* inst, +static int msm_vdec_check_colorformat_supported(struct msm_vidc_inst *inst, enum msm_vidc_colorformat_type colorformat) { bool supported = true; diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index 9f361d6653..1a53f16dbc 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -313,7 +313,7 @@ static int msm_venc_set_crop_offsets(struct msm_vidc_inst *inst, return 0; } -static int msm_venc_set_colorspace(struct msm_vidc_inst* inst, +static int msm_venc_set_colorspace(struct msm_vidc_inst *inst, enum msm_vidc_port_type port) { int rc = 0; @@ -388,7 +388,7 @@ static int msm_venc_set_colorspace(struct msm_vidc_inst* inst, return 0; } -static int msm_venc_set_csc(struct msm_vidc_inst* inst, +static int msm_venc_set_csc(struct msm_vidc_inst *inst, enum msm_vidc_port_type port) { int rc = 0; @@ -417,7 +417,7 @@ static int msm_venc_set_csc(struct msm_vidc_inst* inst, static int msm_venc_set_quality_mode(struct msm_vidc_inst *inst) { int rc = 0; - struct msm_vidc_core* core = inst->core; + struct msm_vidc_core *core = inst->core; u32 mode; rc = call_session_op(core, decide_quality_mode, inst); @@ -1400,7 +1400,7 @@ int msm_venc_g_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) return rc; } -int msm_venc_s_selection(struct msm_vidc_inst* inst, struct v4l2_selection* s) +int msm_venc_s_selection(struct msm_vidc_inst *inst, struct v4l2_selection *s) { int rc = 0; struct v4l2_format *output_fmt; @@ -1503,7 +1503,7 @@ int msm_venc_s_selection(struct msm_vidc_inst* inst, struct v4l2_selection* s) return rc; } -int msm_venc_g_selection(struct msm_vidc_inst* inst, struct v4l2_selection* s) +int msm_venc_g_selection(struct msm_vidc_inst *inst, struct v4l2_selection *s) { int rc = 0; diff --git a/driver/vidc/src/msm_vidc_buffer.c b/driver/vidc/src/msm_vidc_buffer.c index 2ed946bb81..b80bdc2ffa 100644 --- a/driver/vidc/src/msm_vidc_buffer.c +++ b/driver/vidc/src/msm_vidc_buffer.c @@ -13,7 +13,7 @@ #include "msm_vidc_debug.h" /* Generic function for all targets. Not being used for iris2 */ -u32 msm_vidc_input_min_count(struct msm_vidc_inst* inst) +u32 msm_vidc_input_min_count(struct msm_vidc_inst *inst) { u32 input_min_count = 0; u32 hb_enh_layer = 0; diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 1cbfdf0018..fdb58682ff 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -102,7 +102,7 @@ static const char *const mpeg_video_vidc_ir_type[] = { NULL, }; -static const char * const * msm_vidc_get_qmenu_type( +static const char * const *msm_vidc_get_qmenu_type( struct msm_vidc_inst *inst, u32 cap_id) { switch (cap_id) { @@ -652,7 +652,7 @@ error: return rc; } -static int msm_vidc_update_buffer_count_if_needed(struct msm_vidc_inst* inst, +static int msm_vidc_update_buffer_count_if_needed(struct msm_vidc_inst *inst, enum msm_vidc_inst_capability_type cap_id) { int rc = 0; diff --git a/driver/vidc/src/msm_vidc_debug.c b/driver/vidc/src/msm_vidc_debug.c index a1d86add53..00d4eba8de 100644 --- a/driver/vidc/src/msm_vidc_debug.c +++ b/driver/vidc/src/msm_vidc_debug.c @@ -225,8 +225,8 @@ static u32 write_str(char *buffer, return len; } -static ssize_t core_info_read(struct file* file, char __user* buf, - size_t count, loff_t* ppos) +static ssize_t core_info_read(struct file *file, char __user *buf, + size_t count, loff_t *ppos) { struct msm_vidc_core *core = file->private_data; char *cur, *end, *dbuf = NULL; @@ -317,12 +317,12 @@ static const struct file_operations stats_delay_fops = { .read = stats_delay_read_ms, }; -static ssize_t trigger_ssr_write(struct file* filp, const char __user* buf, - size_t count, loff_t* ppos) +static ssize_t trigger_ssr_write(struct file *filp, const char __user *buf, + size_t count, loff_t *ppos) { unsigned long ssr_trigger_val = 0; int rc = 0; - struct msm_vidc_core* core = filp->private_data; + struct msm_vidc_core *core = filp->private_data; size_t size = MAX_SSR_STRING_LEN; char kbuf[MAX_SSR_STRING_LEN + 1] = { 0 }; @@ -400,7 +400,7 @@ static const struct file_operations stability_fops = { .write = trigger_stability_write, }; -struct dentry* msm_vidc_debugfs_init_drv(void) +struct dentry *msm_vidc_debugfs_init_drv(void) { struct dentry *dir = NULL; diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 990f230630..1186039e4e 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -5109,7 +5109,7 @@ static int msm_vidc_check_inst_mbpf(struct msm_vidc_inst *inst) return 0; } -u32 msm_vidc_get_max_bitrate(struct msm_vidc_inst* inst) +u32 msm_vidc_get_max_bitrate(struct msm_vidc_inst *inst) { u32 max_bitrate = 0x7fffffff; diff --git a/driver/vidc/src/msm_vidc_power.c b/driver/vidc/src/msm_vidc_power.c index 42a74be0cc..2e2ec7673f 100644 --- a/driver/vidc/src/msm_vidc_power.c +++ b/driver/vidc/src/msm_vidc_power.c @@ -90,7 +90,7 @@ void __dump(struct dump dump[], int len) u64 msm_vidc_max_freq(struct msm_vidc_inst *inst) { - struct msm_vidc_core* core; + struct msm_vidc_core *core; struct frequency_table *freq_tbl; u64 freq = 0; @@ -154,11 +154,11 @@ static int fill_dynamic_stats(struct msm_vidc_inst *inst, return 0; } -static int msm_vidc_set_buses(struct msm_vidc_inst* inst) +static int msm_vidc_set_buses(struct msm_vidc_inst *inst) { int rc = 0; - struct msm_vidc_core* core; - struct msm_vidc_inst* temp; + struct msm_vidc_core *core; + struct msm_vidc_inst *temp; u64 total_bw_ddr = 0, total_bw_llcc = 0; u64 curr_time_ns; @@ -325,11 +325,11 @@ set_buses: return 0; } -int msm_vidc_set_clocks(struct msm_vidc_inst* inst) +int msm_vidc_set_clocks(struct msm_vidc_inst *inst) { int rc = 0; - struct msm_vidc_core* core; - struct msm_vidc_inst* temp; + struct msm_vidc_core *core; + struct msm_vidc_inst *temp; u64 freq; u64 rate = 0; bool increment, decrement; @@ -480,7 +480,7 @@ exit: int msm_vidc_scale_clocks(struct msm_vidc_inst *inst) { - struct msm_vidc_core* core; + struct msm_vidc_core *core; core = inst->core; diff --git a/driver/vidc/src/msm_vidc_probe.c b/driver/vidc/src/msm_vidc_probe.c index 61e9375ddf..59aa0cb610 100644 --- a/driver/vidc/src/msm_vidc_probe.c +++ b/driver/vidc/src/msm_vidc_probe.c @@ -647,7 +647,7 @@ static const struct component_master_ops msm_vidc_component_master_ops = { static int msm_vidc_remove_video_device(struct platform_device *pdev) { - struct msm_vidc_core* core; + struct msm_vidc_core *core; if (!pdev) { d_vpr_e("%s: invalid input %pK", __func__, pdev); From 542b9f973661dc7011f809fc84d066d2ba1ed26e Mon Sep 17 00:00:00 2001 From: Ankush Mitra Date: Thu, 1 Jun 2023 11:50:29 +0530 Subject: [PATCH 0927/1061] video: driver: enclosed macros with complex values within bracket This is resolve some of this kind of checker err. Change-Id: Ief665e17045c3b6a6ff636ab6404c6e0c93e9460 Signed-off-by: Ankush Mitra --- .../platform/kalama/inc/kalama_technology.h | 37 ++-- .../pineapple/inc/pineapple_technology.h | 37 ++-- driver/variant/iris2/inc/hfi_buffer_iris2.h | 150 ++++++-------- driver/variant/iris3/inc/hfi_buffer_iris3.h | 194 +++++++----------- driver/variant/iris33/inc/hfi_buffer_iris33.h | 192 +++++++---------- 5 files changed, 240 insertions(+), 370 deletions(-) diff --git a/driver/platform/kalama/inc/kalama_technology.h b/driver/platform/kalama/inc/kalama_technology.h index 08412c75d6..2a2000d7f4 100644 --- a/driver/platform/kalama/inc/kalama_technology.h +++ b/driver/platform/kalama/inc/kalama_technology.h @@ -11,8 +11,7 @@ * Chipset Generation Technology: SW/FW overhead profiling * need update with new numbers */ -static u32 frequency_table_kalama[2][6] = -{ +static u32 frequency_table_kalama[2][6] = { /* //make lowsvs_D1 as invalid; */ {533, 444, 366, 338, 240, 0}, {800, 666, 549, 507, 360, 0}, @@ -31,13 +30,13 @@ static u32 frequency_table_kalama[2][6] = #define DECODER_VPPVSP1STAGE_FW_OVERHEAD_KALAMA 93000 #define DECODER_VSP_FW_OVERHEAD_KALAMA \ - DECODER_VPPVSP1STAGE_FW_OVERHEAD_KALAMA - DECODER_VPP_FW_OVERHEAD_KALAMA + (DECODER_VPPVSP1STAGE_FW_OVERHEAD_KALAMA - DECODER_VPP_FW_OVERHEAD_KALAMA) /* Tensilica cycles; encoder has ARP register */ #define ENCODER_VPP_FW_OVERHEAD_KALAMA 48405 #define ENCODER_VPPVSP1STAGE_FW_OVERHEAD_KALAMA \ - ENCODER_VPP_FW_OVERHEAD_KALAMA + DECODER_VSP_FW_OVERHEAD_KALAMA + (ENCODER_VPP_FW_OVERHEAD_KALAMA + DECODER_VSP_FW_OVERHEAD_KALAMA) #define DECODER_SW_OVERHEAD_KALAMA 489583 #define ENCODER_SW_OVERHEAD_KALAMA 489583 @@ -50,8 +49,7 @@ static u32 decoder_vpp_target_clk_per_mb_kalama = 200; * These pipe penalty numbers only applies to 4 pipe * For 2pipe and 1pipe, these numbers need recalibrate */ -static u32 pipe_penalty_kalama[3][3] = -{ +static u32 pipe_penalty_kalama[3][3] = { /* NON AV1 */ {1059, 1059, 1059}, /* AV1 RECOMMENDED TILE 1080P_V2XH1, UHD_V2X2, 8KUHD_V8X2 */ @@ -65,8 +63,7 @@ static u32 pipe_penalty_kalama[3][3] = * HW limit bitrate table (these values are measured end to end fw/sw impacts are also considered) * TODO Can we convert to Cycles/MB? This will remove DIVISION. */ -static u32 bitrate_table_kalama_2stage_fp[5][10] = -{ +static u32 bitrate_table_kalama_2stage_fp[5][10] = { /* h264 cavlc */ {0, 220, 220, 220, 220, 220, 220, 220, 220, 220}, /* h264 cabac */ @@ -80,8 +77,7 @@ static u32 bitrate_table_kalama_2stage_fp[5][10] = }; /* HW limit bitrate table (these values are measured end to end fw/sw impacts are also considered) */ -static u32 bitrate_table_kalama_1stage_fp[5][10] = /* 1-stage assume IPPP */ -{ +static u32 bitrate_table_kalama_1stage_fp[5][10] = { /* 1-stage assume IPPP */ /* h264 cavlc */ {0, 220, 220, 220, 220, 220, 220, 220, 220, 220}, /* h264 cabac */ @@ -95,8 +91,7 @@ static u32 bitrate_table_kalama_1stage_fp[5][10] = /* 1-stage assume IPPP */ }; /* rec pwc and power bitrate table */ -static u32 bitrate_table_kalama_rec_fp[5][10] = -{ +static u32 bitrate_table_kalama_rec_fp[5][10] = { /* rec. worst bitrate based on bitrate table */ #if ENABLE_FINEBITRATE_SUBUHD60 /* h264 cavlc */ @@ -149,8 +144,7 @@ static u32 fp_pixel_count_bar9 = 1280 * 720 * 30; static u32 codec_encoder_gop_complexity_table_fp[8][3]; static u32 codec_mbspersession_kalama; -static u32 cr_table_basic_kalama[7][4] = -{ +static u32 cr_table_basic_kalama[7][4] = { {1920, 1080, 20, 40}, {3840, 2160, 42, 84}, {4096, 2160, 44, 88}, @@ -161,8 +155,7 @@ static u32 cr_table_basic_kalama[7][4] = }; /* 100x */ -static u32 dpbopb_ubwc30_cr_table_cratio_kalama[7][12] = -{ +static u32 dpbopb_ubwc30_cr_table_cratio_kalama[7][12] = { {237, 399, 272, 137, 225, 158, 185, 259, 203, 138, 167, 152}, {269, 404, 302, 202, 367, 238, 210, 299, 232, 134, 181, 149}, {269, 404, 302, 202, 367, 238, 210, 299, 232, 134, 181, 149}, @@ -173,8 +166,7 @@ static u32 dpbopb_ubwc30_cr_table_cratio_kalama[7][12] = }; /* 100x */ -static u32 rpb_ubwc30_cr_table_cratio_kalama[7][12] = -{ +static u32 rpb_ubwc30_cr_table_cratio_kalama[7][12] = { {193, 294, 218, 135, 214, 155, 175, 241, 191, 139, 162, 149}, {285, 406, 316, 207, 373, 243, 201, 280, 221, 139, 177, 152}, {285, 406, 316, 207, 373, 243, 201, 280, 221, 139, 177, 152}, @@ -185,8 +177,7 @@ static u32 rpb_ubwc30_cr_table_cratio_kalama[7][12] = }; /* 100x */ -static u32 ipblossy_ubwc30_cr_table_cratio_kalama[7][12] = -{ +static u32 ipblossy_ubwc30_cr_table_cratio_kalama[7][12] = { {215, 215, 215, 174, 174, 174, 266, 266, 266, 231, 231, 231}, {254, 254, 254, 219, 219, 219, 292, 292, 292, 249, 249, 249}, {254, 254, 254, 219, 219, 219, 292, 292, 292, 249, 249, 249}, @@ -197,8 +188,7 @@ static u32 ipblossy_ubwc30_cr_table_cratio_kalama[7][12] = }; /* 100x */ -static u32 ipblossless_ubwc30_cr_table_cratio_kalama[7][12] = -{ +static u32 ipblossless_ubwc30_cr_table_cratio_kalama[7][12] = { {185, 215, 194, 147, 178, 159, 162, 181, 169, 138, 161, 146}, {186, 217, 195, 151, 183, 161, 164, 182, 170, 140, 168, 148}, {186, 217, 195, 151, 183, 161, 164, 182, 170, 140, 168, 148}, @@ -213,8 +203,7 @@ static u32 en_original_compression_factor_rgba_pwd_kalama = 243; /* 100x */ static u32 en_original_compression_factor_rgba_avg_kalama = 454; -static u32 av1_num_tiles_kalama[7][3] = -{ +static u32 av1_num_tiles_kalama[7][3] = { {2, 1, 1}, {4, 2, 2}, {4, 2, 2}, diff --git a/driver/platform/pineapple/inc/pineapple_technology.h b/driver/platform/pineapple/inc/pineapple_technology.h index 9bbf9621a6..ab65961f63 100644 --- a/driver/platform/pineapple/inc/pineapple_technology.h +++ b/driver/platform/pineapple/inc/pineapple_technology.h @@ -11,8 +11,7 @@ * Chipset Generation Technology: SW/FW overhead profiling * need update with new numbers */ -static u32 frequency_table_pineapple[2][6] = -{ +static u32 frequency_table_pineapple[2][6] = { /* //make lowsvs_D1 as invalid; */ {533, 480, 435, 380, 300, 196}, {840, 720, 652, 570, 450, 294}, @@ -35,13 +34,13 @@ static u32 frequency_table_pineapple[2][6] = #define DECODER_VPPVSP1STAGE_FW_OVERHEAD_PINEAPPLE (93000) #define DECODER_VSP_FW_OVERHEAD_PINEAPPLE \ - DECODER_VPPVSP1STAGE_FW_OVERHEAD_PINEAPPLE - DECODER_VPP_FW_OVERHEAD_PINEAPPLE + (DECODER_VPPVSP1STAGE_FW_OVERHEAD_PINEAPPLE - DECODER_VPP_FW_OVERHEAD_PINEAPPLE) /* Tensilica cycles; encoder has ARP register */ #define ENCODER_VPP_FW_OVERHEAD_PINEAPPLE (69000*3/2) #define ENCODER_VPPVSP1STAGE_FW_OVERHEAD_PINEAPPLE \ - ENCODER_VPP_FW_OVERHEAD_PINEAPPLE + DECODER_VSP_FW_OVERHEAD_PINEAPPLE + (ENCODER_VPP_FW_OVERHEAD_PINEAPPLE + DECODER_VSP_FW_OVERHEAD_PINEAPPLE) #define DECODER_SW_OVERHEAD_PINEAPPLE (489583) #define ENCODER_SW_OVERHEAD_PINEAPPLE (489583) @@ -54,8 +53,7 @@ static u32 decoder_vpp_target_clk_per_mb_pineapple = 200; * These pipe penalty numbers only applies to 4 pipe * For 2pipe and 1pipe, these numbers need recalibrate */ -static u32 pipe_penalty_pineapple[3][3] = -{ +static u32 pipe_penalty_pineapple[3][3] = { /* NON AV1 */ {1059, 1059, 1059}, /* AV1 RECOMMENDED TILE 1080P_V2XH1, UHD_V2X2, 8KUHD_V8X2 */ @@ -69,8 +67,7 @@ static u32 pipe_penalty_pineapple[3][3] = * HW limit bitrate table (these values are measured end to end fw/sw impacts are also considered) * TODO Can we convert to Cycles/MB? This will remove DIVISION. */ -static u32 bitrate_table_pineapple_2stage_fp[5][10] = -{ +static u32 bitrate_table_pineapple_2stage_fp[5][10] = { /* h264 cavlc */ {0, 220, 220, 220, 220, 220, 220, 220, 220, 220}, /* h264 cabac */ @@ -84,8 +81,7 @@ static u32 bitrate_table_pineapple_2stage_fp[5][10] = }; /* HW limit bitrate table (these values are measured end to end fw/sw impacts are also considered) */ -static u32 bitrate_table_pineapple_1stage_fp[5][10] = /* 1-stage assume IPPP */ -{ +static u32 bitrate_table_pineapple_1stage_fp[5][10] = { /* 1-stage assume IPPP */ /* h264 cavlc */ {0, 220, 220, 220, 220, 220, 220, 220, 220, 220}, /* h264 cabac */ @@ -99,8 +95,7 @@ static u32 bitrate_table_pineapple_1stage_fp[5][10] = /* 1-stage assume IPPP */ }; /* rec pwc and power bitrate table */ -static u32 bitrate_table_pineapple_rec_fp[5][10] = -{ +static u32 bitrate_table_pineapple_rec_fp[5][10] = { /* rec. worst bitrate based on bitrate table */ #if ENABLE_FINEBITRATE_SUBUHD60 /* h264 cavlc */ @@ -153,8 +148,7 @@ static u32 fp_pixel_count_bar9 = 1280 * 720 * 30; static u32 codec_encoder_gop_complexity_table_fp[8][3]; static u32 codec_mbspersession_pineaple; -static u32 cr_table_basic_pineapple[7][4] = -{ +static u32 cr_table_basic_pineapple[7][4] = { {1920, 1080, 20, 40}, {3840, 2160, 42, 84}, {4096, 2160, 44, 88}, @@ -165,8 +159,7 @@ static u32 cr_table_basic_pineapple[7][4] = }; /* 100x */ -static u32 dpbopb_ubwc30_cr_table_cratio_pineapple[7][12] = -{ +static u32 dpbopb_ubwc30_cr_table_cratio_pineapple[7][12] = { {237, 399, 272, 137, 225, 158, 185, 259, 203, 138, 167, 152}, {269, 404, 302, 202, 367, 238, 210, 299, 232, 134, 181, 149}, {269, 404, 302, 202, 367, 238, 210, 299, 232, 134, 181, 149}, @@ -177,8 +170,7 @@ static u32 dpbopb_ubwc30_cr_table_cratio_pineapple[7][12] = }; /* 100x */ -static u32 rpb_ubwc30_cr_table_cratio_pineapple[7][12] = -{ +static u32 rpb_ubwc30_cr_table_cratio_pineapple[7][12] = { {193, 294, 218, 135, 214, 155, 175, 241, 191, 139, 162, 149}, {285, 406, 316, 207, 373, 243, 201, 280, 221, 139, 177, 152}, {285, 406, 316, 207, 373, 243, 201, 280, 221, 139, 177, 152}, @@ -189,8 +181,7 @@ static u32 rpb_ubwc30_cr_table_cratio_pineapple[7][12] = }; /* 100x */ -static u32 ipblossy_ubwc30_cr_table_cratio_pineapple[7][12] = -{ +static u32 ipblossy_ubwc30_cr_table_cratio_pineapple[7][12] = { {215, 215, 215, 174, 174, 174, 266, 266, 266, 231, 231, 231}, {254, 254, 254, 219, 219, 219, 292, 292, 292, 249, 249, 249}, {254, 254, 254, 219, 219, 219, 292, 292, 292, 249, 249, 249}, @@ -201,8 +192,7 @@ static u32 ipblossy_ubwc30_cr_table_cratio_pineapple[7][12] = }; /* 100x */ -static u32 ipblossless_ubwc30_cr_table_cratio_pineapple[7][12] = -{ +static u32 ipblossless_ubwc30_cr_table_cratio_pineapple[7][12] = { {185, 215, 194, 147, 178, 159, 162, 181, 169, 138, 161, 146}, {186, 217, 195, 151, 183, 161, 164, 182, 170, 140, 168, 148}, {186, 217, 195, 151, 183, 161, 164, 182, 170, 140, 168, 148}, @@ -217,8 +207,7 @@ static u32 en_original_compression_factor_rgba_pwd_pineapple = 243; /* 100x */ static u32 en_original_compression_factor_rgba_avg_pineapple = 454; -static u32 av1_num_tiles_pineapple[7][3] = -{ +static u32 av1_num_tiles_pineapple[7][3] = { {2, 1, 1}, {4, 2, 2}, {4, 2, 2}, diff --git a/driver/variant/iris2/inc/hfi_buffer_iris2.h b/driver/variant/iris2/inc/hfi_buffer_iris2.h index 440be920a7..a6000cec3b 100644 --- a/driver/variant/iris2/inc/hfi_buffer_iris2.h +++ b/driver/variant/iris2/inc/hfi_buffer_iris2.h @@ -58,18 +58,18 @@ typedef HFI_U32 HFI_BOOL; #define HFI_COLOR_FORMAT_RGBA8888_UBWC_TILE_WIDTH (16) #define HFI_NV12_IL_CALC_Y_STRIDE(stride, frame_width, stride_multiple) \ - stride = HFI_ALIGN(frame_width, stride_multiple) + (stride = HFI_ALIGN(frame_width, stride_multiple)) #define HFI_NV12_IL_CALC_Y_BUFHEIGHT(buf_height, frame_height, \ - min_buf_height_multiple) buf_height = HFI_ALIGN(frame_height, \ - min_buf_height_multiple) + min_buf_height_multiple) (buf_height = HFI_ALIGN(frame_height, \ + min_buf_height_multiple)) #define HFI_NV12_IL_CALC_UV_STRIDE(stride, frame_width, stride_multiple) \ - stride = HFI_ALIGN(frame_width, stride_multiple) + (stride = HFI_ALIGN(frame_width, stride_multiple)) #define HFI_NV12_IL_CALC_UV_BUFHEIGHT(buf_height, frame_height, \ - min_buf_height_multiple) buf_height = HFI_ALIGN(((frame_height + 1) \ - >> 1), min_buf_height_multiple) + min_buf_height_multiple) (buf_height = HFI_ALIGN(((frame_height + 1) \ + >> 1), min_buf_height_multiple)) #define HFI_NV12_IL_CALC_BUF_SIZE(buf_size, y_bufSize, y_stride, y_buf_height, \ uv_buf_size, uv_stride, uv_buf_height) \ @@ -78,11 +78,11 @@ typedef HFI_U32 HFI_BOOL; buf_size = HFI_ALIGN(y_bufSize + uv_buf_size, HFI_ALIGNMENT_4096) #define HFI_NV12_UBWC_IL_CALC_Y_BUF_SIZE(y_bufSize, y_stride, y_buf_height) \ - y_bufSize = HFI_ALIGN(y_stride * y_buf_height, HFI_ALIGNMENT_4096) + (y_bufSize = HFI_ALIGN(y_stride * y_buf_height, HFI_ALIGNMENT_4096)) #define HFI_NV12_UBWC_IL_CALC_UV_BUF_SIZE(uv_buf_size, \ uv_stride, uv_buf_height) \ - uv_buf_size = HFI_ALIGN(uv_stride * uv_buf_height, HFI_ALIGNMENT_4096) + (uv_buf_size = HFI_ALIGN(uv_stride * uv_buf_height, HFI_ALIGNMENT_4096)) #define HFI_NV12_UBWC_IL_CALC_BUF_SIZE_V2(buf_size,\ frame_width, frame_height, y_stride_multiple,\ @@ -130,7 +130,7 @@ typedef HFI_U32 HFI_BOOL; #define HFI_YUV420_TP10_CALC_Y_BUFHEIGHT(buf_height, frame_height, \ min_buf_height_multiple) \ - buf_height = HFI_ALIGN(frame_height, min_buf_height_multiple) + (buf_height = HFI_ALIGN(frame_height, min_buf_height_multiple)) #define HFI_YUV420_TP10_CALC_UV_STRIDE(stride, frame_width, stride_multiple) \ stride = HFI_ALIGN(frame_width, 192); \ @@ -138,8 +138,8 @@ typedef HFI_U32 HFI_BOOL; #define HFI_YUV420_TP10_CALC_UV_BUFHEIGHT(buf_height, frame_height, \ min_buf_height_multiple) \ - buf_height = HFI_ALIGN(((frame_height + 1) >> 1), \ - min_buf_height_multiple) + (buf_height = HFI_ALIGN(((frame_height + 1) >> 1), \ + min_buf_height_multiple)) #define HFI_YUV420_TP10_CALC_BUF_SIZE(buf_size, y_buf_size, y_stride,\ y_buf_height, uv_buf_size, uv_stride, uv_buf_height) \ @@ -149,11 +149,11 @@ typedef HFI_U32 HFI_BOOL; #define HFI_YUV420_TP10_UBWC_CALC_Y_BUF_SIZE(y_buf_size, y_stride, \ y_buf_height) \ - y_buf_size = HFI_ALIGN(y_stride * y_buf_height, HFI_ALIGNMENT_4096) + (y_buf_size = HFI_ALIGN(y_stride * y_buf_height, HFI_ALIGNMENT_4096)) #define HFI_YUV420_TP10_UBWC_CALC_UV_BUF_SIZE(uv_buf_size, uv_stride, \ uv_buf_height) \ - uv_buf_size = HFI_ALIGN(uv_stride * uv_buf_height, HFI_ALIGNMENT_4096) + (uv_buf_size = HFI_ALIGN(uv_stride * uv_buf_height, HFI_ALIGNMENT_4096)) #define HFI_YUV420_TP10_UBWC_CALC_BUF_SIZE(buf_size, y_stride, y_buf_height, \ uv_stride, uv_buf_height, y_md_stride, y_md_height, uv_md_stride, \ @@ -173,19 +173,19 @@ typedef HFI_U32 HFI_BOOL; } while (0) #define HFI_YUV420_P010_CALC_Y_STRIDE(stride, frame_width, stride_multiple) \ - stride = HFI_ALIGN(frame_width * 2, stride_multiple) + (stride = HFI_ALIGN(frame_width * 2, stride_multiple)) #define HFI_YUV420_P010_CALC_Y_BUFHEIGHT(buf_height, frame_height, \ min_buf_height_multiple) \ - buf_height = HFI_ALIGN(frame_height, min_buf_height_multiple) + (buf_height = HFI_ALIGN(frame_height, min_buf_height_multiple)) #define HFI_YUV420_P010_CALC_UV_STRIDE(stride, frame_width, stride_multiple) \ - stride = HFI_ALIGN(frame_width * 2, stride_multiple) + (stride = HFI_ALIGN(frame_width * 2, stride_multiple)) #define HFI_YUV420_P010_CALC_UV_BUFHEIGHT(buf_height, frame_height, \ min_buf_height_multiple) \ - buf_height = HFI_ALIGN(((frame_height + 1) >> 1), \ - min_buf_height_multiple) + (buf_height = HFI_ALIGN(((frame_height + 1) >> 1), \ + min_buf_height_multiple)) #define HFI_YUV420_P010_CALC_BUF_SIZE(buf_size, y_data_size, y_stride, \ y_buf_height, uv_data_size, uv_stride, uv_buf_height) \ @@ -198,30 +198,30 @@ typedef HFI_U32 HFI_BOOL; } while (0) #define HFI_RGB888_CALC_STRIDE(stride, frame_width, stride_multiple) \ - stride = ((frame_width * 3) + stride_multiple - 1) & \ - (0xffffffff - (stride_multiple - 1)) + (stride = ((frame_width * 3) + stride_multiple - 1) & \ + (0xffffffff - (stride_multiple - 1))) #define HFI_RGB888_CALC_BUFHEIGHT(buf_height, frame_height, \ min_buf_height_multiple) \ - buf_height = ((frame_height + min_buf_height_multiple - 1) & \ - (0xffffffff - (min_buf_height_multiple - 1))) + (buf_height = ((frame_height + min_buf_height_multiple - 1) & \ + (0xffffffff - (min_buf_height_multiple - 1)))) #define HFI_RGB888_CALC_BUF_SIZE(buf_size, stride, buf_height) \ - buf_size = ((stride) * (buf_height)) + (buf_size = ((stride) * (buf_height))) #define HFI_RGBA8888_CALC_STRIDE(stride, frame_width, stride_multiple) \ - stride = HFI_ALIGN((frame_width << 2), stride_multiple) + (stride = HFI_ALIGN((frame_width << 2), stride_multiple)) #define HFI_RGBA8888_CALC_BUFHEIGHT(buf_height, frame_height, \ min_buf_height_multiple) \ - buf_height = HFI_ALIGN(frame_height, min_buf_height_multiple) + (buf_height = HFI_ALIGN(frame_height, min_buf_height_multiple)) #define HFI_RGBA8888_CALC_BUF_SIZE(buf_size, stride, buf_height) \ buf_size = (stride) * (buf_height) #define HFI_RGBA8888_UBWC_CALC_DATA_PLANE_BUF_SIZE(buf_size, stride, \ buf_height) \ - buf_size = HFI_ALIGN((stride) * (buf_height), HFI_ALIGNMENT_4096) + (buf_size = HFI_ALIGN((stride) * (buf_height), HFI_ALIGNMENT_4096)) #define HFI_RGBA8888_UBWC_BUF_SIZE(buf_size, data_buf_size, \ metadata_buffer_size, stride, buf_height, _metadata_tride, \ @@ -447,8 +447,7 @@ typedef HFI_U32 HFI_BOOL; VENUS_DMA_ALIGNMENT) * 2 + HFI_ALIGN(SIZE_H264D_QP\ (frame_width, frame_height), VENUS_DMA_ALIGNMENT); \ _size = HFI_ALIGN(_size, VENUS_DMA_ALIGNMENT); \ - if (is_opb) \ - { \ + if (is_opb) { \ SIZE_VPSS_LB(vpss_lb_size, frame_width, frame_height, \ num_vpp_pipes); \ } \ @@ -487,8 +486,7 @@ typedef HFI_U32 HFI_BOOL; BUFFER_ALIGNMENT_16_BYTES);\ HFI_U32 n_aligned_h = HFI_ALIGN(frame_height, \ BUFFER_ALIGNMENT_16_BYTES); \ - if (!is_interlaced) \ - { \ + if (!is_interlaced) { \ SIZE_H264D_HW_BIN_BUFFER(_size, n_aligned_w, \ n_aligned_h, delay, num_vpp_pipes); \ } \ @@ -684,13 +682,11 @@ typedef HFI_U32 HFI_BOOL; BUFFER_ALIGNMENT_16_BYTES); \ HFI_U32 n_aligned_h = HFI_ALIGN(frame_height, \ BUFFER_ALIGNMENT_16_BYTES); \ - if (!is_interlaced) \ - { \ + if (!is_interlaced) { \ SIZE_H265D_HW_BIN_BUFFER(_size, n_aligned_w, \ n_aligned_h, delay, num_vpp_pipes); \ } \ - else \ - { \ + else { \ _size = 0; \ } \ } while (0) @@ -848,8 +844,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ VENUS_DMA_ALIGNMENT) + \ HFI_ALIGN(SIZE_MP2D_LB_FE_TOP_DATA(frame_width, frame_height), \ VENUS_DMA_ALIGNMENT); \ - if (is_opb) \ - { \ + if (is_opb) { \ SIZE_VPSS_LB(vpss_lb_size, frame_width, frame_height, \ num_vpp_pipes); \ } \ @@ -870,24 +865,19 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ aligned_width = HFI_ALIGN(frame_width, 32); \ aligned_height = HFI_ALIGN(frame_height, 32); \ bitstream_size = aligned_width * aligned_height * 3; \ - if (aligned_width * aligned_height > (4096 * 2176)) \ - { \ + if (aligned_width * aligned_height > (4096 * 2176)) { \ bitstream_size = (bitstream_size >> 3); \ } \ - else if (bitstream_size > (1280 * 720)) \ - { \ + else if (bitstream_size > (1280 * 720)) { \ bitstream_size = (bitstream_size >> 2); \ } \ - else \ - { \ + else { \ bitstream_size = (bitstream_size << 1);\ } \ - if ((rc_type == HFI_RC_CQ) || (rc_type == HFI_RC_OFF)) \ - { \ + if ((rc_type == HFI_RC_CQ) || (rc_type == HFI_RC_OFF)) { \ bitstream_size = (bitstream_size << 1);\ } \ - if (is_ten_bit) \ - { \ + if (is_ten_bit) { \ bitstream_size = (bitstream_size) + \ (bitstream_size >> 2); \ } \ @@ -912,8 +902,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ is_roi_enabled, lcu_size) \ do { \ HFI_U32 roi_size = 0; \ - if (is_roi_enabled) \ - { \ + if (is_roi_enabled) { \ SIZE_ROI_METADATA_ENC(roi_size, frame_width, \ frame_height, lcu_size); \ } \ @@ -960,8 +949,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ HFI_U32 num_ref = 1; \ if (n_bframe) \ num_ref = 2; \ - if (_total_hp_layers > 1) \ - { \ + if (_total_hp_layers > 1) { \ if (hybrid_hp) \ num_ref = (_total_hp_layers + 1) >> 1; \ else if (codec_standard == HFI_CODEC_ENCODE_HEVC) \ @@ -974,8 +962,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ } \ if (ltr_count) \ num_ref = num_ref + ltr_count; \ - if (_total_hb_layers > 1) \ - { \ + if (_total_hb_layers > 1) { \ if (codec_standard == HFI_CODEC_ENCODE_HEVC) \ num_ref = (_total_hb_layers); \ else if (codec_standard == HFI_CODEC_ENCODE_AVC) \ @@ -991,8 +978,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ HFI_U32 bitstream_size_eval = 0; \ size_aligned_width = HFI_ALIGN((frame_width), lcu_size); \ size_aligned_height = HFI_ALIGN((frame_height), lcu_size); \ - if (work_mode == HFI_WORKMODE_2) \ - { \ + if (work_mode == HFI_WORKMODE_2) { \ if ((rc_type == HFI_RC_CQ) || (rc_type == HFI_RC_OFF)) \ { \ bitstream_size_eval = (((size_aligned_width) * \ @@ -1002,27 +988,23 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ { \ bitstream_size_eval = ((size_aligned_width) * \ (size_aligned_height) * 3); \ - if (rc_type == HFI_RC_LOSSLESS) \ - { \ + if (rc_type == HFI_RC_LOSSLESS) { \ bitstream_size_eval = (bitstream_size_eval * 3 >> 2); \ } \ else if ((size_aligned_width * size_aligned_height) > \ - (4096 * 2176)) \ - { \ + (4096 * 2176)) { \ bitstream_size_eval >>= 3; \ } \ - else if ((size_aligned_width * size_aligned_height) > (480 * 320)) \ - { \ + else if ((size_aligned_width * size_aligned_height) > \ + (480 * 320)) { \ bitstream_size_eval >>= 2; \ } \ - if (lcu_size == 32) \ - { \ + if (lcu_size == 32) { \ bitstream_size_eval = (bitstream_size_eval * 5 >> 2); \ } \ } \ } \ - else \ - { \ + else { \ bitstream_size_eval = size_aligned_width * \ size_aligned_height * 3; \ } \ @@ -1038,20 +1020,16 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ size_aligned_width = HFI_ALIGN((frame_width), lcu_size); \ size_aligned_height = HFI_ALIGN((frame_height), lcu_size); \ if ((size_aligned_width * size_aligned_height) > \ - (3840 * 2160)) \ - { \ + (3840 * 2160)) { \ size_single_pipe_eval = (bitbin_size / num_vpp_pipes); \ } \ - else if (num_vpp_pipes > 2) \ - { \ + else if (num_vpp_pipes > 2) { \ size_single_pipe_eval = bitbin_size / 2; \ } \ - else \ - { \ + else { \ size_single_pipe_eval = bitbin_size; \ } \ - if (rc_type == HFI_RC_LOSSLESS) \ - { \ + if (rc_type == HFI_RC_LOSSLESS) { \ size_single_pipe_eval = (size_single_pipe_eval << 1); \ } \ sao_bin_buffer_size = (64 * ((((frame_width) + \ @@ -1072,20 +1050,17 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ size_single_pipe = 0, bitbin_size = 0; \ SIZE_BIN_BITSTREAM_ENC(bitstream_size, rc_type, frame_width, \ frame_height, work_mode, lcu_size); \ - if (work_mode == HFI_WORKMODE_2) \ - { \ + if (work_mode == HFI_WORKMODE_2) { \ total_bitbin_buffers = 3; \ bitbin_size = bitstream_size * 17 / 10; \ bitbin_size = HFI_ALIGN(bitbin_size, \ VENUS_DMA_ALIGNMENT); \ } \ - else if ((lcu_size == 16) || (num_vpp_pipes > 1)) \ - { \ + else if ((lcu_size == 16) || (num_vpp_pipes > 1)) { \ total_bitbin_buffers = 1; \ bitbin_size = bitstream_size; \ } \ - if (total_bitbin_buffers > 0) \ - { \ + if (total_bitbin_buffers > 0) { \ SIZE_ENC_SINGLE_PIPE(size_single_pipe, rc_type, bitbin_size, \ num_vpp_pipes, frame_width, frame_height, lcu_size); \ bitbin_size = size_single_pipe * num_vpp_pipes; \ @@ -1093,10 +1068,8 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ total_bitbin_buffers + 512; \ } \ else \ - /* Avoid 512 Bytes allocation in case of 1Pipe HEVC Direct Mode*/\ - { \ + /* Avoid 512 Bytes allocation in case of 1Pipe HEVC Direct Mode*/ \ _size = 0; \ - } \ } while (0) #define HFI_BUFFER_BIN_H264E(_size, rc_type, frame_width, frame_height, \ @@ -1142,8 +1115,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ (((frame_height_coded) + \ (BUF_SIZE_ALIGN_32)) / BUF_SIZE_ALIGN_32 * 4 * 16) : \ (((frame_height_coded) + 15) / 16 * 5 * 16); \ - if ((num_vpp_pipes_enc) > 1) \ - { \ + if ((num_vpp_pipes_enc) > 1) { \ _size += BUFFER_ALIGNMENT_512_BYTES; \ _size = HFI_ALIGN(_size, BUFFER_ALIGNMENT_512_BYTES) *\ (num_vpp_pipes_enc); \ @@ -1208,8 +1180,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ (14 + ((((frame_height_coded) >> 5) + 7) >> 3))) : \ (256 + 16 * (14 + ((((frame_height_coded) >> 4) + 7) >> 3))); \ _size *= 11; \ - if (num_vpp_pipes_enc > 1) \ - { \ + if (num_vpp_pipes_enc > 1) { \ _size = HFI_ALIGN(_size, VENUS_DMA_ALIGNMENT) * \ num_vpp_pipes_enc;\ } \ @@ -1425,8 +1396,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ HFI_U32 metadata_stride, metadata_buf_height, meta_size_y, \ meta_size_c; \ HFI_U32 ten_bit_ref_buf_size = 0, ref_buf_size = 0; \ - if (!is_ten_bit) \ - { \ + if (!is_ten_bit) { \ SIZE_ENC_REF_BUFFER(ref_buf_size, frame_width, \ frame_height); \ HFI_UBWC_CALC_METADATA_PLANE_STRIDE(metadata_stride, \ @@ -1441,8 +1411,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ metadata_stride, metadata_buf_height); \ _size = ref_buf_size + meta_size_y + meta_size_c; \ } \ - else \ - { \ + else { \ SIZE_ENC_TEN_BIT_REF_BUFFER(ten_bit_ref_buf_size, \ frame_width, frame_height); \ HFI_UBWC_CALC_METADATA_PLANE_STRIDE(metadata_stride, \ @@ -1473,8 +1442,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define HFI_BUFFER_VPSS_ENC(vpss_size, dswidth, dsheight, ds_enable, blur, is_ten_bit) \ do { \ vpss_size = 0; \ - if (ds_enable || blur) \ - { \ + if (ds_enable || blur) { \ HFI_BUFFER_DPB_ENC(vpss_size, dswidth, dsheight, is_ten_bit); \ } \ } while (0) diff --git a/driver/variant/iris3/inc/hfi_buffer_iris3.h b/driver/variant/iris3/inc/hfi_buffer_iris3.h index eb4e8b147e..951b688715 100644 --- a/driver/variant/iris3/inc/hfi_buffer_iris3.h +++ b/driver/variant/iris3/inc/hfi_buffer_iris3.h @@ -58,31 +58,31 @@ typedef HFI_U32 HFI_BOOL; #define HFI_COLOR_FORMAT_RGBA8888_UBWC_TILE_WIDTH (16) #define HFI_NV12_IL_CALC_Y_STRIDE(stride, frame_width, stride_multiple) \ - stride = HFI_ALIGN(frame_width, stride_multiple) + (stride = HFI_ALIGN(frame_width, stride_multiple)) #define HFI_NV12_IL_CALC_Y_BUFHEIGHT(buf_height, frame_height, \ - min_buf_height_multiple) buf_height = HFI_ALIGN(frame_height, \ - min_buf_height_multiple) + min_buf_height_multiple) (buf_height = HFI_ALIGN(frame_height, \ + min_buf_height_multiple)) #define HFI_NV12_IL_CALC_UV_STRIDE(stride, frame_width, stride_multiple) \ stride = HFI_ALIGN(frame_width, stride_multiple) #define HFI_NV12_IL_CALC_UV_BUFHEIGHT(buf_height, frame_height, \ - min_buf_height_multiple) buf_height = HFI_ALIGN(((frame_height + 1) \ - >> 1), min_buf_height_multiple) + min_buf_height_multiple) (buf_height = HFI_ALIGN(((frame_height + 1) \ + >> 1), min_buf_height_multiple)) #define HFI_NV12_IL_CALC_BUF_SIZE(buf_size, y_bufSize, y_stride, y_buf_height, \ uv_buf_size, uv_stride, uv_buf_height) \ y_bufSize = (y_stride * y_buf_height); \ uv_buf_size = (uv_stride * uv_buf_height); \ - buf_size = HFI_ALIGN(y_bufSize + uv_buf_size, HFI_ALIGNMENT_4096) + (buf_size = HFI_ALIGN(y_bufSize + uv_buf_size, HFI_ALIGNMENT_4096)) #define HFI_NV12_UBWC_IL_CALC_Y_BUF_SIZE(y_bufSize, y_stride, y_buf_height) \ - y_bufSize = HFI_ALIGN(y_stride * y_buf_height, HFI_ALIGNMENT_4096) + (y_bufSize = HFI_ALIGN(y_stride * y_buf_height, HFI_ALIGNMENT_4096)) #define HFI_NV12_UBWC_IL_CALC_UV_BUF_SIZE(uv_buf_size, \ uv_stride, uv_buf_height) \ - uv_buf_size = HFI_ALIGN(uv_stride * uv_buf_height, HFI_ALIGNMENT_4096) + (uv_buf_size = HFI_ALIGN(uv_stride * uv_buf_height, HFI_ALIGNMENT_4096)) #define HFI_NV12_UBWC_IL_CALC_BUF_SIZE_V2(buf_size,\ frame_width, frame_height, y_stride_multiple,\ @@ -130,7 +130,7 @@ typedef HFI_U32 HFI_BOOL; #define HFI_YUV420_TP10_CALC_Y_BUFHEIGHT(buf_height, frame_height, \ min_buf_height_multiple) \ - buf_height = HFI_ALIGN(frame_height, min_buf_height_multiple) + (buf_height = HFI_ALIGN(frame_height, min_buf_height_multiple)) #define HFI_YUV420_TP10_CALC_UV_STRIDE(stride, frame_width, stride_multiple) \ stride = HFI_ALIGN(frame_width, 192); \ @@ -138,8 +138,8 @@ typedef HFI_U32 HFI_BOOL; #define HFI_YUV420_TP10_CALC_UV_BUFHEIGHT(buf_height, frame_height, \ min_buf_height_multiple) \ - buf_height = HFI_ALIGN(((frame_height + 1) >> 1), \ - min_buf_height_multiple) + (buf_height = HFI_ALIGN(((frame_height + 1) >> 1), \ + min_buf_height_multiple)) #define HFI_YUV420_TP10_CALC_BUF_SIZE(buf_size, y_buf_size, y_stride,\ y_buf_height, uv_buf_size, uv_stride, uv_buf_height) \ @@ -149,11 +149,11 @@ typedef HFI_U32 HFI_BOOL; #define HFI_YUV420_TP10_UBWC_CALC_Y_BUF_SIZE(y_buf_size, y_stride, \ y_buf_height) \ - y_buf_size = HFI_ALIGN(y_stride * y_buf_height, HFI_ALIGNMENT_4096) + (y_buf_size = HFI_ALIGN(y_stride * y_buf_height, HFI_ALIGNMENT_4096)) #define HFI_YUV420_TP10_UBWC_CALC_UV_BUF_SIZE(uv_buf_size, uv_stride, \ uv_buf_height) \ - uv_buf_size = HFI_ALIGN(uv_stride * uv_buf_height, HFI_ALIGNMENT_4096) + (uv_buf_size = HFI_ALIGN(uv_stride * uv_buf_height, HFI_ALIGNMENT_4096)) #define HFI_YUV420_TP10_UBWC_CALC_BUF_SIZE(buf_size, y_stride, y_buf_height, \ uv_stride, uv_buf_height, y_md_stride, y_md_height, uv_md_stride, \ @@ -173,19 +173,19 @@ typedef HFI_U32 HFI_BOOL; } while (0) #define HFI_YUV420_P010_CALC_Y_STRIDE(stride, frame_width, stride_multiple) \ - stride = HFI_ALIGN(frame_width * 2, stride_multiple) + (stride = HFI_ALIGN(frame_width * 2, stride_multiple)) #define HFI_YUV420_P010_CALC_Y_BUFHEIGHT(buf_height, frame_height, \ min_buf_height_multiple) \ - buf_height = HFI_ALIGN(frame_height, min_buf_height_multiple) + (buf_height = HFI_ALIGN(frame_height, min_buf_height_multiple)) #define HFI_YUV420_P010_CALC_UV_STRIDE(stride, frame_width, stride_multiple) \ - stride = HFI_ALIGN(frame_width * 2, stride_multiple) + (stride = HFI_ALIGN(frame_width * 2, stride_multiple)) #define HFI_YUV420_P010_CALC_UV_BUFHEIGHT(buf_height, frame_height, \ min_buf_height_multiple) \ - buf_height = HFI_ALIGN(((frame_height + 1) >> 1), \ - min_buf_height_multiple) + (buf_height = HFI_ALIGN(((frame_height + 1) >> 1), \ + min_buf_height_multiple)) #define HFI_YUV420_P010_CALC_BUF_SIZE(buf_size, y_data_size, y_stride, \ y_buf_height, uv_data_size, uv_stride, uv_buf_height) \ @@ -198,30 +198,30 @@ typedef HFI_U32 HFI_BOOL; } while (0) #define HFI_RGB888_CALC_STRIDE(stride, frame_width, stride_multiple) \ - stride = ((frame_width * 3) + stride_multiple - 1) & \ - (0xffffffff - (stride_multiple - 1)) + (stride = ((frame_width * 3) + stride_multiple - 1) & \ + (0xffffffff - (stride_multiple - 1))) #define HFI_RGB888_CALC_BUFHEIGHT(buf_height, frame_height, \ min_buf_height_multiple) \ - buf_height = ((frame_height + min_buf_height_multiple - 1) & \ - (0xffffffff - (min_buf_height_multiple - 1))) + (buf_height = ((frame_height + min_buf_height_multiple - 1) & \ + (0xffffffff - (min_buf_height_multiple - 1)))) #define HFI_RGB888_CALC_BUF_SIZE(buf_size, stride, buf_height) \ - buf_size = ((stride) * (buf_height)) + (buf_size = ((stride) * (buf_height))) #define HFI_RGBA8888_CALC_STRIDE(stride, frame_width, stride_multiple) \ - stride = HFI_ALIGN((frame_width << 2), stride_multiple) + (stride = HFI_ALIGN((frame_width << 2), stride_multiple)) #define HFI_RGBA8888_CALC_BUFHEIGHT(buf_height, frame_height, \ min_buf_height_multiple) \ - buf_height = HFI_ALIGN(frame_height, min_buf_height_multiple) + (buf_height = HFI_ALIGN(frame_height, min_buf_height_multiple)) #define HFI_RGBA8888_CALC_BUF_SIZE(buf_size, stride, buf_height) \ - buf_size = (stride) * (buf_height) + (buf_size = (stride) * (buf_height)) #define HFI_RGBA8888_UBWC_CALC_DATA_PLANE_BUF_SIZE(buf_size, stride, \ buf_height) \ - buf_size = HFI_ALIGN((stride) * (buf_height), HFI_ALIGNMENT_4096) + (buf_size = HFI_ALIGN((stride) * (buf_height), HFI_ALIGNMENT_4096)) #define HFI_RGBA8888_UBWC_BUF_SIZE(buf_size, data_buf_size, \ metadata_buffer_size, stride, buf_height, _metadata_tride, \ @@ -234,31 +234,31 @@ typedef HFI_U32 HFI_BOOL; #define HFI_UBWC_CALC_METADATA_PLANE_STRIDE(metadata_stride, frame_width,\ metadata_stride_multiple, tile_width_in_pels) \ - metadata_stride = HFI_ALIGN(((frame_width + (tile_width_in_pels - 1)) /\ - tile_width_in_pels), metadata_stride_multiple) + (metadata_stride = HFI_ALIGN(((frame_width + (tile_width_in_pels - 1)) /\ + tile_width_in_pels), metadata_stride_multiple)) #define HFI_UBWC_METADATA_PLANE_BUFHEIGHT(metadata_buf_height, frame_height, \ metadata_height_multiple, tile_height_in_pels) \ - metadata_buf_height = HFI_ALIGN(((frame_height + \ + (metadata_buf_height = HFI_ALIGN(((frame_height + \ (tile_height_in_pels - 1)) / tile_height_in_pels), \ - metadata_height_multiple) + metadata_height_multiple)) #define HFI_UBWC_UV_METADATA_PLANE_STRIDE(metadata_stride, frame_width, \ metadata_stride_multiple, tile_width_in_pels) \ - metadata_stride = HFI_ALIGN(((((frame_width + 1) >> 1) +\ + (metadata_stride = HFI_ALIGN(((((frame_width + 1) >> 1) +\ (tile_width_in_pels - 1)) / tile_width_in_pels), \ - metadata_stride_multiple) + metadata_stride_multiple)) #define HFI_UBWC_UV_METADATA_PLANE_BUFHEIGHT(metadata_buf_height, frame_height,\ metadata_height_multiple, tile_height_in_pels) \ - metadata_buf_height = HFI_ALIGN(((((frame_height + 1) >> 1) + \ + (metadata_buf_height = HFI_ALIGN(((((frame_height + 1) >> 1) + \ (tile_height_in_pels - 1)) / tile_height_in_pels), \ - metadata_height_multiple) + metadata_height_multiple)) #define HFI_UBWC_METADATA_PLANE_BUFFER_SIZE(buffer_size, _metadata_tride, \ _metadata_buf_height) \ - buffer_size = HFI_ALIGN(_metadata_tride * _metadata_buf_height, \ - HFI_ALIGNMENT_4096) + (buffer_size = HFI_ALIGN(_metadata_tride * _metadata_buf_height, \ + HFI_ALIGNMENT_4096)) #define BUFFER_ALIGNMENT_512_BYTES 512 #define BUFFER_ALIGNMENT_256_BYTES 256 @@ -447,8 +447,7 @@ typedef HFI_U32 HFI_BOOL; VENUS_DMA_ALIGNMENT) * 2 + HFI_ALIGN(SIZE_H264D_QP\ (frame_width, frame_height), VENUS_DMA_ALIGNMENT); \ _size = HFI_ALIGN(_size, VENUS_DMA_ALIGNMENT); \ - if (is_opb) \ - { \ + if (is_opb) { \ SIZE_VPSS_LB(vpss_lb_size, frame_width, frame_height, \ num_vpp_pipes); \ } \ @@ -487,8 +486,7 @@ typedef HFI_U32 HFI_BOOL; BUFFER_ALIGNMENT_16_BYTES);\ HFI_U32 n_aligned_h = HFI_ALIGN(frame_height, \ BUFFER_ALIGNMENT_16_BYTES); \ - if (!is_interlaced) \ - { \ + if (!is_interlaced) { \ SIZE_H264D_HW_BIN_BUFFER(_size, n_aligned_w, \ n_aligned_h, delay, num_vpp_pipes); \ } \ @@ -684,13 +682,11 @@ typedef HFI_U32 HFI_BOOL; BUFFER_ALIGNMENT_16_BYTES); \ HFI_U32 n_aligned_h = HFI_ALIGN(frame_height, \ BUFFER_ALIGNMENT_16_BYTES); \ - if (!is_interlaced) \ - { \ + if (!is_interlaced) { \ SIZE_H265D_HW_BIN_BUFFER(_size, n_aligned_w, \ n_aligned_h, delay, num_vpp_pipes); \ } \ - else \ - { \ + else { \ _size = 0; \ } \ } while (0) @@ -848,8 +844,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ VENUS_DMA_ALIGNMENT) + \ HFI_ALIGN(SIZE_MP2D_LB_FE_TOP_DATA(frame_width, frame_height), \ VENUS_DMA_ALIGNMENT); \ - if (is_opb) \ - { \ + if (is_opb) { \ SIZE_VPSS_LB(vpss_lb_size, frame_width, frame_height, \ num_vpp_pipes); \ } \ @@ -1054,8 +1049,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ SIZE_AV1D_LB_OPB_WR1_TP10_UBWC(opbwr10, frame_width, frame_height); \ opbwr1BufSize = MAX(opbwr8, opbwr10); \ _size = HFI_ALIGN((_size + opbwr1BufSize), VENUS_DMA_ALIGNMENT); \ - if (isOPB) \ - { \ + if (isOPB) { \ SIZE_VPSS_LB(vpssLBSize, frame_width, frame_height, num_vpp_pipes); \ _size = HFI_ALIGN((_size + vpssLBSize), VENUS_DMA_ALIGNMENT); \ } \ @@ -1098,13 +1092,11 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ do { \ HFI_U32 nAlignedW = HFI_ALIGN(frame_width, BUFFER_ALIGNMENT_16_BYTES); \ HFI_U32 nAlignedH = HFI_ALIGN(frame_height, BUFFER_ALIGNMENT_16_BYTES); \ - if (!isInterlaced) \ - { \ + if (!isInterlaced) { \ SIZE_AV1D_HW_BIN_BUFFER(_size, nAlignedW, nAlignedH, \ delay, num_vpp_pipes); \ } \ - else \ - { \ + else { \ _size = 0; \ } \ } while (0) @@ -1148,26 +1140,22 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ aligned_height = HFI_ALIGN(frame_height, 32); \ bitstream_size = aligned_width * aligned_height * 3; \ yuv_size = (aligned_width * aligned_height * 3) >> 1; \ - if (aligned_width * aligned_height > (4096 * 2176)) \ - { \ + if (aligned_width * aligned_height > (4096 * 2176)) { \ /* bitstream_size = 0.25 * yuv_size; */ \ bitstream_size = (bitstream_size >> 3); \ } \ - else if (aligned_width * aligned_height > (1280 * 720)) \ - { \ + else if (aligned_width * aligned_height > (1280 * 720)) { \ /* bitstream_size = 0.5 * yuv_size; */ \ bitstream_size = (bitstream_size >> 2); \ } \ - else \ - { \ + else { \ /* bitstream_size = 2 * yuv_size; */ \ } \ - if (((rc_type == HFI_RC_CQ) || (rc_type == HFI_RC_OFF)) && (bitstream_size < yuv_size)) \ - { \ + if (((rc_type == HFI_RC_CQ) || (rc_type == HFI_RC_OFF)) \ + && (bitstream_size < yuv_size)) { \ bitstream_size = (bitstream_size << 1);\ } \ - if (is_ten_bit) \ - { \ + if (is_ten_bit) { \ bitstream_size = (bitstream_size) + \ (bitstream_size >> 2); \ } \ @@ -1181,8 +1169,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ HFI_U32 min_tile_size = 352, fixed_tile_width = 960; \ without_tile_enc_width = min_tile_size + fixed_tile_width; \ if ((codec_standard == HFI_CODEC_ENCODE_HEVC) && \ - (frame_width_coded > without_tile_enc_width)) \ - { \ + (frame_width_coded > without_tile_enc_width)) { \ tile_size = fixed_tile_width; \ tile_count = (frame_width_coded + tile_size - 1) / tile_size; \ last_tile_size = (frame_width_coded - (tile_size * (tile_count - 1))); \ @@ -1192,8 +1179,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ last_tile_size = (tile_size + min_tile_size); \ } \ } \ - else \ - { \ + else { \ tile_size = frame_width_coded; \ tile_count = 1; \ last_tile_size = 0; \ @@ -1215,8 +1201,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ mbs_in_one_tile = (tile_size * frame_height_coded) / (lcu_size * lcu_size); \ slice_count_per_tile = \ (mbs_in_one_tile + multi_slice_max_mb_count - 1) / (multi_slice_max_mb_count); \ - if (last_tile_size) \ - { \ + if (last_tile_size) { \ mbs_in_last_tile = \ (last_tile_size * frame_height_coded) / (lcu_size * lcu_size); \ slice_count_in_last_tile = \ @@ -1224,8 +1209,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ total_slice_count = \ (slice_count_per_tile * (tile_count - 1)) + slice_count_in_last_tile; \ } \ - else \ - { \ + else { \ total_slice_count = (slice_count_per_tile * tile_count); \ } \ } while (0) @@ -1248,8 +1232,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ is_roi_enabled, lcu_size) \ do { \ HFI_U32 roi_size = 0; \ - if (is_roi_enabled) \ - { \ + if (is_roi_enabled) { \ SIZE_ROI_METADATA_ENC(roi_size, frame_width, \ frame_height, lcu_size); \ } \ @@ -1296,8 +1279,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ HFI_U32 num_ref = 1; \ if (n_bframe) \ num_ref = 2; \ - if (_total_hp_layers > 1) \ - { \ + if (_total_hp_layers > 1) { \ if (hybrid_hp) \ num_ref = (_total_hp_layers + 1) >> 1; \ else if (codec_standard == HFI_CODEC_ENCODE_HEVC) \ @@ -1310,8 +1292,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ } \ if (ltr_count) \ num_ref = num_ref + ltr_count; \ - if (_total_hb_layers > 1) \ - { \ + if (_total_hb_layers > 1) { \ if (codec_standard == HFI_CODEC_ENCODE_HEVC) \ num_ref = (_total_hb_layers); \ else if (codec_standard == HFI_CODEC_ENCODE_AVC) \ @@ -1327,8 +1308,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ HFI_U32 bitstream_size_eval = 0; \ size_aligned_width = HFI_ALIGN((frame_width), lcu_size); \ size_aligned_height = HFI_ALIGN((frame_height), lcu_size); \ - if (work_mode == HFI_WORKMODE_2) \ - { \ + if (work_mode == HFI_WORKMODE_2) { \ if ((rc_type == HFI_RC_CQ) || (rc_type == HFI_RC_OFF)) \ { \ bitstream_size_eval = (((size_aligned_width) * \ @@ -1338,28 +1318,24 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ { \ bitstream_size_eval = ((size_aligned_width) * \ (size_aligned_height) * 3); \ - if (rc_type == HFI_RC_LOSSLESS) \ - { \ + if (rc_type == HFI_RC_LOSSLESS) { \ bitstream_size_eval = (bitstream_size_eval * 3 >> 2); \ } \ else if ((size_aligned_width * size_aligned_height) > \ - (4096 * 2176)) \ - { \ + (4096 * 2176)) { \ bitstream_size_eval >>= 3; \ } \ - else if ((size_aligned_width * size_aligned_height) > (480 * 320)) \ - { \ + else if ((size_aligned_width * size_aligned_height) > \ + (480 * 320)) { \ bitstream_size_eval >>= 2; \ } \ if (profile == HFI_H265_PROFILE_MAIN_10 || \ - profile == HFI_H265_PROFILE_MAIN_10_STILL_PICTURE) \ - { \ + profile == HFI_H265_PROFILE_MAIN_10_STILL_PICTURE) { \ bitstream_size_eval = (bitstream_size_eval * 5 >> 2); \ } \ } \ } \ - else \ - { \ + else { \ bitstream_size_eval = size_aligned_width * \ size_aligned_height * 3; \ } \ @@ -1375,20 +1351,16 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ size_aligned_width = HFI_ALIGN((frame_width), lcu_size); \ size_aligned_height = HFI_ALIGN((frame_height), lcu_size); \ if ((size_aligned_width * size_aligned_height) > \ - (3840 * 2160)) \ - { \ + (3840 * 2160)) { \ size_single_pipe_eval = (bitbin_size / num_vpp_pipes); \ } \ - else if (num_vpp_pipes > 2) \ - { \ + else if (num_vpp_pipes > 2) { \ size_single_pipe_eval = bitbin_size / 2; \ } \ - else \ - { \ + else { \ size_single_pipe_eval = bitbin_size; \ } \ - if (rc_type == HFI_RC_LOSSLESS) \ - { \ + if (rc_type == HFI_RC_LOSSLESS) { \ size_single_pipe_eval = (size_single_pipe_eval << 1); \ } \ sao_bin_buffer_size = (64 * ((((frame_width) + \ @@ -1409,20 +1381,17 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ size_single_pipe = 0, bitbin_size = 0; \ SIZE_BIN_BITSTREAM_ENC(bitstream_size, rc_type, frame_width, \ frame_height, work_mode, lcu_size, profile); \ - if (work_mode == HFI_WORKMODE_2) \ - { \ + if (work_mode == HFI_WORKMODE_2) { \ total_bitbin_buffers = 3; \ bitbin_size = bitstream_size * 12 / 10; \ bitbin_size = HFI_ALIGN(bitbin_size, \ VENUS_DMA_ALIGNMENT); \ } \ - else if ((lcu_size == 16) || (num_vpp_pipes > 1)) \ - { \ + else if ((lcu_size == 16) || (num_vpp_pipes > 1)) { \ total_bitbin_buffers = 1; \ bitbin_size = bitstream_size; \ } \ - if (total_bitbin_buffers > 0) \ - { \ + if (total_bitbin_buffers > 0) { \ SIZE_ENC_SINGLE_PIPE(size_single_pipe, rc_type, bitbin_size, \ num_vpp_pipes, frame_width, frame_height, lcu_size); \ bitbin_size = size_single_pipe * num_vpp_pipes; \ @@ -1430,10 +1399,8 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ total_bitbin_buffers + 512; \ } \ else \ - /* Avoid 512 Bytes allocation in case of 1Pipe HEVC Direct Mode*/\ - { \ + /* Avoid 512 Bytes allocation in case of 1Pipe HEVC Direct Mode*/ \ _size = 0; \ - } \ } while (0) #define HFI_BUFFER_BIN_H264E(_size, rc_type, frame_width, frame_height, \ @@ -1479,8 +1446,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ (((frame_height_coded) + \ (BUF_SIZE_ALIGN_32)) / BUF_SIZE_ALIGN_32 * 4 * 16) : \ (((frame_height_coded) + 15) / 16 * 5 * 16); \ - if ((num_vpp_pipes_enc) > 1) \ - { \ + if ((num_vpp_pipes_enc) > 1) { \ _size += BUFFER_ALIGNMENT_512_BYTES; \ _size = HFI_ALIGN(_size, BUFFER_ALIGNMENT_512_BYTES) *\ (num_vpp_pipes_enc); \ @@ -1545,8 +1511,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ (14 + ((((frame_height_coded) >> 5) + 7) >> 3))) : \ (256 + 16 * (14 + ((((frame_height_coded) >> 4) + 7) >> 3))); \ _size *= 11; \ - if (num_vpp_pipes_enc > 1) \ - { \ + if (num_vpp_pipes_enc > 1) { \ _size = HFI_ALIGN(_size, VENUS_DMA_ALIGNMENT) * \ num_vpp_pipes_enc;\ } \ @@ -1762,8 +1727,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ HFI_U32 metadata_stride, metadata_buf_height, meta_size_y, \ meta_size_c; \ HFI_U32 ten_bit_ref_buf_size = 0, ref_buf_size = 0; \ - if (!is_ten_bit) \ - { \ + if (!is_ten_bit) { \ SIZE_ENC_REF_BUFFER(ref_buf_size, frame_width, \ frame_height); \ HFI_UBWC_CALC_METADATA_PLANE_STRIDE(metadata_stride, \ @@ -1778,8 +1742,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ metadata_stride, metadata_buf_height); \ _size = ref_buf_size + meta_size_y + meta_size_c; \ } \ - else \ - { \ + else { \ SIZE_ENC_TEN_BIT_REF_BUFFER(ten_bit_ref_buf_size, \ frame_width, frame_height); \ HFI_UBWC_CALC_METADATA_PLANE_STRIDE(metadata_stride, \ @@ -1810,8 +1773,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define HFI_BUFFER_VPSS_ENC(vpss_size, dswidth, dsheight, ds_enable, blur, is_ten_bit) \ do { \ vpss_size = 0; \ - if (ds_enable || blur) \ - { \ + if (ds_enable || blur) { \ HFI_BUFFER_DPB_ENC(vpss_size, dswidth, dsheight, is_ten_bit); \ } \ } while (0) diff --git a/driver/variant/iris33/inc/hfi_buffer_iris33.h b/driver/variant/iris33/inc/hfi_buffer_iris33.h index 9588687133..ee26a1017c 100644 --- a/driver/variant/iris33/inc/hfi_buffer_iris33.h +++ b/driver/variant/iris33/inc/hfi_buffer_iris33.h @@ -58,18 +58,18 @@ typedef HFI_U32 HFI_BOOL; #define HFI_COLOR_FORMAT_RGBA8888_UBWC_TILE_WIDTH (16) #define HFI_NV12_IL_CALC_Y_STRIDE(stride, frame_width, stride_multiple) \ - stride = HFI_ALIGN(frame_width, stride_multiple) + (stride = HFI_ALIGN(frame_width, stride_multiple)) #define HFI_NV12_IL_CALC_Y_BUFHEIGHT(buf_height, frame_height, \ - min_buf_height_multiple) buf_height = HFI_ALIGN(frame_height, \ - min_buf_height_multiple) + min_buf_height_multiple) (buf_height = HFI_ALIGN(frame_height, \ + min_buf_height_multiple)) #define HFI_NV12_IL_CALC_UV_STRIDE(stride, frame_width, stride_multiple) \ stride = HFI_ALIGN(frame_width, stride_multiple) #define HFI_NV12_IL_CALC_UV_BUFHEIGHT(buf_height, frame_height, \ - min_buf_height_multiple) buf_height = HFI_ALIGN(((frame_height + 1) \ - >> 1), min_buf_height_multiple) + min_buf_height_multiple) (buf_height = HFI_ALIGN(((frame_height + 1) \ + >> 1), min_buf_height_multiple)) #define HFI_NV12_IL_CALC_BUF_SIZE(buf_size, y_bufSize, y_stride, y_buf_height, \ uv_buf_size, uv_stride, uv_buf_height) \ @@ -78,11 +78,11 @@ typedef HFI_U32 HFI_BOOL; buf_size = HFI_ALIGN(y_bufSize + uv_buf_size, HFI_ALIGNMENT_4096) #define HFI_NV12_UBWC_IL_CALC_Y_BUF_SIZE(y_bufSize, y_stride, y_buf_height) \ - y_bufSize = HFI_ALIGN(y_stride * y_buf_height, HFI_ALIGNMENT_4096) + (y_bufSize = HFI_ALIGN(y_stride * y_buf_height, HFI_ALIGNMENT_4096)) #define HFI_NV12_UBWC_IL_CALC_UV_BUF_SIZE(uv_buf_size, \ uv_stride, uv_buf_height) \ - uv_buf_size = HFI_ALIGN(uv_stride * uv_buf_height, HFI_ALIGNMENT_4096) + (uv_buf_size = HFI_ALIGN(uv_stride * uv_buf_height, HFI_ALIGNMENT_4096)) #define HFI_NV12_UBWC_IL_CALC_BUF_SIZE_V2(buf_size,\ frame_width, frame_height, y_stride_multiple,\ @@ -130,7 +130,7 @@ typedef HFI_U32 HFI_BOOL; #define HFI_YUV420_TP10_CALC_Y_BUFHEIGHT(buf_height, frame_height, \ min_buf_height_multiple) \ - buf_height = HFI_ALIGN(frame_height, min_buf_height_multiple) + (buf_height = HFI_ALIGN(frame_height, min_buf_height_multiple)) #define HFI_YUV420_TP10_CALC_UV_STRIDE(stride, frame_width, stride_multiple) \ stride = HFI_ALIGN(frame_width, 192); \ @@ -138,8 +138,8 @@ typedef HFI_U32 HFI_BOOL; #define HFI_YUV420_TP10_CALC_UV_BUFHEIGHT(buf_height, frame_height, \ min_buf_height_multiple) \ - buf_height = HFI_ALIGN(((frame_height + 1) >> 1), \ - min_buf_height_multiple) + (buf_height = HFI_ALIGN(((frame_height + 1) >> 1), \ + min_buf_height_multiple)) #define HFI_YUV420_TP10_CALC_BUF_SIZE(buf_size, y_buf_size, y_stride,\ y_buf_height, uv_buf_size, uv_stride, uv_buf_height) \ @@ -149,11 +149,11 @@ typedef HFI_U32 HFI_BOOL; #define HFI_YUV420_TP10_UBWC_CALC_Y_BUF_SIZE(y_buf_size, y_stride, \ y_buf_height) \ - y_buf_size = HFI_ALIGN(y_stride * y_buf_height, HFI_ALIGNMENT_4096) + (y_buf_size = HFI_ALIGN(y_stride * y_buf_height, HFI_ALIGNMENT_4096)) #define HFI_YUV420_TP10_UBWC_CALC_UV_BUF_SIZE(uv_buf_size, uv_stride, \ uv_buf_height) \ - uv_buf_size = HFI_ALIGN(uv_stride * uv_buf_height, HFI_ALIGNMENT_4096) + (uv_buf_size = HFI_ALIGN(uv_stride * uv_buf_height, HFI_ALIGNMENT_4096)) #define HFI_YUV420_TP10_UBWC_CALC_BUF_SIZE(buf_size, y_stride, y_buf_height, \ uv_stride, uv_buf_height, y_md_stride, y_md_height, uv_md_stride, \ @@ -173,19 +173,19 @@ typedef HFI_U32 HFI_BOOL; } while (0) #define HFI_YUV420_P010_CALC_Y_STRIDE(stride, frame_width, stride_multiple) \ - stride = HFI_ALIGN(frame_width * 2, stride_multiple) + (stride = HFI_ALIGN(frame_width * 2, stride_multiple)) #define HFI_YUV420_P010_CALC_Y_BUFHEIGHT(buf_height, frame_height, \ min_buf_height_multiple) \ - buf_height = HFI_ALIGN(frame_height, min_buf_height_multiple) + (buf_height = HFI_ALIGN(frame_height, min_buf_height_multiple)) #define HFI_YUV420_P010_CALC_UV_STRIDE(stride, frame_width, stride_multiple) \ - stride = HFI_ALIGN(frame_width * 2, stride_multiple) + (stride = HFI_ALIGN(frame_width * 2, stride_multiple)) #define HFI_YUV420_P010_CALC_UV_BUFHEIGHT(buf_height, frame_height, \ min_buf_height_multiple) \ - buf_height = HFI_ALIGN(((frame_height + 1) >> 1), \ - min_buf_height_multiple) + (buf_height = HFI_ALIGN(((frame_height + 1) >> 1), \ + min_buf_height_multiple)) #define HFI_YUV420_P010_CALC_BUF_SIZE(buf_size, y_data_size, y_stride, \ y_buf_height, uv_data_size, uv_stride, uv_buf_height) \ @@ -198,30 +198,30 @@ typedef HFI_U32 HFI_BOOL; } while (0) #define HFI_RGB888_CALC_STRIDE(stride, frame_width, stride_multiple) \ - stride = ((frame_width * 3) + stride_multiple - 1) & \ - (0xffffffff - (stride_multiple - 1)) + (stride = ((frame_width * 3) + stride_multiple - 1) & \ + (0xffffffff - (stride_multiple - 1))) #define HFI_RGB888_CALC_BUFHEIGHT(buf_height, frame_height, \ min_buf_height_multiple) \ - buf_height = ((frame_height + min_buf_height_multiple - 1) & \ - (0xffffffff - (min_buf_height_multiple - 1))) + (buf_height = ((frame_height + min_buf_height_multiple - 1) & \ + (0xffffffff - (min_buf_height_multiple - 1)))) #define HFI_RGB888_CALC_BUF_SIZE(buf_size, stride, buf_height) \ - buf_size = ((stride) * (buf_height)) + (buf_size = ((stride) * (buf_height))) #define HFI_RGBA8888_CALC_STRIDE(stride, frame_width, stride_multiple) \ - stride = HFI_ALIGN((frame_width << 2), stride_multiple) + (stride = HFI_ALIGN((frame_width << 2), stride_multiple)) #define HFI_RGBA8888_CALC_BUFHEIGHT(buf_height, frame_height, \ min_buf_height_multiple) \ - buf_height = HFI_ALIGN(frame_height, min_buf_height_multiple) + (buf_height = HFI_ALIGN(frame_height, min_buf_height_multiple)) #define HFI_RGBA8888_CALC_BUF_SIZE(buf_size, stride, buf_height) \ - buf_size = (stride) * (buf_height) + (buf_size = (stride) * (buf_height)) #define HFI_RGBA8888_UBWC_CALC_DATA_PLANE_BUF_SIZE(buf_size, stride, \ buf_height) \ - buf_size = HFI_ALIGN((stride) * (buf_height), HFI_ALIGNMENT_4096) + (buf_size = HFI_ALIGN((stride) * (buf_height), HFI_ALIGNMENT_4096)) #define HFI_RGBA8888_UBWC_BUF_SIZE(buf_size, data_buf_size, \ metadata_buffer_size, stride, buf_height, _metadata_tride, \ @@ -234,31 +234,31 @@ typedef HFI_U32 HFI_BOOL; #define HFI_UBWC_CALC_METADATA_PLANE_STRIDE(metadata_stride, frame_width,\ metadata_stride_multiple, tile_width_in_pels) \ - metadata_stride = HFI_ALIGN(((frame_width + (tile_width_in_pels - 1)) /\ - tile_width_in_pels), metadata_stride_multiple) + (metadata_stride = HFI_ALIGN(((frame_width + (tile_width_in_pels - 1)) /\ + tile_width_in_pels), metadata_stride_multiple)) #define HFI_UBWC_METADATA_PLANE_BUFHEIGHT(metadata_buf_height, frame_height, \ metadata_height_multiple, tile_height_in_pels) \ - metadata_buf_height = HFI_ALIGN(((frame_height + \ + (metadata_buf_height = HFI_ALIGN(((frame_height + \ (tile_height_in_pels - 1)) / tile_height_in_pels), \ - metadata_height_multiple) + metadata_height_multiple)) #define HFI_UBWC_UV_METADATA_PLANE_STRIDE(metadata_stride, frame_width, \ metadata_stride_multiple, tile_width_in_pels) \ - metadata_stride = HFI_ALIGN(((((frame_width + 1) >> 1) +\ + (metadata_stride = HFI_ALIGN(((((frame_width + 1) >> 1) +\ (tile_width_in_pels - 1)) / tile_width_in_pels), \ - metadata_stride_multiple) + metadata_stride_multiple)) #define HFI_UBWC_UV_METADATA_PLANE_BUFHEIGHT(metadata_buf_height, frame_height,\ metadata_height_multiple, tile_height_in_pels) \ - metadata_buf_height = HFI_ALIGN(((((frame_height + 1) >> 1) + \ + (metadata_buf_height = HFI_ALIGN(((((frame_height + 1) >> 1) + \ (tile_height_in_pels - 1)) / tile_height_in_pels), \ - metadata_height_multiple) + metadata_height_multiple)) #define HFI_UBWC_METADATA_PLANE_BUFFER_SIZE(buffer_size, _metadata_tride, \ _metadata_buf_height) \ - buffer_size = HFI_ALIGN(_metadata_tride * _metadata_buf_height, \ - HFI_ALIGNMENT_4096) + (buffer_size = HFI_ALIGN(_metadata_tride * _metadata_buf_height, \ + HFI_ALIGNMENT_4096)) #define BUFFER_ALIGNMENT_512_BYTES 512 #define BUFFER_ALIGNMENT_256_BYTES 256 @@ -447,8 +447,7 @@ typedef HFI_U32 HFI_BOOL; VENUS_DMA_ALIGNMENT) * 2 + HFI_ALIGN(SIZE_H264D_QP\ (frame_width, frame_height), VENUS_DMA_ALIGNMENT); \ _size = HFI_ALIGN(_size, VENUS_DMA_ALIGNMENT); \ - if (is_opb) \ - { \ + if (is_opb) { \ SIZE_VPSS_LB(vpss_lb_size, frame_width, frame_height, \ num_vpp_pipes); \ } \ @@ -487,8 +486,7 @@ typedef HFI_U32 HFI_BOOL; BUFFER_ALIGNMENT_16_BYTES);\ HFI_U32 n_aligned_h = HFI_ALIGN(frame_height, \ BUFFER_ALIGNMENT_16_BYTES); \ - if (!is_interlaced) \ - { \ + if (!is_interlaced) { \ SIZE_H264D_HW_BIN_BUFFER(_size, n_aligned_w, \ n_aligned_h, delay, num_vpp_pipes); \ } \ @@ -684,13 +682,11 @@ typedef HFI_U32 HFI_BOOL; BUFFER_ALIGNMENT_16_BYTES); \ HFI_U32 n_aligned_h = HFI_ALIGN(frame_height, \ BUFFER_ALIGNMENT_16_BYTES); \ - if (!is_interlaced) \ - { \ + if (!is_interlaced) { \ SIZE_H265D_HW_BIN_BUFFER(_size, n_aligned_w, \ n_aligned_h, delay, num_vpp_pipes); \ } \ - else \ - { \ + else { \ _size = 0; \ } \ } while (0) @@ -848,8 +844,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ VENUS_DMA_ALIGNMENT) + \ HFI_ALIGN(SIZE_MP2D_LB_FE_TOP_DATA(frame_width, frame_height), \ VENUS_DMA_ALIGNMENT); \ - if (is_opb) \ - { \ + if (is_opb) { \ SIZE_VPSS_LB(vpss_lb_size, frame_width, frame_height, \ num_vpp_pipes); \ } \ @@ -1054,8 +1049,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ SIZE_AV1D_LB_OPB_WR1_TP10_UBWC(opbwr10, frame_width, frame_height); \ opbwr1BufSize = MAX(opbwr8, opbwr10); \ _size = HFI_ALIGN((_size + opbwr1BufSize), VENUS_DMA_ALIGNMENT); \ - if (isOPB) \ - { \ + if (isOPB) { \ SIZE_VPSS_LB(vpssLBSize, frame_width, frame_height, num_vpp_pipes); \ _size = HFI_ALIGN((_size + vpssLBSize), VENUS_DMA_ALIGNMENT); \ } \ @@ -1098,13 +1092,11 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ do { \ HFI_U32 nAlignedW = HFI_ALIGN(frame_width, BUFFER_ALIGNMENT_16_BYTES); \ HFI_U32 nAlignedH = HFI_ALIGN(frame_height, BUFFER_ALIGNMENT_16_BYTES); \ - if (!isInterlaced) \ - { \ + if (!isInterlaced) { \ SIZE_AV1D_HW_BIN_BUFFER(_size, nAlignedW, nAlignedH, \ delay, num_vpp_pipes); \ } \ - else \ - { \ + else { \ _size = 0; \ } \ } while (0) @@ -1148,26 +1140,22 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ aligned_height = HFI_ALIGN(frame_height, 32); \ bitstream_size = aligned_width * aligned_height * 3; \ yuv_size = (aligned_width * aligned_height * 3) >> 1; \ - if (aligned_width * aligned_height > (4096 * 2176)) \ - { \ + if (aligned_width * aligned_height > (4096 * 2176)) { \ /* bitstream_size = 0.25 * yuv_size; */ \ bitstream_size = (bitstream_size >> 3); \ } \ - else if (aligned_width * aligned_height > (1280 * 720)) \ - { \ + else if (aligned_width * aligned_height > (1280 * 720)) { \ /* bitstream_size = 0.5 * yuv_size; */ \ bitstream_size = (bitstream_size >> 2); \ } \ - else \ - { \ + else { \ /* bitstream_size = 2 * yuv_size; */ \ } \ - if (((rc_type == HFI_RC_CQ) || (rc_type == HFI_RC_OFF)) && (bitstream_size < yuv_size)) \ - { \ + if (((rc_type == HFI_RC_CQ) || (rc_type == HFI_RC_OFF)) \ + && (bitstream_size < yuv_size)) { \ bitstream_size = (bitstream_size << 1);\ } \ - if (is_ten_bit) \ - { \ + if (is_ten_bit) { \ bitstream_size = (bitstream_size) + \ (bitstream_size >> 2); \ } \ @@ -1181,8 +1169,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ HFI_U32 min_tile_size = 352, fixed_tile_width = 960; \ without_tile_enc_width = min_tile_size + fixed_tile_width; \ if ((codec_standard == HFI_CODEC_ENCODE_HEVC) && \ - (frame_width_coded > without_tile_enc_width)) \ - { \ + (frame_width_coded > without_tile_enc_width)) { \ tile_size = fixed_tile_width; \ tile_count = (frame_width_coded + tile_size - 1) / tile_size; \ last_tile_size = (frame_width_coded - (tile_size * (tile_count - 1))); \ @@ -1192,8 +1179,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ last_tile_size = (tile_size + min_tile_size); \ } \ } \ - else \ - { \ + else { \ tile_size = frame_width_coded; \ tile_count = 1; \ last_tile_size = 0; \ @@ -1215,8 +1201,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ mbs_in_one_tile = (tile_size * frame_height_coded) / (lcu_size * lcu_size); \ slice_count_per_tile = \ (mbs_in_one_tile + multi_slice_max_mb_count - 1) / (multi_slice_max_mb_count); \ - if (last_tile_size) \ - { \ + if (last_tile_size) { \ mbs_in_last_tile = \ (last_tile_size * frame_height_coded) / (lcu_size * lcu_size); \ slice_count_in_last_tile = \ @@ -1224,8 +1209,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ total_slice_count = \ (slice_count_per_tile * (tile_count - 1)) + slice_count_in_last_tile; \ } \ - else \ - { \ + else { \ total_slice_count = (slice_count_per_tile * tile_count); \ } \ } while (0) @@ -1248,8 +1232,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ is_roi_enabled, lcu_size) \ do { \ HFI_U32 roi_size = 0; \ - if (is_roi_enabled) \ - { \ + if (is_roi_enabled) { \ SIZE_ROI_METADATA_ENC(roi_size, frame_width, \ frame_height, lcu_size); \ } \ @@ -1296,8 +1279,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ HFI_U32 num_ref = 1; \ if (n_bframe) \ num_ref = 2; \ - if (_total_hp_layers > 1) \ - { \ + if (_total_hp_layers > 1) { \ if (hybrid_hp) \ num_ref = (_total_hp_layers + 1) >> 1; \ else if (codec_standard == HFI_CODEC_ENCODE_HEVC) \ @@ -1310,8 +1292,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ } \ if (ltr_count) \ num_ref = num_ref + ltr_count; \ - if (_total_hb_layers > 1) \ - { \ + if (_total_hb_layers > 1) { \ if (codec_standard == HFI_CODEC_ENCODE_HEVC) \ num_ref = (_total_hb_layers); \ else if (codec_standard == HFI_CODEC_ENCODE_AVC) \ @@ -1327,8 +1308,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ HFI_U32 bitstream_size_eval = 0; \ size_aligned_width = HFI_ALIGN((frame_width), lcu_size); \ size_aligned_height = HFI_ALIGN((frame_height), lcu_size); \ - if (work_mode == HFI_WORKMODE_2) \ - { \ + if (work_mode == HFI_WORKMODE_2) { \ if ((rc_type == HFI_RC_CQ) || (rc_type == HFI_RC_OFF)) \ { \ bitstream_size_eval = (((size_aligned_width) * \ @@ -1338,28 +1318,24 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ { \ bitstream_size_eval = ((size_aligned_width) * \ (size_aligned_height) * 3); \ - if (rc_type == HFI_RC_LOSSLESS) \ - { \ + if (rc_type == HFI_RC_LOSSLESS) { \ bitstream_size_eval = (bitstream_size_eval * 3 >> 2); \ } \ else if ((size_aligned_width * size_aligned_height) > \ - (4096 * 2176)) \ - { \ + (4096 * 2176)) { \ bitstream_size_eval >>= 3; \ } \ - else if ((size_aligned_width * size_aligned_height) > (480 * 320)) \ - { \ + else if ((size_aligned_width * size_aligned_height) > \ + (480 * 320)) { \ bitstream_size_eval >>= 2; \ } \ if (profile == HFI_H265_PROFILE_MAIN_10 || \ - profile == HFI_H265_PROFILE_MAIN_10_STILL_PICTURE) \ - { \ + profile == HFI_H265_PROFILE_MAIN_10_STILL_PICTURE) { \ bitstream_size_eval = (bitstream_size_eval * 5 >> 2); \ } \ } \ } \ - else \ - { \ + else { \ bitstream_size_eval = size_aligned_width * \ size_aligned_height * 3; \ } \ @@ -1375,20 +1351,16 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ size_aligned_width = HFI_ALIGN((frame_width), lcu_size); \ size_aligned_height = HFI_ALIGN((frame_height), lcu_size); \ if ((size_aligned_width * size_aligned_height) > \ - (3840 * 2160)) \ - { \ + (3840 * 2160)) { \ size_single_pipe_eval = (bitbin_size / num_vpp_pipes); \ } \ - else if (num_vpp_pipes > 2) \ - { \ + else if (num_vpp_pipes > 2) { \ size_single_pipe_eval = bitbin_size / 2; \ } \ - else \ - { \ + else { \ size_single_pipe_eval = bitbin_size; \ } \ - if (rc_type == HFI_RC_LOSSLESS) \ - { \ + if (rc_type == HFI_RC_LOSSLESS) { \ size_single_pipe_eval = (size_single_pipe_eval << 1); \ } \ sao_bin_buffer_size = (64 * ((((frame_width) + \ @@ -1409,20 +1381,17 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ size_single_pipe = 0, bitbin_size = 0; \ SIZE_BIN_BITSTREAM_ENC(bitstream_size, rc_type, frame_width, \ frame_height, work_mode, lcu_size, profile); \ - if (work_mode == HFI_WORKMODE_2) \ - { \ + if (work_mode == HFI_WORKMODE_2) { \ total_bitbin_buffers = (ring_buf_count > 3) ? ring_buf_count : 3; \ bitbin_size = bitstream_size * 17 / 10; \ bitbin_size = HFI_ALIGN(bitbin_size, \ VENUS_DMA_ALIGNMENT); \ } \ - else if ((lcu_size == 16) || (num_vpp_pipes > 1)) \ - { \ + else if ((lcu_size == 16) || (num_vpp_pipes > 1)) { \ total_bitbin_buffers = 1; \ bitbin_size = bitstream_size; \ } \ - if (total_bitbin_buffers > 0) \ - { \ + if (total_bitbin_buffers > 0) { \ SIZE_ENC_SINGLE_PIPE(size_single_pipe, rc_type, bitbin_size, \ num_vpp_pipes, frame_width, frame_height, lcu_size); \ bitbin_size = size_single_pipe * num_vpp_pipes; \ @@ -1430,10 +1399,8 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ total_bitbin_buffers + 512; \ } \ else \ - /* Avoid 512 Bytes allocation in case of 1Pipe HEVC Direct Mode*/\ - { \ + /* Avoid 512 Bytes allocation in case of 1Pipe HEVC Direct Mode*/ \ _size = 0; \ - } \ } while (0) #define HFI_BUFFER_BIN_H264E(_size, rc_type, frame_width, frame_height, \ @@ -1479,8 +1446,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ (((frame_height_coded) + \ (BUF_SIZE_ALIGN_32)) / BUF_SIZE_ALIGN_32 * 4 * 16) : \ (((frame_height_coded) + 15) / 16 * 5 * 16); \ - if ((num_vpp_pipes_enc) > 1) \ - { \ + if ((num_vpp_pipes_enc) > 1) { \ _size += BUFFER_ALIGNMENT_512_BYTES; \ _size = HFI_ALIGN(_size, BUFFER_ALIGNMENT_512_BYTES) *\ (num_vpp_pipes_enc); \ @@ -1545,8 +1511,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ (14 + ((((frame_height_coded) >> 5) + 7) >> 3))) : \ (256 + 16 * (14 + ((((frame_height_coded) >> 4) + 7) >> 3))); \ _size *= 11; \ - if (num_vpp_pipes_enc > 1) \ - { \ + if (num_vpp_pipes_enc > 1) { \ _size = HFI_ALIGN(_size, VENUS_DMA_ALIGNMENT) * \ num_vpp_pipes_enc;\ } \ @@ -1764,8 +1729,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ HFI_U32 metadata_stride, metadata_buf_height, meta_size_y, \ meta_size_c; \ HFI_U32 ten_bit_ref_buf_size = 0, ref_buf_size = 0; \ - if (!is_ten_bit) \ - { \ + if (!is_ten_bit) { \ SIZE_ENC_REF_BUFFER(ref_buf_size, frame_width, \ frame_height); \ HFI_UBWC_CALC_METADATA_PLANE_STRIDE(metadata_stride, \ @@ -1780,8 +1744,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ metadata_stride, metadata_buf_height); \ _size = ref_buf_size + meta_size_y + meta_size_c; \ } \ - else \ - { \ + else { \ SIZE_ENC_TEN_BIT_REF_BUFFER(ten_bit_ref_buf_size, \ frame_width, frame_height); \ HFI_UBWC_CALC_METADATA_PLANE_STRIDE(metadata_stride, \ @@ -1812,8 +1775,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define HFI_BUFFER_VPSS_ENC(vpss_size, dswidth, dsheight, ds_enable, blur, is_ten_bit) \ do { \ vpss_size = 0; \ - if (ds_enable || blur) \ - { \ + if (ds_enable || blur) { \ HFI_BUFFER_DPB_ENC(vpss_size, dswidth, dsheight, is_ten_bit); \ } \ } while (0) From 2adaebb59aebb1cdf7cfc8674c00691f90bb578e Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Wed, 31 May 2023 12:16:30 -0700 Subject: [PATCH 0928/1061] video: driver: handle dpb list property without payload Add handling in driver to release all read only buffers when FW sends DPB list property without any payload. Add a condition to detect if fw is unexpectedly sending read-only buffers when dpb internal buffers are allocated. Fix the condition to detect reusage of internal buffers, when internal buffers were initially allocated and due to configuration change in the middle, these internal buffers need to be destroyed. Change-Id: Ic1bfd05a023933c871e69fb29e121c47a9602951 Signed-off-by: Darshana Patil --- driver/vidc/src/msm_vidc_driver.c | 11 +++++++- driver/vidc/src/venus_hfi_response.c | 42 +++++++++++++++++----------- 2 files changed, 35 insertions(+), 18 deletions(-) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 1186039e4e..4b550f033f 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -2712,7 +2712,16 @@ int msm_vidc_get_internal_buffers(struct msm_vidc_inst *inst, if (!buffers) return -EINVAL; - if (buf_size <= buffers->size && buf_count <= buffers->min_count) { + /* + * In a usecase when film grain is initially present, dpb buffers + * are allocated and in the middle of the session, if film grain + * is disabled, then dpb internal buffers should be destroyed. + * When film grain is disabled, buffer_size op call returns 0. + * To ensure buffers->reuse is set to false, add check to detect + * if buf_size has become zero. Do the same for buf_count as well. + */ + if (buf_size && buf_size <= buffers->size && + buf_count && buf_count <= buffers->min_count) { buffers->reuse = true; } else { buffers->reuse = false; diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index 3a260eb656..ad28024541 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -1006,12 +1006,10 @@ static int handle_output_buffer(struct msm_vidc_inst *inst, } if (is_decode_session(inst)) { - /* RO flag is not expected for linear colorformat */ - if (is_linear_colorformat(inst->capabilities[PIX_FMTS].value) && - (buffer->flags & HFI_BUF_FW_FLAG_READONLY)) { - buffer->flags &= ~HFI_BUF_FW_FLAG_READONLY; - print_vidc_buffer( - VIDC_HIGH, "high", "RO flag in linear colorformat", inst, buf); + /* RO flag is not expected when internal dpb buffers are allocated */ + if (inst->buffers.dpb.size && buffer->flags & HFI_BUF_FW_FLAG_READONLY) { + print_vidc_buffer(VIDC_ERR, "err ", "unexpected RO flag", inst, buf); + msm_vidc_change_state(inst, MSM_VIDC_ERROR, __func__); } if (buffer->flags & HFI_BUF_FW_FLAG_READONLY) { @@ -1621,6 +1619,12 @@ static int handle_dpb_list_property(struct msm_vidc_inst *inst, bool found = false; u64 device_addr; + if (!is_decode_session(inst)) { + i_vpr_e(inst, + "%s: unsupported for non-decode session\n", __func__); + return -EINVAL; + } + payload_size = pkt->size - sizeof(struct hfi_packet); num_words_in_payload = payload_size / 4; payload_start = (u8 *)((u8 *)pkt + sizeof(struct hfi_packet)); @@ -1771,16 +1775,9 @@ static int handle_property_with_payload(struct msm_vidc_inst *inst, __func__); break; case HFI_PROP_DPB_LIST: - if (is_decode_session(inst)) { - rc = handle_dpb_list_property(inst, pkt); - if (rc) - break; - } else { - i_vpr_e(inst, - "%s: invalid dpb property %#x for %s port %d\n", - __func__, pkt->type, is_decode_session(inst) ? "decode" : "encode", - port); - } + rc = handle_dpb_list_property(inst, pkt); + if (rc) + break; break; case HFI_PROP_QUALITY_MODE: if (inst->capabilities[QUALITY_MODE].value != payload_ptr[0]) @@ -1816,7 +1813,18 @@ static int handle_property_with_payload(struct msm_vidc_inst *inst, static int handle_property_without_payload(struct msm_vidc_inst *inst, struct hfi_packet *pkt, u32 port) { + int rc = 0; + switch (pkt->type) { + case HFI_PROP_DPB_LIST: + /* + * if fw sends dpb list property without payload, + * it means there are no more reference buffers. + */ + rc = handle_dpb_list_property(inst, pkt); + if (rc) + break; + break; case HFI_PROP_NO_OUTPUT: if (port != INPUT_PORT) { i_vpr_e(inst, @@ -1833,7 +1841,7 @@ static int handle_property_without_payload(struct msm_vidc_inst *inst, break; } - return 0; + return rc; } static int handle_session_property(struct msm_vidc_inst *inst, From 8d5c888387acfc0b30778ae017c8d51eb1973ead Mon Sep 17 00:00:00 2001 From: Deepa Guthyappa Madivalara Date: Wed, 31 May 2023 12:48:08 -0700 Subject: [PATCH 0929/1061] video: driver: add new command to update firmware logs - use msm_vidc_debug for driver logs only - added support for msm_fw_debug, new command to update video fw log levels Change-Id: I4e1c50861ab056312c2df49673d419515d049f21 Signed-off-by: Deepa Guthyappa Madivalara --- driver/vidc/inc/msm_vidc_debug.h | 29 ++++++------ driver/vidc/src/msm_vidc_debug.c | 78 ++++++++++++++++++++++++++++---- driver/vidc/src/venus_hfi.c | 13 +++--- 3 files changed, 91 insertions(+), 29 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_debug.h b/driver/vidc/inc/msm_vidc_debug.h index cec04fcbae..ed933fde21 100644 --- a/driver/vidc/inc/msm_vidc_debug.h +++ b/driver/vidc/inc/msm_vidc_debug.h @@ -35,6 +35,7 @@ struct msm_vidc_inst; #endif extern unsigned int msm_vidc_debug; +extern unsigned int msm_fw_debug; extern bool msm_vidc_lossless_encode; extern bool msm_vidc_syscache_disable; extern int msm_vidc_clock_voting; @@ -62,7 +63,7 @@ extern bool msm_vidc_synx_fence_enable; * To enable all messages set msm_vidc_debug = 0x101F */ -enum vidc_msg_prio { +enum vidc_msg_prio_drv { VIDC_ERR = 0x00000001, VIDC_HIGH = 0x00000002, VIDC_LOW = 0x00000004, @@ -72,25 +73,27 @@ enum vidc_msg_prio { VIDC_STAT = 0x00000040, VIDC_ENCODER = 0x00000100, VIDC_DECODER = 0x00000200, - VIDC_PRINTK = 0x00001000, - VIDC_FTRACE = 0x00002000, - FW_LOW = 0x00010000, - FW_MED = 0x00020000, - FW_HIGH = 0x00040000, - FW_ERROR = 0x00080000, - FW_FATAL = 0x00100000, - FW_PERF = 0x00200000, + VIDC_PRINTK = 0x10000000, + VIDC_FTRACE = 0x20000000, +}; +enum vidc_msg_prio_fw { + FW_LOW = 0x00000001, + FW_MED = 0x00000002, + FW_HIGH = 0x00000004, + FW_ERROR = 0x00000008, + FW_FATAL = 0x00000010, + FW_PERF = 0x00000020, FW_PRINTK = 0x10000000, FW_FTRACE = 0x20000000, }; #define DRV_LOG (VIDC_ERR | VIDC_PRINTK) #define DRV_LOGSHIFT (0) -#define DRV_LOGMASK (0x0FFF) +#define DRV_LOGMASK (0x0FFFFFFF) #define FW_LOG (FW_ERROR | FW_FATAL | FW_PRINTK) -#define FW_LOGSHIFT (16) -#define FW_LOGMASK (0x0FFF0000) +#define FW_LOGSHIFT (0) +#define FW_LOGMASK (0x0FFFFFFF) #define dprintk_inst(__level, __level_str, inst, __fmt, ...) \ do { \ @@ -146,7 +149,7 @@ enum vidc_msg_prio { #define dprintk_firmware(__level, __fmt, ...) \ do { \ - if (__level & FW_PRINTK) { \ + if ((msm_fw_debug & (__level)) & FW_PRINTK) { \ pr_info(FW_DBG_TAG __fmt, \ "fw", \ ##__VA_ARGS__); \ diff --git a/driver/vidc/src/msm_vidc_debug.c b/driver/vidc/src/msm_vidc_debug.c index a1d86add53..fcea60f533 100644 --- a/driver/vidc/src/msm_vidc_debug.c +++ b/driver/vidc/src/msm_vidc_debug.c @@ -21,11 +21,13 @@ extern struct msm_vidc_core *g_core; #define MSM_VIDC_MIN_STATS_DELAY_MS 200 #define MSM_VIDC_MAX_STATS_DELAY_MS 10000 -unsigned int msm_vidc_debug = (DRV_LOG | FW_LOG); +unsigned int msm_vidc_debug = DRV_LOG; +unsigned int msm_fw_debug = FW_LOG; + /* disabled synx fence by default temporarily */ bool msm_vidc_synx_fence_enable = false; -static int debug_level_set(const char *val, +static int debug_level_set_drv(const char *val, const struct kernel_param *kp) { struct msm_vidc_core *core = NULL; @@ -50,9 +52,8 @@ static int debug_level_set(const char *val, return 0; } - /* check if driver or FW logmask is more than default level */ - if (((dvalue & DRV_LOGMASK) & ~(DRV_LOG)) || - ((dvalue & FW_LOGMASK) & ~(FW_LOG))) { + /* check if driver is more than default level */ + if ((dvalue & DRV_LOGMASK) & ~(DRV_LOG)) { core->capabilities[HW_RESPONSE_TIMEOUT].value = 4 * HW_RESPONSE_TIMEOUT_VALUE; core->capabilities[SW_PC_DELAY].value = 4 * SW_PC_DELAY_VALUE; core->capabilities[FW_UNLOAD_DELAY].value = 4 * FW_UNLOAD_DELAY_VALUE; @@ -63,7 +64,8 @@ static int debug_level_set(const char *val, core->capabilities[FW_UNLOAD_DELAY].value = FW_UNLOAD_DELAY_VALUE; } - d_vpr_h("timeout updated: hw_response %u, sw_pc %u, fw_unload %u, debug_level %#x\n", + d_vpr_h( + "timeout updated for driver: hw_response %u, sw_pc %u, fw_unload %u, debug_level %#x\n", core->capabilities[HW_RESPONSE_TIMEOUT].value, core->capabilities[SW_PC_DELAY].value, core->capabilities[FW_UNLOAD_DELAY].value, @@ -72,14 +74,71 @@ static int debug_level_set(const char *val, return 0; } -static int debug_level_get(char *buffer, const struct kernel_param *kp) +static int debug_level_set_fw(const char *val, + const struct kernel_param *kp) +{ + struct msm_vidc_core *core = NULL; + unsigned int dvalue; + int ret; + + if (!kp || !kp->arg || !val) { + d_vpr_e("%s: Invalid params\n", __func__); + return -EINVAL; + } + + ret = kstrtouint(val, 0, &dvalue); + if (ret) + return ret; + + msm_fw_debug = dvalue; + + core = *(struct msm_vidc_core **)kp->arg; + + if (!core) { + d_vpr_e("%s: Invalid core/capabilities\n", __func__); + return 0; + } + + /* check if firmware is more than default level */ + if ((dvalue & FW_LOGMASK) & ~(FW_LOG)) { + core->capabilities[HW_RESPONSE_TIMEOUT].value = 4 * HW_RESPONSE_TIMEOUT_VALUE; + core->capabilities[SW_PC_DELAY].value = 4 * SW_PC_DELAY_VALUE; + core->capabilities[FW_UNLOAD_DELAY].value = 4 * FW_UNLOAD_DELAY_VALUE; + } else { + /* reset timeout values, if user reduces the logging */ + core->capabilities[HW_RESPONSE_TIMEOUT].value = HW_RESPONSE_TIMEOUT_VALUE; + core->capabilities[SW_PC_DELAY].value = SW_PC_DELAY_VALUE; + core->capabilities[FW_UNLOAD_DELAY].value = FW_UNLOAD_DELAY_VALUE; + } + + d_vpr_h( + "timeout updated for firmware: hw_response %u, sw_pc %u, fw_unload %u, debug_level %#x\n", + core->capabilities[HW_RESPONSE_TIMEOUT].value, + core->capabilities[SW_PC_DELAY].value, + core->capabilities[FW_UNLOAD_DELAY].value, + msm_fw_debug); + + return 0; +} + +static int debug_level_get_drv(char *buffer, const struct kernel_param *kp) { return scnprintf(buffer, PAGE_SIZE, "%#x", msm_vidc_debug); } +static int debug_level_get_fw(char *buffer, const struct kernel_param *kp) +{ + return scnprintf(buffer, PAGE_SIZE, "%#x", msm_fw_debug); +} + static const struct kernel_param_ops msm_vidc_debug_fops = { - .set = debug_level_set, - .get = debug_level_get, + .set = debug_level_set_drv, + .get = debug_level_get_drv, +}; + +static const struct kernel_param_ops msm_fw_debug_fops = { + .set = debug_level_set_fw, + .get = debug_level_get_fw, }; static int fw_dump_set(const char *val, @@ -145,6 +204,7 @@ static const struct kernel_param_ops msm_vidc_synx_fence_debug_fops = { }; module_param_cb(msm_vidc_debug, &msm_vidc_debug_fops, &g_core, 0644); +module_param_cb(msm_fw_debug, &msm_fw_debug_fops, &g_core, 0644); module_param_cb(msm_vidc_fw_dump, &msm_vidc_fw_dump_fops, &g_core, 0644); module_param_cb(msm_vidc_synx_fence_enable, &msm_vidc_synx_fence_debug_fops, &g_core, 0644); diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index a7138a959c..05b6318f4b 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -124,7 +124,7 @@ static void __flush_debug_queue(struct msm_vidc_core *core, u8 *log; struct hfi_debug_header *pkt; bool local_packet = false; - enum vidc_msg_prio log_level = msm_vidc_debug; + enum vidc_msg_prio_fw log_level_fw = msm_fw_debug; if (!core) { d_vpr_e("%s: invalid params\n", __func__); @@ -143,7 +143,7 @@ static void __flush_debug_queue(struct msm_vidc_core *core, * Local packet is used when error occurred. * It is good to print these logs to printk as well. */ - log_level |= FW_PRINTK; + log_level_fw |= FW_PRINTK; } while (!venus_hfi_queue_dbg_read(core, packet)) { @@ -169,7 +169,7 @@ static void __flush_debug_queue(struct msm_vidc_core *core, * line. */ log = (u8 *)packet + sizeof(struct hfi_debug_header) + 1; - dprintk_firmware(log_level, "%s", log); + dprintk_firmware(log_level_fw, "%s", log); } if (local_packet) @@ -565,7 +565,7 @@ static int __resume(struct msm_vidc_core *core) goto err_reset_core; } - __sys_set_debug(core, (msm_vidc_debug & FW_LOGMASK) >> FW_LOGSHIFT); + __sys_set_debug(core, (msm_fw_debug & FW_LOGMASK) >> FW_LOGSHIFT); rc = call_res_op(core, llcc, core, true); if (rc) { @@ -853,7 +853,7 @@ int venus_hfi_core_init(struct msm_vidc_core *core) if (rc) goto error; - rc = __sys_set_debug(core, (msm_vidc_debug & FW_LOGMASK) >> FW_LOGSHIFT); + rc = __sys_set_debug(core, (msm_fw_debug & FW_LOGMASK) >> FW_LOGSHIFT); if (rc) goto error; @@ -1133,8 +1133,7 @@ int venus_hfi_session_open(struct msm_vidc_inst *inst) goto unlock; } - __sys_set_debug(core, - (msm_vidc_debug & FW_LOGMASK) >> FW_LOGSHIFT); + __sys_set_debug(core, (msm_fw_debug & FW_LOGMASK) >> FW_LOGSHIFT); rc = hfi_packet_session_command(inst, HFI_CMD_OPEN, From 89d31c2d86b52fb9f7105da4b4d01d7f79458983 Mon Sep 17 00:00:00 2001 From: Vedang Nagar Date: Fri, 2 Jun 2023 18:43:32 +0530 Subject: [PATCH 0930/1061] video: driver: Configure BaseLayer PID at RAW port Currently BASELAYER Priority ID was being configured at BITSTREAM PORT, For dynamic configuration, baselayer priority ID needs to be configured at RAW port. Added change for the same to configure this property at RAW port. Change-Id: Ice927aae4d8ed5228ef1b31da7ec58bb81f2aea8 Signed-off-by: Vedang Nagar --- driver/platform/pineapple/src/msm_vidc_pineapple.c | 2 +- driver/platform/pineapple/src/pineapple.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/driver/platform/pineapple/src/msm_vidc_pineapple.c b/driver/platform/pineapple/src/msm_vidc_pineapple.c index 035c7cdc2f..d9751bf14d 100644 --- a/driver/platform/pineapple/src/msm_vidc_pineapple.c +++ b/driver/platform/pineapple/src/msm_vidc_pineapple.c @@ -940,7 +940,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { 0, MAX_BASE_LAYER_PRIORITY_ID, 1, 0, V4L2_CID_MPEG_VIDEO_BASELAYER_PRIORITY_ID, HFI_PROP_BASELAYER_PRIORITYID, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, {IR_TYPE, ENC, H264|HEVC, V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_RANDOM, diff --git a/driver/platform/pineapple/src/pineapple.c b/driver/platform/pineapple/src/pineapple.c index 542c192619..74bc8fd1b1 100644 --- a/driver/platform/pineapple/src/pineapple.c +++ b/driver/platform/pineapple/src/pineapple.c @@ -620,7 +620,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { 0, MAX_BASE_LAYER_PRIORITY_ID, 1, 0, V4L2_CID_MPEG_VIDEO_BASELAYER_PRIORITY_ID, HFI_PROP_BASELAYER_PRIORITYID, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, {AU_DELIMITER, ENC, H264|HEVC, 0, 1, 1, 0, From 6e67d106a124f03b9244cd4ca6e2d15b446b157d Mon Sep 17 00:00:00 2001 From: Deepa Guthyappa Madivalara Date: Fri, 2 Jun 2023 11:57:37 -0700 Subject: [PATCH 0931/1061] video: driver: introduce new FW_CACHE log levels - adding support to new FW_CACHE log levels Change-Id: I36f006375ef48701f602b655e4be8f503be71701 Signed-off-by: Deepa Guthyappa Madivalara --- driver/vidc/inc/msm_vidc_debug.h | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/driver/vidc/inc/msm_vidc_debug.h b/driver/vidc/inc/msm_vidc_debug.h index ed933fde21..3e5de29288 100644 --- a/driver/vidc/inc/msm_vidc_debug.h +++ b/driver/vidc/inc/msm_vidc_debug.h @@ -83,6 +83,12 @@ enum vidc_msg_prio_fw { FW_ERROR = 0x00000008, FW_FATAL = 0x00000010, FW_PERF = 0x00000020, + FW_CACHE_LOW = 0x00001000, + FW_CACHE_MED = 0x00002000, + FW_CACHE_HIGH = 0x00004000, + FW_CACHE_ERROR = 0x00008000, + FW_CACHE_FATAL = 0x00010000, + FW_CACHE_PERF = 0x00020000, FW_PRINTK = 0x10000000, FW_FTRACE = 0x20000000, }; From 400a7828515db679d4c1dbcae9cb8c466340f92b Mon Sep 17 00:00:00 2001 From: Ankush Mitra Date: Fri, 2 Jun 2023 18:45:19 +0530 Subject: [PATCH 0932/1061] video: driver: add space and move "{" to previous line This change will fix some checker err. Change-Id: I93da24e9b54bb1d5f6145b438858a977b06ca09c Signed-off-by: Ankush Mitra --- driver/variant/iris2/inc/hfi_buffer_iris2.h | 50 +++++++++---------- driver/variant/iris3/inc/hfi_buffer_iris3.h | 45 ++++++++--------- .../variant/iris3/src/msm_vidc_power_iris3.c | 6 +-- driver/variant/iris33/inc/hfi_buffer_iris33.h | 49 ++++++++---------- .../variant/iris33/src/msm_vidc_bus_iris33.c | 14 +++--- .../iris33/src/msm_vidc_power_iris33.c | 2 +- driver/vidc/inc/msm_vidc_internal.h | 2 +- driver/vidc/src/hfi_packet.c | 2 +- driver/vidc/src/msm_vdec.c | 4 +- driver/vidc/src/msm_venc.c | 2 +- driver/vidc/src/msm_vidc_driver.c | 4 +- driver/vidc/src/msm_vidc_memory.c | 2 +- driver/vidc/src/msm_vidc_memory_ext.c | 2 +- driver/vidc/src/msm_vidc_vb2.c | 2 +- 14 files changed, 88 insertions(+), 98 deletions(-) diff --git a/driver/variant/iris2/inc/hfi_buffer_iris2.h b/driver/variant/iris2/inc/hfi_buffer_iris2.h index a6000cec3b..7bcbf087f6 100644 --- a/driver/variant/iris2/inc/hfi_buffer_iris2.h +++ b/driver/variant/iris2/inc/hfi_buffer_iris2.h @@ -73,9 +73,11 @@ typedef HFI_U32 HFI_BOOL; #define HFI_NV12_IL_CALC_BUF_SIZE(buf_size, y_bufSize, y_stride, y_buf_height, \ uv_buf_size, uv_stride, uv_buf_height) \ - y_bufSize = (y_stride * y_buf_height); \ - uv_buf_size = (uv_stride * uv_buf_height); \ - buf_size = HFI_ALIGN(y_bufSize + uv_buf_size, HFI_ALIGNMENT_4096) + do { \ + y_bufSize = (y_stride * y_buf_height); \ + uv_buf_size = (uv_stride * uv_buf_height); \ + buf_size = HFI_ALIGN(y_bufSize + uv_buf_size, HFI_ALIGNMENT_4096) \ + } while (0) #define HFI_NV12_UBWC_IL_CALC_Y_BUF_SIZE(y_bufSize, y_stride, y_buf_height) \ (y_bufSize = HFI_ALIGN(y_stride * y_buf_height, HFI_ALIGNMENT_4096)) @@ -125,16 +127,20 @@ typedef HFI_U32 HFI_BOOL; } while (0) #define HFI_YUV420_TP10_CALC_Y_STRIDE(stride, frame_width, stride_multiple) \ + do { \ stride = HFI_ALIGN(frame_width, 192); \ - stride = HFI_ALIGN(stride * 4 / 3, stride_multiple) + stride = HFI_ALIGN(stride * 4 / 3, stride_multiple) \ + } while (0) #define HFI_YUV420_TP10_CALC_Y_BUFHEIGHT(buf_height, frame_height, \ min_buf_height_multiple) \ (buf_height = HFI_ALIGN(frame_height, min_buf_height_multiple)) #define HFI_YUV420_TP10_CALC_UV_STRIDE(stride, frame_width, stride_multiple) \ - stride = HFI_ALIGN(frame_width, 192); \ - stride = HFI_ALIGN(stride * 4 / 3, stride_multiple) + do { \ + stride = HFI_ALIGN(frame_width, 192); \ + stride = HFI_ALIGN(stride * 4 / 3, stride_multiple); \ + } while (0) #define HFI_YUV420_TP10_CALC_UV_BUFHEIGHT(buf_height, frame_height, \ min_buf_height_multiple) \ @@ -143,9 +149,11 @@ typedef HFI_U32 HFI_BOOL; #define HFI_YUV420_TP10_CALC_BUF_SIZE(buf_size, y_buf_size, y_stride,\ y_buf_height, uv_buf_size, uv_stride, uv_buf_height) \ + do { \ y_buf_size = (y_stride * y_buf_height); \ uv_buf_size = (uv_stride * uv_buf_height); \ - buf_size = y_buf_size + uv_buf_size + buf_size = y_buf_size + uv_buf_size \ + } while (0) #define HFI_YUV420_TP10_UBWC_CALC_Y_BUF_SIZE(y_buf_size, y_stride, \ y_buf_height) \ @@ -490,8 +498,7 @@ typedef HFI_U32 HFI_BOOL; SIZE_H264D_HW_BIN_BUFFER(_size, n_aligned_w, \ n_aligned_h, delay, num_vpp_pipes); \ } \ - else \ - { \ + else { \ _size = 0; \ } \ } while (0) @@ -575,8 +582,7 @@ typedef HFI_U32 HFI_BOOL; _size = MIN(_size, H265D_MAX_SLICE + 1); \ _size = HFI_ALIGN(_size, 4); \ _size = 2 * _size * SIZE_H265D_VPP_CMD_PER_BUF; \ - if (_size > VPP_CMD_MAX_SIZE) \ - { \ + if (_size > VPP_CMD_MAX_SIZE) { \ _size = VPP_CMD_MAX_SIZE; \ } \ } while (0) @@ -641,8 +647,7 @@ typedef HFI_U32 HFI_BOOL; VENUS_DMA_ALIGNMENT) * 4 + \ HFI_ALIGN(SIZE_H265D_QP(frame_width, frame_height),\ VENUS_DMA_ALIGNMENT); \ - if (is_opb) \ - { \ + if (is_opb) { \ SIZE_VPSS_LB(vpss_lb_size, frame_width, frame_height,\ num_vpp_pipes); \ } \ @@ -746,7 +751,7 @@ typedef HFI_U32 HFI_BOOL; #define HFI_IRIS2_VP9D_LB_SIZE(_size, frame_width, frame_height, num_vpp_pipes)\ do { \ _size = HFI_ALIGN(SIZE_VPXD_LB_FE_LEFT_CTRL(frame_width, \ - frame_height),VENUS_DMA_ALIGNMENT) * num_vpp_pipes + \ + frame_height), VENUS_DMA_ALIGNMENT) * num_vpp_pipes + \ HFI_ALIGN(SIZE_VPXD_LB_SE_LEFT_CTRL(frame_width, frame_height),\ VENUS_DMA_ALIGNMENT) * num_vpp_pipes + \ HFI_ALIGN(SIZE_VP9D_LB_VSP_TOP(frame_width, frame_height), \ @@ -826,8 +831,7 @@ typedef HFI_U32 HFI_BOOL; #define HFI_BUFFER_LINE_MP2D(_size, frame_width, frame_height, \ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ - do \ - { \ + do { \ HFI_U32 vpss_lb_size = 0; \ _size = HFI_ALIGN(SIZE_VPXD_LB_FE_LEFT_CTRL(frame_width, \ frame_height), VENUS_DMA_ALIGNMENT) * num_vpp_pipes + \ @@ -887,8 +891,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define SIZE_ROI_METADATA_ENC(size_roi, frame_width, frame_height, lcu_size)\ do { \ HFI_U32 width_in_lcus = 0, height_in_lcus = 0, n_shift = 0; \ - while (lcu_size && !(lcu_size & 0x1)) \ - { \ + while (lcu_size && !(lcu_size & 0x1)) { \ n_shift++; \ lcu_size = lcu_size >> 1; \ } \ @@ -915,7 +918,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ do { \ HFI_BUFFER_INPUT_METADATA_ENC(size_metadata, frame_width, \ frame_height, is_roi_enabled, 16); \ - }while (0) + } while (0) #define HFI_BUFFER_INPUT_METADATA_H265E(size_metadata, frame_width, \ frame_height, is_roi_enabled) \ @@ -979,13 +982,11 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ size_aligned_width = HFI_ALIGN((frame_width), lcu_size); \ size_aligned_height = HFI_ALIGN((frame_height), lcu_size); \ if (work_mode == HFI_WORKMODE_2) { \ - if ((rc_type == HFI_RC_CQ) || (rc_type == HFI_RC_OFF)) \ - { \ + if ((rc_type == HFI_RC_CQ) || (rc_type == HFI_RC_OFF)) { \ bitstream_size_eval = (((size_aligned_width) * \ (size_aligned_height) * 3) >> 1); \ } \ - else \ - { \ + else { \ bitstream_size_eval = ((size_aligned_width) * \ (size_aligned_height) * 3); \ if (rc_type == HFI_RC_LOSSLESS) { \ @@ -1448,8 +1449,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ } while (0) #define HFI_IRIS2_ENC_MIN_INPUT_BUF_COUNT(numInput, TotalHBLayers) \ - do \ - { \ + do { \ numInput = 3; \ if (TotalHBLayers >= 2) \ { \ diff --git a/driver/variant/iris3/inc/hfi_buffer_iris3.h b/driver/variant/iris3/inc/hfi_buffer_iris3.h index 951b688715..4d0b661042 100644 --- a/driver/variant/iris3/inc/hfi_buffer_iris3.h +++ b/driver/variant/iris3/inc/hfi_buffer_iris3.h @@ -73,9 +73,11 @@ typedef HFI_U32 HFI_BOOL; #define HFI_NV12_IL_CALC_BUF_SIZE(buf_size, y_bufSize, y_stride, y_buf_height, \ uv_buf_size, uv_stride, uv_buf_height) \ - y_bufSize = (y_stride * y_buf_height); \ - uv_buf_size = (uv_stride * uv_buf_height); \ - (buf_size = HFI_ALIGN(y_bufSize + uv_buf_size, HFI_ALIGNMENT_4096)) + do { \ + y_bufSize = (y_stride * y_buf_height); \ + uv_buf_size = (uv_stride * uv_buf_height); \ + buf_size = HFI_ALIGN(y_bufSize + uv_buf_size, HFI_ALIGNMENT_4096) \ + } while (0) #define HFI_NV12_UBWC_IL_CALC_Y_BUF_SIZE(y_bufSize, y_stride, y_buf_height) \ (y_bufSize = HFI_ALIGN(y_stride * y_buf_height, HFI_ALIGNMENT_4096)) @@ -133,8 +135,10 @@ typedef HFI_U32 HFI_BOOL; (buf_height = HFI_ALIGN(frame_height, min_buf_height_multiple)) #define HFI_YUV420_TP10_CALC_UV_STRIDE(stride, frame_width, stride_multiple) \ - stride = HFI_ALIGN(frame_width, 192); \ - stride = HFI_ALIGN(stride * 4 / 3, stride_multiple) + do { \ + stride = HFI_ALIGN(frame_width, 192); \ + stride = HFI_ALIGN(stride * 4 / 3, stride_multiple); \ + } while (0) #define HFI_YUV420_TP10_CALC_UV_BUFHEIGHT(buf_height, frame_height, \ min_buf_height_multiple) \ @@ -490,8 +494,7 @@ typedef HFI_U32 HFI_BOOL; SIZE_H264D_HW_BIN_BUFFER(_size, n_aligned_w, \ n_aligned_h, delay, num_vpp_pipes); \ } \ - else \ - { \ + else { \ _size = 0; \ } \ } while (0) @@ -575,8 +578,7 @@ typedef HFI_U32 HFI_BOOL; _size = MIN(_size, H265D_MAX_SLICE + 1); \ _size = HFI_ALIGN(_size, 4); \ _size = 2 * _size * SIZE_H265D_VPP_CMD_PER_BUF; \ - if (_size > VPP_CMD_MAX_SIZE) \ - { \ + if (_size > VPP_CMD_MAX_SIZE) { \ _size = VPP_CMD_MAX_SIZE; \ } \ } while (0) @@ -641,8 +643,7 @@ typedef HFI_U32 HFI_BOOL; VENUS_DMA_ALIGNMENT) * 4 + \ HFI_ALIGN(SIZE_H265D_QP(frame_width, frame_height),\ VENUS_DMA_ALIGNMENT); \ - if (is_opb) \ - { \ + if (is_opb) { \ SIZE_VPSS_LB(vpss_lb_size, frame_width, frame_height,\ num_vpp_pipes); \ } \ @@ -746,7 +747,7 @@ typedef HFI_U32 HFI_BOOL; #define HFI_IRIS3_VP9D_LB_SIZE(_size, frame_width, frame_height, num_vpp_pipes)\ do { \ _size = HFI_ALIGN(SIZE_VPXD_LB_FE_LEFT_CTRL(frame_width, \ - frame_height),VENUS_DMA_ALIGNMENT) * num_vpp_pipes + \ + frame_height), VENUS_DMA_ALIGNMENT) * num_vpp_pipes + \ HFI_ALIGN(SIZE_VPXD_LB_SE_LEFT_CTRL(frame_width, frame_height),\ VENUS_DMA_ALIGNMENT) * num_vpp_pipes + \ HFI_ALIGN(SIZE_VP9D_LB_VSP_TOP(frame_width, frame_height), \ @@ -826,8 +827,7 @@ typedef HFI_U32 HFI_BOOL; #define HFI_BUFFER_LINE_MP2D(_size, frame_width, frame_height, \ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ - do \ - { \ + do { \ HFI_U32 vpss_lb_size = 0; \ _size = HFI_ALIGN(SIZE_VPXD_LB_FE_LEFT_CTRL(frame_width, \ frame_height), VENUS_DMA_ALIGNMENT) * num_vpp_pipes + \ @@ -1173,8 +1173,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ tile_size = fixed_tile_width; \ tile_count = (frame_width_coded + tile_size - 1) / tile_size; \ last_tile_size = (frame_width_coded - (tile_size * (tile_count - 1))); \ - if (last_tile_size < min_tile_size) \ - { \ + if (last_tile_size < min_tile_size) { \ tile_count -= 1; \ last_tile_size = (tile_size + min_tile_size); \ } \ @@ -1217,8 +1216,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define SIZE_ROI_METADATA_ENC(size_roi, frame_width, frame_height, lcu_size)\ do { \ HFI_U32 width_in_lcus = 0, height_in_lcus = 0, n_shift = 0; \ - while (lcu_size && !(lcu_size & 0x1)) \ - { \ + while (lcu_size && !(lcu_size & 0x1)) { \ n_shift++; \ lcu_size = lcu_size >> 1; \ } \ @@ -1245,7 +1243,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ do { \ HFI_BUFFER_INPUT_METADATA_ENC(size_metadata, frame_width, \ frame_height, is_roi_enabled, 16); \ - }while (0) + } while (0) #define HFI_BUFFER_INPUT_METADATA_H265E(size_metadata, frame_width, \ frame_height, is_roi_enabled) \ @@ -1309,13 +1307,11 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ size_aligned_width = HFI_ALIGN((frame_width), lcu_size); \ size_aligned_height = HFI_ALIGN((frame_height), lcu_size); \ if (work_mode == HFI_WORKMODE_2) { \ - if ((rc_type == HFI_RC_CQ) || (rc_type == HFI_RC_OFF)) \ - { \ + if ((rc_type == HFI_RC_CQ) || (rc_type == HFI_RC_OFF)) { \ bitstream_size_eval = (((size_aligned_width) * \ (size_aligned_height) * 3) >> 1); \ } \ - else \ - { \ + else { \ bitstream_size_eval = ((size_aligned_width) * \ (size_aligned_height) * 3); \ if (rc_type == HFI_RC_LOSSLESS) { \ @@ -1779,8 +1775,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ } while (0) #define HFI_IRIS3_ENC_MIN_INPUT_BUF_COUNT(numInput, TotalHBLayers) \ - do \ - { \ + do { \ numInput = 3; \ if (TotalHBLayers >= 2) \ { \ diff --git a/driver/variant/iris3/src/msm_vidc_power_iris3.c b/driver/variant/iris3/src/msm_vidc_power_iris3.c index 9338d3d273..a6918ea097 100644 --- a/driver/variant/iris3/src/msm_vidc_power_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_power_iris3.c @@ -80,7 +80,7 @@ static int msm_vidc_init_codec_input_freq(struct msm_vidc_inst *inst, u32 data_s /* * Used for calculating Encoder GOP Complexity - * hierachical_layer=0..7 used as Array Index + * hierachical_layer= 0..7 used as Array Index * inst->capabilities[B_FRAME].value=[ 0 1 2] * TODO how to map? */ @@ -169,7 +169,7 @@ static int msm_vidc_init_codec_input_bus(struct msm_vidc_inst *inst, struct vidc /* * Used for calculating Encoder GOP Complexity - * hierachical_layer=0..7 used as Array Index + * hierachical_layer= 0..7 used as Array Index * TODO how to map? */ codec_input->hierachical_layer = 0; /* set as IPP */ @@ -760,7 +760,7 @@ static u64 __calculate_decoder(struct vidc_bus_vote_data *d) FP_INT(bps(1))); if (is_h264_category) - ddr.line_buffer_write = fp_div(ddr.line_buffer_read,FP_INT(2)); + ddr.line_buffer_write = fp_div(ddr.line_buffer_read, FP_INT(2)); else ddr.line_buffer_write = ddr.line_buffer_read; if (llc_top_line_buf_enabled) { diff --git a/driver/variant/iris33/inc/hfi_buffer_iris33.h b/driver/variant/iris33/inc/hfi_buffer_iris33.h index ee26a1017c..6397f78e18 100644 --- a/driver/variant/iris33/inc/hfi_buffer_iris33.h +++ b/driver/variant/iris33/inc/hfi_buffer_iris33.h @@ -73,9 +73,11 @@ typedef HFI_U32 HFI_BOOL; #define HFI_NV12_IL_CALC_BUF_SIZE(buf_size, y_bufSize, y_stride, y_buf_height, \ uv_buf_size, uv_stride, uv_buf_height) \ - y_bufSize = (y_stride * y_buf_height); \ - uv_buf_size = (uv_stride * uv_buf_height); \ - buf_size = HFI_ALIGN(y_bufSize + uv_buf_size, HFI_ALIGNMENT_4096) + do { \ + y_bufSize = (y_stride * y_buf_height); \ + uv_buf_size = (uv_stride * uv_buf_height); \ + buf_size = HFI_ALIGN(y_bufSize + uv_buf_size, HFI_ALIGNMENT_4096) \ + } while (0) #define HFI_NV12_UBWC_IL_CALC_Y_BUF_SIZE(y_bufSize, y_stride, y_buf_height) \ (y_bufSize = HFI_ALIGN(y_stride * y_buf_height, HFI_ALIGNMENT_4096)) @@ -133,8 +135,10 @@ typedef HFI_U32 HFI_BOOL; (buf_height = HFI_ALIGN(frame_height, min_buf_height_multiple)) #define HFI_YUV420_TP10_CALC_UV_STRIDE(stride, frame_width, stride_multiple) \ - stride = HFI_ALIGN(frame_width, 192); \ - stride = HFI_ALIGN(stride * 4 / 3, stride_multiple) + do { \ + stride = HFI_ALIGN(frame_width, 192); \ + stride = HFI_ALIGN(stride * 4 / 3, stride_multiple); \ + } while (0) #define HFI_YUV420_TP10_CALC_UV_BUFHEIGHT(buf_height, frame_height, \ min_buf_height_multiple) \ @@ -490,8 +494,7 @@ typedef HFI_U32 HFI_BOOL; SIZE_H264D_HW_BIN_BUFFER(_size, n_aligned_w, \ n_aligned_h, delay, num_vpp_pipes); \ } \ - else \ - { \ + else { \ _size = 0; \ } \ } while (0) @@ -575,8 +578,7 @@ typedef HFI_U32 HFI_BOOL; _size = MIN(_size, H265D_MAX_SLICE + 1); \ _size = HFI_ALIGN(_size, 4); \ _size = 2 * _size * SIZE_H265D_VPP_CMD_PER_BUF; \ - if (_size > VPP_CMD_MAX_SIZE) \ - { \ + if (_size > VPP_CMD_MAX_SIZE) { \ _size = VPP_CMD_MAX_SIZE; \ } \ } while (0) @@ -641,8 +643,7 @@ typedef HFI_U32 HFI_BOOL; VENUS_DMA_ALIGNMENT) * 4 + \ HFI_ALIGN(SIZE_H265D_QP(frame_width, frame_height),\ VENUS_DMA_ALIGNMENT); \ - if (is_opb) \ - { \ + if (is_opb) { \ SIZE_VPSS_LB(vpss_lb_size, frame_width, frame_height,\ num_vpp_pipes); \ } \ @@ -746,7 +747,7 @@ typedef HFI_U32 HFI_BOOL; #define HFI_IRIS3_VP9D_LB_SIZE(_size, frame_width, frame_height, num_vpp_pipes)\ do { \ _size = HFI_ALIGN(SIZE_VPXD_LB_FE_LEFT_CTRL(frame_width, \ - frame_height),VENUS_DMA_ALIGNMENT) * num_vpp_pipes + \ + frame_height), VENUS_DMA_ALIGNMENT) * num_vpp_pipes + \ HFI_ALIGN(SIZE_VPXD_LB_SE_LEFT_CTRL(frame_width, frame_height),\ VENUS_DMA_ALIGNMENT) * num_vpp_pipes + \ HFI_ALIGN(SIZE_VP9D_LB_VSP_TOP(frame_width, frame_height), \ @@ -826,8 +827,7 @@ typedef HFI_U32 HFI_BOOL; #define HFI_BUFFER_LINE_MP2D(_size, frame_width, frame_height, \ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ - do \ - { \ + do { \ HFI_U32 vpss_lb_size = 0; \ _size = HFI_ALIGN(SIZE_VPXD_LB_FE_LEFT_CTRL(frame_width, \ frame_height), VENUS_DMA_ALIGNMENT) * num_vpp_pipes + \ @@ -864,7 +864,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define HFI_BUFFER_COMV_AV1D(_size, frame_width, frame_height, \ _comv_bufcount) \ - do { \ + do { \ _size = 2 * HFI_ALIGN(MAX(((frame_width + 63) / 64) * \ ((frame_height + 63) / 64) * 512, \ ((frame_width + 127) / 128) * \ @@ -1056,7 +1056,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ } while (0) #define HFI_BUFFER_IBC_AV1D(_size, frame_width, frame_height) \ - do { \ + do { \ HFI_U32 ibc8, ibc10; \ SIZE_AV1D_IBC_NV12_UBWC(ibc8, frame_width, frame_height); \ SIZE_AV1D_IBC_TP10_UBWC(ibc10, frame_width, frame_height); \ @@ -1173,8 +1173,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ tile_size = fixed_tile_width; \ tile_count = (frame_width_coded + tile_size - 1) / tile_size; \ last_tile_size = (frame_width_coded - (tile_size * (tile_count - 1))); \ - if (last_tile_size < min_tile_size) \ - { \ + if (last_tile_size < min_tile_size) { \ tile_count -= 1; \ last_tile_size = (tile_size + min_tile_size); \ } \ @@ -1217,8 +1216,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define SIZE_ROI_METADATA_ENC(size_roi, frame_width, frame_height, lcu_size)\ do { \ HFI_U32 width_in_lcus = 0, height_in_lcus = 0, n_shift = 0; \ - while (lcu_size && !(lcu_size & 0x1)) \ - { \ + while (lcu_size && !(lcu_size & 0x1)) { \ n_shift++; \ lcu_size = lcu_size >> 1; \ } \ @@ -1245,7 +1243,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ do { \ HFI_BUFFER_INPUT_METADATA_ENC(size_metadata, frame_width, \ frame_height, is_roi_enabled, 16); \ - }while (0) + } while (0) #define HFI_BUFFER_INPUT_METADATA_H265E(size_metadata, frame_width, \ frame_height, is_roi_enabled) \ @@ -1309,13 +1307,11 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ size_aligned_width = HFI_ALIGN((frame_width), lcu_size); \ size_aligned_height = HFI_ALIGN((frame_height), lcu_size); \ if (work_mode == HFI_WORKMODE_2) { \ - if ((rc_type == HFI_RC_CQ) || (rc_type == HFI_RC_OFF)) \ - { \ + if ((rc_type == HFI_RC_CQ) || (rc_type == HFI_RC_OFF)) { \ bitstream_size_eval = (((size_aligned_width) * \ (size_aligned_height) * 3) >> 1); \ } \ - else \ - { \ + else { \ bitstream_size_eval = ((size_aligned_width) * \ (size_aligned_height) * 3); \ if (rc_type == HFI_RC_LOSSLESS) { \ @@ -1781,8 +1777,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ } while (0) #define HFI_IRIS3_ENC_MIN_INPUT_BUF_COUNT(numInput, TotalHBLayers) \ - do \ - { \ + do { \ numInput = 3; \ if (TotalHBLayers >= 2) \ { \ diff --git a/driver/variant/iris33/src/msm_vidc_bus_iris33.c b/driver/variant/iris33/src/msm_vidc_bus_iris33.c index 1486a4dc8c..36fa1fb3e0 100644 --- a/driver/variant/iris33/src/msm_vidc_bus_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_bus_iris33.c @@ -819,13 +819,13 @@ static int calculate_bandwidth_encoder_iris33( /* I frame only */ if (codec_input.hierachical_layer == CODEC_GOP_IONLY) { codec_output->dpb_rd_y_noc = 0; - codec_output->dpb_rd_crcb_noc =0; - codec_output->dpb_rdwr_duetooverlap_noc =0; - codec_output->dpb_wr_noc =0; - codec_output->dpb_rd_y_ddr=0; - codec_output->dpb_rd_crcb_ddr =0; - codec_output->dpb_rdwr_duetooverlap_ddr=0; - codec_output->dpb_wr_ddr =0; + codec_output->dpb_rd_crcb_noc = 0; + codec_output->dpb_rdwr_duetooverlap_noc = 0; + codec_output->dpb_wr_noc = 0; + codec_output->dpb_rd_y_ddr = 0; + codec_output->dpb_rd_crcb_ddr = 0; + codec_output->dpb_rdwr_duetooverlap_ddr = 0; + codec_output->dpb_wr_ddr = 0; } /* accumulation */ diff --git a/driver/variant/iris33/src/msm_vidc_power_iris33.c b/driver/variant/iris33/src/msm_vidc_power_iris33.c index f0b369ae69..5232524c7d 100644 --- a/driver/variant/iris33/src/msm_vidc_power_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_power_iris33.c @@ -913,7 +913,7 @@ static u64 __calculate_decoder(struct vidc_bus_vote_data *d) FP_INT(bps(1))); if (is_h264_category) - ddr.line_buffer_write = fp_div(ddr.line_buffer_read,FP_INT(2)); + ddr.line_buffer_write = fp_div(ddr.line_buffer_read, FP_INT(2)); else ddr.line_buffer_write = ddr.line_buffer_read; if (llc_top_line_buf_enabled) { diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index fba6886d50..0e7b93d2dc 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -938,7 +938,7 @@ struct msm_vidc_mem { * Kalama uses Kernel Version 5.15.x, * Pineapple uses Kernel version 5.18.x */ -#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5,16,0)) +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 16, 0)) struct iosys_map dmabuf_map; #elif (LINUX_VERSION_CODE >= KERNEL_VERSION(5,15,0)) struct dma_buf_map dmabuf_map; diff --git a/driver/vidc/src/hfi_packet.c b/driver/vidc/src/hfi_packet.c index b13ee022cc..86b9d42ddd 100644 --- a/driver/vidc/src/hfi_packet.c +++ b/driver/vidc/src/hfi_packet.c @@ -237,7 +237,7 @@ u32 get_hfi_colorformat(struct msm_vidc_inst *inst, { u32 hfi_colorformat = HFI_COLOR_FMT_NV12_UBWC; - switch(colorformat) { + switch (colorformat) { case MSM_VIDC_FMT_NV12: hfi_colorformat = HFI_COLOR_FMT_NV12; break; diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 4ff5971b11..f6be2ac1c1 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -73,7 +73,7 @@ static int msm_vdec_codec_change(struct msm_vidc_inst *inst, u32 v4l2_codec) goto exit; rc = msm_vidc_ctrl_handler_init(inst, session_init); - if(rc) + if (rc) goto exit; rc = msm_vidc_update_buffer_count(inst, INPUT_PORT); @@ -819,7 +819,7 @@ int msm_vdec_release_input_internal_buffers(struct msm_vidc_inst *inst) int rc = 0; u32 i = 0; - i_vpr_h(inst, "%s()\n",__func__); + i_vpr_h(inst, "%s()\n", __func__); for (i = 0; i < ARRAY_SIZE(msm_vdec_internal_buffer_type); i++) { rc = msm_vidc_release_internal_buffers(inst, msm_vdec_internal_buffer_type[i]); diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index 2786957d5f..bad8d740b8 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -91,7 +91,7 @@ static int msm_venc_codec_change(struct msm_vidc_inst *inst, u32 v4l2_codec) goto exit; rc = msm_vidc_ctrl_handler_init(inst, session_init); - if(rc) + if (rc) goto exit; rc = msm_vidc_update_buffer_count(inst, INPUT_PORT); diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 4b550f033f..154e925c7f 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -3375,7 +3375,7 @@ int msm_vidc_session_streamoff(struct msm_vidc_inst *inst, } inst_lock(inst, __func__); - if(rc) + if (rc) goto error; if (port == INPUT_PORT) { @@ -4247,7 +4247,7 @@ void msm_vidc_fw_unload_handler(struct work_struct *work) return; } - d_vpr_h("%s: deinitializing video core\n",__func__); + d_vpr_h("%s: deinitializing video core\n", __func__); rc = msm_vidc_core_deinit(core, false); if (rc) d_vpr_e("%s: Failed to deinit core\n", __func__); diff --git a/driver/vidc/src/msm_vidc_memory.c b/driver/vidc/src/msm_vidc_memory.c index 4d066518e5..87fd4d498f 100644 --- a/driver/vidc/src/msm_vidc_memory.c +++ b/driver/vidc/src/msm_vidc_memory.c @@ -17,7 +17,7 @@ #include "msm_vidc_platform.h" #include "venus_hfi.h" -#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5,16,0)) +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 16, 0)) MODULE_IMPORT_NS(DMA_BUF); #endif diff --git a/driver/vidc/src/msm_vidc_memory_ext.c b/driver/vidc/src/msm_vidc_memory_ext.c index 5609f67c36..60e4da27d7 100644 --- a/driver/vidc/src/msm_vidc_memory_ext.c +++ b/driver/vidc/src/msm_vidc_memory_ext.c @@ -197,7 +197,7 @@ static int msm_vidc_memory_alloc_ext(struct msm_vidc_core *core, struct msm_vidc rc = -EIO; goto error; } -#elif (LINUX_VERSION_CODE < KERNEL_VERSION(5,16,0)) +#elif (LINUX_VERSION_CODE < KERNEL_VERSION(5, 16, 0)) rc = dma_buf_vmap(mem->dmabuf, &mem->dmabuf_map); if (rc) { d_vpr_e("%s: kernel map failed\n", __func__); diff --git a/driver/vidc/src/msm_vidc_vb2.c b/driver/vidc/src/msm_vidc_vb2.c index db4218fd00..17598f70bd 100644 --- a/driver/vidc/src/msm_vidc_vb2.c +++ b/driver/vidc/src/msm_vidc_vb2.c @@ -433,7 +433,7 @@ int msm_vidc_start_streaming(struct msm_vidc_inst *inst, struct vb2_queue *q) MSM_VIDC_BUF_ARP); if (rc) return rc; - } else if(is_decode_session(inst)) { + } else if (is_decode_session(inst)) { rc = msm_vidc_session_set_default_header(inst); if (rc) return rc; From e1cb32c5de2b6e4054e07e6abb8b09d6c51ae331 Mon Sep 17 00:00:00 2001 From: Ankush Mitra Date: Tue, 6 Jun 2023 11:44:28 +0530 Subject: [PATCH 0933/1061] video: driver: resolve some checker err Resolve some static checker err. Change-Id: I0aa1d8c905ac7fd1defa16dd28d4386465f09ff3 Signed-off-by: Ankush Mitra --- .../platform/kalama/inc/kalama_technology.h | 2 +- .../pineapple/inc/pineapple_technology.h | 2 +- driver/variant/iris2/inc/hfi_buffer_iris2.h | 65 +++++++++---------- driver/variant/iris3/inc/hfi_buffer_iris3.h | 64 ++++++++---------- driver/variant/iris33/inc/hfi_buffer_iris33.h | 64 ++++++++---------- driver/variant/iris33/src/msm_vidc_iris33.c | 12 ++-- driver/vidc/inc/msm_vidc_internal.h | 2 +- driver/vidc/src/msm_venc.c | 2 +- driver/vidc/src/msm_vidc_memory_ext.c | 4 +- 9 files changed, 98 insertions(+), 119 deletions(-) diff --git a/driver/platform/kalama/inc/kalama_technology.h b/driver/platform/kalama/inc/kalama_technology.h index 2a2000d7f4..f39d438fa8 100644 --- a/driver/platform/kalama/inc/kalama_technology.h +++ b/driver/platform/kalama/inc/kalama_technology.h @@ -118,7 +118,7 @@ static u32 bitrate_table_kalama_rec_fp[5][10] = { #endif }; -static u32 input_bitrate_fp = 0; +static u32 input_bitrate_fp; /* 8KUHD60; UHD240; 1080p960 with B */ static u32 fp_pixel_count_bar0 = 3840 * 2160 * 240; diff --git a/driver/platform/pineapple/inc/pineapple_technology.h b/driver/platform/pineapple/inc/pineapple_technology.h index ab65961f63..79a79ccadb 100644 --- a/driver/platform/pineapple/inc/pineapple_technology.h +++ b/driver/platform/pineapple/inc/pineapple_technology.h @@ -122,7 +122,7 @@ static u32 bitrate_table_pineapple_rec_fp[5][10] = { #endif }; -static u32 input_bitrate_fp = 0; +static u32 input_bitrate_fp; /* 8KUHD60; UHD240; 1080p960 with B */ static u32 fp_pixel_count_bar0 = 3840 * 2160 * 240; diff --git a/driver/variant/iris2/inc/hfi_buffer_iris2.h b/driver/variant/iris2/inc/hfi_buffer_iris2.h index 7bcbf087f6..b9c9ff8fe5 100644 --- a/driver/variant/iris2/inc/hfi_buffer_iris2.h +++ b/driver/variant/iris2/inc/hfi_buffer_iris2.h @@ -225,7 +225,7 @@ typedef HFI_U32 HFI_BOOL; (buf_height = HFI_ALIGN(frame_height, min_buf_height_multiple)) #define HFI_RGBA8888_CALC_BUF_SIZE(buf_size, stride, buf_height) \ - buf_size = (stride) * (buf_height) + (buf_size = (stride) * (buf_height)) #define HFI_RGBA8888_UBWC_CALC_DATA_PLANE_BUF_SIZE(buf_size, stride, \ buf_height) \ @@ -234,39 +234,41 @@ typedef HFI_U32 HFI_BOOL; #define HFI_RGBA8888_UBWC_BUF_SIZE(buf_size, data_buf_size, \ metadata_buffer_size, stride, buf_height, _metadata_tride, \ _metadata_buf_height) \ - HFI_RGBA8888_UBWC_CALC_DATA_PLANE_BUF_SIZE(data_buf_size, \ - stride, buf_height); \ - HFI_UBWC_METADATA_PLANE_BUFFER_SIZE(metadata_buffer_size, \ - _metadata_tride, _metadata_buf_height); \ - buf_size = data_buf_size + metadata_buffer_size + do { \ + HFI_RGBA8888_UBWC_CALC_DATA_PLANE_BUF_SIZE(data_buf_size, \ + stride, buf_height); \ + HFI_UBWC_METADATA_PLANE_BUFFER_SIZE(metadata_buffer_size, \ + _metadata_tride, _metadata_buf_height); \ + buf_size = data_buf_size + metadata_buffer_size \ + } while (0) #define HFI_UBWC_CALC_METADATA_PLANE_STRIDE(metadata_stride, frame_width,\ metadata_stride_multiple, tile_width_in_pels) \ - metadata_stride = HFI_ALIGN(((frame_width + (tile_width_in_pels - 1)) /\ - tile_width_in_pels), metadata_stride_multiple) + (metadata_stride = HFI_ALIGN(((frame_width + (tile_width_in_pels - 1)) /\ + tile_width_in_pels), metadata_stride_multiple)) #define HFI_UBWC_METADATA_PLANE_BUFHEIGHT(metadata_buf_height, frame_height, \ metadata_height_multiple, tile_height_in_pels) \ - metadata_buf_height = HFI_ALIGN(((frame_height + \ + (metadata_buf_height = HFI_ALIGN(((frame_height + \ (tile_height_in_pels - 1)) / tile_height_in_pels), \ - metadata_height_multiple) + metadata_height_multiple)) #define HFI_UBWC_UV_METADATA_PLANE_STRIDE(metadata_stride, frame_width, \ metadata_stride_multiple, tile_width_in_pels) \ - metadata_stride = HFI_ALIGN(((((frame_width + 1) >> 1) +\ + (metadata_stride = HFI_ALIGN(((((frame_width + 1) >> 1) +\ (tile_width_in_pels - 1)) / tile_width_in_pels), \ - metadata_stride_multiple) + metadata_stride_multiple)) #define HFI_UBWC_UV_METADATA_PLANE_BUFHEIGHT(metadata_buf_height, frame_height,\ metadata_height_multiple, tile_height_in_pels) \ - metadata_buf_height = HFI_ALIGN(((((frame_height + 1) >> 1) + \ + (metadata_buf_height = HFI_ALIGN(((((frame_height + 1) >> 1) + \ (tile_height_in_pels - 1)) / tile_height_in_pels), \ - metadata_height_multiple) + metadata_height_multiple)) #define HFI_UBWC_METADATA_PLANE_BUFFER_SIZE(buffer_size, _metadata_tride, \ _metadata_buf_height) \ - buffer_size = HFI_ALIGN(_metadata_tride * _metadata_buf_height, \ - HFI_ALIGNMENT_4096) + (buffer_size = HFI_ALIGN(_metadata_tride * _metadata_buf_height, \ + HFI_ALIGNMENT_4096)) #define BUFFER_ALIGNMENT_512_BYTES 512 #define BUFFER_ALIGNMENT_256_BYTES 256 @@ -432,7 +434,7 @@ typedef HFI_U32 HFI_BOOL; } while (0) #define HFI_BUFFER_LINE_H264D(_size, frame_width, frame_height, \ - is_opb, num_vpp_pipes) \ + is_opb, num_vpp_pipes) \ do { \ HFI_U32 vpss_lb_size = 0; \ _size = HFI_ALIGN(SIZE_H264D_LB_FE_TOP_DATA(frame_width, \ @@ -497,8 +499,7 @@ typedef HFI_U32 HFI_BOOL; if (!is_interlaced) { \ SIZE_H264D_HW_BIN_BUFFER(_size, n_aligned_w, \ n_aligned_h, delay, num_vpp_pipes); \ - } \ - else { \ + } else { \ _size = 0; \ } \ } while (0) @@ -690,8 +691,7 @@ typedef HFI_U32 HFI_BOOL; if (!is_interlaced) { \ SIZE_H265D_HW_BIN_BUFFER(_size, n_aligned_w, \ n_aligned_h, delay, num_vpp_pipes); \ - } \ - else { \ + } else { \ _size = 0; \ } \ } while (0) @@ -874,8 +874,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ } \ else if (bitstream_size > (1280 * 720)) { \ bitstream_size = (bitstream_size >> 2); \ - } \ - else { \ + } else { \ bitstream_size = (bitstream_size << 1);\ } \ if ((rc_type == HFI_RC_CQ) || (rc_type == HFI_RC_OFF)) { \ @@ -1004,8 +1003,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ bitstream_size_eval = (bitstream_size_eval * 5 >> 2); \ } \ } \ - } \ - else { \ + } else { \ bitstream_size_eval = size_aligned_width * \ size_aligned_height * 3; \ } \ @@ -1026,8 +1024,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ } \ else if (num_vpp_pipes > 2) { \ size_single_pipe_eval = bitbin_size / 2; \ - } \ - else { \ + } else { \ size_single_pipe_eval = bitbin_size; \ } \ if (rc_type == HFI_RC_LOSSLESS) { \ @@ -1067,10 +1064,10 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ bitbin_size = size_single_pipe * num_vpp_pipes; \ _size = HFI_ALIGN(bitbin_size, VENUS_DMA_ALIGNMENT) * \ total_bitbin_buffers + 512; \ - } \ - else \ + } else { \ /* Avoid 512 Bytes allocation in case of 1Pipe HEVC Direct Mode*/ \ _size = 0; \ + } \ } while (0) #define HFI_BUFFER_BIN_H264E(_size, rc_type, frame_width, frame_height, \ @@ -1202,13 +1199,13 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define SIZE_OVERRIDE_BUF(num_lcumb) (HFI_ALIGN(((16 * (((num_lcumb) + 7)\ >> 3))), VENUS_DMA_ALIGNMENT) * 2) #define SIZE_IR_BUF(num_lcu_in_frame) HFI_ALIGN((((((num_lcu_in_frame) << 1) + 7) &\ - (~7)) * 3), VENUS_DMA_ALIGNMENT) + (~7)) * 3), VENUS_DMA_ALIGNMENT) #define SIZE_VPSS_LINE_BUF(num_vpp_pipes_enc, frame_height_coded, \ frame_width_coded) \ (HFI_ALIGN(((((((8192) >> 2) << 5) * (num_vpp_pipes_enc)) + 64) + \ (((((MAX((frame_width_coded), (frame_height_coded)) + 3) >> 2) << 5) +\ - 256) * 16)), VENUS_DMA_ALIGNMENT)) + 256) * 16)), VENUS_DMA_ALIGNMENT)) #define SIZE_TOP_LINE_BUF_FIRST_STG_SAO(frame_width_coded) \ HFI_ALIGN((16 * ((frame_width_coded) >> 5)), VENUS_DMA_ALIGNMENT) @@ -1411,8 +1408,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ HFI_UBWC_METADATA_PLANE_BUFFER_SIZE(meta_size_c, \ metadata_stride, metadata_buf_height); \ _size = ref_buf_size + meta_size_y + meta_size_c; \ - } \ - else { \ + } else { \ SIZE_ENC_TEN_BIT_REF_BUFFER(ten_bit_ref_buf_size, \ frame_width, frame_height); \ HFI_UBWC_CALC_METADATA_PLANE_STRIDE(metadata_stride, \ @@ -1451,8 +1447,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define HFI_IRIS2_ENC_MIN_INPUT_BUF_COUNT(numInput, TotalHBLayers) \ do { \ numInput = 3; \ - if (TotalHBLayers >= 2) \ - { \ + if (TotalHBLayers >= 2) { \ numInput = (1 << (TotalHBLayers - 1)) + 2; \ } \ } while (0) diff --git a/driver/variant/iris3/inc/hfi_buffer_iris3.h b/driver/variant/iris3/inc/hfi_buffer_iris3.h index 4d0b661042..199cda8e6b 100644 --- a/driver/variant/iris3/inc/hfi_buffer_iris3.h +++ b/driver/variant/iris3/inc/hfi_buffer_iris3.h @@ -230,28 +230,30 @@ typedef HFI_U32 HFI_BOOL; #define HFI_RGBA8888_UBWC_BUF_SIZE(buf_size, data_buf_size, \ metadata_buffer_size, stride, buf_height, _metadata_tride, \ _metadata_buf_height) \ - HFI_RGBA8888_UBWC_CALC_DATA_PLANE_BUF_SIZE(data_buf_size, \ - stride, buf_height); \ - HFI_UBWC_METADATA_PLANE_BUFFER_SIZE(metadata_buffer_size, \ - _metadata_tride, _metadata_buf_height); \ - buf_size = data_buf_size + metadata_buffer_size + do { \ + HFI_RGBA8888_UBWC_CALC_DATA_PLANE_BUF_SIZE(data_buf_size, \ + stride, buf_height); \ + HFI_UBWC_METADATA_PLANE_BUFFER_SIZE(metadata_buffer_size, \ + _metadata_tride, _metadata_buf_height); \ + buf_size = data_buf_size + metadata_buffer_size \ + } while (0) #define HFI_UBWC_CALC_METADATA_PLANE_STRIDE(metadata_stride, frame_width,\ metadata_stride_multiple, tile_width_in_pels) \ - (metadata_stride = HFI_ALIGN(((frame_width + (tile_width_in_pels - 1)) /\ - tile_width_in_pels), metadata_stride_multiple)) + ((metadata_stride = HFI_ALIGN(((frame_width + (tile_width_in_pels - 1)) /\ + tile_width_in_pels), metadata_stride_multiple))) #define HFI_UBWC_METADATA_PLANE_BUFHEIGHT(metadata_buf_height, frame_height, \ metadata_height_multiple, tile_height_in_pels) \ - (metadata_buf_height = HFI_ALIGN(((frame_height + \ + ((metadata_buf_height = HFI_ALIGN(((frame_height + \ (tile_height_in_pels - 1)) / tile_height_in_pels), \ - metadata_height_multiple)) + metadata_height_multiple))) #define HFI_UBWC_UV_METADATA_PLANE_STRIDE(metadata_stride, frame_width, \ metadata_stride_multiple, tile_width_in_pels) \ - (metadata_stride = HFI_ALIGN(((((frame_width + 1) >> 1) +\ + ((metadata_stride = HFI_ALIGN(((((frame_width + 1) >> 1) +\ (tile_width_in_pels - 1)) / tile_width_in_pels), \ - metadata_stride_multiple)) + metadata_stride_multiple))) #define HFI_UBWC_UV_METADATA_PLANE_BUFHEIGHT(metadata_buf_height, frame_height,\ metadata_height_multiple, tile_height_in_pels) \ @@ -261,8 +263,8 @@ typedef HFI_U32 HFI_BOOL; #define HFI_UBWC_METADATA_PLANE_BUFFER_SIZE(buffer_size, _metadata_tride, \ _metadata_buf_height) \ - (buffer_size = HFI_ALIGN(_metadata_tride * _metadata_buf_height, \ - HFI_ALIGNMENT_4096)) + ((buffer_size = HFI_ALIGN(_metadata_tride * _metadata_buf_height, \ + HFI_ALIGNMENT_4096))) #define BUFFER_ALIGNMENT_512_BYTES 512 #define BUFFER_ALIGNMENT_256_BYTES 256 @@ -428,7 +430,7 @@ typedef HFI_U32 HFI_BOOL; } while (0) #define HFI_BUFFER_LINE_H264D(_size, frame_width, frame_height, \ - is_opb, num_vpp_pipes) \ + is_opb, num_vpp_pipes) \ do { \ HFI_U32 vpss_lb_size = 0; \ _size = HFI_ALIGN(SIZE_H264D_LB_FE_TOP_DATA(frame_width, \ @@ -493,8 +495,7 @@ typedef HFI_U32 HFI_BOOL; if (!is_interlaced) { \ SIZE_H264D_HW_BIN_BUFFER(_size, n_aligned_w, \ n_aligned_h, delay, num_vpp_pipes); \ - } \ - else { \ + } else { \ _size = 0; \ } \ } while (0) @@ -686,8 +687,7 @@ typedef HFI_U32 HFI_BOOL; if (!is_interlaced) { \ SIZE_H265D_HW_BIN_BUFFER(_size, n_aligned_w, \ n_aligned_h, delay, num_vpp_pipes); \ - } \ - else { \ + } else { \ _size = 0; \ } \ } while (0) @@ -1095,8 +1095,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ if (!isInterlaced) { \ SIZE_AV1D_HW_BIN_BUFFER(_size, nAlignedW, nAlignedH, \ delay, num_vpp_pipes); \ - } \ - else { \ + } else { \ _size = 0; \ } \ } while (0) @@ -1147,8 +1146,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ else if (aligned_width * aligned_height > (1280 * 720)) { \ /* bitstream_size = 0.5 * yuv_size; */ \ bitstream_size = (bitstream_size >> 2); \ - } \ - else { \ + } else { \ /* bitstream_size = 2 * yuv_size; */ \ } \ if (((rc_type == HFI_RC_CQ) || (rc_type == HFI_RC_OFF)) \ @@ -1177,8 +1175,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ tile_count -= 1; \ last_tile_size = (tile_size + min_tile_size); \ } \ - } \ - else { \ + } else { \ tile_size = frame_width_coded; \ tile_count = 1; \ last_tile_size = 0; \ @@ -1207,8 +1204,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ (mbs_in_last_tile + multi_slice_max_mb_count - 1) / (multi_slice_max_mb_count); \ total_slice_count = \ (slice_count_per_tile * (tile_count - 1)) + slice_count_in_last_tile; \ - } \ - else { \ + } else { \ total_slice_count = (slice_count_per_tile * tile_count); \ } \ } while (0) @@ -1330,8 +1326,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ bitstream_size_eval = (bitstream_size_eval * 5 >> 2); \ } \ } \ - } \ - else { \ + } else { \ bitstream_size_eval = size_aligned_width * \ size_aligned_height * 3; \ } \ @@ -1352,8 +1347,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ } \ else if (num_vpp_pipes > 2) { \ size_single_pipe_eval = bitbin_size / 2; \ - } \ - else { \ + } else { \ size_single_pipe_eval = bitbin_size; \ } \ if (rc_type == HFI_RC_LOSSLESS) { \ @@ -1528,13 +1522,13 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define SIZE_OVERRIDE_BUF(num_lcumb) (HFI_ALIGN(((16 * (((num_lcumb) + 7)\ >> 3))), VENUS_DMA_ALIGNMENT) * 2) #define SIZE_IR_BUF(num_lcu_in_frame) HFI_ALIGN((((((num_lcu_in_frame) << 1) + 7) &\ - (~7)) * 3), VENUS_DMA_ALIGNMENT) + (~7)) * 3), VENUS_DMA_ALIGNMENT) #define SIZE_VPSS_LINE_BUF(num_vpp_pipes_enc, frame_height_coded, \ frame_width_coded) \ (HFI_ALIGN(((((((8192) >> 2) << 5) * (num_vpp_pipes_enc)) + 64) + \ (((((MAX((frame_width_coded), (frame_height_coded)) + 3) >> 2) << 5) +\ - 256) * 16)), VENUS_DMA_ALIGNMENT)) + 256) * 16)), VENUS_DMA_ALIGNMENT)) #define SIZE_TOP_LINE_BUF_FIRST_STG_SAO(frame_width_coded) \ HFI_ALIGN((16 * ((frame_width_coded) >> 5)), VENUS_DMA_ALIGNMENT) @@ -1737,8 +1731,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ HFI_UBWC_METADATA_PLANE_BUFFER_SIZE(meta_size_c, \ metadata_stride, metadata_buf_height); \ _size = ref_buf_size + meta_size_y + meta_size_c; \ - } \ - else { \ + } else { \ SIZE_ENC_TEN_BIT_REF_BUFFER(ten_bit_ref_buf_size, \ frame_width, frame_height); \ HFI_UBWC_CALC_METADATA_PLANE_STRIDE(metadata_stride, \ @@ -1777,8 +1770,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define HFI_IRIS3_ENC_MIN_INPUT_BUF_COUNT(numInput, TotalHBLayers) \ do { \ numInput = 3; \ - if (TotalHBLayers >= 2) \ - { \ + if (TotalHBLayers >= 2) { \ numInput = (1 << (TotalHBLayers - 1)) + 2; \ } \ } while (0) diff --git a/driver/variant/iris33/inc/hfi_buffer_iris33.h b/driver/variant/iris33/inc/hfi_buffer_iris33.h index 6397f78e18..439d7d5b71 100644 --- a/driver/variant/iris33/inc/hfi_buffer_iris33.h +++ b/driver/variant/iris33/inc/hfi_buffer_iris33.h @@ -230,28 +230,30 @@ typedef HFI_U32 HFI_BOOL; #define HFI_RGBA8888_UBWC_BUF_SIZE(buf_size, data_buf_size, \ metadata_buffer_size, stride, buf_height, _metadata_tride, \ _metadata_buf_height) \ - HFI_RGBA8888_UBWC_CALC_DATA_PLANE_BUF_SIZE(data_buf_size, \ - stride, buf_height); \ - HFI_UBWC_METADATA_PLANE_BUFFER_SIZE(metadata_buffer_size, \ - _metadata_tride, _metadata_buf_height); \ - buf_size = data_buf_size + metadata_buffer_size + do { \ + HFI_RGBA8888_UBWC_CALC_DATA_PLANE_BUF_SIZE(data_buf_size, \ + stride, buf_height); \ + HFI_UBWC_METADATA_PLANE_BUFFER_SIZE(metadata_buffer_size, \ + _metadata_tride, _metadata_buf_height); \ + buf_size = data_buf_size + metadata_buffer_size \ + } while (0) #define HFI_UBWC_CALC_METADATA_PLANE_STRIDE(metadata_stride, frame_width,\ metadata_stride_multiple, tile_width_in_pels) \ - (metadata_stride = HFI_ALIGN(((frame_width + (tile_width_in_pels - 1)) /\ - tile_width_in_pels), metadata_stride_multiple)) + ((metadata_stride = HFI_ALIGN(((frame_width + (tile_width_in_pels - 1)) /\ + tile_width_in_pels), metadata_stride_multiple))) #define HFI_UBWC_METADATA_PLANE_BUFHEIGHT(metadata_buf_height, frame_height, \ metadata_height_multiple, tile_height_in_pels) \ - (metadata_buf_height = HFI_ALIGN(((frame_height + \ + ((metadata_buf_height = HFI_ALIGN(((frame_height + \ (tile_height_in_pels - 1)) / tile_height_in_pels), \ - metadata_height_multiple)) + metadata_height_multiple))) #define HFI_UBWC_UV_METADATA_PLANE_STRIDE(metadata_stride, frame_width, \ metadata_stride_multiple, tile_width_in_pels) \ - (metadata_stride = HFI_ALIGN(((((frame_width + 1) >> 1) +\ + ((metadata_stride = HFI_ALIGN(((((frame_width + 1) >> 1) +\ (tile_width_in_pels - 1)) / tile_width_in_pels), \ - metadata_stride_multiple)) + metadata_stride_multiple))) #define HFI_UBWC_UV_METADATA_PLANE_BUFHEIGHT(metadata_buf_height, frame_height,\ metadata_height_multiple, tile_height_in_pels) \ @@ -261,8 +263,8 @@ typedef HFI_U32 HFI_BOOL; #define HFI_UBWC_METADATA_PLANE_BUFFER_SIZE(buffer_size, _metadata_tride, \ _metadata_buf_height) \ - (buffer_size = HFI_ALIGN(_metadata_tride * _metadata_buf_height, \ - HFI_ALIGNMENT_4096)) + ((buffer_size = HFI_ALIGN(_metadata_tride * _metadata_buf_height, \ + HFI_ALIGNMENT_4096))) #define BUFFER_ALIGNMENT_512_BYTES 512 #define BUFFER_ALIGNMENT_256_BYTES 256 @@ -428,7 +430,7 @@ typedef HFI_U32 HFI_BOOL; } while (0) #define HFI_BUFFER_LINE_H264D(_size, frame_width, frame_height, \ - is_opb, num_vpp_pipes) \ + is_opb, num_vpp_pipes) \ do { \ HFI_U32 vpss_lb_size = 0; \ _size = HFI_ALIGN(SIZE_H264D_LB_FE_TOP_DATA(frame_width, \ @@ -493,8 +495,7 @@ typedef HFI_U32 HFI_BOOL; if (!is_interlaced) { \ SIZE_H264D_HW_BIN_BUFFER(_size, n_aligned_w, \ n_aligned_h, delay, num_vpp_pipes); \ - } \ - else { \ + } else { \ _size = 0; \ } \ } while (0) @@ -686,8 +687,7 @@ typedef HFI_U32 HFI_BOOL; if (!is_interlaced) { \ SIZE_H265D_HW_BIN_BUFFER(_size, n_aligned_w, \ n_aligned_h, delay, num_vpp_pipes); \ - } \ - else { \ + } else { \ _size = 0; \ } \ } while (0) @@ -1095,8 +1095,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ if (!isInterlaced) { \ SIZE_AV1D_HW_BIN_BUFFER(_size, nAlignedW, nAlignedH, \ delay, num_vpp_pipes); \ - } \ - else { \ + } else { \ _size = 0; \ } \ } while (0) @@ -1147,8 +1146,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ else if (aligned_width * aligned_height > (1280 * 720)) { \ /* bitstream_size = 0.5 * yuv_size; */ \ bitstream_size = (bitstream_size >> 2); \ - } \ - else { \ + } else { \ /* bitstream_size = 2 * yuv_size; */ \ } \ if (((rc_type == HFI_RC_CQ) || (rc_type == HFI_RC_OFF)) \ @@ -1177,8 +1175,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ tile_count -= 1; \ last_tile_size = (tile_size + min_tile_size); \ } \ - } \ - else { \ + } else { \ tile_size = frame_width_coded; \ tile_count = 1; \ last_tile_size = 0; \ @@ -1207,8 +1204,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ (mbs_in_last_tile + multi_slice_max_mb_count - 1) / (multi_slice_max_mb_count); \ total_slice_count = \ (slice_count_per_tile * (tile_count - 1)) + slice_count_in_last_tile; \ - } \ - else { \ + } else { \ total_slice_count = (slice_count_per_tile * tile_count); \ } \ } while (0) @@ -1330,8 +1326,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ bitstream_size_eval = (bitstream_size_eval * 5 >> 2); \ } \ } \ - } \ - else { \ + } else { \ bitstream_size_eval = size_aligned_width * \ size_aligned_height * 3; \ } \ @@ -1352,8 +1347,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ } \ else if (num_vpp_pipes > 2) { \ size_single_pipe_eval = bitbin_size / 2; \ - } \ - else { \ + } else { \ size_single_pipe_eval = bitbin_size; \ } \ if (rc_type == HFI_RC_LOSSLESS) { \ @@ -1528,13 +1522,13 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define SIZE_OVERRIDE_BUF(num_lcumb) (HFI_ALIGN(((16 * (((num_lcumb) + 7)\ >> 3))), VENUS_DMA_ALIGNMENT) * 2) #define SIZE_IR_BUF(num_lcu_in_frame) HFI_ALIGN((((((num_lcu_in_frame) << 1) + 7) &\ - (~7)) * 3), VENUS_DMA_ALIGNMENT) + (~7)) * 3), VENUS_DMA_ALIGNMENT) #define SIZE_VPSS_LINE_BUF(num_vpp_pipes_enc, frame_height_coded, \ frame_width_coded) \ (HFI_ALIGN(((((((8192) >> 2) << 5) * (num_vpp_pipes_enc)) + 64) + \ (((((MAX((frame_width_coded), (frame_height_coded)) + 3) >> 2) << 5) +\ - 256) * 16)), VENUS_DMA_ALIGNMENT)) + 256) * 16)), VENUS_DMA_ALIGNMENT)) #define SIZE_TOP_LINE_BUF_FIRST_STG_SAO(frame_width_coded) \ HFI_ALIGN((16 * ((frame_width_coded) >> 5)), VENUS_DMA_ALIGNMENT) @@ -1739,8 +1733,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ HFI_UBWC_METADATA_PLANE_BUFFER_SIZE(meta_size_c, \ metadata_stride, metadata_buf_height); \ _size = ref_buf_size + meta_size_y + meta_size_c; \ - } \ - else { \ + } else { \ SIZE_ENC_TEN_BIT_REF_BUFFER(ten_bit_ref_buf_size, \ frame_width, frame_height); \ HFI_UBWC_CALC_METADATA_PLANE_STRIDE(metadata_stride, \ @@ -1779,8 +1772,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define HFI_IRIS3_ENC_MIN_INPUT_BUF_COUNT(numInput, TotalHBLayers) \ do { \ numInput = 3; \ - if (TotalHBLayers >= 2) \ - { \ + if (TotalHBLayers >= 2) { \ numInput = (1 << (TotalHBLayers - 1)) + 2; \ } \ } while (0) diff --git a/driver/variant/iris33/src/msm_vidc_iris33.c b/driver/variant/iris33/src/msm_vidc_iris33.c index 6569413b9f..bcb01e0df2 100644 --- a/driver/variant/iris33/src/msm_vidc_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_iris33.c @@ -494,8 +494,8 @@ static int __power_off_iris33_controller(struct msm_vidc_core *core) /* poll AON spare register bit0 to become zero with 50ms timeout */ rc = __read_register_with_poll_timeout(core, AON_WRAPPER_SPARE, 0x1, 0x0, 1000, 50 * 1000); - if (rc) - d_vpr_e("%s: AON spare register is not zero\n", __func__); + if (rc) + d_vpr_e("%s: AON spare register is not zero\n", __func__); /* enable bit(1) to avoid cvp noc xo reset */ rc = __write_register(core, AON_WRAPPER_SPARE, value|0x2); @@ -539,12 +539,12 @@ skip_video_xo_reset: /* remove retain mem and retain peripheral */ rc = call_res_op(core, clk_set_flag, core, "video_cc_mvs0c_clk", MSM_VIDC_CLKFLAG_NORETAIN_PERIPH); - if (rc) - d_vpr_e("%s: set noretain peripheral failed\n", __func__); + if (rc) + d_vpr_e("%s: set noretain peripheral failed\n", __func__); rc = call_res_op(core, clk_set_flag, core, "video_cc_mvs0c_clk", MSM_VIDC_CLKFLAG_NORETAIN_MEM); - if (rc) - d_vpr_e("%s: set noretain mem failed\n", __func__); + if (rc) + d_vpr_e("%s: set noretain mem failed\n", __func__); /* Turn off MVP MVS0C core clock */ rc = call_res_op(core, clk_disable, core, "video_cc_mvs0c_clk"); diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 0e7b93d2dc..035da09021 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -940,7 +940,7 @@ struct msm_vidc_mem { */ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 16, 0)) struct iosys_map dmabuf_map; -#elif (LINUX_VERSION_CODE >= KERNEL_VERSION(5,15,0)) +#elif (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 15, 0)) struct dma_buf_map dmabuf_map; #endif void *kvaddr; diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index bad8d740b8..b4b4d969fd 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -1473,7 +1473,7 @@ int msm_venc_s_selection(struct msm_vidc_inst *inst, struct v4l2_selection *s) inst->compose.left = s->r.left; inst->compose.top = s->r.top; inst->compose.width = s->r.width; - inst->compose.height= s->r.height; + inst->compose.height = s->r.height; if (is_scaling_enabled(inst)) { i_vpr_h(inst, diff --git a/driver/vidc/src/msm_vidc_memory_ext.c b/driver/vidc/src/msm_vidc_memory_ext.c index 60e4da27d7..81ab78f8df 100644 --- a/driver/vidc/src/msm_vidc_memory_ext.c +++ b/driver/vidc/src/msm_vidc_memory_ext.c @@ -97,7 +97,7 @@ static int msm_vidc_memory_free_ext(struct msm_vidc_core *core, struct msm_vidc_ buf_name(mem->type), mem->secure, mem->region); if (mem->kvaddr) { -#if (LINUX_VERSION_CODE < KERNEL_VERSION(5,15,0)) +#if (LINUX_VERSION_CODE < KERNEL_VERSION(5, 15, 0)) dma_buf_vunmap(mem->dmabuf, mem->kvaddr); #else dma_buf_vunmap(mem->dmabuf, &mem->dmabuf_map); @@ -190,7 +190,7 @@ static int msm_vidc_memory_alloc_ext(struct msm_vidc_core *core, struct msm_vidc * Kalama uses Kernel Version 5.15.x, * Pineapple uses Kernel Version 5.18.x */ -#if (LINUX_VERSION_CODE < KERNEL_VERSION(5,15,0)) +#if (LINUX_VERSION_CODE < KERNEL_VERSION(5, 15, 0)) mem->kvaddr = dma_buf_vmap(mem->dmabuf); if (!mem->kvaddr) { d_vpr_e("%s: kernel map failed\n", __func__); From ed9f77c640b4c6edc22b3e18e76208d0f776069a Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Tue, 6 Jun 2023 17:37:35 -0700 Subject: [PATCH 0934/1061] video: driver: removed delayed unmap attribute removed delayed unmap attribute from driver so that buffers are immediately unmapped when unmap request is sent. Change-Id: I452199ba6e7f670ff2bdc3300df21d6e47011f90 Signed-off-by: Darshana Patil --- driver/vidc/src/msm_vidc_memory_ext.c | 5 ----- 1 file changed, 5 deletions(-) diff --git a/driver/vidc/src/msm_vidc_memory_ext.c b/driver/vidc/src/msm_vidc_memory_ext.c index 60e4da27d7..31649c53db 100644 --- a/driver/vidc/src/msm_vidc_memory_ext.c +++ b/driver/vidc/src/msm_vidc_memory_ext.c @@ -68,11 +68,6 @@ static struct dma_buf_attachment *msm_vidc_dma_buf_attach_ext(struct msm_vidc_co * on the whole buffer size and hence pass skip sync flag. */ attach->dma_map_attrs |= DMA_ATTR_SKIP_CPU_SYNC; - /* - * Get the scatterlist for the given attachment - * Mapping of sg is taken care by map attachment - */ - attach->dma_map_attrs |= DMA_ATTR_DELAYED_UNMAP; if (is_sys_cache_present(core)) attach->dma_map_attrs |= DMA_ATTR_IOMMU_USE_UPSTREAM_HINT; From 65d28b3cab3907a4f5070e87053c4e617d8ea27c Mon Sep 17 00:00:00 2001 From: Anshul Agarwal Date: Thu, 8 Jun 2023 10:55:16 +0530 Subject: [PATCH 0935/1061] video: driver: fix some checker err Fix some checker err. Change-Id: I6704727abf49c8c55ac9c213dec180c93928961f Signed-off-by: Anshul Agarwal --- driver/variant/iris2/inc/hfi_buffer_iris2.h | 16 ++++---- driver/variant/iris3/inc/hfi_buffer_iris3.h | 38 +++++++++++-------- .../variant/iris3/src/msm_vidc_clock_iris3.c | 2 +- driver/variant/iris33/inc/hfi_buffer_iris33.h | 38 +++++++++++-------- driver/variant/iris33/src/msm_vidc_iris33.c | 19 +++++----- driver/vidc/inc/msm_venc.h | 2 +- driver/vidc/src/msm_vidc_memory_ext.c | 3 +- 7 files changed, 66 insertions(+), 52 deletions(-) diff --git a/driver/variant/iris2/inc/hfi_buffer_iris2.h b/driver/variant/iris2/inc/hfi_buffer_iris2.h index b9c9ff8fe5..b5999abe24 100644 --- a/driver/variant/iris2/inc/hfi_buffer_iris2.h +++ b/driver/variant/iris2/inc/hfi_buffer_iris2.h @@ -129,7 +129,7 @@ typedef HFI_U32 HFI_BOOL; #define HFI_YUV420_TP10_CALC_Y_STRIDE(stride, frame_width, stride_multiple) \ do { \ stride = HFI_ALIGN(frame_width, 192); \ - stride = HFI_ALIGN(stride * 4 / 3, stride_multiple) \ + stride = HFI_ALIGN(stride * 4 / 3, stride_multiple); \ } while (0) #define HFI_YUV420_TP10_CALC_Y_BUFHEIGHT(buf_height, frame_height, \ @@ -386,7 +386,9 @@ typedef HFI_U32 HFI_BOOL; BUFFER_ALIGNMENT_32_BYTES); \ _size = MIN((((_height + 15) >> 4) * 48), H264D_MAX_SLICE) * \ SIZE_H264D_VPP_CMD_PER_BUF; \ - if (_size > VPP_CMD_MAX_SIZE) { _size = VPP_CMD_MAX_SIZE; } \ + if (_size > VPP_CMD_MAX_SIZE) { \ + _size = VPP_CMD_MAX_SIZE; \ + } \ } while (0) #define HFI_BUFFER_COMV_H264D(coMV_size, frame_width, \ @@ -785,8 +787,8 @@ typedef HFI_U32 HFI_BOOL; } while (0) #define VPX_DECODER_FRAME_CONCURENCY_LVL (2) -#define VPX_DECODER_FRAME_BIN_HDR_BUDGET_RATIO 1 / 2 -#define VPX_DECODER_FRAME_BIN_RES_BUDGET_RATIO 3 / 2 +#define VPX_DECODER_FRAME_BIN_HDR_BUDGET_RATIO (1 / 2) +#define VPX_DECODER_FRAME_BIN_RES_BUDGET_RATIO (3 / 2) #define HFI_BUFFER_BIN_VP9D(_size, frame_width, frame_height, \ is_interlaced, num_vpp_pipes) \ @@ -820,14 +822,14 @@ typedef HFI_U32 HFI_BOOL; #define CCE_TILE_OFFSET_SIZE HFI_ALIGN(32 * 4 * 4, BUFFER_ALIGNMENT_32_BYTES) #define HFI_BUFFER_PERSIST_VP9D(_size) \ - _size = HFI_ALIGN(VP9_NUM_PROBABILITY_TABLE_BUF * VP9_PROB_TABLE_SIZE, \ + (_size = HFI_ALIGN(VP9_NUM_PROBABILITY_TABLE_BUF * VP9_PROB_TABLE_SIZE, \ VENUS_DMA_ALIGNMENT) + HFI_ALIGN(HFI_IRIS2_VP9D_COMV_SIZE, \ VENUS_DMA_ALIGNMENT) + HFI_ALIGN(MAX_SUPERFRAME_HEADER_LEN, \ VENUS_DMA_ALIGNMENT) + HFI_ALIGN(VP9_UDC_HEADER_BUF_SIZE, \ VENUS_DMA_ALIGNMENT) + HFI_ALIGN(VP9_NUM_FRAME_INFO_BUF * \ CCE_TILE_OFFSET_SIZE, VENUS_DMA_ALIGNMENT) + \ HFI_ALIGN(VP9_NUM_FRAME_INFO_BUF * VP9_FRAME_INFO_BUF_SIZE, \ - VENUS_DMA_ALIGNMENT) + HDR10_HIST_EXTRADATA_SIZE + VENUS_DMA_ALIGNMENT) + HDR10_HIST_EXTRADATA_SIZE) #define HFI_BUFFER_LINE_MP2D(_size, frame_width, frame_height, \ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ @@ -860,7 +862,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define QMATRIX_SIZE (sizeof(HFI_U32) * 128 + 256) #define MP2D_QPDUMP_SIZE 115200 #define HFI_BUFFER_PERSIST_MP2D(_size) \ - _size = QMATRIX_SIZE + MP2D_QPDUMP_SIZE; + (_size = QMATRIX_SIZE + MP2D_QPDUMP_SIZE;) #define HFI_BUFFER_BITSTREAM_ENC(size, frame_width, frame_height, \ rc_type, is_ten_bit) \ diff --git a/driver/variant/iris3/inc/hfi_buffer_iris3.h b/driver/variant/iris3/inc/hfi_buffer_iris3.h index 199cda8e6b..c18761f0d0 100644 --- a/driver/variant/iris3/inc/hfi_buffer_iris3.h +++ b/driver/variant/iris3/inc/hfi_buffer_iris3.h @@ -65,7 +65,7 @@ typedef HFI_U32 HFI_BOOL; min_buf_height_multiple)) #define HFI_NV12_IL_CALC_UV_STRIDE(stride, frame_width, stride_multiple) \ - stride = HFI_ALIGN(frame_width, stride_multiple) + (stride = HFI_ALIGN(frame_width, stride_multiple)) #define HFI_NV12_IL_CALC_UV_BUFHEIGHT(buf_height, frame_height, \ min_buf_height_multiple) (buf_height = HFI_ALIGN(((frame_height + 1) \ @@ -127,8 +127,10 @@ typedef HFI_U32 HFI_BOOL; } while (0) #define HFI_YUV420_TP10_CALC_Y_STRIDE(stride, frame_width, stride_multiple) \ - stride = HFI_ALIGN(frame_width, 192); \ - stride = HFI_ALIGN(stride * 4 / 3, stride_multiple) + do { \ + stride = HFI_ALIGN(frame_width, 192); \ + stride = HFI_ALIGN(stride * 4 / 3, stride_multiple); \ + } while (0) #define HFI_YUV420_TP10_CALC_Y_BUFHEIGHT(buf_height, frame_height, \ min_buf_height_multiple) \ @@ -147,9 +149,11 @@ typedef HFI_U32 HFI_BOOL; #define HFI_YUV420_TP10_CALC_BUF_SIZE(buf_size, y_buf_size, y_stride,\ y_buf_height, uv_buf_size, uv_stride, uv_buf_height) \ - y_buf_size = (y_stride * y_buf_height); \ - uv_buf_size = (uv_stride * uv_buf_height); \ - buf_size = y_buf_size + uv_buf_size + do { \ + y_buf_size = (y_stride * y_buf_height); \ + uv_buf_size = (uv_stride * uv_buf_height); \ + buf_size = y_buf_size + uv_buf_size \ + } while (0) #define HFI_YUV420_TP10_UBWC_CALC_Y_BUF_SIZE(y_buf_size, y_stride, \ y_buf_height) \ @@ -382,7 +386,9 @@ typedef HFI_U32 HFI_BOOL; BUFFER_ALIGNMENT_32_BYTES); \ _size = MIN((((_height + 15) >> 4) * 48), H264D_MAX_SLICE) * \ SIZE_H264D_VPP_CMD_PER_BUF; \ - if (_size > VPP_CMD_MAX_SIZE) { _size = VPP_CMD_MAX_SIZE; } \ + if (_size > VPP_CMD_MAX_SIZE) { \ + _size = VPP_CMD_MAX_SIZE; \ + } \ } while (0) #define HFI_BUFFER_COMV_H264D(coMV_size, frame_width, \ @@ -507,11 +513,11 @@ typedef HFI_U32 HFI_BOOL; #define H264_DISPLAY_BUF_SIZE (3328) #define SIZE_DOLBY_RPU_METADATA (41 * 1024) #define HFI_BUFFER_PERSIST_H264D(_size, rpu_enabled) \ - _size = HFI_ALIGN((SIZE_SLIST_BUF_H264 * NUM_SLIST_BUF_H264 + \ + (_size = HFI_ALIGN((SIZE_SLIST_BUF_H264 * NUM_SLIST_BUF_H264 + \ H264_DISPLAY_BUF_SIZE * H264_NUM_FRM_INFO + \ NUM_HW_PIC_BUF * SIZE_SEI_USERDATA + \ rpu_enabled * NUM_HW_PIC_BUF * SIZE_DOLBY_RPU_METADATA), \ - VENUS_DMA_ALIGNMENT) + VENUS_DMA_ALIGNMENT)) #define LCU_MAX_SIZE_PELS 64 #define LCU_MIN_SIZE_PELS 16 @@ -700,11 +706,11 @@ typedef HFI_U32 HFI_BOOL; #define H265_NUM_FRM_INFO (48) #define H265_DISPLAY_BUF_SIZE (3072) #define HFI_BUFFER_PERSIST_H265D(_size, rpu_enabled) \ - _size = HFI_ALIGN((SIZE_SLIST_BUF_H265 * NUM_SLIST_BUF_H265 + \ + (_size = HFI_ALIGN((SIZE_SLIST_BUF_H265 * NUM_SLIST_BUF_H265 + \ H265_NUM_FRM_INFO * H265_DISPLAY_BUF_SIZE + \ H265_NUM_TILE * sizeof(HFI_U32) + NUM_HW_PIC_BUF * SIZE_SEI_USERDATA + \ rpu_enabled * NUM_HW_PIC_BUF * SIZE_DOLBY_RPU_METADATA),\ - VENUS_DMA_ALIGNMENT) + VENUS_DMA_ALIGNMENT)) #define SIZE_VPXD_LB_FE_LEFT_CTRL(frame_width, frame_height) \ MAX(((frame_height + 15) >> 4) * \ @@ -781,8 +787,8 @@ typedef HFI_U32 HFI_BOOL; } while (0) #define VPX_DECODER_FRAME_CONCURENCY_LVL (2) -#define VPX_DECODER_FRAME_BIN_HDR_BUDGET_RATIO 1 / 2 -#define VPX_DECODER_FRAME_BIN_RES_BUDGET_RATIO 3 / 2 +#define VPX_DECODER_FRAME_BIN_HDR_BUDGET_RATIO (1 / 2) +#define VPX_DECODER_FRAME_BIN_RES_BUDGET_RATIO (3 / 2) #define HFI_BUFFER_BIN_VP9D(_size, frame_width, frame_height, \ is_interlaced, num_vpp_pipes) \ @@ -816,14 +822,14 @@ typedef HFI_U32 HFI_BOOL; #define CCE_TILE_OFFSET_SIZE HFI_ALIGN(32 * 4 * 4, BUFFER_ALIGNMENT_32_BYTES) #define HFI_BUFFER_PERSIST_VP9D(_size) \ - _size = HFI_ALIGN(VP9_NUM_PROBABILITY_TABLE_BUF * VP9_PROB_TABLE_SIZE, \ + (_size = HFI_ALIGN(VP9_NUM_PROBABILITY_TABLE_BUF * VP9_PROB_TABLE_SIZE, \ VENUS_DMA_ALIGNMENT) + HFI_ALIGN(HFI_IRIS3_VP9D_COMV_SIZE, \ VENUS_DMA_ALIGNMENT) + HFI_ALIGN(MAX_SUPERFRAME_HEADER_LEN, \ VENUS_DMA_ALIGNMENT) + HFI_ALIGN(VP9_UDC_HEADER_BUF_SIZE, \ VENUS_DMA_ALIGNMENT) + HFI_ALIGN(VP9_NUM_FRAME_INFO_BUF * \ CCE_TILE_OFFSET_SIZE, VENUS_DMA_ALIGNMENT) + \ HFI_ALIGN(VP9_NUM_FRAME_INFO_BUF * VP9_FRAME_INFO_BUF_SIZE, \ - VENUS_DMA_ALIGNMENT) + HDR10_HIST_EXTRADATA_SIZE + VENUS_DMA_ALIGNMENT) + HDR10_HIST_EXTRADATA_SIZE) #define HFI_BUFFER_LINE_MP2D(_size, frame_width, frame_height, \ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ @@ -856,7 +862,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define QMATRIX_SIZE (sizeof(HFI_U32) * 128 + 256) #define MP2D_QPDUMP_SIZE 115200 #define HFI_BUFFER_PERSIST_MP2D(_size) \ - _size = QMATRIX_SIZE + MP2D_QPDUMP_SIZE; + (_size = QMATRIX_SIZE + MP2D_QPDUMP_SIZE;) #define AV1D_LCU_MAX_SIZE_PELS 128 #define AV1D_LCU_MIN_SIZE_PELS 64 diff --git a/driver/variant/iris3/src/msm_vidc_clock_iris3.c b/driver/variant/iris3/src/msm_vidc_clock_iris3.c index 0b2c587f68..3afba93bbe 100644 --- a/driver/variant/iris3/src/msm_vidc_clock_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_clock_iris3.c @@ -17,7 +17,7 @@ static u32 calculate_number_mbs_kalama(u32 width, u32 height, u32 lcu_size) return mbs_width * mbs_height * (lcu_size / 16) * (lcu_size / 16); } -static int initialize_encoder_complexity_table() +static int initialize_encoder_complexity_table(void) { /* Beging Calculate Encoder GOP Complexity Table and HW Floor numbers */ codec_encoder_gop_complexity_table_fp diff --git a/driver/variant/iris33/inc/hfi_buffer_iris33.h b/driver/variant/iris33/inc/hfi_buffer_iris33.h index 439d7d5b71..e380bdfc1f 100644 --- a/driver/variant/iris33/inc/hfi_buffer_iris33.h +++ b/driver/variant/iris33/inc/hfi_buffer_iris33.h @@ -65,7 +65,7 @@ typedef HFI_U32 HFI_BOOL; min_buf_height_multiple)) #define HFI_NV12_IL_CALC_UV_STRIDE(stride, frame_width, stride_multiple) \ - stride = HFI_ALIGN(frame_width, stride_multiple) + (stride = HFI_ALIGN(frame_width, stride_multiple)) #define HFI_NV12_IL_CALC_UV_BUFHEIGHT(buf_height, frame_height, \ min_buf_height_multiple) (buf_height = HFI_ALIGN(((frame_height + 1) \ @@ -127,8 +127,10 @@ typedef HFI_U32 HFI_BOOL; } while (0) #define HFI_YUV420_TP10_CALC_Y_STRIDE(stride, frame_width, stride_multiple) \ - stride = HFI_ALIGN(frame_width, 192); \ - stride = HFI_ALIGN(stride * 4 / 3, stride_multiple) + do { \ + stride = HFI_ALIGN(frame_width, 192); \ + stride = HFI_ALIGN(stride * 4 / 3, stride_multiple); \ + } while (0) #define HFI_YUV420_TP10_CALC_Y_BUFHEIGHT(buf_height, frame_height, \ min_buf_height_multiple) \ @@ -147,9 +149,11 @@ typedef HFI_U32 HFI_BOOL; #define HFI_YUV420_TP10_CALC_BUF_SIZE(buf_size, y_buf_size, y_stride,\ y_buf_height, uv_buf_size, uv_stride, uv_buf_height) \ - y_buf_size = (y_stride * y_buf_height); \ - uv_buf_size = (uv_stride * uv_buf_height); \ - buf_size = y_buf_size + uv_buf_size + do { \ + y_buf_size = (y_stride * y_buf_height); \ + uv_buf_size = (uv_stride * uv_buf_height); \ + buf_size = y_buf_size + uv_buf_size \ + } while (0) #define HFI_YUV420_TP10_UBWC_CALC_Y_BUF_SIZE(y_buf_size, y_stride, \ y_buf_height) \ @@ -382,7 +386,9 @@ typedef HFI_U32 HFI_BOOL; BUFFER_ALIGNMENT_32_BYTES); \ _size = MIN((((_height + 15) >> 4) * 48), H264D_MAX_SLICE) * \ SIZE_H264D_VPP_CMD_PER_BUF; \ - if (_size > VPP_CMD_MAX_SIZE) { _size = VPP_CMD_MAX_SIZE; } \ + if (_size > VPP_CMD_MAX_SIZE) { \ + _size = VPP_CMD_MAX_SIZE; \ + } \ } while (0) #define HFI_BUFFER_COMV_H264D(coMV_size, frame_width, \ @@ -507,11 +513,11 @@ typedef HFI_U32 HFI_BOOL; #define H264_DISPLAY_BUF_SIZE (3328) #define SIZE_DOLBY_RPU_METADATA (41 * 1024) #define HFI_BUFFER_PERSIST_H264D(_size, rpu_enabled) \ - _size = HFI_ALIGN((SIZE_SLIST_BUF_H264 * NUM_SLIST_BUF_H264 + \ + (_size = HFI_ALIGN((SIZE_SLIST_BUF_H264 * NUM_SLIST_BUF_H264 + \ H264_DISPLAY_BUF_SIZE * H264_NUM_FRM_INFO + \ NUM_HW_PIC_BUF * SIZE_SEI_USERDATA + \ rpu_enabled * NUM_HW_PIC_BUF * SIZE_DOLBY_RPU_METADATA), \ - VENUS_DMA_ALIGNMENT) + VENUS_DMA_ALIGNMENT)) #define LCU_MAX_SIZE_PELS 64 #define LCU_MIN_SIZE_PELS 16 @@ -700,11 +706,11 @@ typedef HFI_U32 HFI_BOOL; #define H265_NUM_FRM_INFO (48) #define H265_DISPLAY_BUF_SIZE (3072) #define HFI_BUFFER_PERSIST_H265D(_size, rpu_enabled) \ - _size = HFI_ALIGN((SIZE_SLIST_BUF_H265 * NUM_SLIST_BUF_H265 + \ + (_size = HFI_ALIGN((SIZE_SLIST_BUF_H265 * NUM_SLIST_BUF_H265 + \ H265_NUM_FRM_INFO * H265_DISPLAY_BUF_SIZE + \ H265_NUM_TILE * sizeof(HFI_U32) + NUM_HW_PIC_BUF * SIZE_SEI_USERDATA + \ rpu_enabled * NUM_HW_PIC_BUF * SIZE_DOLBY_RPU_METADATA),\ - VENUS_DMA_ALIGNMENT) + VENUS_DMA_ALIGNMENT)) #define SIZE_VPXD_LB_FE_LEFT_CTRL(frame_width, frame_height) \ MAX(((frame_height + 15) >> 4) * \ @@ -781,8 +787,8 @@ typedef HFI_U32 HFI_BOOL; } while (0) #define VPX_DECODER_FRAME_CONCURENCY_LVL (2) -#define VPX_DECODER_FRAME_BIN_HDR_BUDGET_RATIO 1 / 2 -#define VPX_DECODER_FRAME_BIN_RES_BUDGET_RATIO 3 / 2 +#define VPX_DECODER_FRAME_BIN_HDR_BUDGET_RATIO (1 / 2) +#define VPX_DECODER_FRAME_BIN_RES_BUDGET_RATIO (3 / 2) #define HFI_BUFFER_BIN_VP9D(_size, frame_width, frame_height, \ is_interlaced, num_vpp_pipes) \ @@ -816,14 +822,14 @@ typedef HFI_U32 HFI_BOOL; #define CCE_TILE_OFFSET_SIZE HFI_ALIGN(32 * 4 * 4, BUFFER_ALIGNMENT_32_BYTES) #define HFI_BUFFER_PERSIST_VP9D(_size) \ - _size = HFI_ALIGN(VP9_NUM_PROBABILITY_TABLE_BUF * VP9_PROB_TABLE_SIZE, \ + (_size = HFI_ALIGN(VP9_NUM_PROBABILITY_TABLE_BUF * VP9_PROB_TABLE_SIZE, \ VENUS_DMA_ALIGNMENT) + HFI_ALIGN(HFI_IRIS3_VP9D_COMV_SIZE, \ VENUS_DMA_ALIGNMENT) + HFI_ALIGN(MAX_SUPERFRAME_HEADER_LEN, \ VENUS_DMA_ALIGNMENT) + HFI_ALIGN(VP9_UDC_HEADER_BUF_SIZE, \ VENUS_DMA_ALIGNMENT) + HFI_ALIGN(VP9_NUM_FRAME_INFO_BUF * \ CCE_TILE_OFFSET_SIZE, VENUS_DMA_ALIGNMENT) + \ HFI_ALIGN(VP9_NUM_FRAME_INFO_BUF * VP9_FRAME_INFO_BUF_SIZE, \ - VENUS_DMA_ALIGNMENT) + HDR10_HIST_EXTRADATA_SIZE + VENUS_DMA_ALIGNMENT) + HDR10_HIST_EXTRADATA_SIZE) #define HFI_BUFFER_LINE_MP2D(_size, frame_width, frame_height, \ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ @@ -856,7 +862,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define QMATRIX_SIZE (sizeof(HFI_U32) * 128 + 256) #define MP2D_QPDUMP_SIZE 115200 #define HFI_BUFFER_PERSIST_MP2D(_size) \ - _size = QMATRIX_SIZE + MP2D_QPDUMP_SIZE; + (_size = QMATRIX_SIZE + MP2D_QPDUMP_SIZE;) #define AV1D_LCU_MAX_SIZE_PELS 128 #define AV1D_LCU_MIN_SIZE_PELS 64 diff --git a/driver/variant/iris33/src/msm_vidc_iris33.c b/driver/variant/iris33/src/msm_vidc_iris33.c index bcb01e0df2..c85d00a54f 100644 --- a/driver/variant/iris33/src/msm_vidc_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_iris33.c @@ -536,15 +536,16 @@ skip_video_xo_reset: if (rc) return rc; - /* remove retain mem and retain peripheral */ - rc = call_res_op(core, clk_set_flag, core, - "video_cc_mvs0c_clk", MSM_VIDC_CLKFLAG_NORETAIN_PERIPH); - if (rc) - d_vpr_e("%s: set noretain peripheral failed\n", __func__); - rc = call_res_op(core, clk_set_flag, core, - "video_cc_mvs0c_clk", MSM_VIDC_CLKFLAG_NORETAIN_MEM); - if (rc) - d_vpr_e("%s: set noretain mem failed\n", __func__); + /* remove retain mem and retain peripheral */ + rc = call_res_op(core, clk_set_flag, core, + "video_cc_mvs0c_clk", MSM_VIDC_CLKFLAG_NORETAIN_PERIPH); + if (rc) + d_vpr_e("%s: set noretain peripheral failed\n", __func__); + + rc = call_res_op(core, clk_set_flag, core, + "video_cc_mvs0c_clk", MSM_VIDC_CLKFLAG_NORETAIN_MEM); + if (rc) + d_vpr_e("%s: set noretain mem failed\n", __func__); /* Turn off MVP MVS0C core clock */ rc = call_res_op(core, clk_disable, core, "video_cc_mvs0c_clk"); diff --git a/driver/vidc/inc/msm_venc.h b/driver/vidc/inc/msm_venc.h index 895d2f6705..3fe5c4acb2 100644 --- a/driver/vidc/inc/msm_venc.h +++ b/driver/vidc/inc/msm_venc.h @@ -24,7 +24,7 @@ int msm_venc_g_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f); int msm_venc_s_selection(struct msm_vidc_inst *inst, struct v4l2_selection *s); int msm_venc_g_selection(struct msm_vidc_inst *inst, struct v4l2_selection *s); int msm_venc_s_param(struct msm_vidc_inst *inst, - struct v4l2_streamparm *s_parm); + struct v4l2_streamparm *s_parm); int msm_venc_g_param(struct msm_vidc_inst *inst, struct v4l2_streamparm *s_parm); int msm_venc_subscribe_event(struct msm_vidc_inst *inst, diff --git a/driver/vidc/src/msm_vidc_memory_ext.c b/driver/vidc/src/msm_vidc_memory_ext.c index 81ab78f8df..6040362471 100644 --- a/driver/vidc/src/msm_vidc_memory_ext.c +++ b/driver/vidc/src/msm_vidc_memory_ext.c @@ -165,8 +165,7 @@ static int msm_vidc_memory_alloc_ext(struct msm_vidc_core *core, struct msm_vidc goto error; } - if (mem->secure && mem->type == MSM_VIDC_BUF_BIN) - { + if (mem->secure && mem->type == MSM_VIDC_BUF_BIN) { vmids[0] = VMID_CP_BITSTREAM; perms[0] = PERM_READ | PERM_WRITE; From 8ffb37d04b8da6052e992c11c50069e9baf18186 Mon Sep 17 00:00:00 2001 From: Ashish Patil Date: Thu, 8 Jun 2023 11:54:41 -0700 Subject: [PATCH 0936/1061] video: driver: adding guard to residency calc. based on logmask update or print the residency calc. only when high or stats logs are enabled Change-Id: Ie5e936a56865702417b4bb6a4657abf864510032 Signed-off-by: Ashish Patil --- driver/vidc/src/resources.c | 4 ++++ driver/vidc/src/resources_ext.c | 4 ++++ 2 files changed, 8 insertions(+) diff --git a/driver/vidc/src/resources.c b/driver/vidc/src/resources.c index f7ed7f40fe..9c79e30a66 100644 --- a/driver/vidc/src/resources.c +++ b/driver/vidc/src/resources.c @@ -1264,6 +1264,10 @@ static int update_residency_stats( u64 cur_time_us = 0; int rc = 0; + /* skip update if high or stats logs not enabled */ + if(!(msm_vidc_debug & (VIDC_HIGH | VIDC_STAT))) + return 0; + if (!core || !cl) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; diff --git a/driver/vidc/src/resources_ext.c b/driver/vidc/src/resources_ext.c index 66f6e073c8..c9f87d5308 100644 --- a/driver/vidc/src/resources_ext.c +++ b/driver/vidc/src/resources_ext.c @@ -337,6 +337,10 @@ static int update_residency_stats( u64 cur_time_us = 0; int rc = 0; + /* skip update if high or stats logs not enabled */ + if(!(msm_vidc_debug & (VIDC_HIGH | VIDC_STAT))) + return 0; + if (!core || !cl) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; From 950306d1aa13c999f0d4b73c65cac6e4421c6915 Mon Sep 17 00:00:00 2001 From: Anshul Agarwal Date: Fri, 9 Jun 2023 11:14:25 +0530 Subject: [PATCH 0937/1061] video: driver: fix some checker err Fix some checker err Change-Id: I357059999dd43b58d6c414868a8b4060b6b691da Signed-off-by: Anshul Agarwal --- driver/variant/iris3/src/msm_vidc_bus_iris3.c | 2 +- driver/variant/iris33/src/msm_vidc_bus_iris33.c | 2 +- driver/variant/iris33/src/msm_vidc_iris33.c | 6 ++---- driver/vidc/inc/venus_hfi_queue.h | 4 ++-- driver/vidc/src/msm_vidc_debug.c | 5 ++--- driver/vidc/src/msm_vidc_driver.c | 8 ++++---- driver/vidc/src/resources.c | 2 +- driver/vidc/src/resources_ext.c | 2 +- 8 files changed, 14 insertions(+), 17 deletions(-) diff --git a/driver/variant/iris3/src/msm_vidc_bus_iris3.c b/driver/variant/iris3/src/msm_vidc_bus_iris3.c index 96b0f57981..26d13baf9e 100644 --- a/driver/variant/iris3/src/msm_vidc_bus_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_bus_iris3.c @@ -608,7 +608,7 @@ static int calculate_bandwidth_encoder_iris3( (codec_input.codec == CODEC_H264_CAVLC)) { frame_lcu_size = 16; collocated_bytes_per_lcu = 16; - } if (codec_input.codec == CODEC_HEVC) { + } else if (codec_input.codec == CODEC_HEVC) { frame_lcu_size = 32; collocated_bytes_per_lcu = 64; } else { diff --git a/driver/variant/iris33/src/msm_vidc_bus_iris33.c b/driver/variant/iris33/src/msm_vidc_bus_iris33.c index 36fa1fb3e0..4339c85abe 100644 --- a/driver/variant/iris33/src/msm_vidc_bus_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_bus_iris33.c @@ -608,7 +608,7 @@ static int calculate_bandwidth_encoder_iris33( (codec_input.codec == CODEC_H264_CAVLC)) { frame_lcu_size = 16; collocated_bytes_per_lcu = 16; - } if (codec_input.codec == CODEC_HEVC) { + } else if (codec_input.codec == CODEC_HEVC) { frame_lcu_size = 32; collocated_bytes_per_lcu = 64; } else { diff --git a/driver/variant/iris33/src/msm_vidc_iris33.c b/driver/variant/iris33/src/msm_vidc_iris33.c index c85d00a54f..545d42f88d 100644 --- a/driver/variant/iris33/src/msm_vidc_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_iris33.c @@ -38,8 +38,7 @@ #define HFI_CTRL_INIT_IRIS33 VCODEC_VPU_CPU_CS_SCIACMD_IRIS33 #define HFI_CTRL_STATUS_IRIS33 VCODEC_VPU_CPU_CS_SCIACMDARG0_IRIS33 -typedef enum -{ +typedef enum { HFI_CTRL_NOT_INIT = 0x0, HFI_CTRL_READY = 0x1, HFI_CTRL_ERROR_FATAL = 0x2, @@ -50,8 +49,7 @@ typedef enum } hfi_ctrl_status_type; #define HFI_QTBL_INFO_IRIS33 VCODEC_VPU_CPU_CS_SCIACMDARG1_IRIS33 -typedef enum -{ +typedef enum { HFI_QTBL_DISABLED = 0x00, HFI_QTBL_ENABLED = 0x01, } hfi_qtbl_status_type; diff --git a/driver/vidc/inc/venus_hfi_queue.h b/driver/vidc/inc/venus_hfi_queue.h index f4c188ef8d..83237c201a 100644 --- a/driver/vidc/inc/venus_hfi_queue.h +++ b/driver/vidc/inc/venus_hfi_queue.h @@ -63,8 +63,8 @@ struct hfi_queue_header { VIDC_IFACEQ_MAX_BUF_COUNT * VIDC_IFACE_MAX_PARALLEL_CLNTS) #define VIDC_IFACEQ_GET_QHDR_START_ADDR(ptr, i) \ - (void *)((ptr + sizeof(struct hfi_queue_table_header)) + \ - (i * sizeof(struct hfi_queue_header))) + ((void *)((ptr + sizeof(struct hfi_queue_table_header)) + \ + (i * sizeof(struct hfi_queue_header)))) #define QDSS_SIZE 4096 #define SFR_SIZE 4096 diff --git a/driver/vidc/src/msm_vidc_debug.c b/driver/vidc/src/msm_vidc_debug.c index 31ac5aaa31..b3b8cdc66e 100644 --- a/driver/vidc/src/msm_vidc_debug.c +++ b/driver/vidc/src/msm_vidc_debug.c @@ -25,7 +25,7 @@ unsigned int msm_vidc_debug = DRV_LOG; unsigned int msm_fw_debug = FW_LOG; /* disabled synx fence by default temporarily */ -bool msm_vidc_synx_fence_enable = false; +bool msm_vidc_synx_fence_enable; static int debug_level_set_drv(const char *val, const struct kernel_param *kp) @@ -405,8 +405,7 @@ static ssize_t trigger_ssr_write(struct file *filp, const char __user *buf, if (rc) { d_vpr_e("returning error err %d\n", rc); rc = -EINVAL; - } - else { + } else { msm_vidc_trigger_ssr(core, ssr_trigger_val); rc = count; } diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 154e925c7f..8c7f2633be 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -999,7 +999,7 @@ bool is_hevc_10bit_decode_session(struct msm_vidc_inst *inst) /* in case of decoder session return false */ if (!is_decode_session(inst)) - return false; + return false; colorformat = v4l2_colorformat_to_driver(inst, inst->fmts[OUTPUT_PORT].fmt.pix_mp.pixelformat, __func__); @@ -4934,8 +4934,8 @@ static int msm_vidc_get_inst_load(struct msm_vidc_inst *inst) return mbpf * fps; } -static bool msm_vidc_ignore_session_load(struct msm_vidc_inst *inst) { - +static bool msm_vidc_ignore_session_load(struct msm_vidc_inst *inst) +{ if (!is_realtime_session(inst) || is_thumbnail_session(inst) || is_image_session(inst) || is_session_error(inst)) return true; @@ -5010,7 +5010,7 @@ int msm_vidc_check_core_mbps(struct msm_vidc_inst *inst) } core_unlock(core, __func__); } - } else if (is_decode_session(inst)){ + } else if (is_decode_session(inst)) { /* * if total_mbps is greater than max_mbps then allow this * decoder by reducing its piority (moving it to NRT) diff --git a/driver/vidc/src/resources.c b/driver/vidc/src/resources.c index 9c79e30a66..63fe8d2247 100644 --- a/driver/vidc/src/resources.c +++ b/driver/vidc/src/resources.c @@ -1265,7 +1265,7 @@ static int update_residency_stats( int rc = 0; /* skip update if high or stats logs not enabled */ - if(!(msm_vidc_debug & (VIDC_HIGH | VIDC_STAT))) + if (!(msm_vidc_debug & (VIDC_HIGH | VIDC_STAT))) return 0; if (!core || !cl) { diff --git a/driver/vidc/src/resources_ext.c b/driver/vidc/src/resources_ext.c index c9f87d5308..e9cab8044c 100644 --- a/driver/vidc/src/resources_ext.c +++ b/driver/vidc/src/resources_ext.c @@ -338,7 +338,7 @@ static int update_residency_stats( int rc = 0; /* skip update if high or stats logs not enabled */ - if(!(msm_vidc_debug & (VIDC_HIGH | VIDC_STAT))) + if (!(msm_vidc_debug & (VIDC_HIGH | VIDC_STAT))) return 0; if (!core || !cl) { From ff3eff1538bc0b81f5105b426197d573f50b55f2 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Fri, 9 Jun 2023 16:46:37 -0700 Subject: [PATCH 0938/1061] video: driver: initialize the global varibale initialize msm_vidc_synx_fence_enable global variable Change-Id: I581d08d19bff614a861b455e140aeb2e38666f03 Signed-off-by: Akshata Sahukar --- driver/vidc/src/msm_vidc_debug.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/driver/vidc/src/msm_vidc_debug.c b/driver/vidc/src/msm_vidc_debug.c index b3b8cdc66e..260a7734df 100644 --- a/driver/vidc/src/msm_vidc_debug.c +++ b/driver/vidc/src/msm_vidc_debug.c @@ -25,7 +25,7 @@ unsigned int msm_vidc_debug = DRV_LOG; unsigned int msm_fw_debug = FW_LOG; /* disabled synx fence by default temporarily */ -bool msm_vidc_synx_fence_enable; +bool msm_vidc_synx_fence_enable = false; static int debug_level_set_drv(const char *val, const struct kernel_param *kp) From b6fba340c359328bd327560ab39c516690a71bba Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Fri, 9 Jun 2023 18:55:56 -0700 Subject: [PATCH 0939/1061] video: driver: fix hfi_buffer_iris3.h premerge failures remove macro brackets in hfi_buffer_iris3.h to fix premerge failures Change-Id: I30f2cb656376cefc632cc3fd64dc979a903bfdc0 Signed-off-by: Akshata Sahukar --- driver/variant/iris2/inc/hfi_buffer_iris2.h | 10 +++++----- driver/variant/iris3/inc/hfi_buffer_iris3.h | 10 +++++----- driver/variant/iris33/inc/hfi_buffer_iris33.h | 10 +++++----- 3 files changed, 15 insertions(+), 15 deletions(-) diff --git a/driver/variant/iris2/inc/hfi_buffer_iris2.h b/driver/variant/iris2/inc/hfi_buffer_iris2.h index b5999abe24..8bf11ebfd1 100644 --- a/driver/variant/iris2/inc/hfi_buffer_iris2.h +++ b/driver/variant/iris2/inc/hfi_buffer_iris2.h @@ -76,7 +76,7 @@ typedef HFI_U32 HFI_BOOL; do { \ y_bufSize = (y_stride * y_buf_height); \ uv_buf_size = (uv_stride * uv_buf_height); \ - buf_size = HFI_ALIGN(y_bufSize + uv_buf_size, HFI_ALIGNMENT_4096) \ + buf_size = HFI_ALIGN(y_bufSize + uv_buf_size, HFI_ALIGNMENT_4096); \ } while (0) #define HFI_NV12_UBWC_IL_CALC_Y_BUF_SIZE(y_bufSize, y_stride, y_buf_height) \ @@ -152,7 +152,7 @@ typedef HFI_U32 HFI_BOOL; do { \ y_buf_size = (y_stride * y_buf_height); \ uv_buf_size = (uv_stride * uv_buf_height); \ - buf_size = y_buf_size + uv_buf_size \ + buf_size = y_buf_size + uv_buf_size; \ } while (0) #define HFI_YUV420_TP10_UBWC_CALC_Y_BUF_SIZE(y_buf_size, y_stride, \ @@ -239,7 +239,7 @@ typedef HFI_U32 HFI_BOOL; stride, buf_height); \ HFI_UBWC_METADATA_PLANE_BUFFER_SIZE(metadata_buffer_size, \ _metadata_tride, _metadata_buf_height); \ - buf_size = data_buf_size + metadata_buffer_size \ + buf_size = data_buf_size + metadata_buffer_size; \ } while (0) #define HFI_UBWC_CALC_METADATA_PLANE_STRIDE(metadata_stride, frame_width,\ @@ -787,8 +787,8 @@ typedef HFI_U32 HFI_BOOL; } while (0) #define VPX_DECODER_FRAME_CONCURENCY_LVL (2) -#define VPX_DECODER_FRAME_BIN_HDR_BUDGET_RATIO (1 / 2) -#define VPX_DECODER_FRAME_BIN_RES_BUDGET_RATIO (3 / 2) +#define VPX_DECODER_FRAME_BIN_HDR_BUDGET_RATIO 1 / 2 +#define VPX_DECODER_FRAME_BIN_RES_BUDGET_RATIO 3 / 2 #define HFI_BUFFER_BIN_VP9D(_size, frame_width, frame_height, \ is_interlaced, num_vpp_pipes) \ diff --git a/driver/variant/iris3/inc/hfi_buffer_iris3.h b/driver/variant/iris3/inc/hfi_buffer_iris3.h index c18761f0d0..702665dbcd 100644 --- a/driver/variant/iris3/inc/hfi_buffer_iris3.h +++ b/driver/variant/iris3/inc/hfi_buffer_iris3.h @@ -76,7 +76,7 @@ typedef HFI_U32 HFI_BOOL; do { \ y_bufSize = (y_stride * y_buf_height); \ uv_buf_size = (uv_stride * uv_buf_height); \ - buf_size = HFI_ALIGN(y_bufSize + uv_buf_size, HFI_ALIGNMENT_4096) \ + buf_size = HFI_ALIGN(y_bufSize + uv_buf_size, HFI_ALIGNMENT_4096); \ } while (0) #define HFI_NV12_UBWC_IL_CALC_Y_BUF_SIZE(y_bufSize, y_stride, y_buf_height) \ @@ -152,7 +152,7 @@ typedef HFI_U32 HFI_BOOL; do { \ y_buf_size = (y_stride * y_buf_height); \ uv_buf_size = (uv_stride * uv_buf_height); \ - buf_size = y_buf_size + uv_buf_size \ + buf_size = y_buf_size + uv_buf_size; \ } while (0) #define HFI_YUV420_TP10_UBWC_CALC_Y_BUF_SIZE(y_buf_size, y_stride, \ @@ -239,7 +239,7 @@ typedef HFI_U32 HFI_BOOL; stride, buf_height); \ HFI_UBWC_METADATA_PLANE_BUFFER_SIZE(metadata_buffer_size, \ _metadata_tride, _metadata_buf_height); \ - buf_size = data_buf_size + metadata_buffer_size \ + buf_size = data_buf_size + metadata_buffer_size; \ } while (0) #define HFI_UBWC_CALC_METADATA_PLANE_STRIDE(metadata_stride, frame_width,\ @@ -787,8 +787,8 @@ typedef HFI_U32 HFI_BOOL; } while (0) #define VPX_DECODER_FRAME_CONCURENCY_LVL (2) -#define VPX_DECODER_FRAME_BIN_HDR_BUDGET_RATIO (1 / 2) -#define VPX_DECODER_FRAME_BIN_RES_BUDGET_RATIO (3 / 2) +#define VPX_DECODER_FRAME_BIN_HDR_BUDGET_RATIO 1 / 2 +#define VPX_DECODER_FRAME_BIN_RES_BUDGET_RATIO 3 / 2 #define HFI_BUFFER_BIN_VP9D(_size, frame_width, frame_height, \ is_interlaced, num_vpp_pipes) \ diff --git a/driver/variant/iris33/inc/hfi_buffer_iris33.h b/driver/variant/iris33/inc/hfi_buffer_iris33.h index e380bdfc1f..afbcc4f415 100644 --- a/driver/variant/iris33/inc/hfi_buffer_iris33.h +++ b/driver/variant/iris33/inc/hfi_buffer_iris33.h @@ -76,7 +76,7 @@ typedef HFI_U32 HFI_BOOL; do { \ y_bufSize = (y_stride * y_buf_height); \ uv_buf_size = (uv_stride * uv_buf_height); \ - buf_size = HFI_ALIGN(y_bufSize + uv_buf_size, HFI_ALIGNMENT_4096) \ + buf_size = HFI_ALIGN(y_bufSize + uv_buf_size, HFI_ALIGNMENT_4096); \ } while (0) #define HFI_NV12_UBWC_IL_CALC_Y_BUF_SIZE(y_bufSize, y_stride, y_buf_height) \ @@ -152,7 +152,7 @@ typedef HFI_U32 HFI_BOOL; do { \ y_buf_size = (y_stride * y_buf_height); \ uv_buf_size = (uv_stride * uv_buf_height); \ - buf_size = y_buf_size + uv_buf_size \ + buf_size = y_buf_size + uv_buf_size; \ } while (0) #define HFI_YUV420_TP10_UBWC_CALC_Y_BUF_SIZE(y_buf_size, y_stride, \ @@ -239,7 +239,7 @@ typedef HFI_U32 HFI_BOOL; stride, buf_height); \ HFI_UBWC_METADATA_PLANE_BUFFER_SIZE(metadata_buffer_size, \ _metadata_tride, _metadata_buf_height); \ - buf_size = data_buf_size + metadata_buffer_size \ + buf_size = data_buf_size + metadata_buffer_size; \ } while (0) #define HFI_UBWC_CALC_METADATA_PLANE_STRIDE(metadata_stride, frame_width,\ @@ -787,8 +787,8 @@ typedef HFI_U32 HFI_BOOL; } while (0) #define VPX_DECODER_FRAME_CONCURENCY_LVL (2) -#define VPX_DECODER_FRAME_BIN_HDR_BUDGET_RATIO (1 / 2) -#define VPX_DECODER_FRAME_BIN_RES_BUDGET_RATIO (3 / 2) +#define VPX_DECODER_FRAME_BIN_HDR_BUDGET_RATIO 1 / 2 +#define VPX_DECODER_FRAME_BIN_RES_BUDGET_RATIO 3 / 2 #define HFI_BUFFER_BIN_VP9D(_size, frame_width, frame_height, \ is_interlaced, num_vpp_pipes) \ From f979a7317b8edc67512da4ab626bf9ba4a20fe0a Mon Sep 17 00:00:00 2001 From: Varsha Suresh Date: Sun, 11 Jun 2023 01:26:07 -0700 Subject: [PATCH 0940/1061] video-driver: Update the deps for mm-drivers Change-Id: I518b14b13a8975815ac86018fd4785d5e6ecb8e9 Signed-off-by: Varsha Suresh --- video_modules.bzl | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/video_modules.bzl b/video_modules.bzl index f5d751945c..b1666c7f4b 100644 --- a/video_modules.bzl +++ b/video_modules.bzl @@ -45,7 +45,7 @@ module_entry( ], }, deps = [ - "//vendor/qcom/opensource/mm-drivers:hw_fence_headers", + "//vendor/qcom/opensource/mm-drivers:mm_drivers_headers", "//vendor/qcom/opensource/synx-kernel:synx_headers", ], ) @@ -86,4 +86,4 @@ module_entry( "driver/variant/iris33/src/msm_vidc_iris33.c", ], } -) \ No newline at end of file +) From 4bab4056f6e76ac6bc0bd0f1ee86460e4cf4ee43 Mon Sep 17 00:00:00 2001 From: Gaviraju Doddabettahalli Bettegowda Date: Fri, 9 Jun 2023 19:45:24 +0530 Subject: [PATCH 0941/1061] video: driver: Encode with multi slice mode Bitrate is not a mandatory parameter for setting multi-slice encode configuration. If the client not setting bitrate then default value can be used to calculate slice count incase of byte mode multi slice encode, and it's not needed for macro-block mode multi slice encode. Currently, multi slice encode is enabled only when client set bitrate explicitly otherwise it's configuring single slice encode mode. So added change to remove the bitrate dependancy for configuring multi slice encode. Change-Id: Ia9c541d693107b9eb57e530c6e44cad70216f1dc Signed-off-by: Gaviraju Doddabettahalli Bettegowda --- driver/platform/common/src/msm_vidc_platform.c | 15 +++------------ 1 file changed, 3 insertions(+), 12 deletions(-) diff --git a/driver/platform/common/src/msm_vidc_platform.c b/driver/platform/common/src/msm_vidc_platform.c index 092e179cb9..ffbe2cf3da 100644 --- a/driver/platform/common/src/msm_vidc_platform.c +++ b/driver/platform/common/src/msm_vidc_platform.c @@ -1247,25 +1247,16 @@ int msm_vidc_adjust_slice_count(void *instance, struct v4l2_ctrl *ctrl) if (slice_mode == V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE) return 0; + bitrate = inst->capabilities[BIT_RATE].value; + if (msm_vidc_get_parent_value(inst, SLICE_MODE, BITRATE_MODE, &rc_type, __func__) || msm_vidc_get_parent_value(inst, SLICE_MODE, ENH_LAYER_COUNT, &enh_layer_count, __func__)) return -EINVAL; - if (inst->capabilities[BIT_RATE].flags & CAP_FLAG_CLIENT_SET) { - bitrate = inst->capabilities[BIT_RATE].value; - } else if (!msm_vidc_get_parent_value(inst, SLICE_MODE, - ENH_LAYER_COUNT, &enh_layer_count, __func__) && - msm_vidc_check_all_layer_bitrate_set(inst)) { + if (enh_layer_count && msm_vidc_check_all_layer_bitrate_set(inst)) { bitrate = msm_vidc_get_cumulative_bitrate(inst); - } else { - adjusted_value = V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE; - update_cap = SLICE_MODE; - i_vpr_h(inst, - "%s: client did not set bitrate & layerwise bitrates\n", - __func__); - goto exit; } fps = inst->capabilities[FRAME_RATE].value >> 16; From 29d10ac07b713881d39764d48cb623f576eb8e62 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Tue, 30 May 2023 20:43:52 +0530 Subject: [PATCH 0942/1061] video: driver: cleanup driver remove sequence Remove deinit sequence calls and register devm managed callbacks, so that kernel can invoke then, when dev scope ends and cleansup all associated resources. Change-Id: I729fd21fe32d9f39240d0b743f910409d93a00c5 Signed-off-by: Govindaraj Rajagopal --- .../platform/common/inc/msm_vidc_platform.h | 5 +- .../platform/common/src/msm_vidc_platform.c | 125 ++---------------- driver/platform/kalama/inc/msm_vidc_kalama.h | 6 - driver/platform/kalama/src/msm_vidc_kalama.c | 6 - .../pineapple/inc/msm_vidc_pineapple.h | 6 - .../pineapple/src/msm_vidc_pineapple.c | 6 - driver/platform/pineapple/src/pineapple.c | 7 - driver/platform/waipio/inc/msm_vidc_waipio.h | 6 - driver/platform/waipio/src/waipio.c | 6 - driver/variant/iris2/inc/msm_vidc_iris2.h | 6 - driver/variant/iris2/src/msm_vidc_iris2.c | 6 - driver/variant/iris3/inc/msm_vidc_iris3.h | 6 - driver/variant/iris3/src/msm_vidc_iris3.c | 6 - driver/variant/iris33/inc/msm_vidc_iris33.h | 6 - driver/variant/iris33/src/msm_vidc_iris33.c | 6 - driver/vidc/inc/msm_vidc_driver.h | 1 - driver/vidc/src/msm_vidc_driver.c | 25 +--- driver/vidc/src/msm_vidc_probe.c | 116 +++++++++++----- 18 files changed, 95 insertions(+), 256 deletions(-) diff --git a/driver/platform/common/inc/msm_vidc_platform.h b/driver/platform/common/inc/msm_vidc_platform.h index a454812535..ed68427b14 100644 --- a/driver/platform/common/inc/msm_vidc_platform.h +++ b/driver/platform/common/inc/msm_vidc_platform.h @@ -170,9 +170,7 @@ struct msm_platform_inst_cap_dependency { struct msm_vidc_compat_handle { const char *compat; int (*init_platform)(struct msm_vidc_core *core); - int (*deinit_platform)(struct msm_vidc_core *core); int (*init_iris)(struct msm_vidc_core *core); - int (*deinit_iris)(struct msm_vidc_core *core); }; struct msm_vidc_csc_coeff { @@ -281,8 +279,7 @@ static inline bool is_mmrm_supported(struct msm_vidc_core *core) return !!core->platform->data.supports_mmrm; } -int msm_vidc_init_platform(struct platform_device *pdev); -int msm_vidc_deinit_platform(struct platform_device *pdev); +int msm_vidc_init_platform(struct msm_vidc_core *core); /* control framework support functions */ diff --git a/driver/platform/common/src/msm_vidc_platform.c b/driver/platform/common/src/msm_vidc_platform.c index 092e179cb9..a6d32c5bf4 100644 --- a/driver/platform/common/src/msm_vidc_platform.c +++ b/driver/platform/common/src/msm_vidc_platform.c @@ -211,41 +211,31 @@ static const struct msm_vidc_compat_handle compat_handle[] = { { .compat = "qcom,sm8650-vidc", .init_platform = msm_vidc_init_platform_pineapple, - .deinit_platform = msm_vidc_deinit_platform_pineapple, .init_iris = msm_vidc_init_iris33, - .deinit_iris = msm_vidc_deinit_iris33, }, { .compat = "qcom,sm8650-vidc-v2", .init_platform = msm_vidc_init_platform_pineapple, - .deinit_platform = msm_vidc_deinit_platform_pineapple, .init_iris = msm_vidc_init_iris33, - .deinit_iris = msm_vidc_deinit_iris33, }, #endif #if defined(CONFIG_MSM_VIDC_KALAMA) { .compat = "qcom,sm8550-vidc", .init_platform = msm_vidc_init_platform_kalama, - .deinit_platform = msm_vidc_deinit_platform_kalama, .init_iris = msm_vidc_init_iris3, - .deinit_iris = msm_vidc_deinit_iris3, }, { .compat = "qcom,sm8550-vidc-v2", .init_platform = msm_vidc_init_platform_kalama, - .deinit_platform = msm_vidc_deinit_platform_kalama, .init_iris = msm_vidc_init_iris3, - .deinit_iris = msm_vidc_deinit_iris3, }, #endif #if defined(CONFIG_MSM_VIDC_WAIPIO) { .compat = "qcom,sm8450-vidc", .init_platform = msm_vidc_init_platform_waipio, - .deinit_platform = msm_vidc_deinit_platform_waipio, .init_iris = msm_vidc_init_iris2, - .deinit_iris = msm_vidc_deinit_iris2, }, #endif }; @@ -285,41 +275,6 @@ static int msm_vidc_init_ops(struct msm_vidc_core *core) return 0; } -static int msm_vidc_deinit_platform_variant(struct msm_vidc_core *core) -{ - struct device *dev = NULL; - int i, rc = 0; - - if (!core || !core->pdev) { - d_vpr_e("%s: Invalid params\n", __func__); - return -EINVAL; - } - dev = &core->pdev->dev; - - d_vpr_h("%s()\n", __func__); - - /* select platform based on compatible match */ - for (i = 0; i < ARRAY_SIZE(compat_handle); i++) { - if (of_device_is_compatible(dev->of_node, compat_handle[i].compat)) { - rc = compat_handle[i].deinit_platform(core); - if (rc) { - d_vpr_e("%s: (%s) init failed with %d\n", - __func__, compat_handle[i].compat, rc); - return rc; - } - break; - } - } - - /* handle unknown compat type */ - if (i == ARRAY_SIZE(compat_handle)) { - d_vpr_e("%s: Unsupported device: (%s)\n", __func__, dev_name(dev)); - return -EINVAL; - } - - return rc; -} - static int msm_vidc_init_platform_variant(struct msm_vidc_core *core) { struct device *dev = NULL; @@ -355,39 +310,6 @@ static int msm_vidc_init_platform_variant(struct msm_vidc_core *core) return rc; } -static int msm_vidc_deinit_vpu(struct msm_vidc_core *core) -{ - struct device *dev = NULL; - int i, rc = 0; - - if (!core || !core->pdev) { - d_vpr_e("%s: Invalid params\n", __func__); - return -EINVAL; - } - dev = &core->pdev->dev; - - /* select platform based on compatible match */ - for (i = 0; i < ARRAY_SIZE(compat_handle); i++) { - if (of_device_is_compatible(dev->of_node, compat_handle[i].compat)) { - rc = compat_handle[i].deinit_iris(core); - if (rc) { - d_vpr_e("%s: (%s) init failed with %d\n", - __func__, compat_handle[i].compat, rc); - return rc; - } - break; - } - } - - /* handle unknown compat type */ - if (i == ARRAY_SIZE(compat_handle)) { - d_vpr_e("%s: Unsupported device: (%s)\n", __func__, dev_name(dev)); - return -EINVAL; - } - - return rc; -} - static int msm_vidc_init_vpu(struct msm_vidc_core *core) { struct device *dev = NULL; @@ -421,55 +343,24 @@ static int msm_vidc_init_vpu(struct msm_vidc_core *core) return rc; } -int msm_vidc_deinit_platform(struct platform_device *pdev) -{ - struct msm_vidc_core *core; - - if (!pdev) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - core = dev_get_drvdata(&pdev->dev); - if (!core) { - d_vpr_e("%s: core not found in device %s", - __func__, dev_name(&pdev->dev)); - return -EINVAL; - } - - d_vpr_h("%s()\n", __func__); - - msm_vidc_deinit_vpu(core); - msm_vidc_deinit_platform_variant(core); - - msm_vidc_vmem_free((void **)&core->platform); - return 0; -} - -int msm_vidc_init_platform(struct platform_device *pdev) +int msm_vidc_init_platform(struct msm_vidc_core *core) { int rc = 0; struct msm_vidc_platform *platform = NULL; - struct msm_vidc_core *core; - - if (!pdev) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } d_vpr_h("%s()\n", __func__); - core = dev_get_drvdata(&pdev->dev); if (!core) { - d_vpr_e("%s: core not found in device %s", - __func__, dev_name(&pdev->dev)); + d_vpr_e("%s: invalid param\n", __func__); return -EINVAL; } - rc = msm_vidc_vmem_alloc(sizeof(struct msm_vidc_platform), - (void **)&platform, __func__); - if (rc) - return rc; + platform = devm_kzalloc(&core->pdev->dev, + sizeof(struct msm_vidc_platform), GFP_KERNEL); + if (!platform) { + d_vpr_e("%s: failed to alloc memory for platform\n", __func__); + return -ENOMEM; + } core->platform = platform; platform->core = core; diff --git a/driver/platform/kalama/inc/msm_vidc_kalama.h b/driver/platform/kalama/inc/msm_vidc_kalama.h index 8fd11db56c..7ba1fc88b1 100644 --- a/driver/platform/kalama/inc/msm_vidc_kalama.h +++ b/driver/platform/kalama/inc/msm_vidc_kalama.h @@ -11,17 +11,11 @@ #if defined(CONFIG_MSM_VIDC_KALAMA) int msm_vidc_init_platform_kalama(struct msm_vidc_core *core); -int msm_vidc_deinit_platform_kalama(struct msm_vidc_core *core); #else int msm_vidc_init_platform_kalama(struct msm_vidc_core *core) { return -EINVAL; } - -int msm_vidc_deinit_platform_kalama(struct msm_vidc_core *core) -{ - return -EINVAL; -} #endif #endif // _MSM_VIDC_KALAMA_H_ diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index 4d54aa3e45..e75ba5a0e0 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -2822,9 +2822,3 @@ int msm_vidc_init_platform_kalama(struct msm_vidc_core *core) return 0; } - -int msm_vidc_deinit_platform_kalama(struct msm_vidc_core *core) -{ - /* do nothing */ - return 0; -} diff --git a/driver/platform/pineapple/inc/msm_vidc_pineapple.h b/driver/platform/pineapple/inc/msm_vidc_pineapple.h index 17f16a2b66..9f474bbf60 100644 --- a/driver/platform/pineapple/inc/msm_vidc_pineapple.h +++ b/driver/platform/pineapple/inc/msm_vidc_pineapple.h @@ -11,17 +11,11 @@ #if defined(CONFIG_MSM_VIDC_PINEAPPLE) int msm_vidc_init_platform_pineapple(struct msm_vidc_core *core); -int msm_vidc_deinit_platform_pineapple(struct msm_vidc_core *core); #else int msm_vidc_init_platform_pineapple(struct msm_vidc_core *core) { return -EINVAL; } - -int msm_vidc_deinit_platform_pineapple(struct msm_vidc_core *core) -{ - return -EINVAL; -} #endif #endif // _MSM_VIDC_PINEAPPLE_H_ diff --git a/driver/platform/pineapple/src/msm_vidc_pineapple.c b/driver/platform/pineapple/src/msm_vidc_pineapple.c index d9751bf14d..9aa01bf6f1 100644 --- a/driver/platform/pineapple/src/msm_vidc_pineapple.c +++ b/driver/platform/pineapple/src/msm_vidc_pineapple.c @@ -3009,9 +3009,3 @@ int msm_vidc_init_platform_pineapple(struct msm_vidc_core *core) return 0; } - -int msm_vidc_deinit_platform_pineapple(struct msm_vidc_core *core) -{ - /* do nothing */ - return 0; -} diff --git a/driver/platform/pineapple/src/pineapple.c b/driver/platform/pineapple/src/pineapple.c index 74bc8fd1b1..797e85e6cd 100644 --- a/driver/platform/pineapple/src/pineapple.c +++ b/driver/platform/pineapple/src/pineapple.c @@ -1767,10 +1767,3 @@ int msm_vidc_init_platform_pineapple(struct msm_vidc_core *core) return 0; } - -int msm_vidc_deinit_platform_pineapple(struct msm_vidc_core *core) -{ - /* do nothing */ - return 0; -} - diff --git a/driver/platform/waipio/inc/msm_vidc_waipio.h b/driver/platform/waipio/inc/msm_vidc_waipio.h index 1eebe1ede8..a715680d0c 100644 --- a/driver/platform/waipio/inc/msm_vidc_waipio.h +++ b/driver/platform/waipio/inc/msm_vidc_waipio.h @@ -14,7 +14,6 @@ struct context_bank_info *msm_vidc_context_bank(struct msm_vidc_core *core, enum msm_vidc_buffer_region region); int msm_vidc_init_platform_waipio(struct msm_vidc_core *core); -int msm_vidc_deinit_platform_waipio(struct msm_vidc_core *core); #else struct context_bank_info *msm_vidc_context_bank(struct msm_vidc_core *core, enum msm_vidc_buffer_region region) @@ -26,11 +25,6 @@ int msm_vidc_init_platform_waipio(struct msm_vidc_core *core) { return -EINVAL; } - -int msm_vidc_deinit_platform_waipio(struct msm_vidc_core *core) -{ - return -EINVAL; -} #endif #endif // _MSM_VIDC_WAIPIO_H_ diff --git a/driver/platform/waipio/src/waipio.c b/driver/platform/waipio/src/waipio.c index 9c6d802653..d1da92fcf5 100644 --- a/driver/platform/waipio/src/waipio.c +++ b/driver/platform/waipio/src/waipio.c @@ -1857,9 +1857,3 @@ int msm_vidc_init_platform_waipio(struct msm_vidc_core *core) return 0; } - -int msm_vidc_deinit_platform_waipio(struct msm_vidc_core *core) -{ - /* do nothing */ - return 0; -} diff --git a/driver/variant/iris2/inc/msm_vidc_iris2.h b/driver/variant/iris2/inc/msm_vidc_iris2.h index fcb54a7e82..47ade5df66 100644 --- a/driver/variant/iris2/inc/msm_vidc_iris2.h +++ b/driver/variant/iris2/inc/msm_vidc_iris2.h @@ -11,7 +11,6 @@ #if defined(CONFIG_MSM_VIDC_WAIPIO) int msm_vidc_init_iris2(struct msm_vidc_core *core); -int msm_vidc_deinit_iris2(struct msm_vidc_core *core); int msm_vidc_adjust_blur_type_iris2(void *instance, struct v4l2_ctrl *ctrl); #else static inline int msm_vidc_init_iris2(struct msm_vidc_core *core) @@ -19,11 +18,6 @@ static inline int msm_vidc_init_iris2(struct msm_vidc_core *core) return -EINVAL; } -static inline int msm_vidc_deinit_iris2(struct msm_vidc_core *core) -{ - return -EINVAL; -} - static inline int msm_vidc_adjust_blur_type_iris2(void *instance, struct v4l2_ctrl *ctrl) { return -EINVAL; diff --git a/driver/variant/iris2/src/msm_vidc_iris2.c b/driver/variant/iris2/src/msm_vidc_iris2.c index cd177477e0..d2bc879923 100644 --- a/driver/variant/iris2/src/msm_vidc_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_iris2.c @@ -1014,9 +1014,3 @@ int msm_vidc_init_iris2(struct msm_vidc_core *core) return 0; } - -int msm_vidc_deinit_iris2(struct msm_vidc_core *core) -{ - /* do nothing */ - return 0; -} diff --git a/driver/variant/iris3/inc/msm_vidc_iris3.h b/driver/variant/iris3/inc/msm_vidc_iris3.h index 8a4cece4cf..75ba4decc3 100644 --- a/driver/variant/iris3/inc/msm_vidc_iris3.h +++ b/driver/variant/iris3/inc/msm_vidc_iris3.h @@ -11,7 +11,6 @@ #if defined(CONFIG_MSM_VIDC_KALAMA) int msm_vidc_init_iris3(struct msm_vidc_core *core); -int msm_vidc_deinit_iris3(struct msm_vidc_core *core); int msm_vidc_adjust_bitrate_boost_iris3(void *instance, struct v4l2_ctrl *ctrl); #else static inline int msm_vidc_init_iris3(struct msm_vidc_core *core) @@ -19,11 +18,6 @@ static inline int msm_vidc_init_iris3(struct msm_vidc_core *core) return -EINVAL; } -static inline int msm_vidc_deinit_iris3(struct msm_vidc_core *core) -{ - return -EINVAL; -} - static inline int msm_vidc_adjust_bitrate_boost_iris3(void *instance, struct v4l2_ctrl *ctrl) { return -EINVAL; diff --git a/driver/variant/iris3/src/msm_vidc_iris3.c b/driver/variant/iris3/src/msm_vidc_iris3.c index 42e31305df..df96e03f12 100644 --- a/driver/variant/iris3/src/msm_vidc_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_iris3.c @@ -1095,9 +1095,3 @@ int msm_vidc_init_iris3(struct msm_vidc_core *core) return 0; } - -int msm_vidc_deinit_iris3(struct msm_vidc_core *core) -{ - /* do nothing */ - return 0; -} diff --git a/driver/variant/iris33/inc/msm_vidc_iris33.h b/driver/variant/iris33/inc/msm_vidc_iris33.h index af23941d52..d4e37bc8a7 100644 --- a/driver/variant/iris33/inc/msm_vidc_iris33.h +++ b/driver/variant/iris33/inc/msm_vidc_iris33.h @@ -11,7 +11,6 @@ #if defined(CONFIG_MSM_VIDC_PINEAPPLE) int msm_vidc_init_iris33(struct msm_vidc_core *core); -int msm_vidc_deinit_iris33(struct msm_vidc_core *core); int msm_vidc_adjust_bitrate_boost_iris33(void *instance, struct v4l2_ctrl *ctrl); #else static inline int msm_vidc_init_iris33(struct msm_vidc_core *core) @@ -19,11 +18,6 @@ static inline int msm_vidc_init_iris33(struct msm_vidc_core *core) return -EINVAL; } -static inline int msm_vidc_deinit_iris33(struct msm_vidc_core *core) -{ - return -EINVAL; -} - static inline int msm_vidc_adjust_bitrate_boost_iris33(void *instance, struct v4l2_ctrl *ctrl) { return -EINVAL; diff --git a/driver/variant/iris33/src/msm_vidc_iris33.c b/driver/variant/iris33/src/msm_vidc_iris33.c index 545d42f88d..f71af42478 100644 --- a/driver/variant/iris33/src/msm_vidc_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_iris33.c @@ -1344,9 +1344,3 @@ int msm_vidc_init_iris33(struct msm_vidc_core *core) return 0; } - -int msm_vidc_deinit_iris33(struct msm_vidc_core *core) -{ - /* do nothing */ - return 0; -} diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index b7c503c888..1a1714082b 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -562,7 +562,6 @@ bool msm_vidc_is_super_buffer(struct msm_vidc_inst *inst); int msm_vidc_init_core_caps(struct msm_vidc_core *core); int msm_vidc_init_instance_caps(struct msm_vidc_core *core); int msm_vidc_deinit_core_caps(struct msm_vidc_core *core); -int msm_vidc_deinit_instance_caps(struct msm_vidc_core *core); int msm_vidc_update_debug_str(struct msm_vidc_inst *inst); void msm_vidc_allow_dcvs(struct msm_vidc_inst *inst); bool msm_vidc_allow_decode_batch(struct msm_vidc_inst *inst); diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 8c7f2633be..4f5cd5dae2 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -3575,22 +3575,6 @@ static int update_inst_cap_dependency( return 0; } -int msm_vidc_deinit_instance_caps(struct msm_vidc_core *core) -{ - int rc = 0; - - if (!core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - - msm_vidc_vmem_free((void **)&core->inst_caps); - core->inst_caps = NULL; - d_vpr_h("%s: core->inst_caps freed\n", __func__); - - return rc; -} - int msm_vidc_init_instance_caps(struct msm_vidc_core *core) { int rc = 0; @@ -3635,10 +3619,13 @@ int msm_vidc_init_instance_caps(struct msm_vidc_core *core) core->dec_codecs_count = dec_codecs_count; codecs_count = enc_codecs_count + dec_codecs_count; - rc = msm_vidc_vmem_alloc(codecs_count * sizeof(struct msm_vidc_inst_capability), - (void **)&core->inst_caps, __func__); - if (rc) + core->inst_caps = devm_kzalloc(&core->pdev->dev, + codecs_count * sizeof(struct msm_vidc_inst_capability), GFP_KERNEL); + if (!core->inst_caps) { + d_vpr_e("%s: failed to alloc memory for instance caps\n", __func__); + rc = -ENOMEM; goto error; + } check_bit = 0; /* determine codecs for enc domain */ diff --git a/driver/vidc/src/msm_vidc_probe.c b/driver/vidc/src/msm_vidc_probe.c index 59aa0cb610..3fa4208e65 100644 --- a/driver/vidc/src/msm_vidc_probe.c +++ b/driver/vidc/src/msm_vidc_probe.c @@ -361,11 +361,6 @@ static int msm_vidc_deinitialize_core(struct msm_vidc_core *core) mutex_destroy(&core->lock); msm_vidc_update_core_state(core, MSM_VIDC_CORE_DEINIT, __func__); - msm_vidc_vmem_free((void **)&core->response_packet); - msm_vidc_vmem_free((void **)&core->packet); - core->response_packet = NULL; - core->packet = NULL; - if (core->batch_workq) destroy_workqueue(core->batch_workq); @@ -405,15 +400,19 @@ static int msm_vidc_initialize_core(struct msm_vidc_core *core) } core->packet_size = VIDC_IFACEQ_VAR_HUGE_PKT_SIZE; - rc = msm_vidc_vmem_alloc(core->packet_size, - (void **)&core->packet, "core packet"); - if (rc) + core->packet = devm_kzalloc(&core->pdev->dev, core->packet_size, GFP_KERNEL); + if (!core->packet) { + d_vpr_e("%s: failed to alloc core packet\n", __func__); + rc = -ENOMEM; goto exit; + } - rc = msm_vidc_vmem_alloc(core->packet_size, - (void **)&core->response_packet, "core response packet"); - if (rc) + core->response_packet = devm_kzalloc(&core->pdev->dev, core->packet_size, GFP_KERNEL); + if (!core->packet) { + d_vpr_e("%s: failed to alloc core response packet\n", __func__); + rc = -ENOMEM; goto exit; + } mutex_init(&core->lock); INIT_LIST_HEAD(&core->instances); @@ -425,10 +424,6 @@ static int msm_vidc_initialize_core(struct msm_vidc_core *core) return 0; exit: - msm_vidc_vmem_free((void **)&core->response_packet); - msm_vidc_vmem_free((void **)&core->packet); - core->response_packet = NULL; - core->packet = NULL; if (core->batch_workq) destroy_workqueue(core->batch_workq); if (core->pm_workq) @@ -439,6 +434,65 @@ exit: return rc; } +static void msm_vidc_devm_deinit_core(void *res) +{ + struct msm_vidc_core *core = res; + + d_vpr_h("%s()\n", __func__); + msm_vidc_deinitialize_core(core); +} + +static int msm_vidc_devm_init_core(struct device *dev, struct msm_vidc_core *core) +{ + int rc = 0; + + if (!dev || !core) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + + rc = msm_vidc_initialize_core(core); + if (rc) { + d_vpr_e("%s: init failed with %d\n", __func__, rc); + return rc; + } + + rc = devm_add_action_or_reset(dev, msm_vidc_devm_deinit_core, (void *)core); + if (rc) + return -EINVAL; + + return rc; +} + +static void msm_vidc_devm_debugfs_put(void *res) +{ + struct dentry *parent = res; + + d_vpr_h("%s()\n", __func__); + debugfs_remove_recursive(parent); +} + +static struct dentry *msm_vidc_devm_debugfs_get(struct device *dev) +{ + struct dentry *parent = NULL; + int rc = 0; + + if (!dev) { + d_vpr_e("%s: invalid params\n", __func__); + return NULL; + } + + parent = msm_vidc_debugfs_init_drv(); + if (!parent) + return NULL; + + rc = devm_add_action_or_reset(dev, msm_vidc_devm_debugfs_put, (void *)parent); + if (rc) + return NULL; + + return parent; +} + static int msm_vidc_setup_context_bank(struct msm_vidc_core *core, struct device *dev) { @@ -674,14 +728,7 @@ static int msm_vidc_remove_video_device(struct platform_device *pdev) sysfs_remove_group(&pdev->dev.kobj, &msm_vidc_core_attr_group); - msm_vidc_deinit_instance_caps(core); - - msm_vidc_deinit_platform(pdev); - msm_vidc_deinitialize_core(core); - dev_set_drvdata(&pdev->dev, NULL); - debugfs_remove_recursive(core->debugfs_parent); - msm_vidc_vmem_free((void **)&core); g_core = NULL; d_vpr_h("%s(): succssful\n", __func__); @@ -724,25 +771,27 @@ static int msm_vidc_probe_video_device(struct platform_device *pdev) d_vpr_h("%s: %s\n", __func__, dev_name(&pdev->dev)); - rc = msm_vidc_vmem_alloc(sizeof(*core), (void **)&core, __func__); - if (rc) - return rc; + core = devm_kzalloc(&pdev->dev, sizeof(struct msm_vidc_core), GFP_KERNEL); + if (!core) { + d_vpr_e("%s: failed to alloc memory for core\n", __func__); + return -ENOMEM; + } g_core = core; - core->debugfs_parent = msm_vidc_debugfs_init_drv(); - if (!core->debugfs_parent) - d_vpr_h("Failed to create debugfs for msm_vidc\n"); - core->pdev = pdev; dev_set_drvdata(&pdev->dev, core); - rc = msm_vidc_initialize_core(core); + core->debugfs_parent = msm_vidc_devm_debugfs_get(&pdev->dev); + if (!core->debugfs_parent) + d_vpr_h("Failed to create debugfs for msm_vidc\n"); + + rc = msm_vidc_devm_init_core(&pdev->dev, core); if (rc) { d_vpr_e("%s: init core failed with %d\n", __func__, rc); goto init_core_failed; } - rc = msm_vidc_init_platform(pdev); + rc = msm_vidc_init_platform(core); if (rc) { d_vpr_e("%s: init platform failed with %d\n", __func__, rc); rc = -EINVAL; @@ -839,16 +888,11 @@ master_add_failed: sub_dev_failed: sysfs_remove_group(&pdev->dev.kobj, &msm_vidc_core_attr_group); init_group_failed: - msm_vidc_deinit_instance_caps(core); init_inst_caps_fail: init_res_failed: - msm_vidc_deinit_platform(pdev); init_plat_failed: - msm_vidc_deinitialize_core(core); init_core_failed: dev_set_drvdata(&pdev->dev, NULL); - debugfs_remove_recursive(core->debugfs_parent); - msm_vidc_vmem_free((void **)&core); g_core = NULL; return rc; From 84b23e5835b9784cee31df369b8e9605b22c5846 Mon Sep 17 00:00:00 2001 From: Dikshita Agarwal Date: Tue, 13 Jun 2023 18:46:42 +0530 Subject: [PATCH 0943/1061] iris: rename msm_vidc_suspend_locked to msm_vidc_suspend To follow the same nomenclature as the other function names in driver, rename msm_vidc_suspend_locked to msm_vidc_suspend. Change-Id: Iacdd6604c25f6efc61c5b6add939669f5bd26355 Signed-off-by: Dikshita Agarwal --- driver/vidc/inc/msm_vidc_driver.h | 2 +- driver/vidc/src/msm_vidc_driver.c | 2 +- driver/vidc/src/msm_vidc_probe.c | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index b7c503c888..162b6b7d02 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -471,7 +471,7 @@ int msm_vidc_trigger_stability(struct msm_vidc_core *core, void msm_vidc_stability_handler(struct work_struct *work); int cancel_stability_work_sync(struct msm_vidc_inst *inst); void msm_vidc_fw_unload_handler(struct work_struct *work); -int msm_vidc_suspend_locked(struct msm_vidc_core *core); +int msm_vidc_suspend(struct msm_vidc_core *core); void msm_vidc_batch_handler(struct work_struct *work); int msm_vidc_event_queue_init(struct msm_vidc_inst *inst); int msm_vidc_event_queue_deinit(struct msm_vidc_inst *inst); diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 8c7f2633be..ddab080a8d 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -235,7 +235,7 @@ static u32 msm_vidc_get_buffer_stats_flag(struct msm_vidc_inst *inst) return flags; } -int msm_vidc_suspend_locked(struct msm_vidc_core *core) +int msm_vidc_suspend(struct msm_vidc_core *core) { int rc = 0; diff --git a/driver/vidc/src/msm_vidc_probe.c b/driver/vidc/src/msm_vidc_probe.c index 59aa0cb610..391bb9d5de 100644 --- a/driver/vidc/src/msm_vidc_probe.c +++ b/driver/vidc/src/msm_vidc_probe.c @@ -916,7 +916,7 @@ static int msm_vidc_pm_suspend(struct device *dev) } d_vpr_h("%s\n", __func__); - rc = msm_vidc_suspend_locked(core); + rc = msm_vidc_suspend(core); if (rc == -ENOTSUPP) rc = 0; else if (rc) From cfbcc0880ff4ba19c254e71f3eba9836cf54227d Mon Sep 17 00:00:00 2001 From: Deepa Guthyappa Madivalara Date: Tue, 13 Jun 2023 13:41:08 -0700 Subject: [PATCH 0944/1061] video: driver: update to FW_Cache logs level - shift FW_Cache log levels as firmware shifted the bits by 4 Change-Id: I113d7c236bc1f361419edd09b8339ce88a453d5e Signed-off-by: Deepa Guthyappa Madivalara --- driver/vidc/inc/msm_vidc_debug.h | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_debug.h b/driver/vidc/inc/msm_vidc_debug.h index 3e5de29288..c247182588 100644 --- a/driver/vidc/inc/msm_vidc_debug.h +++ b/driver/vidc/inc/msm_vidc_debug.h @@ -83,12 +83,12 @@ enum vidc_msg_prio_fw { FW_ERROR = 0x00000008, FW_FATAL = 0x00000010, FW_PERF = 0x00000020, - FW_CACHE_LOW = 0x00001000, - FW_CACHE_MED = 0x00002000, - FW_CACHE_HIGH = 0x00004000, - FW_CACHE_ERROR = 0x00008000, - FW_CACHE_FATAL = 0x00010000, - FW_CACHE_PERF = 0x00020000, + FW_CACHE_LOW = 0x00000100, + FW_CACHE_MED = 0x00000200, + FW_CACHE_HIGH = 0x00000400, + FW_CACHE_ERROR = 0x00000800, + FW_CACHE_FATAL = 0x00001000, + FW_CACHE_PERF = 0x00002000, FW_PRINTK = 0x10000000, FW_FTRACE = 0x20000000, }; From dd06676471882b98b3bd71da7397f73642b86237 Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Wed, 7 Jun 2023 16:50:26 -0700 Subject: [PATCH 0945/1061] video: driver: adjust opb buffers min count Incase of split mode(either for linear color format or AV1 film grain usecases), dpb and opb(output) buffers are allocated in same context bank. In high memory consumption usecases like 8k, it can lead to OOM issues. To avoid this, for split mode, when both dpb and opb buffers are used, honor fw min count for dpb buffers, whereas for opb buffers choose an optimal min count to ensure performance. Change-Id: I287aff862d2fe36a690c1393d64f8095578baf34 Signed-off-by: Darshana Patil --- .../iris33/src/msm_vidc_buffer_iris33.c | 29 +++++----- driver/vidc/inc/msm_vidc_driver.h | 13 +++++ driver/vidc/src/msm_vdec.c | 33 +++++------ driver/vidc/src/msm_vidc_buffer.c | 58 ++++++++++++------- 4 files changed, 79 insertions(+), 54 deletions(-) diff --git a/driver/variant/iris33/src/msm_vidc_buffer_iris33.c b/driver/variant/iris33/src/msm_vidc_buffer_iris33.c index 07e3d19b97..542ff1c092 100644 --- a/driver/variant/iris33/src/msm_vidc_buffer_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_buffer_iris33.c @@ -74,9 +74,11 @@ static u32 msm_vidc_decoder_comv_size_iris33(struct msm_vidc_inst *inst) * achieve performance but save memory. */ if (res_is_greater_than(width, height, 4096, 2176)) - num_comv = inst->buffers.output.min_count + 3; + num_comv = inst->fw_min_count ? + inst->fw_min_count + 3 : inst->buffers.output.min_count + 3; else - num_comv = inst->buffers.output.min_count + 7; + num_comv = inst->fw_min_count ? + inst->fw_min_count + 7 : inst->buffers.output.min_count + 7; } else { num_comv = inst->buffers.output.min_count; } @@ -624,21 +626,18 @@ static int msm_vidc_input_min_count_iris33(struct msm_vidc_inst *inst) static int msm_buffer_dpb_count(struct msm_vidc_inst *inst) { int count = 0; - u32 color_fmt; - - /* decoder dpb buffer count */ - if (is_decode_session(inst)) { - color_fmt = inst->capabilities[PIX_FMTS].value; - if (is_linear_colorformat(color_fmt) || - (inst->codec == MSM_VIDC_AV1 && - (inst->capabilities[FILM_GRAIN].value))) - count = inst->buffers.output.min_count; - - return count; - } /* encoder dpb buffer count */ - return msm_vidc_get_recon_buf_count(inst); + if (is_encode_session(inst)) + return msm_vidc_get_recon_buf_count(inst); + + /* decoder dpb buffer count */ + if (is_split_mode_enabled(inst)) { + count = inst->fw_min_count ? + inst->fw_min_count : inst->buffers.output.min_count; + } + + return count; } static int msm_buffer_delivery_mode_based_min_count_iris33(struct msm_vidc_inst *inst, diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index b7c503c888..14374348b2 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -320,6 +320,19 @@ static inline bool is_rgba_colorformat(enum msm_vidc_colorformat_type colorforma colorformat == MSM_VIDC_FMT_RGBA8888C; } +static inline bool is_split_mode_enabled(struct msm_vidc_inst *inst) +{ + if (!is_decode_session(inst)) + return false; + + if (is_linear_colorformat(inst->capabilities[PIX_FMTS].value) || + (inst->codec == MSM_VIDC_AV1 && + inst->capabilities[FILM_GRAIN].value)) + return true; + + return false; +} + static inline bool is_thumbnail_session(struct msm_vidc_inst *inst) { return !!(inst->capabilities[THUMBNAIL_MODE].value); diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index f6be2ac1c1..97a116b710 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -615,15 +615,12 @@ static int msm_vdec_set_av1_superblock_enabled(struct msm_vidc_inst *inst, static int msm_vdec_set_opb_enable(struct msm_vidc_inst *inst) { int rc = 0; - u32 color_fmt; u32 opb_enable = 0; if (inst->codec != MSM_VIDC_AV1) return 0; - color_fmt = inst->capabilities[PIX_FMTS].value; - if (is_linear_colorformat(color_fmt) || - inst->capabilities[FILM_GRAIN].value) + if (is_split_mode_enabled(inst)) opb_enable = 1; i_vpr_h(inst, "%s: OPB enable: %d", __func__, opb_enable); @@ -1355,19 +1352,6 @@ static int msm_vdec_read_input_subcr_params(struct msm_vidc_inst *inst) inst->fmts[INPUT_PORT].fmt.pix_mp.quantization = inst->fmts[OUTPUT_PORT].fmt.pix_mp.quantization; - inst->buffers.output.min_count = subsc_params.fw_min_count; - inst->fw_min_count = subsc_params.fw_min_count; - inst->buffers.output.extra_count = call_session_op(core, - extra_count, inst, MSM_VIDC_BUF_OUTPUT); - inst->buffers.output_meta.min_count = inst->buffers.output.min_count; - inst->buffers.output_meta.extra_count = inst->buffers.output.extra_count; - if (is_thumbnail_session(inst) && inst->codec != MSM_VIDC_VP9) { - if (inst->buffers.output.min_count != 1) { - i_vpr_e(inst, "%s: invalid min count %d in thumbnail case\n", - __func__, inst->buffers.output.min_count); - msm_vidc_change_state(inst, MSM_VIDC_ERROR, __func__); - } - } inst->crop.top = subsc_params.crop_offsets[0] & 0xFFFF; inst->crop.left = (subsc_params.crop_offsets[0] >> 16) & 0xFFFF; inst->crop.height = inst->fmts[INPUT_PORT].fmt.pix_mp.height - @@ -1402,6 +1386,21 @@ static int msm_vdec_read_input_subcr_params(struct msm_vidc_inst *inst) MSM_VIDC_META_DISABLE, __func__); } + inst->fw_min_count = subsc_params.fw_min_count; + inst->buffers.output.min_count = call_session_op(core, + min_count, inst, MSM_VIDC_BUF_OUTPUT); + inst->buffers.output.extra_count = call_session_op(core, + extra_count, inst, MSM_VIDC_BUF_OUTPUT); + inst->buffers.output_meta.min_count = inst->buffers.output.min_count; + inst->buffers.output_meta.extra_count = inst->buffers.output.extra_count; + if (is_thumbnail_session(inst) && inst->codec != MSM_VIDC_VP9) { + if (inst->buffers.output.min_count != 1) { + i_vpr_e(inst, "%s: invalid min count %d in thumbnail case\n", + __func__, inst->buffers.output.min_count); + msm_vidc_change_state(inst, MSM_VIDC_ERROR, __func__); + } + } + return 0; } diff --git a/driver/vidc/src/msm_vidc_buffer.c b/driver/vidc/src/msm_vidc_buffer.c index b80bdc2ffa..4d51e0ee61 100644 --- a/driver/vidc/src/msm_vidc_buffer.c +++ b/driver/vidc/src/msm_vidc_buffer.c @@ -54,30 +54,44 @@ u32 msm_vidc_output_min_count(struct msm_vidc_inst *inst) if (is_thumbnail_session(inst)) return 1; - if (is_decode_session(inst)) { - if (inst->fw_min_count) - return inst->fw_min_count; + if (is_encode_session(inst)) + return MIN_ENC_OUTPUT_BUFFERS; - switch (inst->codec) { - case MSM_VIDC_H264: - case MSM_VIDC_HEVC: - output_min_count = 4; - break; - case MSM_VIDC_VP9: - output_min_count = 9; - break; - case MSM_VIDC_AV1: - output_min_count = 11; - break; - case MSM_VIDC_HEIC: - output_min_count = 3; - break; - default: - output_min_count = 4; + /* decoder handling below */ + /* fw_min_count > 0 indicates reconfig event has already arrived */ + if (inst->fw_min_count) { + /* TODO: need to update condition to include AVC/HEVC as well */ + if (is_split_mode_enabled(inst) && + (inst->codec == MSM_VIDC_AV1 || + inst->codec == MSM_VIDC_VP9)) { + /* + * return opb min buffer count as min(4, fw_min_count) + * fw min count is used for dpb min count + */ + return min_t(u32, 4, inst->fw_min_count); + } else { + return inst->fw_min_count; } - } else { - output_min_count = MIN_ENC_OUTPUT_BUFFERS; - //todo: reduce heic count to 2, once HAL side cushion is added + } + + /* initial handling before reconfig event arrived */ + switch (inst->codec) { + case MSM_VIDC_H264: + case MSM_VIDC_HEVC: + output_min_count = 4; + break; + case MSM_VIDC_VP9: + output_min_count = 9; + break; + case MSM_VIDC_AV1: + output_min_count = 11; + break; + case MSM_VIDC_HEIC: + output_min_count = 3; + break; + default: + output_min_count = 4; + break; } return output_min_count; From 907ea755040b63764ef0982544efb2d3385d9c3a Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Fri, 28 Apr 2023 17:15:26 -0700 Subject: [PATCH 0946/1061] video: driver: Add support to enable output tx sw fence by default As part of default enablement of output tx type sw fence, add this support in driver to disable fence based on below conditions for INPUT_PSC propertities: - If session is interlace type - If OUTPUT_ORDER is 0 and HFI_PROP_MAX_NUM_REORDER_FRAMES > 0 Change-Id: If861129ba96329c0277a9c9698f67baf25e5d82e Signed-off-by: Akshata Sahukar --- .../platform/common/inc/msm_vidc_platform.h | 1 - .../common/inc/msm_vidc_platform_ext.h | 6 + .../platform/common/src/msm_vidc_platform.c | 24 ---- driver/platform/kalama/src/msm_vidc_kalama.c | 79 +++++++++++-- .../pineapple/src/msm_vidc_pineapple.c | 49 ++++---- driver/vidc/inc/msm_vdec.h | 2 + driver/vidc/inc/msm_vidc_internal.h | 2 + driver/vidc/src/msm_vdec.c | 105 ++++++++++++++---- driver/vidc/src/msm_vidc_driver.c | 23 ++++ driver/vidc/src/msm_vidc_fence.c | 2 +- driver/vidc/src/msm_vidc_state.c | 4 +- driver/vidc/src/venus_hfi_response.c | 37 +++--- 12 files changed, 235 insertions(+), 99 deletions(-) diff --git a/driver/platform/common/inc/msm_vidc_platform.h b/driver/platform/common/inc/msm_vidc_platform.h index ed68427b14..38f5ad9503 100644 --- a/driver/platform/common/inc/msm_vidc_platform.h +++ b/driver/platform/common/inc/msm_vidc_platform.h @@ -336,7 +336,6 @@ int msm_vidc_adjust_dec_lowlatency_mode(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_session_priority(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_roi_info(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_all_intra(void *instance, struct v4l2_ctrl *ctrl); -int msm_vidc_adjust_dec_outbuf_fence(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_dec_outbuf_fence_type(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_dec_outbuf_fence_direction(void *instance, struct v4l2_ctrl *ctrl); diff --git a/driver/platform/common/inc/msm_vidc_platform_ext.h b/driver/platform/common/inc/msm_vidc_platform_ext.h index 250c8cfe07..5e30cd9fea 100644 --- a/driver/platform/common/inc/msm_vidc_platform_ext.h +++ b/driver/platform/common/inc/msm_vidc_platform_ext.h @@ -247,6 +247,12 @@ enum v4l2_mpeg_vidc_av1_tier { #define V4L2_CID_MPEG_VIDC_GRID_WIDTH \ (V4L2_CID_MPEG_VIDC_BASE + 0x49) +#define V4L2_CID_MPEG_VIDC_MAX_NUM_REORDER_FRAMES \ + (V4L2_CID_MPEG_VIDC_BASE + 0x4A) + +#define V4L2_CID_MPEG_VIDC_INTERLACE \ + (V4L2_CID_MPEG_VIDC_BASE + 0x4B) + int msm_vidc_adjust_ir_period(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_dec_frame_rate(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_dec_operating_rate(void *instance, struct v4l2_ctrl *ctrl); diff --git a/driver/platform/common/src/msm_vidc_platform.c b/driver/platform/common/src/msm_vidc_platform.c index a002930cd2..c0db35683e 100644 --- a/driver/platform/common/src/msm_vidc_platform.c +++ b/driver/platform/common/src/msm_vidc_platform.c @@ -2234,30 +2234,6 @@ int msm_vidc_adjust_roi_info(void *instance, struct v4l2_ctrl *ctrl) return 0; } -int msm_vidc_adjust_dec_outbuf_fence(void *instance, struct v4l2_ctrl *ctrl) -{ - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; - u32 adjusted_value = 0; - s32 picture_order = -1; - - adjusted_value = ctrl ? ctrl->val : inst->capabilities[META_OUTBUF_FENCE].value; - - if (msm_vidc_get_parent_value(inst, META_OUTBUF_FENCE, OUTPUT_ORDER, - &picture_order, __func__)) - return -EINVAL; - - if (picture_order == 0) { - /* disable outbuf fence */ - adjusted_value = MSM_VIDC_META_DISABLE | - MSM_VIDC_META_RX_INPUT; - } - - msm_vidc_update_cap_value(inst, META_OUTBUF_FENCE, - adjusted_value, __func__); - - return 0; -} - int msm_vidc_adjust_dec_outbuf_fence_type(void *instance, struct v4l2_ctrl *ctrl) { struct msm_vidc_inst_cap *capability; diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index e75ba5a0e0..8f884c4ff5 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -546,7 +546,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_OUTBUF_FENCE, HFI_PROP_FENCE, - CAP_FLAG_BITMASK | CAP_FLAG_META}, + CAP_FLAG_BITMASK | CAP_FLAG_META | CAP_FLAG_DYNAMIC_ALLOWED}, /* * Client to do set_ctrl with FENCE_ID to set fence_id @@ -565,6 +565,40 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { 0, CAP_FLAG_VOLATILE}, + /* Fence type for input buffer. Currently unused */ + {INBUF_FENCE_TYPE, DEC, H264|HEVC|VP9|AV1, + MSM_VIDC_FENCE_NONE, MSM_VIDC_FENCE_NONE, + BIT(MSM_VIDC_FENCE_NONE), + MSM_VIDC_FENCE_NONE, + 0, + HFI_PROP_FENCE_TYPE, + CAP_FLAG_MENU | CAP_FLAG_INPUT_PORT}, + + {OUTBUF_FENCE_TYPE, DEC, H264|HEVC|VP9|AV1, + MSM_VIDC_FENCE_NONE, MSM_VIDC_SYNX_V2_FENCE, + BIT(MSM_VIDC_FENCE_NONE) | BIT(MSM_VIDC_SW_FENCE), + MSM_VIDC_FENCE_NONE, + 0, + HFI_PROP_FENCE_TYPE, + CAP_FLAG_MENU | CAP_FLAG_OUTPUT_PORT}, + + /* Fence direction for input buffer. Currently unused */ + {INBUF_FENCE_DIRECTION, DEC, H264|HEVC|VP9|AV1, + MSM_VIDC_FENCE_DIR_NONE, MSM_VIDC_FENCE_DIR_NONE, + BIT(MSM_VIDC_FENCE_DIR_NONE), + MSM_VIDC_FENCE_DIR_NONE, + 0, + HFI_PROP_FENCE_DIRECTION, + CAP_FLAG_MENU | CAP_FLAG_INPUT_PORT}, + + {OUTBUF_FENCE_DIRECTION, DEC, H264|HEVC|VP9|AV1, + MSM_VIDC_FENCE_DIR_NONE, MSM_VIDC_FENCE_DIR_RX, + BIT(MSM_VIDC_FENCE_DIR_NONE) | BIT(MSM_VIDC_FENCE_DIR_TX), + MSM_VIDC_FENCE_DIR_NONE, + 0, + HFI_PROP_FENCE_DIRECTION, + CAP_FLAG_MENU | CAP_FLAG_OUTPUT_PORT}, + {TS_REORDER, DEC, H264|HEVC, 0, 1, 1, 0, V4L2_CID_MPEG_VIDC_TS_REORDER}, @@ -1539,9 +1573,17 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { 0, HFI_PROP_PIPE}, - {POC, DEC, H264, 0, 2, 1, 1, + {POC, DEC, H264, + 0, 2, 1, 1, 0, - HFI_PROP_PIC_ORDER_CNT_TYPE}, + HFI_PROP_PIC_ORDER_CNT_TYPE, + CAP_FLAG_VOLATILE}, + + {MAX_NUM_REORDER_FRAMES, DEC, H264 | HEVC, + 0, 16, 1, 0, + V4L2_CID_MPEG_VIDC_MAX_NUM_REORDER_FRAMES, + HFI_PROP_MAX_NUM_REORDER_FRAMES, + CAP_FLAG_VOLATILE}, {QUALITY_MODE, ENC, CODECS_ALL, MSM_VIDC_MAX_QUALITY_MODE, @@ -1551,8 +1593,9 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { {CODED_FRAMES, DEC, H264|HEVC|HEIC, CODED_FRAMES_PROGRESSIVE, CODED_FRAMES_INTERLACE, 1, CODED_FRAMES_PROGRESSIVE, - 0, - HFI_PROP_CODED_FRAMES}, + V4L2_CID_MPEG_VIDC_INTERLACE, + HFI_PROP_CODED_FRAMES, + CAP_FLAG_VOLATILE}, {BIT_DEPTH, DEC, CODECS_ALL, BIT_DEPTH_8, BIT_DEPTH_10, 1, BIT_DEPTH_8, 0, @@ -1982,10 +2025,30 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kala msm_vidc_set_u32}, {META_OUTBUF_FENCE, DEC, H264|HEVC|VP9|AV1, - {LOWLATENCY_MODE}, - msm_vidc_adjust_dec_outbuf_fence, + {LOWLATENCY_MODE, OUTBUF_FENCE_TYPE, OUTBUF_FENCE_DIRECTION}, + NULL, NULL}, + {INBUF_FENCE_TYPE, DEC, H264|HEVC|VP9|AV1, + {0}, + NULL, + NULL}, + + {OUTBUF_FENCE_TYPE, DEC, H264|HEVC|VP9|AV1, + {0}, + msm_vidc_adjust_dec_outbuf_fence_type, + msm_vidc_set_outbuf_fence_type}, + + {INBUF_FENCE_DIRECTION, DEC, H264|HEVC|VP9|AV1, + {0}, + NULL, + NULL}, + + {OUTBUF_FENCE_DIRECTION, DEC, H264|HEVC|VP9|AV1, + {0}, + msm_vidc_adjust_dec_outbuf_fence_direction, + msm_vidc_set_outbuf_fence_direction}, + {HFLIP, ENC, CODECS_ALL, {0}, NULL, @@ -2352,7 +2415,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kala NULL}, {OUTPUT_ORDER, DEC, H264|HEVC|VP9|AV1, - {META_OUTBUF_FENCE}, + {0}, msm_vidc_adjust_output_order, msm_vidc_set_u32}, diff --git a/driver/platform/pineapple/src/msm_vidc_pineapple.c b/driver/platform/pineapple/src/msm_vidc_pineapple.c index 9aa01bf6f1..f862a23a26 100644 --- a/driver/platform/pineapple/src/msm_vidc_pineapple.c +++ b/driver/platform/pineapple/src/msm_vidc_pineapple.c @@ -607,7 +607,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_OUTBUF_FENCE, HFI_PROP_FENCE, - CAP_FLAG_BITMASK | CAP_FLAG_META}, + CAP_FLAG_BITMASK | CAP_FLAG_META | CAP_FLAG_DYNAMIC_ALLOWED}, /* * Client to do set_ctrl with FENCE_ID to set fence_id @@ -626,7 +626,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { 0, CAP_FLAG_VOLATILE}, - /* Fence type for input buffer. Currently unsed */ + /* Fence type for input buffer. Currently unused */ {INBUF_FENCE_TYPE, DEC, H264|HEVC|VP9|AV1, MSM_VIDC_FENCE_NONE, MSM_VIDC_FENCE_NONE, BIT(MSM_VIDC_FENCE_NONE), @@ -644,7 +644,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { HFI_PROP_FENCE_TYPE, CAP_FLAG_MENU | CAP_FLAG_OUTPUT_PORT}, - /* Fence direction for input buffer. Currently unsed */ + /* Fence direction for input buffer. Currently unused */ {INBUF_FENCE_DIRECTION, DEC, H264|HEVC|VP9|AV1, MSM_VIDC_FENCE_DIR_NONE, MSM_VIDC_FENCE_DIR_NONE, BIT(MSM_VIDC_FENCE_DIR_NONE), @@ -1649,9 +1649,17 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { 0, HFI_PROP_PIPE}, - {POC, DEC, H264, 0, 2, 1, 1, + {POC, DEC, H264, + 0, 2, 1, 1, 0, - HFI_PROP_PIC_ORDER_CNT_TYPE}, + HFI_PROP_PIC_ORDER_CNT_TYPE, + CAP_FLAG_VOLATILE}, + + {MAX_NUM_REORDER_FRAMES, DEC, H264 | HEVC, + 0, 16, 1, 0, + V4L2_CID_MPEG_VIDC_MAX_NUM_REORDER_FRAMES, + HFI_PROP_MAX_NUM_REORDER_FRAMES, + CAP_FLAG_VOLATILE}, {QUALITY_MODE, ENC, CODECS_ALL, MSM_VIDC_MAX_QUALITY_MODE, @@ -1661,8 +1669,9 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { {CODED_FRAMES, DEC, H264|HEVC|HEIC, CODED_FRAMES_PROGRESSIVE, CODED_FRAMES_INTERLACE, 1, CODED_FRAMES_PROGRESSIVE, - 0, - HFI_PROP_CODED_FRAMES}, + V4L2_CID_MPEG_VIDC_INTERLACE, + HFI_PROP_CODED_FRAMES, + CAP_FLAG_VOLATILE}, {BIT_DEPTH, DEC, CODECS_ALL, BIT_DEPTH_8, BIT_DEPTH_10, 1, BIT_DEPTH_8, 0, @@ -1853,7 +1862,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_PICTURE_TYPE, HFI_PROP_PICTURE_TYPE, - CAP_FLAG_BITMASK | CAP_FLAG_META}, + CAP_FLAG_BITMASK | CAP_FLAG_META | CAP_FLAG_DYNAMIC_ALLOWED}, {META_SEI_MASTERING_DISP, ENC, HEVC|HEIC, MSM_VIDC_META_DISABLE, @@ -1955,7 +1964,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { 0, MSM_VIDC_META_DISABLE, V4L2_CID_MPEG_VIDC_METADATA_BUFFER_TAG, HFI_PROP_BUFFER_TAG, - CAP_FLAG_BITMASK | CAP_FLAG_META}, + CAP_FLAG_BITMASK | CAP_FLAG_META | CAP_FLAG_DYNAMIC_ALLOWED}, {META_DPB_TAG_LIST, DEC, CODECS_ALL, MSM_VIDC_META_DISABLE, @@ -2092,15 +2101,9 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine NULL, msm_vidc_set_u32}, - {META_OUTBUF_FENCE, DEC, H264|HEVC|AV1, - {LOWLATENCY_MODE, SLICE_DECODE, - OUTBUF_FENCE_TYPE, OUTBUF_FENCE_DIRECTION}, - msm_vidc_adjust_dec_outbuf_fence, - NULL}, - - {META_OUTBUF_FENCE, DEC, VP9, + {META_OUTBUF_FENCE, DEC, H264|HEVC|AV1|VP9, {LOWLATENCY_MODE, OUTBUF_FENCE_TYPE, OUTBUF_FENCE_DIRECTION}, - msm_vidc_adjust_dec_outbuf_fence, + NULL, NULL}, {INBUF_FENCE_TYPE, DEC, H264|HEVC|VP9|AV1, @@ -2257,7 +2260,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine NULL}, {LOWLATENCY_MODE, DEC, H264|HEVC|AV1, - {STAGE, SLICE_DECODE}, + {STAGE}, msm_vidc_adjust_dec_lowlatency_mode, NULL}, @@ -2512,13 +2515,8 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine NULL, NULL}, - {OUTPUT_ORDER, DEC, H264|HEVC|AV1, - {META_OUTBUF_FENCE, SLICE_DECODE}, - msm_vidc_adjust_output_order, - msm_vidc_set_u32}, - - {OUTPUT_ORDER, DEC, VP9, - {META_OUTBUF_FENCE}, + {OUTPUT_ORDER, DEC, H264|HEVC|AV1|VP9, + {0}, msm_vidc_adjust_output_order, msm_vidc_set_u32}, @@ -2794,6 +2792,7 @@ static const u32 pineapple_vdec_psc_hevc[] = { HFI_PROP_LEVEL, HFI_PROP_TIER, HFI_PROP_SIGNAL_COLOR_INFO, + HFI_PROP_MAX_NUM_REORDER_FRAMES, }; static const u32 pineapple_vdec_psc_vp9[] = { diff --git a/driver/vidc/inc/msm_vdec.h b/driver/vidc/inc/msm_vdec.h index 3a3b95c233..319f8a010e 100644 --- a/driver/vidc/inc/msm_vdec.h +++ b/driver/vidc/inc/msm_vdec.h @@ -33,6 +33,8 @@ int msm_vdec_start_cmd(struct msm_vidc_inst *inst); int msm_vdec_handle_release_buffer(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buf); int msm_vdec_set_num_comv(struct msm_vidc_inst *inst); +int msm_vdec_subscribe_metadata(struct msm_vidc_inst *inst, + enum msm_vidc_port_type port); int msm_vdec_get_input_internal_buffers(struct msm_vidc_inst *inst); int msm_vdec_create_input_internal_buffers(struct msm_vidc_inst *inst); int msm_vdec_queue_input_internal_buffers(struct msm_vidc_inst *inst); diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 035da09021..946ea50723 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -390,6 +390,7 @@ enum msm_vidc_metadata_bits { CAP(CHROMA_QP_INDEX_OFFSET) \ CAP(PIPE) \ CAP(POC) \ + CAP(MAX_NUM_REORDER_FRAMES) \ CAP(CODED_FRAMES) \ CAP(BIT_DEPTH) \ CAP(CODEC_CONFIG) \ @@ -822,6 +823,7 @@ struct msm_vidc_subscription_params { u32 tier; u32 av1_film_grain_present; u32 av1_super_block_enabled; + u32 max_num_reorder_frames; }; struct msm_vidc_hfi_frame_info { diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 97a116b710..0407494a67 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -399,6 +399,34 @@ static int msm_vdec_set_picture_order_count(struct msm_vidc_inst *inst, return rc; } +static int msm_vdec_set_max_num_reorder_frames(struct msm_vidc_inst *inst, + enum msm_vidc_port_type port) +{ + int rc = 0; + u32 reorder_frames = 0; + + if (port != INPUT_PORT && port != OUTPUT_PORT) { + i_vpr_e(inst, "%s: invalid port %d\n", __func__, port); + return -EINVAL; + } + + reorder_frames = inst->subcr_params[port].max_num_reorder_frames; + i_vpr_h(inst, "%s: max reorder frames count: %d", __func__, reorder_frames); + rc = venus_hfi_session_property(inst, + HFI_PROP_MAX_NUM_REORDER_FRAMES, + HFI_HOST_FLAGS_NONE, + get_hfi_port(inst, port), + HFI_PAYLOAD_U32, + &reorder_frames, + sizeof(u32)); + if (rc) { + i_vpr_e(inst, "%s: set property failed\n", __func__); + return rc; + } + + return rc; +} + static int msm_vdec_set_colorspace(struct msm_vidc_inst *inst, enum msm_vidc_port_type port) { @@ -693,6 +721,26 @@ static int msm_vdec_set_output_properties(struct msm_vidc_inst *inst) return rc; } +static bool msm_vdec_check_outbuf_fence_allowed(struct msm_vidc_inst *inst) +{ + /* no need of checking for reordering/interlace for vp9/av1 */ + if (inst->codec == MSM_VIDC_VP9 || inst->codec == MSM_VIDC_AV1) + return true; + + if (inst->capabilities[CODED_FRAMES].value == CODED_FRAMES_INTERLACE || + (!inst->capabilities[OUTPUT_ORDER].value && + inst->capabilities[MAX_NUM_REORDER_FRAMES].value)) { + i_vpr_e(inst, + "%s: outbuf tx fence is unsupported for coded frames %d or output order %d and max num reorder frames %d\n", + __func__, inst->capabilities[CODED_FRAMES].value, + inst->capabilities[OUTPUT_ORDER].value, + inst->capabilities[MAX_NUM_REORDER_FRAMES].value); + return false; + } + + return true; +} + int msm_vdec_get_input_internal_buffers(struct msm_vidc_inst *inst) { int rc = 0; @@ -843,6 +891,7 @@ static int msm_vdec_subscribe_input_port_settings_change(struct msm_vidc_inst *i {HFI_PROP_CODED_FRAMES, msm_vdec_set_coded_frames }, {HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT, msm_vdec_set_min_output_count }, {HFI_PROP_PIC_ORDER_CNT_TYPE, msm_vdec_set_picture_order_count }, + {HFI_PROP_MAX_NUM_REORDER_FRAMES, msm_vdec_set_max_num_reorder_frames }, {HFI_PROP_SIGNAL_COLOR_INFO, msm_vdec_set_colorspace }, {HFI_PROP_PROFILE, msm_vdec_set_profile }, {HFI_PROP_LEVEL, msm_vdec_set_level }, @@ -1015,14 +1064,14 @@ static int msm_vdec_subscribe_property(struct msm_vidc_inst *inst, return rc; } -static int msm_vdec_subscribe_metadata(struct msm_vidc_inst *inst, +int msm_vdec_subscribe_metadata(struct msm_vidc_inst *inst, enum msm_vidc_port_type port) { int rc = 0; u32 payload[32] = {0}; u32 i, count = 0; - i_vpr_h(inst, "%s()\n", __func__); + i_vpr_h(inst, "%s() port %d\n", __func__, port); payload[0] = HFI_MODE_METADATA; if (port == INPUT_PORT) { @@ -1139,7 +1188,7 @@ static int msm_vdec_set_delivery_mode_property(struct msm_vidc_inst *inst, }; static const u32 property_input_list[] = {}; - i_vpr_h(inst, "%s()\n", __func__); + i_vpr_h(inst, "%s() port %d\n", __func__, port); payload[0] = HFI_MODE_PROPERTY; @@ -1153,18 +1202,19 @@ static int msm_vdec_set_delivery_mode_property(struct msm_vidc_inst *inst, } } else if (port == OUTPUT_PORT) { for (i = 0; i < ARRAY_SIZE(property_output_list); i++) { - if (property_output_list[i] == META_OUTBUF_FENCE && - is_meta_rx_inp_enabled(inst, META_OUTBUF_FENCE)) { - /* - * if output buffer fence enabled via - * META_OUTBUF_FENCE, then driver will send - * fence id via HFI_PROP_FENCE to firmware. - * So enable HFI_PROP_FENCE property as - * delivery mode property. - */ - payload[count + 1] = - inst->capabilities[property_output_list[i]].hfi_id; - count++; + if (property_output_list[i] == META_OUTBUF_FENCE) { + if (is_meta_rx_inp_enabled(inst, + META_OUTBUF_FENCE)) { + /* + * if output buffer fence enabled via + * META_OUTBUF_FENCE, then driver will send + * fence id via HFI_PROP_FENCE to firmware. + * So enable HFI_PROP_FENCE property as + * delivery mode property. + */ + payload[++count] = + inst->capabilities[property_output_list[i]].hfi_id; + } continue; } if (inst->capabilities[property_output_list[i]].value) { @@ -1239,6 +1289,7 @@ int msm_vdec_init_input_subcr_params(struct msm_vidc_inst *inst) subsc_params->level = inst->capabilities[LEVEL].value; subsc_params->tier = inst->capabilities[HEVC_TIER].value; subsc_params->pic_order_cnt = inst->capabilities[POC].value; + subsc_params->max_num_reorder_frames = inst->capabilities[MAX_NUM_REORDER_FRAMES].value; subsc_params->bit_depth = inst->capabilities[BIT_DEPTH].value; if (inst->capabilities[CODED_FRAMES].value == CODED_FRAMES_PROGRESSIVE) @@ -1363,6 +1414,8 @@ static int msm_vdec_read_input_subcr_params(struct msm_vidc_inst *inst) msm_vidc_update_cap_value(inst, LEVEL, subsc_params.level, __func__); msm_vidc_update_cap_value(inst, HEVC_TIER, subsc_params.tier, __func__); msm_vidc_update_cap_value(inst, POC, subsc_params.pic_order_cnt, __func__); + msm_vidc_update_cap_value(inst, MAX_NUM_REORDER_FRAMES, + subsc_params.max_num_reorder_frames, __func__); if (subsc_params.bit_depth == BIT_DEPTH_8) msm_vidc_update_cap_value(inst, BIT_DEPTH, BIT_DEPTH_8, __func__); else @@ -1378,14 +1431,6 @@ static int msm_vdec_read_input_subcr_params(struct msm_vidc_inst *inst) subsc_params.av1_super_block_enabled, __func__); } - /* disable META_OUTBUF_FENCE if session is Interlace type */ - if (inst->capabilities[CODED_FRAMES].value == - CODED_FRAMES_INTERLACE) { - msm_vidc_update_cap_value(inst, META_OUTBUF_FENCE, - MSM_VIDC_META_RX_INPUT | - MSM_VIDC_META_DISABLE, __func__); - } - inst->fw_min_count = subsc_params.fw_min_count; inst->buffers.output.min_count = call_session_op(core, min_count, inst, MSM_VIDC_BUF_OUTPUT); @@ -1700,6 +1745,11 @@ static int msm_vdec_subscribe_output_port_settings_change(struct msm_vidc_inst * payload_size = sizeof(u32); payload_type = HFI_PAYLOAD_U32; break; + case HFI_PROP_MAX_NUM_REORDER_FRAMES: + payload[0] = subsc_params.max_num_reorder_frames; + payload_size = sizeof(u32); + payload_type = HFI_PAYLOAD_U32; + break; default: i_vpr_e(inst, "%s: unknown property %#x\n", __func__, prop_type); @@ -1788,6 +1838,13 @@ int msm_vdec_streamon_output(struct msm_vidc_inst *inst) if (rc) goto error; + if (is_meta_rx_inp_enabled(inst, META_OUTBUF_FENCE)) { + if (!msm_vdec_check_outbuf_fence_allowed(inst)) { + rc = -EINVAL; + goto error; + } + } + if (!inst->opsc_properties_set) { memcpy(&inst->subcr_params[OUTPUT_PORT], &inst->subcr_params[INPUT_PORT], @@ -2130,6 +2187,8 @@ int msm_vdec_start_cmd(struct msm_vidc_inst *inst) if (is_sub_state(inst, MSM_VIDC_DRC) && is_sub_state(inst, MSM_VIDC_DRC_LAST_BUFFER) && is_sub_state(inst, MSM_VIDC_INPUT_PAUSE)) { + i_vpr_h(inst, "%s: alloc and queue input internal buffers\n", + __func__); rc = msm_vidc_alloc_and_queue_input_internal_buffers(inst); if (rc) return rc; diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 4f5cd5dae2..60d50aa202 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -1225,6 +1225,19 @@ int msm_vidc_process_streamon_output(struct msm_vidc_inst *inst) rc = msm_vidc_set_pipe(inst, PIPE); if (rc) return rc; + /* + * Input port subscription for metadata may be changed. + * For eg: due to IPSC, driver may have disabled tx + * type output fence, hence fence related metadatas + * to recieve on input port will be disabled by HAL. + * Hence, update metadata subscription properties + * on INPUT port before sending RESUME command to FW. + */ + i_vpr_l(inst, "%s: reset input port subscribe metadata\n", + __func__); + rc = msm_vdec_subscribe_metadata(inst, INPUT_PORT); + if (rc) + return rc; } /* @@ -1236,6 +1249,7 @@ int msm_vidc_process_streamon_output(struct msm_vidc_inst *inst) is_sub_state(inst, MSM_VIDC_DRAIN_LAST_BUFFER); if (!drain_pending && is_state(inst, MSM_VIDC_INPUT_STREAMING)) { if (is_sub_state(inst, MSM_VIDC_INPUT_PAUSE)) { + i_vpr_h(inst, "%s: resume input port\n", __func__); rc = venus_hfi_session_resume(inst, INPUT_PORT, HFI_CMD_SETTINGS_CHANGE); if (rc) @@ -1480,6 +1494,15 @@ int msm_vidc_get_control(struct msm_vidc_inst *inst, struct v4l2_ctrl *ctrl) i_vpr_l(inst, "%s: fence fd: %d\n", __func__, ctrl->val); break; + case MAX_NUM_REORDER_FRAMES: + ctrl->val = inst->capabilities[MAX_NUM_REORDER_FRAMES].value; + i_vpr_h(inst, "%s: max num reorder frames: %d\n", + __func__, ctrl->val); + break; + case CODED_FRAMES: + ctrl->val = inst->capabilities[CODED_FRAMES].value; + i_vpr_h(inst, "%s: coded frames: %d\n", __func__, ctrl->val); + break; default: i_vpr_e(inst, "invalid ctrl %s id %d\n", ctrl->name, ctrl->id); diff --git a/driver/vidc/src/msm_vidc_fence.c b/driver/vidc/src/msm_vidc_fence.c index efdb8b28cf..00e869d057 100644 --- a/driver/vidc/src/msm_vidc_fence.c +++ b/driver/vidc/src/msm_vidc_fence.c @@ -164,7 +164,7 @@ static void msm_vidc_fence_destroy(struct msm_vidc_inst *inst, u64 fence_id) return; } - i_vpr_e(inst, "%s: fence %s\n", __func__, fence->name); + i_vpr_l(inst, "%s: fence %s\n", __func__, fence->name); list_del_init(&fence->list); dma_fence_set_error(&fence->dma_fence, -EINVAL); dma_fence_signal(&fence->dma_fence); diff --git a/driver/vidc/src/msm_vidc_state.c b/driver/vidc/src/msm_vidc_state.c index 40bf07970a..f10f6412fe 100644 --- a/driver/vidc/src/msm_vidc_state.c +++ b/driver/vidc/src/msm_vidc_state.c @@ -845,8 +845,8 @@ static int msm_vidc_input_streaming_state(struct msm_vidc_inst *inst, if (is_decode_session(inst)) { /* check dynamic allowed if master port is streaming */ if (!(inst->capabilities[cap_id].flags & CAP_FLAG_DYNAMIC_ALLOWED)) { - i_vpr_e(inst, "%s: cap_id %#x not allowed in state %s\n", - __func__, cap_id, state_name(inst->state)); + i_vpr_e(inst, "%s: cap_id %#x (%s) not allowed in state %s\n", + __func__, cap_id, cap_name(cap_id), state_name(inst->state)); return -EINVAL; } } diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index ad28024541..1ccbfa4721 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -47,7 +47,7 @@ void print_psc_properties(const char *str, struct msm_vidc_inst *inst, { i_vpr_h(inst, "%s: width %d, height %d, crop offsets[0] %#x, crop offsets[1] %#x, bit depth %#x, coded frames %d " - "fw min count %d, poc %d, color info %d, profile %d, level %d, tier %d, fg present %d, sb enabled %d\n", + "fw min count %d, poc %d, color info %d, profile %d, level %d, tier %d, fg present %d, sb enabled %d max_num_reorder_frames %d\n", str, (subsc_params.bitstream_resolution & HFI_BITMASK_BITSTREAM_WIDTH) >> 16, (subsc_params.bitstream_resolution & HFI_BITMASK_BITSTREAM_HEIGHT), subsc_params.crop_offsets[0], subsc_params.crop_offsets[1], @@ -55,7 +55,7 @@ void print_psc_properties(const char *str, struct msm_vidc_inst *inst, subsc_params.fw_min_count, subsc_params.pic_order_cnt, subsc_params.color_info, subsc_params.profile, subsc_params.level, subsc_params.tier, subsc_params.av1_film_grain_present, - subsc_params.av1_super_block_enabled); + subsc_params.av1_super_block_enabled, subsc_params.max_num_reorder_frames); } static void print_sfr_message(struct msm_vidc_core *core) @@ -849,11 +849,15 @@ static int msm_vidc_handle_fence_signal(struct msm_vidc_inst *inst, return -EINVAL; } } else { - if (inst->hfi_frame_info.fence_id) + if (!inst->hfi_frame_info.fence_id) { + return 0; + } else { i_vpr_e(inst, - "%s: fence id is received although fencing is not enabled\n", - __func__); - return 0; + "%s: fence id: %d is received although fencing is not enabled\n", + __func__, inst->hfi_frame_info.fence_id); + signal_error = true; + goto signal; + } } if (inst->capabilities[OUTBUF_FENCE_TYPE].value == @@ -874,6 +878,7 @@ static int msm_vidc_handle_fence_signal(struct msm_vidc_inst *inst, return -EINVAL; } +signal: /* fence signalling */ if (signal_error) { /* signal fence error */ @@ -1196,7 +1201,14 @@ static bool is_metabuffer_dequeued(struct msm_vidc_inst *inst, list_for_each_entry(buffer, &buffers->list, list) { if (buffer->index == buf->index && - buffer->attr & MSM_VIDC_ATTR_DEQUEUED) { + (buffer->attr & MSM_VIDC_ATTR_DEQUEUED || + buffer->attr & MSM_VIDC_ATTR_BUFFER_DONE)) { + /* + * For META_OUTBUF_FENCE case, meta buffers are + * dequeued ahead in time and completed vb2 done + * as well. Hence, check for vb2 buffer done flag since + * dequeued flag is already cleared for such buffers + */ found = true; break; } @@ -1216,14 +1228,6 @@ static int msm_vidc_check_meta_buffers(struct msm_vidc_inst *inst) }; for (i = 0; i < ARRAY_SIZE(buffer_type); i++) { - /* - * skip input meta buffers check as meta buffers were - * already delivered if output fence enabled. - */ - if (is_meta_rx_inp_enabled(inst, META_OUTBUF_FENCE)) { - if (buffer_type[i] == MSM_VIDC_BUF_INPUT) - continue; - } buffers = msm_vidc_get_buffers(inst, buffer_type[i], __func__); if (!buffers) return -EINVAL; @@ -1732,6 +1736,9 @@ static int handle_property_with_payload(struct msm_vidc_inst *inst, case HFI_PROP_AV1_SUPER_BLOCK_ENABLED: inst->subcr_params[port].av1_super_block_enabled = payload_ptr[0]; break; + case HFI_PROP_MAX_NUM_REORDER_FRAMES: + inst->subcr_params[port].max_num_reorder_frames = payload_ptr[0]; + break; case HFI_PROP_PICTURE_TYPE: inst->hfi_frame_info.picture_type = payload_ptr[0]; if (inst->hfi_frame_info.picture_type & HFI_PICTURE_B) From 734d95366bfd720d300a3c2f2ad800d31f63e36d Mon Sep 17 00:00:00 2001 From: Vikash Garodia Date: Tue, 20 Jun 2023 13:10:51 +0530 Subject: [PATCH 0947/1061] video: driver: fix the return type during open instance There is a limit to the number of video instances which can be opened. When the number of instances are exhausted, there is a possibility that any ongoing instance is released. In such scenario, new instance can be accepted. Hence keep the return type to suggest the client to try opening the video instance again. Change-Id: I2241a5458bbe55a2de1c58ad85440b2b920ae205 Signed-off-by: Vikash Garodia --- driver/vidc/src/msm_vidc_driver.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index fac64e190f..66e1976e47 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -3236,7 +3236,7 @@ int msm_vidc_add_session(struct msm_vidc_inst *inst) } else { i_vpr_e(inst, "%s: max limit %d already running %d sessions\n", __func__, core->capabilities[MAX_SESSION_COUNT].value, count); - rc = -EINVAL; + rc = -EAGAIN; } unlock: core_unlock(core, __func__); From a683290a913a9f8d1ceaed9898cf34f45b3ea993 Mon Sep 17 00:00:00 2001 From: Dikshita Agarwal Date: Tue, 20 Jun 2023 15:24:24 +0530 Subject: [PATCH 0948/1061] video: driver: rename request_lock with ctx_q_lock for queues This lock is not related to requests and used to serialize IOCTL calls related to queues, hence change the name of the lock to avoid any confusion. Change-Id: I673a3331cbf67b3767b3ba75cfe203c4d45489cb Signed-off-by: Dikshita Agarwal --- driver/vidc/inc/msm_vidc_inst.h | 2 +- driver/vidc/src/msm_vidc.c | 4 ++-- driver/vidc/src/msm_vidc_driver.c | 4 ++-- 3 files changed, 5 insertions(+), 5 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_inst.h b/driver/vidc/inc/msm_vidc_inst.h index e387ea0e35..88ebf42190 100644 --- a/driver/vidc/inc/msm_vidc_inst.h +++ b/driver/vidc/inc/msm_vidc_inst.h @@ -67,7 +67,7 @@ struct buf_queue { struct msm_vidc_inst { struct list_head list; struct mutex lock; - struct mutex request_lock; + struct mutex ctx_q_lock; struct mutex client_lock; enum msm_vidc_state state; int (*event_handle)(struct msm_vidc_inst *inst, diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index 07d6d3531e..10a9d7ec0e 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -741,7 +741,7 @@ void *msm_vidc_open(struct msm_vidc_core *core, u32 session_type) inst->initial_time_us = ktime_get_ns() / 1000; kref_init(&inst->kref); mutex_init(&inst->lock); - mutex_init(&inst->request_lock); + mutex_init(&inst->ctx_q_lock); mutex_init(&inst->client_lock); msm_vidc_update_debug_str(inst); i_vpr_h(inst, "Opening video instance: %d\n", session_type); @@ -860,7 +860,7 @@ fail_pools_init: msm_vidc_remove_dangling_session(inst); fail_add_session: mutex_destroy(&inst->client_lock); - mutex_destroy(&inst->request_lock); + mutex_destroy(&inst->ctx_q_lock); mutex_destroy(&inst->lock); msm_vidc_vmem_free((void **)&inst); return NULL; diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index fac64e190f..4b96dbcdf8 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -3092,7 +3092,7 @@ static int m2m_queue_init(void *priv, struct vb2_queue *src_vq, core = inst->core; src_vq->supports_requests = core->capabilities[SUPPORTS_REQUESTS].value; - src_vq->lock = &inst->request_lock; + src_vq->lock = &inst->ctx_q_lock; src_vq->dev = &core->pdev->dev; rc = vb2q_init(inst, src_vq, INPUT_MPLANE); if (rc) @@ -4581,7 +4581,7 @@ static void msm_vidc_close_helper(struct kref *kref) msm_vidc_remove_session(inst); msm_vidc_remove_dangling_session(inst); mutex_destroy(&inst->client_lock); - mutex_destroy(&inst->request_lock); + mutex_destroy(&inst->ctx_q_lock); mutex_destroy(&inst->lock); msm_vidc_vmem_free((void **)&inst); } From 4e75ab195439a2f2afa4136d1acf1b7e740cea8e Mon Sep 17 00:00:00 2001 From: Dikshita Agarwal Date: Tue, 20 Jun 2023 15:44:27 +0530 Subject: [PATCH 0949/1061] video: driver: rename inst->event_handler to inst->fh The current name is misleading as this file handler doesn't only handles v4l2 event but used to provide a way to easily keep file handle specific data that is used by the V4L2 framework. Change-Id: I902d86d69b1f3f2651521ef35aa2989a7b58051c Signed-off-by: Dikshita Agarwal --- driver/vidc/inc/msm_vidc_driver.h | 4 ++-- driver/vidc/inc/msm_vidc_inst.h | 2 +- driver/vidc/src/msm_vdec.c | 8 ++++---- driver/vidc/src/msm_venc.c | 4 ++-- driver/vidc/src/msm_vidc.c | 12 ++++++------ driver/vidc/src/msm_vidc_driver.c | 30 +++++++++++++++--------------- driver/vidc/src/msm_vidc_v4l2.c | 8 ++++---- 7 files changed, 34 insertions(+), 34 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 0fbafcae05..63076ad26c 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -486,8 +486,8 @@ int cancel_stability_work_sync(struct msm_vidc_inst *inst); void msm_vidc_fw_unload_handler(struct work_struct *work); int msm_vidc_suspend(struct msm_vidc_core *core); void msm_vidc_batch_handler(struct work_struct *work); -int msm_vidc_event_queue_init(struct msm_vidc_inst *inst); -int msm_vidc_event_queue_deinit(struct msm_vidc_inst *inst); +int msm_vidc_v4l2_fh_init(struct msm_vidc_inst *inst); +int msm_vidc_v4l2_fh_deinit(struct msm_vidc_inst *inst); int msm_vidc_vb2_queue_init(struct msm_vidc_inst *inst); int msm_vidc_vb2_queue_deinit(struct msm_vidc_inst *inst); int msm_vidc_get_control(struct msm_vidc_inst *inst, struct v4l2_ctrl *ctrl); diff --git a/driver/vidc/inc/msm_vidc_inst.h b/driver/vidc/inc/msm_vidc_inst.h index e387ea0e35..f81ab8abdf 100644 --- a/driver/vidc/inc/msm_vidc_inst.h +++ b/driver/vidc/inc/msm_vidc_inst.h @@ -84,7 +84,7 @@ struct msm_vidc_inst { u32 packet_size; struct v4l2_format fmts[MAX_PORT]; struct v4l2_ctrl_handler ctrl_handler; - struct v4l2_fh event_handler; + struct v4l2_fh fh; struct v4l2_m2m_dev *m2m_dev; struct v4l2_m2m_ctx *m2m_ctx; u32 num_ctrls; diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 0407494a67..6016a785ea 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -1466,7 +1466,7 @@ int msm_vdec_input_port_settings_change(struct msm_vidc_inst *inst) event.type = V4L2_EVENT_SOURCE_CHANGE; event.u.src_change.changes = V4L2_EVENT_SRC_CH_RESOLUTION; - v4l2_event_queue_fh(&inst->event_handler, &event); + v4l2_event_queue_fh(&inst->fh, &event); return rc; } @@ -2523,13 +2523,13 @@ int msm_vdec_subscribe_event(struct msm_vidc_inst *inst, switch (sub->type) { case V4L2_EVENT_EOS: - rc = v4l2_event_subscribe(&inst->event_handler, sub, MAX_EVENTS, NULL); + rc = v4l2_event_subscribe(&inst->fh, sub, MAX_EVENTS, NULL); break; case V4L2_EVENT_SOURCE_CHANGE: - rc = v4l2_src_change_event_subscribe(&inst->event_handler, sub); + rc = v4l2_src_change_event_subscribe(&inst->fh, sub); break; case V4L2_EVENT_CTRL: - rc = v4l2_ctrl_subscribe_event(&inst->event_handler, sub); + rc = v4l2_ctrl_subscribe_event(&inst->fh, sub); break; default: i_vpr_e(inst, "%s: invalid type %d id %d\n", __func__, sub->type, sub->id); diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index b4b4d969fd..ead69b37aa 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -1682,10 +1682,10 @@ int msm_venc_subscribe_event(struct msm_vidc_inst *inst, switch (sub->type) { case V4L2_EVENT_EOS: - rc = v4l2_event_subscribe(&inst->event_handler, sub, MAX_EVENTS, NULL); + rc = v4l2_event_subscribe(&inst->fh, sub, MAX_EVENTS, NULL); break; case V4L2_EVENT_CTRL: - rc = v4l2_ctrl_subscribe_event(&inst->event_handler, sub); + rc = v4l2_ctrl_subscribe_event(&inst->fh, sub); break; default: i_vpr_e(inst, "%s: invalid type %d id %d\n", __func__, sub->type, sub->id); diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index 07d6d3531e..549f029b85 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -82,13 +82,13 @@ int msm_vidc_poll(struct msm_vidc_inst *inst, struct file *filp, return POLLERR; } - poll_wait(filp, &inst->event_handler.wait, wait); + poll_wait(filp, &inst->fh.wait, wait); poll_wait(filp, &inst->bufq[INPUT_META_PORT].vb2q->done_wq, wait); poll_wait(filp, &inst->bufq[OUTPUT_META_PORT].vb2q->done_wq, wait); poll_wait(filp, &inst->bufq[INPUT_PORT].vb2q->done_wq, wait); poll_wait(filp, &inst->bufq[OUTPUT_PORT].vb2q->done_wq, wait); - if (v4l2_event_pending(&inst->event_handler)) + if (v4l2_event_pending(&inst->fh)) poll |= POLLPRI; poll |= get_poll_flags(inst, INPUT_META_PORT); @@ -676,7 +676,7 @@ int msm_vidc_unsubscribe_event(struct msm_vidc_inst *inst, int rc = 0; i_vpr_h(inst, "%s: type %d id %d\n", __func__, sub->type, sub->id); - rc = v4l2_event_unsubscribe(&inst->event_handler, sub); + rc = v4l2_event_unsubscribe(&inst->fh, sub); if (rc) i_vpr_e(inst, "%s: failed, type %d id %d\n", __func__, sub->type, sub->id); @@ -687,7 +687,7 @@ int msm_vidc_dqevent(struct msm_vidc_inst *inst, struct v4l2_event *event) { int rc = 0; - rc = v4l2_event_dequeue(&inst->event_handler, event, false); + rc = v4l2_event_dequeue(&inst->fh, event, false); if (rc) i_vpr_e(inst, "%s: fialed\n", __func__); return rc; @@ -803,7 +803,7 @@ void *msm_vidc_open(struct msm_vidc_core *core, u32 session_type) INIT_DELAYED_WORK(&inst->stats_work, msm_vidc_stats_handler); INIT_WORK(&inst->stability_work, msm_vidc_stability_handler); - rc = msm_vidc_event_queue_init(inst); + rc = msm_vidc_v4l2_fh_init(inst); if (rc) goto fail_eventq_init; @@ -850,7 +850,7 @@ fail_fence_init: fail_inst_init: msm_vidc_vb2_queue_deinit(inst); fail_vb2q_init: - msm_vidc_event_queue_deinit(inst); + msm_vidc_v4l2_fh_deinit(inst); fail_eventq_init: destroy_workqueue(inst->workq); fail_create_workq: diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index fac64e190f..b90445e8b8 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -1350,7 +1350,7 @@ int msm_vidc_process_drain_last_flag(struct msm_vidc_inst *inst) } event.type = V4L2_EVENT_EOS; - v4l2_event_queue_fh(&inst->event_handler, &event); + v4l2_event_queue_fh(&inst->fh, &event); return rc; } @@ -1370,7 +1370,7 @@ int msm_vidc_process_psc_last_flag(struct msm_vidc_inst *inst) } event.type = V4L2_EVENT_EOS; - v4l2_event_queue_fh(&inst->event_handler, &event); + v4l2_event_queue_fh(&inst->fh, &event); return rc; } @@ -3011,7 +3011,7 @@ int msm_vidc_vb2_buffer_done(struct msm_vidc_inst *inst, return 0; } -int msm_vidc_event_queue_init(struct msm_vidc_inst *inst) +int msm_vidc_v4l2_fh_init(struct msm_vidc_inst *inst) { int rc = 0; int index; @@ -3019,7 +3019,7 @@ int msm_vidc_event_queue_init(struct msm_vidc_inst *inst) core = inst->core; /* do not init, if already inited */ - if (inst->event_handler.vdev) { + if (inst->fh.vdev) { i_vpr_e(inst, "%s: already inited\n", __func__); return -EINVAL; } @@ -3031,26 +3031,26 @@ int msm_vidc_event_queue_init(struct msm_vidc_inst *inst) else return -EINVAL; - v4l2_fh_init(&inst->event_handler, &core->vdev[index].vdev); - inst->event_handler.ctrl_handler = &inst->ctrl_handler; - v4l2_fh_add(&inst->event_handler); + v4l2_fh_init(&inst->fh, &core->vdev[index].vdev); + inst->fh.ctrl_handler = &inst->ctrl_handler; + v4l2_fh_add(&inst->fh); return rc; } -int msm_vidc_event_queue_deinit(struct msm_vidc_inst *inst) +int msm_vidc_v4l2_fh_deinit(struct msm_vidc_inst *inst) { int rc = 0; /* do not deinit, if not already inited */ - if (!inst->event_handler.vdev) { + if (!inst->fh.vdev) { i_vpr_h(inst, "%s: already not inited\n", __func__); return 0; } - v4l2_fh_del(&inst->event_handler); - inst->event_handler.ctrl_handler = NULL; - v4l2_fh_exit(&inst->event_handler); + v4l2_fh_del(&inst->fh); + inst->fh.ctrl_handler = NULL; + v4l2_fh_exit(&inst->fh); return rc; } @@ -3138,7 +3138,7 @@ int msm_vidc_vb2_queue_init(struct msm_vidc_inst *inst) i_vpr_e(inst, "%s: v4l2_m2m_ctx_init failed\n", __func__); goto fail_m2m_ctx_init; } - inst->event_handler.m2m_ctx = inst->m2m_ctx; + inst->fh.m2m_ctx = inst->m2m_ctx; rc = msm_vidc_vmem_alloc(sizeof(struct vb2_queue), (void **)&inst->bufq[INPUT_META_PORT].vb2q, "input meta port"); @@ -3173,7 +3173,7 @@ fail_in_meta_vb2q_init: fail_in_meta_alloc: v4l2_m2m_ctx_release(inst->m2m_ctx); inst->m2m_ctx = NULL; - inst->event_handler.m2m_ctx = NULL; + inst->fh.m2m_ctx = NULL; inst->bufq[OUTPUT_PORT].vb2q = NULL; inst->bufq[INPUT_PORT].vb2q = NULL; fail_m2m_ctx_init: @@ -4574,7 +4574,7 @@ static void msm_vidc_close_helper(struct kref *kref) */ inst_lock(inst, __func__); msm_vidc_vb2_queue_deinit(inst); - msm_vidc_event_queue_deinit(inst); + msm_vidc_v4l2_fh_deinit(inst); inst_unlock(inst, __func__); destroy_workqueue(inst->workq); msm_vidc_destroy_buffers(inst); diff --git a/driver/vidc/src/msm_vidc_v4l2.c b/driver/vidc/src/msm_vidc_v4l2.c index fa3a9f8ca4..7dd6f7b844 100644 --- a/driver/vidc/src/msm_vidc_v4l2.c +++ b/driver/vidc/src/msm_vidc_v4l2.c @@ -20,7 +20,7 @@ static struct msm_vidc_inst *get_vidc_inst(struct file *filp, void *fh) if (!filp || !filp->private_data) return NULL; return container_of(filp->private_data, - struct msm_vidc_inst, event_handler); + struct msm_vidc_inst, fh); } unsigned int msm_v4l2_poll(struct file *filp, struct poll_table_struct *pt) @@ -60,7 +60,7 @@ int msm_v4l2_open(struct file *filp) trace_msm_v4l2_vidc_open("END", NULL); return -ENOMEM; } - filp->private_data = &(inst->event_handler); + filp->private_data = &(inst->fh); trace_msm_v4l2_vidc_open("END", inst); return 0; } @@ -552,7 +552,7 @@ int msm_v4l2_subscribe_event(struct v4l2_fh *fh, struct msm_vidc_inst *inst; int rc = 0; - inst = container_of(fh, struct msm_vidc_inst, event_handler); + inst = container_of(fh, struct msm_vidc_inst, fh); inst = get_inst_ref(g_core, inst); if (!inst || !sub) { d_vpr_e("%s: invalid instance\n", __func__); @@ -584,7 +584,7 @@ int msm_v4l2_unsubscribe_event(struct v4l2_fh *fh, struct msm_vidc_inst *inst; int rc = 0; - inst = container_of(fh, struct msm_vidc_inst, event_handler); + inst = container_of(fh, struct msm_vidc_inst, fh); inst = get_inst_ref(g_core, inst); if (!inst || !sub) { d_vpr_e("%s: invalid instance\n", __func__); From 5b439178f0aca82ee84e39eadf7556cd39d2a512 Mon Sep 17 00:00:00 2001 From: Dikshita Agarwal Date: Thu, 22 Jun 2023 11:45:59 +0530 Subject: [PATCH 0950/1061] video: driver: remove setting allow_zero_bytesused to 1 There is no need to set allow_zero_bytesused any longer, hence remove it. Change-Id: Ic232d2bd38e0113af2c127fc7251a3dd8a3e0c03 Signed-off-by: Dikshita Agarwal --- driver/vidc/src/msm_vidc_driver.c | 1 - 1 file changed, 1 deletion(-) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 48930cc482..ee37ff6ace 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -3069,7 +3069,6 @@ static int vb2q_init(struct msm_vidc_inst *inst, q->ops = core->vb2_ops; q->mem_ops = core->vb2_mem_ops; q->drv_priv = inst; - q->allow_zero_bytesused = 1; q->copy_timestamp = 1; rc = vb2_queue_init(q); if (rc) From e05b1f39c9caebb1707f00d86db66a8989bd4c03 Mon Sep 17 00:00:00 2001 From: Vedang Nagar Date: Tue, 13 Jun 2023 19:20:43 +0530 Subject: [PATCH 0951/1061] video: driver: Remove core check from video driver Remove core check from all the functions in video driver. ore check is present in most of the functions in video driver which is not required. Keep check only at root level functions and remove the check from rest all of the functions. Change-Id: I5f6374b68dd739b7ab563f32f64bb90e368c4085 Signed-off-by: Vedang Nagar --- .../platform/common/inc/msm_vidc_platform.h | 1 - .../platform/common/src/msm_vidc_platform.c | 23 ---- driver/platform/kalama/src/msm_vidc_kalama.c | 4 - .../pineapple/src/msm_vidc_pineapple.c | 4 - driver/platform/pineapple/src/pineapple.c | 4 - driver/platform/waipio/src/waipio.c | 4 - driver/variant/common/src/msm_vidc_variant.c | 25 ---- driver/variant/iris2/src/msm_vidc_iris2.c | 75 ++--------- driver/variant/iris3/src/msm_vidc_iris3.c | 75 ++--------- driver/variant/iris33/src/msm_vidc_iris33.c | 75 +---------- driver/vidc/inc/resources.h | 1 - driver/vidc/src/firmware.c | 3 - driver/vidc/src/hfi_packet.c | 25 ---- driver/vidc/src/msm_vdec.c | 14 -- driver/vidc/src/msm_venc.c | 10 -- driver/vidc/src/msm_vidc.c | 4 - driver/vidc/src/msm_vidc_debug.c | 24 +++- driver/vidc/src/msm_vidc_driver.c | 124 ------------------ driver/vidc/src/msm_vidc_memory.c | 10 +- driver/vidc/src/msm_vidc_memory_ext.c | 8 +- driver/vidc/src/msm_vidc_probe.c | 38 +----- driver/vidc/src/msm_vidc_state.c | 35 ----- driver/vidc/src/msm_vidc_synx.c | 15 --- driver/vidc/src/resources.c | 100 -------------- driver/vidc/src/resources_ext.c | 36 ----- driver/vidc/src/venus_hfi.c | 60 +-------- driver/vidc/src/venus_hfi_queue.c | 16 --- driver/vidc/src/venus_hfi_response.c | 14 -- 28 files changed, 63 insertions(+), 764 deletions(-) diff --git a/driver/platform/common/inc/msm_vidc_platform.h b/driver/platform/common/inc/msm_vidc_platform.h index 38f5ad9503..5125ad1e6e 100644 --- a/driver/platform/common/inc/msm_vidc_platform.h +++ b/driver/platform/common/inc/msm_vidc_platform.h @@ -265,7 +265,6 @@ struct msm_vidc_platform_data { }; struct msm_vidc_platform { - void *core; struct msm_vidc_platform_data data; }; diff --git a/driver/platform/common/src/msm_vidc_platform.c b/driver/platform/common/src/msm_vidc_platform.c index c0db35683e..2459e08bd3 100644 --- a/driver/platform/common/src/msm_vidc_platform.c +++ b/driver/platform/common/src/msm_vidc_platform.c @@ -242,11 +242,6 @@ static const struct msm_vidc_compat_handle compat_handle[] = { static int msm_vidc_init_ops(struct msm_vidc_core *core) { - if (!core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - d_vpr_h("%s: initialize ops\n", __func__); core->v4l2_file_ops = &msm_v4l2_file_operations; core->v4l2_ioctl_ops_enc = &msm_v4l2_ioctl_ops_enc; @@ -280,10 +275,6 @@ static int msm_vidc_init_platform_variant(struct msm_vidc_core *core) struct device *dev = NULL; int i, rc = 0; - if (!core || !core->pdev) { - d_vpr_e("%s: Invalid params\n", __func__); - return -EINVAL; - } dev = &core->pdev->dev; d_vpr_h("%s()\n", __func__); @@ -315,10 +306,6 @@ static int msm_vidc_init_vpu(struct msm_vidc_core *core) struct device *dev = NULL; int i, rc = 0; - if (!core || !core->pdev) { - d_vpr_e("%s: Invalid params\n", __func__); - return -EINVAL; - } dev = &core->pdev->dev; /* select platform based on compatible match */ @@ -350,11 +337,6 @@ int msm_vidc_init_platform(struct msm_vidc_core *core) d_vpr_h("%s()\n", __func__); - if (!core) { - d_vpr_e("%s: invalid param\n", __func__); - return -EINVAL; - } - platform = devm_kzalloc(&core->pdev->dev, sizeof(struct msm_vidc_platform), GFP_KERNEL); if (!platform) { @@ -363,7 +345,6 @@ int msm_vidc_init_platform(struct msm_vidc_core *core) } core->platform = platform; - platform->core = core; /* selected ops can be re-assigned in platform specific file */ rc = msm_vidc_init_ops(core); @@ -3246,10 +3227,6 @@ int msm_vidc_set_csc_custom_matrix(void *instance, s32 csc_limit_payload[MAX_LIMIT_COEFFS + 2]; core = inst->core; - if (!core->platform) { - d_vpr_e("%s: invalid core platform\n", __func__); - return -EINVAL; - } csc_coeff = &core->platform->data.csc_data; if (!inst->capabilities[cap_id].value || diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index 8f884c4ff5..ba2e65eb55 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -2845,10 +2845,6 @@ static int msm_vidc_init_data(struct msm_vidc_core *core) struct device *dev = NULL; int rc = 0; - if (!core || !core->pdev || !core->platform) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } dev = &core->pdev->dev; d_vpr_h("%s: initialize kalama data\n", __func__); diff --git a/driver/platform/pineapple/src/msm_vidc_pineapple.c b/driver/platform/pineapple/src/msm_vidc_pineapple.c index f862a23a26..0f1f0af07a 100644 --- a/driver/platform/pineapple/src/msm_vidc_pineapple.c +++ b/driver/platform/pineapple/src/msm_vidc_pineapple.c @@ -2960,10 +2960,6 @@ static int msm_vidc_init_data(struct msm_vidc_core *core) struct device *dev = NULL; int rc = 0; - if (!core || !core->pdev || !core->platform) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } dev = &core->pdev->dev; d_vpr_h("%s: initialize pineapple data\n", __func__); diff --git a/driver/platform/pineapple/src/pineapple.c b/driver/platform/pineapple/src/pineapple.c index 797e85e6cd..cd08f2a26a 100644 --- a/driver/platform/pineapple/src/pineapple.c +++ b/driver/platform/pineapple/src/pineapple.c @@ -1742,10 +1742,6 @@ static int msm_vidc_init_data(struct msm_vidc_core *core) { int rc = 0; - if (!core || !core->platform) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } d_vpr_h("%s: initialize pineapple data\n", __func__); core->platform->data = pineapple_data; diff --git a/driver/platform/waipio/src/waipio.c b/driver/platform/waipio/src/waipio.c index d1da92fcf5..62d53f8558 100644 --- a/driver/platform/waipio/src/waipio.c +++ b/driver/platform/waipio/src/waipio.c @@ -1836,10 +1836,6 @@ static int msm_vidc_init_data(struct msm_vidc_core *core) { int rc = 0; - if (!core || !core->platform) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } d_vpr_h("%s: initialize waipio data\n", __func__); core->platform->data = waipio_data; diff --git a/driver/variant/common/src/msm_vidc_variant.c b/driver/variant/common/src/msm_vidc_variant.c index 4d2e27ab0f..70c23a1bca 100644 --- a/driver/variant/common/src/msm_vidc_variant.c +++ b/driver/variant/common/src/msm_vidc_variant.c @@ -21,11 +21,6 @@ int __write_register(struct msm_vidc_core *core, u32 reg, u32 value) u8 *base_addr; int rc = 0; - if (!core || !core->resource) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - rc = __strict_check(core, __func__); if (rc) return rc; @@ -58,11 +53,6 @@ int __write_register_masked(struct msm_vidc_core *core, u32 reg, u32 value, u8 *base_addr; int rc = 0; - if (!core || !core->resource) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - rc = __strict_check(core, __func__); if (rc) return rc; @@ -100,11 +90,6 @@ int __read_register(struct msm_vidc_core *core, u32 reg, u32 *value) int rc = 0; u8 *base_addr; - if (!core || !core->resource || !value) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - if (!is_core_sub_state(core, CORE_SUBSTATE_POWER_ENABLE)) { d_vpr_e("HFI Read register failed : Power is OFF\n"); return -EINVAL; @@ -131,11 +116,6 @@ int __read_register_with_poll_timeout(struct msm_vidc_core *core, u32 reg, u32 val = 0; u8 *addr; - if (!core || !core->resource) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - if (!is_core_sub_state(core, CORE_SUBSTATE_POWER_ENABLE)) { d_vpr_e("%s failed: Power is OFF\n", __func__); return -EINVAL; @@ -163,11 +143,6 @@ int __set_registers(struct msm_vidc_core *core) unsigned int prst_count; int cnt, rc = 0; - if (!core || !core->platform) { - d_vpr_e("core resources null, cannot set registers\n"); - return -EINVAL; - } - reg_prst = core->platform->data.reg_prst_tbl; prst_count = core->platform->data.reg_prst_tbl_size; diff --git a/driver/variant/iris2/src/msm_vidc_iris2.c b/driver/variant/iris2/src/msm_vidc_iris2.c index d2bc879923..bf7acba24e 100644 --- a/driver/variant/iris2/src/msm_vidc_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_iris2.c @@ -171,17 +171,11 @@ #define VCODEC_NOC_ERL_MAIN_ERRLOG3_LOW 0x00011238 #define VCODEC_NOC_ERL_MAIN_ERRLOG3_HIGH 0x0001123C -static int __interrupt_init_iris2(struct msm_vidc_core *vidc_core) +static int __interrupt_init_iris2(struct msm_vidc_core *core) { - struct msm_vidc_core *core = vidc_core; u32 mask_val = 0; int rc = 0; - if (!core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - /* All interrupts should be disabled initially 0x1F6 : Reset value */ rc = __read_register(core, WRAPPER_INTR_MASK_IRIS2, &mask_val); if (rc) @@ -197,17 +191,11 @@ static int __interrupt_init_iris2(struct msm_vidc_core *vidc_core) return 0; } -static int __setup_ucregion_memory_map_iris2(struct msm_vidc_core *vidc_core) +static int __setup_ucregion_memory_map_iris2(struct msm_vidc_core *core) { - struct msm_vidc_core *core = vidc_core; u32 value; int rc = 0; - if (!core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - value = (u32)core->iface_q_table.align_device_addr; rc = __write_register(core, UC_REGION_ADDR_IRIS2, value); if (rc) @@ -413,11 +401,6 @@ static int __power_off_iris2(struct msm_vidc_core *core) { int rc = 0; - if (!core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - if (!is_core_sub_state(core, CORE_SUBSTATE_POWER_ENABLE)) return 0; @@ -571,17 +554,11 @@ fail_vote_buses: return rc; } -static int __prepare_pc_iris2(struct msm_vidc_core *vidc_core) +static int __prepare_pc_iris2(struct msm_vidc_core *core) { int rc = 0; u32 wfi_status = 0, idle_status = 0, pc_ready = 0; u32 ctrl_status = 0; - struct msm_vidc_core *core = vidc_core; - - if (!core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } rc = __read_register(core, CTRL_STATUS_IRIS2, &ctrl_status); if (rc) @@ -638,16 +615,10 @@ skip_power_off: return -EAGAIN; } -static int __raise_interrupt_iris2(struct msm_vidc_core *vidc_core) +static int __raise_interrupt_iris2(struct msm_vidc_core *core) { - struct msm_vidc_core *core = vidc_core; int rc = 0; - if (!core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - rc = __write_register(core, CPU_IC_SOFTINT_IRIS2, 1 << CPU_IC_SOFTINT_H2A_SHFT_IRIS2); if (rc) return rc; @@ -655,15 +626,9 @@ static int __raise_interrupt_iris2(struct msm_vidc_core *vidc_core) return 0; } -static int __watchdog_iris2(struct msm_vidc_core *vidc_core, u32 intr_status) +static int __watchdog_iris2(struct msm_vidc_core *core, u32 intr_status) { int rc = 0; - struct msm_vidc_core *core = vidc_core; - - if (!core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } if (intr_status & WRAPPER_INTR_STATUS_A2HWD_BMSK_IRIS2) { d_vpr_e("%s: received watchdog interrupt\n", __func__); @@ -673,15 +638,8 @@ static int __watchdog_iris2(struct msm_vidc_core *vidc_core, u32 intr_status) return rc; } -static int __noc_error_info_iris2(struct msm_vidc_core *vidc_core) +static int __noc_error_info_iris2(struct msm_vidc_core *core) { - struct msm_vidc_core *core = vidc_core; - - if (!core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - /* * we are not supposed to access vcodec subsystem registers * unless vcodec core clock WRAPPER_CORE_CLOCK_CONFIG_IRIS2 is enabled. @@ -721,17 +679,11 @@ static int __noc_error_info_iris2(struct msm_vidc_core *vidc_core) return 0; } -static int __clear_interrupt_iris2(struct msm_vidc_core *vidc_core) +static int __clear_interrupt_iris2(struct msm_vidc_core *core) { - struct msm_vidc_core *core = vidc_core; u32 intr_status = 0, mask = 0; int rc = 0; - if (!core) { - d_vpr_e("%s: NULL core\n", __func__); - return 0; - } - rc = __read_register(core, WRAPPER_INTR_STATUS_IRIS2, &intr_status); if (rc) return rc; @@ -756,16 +708,10 @@ static int __clear_interrupt_iris2(struct msm_vidc_core *vidc_core) return 0; } -static int __boot_firmware_iris2(struct msm_vidc_core *vidc_core) +static int __boot_firmware_iris2(struct msm_vidc_core *core) { int rc = 0; u32 ctrl_init_val = 0, ctrl_status = 0, count = 0, max_tries = 1000; - struct msm_vidc_core *core = vidc_core; - - if (!core) { - d_vpr_e("%s: NULL core\n", __func__); - return 0; - } rc = __setup_ucregion_memory_map_iris2(core); if (rc) @@ -1003,11 +949,6 @@ static struct msm_vidc_session_ops msm_session_ops = { int msm_vidc_init_iris2(struct msm_vidc_core *core) { - if (!core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - d_vpr_h("%s()\n", __func__); core->venus_ops = &iris2_ops; core->session_ops = &msm_session_ops; diff --git a/driver/variant/iris3/src/msm_vidc_iris3.c b/driver/variant/iris3/src/msm_vidc_iris3.c index df96e03f12..76a509426a 100644 --- a/driver/variant/iris3/src/msm_vidc_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_iris3.c @@ -177,17 +177,11 @@ #define VCODEC_NOC_ERL_MAIN_ERRLOG3_LOW 0x00011238 #define VCODEC_NOC_ERL_MAIN_ERRLOG3_HIGH 0x0001123C -static int __interrupt_init_iris3(struct msm_vidc_core *vidc_core) +static int __interrupt_init_iris3(struct msm_vidc_core *core) { - struct msm_vidc_core *core = vidc_core; u32 mask_val = 0; int rc = 0; - if (!core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - /* All interrupts should be disabled initially 0x1F6 : Reset value */ rc = __read_register(core, WRAPPER_INTR_MASK_IRIS3, &mask_val); if (rc) @@ -203,17 +197,11 @@ static int __interrupt_init_iris3(struct msm_vidc_core *vidc_core) return 0; } -static int __setup_ucregion_memory_map_iris3(struct msm_vidc_core *vidc_core) +static int __setup_ucregion_memory_map_iris3(struct msm_vidc_core *core) { - struct msm_vidc_core *core = vidc_core; u32 value; int rc = 0; - if (!core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - value = (u32)core->iface_q_table.align_device_addr; rc = __write_register(core, UC_REGION_ADDR_IRIS3, value); if (rc) @@ -463,11 +451,6 @@ static int __power_off_iris3(struct msm_vidc_core *core) { int rc = 0; - if (!core || !core->capabilities) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - if (!is_core_sub_state(core, CORE_SUBSTATE_POWER_ENABLE)) return 0; @@ -618,17 +601,11 @@ fail_vote_buses: return rc; } -static int __prepare_pc_iris3(struct msm_vidc_core *vidc_core) +static int __prepare_pc_iris3(struct msm_vidc_core *core) { int rc = 0; u32 wfi_status = 0, idle_status = 0, pc_ready = 0; u32 ctrl_status = 0; - struct msm_vidc_core *core = vidc_core; - - if (!core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } rc = __read_register(core, CTRL_STATUS_IRIS3, &ctrl_status); if (rc) @@ -685,16 +662,10 @@ skip_power_off: return -EAGAIN; } -static int __raise_interrupt_iris3(struct msm_vidc_core *vidc_core) +static int __raise_interrupt_iris3(struct msm_vidc_core *core) { - struct msm_vidc_core *core = vidc_core; int rc = 0; - if (!core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - rc = __write_register(core, CPU_IC_SOFTINT_IRIS3, 1 << CPU_IC_SOFTINT_H2A_SHFT_IRIS3); if (rc) return rc; @@ -702,15 +673,9 @@ static int __raise_interrupt_iris3(struct msm_vidc_core *vidc_core) return 0; } -static int __watchdog_iris3(struct msm_vidc_core *vidc_core, u32 intr_status) +static int __watchdog_iris3(struct msm_vidc_core *core, u32 intr_status) { int rc = 0; - struct msm_vidc_core *core = vidc_core; - - if (!core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } if (intr_status & WRAPPER_INTR_STATUS_A2HWD_BMSK_IRIS3) { d_vpr_e("%s: received watchdog interrupt\n", __func__); @@ -720,15 +685,8 @@ static int __watchdog_iris3(struct msm_vidc_core *vidc_core, u32 intr_status) return rc; } -static int __noc_error_info_iris3(struct msm_vidc_core *vidc_core) +static int __noc_error_info_iris3(struct msm_vidc_core *core) { - struct msm_vidc_core *core = vidc_core; - - if (!core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - /* * we are not supposed to access vcodec subsystem registers * unless vcodec core clock WRAPPER_CORE_CLOCK_CONFIG_IRIS3 is enabled. @@ -768,17 +726,11 @@ static int __noc_error_info_iris3(struct msm_vidc_core *vidc_core) return 0; } -static int __clear_interrupt_iris3(struct msm_vidc_core *vidc_core) +static int __clear_interrupt_iris3(struct msm_vidc_core *core) { - struct msm_vidc_core *core = vidc_core; u32 intr_status = 0, mask = 0; int rc = 0; - if (!core) { - d_vpr_e("%s: NULL core\n", __func__); - return 0; - } - rc = __read_register(core, WRAPPER_INTR_STATUS_IRIS3, &intr_status); if (rc) return rc; @@ -803,16 +755,10 @@ static int __clear_interrupt_iris3(struct msm_vidc_core *vidc_core) return 0; } -static int __boot_firmware_iris3(struct msm_vidc_core *vidc_core) +static int __boot_firmware_iris3(struct msm_vidc_core *core) { int rc = 0; u32 ctrl_init_val = 0, ctrl_status = 0, count = 0, max_tries = 1000; - struct msm_vidc_core *core = vidc_core; - - if (!core) { - d_vpr_e("%s: NULL core\n", __func__); - return 0; - } rc = __setup_ucregion_memory_map_iris3(core); if (rc) @@ -1084,11 +1030,6 @@ static struct msm_vidc_session_ops msm_session_ops = { int msm_vidc_init_iris3(struct msm_vidc_core *core) { - if (!core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - d_vpr_h("%s()\n", __func__); core->venus_ops = &iris3_ops; core->session_ops = &msm_session_ops; diff --git a/driver/variant/iris33/src/msm_vidc_iris33.c b/driver/variant/iris33/src/msm_vidc_iris33.c index f71af42478..1087e663d6 100644 --- a/driver/variant/iris33/src/msm_vidc_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_iris33.c @@ -128,17 +128,11 @@ typedef enum { #define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG3_LOW (NOC_BASE_OFFS + 0xA038) #define NOC_SIDEBANDMANAGER_MAIN_SIDEBANDMANAGER_FAULTINEN0_LOW (NOC_BASE_OFFS + 0x7040) -static int __interrupt_init_iris33(struct msm_vidc_core *vidc_core) +static int __interrupt_init_iris33(struct msm_vidc_core *core) { - struct msm_vidc_core *core = vidc_core; u32 mask_val = 0; int rc = 0; - if (!core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - /* All interrupts should be disabled initially 0x1F6 : Reset value */ rc = __read_register(core, WRAPPER_INTR_MASK_IRIS33, &mask_val); if (rc) @@ -161,10 +155,6 @@ static int __get_device_region_info(struct msm_vidc_core *core, u32 min_addr, max_addr, count = 0; int rc = 0; - if (!core || !core->resource) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } dev_set = &core->resource->device_region_set; if (!dev_set->count) { @@ -192,18 +182,12 @@ static int __get_device_region_info(struct msm_vidc_core *core, return rc; } -static int __program_bootup_registers_iris33(struct msm_vidc_core *vidc_core) +static int __program_bootup_registers_iris33(struct msm_vidc_core *core) { - struct msm_vidc_core *core = vidc_core; u32 min_dev_reg_addr = 0, dev_reg_size = 0; u32 value; int rc = 0; - if (!core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - value = (u32)core->iface_q_table.align_device_addr; rc = __write_register(core, HFI_UC_REGION_ADDR_IRIS33, value); if (rc) @@ -573,11 +557,6 @@ static int __power_off_iris33(struct msm_vidc_core *core) { int rc = 0; - if (!core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - if (!is_core_sub_state(core, CORE_SUBSTATE_POWER_ENABLE)) return 0; @@ -808,17 +787,11 @@ fail_vote_buses: return rc; } -static int __prepare_pc_iris33(struct msm_vidc_core *vidc_core) +static int __prepare_pc_iris33(struct msm_vidc_core *core) { int rc = 0; u32 wfi_status = 0, idle_status = 0, pc_ready = 0; u32 ctrl_status = 0; - struct msm_vidc_core *core = vidc_core; - - if (!core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } rc = __read_register(core, HFI_CTRL_STATUS_IRIS33, &ctrl_status); if (rc) @@ -875,16 +848,10 @@ skip_power_off: return -EAGAIN; } -static int __raise_interrupt_iris33(struct msm_vidc_core *vidc_core) +static int __raise_interrupt_iris33(struct msm_vidc_core *core) { - struct msm_vidc_core *core = vidc_core; int rc = 0; - if (!core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - rc = __write_register(core, CPU_IC_SOFTINT_IRIS33, 1 << CPU_IC_SOFTINT_H2A_SHFT_IRIS33); if (rc) return rc; @@ -892,15 +859,9 @@ static int __raise_interrupt_iris33(struct msm_vidc_core *vidc_core) return 0; } -static int __watchdog_iris33(struct msm_vidc_core *vidc_core, u32 intr_status) +static int __watchdog_iris33(struct msm_vidc_core *core, u32 intr_status) { int rc = 0; - struct msm_vidc_core *core = vidc_core; - - if (!core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } if (intr_status & WRAPPER_INTR_STATUS_A2HWD_BMSK_IRIS33) { d_vpr_e("%s: received watchdog interrupt\n", __func__); @@ -915,11 +876,6 @@ static int __noc_error_info_iris33(struct msm_vidc_core *core) u32 value, count = 0; int rc = 0; - if (!core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - /* * we are not supposed to access vcodec subsystem registers * unless vcodec core clock WRAPPER_CORE_CLOCK_CONFIG_IRIS33 is enabled. @@ -1009,17 +965,11 @@ fail_assert_xo_reset: return rc; } -static int __clear_interrupt_iris33(struct msm_vidc_core *vidc_core) +static int __clear_interrupt_iris33(struct msm_vidc_core *core) { - struct msm_vidc_core *core = vidc_core; u32 intr_status = 0, mask = 0; int rc = 0; - if (!core) { - d_vpr_e("%s: NULL core\n", __func__); - return 0; - } - rc = __read_register(core, WRAPPER_INTR_STATUS_IRIS33, &intr_status); if (rc) return rc; @@ -1044,16 +994,10 @@ static int __clear_interrupt_iris33(struct msm_vidc_core *vidc_core) return 0; } -static int __boot_firmware_iris33(struct msm_vidc_core *vidc_core) +static int __boot_firmware_iris33(struct msm_vidc_core *core) { int rc = 0; u32 ctrl_init_val = 0, ctrl_status = 0, count = 0, max_tries = 1000; - struct msm_vidc_core *core = vidc_core; - - if (!core) { - d_vpr_e("%s: NULL core\n", __func__); - return 0; - } rc = __program_bootup_registers_iris33(core); if (rc) @@ -1333,11 +1277,6 @@ static struct msm_vidc_session_ops msm_session_ops = { int msm_vidc_init_iris33(struct msm_vidc_core *core) { - if (!core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - d_vpr_h("%s()\n", __func__); core->venus_ops = &iris33_ops; core->session_ops = &msm_session_ops; diff --git a/driver/vidc/inc/resources.h b/driver/vidc/inc/resources.h index baa890a1b2..99c79248aa 100644 --- a/driver/vidc/inc/resources.h +++ b/driver/vidc/inc/resources.h @@ -235,7 +235,6 @@ struct device_region_set { }; struct msm_vidc_resource { - void *core; u8 __iomem *register_base_addr; u32 irq; struct bus_set bus_set; diff --git a/driver/vidc/src/firmware.c b/driver/vidc/src/firmware.c index d18bb511ca..68fbc6986e 100644 --- a/driver/vidc/src/firmware.c +++ b/driver/vidc/src/firmware.c @@ -37,9 +37,6 @@ static int protect_cp_mem(struct msm_vidc_core *core) int rc = 0; struct context_bank_info *cb; - if (!core) - return -EINVAL; - memprot.cp_start = 0x0; memprot.cp_size = 0x0; memprot.cp_nonpixel_start = 0x0; diff --git a/driver/vidc/src/hfi_packet.c b/driver/vidc/src/hfi_packet.c index 86b9d42ddd..348376090c 100644 --- a/driver/vidc/src/hfi_packet.c +++ b/driver/vidc/src/hfi_packet.c @@ -385,11 +385,6 @@ int hfi_packet_sys_init(struct msm_vidc_core *core, u32 payload = 0; u32 synx_client_data[2]; - if (!core || !pkt) { - d_vpr_e("%s: Invalid params\n", __func__); - return -EINVAL; - } - rc = hfi_create_header(pkt, pkt_size, 0 /*session_id*/, core->header_id++); @@ -542,11 +537,6 @@ int hfi_packet_image_version(struct msm_vidc_core *core, { int rc = 0; - if (!core || !pkt) { - d_vpr_e("%s: Invalid params\n", __func__); - return -EINVAL; - } - rc = hfi_create_header(pkt, pkt_size, 0 /*session_id*/, core->header_id++); @@ -579,11 +569,6 @@ int hfi_packet_sys_pc_prep(struct msm_vidc_core *core, { int rc = 0; - if (!core || !pkt) { - d_vpr_e("%s: Invalid params\n", __func__); - return -EINVAL; - } - rc = hfi_create_header(pkt, pkt_size, 0 /*session_id*/, core->header_id++); @@ -615,11 +600,6 @@ int hfi_packet_sys_debug_config(struct msm_vidc_core *core, int rc = 0; u32 payload = 0; - if (!core || !pkt) { - d_vpr_e("%s: Invalid params\n", __func__); - return -EINVAL; - } - rc = hfi_create_header(pkt, pkt_size, 0 /*session_id*/, core->header_id++); @@ -700,11 +680,6 @@ int hfi_packet_sys_intraframe_powercollapse(struct msm_vidc_core *core, int rc = 0; u32 payload = 0; - if (!core || !pkt) { - d_vpr_e("%s: Invalid params\n", __func__); - return -EINVAL; - } - rc = hfi_create_header(pkt, pkt_size, 0 /*session_id*/, core->header_id++); diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 6016a785ea..d3c0aae1e9 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -903,11 +903,6 @@ static int msm_vdec_subscribe_input_port_settings_change(struct msm_vidc_inst *i i_vpr_h(inst, "%s()\n", __func__); core = inst->core; - if (!core->platform) { - d_vpr_e("%s: invalid platform data\n", __func__); - return -EINVAL; - } - payload[0] = HFI_MODE_PORT_SETTINGS_CHANGE; if (inst->codec == MSM_VIDC_H264) { subscribe_psc_size = core->platform->data.psc_avc_tbl_size; @@ -977,11 +972,6 @@ static int msm_vdec_subscribe_property(struct msm_vidc_inst *inst, core = inst->core; i_vpr_h(inst, "%s()\n", __func__); - if (!core->platform) { - d_vpr_e("%s: invalid platform data\n", __func__); - return -EINVAL; - } - payload[0] = HFI_MODE_PROPERTY; if (port == INPUT_PORT) { @@ -1635,10 +1625,6 @@ static int msm_vdec_subscribe_output_port_settings_change(struct msm_vidc_inst * i_vpr_h(inst, "%s()\n", __func__); core = inst->core; - if (!core->platform) { - d_vpr_e("%s: invalid platform data\n", __func__); - return -EINVAL; - } payload[0] = HFI_MODE_PORT_SETTINGS_CHANGE; if (inst->codec == MSM_VIDC_H264) { diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index ead69b37aa..eb8c430dce 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -545,11 +545,6 @@ static int msm_venc_get_input_internal_buffers(struct msm_vidc_inst *inst) { int i, rc = 0; - if (!inst) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - for (i = 0; i < ARRAY_SIZE(msm_venc_input_internal_buffer_type); i++) { rc = msm_vidc_get_internal_buffers(inst, msm_venc_input_internal_buffer_type[i]); @@ -1675,11 +1670,6 @@ int msm_venc_subscribe_event(struct msm_vidc_inst *inst, { int rc = 0; - if (!inst || !sub) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - switch (sub->type) { case V4L2_EVENT_EOS: rc = v4l2_event_subscribe(&inst->fh, sub, MAX_EVENTS, NULL); diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index a741ac0e22..beea004302 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -700,10 +700,6 @@ void *msm_vidc_open(struct msm_vidc_core *core, u32 session_type) int i = 0; d_vpr_h("%s: %s\n", __func__, video_banner); - if (!core) { - d_vpr_e("%s: invalid params\n", __func__); - return NULL; - } if (session_type != MSM_VIDC_DECODER && session_type != MSM_VIDC_ENCODER) { diff --git a/driver/vidc/src/msm_vidc_debug.c b/driver/vidc/src/msm_vidc_debug.c index 260a7734df..0a72d42a02 100644 --- a/driver/vidc/src/msm_vidc_debug.c +++ b/driver/vidc/src/msm_vidc_debug.c @@ -293,7 +293,7 @@ static ssize_t core_info_read(struct file *file, char __user *buf, ssize_t len = 0; int rc = 0; - if (!core || !core->resource) { + if (!core) { d_vpr_e("%s: invalid params %pK\n", __func__, core); return 0; } @@ -333,6 +333,11 @@ static ssize_t stats_delay_write_ms(struct file *filp, const char __user *buf, char kbuf[MAX_DEBUG_LEVEL_STRING_LEN] = {0}; u32 delay_ms = 0; + if (!core) { + d_vpr_e("%s: invalid params %pK\n", __func__, core); + return 0; + } + /* filter partial writes and invalid commands */ if (*ppos != 0 || count >= sizeof(kbuf) || count == 0) { d_vpr_e("returning error - pos %lld, count %lu\n", *ppos, count); @@ -367,6 +372,11 @@ static ssize_t stats_delay_read_ms(struct file *file, char __user *buf, char kbuf[MAX_DEBUG_LEVEL_STRING_LEN]; struct msm_vidc_core *core = file->private_data; + if (!core) { + d_vpr_e("%s: invalid params %pK\n", __func__, core); + return 0; + } + len = scnprintf(kbuf, sizeof(kbuf), "%u\n", core->capabilities[STATS_TIMEOUT_MS].value); return simple_read_from_buffer(buf, count, ppos, kbuf, len); } @@ -386,6 +396,11 @@ static ssize_t trigger_ssr_write(struct file *filp, const char __user *buf, size_t size = MAX_SSR_STRING_LEN; char kbuf[MAX_SSR_STRING_LEN + 1] = { 0 }; + if (!core) { + d_vpr_e("%s: invalid params %pK\n", __func__, core); + return 0; + } + if (!buf) return -EINVAL; @@ -427,6 +442,11 @@ static ssize_t trigger_stability_write(struct file *filp, const char __user *buf size_t size = MAX_STABILITY_STRING_LEN; char kbuf[MAX_STABILITY_STRING_LEN + 1] = { 0 }; + if (!core) { + d_vpr_e("%s: invalid params %pK\n", __func__, core); + return 0; + } + if (!buf) return -EINVAL; @@ -497,7 +517,7 @@ struct dentry *msm_vidc_debugfs_init_core(struct msm_vidc_core *core) char debugfs_name[MAX_DEBUGFS_NAME]; struct dentry *parent; - if (!core || !core->debugfs_parent) { + if (!core->debugfs_parent) { d_vpr_e("%s: invalid params\n", __func__); goto failed_create_dir; } diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 48930cc482..be9dd64112 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -119,10 +119,6 @@ const char *v4l2_pixelfmt_name(struct msm_vidc_inst *inst, u32 pixfmt) u32 i, size; core = inst->core; - if (!core->platform || !core->platform->data.format_data) { - d_vpr_e("%s: invalid core platform\n", __func__); - goto exit; - } codec_info = core->platform->data.format_data->codec_info; size = core->platform->data.format_data->codec_info_size; @@ -139,7 +135,6 @@ const char *v4l2_pixelfmt_name(struct msm_vidc_inst *inst, u32 pixfmt) return color_format_info[i].pixfmt_name; } -exit: return "UNKNOWN"; } @@ -239,11 +234,6 @@ int msm_vidc_suspend(struct msm_vidc_core *core) { int rc = 0; - if (!core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - rc = venus_hfi_suspend(core); if (rc) return rc; @@ -430,10 +420,6 @@ enum msm_vidc_codec_type v4l2_codec_to_driver(struct msm_vidc_inst *inst, enum msm_vidc_codec_type codec = 0; core = inst->core; - if (!core->platform || !core->platform->data.format_data) { - d_vpr_e("%s: invalid core platform\n", __func__); - return -EINVAL; - } codec_info = core->platform->data.format_data->codec_info; size = core->platform->data.format_data->codec_info_size; @@ -455,10 +441,6 @@ u32 v4l2_codec_from_driver(struct msm_vidc_inst *inst, u32 v4l2_codec = 0; core = inst->core; - if (!core->platform || !core->platform->data.format_data) { - d_vpr_e("%s: invalid core platform\n", __func__); - return -EINVAL; - } codec_info = core->platform->data.format_data->codec_info; size = core->platform->data.format_data->codec_info_size; @@ -481,10 +463,6 @@ enum msm_vidc_colorformat_type v4l2_colorformat_to_driver( enum msm_vidc_colorformat_type colorformat = 0; core = inst->core; - if (!core->platform || !core->platform->data.format_data) { - d_vpr_e("%s: invalid core platform\n", __func__); - return -EINVAL; - } color_format_info = core->platform->data.format_data->color_format_info; size = core->platform->data.format_data->color_format_info_size; @@ -507,10 +485,6 @@ u32 v4l2_colorformat_from_driver(struct msm_vidc_inst *inst, u32 v4l2_colorformat = 0; core = inst->core; - if (!core->platform || !core->platform->data.format_data) { - d_vpr_e("%s: invalid core platform\n", __func__); - return -EINVAL; - } color_format_info = core->platform->data.format_data->color_format_info; size = core->platform->data.format_data->color_format_info_size; @@ -532,10 +506,6 @@ u32 v4l2_color_primaries_to_driver(struct msm_vidc_inst *inst, u32 vidc_color_primaries = MSM_VIDC_PRIMARIES_RESERVED; core = inst->core; - if (!core->platform || !core->platform->data.format_data) { - d_vpr_e("%s: invalid core platform\n", __func__); - return -EINVAL; - } color_prim_info = core->platform->data.format_data->color_prim_info; size = core->platform->data.format_data->color_prim_info_size; @@ -559,10 +529,6 @@ u32 v4l2_color_primaries_from_driver(struct msm_vidc_inst *inst, u32 v4l2_primaries = V4L2_COLORSPACE_DEFAULT; core = inst->core; - if (!core->platform || !core->platform->data.format_data) { - d_vpr_e("%s: invalid core platform\n", __func__); - return -EINVAL; - } color_prim_info = core->platform->data.format_data->color_prim_info; size = core->platform->data.format_data->color_prim_info_size; @@ -586,10 +552,6 @@ u32 v4l2_transfer_char_to_driver(struct msm_vidc_inst *inst, u32 vidc_transfer_char = MSM_VIDC_TRANSFER_RESERVED; core = inst->core; - if (!core->platform || !core->platform->data.format_data) { - d_vpr_e("%s: invalid core platform\n", __func__); - return -EINVAL; - } transfer_char_info = core->platform->data.format_data->transfer_char_info; size = core->platform->data.format_data->transfer_char_info_size; @@ -613,10 +575,6 @@ u32 v4l2_transfer_char_from_driver(struct msm_vidc_inst *inst, u32 v4l2_transfer_char = V4L2_XFER_FUNC_DEFAULT; core = inst->core; - if (!core->platform || !core->platform->data.format_data) { - d_vpr_e("%s: invalid core platform\n", __func__); - return -EINVAL; - } transfer_char_info = core->platform->data.format_data->transfer_char_info; size = core->platform->data.format_data->transfer_char_info_size; @@ -640,10 +598,6 @@ u32 v4l2_matrix_coeff_to_driver(struct msm_vidc_inst *inst, u32 vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_RESERVED; core = inst->core; - if (!core->platform || !core->platform->data.format_data) { - d_vpr_e("%s: invalid core platform\n", __func__); - return -EINVAL; - } matrix_coeff_info = core->platform->data.format_data->matrix_coeff_info; size = core->platform->data.format_data->matrix_coeff_info_size; @@ -667,10 +621,6 @@ u32 v4l2_matrix_coeff_from_driver(struct msm_vidc_inst *inst, u32 v4l2_matrix_coeff = V4L2_YCBCR_ENC_DEFAULT; core = inst->core; - if (!core->platform || !core->platform->data.format_data) { - d_vpr_e("%s: invalid core platform\n", __func__); - return -EINVAL; - } matrix_coeff_info = core->platform->data.format_data->matrix_coeff_info; size = core->platform->data.format_data->matrix_coeff_info_size; @@ -971,11 +921,6 @@ bool msm_vidc_allow_psc_last_flag(struct msm_vidc_inst *inst) enum msm_vidc_allow msm_vidc_allow_pm_suspend(struct msm_vidc_core *core) { - if (!core) { - d_vpr_e("%s: invalid param\n", __func__); - return MSM_VIDC_DISALLOW; - } - /* core must be in valid state to do pm_suspend */ if (!core_in_valid_state(core)) { d_vpr_e("%s: invalid core state %s\n", @@ -3520,12 +3465,6 @@ int msm_vidc_init_core_caps(struct msm_vidc_core *core) int i, num_platform_caps; struct msm_platform_core_capability *platform_data; - if (!core || !core->platform) { - d_vpr_e("%s: invalid params\n", __func__); - rc = -EINVAL; - goto exit; - } - platform_data = core->platform->data.core_data; if (!platform_data) { d_vpr_e("%s: platform core data is NULL\n", @@ -3609,12 +3548,6 @@ int msm_vidc_init_instance_caps(struct msm_vidc_core *core) struct msm_platform_inst_capability *platform_cap_data = NULL; struct msm_platform_inst_cap_dependency *platform_cap_dependency_data = NULL; - if (!core || !core->platform) { - d_vpr_e("%s: invalid params\n", __func__); - rc = -EINVAL; - goto error; - } - platform_cap_data = core->platform->data.inst_cap_data; if (!platform_cap_data) { d_vpr_e("%s: platform instance cap data is NULL\n", @@ -3731,11 +3664,6 @@ int msm_vidc_core_deinit_locked(struct msm_vidc_core *core, bool force) struct msm_vidc_inst *inst, *dummy; enum msm_vidc_allow allow; - if (!core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - rc = __strict_check(core, __func__); if (rc) { d_vpr_e("%s(): core was not locked\n", __func__); @@ -3779,10 +3707,6 @@ int msm_vidc_core_deinit_locked(struct msm_vidc_core *core, bool force) int msm_vidc_core_deinit(struct msm_vidc_core *core, bool force) { int rc = 0; - if (!core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } core_lock(core, __func__); rc = msm_vidc_core_deinit_locked(core, force); @@ -3796,11 +3720,6 @@ int msm_vidc_core_init_wait(struct msm_vidc_core *core) const int interval = 10; int max_tries, count = 0, rc = 0; - if (!core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - core_lock(core, __func__); if (is_core_state(core, MSM_VIDC_CORE_INIT)) { rc = 0; @@ -3858,11 +3777,6 @@ int msm_vidc_core_init(struct msm_vidc_core *core) enum msm_vidc_allow allow; int rc = 0; - if (!core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - core_lock(core, __func__); if (core_in_valid_state(core)) { goto unlock; @@ -4054,11 +3968,6 @@ void msm_vidc_print_core_info(struct msm_vidc_core *core) struct msm_vidc_inst *instances[MAX_SUPPORTED_INSTANCES]; s32 num_instances = 0; - if (!core) { - d_vpr_e("%s: invalid params\n", __func__); - return; - } - core_lock(core, __func__); list_for_each_entry(inst, &core->instances, list) instances[num_instances++] = inst; @@ -4081,12 +3990,6 @@ int msm_vidc_smmu_fault_handler(struct iommu_domain *domain, { struct msm_vidc_core *core = data; - if (!domain || !core) { - d_vpr_e("%s: invalid params %pK %pK\n", - __func__, domain, core); - return -EINVAL; - } - if (is_core_sub_state(core, CORE_SUBSTATE_PAGE_FAULT)) { if (core->capabilities[NON_FATAL_FAULTS].value) { dprintk_ratelimit(VIDC_ERR, "err ", @@ -4118,10 +4021,6 @@ int msm_vidc_trigger_ssr(struct msm_vidc_core *core, { struct msm_vidc_ssr *ssr; - if (!core) { - d_vpr_e("%s: Invalid parameters\n", __func__); - return -EINVAL; - } ssr = &core->ssr; /* * @@ -4181,11 +4080,6 @@ int msm_vidc_trigger_stability(struct msm_vidc_core *core, struct msm_vidc_inst *inst = NULL; struct msm_vidc_stability stability; - if (!core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - /* * * stability_type: 0-3 bits @@ -4592,11 +4486,6 @@ struct msm_vidc_inst *get_inst_ref(struct msm_vidc_core *core, struct msm_vidc_inst *inst = NULL; bool matches = false; - if (!core) { - d_vpr_e("%s: invalid params\n", __func__); - return NULL; - } - mutex_lock(&core->lock); list_for_each_entry(inst, &core->instances, list) { if (inst == instance) { @@ -4615,11 +4504,6 @@ struct msm_vidc_inst *get_inst(struct msm_vidc_core *core, struct msm_vidc_inst *inst = NULL; bool matches = false; - if (!core) { - d_vpr_e("%s: invalid params\n", __func__); - return NULL; - } - mutex_lock(&core->lock); list_for_each_entry(inst, &core->instances, list) { if (inst->session_id == session_id) { @@ -4802,9 +4686,6 @@ int msm_vidc_update_buffer_count(struct msm_vidc_inst *inst, u32 port) void msm_vidc_schedule_core_deinit(struct msm_vidc_core *core) { - if (!core) - return; - if (!core->capabilities[FW_UNLOAD].value) return; @@ -5534,11 +5415,6 @@ struct context_bank_info *msm_vidc_get_context_bank_for_device( { struct context_bank_info *cb = NULL, *match = NULL; - if (!core || !dev) { - d_vpr_e("%s: invalid params\n", __func__); - return NULL; - } - venus_hfi_for_each_context_bank(core, cb) { if (of_device_is_compatible(dev->of_node, cb->name)) { match = cb; diff --git a/driver/vidc/src/msm_vidc_memory.c b/driver/vidc/src/msm_vidc_memory.c index 87fd4d498f..1cd2f5b564 100644 --- a/driver/vidc/src/msm_vidc_memory.c +++ b/driver/vidc/src/msm_vidc_memory.c @@ -324,7 +324,7 @@ static struct dma_buf_attachment *msm_vidc_dma_buf_attach(struct msm_vidc_core * int rc = 0; struct dma_buf_attachment *attach = NULL; - if (!core || !dbuf || !dev) { + if (!dbuf || !dev) { d_vpr_e("%s: invalid params\n", __func__); return NULL; } @@ -466,7 +466,7 @@ static int msm_vidc_dma_map_page(struct msm_vidc_core *core, struct context_bank_info *cb = NULL; dma_addr_t dma_addr; - if (!core || !mem) { + if (!mem) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -515,7 +515,7 @@ static int msm_vidc_dma_unmap_page(struct msm_vidc_core *core, int rc = 0; struct context_bank_info *cb = NULL; - if (!core || !mem) { + if (!mem) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -563,7 +563,7 @@ static int msm_vidc_iommu_map(struct msm_vidc_core *core, struct msm_vidc_mem *m int rc = 0; struct context_bank_info *cb = NULL; - if (!core || !mem) { + if (!mem) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -594,7 +594,7 @@ static int msm_vidc_iommu_unmap(struct msm_vidc_core *core, struct msm_vidc_mem int rc = 0; struct context_bank_info *cb = NULL; - if (!core || !mem) { + if (!mem) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } diff --git a/driver/vidc/src/msm_vidc_memory_ext.c b/driver/vidc/src/msm_vidc_memory_ext.c index 0eca6493f0..38a7e1b42f 100644 --- a/driver/vidc/src/msm_vidc_memory_ext.c +++ b/driver/vidc/src/msm_vidc_memory_ext.c @@ -29,7 +29,7 @@ static struct dma_buf_attachment *msm_vidc_dma_buf_attach_ext(struct msm_vidc_co struct dma_buf_attachment *attach = NULL; struct context_bank_info *cb = NULL; - if (!core || !dbuf || !dev) { + if (!dbuf || !dev) { d_vpr_e("%s: invalid params\n", __func__); return NULL; } @@ -231,7 +231,7 @@ static int msm_vidc_memory_map_ext(struct msm_vidc_core *core, struct msm_vidc_m struct sg_table *table = NULL; struct context_bank_info *cb = NULL; - if (!core || !mem) { + if (!mem) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } @@ -257,7 +257,7 @@ static int msm_vidc_memory_map_ext(struct msm_vidc_core *core, struct msm_vidc_m } cb = msm_vidc_get_context_bank_for_region(core, mem->region); - if (!cb) { + if (!cb || !cb->dev) { d_vpr_e("%s: Failed to get context bank device\n", __func__); rc = -EIO; @@ -302,7 +302,7 @@ static int msm_vidc_memory_unmap_ext(struct msm_vidc_core *core, { int rc = 0; - if (!core || !mem) { + if (!mem) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } diff --git a/driver/vidc/src/msm_vidc_probe.c b/driver/vidc/src/msm_vidc_probe.c index ee657197ce..2aa1feca54 100644 --- a/driver/vidc/src/msm_vidc_probe.c +++ b/driver/vidc/src/msm_vidc_probe.c @@ -66,17 +66,11 @@ static int msm_vidc_init_resources(struct msm_vidc_core *core) struct msm_vidc_resource *res = NULL; int rc = 0; - if (!core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - res = devm_kzalloc(&core->pdev->dev, sizeof(*res), GFP_KERNEL); if (!res) { d_vpr_e("%s: failed to alloc memory for resource\n", __func__); return -ENOMEM; } - res->core = core; core->resource = res; rc = call_res_op(core, init, core); @@ -174,11 +168,6 @@ static int msm_vidc_register_video_device(struct msm_vidc_core *core, d_vpr_h("%s: domain %d\n", __func__, type); - if (!core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - if (type == MSM_VIDC_DECODER) { index = 0; media_index = MEDIA_ENT_F_PROC_VIDEO_DECODER; @@ -317,11 +306,6 @@ static int msm_vidc_check_mmrm_support(struct msm_vidc_core *core) { int rc = 0; - if (!core || !core->platform) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - if (!is_mmrm_supported(core)) goto exit; @@ -337,11 +321,6 @@ exit: #else static int msm_vidc_check_mmrm_support(struct msm_vidc_core *core) { - if (!core || !core->platform) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - core->platform->data.supports_mmrm = 0; return 0; @@ -377,10 +356,6 @@ static int msm_vidc_initialize_core(struct msm_vidc_core *core) { int rc = 0; - if (!core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } d_vpr_h("%s()\n", __func__); msm_vidc_update_core_state(core, MSM_VIDC_CORE_DEINIT, __func__); @@ -499,11 +474,6 @@ static int msm_vidc_setup_context_bank(struct msm_vidc_core *core, struct context_bank_info *cb = NULL; int rc = 0; - if (!core || !dev) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - cb = msm_vidc_get_context_bank_for_device(core, dev); if (!cb) { d_vpr_e("%s: Failed to get context bank device for %s\n", @@ -707,9 +677,10 @@ static int msm_vidc_remove_video_device(struct platform_device *pdev) d_vpr_e("%s: invalid input %pK", __func__, pdev); return -EINVAL; } + core = dev_get_drvdata(&pdev->dev); if (!core) { - d_vpr_e("%s: invalid core", __func__); + d_vpr_e("%s: invalid core\n", __func__); return -EINVAL; } @@ -909,6 +880,11 @@ static int msm_vidc_probe(struct platform_device *pdev) { d_vpr_h("%s()\n", __func__); + if (!pdev) { + d_vpr_e("%s: invalid params\n", __func__); + return -EINVAL; + } + /* * Sub devices probe will be triggered by of_platform_populate() towards * the end of the probe function after msm-vidc device probe is diff --git a/driver/vidc/src/msm_vidc_state.c b/driver/vidc/src/msm_vidc_state.c index f10f6412fe..1752f02ca9 100644 --- a/driver/vidc/src/msm_vidc_state.c +++ b/driver/vidc/src/msm_vidc_state.c @@ -87,11 +87,6 @@ static int msm_vidc_core_deinit_state(struct msm_vidc_core *core, { int rc = 0; - if (!core || !data) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - switch (type) { case CORE_EVENT_UPDATE_SUB_STATE: { @@ -127,11 +122,6 @@ static int msm_vidc_core_init_wait_state(struct msm_vidc_core *core, { int rc = 0; - if (!core || !data) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - switch (type) { case CORE_EVENT_UPDATE_SUB_STATE: { @@ -167,11 +157,6 @@ static int msm_vidc_core_init_state(struct msm_vidc_core *core, { int rc = 0; - if (!core || !data) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - switch (type) { case CORE_EVENT_UPDATE_SUB_STATE: { @@ -207,11 +192,6 @@ static int msm_vidc_core_error_state(struct msm_vidc_core *core, { int rc = 0; - if (!core || !data) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - switch (type) { case CORE_EVENT_UPDATE_SUB_STATE: { @@ -346,11 +326,6 @@ int msm_vidc_change_core_state(struct msm_vidc_core *core, enum msm_vidc_allow allow; int rc = 0; - if (!core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - /* core must be locked */ rc = __strict_check(core, func); if (rc) { @@ -436,11 +411,6 @@ static int msm_vidc_update_core_sub_state(struct msm_vidc_core *core, char sub_state_name[MAX_NAME_LENGTH]; int ret = 0, rc = 0; - if (!core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - /* no substate update */ if (!sub_state) return 0; @@ -468,11 +438,6 @@ int msm_vidc_change_core_sub_state(struct msm_vidc_core *core, int rc = 0; enum msm_vidc_core_sub_state prev_sub_state; - if (!core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - /* core must be locked */ rc = __strict_check(core, func); if (rc) { diff --git a/driver/vidc/src/msm_vidc_synx.c b/driver/vidc/src/msm_vidc_synx.c index 5604984d80..ff2f8480fb 100644 --- a/driver/vidc/src/msm_vidc_synx.c +++ b/driver/vidc/src/msm_vidc_synx.c @@ -118,11 +118,6 @@ static int msm_vidc_synx_fence_register(struct msm_vidc_core *core) char synx_session_name[MAX_SYNX_FENCE_SESSION_NAME]; struct synx_queue_desc queue_desc; - if (!core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - if (!core->capabilities[SUPPORTS_SYNX_FENCE].value) return 0; @@ -164,11 +159,6 @@ static int msm_vidc_synx_fence_deregister(struct msm_vidc_core *core) { int rc = 0; - if (!core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - if (!core->capabilities[SUPPORTS_SYNX_FENCE].value) return 0; @@ -328,11 +318,6 @@ static void msm_vidc_synx_fence_recover(struct msm_vidc_core *core) { int rc = 0; - if (!core) { - d_vpr_e("%s: invalid paras\n", __func__); - return; - } - rc = synx_hwfence_recover( (enum synx_client_id)core->synx_fence_data.client_id); if (rc) diff --git a/driver/vidc/src/resources.c b/driver/vidc/src/resources.c index 63fe8d2247..f99222d67f 100644 --- a/driver/vidc/src/resources.c +++ b/driver/vidc/src/resources.c @@ -194,10 +194,6 @@ static int __opp_set_rate(struct msm_vidc_core *core, u64 freq) struct dev_pm_opp *opp; int rc = 0; - if (!core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } opp_freq = freq; /* find max(ceil) freq from opp table */ @@ -229,10 +225,6 @@ static int __init_register_base(struct msm_vidc_core *core) { struct msm_vidc_resource *res; - if (!core || !core->pdev || !core->resource) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } res = core->resource; res->register_base_addr = devm_platform_ioremap_resource(core->pdev, 0); @@ -254,10 +246,6 @@ static int __init_irq(struct msm_vidc_core *core) #endif int rc = 0; - if (!core || !core->pdev || !core->resource) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } res = core->resource; #if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 16, 0)) @@ -290,10 +278,6 @@ static int __init_bus(struct msm_vidc_core *core) u32 bus_count = 0, cnt = 0; int rc = 0; - if (!core || !core->resource || !core->platform) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } interconnects = &core->resource->bus_set; bus_tbl = core->platform->data.bw_tbl; @@ -359,10 +343,6 @@ static int __init_power_domains(struct msm_vidc_core *core) u32 pd_count = 0, opp_count = 0, cnt = 0; int rc = 0; - if (!core || !core->resource || !core->platform) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } pds = &core->resource->power_domain_set; pd_tbl = core->platform->data.pd_tbl; @@ -490,10 +470,6 @@ static int __init_clocks(struct msm_vidc_core *core) u32 clk_count = 0, freq_count = 0; int fcnt = 0, cnt = 0, rc = 0; - if (!core || !core->resource || !core->platform) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } clocks = &core->resource->clock_set; clk_tbl = core->platform->data.clk_tbl; @@ -586,10 +562,6 @@ static int __init_reset_clocks(struct msm_vidc_core *core) u32 rst_count = 0, cnt = 0; int rc = 0; - if (!core || !core->resource || !core->platform) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } rsts = &core->resource->reset_set; rst_tbl = core->platform->data.clk_rst_tbl; @@ -649,10 +621,6 @@ static int __init_subcaches(struct msm_vidc_core *core) u32 llcc_count = 0, cnt = 0; int rc = 0; - if (!core || !core->resource || !core->platform) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } caches = &core->resource->subcache_set; /* skip init if subcache not available */ @@ -711,10 +679,6 @@ static int __init_freq_table(struct msm_vidc_core *core) u32 freq_count = 0, cnt = 0; int rc = 0; - if (!core || !core->resource || !core->platform) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } clks = &core->resource->freq_set; freq_tbl = core->platform->data.freq_tbl; @@ -758,10 +722,6 @@ static int __init_context_banks(struct msm_vidc_core *core) u32 cb_count = 0, cnt = 0; int rc = 0; - if (!core || !core->resource || !core->platform) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } cbs = &core->resource->context_bank_set; cb_tbl = core->platform->data.context_bank_tbl; @@ -817,10 +777,6 @@ static int __init_device_region(struct msm_vidc_core *core) u32 dev_reg_count = 0, cnt = 0; int rc = 0; - if (!core || !core->resource || !core->platform) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } dev_set = &core->resource->device_region_set; dev_reg_tbl = core->platform->data.dev_reg_tbl; @@ -865,11 +821,6 @@ static int __register_mmrm(struct msm_vidc_core *core) int rc = 0; struct clock_info *cl; - if (!core || !core->platform) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - /* skip if platform does not support mmrm */ if (!is_mmrm_supported(core)) { d_vpr_h("%s: MMRM not supported\n", __func__); @@ -1100,11 +1051,6 @@ static int __unvote_buses(struct msm_vidc_core *core) int rc = 0; struct bus_info *bus = NULL; - if (!core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - core->power.bw_ddr = 0; core->power.bw_llcc = 0; @@ -1126,11 +1072,6 @@ static int __vote_buses(struct msm_vidc_core *core, unsigned long bw_kbps = 0, bw_prev = 0; enum vidc_bus_type type; - if (!core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - venus_hfi_for_each_bus(core, bus) { if (bus && bus->icc) { type = get_type_frm_name(bus->name); @@ -1186,11 +1127,6 @@ static int print_residency_stats(struct msm_vidc_core *core, struct clock_info * u64 total_time_us = 0; int rc = 0; - if (!core || !cl) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - /* skip if scaling not supported */ if (!cl->has_scaling) return 0; @@ -1217,11 +1153,6 @@ static int reset_residency_stats(struct msm_vidc_core *core, struct clock_info * struct clock_residency *residency = NULL; int rc = 0; - if (!core || !cl) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - /* skip if scaling not supported */ if (!cl->has_scaling) return 0; @@ -1268,11 +1199,6 @@ static int update_residency_stats( if (!(msm_vidc_debug & (VIDC_HIGH | VIDC_STAT))) return 0; - if (!core || !cl) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - /* skip update if scaling not supported */ if (!cl->has_scaling) return 0; @@ -1316,12 +1242,6 @@ static int __set_clk_rate(struct msm_vidc_core *core, struct clock_info *cl, { int rc = 0; - /* not registered */ - if (!core || !cl) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - /* update clock residency stats */ update_residency_stats(core, cl, rate); @@ -1374,11 +1294,6 @@ static int __disable_unprepare_clock(struct msm_vidc_core *core, struct clock_info *cl; bool found; - if (!core || !clk_name) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - found = false; venus_hfi_for_each_clock(core, cl) { if (!cl->clk) { @@ -1411,11 +1326,6 @@ static int __prepare_enable_clock(struct msm_vidc_core *core, bool found; u64 rate = 0; - if (!core || !clk_name) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - found = false; venus_hfi_for_each_clock(core, cl) { if (!cl->clk) { @@ -1729,11 +1639,6 @@ static int __print_clock_residency_stats(struct msm_vidc_core *core) struct clock_info *cl; int rc = 0; - if (!core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - venus_hfi_for_each_clock(core, cl) { /* skip if scaling not supported */ if (!cl->has_scaling) @@ -1751,11 +1656,6 @@ static int __reset_clock_residency_stats(struct msm_vidc_core *core) struct clock_info *cl; int rc = 0; - if (!core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - venus_hfi_for_each_clock(core, cl) { /* skip if scaling not supported */ if (!cl->has_scaling) diff --git a/driver/vidc/src/resources_ext.c b/driver/vidc/src/resources_ext.c index e9cab8044c..a9e82fecaf 100644 --- a/driver/vidc/src/resources_ext.c +++ b/driver/vidc/src/resources_ext.c @@ -31,10 +31,6 @@ static int __init_regulators(struct msm_vidc_core *core) u32 regulator_count = 0, cnt = 0; int rc = 0; - if (!core || !core->resource || !core->platform) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } regulators = &core->resource->regulator_set; regulator_tbl = core->platform->data.regulator_tbl; @@ -93,11 +89,6 @@ static int __acquire_regulator(struct msm_vidc_core *core, { int rc = 0; - if (!core || !rinfo) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - if (rinfo->hw_power_collapse) { if (!rinfo->regulator) { d_vpr_e("%s: invalid regulator\n", __func__); @@ -186,11 +177,6 @@ static int __enable_regulator(struct msm_vidc_core *core, const char *reg_name) struct regulator_info *rinfo; bool found; - if (!core || !reg_name) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - found = false; venus_hfi_for_each_regulator(core, rinfo) { if (!rinfo->regulator) { @@ -231,11 +217,6 @@ static int __disable_regulator(struct msm_vidc_core *core, const char *reg_name) struct regulator_info *rinfo; bool found; - if (!core || !reg_name) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - found = false; venus_hfi_for_each_regulator(core, rinfo) { if (!rinfo->regulator) { @@ -341,11 +322,6 @@ static int update_residency_stats( if (!(msm_vidc_debug & (VIDC_HIGH | VIDC_STAT))) return 0; - if (!core || !cl) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - /* skip update if scaling not supported */ if (!cl->has_scaling) return 0; @@ -393,12 +369,6 @@ static int __set_clk_rate(struct msm_vidc_core *core, struct clock_info *cl, struct mmrm_client *client; u64 srate; - /* not registered */ - if (!core || !cl || !core->platform) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - if (is_mmrm_supported(core) && !cl->mmrm_client) { d_vpr_e("%s: invalid mmrm client\n", __func__); return -EINVAL; @@ -452,12 +422,6 @@ static int __set_clk_rate(struct msm_vidc_core *core, struct clock_info *cl, u64 srate; int rc = 0; - /* not registered */ - if (!core || !cl) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - /* update clock residency stats */ update_residency_stats(core, cl, rate); diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index 05b6318f4b..b278bf7b15 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -67,9 +67,6 @@ static bool __valdiate_session(struct msm_vidc_core *core, struct msm_vidc_inst *temp; int rc = 0; - if (!core) - return false; - rc = __strict_check(core, __func__); if (rc) return false; @@ -88,10 +85,6 @@ static bool __valdiate_session(struct msm_vidc_core *core, static void __schedule_power_collapse_work(struct msm_vidc_core *core) { - if (!core) { - d_vpr_e("%s: invalid params\n", __func__); - return; - } if (!core->capabilities[SW_PC].value) { d_vpr_l("software power collapse not enabled\n"); return; @@ -108,10 +101,6 @@ static void __schedule_power_collapse_work(struct msm_vidc_core *core) static void __cancel_power_collapse_work(struct msm_vidc_core *core) { - if (!core) { - d_vpr_e("%s: invalid params\n", __func__); - return; - } if (!core->capabilities[SW_PC].value) return; @@ -126,11 +115,6 @@ static void __flush_debug_queue(struct msm_vidc_core *core, bool local_packet = false; enum vidc_msg_prio_fw log_level_fw = msm_fw_debug; - if (!core) { - d_vpr_e("%s: invalid params\n", __func__); - return; - } - if (!packet || !packet_size) { if (msm_vidc_vmem_alloc(VIDC_IFACEQ_VAR_HUGE_PKT_SIZE, (void **)&packet, __func__)) @@ -281,10 +265,6 @@ static int __power_collapse(struct msm_vidc_core *core, bool force) { int rc = 0; - if (!core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } if (!is_core_sub_state(core, CORE_SUBSTATE_POWER_ENABLE)) { d_vpr_h("%s: Power already disabled\n", __func__); goto exit; @@ -479,10 +459,7 @@ static int __suspend(struct msm_vidc_core *core) { int rc = 0; - if (!core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } else if (!is_core_sub_state(core, CORE_SUBSTATE_POWER_ENABLE)) { + if (!is_core_sub_state(core, CORE_SUBSTATE_POWER_ENABLE)) { d_vpr_h("Power already disabled\n"); return 0; } @@ -513,10 +490,7 @@ static int __resume(struct msm_vidc_core *core) { int rc = 0; - if (!core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } else if (is_core_sub_state(core, CORE_SUBSTATE_POWER_ENABLE)) { + if (is_core_sub_state(core, CORE_SUBSTATE_POWER_ENABLE)) { goto exit; } else if (!core_in_valid_state(core)) { d_vpr_e("%s: core not in valid state\n", __func__); @@ -726,10 +700,6 @@ void venus_hfi_pm_work_handler(struct work_struct *work) struct msm_vidc_core *core; core = container_of(work, struct msm_vidc_core, pm_work.work); - if (!core) { - d_vpr_e("%s: invalid params\n", __func__); - return; - } core_lock(core, __func__); d_vpr_h("%s: try power collapse\n", __func__); @@ -818,11 +788,6 @@ int venus_hfi_core_init(struct msm_vidc_core *core) { int rc = 0; - if (!core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - d_vpr_h("%s(): core %pK\n", __func__, core); rc = __strict_check(core, __func__); @@ -880,11 +845,6 @@ int venus_hfi_core_deinit(struct msm_vidc_core *core, bool force) { int rc = 0; - if (!core) { - d_vpr_h("%s(): invalid params\n", __func__); - return -EINVAL; - } - d_vpr_h("%s(): core %pK\n", __func__, core); rc = __strict_check(core, __func__); if (rc) @@ -911,12 +871,6 @@ int venus_hfi_noc_error_info(struct msm_vidc_core *core) { int rc = 0; - if (!core) { - d_vpr_e("%s: Invalid parameters: %pK\n", - __func__, core); - return -EINVAL; - } - if (!core->capabilities[NON_FATAL_FAULTS].value) return 0; @@ -942,11 +896,6 @@ int venus_hfi_suspend(struct msm_vidc_core *core) { int rc = 0; - if (!core) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - rc = __strict_check(core, __func__); if (rc) return rc; @@ -975,11 +924,6 @@ int venus_hfi_trigger_ssr(struct msm_vidc_core *core, u32 type, int rc = 0; u32 payload[2]; - if (!core || !core->packet) { - d_vpr_e("%s: Invalid params\n", __func__); - return -EINVAL; - } - /* * call resume before preparing ssr hfi packet in core->packet * otherwise ssr hfi packet in core->packet will be overwritten diff --git a/driver/vidc/src/venus_hfi_queue.c b/driver/vidc/src/venus_hfi_queue.c index a8c1f4945d..39a5b09df5 100644 --- a/driver/vidc/src/venus_hfi_queue.c +++ b/driver/vidc/src/venus_hfi_queue.c @@ -270,12 +270,6 @@ static int __iface_cmdq_write_relaxed(struct msm_vidc_core *core, //struct vidc_hal_cmd_pkt_hdr *cmd_packet; int rc = -E2BIG; - if (!core || !pkt) { - d_vpr_e("%s: invalid params %pK %pK\n", - __func__, core, pkt); - return -EINVAL; - } - rc = __strict_check(core, __func__); if (rc) return rc; @@ -458,11 +452,6 @@ int venus_hfi_reset_queue_header(struct msm_vidc_core *core) struct hfi_queue_header *q_hdr; int i, rc = 0; - if (!core) { - d_vpr_e("%s: invalid param\n", __func__); - return -EINVAL; - } - for (i = 0; i < VIDC_IFACEQ_NUMQ; i++) { iface_q = &core->iface_queues[i]; __set_queue_hdr_defaults(iface_q->q_hdr); @@ -544,11 +533,6 @@ int venus_hfi_queue_init(struct msm_vidc_core *core) d_vpr_h("%s: initializing interface queue\n", __func__); - if (!core) { - d_vpr_h("%s: invalid params\n", __func__); - return -EINVAL; - } - if (core->iface_q_table.align_virtual_addr) { d_vpr_h("%s: queues already allocated\n", __func__); venus_hfi_reset_queue_header(core); diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index 1ccbfa4721..9bac25780e 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -212,11 +212,6 @@ static int validate_hdr_packet(struct msm_vidc_core *core, u8 *pkt; int i, rc = 0; - if (!core || !hdr || !function) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - if (hdr->size < sizeof(struct hfi_header) + sizeof(struct hfi_packet)) { d_vpr_e("%s: invalid header size %d\n", __func__, hdr->size); return -EINVAL; @@ -395,10 +390,6 @@ void fw_coredump(struct msm_vidc_core *core) char *data = NULL, *dump = NULL; u64 total_size; - if (!core) { - d_vpr_e("%s: invalid params\n", __func__); - return; - } pdev = core->pdev; node = of_parse_phandle(pdev->dev.of_node, "memory-region", 0); @@ -2075,11 +2066,6 @@ int handle_response(struct msm_vidc_core *core, void *response) struct hfi_header *hdr; int rc = 0; - if (!core || !response) { - d_vpr_e("%s: invalid params\n", __func__); - return -EINVAL; - } - hdr = (struct hfi_header *)response; rc = validate_hdr_packet(core, hdr, __func__); if (rc) { From 11e733244cd7cb88c1c3567f70ef46fb61eb667d Mon Sep 17 00:00:00 2001 From: Ankush Mitra Date: Fri, 16 Jun 2023 11:39:50 +0530 Subject: [PATCH 0952/1061] video: driver: add session err check Add session err check after every inst_lock and move is_session_err check at top level. Change-Id: Ie24107169eb509858ca285536be91ec67119e73a --- driver/vidc/src/msm_vidc.c | 5 --- driver/vidc/src/msm_vidc_v4l2.c | 71 ++++++++++++++++++++++++++++++++- 2 files changed, 70 insertions(+), 6 deletions(-) diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index a741ac0e22..b742c74d83 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -77,11 +77,6 @@ int msm_vidc_poll(struct msm_vidc_inst *inst, struct file *filp, { int poll = 0; - if (is_session_error(inst)) { - i_vpr_e(inst, "%s: inst in error state\n", __func__); - return POLLERR; - } - poll_wait(filp, &inst->fh.wait, wait); poll_wait(filp, &inst->bufq[INPUT_META_PORT].vb2q->done_wq, wait); poll_wait(filp, &inst->bufq[OUTPUT_META_PORT].vb2q->done_wq, wait); diff --git a/driver/vidc/src/msm_vidc_v4l2.c b/driver/vidc/src/msm_vidc_v4l2.c index 7dd6f7b844..e5ba233307 100644 --- a/driver/vidc/src/msm_vidc_v4l2.c +++ b/driver/vidc/src/msm_vidc_v4l2.c @@ -33,7 +33,11 @@ unsigned int msm_v4l2_poll(struct file *filp, struct poll_table_struct *pt) d_vpr_e("%s: invalid instance\n", __func__); return POLLERR; } - + if (is_session_error(inst)) { + i_vpr_e(inst, "%s: inst in error state\n", __func__); + poll = POLLERR; + goto exit; + } poll = msm_vidc_poll((void *)inst, filp, pt); if (poll) { goto exit; @@ -98,6 +102,11 @@ int msm_v4l2_querycap(struct file *filp, void *fh, client_lock(inst, __func__); inst_lock(inst, __func__); + if (is_session_error(inst)) { + i_vpr_e(inst, "%s: inst in error state\n", __func__); + rc = -EBUSY; + goto unlock; + } rc = msm_vidc_querycap((void *)inst, cap); if (rc) goto unlock; @@ -124,6 +133,11 @@ int msm_v4l2_enum_fmt(struct file *filp, void *fh, client_lock(inst, __func__); inst_lock(inst, __func__); + if (is_session_error(inst)) { + i_vpr_e(inst, "%s: inst in error state\n", __func__); + rc = -EBUSY; + goto unlock; + } rc = msm_vidc_enum_fmt((void *)inst, f); if (rc) goto unlock; @@ -211,6 +225,11 @@ int msm_v4l2_g_fmt(struct file *filp, void *fh, client_lock(inst, __func__); inst_lock(inst, __func__); + if (is_session_error(inst)) { + i_vpr_e(inst, "%s: inst in error state\n", __func__); + rc = -EBUSY; + goto unlock; + } rc = msm_vidc_g_fmt((void *)inst, f); if (rc) goto unlock; @@ -268,6 +287,11 @@ int msm_v4l2_g_selection(struct file *filp, void *fh, client_lock(inst, __func__); inst_lock(inst, __func__); + if (is_session_error(inst)) { + i_vpr_e(inst, "%s: inst in error state\n", __func__); + rc = -EBUSY; + goto unlock; + } rc = msm_vidc_g_selection((void *)inst, s); if (rc) goto unlock; @@ -325,6 +349,11 @@ int msm_v4l2_g_parm(struct file *filp, void *fh, client_lock(inst, __func__); inst_lock(inst, __func__); + if (is_session_error(inst)) { + i_vpr_e(inst, "%s: inst in error state\n", __func__); + rc = -EBUSY; + goto unlock; + } rc = msm_vidc_g_param((void *)inst, a); if (rc) goto unlock; @@ -351,6 +380,11 @@ int msm_v4l2_reqbufs(struct file *filp, void *fh, client_lock(inst, __func__); inst_lock(inst, __func__); + if (is_session_error(inst)) { + i_vpr_e(inst, "%s: inst in error state\n", __func__); + rc = -EBUSY; + goto unlock; + } rc = inst->event_handle(inst, MSM_VIDC_REQBUFS, b); if (rc) goto unlock; @@ -377,6 +411,11 @@ int msm_v4l2_querybuf(struct file *filp, void *fh, client_lock(inst, __func__); inst_lock(inst, __func__); + if (is_session_error(inst)) { + i_vpr_e(inst, "%s: inst in error state\n", __func__); + rc = -EBUSY; + goto unlock; + } rc = msm_vidc_querybuf((void *)inst, b); if (rc) goto unlock; @@ -403,6 +442,11 @@ int msm_v4l2_create_bufs(struct file *filp, void *fh, client_lock(inst, __func__); inst_lock(inst, __func__); + if (is_session_error(inst)) { + i_vpr_e(inst, "%s: inst in error state\n", __func__); + rc = -EBUSY; + goto unlock; + } rc = msm_vidc_create_bufs((void *)inst, b); if (rc) goto unlock; @@ -430,6 +474,11 @@ int msm_v4l2_prepare_buf(struct file *filp, void *fh, client_lock(inst, __func__); inst_lock(inst, __func__); + if (is_session_error(inst)) { + i_vpr_e(inst, "%s: inst in error state\n", __func__); + rc = -EBUSY; + goto unlock; + } rc = msm_vidc_prepare_buf((void *)inst, vdev->v4l2_dev->mdev, b); if (rc) goto unlock; @@ -770,6 +819,11 @@ int msm_v4l2_enum_framesizes(struct file *filp, void *fh, client_lock(inst, __func__); inst_lock(inst, __func__); + if (is_session_error(inst)) { + i_vpr_e(inst, "%s: inst in error state\n", __func__); + rc = -EBUSY; + goto unlock; + } rc = msm_vidc_enum_framesizes((void *)inst, fsize); if (rc) goto unlock; @@ -797,6 +851,11 @@ int msm_v4l2_enum_frameintervals(struct file *filp, void *fh, client_lock(inst, __func__); inst_lock(inst, __func__); + if (is_session_error(inst)) { + i_vpr_e(inst, "%s: inst in error state\n", __func__); + rc = -EBUSY; + goto unlock; + } rc = msm_vidc_enum_frameintervals((void *)inst, fival); if (rc) goto unlock; @@ -823,6 +882,11 @@ int msm_v4l2_queryctrl(struct file *filp, void *fh, client_lock(inst, __func__); inst_lock(inst, __func__); + if (is_session_error(inst)) { + i_vpr_e(inst, "%s: inst in error state\n", __func__); + rc = -EBUSY; + goto unlock; + } rc = msm_vidc_query_ctrl((void *)inst, ctrl); if (rc) goto unlock; @@ -850,6 +914,11 @@ int msm_v4l2_querymenu(struct file *filp, void *fh, client_lock(inst, __func__); inst_lock(inst, __func__); + if (is_session_error(inst)) { + i_vpr_e(inst, "%s: inst in error state\n", __func__); + rc = -EBUSY; + goto unlock; + } rc = msm_vidc_query_menu((void *)inst, qmenu); if (rc) goto unlock; From 9438113c3fa7630f35eb9a828c7c3dc7537128f9 Mon Sep 17 00:00:00 2001 From: Ankush Mitra Date: Fri, 9 Jun 2023 15:41:53 +0530 Subject: [PATCH 0953/1061] video: driver: donot streamoff if streamon fails From driver if we call streamoff without streamon successful, the streamoff will be timed out and it will invoke msm_vidc_inst_timeout, which will change the core state to ERR and FW unload will happen unneccessarly. Change-Id: Iaec6c2de086df53c379d5ec991b22b393d3c9153 Signed-off-by: Ankush Mitra --- driver/vidc/src/msm_vdec.c | 1 - driver/vidc/src/msm_venc.c | 1 - 2 files changed, 2 deletions(-) diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 6016a785ea..fba4527343 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -1577,7 +1577,6 @@ int msm_vdec_streamon_input(struct msm_vidc_inst *inst) error: i_vpr_e(inst, "%s: failed\n", __func__); - msm_vdec_streamoff_input(inst); return rc; } diff --git a/driver/vidc/src/msm_venc.c b/driver/vidc/src/msm_venc.c index ead69b37aa..7624dffa02 100644 --- a/driver/vidc/src/msm_venc.c +++ b/driver/vidc/src/msm_venc.c @@ -934,7 +934,6 @@ int msm_venc_streamon_input(struct msm_vidc_inst *inst) error: i_vpr_e(inst, "%s: failed\n", __func__); - msm_venc_streamoff_input(inst); return rc; } From 62279d0b91eab9469215c61b0d51829d3ae7a38d Mon Sep 17 00:00:00 2001 From: Deepa Guthyappa Madivalara Date: Mon, 26 Jun 2023 11:45:06 -0700 Subject: [PATCH 0954/1061] video: driver: print all NOC Errlog registers - print all NOC Errlog registers Change-Id: I9bfe9f3f63da0566d57de45201ec0a99a8c93a16 Signed-off-by: Deepa Guthyappa Madivalara --- driver/variant/iris33/src/msm_vidc_iris33.c | 40 +++++++++++++++++++-- 1 file changed, 37 insertions(+), 3 deletions(-) diff --git a/driver/variant/iris33/src/msm_vidc_iris33.c b/driver/variant/iris33/src/msm_vidc_iris33.c index f71af42478..ae242bc98c 100644 --- a/driver/variant/iris33/src/msm_vidc_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_iris33.c @@ -123,9 +123,15 @@ typedef enum { */ #define NOC_BASE_OFFS 0x00010000 #define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_MAINCTL_LOW (NOC_BASE_OFFS + 0xA008) -#define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRCLR_LOW (NOC_BASE_OFFS + 0xA018) +#define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRCLR_LOW (NOC_BASE_OFFS + 0xA018) +#define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG0_LOW (NOC_BASE_OFFS + 0xA020) +#define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG0_HIGH (NOC_BASE_OFFS + 0xA024) +#define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG1_LOW (NOC_BASE_OFFS + 0xA028) +#define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG1_HIGH (NOC_BASE_OFFS + 0xA02C) #define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG2_LOW (NOC_BASE_OFFS + 0xA030) +#define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG2_HIGH (NOC_BASE_OFFS + 0xA034) #define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG3_LOW (NOC_BASE_OFFS + 0xA038) +#define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG3_HIGH (NOC_BASE_OFFS + 0xA03C) #define NOC_SIDEBANDMANAGER_MAIN_SIDEBANDMANAGER_FAULTINEN0_LOW (NOC_BASE_OFFS + 0x7040) static int __interrupt_init_iris33(struct msm_vidc_core *vidc_core) @@ -985,18 +991,46 @@ static int __noc_error_info_iris33(struct msm_vidc_core *core) goto fail_assert_xo_reset; } + rc = __read_register(core, + NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG0_LOW, &value); + if (!rc) + d_vpr_e("%s: NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG0_LOW: %#x\n", + __func__, value); + rc = __read_register(core, + NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG0_HIGH, &value); + if (!rc) + d_vpr_e("%s: NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG0_HIGH: %#x\n", + __func__, value); + rc = __read_register(core, + NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG1_LOW, &value); + if (!rc) + d_vpr_e("%s: NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG1_LOW: %#x\n", + __func__, value); + rc = __read_register(core, + NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG1_HIGH, &value); + if (!rc) + d_vpr_e("%s: NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG1_HIGH: %#x\n", + __func__, value); rc = __read_register(core, NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG2_LOW, &value); if (!rc) d_vpr_e("%s: NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG2_LOW: %#x\n", __func__, value); - + rc = __read_register(core, + NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG2_HIGH, &value); + if (!rc) + d_vpr_e("%s: NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG2_HIGH: %#x\n", + __func__, value); rc = __read_register(core, NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG3_LOW, &value); if (!rc) d_vpr_e("%s: NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG3_LOW: %#x\n", __func__, value); - + rc = __read_register(core, + NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG3_HIGH, &value); + if (!rc) + d_vpr_e("%s: NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG3_HIGH: %#x\n", + __func__, value); /* release reset control for other consumers */ rc = call_res_op(core, reset_control_release, core, "video_xo_reset"); if (rc) { From 07116875d4f1543bf22281e60ac911a3125c634f Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Fri, 23 Jun 2023 15:23:21 -0700 Subject: [PATCH 0955/1061] video: driver: fix MAX_NUM_REORDER_FRAMES property usage MAX_NUM_REORDER_FRAMES is 32 packed with MSB 16 bits representing reorder frame count. Instead, this has been used as integer with all bits reprsenting reorder frame count. Fix this. Change-Id: I275a0be71ecf89c44374782445f66ac7e709e2a7 Signed-off-by: Akshata Sahukar --- driver/platform/pineapple/src/msm_vidc_pineapple.c | 7 ++++++- driver/vidc/src/msm_vdec.c | 9 +++++---- driver/vidc/src/venus_hfi_response.c | 7 ++++--- 3 files changed, 15 insertions(+), 8 deletions(-) diff --git a/driver/platform/pineapple/src/msm_vidc_pineapple.c b/driver/platform/pineapple/src/msm_vidc_pineapple.c index f862a23a26..845d815c24 100644 --- a/driver/platform/pineapple/src/msm_vidc_pineapple.c +++ b/driver/platform/pineapple/src/msm_vidc_pineapple.c @@ -1655,8 +1655,12 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { HFI_PROP_PIC_ORDER_CNT_TYPE, CAP_FLAG_VOLATILE}, + /* + * value of MAX_NUM_REORDER_FRAMES is 32 packed as mentioned below + * (max_num_reorder_count << 16) | max_dec_frame_buffering_count + */ {MAX_NUM_REORDER_FRAMES, DEC, H264 | HEVC, - 0, 16, 1, 0, + 0, INT_MAX, 1, 0, V4L2_CID_MPEG_VIDC_MAX_NUM_REORDER_FRAMES, HFI_PROP_MAX_NUM_REORDER_FRAMES, CAP_FLAG_VOLATILE}, @@ -2781,6 +2785,7 @@ static const u32 pineapple_vdec_psc_avc[] = { HFI_PROP_PROFILE, HFI_PROP_LEVEL, HFI_PROP_SIGNAL_COLOR_INFO, + HFI_PROP_MAX_NUM_REORDER_FRAMES, }; static const u32 pineapple_vdec_psc_hevc[] = { diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index fba4527343..156969f2d5 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -723,18 +723,19 @@ static int msm_vdec_set_output_properties(struct msm_vidc_inst *inst) static bool msm_vdec_check_outbuf_fence_allowed(struct msm_vidc_inst *inst) { + u32 reorder_count = inst->capabilities[MAX_NUM_REORDER_FRAMES].value >> 16; + /* no need of checking for reordering/interlace for vp9/av1 */ if (inst->codec == MSM_VIDC_VP9 || inst->codec == MSM_VIDC_AV1) return true; if (inst->capabilities[CODED_FRAMES].value == CODED_FRAMES_INTERLACE || - (!inst->capabilities[OUTPUT_ORDER].value && - inst->capabilities[MAX_NUM_REORDER_FRAMES].value)) { + (!inst->capabilities[OUTPUT_ORDER].value && reorder_count)) { i_vpr_e(inst, - "%s: outbuf tx fence is unsupported for coded frames %d or output order %d and max num reorder frames %d\n", + "%s: outbuf tx fence is unsupported for coded frames %d or output order %d and reorder frames %d\n", __func__, inst->capabilities[CODED_FRAMES].value, inst->capabilities[OUTPUT_ORDER].value, - inst->capabilities[MAX_NUM_REORDER_FRAMES].value); + (inst->capabilities[MAX_NUM_REORDER_FRAMES].value >> 16)); return false; } diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index 1ccbfa4721..6b3e6cc2b4 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -46,8 +46,7 @@ void print_psc_properties(const char *str, struct msm_vidc_inst *inst, struct msm_vidc_subscription_params subsc_params) { i_vpr_h(inst, - "%s: width %d, height %d, crop offsets[0] %#x, crop offsets[1] %#x, bit depth %#x, coded frames %d " - "fw min count %d, poc %d, color info %d, profile %d, level %d, tier %d, fg present %d, sb enabled %d max_num_reorder_frames %d\n", + "%s: width %d, height %d, crop offsets[0] %#x, crop offsets[1] %#x, bit depth %#x, coded frames %d fw min count %d, poc %d, color info %d, profile %d, level %d, tier %d, fg present %d, sb enabled %d, max_num_reorder_frames %d, max_dec_frame_buffering_count %d\n", str, (subsc_params.bitstream_resolution & HFI_BITMASK_BITSTREAM_WIDTH) >> 16, (subsc_params.bitstream_resolution & HFI_BITMASK_BITSTREAM_HEIGHT), subsc_params.crop_offsets[0], subsc_params.crop_offsets[1], @@ -55,7 +54,9 @@ void print_psc_properties(const char *str, struct msm_vidc_inst *inst, subsc_params.fw_min_count, subsc_params.pic_order_cnt, subsc_params.color_info, subsc_params.profile, subsc_params.level, subsc_params.tier, subsc_params.av1_film_grain_present, - subsc_params.av1_super_block_enabled, subsc_params.max_num_reorder_frames); + subsc_params.av1_super_block_enabled, + (subsc_params.max_num_reorder_frames >> 16), + (subsc_params.max_num_reorder_frames & 0x00FF)); } static void print_sfr_message(struct msm_vidc_core *core) From 5d2eff1150b61eb68b6723a2697721c1ab966a77 Mon Sep 17 00:00:00 2001 From: Dikshita Agarwal Date: Thu, 22 Jun 2023 12:08:12 +0530 Subject: [PATCH 0956/1061] video: driver: use helper functions wherever applicable There are many places in code where available helper functions are not being used, fix it. Change-Id: Id5b309837fd5847e280f7fab02820af1b08242a6 Signed-off-by: Dikshita Agarwal --- .../variant/iris2/src/msm_vidc_power_iris2.c | 4 +-- .../variant/iris3/src/msm_vidc_power_iris3.c | 12 ++++----- .../iris33/src/msm_vidc_power_iris33.c | 18 ++++++------- driver/vidc/src/hfi_packet.c | 4 +-- driver/vidc/src/msm_vidc.c | 20 +++++++------- driver/vidc/src/msm_vidc_debug.c | 2 +- driver/vidc/src/msm_vidc_driver.c | 26 +++++++++---------- driver/vidc/src/msm_vidc_power.c | 4 +-- driver/vidc/src/msm_vidc_state.c | 10 +++---- 9 files changed, 50 insertions(+), 50 deletions(-) diff --git a/driver/variant/iris2/src/msm_vidc_power_iris2.c b/driver/variant/iris2/src/msm_vidc_power_iris2.c index a66902e00b..9464c0ed44 100644 --- a/driver/variant/iris2/src/msm_vidc_power_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_power_iris2.c @@ -36,7 +36,7 @@ u64 msm_vidc_calc_freq_iris2(struct msm_vidc_inst *inst, u32 data_size) fw_cycles = fps * inst->capabilities[MB_CYCLES_FW].value; fw_vpp_cycles = fps * inst->capabilities[MB_CYCLES_FW_VPP].value; - if (inst->domain == MSM_VIDC_ENCODER) { + if (is_encode_session(inst)) { vpp_cycles_per_mb = is_low_power_session(inst) ? inst->capabilities[MB_CYCLES_LP].value : inst->capabilities[MB_CYCLES_VPP].value; @@ -99,7 +99,7 @@ u64 msm_vidc_calc_freq_iris2(struct msm_vidc_inst *inst, u32 data_size) vsp_cycles += mbs_per_second * base_cycles; - } else if (inst->domain == MSM_VIDC_DECODER) { + } else if (is_decode_session(inst)) { /* VPP */ vpp_cycles = mbs_per_second * inst->capabilities[MB_CYCLES_VPP].value / inst->capabilities[PIPE].value; diff --git a/driver/variant/iris3/src/msm_vidc_power_iris3.c b/driver/variant/iris3/src/msm_vidc_power_iris3.c index a6918ea097..396ea072a0 100644 --- a/driver/variant/iris3/src/msm_vidc_power_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_power_iris3.c @@ -23,9 +23,9 @@ static int msm_vidc_init_codec_input_freq(struct msm_vidc_inst *inst, u32 data_s enum msm_vidc_port_type port; u32 color_fmt; - if (inst->domain == MSM_VIDC_ENCODER) { + if (is_encode_session(inst)) { codec_input->decoder_or_encoder = CODEC_ENCODER; - } else if (inst->domain == MSM_VIDC_DECODER) { + } else if (is_decode_session(inst)) { codec_input->decoder_or_encoder = CODEC_DECODER; } else { d_vpr_e("%s: invalid domain %d\n", __func__, inst->domain); @@ -59,7 +59,7 @@ static int msm_vidc_init_codec_input_freq(struct msm_vidc_inst *inst, u32 data_s codec_input->pipe_num = inst->capabilities[PIPE].value; codec_input->frame_rate = inst->max_rate; - port = inst->domain == MSM_VIDC_DECODER ? INPUT_PORT : OUTPUT_PORT; + port = is_decode_session(inst) ? INPUT_PORT : OUTPUT_PORT; codec_input->frame_width = inst->fmts[port].fmt.pix_mp.width; codec_input->frame_height = inst->fmts[port].fmt.pix_mp.height; @@ -88,7 +88,7 @@ static int msm_vidc_init_codec_input_freq(struct msm_vidc_inst *inst, u32 data_s /* set as IPP */ codec_input->hierachical_layer = 0; - if (inst->domain == MSM_VIDC_DECODER) + if (is_decode_session(inst)) color_fmt = v4l2_colorformat_to_driver(inst, inst->fmts[OUTPUT_PORT].fmt.pix_mp.pixelformat, __func__); else @@ -397,7 +397,7 @@ static u64 msm_vidc_calc_freq_iris3_legacy(struct msm_vidc_inst *inst, u32 data_ fw_cycles = fps * inst->capabilities[MB_CYCLES_FW].value; fw_vpp_cycles = fps * inst->capabilities[MB_CYCLES_FW_VPP].value; - if (inst->domain == MSM_VIDC_ENCODER) { + if (is_encode_session(inst)) { vpp_cycles_per_mb = is_low_power_session(inst) ? inst->capabilities[MB_CYCLES_LP].value : inst->capabilities[MB_CYCLES_VPP].value; @@ -464,7 +464,7 @@ static u64 msm_vidc_calc_freq_iris3_legacy(struct msm_vidc_inst *inst, u32 data_ vsp_cycles += mbs_per_second * base_cycles; - } else if (inst->domain == MSM_VIDC_DECODER) { + } else if (is_decode_session(inst)) { /* VPP */ vpp_cycles = mbs_per_second * inst->capabilities[MB_CYCLES_VPP].value / inst->capabilities[PIPE].value; diff --git a/driver/variant/iris33/src/msm_vidc_power_iris33.c b/driver/variant/iris33/src/msm_vidc_power_iris33.c index 5232524c7d..8c69e1d93e 100644 --- a/driver/variant/iris33/src/msm_vidc_power_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_power_iris33.c @@ -24,7 +24,7 @@ static int msm_vidc_get_hier_layer_val(struct msm_vidc_inst *inst) { int hierachical_layer = CODEC_GOP_IPP; - if (inst->domain == MSM_VIDC_ENCODER) { + if (is_encode_session(inst)) { if (inst->capabilities[ALL_INTRA].value) { /* no P and B frames case */ hierachical_layer = CODEC_GOP_IONLY; @@ -51,9 +51,9 @@ static int msm_vidc_init_codec_input_freq(struct msm_vidc_inst *inst, u32 data_s enum msm_vidc_port_type port; u32 color_fmt, tile_rows_columns = 0; - if (inst->domain == MSM_VIDC_ENCODER) { + if (is_encode_session(inst)) { codec_input->decoder_or_encoder = CODEC_ENCODER; - } else if (inst->domain == MSM_VIDC_DECODER) { + } else if (is_decode_session(inst)) { codec_input->decoder_or_encoder = CODEC_DECODER; } else { d_vpr_e("%s: invalid domain %d\n", __func__, inst->domain); @@ -91,7 +91,7 @@ static int msm_vidc_init_codec_input_freq(struct msm_vidc_inst *inst, u32 data_s codec_input->pipe_num = inst->capabilities[PIPE].value; codec_input->frame_rate = inst->max_rate; - port = inst->domain == MSM_VIDC_DECODER ? INPUT_PORT : OUTPUT_PORT; + port = is_decode_session(inst) ? INPUT_PORT : OUTPUT_PORT; codec_input->frame_width = inst->fmts[port].fmt.pix_mp.width; codec_input->frame_height = inst->fmts[port].fmt.pix_mp.height; @@ -113,7 +113,7 @@ static int msm_vidc_init_codec_input_freq(struct msm_vidc_inst *inst, u32 data_s codec_input->hierachical_layer = msm_vidc_get_hier_layer_val(inst); - if (inst->domain == MSM_VIDC_DECODER) + if (is_decode_session(inst)) color_fmt = v4l2_colorformat_to_driver(inst, inst->fmts[OUTPUT_PORT].fmt.pix_mp.pixelformat, __func__); else @@ -122,7 +122,7 @@ static int msm_vidc_init_codec_input_freq(struct msm_vidc_inst *inst, u32 data_s codec_input->linear_opb = is_linear_colorformat(color_fmt); - if (inst->domain == MSM_VIDC_DECODER) + if (is_decode_session(inst)) codec_input->bitrate_mbps = (codec_input->frame_rate * data_size * 8) / 1000000; else @@ -428,7 +428,7 @@ static u64 msm_vidc_calc_freq_iris33_new(struct msm_vidc_inst *inst, u32 data_si if (ret) return freq; - if (inst->domain == MSM_VIDC_ENCODER) { + if (is_encode_session(inst)) { if (!inst->capabilities[ENC_RING_BUFFER_COUNT].value && is_vpp_cycles_close_to_freq_corner(core, codec_output.vpp_min_freq)) { @@ -546,7 +546,7 @@ u64 msm_vidc_calc_freq_iris33_legacy(struct msm_vidc_inst *inst, u32 data_size) fw_cycles = fps * inst->capabilities[MB_CYCLES_FW].value; fw_vpp_cycles = fps * inst->capabilities[MB_CYCLES_FW_VPP].value; - if (inst->domain == MSM_VIDC_ENCODER) { + if (is_encode_session(inst)) { vpp_cycles_per_mb = is_low_power_session(inst) ? inst->capabilities[MB_CYCLES_LP].value : inst->capabilities[MB_CYCLES_VPP].value; @@ -613,7 +613,7 @@ u64 msm_vidc_calc_freq_iris33_legacy(struct msm_vidc_inst *inst, u32 data_size) vsp_cycles += mbs_per_second * base_cycles; - } else if (inst->domain == MSM_VIDC_DECODER) { + } else if (is_decode_session(inst)) { /* VPP */ vpp_cycles = mbs_per_second * inst->capabilities[MB_CYCLES_VPP].value / inst->capabilities[PIPE].value; diff --git a/driver/vidc/src/hfi_packet.c b/driver/vidc/src/hfi_packet.c index 86b9d42ddd..b8295e52f9 100644 --- a/driver/vidc/src/hfi_packet.c +++ b/driver/vidc/src/hfi_packet.c @@ -211,13 +211,13 @@ u32 get_hfi_codec(struct msm_vidc_inst *inst) { switch (inst->codec) { case MSM_VIDC_H264: - if (inst->domain == MSM_VIDC_ENCODER) + if (is_encode_session(inst)) return HFI_CODEC_ENCODE_AVC; else return HFI_CODEC_DECODE_AVC; case MSM_VIDC_HEVC: case MSM_VIDC_HEIC: - if (inst->domain == MSM_VIDC_ENCODER) + if (is_encode_session(inst)) return HFI_CODEC_ENCODE_HEVC; else return HFI_CODEC_DECODE_HEVC; diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index a741ac0e22..5ffa740142 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -107,9 +107,9 @@ int msm_vidc_querycap(struct msm_vidc_inst *inst, struct v4l2_capability *cap) memset(cap->reserved, 0, sizeof(cap->reserved)); - if (inst->domain == MSM_VIDC_DECODER) + if (is_decode_session(inst)) strlcpy(cap->card, "msm_vidc_decoder", sizeof(cap->card)); - else if (inst->domain == MSM_VIDC_ENCODER) + else if (is_encode_session(inst)) strlcpy(cap->card, "msm_vidc_encoder", sizeof(cap->card)); else return -EINVAL; @@ -119,9 +119,9 @@ int msm_vidc_querycap(struct msm_vidc_inst *inst, struct v4l2_capability *cap) int msm_vidc_enum_fmt(struct msm_vidc_inst *inst, struct v4l2_fmtdesc *f) { - if (inst->domain == MSM_VIDC_DECODER) + if (is_decode_session(inst)) return msm_vdec_enum_fmt(inst, f); - if (inst->domain == MSM_VIDC_ENCODER) + if (is_encode_session(inst)) return msm_venc_enum_fmt(inst, f); return -EINVAL; @@ -184,9 +184,9 @@ int msm_vidc_try_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) { int rc = 0; - if (inst->domain == MSM_VIDC_DECODER) + if (is_decode_session(inst)) rc = msm_vdec_try_fmt(inst, f); - if (inst->domain == MSM_VIDC_ENCODER) + if (is_encode_session(inst)) rc = msm_venc_try_fmt(inst, f); if (rc) @@ -199,9 +199,9 @@ int msm_vidc_s_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f) { int rc = 0; - if (inst->domain == MSM_VIDC_DECODER) + if (is_decode_session(inst)) rc = msm_vdec_s_fmt(inst, f); - if (inst->domain == MSM_VIDC_ENCODER) + if (is_encode_session(inst)) rc = msm_venc_s_fmt(inst, f); if (rc) @@ -662,9 +662,9 @@ int msm_vidc_subscribe_event(struct msm_vidc_inst *inst, i_vpr_h(inst, "%s: type %d id %d\n", __func__, sub->type, sub->id); - if (inst->domain == MSM_VIDC_DECODER) + if (is_decode_session(inst)) rc = msm_vdec_subscribe_event(inst, sub); - if (inst->domain == MSM_VIDC_ENCODER) + if (is_encode_session(inst)) rc = msm_venc_subscribe_event(inst, sub); return rc; diff --git a/driver/vidc/src/msm_vidc_debug.c b/driver/vidc/src/msm_vidc_debug.c index 260a7734df..b7fe86241b 100644 --- a/driver/vidc/src/msm_vidc_debug.c +++ b/driver/vidc/src/msm_vidc_debug.c @@ -579,7 +579,7 @@ static ssize_t inst_info_read(struct file *file, char __user *buf, f = &inst->fmts[OUTPUT_PORT]; cur += write_str(cur, end - cur, "==============================\n"); cur += write_str(cur, end - cur, "INSTANCE: %pK (%s)\n", inst, - inst->domain == MSM_VIDC_ENCODER ? "Encoder" : "Decoder"); + is_encode_session(inst) ? "Encoder" : "Decoder"); cur += write_str(cur, end - cur, "==============================\n"); cur += write_str(cur, end - cur, "core: %pK\n", inst->core); cur += write_str(cur, end - cur, "height: %d\n", f->fmt.pix_mp.height); diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 48930cc482..d2c6cfa24d 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -260,14 +260,14 @@ int msm_vidc_add_buffer_stats(struct msm_vidc_inst *inst, return 0; /* stats applicable only to input & output buffers */ - if (buf->type != MSM_VIDC_BUF_INPUT && buf->type != MSM_VIDC_BUF_OUTPUT) + if (!is_input_buffer(buf->type) && !is_output_buffer(buf->type)) return -EINVAL; /* update start timestamp */ buf->start_time_ms = (ktime_get_ns() / 1000 - inst->initial_time_us) / 1000; /* add buffer stats only in ETB path */ - if (buf->type != MSM_VIDC_BUF_INPUT) + if (!is_input_buffer(buf->type)) return 0; stats = msm_vidc_pool_alloc(inst, MSM_MEM_POOL_BUF_STATS); @@ -297,7 +297,7 @@ int msm_vidc_remove_buffer_stats(struct msm_vidc_inst *inst, return 0; /* stats applicable only to input & output buffers */ - if (buf->type != MSM_VIDC_BUF_INPUT && buf->type != MSM_VIDC_BUF_OUTPUT) + if (!is_input_buffer(buf->type) && !is_output_buffer(buf->type)) return -EINVAL; /* update end timestamp */ @@ -308,7 +308,7 @@ int msm_vidc_remove_buffer_stats(struct msm_vidc_inst *inst, continue; remove_stat = false; - if (buf->type == MSM_VIDC_BUF_INPUT) { + if (is_input_buffer(buf->type)) { /* skip - ebd already updated(multiple input - single output case) */ if (stats->ebd_time_ms) continue; @@ -330,7 +330,7 @@ int msm_vidc_remove_buffer_stats(struct msm_vidc_inst *inst, /* remove entry - no output attached */ remove_stat = !!(stats->flags & MSM_VIDC_STATS_FLAG_NO_OUTPUT); remove_stat |= stats->ebd_time_ms && stats->fbd_time_ms; - } else if (buf->type == MSM_VIDC_BUF_OUTPUT) { + } else if (is_output_buffer(buf->type)) { /* skip - ebd already updated(encoder superframe case) */ if (stats->fbd_time_ms) continue; @@ -1007,7 +1007,7 @@ bool is_hevc_10bit_decode_session(struct msm_vidc_inst *inst) if (colorformat == MSM_VIDC_FMT_TP10C || colorformat == MSM_VIDC_FMT_P010) is10bit = true; - return inst->domain == MSM_VIDC_DECODER && + return is_decode_session(inst) && inst->codec == MSM_VIDC_HEVC && is10bit; } @@ -1552,9 +1552,9 @@ int msm_vidc_num_buffers(struct msm_vidc_inst *inst, struct msm_vidc_buffer *vbuf; struct msm_vidc_buffers *buffers; - if (type == MSM_VIDC_BUF_OUTPUT) { + if (is_output_buffer(type)) { buffers = &inst->buffers.output; - } else if (type == MSM_VIDC_BUF_INPUT) { + } else if (is_input_buffer(type)) { buffers = &inst->buffers.input; } else { i_vpr_e(inst, "%s: invalid buffer type %#x\n", @@ -2142,9 +2142,9 @@ struct msm_vidc_buffer *get_meta_buffer(struct msm_vidc_inst *inst, struct msm_vidc_buffers *buffers; bool found = false; - if (buf->type == MSM_VIDC_BUF_INPUT) { + if (is_input_buffer(buf->type)) { buffers = &inst->buffers.input_meta; - } else if (buf->type == MSM_VIDC_BUF_OUTPUT) { + } else if (is_output_buffer(buf->type)) { buffers = &inst->buffers.output_meta; } else { i_vpr_e(inst, "%s: invalid buffer type %d\n", @@ -4002,7 +4002,7 @@ int msm_vidc_print_inst_info(struct msm_vidc_inst *inst) int i = 0; is_secure = is_secure_session(inst); - is_decode = inst->domain == MSM_VIDC_DECODER; + is_decode = is_decode_session(inst); port = is_decode ? INPUT_PORT : OUTPUT_PORT; width = inst->fmts[port].fmt.pix_mp.width; height = inst->fmts[port].fmt.pix_mp.height; @@ -4319,10 +4319,10 @@ int msm_vidc_flush_buffers(struct msm_vidc_inst *inst, int i; core = inst->core; - if (type == MSM_VIDC_BUF_INPUT) { + if (is_input_buffer(type)) { buffer_type[0] = MSM_VIDC_BUF_INPUT_META; buffer_type[1] = MSM_VIDC_BUF_INPUT; - } else if (type == MSM_VIDC_BUF_OUTPUT) { + } else if (is_output_buffer(type)) { buffer_type[0] = MSM_VIDC_BUF_OUTPUT_META; buffer_type[1] = MSM_VIDC_BUF_OUTPUT; } else { diff --git a/driver/vidc/src/msm_vidc_power.c b/driver/vidc/src/msm_vidc_power.c index 2e2ec7673f..ec481bf4c5 100644 --- a/driver/vidc/src/msm_vidc_power.c +++ b/driver/vidc/src/msm_vidc_power.c @@ -242,7 +242,7 @@ int msm_vidc_scale_buses(struct msm_vidc_inst *inst) inst->capabilities[SUPER_BLOCK].value ? 128 : 64; vote_data->fps = inst->max_rate; - if (inst->domain == MSM_VIDC_ENCODER) { + if (is_encode_session(inst)) { vote_data->domain = MSM_VIDC_ENCODER; vote_data->bitrate = inst->capabilities[BIT_RATE].value; vote_data->rotation = inst->capabilities[ROTATION].value; @@ -260,7 +260,7 @@ int msm_vidc_scale_buses(struct msm_vidc_inst *inst) inst->fmts[INPUT_PORT].fmt.pix_mp.pixelformat, __func__); vote_data->vpss_preprocessing_enabled = inst->capabilities[REQUEST_PREPROCESS].value; - } else if (inst->domain == MSM_VIDC_DECODER) { + } else if (is_decode_session(inst)) { u32 color_format; vote_data->domain = MSM_VIDC_DECODER; diff --git a/driver/vidc/src/msm_vidc_state.c b/driver/vidc/src/msm_vidc_state.c index f10f6412fe..914a6e737f 100644 --- a/driver/vidc/src/msm_vidc_state.c +++ b/driver/vidc/src/msm_vidc_state.c @@ -783,13 +783,13 @@ static int msm_vidc_input_streaming_state(struct msm_vidc_inst *inst, } /* disallow */ - if (buf->type != MSM_VIDC_BUF_INPUT && buf->type != MSM_VIDC_BUF_OUTPUT) { + if (!is_input_buffer(buf->type) && !is_output_buffer(buf->type)) { i_vpr_e(inst, "%s: invalid buf type %u\n", __func__, buf->type); return -EINVAL; } /* defer output port */ - if (buf->type == MSM_VIDC_BUF_OUTPUT) { + if (is_output_buffer(buf->type)) { print_vidc_buffer(VIDC_LOW, "low ", "qbuf deferred", inst, buf); return 0; } @@ -980,13 +980,13 @@ static int msm_vidc_output_streaming_state(struct msm_vidc_inst *inst, } /* disallow */ - if (buf->type != MSM_VIDC_BUF_INPUT && buf->type != MSM_VIDC_BUF_OUTPUT) { + if (!is_input_buffer(buf->type) && !is_output_buffer(buf->type)) { i_vpr_e(inst, "%s: invalid buf type %u\n", __func__, buf->type); return -EINVAL; } /* defer input port */ - if (buf->type == MSM_VIDC_BUF_INPUT) { + if (is_input_buffer(buf->type)) { print_vidc_buffer(VIDC_LOW, "low ", "qbuf deferred", inst, buf); return 0; } @@ -1169,7 +1169,7 @@ static int msm_vidc_streaming_state(struct msm_vidc_inst *inst, } /* disallow */ - if (buf->type != MSM_VIDC_BUF_INPUT && buf->type != MSM_VIDC_BUF_OUTPUT) { + if (!is_input_buffer(buf->type) && !is_output_buffer(buf->type)) { i_vpr_e(inst, "%s: invalid buf type %u\n", __func__, buf->type); return -EINVAL; } From 0d3b2165bdd6e5cce27201dbcce9d5414d32dcf2 Mon Sep 17 00:00:00 2001 From: Maheshwar Ajja Date: Wed, 28 Jun 2023 11:21:06 -0700 Subject: [PATCH 0957/1061] video: driver: iris33: treat NOC error as fatal Treat NOC error (which is a result of pagefault) as fatal error to and get more debug info to resolve the pagefault issue. Change-Id: I3a1cd99fea680a941788d1bc8ea586bf0ff29365 Signed-off-by: Maheshwar Ajja --- driver/variant/iris33/src/msm_vidc_iris33.c | 1 + 1 file changed, 1 insertion(+) diff --git a/driver/variant/iris33/src/msm_vidc_iris33.c b/driver/variant/iris33/src/msm_vidc_iris33.c index 1087e663d6..523f1d13aa 100644 --- a/driver/variant/iris33/src/msm_vidc_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_iris33.c @@ -962,6 +962,7 @@ static int __noc_error_info_iris33(struct msm_vidc_core *core) fail_deassert_xo_reset: fail_assert_xo_reset: + MSM_VIDC_FATAL(true); return rc; } From 5e5d278b912274983a6857709f3e3543e75bb008 Mon Sep 17 00:00:00 2001 From: Dikshita Agarwal Date: Fri, 30 Jun 2023 14:03:04 +0530 Subject: [PATCH 0958/1061] video: driver: remove additional conditional check there is a WARN_ON in place which will print the warning in case of error, hence no need to have additional if check for the same. Change-Id: I09ca91fecd6cb8df4586621bb066754e39576d12 Signed-off-by: Dikshita Agarwal --- driver/vidc/src/msm_vidc_state.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/driver/vidc/src/msm_vidc_state.c b/driver/vidc/src/msm_vidc_state.c index 1752f02ca9..b3e9bc0c82 100644 --- a/driver/vidc/src/msm_vidc_state.c +++ b/driver/vidc/src/msm_vidc_state.c @@ -75,9 +75,6 @@ static int __strict_inst_check(struct msm_vidc_inst *inst, const char *function) WARN_ON(fatal); - if (fatal) - d_vpr_e("%s: strict check failed\n", function); - return fatal ? -EINVAL : 0; } From 4c58e9e29e2148d525171b137878cabb7ca49790 Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Mon, 3 Jul 2023 10:53:21 -0700 Subject: [PATCH 0959/1061] Revert "video: driver: removed delayed unmap attribute" This reverts commit ed9f77c640b4c6edc22b3e18e76208d0f776069a. Change-Id: Ief57fa717bff76db4e017856540f53ae0a559057 Signed-off-by: Darshana Patil --- driver/vidc/src/msm_vidc_memory_ext.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/driver/vidc/src/msm_vidc_memory_ext.c b/driver/vidc/src/msm_vidc_memory_ext.c index 38a7e1b42f..3eeb85d7ff 100644 --- a/driver/vidc/src/msm_vidc_memory_ext.c +++ b/driver/vidc/src/msm_vidc_memory_ext.c @@ -68,6 +68,11 @@ static struct dma_buf_attachment *msm_vidc_dma_buf_attach_ext(struct msm_vidc_co * on the whole buffer size and hence pass skip sync flag. */ attach->dma_map_attrs |= DMA_ATTR_SKIP_CPU_SYNC; + /* + * Get the scatterlist for the given attachment + * Mapping of sg is taken care by map attachment + */ + attach->dma_map_attrs |= DMA_ATTR_DELAYED_UNMAP; if (is_sys_cache_present(core)) attach->dma_map_attrs |= DMA_ATTR_IOMMU_USE_UPSTREAM_HINT; From 5c1e2b8431d7e8f50fb803b30c97b55834dbdec7 Mon Sep 17 00:00:00 2001 From: Ankush Mitra Date: Thu, 22 Jun 2023 13:14:51 +0530 Subject: [PATCH 0960/1061] video: driver: fix residency print implementation Residency print is not working for 2 cases- 1. when the prev session stopped in the middle without setting clk->prev freq to 0, in next session the residency stats for the same clk freq will not come as the start time will be reset to 0 during next session open. 2. when last session close and clk rate not changed to 0 but, before that print residency stats come, then in residency print the residency for the last clk freq will not come. Change-Id: I63a59202ca145e83e0bc129105df0b0182d3cb1e Signed-off-by: Ankush Mitra --- driver/vidc/inc/resources.h | 2 + driver/vidc/src/resources.c | 25 +++++++++-- driver/vidc/src/resources_ext.c | 73 +-------------------------------- 3 files changed, 25 insertions(+), 75 deletions(-) diff --git a/driver/vidc/inc/resources.h b/driver/vidc/inc/resources.h index 99c79248aa..f3d5bf4dcd 100644 --- a/driver/vidc/inc/resources.h +++ b/driver/vidc/inc/resources.h @@ -283,6 +283,8 @@ struct msm_vidc_resources_ops { const char *name, enum msm_vidc_branch_mem_flags flag); int (*clk_print_residency_stats)(struct msm_vidc_core *core); int (*clk_reset_residency_stats)(struct msm_vidc_core *core); + int (*clk_update_residency_stats)( + struct msm_vidc_core *core,struct clock_info *cl, u64 rate); }; const struct msm_vidc_resources_ops *get_resources_ops(void); diff --git a/driver/vidc/src/resources.c b/driver/vidc/src/resources.c index f99222d67f..492c9e27ff 100644 --- a/driver/vidc/src/resources.c +++ b/driver/vidc/src/resources.c @@ -29,6 +29,9 @@ ((a) > (b) ? (a) - (b) < TRIVIAL_BW_THRESHOLD : \ (b) - (a) < TRIVIAL_BW_THRESHOLD) +static struct clock_residency *get_residency_stats(struct clock_info *cl, u64 rate); +static int __update_residency_stats(struct msm_vidc_core *core, + struct clock_info *cl, u64 rate); enum reset_state { INIT = 1, ASSERT, @@ -1164,7 +1167,14 @@ static int reset_residency_stats(struct msm_vidc_core *core, struct clock_info * residency->start_time_us = 0; residency->total_time_us = 0; } - + /* + * During the reset make sure to update start time of the clk prev freq, + * because the prev clk freq might not be 0 so when the next seesion start + * voting from that freq, then those resideny print will not come in stats + */ + residency = get_residency_stats(cl, cl->prev); + if (residency) + residency->start_time_us = ktime_get_ns() / 1000; return rc; } @@ -1188,8 +1198,8 @@ static struct clock_residency *get_residency_stats(struct clock_info *cl, u64 ra return found ? residency : NULL; } -static int update_residency_stats( - struct msm_vidc_core *core, struct clock_info *cl, u64 rate) +static int __update_residency_stats(struct msm_vidc_core *core, + struct clock_info *cl, u64 rate) { struct clock_residency *cur_residency = NULL, *prev_residency = NULL; u64 cur_time_us = 0; @@ -1243,7 +1253,7 @@ static int __set_clk_rate(struct msm_vidc_core *core, struct clock_info *cl, int rc = 0; /* update clock residency stats */ - update_residency_stats(core, cl, rate); + __update_residency_stats(core, cl, rate); /* bail early if requested clk rate is not changed */ if (rate == cl->prev) @@ -1644,6 +1654,12 @@ static int __print_clock_residency_stats(struct msm_vidc_core *core) if (!cl->has_scaling) continue; + /* + * residency for the last clk corner entry will be updated in stats + * only if we call update residency with rate 0 + */ + __update_residency_stats(core, cl, 0); + /* print clock residency stats */ print_residency_stats(core, cl); } @@ -1687,6 +1703,7 @@ static const struct msm_vidc_resources_ops res_ops = { .clk_disable = __disable_unprepare_clock, .clk_print_residency_stats = __print_clock_residency_stats, .clk_reset_residency_stats = __reset_clock_residency_stats, + .clk_update_residency_stats = __update_residency_stats, }; const struct msm_vidc_resources_ops *get_resources_ops(void) diff --git a/driver/vidc/src/resources_ext.c b/driver/vidc/src/resources_ext.c index a9e82fecaf..cb9f30eaee 100644 --- a/driver/vidc/src/resources_ext.c +++ b/driver/vidc/src/resources_ext.c @@ -291,75 +291,6 @@ static int __acquire_regulators(struct msm_vidc_core *core) return rc; } -static struct clock_residency *get_residency_stats(struct clock_info *cl, u64 rate) -{ - struct clock_residency *residency = NULL; - bool found = false; - - if (!cl) { - d_vpr_e("%s: invalid params\n", __func__); - return NULL; - } - - list_for_each_entry(residency, &cl->residency_list, list) { - if (residency->rate == rate) { - found = true; - break; - } - } - - return found ? residency : NULL; -} - -static int update_residency_stats( - struct msm_vidc_core *core, struct clock_info *cl, u64 rate) -{ - struct clock_residency *cur_residency = NULL, *prev_residency = NULL; - u64 cur_time_us = 0; - int rc = 0; - - /* skip update if high or stats logs not enabled */ - if (!(msm_vidc_debug & (VIDC_HIGH | VIDC_STAT))) - return 0; - - /* skip update if scaling not supported */ - if (!cl->has_scaling) - return 0; - - /* skip update if rate not changed */ - if (rate == cl->prev) - return 0; - - /* get current time in ns */ - cur_time_us = ktime_get_ns() / 1000; - - /* update previous rate residency end or total time */ - prev_residency = get_residency_stats(cl, cl->prev); - if (prev_residency) { - if (prev_residency->start_time_us) - prev_residency->total_time_us += cur_time_us - prev_residency->start_time_us; - - /* reset start time us */ - prev_residency->start_time_us = 0; - } - - /* clk disable case - no need to update new entry */ - if (rate == 0) - return 0; - - /* check if rate entry is present */ - cur_residency = get_residency_stats(cl, rate); - if (!cur_residency) { - d_vpr_e("%s: entry not found. rate %llu\n", __func__, rate); - return -EINVAL; - } - - /* update residency start time for current rate/freq */ - cur_residency->start_time_us = cur_time_us; - - return rc; -} - #ifdef CONFIG_MSM_MMRM static int __set_clk_rate(struct msm_vidc_core *core, struct clock_info *cl, u64 rate) @@ -375,7 +306,7 @@ static int __set_clk_rate(struct msm_vidc_core *core, struct clock_info *cl, } /* update clock residency stats */ - update_residency_stats(core, cl, rate); + call_res_op(core, clk_update_residency_stats, core, cl, rate); /* * This conversion is necessary since we are scaling clock values based on @@ -423,7 +354,7 @@ static int __set_clk_rate(struct msm_vidc_core *core, struct clock_info *cl, int rc = 0; /* update clock residency stats */ - update_residency_stats(core, cl, rate); + call_res_op(core, clk_update_residency_stats, core, cl, rate); /* * This conversion is necessary since we are scaling clock values based on From c484af4e692990e69d4c0021ec8cbd2e2c6ec2d9 Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Tue, 13 Jun 2023 19:26:00 +0530 Subject: [PATCH 0961/1061] video: driver: remove duplicate static array inclusion from header pineapple_technology.h contains multiple static array and it is getting included from msm_vidc_bus.c & msm_vidc_clock.c files. So in generated build is having 2 copies of static arrays in code segment. So added changes to avoid duplication in generated bin. Change-Id: Ifcfa07331e868440d033d2c7d65555810ad4d1b3 Signed-off-by: Govindaraj Rajagopal --- .../pineapple/inc/pineapple_technology.h | 239 ------------------ .../variant/iris33/src/msm_vidc_bus_iris33.c | 128 ++++++++-- .../iris33/src/msm_vidc_clock_iris33.c | 192 +++++++++++--- 3 files changed, 257 insertions(+), 302 deletions(-) delete mode 100644 driver/platform/pineapple/inc/pineapple_technology.h diff --git a/driver/platform/pineapple/inc/pineapple_technology.h b/driver/platform/pineapple/inc/pineapple_technology.h deleted file mode 100644 index 79a79ccadb..0000000000 --- a/driver/platform/pineapple/inc/pineapple_technology.h +++ /dev/null @@ -1,239 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights reserved. - */ - -#include "perf_static_model.h" - -#define ENABLE_FINEBITRATE_SUBUHD60 0 - -/* - * Chipset Generation Technology: SW/FW overhead profiling - * need update with new numbers - */ -static u32 frequency_table_pineapple[2][6] = { - /* //make lowsvs_D1 as invalid; */ - {533, 480, 435, 380, 300, 196}, - {840, 720, 652, 570, 450, 294}, -}; - - /* - * TODO Move to pineapple.c - * TODO Replace hardcoded values with - * ENCODER_VPP_TARGET_CLK_PER_MB_PINEAPPLE in CPP file. - */ - -/* Tensilica cycles profiled by FW team in lanai device Feb 2022 */ -#define DECODER_VPP_FW_OVERHEAD_PINEAPPLE_AV1D ((80000*3)/2) -#define DECODER_VPP_FW_OVERHEAD_PINEAPPLE_NONAV1D ((60000*3)/2) - - /* Tensilica cycles */ -#define DECODER_VPP_FW_OVERHEAD_PINEAPPLE (0) - -/* Tensilica cycles; this is measured in Lahaina 1stage with FW profiling */ -#define DECODER_VPPVSP1STAGE_FW_OVERHEAD_PINEAPPLE (93000) - -#define DECODER_VSP_FW_OVERHEAD_PINEAPPLE \ - (DECODER_VPPVSP1STAGE_FW_OVERHEAD_PINEAPPLE - DECODER_VPP_FW_OVERHEAD_PINEAPPLE) - -/* Tensilica cycles; encoder has ARP register */ -#define ENCODER_VPP_FW_OVERHEAD_PINEAPPLE (69000*3/2) - -#define ENCODER_VPPVSP1STAGE_FW_OVERHEAD_PINEAPPLE \ - (ENCODER_VPP_FW_OVERHEAD_PINEAPPLE + DECODER_VSP_FW_OVERHEAD_PINEAPPLE) - -#define DECODER_SW_OVERHEAD_PINEAPPLE (489583) -#define ENCODER_SW_OVERHEAD_PINEAPPLE (489583) - -/* Video IP Core Technology: pipefloor and pipe penlaty */ -static u32 encoder_vpp_target_clk_per_mb_pineapple[2] = {320, 675}; -static u32 decoder_vpp_target_clk_per_mb_pineapple = 200; - -/* - * These pipe penalty numbers only applies to 4 pipe - * For 2pipe and 1pipe, these numbers need recalibrate - */ -static u32 pipe_penalty_pineapple[3][3] = { - /* NON AV1 */ - {1059, 1059, 1059}, - /* AV1 RECOMMENDED TILE 1080P_V2XH1, UHD_V2X2, 8KUHD_V8X2 */ - {1410, 1248, 1226}, - /* AV1 YOUTUBE/NETFLIX TILE 1080P_V4XH2_V4X1, UHD_V8X4_V8X1, 8KUHD_V8X8_V8X1 */ - {2039, 2464, 1191}, -}; - -/* - * Video IP Core Technology: bitrate constraint - * HW limit bitrate table (these values are measured end to end fw/sw impacts are also considered) - * TODO Can we convert to Cycles/MB? This will remove DIVISION. - */ -static u32 bitrate_table_pineapple_2stage_fp[5][10] = { - /* h264 cavlc */ - {0, 220, 220, 220, 220, 220, 220, 220, 220, 220}, - /* h264 cabac */ - {0, 140, 150, 160, 175, 190, 190, 190, 190, 190}, - /* h265 */ - {90, 140, 160, 180, 190, 200, 200, 200, 200, 200}, - /* vp9 */ - {90, 90, 90, 90, 90, 90, 90, 90, 90, 90}, - /* av1 */ - {130, 130, 120, 120, 120, 120, 120, 120, 120, 120}, -}; - -/* HW limit bitrate table (these values are measured end to end fw/sw impacts are also considered) */ -static u32 bitrate_table_pineapple_1stage_fp[5][10] = { /* 1-stage assume IPPP */ - /* h264 cavlc */ - {0, 220, 220, 220, 220, 220, 220, 220, 220, 220}, - /* h264 cabac */ - {0, 110, 150, 150, 150, 150, 150, 150, 150, 150}, - /* h265 */ - {0, 140, 150, 150, 150, 150, 150, 150, 150, 150}, - /* vp9 */ - {0, 70, 70, 70, 70, 70, 70, 70, 70, 70}, - /* av1 */ - {0, 100, 100, 100, 100, 100, 100, 100, 100, 100}, -}; - -/* rec pwc and power bitrate table */ -static u32 bitrate_table_pineapple_rec_fp[5][10] = { - /* rec. worst bitrate based on bitrate table */ -#if ENABLE_FINEBITRATE_SUBUHD60 - /* h264 cavlc */ - {0, 168, 150, 120, 100, 90, 50, 32, 20, 14}, - /* h264 cabac 8bit */ - {0, 134, 109, 84, 67, 56, 35, 23, 14, 10}, - /* h265 10bit assumption */ - {70, 140, 116, 92, 74, 62, 39, 25, 16, 11}, - /* vp9 (profiled content from youtube and nflx) */ - {70, 70, 65, 55, 45, 35, 20, 8, 6, 5}, - /* av1 (profiled content from youtube and nflx) */ - {100, 100, 85, 70, 55, 30, 15, 5, 5, 5}, -#else - /* h264 cavlc */ - {0, 168, 150, 120, 100, 90, 90, 90, 90, 90}, - /* h264 cabac 8bit */ - {0, 134, 109, 84, 67, 56, 56, 56, 56, 56}, - /* h265 10bit assumption */ - {70, 140, 116, 92, 74, 62, 62, 62, 62, 62}, - /* vp9 */ - {70, 70, 65, 55, 45, 35, 35, 35, 35, 35}, - /* av1 */ - {100, 100, 85, 70, 55, 50, 50, 50, 50, 50}, -#endif -}; - -static u32 input_bitrate_fp; - -/* 8KUHD60; UHD240; 1080p960 with B */ -static u32 fp_pixel_count_bar0 = 3840 * 2160 * 240; -/* 8KUHD60; UHD240; 1080p960 without B */ -static u32 fp_pixel_count_bar1 = 3840 * 2160 * 240; -/* 1080p720 */ -static u32 fp_pixel_count_bar2 = 3840 * 2160 * 180; -/* UHD120 */ -static u32 fp_pixel_count_bar3 = 3840 * 2160 * 120; -/* UHD90 */ -static u32 fp_pixel_count_bar4 = 3840 * 2160 * 90; -/* UHD60 */ -static u32 fp_pixel_count_bar5 = 3840 * 2160 * 60; -/* UHD30; FHD120; HD240 */ -static u32 fp_pixel_count_bar6 = 3840 * 2160 * 30; -/* FHD60 */ -static u32 fp_pixel_count_bar7 = 1920 * 1080 * 60; -/* FHD30 */ -static u32 fp_pixel_count_bar8 = 1920 * 1080 * 30; -/* HD30 */ -static u32 fp_pixel_count_bar9 = 1280 * 720 * 30; - -static u32 codec_encoder_gop_complexity_table_fp[8][3]; -static u32 codec_mbspersession_pineaple; - -static u32 cr_table_basic_pineapple[7][4] = { - {1920, 1080, 20, 40}, - {3840, 2160, 42, 84}, - {4096, 2160, 44, 88}, - {4096, 2304, 48, 96}, - {1280, 720, 7, 14}, - {2560, 1440, 32, 64}, - {7680, 4320, 84, 168}, -}; - -/* 100x */ -static u32 dpbopb_ubwc30_cr_table_cratio_pineapple[7][12] = { - {237, 399, 272, 137, 225, 158, 185, 259, 203, 138, 167, 152}, - {269, 404, 302, 202, 367, 238, 210, 299, 232, 134, 181, 149}, - {269, 404, 302, 202, 367, 238, 210, 299, 232, 134, 181, 149}, - {269, 404, 302, 202, 367, 238, 210, 299, 232, 134, 181, 149}, - {237, 399, 272, 137, 225, 158, 185, 259, 203, 138, 167, 152}, - {269, 404, 302, 202, 367, 238, 210, 299, 232, 134, 181, 149}, - {269, 404, 302, 202, 367, 238, 210, 299, 232, 134, 181, 149}, -}; - -/* 100x */ -static u32 rpb_ubwc30_cr_table_cratio_pineapple[7][12] = { - {193, 294, 218, 135, 214, 155, 175, 241, 191, 139, 162, 149}, - {285, 406, 316, 207, 373, 243, 201, 280, 221, 139, 177, 152}, - {285, 406, 316, 207, 373, 243, 201, 280, 221, 139, 177, 152}, - {285, 406, 316, 207, 373, 243, 201, 280, 221, 139, 177, 152}, - {193, 294, 218, 135, 214, 155, 175, 241, 191, 139, 162, 149}, - {285, 406, 316, 207, 373, 243, 201, 280, 221, 139, 177, 152}, - {285, 406, 316, 207, 373, 243, 201, 280, 221, 139, 177, 152}, -}; - -/* 100x */ -static u32 ipblossy_ubwc30_cr_table_cratio_pineapple[7][12] = { - {215, 215, 215, 174, 174, 174, 266, 266, 266, 231, 231, 231}, - {254, 254, 254, 219, 219, 219, 292, 292, 292, 249, 249, 249}, - {254, 254, 254, 219, 219, 219, 292, 292, 292, 249, 249, 249}, - {254, 254, 254, 219, 219, 219, 292, 292, 292, 249, 249, 249}, - {215, 215, 215, 174, 174, 174, 266, 266, 266, 231, 231, 231}, - {254, 254, 254, 219, 219, 219, 292, 292, 292, 249, 249, 249}, - {254, 254, 254, 219, 219, 219, 292, 292, 292, 249, 249, 249}, -}; - -/* 100x */ -static u32 ipblossless_ubwc30_cr_table_cratio_pineapple[7][12] = { - {185, 215, 194, 147, 178, 159, 162, 181, 169, 138, 161, 146}, - {186, 217, 195, 151, 183, 161, 164, 182, 170, 140, 168, 148}, - {186, 217, 195, 151, 183, 161, 164, 182, 170, 140, 168, 148}, - {186, 217, 195, 151, 183, 161, 164, 182, 170, 140, 168, 148}, - {185, 215, 194, 147, 178, 159, 162, 181, 169, 138, 161, 146}, - {186, 217, 195, 151, 183, 161, 164, 182, 170, 140, 168, 148}, - {186, 217, 195, 151, 183, 161, 164, 182, 170, 140, 168, 148}, -}; - -/* 100x */ -static u32 en_original_compression_factor_rgba_pwd_pineapple = 243; -/* 100x */ -static u32 en_original_compression_factor_rgba_avg_pineapple = 454; - -static u32 av1_num_tiles_pineapple[7][3] = { - {2, 1, 1}, - {4, 2, 2}, - {4, 2, 2}, - {4, 2, 2}, - {1, 1, 1}, - {2, 1, 1}, - {16, 4, 4}, -}; - -/* H I J K L M N O P - * TotalW Total R Frequency Write Read - * Name B b P B b P B b P - * I3B4b1P 0.5 1.875 3 4 1 1 0 1 2 2 1 - * I1B2b1P 0.5 1.75 1 2 1 1 0 1 2 2 1 - * IbP 0.5 1.5 0 1 1 1 0 1 2 2 1 - * IPP 1 1 0 0 1 1 0 1 2 2 1 - * P 1 1 0 0 1 1 0 1 2 2 1 - * smallB 0 2 0 1 0 1 0 1 2 2 1 - * bigB 1 2 1 0 0 1 0 1 2 2 1 - * - * Total W = SUMPRODUCT(H16:J16, K16 : M16) / SUM(H16:J16) - * Total R = SUMPRODUCT(H16:J16, N16 : P16) / SUM(H16:J16) -*/ - -/* 1000x */ -static u32 pineapple_en_readfactor[8] = {1000, 1500, 1750, 1875, 1000, 2000, 2000, 1000}; -/* 1000x */ -static u32 pineapple_en_writefactor[8] = {1000, 500, 500, 500, 1000, 0, 1000, 1000}; -static u32 pineapple_en_frame_num_parallel = 1; diff --git a/driver/variant/iris33/src/msm_vidc_bus_iris33.c b/driver/variant/iris33/src/msm_vidc_bus_iris33.c index 4339c85abe..a21bb5fc64 100644 --- a/driver/variant/iris33/src/msm_vidc_bus_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_bus_iris33.c @@ -3,10 +3,90 @@ * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. */ -#include "pineapple_technology.h" +#include "perf_static_model.h" #include "msm_vidc_debug.h" -u32 calculate_number_lcus_pineapple(u32 width, u32 height, u32 lcu_size) +/* 100x */ +static u32 dpbopb_ubwc30_cr_table_cratio_iris33[7][12] = { + {237, 399, 272, 137, 225, 158, 185, 259, 203, 138, 167, 152}, + {269, 404, 302, 202, 367, 238, 210, 299, 232, 134, 181, 149}, + {269, 404, 302, 202, 367, 238, 210, 299, 232, 134, 181, 149}, + {269, 404, 302, 202, 367, 238, 210, 299, 232, 134, 181, 149}, + {237, 399, 272, 137, 225, 158, 185, 259, 203, 138, 167, 152}, + {269, 404, 302, 202, 367, 238, 210, 299, 232, 134, 181, 149}, + {269, 404, 302, 202, 367, 238, 210, 299, 232, 134, 181, 149}, +}; + +/* 100x */ +static u32 rpb_ubwc30_cr_table_cratio_iris33[7][12] = { + {193, 294, 218, 135, 214, 155, 175, 241, 191, 139, 162, 149}, + {285, 406, 316, 207, 373, 243, 201, 280, 221, 139, 177, 152}, + {285, 406, 316, 207, 373, 243, 201, 280, 221, 139, 177, 152}, + {285, 406, 316, 207, 373, 243, 201, 280, 221, 139, 177, 152}, + {193, 294, 218, 135, 214, 155, 175, 241, 191, 139, 162, 149}, + {285, 406, 316, 207, 373, 243, 201, 280, 221, 139, 177, 152}, + {285, 406, 316, 207, 373, 243, 201, 280, 221, 139, 177, 152}, +}; + +/* 100x */ +static u32 ipblossy_ubwc30_cr_table_cratio_iris33[7][12] = { + {215, 215, 215, 174, 174, 174, 266, 266, 266, 231, 231, 231}, + {254, 254, 254, 219, 219, 219, 292, 292, 292, 249, 249, 249}, + {254, 254, 254, 219, 219, 219, 292, 292, 292, 249, 249, 249}, + {254, 254, 254, 219, 219, 219, 292, 292, 292, 249, 249, 249}, + {215, 215, 215, 174, 174, 174, 266, 266, 266, 231, 231, 231}, + {254, 254, 254, 219, 219, 219, 292, 292, 292, 249, 249, 249}, + {254, 254, 254, 219, 219, 219, 292, 292, 292, 249, 249, 249}, +}; + +/* 100x */ +static u32 ipblossless_ubwc30_cr_table_cratio_iris33[7][12] = { + {185, 215, 194, 147, 178, 159, 162, 181, 169, 138, 161, 146}, + {186, 217, 195, 151, 183, 161, 164, 182, 170, 140, 168, 148}, + {186, 217, 195, 151, 183, 161, 164, 182, 170, 140, 168, 148}, + {186, 217, 195, 151, 183, 161, 164, 182, 170, 140, 168, 148}, + {185, 215, 194, 147, 178, 159, 162, 181, 169, 138, 161, 146}, + {186, 217, 195, 151, 183, 161, 164, 182, 170, 140, 168, 148}, + {186, 217, 195, 151, 183, 161, 164, 182, 170, 140, 168, 148}, +}; + +/* 100x */ +static u32 en_original_compression_factor_rgba_pwd_iris33 = 243; +/* 100x */ +static u32 en_original_compression_factor_rgba_avg_iris33 = 454; + +static u32 av1_num_tiles_iris33[7][3] = { + {2, 1, 1}, + {4, 2, 2}, + {4, 2, 2}, + {4, 2, 2}, + {1, 1, 1}, + {2, 1, 1}, + {16, 4, 4}, +}; + +/* H I J K L M N O P + * TotalW Total R Frequency Write Read + * Name B b P B b P B b P + * I3B4b1P 0.5 1.875 3 4 1 1 0 1 2 2 1 + * I1B2b1P 0.5 1.75 1 2 1 1 0 1 2 2 1 + * IbP 0.5 1.5 0 1 1 1 0 1 2 2 1 + * IPP 1 1 0 0 1 1 0 1 2 2 1 + * P 1 1 0 0 1 1 0 1 2 2 1 + * smallB 0 2 0 1 0 1 0 1 2 2 1 + * bigB 1 2 1 0 0 1 0 1 2 2 1 + * + * Total W = SUMPRODUCT(H16:J16, K16 : M16) / SUM(H16:J16) + * Total R = SUMPRODUCT(H16:J16, N16 : P16) / SUM(H16:J16) + */ + +/* 1000x */ +static u32 pineapple_en_readfactor[8] = {1000, 1500, 1750, 1875, 1000, 2000, 2000, 1000}; +/* 1000x */ +static u32 pineapple_en_writefactor[8] = {1000, 500, 500, 500, 1000, 0, 1000, 1000}; +static u32 pineapple_en_frame_num_parallel = 1; + +u32 calculate_number_lcus_iris33(u32 width, u32 height, u32 lcu_size) { u32 mbs_width = (width % lcu_size) ? (width / lcu_size + 1) : (width / lcu_size); @@ -16,7 +96,7 @@ u32 calculate_number_lcus_pineapple(u32 width, u32 height, u32 lcu_size) return mbs_width * mbs_height; } -u32 calculate_number_ubwctiles_pineapple( +u32 calculate_number_ubwctiles_iris33( u32 width, u32 height, u32 tile_w, u32 tile_h) { u32 tiles_width = (width % tile_w) ? @@ -76,11 +156,11 @@ u32 get_compression_factors(struct compression_factors *compression_factor, if (codec_input.decoder_or_encoder == CODEC_DECODER) { compression_factor->dpb_cf_y = - dpbopb_ubwc30_cr_table_cratio_pineapple[cr_index_entry][cr_index_y]; + dpbopb_ubwc30_cr_table_cratio_iris33[cr_index_entry][cr_index_y]; compression_factor->dpb_cf_cbcr = - dpbopb_ubwc30_cr_table_cratio_pineapple[cr_index_entry][cr_index_c]; + dpbopb_ubwc30_cr_table_cratio_iris33[cr_index_entry][cr_index_c]; compression_factor->opb_cf_ycbcr = - dpbopb_ubwc30_cr_table_cratio_pineapple[cr_index_entry][cr_index_uni]; + dpbopb_ubwc30_cr_table_cratio_iris33[cr_index_entry][cr_index_uni]; if ((codec_input.regression_mode == 3) && /* input cr numbers from interface */ @@ -97,21 +177,21 @@ u32 get_compression_factors(struct compression_factors *compression_factor, */ if (frame_width < 3840) { compression_factor->ipb_cr = - ipblossless_ubwc30_cr_table_cratio_pineapple[cr_index_entry][cr_index_uni]; + ipblossless_ubwc30_cr_table_cratio_iris33[cr_index_entry][cr_index_uni]; compression_factor->ipb_cr_y = - ipblossless_ubwc30_cr_table_cratio_pineapple[cr_index_entry][cr_index_y]; + ipblossless_ubwc30_cr_table_cratio_iris33[cr_index_entry][cr_index_y]; } else { compression_factor->ipb_cr = - ipblossy_ubwc30_cr_table_cratio_pineapple[cr_index_entry][cr_index_uni]; + ipblossy_ubwc30_cr_table_cratio_iris33[cr_index_entry][cr_index_uni]; compression_factor->ipb_cr_y = - ipblossy_ubwc30_cr_table_cratio_pineapple[cr_index_entry][cr_index_y]; + ipblossy_ubwc30_cr_table_cratio_iris33[cr_index_entry][cr_index_y]; } compression_factor->dpb_cf_y = - rpb_ubwc30_cr_table_cratio_pineapple[cr_index_entry][cr_index_y]; + rpb_ubwc30_cr_table_cratio_iris33[cr_index_entry][cr_index_y]; compression_factor->dpb_cf_cbcr = - rpb_ubwc30_cr_table_cratio_pineapple[cr_index_entry][cr_index_c]; + rpb_ubwc30_cr_table_cratio_iris33[cr_index_entry][cr_index_c]; if ((codec_input.regression_mode == 3) && /* input cr from interface */ @@ -246,7 +326,7 @@ static int calculate_bandwidth_decoder_iris33( } lcu_per_frame = - calculate_number_lcus_pineapple(frame_width, frame_height, frame_lcu_size); + calculate_number_lcus_iris33(frame_width, frame_height, frame_lcu_size); target_bitrate = (u32)(codec_input.bitrate_mbps); /* Mbps */ @@ -254,11 +334,11 @@ static int calculate_bandwidth_decoder_iris33( ubwc_tile_h = (codec_input.bitdepth == CODEC_BITDEPTH_8) ? 8 : 4; frame420_y_bw_linear_8bpp = - ((calculate_number_ubwctiles_pineapple(frame_width, frame_height, 32, 8) * + ((calculate_number_ubwctiles_iris33(frame_width, frame_height, 32, 8) * 256 * codec_input.frame_rate + 999) / 1000 + 999) / 1000; frame420_y_bw_no_ubwc_tile_10bpp = - ((calculate_number_ubwctiles_pineapple(frame_width, frame_height, 48, 4) * + ((calculate_number_ubwctiles_iris33(frame_width, frame_height, 48, 4) * 256 * codec_input.frame_rate + 999) / 1000 + 999) / 1000; frame420_y_bw_linear_10bpp = ((frame_width * frame_height * codec_input.frame_rate * 2 + 999) / 1000 + 999) / 1000; @@ -304,7 +384,7 @@ static int calculate_bandwidth_decoder_iris33( else av1tile_complexity = 0; - av1_tile_numbers = av1_num_tiles_pineapple[av1tile_index_entry][av1tile_complexity]; + av1_tile_numbers = av1_num_tiles_iris33[av1tile_index_entry][av1tile_complexity]; /* these bw can be ignored */ av1_collated_seg_buffer_rd_wr = @@ -618,7 +698,7 @@ static int calculate_bandwidth_encoder_iris33( } lcu_per_frame = - calculate_number_lcus_pineapple(frame_width, frame_height, frame_lcu_size); + calculate_number_lcus_iris33(frame_width, frame_height, frame_lcu_size); bse_tlb_byte_per_lcu = 16; /* TODO Should be in common declaration */ @@ -630,16 +710,16 @@ static int calculate_bandwidth_encoder_iris33( /* yuv */ if (codec_input.ipb_yuvrgb == 0) { frame420_y_bw_linear_8bpp = - ((calculate_number_ubwctiles_pineapple(frame_width, frame_height, + ((calculate_number_ubwctiles_iris33(frame_width, frame_height, 32, 8) * 256 * codec_input.frame_rate + 999) / 1000 + 999) / 1000; } else { /* RGBA */ frame420_y_bw_linear_8bpp = - ((calculate_number_ubwctiles_pineapple(frame_width, frame_height, + ((calculate_number_ubwctiles_iris33(frame_width, frame_height, 6, 4) * 256 * codec_input.frame_rate + 999) / 1000 + 999) / 1000; } frame420_y_bw_no_ubwc_tile_10bpp = - ((calculate_number_ubwctiles_pineapple(frame_width, frame_height, 48, 4) * + ((calculate_number_ubwctiles_iris33(frame_width, frame_height, 48, 4) * 256 * codec_input.frame_rate + 999) / 1000 + 999) / 1000; frame420_y_bw_linear_10bpp = ((frame_width * frame_height * @@ -854,13 +934,13 @@ static int calculate_bandwidth_encoder_iris33( if (codec_input.complexity_setting == 0) /* pwc */ codec_output->ipb_rd_total_noc = (large_bw_calculation_fp * 100 + - en_original_compression_factor_rgba_pwd_pineapple - 1) / - en_original_compression_factor_rgba_pwd_pineapple; + en_original_compression_factor_rgba_pwd_iris33 - 1) / + en_original_compression_factor_rgba_pwd_iris33; else codec_output->ipb_rd_total_noc = (large_bw_calculation_fp * 100 + - en_original_compression_factor_rgba_avg_pineapple - 1) / - en_original_compression_factor_rgba_avg_pineapple; + en_original_compression_factor_rgba_avg_iris33 - 1) / + en_original_compression_factor_rgba_avg_iris33; } } } else { diff --git a/driver/variant/iris33/src/msm_vidc_clock_iris33.c b/driver/variant/iris33/src/msm_vidc_clock_iris33.c index cbc617c10b..9e894f8ce8 100644 --- a/driver/variant/iris33/src/msm_vidc_clock_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_clock_iris33.c @@ -3,10 +3,124 @@ * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. */ -#include "pineapple_technology.h" +#include "perf_static_model.h" #include "msm_vidc_debug.h" -static u32 calculate_number_mbs_pineapple(u32 width, u32 height, u32 lcu_size) +#define ENABLE_FINEBITRATE_SUBUHD60 0 + +static u32 codec_encoder_gop_complexity_table_fp[8][3]; +static u32 codec_mbspersession_iris33; +static u32 input_bitrate_fp; + +/* + * Chipset Generation Technology: SW/FW overhead profiling + * need update with new numbers + */ +static u32 frequency_table_iris33[2][6] = { + /* //make lowsvs_D1 as invalid; */ + {533, 480, 435, 380, 300, 196}, + {840, 720, 652, 570, 450, 294}, +}; + + /* + * TODO Move to pineapple.c + * TODO Replace hardcoded values with + * ENCODER_VPP_TARGET_CLK_PER_MB_IRIS33 in CPP file. + */ + +/* Tensilica cycles profiled by FW team in lanai device Feb 2022 */ +#define DECODER_VPP_FW_OVERHEAD_IRIS33_AV1D ((80000*3)/2) +#define DECODER_VPP_FW_OVERHEAD_IRIS33_NONAV1D ((60000*3)/2) + + /* Tensilica cycles */ +#define DECODER_VPP_FW_OVERHEAD_IRIS33 (0) + +/* Tensilica cycles; this is measured in Lahaina 1stage with FW profiling */ +#define DECODER_VPPVSP1STAGE_FW_OVERHEAD_IRIS33 (93000) + +#define DECODER_VSP_FW_OVERHEAD_IRIS33 \ + (DECODER_VPPVSP1STAGE_FW_OVERHEAD_IRIS33 - DECODER_VPP_FW_OVERHEAD_IRIS33) + +/* Tensilica cycles; encoder has ARP register */ +#define ENCODER_VPP_FW_OVERHEAD_IRIS33 (69000*3/2) + +#define ENCODER_VPPVSP1STAGE_FW_OVERHEAD_IRIS33 \ + (ENCODER_VPP_FW_OVERHEAD_IRIS33 + DECODER_VSP_FW_OVERHEAD_IRIS33) + +#define DECODER_SW_OVERHEAD_IRIS33 (489583) +#define ENCODER_SW_OVERHEAD_IRIS33 (489583) + +/* Video IP Core Technology: pipefloor and pipe penlaty */ +// static u32 encoder_vpp_target_clk_per_mb_iris33[2] = {320, 675}; +static u32 decoder_vpp_target_clk_per_mb_iris33 = 200; + +/* + * These pipe penalty numbers only applies to 4 pipe + * For 2pipe and 1pipe, these numbers need recalibrate + */ +static u32 pipe_penalty_iris33[3][3] = { + /* NON AV1 */ + {1059, 1059, 1059}, + /* AV1 RECOMMENDED TILE 1080P_V2XH1, UHD_V2X2, 8KUHD_V8X2 */ + {1410, 1248, 1226}, + /* AV1 YOUTUBE/NETFLIX TILE 1080P_V4XH2_V4X1, UHD_V8X4_V8X1, 8KUHD_V8X8_V8X1 */ + {2039, 2464, 1191}, +}; + +/* + * Video IP Core Technology: bitrate constraint + * HW limit bitrate table (these values are measured end to end fw/sw impacts are also considered) + * TODO Can we convert to Cycles/MB? This will remove DIVISION. + */ +static u32 bitrate_table_iris33_2stage_fp[5][10] = { + /* h264 cavlc */ + {0, 220, 220, 220, 220, 220, 220, 220, 220, 220}, + /* h264 cabac */ + {0, 140, 150, 160, 175, 190, 190, 190, 190, 190}, + /* h265 */ + {90, 140, 160, 180, 190, 200, 200, 200, 200, 200}, + /* vp9 */ + {90, 90, 90, 90, 90, 90, 90, 90, 90, 90}, + /* av1 */ + {130, 130, 120, 120, 120, 120, 120, 120, 120, 120}, +}; + +/* HW limit bitrate table (these values are measured end to end fw/sw impacts are also considered) */ +static u32 bitrate_table_iris33_1stage_fp[5][10] = { /* 1-stage assume IPPP */ + /* h264 cavlc */ + {0, 220, 220, 220, 220, 220, 220, 220, 220, 220}, + /* h264 cabac */ + {0, 110, 150, 150, 150, 150, 150, 150, 150, 150}, + /* h265 */ + {0, 140, 150, 150, 150, 150, 150, 150, 150, 150}, + /* vp9 */ + {0, 70, 70, 70, 70, 70, 70, 70, 70, 70}, + /* av1 */ + {0, 100, 100, 100, 100, 100, 100, 100, 100, 100}, +}; + +/* 8KUHD60; UHD240; 1080p960 with B */ +static u32 fp_pixel_count_bar0 = 3840 * 2160 * 240; +/* 8KUHD60; UHD240; 1080p960 without B */ +static u32 fp_pixel_count_bar1 = 3840 * 2160 * 240; +/* 1080p720 */ +static u32 fp_pixel_count_bar2 = 3840 * 2160 * 180; +/* UHD120 */ +static u32 fp_pixel_count_bar3 = 3840 * 2160 * 120; +/* UHD90 */ +static u32 fp_pixel_count_bar4 = 3840 * 2160 * 90; +/* UHD60 */ +static u32 fp_pixel_count_bar5 = 3840 * 2160 * 60; +/* UHD30; FHD120; HD240 */ +static u32 fp_pixel_count_bar6 = 3840 * 2160 * 30; +/* FHD60 */ +static u32 fp_pixel_count_bar7 = 1920 * 1080 * 60; +/* FHD30 */ +static u32 fp_pixel_count_bar8 = 1920 * 1080 * 30; +/* HD30 */ +static u32 fp_pixel_count_bar9 = 1280 * 720 * 30; + +static u32 calculate_number_mbs_iris33(u32 width, u32 height, u32 lcu_size) { u32 mbs_width = (width % lcu_size) ? (width / lcu_size + 1) : (width / lcu_size); @@ -215,57 +329,57 @@ static int calculate_vsp_min_freq(struct api_calculation_input codec_input, * TODO : Reduce these conditions by removing the zero entries from Bitrate table. */ - vsp_hw_min_frequency = frequency_table_pineapple[0][2] * + vsp_hw_min_frequency = frequency_table_iris33[0][2] * input_bitrate_fp * 1000; if (codec_input.codec == CODEC_AV1) - vsp_hw_min_frequency = frequency_table_pineapple[0][1] * + vsp_hw_min_frequency = frequency_table_iris33[0][1] * input_bitrate_fp * 1000; if ((codec_input.codec == CODEC_H264) || (codec_input.codec == CODEC_H264_CAVLC)) { - vsp_hw_min_frequency = (frequency_table_pineapple[0][2] * 1000 + + vsp_hw_min_frequency = (frequency_table_iris33[0][2] * 1000 + (fw_sw_vsp_offset - 1)); vsp_hw_min_frequency = DIV_ROUND_UP(vsp_hw_min_frequency, fw_sw_vsp_offset); } else { if (codec_input.vsp_vpp_mode == CODEC_VSPVPP_MODE_2S) { vsp_hw_min_frequency = vsp_hw_min_frequency + - (bitrate_table_pineapple_2stage_fp[codec][0] * + (bitrate_table_iris33_2stage_fp[codec][0] * fw_sw_vsp_offset - 1); vsp_hw_min_frequency = DIV_ROUND_UP(vsp_hw_min_frequency, - (bitrate_table_pineapple_2stage_fp[codec][0]) * + (bitrate_table_iris33_2stage_fp[codec][0]) * fw_sw_vsp_offset); } else { vsp_hw_min_frequency = vsp_hw_min_frequency + - (bitrate_table_pineapple_1stage_fp[codec][0] * + (bitrate_table_iris33_1stage_fp[codec][0] * fw_sw_vsp_offset - 1); vsp_hw_min_frequency = DIV_ROUND_UP(vsp_hw_min_frequency, - (bitrate_table_pineapple_1stage_fp[codec][0]) * + (bitrate_table_iris33_1stage_fp[codec][0]) * fw_sw_vsp_offset); } } } else { - vsp_hw_min_frequency = frequency_table_pineapple[0][2] * + vsp_hw_min_frequency = frequency_table_iris33[0][2] * input_bitrate_fp * 1000; if (codec_input.codec == CODEC_AV1 && bitrate_entry == 1) - vsp_hw_min_frequency = frequency_table_pineapple[0][1] * + vsp_hw_min_frequency = frequency_table_iris33[0][1] * input_bitrate_fp * 1000; if (codec_input.vsp_vpp_mode == CODEC_VSPVPP_MODE_2S) { vsp_hw_min_frequency = vsp_hw_min_frequency + - (bitrate_table_pineapple_2stage_fp[codec][bitrate_entry] * + (bitrate_table_iris33_2stage_fp[codec][bitrate_entry] * fw_sw_vsp_offset - 1); vsp_hw_min_frequency = DIV_ROUND_UP(vsp_hw_min_frequency, - (bitrate_table_pineapple_2stage_fp[codec][bitrate_entry]) * + (bitrate_table_iris33_2stage_fp[codec][bitrate_entry]) * fw_sw_vsp_offset); } else { vsp_hw_min_frequency = vsp_hw_min_frequency + - (bitrate_table_pineapple_1stage_fp[codec][bitrate_entry] * + (bitrate_table_iris33_1stage_fp[codec][bitrate_entry] * fw_sw_vsp_offset - 1); vsp_hw_min_frequency = DIV_ROUND_UP(vsp_hw_min_frequency, - (bitrate_table_pineapple_1stage_fp[codec][bitrate_entry]) * + (bitrate_table_iris33_1stage_fp[codec][bitrate_entry]) * fw_sw_vsp_offset); } } @@ -282,27 +396,27 @@ static u32 calculate_pipe_penalty(struct api_calculation_input codec_input) /* decoder */ if (codec_input.decoder_or_encoder == CODEC_DECODER) { - pipe_penalty_codec = pipe_penalty_pineapple[0][0]; + pipe_penalty_codec = pipe_penalty_iris33[0][0]; avid_commercial_content = codec_input.av1d_commer_tile_enable; if (codec_input.codec == CODEC_AV1) { pixel_count = codec_input.frame_width * codec_input.frame_height; if (pixel_count <= 1920 * 1080) pipe_penalty_codec = - pipe_penalty_pineapple[avid_commercial_content + 1][0]; + pipe_penalty_iris33[avid_commercial_content + 1][0]; else if (pixel_count < 3840 * 2160) pipe_penalty_codec = - (pipe_penalty_pineapple[avid_commercial_content + 1][0] + - pipe_penalty_pineapple[avid_commercial_content + 1][1]) / 2; + (pipe_penalty_iris33[avid_commercial_content + 1][0] + + pipe_penalty_iris33[avid_commercial_content + 1][1]) / 2; else if ((pixel_count == 3840 * 2160) || (pixel_count == 4096 * 2160) || (pixel_count == 4096 * 2304)) - pipe_penalty_codec = pipe_penalty_pineapple[avid_commercial_content + 1][1]; + pipe_penalty_codec = pipe_penalty_iris33[avid_commercial_content + 1][1]; else if (pixel_count < 7680 * 4320) pipe_penalty_codec = - (pipe_penalty_pineapple[avid_commercial_content + 1][1] + - pipe_penalty_pineapple[avid_commercial_content + 1][2]) / 2; + (pipe_penalty_iris33[avid_commercial_content + 1][1] + + pipe_penalty_iris33[avid_commercial_content + 1][2]) / 2; else pipe_penalty_codec = - pipe_penalty_pineapple[avid_commercial_content + 1][2]; + pipe_penalty_iris33[avid_commercial_content + 1][2]; } } else { pipe_penalty_codec = 101; @@ -327,17 +441,17 @@ static int calculate_vpp_min_freq(struct api_calculation_input codec_input, u32 lpmode_uhd_cycle_permb = 0; u32 hqmode1080p_cycle_permb = 0; u32 encoder_vpp_target_clk_per_mb = 0; - u32 decoder_vpp_fw_overhead = DECODER_VPP_FW_OVERHEAD_PINEAPPLE; + u32 decoder_vpp_fw_overhead = DECODER_VPP_FW_OVERHEAD_IRIS33; - codec_mbspersession_pineaple = - calculate_number_mbs_pineapple(codec_input.frame_width, + codec_mbspersession_iris33 = + calculate_number_mbs_iris33(codec_input.frame_width, codec_input.frame_height, codec_input.lcu_size) * codec_input.frame_rate; /* Section 2. 0 VPP/VSP calculation */ if (codec_input.decoder_or_encoder == CODEC_DECODER) { /* decoder */ - vpp_hw_min_frequency = ((decoder_vpp_target_clk_per_mb_pineapple) * - (codec_mbspersession_pineaple) + codec_input.pipe_num - 1) / + vpp_hw_min_frequency = ((decoder_vpp_target_clk_per_mb_iris33) * + (codec_mbspersession_iris33) + codec_input.pipe_num - 1) / (codec_input.pipe_num); vpp_hw_min_frequency = (vpp_hw_min_frequency + 99999) / 1000000; @@ -349,9 +463,9 @@ static int calculate_vpp_min_freq(struct api_calculation_input codec_input, } if (codec_input.codec == CODEC_AV1) - decoder_vpp_fw_overhead = DECODER_VPP_FW_OVERHEAD_PINEAPPLE_AV1D; + decoder_vpp_fw_overhead = DECODER_VPP_FW_OVERHEAD_IRIS33_AV1D; else - decoder_vpp_fw_overhead = DECODER_VPP_FW_OVERHEAD_PINEAPPLE_NONAV1D; + decoder_vpp_fw_overhead = DECODER_VPP_FW_OVERHEAD_IRIS33_NONAV1D; if (codec_input.vsp_vpp_mode == CODEC_VSPVPP_MODE_2S) { /* FW overhead, convert FW cycles to impact to one pipe */ @@ -362,8 +476,8 @@ static int calculate_vpp_min_freq(struct api_calculation_input codec_input, decoder_vpp_fw_overhead = DIV_ROUND_UP((decoder_vpp_fw_overhead * 1000), - (codec_mbspersession_pineaple * - decoder_vpp_target_clk_per_mb_pineapple / codec_input.pipe_num)); + (codec_mbspersession_iris33 * + decoder_vpp_target_clk_per_mb_iris33 / codec_input.pipe_num)); decoder_vpp_fw_overhead += 1000; decoder_vpp_fw_overhead = (decoder_vpp_fw_overhead < 1050) ? @@ -402,7 +516,7 @@ static int calculate_vpp_min_freq(struct api_calculation_input codec_input, /* FW time */ fmin_fwoverhead105 = (fmin * 105 + 99) / 100; fmin_measured_fwoverhead = fmin + - (((DECODER_VPPVSP1STAGE_FW_OVERHEAD_PINEAPPLE * + (((DECODER_VPPVSP1STAGE_FW_OVERHEAD_IRIS33 * codec_input.frame_rate * 10 + 14) / 15 + 999) / 1000 + 999) / 1000; @@ -410,7 +524,7 @@ static int calculate_vpp_min_freq(struct api_calculation_input codec_input, fmin_fwoverhead105 : fmin_measured_fwoverhead; } - tensilica_min_frequency = (DECODER_SW_OVERHEAD_PINEAPPLE * 10 + 14) / 15; + tensilica_min_frequency = (DECODER_SW_OVERHEAD_IRIS33 * 10 + 14) / 15; tensilica_min_frequency = (tensilica_min_frequency + 999) / 1000; tensilica_min_frequency = tensilica_min_frequency * codec_input.frame_rate; tensilica_min_frequency = (tensilica_min_frequency + 999) / 1000; @@ -467,7 +581,7 @@ static int calculate_vpp_min_freq(struct api_calculation_input codec_input, hqmode1080p_cycle_permb : lpmode_uhd_cycle_permb; vpp_hw_min_frequency = ((encoder_vpp_target_clk_per_mb) * - (codec_mbspersession_pineaple) + codec_input.pipe_num - 1) / + (codec_mbspersession_iris33) + codec_input.pipe_num - 1) / (codec_input.pipe_num); vpp_hw_min_frequency = (vpp_hw_min_frequency + 99999) / 1000000; @@ -483,12 +597,12 @@ static int calculate_vpp_min_freq(struct api_calculation_input codec_input, u64 encoder_vpp_fw_overhead = 0; encoder_vpp_fw_overhead = - DIV_ROUND_UP((ENCODER_VPP_FW_OVERHEAD_PINEAPPLE * 10 * + DIV_ROUND_UP((ENCODER_VPP_FW_OVERHEAD_IRIS33 * 10 * codec_input.frame_rate), 15); encoder_vpp_fw_overhead = DIV_ROUND_UP((encoder_vpp_fw_overhead * 1000), - (codec_mbspersession_pineaple * encoder_vpp_target_clk_per_mb / + (codec_mbspersession_iris33 * encoder_vpp_target_clk_per_mb / codec_input.pipe_num)); encoder_vpp_fw_overhead += 1000; @@ -514,7 +628,7 @@ static int calculate_vpp_min_freq(struct api_calculation_input codec_input, /* FW time */ fmin_fwoverhead105 = (fmin * 105 + 99) / 100; fmin_measured_fwoverhead = fmin + - (((DECODER_VPPVSP1STAGE_FW_OVERHEAD_PINEAPPLE * + (((DECODER_VPPVSP1STAGE_FW_OVERHEAD_IRIS33 * codec_input.frame_rate * 10 + 14) / 15 + 999) / 1000 + 999) / 1000; @@ -523,7 +637,7 @@ static int calculate_vpp_min_freq(struct api_calculation_input codec_input, /* SW time */ } - tensilica_min_frequency = (ENCODER_SW_OVERHEAD_PINEAPPLE * 10 + 14) / 15; + tensilica_min_frequency = (ENCODER_SW_OVERHEAD_IRIS33 * 10 + 14) / 15; tensilica_min_frequency = (tensilica_min_frequency + 999) / 1000; tensilica_min_frequency = tensilica_min_frequency * From 2ae30091f490d487a60ca9e698a522d0d91f906a Mon Sep 17 00:00:00 2001 From: Dikshita Agarwal Date: Sat, 8 Jul 2023 01:40:35 +0530 Subject: [PATCH 0962/1061] video: driver: fix copyright markings fix copyright markings and have all markings in one multiline comment. Change-Id: I481c6213bb25e8c278956ad6a51df3fc5c1aabf2 Signed-off-by: Dikshita Agarwal --- driver/platform/common/inc/msm_vidc_platform.h | 2 +- driver/platform/common/inc/msm_vidc_platform_ext.h | 2 +- driver/platform/common/inc/perf_static_model.h | 2 +- driver/platform/common/src/msm_vidc_platform_ext.c | 2 +- driver/platform/kalama/inc/kalama_technology.h | 2 +- driver/platform/waipio/inc/msm_vidc_waipio.h | 2 +- driver/variant/iris2/inc/hfi_buffer_iris2.h | 2 +- driver/variant/iris2/inc/msm_vidc_buffer_iris2.h | 2 +- driver/variant/iris2/inc/msm_vidc_iris2.h | 2 +- driver/variant/iris2/inc/msm_vidc_power_iris2.h | 2 +- driver/variant/iris2/src/msm_vidc_buffer_iris2.c | 2 +- driver/variant/iris2/src/msm_vidc_iris2.c | 2 +- driver/variant/iris2/src/msm_vidc_power_iris2.c | 2 +- driver/variant/iris3/src/msm_vidc_iris3.c | 2 +- driver/variant/iris33/src/msm_vidc_iris33.c | 2 +- driver/vidc/inc/hfi_command.h | 2 +- driver/vidc/inc/hfi_packet.h | 2 +- driver/vidc/inc/msm_media_info.h | 2 +- driver/vidc/inc/msm_vdec.h | 2 +- driver/vidc/inc/msm_venc.h | 2 +- driver/vidc/inc/msm_vidc.h | 2 +- driver/vidc/inc/msm_vidc_buffer.h | 2 +- driver/vidc/inc/msm_vidc_control.h | 4 ++-- driver/vidc/inc/msm_vidc_debug.h | 2 +- driver/vidc/inc/msm_vidc_driver.h | 2 +- driver/vidc/inc/msm_vidc_inst.h | 4 ++-- driver/vidc/inc/msm_vidc_memory.h | 2 +- driver/vidc/inc/msm_vidc_power.h | 2 +- driver/vidc/inc/msm_vidc_v4l2.h | 2 +- driver/vidc/inc/msm_vidc_vb2.h | 2 +- driver/vidc/inc/venus_hfi.h | 2 +- driver/vidc/inc/venus_hfi_response.h | 2 +- driver/vidc/src/firmware.c | 2 +- driver/vidc/src/msm_vdec.c | 2 +- driver/vidc/src/msm_vidc.c | 2 +- driver/vidc/src/msm_vidc_control.c | 2 +- driver/vidc/src/msm_vidc_vb2.c | 2 +- driver/vidc/src/resources.c | 2 +- driver/vidc/src/venus_hfi.c | 2 +- driver/vidc/src/venus_hfi_queue.c | 2 +- 40 files changed, 42 insertions(+), 42 deletions(-) diff --git a/driver/platform/common/inc/msm_vidc_platform.h b/driver/platform/common/inc/msm_vidc_platform.h index 5125ad1e6e..e6e1e19464 100644 --- a/driver/platform/common/inc/msm_vidc_platform.h +++ b/driver/platform/common/inc/msm_vidc_platform.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* - * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. */ diff --git a/driver/platform/common/inc/msm_vidc_platform_ext.h b/driver/platform/common/inc/msm_vidc_platform_ext.h index 5e30cd9fea..b91255f21b 100644 --- a/driver/platform/common/inc/msm_vidc_platform_ext.h +++ b/driver/platform/common/inc/msm_vidc_platform_ext.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* - * Copyright (c) 2022-2023. Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. */ #ifndef _MSM_VIDC_PLATFORM_EXT_H_ diff --git a/driver/platform/common/inc/perf_static_model.h b/driver/platform/common/inc/perf_static_model.h index 6cc67a89f0..66f7c027e6 100644 --- a/driver/platform/common/inc/perf_static_model.h +++ b/driver/platform/common/inc/perf_static_model.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* - * Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. */ #ifndef _PERF_STATIC_MODEL_H_ diff --git a/driver/platform/common/src/msm_vidc_platform_ext.c b/driver/platform/common/src/msm_vidc_platform_ext.c index 96c974553a..cc8460157b 100644 --- a/driver/platform/common/src/msm_vidc_platform_ext.c +++ b/driver/platform/common/src/msm_vidc_platform_ext.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * Copyright (c) 2022-2023. Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. */ #include diff --git a/driver/platform/kalama/inc/kalama_technology.h b/driver/platform/kalama/inc/kalama_technology.h index f39d438fa8..5e0dcdee82 100644 --- a/driver/platform/kalama/inc/kalama_technology.h +++ b/driver/platform/kalama/inc/kalama_technology.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* - * Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. */ #include "perf_static_model.h" diff --git a/driver/platform/waipio/inc/msm_vidc_waipio.h b/driver/platform/waipio/inc/msm_vidc_waipio.h index a715680d0c..7342891c4c 100644 --- a/driver/platform/waipio/inc/msm_vidc_waipio.h +++ b/driver/platform/waipio/inc/msm_vidc_waipio.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* - * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. */ diff --git a/driver/variant/iris2/inc/hfi_buffer_iris2.h b/driver/variant/iris2/inc/hfi_buffer_iris2.h index 8bf11ebfd1..b4870182fb 100644 --- a/driver/variant/iris2/inc/hfi_buffer_iris2.h +++ b/driver/variant/iris2/inc/hfi_buffer_iris2.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* - * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. */ diff --git a/driver/variant/iris2/inc/msm_vidc_buffer_iris2.h b/driver/variant/iris2/inc/msm_vidc_buffer_iris2.h index 4263b0e49e..459b6a9cd7 100644 --- a/driver/variant/iris2/inc/msm_vidc_buffer_iris2.h +++ b/driver/variant/iris2/inc/msm_vidc_buffer_iris2.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* - * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. */ diff --git a/driver/variant/iris2/inc/msm_vidc_iris2.h b/driver/variant/iris2/inc/msm_vidc_iris2.h index 47ade5df66..28a899e7c9 100644 --- a/driver/variant/iris2/inc/msm_vidc_iris2.h +++ b/driver/variant/iris2/inc/msm_vidc_iris2.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* - * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. */ diff --git a/driver/variant/iris2/inc/msm_vidc_power_iris2.h b/driver/variant/iris2/inc/msm_vidc_power_iris2.h index 01f04627bc..28c6ae3180 100644 --- a/driver/variant/iris2/inc/msm_vidc_power_iris2.h +++ b/driver/variant/iris2/inc/msm_vidc_power_iris2.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* - * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. */ diff --git a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c index 371ec666a6..3421ba66f3 100644 --- a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. */ diff --git a/driver/variant/iris2/src/msm_vidc_iris2.c b/driver/variant/iris2/src/msm_vidc_iris2.c index bf7acba24e..d22ca82ca1 100644 --- a/driver/variant/iris2/src/msm_vidc_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_iris2.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. */ #include "msm_vidc_iris2.h" diff --git a/driver/variant/iris2/src/msm_vidc_power_iris2.c b/driver/variant/iris2/src/msm_vidc_power_iris2.c index 9464c0ed44..a841ce28c9 100644 --- a/driver/variant/iris2/src/msm_vidc_power_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_power_iris2.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. */ diff --git a/driver/variant/iris3/src/msm_vidc_iris3.c b/driver/variant/iris3/src/msm_vidc_iris3.c index 76a509426a..5d99c5424d 100644 --- a/driver/variant/iris3/src/msm_vidc_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_iris3.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. - * Copyright (c) 2021-2023, Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved. */ #include "msm_vidc_iris3.h" diff --git a/driver/variant/iris33/src/msm_vidc_iris33.c b/driver/variant/iris33/src/msm_vidc_iris33.c index 3a96a0d76b..3f94653b5b 100644 --- a/driver/variant/iris33/src/msm_vidc_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_iris33.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2020-2022, The Linux Foundation. All rights reserved. - * Copyright (c) 2022-2023, Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. */ #include diff --git a/driver/vidc/inc/hfi_command.h b/driver/vidc/inc/hfi_command.h index b58dae5e3a..74db6d4a98 100644 --- a/driver/vidc/inc/hfi_command.h +++ b/driver/vidc/inc/hfi_command.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* - * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. */ diff --git a/driver/vidc/inc/hfi_packet.h b/driver/vidc/inc/hfi_packet.h index 62756c3d5e..0cc35831ad 100644 --- a/driver/vidc/inc/hfi_packet.h +++ b/driver/vidc/inc/hfi_packet.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* - * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. */ diff --git a/driver/vidc/inc/msm_media_info.h b/driver/vidc/inc/msm_media_info.h index 31d25c1c9d..994d540aca 100644 --- a/driver/vidc/inc/msm_media_info.h +++ b/driver/vidc/inc/msm_media_info.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ /* - * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. */ diff --git a/driver/vidc/inc/msm_vdec.h b/driver/vidc/inc/msm_vdec.h index 319f8a010e..733074e656 100644 --- a/driver/vidc/inc/msm_vdec.h +++ b/driver/vidc/inc/msm_vdec.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* - * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. */ diff --git a/driver/vidc/inc/msm_venc.h b/driver/vidc/inc/msm_venc.h index 3fe5c4acb2..34bfe1dcfb 100644 --- a/driver/vidc/inc/msm_venc.h +++ b/driver/vidc/inc/msm_venc.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* - * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. */ diff --git a/driver/vidc/inc/msm_vidc.h b/driver/vidc/inc/msm_vidc.h index 45b5ad29bc..0ffb044f97 100644 --- a/driver/vidc/inc/msm_vidc.h +++ b/driver/vidc/inc/msm_vidc.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* - * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. */ diff --git a/driver/vidc/inc/msm_vidc_buffer.h b/driver/vidc/inc/msm_vidc_buffer.h index 1fb460b93d..4b5974b5bb 100644 --- a/driver/vidc/inc/msm_vidc_buffer.h +++ b/driver/vidc/inc/msm_vidc_buffer.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* - * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. */ diff --git a/driver/vidc/inc/msm_vidc_control.h b/driver/vidc/inc/msm_vidc_control.h index 75bd54c0c6..28ecbfcd64 100644 --- a/driver/vidc/inc/msm_vidc_control.h +++ b/driver/vidc/inc/msm_vidc_control.h @@ -1,8 +1,8 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* - * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. + * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. */ -/* Copyright (c) 2022-2023. Qualcomm Innovation Center, Inc. All rights reserved. */ #ifndef _MSM_VIDC_CONTROL_H_ #define _MSM_VIDC_CONTROL_H_ diff --git a/driver/vidc/inc/msm_vidc_debug.h b/driver/vidc/inc/msm_vidc_debug.h index c247182588..0630cefe2c 100644 --- a/driver/vidc/inc/msm_vidc_debug.h +++ b/driver/vidc/inc/msm_vidc_debug.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* - * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. */ diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 63076ad26c..ce4aa03885 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* - * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. */ diff --git a/driver/vidc/inc/msm_vidc_inst.h b/driver/vidc/inc/msm_vidc_inst.h index 739434c6c7..9924de216b 100644 --- a/driver/vidc/inc/msm_vidc_inst.h +++ b/driver/vidc/inc/msm_vidc_inst.h @@ -1,8 +1,8 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* - * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. + * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. */ -/* Copyright (c) 2022-2023. Qualcomm Innovation Center, Inc. All rights reserved. */ #ifndef _MSM_VIDC_INST_H_ #define _MSM_VIDC_INST_H_ diff --git a/driver/vidc/inc/msm_vidc_memory.h b/driver/vidc/inc/msm_vidc_memory.h index 1606d39408..de31f2c62c 100644 --- a/driver/vidc/inc/msm_vidc_memory.h +++ b/driver/vidc/inc/msm_vidc_memory.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* - * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. */ diff --git a/driver/vidc/inc/msm_vidc_power.h b/driver/vidc/inc/msm_vidc_power.h index 7acd0af36d..b408a6b8df 100644 --- a/driver/vidc/inc/msm_vidc_power.h +++ b/driver/vidc/inc/msm_vidc_power.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* - * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. */ diff --git a/driver/vidc/inc/msm_vidc_v4l2.h b/driver/vidc/inc/msm_vidc_v4l2.h index bb985bb64c..cad47a4734 100644 --- a/driver/vidc/inc/msm_vidc_v4l2.h +++ b/driver/vidc/inc/msm_vidc_v4l2.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* - * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. */ diff --git a/driver/vidc/inc/msm_vidc_vb2.h b/driver/vidc/inc/msm_vidc_vb2.h index 3deb3a5598..4bc96dfa28 100644 --- a/driver/vidc/inc/msm_vidc_vb2.h +++ b/driver/vidc/inc/msm_vidc_vb2.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* - * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. */ diff --git a/driver/vidc/inc/venus_hfi.h b/driver/vidc/inc/venus_hfi.h index 6eab24e44c..3c17c8d951 100644 --- a/driver/vidc/inc/venus_hfi.h +++ b/driver/vidc/inc/venus_hfi.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* - * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. */ diff --git a/driver/vidc/inc/venus_hfi_response.h b/driver/vidc/inc/venus_hfi_response.h index 1d76830a93..5465556f39 100644 --- a/driver/vidc/inc/venus_hfi_response.h +++ b/driver/vidc/inc/venus_hfi_response.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* - * Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. */ diff --git a/driver/vidc/src/firmware.c b/driver/vidc/src/firmware.c index 68fbc6986e..da89165b18 100644 --- a/driver/vidc/src/firmware.c +++ b/driver/vidc/src/firmware.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * Copyright (c) 2022-2023. Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. */ #include #include diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index f1e40fd3d2..0dbe502ab9 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -1,8 +1,8 @@ // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. + * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. */ -/* Copyright (c) 2022-2023. Qualcomm Innovation Center, Inc. All rights reserved. */ #include "msm_media_info.h" #include diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index 0314b72844..7ca1d07617 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -1,8 +1,8 @@ // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. + * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. */ -/* Copyright (c) 2022-2023. Qualcomm Innovation Center, Inc. All rights reserved. */ #include #include diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index fdb58682ff..10af90f248 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -1,8 +1,8 @@ // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. + * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. */ -/* Copyright (c) 2022-2023. Qualcomm Innovation Center, Inc. All rights reserved. */ #include "msm_vidc_internal.h" #include "msm_vidc_driver.h" diff --git a/driver/vidc/src/msm_vidc_vb2.c b/driver/vidc/src/msm_vidc_vb2.c index 17598f70bd..7877cc0fb7 100644 --- a/driver/vidc/src/msm_vidc_vb2.c +++ b/driver/vidc/src/msm_vidc_vb2.c @@ -1,8 +1,8 @@ // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. + * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. */ -/* Copyright (c) 2022-2023. Qualcomm Innovation Center, Inc. All rights reserved. */ #include "msm_vidc_vb2.h" #include "msm_vidc_core.h" diff --git a/driver/vidc/src/resources.c b/driver/vidc/src/resources.c index 492c9e27ff..9892042cba 100644 --- a/driver/vidc/src/resources.c +++ b/driver/vidc/src/resources.c @@ -1,8 +1,8 @@ // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. + * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. */ -/* Copyright (c) 2022-2023. Qualcomm Innovation Center, Inc. All rights reserved. */ #include #include diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index b278bf7b15..c9c32ee250 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -1,8 +1,8 @@ // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. + * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. */ -/* Copyright (c) 2022-2023. Qualcomm Innovation Center, Inc. All rights reserved. */ #include #include diff --git a/driver/vidc/src/venus_hfi_queue.c b/driver/vidc/src/venus_hfi_queue.c index 39a5b09df5..90057e763a 100644 --- a/driver/vidc/src/venus_hfi_queue.c +++ b/driver/vidc/src/venus_hfi_queue.c @@ -1,8 +1,8 @@ // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. + * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. */ - /* Copyright (c) 2022-2023. Qualcomm Innovation Center, Inc. All rights reserved. */ #include "venus_hfi_queue.h" #include "msm_vidc_core.h" From b5912cd2ea1b447ab351ba0bdb745baacc77a614 Mon Sep 17 00:00:00 2001 From: Dikshita Agarwal Date: Fri, 23 Jun 2023 11:45:19 +0530 Subject: [PATCH 0963/1061] video: driver: remove unused APIs and other fixes/cleanup - Remove unused APIs: buf_cleanup _lock_check msm_vdec_update_max_map_output_count - Rename msm_vidc_print_insts_info to msm_vidc_print_running_instances_info for better understanding. Change-Id: I1ae190cbf02a52554bfe286c5e336fad37d7419e Signed-off-by: Dikshita Agarwal --- .../platform/common/src/msm_vidc_platform.c | 1 - driver/vidc/inc/msm_vidc_driver.h | 3 -- driver/vidc/inc/msm_vidc_inst.h | 1 - driver/vidc/inc/msm_vidc_internal.h | 1 - driver/vidc/inc/msm_vidc_vb2.h | 1 - driver/vidc/src/msm_vdec.c | 46 ------------------- driver/vidc/src/msm_vidc_driver.c | 19 +------- driver/vidc/src/msm_vidc_vb2.c | 4 -- 8 files changed, 2 insertions(+), 74 deletions(-) diff --git a/driver/platform/common/src/msm_vidc_platform.c b/driver/platform/common/src/msm_vidc_platform.c index 2459e08bd3..a6c8760afa 100644 --- a/driver/platform/common/src/msm_vidc_platform.c +++ b/driver/platform/common/src/msm_vidc_platform.c @@ -180,7 +180,6 @@ static struct vb2_ops msm_vb2_ops = { .queue_setup = msm_vb2_queue_setup, .start_streaming = msm_vb2_start_streaming, .buf_queue = msm_vb2_buf_queue, - .buf_cleanup = msm_vb2_buf_cleanup, .stop_streaming = msm_vb2_stop_streaming, .buf_out_validate = msm_vb2_buf_out_validate, .buf_request_complete = msm_vb2_request_complete, diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index ce4aa03885..65a922bc80 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -560,11 +560,8 @@ int msm_vidc_num_buffers(struct msm_vidc_inst *inst, enum msm_vidc_buffer_type type, enum msm_vidc_buffer_attributes attr); void core_lock(struct msm_vidc_core *core, const char *function); void core_unlock(struct msm_vidc_core *core, const char *function); -bool core_lock_check(struct msm_vidc_core *core, const char *function); void inst_lock(struct msm_vidc_inst *inst, const char *function); void inst_unlock(struct msm_vidc_inst *inst, const char *function); -bool inst_lock_check(struct msm_vidc_inst *inst, const char *function); -bool client_lock_check(struct msm_vidc_inst *inst, const char *func); void client_lock(struct msm_vidc_inst *inst, const char *function); void client_unlock(struct msm_vidc_inst *inst, const char *function); int msm_vidc_update_bitstream_buffer_size(struct msm_vidc_inst *inst); diff --git a/driver/vidc/inc/msm_vidc_inst.h b/driver/vidc/inc/msm_vidc_inst.h index 9924de216b..2bea07ca19 100644 --- a/driver/vidc/inc/msm_vidc_inst.h +++ b/driver/vidc/inc/msm_vidc_inst.h @@ -137,7 +137,6 @@ struct msm_vidc_inst { u32 dpb_list_payload[MAX_DPB_LIST_ARRAY_SIZE]; bool input_dpb_list_enabled; bool output_dpb_list_enabled; - u32 max_map_output_count; u32 auto_framerate; u32 max_rate; bool has_bframe; diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 946ea50723..9bc7e2d2b4 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -202,7 +202,6 @@ enum msm_vidc_metadata_bits { #define SW_PC_DELAY_VALUE (HW_RESPONSE_TIMEOUT_VALUE + 500) #define FW_UNLOAD_DELAY_VALUE (SW_PC_DELAY_VALUE + 1500) -#define MAX_MAP_OUTPUT_COUNT 64 #define MAX_DPB_COUNT 32 /* * max dpb count in firmware = 16 diff --git a/driver/vidc/inc/msm_vidc_vb2.h b/driver/vidc/inc/msm_vidc_vb2.h index 4bc96dfa28..934192ccfd 100644 --- a/driver/vidc/inc/msm_vidc_vb2.h +++ b/driver/vidc/inc/msm_vidc_vb2.h @@ -43,7 +43,6 @@ int msm_vidc_stop_streaming(struct msm_vidc_inst *inst, struct vb2_queue *q); int msm_vb2_start_streaming(struct vb2_queue *q, unsigned int count); void msm_vb2_stop_streaming(struct vb2_queue *q); void msm_vb2_buf_queue(struct vb2_buffer *vb2); -void msm_vb2_buf_cleanup(struct vb2_buffer *vb); int msm_vb2_buf_out_validate(struct vb2_buffer *vb); void msm_vb2_request_complete(struct vb2_buffer *vb); #endif // _MSM_VIDC_VB2_H_ diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 0dbe502ab9..57ef990d14 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -1759,39 +1759,6 @@ static int msm_vdec_subscribe_output_port_settings_change(struct msm_vidc_inst * return rc; } -static int msm_vdec_update_max_map_output_count(struct msm_vidc_inst *inst) -{ - int rc = 0; - struct v4l2_format *f; - u32 width, height, count; - - f = &inst->fmts[OUTPUT_PORT]; - width = f->fmt.pix_mp.width; - height = f->fmt.pix_mp.height; - - /* - * adjust max map output count based on resolution - * to enhance performance. - * For 8K session: count = 20 - * For 4K session: count = 32 - * For 1080p session: count = 48 - * For all remaining sessions: count = 64 - */ - if (res_is_greater_than(width, height, 4096, 2160)) - count = 20; - else if (res_is_greater_than(width, height, 1920, 1080)) - count = 32; - else if (res_is_greater_than(width, height, 1280, 720)) - count = 48; - else - count = 64; - - inst->max_map_output_count = count; - i_vpr_h(inst, "%s: count: %d\n", __func__, inst->max_map_output_count); - - return rc; -} - int msm_vdec_streamon_output(struct msm_vidc_inst *inst) { int rc = 0; @@ -1816,10 +1783,6 @@ int msm_vdec_streamon_output(struct msm_vidc_inst *inst) if (rc) goto error; - rc = msm_vdec_update_max_map_output_count(inst); - if (rc) - goto error; - rc = msm_vdec_set_output_properties(inst); if (rc) goto error; @@ -1973,13 +1936,6 @@ static int msm_vdec_release_nonref_buffers(struct msm_vidc_inst *inst) int i = 0; bool found = false; - /* - * if DPB_LIST subscribed on output port then driver need to - * hold MAX_BPB_COUNT of read only buffer at least. - */ - if (!inst->output_dpb_list_enabled) - goto release_buffers; - /* count read_only buffers which are not pending release in read_only list */ list_for_each_entry(ro_buf, &inst->buffers.read_only.list, list) { if (!(ro_buf->attr & MSM_VIDC_ATTR_READ_ONLY)) @@ -2025,7 +1981,6 @@ static int msm_vdec_release_nonref_buffers(struct msm_vidc_inst *inst) i_vpr_l(inst, "%s: fw ro buf count %d, non-ref ro count %d\n", __func__, fw_ro_count, nonref_ro_count); -release_buffers: /* release the eligible buffers as per above condition */ list_for_each_entry(ro_buf, &inst->buffers.read_only.list, list) { found = false; @@ -2704,7 +2659,6 @@ int msm_vdec_inst_init(struct msm_vidc_inst *inst) inst->buffers.output.min_count + inst->buffers.output.extra_count; inst->buffers.output.size = f->fmt.pix_mp.plane_fmt[0].sizeimage; - inst->max_map_output_count = MAX_MAP_OUTPUT_COUNT; inst->fw_min_count = 0; f = &inst->fmts[OUTPUT_META_PORT]; diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index f3637e28ba..9ca1cb392d 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -4520,11 +4520,6 @@ void put_inst(struct msm_vidc_inst *inst) kref_put(&inst->kref, msm_vidc_close_helper); } -bool core_lock_check(struct msm_vidc_core *core, const char *func) -{ - return mutex_is_locked(&core->lock); -} - void core_lock(struct msm_vidc_core *core, const char *function) { mutex_lock(&core->lock); @@ -4535,11 +4530,6 @@ void core_unlock(struct msm_vidc_core *core, const char *function) mutex_unlock(&core->lock); } -bool inst_lock_check(struct msm_vidc_inst *inst, const char *func) -{ - return mutex_is_locked(&inst->lock); -} - void inst_lock(struct msm_vidc_inst *inst, const char *function) { mutex_lock(&inst->lock); @@ -4550,11 +4540,6 @@ void inst_unlock(struct msm_vidc_inst *inst, const char *function) mutex_unlock(&inst->lock); } -bool client_lock_check(struct msm_vidc_inst *inst, const char *func) -{ - return mutex_is_locked(&inst->client_lock); -} - void client_lock(struct msm_vidc_inst *inst, const char *function) { mutex_lock(&inst->client_lock); @@ -4752,7 +4737,7 @@ int msm_vidc_update_debug_str(struct msm_vidc_inst *inst) return 0; } -static int msm_vidc_print_insts_info(struct msm_vidc_core *core) +static int msm_vidc_print_running_instances_info(struct msm_vidc_core *core) { struct msm_vidc_inst *inst; u32 height, width, fps, orate; @@ -5301,7 +5286,7 @@ int msm_vidc_check_session_supported(struct msm_vidc_inst *inst) exit: if (rc) { i_vpr_e(inst, "%s: current session not supported\n", __func__); - msm_vidc_print_insts_info(inst->core); + msm_vidc_print_running_instances_info(inst->core); } return rc; diff --git a/driver/vidc/src/msm_vidc_vb2.c b/driver/vidc/src/msm_vidc_vb2.c index 7877cc0fb7..3be0fdacf7 100644 --- a/driver/vidc/src/msm_vidc_vb2.c +++ b/driver/vidc/src/msm_vidc_vb2.c @@ -683,10 +683,6 @@ unlock: put_inst(inst); } -void msm_vb2_buf_cleanup(struct vb2_buffer *vb) -{ -} - int msm_vb2_buf_out_validate(struct vb2_buffer *vb) { struct vb2_v4l2_buffer *vbuf; From e9ebdcdbbe9ae20b889eef930f3c105e8fdfa758 Mon Sep 17 00:00:00 2001 From: Dikshita Agarwal Date: Fri, 30 Jun 2023 13:39:33 +0530 Subject: [PATCH 0964/1061] video: driver: more fw_coredump api move fw_coredump api to firmware.c file. Change-Id: Icbd5644244d4460bf918c1d137d19c04eb9f492a Signed-off-by: Dikshita Agarwal --- driver/vidc/inc/firmware.h | 2 +- driver/vidc/inc/venus_hfi_response.h | 1 - driver/vidc/src/firmware.c | 61 ++++++++++++++++++++++++++++ driver/vidc/src/venus_hfi_response.c | 61 ---------------------------- 4 files changed, 62 insertions(+), 63 deletions(-) diff --git a/driver/vidc/inc/firmware.h b/driver/vidc/inc/firmware.h index 5c0e76f3d9..bd521802a4 100644 --- a/driver/vidc/inc/firmware.h +++ b/driver/vidc/inc/firmware.h @@ -13,6 +13,6 @@ int fw_load(struct msm_vidc_core *core); int fw_unload(struct msm_vidc_core *core); int fw_suspend(struct msm_vidc_core *core); int fw_resume(struct msm_vidc_core *core); - +void fw_coredump(struct msm_vidc_core *core); #endif diff --git a/driver/vidc/inc/venus_hfi_response.h b/driver/vidc/inc/venus_hfi_response.h index 5465556f39..bfa03f4133 100644 --- a/driver/vidc/inc/venus_hfi_response.h +++ b/driver/vidc/inc/venus_hfi_response.h @@ -19,7 +19,6 @@ bool is_valid_hfi_buffer_type(struct msm_vidc_inst *inst, u32 buffer_type, const char *func); int handle_system_error(struct msm_vidc_core *core, struct hfi_packet *pkt); -void fw_coredump(struct msm_vidc_core *core); int handle_release_output_buffer(struct msm_vidc_inst *inst, struct hfi_buffer *buffer); diff --git a/driver/vidc/src/firmware.c b/driver/vidc/src/firmware.c index da89165b18..d46f625a31 100644 --- a/driver/vidc/src/firmware.c +++ b/driver/vidc/src/firmware.c @@ -5,6 +5,7 @@ #include #include #include +#include #include #include #include @@ -232,3 +233,63 @@ int fw_resume(struct msm_vidc_core *core) { return qcom_scm_set_remote_state(TZBSP_VIDEO_STATE_RESUME, 0); } + +void fw_coredump(struct msm_vidc_core *core) +{ + int rc = 0; + struct platform_device *pdev; + struct device_node *node = NULL; + struct resource res = {0}; + phys_addr_t mem_phys = 0; + size_t res_size = 0; + void *mem_va = NULL; + char *data = NULL, *dump = NULL; + u64 total_size; + + pdev = core->pdev; + + node = of_parse_phandle(pdev->dev.of_node, "memory-region", 0); + if (!node) { + d_vpr_e("%s: DT error getting \"memory-region\" property\n", + __func__); + return; + } + + rc = of_address_to_resource(node, 0, &res); + if (rc) { + d_vpr_e("%s: error %d while getting \"memory-region\" resource\n", + __func__, rc); + return; + } + + mem_phys = res.start; + res_size = (size_t)resource_size(&res); + + mem_va = memremap(mem_phys, res_size, MEMREMAP_WC); + if (!mem_va) { + d_vpr_e("%s: unable to remap firmware memory\n", __func__); + return; + } + total_size = res_size + TOTAL_QSIZE + ALIGNED_SFR_SIZE; + + data = vmalloc(total_size); + if (!data) { + memunmap(mem_va); + return; + } + dump = data; + + /* copy firmware dump */ + memcpy(data, mem_va, res_size); + memunmap(mem_va); + + /* copy queues(cmd, msg, dbg) dump(along with headers) */ + data += res_size; + memcpy(data, (char *)core->iface_q_table.align_virtual_addr, TOTAL_QSIZE); + + /* copy sfr dump */ + data += TOTAL_QSIZE; + memcpy(data, (char *)core->sfr.align_virtual_addr, ALIGNED_SFR_SIZE); + + dev_coredumpv(&pdev->dev, dump, total_size, GFP_KERNEL); +} diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index 71ef52a124..630e5164dd 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -4,7 +4,6 @@ * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. */ -#include #include #include "hfi_packet.h" @@ -379,66 +378,6 @@ static int handle_session_error(struct msm_vidc_inst *inst, return rc; } -void fw_coredump(struct msm_vidc_core *core) -{ - int rc = 0; - struct platform_device *pdev; - struct device_node *node = NULL; - struct resource res = {0}; - phys_addr_t mem_phys = 0; - size_t res_size = 0; - void *mem_va = NULL; - char *data = NULL, *dump = NULL; - u64 total_size; - - pdev = core->pdev; - - node = of_parse_phandle(pdev->dev.of_node, "memory-region", 0); - if (!node) { - d_vpr_e("%s: DT error getting \"memory-region\" property\n", - __func__); - return; - } - - rc = of_address_to_resource(node, 0, &res); - if (rc) { - d_vpr_e("%s: error %d while getting \"memory-region\" resource\n", - __func__, rc); - return; - } - - mem_phys = res.start; - res_size = (size_t)resource_size(&res); - - mem_va = memremap(mem_phys, res_size, MEMREMAP_WC); - if (!mem_va) { - d_vpr_e("%s: unable to remap firmware memory\n", __func__); - return; - } - total_size = res_size + TOTAL_QSIZE + ALIGNED_SFR_SIZE; - - data = vmalloc(total_size); - if (!data) { - memunmap(mem_va); - return; - } - dump = data; - - /* copy firmware dump */ - memcpy(data, mem_va, res_size); - memunmap(mem_va); - - /* copy queues(cmd, msg, dbg) dump(along with headers) */ - data += res_size; - memcpy(data, (char *)core->iface_q_table.align_virtual_addr, TOTAL_QSIZE); - - /* copy sfr dump */ - data += TOTAL_QSIZE; - memcpy(data, (char *)core->sfr.align_virtual_addr, ALIGNED_SFR_SIZE); - - dev_coredumpv(&pdev->dev, dump, total_size, GFP_KERNEL); -} - int handle_system_error(struct msm_vidc_core *core, struct hfi_packet *pkt) { From 7cf1ce5bbe64563701637279ed2840145c3e3192 Mon Sep 17 00:00:00 2001 From: Dikshita Agarwal Date: Fri, 30 Jun 2023 14:11:50 +0530 Subject: [PATCH 0965/1061] video: driver: pm_runtime_get_sync can return 1 in success fix the error condition for pm_runtime_get_sync as it can return 1 as well in success case. Change-Id: I958da05b1b979adae059181432a3d917012640b7 Signed-off-by: Dikshita Agarwal --- driver/vidc/src/resources.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/driver/vidc/src/resources.c b/driver/vidc/src/resources.c index 9892042cba..d6cd179883 100644 --- a/driver/vidc/src/resources.c +++ b/driver/vidc/src/resources.c @@ -177,7 +177,7 @@ static int devm_pm_runtime_get_sync(struct device *dev) int rc = 0; rc = pm_runtime_get_sync(dev); - if (rc) { + if (rc < 0) { d_vpr_e("%s: pm domain get sync failed\n", __func__); return rc; } @@ -909,7 +909,7 @@ static int __enable_power_domains(struct msm_vidc_core *core, const char *name) continue; rc = pm_runtime_get_sync(pdinfo->genpd_dev); - if (rc) { + if (rc < 0) { d_vpr_e("%s: failed to get sync: %s\n", __func__, pdinfo->name); return rc; } From 9fad8ef79eda23a38dd3be68f7be28e38d4588cf Mon Sep 17 00:00:00 2001 From: Ashish Patil Date: Mon, 10 Jul 2023 13:35:37 -0700 Subject: [PATCH 0966/1061] video: driver: update the bandwidth calculation logic - Driver code gets the compression ratio(CR) from FW. This CR is used to calculate the compression factor(CF) and used in BW calculations. Perf. model code for BW calculations always assumes that CF will be in fractional format. But, driver already converts the CR to integer format. So, we need to remove the x100 multiplication in BW calculation code. - As CF is used as division factor for BW calculations, due to this x100 bump in CF values, we see very low calculated BW values. Change-Id: Ifbddee68b6799b2fe0fc6d5ffa623514e1abd13f Signed-off-by: Ashish Patil --- driver/variant/iris33/src/msm_vidc_bus_iris33.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/driver/variant/iris33/src/msm_vidc_bus_iris33.c b/driver/variant/iris33/src/msm_vidc_bus_iris33.c index a21bb5fc64..52e2a7091a 100644 --- a/driver/variant/iris33/src/msm_vidc_bus_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_bus_iris33.c @@ -165,9 +165,9 @@ u32 get_compression_factors(struct compression_factors *compression_factor, if ((codec_input.regression_mode == 3) && /* input cr numbers from interface */ ((codec_input.cr_dpb != 0) || (codec_input.cr_opb != 0))) { - compression_factor->dpb_cf_y = (u32)(codec_input.cr_dpb * 100); - compression_factor->dpb_cf_cbcr = (u32)(codec_input.cr_dpb * 100); - compression_factor->opb_cf_ycbcr = (u32)(codec_input.cr_opb * 100); + compression_factor->dpb_cf_y = codec_input.cr_dpb; + compression_factor->dpb_cf_cbcr = codec_input.cr_dpb; + compression_factor->opb_cf_ycbcr = codec_input.cr_opb; } } else { /* encoder */ /* @@ -196,9 +196,9 @@ u32 get_compression_factors(struct compression_factors *compression_factor, if ((codec_input.regression_mode == 3) && /* input cr from interface */ ((codec_input.cr_ipb != 0) || (codec_input.cr_rpb != 0))) { - compression_factor->dpb_cf_y = (u32)(codec_input.cr_rpb * 100); - compression_factor->dpb_cf_cbcr = (u32)(codec_input.cr_rpb * 100); - compression_factor->ipb_cr_y = (u32)(codec_input.cr_ipb * 100); + compression_factor->dpb_cf_y = codec_input.cr_rpb; + compression_factor->dpb_cf_cbcr = codec_input.cr_rpb; + compression_factor->ipb_cr_y = codec_input.cr_ipb; } } @@ -1020,4 +1020,4 @@ int msm_vidc_calculate_bandwidth(struct api_calculation_input codec_input, } return rc; -} \ No newline at end of file +} From 9528c09bf45fd2283b290da11eb4a069ef72ce92 Mon Sep 17 00:00:00 2001 From: Dikshita Agarwal Date: Wed, 5 Jul 2023 15:09:30 +0530 Subject: [PATCH 0967/1061] video: driver: replace msm_vidc_vmem_alloc/free replace msm_vidc_vmem_alloc/free with direct calls to vzalloc and vfree. Change-Id: Iafde62dd7f54b99418207d10ff71589bf0efd5ed Signed-off-by: Dikshita Agarwal --- driver/vidc/inc/msm_vidc_memory.h | 2 -- driver/vidc/src/msm_vidc.c | 8 +++-- driver/vidc/src/msm_vidc_control.c | 23 ++++++------- driver/vidc/src/msm_vidc_debug.c | 27 ++++++++++------ driver/vidc/src/msm_vidc_driver.c | 52 +++++++++++++++++------------- driver/vidc/src/msm_vidc_fence.c | 9 +++--- driver/vidc/src/msm_vidc_memory.c | 36 ++++----------------- driver/vidc/src/msm_vidc_synx.c | 9 +++--- driver/vidc/src/venus_hfi.c | 8 +++-- 9 files changed, 85 insertions(+), 89 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_memory.h b/driver/vidc/inc/msm_vidc_memory.h index de31f2c62c..f403a59d87 100644 --- a/driver/vidc/inc/msm_vidc_memory.h +++ b/driver/vidc/inc/msm_vidc_memory.h @@ -45,8 +45,6 @@ struct msm_memory_pool { struct list_head busy_pool; /* list of struct msm_memory_alloc_header */ }; -int msm_vidc_vmem_alloc(unsigned long size, void **mem, const char *msg); -void msm_vidc_vmem_free(void **addr); void *msm_vidc_pool_alloc(struct msm_vidc_inst *inst, enum msm_memory_pool_type type); void msm_vidc_pool_free(struct msm_vidc_inst *inst, void *vidc_buf); diff --git a/driver/vidc/src/msm_vidc.c b/driver/vidc/src/msm_vidc.c index 7ca1d07617..d8709f6f7d 100644 --- a/driver/vidc/src/msm_vidc.c +++ b/driver/vidc/src/msm_vidc.c @@ -711,9 +711,11 @@ void *msm_vidc_open(struct msm_vidc_core *core, u32 session_type) if (rc) return NULL; - rc = msm_vidc_vmem_alloc(sizeof(*inst), (void **)&inst, "inst memory"); - if (rc) + inst = vzalloc(sizeof(*inst)); + if (!inst) { + d_vpr_e("%s: allocation failed\n", __func__); return NULL; + } inst->core = core; inst->domain = session_type; @@ -853,7 +855,7 @@ fail_add_session: mutex_destroy(&inst->client_lock); mutex_destroy(&inst->ctx_q_lock); mutex_destroy(&inst->lock); - msm_vidc_vmem_free((void **)&inst); + vfree(inst); return NULL; } diff --git a/driver/vidc/src/msm_vidc_control.c b/driver/vidc/src/msm_vidc_control.c index 10af90f248..7dadc33bef 100644 --- a/driver/vidc/src/msm_vidc_control.c +++ b/driver/vidc/src/msm_vidc_control.c @@ -183,10 +183,11 @@ static int add_node_list(struct list_head *list, enum msm_vidc_inst_capability_t int rc = 0; struct msm_vidc_inst_cap_entry *entry = NULL; - rc = msm_vidc_vmem_alloc(sizeof(struct msm_vidc_inst_cap_entry), - (void **)&entry, __func__); - if (rc) - return rc; + entry = vzalloc(sizeof(*entry)); + if (!entry) { + d_vpr_e("%s: allocation failed\n", __func__); + return -ENOMEM; + } INIT_LIST_HEAD(&entry->list); entry->cap_id = cap_id; @@ -403,7 +404,7 @@ static int msm_vidc_adjust_dynamic_property(struct msm_vidc_inst *inst, } list_del_init(&entry->list); - msm_vidc_vmem_free((void **)&entry); + vfree(entry); } /* expecting children_list to be empty */ @@ -418,12 +419,12 @@ error: list_for_each_entry_safe(entry, temp, &inst->children_list, list) { i_vpr_e(inst, "%s: child list: %s\n", __func__, cap_name(entry->cap_id)); list_del_init(&entry->list); - msm_vidc_vmem_free((void **)&entry); + vfree(entry); } list_for_each_entry_safe(entry, temp, &inst->firmware_list, list) { i_vpr_e(inst, "%s: fw list: %s\n", __func__, cap_name(entry->cap_id)); list_del_init(&entry->list); - msm_vidc_vmem_free((void **)&entry); + vfree(entry); } return rc; @@ -442,7 +443,7 @@ static int msm_vidc_set_dynamic_property(struct msm_vidc_inst *inst) goto error; list_del_init(&entry->list); - msm_vidc_vmem_free((void **)&entry); + vfree(entry); } return 0; @@ -450,7 +451,7 @@ error: list_for_each_entry_safe(entry, temp, &inst->firmware_list, list) { i_vpr_e(inst, "%s: fw list: %s\n", __func__, cap_name(entry->cap_id)); list_del_init(&entry->list); - msm_vidc_vmem_free((void **)&entry); + vfree(entry); } return rc; @@ -1029,12 +1030,12 @@ error: list_for_each_entry_safe(entry, temp, &opt_list, list) { i_vpr_e(inst, "%s: opt_list: %s\n", __func__, cap_name(entry->cap_id)); list_del_init(&entry->list); - msm_vidc_vmem_free((void **)&entry); + vfree(entry); } list_for_each_entry_safe(entry, temp, &leaf_list, list) { i_vpr_e(inst, "%s: leaf_list: %s\n", __func__, cap_name(entry->cap_id)); list_del_init(&entry->list); - msm_vidc_vmem_free((void **)&entry); + vfree(entry); } return rc; } diff --git a/driver/vidc/src/msm_vidc_debug.c b/driver/vidc/src/msm_vidc_debug.c index d3010453d1..9be5f0ee0f 100644 --- a/driver/vidc/src/msm_vidc_debug.c +++ b/driver/vidc/src/msm_vidc_debug.c @@ -291,16 +291,17 @@ static ssize_t core_info_read(struct file *file, char __user *buf, struct msm_vidc_core *core = file->private_data; char *cur, *end, *dbuf = NULL; ssize_t len = 0; - int rc = 0; if (!core) { d_vpr_e("%s: invalid params %pK\n", __func__, core); return 0; } - rc = msm_vidc_vmem_alloc(MAX_DBG_BUF_SIZE, (void **)&dbuf, __func__); - if (rc) - return rc; + dbuf = vzalloc(MAX_DBG_BUF_SIZE); + if (!dbuf) { + d_vpr_e("%s: allocation failed\n", __func__); + return -ENOMEM; + } cur = dbuf; end = cur + MAX_DBG_BUF_SIZE; @@ -316,7 +317,7 @@ static ssize_t core_info_read(struct file *file, char __user *buf, len = simple_read_from_buffer(buf, count, ppos, dbuf, cur - dbuf); - msm_vidc_vmem_free((void **)&dbuf); + vfree(dbuf); return len; } @@ -589,10 +590,13 @@ static ssize_t inst_info_read(struct file *file, char __user *buf, return 0; } - if (msm_vidc_vmem_alloc(MAX_DBG_BUF_SIZE, (void **)&dbuf, __func__)) { + dbuf = vzalloc(MAX_DBG_BUF_SIZE); + if (!dbuf) { + i_vpr_e(inst, "%s: allocation failed\n", __func__); len = -ENOMEM; goto failed_alloc; } + cur = dbuf; end = cur + MAX_DBG_BUF_SIZE; @@ -645,7 +649,7 @@ static ssize_t inst_info_read(struct file *file, char __user *buf, len = simple_read_from_buffer(buf, count, ppos, dbuf, cur - dbuf); - msm_vidc_vmem_free((void **)&dbuf); + vfree(dbuf); failed_alloc: put_inst(inst); return len; @@ -672,8 +676,11 @@ struct dentry *msm_vidc_debugfs_init_inst(struct msm_vidc_inst *inst, struct den snprintf(debugfs_name, MAX_DEBUGFS_NAME, "inst_%d", inst->session_id); - if (msm_vidc_vmem_alloc(sizeof(struct core_inst_pair), (void **)&idata, __func__)) + idata = vzalloc(sizeof(*idata)); + if (!idata) { + i_vpr_e(inst, "%s: allocation failed\n", __func__); goto exit; + } idata->core = inst->core; idata->inst = inst; @@ -703,7 +710,7 @@ failed_create_file: debugfs_remove_recursive(dir); dir = NULL; failed_create_dir: - msm_vidc_vmem_free((void **)&idata); + vfree(idata); exit: return dir; } @@ -719,7 +726,7 @@ void msm_vidc_debugfs_deinit_inst(struct msm_vidc_inst *inst) if (dentry->d_inode) { i_vpr_l(inst, "%s: Destroy %pK\n", __func__, dentry->d_inode->i_private); - msm_vidc_vmem_free(&dentry->d_inode->i_private); + vfree(dentry->d_inode->i_private); dentry->d_inode->i_private = NULL; } debugfs_remove_recursive(dentry); diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index f3637e28ba..36f86a811d 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -2293,9 +2293,11 @@ static void msm_vidc_update_input_cr(struct msm_vidc_inst *inst, u32 idx, u32 cr } if (!found) { temp = NULL; - if (msm_vidc_vmem_alloc(sizeof(*temp), (void **)&temp, __func__)) + temp = vzalloc(sizeof(*temp)); + if (!temp) { + i_vpr_e(inst, "%s: allocation failed\n", __func__); return; - + } temp->index = idx; temp->input_cr = cr; list_add_tail(&temp->list, &inst->enc_input_crs); @@ -3084,20 +3086,24 @@ int msm_vidc_vb2_queue_init(struct msm_vidc_inst *inst) } inst->fh.m2m_ctx = inst->m2m_ctx; - rc = msm_vidc_vmem_alloc(sizeof(struct vb2_queue), - (void **)&inst->bufq[INPUT_META_PORT].vb2q, "input meta port"); - if (rc) + inst->bufq[INPUT_META_PORT].vb2q = vzalloc(sizeof(*inst->bufq[INPUT_META_PORT].vb2q)); + if (!inst->bufq[INPUT_META_PORT].vb2q) { + i_vpr_e(inst, "%s: allocation failed\n", __func__); + rc = -ENOMEM; goto fail_in_meta_alloc; + } /* do input meta port queues initialization */ rc = vb2q_init(inst, inst->bufq[INPUT_META_PORT].vb2q, INPUT_META_PLANE); if (rc) goto fail_in_meta_vb2q_init; - rc = msm_vidc_vmem_alloc(sizeof(struct vb2_queue), - (void **)&inst->bufq[OUTPUT_META_PORT].vb2q, "output meta port"); - if (rc) + inst->bufq[OUTPUT_META_PORT].vb2q = vzalloc(sizeof(*inst->bufq[OUTPUT_META_PORT].vb2q)); + if (!inst->bufq[OUTPUT_META_PORT].vb2q) { + i_vpr_e(inst, "%s: allocation failed\n", __func__); + rc = -ENOMEM; goto fail_out_meta_alloc; + } /* do output meta port queues initialization */ rc = vb2q_init(inst, inst->bufq[OUTPUT_META_PORT].vb2q, OUTPUT_META_PLANE); @@ -3107,12 +3113,12 @@ int msm_vidc_vb2_queue_init(struct msm_vidc_inst *inst) return 0; fail_out_meta_vb2q_init: - msm_vidc_vmem_free((void **)&inst->bufq[OUTPUT_META_PORT].vb2q); + vfree(inst->bufq[OUTPUT_META_PORT].vb2q); inst->bufq[OUTPUT_META_PORT].vb2q = NULL; fail_out_meta_alloc: vb2_queue_release(inst->bufq[INPUT_META_PORT].vb2q); fail_in_meta_vb2q_init: - msm_vidc_vmem_free((void **)&inst->bufq[INPUT_META_PORT].vb2q); + vfree(inst->bufq[INPUT_META_PORT].vb2q); inst->bufq[INPUT_META_PORT].vb2q = NULL; fail_in_meta_alloc: v4l2_m2m_ctx_release(inst->m2m_ctx); @@ -3148,10 +3154,10 @@ int msm_vidc_vb2_queue_deinit(struct msm_vidc_inst *inst) inst->m2m_dev = NULL; vb2_queue_release(inst->bufq[OUTPUT_META_PORT].vb2q); - msm_vidc_vmem_free((void **)&inst->bufq[OUTPUT_META_PORT].vb2q); + vfree(inst->bufq[OUTPUT_META_PORT].vb2q); inst->bufq[OUTPUT_META_PORT].vb2q = NULL; vb2_queue_release(inst->bufq[INPUT_META_PORT].vb2q); - msm_vidc_vmem_free((void **)&inst->bufq[INPUT_META_PORT].vb2q); + vfree(inst->bufq[INPUT_META_PORT].vb2q); inst->bufq[INPUT_META_PORT].vb2q = NULL; return rc; @@ -3243,9 +3249,11 @@ int msm_vidc_session_open(struct msm_vidc_inst *inst) int rc = 0; inst->packet_size = 4096; - rc = msm_vidc_vmem_alloc(inst->packet_size, (void **)&inst->packet, __func__); - if (rc) - return rc; + inst->packet = vzalloc(inst->packet_size); + if (!inst->packet) { + i_vpr_e(inst, "%s: allocation failed\n", __func__); + return -ENOMEM; + } rc = venus_hfi_session_open(inst); if (rc) @@ -3254,7 +3262,7 @@ int msm_vidc_session_open(struct msm_vidc_inst *inst) return 0; error: i_vpr_e(inst, "%s(): session open failed\n", __func__); - msm_vidc_vmem_free((void **)&inst->packet); + vfree(inst->packet); inst->packet = NULL; return rc; } @@ -3395,7 +3403,7 @@ int msm_vidc_session_close(struct msm_vidc_inst *inst) /* we are not supposed to send any more commands after close */ i_vpr_h(inst, "%s: free session packet data\n", __func__); - msm_vidc_vmem_free((void **)&inst->packet); + vfree(inst->packet); inst->packet = NULL; if (wait_for_response) { @@ -4416,23 +4424,23 @@ void msm_vidc_destroy_buffers(struct msm_vidc_inst *inst) list_for_each_entry_safe(entry, dummy_entry, &inst->firmware_list, list) { i_vpr_e(inst, "%s: fw list: %s\n", __func__, cap_name(entry->cap_id)); list_del(&entry->list); - msm_vidc_vmem_free((void **)&entry); + vfree(entry); } list_for_each_entry_safe(entry, dummy_entry, &inst->children_list, list) { i_vpr_e(inst, "%s: child list: %s\n", __func__, cap_name(entry->cap_id)); list_del(&entry->list); - msm_vidc_vmem_free((void **)&entry); + vfree(entry); } list_for_each_entry_safe(entry, dummy_entry, &inst->caps_list, list) { list_del(&entry->list); - msm_vidc_vmem_free((void **)&entry); + vfree(entry); } list_for_each_entry_safe(cr, dummy_cr, &inst->enc_input_crs, list) { list_del(&cr->list); - msm_vidc_vmem_free((void **)&cr); + vfree(cr); } list_for_each_entry_safe(fence, dummy_fence, &inst->fence_list, list) { @@ -4476,7 +4484,7 @@ static void msm_vidc_close_helper(struct kref *kref) mutex_destroy(&inst->client_lock); mutex_destroy(&inst->ctx_q_lock); mutex_destroy(&inst->lock); - msm_vidc_vmem_free((void **)&inst); + vfree(inst); } struct msm_vidc_inst *get_inst_ref(struct msm_vidc_core *core, diff --git a/driver/vidc/src/msm_vidc_fence.c b/driver/vidc/src/msm_vidc_fence.c index 00e869d057..382baf0733 100644 --- a/driver/vidc/src/msm_vidc_fence.c +++ b/driver/vidc/src/msm_vidc_fence.c @@ -36,7 +36,7 @@ static void msm_vidc_dma_fence_release(struct dma_fence *df) if (df) { fence = container_of(df, struct msm_vidc_fence, dma_fence); d_vpr_l("%s: name %s\n", __func__, fence->name); - msm_vidc_vmem_free((void **)&fence); + vfree(fence); } else { d_vpr_e("%s: invalid fence\n", __func__); } @@ -51,11 +51,12 @@ static const struct dma_fence_ops msm_vidc_dma_fence_ops = { struct msm_vidc_fence *msm_vidc_fence_create(struct msm_vidc_inst *inst) { struct msm_vidc_fence *fence = NULL; - int rc = 0; - rc = msm_vidc_vmem_alloc(sizeof(*fence), (void **)&fence, __func__); - if (rc) + fence = vzalloc(sizeof(*fence)); + if (!fence) { + i_vpr_e(inst, "%s: allocation failed\n", __func__); return NULL; + } fence->fd = INVALID_FD; spin_lock_init(&fence->lock); diff --git a/driver/vidc/src/msm_vidc_memory.c b/driver/vidc/src/msm_vidc_memory.c index 1cd2f5b564..576ea0ff09 100644 --- a/driver/vidc/src/msm_vidc_memory.c +++ b/driver/vidc/src/msm_vidc_memory.c @@ -38,32 +38,6 @@ static const struct msm_vidc_type_size_name buftype_size_name_arr[] = { {MSM_MEM_POOL_BUF_STATS, sizeof(struct msm_vidc_buffer_stats), "MSM_MEM_POOL_BUF_STATS"}, }; -int msm_vidc_vmem_alloc(unsigned long size, void **mem, const char *msg) -{ - int rc = 0; - - if (*mem) { - d_vpr_e("%s: error: double alloc\n", msg); - rc = -EINVAL; - } - - *mem = vzalloc(size); - if (!*mem) { - d_vpr_e("allocation failed for %s\n", msg); - rc = -ENOMEM; - } - - return rc; -} - -void msm_vidc_vmem_free(void **addr) -{ - if (addr && *addr) { - vfree(*addr); - *addr = NULL; - } -} - void *msm_vidc_pool_alloc(struct msm_vidc_inst *inst, enum msm_memory_pool_type type) { struct msm_memory_alloc_header *hdr = NULL; @@ -92,9 +66,11 @@ void *msm_vidc_pool_alloc(struct msm_vidc_inst *inst, enum msm_memory_pool_type return hdr->buf; } - if (msm_vidc_vmem_alloc(pool->size + sizeof(struct msm_memory_alloc_header), - (void **)&hdr, __func__)) + hdr = vzalloc(pool->size + sizeof(struct msm_memory_alloc_header)); + if (!hdr) { + i_vpr_e(inst, "%s: allocation failed\n", __func__); return NULL; + } INIT_LIST_HEAD(&hdr->list); hdr->type = type; @@ -162,14 +138,14 @@ static void msm_vidc_destroy_pool_buffers(struct msm_vidc_inst *inst, /* destroy all free buffers */ list_for_each_entry_safe(hdr, dummy, &pool->free_pool, list) { list_del(&hdr->list); - msm_vidc_vmem_free((void **)&hdr); + vfree(hdr); fcount++; } /* destroy all busy buffers */ list_for_each_entry_safe(hdr, dummy, &pool->busy_pool, list) { list_del(&hdr->list); - msm_vidc_vmem_free((void **)&hdr); + vfree(hdr); bcount++; } diff --git a/driver/vidc/src/msm_vidc_synx.c b/driver/vidc/src/msm_vidc_synx.c index ff2f8480fb..3a694e9198 100644 --- a/driver/vidc/src/msm_vidc_synx.c +++ b/driver/vidc/src/msm_vidc_synx.c @@ -62,7 +62,7 @@ static void msm_vidc_synx_fence_release(struct dma_fence *df) __func__, fence->name); } - msm_vidc_vmem_free((void **)&fence); + vfree(fence); return; } @@ -178,11 +178,12 @@ static int msm_vidc_synx_fence_deregister(struct msm_vidc_core *core) static struct msm_vidc_fence *msm_vidc_synx_dma_fence_create(struct msm_vidc_inst *inst) { struct msm_vidc_fence *fence = NULL; - int rc = 0; - rc = msm_vidc_vmem_alloc(sizeof(*fence), (void **)&fence, __func__); - if (rc) + fence = vzalloc(sizeof(*fence)); + if (!fence) { + i_vpr_e(inst, "%s: allocation failed\n", __func__); return NULL; + } fence->fd = INVALID_FD; spin_lock_init(&fence->lock); diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index c9c32ee250..5e8e03ec5f 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -116,9 +116,11 @@ static void __flush_debug_queue(struct msm_vidc_core *core, enum vidc_msg_prio_fw log_level_fw = msm_fw_debug; if (!packet || !packet_size) { - if (msm_vidc_vmem_alloc(VIDC_IFACEQ_VAR_HUGE_PKT_SIZE, - (void **)&packet, __func__)) + packet = vzalloc(VIDC_IFACEQ_VAR_HUGE_PKT_SIZE); + if (!packet) { + d_vpr_e("%s: allocation failed\n", __func__); return; + } packet_size = VIDC_IFACEQ_VAR_HUGE_PKT_SIZE; local_packet = true; @@ -157,7 +159,7 @@ static void __flush_debug_queue(struct msm_vidc_core *core, } if (local_packet) - msm_vidc_vmem_free((void **)&packet); + vfree(packet); } static int __cmdq_write(struct msm_vidc_core *core, void *pkt) From 50a257d310d6fa830dd60eb8f6cbd8749d429874 Mon Sep 17 00:00:00 2001 From: Ankush Mitra Date: Wed, 12 Jul 2023 18:15:31 +0530 Subject: [PATCH 0968/1061] video: driver: fix No space is necessary after a cast err Fix this warning in checker. Change-Id: I2f90b2f8b3fddb55a3b1dd9b0e4ca227e46ed42f Signed-off-by: Ankush Mitra --- .../platform/common/src/msm_vidc_platform.c | 84 +++++++++---------- .../common/src/msm_vidc_platform_ext.c | 10 +-- .../pineapple/src/msm_vidc_pineapple.c | 2 +- driver/platform/pineapple/src/pineapple.c | 2 +- driver/variant/iris2/src/msm_vidc_iris2.c | 2 +- driver/variant/iris3/src/msm_vidc_iris3.c | 2 +- driver/variant/iris33/src/msm_vidc_iris33.c | 2 +- driver/vidc/src/msm_vidc_power.c | 2 +- driver/vidc/src/venus_hfi.c | 2 +- driver/vidc/src/venus_hfi_queue.c | 4 +- 10 files changed, 56 insertions(+), 56 deletions(-) diff --git a/driver/platform/common/src/msm_vidc_platform.c b/driver/platform/common/src/msm_vidc_platform.c index a6c8760afa..89914f0bcf 100644 --- a/driver/platform/common/src/msm_vidc_platform.c +++ b/driver/platform/common/src/msm_vidc_platform.c @@ -673,7 +673,7 @@ int msm_vidc_packetize_control(struct msm_vidc_inst *inst, int msm_vidc_adjust_entropy_mode(void *instance, struct v4l2_ctrl *ctrl) { s32 adjusted_value; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; s32 profile = -1; /* ctrl is always NULL in streamon case */ @@ -703,7 +703,7 @@ int msm_vidc_adjust_entropy_mode(void *instance, struct v4l2_ctrl *ctrl) int msm_vidc_adjust_bitrate_mode(void *instance, struct v4l2_ctrl *ctrl) { - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; int lossless, frame_rc, bitrate_mode, frame_skip; u32 hfi_value = 0; @@ -745,7 +745,7 @@ update: int msm_vidc_adjust_profile(void *instance, struct v4l2_ctrl *ctrl) { s32 adjusted_value; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; s32 pix_fmt = -1; adjusted_value = ctrl ? ctrl->val : inst->capabilities[PROFILE].value; @@ -781,7 +781,7 @@ int msm_vidc_adjust_profile(void *instance, struct v4l2_ctrl *ctrl) int msm_vidc_adjust_ltr_count(void *instance, struct v4l2_ctrl *ctrl) { s32 adjusted_value; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; s32 rc_type = -1, all_intra = 0, pix_fmts = MSM_VIDC_FMT_NONE; s32 layer_type = -1, enh_layer_count = -1; u32 num_ref_frames = 0, max_exceeding_ref_frames = 0; @@ -855,7 +855,7 @@ exit: int msm_vidc_adjust_use_ltr(void *instance, struct v4l2_ctrl *ctrl) { s32 adjusted_value, ltr_count; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; adjusted_value = ctrl ? ctrl->val : inst->capabilities[USE_LTR].value; @@ -890,7 +890,7 @@ int msm_vidc_adjust_use_ltr(void *instance, struct v4l2_ctrl *ctrl) int msm_vidc_adjust_mark_ltr(void *instance, struct v4l2_ctrl *ctrl) { s32 adjusted_value, ltr_count; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; adjusted_value = ctrl ? ctrl->val : inst->capabilities[MARK_LTR].value; @@ -921,7 +921,7 @@ int msm_vidc_adjust_mark_ltr(void *instance, struct v4l2_ctrl *ctrl) int msm_vidc_adjust_delta_based_rc(void *instance, struct v4l2_ctrl *ctrl) { s32 adjusted_value; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; s32 rc_type = -1; adjusted_value = ctrl ? ctrl->val : @@ -943,7 +943,7 @@ int msm_vidc_adjust_delta_based_rc(void *instance, struct v4l2_ctrl *ctrl) int msm_vidc_adjust_output_order(void *instance, struct v4l2_ctrl *ctrl) { - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; s32 tn_mode = -1, display_delay = -1, display_delay_enable = -1; u32 adjusted_value; @@ -977,7 +977,7 @@ int msm_vidc_adjust_output_order(void *instance, struct v4l2_ctrl *ctrl) int msm_vidc_adjust_input_buf_host_max_count(void *instance, struct v4l2_ctrl *ctrl) { - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; u32 adjusted_value; @@ -995,7 +995,7 @@ int msm_vidc_adjust_input_buf_host_max_count(void *instance, struct v4l2_ctrl *c int msm_vidc_adjust_output_buf_host_max_count(void *instance, struct v4l2_ctrl *ctrl) { - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; u32 adjusted_value; @@ -1015,7 +1015,7 @@ int msm_vidc_adjust_output_buf_host_max_count(void *instance, struct v4l2_ctrl * int msm_vidc_adjust_transform_8x8(void *instance, struct v4l2_ctrl *ctrl) { s32 adjusted_value; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; s32 profile = -1; adjusted_value = ctrl ? ctrl->val : @@ -1046,7 +1046,7 @@ int msm_vidc_adjust_chroma_qp_index_offset(void *instance, struct v4l2_ctrl *ctrl) { s32 adjusted_value; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; adjusted_value = ctrl ? ctrl->val : inst->capabilities[CHROMA_QP_INDEX_OFFSET].value; @@ -1103,7 +1103,7 @@ static u32 msm_vidc_get_cumulative_bitrate(struct msm_vidc_inst *inst) int msm_vidc_adjust_slice_count(void *instance, struct v4l2_ctrl *ctrl) { - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; struct v4l2_format *output_fmt; s32 adjusted_value, rc_type = -1, slice_mode, all_intra = 0, @@ -1308,7 +1308,7 @@ int msm_vidc_adjust_layer_count(void *instance, struct v4l2_ctrl *ctrl) int rc = 0; s32 client_layer_count; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; client_layer_count = ctrl ? ctrl->val : inst->capabilities[ENH_LAYER_COUNT].value; @@ -1412,7 +1412,7 @@ exit: int msm_vidc_adjust_bitrate(void *instance, struct v4l2_ctrl *ctrl) { int i, rc = 0; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; s32 adjusted_value, enh_layer_count; u32 cumulative_bitrate = 0, cap_id = 0, cap_value = 0; @@ -1498,7 +1498,7 @@ int msm_vidc_adjust_bitrate(void *instance, struct v4l2_ctrl *ctrl) int msm_vidc_adjust_layer_bitrate(void *instance, struct v4l2_ctrl *ctrl) { int rc = 0; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; u32 cumulative_bitrate = 0; u32 client_set_cap_id = INST_CAP_NONE; @@ -1572,7 +1572,7 @@ int msm_vidc_adjust_layer_bitrate(void *instance, struct v4l2_ctrl *ctrl) int msm_vidc_adjust_peak_bitrate(void *instance, struct v4l2_ctrl *ctrl) { s32 adjusted_value; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; s32 rc_type = -1, bitrate = -1; adjusted_value = ctrl ? ctrl->val : @@ -1643,7 +1643,7 @@ int msm_vidc_adjust_hevc_min_qp(void *instance, struct v4l2_ctrl *ctrl) { int rc = 0; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; if (ctrl) msm_vidc_update_cap_value(inst, MIN_FRAME_QP, @@ -1658,7 +1658,7 @@ int msm_vidc_adjust_hevc_max_qp(void *instance, struct v4l2_ctrl *ctrl) { int rc = 0; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; if (ctrl) msm_vidc_update_cap_value(inst, MAX_FRAME_QP, @@ -1673,7 +1673,7 @@ int msm_vidc_adjust_hevc_i_frame_qp(void *instance, struct v4l2_ctrl *ctrl) { int rc = 0; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; if (ctrl) msm_vidc_update_cap_value(inst, I_FRAME_QP, @@ -1690,7 +1690,7 @@ int msm_vidc_adjust_hevc_p_frame_qp(void *instance, struct v4l2_ctrl *ctrl) { int rc = 0; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; if (ctrl) msm_vidc_update_cap_value(inst, P_FRAME_QP, @@ -1707,7 +1707,7 @@ int msm_vidc_adjust_hevc_b_frame_qp(void *instance, struct v4l2_ctrl *ctrl) { int rc = 0; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; if (ctrl) msm_vidc_update_cap_value(inst, B_FRAME_QP, @@ -1723,7 +1723,7 @@ int msm_vidc_adjust_hevc_b_frame_qp(void *instance, struct v4l2_ctrl *ctrl) int msm_vidc_adjust_blur_type(void *instance, struct v4l2_ctrl *ctrl) { s32 adjusted_value; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; s32 rc_type = -1, roi_enable = -1; s32 pix_fmts = -1, min_quality = -1; @@ -1781,7 +1781,7 @@ int msm_vidc_adjust_all_intra(void *instance, struct v4l2_ctrl *ctrl) { s32 adjusted_value; struct msm_vidc_core *core; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; s32 gop_size = -1, bframe = -1; u32 width, height, fps, mbps, max_mbps; @@ -1820,7 +1820,7 @@ exit: int msm_vidc_adjust_blur_resolution(void *instance, struct v4l2_ctrl *ctrl) { s32 adjusted_value; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; s32 blur_type = -1; adjusted_value = ctrl ? ctrl->val : @@ -1842,7 +1842,7 @@ int msm_vidc_adjust_blur_resolution(void *instance, struct v4l2_ctrl *ctrl) int msm_vidc_adjust_brs(void *instance, struct v4l2_ctrl *ctrl) { s32 adjusted_value; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; s32 rc_type = -1, layer_enabled = -1, layer_type = -1; bool hp_requested = false; @@ -1896,7 +1896,7 @@ adjust: int msm_vidc_adjust_bitrate_boost(void *instance, struct v4l2_ctrl *ctrl) { s32 adjusted_value; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; s32 min_quality = -1, rc_type = -1; u32 max_bitrate = 0, bitrate = 0; @@ -1947,7 +1947,7 @@ adjust: int msm_vidc_adjust_min_quality(void *instance, struct v4l2_ctrl *ctrl) { s32 adjusted_value; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; s32 roi_enable = -1, rc_type = -1, enh_layer_count = -1, pix_fmts = -1; u32 width, height, frame_rate; struct v4l2_format *f; @@ -2055,7 +2055,7 @@ update_and_exit: int msm_vidc_adjust_preprocess(void *instance, struct v4l2_ctrl *ctrl) { s32 adjusted_value; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; s32 brs = 0; u32 width, height, frame_rate, operating_rate, max_fps; struct v4l2_format *f; @@ -2107,7 +2107,7 @@ update_preprocess: int msm_vidc_adjust_enc_lowlatency_mode(void *instance, struct v4l2_ctrl *ctrl) { s32 adjusted_value; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; s32 rc_type = -1; adjusted_value = ctrl ? ctrl->val : @@ -2131,7 +2131,7 @@ int msm_vidc_adjust_enc_lowlatency_mode(void *instance, struct v4l2_ctrl *ctrl) int msm_vidc_adjust_dec_lowlatency_mode(void *instance, struct v4l2_ctrl *ctrl) { s32 adjusted_value; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; s32 outbuf_fence = MSM_VIDC_META_DISABLE; adjusted_value = ctrl ? ctrl->val : @@ -2190,7 +2190,7 @@ int msm_vidc_adjust_session_priority(void *instance, struct v4l2_ctrl *ctrl) int msm_vidc_adjust_roi_info(void *instance, struct v4l2_ctrl *ctrl) { s32 adjusted_value; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; s32 rc_type = -1, pix_fmt = -1; adjusted_value = ctrl ? ctrl->val : inst->capabilities[META_ROI_INFO].value; @@ -2218,7 +2218,7 @@ int msm_vidc_adjust_dec_outbuf_fence_type(void *instance, struct v4l2_ctrl *ctrl { struct msm_vidc_inst_cap *capability; s32 adjusted_value, meta_outbuf_fence = 0; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; struct msm_vidc_core *core; capability = inst->capabilities; @@ -2250,7 +2250,7 @@ int msm_vidc_adjust_dec_outbuf_fence_direction(void *instance, struct v4l2_ctrl { struct msm_vidc_inst_cap *capability; s32 adjusted_value, meta_outbuf_fence = 0; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; struct msm_vidc_core *core; capability = inst->capabilities; @@ -2277,7 +2277,7 @@ int msm_vidc_adjust_dec_outbuf_fence_direction(void *instance, struct v4l2_ctrl int msm_vidc_adjust_dec_slice_mode(void *instance, struct v4l2_ctrl *ctrl) { - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; u32 adjusted_value = 0; s32 low_latency = -1; s32 picture_order = -1; @@ -2306,7 +2306,7 @@ int msm_vidc_adjust_dec_slice_mode(void *instance, struct v4l2_ctrl *ctrl) int msm_vidc_adjust_eva_stats(void *instance, struct v4l2_ctrl *ctrl) { s32 adjusted_value; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; s32 rc_type = -1; adjusted_value = ctrl ? ctrl->val : inst->capabilities[META_EVA_STATS].value; @@ -2330,7 +2330,7 @@ int msm_vidc_adjust_eva_stats(void *instance, struct v4l2_ctrl *ctrl) int msm_vidc_adjust_sei_mastering_disp(void *instance, struct v4l2_ctrl *ctrl) { s32 adjusted_value; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; s32 profile = -1; adjusted_value = ctrl ? ctrl->val : inst->capabilities[META_SEI_MASTERING_DISP].value; @@ -2361,7 +2361,7 @@ adjust: int msm_vidc_adjust_sei_cll(void *instance, struct v4l2_ctrl *ctrl) { s32 adjusted_value; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; s32 profile = -1; adjusted_value = ctrl ? ctrl->val : inst->capabilities[META_SEI_CLL].value; @@ -2391,7 +2391,7 @@ adjust: int msm_vidc_adjust_hdr10plus(void *instance, struct v4l2_ctrl *ctrl) { s32 adjusted_value; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; s32 profile = -1; adjusted_value = ctrl ? ctrl->val : inst->capabilities[META_HDR10PLUS].value; @@ -2421,7 +2421,7 @@ adjust: int msm_vidc_adjust_transcoding_stats(void *instance, struct v4l2_ctrl *ctrl) { s32 adjusted_value; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; s32 rc_type = -1; u32 width, height, fps; struct v4l2_format *f; @@ -2479,7 +2479,7 @@ int msm_vidc_set_header_mode(void *instance, enum msm_vidc_inst_capability_type cap_id) { int rc = 0; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; int header_mode, prepend_sps_pps; u32 hfi_value = 0; @@ -2509,7 +2509,7 @@ int msm_vidc_set_deblock_mode(void *instance, enum msm_vidc_inst_capability_type cap_id) { int rc = 0; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; s32 alpha = 0, beta = 0; u32 lf_mode, hfi_value = 0, lf_offset = 6; diff --git a/driver/platform/common/src/msm_vidc_platform_ext.c b/driver/platform/common/src/msm_vidc_platform_ext.c index cc8460157b..3e14bb0b1a 100644 --- a/driver/platform/common/src/msm_vidc_platform_ext.c +++ b/driver/platform/common/src/msm_vidc_platform_ext.c @@ -18,7 +18,7 @@ int msm_vidc_adjust_ir_period(void *instance, struct v4l2_ctrl *ctrl) { s32 adjusted_value, all_intra = 0, roi_enable = 0, pix_fmts = MSM_VIDC_FMT_NONE; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; adjusted_value = ctrl ? ctrl->val : inst->capabilities[IR_PERIOD].value; @@ -75,7 +75,7 @@ exit: int msm_vidc_adjust_dec_frame_rate(void *instance, struct v4l2_ctrl *ctrl) { - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; u32 adjusted_value = 0; if (is_encode_session(inst)) { @@ -91,7 +91,7 @@ int msm_vidc_adjust_dec_frame_rate(void *instance, struct v4l2_ctrl *ctrl) int msm_vidc_adjust_dec_operating_rate(void *instance, struct v4l2_ctrl *ctrl) { - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; u32 adjusted_value = 0; if (is_encode_session(inst)) { @@ -109,7 +109,7 @@ int msm_vidc_adjust_delivery_mode(void *instance, struct v4l2_ctrl *ctrl) { s32 adjusted_value; s32 slice_mode = -1; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; if (is_decode_session(inst)) return 0; @@ -241,7 +241,7 @@ int msm_vidc_adjust_csc(void *instance, struct v4l2_ctrl *ctrl) { s32 adjusted_value; s32 pix_fmt = -1; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; if (is_decode_session(inst)) return 0; diff --git a/driver/platform/pineapple/src/msm_vidc_pineapple.c b/driver/platform/pineapple/src/msm_vidc_pineapple.c index 7a3c590070..dea8ac5102 100644 --- a/driver/platform/pineapple/src/msm_vidc_pineapple.c +++ b/driver/platform/pineapple/src/msm_vidc_pineapple.c @@ -329,7 +329,7 @@ static int msm_vidc_set_ring_buffer_count_pineapple(void *instance, enum msm_vidc_inst_capability_type cap_id) { int rc = 0; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; struct v4l2_format *output_fmt, *input_fmt; struct msm_vidc_core *core; u32 count = 0, data_size = 0, pixel_count = 0, fps = 0; diff --git a/driver/platform/pineapple/src/pineapple.c b/driver/platform/pineapple/src/pineapple.c index cd08f2a26a..3274f82bbf 100644 --- a/driver/platform/pineapple/src/pineapple.c +++ b/driver/platform/pineapple/src/pineapple.c @@ -228,7 +228,7 @@ static int msm_vidc_set_ring_buffer_count_pineapple(void *instance, enum msm_vidc_inst_capability_type cap_id) { int rc = 0; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; struct v4l2_format *output_fmt, *input_fmt; struct msm_vidc_core *core; u32 count = 0, data_size = 0, pixel_count = 0, fps = 0; diff --git a/driver/variant/iris2/src/msm_vidc_iris2.c b/driver/variant/iris2/src/msm_vidc_iris2.c index d22ca82ca1..fb5de0d510 100644 --- a/driver/variant/iris2/src/msm_vidc_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_iris2.c @@ -846,7 +846,7 @@ exit: int msm_vidc_adjust_blur_type_iris2(void *instance, struct v4l2_ctrl *ctrl) { s32 adjusted_value; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; s32 rc_type = -1, cac = -1; s32 pix_fmts = -1, min_quality = -1; diff --git a/driver/variant/iris3/src/msm_vidc_iris3.c b/driver/variant/iris3/src/msm_vidc_iris3.c index 5d99c5424d..b60fc376b1 100644 --- a/driver/variant/iris3/src/msm_vidc_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_iris3.c @@ -943,7 +943,7 @@ decision_done: int msm_vidc_adjust_bitrate_boost_iris3(void *instance, struct v4l2_ctrl *ctrl) { s32 adjusted_value; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; s32 rc_type = -1; u32 width, height, frame_rate; struct v4l2_format *f; diff --git a/driver/variant/iris33/src/msm_vidc_iris33.c b/driver/variant/iris33/src/msm_vidc_iris33.c index 3f94653b5b..03eca21513 100644 --- a/driver/variant/iris33/src/msm_vidc_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_iris33.c @@ -1224,7 +1224,7 @@ decision_done: int msm_vidc_adjust_bitrate_boost_iris33(void *instance, struct v4l2_ctrl *ctrl) { s32 adjusted_value; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; s32 rc_type = -1; u32 width, height, frame_rate; struct v4l2_format *f; diff --git a/driver/vidc/src/msm_vidc_power.c b/driver/vidc/src/msm_vidc_power.c index ec481bf4c5..d71d5964ea 100644 --- a/driver/vidc/src/msm_vidc_power.c +++ b/driver/vidc/src/msm_vidc_power.c @@ -390,7 +390,7 @@ int msm_vidc_set_clocks(struct msm_vidc_inst *inst) if (i > 0) rate = core->resource->freq_set.freq_tbl[i - 1].freq; } else if (decrement) { - if (i < (int) (core->platform->data.freq_tbl_size - 1)) + if (i < (int)(core->platform->data.freq_tbl_size - 1)) rate = core->resource->freq_set.freq_tbl[i + 1].freq; } core->power.clk_freq = (u32)rate; diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index 5e8e03ec5f..b451a20e2e 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -133,7 +133,7 @@ static void __flush_debug_queue(struct msm_vidc_core *core, } while (!venus_hfi_queue_dbg_read(core, packet)) { - pkt = (struct hfi_debug_header *) packet; + pkt = (struct hfi_debug_header *)packet; if (pkt->size < sizeof(struct hfi_debug_header)) { d_vpr_e("%s: invalid pkt size %d\n", diff --git a/driver/vidc/src/venus_hfi_queue.c b/driver/vidc/src/venus_hfi_queue.c index 90057e763a..98acb02d73 100644 --- a/driver/vidc/src/venus_hfi_queue.c +++ b/driver/vidc/src/venus_hfi_queue.c @@ -72,7 +72,7 @@ static int __write_queue(struct msm_vidc_iface_q_info *qinfo, u8 *packet, return -EINVAL; } - queue = (struct hfi_queue_header *) qinfo->q_hdr; + queue = (struct hfi_queue_header *)qinfo->q_hdr; if (!queue) { d_vpr_e("queue not present\n"); return -ENOENT; @@ -168,7 +168,7 @@ static int __read_queue(struct msm_vidc_iface_q_info *qinfo, u8 *packet, *reading it */ mb(); - queue = (struct hfi_queue_header *) qinfo->q_hdr; + queue = (struct hfi_queue_header *)qinfo->q_hdr; if (!queue) { d_vpr_e("Queue memory is not allocated\n"); From 2576adf41249e73f58f3028f198b6ade7d20c12f Mon Sep 17 00:00:00 2001 From: Anshul Agarwal Date: Fri, 14 Jul 2023 14:48:39 +0530 Subject: [PATCH 0969/1061] video: driver: fix some checker err Fix some checker err Change-Id: I3526a509f4cbb3d91284b21dad851b57bb43f57a Signed-off-by: Anshul Agarwal --- driver/platform/kalama/inc/kalama_technology.h | 2 +- driver/platform/kalama/src/msm_vidc_kalama.c | 11 ++++++----- driver/platform/pineapple/src/msm_vidc_pineapple.c | 11 ++++++----- driver/platform/pineapple/src/pineapple.c | 11 ++++++----- driver/variant/iris2/src/msm_vidc_iris2.c | 2 +- driver/variant/iris3/inc/hfi_buffer_iris3.h | 3 ++- driver/variant/iris3/src/msm_vidc_iris3.c | 4 ++-- driver/variant/iris33/inc/hfi_buffer_iris33.h | 3 ++- driver/variant/iris33/src/msm_vidc_iris33.c | 4 ++-- driver/vidc/src/msm_vdec.c | 14 +++++++------- driver/vidc/src/msm_vidc_buffer.c | 6 ++++-- 11 files changed, 39 insertions(+), 32 deletions(-) diff --git a/driver/platform/kalama/inc/kalama_technology.h b/driver/platform/kalama/inc/kalama_technology.h index 5e0dcdee82..a43b7d3df8 100644 --- a/driver/platform/kalama/inc/kalama_technology.h +++ b/driver/platform/kalama/inc/kalama_technology.h @@ -226,7 +226,7 @@ static u32 av1_num_tiles_kalama[7][3] = { * * Total W = SUMPRODUCT(H16:J16, K16 : M16) / SUM(H16:J16) * Total R = SUMPRODUCT(H16:J16, N16 : P16) / SUM(H16:J16) -*/ + */ /* 1000x */ static u32 kalama_en_readfactor[7] = {1000, 1500, 1750, 1875, 1000, 2000, 2000}; diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index ba2e65eb55..63789f49ad 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -290,11 +290,12 @@ static struct msm_platform_core_capability core_data_kalama[] = { {MAX_SECURE_SESSION_COUNT, 3}, {MAX_RT_MBPF, 174080}, /* (8192x4352)/256 + (4096x2176)/256*/ {MAX_MBPF, 278528}, /* ((8192x4352)/256) * 2 */ - {MAX_MBPS, 7833600}, /* max_load - * 7680x4320@60fps or 3840x2176@240fps - * which is greater than 4096x2176@120fps, - * 8192x4320@48fps - */ + {MAX_MBPS, 7833600}, + /* max_load + * 7680x4320@60fps or 3840x2176@240fps + * which is greater than 4096x2176@120fps, + * 8192x4320@48fps + */ {MAX_IMAGE_MBPF, 1048576}, /* (16384x16384)/256 */ {MAX_MBPF_HQ, 8160}, /* ((1920x1088)/256) */ {MAX_MBPS_HQ, 489600}, /* ((1920x1088)/256)@60fps */ diff --git a/driver/platform/pineapple/src/msm_vidc_pineapple.c b/driver/platform/pineapple/src/msm_vidc_pineapple.c index dea8ac5102..423b64fd8b 100644 --- a/driver/platform/pineapple/src/msm_vidc_pineapple.c +++ b/driver/platform/pineapple/src/msm_vidc_pineapple.c @@ -292,11 +292,12 @@ static struct msm_platform_core_capability core_data_pineapple[] = { {MAX_SECURE_SESSION_COUNT, 3}, {MAX_RT_MBPF, 174080}, /* (8192x4352)/256 + (4096x2176)/256*/ {MAX_MBPF, 278528}, /* ((8192x4352)/256) * 2 */ - {MAX_MBPS, 7833600}, /* max_load - * 7680x4320@60fps or 3840x2176@240fps - * which is greater than 4096x2176@120fps, - * 8192x4320@48fps - */ + {MAX_MBPS, 7833600}, + /* max_load + * 7680x4320@60fps or 3840x2176@240fps + * which is greater than 4096x2176@120fps, + * 8192x4320@48fps + */ {MAX_IMAGE_MBPF, 1048576}, /* (16384x16384)/256 */ {MAX_MBPF_HQ, 8160}, /* ((1920x1088)/256) */ {MAX_MBPS_HQ, 489600}, /* ((1920x1088)/256)@60fps */ diff --git a/driver/platform/pineapple/src/pineapple.c b/driver/platform/pineapple/src/pineapple.c index 3274f82bbf..d8f024871f 100644 --- a/driver/platform/pineapple/src/pineapple.c +++ b/driver/platform/pineapple/src/pineapple.c @@ -196,11 +196,12 @@ static struct msm_platform_core_capability core_data_pineapple[] = { {MAX_NUM_8K_SESSIONS, 2}, {MAX_RT_MBPF, 174080}, /* (8192x4352)/256 + (4096x2176)/256*/ {MAX_MBPF, 278528}, /* ((8192x4352)/256) * 2 */ - {MAX_MBPS, 7833600}, /* max_load - * 7680x4320@60fps or 3840x2176@240fps - * which is greater than 4096x2176@120fps, - * 8192x4320@48fps - */ + {MAX_MBPS, 7833600}, + /* max_load + * 7680x4320@60fps or 3840x2176@240fps + * which is greater than 4096x2176@120fps, + * 8192x4320@48fps + */ {MAX_MBPF_HQ, 8160}, /* ((1920x1088)/256) */ {MAX_MBPS_HQ, 489600}, /* ((1920x1088)/256)@60fps */ {MAX_MBPF_B_FRAME, 32640}, /* 3840x2176/256 */ diff --git a/driver/variant/iris2/src/msm_vidc_iris2.c b/driver/variant/iris2/src/msm_vidc_iris2.c index fb5de0d510..614cc18809 100644 --- a/driver/variant/iris2/src/msm_vidc_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_iris2.c @@ -674,7 +674,7 @@ static int __noc_error_info_iris2(struct msm_vidc_core *core) d_vpr_e("VCODEC_NOC_ERL_MAIN_ERRLOG3_LOW: %#x\n", val); val = __read_register(core, VCODEC_NOC_ERL_MAIN_ERRLOG3_HIGH); d_vpr_e("VCODEC_NOC_ERL_MAIN_ERRLOG3_HIGH: %#x\n", val); - */ + */ return 0; } diff --git a/driver/variant/iris3/inc/hfi_buffer_iris3.h b/driver/variant/iris3/inc/hfi_buffer_iris3.h index 702665dbcd..2dce34a900 100644 --- a/driver/variant/iris3/inc/hfi_buffer_iris3.h +++ b/driver/variant/iris3/inc/hfi_buffer_iris3.h @@ -1072,7 +1072,8 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define AV1_CABAC_HDR_RATIO_HD_TOT 2 #define AV1_CABAC_RES_RATIO_HD_TOT 2 /* some content need more bin buffer, - * but limit buffer size for high resolution */ + * but limit buffer size for high resolution + */ #define SIZE_AV1D_HW_BIN_BUFFER(_size, frame_width, frame_height, delay, \ num_vpp_pipes) \ do { \ diff --git a/driver/variant/iris3/src/msm_vidc_iris3.c b/driver/variant/iris3/src/msm_vidc_iris3.c index b60fc376b1..1ab47a281b 100644 --- a/driver/variant/iris3/src/msm_vidc_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_iris3.c @@ -721,7 +721,7 @@ static int __noc_error_info_iris3(struct msm_vidc_core *core) d_vpr_e("VCODEC_NOC_ERL_MAIN_ERRLOG3_LOW: %#x\n", val); val = __read_register(core, VCODEC_NOC_ERL_MAIN_ERRLOG3_HIGH); d_vpr_e("VCODEC_NOC_ERL_MAIN_ERRLOG3_HIGH: %#x\n", val); - */ + */ return 0; } @@ -977,7 +977,7 @@ int msm_vidc_adjust_bitrate_boost_iris3(void *instance, struct v4l2_ctrl *ctrl) * honor client set bitrate boost * if client did not set, keep max bitrate boost upto 4k@60fps * and remove bitrate boost after 4k@60fps - */ + */ if (inst->capabilities[BITRATE_BOOST].flags & CAP_FLAG_CLIENT_SET) { /* accept client set bitrate boost value as is */ } else { diff --git a/driver/variant/iris33/inc/hfi_buffer_iris33.h b/driver/variant/iris33/inc/hfi_buffer_iris33.h index afbcc4f415..57784fb70c 100644 --- a/driver/variant/iris33/inc/hfi_buffer_iris33.h +++ b/driver/variant/iris33/inc/hfi_buffer_iris33.h @@ -1072,7 +1072,8 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define AV1_CABAC_HDR_RATIO_HD_TOT 2 #define AV1_CABAC_RES_RATIO_HD_TOT 2 /* some content need more bin buffer, - * but limit buffer size for high resolution */ + * but limit buffer size for high resolution + */ #define SIZE_AV1D_HW_BIN_BUFFER(_size, frame_width, frame_height, delay, \ num_vpp_pipes) \ do { \ diff --git a/driver/variant/iris33/src/msm_vidc_iris33.c b/driver/variant/iris33/src/msm_vidc_iris33.c index 03eca21513..ca9cab269a 100644 --- a/driver/variant/iris33/src/msm_vidc_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_iris33.c @@ -916,7 +916,7 @@ static int __noc_error_info_iris33(struct msm_vidc_core *core) d_vpr_e("VCODEC_NOC_ERL_MAIN_ERRLOG3_LOW: %#x\n", val); val = __read_register(core, VCODEC_NOC_ERL_MAIN_ERRLOG3_HIGH); d_vpr_e("VCODEC_NOC_ERL_MAIN_ERRLOG3_HIGH: %#x\n", val); - */ + */ if (is_iris33_hw_power_collapsed(core)) { d_vpr_e("%s: video hardware already power collapsed\n", __func__); @@ -1258,7 +1258,7 @@ int msm_vidc_adjust_bitrate_boost_iris33(void *instance, struct v4l2_ctrl *ctrl) * honor client set bitrate boost * if client did not set, keep max bitrate boost upto 4k@60fps * and remove bitrate boost after 4k@60fps - */ + */ if (inst->capabilities[BITRATE_BOOST].flags & CAP_FLAG_CLIENT_SET) { /* accept client set bitrate boost value as is */ } else { diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 57ef990d14..73753beb45 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -310,7 +310,7 @@ static int msm_vdec_set_cabac(struct msm_vidc_inst *inst, return rc; } -*/ + */ static int msm_vdec_set_coded_frames(struct msm_vidc_inst *inst, enum msm_vidc_port_type port) { @@ -1197,12 +1197,12 @@ static int msm_vdec_set_delivery_mode_property(struct msm_vidc_inst *inst, if (is_meta_rx_inp_enabled(inst, META_OUTBUF_FENCE)) { /* - * if output buffer fence enabled via - * META_OUTBUF_FENCE, then driver will send - * fence id via HFI_PROP_FENCE to firmware. - * So enable HFI_PROP_FENCE property as - * delivery mode property. - */ + * if output buffer fence enabled via + * META_OUTBUF_FENCE, then driver will send + * fence id via HFI_PROP_FENCE to firmware. + * So enable HFI_PROP_FENCE property as + * delivery mode property. + */ payload[++count] = inst->capabilities[property_output_list[i]].hfi_id; } diff --git a/driver/vidc/src/msm_vidc_buffer.c b/driver/vidc/src/msm_vidc_buffer.c index 4d51e0ee61..65ae24e4c2 100644 --- a/driver/vidc/src/msm_vidc_buffer.c +++ b/driver/vidc/src/msm_vidc_buffer.c @@ -382,10 +382,12 @@ u32 msm_vidc_encoder_output_size(struct msm_vidc_inst *inst) frame_size = frame_size << 1; if (inst->rc_type == RATE_CONTROL_LOSSLESS) - frame_size = (width * height * 9) >> 2; */ + frame_size = (width * height * 9) >> 2; + */ skip_calc: - /* multiply by 10/8 (1.25) to get size for 10 bit case */ + /* multiply by 10/8 (1.25) to get size for 10 bit case + */ if (codec == MSM_VIDC_HEVC || codec == MSM_VIDC_HEIC) frame_size = frame_size + (frame_size >> 2); From 4d2903e0d00106b362d6190db55776ab565cf12a Mon Sep 17 00:00:00 2001 From: Manikanta Kanamarlapudi Date: Mon, 17 Jul 2023 15:16:58 +0530 Subject: [PATCH 0970/1061] video-driver: kept blank line after declarations Fix warning of 'Missing blank line after declarations' in the checker. Change-Id: I3db5717890db68096e5a035c536f0b6bcae7e28e --- .../variant/iris3/src/msm_vidc_clock_iris3.c | 5 +++- .../iris33/src/msm_vidc_clock_iris33.c | 4 ++- driver/vidc/src/msm_vidc_driver.c | 29 +++++++++++++++++++ 3 files changed, 36 insertions(+), 2 deletions(-) diff --git a/driver/variant/iris3/src/msm_vidc_clock_iris3.c b/driver/variant/iris3/src/msm_vidc_clock_iris3.c index 3afba93bbe..51042e5991 100644 --- a/driver/variant/iris3/src/msm_vidc_clock_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_clock_iris3.c @@ -345,6 +345,7 @@ static int calculate_vpp_min_freq(struct api_calculation_input codec_input, if (codec_input.vsp_vpp_mode == CODEC_VSPVPP_MODE_2S) { /* FW overhead, convert FW cycles to impact to one pipe */ u64 decoder_vpp_fw_overhead = 0; + decoder_vpp_fw_overhead = DIV_ROUND_UP((DECODER_VPP_FW_OVERHEAD_KALAMA * 10 * codec_input.frame_rate), 15); @@ -407,6 +408,7 @@ static int calculate_vpp_min_freq(struct api_calculation_input codec_input, } else { /* encoder */ /* Decide LP/HQ */ u8 hq_mode = 0; + if (codec_input.pipe_num > 1) if (codec_input.frame_width * codec_input.frame_height <= 1920 * 1080) @@ -462,6 +464,7 @@ static int calculate_vpp_min_freq(struct api_calculation_input codec_input, if (codec_input.pipe_num > 1) { u32 pipe_penalty_codec = 101; + vpp_hw_min_frequency = (vpp_hw_min_frequency * pipe_penalty_codec + 99) / 100; } @@ -545,4 +548,4 @@ int msm_vidc_calculate_frequency(struct api_calculation_input codec_input, return rc; return rc; -} \ No newline at end of file +} diff --git a/driver/variant/iris33/src/msm_vidc_clock_iris33.c b/driver/variant/iris33/src/msm_vidc_clock_iris33.c index 9e894f8ce8..41107ba87d 100644 --- a/driver/variant/iris33/src/msm_vidc_clock_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_clock_iris33.c @@ -470,6 +470,7 @@ static int calculate_vpp_min_freq(struct api_calculation_input codec_input, if (codec_input.vsp_vpp_mode == CODEC_VSPVPP_MODE_2S) { /* FW overhead, convert FW cycles to impact to one pipe */ u64 decoder_vpp_fw_overhead = 0; + decoder_vpp_fw_overhead = DIV_ROUND_UP((decoder_vpp_fw_overhead * 10 * codec_input.frame_rate), 15); @@ -588,6 +589,7 @@ static int calculate_vpp_min_freq(struct api_calculation_input codec_input, if (codec_input.pipe_num > 1) { u32 pipe_penalty_codec = 101; + vpp_hw_min_frequency = (vpp_hw_min_frequency * pipe_penalty_codec + 99) / 100; } @@ -671,4 +673,4 @@ int msm_vidc_calculate_frequency(struct api_calculation_input codec_input, return rc; return rc; -} \ No newline at end of file +} diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index bfeefa2b58..be3c1571d8 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -1668,6 +1668,7 @@ int msm_vidc_update_input_rate(struct msm_vidc_inst *inst, u64 time_us) struct msm_vidc_core *core; u64 counter = 0; u64 input_timer_sum_us = 0; + core = inst->core; input_timer = msm_vidc_pool_alloc(inst, MSM_MEM_POOL_BUF_TIMER); @@ -1705,6 +1706,7 @@ int msm_vidc_flush_input_timer(struct msm_vidc_inst *inst) { struct msm_vidc_input_timer *input_timer, *dummy_timer; struct msm_vidc_core *core; + core = inst->core; i_vpr_l(inst, "%s: flush input_timer list\n", __func__); @@ -1793,6 +1795,7 @@ int msm_vidc_flush_ts(struct msm_vidc_inst *inst) { struct msm_vidc_timestamp *temp, *ts = NULL; struct msm_vidc_core *core; + core = inst->core; list_for_each_entry_safe(ts, temp, &inst->timestamps.list, sort.list) { @@ -1816,6 +1819,7 @@ int msm_vidc_update_timestamp_rate(struct msm_vidc_inst *inst, u64 timestamp) u32 timestamp_rate = 0; u64 ts_ms = 0; u32 counter = 0; + core = inst->core; ts = msm_vidc_pool_alloc(inst, MSM_MEM_POOL_TIMESTAMP); @@ -1872,6 +1876,7 @@ int msm_vidc_ts_reorder_insert_timestamp(struct msm_vidc_inst *inst, u64 timesta struct msm_vidc_timestamp *ts; struct msm_vidc_core *core; int rc = 0; + core = inst->core; /* allocate ts from pool */ @@ -1896,6 +1901,7 @@ int msm_vidc_ts_reorder_remove_timestamp(struct msm_vidc_inst *inst, u64 timesta { struct msm_vidc_timestamp *ts, *temp; struct msm_vidc_core *core; + core = inst->core; /* remove matching node */ @@ -1942,6 +1948,7 @@ int msm_vidc_ts_reorder_flush(struct msm_vidc_inst *inst) { struct msm_vidc_timestamp *temp, *ts = NULL; struct msm_vidc_core *core; + core = inst->core; /* flush all entries */ @@ -1998,6 +2005,7 @@ int msm_vidc_allocate_buffers(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buf = NULL; struct msm_vidc_buffers *buffers; struct msm_vidc_core *core; + core = inst->core; buffers = msm_vidc_get_buffers(inst, buf_type, __func__); @@ -2030,6 +2038,7 @@ int msm_vidc_free_buffers(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buf, *dummy; struct msm_vidc_buffers *buffers; struct msm_vidc_core *core; + core = inst->core; buffers = msm_vidc_get_buffers(inst, buf_type, __func__); @@ -2625,6 +2634,7 @@ int msm_vidc_destroy_internal_buffer(struct msm_vidc_inst *inst, struct msm_vidc_mem *mem, *mem_dummy; struct msm_vidc_buffer *buf, *dummy; struct msm_vidc_core *core; + core = inst->core; if (!is_internal_buffer(buffer->type)) { @@ -2670,6 +2680,7 @@ int msm_vidc_get_internal_buffers(struct msm_vidc_inst *inst, u32 buf_count; struct msm_vidc_core *core; struct msm_vidc_buffers *buffers; + core = inst->core; buf_size = call_session_op(core, buffer_size, @@ -2710,7 +2721,9 @@ int msm_vidc_create_internal_buffer(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buffer; struct msm_vidc_mem *mem; struct msm_vidc_core *core; + core = inst->core; + if (!is_internal_buffer(buffer_type)) { i_vpr_e(inst, "%s: type %s is not internal\n", __func__, buf_name(buffer_type)); @@ -2793,6 +2806,7 @@ int msm_vidc_queue_internal_buffers(struct msm_vidc_inst *inst, int rc = 0; struct msm_vidc_buffers *buffers; struct msm_vidc_buffer *buffer, *dummy; + if (!is_internal_buffer(buffer_type)) { i_vpr_e(inst, "%s: %s is not internal\n", __func__, buf_name(buffer_type)); return 0; @@ -2963,6 +2977,7 @@ int msm_vidc_v4l2_fh_init(struct msm_vidc_inst *inst) int rc = 0; int index; struct msm_vidc_core *core; + core = inst->core; /* do not init, if already inited */ @@ -3063,6 +3078,7 @@ int msm_vidc_vb2_queue_init(struct msm_vidc_inst *inst) { int rc = 0; struct msm_vidc_core *core; + core = inst->core; if (inst->m2m_dev) { @@ -3169,6 +3185,7 @@ int msm_vidc_add_session(struct msm_vidc_inst *inst) struct msm_vidc_inst *i; struct msm_vidc_core *core; u32 count = 0; + core = inst->core; core_lock(core, __func__); @@ -3199,6 +3216,7 @@ int msm_vidc_remove_session(struct msm_vidc_inst *inst) struct msm_vidc_inst *i, *temp; struct msm_vidc_core *core; u32 count = 0; + core = inst->core; core_lock(core, __func__); @@ -3222,6 +3240,7 @@ int msm_vidc_remove_dangling_session(struct msm_vidc_inst *inst) struct msm_vidc_inst *i, *temp; struct msm_vidc_core *core; u32 count = 0, dcount = 0; + core = inst->core; core_lock(core, __func__); @@ -3392,6 +3411,7 @@ int msm_vidc_session_close(struct msm_vidc_inst *inst) int rc = 0; struct msm_vidc_core *core; bool wait_for_response; + core = inst->core; wait_for_response = true; @@ -3448,6 +3468,7 @@ int msm_vidc_get_inst_capability(struct msm_vidc_inst *inst) int i; u32 codecs_count = 0; struct msm_vidc_core *core; + core = inst->core; codecs_count = core->enc_codecs_count + core->dec_codecs_count; @@ -3854,6 +3875,7 @@ int msm_vidc_inst_timeout(struct msm_vidc_inst *inst) struct msm_vidc_core *core; struct msm_vidc_inst *instance; bool found; + core = inst->core; core_lock(core, __func__); @@ -4218,6 +4240,7 @@ int msm_vidc_flush_buffers(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buf, *dummy; enum msm_vidc_buffer_type buffer_type[2]; int i; + core = inst->core; if (is_input_buffer(type)) { @@ -4264,6 +4287,7 @@ int msm_vidc_flush_read_only_buffers(struct msm_vidc_inst *inst, int rc = 0; struct msm_vidc_buffer *ro_buf, *dummy; struct msm_vidc_core *core; + core = inst->core; if (!is_decode_session(inst) || !is_output_buffer(type)) @@ -4562,6 +4586,7 @@ int msm_vidc_update_bitstream_buffer_size(struct msm_vidc_inst *inst) { struct msm_vidc_core *core; struct v4l2_format *fmt; + core = inst->core; if (is_decode_session(inst)) { @@ -4577,6 +4602,7 @@ int msm_vidc_update_meta_port_settings(struct msm_vidc_inst *inst) { struct msm_vidc_core *core; struct v4l2_format *fmt; + core = inst->core; fmt = &inst->fmts[INPUT_META_PORT]; @@ -4606,6 +4632,7 @@ int msm_vidc_update_meta_port_settings(struct msm_vidc_inst *inst) int msm_vidc_update_buffer_count(struct msm_vidc_inst *inst, u32 port) { struct msm_vidc_core *core; + core = inst->core; switch (port) { @@ -4917,6 +4944,7 @@ int msm_vidc_check_core_mbpf(struct msm_vidc_inst *inst) u32 critical_mbpf = 0; struct msm_vidc_core *core; struct msm_vidc_inst *instance; + core = inst->core; core_lock(core, __func__); @@ -5184,6 +5212,7 @@ static int msm_vidc_check_max_sessions(struct msm_vidc_inst *inst) u32 num_1080p_sessions = 0, num_4k_sessions = 0, num_8k_sessions = 0; struct msm_vidc_inst *i; struct msm_vidc_core *core; + core = inst->core; core_lock(core, __func__); From 30b8ff5ce241f6de796a7e0f09d4c5e2f255fe55 Mon Sep 17 00:00:00 2001 From: Ankush Mitra Date: Fri, 14 Jul 2023 15:54:43 +0530 Subject: [PATCH 0971/1061] video: driver: fix few checker warning Fix braces are not necessary warning and suspect code indentation warning. Change-Id: I6e599d94766cc34013a0ddd758cf5c6609798ea2 Signed-off-by: Ankush Mitra --- driver/platform/common/src/msm_vidc_platform.c | 8 +++----- driver/variant/iris2/inc/hfi_buffer_iris2.h | 10 +++++----- driver/variant/iris2/src/msm_vidc_iris2.c | 3 +-- driver/variant/iris2/src/msm_vidc_power_iris2.c | 6 +++--- driver/variant/iris3/src/msm_vidc_power_iris3.c | 14 ++++++-------- driver/variant/iris33/src/msm_vidc_power_iris33.c | 14 ++++++-------- driver/vidc/src/msm_vidc_driver.c | 13 +++++-------- driver/vidc/src/msm_vidc_fence.c | 3 +-- driver/vidc/src/msm_vidc_power.c | 6 +++--- driver/vidc/src/msm_vidc_synx.c | 3 +-- driver/vidc/src/msm_vidc_v4l2.c | 3 +-- driver/vidc/src/msm_vidc_vb2.c | 4 ++-- 12 files changed, 37 insertions(+), 50 deletions(-) diff --git a/driver/platform/common/src/msm_vidc_platform.c b/driver/platform/common/src/msm_vidc_platform.c index 89914f0bcf..504cbe7c76 100644 --- a/driver/platform/common/src/msm_vidc_platform.c +++ b/driver/platform/common/src/msm_vidc_platform.c @@ -1126,9 +1126,8 @@ int msm_vidc_adjust_slice_count(void *instance, struct v4l2_ctrl *ctrl) ENH_LAYER_COUNT, &enh_layer_count, __func__)) return -EINVAL; - if (enh_layer_count && msm_vidc_check_all_layer_bitrate_set(inst)) { + if (enh_layer_count && msm_vidc_check_all_layer_bitrate_set(inst)) bitrate = msm_vidc_get_cumulative_bitrate(inst); - } fps = inst->capabilities[FRAME_RATE].value >> 16; if (fps > MAX_SLICES_FRAME_RATE || @@ -2263,11 +2262,10 @@ int msm_vidc_adjust_dec_outbuf_fence_direction(void *instance, struct v4l2_ctrl META_OUTBUF_FENCE, &meta_outbuf_fence, __func__)) return -EINVAL; - if (is_meta_rx_inp_enabled(inst, META_OUTBUF_FENCE)) { + if (is_meta_rx_inp_enabled(inst, META_OUTBUF_FENCE)) adjusted_value = MSM_VIDC_FENCE_DIR_TX; - } else { + else adjusted_value = MSM_VIDC_FENCE_DIR_NONE; - } msm_vidc_update_cap_value(inst, OUTBUF_FENCE_DIRECTION, adjusted_value, __func__); diff --git a/driver/variant/iris2/inc/hfi_buffer_iris2.h b/driver/variant/iris2/inc/hfi_buffer_iris2.h index b4870182fb..40199ebe60 100644 --- a/driver/variant/iris2/inc/hfi_buffer_iris2.h +++ b/driver/variant/iris2/inc/hfi_buffer_iris2.h @@ -128,8 +128,8 @@ typedef HFI_U32 HFI_BOOL; #define HFI_YUV420_TP10_CALC_Y_STRIDE(stride, frame_width, stride_multiple) \ do { \ - stride = HFI_ALIGN(frame_width, 192); \ - stride = HFI_ALIGN(stride * 4 / 3, stride_multiple); \ + stride = HFI_ALIGN(frame_width, 192); \ + stride = HFI_ALIGN(stride * 4 / 3, stride_multiple); \ } while (0) #define HFI_YUV420_TP10_CALC_Y_BUFHEIGHT(buf_height, frame_height, \ @@ -150,9 +150,9 @@ typedef HFI_U32 HFI_BOOL; #define HFI_YUV420_TP10_CALC_BUF_SIZE(buf_size, y_buf_size, y_stride,\ y_buf_height, uv_buf_size, uv_stride, uv_buf_height) \ do { \ - y_buf_size = (y_stride * y_buf_height); \ - uv_buf_size = (uv_stride * uv_buf_height); \ - buf_size = y_buf_size + uv_buf_size; \ + y_buf_size = (y_stride * y_buf_height); \ + uv_buf_size = (uv_stride * uv_buf_height); \ + buf_size = y_buf_size + uv_buf_size; \ } while (0) #define HFI_YUV420_TP10_UBWC_CALC_Y_BUF_SIZE(y_buf_size, y_stride, \ diff --git a/driver/variant/iris2/src/msm_vidc_iris2.c b/driver/variant/iris2/src/msm_vidc_iris2.c index 614cc18809..218e80bb45 100644 --- a/driver/variant/iris2/src/msm_vidc_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_iris2.c @@ -867,9 +867,8 @@ int msm_vidc_adjust_blur_type_iris2(void *instance, struct v4l2_ctrl *ctrl) return -EINVAL; if (adjusted_value == MSM_VIDC_BLUR_EXTERNAL) { - if (is_scaling_enabled(inst) || min_quality) { + if (is_scaling_enabled(inst) || min_quality) adjusted_value = MSM_VIDC_BLUR_NONE; - } } else if (adjusted_value == MSM_VIDC_BLUR_ADAPTIVE) { if (is_scaling_enabled(inst) || min_quality || (rc_type != HFI_RC_VBR_CFR) || diff --git a/driver/variant/iris2/src/msm_vidc_power_iris2.c b/driver/variant/iris2/src/msm_vidc_power_iris2.c index a841ce28c9..61b3df9996 100644 --- a/driver/variant/iris2/src/msm_vidc_power_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_power_iris2.c @@ -564,9 +564,9 @@ static u64 __calculate_encoder(struct vidc_bus_vote_data *d) } if (llc_ref_chroma_cache_enabled) { - total_ref_read_crcb = ddr.ref_read_crcb; - ddr.ref_read_crcb = fp_div(ddr.ref_read_crcb, - ref_cbcr_read_bw_factor); + total_ref_read_crcb = ddr.ref_read_crcb; + ddr.ref_read_crcb = fp_div(ddr.ref_read_crcb, + ref_cbcr_read_bw_factor); llc.ref_read_crcb = total_ref_read_crcb - ddr.ref_read_crcb; } diff --git a/driver/variant/iris3/src/msm_vidc_power_iris3.c b/driver/variant/iris3/src/msm_vidc_power_iris3.c index 396ea072a0..6ce3891b1d 100644 --- a/driver/variant/iris3/src/msm_vidc_power_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_power_iris3.c @@ -565,9 +565,8 @@ static u64 msm_vidc_calc_freq_iris3_legacy(struct msm_vidc_inst *inst, u32 data_ vsp_cycles += div_u64(vpp_cycles * 25, 100); /* Add 25 percent extra for HEVC 10bit all intra use case */ - if (inst->iframe && is_hevc_10bit_decode_session(inst)) { + if (inst->iframe && is_hevc_10bit_decode_session(inst)) vsp_cycles += div_u64(vsp_cycles * 25, 100); - } if (inst->codec == MSM_VIDC_VP9 && inst->capabilities[STAGE].value == @@ -697,11 +696,10 @@ static u64 __calculate_decoder(struct vidc_bus_vote_data *d) if (d->codec == MSM_VIDC_AV1) { collocated_bytes_per_lcu = 4 * 512; /* lcu_size = 128 */ - if (lcu_size == 32) { + if (lcu_size == 32) collocated_bytes_per_lcu = 4 * 512 / (128 * 128 / 32 / 32); - } else if (lcu_size == 64) { + else if (lcu_size == 64) collocated_bytes_per_lcu = 4 * 512 / (128 * 128 / 64 / 64); - } } dpb_factor = FP(1, 50, 100); @@ -1008,9 +1006,9 @@ static u64 __calculate_encoder(struct vidc_bus_vote_data *d) } if (llc_ref_chroma_cache_enabled) { - total_ref_read_crcb = ddr.ref_read_crcb; - ddr.ref_read_crcb = fp_div(ddr.ref_read_crcb, - ref_cbcr_read_bw_factor); + total_ref_read_crcb = ddr.ref_read_crcb; + ddr.ref_read_crcb = fp_div(ddr.ref_read_crcb, + ref_cbcr_read_bw_factor); llc.ref_read_crcb = total_ref_read_crcb - ddr.ref_read_crcb; } diff --git a/driver/variant/iris33/src/msm_vidc_power_iris33.c b/driver/variant/iris33/src/msm_vidc_power_iris33.c index 8c69e1d93e..b0f267f28b 100644 --- a/driver/variant/iris33/src/msm_vidc_power_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_power_iris33.c @@ -714,9 +714,8 @@ u64 msm_vidc_calc_freq_iris33_legacy(struct msm_vidc_inst *inst, u32 data_size) vsp_cycles += div_u64(vpp_cycles * 25, 100); /* Add 25 percent extra for HEVC 10bit all intra use case */ - if (inst->iframe && is_hevc_10bit_decode_session(inst)) { + if (inst->iframe && is_hevc_10bit_decode_session(inst)) vsp_cycles += div_u64(vsp_cycles * 25, 100); - } if (inst->codec == MSM_VIDC_VP9 && inst->capabilities[STAGE].value == @@ -850,11 +849,10 @@ static u64 __calculate_decoder(struct vidc_bus_vote_data *d) if (d->codec == MSM_VIDC_AV1) { collocated_bytes_per_lcu = 4 * 512; /* lcu_size = 128 */ - if (lcu_size == 32) { + if (lcu_size == 32) collocated_bytes_per_lcu = 4 * 512 / (128 * 128 / 32 / 32); - } else if (lcu_size == 64) { + else if (lcu_size == 64) collocated_bytes_per_lcu = 4 * 512 / (128 * 128 / 64 / 64); - } } dpb_factor = FP(1, 50, 100); @@ -1161,9 +1159,9 @@ static u64 __calculate_encoder(struct vidc_bus_vote_data *d) } if (llc_ref_chroma_cache_enabled) { - total_ref_read_crcb = ddr.ref_read_crcb; - ddr.ref_read_crcb = fp_div(ddr.ref_read_crcb, - ref_cbcr_read_bw_factor); + total_ref_read_crcb = ddr.ref_read_crcb; + ddr.ref_read_crcb = fp_div(ddr.ref_read_crcb, + ref_cbcr_read_bw_factor); llc.ref_read_crcb = total_ref_read_crcb - ddr.ref_read_crcb; } diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index be3c1571d8..672c686771 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -995,17 +995,15 @@ int msm_vidc_state_change_streamoff(struct msm_vidc_inst *inst, return 0; if (port == INPUT_PORT) { - if (is_state(inst, MSM_VIDC_INPUT_STREAMING)) { + if (is_state(inst, MSM_VIDC_INPUT_STREAMING)) new_state = MSM_VIDC_OPEN; - } else if (is_state(inst, MSM_VIDC_STREAMING)) { + else if (is_state(inst, MSM_VIDC_STREAMING)) new_state = MSM_VIDC_OUTPUT_STREAMING; - } } else if (port == OUTPUT_PORT) { - if (is_state(inst, MSM_VIDC_OUTPUT_STREAMING)) { + if (is_state(inst, MSM_VIDC_OUTPUT_STREAMING)) new_state = MSM_VIDC_OPEN; - } else if (is_state(inst, MSM_VIDC_STREAMING)) { + else if (is_state(inst, MSM_VIDC_STREAMING)) new_state = MSM_VIDC_INPUT_STREAMING; - } } rc = msm_vidc_change_state(inst, new_state, __func__); if (rc) @@ -4436,9 +4434,8 @@ void msm_vidc_destroy_buffers(struct msm_vidc_inst *inst) dmabuf = dbuf->dmabuf; if (dmabuf && dmabuf->file) { f_inode = file_inode(dmabuf->file); - if (f_inode) { + if (f_inode) inode_num = f_inode->i_ino; - } } i_vpr_e(inst, "%s: removing dma_buf %p, inode %lu, refcount %u\n", __func__, dbuf->dmabuf, inode_num, dbuf->refcount); diff --git a/driver/vidc/src/msm_vidc_fence.c b/driver/vidc/src/msm_vidc_fence.c index 382baf0733..0bdcca92bc 100644 --- a/driver/vidc/src/msm_vidc_fence.c +++ b/driver/vidc/src/msm_vidc_fence.c @@ -161,9 +161,8 @@ static void msm_vidc_fence_destroy(struct msm_vidc_inst *inst, u64 fence_id) struct msm_vidc_fence *fence; fence = msm_vidc_get_dma_fence_from_id(inst, fence_id); - if (!fence) { + if (!fence) return; - } i_vpr_l(inst, "%s: fence %s\n", __func__, fence->name); list_del_init(&fence->list); diff --git a/driver/vidc/src/msm_vidc_power.c b/driver/vidc/src/msm_vidc_power.c index d71d5964ea..a0ae2cdaa3 100644 --- a/driver/vidc/src/msm_vidc_power.c +++ b/driver/vidc/src/msm_vidc_power.c @@ -273,11 +273,11 @@ int msm_vidc_scale_buses(struct msm_vidc_inst *inst) * 0 index - dpb colorformat * 1 index - opb colorformat */ - if (is_10bit_colorformat(color_format)) { + if (is_10bit_colorformat(color_format)) vote_data->color_formats[0] = MSM_VIDC_FMT_TP10C; - } else { + else vote_data->color_formats[0] = MSM_VIDC_FMT_NV12; - } + vote_data->color_formats[1] = color_format; } else if (inst->codec == MSM_VIDC_AV1 && inst->capabilities[FILM_GRAIN].value) { diff --git a/driver/vidc/src/msm_vidc_synx.c b/driver/vidc/src/msm_vidc_synx.c index 3a694e9198..313a8edc11 100644 --- a/driver/vidc/src/msm_vidc_synx.c +++ b/driver/vidc/src/msm_vidc_synx.c @@ -99,9 +99,8 @@ static void msm_vidc_synx_fence_destroy(struct msm_vidc_inst *inst, u64 fence_id struct msm_vidc_fence *fence; fence = msm_vidc_get_synx_fence_from_id(inst, fence_id); - if (!fence) { + if (!fence) return; - } i_vpr_e(inst, "%s: fence %s\n", __func__, fence->name); list_del_init(&fence->list); diff --git a/driver/vidc/src/msm_vidc_v4l2.c b/driver/vidc/src/msm_vidc_v4l2.c index e5ba233307..094e8e0e84 100644 --- a/driver/vidc/src/msm_vidc_v4l2.c +++ b/driver/vidc/src/msm_vidc_v4l2.c @@ -39,9 +39,8 @@ unsigned int msm_v4l2_poll(struct file *filp, struct poll_table_struct *pt) goto exit; } poll = msm_vidc_poll((void *)inst, filp, pt); - if (poll) { + if (poll) goto exit; - } exit: put_inst(inst); diff --git a/driver/vidc/src/msm_vidc_vb2.c b/driver/vidc/src/msm_vidc_vb2.c index 3be0fdacf7..0a36c48a56 100644 --- a/driver/vidc/src/msm_vidc_vb2.c +++ b/driver/vidc/src/msm_vidc_vb2.c @@ -707,8 +707,8 @@ void msm_vb2_request_complete(struct vb2_buffer *vb) } inst = vb2_get_drv_priv(vb->vb2_queue); if (!inst) { - d_vpr_e("%s: invalid inst\n", __func__); - return; + d_vpr_e("%s: invalid inst\n", __func__); + return; } i_vpr_l(inst, "%s: vb type %d, index %d\n", From 326254549be5e2f914eba2d87b66a1b3a53e08cb Mon Sep 17 00:00:00 2001 From: Vedang Nagar Date: Wed, 5 Jul 2023 13:55:24 +0530 Subject: [PATCH 0972/1061] Video: Driver: Move inst_lock to v4l2 layer during q_buf [1] If request_fd enabled, msm_vb2_buf_queue() is not called from v4l2_qbuf. Instead it's called as part of msm_v4l2_request_queue(). Hence inst lock should be acquired in common function i.e msm_vb2_buf_queue, to handle both requests and non-request scenarios. [2] If request_fd is disabled, inst_lock can be acquired in v4l2_qbuf() call. Acquiring inst_lock from here will ensure RO list insertion and updation i.e. attach/map will happen under lock. Currently, request_fd is disabled. Therefore, acquire inst_lock from this function to ensure RO list insertion/updation is under lock to avoid stability usecase. Change-Id: I3cc1d4b8b5547fd5e34ce5eb06480380cb9200cc Signed-off-by: Vedang Nagar --- driver/platform/kalama/src/msm_vidc_kalama.c | 2 +- .../pineapple/src/msm_vidc_pineapple.c | 2 +- driver/vidc/src/msm_vidc_v4l2.c | 37 +++++++-- driver/vidc/src/msm_vidc_vb2.c | 79 +++++++------------ 4 files changed, 60 insertions(+), 60 deletions(-) diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index 63789f49ad..a9003192dc 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -321,7 +321,7 @@ static struct msm_platform_core_capability core_data_kalama[] = { {DEVICE_CAPS, V4L2_CAP_VIDEO_M2M_MPLANE | V4L2_CAP_META_CAPTURE | V4L2_CAP_STREAMING}, {SUPPORTS_SYNX_FENCE, 0}, - {SUPPORTS_REQUESTS, 1}, + {SUPPORTS_REQUESTS, 0}, }; static struct msm_platform_inst_capability instance_cap_data_kalama[] = { diff --git a/driver/platform/pineapple/src/msm_vidc_pineapple.c b/driver/platform/pineapple/src/msm_vidc_pineapple.c index 423b64fd8b..0d9c54bbd8 100644 --- a/driver/platform/pineapple/src/msm_vidc_pineapple.c +++ b/driver/platform/pineapple/src/msm_vidc_pineapple.c @@ -323,7 +323,7 @@ static struct msm_platform_core_capability core_data_pineapple[] = { {DEVICE_CAPS, V4L2_CAP_VIDEO_M2M_MPLANE | V4L2_CAP_META_CAPTURE | V4L2_CAP_STREAMING}, {SUPPORTS_SYNX_FENCE, 1}, - {SUPPORTS_REQUESTS, 1}, + {SUPPORTS_REQUESTS, 0}, }; static int msm_vidc_set_ring_buffer_count_pineapple(void *instance, diff --git a/driver/vidc/src/msm_vidc_v4l2.c b/driver/vidc/src/msm_vidc_v4l2.c index e5ba233307..7691bf5fdd 100644 --- a/driver/vidc/src/msm_vidc_v4l2.c +++ b/driver/vidc/src/msm_vidc_v4l2.c @@ -505,18 +505,33 @@ int msm_v4l2_qbuf(struct file *filp, void *fh, } /* - * do not acquire inst lock here. acquire it in msm_vb2_buf_queue. - * for requests, msm_vb2_buf_queue() is not called from here. - * instead it's called as part of msm_v4l2_request_queue(). - * hence acquire the inst lock in common function i.e - * msm_vb2_buf_queue, to handle both requests and non-request - * scenarios. + * [1] If request_fd enabled, msm_vb2_buf_queue() is not called from here. + * instead it's called as part of msm_v4l2_request_queue(). + * Hence inst lock should be acquired in common function i.e + * msm_vb2_buf_queue, to handle both requests and non-request + * scenarios. + * [2] If request_fd is disabled, inst_lock can be acquired here. + * Acquiring inst_lock from here will ensure RO list insertion + * and deletion i.e. attach/map will happen under lock. + * Currently, request_fd is disabled. Therefore, acquire inst_lock + * from this function to ensure RO list insertion/updation is under + * lock to avoid stability usecase. */ + client_lock(inst, __func__); + inst_lock(inst, __func__); + if (is_session_error(inst)) { + i_vpr_e(inst, "%s: inst in error state\n", __func__); + rc = -EINVAL; + goto exit; + } + rc = msm_vidc_qbuf(inst, vdev->v4l2_dev->mdev, b); if (rc) goto exit; exit: + inst_unlock(inst, __func__); + client_unlock(inst, __func__); put_inst(inst); return rc; @@ -560,11 +575,21 @@ int msm_v4l2_streamon(struct file *filp, void *fh, return -EINVAL; } + client_lock(inst, __func__); + inst_lock(inst, __func__); + if (is_session_error(inst)) { + i_vpr_e(inst, "%s: inst in error state\n", __func__); + rc = -EBUSY; + goto exit; + } + rc = msm_vidc_streamon((void *)inst, i); if (rc) goto exit; exit: + inst_unlock(inst, __func__); + client_unlock(inst, __func__); put_inst(inst); return rc; diff --git a/driver/vidc/src/msm_vidc_vb2.c b/driver/vidc/src/msm_vidc_vb2.c index 3be0fdacf7..2f3ed993c1 100644 --- a/driver/vidc/src/msm_vidc_vb2.c +++ b/driver/vidc/src/msm_vidc_vb2.c @@ -369,32 +369,19 @@ int msm_vb2_start_streaming(struct vb2_queue *q, unsigned int count) return -EINVAL; } inst = q->drv_priv; - inst = get_inst_ref(g_core, inst); if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - client_lock(inst, __func__); - inst_lock(inst, __func__); - if (is_session_error(inst)) { - i_vpr_e(inst, "%s: inst in error state\n", __func__); - rc = -EBUSY; - goto unlock; - } - rc = inst->event_handle(inst, MSM_VIDC_STREAMON, q); if (rc) { i_vpr_e(inst, "Streamon: %s failed\n", v4l2_type_name(q->type)); msm_vidc_change_state(inst, MSM_VIDC_ERROR, __func__); - goto unlock; + goto exit; } -unlock: - inst_unlock(inst, __func__); - client_unlock(inst, __func__); - put_inst(inst); - +exit: return rc; } @@ -577,6 +564,7 @@ void msm_vb2_buf_queue(struct vb2_buffer *vb2) { int rc = 0; struct msm_vidc_inst *inst; + struct msm_vidc_core *core; u64 timestamp_us = 0; u64 ktime_ns = ktime_get_ns(); @@ -586,16 +574,11 @@ void msm_vb2_buf_queue(struct vb2_buffer *vb2) } inst = vb2_get_drv_priv(vb2->vb2_queue); - if (!inst) { + if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); return; } - - inst = get_inst_ref(g_core, inst); - if (!inst) { - d_vpr_e("%s: invalid instance\n", __func__); - return; - } + core = inst->core; /* * As part of every qbuf initalise request to true. @@ -605,29 +588,24 @@ void msm_vb2_buf_queue(struct vb2_buffer *vb2) * If the buffer does not have any requests with it, then * v4l2_ctrl_request_setup() will return 0. */ - inst->request = true; - rc = v4l2_ctrl_request_setup(vb2->req_obj.req, - &inst->ctrl_handler); - inst->request = false; - v4l2_ctrl_request_complete(vb2->req_obj.req, &inst->ctrl_handler); - /* - * call request_setup and request_complete without acquiring lock - * to avoid deadlock issues because request_setup or request_complete - * would call .s_ctrl and .g_volatile_ctrl respectively which acquire - * lock too. - */ - client_lock(inst, __func__); - inst_lock(inst, __func__); - if (rc) { - i_vpr_e(inst, "%s: request setup failed, error %d\n", - __func__, rc); - goto unlock; - } - - if (is_session_error(inst)) { - i_vpr_e(inst, "%s: inst in error state\n", __func__); - rc = -EINVAL; - goto unlock; + if (core->capabilities[SUPPORTS_REQUESTS].value) { + /* + * If Request API is enabled: + * Call request_setup and request_complete without acquiring lock + * to avoid deadlock issues because request_setup or request_complete + * would call .s_ctrl and .g_volatile_ctrl respectively which acquire + * lock too. + */ + inst->request = true; + rc = v4l2_ctrl_request_setup(vb2->req_obj.req, + &inst->ctrl_handler); + inst->request = false; + v4l2_ctrl_request_complete(vb2->req_obj.req, &inst->ctrl_handler); + if (rc) { + i_vpr_e(inst, "%s: request setup failed, error %d\n", + __func__, rc); + goto exit; + } } if (!vb2->planes[0].bytesused) { @@ -636,7 +614,7 @@ void msm_vb2_buf_queue(struct vb2_buffer *vb2) i_vpr_e(inst, "%s: zero bytesused input buffer not supported\n", __func__); rc = -EINVAL; - goto unlock; + goto exit; } if ((vb2->type == OUTPUT_META_PLANE && is_any_meta_tx_out_enabled(inst)) || (vb2->type == INPUT_META_PLANE && is_any_meta_tx_inp_enabled(inst))) { @@ -659,7 +637,7 @@ void msm_vb2_buf_queue(struct vb2_buffer *vb2) if (vb2->type == INPUT_MPLANE) { rc = msm_vidc_update_input_rate(inst, div_u64(ktime_ns, 1000)); if (rc) - goto unlock; + goto exit; } if (is_decode_session(inst)) @@ -670,17 +648,14 @@ void msm_vb2_buf_queue(struct vb2_buffer *vb2) rc = -EINVAL; if (rc) { print_vb2_buffer("failed vb2-qbuf", inst, vb2); - goto unlock; + goto exit; } -unlock: +exit: if (rc) { msm_vidc_change_state(inst, MSM_VIDC_ERROR, __func__); vb2_buffer_done(vb2, VB2_BUF_STATE_ERROR); } - inst_unlock(inst, __func__); - client_unlock(inst, __func__); - put_inst(inst); } int msm_vb2_buf_out_validate(struct vb2_buffer *vb) From 9d62fcdd3a3b27598ed6459709746d5c6c15895a Mon Sep 17 00:00:00 2001 From: Ankush Mitra Date: Fri, 21 Jul 2023 14:10:14 +0530 Subject: [PATCH 0973/1061] video: driver: fix space around '|' warning Fix some of the checker warning. Change-Id: Ia9854b515185b41673d37bdbb861993badd7d130 Signed-off-by: Ankush Mitra --- driver/platform/kalama/src/msm_vidc_kalama.c | 298 ++++++++--------- .../pineapple/src/msm_vidc_pineapple.c | 304 +++++++++--------- driver/platform/pineapple/src/pineapple.c | 182 +++++------ driver/platform/waipio/src/waipio.c | 192 +++++------ driver/variant/iris33/src/msm_vidc_iris33.c | 2 +- 5 files changed, 489 insertions(+), 489 deletions(-) diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index 63789f49ad..b6b7c172dd 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -280,8 +280,8 @@ static struct matrix_coeff_info matrix_coeff_data_kalama[] = { static struct msm_platform_core_capability core_data_kalama[] = { /* {type, value} */ - {ENC_CODECS, H264|HEVC|HEIC}, - {DEC_CODECS, H264|HEVC|VP9|AV1|HEIC}, + {ENC_CODECS, H264 | HEVC | HEIC}, + {DEC_CODECS, H264 | HEVC | VP9 | AV1 | HEIC}, {MAX_SESSION_COUNT, 16}, {MAX_NUM_720P_SESSIONS, 16}, {MAX_NUM_1080P_SESSIONS, 16}, @@ -331,7 +331,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { * hfi_id, * flags} */ - {DRV_VERSION, DEC|ENC, CODECS_ALL, + {DRV_VERSION, DEC | ENC, CODECS_ALL, 0, INT_MAX, 1, DRIVER_VERSION, V4L2_CID_MPEG_VIDC_DRIVER_VERSION}, @@ -375,13 +375,13 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { {SECURE_FRAME_HEIGHT, ENC, HEVC, 96, 4096, 1, 1080}, - {PIX_FMTS, ENC|DEC, H264, + {PIX_FMTS, ENC | DEC, H264, MSM_VIDC_FMT_NV12, MSM_VIDC_FMT_NV12C, MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C, MSM_VIDC_FMT_NV12C}, - {PIX_FMTS, ENC|DEC, HEVC|VP9|AV1, + {PIX_FMTS, ENC | DEC, HEVC | VP9 | AV1, MSM_VIDC_FMT_NV12, MSM_VIDC_FMT_TP10C, MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C | @@ -401,17 +401,17 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { MSM_VIDC_FMT_P010 | MSM_VIDC_FMT_TP10C, MSM_VIDC_FMT_NV12C}, - {MIN_BUFFERS_INPUT, ENC|DEC, CODECS_ALL, 0, 64, 1, 4, + {MIN_BUFFERS_INPUT, ENC | DEC, CODECS_ALL, 0, 64, 1, 4, V4L2_CID_MIN_BUFFERS_FOR_OUTPUT, 0, CAP_FLAG_VOLATILE}, - {MIN_BUFFERS_INPUT, ENC|DEC, HEIC, 0, 64, 1, 1, + {MIN_BUFFERS_INPUT, ENC | DEC, HEIC, 0, 64, 1, 1, V4L2_CID_MIN_BUFFERS_FOR_OUTPUT, 0, CAP_FLAG_VOLATILE}, - {MIN_BUFFERS_OUTPUT, ENC|DEC, CODECS_ALL, + {MIN_BUFFERS_OUTPUT, ENC | DEC, CODECS_ALL, 0, 64, 1, 4, V4L2_CID_MIN_BUFFERS_FOR_CAPTURE, HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT, @@ -434,16 +434,16 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { {MBPF, DEC, HEIC, 64, 262144, 1, 262144 }, /* (4096 * 2304) / 256 */ - {LOSSLESS_MBPF, ENC, H264|HEVC, 64, 36864, 1, 36864}, + {LOSSLESS_MBPF, ENC, H264 | HEVC, 64, 36864, 1, 36864}, /* Batch Mode Decode */ /* TODO: update with new values based on updated voltage corner */ - {BATCH_MBPF, DEC, H264|HEVC|VP9|AV1, 64, 34816, 1, 34816}, + {BATCH_MBPF, DEC, H264 | HEVC | VP9 | AV1, 64, 34816, 1, 34816}, /* (4096 * 2304) / 256 */ - {BATCH_FPS, DEC, H264|HEVC|VP9|AV1, 1, 120, 1, 120}, + {BATCH_FPS, DEC, H264 | HEVC | VP9 | AV1, 1, 120, 1, 120}, - {SECURE_MBPF, ENC|DEC, H264|HEVC|VP9|AV1, 64, 36864, 1, 36864}, + {SECURE_MBPF, ENC | DEC, H264 | HEVC | VP9 | AV1, 64, 36864, 1, 36864}, {SECURE_MBPF, ENC, HEVC, 36, 36864, 1, 36864}, @@ -497,21 +497,21 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - {INPUT_RATE, ENC|DEC, CODECS_ALL, + {INPUT_RATE, ENC | DEC, CODECS_ALL, (MINIMUM_FPS << 16), INT_MAX, 1, (DEFAULT_FPS << 16)}, - {TIMESTAMP_RATE, ENC|DEC, CODECS_ALL, + {TIMESTAMP_RATE, ENC | DEC, CODECS_ALL, (MINIMUM_FPS << 16), INT_MAX, 1, (DEFAULT_FPS << 16)}, - {SCALE_FACTOR, ENC, H264|HEVC, 1, 8, 1, 8}, + {SCALE_FACTOR, ENC, H264 | HEVC, 1, 8, 1, 8}, {MB_CYCLES_VSP, ENC, CODECS_ALL, 25, 25, 1, 25}, {MB_CYCLES_VSP, DEC, CODECS_ALL, 25, 25, 1, 25}, - {MB_CYCLES_VSP, DEC, VP9|AV1, 60, 60, 1, 60}, + {MB_CYCLES_VSP, DEC, VP9 | AV1, 60, 60, 1, 60}, {MB_CYCLES_VPP, ENC, CODECS_ALL, 675, 675, 1, 675}, @@ -521,17 +521,17 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { {MB_CYCLES_LP, DEC, CODECS_ALL, 200, 200, 1, 200}, - {MB_CYCLES_FW, ENC|DEC, CODECS_ALL, 489583, 489583, 1, 489583}, + {MB_CYCLES_FW, ENC | DEC, CODECS_ALL, 489583, 489583, 1, 489583}, {MB_CYCLES_FW_VPP, ENC, CODECS_ALL, 48405, 48405, 1, 48405}, {MB_CYCLES_FW_VPP, DEC, CODECS_ALL, 66234, 66234, 1, 66234}, - {CLIENT_ID, ENC|DEC, CODECS_ALL, + {CLIENT_ID, ENC | DEC, CODECS_ALL, INVALID_CLIENT_ID, INT_MAX, 1, INVALID_CLIENT_ID, V4L2_CID_MPEG_VIDC_CLIENT_ID}, - {SECURE_MODE, ENC|DEC, H264|HEVC|VP9|AV1, + {SECURE_MODE, ENC | DEC, H264 | HEVC | VP9 | AV1, 0, 1, 1, 0, V4L2_CID_MPEG_VIDC_SECURE, HFI_PROP_SECURE, @@ -541,7 +541,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { * Client will enable V4L2_CID_MPEG_VIDC_METADATA_OUTBUF_FENCE * to get fence_id in input metadata buffer done. */ - {META_OUTBUF_FENCE, DEC, H264|HEVC|VP9|AV1, + {META_OUTBUF_FENCE, DEC, H264 | HEVC | VP9 | AV1, MSM_VIDC_META_DISABLE, MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_INPUT, 0, MSM_VIDC_META_DISABLE, @@ -567,7 +567,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { CAP_FLAG_VOLATILE}, /* Fence type for input buffer. Currently unused */ - {INBUF_FENCE_TYPE, DEC, H264|HEVC|VP9|AV1, + {INBUF_FENCE_TYPE, DEC, H264 | HEVC | VP9 | AV1, MSM_VIDC_FENCE_NONE, MSM_VIDC_FENCE_NONE, BIT(MSM_VIDC_FENCE_NONE), MSM_VIDC_FENCE_NONE, @@ -575,7 +575,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { HFI_PROP_FENCE_TYPE, CAP_FLAG_MENU | CAP_FLAG_INPUT_PORT}, - {OUTBUF_FENCE_TYPE, DEC, H264|HEVC|VP9|AV1, + {OUTBUF_FENCE_TYPE, DEC, H264 | HEVC | VP9 | AV1, MSM_VIDC_FENCE_NONE, MSM_VIDC_SYNX_V2_FENCE, BIT(MSM_VIDC_FENCE_NONE) | BIT(MSM_VIDC_SW_FENCE), MSM_VIDC_FENCE_NONE, @@ -584,7 +584,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { CAP_FLAG_MENU | CAP_FLAG_OUTPUT_PORT}, /* Fence direction for input buffer. Currently unused */ - {INBUF_FENCE_DIRECTION, DEC, H264|HEVC|VP9|AV1, + {INBUF_FENCE_DIRECTION, DEC, H264 | HEVC | VP9 | AV1, MSM_VIDC_FENCE_DIR_NONE, MSM_VIDC_FENCE_DIR_NONE, BIT(MSM_VIDC_FENCE_DIR_NONE), MSM_VIDC_FENCE_DIR_NONE, @@ -592,7 +592,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { HFI_PROP_FENCE_DIRECTION, CAP_FLAG_MENU | CAP_FLAG_INPUT_PORT}, - {OUTBUF_FENCE_DIRECTION, DEC, H264|HEVC|VP9|AV1, + {OUTBUF_FENCE_DIRECTION, DEC, H264 | HEVC | VP9 | AV1, MSM_VIDC_FENCE_DIR_NONE, MSM_VIDC_FENCE_DIR_RX, BIT(MSM_VIDC_FENCE_DIR_NONE) | BIT(MSM_VIDC_FENCE_DIR_TX), MSM_VIDC_FENCE_DIR_NONE, @@ -600,7 +600,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { HFI_PROP_FENCE_DIRECTION, CAP_FLAG_MENU | CAP_FLAG_OUTPUT_PORT}, - {TS_REORDER, DEC, H264|HEVC, + {TS_REORDER, DEC, H264 | HEVC, 0, 1, 1, 0, V4L2_CID_MPEG_VIDC_TS_REORDER}, @@ -624,7 +624,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { HFI_PROP_ROTATION, CAP_FLAG_OUTPUT_PORT}, - {SUPER_FRAME, ENC, H264|HEVC, + {SUPER_FRAME, ENC, H264 | HEVC, 0, 32, 1, 0, V4L2_CID_MPEG_VIDC_SUPERFRAME, 0, CAP_FLAG_NONE}, @@ -676,7 +676,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { /* TODO: Firmware introduced enumeration type for this * with and without seq header. */ - {REQUEST_I_FRAME, ENC, H264|HEVC, + {REQUEST_I_FRAME, ENC, H264 | HEVC, 0, 0, 0, 0, V4L2_CID_MPEG_VIDEO_FORCE_KEY_FRAME, HFI_PROP_REQUEST_SYNC_FRAME, @@ -685,7 +685,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { /* Enc: Keeping CABAC and CAVLC as same bitrate. * Dec: there's no use of Bitrate cap */ - {BIT_RATE, ENC, H264|HEVC, + {BIT_RATE, ENC, H264 | HEVC, 1, MAX_BITRATE, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_BITRATE, HFI_PROP_TOTAL_BITRATE, @@ -722,16 +722,16 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { HFI_PROP_RATE_CONTROL, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - {CABAC_MAX_BITRATE, ENC, H264|HEVC, 0, + {CABAC_MAX_BITRATE, ENC, H264 | HEVC, 0, 160000000, 1, 160000000}, {CAVLC_MAX_BITRATE, ENC, H264, 0, 220000000, 1, 220000000}, - {ALLINTRA_MAX_BITRATE, ENC, H264|HEVC, 0, + {ALLINTRA_MAX_BITRATE, ENC, H264 | HEVC, 0, 245000000, 1, 245000000}, - {LOWLATENCY_MAX_BITRATE, ENC, H264|HEVC, 0, + {LOWLATENCY_MAX_BITRATE, ENC, H264 | HEVC, 0, 70000000, 1, 70000000}, {NUM_COMV, DEC, CODECS_ALL, @@ -741,7 +741,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { 0, 1, 1, 0, V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU}, - {FRAME_SKIP_MODE, ENC, H264|HEVC|HEIC, + {FRAME_SKIP_MODE, ENC, H264 | HEVC | HEIC, V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED, V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT, BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED) | @@ -752,7 +752,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { 0, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - {FRAME_RC_ENABLE, ENC, H264|HEVC|HEIC, + {FRAME_RC_ENABLE, ENC, H264 | HEVC | HEIC, 0, 1, 1, 1, V4L2_CID_MPEG_VIDEO_FRAME_RC_ENABLE}, @@ -784,12 +784,12 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - {GOP_CLOSURE, ENC, H264|HEVC, + {GOP_CLOSURE, ENC, H264 | HEVC, 0, 1, 1, 1, V4L2_CID_MPEG_VIDEO_GOP_CLOSURE, 0}, - {B_FRAME, ENC, H264|HEVC, + {B_FRAME, ENC, H264 | HEVC, 0, 7, 1, 0, V4L2_CID_MPEG_VIDEO_B_FRAMES, HFI_PROP_MAX_B_FRAMES, @@ -801,7 +801,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { HFI_PROP_MAX_B_FRAMES, CAP_FLAG_OUTPUT_PORT}, - {BLUR_TYPES, ENC, H264|HEVC, + {BLUR_TYPES, ENC, H264 | HEVC, MSM_VIDC_BLUR_NONE, MSM_VIDC_BLUR_EXTERNAL, BIT(MSM_VIDC_BLUR_NONE) | BIT(MSM_VIDC_BLUR_EXTERNAL), MSM_VIDC_BLUR_NONE, @@ -809,7 +809,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { HFI_PROP_BLUR_TYPES, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - {BLUR_RESOLUTION, ENC, H264|HEVC, + {BLUR_RESOLUTION, ENC, H264 | HEVC, 0, S32_MAX, 1, 0, V4L2_CID_MPEG_VIDC_VIDEO_BLUR_RESOLUTION, HFI_PROP_BLUR_RESOLUTION, @@ -827,25 +827,25 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { HFI_PROP_CSC_MATRIX, CAP_FLAG_OUTPUT_PORT}, - {LOWLATENCY_MODE, ENC, H264|HEVC, + {LOWLATENCY_MODE, ENC, H264 | HEVC, 0, 1, 1, 0, V4L2_CID_MPEG_VIDC_LOWLATENCY_REQUEST, 0, CAP_FLAG_NONE}, - {LOWLATENCY_MODE, DEC, H264|HEVC|VP9|AV1, + {LOWLATENCY_MODE, DEC, H264 | HEVC | VP9 | AV1, 0, 1, 1, 0, V4L2_CID_MPEG_VIDC_LOWLATENCY_REQUEST, HFI_PROP_SEQ_CHANGE_AT_SYNC_FRAME, CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - {LTR_COUNT, ENC, H264|HEVC, + {LTR_COUNT, ENC, H264 | HEVC, 0, MAX_LTR_FRAME_COUNT_2, 1, 0, V4L2_CID_MPEG_VIDEO_LTR_COUNT, HFI_PROP_LTR_COUNT, CAP_FLAG_OUTPUT_PORT}, - {USE_LTR, ENC, H264|HEVC, + {USE_LTR, ENC, H264 | HEVC, 0, ((1 << MAX_LTR_FRAME_COUNT_2) - 1), 0, 0, @@ -853,7 +853,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { HFI_PROP_LTR_USE, CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - {MARK_LTR, ENC, H264|HEVC, + {MARK_LTR, ENC, H264 | HEVC, INVALID_DEFAULT_MARK_OR_USE_LTR, (MAX_LTR_FRAME_COUNT_2 - 1), 1, INVALID_DEFAULT_MARK_OR_USE_LTR, @@ -867,7 +867,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { HFI_PROP_BASELAYER_PRIORITYID, CAP_FLAG_OUTPUT_PORT}, - {IR_TYPE, ENC, H264|HEVC, + {IR_TYPE, ENC, H264 | HEVC, V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_RANDOM, V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_CYCLIC, BIT(V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_RANDOM) | @@ -877,20 +877,20 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { 0, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - {IR_PERIOD, ENC, H264|HEVC, + {IR_PERIOD, ENC, H264 | HEVC, 0, INT_MAX, 1, 0, V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD, 0, CAP_FLAG_INPUT_PORT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - {AU_DELIMITER, ENC, H264|HEVC, + {AU_DELIMITER, ENC, H264 | HEVC, 0, 1, 1, 0, V4L2_CID_MPEG_VIDEO_AU_DELIMITER, HFI_PROP_AUD, CAP_FLAG_OUTPUT_PORT}, - {TIME_DELTA_BASED_RC, ENC, H264|HEVC, + {TIME_DELTA_BASED_RC, ENC, H264 | HEVC, 0, 1, 1, 1, V4L2_CID_MPEG_VIDC_TIME_DELTA_BASED_RC, HFI_PROP_TIME_DELTA_BASED_RATE_CONTROL, @@ -902,13 +902,13 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { HFI_PROP_TIME_DELTA_BASED_RATE_CONTROL, CAP_FLAG_OUTPUT_PORT}, - {CONTENT_ADAPTIVE_CODING, ENC, H264|HEVC, + {CONTENT_ADAPTIVE_CODING, ENC, H264 | HEVC, 0, 1, 1, 1, V4L2_CID_MPEG_VIDC_CONTENT_ADAPTIVE_CODING, HFI_PROP_CONTENT_ADAPTIVE_CODING, CAP_FLAG_OUTPUT_PORT}, - {REQUEST_PREPROCESS, ENC, H264|HEVC, + {REQUEST_PREPROCESS, ENC, H264 | HEVC, MSM_VIDC_PREPROCESS_NONE, MSM_VIDC_PREPROCESS_TYPE0, BIT(MSM_VIDC_PREPROCESS_NONE) | @@ -917,25 +917,25 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { 0, HFI_PROP_REQUEST_PREPROCESS, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - {BITRATE_BOOST, ENC, H264|HEVC, + {BITRATE_BOOST, ENC, H264 | HEVC, 0, MAX_BITRATE_BOOST, 25, MAX_BITRATE_BOOST, V4L2_CID_MPEG_VIDC_QUALITY_BITRATE_BOOST, HFI_PROP_BITRATE_BOOST, CAP_FLAG_OUTPUT_PORT}, - {MIN_QUALITY, ENC, H264|HEVC, + {MIN_QUALITY, ENC, H264 | HEVC, 0, MAX_SUPPORTED_MIN_QUALITY, 70, MAX_SUPPORTED_MIN_QUALITY, 0, HFI_PROP_MAINTAIN_MIN_QUALITY, CAP_FLAG_OUTPUT_PORT}, - {VBV_DELAY, ENC, H264|HEVC, + {VBV_DELAY, ENC, H264 | HEVC, 200, 300, 100, 300, V4L2_CID_MPEG_VIDEO_VBV_DELAY, HFI_PROP_VBV_DELAY, CAP_FLAG_OUTPUT_PORT}, - {PEAK_BITRATE, ENC, H264|HEVC, + {PEAK_BITRATE, ENC, H264 | HEVC, /* default peak bitrate is 10% larger than avg bitrate */ 1, MAX_BITRATE, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_BITRATE_PEAK, @@ -949,7 +949,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { HFI_PROP_MIN_QP_PACKED, CAP_FLAG_OUTPUT_PORT}, - {MIN_FRAME_QP, ENC, HEVC|HEIC, + {MIN_FRAME_QP, ENC, HEVC | HEIC, MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP, HFI_PROP_MIN_QP_PACKED, @@ -959,7 +959,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, V4L2_CID_MPEG_VIDEO_H264_I_FRAME_MIN_QP}, - {I_FRAME_MIN_QP, ENC, HEVC|HEIC, + {I_FRAME_MIN_QP, ENC, HEVC | HEIC, MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_MIN_QP}, @@ -967,7 +967,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, V4L2_CID_MPEG_VIDEO_H264_P_FRAME_MIN_QP}, - {P_FRAME_MIN_QP, ENC, HEVC|HEIC, + {P_FRAME_MIN_QP, ENC, HEVC | HEIC, MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_MIN_QP}, @@ -975,7 +975,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, V4L2_CID_MPEG_VIDEO_H264_B_FRAME_MIN_QP}, - {B_FRAME_MIN_QP, ENC, HEVC|HEIC, + {B_FRAME_MIN_QP, ENC, HEVC | HEIC, MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_MIN_QP}, @@ -985,7 +985,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { HFI_PROP_MAX_QP_PACKED, CAP_FLAG_OUTPUT_PORT}, - {MAX_FRAME_QP, ENC, HEVC|HEIC, + {MAX_FRAME_QP, ENC, HEVC | HEIC, MIN_QP_10BIT, MAX_QP, 1, MAX_QP, V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP, HFI_PROP_MAX_QP_PACKED, @@ -995,7 +995,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { MIN_QP_8BIT, MAX_QP, 1, MAX_QP, V4L2_CID_MPEG_VIDEO_H264_I_FRAME_MAX_QP}, - {I_FRAME_MAX_QP, ENC, HEVC|HEIC, + {I_FRAME_MAX_QP, ENC, HEVC | HEIC, MIN_QP_10BIT, MAX_QP, 1, MAX_QP, V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_MAX_QP}, @@ -1003,7 +1003,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { MIN_QP_8BIT, MAX_QP, 1, MAX_QP, V4L2_CID_MPEG_VIDEO_H264_P_FRAME_MAX_QP}, - {P_FRAME_MAX_QP, ENC, HEVC|HEIC, + {P_FRAME_MAX_QP, ENC, HEVC | HEIC, MIN_QP_10BIT, MAX_QP, 1, MAX_QP, V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_MAX_QP}, @@ -1011,7 +1011,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { MIN_QP_8BIT, MAX_QP, 1, MAX_QP, V4L2_CID_MPEG_VIDEO_H264_B_FRAME_MAX_QP}, - {B_FRAME_MAX_QP, ENC, HEVC|HEIC, + {B_FRAME_MAX_QP, ENC, HEVC | HEIC, MIN_QP_10BIT, MAX_QP, 1, MAX_QP, V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_MAX_QP}, @@ -1202,7 +1202,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { HFI_PROP_CABAC_SESSION, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - {ENTROPY_MODE, DEC, H264|HEVC|VP9|AV1, + {ENTROPY_MODE, DEC, H264 | HEVC | VP9 | AV1, V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC, V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC) | @@ -1211,7 +1211,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { 0, HFI_PROP_CABAC_SESSION}, - {PROFILE, ENC|DEC, H264, + {PROFILE, ENC | DEC, H264, V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE, V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH, BIT(V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE) | @@ -1224,7 +1224,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { HFI_PROP_PROFILE, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - {PROFILE, ENC|DEC, HEVC|HEIC, + {PROFILE, ENC | DEC, HEVC | HEIC, V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN, V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE, BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN) | @@ -1281,7 +1281,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { HFI_PROP_LEVEL, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - {LEVEL, ENC, HEVC|HEIC, + {LEVEL, ENC, HEVC | HEIC, V4L2_MPEG_VIDEO_HEVC_LEVEL_1, V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2, BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_1) | @@ -1330,7 +1330,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { HFI_PROP_LEVEL, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - {LEVEL, DEC, HEVC|HEIC, + {LEVEL, DEC, HEVC | HEIC, V4L2_MPEG_VIDEO_HEVC_LEVEL_1, V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2, BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_1) | @@ -1407,7 +1407,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { HFI_PROP_TIER, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - {HEVC_TIER, ENC|DEC, HEVC, + {HEVC_TIER, ENC | DEC, HEVC, V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, V4L2_MPEG_VIDEO_HEVC_TIER_HIGH, BIT(V4L2_MPEG_VIDEO_HEVC_TIER_MAIN) | @@ -1417,7 +1417,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { HFI_PROP_TIER, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - {HEVC_TIER, ENC|DEC, HEIC, + {HEVC_TIER, ENC | DEC, HEIC, V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, BIT(V4L2_MPEG_VIDEO_HEVC_TIER_MAIN), @@ -1437,7 +1437,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { HFI_PROP_DEBLOCKING_MODE, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - {LF_MODE, ENC, HEVC|HEIC, + {LF_MODE, ENC, HEVC | HEIC, V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_DISABLED, DB_HEVC_DISABLE_SLICE_BOUNDARY, BIT(V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_DISABLED) | @@ -1452,7 +1452,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { -6, 6, 1, 0, V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_ALPHA}, - {LF_ALPHA, ENC, HEVC|HEIC, + {LF_ALPHA, ENC, HEVC | HEIC, -6, 6, 1, 0, V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2}, @@ -1460,11 +1460,11 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { -6, 6, 1, 0, V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_BETA}, - {LF_BETA, ENC, HEVC|HEIC, + {LF_BETA, ENC, HEVC | HEIC, -6, 6, 1, 0, V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2}, - {SLICE_MODE, ENC, H264|HEVC, + {SLICE_MODE, ENC, H264 | HEVC, V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_BYTES, BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE) | @@ -1484,20 +1484,20 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { 0, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - {SLICE_MAX_BYTES, ENC, H264|HEVC, + {SLICE_MAX_BYTES, ENC, H264 | HEVC, MIN_SLICE_BYTE_SIZE, MAX_SLICE_BYTE_SIZE, 1, MIN_SLICE_BYTE_SIZE, V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES, HFI_PROP_MULTI_SLICE_BYTES_COUNT, CAP_FLAG_OUTPUT_PORT}, - {SLICE_MAX_MB, ENC, H264|HEVC, + {SLICE_MAX_MB, ENC, H264 | HEVC, 1, MAX_SLICE_MB_SIZE, 1, 1, V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB, HFI_PROP_MULTI_SLICE_MB_COUNT, CAP_FLAG_OUTPUT_PORT}, - {MB_RC, ENC, H264|HEVC, + {MB_RC, ENC, H264 | HEVC, 0, 1, 1, 1, V4L2_CID_MPEG_VIDEO_MB_RC_ENABLE, 0, @@ -1516,32 +1516,32 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { HFI_PROP_CHROMA_QP_OFFSET, CAP_FLAG_OUTPUT_PORT}, - {DISPLAY_DELAY_ENABLE, DEC, H264|HEVC|VP9|AV1, + {DISPLAY_DELAY_ENABLE, DEC, H264 | HEVC | VP9 | AV1, 0, 1, 1, 0, V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY_ENABLE, HFI_PROP_DECODE_ORDER_OUTPUT, CAP_FLAG_INPUT_PORT}, - {DISPLAY_DELAY, DEC, H264|HEVC|VP9|AV1, + {DISPLAY_DELAY, DEC, H264 | HEVC | VP9 | AV1, 0, 1, 1, 0, V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY, HFI_PROP_DECODE_ORDER_OUTPUT, CAP_FLAG_INPUT_PORT}, - {OUTPUT_ORDER, DEC, H264|HEVC|VP9|AV1, + {OUTPUT_ORDER, DEC, H264 | HEVC | VP9 | AV1, 0, 1, 1, 0, 0, HFI_PROP_DECODE_ORDER_OUTPUT, CAP_FLAG_INPUT_PORT}, - {INPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL, + {INPUT_BUF_HOST_MAX_COUNT, ENC | DEC, CODECS_ALL, DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT, 1, DEFAULT_MAX_HOST_BUF_COUNT, 0, HFI_PROP_BUFFER_HOST_MAX_COUNT, CAP_FLAG_INPUT_PORT}, - {OUTPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL, + {OUTPUT_BUF_HOST_MAX_COUNT, ENC | DEC, CODECS_ALL, DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT, 1, DEFAULT_MAX_HOST_BUF_COUNT, 0, @@ -1560,14 +1560,14 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { HFI_PROP_CONCEAL_COLOR_10BIT, CAP_FLAG_INPUT_PORT}, - {STAGE, DEC|ENC, CODECS_ALL, + {STAGE, DEC | ENC, CODECS_ALL, MSM_VIDC_STAGE_1, MSM_VIDC_STAGE_2, 1, MSM_VIDC_STAGE_2, 0, HFI_PROP_STAGE}, - {PIPE, DEC|ENC, CODECS_ALL, + {PIPE, DEC | ENC, CODECS_ALL, MSM_VIDC_PIPE_1, MSM_VIDC_PIPE_4, 1, MSM_VIDC_PIPE_4, @@ -1591,7 +1591,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { MSM_VIDC_POWER_SAVE_MODE, 1, MSM_VIDC_POWER_SAVE_MODE}, - {CODED_FRAMES, DEC, H264|HEVC|HEIC, + {CODED_FRAMES, DEC, H264 | HEVC | HEIC, CODED_FRAMES_PROGRESSIVE, CODED_FRAMES_INTERLACE, 1, CODED_FRAMES_PROGRESSIVE, V4L2_CID_MPEG_VIDC_INTERLACE, @@ -1602,7 +1602,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { 0, HFI_PROP_LUMA_CHROMA_BIT_DEPTH}, - {CODEC_CONFIG, DEC, H264|HEVC|HEIC|AV1, 0, 1, 1, 0, + {CODEC_CONFIG, DEC, H264 | HEVC | HEIC | AV1, 0, 1, 1, 0, V4L2_CID_MPEG_VIDC_CODEC_CONFIG, 0, CAP_FLAG_DYNAMIC_ALLOWED}, @@ -1632,7 +1632,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { HFI_PROP_SEQ_CHANGE_AT_SYNC_FRAME, CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - {PRIORITY, DEC|ENC, CODECS_ALL, + {PRIORITY, DEC | ENC, CODECS_ALL, 0, 4, 1, 4, V4L2_CID_MPEG_VIDC_PRIORITY, HFI_PROP_SESSION_PRIORITY, @@ -1695,13 +1695,13 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { HFI_PROP_CROP_OFFSETS, CAP_FLAG_BITMASK | CAP_FLAG_META}, - {ALL_INTRA, ENC, H264|HEVC, + {ALL_INTRA, ENC, H264 | HEVC, 0, 1, 1, 0, 0, 0, CAP_FLAG_OUTPUT_PORT}, - {META_LTR_MARK_USE, ENC, H264|HEVC, + {META_LTR_MARK_USE, ENC, H264 | HEVC, MSM_VIDC_META_DISABLE, MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, 0, MSM_VIDC_META_DISABLE, @@ -1789,7 +1789,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { HFI_PROP_PICTURE_TYPE, CAP_FLAG_BITMASK | CAP_FLAG_META}, - {META_SEI_MASTERING_DISP, ENC, HEVC|HEIC, + {META_SEI_MASTERING_DISP, ENC, HEVC | HEIC, MSM_VIDC_META_DISABLE, MSM_VIDC_META_ENABLE | MSM_VIDC_META_TX_INPUT, 0, MSM_VIDC_META_DISABLE, @@ -1797,7 +1797,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { HFI_PROP_SEI_MASTERING_DISPLAY_COLOUR, CAP_FLAG_BITMASK | CAP_FLAG_META}, - {META_SEI_MASTERING_DISP, DEC, HEVC|HEIC|AV1, + {META_SEI_MASTERING_DISP, DEC, HEVC | HEIC | AV1, MSM_VIDC_META_DISABLE, MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_INPUT | MSM_VIDC_META_RX_OUTPUT, @@ -1806,7 +1806,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { HFI_PROP_SEI_MASTERING_DISPLAY_COLOUR, CAP_FLAG_BITMASK | CAP_FLAG_META}, - {META_SEI_CLL, ENC, HEVC|HEIC, + {META_SEI_CLL, ENC, HEVC | HEIC, MSM_VIDC_META_DISABLE, MSM_VIDC_META_ENABLE | MSM_VIDC_META_TX_INPUT, 0, MSM_VIDC_META_DISABLE, @@ -1814,7 +1814,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { HFI_PROP_SEI_CONTENT_LIGHT_LEVEL, CAP_FLAG_BITMASK | CAP_FLAG_META}, - {META_SEI_CLL, DEC, HEVC|HEIC|AV1, + {META_SEI_CLL, DEC, HEVC | HEIC | AV1, MSM_VIDC_META_DISABLE, MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_INPUT | MSM_VIDC_META_RX_OUTPUT, @@ -1823,7 +1823,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { HFI_PROP_SEI_CONTENT_LIGHT_LEVEL, CAP_FLAG_BITMASK | CAP_FLAG_META}, - {META_HDR10PLUS, ENC, HEVC|HEIC, + {META_HDR10PLUS, ENC, HEVC | HEIC, MSM_VIDC_META_DISABLE, MSM_VIDC_META_ENABLE | MSM_VIDC_META_TX_INPUT, 0, MSM_VIDC_META_DISABLE, @@ -1831,7 +1831,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { HFI_PROP_SEI_HDR10PLUS_USERDATA, CAP_FLAG_BITMASK | CAP_FLAG_META}, - {META_HDR10PLUS, DEC, HEVC|HEIC|AV1, + {META_HDR10PLUS, DEC, HEVC | HEIC | AV1, MSM_VIDC_META_DISABLE, MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_INPUT | MSM_VIDC_META_RX_OUTPUT, @@ -1848,7 +1848,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { HFI_PROP_DOLBY_RPU_METADATA, CAP_FLAG_BITMASK | CAP_FLAG_META}, - {META_DOLBY_RPU, DEC, H264|HEVC, + {META_DOLBY_RPU, DEC, H264 | HEVC, MSM_VIDC_META_DISABLE, MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, 0, MSM_VIDC_META_DISABLE, @@ -1919,7 +1919,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { HFI_PROP_ENC_QP_METADATA, CAP_FLAG_BITMASK | CAP_FLAG_META}, - {META_ROI_INFO, ENC, H264|HEVC, + {META_ROI_INFO, ENC, H264 | HEVC, MSM_VIDC_META_DISABLE, MSM_VIDC_META_ENABLE | MSM_VIDC_META_TX_INPUT, 0, MSM_VIDC_META_DISABLE, @@ -1927,7 +1927,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { HFI_PROP_ROI_INFO, CAP_FLAG_INPUT_PORT | CAP_FLAG_BITMASK | CAP_FLAG_META}, - {META_SALIENCY_INFO, ENC, H264|HEVC, + {META_SALIENCY_INFO, ENC, H264 | HEVC, MSM_VIDC_META_DISABLE, MSM_VIDC_META_ENABLE | MSM_VIDC_META_TX_INPUT, 0, MSM_VIDC_META_DISABLE, @@ -1954,7 +1954,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { HEIC_GRID_WIDTH, HEIC_GRID_WIDTH, V4L2_CID_MPEG_VIDC_GRID_WIDTH}, - {COMPLEXITY, ENC, H264|HEVC, + {COMPLEXITY, ENC, H264 | HEVC, 0, 100, 1, DEFAULT_COMPLEXITY, V4L2_CID_MPEG_VIDC_VENC_COMPLEXITY}, @@ -2004,7 +2004,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kala {PIX_FMTS, ENC, HEIC, {PROFILE}}, - {PIX_FMTS, DEC, HEVC|HEIC, + {PIX_FMTS, DEC, HEVC | HEIC, {PROFILE}}, {FRAME_RATE, ENC, CODECS_ALL, @@ -2020,32 +2020,32 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kala {0}, msm_vidc_adjust_dec_operating_rate}, - {SECURE_MODE, ENC|DEC, H264|HEVC|VP9|AV1, + {SECURE_MODE, ENC | DEC, H264 | HEVC | VP9 | AV1, {0}, NULL, msm_vidc_set_u32}, - {META_OUTBUF_FENCE, DEC, H264|HEVC|VP9|AV1, + {META_OUTBUF_FENCE, DEC, H264 | HEVC | VP9 | AV1, {LOWLATENCY_MODE, OUTBUF_FENCE_TYPE, OUTBUF_FENCE_DIRECTION}, NULL, NULL}, - {INBUF_FENCE_TYPE, DEC, H264|HEVC|VP9|AV1, + {INBUF_FENCE_TYPE, DEC, H264 | HEVC | VP9 | AV1, {0}, NULL, NULL}, - {OUTBUF_FENCE_TYPE, DEC, H264|HEVC|VP9|AV1, + {OUTBUF_FENCE_TYPE, DEC, H264 | HEVC | VP9 | AV1, {0}, msm_vidc_adjust_dec_outbuf_fence_type, msm_vidc_set_outbuf_fence_type}, - {INBUF_FENCE_DIRECTION, DEC, H264|HEVC|VP9|AV1, + {INBUF_FENCE_DIRECTION, DEC, H264 | HEVC | VP9 | AV1, {0}, NULL, NULL}, - {OUTBUF_FENCE_DIRECTION, DEC, H264|HEVC|VP9|AV1, + {OUTBUF_FENCE_DIRECTION, DEC, H264 | HEVC | VP9 | AV1, {0}, msm_vidc_adjust_dec_outbuf_fence_direction, msm_vidc_set_outbuf_fence_direction}, @@ -2065,7 +2065,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kala NULL, msm_vidc_set_rotation}, - {SUPER_FRAME, ENC, H264|HEVC, + {SUPER_FRAME, ENC, H264 | HEVC, {INPUT_BUF_HOST_MAX_COUNT, OUTPUT_BUF_HOST_MAX_COUNT}, NULL, NULL}, @@ -2085,7 +2085,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kala NULL, msm_vidc_set_u32}, - {REQUEST_I_FRAME, ENC, H264|HEVC, + {REQUEST_I_FRAME, ENC, H264 | HEVC, {0}, NULL, msm_vidc_set_req_sync_frame}, @@ -2123,7 +2123,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kala msm_vidc_adjust_bitrate_mode, msm_vidc_set_u32_enum}, - {CONSTANT_QUALITY, ENC, HEVC|HEIC, + {CONSTANT_QUALITY, ENC, HEVC | HEIC, {0}, NULL, msm_vidc_set_constant_quality}, @@ -2138,7 +2138,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kala NULL, msm_vidc_set_u32}, - {B_FRAME, ENC, H264|HEVC, + {B_FRAME, ENC, H264 | HEVC, {ALL_INTRA}, msm_vidc_adjust_b_frame, msm_vidc_set_u32}, @@ -2148,12 +2148,12 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kala NULL, msm_vidc_set_u32}, - {BLUR_TYPES, ENC, H264|HEVC, + {BLUR_TYPES, ENC, H264 | HEVC, {BLUR_RESOLUTION}, msm_vidc_adjust_blur_type, msm_vidc_set_u32_enum}, - {BLUR_RESOLUTION, ENC, H264|HEVC, + {BLUR_RESOLUTION, ENC, H264 | HEVC, {0}, msm_vidc_adjust_blur_resolution, msm_vidc_set_blur_resolution}, @@ -2168,32 +2168,32 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kala msm_vidc_adjust_enc_lowlatency_mode, NULL}, - {LOWLATENCY_MODE, DEC, H264|HEVC|VP9|AV1, + {LOWLATENCY_MODE, DEC, H264 | HEVC | VP9 | AV1, {STAGE}, msm_vidc_adjust_dec_lowlatency_mode, NULL}, - {LTR_COUNT, ENC, H264|HEVC, + {LTR_COUNT, ENC, H264 | HEVC, {0}, msm_vidc_adjust_ltr_count, msm_vidc_set_u32}, - {USE_LTR, ENC, H264|HEVC, + {USE_LTR, ENC, H264 | HEVC, {0}, msm_vidc_adjust_use_ltr, msm_vidc_set_use_and_mark_ltr}, - {MARK_LTR, ENC, H264|HEVC, + {MARK_LTR, ENC, H264 | HEVC, {0}, msm_vidc_adjust_mark_ltr, msm_vidc_set_use_and_mark_ltr}, - {IR_PERIOD, ENC, H264|HEVC, + {IR_PERIOD, ENC, H264 | HEVC, {0}, msm_vidc_adjust_ir_period, msm_vidc_set_ir_period}, - {AU_DELIMITER, ENC, H264|HEVC, + {AU_DELIMITER, ENC, H264 | HEVC, {0}, NULL, msm_vidc_set_u32}, @@ -2203,17 +2203,17 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kala msm_vidc_adjust_delta_based_rc, msm_vidc_set_u32}, - {CONTENT_ADAPTIVE_CODING, ENC, H264|HEVC, + {CONTENT_ADAPTIVE_CODING, ENC, H264 | HEVC, {REQUEST_PREPROCESS}, msm_vidc_adjust_brs, msm_vidc_set_vbr_related_properties}, - {REQUEST_PREPROCESS, ENC, H264|HEVC, + {REQUEST_PREPROCESS, ENC, H264 | HEVC, {0}, msm_vidc_adjust_preprocess, msm_vidc_set_preprocess}, - {BITRATE_BOOST, ENC, H264|HEVC, + {BITRATE_BOOST, ENC, H264 | HEVC, {0}, msm_vidc_adjust_bitrate_boost_iris3, msm_vidc_set_vbr_related_properties}, @@ -2228,12 +2228,12 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kala msm_vidc_adjust_min_quality, msm_vidc_set_u32}, - {VBV_DELAY, ENC, H264|HEVC, + {VBV_DELAY, ENC, H264 | HEVC, {0}, NULL, msm_vidc_set_cbr_related_properties}, - {PEAK_BITRATE, ENC, H264|HEVC, + {PEAK_BITRATE, ENC, H264 | HEVC, {0}, msm_vidc_adjust_peak_bitrate, msm_vidc_set_cbr_related_properties}, @@ -2288,13 +2288,13 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kala NULL, msm_vidc_set_frame_qp}, - {LAYER_TYPE, ENC, H264|HEVC, + {LAYER_TYPE, ENC, H264 | HEVC, {CONTENT_ADAPTIVE_CODING, LTR_COUNT}}, - {LAYER_ENABLE, ENC, H264|HEVC, + {LAYER_ENABLE, ENC, H264 | HEVC, {CONTENT_ADAPTIVE_CODING}}, - {ENH_LAYER_COUNT, ENC, H264|HEVC, + {ENH_LAYER_COUNT, ENC, H264 | HEVC, {GOP_SIZE, B_FRAME, BIT_RATE, MIN_QUALITY, SLICE_MODE, LTR_COUNT}, msm_vidc_adjust_layer_count, @@ -2305,32 +2305,32 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kala NULL, msm_vidc_set_u32}, - {L0_BR, ENC, H264|HEVC, + {L0_BR, ENC, H264 | HEVC, {L1_BR}, msm_vidc_adjust_layer_bitrate, msm_vidc_set_layer_bitrate}, - {L1_BR, ENC, H264|HEVC, + {L1_BR, ENC, H264 | HEVC, {L2_BR}, msm_vidc_adjust_layer_bitrate, msm_vidc_set_layer_bitrate}, - {L2_BR, ENC, H264|HEVC, + {L2_BR, ENC, H264 | HEVC, {L3_BR}, msm_vidc_adjust_layer_bitrate, msm_vidc_set_layer_bitrate}, - {L3_BR, ENC, H264|HEVC, + {L3_BR, ENC, H264 | HEVC, {L4_BR}, msm_vidc_adjust_layer_bitrate, msm_vidc_set_layer_bitrate}, - {L4_BR, ENC, H264|HEVC, + {L4_BR, ENC, H264 | HEVC, {L5_BR}, msm_vidc_adjust_layer_bitrate, msm_vidc_set_layer_bitrate}, - {L5_BR, ENC, H264|HEVC, + {L5_BR, ENC, H264 | HEVC, {0}, msm_vidc_adjust_layer_bitrate, msm_vidc_set_layer_bitrate}, @@ -2350,12 +2350,12 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kala NULL, msm_vidc_set_u32_enum}, - {PROFILE, ENC|DEC, HEVC|HEIC, + {PROFILE, ENC | DEC, HEVC | HEIC, {0}, msm_vidc_adjust_profile, msm_vidc_set_u32_enum}, - {PROFILE, DEC, VP9|AV1, + {PROFILE, DEC, VP9 | AV1, {0}, NULL, msm_vidc_set_u32_enum}, @@ -2375,7 +2375,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kala NULL, msm_vidc_set_u32_enum}, - {HEVC_TIER, ENC|DEC, HEVC|HEIC, + {HEVC_TIER, ENC | DEC, HEVC | HEIC, {0}, NULL, msm_vidc_set_u32_enum}, @@ -2385,7 +2385,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kala NULL, msm_vidc_set_deblock_mode}, - {SLICE_MODE, ENC, H264|HEVC, + {SLICE_MODE, ENC, H264 | HEVC, {STAGE, DELIVERY_MODE}, msm_vidc_adjust_slice_count, msm_vidc_set_slice_count}, @@ -2405,37 +2405,37 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kala msm_vidc_adjust_chroma_qp_index_offset, msm_vidc_set_chroma_qp_index_offset}, - {DISPLAY_DELAY_ENABLE, DEC, H264|HEVC|VP9|AV1, + {DISPLAY_DELAY_ENABLE, DEC, H264 | HEVC | VP9 | AV1, {OUTPUT_ORDER}, NULL, NULL}, - {DISPLAY_DELAY, DEC, H264|HEVC|VP9|AV1, + {DISPLAY_DELAY, DEC, H264 | HEVC | VP9 | AV1, {OUTPUT_ORDER}, NULL, NULL}, - {OUTPUT_ORDER, DEC, H264|HEVC|VP9|AV1, + {OUTPUT_ORDER, DEC, H264 | HEVC | VP9 | AV1, {0}, msm_vidc_adjust_output_order, msm_vidc_set_u32}, - {INPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL, + {INPUT_BUF_HOST_MAX_COUNT, ENC | DEC, CODECS_ALL, {0}, msm_vidc_adjust_input_buf_host_max_count, msm_vidc_set_u32}, - {INPUT_BUF_HOST_MAX_COUNT, ENC, H264|HEVC, + {INPUT_BUF_HOST_MAX_COUNT, ENC, H264 | HEVC, {0}, msm_vidc_adjust_input_buf_host_max_count, msm_vidc_set_u32}, - {OUTPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL, + {OUTPUT_BUF_HOST_MAX_COUNT, ENC | DEC, CODECS_ALL, {0}, msm_vidc_adjust_output_buf_host_max_count, msm_vidc_set_u32}, - {OUTPUT_BUF_HOST_MAX_COUNT, ENC, H264|HEVC, + {OUTPUT_BUF_HOST_MAX_COUNT, ENC, H264 | HEVC, {0}, msm_vidc_adjust_output_buf_host_max_count, msm_vidc_set_u32}, @@ -2455,22 +2455,22 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kala NULL, msm_vidc_set_stage}, - {STAGE, ENC, H264|HEVC, + {STAGE, ENC, H264 | HEVC, {0}, NULL, msm_vidc_set_stage}, - {STAGE, DEC, H264|HEVC|VP9|AV1, + {STAGE, DEC, H264 | HEVC | VP9 | AV1, {0}, NULL, msm_vidc_set_stage}, - {PIPE, DEC|ENC, CODECS_ALL, + {PIPE, DEC | ENC, CODECS_ALL, {0}, NULL, msm_vidc_set_pipe}, - {THUMBNAIL_MODE, DEC, H264|HEVC|VP9|AV1, + {THUMBNAIL_MODE, DEC, H264 | HEVC | VP9 | AV1, {OUTPUT_ORDER}, NULL, msm_vidc_set_u32}, @@ -2485,7 +2485,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kala NULL, msm_vidc_set_u32}, - {PRIORITY, DEC|ENC, CODECS_ALL, + {PRIORITY, DEC | ENC, CODECS_ALL, {0}, msm_vidc_adjust_session_priority, msm_vidc_set_session_priority}, @@ -2510,18 +2510,18 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kala NULL, msm_vidc_set_u32}, - {ALL_INTRA, ENC, H264|HEVC, + {ALL_INTRA, ENC, H264 | HEVC, {LTR_COUNT, IR_PERIOD, SLICE_MODE, BIT_RATE}, msm_vidc_adjust_all_intra, NULL}, - {META_EVA_STATS, ENC, H264|HEVC, + {META_EVA_STATS, ENC, H264 | HEVC, {ENH_LAYER_COUNT, REQUEST_PREPROCESS}}, {META_EVA_STATS, ENC, HEIC, {0}}, - {META_ROI_INFO, ENC, H264|HEVC, + {META_ROI_INFO, ENC, H264 | HEVC, {MIN_QUALITY, IR_PERIOD, BLUR_TYPES}, msm_vidc_adjust_roi_info, NULL}, @@ -2531,7 +2531,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kala NULL, msm_vidc_set_u32}, - {DELIVERY_MODE, ENC, H264|HEVC, + {DELIVERY_MODE, ENC, H264 | HEVC, {LOWLATENCY_MODE, OUTPUT_BUF_HOST_MAX_COUNT}, msm_vidc_adjust_delivery_mode, msm_vidc_set_u32}, diff --git a/driver/platform/pineapple/src/msm_vidc_pineapple.c b/driver/platform/pineapple/src/msm_vidc_pineapple.c index 423b64fd8b..c24db71ba8 100644 --- a/driver/platform/pineapple/src/msm_vidc_pineapple.c +++ b/driver/platform/pineapple/src/msm_vidc_pineapple.c @@ -282,8 +282,8 @@ static struct matrix_coeff_info matrix_coeff_data_pineapple[] = { static struct msm_platform_core_capability core_data_pineapple[] = { /* {type, value} */ - {ENC_CODECS, H264|HEVC|HEIC}, - {DEC_CODECS, H264|HEVC|VP9|AV1|HEIC}, + {ENC_CODECS, H264 | HEVC | HEIC}, + {DEC_CODECS, H264 | HEVC | VP9 | AV1 | HEIC}, {MAX_SESSION_COUNT, 16}, {MAX_NUM_720P_SESSIONS, 16}, {MAX_NUM_1080P_SESSIONS, 16}, @@ -441,13 +441,13 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { {SECURE_FRAME_HEIGHT, ENC, HEVC, 96, 4096, 1, 1080}, - {PIX_FMTS, ENC|DEC, H264, + {PIX_FMTS, ENC | DEC, H264, MSM_VIDC_FMT_NV12, MSM_VIDC_FMT_NV12C, MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C, MSM_VIDC_FMT_NV12C}, - {PIX_FMTS, ENC|DEC, HEVC|VP9|AV1, + {PIX_FMTS, ENC | DEC, HEVC | VP9 | AV1, MSM_VIDC_FMT_NV12, MSM_VIDC_FMT_TP10C, MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C | @@ -467,17 +467,17 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { MSM_VIDC_FMT_P010 | MSM_VIDC_FMT_TP10C, MSM_VIDC_FMT_NV12C}, - {MIN_BUFFERS_INPUT, ENC|DEC, CODECS_ALL, 0, 64, 1, 4, + {MIN_BUFFERS_INPUT, ENC | DEC, CODECS_ALL, 0, 64, 1, 4, V4L2_CID_MIN_BUFFERS_FOR_OUTPUT, 0, CAP_FLAG_VOLATILE}, - {MIN_BUFFERS_INPUT, ENC|DEC, HEIC, 0, 64, 1, 1, + {MIN_BUFFERS_INPUT, ENC | DEC, HEIC, 0, 64, 1, 1, V4L2_CID_MIN_BUFFERS_FOR_OUTPUT, 0, CAP_FLAG_VOLATILE}, - {MIN_BUFFERS_OUTPUT, ENC|DEC, CODECS_ALL, + {MIN_BUFFERS_OUTPUT, ENC | DEC, CODECS_ALL, 0, 64, 1, 4, V4L2_CID_MIN_BUFFERS_FOR_CAPTURE, HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT, @@ -500,16 +500,16 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { {MBPF, DEC, HEIC, 64, 262144, 1, 262144 }, /* (4096 * 2304) / 256 */ - {LOSSLESS_MBPF, ENC, H264|HEVC, 64, 36864, 1, 36864}, + {LOSSLESS_MBPF, ENC, H264 | HEVC, 64, 36864, 1, 36864}, /* Batch Mode Decode */ /* TODO: update with new values based on updated voltage corner */ - {BATCH_MBPF, DEC, H264|HEVC|VP9|AV1, 64, 34816, 1, 34816}, + {BATCH_MBPF, DEC, H264 | HEVC | VP9 | AV1, 64, 34816, 1, 34816}, /* (4096 * 2304) / 256 */ - {BATCH_FPS, DEC, H264|HEVC|VP9|AV1, 1, 120, 1, 120}, + {BATCH_FPS, DEC, H264 | HEVC | VP9 | AV1, 1, 120, 1, 120}, - {SECURE_MBPF, ENC|DEC, H264|HEVC|VP9|AV1, 64, 36864, 1, 36864}, + {SECURE_MBPF, ENC | DEC, H264 | HEVC | VP9 | AV1, 64, 36864, 1, 36864}, {SECURE_MBPF, ENC, HEVC, 36, 36864, 1, 36864}, @@ -555,21 +555,21 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - {INPUT_RATE, ENC|DEC, CODECS_ALL, + {INPUT_RATE, ENC | DEC, CODECS_ALL, (MINIMUM_FPS << 16), INT_MAX, 1, (DEFAULT_FPS << 16)}, - {TIMESTAMP_RATE, ENC|DEC, CODECS_ALL, + {TIMESTAMP_RATE, ENC | DEC, CODECS_ALL, (MINIMUM_FPS << 16), INT_MAX, 1, (DEFAULT_FPS << 16)}, - {SCALE_FACTOR, ENC, H264|HEVC, 1, 8, 1, 8}, + {SCALE_FACTOR, ENC, H264 | HEVC, 1, 8, 1, 8}, {MB_CYCLES_VSP, ENC, CODECS_ALL, 25, 25, 1, 25}, {MB_CYCLES_VSP, DEC, CODECS_ALL, 25, 25, 1, 25}, - {MB_CYCLES_VSP, DEC, VP9|AV1, 60, 60, 1, 60}, + {MB_CYCLES_VSP, DEC, VP9 | AV1, 60, 60, 1, 60}, {MB_CYCLES_VPP, ENC, CODECS_ALL, 675, 675, 1, 675}, @@ -579,7 +579,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { {MB_CYCLES_LP, DEC, CODECS_ALL, 200, 200, 1, 200}, - {MB_CYCLES_FW, ENC|DEC, CODECS_ALL, 489583, 489583, 1, 489583}, + {MB_CYCLES_FW, ENC | DEC, CODECS_ALL, 489583, 489583, 1, 489583}, {MB_CYCLES_FW_VPP, ENC, CODECS_ALL, 48405, 48405, 1, 48405}, @@ -588,11 +588,11 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { {ENC_RING_BUFFER_COUNT, ENC, CODECS_ALL, 0, MAX_ENC_RING_BUF_COUNT, 1, 0}, - {CLIENT_ID, ENC|DEC, CODECS_ALL, + {CLIENT_ID, ENC | DEC, CODECS_ALL, INVALID_CLIENT_ID, INT_MAX, 1, INVALID_CLIENT_ID, V4L2_CID_MPEG_VIDC_CLIENT_ID}, - {SECURE_MODE, ENC|DEC, H264|HEVC|VP9|AV1, + {SECURE_MODE, ENC | DEC, H264 | HEVC | VP9 | AV1, 0, 1, 1, 0, V4L2_CID_MPEG_VIDC_SECURE, HFI_PROP_SECURE, @@ -602,7 +602,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { * Client will enable V4L2_CID_MPEG_VIDC_METADATA_OUTBUF_FENCE * to get fence_id in input metadata buffer done. */ - {META_OUTBUF_FENCE, DEC, H264|HEVC|VP9|AV1, + {META_OUTBUF_FENCE, DEC, H264 | HEVC | VP9 | AV1, MSM_VIDC_META_DISABLE, MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_INPUT, 0, MSM_VIDC_META_DISABLE, @@ -628,7 +628,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { CAP_FLAG_VOLATILE}, /* Fence type for input buffer. Currently unused */ - {INBUF_FENCE_TYPE, DEC, H264|HEVC|VP9|AV1, + {INBUF_FENCE_TYPE, DEC, H264 | HEVC | VP9 | AV1, MSM_VIDC_FENCE_NONE, MSM_VIDC_FENCE_NONE, BIT(MSM_VIDC_FENCE_NONE), MSM_VIDC_FENCE_NONE, @@ -636,7 +636,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { HFI_PROP_FENCE_TYPE, CAP_FLAG_MENU | CAP_FLAG_INPUT_PORT}, - {OUTBUF_FENCE_TYPE, DEC, H264|HEVC|VP9|AV1, + {OUTBUF_FENCE_TYPE, DEC, H264 | HEVC | VP9 | AV1, MSM_VIDC_FENCE_NONE, MSM_VIDC_SYNX_V2_FENCE, BIT(MSM_VIDC_FENCE_NONE) | BIT(MSM_VIDC_SW_FENCE) | BIT(MSM_VIDC_SYNX_V2_FENCE), @@ -646,7 +646,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { CAP_FLAG_MENU | CAP_FLAG_OUTPUT_PORT}, /* Fence direction for input buffer. Currently unused */ - {INBUF_FENCE_DIRECTION, DEC, H264|HEVC|VP9|AV1, + {INBUF_FENCE_DIRECTION, DEC, H264 | HEVC | VP9 | AV1, MSM_VIDC_FENCE_DIR_NONE, MSM_VIDC_FENCE_DIR_NONE, BIT(MSM_VIDC_FENCE_DIR_NONE), MSM_VIDC_FENCE_DIR_NONE, @@ -654,7 +654,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { HFI_PROP_FENCE_DIRECTION, CAP_FLAG_MENU | CAP_FLAG_INPUT_PORT}, - {OUTBUF_FENCE_DIRECTION, DEC, H264|HEVC|VP9|AV1, + {OUTBUF_FENCE_DIRECTION, DEC, H264 | HEVC | VP9 | AV1, MSM_VIDC_FENCE_DIR_NONE, MSM_VIDC_FENCE_DIR_RX, BIT(MSM_VIDC_FENCE_DIR_NONE) | BIT(MSM_VIDC_FENCE_DIR_TX) | BIT(MSM_VIDC_FENCE_DIR_RX), @@ -663,12 +663,12 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { HFI_PROP_FENCE_DIRECTION, CAP_FLAG_MENU | CAP_FLAG_OUTPUT_PORT}, - {FENCE_ERROR_DATA_CORRUPT, DEC, H264|HEVC|VP9|AV1, + {FENCE_ERROR_DATA_CORRUPT, DEC, H264 | HEVC | VP9 | AV1, 0, 1, 1, 0, 0, HFI_PROP_FENCE_ERROR_DATA_CORRUPT}, - {TS_REORDER, DEC, H264|HEVC, + {TS_REORDER, DEC, H264 | HEVC, 0, 1, 1, 0, V4L2_CID_MPEG_VIDC_TS_REORDER}, @@ -692,12 +692,12 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { HFI_PROP_ROTATION, CAP_FLAG_OUTPUT_PORT}, - {SUPER_FRAME, ENC, H264|HEVC, + {SUPER_FRAME, ENC, H264 | HEVC, 0, 32, 1, 0, V4L2_CID_MPEG_VIDC_SUPERFRAME, 0, CAP_FLAG_DYNAMIC_ALLOWED}, - {SLICE_DECODE, DEC, H264|HEVC|AV1, + {SLICE_DECODE, DEC, H264 | HEVC | AV1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_DISABLE, 0, @@ -752,7 +752,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { /* TODO: Firmware introduced enumeration type for this * with and without seq header. */ - {REQUEST_I_FRAME, ENC, H264|HEVC, + {REQUEST_I_FRAME, ENC, H264 | HEVC, 0, 0, 0, 0, V4L2_CID_MPEG_VIDEO_FORCE_KEY_FRAME, HFI_PROP_REQUEST_SYNC_FRAME, @@ -761,7 +761,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { /* Enc: Keeping CABAC and CAVLC as same bitrate. * Dec: there's no use of Bitrate cap */ - {BIT_RATE, ENC, H264|HEVC, + {BIT_RATE, ENC, H264 | HEVC, 1, MAX_BITRATE, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_BITRATE, HFI_PROP_TOTAL_BITRATE, @@ -798,16 +798,16 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { HFI_PROP_RATE_CONTROL, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - {CABAC_MAX_BITRATE, ENC, H264|HEVC, 0, + {CABAC_MAX_BITRATE, ENC, H264 | HEVC, 0, 160000000, 1, 160000000}, {CAVLC_MAX_BITRATE, ENC, H264, 0, 220000000, 1, 220000000}, - {ALLINTRA_MAX_BITRATE, ENC, H264|HEVC, 0, + {ALLINTRA_MAX_BITRATE, ENC, H264 | HEVC, 0, 245000000, 1, 245000000}, - {LOWLATENCY_MAX_BITRATE, ENC, H264|HEVC, 0, + {LOWLATENCY_MAX_BITRATE, ENC, H264 | HEVC, 0, 70000000, 1, 70000000}, {NUM_COMV, DEC, CODECS_ALL, @@ -817,7 +817,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { 0, 1, 1, 0, V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU}, - {FRAME_SKIP_MODE, ENC, H264|HEVC|HEIC, + {FRAME_SKIP_MODE, ENC, H264 | HEVC | HEIC, V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED, V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT, BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED) | @@ -828,7 +828,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { 0, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - {FRAME_RC_ENABLE, ENC, H264|HEVC|HEIC, + {FRAME_RC_ENABLE, ENC, H264 | HEVC | HEIC, 0, 1, 1, 1, V4L2_CID_MPEG_VIDEO_FRAME_RC_ENABLE}, @@ -860,12 +860,12 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - {GOP_CLOSURE, ENC, H264|HEVC, + {GOP_CLOSURE, ENC, H264 | HEVC, 0, 1, 1, 1, V4L2_CID_MPEG_VIDEO_GOP_CLOSURE, 0}, - {B_FRAME, ENC, H264|HEVC, + {B_FRAME, ENC, H264 | HEVC, 0, 7, 1, 0, V4L2_CID_MPEG_VIDEO_B_FRAMES, HFI_PROP_MAX_B_FRAMES, @@ -877,7 +877,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { HFI_PROP_MAX_B_FRAMES, CAP_FLAG_OUTPUT_PORT}, - {BLUR_TYPES, ENC, H264|HEVC, + {BLUR_TYPES, ENC, H264 | HEVC, MSM_VIDC_BLUR_NONE, MSM_VIDC_BLUR_EXTERNAL, BIT(MSM_VIDC_BLUR_NONE) | BIT(MSM_VIDC_BLUR_EXTERNAL), MSM_VIDC_BLUR_NONE, @@ -885,7 +885,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { HFI_PROP_BLUR_TYPES, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - {BLUR_RESOLUTION, ENC, H264|HEVC, + {BLUR_RESOLUTION, ENC, H264 | HEVC, 0, S32_MAX, 1, 0, V4L2_CID_MPEG_VIDC_VIDEO_BLUR_RESOLUTION, HFI_PROP_BLUR_RESOLUTION, @@ -903,25 +903,25 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { HFI_PROP_CSC_MATRIX, CAP_FLAG_OUTPUT_PORT}, - {LOWLATENCY_MODE, ENC, H264|HEVC, + {LOWLATENCY_MODE, ENC, H264 | HEVC, 0, 1, 1, 0, V4L2_CID_MPEG_VIDC_LOWLATENCY_REQUEST, 0, CAP_FLAG_NONE}, - {LOWLATENCY_MODE, DEC, H264|HEVC|VP9|AV1, + {LOWLATENCY_MODE, DEC, H264 | HEVC | VP9 | AV1, 0, 1, 1, 0, V4L2_CID_MPEG_VIDC_LOWLATENCY_REQUEST, HFI_PROP_SEQ_CHANGE_AT_SYNC_FRAME, CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - {LTR_COUNT, ENC, H264|HEVC, + {LTR_COUNT, ENC, H264 | HEVC, 0, MAX_LTR_FRAME_COUNT_5, 1, 0, V4L2_CID_MPEG_VIDEO_LTR_COUNT, HFI_PROP_LTR_COUNT, CAP_FLAG_OUTPUT_PORT}, - {USE_LTR, ENC, H264|HEVC, + {USE_LTR, ENC, H264 | HEVC, 0, ((1 << MAX_LTR_FRAME_COUNT_5) - 1), 0, 0, @@ -929,7 +929,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { HFI_PROP_LTR_USE, CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - {MARK_LTR, ENC, H264|HEVC, + {MARK_LTR, ENC, H264 | HEVC, INVALID_DEFAULT_MARK_OR_USE_LTR, (MAX_LTR_FRAME_COUNT_5 - 1), 1, INVALID_DEFAULT_MARK_OR_USE_LTR, @@ -943,7 +943,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { HFI_PROP_BASELAYER_PRIORITYID, CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - {IR_TYPE, ENC, H264|HEVC, + {IR_TYPE, ENC, H264 | HEVC, V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_RANDOM, V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_CYCLIC, BIT(V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_RANDOM) | @@ -953,20 +953,20 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { 0, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - {IR_PERIOD, ENC, H264|HEVC, + {IR_PERIOD, ENC, H264 | HEVC, 0, INT_MAX, 1, 0, V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD, 0, CAP_FLAG_INPUT_PORT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - {AU_DELIMITER, ENC, H264|HEVC, + {AU_DELIMITER, ENC, H264 | HEVC, 0, 1, 1, 0, V4L2_CID_MPEG_VIDEO_AU_DELIMITER, HFI_PROP_AUD, CAP_FLAG_OUTPUT_PORT}, - {TIME_DELTA_BASED_RC, ENC, H264|HEVC, + {TIME_DELTA_BASED_RC, ENC, H264 | HEVC, 0, 1, 1, 1, V4L2_CID_MPEG_VIDC_TIME_DELTA_BASED_RC, HFI_PROP_TIME_DELTA_BASED_RATE_CONTROL, @@ -978,13 +978,13 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { HFI_PROP_TIME_DELTA_BASED_RATE_CONTROL, CAP_FLAG_OUTPUT_PORT}, - {CONTENT_ADAPTIVE_CODING, ENC, H264|HEVC, + {CONTENT_ADAPTIVE_CODING, ENC, H264 | HEVC, 0, 1, 1, 1, V4L2_CID_MPEG_VIDC_CONTENT_ADAPTIVE_CODING, HFI_PROP_CONTENT_ADAPTIVE_CODING, CAP_FLAG_OUTPUT_PORT}, - {REQUEST_PREPROCESS, ENC, H264|HEVC, + {REQUEST_PREPROCESS, ENC, H264 | HEVC, MSM_VIDC_PREPROCESS_NONE, MSM_VIDC_PREPROCESS_TYPE0, BIT(MSM_VIDC_PREPROCESS_NONE) | @@ -993,25 +993,25 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { 0, HFI_PROP_REQUEST_PREPROCESS, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - {BITRATE_BOOST, ENC, H264|HEVC, + {BITRATE_BOOST, ENC, H264 | HEVC, 0, MAX_BITRATE_BOOST, 25, MAX_BITRATE_BOOST, V4L2_CID_MPEG_VIDC_QUALITY_BITRATE_BOOST, HFI_PROP_BITRATE_BOOST, CAP_FLAG_OUTPUT_PORT}, - {MIN_QUALITY, ENC, H264|HEVC, + {MIN_QUALITY, ENC, H264 | HEVC, 0, MAX_SUPPORTED_MIN_QUALITY, 70, MAX_SUPPORTED_MIN_QUALITY, 0, HFI_PROP_MAINTAIN_MIN_QUALITY, CAP_FLAG_OUTPUT_PORT}, - {VBV_DELAY, ENC, H264|HEVC, + {VBV_DELAY, ENC, H264 | HEVC, 200, 300, 100, 300, V4L2_CID_MPEG_VIDEO_VBV_DELAY, HFI_PROP_VBV_DELAY, CAP_FLAG_OUTPUT_PORT}, - {PEAK_BITRATE, ENC, H264|HEVC, + {PEAK_BITRATE, ENC, H264 | HEVC, /* default peak bitrate is 10% larger than avg bitrate */ 1, MAX_BITRATE, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_BITRATE_PEAK, @@ -1025,7 +1025,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { HFI_PROP_MIN_QP_PACKED, CAP_FLAG_OUTPUT_PORT}, - {MIN_FRAME_QP, ENC, HEVC|HEIC, + {MIN_FRAME_QP, ENC, HEVC | HEIC, MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP, HFI_PROP_MIN_QP_PACKED, @@ -1035,7 +1035,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, V4L2_CID_MPEG_VIDEO_H264_I_FRAME_MIN_QP}, - {I_FRAME_MIN_QP, ENC, HEVC|HEIC, + {I_FRAME_MIN_QP, ENC, HEVC | HEIC, MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_MIN_QP}, @@ -1043,7 +1043,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, V4L2_CID_MPEG_VIDEO_H264_P_FRAME_MIN_QP}, - {P_FRAME_MIN_QP, ENC, HEVC|HEIC, + {P_FRAME_MIN_QP, ENC, HEVC | HEIC, MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_MIN_QP}, @@ -1051,7 +1051,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, V4L2_CID_MPEG_VIDEO_H264_B_FRAME_MIN_QP}, - {B_FRAME_MIN_QP, ENC, HEVC|HEIC, + {B_FRAME_MIN_QP, ENC, HEVC | HEIC, MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_MIN_QP}, @@ -1061,7 +1061,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { HFI_PROP_MAX_QP_PACKED, CAP_FLAG_OUTPUT_PORT}, - {MAX_FRAME_QP, ENC, HEVC|HEIC, + {MAX_FRAME_QP, ENC, HEVC | HEIC, MIN_QP_10BIT, MAX_QP, 1, MAX_QP, V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP, HFI_PROP_MAX_QP_PACKED, @@ -1071,7 +1071,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { MIN_QP_8BIT, MAX_QP, 1, MAX_QP, V4L2_CID_MPEG_VIDEO_H264_I_FRAME_MAX_QP}, - {I_FRAME_MAX_QP, ENC, HEVC|HEIC, + {I_FRAME_MAX_QP, ENC, HEVC | HEIC, MIN_QP_10BIT, MAX_QP, 1, MAX_QP, V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_MAX_QP}, @@ -1079,7 +1079,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { MIN_QP_8BIT, MAX_QP, 1, MAX_QP, V4L2_CID_MPEG_VIDEO_H264_P_FRAME_MAX_QP}, - {P_FRAME_MAX_QP, ENC, HEVC|HEIC, + {P_FRAME_MAX_QP, ENC, HEVC | HEIC, MIN_QP_10BIT, MAX_QP, 1, MAX_QP, V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_MAX_QP}, @@ -1087,7 +1087,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { MIN_QP_8BIT, MAX_QP, 1, MAX_QP, V4L2_CID_MPEG_VIDEO_H264_B_FRAME_MAX_QP}, - {B_FRAME_MAX_QP, ENC, HEVC|HEIC, + {B_FRAME_MAX_QP, ENC, HEVC | HEIC, MIN_QP_10BIT, MAX_QP, 1, MAX_QP, V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_MAX_QP}, @@ -1278,7 +1278,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { HFI_PROP_CABAC_SESSION, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - {ENTROPY_MODE, DEC, H264|HEVC|VP9|AV1, + {ENTROPY_MODE, DEC, H264 | HEVC | VP9 | AV1, V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC, V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC) | @@ -1287,7 +1287,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { 0, HFI_PROP_CABAC_SESSION}, - {PROFILE, ENC|DEC, H264, + {PROFILE, ENC | DEC, H264, V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE, V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH, BIT(V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE) | @@ -1300,7 +1300,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { HFI_PROP_PROFILE, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - {PROFILE, ENC|DEC, HEVC|HEIC, + {PROFILE, ENC | DEC, HEVC | HEIC, V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN, V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE, BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN) | @@ -1357,7 +1357,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { HFI_PROP_LEVEL, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - {LEVEL, ENC, HEVC|HEIC, + {LEVEL, ENC, HEVC | HEIC, V4L2_MPEG_VIDEO_HEVC_LEVEL_1, V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2, BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_1) | @@ -1406,7 +1406,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { HFI_PROP_LEVEL, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - {LEVEL, DEC, HEVC|HEIC, + {LEVEL, DEC, HEVC | HEIC, V4L2_MPEG_VIDEO_HEVC_LEVEL_1, V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2, BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_1) | @@ -1483,7 +1483,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { HFI_PROP_TIER, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - {HEVC_TIER, ENC|DEC, HEVC, + {HEVC_TIER, ENC | DEC, HEVC, V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, V4L2_MPEG_VIDEO_HEVC_TIER_HIGH, BIT(V4L2_MPEG_VIDEO_HEVC_TIER_MAIN) | @@ -1493,7 +1493,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { HFI_PROP_TIER, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - {HEVC_TIER, ENC|DEC, HEIC, + {HEVC_TIER, ENC | DEC, HEIC, V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, BIT(V4L2_MPEG_VIDEO_HEVC_TIER_MAIN), @@ -1513,7 +1513,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { HFI_PROP_DEBLOCKING_MODE, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - {LF_MODE, ENC, HEVC|HEIC, + {LF_MODE, ENC, HEVC | HEIC, V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_DISABLED, DB_HEVC_DISABLE_SLICE_BOUNDARY, BIT(V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_DISABLED) | @@ -1528,7 +1528,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { -6, 6, 1, 0, V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_ALPHA}, - {LF_ALPHA, ENC, HEVC|HEIC, + {LF_ALPHA, ENC, HEVC | HEIC, -6, 6, 1, 0, V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2}, @@ -1536,11 +1536,11 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { -6, 6, 1, 0, V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_BETA}, - {LF_BETA, ENC, HEVC|HEIC, + {LF_BETA, ENC, HEVC | HEIC, -6, 6, 1, 0, V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2}, - {SLICE_MODE, ENC, H264|HEVC, + {SLICE_MODE, ENC, H264 | HEVC, V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_BYTES, BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE) | @@ -1560,20 +1560,20 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { 0, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - {SLICE_MAX_BYTES, ENC, H264|HEVC, + {SLICE_MAX_BYTES, ENC, H264 | HEVC, MIN_SLICE_BYTE_SIZE, MAX_SLICE_BYTE_SIZE, 1, MIN_SLICE_BYTE_SIZE, V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES, HFI_PROP_MULTI_SLICE_BYTES_COUNT, CAP_FLAG_OUTPUT_PORT}, - {SLICE_MAX_MB, ENC, H264|HEVC, + {SLICE_MAX_MB, ENC, H264 | HEVC, 1, MAX_SLICE_MB_SIZE, 1, 1, V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB, HFI_PROP_MULTI_SLICE_MB_COUNT, CAP_FLAG_OUTPUT_PORT}, - {MB_RC, ENC, H264|HEVC, + {MB_RC, ENC, H264 | HEVC, 0, 1, 1, 1, V4L2_CID_MPEG_VIDEO_MB_RC_ENABLE, 0, @@ -1592,32 +1592,32 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { HFI_PROP_CHROMA_QP_OFFSET, CAP_FLAG_OUTPUT_PORT}, - {DISPLAY_DELAY_ENABLE, DEC, H264|HEVC|VP9|AV1, + {DISPLAY_DELAY_ENABLE, DEC, H264 | HEVC | VP9 | AV1, 0, 1, 1, 0, V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY_ENABLE, HFI_PROP_DECODE_ORDER_OUTPUT, CAP_FLAG_INPUT_PORT}, - {DISPLAY_DELAY, DEC, H264|HEVC|VP9|AV1, + {DISPLAY_DELAY, DEC, H264 | HEVC | VP9 | AV1, 0, 1, 1, 0, V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY, HFI_PROP_DECODE_ORDER_OUTPUT, CAP_FLAG_INPUT_PORT}, - {OUTPUT_ORDER, DEC, H264|HEVC|VP9|AV1, + {OUTPUT_ORDER, DEC, H264 | HEVC | VP9 | AV1, 0, 1, 1, 0, 0, HFI_PROP_DECODE_ORDER_OUTPUT, CAP_FLAG_INPUT_PORT}, - {INPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL, + {INPUT_BUF_HOST_MAX_COUNT, ENC | DEC, CODECS_ALL, DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT, 1, DEFAULT_MAX_HOST_BUF_COUNT, 0, HFI_PROP_BUFFER_HOST_MAX_COUNT, CAP_FLAG_INPUT_PORT}, - {OUTPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL, + {OUTPUT_BUF_HOST_MAX_COUNT, ENC | DEC, CODECS_ALL, DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT, 1, DEFAULT_MAX_HOST_BUF_COUNT, 0, @@ -1671,7 +1671,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { MSM_VIDC_POWER_SAVE_MODE, 1, MSM_VIDC_POWER_SAVE_MODE}, - {CODED_FRAMES, DEC, H264|HEVC|HEIC, + {CODED_FRAMES, DEC, H264 | HEVC | HEIC, CODED_FRAMES_PROGRESSIVE, CODED_FRAMES_INTERLACE, 1, CODED_FRAMES_PROGRESSIVE, V4L2_CID_MPEG_VIDC_INTERLACE, @@ -1682,7 +1682,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { 0, HFI_PROP_LUMA_CHROMA_BIT_DEPTH}, - {CODEC_CONFIG, DEC, H264|HEVC|HEIC|AV1, 0, 1, 1, 0, + {CODEC_CONFIG, DEC, H264 | HEVC | HEIC | AV1, 0, 1, 1, 0, V4L2_CID_MPEG_VIDC_CODEC_CONFIG, 0, CAP_FLAG_DYNAMIC_ALLOWED}, @@ -1775,13 +1775,13 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { HFI_PROP_CROP_OFFSETS, CAP_FLAG_BITMASK | CAP_FLAG_META}, - {ALL_INTRA, ENC, H264|HEVC, + {ALL_INTRA, ENC, H264 | HEVC, 0, 1, 1, 0, 0, 0, CAP_FLAG_OUTPUT_PORT}, - {META_LTR_MARK_USE, ENC, H264|HEVC, + {META_LTR_MARK_USE, ENC, H264 | HEVC, MSM_VIDC_META_DISABLE, MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, 0, MSM_VIDC_META_DISABLE, @@ -1837,7 +1837,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { HFI_PROP_CONEALED_MB_COUNT, CAP_FLAG_BITMASK | CAP_FLAG_META}, - {META_HIST_INFO, DEC, HEVC|AV1|VP9, + {META_HIST_INFO, DEC, HEVC | AV1 | VP9, MSM_VIDC_META_DISABLE, MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, 0, MSM_VIDC_META_DISABLE, @@ -1869,7 +1869,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { HFI_PROP_PICTURE_TYPE, CAP_FLAG_BITMASK | CAP_FLAG_META | CAP_FLAG_DYNAMIC_ALLOWED}, - {META_SEI_MASTERING_DISP, ENC, HEVC|HEIC, + {META_SEI_MASTERING_DISP, ENC, HEVC | HEIC, MSM_VIDC_META_DISABLE, MSM_VIDC_META_ENABLE | MSM_VIDC_META_DYN_ENABLE | MSM_VIDC_META_TX_INPUT, @@ -1878,7 +1878,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { HFI_PROP_SEI_MASTERING_DISPLAY_COLOUR, CAP_FLAG_BITMASK | CAP_FLAG_META}, - {META_SEI_MASTERING_DISP, DEC, HEVC|HEIC|AV1, + {META_SEI_MASTERING_DISP, DEC, HEVC | HEIC | AV1, MSM_VIDC_META_DISABLE, MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_INPUT | MSM_VIDC_META_RX_OUTPUT, @@ -1887,7 +1887,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { HFI_PROP_SEI_MASTERING_DISPLAY_COLOUR, CAP_FLAG_BITMASK | CAP_FLAG_META}, - {META_SEI_CLL, ENC, HEVC|HEIC, + {META_SEI_CLL, ENC, HEVC | HEIC, MSM_VIDC_META_DISABLE, MSM_VIDC_META_ENABLE | MSM_VIDC_META_DYN_ENABLE | MSM_VIDC_META_TX_INPUT, @@ -1896,7 +1896,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { HFI_PROP_SEI_CONTENT_LIGHT_LEVEL, CAP_FLAG_BITMASK | CAP_FLAG_META}, - {META_SEI_CLL, DEC, HEVC|HEIC|AV1, + {META_SEI_CLL, DEC, HEVC | HEIC | AV1, MSM_VIDC_META_DISABLE, MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_INPUT | MSM_VIDC_META_RX_OUTPUT, @@ -1905,7 +1905,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { HFI_PROP_SEI_CONTENT_LIGHT_LEVEL, CAP_FLAG_BITMASK | CAP_FLAG_META}, - {META_HDR10PLUS, ENC, HEVC|HEIC, + {META_HDR10PLUS, ENC, HEVC | HEIC, MSM_VIDC_META_DISABLE, MSM_VIDC_META_ENABLE | MSM_VIDC_META_DYN_ENABLE | MSM_VIDC_META_TX_INPUT, @@ -1914,7 +1914,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { HFI_PROP_SEI_HDR10PLUS_USERDATA, CAP_FLAG_BITMASK | CAP_FLAG_META}, - {META_HDR10PLUS, DEC, HEVC|HEIC|AV1, + {META_HDR10PLUS, DEC, HEVC | HEIC | AV1, MSM_VIDC_META_DISABLE, MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_INPUT | MSM_VIDC_META_RX_OUTPUT, @@ -1931,7 +1931,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { HFI_PROP_DOLBY_RPU_METADATA, CAP_FLAG_BITMASK | CAP_FLAG_META}, - {META_DOLBY_RPU, DEC, H264|HEVC, + {META_DOLBY_RPU, DEC, H264 | HEVC, MSM_VIDC_META_DISABLE, MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, 0, MSM_VIDC_META_DISABLE, @@ -1939,7 +1939,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { HFI_PROP_DOLBY_RPU_METADATA, CAP_FLAG_BITMASK | CAP_FLAG_META}, - {META_EVA_STATS, ENC, H264|HEVC, + {META_EVA_STATS, ENC, H264 | HEVC, MSM_VIDC_META_DISABLE, MSM_VIDC_META_ENABLE | MSM_VIDC_META_DYN_ENABLE | MSM_VIDC_META_TX_INPUT, @@ -2003,7 +2003,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { HFI_PROP_ENC_QP_METADATA, CAP_FLAG_BITMASK | CAP_FLAG_META}, - {META_ROI_INFO, ENC, H264|HEVC, + {META_ROI_INFO, ENC, H264 | HEVC, MSM_VIDC_META_DISABLE, MSM_VIDC_META_ENABLE | MSM_VIDC_META_TX_INPUT, 0, MSM_VIDC_META_DISABLE, @@ -2011,7 +2011,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { HFI_PROP_ROI_INFO, CAP_FLAG_INPUT_PORT | CAP_FLAG_BITMASK | CAP_FLAG_META}, - {META_SALIENCY_INFO, ENC, H264|HEVC, + {META_SALIENCY_INFO, ENC, H264 | HEVC, MSM_VIDC_META_DISABLE, MSM_VIDC_META_ENABLE | MSM_VIDC_META_TX_INPUT, 0, MSM_VIDC_META_DISABLE, @@ -2038,7 +2038,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { HEIC_GRID_WIDTH, HEIC_GRID_WIDTH, V4L2_CID_MPEG_VIDC_GRID_WIDTH}, - {COMPLEXITY, ENC, H264|HEVC, + {COMPLEXITY, ENC, H264 | HEVC, 0, 100, 1, DEFAULT_COMPLEXITY, V4L2_CID_MPEG_VIDC_VENC_COMPLEXITY}, @@ -2080,7 +2080,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine {PIX_FMTS, ENC, HEIC, {PROFILE, CSC}}, - {PIX_FMTS, DEC, HEVC|HEIC, + {PIX_FMTS, DEC, HEVC | HEIC, {PROFILE}}, {FRAME_RATE, ENC, CODECS_ALL, @@ -2101,37 +2101,37 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine NULL, msm_vidc_set_ring_buffer_count_pineapple}, - {SECURE_MODE, ENC|DEC, H264|HEVC|VP9|AV1, + {SECURE_MODE, ENC | DEC, H264 | HEVC | VP9 | AV1, {0}, NULL, msm_vidc_set_u32}, - {META_OUTBUF_FENCE, DEC, H264|HEVC|AV1|VP9, + {META_OUTBUF_FENCE, DEC, H264 | HEVC | AV1 | VP9, {LOWLATENCY_MODE, OUTBUF_FENCE_TYPE, OUTBUF_FENCE_DIRECTION}, NULL, NULL}, - {INBUF_FENCE_TYPE, DEC, H264|HEVC|VP9|AV1, + {INBUF_FENCE_TYPE, DEC, H264 | HEVC | VP9 | AV1, {0}, NULL, NULL}, - {OUTBUF_FENCE_TYPE, DEC, H264|HEVC|VP9|AV1, + {OUTBUF_FENCE_TYPE, DEC, H264 | HEVC | VP9 | AV1, {0}, msm_vidc_adjust_dec_outbuf_fence_type, msm_vidc_set_outbuf_fence_type}, - {INBUF_FENCE_DIRECTION, DEC, H264|HEVC|VP9|AV1, + {INBUF_FENCE_DIRECTION, DEC, H264 | HEVC | VP9 | AV1, {0}, NULL, NULL}, - {OUTBUF_FENCE_DIRECTION, DEC, H264|HEVC|VP9|AV1, + {OUTBUF_FENCE_DIRECTION, DEC, H264 | HEVC | VP9 | AV1, {0}, msm_vidc_adjust_dec_outbuf_fence_direction, msm_vidc_set_outbuf_fence_direction}, - {FENCE_ERROR_DATA_CORRUPT, DEC, H264|HEVC|VP9|AV1, + {FENCE_ERROR_DATA_CORRUPT, DEC, H264 | HEVC | VP9 | AV1, {0}, NULL, msm_vidc_set_u32}, @@ -2151,12 +2151,12 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine NULL, msm_vidc_set_rotation}, - {SUPER_FRAME, ENC, H264|HEVC, + {SUPER_FRAME, ENC, H264 | HEVC, {INPUT_BUF_HOST_MAX_COUNT, OUTPUT_BUF_HOST_MAX_COUNT}, NULL, NULL}, - {SLICE_DECODE, DEC, H264|HEVC|AV1, + {SLICE_DECODE, DEC, H264 | HEVC | AV1, {0}, NULL, NULL}, @@ -2176,7 +2176,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine NULL, msm_vidc_set_u32}, - {REQUEST_I_FRAME, ENC, H264|HEVC, + {REQUEST_I_FRAME, ENC, H264 | HEVC, {0}, NULL, msm_vidc_set_req_sync_frame}, @@ -2214,7 +2214,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine msm_vidc_adjust_bitrate_mode, msm_vidc_set_u32_enum}, - {CONSTANT_QUALITY, ENC, HEVC|HEIC, + {CONSTANT_QUALITY, ENC, HEVC | HEIC, {0}, NULL, msm_vidc_set_constant_quality}, @@ -2229,7 +2229,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine NULL, msm_vidc_set_u32}, - {B_FRAME, ENC, H264|HEVC, + {B_FRAME, ENC, H264 | HEVC, {ALL_INTRA}, msm_vidc_adjust_b_frame, msm_vidc_set_u32}, @@ -2239,12 +2239,12 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine NULL, msm_vidc_set_u32}, - {BLUR_TYPES, ENC, H264|HEVC, + {BLUR_TYPES, ENC, H264 | HEVC, {BLUR_RESOLUTION}, msm_vidc_adjust_blur_type, msm_vidc_set_u32_enum}, - {BLUR_RESOLUTION, ENC, H264|HEVC, + {BLUR_RESOLUTION, ENC, H264 | HEVC, {0}, msm_vidc_adjust_blur_resolution, msm_vidc_set_blur_resolution}, @@ -2264,7 +2264,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine msm_vidc_adjust_enc_lowlatency_mode, NULL}, - {LOWLATENCY_MODE, DEC, H264|HEVC|AV1, + {LOWLATENCY_MODE, DEC, H264 | HEVC | AV1, {STAGE}, msm_vidc_adjust_dec_lowlatency_mode, NULL}, @@ -2274,27 +2274,27 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine msm_vidc_adjust_dec_lowlatency_mode, NULL}, - {LTR_COUNT, ENC, H264|HEVC, + {LTR_COUNT, ENC, H264 | HEVC, {0}, msm_vidc_adjust_ltr_count, msm_vidc_set_u32}, - {USE_LTR, ENC, H264|HEVC, + {USE_LTR, ENC, H264 | HEVC, {0}, msm_vidc_adjust_use_ltr, msm_vidc_set_use_and_mark_ltr}, - {MARK_LTR, ENC, H264|HEVC, + {MARK_LTR, ENC, H264 | HEVC, {0}, msm_vidc_adjust_mark_ltr, msm_vidc_set_use_and_mark_ltr}, - {IR_PERIOD, ENC, H264|HEVC, + {IR_PERIOD, ENC, H264 | HEVC, {0}, msm_vidc_adjust_ir_period, msm_vidc_set_ir_period}, - {AU_DELIMITER, ENC, H264|HEVC, + {AU_DELIMITER, ENC, H264 | HEVC, {0}, NULL, msm_vidc_set_u32}, @@ -2309,17 +2309,17 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine msm_vidc_adjust_delta_based_rc, msm_vidc_set_u32}, - {CONTENT_ADAPTIVE_CODING, ENC, H264|HEVC, + {CONTENT_ADAPTIVE_CODING, ENC, H264 | HEVC, {REQUEST_PREPROCESS}, msm_vidc_adjust_brs, msm_vidc_set_vbr_related_properties}, - {REQUEST_PREPROCESS, ENC, H264|HEVC, + {REQUEST_PREPROCESS, ENC, H264 | HEVC, {0}, msm_vidc_adjust_preprocess, msm_vidc_set_preprocess}, - {BITRATE_BOOST, ENC, H264|HEVC, + {BITRATE_BOOST, ENC, H264 | HEVC, {0}, msm_vidc_adjust_bitrate_boost_iris33, msm_vidc_set_vbr_related_properties}, @@ -2329,12 +2329,12 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine msm_vidc_adjust_min_quality, msm_vidc_set_u32}, - {VBV_DELAY, ENC, H264|HEVC, + {VBV_DELAY, ENC, H264 | HEVC, {0}, NULL, msm_vidc_set_cbr_related_properties}, - {PEAK_BITRATE, ENC, H264|HEVC, + {PEAK_BITRATE, ENC, H264 | HEVC, {0}, msm_vidc_adjust_peak_bitrate, msm_vidc_set_cbr_related_properties}, @@ -2389,13 +2389,13 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine NULL, msm_vidc_set_frame_qp}, - {LAYER_TYPE, ENC, H264|HEVC, + {LAYER_TYPE, ENC, H264 | HEVC, {CONTENT_ADAPTIVE_CODING, LTR_COUNT}}, - {LAYER_ENABLE, ENC, H264|HEVC, + {LAYER_ENABLE, ENC, H264 | HEVC, {CONTENT_ADAPTIVE_CODING}}, - {ENH_LAYER_COUNT, ENC, H264|HEVC, + {ENH_LAYER_COUNT, ENC, H264 | HEVC, {GOP_SIZE, B_FRAME, BIT_RATE, MIN_QUALITY, SLICE_MODE, LTR_COUNT}, msm_vidc_adjust_layer_count, msm_vidc_set_layer_count_and_type}, @@ -2405,32 +2405,32 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine NULL, msm_vidc_set_u32}, - {L0_BR, ENC, H264|HEVC, + {L0_BR, ENC, H264 | HEVC, {L1_BR}, msm_vidc_adjust_layer_bitrate, msm_vidc_set_layer_bitrate}, - {L1_BR, ENC, H264|HEVC, + {L1_BR, ENC, H264 | HEVC, {L2_BR}, msm_vidc_adjust_layer_bitrate, msm_vidc_set_layer_bitrate}, - {L2_BR, ENC, H264|HEVC, + {L2_BR, ENC, H264 | HEVC, {L3_BR}, msm_vidc_adjust_layer_bitrate, msm_vidc_set_layer_bitrate}, - {L3_BR, ENC, H264|HEVC, + {L3_BR, ENC, H264 | HEVC, {L4_BR}, msm_vidc_adjust_layer_bitrate, msm_vidc_set_layer_bitrate}, - {L4_BR, ENC, H264|HEVC, + {L4_BR, ENC, H264 | HEVC, {L5_BR}, msm_vidc_adjust_layer_bitrate, msm_vidc_set_layer_bitrate}, - {L5_BR, ENC, H264|HEVC, + {L5_BR, ENC, H264 | HEVC, {0}, msm_vidc_adjust_layer_bitrate, msm_vidc_set_layer_bitrate}, @@ -2450,17 +2450,17 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine NULL, msm_vidc_set_u32_enum}, - {PROFILE, ENC, HEVC|HEIC, + {PROFILE, ENC, HEVC | HEIC, {META_SEI_MASTERING_DISP, META_SEI_CLL, META_HDR10PLUS}, msm_vidc_adjust_profile, msm_vidc_set_u32_enum}, - {PROFILE, DEC, HEVC|HEIC, + {PROFILE, DEC, HEVC | HEIC, {0}, msm_vidc_adjust_profile, msm_vidc_set_u32_enum}, - {PROFILE, DEC, VP9|AV1, + {PROFILE, DEC, VP9 | AV1, {0}, NULL, msm_vidc_set_u32_enum}, @@ -2480,7 +2480,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine NULL, msm_vidc_set_u32_enum}, - {HEVC_TIER, ENC|DEC, HEVC|HEIC, + {HEVC_TIER, ENC | DEC, HEVC | HEIC, {0}, NULL, msm_vidc_set_u32_enum}, @@ -2490,7 +2490,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine NULL, msm_vidc_set_deblock_mode}, - {SLICE_MODE, ENC, H264|HEVC, + {SLICE_MODE, ENC, H264 | HEVC, {STAGE, DELIVERY_MODE}, msm_vidc_adjust_slice_count, msm_vidc_set_slice_count}, @@ -2510,37 +2510,37 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine msm_vidc_adjust_chroma_qp_index_offset, msm_vidc_set_chroma_qp_index_offset}, - {DISPLAY_DELAY_ENABLE, DEC, H264|HEVC|VP9|AV1, + {DISPLAY_DELAY_ENABLE, DEC, H264 | HEVC | VP9 | AV1, {OUTPUT_ORDER}, NULL, NULL}, - {DISPLAY_DELAY, DEC, H264|HEVC|VP9|AV1, + {DISPLAY_DELAY, DEC, H264 | HEVC | VP9 | AV1, {OUTPUT_ORDER}, NULL, NULL}, - {OUTPUT_ORDER, DEC, H264|HEVC|AV1|VP9, + {OUTPUT_ORDER, DEC, H264 | HEVC | AV1 | VP9, {0}, msm_vidc_adjust_output_order, msm_vidc_set_u32}, - {INPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL, + {INPUT_BUF_HOST_MAX_COUNT, ENC | DEC, CODECS_ALL, {0}, msm_vidc_adjust_input_buf_host_max_count, msm_vidc_set_u32}, - {INPUT_BUF_HOST_MAX_COUNT, ENC, H264|HEVC, + {INPUT_BUF_HOST_MAX_COUNT, ENC, H264 | HEVC, {0}, msm_vidc_adjust_input_buf_host_max_count, msm_vidc_set_u32}, - {OUTPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL, + {OUTPUT_BUF_HOST_MAX_COUNT, ENC | DEC, CODECS_ALL, {0}, msm_vidc_adjust_output_buf_host_max_count, msm_vidc_set_u32}, - {OUTPUT_BUF_HOST_MAX_COUNT, ENC, H264|HEVC, + {OUTPUT_BUF_HOST_MAX_COUNT, ENC, H264 | HEVC, {0}, msm_vidc_adjust_output_buf_host_max_count, msm_vidc_set_u32}, @@ -2560,12 +2560,12 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine NULL, msm_vidc_set_stage}, - {STAGE, ENC, H264|HEVC, + {STAGE, ENC, H264 | HEVC, {0}, NULL, msm_vidc_set_stage}, - {STAGE, DEC, H264|HEVC|VP9|AV1, + {STAGE, DEC, H264 | HEVC | VP9 | AV1, {0}, NULL, msm_vidc_set_stage}, @@ -2575,7 +2575,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine NULL, msm_vidc_set_pipe}, - {THUMBNAIL_MODE, DEC, H264|HEVC|VP9|AV1, + {THUMBNAIL_MODE, DEC, H264 | HEVC | VP9 | AV1, {OUTPUT_ORDER}, NULL, msm_vidc_set_u32}, @@ -2615,7 +2615,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine NULL, msm_vidc_set_u32}, - {ALL_INTRA, ENC, H264|HEVC, + {ALL_INTRA, ENC, H264 | HEVC, {LTR_COUNT, IR_PERIOD, SLICE_MODE, BIT_RATE}, msm_vidc_adjust_all_intra, NULL}, @@ -2625,7 +2625,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine msm_vidc_adjust_eva_stats, NULL}, - {META_ROI_INFO, ENC, H264|HEVC, + {META_ROI_INFO, ENC, H264 | HEVC, {MIN_QUALITY, IR_PERIOD, BLUR_TYPES}, msm_vidc_adjust_roi_info, NULL}, @@ -2635,7 +2635,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine NULL, msm_vidc_set_u32}, - {DELIVERY_MODE, ENC, H264|HEVC, + {DELIVERY_MODE, ENC, H264 | HEVC, {LOWLATENCY_MODE, OUTPUT_BUF_HOST_MAX_COUNT}, msm_vidc_adjust_delivery_mode, msm_vidc_set_u32}, @@ -2650,17 +2650,17 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine NULL, msm_vidc_set_signal_color_info}, - {META_SEI_MASTERING_DISP, ENC, HEVC|HEIC, + {META_SEI_MASTERING_DISP, ENC, HEVC | HEIC, {0}, msm_vidc_adjust_sei_mastering_disp, NULL}, - {META_SEI_CLL, ENC, HEVC|HEIC, + {META_SEI_CLL, ENC, HEVC | HEIC, {0}, msm_vidc_adjust_sei_cll, NULL}, - {META_HDR10PLUS, ENC, HEVC|HEIC, + {META_HDR10PLUS, ENC, HEVC | HEIC, {0}, msm_vidc_adjust_hdr10plus, NULL}, diff --git a/driver/platform/pineapple/src/pineapple.c b/driver/platform/pineapple/src/pineapple.c index d8f024871f..105449d2b1 100644 --- a/driver/platform/pineapple/src/pineapple.c +++ b/driver/platform/pineapple/src/pineapple.c @@ -187,8 +187,8 @@ static struct matrix_coeff_info matrix_coeff_data_pineapple[] = { static struct msm_platform_core_capability core_data_pineapple[] = { /* {type, value} */ - {ENC_CODECS, H264|HEVC}, - {DEC_CODECS, H264|HEVC|VP9}, + {ENC_CODECS, H264 | HEVC}, + {DEC_CODECS, H264 | HEVC | VP9}, {MAX_SESSION_COUNT, 16}, {MAX_NUM_720P_SESSIONS, 16}, {MAX_NUM_1080P_SESSIONS, 16}, @@ -321,26 +321,26 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { {LOSSLESS_FRAME_HEIGHT, ENC, HEVC, 96, 4096, 1, 1080}, - {PIX_FMTS, ENC|DEC, H264, + {PIX_FMTS, ENC | DEC, H264, MSM_VIDC_FMT_NV12, MSM_VIDC_FMT_NV12C, MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C, MSM_VIDC_FMT_NV12C}, - {PIX_FMTS, ENC|DEC, HEVC|VP9, + {PIX_FMTS, ENC | DEC, HEVC | VP9, MSM_VIDC_FMT_NV12, MSM_VIDC_FMT_TP10C, MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C | MSM_VIDC_FMT_TP10C, MSM_VIDC_FMT_NV12C}, - {MIN_BUFFERS_INPUT, ENC|DEC, CODECS_ALL, 0, 64, 1, 4, + {MIN_BUFFERS_INPUT, ENC | DEC, CODECS_ALL, 0, 64, 1, 4, V4L2_CID_MIN_BUFFERS_FOR_OUTPUT, 0, CAP_FLAG_VOLATILE}, - {MIN_BUFFERS_OUTPUT, ENC|DEC, CODECS_ALL, + {MIN_BUFFERS_OUTPUT, ENC | DEC, CODECS_ALL, 0, 64, 1, 4, V4L2_CID_MIN_BUFFERS_FOR_CAPTURE, HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT, @@ -357,14 +357,14 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { {MBPF, DEC, VP9, 36, 36864, 1, 36864}, /* (4096 * 2304) / 256 */ - {LOSSLESS_MBPF, ENC, H264|HEVC, 64, 36864, 1, 36864}, + {LOSSLESS_MBPF, ENC, H264 | HEVC, 64, 36864, 1, 36864}, /* Batch Mode Decode */ /* TODO: update with new values based on updated voltage corner */ - {BATCH_MBPF, DEC, H264|HEVC|VP9, 64, 34816, 1, 34816}, + {BATCH_MBPF, DEC, H264 | HEVC | VP9, 64, 34816, 1, 34816}, /* (4096 * 2304) / 256 */ - {BATCH_FPS, DEC, H264|HEVC|VP9, 1, 120, 1, 120}, + {BATCH_FPS, DEC, H264 | HEVC | VP9, 1, 120, 1, 120}, {FRAME_RATE, ENC, CODECS_ALL, (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), @@ -377,15 +377,15 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), 1, (DEFAULT_FPS << 16)}, - {INPUT_RATE, ENC|DEC, CODECS_ALL, + {INPUT_RATE, ENC | DEC, CODECS_ALL, (MINIMUM_FPS << 16), INT_MAX, 1, (DEFAULT_FPS << 16)}, - {TIMESTAMP_RATE, ENC|DEC, CODECS_ALL, + {TIMESTAMP_RATE, ENC | DEC, CODECS_ALL, (MINIMUM_FPS << 16), INT_MAX, 1, (DEFAULT_FPS << 16)}, - {SCALE_FACTOR, ENC, H264|HEVC, 1, 8, 1, 8}, + {SCALE_FACTOR, ENC, H264 | HEVC, 1, 8, 1, 8}, {MB_CYCLES_VSP, ENC, CODECS_ALL, 25, 25, 1, 25}, @@ -401,7 +401,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { {MB_CYCLES_LP, DEC, CODECS_ALL, 200, 200, 1, 200}, - {MB_CYCLES_FW, ENC|DEC, CODECS_ALL, 489583, 489583, 1, 489583}, + {MB_CYCLES_FW, ENC | DEC, CODECS_ALL, 489583, 489583, 1, 489583}, {MB_CYCLES_FW_VPP, ENC, CODECS_ALL, 48405, 48405, 1, 48405}, @@ -410,7 +410,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { {ENC_RING_BUFFER_COUNT, ENC, CODECS_ALL, 0, MAX_ENC_RING_BUF_COUNT, 1, 0}, - {CLIENT_ID, ENC|DEC, CODECS_ALL, + {CLIENT_ID, ENC | DEC, CODECS_ALL, INVALID_CLIENT_ID, INT_MAX, 1, INVALID_CLIENT_ID, 0}, @@ -434,7 +434,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { HFI_PROP_ROTATION, CAP_FLAG_OUTPUT_PORT}, - {SUPER_FRAME, ENC, H264|HEVC, + {SUPER_FRAME, ENC, H264 | HEVC, 0, 32, 1, 0, 0, 0, CAP_FLAG_NONE}, @@ -477,7 +477,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { /* TODO: Firmware introduced enumeration type for this * with and without seq header. */ - {REQUEST_I_FRAME, ENC, H264|HEVC, + {REQUEST_I_FRAME, ENC, H264 | HEVC, 0, 0, 0, 0, V4L2_CID_MPEG_VIDEO_FORCE_KEY_FRAME, HFI_PROP_REQUEST_SYNC_FRAME, @@ -486,7 +486,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { /* Enc: Keeping CABAC and CAVLC as same bitrate. * Dec: there's no use of Bitrate cap */ - {BIT_RATE, ENC, H264|HEVC, + {BIT_RATE, ENC, H264 | HEVC, 1, MAX_BITRATE, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_BITRATE, HFI_PROP_TOTAL_BITRATE, @@ -514,23 +514,23 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { HFI_PROP_RATE_CONTROL, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - {CABAC_MAX_BITRATE, ENC, H264|HEVC, 0, + {CABAC_MAX_BITRATE, ENC, H264 | HEVC, 0, 160000000, 1, 160000000}, {CAVLC_MAX_BITRATE, ENC, H264, 0, 220000000, 1, 220000000}, - {ALLINTRA_MAX_BITRATE, ENC, H264|HEVC, 0, + {ALLINTRA_MAX_BITRATE, ENC, H264 | HEVC, 0, 245000000, 1, 245000000}, - {LOWLATENCY_MAX_BITRATE, ENC, H264|HEVC, 0, + {LOWLATENCY_MAX_BITRATE, ENC, H264 | HEVC, 0, 70000000, 1, 70000000}, {LOSSLESS, ENC, HEVC, 0, 1, 1, 0, V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU}, - {FRAME_SKIP_MODE, ENC, H264|HEVC, + {FRAME_SKIP_MODE, ENC, H264 | HEVC, V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED, V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT, BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED) | @@ -541,7 +541,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { 0, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - {FRAME_RC_ENABLE, ENC, H264|HEVC, + {FRAME_RC_ENABLE, ENC, H264 | HEVC, 0, 1, 1, 1, V4L2_CID_MPEG_VIDEO_FRAME_RC_ENABLE}, @@ -559,18 +559,18 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - {GOP_CLOSURE, ENC, H264|HEVC, + {GOP_CLOSURE, ENC, H264 | HEVC, 0, 1, 1, 1, V4L2_CID_MPEG_VIDEO_GOP_CLOSURE, 0}, - {B_FRAME, ENC, H264|HEVC, + {B_FRAME, ENC, H264 | HEVC, 0, 7, 1, 0, V4L2_CID_MPEG_VIDEO_B_FRAMES, HFI_PROP_MAX_B_FRAMES, CAP_FLAG_OUTPUT_PORT}, - {BLUR_TYPES, ENC, H264|HEVC, + {BLUR_TYPES, ENC, H264 | HEVC, MSM_VIDC_BLUR_NONE, MSM_VIDC_BLUR_EXTERNAL, BIT(MSM_VIDC_BLUR_NONE) | BIT(MSM_VIDC_BLUR_EXTERNAL), MSM_VIDC_BLUR_NONE, @@ -583,25 +583,25 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { 0, HFI_PROP_CSC}, - {LOWLATENCY_MODE, ENC, H264|HEVC, + {LOWLATENCY_MODE, ENC, H264 | HEVC, 0, 1, 1, 0, 0, 0, CAP_FLAG_NONE}, - {LOWLATENCY_MODE, DEC, H264|HEVC|VP9, + {LOWLATENCY_MODE, DEC, H264 | HEVC | VP9, 0, 1, 1, 0, 0, HFI_PROP_SEQ_CHANGE_AT_SYNC_FRAME, CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - {LTR_COUNT, ENC, H264|HEVC, + {LTR_COUNT, ENC, H264 | HEVC, 0, MAX_LTR_FRAME_COUNT_5, 1, 0, V4L2_CID_MPEG_VIDEO_LTR_COUNT, HFI_PROP_LTR_COUNT, CAP_FLAG_OUTPUT_PORT}, - {USE_LTR, ENC, H264|HEVC, + {USE_LTR, ENC, H264 | HEVC, 0, ((1 << MAX_LTR_FRAME_COUNT_5) - 1), 0, 0, @@ -609,7 +609,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { HFI_PROP_LTR_USE, CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - {MARK_LTR, ENC, H264|HEVC, + {MARK_LTR, ENC, H264 | HEVC, INVALID_DEFAULT_MARK_OR_USE_LTR, (MAX_LTR_FRAME_COUNT_5 - 1), 1, INVALID_DEFAULT_MARK_OR_USE_LTR, @@ -623,19 +623,19 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { HFI_PROP_BASELAYER_PRIORITYID, CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - {AU_DELIMITER, ENC, H264|HEVC, + {AU_DELIMITER, ENC, H264 | HEVC, 0, 1, 1, 0, V4L2_CID_MPEG_VIDEO_AU_DELIMITER, HFI_PROP_AUD, CAP_FLAG_OUTPUT_PORT}, - {CONTENT_ADAPTIVE_CODING, ENC, H264|HEVC, + {CONTENT_ADAPTIVE_CODING, ENC, H264 | HEVC, 0, 1, 1, 1, 0, HFI_PROP_CONTENT_ADAPTIVE_CODING, CAP_FLAG_OUTPUT_PORT}, - {REQUEST_PREPROCESS, ENC, H264|HEVC, + {REQUEST_PREPROCESS, ENC, H264 | HEVC, MSM_VIDC_PREPROCESS_NONE, MSM_VIDC_PREPROCESS_TYPE0, BIT(MSM_VIDC_PREPROCESS_NONE) | @@ -644,19 +644,19 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { 0, HFI_PROP_REQUEST_PREPROCESS, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - {MIN_QUALITY, ENC, H264|HEVC, + {MIN_QUALITY, ENC, H264 | HEVC, 0, MAX_SUPPORTED_MIN_QUALITY, 70, MAX_SUPPORTED_MIN_QUALITY, 0, HFI_PROP_MAINTAIN_MIN_QUALITY, CAP_FLAG_OUTPUT_PORT}, - {VBV_DELAY, ENC, H264|HEVC, + {VBV_DELAY, ENC, H264 | HEVC, 200, 300, 100, 300, V4L2_CID_MPEG_VIDEO_VBV_DELAY, HFI_PROP_VBV_DELAY, CAP_FLAG_OUTPUT_PORT}, - {PEAK_BITRATE, ENC, H264|HEVC, + {PEAK_BITRATE, ENC, H264 | HEVC, /* default peak bitrate is 10% larger than avg bitrate */ 1, MAX_BITRATE, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_BITRATE_PEAK, @@ -917,7 +917,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { HFI_PROP_CABAC_SESSION, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - {ENTROPY_MODE, DEC, H264|HEVC|VP9, + {ENTROPY_MODE, DEC, H264 | HEVC | VP9, V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC, V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC) | @@ -926,7 +926,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { 0, HFI_PROP_CABAC_SESSION}, - {PROFILE, ENC|DEC, H264, + {PROFILE, ENC | DEC, H264, V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE, V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH, BIT(V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE) | @@ -939,7 +939,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { HFI_PROP_PROFILE, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - {PROFILE, ENC|DEC, HEVC, + {PROFILE, ENC | DEC, HEVC, V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN, V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE, BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN) | @@ -1075,7 +1075,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { HFI_PROP_LEVEL, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - {HEVC_TIER, ENC|DEC, HEVC, + {HEVC_TIER, ENC | DEC, HEVC, V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, V4L2_MPEG_VIDEO_HEVC_TIER_HIGH, BIT(V4L2_MPEG_VIDEO_HEVC_TIER_MAIN) | @@ -1123,7 +1123,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { -6, 6, 1, 0, V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2}, - {SLICE_MODE, ENC, H264|HEVC, + {SLICE_MODE, ENC, H264 | HEVC, V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_BYTES, BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE) | @@ -1134,20 +1134,20 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { 0, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - {SLICE_MAX_BYTES, ENC, H264|HEVC, + {SLICE_MAX_BYTES, ENC, H264 | HEVC, MIN_SLICE_BYTE_SIZE, MAX_SLICE_BYTE_SIZE, 1, MIN_SLICE_BYTE_SIZE, V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES, HFI_PROP_MULTI_SLICE_BYTES_COUNT, CAP_FLAG_OUTPUT_PORT}, - {SLICE_MAX_MB, ENC, H264|HEVC, + {SLICE_MAX_MB, ENC, H264 | HEVC, 1, MAX_SLICE_MB_SIZE, 1, 1, V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB, HFI_PROP_MULTI_SLICE_MB_COUNT, CAP_FLAG_OUTPUT_PORT}, - {MB_RC, ENC, H264|HEVC, + {MB_RC, ENC, H264 | HEVC, 0, 1, 1, 1, V4L2_CID_MPEG_VIDEO_MB_RC_ENABLE, 0, @@ -1166,32 +1166,32 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { HFI_PROP_CHROMA_QP_OFFSET, CAP_FLAG_OUTPUT_PORT}, - {DISPLAY_DELAY_ENABLE, DEC, H264|HEVC|VP9, + {DISPLAY_DELAY_ENABLE, DEC, H264 | HEVC | VP9, 0, 1, 1, 0, V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY_ENABLE, HFI_PROP_DECODE_ORDER_OUTPUT, CAP_FLAG_INPUT_PORT}, - {DISPLAY_DELAY, DEC, H264|HEVC|VP9, + {DISPLAY_DELAY, DEC, H264 | HEVC | VP9, 0, 1, 1, 0, V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY, HFI_PROP_DECODE_ORDER_OUTPUT, CAP_FLAG_INPUT_PORT}, - {OUTPUT_ORDER, DEC, H264|HEVC|VP9, + {OUTPUT_ORDER, DEC, H264 | HEVC | VP9, 0, 1, 1, 0, 0, HFI_PROP_DECODE_ORDER_OUTPUT, CAP_FLAG_INPUT_PORT}, - {INPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL, + {INPUT_BUF_HOST_MAX_COUNT, ENC | DEC, CODECS_ALL, DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT, 1, DEFAULT_MAX_HOST_BUF_COUNT, 0, HFI_PROP_BUFFER_HOST_MAX_COUNT, CAP_FLAG_INPUT_PORT}, - {OUTPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL, + {OUTPUT_BUF_HOST_MAX_COUNT, ENC | DEC, CODECS_ALL, DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT, 1, DEFAULT_MAX_HOST_BUF_COUNT, 0, @@ -1210,14 +1210,14 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { HFI_PROP_CONCEAL_COLOR_10BIT, CAP_FLAG_INPUT_PORT}, - {STAGE, DEC|ENC, CODECS_ALL, + {STAGE, DEC | ENC, CODECS_ALL, MSM_VIDC_STAGE_1, MSM_VIDC_STAGE_2, 1, MSM_VIDC_STAGE_2, 0, HFI_PROP_STAGE}, - {PIPE, DEC|ENC, CODECS_ALL, + {PIPE, DEC | ENC, CODECS_ALL, MSM_VIDC_PIPE_1, MSM_VIDC_PIPE_4, 1, MSM_VIDC_PIPE_4, @@ -1233,7 +1233,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { MSM_VIDC_POWER_SAVE_MODE, 1, MSM_VIDC_POWER_SAVE_MODE}, - {CODED_FRAMES, DEC, H264|HEVC, + {CODED_FRAMES, DEC, H264 | HEVC, CODED_FRAMES_PROGRESSIVE, CODED_FRAMES_INTERLACE, 1, CODED_FRAMES_PROGRESSIVE, 0, @@ -1243,7 +1243,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { 0, HFI_PROP_LUMA_CHROMA_BIT_DEPTH}, - {CODEC_CONFIG, DEC, H264|HEVC, 0, 1, 1, 0, + {CODEC_CONFIG, DEC, H264 | HEVC, 0, 1, 1, 0, 0, 0, CAP_FLAG_DYNAMIC_ALLOWED}, @@ -1276,13 +1276,13 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { {FIRMWARE_PRIORITY_OFFSET, DEC | ENC, CODECS_ALL, 1, 1, 1, 1}, - {ALL_INTRA, ENC, H264|HEVC, + {ALL_INTRA, ENC, H264 | HEVC, 0, 1, 1, 0, 0, 0, CAP_FLAG_OUTPUT_PORT}, - {COMPLEXITY, ENC, H264|HEVC, + {COMPLEXITY, ENC, H264 | HEVC, 0, 100, 1, DEFAULT_COMPLEXITY, 0}, @@ -1327,7 +1327,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine NULL, msm_vidc_set_rotation}, - {SUPER_FRAME, ENC, H264|HEVC, + {SUPER_FRAME, ENC, H264 | HEVC, {INPUT_BUF_HOST_MAX_COUNT, OUTPUT_BUF_HOST_MAX_COUNT}, NULL, NULL}, @@ -1342,7 +1342,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine NULL, msm_vidc_set_nal_length}, - {REQUEST_I_FRAME, ENC, H264|HEVC, + {REQUEST_I_FRAME, ENC, H264 | HEVC, {0}, NULL, msm_vidc_set_req_sync_frame}, @@ -1385,12 +1385,12 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine msm_vidc_adjust_gop_size, msm_vidc_set_gop_size}, - {B_FRAME, ENC, H264|HEVC, + {B_FRAME, ENC, H264 | HEVC, {ALL_INTRA}, msm_vidc_adjust_b_frame, msm_vidc_set_u32}, - {BLUR_TYPES, ENC, H264|HEVC, + {BLUR_TYPES, ENC, H264 | HEVC, {0}, msm_vidc_adjust_blur_type, msm_vidc_set_u32_enum}, @@ -1400,37 +1400,37 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine msm_vidc_adjust_enc_lowlatency_mode, NULL}, - {LOWLATENCY_MODE, DEC, H264|HEVC|VP9, + {LOWLATENCY_MODE, DEC, H264 | HEVC | VP9, {STAGE}, msm_vidc_adjust_dec_lowlatency_mode, NULL}, - {LTR_COUNT, ENC, H264|HEVC, + {LTR_COUNT, ENC, H264 | HEVC, {0}, msm_vidc_adjust_ltr_count, msm_vidc_set_u32}, - {USE_LTR, ENC, H264|HEVC, + {USE_LTR, ENC, H264 | HEVC, {0}, msm_vidc_adjust_use_ltr, msm_vidc_set_use_and_mark_ltr}, - {MARK_LTR, ENC, H264|HEVC, + {MARK_LTR, ENC, H264 | HEVC, {0}, msm_vidc_adjust_mark_ltr, msm_vidc_set_use_and_mark_ltr}, - {AU_DELIMITER, ENC, H264|HEVC, + {AU_DELIMITER, ENC, H264 | HEVC, {0}, NULL, msm_vidc_set_u32}, - {CONTENT_ADAPTIVE_CODING, ENC, H264|HEVC, + {CONTENT_ADAPTIVE_CODING, ENC, H264 | HEVC, {REQUEST_PREPROCESS}, msm_vidc_adjust_brs, msm_vidc_set_vbr_related_properties}, - {REQUEST_PREPROCESS, ENC, H264|HEVC, + {REQUEST_PREPROCESS, ENC, H264 | HEVC, {0}, msm_vidc_adjust_preprocess, msm_vidc_set_preprocess}, @@ -1445,12 +1445,12 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine msm_vidc_adjust_min_quality, msm_vidc_set_u32}, - {VBV_DELAY, ENC, H264|HEVC, + {VBV_DELAY, ENC, H264 | HEVC, {0}, NULL, msm_vidc_set_cbr_related_properties}, - {PEAK_BITRATE, ENC, H264|HEVC, + {PEAK_BITRATE, ENC, H264 | HEVC, {0}, msm_vidc_adjust_peak_bitrate, msm_vidc_set_cbr_related_properties}, @@ -1505,43 +1505,43 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine NULL, msm_vidc_set_frame_qp}, - {LAYER_TYPE, ENC, H264|HEVC, + {LAYER_TYPE, ENC, H264 | HEVC, {CONTENT_ADAPTIVE_CODING, LTR_COUNT}}, - {LAYER_ENABLE, ENC, H264|HEVC, + {LAYER_ENABLE, ENC, H264 | HEVC, {CONTENT_ADAPTIVE_CODING}}, - {ENH_LAYER_COUNT, ENC, H264|HEVC, + {ENH_LAYER_COUNT, ENC, H264 | HEVC, {GOP_SIZE, B_FRAME, BIT_RATE, MIN_QUALITY, LTR_COUNT}, msm_vidc_adjust_layer_count, msm_vidc_set_layer_count_and_type}, - {L0_BR, ENC, H264|HEVC, + {L0_BR, ENC, H264 | HEVC, {L1_BR}, msm_vidc_adjust_layer_bitrate, msm_vidc_set_layer_bitrate}, - {L1_BR, ENC, H264|HEVC, + {L1_BR, ENC, H264 | HEVC, {L2_BR}, msm_vidc_adjust_layer_bitrate, msm_vidc_set_layer_bitrate}, - {L2_BR, ENC, H264|HEVC, + {L2_BR, ENC, H264 | HEVC, {L3_BR}, msm_vidc_adjust_layer_bitrate, msm_vidc_set_layer_bitrate}, - {L3_BR, ENC, H264|HEVC, + {L3_BR, ENC, H264 | HEVC, {L4_BR}, msm_vidc_adjust_layer_bitrate, msm_vidc_set_layer_bitrate}, - {L4_BR, ENC, H264|HEVC, + {L4_BR, ENC, H264 | HEVC, {L5_BR}, msm_vidc_adjust_layer_bitrate, msm_vidc_set_layer_bitrate}, - {L5_BR, ENC, H264|HEVC, + {L5_BR, ENC, H264 | HEVC, {0}, msm_vidc_adjust_layer_bitrate, msm_vidc_set_layer_bitrate}, @@ -1561,7 +1561,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine NULL, msm_vidc_set_u32_enum}, - {PROFILE, ENC|DEC, HEVC, + {PROFILE, ENC | DEC, HEVC, {0}, msm_vidc_adjust_profile, msm_vidc_set_u32_enum}, @@ -1581,7 +1581,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine NULL, msm_vidc_set_level}, - {HEVC_TIER, ENC|DEC, HEVC, + {HEVC_TIER, ENC | DEC, HEVC, {0}, NULL, msm_vidc_set_u32_enum}, @@ -1591,7 +1591,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine NULL, msm_vidc_set_deblock_mode}, - {SLICE_MODE, ENC, H264|HEVC, + {SLICE_MODE, ENC, H264 | HEVC, {STAGE, DELIVERY_MODE}, msm_vidc_adjust_slice_count, msm_vidc_set_slice_count}, @@ -1606,37 +1606,37 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine msm_vidc_adjust_chroma_qp_index_offset, msm_vidc_set_chroma_qp_index_offset}, - {DISPLAY_DELAY_ENABLE, DEC, H264|HEVC|VP9, + {DISPLAY_DELAY_ENABLE, DEC, H264 | HEVC | VP9, {OUTPUT_ORDER}, NULL, NULL}, - {DISPLAY_DELAY, DEC, H264|HEVC|VP9, + {DISPLAY_DELAY, DEC, H264 | HEVC | VP9, {OUTPUT_ORDER}, NULL, NULL}, - {OUTPUT_ORDER, DEC, H264|HEVC|VP9, + {OUTPUT_ORDER, DEC, H264 | HEVC | VP9, {0}, msm_vidc_adjust_output_order, msm_vidc_set_u32}, - {INPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL, + {INPUT_BUF_HOST_MAX_COUNT, ENC | DEC, CODECS_ALL, {0}, msm_vidc_adjust_input_buf_host_max_count, msm_vidc_set_u32}, - {INPUT_BUF_HOST_MAX_COUNT, ENC, H264|HEVC, + {INPUT_BUF_HOST_MAX_COUNT, ENC, H264 | HEVC, {0}, msm_vidc_adjust_input_buf_host_max_count, msm_vidc_set_u32}, - {OUTPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL, + {OUTPUT_BUF_HOST_MAX_COUNT, ENC | DEC, CODECS_ALL, {0}, msm_vidc_adjust_output_buf_host_max_count, msm_vidc_set_u32}, - {OUTPUT_BUF_HOST_MAX_COUNT, ENC, H264|HEVC, + {OUTPUT_BUF_HOST_MAX_COUNT, ENC, H264 | HEVC, {0}, msm_vidc_adjust_output_buf_host_max_count, msm_vidc_set_u32}, @@ -1656,17 +1656,17 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine NULL, msm_vidc_set_stage}, - {STAGE, ENC, H264|HEVC, + {STAGE, ENC, H264 | HEVC, {0}, NULL, msm_vidc_set_stage}, - {STAGE, DEC, H264|HEVC|VP9, + {STAGE, DEC, H264 | HEVC | VP9, {0}, NULL, msm_vidc_set_stage}, - {PIPE, DEC|ENC, CODECS_ALL, + {PIPE, DEC | ENC, CODECS_ALL, {0}, NULL, msm_vidc_set_pipe}, @@ -1686,7 +1686,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine NULL, NULL}, - {ALL_INTRA, ENC, H264|HEVC, + {ALL_INTRA, ENC, H264 | HEVC, {LTR_COUNT, SLICE_MODE, BIT_RATE}, msm_vidc_adjust_all_intra, NULL}, diff --git a/driver/platform/waipio/src/waipio.c b/driver/platform/waipio/src/waipio.c index 62d53f8558..d1a8b35bb8 100644 --- a/driver/platform/waipio/src/waipio.c +++ b/driver/platform/waipio/src/waipio.c @@ -189,8 +189,8 @@ static struct matrix_coeff_info matrix_coeff_data_waipio[] = { static struct msm_platform_core_capability core_data_waipio[] = { /* {type, value} */ - {ENC_CODECS, H264|HEVC}, - {DEC_CODECS, H264|HEVC|VP9}, + {ENC_CODECS, H264 | HEVC}, + {DEC_CODECS, H264 | HEVC | VP9}, {MAX_SESSION_COUNT, 16}, {MAX_NUM_720P_SESSIONS, 16}, {MAX_NUM_1080P_SESSIONS, 16}, @@ -258,26 +258,26 @@ static struct msm_platform_inst_capability instance_cap_data_waipio[] = { {LOSSLESS_FRAME_HEIGHT, ENC, HEVC, 96, 4096, 1, 1080}, - {PIX_FMTS, ENC|DEC, H264, + {PIX_FMTS, ENC | DEC, H264, MSM_VIDC_FMT_NV12, MSM_VIDC_FMT_NV12C, MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C, MSM_VIDC_FMT_NV12C}, - {PIX_FMTS, ENC|DEC, HEVC|VP9, + {PIX_FMTS, ENC | DEC, HEVC | VP9, MSM_VIDC_FMT_NV12, MSM_VIDC_FMT_TP10C, MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C | MSM_VIDC_FMT_TP10C, MSM_VIDC_FMT_NV12C}, - {MIN_BUFFERS_INPUT, ENC|DEC, CODECS_ALL, 0, 64, 1, 4, + {MIN_BUFFERS_INPUT, ENC | DEC, CODECS_ALL, 0, 64, 1, 4, V4L2_CID_MIN_BUFFERS_FOR_OUTPUT, 0, CAP_FLAG_VOLATILE}, - {MIN_BUFFERS_OUTPUT, ENC|DEC, CODECS_ALL, + {MIN_BUFFERS_OUTPUT, ENC | DEC, CODECS_ALL, 0, 64, 1, 4, V4L2_CID_MIN_BUFFERS_FOR_CAPTURE, HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT, @@ -294,35 +294,35 @@ static struct msm_platform_inst_capability instance_cap_data_waipio[] = { {MBPF, DEC, VP9, 36, 36864, 1, 36864}, /* (4096 * 2304) / 256 */ - {LOSSLESS_MBPF, ENC, H264|HEVC, 64, 36864, 1, 36864}, + {LOSSLESS_MBPF, ENC, H264 | HEVC, 64, 36864, 1, 36864}, /* Batch Mode Decode */ /* TODO: update with new values based on updated voltage corner */ - {BATCH_MBPF, DEC, H264|HEVC|VP9, 64, 34816, 1, 34816}, + {BATCH_MBPF, DEC, H264 | HEVC | VP9, 64, 34816, 1, 34816}, /* (4096 * 2304) / 256 */ - {BATCH_FPS, DEC, H264|HEVC|VP9, 1, 120, 1, 120}, + {BATCH_FPS, DEC, H264 | HEVC | VP9, 1, 120, 1, 120}, - {FRAME_RATE, ENC|DEC, CODECS_ALL, + {FRAME_RATE, ENC | DEC, CODECS_ALL, (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), 1, (DEFAULT_FPS << 16), 0, HFI_PROP_FRAME_RATE, CAP_FLAG_OUTPUT_PORT}, - {OPERATING_RATE, ENC|DEC, CODECS_ALL, + {OPERATING_RATE, ENC | DEC, CODECS_ALL, (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), 1, (DEFAULT_FPS << 16)}, - {INPUT_RATE, ENC|DEC, CODECS_ALL, + {INPUT_RATE, ENC | DEC, CODECS_ALL, (MINIMUM_FPS << 16), INT_MAX, 1, (DEFAULT_FPS << 16)}, - {TIMESTAMP_RATE, ENC|DEC, CODECS_ALL, + {TIMESTAMP_RATE, ENC | DEC, CODECS_ALL, (MINIMUM_FPS << 16), INT_MAX, 1, (DEFAULT_FPS << 16)}, - {SCALE_FACTOR, ENC, H264|HEVC, 1, 8, 1, 8}, + {SCALE_FACTOR, ENC, H264 | HEVC, 1, 8, 1, 8}, {MB_CYCLES_VSP, ENC, CODECS_ALL, 25, 25, 1, 25}, @@ -338,13 +338,13 @@ static struct msm_platform_inst_capability instance_cap_data_waipio[] = { {MB_CYCLES_LP, DEC, CODECS_ALL, 200, 200, 1, 200}, - {MB_CYCLES_FW, ENC|DEC, CODECS_ALL, 326389, 326389, 1, 326389}, + {MB_CYCLES_FW, ENC | DEC, CODECS_ALL, 326389, 326389, 1, 326389}, - {MB_CYCLES_FW_VPP, ENC|DEC, CODECS_ALL, 44156, 44156, 1, 44156}, + {MB_CYCLES_FW_VPP, ENC | DEC, CODECS_ALL, 44156, 44156, 1, 44156}, {MB_CYCLES_FW_VPP, DEC, CODECS_ALL, 66234, 66234, 1, 66234}, - {CLIENT_ID, ENC|DEC, CODECS_ALL, + {CLIENT_ID, ENC | DEC, CODECS_ALL, INVALID_CLIENT_ID, INT_MAX, 1, INVALID_CLIENT_ID, 0}, @@ -368,7 +368,7 @@ static struct msm_platform_inst_capability instance_cap_data_waipio[] = { HFI_PROP_ROTATION, CAP_FLAG_OUTPUT_PORT}, - {SUPER_FRAME, ENC, H264|HEVC, + {SUPER_FRAME, ENC, H264 | HEVC, 0, 32, 1, 0, 0, 0, CAP_FLAG_NONE}, @@ -406,7 +406,7 @@ static struct msm_platform_inst_capability instance_cap_data_waipio[] = { /* TODO: Firmware introduced enumeration type for this * with and without seq header. */ - {REQUEST_I_FRAME, ENC, H264|HEVC, + {REQUEST_I_FRAME, ENC, H264 | HEVC, 0, 0, 0, 0, V4L2_CID_MPEG_VIDEO_FORCE_KEY_FRAME, HFI_PROP_REQUEST_SYNC_FRAME, @@ -415,7 +415,7 @@ static struct msm_platform_inst_capability instance_cap_data_waipio[] = { /* Enc: Keeping CABAC and CAVLC as same bitrate. * Dec: there's no use of Bitrate cap */ - {BIT_RATE, ENC, H264|HEVC, + {BIT_RATE, ENC, H264 | HEVC, 1, MAX_BITRATE, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_BITRATE, HFI_PROP_TOTAL_BITRATE, @@ -443,16 +443,16 @@ static struct msm_platform_inst_capability instance_cap_data_waipio[] = { HFI_PROP_RATE_CONTROL, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - {CABAC_MAX_BITRATE, ENC, H264|HEVC, 0, + {CABAC_MAX_BITRATE, ENC, H264 | HEVC, 0, 160000000, 1, 160000000}, {CAVLC_MAX_BITRATE, ENC, H264, 0, 220000000, 1, 220000000}, - {ALLINTRA_MAX_BITRATE, ENC, H264|HEVC, 0, + {ALLINTRA_MAX_BITRATE, ENC, H264 | HEVC, 0, 245000000, 1, 245000000}, - {LOWLATENCY_MAX_BITRATE, ENC, H264|HEVC, 0, + {LOWLATENCY_MAX_BITRATE, ENC, H264 | HEVC, 0, 70000000, 1, 70000000}, {NUM_COMV, DEC, CODECS_ALL, @@ -462,7 +462,7 @@ static struct msm_platform_inst_capability instance_cap_data_waipio[] = { 0, 1, 1, 0, V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU}, - {FRAME_SKIP_MODE, ENC, H264|HEVC, + {FRAME_SKIP_MODE, ENC, H264 | HEVC, V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED, V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT, BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED) | @@ -473,7 +473,7 @@ static struct msm_platform_inst_capability instance_cap_data_waipio[] = { 0, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - {FRAME_RC_ENABLE, ENC, H264|HEVC, + {FRAME_RC_ENABLE, ENC, H264 | HEVC, 0, 1, 1, 1, V4L2_CID_MPEG_VIDEO_FRAME_RC_ENABLE}, @@ -491,18 +491,18 @@ static struct msm_platform_inst_capability instance_cap_data_waipio[] = { CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - {GOP_CLOSURE, ENC, H264|HEVC, + {GOP_CLOSURE, ENC, H264 | HEVC, 0, 1, 1, 1, V4L2_CID_MPEG_VIDEO_GOP_CLOSURE, 0}, - {B_FRAME, ENC, H264|HEVC, + {B_FRAME, ENC, H264 | HEVC, 0, 7, 1, 0, V4L2_CID_MPEG_VIDEO_B_FRAMES, HFI_PROP_MAX_B_FRAMES, CAP_FLAG_OUTPUT_PORT}, - {BLUR_TYPES, ENC, H264|HEVC, + {BLUR_TYPES, ENC, H264 | HEVC, MSM_VIDC_BLUR_NONE, MSM_VIDC_BLUR_EXTERNAL, BIT(MSM_VIDC_BLUR_NONE) | BIT(MSM_VIDC_BLUR_EXTERNAL), MSM_VIDC_BLUR_NONE, @@ -515,25 +515,25 @@ static struct msm_platform_inst_capability instance_cap_data_waipio[] = { 0, HFI_PROP_CSC}, - {LOWLATENCY_MODE, ENC, H264|HEVC, + {LOWLATENCY_MODE, ENC, H264 | HEVC, 0, 1, 1, 0, 0, 0, CAP_FLAG_NONE}, - {LOWLATENCY_MODE, DEC, H264|HEVC|VP9, + {LOWLATENCY_MODE, DEC, H264 | HEVC | VP9, 0, 1, 1, 0, 0, HFI_PROP_SEQ_CHANGE_AT_SYNC_FRAME, CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - {LTR_COUNT, ENC, H264|HEVC, + {LTR_COUNT, ENC, H264 | HEVC, 0, 2, 1, 0, V4L2_CID_MPEG_VIDEO_LTR_COUNT, HFI_PROP_LTR_COUNT, CAP_FLAG_OUTPUT_PORT}, - {USE_LTR, ENC, H264|HEVC, + {USE_LTR, ENC, H264 | HEVC, 0, ((1 << MAX_LTR_FRAME_COUNT) - 1), 0, 0, @@ -541,7 +541,7 @@ static struct msm_platform_inst_capability instance_cap_data_waipio[] = { HFI_PROP_LTR_USE, CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - {MARK_LTR, ENC, H264|HEVC, + {MARK_LTR, ENC, H264 | HEVC, INVALID_DEFAULT_MARK_OR_USE_LTR, (MAX_LTR_FRAME_COUNT - 1), 1, INVALID_DEFAULT_MARK_OR_USE_LTR, @@ -555,19 +555,19 @@ static struct msm_platform_inst_capability instance_cap_data_waipio[] = { HFI_PROP_BASELAYER_PRIORITYID, CAP_FLAG_OUTPUT_PORT}, - {AU_DELIMITER, ENC, H264|HEVC, + {AU_DELIMITER, ENC, H264 | HEVC, 0, 1, 1, 0, V4L2_CID_MPEG_VIDEO_AU_DELIMITER, HFI_PROP_AUD, CAP_FLAG_OUTPUT_PORT}, - {CONTENT_ADAPTIVE_CODING, ENC, H264|HEVC, + {CONTENT_ADAPTIVE_CODING, ENC, H264 | HEVC, 0, 1, 1, 1, 0, HFI_PROP_CONTENT_ADAPTIVE_CODING, CAP_FLAG_OUTPUT_PORT}, - {REQUEST_PREPROCESS, ENC, H264|HEVC, + {REQUEST_PREPROCESS, ENC, H264 | HEVC, MSM_VIDC_PREPROCESS_NONE, MSM_VIDC_PREPROCESS_TYPE0, BIT(MSM_VIDC_PREPROCESS_NONE) | @@ -576,19 +576,19 @@ static struct msm_platform_inst_capability instance_cap_data_waipio[] = { 0, HFI_PROP_REQUEST_PREPROCESS, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - {MIN_QUALITY, ENC, H264|HEVC, + {MIN_QUALITY, ENC, H264 | HEVC, 0, MAX_SUPPORTED_MIN_QUALITY, 70, MAX_SUPPORTED_MIN_QUALITY, 0, HFI_PROP_MAINTAIN_MIN_QUALITY, CAP_FLAG_OUTPUT_PORT}, - {VBV_DELAY, ENC, H264|HEVC, + {VBV_DELAY, ENC, H264 | HEVC, 200, 300, 100, 300, V4L2_CID_MPEG_VIDEO_VBV_DELAY, HFI_PROP_VBV_DELAY, CAP_FLAG_OUTPUT_PORT}, - {PEAK_BITRATE, ENC, H264|HEVC, + {PEAK_BITRATE, ENC, H264 | HEVC, /* default peak bitrate is 10% larger than avg bitrate */ 1, MAX_BITRATE, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_BITRATE_PEAK, @@ -849,7 +849,7 @@ static struct msm_platform_inst_capability instance_cap_data_waipio[] = { HFI_PROP_CABAC_SESSION, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - {ENTROPY_MODE, DEC, H264|HEVC|VP9, + {ENTROPY_MODE, DEC, H264 | HEVC | VP9, V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC, V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC) | @@ -858,7 +858,7 @@ static struct msm_platform_inst_capability instance_cap_data_waipio[] = { 0, HFI_PROP_CABAC_SESSION}, - {PROFILE, ENC|DEC, H264, + {PROFILE, ENC | DEC, H264, V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE, V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH, BIT(V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE) | @@ -871,7 +871,7 @@ static struct msm_platform_inst_capability instance_cap_data_waipio[] = { HFI_PROP_PROFILE, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - {PROFILE, ENC|DEC, HEVC, + {PROFILE, ENC | DEC, HEVC, V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN, V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE, BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN) | @@ -1009,7 +1009,7 @@ static struct msm_platform_inst_capability instance_cap_data_waipio[] = { HFI_PROP_LEVEL, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - {HEVC_TIER, ENC|DEC, HEVC, + {HEVC_TIER, ENC | DEC, HEVC, V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, V4L2_MPEG_VIDEO_HEVC_TIER_HIGH, BIT(V4L2_MPEG_VIDEO_HEVC_TIER_MAIN) | @@ -1057,7 +1057,7 @@ static struct msm_platform_inst_capability instance_cap_data_waipio[] = { -6, 6, 1, 0, V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2}, - {SLICE_MODE, ENC, H264|HEVC, + {SLICE_MODE, ENC, H264 | HEVC, V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_BYTES, BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE) | @@ -1068,20 +1068,20 @@ static struct msm_platform_inst_capability instance_cap_data_waipio[] = { 0, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - {SLICE_MAX_BYTES, ENC, H264|HEVC, + {SLICE_MAX_BYTES, ENC, H264 | HEVC, MIN_SLICE_BYTE_SIZE, MAX_SLICE_BYTE_SIZE, 1, MIN_SLICE_BYTE_SIZE, V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES, HFI_PROP_MULTI_SLICE_BYTES_COUNT, CAP_FLAG_OUTPUT_PORT}, - {SLICE_MAX_MB, ENC, H264|HEVC, + {SLICE_MAX_MB, ENC, H264 | HEVC, 1, MAX_SLICE_MB_SIZE, 1, 1, V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB, HFI_PROP_MULTI_SLICE_MB_COUNT, CAP_FLAG_OUTPUT_PORT}, - {MB_RC, ENC, H264|HEVC, + {MB_RC, ENC, H264 | HEVC, 0, 1, 1, 1, V4L2_CID_MPEG_VIDEO_MB_RC_ENABLE, 0, @@ -1100,32 +1100,32 @@ static struct msm_platform_inst_capability instance_cap_data_waipio[] = { HFI_PROP_CHROMA_QP_OFFSET, CAP_FLAG_OUTPUT_PORT}, - {DISPLAY_DELAY_ENABLE, DEC, H264|HEVC|VP9, + {DISPLAY_DELAY_ENABLE, DEC, H264 | HEVC | VP9, 0, 1, 1, 0, V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY_ENABLE, HFI_PROP_DECODE_ORDER_OUTPUT, CAP_FLAG_INPUT_PORT}, - {DISPLAY_DELAY, DEC, H264|HEVC|VP9, + {DISPLAY_DELAY, DEC, H264 | HEVC | VP9, 0, 1, 1, 0, V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY, HFI_PROP_DECODE_ORDER_OUTPUT, CAP_FLAG_INPUT_PORT}, - {OUTPUT_ORDER, DEC, H264|HEVC|VP9, + {OUTPUT_ORDER, DEC, H264 | HEVC | VP9, 0, 1, 1, 0, 0, HFI_PROP_DECODE_ORDER_OUTPUT, CAP_FLAG_INPUT_PORT}, - {INPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL, + {INPUT_BUF_HOST_MAX_COUNT, ENC | DEC, CODECS_ALL, DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT, 1, DEFAULT_MAX_HOST_BUF_COUNT, 0, HFI_PROP_BUFFER_HOST_MAX_COUNT, CAP_FLAG_INPUT_PORT}, - {OUTPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL, + {OUTPUT_BUF_HOST_MAX_COUNT, ENC | DEC, CODECS_ALL, DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT, 1, DEFAULT_MAX_HOST_BUF_COUNT, 0, @@ -1144,14 +1144,14 @@ static struct msm_platform_inst_capability instance_cap_data_waipio[] = { HFI_PROP_CONCEAL_COLOR_10BIT, CAP_FLAG_INPUT_PORT}, - {STAGE, DEC|ENC, CODECS_ALL, + {STAGE, DEC | ENC, CODECS_ALL, MSM_VIDC_STAGE_1, MSM_VIDC_STAGE_2, 1, MSM_VIDC_STAGE_2, 0, HFI_PROP_STAGE}, - {PIPE, DEC|ENC, CODECS_ALL, + {PIPE, DEC | ENC, CODECS_ALL, MSM_VIDC_PIPE_1, MSM_VIDC_PIPE_4, 1, MSM_VIDC_PIPE_4, @@ -1167,7 +1167,7 @@ static struct msm_platform_inst_capability instance_cap_data_waipio[] = { MSM_VIDC_POWER_SAVE_MODE, 1, MSM_VIDC_POWER_SAVE_MODE}, - {CODED_FRAMES, DEC, H264|HEVC, + {CODED_FRAMES, DEC, H264 | HEVC, CODED_FRAMES_PROGRESSIVE, CODED_FRAMES_INTERLACE, 1, CODED_FRAMES_PROGRESSIVE, 0, @@ -1177,7 +1177,7 @@ static struct msm_platform_inst_capability instance_cap_data_waipio[] = { 0, HFI_PROP_LUMA_CHROMA_BIT_DEPTH}, - {CODEC_CONFIG, DEC, H264|HEVC, 0, 1, 1, 0, + {CODEC_CONFIG, DEC, H264 | HEVC, 0, 1, 1, 0, 0, 0, CAP_FLAG_DYNAMIC_ALLOWED}, @@ -1207,7 +1207,7 @@ static struct msm_platform_inst_capability instance_cap_data_waipio[] = { HFI_PROP_SEQ_CHANGE_AT_SYNC_FRAME, CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - {PRIORITY, DEC|ENC, CODECS_ALL, + {PRIORITY, DEC | ENC, CODECS_ALL, 0, 4, 1, 4, 0, HFI_PROP_SESSION_PRIORITY, @@ -1216,13 +1216,13 @@ static struct msm_platform_inst_capability instance_cap_data_waipio[] = { {FIRMWARE_PRIORITY_OFFSET, DEC | ENC, CODECS_ALL, 1, 1, 1, 1}, - {ALL_INTRA, ENC, H264|HEVC, + {ALL_INTRA, ENC, H264 | HEVC, 0, 1, 1, 0, 0, 0, CAP_FLAG_OUTPUT_PORT}, - {COMPLEXITY, ENC, H264|HEVC, + {COMPLEXITY, ENC, H264 | HEVC, 0, 100, 1, DEFAULT_COMPLEXITY, 0}, @@ -1264,7 +1264,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_waip NULL, msm_vidc_set_rotation}, - {SUPER_FRAME, ENC, H264|HEVC, + {SUPER_FRAME, ENC, H264 | HEVC, {INPUT_BUF_HOST_MAX_COUNT, OUTPUT_BUF_HOST_MAX_COUNT}, NULL, NULL}, @@ -1279,7 +1279,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_waip NULL, msm_vidc_set_nal_length}, - {REQUEST_I_FRAME, ENC, H264|HEVC, + {REQUEST_I_FRAME, ENC, H264 | HEVC, {0}, NULL, msm_vidc_set_req_sync_frame}, @@ -1322,12 +1322,12 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_waip msm_vidc_adjust_gop_size, msm_vidc_set_gop_size}, - {B_FRAME, ENC, H264|HEVC, + {B_FRAME, ENC, H264 | HEVC, {ALL_INTRA}, msm_vidc_adjust_b_frame, msm_vidc_set_u32}, - {BLUR_TYPES, ENC, H264|HEVC, + {BLUR_TYPES, ENC, H264 | HEVC, {0}, msm_vidc_adjust_blur_type_iris2, msm_vidc_set_u32_enum}, @@ -1337,37 +1337,37 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_waip msm_vidc_adjust_enc_lowlatency_mode, NULL}, - {LOWLATENCY_MODE, DEC, H264|HEVC|VP9, + {LOWLATENCY_MODE, DEC, H264 | HEVC | VP9, {STAGE}, msm_vidc_adjust_dec_lowlatency_mode, NULL}, - {LTR_COUNT, ENC, H264|HEVC, + {LTR_COUNT, ENC, H264 | HEVC, {0}, msm_vidc_adjust_ltr_count, msm_vidc_set_u32}, - {USE_LTR, ENC, H264|HEVC, + {USE_LTR, ENC, H264 | HEVC, {0}, msm_vidc_adjust_use_ltr, msm_vidc_set_use_and_mark_ltr}, - {MARK_LTR, ENC, H264|HEVC, + {MARK_LTR, ENC, H264 | HEVC, {0}, msm_vidc_adjust_mark_ltr, msm_vidc_set_use_and_mark_ltr}, - {AU_DELIMITER, ENC, H264|HEVC, + {AU_DELIMITER, ENC, H264 | HEVC, {0}, NULL, msm_vidc_set_u32}, - {CONTENT_ADAPTIVE_CODING, ENC, H264|HEVC, + {CONTENT_ADAPTIVE_CODING, ENC, H264 | HEVC, {REQUEST_PREPROCESS}, msm_vidc_adjust_brs, msm_vidc_set_vbr_related_properties}, - {REQUEST_PREPROCESS, ENC, H264|HEVC, + {REQUEST_PREPROCESS, ENC, H264 | HEVC, {0}, msm_vidc_adjust_preprocess, msm_vidc_set_preprocess}, @@ -1382,12 +1382,12 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_waip msm_vidc_adjust_min_quality, msm_vidc_set_u32}, - {VBV_DELAY, ENC, H264|HEVC, + {VBV_DELAY, ENC, H264 | HEVC, {0}, NULL, msm_vidc_set_cbr_related_properties}, - {PEAK_BITRATE, ENC, H264|HEVC, + {PEAK_BITRATE, ENC, H264 | HEVC, {0}, msm_vidc_adjust_peak_bitrate, msm_vidc_set_cbr_related_properties}, @@ -1445,40 +1445,40 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_waip {LAYER_TYPE, ENC, H264, {CONTENT_ADAPTIVE_CODING}}, - {LAYER_ENABLE, ENC, H264|HEVC, + {LAYER_ENABLE, ENC, H264 | HEVC, {CONTENT_ADAPTIVE_CODING}}, - {ENH_LAYER_COUNT, ENC, H264|HEVC, + {ENH_LAYER_COUNT, ENC, H264 | HEVC, {GOP_SIZE, B_FRAME, BIT_RATE, MIN_QUALITY, SLICE_MODE}, msm_vidc_adjust_layer_count, msm_vidc_set_layer_count_and_type}, - {L0_BR, ENC, H264|HEVC, + {L0_BR, ENC, H264 | HEVC, {L1_BR}, msm_vidc_adjust_layer_bitrate, msm_vidc_set_layer_bitrate}, - {L1_BR, ENC, H264|HEVC, + {L1_BR, ENC, H264 | HEVC, {L2_BR}, msm_vidc_adjust_layer_bitrate, msm_vidc_set_layer_bitrate}, - {L2_BR, ENC, H264|HEVC, + {L2_BR, ENC, H264 | HEVC, {L3_BR}, msm_vidc_adjust_layer_bitrate, msm_vidc_set_layer_bitrate}, - {L3_BR, ENC, H264|HEVC, + {L3_BR, ENC, H264 | HEVC, {L4_BR}, msm_vidc_adjust_layer_bitrate, msm_vidc_set_layer_bitrate}, - {L4_BR, ENC, H264|HEVC, + {L4_BR, ENC, H264 | HEVC, {L5_BR}, msm_vidc_adjust_layer_bitrate, msm_vidc_set_layer_bitrate}, - {L5_BR, ENC, H264|HEVC, + {L5_BR, ENC, H264 | HEVC, {0}, msm_vidc_adjust_layer_bitrate, msm_vidc_set_layer_bitrate}, @@ -1498,7 +1498,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_waip NULL, msm_vidc_set_u32_enum}, - {PROFILE, ENC|DEC, HEVC, + {PROFILE, ENC | DEC, HEVC, {0}, msm_vidc_adjust_profile, msm_vidc_set_u32_enum}, @@ -1518,7 +1518,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_waip NULL, msm_vidc_set_level}, - {HEVC_TIER, ENC|DEC, HEVC, + {HEVC_TIER, ENC | DEC, HEVC, {0}, NULL, msm_vidc_set_u32_enum}, @@ -1528,7 +1528,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_waip NULL, msm_vidc_set_deblock_mode}, - {SLICE_MODE, ENC, H264|HEVC, + {SLICE_MODE, ENC, H264 | HEVC, {STAGE}, msm_vidc_adjust_slice_count, msm_vidc_set_slice_count}, @@ -1543,37 +1543,37 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_waip msm_vidc_adjust_chroma_qp_index_offset, msm_vidc_set_chroma_qp_index_offset}, - {DISPLAY_DELAY_ENABLE, DEC, H264|HEVC|VP9, + {DISPLAY_DELAY_ENABLE, DEC, H264 | HEVC | VP9, {OUTPUT_ORDER}, NULL, NULL}, - {DISPLAY_DELAY, DEC, H264|HEVC|VP9, + {DISPLAY_DELAY, DEC, H264 | HEVC | VP9, {OUTPUT_ORDER}, NULL, NULL}, - {OUTPUT_ORDER, DEC, H264|HEVC|VP9, + {OUTPUT_ORDER, DEC, H264 | HEVC | VP9, {0}, msm_vidc_adjust_output_order, msm_vidc_set_u32}, - {INPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL, + {INPUT_BUF_HOST_MAX_COUNT, ENC | DEC, CODECS_ALL, {0}, msm_vidc_adjust_input_buf_host_max_count, msm_vidc_set_u32}, - {INPUT_BUF_HOST_MAX_COUNT, ENC, H264|HEVC, + {INPUT_BUF_HOST_MAX_COUNT, ENC, H264 | HEVC, {0}, msm_vidc_adjust_input_buf_host_max_count, msm_vidc_set_u32}, - {OUTPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL, + {OUTPUT_BUF_HOST_MAX_COUNT, ENC | DEC, CODECS_ALL, {0}, msm_vidc_adjust_output_buf_host_max_count, msm_vidc_set_u32}, - {OUTPUT_BUF_HOST_MAX_COUNT, ENC, H264|HEVC, + {OUTPUT_BUF_HOST_MAX_COUNT, ENC, H264 | HEVC, {0}, msm_vidc_adjust_output_buf_host_max_count, msm_vidc_set_u32}, @@ -1588,22 +1588,22 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_waip NULL, msm_vidc_set_u32_packed}, - {STAGE, ENC|DEC, CODECS_ALL, + {STAGE, ENC | DEC, CODECS_ALL, {0}, NULL, msm_vidc_set_stage}, - {STAGE, ENC, H264|HEVC, + {STAGE, ENC, H264 | HEVC, {0}, NULL, msm_vidc_set_stage}, - {STAGE, DEC, H264|HEVC|VP9, + {STAGE, DEC, H264 | HEVC | VP9, {0}, NULL, msm_vidc_set_stage}, - {PIPE, DEC|ENC, CODECS_ALL, + {PIPE, DEC | ENC, CODECS_ALL, {0}, NULL, msm_vidc_set_pipe}, @@ -1618,7 +1618,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_waip NULL, msm_vidc_set_u32}, - {PRIORITY, DEC|ENC, CODECS_ALL, + {PRIORITY, DEC | ENC, CODECS_ALL, {0}, msm_vidc_adjust_session_priority, msm_vidc_set_session_priority}, @@ -1628,7 +1628,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_waip NULL, NULL}, - {ALL_INTRA, ENC, H264|HEVC, + {ALL_INTRA, ENC, H264 | HEVC, {LTR_COUNT, SLICE_MODE, BIT_RATE}, msm_vidc_adjust_all_intra, NULL}, diff --git a/driver/variant/iris33/src/msm_vidc_iris33.c b/driver/variant/iris33/src/msm_vidc_iris33.c index ca9cab269a..2003c31818 100644 --- a/driver/variant/iris33/src/msm_vidc_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_iris33.c @@ -486,7 +486,7 @@ static int __power_off_iris33_controller(struct msm_vidc_core *core) d_vpr_e("%s: AON spare register is not zero\n", __func__); /* enable bit(1) to avoid cvp noc xo reset */ - rc = __write_register(core, AON_WRAPPER_SPARE, value|0x2); + rc = __write_register(core, AON_WRAPPER_SPARE, value | 0x2); if (rc) return rc; From a101cca5a926b4add66d35e6b1e30594380efc3f Mon Sep 17 00:00:00 2001 From: Ankush Mitra Date: Tue, 25 Jul 2023 16:51:51 +0530 Subject: [PATCH 0974/1061] video: driver: fix space requirement warning Fix space and blank line required warning. Change-Id: I2f754e52cdb36332a53b65ca248ae5d974a00ff4 Signed-off-by: Ankush Mitra --- .../platform/common/inc/msm_vidc_platform_ext.h | 2 ++ driver/platform/common/src/msm_vidc_platform.c | 1 + driver/platform/kalama/src/msm_vidc_kalama.c | 2 +- .../platform/pineapple/src/msm_vidc_pineapple.c | 16 ++++++++-------- driver/platform/pineapple/src/pineapple.c | 2 +- driver/platform/waipio/src/waipio.c | 2 +- driver/variant/iris2/src/msm_vidc_iris2.c | 2 +- driver/variant/iris3/src/msm_vidc_iris3.c | 2 +- driver/variant/iris33/src/msm_vidc_iris33.c | 2 +- driver/vidc/inc/hfi_property.h | 17 +++++++++++++++++ driver/vidc/inc/msm_vidc_debug.h | 1 + driver/vidc/inc/resources.h | 2 +- driver/vidc/src/msm_vdec.c | 1 + driver/vidc/src/venus_hfi.c | 2 ++ 14 files changed, 39 insertions(+), 15 deletions(-) diff --git a/driver/platform/common/inc/msm_vidc_platform_ext.h b/driver/platform/common/inc/msm_vidc_platform_ext.h index b91255f21b..f9dc6bce3e 100644 --- a/driver/platform/common/inc/msm_vidc_platform_ext.h +++ b/driver/platform/common/inc/msm_vidc_platform_ext.h @@ -42,6 +42,7 @@ enum v4l2_mpeg_vidc_blur_types { VIDC_BLUR_EXTERNAL = 0x1, VIDC_BLUR_ADAPTIVE = 0x2, }; + /* (blur width) << 16 | (blur height) */ #define V4L2_CID_MPEG_VIDC_VIDEO_BLUR_RESOLUTION \ (V4L2_CID_MPEG_VIDC_BASE + 0x11) @@ -163,6 +164,7 @@ enum v4l2_mpeg_vidc_av1_tier { V4L2_MPEG_VIDC_AV1_TIER_MAIN = 0, V4L2_MPEG_VIDC_AV1_TIER_HIGH = 1, }; + /* Decoder Timestamp Reorder control */ #define V4L2_CID_MPEG_VIDC_TS_REORDER (V4L2_CID_MPEG_VIDC_BASE + 0x34) /* AV1 Decoder Film Grain */ diff --git a/driver/platform/common/src/msm_vidc_platform.c b/driver/platform/common/src/msm_vidc_platform.c index 504cbe7c76..f06d21aa6d 100644 --- a/driver/platform/common/src/msm_vidc_platform.c +++ b/driver/platform/common/src/msm_vidc_platform.c @@ -3211,6 +3211,7 @@ static int msm_venc_set_csc_coeff(struct msm_vidc_inst *inst, return rc; } + int msm_vidc_set_csc_custom_matrix(void *instance, enum msm_vidc_inst_capability_type cap_id) { diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index ec5b8b1bc9..576c6e4b64 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -1344,7 +1344,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1) | BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2) | BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1)| + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1) | BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2), V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1, V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, diff --git a/driver/platform/pineapple/src/msm_vidc_pineapple.c b/driver/platform/pineapple/src/msm_vidc_pineapple.c index 595d4c3dac..52ba182ba4 100644 --- a/driver/platform/pineapple/src/msm_vidc_pineapple.c +++ b/driver/platform/pineapple/src/msm_vidc_pineapple.c @@ -397,7 +397,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { * hfi_id, * flags} */ - {DRV_VERSION, DEC|ENC, CODECS_ALL, + {DRV_VERSION, DEC | ENC, CODECS_ALL, 0, INT_MAX, 1, DRIVER_VERSION, V4L2_CID_MPEG_VIDC_DRIVER_VERSION}, @@ -1420,7 +1420,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1) | BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2) | BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1)| + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1) | BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2), V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1, V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, @@ -1636,14 +1636,14 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { HFI_PROP_CONCEAL_COLOR_10BIT, CAP_FLAG_INPUT_PORT}, - {STAGE, DEC|ENC, CODECS_ALL, + {STAGE, DEC | ENC, CODECS_ALL, MSM_VIDC_STAGE_1, MSM_VIDC_STAGE_2, 1, MSM_VIDC_STAGE_2, 0, HFI_PROP_STAGE}, - {PIPE, DEC|ENC, CODECS_ALL, + {PIPE, DEC | ENC, CODECS_ALL, MSM_VIDC_PIPE_1, MSM_VIDC_PIPE_4, 1, MSM_VIDC_PIPE_4, @@ -1712,7 +1712,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { HFI_PROP_SEQ_CHANGE_AT_SYNC_FRAME, CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - {PRIORITY, DEC|ENC, CODECS_ALL, + {PRIORITY, DEC | ENC, CODECS_ALL, 0, 4, 1, 4, V4L2_CID_MPEG_VIDC_PRIORITY, HFI_PROP_SESSION_PRIORITY, @@ -1753,7 +1753,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { HFI_PROP_AV1_DRAP_CONFIG, CAP_FLAG_INPUT_PORT}, - {LAST_FLAG_EVENT_ENABLE, DEC|ENC, CODECS_ALL, + {LAST_FLAG_EVENT_ENABLE, DEC | ENC, CODECS_ALL, 0, 1, 1, 0, V4L2_CID_MPEG_VIDC_LAST_FLAG_EVENT_ENABLE}, @@ -2570,7 +2570,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine NULL, msm_vidc_set_stage}, - {PIPE, DEC|ENC, CODECS_ALL, + {PIPE, DEC | ENC, CODECS_ALL, {0}, NULL, msm_vidc_set_pipe}, @@ -2590,7 +2590,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine NULL, msm_vidc_set_u32}, - {PRIORITY, DEC|ENC, CODECS_ALL, + {PRIORITY, DEC | ENC, CODECS_ALL, {0}, msm_vidc_adjust_session_priority, msm_vidc_set_session_priority}, diff --git a/driver/platform/pineapple/src/pineapple.c b/driver/platform/pineapple/src/pineapple.c index 105449d2b1..2a62589072 100644 --- a/driver/platform/pineapple/src/pineapple.c +++ b/driver/platform/pineapple/src/pineapple.c @@ -1048,7 +1048,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1) | BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2) | BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1)| + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1) | BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2), V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1, V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, diff --git a/driver/platform/waipio/src/waipio.c b/driver/platform/waipio/src/waipio.c index d1a8b35bb8..0bbac9ce45 100644 --- a/driver/platform/waipio/src/waipio.c +++ b/driver/platform/waipio/src/waipio.c @@ -982,7 +982,7 @@ static struct msm_platform_inst_capability instance_cap_data_waipio[] = { BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1) | BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2) | BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1)| + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1) | BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2), V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1, V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, diff --git a/driver/variant/iris2/src/msm_vidc_iris2.c b/driver/variant/iris2/src/msm_vidc_iris2.c index 218e80bb45..4709e1c598 100644 --- a/driver/variant/iris2/src/msm_vidc_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_iris2.c @@ -182,7 +182,7 @@ static int __interrupt_init_iris2(struct msm_vidc_core *core) return rc; /* Write 0 to unmask CPU and WD interrupts */ - mask_val &= ~(WRAPPER_INTR_MASK_A2HWD_BMSK_IRIS2| + mask_val &= ~(WRAPPER_INTR_MASK_A2HWD_BMSK_IRIS2 | WRAPPER_INTR_MASK_A2HCPU_BMSK_IRIS2); rc = __write_register(core, WRAPPER_INTR_MASK_IRIS2, mask_val); if (rc) diff --git a/driver/variant/iris3/src/msm_vidc_iris3.c b/driver/variant/iris3/src/msm_vidc_iris3.c index 1ab47a281b..edb503f13c 100644 --- a/driver/variant/iris3/src/msm_vidc_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_iris3.c @@ -188,7 +188,7 @@ static int __interrupt_init_iris3(struct msm_vidc_core *core) return rc; /* Write 0 to unmask CPU and WD interrupts */ - mask_val &= ~(WRAPPER_INTR_MASK_A2HWD_BMSK_IRIS3| + mask_val &= ~(WRAPPER_INTR_MASK_A2HWD_BMSK_IRIS3 | WRAPPER_INTR_MASK_A2HCPU_BMSK_IRIS3); rc = __write_register(core, WRAPPER_INTR_MASK_IRIS3, mask_val); if (rc) diff --git a/driver/variant/iris33/src/msm_vidc_iris33.c b/driver/variant/iris33/src/msm_vidc_iris33.c index 2003c31818..b24c95b7bd 100644 --- a/driver/variant/iris33/src/msm_vidc_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_iris33.c @@ -145,7 +145,7 @@ static int __interrupt_init_iris33(struct msm_vidc_core *core) return rc; /* Write 0 to unmask CPU and WD interrupts */ - mask_val &= ~(WRAPPER_INTR_MASK_A2HWD_BMSK_IRIS33| + mask_val &= ~(WRAPPER_INTR_MASK_A2HWD_BMSK_IRIS33 | WRAPPER_INTR_MASK_A2HCPU_BMSK_IRIS33); rc = __write_register(core, WRAPPER_INTR_MASK_IRIS33, mask_val); if (rc) diff --git a/driver/vidc/inc/hfi_property.h b/driver/vidc/inc/hfi_property.h index 8cd366e910..4d83bcab95 100644 --- a/driver/vidc/inc/hfi_property.h +++ b/driver/vidc/inc/hfi_property.h @@ -27,6 +27,7 @@ enum hfi_debug_config { HFI_DEBUG_CONFIG_WFI = 0x00000002, HFI_DEBUG_CONFIG_ARM9WD = 0x00000004, }; + #define HFI_PROP_DEBUG_CONFIG 0x0300000a enum hfi_debug_log_level { @@ -44,6 +45,7 @@ struct hfi_debug_header { u32 debug_level; u32 reserved[2]; }; + #define HFI_PROP_DEBUG_LOG_LEVEL 0x0300000b #define HFI_PROP_FENCE_CLIENT_DATA 0x0300000d @@ -57,6 +59,7 @@ enum hfi_codec_type { HFI_CODEC_DECODE_MPEG2 = 6, HFI_CODEC_DECODE_AV1 = 7, }; + #define HFI_PROP_CODEC 0x03000100 enum hfi_color_format { @@ -69,6 +72,7 @@ enum hfi_color_format { HFI_COLOR_FMT_RGBA8888_UBWC = 6, HFI_COLOR_FMT_NV21 = 7, }; + #define HFI_PROP_COLOR_FORMAT 0x03000101 #define HFI_PROP_SECURE 0x03000102 @@ -276,6 +280,7 @@ enum hfi_deblock_mode { HFI_DEBLOCK_DISABLE = 0x1, HFI_DEBLOCK_DISABLE_AT_SLICE_BOUNDARY = 0x2, }; + #define HFI_PROP_DEBLOCKING_MODE 0x03000129 enum hfi_rate_control { @@ -286,6 +291,7 @@ enum hfi_rate_control { HFI_RC_CBR_VFR = 0x00000004, HFI_RC_LOSSLESS = 0x00000005, }; + #define HFI_PROP_RATE_CONTROL 0x0300012a #define HFI_PROP_TIME_DELTA_BASED_RATE_CONTROL 0x0300012b @@ -324,6 +330,7 @@ enum hfi_layer_encoding_type { HFI_HIER_P_HYBRID_LTR = 0x2, HFI_HIER_B = 0x3, }; + #define HFI_PROP_LAYER_ENCODING_TYPE 0x03000138 #define HFI_PROP_LAYER_COUNT 0x03000139 @@ -332,6 +339,7 @@ enum hfi_chromaqp_offset_mode { HFI_ADAPTIVE_CHROMAQP_OFFSET = 0x0, HFI_FIXED_CHROMAQP_OFFSET = 0x1, }; + #define HFI_BITMASK_CHROMA_CB_OFFSET 0x0000ffff #define HFI_BITMASK_CHROMA_CR_OFFSET 0xffff0000 #define HFI_PROP_CHROMA_QP_OFFSET 0x0300013a @@ -360,6 +368,7 @@ enum hfi_syncframe_request_mode { HFI_SYNC_FRAME_REQUEST_WITHOUT_SEQ_HDR = 0x00000001, HFI_SYNC_FRAME_REQUEST_WITH_PREFIX_SEQ_HDR = 0x00000002, }; + #define HFI_PROP_REQUEST_SYNC_FRAME 0x03000145 #define HFI_PROP_MAX_GOP_FRAMES 0x03000146 @@ -379,6 +388,7 @@ enum hfi_seq_header_mode { HFI_SEQ_HEADER_PREFIX_WITH_SYNC_FRAME = 0x00000004, HFI_SEQ_HEADER_METADATA = 0x00000008, }; + #define HFI_PROP_SEQ_HEADER_MODE 0x03000149 #define HFI_PROP_METADATA_SEQ_HEADER_NAL 0x0300014a @@ -389,6 +399,7 @@ enum hfi_rotation { HFI_ROTATION_180 = 0x00000002, HFI_ROTATION_270 = 0x00000003, }; + #define HFI_PROP_ROTATION 0x0300014b enum hfi_flip { @@ -396,6 +407,7 @@ enum hfi_flip { HFI_HORIZONTAL_FLIP = 0x00000001, HFI_VERTICAL_FLIP = 0x00000002, }; + #define HFI_PROP_FLIP 0x0300014c #define HFI_PROP_SCALAR 0x0300014d @@ -405,6 +417,7 @@ enum hfi_blur_types { HFI_BLUR_EXTERNAL = 0x00000001, HFI_BLUR_ADAPTIVE = 0x00000002, }; + #define HFI_PROP_BLUR_TYPES 0x0300014e #define HFI_BITMASK_BLUR_WIDTH 0xffff0000 @@ -438,6 +451,7 @@ enum hfi_interlace_info { HFI_FRAME_INTERLACE_TOPFIELD_FIRST = 0x00000010, HFI_FRAME_INTERLACE_BOTTOMFIELD_FIRST = 0x00000020, }; + #define HFI_PROP_INTERLACE_INFO 0x03000156 #define HFI_PROP_CSC 0x03000157 @@ -473,6 +487,7 @@ enum hfi_picture_type { HFI_PICTURE_BLA = 0x00000020, HFI_PICTURE_NOSHOW = 0x00000040, }; + #define HFI_PROP_PICTURE_TYPE 0x03000162 #define HFI_PROP_SEI_MASTERING_DISPLAY_COLOUR 0x03000163 @@ -529,6 +544,7 @@ enum hfi_nal_length_field_type { HFI_NAL_LENGTH_STARTCODES = 0, HFI_NAL_LENGTH_SIZE_4 = 4, }; + #define HFI_PROP_NAL_LENGTH_FIELD 0x0300017B #define HFI_PROP_TOTAL_PEAK_BITRATE 0x0300017C @@ -557,6 +573,7 @@ enum hfi_saliency_type { HFI_SALIENCY_NONE, HFI_SALIENCY_TYPE0, }; + #define HFI_PROP_ROI_AS_SALIENCY_INFO 0x0300018A #define HFI_PROP_FENCE 0x0300018B diff --git a/driver/vidc/inc/msm_vidc_debug.h b/driver/vidc/inc/msm_vidc_debug.h index 0630cefe2c..64605ff8d5 100644 --- a/driver/vidc/inc/msm_vidc_debug.h +++ b/driver/vidc/inc/msm_vidc_debug.h @@ -76,6 +76,7 @@ enum vidc_msg_prio_drv { VIDC_PRINTK = 0x10000000, VIDC_FTRACE = 0x20000000, }; + enum vidc_msg_prio_fw { FW_LOW = 0x00000001, FW_MED = 0x00000002, diff --git a/driver/vidc/inc/resources.h b/driver/vidc/inc/resources.h index f3d5bf4dcd..1e240362af 100644 --- a/driver/vidc/inc/resources.h +++ b/driver/vidc/inc/resources.h @@ -284,7 +284,7 @@ struct msm_vidc_resources_ops { int (*clk_print_residency_stats)(struct msm_vidc_core *core); int (*clk_reset_residency_stats)(struct msm_vidc_core *core); int (*clk_update_residency_stats)( - struct msm_vidc_core *core,struct clock_info *cl, u64 rate); + struct msm_vidc_core *core, struct clock_info *cl, u64 rate); }; const struct msm_vidc_resources_ops *get_resources_ops(void); diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 73753beb45..d8044dfa8a 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -282,6 +282,7 @@ static int msm_vdec_set_bit_depth(struct msm_vidc_inst *inst, return rc; } + //todo: enable when needed /* static int msm_vdec_set_cabac(struct msm_vidc_inst *inst, diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index b451a20e2e..207a050618 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -211,6 +211,7 @@ exit: return rc; } + static int __sys_set_power_control(struct msm_vidc_core *core, bool enable) { int rc = 0; @@ -294,6 +295,7 @@ skip_power_off: d_vpr_e("%s: skipped\n", __func__); return -EAGAIN; } + static int __release_subcaches(struct msm_vidc_core *core) { int rc = 0; From 99cccf72d8b67e8030f36e4f805ffc0d7bee2f72 Mon Sep 17 00:00:00 2001 From: Megha Byahatti Date: Wed, 19 Jul 2023 22:34:13 +0530 Subject: [PATCH 0975/1061] video: driver: fix alignment and blank line warning - Fix Alignment should match open parenthesis and Please use a blank line after Change-Id: I5155f3037ab3b65a0456a18eb8c98b54760204f9 Signed-off-by: Megha Byahatti --- .../platform/common/inc/msm_vidc_platform.h | 137 ++-- .../common/inc/msm_vidc_platform_ext.h | 6 +- .../platform/common/inc/perf_static_model.h | 4 +- .../platform/common/src/msm_vidc_platform.c | 601 +++++++++--------- .../common/src/msm_vidc_platform_ext.c | 35 +- 5 files changed, 353 insertions(+), 430 deletions(-) diff --git a/driver/platform/common/inc/msm_vidc_platform.h b/driver/platform/common/inc/msm_vidc_platform.h index e6e1e19464..f8632e7c52 100644 --- a/driver/platform/common/inc/msm_vidc_platform.h +++ b/driver/platform/common/inc/msm_vidc_platform.h @@ -161,10 +161,8 @@ struct msm_platform_inst_cap_dependency { enum msm_vidc_domain_type domain; enum msm_vidc_codec_type codec; enum msm_vidc_inst_capability_type children[MAX_CAP_CHILDREN]; - int (*adjust)(void *inst, - struct v4l2_ctrl *ctrl); - int (*set)(void *inst, - enum msm_vidc_inst_capability_type cap_id); + int (*adjust)(void *inst, struct v4l2_ctrl *ctrl); + int (*set)(void *inst, enum msm_vidc_inst_capability_type cap_id); }; struct msm_vidc_compat_handle { @@ -282,24 +280,22 @@ int msm_vidc_init_platform(struct msm_vidc_core *core); /* control framework support functions */ -enum msm_vidc_inst_capability_type msm_vidc_get_cap_id( - struct msm_vidc_inst *inst, u32 id); +enum msm_vidc_inst_capability_type msm_vidc_get_cap_id(struct msm_vidc_inst *inst, u32 id); int msm_vidc_update_cap_value(struct msm_vidc_inst *inst, u32 cap, - s32 adjusted_val, const char *func); -bool is_parent_available(struct msm_vidc_inst *inst, - u32 cap_id, u32 check_parent, const char *func); + s32 adjusted_val, const char *func); +bool is_parent_available(struct msm_vidc_inst *inst, u32 cap_id, + u32 check_parent, const char *func); int msm_vidc_get_parent_value(struct msm_vidc_inst *inst, u32 cap, u32 parent, - s32 *value, const char *func); + s32 *value, const char *func); u32 msm_vidc_get_port_info(struct msm_vidc_inst *inst, - enum msm_vidc_inst_capability_type cap_id); + enum msm_vidc_inst_capability_type cap_id); int msm_vidc_v4l2_menu_to_hfi(struct msm_vidc_inst *inst, - enum msm_vidc_inst_capability_type cap_id, u32 *value); + enum msm_vidc_inst_capability_type cap_id, u32 *value); int msm_vidc_v4l2_to_hfi_enum(struct msm_vidc_inst *inst, - enum msm_vidc_inst_capability_type cap_id, u32 *value); + enum msm_vidc_inst_capability_type cap_id, u32 *value); int msm_vidc_packetize_control(struct msm_vidc_inst *inst, - enum msm_vidc_inst_capability_type cap_id, u32 payload_type, - void *hfi_val, u32 payload_size, const char *func); - + enum msm_vidc_inst_capability_type cap_id, u32 payload_type, + void *hfi_val, u32 payload_size, const char *func); int msm_vidc_adjust_bitrate(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_layer_bitrate(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_bitrate_mode(void *instance, struct v4l2_ctrl *ctrl); @@ -313,8 +309,7 @@ int msm_vidc_adjust_output_order(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_input_buf_host_max_count(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_output_buf_host_max_count(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_transform_8x8(void *instance, struct v4l2_ctrl *ctrl); -int msm_vidc_adjust_chroma_qp_index_offset(void *instance, - struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_chroma_qp_index_offset(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_slice_count(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_layer_count(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_gop_size(void *instance, struct v4l2_ctrl *ctrl); @@ -336,8 +331,7 @@ int msm_vidc_adjust_session_priority(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_roi_info(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_all_intra(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_dec_outbuf_fence_type(void *instance, struct v4l2_ctrl *ctrl); -int msm_vidc_adjust_dec_outbuf_fence_direction(void *instance, - struct v4l2_ctrl *ctrl); +int msm_vidc_adjust_dec_outbuf_fence_direction(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_dec_slice_mode(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_preprocess(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_eva_stats(void *instance, struct v4l2_ctrl *ctrl); @@ -345,74 +339,39 @@ int msm_vidc_adjust_sei_mastering_disp(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_sei_cll(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_hdr10plus(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_transcoding_stats(void *instance, struct v4l2_ctrl *ctrl); - -int msm_vidc_set_header_mode(void *instance, - enum msm_vidc_inst_capability_type cap_id); -int msm_vidc_set_deblock_mode(void *instance, - enum msm_vidc_inst_capability_type cap_id); -int msm_vidc_set_min_qp(void *instance, - enum msm_vidc_inst_capability_type cap_id); -int msm_vidc_set_max_qp(void *instance, - enum msm_vidc_inst_capability_type cap_id); -int msm_vidc_set_frame_qp(void *instance, - enum msm_vidc_inst_capability_type cap_id); -int msm_vidc_set_req_sync_frame(void *instance, - enum msm_vidc_inst_capability_type cap_id); -int msm_vidc_set_chroma_qp_index_offset(void *instance, - enum msm_vidc_inst_capability_type cap_id); -int msm_vidc_set_slice_count(void *instance, - enum msm_vidc_inst_capability_type cap_id); -int msm_vidc_set_layer_count_and_type(void *instance, - enum msm_vidc_inst_capability_type cap_id); -int msm_vidc_set_gop_size(void *instance, - enum msm_vidc_inst_capability_type cap_id); -int msm_vidc_set_bitrate(void *instance, - enum msm_vidc_inst_capability_type cap_id); -int msm_vidc_set_layer_bitrate(void *instance, - enum msm_vidc_inst_capability_type cap_id); -int msm_vidc_set_u32(void *instance, - enum msm_vidc_inst_capability_type cap_id); -int msm_vidc_set_u32_packed(void *instance, - enum msm_vidc_inst_capability_type cap_id); -int msm_vidc_set_u32_enum(void *instance, - enum msm_vidc_inst_capability_type cap_id); -int msm_vidc_set_constant_quality(void *instance, - enum msm_vidc_inst_capability_type cap_id); -int msm_vidc_set_vbr_related_properties( - void *instance, enum msm_vidc_inst_capability_type cap_id); -int msm_vidc_set_cbr_related_properties(void *instance, - enum msm_vidc_inst_capability_type cap_id); -int msm_vidc_set_use_and_mark_ltr(void *instance, - enum msm_vidc_inst_capability_type cap_id); -int msm_vidc_set_nal_length(void *instance, - enum msm_vidc_inst_capability_type cap_id); -int msm_vidc_set_session_priority(void *instance, - enum msm_vidc_inst_capability_type cap_id); -int msm_vidc_set_flip(void *instance, - enum msm_vidc_inst_capability_type cap_id); -int msm_vidc_set_rotation(void *instance, - enum msm_vidc_inst_capability_type cap_id); -int msm_vidc_set_blur_resolution(void *instance, - enum msm_vidc_inst_capability_type cap_id); -int msm_vidc_set_stage(void *instance, - enum msm_vidc_inst_capability_type cap_id); -int msm_vidc_set_pipe(void *instance, - enum msm_vidc_inst_capability_type cap_id); -int msm_vidc_set_csc_custom_matrix(void *instance, - enum msm_vidc_inst_capability_type cap_id); -int msm_vidc_set_level(void *instance, - enum msm_vidc_inst_capability_type cap_id); -int msm_vidc_set_preprocess(void *instance, - enum msm_vidc_inst_capability_type cap_id); -int msm_vidc_set_reserve_duration(void *instance, - enum msm_vidc_inst_capability_type cap_id); -int msm_vidc_set_q16(void *instance, - enum msm_vidc_inst_capability_type cap_id); -int msm_vidc_set_vui_timing_info(void *instance, - enum msm_vidc_inst_capability_type cap_id); -int msm_vidc_set_outbuf_fence_type(void *instance, - enum msm_vidc_inst_capability_type cap_id); -int msm_vidc_set_outbuf_fence_direction(void *instance, - enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_header_mode(void *instance, enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_deblock_mode(void *instance, enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_min_qp(void *instance, enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_max_qp(void *instance, enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_frame_qp(void *instance, enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_req_sync_frame(void *instance, enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_chroma_qp_index_offset(void *instance, enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_slice_count(void *instance, enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_layer_count_and_type(void *instance, enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_gop_size(void *instance, enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_bitrate(void *instance, enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_layer_bitrate(void *instance, enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_u32(void *instance, enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_u32_packed(void *instance, enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_u32_enum(void *instance, enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_constant_quality(void *instance, enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_vbr_related_properties(void *instance, enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_cbr_related_properties(void *instance, enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_use_and_mark_ltr(void *instance, enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_nal_length(void *instance, enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_session_priority(void *instance, enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_flip(void *instance, enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_rotation(void *instance, enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_blur_resolution(void *instance, enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_stage(void *instance, enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_pipe(void *instance, enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_csc_custom_matrix(void *instance, enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_level(void *instance, enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_preprocess(void *instance, enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_reserve_duration(void *instance, enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_q16(void *instance, enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_vui_timing_info(void *instance, enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_outbuf_fence_type(void *instance, enum msm_vidc_inst_capability_type cap_id); +int msm_vidc_set_outbuf_fence_direction(void *instance, enum msm_vidc_inst_capability_type cap_id); #endif // _MSM_VIDC_PLATFORM_H_ diff --git a/driver/platform/common/inc/msm_vidc_platform_ext.h b/driver/platform/common/inc/msm_vidc_platform_ext.h index b91255f21b..ecb8c38736 100644 --- a/driver/platform/common/inc/msm_vidc_platform_ext.h +++ b/driver/platform/common/inc/msm_vidc_platform_ext.h @@ -42,6 +42,7 @@ enum v4l2_mpeg_vidc_blur_types { VIDC_BLUR_EXTERNAL = 0x1, VIDC_BLUR_ADAPTIVE = 0x2, }; + /* (blur width) << 16 | (blur height) */ #define V4L2_CID_MPEG_VIDC_VIDEO_BLUR_RESOLUTION \ (V4L2_CID_MPEG_VIDC_BASE + 0x11) @@ -163,6 +164,7 @@ enum v4l2_mpeg_vidc_av1_tier { V4L2_MPEG_VIDC_AV1_TIER_MAIN = 0, V4L2_MPEG_VIDC_AV1_TIER_HIGH = 1, }; + /* Decoder Timestamp Reorder control */ #define V4L2_CID_MPEG_VIDC_TS_REORDER (V4L2_CID_MPEG_VIDC_BASE + 0x34) /* AV1 Decoder Film Grain */ @@ -258,9 +260,9 @@ int msm_vidc_adjust_dec_frame_rate(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_dec_operating_rate(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_delivery_mode(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_set_ir_period(void *instance, - enum msm_vidc_inst_capability_type cap_id); + enum msm_vidc_inst_capability_type cap_id); int msm_vidc_set_signal_color_info(void *instance, - enum msm_vidc_inst_capability_type cap_id); + enum msm_vidc_inst_capability_type cap_id); int msm_vidc_adjust_csc(void *instance, struct v4l2_ctrl *ctrl); #endif diff --git a/driver/platform/common/inc/perf_static_model.h b/driver/platform/common/inc/perf_static_model.h index 66f7c027e6..1983609e04 100644 --- a/driver/platform/common/inc/perf_static_model.h +++ b/driver/platform/common/inc/perf_static_model.h @@ -230,8 +230,8 @@ struct api_calculation_bw_output { }; int msm_vidc_calculate_frequency(struct api_calculation_input codec_input, - struct api_calculation_freq_output *codec_output); + struct api_calculation_freq_output *codec_output); int msm_vidc_calculate_bandwidth(struct api_calculation_input codec_input, - struct api_calculation_bw_output *codec_output); + struct api_calculation_bw_output *codec_output); #endif /*_PERF_STATIC_MODEL_H_ */ diff --git a/driver/platform/common/src/msm_vidc_platform.c b/driver/platform/common/src/msm_vidc_platform.c index 504cbe7c76..31cbd87ef7 100644 --- a/driver/platform/common/src/msm_vidc_platform.c +++ b/driver/platform/common/src/msm_vidc_platform.c @@ -337,7 +337,7 @@ int msm_vidc_init_platform(struct msm_vidc_core *core) d_vpr_h("%s()\n", __func__); platform = devm_kzalloc(&core->pdev->dev, - sizeof(struct msm_vidc_platform), GFP_KERNEL); + sizeof(struct msm_vidc_platform), GFP_KERNEL); if (!platform) { d_vpr_e("%s: failed to alloc memory for platform\n", __func__); return -ENOMEM; @@ -363,8 +363,7 @@ int msm_vidc_init_platform(struct msm_vidc_core *core) /****************** control framework utility functions **********************/ -enum msm_vidc_inst_capability_type msm_vidc_get_cap_id( - struct msm_vidc_inst *inst, u32 id) +enum msm_vidc_inst_capability_type msm_vidc_get_cap_id(struct msm_vidc_inst *inst, u32 id) { enum msm_vidc_inst_capability_type i = INST_CAP_NONE + 1; @@ -382,7 +381,7 @@ enum msm_vidc_inst_capability_type msm_vidc_get_cap_id( } int msm_vidc_update_cap_value(struct msm_vidc_inst *inst, u32 cap_id, - s32 adjusted_val, const char *func) + s32 adjusted_val, const char *func) { int prev_value = 0; @@ -390,7 +389,7 @@ int msm_vidc_update_cap_value(struct msm_vidc_inst *inst, u32 cap_id, if (is_meta_cap(inst, cap_id)) { if (adjusted_val & MSM_VIDC_META_ENABLE && - adjusted_val & MSM_VIDC_META_DYN_ENABLE) { + adjusted_val & MSM_VIDC_META_DYN_ENABLE) { i_vpr_e(inst, "%s: %s cannot be enabled both statically and dynamically", __func__, cap_name(cap_id)); @@ -401,7 +400,7 @@ int msm_vidc_update_cap_value(struct msm_vidc_inst *inst, u32 cap_id, * control multiple times. */ if (adjusted_val & MSM_VIDC_META_ENABLE || - adjusted_val & MSM_VIDC_META_DYN_ENABLE) { + adjusted_val & MSM_VIDC_META_DYN_ENABLE) { /* enable metadata */ inst->capabilities[cap_id].value |= adjusted_val; } else { @@ -423,7 +422,7 @@ int msm_vidc_update_cap_value(struct msm_vidc_inst *inst, u32 cap_id, } bool is_parent_available(struct msm_vidc_inst *inst, - u32 cap_id, u32 check_parent, const char *func) + u32 cap_id, u32 check_parent, const char *func) { int i = 0; u32 cap_child; @@ -432,7 +431,7 @@ bool is_parent_available(struct msm_vidc_inst *inst, return false; while (i < MAX_CAP_CHILDREN && - inst->capabilities[check_parent].children[i]) { + inst->capabilities[check_parent].children[i]) { cap_child = inst->capabilities[check_parent].children[i]; if (cap_child == cap_id) return true; @@ -446,7 +445,7 @@ bool is_parent_available(struct msm_vidc_inst *inst, } int msm_vidc_get_parent_value(struct msm_vidc_inst *inst, - u32 cap_id, u32 parent, s32 *value, const char *func) + u32 cap_id, u32 parent, s32 *value, const char *func) { int rc = 0; @@ -470,10 +469,10 @@ int msm_vidc_get_parent_value(struct msm_vidc_inst *inst, } u32 msm_vidc_get_port_info(struct msm_vidc_inst *inst, - enum msm_vidc_inst_capability_type cap_id) + enum msm_vidc_inst_capability_type cap_id) { if (inst->capabilities[cap_id].flags & CAP_FLAG_INPUT_PORT && - inst->capabilities[cap_id].flags & CAP_FLAG_OUTPUT_PORT) { + inst->capabilities[cap_id].flags & CAP_FLAG_OUTPUT_PORT) { if (inst->bufq[OUTPUT_PORT].vb2q->streaming) return get_hfi_port(inst, INPUT_PORT); else @@ -489,7 +488,7 @@ u32 msm_vidc_get_port_info(struct msm_vidc_inst *inst, } int msm_vidc_v4l2_menu_to_hfi(struct msm_vidc_inst *inst, - enum msm_vidc_inst_capability_type cap_id, u32 *value) + enum msm_vidc_inst_capability_type cap_id, u32 *value) { switch (cap_id) { case ENTROPY_MODE: @@ -521,7 +520,7 @@ set_default: } int msm_vidc_v4l2_to_hfi_enum(struct msm_vidc_inst *inst, - enum msm_vidc_inst_capability_type cap_id, u32 *value) + enum msm_vidc_inst_capability_type cap_id, u32 *value) { switch (cap_id) { case BITRATE_MODE: @@ -628,8 +627,8 @@ set_default: } int msm_vidc_packetize_control(struct msm_vidc_inst *inst, - enum msm_vidc_inst_capability_type cap_id, u32 payload_type, - void *hfi_val, u32 payload_size, const char *func) + enum msm_vidc_inst_capability_type cap_id, u32 payload_type, + void *hfi_val, u32 payload_size, const char *func) { int rc = 0; u64 payload = 0; @@ -651,12 +650,12 @@ int msm_vidc_packetize_control(struct msm_vidc_inst *inst, cap_name(cap_id), inst->capabilities[cap_id].value, payload); rc = venus_hfi_session_property(inst, - inst->capabilities[cap_id].hfi_id, - HFI_HOST_FLAGS_NONE, - msm_vidc_get_port_info(inst, cap_id), - payload_type, - hfi_val, - payload_size); + inst->capabilities[cap_id].hfi_id, + HFI_HOST_FLAGS_NONE, + msm_vidc_get_port_info(inst, cap_id), + payload_type, + hfi_val, + payload_size); if (rc) { i_vpr_e(inst, "%s: failed to set cap[%d] %s to fw\n", func, cap_id, cap_name(cap_id)); @@ -687,16 +686,14 @@ int msm_vidc_adjust_entropy_mode(void *instance, struct v4l2_ctrl *ctrl) return 0; } - if (msm_vidc_get_parent_value(inst, ENTROPY_MODE, - PROFILE, &profile, __func__)) + if (msm_vidc_get_parent_value(inst, ENTROPY_MODE, PROFILE, &profile, __func__)) return -EINVAL; if (profile == V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE || - profile == V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_BASELINE) + profile == V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_BASELINE) adjusted_value = V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC; - msm_vidc_update_cap_value(inst, ENTROPY_MODE, - adjusted_value, __func__); + msm_vidc_update_cap_value(inst, ENTROPY_MODE, adjusted_value, __func__); return 0; } @@ -712,8 +709,8 @@ int msm_vidc_adjust_bitrate_mode(void *instance, struct v4l2_ctrl *ctrl) frame_rc = inst->capabilities[FRAME_RC_ENABLE].value; frame_skip = inst->capabilities[FRAME_SKIP_MODE].value; - if (lossless || (msm_vidc_lossless_encode && - inst->codec == MSM_VIDC_HEVC)) { + if (lossless || + (msm_vidc_lossless_encode && inst->codec == MSM_VIDC_HEVC)) { hfi_value = HFI_RC_LOSSLESS; goto update; } @@ -755,7 +752,7 @@ int msm_vidc_adjust_profile(void *instance, struct v4l2_ctrl *ctrl) * Otherwise it would be a database error that should be fixed. */ if (msm_vidc_get_parent_value(inst, PROFILE, PIX_FMTS, - &pix_fmt, __func__)) + &pix_fmt, __func__)) return -EINVAL; /* 10 bit profile for 10 bit color format */ @@ -772,8 +769,7 @@ int msm_vidc_adjust_profile(void *instance, struct v4l2_ctrl *ctrl) adjusted_value = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN; } - msm_vidc_update_cap_value(inst, PROFILE, - adjusted_value, __func__); + msm_vidc_update_cap_value(inst, PROFILE, adjusted_value, __func__); return 0; } @@ -789,12 +785,12 @@ int msm_vidc_adjust_ltr_count(void *instance, struct v4l2_ctrl *ctrl) adjusted_value = ctrl ? ctrl->val : inst->capabilities[LTR_COUNT].value; if (msm_vidc_get_parent_value(inst, LTR_COUNT, BITRATE_MODE, - &rc_type, __func__)) + &rc_type, __func__)) return -EINVAL; if ((rc_type != HFI_RC_OFF && - rc_type != HFI_RC_CBR_CFR && - rc_type != HFI_RC_CBR_VFR)) { + rc_type != HFI_RC_CBR_CFR && + rc_type != HFI_RC_CBR_VFR)) { adjusted_value = 0; i_vpr_h(inst, "%s: ltr count unsupported, rc_type: %#x\n", @@ -804,7 +800,7 @@ int msm_vidc_adjust_ltr_count(void *instance, struct v4l2_ctrl *ctrl) if (is_valid_cap(inst, ALL_INTRA)) { if (msm_vidc_get_parent_value(inst, LTR_COUNT, - ALL_INTRA, &all_intra, __func__)) + ALL_INTRA, &all_intra, __func__)) return -EINVAL; if (all_intra) { adjusted_value = 0; @@ -813,19 +809,19 @@ int msm_vidc_adjust_ltr_count(void *instance, struct v4l2_ctrl *ctrl) } if (!msm_vidc_get_parent_value(inst, LTR_COUNT, PIX_FMTS, - &pix_fmts, __func__)) { + &pix_fmts, __func__)) { if (is_10bit_colorformat(pix_fmts)) adjusted_value = 0; } if (!msm_vidc_get_parent_value(inst, LTR_COUNT, ENH_LAYER_COUNT, - &enh_layer_count, __func__) && + &enh_layer_count, __func__) && !msm_vidc_get_parent_value(inst, LTR_COUNT, LAYER_TYPE, - &layer_type, __func__)) { + &layer_type, __func__)) { if (layer_type == HFI_HIER_P_SLIDING_WINDOW) { SLIDING_WINDOW_REF_FRAMES(inst->codec, - inst->capabilities[ENH_LAYER_COUNT].value + 1, - adjusted_value, num_ref_frames); + inst->capabilities[ENH_LAYER_COUNT].value + 1, + adjusted_value, num_ref_frames); if (num_ref_frames > MAX_ENCODING_REFERNCE_FRAMES) { /* * reduce ltr count to avoid num ref @@ -847,7 +843,7 @@ int msm_vidc_adjust_ltr_count(void *instance, struct v4l2_ctrl *ctrl) } exit: - msm_vidc_update_cap_value(inst, LTR_COUNT, adjusted_value, __func__); + msm_vidc_update_cap_value(inst, LTR_COUNT, adjusted_value, __func__); return 0; } @@ -870,7 +866,7 @@ int msm_vidc_adjust_use_ltr(void *instance, struct v4l2_ctrl *ctrl) return 0; if (adjusted_value <= 0 || - adjusted_value > ((1 << ltr_count) - 1)) { + adjusted_value > ((1 << ltr_count) - 1)) { /* * USE_LTR is bitmask value, hence should be * > 0 and <= (2 ^ LTR_COUNT) - 1 @@ -881,8 +877,7 @@ int msm_vidc_adjust_use_ltr(void *instance, struct v4l2_ctrl *ctrl) } /* USE_LTR value is a bitmask value */ - msm_vidc_update_cap_value(inst, USE_LTR, - adjusted_value, __func__); + msm_vidc_update_cap_value(inst, USE_LTR, adjusted_value, __func__); return 0; } @@ -905,15 +900,14 @@ int msm_vidc_adjust_mark_ltr(void *instance, struct v4l2_ctrl *ctrl) return 0; if (adjusted_value < 0 || - adjusted_value > (ltr_count - 1)) { + adjusted_value > (ltr_count - 1)) { /* MARK_LTR value should be >= 0 and <= (LTR_COUNT - 1) */ i_vpr_e(inst, "%s: invalid value %d\n", __func__, adjusted_value); return 0; } - msm_vidc_update_cap_value(inst, MARK_LTR, - adjusted_value, __func__); + msm_vidc_update_cap_value(inst, MARK_LTR, adjusted_value, __func__); return 0; } @@ -927,16 +921,13 @@ int msm_vidc_adjust_delta_based_rc(void *instance, struct v4l2_ctrl *ctrl) adjusted_value = ctrl ? ctrl->val : inst->capabilities[TIME_DELTA_BASED_RC].value; - if (msm_vidc_get_parent_value(inst, TIME_DELTA_BASED_RC, - BITRATE_MODE, &rc_type, __func__)) + if (msm_vidc_get_parent_value(inst, TIME_DELTA_BASED_RC, BITRATE_MODE, &rc_type, __func__)) return -EINVAL; - if (rc_type == HFI_RC_OFF || - rc_type == HFI_RC_CQ) + if (rc_type == HFI_RC_OFF || rc_type == HFI_RC_CQ) adjusted_value = 0; - msm_vidc_update_cap_value(inst, TIME_DELTA_BASED_RC, - adjusted_value, __func__); + msm_vidc_update_cap_value(inst, TIME_DELTA_BASED_RC, adjusted_value, __func__); return 0; } @@ -952,9 +943,9 @@ int msm_vidc_adjust_output_order(void *instance, struct v4l2_ctrl *ctrl) inst->capabilities[OUTPUT_ORDER].value; if (msm_vidc_get_parent_value(inst, OUTPUT_ORDER, DISPLAY_DELAY, - &display_delay, __func__) || + &display_delay, __func__) || msm_vidc_get_parent_value(inst, OUTPUT_ORDER, DISPLAY_DELAY_ENABLE, - &display_delay_enable, __func__)) + &display_delay_enable, __func__)) return -EINVAL; if (display_delay_enable && !display_delay) @@ -962,15 +953,14 @@ int msm_vidc_adjust_output_order(void *instance, struct v4l2_ctrl *ctrl) if (is_valid_cap(inst, THUMBNAIL_MODE)) { if (msm_vidc_get_parent_value(inst, OUTPUT_ORDER, THUMBNAIL_MODE, - &tn_mode, __func__)) + &tn_mode, __func__)) return -EINVAL; if (tn_mode == 1) adjusted_value = 1; } - msm_vidc_update_cap_value(inst, OUTPUT_ORDER, - adjusted_value, __func__); + msm_vidc_update_cap_value(inst, OUTPUT_ORDER, adjusted_value, __func__); return 0; } @@ -987,8 +977,7 @@ int msm_vidc_adjust_input_buf_host_max_count(void *instance, struct v4l2_ctrl *c if (msm_vidc_is_super_buffer(inst) || is_image_session(inst)) adjusted_value = DEFAULT_MAX_HOST_BURST_BUF_COUNT; - msm_vidc_update_cap_value(inst, INPUT_BUF_HOST_MAX_COUNT, - adjusted_value, __func__); + msm_vidc_update_cap_value(inst, INPUT_BUF_HOST_MAX_COUNT, adjusted_value, __func__); return 0; } @@ -1003,11 +992,10 @@ int msm_vidc_adjust_output_buf_host_max_count(void *instance, struct v4l2_ctrl * inst->capabilities[OUTPUT_BUF_HOST_MAX_COUNT].value; if (msm_vidc_is_super_buffer(inst) || is_image_session(inst) || - is_enc_slice_delivery_mode(inst)) + is_enc_slice_delivery_mode(inst)) adjusted_value = DEFAULT_MAX_HOST_BURST_BUF_COUNT; - msm_vidc_update_cap_value(inst, OUTPUT_BUF_HOST_MAX_COUNT, - adjusted_value, __func__); + msm_vidc_update_cap_value(inst, OUTPUT_BUF_HOST_MAX_COUNT, adjusted_value, __func__); return 0; } @@ -1029,21 +1017,19 @@ int msm_vidc_adjust_transform_8x8(void *instance, struct v4l2_ctrl *ctrl) } if (msm_vidc_get_parent_value(inst, TRANSFORM_8X8, - PROFILE, &profile, __func__)) + PROFILE, &profile, __func__)) return -EINVAL; if (profile != V4L2_MPEG_VIDEO_H264_PROFILE_HIGH && - profile != V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH) + profile != V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH) adjusted_value = 0; - msm_vidc_update_cap_value(inst, TRANSFORM_8X8, - adjusted_value, __func__); + msm_vidc_update_cap_value(inst, TRANSFORM_8X8, adjusted_value, __func__); return 0; } -int msm_vidc_adjust_chroma_qp_index_offset(void *instance, - struct v4l2_ctrl *ctrl) +int msm_vidc_adjust_chroma_qp_index_offset(void *instance, struct v4l2_ctrl *ctrl) { s32 adjusted_value; struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; @@ -1054,8 +1040,7 @@ int msm_vidc_adjust_chroma_qp_index_offset(void *instance, if (adjusted_value != MIN_CHROMA_QP_OFFSET) adjusted_value = MAX_CHROMA_QP_OFFSET; - msm_vidc_update_cap_value(inst, CHROMA_QP_INDEX_OFFSET, - adjusted_value, __func__); + msm_vidc_update_cap_value(inst, CHROMA_QP_INDEX_OFFSET, adjusted_value, __func__); return 0; } @@ -1121,9 +1106,9 @@ int msm_vidc_adjust_slice_count(void *instance, struct v4l2_ctrl *ctrl) bitrate = inst->capabilities[BIT_RATE].value; if (msm_vidc_get_parent_value(inst, SLICE_MODE, - BITRATE_MODE, &rc_type, __func__) || - msm_vidc_get_parent_value(inst, SLICE_MODE, - ENH_LAYER_COUNT, &enh_layer_count, __func__)) + BITRATE_MODE, &rc_type, __func__) || + msm_vidc_get_parent_value(inst, SLICE_MODE, + ENH_LAYER_COUNT, &enh_layer_count, __func__)) return -EINVAL; if (enh_layer_count && msm_vidc_check_all_layer_bitrate_set(inst)) @@ -1131,10 +1116,8 @@ int msm_vidc_adjust_slice_count(void *instance, struct v4l2_ctrl *ctrl) fps = inst->capabilities[FRAME_RATE].value >> 16; if (fps > MAX_SLICES_FRAME_RATE || - (rc_type != HFI_RC_OFF && - rc_type != HFI_RC_CBR_CFR && - rc_type != HFI_RC_CBR_VFR && - rc_type != HFI_RC_VBR_CFR)) { + (rc_type != HFI_RC_OFF && rc_type != HFI_RC_CBR_CFR && + rc_type != HFI_RC_CBR_VFR && rc_type != HFI_RC_VBR_CFR)) { adjusted_value = V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE; update_cap = SLICE_MODE; i_vpr_h(inst, @@ -1145,14 +1128,13 @@ int msm_vidc_adjust_slice_count(void *instance, struct v4l2_ctrl *ctrl) if (is_valid_cap(inst, ALL_INTRA)) { if (msm_vidc_get_parent_value(inst, SLICE_MODE, - ALL_INTRA, &all_intra, __func__)) + ALL_INTRA, &all_intra, __func__)) return -EINVAL; if (all_intra == 1) { adjusted_value = V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE; update_cap = SLICE_MODE; - i_vpr_h(inst, - "%s: slice unsupported, all_intra %d\n", __func__, all_intra); + i_vpr_h(inst, "%s: slice unsupported, all_intra %d\n", __func__, all_intra); goto exit; } } @@ -1178,7 +1160,7 @@ int msm_vidc_adjust_slice_count(void *instance, struct v4l2_ctrl *ctrl) * - width and height <= 1920 */ if (output_width < min_width || output_height < min_height || - output_width > max_width || output_height > max_width) { + output_width > max_width || output_height > max_width) { adjusted_value = V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE; update_cap = SLICE_MODE; i_vpr_h(inst, @@ -1217,14 +1199,12 @@ int msm_vidc_adjust_slice_count(void *instance, struct v4l2_ctrl *ctrl) adjusted_value = slice_val; exit: - msm_vidc_update_cap_value(inst, update_cap, - adjusted_value, __func__); + msm_vidc_update_cap_value(inst, update_cap, adjusted_value, __func__); return 0; } -static int msm_vidc_adjust_static_layer_count_and_type(struct msm_vidc_inst *inst, - s32 layer_count) +static int msm_vidc_adjust_static_layer_count_and_type(struct msm_vidc_inst *inst, s32 layer_count) { bool hb_requested = false; @@ -1269,7 +1249,7 @@ static int msm_vidc_adjust_static_layer_count_and_type(struct msm_vidc_inst *ins /* HP requested */ inst->hfi_layer_type = HFI_HIER_P_SLIDING_WINDOW; if (inst->codec == MSM_VIDC_H264 && - inst->hfi_rc_type == HFI_RC_VBR_CFR) + inst->hfi_rc_type == HFI_RC_VBR_CFR) inst->hfi_layer_type = HFI_HIER_P_HYBRID_LTR; } @@ -1296,8 +1276,7 @@ static int msm_vidc_adjust_static_layer_count_and_type(struct msm_vidc_inst *ins } exit: - msm_vidc_update_cap_value(inst, ENH_LAYER_COUNT, - layer_count, __func__); + msm_vidc_update_cap_value(inst, ENH_LAYER_COUNT, layer_count, __func__); inst->capabilities[ENH_LAYER_COUNT].max = layer_count; return 0; } @@ -1313,17 +1292,16 @@ int msm_vidc_adjust_layer_count(void *instance, struct v4l2_ctrl *ctrl) inst->capabilities[ENH_LAYER_COUNT].value; if (!is_parent_available(inst, ENH_LAYER_COUNT, - BITRATE_MODE, __func__)) + BITRATE_MODE, __func__)) return -EINVAL; if (!inst->bufq[OUTPUT_PORT].vb2q->streaming) { - rc = msm_vidc_adjust_static_layer_count_and_type(inst, - client_layer_count); + rc = msm_vidc_adjust_static_layer_count_and_type(inst, client_layer_count); if (rc) goto exit; } else { if (inst->hfi_rc_type == HFI_RC_CBR_CFR || - inst->hfi_rc_type == HFI_RC_CBR_VFR) { + inst->hfi_rc_type == HFI_RC_CBR_VFR) { i_vpr_h(inst, "%s: ignoring dynamic layer count change for CBR mode\n", __func__); @@ -1331,7 +1309,7 @@ int msm_vidc_adjust_layer_count(void *instance, struct v4l2_ctrl *ctrl) } if (inst->hfi_layer_type == HFI_HIER_P_HYBRID_LTR || - inst->hfi_layer_type == HFI_HIER_P_SLIDING_WINDOW) { + inst->hfi_layer_type == HFI_HIER_P_SLIDING_WINDOW) { /* dynamic layer count change is only supported for HP */ if (client_layer_count > inst->capabilities[ENH_LAYER_COUNT].max) @@ -1339,7 +1317,7 @@ int msm_vidc_adjust_layer_count(void *instance, struct v4l2_ctrl *ctrl) inst->capabilities[ENH_LAYER_COUNT].max; msm_vidc_update_cap_value(inst, ENH_LAYER_COUNT, - client_layer_count, __func__); + client_layer_count, __func__); } } @@ -1356,7 +1334,7 @@ int msm_vidc_adjust_gop_size(void *instance, struct v4l2_ctrl *ctrl) adjusted_value = ctrl ? ctrl->val : inst->capabilities[GOP_SIZE].value; if (msm_vidc_get_parent_value(inst, GOP_SIZE, - ENH_LAYER_COUNT, &enh_layer_count, __func__)) + ENH_LAYER_COUNT, &enh_layer_count, __func__)) return -EINVAL; if (!enh_layer_count) @@ -1390,7 +1368,7 @@ int msm_vidc_adjust_b_frame(void *instance, struct v4l2_ctrl *ctrl) adjusted_value = ctrl ? ctrl->val : inst->capabilities[B_FRAME].value; if (msm_vidc_get_parent_value(inst, B_FRAME, - ENH_LAYER_COUNT, &enh_layer_count, __func__)) + ENH_LAYER_COUNT, &enh_layer_count, __func__)) return -EINVAL; if (!enh_layer_count || inst->hfi_layer_type != HFI_HIER_B) { @@ -1436,7 +1414,7 @@ int msm_vidc_adjust_bitrate(void *instance, struct v4l2_ctrl *ctrl) return 0; if (msm_vidc_get_parent_value(inst, BIT_RATE, - ENH_LAYER_COUNT, &enh_layer_count, __func__)) + ENH_LAYER_COUNT, &enh_layer_count, __func__)) return -EINVAL; /* get max bit rate for current session config*/ @@ -1480,15 +1458,15 @@ int msm_vidc_adjust_bitrate(void *instance, struct v4l2_ctrl *ctrl) * and add to FW_LIST to set new values to firmware. */ msm_vidc_update_cap_value(inst, cap_id, - (cap_value - decrement_in_value), __func__); + (cap_value - decrement_in_value), + __func__); } } i_vpr_h(inst, "%s: update BIT_RATE with cumulative bitrate\n", __func__); - msm_vidc_update_cap_value(inst, BIT_RATE, - cumulative_bitrate, __func__); + msm_vidc_update_cap_value(inst, BIT_RATE, cumulative_bitrate, __func__); } return rc; @@ -1563,7 +1541,7 @@ int msm_vidc_adjust_layer_bitrate(void *instance, struct v4l2_ctrl *ctrl) "%s: update BIT_RATE with cumulative bitrate\n", __func__); msm_vidc_update_cap_value(inst, BIT_RATE, - msm_vidc_get_cumulative_bitrate(inst), __func__); + msm_vidc_get_cumulative_bitrate(inst), __func__); return rc; } @@ -1578,15 +1556,15 @@ int msm_vidc_adjust_peak_bitrate(void *instance, struct v4l2_ctrl *ctrl) inst->capabilities[PEAK_BITRATE].value; if (msm_vidc_get_parent_value(inst, PEAK_BITRATE, - BITRATE_MODE, &rc_type, __func__)) + BITRATE_MODE, &rc_type, __func__)) return -EINVAL; if (rc_type != HFI_RC_CBR_CFR && - rc_type != HFI_RC_CBR_VFR) + rc_type != HFI_RC_CBR_VFR) return 0; if (msm_vidc_get_parent_value(inst, PEAK_BITRATE, - BIT_RATE, &bitrate, __func__)) + BIT_RATE, &bitrate, __func__)) return -EINVAL; /* Peak Bitrate should be larger than or equal to avg bitrate */ @@ -1598,17 +1576,16 @@ int msm_vidc_adjust_peak_bitrate(void *instance, struct v4l2_ctrl *ctrl) } msm_vidc_update_cap_value(inst, PEAK_BITRATE, - adjusted_value, __func__); + adjusted_value, __func__); return 0; } static int msm_vidc_adjust_hevc_qp(struct msm_vidc_inst *inst, - enum msm_vidc_inst_capability_type cap_id) + enum msm_vidc_inst_capability_type cap_id) { s32 pix_fmt = -1; - if (!(inst->codec == MSM_VIDC_HEVC || inst->codec == MSM_VIDC_HEIC)) { i_vpr_e(inst, "%s: incorrect cap[%d] %s entry in database, fix database\n", @@ -1617,7 +1594,7 @@ static int msm_vidc_adjust_hevc_qp(struct msm_vidc_inst *inst, } if (msm_vidc_get_parent_value(inst, cap_id, - PIX_FMTS, &pix_fmt, __func__)) + PIX_FMTS, &pix_fmt, __func__)) return -EINVAL; if (pix_fmt == MSM_VIDC_FMT_P010 || pix_fmt == MSM_VIDC_FMT_TP10C) @@ -1646,7 +1623,7 @@ int msm_vidc_adjust_hevc_min_qp(void *instance, struct v4l2_ctrl *ctrl) if (ctrl) msm_vidc_update_cap_value(inst, MIN_FRAME_QP, - ctrl->val, __func__); + ctrl->val, __func__); rc = msm_vidc_adjust_hevc_qp(inst, MIN_FRAME_QP); @@ -1660,8 +1637,7 @@ int msm_vidc_adjust_hevc_max_qp(void *instance, struct v4l2_ctrl *ctrl) struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; if (ctrl) - msm_vidc_update_cap_value(inst, MAX_FRAME_QP, - ctrl->val, __func__); + msm_vidc_update_cap_value(inst, MAX_FRAME_QP, ctrl->val, __func__); rc = msm_vidc_adjust_hevc_qp(inst, MAX_FRAME_QP); @@ -1675,8 +1651,7 @@ int msm_vidc_adjust_hevc_i_frame_qp(void *instance, struct v4l2_ctrl *ctrl) struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; if (ctrl) - msm_vidc_update_cap_value(inst, I_FRAME_QP, - ctrl->val, __func__); + msm_vidc_update_cap_value(inst, I_FRAME_QP, ctrl->val, __func__); rc = msm_vidc_adjust_hevc_qp(inst, I_FRAME_QP); if (rc) @@ -1692,8 +1667,7 @@ int msm_vidc_adjust_hevc_p_frame_qp(void *instance, struct v4l2_ctrl *ctrl) struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; if (ctrl) - msm_vidc_update_cap_value(inst, P_FRAME_QP, - ctrl->val, __func__); + msm_vidc_update_cap_value(inst, P_FRAME_QP, ctrl->val, __func__); rc = msm_vidc_adjust_hevc_qp(inst, P_FRAME_QP); if (rc) @@ -1709,8 +1683,7 @@ int msm_vidc_adjust_hevc_b_frame_qp(void *instance, struct v4l2_ctrl *ctrl) struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; if (ctrl) - msm_vidc_update_cap_value(inst, B_FRAME_QP, - ctrl->val, __func__); + msm_vidc_update_cap_value(inst, B_FRAME_QP, ctrl->val, __func__); rc = msm_vidc_adjust_hevc_qp(inst, B_FRAME_QP); if (rc) @@ -1733,9 +1706,9 @@ int msm_vidc_adjust_blur_type(void *instance, struct v4l2_ctrl *ctrl) return 0; if (msm_vidc_get_parent_value(inst, BLUR_TYPES, BITRATE_MODE, - &rc_type, __func__) || - msm_vidc_get_parent_value(inst, BLUR_TYPES, MIN_QUALITY, - &min_quality, __func__)) + &rc_type, __func__) || + msm_vidc_get_parent_value(inst, BLUR_TYPES, MIN_QUALITY, + &min_quality, __func__)) return -EINVAL; if (adjusted_value == MSM_VIDC_BLUR_EXTERNAL) { @@ -1744,7 +1717,7 @@ int msm_vidc_adjust_blur_type(void *instance, struct v4l2_ctrl *ctrl) } else if (adjusted_value == MSM_VIDC_BLUR_ADAPTIVE) { if (is_valid_cap(inst, META_ROI_INFO)) { if (msm_vidc_get_parent_value(inst, BLUR_TYPES, - META_ROI_INFO, &roi_enable, __func__)) + META_ROI_INFO, &roi_enable, __func__)) return -EINVAL; if (is_meta_tx_inp_enabled(inst, META_ROI_INFO)) { adjusted_value = MSM_VIDC_BLUR_NONE; @@ -1753,16 +1726,16 @@ int msm_vidc_adjust_blur_type(void *instance, struct v4l2_ctrl *ctrl) } if (is_scaling_enabled(inst) || min_quality || - (rc_type != HFI_RC_VBR_CFR && - rc_type != HFI_RC_CBR_CFR && - rc_type != HFI_RC_CBR_VFR)) { + (rc_type != HFI_RC_VBR_CFR && + rc_type != HFI_RC_CBR_CFR && + rc_type != HFI_RC_CBR_VFR)) { adjusted_value = MSM_VIDC_BLUR_NONE; goto exit; } if (inst->codec == MSM_VIDC_HEVC) { if (msm_vidc_get_parent_value(inst, BLUR_TYPES, PIX_FMTS, - &pix_fmts, __func__)) + &pix_fmts, __func__)) return -EINVAL; if (is_10bit_colorformat(pix_fmts)) adjusted_value = MSM_VIDC_BLUR_NONE; @@ -1770,8 +1743,7 @@ int msm_vidc_adjust_blur_type(void *instance, struct v4l2_ctrl *ctrl) } exit: - msm_vidc_update_cap_value(inst, BLUR_TYPES, - adjusted_value, __func__); + msm_vidc_update_cap_value(inst, BLUR_TYPES, adjusted_value, __func__); return 0; } @@ -1787,9 +1759,9 @@ int msm_vidc_adjust_all_intra(void *instance, struct v4l2_ctrl *ctrl) adjusted_value = inst->capabilities[ALL_INTRA].value; if (msm_vidc_get_parent_value(inst, ALL_INTRA, GOP_SIZE, - &gop_size, __func__) || - msm_vidc_get_parent_value(inst, ALL_INTRA, B_FRAME, - &bframe, __func__)) + &gop_size, __func__) || + msm_vidc_get_parent_value(inst, ALL_INTRA, B_FRAME, + &bframe, __func__)) return -EINVAL; width = inst->crop.width; @@ -1810,8 +1782,7 @@ int msm_vidc_adjust_all_intra(void *instance, struct v4l2_ctrl *ctrl) adjusted_value = 1; exit: - msm_vidc_update_cap_value(inst, ALL_INTRA, - adjusted_value, __func__); + msm_vidc_update_cap_value(inst, ALL_INTRA, adjusted_value, __func__); return 0; } @@ -1826,14 +1797,14 @@ int msm_vidc_adjust_blur_resolution(void *instance, struct v4l2_ctrl *ctrl) inst->capabilities[BLUR_RESOLUTION].value; if (msm_vidc_get_parent_value(inst, BLUR_RESOLUTION, BLUR_TYPES, - &blur_type, __func__)) + &blur_type, __func__)) return -EINVAL; if (blur_type != MSM_VIDC_BLUR_EXTERNAL) return 0; msm_vidc_update_cap_value(inst, BLUR_RESOLUTION, - adjusted_value, __func__); + adjusted_value, __func__); return 0; } @@ -1852,11 +1823,11 @@ int msm_vidc_adjust_brs(void *instance, struct v4l2_ctrl *ctrl) return 0; if (msm_vidc_get_parent_value(inst, CONTENT_ADAPTIVE_CODING, - BITRATE_MODE, &rc_type, __func__) || - msm_vidc_get_parent_value(inst, CONTENT_ADAPTIVE_CODING, - LAYER_ENABLE, &layer_enabled, __func__) || - msm_vidc_get_parent_value(inst, CONTENT_ADAPTIVE_CODING, - LAYER_TYPE, &layer_type, __func__)) + BITRATE_MODE, &rc_type, __func__) || + msm_vidc_get_parent_value(inst, CONTENT_ADAPTIVE_CODING, + LAYER_ENABLE, &layer_enabled, __func__) || + msm_vidc_get_parent_value(inst, CONTENT_ADAPTIVE_CODING, + LAYER_TYPE, &layer_type, __func__)) return -EINVAL; /* @@ -1887,7 +1858,7 @@ int msm_vidc_adjust_brs(void *instance, struct v4l2_ctrl *ctrl) adjust: msm_vidc_update_cap_value(inst, CONTENT_ADAPTIVE_CODING, - adjusted_value, __func__); + adjusted_value, __func__); return 0; } @@ -1906,9 +1877,9 @@ int msm_vidc_adjust_bitrate_boost(void *instance, struct v4l2_ctrl *ctrl) return 0; if (msm_vidc_get_parent_value(inst, BITRATE_BOOST, - MIN_QUALITY, &min_quality, __func__) || - msm_vidc_get_parent_value(inst, BITRATE_BOOST, - BITRATE_MODE, &rc_type, __func__)) + MIN_QUALITY, &min_quality, __func__) || + msm_vidc_get_parent_value(inst, BITRATE_BOOST, + BITRATE_MODE, &rc_type, __func__)) return -EINVAL; /* @@ -1937,8 +1908,7 @@ int msm_vidc_adjust_bitrate_boost(void *instance, struct v4l2_ctrl *ctrl) } adjust: - msm_vidc_update_cap_value(inst, BITRATE_BOOST, - adjusted_value, __func__); + msm_vidc_update_cap_value(inst, BITRATE_BOOST, adjusted_value, __func__); return 0; } @@ -1964,9 +1934,9 @@ int msm_vidc_adjust_min_quality(void *instance, struct v4l2_ctrl *ctrl) return 0; if (msm_vidc_get_parent_value(inst, MIN_QUALITY, - BITRATE_MODE, &rc_type, __func__) || - msm_vidc_get_parent_value(inst, MIN_QUALITY, - ENH_LAYER_COUNT, &enh_layer_count, __func__)) + BITRATE_MODE, &rc_type, __func__) || + msm_vidc_get_parent_value(inst, MIN_QUALITY, + ENH_LAYER_COUNT, &enh_layer_count, __func__)) return -EINVAL; /* @@ -1994,7 +1964,7 @@ int msm_vidc_adjust_min_quality(void *instance, struct v4l2_ctrl *ctrl) */ if (inst->codec == MSM_VIDC_HEVC) { if (msm_vidc_get_parent_value(inst, MIN_QUALITY, - PIX_FMTS, &pix_fmts, __func__)) + PIX_FMTS, &pix_fmts, __func__)) return -EINVAL; if (is_10bit_colorformat(pix_fmts)) { @@ -2022,7 +1992,7 @@ int msm_vidc_adjust_min_quality(void *instance, struct v4l2_ctrl *ctrl) if (is_valid_cap(inst, META_ROI_INFO)) { if (msm_vidc_get_parent_value(inst, MIN_QUALITY, - META_ROI_INFO, &roi_enable, __func__)) + META_ROI_INFO, &roi_enable, __func__)) return -EINVAL; if (is_meta_tx_inp_enabled(inst, META_ROI_INFO)) { i_vpr_h(inst, @@ -2045,8 +2015,7 @@ int msm_vidc_adjust_min_quality(void *instance, struct v4l2_ctrl *ctrl) adjusted_value = MAX_SUPPORTED_MIN_QUALITY; update_and_exit: - msm_vidc_update_cap_value(inst, MIN_QUALITY, - adjusted_value, __func__); + msm_vidc_update_cap_value(inst, MIN_QUALITY, adjusted_value, __func__); return 0; } @@ -2075,9 +2044,9 @@ int msm_vidc_adjust_preprocess(void *instance, struct v4l2_ctrl *ctrl) */ if (is_valid_cap(inst, CONTENT_ADAPTIVE_CODING)) { if (msm_vidc_get_parent_value(inst, - REQUEST_PREPROCESS, - CONTENT_ADAPTIVE_CODING, - &brs, __func__)) + REQUEST_PREPROCESS, + CONTENT_ADAPTIVE_CODING, + &brs, __func__)) return -EINVAL; if (brs == 0) { /* preprocess not required as BRS not enabled */ @@ -2091,14 +2060,13 @@ int msm_vidc_adjust_preprocess(void *instance, struct v4l2_ctrl *ctrl) } if (res_is_less_than_or_equal_to(width, height, 3840, 2160) && - max_fps <= 60) + max_fps <= 60) adjusted_value = 1; else adjusted_value = 0; update_preprocess: - msm_vidc_update_cap_value(inst, REQUEST_PREPROCESS, - adjusted_value, __func__); + msm_vidc_update_cap_value(inst, REQUEST_PREPROCESS, adjusted_value, __func__); return 0; } @@ -2113,16 +2081,15 @@ int msm_vidc_adjust_enc_lowlatency_mode(void *instance, struct v4l2_ctrl *ctrl) inst->capabilities[LOWLATENCY_MODE].value; if (msm_vidc_get_parent_value(inst, LOWLATENCY_MODE, BITRATE_MODE, - &rc_type, __func__)) + &rc_type, __func__)) return -EINVAL; if (rc_type == HFI_RC_CBR_CFR || - rc_type == HFI_RC_CBR_VFR || - is_enc_slice_delivery_mode(inst)) + rc_type == HFI_RC_CBR_VFR || + is_enc_slice_delivery_mode(inst)) adjusted_value = 1; - msm_vidc_update_cap_value(inst, LOWLATENCY_MODE, - adjusted_value, __func__); + msm_vidc_update_cap_value(inst, LOWLATENCY_MODE, adjusted_value, __func__); return 0; } @@ -2138,16 +2105,15 @@ int msm_vidc_adjust_dec_lowlatency_mode(void *instance, struct v4l2_ctrl *ctrl) if (is_valid_cap(inst, META_OUTBUF_FENCE)) { if (msm_vidc_get_parent_value(inst, LOWLATENCY_MODE, META_OUTBUF_FENCE, - &outbuf_fence, __func__)) + &outbuf_fence, __func__)) return -EINVAL; /* enable lowlatency if outbuf fence is enabled */ if (outbuf_fence & MSM_VIDC_META_ENABLE && - outbuf_fence & MSM_VIDC_META_RX_INPUT) + outbuf_fence & MSM_VIDC_META_RX_INPUT) adjusted_value = 1; } - msm_vidc_update_cap_value(inst, LOWLATENCY_MODE, - adjusted_value, __func__); + msm_vidc_update_cap_value(inst, LOWLATENCY_MODE, adjusted_value, __func__); return 0; } @@ -2195,20 +2161,19 @@ int msm_vidc_adjust_roi_info(void *instance, struct v4l2_ctrl *ctrl) adjusted_value = ctrl ? ctrl->val : inst->capabilities[META_ROI_INFO].value; if (msm_vidc_get_parent_value(inst, META_ROI_INFO, BITRATE_MODE, - &rc_type, __func__)) + &rc_type, __func__)) return -EINVAL; if (msm_vidc_get_parent_value(inst, META_ROI_INFO, PIX_FMTS, - &pix_fmt, __func__)) + &pix_fmt, __func__)) return -EINVAL; - if ((rc_type != HFI_RC_VBR_CFR && rc_type != HFI_RC_CBR_CFR - && rc_type != HFI_RC_CBR_VFR) || !is_8bit_colorformat(pix_fmt) - || is_scaling_enabled(inst) || is_rotation_90_or_270(inst)) + if ((rc_type != HFI_RC_VBR_CFR && rc_type != HFI_RC_CBR_CFR && + rc_type != HFI_RC_CBR_VFR) || !is_8bit_colorformat(pix_fmt) || + is_scaling_enabled(inst) || is_rotation_90_or_270(inst)) adjusted_value = 0; - msm_vidc_update_cap_value(inst, META_ROI_INFO, - adjusted_value, __func__); + msm_vidc_update_cap_value(inst, META_ROI_INFO, adjusted_value, __func__); return 0; } @@ -2227,7 +2192,7 @@ int msm_vidc_adjust_dec_outbuf_fence_type(void *instance, struct v4l2_ctrl *ctrl capability[OUTBUF_FENCE_TYPE].value; if (msm_vidc_get_parent_value(inst, OUTBUF_FENCE_TYPE, - META_OUTBUF_FENCE, &meta_outbuf_fence, __func__)) + META_OUTBUF_FENCE, &meta_outbuf_fence, __func__)) return -EINVAL; if (is_meta_rx_inp_enabled(inst, META_OUTBUF_FENCE)) { @@ -2239,8 +2204,7 @@ int msm_vidc_adjust_dec_outbuf_fence_type(void *instance, struct v4l2_ctrl *ctrl adjusted_value = MSM_VIDC_FENCE_NONE; } - msm_vidc_update_cap_value(inst, OUTBUF_FENCE_TYPE, - adjusted_value, __func__); + msm_vidc_update_cap_value(inst, OUTBUF_FENCE_TYPE, adjusted_value, __func__); return 0; } @@ -2259,7 +2223,7 @@ int msm_vidc_adjust_dec_outbuf_fence_direction(void *instance, struct v4l2_ctrl capability[OUTBUF_FENCE_DIRECTION].value; if (msm_vidc_get_parent_value(inst, OUTBUF_FENCE_DIRECTION, - META_OUTBUF_FENCE, &meta_outbuf_fence, __func__)) + META_OUTBUF_FENCE, &meta_outbuf_fence, __func__)) return -EINVAL; if (is_meta_rx_inp_enabled(inst, META_OUTBUF_FENCE)) @@ -2267,8 +2231,7 @@ int msm_vidc_adjust_dec_outbuf_fence_direction(void *instance, struct v4l2_ctrl else adjusted_value = MSM_VIDC_FENCE_DIR_NONE; - msm_vidc_update_cap_value(inst, OUTBUF_FENCE_DIRECTION, - adjusted_value, __func__); + msm_vidc_update_cap_value(inst, OUTBUF_FENCE_DIRECTION, adjusted_value, __func__); return 0; } @@ -2284,19 +2247,18 @@ int msm_vidc_adjust_dec_slice_mode(void *instance, struct v4l2_ctrl *ctrl) adjusted_value = ctrl ? ctrl->val : inst->capabilities[SLICE_DECODE].value; if (msm_vidc_get_parent_value(inst, SLICE_DECODE, LOWLATENCY_MODE, - &low_latency, __func__) || + &low_latency, __func__) || msm_vidc_get_parent_value(inst, SLICE_DECODE, OUTPUT_ORDER, - &picture_order, __func__) || + &picture_order, __func__) || msm_vidc_get_parent_value(inst, SLICE_DECODE, META_OUTBUF_FENCE, - &outbuf_fence, __func__)) + &outbuf_fence, __func__)) return -EINVAL; if (!low_latency || !picture_order || !is_meta_rx_inp_enabled(inst, META_OUTBUF_FENCE)) adjusted_value = 0; - msm_vidc_update_cap_value(inst, SLICE_DECODE, - adjusted_value, __func__); + msm_vidc_update_cap_value(inst, SLICE_DECODE, adjusted_value, __func__); return 0; } @@ -2310,7 +2272,7 @@ int msm_vidc_adjust_eva_stats(void *instance, struct v4l2_ctrl *ctrl) adjusted_value = ctrl ? ctrl->val : inst->capabilities[META_EVA_STATS].value; if (msm_vidc_get_parent_value(inst, META_EVA_STATS, BITRATE_MODE, - &rc_type, __func__)) + &rc_type, __func__)) return -EINVAL; /* disable Eva stats metadata for CQ rate control */ @@ -2319,8 +2281,7 @@ int msm_vidc_adjust_eva_stats(void *instance, struct v4l2_ctrl *ctrl) adjusted_value = 0; } - msm_vidc_update_cap_value(inst, META_EVA_STATS, - adjusted_value, __func__); + msm_vidc_update_cap_value(inst, META_EVA_STATS, adjusted_value, __func__); return 0; } @@ -2334,7 +2295,7 @@ int msm_vidc_adjust_sei_mastering_disp(void *instance, struct v4l2_ctrl *ctrl) adjusted_value = ctrl ? ctrl->val : inst->capabilities[META_SEI_MASTERING_DISP].value; if (msm_vidc_get_parent_value(inst, META_SEI_MASTERING_DISP, PROFILE, - &profile, __func__)) + &profile, __func__)) return -EINVAL; if (inst->codec != MSM_VIDC_HEVC && inst->codec != MSM_VIDC_HEIC) { @@ -2343,16 +2304,16 @@ int msm_vidc_adjust_sei_mastering_disp(void *instance, struct v4l2_ctrl *ctrl) } if ((inst->codec == MSM_VIDC_HEVC && - profile != V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10) || - (inst->codec == MSM_VIDC_HEIC && - profile != V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE)) { + profile != V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10) || + (inst->codec == MSM_VIDC_HEIC && + profile != V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE)) { adjusted_value = 0; goto adjust; } adjust: msm_vidc_update_cap_value(inst, META_SEI_MASTERING_DISP, - adjusted_value, __func__); + adjusted_value, __func__); return 0; } @@ -2365,7 +2326,7 @@ int msm_vidc_adjust_sei_cll(void *instance, struct v4l2_ctrl *ctrl) adjusted_value = ctrl ? ctrl->val : inst->capabilities[META_SEI_CLL].value; if (msm_vidc_get_parent_value(inst, META_SEI_CLL, PROFILE, - &profile, __func__)) + &profile, __func__)) return -EINVAL; if (inst->codec != MSM_VIDC_HEVC && inst->codec != MSM_VIDC_HEIC) { @@ -2374,9 +2335,9 @@ int msm_vidc_adjust_sei_cll(void *instance, struct v4l2_ctrl *ctrl) } if ((inst->codec == MSM_VIDC_HEVC && - profile != V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10) || - (inst->codec == MSM_VIDC_HEIC && - profile != V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE)) { + profile != V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10) || + (inst->codec == MSM_VIDC_HEIC && + profile != V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE)) { adjusted_value = 0; goto adjust; } @@ -2395,7 +2356,7 @@ int msm_vidc_adjust_hdr10plus(void *instance, struct v4l2_ctrl *ctrl) adjusted_value = ctrl ? ctrl->val : inst->capabilities[META_HDR10PLUS].value; if (msm_vidc_get_parent_value(inst, META_HDR10PLUS, PROFILE, - &profile, __func__)) + &profile, __func__)) return -EINVAL; if (inst->codec != MSM_VIDC_HEVC && inst->codec != MSM_VIDC_HEIC) { @@ -2404,9 +2365,9 @@ int msm_vidc_adjust_hdr10plus(void *instance, struct v4l2_ctrl *ctrl) } if ((inst->codec == MSM_VIDC_HEVC && - profile != V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10) || - (inst->codec == MSM_VIDC_HEIC && - profile != V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE)) { + profile != V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10) || + (inst->codec == MSM_VIDC_HEIC && + profile != V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE)) { adjusted_value = 0; goto adjust; } @@ -2428,7 +2389,7 @@ int msm_vidc_adjust_transcoding_stats(void *instance, struct v4l2_ctrl *ctrl) inst->capabilities[META_TRANSCODING_STAT_INFO].value; if (msm_vidc_get_parent_value(inst, META_TRANSCODING_STAT_INFO, - BITRATE_MODE, &rc_type, __func__)) + BITRATE_MODE, &rc_type, __func__)) return -EINVAL; /* @@ -2455,7 +2416,7 @@ int msm_vidc_adjust_transcoding_stats(void *instance, struct v4l2_ctrl *ctrl) width = f->fmt.pix_mp.width; height = f->fmt.pix_mp.height; if (res_is_greater_than(width, height, - MAX_TRANSCODING_STATS_WIDTH, MAX_TRANSCODING_STATS_HEIGHT)) { + MAX_TRANSCODING_STATS_WIDTH, MAX_TRANSCODING_STATS_HEIGHT)) { i_vpr_h(inst, "%s: unsupported res, wxh %ux%u\n", __func__, width, height); adjusted_value = 0; @@ -2464,7 +2425,7 @@ int msm_vidc_adjust_transcoding_stats(void *instance, struct v4l2_ctrl *ctrl) exit: msm_vidc_update_cap_value(inst, META_TRANSCODING_STAT_INFO, - adjusted_value, __func__); + adjusted_value, __func__); return 0; } @@ -2474,7 +2435,7 @@ exit: /************************* Control Set functions *****************************/ int msm_vidc_set_header_mode(void *instance, - enum msm_vidc_inst_capability_type cap_id) + enum msm_vidc_inst_capability_type cap_id) { int rc = 0; struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; @@ -2496,7 +2457,7 @@ int msm_vidc_set_header_mode(void *instance, hfi_value |= HFI_SEQ_HEADER_METADATA; rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32_ENUM, - &hfi_value, sizeof(u32), __func__); + &hfi_value, sizeof(u32), __func__); if (rc) return rc; @@ -2504,7 +2465,7 @@ int msm_vidc_set_header_mode(void *instance, } int msm_vidc_set_deblock_mode(void *instance, - enum msm_vidc_inst_capability_type cap_id) + enum msm_vidc_inst_capability_type cap_id) { int rc = 0; struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; @@ -2520,7 +2481,7 @@ int msm_vidc_set_deblock_mode(void *instance, hfi_value = (alpha << 16) | (beta << 8) | lf_mode; rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_32_PACKED, - &hfi_value, sizeof(u32), __func__); + &hfi_value, sizeof(u32), __func__); if (rc) return rc; @@ -2528,7 +2489,7 @@ int msm_vidc_set_deblock_mode(void *instance, } int msm_vidc_set_constant_quality(void *instance, - enum msm_vidc_inst_capability_type cap_id) + enum msm_vidc_inst_capability_type cap_id) { int rc = 0; struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; @@ -2536,7 +2497,7 @@ int msm_vidc_set_constant_quality(void *instance, s32 rc_type = -1; if (msm_vidc_get_parent_value(inst, cap_id, - BITRATE_MODE, &rc_type, __func__)) + BITRATE_MODE, &rc_type, __func__)) return -EINVAL; if (rc_type != HFI_RC_CQ) @@ -2545,7 +2506,7 @@ int msm_vidc_set_constant_quality(void *instance, hfi_value = inst->capabilities[cap_id].value; rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32, - &hfi_value, sizeof(u32), __func__); + &hfi_value, sizeof(u32), __func__); if (rc) return rc; @@ -2553,7 +2514,7 @@ int msm_vidc_set_constant_quality(void *instance, } int msm_vidc_set_vbr_related_properties(void *instance, - enum msm_vidc_inst_capability_type cap_id) + enum msm_vidc_inst_capability_type cap_id) { int rc = 0; struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; @@ -2561,7 +2522,7 @@ int msm_vidc_set_vbr_related_properties(void *instance, s32 rc_type = -1; if (msm_vidc_get_parent_value(inst, cap_id, - BITRATE_MODE, &rc_type, __func__)) + BITRATE_MODE, &rc_type, __func__)) return -EINVAL; if (rc_type != HFI_RC_VBR_CFR) @@ -2570,7 +2531,7 @@ int msm_vidc_set_vbr_related_properties(void *instance, hfi_value = inst->capabilities[cap_id].value; rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32, - &hfi_value, sizeof(u32), __func__); + &hfi_value, sizeof(u32), __func__); if (rc) return rc; @@ -2578,7 +2539,7 @@ int msm_vidc_set_vbr_related_properties(void *instance, } int msm_vidc_set_cbr_related_properties(void *instance, - enum msm_vidc_inst_capability_type cap_id) + enum msm_vidc_inst_capability_type cap_id) { int rc = 0; struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; @@ -2586,17 +2547,17 @@ int msm_vidc_set_cbr_related_properties(void *instance, s32 rc_type = -1; if (msm_vidc_get_parent_value(inst, cap_id, - BITRATE_MODE, &rc_type, __func__)) + BITRATE_MODE, &rc_type, __func__)) return -EINVAL; if (rc_type != HFI_RC_CBR_VFR && - rc_type != HFI_RC_CBR_CFR) + rc_type != HFI_RC_CBR_CFR) return 0; hfi_value = inst->capabilities[cap_id].value; rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32, - &hfi_value, sizeof(u32), __func__); + &hfi_value, sizeof(u32), __func__); if (rc) return rc; @@ -2604,15 +2565,15 @@ int msm_vidc_set_cbr_related_properties(void *instance, } int msm_vidc_set_use_and_mark_ltr(void *instance, - enum msm_vidc_inst_capability_type cap_id) + enum msm_vidc_inst_capability_type cap_id) { int rc = 0; struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; u32 hfi_value = 0; if (!inst->capabilities[LTR_COUNT].value || - (inst->capabilities[cap_id].value == - INVALID_DEFAULT_MARK_OR_USE_LTR)) { + inst->capabilities[cap_id].value == + INVALID_DEFAULT_MARK_OR_USE_LTR) { i_vpr_h(inst, "%s: LTR_COUNT: %d %s: %d, cap %s is not set\n", __func__, inst->capabilities[LTR_COUNT].value, @@ -2625,7 +2586,7 @@ int msm_vidc_set_use_and_mark_ltr(void *instance, hfi_value = inst->capabilities[cap_id].value; rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32, - &hfi_value, sizeof(u32), __func__); + &hfi_value, sizeof(u32), __func__); if (rc) return rc; @@ -2633,7 +2594,7 @@ int msm_vidc_set_use_and_mark_ltr(void *instance, } int msm_vidc_set_min_qp(void *instance, - enum msm_vidc_inst_capability_type cap_id) + enum msm_vidc_inst_capability_type cap_id) { int rc = 0; struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; @@ -2646,13 +2607,13 @@ int msm_vidc_set_min_qp(void *instance, min_qp_enable = 1; if (min_qp_enable || - (inst->capabilities[I_FRAME_MIN_QP].flags & CAP_FLAG_CLIENT_SET)) + (inst->capabilities[I_FRAME_MIN_QP].flags & CAP_FLAG_CLIENT_SET)) i_qp_enable = 1; if (min_qp_enable || - (inst->capabilities[P_FRAME_MIN_QP].flags & CAP_FLAG_CLIENT_SET)) + (inst->capabilities[P_FRAME_MIN_QP].flags & CAP_FLAG_CLIENT_SET)) p_qp_enable = 1; if (min_qp_enable || - (inst->capabilities[B_FRAME_MIN_QP].flags & CAP_FLAG_CLIENT_SET)) + (inst->capabilities[B_FRAME_MIN_QP].flags & CAP_FLAG_CLIENT_SET)) b_qp_enable = 1; client_qp_enable = i_qp_enable | p_qp_enable << 1 | b_qp_enable << 2; @@ -2674,17 +2635,17 @@ int msm_vidc_set_min_qp(void *instance, * max of both caps will result into client set value. */ i_frame_qp = max(inst->capabilities[I_FRAME_MIN_QP].value, - inst->capabilities[MIN_FRAME_QP].value) + offset; + inst->capabilities[MIN_FRAME_QP].value) + offset; p_frame_qp = max(inst->capabilities[P_FRAME_MIN_QP].value, - inst->capabilities[MIN_FRAME_QP].value) + offset; + inst->capabilities[MIN_FRAME_QP].value) + offset; b_frame_qp = max(inst->capabilities[B_FRAME_MIN_QP].value, - inst->capabilities[MIN_FRAME_QP].value) + offset; + inst->capabilities[MIN_FRAME_QP].value) + offset; hfi_value = i_frame_qp | p_frame_qp << 8 | b_frame_qp << 16 | client_qp_enable << 24; rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_32_PACKED, - &hfi_value, sizeof(u32), __func__); + &hfi_value, sizeof(u32), __func__); if (rc) return rc; @@ -2692,7 +2653,7 @@ int msm_vidc_set_min_qp(void *instance, } int msm_vidc_set_max_qp(void *instance, - enum msm_vidc_inst_capability_type cap_id) + enum msm_vidc_inst_capability_type cap_id) { int rc = 0; struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; @@ -2705,13 +2666,13 @@ int msm_vidc_set_max_qp(void *instance, max_qp_enable = 1; if (max_qp_enable || - (inst->capabilities[I_FRAME_MAX_QP].flags & CAP_FLAG_CLIENT_SET)) + (inst->capabilities[I_FRAME_MAX_QP].flags & CAP_FLAG_CLIENT_SET)) i_qp_enable = 1; if (max_qp_enable || - (inst->capabilities[P_FRAME_MAX_QP].flags & CAP_FLAG_CLIENT_SET)) + (inst->capabilities[P_FRAME_MAX_QP].flags & CAP_FLAG_CLIENT_SET)) p_qp_enable = 1; if (max_qp_enable || - (inst->capabilities[B_FRAME_MAX_QP].flags & CAP_FLAG_CLIENT_SET)) + (inst->capabilities[B_FRAME_MAX_QP].flags & CAP_FLAG_CLIENT_SET)) b_qp_enable = 1; client_qp_enable = i_qp_enable | p_qp_enable << 1 | b_qp_enable << 2; @@ -2733,17 +2694,17 @@ int msm_vidc_set_max_qp(void *instance, * min of both caps will result into client set value. */ i_frame_qp = min(inst->capabilities[I_FRAME_MAX_QP].value, - inst->capabilities[MAX_FRAME_QP].value) + offset; + inst->capabilities[MAX_FRAME_QP].value) + offset; p_frame_qp = min(inst->capabilities[P_FRAME_MAX_QP].value, - inst->capabilities[MAX_FRAME_QP].value) + offset; + inst->capabilities[MAX_FRAME_QP].value) + offset; b_frame_qp = min(inst->capabilities[B_FRAME_MAX_QP].value, - inst->capabilities[MAX_FRAME_QP].value) + offset; + inst->capabilities[MAX_FRAME_QP].value) + offset; hfi_value = i_frame_qp | p_frame_qp << 8 | b_frame_qp << 16 | client_qp_enable << 24; rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_32_PACKED, - &hfi_value, sizeof(u32), __func__); + &hfi_value, sizeof(u32), __func__); if (rc) return rc; @@ -2751,7 +2712,7 @@ int msm_vidc_set_max_qp(void *instance, } int msm_vidc_set_frame_qp(void *instance, - enum msm_vidc_inst_capability_type cap_id) + enum msm_vidc_inst_capability_type cap_id) { int rc = 0; struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; @@ -2760,10 +2721,11 @@ int msm_vidc_set_frame_qp(void *instance, u32 i_qp_enable = 0, p_qp_enable = 0, b_qp_enable = 0; u32 client_qp_enable = 0, hfi_value = 0, offset = 0; s32 rc_type = -1; + capab = inst->capabilities; if (msm_vidc_get_parent_value(inst, cap_id, - BITRATE_MODE, &rc_type, __func__)) + BITRATE_MODE, &rc_type, __func__)) return -EINVAL; if (inst->bufq[OUTPUT_PORT].vb2q->streaming) { @@ -2777,7 +2739,9 @@ int msm_vidc_set_frame_qp(void *instance, if (rc_type == HFI_RC_OFF) { /* Mandatorily set for rc off case */ - i_qp_enable = p_qp_enable = b_qp_enable = 1; + i_qp_enable = 1; + p_qp_enable = 1; + b_qp_enable = 1; } else { /* Set only if client has set for NON rc off case */ if (capab[I_FRAME_QP].flags & CAP_FLAG_CLIENT_SET) @@ -2807,7 +2771,7 @@ int msm_vidc_set_frame_qp(void *instance, client_qp_enable << 24; rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_32_PACKED, - &hfi_value, sizeof(u32), __func__); + &hfi_value, sizeof(u32), __func__); if (rc) return rc; @@ -2815,7 +2779,7 @@ int msm_vidc_set_frame_qp(void *instance, } int msm_vidc_set_req_sync_frame(void *instance, - enum msm_vidc_inst_capability_type cap_id) + enum msm_vidc_inst_capability_type cap_id) { int rc = 0; struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; @@ -2829,7 +2793,7 @@ int msm_vidc_set_req_sync_frame(void *instance, hfi_value = HFI_SYNC_FRAME_REQUEST_WITHOUT_SEQ_HDR; rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32_ENUM, - &hfi_value, sizeof(u32), __func__); + &hfi_value, sizeof(u32), __func__); if (rc) return rc; @@ -2837,7 +2801,7 @@ int msm_vidc_set_req_sync_frame(void *instance, } int msm_vidc_set_chroma_qp_index_offset(void *instance, - enum msm_vidc_inst_capability_type cap_id) + enum msm_vidc_inst_capability_type cap_id) { int rc = 0; struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; @@ -2853,7 +2817,7 @@ int msm_vidc_set_chroma_qp_index_offset(void *instance, hfi_value = chroma_qp_offset_mode | chroma_qp << 8 | chroma_qp << 16; rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_32_PACKED, - &hfi_value, sizeof(u32), __func__); + &hfi_value, sizeof(u32), __func__); if (rc) return rc; @@ -2861,7 +2825,7 @@ int msm_vidc_set_chroma_qp_index_offset(void *instance, } int msm_vidc_set_slice_count(void *instance, - enum msm_vidc_inst_capability_type cap_id) + enum msm_vidc_inst_capability_type cap_id) { int rc = 0; struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; @@ -2886,7 +2850,7 @@ int msm_vidc_set_slice_count(void *instance, } rc = msm_vidc_packetize_control(inst, set_cap_id, HFI_PAYLOAD_U32, - &hfi_value, sizeof(u32), __func__); + &hfi_value, sizeof(u32), __func__); if (rc) return rc; @@ -2894,7 +2858,7 @@ int msm_vidc_set_slice_count(void *instance, } int msm_vidc_set_nal_length(void *instance, - enum msm_vidc_inst_capability_type cap_id) + enum msm_vidc_inst_capability_type cap_id) { int rc = 0; struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; @@ -2909,7 +2873,7 @@ int msm_vidc_set_nal_length(void *instance, } rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32_ENUM, - &hfi_value, sizeof(u32), __func__); + &hfi_value, sizeof(u32), __func__); if (rc) return rc; @@ -2917,7 +2881,7 @@ int msm_vidc_set_nal_length(void *instance, } int msm_vidc_set_layer_count_and_type(void *instance, - enum msm_vidc_inst_capability_type cap_id) + enum msm_vidc_inst_capability_type cap_id) { int rc = 0; struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; @@ -2929,7 +2893,7 @@ int msm_vidc_set_layer_count_and_type(void *instance, cap_id = LAYER_TYPE; rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32_ENUM, - &hfi_layer_type, sizeof(u32), __func__); + &hfi_layer_type, sizeof(u32), __func__); if (rc) goto exit; } else { @@ -2947,7 +2911,7 @@ int msm_vidc_set_layer_count_and_type(void *instance, hfi_layer_count = inst->capabilities[ENH_LAYER_COUNT].value + 1; rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32, - &hfi_layer_count, sizeof(u32), __func__); + &hfi_layer_count, sizeof(u32), __func__); if (rc) goto exit; @@ -2956,7 +2920,7 @@ exit: } int msm_vidc_set_gop_size(void *instance, - enum msm_vidc_inst_capability_type cap_id) + enum msm_vidc_inst_capability_type cap_id) { int rc = 0; struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; @@ -2974,7 +2938,7 @@ int msm_vidc_set_gop_size(void *instance, hfi_value = inst->capabilities[GOP_SIZE].value; rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32, - &hfi_value, sizeof(u32), __func__); + &hfi_value, sizeof(u32), __func__); if (rc) return rc; @@ -2982,7 +2946,7 @@ int msm_vidc_set_gop_size(void *instance, } int msm_vidc_set_bitrate(void *instance, - enum msm_vidc_inst_capability_type cap_id) + enum msm_vidc_inst_capability_type cap_id) { int rc = 0; struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; @@ -3004,7 +2968,7 @@ int msm_vidc_set_bitrate(void *instance, set_total_bitrate: hfi_value = inst->capabilities[BIT_RATE].value; rc = msm_vidc_packetize_control(inst, BIT_RATE, HFI_PAYLOAD_U32, - &hfi_value, sizeof(u32), __func__); + &hfi_value, sizeof(u32), __func__); if (rc) return rc; @@ -3012,7 +2976,7 @@ set_total_bitrate: } int msm_vidc_set_layer_bitrate(void *instance, - enum msm_vidc_inst_capability_type cap_id) + enum msm_vidc_inst_capability_type cap_id) { int rc = 0; struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; @@ -3034,7 +2998,7 @@ int msm_vidc_set_layer_bitrate(void *instance, * layer encoding is enabled during streamon. */ if (!inst->capabilities[ENH_LAYER_COUNT].max || - !msm_vidc_check_all_layer_bitrate_set(inst)) { + !msm_vidc_check_all_layer_bitrate_set(inst)) { i_vpr_h(inst, "%s: invalid layer bitrate, ignore setting to fw\n", __func__); @@ -3047,7 +3011,7 @@ int msm_vidc_set_layer_bitrate(void *instance, */ hfi_value = inst->capabilities[BIT_RATE].value; rc = msm_vidc_packetize_control(inst, BIT_RATE, HFI_PAYLOAD_U32, - &hfi_value, sizeof(u32), __func__); + &hfi_value, sizeof(u32), __func__); if (rc) return rc; @@ -3055,7 +3019,7 @@ int msm_vidc_set_layer_bitrate(void *instance, } int msm_vidc_set_session_priority(void *instance, - enum msm_vidc_inst_capability_type cap_id) + enum msm_vidc_inst_capability_type cap_id) { int rc = 0; u32 hfi_value = 0; @@ -3067,7 +3031,7 @@ int msm_vidc_set_session_priority(void *instance, inst->capabilities[FIRMWARE_PRIORITY_OFFSET].value; rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32, - &hfi_value, sizeof(u32), __func__); + &hfi_value, sizeof(u32), __func__); if (rc) return rc; @@ -3075,7 +3039,7 @@ int msm_vidc_set_session_priority(void *instance, } int msm_vidc_set_flip(void *instance, - enum msm_vidc_inst_capability_type cap_id) + enum msm_vidc_inst_capability_type cap_id) { int rc = 0; u32 hflip, vflip, hfi_value = HFI_DISABLE_FLIP; @@ -3093,14 +3057,14 @@ int msm_vidc_set_flip(void *instance, if (inst->bufq[OUTPUT_PORT].vb2q->streaming) { if (hfi_value != HFI_DISABLE_FLIP) { rc = msm_vidc_set_req_sync_frame(inst, - REQUEST_I_FRAME); + REQUEST_I_FRAME); if (rc) return rc; } } rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32_ENUM, - &hfi_value, sizeof(u32), __func__); + &hfi_value, sizeof(u32), __func__); if (rc) return rc; @@ -3108,14 +3072,14 @@ int msm_vidc_set_flip(void *instance, } int msm_vidc_set_preprocess(void *instance, - enum msm_vidc_inst_capability_type cap_id) + enum msm_vidc_inst_capability_type cap_id) { int rc = 0; struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; u32 hfi_value; rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32_ENUM, - &hfi_value, sizeof(u32), __func__); + &hfi_value, sizeof(u32), __func__); if (rc) return rc; @@ -3123,7 +3087,7 @@ int msm_vidc_set_preprocess(void *instance, } int msm_vidc_set_rotation(void *instance, - enum msm_vidc_inst_capability_type cap_id) + enum msm_vidc_inst_capability_type cap_id) { int rc = 0; struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; @@ -3134,7 +3098,7 @@ int msm_vidc_set_rotation(void *instance, return -EINVAL; rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32, - &hfi_value, sizeof(u32), __func__); + &hfi_value, sizeof(u32), __func__); if (rc) return rc; @@ -3142,7 +3106,7 @@ int msm_vidc_set_rotation(void *instance, } int msm_vidc_set_blur_resolution(void *instance, - enum msm_vidc_inst_capability_type cap_id) + enum msm_vidc_inst_capability_type cap_id) { int rc = 0; struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; @@ -3150,7 +3114,7 @@ int msm_vidc_set_blur_resolution(void *instance, u32 hfi_value, blur_width, blur_height; if (msm_vidc_get_parent_value(inst, cap_id, - BLUR_TYPES, &blur_type, __func__)) + BLUR_TYPES, &blur_type, __func__)) return -EINVAL; if (blur_type != MSM_VIDC_BLUR_EXTERNAL) @@ -3162,7 +3126,7 @@ int msm_vidc_set_blur_resolution(void *instance, blur_height = hfi_value & 0xFFFF; if (blur_width > inst->crop.width || - blur_height > inst->crop.height) { + blur_height > inst->crop.height) { i_vpr_e(inst, "%s: blur wxh: %dx%d exceeds crop wxh: %dx%d\n", __func__, blur_width, blur_height, @@ -3171,7 +3135,7 @@ int msm_vidc_set_blur_resolution(void *instance, } if (blur_width == inst->crop.width && - blur_height == inst->crop.height) { + blur_height == inst->crop.height) { i_vpr_e(inst, "%s: blur wxh: %dx%d is equal to crop wxh: %dx%d\n", __func__, blur_width, blur_height, @@ -3180,7 +3144,7 @@ int msm_vidc_set_blur_resolution(void *instance, } rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_32_PACKED, - &hfi_value, sizeof(u32), __func__); + &hfi_value, sizeof(u32), __func__); if (rc) return rc; @@ -3188,7 +3152,7 @@ int msm_vidc_set_blur_resolution(void *instance, } static int msm_venc_set_csc_coeff(struct msm_vidc_inst *inst, - const char *prop_name, u32 hfi_id, void *payload, + const char *prop_name, u32 hfi_id, void *payload, u32 payload_size, u32 row_count, u32 column_count) { int rc = 0; @@ -3197,12 +3161,12 @@ static int msm_venc_set_csc_coeff(struct msm_vidc_inst *inst, "set cap: name: %24s, hard coded %dx%d matrix array\n", prop_name, row_count, column_count); rc = venus_hfi_session_property(inst, - hfi_id, - HFI_HOST_FLAGS_NONE, - HFI_PORT_BITSTREAM, - HFI_PAYLOAD_S32_ARRAY, - payload, - payload_size); + hfi_id, + HFI_HOST_FLAGS_NONE, + HFI_PORT_BITSTREAM, + HFI_PAYLOAD_S32_ARRAY, + payload, + payload_size); if (rc) { i_vpr_e(inst, "%s: failed to set %s to fw\n", @@ -3211,8 +3175,9 @@ static int msm_venc_set_csc_coeff(struct msm_vidc_inst *inst, return rc; } + int msm_vidc_set_csc_custom_matrix(void *instance, - enum msm_vidc_inst_capability_type cap_id) + enum msm_vidc_inst_capability_type cap_id) { int rc = 0; int i; @@ -3227,7 +3192,7 @@ int msm_vidc_set_csc_custom_matrix(void *instance, csc_coeff = &core->platform->data.csc_data; if (!inst->capabilities[cap_id].value || - !inst->capabilities[CSC].value) { + !inst->capabilities[CSC].value) { i_vpr_h(inst, "%s: ignored as custom martix %u, csc %u\n", __func__, inst->capabilities[cap_id].value, @@ -3253,9 +3218,9 @@ int msm_vidc_set_csc_custom_matrix(void *instance, } rc = msm_venc_set_csc_coeff(inst, "CSC_CUSTOM_MATRIX", - HFI_PROP_CSC_MATRIX, &matrix_payload[0], - ARRAY_SIZE(matrix_payload) * sizeof(s32), - matrix_payload[0], matrix_payload[1]); + HFI_PROP_CSC_MATRIX, &matrix_payload[0], + ARRAY_SIZE(matrix_payload) * sizeof(s32), + matrix_payload[0], matrix_payload[1]); if (rc) return rc; @@ -3271,9 +3236,9 @@ int msm_vidc_set_csc_custom_matrix(void *instance, } rc = msm_venc_set_csc_coeff(inst, "CSC_BIAS", - HFI_PROP_CSC_BIAS, &csc_bias_payload[0], - ARRAY_SIZE(csc_bias_payload) * sizeof(s32), - csc_bias_payload[0], csc_bias_payload[1]); + HFI_PROP_CSC_BIAS, &csc_bias_payload[0], + ARRAY_SIZE(csc_bias_payload) * sizeof(s32), + csc_bias_payload[0], csc_bias_payload[1]); if (rc) return rc; @@ -3289,9 +3254,9 @@ int msm_vidc_set_csc_custom_matrix(void *instance, } rc = msm_venc_set_csc_coeff(inst, "CSC_LIMIT", - HFI_PROP_CSC_LIMIT, &csc_limit_payload[0], - ARRAY_SIZE(csc_limit_payload) * sizeof(s32), - csc_limit_payload[0], csc_limit_payload[1]); + HFI_PROP_CSC_LIMIT, &csc_limit_payload[0], + ARRAY_SIZE(csc_limit_payload) * sizeof(s32), + csc_limit_payload[0], csc_limit_payload[1]); if (rc) return rc; @@ -3299,7 +3264,7 @@ int msm_vidc_set_csc_custom_matrix(void *instance, } int msm_vidc_set_reserve_duration(void *instance, - enum msm_vidc_inst_capability_type cap_id) + enum msm_vidc_inst_capability_type cap_id) { int rc = 0; u32 hfi_value = 0; @@ -3329,7 +3294,7 @@ int msm_vidc_set_reserve_duration(void *instance, } int msm_vidc_set_level(void *instance, - enum msm_vidc_inst_capability_type cap_id) + enum msm_vidc_inst_capability_type cap_id) { int rc = 0; struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; @@ -3340,7 +3305,7 @@ int msm_vidc_set_level(void *instance, hfi_value = HFI_LEVEL_NONE; rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32_ENUM, - &hfi_value, sizeof(u32), __func__); + &hfi_value, sizeof(u32), __func__); if (rc) return rc; @@ -3348,7 +3313,7 @@ int msm_vidc_set_level(void *instance, } int msm_vidc_set_q16(void *instance, - enum msm_vidc_inst_capability_type cap_id) + enum msm_vidc_inst_capability_type cap_id) { int rc = 0; struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; @@ -3357,7 +3322,7 @@ int msm_vidc_set_q16(void *instance, hfi_value = inst->capabilities[cap_id].value; rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_Q16, - &hfi_value, sizeof(u32), __func__); + &hfi_value, sizeof(u32), __func__); if (rc) return rc; @@ -3365,7 +3330,7 @@ int msm_vidc_set_q16(void *instance, } int msm_vidc_set_u32(void *instance, - enum msm_vidc_inst_capability_type cap_id) + enum msm_vidc_inst_capability_type cap_id) { int rc = 0; struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; @@ -3380,7 +3345,7 @@ int msm_vidc_set_u32(void *instance, } rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32, - &hfi_value, sizeof(u32), __func__); + &hfi_value, sizeof(u32), __func__); if (rc) return rc; @@ -3388,7 +3353,7 @@ int msm_vidc_set_u32(void *instance, } int msm_vidc_set_u32_packed(void *instance, - enum msm_vidc_inst_capability_type cap_id) + enum msm_vidc_inst_capability_type cap_id) { int rc = 0; struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; @@ -3403,7 +3368,7 @@ int msm_vidc_set_u32_packed(void *instance, } rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_32_PACKED, - &hfi_value, sizeof(u32), __func__); + &hfi_value, sizeof(u32), __func__); if (rc) return rc; @@ -3411,7 +3376,7 @@ int msm_vidc_set_u32_packed(void *instance, } int msm_vidc_set_u32_enum(void *instance, - enum msm_vidc_inst_capability_type cap_id) + enum msm_vidc_inst_capability_type cap_id) { int rc = 0; struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; @@ -3422,7 +3387,7 @@ int msm_vidc_set_u32_enum(void *instance, return -EINVAL; rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32_ENUM, - &hfi_value, sizeof(u32), __func__); + &hfi_value, sizeof(u32), __func__); if (rc) return rc; @@ -3430,7 +3395,7 @@ int msm_vidc_set_u32_enum(void *instance, } int msm_vidc_set_s32(void *instance, - enum msm_vidc_inst_capability_type cap_id) + enum msm_vidc_inst_capability_type cap_id) { int rc = 0; struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; @@ -3439,7 +3404,7 @@ int msm_vidc_set_s32(void *instance, hfi_value = inst->capabilities[cap_id].value; rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_S32, - &hfi_value, sizeof(s32), __func__); + &hfi_value, sizeof(s32), __func__); if (rc) return rc; @@ -3447,7 +3412,7 @@ int msm_vidc_set_s32(void *instance, } int msm_vidc_set_stage(void *instance, - enum msm_vidc_inst_capability_type cap_id) + enum msm_vidc_inst_capability_type cap_id) { int rc = 0; u32 stage = 0; @@ -3465,7 +3430,7 @@ int msm_vidc_set_stage(void *instance, stage = inst->capabilities[STAGE].value; rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32, - &stage, sizeof(u32), __func__); + &stage, sizeof(u32), __func__); if (rc) return rc; @@ -3473,7 +3438,7 @@ int msm_vidc_set_stage(void *instance, } int msm_vidc_set_pipe(void *instance, - enum msm_vidc_inst_capability_type cap_id) + enum msm_vidc_inst_capability_type cap_id) { int rc = 0; u32 pipe; @@ -3491,7 +3456,7 @@ int msm_vidc_set_pipe(void *instance, pipe = inst->capabilities[PIPE].value; rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32, - &pipe, sizeof(u32), __func__); + &pipe, sizeof(u32), __func__); if (rc) return rc; @@ -3499,7 +3464,7 @@ int msm_vidc_set_pipe(void *instance, } int msm_vidc_set_vui_timing_info(void *instance, - enum msm_vidc_inst_capability_type cap_id) + enum msm_vidc_inst_capability_type cap_id) { int rc = 0; struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; @@ -3516,7 +3481,7 @@ int msm_vidc_set_vui_timing_info(void *instance, hfi_value = 1; rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32, - &hfi_value, sizeof(u32), __func__); + &hfi_value, sizeof(u32), __func__); if (rc) return rc; @@ -3524,20 +3489,20 @@ int msm_vidc_set_vui_timing_info(void *instance, } int msm_vidc_set_outbuf_fence_type(void *instance, - enum msm_vidc_inst_capability_type cap_id) + enum msm_vidc_inst_capability_type cap_id) { int rc = 0; struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; u32 hfi_value; if (inst->capabilities[OUTBUF_FENCE_TYPE].value == - MSM_VIDC_FENCE_NONE) + MSM_VIDC_FENCE_NONE) return 0; hfi_value = inst->capabilities[cap_id].value; rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32_ENUM, - &hfi_value, sizeof(u32), __func__); + &hfi_value, sizeof(u32), __func__); if (rc) return rc; @@ -3545,20 +3510,20 @@ int msm_vidc_set_outbuf_fence_type(void *instance, } int msm_vidc_set_outbuf_fence_direction(void *instance, - enum msm_vidc_inst_capability_type cap_id) + enum msm_vidc_inst_capability_type cap_id) { int rc = 0; struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; u32 hfi_value; if (inst->capabilities[OUTBUF_FENCE_DIRECTION].value == - MSM_VIDC_FENCE_DIR_NONE) + MSM_VIDC_FENCE_DIR_NONE) return 0; hfi_value = inst->capabilities[cap_id].value; rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_U32_ENUM, - &hfi_value, sizeof(u32), __func__); + &hfi_value, sizeof(u32), __func__); if (rc) return rc; diff --git a/driver/platform/common/src/msm_vidc_platform_ext.c b/driver/platform/common/src/msm_vidc_platform_ext.c index 3e14bb0b1a..82c9d07893 100644 --- a/driver/platform/common/src/msm_vidc_platform_ext.c +++ b/driver/platform/common/src/msm_vidc_platform_ext.c @@ -23,9 +23,9 @@ int msm_vidc_adjust_ir_period(void *instance, struct v4l2_ctrl *ctrl) adjusted_value = ctrl ? ctrl->val : inst->capabilities[IR_PERIOD].value; if (msm_vidc_get_parent_value(inst, IR_PERIOD, ALL_INTRA, - &all_intra, __func__) || + &all_intra, __func__) || msm_vidc_get_parent_value(inst, IR_PERIOD, META_ROI_INFO, - &roi_enable, __func__)) + &roi_enable, __func__)) return -EINVAL; if (all_intra) { @@ -45,7 +45,7 @@ int msm_vidc_adjust_ir_period(void *instance, struct v4l2_ctrl *ctrl) if (inst->codec == MSM_VIDC_HEVC) { if (msm_vidc_get_parent_value(inst, IR_PERIOD, - PIX_FMTS, &pix_fmts, __func__)) + PIX_FMTS, &pix_fmts, __func__)) return -EINVAL; if (is_10bit_colorformat(pix_fmts)) { @@ -62,13 +62,12 @@ int msm_vidc_adjust_ir_period(void *instance, struct v4l2_ctrl *ctrl) * Hence, do not return error if not specified as one of the parent. */ if (is_parent_available(inst, IR_PERIOD, BITRATE_MODE, __func__) && - inst->hfi_rc_type != HFI_RC_CBR_CFR && - inst->hfi_rc_type != HFI_RC_CBR_VFR) + inst->hfi_rc_type != HFI_RC_CBR_CFR && + inst->hfi_rc_type != HFI_RC_CBR_VFR) adjusted_value = 0; exit: - msm_vidc_update_cap_value(inst, IR_PERIOD, - adjusted_value, __func__); + msm_vidc_update_cap_value(inst, IR_PERIOD, adjusted_value, __func__); return 0; } @@ -114,25 +113,23 @@ int msm_vidc_adjust_delivery_mode(void *instance, struct v4l2_ctrl *ctrl) if (is_decode_session(inst)) return 0; - adjusted_value = ctrl ? ctrl->val : inst->capabilities[DELIVERY_MODE].value; if (msm_vidc_get_parent_value(inst, DELIVERY_MODE, SLICE_MODE, - &slice_mode, __func__)) + &slice_mode, __func__)) return -EINVAL; /* Slice encode delivery mode is only supported for Max MB slice mode */ if (slice_mode != V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_MB) adjusted_value = 0; - msm_vidc_update_cap_value(inst, DELIVERY_MODE, - adjusted_value, __func__); + msm_vidc_update_cap_value(inst, DELIVERY_MODE, adjusted_value, __func__); return 0; } int msm_vidc_set_ir_period(void *instance, - enum msm_vidc_inst_capability_type cap_id) + enum msm_vidc_inst_capability_type cap_id) { int rc = 0; struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; @@ -169,7 +166,7 @@ int msm_vidc_set_ir_period(void *instance, } int msm_vidc_set_signal_color_info(void *instance, - enum msm_vidc_inst_capability_type cap_id) + enum msm_vidc_inst_capability_type cap_id) { int rc = 0; struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; @@ -195,18 +192,18 @@ int msm_vidc_set_signal_color_info(void *instance, input_fmt = &inst->fmts[INPUT_PORT]; pix_fmt = v4l2_colorformat_to_driver(inst, - input_fmt->fmt.pix_mp.pixelformat, __func__); + input_fmt->fmt.pix_mp.pixelformat, __func__); if (primaries != V4L2_COLORSPACE_DEFAULT || matrix_coeff != V4L2_YCBCR_ENC_DEFAULT || transfer_char != V4L2_XFER_FUNC_DEFAULT) { colour_description_present_flag = 1; video_signal_type_present_flag = 1; primaries = v4l2_color_primaries_to_driver(inst, - primaries, __func__); + primaries, __func__); matrix_coeff = v4l2_matrix_coeff_to_driver(inst, - matrix_coeff, __func__); + matrix_coeff, __func__); transfer_char = v4l2_transfer_char_to_driver(inst, - transfer_char, __func__); + transfer_char, __func__); } else if (is_rgba_colorformat(pix_fmt)) { colour_description_present_flag = 1; video_signal_type_present_flag = 1; @@ -230,7 +227,7 @@ int msm_vidc_set_signal_color_info(void *instance, ((video_signal_type_present_flag << 29) & 0x20000000); rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_32_PACKED, - &hfi_value, sizeof(u32), __func__); + &hfi_value, sizeof(u32), __func__); if (rc) return rc; @@ -249,7 +246,7 @@ int msm_vidc_adjust_csc(void *instance, struct v4l2_ctrl *ctrl) adjusted_value = ctrl ? ctrl->val : inst->capabilities[CSC].value; if (msm_vidc_get_parent_value(inst, CSC, PIX_FMTS, - &pix_fmt, __func__)) + &pix_fmt, __func__)) return -EINVAL; /* disable csc for 10-bit encoding */ From 4812c1460efe97756d71e393c5abbe8481085287 Mon Sep 17 00:00:00 2001 From: Darshana Patil Date: Wed, 26 Jul 2023 16:34:48 -0700 Subject: [PATCH 0976/1061] video: driver: fix DPB buffer release In vp9 splitmode cases, there is a possibility fw reuses DPB buffers and hence does not return these buffers as part of STOP command during port reconfig. In this case, driver should not destroy these DPB buffers. Added a fix for the same. Issue observed with: 1A1622D8_Dec_VP9_Argon_EOS0. Change-Id: I81deded6a49290574ddda8d4f8efdfc0a9f733f3 Signed-off-by: Darshana Patil Signed-off-by: Maheshwar Ajja --- driver/vidc/src/msm_vdec.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 73753beb45..5ebeafc76f 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -796,6 +796,13 @@ static int msm_vdec_destroy_internal_buffers(struct msm_vidc_inst *inst, } list_for_each_entry_safe(buf, dummy, &buffers->list, list) { + /* + * do not destroy internal buffer (DPB buffer) if firmware + * did not return it, so skip if QUEUED flag is present + */ + if (buf->attr & MSM_VIDC_ATTR_QUEUED) + continue; + i_vpr_h(inst, "%s: destroying internal buffer: type %d idx %d fd %d addr %#llx size %d\n", __func__, buf->type, buf->index, buf->fd, From 13cfd900b7401d7d9080dcedec1d4bfb2081dc34 Mon Sep 17 00:00:00 2001 From: Megha Byahatti Date: Mon, 24 Jul 2023 11:54:34 +0530 Subject: [PATCH 0977/1061] video: driver: fix length of line exceeding max length warning Fix 'length of line exceeding 100 char' warning. Change-Id: Ic40bb53a85273eee79a37ead1937702b96f4e979 Signed-off-by: Megha Byahatti --- .../platform/kalama/inc/kalama_technology.h | 5 +++- .../pineapple/src/msm_vidc_pineapple.c | 10 +++---- driver/variant/iris3/inc/hfi_buffer_iris3.h | 9 ++++--- driver/variant/iris3/src/msm_vidc_bus_iris3.c | 26 +++++++++++------- .../variant/iris3/src/msm_vidc_clock_iris3.c | 18 ++++++++----- driver/variant/iris33/inc/hfi_buffer_iris33.h | 9 ++++--- .../variant/iris33/src/msm_vidc_bus_iris33.c | 27 ++++++++++++------- .../iris33/src/msm_vidc_clock_iris33.c | 17 ++++++++---- .../iris33/src/msm_vidc_power_iris33.c | 3 ++- driver/vidc/inc/msm_vidc_inst.h | 10 +++---- driver/vidc/src/msm_vidc_driver.c | 18 ++++++++----- driver/vidc/src/msm_vidc_state.c | 3 ++- driver/vidc/src/msm_vidc_vb2.c | 6 +++-- driver/vidc/src/resources.c | 3 ++- 14 files changed, 105 insertions(+), 59 deletions(-) diff --git a/driver/platform/kalama/inc/kalama_technology.h b/driver/platform/kalama/inc/kalama_technology.h index a43b7d3df8..c75fbb5e5b 100644 --- a/driver/platform/kalama/inc/kalama_technology.h +++ b/driver/platform/kalama/inc/kalama_technology.h @@ -76,7 +76,10 @@ static u32 bitrate_table_kalama_2stage_fp[5][10] = { {130, 130, 120, 120, 120, 120, 120, 120, 120, 120}, }; -/* HW limit bitrate table (these values are measured end to end fw/sw impacts are also considered) */ +/* + * HW limit bitrate table (these values are measured + * end to end fw/sw impacts are also considered) + */ static u32 bitrate_table_kalama_1stage_fp[5][10] = { /* 1-stage assume IPPP */ /* h264 cavlc */ {0, 220, 220, 220, 220, 220, 220, 220, 220, 220}, diff --git a/driver/platform/pineapple/src/msm_vidc_pineapple.c b/driver/platform/pineapple/src/msm_vidc_pineapple.c index 595d4c3dac..b1755b8a0c 100644 --- a/driver/platform/pineapple/src/msm_vidc_pineapple.c +++ b/driver/platform/pineapple/src/msm_vidc_pineapple.c @@ -2725,11 +2725,11 @@ static const struct subcache_table pineapple_subcache_table[] = { /* name, start, size, secure, dma_coherant, region, dma_mask */ const struct context_bank_table pineapple_context_bank_table[] = { - {"qcom,vidc,cb-ns", 0x25800000, 0xba800000, 0, 1, MSM_VIDC_NON_SECURE, 0 }, - {"qcom,vidc,cb-ns-pxl", 0x00100000, 0xdff00000, 0, 1, MSM_VIDC_NON_SECURE_PIXEL, 0 }, - {"qcom,vidc,cb-sec-pxl", 0x00500000, 0xdfb00000, 1, 0, MSM_VIDC_SECURE_PIXEL, 0 }, - {"qcom,vidc,cb-sec-non-pxl", 0x01000000, 0x24800000, 1, 0, MSM_VIDC_SECURE_NONPIXEL, 0 }, - {"qcom,vidc,cb-sec-bitstream", 0x00500000, 0xdfb00000, 1, 0, MSM_VIDC_SECURE_BITSTREAM, 0 }, + {"qcom,vidc,cb-ns", 0x25800000, 0xba800000, 0, 1, MSM_VIDC_NON_SECURE, 0}, + {"qcom,vidc,cb-ns-pxl", 0x00100000, 0xdff00000, 0, 1, MSM_VIDC_NON_SECURE_PIXEL, 0}, + {"qcom,vidc,cb-sec-pxl", 0x00500000, 0xdfb00000, 1, 0, MSM_VIDC_SECURE_PIXEL, 0}, + {"qcom,vidc,cb-sec-non-pxl", 0x01000000, 0x24800000, 1, 0, MSM_VIDC_SECURE_NONPIXEL, 0}, + {"qcom,vidc,cb-sec-bitstream", 0x00500000, 0xdfb00000, 1, 0, MSM_VIDC_SECURE_BITSTREAM, 0}, }; /* freq */ diff --git a/driver/variant/iris3/inc/hfi_buffer_iris3.h b/driver/variant/iris3/inc/hfi_buffer_iris3.h index 2dce34a900..2aa5068fab 100644 --- a/driver/variant/iris3/inc/hfi_buffer_iris3.h +++ b/driver/variant/iris3/inc/hfi_buffer_iris3.h @@ -1203,14 +1203,17 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ frame_width_coded, codec_standard); \ mbs_in_one_tile = (tile_size * frame_height_coded) / (lcu_size * lcu_size); \ slice_count_per_tile = \ - (mbs_in_one_tile + multi_slice_max_mb_count - 1) / (multi_slice_max_mb_count); \ + (mbs_in_one_tile + multi_slice_max_mb_count - 1) / \ + (multi_slice_max_mb_count); \ if (last_tile_size) { \ mbs_in_last_tile = \ (last_tile_size * frame_height_coded) / (lcu_size * lcu_size); \ slice_count_in_last_tile = \ - (mbs_in_last_tile + multi_slice_max_mb_count - 1) / (multi_slice_max_mb_count); \ + (mbs_in_last_tile + multi_slice_max_mb_count - 1) / \ + (multi_slice_max_mb_count); \ total_slice_count = \ - (slice_count_per_tile * (tile_count - 1)) + slice_count_in_last_tile; \ + (slice_count_per_tile * (tile_count - 1)) + \ + slice_count_in_last_tile; \ } else { \ total_slice_count = (slice_count_per_tile * tile_count); \ } \ diff --git a/driver/variant/iris3/src/msm_vidc_bus_iris3.c b/driver/variant/iris3/src/msm_vidc_bus_iris3.c index 26d13baf9e..ac7826c2b4 100644 --- a/driver/variant/iris3/src/msm_vidc_bus_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_bus_iris3.c @@ -97,14 +97,18 @@ u32 get_compression_factors(struct compression_factors *compression_factor, */ if (frame_width < 3840) { compression_factor->ipb_cr = - ipblossless_ubwc30_cr_table_cratio_kalama[cr_index_entry][cr_index_uni]; + ipblossless_ubwc30_cr_table_cratio_kalama[cr_index_entry] + [cr_index_uni]; compression_factor->ipb_cr_y = - ipblossless_ubwc30_cr_table_cratio_kalama[cr_index_entry][cr_index_y]; + ipblossless_ubwc30_cr_table_cratio_kalama[cr_index_entry] + [cr_index_y]; } else { compression_factor->ipb_cr = - ipblossy_ubwc30_cr_table_cratio_kalama[cr_index_entry][cr_index_uni]; + ipblossy_ubwc30_cr_table_cratio_kalama[cr_index_entry] + [cr_index_uni]; compression_factor->ipb_cr_y = - ipblossy_ubwc30_cr_table_cratio_kalama[cr_index_entry][cr_index_y]; + ipblossy_ubwc30_cr_table_cratio_kalama[cr_index_entry] + [cr_index_y]; } compression_factor->dpb_cf_y = @@ -764,12 +768,13 @@ static int calculate_bandwidth_encoder_iris3( /* * Summary: * by default (for both HFR and HSR cases) : - * -Any resolution and fps >= 120, enable layering. + * -Any resolution and fps >= 120, enable layering. * (120 -> 3, 240 -> 4, 480 -> 5) - * - (once we enable layering) : 50 per cent frames are Non - reference + * - (once we enable layering) : 50 per cent frames are Non - reference * frames.recon write is disable by Venus firmware * - Customer has ability to enable / disable layering. - * Hence, recon write savings would not be there if customer explicitly disables layer encoding. + * Hence, recon write savings would not be there if + * customer explicitly disables layer encoding. */ /*HFR Cases use alternating rec write if not PWC*/ @@ -822,8 +827,8 @@ static int calculate_bandwidth_encoder_iris3( codec_output->ipb_rd_total_noc = large_bw_calculation_fp; if (codec_input.linear_ipb == 0) { codec_output->ipb_rd_total_noc = - (large_bw_calculation_fp * 100 + ipb_compression_factor - 1) / - ipb_compression_factor; + (large_bw_calculation_fp * 100 + + ipb_compression_factor - 1) / ipb_compression_factor; } } else { /* rgb */ large_bw_calculation_fp = frame420_y_bw_linear_8bpp; @@ -832,7 +837,8 @@ static int calculate_bandwidth_encoder_iris3( if (codec_input.complexity_setting == 0) /* pwc */ codec_output->ipb_rd_total_noc = (large_bw_calculation_fp * 100 + - en_original_compression_factor_rgba_pwd_kalama - 1) / + en_original_compression_factor_rgba_pwd_kalama + - 1) / en_original_compression_factor_rgba_pwd_kalama; else codec_output->ipb_rd_total_noc = diff --git a/driver/variant/iris3/src/msm_vidc_clock_iris3.c b/driver/variant/iris3/src/msm_vidc_clock_iris3.c index 51042e5991..6c187a5967 100644 --- a/driver/variant/iris3/src/msm_vidc_clock_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_clock_iris3.c @@ -211,7 +211,8 @@ static int calculate_vsp_min_freq(struct api_calculation_input codec_input, * * 8KUHD60fps with B frame * - bitrate_entry = 0 - * - Clock=NOMINAL for H264 & 2Stage H265. Because bitrate table entry for TURBO is 0. + * - Clock=NOMINAL for H264 & 2Stage H265. Because bitrate + * table entry for TURBO is 0. * * TODO : Reduce these conditions by removing the zero entries from Bitrate table. */ @@ -234,10 +235,12 @@ static int calculate_vsp_min_freq(struct api_calculation_input codec_input, || (codec_input.codec == CODEC_AV1)) { if (codec_input.vsp_vpp_mode == CODEC_VSPVPP_MODE_2S) { vsp_hw_min_frequency = DIV_ROUND_UP(vsp_hw_min_frequency, - (bitrate_table_kalama_2stage_fp[codec][0] * fw_sw_vsp_offset)); + (bitrate_table_kalama_2stage_fp[codec][0] * + fw_sw_vsp_offset)); } else { vsp_hw_min_frequency = DIV_ROUND_UP(vsp_hw_min_frequency, - (bitrate_table_kalama_1stage_fp[codec][0] * fw_sw_vsp_offset)); + (bitrate_table_kalama_1stage_fp[codec][0] * + fw_sw_vsp_offset)); } } } else { @@ -290,7 +293,8 @@ static u32 calculate_pipe_penalty(struct api_calculation_input codec_input) pipe_penalty_kalama[avid_commercial_content + 1][1]) / 2; else if ((pixel_count == 3840 * 2160) || (pixel_count == 4096 * 2160) || (pixel_count == 4096 * 2304)) - pipe_penalty_codec = pipe_penalty_kalama[avid_commercial_content + 1][1]; + pipe_penalty_codec = + pipe_penalty_kalama[avid_commercial_content + 1][1]; else if (pixel_count < 7680 * 4320) pipe_penalty_codec = (pipe_penalty_kalama[avid_commercial_content + 1][1] + @@ -360,7 +364,8 @@ static int calculate_vpp_min_freq(struct api_calculation_input codec_input, 1050 : decoder_vpp_fw_overhead; /* VPP HW + FW */ - if (codec_input.linear_opb == 1 && codec_input.bitdepth == CODEC_BITDEPTH_10) + if (codec_input.linear_opb == 1 && + codec_input.bitdepth == CODEC_BITDEPTH_10) /* multiply by 1.20 for 10b case */ decoder_vpp_fw_overhead = 1200 + decoder_vpp_fw_overhead - 1000; @@ -375,7 +380,8 @@ static int calculate_vpp_min_freq(struct api_calculation_input codec_input, vpp_hw_min_frequency : vsp_hw_min_frequency; } else { /* 1-stage need SW cycles + FW cycles + HW time */ - if (codec_input.linear_opb == 1 && codec_input.bitdepth == CODEC_BITDEPTH_10) + if (codec_input.linear_opb == 1 && + codec_input.bitdepth == CODEC_BITDEPTH_10) /* multiply by 1.20 for 10b linear case */ vpp_hw_min_frequency = (vpp_hw_min_frequency * 1200 + 999) / 1000; diff --git a/driver/variant/iris33/inc/hfi_buffer_iris33.h b/driver/variant/iris33/inc/hfi_buffer_iris33.h index 57784fb70c..6c13410961 100644 --- a/driver/variant/iris33/inc/hfi_buffer_iris33.h +++ b/driver/variant/iris33/inc/hfi_buffer_iris33.h @@ -1203,14 +1203,17 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ frame_width_coded, codec_standard); \ mbs_in_one_tile = (tile_size * frame_height_coded) / (lcu_size * lcu_size); \ slice_count_per_tile = \ - (mbs_in_one_tile + multi_slice_max_mb_count - 1) / (multi_slice_max_mb_count); \ + (mbs_in_one_tile + multi_slice_max_mb_count - 1) / \ + (multi_slice_max_mb_count); \ if (last_tile_size) { \ mbs_in_last_tile = \ (last_tile_size * frame_height_coded) / (lcu_size * lcu_size); \ slice_count_in_last_tile = \ - (mbs_in_last_tile + multi_slice_max_mb_count - 1) / (multi_slice_max_mb_count); \ + (mbs_in_last_tile + multi_slice_max_mb_count - 1) / \ + (multi_slice_max_mb_count); \ total_slice_count = \ - (slice_count_per_tile * (tile_count - 1)) + slice_count_in_last_tile; \ + (slice_count_per_tile * (tile_count - 1)) + \ + slice_count_in_last_tile; \ } else { \ total_slice_count = (slice_count_per_tile * tile_count); \ } \ diff --git a/driver/variant/iris33/src/msm_vidc_bus_iris33.c b/driver/variant/iris33/src/msm_vidc_bus_iris33.c index 52e2a7091a..04036fb4ef 100644 --- a/driver/variant/iris33/src/msm_vidc_bus_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_bus_iris33.c @@ -177,14 +177,18 @@ u32 get_compression_factors(struct compression_factors *compression_factor, */ if (frame_width < 3840) { compression_factor->ipb_cr = - ipblossless_ubwc30_cr_table_cratio_iris33[cr_index_entry][cr_index_uni]; + ipblossless_ubwc30_cr_table_cratio_iris33[cr_index_entry] + [cr_index_uni]; compression_factor->ipb_cr_y = - ipblossless_ubwc30_cr_table_cratio_iris33[cr_index_entry][cr_index_y]; + ipblossless_ubwc30_cr_table_cratio_iris33[cr_index_entry] + [cr_index_y]; } else { compression_factor->ipb_cr = - ipblossy_ubwc30_cr_table_cratio_iris33[cr_index_entry][cr_index_uni]; + ipblossy_ubwc30_cr_table_cratio_iris33[cr_index_entry] + [cr_index_uni]; compression_factor->ipb_cr_y = - ipblossy_ubwc30_cr_table_cratio_iris33[cr_index_entry][cr_index_y]; + ipblossy_ubwc30_cr_table_cratio_iris33[cr_index_entry] + [cr_index_y]; } compression_factor->dpb_cf_y = @@ -854,12 +858,13 @@ static int calculate_bandwidth_encoder_iris33( /* * Summary: * by default (for both HFR and HSR cases) : - * -Any resolution and fps >= 120, enable layering. + * -Any resolution and fps >= 120, enable layering. * (120 -> 3, 240 -> 4, 480 -> 5) - * - (once we enable layering) : 50 per cent frames are Non - reference + * - (once we enable layering) : 50 per cent frames are Non - reference * frames.recon write is disable by Venus firmware - * - Customer has ability to enable / disable layering. - * Hence, recon write savings would not be there if customer explicitly disables layer encoding. + * - Customer has ability to enable / disable layering. + * Hence, recon write savings would not be there if + * customer explicitly disables layer encoding. */ /*HFR Cases use alternating rec write if not PWC*/ @@ -924,7 +929,8 @@ static int calculate_bandwidth_encoder_iris33( codec_output->ipb_rd_total_noc = large_bw_calculation_fp; if (codec_input.linear_ipb == 0) { codec_output->ipb_rd_total_noc = - (large_bw_calculation_fp * 100 + ipb_compression_factor - 1) / + (large_bw_calculation_fp * 100 + + ipb_compression_factor - 1) / ipb_compression_factor; } } else { /* rgb */ @@ -934,7 +940,8 @@ static int calculate_bandwidth_encoder_iris33( if (codec_input.complexity_setting == 0) /* pwc */ codec_output->ipb_rd_total_noc = (large_bw_calculation_fp * 100 + - en_original_compression_factor_rgba_pwd_iris33 - 1) / + en_original_compression_factor_rgba_pwd_iris33 + - 1) / en_original_compression_factor_rgba_pwd_iris33; else codec_output->ipb_rd_total_noc = diff --git a/driver/variant/iris33/src/msm_vidc_clock_iris33.c b/driver/variant/iris33/src/msm_vidc_clock_iris33.c index 41107ba87d..02ed8d8864 100644 --- a/driver/variant/iris33/src/msm_vidc_clock_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_clock_iris33.c @@ -85,7 +85,10 @@ static u32 bitrate_table_iris33_2stage_fp[5][10] = { {130, 130, 120, 120, 120, 120, 120, 120, 120, 120}, }; -/* HW limit bitrate table (these values are measured end to end fw/sw impacts are also considered) */ +/* + * HW limit bitrate table (these values are measured + * end to end fw/sw impacts are also considered) + */ static u32 bitrate_table_iris33_1stage_fp[5][10] = { /* 1-stage assume IPPP */ /* h264 cavlc */ {0, 220, 220, 220, 220, 220, 220, 220, 220, 220}, @@ -324,7 +327,8 @@ static int calculate_vsp_min_freq(struct api_calculation_input codec_input, * * 8KUHD60fps with B frame * - bitrate_entry = 0 - * - Clock=NOMINAL for H264 & 2Stage H265. Because bitrate table entry for TURBO is 0. + * - Clock=NOMINAL for H264 & 2Stage H265. Because bitrate + * table entry for TURBO is 0. * * TODO : Reduce these conditions by removing the zero entries from Bitrate table. */ @@ -409,7 +413,8 @@ static u32 calculate_pipe_penalty(struct api_calculation_input codec_input) pipe_penalty_iris33[avid_commercial_content + 1][1]) / 2; else if ((pixel_count == 3840 * 2160) || (pixel_count == 4096 * 2160) || (pixel_count == 4096 * 2304)) - pipe_penalty_codec = pipe_penalty_iris33[avid_commercial_content + 1][1]; + pipe_penalty_codec = + pipe_penalty_iris33[avid_commercial_content + 1][1]; else if (pixel_count < 7680 * 4320) pipe_penalty_codec = (pipe_penalty_iris33[avid_commercial_content + 1][1] + @@ -485,7 +490,8 @@ static int calculate_vpp_min_freq(struct api_calculation_input codec_input, 1050 : decoder_vpp_fw_overhead; /* VPP HW + FW */ - if (codec_input.linear_opb == 1 && codec_input.bitdepth == CODEC_BITDEPTH_10) + if (codec_input.linear_opb == 1 && + codec_input.bitdepth == CODEC_BITDEPTH_10) /* multiply by 1.20 for 10b case */ decoder_vpp_fw_overhead = 1200 + decoder_vpp_fw_overhead - 1000; @@ -500,7 +506,8 @@ static int calculate_vpp_min_freq(struct api_calculation_input codec_input, vpp_hw_min_frequency : vsp_hw_min_frequency; } else { /* 1-stage need SW cycles + FW cycles + HW time */ - if (codec_input.linear_opb == 1 && codec_input.bitdepth == CODEC_BITDEPTH_10) + if (codec_input.linear_opb == 1 && + codec_input.bitdepth == CODEC_BITDEPTH_10) /* multiply by 1.20 for 10b linear case */ vpp_hw_min_frequency = (vpp_hw_min_frequency * 1200 + 999) / 1000; diff --git a/driver/variant/iris33/src/msm_vidc_power_iris33.c b/driver/variant/iris33/src/msm_vidc_power_iris33.c index b0f267f28b..0cbf48a4b3 100644 --- a/driver/variant/iris33/src/msm_vidc_power_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_power_iris33.c @@ -732,7 +732,8 @@ u64 msm_vidc_calc_freq_iris33_legacy(struct msm_vidc_inst *inst, u32 data_size) freq = max(vpp_cycles, vsp_cycles); freq = max(freq, fw_cycles); - i_vpr_p(inst, "%s: filled len %d, required freq %llu, vpp %llu, vsp %llu, fw_cycles %llu, fps %u, mbpf %u\n", + i_vpr_p(inst, + "%s: filled len %d, required freq %llu, vpp %llu, vsp %llu, fw_cycles %llu, fps %u, mbpf %u\n", __func__, data_size, freq, vpp_cycles, vsp_cycles, fw_cycles, fps, mbpf); diff --git a/driver/vidc/inc/msm_vidc_inst.h b/driver/vidc/inc/msm_vidc_inst.h index 2bea07ca19..4fc6e0d4a7 100644 --- a/driver/vidc/inc/msm_vidc_inst.h +++ b/driver/vidc/inc/msm_vidc_inst.h @@ -100,7 +100,7 @@ struct msm_vidc_inst { struct msm_vidc_buffers_info buffers; struct msm_vidc_mem_list_info mem_info; struct msm_vidc_timestamps timestamps; - struct msm_vidc_timestamps ts_reorder; /* list of struct msm_vidc_timestamp */ + struct msm_vidc_timestamps ts_reorder; /* struct msm_vidc_timestamp */ struct msm_vidc_subscription_params subcr_params[MAX_PORT]; struct msm_vidc_hfi_frame_info hfi_frame_info; struct msm_vidc_decode_batch decode_batch; @@ -111,13 +111,13 @@ struct msm_vidc_inst { struct msm_vidc_stability stability; struct workqueue_struct *workq; struct list_head enc_input_crs; - struct list_head dmabuf_tracker; /* list of struct msm_memory_dmabuf */ - struct list_head input_timer_list; /* list of struct msm_vidc_input_timer */ + struct list_head dmabuf_tracker; /* struct msm_memory_dmabuf */ + struct list_head input_timer_list; /* struct msm_vidc_input_timer */ struct list_head caps_list; struct list_head children_list; /* struct msm_vidc_inst_cap_entry */ struct list_head firmware_list; /* struct msm_vidc_inst_cap_entry */ - struct list_head pending_pkts; /* list of struct hfi_pending_packet */ - struct list_head fence_list; /* list of struct msm_vidc_fence */ + struct list_head pending_pkts; /* struct hfi_pending_packet */ + struct list_head fence_list; /* struct msm_vidc_fence */ struct list_head buffer_stats_list; /* struct msm_vidc_buffer_stats */ bool once_per_session_set; bool ipsc_properties_set; diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 672c686771..e4c4e41585 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -3920,7 +3920,8 @@ int msm_vidc_print_buffer_info(struct msm_vidc_inst *inst) if (!buffers) continue; - i_vpr_h(inst, "buf: type: %15s, min %2d, extra %2d, actual %2d, size %9u, reuse %d\n", + i_vpr_h(inst, + "buf: type: %15s, min %2d, extra %2d, actual %2d, size %9u, reuse %d\n", buf_name(i), buffers->min_count, buffers->extra_count, buffers->actual_count, buffers->size, buffers->reuse); @@ -4263,9 +4264,11 @@ int msm_vidc_flush_buffers(struct msm_vidc_inst *inst, buf->attr & MSM_VIDC_ATTR_DEFERRED) { print_vidc_buffer(VIDC_HIGH, "high", "flushing buffer", inst, buf); if (!(buf->attr & MSM_VIDC_ATTR_BUFFER_DONE)) { - if (is_decode_session(inst) && is_output_buffer(buf->type)) { + if (is_decode_session(inst) && + is_output_buffer(buf->type)) { if (buf->dbuf_get) { - call_mem_op(core, dma_buf_put, inst, buf->dmabuf); + call_mem_op(core, dma_buf_put, + inst, buf->dmabuf); buf->dbuf_get = 0; } } @@ -4391,7 +4394,8 @@ void msm_vidc_destroy_buffers(struct msm_vidc_inst *inst) if (buf->attach && buf->dmabuf) call_mem_op(core, dma_buf_detach, core, buf->dmabuf, buf->attach); if (buf->dbuf_get) { - print_vidc_buffer(VIDC_ERR, "err ", "destroying: put dmabuf", inst, buf); + print_vidc_buffer(VIDC_ERR, "err ", "destroying: put dmabuf", + inst, buf); call_mem_op(core, dma_buf_put, inst, buf->dmabuf); } list_del_init(&buf->list); @@ -5244,10 +5248,12 @@ static int msm_vidc_check_max_sessions(struct msm_vidc_inst *inst) num_8k_sessions += 1; num_4k_sessions += 2; num_1080p_sessions += 4; - } else if (res_is_greater_than(width, height, 1920 + (1920 >> 1), 1088 + (1088 >> 1))) { + } else if (res_is_greater_than(width, height, 1920 + (1920 >> 1), + 1088 + (1088 >> 1))) { num_4k_sessions += 1; num_1080p_sessions += 2; - } else if (res_is_greater_than(width, height, 1280 + (1280 >> 1), 736 + (736 >> 1))) { + } else if (res_is_greater_than(width, height, 1280 + (1280 >> 1), + 736 + (736 >> 1))) { num_1080p_sessions += 1; } } diff --git a/driver/vidc/src/msm_vidc_state.c b/driver/vidc/src/msm_vidc_state.c index 7f23c22963..273c7c70d5 100644 --- a/driver/vidc/src/msm_vidc_state.c +++ b/driver/vidc/src/msm_vidc_state.c @@ -808,7 +808,8 @@ static int msm_vidc_input_streaming_state(struct msm_vidc_inst *inst, /* check dynamic allowed if master port is streaming */ if (!(inst->capabilities[cap_id].flags & CAP_FLAG_DYNAMIC_ALLOWED)) { i_vpr_e(inst, "%s: cap_id %#x (%s) not allowed in state %s\n", - __func__, cap_id, cap_name(cap_id), state_name(inst->state)); + __func__, cap_id, cap_name(cap_id), + state_name(inst->state)); return -EINVAL; } } diff --git a/driver/vidc/src/msm_vidc_vb2.c b/driver/vidc/src/msm_vidc_vb2.c index 041919137e..8b02303a6d 100644 --- a/driver/vidc/src/msm_vidc_vb2.c +++ b/driver/vidc/src/msm_vidc_vb2.c @@ -133,7 +133,8 @@ void msm_vb2_detach_dmabuf(void *buf_priv) if (is_decode_session(inst) && is_output_buffer(vbuf->type)) { list_for_each_entry_safe(ro_buf, dummy, &inst->buffers.read_only.list, list) { if (ro_buf->dmabuf == vbuf->dmabuf) { - print_vidc_buffer(VIDC_LOW, "low ", "detach: found ro buf", inst, ro_buf); + print_vidc_buffer(VIDC_LOW, "low ", "detach: found ro buf", + inst, ro_buf); ro_buf->attach = vbuf->attach; vbuf->attach = NULL; goto exit; @@ -210,7 +211,8 @@ void msm_vb2_unmap_dmabuf(void *buf_priv) if (is_decode_session(inst) && is_output_buffer(vbuf->type)) { list_for_each_entry_safe(ro_buf, dummy, &inst->buffers.read_only.list, list) { if (ro_buf->dmabuf == vbuf->dmabuf) { - print_vidc_buffer(VIDC_LOW, "low ", "unmap: found ro buf", inst, ro_buf); + print_vidc_buffer(VIDC_LOW, "low ", "unmap: found ro buf", + inst, ro_buf); ro_buf->sg_table = vbuf->sg_table; ro_buf->attach = vbuf->attach; vbuf->sg_table = NULL; diff --git a/driver/vidc/src/resources.c b/driver/vidc/src/resources.c index d6cd179883..dd581b76fb 100644 --- a/driver/vidc/src/resources.c +++ b/driver/vidc/src/resources.c @@ -1224,7 +1224,8 @@ static int __update_residency_stats(struct msm_vidc_core *core, prev_residency = get_residency_stats(cl, cl->prev); if (prev_residency) { if (prev_residency->start_time_us) - prev_residency->total_time_us += cur_time_us - prev_residency->start_time_us; + prev_residency->total_time_us += cur_time_us - + prev_residency->start_time_us; /* reset start time us */ prev_residency->start_time_us = 0; From 99c2355e85dfb7823f0aff50f1d6490d7f9d7ade Mon Sep 17 00:00:00 2001 From: Ankush Mitra Date: Thu, 27 Jul 2023 17:23:23 +0530 Subject: [PATCH 0978/1061] video: driver: remove dead code of uneccessary setting VPP delay In driver num_comv value is coming more than expected due to assumtion of default VPP delay as 2, which is not needed now. Change-Id: Ie24b5b30034cbc465aaa5952d80b6c0811cfe1a2 Signed-off-by: Ankush Mitra --- driver/variant/iris3/src/msm_vidc_buffer_iris3.c | 15 ++++++++++----- .../variant/iris33/src/msm_vidc_buffer_iris33.c | 15 ++++++++++----- 2 files changed, 20 insertions(+), 10 deletions(-) diff --git a/driver/variant/iris3/src/msm_vidc_buffer_iris3.c b/driver/variant/iris3/src/msm_vidc_buffer_iris3.c index be045c692d..14f4589799 100644 --- a/driver/variant/iris3/src/msm_vidc_buffer_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_buffer_iris3.c @@ -82,12 +82,17 @@ static u32 msm_vidc_decoder_comv_size_iris3(struct msm_vidc_inst *inst) } msm_vidc_update_cap_value(inst, NUM_COMV, num_comv, __func__); - if (inst->decode_vpp_delay.enable) - vpp_delay = inst->decode_vpp_delay.size; - else - vpp_delay = DEFAULT_BSE_VPP_DELAY; - num_comv = max(vpp_delay + 1, num_comv); + if (inst->codec == MSM_VIDC_HEIC + && is_thumbnail_session(inst)) { + vpp_delay = 0; + } else { + if (inst->decode_vpp_delay.enable) + vpp_delay = inst->decode_vpp_delay.size; + else + vpp_delay = DEFAULT_BSE_VPP_DELAY; + } + num_comv = max(vpp_delay + 1, num_comv); if (inst->codec == MSM_VIDC_H264) { HFI_BUFFER_COMV_H264D(size, width, height, num_comv); } else if (inst->codec == MSM_VIDC_HEVC || inst->codec == MSM_VIDC_HEIC) { diff --git a/driver/variant/iris33/src/msm_vidc_buffer_iris33.c b/driver/variant/iris33/src/msm_vidc_buffer_iris33.c index 542ff1c092..a5a8e600ba 100644 --- a/driver/variant/iris33/src/msm_vidc_buffer_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_buffer_iris33.c @@ -84,12 +84,17 @@ static u32 msm_vidc_decoder_comv_size_iris33(struct msm_vidc_inst *inst) } msm_vidc_update_cap_value(inst, NUM_COMV, num_comv, __func__); - if (inst->decode_vpp_delay.enable) - vpp_delay = inst->decode_vpp_delay.size; - else - vpp_delay = DEFAULT_BSE_VPP_DELAY; - num_comv = max(vpp_delay + 1, num_comv); + if (inst->codec == MSM_VIDC_HEIC + && is_thumbnail_session(inst)) { + vpp_delay = 0; + } else { + if (inst->decode_vpp_delay.enable) + vpp_delay = inst->decode_vpp_delay.size; + else + vpp_delay = DEFAULT_BSE_VPP_DELAY; + } + num_comv = max(vpp_delay + 1, num_comv); if (inst->codec == MSM_VIDC_H264) { HFI_BUFFER_COMV_H264D(size, width, height, num_comv); } else if (inst->codec == MSM_VIDC_HEVC || inst->codec == MSM_VIDC_HEIC) { From 21496a9ef24273e312327b7ded854710585ec272 Mon Sep 17 00:00:00 2001 From: Vedang Nagar Date: Thu, 3 Aug 2023 22:58:54 +0530 Subject: [PATCH 0979/1061] Video: Driver: Add support for Cliffs [1] Add the basic driver support for cliffs variant. [2] Add platform specific files for cliffs. Change-Id: If35f79fa1c72ce160d4ed4c0f1ba8babb7ce8a3d Signed-off-by: Vedang Nagar --- BUILD.bazel | 10 +- driver/platform/cliffs/inc/msm_vidc_cliffs.h | 27 + driver/platform/cliffs/src/cliffs.c | 1766 ++++++ driver/platform/cliffs/src/msm_vidc_cliffs.c | 5365 +++++++++++++++++ .../platform/common/inc/msm_vidc_platform.h | 1 + .../platform/common/src/msm_vidc_platform.c | 49 + driver/vidc/src/msm_vidc_probe.c | 6 +- msm_video/Kbuild | 2 + video_modules.bzl | 2 + 9 files changed, 7225 insertions(+), 3 deletions(-) create mode 100644 driver/platform/cliffs/inc/msm_vidc_cliffs.h create mode 100644 driver/platform/cliffs/src/cliffs.c create mode 100644 driver/platform/cliffs/src/msm_vidc_cliffs.c diff --git a/BUILD.bazel b/BUILD.bazel index 36d6bc88d4..a6898c7af4 100644 --- a/BUILD.bazel +++ b/BUILD.bazel @@ -21,6 +21,14 @@ ddk_headers( includes = ["driver/platform/pineapple/inc"] ) +ddk_headers( + name = "cliffs_headers", + hdrs = glob([ + "driver/platform/cliffs/inc/*.h", + ]), + includes = ["driver/platform/cliffs/inc"] +) + ddk_headers( name = "iris33_headers", hdrs = glob([ @@ -42,7 +50,7 @@ ddk_headers( ddk_headers( name = "video_driver_headers", # hdrs = [":pineapple_configs", "uapi_headers", "pineapple_headers", "iris33_headers", "vidc_headers"] - hdrs = [":uapi_headers", "pineapple_headers", "iris33_headers", "vidc_headers"] + hdrs = [":uapi_headers", "pineapple_headers", "cliffs_headers", "iris33_headers", "vidc_headers"] ) load(":target.bzl", "define_pineapple") diff --git a/driver/platform/cliffs/inc/msm_vidc_cliffs.h b/driver/platform/cliffs/inc/msm_vidc_cliffs.h new file mode 100644 index 0000000000..7d4a8dde09 --- /dev/null +++ b/driver/platform/cliffs/inc/msm_vidc_cliffs.h @@ -0,0 +1,27 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) 2020-2022, The Linux Foundation. All rights reserved. + * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#ifndef _MSM_VIDC_CLIFFS_H_ +#define _MSM_VIDC_CLIFFS_H_ + +#include "msm_vidc_core.h" + +#if defined(CONFIG_MSM_VIDC_PINEAPPLE) +int msm_vidc_init_platform_cliffs(struct msm_vidc_core *core); +int msm_vidc_deinit_platform_cliffs(struct msm_vidc_core *core); +#else +int msm_vidc_init_platform_cliffs(struct msm_vidc_core *core) +{ + return -EINVAL; +} + +int msm_vidc_deinit_platform_cliffs(struct msm_vidc_core *core) +{ + return -EINVAL; +} +#endif + +#endif // _MSM_VIDC_CLIFFS_H_ diff --git a/driver/platform/cliffs/src/cliffs.c b/driver/platform/cliffs/src/cliffs.c new file mode 100644 index 0000000000..2cbe263a1e --- /dev/null +++ b/driver/platform/cliffs/src/cliffs.c @@ -0,0 +1,1766 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include + +#include "msm_vidc_control.h" +#include "msm_vidc_cliffs.h" +#include "msm_vidc_platform.h" +#include "msm_vidc_debug.h" +#include "msm_vidc_iris33.h" +#include "hfi_property.h" +#include "hfi_command.h" +#include "venus_hfi.h" + +#define DEFAULT_VIDEO_CONCEAL_COLOR_BLACK 0x8020010 +#define MAX_BASE_LAYER_PRIORITY_ID 63 +#define MAX_OP_POINT 31 +#define MAX_BITRATE 245000000 +#define DEFAULT_BITRATE 20000000 +#define MINIMUM_FPS 1 +#define MAXIMUM_FPS 480 +#define MAX_QP 51 +#define DEFAULT_QP 20 +#define MAX_CONSTANT_QUALITY 100 +#define MIN_SLICE_BYTE_SIZE 512 +#define MAX_SLICE_BYTE_SIZE \ + ((MAX_BITRATE) >> 3) +#define MAX_SLICE_MB_SIZE \ + (((4096 + 15) >> 4) * ((2304 + 15) >> 4)) + +#define ENC MSM_VIDC_ENCODER +#define DEC MSM_VIDC_DECODER +#define H264 MSM_VIDC_H264 +#define HEVC MSM_VIDC_HEVC +#define VP9 MSM_VIDC_VP9 +#define CODECS_ALL (H264 | HEVC | VP9) +#define MAXIMUM_OVERRIDE_VP9_FPS 180 + +#ifndef V4L2_PIX_FMT_QC08C +#define V4L2_PIX_FMT_QC08C v4l2_fourcc('Q', '0', '8', 'C') +#endif + +#ifndef V4L2_PIX_FMT_QC10C +#define V4L2_PIX_FMT_QC10C v4l2_fourcc('Q', '1', '0', 'C') +#endif + +static struct codec_info codec_data_cliffs[] = { + { + .v4l2_codec = V4L2_PIX_FMT_H264, + .vidc_codec = MSM_VIDC_H264, + .pixfmt_name = "AVC", + }, + { + .v4l2_codec = V4L2_PIX_FMT_HEVC, + .vidc_codec = MSM_VIDC_HEVC, + .pixfmt_name = "HEVC", + }, + { + .v4l2_codec = V4L2_PIX_FMT_VP9, + .vidc_codec = MSM_VIDC_VP9, + .pixfmt_name = "VP9", + }, +}; + +static struct color_format_info color_format_data_cliffs[] = { + { + .v4l2_color_format = V4L2_PIX_FMT_NV12, + .vidc_color_format = MSM_VIDC_FMT_NV12, + .pixfmt_name = "NV12", + }, + { + .v4l2_color_format = V4L2_PIX_FMT_NV21, + .vidc_color_format = MSM_VIDC_FMT_NV21, + .pixfmt_name = "NV21", + }, + { + .v4l2_color_format = V4L2_PIX_FMT_QC08C, + .vidc_color_format = MSM_VIDC_FMT_NV12C, + .pixfmt_name = "NV12C", + }, + { + .v4l2_color_format = V4L2_PIX_FMT_QC10C, + .vidc_color_format = MSM_VIDC_FMT_TP10C, + .pixfmt_name = "TP10C", + }, + { + .v4l2_color_format = V4L2_PIX_FMT_RGBA32, + .vidc_color_format = MSM_VIDC_FMT_RGBA8888, + .pixfmt_name = "RGBA", + }, +}; + +static struct color_primaries_info color_primaries_data_cliffs[] = { + { + .v4l2_color_primaries = V4L2_COLORSPACE_DEFAULT, + .vidc_color_primaries = MSM_VIDC_PRIMARIES_RESERVED, + }, + { + .v4l2_color_primaries = V4L2_COLORSPACE_REC709, + .vidc_color_primaries = MSM_VIDC_PRIMARIES_BT709, + }, + { + .v4l2_color_primaries = V4L2_COLORSPACE_470_SYSTEM_M, + .vidc_color_primaries = MSM_VIDC_PRIMARIES_BT470_SYSTEM_M, + }, + { + .v4l2_color_primaries = V4L2_COLORSPACE_470_SYSTEM_BG, + .vidc_color_primaries = MSM_VIDC_PRIMARIES_BT470_SYSTEM_BG, + }, + { + .v4l2_color_primaries = V4L2_COLORSPACE_SMPTE170M, + .vidc_color_primaries = MSM_VIDC_PRIMARIES_BT601_525, + }, + { + .v4l2_color_primaries = V4L2_COLORSPACE_SMPTE240M, + .vidc_color_primaries = MSM_VIDC_PRIMARIES_SMPTE_ST240M, + }, + { + .v4l2_color_primaries = V4L2_COLORSPACE_BT2020, + .vidc_color_primaries = MSM_VIDC_PRIMARIES_BT2020, + }, + { + .v4l2_color_primaries = V4L2_COLORSPACE_DCI_P3, + .vidc_color_primaries = MSM_VIDC_PRIMARIES_SMPTE_RP431_2, + }, +}; + +static struct transfer_char_info transfer_char_data_cliffs[] = { + { + .v4l2_transfer_char = V4L2_XFER_FUNC_DEFAULT, + .vidc_transfer_char = MSM_VIDC_TRANSFER_RESERVED, + }, + { + .v4l2_transfer_char = V4L2_XFER_FUNC_709, + .vidc_transfer_char = MSM_VIDC_TRANSFER_BT709, + }, + { + .v4l2_transfer_char = V4L2_XFER_FUNC_SMPTE240M, + .vidc_transfer_char = MSM_VIDC_TRANSFER_SMPTE_ST240M, + }, + { + .v4l2_transfer_char = V4L2_XFER_FUNC_SRGB, + .vidc_transfer_char = MSM_VIDC_TRANSFER_SRGB_SYCC, + }, + { + .v4l2_transfer_char = V4L2_XFER_FUNC_SMPTE2084, + .vidc_transfer_char = MSM_VIDC_TRANSFER_SMPTE_ST2084_PQ, + }, +}; + +static struct matrix_coeff_info matrix_coeff_data_cliffs[] = { + { + .v4l2_matrix_coeff = V4L2_YCBCR_ENC_DEFAULT, + .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_RESERVED, + }, + { + .v4l2_matrix_coeff = V4L2_YCBCR_ENC_709, + .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_BT709, + }, + { + .v4l2_matrix_coeff = V4L2_YCBCR_ENC_XV709, + .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_BT709, + }, + { + .v4l2_matrix_coeff = V4L2_YCBCR_ENC_XV601, + .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_BT470_SYS_BG_OR_BT601_625, + }, + { + .v4l2_matrix_coeff = V4L2_YCBCR_ENC_601, + .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_BT601_525_BT1358_525_OR_625, + }, + { + .v4l2_matrix_coeff = V4L2_YCBCR_ENC_SMPTE240M, + .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_SMPTE_ST240, + }, + { + .v4l2_matrix_coeff = V4L2_YCBCR_ENC_BT2020, + .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_BT2020_NON_CONSTANT, + }, + { + .v4l2_matrix_coeff = V4L2_YCBCR_ENC_BT2020_CONST_LUM, + .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_BT2020_CONSTANT, + }, +}; + +static struct msm_platform_core_capability core_data_cliffs[] = { + /* {type, value} */ + {ENC_CODECS, H264 | HEVC}, + {DEC_CODECS, H264 | HEVC | VP9}, + {MAX_SESSION_COUNT, 16}, + {MAX_NUM_720P_SESSIONS, 16}, + {MAX_NUM_1080P_SESSIONS, 16}, + {MAX_NUM_4K_SESSIONS, 8}, + {MAX_NUM_8K_SESSIONS, 2}, + {MAX_RT_MBPF, 174080}, /* (8192x4352)/256 + (4096x2176)/256*/ + {MAX_MBPF, 278528}, /* ((8192x4352)/256) * 2 */ + {MAX_MBPS, 7833600}, + /* max_load + * 7680x4320@60fps or 3840x2176@240fps + * which is greater than 4096x2176@120fps, + * 8192x4320@48fps + */ + {MAX_MBPF_HQ, 8160}, /* ((1920x1088)/256) */ + {MAX_MBPS_HQ, 489600}, /* ((1920x1088)/256)@60fps */ + {MAX_MBPF_B_FRAME, 32640}, /* 3840x2176/256 */ + {MAX_MBPS_B_FRAME, 1958400}, /* 3840x2176/256 MBs@60fps */ + {MAX_MBPS_ALL_INTRA, 1044480}, /* 4096x2176/256 MBs@30fps */ + {MAX_ENH_LAYER_COUNT, 5}, + {NUM_VPP_PIPE, 4}, + {SW_PC, 1}, + {FW_UNLOAD, 0}, + {HW_RESPONSE_TIMEOUT, HW_RESPONSE_TIMEOUT_VALUE}, /* 1000 ms */ + {SW_PC_DELAY, SW_PC_DELAY_VALUE }, /* 1500 ms (>HW_RESPONSE_TIMEOUT)*/ + {FW_UNLOAD_DELAY, FW_UNLOAD_DELAY_VALUE }, /* 3000 ms (>SW_PC_DELAY)*/ + {DCVS, 1}, + {DECODE_BATCH, 1}, + {DECODE_BATCH_TIMEOUT, 200}, + {STATS_TIMEOUT_MS, 2000}, + {NON_FATAL_FAULTS, 1}, + {ENC_AUTO_FRAMERATE, 1}, + {DEVICE_CAPS, V4L2_CAP_VIDEO_M2M_MPLANE | V4L2_CAP_STREAMING}, + {SUPPORTS_SYNX_FENCE, 0}, + {SUPPORTS_REQUESTS, 0}, +}; + +static int msm_vidc_set_ring_buffer_count_cliffs(void *instance, + enum msm_vidc_inst_capability_type cap_id) +{ + int rc = 0; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; + struct v4l2_format *output_fmt, *input_fmt; + struct msm_vidc_core *core; + u32 count = 0, data_size = 0, pixel_count = 0, fps = 0; + u32 frame_rate = 0, operating_rate = 0; + + core = inst->core; + output_fmt = &inst->fmts[OUTPUT_PORT]; + input_fmt = &inst->fmts[INPUT_PORT]; + + frame_rate = inst->capabilities[FRAME_RATE].value >> 16; + operating_rate = inst->capabilities[OPERATING_RATE].value >> 16; + fps = max(frame_rate, operating_rate); + pixel_count = output_fmt->fmt.pix_mp.width * + output_fmt->fmt.pix_mp.height; + + /* + * try to enable ring buffer feature if +  * resolution >= 8k and fps >= 30fps and +  * resolution >= 4k and fps >= 120fps and +  * resolution >= 1080p and fps >= 480fps and +  * resolution >= 720p and fps >= 960fps + */ + if ((pixel_count >= 7680 * 4320 && fps >= 30) && + (pixel_count >= 3840 * 2160 && fps >= 120) && + (pixel_count >= 1920 * 1080 && fps >= 480) && + (pixel_count >= 1280 * 720 && fps >= 960)) { + data_size = input_fmt->fmt.pix_mp.plane_fmt[0].sizeimage; + i_vpr_h(inst, "%s: calculate ring buffer count\n", __func__); + rc = call_session_op(core, ring_buf_count, inst, data_size); + if (rc) { + i_vpr_e(inst, "%s: failed to calculate ring buf count\n", + __func__); + /* ignore error */ + rc = 0; + inst->capabilities[cap_id].value = 0; + } + } else { + i_vpr_h(inst, + "%s: session %ux%u@%u fps does not support ring buffer\n", + __func__, output_fmt->fmt.pix_mp.width, + output_fmt->fmt.pix_mp.height, fps); + inst->capabilities[cap_id].value = 0; + } + + count = inst->capabilities[cap_id].value; + i_vpr_h(inst, "%s: ring buffer count: %u\n", __func__, count); + rc = venus_hfi_session_property(inst, + HFI_PROP_ENC_RING_BIN_BUF, + HFI_HOST_FLAGS_NONE, + HFI_PORT_BITSTREAM, + HFI_PAYLOAD_U32, + &count, + sizeof(u32)); + if (rc) + return rc; + + return rc; +} + +static struct msm_platform_inst_capability instance_cap_data_cliffs[] = { + /* {cap, domain, codec, + * min, max, step_or_mask, value, + * v4l2_id, + * hfi_id, + * flags} + */ + + {FRAME_WIDTH, DEC, CODECS_ALL, 96, 8192, 1, 1920}, + + {FRAME_WIDTH, DEC, VP9, 96, 4096, 1, 1920}, + + {FRAME_WIDTH, ENC, CODECS_ALL, 128, 8192, 1, 1920}, + + {FRAME_WIDTH, ENC, HEVC, 96, 8192, 1, 1920}, + + {LOSSLESS_FRAME_WIDTH, ENC, CODECS_ALL, 128, 4096, 1, 1920}, + + {LOSSLESS_FRAME_WIDTH, ENC, HEVC, 96, 4096, 1, 1920}, + + {FRAME_HEIGHT, DEC, CODECS_ALL, 96, 8192, 1, 1080}, + + {FRAME_HEIGHT, DEC, VP9, 96, 4096, 1, 1080}, + + {FRAME_HEIGHT, ENC, CODECS_ALL, 128, 8192, 1, 1080}, + + {FRAME_HEIGHT, ENC, HEVC, 96, 8192, 1, 1080}, + + {LOSSLESS_FRAME_HEIGHT, ENC, CODECS_ALL, 128, 4096, 1, 1080}, + + {LOSSLESS_FRAME_HEIGHT, ENC, HEVC, 96, 4096, 1, 1080}, + + {PIX_FMTS, ENC | DEC, H264, + MSM_VIDC_FMT_NV12, + MSM_VIDC_FMT_NV12C, + MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C, + MSM_VIDC_FMT_NV12C}, + + {PIX_FMTS, ENC | DEC, HEVC | VP9, + MSM_VIDC_FMT_NV12, + MSM_VIDC_FMT_TP10C, + MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C | + MSM_VIDC_FMT_TP10C, + MSM_VIDC_FMT_NV12C}, + + {MIN_BUFFERS_INPUT, ENC | DEC, CODECS_ALL, 0, 64, 1, 4, + V4L2_CID_MIN_BUFFERS_FOR_OUTPUT, + 0, + CAP_FLAG_VOLATILE}, + + + {MIN_BUFFERS_OUTPUT, ENC | DEC, CODECS_ALL, + 0, 64, 1, 4, + V4L2_CID_MIN_BUFFERS_FOR_CAPTURE, + HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_VOLATILE}, + + /* (8192 * 4320) / 256 */ + {MBPF, ENC, CODECS_ALL, 64, 138240, 1, 138240}, + + {MBPF, ENC, HEVC, 36, 138240, 1, 138240}, + + {MBPF, DEC, CODECS_ALL, 36, 138240, 1, 138240}, + + /* (4096 * 2304) / 256 */ + {MBPF, DEC, VP9, 36, 36864, 1, 36864}, + + /* (4096 * 2304) / 256 */ + {LOSSLESS_MBPF, ENC, H264 | HEVC, 64, 36864, 1, 36864}, + + /* Batch Mode Decode */ + /* TODO: update with new values based on updated voltage corner */ + {BATCH_MBPF, DEC, H264 | HEVC | VP9, 64, 34816, 1, 34816}, + + /* (4096 * 2304) / 256 */ + {BATCH_FPS, DEC, H264 | HEVC | VP9, 1, 120, 1, 120}, + + {FRAME_RATE, ENC, CODECS_ALL, + (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), + 1, (DEFAULT_FPS << 16), + 0, + HFI_PROP_FRAME_RATE, + CAP_FLAG_OUTPUT_PORT}, + + {OPERATING_RATE, ENC, CODECS_ALL, + (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), + 1, (DEFAULT_FPS << 16)}, + + {INPUT_RATE, ENC | DEC, CODECS_ALL, + (MINIMUM_FPS << 16), INT_MAX, + 1, (DEFAULT_FPS << 16)}, + + {TIMESTAMP_RATE, ENC | DEC, CODECS_ALL, + (MINIMUM_FPS << 16), INT_MAX, + 1, (DEFAULT_FPS << 16)}, + + {SCALE_FACTOR, ENC, H264 | HEVC, 1, 8, 1, 8}, + + {MB_CYCLES_VSP, ENC, CODECS_ALL, 25, 25, 1, 25}, + + {MB_CYCLES_VSP, DEC, CODECS_ALL, 25, 25, 1, 25}, + + {MB_CYCLES_VSP, DEC, VP9, 60, 60, 1, 60}, + + {MB_CYCLES_VPP, ENC, CODECS_ALL, 675, 675, 1, 675}, + + {MB_CYCLES_VPP, DEC, CODECS_ALL, 200, 200, 1, 200}, + + {MB_CYCLES_LP, ENC, CODECS_ALL, 320, 320, 1, 320}, + + {MB_CYCLES_LP, DEC, CODECS_ALL, 200, 200, 1, 200}, + + {MB_CYCLES_FW, ENC | DEC, CODECS_ALL, 489583, 489583, 1, 489583}, + + {MB_CYCLES_FW_VPP, ENC, CODECS_ALL, 48405, 48405, 1, 48405}, + + {MB_CYCLES_FW_VPP, DEC, CODECS_ALL, 66234, 66234, 1, 66234}, + + {ENC_RING_BUFFER_COUNT, ENC, CODECS_ALL, + 0, MAX_ENC_RING_BUF_COUNT, 1, 0}, + + {CLIENT_ID, ENC | DEC, CODECS_ALL, + INVALID_CLIENT_ID, INT_MAX, 1, INVALID_CLIENT_ID, + 0}, + + {HFLIP, ENC, CODECS_ALL, + 0, 1, 1, 0, + V4L2_CID_HFLIP, + HFI_PROP_FLIP, + CAP_FLAG_OUTPUT_PORT | + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {VFLIP, ENC, CODECS_ALL, + 0, 1, 1, 0, + V4L2_CID_VFLIP, + HFI_PROP_FLIP, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {ROTATION, ENC, CODECS_ALL, + 0, 270, 90, 0, + V4L2_CID_ROTATE, + HFI_PROP_ROTATION, + CAP_FLAG_OUTPUT_PORT}, + + {SUPER_FRAME, ENC, H264 | HEVC, + 0, 32, 1, 0, + 0, 0, + CAP_FLAG_NONE}, + + {SLICE_DECODE, DEC, CODECS_ALL, + 0, 0, 0, 0, + V4L2_CID_MPEG_VIDEO_DECODER_SLICE_INTERFACE, + 0}, + + {HEADER_MODE, ENC, CODECS_ALL, + V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE, + V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME, + BIT(V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE) | + BIT(V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME), + V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE, + V4L2_CID_MPEG_VIDEO_HEADER_MODE, + HFI_PROP_SEQ_HEADER_MODE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {PREPEND_SPSPPS_TO_IDR, ENC, CODECS_ALL, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDEO_PREPEND_SPSPPS_TO_IDR}, + + {WITHOUT_STARTCODE, ENC, CODECS_ALL, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE, + HFI_PROP_NAL_LENGTH_FIELD, + CAP_FLAG_OUTPUT_PORT}, + + {NAL_LENGTH_FIELD, ENC, CODECS_ALL, + V4L2_MPEG_VIDEO_HEVC_SIZE_0, + V4L2_MPEG_VIDEO_HEVC_SIZE_4, + BIT(V4L2_MPEG_VIDEO_HEVC_SIZE_0) | + BIT(V4L2_MPEG_VIDEO_HEVC_SIZE_4), + V4L2_MPEG_VIDEO_HEVC_SIZE_0, + V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD, + HFI_PROP_NAL_LENGTH_FIELD, + CAP_FLAG_MENU | CAP_FLAG_OUTPUT_PORT}, + + /* TODO: Firmware introduced enumeration type for this + * with and without seq header. + */ + {REQUEST_I_FRAME, ENC, H264 | HEVC, + 0, 0, 0, 0, + V4L2_CID_MPEG_VIDEO_FORCE_KEY_FRAME, + HFI_PROP_REQUEST_SYNC_FRAME, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + /* Enc: Keeping CABAC and CAVLC as same bitrate. + * Dec: there's no use of Bitrate cap + */ + {BIT_RATE, ENC, H264 | HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_BITRATE, + HFI_PROP_TOTAL_BITRATE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {BITRATE_MODE, ENC, H264, + V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, + V4L2_MPEG_VIDEO_BITRATE_MODE_CBR, + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_VBR) | + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CBR), + V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, + V4L2_CID_MPEG_VIDEO_BITRATE_MODE, + HFI_PROP_RATE_CONTROL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {BITRATE_MODE, ENC, HEVC, + V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, + V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_VBR) | + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CBR) | + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CQ), + V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, + V4L2_CID_MPEG_VIDEO_BITRATE_MODE, + HFI_PROP_RATE_CONTROL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {CABAC_MAX_BITRATE, ENC, H264 | HEVC, 0, + 160000000, 1, 160000000}, + + {CAVLC_MAX_BITRATE, ENC, H264, 0, + 220000000, 1, 220000000}, + + {ALLINTRA_MAX_BITRATE, ENC, H264 | HEVC, 0, + 245000000, 1, 245000000}, + + {LOWLATENCY_MAX_BITRATE, ENC, H264 | HEVC, 0, + 70000000, 1, 70000000}, + + {LOSSLESS, ENC, HEVC, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU}, + + {FRAME_SKIP_MODE, ENC, H264 | HEVC, + V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED, + V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT, + BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED) | + BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_LEVEL_LIMIT) | + BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT), + V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED, + V4L2_CID_MPEG_VIDEO_FRAME_SKIP_MODE, + 0, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {FRAME_RC_ENABLE, ENC, H264 | HEVC, + 0, 1, 1, 1, + V4L2_CID_MPEG_VIDEO_FRAME_RC_ENABLE}, + + {CONSTANT_QUALITY, ENC, HEVC, + 1, MAX_CONSTANT_QUALITY, 1, 90, + V4L2_CID_MPEG_VIDEO_CONSTANT_QUALITY, + HFI_PROP_CONSTANT_QUALITY, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {GOP_SIZE, ENC, CODECS_ALL, + 0, INT_MAX, 1, 2 * DEFAULT_FPS - 1, + V4L2_CID_MPEG_VIDEO_GOP_SIZE, + HFI_PROP_MAX_GOP_FRAMES, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {GOP_CLOSURE, ENC, H264 | HEVC, + 0, 1, 1, 1, + V4L2_CID_MPEG_VIDEO_GOP_CLOSURE, + 0}, + + {B_FRAME, ENC, H264 | HEVC, + 0, 7, 1, 0, + V4L2_CID_MPEG_VIDEO_B_FRAMES, + HFI_PROP_MAX_B_FRAMES, + CAP_FLAG_OUTPUT_PORT}, + + {BLUR_TYPES, ENC, H264 | HEVC, + MSM_VIDC_BLUR_NONE, MSM_VIDC_BLUR_EXTERNAL, + BIT(MSM_VIDC_BLUR_NONE) | BIT(MSM_VIDC_BLUR_EXTERNAL), + MSM_VIDC_BLUR_NONE, + 0, + HFI_PROP_BLUR_TYPES, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {CSC, ENC, CODECS_ALL, + 0, 1, 1, 0, + 0, + HFI_PROP_CSC}, + + {LOWLATENCY_MODE, ENC, H264 | HEVC, + 0, 1, 1, 0, + 0, + 0, + CAP_FLAG_NONE}, + + {LOWLATENCY_MODE, DEC, H264 | HEVC | VP9, + 0, 1, 1, 0, + 0, + HFI_PROP_SEQ_CHANGE_AT_SYNC_FRAME, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {LTR_COUNT, ENC, H264 | HEVC, + 0, MAX_LTR_FRAME_COUNT_5, 1, 0, + V4L2_CID_MPEG_VIDEO_LTR_COUNT, + HFI_PROP_LTR_COUNT, + CAP_FLAG_OUTPUT_PORT}, + + {USE_LTR, ENC, H264 | HEVC, + 0, + ((1 << MAX_LTR_FRAME_COUNT_5) - 1), + 0, 0, + V4L2_CID_MPEG_VIDEO_USE_LTR_FRAMES, + HFI_PROP_LTR_USE, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {MARK_LTR, ENC, H264 | HEVC, + INVALID_DEFAULT_MARK_OR_USE_LTR, + (MAX_LTR_FRAME_COUNT_5 - 1), + 1, INVALID_DEFAULT_MARK_OR_USE_LTR, + V4L2_CID_MPEG_VIDEO_FRAME_LTR_INDEX, + HFI_PROP_LTR_MARK, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {BASELAYER_PRIORITY, ENC, H264, + 0, MAX_BASE_LAYER_PRIORITY_ID, 1, 0, + V4L2_CID_MPEG_VIDEO_BASELAYER_PRIORITY_ID, + HFI_PROP_BASELAYER_PRIORITYID, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {AU_DELIMITER, ENC, H264 | HEVC, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDEO_AU_DELIMITER, + HFI_PROP_AUD, + CAP_FLAG_OUTPUT_PORT}, + + {CONTENT_ADAPTIVE_CODING, ENC, H264 | HEVC, + 0, 1, 1, 1, + 0, + HFI_PROP_CONTENT_ADAPTIVE_CODING, + CAP_FLAG_OUTPUT_PORT}, + + {REQUEST_PREPROCESS, ENC, H264 | HEVC, + MSM_VIDC_PREPROCESS_NONE, + MSM_VIDC_PREPROCESS_TYPE0, + BIT(MSM_VIDC_PREPROCESS_NONE) | + BIT(MSM_VIDC_PREPROCESS_TYPE0), + MSM_VIDC_PREPROCESS_NONE, + 0, HFI_PROP_REQUEST_PREPROCESS, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {MIN_QUALITY, ENC, H264 | HEVC, + 0, MAX_SUPPORTED_MIN_QUALITY, 70, MAX_SUPPORTED_MIN_QUALITY, + 0, + HFI_PROP_MAINTAIN_MIN_QUALITY, + CAP_FLAG_OUTPUT_PORT}, + + {VBV_DELAY, ENC, H264 | HEVC, + 200, 300, 100, 300, + V4L2_CID_MPEG_VIDEO_VBV_DELAY, + HFI_PROP_VBV_DELAY, + CAP_FLAG_OUTPUT_PORT}, + + {PEAK_BITRATE, ENC, H264 | HEVC, + /* default peak bitrate is 10% larger than avg bitrate */ + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_BITRATE_PEAK, + HFI_PROP_TOTAL_PEAK_BITRATE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {MIN_FRAME_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, + V4L2_CID_MPEG_VIDEO_H264_MIN_QP, + HFI_PROP_MIN_QP_PACKED, + CAP_FLAG_OUTPUT_PORT}, + + {MIN_FRAME_QP, ENC, HEVC, + MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, + V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP, + HFI_PROP_MIN_QP_PACKED, + CAP_FLAG_OUTPUT_PORT}, + + {I_FRAME_MIN_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, + V4L2_CID_MPEG_VIDEO_H264_I_FRAME_MIN_QP}, + + {I_FRAME_MIN_QP, ENC, HEVC, + MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, + V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_MIN_QP}, + + {P_FRAME_MIN_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, + V4L2_CID_MPEG_VIDEO_H264_P_FRAME_MIN_QP}, + + {P_FRAME_MIN_QP, ENC, HEVC, + MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, + V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_MIN_QP}, + + {B_FRAME_MIN_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, + V4L2_CID_MPEG_VIDEO_H264_B_FRAME_MIN_QP}, + + {B_FRAME_MIN_QP, ENC, HEVC, + MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, + V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_MIN_QP}, + + {MAX_FRAME_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_H264_MAX_QP, + HFI_PROP_MAX_QP_PACKED, + CAP_FLAG_OUTPUT_PORT}, + + {MAX_FRAME_QP, ENC, HEVC, + MIN_QP_10BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP, + HFI_PROP_MAX_QP_PACKED, + CAP_FLAG_OUTPUT_PORT}, + + {I_FRAME_MAX_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_H264_I_FRAME_MAX_QP}, + + {I_FRAME_MAX_QP, ENC, HEVC, + MIN_QP_10BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_MAX_QP}, + + {P_FRAME_MAX_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_H264_P_FRAME_MAX_QP}, + + {P_FRAME_MAX_QP, ENC, HEVC, + MIN_QP_10BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_MAX_QP}, + + {B_FRAME_MAX_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_H264_B_FRAME_MAX_QP}, + + {B_FRAME_MAX_QP, ENC, HEVC, + MIN_QP_10BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_MAX_QP}, + + {I_FRAME_QP, ENC, HEVC, + MIN_QP_10BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {I_FRAME_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {P_FRAME_QP, ENC, HEVC, + MIN_QP_10BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {P_FRAME_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {B_FRAME_QP, ENC, HEVC, + MIN_QP_10BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {B_FRAME_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_H264_B_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {LAYER_TYPE, ENC, HEVC, + V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B, + V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P, + BIT(V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B) | + BIT(V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P), + V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE, + HFI_PROP_LAYER_ENCODING_TYPE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LAYER_TYPE, ENC, H264, + V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_B, + V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P, + BIT(V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_B) | + BIT(V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P), + V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P, + V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_TYPE, + HFI_PROP_LAYER_ENCODING_TYPE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LAYER_ENABLE, ENC, H264, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING, + HFI_PROP_LAYER_ENCODING_TYPE, + CAP_FLAG_OUTPUT_PORT}, + + {LAYER_ENABLE, ENC, HEVC, + 0, 1, 1, 0, + 0, + 0, + CAP_FLAG_OUTPUT_PORT}, + + {ENH_LAYER_COUNT, ENC, HEVC, + 0, 5, 1, 0, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER, + HFI_PROP_LAYER_COUNT, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {ENH_LAYER_COUNT, ENC, H264, + 0, 5, 1, 0, + V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_LAYER, + HFI_PROP_LAYER_COUNT, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L0_BR, ENC, H264, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L0_BR, + HFI_PROP_BITRATE_LAYER1, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L0_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L0_BR, + HFI_PROP_BITRATE_LAYER1, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L1_BR, ENC, H264, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L1_BR, + HFI_PROP_BITRATE_LAYER2, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L1_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L1_BR, + HFI_PROP_BITRATE_LAYER2, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L2_BR, ENC, H264, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L2_BR, + HFI_PROP_BITRATE_LAYER3, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L2_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L2_BR, + HFI_PROP_BITRATE_LAYER3, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L3_BR, ENC, H264, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L3_BR, + HFI_PROP_BITRATE_LAYER4, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + {L3_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L3_BR, + HFI_PROP_BITRATE_LAYER4, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L4_BR, ENC, H264, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L4_BR, + HFI_PROP_BITRATE_LAYER5, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L4_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L4_BR, + HFI_PROP_BITRATE_LAYER5, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L5_BR, ENC, H264, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L5_BR, + HFI_PROP_BITRATE_LAYER6, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L5_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L5_BR, + HFI_PROP_BITRATE_LAYER6, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {ENTROPY_MODE, ENC, H264, + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC, + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, + BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC) | + BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC), + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, + V4L2_CID_MPEG_VIDEO_H264_ENTROPY_MODE, + HFI_PROP_CABAC_SESSION, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {ENTROPY_MODE, DEC, H264 | HEVC | VP9, + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC, + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, + BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC) | + BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC), + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, + 0, + HFI_PROP_CABAC_SESSION}, + + {PROFILE, ENC | DEC, H264, + V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE, + V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH, + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_BASELINE) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_MAIN) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_HIGH), + V4L2_MPEG_VIDEO_H264_PROFILE_HIGH, + V4L2_CID_MPEG_VIDEO_H264_PROFILE, + HFI_PROP_PROFILE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {PROFILE, ENC | DEC, HEVC, + V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN, + V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE, + BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN) | + BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE) | + BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10) | + BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE), + V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN, + V4L2_CID_MPEG_VIDEO_HEVC_PROFILE, + HFI_PROP_PROFILE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {PROFILE, DEC, VP9, + V4L2_MPEG_VIDEO_VP9_PROFILE_0, + V4L2_MPEG_VIDEO_VP9_PROFILE_2, + BIT(V4L2_MPEG_VIDEO_VP9_PROFILE_0) | + BIT(V4L2_MPEG_VIDEO_VP9_PROFILE_2), + V4L2_MPEG_VIDEO_VP9_PROFILE_0, + V4L2_CID_MPEG_VIDEO_VP9_PROFILE, + HFI_PROP_PROFILE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LEVEL, ENC, H264, + V4L2_MPEG_VIDEO_H264_LEVEL_1_0, + V4L2_MPEG_VIDEO_H264_LEVEL_6_0, + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1B) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_3) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_0), + V4L2_MPEG_VIDEO_H264_LEVEL_5_0, + V4L2_CID_MPEG_VIDEO_H264_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LEVEL, ENC, HEVC, + V4L2_MPEG_VIDEO_HEVC_LEVEL_1, + V4L2_MPEG_VIDEO_HEVC_LEVEL_6, + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6), + V4L2_MPEG_VIDEO_HEVC_LEVEL_5, + V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LEVEL, DEC, H264, + V4L2_MPEG_VIDEO_H264_LEVEL_1_0, + V4L2_MPEG_VIDEO_H264_LEVEL_6_2, + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1B) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_3) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_2), + V4L2_MPEG_VIDEO_H264_LEVEL_6_1, + V4L2_CID_MPEG_VIDEO_H264_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LEVEL, DEC, HEVC, + V4L2_MPEG_VIDEO_HEVC_LEVEL_1, + V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2, + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1)| + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2), + V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1, + V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LEVEL, DEC, VP9, + V4L2_MPEG_VIDEO_VP9_LEVEL_1_0, + V4L2_MPEG_VIDEO_VP9_LEVEL_6_0, + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_1_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_1_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_2_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_3_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_4_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_2) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_6_0), + V4L2_MPEG_VIDEO_VP9_LEVEL_6_0, + V4L2_CID_MPEG_VIDEO_VP9_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {HEVC_TIER, ENC | DEC, HEVC, + V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, + V4L2_MPEG_VIDEO_HEVC_TIER_HIGH, + BIT(V4L2_MPEG_VIDEO_HEVC_TIER_MAIN) | + BIT(V4L2_MPEG_VIDEO_HEVC_TIER_HIGH), + V4L2_MPEG_VIDEO_HEVC_TIER_HIGH, + V4L2_CID_MPEG_VIDEO_HEVC_TIER, + HFI_PROP_TIER, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LF_MODE, ENC, H264, + V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED, + DB_H264_DISABLE_SLICE_BOUNDARY, + BIT(V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED) | + BIT(V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_DISABLED) | + BIT(DB_H264_DISABLE_SLICE_BOUNDARY), + V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED, + V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_MODE, + HFI_PROP_DEBLOCKING_MODE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LF_MODE, ENC, HEVC, + V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_DISABLED, + DB_HEVC_DISABLE_SLICE_BOUNDARY, + BIT(V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_DISABLED) | + BIT(V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_ENABLED) | + BIT(DB_HEVC_DISABLE_SLICE_BOUNDARY), + V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_ENABLED, + V4L2_CID_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE, + HFI_PROP_DEBLOCKING_MODE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LF_ALPHA, ENC, H264, + -6, 6, 1, 0, + V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_ALPHA}, + + {LF_ALPHA, ENC, HEVC, + -6, 6, 1, 0, + V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2}, + + {LF_BETA, ENC, H264, + -6, 6, 1, 0, + V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_BETA}, + + {LF_BETA, ENC, HEVC, + -6, 6, 1, 0, + V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2}, + + {SLICE_MODE, ENC, H264 | HEVC, + V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, + V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_BYTES, + BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE) | + BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_MB) | + BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_BYTES), + V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, + V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE, + 0, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {SLICE_MAX_BYTES, ENC, H264 | HEVC, + MIN_SLICE_BYTE_SIZE, MAX_SLICE_BYTE_SIZE, + 1, MIN_SLICE_BYTE_SIZE, + V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES, + HFI_PROP_MULTI_SLICE_BYTES_COUNT, + CAP_FLAG_OUTPUT_PORT}, + + {SLICE_MAX_MB, ENC, H264 | HEVC, + 1, MAX_SLICE_MB_SIZE, 1, 1, + V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB, + HFI_PROP_MULTI_SLICE_MB_COUNT, + CAP_FLAG_OUTPUT_PORT}, + + {MB_RC, ENC, H264 | HEVC, + 0, 1, 1, 1, + V4L2_CID_MPEG_VIDEO_MB_RC_ENABLE, + 0, + CAP_FLAG_OUTPUT_PORT}, + + {TRANSFORM_8X8, ENC, H264, + 0, 1, 1, 1, + V4L2_CID_MPEG_VIDEO_H264_8X8_TRANSFORM, + HFI_PROP_8X8_TRANSFORM, + CAP_FLAG_OUTPUT_PORT}, + + {CHROMA_QP_INDEX_OFFSET, ENC, HEVC, + MIN_CHROMA_QP_OFFSET, MAX_CHROMA_QP_OFFSET, + 1, MAX_CHROMA_QP_OFFSET, + V4L2_CID_MPEG_VIDEO_H264_CHROMA_QP_INDEX_OFFSET, + HFI_PROP_CHROMA_QP_OFFSET, + CAP_FLAG_OUTPUT_PORT}, + + {DISPLAY_DELAY_ENABLE, DEC, H264 | HEVC | VP9, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY_ENABLE, + HFI_PROP_DECODE_ORDER_OUTPUT, + CAP_FLAG_INPUT_PORT}, + + {DISPLAY_DELAY, DEC, H264 | HEVC | VP9, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY, + HFI_PROP_DECODE_ORDER_OUTPUT, + CAP_FLAG_INPUT_PORT}, + + {OUTPUT_ORDER, DEC, H264 | HEVC | VP9, + 0, 1, 1, 0, + 0, + HFI_PROP_DECODE_ORDER_OUTPUT, + CAP_FLAG_INPUT_PORT}, + + {INPUT_BUF_HOST_MAX_COUNT, ENC | DEC, CODECS_ALL, + DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT, + 1, DEFAULT_MAX_HOST_BUF_COUNT, + 0, + HFI_PROP_BUFFER_HOST_MAX_COUNT, + CAP_FLAG_INPUT_PORT}, + + {OUTPUT_BUF_HOST_MAX_COUNT, ENC | DEC, CODECS_ALL, + DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT, + 1, DEFAULT_MAX_HOST_BUF_COUNT, + 0, + HFI_PROP_BUFFER_HOST_MAX_COUNT, + CAP_FLAG_OUTPUT_PORT}, + + {CONCEAL_COLOR_8BIT, DEC, CODECS_ALL, 0x0, 0xff3fcff, 1, + DEFAULT_VIDEO_CONCEAL_COLOR_BLACK, + V4L2_CID_MPEG_VIDEO_MUTE_YUV, + HFI_PROP_CONCEAL_COLOR_8BIT, + CAP_FLAG_INPUT_PORT}, + + {CONCEAL_COLOR_10BIT, DEC, CODECS_ALL, 0x0, 0x3fffffff, 1, + DEFAULT_VIDEO_CONCEAL_COLOR_BLACK, + V4L2_CID_MPEG_VIDEO_MUTE_YUV, + HFI_PROP_CONCEAL_COLOR_10BIT, + CAP_FLAG_INPUT_PORT}, + + {STAGE, DEC | ENC, CODECS_ALL, + MSM_VIDC_STAGE_1, + MSM_VIDC_STAGE_2, 1, + MSM_VIDC_STAGE_2, + 0, + HFI_PROP_STAGE}, + + {PIPE, DEC | ENC, CODECS_ALL, + MSM_VIDC_PIPE_1, + MSM_VIDC_PIPE_4, 1, + MSM_VIDC_PIPE_4, + 0, + HFI_PROP_PIPE}, + + {POC, DEC, H264, 0, 2, 1, 1, + 0, + HFI_PROP_PIC_ORDER_CNT_TYPE}, + + {QUALITY_MODE, ENC, CODECS_ALL, + MSM_VIDC_MAX_QUALITY_MODE, + MSM_VIDC_POWER_SAVE_MODE, 1, + MSM_VIDC_POWER_SAVE_MODE}, + + {CODED_FRAMES, DEC, H264 | HEVC, + CODED_FRAMES_PROGRESSIVE, CODED_FRAMES_INTERLACE, + 1, CODED_FRAMES_PROGRESSIVE, + 0, + HFI_PROP_CODED_FRAMES}, + + {BIT_DEPTH, DEC, CODECS_ALL, BIT_DEPTH_8, BIT_DEPTH_10, 1, BIT_DEPTH_8, + 0, + HFI_PROP_LUMA_CHROMA_BIT_DEPTH}, + + {CODEC_CONFIG, DEC, H264 | HEVC, 0, 1, 1, 0, + 0, 0, + CAP_FLAG_DYNAMIC_ALLOWED}, + + {BITSTREAM_SIZE_OVERWRITE, DEC, CODECS_ALL, 0, INT_MAX, 1, 0, + 0}, + + {THUMBNAIL_MODE, DEC, CODECS_ALL, + 0, 1, 1, 0, + 0, + HFI_PROP_THUMBNAIL_MODE, + CAP_FLAG_INPUT_PORT}, + + {DEFAULT_HEADER, DEC, CODECS_ALL, + 0, 1, 1, 0, + 0, + HFI_PROP_DEC_DEFAULT_HEADER}, + + {RAP_FRAME, DEC, CODECS_ALL, + 0, 1, 1, 1, + 0, + HFI_PROP_DEC_START_FROM_RAP_FRAME, + CAP_FLAG_INPUT_PORT}, + + {SEQ_CHANGE_AT_SYNC_FRAME, DEC, CODECS_ALL, + 0, 1, 1, 1, + 0, + HFI_PROP_SEQ_CHANGE_AT_SYNC_FRAME, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {FIRMWARE_PRIORITY_OFFSET, DEC | ENC, CODECS_ALL, + 1, 1, 1, 1}, + + {ALL_INTRA, ENC, H264 | HEVC, + 0, 1, 1, 0, + 0, + 0, + CAP_FLAG_OUTPUT_PORT}, + + {COMPLEXITY, ENC, H264 | HEVC, + 0, 100, + 1, DEFAULT_COMPLEXITY, + 0}, +}; + +static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_cliffs[] = { + /* {cap, domain, codec, + * parents, + * children, + * adjust, set} + */ + + {PIX_FMTS, ENC, HEVC, + {PROFILE, MIN_FRAME_QP, MAX_FRAME_QP, I_FRAME_QP, P_FRAME_QP, + B_FRAME_QP, MIN_QUALITY, BLUR_TYPES, LTR_COUNT}}, + + {PIX_FMTS, DEC, HEVC, + {PROFILE}}, + + {FRAME_RATE, ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_q16}, + + {ENC_RING_BUFFER_COUNT, ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_ring_buffer_count_cliffs}, + + {HFLIP, ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_flip}, + + {VFLIP, ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_flip}, + + {ROTATION, ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_rotation}, + + {SUPER_FRAME, ENC, H264 | HEVC, + {INPUT_BUF_HOST_MAX_COUNT, OUTPUT_BUF_HOST_MAX_COUNT}, + NULL, + NULL}, + + {HEADER_MODE, ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_header_mode}, + + {WITHOUT_STARTCODE, ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_nal_length}, + + {REQUEST_I_FRAME, ENC, H264 | HEVC, + {0}, + NULL, + msm_vidc_set_req_sync_frame}, + + {BIT_RATE, ENC, H264, + {PEAK_BITRATE, L0_BR}, + msm_vidc_adjust_bitrate, + msm_vidc_set_bitrate}, + + {BIT_RATE, ENC, HEVC, + {PEAK_BITRATE, L0_BR}, + msm_vidc_adjust_bitrate, + msm_vidc_set_bitrate}, + + {BITRATE_MODE, ENC, H264, + {LTR_COUNT, I_FRAME_QP, P_FRAME_QP, + B_FRAME_QP, ENH_LAYER_COUNT, BIT_RATE, + MIN_QUALITY, VBV_DELAY, + PEAK_BITRATE, SLICE_MODE, CONTENT_ADAPTIVE_CODING, + BLUR_TYPES, LOWLATENCY_MODE}, + msm_vidc_adjust_bitrate_mode, + msm_vidc_set_u32_enum}, + + {BITRATE_MODE, ENC, HEVC, + {LTR_COUNT, I_FRAME_QP, P_FRAME_QP, + B_FRAME_QP, CONSTANT_QUALITY, ENH_LAYER_COUNT, + BIT_RATE, MIN_QUALITY, VBV_DELAY, + PEAK_BITRATE, SLICE_MODE, CONTENT_ADAPTIVE_CODING, + BLUR_TYPES, LOWLATENCY_MODE}, + msm_vidc_adjust_bitrate_mode, + msm_vidc_set_u32_enum}, + + {CONSTANT_QUALITY, ENC, HEVC, + {0}, + NULL, + msm_vidc_set_constant_quality}, + + {GOP_SIZE, ENC, CODECS_ALL, + {ALL_INTRA}, + msm_vidc_adjust_gop_size, + msm_vidc_set_gop_size}, + + {B_FRAME, ENC, H264 | HEVC, + {ALL_INTRA}, + msm_vidc_adjust_b_frame, + msm_vidc_set_u32}, + + {BLUR_TYPES, ENC, H264 | HEVC, + {0}, + msm_vidc_adjust_blur_type, + msm_vidc_set_u32_enum}, + + {LOWLATENCY_MODE, ENC, H264 | HEVC, + {STAGE, BIT_RATE}, + msm_vidc_adjust_enc_lowlatency_mode, + NULL}, + + {LOWLATENCY_MODE, DEC, H264 | HEVC | VP9, + {STAGE}, + msm_vidc_adjust_dec_lowlatency_mode, + NULL}, + + {LTR_COUNT, ENC, H264 | HEVC, + {0}, + msm_vidc_adjust_ltr_count, + msm_vidc_set_u32}, + + {USE_LTR, ENC, H264 | HEVC, + {0}, + msm_vidc_adjust_use_ltr, + msm_vidc_set_use_and_mark_ltr}, + + {MARK_LTR, ENC, H264 | HEVC, + {0}, + msm_vidc_adjust_mark_ltr, + msm_vidc_set_use_and_mark_ltr}, + + {AU_DELIMITER, ENC, H264 | HEVC, + {0}, + NULL, + msm_vidc_set_u32}, + + {CONTENT_ADAPTIVE_CODING, ENC, H264 | HEVC, + {REQUEST_PREPROCESS}, + msm_vidc_adjust_brs, + msm_vidc_set_vbr_related_properties}, + + {REQUEST_PREPROCESS, ENC, H264 | HEVC, + {0}, + msm_vidc_adjust_preprocess, + msm_vidc_set_preprocess}, + + {MIN_QUALITY, ENC, H264, + {BLUR_TYPES}, + msm_vidc_adjust_min_quality, + msm_vidc_set_u32}, + + {MIN_QUALITY, ENC, HEVC, + {BLUR_TYPES}, + msm_vidc_adjust_min_quality, + msm_vidc_set_u32}, + + {VBV_DELAY, ENC, H264 | HEVC, + {0}, + NULL, + msm_vidc_set_cbr_related_properties}, + + {PEAK_BITRATE, ENC, H264 | HEVC, + {0}, + msm_vidc_adjust_peak_bitrate, + msm_vidc_set_cbr_related_properties}, + + {MIN_FRAME_QP, ENC, H264, + {0}, + NULL, + msm_vidc_set_min_qp}, + + {MIN_FRAME_QP, ENC, HEVC, + {0}, + msm_vidc_adjust_hevc_min_qp, + msm_vidc_set_min_qp}, + + {MAX_FRAME_QP, ENC, H264, + {0}, + NULL, + msm_vidc_set_max_qp}, + + {MAX_FRAME_QP, ENC, HEVC, + {0}, + msm_vidc_adjust_hevc_max_qp, + msm_vidc_set_max_qp}, + + {I_FRAME_QP, ENC, HEVC, + {0}, + msm_vidc_adjust_hevc_i_frame_qp, + msm_vidc_set_frame_qp}, + + {I_FRAME_QP, ENC, H264, + {0}, + NULL, + msm_vidc_set_frame_qp}, + + {P_FRAME_QP, ENC, HEVC, + {0}, + msm_vidc_adjust_hevc_p_frame_qp, + msm_vidc_set_frame_qp}, + + {P_FRAME_QP, ENC, H264, + {0}, + NULL, + msm_vidc_set_frame_qp}, + + {B_FRAME_QP, ENC, HEVC, + {0}, + msm_vidc_adjust_hevc_b_frame_qp, + msm_vidc_set_frame_qp}, + + {B_FRAME_QP, ENC, H264, + {0}, + NULL, + msm_vidc_set_frame_qp}, + + {LAYER_TYPE, ENC, H264 | HEVC, + {CONTENT_ADAPTIVE_CODING, LTR_COUNT}}, + + {LAYER_ENABLE, ENC, H264 | HEVC, + {CONTENT_ADAPTIVE_CODING}}, + + {ENH_LAYER_COUNT, ENC, H264 | HEVC, + {GOP_SIZE, B_FRAME, BIT_RATE, MIN_QUALITY, LTR_COUNT}, + msm_vidc_adjust_layer_count, + msm_vidc_set_layer_count_and_type}, + + {L0_BR, ENC, H264 | HEVC, + {L1_BR}, + msm_vidc_adjust_layer_bitrate, + msm_vidc_set_layer_bitrate}, + + {L1_BR, ENC, H264 | HEVC, + {L2_BR}, + msm_vidc_adjust_layer_bitrate, + msm_vidc_set_layer_bitrate}, + + {L2_BR, ENC, H264 | HEVC, + {L3_BR}, + msm_vidc_adjust_layer_bitrate, + msm_vidc_set_layer_bitrate}, + + {L3_BR, ENC, H264 | HEVC, + {L4_BR}, + msm_vidc_adjust_layer_bitrate, + msm_vidc_set_layer_bitrate}, + + {L4_BR, ENC, H264 | HEVC, + {L5_BR}, + msm_vidc_adjust_layer_bitrate, + msm_vidc_set_layer_bitrate}, + + {L5_BR, ENC, H264 | HEVC, + {0}, + msm_vidc_adjust_layer_bitrate, + msm_vidc_set_layer_bitrate}, + + {ENTROPY_MODE, ENC, H264, + {BIT_RATE}, + msm_vidc_adjust_entropy_mode, + msm_vidc_set_u32}, + + {PROFILE, ENC, H264, + {ENTROPY_MODE, TRANSFORM_8X8}, + NULL, + msm_vidc_set_u32_enum}, + + {PROFILE, DEC, H264, + {ENTROPY_MODE}, + NULL, + msm_vidc_set_u32_enum}, + + {PROFILE, ENC | DEC, HEVC, + {0}, + msm_vidc_adjust_profile, + msm_vidc_set_u32_enum}, + + {PROFILE, DEC, VP9, + {0}, + NULL, + msm_vidc_set_u32_enum}, + + {LEVEL, DEC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_u32_enum}, + + {LEVEL, ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_level}, + + {HEVC_TIER, ENC | DEC, HEVC, + {0}, + NULL, + msm_vidc_set_u32_enum}, + + {LF_MODE, ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_deblock_mode}, + + {SLICE_MODE, ENC, H264 | HEVC, + {STAGE, DELIVERY_MODE}, + msm_vidc_adjust_slice_count, + msm_vidc_set_slice_count}, + + {TRANSFORM_8X8, ENC, H264, + {0}, + msm_vidc_adjust_transform_8x8, + msm_vidc_set_u32}, + + {CHROMA_QP_INDEX_OFFSET, ENC, HEVC, + {0}, + msm_vidc_adjust_chroma_qp_index_offset, + msm_vidc_set_chroma_qp_index_offset}, + + {DISPLAY_DELAY_ENABLE, DEC, H264 | HEVC | VP9, + {OUTPUT_ORDER}, + NULL, + NULL}, + + {DISPLAY_DELAY, DEC, H264 | HEVC | VP9, + {OUTPUT_ORDER}, + NULL, + NULL}, + + {OUTPUT_ORDER, DEC, H264 | HEVC | VP9, + {0}, + msm_vidc_adjust_output_order, + msm_vidc_set_u32}, + + {INPUT_BUF_HOST_MAX_COUNT, ENC | DEC, CODECS_ALL, + {0}, + msm_vidc_adjust_input_buf_host_max_count, + msm_vidc_set_u32}, + + {INPUT_BUF_HOST_MAX_COUNT, ENC, H264 | HEVC, + {0}, + msm_vidc_adjust_input_buf_host_max_count, + msm_vidc_set_u32}, + + {OUTPUT_BUF_HOST_MAX_COUNT, ENC | DEC, CODECS_ALL, + {0}, + msm_vidc_adjust_output_buf_host_max_count, + msm_vidc_set_u32}, + + {OUTPUT_BUF_HOST_MAX_COUNT, ENC, H264 | HEVC, + {0}, + msm_vidc_adjust_output_buf_host_max_count, + msm_vidc_set_u32}, + + {CONCEAL_COLOR_8BIT, DEC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_u32_packed}, + + {CONCEAL_COLOR_10BIT, DEC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_u32_packed}, + + {STAGE, ENC | DEC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_stage}, + + {STAGE, ENC, H264 | HEVC, + {0}, + NULL, + msm_vidc_set_stage}, + + {STAGE, DEC, H264 | HEVC | VP9, + {0}, + NULL, + msm_vidc_set_stage}, + + {PIPE, DEC | ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_pipe}, + + {THUMBNAIL_MODE, DEC, CODECS_ALL, + {OUTPUT_ORDER}, + NULL, + msm_vidc_set_u32}, + + {RAP_FRAME, DEC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_u32}, + + {FIRMWARE_PRIORITY_OFFSET, DEC | ENC, CODECS_ALL, + {0}, + NULL, + NULL}, + + {ALL_INTRA, ENC, H264 | HEVC, + {LTR_COUNT, SLICE_MODE, BIT_RATE}, + msm_vidc_adjust_all_intra, + NULL}, +}; + +/* Default UBWC config for LPDDR5 */ +static struct msm_vidc_ubwc_config_data ubwc_config_cliffs[] = { + UBWC_CONFIG(8, 32, 16, 0, 1, 1, 1), +}; + +static struct msm_vidc_format_capability format_data_cliffs = { + .codec_info = codec_data_cliffs, + .codec_info_size = ARRAY_SIZE(codec_data_cliffs), + .color_format_info = color_format_data_cliffs, + .color_format_info_size = ARRAY_SIZE(color_format_data_cliffs), + .color_prim_info = color_primaries_data_cliffs, + .color_prim_info_size = ARRAY_SIZE(color_primaries_data_cliffs), + .transfer_char_info = transfer_char_data_cliffs, + .transfer_char_info_size = ARRAY_SIZE(transfer_char_data_cliffs), + .matrix_coeff_info = matrix_coeff_data_cliffs, + .matrix_coeff_info_size = ARRAY_SIZE(matrix_coeff_data_cliffs), +}; + +static const struct msm_vidc_platform_data cliffs_data = { + .core_data = core_data_cliffs, + .core_data_size = ARRAY_SIZE(core_data_cliffs), + .inst_cap_data = instance_cap_data_cliffs, + .inst_cap_data_size = ARRAY_SIZE(instance_cap_data_cliffs), + .inst_cap_dependency_data = instance_cap_dependency_data_cliffs, + .inst_cap_dependency_data_size = ARRAY_SIZE(instance_cap_dependency_data_cliffs), + .csc_data.vpe_csc_custom_bias_coeff = vpe_csc_custom_bias_coeff, + .csc_data.vpe_csc_custom_matrix_coeff = vpe_csc_custom_matrix_coeff, + .csc_data.vpe_csc_custom_limit_coeff = vpe_csc_custom_limit_coeff, + .ubwc_config = ubwc_config_cliffs, + .format_data = &format_data_cliffs, +}; + +int msm_vidc_cliffs_check_ddr_type(void) +{ + u32 ddr_type; + + ddr_type = of_fdt_get_ddrtype(); + if (ddr_type != DDR_TYPE_LPDDR5 && + ddr_type != DDR_TYPE_LPDDR5X) { + d_vpr_e("%s: wrong ddr type %d\n", __func__, ddr_type); + return -EINVAL; + } + + d_vpr_h("%s: ddr type %d\n", __func__, ddr_type); + return 0; +} + +static int msm_vidc_init_data(struct msm_vidc_core *core) +{ + int rc = 0; + + d_vpr_h("%s: initialize cliffs data\n", __func__); + + core->platform->data = cliffs_data; + + rc = msm_vidc_cliffs_check_ddr_type(); + if (rc) + return rc; + + return rc; +} + +int msm_vidc_init_platform_cliffs(struct msm_vidc_core *core) +{ + int rc = 0; + + rc = msm_vidc_init_data(core); + if (rc) + return rc; + + return 0; +} diff --git a/driver/platform/cliffs/src/msm_vidc_cliffs.c b/driver/platform/cliffs/src/msm_vidc_cliffs.c new file mode 100644 index 0000000000..228abfe7e7 --- /dev/null +++ b/driver/platform/cliffs/src/msm_vidc_cliffs.c @@ -0,0 +1,5365 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2020-2022, The Linux Foundation. All rights reserved. + * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include +#include + +#include +#include + +#include +#include "msm_vidc_cliffs.h" +#include "msm_vidc_platform.h" +#include "msm_vidc_debug.h" +#include "msm_vidc_internal.h" +#include "msm_vidc_platform_ext.h" +#include "msm_vidc_memory_ext.h" +#include "msm_vidc_synx.h" +#include "resources_ext.h" +#include "msm_vidc_iris33.h" +#include "hfi_property.h" +#include "hfi_command.h" +#include "venus_hfi.h" + +/* version: major[24:31], minor[16:23], revision[0:15] */ +#define DRIVER_VERSION 0x04000000 +#define DEFAULT_VIDEO_CONCEAL_COLOR_BLACK 0x8020010 +#define MAX_BASE_LAYER_PRIORITY_ID 63 +#define MAX_OP_POINT 31 +#define MAX_BITRATE 245000000 +#define DEFAULT_BITRATE 20000000 +#define MINIMUM_FPS 1 +#define MAXIMUM_FPS 480 +#define MAXIMUM_DEC_FPS 960 +#define MAX_QP 51 +#define DEFAULT_QP 20 +#define MAX_CONSTANT_QUALITY 100 +#define MIN_SLICE_BYTE_SIZE 512 +#define MAX_SLICE_BYTE_SIZE \ + ((MAX_BITRATE) >> 3) +#define MAX_SLICE_MB_SIZE \ + (((4096 + 15) >> 4) * ((2304 + 15) >> 4)) + +#define ENC MSM_VIDC_ENCODER +#define DEC MSM_VIDC_DECODER +#define H264 MSM_VIDC_H264 +#define HEVC MSM_VIDC_HEVC +#define VP9 MSM_VIDC_VP9 +#define AV1 MSM_VIDC_AV1 +#define HEIC MSM_VIDC_HEIC +#define CODECS_ALL (H264 | HEVC | VP9 | HEIC | AV1) +#define MAXIMUM_OVERRIDE_VP9_FPS 200 + +static struct codec_info codec_data_cliffs[] = { + { + .v4l2_codec = V4L2_PIX_FMT_H264, + .vidc_codec = MSM_VIDC_H264, + .pixfmt_name = "AVC", + }, + { + .v4l2_codec = V4L2_PIX_FMT_HEVC, + .vidc_codec = MSM_VIDC_HEVC, + .pixfmt_name = "HEVC", + }, + { + .v4l2_codec = V4L2_PIX_FMT_VP9, + .vidc_codec = MSM_VIDC_VP9, + .pixfmt_name = "VP9", + }, + { + .v4l2_codec = V4L2_PIX_FMT_AV1, + .vidc_codec = MSM_VIDC_AV1, + .pixfmt_name = "AV1", + }, + { + .v4l2_codec = V4L2_PIX_FMT_VIDC_HEIC, + .vidc_codec = MSM_VIDC_HEIC, + .pixfmt_name = "HEIC", + }, +}; + +static struct color_format_info color_format_data_cliffs[] = { + { + .v4l2_color_format = V4L2_PIX_FMT_NV12, + .vidc_color_format = MSM_VIDC_FMT_NV12, + .pixfmt_name = "NV12", + }, + { + .v4l2_color_format = V4L2_PIX_FMT_NV21, + .vidc_color_format = MSM_VIDC_FMT_NV21, + .pixfmt_name = "NV21", + }, + { + .v4l2_color_format = V4L2_PIX_FMT_QC08C, + .vidc_color_format = MSM_VIDC_FMT_NV12C, + .pixfmt_name = "NV12C", + }, + { + .v4l2_color_format = V4L2_PIX_FMT_QC10C, + .vidc_color_format = MSM_VIDC_FMT_TP10C, + .pixfmt_name = "TP10C", + }, + { + .v4l2_color_format = V4L2_PIX_FMT_RGBA32, + .vidc_color_format = MSM_VIDC_FMT_RGBA8888, + .pixfmt_name = "RGBA", + }, + { + .v4l2_color_format = V4L2_PIX_FMT_P010, + .vidc_color_format = MSM_VIDC_FMT_P010, + .pixfmt_name = "P010", + }, + { + .v4l2_color_format = V4L2_META_FMT_VIDC, + .vidc_color_format = MSM_VIDC_FMT_META, + .pixfmt_name = "META", + }, +}; + +static struct color_primaries_info color_primaries_data_cliffs[] = { + { + .v4l2_color_primaries = V4L2_COLORSPACE_DEFAULT, + .vidc_color_primaries = MSM_VIDC_PRIMARIES_RESERVED, + }, + { + .v4l2_color_primaries = V4L2_COLORSPACE_DEFAULT, + .vidc_color_primaries = MSM_VIDC_PRIMARIES_UNSPECIFIED, + }, + { + .v4l2_color_primaries = V4L2_COLORSPACE_REC709, + .vidc_color_primaries = MSM_VIDC_PRIMARIES_BT709, + }, + { + .v4l2_color_primaries = V4L2_COLORSPACE_470_SYSTEM_M, + .vidc_color_primaries = MSM_VIDC_PRIMARIES_BT470_SYSTEM_M, + }, + { + .v4l2_color_primaries = V4L2_COLORSPACE_470_SYSTEM_BG, + .vidc_color_primaries = MSM_VIDC_PRIMARIES_BT470_SYSTEM_BG, + }, + { + .v4l2_color_primaries = V4L2_COLORSPACE_SMPTE170M, + .vidc_color_primaries = MSM_VIDC_PRIMARIES_BT601_525, + }, + { + .v4l2_color_primaries = V4L2_COLORSPACE_SMPTE240M, + .vidc_color_primaries = MSM_VIDC_PRIMARIES_SMPTE_ST240M, + }, + { + .v4l2_color_primaries = V4L2_COLORSPACE_VIDC_GENERIC_FILM, + .vidc_color_primaries = MSM_VIDC_PRIMARIES_GENERIC_FILM, + }, + { + .v4l2_color_primaries = V4L2_COLORSPACE_BT2020, + .vidc_color_primaries = MSM_VIDC_PRIMARIES_BT2020, + }, + { + .v4l2_color_primaries = V4L2_COLORSPACE_DCI_P3, + .vidc_color_primaries = MSM_VIDC_PRIMARIES_SMPTE_RP431_2, + }, + { + .v4l2_color_primaries = V4L2_COLORSPACE_VIDC_EG431, + .vidc_color_primaries = MSM_VIDC_PRIMARIES_SMPTE_EG431_1, + }, + { + .v4l2_color_primaries = V4L2_COLORSPACE_VIDC_EBU_TECH, + .vidc_color_primaries = MSM_VIDC_PRIMARIES_SMPTE_EBU_TECH, + }, +}; + +static struct transfer_char_info transfer_char_data_cliffs[] = { + { + .v4l2_transfer_char = V4L2_XFER_FUNC_DEFAULT, + .vidc_transfer_char = MSM_VIDC_TRANSFER_RESERVED, + }, + { + .v4l2_transfer_char = V4L2_XFER_FUNC_DEFAULT, + .vidc_transfer_char = MSM_VIDC_TRANSFER_UNSPECIFIED, + }, + { + .v4l2_transfer_char = V4L2_XFER_FUNC_709, + .vidc_transfer_char = MSM_VIDC_TRANSFER_BT709, + }, + { + .v4l2_transfer_char = V4L2_XFER_FUNC_VIDC_BT470_SYSTEM_M, + .vidc_transfer_char = MSM_VIDC_TRANSFER_BT470_SYSTEM_M, + }, + { + .v4l2_transfer_char = V4L2_XFER_FUNC_VIDC_BT470_SYSTEM_BG, + .vidc_transfer_char = MSM_VIDC_TRANSFER_BT470_SYSTEM_BG, + }, + { + .v4l2_transfer_char = V4L2_XFER_FUNC_VIDC_BT601_525_OR_625, + .vidc_transfer_char = MSM_VIDC_TRANSFER_BT601_525_OR_625, + }, + { + .v4l2_transfer_char = V4L2_XFER_FUNC_SMPTE240M, + .vidc_transfer_char = MSM_VIDC_TRANSFER_SMPTE_ST240M, + }, + { + .v4l2_transfer_char = V4L2_XFER_FUNC_VIDC_LINEAR, + .vidc_transfer_char = MSM_VIDC_TRANSFER_LINEAR, + }, + { + .v4l2_transfer_char = V4L2_XFER_FUNC_VIDC_XVYCC, + .vidc_transfer_char = MSM_VIDC_TRANSFER_XVYCC, + }, + { + .v4l2_transfer_char = V4L2_XFER_FUNC_VIDC_BT1361, + .vidc_transfer_char = MSM_VIDC_TRANSFER_BT1361_0, + }, + { + .v4l2_transfer_char = V4L2_XFER_FUNC_SRGB, + .vidc_transfer_char = MSM_VIDC_TRANSFER_SRGB_SYCC, + }, + { + .v4l2_transfer_char = V4L2_XFER_FUNC_VIDC_BT2020, + .vidc_transfer_char = MSM_VIDC_TRANSFER_BT2020_14, + }, + { + .v4l2_transfer_char = V4L2_XFER_FUNC_SMPTE2084, + .vidc_transfer_char = MSM_VIDC_TRANSFER_SMPTE_ST2084_PQ, + }, + { + .v4l2_transfer_char = V4L2_XFER_FUNC_VIDC_ST428, + .vidc_transfer_char = MSM_VIDC_TRANSFER_SMPTE_ST428_1, + }, + { + .v4l2_transfer_char = V4L2_XFER_FUNC_VIDC_HLG, + .vidc_transfer_char = MSM_VIDC_TRANSFER_BT2100_2_HLG, + }, +}; + +static struct matrix_coeff_info matrix_coeff_data_cliffs[] = { + { + .v4l2_matrix_coeff = V4L2_YCBCR_ENC_DEFAULT, + .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_RESERVED, + }, + { + .v4l2_matrix_coeff = V4L2_YCBCR_ENC_DEFAULT, + .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_UNSPECIFIED, + }, + { + .v4l2_matrix_coeff = V4L2_YCBCR_VIDC_SRGB_OR_SMPTE_ST428, + .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_SRGB_SMPTE_ST428_1, + }, + { + .v4l2_matrix_coeff = V4L2_YCBCR_ENC_709, + .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_BT709, + }, + { + .v4l2_matrix_coeff = V4L2_YCBCR_ENC_XV709, + .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_BT709, + }, + { + .v4l2_matrix_coeff = V4L2_YCBCR_VIDC_FCC47_73_682, + .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_FCC_TITLE_47, + }, + { + .v4l2_matrix_coeff = V4L2_YCBCR_ENC_XV601, + .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_BT470_SYS_BG_OR_BT601_625, + }, + { + .v4l2_matrix_coeff = V4L2_YCBCR_ENC_601, + .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_BT601_525_BT1358_525_OR_625, + }, + { + .v4l2_matrix_coeff = V4L2_YCBCR_ENC_SMPTE240M, + .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_SMPTE_ST240, + }, + { + .v4l2_matrix_coeff = V4L2_YCBCR_ENC_BT2020, + .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_BT2020_NON_CONSTANT, + }, + { + .v4l2_matrix_coeff = V4L2_YCBCR_ENC_BT2020_CONST_LUM, + .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_BT2020_CONSTANT, + }, +}; + +static struct msm_platform_core_capability core_data_cliffs_v0[] = { + /* {type, value} */ + {ENC_CODECS, H264 | HEVC | HEIC}, + {DEC_CODECS, H264 | HEVC | VP9 | AV1 | HEIC}, + {MAX_SESSION_COUNT, 16}, + {MAX_NUM_720P_SESSIONS, 16}, + {MAX_NUM_1080P_SESSIONS, 16}, + {MAX_NUM_4K_SESSIONS, 8}, + {MAX_NUM_8K_SESSIONS, 2}, + {MAX_SECURE_SESSION_COUNT, 3}, + {MAX_RT_MBPF, 174080}, /* (8192x4352)/256 + (4096x2176)/256*/ + {MAX_MBPF, 278528}, /* ((8192x4352)/256) * 2 */ + {MAX_MBPS, 7833600}, + /* max_load + * 7680x4320@60fps or 3840x2176@240fps + * which is greater than 4096x2176@120fps, + * 8192x4320@48fps + */ + {MAX_IMAGE_MBPF, 1048576}, /* (16384x16384)/256 */ + {MAX_MBPF_HQ, 8160}, /* ((1920x1088)/256) */ + {MAX_MBPS_HQ, 489600}, /* ((1920x1088)/256)@60fps */ + {MAX_MBPF_B_FRAME, 32640}, /* 3840x2176/256 */ + {MAX_MBPS_B_FRAME, 1958400}, /* 3840x2176/256 MBs@60fps */ + {MAX_MBPS_ALL_INTRA, 1044480}, /* 4096x2176/256 MBs@30fps */ + {MAX_ENH_LAYER_COUNT, 5}, + {NUM_VPP_PIPE, 4}, + {SW_PC, 1}, + {FW_UNLOAD, 0}, + {HW_RESPONSE_TIMEOUT, HW_RESPONSE_TIMEOUT_VALUE}, /* 1000 ms */ + {SW_PC_DELAY, SW_PC_DELAY_VALUE }, /* 1500 ms (>HW_RESPONSE_TIMEOUT)*/ + {FW_UNLOAD_DELAY, FW_UNLOAD_DELAY_VALUE }, /* 3000 ms (>SW_PC_DELAY)*/ + {PAGEFAULT_NON_FATAL, 1}, + {PAGETABLE_CACHING, 0}, + {DCVS, 1}, + {DECODE_BATCH, 1}, + {DECODE_BATCH_TIMEOUT, 200}, + {STATS_TIMEOUT_MS, 2000}, + {AV_SYNC_WINDOW_SIZE, 40}, + {NON_FATAL_FAULTS, 1}, + {ENC_AUTO_FRAMERATE, 1}, + {DEVICE_CAPS, V4L2_CAP_VIDEO_M2M_MPLANE | V4L2_CAP_META_CAPTURE | + V4L2_CAP_STREAMING}, + {SUPPORTS_SYNX_FENCE, 1}, + {SUPPORTS_REQUESTS, 0}, +}; + +static struct msm_platform_core_capability core_data_cliffs_v1[] = { + /* {type, value} */ + {ENC_CODECS, H264 | HEVC | HEIC}, + {DEC_CODECS, H264 | HEVC | VP9 | AV1 | HEIC}, + {MAX_SESSION_COUNT, 16}, + {MAX_NUM_720P_SESSIONS, 16}, + {MAX_NUM_1080P_SESSIONS, 16}, + {MAX_NUM_4K_SESSIONS, 8}, + {MAX_NUM_8K_SESSIONS, 2}, + {MAX_SECURE_SESSION_COUNT, 3}, + {MAX_RT_MBPF, 174080}, /* (8192x4352)/256 + (4096x2176)/256*/ + {MAX_MBPF, 278528}, /* ((8192x4352)/256) * 2 */ + {MAX_MBPS, 7833600}, + /* max_load + * 7680x4320@60fps or 3840x2176@240fps + * which is greater than 4096x2176@120fps, + * 8192x4320@48fps + */ + {MAX_IMAGE_MBPF, 1048576}, /* (16384x16384)/256 */ + {MAX_MBPF_HQ, 8160}, /* ((1920x1088)/256) */ + {MAX_MBPS_HQ, 489600}, /* ((1920x1088)/256)@60fps */ + {MAX_MBPF_B_FRAME, 32640}, /* 3840x2176/256 */ + {MAX_MBPS_B_FRAME, 1958400}, /* 3840x2176/256 MBs@60fps */ + {MAX_MBPS_ALL_INTRA, 1044480}, /* 4096x2176/256 MBs@30fps */ + {MAX_ENH_LAYER_COUNT, 5}, + {NUM_VPP_PIPE, 4}, + {SW_PC, 1}, + {FW_UNLOAD, 0}, + {HW_RESPONSE_TIMEOUT, HW_RESPONSE_TIMEOUT_VALUE}, /* 1000 ms */ + {SW_PC_DELAY, SW_PC_DELAY_VALUE }, /* 1500 ms (>HW_RESPONSE_TIMEOUT)*/ + {FW_UNLOAD_DELAY, FW_UNLOAD_DELAY_VALUE }, /* 3000 ms (>SW_PC_DELAY)*/ + {PAGEFAULT_NON_FATAL, 1}, + {PAGETABLE_CACHING, 0}, + {DCVS, 1}, + {DECODE_BATCH, 1}, + {DECODE_BATCH_TIMEOUT, 200}, + {STATS_TIMEOUT_MS, 2000}, + {AV_SYNC_WINDOW_SIZE, 40}, + {NON_FATAL_FAULTS, 1}, + {ENC_AUTO_FRAMERATE, 1}, + {DEVICE_CAPS, V4L2_CAP_VIDEO_M2M_MPLANE | V4L2_CAP_META_CAPTURE | + V4L2_CAP_STREAMING}, + {SUPPORTS_SYNX_FENCE, 1}, + {SUPPORTS_REQUESTS, 0}, +}; + +static int msm_vidc_set_ring_buffer_count_cliffs(void *instance, + enum msm_vidc_inst_capability_type cap_id) +{ + int rc = 0; + struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; + struct v4l2_format *output_fmt, *input_fmt; + struct msm_vidc_core *core; + u32 count = 0, data_size = 0, pixel_count = 0, fps = 0; + u32 frame_rate = 0, operating_rate = 0; + + core = inst->core; + output_fmt = &inst->fmts[OUTPUT_PORT]; + input_fmt = &inst->fmts[INPUT_PORT]; + + frame_rate = inst->capabilities[FRAME_RATE].value >> 16; + operating_rate = inst->capabilities[OPERATING_RATE].value >> 16; + fps = max(frame_rate, operating_rate); + pixel_count = output_fmt->fmt.pix_mp.width * + output_fmt->fmt.pix_mp.height; + + /* + * try to enable ring buffer feature if +  * resolution >= 8k and fps >= 30fps and +  * resolution >= 4k and fps >= 120fps and +  * resolution >= 1080p and fps >= 480fps and +  * resolution >= 720p and fps >= 960fps + */ + if ((pixel_count >= 7680 * 4320 && fps >= 30) || + (pixel_count >= 3840 * 2160 && fps >= 120) || + (pixel_count >= 1920 * 1080 && fps >= 480) || + (pixel_count >= 1280 * 720 && fps >= 960)) { + data_size = input_fmt->fmt.pix_mp.plane_fmt[0].sizeimage; + i_vpr_h(inst, "%s: calculate ring buffer count\n", __func__); + rc = call_session_op(core, ring_buf_count, inst, data_size); + if (rc) { + i_vpr_e(inst, "%s: failed to calculate ring buffer count\n", + __func__); + /* ignore error */ + rc = 0; + inst->capabilities[cap_id].value = 0; + } + } else { + i_vpr_h(inst, + "%s: session %ux%u@%u fps does not support ring buffer\n", + __func__, output_fmt->fmt.pix_mp.width, + output_fmt->fmt.pix_mp.height, fps); + inst->capabilities[cap_id].value = 0; + } + + count = inst->capabilities[cap_id].value; + i_vpr_h(inst, "%s: ring buffer count: %u\n", __func__, count); + rc = venus_hfi_session_property(inst, + HFI_PROP_ENC_RING_BIN_BUF, + HFI_HOST_FLAGS_NONE, + HFI_PORT_BITSTREAM, + HFI_PAYLOAD_U32, + &count, + sizeof(u32)); + if (rc) + return rc; + + return rc; +} + +static struct msm_platform_inst_capability instance_cap_data_cliffs_v0[] = { + /* {cap, domain, codec, + * min, max, step_or_mask, value, + * v4l2_id, + * hfi_id, + * flags} + */ + {DRV_VERSION, DEC|ENC, CODECS_ALL, + 0, INT_MAX, 1, DRIVER_VERSION, + V4L2_CID_MPEG_VIDC_DRIVER_VERSION}, + + {FRAME_WIDTH, DEC, CODECS_ALL, 96, 8192, 1, 1920}, + + {FRAME_WIDTH, DEC, VP9, 96, 4096, 1, 1920}, + + {FRAME_WIDTH, ENC, CODECS_ALL, 128, 8192, 1, 1920}, + + {FRAME_WIDTH, ENC, HEVC, 96, 8192, 1, 1920}, + + {FRAME_WIDTH, ENC, HEIC, 128, 16384, 1, 16384}, + + {LOSSLESS_FRAME_WIDTH, ENC, CODECS_ALL, 128, 4096, 1, 1920}, + + {LOSSLESS_FRAME_WIDTH, ENC, HEVC, 96, 4096, 1, 1920}, + + {SECURE_FRAME_WIDTH, DEC, CODECS_ALL, 96, 4096, 1, 1920}, + + {SECURE_FRAME_WIDTH, ENC, CODECS_ALL, 128, 4096, 1, 1920}, + + {SECURE_FRAME_WIDTH, ENC, HEVC, 96, 4096, 1, 1920}, + + {FRAME_HEIGHT, DEC, CODECS_ALL, 96, 8192, 1, 1080}, + + {FRAME_HEIGHT, DEC, VP9, 96, 4096, 1, 1080}, + + {FRAME_HEIGHT, ENC, CODECS_ALL, 128, 8192, 1, 1080}, + + {FRAME_HEIGHT, ENC, HEVC, 96, 8192, 1, 1080}, + + {FRAME_HEIGHT, ENC, HEIC, 128, 16384, 1, 16384}, + + {LOSSLESS_FRAME_HEIGHT, ENC, CODECS_ALL, 128, 4096, 1, 1080}, + + {LOSSLESS_FRAME_HEIGHT, ENC, HEVC, 96, 4096, 1, 1080}, + + {SECURE_FRAME_HEIGHT, DEC, CODECS_ALL, 96, 4096, 1, 1080}, + + {SECURE_FRAME_HEIGHT, ENC, CODECS_ALL, 128, 4096, 1, 1080}, + + {SECURE_FRAME_HEIGHT, ENC, HEVC, 96, 4096, 1, 1080}, + + {PIX_FMTS, ENC | DEC, H264, + MSM_VIDC_FMT_NV12, + MSM_VIDC_FMT_NV12C, + MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C, + MSM_VIDC_FMT_NV12C}, + + {PIX_FMTS, ENC | DEC, HEVC | VP9 | AV1, + MSM_VIDC_FMT_NV12, + MSM_VIDC_FMT_TP10C, + MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C | + MSM_VIDC_FMT_P010 | MSM_VIDC_FMT_TP10C, + MSM_VIDC_FMT_NV12C}, + + {PIX_FMTS, ENC, HEIC, + MSM_VIDC_FMT_NV12, + MSM_VIDC_FMT_P010, + MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_P010, + MSM_VIDC_FMT_NV12}, + + {PIX_FMTS, DEC, HEIC, + MSM_VIDC_FMT_NV12, + MSM_VIDC_FMT_TP10C, + MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C | + MSM_VIDC_FMT_P010 | MSM_VIDC_FMT_TP10C, + MSM_VIDC_FMT_NV12C}, + + {MIN_BUFFERS_INPUT, ENC | DEC, CODECS_ALL, 0, 64, 1, 4, + V4L2_CID_MIN_BUFFERS_FOR_OUTPUT, + 0, + CAP_FLAG_VOLATILE}, + + {MIN_BUFFERS_INPUT, ENC | DEC, HEIC, 0, 64, 1, 1, + V4L2_CID_MIN_BUFFERS_FOR_OUTPUT, + 0, + CAP_FLAG_VOLATILE}, + + {MIN_BUFFERS_OUTPUT, ENC | DEC, CODECS_ALL, + 0, 64, 1, 4, + V4L2_CID_MIN_BUFFERS_FOR_CAPTURE, + HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_VOLATILE}, + + /* (8192 * 4320) / 256 */ + {MBPF, ENC, CODECS_ALL, 64, 138240, 1, 138240}, + + {MBPF, ENC, HEVC, 36, 138240, 1, 138240}, + + /* ((16384x16384)/256) */ + {MBPF, ENC, HEIC, 36, 1048576, 1, 1048576}, + + {MBPF, DEC, CODECS_ALL, 36, 138240, 1, 138240}, + + /* (4096 * 2304) / 256 */ + {MBPF, DEC, VP9, 36, 36864, 1, 36864}, + + /* ((8192x8192)/256) */ + {MBPF, DEC, HEIC, 64, 262144, 1, 262144 }, + + /* (4096 * 2304) / 256 */ + {LOSSLESS_MBPF, ENC, H264 | HEVC, 64, 36864, 1, 36864}, + + /* Batch Mode Decode */ + /* TODO: update with new values based on updated voltage corner */ + {BATCH_MBPF, DEC, H264 | HEVC | VP9 | AV1, 64, 34816, 1, 34816}, + + /* (4096 * 2304) / 256 */ + {BATCH_FPS, DEC, H264 | HEVC | VP9 | AV1, 1, 120, 1, 120}, + + {SECURE_MBPF, ENC | DEC, H264 | HEVC | VP9 | AV1, 64, 36864, 1, 36864}, + + {SECURE_MBPF, ENC, HEVC, 36, 36864, 1, 36864}, + + {FRAME_RATE, ENC, CODECS_ALL, + (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), + 1, (DEFAULT_FPS << 16), + 0, + HFI_PROP_FRAME_RATE, + CAP_FLAG_OUTPUT_PORT}, + + {FRAME_RATE, ENC, HEIC, + (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), + 1, (MINIMUM_FPS << 16), + 0, + HFI_PROP_FRAME_RATE, + CAP_FLAG_OUTPUT_PORT}, + + {FRAME_RATE, DEC, CODECS_ALL, + (MINIMUM_FPS << 16), (MAXIMUM_DEC_FPS << 16), + 1, (DEFAULT_FPS << 16), + V4L2_CID_MPEG_VIDC_FRAME_RATE, + 0, + CAP_FLAG_OUTPUT_PORT | + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {FRAME_RATE, DEC, VP9, + (MINIMUM_FPS << 16), (MAXIMUM_OVERRIDE_VP9_FPS << 16), + 1, (DEFAULT_FPS << 16), + V4L2_CID_MPEG_VIDC_FRAME_RATE, + 0, + CAP_FLAG_OUTPUT_PORT | + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {OPERATING_RATE, ENC, CODECS_ALL, + (MINIMUM_FPS << 16), INT_MAX, + 1, (DEFAULT_FPS << 16)}, + + {OPERATING_RATE, DEC, CODECS_ALL, + (MINIMUM_FPS << 16), INT_MAX, + 1, (DEFAULT_FPS << 16), + V4L2_CID_MPEG_VIDC_OPERATING_RATE, + 0, + CAP_FLAG_OUTPUT_PORT | + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {INPUT_RATE, ENC | DEC, CODECS_ALL, + (MINIMUM_FPS << 16), INT_MAX, + 1, (DEFAULT_FPS << 16)}, + + {TIMESTAMP_RATE, ENC | DEC, CODECS_ALL, + (MINIMUM_FPS << 16), INT_MAX, + 1, (DEFAULT_FPS << 16)}, + + {SCALE_FACTOR, ENC, H264 | HEVC, 1, 8, 1, 8}, + + {MB_CYCLES_VSP, ENC, CODECS_ALL, 25, 25, 1, 25}, + + {MB_CYCLES_VSP, DEC, CODECS_ALL, 25, 25, 1, 25}, + + {MB_CYCLES_VSP, DEC, VP9 | AV1, 60, 60, 1, 60}, + + {MB_CYCLES_VPP, ENC, CODECS_ALL, 675, 675, 1, 675}, + + {MB_CYCLES_VPP, DEC, CODECS_ALL, 200, 200, 1, 200}, + + {MB_CYCLES_LP, ENC, CODECS_ALL, 320, 320, 1, 320}, + + {MB_CYCLES_LP, DEC, CODECS_ALL, 200, 200, 1, 200}, + + {MB_CYCLES_FW, ENC | DEC, CODECS_ALL, 489583, 489583, 1, 489583}, + + {MB_CYCLES_FW_VPP, ENC, CODECS_ALL, 48405, 48405, 1, 48405}, + + {MB_CYCLES_FW_VPP, DEC, CODECS_ALL, 66234, 66234, 1, 66234}, + + {ENC_RING_BUFFER_COUNT, ENC, CODECS_ALL, + 0, MAX_ENC_RING_BUF_COUNT, 1, 0}, + + {CLIENT_ID, ENC | DEC, CODECS_ALL, + INVALID_CLIENT_ID, INT_MAX, 1, INVALID_CLIENT_ID, + V4L2_CID_MPEG_VIDC_CLIENT_ID}, + + {SECURE_MODE, ENC | DEC, H264 | HEVC | VP9 | AV1, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_SECURE, + HFI_PROP_SECURE, + CAP_FLAG_NONE}, + + /* + * Client will enable V4L2_CID_MPEG_VIDC_METADATA_OUTBUF_FENCE + * to get fence_id in input metadata buffer done. + */ + {META_OUTBUF_FENCE, DEC, H264 | HEVC | VP9 | AV1, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_INPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_OUTBUF_FENCE, + HFI_PROP_FENCE, + CAP_FLAG_BITMASK | CAP_FLAG_META | CAP_FLAG_DYNAMIC_ALLOWED}, + + /* + * Client to do set_ctrl with FENCE_ID to set fence_id + * and then client will do get_ctrl with FENCE_FD to get + * fence_fd corresponding to client set fence_id. + */ + {FENCE_ID, DEC, CODECS_ALL, + 0, INT_MAX, 1, 0, + V4L2_CID_MPEG_VIDC_SW_FENCE_ID, + 0, + CAP_FLAG_DYNAMIC_ALLOWED | CAP_FLAG_OUTPUT_PORT}, + + {FENCE_FD, DEC, CODECS_ALL, + INVALID_FD, INT_MAX, 1, INVALID_FD, + V4L2_CID_MPEG_VIDC_SW_FENCE_FD, + 0, + CAP_FLAG_VOLATILE}, + + /* Fence type for input buffer. Currently unused */ + {INBUF_FENCE_TYPE, DEC, H264 | HEVC | VP9 | AV1, + MSM_VIDC_FENCE_NONE, MSM_VIDC_FENCE_NONE, + BIT(MSM_VIDC_FENCE_NONE), + MSM_VIDC_FENCE_NONE, + 0, + HFI_PROP_FENCE_TYPE, + CAP_FLAG_MENU | CAP_FLAG_INPUT_PORT}, + + {OUTBUF_FENCE_TYPE, DEC, H264 | HEVC | VP9 | AV1, + MSM_VIDC_FENCE_NONE, MSM_VIDC_SYNX_V2_FENCE, + BIT(MSM_VIDC_FENCE_NONE) | BIT(MSM_VIDC_SW_FENCE) | + BIT(MSM_VIDC_SYNX_V2_FENCE), + MSM_VIDC_FENCE_NONE, + 0, + HFI_PROP_FENCE_TYPE, + CAP_FLAG_MENU | CAP_FLAG_OUTPUT_PORT}, + + /* Fence direction for input buffer. Currently unused */ + {INBUF_FENCE_DIRECTION, DEC, H264 | HEVC | VP9 | AV1, + MSM_VIDC_FENCE_DIR_NONE, MSM_VIDC_FENCE_DIR_NONE, + BIT(MSM_VIDC_FENCE_DIR_NONE), + MSM_VIDC_FENCE_DIR_NONE, + 0, + HFI_PROP_FENCE_DIRECTION, + CAP_FLAG_MENU | CAP_FLAG_INPUT_PORT}, + + {OUTBUF_FENCE_DIRECTION, DEC, H264 | HEVC | VP9 | AV1, + MSM_VIDC_FENCE_DIR_NONE, MSM_VIDC_FENCE_DIR_RX, + BIT(MSM_VIDC_FENCE_DIR_NONE) | BIT(MSM_VIDC_FENCE_DIR_TX) | + BIT(MSM_VIDC_FENCE_DIR_RX), + MSM_VIDC_FENCE_DIR_NONE, + 0, + HFI_PROP_FENCE_DIRECTION, + CAP_FLAG_MENU | CAP_FLAG_OUTPUT_PORT}, + + {FENCE_ERROR_DATA_CORRUPT, DEC, H264 | HEVC | VP9 | AV1, + 0, 1, 1, 0, + 0, + HFI_PROP_FENCE_ERROR_DATA_CORRUPT}, + + {TS_REORDER, DEC, H264 | HEVC, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_TS_REORDER}, + + {HFLIP, ENC, CODECS_ALL, + 0, 1, 1, 0, + V4L2_CID_HFLIP, + HFI_PROP_FLIP, + CAP_FLAG_OUTPUT_PORT | + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {VFLIP, ENC, CODECS_ALL, + 0, 1, 1, 0, + V4L2_CID_VFLIP, + HFI_PROP_FLIP, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {ROTATION, ENC, CODECS_ALL, + 0, 270, 90, 0, + V4L2_CID_ROTATE, + HFI_PROP_ROTATION, + CAP_FLAG_OUTPUT_PORT}, + + {SUPER_FRAME, ENC, H264 | HEVC, + 0, 32, 1, 0, + V4L2_CID_MPEG_VIDC_SUPERFRAME, 0, + CAP_FLAG_DYNAMIC_ALLOWED}, + + {SLICE_DECODE, DEC, H264 | HEVC | AV1, + V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_MSM_VIDC_DISABLE, + 0, + V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDEO_DECODER_SLICE_INTERFACE, + 0}, + + {HEADER_MODE, ENC, CODECS_ALL, + V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE, + V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME, + BIT(V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE) | + BIT(V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME), + V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE, + V4L2_CID_MPEG_VIDEO_HEADER_MODE, + HFI_PROP_SEQ_HEADER_MODE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {PREPEND_SPSPPS_TO_IDR, ENC, CODECS_ALL, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDEO_PREPEND_SPSPPS_TO_IDR}, + + {VUI_TIMING_INFO, ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_VUI_TIMING_INFO, + HFI_PROP_DISABLE_VUI_TIMING_INFO, + CAP_FLAG_OUTPUT_PORT}, + + {WITHOUT_STARTCODE, ENC, CODECS_ALL, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE, + HFI_PROP_NAL_LENGTH_FIELD, + CAP_FLAG_OUTPUT_PORT}, + + {WITHOUT_STARTCODE, DEC, AV1, + 0, 0, 1, 0, + V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE, + HFI_PROP_NAL_LENGTH_FIELD, + CAP_FLAG_INPUT_PORT}, + + {NAL_LENGTH_FIELD, ENC, CODECS_ALL, + V4L2_MPEG_VIDEO_HEVC_SIZE_0, + V4L2_MPEG_VIDEO_HEVC_SIZE_4, + BIT(V4L2_MPEG_VIDEO_HEVC_SIZE_0) | + BIT(V4L2_MPEG_VIDEO_HEVC_SIZE_4), + V4L2_MPEG_VIDEO_HEVC_SIZE_0, + V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD, + HFI_PROP_NAL_LENGTH_FIELD, + CAP_FLAG_MENU | CAP_FLAG_OUTPUT_PORT}, + + /* TODO: Firmware introduced enumeration type for this + * with and without seq header. + */ + {REQUEST_I_FRAME, ENC, H264 | HEVC, + 0, 0, 0, 0, + V4L2_CID_MPEG_VIDEO_FORCE_KEY_FRAME, + HFI_PROP_REQUEST_SYNC_FRAME, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + /* Enc: Keeping CABAC and CAVLC as same bitrate. + * Dec: there's no use of Bitrate cap + */ + {BIT_RATE, ENC, H264 | HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_BITRATE, + HFI_PROP_TOTAL_BITRATE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {BITRATE_MODE, ENC, H264, + V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, + V4L2_MPEG_VIDEO_BITRATE_MODE_CBR, + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_VBR) | + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CBR), + V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, + V4L2_CID_MPEG_VIDEO_BITRATE_MODE, + HFI_PROP_RATE_CONTROL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {BITRATE_MODE, ENC, HEVC, + V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, + V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_VBR) | + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CBR) | + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CQ), + V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, + V4L2_CID_MPEG_VIDEO_BITRATE_MODE, + HFI_PROP_RATE_CONTROL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {BITRATE_MODE, ENC, HEIC, + V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, + V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CQ), + V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, + V4L2_CID_MPEG_VIDEO_BITRATE_MODE, + HFI_PROP_RATE_CONTROL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {CABAC_MAX_BITRATE, ENC, H264 | HEVC, 0, + 160000000, 1, 160000000}, + + {CAVLC_MAX_BITRATE, ENC, H264, 0, + 220000000, 1, 220000000}, + + {ALLINTRA_MAX_BITRATE, ENC, H264 | HEVC, 0, + 245000000, 1, 245000000}, + + {LOWLATENCY_MAX_BITRATE, ENC, H264 | HEVC, 0, + 70000000, 1, 70000000}, + + {NUM_COMV, DEC, CODECS_ALL, + 0, INT_MAX, 1, 0}, + + {LOSSLESS, ENC, HEVC, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU}, + + {FRAME_SKIP_MODE, ENC, H264 | HEVC | HEIC, + V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED, + V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT, + BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED) | + BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_LEVEL_LIMIT) | + BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT), + V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED, + V4L2_CID_MPEG_VIDEO_FRAME_SKIP_MODE, + 0, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {FRAME_RC_ENABLE, ENC, H264 | HEVC | HEIC, + 0, 1, 1, 1, + V4L2_CID_MPEG_VIDEO_FRAME_RC_ENABLE}, + + {CONSTANT_QUALITY, ENC, HEVC, + 1, MAX_CONSTANT_QUALITY, 1, 90, + V4L2_CID_MPEG_VIDEO_CONSTANT_QUALITY, + HFI_PROP_CONSTANT_QUALITY, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {CONSTANT_QUALITY, ENC, HEIC, + 1, MAX_CONSTANT_QUALITY, 1, 100, + V4L2_CID_MPEG_VIDEO_CONSTANT_QUALITY, + HFI_PROP_CONSTANT_QUALITY, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {GOP_SIZE, ENC, CODECS_ALL, + 0, INT_MAX, 1, 2 * DEFAULT_FPS - 1, + V4L2_CID_MPEG_VIDEO_GOP_SIZE, + HFI_PROP_MAX_GOP_FRAMES, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {GOP_SIZE, ENC, HEIC, + 0, INT_MAX, 1, 0 /* all intra */, + V4L2_CID_MPEG_VIDEO_GOP_SIZE, + HFI_PROP_MAX_GOP_FRAMES, + CAP_FLAG_OUTPUT_PORT | + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {GOP_CLOSURE, ENC, H264 | HEVC, + 0, 1, 1, 1, + V4L2_CID_MPEG_VIDEO_GOP_CLOSURE, + 0}, + + {B_FRAME, ENC, H264 | HEVC, + 0, 7, 1, 0, + V4L2_CID_MPEG_VIDEO_B_FRAMES, + HFI_PROP_MAX_B_FRAMES, + CAP_FLAG_OUTPUT_PORT}, + + {B_FRAME, ENC, HEIC, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDEO_B_FRAMES, + HFI_PROP_MAX_B_FRAMES, + CAP_FLAG_OUTPUT_PORT}, + + {BLUR_TYPES, ENC, H264 | HEVC, + MSM_VIDC_BLUR_NONE, MSM_VIDC_BLUR_EXTERNAL, + BIT(MSM_VIDC_BLUR_NONE) | BIT(MSM_VIDC_BLUR_EXTERNAL), + MSM_VIDC_BLUR_NONE, + V4L2_CID_MPEG_VIDC_VIDEO_BLUR_TYPES, + HFI_PROP_BLUR_TYPES, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {BLUR_RESOLUTION, ENC, H264 | HEVC, + 0, S32_MAX, 1, 0, + V4L2_CID_MPEG_VIDC_VIDEO_BLUR_RESOLUTION, + HFI_PROP_BLUR_RESOLUTION, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {CSC, ENC, CODECS_ALL, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_CSC, + HFI_PROP_CSC}, + + {CSC_CUSTOM_MATRIX, ENC, CODECS_ALL, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_VIDEO_VPE_CSC_CUSTOM_MATRIX, + HFI_PROP_CSC_MATRIX, + CAP_FLAG_OUTPUT_PORT}, + + {LOWLATENCY_MODE, ENC, H264 | HEVC, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_LOWLATENCY_REQUEST, + 0, + CAP_FLAG_NONE}, + + {LOWLATENCY_MODE, DEC, H264 | HEVC | VP9 | AV1, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_LOWLATENCY_REQUEST, + HFI_PROP_SEQ_CHANGE_AT_SYNC_FRAME, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {LTR_COUNT, ENC, H264 | HEVC, + 0, MAX_LTR_FRAME_COUNT_5, 1, 0, + V4L2_CID_MPEG_VIDEO_LTR_COUNT, + HFI_PROP_LTR_COUNT, + CAP_FLAG_OUTPUT_PORT}, + + {USE_LTR, ENC, H264 | HEVC, + 0, + ((1 << MAX_LTR_FRAME_COUNT_5) - 1), + 0, 0, + V4L2_CID_MPEG_VIDEO_USE_LTR_FRAMES, + HFI_PROP_LTR_USE, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {MARK_LTR, ENC, H264 | HEVC, + INVALID_DEFAULT_MARK_OR_USE_LTR, + (MAX_LTR_FRAME_COUNT_5 - 1), + 1, INVALID_DEFAULT_MARK_OR_USE_LTR, + V4L2_CID_MPEG_VIDEO_FRAME_LTR_INDEX, + HFI_PROP_LTR_MARK, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {BASELAYER_PRIORITY, ENC, H264, + 0, MAX_BASE_LAYER_PRIORITY_ID, 1, 0, + V4L2_CID_MPEG_VIDEO_BASELAYER_PRIORITY_ID, + HFI_PROP_BASELAYER_PRIORITYID, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {IR_TYPE, ENC, H264 | HEVC, + V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_RANDOM, + V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_CYCLIC, + BIT(V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_RANDOM) | + BIT(V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_CYCLIC), + V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_RANDOM, + V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE, + 0, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {IR_PERIOD, ENC, H264 | HEVC, + 0, INT_MAX, 1, 0, + V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD, + 0, + CAP_FLAG_INPUT_PORT | CAP_FLAG_OUTPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {AU_DELIMITER, ENC, H264 | HEVC, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDEO_AU_DELIMITER, + HFI_PROP_AUD, + CAP_FLAG_OUTPUT_PORT}, + + {TIME_DELTA_BASED_RC, ENC, H264 | HEVC, + 0, 1, 1, 1, + V4L2_CID_MPEG_VIDC_TIME_DELTA_BASED_RC, + HFI_PROP_TIME_DELTA_BASED_RATE_CONTROL, + CAP_FLAG_OUTPUT_PORT}, + + {TIME_DELTA_BASED_RC, ENC, HEIC, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_TIME_DELTA_BASED_RC, + HFI_PROP_TIME_DELTA_BASED_RATE_CONTROL, + CAP_FLAG_OUTPUT_PORT}, + + {CONTENT_ADAPTIVE_CODING, ENC, H264 | HEVC, + 0, 1, 1, 1, + V4L2_CID_MPEG_VIDC_CONTENT_ADAPTIVE_CODING, + HFI_PROP_CONTENT_ADAPTIVE_CODING, + CAP_FLAG_OUTPUT_PORT}, + + {REQUEST_PREPROCESS, ENC, H264 | HEVC, + MSM_VIDC_PREPROCESS_NONE, + MSM_VIDC_PREPROCESS_TYPE0, + BIT(MSM_VIDC_PREPROCESS_NONE) | + BIT(MSM_VIDC_PREPROCESS_TYPE0), + MSM_VIDC_PREPROCESS_NONE, + 0, HFI_PROP_REQUEST_PREPROCESS, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {BITRATE_BOOST, ENC, H264 | HEVC, + 0, MAX_BITRATE_BOOST, 25, MAX_BITRATE_BOOST, + V4L2_CID_MPEG_VIDC_QUALITY_BITRATE_BOOST, + HFI_PROP_BITRATE_BOOST, + CAP_FLAG_OUTPUT_PORT}, + + {MIN_QUALITY, ENC, H264 | HEVC, + 0, MAX_SUPPORTED_MIN_QUALITY, 70, MAX_SUPPORTED_MIN_QUALITY, + 0, + HFI_PROP_MAINTAIN_MIN_QUALITY, + CAP_FLAG_OUTPUT_PORT}, + + {VBV_DELAY, ENC, H264 | HEVC, + 200, 300, 100, 300, + V4L2_CID_MPEG_VIDEO_VBV_DELAY, + HFI_PROP_VBV_DELAY, + CAP_FLAG_OUTPUT_PORT}, + + {PEAK_BITRATE, ENC, H264 | HEVC, + /* default peak bitrate is 10% larger than avg bitrate */ + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_BITRATE_PEAK, + HFI_PROP_TOTAL_PEAK_BITRATE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {MIN_FRAME_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, + V4L2_CID_MPEG_VIDEO_H264_MIN_QP, + HFI_PROP_MIN_QP_PACKED, + CAP_FLAG_OUTPUT_PORT}, + + {MIN_FRAME_QP, ENC, HEVC | HEIC, + MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, + V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP, + HFI_PROP_MIN_QP_PACKED, + CAP_FLAG_OUTPUT_PORT}, + + {I_FRAME_MIN_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, + V4L2_CID_MPEG_VIDEO_H264_I_FRAME_MIN_QP}, + + {I_FRAME_MIN_QP, ENC, HEVC | HEIC, + MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, + V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_MIN_QP}, + + {P_FRAME_MIN_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, + V4L2_CID_MPEG_VIDEO_H264_P_FRAME_MIN_QP}, + + {P_FRAME_MIN_QP, ENC, HEVC | HEIC, + MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, + V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_MIN_QP}, + + {B_FRAME_MIN_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, + V4L2_CID_MPEG_VIDEO_H264_B_FRAME_MIN_QP}, + + {B_FRAME_MIN_QP, ENC, HEVC | HEIC, + MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, + V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_MIN_QP}, + + {MAX_FRAME_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_H264_MAX_QP, + HFI_PROP_MAX_QP_PACKED, + CAP_FLAG_OUTPUT_PORT}, + + {MAX_FRAME_QP, ENC, HEVC | HEIC, + MIN_QP_10BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP, + HFI_PROP_MAX_QP_PACKED, + CAP_FLAG_OUTPUT_PORT}, + + {I_FRAME_MAX_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_H264_I_FRAME_MAX_QP}, + + {I_FRAME_MAX_QP, ENC, HEVC | HEIC, + MIN_QP_10BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_MAX_QP}, + + {P_FRAME_MAX_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_H264_P_FRAME_MAX_QP}, + + {P_FRAME_MAX_QP, ENC, HEVC | HEIC, + MIN_QP_10BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_MAX_QP}, + + {B_FRAME_MAX_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_H264_B_FRAME_MAX_QP}, + + {B_FRAME_MAX_QP, ENC, HEVC | HEIC, + MIN_QP_10BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_MAX_QP}, + + {I_FRAME_QP, ENC, HEVC, + MIN_QP_10BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {I_FRAME_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {P_FRAME_QP, ENC, HEVC, + MIN_QP_10BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {P_FRAME_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {B_FRAME_QP, ENC, HEVC, + MIN_QP_10BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {B_FRAME_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_H264_B_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {LAYER_TYPE, ENC, HEVC, + V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B, + V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P, + BIT(V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B) | + BIT(V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P), + V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE, + HFI_PROP_LAYER_ENCODING_TYPE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LAYER_TYPE, ENC, H264, + V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_B, + V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P, + BIT(V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_B) | + BIT(V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P), + V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P, + V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_TYPE, + HFI_PROP_LAYER_ENCODING_TYPE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LAYER_ENABLE, ENC, H264, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING, + HFI_PROP_LAYER_ENCODING_TYPE, + CAP_FLAG_OUTPUT_PORT}, + + {LAYER_ENABLE, ENC, HEVC, + 0, 1, 1, 0, + 0, + 0, + CAP_FLAG_OUTPUT_PORT}, + + {ENH_LAYER_COUNT, ENC, HEVC, + 0, 5, 1, 0, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER, + HFI_PROP_LAYER_COUNT, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {ENH_LAYER_COUNT, ENC, H264, + 0, 5, 1, 0, + V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_LAYER, + HFI_PROP_LAYER_COUNT, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {ENH_LAYER_COUNT, DEC, AV1, + 0, MAX_OP_POINT, 1, 0, + 0, + HFI_PROP_AV1_OP_POINT, + CAP_FLAG_INPUT_PORT}, + + {L0_BR, ENC, H264, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L0_BR, + HFI_PROP_BITRATE_LAYER1, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L0_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L0_BR, + HFI_PROP_BITRATE_LAYER1, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L1_BR, ENC, H264, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L1_BR, + HFI_PROP_BITRATE_LAYER2, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L1_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L1_BR, + HFI_PROP_BITRATE_LAYER2, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L2_BR, ENC, H264, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L2_BR, + HFI_PROP_BITRATE_LAYER3, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L2_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L2_BR, + HFI_PROP_BITRATE_LAYER3, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L3_BR, ENC, H264, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L3_BR, + HFI_PROP_BITRATE_LAYER4, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + {L3_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L3_BR, + HFI_PROP_BITRATE_LAYER4, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L4_BR, ENC, H264, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L4_BR, + HFI_PROP_BITRATE_LAYER5, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L4_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L4_BR, + HFI_PROP_BITRATE_LAYER5, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L5_BR, ENC, H264, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L5_BR, + HFI_PROP_BITRATE_LAYER6, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L5_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L5_BR, + HFI_PROP_BITRATE_LAYER6, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {ENTROPY_MODE, ENC, H264, + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC, + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, + BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC) | + BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC), + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, + V4L2_CID_MPEG_VIDEO_H264_ENTROPY_MODE, + HFI_PROP_CABAC_SESSION, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {ENTROPY_MODE, DEC, H264 | HEVC | VP9 | AV1, + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC, + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, + BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC) | + BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC), + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, + 0, + HFI_PROP_CABAC_SESSION}, + + {PROFILE, ENC | DEC, H264, + V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE, + V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH, + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_BASELINE) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_MAIN) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_HIGH), + V4L2_MPEG_VIDEO_H264_PROFILE_HIGH, + V4L2_CID_MPEG_VIDEO_H264_PROFILE, + HFI_PROP_PROFILE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {PROFILE, ENC | DEC, HEVC | HEIC, + V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN, + V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE, + BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN) | + BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE) | + BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10) | + BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE), + V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN, + V4L2_CID_MPEG_VIDEO_HEVC_PROFILE, + HFI_PROP_PROFILE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {PROFILE, DEC, VP9, + V4L2_MPEG_VIDEO_VP9_PROFILE_0, + V4L2_MPEG_VIDEO_VP9_PROFILE_2, + BIT(V4L2_MPEG_VIDEO_VP9_PROFILE_0) | + BIT(V4L2_MPEG_VIDEO_VP9_PROFILE_2), + V4L2_MPEG_VIDEO_VP9_PROFILE_0, + V4L2_CID_MPEG_VIDEO_VP9_PROFILE, + HFI_PROP_PROFILE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {PROFILE, DEC, AV1, + V4L2_MPEG_VIDC_AV1_PROFILE_MAIN, + V4L2_MPEG_VIDC_AV1_PROFILE_MAIN, + BIT(V4L2_MPEG_VIDC_AV1_PROFILE_MAIN), + V4L2_MPEG_VIDC_AV1_PROFILE_MAIN, + V4L2_CID_MPEG_VIDC_AV1_PROFILE, + HFI_PROP_PROFILE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LEVEL, ENC, H264, + V4L2_MPEG_VIDEO_H264_LEVEL_1_0, + V4L2_MPEG_VIDEO_H264_LEVEL_6_0, + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1B) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_3) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_0), + V4L2_MPEG_VIDEO_H264_LEVEL_5_0, + V4L2_CID_MPEG_VIDEO_H264_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LEVEL, ENC, HEVC | HEIC, + V4L2_MPEG_VIDEO_HEVC_LEVEL_1, + V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2, + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2), + V4L2_MPEG_VIDEO_HEVC_LEVEL_5, + V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LEVEL, DEC, H264, + V4L2_MPEG_VIDEO_H264_LEVEL_1_0, + V4L2_MPEG_VIDEO_H264_LEVEL_6_2, + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1B) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_3) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_2), + V4L2_MPEG_VIDEO_H264_LEVEL_6_1, + V4L2_CID_MPEG_VIDEO_H264_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LEVEL, DEC, HEVC | HEIC, + V4L2_MPEG_VIDEO_HEVC_LEVEL_1, + V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2, + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1)| + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2), + V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1, + V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LEVEL, DEC, VP9, + V4L2_MPEG_VIDEO_VP9_LEVEL_1_0, + V4L2_MPEG_VIDEO_VP9_LEVEL_6_0, + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_1_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_1_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_2_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_3_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_4_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_2) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_6_0), + V4L2_MPEG_VIDEO_VP9_LEVEL_6_0, + V4L2_CID_MPEG_VIDEO_VP9_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LEVEL, DEC, AV1, + V4L2_MPEG_VIDC_AV1_LEVEL_2_0, + V4L2_MPEG_VIDC_AV1_LEVEL_6_1, + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_2_0) | + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_2_2) | + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_2_3) | + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_3_0) | + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_3_2) | + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_3_3) | + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_4_0) | + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_4_2) | + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_4_3) | + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_5_0) | + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_5_1) | + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_5_2) | + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_5_3) | + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_6_0) | + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_6_1), + V4L2_MPEG_VIDC_AV1_LEVEL_6_1, + V4L2_CID_MPEG_VIDC_AV1_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {AV1_TIER, DEC, AV1, + V4L2_MPEG_VIDC_AV1_TIER_MAIN, + V4L2_MPEG_VIDC_AV1_TIER_HIGH, + BIT(V4L2_MPEG_VIDC_AV1_TIER_MAIN) | + BIT(V4L2_MPEG_VIDC_AV1_TIER_HIGH), + V4L2_MPEG_VIDC_AV1_TIER_HIGH, + V4L2_CID_MPEG_VIDC_AV1_TIER, + HFI_PROP_TIER, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {HEVC_TIER, ENC | DEC, HEVC, + V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, + V4L2_MPEG_VIDEO_HEVC_TIER_HIGH, + BIT(V4L2_MPEG_VIDEO_HEVC_TIER_MAIN) | + BIT(V4L2_MPEG_VIDEO_HEVC_TIER_HIGH), + V4L2_MPEG_VIDEO_HEVC_TIER_HIGH, + V4L2_CID_MPEG_VIDEO_HEVC_TIER, + HFI_PROP_TIER, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {HEVC_TIER, ENC | DEC, HEIC, + V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, + V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, + BIT(V4L2_MPEG_VIDEO_HEVC_TIER_MAIN), + V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, + V4L2_CID_MPEG_VIDEO_HEVC_TIER, + HFI_PROP_TIER, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LF_MODE, ENC, H264, + V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED, + DB_H264_DISABLE_SLICE_BOUNDARY, + BIT(V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED) | + BIT(V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_DISABLED) | + BIT(DB_H264_DISABLE_SLICE_BOUNDARY), + V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED, + V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_MODE, + HFI_PROP_DEBLOCKING_MODE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LF_MODE, ENC, HEVC | HEIC, + V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_DISABLED, + DB_HEVC_DISABLE_SLICE_BOUNDARY, + BIT(V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_DISABLED) | + BIT(V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_ENABLED) | + BIT(DB_HEVC_DISABLE_SLICE_BOUNDARY), + V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_ENABLED, + V4L2_CID_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE, + HFI_PROP_DEBLOCKING_MODE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LF_ALPHA, ENC, H264, + -6, 6, 1, 0, + V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_ALPHA}, + + {LF_ALPHA, ENC, HEVC | HEIC, + -6, 6, 1, 0, + V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2}, + + {LF_BETA, ENC, H264, + -6, 6, 1, 0, + V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_BETA}, + + {LF_BETA, ENC, HEVC | HEIC, + -6, 6, 1, 0, + V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2}, + + {SLICE_MODE, ENC, H264 | HEVC, + V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, + V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_BYTES, + BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE) | + BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_MB) | + BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_BYTES), + V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, + V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE, + 0, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {SLICE_MODE, ENC, HEIC, + V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, + V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, + BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE), + V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, + V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE, + 0, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {SLICE_MAX_BYTES, ENC, H264 | HEVC, + MIN_SLICE_BYTE_SIZE, MAX_SLICE_BYTE_SIZE, + 1, MIN_SLICE_BYTE_SIZE, + V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES, + HFI_PROP_MULTI_SLICE_BYTES_COUNT, + CAP_FLAG_OUTPUT_PORT}, + + {SLICE_MAX_MB, ENC, H264 | HEVC, + 1, MAX_SLICE_MB_SIZE, 1, 1, + V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB, + HFI_PROP_MULTI_SLICE_MB_COUNT, + CAP_FLAG_OUTPUT_PORT}, + + {MB_RC, ENC, H264 | HEVC, + 0, 1, 1, 1, + V4L2_CID_MPEG_VIDEO_MB_RC_ENABLE, + 0, + CAP_FLAG_OUTPUT_PORT}, + + {TRANSFORM_8X8, ENC, H264, + 0, 1, 1, 1, + V4L2_CID_MPEG_VIDEO_H264_8X8_TRANSFORM, + HFI_PROP_8X8_TRANSFORM, + CAP_FLAG_OUTPUT_PORT}, + + {CHROMA_QP_INDEX_OFFSET, ENC, HEVC, + MIN_CHROMA_QP_OFFSET, MAX_CHROMA_QP_OFFSET, + 1, MAX_CHROMA_QP_OFFSET, + V4L2_CID_MPEG_VIDEO_H264_CHROMA_QP_INDEX_OFFSET, + HFI_PROP_CHROMA_QP_OFFSET, + CAP_FLAG_OUTPUT_PORT}, + + {DISPLAY_DELAY_ENABLE, DEC, H264 | HEVC | VP9 | AV1, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY_ENABLE, + HFI_PROP_DECODE_ORDER_OUTPUT, + CAP_FLAG_INPUT_PORT}, + + {DISPLAY_DELAY, DEC, H264 | HEVC | VP9 | AV1, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY, + HFI_PROP_DECODE_ORDER_OUTPUT, + CAP_FLAG_INPUT_PORT}, + + {OUTPUT_ORDER, DEC, H264 | HEVC | VP9 | AV1, + 0, 1, 1, 0, + 0, + HFI_PROP_DECODE_ORDER_OUTPUT, + CAP_FLAG_INPUT_PORT}, + + {INPUT_BUF_HOST_MAX_COUNT, ENC | DEC, CODECS_ALL, + DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT, + 1, DEFAULT_MAX_HOST_BUF_COUNT, + 0, + HFI_PROP_BUFFER_HOST_MAX_COUNT, + CAP_FLAG_INPUT_PORT}, + + {OUTPUT_BUF_HOST_MAX_COUNT, ENC | DEC, CODECS_ALL, + DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT, + 1, DEFAULT_MAX_HOST_BUF_COUNT, + 0, + HFI_PROP_BUFFER_HOST_MAX_COUNT, + CAP_FLAG_OUTPUT_PORT}, + + {CONCEAL_COLOR_8BIT, DEC, CODECS_ALL, 0x0, 0xff3fcff, 1, + DEFAULT_VIDEO_CONCEAL_COLOR_BLACK, + V4L2_CID_MPEG_VIDEO_MUTE_YUV, + HFI_PROP_CONCEAL_COLOR_8BIT, + CAP_FLAG_INPUT_PORT}, + + {CONCEAL_COLOR_10BIT, DEC, CODECS_ALL, 0x0, 0x3fffffff, 1, + DEFAULT_VIDEO_CONCEAL_COLOR_BLACK, + V4L2_CID_MPEG_VIDEO_MUTE_YUV, + HFI_PROP_CONCEAL_COLOR_10BIT, + CAP_FLAG_INPUT_PORT}, + + {STAGE, DEC|ENC, CODECS_ALL, + MSM_VIDC_STAGE_1, + MSM_VIDC_STAGE_2, 1, + MSM_VIDC_STAGE_2, + 0, + HFI_PROP_STAGE}, + + {PIPE, DEC|ENC, CODECS_ALL, + MSM_VIDC_PIPE_1, + MSM_VIDC_PIPE_4, 1, + MSM_VIDC_PIPE_4, + 0, + HFI_PROP_PIPE}, + + {POC, DEC, H264, + 0, 2, 1, 1, + 0, + HFI_PROP_PIC_ORDER_CNT_TYPE, + CAP_FLAG_VOLATILE}, + + /* + * value of MAX_NUM_REORDER_FRAMES is 32 packed as mentioned below + * (max_num_reorder_count << 16) | max_dec_frame_buffering_count + */ + {MAX_NUM_REORDER_FRAMES, DEC, H264 | HEVC, + 0, INT_MAX, 1, 0, + V4L2_CID_MPEG_VIDC_MAX_NUM_REORDER_FRAMES, + HFI_PROP_MAX_NUM_REORDER_FRAMES, + CAP_FLAG_VOLATILE}, + + {QUALITY_MODE, ENC, CODECS_ALL, + MSM_VIDC_MAX_QUALITY_MODE, + MSM_VIDC_POWER_SAVE_MODE, 1, + MSM_VIDC_POWER_SAVE_MODE}, + + {CODED_FRAMES, DEC, H264 | HEVC | HEIC, + CODED_FRAMES_PROGRESSIVE, CODED_FRAMES_INTERLACE, + 1, CODED_FRAMES_PROGRESSIVE, + V4L2_CID_MPEG_VIDC_INTERLACE, + HFI_PROP_CODED_FRAMES, + CAP_FLAG_VOLATILE}, + + {BIT_DEPTH, DEC, CODECS_ALL, BIT_DEPTH_8, BIT_DEPTH_10, 1, BIT_DEPTH_8, + 0, + HFI_PROP_LUMA_CHROMA_BIT_DEPTH}, + + {CODEC_CONFIG, DEC, H264 | HEVC | HEIC | AV1, 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_CODEC_CONFIG, 0, + CAP_FLAG_DYNAMIC_ALLOWED}, + + {BITSTREAM_SIZE_OVERWRITE, DEC, CODECS_ALL, 0, INT_MAX, 1, 0, + V4L2_CID_MPEG_VIDC_MIN_BITSTREAM_SIZE_OVERWRITE}, + + {THUMBNAIL_MODE, DEC, CODECS_ALL, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_THUMBNAIL_MODE, + HFI_PROP_THUMBNAIL_MODE, + CAP_FLAG_INPUT_PORT}, + + {DEFAULT_HEADER, DEC, CODECS_ALL, + 0, 1, 1, 0, + 0, + HFI_PROP_DEC_DEFAULT_HEADER}, + + {RAP_FRAME, DEC, CODECS_ALL, + 0, 1, 1, 1, + 0, + HFI_PROP_DEC_START_FROM_RAP_FRAME, + CAP_FLAG_INPUT_PORT}, + + {SEQ_CHANGE_AT_SYNC_FRAME, DEC, CODECS_ALL, + 0, 1, 1, 1, + 0, + HFI_PROP_SEQ_CHANGE_AT_SYNC_FRAME, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {PRIORITY, DEC|ENC, CODECS_ALL, + 0, 4, 1, 4, + V4L2_CID_MPEG_VIDC_PRIORITY, + HFI_PROP_SESSION_PRIORITY, + CAP_FLAG_DYNAMIC_ALLOWED}, + + {FIRMWARE_PRIORITY_OFFSET, DEC | ENC, CODECS_ALL, + 1, 1, 1, 1}, + + {CRITICAL_PRIORITY, ENC, CODECS_ALL, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_CRITICAL_PRIORITY}, + + {RESERVE_DURATION, ENC, CODECS_ALL, + 0, INT_MAX, 1, 0, + V4L2_CID_MPEG_VIDC_RESERVE_DURATION, + HFI_CMD_RESERVE, + CAP_FLAG_DYNAMIC_ALLOWED}, + + {ENC_IP_CR, ENC, CODECS_ALL, + 0, S32_MAX, 1, 0, + V4L2_CID_MPEG_VIDC_ENC_INPUT_COMPRESSION_RATIO, + 0, CAP_FLAG_DYNAMIC_ALLOWED}, + + {FILM_GRAIN, DEC, AV1, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_AV1D_FILM_GRAIN_PRESENT, + HFI_PROP_AV1_FILM_GRAIN_PRESENT, + CAP_FLAG_VOLATILE}, + + {SUPER_BLOCK, DEC, AV1, + 0, 1, 1, 0, + 0, + HFI_PROP_AV1_SUPER_BLOCK_ENABLED}, + + {DRAP, DEC, AV1, + 0, S32_MAX, 1, 0, + 0, + HFI_PROP_AV1_DRAP_CONFIG, + CAP_FLAG_INPUT_PORT}, + + {LAST_FLAG_EVENT_ENABLE, DEC|ENC, CODECS_ALL, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_LAST_FLAG_EVENT_ENABLE}, + + {META_BITSTREAM_RESOLUTION, DEC, AV1, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_INPUT | + MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_BITSTREAM_RESOLUTION, + HFI_PROP_BITSTREAM_RESOLUTION, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_CROP_OFFSETS, DEC, AV1, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_INPUT | + MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_CROP_OFFSETS, + HFI_PROP_CROP_OFFSETS, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {ALL_INTRA, ENC, H264 | HEVC, + 0, 1, 1, 0, + 0, + 0, + CAP_FLAG_OUTPUT_PORT}, + + {META_LTR_MARK_USE, ENC, H264 | HEVC, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_LTR_MARK_USE_DETAILS, + HFI_PROP_LTR_MARK_USE_DETAILS, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_SEQ_HDR_NAL, ENC, CODECS_ALL, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_SEQ_HEADER_NAL, + HFI_PROP_METADATA_SEQ_HEADER_NAL, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_DPB_MISR, DEC, CODECS_ALL, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_DPB_LUMA_CHROMA_MISR, + HFI_PROP_DPB_LUMA_CHROMA_MISR, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_OPB_MISR, DEC, CODECS_ALL, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_OPB_LUMA_CHROMA_MISR, + HFI_PROP_OPB_LUMA_CHROMA_MISR, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_INTERLACE, DEC, H264, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_INTERLACE, + HFI_PROP_INTERLACE_INFO, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_TIMESTAMP, DEC | ENC, CODECS_ALL, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_TIMESTAMP, + HFI_PROP_TIMESTAMP, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_CONCEALED_MB_CNT, DEC, CODECS_ALL, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_CONCEALED_MB_COUNT, + HFI_PROP_CONEALED_MB_COUNT, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_HIST_INFO, DEC, HEVC | AV1 | VP9, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_HISTOGRAM_INFO, + HFI_PROP_HISTOGRAM_INFO, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_TRANSCODING_STAT_INFO, DEC, HEVC|H264, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_TRANSCODE_STAT_INFO, + HFI_PROP_TRANSCODING_STAT_INFO, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_TRANSCODING_STAT_INFO, ENC, HEVC|H264, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_DYN_ENABLE | MSM_VIDC_META_TX_INPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_TRANSCODE_STAT_INFO, + HFI_PROP_TRANSCODING_STAT_INFO, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_PICTURE_TYPE, DEC, CODECS_ALL, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_INPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_PICTURE_TYPE, + HFI_PROP_PICTURE_TYPE, + CAP_FLAG_BITMASK | CAP_FLAG_META | CAP_FLAG_DYNAMIC_ALLOWED}, + + {META_SEI_MASTERING_DISP, ENC, HEVC | HEIC, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | + MSM_VIDC_META_DYN_ENABLE | MSM_VIDC_META_TX_INPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_SEI_MASTERING_DISPLAY_COLOUR, + HFI_PROP_SEI_MASTERING_DISPLAY_COLOUR, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_SEI_MASTERING_DISP, DEC, HEVC | HEIC | AV1, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_INPUT | + MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_SEI_MASTERING_DISPLAY_COLOUR, + HFI_PROP_SEI_MASTERING_DISPLAY_COLOUR, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_SEI_CLL, ENC, HEVC | HEIC, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | + MSM_VIDC_META_DYN_ENABLE | MSM_VIDC_META_TX_INPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_SEI_CONTENT_LIGHT_LEVEL, + HFI_PROP_SEI_CONTENT_LIGHT_LEVEL, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_SEI_CLL, DEC, HEVC | HEIC | AV1, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_INPUT | + MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_SEI_CONTENT_LIGHT_LEVEL, + HFI_PROP_SEI_CONTENT_LIGHT_LEVEL, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_HDR10PLUS, ENC, HEVC | HEIC, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | + MSM_VIDC_META_DYN_ENABLE | MSM_VIDC_META_TX_INPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_HDR10PLUS, + HFI_PROP_SEI_HDR10PLUS_USERDATA, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_HDR10PLUS, DEC, HEVC | HEIC | AV1, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_INPUT | + MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_HDR10PLUS, + HFI_PROP_SEI_HDR10PLUS_USERDATA, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_DOLBY_RPU, ENC, HEVC, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_TX_INPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_DOLBY_RPU, + HFI_PROP_DOLBY_RPU_METADATA, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_DOLBY_RPU, DEC, H264 | HEVC, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_DOLBY_RPU, + HFI_PROP_DOLBY_RPU_METADATA, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_EVA_STATS, ENC, H264 | HEVC, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | + MSM_VIDC_META_DYN_ENABLE | MSM_VIDC_META_TX_INPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_EVA_STATS, + HFI_PROP_EVA_STAT_INFO, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_BUF_TAG, ENC, CODECS_ALL, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_TX_INPUT | + MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_BUFFER_TAG, + HFI_PROP_BUFFER_TAG, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + /* + * when fence enabled, client needs output buffer_tag + * in input metadata buffer done. + */ + {META_BUF_TAG, DEC, CODECS_ALL, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_TX_INPUT | + MSM_VIDC_META_TX_OUTPUT | MSM_VIDC_META_RX_INPUT | + MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_BUFFER_TAG, + HFI_PROP_BUFFER_TAG, + CAP_FLAG_BITMASK | CAP_FLAG_META | CAP_FLAG_DYNAMIC_ALLOWED}, + + {META_DPB_TAG_LIST, DEC, CODECS_ALL, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_INPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_DPB_TAG_LIST, + HFI_PROP_DPB_TAG_LIST, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_SUBFRAME_OUTPUT, ENC, HEIC | H264 | HEVC, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_SUBFRAME_OUTPUT, + HFI_PROP_SUBFRAME_OUTPUT, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_SUBFRAME_OUTPUT, DEC, CODECS_ALL, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_SUBFRAME_OUTPUT, + HFI_PROP_SUBFRAME_OUTPUT, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_ENC_QP_METADATA, ENC, CODECS_ALL, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_ENC_QP_METADATA, + HFI_PROP_ENC_QP_METADATA, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_ROI_INFO, ENC, H264 | HEVC, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_TX_INPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_ROI_INFO, + HFI_PROP_ROI_INFO, + CAP_FLAG_INPUT_PORT | CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_SALIENCY_INFO, ENC, H264 | HEVC, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_TX_INPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_SALIENCY_INFO, + HFI_PROP_ROI_AS_SALIENCY_INFO, + CAP_FLAG_INPUT_PORT | CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_DEC_QP_METADATA, DEC, CODECS_ALL, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_DEC_QP_METADATA, + HFI_PROP_DEC_QP_METADATA, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {GRID_ENABLE, ENC, HEIC, + 0, 1, 1, 1, + 0, + HFI_PROP_HEIC_GRID_ENABLE, + CAP_FLAG_OUTPUT_PORT}, + + {GRID_SIZE, ENC, HEIC, + HEIC_GRID_WIDTH, HEIC_GRID_WIDTH * 2, + HEIC_GRID_WIDTH, HEIC_GRID_WIDTH, + V4L2_CID_MPEG_VIDC_GRID_WIDTH}, + + {COMPLEXITY, ENC, H264 | HEVC, + 0, 100, + 1, DEFAULT_COMPLEXITY, + V4L2_CID_MPEG_VIDC_VENC_COMPLEXITY}, + + {DELIVERY_MODE, ENC, HEVC, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE, + HFI_PROP_ENABLE_SLICE_DELIVERY, + CAP_FLAG_OUTPUT_PORT}, + + {DELIVERY_MODE, ENC, H264, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_H264_ENCODE_DELIVERY_MODE, + HFI_PROP_ENABLE_SLICE_DELIVERY, + CAP_FLAG_OUTPUT_PORT}, + + {SIGNAL_COLOR_INFO, ENC, CODECS_ALL, + 0, INT_MAX, 1, 0, + V4L2_CID_MPEG_VIDC_SIGNAL_COLOR_INFO, + HFI_PROP_SIGNAL_COLOR_INFO, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, +}; + +static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_cliffs_v0[] = { + /* {cap, domain, codec, + * parents, + * children, + * adjust, set} + */ + + {PIX_FMTS, ENC, H264, + {META_ROI_INFO, IR_PERIOD, CSC}}, + + {PIX_FMTS, ENC, HEVC, + {PROFILE, MIN_FRAME_QP, MAX_FRAME_QP, I_FRAME_QP, P_FRAME_QP, + B_FRAME_QP, META_ROI_INFO, MIN_QUALITY, BLUR_TYPES, IR_PERIOD, + LTR_COUNT, CSC}}, + + {PIX_FMTS, ENC, HEIC, + {PROFILE, CSC}}, + + {PIX_FMTS, DEC, HEVC | HEIC, + {PROFILE}}, + + {FRAME_RATE, ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_q16}, + + {FRAME_RATE, DEC, CODECS_ALL, + {0}, + msm_vidc_adjust_dec_frame_rate}, + + {OPERATING_RATE, DEC, CODECS_ALL, + {0}, + msm_vidc_adjust_dec_operating_rate}, + + {ENC_RING_BUFFER_COUNT, ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_ring_buffer_count_cliffs}, + + {SECURE_MODE, ENC | DEC, H264 | HEVC | VP9 | AV1, + {0}, + NULL, + msm_vidc_set_u32}, + + {META_OUTBUF_FENCE, DEC, H264 | HEVC | AV1 | VP9, + {LOWLATENCY_MODE, OUTBUF_FENCE_TYPE, OUTBUF_FENCE_DIRECTION}, + NULL, + NULL}, + + {INBUF_FENCE_TYPE, DEC, H264 | HEVC | VP9 | AV1, + {0}, + NULL, + NULL}, + + {OUTBUF_FENCE_TYPE, DEC, H264 | HEVC | VP9 | AV1, + {0}, + msm_vidc_adjust_dec_outbuf_fence_type, + msm_vidc_set_outbuf_fence_type}, + + {INBUF_FENCE_DIRECTION, DEC, H264 | HEVC | VP9 | AV1, + {0}, + NULL, + NULL}, + + {OUTBUF_FENCE_DIRECTION, DEC, H264 | HEVC | VP9 | AV1, + {0}, + msm_vidc_adjust_dec_outbuf_fence_direction, + msm_vidc_set_outbuf_fence_direction}, + + {FENCE_ERROR_DATA_CORRUPT, DEC, H264 | HEVC | VP9 | AV1, + {0}, + NULL, + msm_vidc_set_u32}, + + {HFLIP, ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_flip}, + + {VFLIP, ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_flip}, + + {ROTATION, ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_rotation}, + + {SUPER_FRAME, ENC, H264 | HEVC, + {INPUT_BUF_HOST_MAX_COUNT, OUTPUT_BUF_HOST_MAX_COUNT}, + NULL, + NULL}, + + {SLICE_DECODE, DEC, H264 | HEVC | AV1, + {0}, + NULL, + NULL}, + + {HEADER_MODE, ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_header_mode}, + + {WITHOUT_STARTCODE, ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_nal_length}, + + {WITHOUT_STARTCODE, DEC, AV1, + {0}, + NULL, + msm_vidc_set_u32}, + + {REQUEST_I_FRAME, ENC, H264 | HEVC, + {0}, + NULL, + msm_vidc_set_req_sync_frame}, + + {BIT_RATE, ENC, H264, + {PEAK_BITRATE, BITRATE_BOOST, L0_BR}, + msm_vidc_adjust_bitrate, + msm_vidc_set_bitrate}, + + {BIT_RATE, ENC, HEVC, + {PEAK_BITRATE, BITRATE_BOOST, L0_BR}, + msm_vidc_adjust_bitrate, + msm_vidc_set_bitrate}, + + {BITRATE_MODE, ENC, H264, + {LTR_COUNT, IR_PERIOD, TIME_DELTA_BASED_RC, I_FRAME_QP, + P_FRAME_QP, B_FRAME_QP, ENH_LAYER_COUNT, BIT_RATE, + META_ROI_INFO, MIN_QUALITY, BITRATE_BOOST, VBV_DELAY, + PEAK_BITRATE, SLICE_MODE, CONTENT_ADAPTIVE_CODING, + BLUR_TYPES, LOWLATENCY_MODE, META_TRANSCODING_STAT_INFO}, + msm_vidc_adjust_bitrate_mode, + msm_vidc_set_u32_enum}, + + {BITRATE_MODE, ENC, HEVC, + {LTR_COUNT, IR_PERIOD, TIME_DELTA_BASED_RC, I_FRAME_QP, + P_FRAME_QP, B_FRAME_QP, CONSTANT_QUALITY, ENH_LAYER_COUNT, + BIT_RATE, META_ROI_INFO, MIN_QUALITY, BITRATE_BOOST, VBV_DELAY, + PEAK_BITRATE, SLICE_MODE, CONTENT_ADAPTIVE_CODING, + BLUR_TYPES, LOWLATENCY_MODE, META_EVA_STATS, META_TRANSCODING_STAT_INFO}, + msm_vidc_adjust_bitrate_mode, + msm_vidc_set_u32_enum}, + + {BITRATE_MODE, ENC, HEIC, + {TIME_DELTA_BASED_RC, CONSTANT_QUALITY}, + msm_vidc_adjust_bitrate_mode, + msm_vidc_set_u32_enum}, + + {CONSTANT_QUALITY, ENC, HEVC | HEIC, + {0}, + NULL, + msm_vidc_set_constant_quality}, + + {GOP_SIZE, ENC, CODECS_ALL, + {ALL_INTRA}, + msm_vidc_adjust_gop_size, + msm_vidc_set_gop_size}, + + {GOP_SIZE, ENC, HEIC, + {0}, + NULL, + msm_vidc_set_u32}, + + {B_FRAME, ENC, H264 | HEVC, + {ALL_INTRA}, + msm_vidc_adjust_b_frame, + msm_vidc_set_u32}, + + {B_FRAME, ENC, HEIC, + {0}, + NULL, + msm_vidc_set_u32}, + + {BLUR_TYPES, ENC, H264 | HEVC, + {BLUR_RESOLUTION}, + msm_vidc_adjust_blur_type, + msm_vidc_set_u32_enum}, + + {BLUR_RESOLUTION, ENC, H264 | HEVC, + {0}, + msm_vidc_adjust_blur_resolution, + msm_vidc_set_blur_resolution}, + + {CSC, ENC, CODECS_ALL, + {0}, + msm_vidc_adjust_csc, + msm_vidc_set_u32}, + + {CSC_CUSTOM_MATRIX, ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_csc_custom_matrix}, + + {LOWLATENCY_MODE, ENC, H264 | HEVC, + {STAGE, BIT_RATE}, + msm_vidc_adjust_enc_lowlatency_mode, + NULL}, + + {LOWLATENCY_MODE, DEC, H264 | HEVC | AV1, + {STAGE}, + msm_vidc_adjust_dec_lowlatency_mode, + NULL}, + + {LOWLATENCY_MODE, DEC, VP9, + {STAGE}, + msm_vidc_adjust_dec_lowlatency_mode, + NULL}, + + {LTR_COUNT, ENC, H264 | HEVC, + {0}, + msm_vidc_adjust_ltr_count, + msm_vidc_set_u32}, + + {USE_LTR, ENC, H264 | HEVC, + {0}, + msm_vidc_adjust_use_ltr, + msm_vidc_set_use_and_mark_ltr}, + + {MARK_LTR, ENC, H264 | HEVC, + {0}, + msm_vidc_adjust_mark_ltr, + msm_vidc_set_use_and_mark_ltr}, + + {IR_PERIOD, ENC, H264 | HEVC, + {0}, + msm_vidc_adjust_ir_period, + msm_vidc_set_ir_period}, + + {AU_DELIMITER, ENC, H264 | HEVC, + {0}, + NULL, + msm_vidc_set_u32}, + + {BASELAYER_PRIORITY, ENC, H264, + {0}, + NULL, + msm_vidc_set_u32}, + + {TIME_DELTA_BASED_RC, ENC, CODECS_ALL, + {0}, + msm_vidc_adjust_delta_based_rc, + msm_vidc_set_u32}, + + {CONTENT_ADAPTIVE_CODING, ENC, H264 | HEVC, + {REQUEST_PREPROCESS}, + msm_vidc_adjust_brs, + msm_vidc_set_vbr_related_properties}, + + {REQUEST_PREPROCESS, ENC, H264 | HEVC, + {0}, + msm_vidc_adjust_preprocess, + msm_vidc_set_preprocess}, + + {BITRATE_BOOST, ENC, H264 | HEVC, + {0}, + msm_vidc_adjust_bitrate_boost_iris33, + msm_vidc_set_vbr_related_properties}, + + {MIN_QUALITY, ENC, H264 | HEVC, + {BLUR_TYPES}, + msm_vidc_adjust_min_quality, + msm_vidc_set_u32}, + + {VBV_DELAY, ENC, H264 | HEVC, + {0}, + NULL, + msm_vidc_set_cbr_related_properties}, + + {PEAK_BITRATE, ENC, H264 | HEVC, + {0}, + msm_vidc_adjust_peak_bitrate, + msm_vidc_set_cbr_related_properties}, + + {MIN_FRAME_QP, ENC, H264, + {0}, + NULL, + msm_vidc_set_min_qp}, + + {MIN_FRAME_QP, ENC, HEVC, + {0}, + msm_vidc_adjust_hevc_min_qp, + msm_vidc_set_min_qp}, + + {MAX_FRAME_QP, ENC, H264, + {0}, + NULL, + msm_vidc_set_max_qp}, + + {MAX_FRAME_QP, ENC, HEVC, + {0}, + msm_vidc_adjust_hevc_max_qp, + msm_vidc_set_max_qp}, + + {I_FRAME_QP, ENC, HEVC, + {0}, + msm_vidc_adjust_hevc_i_frame_qp, + msm_vidc_set_frame_qp}, + + {I_FRAME_QP, ENC, H264, + {0}, + NULL, + msm_vidc_set_frame_qp}, + + {P_FRAME_QP, ENC, HEVC, + {0}, + msm_vidc_adjust_hevc_p_frame_qp, + msm_vidc_set_frame_qp}, + + {P_FRAME_QP, ENC, H264, + {0}, + NULL, + msm_vidc_set_frame_qp}, + + {B_FRAME_QP, ENC, HEVC, + {0}, + msm_vidc_adjust_hevc_b_frame_qp, + msm_vidc_set_frame_qp}, + + {B_FRAME_QP, ENC, H264, + {0}, + NULL, + msm_vidc_set_frame_qp}, + + {LAYER_TYPE, ENC, H264 | HEVC, + {CONTENT_ADAPTIVE_CODING, LTR_COUNT}}, + + {LAYER_ENABLE, ENC, H264 | HEVC, + {CONTENT_ADAPTIVE_CODING}}, + + {ENH_LAYER_COUNT, ENC, H264 | HEVC, + {GOP_SIZE, B_FRAME, BIT_RATE, MIN_QUALITY, SLICE_MODE, LTR_COUNT}, + msm_vidc_adjust_layer_count, + msm_vidc_set_layer_count_and_type}, + + {ENH_LAYER_COUNT, DEC, AV1, + {0}, + NULL, + msm_vidc_set_u32}, + + {L0_BR, ENC, H264 | HEVC, + {L1_BR}, + msm_vidc_adjust_layer_bitrate, + msm_vidc_set_layer_bitrate}, + + {L1_BR, ENC, H264 | HEVC, + {L2_BR}, + msm_vidc_adjust_layer_bitrate, + msm_vidc_set_layer_bitrate}, + + {L2_BR, ENC, H264 | HEVC, + {L3_BR}, + msm_vidc_adjust_layer_bitrate, + msm_vidc_set_layer_bitrate}, + + {L3_BR, ENC, H264 | HEVC, + {L4_BR}, + msm_vidc_adjust_layer_bitrate, + msm_vidc_set_layer_bitrate}, + + {L4_BR, ENC, H264 | HEVC, + {L5_BR}, + msm_vidc_adjust_layer_bitrate, + msm_vidc_set_layer_bitrate}, + + {L5_BR, ENC, H264 | HEVC, + {0}, + msm_vidc_adjust_layer_bitrate, + msm_vidc_set_layer_bitrate}, + + {ENTROPY_MODE, ENC, H264, + {BIT_RATE}, + msm_vidc_adjust_entropy_mode, + msm_vidc_set_u32}, + + {PROFILE, ENC, H264, + {ENTROPY_MODE, TRANSFORM_8X8}, + NULL, + msm_vidc_set_u32_enum}, + + {PROFILE, DEC, H264, + {ENTROPY_MODE}, + NULL, + msm_vidc_set_u32_enum}, + + {PROFILE, ENC, HEVC | HEIC, + {META_SEI_MASTERING_DISP, META_SEI_CLL, META_HDR10PLUS}, + msm_vidc_adjust_profile, + msm_vidc_set_u32_enum}, + + {PROFILE, DEC, HEVC | HEIC, + {0}, + msm_vidc_adjust_profile, + msm_vidc_set_u32_enum}, + + {PROFILE, DEC, VP9 | AV1, + {0}, + NULL, + msm_vidc_set_u32_enum}, + + {LEVEL, DEC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_u32_enum}, + + {LEVEL, ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_level}, + + {AV1_TIER, DEC, AV1, + {0}, + NULL, + msm_vidc_set_u32_enum}, + + {HEVC_TIER, ENC | DEC, HEVC | HEIC, + {0}, + NULL, + msm_vidc_set_u32_enum}, + + {LF_MODE, ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_deblock_mode}, + + {SLICE_MODE, ENC, H264 | HEVC, + {STAGE, DELIVERY_MODE}, + msm_vidc_adjust_slice_count, + msm_vidc_set_slice_count}, + + {SLICE_MODE, ENC, HEIC, + {0}, + msm_vidc_adjust_slice_count, + msm_vidc_set_slice_count}, + + {TRANSFORM_8X8, ENC, H264, + {0}, + msm_vidc_adjust_transform_8x8, + msm_vidc_set_u32}, + + {CHROMA_QP_INDEX_OFFSET, ENC, HEVC, + {0}, + msm_vidc_adjust_chroma_qp_index_offset, + msm_vidc_set_chroma_qp_index_offset}, + + {DISPLAY_DELAY_ENABLE, DEC, H264 | HEVC | VP9 | AV1, + {OUTPUT_ORDER}, + NULL, + NULL}, + + {DISPLAY_DELAY, DEC, H264 | HEVC | VP9 | AV1, + {OUTPUT_ORDER}, + NULL, + NULL}, + + {OUTPUT_ORDER, DEC, H264 | HEVC | AV1 | VP9, + {0}, + msm_vidc_adjust_output_order, + msm_vidc_set_u32}, + + {INPUT_BUF_HOST_MAX_COUNT, ENC | DEC, CODECS_ALL, + {0}, + msm_vidc_adjust_input_buf_host_max_count, + msm_vidc_set_u32}, + + {INPUT_BUF_HOST_MAX_COUNT, ENC, H264 | HEVC, + {0}, + msm_vidc_adjust_input_buf_host_max_count, + msm_vidc_set_u32}, + + {OUTPUT_BUF_HOST_MAX_COUNT, ENC | DEC, CODECS_ALL, + {0}, + msm_vidc_adjust_output_buf_host_max_count, + msm_vidc_set_u32}, + + {OUTPUT_BUF_HOST_MAX_COUNT, ENC, H264 | HEVC, + {0}, + msm_vidc_adjust_output_buf_host_max_count, + msm_vidc_set_u32}, + + {CONCEAL_COLOR_8BIT, DEC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_u32_packed}, + + {CONCEAL_COLOR_10BIT, DEC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_u32_packed}, + + {STAGE, ENC | DEC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_stage}, + + {STAGE, ENC, H264 | HEVC, + {0}, + NULL, + msm_vidc_set_stage}, + + {STAGE, DEC, H264 | HEVC | VP9 | AV1, + {0}, + NULL, + msm_vidc_set_stage}, + + {PIPE, DEC|ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_pipe}, + + {THUMBNAIL_MODE, DEC, H264 | HEVC | VP9 | AV1, + {OUTPUT_ORDER}, + NULL, + msm_vidc_set_u32}, + + {THUMBNAIL_MODE, DEC, HEIC, + {0}, + NULL, + msm_vidc_set_u32}, + + {RAP_FRAME, DEC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_u32}, + + {PRIORITY, DEC|ENC, CODECS_ALL, + {0}, + msm_vidc_adjust_session_priority, + msm_vidc_set_session_priority}, + + {FIRMWARE_PRIORITY_OFFSET, DEC | ENC, CODECS_ALL, + {0}, + NULL, + NULL}, + + {CRITICAL_PRIORITY, ENC, CODECS_ALL, + {0}, + NULL, + NULL}, + + {RESERVE_DURATION, ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_reserve_duration}, + + {DRAP, DEC, AV1, + {0}, + NULL, + msm_vidc_set_u32}, + + {ALL_INTRA, ENC, H264 | HEVC, + {LTR_COUNT, IR_PERIOD, SLICE_MODE, BIT_RATE}, + msm_vidc_adjust_all_intra, + NULL}, + + {META_EVA_STATS, ENC, HEVC, + {0}, + msm_vidc_adjust_eva_stats, + NULL}, + + {META_ROI_INFO, ENC, H264 | HEVC, + {MIN_QUALITY, IR_PERIOD, BLUR_TYPES}, + msm_vidc_adjust_roi_info, + NULL}, + + {GRID_ENABLE, ENC, HEIC, + {0}, + NULL, + msm_vidc_set_u32}, + + {DELIVERY_MODE, ENC, H264 | HEVC, + {LOWLATENCY_MODE, OUTPUT_BUF_HOST_MAX_COUNT}, + msm_vidc_adjust_delivery_mode, + msm_vidc_set_u32}, + + {VUI_TIMING_INFO, ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_vui_timing_info}, + + {SIGNAL_COLOR_INFO, ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_signal_color_info}, + + {META_SEI_MASTERING_DISP, ENC, HEVC | HEIC, + {0}, + msm_vidc_adjust_sei_mastering_disp, + NULL}, + + {META_SEI_CLL, ENC, HEVC | HEIC, + {0}, + msm_vidc_adjust_sei_cll, + NULL}, + + {META_HDR10PLUS, ENC, HEVC | HEIC, + {0}, + msm_vidc_adjust_hdr10plus, + NULL}, + + {META_TRANSCODING_STAT_INFO, ENC, HEVC|H264, + {0}, + msm_vidc_adjust_transcoding_stats, + NULL}, +}; + +static struct msm_platform_inst_capability instance_cap_data_cliffs_v1[] = { + /* {cap, domain, codec, + * min, max, step_or_mask, value, + * v4l2_id, + * hfi_id, + * flags} + */ + {DRV_VERSION, DEC|ENC, CODECS_ALL, + 0, INT_MAX, 1, DRIVER_VERSION, + V4L2_CID_MPEG_VIDC_DRIVER_VERSION}, + + {FRAME_WIDTH, DEC, CODECS_ALL, 96, 8192, 1, 1920}, + + {FRAME_WIDTH, DEC, VP9, 96, 4096, 1, 1920}, + + {FRAME_WIDTH, ENC, CODECS_ALL, 128, 8192, 1, 1920}, + + {FRAME_WIDTH, ENC, HEVC, 96, 8192, 1, 1920}, + + {FRAME_WIDTH, ENC, HEIC, 128, 16384, 1, 16384}, + + {LOSSLESS_FRAME_WIDTH, ENC, CODECS_ALL, 128, 4096, 1, 1920}, + + {LOSSLESS_FRAME_WIDTH, ENC, HEVC, 96, 4096, 1, 1920}, + + {SECURE_FRAME_WIDTH, DEC, CODECS_ALL, 96, 4096, 1, 1920}, + + {SECURE_FRAME_WIDTH, ENC, CODECS_ALL, 128, 4096, 1, 1920}, + + {SECURE_FRAME_WIDTH, ENC, HEVC, 96, 4096, 1, 1920}, + + {FRAME_HEIGHT, DEC, CODECS_ALL, 96, 8192, 1, 1080}, + + {FRAME_HEIGHT, DEC, VP9, 96, 4096, 1, 1080}, + + {FRAME_HEIGHT, ENC, CODECS_ALL, 128, 8192, 1, 1080}, + + {FRAME_HEIGHT, ENC, HEVC, 96, 8192, 1, 1080}, + + {FRAME_HEIGHT, ENC, HEIC, 128, 16384, 1, 16384}, + + {LOSSLESS_FRAME_HEIGHT, ENC, CODECS_ALL, 128, 4096, 1, 1080}, + + {LOSSLESS_FRAME_HEIGHT, ENC, HEVC, 96, 4096, 1, 1080}, + + {SECURE_FRAME_HEIGHT, DEC, CODECS_ALL, 96, 4096, 1, 1080}, + + {SECURE_FRAME_HEIGHT, ENC, CODECS_ALL, 128, 4096, 1, 1080}, + + {SECURE_FRAME_HEIGHT, ENC, HEVC, 96, 4096, 1, 1080}, + + {PIX_FMTS, ENC | DEC, H264, + MSM_VIDC_FMT_NV12, + MSM_VIDC_FMT_NV12C, + MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C, + MSM_VIDC_FMT_NV12C}, + + {PIX_FMTS, ENC | DEC, HEVC | VP9 | AV1, + MSM_VIDC_FMT_NV12, + MSM_VIDC_FMT_TP10C, + MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C | + MSM_VIDC_FMT_P010 | MSM_VIDC_FMT_TP10C, + MSM_VIDC_FMT_NV12C}, + + {PIX_FMTS, ENC, HEIC, + MSM_VIDC_FMT_NV12, + MSM_VIDC_FMT_P010, + MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_P010, + MSM_VIDC_FMT_NV12}, + + {PIX_FMTS, DEC, HEIC, + MSM_VIDC_FMT_NV12, + MSM_VIDC_FMT_TP10C, + MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C | + MSM_VIDC_FMT_P010 | MSM_VIDC_FMT_TP10C, + MSM_VIDC_FMT_NV12C}, + + {MIN_BUFFERS_INPUT, ENC | DEC, CODECS_ALL, 0, 64, 1, 4, + V4L2_CID_MIN_BUFFERS_FOR_OUTPUT, + 0, + CAP_FLAG_VOLATILE}, + + {MIN_BUFFERS_INPUT, ENC | DEC, HEIC, 0, 64, 1, 1, + V4L2_CID_MIN_BUFFERS_FOR_OUTPUT, + 0, + CAP_FLAG_VOLATILE}, + + {MIN_BUFFERS_OUTPUT, ENC | DEC, CODECS_ALL, + 0, 64, 1, 4, + V4L2_CID_MIN_BUFFERS_FOR_CAPTURE, + HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_VOLATILE}, + + /* (8192 * 4320) / 256 */ + {MBPF, ENC, CODECS_ALL, 64, 138240, 1, 138240}, + + {MBPF, ENC, HEVC, 36, 138240, 1, 138240}, + + /* ((16384x16384)/256) */ + {MBPF, ENC, HEIC, 36, 1048576, 1, 1048576}, + + {MBPF, DEC, CODECS_ALL, 36, 138240, 1, 138240}, + + /* (4096 * 2304) / 256 */ + {MBPF, DEC, VP9, 36, 36864, 1, 36864}, + + /* ((8192x8192)/256) */ + {MBPF, DEC, HEIC, 64, 262144, 1, 262144 }, + + /* (4096 * 2304) / 256 */ + {LOSSLESS_MBPF, ENC, H264 | HEVC, 64, 36864, 1, 36864}, + + /* Batch Mode Decode */ + /* TODO: update with new values based on updated voltage corner */ + {BATCH_MBPF, DEC, H264 | HEVC | VP9 | AV1, 64, 34816, 1, 34816}, + + /* (4096 * 2304) / 256 */ + {BATCH_FPS, DEC, H264 | HEVC | VP9 | AV1, 1, 120, 1, 120}, + + {SECURE_MBPF, ENC | DEC, H264 | HEVC | VP9 | AV1, 64, 36864, 1, 36864}, + + {SECURE_MBPF, ENC, HEVC, 36, 36864, 1, 36864}, + + {FRAME_RATE, ENC, CODECS_ALL, + (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), + 1, (DEFAULT_FPS << 16), + 0, + HFI_PROP_FRAME_RATE, + CAP_FLAG_OUTPUT_PORT}, + + {FRAME_RATE, ENC, HEIC, + (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), + 1, (MINIMUM_FPS << 16), + 0, + HFI_PROP_FRAME_RATE, + CAP_FLAG_OUTPUT_PORT}, + + {FRAME_RATE, DEC, CODECS_ALL, + (MINIMUM_FPS << 16), (MAXIMUM_DEC_FPS << 16), + 1, (DEFAULT_FPS << 16), + V4L2_CID_MPEG_VIDC_FRAME_RATE, + 0, + CAP_FLAG_OUTPUT_PORT | + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {FRAME_RATE, DEC, VP9, + (MINIMUM_FPS << 16), (MAXIMUM_OVERRIDE_VP9_FPS << 16), + 1, (DEFAULT_FPS << 16), + V4L2_CID_MPEG_VIDC_FRAME_RATE, + 0, + CAP_FLAG_OUTPUT_PORT | + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {OPERATING_RATE, ENC, CODECS_ALL, + (MINIMUM_FPS << 16), INT_MAX, + 1, (DEFAULT_FPS << 16)}, + + {OPERATING_RATE, DEC, CODECS_ALL, + (MINIMUM_FPS << 16), INT_MAX, + 1, (DEFAULT_FPS << 16), + V4L2_CID_MPEG_VIDC_OPERATING_RATE, + 0, + CAP_FLAG_OUTPUT_PORT | + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {INPUT_RATE, ENC | DEC, CODECS_ALL, + (MINIMUM_FPS << 16), INT_MAX, + 1, (DEFAULT_FPS << 16)}, + + {TIMESTAMP_RATE, ENC | DEC, CODECS_ALL, + (MINIMUM_FPS << 16), INT_MAX, + 1, (DEFAULT_FPS << 16)}, + + {SCALE_FACTOR, ENC, H264 | HEVC, 1, 8, 1, 8}, + + {MB_CYCLES_VSP, ENC, CODECS_ALL, 25, 25, 1, 25}, + + {MB_CYCLES_VSP, DEC, CODECS_ALL, 25, 25, 1, 25}, + + {MB_CYCLES_VSP, DEC, VP9 | AV1, 60, 60, 1, 60}, + + {MB_CYCLES_VPP, ENC, CODECS_ALL, 675, 675, 1, 675}, + + {MB_CYCLES_VPP, DEC, CODECS_ALL, 200, 200, 1, 200}, + + {MB_CYCLES_LP, ENC, CODECS_ALL, 320, 320, 1, 320}, + + {MB_CYCLES_LP, DEC, CODECS_ALL, 200, 200, 1, 200}, + + {MB_CYCLES_FW, ENC | DEC, CODECS_ALL, 489583, 489583, 1, 489583}, + + {MB_CYCLES_FW_VPP, ENC, CODECS_ALL, 48405, 48405, 1, 48405}, + + {MB_CYCLES_FW_VPP, DEC, CODECS_ALL, 66234, 66234, 1, 66234}, + + {ENC_RING_BUFFER_COUNT, ENC, CODECS_ALL, + 0, MAX_ENC_RING_BUF_COUNT, 1, 0}, + + {CLIENT_ID, ENC | DEC, CODECS_ALL, + INVALID_CLIENT_ID, INT_MAX, 1, INVALID_CLIENT_ID, + V4L2_CID_MPEG_VIDC_CLIENT_ID}, + + {SECURE_MODE, ENC | DEC, H264 | HEVC | VP9 | AV1, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_SECURE, + HFI_PROP_SECURE, + CAP_FLAG_NONE}, + + /* + * Client will enable V4L2_CID_MPEG_VIDC_METADATA_OUTBUF_FENCE + * to get fence_id in input metadata buffer done. + */ + {META_OUTBUF_FENCE, DEC, H264 | HEVC | VP9 | AV1, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_INPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_OUTBUF_FENCE, + HFI_PROP_FENCE, + CAP_FLAG_BITMASK | CAP_FLAG_META | CAP_FLAG_DYNAMIC_ALLOWED}, + + /* + * Client to do set_ctrl with FENCE_ID to set fence_id + * and then client will do get_ctrl with FENCE_FD to get + * fence_fd corresponding to client set fence_id. + */ + {FENCE_ID, DEC, CODECS_ALL, + 0, INT_MAX, 1, 0, + V4L2_CID_MPEG_VIDC_SW_FENCE_ID, + 0, + CAP_FLAG_DYNAMIC_ALLOWED | CAP_FLAG_OUTPUT_PORT}, + + {FENCE_FD, DEC, CODECS_ALL, + INVALID_FD, INT_MAX, 1, INVALID_FD, + V4L2_CID_MPEG_VIDC_SW_FENCE_FD, + 0, + CAP_FLAG_VOLATILE}, + + /* Fence type for input buffer. Currently unused */ + {INBUF_FENCE_TYPE, DEC, H264 | HEVC | VP9 | AV1, + MSM_VIDC_FENCE_NONE, MSM_VIDC_FENCE_NONE, + BIT(MSM_VIDC_FENCE_NONE), + MSM_VIDC_FENCE_NONE, + 0, + HFI_PROP_FENCE_TYPE, + CAP_FLAG_MENU | CAP_FLAG_INPUT_PORT}, + + {OUTBUF_FENCE_TYPE, DEC, H264 | HEVC | VP9 | AV1, + MSM_VIDC_FENCE_NONE, MSM_VIDC_SYNX_V2_FENCE, + BIT(MSM_VIDC_FENCE_NONE) | BIT(MSM_VIDC_SW_FENCE) | + BIT(MSM_VIDC_SYNX_V2_FENCE), + MSM_VIDC_FENCE_NONE, + 0, + HFI_PROP_FENCE_TYPE, + CAP_FLAG_MENU | CAP_FLAG_OUTPUT_PORT}, + + /* Fence direction for input buffer. Currently unused */ + {INBUF_FENCE_DIRECTION, DEC, H264 | HEVC | VP9 | AV1, + MSM_VIDC_FENCE_DIR_NONE, MSM_VIDC_FENCE_DIR_NONE, + BIT(MSM_VIDC_FENCE_DIR_NONE), + MSM_VIDC_FENCE_DIR_NONE, + 0, + HFI_PROP_FENCE_DIRECTION, + CAP_FLAG_MENU | CAP_FLAG_INPUT_PORT}, + + {OUTBUF_FENCE_DIRECTION, DEC, H264 | HEVC | VP9 | AV1, + MSM_VIDC_FENCE_DIR_NONE, MSM_VIDC_FENCE_DIR_RX, + BIT(MSM_VIDC_FENCE_DIR_NONE) | BIT(MSM_VIDC_FENCE_DIR_TX) | + BIT(MSM_VIDC_FENCE_DIR_RX), + MSM_VIDC_FENCE_DIR_NONE, + 0, + HFI_PROP_FENCE_DIRECTION, + CAP_FLAG_MENU | CAP_FLAG_OUTPUT_PORT}, + + {FENCE_ERROR_DATA_CORRUPT, DEC, H264 | HEVC | VP9 | AV1, + 0, 1, 1, 0, + 0, + HFI_PROP_FENCE_ERROR_DATA_CORRUPT}, + + {TS_REORDER, DEC, H264 | HEVC, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_TS_REORDER}, + + {HFLIP, ENC, CODECS_ALL, + 0, 1, 1, 0, + V4L2_CID_HFLIP, + HFI_PROP_FLIP, + CAP_FLAG_OUTPUT_PORT | + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {VFLIP, ENC, CODECS_ALL, + 0, 1, 1, 0, + V4L2_CID_VFLIP, + HFI_PROP_FLIP, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {ROTATION, ENC, CODECS_ALL, + 0, 270, 90, 0, + V4L2_CID_ROTATE, + HFI_PROP_ROTATION, + CAP_FLAG_OUTPUT_PORT}, + + {SUPER_FRAME, ENC, H264 | HEVC, + 0, 32, 1, 0, + V4L2_CID_MPEG_VIDC_SUPERFRAME, 0, + CAP_FLAG_DYNAMIC_ALLOWED}, + + {SLICE_DECODE, DEC, H264 | HEVC | AV1, + V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_MSM_VIDC_DISABLE, + 0, + V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDEO_DECODER_SLICE_INTERFACE, + 0}, + + {HEADER_MODE, ENC, CODECS_ALL, + V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE, + V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME, + BIT(V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE) | + BIT(V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME), + V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE, + V4L2_CID_MPEG_VIDEO_HEADER_MODE, + HFI_PROP_SEQ_HEADER_MODE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {PREPEND_SPSPPS_TO_IDR, ENC, CODECS_ALL, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDEO_PREPEND_SPSPPS_TO_IDR}, + + {VUI_TIMING_INFO, ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_VUI_TIMING_INFO, + HFI_PROP_DISABLE_VUI_TIMING_INFO, + CAP_FLAG_OUTPUT_PORT}, + + {WITHOUT_STARTCODE, ENC, CODECS_ALL, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE, + HFI_PROP_NAL_LENGTH_FIELD, + CAP_FLAG_OUTPUT_PORT}, + + {WITHOUT_STARTCODE, DEC, AV1, + 0, 0, 1, 0, + V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE, + HFI_PROP_NAL_LENGTH_FIELD, + CAP_FLAG_INPUT_PORT}, + + {NAL_LENGTH_FIELD, ENC, CODECS_ALL, + V4L2_MPEG_VIDEO_HEVC_SIZE_0, + V4L2_MPEG_VIDEO_HEVC_SIZE_4, + BIT(V4L2_MPEG_VIDEO_HEVC_SIZE_0) | + BIT(V4L2_MPEG_VIDEO_HEVC_SIZE_4), + V4L2_MPEG_VIDEO_HEVC_SIZE_0, + V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD, + HFI_PROP_NAL_LENGTH_FIELD, + CAP_FLAG_MENU | CAP_FLAG_OUTPUT_PORT}, + + /* TODO: Firmware introduced enumeration type for this + * with and without seq header. + */ + {REQUEST_I_FRAME, ENC, H264 | HEVC, + 0, 0, 0, 0, + V4L2_CID_MPEG_VIDEO_FORCE_KEY_FRAME, + HFI_PROP_REQUEST_SYNC_FRAME, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + /* Enc: Keeping CABAC and CAVLC as same bitrate. + * Dec: there's no use of Bitrate cap + */ + {BIT_RATE, ENC, H264 | HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_BITRATE, + HFI_PROP_TOTAL_BITRATE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {BITRATE_MODE, ENC, H264, + V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, + V4L2_MPEG_VIDEO_BITRATE_MODE_CBR, + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_VBR) | + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CBR), + V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, + V4L2_CID_MPEG_VIDEO_BITRATE_MODE, + HFI_PROP_RATE_CONTROL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {BITRATE_MODE, ENC, HEVC, + V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, + V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_VBR) | + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CBR) | + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CQ), + V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, + V4L2_CID_MPEG_VIDEO_BITRATE_MODE, + HFI_PROP_RATE_CONTROL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {BITRATE_MODE, ENC, HEIC, + V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, + V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CQ), + V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, + V4L2_CID_MPEG_VIDEO_BITRATE_MODE, + HFI_PROP_RATE_CONTROL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {CABAC_MAX_BITRATE, ENC, H264 | HEVC, 0, + 160000000, 1, 160000000}, + + {CAVLC_MAX_BITRATE, ENC, H264, 0, + 220000000, 1, 220000000}, + + {ALLINTRA_MAX_BITRATE, ENC, H264 | HEVC, 0, + 245000000, 1, 245000000}, + + {LOWLATENCY_MAX_BITRATE, ENC, H264 | HEVC, 0, + 70000000, 1, 70000000}, + + {NUM_COMV, DEC, CODECS_ALL, + 0, INT_MAX, 1, 0}, + + {LOSSLESS, ENC, HEVC, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU}, + + {FRAME_SKIP_MODE, ENC, H264 | HEVC | HEIC, + V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED, + V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT, + BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED) | + BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_LEVEL_LIMIT) | + BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT), + V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED, + V4L2_CID_MPEG_VIDEO_FRAME_SKIP_MODE, + 0, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {FRAME_RC_ENABLE, ENC, H264 | HEVC | HEIC, + 0, 1, 1, 1, + V4L2_CID_MPEG_VIDEO_FRAME_RC_ENABLE}, + + {CONSTANT_QUALITY, ENC, HEVC, + 1, MAX_CONSTANT_QUALITY, 1, 90, + V4L2_CID_MPEG_VIDEO_CONSTANT_QUALITY, + HFI_PROP_CONSTANT_QUALITY, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {CONSTANT_QUALITY, ENC, HEIC, + 1, MAX_CONSTANT_QUALITY, 1, 100, + V4L2_CID_MPEG_VIDEO_CONSTANT_QUALITY, + HFI_PROP_CONSTANT_QUALITY, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {GOP_SIZE, ENC, CODECS_ALL, + 0, INT_MAX, 1, 2 * DEFAULT_FPS - 1, + V4L2_CID_MPEG_VIDEO_GOP_SIZE, + HFI_PROP_MAX_GOP_FRAMES, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {GOP_SIZE, ENC, HEIC, + 0, INT_MAX, 1, 0 /* all intra */, + V4L2_CID_MPEG_VIDEO_GOP_SIZE, + HFI_PROP_MAX_GOP_FRAMES, + CAP_FLAG_OUTPUT_PORT | + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {GOP_CLOSURE, ENC, H264 | HEVC, + 0, 1, 1, 1, + V4L2_CID_MPEG_VIDEO_GOP_CLOSURE, + 0}, + + {B_FRAME, ENC, H264 | HEVC, + 0, 7, 1, 0, + V4L2_CID_MPEG_VIDEO_B_FRAMES, + HFI_PROP_MAX_B_FRAMES, + CAP_FLAG_OUTPUT_PORT}, + + {B_FRAME, ENC, HEIC, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDEO_B_FRAMES, + HFI_PROP_MAX_B_FRAMES, + CAP_FLAG_OUTPUT_PORT}, + + {BLUR_TYPES, ENC, H264 | HEVC, + MSM_VIDC_BLUR_NONE, MSM_VIDC_BLUR_EXTERNAL, + BIT(MSM_VIDC_BLUR_NONE) | BIT(MSM_VIDC_BLUR_EXTERNAL), + MSM_VIDC_BLUR_NONE, + V4L2_CID_MPEG_VIDC_VIDEO_BLUR_TYPES, + HFI_PROP_BLUR_TYPES, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {BLUR_RESOLUTION, ENC, H264 | HEVC, + 0, S32_MAX, 1, 0, + V4L2_CID_MPEG_VIDC_VIDEO_BLUR_RESOLUTION, + HFI_PROP_BLUR_RESOLUTION, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {CSC, ENC, CODECS_ALL, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_CSC, + HFI_PROP_CSC}, + + {CSC_CUSTOM_MATRIX, ENC, CODECS_ALL, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_VIDEO_VPE_CSC_CUSTOM_MATRIX, + HFI_PROP_CSC_MATRIX, + CAP_FLAG_OUTPUT_PORT}, + + {LOWLATENCY_MODE, ENC, H264 | HEVC, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_LOWLATENCY_REQUEST, + 0, + CAP_FLAG_NONE}, + + {LOWLATENCY_MODE, DEC, H264 | HEVC | VP9 | AV1, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_LOWLATENCY_REQUEST, + HFI_PROP_SEQ_CHANGE_AT_SYNC_FRAME, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {LTR_COUNT, ENC, H264 | HEVC, + 0, MAX_LTR_FRAME_COUNT_5, 1, 0, + V4L2_CID_MPEG_VIDEO_LTR_COUNT, + HFI_PROP_LTR_COUNT, + CAP_FLAG_OUTPUT_PORT}, + + {USE_LTR, ENC, H264 | HEVC, + 0, + ((1 << MAX_LTR_FRAME_COUNT_5) - 1), + 0, 0, + V4L2_CID_MPEG_VIDEO_USE_LTR_FRAMES, + HFI_PROP_LTR_USE, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {MARK_LTR, ENC, H264 | HEVC, + INVALID_DEFAULT_MARK_OR_USE_LTR, + (MAX_LTR_FRAME_COUNT_5 - 1), + 1, INVALID_DEFAULT_MARK_OR_USE_LTR, + V4L2_CID_MPEG_VIDEO_FRAME_LTR_INDEX, + HFI_PROP_LTR_MARK, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {BASELAYER_PRIORITY, ENC, H264, + 0, MAX_BASE_LAYER_PRIORITY_ID, 1, 0, + V4L2_CID_MPEG_VIDEO_BASELAYER_PRIORITY_ID, + HFI_PROP_BASELAYER_PRIORITYID, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {IR_TYPE, ENC, H264 | HEVC, + V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_RANDOM, + V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_CYCLIC, + BIT(V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_RANDOM) | + BIT(V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_CYCLIC), + V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_RANDOM, + V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE, + 0, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {IR_PERIOD, ENC, H264 | HEVC, + 0, INT_MAX, 1, 0, + V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD, + 0, + CAP_FLAG_INPUT_PORT | CAP_FLAG_OUTPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {AU_DELIMITER, ENC, H264 | HEVC, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDEO_AU_DELIMITER, + HFI_PROP_AUD, + CAP_FLAG_OUTPUT_PORT}, + + {TIME_DELTA_BASED_RC, ENC, H264 | HEVC, + 0, 1, 1, 1, + V4L2_CID_MPEG_VIDC_TIME_DELTA_BASED_RC, + HFI_PROP_TIME_DELTA_BASED_RATE_CONTROL, + CAP_FLAG_OUTPUT_PORT}, + + {TIME_DELTA_BASED_RC, ENC, HEIC, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_TIME_DELTA_BASED_RC, + HFI_PROP_TIME_DELTA_BASED_RATE_CONTROL, + CAP_FLAG_OUTPUT_PORT}, + + {CONTENT_ADAPTIVE_CODING, ENC, H264 | HEVC, + 0, 1, 1, 1, + V4L2_CID_MPEG_VIDC_CONTENT_ADAPTIVE_CODING, + HFI_PROP_CONTENT_ADAPTIVE_CODING, + CAP_FLAG_OUTPUT_PORT}, + + {REQUEST_PREPROCESS, ENC, H264 | HEVC, + MSM_VIDC_PREPROCESS_NONE, + MSM_VIDC_PREPROCESS_TYPE0, + BIT(MSM_VIDC_PREPROCESS_NONE) | + BIT(MSM_VIDC_PREPROCESS_TYPE0), + MSM_VIDC_PREPROCESS_NONE, + 0, HFI_PROP_REQUEST_PREPROCESS, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {BITRATE_BOOST, ENC, H264 | HEVC, + 0, MAX_BITRATE_BOOST, 25, MAX_BITRATE_BOOST, + V4L2_CID_MPEG_VIDC_QUALITY_BITRATE_BOOST, + HFI_PROP_BITRATE_BOOST, + CAP_FLAG_OUTPUT_PORT}, + + {MIN_QUALITY, ENC, H264 | HEVC, + 0, MAX_SUPPORTED_MIN_QUALITY, 70, MAX_SUPPORTED_MIN_QUALITY, + 0, + HFI_PROP_MAINTAIN_MIN_QUALITY, + CAP_FLAG_OUTPUT_PORT}, + + {VBV_DELAY, ENC, H264 | HEVC, + 200, 300, 100, 300, + V4L2_CID_MPEG_VIDEO_VBV_DELAY, + HFI_PROP_VBV_DELAY, + CAP_FLAG_OUTPUT_PORT}, + + {PEAK_BITRATE, ENC, H264 | HEVC, + /* default peak bitrate is 10% larger than avg bitrate */ + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_BITRATE_PEAK, + HFI_PROP_TOTAL_PEAK_BITRATE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {MIN_FRAME_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, + V4L2_CID_MPEG_VIDEO_H264_MIN_QP, + HFI_PROP_MIN_QP_PACKED, + CAP_FLAG_OUTPUT_PORT}, + + {MIN_FRAME_QP, ENC, HEVC | HEIC, + MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, + V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP, + HFI_PROP_MIN_QP_PACKED, + CAP_FLAG_OUTPUT_PORT}, + + {I_FRAME_MIN_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, + V4L2_CID_MPEG_VIDEO_H264_I_FRAME_MIN_QP}, + + {I_FRAME_MIN_QP, ENC, HEVC | HEIC, + MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, + V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_MIN_QP}, + + {P_FRAME_MIN_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, + V4L2_CID_MPEG_VIDEO_H264_P_FRAME_MIN_QP}, + + {P_FRAME_MIN_QP, ENC, HEVC | HEIC, + MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, + V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_MIN_QP}, + + {B_FRAME_MIN_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, + V4L2_CID_MPEG_VIDEO_H264_B_FRAME_MIN_QP}, + + {B_FRAME_MIN_QP, ENC, HEVC | HEIC, + MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, + V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_MIN_QP}, + + {MAX_FRAME_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_H264_MAX_QP, + HFI_PROP_MAX_QP_PACKED, + CAP_FLAG_OUTPUT_PORT}, + + {MAX_FRAME_QP, ENC, HEVC | HEIC, + MIN_QP_10BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP, + HFI_PROP_MAX_QP_PACKED, + CAP_FLAG_OUTPUT_PORT}, + + {I_FRAME_MAX_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_H264_I_FRAME_MAX_QP}, + + {I_FRAME_MAX_QP, ENC, HEVC | HEIC, + MIN_QP_10BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_MAX_QP}, + + {P_FRAME_MAX_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_H264_P_FRAME_MAX_QP}, + + {P_FRAME_MAX_QP, ENC, HEVC | HEIC, + MIN_QP_10BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_MAX_QP}, + + {B_FRAME_MAX_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_H264_B_FRAME_MAX_QP}, + + {B_FRAME_MAX_QP, ENC, HEVC | HEIC, + MIN_QP_10BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_MAX_QP}, + + {I_FRAME_QP, ENC, HEVC, + MIN_QP_10BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {I_FRAME_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {P_FRAME_QP, ENC, HEVC, + MIN_QP_10BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {P_FRAME_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {B_FRAME_QP, ENC, HEVC, + MIN_QP_10BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {B_FRAME_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_H264_B_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {LAYER_TYPE, ENC, HEVC, + V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B, + V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P, + BIT(V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B) | + BIT(V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P), + V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE, + HFI_PROP_LAYER_ENCODING_TYPE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LAYER_TYPE, ENC, H264, + V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_B, + V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P, + BIT(V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_B) | + BIT(V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P), + V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P, + V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_TYPE, + HFI_PROP_LAYER_ENCODING_TYPE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LAYER_ENABLE, ENC, H264, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING, + HFI_PROP_LAYER_ENCODING_TYPE, + CAP_FLAG_OUTPUT_PORT}, + + {LAYER_ENABLE, ENC, HEVC, + 0, 1, 1, 0, + 0, + 0, + CAP_FLAG_OUTPUT_PORT}, + + {ENH_LAYER_COUNT, ENC, HEVC, + 0, 5, 1, 0, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER, + HFI_PROP_LAYER_COUNT, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {ENH_LAYER_COUNT, ENC, H264, + 0, 5, 1, 0, + V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_LAYER, + HFI_PROP_LAYER_COUNT, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {ENH_LAYER_COUNT, DEC, AV1, + 0, MAX_OP_POINT, 1, 0, + 0, + HFI_PROP_AV1_OP_POINT, + CAP_FLAG_INPUT_PORT}, + + {L0_BR, ENC, H264, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L0_BR, + HFI_PROP_BITRATE_LAYER1, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L0_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L0_BR, + HFI_PROP_BITRATE_LAYER1, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L1_BR, ENC, H264, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L1_BR, + HFI_PROP_BITRATE_LAYER2, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L1_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L1_BR, + HFI_PROP_BITRATE_LAYER2, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L2_BR, ENC, H264, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L2_BR, + HFI_PROP_BITRATE_LAYER3, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L2_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L2_BR, + HFI_PROP_BITRATE_LAYER3, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L3_BR, ENC, H264, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L3_BR, + HFI_PROP_BITRATE_LAYER4, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + {L3_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L3_BR, + HFI_PROP_BITRATE_LAYER4, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L4_BR, ENC, H264, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L4_BR, + HFI_PROP_BITRATE_LAYER5, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L4_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L4_BR, + HFI_PROP_BITRATE_LAYER5, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L5_BR, ENC, H264, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L5_BR, + HFI_PROP_BITRATE_LAYER6, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L5_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L5_BR, + HFI_PROP_BITRATE_LAYER6, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {ENTROPY_MODE, ENC, H264, + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC, + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, + BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC) | + BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC), + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, + V4L2_CID_MPEG_VIDEO_H264_ENTROPY_MODE, + HFI_PROP_CABAC_SESSION, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {ENTROPY_MODE, DEC, H264 | HEVC | VP9 | AV1, + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC, + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, + BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC) | + BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC), + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, + 0, + HFI_PROP_CABAC_SESSION}, + + {PROFILE, ENC | DEC, H264, + V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE, + V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH, + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_BASELINE) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_MAIN) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_HIGH), + V4L2_MPEG_VIDEO_H264_PROFILE_HIGH, + V4L2_CID_MPEG_VIDEO_H264_PROFILE, + HFI_PROP_PROFILE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {PROFILE, ENC | DEC, HEVC | HEIC, + V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN, + V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE, + BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN) | + BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE) | + BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10) | + BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE), + V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN, + V4L2_CID_MPEG_VIDEO_HEVC_PROFILE, + HFI_PROP_PROFILE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {PROFILE, DEC, VP9, + V4L2_MPEG_VIDEO_VP9_PROFILE_0, + V4L2_MPEG_VIDEO_VP9_PROFILE_2, + BIT(V4L2_MPEG_VIDEO_VP9_PROFILE_0) | + BIT(V4L2_MPEG_VIDEO_VP9_PROFILE_2), + V4L2_MPEG_VIDEO_VP9_PROFILE_0, + V4L2_CID_MPEG_VIDEO_VP9_PROFILE, + HFI_PROP_PROFILE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {PROFILE, DEC, AV1, + V4L2_MPEG_VIDC_AV1_PROFILE_MAIN, + V4L2_MPEG_VIDC_AV1_PROFILE_MAIN, + BIT(V4L2_MPEG_VIDC_AV1_PROFILE_MAIN), + V4L2_MPEG_VIDC_AV1_PROFILE_MAIN, + V4L2_CID_MPEG_VIDC_AV1_PROFILE, + HFI_PROP_PROFILE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LEVEL, ENC, H264, + V4L2_MPEG_VIDEO_H264_LEVEL_1_0, + V4L2_MPEG_VIDEO_H264_LEVEL_6_0, + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1B) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_3) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_0), + V4L2_MPEG_VIDEO_H264_LEVEL_5_0, + V4L2_CID_MPEG_VIDEO_H264_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LEVEL, ENC, HEVC | HEIC, + V4L2_MPEG_VIDEO_HEVC_LEVEL_1, + V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2, + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2), + V4L2_MPEG_VIDEO_HEVC_LEVEL_5, + V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LEVEL, DEC, H264, + V4L2_MPEG_VIDEO_H264_LEVEL_1_0, + V4L2_MPEG_VIDEO_H264_LEVEL_6_2, + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1B) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_3) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_2), + V4L2_MPEG_VIDEO_H264_LEVEL_6_1, + V4L2_CID_MPEG_VIDEO_H264_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LEVEL, DEC, HEVC | HEIC, + V4L2_MPEG_VIDEO_HEVC_LEVEL_1, + V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2, + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1)| + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2), + V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1, + V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LEVEL, DEC, VP9, + V4L2_MPEG_VIDEO_VP9_LEVEL_1_0, + V4L2_MPEG_VIDEO_VP9_LEVEL_6_0, + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_1_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_1_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_2_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_3_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_4_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_2) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_6_0), + V4L2_MPEG_VIDEO_VP9_LEVEL_6_0, + V4L2_CID_MPEG_VIDEO_VP9_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LEVEL, DEC, AV1, + V4L2_MPEG_VIDC_AV1_LEVEL_2_0, + V4L2_MPEG_VIDC_AV1_LEVEL_6_1, + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_2_0) | + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_2_2) | + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_2_3) | + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_3_0) | + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_3_2) | + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_3_3) | + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_4_0) | + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_4_2) | + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_4_3) | + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_5_0) | + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_5_1) | + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_5_2) | + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_5_3) | + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_6_0) | + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_6_1), + V4L2_MPEG_VIDC_AV1_LEVEL_6_1, + V4L2_CID_MPEG_VIDC_AV1_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {AV1_TIER, DEC, AV1, + V4L2_MPEG_VIDC_AV1_TIER_MAIN, + V4L2_MPEG_VIDC_AV1_TIER_HIGH, + BIT(V4L2_MPEG_VIDC_AV1_TIER_MAIN) | + BIT(V4L2_MPEG_VIDC_AV1_TIER_HIGH), + V4L2_MPEG_VIDC_AV1_TIER_HIGH, + V4L2_CID_MPEG_VIDC_AV1_TIER, + HFI_PROP_TIER, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {HEVC_TIER, ENC | DEC, HEVC, + V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, + V4L2_MPEG_VIDEO_HEVC_TIER_HIGH, + BIT(V4L2_MPEG_VIDEO_HEVC_TIER_MAIN) | + BIT(V4L2_MPEG_VIDEO_HEVC_TIER_HIGH), + V4L2_MPEG_VIDEO_HEVC_TIER_HIGH, + V4L2_CID_MPEG_VIDEO_HEVC_TIER, + HFI_PROP_TIER, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {HEVC_TIER, ENC | DEC, HEIC, + V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, + V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, + BIT(V4L2_MPEG_VIDEO_HEVC_TIER_MAIN), + V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, + V4L2_CID_MPEG_VIDEO_HEVC_TIER, + HFI_PROP_TIER, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LF_MODE, ENC, H264, + V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED, + DB_H264_DISABLE_SLICE_BOUNDARY, + BIT(V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED) | + BIT(V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_DISABLED) | + BIT(DB_H264_DISABLE_SLICE_BOUNDARY), + V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED, + V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_MODE, + HFI_PROP_DEBLOCKING_MODE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LF_MODE, ENC, HEVC | HEIC, + V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_DISABLED, + DB_HEVC_DISABLE_SLICE_BOUNDARY, + BIT(V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_DISABLED) | + BIT(V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_ENABLED) | + BIT(DB_HEVC_DISABLE_SLICE_BOUNDARY), + V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_ENABLED, + V4L2_CID_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE, + HFI_PROP_DEBLOCKING_MODE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LF_ALPHA, ENC, H264, + -6, 6, 1, 0, + V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_ALPHA}, + + {LF_ALPHA, ENC, HEVC | HEIC, + -6, 6, 1, 0, + V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2}, + + {LF_BETA, ENC, H264, + -6, 6, 1, 0, + V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_BETA}, + + {LF_BETA, ENC, HEVC | HEIC, + -6, 6, 1, 0, + V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2}, + + {SLICE_MODE, ENC, H264 | HEVC, + V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, + V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_BYTES, + BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE) | + BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_MB) | + BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_BYTES), + V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, + V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE, + 0, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {SLICE_MODE, ENC, HEIC, + V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, + V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, + BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE), + V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, + V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE, + 0, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {SLICE_MAX_BYTES, ENC, H264 | HEVC, + MIN_SLICE_BYTE_SIZE, MAX_SLICE_BYTE_SIZE, + 1, MIN_SLICE_BYTE_SIZE, + V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES, + HFI_PROP_MULTI_SLICE_BYTES_COUNT, + CAP_FLAG_OUTPUT_PORT}, + + {SLICE_MAX_MB, ENC, H264 | HEVC, + 1, MAX_SLICE_MB_SIZE, 1, 1, + V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB, + HFI_PROP_MULTI_SLICE_MB_COUNT, + CAP_FLAG_OUTPUT_PORT}, + + {MB_RC, ENC, H264 | HEVC, + 0, 1, 1, 1, + V4L2_CID_MPEG_VIDEO_MB_RC_ENABLE, + 0, + CAP_FLAG_OUTPUT_PORT}, + + {TRANSFORM_8X8, ENC, H264, + 0, 1, 1, 1, + V4L2_CID_MPEG_VIDEO_H264_8X8_TRANSFORM, + HFI_PROP_8X8_TRANSFORM, + CAP_FLAG_OUTPUT_PORT}, + + {CHROMA_QP_INDEX_OFFSET, ENC, HEVC, + MIN_CHROMA_QP_OFFSET, MAX_CHROMA_QP_OFFSET, + 1, MAX_CHROMA_QP_OFFSET, + V4L2_CID_MPEG_VIDEO_H264_CHROMA_QP_INDEX_OFFSET, + HFI_PROP_CHROMA_QP_OFFSET, + CAP_FLAG_OUTPUT_PORT}, + + {DISPLAY_DELAY_ENABLE, DEC, H264 | HEVC | VP9 | AV1, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY_ENABLE, + HFI_PROP_DECODE_ORDER_OUTPUT, + CAP_FLAG_INPUT_PORT}, + + {DISPLAY_DELAY, DEC, H264 | HEVC | VP9 | AV1, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY, + HFI_PROP_DECODE_ORDER_OUTPUT, + CAP_FLAG_INPUT_PORT}, + + {OUTPUT_ORDER, DEC, H264 | HEVC | VP9 | AV1, + 0, 1, 1, 0, + 0, + HFI_PROP_DECODE_ORDER_OUTPUT, + CAP_FLAG_INPUT_PORT}, + + {INPUT_BUF_HOST_MAX_COUNT, ENC | DEC, CODECS_ALL, + DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT, + 1, DEFAULT_MAX_HOST_BUF_COUNT, + 0, + HFI_PROP_BUFFER_HOST_MAX_COUNT, + CAP_FLAG_INPUT_PORT}, + + {OUTPUT_BUF_HOST_MAX_COUNT, ENC | DEC, CODECS_ALL, + DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT, + 1, DEFAULT_MAX_HOST_BUF_COUNT, + 0, + HFI_PROP_BUFFER_HOST_MAX_COUNT, + CAP_FLAG_OUTPUT_PORT}, + + {CONCEAL_COLOR_8BIT, DEC, CODECS_ALL, 0x0, 0xff3fcff, 1, + DEFAULT_VIDEO_CONCEAL_COLOR_BLACK, + V4L2_CID_MPEG_VIDEO_MUTE_YUV, + HFI_PROP_CONCEAL_COLOR_8BIT, + CAP_FLAG_INPUT_PORT}, + + {CONCEAL_COLOR_10BIT, DEC, CODECS_ALL, 0x0, 0x3fffffff, 1, + DEFAULT_VIDEO_CONCEAL_COLOR_BLACK, + V4L2_CID_MPEG_VIDEO_MUTE_YUV, + HFI_PROP_CONCEAL_COLOR_10BIT, + CAP_FLAG_INPUT_PORT}, + + {STAGE, DEC|ENC, CODECS_ALL, + MSM_VIDC_STAGE_1, + MSM_VIDC_STAGE_2, 1, + MSM_VIDC_STAGE_2, + 0, + HFI_PROP_STAGE}, + + {PIPE, DEC|ENC, CODECS_ALL, + MSM_VIDC_PIPE_1, + MSM_VIDC_PIPE_4, 1, + MSM_VIDC_PIPE_4, + 0, + HFI_PROP_PIPE}, + + {POC, DEC, H264, + 0, 2, 1, 1, + 0, + HFI_PROP_PIC_ORDER_CNT_TYPE, + CAP_FLAG_VOLATILE}, + + /* + * value of MAX_NUM_REORDER_FRAMES is 32 packed as mentioned below + * (max_num_reorder_count << 16) | max_dec_frame_buffering_count + */ + {MAX_NUM_REORDER_FRAMES, DEC, H264 | HEVC, + 0, INT_MAX, 1, 0, + V4L2_CID_MPEG_VIDC_MAX_NUM_REORDER_FRAMES, + HFI_PROP_MAX_NUM_REORDER_FRAMES, + CAP_FLAG_VOLATILE}, + + {QUALITY_MODE, ENC, CODECS_ALL, + MSM_VIDC_MAX_QUALITY_MODE, + MSM_VIDC_POWER_SAVE_MODE, 1, + MSM_VIDC_POWER_SAVE_MODE}, + + {CODED_FRAMES, DEC, H264 | HEVC | HEIC, + CODED_FRAMES_PROGRESSIVE, CODED_FRAMES_INTERLACE, + 1, CODED_FRAMES_PROGRESSIVE, + V4L2_CID_MPEG_VIDC_INTERLACE, + HFI_PROP_CODED_FRAMES, + CAP_FLAG_VOLATILE}, + + {BIT_DEPTH, DEC, CODECS_ALL, BIT_DEPTH_8, BIT_DEPTH_10, 1, BIT_DEPTH_8, + 0, + HFI_PROP_LUMA_CHROMA_BIT_DEPTH}, + + {CODEC_CONFIG, DEC, H264 | HEVC | HEIC | AV1, 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_CODEC_CONFIG, 0, + CAP_FLAG_DYNAMIC_ALLOWED}, + + {BITSTREAM_SIZE_OVERWRITE, DEC, CODECS_ALL, 0, INT_MAX, 1, 0, + V4L2_CID_MPEG_VIDC_MIN_BITSTREAM_SIZE_OVERWRITE}, + + {THUMBNAIL_MODE, DEC, CODECS_ALL, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_THUMBNAIL_MODE, + HFI_PROP_THUMBNAIL_MODE, + CAP_FLAG_INPUT_PORT}, + + {DEFAULT_HEADER, DEC, CODECS_ALL, + 0, 1, 1, 0, + 0, + HFI_PROP_DEC_DEFAULT_HEADER}, + + {RAP_FRAME, DEC, CODECS_ALL, + 0, 1, 1, 1, + 0, + HFI_PROP_DEC_START_FROM_RAP_FRAME, + CAP_FLAG_INPUT_PORT}, + + {SEQ_CHANGE_AT_SYNC_FRAME, DEC, CODECS_ALL, + 0, 1, 1, 1, + 0, + HFI_PROP_SEQ_CHANGE_AT_SYNC_FRAME, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {PRIORITY, DEC|ENC, CODECS_ALL, + 0, 4, 1, 4, + V4L2_CID_MPEG_VIDC_PRIORITY, + HFI_PROP_SESSION_PRIORITY, + CAP_FLAG_DYNAMIC_ALLOWED}, + + {FIRMWARE_PRIORITY_OFFSET, DEC | ENC, CODECS_ALL, + 1, 1, 1, 1}, + + {CRITICAL_PRIORITY, ENC, CODECS_ALL, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_CRITICAL_PRIORITY}, + + {RESERVE_DURATION, ENC, CODECS_ALL, + 0, INT_MAX, 1, 0, + V4L2_CID_MPEG_VIDC_RESERVE_DURATION, + HFI_CMD_RESERVE, + CAP_FLAG_DYNAMIC_ALLOWED}, + + {ENC_IP_CR, ENC, CODECS_ALL, + 0, S32_MAX, 1, 0, + V4L2_CID_MPEG_VIDC_ENC_INPUT_COMPRESSION_RATIO, + 0, CAP_FLAG_DYNAMIC_ALLOWED}, + + {FILM_GRAIN, DEC, AV1, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_AV1D_FILM_GRAIN_PRESENT, + HFI_PROP_AV1_FILM_GRAIN_PRESENT, + CAP_FLAG_VOLATILE}, + + {SUPER_BLOCK, DEC, AV1, + 0, 1, 1, 0, + 0, + HFI_PROP_AV1_SUPER_BLOCK_ENABLED}, + + {DRAP, DEC, AV1, + 0, S32_MAX, 1, 0, + 0, + HFI_PROP_AV1_DRAP_CONFIG, + CAP_FLAG_INPUT_PORT}, + + {LAST_FLAG_EVENT_ENABLE, DEC|ENC, CODECS_ALL, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_LAST_FLAG_EVENT_ENABLE}, + + {META_BITSTREAM_RESOLUTION, DEC, AV1, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_INPUT | + MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_BITSTREAM_RESOLUTION, + HFI_PROP_BITSTREAM_RESOLUTION, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_CROP_OFFSETS, DEC, AV1, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_INPUT | + MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_CROP_OFFSETS, + HFI_PROP_CROP_OFFSETS, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {ALL_INTRA, ENC, H264 | HEVC, + 0, 1, 1, 0, + 0, + 0, + CAP_FLAG_OUTPUT_PORT}, + + {META_LTR_MARK_USE, ENC, H264 | HEVC, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_LTR_MARK_USE_DETAILS, + HFI_PROP_LTR_MARK_USE_DETAILS, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_SEQ_HDR_NAL, ENC, CODECS_ALL, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_SEQ_HEADER_NAL, + HFI_PROP_METADATA_SEQ_HEADER_NAL, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_DPB_MISR, DEC, CODECS_ALL, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_DPB_LUMA_CHROMA_MISR, + HFI_PROP_DPB_LUMA_CHROMA_MISR, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_OPB_MISR, DEC, CODECS_ALL, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_OPB_LUMA_CHROMA_MISR, + HFI_PROP_OPB_LUMA_CHROMA_MISR, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_INTERLACE, DEC, H264, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_INTERLACE, + HFI_PROP_INTERLACE_INFO, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_TIMESTAMP, DEC | ENC, CODECS_ALL, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_TIMESTAMP, + HFI_PROP_TIMESTAMP, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_CONCEALED_MB_CNT, DEC, CODECS_ALL, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_CONCEALED_MB_COUNT, + HFI_PROP_CONEALED_MB_COUNT, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_HIST_INFO, DEC, HEVC | AV1 | VP9, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_HISTOGRAM_INFO, + HFI_PROP_HISTOGRAM_INFO, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_TRANSCODING_STAT_INFO, DEC, HEVC|H264, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_TRANSCODE_STAT_INFO, + HFI_PROP_TRANSCODING_STAT_INFO, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_TRANSCODING_STAT_INFO, ENC, HEVC|H264, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_DYN_ENABLE | MSM_VIDC_META_TX_INPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_TRANSCODE_STAT_INFO, + HFI_PROP_TRANSCODING_STAT_INFO, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_PICTURE_TYPE, DEC, CODECS_ALL, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_INPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_PICTURE_TYPE, + HFI_PROP_PICTURE_TYPE, + CAP_FLAG_BITMASK | CAP_FLAG_META | CAP_FLAG_DYNAMIC_ALLOWED}, + + {META_SEI_MASTERING_DISP, ENC, HEVC | HEIC, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | + MSM_VIDC_META_DYN_ENABLE | MSM_VIDC_META_TX_INPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_SEI_MASTERING_DISPLAY_COLOUR, + HFI_PROP_SEI_MASTERING_DISPLAY_COLOUR, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_SEI_MASTERING_DISP, DEC, HEVC | HEIC | AV1, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_INPUT | + MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_SEI_MASTERING_DISPLAY_COLOUR, + HFI_PROP_SEI_MASTERING_DISPLAY_COLOUR, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_SEI_CLL, ENC, HEVC | HEIC, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | + MSM_VIDC_META_DYN_ENABLE | MSM_VIDC_META_TX_INPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_SEI_CONTENT_LIGHT_LEVEL, + HFI_PROP_SEI_CONTENT_LIGHT_LEVEL, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_SEI_CLL, DEC, HEVC | HEIC | AV1, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_INPUT | + MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_SEI_CONTENT_LIGHT_LEVEL, + HFI_PROP_SEI_CONTENT_LIGHT_LEVEL, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_HDR10PLUS, ENC, HEVC | HEIC, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | + MSM_VIDC_META_DYN_ENABLE | MSM_VIDC_META_TX_INPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_HDR10PLUS, + HFI_PROP_SEI_HDR10PLUS_USERDATA, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_HDR10PLUS, DEC, HEVC | HEIC | AV1, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_INPUT | + MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_HDR10PLUS, + HFI_PROP_SEI_HDR10PLUS_USERDATA, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_DOLBY_RPU, ENC, HEVC, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_TX_INPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_DOLBY_RPU, + HFI_PROP_DOLBY_RPU_METADATA, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_DOLBY_RPU, DEC, H264 | HEVC, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_DOLBY_RPU, + HFI_PROP_DOLBY_RPU_METADATA, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_EVA_STATS, ENC, H264 | HEVC, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | + MSM_VIDC_META_DYN_ENABLE | MSM_VIDC_META_TX_INPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_EVA_STATS, + HFI_PROP_EVA_STAT_INFO, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_BUF_TAG, ENC, CODECS_ALL, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_TX_INPUT | + MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_BUFFER_TAG, + HFI_PROP_BUFFER_TAG, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + /* + * when fence enabled, client needs output buffer_tag + * in input metadata buffer done. + */ + {META_BUF_TAG, DEC, CODECS_ALL, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_TX_INPUT | + MSM_VIDC_META_TX_OUTPUT | MSM_VIDC_META_RX_INPUT | + MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_BUFFER_TAG, + HFI_PROP_BUFFER_TAG, + CAP_FLAG_BITMASK | CAP_FLAG_META | CAP_FLAG_DYNAMIC_ALLOWED}, + + {META_DPB_TAG_LIST, DEC, CODECS_ALL, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_INPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_DPB_TAG_LIST, + HFI_PROP_DPB_TAG_LIST, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_SUBFRAME_OUTPUT, ENC, HEIC | H264 | HEVC, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_SUBFRAME_OUTPUT, + HFI_PROP_SUBFRAME_OUTPUT, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_SUBFRAME_OUTPUT, DEC, CODECS_ALL, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_SUBFRAME_OUTPUT, + HFI_PROP_SUBFRAME_OUTPUT, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_ENC_QP_METADATA, ENC, CODECS_ALL, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_ENC_QP_METADATA, + HFI_PROP_ENC_QP_METADATA, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_ROI_INFO, ENC, H264 | HEVC, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_TX_INPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_ROI_INFO, + HFI_PROP_ROI_INFO, + CAP_FLAG_INPUT_PORT | CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_SALIENCY_INFO, ENC, H264 | HEVC, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_TX_INPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_SALIENCY_INFO, + HFI_PROP_ROI_AS_SALIENCY_INFO, + CAP_FLAG_INPUT_PORT | CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_DEC_QP_METADATA, DEC, CODECS_ALL, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_DEC_QP_METADATA, + HFI_PROP_DEC_QP_METADATA, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {GRID_ENABLE, ENC, HEIC, + 0, 1, 1, 1, + 0, + HFI_PROP_HEIC_GRID_ENABLE, + CAP_FLAG_OUTPUT_PORT}, + + {GRID_SIZE, ENC, HEIC, + HEIC_GRID_WIDTH, HEIC_GRID_WIDTH * 2, + HEIC_GRID_WIDTH, HEIC_GRID_WIDTH, + V4L2_CID_MPEG_VIDC_GRID_WIDTH}, + + {COMPLEXITY, ENC, H264 | HEVC, + 0, 100, + 1, DEFAULT_COMPLEXITY, + V4L2_CID_MPEG_VIDC_VENC_COMPLEXITY}, + + {DELIVERY_MODE, ENC, HEVC, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE, + HFI_PROP_ENABLE_SLICE_DELIVERY, + CAP_FLAG_OUTPUT_PORT}, + + {DELIVERY_MODE, ENC, H264, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_H264_ENCODE_DELIVERY_MODE, + HFI_PROP_ENABLE_SLICE_DELIVERY, + CAP_FLAG_OUTPUT_PORT}, + + {SIGNAL_COLOR_INFO, ENC, CODECS_ALL, + 0, INT_MAX, 1, 0, + V4L2_CID_MPEG_VIDC_SIGNAL_COLOR_INFO, + HFI_PROP_SIGNAL_COLOR_INFO, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, +}; + +static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_cliffs_v1[] = { + /* {cap, domain, codec, + * parents, + * children, + * adjust, set} + */ + + {PIX_FMTS, ENC, H264, + {META_ROI_INFO, IR_PERIOD, CSC}}, + + {PIX_FMTS, ENC, HEVC, + {PROFILE, MIN_FRAME_QP, MAX_FRAME_QP, I_FRAME_QP, P_FRAME_QP, + B_FRAME_QP, META_ROI_INFO, MIN_QUALITY, BLUR_TYPES, IR_PERIOD, + LTR_COUNT, CSC}}, + + {PIX_FMTS, ENC, HEIC, + {PROFILE, CSC}}, + + {PIX_FMTS, DEC, HEVC | HEIC, + {PROFILE}}, + + {FRAME_RATE, ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_q16}, + + {FRAME_RATE, DEC, CODECS_ALL, + {0}, + msm_vidc_adjust_dec_frame_rate}, + + {OPERATING_RATE, DEC, CODECS_ALL, + {0}, + msm_vidc_adjust_dec_operating_rate}, + + {ENC_RING_BUFFER_COUNT, ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_ring_buffer_count_cliffs}, + + {SECURE_MODE, ENC | DEC, H264 | HEVC | VP9 | AV1, + {0}, + NULL, + msm_vidc_set_u32}, + + {META_OUTBUF_FENCE, DEC, H264 | HEVC | AV1 | VP9, + {LOWLATENCY_MODE, OUTBUF_FENCE_TYPE, OUTBUF_FENCE_DIRECTION}, + NULL, + NULL}, + + {INBUF_FENCE_TYPE, DEC, H264 | HEVC | VP9 | AV1, + {0}, + NULL, + NULL}, + + {OUTBUF_FENCE_TYPE, DEC, H264 | HEVC | VP9 | AV1, + {0}, + msm_vidc_adjust_dec_outbuf_fence_type, + msm_vidc_set_outbuf_fence_type}, + + {INBUF_FENCE_DIRECTION, DEC, H264 | HEVC | VP9 | AV1, + {0}, + NULL, + NULL}, + + {OUTBUF_FENCE_DIRECTION, DEC, H264 | HEVC | VP9 | AV1, + {0}, + msm_vidc_adjust_dec_outbuf_fence_direction, + msm_vidc_set_outbuf_fence_direction}, + + {FENCE_ERROR_DATA_CORRUPT, DEC, H264 | HEVC | VP9 | AV1, + {0}, + NULL, + msm_vidc_set_u32}, + + {HFLIP, ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_flip}, + + {VFLIP, ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_flip}, + + {ROTATION, ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_rotation}, + + {SUPER_FRAME, ENC, H264 | HEVC, + {INPUT_BUF_HOST_MAX_COUNT, OUTPUT_BUF_HOST_MAX_COUNT}, + NULL, + NULL}, + + {SLICE_DECODE, DEC, H264 | HEVC | AV1, + {0}, + NULL, + NULL}, + + {HEADER_MODE, ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_header_mode}, + + {WITHOUT_STARTCODE, ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_nal_length}, + + {WITHOUT_STARTCODE, DEC, AV1, + {0}, + NULL, + msm_vidc_set_u32}, + + {REQUEST_I_FRAME, ENC, H264 | HEVC, + {0}, + NULL, + msm_vidc_set_req_sync_frame}, + + {BIT_RATE, ENC, H264, + {PEAK_BITRATE, BITRATE_BOOST, L0_BR}, + msm_vidc_adjust_bitrate, + msm_vidc_set_bitrate}, + + {BIT_RATE, ENC, HEVC, + {PEAK_BITRATE, BITRATE_BOOST, L0_BR}, + msm_vidc_adjust_bitrate, + msm_vidc_set_bitrate}, + + {BITRATE_MODE, ENC, H264, + {LTR_COUNT, IR_PERIOD, TIME_DELTA_BASED_RC, I_FRAME_QP, + P_FRAME_QP, B_FRAME_QP, ENH_LAYER_COUNT, BIT_RATE, + META_ROI_INFO, MIN_QUALITY, BITRATE_BOOST, VBV_DELAY, + PEAK_BITRATE, SLICE_MODE, CONTENT_ADAPTIVE_CODING, + BLUR_TYPES, LOWLATENCY_MODE, META_TRANSCODING_STAT_INFO}, + msm_vidc_adjust_bitrate_mode, + msm_vidc_set_u32_enum}, + + {BITRATE_MODE, ENC, HEVC, + {LTR_COUNT, IR_PERIOD, TIME_DELTA_BASED_RC, I_FRAME_QP, + P_FRAME_QP, B_FRAME_QP, CONSTANT_QUALITY, ENH_LAYER_COUNT, + BIT_RATE, META_ROI_INFO, MIN_QUALITY, BITRATE_BOOST, VBV_DELAY, + PEAK_BITRATE, SLICE_MODE, CONTENT_ADAPTIVE_CODING, + BLUR_TYPES, LOWLATENCY_MODE, META_EVA_STATS, META_TRANSCODING_STAT_INFO}, + msm_vidc_adjust_bitrate_mode, + msm_vidc_set_u32_enum}, + + {BITRATE_MODE, ENC, HEIC, + {TIME_DELTA_BASED_RC, CONSTANT_QUALITY}, + msm_vidc_adjust_bitrate_mode, + msm_vidc_set_u32_enum}, + + {CONSTANT_QUALITY, ENC, HEVC | HEIC, + {0}, + NULL, + msm_vidc_set_constant_quality}, + + {GOP_SIZE, ENC, CODECS_ALL, + {ALL_INTRA}, + msm_vidc_adjust_gop_size, + msm_vidc_set_gop_size}, + + {GOP_SIZE, ENC, HEIC, + {0}, + NULL, + msm_vidc_set_u32}, + + {B_FRAME, ENC, H264 | HEVC, + {ALL_INTRA}, + msm_vidc_adjust_b_frame, + msm_vidc_set_u32}, + + {B_FRAME, ENC, HEIC, + {0}, + NULL, + msm_vidc_set_u32}, + + {BLUR_TYPES, ENC, H264 | HEVC, + {BLUR_RESOLUTION}, + msm_vidc_adjust_blur_type, + msm_vidc_set_u32_enum}, + + {BLUR_RESOLUTION, ENC, H264 | HEVC, + {0}, + msm_vidc_adjust_blur_resolution, + msm_vidc_set_blur_resolution}, + + {CSC, ENC, CODECS_ALL, + {0}, + msm_vidc_adjust_csc, + msm_vidc_set_u32}, + + {CSC_CUSTOM_MATRIX, ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_csc_custom_matrix}, + + {LOWLATENCY_MODE, ENC, H264 | HEVC, + {STAGE, BIT_RATE}, + msm_vidc_adjust_enc_lowlatency_mode, + NULL}, + + {LOWLATENCY_MODE, DEC, H264 | HEVC | AV1, + {STAGE}, + msm_vidc_adjust_dec_lowlatency_mode, + NULL}, + + {LOWLATENCY_MODE, DEC, VP9, + {STAGE}, + msm_vidc_adjust_dec_lowlatency_mode, + NULL}, + + {LTR_COUNT, ENC, H264 | HEVC, + {0}, + msm_vidc_adjust_ltr_count, + msm_vidc_set_u32}, + + {USE_LTR, ENC, H264 | HEVC, + {0}, + msm_vidc_adjust_use_ltr, + msm_vidc_set_use_and_mark_ltr}, + + {MARK_LTR, ENC, H264 | HEVC, + {0}, + msm_vidc_adjust_mark_ltr, + msm_vidc_set_use_and_mark_ltr}, + + {IR_PERIOD, ENC, H264 | HEVC, + {0}, + msm_vidc_adjust_ir_period, + msm_vidc_set_ir_period}, + + {AU_DELIMITER, ENC, H264 | HEVC, + {0}, + NULL, + msm_vidc_set_u32}, + + {BASELAYER_PRIORITY, ENC, H264, + {0}, + NULL, + msm_vidc_set_u32}, + + {TIME_DELTA_BASED_RC, ENC, CODECS_ALL, + {0}, + msm_vidc_adjust_delta_based_rc, + msm_vidc_set_u32}, + + {CONTENT_ADAPTIVE_CODING, ENC, H264 | HEVC, + {REQUEST_PREPROCESS}, + msm_vidc_adjust_brs, + msm_vidc_set_vbr_related_properties}, + + {REQUEST_PREPROCESS, ENC, H264 | HEVC, + {0}, + msm_vidc_adjust_preprocess, + msm_vidc_set_preprocess}, + + {BITRATE_BOOST, ENC, H264 | HEVC, + {0}, + msm_vidc_adjust_bitrate_boost_iris33, + msm_vidc_set_vbr_related_properties}, + + {MIN_QUALITY, ENC, H264 | HEVC, + {BLUR_TYPES}, + msm_vidc_adjust_min_quality, + msm_vidc_set_u32}, + + {VBV_DELAY, ENC, H264 | HEVC, + {0}, + NULL, + msm_vidc_set_cbr_related_properties}, + + {PEAK_BITRATE, ENC, H264 | HEVC, + {0}, + msm_vidc_adjust_peak_bitrate, + msm_vidc_set_cbr_related_properties}, + + {MIN_FRAME_QP, ENC, H264, + {0}, + NULL, + msm_vidc_set_min_qp}, + + {MIN_FRAME_QP, ENC, HEVC, + {0}, + msm_vidc_adjust_hevc_min_qp, + msm_vidc_set_min_qp}, + + {MAX_FRAME_QP, ENC, H264, + {0}, + NULL, + msm_vidc_set_max_qp}, + + {MAX_FRAME_QP, ENC, HEVC, + {0}, + msm_vidc_adjust_hevc_max_qp, + msm_vidc_set_max_qp}, + + {I_FRAME_QP, ENC, HEVC, + {0}, + msm_vidc_adjust_hevc_i_frame_qp, + msm_vidc_set_frame_qp}, + + {I_FRAME_QP, ENC, H264, + {0}, + NULL, + msm_vidc_set_frame_qp}, + + {P_FRAME_QP, ENC, HEVC, + {0}, + msm_vidc_adjust_hevc_p_frame_qp, + msm_vidc_set_frame_qp}, + + {P_FRAME_QP, ENC, H264, + {0}, + NULL, + msm_vidc_set_frame_qp}, + + {B_FRAME_QP, ENC, HEVC, + {0}, + msm_vidc_adjust_hevc_b_frame_qp, + msm_vidc_set_frame_qp}, + + {B_FRAME_QP, ENC, H264, + {0}, + NULL, + msm_vidc_set_frame_qp}, + + {LAYER_TYPE, ENC, H264 | HEVC, + {CONTENT_ADAPTIVE_CODING, LTR_COUNT}}, + + {LAYER_ENABLE, ENC, H264 | HEVC, + {CONTENT_ADAPTIVE_CODING}}, + + {ENH_LAYER_COUNT, ENC, H264 | HEVC, + {GOP_SIZE, B_FRAME, BIT_RATE, MIN_QUALITY, SLICE_MODE, LTR_COUNT}, + msm_vidc_adjust_layer_count, + msm_vidc_set_layer_count_and_type}, + + {ENH_LAYER_COUNT, DEC, AV1, + {0}, + NULL, + msm_vidc_set_u32}, + + {L0_BR, ENC, H264 | HEVC, + {L1_BR}, + msm_vidc_adjust_layer_bitrate, + msm_vidc_set_layer_bitrate}, + + {L1_BR, ENC, H264 | HEVC, + {L2_BR}, + msm_vidc_adjust_layer_bitrate, + msm_vidc_set_layer_bitrate}, + + {L2_BR, ENC, H264 | HEVC, + {L3_BR}, + msm_vidc_adjust_layer_bitrate, + msm_vidc_set_layer_bitrate}, + + {L3_BR, ENC, H264 | HEVC, + {L4_BR}, + msm_vidc_adjust_layer_bitrate, + msm_vidc_set_layer_bitrate}, + + {L4_BR, ENC, H264 | HEVC, + {L5_BR}, + msm_vidc_adjust_layer_bitrate, + msm_vidc_set_layer_bitrate}, + + {L5_BR, ENC, H264 | HEVC, + {0}, + msm_vidc_adjust_layer_bitrate, + msm_vidc_set_layer_bitrate}, + + {ENTROPY_MODE, ENC, H264, + {BIT_RATE}, + msm_vidc_adjust_entropy_mode, + msm_vidc_set_u32}, + + {PROFILE, ENC, H264, + {ENTROPY_MODE, TRANSFORM_8X8}, + NULL, + msm_vidc_set_u32_enum}, + + {PROFILE, DEC, H264, + {ENTROPY_MODE}, + NULL, + msm_vidc_set_u32_enum}, + + {PROFILE, ENC, HEVC | HEIC, + {META_SEI_MASTERING_DISP, META_SEI_CLL, META_HDR10PLUS}, + msm_vidc_adjust_profile, + msm_vidc_set_u32_enum}, + + {PROFILE, DEC, HEVC | HEIC, + {0}, + msm_vidc_adjust_profile, + msm_vidc_set_u32_enum}, + + {PROFILE, DEC, VP9 | AV1, + {0}, + NULL, + msm_vidc_set_u32_enum}, + + {LEVEL, DEC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_u32_enum}, + + {LEVEL, ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_level}, + + {AV1_TIER, DEC, AV1, + {0}, + NULL, + msm_vidc_set_u32_enum}, + + {HEVC_TIER, ENC | DEC, HEVC | HEIC, + {0}, + NULL, + msm_vidc_set_u32_enum}, + + {LF_MODE, ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_deblock_mode}, + + {SLICE_MODE, ENC, H264 | HEVC, + {STAGE, DELIVERY_MODE}, + msm_vidc_adjust_slice_count, + msm_vidc_set_slice_count}, + + {SLICE_MODE, ENC, HEIC, + {0}, + msm_vidc_adjust_slice_count, + msm_vidc_set_slice_count}, + + {TRANSFORM_8X8, ENC, H264, + {0}, + msm_vidc_adjust_transform_8x8, + msm_vidc_set_u32}, + + {CHROMA_QP_INDEX_OFFSET, ENC, HEVC, + {0}, + msm_vidc_adjust_chroma_qp_index_offset, + msm_vidc_set_chroma_qp_index_offset}, + + {DISPLAY_DELAY_ENABLE, DEC, H264 | HEVC | VP9 | AV1, + {OUTPUT_ORDER}, + NULL, + NULL}, + + {DISPLAY_DELAY, DEC, H264 | HEVC | VP9 | AV1, + {OUTPUT_ORDER}, + NULL, + NULL}, + + {OUTPUT_ORDER, DEC, H264 | HEVC | AV1 | VP9, + {0}, + msm_vidc_adjust_output_order, + msm_vidc_set_u32}, + + {INPUT_BUF_HOST_MAX_COUNT, ENC | DEC, CODECS_ALL, + {0}, + msm_vidc_adjust_input_buf_host_max_count, + msm_vidc_set_u32}, + + {INPUT_BUF_HOST_MAX_COUNT, ENC, H264 | HEVC, + {0}, + msm_vidc_adjust_input_buf_host_max_count, + msm_vidc_set_u32}, + + {OUTPUT_BUF_HOST_MAX_COUNT, ENC | DEC, CODECS_ALL, + {0}, + msm_vidc_adjust_output_buf_host_max_count, + msm_vidc_set_u32}, + + {OUTPUT_BUF_HOST_MAX_COUNT, ENC, H264 | HEVC, + {0}, + msm_vidc_adjust_output_buf_host_max_count, + msm_vidc_set_u32}, + + {CONCEAL_COLOR_8BIT, DEC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_u32_packed}, + + {CONCEAL_COLOR_10BIT, DEC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_u32_packed}, + + {STAGE, ENC | DEC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_stage}, + + {STAGE, ENC, H264 | HEVC, + {0}, + NULL, + msm_vidc_set_stage}, + + {STAGE, DEC, H264 | HEVC | VP9 | AV1, + {0}, + NULL, + msm_vidc_set_stage}, + + {PIPE, DEC|ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_pipe}, + + {THUMBNAIL_MODE, DEC, H264 | HEVC | VP9 | AV1, + {OUTPUT_ORDER}, + NULL, + msm_vidc_set_u32}, + + {THUMBNAIL_MODE, DEC, HEIC, + {0}, + NULL, + msm_vidc_set_u32}, + + {RAP_FRAME, DEC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_u32}, + + {PRIORITY, DEC|ENC, CODECS_ALL, + {0}, + msm_vidc_adjust_session_priority, + msm_vidc_set_session_priority}, + + {FIRMWARE_PRIORITY_OFFSET, DEC | ENC, CODECS_ALL, + {0}, + NULL, + NULL}, + + {CRITICAL_PRIORITY, ENC, CODECS_ALL, + {0}, + NULL, + NULL}, + + {RESERVE_DURATION, ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_reserve_duration}, + + {DRAP, DEC, AV1, + {0}, + NULL, + msm_vidc_set_u32}, + + {ALL_INTRA, ENC, H264 | HEVC, + {LTR_COUNT, IR_PERIOD, SLICE_MODE, BIT_RATE}, + msm_vidc_adjust_all_intra, + NULL}, + + {META_EVA_STATS, ENC, HEVC, + {0}, + msm_vidc_adjust_eva_stats, + NULL}, + + {META_ROI_INFO, ENC, H264 | HEVC, + {MIN_QUALITY, IR_PERIOD, BLUR_TYPES}, + msm_vidc_adjust_roi_info, + NULL}, + + {GRID_ENABLE, ENC, HEIC, + {0}, + NULL, + msm_vidc_set_u32}, + + {DELIVERY_MODE, ENC, H264 | HEVC, + {LOWLATENCY_MODE, OUTPUT_BUF_HOST_MAX_COUNT}, + msm_vidc_adjust_delivery_mode, + msm_vidc_set_u32}, + + {VUI_TIMING_INFO, ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_vui_timing_info}, + + {SIGNAL_COLOR_INFO, ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_signal_color_info}, + + {META_SEI_MASTERING_DISP, ENC, HEVC | HEIC, + {0}, + msm_vidc_adjust_sei_mastering_disp, + NULL}, + + {META_SEI_CLL, ENC, HEVC | HEIC, + {0}, + msm_vidc_adjust_sei_cll, + NULL}, + + {META_HDR10PLUS, ENC, HEVC | HEIC, + {0}, + msm_vidc_adjust_hdr10plus, + NULL}, + + {META_TRANSCODING_STAT_INFO, ENC, HEVC|H264, + {0}, + msm_vidc_adjust_transcoding_stats, + NULL}, +}; + +/* Default UBWC config for LPDDR5 */ +static struct msm_vidc_ubwc_config_data ubwc_config_cliffs[] = { + UBWC_CONFIG(8, 32, 16, 0, 1, 1, 1), +}; + +static struct msm_vidc_format_capability format_data_cliffs = { + .codec_info = codec_data_cliffs, + .codec_info_size = ARRAY_SIZE(codec_data_cliffs), + .color_format_info = color_format_data_cliffs, + .color_format_info_size = ARRAY_SIZE(color_format_data_cliffs), + .color_prim_info = color_primaries_data_cliffs, + .color_prim_info_size = ARRAY_SIZE(color_primaries_data_cliffs), + .transfer_char_info = transfer_char_data_cliffs, + .transfer_char_info_size = ARRAY_SIZE(transfer_char_data_cliffs), + .matrix_coeff_info = matrix_coeff_data_cliffs, + .matrix_coeff_info_size = ARRAY_SIZE(matrix_coeff_data_cliffs), +}; + +/* name, min_kbps, max_kbps */ +static const struct bw_table cliffs_bw_table[] = { + { "venus-cnoc", 1000, 1000 }, + { "venus-ddr", 1000, 15000000 }, + { "venus-llcc", 1000, 15000000 }, +}; + +/* name, hw_trigger */ +static const struct regulator_table cliffs_regulator_table[] = { + { "iris-ctl", 0 }, + { "vcodec", 1 }, +}; + +/* name, clock id, scaling */ +static const struct clk_table cliffs_clk_table[] = { + { "gcc_video_axi0_clk", GCC_VIDEO_AXI0_CLK, 0 }, + { "video_cc_mvs0c_clk", VIDEO_CC_MVS0C_CLK, 0 }, + { "video_cc_mvs0_clk", VIDEO_CC_MVS0_CLK, 0 }, + { "video_cc_mvs0_clk_src", VIDEO_CC_MVS0_CLK_SRC, 1 }, +}; + +/* name, exclusive_release */ +static const struct clk_rst_table cliffs_clk_reset_table[] = { + { "video_axi_reset", 0 }, + { "video_xo_reset", 1 }, + { "video_mvs0c_reset", 0 }, +}; + +/* name, llcc_id */ +static const struct subcache_table cliffs_subcache_table[] = { + { "vidsc0", LLCC_VIDSC0 }, + { "vidvsp", LLCC_VIDVSP }, +}; + +/* name, start, size, secure, dma_coherant, region, dma_mask */ +const struct context_bank_table cliffs_context_bank_table[] = { + {"qcom,vidc,cb-ns", + 0x25800000, 0xba800000, 0, 1, MSM_VIDC_NON_SECURE, 0 }, + {"qcom,vidc,cb-ns-pxl", + 0x00100000, 0xdff00000, 0, 1, MSM_VIDC_NON_SECURE_PIXEL, 0 }, + {"qcom,vidc,cb-sec-pxl", + 0x00500000, 0xdfb00000, 1, 0, MSM_VIDC_SECURE_PIXEL, 0 }, + {"qcom,vidc,cb-sec-non-pxl", + 0x01000000, 0x24800000, 1, 0, MSM_VIDC_SECURE_NONPIXEL, 0 }, + {"qcom,vidc,cb-sec-bitstream", + 0x00500000, 0xdfb00000, 1, 0, MSM_VIDC_SECURE_BITSTREAM, 0 }, +}; + +/* freq */ +static struct freq_table cliffs_freq_table[] = { + {533333333}, {480000000}, {435000000}, {380000000}, {280000000}, {196000000} +}; + +/* register, value, mask */ +static const struct reg_preset_table cliffs_reg_preset_table[] = { + { 0xB0088, 0x0, 0x11 }, + { 0x13030, 0x33332222, 0xFFFFFFFF}, + { 0x13034, 0x44444444, 0xFFFFFFFF}, + { 0x13038, 0x1022, 0xFFFFFFFF}, + { 0x13040, 0x0, 0xFFFFFFFF}, + { 0x13048, 0xFFFF, 0xFFFFFFFF}, + { 0x13430, 0x33332222, 0xFFFFFFFF}, + { 0x13434, 0x44444444, 0xFFFFFFFF}, + { 0x13438, 0x1022, 0xFFFFFFFF}, + { 0x13440, 0x0, 0xFFFFFFFF}, + { 0x13448, 0xFFFF, 0xFFFFFFFF}, + { 0xA013C, 0x99, 0xFFFFFFFF}, +}; + +/* name, phys_addr, size, device_addr, device region type */ +static const struct device_region_table cliffs_device_region_table[] = { + { + "aon-registers", + 0x0AAE0000, 0x1000, 0xFFAE0000, + MSM_VIDC_AON + }, + { + "ipc_protocol4_client8_version-registers", + 0x00508000, 0x1000, 0xFFADF000, + MSM_VIDC_PROTOCOL_FENCE_CLIENT_VPU + }, + { + "qtimer_f0v1_qtmr_v1_cntpct_lo", + 0x17421000, 0x1000, 0xFFADE000, + MSM_VIDC_QTIMER + }, +}; + +/* decoder properties */ +static const u32 cliffs_vdec_psc_avc[] = { + HFI_PROP_BITSTREAM_RESOLUTION, + HFI_PROP_CROP_OFFSETS, + HFI_PROP_CODED_FRAMES, + HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT, + HFI_PROP_PIC_ORDER_CNT_TYPE, + HFI_PROP_PROFILE, + HFI_PROP_LEVEL, + HFI_PROP_SIGNAL_COLOR_INFO, + HFI_PROP_MAX_NUM_REORDER_FRAMES, +}; + +static const u32 cliffs_vdec_psc_hevc[] = { + HFI_PROP_BITSTREAM_RESOLUTION, + HFI_PROP_CROP_OFFSETS, + HFI_PROP_LUMA_CHROMA_BIT_DEPTH, + HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT, + HFI_PROP_PROFILE, + HFI_PROP_LEVEL, + HFI_PROP_TIER, + HFI_PROP_SIGNAL_COLOR_INFO, + HFI_PROP_MAX_NUM_REORDER_FRAMES, +}; + +static const u32 cliffs_vdec_psc_vp9[] = { + HFI_PROP_BITSTREAM_RESOLUTION, + HFI_PROP_CROP_OFFSETS, + HFI_PROP_LUMA_CHROMA_BIT_DEPTH, + HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT, + HFI_PROP_PROFILE, + HFI_PROP_LEVEL, +}; + +static const u32 cliffs_vdec_psc_av1[] = { + HFI_PROP_BITSTREAM_RESOLUTION, + HFI_PROP_CROP_OFFSETS, + HFI_PROP_LUMA_CHROMA_BIT_DEPTH, + HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT, + HFI_PROP_AV1_FILM_GRAIN_PRESENT, + HFI_PROP_AV1_SUPER_BLOCK_ENABLED, + HFI_PROP_PROFILE, + HFI_PROP_LEVEL, + HFI_PROP_TIER, + HFI_PROP_SIGNAL_COLOR_INFO, +}; + +static const u32 cliffs_vdec_input_properties_avc[] = { + HFI_PROP_NO_OUTPUT, + HFI_PROP_SUBFRAME_INPUT, + HFI_PROP_DPB_LIST, +}; + +static const u32 cliffs_vdec_input_properties_hevc[] = { + HFI_PROP_NO_OUTPUT, + HFI_PROP_SUBFRAME_INPUT, + HFI_PROP_DPB_LIST, +}; + +static const u32 cliffs_vdec_input_properties_vp9[] = { + HFI_PROP_NO_OUTPUT, + HFI_PROP_SUBFRAME_INPUT, + HFI_PROP_DPB_LIST, +}; + +static const u32 cliffs_vdec_input_properties_av1[] = { + HFI_PROP_NO_OUTPUT, + HFI_PROP_SUBFRAME_INPUT, + HFI_PROP_DPB_LIST, + HFI_PROP_AV1_TILE_ROWS_COLUMNS, + HFI_PROP_AV1_UNIFORM_TILE_SPACING, +}; + +static const u32 cliffs_vdec_output_properties_avc[] = { + HFI_PROP_WORST_COMPRESSION_RATIO, + HFI_PROP_WORST_COMPLEXITY_FACTOR, + HFI_PROP_PICTURE_TYPE, + HFI_PROP_CABAC_SESSION, + HFI_PROP_FENCE, +}; + +static const u32 cliffs_vdec_output_properties_hevc[] = { + HFI_PROP_WORST_COMPRESSION_RATIO, + HFI_PROP_WORST_COMPLEXITY_FACTOR, + HFI_PROP_PICTURE_TYPE, + HFI_PROP_FENCE, +}; + +static const u32 cliffs_vdec_output_properties_vp9[] = { + HFI_PROP_WORST_COMPRESSION_RATIO, + HFI_PROP_WORST_COMPLEXITY_FACTOR, + HFI_PROP_PICTURE_TYPE, + HFI_PROP_FENCE, +}; + +static const u32 cliffs_vdec_output_properties_av1[] = { + HFI_PROP_WORST_COMPRESSION_RATIO, + HFI_PROP_WORST_COMPLEXITY_FACTOR, + HFI_PROP_PICTURE_TYPE, + HFI_PROP_FENCE, +}; + +static struct msm_vidc_efuse_data efuse_data_cliffs[] = { + EFUSE_ENTRY(0x221C8118, 4, 0x1000, 0xB, SKU_VERSION), + EFUSE_ENTRY(0x221C812C, 4, 0x40, 0x6, SKU_VERSION), +}; + +static const struct msm_vidc_platform_data cliffs_data = { + /* resources dependent on other module */ + .bw_tbl = cliffs_bw_table, + .bw_tbl_size = ARRAY_SIZE(cliffs_bw_table), + .regulator_tbl = cliffs_regulator_table, + .regulator_tbl_size = ARRAY_SIZE(cliffs_regulator_table), + .clk_tbl = cliffs_clk_table, + .clk_tbl_size = ARRAY_SIZE(cliffs_clk_table), + .clk_rst_tbl = cliffs_clk_reset_table, + .clk_rst_tbl_size = ARRAY_SIZE(cliffs_clk_reset_table), + .subcache_tbl = cliffs_subcache_table, + .subcache_tbl_size = ARRAY_SIZE(cliffs_subcache_table), + + /* populate context bank */ + .context_bank_tbl = cliffs_context_bank_table, + .context_bank_tbl_size = ARRAY_SIZE(cliffs_context_bank_table), + + /* platform specific resources */ + .freq_tbl = cliffs_freq_table, + .freq_tbl_size = ARRAY_SIZE(cliffs_freq_table), + .reg_prst_tbl = cliffs_reg_preset_table, + .reg_prst_tbl_size = ARRAY_SIZE(cliffs_reg_preset_table), + .dev_reg_tbl = cliffs_device_region_table, + .dev_reg_tbl_size = ARRAY_SIZE(cliffs_device_region_table), + .fwname = "vpu33_4v", + .pas_id = 9, + .supports_mmrm = 1, + + /* caps related resorces */ + .core_data = core_data_cliffs_v0, + .core_data_size = ARRAY_SIZE(core_data_cliffs_v0), + .inst_cap_data = instance_cap_data_cliffs_v0, + .inst_cap_data_size = ARRAY_SIZE(instance_cap_data_cliffs_v0), + .inst_cap_dependency_data = instance_cap_dependency_data_cliffs_v0, + .inst_cap_dependency_data_size = ARRAY_SIZE(instance_cap_dependency_data_cliffs_v0), + .csc_data.vpe_csc_custom_bias_coeff = vpe_csc_custom_bias_coeff, + .csc_data.vpe_csc_custom_matrix_coeff = vpe_csc_custom_matrix_coeff, + .csc_data.vpe_csc_custom_limit_coeff = vpe_csc_custom_limit_coeff, + .ubwc_config = ubwc_config_cliffs, + .format_data = &format_data_cliffs, + + /* decoder properties related*/ + .psc_avc_tbl = cliffs_vdec_psc_avc, + .psc_avc_tbl_size = ARRAY_SIZE(cliffs_vdec_psc_avc), + .psc_hevc_tbl = cliffs_vdec_psc_hevc, + .psc_hevc_tbl_size = ARRAY_SIZE(cliffs_vdec_psc_hevc), + .psc_vp9_tbl = cliffs_vdec_psc_vp9, + .psc_vp9_tbl_size = ARRAY_SIZE(cliffs_vdec_psc_vp9), + .psc_av1_tbl = cliffs_vdec_psc_av1, + .psc_av1_tbl_size = ARRAY_SIZE(cliffs_vdec_psc_av1), + .dec_input_prop_avc = cliffs_vdec_input_properties_avc, + .dec_input_prop_hevc = cliffs_vdec_input_properties_hevc, + .dec_input_prop_vp9 = cliffs_vdec_input_properties_vp9, + .dec_input_prop_av1 = cliffs_vdec_input_properties_av1, + .dec_input_prop_size_avc = ARRAY_SIZE(cliffs_vdec_input_properties_avc), + .dec_input_prop_size_hevc = ARRAY_SIZE(cliffs_vdec_input_properties_hevc), + .dec_input_prop_size_vp9 = ARRAY_SIZE(cliffs_vdec_input_properties_vp9), + .dec_input_prop_size_av1 = ARRAY_SIZE(cliffs_vdec_input_properties_av1), + .dec_output_prop_avc = cliffs_vdec_output_properties_avc, + .dec_output_prop_hevc = cliffs_vdec_output_properties_hevc, + .dec_output_prop_vp9 = cliffs_vdec_output_properties_vp9, + .dec_output_prop_av1 = cliffs_vdec_output_properties_av1, + .dec_output_prop_size_avc = ARRAY_SIZE(cliffs_vdec_output_properties_avc), + .dec_output_prop_size_hevc = ARRAY_SIZE(cliffs_vdec_output_properties_hevc), + .dec_output_prop_size_vp9 = ARRAY_SIZE(cliffs_vdec_output_properties_vp9), + .dec_output_prop_size_av1 = ARRAY_SIZE(cliffs_vdec_output_properties_av1), + + /* Fuse specific resources */ + .efuse_data = efuse_data_cliffs, + .efuse_data_size = ARRAY_SIZE(efuse_data_cliffs), + .sku_version = SKU_VERSION_1, +}; + +int msm_vidc_cliffs_check_ddr_type(void) +{ + u32 ddr_type; + + ddr_type = of_fdt_get_ddrtype(); + if (ddr_type != DDR_TYPE_LPDDR5 && + ddr_type != DDR_TYPE_LPDDR5X) { + d_vpr_e("%s: wrong ddr type %d\n", __func__, ddr_type); + return -EINVAL; + } + + d_vpr_h("%s: ddr type %d\n", __func__, ddr_type); + return 0; +} + +static int msm_vidc_init_data(struct msm_vidc_core *core) +{ + struct device *dev = NULL; + int rc = 0; + + dev = &core->pdev->dev; + + d_vpr_h("%s: initialize cliffs data\n", __func__); + + core->platform->data = cliffs_data; + + /* Check for sku version */ + rc = msm_vidc_read_efuse(core); + if (rc) { + d_vpr_e("%s: Failed to read efuse\n", __func__); + return rc; + } + + if (core->platform->data.sku_version == SKU_VERSION_2) { + core->platform->data.core_data = core_data_cliffs_v1; + core->platform->data.core_data_size = + ARRAY_SIZE(core_data_cliffs_v1); + core->platform->data.inst_cap_data = instance_cap_data_cliffs_v1; + core->platform->data.inst_cap_data_size = + ARRAY_SIZE(instance_cap_data_cliffs_v1); + core->platform->data.inst_cap_dependency_data = + instance_cap_dependency_data_cliffs_v1; + core->platform->data.inst_cap_dependency_data_size = + ARRAY_SIZE(instance_cap_dependency_data_cliffs_v1); + } + + core->mem_ops = get_mem_ops_ext(); + if (!core->mem_ops) { + d_vpr_e("%s: invalid memory ext ops\n", __func__); + return -EINVAL; + } + core->res_ops = get_res_ops_ext(); + if (!core->res_ops) { + d_vpr_e("%s: invalid resource ext ops\n", __func__); + return -EINVAL; + } + core->fence_ops = get_synx_fence_ops(); + if (!core->fence_ops) { + d_vpr_e("%s: invalid synx fence ops\n", __func__); + return -EINVAL; + } + + rc = msm_vidc_cliffs_check_ddr_type(); + if (rc) + return rc; + + return rc; +} + +int msm_vidc_init_platform_cliffs(struct msm_vidc_core *core) +{ + int rc = 0; + + rc = msm_vidc_init_data(core); + if (rc) + return rc; + + return 0; +} diff --git a/driver/platform/common/inc/msm_vidc_platform.h b/driver/platform/common/inc/msm_vidc_platform.h index e6e1e19464..9e84d54028 100644 --- a/driver/platform/common/inc/msm_vidc_platform.h +++ b/driver/platform/common/inc/msm_vidc_platform.h @@ -279,6 +279,7 @@ static inline bool is_mmrm_supported(struct msm_vidc_core *core) } int msm_vidc_init_platform(struct msm_vidc_core *core); +int msm_vidc_read_efuse(struct msm_vidc_core *core); /* control framework support functions */ diff --git a/driver/platform/common/src/msm_vidc_platform.c b/driver/platform/common/src/msm_vidc_platform.c index 504cbe7c76..03ad33cbf1 100644 --- a/driver/platform/common/src/msm_vidc_platform.c +++ b/driver/platform/common/src/msm_vidc_platform.c @@ -24,6 +24,7 @@ #if defined(CONFIG_MSM_VIDC_PINEAPPLE) #include "msm_vidc_pineapple.h" +#include "msm_vidc_cliffs.h" #include "msm_vidc_iris33.h" #endif #if defined(CONFIG_MSM_VIDC_KALAMA) @@ -217,6 +218,11 @@ static const struct msm_vidc_compat_handle compat_handle[] = { .init_platform = msm_vidc_init_platform_pineapple, .init_iris = msm_vidc_init_iris33, }, + { + .compat = "qcom,cliffs-vidc", + .init_platform = msm_vidc_init_platform_cliffs, + .init_iris = msm_vidc_init_iris33, + }, #endif #if defined(CONFIG_MSM_VIDC_KALAMA) { @@ -361,6 +367,49 @@ int msm_vidc_init_platform(struct msm_vidc_core *core) return rc; } +int msm_vidc_read_efuse(struct msm_vidc_core *core) +{ + int rc = 0; + void __iomem *base; + u32 i = 0, efuse = 0, efuse_data_count = 0; + struct msm_vidc_efuse_data *efuse_data = NULL; + struct msm_vidc_platform_data *platform_data; + + platform_data = &core->platform->data; + efuse_data = platform_data->efuse_data; + efuse_data_count = platform_data->efuse_data_size; + + if (!efuse_data) + return 0; + + for (i = 0; i < efuse_data_count; i++) { + switch (efuse_data[i].purpose) { + case SKU_VERSION: + base = devm_ioremap(&core->pdev->dev, efuse_data[i].start_address, + efuse_data[i].size); + if (!base) { + d_vpr_e("failed efuse: start %#x, size %d\n", + efuse_data[i].start_address, + efuse_data[i].size); + return -EINVAL; + } + efuse = readl_relaxed(base); + platform_data->sku_version = + (efuse & efuse_data[i].mask) >> + efuse_data[i].shift; + break; + default: + break; + } + if (platform_data->sku_version) { + d_vpr_h("efuse 0x%x, platform version 0x%x\n", + efuse, platform_data->sku_version); + break; + } + } + return rc; +} + /****************** control framework utility functions **********************/ enum msm_vidc_inst_capability_type msm_vidc_get_cap_id( diff --git a/driver/vidc/src/msm_vidc_probe.c b/driver/vidc/src/msm_vidc_probe.c index 2aa1feca54..a217aad286 100644 --- a/driver/vidc/src/msm_vidc_probe.c +++ b/driver/vidc/src/msm_vidc_probe.c @@ -43,8 +43,9 @@ static inline bool is_video_device(struct device *dev) return !!(of_device_is_compatible(dev->of_node, "qcom,sm8450-vidc") || of_device_is_compatible(dev->of_node, "qcom,sm8550-vidc") || of_device_is_compatible(dev->of_node, "qcom,sm8550-vidc-v2") || - of_device_is_compatible(dev->of_node, "qcom,sm8650-vidc")) || - of_device_is_compatible(dev->of_node, "qcom,sm8650-vidc-v2"); + of_device_is_compatible(dev->of_node, "qcom,sm8650-vidc") || + of_device_is_compatible(dev->of_node, "qcom,sm8650-vidc-v2") || + of_device_is_compatible(dev->of_node, "qcom,cliffs-vidc")); } static inline bool is_video_context_bank_device_node(struct device_node *of_node) @@ -121,6 +122,7 @@ static const struct of_device_id msm_vidc_dt_match[] = { {.compatible = "qcom,sm8550-vidc-v2"}, {.compatible = "qcom,sm8650-vidc"}, {.compatible = "qcom,sm8650-vidc-v2"}, + {.compatible = "qcom,cliffs-vidc"}, {.compatible = "qcom,vidc,cb-ns-pxl"}, {.compatible = "qcom,vidc,cb-ns"}, {.compatible = "qcom,vidc,cb-sec-non-pxl"}, diff --git a/msm_video/Kbuild b/msm_video/Kbuild index b2337c4cb3..03fdd51c7b 100644 --- a/msm_video/Kbuild +++ b/msm_video/Kbuild @@ -16,6 +16,7 @@ endif ifeq ($(CONFIG_MSM_VIDC_PINEAPPLE), y) LINUXINCLUDE += -I$(VIDEO_DRIVER_ABS_PATH)/platform/pineapple/inc \ + -I$(VIDEO_DRIVER_ABS_PATH)/platform/cliffs/inc \ -I$(VIDEO_DRIVER_ABS_PATH)/variant/iris33/inc endif ifeq ($(CONFIG_MSM_VIDC_KALAMA), y) @@ -37,6 +38,7 @@ obj-m += msm_video.o ifeq ($(CONFIG_MSM_VIDC_PINEAPPLE), y) msm_video-objs += $(VIDEO_DRIVER_REL_PATH)/platform/pineapple/src/msm_vidc_pineapple.o \ + $(VIDEO_DRIVER_REL_PATH)/platform/cliffs/src/msm_vidc_cliffs.o \ $(VIDEO_DRIVER_REL_PATH)/variant/iris33/src/msm_vidc_buffer_iris33.o \ $(VIDEO_DRIVER_REL_PATH)/variant/iris33/src/msm_vidc_power_iris33.o \ $(VIDEO_DRIVER_REL_PATH)/variant/iris33/src/msm_vidc_bus_iris33.o \ diff --git a/video_modules.bzl b/video_modules.bzl index b1666c7f4b..0d8d330d0a 100644 --- a/video_modules.bzl +++ b/video_modules.bzl @@ -42,6 +42,7 @@ module_entry( "driver/variant/iris33/src/msm_vidc_power_iris33.c", "driver/variant/iris33/src/msm_vidc_iris33.c", "driver/platform/pineapple/src/msm_vidc_pineapple.c", + "driver/platform/cliffs/src/msm_vidc_cliffs.c", ], }, deps = [ @@ -79,6 +80,7 @@ module_entry( config_srcs = { "CONFIG_MSM_VIDC_PINEAPPLE" : [ "driver/platform/pineapple/src/pineapple.c", + "driver/platform/cliffs/src/cliffs.c", "driver/variant/iris33/src/msm_vidc_buffer_iris33.c", "driver/variant/iris33/src/msm_vidc_power_iris33.c", "driver/variant/iris33/src/msm_vidc_bus_iris33.c", From 50723bee026b0de405748cdde5d4d817d505b5a8 Mon Sep 17 00:00:00 2001 From: Vedang Nagar Date: Thu, 27 Jul 2023 11:50:54 +0530 Subject: [PATCH 0980/1061] Video: driver: Fix warnings for vendor checker Fix warnings for vendor checker in vidc/inc folder. [1] CHECK: Alignment should match open parenthesis. [2] Lines should not end with a '('. [3] Please use a blank line after. Change-Id: Iac0591fc1e544e837a3c64c7a6e9b03cc9070ed2 Signed-off-by: Vedang Nagar --- driver/vidc/inc/hfi_command.h | 1 - driver/vidc/inc/hfi_packet.h | 44 ++-- driver/vidc/inc/hfi_property.h | 346 +++++++++++++-------------- driver/vidc/inc/msm_media_info.h | 98 ++++---- driver/vidc/inc/msm_vdec.h | 6 +- driver/vidc/inc/msm_venc.h | 6 +- driver/vidc/inc/msm_vidc.h | 12 +- driver/vidc/inc/msm_vidc_buffer.h | 4 +- driver/vidc/inc/msm_vidc_control.h | 6 +- driver/vidc/inc/msm_vidc_core.h | 8 +- driver/vidc/inc/msm_vidc_debug.h | 4 +- driver/vidc/inc/msm_vidc_driver.h | 131 +++++----- driver/vidc/inc/msm_vidc_fence.h | 6 +- driver/vidc/inc/msm_vidc_inst.h | 7 +- driver/vidc/inc/msm_vidc_internal.h | 10 +- driver/vidc/inc/msm_vidc_memory.h | 34 +-- driver/vidc/inc/msm_vidc_state.h | 23 +- driver/vidc/inc/msm_vidc_v4l2.h | 56 ++--- driver/vidc/inc/msm_vidc_vb2.h | 22 +- driver/vidc/inc/resources.h | 15 +- driver/vidc/inc/venus_hfi.h | 35 +-- driver/vidc/inc/venus_hfi_response.h | 13 +- driver/vidc/src/venus_hfi_response.c | 6 +- 23 files changed, 466 insertions(+), 427 deletions(-) diff --git a/driver/vidc/inc/hfi_command.h b/driver/vidc/inc/hfi_command.h index 74db6d4a98..2f7f984965 100644 --- a/driver/vidc/inc/hfi_command.h +++ b/driver/vidc/inc/hfi_command.h @@ -13,7 +13,6 @@ #define HFI_VIDEO_ARCH_LX 0x1 - struct hfi_header { u32 size; u32 session_id; diff --git a/driver/vidc/inc/hfi_packet.h b/driver/vidc/inc/hfi_packet.h index 0cc35831ad..0a69c4bc7c 100644 --- a/driver/vidc/inc/hfi_packet.h +++ b/driver/vidc/inc/hfi_packet.h @@ -14,38 +14,46 @@ #include "hfi_property.h" u32 get_hfi_port(struct msm_vidc_inst *inst, - enum msm_vidc_port_type port); + enum msm_vidc_port_type port); u32 get_hfi_port_from_buffer_type(struct msm_vidc_inst *inst, - enum msm_vidc_buffer_type buffer_type); + enum msm_vidc_buffer_type buffer_type); u32 hfi_buf_type_from_driver(enum msm_vidc_domain_type domain, - enum msm_vidc_buffer_type buffer_type); + enum msm_vidc_buffer_type buffer_type); u32 hfi_buf_type_to_driver(enum msm_vidc_domain_type domain, - enum hfi_buffer_type buffer_type, enum hfi_packet_port_type port_type); + enum hfi_buffer_type buffer_type, + enum hfi_packet_port_type port_type); u32 get_hfi_codec(struct msm_vidc_inst *inst); u32 get_hfi_colorformat(struct msm_vidc_inst *inst, - enum msm_vidc_colorformat_type colorformat); + enum msm_vidc_colorformat_type colorformat); int get_hfi_buffer(struct msm_vidc_inst *inst, - struct msm_vidc_buffer *buffer, struct hfi_buffer *buf); + struct msm_vidc_buffer *buffer, + struct hfi_buffer *buf); int hfi_create_header(u8 *packet, u32 packet_size, - u32 session_id, u32 header_id); + u32 session_id, u32 header_id); int hfi_create_packet(u8 *packet, u32 packet_size, - u32 pkt_type, u32 pkt_flags, u32 payload_type, u32 port, - u32 packet_id, void *payload, u32 payload_size); + u32 pkt_type, u32 pkt_flags, + u32 payload_type, u32 port, + u32 packet_id, void *payload, + u32 payload_size); int hfi_create_buffer(u8 *packet, u32 packet_size, u32 *offset, - enum msm_vidc_domain_type domain, struct msm_vidc_buffer *data); - + enum msm_vidc_domain_type domain, + struct msm_vidc_buffer *data); int hfi_packet_sys_init(struct msm_vidc_core *core, - u8 *pkt, u32 pkt_size); + u8 *pkt, u32 pkt_size); int hfi_packet_image_version(struct msm_vidc_core *core, - u8 *pkt, u32 pkt_size); + u8 *pkt, u32 pkt_size); int hfi_packet_sys_pc_prep(struct msm_vidc_core *core, - u8 *pkt, u32 pkt_size); + u8 *pkt, u32 pkt_size); int hfi_packet_sys_debug_config(struct msm_vidc_core *core, - u8 *pkt, u32 pkt_size, u32 debug_config); + u8 *pkt, u32 pkt_size, + u32 debug_config); int hfi_packet_session_command(struct msm_vidc_inst *inst, - u32 pkt_type, u32 flags, u32 port, u32 session_id, - u32 payload_type, void *payload, u32 payload_size); + u32 pkt_type, u32 flags, + u32 port, u32 session_id, + u32 payload_type, void *payload, + u32 payload_size); int hfi_packet_sys_intraframe_powercollapse(struct msm_vidc_core *core, - u8 *pkt, u32 pkt_size, u32 enable); + u8 *pkt, u32 pkt_size, + u32 enable); #endif // _HFI_PACKET_H_ diff --git a/driver/vidc/inc/hfi_property.h b/driver/vidc/inc/hfi_property.h index 4d83bcab95..3fb6601af9 100644 --- a/driver/vidc/inc/hfi_property.h +++ b/driver/vidc/inc/hfi_property.h @@ -22,22 +22,22 @@ #define HFI_PROP_UBWC_BANK_SPREADING 0x03000009 enum hfi_debug_config { - HFI_DEBUG_CONFIG_DEFAULT = 0x00000000, - HFI_DEBUG_CONFIG_CLRDBGQ = 0x00000001, - HFI_DEBUG_CONFIG_WFI = 0x00000002, - HFI_DEBUG_CONFIG_ARM9WD = 0x00000004, + HFI_DEBUG_CONFIG_DEFAULT = 0x00000000, + HFI_DEBUG_CONFIG_CLRDBGQ = 0x00000001, + HFI_DEBUG_CONFIG_WFI = 0x00000002, + HFI_DEBUG_CONFIG_ARM9WD = 0x00000004, }; #define HFI_PROP_DEBUG_CONFIG 0x0300000a enum hfi_debug_log_level { - HFI_DEBUG_LOG_NONE = 0x00000000, - HFI_DEBUG_LOG_ERROR = 0x00000001, - HFI_DEBUG_LOG_FATAL = 0x00000002, - HFI_DEBUG_LOG_PERF = 0x00000004, - HFI_DEBUG_LOG_HIGH = 0x00000008, - HFI_DEBUG_LOG_MEDIUM = 0x00000010, - HFI_DEBUG_LOG_LOW = 0x00000020, + HFI_DEBUG_LOG_NONE = 0x00000000, + HFI_DEBUG_LOG_ERROR = 0x00000001, + HFI_DEBUG_LOG_FATAL = 0x00000002, + HFI_DEBUG_LOG_PERF = 0x00000004, + HFI_DEBUG_LOG_HIGH = 0x00000008, + HFI_DEBUG_LOG_MEDIUM = 0x00000010, + HFI_DEBUG_LOG_LOW = 0x00000020, }; struct hfi_debug_header { @@ -51,26 +51,26 @@ struct hfi_debug_header { #define HFI_PROP_FENCE_CLIENT_DATA 0x0300000d enum hfi_codec_type { - HFI_CODEC_DECODE_AVC = 1, - HFI_CODEC_ENCODE_AVC = 2, - HFI_CODEC_DECODE_HEVC = 3, - HFI_CODEC_ENCODE_HEVC = 4, - HFI_CODEC_DECODE_VP9 = 5, - HFI_CODEC_DECODE_MPEG2 = 6, - HFI_CODEC_DECODE_AV1 = 7, + HFI_CODEC_DECODE_AVC = 1, + HFI_CODEC_ENCODE_AVC = 2, + HFI_CODEC_DECODE_HEVC = 3, + HFI_CODEC_ENCODE_HEVC = 4, + HFI_CODEC_DECODE_VP9 = 5, + HFI_CODEC_DECODE_MPEG2 = 6, + HFI_CODEC_DECODE_AV1 = 7, }; #define HFI_PROP_CODEC 0x03000100 enum hfi_color_format { - HFI_COLOR_FMT_OPAQUE = 0, - HFI_COLOR_FMT_NV12 = 1, - HFI_COLOR_FMT_NV12_UBWC = 2, - HFI_COLOR_FMT_P010 = 3, - HFI_COLOR_FMT_TP10_UBWC = 4, - HFI_COLOR_FMT_RGBA8888 = 5, - HFI_COLOR_FMT_RGBA8888_UBWC = 6, - HFI_COLOR_FMT_NV21 = 7, + HFI_COLOR_FMT_OPAQUE = 0, + HFI_COLOR_FMT_NV12 = 1, + HFI_COLOR_FMT_NV12_UBWC = 2, + HFI_COLOR_FMT_P010 = 3, + HFI_COLOR_FMT_TP10_UBWC = 4, + HFI_COLOR_FMT_RGBA8888 = 5, + HFI_COLOR_FMT_RGBA8888_UBWC = 6, + HFI_COLOR_FMT_NV21 = 7, }; #define HFI_PROP_COLOR_FORMAT 0x03000101 @@ -94,11 +94,11 @@ enum hfi_color_format { #define HFI_PROP_SESSION_PRIORITY 0x03000106 enum hfi_avc_profile_type { - HFI_AVC_PROFILE_BASELINE = 0, - HFI_AVC_PROFILE_CONSTRAINED_BASELINE = 1, - HFI_AVC_PROFILE_MAIN = 2, - HFI_AVC_PROFILE_HIGH = 4, - HFI_AVC_PROFILE_CONSTRAINED_HIGH = 17 + HFI_AVC_PROFILE_BASELINE = 0, + HFI_AVC_PROFILE_CONSTRAINED_BASELINE = 1, + HFI_AVC_PROFILE_MAIN = 2, + HFI_AVC_PROFILE_HIGH = 4, + HFI_AVC_PROFILE_CONSTRAINED_HIGH = 17 }; enum hfi_hevc_profile_type { @@ -109,128 +109,128 @@ enum hfi_hevc_profile_type { }; enum hfi_vp9_profile_type { - HFI_VP9_PROFILE_0 = 0, - HFI_VP9_PROFILE_1 = 1, - HFI_VP9_PROFILE_2 = 2, - HFI_VP9_PROFILE_3 = 3, + HFI_VP9_PROFILE_0 = 0, + HFI_VP9_PROFILE_1 = 1, + HFI_VP9_PROFILE_2 = 2, + HFI_VP9_PROFILE_3 = 3, }; enum hfi_mpeg2_profile_type { - HFI_MP2_PROFILE_SIMPLE = 0, - HFI_MP2_PROFILE_MAIN = 1, + HFI_MP2_PROFILE_SIMPLE = 0, + HFI_MP2_PROFILE_MAIN = 1, }; enum hfi_av1_profile_type { - HFI_AV1_PROFILE_MAIN = 0, - HFI_AV1_PROFILE_HIGH = 1, - HFI_AV1_PROFILE_PROF = 2, + HFI_AV1_PROFILE_MAIN = 0, + HFI_AV1_PROFILE_HIGH = 1, + HFI_AV1_PROFILE_PROF = 2, }; #define HFI_PROP_PROFILE 0x03000107 enum hfi_avc_level_type { - HFI_AVC_LEVEL_1_0 = 0, - HFI_AVC_LEVEL_1B = 1, - HFI_AVC_LEVEL_1_1 = 2, - HFI_AVC_LEVEL_1_2 = 3, - HFI_AVC_LEVEL_1_3 = 4, - HFI_AVC_LEVEL_2_0 = 5, - HFI_AVC_LEVEL_2_1 = 6, - HFI_AVC_LEVEL_2_2 = 7, - HFI_AVC_LEVEL_3_0 = 8, - HFI_AVC_LEVEL_3_1 = 9, - HFI_AVC_LEVEL_3_2 = 10, - HFI_AVC_LEVEL_4_0 = 11, - HFI_AVC_LEVEL_4_1 = 12, - HFI_AVC_LEVEL_4_2 = 13, - HFI_AVC_LEVEL_5_0 = 14, - HFI_AVC_LEVEL_5_1 = 15, - HFI_AVC_LEVEL_5_2 = 16, - HFI_AVC_LEVEL_6_0 = 17, - HFI_AVC_LEVEL_6_1 = 18, - HFI_AVC_LEVEL_6_2 = 19, + HFI_AVC_LEVEL_1_0 = 0, + HFI_AVC_LEVEL_1B = 1, + HFI_AVC_LEVEL_1_1 = 2, + HFI_AVC_LEVEL_1_2 = 3, + HFI_AVC_LEVEL_1_3 = 4, + HFI_AVC_LEVEL_2_0 = 5, + HFI_AVC_LEVEL_2_1 = 6, + HFI_AVC_LEVEL_2_2 = 7, + HFI_AVC_LEVEL_3_0 = 8, + HFI_AVC_LEVEL_3_1 = 9, + HFI_AVC_LEVEL_3_2 = 10, + HFI_AVC_LEVEL_4_0 = 11, + HFI_AVC_LEVEL_4_1 = 12, + HFI_AVC_LEVEL_4_2 = 13, + HFI_AVC_LEVEL_5_0 = 14, + HFI_AVC_LEVEL_5_1 = 15, + HFI_AVC_LEVEL_5_2 = 16, + HFI_AVC_LEVEL_6_0 = 17, + HFI_AVC_LEVEL_6_1 = 18, + HFI_AVC_LEVEL_6_2 = 19, }; enum hfi_hevc_level_type { - HFI_H265_LEVEL_1 = 0, - HFI_H265_LEVEL_2 = 1, - HFI_H265_LEVEL_2_1 = 2, - HFI_H265_LEVEL_3 = 3, - HFI_H265_LEVEL_3_1 = 4, - HFI_H265_LEVEL_4 = 5, - HFI_H265_LEVEL_4_1 = 6, - HFI_H265_LEVEL_5 = 7, - HFI_H265_LEVEL_5_1 = 8, - HFI_H265_LEVEL_5_2 = 9, - HFI_H265_LEVEL_6 = 10, - HFI_H265_LEVEL_6_1 = 11, - HFI_H265_LEVEL_6_2 = 12, + HFI_H265_LEVEL_1 = 0, + HFI_H265_LEVEL_2 = 1, + HFI_H265_LEVEL_2_1 = 2, + HFI_H265_LEVEL_3 = 3, + HFI_H265_LEVEL_3_1 = 4, + HFI_H265_LEVEL_4 = 5, + HFI_H265_LEVEL_4_1 = 6, + HFI_H265_LEVEL_5 = 7, + HFI_H265_LEVEL_5_1 = 8, + HFI_H265_LEVEL_5_2 = 9, + HFI_H265_LEVEL_6 = 10, + HFI_H265_LEVEL_6_1 = 11, + HFI_H265_LEVEL_6_2 = 12, }; enum hfi_vp9_level_type { - HFI_VP9_LEVEL_1_0 = 0, - HFI_VP9_LEVEL_1_1 = 1, - HFI_VP9_LEVEL_2_0 = 2, - HFI_VP9_LEVEL_2_1 = 3, - HFI_VP9_LEVEL_3_0 = 4, - HFI_VP9_LEVEL_3_1 = 5, - HFI_VP9_LEVEL_4_0 = 6, - HFI_VP9_LEVEL_4_1 = 7, - HFI_VP9_LEVEL_5_0 = 8, - HFI_VP9_LEVEL_5_1 = 9, - HFI_VP9_LEVEL_6_0 = 10, - HFI_VP9_LEVEL_6_1 = 11, + HFI_VP9_LEVEL_1_0 = 0, + HFI_VP9_LEVEL_1_1 = 1, + HFI_VP9_LEVEL_2_0 = 2, + HFI_VP9_LEVEL_2_1 = 3, + HFI_VP9_LEVEL_3_0 = 4, + HFI_VP9_LEVEL_3_1 = 5, + HFI_VP9_LEVEL_4_0 = 6, + HFI_VP9_LEVEL_4_1 = 7, + HFI_VP9_LEVEL_5_0 = 8, + HFI_VP9_LEVEL_5_1 = 9, + HFI_VP9_LEVEL_6_0 = 10, + HFI_VP9_LEVEL_6_1 = 11, }; enum hfi_mpeg2_level_type { - HFI_MP2_LEVEL_LOW = 0, - HFI_MP2_LEVEL_MAIN = 1, - HFI_MP2_LEVEL_HIGH_1440 = 2, - HFI_MP2_LEVEL_HIGH = 3, + HFI_MP2_LEVEL_LOW = 0, + HFI_MP2_LEVEL_MAIN = 1, + HFI_MP2_LEVEL_HIGH_1440 = 2, + HFI_MP2_LEVEL_HIGH = 3, }; enum hfi_av1_level_type { - HFI_AV1_LEVEL_2_0 = 0, - HFI_AV1_LEVEL_2_1 = 1, - HFI_AV1_LEVEL_2_2 = 2, - HFI_AV1_LEVEL_2_3 = 3, - HFI_AV1_LEVEL_3_0 = 4, - HFI_AV1_LEVEL_3_1 = 5, - HFI_AV1_LEVEL_3_2 = 6, - HFI_AV1_LEVEL_3_3 = 7, - HFI_AV1_LEVEL_4_0 = 8, - HFI_AV1_LEVEL_4_1 = 9, - HFI_AV1_LEVEL_4_2 = 10, - HFI_AV1_LEVEL_4_3 = 11, - HFI_AV1_LEVEL_5_0 = 12, - HFI_AV1_LEVEL_5_1 = 13, - HFI_AV1_LEVEL_5_2 = 14, - HFI_AV1_LEVEL_5_3 = 15, - HFI_AV1_LEVEL_6_0 = 16, - HFI_AV1_LEVEL_6_1 = 17, - HFI_AV1_LEVEL_6_2 = 18, - HFI_AV1_LEVEL_6_3 = 19, - HFI_AV1_LEVEL_7_0 = 20, - HFI_AV1_LEVEL_7_1 = 21, - HFI_AV1_LEVEL_7_2 = 22, - HFI_AV1_LEVEL_7_3 = 23, - HFI_AV1_LEVEL_MAX = 31, + HFI_AV1_LEVEL_2_0 = 0, + HFI_AV1_LEVEL_2_1 = 1, + HFI_AV1_LEVEL_2_2 = 2, + HFI_AV1_LEVEL_2_3 = 3, + HFI_AV1_LEVEL_3_0 = 4, + HFI_AV1_LEVEL_3_1 = 5, + HFI_AV1_LEVEL_3_2 = 6, + HFI_AV1_LEVEL_3_3 = 7, + HFI_AV1_LEVEL_4_0 = 8, + HFI_AV1_LEVEL_4_1 = 9, + HFI_AV1_LEVEL_4_2 = 10, + HFI_AV1_LEVEL_4_3 = 11, + HFI_AV1_LEVEL_5_0 = 12, + HFI_AV1_LEVEL_5_1 = 13, + HFI_AV1_LEVEL_5_2 = 14, + HFI_AV1_LEVEL_5_3 = 15, + HFI_AV1_LEVEL_6_0 = 16, + HFI_AV1_LEVEL_6_1 = 17, + HFI_AV1_LEVEL_6_2 = 18, + HFI_AV1_LEVEL_6_3 = 19, + HFI_AV1_LEVEL_7_0 = 20, + HFI_AV1_LEVEL_7_1 = 21, + HFI_AV1_LEVEL_7_2 = 22, + HFI_AV1_LEVEL_7_3 = 23, + HFI_AV1_LEVEL_MAX = 31, }; enum hfi_codec_level_type { - HFI_LEVEL_NONE = 0xFFFFFFFF, + HFI_LEVEL_NONE = 0xFFFFFFFF, }; #define HFI_PROP_LEVEL 0x03000108 enum hfi_hevc_tier_type { - HFI_H265_TIER_MAIN = 0, - HFI_H265_TIER_HIGH = 1, + HFI_H265_TIER_MAIN = 0, + HFI_H265_TIER_HIGH = 1, }; enum hfi_av1_tier_type { - HFI_AV1_TIER_MAIN = 0, - HFI_AV1_TIER_HIGH = 1, + HFI_AV1_TIER_MAIN = 0, + HFI_AV1_TIER_HIGH = 1, }; #define HFI_PROP_TIER 0x03000109 @@ -276,20 +276,20 @@ enum hfi_av1_tier_type { #define HFI_PROP_PIC_ORDER_CNT_TYPE 0x03000128 enum hfi_deblock_mode { - HFI_DEBLOCK_ALL_BOUNDARY = 0x0, - HFI_DEBLOCK_DISABLE = 0x1, - HFI_DEBLOCK_DISABLE_AT_SLICE_BOUNDARY = 0x2, + HFI_DEBLOCK_ALL_BOUNDARY = 0x0, + HFI_DEBLOCK_DISABLE = 0x1, + HFI_DEBLOCK_DISABLE_AT_SLICE_BOUNDARY = 0x2, }; #define HFI_PROP_DEBLOCKING_MODE 0x03000129 enum hfi_rate_control { - HFI_RC_VBR_CFR = 0x00000000, - HFI_RC_CBR_CFR = 0x00000001, - HFI_RC_CQ = 0x00000002, - HFI_RC_OFF = 0x00000003, - HFI_RC_CBR_VFR = 0x00000004, - HFI_RC_LOSSLESS = 0x00000005, + HFI_RC_VBR_CFR = 0x00000000, + HFI_RC_CBR_CFR = 0x00000001, + HFI_RC_CQ = 0x00000002, + HFI_RC_OFF = 0x00000003, + HFI_RC_CBR_VFR = 0x00000004, + HFI_RC_LOSSLESS = 0x00000005, }; #define HFI_PROP_RATE_CONTROL 0x0300012a @@ -326,9 +326,9 @@ enum hfi_rate_control { #define HFI_PROP_LTR_MARK_USE_DETAILS 0x03000137 enum hfi_layer_encoding_type { - HFI_HIER_P_SLIDING_WINDOW = 0x1, - HFI_HIER_P_HYBRID_LTR = 0x2, - HFI_HIER_B = 0x3, + HFI_HIER_P_SLIDING_WINDOW = 0x1, + HFI_HIER_P_HYBRID_LTR = 0x2, + HFI_HIER_B = 0x3, }; #define HFI_PROP_LAYER_ENCODING_TYPE 0x03000138 @@ -336,8 +336,8 @@ enum hfi_layer_encoding_type { #define HFI_PROP_LAYER_COUNT 0x03000139 enum hfi_chromaqp_offset_mode { - HFI_ADAPTIVE_CHROMAQP_OFFSET = 0x0, - HFI_FIXED_CHROMAQP_OFFSET = 0x1, + HFI_ADAPTIVE_CHROMAQP_OFFSET = 0x0, + HFI_FIXED_CHROMAQP_OFFSET = 0x1, }; #define HFI_BITMASK_CHROMA_CB_OFFSET 0x0000ffff @@ -365,8 +365,8 @@ enum hfi_chromaqp_offset_mode { #define HFI_PROP_HEIC_GRID_ENABLE 0x03000144 enum hfi_syncframe_request_mode { - HFI_SYNC_FRAME_REQUEST_WITHOUT_SEQ_HDR = 0x00000001, - HFI_SYNC_FRAME_REQUEST_WITH_PREFIX_SEQ_HDR = 0x00000002, + HFI_SYNC_FRAME_REQUEST_WITHOUT_SEQ_HDR = 0x00000001, + HFI_SYNC_FRAME_REQUEST_WITH_PREFIX_SEQ_HDR = 0x00000002, }; #define HFI_PROP_REQUEST_SYNC_FRAME 0x03000145 @@ -376,17 +376,17 @@ enum hfi_syncframe_request_mode { #define HFI_PROP_MAX_B_FRAMES 0x03000147 enum hfi_quality_mode { - HFI_MODE_MAX_QUALITY = 0x1, - HFI_MODE_POWER_SAVE = 0x2, + HFI_MODE_MAX_QUALITY = 0x1, + HFI_MODE_POWER_SAVE = 0x2, }; #define HFI_PROP_QUALITY_MODE 0x03000148 enum hfi_seq_header_mode { - HFI_SEQ_HEADER_SEPERATE_FRAME = 0x00000001, - HFI_SEQ_HEADER_JOINED_WITH_1ST_FRAME = 0x00000002, - HFI_SEQ_HEADER_PREFIX_WITH_SYNC_FRAME = 0x00000004, - HFI_SEQ_HEADER_METADATA = 0x00000008, + HFI_SEQ_HEADER_SEPERATE_FRAME = 0x00000001, + HFI_SEQ_HEADER_JOINED_WITH_1ST_FRAME = 0x00000002, + HFI_SEQ_HEADER_PREFIX_WITH_SYNC_FRAME = 0x00000004, + HFI_SEQ_HEADER_METADATA = 0x00000008, }; #define HFI_PROP_SEQ_HEADER_MODE 0x03000149 @@ -394,18 +394,18 @@ enum hfi_seq_header_mode { #define HFI_PROP_METADATA_SEQ_HEADER_NAL 0x0300014a enum hfi_rotation { - HFI_ROTATION_NONE = 0x00000000, - HFI_ROTATION_90 = 0x00000001, - HFI_ROTATION_180 = 0x00000002, - HFI_ROTATION_270 = 0x00000003, + HFI_ROTATION_NONE = 0x00000000, + HFI_ROTATION_90 = 0x00000001, + HFI_ROTATION_180 = 0x00000002, + HFI_ROTATION_270 = 0x00000003, }; #define HFI_PROP_ROTATION 0x0300014b enum hfi_flip { - HFI_DISABLE_FLIP = 0x00000000, - HFI_HORIZONTAL_FLIP = 0x00000001, - HFI_VERTICAL_FLIP = 0x00000002, + HFI_DISABLE_FLIP = 0x00000000, + HFI_HORIZONTAL_FLIP = 0x00000001, + HFI_VERTICAL_FLIP = 0x00000002, }; #define HFI_PROP_FLIP 0x0300014c @@ -413,9 +413,9 @@ enum hfi_flip { #define HFI_PROP_SCALAR 0x0300014d enum hfi_blur_types { - HFI_BLUR_NONE = 0x00000000, - HFI_BLUR_EXTERNAL = 0x00000001, - HFI_BLUR_ADAPTIVE = 0x00000002, + HFI_BLUR_NONE = 0x00000000, + HFI_BLUR_EXTERNAL = 0x00000001, + HFI_BLUR_ADAPTIVE = 0x00000002, }; #define HFI_PROP_BLUR_TYPES 0x0300014e @@ -443,13 +443,13 @@ enum hfi_blur_types { #define HFI_PROP_SIGNAL_COLOR_INFO 0x03000155 enum hfi_interlace_info { - HFI_INTERLACE_INFO_NONE = 0x00000000, - HFI_FRAME_PROGRESSIVE = 0x00000001, - HFI_FRAME_MBAFF = 0x00000002, - HFI_FRAME_INTERLEAVE_TOPFIELD_FIRST = 0x00000004, - HFI_FRAME_INTERLEAVE_BOTTOMFIELD_FIRST = 0x00000008, - HFI_FRAME_INTERLACE_TOPFIELD_FIRST = 0x00000010, - HFI_FRAME_INTERLACE_BOTTOMFIELD_FIRST = 0x00000020, + HFI_INTERLACE_INFO_NONE = 0x00000000, + HFI_FRAME_PROGRESSIVE = 0x00000001, + HFI_FRAME_MBAFF = 0x00000002, + HFI_FRAME_INTERLEAVE_TOPFIELD_FIRST = 0x00000004, + HFI_FRAME_INTERLEAVE_BOTTOMFIELD_FIRST = 0x00000008, + HFI_FRAME_INTERLACE_TOPFIELD_FIRST = 0x00000010, + HFI_FRAME_INTERLACE_BOTTOMFIELD_FIRST = 0x00000020, }; #define HFI_PROP_INTERLACE_INFO 0x03000156 @@ -479,13 +479,13 @@ enum hfi_interlace_info { #define HFI_PROP_HISTOGRAM_INFO 0x03000161 enum hfi_picture_type { - HFI_PICTURE_IDR = 0x00000001, - HFI_PICTURE_P = 0x00000002, - HFI_PICTURE_B = 0x00000004, - HFI_PICTURE_I = 0x00000008, - HFI_PICTURE_CRA = 0x00000010, - HFI_PICTURE_BLA = 0x00000020, - HFI_PICTURE_NOSHOW = 0x00000040, + HFI_PICTURE_IDR = 0x00000001, + HFI_PICTURE_P = 0x00000002, + HFI_PICTURE_B = 0x00000004, + HFI_PICTURE_I = 0x00000008, + HFI_PICTURE_CRA = 0x00000010, + HFI_PICTURE_BLA = 0x00000020, + HFI_PICTURE_NOSHOW = 0x00000040, }; #define HFI_PROP_PICTURE_TYPE 0x03000162 @@ -541,8 +541,8 @@ enum hfi_picture_type { #define HFI_PROP_DPB_LIST 0x0300017A enum hfi_nal_length_field_type { - HFI_NAL_LENGTH_STARTCODES = 0, - HFI_NAL_LENGTH_SIZE_4 = 4, + HFI_NAL_LENGTH_STARTCODES = 0, + HFI_NAL_LENGTH_SIZE_4 = 4, }; #define HFI_PROP_NAL_LENGTH_FIELD 0x0300017B @@ -570,8 +570,8 @@ enum hfi_nal_length_field_type { #define HFI_PROP_AV1_DRAP_CONFIG 0x03000189 enum hfi_saliency_type { - HFI_SALIENCY_NONE, - HFI_SALIENCY_TYPE0, + HFI_SALIENCY_NONE, + HFI_SALIENCY_TYPE0, }; #define HFI_PROP_ROI_AS_SALIENCY_INFO 0x0300018A @@ -598,15 +598,15 @@ enum hfi_saliency_type { /* u32 */ enum hfi_fence_type { - HFI_SW_FENCE = 0x00000001, - HFI_SYNX_V2_FENCE = 0x00000002, + HFI_SW_FENCE = 0x00000001, + HFI_SYNX_V2_FENCE = 0x00000002, }; #define HFI_PROP_FENCE_TYPE 0x0300019D enum hfi_fence_direction_type { - HFI_FENCE_TX_ENABLE = 0x00000001, - HFI_FENCE_RX_ENABLE = 0x00000002, + HFI_FENCE_TX_ENABLE = 0x00000001, + HFI_FENCE_RX_ENABLE = 0x00000002, }; #define HFI_PROP_FENCE_DIRECTION 0x0300019E diff --git a/driver/vidc/inc/msm_media_info.h b/driver/vidc/inc/msm_media_info.h index 994d540aca..95cb05fd1b 100644 --- a/driver/vidc/inc/msm_media_info.h +++ b/driver/vidc/inc/msm_media_info.h @@ -12,7 +12,7 @@ /* Width and Height should be multiple of 16 */ #define INTERLACE_WIDTH_MAX 1920 #define INTERLACE_HEIGHT_MAX 1920 -#define INTERLACE_MB_PER_FRAME_MAX ((1920*1088)/256) +#define INTERLACE_MB_PER_FRAME_MAX ((1920 * 1088) / 256) #ifndef MSM_MEDIA_ALIGN #define MSM_MEDIA_ALIGN(__sz, __align) (((__align) & ((__align) - 1)) ?\ @@ -32,7 +32,7 @@ * Interlaced: width */ static inline unsigned int video_y_stride_bytes(unsigned int colorformat, - unsigned int width) + unsigned int width) { unsigned int alignment, stride = 0; @@ -49,7 +49,7 @@ static inline unsigned int video_y_stride_bytes(unsigned int colorformat, case MSM_VIDC_FMT_TP10C: alignment = 256; stride = MSM_MEDIA_ALIGN(width, 192); - stride = MSM_MEDIA_ALIGN(stride * 4/3, alignment); + stride = MSM_MEDIA_ALIGN(stride * 4 / 3, alignment); break; case MSM_VIDC_FMT_P010: alignment = 256; @@ -70,7 +70,7 @@ invalid_input: * Interlaced: width */ static inline unsigned int video_y_stride_pix(unsigned int colorformat, - unsigned int width) + unsigned int width) { unsigned int alignment, stride = 0; @@ -105,7 +105,7 @@ invalid_input: * Interlaced: width */ static inline unsigned int video_uv_stride_bytes(unsigned int colorformat, - unsigned int width) + unsigned int width) { unsigned int alignment, stride = 0; @@ -122,7 +122,7 @@ static inline unsigned int video_uv_stride_bytes(unsigned int colorformat, case MSM_VIDC_FMT_TP10C: alignment = 256; stride = MSM_MEDIA_ALIGN(width, 192); - stride = MSM_MEDIA_ALIGN(stride * 4/3, alignment); + stride = MSM_MEDIA_ALIGN(stride * 4 / 3, alignment); break; case MSM_VIDC_FMT_P010: alignment = 256; @@ -143,7 +143,7 @@ invalid_input: * Interlaced: width */ static inline unsigned int video_uv_stride_pix(unsigned int colorformat, - unsigned int width) + unsigned int width) { unsigned int alignment, stride = 0; @@ -177,7 +177,7 @@ invalid_input: * Interlaced: (height+1)>>1 */ static inline unsigned int video_y_scanlines(unsigned int colorformat, - unsigned int height) + unsigned int height) { unsigned int alignment, sclines = 0; @@ -210,7 +210,7 @@ invalid_input: * Interlaced: (height+1)>>1 */ static inline unsigned int video_uv_scanlines(unsigned int colorformat, - unsigned int height) + unsigned int height) { unsigned int alignment, sclines = 0; @@ -231,7 +231,7 @@ static inline unsigned int video_uv_scanlines(unsigned int colorformat, goto invalid_input; } - sclines = MSM_MEDIA_ALIGN((height+1)>>1, alignment); + sclines = MSM_MEDIA_ALIGN((height + 1) >> 1, alignment); invalid_input: return sclines; @@ -245,7 +245,7 @@ invalid_input: * Interlaced: width */ static inline unsigned int video_y_meta_stride(unsigned int colorformat, - unsigned int width) + unsigned int width) { int y_tile_width = 0, y_meta_stride = 0; @@ -278,7 +278,7 @@ invalid_input: * Interlaced: (height+1)>>1 */ static inline unsigned int video_y_meta_scanlines(unsigned int colorformat, - unsigned int height) + unsigned int height) { int y_tile_height = 0, y_meta_scanlines = 0; @@ -311,7 +311,7 @@ invalid_input: * Interlaced: width */ static inline unsigned int video_uv_meta_stride(unsigned int colorformat, - unsigned int width) + unsigned int width) { int uv_tile_width = 0, uv_meta_stride = 0; @@ -329,7 +329,7 @@ static inline unsigned int video_uv_meta_stride(unsigned int colorformat, goto invalid_input; } - uv_meta_stride = MSM_MEDIA_ROUNDUP((width+1)>>1, uv_tile_width); + uv_meta_stride = MSM_MEDIA_ROUNDUP((width + 1) >> 1, uv_tile_width); uv_meta_stride = MSM_MEDIA_ALIGN(uv_meta_stride, 64); invalid_input: @@ -343,8 +343,8 @@ invalid_input: * Progressive: height * Interlaced: (height+1)>>1 */ -static inline unsigned int video_uv_meta_scanlines( - unsigned int colorformat, unsigned int height) +static inline unsigned int video_uv_meta_scanlines(unsigned int colorformat, + unsigned int height) { int uv_tile_height = 0, uv_meta_scanlines = 0; @@ -362,15 +362,15 @@ static inline unsigned int video_uv_meta_scanlines( goto invalid_input; } - uv_meta_scanlines = MSM_MEDIA_ROUNDUP((height+1)>>1, uv_tile_height); + uv_meta_scanlines = MSM_MEDIA_ROUNDUP((height + 1) >> 1, uv_tile_height); uv_meta_scanlines = MSM_MEDIA_ALIGN(uv_meta_scanlines, 16); invalid_input: return uv_meta_scanlines; } -static inline unsigned int video_rgb_stride_bytes( - unsigned int colorformat, unsigned int width) +static inline unsigned int video_rgb_stride_bytes(unsigned int colorformat, + unsigned int width) { unsigned int alignment = 0, stride = 0, bpp = 4; @@ -393,7 +393,7 @@ invalid_input: } static inline unsigned int video_rgb_stride_pix(unsigned int colorformat, - unsigned int width) + unsigned int width) { unsigned int bpp = 4; @@ -401,7 +401,7 @@ static inline unsigned int video_rgb_stride_pix(unsigned int colorformat, } static inline unsigned int video_rgb_scanlines(unsigned int colorformat, - unsigned int height) + unsigned int height) { unsigned int alignment = 0, scanlines = 0; @@ -425,8 +425,8 @@ invalid_input: return scanlines; } -static inline unsigned int video_rgb_meta_stride( - unsigned int colorformat, unsigned int width) +static inline unsigned int video_rgb_meta_stride(unsigned int colorformat, + unsigned int width) { int rgb_tile_width = 0, rgb_meta_stride = 0; @@ -449,8 +449,8 @@ invalid_input: return rgb_meta_stride; } -static inline unsigned int video_rgb_meta_scanlines( - unsigned int colorformat, unsigned int height) +static inline unsigned int video_rgb_meta_scanlines(unsigned int colorformat, + unsigned int height) { int rgb_tile_height = 0, rgb_meta_scanlines = 0; @@ -474,7 +474,9 @@ invalid_input: } static inline unsigned int video_buffer_size(unsigned int colorformat, - unsigned int pix_width, unsigned int pix_height, unsigned int interlace) + unsigned int pix_width, + unsigned int pix_height, + unsigned int interlace) { unsigned int size = 0; unsigned int y_plane, uv_plane, y_stride, @@ -513,12 +515,13 @@ static inline unsigned int video_buffer_size(unsigned int colorformat, uv_ubwc_plane = MSM_MEDIA_ALIGN(uv_stride * uv_sclines, 4096); y_meta_scanlines = video_y_meta_scanlines(colorformat, pix_height); - y_meta_plane = MSM_MEDIA_ALIGN( - y_meta_stride * y_meta_scanlines, 4096); + y_meta_plane = MSM_MEDIA_ALIGN(y_meta_stride * + y_meta_scanlines, 4096); uv_meta_scanlines = video_uv_meta_scanlines(colorformat, pix_height); uv_meta_plane = MSM_MEDIA_ALIGN(uv_meta_stride * - uv_meta_scanlines, 4096); + uv_meta_scanlines, + 4096); size = (y_ubwc_plane + uv_ubwc_plane + y_meta_plane + uv_meta_plane); } else { @@ -526,21 +529,23 @@ static inline unsigned int video_buffer_size(unsigned int colorformat, pix_height <= INTERLACE_HEIGHT_MAX && (pix_height * pix_width) / 256 <= INTERLACE_MB_PER_FRAME_MAX) { y_sclines = - video_y_scanlines(colorformat, (pix_height+1)>>1); + video_y_scanlines(colorformat, (pix_height + 1) >> 1); y_ubwc_plane = MSM_MEDIA_ALIGN(y_stride * y_sclines, 4096); uv_sclines = - video_uv_scanlines(colorformat, (pix_height+1)>>1); + video_uv_scanlines(colorformat, (pix_height + 1) >> 1); uv_ubwc_plane = MSM_MEDIA_ALIGN(uv_stride * uv_sclines, 4096); y_meta_scanlines = - video_y_meta_scanlines(colorformat, (pix_height+1)>>1); - y_meta_plane = MSM_MEDIA_ALIGN( - y_meta_stride * y_meta_scanlines, 4096); + video_y_meta_scanlines(colorformat, (pix_height + 1) >> 1); + y_meta_plane = MSM_MEDIA_ALIGN(y_meta_stride * + y_meta_scanlines, + 4096); uv_meta_scanlines = - video_uv_meta_scanlines(colorformat, (pix_height+1)>>1); + video_uv_meta_scanlines(colorformat, (pix_height + 1) >> 1); uv_meta_plane = MSM_MEDIA_ALIGN(uv_meta_stride * - uv_meta_scanlines, 4096); + uv_meta_scanlines, + 4096); size = (y_ubwc_plane + uv_ubwc_plane + y_meta_plane + uv_meta_plane)*2; } else { @@ -552,12 +557,14 @@ static inline unsigned int video_buffer_size(unsigned int colorformat, MSM_MEDIA_ALIGN(uv_stride * uv_sclines, 4096); y_meta_scanlines = video_y_meta_scanlines(colorformat, pix_height); - y_meta_plane = MSM_MEDIA_ALIGN( - y_meta_stride * y_meta_scanlines, 4096); + y_meta_plane = MSM_MEDIA_ALIGN(y_meta_stride * + y_meta_scanlines, + 4096); uv_meta_scanlines = video_uv_meta_scanlines(colorformat, pix_height); uv_meta_plane = MSM_MEDIA_ALIGN(uv_meta_stride * - uv_meta_scanlines, 4096); + uv_meta_scanlines, + 4096); size = (y_ubwc_plane + uv_ubwc_plane + y_meta_plane + uv_meta_plane); } @@ -568,24 +575,25 @@ static inline unsigned int video_buffer_size(unsigned int colorformat, uv_ubwc_plane = MSM_MEDIA_ALIGN(uv_stride * uv_sclines, 4096); y_meta_stride = video_y_meta_stride(colorformat, pix_width); y_meta_scanlines = video_y_meta_scanlines(colorformat, pix_height); - y_meta_plane = MSM_MEDIA_ALIGN( - y_meta_stride * y_meta_scanlines, 4096); + y_meta_plane = MSM_MEDIA_ALIGN(y_meta_stride * + y_meta_scanlines, 4096); uv_meta_stride = video_uv_meta_stride(colorformat, pix_width); uv_meta_scanlines = video_uv_meta_scanlines(colorformat, pix_height); uv_meta_plane = MSM_MEDIA_ALIGN(uv_meta_stride * - uv_meta_scanlines, 4096); + uv_meta_scanlines, + 4096); size = y_ubwc_plane + uv_ubwc_plane + y_meta_plane + uv_meta_plane; break; case MSM_VIDC_FMT_RGBA8888C: rgb_ubwc_plane = MSM_MEDIA_ALIGN(rgb_stride * rgb_scanlines, - 4096); + 4096); rgb_meta_stride = video_rgb_meta_stride(colorformat, pix_width); rgb_meta_scanlines = video_rgb_meta_scanlines(colorformat, - pix_height); + pix_height); rgb_meta_plane = MSM_MEDIA_ALIGN(rgb_meta_stride * - rgb_meta_scanlines, 4096); + rgb_meta_scanlines, 4096); size = rgb_ubwc_plane + rgb_meta_plane; break; case MSM_VIDC_FMT_RGBA8888: diff --git a/driver/vidc/inc/msm_vdec.h b/driver/vidc/inc/msm_vdec.h index 733074e656..107d9d574f 100644 --- a/driver/vidc/inc/msm_vdec.h +++ b/driver/vidc/inc/msm_vdec.h @@ -21,7 +21,7 @@ int msm_vdec_g_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f); int msm_vdec_s_selection(struct msm_vidc_inst *inst, struct v4l2_selection *s); int msm_vdec_g_selection(struct msm_vidc_inst *inst, struct v4l2_selection *s); int msm_vdec_subscribe_event(struct msm_vidc_inst *inst, - const struct v4l2_event_subscription *sub); + const struct v4l2_event_subscription *sub); int msm_vdec_enum_fmt(struct msm_vidc_inst *inst, struct v4l2_fmtdesc *f); int msm_vdec_inst_init(struct msm_vidc_inst *inst); int msm_vdec_inst_deinit(struct msm_vidc_inst *inst); @@ -31,10 +31,10 @@ int msm_vdec_output_port_settings_change(struct msm_vidc_inst *inst); int msm_vdec_stop_cmd(struct msm_vidc_inst *inst); int msm_vdec_start_cmd(struct msm_vidc_inst *inst); int msm_vdec_handle_release_buffer(struct msm_vidc_inst *inst, - struct msm_vidc_buffer *buf); + struct msm_vidc_buffer *buf); int msm_vdec_set_num_comv(struct msm_vidc_inst *inst); int msm_vdec_subscribe_metadata(struct msm_vidc_inst *inst, - enum msm_vidc_port_type port); + enum msm_vidc_port_type port); int msm_vdec_get_input_internal_buffers(struct msm_vidc_inst *inst); int msm_vdec_create_input_internal_buffers(struct msm_vidc_inst *inst); int msm_vdec_queue_input_internal_buffers(struct msm_vidc_inst *inst); diff --git a/driver/vidc/inc/msm_venc.h b/driver/vidc/inc/msm_venc.h index 34bfe1dcfb..397834a06c 100644 --- a/driver/vidc/inc/msm_venc.h +++ b/driver/vidc/inc/msm_venc.h @@ -24,11 +24,11 @@ int msm_venc_g_fmt(struct msm_vidc_inst *inst, struct v4l2_format *f); int msm_venc_s_selection(struct msm_vidc_inst *inst, struct v4l2_selection *s); int msm_venc_g_selection(struct msm_vidc_inst *inst, struct v4l2_selection *s); int msm_venc_s_param(struct msm_vidc_inst *inst, - struct v4l2_streamparm *s_parm); + struct v4l2_streamparm *s_parm); int msm_venc_g_param(struct msm_vidc_inst *inst, - struct v4l2_streamparm *s_parm); + struct v4l2_streamparm *s_parm); int msm_venc_subscribe_event(struct msm_vidc_inst *inst, - const struct v4l2_event_subscription *sub); + const struct v4l2_event_subscription *sub); int msm_venc_enum_fmt(struct msm_vidc_inst *inst, struct v4l2_fmtdesc *f); int msm_venc_inst_init(struct msm_vidc_inst *inst); int msm_venc_inst_deinit(struct msm_vidc_inst *inst); diff --git a/driver/vidc/inc/msm_vidc.h b/driver/vidc/inc/msm_vidc.h index 0ffb044f97..c89b04e243 100644 --- a/driver/vidc/inc/msm_vidc.h +++ b/driver/vidc/inc/msm_vidc.h @@ -30,11 +30,11 @@ int msm_vidc_reqbufs(struct msm_vidc_inst *inst, struct v4l2_requestbuffers *b); int msm_vidc_querybuf(struct msm_vidc_inst *inst, struct v4l2_buffer *b); int msm_vidc_create_bufs(struct msm_vidc_inst *inst, struct v4l2_create_buffers *b); int msm_vidc_prepare_buf(struct msm_vidc_inst *inst, struct media_device *mdev, - struct v4l2_buffer *b); + struct v4l2_buffer *b); int msm_vidc_release_buffer(struct msm_vidc_inst *inst, int buffer_type, - unsigned int buffer_index); + unsigned int buffer_index); int msm_vidc_qbuf(struct msm_vidc_inst *inst, struct media_device *mdev, - struct v4l2_buffer *b); + struct v4l2_buffer *b); int msm_vidc_dqbuf(struct msm_vidc_inst *inst, struct v4l2_buffer *b); int msm_vidc_streamon(struct msm_vidc_inst *inst, enum v4l2_buf_type i); int msm_vidc_query_ctrl(struct msm_vidc_inst *inst, struct v4l2_queryctrl *ctrl); @@ -44,11 +44,11 @@ int msm_vidc_try_cmd(struct msm_vidc_inst *inst, union msm_v4l2_cmd *cmd); int msm_vidc_start_cmd(struct msm_vidc_inst *inst); int msm_vidc_stop_cmd(struct msm_vidc_inst *inst); int msm_vidc_poll(struct msm_vidc_inst *inst, struct file *filp, - struct poll_table_struct *pt); + struct poll_table_struct *pt); int msm_vidc_subscribe_event(struct msm_vidc_inst *inst, - const struct v4l2_event_subscription *sub); + const struct v4l2_event_subscription *sub); int msm_vidc_unsubscribe_event(struct msm_vidc_inst *inst, - const struct v4l2_event_subscription *sub); + const struct v4l2_event_subscription *sub); int msm_vidc_dqevent(struct msm_vidc_inst *inst, struct v4l2_event *event); int msm_vidc_g_crop(struct msm_vidc_inst *inst, struct v4l2_crop *a); int msm_vidc_enum_framesizes(struct msm_vidc_inst *inst, struct v4l2_frmsizeenum *fsize); diff --git a/driver/vidc/inc/msm_vidc_buffer.h b/driver/vidc/inc/msm_vidc_buffer.h index 4b5974b5bb..7e24547db6 100644 --- a/driver/vidc/inc/msm_vidc_buffer.h +++ b/driver/vidc/inc/msm_vidc_buffer.h @@ -23,7 +23,7 @@ u32 msm_vidc_output_min_count(struct msm_vidc_inst *inst); u32 msm_vidc_input_extra_count(struct msm_vidc_inst *inst); u32 msm_vidc_output_extra_count(struct msm_vidc_inst *inst); u32 msm_vidc_internal_buffer_count(struct msm_vidc_inst *inst, - enum msm_vidc_buffer_type buffer_type); + enum msm_vidc_buffer_type buffer_type); u32 msm_vidc_decoder_input_size(struct msm_vidc_inst *inst); u32 msm_vidc_decoder_output_size(struct msm_vidc_inst *inst); u32 msm_vidc_decoder_input_meta_size(struct msm_vidc_inst *inst); @@ -33,6 +33,6 @@ u32 msm_vidc_encoder_output_size(struct msm_vidc_inst *inst); u32 msm_vidc_encoder_input_meta_size(struct msm_vidc_inst *inst); u32 msm_vidc_encoder_output_meta_size(struct msm_vidc_inst *inst); u32 msm_vidc_enc_delivery_mode_based_output_buf_size(struct msm_vidc_inst *inst, - u32 frame_size); + u32 frame_size); #endif // __H_MSM_VIDC_BUFFER_H__ diff --git a/driver/vidc/inc/msm_vidc_control.h b/driver/vidc/inc/msm_vidc_control.h index 28ecbfcd64..8f46a920a1 100644 --- a/driver/vidc/inc/msm_vidc_control.h +++ b/driver/vidc/inc/msm_vidc_control.h @@ -20,7 +20,7 @@ int msm_vidc_adjust_v4l2_properties(struct msm_vidc_inst *inst); int msm_vidc_set_v4l2_properties(struct msm_vidc_inst *inst); bool is_valid_cap_id(enum msm_vidc_inst_capability_type cap_id); bool is_valid_cap(struct msm_vidc_inst *inst, - enum msm_vidc_inst_capability_type cap_id); -enum msm_vidc_inst_capability_type msm_vidc_get_cap_id( - struct msm_vidc_inst *inst, u32 id); + enum msm_vidc_inst_capability_type cap_id); +enum msm_vidc_inst_capability_type + msm_vidc_get_cap_id(struct msm_vidc_inst *inst, u32 id); #endif diff --git a/driver/vidc/inc/msm_vidc_core.h b/driver/vidc/inc/msm_vidc_core.h index 10b2485703..d5345c7e2f 100644 --- a/driver/vidc/inc/msm_vidc_core.h +++ b/driver/vidc/inc/msm_vidc_core.h @@ -20,7 +20,7 @@ struct msm_vidc_core; #define call_venus_op(d, op, ...) \ (((d) && (d)->venus_ops && (d)->venus_ops->op) ? \ - ((d)->venus_ops->op(__VA_ARGS__)):0) + ((d)->venus_ops->op(__VA_ARGS__)) : 0) struct msm_vidc_venus_ops { int (*boot_firmware)(struct msm_vidc_core *core); @@ -76,8 +76,8 @@ struct msm_vidc_core { char fw_version[MAX_NAME_LENGTH]; enum msm_vidc_core_state state; int (*state_handle)(struct msm_vidc_core *core, - enum msm_vidc_core_event_type type, - struct msm_vidc_event_data *data); + enum msm_vidc_core_event_type type, + struct msm_vidc_event_data *data); enum msm_vidc_core_sub_state sub_state; char sub_state_name[MAX_NAME_LENGTH]; struct mutex lock; @@ -88,7 +88,7 @@ struct msm_vidc_core { u32 reg_count; u32 enc_codecs_count; u32 dec_codecs_count; - struct msm_vidc_core_capability capabilities[CORE_CAP_MAX+1]; + struct msm_vidc_core_capability capabilities[CORE_CAP_MAX + 1]; struct msm_vidc_inst_capability *inst_caps; struct msm_vidc_mem_addr sfr; struct msm_vidc_mem_addr iface_q_table; diff --git a/driver/vidc/inc/msm_vidc_debug.h b/driver/vidc/inc/msm_vidc_debug.h index 64605ff8d5..bc108583f1 100644 --- a/driver/vidc/inc/msm_vidc_debug.h +++ b/driver/vidc/inc/msm_vidc_debug.h @@ -187,10 +187,10 @@ enum msm_vidc_bug_on_error { struct dentry *msm_vidc_debugfs_init_drv(void); struct dentry *msm_vidc_debugfs_init_core(struct msm_vidc_core *core); struct dentry *msm_vidc_debugfs_init_inst(struct msm_vidc_inst *inst, - struct dentry *parent); + struct dentry *parent); void msm_vidc_debugfs_deinit_inst(struct msm_vidc_inst *inst); void msm_vidc_debugfs_update(struct msm_vidc_inst *inst, - enum msm_vidc_debugfs_event e); + enum msm_vidc_debugfs_event e); int msm_vidc_check_ratelimit(void); void msm_vidc_show_stats(struct msm_vidc_inst *inst); diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 65a922bc80..50b558a4ad 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -406,47 +406,48 @@ static inline bool is_enc_slice_delivery_mode(struct msm_vidc_inst *inst) const char *cap_name(enum msm_vidc_inst_capability_type cap_id); const char *v4l2_pixelfmt_name(struct msm_vidc_inst *inst, u32 pixelfmt); const char *v4l2_type_name(u32 port); -void print_vidc_buffer(u32 tag, const char *tag_str, const char *str, struct msm_vidc_inst *inst, - struct msm_vidc_buffer *vbuf); +void print_vidc_buffer(u32 tag, const char *tag_str, const char *str, + struct msm_vidc_inst *inst, struct msm_vidc_buffer *vbuf); void print_vb2_buffer(const char *str, struct msm_vidc_inst *inst, - struct vb2_buffer *vb2); + struct vb2_buffer *vb2); enum msm_vidc_codec_type v4l2_codec_to_driver(struct msm_vidc_inst *inst, - u32 v4l2_codec, const char *func); + u32 v4l2_codec, const char *func); u32 v4l2_codec_from_driver(struct msm_vidc_inst *inst, enum msm_vidc_codec_type codec, - const char *func); + const char *func); enum msm_vidc_colorformat_type v4l2_colorformat_to_driver(struct msm_vidc_inst *inst, - u32 colorformat, const char *func); + u32 colorformat, const char *func); u32 v4l2_colorformat_from_driver(struct msm_vidc_inst *inst, - enum msm_vidc_colorformat_type colorformat, const char *func); + enum msm_vidc_colorformat_type colorformat, + const char *func); u32 v4l2_color_primaries_to_driver(struct msm_vidc_inst *inst, - u32 v4l2_primaries, const char *func); + u32 v4l2_primaries, const char *func); u32 v4l2_color_primaries_from_driver(struct msm_vidc_inst *inst, - u32 vidc_color_primaries, const char *func); + u32 vidc_color_primaries, const char *func); u32 v4l2_transfer_char_to_driver(struct msm_vidc_inst *inst, - u32 v4l2_transfer_char, const char *func); + u32 v4l2_transfer_char, const char *func); u32 v4l2_transfer_char_from_driver(struct msm_vidc_inst *inst, - u32 vidc_transfer_char, const char *func); + u32 vidc_transfer_char, const char *func); u32 v4l2_matrix_coeff_to_driver(struct msm_vidc_inst *inst, - u32 v4l2_matrix_coeff, const char *func); + u32 v4l2_matrix_coeff, const char *func); u32 v4l2_matrix_coeff_from_driver(struct msm_vidc_inst *inst, - u32 vidc_matrix_coeff, const char *func); + u32 vidc_matrix_coeff, const char *func); int v4l2_type_to_driver_port(struct msm_vidc_inst *inst, u32 type, - const char *func); + const char *func); const char *allow_name(enum msm_vidc_allow allow); int msm_vidc_create_internal_buffer(struct msm_vidc_inst *inst, - enum msm_vidc_buffer_type buffer_type, u32 index); + enum msm_vidc_buffer_type buffer_type, u32 index); int msm_vidc_get_internal_buffers(struct msm_vidc_inst *inst, - enum msm_vidc_buffer_type buffer_type); + enum msm_vidc_buffer_type buffer_type); int msm_vidc_create_internal_buffers(struct msm_vidc_inst *inst, - enum msm_vidc_buffer_type buffer_type); + enum msm_vidc_buffer_type buffer_type); int msm_vidc_queue_internal_buffers(struct msm_vidc_inst *inst, - enum msm_vidc_buffer_type buffer_type); + enum msm_vidc_buffer_type buffer_type); int msm_vidc_alloc_and_queue_session_internal_buffers(struct msm_vidc_inst *inst, - enum msm_vidc_buffer_type buffer_type); + enum msm_vidc_buffer_type buffer_type); int msm_vidc_release_internal_buffers(struct msm_vidc_inst *inst, - enum msm_vidc_buffer_type buffer_type); + enum msm_vidc_buffer_type buffer_type); int msm_vidc_vb2_buffer_done(struct msm_vidc_inst *inst, - struct msm_vidc_buffer *buf); + struct msm_vidc_buffer *buf); int msm_vidc_remove_dangling_session(struct msm_vidc_inst *inst); int msm_vidc_remove_session(struct msm_vidc_inst *inst); int msm_vidc_add_session(struct msm_vidc_inst *inst); @@ -455,15 +456,17 @@ int msm_vidc_session_set_codec(struct msm_vidc_inst *inst); int msm_vidc_session_set_secure_mode(struct msm_vidc_inst *inst); int msm_vidc_session_set_default_header(struct msm_vidc_inst *inst); int msm_vidc_session_streamoff(struct msm_vidc_inst *inst, - enum msm_vidc_port_type port); + enum msm_vidc_port_type port); int msm_vidc_session_close(struct msm_vidc_inst *inst); int msm_vidc_kill_session(struct msm_vidc_inst *inst); int msm_vidc_get_inst_capability(struct msm_vidc_inst *inst); int msm_vidc_change_core_state(struct msm_vidc_core *core, - enum msm_vidc_core_state request_state, const char *func); + enum msm_vidc_core_state request_state, + const char *func); int msm_vidc_change_core_sub_state(struct msm_vidc_core *core, - enum msm_vidc_core_sub_state clear_sub_states, - enum msm_vidc_core_sub_state set_sub_states, const char *func); + enum msm_vidc_core_sub_state clear_sub_states, + enum msm_vidc_core_sub_state set_sub_states, + const char *func); int msm_vidc_core_init(struct msm_vidc_core *core); int msm_vidc_core_init_wait(struct msm_vidc_core *core); int msm_vidc_core_deinit(struct msm_vidc_core *core, bool force); @@ -475,12 +478,13 @@ int msm_vidc_print_buffer_info(struct msm_vidc_inst *inst); int msm_vidc_print_inst_info(struct msm_vidc_inst *inst); void msm_vidc_print_core_info(struct msm_vidc_core *core); int msm_vidc_smmu_fault_handler(struct iommu_domain *domain, - struct device *dev, unsigned long iova, int flags, void *data); + struct device *dev, unsigned long iova, + int flags, void *data); int msm_vidc_trigger_ssr(struct msm_vidc_core *core, - u64 trigger_ssr_val); + u64 trigger_ssr_val); void msm_vidc_ssr_handler(struct work_struct *work); int msm_vidc_trigger_stability(struct msm_vidc_core *core, - u64 trigger_stability_val); + u64 trigger_stability_val); void msm_vidc_stability_handler(struct work_struct *work); int cancel_stability_work_sync(struct msm_vidc_inst *inst); void msm_vidc_fw_unload_handler(struct work_struct *work); @@ -492,48 +496,49 @@ int msm_vidc_vb2_queue_init(struct msm_vidc_inst *inst); int msm_vidc_vb2_queue_deinit(struct msm_vidc_inst *inst); int msm_vidc_get_control(struct msm_vidc_inst *inst, struct v4l2_ctrl *ctrl); struct msm_vidc_buffers *msm_vidc_get_buffers(struct msm_vidc_inst *inst, - enum msm_vidc_buffer_type buffer_type, const char *func); -struct msm_vidc_mem_list *msm_vidc_get_mem_info( - struct msm_vidc_inst *inst, enum msm_vidc_buffer_type buffer_type, - const char *func); + enum msm_vidc_buffer_type buffer_type, + const char *func); +struct msm_vidc_mem_list *msm_vidc_get_mem_info(struct msm_vidc_inst *inst, + enum msm_vidc_buffer_type buffer_type, + const char *func); struct msm_vidc_buffer *msm_vidc_get_driver_buf(struct msm_vidc_inst *inst, - struct vb2_buffer *vb2); + struct vb2_buffer *vb2); int msm_vidc_allocate_buffers(struct msm_vidc_inst *inst, - enum msm_vidc_buffer_type buf_type, u32 num_buffers); + enum msm_vidc_buffer_type buf_type, u32 num_buffers); int msm_vidc_free_buffers(struct msm_vidc_inst *inst, - enum msm_vidc_buffer_type buf_type); + enum msm_vidc_buffer_type buf_type); void msm_vidc_update_stats(struct msm_vidc_inst *inst, - struct msm_vidc_buffer *buf, enum msm_vidc_debugfs_event etype); + struct msm_vidc_buffer *buf, + enum msm_vidc_debugfs_event etype); void msm_vidc_stats_handler(struct work_struct *work); int schedule_stats_work(struct msm_vidc_inst *inst); int cancel_stats_work_sync(struct msm_vidc_inst *inst); void msm_vidc_print_stats(struct msm_vidc_inst *inst); void msm_vidc_print_memory_stats(struct msm_vidc_inst *inst); -enum msm_vidc_buffer_type v4l2_type_to_driver(u32 type, - const char *func); +enum msm_vidc_buffer_type v4l2_type_to_driver(u32 type, const char *func); int msm_vidc_buf_queue(struct msm_vidc_inst *inst, struct msm_vidc_buffer *buf); int msm_vidc_queue_buffer_single(struct msm_vidc_inst *inst, - struct vb2_buffer *vb2); + struct vb2_buffer *vb2); int msm_vidc_queue_deferred_buffers(struct msm_vidc_inst *inst, - enum msm_vidc_buffer_type buf_type); + enum msm_vidc_buffer_type buf_type); int msm_vidc_destroy_internal_buffer(struct msm_vidc_inst *inst, - struct msm_vidc_buffer *buffer); + struct msm_vidc_buffer *buffer); void msm_vidc_destroy_buffers(struct msm_vidc_inst *inst); int msm_vidc_flush_buffers(struct msm_vidc_inst *inst, - enum msm_vidc_buffer_type type); + enum msm_vidc_buffer_type type); int msm_vidc_flush_read_only_buffers(struct msm_vidc_inst *inst, - enum msm_vidc_buffer_type type); + enum msm_vidc_buffer_type type); struct msm_vidc_buffer *get_meta_buffer(struct msm_vidc_inst *inst, - struct msm_vidc_buffer *vbuf); + struct msm_vidc_buffer *vbuf); struct msm_vidc_inst *get_inst_ref(struct msm_vidc_core *core, - struct msm_vidc_inst *instance); + struct msm_vidc_inst *instance); struct msm_vidc_inst *get_inst(struct msm_vidc_core *core, - u32 session_id); + u32 session_id); void put_inst(struct msm_vidc_inst *inst); bool msm_vidc_allow_metadata_delivery(struct msm_vidc_inst *inst, - u32 cap_id, u32 port); + u32 cap_id, u32 port); bool msm_vidc_allow_metadata_subscription(struct msm_vidc_inst *inst, - u32 cap_id, u32 port); + u32 cap_id, u32 port); bool msm_vidc_allow_property(struct msm_vidc_inst *inst, u32 hfi_id); enum msm_vidc_allow msm_vidc_allow_input_psc(struct msm_vidc_inst *inst); bool msm_vidc_allow_drain_last_flag(struct msm_vidc_inst *inst); @@ -549,7 +554,7 @@ int msm_vidc_process_resume(struct msm_vidc_inst *inst); int msm_vidc_process_streamon_input(struct msm_vidc_inst *inst); int msm_vidc_process_streamon_output(struct msm_vidc_inst *inst); int msm_vidc_process_stop_done(struct msm_vidc_inst *inst, - enum signal_session_response signal_type); + enum signal_session_response signal_type); int msm_vidc_process_drain_done(struct msm_vidc_inst *inst); int msm_vidc_process_drain_last_flag(struct msm_vidc_inst *inst); int msm_vidc_process_psc_last_flag(struct msm_vidc_inst *inst); @@ -557,7 +562,8 @@ int msm_vidc_get_mbs_per_frame(struct msm_vidc_inst *inst); u32 msm_vidc_get_max_bitrate(struct msm_vidc_inst *inst); int msm_vidc_get_fps(struct msm_vidc_inst *inst); int msm_vidc_num_buffers(struct msm_vidc_inst *inst, - enum msm_vidc_buffer_type type, enum msm_vidc_buffer_attributes attr); + enum msm_vidc_buffer_type type, + enum msm_vidc_buffer_attributes attr); void core_lock(struct msm_vidc_core *core, const char *function); void core_unlock(struct msm_vidc_core *core, const char *function); void inst_lock(struct msm_vidc_inst *inst, const char *function); @@ -589,22 +595,22 @@ int msm_vidc_ts_reorder_get_first_timestamp(struct msm_vidc_inst *inst, u64 *tim int msm_vidc_ts_reorder_flush(struct msm_vidc_inst *inst); const char *buf_name(enum msm_vidc_buffer_type type); bool res_is_greater_than(u32 width, u32 height, - u32 ref_width, u32 ref_height); + u32 ref_width, u32 ref_height); bool res_is_greater_than_or_equal_to(u32 width, u32 height, - u32 ref_width, u32 ref_height); + u32 ref_width, u32 ref_height); bool res_is_less_than(u32 width, u32 height, - u32 ref_width, u32 ref_height); + u32 ref_width, u32 ref_height); bool res_is_less_than_or_equal_to(u32 width, u32 height, - u32 ref_width, u32 ref_height); + u32 ref_width, u32 ref_height); bool is_hevc_10bit_decode_session(struct msm_vidc_inst *inst); int signal_session_msg_receipt(struct msm_vidc_inst *inst, - enum signal_session_response cmd); + enum signal_session_response cmd); int msm_vidc_get_properties(struct msm_vidc_inst *inst); int msm_vidc_update_input_rate(struct msm_vidc_inst *inst, u64 time_us); int msm_vidc_add_buffer_stats(struct msm_vidc_inst *inst, - struct msm_vidc_buffer *buf, u64 timestamp); + struct msm_vidc_buffer *buf, u64 timestamp); int msm_vidc_remove_buffer_stats(struct msm_vidc_inst *inst, - struct msm_vidc_buffer *buf, u64 timestamp); + struct msm_vidc_buffer *buf, u64 timestamp); int msm_vidc_flush_buffer_stats(struct msm_vidc_inst *inst); int msm_vidc_get_input_rate(struct msm_vidc_inst *inst); int msm_vidc_get_frame_rate(struct msm_vidc_inst *inst); @@ -612,11 +618,12 @@ int msm_vidc_get_operating_rate(struct msm_vidc_inst *inst); int msm_vidc_alloc_and_queue_input_internal_buffers(struct msm_vidc_inst *inst); int vb2_buffer_to_driver(struct vb2_buffer *vb2, struct msm_vidc_buffer *buf); struct msm_vidc_buffer *msm_vidc_fetch_buffer(struct msm_vidc_inst *inst, - struct vb2_buffer *vb2); -struct context_bank_info *msm_vidc_get_context_bank_for_region(struct msm_vidc_core *core, - enum msm_vidc_buffer_region region); -struct context_bank_info *msm_vidc_get_context_bank_for_device( - struct msm_vidc_core *core, struct device *dev); + struct vb2_buffer *vb2); +struct context_bank_info + *msm_vidc_get_context_bank_for_region(struct msm_vidc_core *core, + enum msm_vidc_buffer_region region); +struct context_bank_info + *msm_vidc_get_context_bank_for_device(struct msm_vidc_core *core, struct device *dev); #endif // _MSM_VIDC_DRIVER_H_ diff --git a/driver/vidc/inc/msm_vidc_fence.h b/driver/vidc/inc/msm_vidc_fence.h index 6b87d2edb9..9e375695ab 100644 --- a/driver/vidc/inc/msm_vidc_fence.h +++ b/driver/vidc/inc/msm_vidc_fence.h @@ -21,11 +21,11 @@ struct msm_vidc_fence_ops { int (*fence_deregister)(struct msm_vidc_core *core); struct msm_vidc_fence *(*fence_create)(struct msm_vidc_inst *inst); int (*fence_create_fd)(struct msm_vidc_inst *inst, - struct msm_vidc_fence *fence); + struct msm_vidc_fence *fence); void (*fence_destroy)(struct msm_vidc_inst *inst, - u64 fence_id); + u64 fence_id); int (*fence_signal)(struct msm_vidc_inst *inst, - u64 fence_id); + u64 fence_id); void (*fence_recover)(struct msm_vidc_core *core); }; diff --git a/driver/vidc/inc/msm_vidc_inst.h b/driver/vidc/inc/msm_vidc_inst.h index 4fc6e0d4a7..ec303c8d0b 100644 --- a/driver/vidc/inc/msm_vidc_inst.h +++ b/driver/vidc/inc/msm_vidc_inst.h @@ -21,7 +21,7 @@ struct msm_vidc_inst; struct msm_vidc_session_ops { u64 (*calc_freq)(struct msm_vidc_inst *inst, u32 data_size); int (*calc_bw)(struct msm_vidc_inst *inst, - struct vidc_bus_vote_data *vote_data); + struct vidc_bus_vote_data *vote_data); int (*decide_work_route)(struct msm_vidc_inst *inst); int (*decide_work_mode)(struct msm_vidc_inst *inst); int (*decide_quality_mode)(struct msm_vidc_inst *inst); @@ -71,7 +71,8 @@ struct msm_vidc_inst { struct mutex client_lock; enum msm_vidc_state state; int (*event_handle)(struct msm_vidc_inst *inst, - enum msm_vidc_event event, void *data); + enum msm_vidc_event event, + void *data); enum msm_vidc_sub_state sub_state; char sub_state_name[MAX_NAME_LENGTH]; enum msm_vidc_domain_type domain; @@ -127,7 +128,7 @@ struct msm_vidc_inst { struct msm_vidc_debug debug; struct debug_buf_count debug_count; struct msm_vidc_statistics stats; - struct msm_vidc_inst_cap capabilities[INST_CAP_MAX+1]; + struct msm_vidc_inst_cap capabilities[INST_CAP_MAX + 1]; struct completion completions[MAX_SIGNAL]; struct msm_vidc_fence_context fence_context; bool active; diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 9bc7e2d2b4..7db6c5edde 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -156,7 +156,7 @@ enum msm_vidc_metadata_bits { #define VIDC_IFACEQ_MIN_PKT_SIZE 8 #define VIDC_IFACEQ_VAR_SMALL_PKT_SIZE 100 #define VIDC_IFACEQ_VAR_LARGE_PKT_SIZE 512 -#define VIDC_IFACEQ_VAR_HUGE_PKT_SIZE (1024*4) +#define VIDC_IFACEQ_VAR_HUGE_PKT_SIZE (1024 * 4) #define NUM_MBS_PER_SEC(__height, __width, __fps) \ (NUM_MBS_PER_FRAME(__height, __width) * __fps) @@ -672,15 +672,15 @@ struct msm_vidc_inst_cap { enum msm_vidc_inst_capability_flags flags; enum msm_vidc_inst_capability_type children[MAX_CAP_CHILDREN]; int (*adjust)(void *inst, - struct v4l2_ctrl *ctrl); + struct v4l2_ctrl *ctrl); int (*set)(void *inst, - enum msm_vidc_inst_capability_type cap_id); + enum msm_vidc_inst_capability_type cap_id); }; struct msm_vidc_inst_capability { enum msm_vidc_domain_type domain; enum msm_vidc_codec_type codec; - struct msm_vidc_inst_cap cap[INST_CAP_MAX+1]; + struct msm_vidc_inst_cap cap[INST_CAP_MAX + 1]; }; struct msm_vidc_core_capability { @@ -1046,7 +1046,7 @@ struct msm_vidc_stability { }; struct msm_vidc_sfr { - u32 bufSize; + u32 buf_size; u8 rg_data[1]; }; diff --git a/driver/vidc/inc/msm_vidc_memory.h b/driver/vidc/inc/msm_vidc_memory.h index f403a59d87..508d166375 100644 --- a/driver/vidc/inc/msm_vidc_memory.h +++ b/driver/vidc/inc/msm_vidc_memory.h @@ -46,7 +46,7 @@ struct msm_memory_pool { }; void *msm_vidc_pool_alloc(struct msm_vidc_inst *inst, - enum msm_memory_pool_type type); + enum msm_memory_pool_type type); void msm_vidc_pool_free(struct msm_vidc_inst *inst, void *vidc_buf); int msm_vidc_pools_init(struct msm_vidc_inst *inst); void msm_vidc_pools_deinit(struct msm_vidc_inst *inst); @@ -57,33 +57,35 @@ void msm_vidc_pools_deinit(struct msm_vidc_inst *inst); struct msm_vidc_memory_ops { struct dma_buf *(*dma_buf_get)(struct msm_vidc_inst *inst, - int fd); + int fd); void (*dma_buf_put)(struct msm_vidc_inst *inst, - struct dma_buf *dmabuf); + struct dma_buf *dmabuf); void (*dma_buf_put_completely)(struct msm_vidc_inst *inst, - struct msm_memory_dmabuf *buf); + struct msm_memory_dmabuf *buf); struct dma_buf_attachment *(*dma_buf_attach)(struct msm_vidc_core *core, - struct dma_buf *dbuf, struct device *dev); + struct dma_buf *dbuf, struct device *dev); int (*dma_buf_detach)(struct msm_vidc_core *core, struct dma_buf *dbuf, - struct dma_buf_attachment *attach); - struct sg_table *(*dma_buf_map_attachment)(struct msm_vidc_core *core, - struct dma_buf_attachment *attach); + struct dma_buf_attachment *attach); + struct sg_table + *(*dma_buf_map_attachment)(struct msm_vidc_core *core, + struct dma_buf_attachment *attach); int (*dma_buf_unmap_attachment)(struct msm_vidc_core *core, - struct dma_buf_attachment *attach, struct sg_table *table); + struct dma_buf_attachment *attach, + struct sg_table *table); int (*memory_alloc_map)(struct msm_vidc_core *core, - struct msm_vidc_mem *mem); + struct msm_vidc_mem *mem); int (*memory_unmap_free)(struct msm_vidc_core *core, - struct msm_vidc_mem *mem); + struct msm_vidc_mem *mem); int (*mem_dma_map_page)(struct msm_vidc_core *core, - struct msm_vidc_mem *mem); + struct msm_vidc_mem *mem); int (*mem_dma_unmap_page)(struct msm_vidc_core *core, - struct msm_vidc_mem *mem); + struct msm_vidc_mem *mem); u32 (*buffer_region)(struct msm_vidc_inst *inst, - enum msm_vidc_buffer_type buffer_type); + enum msm_vidc_buffer_type buffer_type); int (*iommu_map)(struct msm_vidc_core *core, - struct msm_vidc_mem *mem); + struct msm_vidc_mem *mem); int (*iommu_unmap)(struct msm_vidc_core *core, - struct msm_vidc_mem *mem); + struct msm_vidc_mem *mem); }; const struct msm_vidc_memory_ops *get_mem_ops(void); diff --git a/driver/vidc/inc/msm_vidc_state.h b/driver/vidc/inc/msm_vidc_state.h index 4b60e8a2d9..26bb79f0d4 100644 --- a/driver/vidc/inc/msm_vidc_state.h +++ b/driver/vidc/inc/msm_vidc_state.h @@ -80,14 +80,16 @@ enum msm_vidc_sub_state { enum msm_vidc_event FOREACH_EVENT(GENERATE_MSM_VIDC_ENUM); /* core statemachine functions */ -enum msm_vidc_allow msm_vidc_allow_core_state_change( - struct msm_vidc_core *core, enum msm_vidc_core_state req_state); +enum msm_vidc_allow + msm_vidc_allow_core_state_change(struct msm_vidc_core *core, + enum msm_vidc_core_state req_state); int msm_vidc_update_core_state(struct msm_vidc_core *core, - enum msm_vidc_core_state request_state, const char *func); + enum msm_vidc_core_state request_state, + const char *func); bool core_in_valid_state(struct msm_vidc_core *core); bool is_core_state(struct msm_vidc_core *core, enum msm_vidc_core_state state); bool is_core_sub_state(struct msm_vidc_core *core, - enum msm_vidc_core_sub_state sub_state); + enum msm_vidc_core_sub_state sub_state); const char *core_state_name(enum msm_vidc_core_state state); const char *core_sub_state_name(enum msm_vidc_core_sub_state sub_state); @@ -95,16 +97,19 @@ const char *core_sub_state_name(enum msm_vidc_core_sub_state sub_state); bool is_drc_pending(struct msm_vidc_inst *inst); bool is_drain_pending(struct msm_vidc_inst *inst); int msm_vidc_update_state(struct msm_vidc_inst *inst, - enum msm_vidc_state request_state, const char *func); + enum msm_vidc_state request_state, + const char *func); int msm_vidc_change_state(struct msm_vidc_inst *inst, - enum msm_vidc_state request_state, const char *func); + enum msm_vidc_state request_state, + const char *func); int msm_vidc_change_sub_state(struct msm_vidc_inst *inst, - enum msm_vidc_sub_state clear_sub_state, - enum msm_vidc_sub_state set_sub_state, const char *func); + enum msm_vidc_sub_state clear_sub_state, + enum msm_vidc_sub_state set_sub_state, + const char *func); const char *state_name(enum msm_vidc_state state); const char *sub_state_name(enum msm_vidc_sub_state sub_state); bool is_state(struct msm_vidc_inst *inst, enum msm_vidc_state state); bool is_sub_state(struct msm_vidc_inst *inst, - enum msm_vidc_sub_state sub_state); + enum msm_vidc_sub_state sub_state); #endif // _MSM_VIDC_STATE_H_ diff --git a/driver/vidc/inc/msm_vidc_v4l2.h b/driver/vidc/inc/msm_vidc_v4l2.h index cad47a4734..fb86ed6b7c 100644 --- a/driver/vidc/inc/msm_vidc_v4l2.h +++ b/driver/vidc/inc/msm_vidc_v4l2.h @@ -16,61 +16,61 @@ int msm_v4l2_open(struct file *filp); int msm_v4l2_close(struct file *filp); int msm_v4l2_querycap(struct file *filp, void *fh, - struct v4l2_capability *cap); + struct v4l2_capability *cap); int msm_v4l2_enum_fmt(struct file *file, void *fh, - struct v4l2_fmtdesc *f); + struct v4l2_fmtdesc *f); int msm_v4l2_try_fmt(struct file *file, void *fh, - struct v4l2_format *f); + struct v4l2_format *f); int msm_v4l2_s_fmt(struct file *file, void *fh, - struct v4l2_format *f); + struct v4l2_format *f); int msm_v4l2_g_fmt(struct file *file, void *fh, - struct v4l2_format *f); + struct v4l2_format *f); int msm_v4l2_s_selection(struct file *file, void *fh, - struct v4l2_selection *s); + struct v4l2_selection *s); int msm_v4l2_g_selection(struct file *file, void *fh, - struct v4l2_selection *s); + struct v4l2_selection *s); int msm_v4l2_s_parm(struct file *file, void *fh, - struct v4l2_streamparm *a); + struct v4l2_streamparm *a); int msm_v4l2_g_parm(struct file *file, void *fh, - struct v4l2_streamparm *a); + struct v4l2_streamparm *a); int msm_v4l2_reqbufs(struct file *file, void *fh, - struct v4l2_requestbuffers *b); + struct v4l2_requestbuffers *b); int msm_v4l2_querybuf(struct file *file, void *fh, - struct v4l2_buffer *b); + struct v4l2_buffer *b); int msm_v4l2_create_bufs(struct file *filp, void *fh, - struct v4l2_create_buffers *b); + struct v4l2_create_buffers *b); int msm_v4l2_prepare_buf(struct file *filp, void *fh, - struct v4l2_buffer *b); + struct v4l2_buffer *b); int msm_v4l2_qbuf(struct file *file, void *fh, - struct v4l2_buffer *b); + struct v4l2_buffer *b); int msm_v4l2_dqbuf(struct file *file, void *fh, - struct v4l2_buffer *b); + struct v4l2_buffer *b); int msm_v4l2_streamon(struct file *file, void *fh, - enum v4l2_buf_type i); + enum v4l2_buf_type i); int msm_v4l2_streamoff(struct file *file, void *fh, - enum v4l2_buf_type i); + enum v4l2_buf_type i); int msm_v4l2_subscribe_event(struct v4l2_fh *fh, - const struct v4l2_event_subscription *sub); + const struct v4l2_event_subscription *sub); int msm_v4l2_unsubscribe_event(struct v4l2_fh *fh, - const struct v4l2_event_subscription *sub); + const struct v4l2_event_subscription *sub); int msm_v4l2_try_decoder_cmd(struct file *file, void *fh, - struct v4l2_decoder_cmd *enc); + struct v4l2_decoder_cmd *enc); int msm_v4l2_decoder_cmd(struct file *file, void *fh, - struct v4l2_decoder_cmd *dec); + struct v4l2_decoder_cmd *dec); int msm_v4l2_try_encoder_cmd(struct file *file, void *fh, - struct v4l2_encoder_cmd *enc); + struct v4l2_encoder_cmd *enc); int msm_v4l2_encoder_cmd(struct file *file, void *fh, - struct v4l2_encoder_cmd *enc); + struct v4l2_encoder_cmd *enc); int msm_v4l2_enum_framesizes(struct file *file, void *fh, - struct v4l2_frmsizeenum *fsize); + struct v4l2_frmsizeenum *fsize); int msm_v4l2_enum_frameintervals(struct file *file, void *fh, - struct v4l2_frmivalenum *fival); + struct v4l2_frmivalenum *fival); int msm_v4l2_queryctrl(struct file *file, void *fh, - struct v4l2_queryctrl *ctrl); + struct v4l2_queryctrl *ctrl); int msm_v4l2_querymenu(struct file *file, void *fh, - struct v4l2_querymenu *qmenu); + struct v4l2_querymenu *qmenu); unsigned int msm_v4l2_poll(struct file *filp, - struct poll_table_struct *pt); + struct poll_table_struct *pt); int msm_v4l2_request_validate(struct media_request *req); void msm_v4l2_request_queue(struct media_request *req); void msm_v4l2_m2m_device_run(void *priv); diff --git a/driver/vidc/inc/msm_vidc_vb2.h b/driver/vidc/inc/msm_vidc_vb2.h index 934192ccfd..e162bb1c87 100644 --- a/driver/vidc/inc/msm_vidc_vb2.h +++ b/driver/vidc/inc/msm_vidc_vb2.h @@ -12,20 +12,22 @@ #include "msm_vidc_inst.h" struct vb2_queue *msm_vidc_get_vb2q(struct msm_vidc_inst *inst, - u32 type, const char *func); + u32 type, const char *func); /* vb2_mem_ops */ #if (LINUX_VERSION_CODE < KERNEL_VERSION(5, 15, 0)) void *msm_vb2_alloc(struct device *dev, unsigned long attrs, - unsigned long size, enum dma_data_direction dma_dir, - gfp_t gfp_flags); -void *msm_vb2_attach_dmabuf(struct device *dev, struct dma_buf *dbuf, - unsigned long size, enum dma_data_direction dma_dir); + unsigned long size, enum dma_data_direction dma_dir, + gfp_t gfp_flags); +void *msm_vb2_attach_dmabuf(struct device *dev, + struct dma_buf *dbuf, + unsigned long size, + enum dma_data_direction dma_dir); #else void *msm_vb2_alloc(struct vb2_buffer *vb, struct device *dev, - unsigned long size); + unsigned long size); void *msm_vb2_attach_dmabuf(struct vb2_buffer *vb, struct device *dev, - struct dma_buf *dbuf, unsigned long size); + struct dma_buf *dbuf, unsigned long size); #endif void msm_vb2_put(void *buf_priv); @@ -36,8 +38,10 @@ void msm_vb2_unmap_dmabuf(void *buf_priv); /* vb2_ops */ int msm_vb2_queue_setup(struct vb2_queue *q, - unsigned int *num_buffers, unsigned int *num_planes, - unsigned int sizes[], struct device *alloc_devs[]); + unsigned int *num_buffers, + unsigned int *num_planes, + unsigned int sizes[], + struct device *alloc_devs[]); int msm_vidc_start_streaming(struct msm_vidc_inst *inst, struct vb2_queue *q); int msm_vidc_stop_streaming(struct msm_vidc_inst *inst, struct vb2_queue *q); int msm_vb2_start_streaming(struct vb2_queue *q, unsigned int count); diff --git a/driver/vidc/inc/resources.h b/driver/vidc/inc/resources.h index 1e240362af..e461742f5d 100644 --- a/driver/vidc/inc/resources.h +++ b/driver/vidc/inc/resources.h @@ -258,13 +258,13 @@ struct msm_vidc_resources_ops { int (*reset_bridge)(struct msm_vidc_core *core); int (*reset_control_acquire)(struct msm_vidc_core *core, - const char *name); + const char *name); int (*reset_control_release)(struct msm_vidc_core *core, - const char *name); + const char *name); int (*reset_control_assert)(struct msm_vidc_core *core, - const char *name); + const char *name); int (*reset_control_deassert)(struct msm_vidc_core *core, - const char *name); + const char *name); int (*gdsc_init)(struct msm_vidc_core *core); int (*gdsc_on)(struct msm_vidc_core *core, const char *name); @@ -280,11 +280,12 @@ struct msm_vidc_resources_ops { int (*clk_disable)(struct msm_vidc_core *core, const char *name); int (*clk_enable)(struct msm_vidc_core *core, const char *name); int (*clk_set_flag)(struct msm_vidc_core *core, - const char *name, enum msm_vidc_branch_mem_flags flag); + const char *name, + enum msm_vidc_branch_mem_flags flag); int (*clk_print_residency_stats)(struct msm_vidc_core *core); int (*clk_reset_residency_stats)(struct msm_vidc_core *core); - int (*clk_update_residency_stats)( - struct msm_vidc_core *core, struct clock_info *cl, u64 rate); + int (*clk_update_residency_stats)(struct msm_vidc_core *core, + struct clock_info *cl, u64 rate); }; const struct msm_vidc_resources_ops *get_resources_ops(void); diff --git a/driver/vidc/inc/venus_hfi.h b/driver/vidc/inc/venus_hfi.h index 3c17c8d951..aff97bb913 100644 --- a/driver/vidc/inc/venus_hfi.h +++ b/driver/vidc/inc/venus_hfi.h @@ -16,7 +16,7 @@ #include "msm_vidc_inst.h" #include "msm_vidc_core.h" -#define VIDC_MAX_PC_SKIP_COUNT 10 +#define VIDC_MAX_PC_SKIP_COUNT 10 struct vidc_buffer_addr_info { enum msm_vidc_buffer_type buffer_type; @@ -34,26 +34,30 @@ struct hfi_pending_packet { }; int __strict_check(struct msm_vidc_core *core, - const char *function); + const char *function); int venus_hfi_session_property(struct msm_vidc_inst *inst, - u32 pkt_type, u32 flags, u32 port, - u32 payload_type, void *payload, u32 payload_size); + u32 pkt_type, u32 flags, u32 port, + u32 payload_type, void *payload, + u32 payload_size); int venus_hfi_session_command(struct msm_vidc_inst *inst, - u32 cmd, enum msm_vidc_port_type port, u32 payload_type, - void *payload, u32 payload_size); + u32 cmd, enum msm_vidc_port_type port, + u32 payload_type, + void *payload, u32 payload_size); int venus_hfi_queue_buffer(struct msm_vidc_inst *inst, - struct msm_vidc_buffer *buffer, struct msm_vidc_buffer *metabuf); + struct msm_vidc_buffer *buffer, + struct msm_vidc_buffer *metabuf); int venus_hfi_queue_super_buffer(struct msm_vidc_inst *inst, - struct msm_vidc_buffer *buffer, struct msm_vidc_buffer *metabuf); + struct msm_vidc_buffer *buffer, + struct msm_vidc_buffer *metabuf); int venus_hfi_release_buffer(struct msm_vidc_inst *inst, - struct msm_vidc_buffer *buffer); + struct msm_vidc_buffer *buffer); int venus_hfi_start(struct msm_vidc_inst *inst, enum msm_vidc_port_type port); int venus_hfi_stop(struct msm_vidc_inst *inst, enum msm_vidc_port_type port); int venus_hfi_session_close(struct msm_vidc_inst *inst); int venus_hfi_session_open(struct msm_vidc_inst *inst); int venus_hfi_session_pause(struct msm_vidc_inst *inst, enum msm_vidc_port_type port); int venus_hfi_session_resume(struct msm_vidc_inst *inst, - enum msm_vidc_port_type port, u32 payload); + enum msm_vidc_port_type port, u32 payload); int venus_hfi_session_drain(struct msm_vidc_inst *inst, enum msm_vidc_port_type port); int venus_hfi_session_set_codec(struct msm_vidc_inst *inst); int venus_hfi_session_set_secure_mode(struct msm_vidc_inst *inst); @@ -62,19 +66,20 @@ int venus_hfi_core_deinit(struct msm_vidc_core *core, bool force); int venus_hfi_noc_error_info(struct msm_vidc_core *core); int venus_hfi_suspend(struct msm_vidc_core *core); int venus_hfi_trigger_ssr(struct msm_vidc_core *core, u32 type, - u32 client_id, u32 addr); + u32 client_id, u32 addr); int venus_hfi_trigger_stability(struct msm_vidc_inst *inst, u32 type, - u32 client_id, u32 val); + u32 client_id, u32 val); int venus_hfi_reserve_hardware(struct msm_vidc_inst *inst, u32 duration); int venus_hfi_scale_clocks(struct msm_vidc_inst *inst, u64 freq); int venus_hfi_scale_buses(struct msm_vidc_inst *inst, u64 bw_ddr, u64 bw_llcc); int venus_hfi_set_ir_period(struct msm_vidc_inst *inst, u32 ir_type, - enum msm_vidc_inst_capability_type cap_id); + enum msm_vidc_inst_capability_type cap_id); void venus_hfi_pm_work_handler(struct work_struct *work); irqreturn_t venus_hfi_isr(int irq, void *data); irqreturn_t venus_hfi_isr_handler(int irq, void *data); int __prepare_pc(struct msm_vidc_core *core); -struct device_region_info *venus_hfi_get_device_region_info( - struct msm_vidc_core *core, enum msm_vidc_device_region region); +struct device_region_info + *venus_hfi_get_device_region_info(struct msm_vidc_core *core, + enum msm_vidc_device_region region); #endif // _VENUS_HFI_H_ diff --git a/driver/vidc/inc/venus_hfi_response.h b/driver/vidc/inc/venus_hfi_response.h index bfa03f4133..457059ed97 100644 --- a/driver/vidc/inc/venus_hfi_response.h +++ b/driver/vidc/inc/venus_hfi_response.h @@ -10,17 +10,16 @@ #include "hfi_packet.h" int handle_response(struct msm_vidc_core *core, - void *response); + void *response); int validate_packet(u8 *response_pkt, u8 *core_resp_pkt, - u32 core_resp_pkt_size, const char *func); + u32 core_resp_pkt_size, const char *func); bool is_valid_port(struct msm_vidc_inst *inst, u32 port, - const char *func); + const char *func); bool is_valid_hfi_buffer_type(struct msm_vidc_inst *inst, - u32 buffer_type, const char *func); + u32 buffer_type, const char *func); int handle_system_error(struct msm_vidc_core *core, - struct hfi_packet *pkt); + struct hfi_packet *pkt); int handle_release_output_buffer(struct msm_vidc_inst *inst, - struct hfi_buffer *buffer); - + struct hfi_buffer *buffer); #endif // __VENUS_HFI_RESPONSE_H__ diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index 630e5164dd..40ed2b6282 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -66,12 +66,12 @@ static void print_sfr_message(struct msm_vidc_core *core) vsfr = (struct msm_vidc_sfr *)core->sfr.align_virtual_addr; if (vsfr) { - if (vsfr->bufSize != core->sfr.mem_size) { + if (vsfr->buf_size != core->sfr.mem_size) { d_vpr_e("Invalid SFR buf size %d actual %d\n", - vsfr->bufSize, core->sfr.mem_size); + vsfr->buf_size, core->sfr.mem_size); return; } - vsfr_size = vsfr->bufSize - sizeof(u32); + vsfr_size = vsfr->buf_size - sizeof(u32); p = memchr(vsfr->rg_data, '\0', vsfr_size); /* SFR isn't guaranteed to be NULL terminated */ if (p == NULL) From 0f34fc4ff82d656a19e92dda0db9807a86002763 Mon Sep 17 00:00:00 2001 From: Anshul Agarwal Date: Tue, 18 Jul 2023 15:24:31 +0530 Subject: [PATCH 0981/1061] video: driver: fix Alignment should match open parenthesis Fix Alignment should match open paranthesis. Change-Id: I2b4c1a89fedd88df79ddb8c5711123f339303604 Signed-off-by: Anshul Agarwal --- driver/vidc/src/venus_hfi_response.c | 78 ++++++++++++++-------------- 1 file changed, 40 insertions(+), 38 deletions(-) diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index 630e5164dd..992889f323 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -676,7 +676,7 @@ static int handle_drain_last_flag_buffer(struct msm_vidc_inst *inst, } static int handle_input_buffer(struct msm_vidc_inst *inst, - struct hfi_buffer *buffer) + struct hfi_buffer *buffer) { int rc = 0; struct msm_vidc_buffers *buffers; @@ -762,7 +762,7 @@ static int handle_input_buffer(struct msm_vidc_inst *inst, } static int msm_vidc_handle_fence_signal(struct msm_vidc_inst *inst, - struct msm_vidc_buffer *buf) + struct msm_vidc_buffer *buf) { int rc = 0; bool signal_error = false; @@ -782,13 +782,12 @@ static int msm_vidc_handle_fence_signal(struct msm_vidc_inst *inst, } else { if (!inst->hfi_frame_info.fence_id) { return 0; - } else { - i_vpr_e(inst, - "%s: fence id: %d is received although fencing is not enabled\n", - __func__, inst->hfi_frame_info.fence_id); - signal_error = true; - goto signal; } + i_vpr_e(inst, + "%s: fence id: %d is received although fencing is not enabled\n", + __func__, inst->hfi_frame_info.fence_id); + signal_error = true; + goto signal; } if (inst->capabilities[OUTBUF_FENCE_TYPE].value == @@ -817,11 +816,11 @@ signal: "%s: signalling fence error for buf idx %d daddr %#llx\n", __func__, buf->index, buf->device_addr); call_fence_op(core, fence_destroy, inst, - inst->hfi_frame_info.fence_id); + inst->hfi_frame_info.fence_id); } else { /* signal fence success*/ rc = call_fence_op(core, fence_signal, inst, - inst->hfi_frame_info.fence_id); + inst->hfi_frame_info.fence_id); if (rc) { i_vpr_e(inst, "%s: failed to signal fence\n", __func__); return -EINVAL; @@ -832,7 +831,7 @@ signal: } static int handle_output_buffer(struct msm_vidc_inst *inst, - struct hfi_buffer *buffer) + struct hfi_buffer *buffer) { int rc = 0; struct msm_vidc_buffers *buffers; @@ -994,7 +993,7 @@ static int handle_output_buffer(struct msm_vidc_inst *inst, } static int handle_input_metadata_buffer(struct msm_vidc_inst *inst, - struct hfi_buffer *buffer) + struct hfi_buffer *buffer) { int rc = 0; struct msm_vidc_buffers *buffers; @@ -1062,7 +1061,7 @@ static int handle_input_metadata_buffer(struct msm_vidc_inst *inst, } static int handle_output_metadata_buffer(struct msm_vidc_inst *inst, - struct hfi_buffer *buffer) + struct hfi_buffer *buffer) { int rc = 0; struct msm_vidc_buffers *buffers; @@ -1112,7 +1111,7 @@ static int handle_output_metadata_buffer(struct msm_vidc_inst *inst, } static bool is_metabuffer_dequeued(struct msm_vidc_inst *inst, - struct msm_vidc_buffer *buf) + struct msm_vidc_buffer *buf) { bool found = false; struct msm_vidc_buffers *buffers; @@ -1228,15 +1227,17 @@ static int handle_dequeue_buffers(struct msm_vidc_inst *inst) } static int handle_release_internal_buffer(struct msm_vidc_inst *inst, - struct hfi_buffer *buffer) + struct hfi_buffer *buffer) { int rc = 0; struct msm_vidc_buffers *buffers; struct msm_vidc_buffer *buf; bool found; - buffers = msm_vidc_get_buffers(inst, hfi_buf_type_to_driver(inst->domain, - buffer->type, HFI_PORT_NONE), __func__); + buffers = msm_vidc_get_buffers(inst, + hfi_buf_type_to_driver(inst->domain, + buffer->type, HFI_PORT_NONE), + __func__); if (!buffers) return -EINVAL; @@ -1274,7 +1275,7 @@ static int handle_release_internal_buffer(struct msm_vidc_inst *inst, } int handle_release_output_buffer(struct msm_vidc_inst *inst, - struct hfi_buffer *buffer) + struct hfi_buffer *buffer) { int rc = 0; struct msm_vidc_buffer *buf; @@ -1301,7 +1302,7 @@ int handle_release_output_buffer(struct msm_vidc_inst *inst, } static int handle_session_buffer(struct msm_vidc_inst *inst, - struct hfi_packet *pkt) + struct hfi_packet *pkt) { int i, rc = 0; struct hfi_buffer *buffer; @@ -1438,7 +1439,7 @@ static int handle_output_port_settings_change(struct msm_vidc_inst *inst) } static int handle_port_settings_change(struct msm_vidc_inst *inst, - struct hfi_packet *pkt) + struct hfi_packet *pkt) { int rc = 0; @@ -1467,7 +1468,7 @@ exit: } static int handle_session_subscribe_mode(struct msm_vidc_inst *inst, - struct hfi_packet *pkt) + struct hfi_packet *pkt) { if (pkt->flags & HFI_FW_FLAGS_SUCCESS) i_vpr_h(inst, "%s: successful\n", __func__); @@ -1475,7 +1476,7 @@ static int handle_session_subscribe_mode(struct msm_vidc_inst *inst, } static int handle_session_delivery_mode(struct msm_vidc_inst *inst, - struct hfi_packet *pkt) + struct hfi_packet *pkt) { if (pkt->flags & HFI_FW_FLAGS_SUCCESS) i_vpr_h(inst, "%s: successful\n", __func__); @@ -1483,7 +1484,7 @@ static int handle_session_delivery_mode(struct msm_vidc_inst *inst, } static int handle_session_pause(struct msm_vidc_inst *inst, - struct hfi_packet *pkt) + struct hfi_packet *pkt) { if (pkt->flags & HFI_FW_FLAGS_SUCCESS) i_vpr_h(inst, "%s: successful\n", __func__); @@ -1491,7 +1492,7 @@ static int handle_session_pause(struct msm_vidc_inst *inst, } static int handle_session_resume(struct msm_vidc_inst *inst, - struct hfi_packet *pkt) + struct hfi_packet *pkt) { if (pkt->flags & HFI_FW_FLAGS_SUCCESS) i_vpr_h(inst, "%s: successful\n", __func__); @@ -1499,7 +1500,7 @@ static int handle_session_resume(struct msm_vidc_inst *inst, } static int handle_session_stability(struct msm_vidc_inst *inst, - struct hfi_packet *pkt) + struct hfi_packet *pkt) { if (pkt->flags & HFI_FW_FLAGS_SUCCESS) i_vpr_h(inst, "%s: successful\n", __func__); @@ -1507,7 +1508,7 @@ static int handle_session_stability(struct msm_vidc_inst *inst, } static int handle_session_command(struct msm_vidc_inst *inst, - struct hfi_packet *pkt) + struct hfi_packet *pkt) { int i, rc; static const struct msm_vidc_hfi_packet_handle hfi_pkt_handle[] = { @@ -1545,7 +1546,7 @@ static int handle_session_command(struct msm_vidc_inst *inst, } static int handle_dpb_list_property(struct msm_vidc_inst *inst, - struct hfi_packet *pkt) + struct hfi_packet *pkt) { u32 payload_size, num_words_in_payload; u8 *payload_start; @@ -1617,7 +1618,7 @@ static int handle_dpb_list_property(struct msm_vidc_inst *inst, } static int handle_property_with_payload(struct msm_vidc_inst *inst, - struct hfi_packet *pkt, u32 port) + struct hfi_packet *pkt, u32 port) { int rc = 0; u32 *payload_ptr = NULL; @@ -1705,12 +1706,12 @@ static int handle_property_with_payload(struct msm_vidc_inst *inst, case HFI_PROP_CABAC_SESSION: if (payload_ptr[0] == 1) msm_vidc_update_cap_value(inst, ENTROPY_MODE, - V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, - __func__); + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, + __func__); else msm_vidc_update_cap_value(inst, ENTROPY_MODE, - V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC, - __func__); + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC, + __func__); break; case HFI_PROP_DPB_LIST: rc = handle_dpb_list_property(inst, pkt); @@ -1749,7 +1750,8 @@ static int handle_property_with_payload(struct msm_vidc_inst *inst, } static int handle_property_without_payload(struct msm_vidc_inst *inst, - struct hfi_packet *pkt, u32 port) + struct hfi_packet *pkt, + u32 port) { int rc = 0; @@ -1783,7 +1785,7 @@ static int handle_property_without_payload(struct msm_vidc_inst *inst, } static int handle_session_property(struct msm_vidc_inst *inst, - struct hfi_packet *pkt) + struct hfi_packet *pkt) { int rc = 0; u32 port; @@ -1849,7 +1851,7 @@ static int handle_image_version_property(struct msm_vidc_core *core, } static int handle_system_property(struct msm_vidc_core *core, - struct hfi_packet *pkt) + struct hfi_packet *pkt) { int rc = 0; @@ -1866,7 +1868,7 @@ static int handle_system_property(struct msm_vidc_core *core, } static int handle_system_response(struct msm_vidc_core *core, - struct hfi_header *hdr) + struct hfi_header *hdr) { int rc = 0; struct hfi_packet *packet; @@ -1912,7 +1914,7 @@ exit: } static int __handle_session_response(struct msm_vidc_inst *inst, - struct hfi_header *hdr) + struct hfi_header *hdr) { int rc = 0; struct hfi_packet *packet; @@ -1959,7 +1961,7 @@ static int __handle_session_response(struct msm_vidc_inst *inst, } static int handle_session_response(struct msm_vidc_core *core, - struct hfi_header *hdr) + struct hfi_header *hdr) { struct msm_vidc_inst *inst; struct hfi_packet *packet; From 0e0f698cb64350ed58cfb28d1a3373e408491728 Mon Sep 17 00:00:00 2001 From: Anshul Agarwal Date: Tue, 18 Jul 2023 16:57:57 +0530 Subject: [PATCH 0982/1061] video: driver: fix Alignment should match open parenthesis Fix Alignment should match open parenthesis Change-Id: I57689cff7d2251dac9a8b8e65ac126c324bf84f2 Signed-off-by: Anshul Agarwal --- driver/vidc/src/firmware.c | 15 ++- driver/vidc/src/hfi_packet.c | 179 +++++++++++++-------------- driver/vidc/src/msm_vdec.c | 157 +++++++++++------------ driver/vidc/src/venus_hfi_response.c | 10 +- 4 files changed, 180 insertions(+), 181 deletions(-) diff --git a/driver/vidc/src/firmware.c b/driver/vidc/src/firmware.c index d46f625a31..c11eb55a92 100644 --- a/driver/vidc/src/firmware.c +++ b/driver/vidc/src/firmware.c @@ -66,9 +66,8 @@ static int protect_cp_mem(struct msm_vidc_core *core) if (rc) d_vpr_e("Failed to protect memory(%d)\n", rc); - trace_venus_hfi_var_done( - memprot.cp_start, memprot.cp_size, - memprot.cp_nonpixel_start, memprot.cp_nonpixel_size); + trace_venus_hfi_var_done(memprot.cp_start, memprot.cp_size, + memprot.cp_nonpixel_start, memprot.cp_nonpixel_size); return rc; } @@ -141,14 +140,14 @@ static int __load_fw_to_memory(struct platform_device *pdev, virt = memremap(phys, res_size, MEMREMAP_WC); if (!virt) { d_vpr_e("%s: failed to remap fw memory phys %pa[p]\n", - __func__, &phys); + __func__, &phys); return -ENOMEM; } /* prevent system suspend during fw_load */ pm_stay_awake(pdev->dev.parent); rc = qcom_mdt_load(&pdev->dev, firmware, firmware_name, - pas_id, virt, phys, res_size, NULL); + pas_id, virt, phys, res_size, NULL); pm_relax(pdev->dev.parent); if (rc) { d_vpr_e("%s: error %d loading fw \"%s\"\n", @@ -165,7 +164,7 @@ static int __load_fw_to_memory(struct platform_device *pdev, memunmap(virt); release_firmware(firmware); d_vpr_h("%s: firmware \"%s\" loaded successfully\n", - __func__, firmware_name); + __func__, firmware_name); return pas_id; @@ -184,10 +183,10 @@ int fw_load(struct msm_vidc_core *core) if (!core->resource->fw_cookie) { core->resource->fw_cookie = __load_fw_to_memory(core->pdev, - core->platform->data.fwname); + core->platform->data.fwname); if (core->resource->fw_cookie <= 0) { d_vpr_e("%s: firmware download failed %d\n", - __func__, core->resource->fw_cookie); + __func__, core->resource->fw_cookie); core->resource->fw_cookie = 0; return -ENOMEM; } diff --git a/driver/vidc/src/hfi_packet.c b/driver/vidc/src/hfi_packet.c index b6b8eca2e2..72576ae18b 100644 --- a/driver/vidc/src/hfi_packet.c +++ b/driver/vidc/src/hfi_packet.c @@ -12,7 +12,7 @@ #include "msm_vidc_debug.h" u32 get_hfi_port(struct msm_vidc_inst *inst, - enum msm_vidc_port_type port) + enum msm_vidc_port_type port) { u32 hfi_port = HFI_PORT_NONE; @@ -55,7 +55,7 @@ u32 get_hfi_port(struct msm_vidc_inst *inst, } u32 get_hfi_port_from_buffer_type(struct msm_vidc_inst *inst, - enum msm_vidc_buffer_type buffer_type) + enum msm_vidc_buffer_type buffer_type) { u32 hfi_port = HFI_PORT_NONE; @@ -116,7 +116,7 @@ u32 get_hfi_port_from_buffer_type(struct msm_vidc_inst *inst, } u32 hfi_buf_type_from_driver(enum msm_vidc_domain_type domain, - enum msm_vidc_buffer_type buffer_type) + enum msm_vidc_buffer_type buffer_type) { switch (buffer_type) { case MSM_VIDC_BUF_INPUT: @@ -158,7 +158,7 @@ u32 hfi_buf_type_from_driver(enum msm_vidc_domain_type domain, } u32 hfi_buf_type_to_driver(enum msm_vidc_domain_type domain, - enum hfi_buffer_type buffer_type, enum hfi_packet_port_type port_type) + enum hfi_buffer_type buffer_type, enum hfi_packet_port_type port_type) { switch (buffer_type) { case HFI_BUFFER_BITSTREAM: @@ -233,7 +233,7 @@ u32 get_hfi_codec(struct msm_vidc_inst *inst) } u32 get_hfi_colorformat(struct msm_vidc_inst *inst, - enum msm_vidc_colorformat_type colorformat) + enum msm_vidc_colorformat_type colorformat) { u32 hfi_colorformat = HFI_COLOR_FMT_NV12_UBWC; @@ -270,7 +270,6 @@ u32 get_hfi_colorformat(struct msm_vidc_inst *inst, static u32 get_hfi_region_flag(enum msm_vidc_buffer_region region) { - switch (region) { case MSM_VIDC_NON_SECURE: return HFI_BUF_HOST_FLAGS_CB_NON_SECURE; @@ -290,7 +289,7 @@ static u32 get_hfi_region_flag(enum msm_vidc_buffer_region region) } int get_hfi_buffer(struct msm_vidc_inst *inst, - struct msm_vidc_buffer *buffer, struct hfi_buffer *buf) + struct msm_vidc_buffer *buffer, struct hfi_buffer *buf) { memset(buf, 0, sizeof(struct hfi_buffer)); buf->type = hfi_buf_type_from_driver(inst->domain, buffer->type); @@ -320,7 +319,7 @@ int get_hfi_buffer(struct msm_vidc_inst *inst, } int hfi_create_header(u8 *packet, u32 packet_size, u32 session_id, - u32 header_id) + u32 header_id) { struct hfi_header *hdr = (struct hfi_header *)packet; @@ -339,8 +338,8 @@ int hfi_create_header(u8 *packet, u32 packet_size, u32 session_id, } int hfi_create_packet(u8 *packet, u32 packet_size, - u32 pkt_type, u32 pkt_flags, u32 payload_type, u32 port, - u32 packet_id, void *payload, u32 payload_size) + u32 pkt_type, u32 pkt_flags, u32 payload_type, u32 port, + u32 packet_id, void *payload, u32 payload_size) { struct hfi_header *hdr; struct hfi_packet *pkt; @@ -371,7 +370,7 @@ int hfi_create_packet(u8 *packet, u32 packet_size, pkt->packet_id = packet_id; if (payload_size) memcpy((u8 *)pkt + sizeof(struct hfi_packet), - payload, payload_size); + payload, payload_size); hdr->num_packets++; hdr->size += pkt->size; @@ -379,15 +378,15 @@ int hfi_create_packet(u8 *packet, u32 packet_size, } int hfi_packet_sys_init(struct msm_vidc_core *core, - u8 *pkt, u32 pkt_size) + u8 *pkt, u32 pkt_size) { int rc = 0; u32 payload = 0; u32 synx_client_data[2]; rc = hfi_create_header(pkt, pkt_size, - 0 /*session_id*/, - core->header_id++); + 0 /*session_id*/, + core->header_id++); if (rc) goto err_sys_init; @@ -396,15 +395,15 @@ int hfi_packet_sys_init(struct msm_vidc_core *core, d_vpr_h("%s: arch %d\n", __func__, payload); core->sys_init_id = core->packet_id++; rc = hfi_create_packet(pkt, pkt_size, - HFI_CMD_INIT, - (HFI_HOST_FLAGS_RESPONSE_REQUIRED | - HFI_HOST_FLAGS_INTR_REQUIRED | - HFI_HOST_FLAGS_NON_DISCARDABLE), - HFI_PAYLOAD_U32, - HFI_PORT_NONE, - core->sys_init_id, - &payload, - sizeof(u32)); + HFI_CMD_INIT, + (HFI_HOST_FLAGS_RESPONSE_REQUIRED | + HFI_HOST_FLAGS_INTR_REQUIRED | + HFI_HOST_FLAGS_NON_DISCARDABLE), + HFI_PAYLOAD_U32, + HFI_PORT_NONE, + core->sys_init_id, + &payload, + sizeof(u32)); if (rc) goto err_sys_init; @@ -412,13 +411,13 @@ int hfi_packet_sys_init(struct msm_vidc_core *core, payload = core->platform->data.ubwc_config->max_channels; d_vpr_h("%s: ubwc max channels %d\n", __func__, payload); rc = hfi_create_packet(pkt, pkt_size, - HFI_PROP_UBWC_MAX_CHANNELS, - HFI_HOST_FLAGS_NONE, - HFI_PAYLOAD_U32, - HFI_PORT_NONE, - core->packet_id++, - &payload, - sizeof(u32)); + HFI_PROP_UBWC_MAX_CHANNELS, + HFI_HOST_FLAGS_NONE, + HFI_PAYLOAD_U32, + HFI_PORT_NONE, + core->packet_id++, + &payload, + sizeof(u32)); if (rc) goto err_sys_init; @@ -426,13 +425,13 @@ int hfi_packet_sys_init(struct msm_vidc_core *core, payload = core->platform->data.ubwc_config->mal_length; d_vpr_h("%s: ubwc mal length %d\n", __func__, payload); rc = hfi_create_packet(pkt, pkt_size, - HFI_PROP_UBWC_MAL_LENGTH, - HFI_HOST_FLAGS_NONE, - HFI_PAYLOAD_U32, - HFI_PORT_NONE, - core->packet_id++, - &payload, - sizeof(u32)); + HFI_PROP_UBWC_MAL_LENGTH, + HFI_HOST_FLAGS_NONE, + HFI_PAYLOAD_U32, + HFI_PORT_NONE, + core->packet_id++, + &payload, + sizeof(u32)); if (rc) goto err_sys_init; @@ -440,13 +439,13 @@ int hfi_packet_sys_init(struct msm_vidc_core *core, payload = core->platform->data.ubwc_config->highest_bank_bit; d_vpr_h("%s: ubwc hbb %d\n", __func__, payload); rc = hfi_create_packet(pkt, pkt_size, - HFI_PROP_UBWC_HBB, - HFI_HOST_FLAGS_NONE, - HFI_PAYLOAD_U32, - HFI_PORT_NONE, - core->packet_id++, - &payload, - sizeof(u32)); + HFI_PROP_UBWC_HBB, + HFI_HOST_FLAGS_NONE, + HFI_PAYLOAD_U32, + HFI_PORT_NONE, + core->packet_id++, + &payload, + sizeof(u32)); if (rc) goto err_sys_init; @@ -468,13 +467,13 @@ int hfi_packet_sys_init(struct msm_vidc_core *core, payload = core->platform->data.ubwc_config->bank_swz2_level; d_vpr_h("%s: ubwc swzl2 %d\n", __func__, payload); rc = hfi_create_packet(pkt, pkt_size, - HFI_PROP_UBWC_BANK_SWZL_LEVEL2, - HFI_HOST_FLAGS_NONE, - HFI_PAYLOAD_U32, - HFI_PORT_NONE, - core->packet_id++, - &payload, - sizeof(u32)); + HFI_PROP_UBWC_BANK_SWZL_LEVEL2, + HFI_HOST_FLAGS_NONE, + HFI_PAYLOAD_U32, + HFI_PORT_NONE, + core->packet_id++, + &payload, + sizeof(u32)); if (rc) goto err_sys_init; @@ -482,13 +481,13 @@ int hfi_packet_sys_init(struct msm_vidc_core *core, payload = core->platform->data.ubwc_config->bank_swz3_level; d_vpr_h("%s: ubwc swzl3 %d\n", __func__, payload); rc = hfi_create_packet(pkt, pkt_size, - HFI_PROP_UBWC_BANK_SWZL_LEVEL3, - HFI_HOST_FLAGS_NONE, - HFI_PAYLOAD_U32, - HFI_PORT_NONE, - core->packet_id++, - &payload, - sizeof(u32)); + HFI_PROP_UBWC_BANK_SWZL_LEVEL3, + HFI_HOST_FLAGS_NONE, + HFI_PAYLOAD_U32, + HFI_PORT_NONE, + core->packet_id++, + &payload, + sizeof(u32)); if (rc) goto err_sys_init; @@ -496,13 +495,13 @@ int hfi_packet_sys_init(struct msm_vidc_core *core, payload = core->platform->data.ubwc_config->bank_spreading; d_vpr_h("%s: ubwc bank spreading %d\n", __func__, payload); rc = hfi_create_packet(pkt, pkt_size, - HFI_PROP_UBWC_BANK_SPREADING, - HFI_HOST_FLAGS_NONE, - HFI_PAYLOAD_U32, - HFI_PORT_NONE, - core->packet_id++, - &payload, - sizeof(u32)); + HFI_PROP_UBWC_BANK_SPREADING, + HFI_HOST_FLAGS_NONE, + HFI_PAYLOAD_U32, + HFI_PORT_NONE, + core->packet_id++, + &payload, + sizeof(u32)); if (rc) goto err_sys_init; @@ -533,13 +532,13 @@ err_sys_init: } int hfi_packet_image_version(struct msm_vidc_core *core, - u8 *pkt, u32 pkt_size) + u8 *pkt, u32 pkt_size) { int rc = 0; rc = hfi_create_header(pkt, pkt_size, - 0 /*session_id*/, - core->header_id++); + 0 /*session_id*/, + core->header_id++); if (rc) goto err_img_version; @@ -565,13 +564,13 @@ err_img_version: } int hfi_packet_sys_pc_prep(struct msm_vidc_core *core, - u8 *pkt, u32 pkt_size) + u8 *pkt, u32 pkt_size) { int rc = 0; rc = hfi_create_header(pkt, pkt_size, - 0 /*session_id*/, - core->header_id++); + 0 /*session_id*/, + core->header_id++); if (rc) goto err_sys_pc; @@ -595,40 +594,40 @@ err_sys_pc: } int hfi_packet_sys_debug_config(struct msm_vidc_core *core, - u8 *pkt, u32 pkt_size, u32 debug_config) + u8 *pkt, u32 pkt_size, u32 debug_config) { int rc = 0; u32 payload = 0; rc = hfi_create_header(pkt, pkt_size, - 0 /*session_id*/, - core->header_id++); + 0 /*session_id*/, + core->header_id++); if (rc) goto err_debug; /* HFI_PROP_DEBUG_CONFIG */ payload = 0; /*TODO:Change later*/ rc = hfi_create_packet(pkt, pkt_size, - HFI_PROP_DEBUG_CONFIG, - HFI_HOST_FLAGS_NONE, - HFI_PAYLOAD_U32_ENUM, - HFI_PORT_NONE, - core->packet_id++, - &payload, - sizeof(u32)); + HFI_PROP_DEBUG_CONFIG, + HFI_HOST_FLAGS_NONE, + HFI_PAYLOAD_U32_ENUM, + HFI_PORT_NONE, + core->packet_id++, + &payload, + sizeof(u32)); if (rc) goto err_debug; /* HFI_PROP_DEBUG_LOG_LEVEL */ payload = debug_config; /*TODO:Change later*/ rc = hfi_create_packet(pkt, pkt_size, - HFI_PROP_DEBUG_LOG_LEVEL, - HFI_HOST_FLAGS_NONE, - HFI_PAYLOAD_U32_ENUM, - HFI_PORT_NONE, - core->packet_id++, - &payload, - sizeof(u32)); + HFI_PROP_DEBUG_LOG_LEVEL, + HFI_HOST_FLAGS_NONE, + HFI_PAYLOAD_U32_ENUM, + HFI_PORT_NONE, + core->packet_id++, + &payload, + sizeof(u32)); if (rc) goto err_debug; @@ -640,8 +639,8 @@ err_debug: } int hfi_packet_session_command(struct msm_vidc_inst *inst, - u32 pkt_type, u32 flags, u32 port, u32 session_id, - u32 payload_type, void *payload, u32 payload_size) + u32 pkt_type, u32 flags, u32 port, u32 session_id, + u32 payload_type, void *payload, u32 payload_size) { int rc = 0; struct msm_vidc_core *core; diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index 4f8018a406..77e40e2b6f 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -89,7 +89,7 @@ exit: } static int msm_vdec_set_bitstream_resolution(struct msm_vidc_inst *inst, - enum msm_vidc_port_type port) + enum msm_vidc_port_type port) { int rc = 0; u32 resolution; @@ -97,16 +97,16 @@ static int msm_vdec_set_bitstream_resolution(struct msm_vidc_inst *inst, resolution = inst->fmts[INPUT_PORT].fmt.pix_mp.width << 16 | inst->fmts[INPUT_PORT].fmt.pix_mp.height; i_vpr_h(inst, "%s: width: %d height: %d\n", __func__, - inst->fmts[INPUT_PORT].fmt.pix_mp.width, - inst->fmts[INPUT_PORT].fmt.pix_mp.height); + inst->fmts[INPUT_PORT].fmt.pix_mp.width, + inst->fmts[INPUT_PORT].fmt.pix_mp.height); inst->subcr_params[port].bitstream_resolution = resolution; rc = venus_hfi_session_property(inst, - HFI_PROP_BITSTREAM_RESOLUTION, - HFI_HOST_FLAGS_NONE, - get_hfi_port(inst, port), - HFI_PAYLOAD_U32, - &resolution, - sizeof(u32)); + HFI_PROP_BITSTREAM_RESOLUTION, + HFI_HOST_FLAGS_NONE, + get_hfi_port(inst, port), + HFI_PAYLOAD_U32, + &resolution, + sizeof(u32)); if (rc) { i_vpr_e(inst, "%s: set property failed\n", __func__); return rc; @@ -123,7 +123,8 @@ static int msm_vdec_set_linear_stride_scanline(struct msm_vidc_inst *inst) enum msm_vidc_colorformat_type colorformat; colorformat = v4l2_colorformat_to_driver(inst, - inst->fmts[OUTPUT_PORT].fmt.pix_mp.pixelformat, __func__); + inst->fmts[OUTPUT_PORT].fmt.pix_mp.pixelformat, + __func__); if (!is_linear_yuv_colorformat(colorformat)) return 0; @@ -139,12 +140,12 @@ static int msm_vdec_set_linear_stride_scanline(struct msm_vidc_inst *inst) "stride_uv: %d, scanline_uv: %d", __func__, stride_y, scanline_y, stride_uv, scanline_uv); rc = venus_hfi_session_property(inst, - HFI_PROP_LINEAR_STRIDE_SCANLINE, - HFI_HOST_FLAGS_NONE, - get_hfi_port(inst, OUTPUT_PORT), - HFI_PAYLOAD_U64, - &payload, - sizeof(u64)); + HFI_PROP_LINEAR_STRIDE_SCANLINE, + HFI_HOST_FLAGS_NONE, + get_hfi_port(inst, OUTPUT_PORT), + HFI_PAYLOAD_U64, + &payload, + sizeof(u64)); if (rc) { i_vpr_e(inst, "%s: set property failed\n", __func__); return rc; @@ -197,12 +198,12 @@ static int msm_vdec_set_ubwc_stride_scanline(struct msm_vidc_inst *inst) meta_stride_y, meta_scanline_y, meta_stride_uv, meta_scanline_uv); rc = venus_hfi_session_property(inst, - HFI_PROP_UBWC_STRIDE_SCANLINE, - HFI_HOST_FLAGS_NONE, - get_hfi_port(inst, OUTPUT_PORT), - HFI_PAYLOAD_U32_ARRAY, - &payload[0], - sizeof(u32) * 4); + HFI_PROP_UBWC_STRIDE_SCANLINE, + HFI_HOST_FLAGS_NONE, + get_hfi_port(inst, OUTPUT_PORT), + HFI_PAYLOAD_U32_ARRAY, + &payload[0], + sizeof(u32) * 4); if (rc) { i_vpr_e(inst, "%s: set property failed\n", __func__); return rc; @@ -212,7 +213,7 @@ static int msm_vdec_set_ubwc_stride_scanline(struct msm_vidc_inst *inst) } static int msm_vdec_set_crop_offsets(struct msm_vidc_inst *inst, - enum msm_vidc_port_type port) + enum msm_vidc_port_type port) { int rc = 0; u32 left_offset, top_offset, right_offset, bottom_offset; @@ -233,12 +234,12 @@ static int msm_vdec_set_crop_offsets(struct msm_vidc_inst *inst, inst->subcr_params[port].crop_offsets[0] = payload[0]; inst->subcr_params[port].crop_offsets[1] = payload[1]; rc = venus_hfi_session_property(inst, - HFI_PROP_CROP_OFFSETS, - HFI_HOST_FLAGS_NONE, - get_hfi_port(inst, port), - HFI_PAYLOAD_64_PACKED, - &payload, - sizeof(u64)); + HFI_PROP_CROP_OFFSETS, + HFI_HOST_FLAGS_NONE, + get_hfi_port(inst, port), + HFI_PAYLOAD_64_PACKED, + &payload, + sizeof(u64)); if (rc) { i_vpr_e(inst, "%s: set property failed\n", __func__); return rc; @@ -248,7 +249,7 @@ static int msm_vdec_set_crop_offsets(struct msm_vidc_inst *inst, } static int msm_vdec_set_bit_depth(struct msm_vidc_inst *inst, - enum msm_vidc_port_type port) + enum msm_vidc_port_type port) { int rc = 0; u32 pix_fmt; @@ -269,12 +270,12 @@ static int msm_vdec_set_bit_depth(struct msm_vidc_inst *inst, msm_vidc_update_cap_value(inst, BIT_DEPTH, bitdepth, __func__); i_vpr_h(inst, "%s: bit depth: %#x", __func__, bitdepth); rc = venus_hfi_session_property(inst, - HFI_PROP_LUMA_CHROMA_BIT_DEPTH, - HFI_HOST_FLAGS_NONE, - get_hfi_port(inst, port), - HFI_PAYLOAD_U32, - &bitdepth, - sizeof(u32)); + HFI_PROP_LUMA_CHROMA_BIT_DEPTH, + HFI_HOST_FLAGS_NONE, + get_hfi_port(inst, port), + HFI_PAYLOAD_U32, + &bitdepth, + sizeof(u32)); if (rc) { i_vpr_e(inst, "%s: set property failed\n", __func__); return rc; @@ -313,7 +314,7 @@ static int msm_vdec_set_cabac(struct msm_vidc_inst *inst, } */ static int msm_vdec_set_coded_frames(struct msm_vidc_inst *inst, - enum msm_vidc_port_type port) + enum msm_vidc_port_type port) { int rc = 0; u32 coded_frames = 0; @@ -329,12 +330,12 @@ static int msm_vdec_set_coded_frames(struct msm_vidc_inst *inst, inst->subcr_params[port].coded_frames = coded_frames; i_vpr_h(inst, "%s: coded frames: %d", __func__, coded_frames); rc = venus_hfi_session_property(inst, - HFI_PROP_CODED_FRAMES, - HFI_HOST_FLAGS_NONE, - get_hfi_port(inst, port), - HFI_PAYLOAD_U32, - &coded_frames, - sizeof(u32)); + HFI_PROP_CODED_FRAMES, + HFI_HOST_FLAGS_NONE, + get_hfi_port(inst, port), + HFI_PAYLOAD_U32, + &coded_frames, + sizeof(u32)); if (rc) { i_vpr_e(inst, "%s: set property failed\n", __func__); return rc; @@ -401,7 +402,7 @@ static int msm_vdec_set_picture_order_count(struct msm_vidc_inst *inst, } static int msm_vdec_set_max_num_reorder_frames(struct msm_vidc_inst *inst, - enum msm_vidc_port_type port) + enum msm_vidc_port_type port) { int rc = 0; u32 reorder_frames = 0; @@ -414,12 +415,12 @@ static int msm_vdec_set_max_num_reorder_frames(struct msm_vidc_inst *inst, reorder_frames = inst->subcr_params[port].max_num_reorder_frames; i_vpr_h(inst, "%s: max reorder frames count: %d", __func__, reorder_frames); rc = venus_hfi_session_property(inst, - HFI_PROP_MAX_NUM_REORDER_FRAMES, - HFI_HOST_FLAGS_NONE, - get_hfi_port(inst, port), - HFI_PAYLOAD_U32, - &reorder_frames, - sizeof(u32)); + HFI_PROP_MAX_NUM_REORDER_FRAMES, + HFI_HOST_FLAGS_NONE, + get_hfi_port(inst, port), + HFI_PAYLOAD_U32, + &reorder_frames, + sizeof(u32)); if (rc) { i_vpr_e(inst, "%s: set property failed\n", __func__); return rc; @@ -429,7 +430,7 @@ static int msm_vdec_set_max_num_reorder_frames(struct msm_vidc_inst *inst, } static int msm_vdec_set_colorspace(struct msm_vidc_inst *inst, - enum msm_vidc_port_type port) + enum msm_vidc_port_type port) { int rc = 0; u32 primaries = MSM_VIDC_PRIMARIES_RESERVED; @@ -480,12 +481,12 @@ static int msm_vdec_set_colorspace(struct msm_vidc_inst *inst, inst->subcr_params[port].color_info = color_info; i_vpr_h(inst, "%s: color info: %#x\n", __func__, color_info); rc = venus_hfi_session_property(inst, - HFI_PROP_SIGNAL_COLOR_INFO, - HFI_HOST_FLAGS_NONE, - get_hfi_port(inst, port), - HFI_PAYLOAD_32_PACKED, - &color_info, - sizeof(u32)); + HFI_PROP_SIGNAL_COLOR_INFO, + HFI_HOST_FLAGS_NONE, + get_hfi_port(inst, port), + HFI_PAYLOAD_32_PACKED, + &color_info, + sizeof(u32)); if (rc) { i_vpr_e(inst, "%s: set property failed\n", __func__); return rc; @@ -495,7 +496,7 @@ static int msm_vdec_set_colorspace(struct msm_vidc_inst *inst, } static int msm_vdec_set_profile(struct msm_vidc_inst *inst, - enum msm_vidc_port_type port) + enum msm_vidc_port_type port) { int rc = 0; u32 profile; @@ -509,12 +510,12 @@ static int msm_vdec_set_profile(struct msm_vidc_inst *inst, inst->subcr_params[port].profile = profile; i_vpr_h(inst, "%s: profile: %d", __func__, profile); rc = venus_hfi_session_property(inst, - HFI_PROP_PROFILE, - HFI_HOST_FLAGS_NONE, - get_hfi_port(inst, port), - HFI_PAYLOAD_U32_ENUM, - &profile, - sizeof(u32)); + HFI_PROP_PROFILE, + HFI_HOST_FLAGS_NONE, + get_hfi_port(inst, port), + HFI_PAYLOAD_U32_ENUM, + &profile, + sizeof(u32)); if (rc) { i_vpr_e(inst, "%s: set property failed\n", __func__); return rc; @@ -524,7 +525,7 @@ static int msm_vdec_set_profile(struct msm_vidc_inst *inst, } static int msm_vdec_set_level(struct msm_vidc_inst *inst, - enum msm_vidc_port_type port) + enum msm_vidc_port_type port) { int rc = 0; u32 level; @@ -538,12 +539,12 @@ static int msm_vdec_set_level(struct msm_vidc_inst *inst, inst->subcr_params[port].level = level; i_vpr_h(inst, "%s: level: %d", __func__, level); rc = venus_hfi_session_property(inst, - HFI_PROP_LEVEL, - HFI_HOST_FLAGS_NONE, - get_hfi_port(inst, port), - HFI_PAYLOAD_U32_ENUM, - &level, - sizeof(u32)); + HFI_PROP_LEVEL, + HFI_HOST_FLAGS_NONE, + get_hfi_port(inst, port), + HFI_PAYLOAD_U32_ENUM, + &level, + sizeof(u32)); if (rc) { i_vpr_e(inst, "%s: set property failed\n", __func__); return rc; @@ -567,12 +568,12 @@ static int msm_vdec_set_tier(struct msm_vidc_inst *inst, inst->subcr_params[port].tier = tier; i_vpr_h(inst, "%s: tier: %d", __func__, tier); rc = venus_hfi_session_property(inst, - HFI_PROP_TIER, - HFI_HOST_FLAGS_NONE, - get_hfi_port(inst, port), - HFI_PAYLOAD_U32_ENUM, - &tier, - sizeof(u32)); + HFI_PROP_TIER, + HFI_HOST_FLAGS_NONE, + get_hfi_port(inst, port), + HFI_PAYLOAD_U32_ENUM, + &tier, + sizeof(u32)); if (rc) { i_vpr_e(inst, "%s: set property failed\n", __func__); return rc; @@ -582,7 +583,7 @@ static int msm_vdec_set_tier(struct msm_vidc_inst *inst, } static int msm_vdec_set_av1_film_grain_present(struct msm_vidc_inst *inst, - enum msm_vidc_port_type port) + enum msm_vidc_port_type port) { int rc = 0; u32 fg_present; diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index 992889f323..d7603b6dfc 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -503,7 +503,7 @@ static int handle_session_stop(struct msm_vidc_inst *inst, } static int handle_session_drain(struct msm_vidc_inst *inst, - struct hfi_packet *pkt) + struct hfi_packet *pkt) { int rc = 0; @@ -568,7 +568,7 @@ static int get_driver_buffer_flags(struct msm_vidc_inst *inst, u32 hfi_flags) } static int handle_read_only_buffer(struct msm_vidc_inst *inst, - struct msm_vidc_buffer *buf) + struct msm_vidc_buffer *buf) { struct msm_vidc_buffer *ro_buf; struct msm_vidc_core *core; @@ -619,7 +619,7 @@ static int handle_read_only_buffer(struct msm_vidc_inst *inst, } static int handle_non_read_only_buffer(struct msm_vidc_inst *inst, - struct hfi_buffer *buffer) + struct hfi_buffer *buffer) { struct msm_vidc_buffer *ro_buf; @@ -640,7 +640,7 @@ static int handle_non_read_only_buffer(struct msm_vidc_inst *inst, } static int handle_psc_last_flag_buffer(struct msm_vidc_inst *inst, - struct hfi_buffer *buffer) + struct hfi_buffer *buffer) { int rc = 0; @@ -658,7 +658,7 @@ static int handle_psc_last_flag_buffer(struct msm_vidc_inst *inst, } static int handle_drain_last_flag_buffer(struct msm_vidc_inst *inst, - struct hfi_buffer *buffer) + struct hfi_buffer *buffer) { int rc = 0; From d9fe02d49a5b8385195c36214651cc21921ebc4e Mon Sep 17 00:00:00 2001 From: Jiajia Cong Date: Thu, 3 Aug 2023 09:40:30 +0530 Subject: [PATCH 0983/1061] video: driver: fix roi metadata size calculation lcu_size shouldn't be changed by shift op, it is still needed in alignment calculation. Change-Id: I3c0ebfaee84389926ba3e191d901006065598182 Signed-off-by: Jiajia Cong --- driver/variant/iris2/inc/hfi_buffer_iris2.h | 7 ++++--- driver/variant/iris3/inc/hfi_buffer_iris3.h | 7 ++++--- driver/variant/iris33/inc/hfi_buffer_iris33.h | 7 ++++--- 3 files changed, 12 insertions(+), 9 deletions(-) diff --git a/driver/variant/iris2/inc/hfi_buffer_iris2.h b/driver/variant/iris2/inc/hfi_buffer_iris2.h index 40199ebe60..5be5f720f7 100644 --- a/driver/variant/iris2/inc/hfi_buffer_iris2.h +++ b/driver/variant/iris2/inc/hfi_buffer_iris2.h @@ -892,10 +892,11 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define SIZE_ROI_METADATA_ENC(size_roi, frame_width, frame_height, lcu_size)\ do { \ HFI_U32 width_in_lcus = 0, height_in_lcus = 0, n_shift = 0; \ - while (lcu_size && !(lcu_size & 0x1)) { \ + HFI_U32 n_lcu_size = lcu_size; \ + while (n_lcu_size && !(n_lcu_size & 0x1)) { \ n_shift++; \ - lcu_size = lcu_size >> 1; \ - } \ + n_lcu_size = n_lcu_size >> 1; \ + } \ width_in_lcus = (frame_width + (lcu_size - 1)) >> n_shift; \ height_in_lcus = (frame_height + (lcu_size - 1)) >> n_shift; \ size_roi = (((width_in_lcus + 7) >> 3) << 3) * \ diff --git a/driver/variant/iris3/inc/hfi_buffer_iris3.h b/driver/variant/iris3/inc/hfi_buffer_iris3.h index 2aa5068fab..7137b6e23e 100644 --- a/driver/variant/iris3/inc/hfi_buffer_iris3.h +++ b/driver/variant/iris3/inc/hfi_buffer_iris3.h @@ -1222,10 +1222,11 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define SIZE_ROI_METADATA_ENC(size_roi, frame_width, frame_height, lcu_size)\ do { \ HFI_U32 width_in_lcus = 0, height_in_lcus = 0, n_shift = 0; \ - while (lcu_size && !(lcu_size & 0x1)) { \ + HFI_U32 n_lcu_size = lcu_size; \ + while (n_lcu_size && !(n_lcu_size & 0x1)) { \ n_shift++; \ - lcu_size = lcu_size >> 1; \ - } \ + n_lcu_size = n_lcu_size >> 1; \ + } \ width_in_lcus = (frame_width + (lcu_size - 1)) >> n_shift; \ height_in_lcus = (frame_height + (lcu_size - 1)) >> n_shift; \ size_roi = (((width_in_lcus + 7) >> 3) << 3) * \ diff --git a/driver/variant/iris33/inc/hfi_buffer_iris33.h b/driver/variant/iris33/inc/hfi_buffer_iris33.h index 6c13410961..1e20d701a7 100644 --- a/driver/variant/iris33/inc/hfi_buffer_iris33.h +++ b/driver/variant/iris33/inc/hfi_buffer_iris33.h @@ -1222,10 +1222,11 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define SIZE_ROI_METADATA_ENC(size_roi, frame_width, frame_height, lcu_size)\ do { \ HFI_U32 width_in_lcus = 0, height_in_lcus = 0, n_shift = 0; \ - while (lcu_size && !(lcu_size & 0x1)) { \ + HFI_U32 n_lcu_size = lcu_size; \ + while (n_lcu_size && !(n_lcu_size & 0x1)) { \ n_shift++; \ - lcu_size = lcu_size >> 1; \ - } \ + n_lcu_size = n_lcu_size >> 1; \ + } \ width_in_lcus = (frame_width + (lcu_size - 1)) >> n_shift; \ height_in_lcus = (frame_height + (lcu_size - 1)) >> n_shift; \ size_roi = (((width_in_lcus + 7) >> 3) << 3) * \ From 55de99511a7482e11e7a7e6df0c4c6e7d651738f Mon Sep 17 00:00:00 2001 From: Manikanta Kanamarlapudi Date: Fri, 11 Aug 2023 13:28:46 +0530 Subject: [PATCH 0984/1061] Video: Driver: Allow only SSR type 0x1 Allow only SSR type 0x1 Change-Id: If6efd1ad2d6cb4f08cfc0090304f7faafb54aee9 Signed-off-by: Manikanta Kanamarlapudi --- driver/vidc/src/venus_hfi.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index 207a050618..ea98717c0e 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -928,6 +928,12 @@ int venus_hfi_trigger_ssr(struct msm_vidc_core *core, u32 type, int rc = 0; u32 payload[2]; + // WA for CR: 3584248 + if (type != HFI_SSR_TYPE_SW_ERR_FATAL) { + d_vpr_h("SSR Type 0x1 is only allowed for pineapple\n"); + return rc; + } + /* * call resume before preparing ssr hfi packet in core->packet * otherwise ssr hfi packet in core->packet will be overwritten From 3d17324c6803ebfa0122f54a4963a2ea078c9cbd Mon Sep 17 00:00:00 2001 From: Vedang Nagar Date: Mon, 17 Jul 2023 18:16:48 +0530 Subject: [PATCH 0985/1061] Video: Driver: Modify platform specific changes for cliffs Modify platform specific driver changes for cliffs target. Change-Id: Ib02b1402c5bd6eb7f785f1459ee0bdc3f77a19ac Signed-off-by: Vedang Nagar --- driver/platform/cliffs/src/msm_vidc_cliffs.c | 1039 ++++++++---------- 1 file changed, 483 insertions(+), 556 deletions(-) diff --git a/driver/platform/cliffs/src/msm_vidc_cliffs.c b/driver/platform/cliffs/src/msm_vidc_cliffs.c index 228abfe7e7..b5a95d1b05 100644 --- a/driver/platform/cliffs/src/msm_vidc_cliffs.c +++ b/driver/platform/cliffs/src/msm_vidc_cliffs.c @@ -29,19 +29,21 @@ #define DEFAULT_VIDEO_CONCEAL_COLOR_BLACK 0x8020010 #define MAX_BASE_LAYER_PRIORITY_ID 63 #define MAX_OP_POINT 31 -#define MAX_BITRATE 245000000 +#define MAX_BITRATE 160000000 +#define MAX_BITRATE_V1 100000000 #define DEFAULT_BITRATE 20000000 #define MINIMUM_FPS 1 #define MAXIMUM_FPS 480 -#define MAXIMUM_DEC_FPS 960 #define MAX_QP 51 #define DEFAULT_QP 20 #define MAX_CONSTANT_QUALITY 100 #define MIN_SLICE_BYTE_SIZE 512 #define MAX_SLICE_BYTE_SIZE \ ((MAX_BITRATE) >> 3) +#define MAX_SLICE_BYTE_SIZE_V1 \ + ((MAX_BITRATE_V1) >> 3) #define MAX_SLICE_MB_SIZE \ - (((4096 + 15) >> 4) * ((2304 + 15) >> 4)) + (((4096 + 15) >> 4) * ((2160 + 15) >> 4)) #define ENC MSM_VIDC_ENCODER #define DEC MSM_VIDC_DECODER @@ -50,10 +52,11 @@ #define VP9 MSM_VIDC_VP9 #define AV1 MSM_VIDC_AV1 #define HEIC MSM_VIDC_HEIC -#define CODECS_ALL (H264 | HEVC | VP9 | HEIC | AV1) +#define CODECS_ALL_V0 (H264 | HEVC | VP9 | HEIC | AV1) +#define CODECS_ALL_V1 (H264 | HEVC | VP9 | HEIC) #define MAXIMUM_OVERRIDE_VP9_FPS 200 -static struct codec_info codec_data_cliffs[] = { +static struct codec_info codec_data_cliffs_v0[] = { { .v4l2_codec = V4L2_PIX_FMT_H264, .vidc_codec = MSM_VIDC_H264, @@ -81,6 +84,29 @@ static struct codec_info codec_data_cliffs[] = { }, }; +static struct codec_info codec_data_cliffs_v1[] = { + { + .v4l2_codec = V4L2_PIX_FMT_H264, + .vidc_codec = MSM_VIDC_H264, + .pixfmt_name = "AVC", + }, + { + .v4l2_codec = V4L2_PIX_FMT_HEVC, + .vidc_codec = MSM_VIDC_HEVC, + .pixfmt_name = "HEVC", + }, + { + .v4l2_codec = V4L2_PIX_FMT_VP9, + .vidc_codec = MSM_VIDC_VP9, + .pixfmt_name = "VP9", + }, + { + .v4l2_codec = V4L2_PIX_FMT_VIDC_HEIC, + .vidc_codec = MSM_VIDC_HEIC, + .pixfmt_name = "HEIC", + }, +}; + static struct color_format_info color_format_data_cliffs[] = { { .v4l2_color_format = V4L2_PIX_FMT_NV12, @@ -286,26 +312,22 @@ static struct msm_platform_core_capability core_data_cliffs_v0[] = { {DEC_CODECS, H264 | HEVC | VP9 | AV1 | HEIC}, {MAX_SESSION_COUNT, 16}, {MAX_NUM_720P_SESSIONS, 16}, - {MAX_NUM_1080P_SESSIONS, 16}, - {MAX_NUM_4K_SESSIONS, 8}, - {MAX_NUM_8K_SESSIONS, 2}, + {MAX_NUM_1080P_SESSIONS, 8}, + {MAX_NUM_4K_SESSIONS, 4}, {MAX_SECURE_SESSION_COUNT, 3}, - {MAX_RT_MBPF, 174080}, /* (8192x4352)/256 + (4096x2176)/256*/ - {MAX_MBPF, 278528}, /* ((8192x4352)/256) * 2 */ - {MAX_MBPS, 7833600}, - /* max_load - * 7680x4320@60fps or 3840x2176@240fps - * which is greater than 4096x2176@120fps, - * 8192x4320@48fps - */ - {MAX_IMAGE_MBPF, 1048576}, /* (16384x16384)/256 */ + {MAX_RT_MBPF, 65280}, /* (2 * ((3840x2176)/256)) */ + {MAX_MBPF, 139264}, /* (4 * ((4096x2176)/256))*/ + /* max_load 4096x2176@120fps */ + /* Concurrency: UHD@30 decode + uhd@30 encode */ + {MAX_MBPS, 4177920}, + {MAX_IMAGE_MBPF, 1048576}, /* (16384x16384)/256 */ {MAX_MBPF_HQ, 8160}, /* ((1920x1088)/256) */ - {MAX_MBPS_HQ, 489600}, /* ((1920x1088)/256)@60fps */ + {MAX_MBPS_HQ, 244800}, /* ((1920x1088)/256)@30fps */ {MAX_MBPF_B_FRAME, 32640}, /* 3840x2176/256 */ - {MAX_MBPS_B_FRAME, 1958400}, /* 3840x2176/256 MBs@60fps */ - {MAX_MBPS_ALL_INTRA, 1044480}, /* 4096x2176/256 MBs@30fps */ + {MAX_MBPS_B_FRAME, 979200}, /* 3840x2176/256 MBs@30fps */ + {MAX_MBPS_ALL_INTRA, 489600}, /* ((1920x1088)/256)@60fps */ {MAX_ENH_LAYER_COUNT, 5}, - {NUM_VPP_PIPE, 4}, + {NUM_VPP_PIPE, 2}, {SW_PC, 1}, {FW_UNLOAD, 0}, {HW_RESPONSE_TIMEOUT, HW_RESPONSE_TIMEOUT_VALUE}, /* 1000 ms */ @@ -332,26 +354,21 @@ static struct msm_platform_core_capability core_data_cliffs_v1[] = { {DEC_CODECS, H264 | HEVC | VP9 | AV1 | HEIC}, {MAX_SESSION_COUNT, 16}, {MAX_NUM_720P_SESSIONS, 16}, - {MAX_NUM_1080P_SESSIONS, 16}, - {MAX_NUM_4K_SESSIONS, 8}, - {MAX_NUM_8K_SESSIONS, 2}, + {MAX_NUM_1080P_SESSIONS, 8}, + {MAX_NUM_4K_SESSIONS, 2}, {MAX_SECURE_SESSION_COUNT, 3}, - {MAX_RT_MBPF, 174080}, /* (8192x4352)/256 + (4096x2176)/256*/ - {MAX_MBPF, 278528}, /* ((8192x4352)/256) * 2 */ - {MAX_MBPS, 7833600}, - /* max_load - * 7680x4320@60fps or 3840x2176@240fps - * which is greater than 4096x2176@120fps, - * 8192x4320@48fps - */ + {MAX_RT_MBPF, 65280}, /* (2 * ((3840x2176)/256)) */ + {MAX_MBPF, 69632}, /* (2 * ((4096x2176)/256))*/ + /* max_load 4096x2176@60fps*/ + {MAX_MBPS, 2088960}, /* Concurrency: UHD@30 decode + 1080p@30 encode */ {MAX_IMAGE_MBPF, 1048576}, /* (16384x16384)/256 */ {MAX_MBPF_HQ, 8160}, /* ((1920x1088)/256) */ - {MAX_MBPS_HQ, 489600}, /* ((1920x1088)/256)@60fps */ + {MAX_MBPS_HQ, 244800}, /* ((1920x1088)/256)@30fps */ {MAX_MBPF_B_FRAME, 32640}, /* 3840x2176/256 */ - {MAX_MBPS_B_FRAME, 1958400}, /* 3840x2176/256 MBs@60fps */ - {MAX_MBPS_ALL_INTRA, 1044480}, /* 4096x2176/256 MBs@30fps */ + {MAX_MBPS_B_FRAME, 979200}, /* 3840x2176/256 MBs@30fps */ + {MAX_MBPS_ALL_INTRA, 489600}, /* ((1920x1088)/256)@60fps */ {MAX_ENH_LAYER_COUNT, 5}, - {NUM_VPP_PIPE, 4}, + {NUM_VPP_PIPE, 2}, {SW_PC, 1}, {FW_UNLOAD, 0}, {HW_RESPONSE_TIMEOUT, HW_RESPONSE_TIMEOUT_VALUE}, /* 1000 ms */ @@ -372,70 +389,6 @@ static struct msm_platform_core_capability core_data_cliffs_v1[] = { {SUPPORTS_REQUESTS, 0}, }; -static int msm_vidc_set_ring_buffer_count_cliffs(void *instance, - enum msm_vidc_inst_capability_type cap_id) -{ - int rc = 0; - struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance; - struct v4l2_format *output_fmt, *input_fmt; - struct msm_vidc_core *core; - u32 count = 0, data_size = 0, pixel_count = 0, fps = 0; - u32 frame_rate = 0, operating_rate = 0; - - core = inst->core; - output_fmt = &inst->fmts[OUTPUT_PORT]; - input_fmt = &inst->fmts[INPUT_PORT]; - - frame_rate = inst->capabilities[FRAME_RATE].value >> 16; - operating_rate = inst->capabilities[OPERATING_RATE].value >> 16; - fps = max(frame_rate, operating_rate); - pixel_count = output_fmt->fmt.pix_mp.width * - output_fmt->fmt.pix_mp.height; - - /* - * try to enable ring buffer feature if -  * resolution >= 8k and fps >= 30fps and -  * resolution >= 4k and fps >= 120fps and -  * resolution >= 1080p and fps >= 480fps and -  * resolution >= 720p and fps >= 960fps - */ - if ((pixel_count >= 7680 * 4320 && fps >= 30) || - (pixel_count >= 3840 * 2160 && fps >= 120) || - (pixel_count >= 1920 * 1080 && fps >= 480) || - (pixel_count >= 1280 * 720 && fps >= 960)) { - data_size = input_fmt->fmt.pix_mp.plane_fmt[0].sizeimage; - i_vpr_h(inst, "%s: calculate ring buffer count\n", __func__); - rc = call_session_op(core, ring_buf_count, inst, data_size); - if (rc) { - i_vpr_e(inst, "%s: failed to calculate ring buffer count\n", - __func__); - /* ignore error */ - rc = 0; - inst->capabilities[cap_id].value = 0; - } - } else { - i_vpr_h(inst, - "%s: session %ux%u@%u fps does not support ring buffer\n", - __func__, output_fmt->fmt.pix_mp.width, - output_fmt->fmt.pix_mp.height, fps); - inst->capabilities[cap_id].value = 0; - } - - count = inst->capabilities[cap_id].value; - i_vpr_h(inst, "%s: ring buffer count: %u\n", __func__, count); - rc = venus_hfi_session_property(inst, - HFI_PROP_ENC_RING_BIN_BUF, - HFI_HOST_FLAGS_NONE, - HFI_PORT_BITSTREAM, - HFI_PAYLOAD_U32, - &count, - sizeof(u32)); - if (rc) - return rc; - - return rc; -} - static struct msm_platform_inst_capability instance_cap_data_cliffs_v0[] = { /* {cap, domain, codec, * min, max, step_or_mask, value, @@ -443,47 +396,47 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v0[] = { * hfi_id, * flags} */ - {DRV_VERSION, DEC|ENC, CODECS_ALL, + {DRV_VERSION, DEC|ENC, CODECS_ALL_V0, 0, INT_MAX, 1, DRIVER_VERSION, V4L2_CID_MPEG_VIDC_DRIVER_VERSION}, - {FRAME_WIDTH, DEC, CODECS_ALL, 96, 8192, 1, 1920}, + {FRAME_WIDTH, DEC, CODECS_ALL_V0, 96, 4096, 1, 1920}, {FRAME_WIDTH, DEC, VP9, 96, 4096, 1, 1920}, - {FRAME_WIDTH, ENC, CODECS_ALL, 128, 8192, 1, 1920}, + {FRAME_WIDTH, ENC, CODECS_ALL_V0, 128, 4096, 1, 1920}, - {FRAME_WIDTH, ENC, HEVC, 96, 8192, 1, 1920}, + {FRAME_WIDTH, ENC, HEVC, 96, 4096, 1, 1920}, {FRAME_WIDTH, ENC, HEIC, 128, 16384, 1, 16384}, - {LOSSLESS_FRAME_WIDTH, ENC, CODECS_ALL, 128, 4096, 1, 1920}, + {LOSSLESS_FRAME_WIDTH, ENC, CODECS_ALL_V0, 128, 4096, 1, 1920}, {LOSSLESS_FRAME_WIDTH, ENC, HEVC, 96, 4096, 1, 1920}, - {SECURE_FRAME_WIDTH, DEC, CODECS_ALL, 96, 4096, 1, 1920}, + {SECURE_FRAME_WIDTH, DEC, CODECS_ALL_V0, 96, 4096, 1, 1920}, - {SECURE_FRAME_WIDTH, ENC, CODECS_ALL, 128, 4096, 1, 1920}, + {SECURE_FRAME_WIDTH, ENC, CODECS_ALL_V0, 128, 4096, 1, 1920}, {SECURE_FRAME_WIDTH, ENC, HEVC, 96, 4096, 1, 1920}, - {FRAME_HEIGHT, DEC, CODECS_ALL, 96, 8192, 1, 1080}, + {FRAME_HEIGHT, DEC, CODECS_ALL_V0, 96, 4096, 1, 1080}, {FRAME_HEIGHT, DEC, VP9, 96, 4096, 1, 1080}, - {FRAME_HEIGHT, ENC, CODECS_ALL, 128, 8192, 1, 1080}, + {FRAME_HEIGHT, ENC, CODECS_ALL_V0, 128, 4096, 1, 1080}, - {FRAME_HEIGHT, ENC, HEVC, 96, 8192, 1, 1080}, + {FRAME_HEIGHT, ENC, HEVC, 96, 4096, 1, 1080}, {FRAME_HEIGHT, ENC, HEIC, 128, 16384, 1, 16384}, - {LOSSLESS_FRAME_HEIGHT, ENC, CODECS_ALL, 128, 4096, 1, 1080}, + {LOSSLESS_FRAME_HEIGHT, ENC, CODECS_ALL_V0, 128, 4096, 1, 1080}, {LOSSLESS_FRAME_HEIGHT, ENC, HEVC, 96, 4096, 1, 1080}, - {SECURE_FRAME_HEIGHT, DEC, CODECS_ALL, 96, 4096, 1, 1080}, + {SECURE_FRAME_HEIGHT, DEC, CODECS_ALL_V0, 96, 4096, 1, 1080}, - {SECURE_FRAME_HEIGHT, ENC, CODECS_ALL, 128, 4096, 1, 1080}, + {SECURE_FRAME_HEIGHT, ENC, CODECS_ALL_V0, 128, 4096, 1, 1080}, {SECURE_FRAME_HEIGHT, ENC, HEVC, 96, 4096, 1, 1080}, @@ -513,7 +466,7 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v0[] = { MSM_VIDC_FMT_P010 | MSM_VIDC_FMT_TP10C, MSM_VIDC_FMT_NV12C}, - {MIN_BUFFERS_INPUT, ENC | DEC, CODECS_ALL, 0, 64, 1, 4, + {MIN_BUFFERS_INPUT, ENC | DEC, CODECS_ALL_V0, 0, 64, 1, 4, V4L2_CID_MIN_BUFFERS_FOR_OUTPUT, 0, CAP_FLAG_VOLATILE}, @@ -523,43 +476,45 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v0[] = { 0, CAP_FLAG_VOLATILE}, - {MIN_BUFFERS_OUTPUT, ENC | DEC, CODECS_ALL, + {MIN_BUFFERS_OUTPUT, ENC | DEC, CODECS_ALL_V0, 0, 64, 1, 4, V4L2_CID_MIN_BUFFERS_FOR_CAPTURE, HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_VOLATILE}, - /* (8192 * 4320) / 256 */ - {MBPF, ENC, CODECS_ALL, 64, 138240, 1, 138240}, + /* (4096 * 2176) / 256 */ + {MBPF, ENC, CODECS_ALL_V0, 64, 34816, 1, 34816}, - {MBPF, ENC, HEVC, 36, 138240, 1, 138240}, + {MBPF, ENC, HEVC, 36, 34816, 1, 34816}, /* ((16384x16384)/256) */ {MBPF, ENC, HEIC, 36, 1048576, 1, 1048576}, - {MBPF, DEC, CODECS_ALL, 36, 138240, 1, 138240}, - - /* (4096 * 2304) / 256 */ - {MBPF, DEC, VP9, 36, 36864, 1, 36864}, + /* (4096 * 2176) / 256 */ + {MBPF, DEC, CODECS_ALL_V0, 36, 34816, 1, 34816}, /* ((8192x8192)/256) */ {MBPF, DEC, HEIC, 64, 262144, 1, 262144 }, - /* (4096 * 2304) / 256 */ - {LOSSLESS_MBPF, ENC, H264 | HEVC, 64, 36864, 1, 36864}, + /* (4096 * 2176) / 256 */ + {LOSSLESS_MBPF, ENC, H264 | HEVC, 64, 34816, 1, 34816}, /* Batch Mode Decode */ - /* TODO: update with new values based on updated voltage corner */ - {BATCH_MBPF, DEC, H264 | HEVC | VP9 | AV1, 64, 34816, 1, 34816}, + /* BATCH_MBPF + 2 is done for chipsets other than lanai + * due to timeline constraints since msm_vidc_allow_decode_batch + * has checks to allow batching for less than BATCH_MBPF. + * Same applies for BATCH_FPS. + */ + {BATCH_MBPF, DEC, H264 | HEVC | VP9 | AV1, 64, 8162, 1, 8162}, - /* (4096 * 2304) / 256 */ - {BATCH_FPS, DEC, H264 | HEVC | VP9 | AV1, 1, 120, 1, 120}, + /* (1920 * 1088) / 256 */ + {BATCH_FPS, DEC, H264 | HEVC | VP9 | AV1, 1, 61, 1, 61}, {SECURE_MBPF, ENC | DEC, H264 | HEVC | VP9 | AV1, 64, 36864, 1, 36864}, {SECURE_MBPF, ENC, HEVC, 36, 36864, 1, 36864}, - {FRAME_RATE, ENC, CODECS_ALL, + {FRAME_RATE, ENC, CODECS_ALL_V0, (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), 1, (DEFAULT_FPS << 16), 0, @@ -573,8 +528,8 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v0[] = { HFI_PROP_FRAME_RATE, CAP_FLAG_OUTPUT_PORT}, - {FRAME_RATE, DEC, CODECS_ALL, - (MINIMUM_FPS << 16), (MAXIMUM_DEC_FPS << 16), + {FRAME_RATE, DEC, CODECS_ALL_V0, + (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), 1, (DEFAULT_FPS << 16), V4L2_CID_MPEG_VIDC_FRAME_RATE, 0, @@ -589,11 +544,11 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v0[] = { CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - {OPERATING_RATE, ENC, CODECS_ALL, + {OPERATING_RATE, ENC, CODECS_ALL_V0, (MINIMUM_FPS << 16), INT_MAX, 1, (DEFAULT_FPS << 16)}, - {OPERATING_RATE, DEC, CODECS_ALL, + {OPERATING_RATE, DEC, CODECS_ALL_V0, (MINIMUM_FPS << 16), INT_MAX, 1, (DEFAULT_FPS << 16), V4L2_CID_MPEG_VIDC_OPERATING_RATE, @@ -601,40 +556,40 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v0[] = { CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - {INPUT_RATE, ENC | DEC, CODECS_ALL, + {INPUT_RATE, ENC | DEC, CODECS_ALL_V0, (MINIMUM_FPS << 16), INT_MAX, 1, (DEFAULT_FPS << 16)}, - {TIMESTAMP_RATE, ENC | DEC, CODECS_ALL, + {TIMESTAMP_RATE, ENC | DEC, CODECS_ALL_V0, (MINIMUM_FPS << 16), INT_MAX, 1, (DEFAULT_FPS << 16)}, {SCALE_FACTOR, ENC, H264 | HEVC, 1, 8, 1, 8}, - {MB_CYCLES_VSP, ENC, CODECS_ALL, 25, 25, 1, 25}, + {MB_CYCLES_VSP, ENC, CODECS_ALL_V0, 25, 25, 1, 25}, - {MB_CYCLES_VSP, DEC, CODECS_ALL, 25, 25, 1, 25}, + {MB_CYCLES_VSP, DEC, CODECS_ALL_V0, 25, 25, 1, 25}, {MB_CYCLES_VSP, DEC, VP9 | AV1, 60, 60, 1, 60}, - {MB_CYCLES_VPP, ENC, CODECS_ALL, 675, 675, 1, 675}, + {MB_CYCLES_VPP, ENC, CODECS_ALL_V0, 675, 675, 1, 675}, - {MB_CYCLES_VPP, DEC, CODECS_ALL, 200, 200, 1, 200}, + {MB_CYCLES_VPP, DEC, CODECS_ALL_V0, 200, 200, 1, 200}, - {MB_CYCLES_LP, ENC, CODECS_ALL, 320, 320, 1, 320}, + {MB_CYCLES_LP, ENC, CODECS_ALL_V0, 320, 320, 1, 320}, - {MB_CYCLES_LP, DEC, CODECS_ALL, 200, 200, 1, 200}, + {MB_CYCLES_LP, DEC, CODECS_ALL_V0, 200, 200, 1, 200}, - {MB_CYCLES_FW, ENC | DEC, CODECS_ALL, 489583, 489583, 1, 489583}, + {MB_CYCLES_FW, ENC | DEC, CODECS_ALL_V0, 489583, 489583, 1, 489583}, - {MB_CYCLES_FW_VPP, ENC, CODECS_ALL, 48405, 48405, 1, 48405}, + {MB_CYCLES_FW_VPP, ENC, CODECS_ALL_V0, 48405, 48405, 1, 48405}, - {MB_CYCLES_FW_VPP, DEC, CODECS_ALL, 66234, 66234, 1, 66234}, + {MB_CYCLES_FW_VPP, DEC, CODECS_ALL_V0, 66234, 66234, 1, 66234}, - {ENC_RING_BUFFER_COUNT, ENC, CODECS_ALL, - 0, MAX_ENC_RING_BUF_COUNT, 1, 0}, + {ENC_RING_BUFFER_COUNT, ENC, CODECS_ALL_V0, + 0, 0, 1, 0}, - {CLIENT_ID, ENC | DEC, CODECS_ALL, + {CLIENT_ID, ENC | DEC, CODECS_ALL_V0, INVALID_CLIENT_ID, INT_MAX, 1, INVALID_CLIENT_ID, V4L2_CID_MPEG_VIDC_CLIENT_ID}, @@ -661,13 +616,13 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v0[] = { * and then client will do get_ctrl with FENCE_FD to get * fence_fd corresponding to client set fence_id. */ - {FENCE_ID, DEC, CODECS_ALL, + {FENCE_ID, DEC, CODECS_ALL_V0, 0, INT_MAX, 1, 0, V4L2_CID_MPEG_VIDC_SW_FENCE_ID, 0, CAP_FLAG_DYNAMIC_ALLOWED | CAP_FLAG_OUTPUT_PORT}, - {FENCE_FD, DEC, CODECS_ALL, + {FENCE_FD, DEC, CODECS_ALL_V0, INVALID_FD, INT_MAX, 1, INVALID_FD, V4L2_CID_MPEG_VIDC_SW_FENCE_FD, 0, @@ -718,21 +673,21 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v0[] = { 0, 1, 1, 0, V4L2_CID_MPEG_VIDC_TS_REORDER}, - {HFLIP, ENC, CODECS_ALL, + {HFLIP, ENC, CODECS_ALL_V0, 0, 1, 1, 0, V4L2_CID_HFLIP, HFI_PROP_FLIP, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - {VFLIP, ENC, CODECS_ALL, + {VFLIP, ENC, CODECS_ALL_V0, 0, 1, 1, 0, V4L2_CID_VFLIP, HFI_PROP_FLIP, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - {ROTATION, ENC, CODECS_ALL, + {ROTATION, ENC, CODECS_ALL_V0, 0, 270, 90, 0, V4L2_CID_ROTATE, HFI_PROP_ROTATION, @@ -751,7 +706,7 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v0[] = { V4L2_CID_MPEG_VIDEO_DECODER_SLICE_INTERFACE, 0}, - {HEADER_MODE, ENC, CODECS_ALL, + {HEADER_MODE, ENC, CODECS_ALL_V0, V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE, V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME, BIT(V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE) | @@ -761,11 +716,11 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v0[] = { HFI_PROP_SEQ_HEADER_MODE, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - {PREPEND_SPSPPS_TO_IDR, ENC, CODECS_ALL, + {PREPEND_SPSPPS_TO_IDR, ENC, CODECS_ALL_V0, 0, 1, 1, 0, V4L2_CID_MPEG_VIDEO_PREPEND_SPSPPS_TO_IDR}, - {VUI_TIMING_INFO, ENC, CODECS_ALL, + {VUI_TIMING_INFO, ENC, CODECS_ALL_V0, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, @@ -773,7 +728,7 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v0[] = { HFI_PROP_DISABLE_VUI_TIMING_INFO, CAP_FLAG_OUTPUT_PORT}, - {WITHOUT_STARTCODE, ENC, CODECS_ALL, + {WITHOUT_STARTCODE, ENC, CODECS_ALL_V0, 0, 1, 1, 0, V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE, HFI_PROP_NAL_LENGTH_FIELD, @@ -785,7 +740,7 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v0[] = { HFI_PROP_NAL_LENGTH_FIELD, CAP_FLAG_INPUT_PORT}, - {NAL_LENGTH_FIELD, ENC, CODECS_ALL, + {NAL_LENGTH_FIELD, ENC, CODECS_ALL_V0, V4L2_MPEG_VIDEO_HEVC_SIZE_0, V4L2_MPEG_VIDEO_HEVC_SIZE_4, BIT(V4L2_MPEG_VIDEO_HEVC_SIZE_0) | @@ -856,7 +811,7 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v0[] = { {LOWLATENCY_MAX_BITRATE, ENC, H264 | HEVC, 0, 70000000, 1, 70000000}, - {NUM_COMV, DEC, CODECS_ALL, + {NUM_COMV, DEC, CODECS_ALL_V0, 0, INT_MAX, 1, 0}, {LOSSLESS, ENC, HEVC, @@ -892,7 +847,7 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v0[] = { CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - {GOP_SIZE, ENC, CODECS_ALL, + {GOP_SIZE, ENC, CODECS_ALL_V0, 0, INT_MAX, 1, 2 * DEFAULT_FPS - 1, V4L2_CID_MPEG_VIDEO_GOP_SIZE, HFI_PROP_MAX_GOP_FRAMES, @@ -938,12 +893,12 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v0[] = { CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - {CSC, ENC, CODECS_ALL, + {CSC, ENC, CODECS_ALL_V0, 0, 1, 1, 0, V4L2_CID_MPEG_VIDC_CSC, HFI_PROP_CSC}, - {CSC_CUSTOM_MATRIX, ENC, CODECS_ALL, + {CSC_CUSTOM_MATRIX, ENC, CODECS_ALL_V0, 0, 1, 1, 0, V4L2_CID_MPEG_VIDC_VIDEO_VPE_CSC_CUSTOM_MATRIX, HFI_PROP_CSC_MATRIX, @@ -1405,7 +1360,7 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v0[] = { {LEVEL, ENC, HEVC | HEIC, V4L2_MPEG_VIDEO_HEVC_LEVEL_1, - V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2, + V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2, BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_1) | BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2) | BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1) | @@ -1415,10 +1370,7 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v0[] = { BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1) | BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5) | BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2), + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2), V4L2_MPEG_VIDEO_HEVC_LEVEL_5, V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, HFI_PROP_LEVEL, @@ -1426,7 +1378,7 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v0[] = { {LEVEL, DEC, H264, V4L2_MPEG_VIDEO_H264_LEVEL_1_0, - V4L2_MPEG_VIDEO_H264_LEVEL_6_2, + V4L2_MPEG_VIDEO_H264_LEVEL_6_0, BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_0) | BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1B) | BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_1) | @@ -1444,17 +1396,15 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v0[] = { BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_0) | BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_1) | BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_2), - V4L2_MPEG_VIDEO_H264_LEVEL_6_1, + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_0), + V4L2_MPEG_VIDEO_H264_LEVEL_6_0, V4L2_CID_MPEG_VIDEO_H264_LEVEL, HFI_PROP_LEVEL, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, {LEVEL, DEC, HEVC | HEIC, V4L2_MPEG_VIDEO_HEVC_LEVEL_1, - V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2, + V4L2_MPEG_VIDEO_HEVC_LEVEL_6, BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_1) | BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2) | BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1) | @@ -1465,17 +1415,15 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v0[] = { BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5) | BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1) | BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1)| - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2), - V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1, + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6), + V4L2_MPEG_VIDEO_HEVC_LEVEL_6, V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, HFI_PROP_LEVEL, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, {LEVEL, DEC, VP9, V4L2_MPEG_VIDEO_VP9_LEVEL_1_0, - V4L2_MPEG_VIDEO_VP9_LEVEL_6_0, + V4L2_MPEG_VIDEO_VP9_LEVEL_5_2, BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_1_0) | BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_1_1) | BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_2_0) | @@ -1486,16 +1434,15 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v0[] = { BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_4_1) | BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_0) | BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_1) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_2) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_6_0), - V4L2_MPEG_VIDEO_VP9_LEVEL_6_0, + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_2), + V4L2_MPEG_VIDEO_VP9_LEVEL_5_2, V4L2_CID_MPEG_VIDEO_VP9_LEVEL, HFI_PROP_LEVEL, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, {LEVEL, DEC, AV1, V4L2_MPEG_VIDC_AV1_LEVEL_2_0, - V4L2_MPEG_VIDC_AV1_LEVEL_6_1, + V4L2_MPEG_VIDC_AV1_LEVEL_5_3, BIT(V4L2_MPEG_VIDC_AV1_LEVEL_2_0) | BIT(V4L2_MPEG_VIDC_AV1_LEVEL_2_1) | BIT(V4L2_MPEG_VIDC_AV1_LEVEL_2_2) | @@ -1511,10 +1458,8 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v0[] = { BIT(V4L2_MPEG_VIDC_AV1_LEVEL_5_0) | BIT(V4L2_MPEG_VIDC_AV1_LEVEL_5_1) | BIT(V4L2_MPEG_VIDC_AV1_LEVEL_5_2) | - BIT(V4L2_MPEG_VIDC_AV1_LEVEL_5_3) | - BIT(V4L2_MPEG_VIDC_AV1_LEVEL_6_0) | - BIT(V4L2_MPEG_VIDC_AV1_LEVEL_6_1), - V4L2_MPEG_VIDC_AV1_LEVEL_6_1, + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_5_3), + V4L2_MPEG_VIDC_AV1_LEVEL_5_3, V4L2_CID_MPEG_VIDC_AV1_LEVEL, HFI_PROP_LEVEL, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, @@ -1656,43 +1601,43 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v0[] = { HFI_PROP_DECODE_ORDER_OUTPUT, CAP_FLAG_INPUT_PORT}, - {INPUT_BUF_HOST_MAX_COUNT, ENC | DEC, CODECS_ALL, + {INPUT_BUF_HOST_MAX_COUNT, ENC | DEC, CODECS_ALL_V0, DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT, 1, DEFAULT_MAX_HOST_BUF_COUNT, 0, HFI_PROP_BUFFER_HOST_MAX_COUNT, CAP_FLAG_INPUT_PORT}, - {OUTPUT_BUF_HOST_MAX_COUNT, ENC | DEC, CODECS_ALL, + {OUTPUT_BUF_HOST_MAX_COUNT, ENC | DEC, CODECS_ALL_V0, DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT, 1, DEFAULT_MAX_HOST_BUF_COUNT, 0, HFI_PROP_BUFFER_HOST_MAX_COUNT, CAP_FLAG_OUTPUT_PORT}, - {CONCEAL_COLOR_8BIT, DEC, CODECS_ALL, 0x0, 0xff3fcff, 1, + {CONCEAL_COLOR_8BIT, DEC, CODECS_ALL_V0, 0x0, 0xff3fcff, 1, DEFAULT_VIDEO_CONCEAL_COLOR_BLACK, V4L2_CID_MPEG_VIDEO_MUTE_YUV, HFI_PROP_CONCEAL_COLOR_8BIT, CAP_FLAG_INPUT_PORT}, - {CONCEAL_COLOR_10BIT, DEC, CODECS_ALL, 0x0, 0x3fffffff, 1, + {CONCEAL_COLOR_10BIT, DEC, CODECS_ALL_V0, 0x0, 0x3fffffff, 1, DEFAULT_VIDEO_CONCEAL_COLOR_BLACK, V4L2_CID_MPEG_VIDEO_MUTE_YUV, HFI_PROP_CONCEAL_COLOR_10BIT, CAP_FLAG_INPUT_PORT}, - {STAGE, DEC|ENC, CODECS_ALL, + {STAGE, DEC|ENC, CODECS_ALL_V0, MSM_VIDC_STAGE_1, MSM_VIDC_STAGE_2, 1, MSM_VIDC_STAGE_2, 0, HFI_PROP_STAGE}, - {PIPE, DEC|ENC, CODECS_ALL, + {PIPE, DEC|ENC, CODECS_ALL_V0, MSM_VIDC_PIPE_1, - MSM_VIDC_PIPE_4, 1, - MSM_VIDC_PIPE_4, + MSM_VIDC_PIPE_2, 1, + MSM_VIDC_PIPE_2, 0, HFI_PROP_PIPE}, @@ -1712,7 +1657,7 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v0[] = { HFI_PROP_MAX_NUM_REORDER_FRAMES, CAP_FLAG_VOLATILE}, - {QUALITY_MODE, ENC, CODECS_ALL, + {QUALITY_MODE, ENC, CODECS_ALL_V0, MSM_VIDC_MAX_QUALITY_MODE, MSM_VIDC_POWER_SAVE_MODE, 1, MSM_VIDC_POWER_SAVE_MODE}, @@ -1724,7 +1669,7 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v0[] = { HFI_PROP_CODED_FRAMES, CAP_FLAG_VOLATILE}, - {BIT_DEPTH, DEC, CODECS_ALL, BIT_DEPTH_8, BIT_DEPTH_10, 1, BIT_DEPTH_8, + {BIT_DEPTH, DEC, CODECS_ALL_V0, BIT_DEPTH_8, BIT_DEPTH_10, 1, BIT_DEPTH_8, 0, HFI_PROP_LUMA_CHROMA_BIT_DEPTH}, @@ -1732,52 +1677,52 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v0[] = { V4L2_CID_MPEG_VIDC_CODEC_CONFIG, 0, CAP_FLAG_DYNAMIC_ALLOWED}, - {BITSTREAM_SIZE_OVERWRITE, DEC, CODECS_ALL, 0, INT_MAX, 1, 0, + {BITSTREAM_SIZE_OVERWRITE, DEC, CODECS_ALL_V0, 0, INT_MAX, 1, 0, V4L2_CID_MPEG_VIDC_MIN_BITSTREAM_SIZE_OVERWRITE}, - {THUMBNAIL_MODE, DEC, CODECS_ALL, + {THUMBNAIL_MODE, DEC, CODECS_ALL_V0, 0, 1, 1, 0, V4L2_CID_MPEG_VIDC_THUMBNAIL_MODE, HFI_PROP_THUMBNAIL_MODE, CAP_FLAG_INPUT_PORT}, - {DEFAULT_HEADER, DEC, CODECS_ALL, + {DEFAULT_HEADER, DEC, CODECS_ALL_V0, 0, 1, 1, 0, 0, HFI_PROP_DEC_DEFAULT_HEADER}, - {RAP_FRAME, DEC, CODECS_ALL, + {RAP_FRAME, DEC, CODECS_ALL_V0, 0, 1, 1, 1, 0, HFI_PROP_DEC_START_FROM_RAP_FRAME, CAP_FLAG_INPUT_PORT}, - {SEQ_CHANGE_AT_SYNC_FRAME, DEC, CODECS_ALL, + {SEQ_CHANGE_AT_SYNC_FRAME, DEC, CODECS_ALL_V0, 0, 1, 1, 1, 0, HFI_PROP_SEQ_CHANGE_AT_SYNC_FRAME, CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - {PRIORITY, DEC|ENC, CODECS_ALL, + {PRIORITY, DEC|ENC, CODECS_ALL_V0, 0, 4, 1, 4, V4L2_CID_MPEG_VIDC_PRIORITY, HFI_PROP_SESSION_PRIORITY, CAP_FLAG_DYNAMIC_ALLOWED}, - {FIRMWARE_PRIORITY_OFFSET, DEC | ENC, CODECS_ALL, + {FIRMWARE_PRIORITY_OFFSET, DEC | ENC, CODECS_ALL_V0, 1, 1, 1, 1}, - {CRITICAL_PRIORITY, ENC, CODECS_ALL, + {CRITICAL_PRIORITY, ENC, CODECS_ALL_V0, 0, 1, 1, 0, V4L2_CID_MPEG_VIDC_CRITICAL_PRIORITY}, - {RESERVE_DURATION, ENC, CODECS_ALL, + {RESERVE_DURATION, ENC, CODECS_ALL_V0, 0, INT_MAX, 1, 0, V4L2_CID_MPEG_VIDC_RESERVE_DURATION, HFI_CMD_RESERVE, CAP_FLAG_DYNAMIC_ALLOWED}, - {ENC_IP_CR, ENC, CODECS_ALL, + {ENC_IP_CR, ENC, CODECS_ALL_V0, 0, S32_MAX, 1, 0, V4L2_CID_MPEG_VIDC_ENC_INPUT_COMPRESSION_RATIO, 0, CAP_FLAG_DYNAMIC_ALLOWED}, @@ -1799,7 +1744,7 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v0[] = { HFI_PROP_AV1_DRAP_CONFIG, CAP_FLAG_INPUT_PORT}, - {LAST_FLAG_EVENT_ENABLE, DEC|ENC, CODECS_ALL, + {LAST_FLAG_EVENT_ENABLE, DEC|ENC, CODECS_ALL_V0, 0, 1, 1, 0, V4L2_CID_MPEG_VIDC_LAST_FLAG_EVENT_ENABLE}, @@ -1835,7 +1780,7 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v0[] = { HFI_PROP_LTR_MARK_USE_DETAILS, CAP_FLAG_BITMASK | CAP_FLAG_META}, - {META_SEQ_HDR_NAL, ENC, CODECS_ALL, + {META_SEQ_HDR_NAL, ENC, CODECS_ALL_V0, MSM_VIDC_META_DISABLE, MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, 0, MSM_VIDC_META_DISABLE, @@ -1843,7 +1788,7 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v0[] = { HFI_PROP_METADATA_SEQ_HEADER_NAL, CAP_FLAG_BITMASK | CAP_FLAG_META}, - {META_DPB_MISR, DEC, CODECS_ALL, + {META_DPB_MISR, DEC, CODECS_ALL_V0, MSM_VIDC_META_DISABLE, MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, 0, MSM_VIDC_META_DISABLE, @@ -1851,7 +1796,7 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v0[] = { HFI_PROP_DPB_LUMA_CHROMA_MISR, CAP_FLAG_BITMASK | CAP_FLAG_META}, - {META_OPB_MISR, DEC, CODECS_ALL, + {META_OPB_MISR, DEC, CODECS_ALL_V0, MSM_VIDC_META_DISABLE, MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, 0, MSM_VIDC_META_DISABLE, @@ -1867,7 +1812,7 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v0[] = { HFI_PROP_INTERLACE_INFO, CAP_FLAG_BITMASK | CAP_FLAG_META}, - {META_TIMESTAMP, DEC | ENC, CODECS_ALL, + {META_TIMESTAMP, DEC | ENC, CODECS_ALL_V0, MSM_VIDC_META_DISABLE, MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, 0, MSM_VIDC_META_DISABLE, @@ -1875,7 +1820,7 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v0[] = { HFI_PROP_TIMESTAMP, CAP_FLAG_BITMASK | CAP_FLAG_META}, - {META_CONCEALED_MB_CNT, DEC, CODECS_ALL, + {META_CONCEALED_MB_CNT, DEC, CODECS_ALL_V0, MSM_VIDC_META_DISABLE, MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, 0, MSM_VIDC_META_DISABLE, @@ -1907,7 +1852,7 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v0[] = { HFI_PROP_TRANSCODING_STAT_INFO, CAP_FLAG_BITMASK | CAP_FLAG_META}, - {META_PICTURE_TYPE, DEC, CODECS_ALL, + {META_PICTURE_TYPE, DEC, CODECS_ALL_V0, MSM_VIDC_META_DISABLE, MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_INPUT, 0, MSM_VIDC_META_DISABLE, @@ -1994,7 +1939,7 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v0[] = { HFI_PROP_EVA_STAT_INFO, CAP_FLAG_BITMASK | CAP_FLAG_META}, - {META_BUF_TAG, ENC, CODECS_ALL, + {META_BUF_TAG, ENC, CODECS_ALL_V0, MSM_VIDC_META_DISABLE, MSM_VIDC_META_ENABLE | MSM_VIDC_META_TX_INPUT | MSM_VIDC_META_RX_OUTPUT, @@ -2007,7 +1952,7 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v0[] = { * when fence enabled, client needs output buffer_tag * in input metadata buffer done. */ - {META_BUF_TAG, DEC, CODECS_ALL, + {META_BUF_TAG, DEC, CODECS_ALL_V0, MSM_VIDC_META_DISABLE, MSM_VIDC_META_ENABLE | MSM_VIDC_META_TX_INPUT | MSM_VIDC_META_TX_OUTPUT | MSM_VIDC_META_RX_INPUT | @@ -2017,7 +1962,7 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v0[] = { HFI_PROP_BUFFER_TAG, CAP_FLAG_BITMASK | CAP_FLAG_META | CAP_FLAG_DYNAMIC_ALLOWED}, - {META_DPB_TAG_LIST, DEC, CODECS_ALL, + {META_DPB_TAG_LIST, DEC, CODECS_ALL_V0, MSM_VIDC_META_DISABLE, MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_INPUT, 0, MSM_VIDC_META_DISABLE, @@ -2033,7 +1978,7 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v0[] = { HFI_PROP_SUBFRAME_OUTPUT, CAP_FLAG_BITMASK | CAP_FLAG_META}, - {META_SUBFRAME_OUTPUT, DEC, CODECS_ALL, + {META_SUBFRAME_OUTPUT, DEC, CODECS_ALL_V0, MSM_VIDC_META_DISABLE, MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, 0, MSM_VIDC_META_DISABLE, @@ -2041,7 +1986,7 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v0[] = { HFI_PROP_SUBFRAME_OUTPUT, CAP_FLAG_BITMASK | CAP_FLAG_META}, - {META_ENC_QP_METADATA, ENC, CODECS_ALL, + {META_ENC_QP_METADATA, ENC, CODECS_ALL_V0, MSM_VIDC_META_DISABLE, MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, 0, MSM_VIDC_META_DISABLE, @@ -2065,7 +2010,7 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v0[] = { HFI_PROP_ROI_AS_SALIENCY_INFO, CAP_FLAG_INPUT_PORT | CAP_FLAG_BITMASK | CAP_FLAG_META}, - {META_DEC_QP_METADATA, DEC, CODECS_ALL, + {META_DEC_QP_METADATA, DEC, CODECS_ALL_V0, MSM_VIDC_META_DISABLE, MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, 0, MSM_VIDC_META_DISABLE, @@ -2101,7 +2046,7 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v0[] = { HFI_PROP_ENABLE_SLICE_DELIVERY, CAP_FLAG_OUTPUT_PORT}, - {SIGNAL_COLOR_INFO, ENC, CODECS_ALL, + {SIGNAL_COLOR_INFO, ENC, CODECS_ALL_V0, 0, INT_MAX, 1, 0, V4L2_CID_MPEG_VIDC_SIGNAL_COLOR_INFO, HFI_PROP_SIGNAL_COLOR_INFO, @@ -2129,23 +2074,23 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_clif {PIX_FMTS, DEC, HEVC | HEIC, {PROFILE}}, - {FRAME_RATE, ENC, CODECS_ALL, + {FRAME_RATE, ENC, CODECS_ALL_V0, {0}, NULL, msm_vidc_set_q16}, - {FRAME_RATE, DEC, CODECS_ALL, + {FRAME_RATE, DEC, CODECS_ALL_V0, {0}, msm_vidc_adjust_dec_frame_rate}, - {OPERATING_RATE, DEC, CODECS_ALL, + {OPERATING_RATE, DEC, CODECS_ALL_V0, {0}, msm_vidc_adjust_dec_operating_rate}, - {ENC_RING_BUFFER_COUNT, ENC, CODECS_ALL, + {ENC_RING_BUFFER_COUNT, ENC, CODECS_ALL_V0, {0}, NULL, - msm_vidc_set_ring_buffer_count_cliffs}, + NULL}, {SECURE_MODE, ENC | DEC, H264 | HEVC | VP9 | AV1, {0}, @@ -2182,17 +2127,17 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_clif NULL, msm_vidc_set_u32}, - {HFLIP, ENC, CODECS_ALL, + {HFLIP, ENC, CODECS_ALL_V0, {0}, NULL, msm_vidc_set_flip}, - {VFLIP, ENC, CODECS_ALL, + {VFLIP, ENC, CODECS_ALL_V0, {0}, NULL, msm_vidc_set_flip}, - {ROTATION, ENC, CODECS_ALL, + {ROTATION, ENC, CODECS_ALL_V0, {0}, NULL, msm_vidc_set_rotation}, @@ -2207,12 +2152,12 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_clif NULL, NULL}, - {HEADER_MODE, ENC, CODECS_ALL, + {HEADER_MODE, ENC, CODECS_ALL_V0, {0}, NULL, msm_vidc_set_header_mode}, - {WITHOUT_STARTCODE, ENC, CODECS_ALL, + {WITHOUT_STARTCODE, ENC, CODECS_ALL_V0, {0}, NULL, msm_vidc_set_nal_length}, @@ -2265,7 +2210,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_clif NULL, msm_vidc_set_constant_quality}, - {GOP_SIZE, ENC, CODECS_ALL, + {GOP_SIZE, ENC, CODECS_ALL_V0, {ALL_INTRA}, msm_vidc_adjust_gop_size, msm_vidc_set_gop_size}, @@ -2295,12 +2240,12 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_clif msm_vidc_adjust_blur_resolution, msm_vidc_set_blur_resolution}, - {CSC, ENC, CODECS_ALL, + {CSC, ENC, CODECS_ALL_V0, {0}, msm_vidc_adjust_csc, msm_vidc_set_u32}, - {CSC_CUSTOM_MATRIX, ENC, CODECS_ALL, + {CSC_CUSTOM_MATRIX, ENC, CODECS_ALL_V0, {0}, NULL, msm_vidc_set_csc_custom_matrix}, @@ -2350,7 +2295,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_clif NULL, msm_vidc_set_u32}, - {TIME_DELTA_BASED_RC, ENC, CODECS_ALL, + {TIME_DELTA_BASED_RC, ENC, CODECS_ALL_V0, {0}, msm_vidc_adjust_delta_based_rc, msm_vidc_set_u32}, @@ -2511,12 +2456,12 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_clif NULL, msm_vidc_set_u32_enum}, - {LEVEL, DEC, CODECS_ALL, + {LEVEL, DEC, CODECS_ALL_V0, {0}, NULL, msm_vidc_set_u32_enum}, - {LEVEL, ENC, CODECS_ALL, + {LEVEL, ENC, CODECS_ALL_V0, {0}, NULL, msm_vidc_set_level}, @@ -2531,7 +2476,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_clif NULL, msm_vidc_set_u32_enum}, - {LF_MODE, ENC, CODECS_ALL, + {LF_MODE, ENC, CODECS_ALL_V0, {0}, NULL, msm_vidc_set_deblock_mode}, @@ -2571,7 +2516,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_clif msm_vidc_adjust_output_order, msm_vidc_set_u32}, - {INPUT_BUF_HOST_MAX_COUNT, ENC | DEC, CODECS_ALL, + {INPUT_BUF_HOST_MAX_COUNT, ENC | DEC, CODECS_ALL_V0, {0}, msm_vidc_adjust_input_buf_host_max_count, msm_vidc_set_u32}, @@ -2581,7 +2526,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_clif msm_vidc_adjust_input_buf_host_max_count, msm_vidc_set_u32}, - {OUTPUT_BUF_HOST_MAX_COUNT, ENC | DEC, CODECS_ALL, + {OUTPUT_BUF_HOST_MAX_COUNT, ENC | DEC, CODECS_ALL_V0, {0}, msm_vidc_adjust_output_buf_host_max_count, msm_vidc_set_u32}, @@ -2591,17 +2536,17 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_clif msm_vidc_adjust_output_buf_host_max_count, msm_vidc_set_u32}, - {CONCEAL_COLOR_8BIT, DEC, CODECS_ALL, + {CONCEAL_COLOR_8BIT, DEC, CODECS_ALL_V0, {0}, NULL, msm_vidc_set_u32_packed}, - {CONCEAL_COLOR_10BIT, DEC, CODECS_ALL, + {CONCEAL_COLOR_10BIT, DEC, CODECS_ALL_V0, {0}, NULL, msm_vidc_set_u32_packed}, - {STAGE, ENC | DEC, CODECS_ALL, + {STAGE, ENC | DEC, CODECS_ALL_V0, {0}, NULL, msm_vidc_set_stage}, @@ -2616,7 +2561,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_clif NULL, msm_vidc_set_stage}, - {PIPE, DEC|ENC, CODECS_ALL, + {PIPE, DEC|ENC, CODECS_ALL_V0, {0}, NULL, msm_vidc_set_pipe}, @@ -2631,27 +2576,27 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_clif NULL, msm_vidc_set_u32}, - {RAP_FRAME, DEC, CODECS_ALL, + {RAP_FRAME, DEC, CODECS_ALL_V0, {0}, NULL, msm_vidc_set_u32}, - {PRIORITY, DEC|ENC, CODECS_ALL, + {PRIORITY, DEC|ENC, CODECS_ALL_V0, {0}, msm_vidc_adjust_session_priority, msm_vidc_set_session_priority}, - {FIRMWARE_PRIORITY_OFFSET, DEC | ENC, CODECS_ALL, + {FIRMWARE_PRIORITY_OFFSET, DEC | ENC, CODECS_ALL_V0, {0}, NULL, NULL}, - {CRITICAL_PRIORITY, ENC, CODECS_ALL, + {CRITICAL_PRIORITY, ENC, CODECS_ALL_V0, {0}, NULL, NULL}, - {RESERVE_DURATION, ENC, CODECS_ALL, + {RESERVE_DURATION, ENC, CODECS_ALL_V0, {0}, NULL, msm_vidc_set_reserve_duration}, @@ -2686,12 +2631,12 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_clif msm_vidc_adjust_delivery_mode, msm_vidc_set_u32}, - {VUI_TIMING_INFO, ENC, CODECS_ALL, + {VUI_TIMING_INFO, ENC, CODECS_ALL_V0, {0}, NULL, msm_vidc_set_vui_timing_info}, - {SIGNAL_COLOR_INFO, ENC, CODECS_ALL, + {SIGNAL_COLOR_INFO, ENC, CODECS_ALL_V0, {0}, NULL, msm_vidc_set_signal_color_info}, @@ -2724,47 +2669,43 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v1[] = { * hfi_id, * flags} */ - {DRV_VERSION, DEC|ENC, CODECS_ALL, + {DRV_VERSION, DEC|ENC, CODECS_ALL_V1, 0, INT_MAX, 1, DRIVER_VERSION, V4L2_CID_MPEG_VIDC_DRIVER_VERSION}, - {FRAME_WIDTH, DEC, CODECS_ALL, 96, 8192, 1, 1920}, + {FRAME_WIDTH, DEC, CODECS_ALL_V1, 96, 4096, 1, 1920}, - {FRAME_WIDTH, DEC, VP9, 96, 4096, 1, 1920}, + {FRAME_WIDTH, ENC, CODECS_ALL_V1, 128, 4096, 1, 1920}, - {FRAME_WIDTH, ENC, CODECS_ALL, 128, 8192, 1, 1920}, - - {FRAME_WIDTH, ENC, HEVC, 96, 8192, 1, 1920}, + {FRAME_WIDTH, ENC, HEVC, 96, 4096, 1, 1920}, {FRAME_WIDTH, ENC, HEIC, 128, 16384, 1, 16384}, - {LOSSLESS_FRAME_WIDTH, ENC, CODECS_ALL, 128, 4096, 1, 1920}, + {LOSSLESS_FRAME_WIDTH, ENC, CODECS_ALL_V1, 128, 4096, 1, 1920}, {LOSSLESS_FRAME_WIDTH, ENC, HEVC, 96, 4096, 1, 1920}, - {SECURE_FRAME_WIDTH, DEC, CODECS_ALL, 96, 4096, 1, 1920}, + {SECURE_FRAME_WIDTH, DEC, CODECS_ALL_V1, 96, 4096, 1, 1920}, - {SECURE_FRAME_WIDTH, ENC, CODECS_ALL, 128, 4096, 1, 1920}, + {SECURE_FRAME_WIDTH, ENC, CODECS_ALL_V1, 128, 4096, 1, 1920}, {SECURE_FRAME_WIDTH, ENC, HEVC, 96, 4096, 1, 1920}, - {FRAME_HEIGHT, DEC, CODECS_ALL, 96, 8192, 1, 1080}, + {FRAME_HEIGHT, DEC, CODECS_ALL_V1, 96, 4096, 1, 1080}, - {FRAME_HEIGHT, DEC, VP9, 96, 4096, 1, 1080}, + {FRAME_HEIGHT, ENC, CODECS_ALL_V1, 128, 4096, 1, 1080}, - {FRAME_HEIGHT, ENC, CODECS_ALL, 128, 8192, 1, 1080}, - - {FRAME_HEIGHT, ENC, HEVC, 96, 8192, 1, 1080}, + {FRAME_HEIGHT, ENC, HEVC, 96, 4096, 1, 1080}, {FRAME_HEIGHT, ENC, HEIC, 128, 16384, 1, 16384}, - {LOSSLESS_FRAME_HEIGHT, ENC, CODECS_ALL, 128, 4096, 1, 1080}, + {LOSSLESS_FRAME_HEIGHT, ENC, CODECS_ALL_V1, 128, 4096, 1, 1080}, {LOSSLESS_FRAME_HEIGHT, ENC, HEVC, 96, 4096, 1, 1080}, - {SECURE_FRAME_HEIGHT, DEC, CODECS_ALL, 96, 4096, 1, 1080}, + {SECURE_FRAME_HEIGHT, DEC, CODECS_ALL_V1, 96, 4096, 1, 1080}, - {SECURE_FRAME_HEIGHT, ENC, CODECS_ALL, 128, 4096, 1, 1080}, + {SECURE_FRAME_HEIGHT, ENC, CODECS_ALL_V1, 128, 4096, 1, 1080}, {SECURE_FRAME_HEIGHT, ENC, HEVC, 96, 4096, 1, 1080}, @@ -2774,7 +2715,7 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v1[] = { MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C, MSM_VIDC_FMT_NV12C}, - {PIX_FMTS, ENC | DEC, HEVC | VP9 | AV1, + {PIX_FMTS, ENC | DEC, HEVC|VP9, MSM_VIDC_FMT_NV12, MSM_VIDC_FMT_TP10C, MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C | @@ -2794,7 +2735,7 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v1[] = { MSM_VIDC_FMT_P010 | MSM_VIDC_FMT_TP10C, MSM_VIDC_FMT_NV12C}, - {MIN_BUFFERS_INPUT, ENC | DEC, CODECS_ALL, 0, 64, 1, 4, + {MIN_BUFFERS_INPUT, ENC | DEC, CODECS_ALL_V1, 0, 64, 1, 4, V4L2_CID_MIN_BUFFERS_FOR_OUTPUT, 0, CAP_FLAG_VOLATILE}, @@ -2804,24 +2745,22 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v1[] = { 0, CAP_FLAG_VOLATILE}, - {MIN_BUFFERS_OUTPUT, ENC | DEC, CODECS_ALL, + {MIN_BUFFERS_OUTPUT, ENC | DEC, CODECS_ALL_V1, 0, 64, 1, 4, V4L2_CID_MIN_BUFFERS_FOR_CAPTURE, HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_VOLATILE}, - /* (8192 * 4320) / 256 */ - {MBPF, ENC, CODECS_ALL, 64, 138240, 1, 138240}, + /* (4096 * 2304) / 256 */ + {MBPF, ENC, CODECS_ALL_V1, 64, 36864, 1, 36864}, - {MBPF, ENC, HEVC, 36, 138240, 1, 138240}, + {MBPF, ENC, HEVC, 36, 36864, 1, 36864}, /* ((16384x16384)/256) */ {MBPF, ENC, HEIC, 36, 1048576, 1, 1048576}, - {MBPF, DEC, CODECS_ALL, 36, 138240, 1, 138240}, - /* (4096 * 2304) / 256 */ - {MBPF, DEC, VP9, 36, 36864, 1, 36864}, + {MBPF, DEC, CODECS_ALL_V1, 36, 36864, 1, 36864}, /* ((8192x8192)/256) */ {MBPF, DEC, HEIC, 64, 262144, 1, 262144 }, @@ -2830,17 +2769,22 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v1[] = { {LOSSLESS_MBPF, ENC, H264 | HEVC, 64, 36864, 1, 36864}, /* Batch Mode Decode */ - /* TODO: update with new values based on updated voltage corner */ - {BATCH_MBPF, DEC, H264 | HEVC | VP9 | AV1, 64, 34816, 1, 34816}, + /* BATCH_MBPF + 2 is done for chipsets other than waipio + * due to timeline constraints since msm_vidc_allow_decode_batch + * has checks to allow batching for less than BATCH_MBPF. + * Same applies for BATCH_FPS. + */ + /* (1920 * 1088) / 256 */ + {BATCH_MBPF, DEC, H264 | HEVC | VP9, 64, 8162, 1, 8162}, /* (4096 * 2304) / 256 */ - {BATCH_FPS, DEC, H264 | HEVC | VP9 | AV1, 1, 120, 1, 120}, + {BATCH_FPS, DEC, H264 | HEVC | VP9, 1, 61, 1, 61}, - {SECURE_MBPF, ENC | DEC, H264 | HEVC | VP9 | AV1, 64, 36864, 1, 36864}, + {SECURE_MBPF, ENC | DEC, H264 | HEVC | VP9, 64, 36864, 1, 36864}, {SECURE_MBPF, ENC, HEVC, 36, 36864, 1, 36864}, - {FRAME_RATE, ENC, CODECS_ALL, + {FRAME_RATE, ENC, CODECS_ALL_V1, (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), 1, (DEFAULT_FPS << 16), 0, @@ -2854,8 +2798,8 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v1[] = { HFI_PROP_FRAME_RATE, CAP_FLAG_OUTPUT_PORT}, - {FRAME_RATE, DEC, CODECS_ALL, - (MINIMUM_FPS << 16), (MAXIMUM_DEC_FPS << 16), + {FRAME_RATE, DEC, CODECS_ALL_V1, + (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), 1, (DEFAULT_FPS << 16), V4L2_CID_MPEG_VIDC_FRAME_RATE, 0, @@ -2870,11 +2814,11 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v1[] = { CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - {OPERATING_RATE, ENC, CODECS_ALL, + {OPERATING_RATE, ENC, CODECS_ALL_V1, (MINIMUM_FPS << 16), INT_MAX, 1, (DEFAULT_FPS << 16)}, - {OPERATING_RATE, DEC, CODECS_ALL, + {OPERATING_RATE, DEC, CODECS_ALL_V1, (MINIMUM_FPS << 16), INT_MAX, 1, (DEFAULT_FPS << 16), V4L2_CID_MPEG_VIDC_OPERATING_RATE, @@ -2882,44 +2826,44 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v1[] = { CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - {INPUT_RATE, ENC | DEC, CODECS_ALL, + {INPUT_RATE, ENC | DEC, CODECS_ALL_V1, (MINIMUM_FPS << 16), INT_MAX, 1, (DEFAULT_FPS << 16)}, - {TIMESTAMP_RATE, ENC | DEC, CODECS_ALL, + {TIMESTAMP_RATE, ENC | DEC, CODECS_ALL_V1, (MINIMUM_FPS << 16), INT_MAX, 1, (DEFAULT_FPS << 16)}, {SCALE_FACTOR, ENC, H264 | HEVC, 1, 8, 1, 8}, - {MB_CYCLES_VSP, ENC, CODECS_ALL, 25, 25, 1, 25}, + {MB_CYCLES_VSP, ENC, CODECS_ALL_V1, 25, 25, 1, 25}, - {MB_CYCLES_VSP, DEC, CODECS_ALL, 25, 25, 1, 25}, + {MB_CYCLES_VSP, DEC, CODECS_ALL_V1, 25, 25, 1, 25}, - {MB_CYCLES_VSP, DEC, VP9 | AV1, 60, 60, 1, 60}, + {MB_CYCLES_VSP, DEC, VP9, 60, 60, 1, 60}, - {MB_CYCLES_VPP, ENC, CODECS_ALL, 675, 675, 1, 675}, + {MB_CYCLES_VPP, ENC, CODECS_ALL_V1, 675, 675, 1, 675}, - {MB_CYCLES_VPP, DEC, CODECS_ALL, 200, 200, 1, 200}, + {MB_CYCLES_VPP, DEC, CODECS_ALL_V1, 200, 200, 1, 200}, - {MB_CYCLES_LP, ENC, CODECS_ALL, 320, 320, 1, 320}, + {MB_CYCLES_LP, ENC, CODECS_ALL_V1, 320, 320, 1, 320}, - {MB_CYCLES_LP, DEC, CODECS_ALL, 200, 200, 1, 200}, + {MB_CYCLES_LP, DEC, CODECS_ALL_V1, 200, 200, 1, 200}, - {MB_CYCLES_FW, ENC | DEC, CODECS_ALL, 489583, 489583, 1, 489583}, + {MB_CYCLES_FW, ENC | DEC, CODECS_ALL_V1, 489583, 489583, 1, 489583}, - {MB_CYCLES_FW_VPP, ENC, CODECS_ALL, 48405, 48405, 1, 48405}, + {MB_CYCLES_FW_VPP, ENC, CODECS_ALL_V1, 48405, 48405, 1, 48405}, - {MB_CYCLES_FW_VPP, DEC, CODECS_ALL, 66234, 66234, 1, 66234}, + {MB_CYCLES_FW_VPP, DEC, CODECS_ALL_V1, 66234, 66234, 1, 66234}, - {ENC_RING_BUFFER_COUNT, ENC, CODECS_ALL, - 0, MAX_ENC_RING_BUF_COUNT, 1, 0}, + {ENC_RING_BUFFER_COUNT, ENC, CODECS_ALL_V1, + 0, 0, 1, 0}, - {CLIENT_ID, ENC | DEC, CODECS_ALL, + {CLIENT_ID, ENC | DEC, CODECS_ALL_V1, INVALID_CLIENT_ID, INT_MAX, 1, INVALID_CLIENT_ID, V4L2_CID_MPEG_VIDC_CLIENT_ID}, - {SECURE_MODE, ENC | DEC, H264 | HEVC | VP9 | AV1, + {SECURE_MODE, ENC | DEC, H264 | HEVC | VP9, 0, 1, 1, 0, V4L2_CID_MPEG_VIDC_SECURE, HFI_PROP_SECURE, @@ -2929,7 +2873,7 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v1[] = { * Client will enable V4L2_CID_MPEG_VIDC_METADATA_OUTBUF_FENCE * to get fence_id in input metadata buffer done. */ - {META_OUTBUF_FENCE, DEC, H264 | HEVC | VP9 | AV1, + {META_OUTBUF_FENCE, DEC, H264 | HEVC | VP9, MSM_VIDC_META_DISABLE, MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_INPUT, 0, MSM_VIDC_META_DISABLE, @@ -2942,20 +2886,20 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v1[] = { * and then client will do get_ctrl with FENCE_FD to get * fence_fd corresponding to client set fence_id. */ - {FENCE_ID, DEC, CODECS_ALL, + {FENCE_ID, DEC, CODECS_ALL_V1, 0, INT_MAX, 1, 0, V4L2_CID_MPEG_VIDC_SW_FENCE_ID, 0, CAP_FLAG_DYNAMIC_ALLOWED | CAP_FLAG_OUTPUT_PORT}, - {FENCE_FD, DEC, CODECS_ALL, + {FENCE_FD, DEC, CODECS_ALL_V1, INVALID_FD, INT_MAX, 1, INVALID_FD, V4L2_CID_MPEG_VIDC_SW_FENCE_FD, 0, CAP_FLAG_VOLATILE}, - /* Fence type for input buffer. Currently unused */ - {INBUF_FENCE_TYPE, DEC, H264 | HEVC | VP9 | AV1, + /* Fence type for input buffer. Currently unsed */ + {INBUF_FENCE_TYPE, DEC, H264 | HEVC | VP9, MSM_VIDC_FENCE_NONE, MSM_VIDC_FENCE_NONE, BIT(MSM_VIDC_FENCE_NONE), MSM_VIDC_FENCE_NONE, @@ -2963,7 +2907,7 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v1[] = { HFI_PROP_FENCE_TYPE, CAP_FLAG_MENU | CAP_FLAG_INPUT_PORT}, - {OUTBUF_FENCE_TYPE, DEC, H264 | HEVC | VP9 | AV1, + {OUTBUF_FENCE_TYPE, DEC, H264 | HEVC | VP9, MSM_VIDC_FENCE_NONE, MSM_VIDC_SYNX_V2_FENCE, BIT(MSM_VIDC_FENCE_NONE) | BIT(MSM_VIDC_SW_FENCE) | BIT(MSM_VIDC_SYNX_V2_FENCE), @@ -2972,8 +2916,8 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v1[] = { HFI_PROP_FENCE_TYPE, CAP_FLAG_MENU | CAP_FLAG_OUTPUT_PORT}, - /* Fence direction for input buffer. Currently unused */ - {INBUF_FENCE_DIRECTION, DEC, H264 | HEVC | VP9 | AV1, + /* Fence direction for input buffer. Currently unsed */ + {INBUF_FENCE_DIRECTION, DEC, H264 | HEVC | VP9, MSM_VIDC_FENCE_DIR_NONE, MSM_VIDC_FENCE_DIR_NONE, BIT(MSM_VIDC_FENCE_DIR_NONE), MSM_VIDC_FENCE_DIR_NONE, @@ -2981,7 +2925,7 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v1[] = { HFI_PROP_FENCE_DIRECTION, CAP_FLAG_MENU | CAP_FLAG_INPUT_PORT}, - {OUTBUF_FENCE_DIRECTION, DEC, H264 | HEVC | VP9 | AV1, + {OUTBUF_FENCE_DIRECTION, DEC, H264 | HEVC | VP9, MSM_VIDC_FENCE_DIR_NONE, MSM_VIDC_FENCE_DIR_RX, BIT(MSM_VIDC_FENCE_DIR_NONE) | BIT(MSM_VIDC_FENCE_DIR_TX) | BIT(MSM_VIDC_FENCE_DIR_RX), @@ -2990,7 +2934,7 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v1[] = { HFI_PROP_FENCE_DIRECTION, CAP_FLAG_MENU | CAP_FLAG_OUTPUT_PORT}, - {FENCE_ERROR_DATA_CORRUPT, DEC, H264 | HEVC | VP9 | AV1, + {FENCE_ERROR_DATA_CORRUPT, DEC, H264 | HEVC | VP9, 0, 1, 1, 0, 0, HFI_PROP_FENCE_ERROR_DATA_CORRUPT}, @@ -2999,21 +2943,21 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v1[] = { 0, 1, 1, 0, V4L2_CID_MPEG_VIDC_TS_REORDER}, - {HFLIP, ENC, CODECS_ALL, + {HFLIP, ENC, CODECS_ALL_V1, 0, 1, 1, 0, V4L2_CID_HFLIP, HFI_PROP_FLIP, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - {VFLIP, ENC, CODECS_ALL, + {VFLIP, ENC, CODECS_ALL_V1, 0, 1, 1, 0, V4L2_CID_VFLIP, HFI_PROP_FLIP, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - {ROTATION, ENC, CODECS_ALL, + {ROTATION, ENC, CODECS_ALL_V1, 0, 270, 90, 0, V4L2_CID_ROTATE, HFI_PROP_ROTATION, @@ -3024,7 +2968,7 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v1[] = { V4L2_CID_MPEG_VIDC_SUPERFRAME, 0, CAP_FLAG_DYNAMIC_ALLOWED}, - {SLICE_DECODE, DEC, H264 | HEVC | AV1, + {SLICE_DECODE, DEC, H264 | HEVC, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_DISABLE, 0, @@ -3032,7 +2976,7 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v1[] = { V4L2_CID_MPEG_VIDEO_DECODER_SLICE_INTERFACE, 0}, - {HEADER_MODE, ENC, CODECS_ALL, + {HEADER_MODE, ENC, CODECS_ALL_V1, V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE, V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME, BIT(V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE) | @@ -3042,11 +2986,11 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v1[] = { HFI_PROP_SEQ_HEADER_MODE, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - {PREPEND_SPSPPS_TO_IDR, ENC, CODECS_ALL, + {PREPEND_SPSPPS_TO_IDR, ENC, CODECS_ALL_V1, 0, 1, 1, 0, V4L2_CID_MPEG_VIDEO_PREPEND_SPSPPS_TO_IDR}, - {VUI_TIMING_INFO, ENC, CODECS_ALL, + {VUI_TIMING_INFO, ENC, CODECS_ALL_V1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, @@ -3054,7 +2998,7 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v1[] = { HFI_PROP_DISABLE_VUI_TIMING_INFO, CAP_FLAG_OUTPUT_PORT}, - {WITHOUT_STARTCODE, ENC, CODECS_ALL, + {WITHOUT_STARTCODE, ENC, CODECS_ALL_V1, 0, 1, 1, 0, V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE, HFI_PROP_NAL_LENGTH_FIELD, @@ -3063,10 +3007,10 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v1[] = { {WITHOUT_STARTCODE, DEC, AV1, 0, 0, 1, 0, V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE, - HFI_PROP_NAL_LENGTH_FIELD, + 0, CAP_FLAG_INPUT_PORT}, - {NAL_LENGTH_FIELD, ENC, CODECS_ALL, + {NAL_LENGTH_FIELD, ENC, CODECS_ALL_V1, V4L2_MPEG_VIDEO_HEVC_SIZE_0, V4L2_MPEG_VIDEO_HEVC_SIZE_4, BIT(V4L2_MPEG_VIDEO_HEVC_SIZE_0) | @@ -3089,7 +3033,7 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v1[] = { * Dec: there's no use of Bitrate cap */ {BIT_RATE, ENC, H264 | HEVC, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_BITRATE, HFI_PROP_TOTAL_BITRATE, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | @@ -3137,7 +3081,7 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v1[] = { {LOWLATENCY_MAX_BITRATE, ENC, H264 | HEVC, 0, 70000000, 1, 70000000}, - {NUM_COMV, DEC, CODECS_ALL, + {NUM_COMV, DEC, CODECS_ALL_V1, 0, INT_MAX, 1, 0}, {LOSSLESS, ENC, HEVC, @@ -3173,7 +3117,7 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v1[] = { CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - {GOP_SIZE, ENC, CODECS_ALL, + {GOP_SIZE, ENC, CODECS_ALL_V1, 0, INT_MAX, 1, 2 * DEFAULT_FPS - 1, V4L2_CID_MPEG_VIDEO_GOP_SIZE, HFI_PROP_MAX_GOP_FRAMES, @@ -3219,12 +3163,12 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v1[] = { CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - {CSC, ENC, CODECS_ALL, + {CSC, ENC, CODECS_ALL_V1, 0, 1, 1, 0, V4L2_CID_MPEG_VIDC_CSC, HFI_PROP_CSC}, - {CSC_CUSTOM_MATRIX, ENC, CODECS_ALL, + {CSC_CUSTOM_MATRIX, ENC, CODECS_ALL_V1, 0, 1, 1, 0, V4L2_CID_MPEG_VIDC_VIDEO_VPE_CSC_CUSTOM_MATRIX, HFI_PROP_CSC_MATRIX, @@ -3236,7 +3180,7 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v1[] = { 0, CAP_FLAG_NONE}, - {LOWLATENCY_MODE, DEC, H264 | HEVC | VP9 | AV1, + {LOWLATENCY_MODE, DEC, H264 | HEVC | VP9, 0, 1, 1, 0, V4L2_CID_MPEG_VIDC_LOWLATENCY_REQUEST, HFI_PROP_SEQ_CHANGE_AT_SYNC_FRAME, @@ -3340,7 +3284,7 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v1[] = { {PEAK_BITRATE, ENC, H264 | HEVC, /* default peak bitrate is 10% larger than avg bitrate */ - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_BITRATE_PEAK, HFI_PROP_TOTAL_PEAK_BITRATE, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | @@ -3506,90 +3450,84 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v1[] = { CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - {ENH_LAYER_COUNT, DEC, AV1, - 0, MAX_OP_POINT, 1, 0, - 0, - HFI_PROP_AV1_OP_POINT, - CAP_FLAG_INPUT_PORT}, - {L0_BR, ENC, H264, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L0_BR, HFI_PROP_BITRATE_LAYER1, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, {L0_BR, ENC, HEVC, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L0_BR, HFI_PROP_BITRATE_LAYER1, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, {L1_BR, ENC, H264, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L1_BR, HFI_PROP_BITRATE_LAYER2, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, {L1_BR, ENC, HEVC, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L1_BR, HFI_PROP_BITRATE_LAYER2, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, {L2_BR, ENC, H264, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L2_BR, HFI_PROP_BITRATE_LAYER3, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, {L2_BR, ENC, HEVC, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L2_BR, HFI_PROP_BITRATE_LAYER3, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, {L3_BR, ENC, H264, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L3_BR, HFI_PROP_BITRATE_LAYER4, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, {L3_BR, ENC, HEVC, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L3_BR, HFI_PROP_BITRATE_LAYER4, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, {L4_BR, ENC, H264, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L4_BR, HFI_PROP_BITRATE_LAYER5, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, {L4_BR, ENC, HEVC, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L4_BR, HFI_PROP_BITRATE_LAYER5, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, {L5_BR, ENC, H264, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L5_BR, HFI_PROP_BITRATE_LAYER6, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, {L5_BR, ENC, HEVC, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L5_BR, HFI_PROP_BITRATE_LAYER6, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | @@ -3605,7 +3543,7 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v1[] = { HFI_PROP_CABAC_SESSION, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - {ENTROPY_MODE, DEC, H264 | HEVC | VP9 | AV1, + {ENTROPY_MODE, DEC, H264 | HEVC | VP9, V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC, V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC) | @@ -3649,15 +3587,6 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v1[] = { HFI_PROP_PROFILE, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - {PROFILE, DEC, AV1, - V4L2_MPEG_VIDC_AV1_PROFILE_MAIN, - V4L2_MPEG_VIDC_AV1_PROFILE_MAIN, - BIT(V4L2_MPEG_VIDC_AV1_PROFILE_MAIN), - V4L2_MPEG_VIDC_AV1_PROFILE_MAIN, - V4L2_CID_MPEG_VIDC_AV1_PROFILE, - HFI_PROP_PROFILE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - {LEVEL, ENC, H264, V4L2_MPEG_VIDEO_H264_LEVEL_1_0, V4L2_MPEG_VIDEO_H264_LEVEL_6_0, @@ -3686,7 +3615,7 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v1[] = { {LEVEL, ENC, HEVC | HEIC, V4L2_MPEG_VIDEO_HEVC_LEVEL_1, - V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2, + V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2, BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_1) | BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2) | BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1) | @@ -3696,10 +3625,7 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v1[] = { BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1) | BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5) | BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2), + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2), V4L2_MPEG_VIDEO_HEVC_LEVEL_5, V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, HFI_PROP_LEVEL, @@ -3707,7 +3633,7 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v1[] = { {LEVEL, DEC, H264, V4L2_MPEG_VIDEO_H264_LEVEL_1_0, - V4L2_MPEG_VIDEO_H264_LEVEL_6_2, + V4L2_MPEG_VIDEO_H264_LEVEL_6_0, BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_0) | BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1B) | BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_1) | @@ -3725,17 +3651,15 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v1[] = { BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_0) | BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_1) | BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_2), - V4L2_MPEG_VIDEO_H264_LEVEL_6_1, + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_0), + V4L2_MPEG_VIDEO_H264_LEVEL_6_0, V4L2_CID_MPEG_VIDEO_H264_LEVEL, HFI_PROP_LEVEL, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, {LEVEL, DEC, HEVC | HEIC, V4L2_MPEG_VIDEO_HEVC_LEVEL_1, - V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2, + V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2, BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_1) | BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2) | BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1) | @@ -3745,18 +3669,15 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v1[] = { BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1) | BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5) | BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1)| - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2), - V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1, + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2), + V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2, V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, HFI_PROP_LEVEL, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, {LEVEL, DEC, VP9, V4L2_MPEG_VIDEO_VP9_LEVEL_1_0, - V4L2_MPEG_VIDEO_VP9_LEVEL_6_0, + V4L2_MPEG_VIDEO_VP9_LEVEL_5_2, BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_1_0) | BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_1_1) | BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_2_0) | @@ -3767,49 +3688,12 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v1[] = { BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_4_1) | BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_0) | BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_1) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_2) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_6_0), - V4L2_MPEG_VIDEO_VP9_LEVEL_6_0, + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_2), + V4L2_MPEG_VIDEO_VP9_LEVEL_5_2, V4L2_CID_MPEG_VIDEO_VP9_LEVEL, HFI_PROP_LEVEL, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - {LEVEL, DEC, AV1, - V4L2_MPEG_VIDC_AV1_LEVEL_2_0, - V4L2_MPEG_VIDC_AV1_LEVEL_6_1, - BIT(V4L2_MPEG_VIDC_AV1_LEVEL_2_0) | - BIT(V4L2_MPEG_VIDC_AV1_LEVEL_2_1) | - BIT(V4L2_MPEG_VIDC_AV1_LEVEL_2_2) | - BIT(V4L2_MPEG_VIDC_AV1_LEVEL_2_3) | - BIT(V4L2_MPEG_VIDC_AV1_LEVEL_3_0) | - BIT(V4L2_MPEG_VIDC_AV1_LEVEL_3_1) | - BIT(V4L2_MPEG_VIDC_AV1_LEVEL_3_2) | - BIT(V4L2_MPEG_VIDC_AV1_LEVEL_3_3) | - BIT(V4L2_MPEG_VIDC_AV1_LEVEL_4_0) | - BIT(V4L2_MPEG_VIDC_AV1_LEVEL_4_1) | - BIT(V4L2_MPEG_VIDC_AV1_LEVEL_4_2) | - BIT(V4L2_MPEG_VIDC_AV1_LEVEL_4_3) | - BIT(V4L2_MPEG_VIDC_AV1_LEVEL_5_0) | - BIT(V4L2_MPEG_VIDC_AV1_LEVEL_5_1) | - BIT(V4L2_MPEG_VIDC_AV1_LEVEL_5_2) | - BIT(V4L2_MPEG_VIDC_AV1_LEVEL_5_3) | - BIT(V4L2_MPEG_VIDC_AV1_LEVEL_6_0) | - BIT(V4L2_MPEG_VIDC_AV1_LEVEL_6_1), - V4L2_MPEG_VIDC_AV1_LEVEL_6_1, - V4L2_CID_MPEG_VIDC_AV1_LEVEL, - HFI_PROP_LEVEL, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {AV1_TIER, DEC, AV1, - V4L2_MPEG_VIDC_AV1_TIER_MAIN, - V4L2_MPEG_VIDC_AV1_TIER_HIGH, - BIT(V4L2_MPEG_VIDC_AV1_TIER_MAIN) | - BIT(V4L2_MPEG_VIDC_AV1_TIER_HIGH), - V4L2_MPEG_VIDC_AV1_TIER_HIGH, - V4L2_CID_MPEG_VIDC_AV1_TIER, - HFI_PROP_TIER, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - {HEVC_TIER, ENC | DEC, HEVC, V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, V4L2_MPEG_VIDEO_HEVC_TIER_HIGH, @@ -3888,7 +3772,7 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v1[] = { CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, {SLICE_MAX_BYTES, ENC, H264 | HEVC, - MIN_SLICE_BYTE_SIZE, MAX_SLICE_BYTE_SIZE, + MIN_SLICE_BYTE_SIZE, MAX_SLICE_BYTE_SIZE_V1, 1, MIN_SLICE_BYTE_SIZE, V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES, HFI_PROP_MULTI_SLICE_BYTES_COUNT, @@ -3919,61 +3803,61 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v1[] = { HFI_PROP_CHROMA_QP_OFFSET, CAP_FLAG_OUTPUT_PORT}, - {DISPLAY_DELAY_ENABLE, DEC, H264 | HEVC | VP9 | AV1, + {DISPLAY_DELAY_ENABLE, DEC, H264 | HEVC | VP9, 0, 1, 1, 0, V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY_ENABLE, HFI_PROP_DECODE_ORDER_OUTPUT, CAP_FLAG_INPUT_PORT}, - {DISPLAY_DELAY, DEC, H264 | HEVC | VP9 | AV1, + {DISPLAY_DELAY, DEC, H264 | HEVC | VP9, 0, 1, 1, 0, V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY, HFI_PROP_DECODE_ORDER_OUTPUT, CAP_FLAG_INPUT_PORT}, - {OUTPUT_ORDER, DEC, H264 | HEVC | VP9 | AV1, + {OUTPUT_ORDER, DEC, H264 | HEVC | VP9, 0, 1, 1, 0, 0, HFI_PROP_DECODE_ORDER_OUTPUT, CAP_FLAG_INPUT_PORT}, - {INPUT_BUF_HOST_MAX_COUNT, ENC | DEC, CODECS_ALL, + {INPUT_BUF_HOST_MAX_COUNT, ENC | DEC, CODECS_ALL_V1, DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT, 1, DEFAULT_MAX_HOST_BUF_COUNT, 0, HFI_PROP_BUFFER_HOST_MAX_COUNT, CAP_FLAG_INPUT_PORT}, - {OUTPUT_BUF_HOST_MAX_COUNT, ENC | DEC, CODECS_ALL, + {OUTPUT_BUF_HOST_MAX_COUNT, ENC | DEC, CODECS_ALL_V1, DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT, 1, DEFAULT_MAX_HOST_BUF_COUNT, 0, HFI_PROP_BUFFER_HOST_MAX_COUNT, CAP_FLAG_OUTPUT_PORT}, - {CONCEAL_COLOR_8BIT, DEC, CODECS_ALL, 0x0, 0xff3fcff, 1, + {CONCEAL_COLOR_8BIT, DEC, CODECS_ALL_V1, 0x0, 0xff3fcff, 1, DEFAULT_VIDEO_CONCEAL_COLOR_BLACK, V4L2_CID_MPEG_VIDEO_MUTE_YUV, HFI_PROP_CONCEAL_COLOR_8BIT, CAP_FLAG_INPUT_PORT}, - {CONCEAL_COLOR_10BIT, DEC, CODECS_ALL, 0x0, 0x3fffffff, 1, + {CONCEAL_COLOR_10BIT, DEC, CODECS_ALL_V1, 0x0, 0x3fffffff, 1, DEFAULT_VIDEO_CONCEAL_COLOR_BLACK, V4L2_CID_MPEG_VIDEO_MUTE_YUV, HFI_PROP_CONCEAL_COLOR_10BIT, CAP_FLAG_INPUT_PORT}, - {STAGE, DEC|ENC, CODECS_ALL, + {STAGE, DEC|ENC, CODECS_ALL_V1, MSM_VIDC_STAGE_1, MSM_VIDC_STAGE_2, 1, MSM_VIDC_STAGE_2, 0, HFI_PROP_STAGE}, - {PIPE, DEC|ENC, CODECS_ALL, + {PIPE, DEC|ENC, CODECS_ALL_V1, MSM_VIDC_PIPE_1, - MSM_VIDC_PIPE_4, 1, - MSM_VIDC_PIPE_4, + MSM_VIDC_PIPE_2, 1, + MSM_VIDC_PIPE_2, 0, HFI_PROP_PIPE}, @@ -3993,7 +3877,7 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v1[] = { HFI_PROP_MAX_NUM_REORDER_FRAMES, CAP_FLAG_VOLATILE}, - {QUALITY_MODE, ENC, CODECS_ALL, + {QUALITY_MODE, ENC, CODECS_ALL_V1, MSM_VIDC_MAX_QUALITY_MODE, MSM_VIDC_POWER_SAVE_MODE, 1, MSM_VIDC_POWER_SAVE_MODE}, @@ -4005,102 +3889,91 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v1[] = { HFI_PROP_CODED_FRAMES, CAP_FLAG_VOLATILE}, - {BIT_DEPTH, DEC, CODECS_ALL, BIT_DEPTH_8, BIT_DEPTH_10, 1, BIT_DEPTH_8, + {BIT_DEPTH, DEC, CODECS_ALL_V1, BIT_DEPTH_8, BIT_DEPTH_10, 1, BIT_DEPTH_8, 0, HFI_PROP_LUMA_CHROMA_BIT_DEPTH}, - {CODEC_CONFIG, DEC, H264 | HEVC | HEIC | AV1, 0, 1, 1, 0, + {CODEC_CONFIG, DEC, H264 | HEVC | HEIC, 0, 1, 1, 0, V4L2_CID_MPEG_VIDC_CODEC_CONFIG, 0, CAP_FLAG_DYNAMIC_ALLOWED}, - {BITSTREAM_SIZE_OVERWRITE, DEC, CODECS_ALL, 0, INT_MAX, 1, 0, + {BITSTREAM_SIZE_OVERWRITE, DEC, CODECS_ALL_V1, 0, INT_MAX, 1, 0, V4L2_CID_MPEG_VIDC_MIN_BITSTREAM_SIZE_OVERWRITE}, - {THUMBNAIL_MODE, DEC, CODECS_ALL, + {THUMBNAIL_MODE, DEC, CODECS_ALL_V1, 0, 1, 1, 0, V4L2_CID_MPEG_VIDC_THUMBNAIL_MODE, HFI_PROP_THUMBNAIL_MODE, CAP_FLAG_INPUT_PORT}, - {DEFAULT_HEADER, DEC, CODECS_ALL, + {DEFAULT_HEADER, DEC, CODECS_ALL_V1, 0, 1, 1, 0, 0, HFI_PROP_DEC_DEFAULT_HEADER}, - {RAP_FRAME, DEC, CODECS_ALL, + {RAP_FRAME, DEC, CODECS_ALL_V1, 0, 1, 1, 1, 0, HFI_PROP_DEC_START_FROM_RAP_FRAME, CAP_FLAG_INPUT_PORT}, - {SEQ_CHANGE_AT_SYNC_FRAME, DEC, CODECS_ALL, + {SEQ_CHANGE_AT_SYNC_FRAME, DEC, CODECS_ALL_V1, 0, 1, 1, 1, 0, HFI_PROP_SEQ_CHANGE_AT_SYNC_FRAME, CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - {PRIORITY, DEC|ENC, CODECS_ALL, + {PRIORITY, DEC|ENC, CODECS_ALL_V1, 0, 4, 1, 4, V4L2_CID_MPEG_VIDC_PRIORITY, HFI_PROP_SESSION_PRIORITY, CAP_FLAG_DYNAMIC_ALLOWED}, - {FIRMWARE_PRIORITY_OFFSET, DEC | ENC, CODECS_ALL, + {FIRMWARE_PRIORITY_OFFSET, DEC | ENC, CODECS_ALL_V1, 1, 1, 1, 1}, - {CRITICAL_PRIORITY, ENC, CODECS_ALL, + {CRITICAL_PRIORITY, ENC, CODECS_ALL_V1, 0, 1, 1, 0, V4L2_CID_MPEG_VIDC_CRITICAL_PRIORITY}, - {RESERVE_DURATION, ENC, CODECS_ALL, + {RESERVE_DURATION, ENC, CODECS_ALL_V1, 0, INT_MAX, 1, 0, V4L2_CID_MPEG_VIDC_RESERVE_DURATION, HFI_CMD_RESERVE, CAP_FLAG_DYNAMIC_ALLOWED}, - {ENC_IP_CR, ENC, CODECS_ALL, + {ENC_IP_CR, ENC, CODECS_ALL_V1, 0, S32_MAX, 1, 0, V4L2_CID_MPEG_VIDC_ENC_INPUT_COMPRESSION_RATIO, 0, CAP_FLAG_DYNAMIC_ALLOWED}, {FILM_GRAIN, DEC, AV1, - 0, 1, 1, 0, - V4L2_CID_MPEG_VIDC_AV1D_FILM_GRAIN_PRESENT, - HFI_PROP_AV1_FILM_GRAIN_PRESENT, - CAP_FLAG_VOLATILE}, + 0, 0, 1, 0, + V4L2_CID_MPEG_VIDC_AV1D_FILM_GRAIN_PRESENT}, {SUPER_BLOCK, DEC, AV1, - 0, 1, 1, 0, - 0, - HFI_PROP_AV1_SUPER_BLOCK_ENABLED}, + 0, 0, 1, 0}, {DRAP, DEC, AV1, - 0, S32_MAX, 1, 0, - 0, - HFI_PROP_AV1_DRAP_CONFIG, - CAP_FLAG_INPUT_PORT}, + 0, 0, 1, 0}, - {LAST_FLAG_EVENT_ENABLE, DEC|ENC, CODECS_ALL, + {LAST_FLAG_EVENT_ENABLE, DEC|ENC, CODECS_ALL_V1, 0, 1, 1, 0, V4L2_CID_MPEG_VIDC_LAST_FLAG_EVENT_ENABLE}, {META_BITSTREAM_RESOLUTION, DEC, AV1, MSM_VIDC_META_DISABLE, - MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_INPUT | + MSM_VIDC_META_DISABLE | MSM_VIDC_META_RX_INPUT | MSM_VIDC_META_RX_OUTPUT, 0, MSM_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_BITSTREAM_RESOLUTION, - HFI_PROP_BITSTREAM_RESOLUTION, - CAP_FLAG_BITMASK | CAP_FLAG_META}, + V4L2_CID_MPEG_VIDC_METADATA_BITSTREAM_RESOLUTION}, {META_CROP_OFFSETS, DEC, AV1, MSM_VIDC_META_DISABLE, - MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_INPUT | + MSM_VIDC_META_DISABLE | MSM_VIDC_META_RX_INPUT | MSM_VIDC_META_RX_OUTPUT, 0, MSM_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_CROP_OFFSETS, - HFI_PROP_CROP_OFFSETS, - CAP_FLAG_BITMASK | CAP_FLAG_META}, + V4L2_CID_MPEG_VIDC_METADATA_CROP_OFFSETS}, {ALL_INTRA, ENC, H264 | HEVC, 0, 1, 1, 0, @@ -4116,7 +3989,7 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v1[] = { HFI_PROP_LTR_MARK_USE_DETAILS, CAP_FLAG_BITMASK | CAP_FLAG_META}, - {META_SEQ_HDR_NAL, ENC, CODECS_ALL, + {META_SEQ_HDR_NAL, ENC, CODECS_ALL_V1, MSM_VIDC_META_DISABLE, MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, 0, MSM_VIDC_META_DISABLE, @@ -4124,7 +3997,7 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v1[] = { HFI_PROP_METADATA_SEQ_HEADER_NAL, CAP_FLAG_BITMASK | CAP_FLAG_META}, - {META_DPB_MISR, DEC, CODECS_ALL, + {META_DPB_MISR, DEC, CODECS_ALL_V1, MSM_VIDC_META_DISABLE, MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, 0, MSM_VIDC_META_DISABLE, @@ -4132,7 +4005,7 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v1[] = { HFI_PROP_DPB_LUMA_CHROMA_MISR, CAP_FLAG_BITMASK | CAP_FLAG_META}, - {META_OPB_MISR, DEC, CODECS_ALL, + {META_OPB_MISR, DEC, CODECS_ALL_V1, MSM_VIDC_META_DISABLE, MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, 0, MSM_VIDC_META_DISABLE, @@ -4148,7 +4021,7 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v1[] = { HFI_PROP_INTERLACE_INFO, CAP_FLAG_BITMASK | CAP_FLAG_META}, - {META_TIMESTAMP, DEC | ENC, CODECS_ALL, + {META_TIMESTAMP, DEC | ENC, CODECS_ALL_V1, MSM_VIDC_META_DISABLE, MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, 0, MSM_VIDC_META_DISABLE, @@ -4156,7 +4029,7 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v1[] = { HFI_PROP_TIMESTAMP, CAP_FLAG_BITMASK | CAP_FLAG_META}, - {META_CONCEALED_MB_CNT, DEC, CODECS_ALL, + {META_CONCEALED_MB_CNT, DEC, CODECS_ALL_V1, MSM_VIDC_META_DISABLE, MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, 0, MSM_VIDC_META_DISABLE, @@ -4164,7 +4037,7 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v1[] = { HFI_PROP_CONEALED_MB_COUNT, CAP_FLAG_BITMASK | CAP_FLAG_META}, - {META_HIST_INFO, DEC, HEVC | AV1 | VP9, + {META_HIST_INFO, DEC, HEVC | VP9, MSM_VIDC_META_DISABLE, MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, 0, MSM_VIDC_META_DISABLE, @@ -4188,7 +4061,7 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v1[] = { HFI_PROP_TRANSCODING_STAT_INFO, CAP_FLAG_BITMASK | CAP_FLAG_META}, - {META_PICTURE_TYPE, DEC, CODECS_ALL, + {META_PICTURE_TYPE, DEC, CODECS_ALL_V1, MSM_VIDC_META_DISABLE, MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_INPUT, 0, MSM_VIDC_META_DISABLE, @@ -4205,7 +4078,7 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v1[] = { HFI_PROP_SEI_MASTERING_DISPLAY_COLOUR, CAP_FLAG_BITMASK | CAP_FLAG_META}, - {META_SEI_MASTERING_DISP, DEC, HEVC | HEIC | AV1, + {META_SEI_MASTERING_DISP, DEC, HEVC | HEIC, MSM_VIDC_META_DISABLE, MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_INPUT | MSM_VIDC_META_RX_OUTPUT, @@ -4223,7 +4096,7 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v1[] = { HFI_PROP_SEI_CONTENT_LIGHT_LEVEL, CAP_FLAG_BITMASK | CAP_FLAG_META}, - {META_SEI_CLL, DEC, HEVC | HEIC | AV1, + {META_SEI_CLL, DEC, HEVC | HEIC, MSM_VIDC_META_DISABLE, MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_INPUT | MSM_VIDC_META_RX_OUTPUT, @@ -4241,7 +4114,7 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v1[] = { HFI_PROP_SEI_HDR10PLUS_USERDATA, CAP_FLAG_BITMASK | CAP_FLAG_META}, - {META_HDR10PLUS, DEC, HEVC | HEIC | AV1, + {META_HDR10PLUS, DEC, HEVC | HEIC, MSM_VIDC_META_DISABLE, MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_INPUT | MSM_VIDC_META_RX_OUTPUT, @@ -4275,7 +4148,7 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v1[] = { HFI_PROP_EVA_STAT_INFO, CAP_FLAG_BITMASK | CAP_FLAG_META}, - {META_BUF_TAG, ENC, CODECS_ALL, + {META_BUF_TAG, ENC, CODECS_ALL_V1, MSM_VIDC_META_DISABLE, MSM_VIDC_META_ENABLE | MSM_VIDC_META_TX_INPUT | MSM_VIDC_META_RX_OUTPUT, @@ -4288,7 +4161,7 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v1[] = { * when fence enabled, client needs output buffer_tag * in input metadata buffer done. */ - {META_BUF_TAG, DEC, CODECS_ALL, + {META_BUF_TAG, DEC, CODECS_ALL_V1, MSM_VIDC_META_DISABLE, MSM_VIDC_META_ENABLE | MSM_VIDC_META_TX_INPUT | MSM_VIDC_META_TX_OUTPUT | MSM_VIDC_META_RX_INPUT | @@ -4298,7 +4171,7 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v1[] = { HFI_PROP_BUFFER_TAG, CAP_FLAG_BITMASK | CAP_FLAG_META | CAP_FLAG_DYNAMIC_ALLOWED}, - {META_DPB_TAG_LIST, DEC, CODECS_ALL, + {META_DPB_TAG_LIST, DEC, CODECS_ALL_V1, MSM_VIDC_META_DISABLE, MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_INPUT, 0, MSM_VIDC_META_DISABLE, @@ -4314,7 +4187,7 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v1[] = { HFI_PROP_SUBFRAME_OUTPUT, CAP_FLAG_BITMASK | CAP_FLAG_META}, - {META_SUBFRAME_OUTPUT, DEC, CODECS_ALL, + {META_SUBFRAME_OUTPUT, DEC, CODECS_ALL_V1, MSM_VIDC_META_DISABLE, MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, 0, MSM_VIDC_META_DISABLE, @@ -4322,7 +4195,7 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v1[] = { HFI_PROP_SUBFRAME_OUTPUT, CAP_FLAG_BITMASK | CAP_FLAG_META}, - {META_ENC_QP_METADATA, ENC, CODECS_ALL, + {META_ENC_QP_METADATA, ENC, CODECS_ALL_V1, MSM_VIDC_META_DISABLE, MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, 0, MSM_VIDC_META_DISABLE, @@ -4346,7 +4219,7 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v1[] = { HFI_PROP_ROI_AS_SALIENCY_INFO, CAP_FLAG_INPUT_PORT | CAP_FLAG_BITMASK | CAP_FLAG_META}, - {META_DEC_QP_METADATA, DEC, CODECS_ALL, + {META_DEC_QP_METADATA, DEC, CODECS_ALL_V1, MSM_VIDC_META_DISABLE, MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, 0, MSM_VIDC_META_DISABLE, @@ -4382,7 +4255,7 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v1[] = { HFI_PROP_ENABLE_SLICE_DELIVERY, CAP_FLAG_OUTPUT_PORT}, - {SIGNAL_COLOR_INFO, ENC, CODECS_ALL, + {SIGNAL_COLOR_INFO, ENC, CODECS_ALL_V1, 0, INT_MAX, 1, 0, V4L2_CID_MPEG_VIDC_SIGNAL_COLOR_INFO, HFI_PROP_SIGNAL_COLOR_INFO, @@ -4410,70 +4283,70 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_clif {PIX_FMTS, DEC, HEVC | HEIC, {PROFILE}}, - {FRAME_RATE, ENC, CODECS_ALL, + {FRAME_RATE, ENC, CODECS_ALL_V1, {0}, NULL, msm_vidc_set_q16}, - {FRAME_RATE, DEC, CODECS_ALL, + {FRAME_RATE, DEC, CODECS_ALL_V1, {0}, msm_vidc_adjust_dec_frame_rate}, - {OPERATING_RATE, DEC, CODECS_ALL, + {OPERATING_RATE, DEC, CODECS_ALL_V1, {0}, msm_vidc_adjust_dec_operating_rate}, - {ENC_RING_BUFFER_COUNT, ENC, CODECS_ALL, + {ENC_RING_BUFFER_COUNT, ENC, CODECS_ALL_V1, {0}, NULL, - msm_vidc_set_ring_buffer_count_cliffs}, + NULL}, - {SECURE_MODE, ENC | DEC, H264 | HEVC | VP9 | AV1, + {SECURE_MODE, ENC|DEC, H264 | HEVC | VP9, {0}, NULL, msm_vidc_set_u32}, - {META_OUTBUF_FENCE, DEC, H264 | HEVC | AV1 | VP9, + {META_OUTBUF_FENCE, DEC, H264 | HEVC | VP9, {LOWLATENCY_MODE, OUTBUF_FENCE_TYPE, OUTBUF_FENCE_DIRECTION}, NULL, NULL}, - {INBUF_FENCE_TYPE, DEC, H264 | HEVC | VP9 | AV1, + {INBUF_FENCE_TYPE, DEC, H264 | HEVC | VP9, {0}, NULL, NULL}, - {OUTBUF_FENCE_TYPE, DEC, H264 | HEVC | VP9 | AV1, + {OUTBUF_FENCE_TYPE, DEC, H264 | HEVC | VP9, {0}, msm_vidc_adjust_dec_outbuf_fence_type, msm_vidc_set_outbuf_fence_type}, - {INBUF_FENCE_DIRECTION, DEC, H264 | HEVC | VP9 | AV1, + {INBUF_FENCE_DIRECTION, DEC, H264 | HEVC | VP9, {0}, NULL, NULL}, - {OUTBUF_FENCE_DIRECTION, DEC, H264 | HEVC | VP9 | AV1, + {OUTBUF_FENCE_DIRECTION, DEC, H264 | HEVC | VP9, {0}, msm_vidc_adjust_dec_outbuf_fence_direction, msm_vidc_set_outbuf_fence_direction}, - {FENCE_ERROR_DATA_CORRUPT, DEC, H264 | HEVC | VP9 | AV1, + {FENCE_ERROR_DATA_CORRUPT, DEC, H264 | HEVC | VP9, {0}, NULL, msm_vidc_set_u32}, - {HFLIP, ENC, CODECS_ALL, + {HFLIP, ENC, CODECS_ALL_V1, {0}, NULL, msm_vidc_set_flip}, - {VFLIP, ENC, CODECS_ALL, + {VFLIP, ENC, CODECS_ALL_V1, {0}, NULL, msm_vidc_set_flip}, - {ROTATION, ENC, CODECS_ALL, + {ROTATION, ENC, CODECS_ALL_V1, {0}, NULL, msm_vidc_set_rotation}, @@ -4483,17 +4356,17 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_clif NULL, NULL}, - {SLICE_DECODE, DEC, H264 | HEVC | AV1, + {SLICE_DECODE, DEC, H264 | HEVC, {0}, NULL, NULL}, - {HEADER_MODE, ENC, CODECS_ALL, + {HEADER_MODE, ENC, CODECS_ALL_V1, {0}, NULL, msm_vidc_set_header_mode}, - {WITHOUT_STARTCODE, ENC, CODECS_ALL, + {WITHOUT_STARTCODE, ENC, CODECS_ALL_V1, {0}, NULL, msm_vidc_set_nal_length}, @@ -4501,7 +4374,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_clif {WITHOUT_STARTCODE, DEC, AV1, {0}, NULL, - msm_vidc_set_u32}, + NULL}, {REQUEST_I_FRAME, ENC, H264 | HEVC, {0}, @@ -4546,7 +4419,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_clif NULL, msm_vidc_set_constant_quality}, - {GOP_SIZE, ENC, CODECS_ALL, + {GOP_SIZE, ENC, CODECS_ALL_V1, {ALL_INTRA}, msm_vidc_adjust_gop_size, msm_vidc_set_gop_size}, @@ -4576,12 +4449,12 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_clif msm_vidc_adjust_blur_resolution, msm_vidc_set_blur_resolution}, - {CSC, ENC, CODECS_ALL, + {CSC, ENC, CODECS_ALL_V1, {0}, msm_vidc_adjust_csc, msm_vidc_set_u32}, - {CSC_CUSTOM_MATRIX, ENC, CODECS_ALL, + {CSC_CUSTOM_MATRIX, ENC, CODECS_ALL_V1, {0}, NULL, msm_vidc_set_csc_custom_matrix}, @@ -4591,12 +4464,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_clif msm_vidc_adjust_enc_lowlatency_mode, NULL}, - {LOWLATENCY_MODE, DEC, H264 | HEVC | AV1, - {STAGE}, - msm_vidc_adjust_dec_lowlatency_mode, - NULL}, - - {LOWLATENCY_MODE, DEC, VP9, + {LOWLATENCY_MODE, DEC, H264 | HEVC | VP9, {STAGE}, msm_vidc_adjust_dec_lowlatency_mode, NULL}, @@ -4631,7 +4499,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_clif NULL, msm_vidc_set_u32}, - {TIME_DELTA_BASED_RC, ENC, CODECS_ALL, + {TIME_DELTA_BASED_RC, ENC, CODECS_ALL_V1, {0}, msm_vidc_adjust_delta_based_rc, msm_vidc_set_u32}, @@ -4727,11 +4595,6 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_clif msm_vidc_adjust_layer_count, msm_vidc_set_layer_count_and_type}, - {ENH_LAYER_COUNT, DEC, AV1, - {0}, - NULL, - msm_vidc_set_u32}, - {L0_BR, ENC, H264 | HEVC, {L1_BR}, msm_vidc_adjust_layer_bitrate, @@ -4787,32 +4650,27 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_clif msm_vidc_adjust_profile, msm_vidc_set_u32_enum}, - {PROFILE, DEC, VP9 | AV1, + {PROFILE, DEC, VP9, {0}, NULL, msm_vidc_set_u32_enum}, - {LEVEL, DEC, CODECS_ALL, + {LEVEL, DEC, CODECS_ALL_V1, {0}, NULL, msm_vidc_set_u32_enum}, - {LEVEL, ENC, CODECS_ALL, + {LEVEL, ENC, CODECS_ALL_V1, {0}, NULL, msm_vidc_set_level}, - {AV1_TIER, DEC, AV1, - {0}, - NULL, - msm_vidc_set_u32_enum}, - {HEVC_TIER, ENC | DEC, HEVC | HEIC, {0}, NULL, msm_vidc_set_u32_enum}, - {LF_MODE, ENC, CODECS_ALL, + {LF_MODE, ENC, CODECS_ALL_V1, {0}, NULL, msm_vidc_set_deblock_mode}, @@ -4837,22 +4695,22 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_clif msm_vidc_adjust_chroma_qp_index_offset, msm_vidc_set_chroma_qp_index_offset}, - {DISPLAY_DELAY_ENABLE, DEC, H264 | HEVC | VP9 | AV1, + {DISPLAY_DELAY_ENABLE, DEC, H264 | HEVC | VP9, {OUTPUT_ORDER}, NULL, NULL}, - {DISPLAY_DELAY, DEC, H264 | HEVC | VP9 | AV1, + {DISPLAY_DELAY, DEC, H264 | HEVC | VP9, {OUTPUT_ORDER}, NULL, NULL}, - {OUTPUT_ORDER, DEC, H264 | HEVC | AV1 | VP9, + {OUTPUT_ORDER, DEC, H264 | HEVC | VP9, {0}, msm_vidc_adjust_output_order, msm_vidc_set_u32}, - {INPUT_BUF_HOST_MAX_COUNT, ENC | DEC, CODECS_ALL, + {INPUT_BUF_HOST_MAX_COUNT, ENC | DEC, CODECS_ALL_V1, {0}, msm_vidc_adjust_input_buf_host_max_count, msm_vidc_set_u32}, @@ -4862,7 +4720,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_clif msm_vidc_adjust_input_buf_host_max_count, msm_vidc_set_u32}, - {OUTPUT_BUF_HOST_MAX_COUNT, ENC | DEC, CODECS_ALL, + {OUTPUT_BUF_HOST_MAX_COUNT, ENC | DEC, CODECS_ALL_V1, {0}, msm_vidc_adjust_output_buf_host_max_count, msm_vidc_set_u32}, @@ -4872,17 +4730,17 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_clif msm_vidc_adjust_output_buf_host_max_count, msm_vidc_set_u32}, - {CONCEAL_COLOR_8BIT, DEC, CODECS_ALL, + {CONCEAL_COLOR_8BIT, DEC, CODECS_ALL_V1, {0}, NULL, msm_vidc_set_u32_packed}, - {CONCEAL_COLOR_10BIT, DEC, CODECS_ALL, + {CONCEAL_COLOR_10BIT, DEC, CODECS_ALL_V1, {0}, NULL, msm_vidc_set_u32_packed}, - {STAGE, ENC | DEC, CODECS_ALL, + {STAGE, ENC | DEC, CODECS_ALL_V1, {0}, NULL, msm_vidc_set_stage}, @@ -4892,17 +4750,17 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_clif NULL, msm_vidc_set_stage}, - {STAGE, DEC, H264 | HEVC | VP9 | AV1, + {STAGE, DEC, H264 | HEVC | VP9, {0}, NULL, msm_vidc_set_stage}, - {PIPE, DEC|ENC, CODECS_ALL, + {PIPE, DEC|ENC, CODECS_ALL_V1, {0}, NULL, msm_vidc_set_pipe}, - {THUMBNAIL_MODE, DEC, H264 | HEVC | VP9 | AV1, + {THUMBNAIL_MODE, DEC, H264 | HEVC | VP9, {OUTPUT_ORDER}, NULL, msm_vidc_set_u32}, @@ -4912,27 +4770,27 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_clif NULL, msm_vidc_set_u32}, - {RAP_FRAME, DEC, CODECS_ALL, + {RAP_FRAME, DEC, CODECS_ALL_V1, {0}, NULL, msm_vidc_set_u32}, - {PRIORITY, DEC|ENC, CODECS_ALL, + {PRIORITY, DEC|ENC, CODECS_ALL_V1, {0}, msm_vidc_adjust_session_priority, msm_vidc_set_session_priority}, - {FIRMWARE_PRIORITY_OFFSET, DEC | ENC, CODECS_ALL, + {FIRMWARE_PRIORITY_OFFSET, DEC | ENC, CODECS_ALL_V1, {0}, NULL, NULL}, - {CRITICAL_PRIORITY, ENC, CODECS_ALL, + {CRITICAL_PRIORITY, ENC, CODECS_ALL_V1, {0}, NULL, NULL}, - {RESERVE_DURATION, ENC, CODECS_ALL, + {RESERVE_DURATION, ENC, CODECS_ALL_V1, {0}, NULL, msm_vidc_set_reserve_duration}, @@ -4940,7 +4798,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_clif {DRAP, DEC, AV1, {0}, NULL, - msm_vidc_set_u32}, + NULL}, {ALL_INTRA, ENC, H264 | HEVC, {LTR_COUNT, IR_PERIOD, SLICE_MODE, BIT_RATE}, @@ -4967,12 +4825,12 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_clif msm_vidc_adjust_delivery_mode, msm_vidc_set_u32}, - {VUI_TIMING_INFO, ENC, CODECS_ALL, + {VUI_TIMING_INFO, ENC, CODECS_ALL_V1, {0}, NULL, msm_vidc_set_vui_timing_info}, - {SIGNAL_COLOR_INFO, ENC, CODECS_ALL, + {SIGNAL_COLOR_INFO, ENC, CODECS_ALL_V1, {0}, NULL, msm_vidc_set_signal_color_info}, @@ -5003,9 +4861,22 @@ static struct msm_vidc_ubwc_config_data ubwc_config_cliffs[] = { UBWC_CONFIG(8, 32, 16, 0, 1, 1, 1), }; -static struct msm_vidc_format_capability format_data_cliffs = { - .codec_info = codec_data_cliffs, - .codec_info_size = ARRAY_SIZE(codec_data_cliffs), +static struct msm_vidc_format_capability format_data_cliffs_v0 = { + .codec_info = codec_data_cliffs_v0, + .codec_info_size = ARRAY_SIZE(codec_data_cliffs_v0), + .color_format_info = color_format_data_cliffs, + .color_format_info_size = ARRAY_SIZE(color_format_data_cliffs), + .color_prim_info = color_primaries_data_cliffs, + .color_prim_info_size = ARRAY_SIZE(color_primaries_data_cliffs), + .transfer_char_info = transfer_char_data_cliffs, + .transfer_char_info_size = ARRAY_SIZE(transfer_char_data_cliffs), + .matrix_coeff_info = matrix_coeff_data_cliffs, + .matrix_coeff_info_size = ARRAY_SIZE(matrix_coeff_data_cliffs), +}; + +static struct msm_vidc_format_capability format_data_cliffs_v1 = { + .codec_info = codec_data_cliffs_v1, + .codec_info_size = ARRAY_SIZE(codec_data_cliffs_v1), .color_format_info = color_format_data_cliffs, .color_format_info_size = ARRAY_SIZE(color_format_data_cliffs), .color_prim_info = color_primaries_data_cliffs, @@ -5047,7 +4918,6 @@ static const struct clk_rst_table cliffs_clk_reset_table[] = { /* name, llcc_id */ static const struct subcache_table cliffs_subcache_table[] = { { "vidsc0", LLCC_VIDSC0 }, - { "vidvsp", LLCC_VIDVSP }, }; /* name, start, size, secure, dma_coherant, region, dma_mask */ @@ -5066,7 +4936,7 @@ const struct context_bank_table cliffs_context_bank_table[] = { /* freq */ static struct freq_table cliffs_freq_table[] = { - {533333333}, {480000000}, {435000000}, {380000000}, {280000000}, {196000000} + {533333333}, {444000000}, {366000000}, {338000000}, {240000000}, {192000000} }; /* register, value, mask */ @@ -5211,7 +5081,7 @@ static struct msm_vidc_efuse_data efuse_data_cliffs[] = { EFUSE_ENTRY(0x221C812C, 4, 0x40, 0x6, SKU_VERSION), }; -static const struct msm_vidc_platform_data cliffs_data = { +static const struct msm_vidc_platform_data cliffs_data_v0 = { /* resources dependent on other module */ .bw_tbl = cliffs_bw_table, .bw_tbl_size = ARRAY_SIZE(cliffs_bw_table), @@ -5235,7 +5105,7 @@ static const struct msm_vidc_platform_data cliffs_data = { .reg_prst_tbl_size = ARRAY_SIZE(cliffs_reg_preset_table), .dev_reg_tbl = cliffs_device_region_table, .dev_reg_tbl_size = ARRAY_SIZE(cliffs_device_region_table), - .fwname = "vpu33_4v", + .fwname = "vpu30_2v", .pas_id = 9, .supports_mmrm = 1, @@ -5250,7 +5120,7 @@ static const struct msm_vidc_platform_data cliffs_data = { .csc_data.vpe_csc_custom_matrix_coeff = vpe_csc_custom_matrix_coeff, .csc_data.vpe_csc_custom_limit_coeff = vpe_csc_custom_limit_coeff, .ubwc_config = ubwc_config_cliffs, - .format_data = &format_data_cliffs, + .format_data = &format_data_cliffs_v0, /* decoder properties related*/ .psc_avc_tbl = cliffs_vdec_psc_avc, @@ -5278,6 +5148,73 @@ static const struct msm_vidc_platform_data cliffs_data = { .dec_output_prop_size_vp9 = ARRAY_SIZE(cliffs_vdec_output_properties_vp9), .dec_output_prop_size_av1 = ARRAY_SIZE(cliffs_vdec_output_properties_av1), + /* Fuse specific resources */ + .efuse_data = efuse_data_cliffs, + .efuse_data_size = ARRAY_SIZE(efuse_data_cliffs), + .sku_version = SKU_VERSION_0, +}; + +static const struct msm_vidc_platform_data cliffs_data_v1 = { + /* resources dependent on other module */ + .bw_tbl = cliffs_bw_table, + .bw_tbl_size = ARRAY_SIZE(cliffs_bw_table), + .regulator_tbl = cliffs_regulator_table, + .regulator_tbl_size = ARRAY_SIZE(cliffs_regulator_table), + .clk_tbl = cliffs_clk_table, + .clk_tbl_size = ARRAY_SIZE(cliffs_clk_table), + .clk_rst_tbl = cliffs_clk_reset_table, + .clk_rst_tbl_size = ARRAY_SIZE(cliffs_clk_reset_table), + .subcache_tbl = cliffs_subcache_table, + .subcache_tbl_size = ARRAY_SIZE(cliffs_subcache_table), + + /* populate context bank */ + .context_bank_tbl = cliffs_context_bank_table, + .context_bank_tbl_size = ARRAY_SIZE(cliffs_context_bank_table), + + /* platform specific resources */ + .freq_tbl = cliffs_freq_table, + .freq_tbl_size = ARRAY_SIZE(cliffs_freq_table), + .reg_prst_tbl = cliffs_reg_preset_table, + .reg_prst_tbl_size = ARRAY_SIZE(cliffs_reg_preset_table), + .dev_reg_tbl = cliffs_device_region_table, + .dev_reg_tbl_size = ARRAY_SIZE(cliffs_device_region_table), + .fwname = "vpu30_2v", + .pas_id = 9, + .supports_mmrm = 1, + + /* caps related resorces */ + .core_data = core_data_cliffs_v1, + .core_data_size = ARRAY_SIZE(core_data_cliffs_v1), + .inst_cap_data = instance_cap_data_cliffs_v1, + .inst_cap_data_size = ARRAY_SIZE(instance_cap_data_cliffs_v1), + .inst_cap_dependency_data = instance_cap_dependency_data_cliffs_v1, + .inst_cap_dependency_data_size = ARRAY_SIZE(instance_cap_dependency_data_cliffs_v1), + .csc_data.vpe_csc_custom_bias_coeff = vpe_csc_custom_bias_coeff, + .csc_data.vpe_csc_custom_matrix_coeff = vpe_csc_custom_matrix_coeff, + .csc_data.vpe_csc_custom_limit_coeff = vpe_csc_custom_limit_coeff, + .ubwc_config = ubwc_config_cliffs, + .format_data = &format_data_cliffs_v1, + + /* decoder properties related*/ + .psc_avc_tbl = cliffs_vdec_psc_avc, + .psc_avc_tbl_size = ARRAY_SIZE(cliffs_vdec_psc_avc), + .psc_hevc_tbl = cliffs_vdec_psc_hevc, + .psc_hevc_tbl_size = ARRAY_SIZE(cliffs_vdec_psc_hevc), + .psc_vp9_tbl = cliffs_vdec_psc_vp9, + .psc_vp9_tbl_size = ARRAY_SIZE(cliffs_vdec_psc_vp9), + .dec_input_prop_avc = cliffs_vdec_input_properties_avc, + .dec_input_prop_hevc = cliffs_vdec_input_properties_hevc, + .dec_input_prop_vp9 = cliffs_vdec_input_properties_vp9, + .dec_input_prop_size_avc = ARRAY_SIZE(cliffs_vdec_input_properties_avc), + .dec_input_prop_size_hevc = ARRAY_SIZE(cliffs_vdec_input_properties_hevc), + .dec_input_prop_size_vp9 = ARRAY_SIZE(cliffs_vdec_input_properties_vp9), + .dec_output_prop_avc = cliffs_vdec_output_properties_avc, + .dec_output_prop_hevc = cliffs_vdec_output_properties_hevc, + .dec_output_prop_vp9 = cliffs_vdec_output_properties_vp9, + .dec_output_prop_size_avc = ARRAY_SIZE(cliffs_vdec_output_properties_avc), + .dec_output_prop_size_hevc = ARRAY_SIZE(cliffs_vdec_output_properties_hevc), + .dec_output_prop_size_vp9 = ARRAY_SIZE(cliffs_vdec_output_properties_vp9), + /* Fuse specific resources */ .efuse_data = efuse_data_cliffs, .efuse_data_size = ARRAY_SIZE(efuse_data_cliffs), @@ -5308,7 +5245,7 @@ static int msm_vidc_init_data(struct msm_vidc_core *core) d_vpr_h("%s: initialize cliffs data\n", __func__); - core->platform->data = cliffs_data; + core->platform->data = cliffs_data_v0; /* Check for sku version */ rc = msm_vidc_read_efuse(core); @@ -5317,18 +5254,8 @@ static int msm_vidc_init_data(struct msm_vidc_core *core) return rc; } - if (core->platform->data.sku_version == SKU_VERSION_2) { - core->platform->data.core_data = core_data_cliffs_v1; - core->platform->data.core_data_size = - ARRAY_SIZE(core_data_cliffs_v1); - core->platform->data.inst_cap_data = instance_cap_data_cliffs_v1; - core->platform->data.inst_cap_data_size = - ARRAY_SIZE(instance_cap_data_cliffs_v1); - core->platform->data.inst_cap_dependency_data = - instance_cap_dependency_data_cliffs_v1; - core->platform->data.inst_cap_dependency_data_size = - ARRAY_SIZE(instance_cap_dependency_data_cliffs_v1); - } + if (core->platform->data.sku_version == SKU_VERSION_1) + core->platform->data = cliffs_data_v1; core->mem_ops = get_mem_ops_ext(); if (!core->mem_ops) { From 143edf3d230cda5200aee82c449eb455b16ff784 Mon Sep 17 00:00:00 2001 From: Manikanta Kanamarlapudi Date: Mon, 31 Jul 2023 11:15:58 +0530 Subject: [PATCH 0986/1061] video-driver: Remove QOS register settings emove QOS register settings of pineapple, will add cliffs specific registers after systems team recommendation. Change-Id: I6fe82814e67d69ee0820679bb7c934366092ee82 Signed-off-by: Manikanta Kanamarlapudi --- driver/platform/cliffs/src/msm_vidc_cliffs.c | 13 +------------ 1 file changed, 1 insertion(+), 12 deletions(-) diff --git a/driver/platform/cliffs/src/msm_vidc_cliffs.c b/driver/platform/cliffs/src/msm_vidc_cliffs.c index 228abfe7e7..84c9be92bb 100644 --- a/driver/platform/cliffs/src/msm_vidc_cliffs.c +++ b/driver/platform/cliffs/src/msm_vidc_cliffs.c @@ -5071,18 +5071,7 @@ static struct freq_table cliffs_freq_table[] = { /* register, value, mask */ static const struct reg_preset_table cliffs_reg_preset_table[] = { - { 0xB0088, 0x0, 0x11 }, - { 0x13030, 0x33332222, 0xFFFFFFFF}, - { 0x13034, 0x44444444, 0xFFFFFFFF}, - { 0x13038, 0x1022, 0xFFFFFFFF}, - { 0x13040, 0x0, 0xFFFFFFFF}, - { 0x13048, 0xFFFF, 0xFFFFFFFF}, - { 0x13430, 0x33332222, 0xFFFFFFFF}, - { 0x13434, 0x44444444, 0xFFFFFFFF}, - { 0x13438, 0x1022, 0xFFFFFFFF}, - { 0x13440, 0x0, 0xFFFFFFFF}, - { 0x13448, 0xFFFF, 0xFFFFFFFF}, - { 0xA013C, 0x99, 0xFFFFFFFF}, + { 0xB0088, 0x0, 0x11}, }; /* name, phys_addr, size, device_addr, device region type */ From c98002d4fedc1106c2d19e15a2f1045a7d6ca5f3 Mon Sep 17 00:00:00 2001 From: Vedang Nagar Date: Wed, 16 Aug 2023 17:27:39 +0530 Subject: [PATCH 0987/1061] Video: Driver: Configure CSC on BITSTREAM port according to HFI According to HFI definition, HFI_PROP_CSC needs to be configured on BITSTREAM port, but during msm_vidc_set_cap, CSC is being configured on PORT_NONE leading to error in FW. Added change to configure CSC always on BITSTREAM port. Change-Id: I3e9511ec40cd25687048f0739c57d164dd7a1c43 Signed-off-by: Vedang Nagar --- driver/platform/cliffs/src/cliffs.c | 3 ++- driver/platform/cliffs/src/msm_vidc_cliffs.c | 6 ++++-- driver/platform/kalama/src/msm_vidc_kalama.c | 3 ++- driver/platform/pineapple/src/msm_vidc_pineapple.c | 3 ++- driver/platform/pineapple/src/pineapple.c | 3 ++- driver/platform/waipio/src/waipio.c | 3 ++- 6 files changed, 14 insertions(+), 7 deletions(-) diff --git a/driver/platform/cliffs/src/cliffs.c b/driver/platform/cliffs/src/cliffs.c index 2cbe263a1e..fd524bc887 100644 --- a/driver/platform/cliffs/src/cliffs.c +++ b/driver/platform/cliffs/src/cliffs.c @@ -581,7 +581,8 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs[] = { {CSC, ENC, CODECS_ALL, 0, 1, 1, 0, 0, - HFI_PROP_CSC}, + HFI_PROP_CSC, + CAP_FLAG_OUTPUT_PORT}, {LOWLATENCY_MODE, ENC, H264 | HEVC, 0, 1, 1, 0, diff --git a/driver/platform/cliffs/src/msm_vidc_cliffs.c b/driver/platform/cliffs/src/msm_vidc_cliffs.c index b5a95d1b05..a3844dce83 100644 --- a/driver/platform/cliffs/src/msm_vidc_cliffs.c +++ b/driver/platform/cliffs/src/msm_vidc_cliffs.c @@ -896,7 +896,8 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v0[] = { {CSC, ENC, CODECS_ALL_V0, 0, 1, 1, 0, V4L2_CID_MPEG_VIDC_CSC, - HFI_PROP_CSC}, + HFI_PROP_CSC, + CAP_FLAG_OUTPUT_PORT}, {CSC_CUSTOM_MATRIX, ENC, CODECS_ALL_V0, 0, 1, 1, 0, @@ -3166,7 +3167,8 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v1[] = { {CSC, ENC, CODECS_ALL_V1, 0, 1, 1, 0, V4L2_CID_MPEG_VIDC_CSC, - HFI_PROP_CSC}, + HFI_PROP_CSC, + CAP_FLAG_OUTPUT_PORT}, {CSC_CUSTOM_MATRIX, ENC, CODECS_ALL_V1, 0, 1, 1, 0, diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index 576c6e4b64..8dc94a4988 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -819,7 +819,8 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = { {CSC, ENC, CODECS_ALL, 0, 1, 1, 0, V4L2_CID_MPEG_VIDC_CSC, - HFI_PROP_CSC}, + HFI_PROP_CSC, + CAP_FLAG_OUTPUT_PORT}, {CSC_CUSTOM_MATRIX, ENC, CODECS_ALL, 0, 1, 1, 0, diff --git a/driver/platform/pineapple/src/msm_vidc_pineapple.c b/driver/platform/pineapple/src/msm_vidc_pineapple.c index 65e9ae520e..c7e2477239 100644 --- a/driver/platform/pineapple/src/msm_vidc_pineapple.c +++ b/driver/platform/pineapple/src/msm_vidc_pineapple.c @@ -895,7 +895,8 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { {CSC, ENC, CODECS_ALL, 0, 1, 1, 0, V4L2_CID_MPEG_VIDC_CSC, - HFI_PROP_CSC}, + HFI_PROP_CSC, + CAP_FLAG_OUTPUT_PORT}, {CSC_CUSTOM_MATRIX, ENC, CODECS_ALL, 0, 1, 1, 0, diff --git a/driver/platform/pineapple/src/pineapple.c b/driver/platform/pineapple/src/pineapple.c index 2a62589072..e859014751 100644 --- a/driver/platform/pineapple/src/pineapple.c +++ b/driver/platform/pineapple/src/pineapple.c @@ -581,7 +581,8 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = { {CSC, ENC, CODECS_ALL, 0, 1, 1, 0, 0, - HFI_PROP_CSC}, + HFI_PROP_CSC, + CAP_FLAG_OUTPUT_PORT}, {LOWLATENCY_MODE, ENC, H264 | HEVC, 0, 1, 1, 0, diff --git a/driver/platform/waipio/src/waipio.c b/driver/platform/waipio/src/waipio.c index 0bbac9ce45..fd80d05cb6 100644 --- a/driver/platform/waipio/src/waipio.c +++ b/driver/platform/waipio/src/waipio.c @@ -513,7 +513,8 @@ static struct msm_platform_inst_capability instance_cap_data_waipio[] = { {CSC, ENC, CODECS_ALL, 0, 1, 1, 0, 0, - HFI_PROP_CSC}, + HFI_PROP_CSC, + CAP_FLAG_OUTPUT_PORT}, {LOWLATENCY_MODE, ENC, H264 | HEVC, 0, 1, 1, 0, From 3296a4dacb85a3a24957da86869f9e7499244053 Mon Sep 17 00:00:00 2001 From: Manikanta Kanamarlapudi Date: Mon, 31 Jul 2023 14:24:11 +0530 Subject: [PATCH 0988/1061] video-drvier: update NOC register programming Update NOC register programming based on vpu version like iris33 and iris3_2pipe. Change-Id: I98e879cdd0f89584dfc2c6fad8345979403b2b3e Signed-off-by: Manikanta Kanamarlapudi --- driver/platform/cliffs/src/msm_vidc_cliffs.c | 2 + .../platform/common/inc/msm_vidc_platform.h | 6 + .../pineapple/src/msm_vidc_pineapple.c | 1 + .../iris33/src/msm_vidc_clock_iris33.c | 1 + driver/variant/iris33/src/msm_vidc_iris33.c | 256 +++++++++++++----- 5 files changed, 191 insertions(+), 75 deletions(-) diff --git a/driver/platform/cliffs/src/msm_vidc_cliffs.c b/driver/platform/cliffs/src/msm_vidc_cliffs.c index b5a95d1b05..cc92e3ea98 100644 --- a/driver/platform/cliffs/src/msm_vidc_cliffs.c +++ b/driver/platform/cliffs/src/msm_vidc_cliffs.c @@ -5108,6 +5108,7 @@ static const struct msm_vidc_platform_data cliffs_data_v0 = { .fwname = "vpu30_2v", .pas_id = 9, .supports_mmrm = 1, + .vpu_ver = VPU_VERSION_IRIS33_2P, /* caps related resorces */ .core_data = core_data_cliffs_v0, @@ -5194,6 +5195,7 @@ static const struct msm_vidc_platform_data cliffs_data_v1 = { .csc_data.vpe_csc_custom_limit_coeff = vpe_csc_custom_limit_coeff, .ubwc_config = ubwc_config_cliffs, .format_data = &format_data_cliffs_v1, + .vpu_ver = VPU_VERSION_IRIS33_2P, /* decoder properties related*/ .psc_avc_tbl = cliffs_vdec_psc_avc, diff --git a/driver/platform/common/inc/msm_vidc_platform.h b/driver/platform/common/inc/msm_vidc_platform.h index ec3c5e59fe..9cd4c38669 100644 --- a/driver/platform/common/inc/msm_vidc_platform.h +++ b/driver/platform/common/inc/msm_vidc_platform.h @@ -198,6 +198,11 @@ struct msm_vidc_format_capability { u32 matrix_coeff_info_size; }; +enum vpu_version { + VPU_VERSION_IRIS33 = 1, + VPU_VERSION_IRIS33_2P, // IRIS3 2 PIPE +}; + struct msm_vidc_platform_data { const struct bw_table *bw_tbl; unsigned int bw_tbl_size; @@ -235,6 +240,7 @@ struct msm_vidc_platform_data { struct msm_vidc_efuse_data *efuse_data; unsigned int efuse_data_size; unsigned int sku_version; + unsigned int vpu_ver; struct msm_vidc_format_capability *format_data; const u32 *psc_avc_tbl; unsigned int psc_avc_tbl_size; diff --git a/driver/platform/pineapple/src/msm_vidc_pineapple.c b/driver/platform/pineapple/src/msm_vidc_pineapple.c index 65e9ae520e..c739455db9 100644 --- a/driver/platform/pineapple/src/msm_vidc_pineapple.c +++ b/driver/platform/pineapple/src/msm_vidc_pineapple.c @@ -2905,6 +2905,7 @@ static const struct msm_vidc_platform_data pineapple_data = { .fwname = "vpu33_4v", .pas_id = 9, .supports_mmrm = 1, + .vpu_ver = VPU_VERSION_IRIS33, /* caps related resorces */ .core_data = core_data_pineapple, diff --git a/driver/variant/iris33/src/msm_vidc_clock_iris33.c b/driver/variant/iris33/src/msm_vidc_clock_iris33.c index 02ed8d8864..ebef355079 100644 --- a/driver/variant/iris33/src/msm_vidc_clock_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_clock_iris33.c @@ -22,6 +22,7 @@ static u32 frequency_table_iris33[2][6] = { {840, 720, 652, 570, 450, 294}, }; + /* * TODO Move to pineapple.c * TODO Replace hardcoded values with diff --git a/driver/variant/iris33/src/msm_vidc_iris33.c b/driver/variant/iris33/src/msm_vidc_iris33.c index b24c95b7bd..7a4bf68b8a 100644 --- a/driver/variant/iris33/src/msm_vidc_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_iris33.c @@ -122,17 +122,30 @@ typedef enum { * -------------------------------------------------------------------------- */ #define NOC_BASE_OFFS 0x00010000 -#define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_MAINCTL_LOW (NOC_BASE_OFFS + 0xA008) -#define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRCLR_LOW (NOC_BASE_OFFS + 0xA018) -#define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG0_LOW (NOC_BASE_OFFS + 0xA020) -#define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG0_HIGH (NOC_BASE_OFFS + 0xA024) -#define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG1_LOW (NOC_BASE_OFFS + 0xA028) -#define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG1_HIGH (NOC_BASE_OFFS + 0xA02C) -#define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG2_LOW (NOC_BASE_OFFS + 0xA030) -#define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG2_HIGH (NOC_BASE_OFFS + 0xA034) -#define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG3_LOW (NOC_BASE_OFFS + 0xA038) -#define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG3_HIGH (NOC_BASE_OFFS + 0xA03C) -#define NOC_SIDEBANDMANAGER_MAIN_SIDEBANDMANAGER_FAULTINEN0_LOW (NOC_BASE_OFFS + 0x7040) + +#define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_MAINCTL_LOW_IRIS33 (NOC_BASE_OFFS + 0xA008) +#define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRCLR_LOW_IRIS33 (NOC_BASE_OFFS + 0xA018) +#define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG0_LOW_IRIS33 (NOC_BASE_OFFS + 0xA020) +#define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG0_HIGH_IRIS33 (NOC_BASE_OFFS + 0xA024) +#define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG1_LOW_IRIS33 (NOC_BASE_OFFS + 0xA028) +#define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG1_HIGH_IRIS33 (NOC_BASE_OFFS + 0xA02C) +#define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG2_LOW_IRIS33 (NOC_BASE_OFFS + 0xA030) +#define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG2_HIGH_IRIS33 (NOC_BASE_OFFS + 0xA034) +#define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG3_LOW_IRIS33 (NOC_BASE_OFFS + 0xA038) +#define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG3_HIGH_IRIS33 (NOC_BASE_OFFS + 0xA03C) +#define NOC_SIDEBANDMANAGER_MAIN_SIDEBANDMANAGER_FAULTINEN0_LOW_IRIS33 (NOC_BASE_OFFS + 0x7040) + +#define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_MAINCTL_LOW_IRIS33_2P (NOC_BASE_OFFS + 0x3508) +#define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRCLR_LOW_IRIS33_2P (NOC_BASE_OFFS + 0x3518) +#define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG0_LOW_IRIS33_2P (NOC_BASE_OFFS + 0x3520) +#define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG0_HIGH_IRIS33_2P (NOC_BASE_OFFS + 0x3524) +#define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG1_LOW_IRIS33_2P (NOC_BASE_OFFS + 0x3528) +#define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG1_HIGH_IRIS33_2P (NOC_BASE_OFFS + 0x352C) +#define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG2_LOW_IRIS33_2P (NOC_BASE_OFFS + 0x3530) +#define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG2_HIGH_IRIS33_2P (NOC_BASE_OFFS + 0x3534) +#define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG3_LOW_IRIS33_2P (NOC_BASE_OFFS + 0x3538) +#define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG3_HIGH_IRIS33_2P (NOC_BASE_OFFS + 0x353C) +#define NOC_SIDEBANDMANAGER_MAIN_SIDEBANDMANAGER_FAULTINEN0_LOW_IRIS33_2P (NOC_BASE_OFFS + 0x3240) static int __interrupt_init_iris33(struct msm_vidc_core *core) { @@ -739,30 +752,60 @@ static int __power_on_iris33(struct msm_vidc_core *core) * Programm NOC error registers before releasing xo reset * Clear error logger registers and then enable StallEn */ - rc = __write_register(core, - NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRCLR_LOW, 0x1); - if (rc) { - d_vpr_e( - "%s: error clearing NOC_MAIN_ERRORLOGGER_ERRCLR_LOW\n", - __func__); - goto fail_program_noc_regs; - } + if (core->platform->data.vpu_ver == VPU_VERSION_IRIS33) { + rc = __write_register(core, + NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRCLR_LOW_IRIS33, 0x1); + if (rc) { + d_vpr_e( + "%s: error clearing NOC_MAIN_ERRORLOGGER_ERRCLR_LOW\n", + __func__); + goto fail_program_noc_regs; + } - rc = __write_register(core, - NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_MAINCTL_LOW, 0x3); - if (rc) { - d_vpr_e( - "%s: failed to set NOC_ERL_MAIN_ERRORLOGGER_MAINCTL_LOW\n", - __func__); - goto fail_program_noc_regs; - } - rc = __write_register(core, - NOC_SIDEBANDMANAGER_MAIN_SIDEBANDMANAGER_FAULTINEN0_LOW, 0x1); - if (rc) { - d_vpr_e( - "%s: failed to set NOC_SIDEBANDMANAGER_FAULTINEN0_LOW\n", - __func__); - goto fail_program_noc_regs; + rc = __write_register(core, + NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_MAINCTL_LOW_IRIS33, 0x3); + if (rc) { + d_vpr_e( + "%s: failed to set NOC_ERL_MAIN_ERRORLOGGER_MAINCTL_LOW\n", + __func__); + goto fail_program_noc_regs; + } + rc = __write_register(core, + NOC_SIDEBANDMANAGER_MAIN_SIDEBANDMANAGER_FAULTINEN0_LOW_IRIS33, + 0x1); + if (rc) { + d_vpr_e( + "%s: failed to set NOC_SIDEBANDMANAGER_FAULTINEN0_LOW\n", + __func__); + goto fail_program_noc_regs; + } + } else if (core->platform->data.vpu_ver == VPU_VERSION_IRIS33_2P) { + rc = __write_register(core, + NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRCLR_LOW_IRIS33_2P, 0x1); + if (rc) { + d_vpr_e( + "%s: error clearing NOC_MAIN_ERRORLOGGER_ERRCLR_LOW\n", + __func__); + goto fail_program_noc_regs; + } + + rc = __write_register(core, + NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_MAINCTL_LOW_IRIS33_2P, 0x3); + if (rc) { + d_vpr_e( + "%s: failed to set NOC_ERL_MAIN_ERRORLOGGER_MAINCTL_LOW\n", + __func__); + goto fail_program_noc_regs; + } + rc = __write_register(core, + NOC_SIDEBANDMANAGER_MAIN_SIDEBANDMANAGER_FAULTINEN0_LOW_IRIS33_2P, + 0x1); + if (rc) { + d_vpr_e( + "%s: failed to set NOC_SIDEBANDMANAGER_FAULTINEN0_LOW\n", + __func__); + goto fail_program_noc_regs; + } } /* release reset control for other consumers */ @@ -877,9 +920,107 @@ static int __watchdog_iris33(struct msm_vidc_core *core, u32 intr_status) return rc; } +static int __read_noc_err_register_iris33(struct msm_vidc_core *core) +{ + int rc = 0; + u32 value; + + rc = __read_register(core, + NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG0_LOW_IRIS33, &value); + if (!rc) + d_vpr_e("%s: NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG0_LOW: %#x\n", + __func__, value); + rc = __read_register(core, + NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG0_HIGH_IRIS33, &value); + if (!rc) + d_vpr_e("%s: NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG0_HIGH: %#x\n", + __func__, value); + rc = __read_register(core, + NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG1_LOW_IRIS33, &value); + if (!rc) + d_vpr_e("%s: NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG1_LOW: %#x\n", + __func__, value); + rc = __read_register(core, + NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG1_HIGH_IRIS33, &value); + if (!rc) + d_vpr_e("%s: NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG1_HIGH: %#x\n", + __func__, value); + rc = __read_register(core, + NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG2_LOW_IRIS33, &value); + if (!rc) + d_vpr_e("%s: NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG2_LOW: %#x\n", + __func__, value); + rc = __read_register(core, + NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG2_HIGH_IRIS33, &value); + if (!rc) + d_vpr_e("%s: NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG2_HIGH: %#x\n", + __func__, value); + rc = __read_register(core, + NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG3_LOW_IRIS33, &value); + if (!rc) + d_vpr_e("%s: NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG3_LOW: %#x\n", + __func__, value); + rc = __read_register(core, + NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG3_HIGH_IRIS33, &value); + if (!rc) + d_vpr_e("%s: NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG3_HIGH: %#x\n", + __func__, value); + + return rc; +} + +static int __read_noc_err_register_iris33_2p(struct msm_vidc_core *core) +{ + int rc = 0; + u32 value; + + rc = __read_register(core, + NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG0_LOW_IRIS33_2P, &value); + if (!rc) + d_vpr_e("%s: NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG0_LOW: %#x\n", + __func__, value); + rc = __read_register(core, + NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG0_HIGH_IRIS33_2P, &value); + if (!rc) + d_vpr_e("%s: NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG0_HIGH: %#x\n", + __func__, value); + rc = __read_register(core, + NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG1_LOW_IRIS33_2P, &value); + if (!rc) + d_vpr_e("%s: NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG1_LOW: %#x\n", + __func__, value); + rc = __read_register(core, + NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG1_HIGH_IRIS33_2P, &value); + if (!rc) + d_vpr_e("%s: NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG1_HIGH: %#x\n", + __func__, value); + rc = __read_register(core, + NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG2_LOW_IRIS33_2P, &value); + if (!rc) + d_vpr_e("%s: NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG2_LOW: %#x\n", + __func__, value); + rc = __read_register(core, + NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG2_HIGH_IRIS33_2P, &value); + if (!rc) + d_vpr_e("%s: NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG2_HIGH: %#x\n", + __func__, value); + rc = __read_register(core, + NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG3_LOW_IRIS33_2P, &value); + if (!rc) + d_vpr_e("%s: NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG3_LOW: %#x\n", + __func__, value); + rc = __read_register(core, + NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG3_HIGH_IRIS33_2P, &value); + if (!rc) + d_vpr_e("%s: NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG3_HIGH: %#x\n", + __func__, value); + + return rc; +} + static int __noc_error_info_iris33(struct msm_vidc_core *core) { - u32 value, count = 0; + u32 count = 0; int rc = 0; /* @@ -947,46 +1088,11 @@ static int __noc_error_info_iris33(struct msm_vidc_core *core) goto fail_assert_xo_reset; } - rc = __read_register(core, - NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG0_LOW, &value); - if (!rc) - d_vpr_e("%s: NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG0_LOW: %#x\n", - __func__, value); - rc = __read_register(core, - NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG0_HIGH, &value); - if (!rc) - d_vpr_e("%s: NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG0_HIGH: %#x\n", - __func__, value); - rc = __read_register(core, - NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG1_LOW, &value); - if (!rc) - d_vpr_e("%s: NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG1_LOW: %#x\n", - __func__, value); - rc = __read_register(core, - NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG1_HIGH, &value); - if (!rc) - d_vpr_e("%s: NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG1_HIGH: %#x\n", - __func__, value); - rc = __read_register(core, - NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG2_LOW, &value); - if (!rc) - d_vpr_e("%s: NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG2_LOW: %#x\n", - __func__, value); - rc = __read_register(core, - NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG2_HIGH, &value); - if (!rc) - d_vpr_e("%s: NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG2_HIGH: %#x\n", - __func__, value); - rc = __read_register(core, - NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG3_LOW, &value); - if (!rc) - d_vpr_e("%s: NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG3_LOW: %#x\n", - __func__, value); - rc = __read_register(core, - NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG3_HIGH, &value); - if (!rc) - d_vpr_e("%s: NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG3_HIGH: %#x\n", - __func__, value); + if (core->platform->data.vpu_ver == VPU_VERSION_IRIS33) + rc = __read_noc_err_register_iris33(core); + else if (core->platform->data.vpu_ver == VPU_VERSION_IRIS33_2P) + rc = __read_noc_err_register_iris33_2p(core); + /* release reset control for other consumers */ rc = call_res_op(core, reset_control_release, core, "video_xo_reset"); if (rc) { From e91bbc78486c98b9023df05f27383d84ac09f4f1 Mon Sep 17 00:00:00 2001 From: Vedang Nagar Date: Fri, 25 Aug 2023 13:16:01 +0530 Subject: [PATCH 0989/1061] Video: Driver: Retain AV1 TILE info if not sent by FW AV1 Tile Info is sent by FW during EBD and these values are being used by driver to compute clock votings. For few(such as SEF) frames, there is no TILE info present in the bitstream and FW will send default (1, 1) value to driver which affects clock voting for next frames and hence leading to performance issue. To avoid such issue, if there is no tile infor, FW will not send any such stale TILE info values. But still during EBD, driver is doing memset to 0 for inst->hfi_frame_info and hence overriding the value to 0. Added fix to retain previous frames tile info by keeping check for 0(since min value for tile info from FW = 1, 1) if no value is being sent from the FW. Change-Id: I6c23ed769f29efec2a7f318e3997d3f7532685c9 Signed-off-by: Vedang Nagar --- driver/vidc/src/venus_hfi_response.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index 30cd860c73..e7c266cfe9 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -728,10 +728,12 @@ static int handle_input_buffer(struct msm_vidc_inst *inst, } if (is_decode_session(inst) && inst->codec == MSM_VIDC_AV1) { - inst->power.fw_av1_tile_rows = - inst->hfi_frame_info.av1_tile_rows_columns >> 16; - inst->power.fw_av1_tile_columns = - inst->hfi_frame_info.av1_tile_rows_columns & 0x0000FFFF; + if (inst->hfi_frame_info.av1_tile_rows_columns) { + inst->power.fw_av1_tile_rows = + inst->hfi_frame_info.av1_tile_rows_columns >> 16; + inst->power.fw_av1_tile_columns = + inst->hfi_frame_info.av1_tile_rows_columns & 0x0000FFFF; + } if (inst->hfi_frame_info.av1_non_uniform_tile_spacing) i_vpr_l(inst, "%s: av1_non_uniform_tile_spacing %d\n", From 21eb1ee93a8a1412ce5052990759ca1728005005 Mon Sep 17 00:00:00 2001 From: Megha Byahatti Date: Wed, 23 Aug 2023 16:12:04 +0530 Subject: [PATCH 0990/1061] video-driver: frequency claculation for iris33_2p -Add frequency, pipe penalty and bitrate table for iris33_2p to calculate vsp frequency. Change-Id: Ic8fb11ca93bc96d023020edac10a412995573dd4 Signed-off-by: Megha Byahatti --- .../iris33/src/msm_vidc_clock_iris33.c | 76 ++++++++++++++----- 1 file changed, 59 insertions(+), 17 deletions(-) diff --git a/driver/variant/iris33/src/msm_vidc_clock_iris33.c b/driver/variant/iris33/src/msm_vidc_clock_iris33.c index ebef355079..a6a0a56950 100644 --- a/driver/variant/iris33/src/msm_vidc_clock_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_clock_iris33.c @@ -22,6 +22,11 @@ static u32 frequency_table_iris33[2][6] = { {840, 720, 652, 570, 450, 294}, }; +static u32 frequency_table_iris33_2p[2][6] = { + /* //make lowsvs_D1 as invalid; */ + { 533, 444, 366, 338, 240, 192 }, + { 800, 666, 549, 507, 360, 288 }, +}; /* * TODO Move to pineapple.c @@ -68,6 +73,15 @@ static u32 pipe_penalty_iris33[3][3] = { {2039, 2464, 1191}, }; +static u32 pipe_penalty_iris33_2p[3][3] = { + /* NON AV1 */ + { 1059, 1059, 1059 }, + /* AV1 RECOMMENDED TILE 1080P_V2XH1, UHD_V2X2, 8KUHD_V8X2 */ + { 1123, 1079, 1079 }, + /* AV1 YOUTUBE/NETFLIX TILE 1080P_V4XH2_V4X1, UHD_V8X4_V8X1, 8KUHD_V8X8_V8X1 */ + { 1197, 1287, 1051 }, +}; + /* * Video IP Core Technology: bitrate constraint * HW limit bitrate table (these values are measured end to end fw/sw impacts are also considered) @@ -86,6 +100,18 @@ static u32 bitrate_table_iris33_2stage_fp[5][10] = { {130, 130, 120, 120, 120, 120, 120, 120, 120, 120}, }; +static u32 bitrate_table_iris33_2p_2stage_fp[5][10] = { + /* h264 cavlc */ + { 0, 220, 220, 220, 220, 220, 220, 220, 220, 220 }, + /* h264 cabac */ + { 0, 140, 150, 160, 160, 160, 160, 160, 160, 160 }, + /* h265 */ + { 90, 140, 160, 160, 160, 160, 160, 160, 160, 160 }, + /*vp9 */ + { 90, 90, 90, 90, 90, 90, 90, 90, 90, 90 }, + { 130, 130, 120, 120, 120, 120, 120, 120, 120, 120 }, +}; + /* * HW limit bitrate table (these values are measured * end to end fw/sw impacts are also considered) @@ -296,6 +322,8 @@ u32 get_bitrate_entry(u32 pixle_count) static int calculate_vsp_min_freq(struct api_calculation_input codec_input, struct api_calculation_freq_output *codec_output) { + u32 (*frequency_table_pointer)[6]; + u32 (*bitrate_table_2stage_pointer)[10]; /* * VSP calculation * different methodology from Lahaina @@ -317,6 +345,14 @@ static int calculate_vsp_min_freq(struct api_calculation_input codec_input, input_bitrate_fp = ((u32)(codec_input.bitrate_mbps * 100 + 99)) / 100; + if (codec_input.pipe_num == 4) { + frequency_table_pointer = frequency_table_iris33; + bitrate_table_2stage_pointer = bitrate_table_iris33_2stage_fp; + } else if (codec_input.pipe_num == 2) { + frequency_table_pointer = frequency_table_iris33_2p; + bitrate_table_2stage_pointer = bitrate_table_iris33_2p_2stage_fp; + } + /* 8KUHD60fps with B frame */ if ((pixle_count >= fp_pixel_count_bar0) && (codec_input.hierachical_layer != CODEC_GOP_IPP)) { @@ -334,26 +370,26 @@ static int calculate_vsp_min_freq(struct api_calculation_input codec_input, * TODO : Reduce these conditions by removing the zero entries from Bitrate table. */ - vsp_hw_min_frequency = frequency_table_iris33[0][2] * + vsp_hw_min_frequency = frequency_table_pointer[0][2] * input_bitrate_fp * 1000; if (codec_input.codec == CODEC_AV1) - vsp_hw_min_frequency = frequency_table_iris33[0][1] * + vsp_hw_min_frequency = frequency_table_pointer[0][1] * input_bitrate_fp * 1000; if ((codec_input.codec == CODEC_H264) || (codec_input.codec == CODEC_H264_CAVLC)) { - vsp_hw_min_frequency = (frequency_table_iris33[0][2] * 1000 + + vsp_hw_min_frequency = (frequency_table_pointer[0][2] * 1000 + (fw_sw_vsp_offset - 1)); vsp_hw_min_frequency = DIV_ROUND_UP(vsp_hw_min_frequency, fw_sw_vsp_offset); } else { if (codec_input.vsp_vpp_mode == CODEC_VSPVPP_MODE_2S) { vsp_hw_min_frequency = vsp_hw_min_frequency + - (bitrate_table_iris33_2stage_fp[codec][0] * + (bitrate_table_2stage_pointer[codec][0] * fw_sw_vsp_offset - 1); vsp_hw_min_frequency = DIV_ROUND_UP(vsp_hw_min_frequency, - (bitrate_table_iris33_2stage_fp[codec][0]) * + (bitrate_table_2stage_pointer[codec][0]) * fw_sw_vsp_offset); } else { vsp_hw_min_frequency = vsp_hw_min_frequency + @@ -365,19 +401,19 @@ static int calculate_vsp_min_freq(struct api_calculation_input codec_input, } } } else { - vsp_hw_min_frequency = frequency_table_iris33[0][2] * + vsp_hw_min_frequency = frequency_table_pointer[0][2] * input_bitrate_fp * 1000; if (codec_input.codec == CODEC_AV1 && bitrate_entry == 1) - vsp_hw_min_frequency = frequency_table_iris33[0][1] * + vsp_hw_min_frequency = frequency_table_pointer[0][1] * input_bitrate_fp * 1000; if (codec_input.vsp_vpp_mode == CODEC_VSPVPP_MODE_2S) { vsp_hw_min_frequency = vsp_hw_min_frequency + - (bitrate_table_iris33_2stage_fp[codec][bitrate_entry] * + (bitrate_table_2stage_pointer[codec][bitrate_entry] * fw_sw_vsp_offset - 1); vsp_hw_min_frequency = DIV_ROUND_UP(vsp_hw_min_frequency, - (bitrate_table_iris33_2stage_fp[codec][bitrate_entry]) * + (bitrate_table_2stage_pointer[codec][bitrate_entry]) * fw_sw_vsp_offset); } else { vsp_hw_min_frequency = vsp_hw_min_frequency + @@ -398,31 +434,37 @@ static u32 calculate_pipe_penalty(struct api_calculation_input codec_input) u32 pipe_penalty_codec = 0; u8 avid_commercial_content = 0; u32 pixel_count = 0; + u32 (*pipe_penalty_pointer)[3]; + + if (codec_input.pipe_num == 4) + pipe_penalty_pointer = pipe_penalty_iris33; + else if (codec_input.pipe_num == 2) + pipe_penalty_pointer = pipe_penalty_iris33_2p; /* decoder */ if (codec_input.decoder_or_encoder == CODEC_DECODER) { - pipe_penalty_codec = pipe_penalty_iris33[0][0]; + pipe_penalty_codec = pipe_penalty_pointer[0][0]; avid_commercial_content = codec_input.av1d_commer_tile_enable; if (codec_input.codec == CODEC_AV1) { pixel_count = codec_input.frame_width * codec_input.frame_height; if (pixel_count <= 1920 * 1080) pipe_penalty_codec = - pipe_penalty_iris33[avid_commercial_content + 1][0]; + pipe_penalty_pointer[avid_commercial_content + 1][0]; else if (pixel_count < 3840 * 2160) pipe_penalty_codec = - (pipe_penalty_iris33[avid_commercial_content + 1][0] + - pipe_penalty_iris33[avid_commercial_content + 1][1]) / 2; + (pipe_penalty_pointer[avid_commercial_content + 1][0] + + pipe_penalty_pointer[avid_commercial_content + 1][1]) / 2; else if ((pixel_count == 3840 * 2160) || (pixel_count == 4096 * 2160) || (pixel_count == 4096 * 2304)) pipe_penalty_codec = - pipe_penalty_iris33[avid_commercial_content + 1][1]; + pipe_penalty_pointer[avid_commercial_content + 1][1]; else if (pixel_count < 7680 * 4320) pipe_penalty_codec = - (pipe_penalty_iris33[avid_commercial_content + 1][1] + - pipe_penalty_iris33[avid_commercial_content + 1][2]) / 2; + (pipe_penalty_pointer[avid_commercial_content + 1][1] + + pipe_penalty_pointer[avid_commercial_content + 1][2]) / 2; else pipe_penalty_codec = - pipe_penalty_iris33[avid_commercial_content + 1][2]; + pipe_penalty_pointer[avid_commercial_content + 1][2]; } } else { pipe_penalty_codec = 101; From 092186c924e094689d99064cf4f6a8d24c0854b9 Mon Sep 17 00:00:00 2001 From: Vedang Nagar Date: Thu, 17 Aug 2023 19:43:40 +0530 Subject: [PATCH 0991/1061] Video: Driver: Add 8K@30fps support for cliffs [1] Add 8K@30 fps support for cliifs v0 SKU [2] Modify max mbpf and rt_mbpf for Cliffs v1 SKU. Change-Id: I03386e47ee53e32cf57711eecebd98201f399a5b Signed-off-by: Vedang Nagar --- driver/platform/cliffs/src/msm_vidc_cliffs.c | 22 ++++++++++++-------- 1 file changed, 13 insertions(+), 9 deletions(-) diff --git a/driver/platform/cliffs/src/msm_vidc_cliffs.c b/driver/platform/cliffs/src/msm_vidc_cliffs.c index 1deca1c1ea..2775123e3c 100644 --- a/driver/platform/cliffs/src/msm_vidc_cliffs.c +++ b/driver/platform/cliffs/src/msm_vidc_cliffs.c @@ -312,12 +312,13 @@ static struct msm_platform_core_capability core_data_cliffs_v0[] = { {DEC_CODECS, H264 | HEVC | VP9 | AV1 | HEIC}, {MAX_SESSION_COUNT, 16}, {MAX_NUM_720P_SESSIONS, 16}, - {MAX_NUM_1080P_SESSIONS, 8}, + {MAX_NUM_1080P_SESSIONS, 16}, {MAX_NUM_4K_SESSIONS, 4}, + {MAX_NUM_8K_SESSIONS, 1}, {MAX_SECURE_SESSION_COUNT, 3}, - {MAX_RT_MBPF, 65280}, /* (2 * ((3840x2176)/256)) */ - {MAX_MBPF, 139264}, /* (4 * ((4096x2176)/256))*/ - /* max_load 4096x2176@120fps */ + {MAX_RT_MBPF, 138240}, /* ((8192x4320)/256) */ + {MAX_MBPF, 173056}, /* (8192x4320)/256 + (4096*2176)/256*/ + /* max_load 4096x2176@120fps which is greater than 8192x4320@30fps */ /* Concurrency: UHD@30 decode + uhd@30 encode */ {MAX_MBPS, 4177920}, {MAX_IMAGE_MBPF, 1048576}, /* (16384x16384)/256 */ @@ -357,8 +358,8 @@ static struct msm_platform_core_capability core_data_cliffs_v1[] = { {MAX_NUM_1080P_SESSIONS, 8}, {MAX_NUM_4K_SESSIONS, 2}, {MAX_SECURE_SESSION_COUNT, 3}, - {MAX_RT_MBPF, 65280}, /* (2 * ((3840x2176)/256)) */ - {MAX_MBPF, 69632}, /* (2 * ((4096x2176)/256))*/ + {MAX_RT_MBPF, 69632}, /* (2 * ((4096x2176)/256)) */ + {MAX_MBPF, 104448}, /* (3 * ((4096x2176)/256))*/ /* max_load 4096x2176@60fps*/ {MAX_MBPS, 2088960}, /* Concurrency: UHD@30 decode + 1080p@30 encode */ {MAX_IMAGE_MBPF, 1048576}, /* (16384x16384)/256 */ @@ -400,7 +401,7 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v0[] = { 0, INT_MAX, 1, DRIVER_VERSION, V4L2_CID_MPEG_VIDC_DRIVER_VERSION}, - {FRAME_WIDTH, DEC, CODECS_ALL_V0, 96, 4096, 1, 1920}, + {FRAME_WIDTH, DEC, CODECS_ALL_V0, 96, 8192, 1, 1920}, {FRAME_WIDTH, DEC, VP9, 96, 4096, 1, 1920}, @@ -420,7 +421,7 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v0[] = { {SECURE_FRAME_WIDTH, ENC, HEVC, 96, 4096, 1, 1920}, - {FRAME_HEIGHT, DEC, CODECS_ALL_V0, 96, 4096, 1, 1080}, + {FRAME_HEIGHT, DEC, CODECS_ALL_V0, 96, 8192, 1, 1080}, {FRAME_HEIGHT, DEC, VP9, 96, 4096, 1, 1080}, @@ -490,8 +491,11 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v0[] = { /* ((16384x16384)/256) */ {MBPF, ENC, HEIC, 36, 1048576, 1, 1048576}, + /* (8192 * 4320) / 256 */ + {MBPF, DEC, CODECS_ALL_V0, 36, 138240, 1, 138240}, + /* (4096 * 2176) / 256 */ - {MBPF, DEC, CODECS_ALL_V0, 36, 34816, 1, 34816}, + {MBPF, DEC, VP9, 36, 34816, 1, 34816}, /* ((8192x8192)/256) */ {MBPF, DEC, HEIC, 64, 262144, 1, 262144 }, From e8ac66ef98453879d36ea05c515296e1fed11596 Mon Sep 17 00:00:00 2001 From: Zhongbo Shi Date: Mon, 18 Sep 2023 13:44:27 +0800 Subject: [PATCH 0992/1061] video: driver: fix AV1 resolution checking Fix AV1 resolution checking conditions for input bus voting. Change-Id: I24593ce425bd952fa9a053dfd08e6bfa880ca4fc Signed-off-by: Zhongbo Shi --- .../iris33/src/msm_vidc_power_iris33.c | 24 +++++++++---------- 1 file changed, 12 insertions(+), 12 deletions(-) diff --git a/driver/variant/iris33/src/msm_vidc_power_iris33.c b/driver/variant/iris33/src/msm_vidc_power_iris33.c index 0cbf48a4b3..8bc389b89d 100644 --- a/driver/variant/iris33/src/msm_vidc_power_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_power_iris33.c @@ -137,16 +137,16 @@ static int msm_vidc_init_codec_input_freq(struct msm_vidc_inst *inst, u32 data_s /* check resolution and tile info */ codec_input->av1d_commer_tile_enable = 1; - if (res_is_less_than_or_equal_to(1920, 1088, codec_input->frame_width, - codec_input->frame_height)) { + if (res_is_less_than_or_equal_to(codec_input->frame_width, + codec_input->frame_height, 1920, 1088)) { if (tile_rows_columns <= 2) codec_input->av1d_commer_tile_enable = 0; - } else if (res_is_less_than_or_equal_to(4096, 2172, codec_input->frame_width, - codec_input->frame_height)) { + } else if (res_is_less_than_or_equal_to(codec_input->frame_width, + codec_input->frame_height, 4096, 2172)) { if (tile_rows_columns <= 4) codec_input->av1d_commer_tile_enable = 0; - } else if (res_is_less_than_or_equal_to(8192, 4320, codec_input->frame_width, - codec_input->frame_height)) { + } else if (res_is_less_than_or_equal_to(codec_input->frame_width, + codec_input->frame_height, 8192, 4320)) { if (tile_rows_columns <= 16) codec_input->av1d_commer_tile_enable = 0; } @@ -304,16 +304,16 @@ static int msm_vidc_init_codec_input_bus(struct msm_vidc_inst *inst, struct vidc /* check resolution and tile info */ codec_input->av1d_commer_tile_enable = 1; - if (res_is_less_than_or_equal_to(1920, 1088, codec_input->frame_width, - codec_input->frame_height)) { + if (res_is_less_than_or_equal_to(codec_input->frame_width, + codec_input->frame_height, 1920, 1088)) { if (tile_rows_columns <= 2) codec_input->av1d_commer_tile_enable = 0; - } else if (res_is_less_than_or_equal_to(4096, 2172, codec_input->frame_width, - codec_input->frame_height)) { + } else if (res_is_less_than_or_equal_to(codec_input->frame_width, + codec_input->frame_height, 4096, 2172)) { if (tile_rows_columns <= 4) codec_input->av1d_commer_tile_enable = 0; - } else if (res_is_less_than_or_equal_to(8192, 4320, codec_input->frame_width, - codec_input->frame_height)) { + } else if (res_is_less_than_or_equal_to(codec_input->frame_width, + codec_input->frame_height, 8192, 4320)) { if (tile_rows_columns <= 16) codec_input->av1d_commer_tile_enable = 0; } From aee794dd80b3a4eaca20ce635193817cf1cb4158 Mon Sep 17 00:00:00 2001 From: Roopangkumar Patel Date: Tue, 19 Sep 2023 05:15:38 -0700 Subject: [PATCH 0993/1061] Revert "video-driver: frequency claculation for iris33_2p" This reverts commit 21eb1ee93a8a1412ce5052990759ca1728005005. Reason for revert: Causing Device crash issue. Change-Id: If37a4b5c6b880ff9995f4213fa508ca4a9f544d6 Signed-off-by: Roopangkumar Patel --- .../iris33/src/msm_vidc_clock_iris33.c | 76 +++++-------------- 1 file changed, 17 insertions(+), 59 deletions(-) diff --git a/driver/variant/iris33/src/msm_vidc_clock_iris33.c b/driver/variant/iris33/src/msm_vidc_clock_iris33.c index a6a0a56950..ebef355079 100644 --- a/driver/variant/iris33/src/msm_vidc_clock_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_clock_iris33.c @@ -22,11 +22,6 @@ static u32 frequency_table_iris33[2][6] = { {840, 720, 652, 570, 450, 294}, }; -static u32 frequency_table_iris33_2p[2][6] = { - /* //make lowsvs_D1 as invalid; */ - { 533, 444, 366, 338, 240, 192 }, - { 800, 666, 549, 507, 360, 288 }, -}; /* * TODO Move to pineapple.c @@ -73,15 +68,6 @@ static u32 pipe_penalty_iris33[3][3] = { {2039, 2464, 1191}, }; -static u32 pipe_penalty_iris33_2p[3][3] = { - /* NON AV1 */ - { 1059, 1059, 1059 }, - /* AV1 RECOMMENDED TILE 1080P_V2XH1, UHD_V2X2, 8KUHD_V8X2 */ - { 1123, 1079, 1079 }, - /* AV1 YOUTUBE/NETFLIX TILE 1080P_V4XH2_V4X1, UHD_V8X4_V8X1, 8KUHD_V8X8_V8X1 */ - { 1197, 1287, 1051 }, -}; - /* * Video IP Core Technology: bitrate constraint * HW limit bitrate table (these values are measured end to end fw/sw impacts are also considered) @@ -100,18 +86,6 @@ static u32 bitrate_table_iris33_2stage_fp[5][10] = { {130, 130, 120, 120, 120, 120, 120, 120, 120, 120}, }; -static u32 bitrate_table_iris33_2p_2stage_fp[5][10] = { - /* h264 cavlc */ - { 0, 220, 220, 220, 220, 220, 220, 220, 220, 220 }, - /* h264 cabac */ - { 0, 140, 150, 160, 160, 160, 160, 160, 160, 160 }, - /* h265 */ - { 90, 140, 160, 160, 160, 160, 160, 160, 160, 160 }, - /*vp9 */ - { 90, 90, 90, 90, 90, 90, 90, 90, 90, 90 }, - { 130, 130, 120, 120, 120, 120, 120, 120, 120, 120 }, -}; - /* * HW limit bitrate table (these values are measured * end to end fw/sw impacts are also considered) @@ -322,8 +296,6 @@ u32 get_bitrate_entry(u32 pixle_count) static int calculate_vsp_min_freq(struct api_calculation_input codec_input, struct api_calculation_freq_output *codec_output) { - u32 (*frequency_table_pointer)[6]; - u32 (*bitrate_table_2stage_pointer)[10]; /* * VSP calculation * different methodology from Lahaina @@ -345,14 +317,6 @@ static int calculate_vsp_min_freq(struct api_calculation_input codec_input, input_bitrate_fp = ((u32)(codec_input.bitrate_mbps * 100 + 99)) / 100; - if (codec_input.pipe_num == 4) { - frequency_table_pointer = frequency_table_iris33; - bitrate_table_2stage_pointer = bitrate_table_iris33_2stage_fp; - } else if (codec_input.pipe_num == 2) { - frequency_table_pointer = frequency_table_iris33_2p; - bitrate_table_2stage_pointer = bitrate_table_iris33_2p_2stage_fp; - } - /* 8KUHD60fps with B frame */ if ((pixle_count >= fp_pixel_count_bar0) && (codec_input.hierachical_layer != CODEC_GOP_IPP)) { @@ -370,26 +334,26 @@ static int calculate_vsp_min_freq(struct api_calculation_input codec_input, * TODO : Reduce these conditions by removing the zero entries from Bitrate table. */ - vsp_hw_min_frequency = frequency_table_pointer[0][2] * + vsp_hw_min_frequency = frequency_table_iris33[0][2] * input_bitrate_fp * 1000; if (codec_input.codec == CODEC_AV1) - vsp_hw_min_frequency = frequency_table_pointer[0][1] * + vsp_hw_min_frequency = frequency_table_iris33[0][1] * input_bitrate_fp * 1000; if ((codec_input.codec == CODEC_H264) || (codec_input.codec == CODEC_H264_CAVLC)) { - vsp_hw_min_frequency = (frequency_table_pointer[0][2] * 1000 + + vsp_hw_min_frequency = (frequency_table_iris33[0][2] * 1000 + (fw_sw_vsp_offset - 1)); vsp_hw_min_frequency = DIV_ROUND_UP(vsp_hw_min_frequency, fw_sw_vsp_offset); } else { if (codec_input.vsp_vpp_mode == CODEC_VSPVPP_MODE_2S) { vsp_hw_min_frequency = vsp_hw_min_frequency + - (bitrate_table_2stage_pointer[codec][0] * + (bitrate_table_iris33_2stage_fp[codec][0] * fw_sw_vsp_offset - 1); vsp_hw_min_frequency = DIV_ROUND_UP(vsp_hw_min_frequency, - (bitrate_table_2stage_pointer[codec][0]) * + (bitrate_table_iris33_2stage_fp[codec][0]) * fw_sw_vsp_offset); } else { vsp_hw_min_frequency = vsp_hw_min_frequency + @@ -401,19 +365,19 @@ static int calculate_vsp_min_freq(struct api_calculation_input codec_input, } } } else { - vsp_hw_min_frequency = frequency_table_pointer[0][2] * + vsp_hw_min_frequency = frequency_table_iris33[0][2] * input_bitrate_fp * 1000; if (codec_input.codec == CODEC_AV1 && bitrate_entry == 1) - vsp_hw_min_frequency = frequency_table_pointer[0][1] * + vsp_hw_min_frequency = frequency_table_iris33[0][1] * input_bitrate_fp * 1000; if (codec_input.vsp_vpp_mode == CODEC_VSPVPP_MODE_2S) { vsp_hw_min_frequency = vsp_hw_min_frequency + - (bitrate_table_2stage_pointer[codec][bitrate_entry] * + (bitrate_table_iris33_2stage_fp[codec][bitrate_entry] * fw_sw_vsp_offset - 1); vsp_hw_min_frequency = DIV_ROUND_UP(vsp_hw_min_frequency, - (bitrate_table_2stage_pointer[codec][bitrate_entry]) * + (bitrate_table_iris33_2stage_fp[codec][bitrate_entry]) * fw_sw_vsp_offset); } else { vsp_hw_min_frequency = vsp_hw_min_frequency + @@ -434,37 +398,31 @@ static u32 calculate_pipe_penalty(struct api_calculation_input codec_input) u32 pipe_penalty_codec = 0; u8 avid_commercial_content = 0; u32 pixel_count = 0; - u32 (*pipe_penalty_pointer)[3]; - - if (codec_input.pipe_num == 4) - pipe_penalty_pointer = pipe_penalty_iris33; - else if (codec_input.pipe_num == 2) - pipe_penalty_pointer = pipe_penalty_iris33_2p; /* decoder */ if (codec_input.decoder_or_encoder == CODEC_DECODER) { - pipe_penalty_codec = pipe_penalty_pointer[0][0]; + pipe_penalty_codec = pipe_penalty_iris33[0][0]; avid_commercial_content = codec_input.av1d_commer_tile_enable; if (codec_input.codec == CODEC_AV1) { pixel_count = codec_input.frame_width * codec_input.frame_height; if (pixel_count <= 1920 * 1080) pipe_penalty_codec = - pipe_penalty_pointer[avid_commercial_content + 1][0]; + pipe_penalty_iris33[avid_commercial_content + 1][0]; else if (pixel_count < 3840 * 2160) pipe_penalty_codec = - (pipe_penalty_pointer[avid_commercial_content + 1][0] + - pipe_penalty_pointer[avid_commercial_content + 1][1]) / 2; + (pipe_penalty_iris33[avid_commercial_content + 1][0] + + pipe_penalty_iris33[avid_commercial_content + 1][1]) / 2; else if ((pixel_count == 3840 * 2160) || (pixel_count == 4096 * 2160) || (pixel_count == 4096 * 2304)) pipe_penalty_codec = - pipe_penalty_pointer[avid_commercial_content + 1][1]; + pipe_penalty_iris33[avid_commercial_content + 1][1]; else if (pixel_count < 7680 * 4320) pipe_penalty_codec = - (pipe_penalty_pointer[avid_commercial_content + 1][1] + - pipe_penalty_pointer[avid_commercial_content + 1][2]) / 2; + (pipe_penalty_iris33[avid_commercial_content + 1][1] + + pipe_penalty_iris33[avid_commercial_content + 1][2]) / 2; else pipe_penalty_codec = - pipe_penalty_pointer[avid_commercial_content + 1][2]; + pipe_penalty_iris33[avid_commercial_content + 1][2]; } } else { pipe_penalty_codec = 101; From bc8a2161c070276b07364e74fdd857f5dd4b4876 Mon Sep 17 00:00:00 2001 From: Megha Byahatti Date: Tue, 26 Sep 2023 10:17:46 +0530 Subject: [PATCH 0994/1061] video-driver: frequency claculation for iris33_2p -Add frequency, pipe penalty and bitrate table for iris33_2p to calculate vsp frequency. Change-Id: I217fc587d534909fb72e5f5824ef4dc8df8da58c Signed-off-by: Megha Byahatti --- .../iris33/src/msm_vidc_clock_iris33.c | 80 +++++++++++++++---- 1 file changed, 63 insertions(+), 17 deletions(-) diff --git a/driver/variant/iris33/src/msm_vidc_clock_iris33.c b/driver/variant/iris33/src/msm_vidc_clock_iris33.c index ebef355079..ac5431514f 100644 --- a/driver/variant/iris33/src/msm_vidc_clock_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_clock_iris33.c @@ -22,6 +22,11 @@ static u32 frequency_table_iris33[2][6] = { {840, 720, 652, 570, 450, 294}, }; +static u32 frequency_table_iris33_2p[2][6] = { + /* //make lowsvs_D1 as invalid; */ + { 533, 444, 366, 338, 240, 192 }, + { 800, 666, 549, 507, 360, 288 }, +}; /* * TODO Move to pineapple.c @@ -68,6 +73,15 @@ static u32 pipe_penalty_iris33[3][3] = { {2039, 2464, 1191}, }; +static u32 pipe_penalty_iris33_2p[3][3] = { + /* NON AV1 */ + { 1059, 1059, 1059 }, + /* AV1 RECOMMENDED TILE 1080P_V2XH1, UHD_V2X2, 8KUHD_V8X2 */ + { 1123, 1079, 1079 }, + /* AV1 YOUTUBE/NETFLIX TILE 1080P_V4XH2_V4X1, UHD_V8X4_V8X1, 8KUHD_V8X8_V8X1 */ + { 1197, 1287, 1051 }, +}; + /* * Video IP Core Technology: bitrate constraint * HW limit bitrate table (these values are measured end to end fw/sw impacts are also considered) @@ -86,6 +100,18 @@ static u32 bitrate_table_iris33_2stage_fp[5][10] = { {130, 130, 120, 120, 120, 120, 120, 120, 120, 120}, }; +static u32 bitrate_table_iris33_2p_2stage_fp[5][10] = { + /* h264 cavlc */ + { 0, 220, 220, 220, 220, 220, 220, 220, 220, 220 }, + /* h264 cabac */ + { 0, 140, 150, 160, 160, 160, 160, 160, 160, 160 }, + /* h265 */ + { 90, 140, 160, 160, 160, 160, 160, 160, 160, 160 }, + /*vp9 */ + { 90, 90, 90, 90, 90, 90, 90, 90, 90, 90 }, + { 130, 130, 120, 120, 120, 120, 120, 120, 120, 120 }, +}; + /* * HW limit bitrate table (these values are measured * end to end fw/sw impacts are also considered) @@ -296,6 +322,8 @@ u32 get_bitrate_entry(u32 pixle_count) static int calculate_vsp_min_freq(struct api_calculation_input codec_input, struct api_calculation_freq_output *codec_output) { + u32 frequency_table_value[2][6]; + u32 bitrate_table_2stage_value[5][10]; /* * VSP calculation * different methodology from Lahaina @@ -317,6 +345,18 @@ static int calculate_vsp_min_freq(struct api_calculation_input codec_input, input_bitrate_fp = ((u32)(codec_input.bitrate_mbps * 100 + 99)) / 100; + if (codec_input.pipe_num == 4) { + memcpy(frequency_table_value, frequency_table_iris33, + sizeof(frequency_table_value)); + memcpy(bitrate_table_2stage_value, bitrate_table_iris33_2stage_fp, + sizeof(bitrate_table_2stage_value)); + } else if (codec_input.pipe_num == 2) { + memcpy(frequency_table_value, frequency_table_iris33_2p, + sizeof(frequency_table_value)); + memcpy(bitrate_table_2stage_value, bitrate_table_iris33_2p_2stage_fp, + sizeof(bitrate_table_2stage_value)); + } + /* 8KUHD60fps with B frame */ if ((pixle_count >= fp_pixel_count_bar0) && (codec_input.hierachical_layer != CODEC_GOP_IPP)) { @@ -334,26 +374,26 @@ static int calculate_vsp_min_freq(struct api_calculation_input codec_input, * TODO : Reduce these conditions by removing the zero entries from Bitrate table. */ - vsp_hw_min_frequency = frequency_table_iris33[0][2] * + vsp_hw_min_frequency = frequency_table_value[0][2] * input_bitrate_fp * 1000; if (codec_input.codec == CODEC_AV1) - vsp_hw_min_frequency = frequency_table_iris33[0][1] * + vsp_hw_min_frequency = frequency_table_value[0][1] * input_bitrate_fp * 1000; if ((codec_input.codec == CODEC_H264) || (codec_input.codec == CODEC_H264_CAVLC)) { - vsp_hw_min_frequency = (frequency_table_iris33[0][2] * 1000 + + vsp_hw_min_frequency = (frequency_table_value[0][2] * 1000 + (fw_sw_vsp_offset - 1)); vsp_hw_min_frequency = DIV_ROUND_UP(vsp_hw_min_frequency, fw_sw_vsp_offset); } else { if (codec_input.vsp_vpp_mode == CODEC_VSPVPP_MODE_2S) { vsp_hw_min_frequency = vsp_hw_min_frequency + - (bitrate_table_iris33_2stage_fp[codec][0] * + (bitrate_table_2stage_value[codec][0] * fw_sw_vsp_offset - 1); vsp_hw_min_frequency = DIV_ROUND_UP(vsp_hw_min_frequency, - (bitrate_table_iris33_2stage_fp[codec][0]) * + (bitrate_table_2stage_value[codec][0]) * fw_sw_vsp_offset); } else { vsp_hw_min_frequency = vsp_hw_min_frequency + @@ -365,19 +405,19 @@ static int calculate_vsp_min_freq(struct api_calculation_input codec_input, } } } else { - vsp_hw_min_frequency = frequency_table_iris33[0][2] * + vsp_hw_min_frequency = frequency_table_value[0][2] * input_bitrate_fp * 1000; if (codec_input.codec == CODEC_AV1 && bitrate_entry == 1) - vsp_hw_min_frequency = frequency_table_iris33[0][1] * + vsp_hw_min_frequency = frequency_table_value[0][1] * input_bitrate_fp * 1000; if (codec_input.vsp_vpp_mode == CODEC_VSPVPP_MODE_2S) { vsp_hw_min_frequency = vsp_hw_min_frequency + - (bitrate_table_iris33_2stage_fp[codec][bitrate_entry] * + (bitrate_table_2stage_value[codec][bitrate_entry] * fw_sw_vsp_offset - 1); vsp_hw_min_frequency = DIV_ROUND_UP(vsp_hw_min_frequency, - (bitrate_table_iris33_2stage_fp[codec][bitrate_entry]) * + (bitrate_table_2stage_value[codec][bitrate_entry]) * fw_sw_vsp_offset); } else { vsp_hw_min_frequency = vsp_hw_min_frequency + @@ -398,31 +438,37 @@ static u32 calculate_pipe_penalty(struct api_calculation_input codec_input) u32 pipe_penalty_codec = 0; u8 avid_commercial_content = 0; u32 pixel_count = 0; + u32 pipe_penalty_value[3][3]; + + if (codec_input.pipe_num == 4) + memcpy(pipe_penalty_value, pipe_penalty_iris33, sizeof(pipe_penalty_value)); + else if (codec_input.pipe_num == 2) + memcpy(pipe_penalty_value, pipe_penalty_iris33_2p, sizeof(pipe_penalty_value)); /* decoder */ if (codec_input.decoder_or_encoder == CODEC_DECODER) { - pipe_penalty_codec = pipe_penalty_iris33[0][0]; + pipe_penalty_codec = pipe_penalty_value[0][0]; avid_commercial_content = codec_input.av1d_commer_tile_enable; if (codec_input.codec == CODEC_AV1) { pixel_count = codec_input.frame_width * codec_input.frame_height; if (pixel_count <= 1920 * 1080) pipe_penalty_codec = - pipe_penalty_iris33[avid_commercial_content + 1][0]; + pipe_penalty_value[avid_commercial_content + 1][0]; else if (pixel_count < 3840 * 2160) pipe_penalty_codec = - (pipe_penalty_iris33[avid_commercial_content + 1][0] + - pipe_penalty_iris33[avid_commercial_content + 1][1]) / 2; + (pipe_penalty_value[avid_commercial_content + 1][0] + + pipe_penalty_value[avid_commercial_content + 1][1]) / 2; else if ((pixel_count == 3840 * 2160) || (pixel_count == 4096 * 2160) || (pixel_count == 4096 * 2304)) pipe_penalty_codec = - pipe_penalty_iris33[avid_commercial_content + 1][1]; + pipe_penalty_value[avid_commercial_content + 1][1]; else if (pixel_count < 7680 * 4320) pipe_penalty_codec = - (pipe_penalty_iris33[avid_commercial_content + 1][1] + - pipe_penalty_iris33[avid_commercial_content + 1][2]) / 2; + (pipe_penalty_value[avid_commercial_content + 1][1] + + pipe_penalty_value[avid_commercial_content + 1][2]) / 2; else pipe_penalty_codec = - pipe_penalty_iris33[avid_commercial_content + 1][2]; + pipe_penalty_value[avid_commercial_content + 1][2]; } } else { pipe_penalty_codec = 101; From edec2460ee2884832dff9bcfc7112a1e6d0576bd Mon Sep 17 00:00:00 2001 From: Megha Byahatti Date: Thu, 28 Sep 2023 15:48:58 +0530 Subject: [PATCH 0995/1061] video: driver: Add iris33_2p values for BW calculation - iris3 2pipe uses 768 vertical tile width for IPP GoP. Handle the values for iris33_2p for BW calculations. Change-Id: I8b28e5037e62175479587550973af035f0ede044 Signed-off-by: Megha Byahatti --- .../variant/iris33/src/msm_vidc_bus_iris33.c | 31 ++++++++++++++++--- 1 file changed, 26 insertions(+), 5 deletions(-) diff --git a/driver/variant/iris33/src/msm_vidc_bus_iris33.c b/driver/variant/iris33/src/msm_vidc_bus_iris33.c index 04036fb4ef..bb0c7cf5aa 100644 --- a/driver/variant/iris33/src/msm_vidc_bus_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_bus_iris33.c @@ -243,9 +243,10 @@ static int calculate_bandwidth_decoder_iris33( u32 dpb_to_opb_ratios_ds = 1; - u8 llc_enabled_ref_y_rd = 1; - u8 llc_enable_ref_crcb_rd = 1; - u8 llc_enabled_bse_tlb = 1; + u8 llc_enabled_ref_y_rd; + u8 llc_enable_ref_crcb_rd; + u8 llc_enabled_bse_tlb; + /* this is for 2pipe and 1pipe LLC */ u8 llc_enable_probtable_av1d_21pipe = 0; @@ -265,6 +266,16 @@ static int calculate_bandwidth_decoder_iris33( u32 large_bw_calculation_fp = 0; + if (codec_input.pipe_num == 4) { + llc_enabled_ref_y_rd = 1; + llc_enable_ref_crcb_rd = 1; + llc_enabled_bse_tlb = 1; + } else if (codec_input.pipe_num == 2) { + llc_enabled_ref_y_rd = 0; // llc 128kb for palawan + llc_enable_ref_crcb_rd = 0; + llc_enabled_bse_tlb = (codec_input.status_llc_onoff == 1) ? 1 : 0; + } + llc_enabled_ref_y_rd = (codec_input.status_llc_onoff) ? 1 : 0; llc_enable_ref_crcb_rd = (codec_input.status_llc_onoff) ? 1 : 0; /* H265D BSE tlb in LLC will be pored in Kailua */ @@ -661,8 +672,8 @@ static int calculate_bandwidth_encoder_iris33( u32 reference_y_read_bw_factor; u32 reference_crcb_read_bw_factor; - /* encoder control parameters */ u32 en_vertical_tiles_width = 960; + u32 en_search_windows_size_horizontal = 96; u8 en_rotation_90_270 = 0; /* TODO Can we use (codec_input.status_llc_onoff) for enc_llc_*? */ @@ -671,7 +682,6 @@ static int calculate_bandwidth_encoder_iris33( u8 en_llc_enable_ref_rd_y_overlap = 0; u32 en_bins_to_bits_factor = 4; - u32 en_search_windows_size_horizontal = 96; u32 en_tile_number; u32 ipb_compression_factor_y; @@ -686,6 +696,17 @@ static int calculate_bandwidth_encoder_iris33( /*H265D BSE tlb in LLC will be pored in Kailua */ llc_enabled_bse_tlb = (codec_input.status_llc_onoff) ? 1 : 0; + /* encoder control parameters + * iris3 2pipe uses 768 vertical tile width for IPP GoP + */ + if (codec_input.pipe_num == 2) { + en_vertical_tiles_width = + (codec_input.hierachical_layer == CODEC_GOP_IPP) ? 768 : 576; + // search ranges for iris3 2pipe + en_search_windows_size_horizontal = + (codec_input.hierachical_layer == CODEC_GOP_IPP) ? 192 : 96; + } + frame_width = codec_input.frame_width; frame_height = codec_input.frame_height; if ((codec_input.codec == CODEC_H264) || From d1768ab1fe695e3fa7a77668dbfb9ba34a3c0dc1 Mon Sep 17 00:00:00 2001 From: Megha Byahatti Date: Fri, 22 Sep 2023 17:00:21 +0530 Subject: [PATCH 0996/1061] video: driver: Add fuse register IRIS_DISABLE_AV1 - AB sku does not support for AV1. Adding fuse register IRIS_DISABLE_AV1 to disable based on sku version. Change-Id: Ib8408b67072ca5aa42cba4ab7451add26968ff8e Signed-off-by: Megha Byahatti --- driver/platform/cliffs/src/msm_vidc_cliffs.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/driver/platform/cliffs/src/msm_vidc_cliffs.c b/driver/platform/cliffs/src/msm_vidc_cliffs.c index 2775123e3c..d879c6a0a7 100644 --- a/driver/platform/cliffs/src/msm_vidc_cliffs.c +++ b/driver/platform/cliffs/src/msm_vidc_cliffs.c @@ -352,7 +352,7 @@ static struct msm_platform_core_capability core_data_cliffs_v0[] = { static struct msm_platform_core_capability core_data_cliffs_v1[] = { /* {type, value} */ {ENC_CODECS, H264 | HEVC | HEIC}, - {DEC_CODECS, H264 | HEVC | VP9 | AV1 | HEIC}, + {DEC_CODECS, H264 | HEVC | VP9 | HEIC}, {MAX_SESSION_COUNT, 16}, {MAX_NUM_720P_SESSIONS, 16}, {MAX_NUM_1080P_SESSIONS, 8}, @@ -5072,8 +5072,8 @@ static const u32 cliffs_vdec_output_properties_av1[] = { }; static struct msm_vidc_efuse_data efuse_data_cliffs[] = { - EFUSE_ENTRY(0x221C8118, 4, 0x1000, 0xB, SKU_VERSION), - EFUSE_ENTRY(0x221C812C, 4, 0x40, 0x6, SKU_VERSION), + /* IRIS_DISABLE_AV1, SKU VERSION: 1 */ + EFUSE_ENTRY(0x221C8118, 4, 0x2000, 0xD, SKU_VERSION), }; static const struct msm_vidc_platform_data cliffs_data_v0 = { From 0adf92624211904c71bfbeb051b166d0010f84a4 Mon Sep 17 00:00:00 2001 From: Megha Byahatti Date: Thu, 28 Sep 2023 17:43:36 +0530 Subject: [PATCH 0997/1061] video: driver: Update Max resolution for AC sku - Max resolution supported is 7680x4320 for AC sku. Update resolution and MBPF accordingly. Change-Id: I84ed70f3cdd8eadee02d7c524dc9d12f48d8c7af Signed-off-by: Megha Byahatti --- driver/platform/cliffs/src/msm_vidc_cliffs.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/driver/platform/cliffs/src/msm_vidc_cliffs.c b/driver/platform/cliffs/src/msm_vidc_cliffs.c index 2775123e3c..e4fec66bf7 100644 --- a/driver/platform/cliffs/src/msm_vidc_cliffs.c +++ b/driver/platform/cliffs/src/msm_vidc_cliffs.c @@ -316,9 +316,9 @@ static struct msm_platform_core_capability core_data_cliffs_v0[] = { {MAX_NUM_4K_SESSIONS, 4}, {MAX_NUM_8K_SESSIONS, 1}, {MAX_SECURE_SESSION_COUNT, 3}, - {MAX_RT_MBPF, 138240}, /* ((8192x4320)/256) */ - {MAX_MBPF, 173056}, /* (8192x4320)/256 + (4096*2176)/256*/ - /* max_load 4096x2176@120fps which is greater than 8192x4320@30fps */ + {MAX_RT_MBPF, 139264}, /* (4 * ((4096*2176)/256)) */ + {MAX_MBPF, 139264}, /* (4 * ((4096*2176)/256)) */ + /* max_load 4096x2176@120fps which is greater than 7680x4320@30fps */ /* Concurrency: UHD@30 decode + uhd@30 encode */ {MAX_MBPS, 4177920}, {MAX_IMAGE_MBPF, 1048576}, /* (16384x16384)/256 */ @@ -401,7 +401,7 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v0[] = { 0, INT_MAX, 1, DRIVER_VERSION, V4L2_CID_MPEG_VIDC_DRIVER_VERSION}, - {FRAME_WIDTH, DEC, CODECS_ALL_V0, 96, 8192, 1, 1920}, + {FRAME_WIDTH, DEC, CODECS_ALL_V0, 96, 7680, 1, 1920}, {FRAME_WIDTH, DEC, VP9, 96, 4096, 1, 1920}, @@ -421,7 +421,7 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v0[] = { {SECURE_FRAME_WIDTH, ENC, HEVC, 96, 4096, 1, 1920}, - {FRAME_HEIGHT, DEC, CODECS_ALL_V0, 96, 8192, 1, 1080}, + {FRAME_HEIGHT, DEC, CODECS_ALL_V0, 96, 7680, 1, 1080}, {FRAME_HEIGHT, DEC, VP9, 96, 4096, 1, 1080}, @@ -491,8 +491,8 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v0[] = { /* ((16384x16384)/256) */ {MBPF, ENC, HEIC, 36, 1048576, 1, 1048576}, - /* (8192 * 4320) / 256 */ - {MBPF, DEC, CODECS_ALL_V0, 36, 138240, 1, 138240}, + /* (4 * ((4096 * 2176)/256) */ + {MBPF, DEC, CODECS_ALL_V0, 36, 139264, 1, 139264}, /* (4096 * 2176) / 256 */ {MBPF, DEC, VP9, 36, 34816, 1, 34816}, From cd99a0409976d78ce18448503d74180fea657aac Mon Sep 17 00:00:00 2001 From: Megha Byahatti Date: Fri, 6 Oct 2023 12:46:02 +0530 Subject: [PATCH 0998/1061] video: driver: Add QoS registers for cliffs - Add QoS registers for cliffs. Change-Id: I7f16141283b5740e550139c311f10289e381c4a8 Signed-off-by: Megha Byahatti --- driver/platform/cliffs/src/msm_vidc_cliffs.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/driver/platform/cliffs/src/msm_vidc_cliffs.c b/driver/platform/cliffs/src/msm_vidc_cliffs.c index e4fec66bf7..57b8dbc75b 100644 --- a/driver/platform/cliffs/src/msm_vidc_cliffs.c +++ b/driver/platform/cliffs/src/msm_vidc_cliffs.c @@ -4947,7 +4947,11 @@ static struct freq_table cliffs_freq_table[] = { /* register, value, mask */ static const struct reg_preset_table cliffs_reg_preset_table[] = { - { 0xB0088, 0x0, 0x11}, + { 0xB0088, 0x0, 0x11 }, + { 0x10830, 0x33332222, 0xFFFFFFFF}, + { 0x10834, 0x44444444, 0xFFFFFFFF}, + { 0x10838, 0x00001022, 0xFFFFFFFF}, + { 0xA013C, 0x99, 0xFFFFFFFF}, }; /* name, phys_addr, size, device_addr, device region type */ From f66a492476304061e0a8ba683b67f20db197552d Mon Sep 17 00:00:00 2001 From: Zhongbo Shi Date: Fri, 15 Sep 2023 16:45:36 +0800 Subject: [PATCH 0999/1061] video: driver: fix inconsistency in clock calculation Fix inconsistency in clock and bandwidth calculation compared with C model. Change-Id: Ie3fbeb792a152de3a96687e96db7413fbf98c69b Signed-off-by: Zhongbo Shi --- driver/variant/iris33/src/msm_vidc_bus_iris33.c | 2 +- driver/variant/iris33/src/msm_vidc_clock_iris33.c | 1 - 2 files changed, 1 insertion(+), 2 deletions(-) diff --git a/driver/variant/iris33/src/msm_vidc_bus_iris33.c b/driver/variant/iris33/src/msm_vidc_bus_iris33.c index 04036fb4ef..93b1be1dfc 100644 --- a/driver/variant/iris33/src/msm_vidc_bus_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_bus_iris33.c @@ -719,7 +719,7 @@ static int calculate_bandwidth_encoder_iris33( } else { /* RGBA */ frame420_y_bw_linear_8bpp = ((calculate_number_ubwctiles_iris33(frame_width, frame_height, - 6, 4) * 256 * codec_input.frame_rate + 999) / 1000 + 999) / 1000; + 16, 4) * 256 * codec_input.frame_rate + 999) / 1000 + 999) / 1000; } frame420_y_bw_no_ubwc_tile_10bpp = diff --git a/driver/variant/iris33/src/msm_vidc_clock_iris33.c b/driver/variant/iris33/src/msm_vidc_clock_iris33.c index 02ed8d8864..052b0d81b3 100644 --- a/driver/variant/iris33/src/msm_vidc_clock_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_clock_iris33.c @@ -474,7 +474,6 @@ static int calculate_vpp_min_freq(struct api_calculation_input codec_input, if (codec_input.vsp_vpp_mode == CODEC_VSPVPP_MODE_2S) { /* FW overhead, convert FW cycles to impact to one pipe */ - u64 decoder_vpp_fw_overhead = 0; decoder_vpp_fw_overhead = DIV_ROUND_UP((decoder_vpp_fw_overhead * 10 * From 7aab37a3e6db72b782a84af9e05bf71243eae1e2 Mon Sep 17 00:00:00 2001 From: Megha Byahatti Date: Thu, 12 Oct 2023 16:42:23 +0530 Subject: [PATCH 1000/1061] video: driver: Align Max_RT_MBPF with Max_MBPS MAX_RT_MBPF was limited to 8k+4k even though 2 8k UHD sessions are allowed. When client tries to open 2 8k UHD session, the session will be rejected. Supported real-time MAX_MBPS is 8k UHD @60fps, so aligning the MAX_RT_MBPF as 2 8k UHD session @30fps. Change-Id: I71de0dfa297044487b260283c0af56b052d61514 Signed-off-by: Megha Byahatti --- driver/platform/pineapple/src/msm_vidc_pineapple.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/driver/platform/pineapple/src/msm_vidc_pineapple.c b/driver/platform/pineapple/src/msm_vidc_pineapple.c index 064b1f34b9..293e846035 100644 --- a/driver/platform/pineapple/src/msm_vidc_pineapple.c +++ b/driver/platform/pineapple/src/msm_vidc_pineapple.c @@ -290,7 +290,7 @@ static struct msm_platform_core_capability core_data_pineapple[] = { {MAX_NUM_4K_SESSIONS, 8}, {MAX_NUM_8K_SESSIONS, 2}, {MAX_SECURE_SESSION_COUNT, 3}, - {MAX_RT_MBPF, 174080}, /* (8192x4352)/256 + (4096x2176)/256*/ + {MAX_RT_MBPF, 259200}, /* ((7680x4320)/256) * 2)*/ {MAX_MBPF, 278528}, /* ((8192x4352)/256) * 2 */ {MAX_MBPS, 7833600}, /* max_load From 5db37cb85ff371ed15c7267effb5efc4fa4cd983 Mon Sep 17 00:00:00 2001 From: Megha Byahatti Date: Mon, 16 Oct 2023 10:34:33 +0530 Subject: [PATCH 1001/1061] video: driver: Disable mmrm support for cliffs - Disable mmrm support for cliffs target. Change-Id: I7175404c6196d5d37f805fb45b8a79e42d079dde Signed-off-by: Megha Byahatti --- driver/platform/cliffs/src/msm_vidc_cliffs.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/driver/platform/cliffs/src/msm_vidc_cliffs.c b/driver/platform/cliffs/src/msm_vidc_cliffs.c index 2c92cd010b..fa60330b45 100644 --- a/driver/platform/cliffs/src/msm_vidc_cliffs.c +++ b/driver/platform/cliffs/src/msm_vidc_cliffs.c @@ -5106,7 +5106,7 @@ static const struct msm_vidc_platform_data cliffs_data_v0 = { .dev_reg_tbl_size = ARRAY_SIZE(cliffs_device_region_table), .fwname = "vpu30_2v", .pas_id = 9, - .supports_mmrm = 1, + .supports_mmrm = 0, .vpu_ver = VPU_VERSION_IRIS33_2P, /* caps related resorces */ @@ -5180,7 +5180,7 @@ static const struct msm_vidc_platform_data cliffs_data_v1 = { .dev_reg_tbl_size = ARRAY_SIZE(cliffs_device_region_table), .fwname = "vpu30_2v", .pas_id = 9, - .supports_mmrm = 1, + .supports_mmrm = 0, /* caps related resorces */ .core_data = core_data_cliffs_v1, From d3bbee3e7061c0bbed48ac68c48125cc93865756 Mon Sep 17 00:00:00 2001 From: Megha Byahatti Date: Thu, 19 Oct 2023 12:17:18 +0530 Subject: [PATCH 1002/1061] video: driver: Update videocc clock header file Update videocc-pineapple.h clock header file in cliffs platform file. Change-Id: I584b4460b2bd669decae2fcbde559c436f6e7b41 Signed-off-by: Megha Byahatti --- driver/platform/cliffs/src/msm_vidc_cliffs.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/driver/platform/cliffs/src/msm_vidc_cliffs.c b/driver/platform/cliffs/src/msm_vidc_cliffs.c index fa60330b45..fa314d90d5 100644 --- a/driver/platform/cliffs/src/msm_vidc_cliffs.c +++ b/driver/platform/cliffs/src/msm_vidc_cliffs.c @@ -5,7 +5,7 @@ */ #include -#include +#include #include #include From 8c348bd3b60e548f4ddd3236059a8a66766c2e95 Mon Sep 17 00:00:00 2001 From: Ankush Mitra Date: Fri, 20 Oct 2023 10:55:47 +0530 Subject: [PATCH 1003/1061] video: driver: make a single relation entry for BIT_RATE Remove redundant entry in kalama DB. Change-Id: I23fe2d2357c3ad6cee755bc7cce7a00845f10539 Signed-off-by: Ankush Mitra --- driver/platform/kalama/src/msm_vidc_kalama.c | 7 +------ 1 file changed, 1 insertion(+), 6 deletions(-) diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index 8dc94a4988..2765437991 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -2091,12 +2091,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kala NULL, msm_vidc_set_req_sync_frame}, - {BIT_RATE, ENC, H264, - {PEAK_BITRATE, BITRATE_BOOST, L0_BR}, - msm_vidc_adjust_bitrate, - msm_vidc_set_bitrate}, - - {BIT_RATE, ENC, HEVC, + {BIT_RATE, ENC, H264 | HEVC, {PEAK_BITRATE, BITRATE_BOOST, L0_BR}, msm_vidc_adjust_bitrate, msm_vidc_set_bitrate}, From c04df20bb04f123b2d782a1aada3726515495ace Mon Sep 17 00:00:00 2001 From: Ankush Mitra Date: Fri, 20 Oct 2023 11:14:21 +0530 Subject: [PATCH 1004/1061] video: driver: remove redundant entry for STAGE remove redundant entry for STAGE in Kalama DB. Change-Id: I95a1268b432bd73b94d85e8b079f9aebc99236ca Signed-off-by: Ankush Mitra --- driver/platform/kalama/src/msm_vidc_kalama.c | 10 ---------- 1 file changed, 10 deletions(-) diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index 2765437991..4122943e1f 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -2451,16 +2451,6 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kala NULL, msm_vidc_set_stage}, - {STAGE, ENC, H264 | HEVC, - {0}, - NULL, - msm_vidc_set_stage}, - - {STAGE, DEC, H264 | HEVC | VP9 | AV1, - {0}, - NULL, - msm_vidc_set_stage}, - {PIPE, DEC | ENC, CODECS_ALL, {0}, NULL, From 040189c33573579c9b4d8c95501448c35f13bc61 Mon Sep 17 00:00:00 2001 From: Ankush Mitra Date: Fri, 20 Oct 2023 11:16:02 +0530 Subject: [PATCH 1005/1061] video: driver: remove redundant entry for HOST_MAX count Remove redundant entry for HOST_MAX count. Change-Id: I94cb015ef6474bb42e367ca207d54a58894e7a5b Signed-off-by: Ankush Mitra --- driver/platform/kalama/src/msm_vidc_kalama.c | 10 ---------- 1 file changed, 10 deletions(-) diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index 4122943e1f..7d0ee6f8bc 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -2421,21 +2421,11 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kala msm_vidc_adjust_input_buf_host_max_count, msm_vidc_set_u32}, - {INPUT_BUF_HOST_MAX_COUNT, ENC, H264 | HEVC, - {0}, - msm_vidc_adjust_input_buf_host_max_count, - msm_vidc_set_u32}, - {OUTPUT_BUF_HOST_MAX_COUNT, ENC | DEC, CODECS_ALL, {0}, msm_vidc_adjust_output_buf_host_max_count, msm_vidc_set_u32}, - {OUTPUT_BUF_HOST_MAX_COUNT, ENC, H264 | HEVC, - {0}, - msm_vidc_adjust_output_buf_host_max_count, - msm_vidc_set_u32}, - {CONCEAL_COLOR_8BIT, DEC, CODECS_ALL, {0}, NULL, From f30710a586cb01a3927050865702f54eb548b638 Mon Sep 17 00:00:00 2001 From: Ankush Mitra Date: Fri, 20 Oct 2023 11:18:11 +0530 Subject: [PATCH 1006/1061] video: driver: merge BIT_RATE entry Merge BIT_RATE entry to remove redundancy. Change-Id: I1356e7c643a0d790a264465729cac865f583f022 Signed-off-by: Ankush Mitra --- driver/platform/waipio/src/waipio.c | 7 +------ 1 file changed, 1 insertion(+), 6 deletions(-) diff --git a/driver/platform/waipio/src/waipio.c b/driver/platform/waipio/src/waipio.c index fd80d05cb6..a3b6a080ca 100644 --- a/driver/platform/waipio/src/waipio.c +++ b/driver/platform/waipio/src/waipio.c @@ -1285,12 +1285,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_waip NULL, msm_vidc_set_req_sync_frame}, - {BIT_RATE, ENC, H264, - {PEAK_BITRATE, L0_BR}, - msm_vidc_adjust_bitrate, - msm_vidc_set_bitrate}, - - {BIT_RATE, ENC, HEVC, + {BIT_RATE, ENC, H264 | HEVC, {PEAK_BITRATE, L0_BR}, msm_vidc_adjust_bitrate, msm_vidc_set_bitrate}, From 381356fbe7385bfdf3c878c3c7e9e3cdbe7ce1ab Mon Sep 17 00:00:00 2001 From: Ankush Mitra Date: Fri, 20 Oct 2023 11:20:01 +0530 Subject: [PATCH 1007/1061] video: driver: remove redundant entry for STAGE Remove redundant entry for STAGE. Change-Id: I263437427392615df04dd6baffd1463d2c531fbb Signed-off-by: Ankush Mitra --- driver/platform/waipio/src/waipio.c | 10 ---------- 1 file changed, 10 deletions(-) diff --git a/driver/platform/waipio/src/waipio.c b/driver/platform/waipio/src/waipio.c index a3b6a080ca..b2b388d76e 100644 --- a/driver/platform/waipio/src/waipio.c +++ b/driver/platform/waipio/src/waipio.c @@ -1589,16 +1589,6 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_waip NULL, msm_vidc_set_stage}, - {STAGE, ENC, H264 | HEVC, - {0}, - NULL, - msm_vidc_set_stage}, - - {STAGE, DEC, H264 | HEVC | VP9, - {0}, - NULL, - msm_vidc_set_stage}, - {PIPE, DEC | ENC, CODECS_ALL, {0}, NULL, From 6a72e516fbdb56fc16a16eaac0911ef464b74e61 Mon Sep 17 00:00:00 2001 From: Ankush Mitra Date: Fri, 20 Oct 2023 11:21:15 +0530 Subject: [PATCH 1008/1061] video: driver: remove redundant entry for HOST_MAX_COUNT Remove redundant entry for HOST_MAX_COUNT. Change-Id: If9103e1ae6f435dc0b55cc54b8f26dab6b47bcb7 Signed-off-by: Ankush Mitra --- driver/platform/waipio/src/waipio.c | 10 ---------- 1 file changed, 10 deletions(-) diff --git a/driver/platform/waipio/src/waipio.c b/driver/platform/waipio/src/waipio.c index b2b388d76e..6d29d81b00 100644 --- a/driver/platform/waipio/src/waipio.c +++ b/driver/platform/waipio/src/waipio.c @@ -1559,21 +1559,11 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_waip msm_vidc_adjust_input_buf_host_max_count, msm_vidc_set_u32}, - {INPUT_BUF_HOST_MAX_COUNT, ENC, H264 | HEVC, - {0}, - msm_vidc_adjust_input_buf_host_max_count, - msm_vidc_set_u32}, - {OUTPUT_BUF_HOST_MAX_COUNT, ENC | DEC, CODECS_ALL, {0}, msm_vidc_adjust_output_buf_host_max_count, msm_vidc_set_u32}, - {OUTPUT_BUF_HOST_MAX_COUNT, ENC, H264 | HEVC, - {0}, - msm_vidc_adjust_output_buf_host_max_count, - msm_vidc_set_u32}, - {CONCEAL_COLOR_8BIT, DEC, CODECS_ALL, {0}, NULL, From 78e68224aa7b2f048660a8611e58f38dae432537 Mon Sep 17 00:00:00 2001 From: Megha Byahatti Date: Fri, 20 Oct 2023 15:54:50 +0530 Subject: [PATCH 1009/1061] video: driver: Update encoder MAX_BITRATE Update CAVLC and ALLINTRA encoder MAX_BITRATE for cliffs. Change-Id: Ib6c8c84954dc700d9de179aa3b46a5501c8e3f9b Signed-off-by: Megha Byahatti --- driver/platform/cliffs/src/msm_vidc_cliffs.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/driver/platform/cliffs/src/msm_vidc_cliffs.c b/driver/platform/cliffs/src/msm_vidc_cliffs.c index 2c92cd010b..831b6fd725 100644 --- a/driver/platform/cliffs/src/msm_vidc_cliffs.c +++ b/driver/platform/cliffs/src/msm_vidc_cliffs.c @@ -807,10 +807,10 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v0[] = { 160000000, 1, 160000000}, {CAVLC_MAX_BITRATE, ENC, H264, 0, - 220000000, 1, 220000000}, + 160000000, 1, 160000000}, {ALLINTRA_MAX_BITRATE, ENC, H264 | HEVC, 0, - 245000000, 1, 245000000}, + 160000000, 1, 160000000}, {LOWLATENCY_MAX_BITRATE, ENC, H264 | HEVC, 0, 70000000, 1, 70000000}, @@ -3078,10 +3078,10 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v1[] = { 160000000, 1, 160000000}, {CAVLC_MAX_BITRATE, ENC, H264, 0, - 220000000, 1, 220000000}, + 160000000, 1, 160000000}, {ALLINTRA_MAX_BITRATE, ENC, H264 | HEVC, 0, - 245000000, 1, 245000000}, + 160000000, 1, 160000000}, {LOWLATENCY_MAX_BITRATE, ENC, H264 | HEVC, 0, 70000000, 1, 70000000}, From fbf4e7bd75f5fc5dca0fed66b238f96c02e6949f Mon Sep 17 00:00:00 2001 From: Roopangkumar Patel Date: Wed, 18 Oct 2023 12:03:56 +0530 Subject: [PATCH 1010/1061] video: driver: Fix internal buffers issue with FIRST IPSC + SEEK Problem: First IPSC is received from firmware and driver sub state is set to INPUT PAUSE. And driver state is INPUT_STREAMING at this point of time. Now client calls for seek (or flush), which invokes streamoff and stream on INPUT port. As a result, INPUT PAUSE sub state is cleared. Now when client handles the first IPSC by calling stream on output, internal buffers are not queued as INPUT pause is cleared with seek. But for split mode, LINE buffer is mandatory to queue in FIRST_IPSC streamon of the OUTPUT port Solution: Introduced a new sub state check of FIRST_IPSC, during stream on of the INPUT port after FLUSH, we will check if FIRST_IPSC is pending, then we will PAUSE the INPUT port, later in OUTPUT stream on, we check for INPUT PAUSE and if it is set, we will queue the internal buffers to firmware and resume the input port. Change-Id: Ia9b566443bc9c4546247d31625384d89aff6985d Signed-off-by: Roopangkumar Patel --- driver/vidc/inc/msm_vidc_state.h | 3 ++- driver/vidc/src/msm_vidc_driver.c | 16 ++++++++++++---- driver/vidc/src/msm_vidc_state.c | 4 +++- 3 files changed, 17 insertions(+), 6 deletions(-) diff --git a/driver/vidc/inc/msm_vidc_state.h b/driver/vidc/inc/msm_vidc_state.h index 26bb79f0d4..a382a6c7aa 100644 --- a/driver/vidc/inc/msm_vidc_state.h +++ b/driver/vidc/inc/msm_vidc_state.h @@ -61,7 +61,7 @@ enum msm_vidc_core_event_type { enum msm_vidc_state FOREACH_STATE(GENERATE_MSM_VIDC_ENUM); #define MSM_VIDC_SUB_STATE_NONE 0 -#define MSM_VIDC_MAX_SUB_STATES 6 +#define MSM_VIDC_MAX_SUB_STATES 7 /* * max value of inst->sub_state if all * the 6 valid bits are set i.e 111111==>63 @@ -75,6 +75,7 @@ enum msm_vidc_sub_state { MSM_VIDC_DRC_LAST_BUFFER = BIT(3), MSM_VIDC_INPUT_PAUSE = BIT(4), MSM_VIDC_OUTPUT_PAUSE = BIT(5), + MSM_VIDC_FIRST_IPSC = BIT(6), }; enum msm_vidc_event FOREACH_EVENT(GENERATE_MSM_VIDC_ENUM); diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index e4c4e41585..23571016d5 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -1114,7 +1114,8 @@ int msm_vidc_process_streamon_input(struct msm_vidc_inst *inst) * input port will be resumed. */ if (is_sub_state(inst, MSM_VIDC_DRC) || - is_sub_state(inst, MSM_VIDC_DRAIN)) { + is_sub_state(inst, MSM_VIDC_DRAIN) || + is_sub_state(inst, MSM_VIDC_FIRST_IPSC)) { if (!is_sub_state(inst, MSM_VIDC_INPUT_PAUSE)) { rc = venus_hfi_session_pause(inst, INPUT_PORT); if (rc) @@ -1201,6 +1202,9 @@ int msm_vidc_process_streamon_output(struct msm_vidc_inst *inst) } } + if (is_sub_state(inst, MSM_VIDC_FIRST_IPSC)) + clear_sub_state |= MSM_VIDC_FIRST_IPSC; + rc = venus_hfi_start(inst, OUTPUT_PORT); if (rc) return rc; @@ -1330,7 +1334,7 @@ int msm_vidc_state_change_input_psc(struct msm_vidc_inst *inst) */ if (is_state(inst, MSM_VIDC_INPUT_STREAMING) || is_state(inst, MSM_VIDC_OPEN)) - set_sub_state = MSM_VIDC_INPUT_PAUSE; + set_sub_state = MSM_VIDC_INPUT_PAUSE | MSM_VIDC_FIRST_IPSC; else set_sub_state = MSM_VIDC_DRC | MSM_VIDC_INPUT_PAUSE; @@ -2699,8 +2703,12 @@ int msm_vidc_get_internal_buffers(struct msm_vidc_inst *inst, * To ensure buffers->reuse is set to false, add check to detect * if buf_size has become zero. Do the same for buf_count as well. */ - if (buf_size && buf_size <= buffers->size && - buf_count && buf_count <= buffers->min_count) { + if (is_split_mode_enabled(inst) && is_sub_state(inst, MSM_VIDC_FIRST_IPSC)) { + buffers->reuse = false; + buffers->size = buf_size; + buffers->min_count = buf_count; + } else if (buf_size && buf_size <= buffers->size && + buf_count && buf_count <= buffers->min_count) { buffers->reuse = true; } else { buffers->reuse = false; diff --git a/driver/vidc/src/msm_vidc_state.c b/driver/vidc/src/msm_vidc_state.c index 273c7c70d5..78c55765c3 100644 --- a/driver/vidc/src/msm_vidc_state.c +++ b/driver/vidc/src/msm_vidc_state.c @@ -522,6 +522,7 @@ const char *sub_state_name(enum msm_vidc_sub_state sub_state) case MSM_VIDC_DRC_LAST_BUFFER: return "DRC_LAST_BUFFER "; case MSM_VIDC_INPUT_PAUSE: return "INPUT_PAUSE "; case MSM_VIDC_OUTPUT_PAUSE: return "OUTPUT_PAUSE "; + case MSM_VIDC_FIRST_IPSC: return "FIRST_IPSC "; } return "SUB_STATE_NONE"; @@ -1410,7 +1411,8 @@ static int msm_vidc_set_sub_state(struct msm_vidc_inst *inst, MSM_VIDC_OUTPUT_PAUSE }, {MSM_VIDC_INPUT_STREAMING, MSM_VIDC_ALLOW, MSM_VIDC_DRC | MSM_VIDC_DRAIN | - MSM_VIDC_INPUT_PAUSE }, + MSM_VIDC_INPUT_PAUSE | + MSM_VIDC_FIRST_IPSC }, {MSM_VIDC_OUTPUT_STREAMING, MSM_VIDC_DISALLOW, MSM_VIDC_DRC | MSM_VIDC_DRAIN | From 14000cd9c6078ed9154ea1742ebcfd7633100e16 Mon Sep 17 00:00:00 2001 From: Zhongbo Shi Date: Thu, 12 Oct 2023 13:34:40 +0800 Subject: [PATCH 1011/1061] video: driver: avoid array copy for freq and bitrate table Using pointer instead of array copy for frequency and bitrate table. Change-Id: I1c4c10ed0708954a067e8b199e293a2169e68628 Signed-off-by: Zhongbo Shi --- .../platform/common/inc/perf_static_model.h | 3 ++ .../iris33/src/msm_vidc_clock_iris33.c | 31 +++++++++---------- .../iris33/src/msm_vidc_power_iris33.c | 10 ++++++ 3 files changed, 27 insertions(+), 17 deletions(-) diff --git a/driver/platform/common/inc/perf_static_model.h b/driver/platform/common/inc/perf_static_model.h index 1983609e04..23d87d8bc3 100644 --- a/driver/platform/common/inc/perf_static_model.h +++ b/driver/platform/common/inc/perf_static_model.h @@ -148,6 +148,9 @@ struct api_calculation_input { /* used in aurora for depth map decode */ u32 lumaonly_decode; + + /* used in freq and bitrate table selection*/ + u32 vpu_ver; }; struct corner_voting { diff --git a/driver/variant/iris33/src/msm_vidc_clock_iris33.c b/driver/variant/iris33/src/msm_vidc_clock_iris33.c index ac5431514f..211d49f4b6 100644 --- a/driver/variant/iris33/src/msm_vidc_clock_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_clock_iris33.c @@ -5,6 +5,7 @@ #include "perf_static_model.h" #include "msm_vidc_debug.h" +#include "msm_vidc_platform.h" #define ENABLE_FINEBITRATE_SUBUHD60 0 @@ -322,8 +323,8 @@ u32 get_bitrate_entry(u32 pixle_count) static int calculate_vsp_min_freq(struct api_calculation_input codec_input, struct api_calculation_freq_output *codec_output) { - u32 frequency_table_value[2][6]; - u32 bitrate_table_2stage_value[5][10]; + u32 (*frequency_table_value)[6]; + u32 (*bitrate_table_2stage_value)[10]; /* * VSP calculation * different methodology from Lahaina @@ -345,16 +346,12 @@ static int calculate_vsp_min_freq(struct api_calculation_input codec_input, input_bitrate_fp = ((u32)(codec_input.bitrate_mbps * 100 + 99)) / 100; - if (codec_input.pipe_num == 4) { - memcpy(frequency_table_value, frequency_table_iris33, - sizeof(frequency_table_value)); - memcpy(bitrate_table_2stage_value, bitrate_table_iris33_2stage_fp, - sizeof(bitrate_table_2stage_value)); - } else if (codec_input.pipe_num == 2) { - memcpy(frequency_table_value, frequency_table_iris33_2p, - sizeof(frequency_table_value)); - memcpy(bitrate_table_2stage_value, bitrate_table_iris33_2p_2stage_fp, - sizeof(bitrate_table_2stage_value)); + if (codec_input.vpu_ver == VPU_VERSION_IRIS33) { + frequency_table_value = frequency_table_iris33; + bitrate_table_2stage_value = bitrate_table_iris33_2stage_fp; + } else if (codec_input.vpu_ver == VPU_VERSION_IRIS33_2P) { + frequency_table_value = frequency_table_iris33_2p; + bitrate_table_2stage_value = bitrate_table_iris33_2p_2stage_fp; } /* 8KUHD60fps with B frame */ @@ -438,12 +435,12 @@ static u32 calculate_pipe_penalty(struct api_calculation_input codec_input) u32 pipe_penalty_codec = 0; u8 avid_commercial_content = 0; u32 pixel_count = 0; - u32 pipe_penalty_value[3][3]; + u32 (*pipe_penalty_value)[3]; - if (codec_input.pipe_num == 4) - memcpy(pipe_penalty_value, pipe_penalty_iris33, sizeof(pipe_penalty_value)); - else if (codec_input.pipe_num == 2) - memcpy(pipe_penalty_value, pipe_penalty_iris33_2p, sizeof(pipe_penalty_value)); + if (codec_input.vpu_ver == VPU_VERSION_IRIS33) + pipe_penalty_value = pipe_penalty_iris33; + else if (codec_input.vpu_ver == VPU_VERSION_IRIS33_2P) + pipe_penalty_value = pipe_penalty_iris33_2p; /* decoder */ if (codec_input.decoder_or_encoder == CODEC_DECODER) { diff --git a/driver/variant/iris33/src/msm_vidc_power_iris33.c b/driver/variant/iris33/src/msm_vidc_power_iris33.c index 8bc389b89d..7c6597d042 100644 --- a/driver/variant/iris33/src/msm_vidc_power_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_power_iris33.c @@ -8,6 +8,7 @@ #include "msm_vidc_driver.h" #include "msm_vidc_inst.h" #include "msm_vidc_core.h" +#include "msm_vidc_platform.h" #include "msm_vidc_debug.h" #include "perf_static_model.h" #include "msm_vidc_power.h" @@ -50,6 +51,7 @@ static int msm_vidc_init_codec_input_freq(struct msm_vidc_inst *inst, u32 data_s { enum msm_vidc_port_type port; u32 color_fmt, tile_rows_columns = 0; + struct msm_vidc_core *core; if (is_encode_session(inst)) { codec_input->decoder_or_encoder = CODEC_ENCODER; @@ -157,6 +159,9 @@ static int msm_vidc_init_codec_input_freq(struct msm_vidc_inst *inst, u32 data_s /* set as sanity mode, this regression mode has no effect on power calculations */ codec_input->regression_mode = REGRESSION_MODE_SANITY; + core = inst->core; + codec_input->vpu_ver = core->platform->data.vpu_ver; + return 0; } @@ -165,6 +170,7 @@ static int msm_vidc_init_codec_input_bus(struct msm_vidc_inst *inst, struct vidc { u32 complexity_factor_int = 0, complexity_factor_frac = 0, tile_rows_columns = 0; bool opb_compression_enabled = false; + struct msm_vidc_core *core; if (!d) return -EINVAL; @@ -321,6 +327,9 @@ static int msm_vidc_init_codec_input_bus(struct msm_vidc_inst *inst, struct vidc codec_input->av1d_commer_tile_enable = 0; } + core = inst->core; + codec_input->vpu_ver = core->platform->data.vpu_ver; + /* Dump all the variables for easier debugging */ if (msm_vidc_debug & VIDC_BUS) { struct dump dump[] = { @@ -354,6 +363,7 @@ static int msm_vidc_init_codec_input_bus(struct msm_vidc_inst *inst, struct vidc {"lumaonly_decode", "%d", codec_input->lumaonly_decode}, {"av1d_commer_tile_enable", "%d", codec_input->av1d_commer_tile_enable}, {"regression_mode", "%d", codec_input->regression_mode}, + {"vpu_ver", "%d", codec_input->vpu_ver}, }; __dump(dump, ARRAY_SIZE(dump)); } From 025b958d188ee59a32d5a394cd216f3037c550c5 Mon Sep 17 00:00:00 2001 From: ntarte Date: Mon, 30 Oct 2023 15:11:00 +0530 Subject: [PATCH 1012/1061] video-driver: Increase sleep to 200us before xo de-assert Increase sleep to 200us before xo de-assert as per HW team recommendation. Change-Id: I22cfe768cba2b86d42b605f3411a1309f4e5fb0d Signed-off-by: Manikanta Kanamarlapudi --- driver/variant/iris33/src/msm_vidc_iris33.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/driver/variant/iris33/src/msm_vidc_iris33.c b/driver/variant/iris33/src/msm_vidc_iris33.c index 7a4bf68b8a..84d763e9bf 100644 --- a/driver/variant/iris33/src/msm_vidc_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_iris33.c @@ -515,7 +515,7 @@ static int __power_off_iris33_controller(struct msm_vidc_core *core) d_vpr_e("%s: MVP_NOC_CORE_SW_RESET failed\n", __func__); /* De-assert video_cc XO reset */ - usleep_range(80, 100); + usleep_range(200, 300); rc = call_res_op(core, reset_control_deassert, core, "video_xo_reset"); if (rc) d_vpr_e("%s: deassert video_xo_reset failed\n", __func__); From 70d73aeac501ade677fe0fcce9e1763fa7a3403d Mon Sep 17 00:00:00 2001 From: Megha Byahatti Date: Thu, 2 Nov 2023 16:37:08 +0530 Subject: [PATCH 1013/1061] video: driver: Update Level for codecs for cliffs Update H264, HEVC, VP9 and AV1 LEVEL supported for cliffs. Change-Id: I74cf8f221bff4c3af71e844269a8c500b5bcaee6 Signed-off-by: Megha Byahatti --- driver/platform/cliffs/src/msm_vidc_cliffs.c | 56 +++++++++----------- 1 file changed, 25 insertions(+), 31 deletions(-) diff --git a/driver/platform/cliffs/src/msm_vidc_cliffs.c b/driver/platform/cliffs/src/msm_vidc_cliffs.c index 3c1b013f11..a4f986fbb8 100644 --- a/driver/platform/cliffs/src/msm_vidc_cliffs.c +++ b/driver/platform/cliffs/src/msm_vidc_cliffs.c @@ -1339,7 +1339,7 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v0[] = { {LEVEL, ENC, H264, V4L2_MPEG_VIDEO_H264_LEVEL_1_0, - V4L2_MPEG_VIDEO_H264_LEVEL_6_0, + V4L2_MPEG_VIDEO_H264_LEVEL_5_2, BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_0) | BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1B) | BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_1) | @@ -1356,16 +1356,15 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v0[] = { BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_2) | BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_0) | BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_0), - V4L2_MPEG_VIDEO_H264_LEVEL_5_0, + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_2), + V4L2_MPEG_VIDEO_H264_LEVEL_5_2, V4L2_CID_MPEG_VIDEO_H264_LEVEL, HFI_PROP_LEVEL, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, {LEVEL, ENC, HEVC | HEIC, V4L2_MPEG_VIDEO_HEVC_LEVEL_1, - V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2, + V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1, BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_1) | BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2) | BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1) | @@ -1374,9 +1373,8 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v0[] = { BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4) | BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1) | BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2), - V4L2_MPEG_VIDEO_HEVC_LEVEL_5, + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1), + V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1, V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, HFI_PROP_LEVEL, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, @@ -1447,7 +1445,7 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v0[] = { {LEVEL, DEC, AV1, V4L2_MPEG_VIDC_AV1_LEVEL_2_0, - V4L2_MPEG_VIDC_AV1_LEVEL_5_3, + V4L2_MPEG_VIDC_AV1_LEVEL_6_0, BIT(V4L2_MPEG_VIDC_AV1_LEVEL_2_0) | BIT(V4L2_MPEG_VIDC_AV1_LEVEL_2_1) | BIT(V4L2_MPEG_VIDC_AV1_LEVEL_2_2) | @@ -1463,8 +1461,9 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v0[] = { BIT(V4L2_MPEG_VIDC_AV1_LEVEL_5_0) | BIT(V4L2_MPEG_VIDC_AV1_LEVEL_5_1) | BIT(V4L2_MPEG_VIDC_AV1_LEVEL_5_2) | - BIT(V4L2_MPEG_VIDC_AV1_LEVEL_5_3), - V4L2_MPEG_VIDC_AV1_LEVEL_5_3, + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_5_3) | + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_6_0), + V4L2_MPEG_VIDC_AV1_LEVEL_6_0, V4L2_CID_MPEG_VIDC_AV1_LEVEL, HFI_PROP_LEVEL, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, @@ -3595,7 +3594,7 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v1[] = { {LEVEL, ENC, H264, V4L2_MPEG_VIDEO_H264_LEVEL_1_0, - V4L2_MPEG_VIDEO_H264_LEVEL_6_0, + V4L2_MPEG_VIDEO_H264_LEVEL_5_2, BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_0) | BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1B) | BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_1) | @@ -3612,16 +3611,15 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v1[] = { BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_2) | BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_0) | BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_0), - V4L2_MPEG_VIDEO_H264_LEVEL_5_0, + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_2), + V4L2_MPEG_VIDEO_H264_LEVEL_5_2, V4L2_CID_MPEG_VIDEO_H264_LEVEL, HFI_PROP_LEVEL, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, {LEVEL, ENC, HEVC | HEIC, V4L2_MPEG_VIDEO_HEVC_LEVEL_1, - V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2, + V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1, BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_1) | BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2) | BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1) | @@ -3630,16 +3628,15 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v1[] = { BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4) | BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1) | BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2), - V4L2_MPEG_VIDEO_HEVC_LEVEL_5, + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1), + V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1, V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, HFI_PROP_LEVEL, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, {LEVEL, DEC, H264, V4L2_MPEG_VIDEO_H264_LEVEL_1_0, - V4L2_MPEG_VIDEO_H264_LEVEL_6_0, + V4L2_MPEG_VIDEO_H264_LEVEL_5_2, BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_0) | BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1B) | BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_1) | @@ -3656,16 +3653,15 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v1[] = { BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_2) | BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_0) | BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_0), - V4L2_MPEG_VIDEO_H264_LEVEL_6_0, + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_2), + V4L2_MPEG_VIDEO_H264_LEVEL_5_2, V4L2_CID_MPEG_VIDEO_H264_LEVEL, HFI_PROP_LEVEL, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, {LEVEL, DEC, HEVC | HEIC, V4L2_MPEG_VIDEO_HEVC_LEVEL_1, - V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2, + V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1, BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_1) | BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2) | BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1) | @@ -3674,16 +3670,15 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v1[] = { BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4) | BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1) | BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2), - V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2, + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1), + V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1, V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, HFI_PROP_LEVEL, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, {LEVEL, DEC, VP9, V4L2_MPEG_VIDEO_VP9_LEVEL_1_0, - V4L2_MPEG_VIDEO_VP9_LEVEL_5_2, + V4L2_MPEG_VIDEO_VP9_LEVEL_5_1, BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_1_0) | BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_1_1) | BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_2_0) | @@ -3693,9 +3688,8 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v1[] = { BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_4_0) | BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_4_1) | BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_0) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_1) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_2), - V4L2_MPEG_VIDEO_VP9_LEVEL_5_2, + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_1), + V4L2_MPEG_VIDEO_VP9_LEVEL_5_1, V4L2_CID_MPEG_VIDEO_VP9_LEVEL, HFI_PROP_LEVEL, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, From 236e1f55ddee9e5ad519424f7aaddc904e209312 Mon Sep 17 00:00:00 2001 From: Vedang Nagar Date: Thu, 14 Sep 2023 13:19:13 +0530 Subject: [PATCH 1014/1061] video: driver: Read ctrl_init register value during FW bootup failure To debug FW bootup failure scenario, FW tries to update ctrl_init register to know at what point failure is seen and driver can read and print this register so as to know where FW bootup is failing. Change-Id: I26691a84ab2526dee8adb6b2a46b62a01bacede8 Signed-off-by: Vedang Nagar --- driver/variant/iris33/src/msm_vidc_iris33.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/driver/variant/iris33/src/msm_vidc_iris33.c b/driver/variant/iris33/src/msm_vidc_iris33.c index 7a4bf68b8a..0a18535637 100644 --- a/driver/variant/iris33/src/msm_vidc_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_iris33.c @@ -1155,6 +1155,10 @@ static int __boot_firmware_iris33(struct msm_vidc_core *core) if (rc) return rc; + rc = __read_register(core, HFI_CTRL_INIT_IRIS33, &ctrl_init_val); + if (rc) + return rc; + if ((ctrl_status & HFI_CTRL_ERROR_FATAL) || (ctrl_status & HFI_CTRL_ERROR_UC_REGION_NOT_SET) || (ctrl_status & HFI_CTRL_ERROR_HW_FENCE_QUEUE)) { @@ -1172,7 +1176,8 @@ static int __boot_firmware_iris33(struct msm_vidc_core *core) } if (count >= max_tries) { - d_vpr_e("Error booting up vidc firmware, ctrl status %#x\n", ctrl_status); + d_vpr_e("Error booting up vidc firmware, ctrl status %#x, ctrl init %#x\n", + ctrl_status, ctrl_init_val); return -ETIME; } From 726326d756ba8509ddb1029b379f53d57bf94fd6 Mon Sep 17 00:00:00 2001 From: Vedang Nagar Date: Sat, 4 Nov 2023 11:56:06 +0530 Subject: [PATCH 1015/1061] Video: Driver: acquire xo_reset mutex for gdsc access [1] Acquire xo_reset mutex for gdsc access. [2] Retry acquire_regulator for 1sec and BUG_ON if still fails. Change-Id: Ie0ed4561a0c12b8526e2ede96a879f9d311aafab Signed-off-by: Vedang Nagar --- driver/variant/iris33/src/msm_vidc_iris33.c | 67 +++++---------------- driver/vidc/src/resources.c | 19 +++++- driver/vidc/src/resources_ext.c | 64 ++++++++++++++++++-- 3 files changed, 92 insertions(+), 58 deletions(-) diff --git a/driver/variant/iris33/src/msm_vidc_iris33.c b/driver/variant/iris33/src/msm_vidc_iris33.c index 7a4bf68b8a..463ee7ceaf 100644 --- a/driver/variant/iris33/src/msm_vidc_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_iris33.c @@ -383,7 +383,6 @@ static int __power_off_iris33_controller(struct msm_vidc_core *core) { int rc = 0; int value = 0; - u32 count = 0; /* * mask fal10_veto QLPAC error since fal10_veto can go 1 @@ -473,22 +472,9 @@ static int __power_off_iris33_controller(struct msm_vidc_core *core) * drivers (eva driver) operating on this shared reset clock * and AON_WRAPPER_SPARE register in parallel. */ - count = 0; - do { - rc = call_res_op(core, reset_control_acquire, core, "video_xo_reset"); - if (!rc) { - break; - } else { - d_vpr_e( - "%s: failed to acquire video_xo_reset control, count %d\n", - __func__, count); - count++; - usleep_range(1000, 1000); - } - } while (count < 100); - - if (count >= 100) { - d_vpr_e("%s: timeout acquiring video_xo_reset\n", __func__); + rc = call_res_op(core, reset_control_acquire, core, "video_xo_reset"); + if (rc) { + d_vpr_e("%s: failed to acquire video_xo_reset control\n", __func__); goto skip_video_xo_reset; } @@ -501,7 +487,7 @@ static int __power_off_iris33_controller(struct msm_vidc_core *core) /* enable bit(1) to avoid cvp noc xo reset */ rc = __write_register(core, AON_WRAPPER_SPARE, value | 0x2); if (rc) - return rc; + goto exit; /* assert video_cc XO reset */ rc = call_res_op(core, reset_control_assert, core, "video_xo_reset"); @@ -523,7 +509,7 @@ static int __power_off_iris33_controller(struct msm_vidc_core *core) /* reset AON spare register */ rc = __write_register(core, AON_WRAPPER_SPARE, 0x0); if (rc) - return rc; + goto exit; /* release reset control for other consumers */ rc = call_res_op(core, reset_control_release, core, "video_xo_reset"); @@ -570,6 +556,10 @@ skip_video_xo_reset: } return rc; + +exit: + call_res_op(core, reset_control_release, core, "video_xo_reset"); + return rc; } static int __power_off_iris33(struct msm_vidc_core *core) @@ -677,7 +667,6 @@ static int __power_on_iris33(struct msm_vidc_core *core) struct frequency_table *freq_tbl; u32 freq = 0; int rc = 0; - int count = 0; if (is_core_sub_state(core, CORE_SUBSTATE_POWER_ENABLE)) return 0; @@ -728,21 +717,9 @@ static int __power_on_iris33(struct msm_vidc_core *core) * access failure, so acquire video_xo_reset to ensure EVA module is * not doing assert or de-assert on video_xo_reset. */ - do { - rc = call_res_op(core, reset_control_acquire, core, "video_xo_reset"); - if (!rc) { - break; - } else { - d_vpr_e( - "%s: failed to acquire video_xo_reset control, count %d\n", - __func__, count); - count++; - usleep_range(1000, 1000); - } - } while (count < 100); - - if (count >= 100) { - d_vpr_e("%s: timeout acquiring video_xo_reset\n", __func__); + rc = call_res_op(core, reset_control_acquire, core, "video_xo_reset"); + if (rc) { + d_vpr_e("%s: failed to acquire video_xo_reset control\n", __func__); goto fail_assert_xo_reset; } @@ -822,6 +799,7 @@ static int __power_on_iris33(struct msm_vidc_core *core) return rc; fail_program_noc_regs: + call_res_op(core, reset_control_release, core, "video_xo_reset"); fail_deassert_xo_reset: fail_assert_xo_reset: fail_power_on_substate: @@ -1020,7 +998,6 @@ static int __read_noc_err_register_iris33_2p(struct msm_vidc_core *core) static int __noc_error_info_iris33(struct msm_vidc_core *core) { - u32 count = 0; int rc = 0; /* @@ -1070,21 +1047,9 @@ static int __noc_error_info_iris33(struct msm_vidc_core *core) * while reading noc registers */ d_vpr_e("%s: read NOC ERR LOG registers\n", __func__); - do { - rc = call_res_op(core, reset_control_acquire, core, "video_xo_reset"); - if (!rc) { - break; - } else { - d_vpr_e( - "%s: failed to acquire video_xo_reset control, count %d\n", - __func__, count); - count++; - usleep_range(1000, 1000); - } - } while (count < 100); - - if (count >= 100) { - d_vpr_e("%s: timeout acquiring video_xo_reset\n", __func__); + rc = call_res_op(core, reset_control_acquire, core, "video_xo_reset"); + if (rc) { + d_vpr_e("%s: failed to acquire video_xo_reset control\n", __func__); goto fail_assert_xo_reset; } diff --git a/driver/vidc/src/resources.c b/driver/vidc/src/resources.c index dd581b76fb..41aea1c53b 100644 --- a/driver/vidc/src/resources.c +++ b/driver/vidc/src/resources.c @@ -1445,7 +1445,7 @@ static int __reset_control_acquire_name(struct msm_vidc_core *core, const char *name) { struct reset_info *rcinfo = NULL; - int rc = 0; + int rc = 0, count = 0; bool found = false; venus_hfi_for_each_reset_clock(core, rcinfo) { @@ -1462,7 +1462,22 @@ static int __reset_control_acquire_name(struct msm_vidc_core *core, found = true; /* reset_control_acquire is exposed in kernel version 6 */ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(6, 0, 0)) - rc = reset_control_acquire(rcinfo->rst); + do { + rc = reset_control_acquire(rcinfo->rst); + if (!rc) + break; + + d_vpr_e("%s: failed to acquire video_xo_reset control, count %d\n", + __func__, count); + count++; + usleep_range(1000, 1500); + } while (count < 1000); + + if (count >= 1000) { + d_vpr_e("%s: timeout acquiring video_xo_reset\n", __func__); + rc = -EINVAL; + MSM_VIDC_FATAL(true); + } #else rc = -EINVAL; #endif diff --git a/driver/vidc/src/resources_ext.c b/driver/vidc/src/resources_ext.c index cb9f30eaee..9ce52a54cd 100644 --- a/driver/vidc/src/resources_ext.c +++ b/driver/vidc/src/resources_ext.c @@ -89,6 +89,12 @@ static int __acquire_regulator(struct msm_vidc_core *core, { int rc = 0; + rc = call_res_op(core, reset_control_acquire, core, "video_xo_reset"); + if (rc) { + d_vpr_e("%s: failed to acquire video_xo_reset control\n", __func__); + goto fail_assert_xo_reset; + } + if (rinfo->hw_power_collapse) { if (!rinfo->regulator) { d_vpr_e("%s: invalid regulator\n", __func__); @@ -133,6 +139,10 @@ static int __acquire_regulator(struct msm_vidc_core *core, } exit: + rc = call_res_op(core, reset_control_release, core, "video_xo_reset"); + if (rc) + d_vpr_e("%s: failed to release video_xo_reset reset\n", __func__); +fail_assert_xo_reset: return rc; } @@ -141,10 +151,16 @@ static int __hand_off_regulator(struct msm_vidc_core *core, { int rc = 0; + rc = call_res_op(core, reset_control_acquire, core, "video_xo_reset"); + if (rc) { + d_vpr_e("%s: failed to acquire video_xo_reset control\n", __func__); + goto fail_assert_xo_reset; + } + if (rinfo->hw_power_collapse) { if (!rinfo->regulator) { d_vpr_e("%s: invalid regulator\n", __func__); - return -EINVAL; + goto exit; } rc = regulator_set_mode(rinfo->regulator, @@ -152,7 +168,7 @@ static int __hand_off_regulator(struct msm_vidc_core *core, if (rc) { d_vpr_e("Failed to hand off regulator control: %s\n", rinfo->name); - return rc; + goto exit; } else { /* set handoff done in core sub_state */ msm_vidc_change_core_sub_state(core, @@ -168,6 +184,11 @@ static int __hand_off_regulator(struct msm_vidc_core *core, } } +exit: + rc = call_res_op(core, reset_control_release, core, "video_xo_reset"); + if (rc) + d_vpr_e("%s: failed to release video_xo_reset reset\n", __func__); +fail_assert_xo_reset: return rc; } @@ -188,18 +209,30 @@ static int __enable_regulator(struct msm_vidc_core *core, const char *reg_name) continue; found = true; + rc = call_res_op(core, reset_control_acquire, core, "video_xo_reset"); + if (rc) { + d_vpr_e("%s: failed to acquire video_xo_reset control\n", __func__); + goto fail_assert_xo_reset; + } + rc = regulator_enable(rinfo->regulator); if (rc) { d_vpr_e("%s: failed to enable %s, rc = %d\n", __func__, rinfo->name, rc); - return rc; + goto fail_regulator_enable; } if (!regulator_is_enabled(rinfo->regulator)) { d_vpr_e("%s: regulator %s not enabled\n", __func__, rinfo->name); regulator_disable(rinfo->regulator); - return -EINVAL; + rc = -EINVAL; + goto fail_regulator_enable; } + + rc = call_res_op(core, reset_control_release, core, "video_xo_reset"); + if (rc) + d_vpr_e("%s: failed to release video_xo_reset reset\n", __func__); + d_vpr_h("%s: enabled regulator %s\n", __func__, rinfo->name); break; } @@ -209,6 +242,11 @@ static int __enable_regulator(struct msm_vidc_core *core, const char *reg_name) } return rc; + +fail_regulator_enable: + call_res_op(core, reset_control_release, core, "video_xo_reset"); +fail_assert_xo_reset: + return rc; } static int __disable_regulator(struct msm_vidc_core *core, const char *reg_name) @@ -239,12 +277,23 @@ static int __disable_regulator(struct msm_vidc_core *core, const char *reg_name) /* reset handoff done from core sub_state */ msm_vidc_change_core_sub_state(core, CORE_SUBSTATE_GDSC_HANDOFF, 0, __func__); + rc = call_res_op(core, reset_control_acquire, core, "video_xo_reset"); + if (rc) { + d_vpr_e("%s: failed to acquire video_xo_reset control\n", __func__); + goto fail_assert_xo_reset; + } + rc = regulator_disable(rinfo->regulator); if (rc) { d_vpr_e("%s: failed to disable %s, rc = %d\n", __func__, rinfo->name, rc); - return rc; + goto fail_regulator_disable; } + + rc = call_res_op(core, reset_control_release, core, "video_xo_reset"); + if (rc) + d_vpr_e("%s: failed to release video_xo_reset reset\n", __func__); + d_vpr_h("%s: disabled regulator %s\n", __func__, rinfo->name); break; } @@ -254,6 +303,11 @@ static int __disable_regulator(struct msm_vidc_core *core, const char *reg_name) } return rc; + +fail_regulator_disable: + call_res_op(core, reset_control_release, core, "video_xo_reset"); +fail_assert_xo_reset: + return rc; } static int __hand_off_regulators(struct msm_vidc_core *core) From 8193b0274dd38803d76088566745bfba3a9e7978 Mon Sep 17 00:00:00 2001 From: Megha Byahatti Date: Mon, 20 Nov 2023 18:56:25 +0530 Subject: [PATCH 1016/1061] video-driver: update Max frequency for cliffs v1 - Due to hw limitation update max frequency for fused variant with video_cc_pll_uhd60_fmax_fuse = 1 to 366MHz. Change-Id: Id3b154ca600c3e8fa3cbb19bab1e20feba347775 Signed-off-by: Megha Byahatti --- driver/platform/cliffs/src/msm_vidc_cliffs.c | 14 +++++++++----- 1 file changed, 9 insertions(+), 5 deletions(-) diff --git a/driver/platform/cliffs/src/msm_vidc_cliffs.c b/driver/platform/cliffs/src/msm_vidc_cliffs.c index 3c1b013f11..2cdd1e031d 100644 --- a/driver/platform/cliffs/src/msm_vidc_cliffs.c +++ b/driver/platform/cliffs/src/msm_vidc_cliffs.c @@ -4941,10 +4941,14 @@ const struct context_bank_table cliffs_context_bank_table[] = { }; /* freq */ -static struct freq_table cliffs_freq_table[] = { +static struct freq_table cliffs_freq_table_sku0[] = { {533333333}, {444000000}, {366000000}, {338000000}, {240000000}, {192000000} }; +static struct freq_table cliffs_freq_table_sku1[] = { + {366000000}, {338000000}, {240000000}, {192000000} +}; + /* register, value, mask */ static const struct reg_preset_table cliffs_reg_preset_table[] = { { 0xB0088, 0x0, 0x11 }, @@ -5098,8 +5102,8 @@ static const struct msm_vidc_platform_data cliffs_data_v0 = { .context_bank_tbl_size = ARRAY_SIZE(cliffs_context_bank_table), /* platform specific resources */ - .freq_tbl = cliffs_freq_table, - .freq_tbl_size = ARRAY_SIZE(cliffs_freq_table), + .freq_tbl = cliffs_freq_table_sku0, + .freq_tbl_size = ARRAY_SIZE(cliffs_freq_table_sku0), .reg_prst_tbl = cliffs_reg_preset_table, .reg_prst_tbl_size = ARRAY_SIZE(cliffs_reg_preset_table), .dev_reg_tbl = cliffs_device_region_table, @@ -5172,8 +5176,8 @@ static const struct msm_vidc_platform_data cliffs_data_v1 = { .context_bank_tbl_size = ARRAY_SIZE(cliffs_context_bank_table), /* platform specific resources */ - .freq_tbl = cliffs_freq_table, - .freq_tbl_size = ARRAY_SIZE(cliffs_freq_table), + .freq_tbl = cliffs_freq_table_sku1, + .freq_tbl_size = ARRAY_SIZE(cliffs_freq_table_sku1), .reg_prst_tbl = cliffs_reg_preset_table, .reg_prst_tbl_size = ARRAY_SIZE(cliffs_reg_preset_table), .dev_reg_tbl = cliffs_device_region_table, From 35877027dbc502670b735d3db06b5d963d2668f1 Mon Sep 17 00:00:00 2001 From: Vedang Nagar Date: Sat, 4 Nov 2023 11:56:06 +0530 Subject: [PATCH 1017/1061] Video: Driver: acquire xo_reset mutex for gdsc access [1] Acquire xo_reset mutex for gdsc access. [2] Retry acquire_regulator for 1sec and BUG_ON if still fails. Change-Id: Ie0ed4561a0c12b8526e2ede96a879f9d311aafab Signed-off-by: Vedang Nagar --- driver/variant/iris33/src/msm_vidc_iris33.c | 67 +++++---------------- driver/vidc/src/resources.c | 19 +++++- driver/vidc/src/resources_ext.c | 64 ++++++++++++++++++-- 3 files changed, 92 insertions(+), 58 deletions(-) diff --git a/driver/variant/iris33/src/msm_vidc_iris33.c b/driver/variant/iris33/src/msm_vidc_iris33.c index 84d763e9bf..9fb2123ffe 100644 --- a/driver/variant/iris33/src/msm_vidc_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_iris33.c @@ -383,7 +383,6 @@ static int __power_off_iris33_controller(struct msm_vidc_core *core) { int rc = 0; int value = 0; - u32 count = 0; /* * mask fal10_veto QLPAC error since fal10_veto can go 1 @@ -473,22 +472,9 @@ static int __power_off_iris33_controller(struct msm_vidc_core *core) * drivers (eva driver) operating on this shared reset clock * and AON_WRAPPER_SPARE register in parallel. */ - count = 0; - do { - rc = call_res_op(core, reset_control_acquire, core, "video_xo_reset"); - if (!rc) { - break; - } else { - d_vpr_e( - "%s: failed to acquire video_xo_reset control, count %d\n", - __func__, count); - count++; - usleep_range(1000, 1000); - } - } while (count < 100); - - if (count >= 100) { - d_vpr_e("%s: timeout acquiring video_xo_reset\n", __func__); + rc = call_res_op(core, reset_control_acquire, core, "video_xo_reset"); + if (rc) { + d_vpr_e("%s: failed to acquire video_xo_reset control\n", __func__); goto skip_video_xo_reset; } @@ -501,7 +487,7 @@ static int __power_off_iris33_controller(struct msm_vidc_core *core) /* enable bit(1) to avoid cvp noc xo reset */ rc = __write_register(core, AON_WRAPPER_SPARE, value | 0x2); if (rc) - return rc; + goto exit; /* assert video_cc XO reset */ rc = call_res_op(core, reset_control_assert, core, "video_xo_reset"); @@ -523,7 +509,7 @@ static int __power_off_iris33_controller(struct msm_vidc_core *core) /* reset AON spare register */ rc = __write_register(core, AON_WRAPPER_SPARE, 0x0); if (rc) - return rc; + goto exit; /* release reset control for other consumers */ rc = call_res_op(core, reset_control_release, core, "video_xo_reset"); @@ -570,6 +556,10 @@ skip_video_xo_reset: } return rc; + +exit: + call_res_op(core, reset_control_release, core, "video_xo_reset"); + return rc; } static int __power_off_iris33(struct msm_vidc_core *core) @@ -677,7 +667,6 @@ static int __power_on_iris33(struct msm_vidc_core *core) struct frequency_table *freq_tbl; u32 freq = 0; int rc = 0; - int count = 0; if (is_core_sub_state(core, CORE_SUBSTATE_POWER_ENABLE)) return 0; @@ -728,21 +717,9 @@ static int __power_on_iris33(struct msm_vidc_core *core) * access failure, so acquire video_xo_reset to ensure EVA module is * not doing assert or de-assert on video_xo_reset. */ - do { - rc = call_res_op(core, reset_control_acquire, core, "video_xo_reset"); - if (!rc) { - break; - } else { - d_vpr_e( - "%s: failed to acquire video_xo_reset control, count %d\n", - __func__, count); - count++; - usleep_range(1000, 1000); - } - } while (count < 100); - - if (count >= 100) { - d_vpr_e("%s: timeout acquiring video_xo_reset\n", __func__); + rc = call_res_op(core, reset_control_acquire, core, "video_xo_reset"); + if (rc) { + d_vpr_e("%s: failed to acquire video_xo_reset control\n", __func__); goto fail_assert_xo_reset; } @@ -822,6 +799,7 @@ static int __power_on_iris33(struct msm_vidc_core *core) return rc; fail_program_noc_regs: + call_res_op(core, reset_control_release, core, "video_xo_reset"); fail_deassert_xo_reset: fail_assert_xo_reset: fail_power_on_substate: @@ -1020,7 +998,6 @@ static int __read_noc_err_register_iris33_2p(struct msm_vidc_core *core) static int __noc_error_info_iris33(struct msm_vidc_core *core) { - u32 count = 0; int rc = 0; /* @@ -1070,21 +1047,9 @@ static int __noc_error_info_iris33(struct msm_vidc_core *core) * while reading noc registers */ d_vpr_e("%s: read NOC ERR LOG registers\n", __func__); - do { - rc = call_res_op(core, reset_control_acquire, core, "video_xo_reset"); - if (!rc) { - break; - } else { - d_vpr_e( - "%s: failed to acquire video_xo_reset control, count %d\n", - __func__, count); - count++; - usleep_range(1000, 1000); - } - } while (count < 100); - - if (count >= 100) { - d_vpr_e("%s: timeout acquiring video_xo_reset\n", __func__); + rc = call_res_op(core, reset_control_acquire, core, "video_xo_reset"); + if (rc) { + d_vpr_e("%s: failed to acquire video_xo_reset control\n", __func__); goto fail_assert_xo_reset; } diff --git a/driver/vidc/src/resources.c b/driver/vidc/src/resources.c index dd581b76fb..41aea1c53b 100644 --- a/driver/vidc/src/resources.c +++ b/driver/vidc/src/resources.c @@ -1445,7 +1445,7 @@ static int __reset_control_acquire_name(struct msm_vidc_core *core, const char *name) { struct reset_info *rcinfo = NULL; - int rc = 0; + int rc = 0, count = 0; bool found = false; venus_hfi_for_each_reset_clock(core, rcinfo) { @@ -1462,7 +1462,22 @@ static int __reset_control_acquire_name(struct msm_vidc_core *core, found = true; /* reset_control_acquire is exposed in kernel version 6 */ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(6, 0, 0)) - rc = reset_control_acquire(rcinfo->rst); + do { + rc = reset_control_acquire(rcinfo->rst); + if (!rc) + break; + + d_vpr_e("%s: failed to acquire video_xo_reset control, count %d\n", + __func__, count); + count++; + usleep_range(1000, 1500); + } while (count < 1000); + + if (count >= 1000) { + d_vpr_e("%s: timeout acquiring video_xo_reset\n", __func__); + rc = -EINVAL; + MSM_VIDC_FATAL(true); + } #else rc = -EINVAL; #endif diff --git a/driver/vidc/src/resources_ext.c b/driver/vidc/src/resources_ext.c index cb9f30eaee..9ce52a54cd 100644 --- a/driver/vidc/src/resources_ext.c +++ b/driver/vidc/src/resources_ext.c @@ -89,6 +89,12 @@ static int __acquire_regulator(struct msm_vidc_core *core, { int rc = 0; + rc = call_res_op(core, reset_control_acquire, core, "video_xo_reset"); + if (rc) { + d_vpr_e("%s: failed to acquire video_xo_reset control\n", __func__); + goto fail_assert_xo_reset; + } + if (rinfo->hw_power_collapse) { if (!rinfo->regulator) { d_vpr_e("%s: invalid regulator\n", __func__); @@ -133,6 +139,10 @@ static int __acquire_regulator(struct msm_vidc_core *core, } exit: + rc = call_res_op(core, reset_control_release, core, "video_xo_reset"); + if (rc) + d_vpr_e("%s: failed to release video_xo_reset reset\n", __func__); +fail_assert_xo_reset: return rc; } @@ -141,10 +151,16 @@ static int __hand_off_regulator(struct msm_vidc_core *core, { int rc = 0; + rc = call_res_op(core, reset_control_acquire, core, "video_xo_reset"); + if (rc) { + d_vpr_e("%s: failed to acquire video_xo_reset control\n", __func__); + goto fail_assert_xo_reset; + } + if (rinfo->hw_power_collapse) { if (!rinfo->regulator) { d_vpr_e("%s: invalid regulator\n", __func__); - return -EINVAL; + goto exit; } rc = regulator_set_mode(rinfo->regulator, @@ -152,7 +168,7 @@ static int __hand_off_regulator(struct msm_vidc_core *core, if (rc) { d_vpr_e("Failed to hand off regulator control: %s\n", rinfo->name); - return rc; + goto exit; } else { /* set handoff done in core sub_state */ msm_vidc_change_core_sub_state(core, @@ -168,6 +184,11 @@ static int __hand_off_regulator(struct msm_vidc_core *core, } } +exit: + rc = call_res_op(core, reset_control_release, core, "video_xo_reset"); + if (rc) + d_vpr_e("%s: failed to release video_xo_reset reset\n", __func__); +fail_assert_xo_reset: return rc; } @@ -188,18 +209,30 @@ static int __enable_regulator(struct msm_vidc_core *core, const char *reg_name) continue; found = true; + rc = call_res_op(core, reset_control_acquire, core, "video_xo_reset"); + if (rc) { + d_vpr_e("%s: failed to acquire video_xo_reset control\n", __func__); + goto fail_assert_xo_reset; + } + rc = regulator_enable(rinfo->regulator); if (rc) { d_vpr_e("%s: failed to enable %s, rc = %d\n", __func__, rinfo->name, rc); - return rc; + goto fail_regulator_enable; } if (!regulator_is_enabled(rinfo->regulator)) { d_vpr_e("%s: regulator %s not enabled\n", __func__, rinfo->name); regulator_disable(rinfo->regulator); - return -EINVAL; + rc = -EINVAL; + goto fail_regulator_enable; } + + rc = call_res_op(core, reset_control_release, core, "video_xo_reset"); + if (rc) + d_vpr_e("%s: failed to release video_xo_reset reset\n", __func__); + d_vpr_h("%s: enabled regulator %s\n", __func__, rinfo->name); break; } @@ -209,6 +242,11 @@ static int __enable_regulator(struct msm_vidc_core *core, const char *reg_name) } return rc; + +fail_regulator_enable: + call_res_op(core, reset_control_release, core, "video_xo_reset"); +fail_assert_xo_reset: + return rc; } static int __disable_regulator(struct msm_vidc_core *core, const char *reg_name) @@ -239,12 +277,23 @@ static int __disable_regulator(struct msm_vidc_core *core, const char *reg_name) /* reset handoff done from core sub_state */ msm_vidc_change_core_sub_state(core, CORE_SUBSTATE_GDSC_HANDOFF, 0, __func__); + rc = call_res_op(core, reset_control_acquire, core, "video_xo_reset"); + if (rc) { + d_vpr_e("%s: failed to acquire video_xo_reset control\n", __func__); + goto fail_assert_xo_reset; + } + rc = regulator_disable(rinfo->regulator); if (rc) { d_vpr_e("%s: failed to disable %s, rc = %d\n", __func__, rinfo->name, rc); - return rc; + goto fail_regulator_disable; } + + rc = call_res_op(core, reset_control_release, core, "video_xo_reset"); + if (rc) + d_vpr_e("%s: failed to release video_xo_reset reset\n", __func__); + d_vpr_h("%s: disabled regulator %s\n", __func__, rinfo->name); break; } @@ -254,6 +303,11 @@ static int __disable_regulator(struct msm_vidc_core *core, const char *reg_name) } return rc; + +fail_regulator_disable: + call_res_op(core, reset_control_release, core, "video_xo_reset"); +fail_assert_xo_reset: + return rc; } static int __hand_off_regulators(struct msm_vidc_core *core) From 8a2127ac4e83bfe998d82136d5bdb734d102a245 Mon Sep 17 00:00:00 2001 From: Megha Byahatti Date: Thu, 2 Nov 2023 15:27:26 +0530 Subject: [PATCH 1018/1061] video: driver: Enable SSR type target specific - Allow SSR type according to the target with defining SSR type in platform file. Change-Id: Idca62ce34b66a885da388d798eddb0c6c00871e5 Signed-off-by: Megha Byahatti --- driver/platform/cliffs/src/msm_vidc_cliffs.c | 8 ++++++++ driver/platform/common/inc/msm_vidc_platform.h | 3 +++ .../pineapple/src/msm_vidc_pineapple.c | 8 ++++++++ driver/vidc/inc/msm_vidc_internal.h | 1 + driver/vidc/inc/venus_hfi.h | 1 + driver/vidc/src/venus_hfi.c | 18 +++++++++++++++--- 6 files changed, 36 insertions(+), 3 deletions(-) diff --git a/driver/platform/cliffs/src/msm_vidc_cliffs.c b/driver/platform/cliffs/src/msm_vidc_cliffs.c index 7d48ecada0..ef4b87e879 100644 --- a/driver/platform/cliffs/src/msm_vidc_cliffs.c +++ b/driver/platform/cliffs/src/msm_vidc_cliffs.c @@ -5073,6 +5073,11 @@ static const u32 cliffs_vdec_output_properties_av1[] = { HFI_PROP_FENCE, }; +static const u32 cliffs_msm_vidc_ssr_type[] = { + HFI_SSR_TYPE_SW_ERR_FATAL, + HFI_SSR_TYPE_CPU_WDOG_IRQ, +}; + static struct msm_vidc_efuse_data efuse_data_cliffs[] = { /* IRIS_DISABLE_AV1, SKU VERSION: 1 */ EFUSE_ENTRY(0x221C8118, 4, 0x2000, 0xD, SKU_VERSION), @@ -5146,6 +5151,9 @@ static const struct msm_vidc_platform_data cliffs_data_v0 = { .dec_output_prop_size_vp9 = ARRAY_SIZE(cliffs_vdec_output_properties_vp9), .dec_output_prop_size_av1 = ARRAY_SIZE(cliffs_vdec_output_properties_av1), + .msm_vidc_ssr_type = cliffs_msm_vidc_ssr_type, + .msm_vidc_ssr_type_size = ARRAY_SIZE(cliffs_msm_vidc_ssr_type), + /* Fuse specific resources */ .efuse_data = efuse_data_cliffs, .efuse_data_size = ARRAY_SIZE(efuse_data_cliffs), diff --git a/driver/platform/common/inc/msm_vidc_platform.h b/driver/platform/common/inc/msm_vidc_platform.h index 9cd4c38669..228c9e10d5 100644 --- a/driver/platform/common/inc/msm_vidc_platform.h +++ b/driver/platform/common/inc/msm_vidc_platform.h @@ -266,6 +266,9 @@ struct msm_vidc_platform_data { unsigned int dec_output_prop_size_vp9; const u32 *dec_output_prop_av1; unsigned int dec_output_prop_size_av1; + const u32 *msm_vidc_ssr_type; + unsigned int msm_vidc_ssr_type_size; + }; struct msm_vidc_platform { diff --git a/driver/platform/pineapple/src/msm_vidc_pineapple.c b/driver/platform/pineapple/src/msm_vidc_pineapple.c index 293e846035..0647327986 100644 --- a/driver/platform/pineapple/src/msm_vidc_pineapple.c +++ b/driver/platform/pineapple/src/msm_vidc_pineapple.c @@ -2879,6 +2879,10 @@ static const u32 pineapple_vdec_output_properties_av1[] = { HFI_PROP_FENCE, }; +static const u32 pineapple_msm_vidc_ssr_type[] = { + HFI_SSR_TYPE_SW_ERR_FATAL, +}; + static const struct msm_vidc_platform_data pineapple_data = { /* resources dependent on other module */ .bw_tbl = pineapple_bw_table, @@ -2946,6 +2950,10 @@ static const struct msm_vidc_platform_data pineapple_data = { .dec_output_prop_size_hevc = ARRAY_SIZE(pineapple_vdec_output_properties_hevc), .dec_output_prop_size_vp9 = ARRAY_SIZE(pineapple_vdec_output_properties_vp9), .dec_output_prop_size_av1 = ARRAY_SIZE(pineapple_vdec_output_properties_av1), + + .msm_vidc_ssr_type = pineapple_msm_vidc_ssr_type, + .msm_vidc_ssr_type_size = ARRAY_SIZE(pineapple_msm_vidc_ssr_type), + }; int msm_vidc_pineapple_check_ddr_type(void) diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index 7db6c5edde..e59a5de452 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -644,6 +644,7 @@ enum msm_vidc_core_capability_type { DEVICE_CAPS, SUPPORTS_REQUESTS, SUPPORTS_SYNX_FENCE, + SSR_TYPE, CORE_CAP_MAX, }; diff --git a/driver/vidc/inc/venus_hfi.h b/driver/vidc/inc/venus_hfi.h index aff97bb913..51ce400d29 100644 --- a/driver/vidc/inc/venus_hfi.h +++ b/driver/vidc/inc/venus_hfi.h @@ -65,6 +65,7 @@ int venus_hfi_core_init(struct msm_vidc_core *core); int venus_hfi_core_deinit(struct msm_vidc_core *core, bool force); int venus_hfi_noc_error_info(struct msm_vidc_core *core); int venus_hfi_suspend(struct msm_vidc_core *core); +bool is_ssr_type_allowed(struct msm_vidc_core *core, u32 type); int venus_hfi_trigger_ssr(struct msm_vidc_core *core, u32 type, u32 client_id, u32 addr); int venus_hfi_trigger_stability(struct msm_vidc_inst *inst, u32 type, diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index ea98717c0e..6a34ad3bd5 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -922,15 +922,27 @@ int venus_hfi_suspend(struct msm_vidc_core *core) return rc; } +bool is_ssr_type_allowed(struct msm_vidc_core *core, u32 type) +{ + u32 i; + const u32 *ssr_type = core->platform->data.msm_vidc_ssr_type; + u32 ssr_type_size = core->platform->data.msm_vidc_ssr_type_size; + + for (i = 0; i < ssr_type_size; i++) { + if (type == ssr_type[i]) + return true; + } + return false; +} + int venus_hfi_trigger_ssr(struct msm_vidc_core *core, u32 type, u32 client_id, u32 addr) { int rc = 0; u32 payload[2]; - // WA for CR: 3584248 - if (type != HFI_SSR_TYPE_SW_ERR_FATAL) { - d_vpr_h("SSR Type 0x1 is only allowed for pineapple\n"); + if (!is_ssr_type_allowed(core, type)) { + d_vpr_h("SSR Type %d is not allowed\n", type); return rc; } From 9df60c1fa44e6d81abca715f02f20ada74269f68 Mon Sep 17 00:00:00 2001 From: Megha Byahatti Date: Thu, 14 Dec 2023 10:31:30 +0530 Subject: [PATCH 1019/1061] video: driver: Add pipes scalability for multi slice count - Add pipes check to support different Tile sizes based on number of VPP Pipes for HFI_IRIS3_ENC_TILE_SIZE_INFO, HFI_IRIS3_ENC_MB_BASED_MULTI_SLICE_COUNT. HFI review done with ccb id 3284017. Change-Id: I2e403ac712143635fd9ff5167260e23d6b48c482 Signed-off-by: Megha Byahatti --- driver/variant/iris3/inc/hfi_buffer_iris3.h | 21 ++++++++++++++----- .../variant/iris3/src/msm_vidc_buffer_iris3.c | 7 ++++++- driver/variant/iris33/inc/hfi_buffer_iris33.h | 21 ++++++++++++++----- .../iris33/src/msm_vidc_buffer_iris33.c | 7 ++++++- 4 files changed, 44 insertions(+), 12 deletions(-) diff --git a/driver/variant/iris3/inc/hfi_buffer_iris3.h b/driver/variant/iris3/inc/hfi_buffer_iris3.h index 7137b6e23e..dc233d9692 100644 --- a/driver/variant/iris3/inc/hfi_buffer_iris3.h +++ b/driver/variant/iris3/inc/hfi_buffer_iris3.h @@ -1168,10 +1168,21 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ } while (0) #define HFI_IRIS3_ENC_TILE_SIZE_INFO(tile_size, tile_count, last_tile_size, \ - frame_width_coded, codec_standard) \ + frame_width_coded, codec_standard, num_vpp_pipes) \ do { \ - HFI_U32 without_tile_enc_width; \ - HFI_U32 min_tile_size = 352, fixed_tile_width = 960; \ + HFI_U32 without_tile_enc_width, min_tile_size, fixed_tile_width; \ + if (num_vpp_pipes == 4) { \ + min_tile_size = 352; \ + fixed_tile_width = 960; \ + } \ + else if (num_vpp_pipes == 2) { \ + min_tile_size = 256; \ + fixed_tile_width = 768; \ + } \ + else { \ + min_tile_size = 256; \ + fixed_tile_width = 672; \ + } \ without_tile_enc_width = min_tile_size + fixed_tile_width; \ if ((codec_standard == HFI_CODEC_ENCODE_HEVC) && \ (frame_width_coded > without_tile_enc_width)) { \ @@ -1190,7 +1201,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ } while (0) #define HFI_IRIS3_ENC_MB_BASED_MULTI_SLICE_COUNT(total_slice_count, frame_width, frame_height, \ - codec_standard, multi_slice_max_mb_count) \ + codec_standard, multi_slice_max_mb_count, num_vpp_pipes) \ do { \ HFI_U32 tile_size, tile_count, last_tile_size, \ slice_count_per_tile, slice_count_in_last_tile; \ @@ -1200,7 +1211,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ frame_width_coded = HFI_ALIGN(frame_width, lcu_size); \ frame_height_coded = HFI_ALIGN(frame_height, lcu_size); \ HFI_IRIS3_ENC_TILE_SIZE_INFO(tile_size, tile_count, last_tile_size, \ - frame_width_coded, codec_standard); \ + frame_width_coded, codec_standard, num_vpp_pipes); \ mbs_in_one_tile = (tile_size * frame_height_coded) / (lcu_size * lcu_size); \ slice_count_per_tile = \ (mbs_in_one_tile + multi_slice_max_mb_count - 1) / \ diff --git a/driver/variant/iris3/src/msm_vidc_buffer_iris3.c b/driver/variant/iris3/src/msm_vidc_buffer_iris3.c index 14f4589799..f30050213d 100644 --- a/driver/variant/iris3/src/msm_vidc_buffer_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_buffer_iris3.c @@ -642,11 +642,13 @@ static int msm_buffer_delivery_mode_based_min_count_iris3(struct msm_vidc_inst * uint32_t count) { struct v4l2_format *f; + struct msm_vidc_core *core = NULL; u32 width, height, total_num_slices = 1; u32 hfi_codec = 0; u32 max_mbs_per_slice = 0; u32 slice_mode = 0; u32 delivery_mode = 0; + u32 num_vpp_pipes; slice_mode = inst->capabilities[SLICE_MODE].value; delivery_mode = inst->capabilities[DELIVERY_MODE].value; @@ -666,8 +668,11 @@ static int msm_buffer_delivery_mode_based_min_count_iris3(struct msm_vidc_inst * else if (inst->codec == MSM_VIDC_HEVC) hfi_codec = HFI_CODEC_ENCODE_HEVC; + core = inst->core; + num_vpp_pipes = core->capabilities[NUM_VPP_PIPE].value; + HFI_IRIS3_ENC_MB_BASED_MULTI_SLICE_COUNT(total_num_slices, width, height, - hfi_codec, max_mbs_per_slice); + hfi_codec, max_mbs_per_slice, num_vpp_pipes); return (total_num_slices * count); } diff --git a/driver/variant/iris33/inc/hfi_buffer_iris33.h b/driver/variant/iris33/inc/hfi_buffer_iris33.h index 1e20d701a7..59ae44317f 100644 --- a/driver/variant/iris33/inc/hfi_buffer_iris33.h +++ b/driver/variant/iris33/inc/hfi_buffer_iris33.h @@ -1168,10 +1168,21 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ } while (0) #define HFI_IRIS3_ENC_TILE_SIZE_INFO(tile_size, tile_count, last_tile_size, \ - frame_width_coded, codec_standard) \ + frame_width_coded, codec_standard, num_vpp_pipes) \ do { \ - HFI_U32 without_tile_enc_width; \ - HFI_U32 min_tile_size = 352, fixed_tile_width = 960; \ + HFI_U32 without_tile_enc_width, min_tile_size, fixed_tile_width; \ + if (num_vpp_pipes == 4) { \ + min_tile_size = 352; \ + fixed_tile_width = 960; \ + } \ + else if (num_vpp_pipes == 2) { \ + min_tile_size = 256; \ + fixed_tile_width = 768; \ + } \ + else { \ + min_tile_size = 256; \ + fixed_tile_width = 672; \ + } \ without_tile_enc_width = min_tile_size + fixed_tile_width; \ if ((codec_standard == HFI_CODEC_ENCODE_HEVC) && \ (frame_width_coded > without_tile_enc_width)) { \ @@ -1190,7 +1201,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ } while (0) #define HFI_IRIS3_ENC_MB_BASED_MULTI_SLICE_COUNT(total_slice_count, frame_width, frame_height, \ - codec_standard, multi_slice_max_mb_count) \ + codec_standard, multi_slice_max_mb_count, num_vpp_pipes) \ do { \ HFI_U32 tile_size, tile_count, last_tile_size, \ slice_count_per_tile, slice_count_in_last_tile; \ @@ -1200,7 +1211,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ frame_width_coded = HFI_ALIGN(frame_width, lcu_size); \ frame_height_coded = HFI_ALIGN(frame_height, lcu_size); \ HFI_IRIS3_ENC_TILE_SIZE_INFO(tile_size, tile_count, last_tile_size, \ - frame_width_coded, codec_standard); \ + frame_width_coded, codec_standard, num_vpp_pipes); \ mbs_in_one_tile = (tile_size * frame_height_coded) / (lcu_size * lcu_size); \ slice_count_per_tile = \ (mbs_in_one_tile + multi_slice_max_mb_count - 1) / \ diff --git a/driver/variant/iris33/src/msm_vidc_buffer_iris33.c b/driver/variant/iris33/src/msm_vidc_buffer_iris33.c index a5a8e600ba..b3f8ca5b7f 100644 --- a/driver/variant/iris33/src/msm_vidc_buffer_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_buffer_iris33.c @@ -649,11 +649,13 @@ static int msm_buffer_delivery_mode_based_min_count_iris33(struct msm_vidc_inst uint32_t count) { struct v4l2_format *f; + struct msm_vidc_core *core = NULL; u32 width, height, total_num_slices = 1; u32 hfi_codec = 0; u32 max_mbs_per_slice = 0; u32 slice_mode = 0; u32 delivery_mode = 0; + u32 num_vpp_pipes; slice_mode = inst->capabilities[SLICE_MODE].value; delivery_mode = inst->capabilities[DELIVERY_MODE].value; @@ -673,8 +675,11 @@ static int msm_buffer_delivery_mode_based_min_count_iris33(struct msm_vidc_inst else if (inst->codec == MSM_VIDC_HEVC) hfi_codec = HFI_CODEC_ENCODE_HEVC; + core = inst->core; + num_vpp_pipes = core->capabilities[NUM_VPP_PIPE].value; + HFI_IRIS3_ENC_MB_BASED_MULTI_SLICE_COUNT(total_num_slices, width, height, - hfi_codec, max_mbs_per_slice); + hfi_codec, max_mbs_per_slice, num_vpp_pipes); return (total_num_slices * count); } From 761dd442e034f05eb4c0d139a5ea4ea5386fcff9 Mon Sep 17 00:00:00 2001 From: Megha Byahatti Date: Thu, 14 Dec 2023 10:31:30 +0530 Subject: [PATCH 1020/1061] video: driver: Add pipes scalability for multi slice count - Add pipes check to support different Tile sizes based on number of VPP Pipes for HFI_IRIS3_ENC_TILE_SIZE_INFO, HFI_IRIS3_ENC_MB_BASED_MULTI_SLICE_COUNT. HFI review done with ccb id 3284017. Change-Id: I2e403ac712143635fd9ff5167260e23d6b48c482 Signed-off-by: Megha Byahatti (cherry picked from commit 9df60c1fa44e6d81abca715f02f20ada74269f68) --- driver/variant/iris3/inc/hfi_buffer_iris3.h | 21 ++++++++++++++----- .../variant/iris3/src/msm_vidc_buffer_iris3.c | 7 ++++++- driver/variant/iris33/inc/hfi_buffer_iris33.h | 21 ++++++++++++++----- .../iris33/src/msm_vidc_buffer_iris33.c | 7 ++++++- 4 files changed, 44 insertions(+), 12 deletions(-) diff --git a/driver/variant/iris3/inc/hfi_buffer_iris3.h b/driver/variant/iris3/inc/hfi_buffer_iris3.h index 7137b6e23e..dc233d9692 100644 --- a/driver/variant/iris3/inc/hfi_buffer_iris3.h +++ b/driver/variant/iris3/inc/hfi_buffer_iris3.h @@ -1168,10 +1168,21 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ } while (0) #define HFI_IRIS3_ENC_TILE_SIZE_INFO(tile_size, tile_count, last_tile_size, \ - frame_width_coded, codec_standard) \ + frame_width_coded, codec_standard, num_vpp_pipes) \ do { \ - HFI_U32 without_tile_enc_width; \ - HFI_U32 min_tile_size = 352, fixed_tile_width = 960; \ + HFI_U32 without_tile_enc_width, min_tile_size, fixed_tile_width; \ + if (num_vpp_pipes == 4) { \ + min_tile_size = 352; \ + fixed_tile_width = 960; \ + } \ + else if (num_vpp_pipes == 2) { \ + min_tile_size = 256; \ + fixed_tile_width = 768; \ + } \ + else { \ + min_tile_size = 256; \ + fixed_tile_width = 672; \ + } \ without_tile_enc_width = min_tile_size + fixed_tile_width; \ if ((codec_standard == HFI_CODEC_ENCODE_HEVC) && \ (frame_width_coded > without_tile_enc_width)) { \ @@ -1190,7 +1201,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ } while (0) #define HFI_IRIS3_ENC_MB_BASED_MULTI_SLICE_COUNT(total_slice_count, frame_width, frame_height, \ - codec_standard, multi_slice_max_mb_count) \ + codec_standard, multi_slice_max_mb_count, num_vpp_pipes) \ do { \ HFI_U32 tile_size, tile_count, last_tile_size, \ slice_count_per_tile, slice_count_in_last_tile; \ @@ -1200,7 +1211,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ frame_width_coded = HFI_ALIGN(frame_width, lcu_size); \ frame_height_coded = HFI_ALIGN(frame_height, lcu_size); \ HFI_IRIS3_ENC_TILE_SIZE_INFO(tile_size, tile_count, last_tile_size, \ - frame_width_coded, codec_standard); \ + frame_width_coded, codec_standard, num_vpp_pipes); \ mbs_in_one_tile = (tile_size * frame_height_coded) / (lcu_size * lcu_size); \ slice_count_per_tile = \ (mbs_in_one_tile + multi_slice_max_mb_count - 1) / \ diff --git a/driver/variant/iris3/src/msm_vidc_buffer_iris3.c b/driver/variant/iris3/src/msm_vidc_buffer_iris3.c index 14f4589799..f30050213d 100644 --- a/driver/variant/iris3/src/msm_vidc_buffer_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_buffer_iris3.c @@ -642,11 +642,13 @@ static int msm_buffer_delivery_mode_based_min_count_iris3(struct msm_vidc_inst * uint32_t count) { struct v4l2_format *f; + struct msm_vidc_core *core = NULL; u32 width, height, total_num_slices = 1; u32 hfi_codec = 0; u32 max_mbs_per_slice = 0; u32 slice_mode = 0; u32 delivery_mode = 0; + u32 num_vpp_pipes; slice_mode = inst->capabilities[SLICE_MODE].value; delivery_mode = inst->capabilities[DELIVERY_MODE].value; @@ -666,8 +668,11 @@ static int msm_buffer_delivery_mode_based_min_count_iris3(struct msm_vidc_inst * else if (inst->codec == MSM_VIDC_HEVC) hfi_codec = HFI_CODEC_ENCODE_HEVC; + core = inst->core; + num_vpp_pipes = core->capabilities[NUM_VPP_PIPE].value; + HFI_IRIS3_ENC_MB_BASED_MULTI_SLICE_COUNT(total_num_slices, width, height, - hfi_codec, max_mbs_per_slice); + hfi_codec, max_mbs_per_slice, num_vpp_pipes); return (total_num_slices * count); } diff --git a/driver/variant/iris33/inc/hfi_buffer_iris33.h b/driver/variant/iris33/inc/hfi_buffer_iris33.h index 1e20d701a7..59ae44317f 100644 --- a/driver/variant/iris33/inc/hfi_buffer_iris33.h +++ b/driver/variant/iris33/inc/hfi_buffer_iris33.h @@ -1168,10 +1168,21 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ } while (0) #define HFI_IRIS3_ENC_TILE_SIZE_INFO(tile_size, tile_count, last_tile_size, \ - frame_width_coded, codec_standard) \ + frame_width_coded, codec_standard, num_vpp_pipes) \ do { \ - HFI_U32 without_tile_enc_width; \ - HFI_U32 min_tile_size = 352, fixed_tile_width = 960; \ + HFI_U32 without_tile_enc_width, min_tile_size, fixed_tile_width; \ + if (num_vpp_pipes == 4) { \ + min_tile_size = 352; \ + fixed_tile_width = 960; \ + } \ + else if (num_vpp_pipes == 2) { \ + min_tile_size = 256; \ + fixed_tile_width = 768; \ + } \ + else { \ + min_tile_size = 256; \ + fixed_tile_width = 672; \ + } \ without_tile_enc_width = min_tile_size + fixed_tile_width; \ if ((codec_standard == HFI_CODEC_ENCODE_HEVC) && \ (frame_width_coded > without_tile_enc_width)) { \ @@ -1190,7 +1201,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ } while (0) #define HFI_IRIS3_ENC_MB_BASED_MULTI_SLICE_COUNT(total_slice_count, frame_width, frame_height, \ - codec_standard, multi_slice_max_mb_count) \ + codec_standard, multi_slice_max_mb_count, num_vpp_pipes) \ do { \ HFI_U32 tile_size, tile_count, last_tile_size, \ slice_count_per_tile, slice_count_in_last_tile; \ @@ -1200,7 +1211,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ frame_width_coded = HFI_ALIGN(frame_width, lcu_size); \ frame_height_coded = HFI_ALIGN(frame_height, lcu_size); \ HFI_IRIS3_ENC_TILE_SIZE_INFO(tile_size, tile_count, last_tile_size, \ - frame_width_coded, codec_standard); \ + frame_width_coded, codec_standard, num_vpp_pipes); \ mbs_in_one_tile = (tile_size * frame_height_coded) / (lcu_size * lcu_size); \ slice_count_per_tile = \ (mbs_in_one_tile + multi_slice_max_mb_count - 1) / \ diff --git a/driver/variant/iris33/src/msm_vidc_buffer_iris33.c b/driver/variant/iris33/src/msm_vidc_buffer_iris33.c index a5a8e600ba..b3f8ca5b7f 100644 --- a/driver/variant/iris33/src/msm_vidc_buffer_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_buffer_iris33.c @@ -649,11 +649,13 @@ static int msm_buffer_delivery_mode_based_min_count_iris33(struct msm_vidc_inst uint32_t count) { struct v4l2_format *f; + struct msm_vidc_core *core = NULL; u32 width, height, total_num_slices = 1; u32 hfi_codec = 0; u32 max_mbs_per_slice = 0; u32 slice_mode = 0; u32 delivery_mode = 0; + u32 num_vpp_pipes; slice_mode = inst->capabilities[SLICE_MODE].value; delivery_mode = inst->capabilities[DELIVERY_MODE].value; @@ -673,8 +675,11 @@ static int msm_buffer_delivery_mode_based_min_count_iris33(struct msm_vidc_inst else if (inst->codec == MSM_VIDC_HEVC) hfi_codec = HFI_CODEC_ENCODE_HEVC; + core = inst->core; + num_vpp_pipes = core->capabilities[NUM_VPP_PIPE].value; + HFI_IRIS3_ENC_MB_BASED_MULTI_SLICE_COUNT(total_num_slices, width, height, - hfi_codec, max_mbs_per_slice); + hfi_codec, max_mbs_per_slice, num_vpp_pipes); return (total_num_slices * count); } From 4459cd1e4c17a47e8f79ac3b9978d78b76dad529 Mon Sep 17 00:00:00 2001 From: Vedang Nagar Date: Wed, 31 Jan 2024 18:40:38 +0530 Subject: [PATCH 1021/1061] video: driver: do not send resume on output port for encoder HFI_CMD_RESUME is not required on output port for encoder. Add change to skip the same. HFI Doc snippet for reference: * There is no usage of resume command for encoder output port. Change-Id: Ib2f7177f38de4b780c4627c7bdb03cbc61a63399 Signed-off-by: Vedang Nagar --- driver/vidc/src/msm_vidc_driver.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 23571016d5..d4c9656d82 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2020-2022, The Linux Foundation. All rights reserved. - * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved. */ #include @@ -1056,7 +1056,8 @@ int msm_vidc_process_resume(struct msm_vidc_inst *inst) return rc; clear_sub_state |= MSM_VIDC_INPUT_PAUSE; } - if (is_sub_state(inst, MSM_VIDC_OUTPUT_PAUSE)) { + if (is_sub_state(inst, MSM_VIDC_OUTPUT_PAUSE) && + !is_encode_session(inst)) { rc = venus_hfi_session_resume(inst, OUTPUT_PORT, HFI_CMD_SETTINGS_CHANGE); if (rc) @@ -1073,7 +1074,8 @@ int msm_vidc_process_resume(struct msm_vidc_inst *inst) return rc; clear_sub_state |= MSM_VIDC_INPUT_PAUSE; } - if (is_sub_state(inst, MSM_VIDC_OUTPUT_PAUSE)) { + if (is_sub_state(inst, MSM_VIDC_OUTPUT_PAUSE) && + !is_encode_session(inst)) { rc = venus_hfi_session_resume(inst, OUTPUT_PORT, HFI_CMD_DRAIN); if (rc) return rc; From 08ebfd7f875a7674b1501fcbc2ca9b0c7a0ca2fd Mon Sep 17 00:00:00 2001 From: Megha Byahatti Date: Sun, 28 Jan 2024 14:46:43 +0530 Subject: [PATCH 1022/1061] video: driver: Fix ddr voting to 0 after drain After drain command when there is inactive session,the difference between last qbuf input and current time was exceeding the MSM_VIDC_SESSION_INACTIVE_THRESHOLD_MS which was leading to ddr voting 0(total_bw_ddr = 0). When there are no video frames to process, ensure minimum passive ddr voting for Tensilica(1000kbps). Change-Id: I5ead2dcf95581b302fd711e4ec08962e876e09b9 Signed-off-by: Megha Byahatti --- driver/vidc/src/msm_vidc_power.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/driver/vidc/src/msm_vidc_power.c b/driver/vidc/src/msm_vidc_power.c index a0ae2cdaa3..938828de78 100644 --- a/driver/vidc/src/msm_vidc_power.c +++ b/driver/vidc/src/msm_vidc_power.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. - * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved. */ #include "msm_vidc_power.h" @@ -20,6 +20,7 @@ #define MSM_VIDC_MAX_UBWC_COMPLEXITY_FACTOR (4 << 16) #define MSM_VIDC_MIN_UBWC_COMPRESSION_RATIO (1 << 16) #define MSM_VIDC_MAX_UBWC_COMPRESSION_RATIO (5 << 16) +#define PASSIVE_VOTE 1000 /** * Utility function to enforce some of our assumptions. Spam calls to this @@ -187,6 +188,10 @@ static int msm_vidc_set_buses(struct msm_vidc_inst *inst) } mutex_unlock(&core->lock); + /* Incase of no video frames to process ensure min passive voting for Tensilica */ + if (!total_bw_ddr) + total_bw_ddr = PASSIVE_VOTE; + if (msm_vidc_ddr_bw) { d_vpr_l("msm_vidc_ddr_bw %d\n", msm_vidc_ddr_bw); total_bw_ddr = msm_vidc_ddr_bw; From f5d2b917240607a92086c647e70d2eff00066872 Mon Sep 17 00:00:00 2001 From: Nikhil Tarte Date: Mon, 5 Feb 2024 00:20:47 -0800 Subject: [PATCH 1023/1061] Revert "video-driver: Increase sleep to 200us before xo de-assert" This reverts commit 025b958d188ee59a32d5a394cd216f3037c550c5. Reason for revert: Reverting on Release Branch. Change-Id: I605a16e5042c3f9c60b4cdc04973b496304ef130 --- driver/variant/iris33/src/msm_vidc_iris33.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/driver/variant/iris33/src/msm_vidc_iris33.c b/driver/variant/iris33/src/msm_vidc_iris33.c index 84d763e9bf..7a4bf68b8a 100644 --- a/driver/variant/iris33/src/msm_vidc_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_iris33.c @@ -515,7 +515,7 @@ static int __power_off_iris33_controller(struct msm_vidc_core *core) d_vpr_e("%s: MVP_NOC_CORE_SW_RESET failed\n", __func__); /* De-assert video_cc XO reset */ - usleep_range(200, 300); + usleep_range(80, 100); rc = call_res_op(core, reset_control_deassert, core, "video_xo_reset"); if (rc) d_vpr_e("%s: deassert video_xo_reset failed\n", __func__); From fe23c9409bf31996c0b9256abe821be5e1359ceb Mon Sep 17 00:00:00 2001 From: Rajathi S Date: Wed, 31 Jan 2024 19:06:35 +0530 Subject: [PATCH 1024/1061] Video: Driver: Add support for Volcano - Add the basic driver support for volcano variant. - Add platform specific files for volcano. Change-Id: Iaa736415dc495912ed598a94fca736937015ac7b Signed-off-by: Rajathi S --- BUILD.bazel | 21 +- config/volcano_video.conf | 2 + config/volcano_video.h | 6 + .../platform/common/src/msm_vidc_platform.c | 13 +- .../platform/volcano/inc/msm_vidc_volcano.h | 27 + .../platform/volcano/src/msm_vidc_volcano.c | 5249 +++++++++++++++++ driver/variant/iris2/inc/msm_vidc_iris2.h | 4 +- driver/vidc/src/msm_vidc_probe.c | 6 +- msm_video/Kbuild | 15 + target.bzl | 12 + video_modules.bzl | 6 + 11 files changed, 5355 insertions(+), 6 deletions(-) create mode 100644 config/volcano_video.conf create mode 100644 config/volcano_video.h create mode 100644 driver/platform/volcano/inc/msm_vidc_volcano.h create mode 100644 driver/platform/volcano/src/msm_vidc_volcano.c diff --git a/BUILD.bazel b/BUILD.bazel index a6898c7af4..473cb80f43 100644 --- a/BUILD.bazel +++ b/BUILD.bazel @@ -37,6 +37,22 @@ ddk_headers( includes = ["driver/variant/iris33/inc"] ) +ddk_headers( + name = "iris2_headers", + hdrs = glob([ + "driver/variant/iris2/inc/*.h", + ]), + includes = ["driver/variant/iris2/inc"] +) + +ddk_headers( + name = "volcano_headers", + hdrs = glob([ + "driver/platform/volcano/inc/*.h", + ]), + includes = ["driver/platform/volcano/inc"] +) + ddk_headers( name = "vidc_headers", hdrs = glob([ @@ -50,8 +66,11 @@ ddk_headers( ddk_headers( name = "video_driver_headers", # hdrs = [":pineapple_configs", "uapi_headers", "pineapple_headers", "iris33_headers", "vidc_headers"] - hdrs = [":uapi_headers", "pineapple_headers", "cliffs_headers", "iris33_headers", "vidc_headers"] + hdrs = [":uapi_headers", "pineapple_headers", "cliffs_headers", "iris33_headers", "volcano_headers", "iris2_headers", "vidc_headers"] ) load(":target.bzl", "define_pineapple") define_pineapple() + +load(":target.bzl", "define_volcano") +define_volcano() diff --git a/config/volcano_video.conf b/config/volcano_video.conf new file mode 100644 index 0000000000..3c30d2db62 --- /dev/null +++ b/config/volcano_video.conf @@ -0,0 +1,2 @@ +# SPDX-License-Identifier: GPL-2.0-only +export CONFIG_MSM_VIDC_VOLCANO=y \ No newline at end of file diff --git a/config/volcano_video.h b/config/volcano_video.h new file mode 100644 index 0000000000..4e16ba8a5b --- /dev/null +++ b/config/volcano_video.h @@ -0,0 +1,6 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#define CONFIG_MSM_VIDC_VOLCANO 1 diff --git a/driver/platform/common/src/msm_vidc_platform.c b/driver/platform/common/src/msm_vidc_platform.c index d1b8cc7154..a137134fd9 100644 --- a/driver/platform/common/src/msm_vidc_platform.c +++ b/driver/platform/common/src/msm_vidc_platform.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. - * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved. */ #include @@ -22,6 +22,10 @@ #include "hfi_property.h" #include "venus_hfi.h" +#if defined(CONFIG_MSM_VIDC_VOLCANO) +#include "msm_vidc_volcano.h" +#include "msm_vidc_iris2.h" +#endif #if defined(CONFIG_MSM_VIDC_PINEAPPLE) #include "msm_vidc_pineapple.h" #include "msm_vidc_cliffs.h" @@ -243,6 +247,13 @@ static const struct msm_vidc_compat_handle compat_handle[] = { .init_iris = msm_vidc_init_iris2, }, #endif +#if defined(CONFIG_MSM_VIDC_VOLCANO) + { + .compat = "qcom,volcano-vidc", + .init_platform = msm_vidc_init_platform_volcano, + .init_iris = msm_vidc_init_iris2, + }, +#endif }; static int msm_vidc_init_ops(struct msm_vidc_core *core) diff --git a/driver/platform/volcano/inc/msm_vidc_volcano.h b/driver/platform/volcano/inc/msm_vidc_volcano.h new file mode 100644 index 0000000000..5279b0e95d --- /dev/null +++ b/driver/platform/volcano/inc/msm_vidc_volcano.h @@ -0,0 +1,27 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) 2020-2022, The Linux Foundation. All rights reserved. + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#ifndef _MSM_VIDC_VOLCANO_H_ +#define _MSM_VIDC_VOLCANO_H_ + +#include "msm_vidc_core.h" + +#if defined(CONFIG_MSM_VIDC_VOLCANO) +int msm_vidc_init_platform_volcano(struct msm_vidc_core *core); +int msm_vidc_deinit_platform_volcano(struct msm_vidc_core *core); +#else +int msm_vidc_init_platform_volcano(struct msm_vidc_core *core) +{ + return -EINVAL; +} + +int msm_vidc_deinit_platform_volcano(struct msm_vidc_core *core) +{ + return -EINVAL; +} +#endif + +#endif // _MSM_VIDC_VOLCANO_H_ diff --git a/driver/platform/volcano/src/msm_vidc_volcano.c b/driver/platform/volcano/src/msm_vidc_volcano.c new file mode 100644 index 0000000000..bcd5138f89 --- /dev/null +++ b/driver/platform/volcano/src/msm_vidc_volcano.c @@ -0,0 +1,5249 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2020-2022, The Linux Foundation. All rights reserved. + * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include +#include + +#include +#include + +#include +#include "msm_vidc_volcano.h" +#include "msm_vidc_platform.h" +#include "msm_vidc_debug.h" +#include "msm_vidc_internal.h" +#include "msm_vidc_platform_ext.h" +#include "msm_vidc_memory_ext.h" +#include "msm_vidc_synx.h" +#include "resources_ext.h" +#include "msm_vidc_iris2.h" +#include "hfi_property.h" +#include "hfi_command.h" +#include "venus_hfi.h" + +/* version: major[24:31], minor[16:23], revision[0:15] */ +#define DRIVER_VERSION 0x04000000 +#define DEFAULT_VIDEO_CONCEAL_COLOR_BLACK 0x8020010 +#define MAX_BASE_LAYER_PRIORITY_ID 63 +#define MAX_OP_POINT 31 +#define MAX_BITRATE 160000000 +#define MAX_BITRATE_V1 100000000 +#define DEFAULT_BITRATE 20000000 +#define MINIMUM_FPS 1 +#define MAXIMUM_FPS 480 +#define MAX_QP 51 +#define DEFAULT_QP 20 +#define MAX_CONSTANT_QUALITY 100 +#define MIN_SLICE_BYTE_SIZE 512 +#define MAX_SLICE_BYTE_SIZE \ + ((MAX_BITRATE) >> 3) +#define MAX_SLICE_BYTE_SIZE_V1 \ + ((MAX_BITRATE_V1) >> 3) +#define MAX_SLICE_MB_SIZE \ + (((4096 + 15) >> 4) * ((2160 + 15) >> 4)) + +#define ENC MSM_VIDC_ENCODER +#define DEC MSM_VIDC_DECODER +#define H264 MSM_VIDC_H264 +#define HEVC MSM_VIDC_HEVC +#define VP9 MSM_VIDC_VP9 +#define AV1 MSM_VIDC_AV1 +#define HEIC MSM_VIDC_HEIC +#define CODECS_ALL (H264 | HEVC | VP9 | HEIC) +#define MAXIMUM_OVERRIDE_VP9_FPS 200 + +static struct codec_info codec_data_volcano[] = { + { + .v4l2_codec = V4L2_PIX_FMT_H264, + .vidc_codec = MSM_VIDC_H264, + .pixfmt_name = "AVC", + }, + { + .v4l2_codec = V4L2_PIX_FMT_HEVC, + .vidc_codec = MSM_VIDC_HEVC, + .pixfmt_name = "HEVC", + }, + { + .v4l2_codec = V4L2_PIX_FMT_VP9, + .vidc_codec = MSM_VIDC_VP9, + .pixfmt_name = "VP9", + }, + { + .v4l2_codec = V4L2_PIX_FMT_VIDC_HEIC, + .vidc_codec = MSM_VIDC_HEIC, + .pixfmt_name = "HEIC", + }, +}; + +static struct color_format_info color_format_data_volcano[] = { + { + .v4l2_color_format = V4L2_PIX_FMT_NV12, + .vidc_color_format = MSM_VIDC_FMT_NV12, + .pixfmt_name = "NV12", + }, + { + .v4l2_color_format = V4L2_PIX_FMT_NV21, + .vidc_color_format = MSM_VIDC_FMT_NV21, + .pixfmt_name = "NV21", + }, + { + .v4l2_color_format = V4L2_PIX_FMT_QC08C, + .vidc_color_format = MSM_VIDC_FMT_NV12C, + .pixfmt_name = "NV12C", + }, + { + .v4l2_color_format = V4L2_PIX_FMT_QC10C, + .vidc_color_format = MSM_VIDC_FMT_TP10C, + .pixfmt_name = "TP10C", + }, + { + .v4l2_color_format = V4L2_PIX_FMT_RGBA32, + .vidc_color_format = MSM_VIDC_FMT_RGBA8888, + .pixfmt_name = "RGBA", + }, + { + .v4l2_color_format = V4L2_PIX_FMT_P010, + .vidc_color_format = MSM_VIDC_FMT_P010, + .pixfmt_name = "P010", + }, + { + .v4l2_color_format = V4L2_META_FMT_VIDC, + .vidc_color_format = MSM_VIDC_FMT_META, + .pixfmt_name = "META", + }, +}; + +static struct color_primaries_info color_primaries_data_volcano[] = { + { + .v4l2_color_primaries = V4L2_COLORSPACE_DEFAULT, + .vidc_color_primaries = MSM_VIDC_PRIMARIES_RESERVED, + }, + { + .v4l2_color_primaries = V4L2_COLORSPACE_DEFAULT, + .vidc_color_primaries = MSM_VIDC_PRIMARIES_UNSPECIFIED, + }, + { + .v4l2_color_primaries = V4L2_COLORSPACE_REC709, + .vidc_color_primaries = MSM_VIDC_PRIMARIES_BT709, + }, + { + .v4l2_color_primaries = V4L2_COLORSPACE_470_SYSTEM_M, + .vidc_color_primaries = MSM_VIDC_PRIMARIES_BT470_SYSTEM_M, + }, + { + .v4l2_color_primaries = V4L2_COLORSPACE_470_SYSTEM_BG, + .vidc_color_primaries = MSM_VIDC_PRIMARIES_BT470_SYSTEM_BG, + }, + { + .v4l2_color_primaries = V4L2_COLORSPACE_SMPTE170M, + .vidc_color_primaries = MSM_VIDC_PRIMARIES_BT601_525, + }, + { + .v4l2_color_primaries = V4L2_COLORSPACE_SMPTE240M, + .vidc_color_primaries = MSM_VIDC_PRIMARIES_SMPTE_ST240M, + }, + { + .v4l2_color_primaries = V4L2_COLORSPACE_VIDC_GENERIC_FILM, + .vidc_color_primaries = MSM_VIDC_PRIMARIES_GENERIC_FILM, + }, + { + .v4l2_color_primaries = V4L2_COLORSPACE_BT2020, + .vidc_color_primaries = MSM_VIDC_PRIMARIES_BT2020, + }, + { + .v4l2_color_primaries = V4L2_COLORSPACE_DCI_P3, + .vidc_color_primaries = MSM_VIDC_PRIMARIES_SMPTE_RP431_2, + }, + { + .v4l2_color_primaries = V4L2_COLORSPACE_VIDC_EG431, + .vidc_color_primaries = MSM_VIDC_PRIMARIES_SMPTE_EG431_1, + }, + { + .v4l2_color_primaries = V4L2_COLORSPACE_VIDC_EBU_TECH, + .vidc_color_primaries = MSM_VIDC_PRIMARIES_SMPTE_EBU_TECH, + }, +}; + +static struct transfer_char_info transfer_char_data_volcano[] = { + { + .v4l2_transfer_char = V4L2_XFER_FUNC_DEFAULT, + .vidc_transfer_char = MSM_VIDC_TRANSFER_RESERVED, + }, + { + .v4l2_transfer_char = V4L2_XFER_FUNC_DEFAULT, + .vidc_transfer_char = MSM_VIDC_TRANSFER_UNSPECIFIED, + }, + { + .v4l2_transfer_char = V4L2_XFER_FUNC_709, + .vidc_transfer_char = MSM_VIDC_TRANSFER_BT709, + }, + { + .v4l2_transfer_char = V4L2_XFER_FUNC_VIDC_BT470_SYSTEM_M, + .vidc_transfer_char = MSM_VIDC_TRANSFER_BT470_SYSTEM_M, + }, + { + .v4l2_transfer_char = V4L2_XFER_FUNC_VIDC_BT470_SYSTEM_BG, + .vidc_transfer_char = MSM_VIDC_TRANSFER_BT470_SYSTEM_BG, + }, + { + .v4l2_transfer_char = V4L2_XFER_FUNC_VIDC_BT601_525_OR_625, + .vidc_transfer_char = MSM_VIDC_TRANSFER_BT601_525_OR_625, + }, + { + .v4l2_transfer_char = V4L2_XFER_FUNC_SMPTE240M, + .vidc_transfer_char = MSM_VIDC_TRANSFER_SMPTE_ST240M, + }, + { + .v4l2_transfer_char = V4L2_XFER_FUNC_VIDC_LINEAR, + .vidc_transfer_char = MSM_VIDC_TRANSFER_LINEAR, + }, + { + .v4l2_transfer_char = V4L2_XFER_FUNC_VIDC_XVYCC, + .vidc_transfer_char = MSM_VIDC_TRANSFER_XVYCC, + }, + { + .v4l2_transfer_char = V4L2_XFER_FUNC_VIDC_BT1361, + .vidc_transfer_char = MSM_VIDC_TRANSFER_BT1361_0, + }, + { + .v4l2_transfer_char = V4L2_XFER_FUNC_SRGB, + .vidc_transfer_char = MSM_VIDC_TRANSFER_SRGB_SYCC, + }, + { + .v4l2_transfer_char = V4L2_XFER_FUNC_VIDC_BT2020, + .vidc_transfer_char = MSM_VIDC_TRANSFER_BT2020_14, + }, + { + .v4l2_transfer_char = V4L2_XFER_FUNC_SMPTE2084, + .vidc_transfer_char = MSM_VIDC_TRANSFER_SMPTE_ST2084_PQ, + }, + { + .v4l2_transfer_char = V4L2_XFER_FUNC_VIDC_ST428, + .vidc_transfer_char = MSM_VIDC_TRANSFER_SMPTE_ST428_1, + }, + { + .v4l2_transfer_char = V4L2_XFER_FUNC_VIDC_HLG, + .vidc_transfer_char = MSM_VIDC_TRANSFER_BT2100_2_HLG, + }, +}; + +static struct matrix_coeff_info matrix_coeff_data_volcano[] = { + { + .v4l2_matrix_coeff = V4L2_YCBCR_ENC_DEFAULT, + .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_RESERVED, + }, + { + .v4l2_matrix_coeff = V4L2_YCBCR_ENC_DEFAULT, + .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_UNSPECIFIED, + }, + { + .v4l2_matrix_coeff = V4L2_YCBCR_VIDC_SRGB_OR_SMPTE_ST428, + .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_SRGB_SMPTE_ST428_1, + }, + { + .v4l2_matrix_coeff = V4L2_YCBCR_ENC_709, + .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_BT709, + }, + { + .v4l2_matrix_coeff = V4L2_YCBCR_ENC_XV709, + .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_BT709, + }, + { + .v4l2_matrix_coeff = V4L2_YCBCR_VIDC_FCC47_73_682, + .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_FCC_TITLE_47, + }, + { + .v4l2_matrix_coeff = V4L2_YCBCR_ENC_XV601, + .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_BT470_SYS_BG_OR_BT601_625, + }, + { + .v4l2_matrix_coeff = V4L2_YCBCR_ENC_601, + .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_BT601_525_BT1358_525_OR_625, + }, + { + .v4l2_matrix_coeff = V4L2_YCBCR_ENC_SMPTE240M, + .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_SMPTE_ST240, + }, + { + .v4l2_matrix_coeff = V4L2_YCBCR_ENC_BT2020, + .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_BT2020_NON_CONSTANT, + }, + { + .v4l2_matrix_coeff = V4L2_YCBCR_ENC_BT2020_CONST_LUM, + .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_BT2020_CONSTANT, + }, +}; + +static struct msm_platform_core_capability core_data_volcano_v0[] = { + /* {type, value} */ + {ENC_CODECS, H264 | HEVC | HEIC}, + {DEC_CODECS, H264 | HEVC | VP9 | HEIC}, + {MAX_SESSION_COUNT, 16}, + {MAX_NUM_720P_SESSIONS, 16}, + {MAX_NUM_1080P_SESSIONS, 16}, + {MAX_NUM_4K_SESSIONS, 4}, + {MAX_NUM_8K_SESSIONS, 1}, + {MAX_SECURE_SESSION_COUNT, 3}, + {MAX_RT_MBPF, 139264}, /* (4 * ((4096*2176)/256)) */ + {MAX_MBPF, 139264}, /* (4 * ((4096*2176)/256)) */ + /* max_load 4096x2176@120fps which is greater than 7680x4320@30fps */ + /* Concurrency: UHD@30 decode + uhd@30 encode */ + {MAX_MBPS, 4177920}, + {MAX_IMAGE_MBPF, 1048576}, /* (16384x16384)/256 */ + {MAX_MBPF_HQ, 8160}, /* ((1920x1088)/256) */ + {MAX_MBPS_HQ, 244800}, /* ((1920x1088)/256)@30fps */ + {MAX_MBPF_B_FRAME, 32640}, /* 3840x2176/256 */ + {MAX_MBPS_B_FRAME, 979200}, /* 3840x2176/256 MBs@30fps */ + {MAX_MBPS_ALL_INTRA, 489600}, /* ((1920x1088)/256)@60fps */ + {MAX_ENH_LAYER_COUNT, 5}, + {NUM_VPP_PIPE, 2}, + {SW_PC, 1}, + {FW_UNLOAD, 0}, + {HW_RESPONSE_TIMEOUT, HW_RESPONSE_TIMEOUT_VALUE}, /* 1000 ms */ + {SW_PC_DELAY, SW_PC_DELAY_VALUE }, /* 1500 ms (>HW_RESPONSE_TIMEOUT)*/ + {FW_UNLOAD_DELAY, FW_UNLOAD_DELAY_VALUE }, /* 3000 ms (>SW_PC_DELAY)*/ + {PAGEFAULT_NON_FATAL, 1}, + {PAGETABLE_CACHING, 0}, + {DCVS, 1}, + {DECODE_BATCH, 1}, + {DECODE_BATCH_TIMEOUT, 200}, + {STATS_TIMEOUT_MS, 2000}, + {AV_SYNC_WINDOW_SIZE, 40}, + {NON_FATAL_FAULTS, 1}, + {ENC_AUTO_FRAMERATE, 1}, + {DEVICE_CAPS, V4L2_CAP_VIDEO_M2M_MPLANE | V4L2_CAP_META_CAPTURE | + V4L2_CAP_STREAMING}, + {SUPPORTS_SYNX_FENCE, 1}, + {SUPPORTS_REQUESTS, 0}, +}; + +static struct msm_platform_core_capability core_data_volcano_v1[] = { + /* {type, value} */ + {ENC_CODECS, H264 | HEVC | HEIC}, + {DEC_CODECS, H264 | HEVC | VP9 | HEIC}, + {MAX_SESSION_COUNT, 16}, + {MAX_NUM_720P_SESSIONS, 16}, + {MAX_NUM_1080P_SESSIONS, 8}, + {MAX_NUM_4K_SESSIONS, 2}, + {MAX_SECURE_SESSION_COUNT, 3}, + {MAX_RT_MBPF, 69632}, /* (2 * ((4096x2176)/256)) */ + {MAX_MBPF, 104448}, /* (3 * ((4096x2176)/256))*/ + /* max_load 4096x2176@60fps*/ + {MAX_MBPS, 2088960}, /* Concurrency: UHD@30 decode + 1080p@30 encode */ + {MAX_IMAGE_MBPF, 1048576}, /* (16384x16384)/256 */ + {MAX_MBPF_HQ, 8160}, /* ((1920x1088)/256) */ + {MAX_MBPS_HQ, 244800}, /* ((1920x1088)/256)@30fps */ + {MAX_MBPF_B_FRAME, 32640}, /* 3840x2176/256 */ + {MAX_MBPS_B_FRAME, 979200}, /* 3840x2176/256 MBs@30fps */ + {MAX_MBPS_ALL_INTRA, 489600}, /* ((1920x1088)/256)@60fps */ + {MAX_ENH_LAYER_COUNT, 5}, + {NUM_VPP_PIPE, 2}, + {SW_PC, 1}, + {FW_UNLOAD, 0}, + {HW_RESPONSE_TIMEOUT, HW_RESPONSE_TIMEOUT_VALUE}, /* 1000 ms */ + {SW_PC_DELAY, SW_PC_DELAY_VALUE }, /* 1500 ms (>HW_RESPONSE_TIMEOUT)*/ + {FW_UNLOAD_DELAY, FW_UNLOAD_DELAY_VALUE }, /* 3000 ms (>SW_PC_DELAY)*/ + {PAGEFAULT_NON_FATAL, 1}, + {PAGETABLE_CACHING, 0}, + {DCVS, 1}, + {DECODE_BATCH, 1}, + {DECODE_BATCH_TIMEOUT, 200}, + {STATS_TIMEOUT_MS, 2000}, + {AV_SYNC_WINDOW_SIZE, 40}, + {NON_FATAL_FAULTS, 1}, + {ENC_AUTO_FRAMERATE, 1}, + {DEVICE_CAPS, V4L2_CAP_VIDEO_M2M_MPLANE | V4L2_CAP_META_CAPTURE | + V4L2_CAP_STREAMING}, + {SUPPORTS_SYNX_FENCE, 1}, + {SUPPORTS_REQUESTS, 0}, +}; + +static struct msm_platform_inst_capability instance_cap_data_volcano_v0[] = { + /* {cap, domain, codec, + * min, max, step_or_mask, value, + * v4l2_id, + * hfi_id, + * flags} + */ + {DRV_VERSION, DEC|ENC, CODECS_ALL, + 0, INT_MAX, 1, DRIVER_VERSION, + V4L2_CID_MPEG_VIDC_DRIVER_VERSION}, + + {FRAME_WIDTH, DEC, CODECS_ALL, 96, 7680, 1, 1920}, + + {FRAME_WIDTH, DEC, VP9, 96, 4096, 1, 1920}, + + {FRAME_WIDTH, ENC, CODECS_ALL, 128, 4096, 1, 1920}, + + {FRAME_WIDTH, ENC, HEVC, 96, 4096, 1, 1920}, + + {FRAME_WIDTH, ENC, HEIC, 128, 16384, 1, 16384}, + + {LOSSLESS_FRAME_WIDTH, ENC, H264|HEVC, 128, 4096, 1, 1920}, + + {LOSSLESS_FRAME_WIDTH, ENC, HEVC, 96, 4096, 1, 1920}, + + {SECURE_FRAME_WIDTH, DEC, CODECS_ALL, 96, 4096, 1, 1920}, + + {SECURE_FRAME_WIDTH, ENC, CODECS_ALL, 128, 4096, 1, 1920}, + + {SECURE_FRAME_WIDTH, ENC, HEVC, 96, 4096, 1, 1920}, + + {FRAME_HEIGHT, DEC, CODECS_ALL, 96, 7680, 1, 1080}, + + {FRAME_HEIGHT, DEC, VP9, 96, 4096, 1, 1080}, + + {FRAME_HEIGHT, ENC, CODECS_ALL, 128, 4096, 1, 1080}, + + {FRAME_HEIGHT, ENC, HEVC, 96, 4096, 1, 1080}, + + {FRAME_HEIGHT, ENC, HEIC, 128, 16384, 1, 16384}, + + {LOSSLESS_FRAME_HEIGHT, ENC, CODECS_ALL, 128, 4096, 1, 1080}, + + {LOSSLESS_FRAME_HEIGHT, ENC, HEVC, 96, 4096, 1, 1080}, + + {SECURE_FRAME_HEIGHT, DEC, CODECS_ALL, 96, 4096, 1, 1080}, + + {SECURE_FRAME_HEIGHT, ENC, CODECS_ALL, 128, 4096, 1, 1080}, + + {SECURE_FRAME_HEIGHT, ENC, HEVC, 96, 4096, 1, 1080}, + + {PIX_FMTS, ENC | DEC, H264, + MSM_VIDC_FMT_NV12, + MSM_VIDC_FMT_NV12C, + MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C, + MSM_VIDC_FMT_NV12C}, + + {PIX_FMTS, ENC | DEC, HEVC | VP9, + MSM_VIDC_FMT_NV12, + MSM_VIDC_FMT_TP10C, + MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C | + MSM_VIDC_FMT_P010 | MSM_VIDC_FMT_TP10C, + MSM_VIDC_FMT_NV12C}, + + {PIX_FMTS, ENC, HEIC, + MSM_VIDC_FMT_NV12, + MSM_VIDC_FMT_P010, + MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_P010, + MSM_VIDC_FMT_NV12}, + + {PIX_FMTS, DEC, HEIC, + MSM_VIDC_FMT_NV12, + MSM_VIDC_FMT_TP10C, + MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C | + MSM_VIDC_FMT_P010 | MSM_VIDC_FMT_TP10C, + MSM_VIDC_FMT_NV12C}, + + {MIN_BUFFERS_INPUT, ENC | DEC, CODECS_ALL, 0, 64, 1, 4, + V4L2_CID_MIN_BUFFERS_FOR_OUTPUT, + 0, + CAP_FLAG_VOLATILE}, + + {MIN_BUFFERS_INPUT, ENC | DEC, HEIC, 0, 64, 1, 1, + V4L2_CID_MIN_BUFFERS_FOR_OUTPUT, + 0, + CAP_FLAG_VOLATILE}, + + {MIN_BUFFERS_OUTPUT, ENC | DEC, CODECS_ALL, + 0, 64, 1, 4, + V4L2_CID_MIN_BUFFERS_FOR_CAPTURE, + HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_VOLATILE}, + + /* (4096 * 2176) / 256 */ + {MBPF, ENC, CODECS_ALL, 64, 34816, 1, 34816}, + + {MBPF, ENC, HEVC, 36, 34816, 1, 34816}, + + /* ((16384x16384)/256) */ + {MBPF, ENC, HEIC, 36, 1048576, 1, 1048576}, + + /* (4 * ((4096 * 2176)/256) */ + {MBPF, DEC, CODECS_ALL, 36, 139264, 1, 139264}, + + /* (4096 * 2176) / 256 */ + {MBPF, DEC, VP9, 36, 34816, 1, 34816}, + + /* ((8192x8192)/256) */ + {MBPF, DEC, HEIC, 64, 262144, 1, 262144 }, + + /* (4096 * 2176) / 256 */ + {LOSSLESS_MBPF, ENC, H264 | HEVC, 64, 34816, 1, 34816}, + + /* Batch Mode Decode */ + /* BATCH_MBPF + 2 is done for chipsets other than lanai + * due to timeline constraints since msm_vidc_allow_decode_batch + * has checks to allow batching for less than BATCH_MBPF. + * Same applies for BATCH_FPS. + */ + {BATCH_MBPF, DEC, H264 | HEVC | VP9 | AV1, 64, 8162, 1, 8162}, + + /* (1920 * 1088) / 256 */ + {BATCH_FPS, DEC, H264 | HEVC | VP9 | AV1, 1, 61, 1, 61}, + + {SECURE_MBPF, ENC | DEC, H264 | HEVC | VP9 | AV1, 64, 36864, 1, 36864}, + + {SECURE_MBPF, ENC, HEVC, 36, 36864, 1, 36864}, + + {FRAME_RATE, ENC, CODECS_ALL, + (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), + 1, (DEFAULT_FPS << 16), + 0, + HFI_PROP_FRAME_RATE, + CAP_FLAG_OUTPUT_PORT}, + + {FRAME_RATE, ENC, HEIC, + (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), + 1, (MINIMUM_FPS << 16), + 0, + HFI_PROP_FRAME_RATE, + CAP_FLAG_OUTPUT_PORT}, + + {FRAME_RATE, DEC, CODECS_ALL, + (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), + 1, (DEFAULT_FPS << 16), + V4L2_CID_MPEG_VIDC_FRAME_RATE, + 0, + CAP_FLAG_OUTPUT_PORT | + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {FRAME_RATE, DEC, VP9, + (MINIMUM_FPS << 16), (MAXIMUM_OVERRIDE_VP9_FPS << 16), + 1, (DEFAULT_FPS << 16), + V4L2_CID_MPEG_VIDC_FRAME_RATE, + 0, + CAP_FLAG_OUTPUT_PORT | + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {OPERATING_RATE, ENC, CODECS_ALL, + (MINIMUM_FPS << 16), INT_MAX, + 1, (DEFAULT_FPS << 16)}, + + {OPERATING_RATE, DEC, CODECS_ALL, + (MINIMUM_FPS << 16), INT_MAX, + 1, (DEFAULT_FPS << 16), + V4L2_CID_MPEG_VIDC_OPERATING_RATE, + 0, + CAP_FLAG_OUTPUT_PORT | + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {INPUT_RATE, ENC | DEC, CODECS_ALL, + (MINIMUM_FPS << 16), INT_MAX, + 1, (DEFAULT_FPS << 16)}, + + {TIMESTAMP_RATE, ENC | DEC, CODECS_ALL, + (MINIMUM_FPS << 16), INT_MAX, + 1, (DEFAULT_FPS << 16)}, + + {SCALE_FACTOR, ENC, H264 | HEVC, 1, 8, 1, 8}, + + {MB_CYCLES_VSP, ENC, CODECS_ALL, 25, 25, 1, 25}, + + {MB_CYCLES_VSP, DEC, CODECS_ALL, 25, 25, 1, 25}, + + {MB_CYCLES_VSP, DEC, VP9 | AV1, 60, 60, 1, 60}, + + {MB_CYCLES_VPP, ENC, CODECS_ALL, 675, 675, 1, 675}, + + {MB_CYCLES_VPP, DEC, CODECS_ALL, 200, 200, 1, 200}, + + {MB_CYCLES_LP, ENC, CODECS_ALL, 320, 320, 1, 320}, + + {MB_CYCLES_LP, DEC, CODECS_ALL, 200, 200, 1, 200}, + + {MB_CYCLES_FW, ENC | DEC, CODECS_ALL, 489583, 489583, 1, 489583}, + + {MB_CYCLES_FW_VPP, ENC, CODECS_ALL, 48405, 48405, 1, 48405}, + + {MB_CYCLES_FW_VPP, DEC, CODECS_ALL, 66234, 66234, 1, 66234}, + + {ENC_RING_BUFFER_COUNT, ENC, CODECS_ALL, + 0, 0, 1, 0}, + + {CLIENT_ID, ENC | DEC, CODECS_ALL, + INVALID_CLIENT_ID, INT_MAX, 1, INVALID_CLIENT_ID, + V4L2_CID_MPEG_VIDC_CLIENT_ID}, + + {SECURE_MODE, ENC | DEC, H264 | HEVC | VP9 | AV1, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_SECURE, + HFI_PROP_SECURE, + CAP_FLAG_NONE}, + + /* + * Client will enable V4L2_CID_MPEG_VIDC_METADATA_OUTBUF_FENCE + * to get fence_id in input metadata buffer done. + */ + {META_OUTBUF_FENCE, DEC, H264 | HEVC | VP9 | AV1, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_INPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_OUTBUF_FENCE, + HFI_PROP_FENCE, + CAP_FLAG_BITMASK | CAP_FLAG_META | CAP_FLAG_DYNAMIC_ALLOWED}, + + /* + * Client to do set_ctrl with FENCE_ID to set fence_id + * and then client will do get_ctrl with FENCE_FD to get + * fence_fd corresponding to client set fence_id. + */ + {FENCE_ID, DEC, CODECS_ALL, + 0, INT_MAX, 1, 0, + V4L2_CID_MPEG_VIDC_SW_FENCE_ID, + 0, + CAP_FLAG_DYNAMIC_ALLOWED | CAP_FLAG_OUTPUT_PORT}, + + {FENCE_FD, DEC, CODECS_ALL, + INVALID_FD, INT_MAX, 1, INVALID_FD, + V4L2_CID_MPEG_VIDC_SW_FENCE_FD, + 0, + CAP_FLAG_VOLATILE}, + + /* Fence type for input buffer. Currently unused */ + {INBUF_FENCE_TYPE, DEC, H264 | HEVC | VP9 | AV1, + MSM_VIDC_FENCE_NONE, MSM_VIDC_FENCE_NONE, + BIT(MSM_VIDC_FENCE_NONE), + MSM_VIDC_FENCE_NONE, + 0, + HFI_PROP_FENCE_TYPE, + CAP_FLAG_MENU | CAP_FLAG_INPUT_PORT}, + + {OUTBUF_FENCE_TYPE, DEC, H264 | HEVC | VP9 | AV1, + MSM_VIDC_FENCE_NONE, MSM_VIDC_SYNX_V2_FENCE, + BIT(MSM_VIDC_FENCE_NONE) | BIT(MSM_VIDC_SW_FENCE) | + BIT(MSM_VIDC_SYNX_V2_FENCE), + MSM_VIDC_FENCE_NONE, + 0, + HFI_PROP_FENCE_TYPE, + CAP_FLAG_MENU | CAP_FLAG_OUTPUT_PORT}, + + /* Fence direction for input buffer. Currently unused */ + {INBUF_FENCE_DIRECTION, DEC, H264 | HEVC | VP9 | AV1, + MSM_VIDC_FENCE_DIR_NONE, MSM_VIDC_FENCE_DIR_NONE, + BIT(MSM_VIDC_FENCE_DIR_NONE), + MSM_VIDC_FENCE_DIR_NONE, + 0, + HFI_PROP_FENCE_DIRECTION, + CAP_FLAG_MENU | CAP_FLAG_INPUT_PORT}, + + {OUTBUF_FENCE_DIRECTION, DEC, H264 | HEVC | VP9 | AV1, + MSM_VIDC_FENCE_DIR_NONE, MSM_VIDC_FENCE_DIR_RX, + BIT(MSM_VIDC_FENCE_DIR_NONE) | BIT(MSM_VIDC_FENCE_DIR_TX) | + BIT(MSM_VIDC_FENCE_DIR_RX), + MSM_VIDC_FENCE_DIR_NONE, + 0, + HFI_PROP_FENCE_DIRECTION, + CAP_FLAG_MENU | CAP_FLAG_OUTPUT_PORT}, + + {FENCE_ERROR_DATA_CORRUPT, DEC, H264 | HEVC | VP9 | AV1, + 0, 1, 1, 0, + 0, + HFI_PROP_FENCE_ERROR_DATA_CORRUPT}, + + {TS_REORDER, DEC, H264 | HEVC, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_TS_REORDER}, + + {HFLIP, ENC, CODECS_ALL, + 0, 1, 1, 0, + V4L2_CID_HFLIP, + HFI_PROP_FLIP, + CAP_FLAG_OUTPUT_PORT | + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {VFLIP, ENC, CODECS_ALL, + 0, 1, 1, 0, + V4L2_CID_VFLIP, + HFI_PROP_FLIP, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {ROTATION, ENC, CODECS_ALL, + 0, 270, 90, 0, + V4L2_CID_ROTATE, + HFI_PROP_ROTATION, + CAP_FLAG_OUTPUT_PORT}, + + {SUPER_FRAME, ENC, H264 | HEVC, + 0, 32, 1, 0, + V4L2_CID_MPEG_VIDC_SUPERFRAME, 0, + CAP_FLAG_DYNAMIC_ALLOWED}, + + {SLICE_DECODE, DEC, H264 | HEVC | AV1, + V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_MSM_VIDC_DISABLE, + 0, + V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDEO_DECODER_SLICE_INTERFACE, + 0}, + + {HEADER_MODE, ENC, CODECS_ALL, + V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE, + V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME, + BIT(V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE) | + BIT(V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME), + V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE, + V4L2_CID_MPEG_VIDEO_HEADER_MODE, + HFI_PROP_SEQ_HEADER_MODE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {PREPEND_SPSPPS_TO_IDR, ENC, CODECS_ALL, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDEO_PREPEND_SPSPPS_TO_IDR}, + + {VUI_TIMING_INFO, ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_VUI_TIMING_INFO, + HFI_PROP_DISABLE_VUI_TIMING_INFO, + CAP_FLAG_OUTPUT_PORT}, + + {WITHOUT_STARTCODE, ENC, CODECS_ALL, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE, + HFI_PROP_NAL_LENGTH_FIELD, + CAP_FLAG_OUTPUT_PORT}, + + {WITHOUT_STARTCODE, DEC, AV1, + 0, 0, 1, 0, + V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE, + HFI_PROP_NAL_LENGTH_FIELD, + CAP_FLAG_INPUT_PORT}, + + {NAL_LENGTH_FIELD, ENC, CODECS_ALL, + V4L2_MPEG_VIDEO_HEVC_SIZE_0, + V4L2_MPEG_VIDEO_HEVC_SIZE_4, + BIT(V4L2_MPEG_VIDEO_HEVC_SIZE_0) | + BIT(V4L2_MPEG_VIDEO_HEVC_SIZE_4), + V4L2_MPEG_VIDEO_HEVC_SIZE_0, + V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD, + HFI_PROP_NAL_LENGTH_FIELD, + CAP_FLAG_MENU | CAP_FLAG_OUTPUT_PORT}, + + /* TODO: Firmware introduced enumeration type for this + * with and without seq header. + */ + {REQUEST_I_FRAME, ENC, H264 | HEVC, + 0, 0, 0, 0, + V4L2_CID_MPEG_VIDEO_FORCE_KEY_FRAME, + HFI_PROP_REQUEST_SYNC_FRAME, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + /* Enc: Keeping CABAC and CAVLC as same bitrate. + * Dec: there's no use of Bitrate cap + */ + {BIT_RATE, ENC, H264 | HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_BITRATE, + HFI_PROP_TOTAL_BITRATE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {BITRATE_MODE, ENC, H264, + V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, + V4L2_MPEG_VIDEO_BITRATE_MODE_CBR, + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_VBR) | + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CBR), + V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, + V4L2_CID_MPEG_VIDEO_BITRATE_MODE, + HFI_PROP_RATE_CONTROL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {BITRATE_MODE, ENC, HEVC, + V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, + V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_VBR) | + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CBR) | + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CQ), + V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, + V4L2_CID_MPEG_VIDEO_BITRATE_MODE, + HFI_PROP_RATE_CONTROL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {BITRATE_MODE, ENC, HEIC, + V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, + V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CQ), + V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, + V4L2_CID_MPEG_VIDEO_BITRATE_MODE, + HFI_PROP_RATE_CONTROL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {CABAC_MAX_BITRATE, ENC, H264 | HEVC, 0, + 160000000, 1, 160000000}, + + {CAVLC_MAX_BITRATE, ENC, H264, 0, + 160000000, 1, 160000000}, + + {ALLINTRA_MAX_BITRATE, ENC, H264 | HEVC, 0, + 160000000, 1, 160000000}, + + {LOWLATENCY_MAX_BITRATE, ENC, H264 | HEVC, 0, + 70000000, 1, 70000000}, + + {NUM_COMV, DEC, CODECS_ALL, + 0, INT_MAX, 1, 0}, + + {LOSSLESS, ENC, HEVC, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU}, + + {FRAME_SKIP_MODE, ENC, H264 | HEVC | HEIC, + V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED, + V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT, + BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED) | + BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_LEVEL_LIMIT) | + BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT), + V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED, + V4L2_CID_MPEG_VIDEO_FRAME_SKIP_MODE, + 0, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {FRAME_RC_ENABLE, ENC, H264 | HEVC | HEIC, + 0, 1, 1, 1, + V4L2_CID_MPEG_VIDEO_FRAME_RC_ENABLE}, + + {CONSTANT_QUALITY, ENC, HEVC, + 1, MAX_CONSTANT_QUALITY, 1, 90, + V4L2_CID_MPEG_VIDEO_CONSTANT_QUALITY, + HFI_PROP_CONSTANT_QUALITY, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {CONSTANT_QUALITY, ENC, HEIC, + 1, MAX_CONSTANT_QUALITY, 1, 100, + V4L2_CID_MPEG_VIDEO_CONSTANT_QUALITY, + HFI_PROP_CONSTANT_QUALITY, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {GOP_SIZE, ENC, CODECS_ALL, + 0, INT_MAX, 1, 2 * DEFAULT_FPS - 1, + V4L2_CID_MPEG_VIDEO_GOP_SIZE, + HFI_PROP_MAX_GOP_FRAMES, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {GOP_SIZE, ENC, HEIC, + 0, INT_MAX, 1, 0 /* all intra */, + V4L2_CID_MPEG_VIDEO_GOP_SIZE, + HFI_PROP_MAX_GOP_FRAMES, + CAP_FLAG_OUTPUT_PORT | + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {GOP_CLOSURE, ENC, H264 | HEVC, + 0, 1, 1, 1, + V4L2_CID_MPEG_VIDEO_GOP_CLOSURE, + 0}, + + {B_FRAME, ENC, H264 | HEVC, + 0, 7, 1, 0, + V4L2_CID_MPEG_VIDEO_B_FRAMES, + HFI_PROP_MAX_B_FRAMES, + CAP_FLAG_OUTPUT_PORT}, + + {B_FRAME, ENC, HEIC, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDEO_B_FRAMES, + HFI_PROP_MAX_B_FRAMES, + CAP_FLAG_OUTPUT_PORT}, + + {BLUR_TYPES, ENC, H264 | HEVC, + MSM_VIDC_BLUR_NONE, MSM_VIDC_BLUR_EXTERNAL, + BIT(MSM_VIDC_BLUR_NONE) | BIT(MSM_VIDC_BLUR_EXTERNAL), + MSM_VIDC_BLUR_NONE, + V4L2_CID_MPEG_VIDC_VIDEO_BLUR_TYPES, + HFI_PROP_BLUR_TYPES, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {BLUR_RESOLUTION, ENC, H264 | HEVC, + 0, S32_MAX, 1, 0, + V4L2_CID_MPEG_VIDC_VIDEO_BLUR_RESOLUTION, + HFI_PROP_BLUR_RESOLUTION, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {CSC, ENC, CODECS_ALL, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_CSC, + HFI_PROP_CSC, + CAP_FLAG_OUTPUT_PORT}, + + {CSC_CUSTOM_MATRIX, ENC, CODECS_ALL, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_VIDEO_VPE_CSC_CUSTOM_MATRIX, + HFI_PROP_CSC_MATRIX, + CAP_FLAG_OUTPUT_PORT}, + + {LOWLATENCY_MODE, ENC, H264 | HEVC, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_LOWLATENCY_REQUEST, + 0, + CAP_FLAG_NONE}, + + {LOWLATENCY_MODE, DEC, H264 | HEVC | VP9 | AV1, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_LOWLATENCY_REQUEST, + HFI_PROP_SEQ_CHANGE_AT_SYNC_FRAME, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {LTR_COUNT, ENC, H264 | HEVC, + 0, MAX_LTR_FRAME_COUNT_5, 1, 0, + V4L2_CID_MPEG_VIDEO_LTR_COUNT, + HFI_PROP_LTR_COUNT, + CAP_FLAG_OUTPUT_PORT}, + + {USE_LTR, ENC, H264 | HEVC, + 0, + ((1 << MAX_LTR_FRAME_COUNT_5) - 1), + 0, 0, + V4L2_CID_MPEG_VIDEO_USE_LTR_FRAMES, + HFI_PROP_LTR_USE, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {MARK_LTR, ENC, H264 | HEVC, + INVALID_DEFAULT_MARK_OR_USE_LTR, + (MAX_LTR_FRAME_COUNT_5 - 1), + 1, INVALID_DEFAULT_MARK_OR_USE_LTR, + V4L2_CID_MPEG_VIDEO_FRAME_LTR_INDEX, + HFI_PROP_LTR_MARK, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {BASELAYER_PRIORITY, ENC, H264, + 0, MAX_BASE_LAYER_PRIORITY_ID, 1, 0, + V4L2_CID_MPEG_VIDEO_BASELAYER_PRIORITY_ID, + HFI_PROP_BASELAYER_PRIORITYID, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {IR_TYPE, ENC, H264 | HEVC, + V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_RANDOM, + V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_CYCLIC, + BIT(V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_RANDOM) | + BIT(V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_CYCLIC), + V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_RANDOM, + V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE, + 0, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {IR_PERIOD, ENC, H264 | HEVC, + 0, INT_MAX, 1, 0, + V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD, + 0, + CAP_FLAG_INPUT_PORT | CAP_FLAG_OUTPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {AU_DELIMITER, ENC, H264 | HEVC, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDEO_AU_DELIMITER, + HFI_PROP_AUD, + CAP_FLAG_OUTPUT_PORT}, + + {TIME_DELTA_BASED_RC, ENC, H264 | HEVC, + 0, 1, 1, 1, + V4L2_CID_MPEG_VIDC_TIME_DELTA_BASED_RC, + HFI_PROP_TIME_DELTA_BASED_RATE_CONTROL, + CAP_FLAG_OUTPUT_PORT}, + + {TIME_DELTA_BASED_RC, ENC, HEIC, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_TIME_DELTA_BASED_RC, + HFI_PROP_TIME_DELTA_BASED_RATE_CONTROL, + CAP_FLAG_OUTPUT_PORT}, + + {CONTENT_ADAPTIVE_CODING, ENC, H264 | HEVC, + 0, 1, 1, 1, + V4L2_CID_MPEG_VIDC_CONTENT_ADAPTIVE_CODING, + HFI_PROP_CONTENT_ADAPTIVE_CODING, + CAP_FLAG_OUTPUT_PORT}, + + {REQUEST_PREPROCESS, ENC, H264 | HEVC, + MSM_VIDC_PREPROCESS_NONE, + MSM_VIDC_PREPROCESS_TYPE0, + BIT(MSM_VIDC_PREPROCESS_NONE) | + BIT(MSM_VIDC_PREPROCESS_TYPE0), + MSM_VIDC_PREPROCESS_NONE, + 0, HFI_PROP_REQUEST_PREPROCESS, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {BITRATE_BOOST, ENC, H264 | HEVC, + 0, MAX_BITRATE_BOOST, 25, MAX_BITRATE_BOOST, + V4L2_CID_MPEG_VIDC_QUALITY_BITRATE_BOOST, + HFI_PROP_BITRATE_BOOST, + CAP_FLAG_OUTPUT_PORT}, + + {MIN_QUALITY, ENC, H264 | HEVC, + 0, MAX_SUPPORTED_MIN_QUALITY, 70, MAX_SUPPORTED_MIN_QUALITY, + 0, + HFI_PROP_MAINTAIN_MIN_QUALITY, + CAP_FLAG_OUTPUT_PORT}, + + {VBV_DELAY, ENC, H264 | HEVC, + 200, 300, 100, 300, + V4L2_CID_MPEG_VIDEO_VBV_DELAY, + HFI_PROP_VBV_DELAY, + CAP_FLAG_OUTPUT_PORT}, + + {PEAK_BITRATE, ENC, H264 | HEVC, + /* default peak bitrate is 10% larger than avg bitrate */ + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_BITRATE_PEAK, + HFI_PROP_TOTAL_PEAK_BITRATE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {MIN_FRAME_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, + V4L2_CID_MPEG_VIDEO_H264_MIN_QP, + HFI_PROP_MIN_QP_PACKED, + CAP_FLAG_OUTPUT_PORT}, + + {MIN_FRAME_QP, ENC, HEVC | HEIC, + MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, + V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP, + HFI_PROP_MIN_QP_PACKED, + CAP_FLAG_OUTPUT_PORT}, + + {I_FRAME_MIN_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, + V4L2_CID_MPEG_VIDEO_H264_I_FRAME_MIN_QP}, + + {I_FRAME_MIN_QP, ENC, HEVC | HEIC, + MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, + V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_MIN_QP}, + + {P_FRAME_MIN_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, + V4L2_CID_MPEG_VIDEO_H264_P_FRAME_MIN_QP}, + + {P_FRAME_MIN_QP, ENC, HEVC | HEIC, + MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, + V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_MIN_QP}, + + {B_FRAME_MIN_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, + V4L2_CID_MPEG_VIDEO_H264_B_FRAME_MIN_QP}, + + {B_FRAME_MIN_QP, ENC, HEVC | HEIC, + MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, + V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_MIN_QP}, + + {MAX_FRAME_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_H264_MAX_QP, + HFI_PROP_MAX_QP_PACKED, + CAP_FLAG_OUTPUT_PORT}, + + {MAX_FRAME_QP, ENC, HEVC | HEIC, + MIN_QP_10BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP, + HFI_PROP_MAX_QP_PACKED, + CAP_FLAG_OUTPUT_PORT}, + + {I_FRAME_MAX_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_H264_I_FRAME_MAX_QP}, + + {I_FRAME_MAX_QP, ENC, HEVC | HEIC, + MIN_QP_10BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_MAX_QP}, + + {P_FRAME_MAX_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_H264_P_FRAME_MAX_QP}, + + {P_FRAME_MAX_QP, ENC, HEVC | HEIC, + MIN_QP_10BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_MAX_QP}, + + {B_FRAME_MAX_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_H264_B_FRAME_MAX_QP}, + + {B_FRAME_MAX_QP, ENC, HEVC | HEIC, + MIN_QP_10BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_MAX_QP}, + + {I_FRAME_QP, ENC, HEVC, + MIN_QP_10BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {I_FRAME_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {P_FRAME_QP, ENC, HEVC, + MIN_QP_10BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {P_FRAME_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {B_FRAME_QP, ENC, HEVC, + MIN_QP_10BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {B_FRAME_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_H264_B_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {LAYER_TYPE, ENC, HEVC, + V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B, + V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P, + BIT(V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B) | + BIT(V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P), + V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE, + HFI_PROP_LAYER_ENCODING_TYPE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LAYER_TYPE, ENC, H264, + V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_B, + V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P, + BIT(V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_B) | + BIT(V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P), + V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P, + V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_TYPE, + HFI_PROP_LAYER_ENCODING_TYPE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LAYER_ENABLE, ENC, H264, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING, + HFI_PROP_LAYER_ENCODING_TYPE, + CAP_FLAG_OUTPUT_PORT}, + + {LAYER_ENABLE, ENC, HEVC, + 0, 1, 1, 0, + 0, + 0, + CAP_FLAG_OUTPUT_PORT}, + + {ENH_LAYER_COUNT, ENC, HEVC, + 0, 5, 1, 0, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER, + HFI_PROP_LAYER_COUNT, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {ENH_LAYER_COUNT, ENC, H264, + 0, 5, 1, 0, + V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_LAYER, + HFI_PROP_LAYER_COUNT, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {ENH_LAYER_COUNT, DEC, AV1, + 0, MAX_OP_POINT, 1, 0, + 0, + HFI_PROP_AV1_OP_POINT, + CAP_FLAG_INPUT_PORT}, + + {L0_BR, ENC, H264, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L0_BR, + HFI_PROP_BITRATE_LAYER1, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L0_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L0_BR, + HFI_PROP_BITRATE_LAYER1, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L1_BR, ENC, H264, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L1_BR, + HFI_PROP_BITRATE_LAYER2, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L1_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L1_BR, + HFI_PROP_BITRATE_LAYER2, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L2_BR, ENC, H264, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L2_BR, + HFI_PROP_BITRATE_LAYER3, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L2_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L2_BR, + HFI_PROP_BITRATE_LAYER3, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L3_BR, ENC, H264, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L3_BR, + HFI_PROP_BITRATE_LAYER4, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + {L3_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L3_BR, + HFI_PROP_BITRATE_LAYER4, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L4_BR, ENC, H264, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L4_BR, + HFI_PROP_BITRATE_LAYER5, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L4_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L4_BR, + HFI_PROP_BITRATE_LAYER5, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L5_BR, ENC, H264, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L5_BR, + HFI_PROP_BITRATE_LAYER6, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L5_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L5_BR, + HFI_PROP_BITRATE_LAYER6, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {ENTROPY_MODE, ENC, H264, + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC, + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, + BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC) | + BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC), + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, + V4L2_CID_MPEG_VIDEO_H264_ENTROPY_MODE, + HFI_PROP_CABAC_SESSION, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {ENTROPY_MODE, DEC, H264 | HEVC | VP9 | AV1, + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC, + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, + BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC) | + BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC), + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, + 0, + HFI_PROP_CABAC_SESSION}, + + {PROFILE, ENC | DEC, H264, + V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE, + V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH, + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_BASELINE) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_MAIN) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_HIGH), + V4L2_MPEG_VIDEO_H264_PROFILE_HIGH, + V4L2_CID_MPEG_VIDEO_H264_PROFILE, + HFI_PROP_PROFILE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {PROFILE, ENC | DEC, HEVC | HEIC, + V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN, + V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE, + BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN) | + BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE) | + BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10) | + BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE), + V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN, + V4L2_CID_MPEG_VIDEO_HEVC_PROFILE, + HFI_PROP_PROFILE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {PROFILE, DEC, VP9, + V4L2_MPEG_VIDEO_VP9_PROFILE_0, + V4L2_MPEG_VIDEO_VP9_PROFILE_2, + BIT(V4L2_MPEG_VIDEO_VP9_PROFILE_0) | + BIT(V4L2_MPEG_VIDEO_VP9_PROFILE_2), + V4L2_MPEG_VIDEO_VP9_PROFILE_0, + V4L2_CID_MPEG_VIDEO_VP9_PROFILE, + HFI_PROP_PROFILE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {PROFILE, DEC, AV1, + V4L2_MPEG_VIDC_AV1_PROFILE_MAIN, + V4L2_MPEG_VIDC_AV1_PROFILE_MAIN, + BIT(V4L2_MPEG_VIDC_AV1_PROFILE_MAIN), + V4L2_MPEG_VIDC_AV1_PROFILE_MAIN, + V4L2_CID_MPEG_VIDC_AV1_PROFILE, + HFI_PROP_PROFILE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LEVEL, ENC, H264, + V4L2_MPEG_VIDEO_H264_LEVEL_1_0, + V4L2_MPEG_VIDEO_H264_LEVEL_5_2, + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1B) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_3) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_2), + V4L2_MPEG_VIDEO_H264_LEVEL_5_2, + V4L2_CID_MPEG_VIDEO_H264_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LEVEL, ENC, HEVC | HEIC, + V4L2_MPEG_VIDEO_HEVC_LEVEL_1, + V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1, + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1), + V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1, + V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LEVEL, DEC, H264, + V4L2_MPEG_VIDEO_H264_LEVEL_1_0, + V4L2_MPEG_VIDEO_H264_LEVEL_6_0, + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1B) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_3) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_0), + V4L2_MPEG_VIDEO_H264_LEVEL_6_0, + V4L2_CID_MPEG_VIDEO_H264_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LEVEL, DEC, HEVC | HEIC, + V4L2_MPEG_VIDEO_HEVC_LEVEL_1, + V4L2_MPEG_VIDEO_HEVC_LEVEL_6, + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6), + V4L2_MPEG_VIDEO_HEVC_LEVEL_6, + V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LEVEL, DEC, VP9, + V4L2_MPEG_VIDEO_VP9_LEVEL_1_0, + V4L2_MPEG_VIDEO_VP9_LEVEL_5_2, + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_1_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_1_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_2_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_3_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_4_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_2), + V4L2_MPEG_VIDEO_VP9_LEVEL_5_2, + V4L2_CID_MPEG_VIDEO_VP9_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LEVEL, DEC, AV1, + V4L2_MPEG_VIDC_AV1_LEVEL_2_0, + V4L2_MPEG_VIDC_AV1_LEVEL_6_0, + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_2_0) | + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_2_2) | + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_2_3) | + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_3_0) | + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_3_2) | + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_3_3) | + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_4_0) | + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_4_2) | + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_4_3) | + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_5_0) | + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_5_1) | + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_5_2) | + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_5_3) | + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_6_0), + V4L2_MPEG_VIDC_AV1_LEVEL_6_0, + V4L2_CID_MPEG_VIDC_AV1_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {AV1_TIER, DEC, AV1, + V4L2_MPEG_VIDC_AV1_TIER_MAIN, + V4L2_MPEG_VIDC_AV1_TIER_HIGH, + BIT(V4L2_MPEG_VIDC_AV1_TIER_MAIN) | + BIT(V4L2_MPEG_VIDC_AV1_TIER_HIGH), + V4L2_MPEG_VIDC_AV1_TIER_HIGH, + V4L2_CID_MPEG_VIDC_AV1_TIER, + HFI_PROP_TIER, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {HEVC_TIER, ENC | DEC, HEVC, + V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, + V4L2_MPEG_VIDEO_HEVC_TIER_HIGH, + BIT(V4L2_MPEG_VIDEO_HEVC_TIER_MAIN) | + BIT(V4L2_MPEG_VIDEO_HEVC_TIER_HIGH), + V4L2_MPEG_VIDEO_HEVC_TIER_HIGH, + V4L2_CID_MPEG_VIDEO_HEVC_TIER, + HFI_PROP_TIER, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {HEVC_TIER, ENC | DEC, HEIC, + V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, + V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, + BIT(V4L2_MPEG_VIDEO_HEVC_TIER_MAIN), + V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, + V4L2_CID_MPEG_VIDEO_HEVC_TIER, + HFI_PROP_TIER, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LF_MODE, ENC, H264, + V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED, + DB_H264_DISABLE_SLICE_BOUNDARY, + BIT(V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED) | + BIT(V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_DISABLED) | + BIT(DB_H264_DISABLE_SLICE_BOUNDARY), + V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED, + V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_MODE, + HFI_PROP_DEBLOCKING_MODE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LF_MODE, ENC, HEVC | HEIC, + V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_DISABLED, + DB_HEVC_DISABLE_SLICE_BOUNDARY, + BIT(V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_DISABLED) | + BIT(V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_ENABLED) | + BIT(DB_HEVC_DISABLE_SLICE_BOUNDARY), + V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_ENABLED, + V4L2_CID_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE, + HFI_PROP_DEBLOCKING_MODE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LF_ALPHA, ENC, H264, + -6, 6, 1, 0, + V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_ALPHA}, + + {LF_ALPHA, ENC, HEVC | HEIC, + -6, 6, 1, 0, + V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2}, + + {LF_BETA, ENC, H264, + -6, 6, 1, 0, + V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_BETA}, + + {LF_BETA, ENC, HEVC | HEIC, + -6, 6, 1, 0, + V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2}, + + {SLICE_MODE, ENC, H264 | HEVC, + V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, + V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_BYTES, + BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE) | + BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_MB) | + BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_BYTES), + V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, + V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE, + 0, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {SLICE_MODE, ENC, HEIC, + V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, + V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, + BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE), + V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, + V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE, + 0, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {SLICE_MAX_BYTES, ENC, H264 | HEVC, + MIN_SLICE_BYTE_SIZE, MAX_SLICE_BYTE_SIZE, + 1, MIN_SLICE_BYTE_SIZE, + V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES, + HFI_PROP_MULTI_SLICE_BYTES_COUNT, + CAP_FLAG_OUTPUT_PORT}, + + {SLICE_MAX_MB, ENC, H264 | HEVC, + 1, MAX_SLICE_MB_SIZE, 1, 1, + V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB, + HFI_PROP_MULTI_SLICE_MB_COUNT, + CAP_FLAG_OUTPUT_PORT}, + + {MB_RC, ENC, H264 | HEVC, + 0, 1, 1, 1, + V4L2_CID_MPEG_VIDEO_MB_RC_ENABLE, + 0, + CAP_FLAG_OUTPUT_PORT}, + + {TRANSFORM_8X8, ENC, H264, + 0, 1, 1, 1, + V4L2_CID_MPEG_VIDEO_H264_8X8_TRANSFORM, + HFI_PROP_8X8_TRANSFORM, + CAP_FLAG_OUTPUT_PORT}, + + {CHROMA_QP_INDEX_OFFSET, ENC, HEVC, + MIN_CHROMA_QP_OFFSET, MAX_CHROMA_QP_OFFSET, + 1, MAX_CHROMA_QP_OFFSET, + V4L2_CID_MPEG_VIDEO_H264_CHROMA_QP_INDEX_OFFSET, + HFI_PROP_CHROMA_QP_OFFSET, + CAP_FLAG_OUTPUT_PORT}, + + {DISPLAY_DELAY_ENABLE, DEC, H264 | HEVC | VP9 | AV1, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY_ENABLE, + HFI_PROP_DECODE_ORDER_OUTPUT, + CAP_FLAG_INPUT_PORT}, + + {DISPLAY_DELAY, DEC, H264 | HEVC | VP9 | AV1, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY, + HFI_PROP_DECODE_ORDER_OUTPUT, + CAP_FLAG_INPUT_PORT}, + + {OUTPUT_ORDER, DEC, H264 | HEVC | VP9 | AV1, + 0, 1, 1, 0, + 0, + HFI_PROP_DECODE_ORDER_OUTPUT, + CAP_FLAG_INPUT_PORT}, + + {INPUT_BUF_HOST_MAX_COUNT, ENC | DEC, CODECS_ALL, + DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT, + 1, DEFAULT_MAX_HOST_BUF_COUNT, + 0, + HFI_PROP_BUFFER_HOST_MAX_COUNT, + CAP_FLAG_INPUT_PORT}, + + {OUTPUT_BUF_HOST_MAX_COUNT, ENC | DEC, CODECS_ALL, + DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT, + 1, DEFAULT_MAX_HOST_BUF_COUNT, + 0, + HFI_PROP_BUFFER_HOST_MAX_COUNT, + CAP_FLAG_OUTPUT_PORT}, + + {CONCEAL_COLOR_8BIT, DEC, CODECS_ALL, 0x0, 0xff3fcff, 1, + DEFAULT_VIDEO_CONCEAL_COLOR_BLACK, + V4L2_CID_MPEG_VIDEO_MUTE_YUV, + HFI_PROP_CONCEAL_COLOR_8BIT, + CAP_FLAG_INPUT_PORT}, + + {CONCEAL_COLOR_10BIT, DEC, CODECS_ALL, 0x0, 0x3fffffff, 1, + DEFAULT_VIDEO_CONCEAL_COLOR_BLACK, + V4L2_CID_MPEG_VIDEO_MUTE_YUV, + HFI_PROP_CONCEAL_COLOR_10BIT, + CAP_FLAG_INPUT_PORT}, + + {STAGE, DEC|ENC, CODECS_ALL, + MSM_VIDC_STAGE_1, + MSM_VIDC_STAGE_2, 1, + MSM_VIDC_STAGE_2, + 0, + HFI_PROP_STAGE}, + + {PIPE, DEC|ENC, CODECS_ALL, + MSM_VIDC_PIPE_1, + MSM_VIDC_PIPE_2, 1, + MSM_VIDC_PIPE_2, + 0, + HFI_PROP_PIPE}, + + {POC, DEC, H264, + 0, 2, 1, 1, + 0, + HFI_PROP_PIC_ORDER_CNT_TYPE, + CAP_FLAG_VOLATILE}, + + /* + * value of MAX_NUM_REORDER_FRAMES is 32 packed as mentioned below + * (max_num_reorder_count << 16) | max_dec_frame_buffering_count + */ + {MAX_NUM_REORDER_FRAMES, DEC, H264 | HEVC, + 0, INT_MAX, 1, 0, + V4L2_CID_MPEG_VIDC_MAX_NUM_REORDER_FRAMES, + HFI_PROP_MAX_NUM_REORDER_FRAMES, + CAP_FLAG_VOLATILE}, + + {QUALITY_MODE, ENC, CODECS_ALL, + MSM_VIDC_MAX_QUALITY_MODE, + MSM_VIDC_POWER_SAVE_MODE, 1, + MSM_VIDC_POWER_SAVE_MODE}, + + {CODED_FRAMES, DEC, H264 | HEVC | HEIC, + CODED_FRAMES_PROGRESSIVE, CODED_FRAMES_INTERLACE, + 1, CODED_FRAMES_PROGRESSIVE, + V4L2_CID_MPEG_VIDC_INTERLACE, + HFI_PROP_CODED_FRAMES, + CAP_FLAG_VOLATILE}, + + {BIT_DEPTH, DEC, CODECS_ALL, BIT_DEPTH_8, BIT_DEPTH_10, 1, BIT_DEPTH_8, + 0, + HFI_PROP_LUMA_CHROMA_BIT_DEPTH}, + + {CODEC_CONFIG, DEC, H264 | HEVC | HEIC | AV1, 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_CODEC_CONFIG, 0, + CAP_FLAG_DYNAMIC_ALLOWED}, + + {BITSTREAM_SIZE_OVERWRITE, DEC, CODECS_ALL, 0, INT_MAX, 1, 0, + V4L2_CID_MPEG_VIDC_MIN_BITSTREAM_SIZE_OVERWRITE}, + + {THUMBNAIL_MODE, DEC, CODECS_ALL, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_THUMBNAIL_MODE, + HFI_PROP_THUMBNAIL_MODE, + CAP_FLAG_INPUT_PORT}, + + {DEFAULT_HEADER, DEC, CODECS_ALL, + 0, 1, 1, 0, + 0, + HFI_PROP_DEC_DEFAULT_HEADER}, + + {RAP_FRAME, DEC, CODECS_ALL, + 0, 1, 1, 1, + 0, + HFI_PROP_DEC_START_FROM_RAP_FRAME, + CAP_FLAG_INPUT_PORT}, + + {SEQ_CHANGE_AT_SYNC_FRAME, DEC, CODECS_ALL, + 0, 1, 1, 1, + 0, + HFI_PROP_SEQ_CHANGE_AT_SYNC_FRAME, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {PRIORITY, DEC|ENC, CODECS_ALL, + 0, 4, 1, 4, + V4L2_CID_MPEG_VIDC_PRIORITY, + HFI_PROP_SESSION_PRIORITY, + CAP_FLAG_DYNAMIC_ALLOWED}, + + {FIRMWARE_PRIORITY_OFFSET, DEC | ENC, CODECS_ALL, + 1, 1, 1, 1}, + + {CRITICAL_PRIORITY, ENC, CODECS_ALL, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_CRITICAL_PRIORITY}, + + {RESERVE_DURATION, ENC, CODECS_ALL, + 0, INT_MAX, 1, 0, + V4L2_CID_MPEG_VIDC_RESERVE_DURATION, + HFI_CMD_RESERVE, + CAP_FLAG_DYNAMIC_ALLOWED}, + + {ENC_IP_CR, ENC, CODECS_ALL, + 0, S32_MAX, 1, 0, + V4L2_CID_MPEG_VIDC_ENC_INPUT_COMPRESSION_RATIO, + 0, CAP_FLAG_DYNAMIC_ALLOWED}, + + {FILM_GRAIN, DEC, AV1, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_AV1D_FILM_GRAIN_PRESENT, + HFI_PROP_AV1_FILM_GRAIN_PRESENT, + CAP_FLAG_VOLATILE}, + + {SUPER_BLOCK, DEC, AV1, + 0, 1, 1, 0, + 0, + HFI_PROP_AV1_SUPER_BLOCK_ENABLED}, + + {DRAP, DEC, AV1, + 0, S32_MAX, 1, 0, + 0, + HFI_PROP_AV1_DRAP_CONFIG, + CAP_FLAG_INPUT_PORT}, + + {LAST_FLAG_EVENT_ENABLE, DEC|ENC, CODECS_ALL, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_LAST_FLAG_EVENT_ENABLE}, + + {META_BITSTREAM_RESOLUTION, DEC, AV1, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_INPUT | + MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_BITSTREAM_RESOLUTION, + HFI_PROP_BITSTREAM_RESOLUTION, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_CROP_OFFSETS, DEC, AV1, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_INPUT | + MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_CROP_OFFSETS, + HFI_PROP_CROP_OFFSETS, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {ALL_INTRA, ENC, H264 | HEVC, + 0, 1, 1, 0, + 0, + 0, + CAP_FLAG_OUTPUT_PORT}, + + {META_LTR_MARK_USE, ENC, H264 | HEVC, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_LTR_MARK_USE_DETAILS, + HFI_PROP_LTR_MARK_USE_DETAILS, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_SEQ_HDR_NAL, ENC, CODECS_ALL, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_SEQ_HEADER_NAL, + HFI_PROP_METADATA_SEQ_HEADER_NAL, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_DPB_MISR, DEC, CODECS_ALL, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_DPB_LUMA_CHROMA_MISR, + HFI_PROP_DPB_LUMA_CHROMA_MISR, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_OPB_MISR, DEC, CODECS_ALL, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_OPB_LUMA_CHROMA_MISR, + HFI_PROP_OPB_LUMA_CHROMA_MISR, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_INTERLACE, DEC, H264, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_INTERLACE, + HFI_PROP_INTERLACE_INFO, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_TIMESTAMP, DEC | ENC, CODECS_ALL, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_TIMESTAMP, + HFI_PROP_TIMESTAMP, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_CONCEALED_MB_CNT, DEC, CODECS_ALL, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_CONCEALED_MB_COUNT, + HFI_PROP_CONEALED_MB_COUNT, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_HIST_INFO, DEC, HEVC | AV1 | VP9, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_HISTOGRAM_INFO, + HFI_PROP_HISTOGRAM_INFO, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_TRANSCODING_STAT_INFO, DEC, HEVC|H264, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_TRANSCODE_STAT_INFO, + HFI_PROP_TRANSCODING_STAT_INFO, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_TRANSCODING_STAT_INFO, ENC, HEVC|H264, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_DYN_ENABLE | MSM_VIDC_META_TX_INPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_TRANSCODE_STAT_INFO, + HFI_PROP_TRANSCODING_STAT_INFO, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_PICTURE_TYPE, DEC, CODECS_ALL, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_INPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_PICTURE_TYPE, + HFI_PROP_PICTURE_TYPE, + CAP_FLAG_BITMASK | CAP_FLAG_META | CAP_FLAG_DYNAMIC_ALLOWED}, + + {META_SEI_MASTERING_DISP, ENC, HEVC | HEIC, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | + MSM_VIDC_META_DYN_ENABLE | MSM_VIDC_META_TX_INPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_SEI_MASTERING_DISPLAY_COLOUR, + HFI_PROP_SEI_MASTERING_DISPLAY_COLOUR, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_SEI_MASTERING_DISP, DEC, HEVC | HEIC | AV1, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_INPUT | + MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_SEI_MASTERING_DISPLAY_COLOUR, + HFI_PROP_SEI_MASTERING_DISPLAY_COLOUR, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_SEI_CLL, ENC, HEVC | HEIC, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | + MSM_VIDC_META_DYN_ENABLE | MSM_VIDC_META_TX_INPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_SEI_CONTENT_LIGHT_LEVEL, + HFI_PROP_SEI_CONTENT_LIGHT_LEVEL, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_SEI_CLL, DEC, HEVC | HEIC | AV1, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_INPUT | + MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_SEI_CONTENT_LIGHT_LEVEL, + HFI_PROP_SEI_CONTENT_LIGHT_LEVEL, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_HDR10PLUS, ENC, HEVC | HEIC, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | + MSM_VIDC_META_DYN_ENABLE | MSM_VIDC_META_TX_INPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_HDR10PLUS, + HFI_PROP_SEI_HDR10PLUS_USERDATA, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_HDR10PLUS, DEC, HEVC | HEIC | AV1, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_INPUT | + MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_HDR10PLUS, + HFI_PROP_SEI_HDR10PLUS_USERDATA, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_DOLBY_RPU, ENC, HEVC, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_TX_INPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_DOLBY_RPU, + HFI_PROP_DOLBY_RPU_METADATA, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_DOLBY_RPU, DEC, H264 | HEVC, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_DOLBY_RPU, + HFI_PROP_DOLBY_RPU_METADATA, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_EVA_STATS, ENC, H264 | HEVC, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | + MSM_VIDC_META_DYN_ENABLE | MSM_VIDC_META_TX_INPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_EVA_STATS, + HFI_PROP_EVA_STAT_INFO, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_BUF_TAG, ENC, CODECS_ALL, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_TX_INPUT | + MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_BUFFER_TAG, + HFI_PROP_BUFFER_TAG, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + /* + * when fence enabled, client needs output buffer_tag + * in input metadata buffer done. + */ + {META_BUF_TAG, DEC, CODECS_ALL, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_TX_INPUT | + MSM_VIDC_META_TX_OUTPUT | MSM_VIDC_META_RX_INPUT | + MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_BUFFER_TAG, + HFI_PROP_BUFFER_TAG, + CAP_FLAG_BITMASK | CAP_FLAG_META | CAP_FLAG_DYNAMIC_ALLOWED}, + + {META_DPB_TAG_LIST, DEC, CODECS_ALL, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_INPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_DPB_TAG_LIST, + HFI_PROP_DPB_TAG_LIST, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_SUBFRAME_OUTPUT, ENC, HEIC | H264 | HEVC, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_SUBFRAME_OUTPUT, + HFI_PROP_SUBFRAME_OUTPUT, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_SUBFRAME_OUTPUT, DEC, CODECS_ALL, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_SUBFRAME_OUTPUT, + HFI_PROP_SUBFRAME_OUTPUT, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_ENC_QP_METADATA, ENC, CODECS_ALL, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_ENC_QP_METADATA, + HFI_PROP_ENC_QP_METADATA, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_ROI_INFO, ENC, H264 | HEVC, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_TX_INPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_ROI_INFO, + HFI_PROP_ROI_INFO, + CAP_FLAG_INPUT_PORT | CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_SALIENCY_INFO, ENC, H264 | HEVC, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_TX_INPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_SALIENCY_INFO, + HFI_PROP_ROI_AS_SALIENCY_INFO, + CAP_FLAG_INPUT_PORT | CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_DEC_QP_METADATA, DEC, CODECS_ALL, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_DEC_QP_METADATA, + HFI_PROP_DEC_QP_METADATA, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {GRID_ENABLE, ENC, HEIC, + 0, 1, 1, 1, + 0, + HFI_PROP_HEIC_GRID_ENABLE, + CAP_FLAG_OUTPUT_PORT}, + + {GRID_SIZE, ENC, HEIC, + HEIC_GRID_WIDTH, HEIC_GRID_WIDTH * 2, + HEIC_GRID_WIDTH, HEIC_GRID_WIDTH, + V4L2_CID_MPEG_VIDC_GRID_WIDTH}, + + {COMPLEXITY, ENC, H264 | HEVC, + 0, 100, + 1, DEFAULT_COMPLEXITY, + V4L2_CID_MPEG_VIDC_VENC_COMPLEXITY}, + + {DELIVERY_MODE, ENC, HEVC, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE, + HFI_PROP_ENABLE_SLICE_DELIVERY, + CAP_FLAG_OUTPUT_PORT}, + + {DELIVERY_MODE, ENC, H264, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_H264_ENCODE_DELIVERY_MODE, + HFI_PROP_ENABLE_SLICE_DELIVERY, + CAP_FLAG_OUTPUT_PORT}, + + {SIGNAL_COLOR_INFO, ENC, CODECS_ALL, + 0, INT_MAX, 1, 0, + V4L2_CID_MPEG_VIDC_SIGNAL_COLOR_INFO, + HFI_PROP_SIGNAL_COLOR_INFO, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, +}; + +static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_volcano_v0[] = { + /* {cap, domain, codec, + * parents, + * children, + * adjust, set} + */ + + {PIX_FMTS, ENC, H264, + {META_ROI_INFO, IR_PERIOD, CSC}}, + + {PIX_FMTS, ENC, HEVC, + {PROFILE, MIN_FRAME_QP, MAX_FRAME_QP, I_FRAME_QP, P_FRAME_QP, + B_FRAME_QP, META_ROI_INFO, MIN_QUALITY, BLUR_TYPES, IR_PERIOD, + LTR_COUNT, CSC}}, + + {PIX_FMTS, ENC, HEIC, + {PROFILE, CSC}}, + + {PIX_FMTS, DEC, HEVC | HEIC, + {PROFILE}}, + + {FRAME_RATE, ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_q16}, + + {FRAME_RATE, DEC, CODECS_ALL, + {0}, + msm_vidc_adjust_dec_frame_rate}, + + {OPERATING_RATE, DEC, CODECS_ALL, + {0}, + msm_vidc_adjust_dec_operating_rate}, + + {ENC_RING_BUFFER_COUNT, ENC, CODECS_ALL, + {0}, + NULL, + NULL}, + + {SECURE_MODE, ENC | DEC, H264 | HEVC | VP9 | AV1, + {0}, + NULL, + msm_vidc_set_u32}, + + {META_OUTBUF_FENCE, DEC, H264 | HEVC | AV1 | VP9, + {LOWLATENCY_MODE, OUTBUF_FENCE_TYPE, OUTBUF_FENCE_DIRECTION}, + NULL, + NULL}, + + {INBUF_FENCE_TYPE, DEC, H264 | HEVC | VP9 | AV1, + {0}, + NULL, + NULL}, + + {OUTBUF_FENCE_TYPE, DEC, H264 | HEVC | VP9 | AV1, + {0}, + msm_vidc_adjust_dec_outbuf_fence_type, + msm_vidc_set_outbuf_fence_type}, + + {INBUF_FENCE_DIRECTION, DEC, H264 | HEVC | VP9 | AV1, + {0}, + NULL, + NULL}, + + {OUTBUF_FENCE_DIRECTION, DEC, H264 | HEVC | VP9 | AV1, + {0}, + msm_vidc_adjust_dec_outbuf_fence_direction, + msm_vidc_set_outbuf_fence_direction}, + + {FENCE_ERROR_DATA_CORRUPT, DEC, H264 | HEVC | VP9 | AV1, + {0}, + NULL, + msm_vidc_set_u32}, + + {HFLIP, ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_flip}, + + {VFLIP, ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_flip}, + + {ROTATION, ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_rotation}, + + {SUPER_FRAME, ENC, H264 | HEVC, + {INPUT_BUF_HOST_MAX_COUNT, OUTPUT_BUF_HOST_MAX_COUNT}, + NULL, + NULL}, + + {SLICE_DECODE, DEC, H264 | HEVC | AV1, + {0}, + NULL, + NULL}, + + {HEADER_MODE, ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_header_mode}, + + {WITHOUT_STARTCODE, ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_nal_length}, + + {WITHOUT_STARTCODE, DEC, AV1, + {0}, + NULL, + msm_vidc_set_u32}, + + {REQUEST_I_FRAME, ENC, H264 | HEVC, + {0}, + NULL, + msm_vidc_set_req_sync_frame}, + + {BIT_RATE, ENC, H264, + {PEAK_BITRATE, BITRATE_BOOST, L0_BR}, + msm_vidc_adjust_bitrate, + msm_vidc_set_bitrate}, + + {BIT_RATE, ENC, HEVC, + {PEAK_BITRATE, BITRATE_BOOST, L0_BR}, + msm_vidc_adjust_bitrate, + msm_vidc_set_bitrate}, + + {BITRATE_MODE, ENC, H264, + {LTR_COUNT, IR_PERIOD, TIME_DELTA_BASED_RC, I_FRAME_QP, + P_FRAME_QP, B_FRAME_QP, ENH_LAYER_COUNT, BIT_RATE, + META_ROI_INFO, MIN_QUALITY, BITRATE_BOOST, VBV_DELAY, + PEAK_BITRATE, SLICE_MODE, CONTENT_ADAPTIVE_CODING, + BLUR_TYPES, LOWLATENCY_MODE, META_TRANSCODING_STAT_INFO}, + msm_vidc_adjust_bitrate_mode, + msm_vidc_set_u32_enum}, + + {BITRATE_MODE, ENC, HEVC, + {LTR_COUNT, IR_PERIOD, TIME_DELTA_BASED_RC, I_FRAME_QP, + P_FRAME_QP, B_FRAME_QP, CONSTANT_QUALITY, ENH_LAYER_COUNT, + BIT_RATE, META_ROI_INFO, MIN_QUALITY, BITRATE_BOOST, VBV_DELAY, + PEAK_BITRATE, SLICE_MODE, CONTENT_ADAPTIVE_CODING, + BLUR_TYPES, LOWLATENCY_MODE, META_EVA_STATS, META_TRANSCODING_STAT_INFO}, + msm_vidc_adjust_bitrate_mode, + msm_vidc_set_u32_enum}, + + {BITRATE_MODE, ENC, HEIC, + {TIME_DELTA_BASED_RC, CONSTANT_QUALITY}, + msm_vidc_adjust_bitrate_mode, + msm_vidc_set_u32_enum}, + + {CONSTANT_QUALITY, ENC, HEVC | HEIC, + {0}, + NULL, + msm_vidc_set_constant_quality}, + + {GOP_SIZE, ENC, CODECS_ALL, + {ALL_INTRA}, + msm_vidc_adjust_gop_size, + msm_vidc_set_gop_size}, + + {GOP_SIZE, ENC, HEIC, + {0}, + NULL, + msm_vidc_set_u32}, + + {B_FRAME, ENC, H264 | HEVC, + {ALL_INTRA}, + msm_vidc_adjust_b_frame, + msm_vidc_set_u32}, + + {B_FRAME, ENC, HEIC, + {0}, + NULL, + msm_vidc_set_u32}, + + {BLUR_TYPES, ENC, H264 | HEVC, + {BLUR_RESOLUTION}, + msm_vidc_adjust_blur_type, + msm_vidc_set_u32_enum}, + + {BLUR_RESOLUTION, ENC, H264 | HEVC, + {0}, + msm_vidc_adjust_blur_resolution, + msm_vidc_set_blur_resolution}, + + {CSC, ENC, CODECS_ALL, + {0}, + msm_vidc_adjust_csc, + msm_vidc_set_u32}, + + {CSC_CUSTOM_MATRIX, ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_csc_custom_matrix}, + + {LOWLATENCY_MODE, ENC, H264 | HEVC, + {STAGE, BIT_RATE}, + msm_vidc_adjust_enc_lowlatency_mode, + NULL}, + + {LOWLATENCY_MODE, DEC, H264 | HEVC | AV1, + {STAGE}, + msm_vidc_adjust_dec_lowlatency_mode, + NULL}, + + {LOWLATENCY_MODE, DEC, VP9, + {STAGE}, + msm_vidc_adjust_dec_lowlatency_mode, + NULL}, + + {LTR_COUNT, ENC, H264 | HEVC, + {0}, + msm_vidc_adjust_ltr_count, + msm_vidc_set_u32}, + + {USE_LTR, ENC, H264 | HEVC, + {0}, + msm_vidc_adjust_use_ltr, + msm_vidc_set_use_and_mark_ltr}, + + {MARK_LTR, ENC, H264 | HEVC, + {0}, + msm_vidc_adjust_mark_ltr, + msm_vidc_set_use_and_mark_ltr}, + + {IR_PERIOD, ENC, H264 | HEVC, + {0}, + msm_vidc_adjust_ir_period, + msm_vidc_set_ir_period}, + + {AU_DELIMITER, ENC, H264 | HEVC, + {0}, + NULL, + msm_vidc_set_u32}, + + {BASELAYER_PRIORITY, ENC, H264, + {0}, + NULL, + msm_vidc_set_u32}, + + {TIME_DELTA_BASED_RC, ENC, CODECS_ALL, + {0}, + msm_vidc_adjust_delta_based_rc, + msm_vidc_set_u32}, + + {CONTENT_ADAPTIVE_CODING, ENC, H264 | HEVC, + {REQUEST_PREPROCESS}, + msm_vidc_adjust_brs, + msm_vidc_set_vbr_related_properties}, + + {REQUEST_PREPROCESS, ENC, H264 | HEVC, + {0}, + msm_vidc_adjust_preprocess, + msm_vidc_set_preprocess}, + + {BITRATE_BOOST, ENC, H264 | HEVC, + {0}, + msm_vidc_adjust_bitrate_boost, + msm_vidc_set_vbr_related_properties}, + + {MIN_QUALITY, ENC, H264 | HEVC, + {BLUR_TYPES}, + msm_vidc_adjust_min_quality, + msm_vidc_set_u32}, + + {VBV_DELAY, ENC, H264 | HEVC, + {0}, + NULL, + msm_vidc_set_cbr_related_properties}, + + {PEAK_BITRATE, ENC, H264 | HEVC, + {0}, + msm_vidc_adjust_peak_bitrate, + msm_vidc_set_cbr_related_properties}, + + {MIN_FRAME_QP, ENC, H264, + {0}, + NULL, + msm_vidc_set_min_qp}, + + {MIN_FRAME_QP, ENC, HEVC, + {0}, + msm_vidc_adjust_hevc_min_qp, + msm_vidc_set_min_qp}, + + {MAX_FRAME_QP, ENC, H264, + {0}, + NULL, + msm_vidc_set_max_qp}, + + {MAX_FRAME_QP, ENC, HEVC, + {0}, + msm_vidc_adjust_hevc_max_qp, + msm_vidc_set_max_qp}, + + {I_FRAME_QP, ENC, HEVC, + {0}, + msm_vidc_adjust_hevc_i_frame_qp, + msm_vidc_set_frame_qp}, + + {I_FRAME_QP, ENC, H264, + {0}, + NULL, + msm_vidc_set_frame_qp}, + + {P_FRAME_QP, ENC, HEVC, + {0}, + msm_vidc_adjust_hevc_p_frame_qp, + msm_vidc_set_frame_qp}, + + {P_FRAME_QP, ENC, H264, + {0}, + NULL, + msm_vidc_set_frame_qp}, + + {B_FRAME_QP, ENC, HEVC, + {0}, + msm_vidc_adjust_hevc_b_frame_qp, + msm_vidc_set_frame_qp}, + + {B_FRAME_QP, ENC, H264, + {0}, + NULL, + msm_vidc_set_frame_qp}, + + {LAYER_TYPE, ENC, H264 | HEVC, + {CONTENT_ADAPTIVE_CODING, LTR_COUNT}}, + + {LAYER_ENABLE, ENC, H264 | HEVC, + {CONTENT_ADAPTIVE_CODING}}, + + {ENH_LAYER_COUNT, ENC, H264 | HEVC, + {GOP_SIZE, B_FRAME, BIT_RATE, MIN_QUALITY, SLICE_MODE, LTR_COUNT}, + msm_vidc_adjust_layer_count, + msm_vidc_set_layer_count_and_type}, + + {ENH_LAYER_COUNT, DEC, AV1, + {0}, + NULL, + msm_vidc_set_u32}, + + {L0_BR, ENC, H264 | HEVC, + {L1_BR}, + msm_vidc_adjust_layer_bitrate, + msm_vidc_set_layer_bitrate}, + + {L1_BR, ENC, H264 | HEVC, + {L2_BR}, + msm_vidc_adjust_layer_bitrate, + msm_vidc_set_layer_bitrate}, + + {L2_BR, ENC, H264 | HEVC, + {L3_BR}, + msm_vidc_adjust_layer_bitrate, + msm_vidc_set_layer_bitrate}, + + {L3_BR, ENC, H264 | HEVC, + {L4_BR}, + msm_vidc_adjust_layer_bitrate, + msm_vidc_set_layer_bitrate}, + + {L4_BR, ENC, H264 | HEVC, + {L5_BR}, + msm_vidc_adjust_layer_bitrate, + msm_vidc_set_layer_bitrate}, + + {L5_BR, ENC, H264 | HEVC, + {0}, + msm_vidc_adjust_layer_bitrate, + msm_vidc_set_layer_bitrate}, + + {ENTROPY_MODE, ENC, H264, + {BIT_RATE}, + msm_vidc_adjust_entropy_mode, + msm_vidc_set_u32}, + + {PROFILE, ENC, H264, + {ENTROPY_MODE, TRANSFORM_8X8}, + NULL, + msm_vidc_set_u32_enum}, + + {PROFILE, DEC, H264, + {ENTROPY_MODE}, + NULL, + msm_vidc_set_u32_enum}, + + {PROFILE, ENC, HEVC | HEIC, + {META_SEI_MASTERING_DISP, META_SEI_CLL, META_HDR10PLUS}, + msm_vidc_adjust_profile, + msm_vidc_set_u32_enum}, + + {PROFILE, DEC, HEVC | HEIC, + {0}, + msm_vidc_adjust_profile, + msm_vidc_set_u32_enum}, + + {PROFILE, DEC, VP9 | AV1, + {0}, + NULL, + msm_vidc_set_u32_enum}, + + {LEVEL, DEC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_u32_enum}, + + {LEVEL, ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_level}, + + {AV1_TIER, DEC, AV1, + {0}, + NULL, + msm_vidc_set_u32_enum}, + + {HEVC_TIER, ENC | DEC, HEVC | HEIC, + {0}, + NULL, + msm_vidc_set_u32_enum}, + + {LF_MODE, ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_deblock_mode}, + + {SLICE_MODE, ENC, H264 | HEVC, + {STAGE, DELIVERY_MODE}, + msm_vidc_adjust_slice_count, + msm_vidc_set_slice_count}, + + {SLICE_MODE, ENC, HEIC, + {0}, + msm_vidc_adjust_slice_count, + msm_vidc_set_slice_count}, + + {TRANSFORM_8X8, ENC, H264, + {0}, + msm_vidc_adjust_transform_8x8, + msm_vidc_set_u32}, + + {CHROMA_QP_INDEX_OFFSET, ENC, HEVC, + {0}, + msm_vidc_adjust_chroma_qp_index_offset, + msm_vidc_set_chroma_qp_index_offset}, + + {DISPLAY_DELAY_ENABLE, DEC, H264 | HEVC | VP9 | AV1, + {OUTPUT_ORDER}, + NULL, + NULL}, + + {DISPLAY_DELAY, DEC, H264 | HEVC | VP9 | AV1, + {OUTPUT_ORDER}, + NULL, + NULL}, + + {OUTPUT_ORDER, DEC, H264 | HEVC | AV1 | VP9, + {0}, + msm_vidc_adjust_output_order, + msm_vidc_set_u32}, + + {INPUT_BUF_HOST_MAX_COUNT, ENC | DEC, CODECS_ALL, + {0}, + msm_vidc_adjust_input_buf_host_max_count, + msm_vidc_set_u32}, + + {INPUT_BUF_HOST_MAX_COUNT, ENC, H264 | HEVC, + {0}, + msm_vidc_adjust_input_buf_host_max_count, + msm_vidc_set_u32}, + + {OUTPUT_BUF_HOST_MAX_COUNT, ENC | DEC, CODECS_ALL, + {0}, + msm_vidc_adjust_output_buf_host_max_count, + msm_vidc_set_u32}, + + {OUTPUT_BUF_HOST_MAX_COUNT, ENC, H264 | HEVC, + {0}, + msm_vidc_adjust_output_buf_host_max_count, + msm_vidc_set_u32}, + + {CONCEAL_COLOR_8BIT, DEC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_u32_packed}, + + {CONCEAL_COLOR_10BIT, DEC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_u32_packed}, + + {STAGE, ENC | DEC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_stage}, + + {STAGE, ENC, H264 | HEVC, + {0}, + NULL, + msm_vidc_set_stage}, + + {STAGE, DEC, H264 | HEVC | VP9 | AV1, + {0}, + NULL, + msm_vidc_set_stage}, + + {PIPE, DEC|ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_pipe}, + + {THUMBNAIL_MODE, DEC, H264 | HEVC | VP9 | AV1, + {OUTPUT_ORDER}, + NULL, + msm_vidc_set_u32}, + + {THUMBNAIL_MODE, DEC, HEIC, + {0}, + NULL, + msm_vidc_set_u32}, + + {RAP_FRAME, DEC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_u32}, + + {PRIORITY, DEC|ENC, CODECS_ALL, + {0}, + msm_vidc_adjust_session_priority, + msm_vidc_set_session_priority}, + + {FIRMWARE_PRIORITY_OFFSET, DEC | ENC, CODECS_ALL, + {0}, + NULL, + NULL}, + + {CRITICAL_PRIORITY, ENC, CODECS_ALL, + {0}, + NULL, + NULL}, + + {RESERVE_DURATION, ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_reserve_duration}, + + {DRAP, DEC, AV1, + {0}, + NULL, + msm_vidc_set_u32}, + + {ALL_INTRA, ENC, H264 | HEVC, + {LTR_COUNT, IR_PERIOD, SLICE_MODE, BIT_RATE}, + msm_vidc_adjust_all_intra, + NULL}, + + {META_EVA_STATS, ENC, HEVC, + {0}, + msm_vidc_adjust_eva_stats, + NULL}, + + {META_ROI_INFO, ENC, H264 | HEVC, + {MIN_QUALITY, IR_PERIOD, BLUR_TYPES}, + msm_vidc_adjust_roi_info, + NULL}, + + {GRID_ENABLE, ENC, HEIC, + {0}, + NULL, + msm_vidc_set_u32}, + + {DELIVERY_MODE, ENC, H264 | HEVC, + {LOWLATENCY_MODE, OUTPUT_BUF_HOST_MAX_COUNT}, + msm_vidc_adjust_delivery_mode, + msm_vidc_set_u32}, + + {VUI_TIMING_INFO, ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_vui_timing_info}, + + {SIGNAL_COLOR_INFO, ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_signal_color_info}, + + {META_SEI_MASTERING_DISP, ENC, HEVC | HEIC, + {0}, + msm_vidc_adjust_sei_mastering_disp, + NULL}, + + {META_SEI_CLL, ENC, HEVC | HEIC, + {0}, + msm_vidc_adjust_sei_cll, + NULL}, + + {META_HDR10PLUS, ENC, HEVC | HEIC, + {0}, + msm_vidc_adjust_hdr10plus, + NULL}, + + {META_TRANSCODING_STAT_INFO, ENC, HEVC|H264, + {0}, + msm_vidc_adjust_transcoding_stats, + NULL}, +}; + +static struct msm_platform_inst_capability instance_cap_data_volcano_v1[] = { + /* {cap, domain, codec, + * min, max, step_or_mask, value, + * v4l2_id, + * hfi_id, + * flags} + */ + {DRV_VERSION, DEC|ENC, CODECS_ALL, + 0, INT_MAX, 1, DRIVER_VERSION, + V4L2_CID_MPEG_VIDC_DRIVER_VERSION}, + + {FRAME_WIDTH, DEC, CODECS_ALL, 96, 4096, 1, 1920}, + + {FRAME_WIDTH, ENC, CODECS_ALL, 128, 4096, 1, 1920}, + + {FRAME_WIDTH, ENC, HEVC, 96, 4096, 1, 1920}, + + {FRAME_WIDTH, ENC, HEIC, 128, 16384, 1, 16384}, + + {LOSSLESS_FRAME_WIDTH, ENC, CODECS_ALL, 128, 4096, 1, 1920}, + + {LOSSLESS_FRAME_WIDTH, ENC, HEVC, 96, 4096, 1, 1920}, + + {SECURE_FRAME_WIDTH, DEC, CODECS_ALL, 96, 4096, 1, 1920}, + + {SECURE_FRAME_WIDTH, ENC, CODECS_ALL, 128, 4096, 1, 1920}, + + {SECURE_FRAME_WIDTH, ENC, HEVC, 96, 4096, 1, 1920}, + + {FRAME_HEIGHT, DEC, CODECS_ALL, 96, 4096, 1, 1080}, + + {FRAME_HEIGHT, ENC, CODECS_ALL, 128, 4096, 1, 1080}, + + {FRAME_HEIGHT, ENC, HEVC, 96, 4096, 1, 1080}, + + {FRAME_HEIGHT, ENC, HEIC, 128, 16384, 1, 16384}, + + {LOSSLESS_FRAME_HEIGHT, ENC, CODECS_ALL, 128, 4096, 1, 1080}, + + {LOSSLESS_FRAME_HEIGHT, ENC, HEVC, 96, 4096, 1, 1080}, + + {SECURE_FRAME_HEIGHT, DEC, CODECS_ALL, 96, 4096, 1, 1080}, + + {SECURE_FRAME_HEIGHT, ENC, CODECS_ALL, 128, 4096, 1, 1080}, + + {SECURE_FRAME_HEIGHT, ENC, HEVC, 96, 4096, 1, 1080}, + + {PIX_FMTS, ENC | DEC, H264, + MSM_VIDC_FMT_NV12, + MSM_VIDC_FMT_NV12C, + MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C, + MSM_VIDC_FMT_NV12C}, + + {PIX_FMTS, ENC | DEC, HEVC|VP9, + MSM_VIDC_FMT_NV12, + MSM_VIDC_FMT_TP10C, + MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C | + MSM_VIDC_FMT_P010 | MSM_VIDC_FMT_TP10C, + MSM_VIDC_FMT_NV12C}, + + {PIX_FMTS, ENC, HEIC, + MSM_VIDC_FMT_NV12, + MSM_VIDC_FMT_P010, + MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_P010, + MSM_VIDC_FMT_NV12}, + + {PIX_FMTS, DEC, HEIC, + MSM_VIDC_FMT_NV12, + MSM_VIDC_FMT_TP10C, + MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C | + MSM_VIDC_FMT_P010 | MSM_VIDC_FMT_TP10C, + MSM_VIDC_FMT_NV12C}, + + {MIN_BUFFERS_INPUT, ENC | DEC, CODECS_ALL, 0, 64, 1, 4, + V4L2_CID_MIN_BUFFERS_FOR_OUTPUT, + 0, + CAP_FLAG_VOLATILE}, + + {MIN_BUFFERS_INPUT, ENC | DEC, HEIC, 0, 64, 1, 1, + V4L2_CID_MIN_BUFFERS_FOR_OUTPUT, + 0, + CAP_FLAG_VOLATILE}, + + {MIN_BUFFERS_OUTPUT, ENC | DEC, CODECS_ALL, + 0, 64, 1, 4, + V4L2_CID_MIN_BUFFERS_FOR_CAPTURE, + HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_VOLATILE}, + + /* (4096 * 2304) / 256 */ + {MBPF, ENC, CODECS_ALL, 64, 36864, 1, 36864}, + + {MBPF, ENC, HEVC, 36, 36864, 1, 36864}, + + /* ((16384x16384)/256) */ + {MBPF, ENC, HEIC, 36, 1048576, 1, 1048576}, + + /* (4096 * 2304) / 256 */ + {MBPF, DEC, CODECS_ALL, 36, 36864, 1, 36864}, + + /* ((8192x8192)/256) */ + {MBPF, DEC, HEIC, 64, 262144, 1, 262144 }, + + /* (4096 * 2304) / 256 */ + {LOSSLESS_MBPF, ENC, H264 | HEVC, 64, 36864, 1, 36864}, + + /* Batch Mode Decode */ + /* BATCH_MBPF + 2 is done for chipsets other than waipio + * due to timeline constraints since msm_vidc_allow_decode_batch + * has checks to allow batching for less than BATCH_MBPF. + * Same applies for BATCH_FPS. + */ + /* (1920 * 1088) / 256 */ + {BATCH_MBPF, DEC, H264 | HEVC | VP9, 64, 8162, 1, 8162}, + + /* (4096 * 2304) / 256 */ + {BATCH_FPS, DEC, H264 | HEVC | VP9, 1, 61, 1, 61}, + + {SECURE_MBPF, ENC | DEC, H264 | HEVC | VP9, 64, 36864, 1, 36864}, + + {SECURE_MBPF, ENC, HEVC, 36, 36864, 1, 36864}, + + {FRAME_RATE, ENC, CODECS_ALL, + (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), + 1, (DEFAULT_FPS << 16), + 0, + HFI_PROP_FRAME_RATE, + CAP_FLAG_OUTPUT_PORT}, + + {FRAME_RATE, ENC, HEIC, + (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), + 1, (MINIMUM_FPS << 16), + 0, + HFI_PROP_FRAME_RATE, + CAP_FLAG_OUTPUT_PORT}, + + {FRAME_RATE, DEC, CODECS_ALL, + (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), + 1, (DEFAULT_FPS << 16), + V4L2_CID_MPEG_VIDC_FRAME_RATE, + 0, + CAP_FLAG_OUTPUT_PORT | + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {FRAME_RATE, DEC, VP9, + (MINIMUM_FPS << 16), (MAXIMUM_OVERRIDE_VP9_FPS << 16), + 1, (DEFAULT_FPS << 16), + V4L2_CID_MPEG_VIDC_FRAME_RATE, + 0, + CAP_FLAG_OUTPUT_PORT | + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {OPERATING_RATE, ENC, CODECS_ALL, + (MINIMUM_FPS << 16), INT_MAX, + 1, (DEFAULT_FPS << 16)}, + + {OPERATING_RATE, DEC, CODECS_ALL, + (MINIMUM_FPS << 16), INT_MAX, + 1, (DEFAULT_FPS << 16), + V4L2_CID_MPEG_VIDC_OPERATING_RATE, + 0, + CAP_FLAG_OUTPUT_PORT | + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {INPUT_RATE, ENC | DEC, CODECS_ALL, + (MINIMUM_FPS << 16), INT_MAX, + 1, (DEFAULT_FPS << 16)}, + + {TIMESTAMP_RATE, ENC | DEC, CODECS_ALL, + (MINIMUM_FPS << 16), INT_MAX, + 1, (DEFAULT_FPS << 16)}, + + {SCALE_FACTOR, ENC, H264 | HEVC, 1, 8, 1, 8}, + + {MB_CYCLES_VSP, ENC, CODECS_ALL, 25, 25, 1, 25}, + + {MB_CYCLES_VSP, DEC, CODECS_ALL, 25, 25, 1, 25}, + + {MB_CYCLES_VSP, DEC, VP9, 60, 60, 1, 60}, + + {MB_CYCLES_VPP, ENC, CODECS_ALL, 675, 675, 1, 675}, + + {MB_CYCLES_VPP, DEC, CODECS_ALL, 200, 200, 1, 200}, + + {MB_CYCLES_LP, ENC, CODECS_ALL, 320, 320, 1, 320}, + + {MB_CYCLES_LP, DEC, CODECS_ALL, 200, 200, 1, 200}, + + {MB_CYCLES_FW, ENC | DEC, CODECS_ALL, 489583, 489583, 1, 489583}, + + {MB_CYCLES_FW_VPP, ENC, CODECS_ALL, 48405, 48405, 1, 48405}, + + {MB_CYCLES_FW_VPP, DEC, CODECS_ALL, 66234, 66234, 1, 66234}, + + {ENC_RING_BUFFER_COUNT, ENC, CODECS_ALL, + 0, 0, 1, 0}, + + {CLIENT_ID, ENC | DEC, CODECS_ALL, + INVALID_CLIENT_ID, INT_MAX, 1, INVALID_CLIENT_ID, + V4L2_CID_MPEG_VIDC_CLIENT_ID}, + + {SECURE_MODE, ENC | DEC, H264 | HEVC | VP9, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_SECURE, + HFI_PROP_SECURE, + CAP_FLAG_NONE}, + + /* + * Client will enable V4L2_CID_MPEG_VIDC_METADATA_OUTBUF_FENCE + * to get fence_id in input metadata buffer done. + */ + {META_OUTBUF_FENCE, DEC, H264 | HEVC | VP9, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_INPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_OUTBUF_FENCE, + HFI_PROP_FENCE, + CAP_FLAG_BITMASK | CAP_FLAG_META | CAP_FLAG_DYNAMIC_ALLOWED}, + + /* + * Client to do set_ctrl with FENCE_ID to set fence_id + * and then client will do get_ctrl with FENCE_FD to get + * fence_fd corresponding to client set fence_id. + */ + {FENCE_ID, DEC, CODECS_ALL, + 0, INT_MAX, 1, 0, + V4L2_CID_MPEG_VIDC_SW_FENCE_ID, + 0, + CAP_FLAG_DYNAMIC_ALLOWED | CAP_FLAG_OUTPUT_PORT}, + + {FENCE_FD, DEC, CODECS_ALL, + INVALID_FD, INT_MAX, 1, INVALID_FD, + V4L2_CID_MPEG_VIDC_SW_FENCE_FD, + 0, + CAP_FLAG_VOLATILE}, + + /* Fence type for input buffer. Currently unsed */ + {INBUF_FENCE_TYPE, DEC, H264 | HEVC | VP9, + MSM_VIDC_FENCE_NONE, MSM_VIDC_FENCE_NONE, + BIT(MSM_VIDC_FENCE_NONE), + MSM_VIDC_FENCE_NONE, + 0, + HFI_PROP_FENCE_TYPE, + CAP_FLAG_MENU | CAP_FLAG_INPUT_PORT}, + + {OUTBUF_FENCE_TYPE, DEC, H264 | HEVC | VP9, + MSM_VIDC_FENCE_NONE, MSM_VIDC_SYNX_V2_FENCE, + BIT(MSM_VIDC_FENCE_NONE) | BIT(MSM_VIDC_SW_FENCE) | + BIT(MSM_VIDC_SYNX_V2_FENCE), + MSM_VIDC_FENCE_NONE, + 0, + HFI_PROP_FENCE_TYPE, + CAP_FLAG_MENU | CAP_FLAG_OUTPUT_PORT}, + + /* Fence direction for input buffer. Currently unsed */ + {INBUF_FENCE_DIRECTION, DEC, H264 | HEVC | VP9, + MSM_VIDC_FENCE_DIR_NONE, MSM_VIDC_FENCE_DIR_NONE, + BIT(MSM_VIDC_FENCE_DIR_NONE), + MSM_VIDC_FENCE_DIR_NONE, + 0, + HFI_PROP_FENCE_DIRECTION, + CAP_FLAG_MENU | CAP_FLAG_INPUT_PORT}, + + {OUTBUF_FENCE_DIRECTION, DEC, H264 | HEVC | VP9, + MSM_VIDC_FENCE_DIR_NONE, MSM_VIDC_FENCE_DIR_RX, + BIT(MSM_VIDC_FENCE_DIR_NONE) | BIT(MSM_VIDC_FENCE_DIR_TX) | + BIT(MSM_VIDC_FENCE_DIR_RX), + MSM_VIDC_FENCE_DIR_NONE, + 0, + HFI_PROP_FENCE_DIRECTION, + CAP_FLAG_MENU | CAP_FLAG_OUTPUT_PORT}, + + {FENCE_ERROR_DATA_CORRUPT, DEC, H264 | HEVC | VP9, + 0, 1, 1, 0, + 0, + HFI_PROP_FENCE_ERROR_DATA_CORRUPT}, + + {TS_REORDER, DEC, H264 | HEVC, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_TS_REORDER}, + + {HFLIP, ENC, CODECS_ALL, + 0, 1, 1, 0, + V4L2_CID_HFLIP, + HFI_PROP_FLIP, + CAP_FLAG_OUTPUT_PORT | + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {VFLIP, ENC, CODECS_ALL, + 0, 1, 1, 0, + V4L2_CID_VFLIP, + HFI_PROP_FLIP, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {ROTATION, ENC, CODECS_ALL, + 0, 270, 90, 0, + V4L2_CID_ROTATE, + HFI_PROP_ROTATION, + CAP_FLAG_OUTPUT_PORT}, + + {SUPER_FRAME, ENC, H264 | HEVC, + 0, 32, 1, 0, + V4L2_CID_MPEG_VIDC_SUPERFRAME, 0, + CAP_FLAG_DYNAMIC_ALLOWED}, + + {SLICE_DECODE, DEC, H264 | HEVC, + V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_MSM_VIDC_DISABLE, + 0, + V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDEO_DECODER_SLICE_INTERFACE, + 0}, + + {HEADER_MODE, ENC, CODECS_ALL, + V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE, + V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME, + BIT(V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE) | + BIT(V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME), + V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE, + V4L2_CID_MPEG_VIDEO_HEADER_MODE, + HFI_PROP_SEQ_HEADER_MODE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {PREPEND_SPSPPS_TO_IDR, ENC, CODECS_ALL, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDEO_PREPEND_SPSPPS_TO_IDR}, + + {VUI_TIMING_INFO, ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_VUI_TIMING_INFO, + HFI_PROP_DISABLE_VUI_TIMING_INFO, + CAP_FLAG_OUTPUT_PORT}, + + {WITHOUT_STARTCODE, ENC, CODECS_ALL, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE, + HFI_PROP_NAL_LENGTH_FIELD, + CAP_FLAG_OUTPUT_PORT}, + + {WITHOUT_STARTCODE, DEC, AV1, + 0, 0, 1, 0, + V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE, + 0, + CAP_FLAG_INPUT_PORT}, + + {NAL_LENGTH_FIELD, ENC, CODECS_ALL, + V4L2_MPEG_VIDEO_HEVC_SIZE_0, + V4L2_MPEG_VIDEO_HEVC_SIZE_4, + BIT(V4L2_MPEG_VIDEO_HEVC_SIZE_0) | + BIT(V4L2_MPEG_VIDEO_HEVC_SIZE_4), + V4L2_MPEG_VIDEO_HEVC_SIZE_0, + V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD, + HFI_PROP_NAL_LENGTH_FIELD, + CAP_FLAG_MENU | CAP_FLAG_OUTPUT_PORT}, + + /* TODO: Firmware introduced enumeration type for this + * with and without seq header. + */ + {REQUEST_I_FRAME, ENC, H264 | HEVC, + 0, 0, 0, 0, + V4L2_CID_MPEG_VIDEO_FORCE_KEY_FRAME, + HFI_PROP_REQUEST_SYNC_FRAME, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + /* Enc: Keeping CABAC and CAVLC as same bitrate. + * Dec: there's no use of Bitrate cap + */ + {BIT_RATE, ENC, H264 | HEVC, + 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_BITRATE, + HFI_PROP_TOTAL_BITRATE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {BITRATE_MODE, ENC, H264, + V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, + V4L2_MPEG_VIDEO_BITRATE_MODE_CBR, + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_VBR) | + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CBR), + V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, + V4L2_CID_MPEG_VIDEO_BITRATE_MODE, + HFI_PROP_RATE_CONTROL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {BITRATE_MODE, ENC, HEVC, + V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, + V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_VBR) | + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CBR) | + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CQ), + V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, + V4L2_CID_MPEG_VIDEO_BITRATE_MODE, + HFI_PROP_RATE_CONTROL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {BITRATE_MODE, ENC, HEIC, + V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, + V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CQ), + V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, + V4L2_CID_MPEG_VIDEO_BITRATE_MODE, + HFI_PROP_RATE_CONTROL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {CABAC_MAX_BITRATE, ENC, H264 | HEVC, 0, + 160000000, 1, 160000000}, + + {CAVLC_MAX_BITRATE, ENC, H264, 0, + 160000000, 1, 160000000}, + + {ALLINTRA_MAX_BITRATE, ENC, H264 | HEVC, 0, + 160000000, 1, 160000000}, + + {LOWLATENCY_MAX_BITRATE, ENC, H264 | HEVC, 0, + 70000000, 1, 70000000}, + + {NUM_COMV, DEC, CODECS_ALL, + 0, INT_MAX, 1, 0}, + + {LOSSLESS, ENC, HEVC, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU}, + + {FRAME_SKIP_MODE, ENC, H264 | HEVC | HEIC, + V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED, + V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT, + BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED) | + BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_LEVEL_LIMIT) | + BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT), + V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED, + V4L2_CID_MPEG_VIDEO_FRAME_SKIP_MODE, + 0, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {FRAME_RC_ENABLE, ENC, H264 | HEVC | HEIC, + 0, 1, 1, 1, + V4L2_CID_MPEG_VIDEO_FRAME_RC_ENABLE}, + + {CONSTANT_QUALITY, ENC, HEVC, + 1, MAX_CONSTANT_QUALITY, 1, 90, + V4L2_CID_MPEG_VIDEO_CONSTANT_QUALITY, + HFI_PROP_CONSTANT_QUALITY, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {CONSTANT_QUALITY, ENC, HEIC, + 1, MAX_CONSTANT_QUALITY, 1, 100, + V4L2_CID_MPEG_VIDEO_CONSTANT_QUALITY, + HFI_PROP_CONSTANT_QUALITY, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {GOP_SIZE, ENC, CODECS_ALL, + 0, INT_MAX, 1, 2 * DEFAULT_FPS - 1, + V4L2_CID_MPEG_VIDEO_GOP_SIZE, + HFI_PROP_MAX_GOP_FRAMES, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {GOP_SIZE, ENC, HEIC, + 0, INT_MAX, 1, 0 /* all intra */, + V4L2_CID_MPEG_VIDEO_GOP_SIZE, + HFI_PROP_MAX_GOP_FRAMES, + CAP_FLAG_OUTPUT_PORT | + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {GOP_CLOSURE, ENC, H264 | HEVC, + 0, 1, 1, 1, + V4L2_CID_MPEG_VIDEO_GOP_CLOSURE, + 0}, + + {B_FRAME, ENC, H264 | HEVC, + 0, 7, 1, 0, + V4L2_CID_MPEG_VIDEO_B_FRAMES, + HFI_PROP_MAX_B_FRAMES, + CAP_FLAG_OUTPUT_PORT}, + + {B_FRAME, ENC, HEIC, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDEO_B_FRAMES, + HFI_PROP_MAX_B_FRAMES, + CAP_FLAG_OUTPUT_PORT}, + + {BLUR_TYPES, ENC, H264 | HEVC, + MSM_VIDC_BLUR_NONE, MSM_VIDC_BLUR_EXTERNAL, + BIT(MSM_VIDC_BLUR_NONE) | BIT(MSM_VIDC_BLUR_EXTERNAL), + MSM_VIDC_BLUR_NONE, + V4L2_CID_MPEG_VIDC_VIDEO_BLUR_TYPES, + HFI_PROP_BLUR_TYPES, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {BLUR_RESOLUTION, ENC, H264 | HEVC, + 0, S32_MAX, 1, 0, + V4L2_CID_MPEG_VIDC_VIDEO_BLUR_RESOLUTION, + HFI_PROP_BLUR_RESOLUTION, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {CSC, ENC, CODECS_ALL, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_CSC, + HFI_PROP_CSC, + CAP_FLAG_OUTPUT_PORT}, + + {CSC_CUSTOM_MATRIX, ENC, CODECS_ALL, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_VIDEO_VPE_CSC_CUSTOM_MATRIX, + HFI_PROP_CSC_MATRIX, + CAP_FLAG_OUTPUT_PORT}, + + {LOWLATENCY_MODE, ENC, H264 | HEVC, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_LOWLATENCY_REQUEST, + 0, + CAP_FLAG_NONE}, + + {LOWLATENCY_MODE, DEC, H264 | HEVC | VP9, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_LOWLATENCY_REQUEST, + HFI_PROP_SEQ_CHANGE_AT_SYNC_FRAME, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {LTR_COUNT, ENC, H264 | HEVC, + 0, MAX_LTR_FRAME_COUNT_5, 1, 0, + V4L2_CID_MPEG_VIDEO_LTR_COUNT, + HFI_PROP_LTR_COUNT, + CAP_FLAG_OUTPUT_PORT}, + + {USE_LTR, ENC, H264 | HEVC, + 0, + ((1 << MAX_LTR_FRAME_COUNT_5) - 1), + 0, 0, + V4L2_CID_MPEG_VIDEO_USE_LTR_FRAMES, + HFI_PROP_LTR_USE, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {MARK_LTR, ENC, H264 | HEVC, + INVALID_DEFAULT_MARK_OR_USE_LTR, + (MAX_LTR_FRAME_COUNT_5 - 1), + 1, INVALID_DEFAULT_MARK_OR_USE_LTR, + V4L2_CID_MPEG_VIDEO_FRAME_LTR_INDEX, + HFI_PROP_LTR_MARK, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {BASELAYER_PRIORITY, ENC, H264, + 0, MAX_BASE_LAYER_PRIORITY_ID, 1, 0, + V4L2_CID_MPEG_VIDEO_BASELAYER_PRIORITY_ID, + HFI_PROP_BASELAYER_PRIORITYID, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {IR_TYPE, ENC, H264 | HEVC, + V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_RANDOM, + V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_CYCLIC, + BIT(V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_RANDOM) | + BIT(V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_CYCLIC), + V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_RANDOM, + V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE, + 0, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {IR_PERIOD, ENC, H264 | HEVC, + 0, INT_MAX, 1, 0, + V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD, + 0, + CAP_FLAG_INPUT_PORT | CAP_FLAG_OUTPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {AU_DELIMITER, ENC, H264 | HEVC, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDEO_AU_DELIMITER, + HFI_PROP_AUD, + CAP_FLAG_OUTPUT_PORT}, + + {TIME_DELTA_BASED_RC, ENC, H264 | HEVC, + 0, 1, 1, 1, + V4L2_CID_MPEG_VIDC_TIME_DELTA_BASED_RC, + HFI_PROP_TIME_DELTA_BASED_RATE_CONTROL, + CAP_FLAG_OUTPUT_PORT}, + + {TIME_DELTA_BASED_RC, ENC, HEIC, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_TIME_DELTA_BASED_RC, + HFI_PROP_TIME_DELTA_BASED_RATE_CONTROL, + CAP_FLAG_OUTPUT_PORT}, + + {CONTENT_ADAPTIVE_CODING, ENC, H264 | HEVC, + 0, 1, 1, 1, + V4L2_CID_MPEG_VIDC_CONTENT_ADAPTIVE_CODING, + HFI_PROP_CONTENT_ADAPTIVE_CODING, + CAP_FLAG_OUTPUT_PORT}, + + {REQUEST_PREPROCESS, ENC, H264 | HEVC, + MSM_VIDC_PREPROCESS_NONE, + MSM_VIDC_PREPROCESS_TYPE0, + BIT(MSM_VIDC_PREPROCESS_NONE) | + BIT(MSM_VIDC_PREPROCESS_TYPE0), + MSM_VIDC_PREPROCESS_NONE, + 0, HFI_PROP_REQUEST_PREPROCESS, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {BITRATE_BOOST, ENC, H264 | HEVC, + 0, MAX_BITRATE_BOOST, 25, MAX_BITRATE_BOOST, + V4L2_CID_MPEG_VIDC_QUALITY_BITRATE_BOOST, + HFI_PROP_BITRATE_BOOST, + CAP_FLAG_OUTPUT_PORT}, + + {MIN_QUALITY, ENC, H264 | HEVC, + 0, MAX_SUPPORTED_MIN_QUALITY, 70, MAX_SUPPORTED_MIN_QUALITY, + 0, + HFI_PROP_MAINTAIN_MIN_QUALITY, + CAP_FLAG_OUTPUT_PORT}, + + {VBV_DELAY, ENC, H264 | HEVC, + 200, 300, 100, 300, + V4L2_CID_MPEG_VIDEO_VBV_DELAY, + HFI_PROP_VBV_DELAY, + CAP_FLAG_OUTPUT_PORT}, + + {PEAK_BITRATE, ENC, H264 | HEVC, + /* default peak bitrate is 10% larger than avg bitrate */ + 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_BITRATE_PEAK, + HFI_PROP_TOTAL_PEAK_BITRATE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {MIN_FRAME_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, + V4L2_CID_MPEG_VIDEO_H264_MIN_QP, + HFI_PROP_MIN_QP_PACKED, + CAP_FLAG_OUTPUT_PORT}, + + {MIN_FRAME_QP, ENC, HEVC | HEIC, + MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, + V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP, + HFI_PROP_MIN_QP_PACKED, + CAP_FLAG_OUTPUT_PORT}, + + {I_FRAME_MIN_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, + V4L2_CID_MPEG_VIDEO_H264_I_FRAME_MIN_QP}, + + {I_FRAME_MIN_QP, ENC, HEVC | HEIC, + MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, + V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_MIN_QP}, + + {P_FRAME_MIN_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, + V4L2_CID_MPEG_VIDEO_H264_P_FRAME_MIN_QP}, + + {P_FRAME_MIN_QP, ENC, HEVC | HEIC, + MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, + V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_MIN_QP}, + + {B_FRAME_MIN_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, + V4L2_CID_MPEG_VIDEO_H264_B_FRAME_MIN_QP}, + + {B_FRAME_MIN_QP, ENC, HEVC | HEIC, + MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, + V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_MIN_QP}, + + {MAX_FRAME_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_H264_MAX_QP, + HFI_PROP_MAX_QP_PACKED, + CAP_FLAG_OUTPUT_PORT}, + + {MAX_FRAME_QP, ENC, HEVC | HEIC, + MIN_QP_10BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP, + HFI_PROP_MAX_QP_PACKED, + CAP_FLAG_OUTPUT_PORT}, + + {I_FRAME_MAX_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_H264_I_FRAME_MAX_QP}, + + {I_FRAME_MAX_QP, ENC, HEVC | HEIC, + MIN_QP_10BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_MAX_QP}, + + {P_FRAME_MAX_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_H264_P_FRAME_MAX_QP}, + + {P_FRAME_MAX_QP, ENC, HEVC | HEIC, + MIN_QP_10BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_MAX_QP}, + + {B_FRAME_MAX_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_H264_B_FRAME_MAX_QP}, + + {B_FRAME_MAX_QP, ENC, HEVC | HEIC, + MIN_QP_10BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_MAX_QP}, + + {I_FRAME_QP, ENC, HEVC, + MIN_QP_10BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {I_FRAME_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {P_FRAME_QP, ENC, HEVC, + MIN_QP_10BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {P_FRAME_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {B_FRAME_QP, ENC, HEVC, + MIN_QP_10BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {B_FRAME_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_H264_B_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {LAYER_TYPE, ENC, HEVC, + V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B, + V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P, + BIT(V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B) | + BIT(V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P), + V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE, + HFI_PROP_LAYER_ENCODING_TYPE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LAYER_TYPE, ENC, H264, + V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_B, + V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P, + BIT(V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_B) | + BIT(V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P), + V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P, + V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_TYPE, + HFI_PROP_LAYER_ENCODING_TYPE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LAYER_ENABLE, ENC, H264, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING, + HFI_PROP_LAYER_ENCODING_TYPE, + CAP_FLAG_OUTPUT_PORT}, + + {LAYER_ENABLE, ENC, HEVC, + 0, 1, 1, 0, + 0, + 0, + CAP_FLAG_OUTPUT_PORT}, + + {ENH_LAYER_COUNT, ENC, HEVC, + 0, 5, 1, 0, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER, + HFI_PROP_LAYER_COUNT, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {ENH_LAYER_COUNT, ENC, H264, + 0, 5, 1, 0, + V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_LAYER, + HFI_PROP_LAYER_COUNT, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L0_BR, ENC, H264, + 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L0_BR, + HFI_PROP_BITRATE_LAYER1, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L0_BR, ENC, HEVC, + 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L0_BR, + HFI_PROP_BITRATE_LAYER1, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L1_BR, ENC, H264, + 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L1_BR, + HFI_PROP_BITRATE_LAYER2, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L1_BR, ENC, HEVC, + 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L1_BR, + HFI_PROP_BITRATE_LAYER2, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L2_BR, ENC, H264, + 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L2_BR, + HFI_PROP_BITRATE_LAYER3, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L2_BR, ENC, HEVC, + 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L2_BR, + HFI_PROP_BITRATE_LAYER3, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L3_BR, ENC, H264, + 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L3_BR, + HFI_PROP_BITRATE_LAYER4, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + {L3_BR, ENC, HEVC, + 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L3_BR, + HFI_PROP_BITRATE_LAYER4, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L4_BR, ENC, H264, + 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L4_BR, + HFI_PROP_BITRATE_LAYER5, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L4_BR, ENC, HEVC, + 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L4_BR, + HFI_PROP_BITRATE_LAYER5, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L5_BR, ENC, H264, + 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L5_BR, + HFI_PROP_BITRATE_LAYER6, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L5_BR, ENC, HEVC, + 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L5_BR, + HFI_PROP_BITRATE_LAYER6, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {ENTROPY_MODE, ENC, H264, + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC, + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, + BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC) | + BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC), + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, + V4L2_CID_MPEG_VIDEO_H264_ENTROPY_MODE, + HFI_PROP_CABAC_SESSION, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {ENTROPY_MODE, DEC, H264 | HEVC | VP9, + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC, + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, + BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC) | + BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC), + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, + 0, + HFI_PROP_CABAC_SESSION}, + + {PROFILE, ENC | DEC, H264, + V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE, + V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH, + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_BASELINE) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_MAIN) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_HIGH), + V4L2_MPEG_VIDEO_H264_PROFILE_HIGH, + V4L2_CID_MPEG_VIDEO_H264_PROFILE, + HFI_PROP_PROFILE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {PROFILE, ENC | DEC, HEVC | HEIC, + V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN, + V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE, + BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN) | + BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE) | + BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10) | + BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE), + V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN, + V4L2_CID_MPEG_VIDEO_HEVC_PROFILE, + HFI_PROP_PROFILE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {PROFILE, DEC, VP9, + V4L2_MPEG_VIDEO_VP9_PROFILE_0, + V4L2_MPEG_VIDEO_VP9_PROFILE_2, + BIT(V4L2_MPEG_VIDEO_VP9_PROFILE_0) | + BIT(V4L2_MPEG_VIDEO_VP9_PROFILE_2), + V4L2_MPEG_VIDEO_VP9_PROFILE_0, + V4L2_CID_MPEG_VIDEO_VP9_PROFILE, + HFI_PROP_PROFILE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LEVEL, ENC, H264, + V4L2_MPEG_VIDEO_H264_LEVEL_1_0, + V4L2_MPEG_VIDEO_H264_LEVEL_5_2, + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1B) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_3) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_2), + V4L2_MPEG_VIDEO_H264_LEVEL_5_2, + V4L2_CID_MPEG_VIDEO_H264_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LEVEL, ENC, HEVC | HEIC, + V4L2_MPEG_VIDEO_HEVC_LEVEL_1, + V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1, + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1), + V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1, + V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LEVEL, DEC, H264, + V4L2_MPEG_VIDEO_H264_LEVEL_1_0, + V4L2_MPEG_VIDEO_H264_LEVEL_5_2, + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1B) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_3) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_2), + V4L2_MPEG_VIDEO_H264_LEVEL_5_2, + V4L2_CID_MPEG_VIDEO_H264_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LEVEL, DEC, HEVC | HEIC, + V4L2_MPEG_VIDEO_HEVC_LEVEL_1, + V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1, + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1), + V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1, + V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LEVEL, DEC, VP9, + V4L2_MPEG_VIDEO_VP9_LEVEL_1_0, + V4L2_MPEG_VIDEO_VP9_LEVEL_5_1, + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_1_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_1_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_2_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_3_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_4_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_1), + V4L2_MPEG_VIDEO_VP9_LEVEL_5_1, + V4L2_CID_MPEG_VIDEO_VP9_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {HEVC_TIER, ENC | DEC, HEVC, + V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, + V4L2_MPEG_VIDEO_HEVC_TIER_HIGH, + BIT(V4L2_MPEG_VIDEO_HEVC_TIER_MAIN) | + BIT(V4L2_MPEG_VIDEO_HEVC_TIER_HIGH), + V4L2_MPEG_VIDEO_HEVC_TIER_HIGH, + V4L2_CID_MPEG_VIDEO_HEVC_TIER, + HFI_PROP_TIER, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {HEVC_TIER, ENC | DEC, HEIC, + V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, + V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, + BIT(V4L2_MPEG_VIDEO_HEVC_TIER_MAIN), + V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, + V4L2_CID_MPEG_VIDEO_HEVC_TIER, + HFI_PROP_TIER, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LF_MODE, ENC, H264, + V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED, + DB_H264_DISABLE_SLICE_BOUNDARY, + BIT(V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED) | + BIT(V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_DISABLED) | + BIT(DB_H264_DISABLE_SLICE_BOUNDARY), + V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED, + V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_MODE, + HFI_PROP_DEBLOCKING_MODE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LF_MODE, ENC, HEVC | HEIC, + V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_DISABLED, + DB_HEVC_DISABLE_SLICE_BOUNDARY, + BIT(V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_DISABLED) | + BIT(V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_ENABLED) | + BIT(DB_HEVC_DISABLE_SLICE_BOUNDARY), + V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_ENABLED, + V4L2_CID_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE, + HFI_PROP_DEBLOCKING_MODE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LF_ALPHA, ENC, H264, + -6, 6, 1, 0, + V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_ALPHA}, + + {LF_ALPHA, ENC, HEVC | HEIC, + -6, 6, 1, 0, + V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2}, + + {LF_BETA, ENC, H264, + -6, 6, 1, 0, + V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_BETA}, + + {LF_BETA, ENC, HEVC | HEIC, + -6, 6, 1, 0, + V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2}, + + {SLICE_MODE, ENC, H264 | HEVC, + V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, + V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_BYTES, + BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE) | + BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_MB) | + BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_BYTES), + V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, + V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE, + 0, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {SLICE_MODE, ENC, HEIC, + V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, + V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, + BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE), + V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, + V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE, + 0, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {SLICE_MAX_BYTES, ENC, H264 | HEVC, + MIN_SLICE_BYTE_SIZE, MAX_SLICE_BYTE_SIZE_V1, + 1, MIN_SLICE_BYTE_SIZE, + V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES, + HFI_PROP_MULTI_SLICE_BYTES_COUNT, + CAP_FLAG_OUTPUT_PORT}, + + {SLICE_MAX_MB, ENC, H264 | HEVC, + 1, MAX_SLICE_MB_SIZE, 1, 1, + V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB, + HFI_PROP_MULTI_SLICE_MB_COUNT, + CAP_FLAG_OUTPUT_PORT}, + + {MB_RC, ENC, H264 | HEVC, + 0, 1, 1, 1, + V4L2_CID_MPEG_VIDEO_MB_RC_ENABLE, + 0, + CAP_FLAG_OUTPUT_PORT}, + + {TRANSFORM_8X8, ENC, H264, + 0, 1, 1, 1, + V4L2_CID_MPEG_VIDEO_H264_8X8_TRANSFORM, + HFI_PROP_8X8_TRANSFORM, + CAP_FLAG_OUTPUT_PORT}, + + {CHROMA_QP_INDEX_OFFSET, ENC, HEVC, + MIN_CHROMA_QP_OFFSET, MAX_CHROMA_QP_OFFSET, + 1, MAX_CHROMA_QP_OFFSET, + V4L2_CID_MPEG_VIDEO_H264_CHROMA_QP_INDEX_OFFSET, + HFI_PROP_CHROMA_QP_OFFSET, + CAP_FLAG_OUTPUT_PORT}, + + {DISPLAY_DELAY_ENABLE, DEC, H264 | HEVC | VP9, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY_ENABLE, + HFI_PROP_DECODE_ORDER_OUTPUT, + CAP_FLAG_INPUT_PORT}, + + {DISPLAY_DELAY, DEC, H264 | HEVC | VP9, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY, + HFI_PROP_DECODE_ORDER_OUTPUT, + CAP_FLAG_INPUT_PORT}, + + {OUTPUT_ORDER, DEC, H264 | HEVC | VP9, + 0, 1, 1, 0, + 0, + HFI_PROP_DECODE_ORDER_OUTPUT, + CAP_FLAG_INPUT_PORT}, + + {INPUT_BUF_HOST_MAX_COUNT, ENC | DEC, CODECS_ALL, + DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT, + 1, DEFAULT_MAX_HOST_BUF_COUNT, + 0, + HFI_PROP_BUFFER_HOST_MAX_COUNT, + CAP_FLAG_INPUT_PORT}, + + {OUTPUT_BUF_HOST_MAX_COUNT, ENC | DEC, CODECS_ALL, + DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT, + 1, DEFAULT_MAX_HOST_BUF_COUNT, + 0, + HFI_PROP_BUFFER_HOST_MAX_COUNT, + CAP_FLAG_OUTPUT_PORT}, + + {CONCEAL_COLOR_8BIT, DEC, CODECS_ALL, 0x0, 0xff3fcff, 1, + DEFAULT_VIDEO_CONCEAL_COLOR_BLACK, + V4L2_CID_MPEG_VIDEO_MUTE_YUV, + HFI_PROP_CONCEAL_COLOR_8BIT, + CAP_FLAG_INPUT_PORT}, + + {CONCEAL_COLOR_10BIT, DEC, CODECS_ALL, 0x0, 0x3fffffff, 1, + DEFAULT_VIDEO_CONCEAL_COLOR_BLACK, + V4L2_CID_MPEG_VIDEO_MUTE_YUV, + HFI_PROP_CONCEAL_COLOR_10BIT, + CAP_FLAG_INPUT_PORT}, + + {STAGE, DEC|ENC, CODECS_ALL, + MSM_VIDC_STAGE_1, + MSM_VIDC_STAGE_2, 1, + MSM_VIDC_STAGE_2, + 0, + HFI_PROP_STAGE}, + + {PIPE, DEC|ENC, CODECS_ALL, + MSM_VIDC_PIPE_1, + MSM_VIDC_PIPE_2, 1, + MSM_VIDC_PIPE_2, + 0, + HFI_PROP_PIPE}, + + {POC, DEC, H264, + 0, 2, 1, 1, + 0, + HFI_PROP_PIC_ORDER_CNT_TYPE, + CAP_FLAG_VOLATILE}, + + /* + * value of MAX_NUM_REORDER_FRAMES is 32 packed as mentioned below + * (max_num_reorder_count << 16) | max_dec_frame_buffering_count + */ + {MAX_NUM_REORDER_FRAMES, DEC, H264 | HEVC, + 0, INT_MAX, 1, 0, + V4L2_CID_MPEG_VIDC_MAX_NUM_REORDER_FRAMES, + HFI_PROP_MAX_NUM_REORDER_FRAMES, + CAP_FLAG_VOLATILE}, + + {QUALITY_MODE, ENC, CODECS_ALL, + MSM_VIDC_MAX_QUALITY_MODE, + MSM_VIDC_POWER_SAVE_MODE, 1, + MSM_VIDC_POWER_SAVE_MODE}, + + {CODED_FRAMES, DEC, H264 | HEVC | HEIC, + CODED_FRAMES_PROGRESSIVE, CODED_FRAMES_INTERLACE, + 1, CODED_FRAMES_PROGRESSIVE, + V4L2_CID_MPEG_VIDC_INTERLACE, + HFI_PROP_CODED_FRAMES, + CAP_FLAG_VOLATILE}, + + {BIT_DEPTH, DEC, CODECS_ALL, BIT_DEPTH_8, BIT_DEPTH_10, 1, BIT_DEPTH_8, + 0, + HFI_PROP_LUMA_CHROMA_BIT_DEPTH}, + + {CODEC_CONFIG, DEC, H264 | HEVC | HEIC, 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_CODEC_CONFIG, 0, + CAP_FLAG_DYNAMIC_ALLOWED}, + + {BITSTREAM_SIZE_OVERWRITE, DEC, CODECS_ALL, 0, INT_MAX, 1, 0, + V4L2_CID_MPEG_VIDC_MIN_BITSTREAM_SIZE_OVERWRITE}, + + {THUMBNAIL_MODE, DEC, CODECS_ALL, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_THUMBNAIL_MODE, + HFI_PROP_THUMBNAIL_MODE, + CAP_FLAG_INPUT_PORT}, + + {DEFAULT_HEADER, DEC, CODECS_ALL, + 0, 1, 1, 0, + 0, + HFI_PROP_DEC_DEFAULT_HEADER}, + + {RAP_FRAME, DEC, CODECS_ALL, + 0, 1, 1, 1, + 0, + HFI_PROP_DEC_START_FROM_RAP_FRAME, + CAP_FLAG_INPUT_PORT}, + + {SEQ_CHANGE_AT_SYNC_FRAME, DEC, CODECS_ALL, + 0, 1, 1, 1, + 0, + HFI_PROP_SEQ_CHANGE_AT_SYNC_FRAME, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {PRIORITY, DEC|ENC, CODECS_ALL, + 0, 4, 1, 4, + V4L2_CID_MPEG_VIDC_PRIORITY, + HFI_PROP_SESSION_PRIORITY, + CAP_FLAG_DYNAMIC_ALLOWED}, + + {FIRMWARE_PRIORITY_OFFSET, DEC | ENC, CODECS_ALL, + 1, 1, 1, 1}, + + {CRITICAL_PRIORITY, ENC, CODECS_ALL, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_CRITICAL_PRIORITY}, + + {RESERVE_DURATION, ENC, CODECS_ALL, + 0, INT_MAX, 1, 0, + V4L2_CID_MPEG_VIDC_RESERVE_DURATION, + HFI_CMD_RESERVE, + CAP_FLAG_DYNAMIC_ALLOWED}, + + {ENC_IP_CR, ENC, CODECS_ALL, + 0, S32_MAX, 1, 0, + V4L2_CID_MPEG_VIDC_ENC_INPUT_COMPRESSION_RATIO, + 0, CAP_FLAG_DYNAMIC_ALLOWED}, + + {FILM_GRAIN, DEC, AV1, + 0, 0, 1, 0, + V4L2_CID_MPEG_VIDC_AV1D_FILM_GRAIN_PRESENT}, + + {SUPER_BLOCK, DEC, AV1, + 0, 0, 1, 0}, + + {DRAP, DEC, AV1, + 0, 0, 1, 0}, + + {LAST_FLAG_EVENT_ENABLE, DEC|ENC, CODECS_ALL, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_LAST_FLAG_EVENT_ENABLE}, + + {META_BITSTREAM_RESOLUTION, DEC, AV1, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_DISABLE | MSM_VIDC_META_RX_INPUT | + MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_BITSTREAM_RESOLUTION}, + + {META_CROP_OFFSETS, DEC, AV1, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_DISABLE | MSM_VIDC_META_RX_INPUT | + MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_CROP_OFFSETS}, + + {ALL_INTRA, ENC, H264 | HEVC, + 0, 1, 1, 0, + 0, + 0, + CAP_FLAG_OUTPUT_PORT}, + + {META_LTR_MARK_USE, ENC, H264 | HEVC, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_LTR_MARK_USE_DETAILS, + HFI_PROP_LTR_MARK_USE_DETAILS, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_SEQ_HDR_NAL, ENC, CODECS_ALL, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_SEQ_HEADER_NAL, + HFI_PROP_METADATA_SEQ_HEADER_NAL, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_DPB_MISR, DEC, CODECS_ALL, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_DPB_LUMA_CHROMA_MISR, + HFI_PROP_DPB_LUMA_CHROMA_MISR, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_OPB_MISR, DEC, CODECS_ALL, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_OPB_LUMA_CHROMA_MISR, + HFI_PROP_OPB_LUMA_CHROMA_MISR, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_INTERLACE, DEC, H264, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_INTERLACE, + HFI_PROP_INTERLACE_INFO, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_TIMESTAMP, DEC | ENC, CODECS_ALL, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_TIMESTAMP, + HFI_PROP_TIMESTAMP, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_CONCEALED_MB_CNT, DEC, CODECS_ALL, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_CONCEALED_MB_COUNT, + HFI_PROP_CONEALED_MB_COUNT, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_HIST_INFO, DEC, HEVC | VP9, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_HISTOGRAM_INFO, + HFI_PROP_HISTOGRAM_INFO, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_TRANSCODING_STAT_INFO, DEC, HEVC|H264, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_TRANSCODE_STAT_INFO, + HFI_PROP_TRANSCODING_STAT_INFO, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_TRANSCODING_STAT_INFO, ENC, HEVC|H264, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_DYN_ENABLE | MSM_VIDC_META_TX_INPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_TRANSCODE_STAT_INFO, + HFI_PROP_TRANSCODING_STAT_INFO, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_PICTURE_TYPE, DEC, CODECS_ALL, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_INPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_PICTURE_TYPE, + HFI_PROP_PICTURE_TYPE, + CAP_FLAG_BITMASK | CAP_FLAG_META | CAP_FLAG_DYNAMIC_ALLOWED}, + + {META_SEI_MASTERING_DISP, ENC, HEVC | HEIC, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | + MSM_VIDC_META_DYN_ENABLE | MSM_VIDC_META_TX_INPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_SEI_MASTERING_DISPLAY_COLOUR, + HFI_PROP_SEI_MASTERING_DISPLAY_COLOUR, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_SEI_MASTERING_DISP, DEC, HEVC | HEIC, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_INPUT | + MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_SEI_MASTERING_DISPLAY_COLOUR, + HFI_PROP_SEI_MASTERING_DISPLAY_COLOUR, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_SEI_CLL, ENC, HEVC | HEIC, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | + MSM_VIDC_META_DYN_ENABLE | MSM_VIDC_META_TX_INPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_SEI_CONTENT_LIGHT_LEVEL, + HFI_PROP_SEI_CONTENT_LIGHT_LEVEL, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_SEI_CLL, DEC, HEVC | HEIC, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_INPUT | + MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_SEI_CONTENT_LIGHT_LEVEL, + HFI_PROP_SEI_CONTENT_LIGHT_LEVEL, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_HDR10PLUS, ENC, HEVC | HEIC, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | + MSM_VIDC_META_DYN_ENABLE | MSM_VIDC_META_TX_INPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_HDR10PLUS, + HFI_PROP_SEI_HDR10PLUS_USERDATA, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_HDR10PLUS, DEC, HEVC | HEIC, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_INPUT | + MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_HDR10PLUS, + HFI_PROP_SEI_HDR10PLUS_USERDATA, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_DOLBY_RPU, ENC, HEVC, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_TX_INPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_DOLBY_RPU, + HFI_PROP_DOLBY_RPU_METADATA, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_DOLBY_RPU, DEC, H264 | HEVC, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_DOLBY_RPU, + HFI_PROP_DOLBY_RPU_METADATA, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_EVA_STATS, ENC, H264 | HEVC, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | + MSM_VIDC_META_DYN_ENABLE | MSM_VIDC_META_TX_INPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_EVA_STATS, + HFI_PROP_EVA_STAT_INFO, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_BUF_TAG, ENC, CODECS_ALL, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_TX_INPUT | + MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_BUFFER_TAG, + HFI_PROP_BUFFER_TAG, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + /* + * when fence enabled, client needs output buffer_tag + * in input metadata buffer done. + */ + {META_BUF_TAG, DEC, CODECS_ALL, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_TX_INPUT | + MSM_VIDC_META_TX_OUTPUT | MSM_VIDC_META_RX_INPUT | + MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_BUFFER_TAG, + HFI_PROP_BUFFER_TAG, + CAP_FLAG_BITMASK | CAP_FLAG_META | CAP_FLAG_DYNAMIC_ALLOWED}, + + {META_DPB_TAG_LIST, DEC, CODECS_ALL, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_INPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_DPB_TAG_LIST, + HFI_PROP_DPB_TAG_LIST, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_SUBFRAME_OUTPUT, ENC, HEIC | H264 | HEVC, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_SUBFRAME_OUTPUT, + HFI_PROP_SUBFRAME_OUTPUT, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_SUBFRAME_OUTPUT, DEC, CODECS_ALL, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_SUBFRAME_OUTPUT, + HFI_PROP_SUBFRAME_OUTPUT, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_ENC_QP_METADATA, ENC, CODECS_ALL, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_ENC_QP_METADATA, + HFI_PROP_ENC_QP_METADATA, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_ROI_INFO, ENC, H264 | HEVC, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_TX_INPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_ROI_INFO, + HFI_PROP_ROI_INFO, + CAP_FLAG_INPUT_PORT | CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_SALIENCY_INFO, ENC, H264 | HEVC, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_TX_INPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_SALIENCY_INFO, + HFI_PROP_ROI_AS_SALIENCY_INFO, + CAP_FLAG_INPUT_PORT | CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_DEC_QP_METADATA, DEC, CODECS_ALL, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_DEC_QP_METADATA, + HFI_PROP_DEC_QP_METADATA, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {GRID_ENABLE, ENC, HEIC, + 0, 1, 1, 1, + 0, + HFI_PROP_HEIC_GRID_ENABLE, + CAP_FLAG_OUTPUT_PORT}, + + {GRID_SIZE, ENC, HEIC, + HEIC_GRID_WIDTH, HEIC_GRID_WIDTH * 2, + HEIC_GRID_WIDTH, HEIC_GRID_WIDTH, + V4L2_CID_MPEG_VIDC_GRID_WIDTH}, + + {COMPLEXITY, ENC, H264 | HEVC, + 0, 100, + 1, DEFAULT_COMPLEXITY, + V4L2_CID_MPEG_VIDC_VENC_COMPLEXITY}, + + {DELIVERY_MODE, ENC, HEVC, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE, + HFI_PROP_ENABLE_SLICE_DELIVERY, + CAP_FLAG_OUTPUT_PORT}, + + {DELIVERY_MODE, ENC, H264, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_H264_ENCODE_DELIVERY_MODE, + HFI_PROP_ENABLE_SLICE_DELIVERY, + CAP_FLAG_OUTPUT_PORT}, + + {SIGNAL_COLOR_INFO, ENC, CODECS_ALL, + 0, INT_MAX, 1, 0, + V4L2_CID_MPEG_VIDC_SIGNAL_COLOR_INFO, + HFI_PROP_SIGNAL_COLOR_INFO, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, +}; + +static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_volcano_v1[] = { + /* {cap, domain, codec, + * parents, + * children, + * adjust, set} + */ + + {PIX_FMTS, ENC, H264, + {META_ROI_INFO, IR_PERIOD, CSC}}, + + {PIX_FMTS, ENC, HEVC, + {PROFILE, MIN_FRAME_QP, MAX_FRAME_QP, I_FRAME_QP, P_FRAME_QP, + B_FRAME_QP, META_ROI_INFO, MIN_QUALITY, BLUR_TYPES, IR_PERIOD, + LTR_COUNT, CSC}}, + + {PIX_FMTS, ENC, HEIC, + {PROFILE, CSC}}, + + {PIX_FMTS, DEC, HEVC | HEIC, + {PROFILE}}, + + {FRAME_RATE, ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_q16}, + + {FRAME_RATE, DEC, CODECS_ALL, + {0}, + msm_vidc_adjust_dec_frame_rate}, + + {OPERATING_RATE, DEC, CODECS_ALL, + {0}, + msm_vidc_adjust_dec_operating_rate}, + + {ENC_RING_BUFFER_COUNT, ENC, CODECS_ALL, + {0}, + NULL, + NULL}, + + {SECURE_MODE, ENC|DEC, H264 | HEVC | VP9, + {0}, + NULL, + msm_vidc_set_u32}, + + {META_OUTBUF_FENCE, DEC, H264 | HEVC | VP9, + {LOWLATENCY_MODE, OUTBUF_FENCE_TYPE, OUTBUF_FENCE_DIRECTION}, + NULL, + NULL}, + + {INBUF_FENCE_TYPE, DEC, H264 | HEVC | VP9, + {0}, + NULL, + NULL}, + + {OUTBUF_FENCE_TYPE, DEC, H264 | HEVC | VP9, + {0}, + msm_vidc_adjust_dec_outbuf_fence_type, + msm_vidc_set_outbuf_fence_type}, + + {INBUF_FENCE_DIRECTION, DEC, H264 | HEVC | VP9, + {0}, + NULL, + NULL}, + + {OUTBUF_FENCE_DIRECTION, DEC, H264 | HEVC | VP9, + {0}, + msm_vidc_adjust_dec_outbuf_fence_direction, + msm_vidc_set_outbuf_fence_direction}, + + {FENCE_ERROR_DATA_CORRUPT, DEC, H264 | HEVC | VP9, + {0}, + NULL, + msm_vidc_set_u32}, + + {HFLIP, ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_flip}, + + {VFLIP, ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_flip}, + + {ROTATION, ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_rotation}, + + {SUPER_FRAME, ENC, H264 | HEVC, + {INPUT_BUF_HOST_MAX_COUNT, OUTPUT_BUF_HOST_MAX_COUNT}, + NULL, + NULL}, + + {SLICE_DECODE, DEC, H264 | HEVC, + {0}, + NULL, + NULL}, + + {HEADER_MODE, ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_header_mode}, + + {WITHOUT_STARTCODE, ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_nal_length}, + + {WITHOUT_STARTCODE, DEC, AV1, + {0}, + NULL, + NULL}, + + {REQUEST_I_FRAME, ENC, H264 | HEVC, + {0}, + NULL, + msm_vidc_set_req_sync_frame}, + + {BIT_RATE, ENC, H264, + {PEAK_BITRATE, BITRATE_BOOST, L0_BR}, + msm_vidc_adjust_bitrate, + msm_vidc_set_bitrate}, + + {BIT_RATE, ENC, HEVC, + {PEAK_BITRATE, BITRATE_BOOST, L0_BR}, + msm_vidc_adjust_bitrate, + msm_vidc_set_bitrate}, + + {BITRATE_MODE, ENC, H264, + {LTR_COUNT, IR_PERIOD, TIME_DELTA_BASED_RC, I_FRAME_QP, + P_FRAME_QP, B_FRAME_QP, ENH_LAYER_COUNT, BIT_RATE, + META_ROI_INFO, MIN_QUALITY, BITRATE_BOOST, VBV_DELAY, + PEAK_BITRATE, SLICE_MODE, CONTENT_ADAPTIVE_CODING, + BLUR_TYPES, LOWLATENCY_MODE, META_TRANSCODING_STAT_INFO}, + msm_vidc_adjust_bitrate_mode, + msm_vidc_set_u32_enum}, + + {BITRATE_MODE, ENC, HEVC, + {LTR_COUNT, IR_PERIOD, TIME_DELTA_BASED_RC, I_FRAME_QP, + P_FRAME_QP, B_FRAME_QP, CONSTANT_QUALITY, ENH_LAYER_COUNT, + BIT_RATE, META_ROI_INFO, MIN_QUALITY, BITRATE_BOOST, VBV_DELAY, + PEAK_BITRATE, SLICE_MODE, CONTENT_ADAPTIVE_CODING, + BLUR_TYPES, LOWLATENCY_MODE, META_EVA_STATS, META_TRANSCODING_STAT_INFO}, + msm_vidc_adjust_bitrate_mode, + msm_vidc_set_u32_enum}, + + {BITRATE_MODE, ENC, HEIC, + {TIME_DELTA_BASED_RC, CONSTANT_QUALITY}, + msm_vidc_adjust_bitrate_mode, + msm_vidc_set_u32_enum}, + + {CONSTANT_QUALITY, ENC, HEVC | HEIC, + {0}, + NULL, + msm_vidc_set_constant_quality}, + + {GOP_SIZE, ENC, CODECS_ALL, + {ALL_INTRA}, + msm_vidc_adjust_gop_size, + msm_vidc_set_gop_size}, + + {GOP_SIZE, ENC, HEIC, + {0}, + NULL, + msm_vidc_set_u32}, + + {B_FRAME, ENC, H264 | HEVC, + {ALL_INTRA}, + msm_vidc_adjust_b_frame, + msm_vidc_set_u32}, + + {B_FRAME, ENC, HEIC, + {0}, + NULL, + msm_vidc_set_u32}, + + {BLUR_TYPES, ENC, H264 | HEVC, + {BLUR_RESOLUTION}, + msm_vidc_adjust_blur_type, + msm_vidc_set_u32_enum}, + + {BLUR_RESOLUTION, ENC, H264 | HEVC, + {0}, + msm_vidc_adjust_blur_resolution, + msm_vidc_set_blur_resolution}, + + {CSC, ENC, CODECS_ALL, + {0}, + msm_vidc_adjust_csc, + msm_vidc_set_u32}, + + {CSC_CUSTOM_MATRIX, ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_csc_custom_matrix}, + + {LOWLATENCY_MODE, ENC, H264 | HEVC, + {STAGE, BIT_RATE}, + msm_vidc_adjust_enc_lowlatency_mode, + NULL}, + + {LOWLATENCY_MODE, DEC, H264 | HEVC | VP9, + {STAGE}, + msm_vidc_adjust_dec_lowlatency_mode, + NULL}, + + {LTR_COUNT, ENC, H264 | HEVC, + {0}, + msm_vidc_adjust_ltr_count, + msm_vidc_set_u32}, + + {USE_LTR, ENC, H264 | HEVC, + {0}, + msm_vidc_adjust_use_ltr, + msm_vidc_set_use_and_mark_ltr}, + + {MARK_LTR, ENC, H264 | HEVC, + {0}, + msm_vidc_adjust_mark_ltr, + msm_vidc_set_use_and_mark_ltr}, + + {IR_PERIOD, ENC, H264 | HEVC, + {0}, + msm_vidc_adjust_ir_period, + msm_vidc_set_ir_period}, + + {AU_DELIMITER, ENC, H264 | HEVC, + {0}, + NULL, + msm_vidc_set_u32}, + + {BASELAYER_PRIORITY, ENC, H264, + {0}, + NULL, + msm_vidc_set_u32}, + + {TIME_DELTA_BASED_RC, ENC, CODECS_ALL, + {0}, + msm_vidc_adjust_delta_based_rc, + msm_vidc_set_u32}, + + {CONTENT_ADAPTIVE_CODING, ENC, H264 | HEVC, + {REQUEST_PREPROCESS}, + msm_vidc_adjust_brs, + msm_vidc_set_vbr_related_properties}, + + {REQUEST_PREPROCESS, ENC, H264 | HEVC, + {0}, + msm_vidc_adjust_preprocess, + msm_vidc_set_preprocess}, + + {BITRATE_BOOST, ENC, H264 | HEVC, + {0}, + msm_vidc_adjust_bitrate_boost, + msm_vidc_set_vbr_related_properties}, + + {MIN_QUALITY, ENC, H264 | HEVC, + {BLUR_TYPES}, + msm_vidc_adjust_min_quality, + msm_vidc_set_u32}, + + {VBV_DELAY, ENC, H264 | HEVC, + {0}, + NULL, + msm_vidc_set_cbr_related_properties}, + + {PEAK_BITRATE, ENC, H264 | HEVC, + {0}, + msm_vidc_adjust_peak_bitrate, + msm_vidc_set_cbr_related_properties}, + + {MIN_FRAME_QP, ENC, H264, + {0}, + NULL, + msm_vidc_set_min_qp}, + + {MIN_FRAME_QP, ENC, HEVC, + {0}, + msm_vidc_adjust_hevc_min_qp, + msm_vidc_set_min_qp}, + + {MAX_FRAME_QP, ENC, H264, + {0}, + NULL, + msm_vidc_set_max_qp}, + + {MAX_FRAME_QP, ENC, HEVC, + {0}, + msm_vidc_adjust_hevc_max_qp, + msm_vidc_set_max_qp}, + + {I_FRAME_QP, ENC, HEVC, + {0}, + msm_vidc_adjust_hevc_i_frame_qp, + msm_vidc_set_frame_qp}, + + {I_FRAME_QP, ENC, H264, + {0}, + NULL, + msm_vidc_set_frame_qp}, + + {P_FRAME_QP, ENC, HEVC, + {0}, + msm_vidc_adjust_hevc_p_frame_qp, + msm_vidc_set_frame_qp}, + + {P_FRAME_QP, ENC, H264, + {0}, + NULL, + msm_vidc_set_frame_qp}, + + {B_FRAME_QP, ENC, HEVC, + {0}, + msm_vidc_adjust_hevc_b_frame_qp, + msm_vidc_set_frame_qp}, + + {B_FRAME_QP, ENC, H264, + {0}, + NULL, + msm_vidc_set_frame_qp}, + + {LAYER_TYPE, ENC, H264 | HEVC, + {CONTENT_ADAPTIVE_CODING, LTR_COUNT}}, + + {LAYER_ENABLE, ENC, H264 | HEVC, + {CONTENT_ADAPTIVE_CODING}}, + + {ENH_LAYER_COUNT, ENC, H264 | HEVC, + {GOP_SIZE, B_FRAME, BIT_RATE, MIN_QUALITY, SLICE_MODE, LTR_COUNT}, + msm_vidc_adjust_layer_count, + msm_vidc_set_layer_count_and_type}, + + {L0_BR, ENC, H264 | HEVC, + {L1_BR}, + msm_vidc_adjust_layer_bitrate, + msm_vidc_set_layer_bitrate}, + + {L1_BR, ENC, H264 | HEVC, + {L2_BR}, + msm_vidc_adjust_layer_bitrate, + msm_vidc_set_layer_bitrate}, + + {L2_BR, ENC, H264 | HEVC, + {L3_BR}, + msm_vidc_adjust_layer_bitrate, + msm_vidc_set_layer_bitrate}, + + {L3_BR, ENC, H264 | HEVC, + {L4_BR}, + msm_vidc_adjust_layer_bitrate, + msm_vidc_set_layer_bitrate}, + + {L4_BR, ENC, H264 | HEVC, + {L5_BR}, + msm_vidc_adjust_layer_bitrate, + msm_vidc_set_layer_bitrate}, + + {L5_BR, ENC, H264 | HEVC, + {0}, + msm_vidc_adjust_layer_bitrate, + msm_vidc_set_layer_bitrate}, + + {ENTROPY_MODE, ENC, H264, + {BIT_RATE}, + msm_vidc_adjust_entropy_mode, + msm_vidc_set_u32}, + + {PROFILE, ENC, H264, + {ENTROPY_MODE, TRANSFORM_8X8}, + NULL, + msm_vidc_set_u32_enum}, + + {PROFILE, DEC, H264, + {ENTROPY_MODE}, + NULL, + msm_vidc_set_u32_enum}, + + {PROFILE, ENC, HEVC | HEIC, + {META_SEI_MASTERING_DISP, META_SEI_CLL, META_HDR10PLUS}, + msm_vidc_adjust_profile, + msm_vidc_set_u32_enum}, + + {PROFILE, DEC, HEVC | HEIC, + {0}, + msm_vidc_adjust_profile, + msm_vidc_set_u32_enum}, + + {PROFILE, DEC, VP9, + {0}, + NULL, + msm_vidc_set_u32_enum}, + + {LEVEL, DEC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_u32_enum}, + + {LEVEL, ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_level}, + + {HEVC_TIER, ENC | DEC, HEVC | HEIC, + {0}, + NULL, + msm_vidc_set_u32_enum}, + + {LF_MODE, ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_deblock_mode}, + + {SLICE_MODE, ENC, H264 | HEVC, + {STAGE, DELIVERY_MODE}, + msm_vidc_adjust_slice_count, + msm_vidc_set_slice_count}, + + {SLICE_MODE, ENC, HEIC, + {0}, + msm_vidc_adjust_slice_count, + msm_vidc_set_slice_count}, + + {TRANSFORM_8X8, ENC, H264, + {0}, + msm_vidc_adjust_transform_8x8, + msm_vidc_set_u32}, + + {CHROMA_QP_INDEX_OFFSET, ENC, HEVC, + {0}, + msm_vidc_adjust_chroma_qp_index_offset, + msm_vidc_set_chroma_qp_index_offset}, + + {DISPLAY_DELAY_ENABLE, DEC, H264 | HEVC | VP9, + {OUTPUT_ORDER}, + NULL, + NULL}, + + {DISPLAY_DELAY, DEC, H264 | HEVC | VP9, + {OUTPUT_ORDER}, + NULL, + NULL}, + + {OUTPUT_ORDER, DEC, H264 | HEVC | VP9, + {0}, + msm_vidc_adjust_output_order, + msm_vidc_set_u32}, + + {INPUT_BUF_HOST_MAX_COUNT, ENC | DEC, CODECS_ALL, + {0}, + msm_vidc_adjust_input_buf_host_max_count, + msm_vidc_set_u32}, + + {INPUT_BUF_HOST_MAX_COUNT, ENC, H264 | HEVC, + {0}, + msm_vidc_adjust_input_buf_host_max_count, + msm_vidc_set_u32}, + + {OUTPUT_BUF_HOST_MAX_COUNT, ENC | DEC, CODECS_ALL, + {0}, + msm_vidc_adjust_output_buf_host_max_count, + msm_vidc_set_u32}, + + {OUTPUT_BUF_HOST_MAX_COUNT, ENC, H264 | HEVC, + {0}, + msm_vidc_adjust_output_buf_host_max_count, + msm_vidc_set_u32}, + + {CONCEAL_COLOR_8BIT, DEC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_u32_packed}, + + {CONCEAL_COLOR_10BIT, DEC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_u32_packed}, + + {STAGE, ENC | DEC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_stage}, + + {STAGE, ENC, H264 | HEVC, + {0}, + NULL, + msm_vidc_set_stage}, + + {STAGE, DEC, H264 | HEVC | VP9, + {0}, + NULL, + msm_vidc_set_stage}, + + {PIPE, DEC|ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_pipe}, + + {THUMBNAIL_MODE, DEC, H264 | HEVC | VP9, + {OUTPUT_ORDER}, + NULL, + msm_vidc_set_u32}, + + {THUMBNAIL_MODE, DEC, HEIC, + {0}, + NULL, + msm_vidc_set_u32}, + + {RAP_FRAME, DEC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_u32}, + + {PRIORITY, DEC|ENC, CODECS_ALL, + {0}, + msm_vidc_adjust_session_priority, + msm_vidc_set_session_priority}, + + {FIRMWARE_PRIORITY_OFFSET, DEC | ENC, CODECS_ALL, + {0}, + NULL, + NULL}, + + {CRITICAL_PRIORITY, ENC, CODECS_ALL, + {0}, + NULL, + NULL}, + + {RESERVE_DURATION, ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_reserve_duration}, + + {DRAP, DEC, AV1, + {0}, + NULL, + NULL}, + + {ALL_INTRA, ENC, H264 | HEVC, + {LTR_COUNT, IR_PERIOD, SLICE_MODE, BIT_RATE}, + msm_vidc_adjust_all_intra, + NULL}, + + {META_EVA_STATS, ENC, HEVC, + {0}, + msm_vidc_adjust_eva_stats, + NULL}, + + {META_ROI_INFO, ENC, H264 | HEVC, + {MIN_QUALITY, IR_PERIOD, BLUR_TYPES}, + msm_vidc_adjust_roi_info, + NULL}, + + {GRID_ENABLE, ENC, HEIC, + {0}, + NULL, + msm_vidc_set_u32}, + + {DELIVERY_MODE, ENC, H264 | HEVC, + {LOWLATENCY_MODE, OUTPUT_BUF_HOST_MAX_COUNT}, + msm_vidc_adjust_delivery_mode, + msm_vidc_set_u32}, + + {VUI_TIMING_INFO, ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_vui_timing_info}, + + {SIGNAL_COLOR_INFO, ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_signal_color_info}, + + {META_SEI_MASTERING_DISP, ENC, HEVC | HEIC, + {0}, + msm_vidc_adjust_sei_mastering_disp, + NULL}, + + {META_SEI_CLL, ENC, HEVC | HEIC, + {0}, + msm_vidc_adjust_sei_cll, + NULL}, + + {META_HDR10PLUS, ENC, HEVC | HEIC, + {0}, + msm_vidc_adjust_hdr10plus, + NULL}, + + {META_TRANSCODING_STAT_INFO, ENC, HEVC|H264, + {0}, + msm_vidc_adjust_transcoding_stats, + NULL}, +}; + +/* Default UBWC config for LPDDR5 */ +static struct msm_vidc_ubwc_config_data ubwc_config_volcano[] = { + UBWC_CONFIG(8, 32, 16, 0, 1, 1, 1), +}; + +static struct msm_vidc_format_capability format_data_volcano = { + .codec_info = codec_data_volcano, + .codec_info_size = ARRAY_SIZE(codec_data_volcano), + .color_format_info = color_format_data_volcano, + .color_format_info_size = ARRAY_SIZE(color_format_data_volcano), + .color_prim_info = color_primaries_data_volcano, + .color_prim_info_size = ARRAY_SIZE(color_primaries_data_volcano), + .transfer_char_info = transfer_char_data_volcano, + .transfer_char_info_size = ARRAY_SIZE(transfer_char_data_volcano), + .matrix_coeff_info = matrix_coeff_data_volcano, + .matrix_coeff_info_size = ARRAY_SIZE(matrix_coeff_data_volcano), +}; + +/* name, min_kbps, max_kbps */ +static const struct bw_table volcano_bw_table[] = { + { "venus-cnoc", 1000, 1000 }, + { "venus-ddr", 1000, 15000000 }, + { "venus-llcc", 1000, 15000000 }, +}; + +/* name, hw_trigger */ +static const struct regulator_table volcano_regulator_table[] = { + { "iris-ctl", 0 }, + { "vcodec", 1 }, +}; + +/* name, clock id, scaling */ +static const struct clk_table volcano_clk_table[] = { + { "gcc_video_axi0_clk", GCC_VIDEO_AXI0_CLK, 0 }, + { "video_cc_mvs0c_clk", VIDEO_CC_MVS0C_CLK, 0 }, + { "video_cc_mvs0_clk", VIDEO_CC_MVS0_CLK, 0 }, + { "video_cc_mvs0_clk_src", VIDEO_CC_MVS0_CLK_SRC, 1 }, +}; + +/* name, exclusive_release */ +static const struct clk_rst_table volcano_clk_reset_table[] = { + { "video_axi_reset", 0 }, + { "video_xo_reset", 1 }, + { "video_mvs0c_reset", 0 }, +}; + +/* name, llcc_id */ +static const struct subcache_table volcano_subcache_table[] = { + { "vidsc0", LLCC_VIDSC0 }, +}; + +/* name, start, size, secure, dma_coherant, region, dma_mask */ +const struct context_bank_table volcano_context_bank_table[] = { + {"qcom,vidc,cb-ns", + 0x25800000, 0xba800000, 0, 1, MSM_VIDC_NON_SECURE, 0 }, + {"qcom,vidc,cb-ns-pxl", + 0x00100000, 0xdff00000, 0, 1, MSM_VIDC_NON_SECURE_PIXEL, 0 }, + {"qcom,vidc,cb-sec-pxl", + 0x00500000, 0xdfb00000, 1, 0, MSM_VIDC_SECURE_PIXEL, 0 }, + {"qcom,vidc,cb-sec-non-pxl", + 0x01000000, 0x24800000, 1, 0, MSM_VIDC_SECURE_NONPIXEL, 0 }, + {"qcom,vidc,cb-sec-bitstream", + 0x00500000, 0xdfb00000, 1, 0, MSM_VIDC_SECURE_BITSTREAM, 0 }, +}; + +/* freq */ +static struct freq_table volcano_freq_table_sku0[] = { + {533333333}, {444000000}, {366000000}, {338000000}, {240000000}, {192000000} +}; + +static struct freq_table volcano_freq_table_sku1[] = { + {366000000}, {338000000}, {240000000}, {192000000} +}; + +/* register, value, mask */ +static const struct reg_preset_table volcano_reg_preset_table[] = { + { 0xB0088, 0x0, 0x11 }, + { 0x10830, 0x33332222, 0xFFFFFFFF}, + { 0x10834, 0x44444444, 0xFFFFFFFF}, + { 0x10838, 0x00001022, 0xFFFFFFFF}, + { 0xA013C, 0x99, 0xFFFFFFFF}, +}; + +/* name, phys_addr, size, device_addr, device region type */ +static const struct device_region_table volcano_device_region_table[] = { + { + "aon-registers", + 0x0AAE0000, 0x1000, 0xFFAE0000, + MSM_VIDC_AON + }, + { + "ipc_protocol4_client8_version-registers", + 0x00508000, 0x1000, 0xFFADF000, + MSM_VIDC_PROTOCOL_FENCE_CLIENT_VPU + }, + { + "qtimer_f0v1_qtmr_v1_cntpct_lo", + 0x17421000, 0x1000, 0xFFADE000, + MSM_VIDC_QTIMER + }, +}; + +/* decoder properties */ +static const u32 volcano_vdec_psc_avc[] = { + HFI_PROP_BITSTREAM_RESOLUTION, + HFI_PROP_CROP_OFFSETS, + HFI_PROP_CODED_FRAMES, + HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT, + HFI_PROP_PIC_ORDER_CNT_TYPE, + HFI_PROP_PROFILE, + HFI_PROP_LEVEL, + HFI_PROP_SIGNAL_COLOR_INFO, + HFI_PROP_MAX_NUM_REORDER_FRAMES, +}; + +static const u32 volcano_vdec_psc_hevc[] = { + HFI_PROP_BITSTREAM_RESOLUTION, + HFI_PROP_CROP_OFFSETS, + HFI_PROP_LUMA_CHROMA_BIT_DEPTH, + HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT, + HFI_PROP_PROFILE, + HFI_PROP_LEVEL, + HFI_PROP_TIER, + HFI_PROP_SIGNAL_COLOR_INFO, + HFI_PROP_MAX_NUM_REORDER_FRAMES, +}; + +static const u32 volcano_vdec_psc_vp9[] = { + HFI_PROP_BITSTREAM_RESOLUTION, + HFI_PROP_CROP_OFFSETS, + HFI_PROP_LUMA_CHROMA_BIT_DEPTH, + HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT, + HFI_PROP_PROFILE, + HFI_PROP_LEVEL, +}; + +static const u32 volcano_vdec_psc_av1[] = { + HFI_PROP_BITSTREAM_RESOLUTION, + HFI_PROP_CROP_OFFSETS, + HFI_PROP_LUMA_CHROMA_BIT_DEPTH, + HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT, + HFI_PROP_AV1_FILM_GRAIN_PRESENT, + HFI_PROP_AV1_SUPER_BLOCK_ENABLED, + HFI_PROP_PROFILE, + HFI_PROP_LEVEL, + HFI_PROP_TIER, + HFI_PROP_SIGNAL_COLOR_INFO, +}; + +static const u32 volcano_vdec_input_properties_avc[] = { + HFI_PROP_NO_OUTPUT, + HFI_PROP_SUBFRAME_INPUT, + HFI_PROP_DPB_LIST, +}; + +static const u32 volcano_vdec_input_properties_hevc[] = { + HFI_PROP_NO_OUTPUT, + HFI_PROP_SUBFRAME_INPUT, + HFI_PROP_DPB_LIST, +}; + +static const u32 volcano_vdec_input_properties_vp9[] = { + HFI_PROP_NO_OUTPUT, + HFI_PROP_SUBFRAME_INPUT, + HFI_PROP_DPB_LIST, +}; + +static const u32 volcano_vdec_input_properties_av1[] = { + HFI_PROP_NO_OUTPUT, + HFI_PROP_SUBFRAME_INPUT, + HFI_PROP_DPB_LIST, + HFI_PROP_AV1_TILE_ROWS_COLUMNS, + HFI_PROP_AV1_UNIFORM_TILE_SPACING, +}; + +static const u32 volcano_vdec_output_properties_avc[] = { + HFI_PROP_WORST_COMPRESSION_RATIO, + HFI_PROP_WORST_COMPLEXITY_FACTOR, + HFI_PROP_PICTURE_TYPE, + HFI_PROP_CABAC_SESSION, + HFI_PROP_FENCE, +}; + +static const u32 volcano_vdec_output_properties_hevc[] = { + HFI_PROP_WORST_COMPRESSION_RATIO, + HFI_PROP_WORST_COMPLEXITY_FACTOR, + HFI_PROP_PICTURE_TYPE, + HFI_PROP_FENCE, +}; + +static const u32 volcano_vdec_output_properties_vp9[] = { + HFI_PROP_WORST_COMPRESSION_RATIO, + HFI_PROP_WORST_COMPLEXITY_FACTOR, + HFI_PROP_PICTURE_TYPE, + HFI_PROP_FENCE, +}; + +static const u32 volcano_vdec_output_properties_av1[] = { + HFI_PROP_WORST_COMPRESSION_RATIO, + HFI_PROP_WORST_COMPLEXITY_FACTOR, + HFI_PROP_PICTURE_TYPE, + HFI_PROP_FENCE, +}; + +static struct msm_vidc_efuse_data efuse_data_volcano[] = { + /* IRIS_DISABLE_AV1, SKU VERSION: 1 */ + EFUSE_ENTRY(0x221C8118, 4, 0x2000, 0xD, SKU_VERSION), +}; + +static const struct msm_vidc_platform_data volcano_data_v0 = { + /* resources dependent on other module */ + .bw_tbl = volcano_bw_table, + .bw_tbl_size = ARRAY_SIZE(volcano_bw_table), + .regulator_tbl = volcano_regulator_table, + .regulator_tbl_size = ARRAY_SIZE(volcano_regulator_table), + .clk_tbl = volcano_clk_table, + .clk_tbl_size = ARRAY_SIZE(volcano_clk_table), + .clk_rst_tbl = volcano_clk_reset_table, + .clk_rst_tbl_size = ARRAY_SIZE(volcano_clk_reset_table), + .subcache_tbl = volcano_subcache_table, + .subcache_tbl_size = ARRAY_SIZE(volcano_subcache_table), + + /* populate context bank */ + .context_bank_tbl = volcano_context_bank_table, + .context_bank_tbl_size = ARRAY_SIZE(volcano_context_bank_table), + + /* platform specific resources */ + .freq_tbl = volcano_freq_table_sku0, + .freq_tbl_size = ARRAY_SIZE(volcano_freq_table_sku0), + .reg_prst_tbl = volcano_reg_preset_table, + .reg_prst_tbl_size = ARRAY_SIZE(volcano_reg_preset_table), + .dev_reg_tbl = volcano_device_region_table, + .dev_reg_tbl_size = ARRAY_SIZE(volcano_device_region_table), + .fwname = "vpu20_4v", + .pas_id = 9, + .supports_mmrm = 0, + .vpu_ver = VPU_VERSION_IRIS2_2PIPE, + + /* caps related resorces */ + .core_data = core_data_volcano_v0, + .core_data_size = ARRAY_SIZE(core_data_volcano_v0), + .inst_cap_data = instance_cap_data_volcano_v0, + .inst_cap_data_size = ARRAY_SIZE(instance_cap_data_volcano_v0), + .inst_cap_dependency_data = instance_cap_dependency_data_volcano_v0, + .inst_cap_dependency_data_size = ARRAY_SIZE(instance_cap_dependency_data_volcano_v0), + .csc_data.vpe_csc_custom_bias_coeff = vpe_csc_custom_bias_coeff, + .csc_data.vpe_csc_custom_matrix_coeff = vpe_csc_custom_matrix_coeff, + .csc_data.vpe_csc_custom_limit_coeff = vpe_csc_custom_limit_coeff, + .ubwc_config = ubwc_config_volcano, + .format_data = &format_data_volcano, + + /* decoder properties related*/ + .psc_avc_tbl = volcano_vdec_psc_avc, + .psc_avc_tbl_size = ARRAY_SIZE(volcano_vdec_psc_avc), + .psc_hevc_tbl = volcano_vdec_psc_hevc, + .psc_hevc_tbl_size = ARRAY_SIZE(volcano_vdec_psc_hevc), + .psc_vp9_tbl = volcano_vdec_psc_vp9, + .psc_vp9_tbl_size = ARRAY_SIZE(volcano_vdec_psc_vp9), + .psc_av1_tbl = volcano_vdec_psc_av1, + .psc_av1_tbl_size = ARRAY_SIZE(volcano_vdec_psc_av1), + .dec_input_prop_avc = volcano_vdec_input_properties_avc, + .dec_input_prop_hevc = volcano_vdec_input_properties_hevc, + .dec_input_prop_vp9 = volcano_vdec_input_properties_vp9, + .dec_input_prop_av1 = volcano_vdec_input_properties_av1, + .dec_input_prop_size_avc = ARRAY_SIZE(volcano_vdec_input_properties_avc), + .dec_input_prop_size_hevc = ARRAY_SIZE(volcano_vdec_input_properties_hevc), + .dec_input_prop_size_vp9 = ARRAY_SIZE(volcano_vdec_input_properties_vp9), + .dec_input_prop_size_av1 = ARRAY_SIZE(volcano_vdec_input_properties_av1), + .dec_output_prop_avc = volcano_vdec_output_properties_avc, + .dec_output_prop_hevc = volcano_vdec_output_properties_hevc, + .dec_output_prop_vp9 = volcano_vdec_output_properties_vp9, + .dec_output_prop_av1 = volcano_vdec_output_properties_av1, + .dec_output_prop_size_avc = ARRAY_SIZE(volcano_vdec_output_properties_avc), + .dec_output_prop_size_hevc = ARRAY_SIZE(volcano_vdec_output_properties_hevc), + .dec_output_prop_size_vp9 = ARRAY_SIZE(volcano_vdec_output_properties_vp9), + .dec_output_prop_size_av1 = ARRAY_SIZE(volcano_vdec_output_properties_av1), + + /* Fuse specific resources */ + .efuse_data = efuse_data_volcano, + .efuse_data_size = ARRAY_SIZE(efuse_data_volcano), + .sku_version = SKU_VERSION_0, +}; + +static const struct msm_vidc_platform_data volcano_data_v1 = { + /* resources dependent on other module */ + .bw_tbl = volcano_bw_table, + .bw_tbl_size = ARRAY_SIZE(volcano_bw_table), + .regulator_tbl = volcano_regulator_table, + .regulator_tbl_size = ARRAY_SIZE(volcano_regulator_table), + .clk_tbl = volcano_clk_table, + .clk_tbl_size = ARRAY_SIZE(volcano_clk_table), + .clk_rst_tbl = volcano_clk_reset_table, + .clk_rst_tbl_size = ARRAY_SIZE(volcano_clk_reset_table), + .subcache_tbl = volcano_subcache_table, + .subcache_tbl_size = ARRAY_SIZE(volcano_subcache_table), + + /* populate context bank */ + .context_bank_tbl = volcano_context_bank_table, + .context_bank_tbl_size = ARRAY_SIZE(volcano_context_bank_table), + + /* platform specific resources */ + .freq_tbl = volcano_freq_table_sku1, + .freq_tbl_size = ARRAY_SIZE(volcano_freq_table_sku1), + .reg_prst_tbl = volcano_reg_preset_table, + .reg_prst_tbl_size = ARRAY_SIZE(volcano_reg_preset_table), + .dev_reg_tbl = volcano_device_region_table, + .dev_reg_tbl_size = ARRAY_SIZE(volcano_device_region_table), + .fwname = "vpu20_4v", + .pas_id = 9, + .supports_mmrm = 0, + + /* caps related resorces */ + .core_data = core_data_volcano_v1, + .core_data_size = ARRAY_SIZE(core_data_volcano_v1), + .inst_cap_data = instance_cap_data_volcano_v1, + .inst_cap_data_size = ARRAY_SIZE(instance_cap_data_volcano_v1), + .inst_cap_dependency_data = instance_cap_dependency_data_volcano_v1, + .inst_cap_dependency_data_size = ARRAY_SIZE(instance_cap_dependency_data_volcano_v1), + .csc_data.vpe_csc_custom_bias_coeff = vpe_csc_custom_bias_coeff, + .csc_data.vpe_csc_custom_matrix_coeff = vpe_csc_custom_matrix_coeff, + .csc_data.vpe_csc_custom_limit_coeff = vpe_csc_custom_limit_coeff, + .ubwc_config = ubwc_config_volcano, + .format_data = &format_data_volcano, + .vpu_ver = VPU_VERSION_IRIS2_2PIPE, + + /* decoder properties related*/ + .psc_avc_tbl = volcano_vdec_psc_avc, + .psc_avc_tbl_size = ARRAY_SIZE(volcano_vdec_psc_avc), + .psc_hevc_tbl = volcano_vdec_psc_hevc, + .psc_hevc_tbl_size = ARRAY_SIZE(volcano_vdec_psc_hevc), + .psc_vp9_tbl = volcano_vdec_psc_vp9, + .psc_vp9_tbl_size = ARRAY_SIZE(volcano_vdec_psc_vp9), + .dec_input_prop_avc = volcano_vdec_input_properties_avc, + .dec_input_prop_hevc = volcano_vdec_input_properties_hevc, + .dec_input_prop_vp9 = volcano_vdec_input_properties_vp9, + .dec_input_prop_size_avc = ARRAY_SIZE(volcano_vdec_input_properties_avc), + .dec_input_prop_size_hevc = ARRAY_SIZE(volcano_vdec_input_properties_hevc), + .dec_input_prop_size_vp9 = ARRAY_SIZE(volcano_vdec_input_properties_vp9), + .dec_output_prop_avc = volcano_vdec_output_properties_avc, + .dec_output_prop_hevc = volcano_vdec_output_properties_hevc, + .dec_output_prop_vp9 = volcano_vdec_output_properties_vp9, + .dec_output_prop_size_avc = ARRAY_SIZE(volcano_vdec_output_properties_avc), + .dec_output_prop_size_hevc = ARRAY_SIZE(volcano_vdec_output_properties_hevc), + .dec_output_prop_size_vp9 = ARRAY_SIZE(volcano_vdec_output_properties_vp9), + + /* Fuse specific resources */ + .efuse_data = efuse_data_volcano, + .efuse_data_size = ARRAY_SIZE(efuse_data_volcano), + .sku_version = SKU_VERSION_1, +}; + +int msm_vidc_volcano_check_ddr_type(void) +{ + u32 ddr_type; + + ddr_type = of_fdt_get_ddrtype(); + if (ddr_type != DDR_TYPE_LPDDR5 && + ddr_type != DDR_TYPE_LPDDR5X) { + d_vpr_e("%s: wrong ddr type %d\n", __func__, ddr_type); + return -EINVAL; + } + + d_vpr_h("%s: ddr type %d\n", __func__, ddr_type); + return 0; +} + +static int msm_vidc_init_data(struct msm_vidc_core *core) +{ + struct device *dev = NULL; + int rc = 0; + + dev = &core->pdev->dev; + + d_vpr_h("%s: initialize volcano data\n", __func__); + + core->platform->data = volcano_data_v0; + + /* Check for sku version */ + rc = msm_vidc_read_efuse(core); + if (rc) { + d_vpr_e("%s: Failed to read efuse\n", __func__); + return rc; + } + + if (core->platform->data.sku_version == SKU_VERSION_1) + core->platform->data = volcano_data_v1; + + core->mem_ops = get_mem_ops_ext(); + if (!core->mem_ops) { + d_vpr_e("%s: invalid memory ext ops\n", __func__); + return -EINVAL; + } + core->res_ops = get_res_ops_ext(); + if (!core->res_ops) { + d_vpr_e("%s: invalid resource ext ops\n", __func__); + return -EINVAL; + } + core->fence_ops = get_synx_fence_ops(); + if (!core->fence_ops) { + d_vpr_e("%s: invalid synx fence ops\n", __func__); + return -EINVAL; + } + + rc = msm_vidc_volcano_check_ddr_type(); + if (rc) + return rc; + + return rc; +} + +int msm_vidc_init_platform_volcano(struct msm_vidc_core *core) +{ + int rc = 0; + + rc = msm_vidc_init_data(core); + if (rc) + return rc; + + return 0; +} diff --git a/driver/variant/iris2/inc/msm_vidc_iris2.h b/driver/variant/iris2/inc/msm_vidc_iris2.h index 28a899e7c9..11b8008415 100644 --- a/driver/variant/iris2/inc/msm_vidc_iris2.h +++ b/driver/variant/iris2/inc/msm_vidc_iris2.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. - * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. */ #ifndef _MSM_VIDC_IRIS2_H_ @@ -9,7 +9,7 @@ #include "msm_vidc_core.h" -#if defined(CONFIG_MSM_VIDC_WAIPIO) +#if defined(CONFIG_MSM_VIDC_VOLCANO) int msm_vidc_init_iris2(struct msm_vidc_core *core); int msm_vidc_adjust_blur_type_iris2(void *instance, struct v4l2_ctrl *ctrl); #else diff --git a/driver/vidc/src/msm_vidc_probe.c b/driver/vidc/src/msm_vidc_probe.c index a217aad286..a3577e7ab7 100644 --- a/driver/vidc/src/msm_vidc_probe.c +++ b/driver/vidc/src/msm_vidc_probe.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2020-2022, The Linux Foundation. All rights reserved. - * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. */ #include @@ -45,7 +45,8 @@ static inline bool is_video_device(struct device *dev) of_device_is_compatible(dev->of_node, "qcom,sm8550-vidc-v2") || of_device_is_compatible(dev->of_node, "qcom,sm8650-vidc") || of_device_is_compatible(dev->of_node, "qcom,sm8650-vidc-v2") || - of_device_is_compatible(dev->of_node, "qcom,cliffs-vidc")); + of_device_is_compatible(dev->of_node, "qcom,cliffs-vidc") || + of_device_is_compatible(dev->of_node, "qcom,volcano-vidc")); } static inline bool is_video_context_bank_device_node(struct device_node *of_node) @@ -123,6 +124,7 @@ static const struct of_device_id msm_vidc_dt_match[] = { {.compatible = "qcom,sm8650-vidc"}, {.compatible = "qcom,sm8650-vidc-v2"}, {.compatible = "qcom,cliffs-vidc"}, + {.compatible = "qcom,volcano-vidc"}, {.compatible = "qcom,vidc,cb-ns-pxl"}, {.compatible = "qcom,vidc,cb-ns"}, {.compatible = "qcom,vidc,cb-sec-non-pxl"}, diff --git a/msm_video/Kbuild b/msm_video/Kbuild index 03fdd51c7b..7793785822 100644 --- a/msm_video/Kbuild +++ b/msm_video/Kbuild @@ -9,6 +9,11 @@ include $(VIDEO_ROOT)/config/pineapple_video.conf LINUXINCLUDE += -include $(VIDEO_ROOT)/config/pineapple_video.h endif +ifeq ($(CONFIG_ARCH_VOLCANO), y) +include $(VIDEO_ROOT)/config/volcano_video.conf +LINUXINCLUDE += -include $(VIDEO_ROOT)/config/volcano_video.h +endif + ifeq ($(CONFIG_ARCH_KALAMA), y) include $(VIDEO_ROOT)/config/kalama_video.conf LINUXINCLUDE += -include $(VIDEO_ROOT)/config/kalama_video.h @@ -23,6 +28,10 @@ ifeq ($(CONFIG_MSM_VIDC_KALAMA), y) LINUXINCLUDE += -I$(VIDEO_DRIVER_ABS_PATH)/platform/kalama/inc \ -I$(VIDEO_DRIVER_ABS_PATH)/variant/iris3/inc endif +ifeq ($(CONFIG_MSM_VIDC_VOLCANO), y) +LINUXINCLUDE += -I$(VIDEO_DRIVER_ABS_PATH)/platform/volcano/inc \ + -I$(VIDEO_DRIVER_ABS_PATH)/variant/iris2/inc +endif LINUXINCLUDE += -I$(VIDEO_DRIVER_ABS_PATH)/platform/common/inc \ -I$(VIDEO_DRIVER_ABS_PATH)/variant/common/inc \ -I$(VIDEO_DRIVER_ABS_PATH)/vidc/inc \ @@ -53,6 +62,12 @@ msm_video-objs += $(VIDEO_DRIVER_REL_PATH)/platform/kalama/src/msm_vidc_kalama.o $(VIDEO_DRIVER_REL_PATH)/variant/iris3/src/msm_vidc_clock_iris3.o \ $(VIDEO_DRIVER_REL_PATH)/variant/iris3/src/msm_vidc_iris3.o endif +ifeq ($(CONFIG_MSM_VIDC_VOLCANO), y) +msm_video-objs += $(VIDEO_DRIVER_REL_PATH)/variant/iris2/src/msm_vidc_buffer_iris2.o \ + $(VIDEO_DRIVER_REL_PATH)/variant/iris2/src/msm_vidc_iris2.o \ + $(VIDEO_DRIVER_REL_PATH)/variant/iris2/src/msm_vidc_power_iris2.o \ + $(VIDEO_DRIVER_REL_PATH)/platform/volcano/src/msm_vidc_volcano.o +endif msm_video-objs += $(VIDEO_DRIVER_REL_PATH)/platform/common/src/msm_vidc_platform.o \ $(VIDEO_DRIVER_REL_PATH)/platform/common/src/msm_vidc_platform_ext.o \ $(VIDEO_DRIVER_REL_PATH)/variant/common/src/msm_vidc_variant.o \ diff --git a/target.bzl b/target.bzl index 5e76380980..b6d5562d11 100644 --- a/target.bzl +++ b/target.bzl @@ -12,4 +12,16 @@ def define_pineapple(): config_options = [ "CONFIG_MSM_VIDC_PINEAPPLE", ], + ) + +def define_volcano(): + define_consolidate_gki_modules( + target = "volcano", + registry = video_driver_modules, + modules = [ + "msm_video", + ], + config_options = [ + "CONFIG_MSM_VIDC_VOLCANO", + ], ) \ No newline at end of file diff --git a/video_modules.bzl b/video_modules.bzl index 0d8d330d0a..3ed04acff9 100644 --- a/video_modules.bzl +++ b/video_modules.bzl @@ -44,6 +44,12 @@ module_entry( "driver/platform/pineapple/src/msm_vidc_pineapple.c", "driver/platform/cliffs/src/msm_vidc_cliffs.c", ], + "CONFIG_MSM_VIDC_VOLCANO" : [ + "driver/variant/iris2/src/msm_vidc_buffer_iris2.c", + "driver/variant/iris2/src/msm_vidc_iris2.c", + "driver/variant/iris2/src/msm_vidc_power_iris2.c", + "driver/platform/volcano/src/msm_vidc_volcano.c", + ], }, deps = [ "//vendor/qcom/opensource/mm-drivers:mm_drivers_headers", From ef642b7f368609d33d82ec0a7c6f8c0cd22228d5 Mon Sep 17 00:00:00 2001 From: Megha Byahatti Date: Wed, 24 Jan 2024 16:42:49 +0530 Subject: [PATCH 1025/1061] video: driver: Update Max_MBPS for cliffs According to PDM request updating specification support for 4k60 and UHD120 for HEVC andH264. Due to this MAX_MBPS value changes as max load will be 1080p@480fps=3916800. For AV1 and VP9 max support is 4k60. Change-Id: I02eb0842388880b3c67a75b948816b80be11c6cb Signed-off-by: Megha Byahatti --- driver/platform/cliffs/src/msm_vidc_cliffs.c | 32 +++++++++----------- 1 file changed, 14 insertions(+), 18 deletions(-) diff --git a/driver/platform/cliffs/src/msm_vidc_cliffs.c b/driver/platform/cliffs/src/msm_vidc_cliffs.c index ef4b87e879..09a4ee5ac3 100644 --- a/driver/platform/cliffs/src/msm_vidc_cliffs.c +++ b/driver/platform/cliffs/src/msm_vidc_cliffs.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2020-2022, The Linux Foundation. All rights reserved. - * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved. */ #include @@ -316,11 +316,11 @@ static struct msm_platform_core_capability core_data_cliffs_v0[] = { {MAX_NUM_4K_SESSIONS, 4}, {MAX_NUM_8K_SESSIONS, 1}, {MAX_SECURE_SESSION_COUNT, 3}, - {MAX_RT_MBPF, 139264}, /* (4 * ((4096*2176)/256)) */ + {MAX_RT_MBPF, 129600}, /* ((7680*4320)/256)) */ {MAX_MBPF, 139264}, /* (4 * ((4096*2176)/256)) */ - /* max_load 4096x2176@120fps which is greater than 7680x4320@30fps */ + /* max_load 1920x1080@480fps which is greater than 7680x4320@30fps */ /* Concurrency: UHD@30 decode + uhd@30 encode */ - {MAX_MBPS, 4177920}, + {MAX_MBPS, 3916800}, {MAX_IMAGE_MBPF, 1048576}, /* (16384x16384)/256 */ {MAX_MBPF_HQ, 8160}, /* ((1920x1088)/256) */ {MAX_MBPS_HQ, 244800}, /* ((1920x1088)/256)@30fps */ @@ -403,7 +403,7 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v0[] = { {FRAME_WIDTH, DEC, CODECS_ALL_V0, 96, 7680, 1, 1920}, - {FRAME_WIDTH, DEC, VP9, 96, 4096, 1, 1920}, + {FRAME_WIDTH, DEC, VP9 | AV1, 96, 4096, 1, 1920}, {FRAME_WIDTH, ENC, CODECS_ALL_V0, 128, 4096, 1, 1920}, @@ -423,7 +423,7 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v0[] = { {FRAME_HEIGHT, DEC, CODECS_ALL_V0, 96, 7680, 1, 1080}, - {FRAME_HEIGHT, DEC, VP9, 96, 4096, 1, 1080}, + {FRAME_HEIGHT, DEC, VP9 | AV1, 96, 4096, 1, 1080}, {FRAME_HEIGHT, ENC, CODECS_ALL_V0, 128, 4096, 1, 1080}, @@ -494,8 +494,8 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v0[] = { /* (4 * ((4096 * 2176)/256) */ {MBPF, DEC, CODECS_ALL_V0, 36, 139264, 1, 139264}, - /* (4096 * 2176) / 256 */ - {MBPF, DEC, VP9, 36, 34816, 1, 34816}, + /* (4096 * 2160) / 256 */ + {MBPF, DEC, VP9 | AV1, 36, 34560, 1, 34560}, /* ((8192x8192)/256) */ {MBPF, DEC, HEIC, 64, 262144, 1, 262144 }, @@ -1426,7 +1426,7 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v0[] = { {LEVEL, DEC, VP9, V4L2_MPEG_VIDEO_VP9_LEVEL_1_0, - V4L2_MPEG_VIDEO_VP9_LEVEL_5_2, + V4L2_MPEG_VIDEO_VP9_LEVEL_5_1, BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_1_0) | BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_1_1) | BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_2_0) | @@ -1436,16 +1436,15 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v0[] = { BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_4_0) | BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_4_1) | BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_0) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_1) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_2), - V4L2_MPEG_VIDEO_VP9_LEVEL_5_2, + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_1), + V4L2_MPEG_VIDEO_VP9_LEVEL_5_1, V4L2_CID_MPEG_VIDEO_VP9_LEVEL, HFI_PROP_LEVEL, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, {LEVEL, DEC, AV1, V4L2_MPEG_VIDC_AV1_LEVEL_2_0, - V4L2_MPEG_VIDC_AV1_LEVEL_6_0, + V4L2_MPEG_VIDC_AV1_LEVEL_5_1, BIT(V4L2_MPEG_VIDC_AV1_LEVEL_2_0) | BIT(V4L2_MPEG_VIDC_AV1_LEVEL_2_1) | BIT(V4L2_MPEG_VIDC_AV1_LEVEL_2_2) | @@ -1459,11 +1458,8 @@ static struct msm_platform_inst_capability instance_cap_data_cliffs_v0[] = { BIT(V4L2_MPEG_VIDC_AV1_LEVEL_4_2) | BIT(V4L2_MPEG_VIDC_AV1_LEVEL_4_3) | BIT(V4L2_MPEG_VIDC_AV1_LEVEL_5_0) | - BIT(V4L2_MPEG_VIDC_AV1_LEVEL_5_1) | - BIT(V4L2_MPEG_VIDC_AV1_LEVEL_5_2) | - BIT(V4L2_MPEG_VIDC_AV1_LEVEL_5_3) | - BIT(V4L2_MPEG_VIDC_AV1_LEVEL_6_0), - V4L2_MPEG_VIDC_AV1_LEVEL_6_0, + BIT(V4L2_MPEG_VIDC_AV1_LEVEL_5_1), + V4L2_MPEG_VIDC_AV1_LEVEL_5_1, V4L2_CID_MPEG_VIDC_AV1_LEVEL, HFI_PROP_LEVEL, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, From b10a25e7c7d244bc2c73afe3b4ecc119331333dd Mon Sep 17 00:00:00 2001 From: Rajathi S Date: Mon, 4 Mar 2024 19:39:28 +0530 Subject: [PATCH 1026/1061] Video: Driver: Updated clocks for iris2 volcano configuration - Updated Clocks for iris2 volcano configuration Change-Id: I6fb6c926949c86c5ff84617bf32f6be54771f4bc Signed-off-by: Rajathi S --- driver/variant/iris2/src/msm_vidc_iris2.c | 24 +++++++++++------------ 1 file changed, 12 insertions(+), 12 deletions(-) diff --git a/driver/variant/iris2/src/msm_vidc_iris2.c b/driver/variant/iris2/src/msm_vidc_iris2.c index 4709e1c598..d4dd19a125 100644 --- a/driver/variant/iris2/src/msm_vidc_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_iris2.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. - * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. */ #include "msm_vidc_iris2.h" #include "msm_vidc_buffer_iris2.h" @@ -315,9 +315,9 @@ disable_power: d_vpr_e("%s: disable regulator vcodec failed\n", __func__); rc = 0; } - rc = call_res_op(core, clk_disable, core, "vcodec_clk"); + rc = call_res_op(core, clk_disable, core, "video_cc_mvs0_clk"); if (rc) { - d_vpr_e("%s: disable unprepare vcodec_clk failed\n", __func__); + d_vpr_e("%s: disable unprepare video_cc_mvs0_clk failed\n", __func__); rc = 0; } @@ -368,16 +368,16 @@ static int __power_off_iris2_controller(struct msm_vidc_core *core) d_vpr_h("%s: debug bridge release failed\n", __func__); /* Turn off MVP MVS0C core clock */ - rc = call_res_op(core, clk_disable, core, "core_clk"); + rc = call_res_op(core, clk_disable, core, "video_cc_mvs0c_clk"); if (rc) { - d_vpr_e("%s: disable unprepare core_clk failed\n", __func__); + d_vpr_e("%s: disable unprepare video_cc_mvs0c_clk failed\n", __func__); rc = 0; } - /* Disable GCC_VIDEO_AXI0_CLK clock */ - rc = call_res_op(core, clk_disable, core, "gcc_video_axi0"); + /* Disable gcc_video_axi0_clk clock */ + rc = call_res_op(core, clk_disable, core, "gcc_video_axi0_clk"); if (rc) { - d_vpr_e("%s: disable unprepare gcc_video_axi0 failed\n", __func__); + d_vpr_e("%s: disable unprepare gcc_video_axi0_clk failed\n", __func__); rc = 0; } @@ -442,18 +442,18 @@ static int __power_on_iris2_controller(struct msm_vidc_core *core) if (rc) goto fail_reset_ahb2axi; - rc = call_res_op(core, clk_enable, core, "gcc_video_axi0"); + rc = call_res_op(core, clk_enable, core, "gcc_video_axi0_clk"); if (rc) goto fail_clk_axi; - rc = call_res_op(core, clk_enable, core, "core_clk"); + rc = call_res_op(core, clk_enable, core, "video_cc_mvs0c_clk"); if (rc) goto fail_clk_controller; return 0; fail_clk_controller: - call_res_op(core, clk_disable, core, "gcc_video_axi0"); + call_res_op(core, clk_disable, core, "gcc_video_axi0_clk"); fail_clk_axi: fail_reset_ahb2axi: call_res_op(core, gdsc_off, core, "iris-ctl"); @@ -469,7 +469,7 @@ static int __power_on_iris2_hardware(struct msm_vidc_core *core) if (rc) goto fail_regulator; - rc = call_res_op(core, clk_enable, core, "vcodec_clk"); + rc = call_res_op(core, clk_enable, core, "video_cc_mvs0_clk"); if (rc) goto fail_clk_controller; From 7464e3fdda713ec951bd10cc367a290def605a40 Mon Sep 17 00:00:00 2001 From: Rajathi S Date: Fri, 8 Mar 2024 11:12:42 +0530 Subject: [PATCH 1027/1061] Video: Driver: Add support for volcano upstream - Add support for upstream folder for volcano Change-Id: Ia61c11bbeaf7d3c7d5848dfcb808998a67ddc328 Signed-off-by: Rajathi S --- driver/platform/volcano/src/volcano.c | 1691 +++++++++++++++++++++++++ video/Kbuild | 11 + video_modules.bzl | 6 + 3 files changed, 1708 insertions(+) create mode 100644 driver/platform/volcano/src/volcano.c diff --git a/driver/platform/volcano/src/volcano.c b/driver/platform/volcano/src/volcano.c new file mode 100644 index 0000000000..345efebcb3 --- /dev/null +++ b/driver/platform/volcano/src/volcano.c @@ -0,0 +1,1691 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2020-2022, The Linux Foundation. All rights reserved. + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include + +#include "msm_vidc_control.h" +#include "msm_vidc_volcano.h" +#include "msm_vidc_platform.h" +#include "msm_vidc_debug.h" +#include "msm_vidc_iris2.h" +#include "hfi_property.h" +#include "hfi_command.h" +#include "venus_hfi.h" + +/* version: major[24:31], minor[16:23], revision[0:15] */ +#define DRIVER_VERSION 0x04000000 +#define DEFAULT_VIDEO_CONCEAL_COLOR_BLACK 0x8020010 +#define MAX_BASE_LAYER_PRIORITY_ID 63 +#define MAX_OP_POINT 31 +#define MAX_BITRATE 160000000 +#define MAX_BITRATE_V1 100000000 +#define DEFAULT_BITRATE 20000000 +#define MINIMUM_FPS 1 +#define MAXIMUM_FPS 480 +#define MAX_QP 51 +#define DEFAULT_QP 20 +#define MAX_CONSTANT_QUALITY 100 +#define MIN_SLICE_BYTE_SIZE 512 +#define MAX_SLICE_BYTE_SIZE \ + ((MAX_BITRATE) >> 3) +#define MAX_SLICE_BYTE_SIZE_V1 \ + ((MAX_BITRATE_V1) >> 3) +#define MAX_SLICE_MB_SIZE \ + (((4096 + 15) >> 4) * ((2160 + 15) >> 4)) +#define MAX_LTR_FRAME_COUNT 2 + +#define ENC MSM_VIDC_ENCODER +#define DEC MSM_VIDC_DECODER +#define H264 MSM_VIDC_H264 +#define HEVC MSM_VIDC_HEVC +#define VP9 MSM_VIDC_VP9 +#define HEIC MSM_VIDC_HEIC +#define CODECS_ALL (H264 | HEVC | VP9 | HEIC) +#define MAXIMUM_OVERRIDE_VP9_FPS 200 + +#ifndef V4L2_PIX_FMT_QC08C +#define V4L2_PIX_FMT_QC08C v4l2_fourcc('Q', '0', '8', 'C') +#endif + +#ifndef V4L2_PIX_FMT_QC10C +#define V4L2_PIX_FMT_QC10C v4l2_fourcc('Q', '1', '0', 'C') +#endif + +static struct codec_info codec_data_volcano[] = { + { + .v4l2_codec = V4L2_PIX_FMT_H264, + .vidc_codec = MSM_VIDC_H264, + .pixfmt_name = "AVC", + }, + { + .v4l2_codec = V4L2_PIX_FMT_HEVC, + .vidc_codec = MSM_VIDC_HEVC, + .pixfmt_name = "HEVC", + }, + { + .v4l2_codec = V4L2_PIX_FMT_VP9, + .vidc_codec = MSM_VIDC_VP9, + .pixfmt_name = "VP9", + }, +}; + +static struct color_format_info color_format_data_volcano[] = { + { + .v4l2_color_format = V4L2_PIX_FMT_NV12, + .vidc_color_format = MSM_VIDC_FMT_NV12, + .pixfmt_name = "NV12", + }, + { + .v4l2_color_format = V4L2_PIX_FMT_NV21, + .vidc_color_format = MSM_VIDC_FMT_NV21, + .pixfmt_name = "NV21", + }, + { + .v4l2_color_format = V4L2_PIX_FMT_QC08C, + .vidc_color_format = MSM_VIDC_FMT_NV12C, + .pixfmt_name = "NV12C", + }, + { + .v4l2_color_format = V4L2_PIX_FMT_QC10C, + .vidc_color_format = MSM_VIDC_FMT_TP10C, + .pixfmt_name = "TP10C", + }, + { + .v4l2_color_format = V4L2_PIX_FMT_RGBA32, + .vidc_color_format = MSM_VIDC_FMT_RGBA8888, + .pixfmt_name = "RGBA", + }, +}; + +static struct color_primaries_info color_primaries_data_volcano[] = { + { + .v4l2_color_primaries = V4L2_COLORSPACE_DEFAULT, + .vidc_color_primaries = MSM_VIDC_PRIMARIES_RESERVED, + }, + { + .v4l2_color_primaries = V4L2_COLORSPACE_REC709, + .vidc_color_primaries = MSM_VIDC_PRIMARIES_BT709, + }, + { + .v4l2_color_primaries = V4L2_COLORSPACE_470_SYSTEM_M, + .vidc_color_primaries = MSM_VIDC_PRIMARIES_BT470_SYSTEM_M, + }, + { + .v4l2_color_primaries = V4L2_COLORSPACE_470_SYSTEM_BG, + .vidc_color_primaries = MSM_VIDC_PRIMARIES_BT470_SYSTEM_BG, + }, + { + .v4l2_color_primaries = V4L2_COLORSPACE_SMPTE170M, + .vidc_color_primaries = MSM_VIDC_PRIMARIES_BT601_525, + }, + { + .v4l2_color_primaries = V4L2_COLORSPACE_SMPTE240M, + .vidc_color_primaries = MSM_VIDC_PRIMARIES_SMPTE_ST240M, + }, + { + .v4l2_color_primaries = V4L2_COLORSPACE_BT2020, + .vidc_color_primaries = MSM_VIDC_PRIMARIES_BT2020, + }, + { + .v4l2_color_primaries = V4L2_COLORSPACE_DCI_P3, + .vidc_color_primaries = MSM_VIDC_PRIMARIES_SMPTE_RP431_2, + }, +}; + +static struct transfer_char_info transfer_char_data_volcano[] = { + { + .v4l2_transfer_char = V4L2_XFER_FUNC_DEFAULT, + .vidc_transfer_char = MSM_VIDC_TRANSFER_RESERVED, + }, + { + .v4l2_transfer_char = V4L2_XFER_FUNC_709, + .vidc_transfer_char = MSM_VIDC_TRANSFER_BT709, + }, + { + .v4l2_transfer_char = V4L2_XFER_FUNC_SMPTE240M, + .vidc_transfer_char = MSM_VIDC_TRANSFER_SMPTE_ST240M, + }, + { + .v4l2_transfer_char = V4L2_XFER_FUNC_SRGB, + .vidc_transfer_char = MSM_VIDC_TRANSFER_SRGB_SYCC, + }, + { + .v4l2_transfer_char = V4L2_XFER_FUNC_SMPTE2084, + .vidc_transfer_char = MSM_VIDC_TRANSFER_SMPTE_ST2084_PQ, + }, +}; + +static struct matrix_coeff_info matrix_coeff_data_volcano[] = { + { + .v4l2_matrix_coeff = V4L2_YCBCR_ENC_DEFAULT, + .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_RESERVED, + }, + { + .v4l2_matrix_coeff = V4L2_YCBCR_ENC_709, + .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_BT709, + }, + { + .v4l2_matrix_coeff = V4L2_YCBCR_ENC_XV709, + .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_BT709, + }, + { + .v4l2_matrix_coeff = V4L2_YCBCR_ENC_XV601, + .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_BT470_SYS_BG_OR_BT601_625, + }, + { + .v4l2_matrix_coeff = V4L2_YCBCR_ENC_601, + .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_BT601_525_BT1358_525_OR_625, + }, + { + .v4l2_matrix_coeff = V4L2_YCBCR_ENC_SMPTE240M, + .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_SMPTE_ST240, + }, + { + .v4l2_matrix_coeff = V4L2_YCBCR_ENC_BT2020, + .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_BT2020_NON_CONSTANT, + }, + { + .v4l2_matrix_coeff = V4L2_YCBCR_ENC_BT2020_CONST_LUM, + .vidc_matrix_coeff = MSM_VIDC_MATRIX_COEFF_BT2020_CONSTANT, + }, +}; + +static struct msm_platform_core_capability core_data_volcano_v0[] = { + /* {type, value} */ + {ENC_CODECS, H264 | HEVC | HEIC}, + {DEC_CODECS, H264 | HEVC | VP9 | HEIC}, + {MAX_SESSION_COUNT, 16}, + {MAX_NUM_720P_SESSIONS, 16}, + {MAX_NUM_1080P_SESSIONS, 16}, + {MAX_NUM_4K_SESSIONS, 4}, + {MAX_SECURE_SESSION_COUNT, 3}, + {MAX_RT_MBPF, 130560}, /* (4 * ((3840*2176)/256)) */ + {MAX_MBPF, 139264}, /* (4 * ((4096*2176)/256)) */ + /* max_load 3840x2176@120fps*/ + /* Concurrency: UHD@30 decode + UHD@30 encode */ + {MAX_MBPS, 3916800}, + {MAX_IMAGE_MBPF, 1048576}, /* (16384x16384)/256 */ + {MAX_MBPF_HQ, 8160}, /* ((1920x1088)/256) */ + {MAX_MBPS_HQ, 244800}, /* ((1920x1088)/256)@30fps */ + {MAX_MBPF_B_FRAME, 32640}, /* 3840x2176/256 */ + {MAX_MBPS_B_FRAME, 979200}, /* 3840x2176/256 MBs@30fps */ + {MAX_MBPS_ALL_INTRA, 489600}, /* ((1920x1088)/256)@60fps */ + {MAX_ENH_LAYER_COUNT, 5}, + {NUM_VPP_PIPE, 2}, + {SW_PC, 1}, + {FW_UNLOAD, 0}, + {HW_RESPONSE_TIMEOUT, HW_RESPONSE_TIMEOUT_VALUE}, /* 1000 ms */ + {SW_PC_DELAY, SW_PC_DELAY_VALUE }, /* 1500 ms (>HW_RESPONSE_TIMEOUT)*/ + {FW_UNLOAD_DELAY, FW_UNLOAD_DELAY_VALUE }, /* 3000 ms (>SW_PC_DELAY)*/ + {PAGEFAULT_NON_FATAL, 1}, + {PAGETABLE_CACHING, 0}, + {DCVS, 1}, + {DECODE_BATCH, 1}, + {DECODE_BATCH_TIMEOUT, 200}, + {STATS_TIMEOUT_MS, 2000}, + {AV_SYNC_WINDOW_SIZE, 40}, + {NON_FATAL_FAULTS, 1}, + {ENC_AUTO_FRAMERATE, 0}, + {DEVICE_CAPS, V4L2_CAP_VIDEO_M2M_MPLANE | V4L2_CAP_META_CAPTURE | + V4L2_CAP_STREAMING}, + {SUPPORTS_SYNX_FENCE, 1}, + {SUPPORTS_REQUESTS, 0}, +}; + +static struct msm_platform_inst_capability instance_cap_data_volcano_v0[] = { + /* {cap, domain, codec, + * min, max, step_or_mask, value, + * v4l2_id, + * hfi_id, + * flags} + */ + + {FRAME_WIDTH, DEC, CODECS_ALL, 96, 4096, 1, 1920}, + + {FRAME_WIDTH, ENC, CODECS_ALL, 128, 4096, 1, 1920}, + + {FRAME_WIDTH, ENC, HEIC, 128, 16384, 1, 16384}, + + {LOSSLESS_FRAME_WIDTH, ENC, H264|HEVC, 128, 4096, 1, 1920}, + + {SECURE_FRAME_WIDTH, DEC, CODECS_ALL, 96, 4096, 1, 1920}, + + {SECURE_FRAME_WIDTH, ENC, CODECS_ALL, 128, 4096, 1, 1920}, + + {FRAME_HEIGHT, DEC, CODECS_ALL, 96, 4096, 1, 1080}, + + {FRAME_HEIGHT, ENC, CODECS_ALL, 128, 4096, 1, 1080}, + + {FRAME_HEIGHT, ENC, HEIC, 128, 16384, 1, 16384}, + + {LOSSLESS_FRAME_HEIGHT, ENC, CODECS_ALL, 128, 4096, 1, 1080}, + + {SECURE_FRAME_HEIGHT, DEC, CODECS_ALL, 96, 4096, 1, 1080}, + + {SECURE_FRAME_HEIGHT, ENC, CODECS_ALL, 128, 4096, 1, 1080}, + + {PIX_FMTS, ENC | DEC, H264, + MSM_VIDC_FMT_NV12, + MSM_VIDC_FMT_NV12C, + MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C, + MSM_VIDC_FMT_NV12C}, + + {PIX_FMTS, ENC | DEC, HEVC, + MSM_VIDC_FMT_NV12, + MSM_VIDC_FMT_TP10C, + MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C | + MSM_VIDC_FMT_P010 | MSM_VIDC_FMT_TP10C, + MSM_VIDC_FMT_NV12C}, + + {PIX_FMTS, ENC, HEIC, + MSM_VIDC_FMT_NV12, + MSM_VIDC_FMT_P010, + MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_P010, + MSM_VIDC_FMT_NV12}, + + {PIX_FMTS, DEC, HEIC, + MSM_VIDC_FMT_NV12, + MSM_VIDC_FMT_TP10C, + MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C | + MSM_VIDC_FMT_P010 | MSM_VIDC_FMT_TP10C, + MSM_VIDC_FMT_NV12C}, + + {PIX_FMTS, DEC, VP9, + MSM_VIDC_FMT_NV12, + MSM_VIDC_FMT_TP10C, + MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C | + MSM_VIDC_FMT_P010 | MSM_VIDC_FMT_TP10C, + MSM_VIDC_FMT_NV12C}, + + {MIN_BUFFERS_INPUT, ENC | DEC, CODECS_ALL, 0, 64, 1, 4, + V4L2_CID_MIN_BUFFERS_FOR_OUTPUT, + 0, + CAP_FLAG_VOLATILE}, + + {MIN_BUFFERS_INPUT, ENC | DEC, HEIC, 0, 64, 1, 1, + V4L2_CID_MIN_BUFFERS_FOR_OUTPUT, + 0, + CAP_FLAG_VOLATILE}, + + {MIN_BUFFERS_OUTPUT, ENC | DEC, CODECS_ALL, + 0, 64, 1, 4, + V4L2_CID_MIN_BUFFERS_FOR_CAPTURE, + HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_VOLATILE}, + + /* (4096 * 2176) / 256 */ + {MBPF, ENC, CODECS_ALL, 64, 34816, 1, 34816}, + + /* ((16384x16384)/256) */ + {MBPF, ENC, HEIC, 64, 1048576, 1, 1048576}, + + /* (4 * ((4096 * 2176)/256) */ + {MBPF, DEC, CODECS_ALL, 36, 139264, 1, 139264}, + + /* (4096 * 2176) / 256 */ + {MBPF, DEC, VP9, 36, 34816, 1, 34816}, + + /* ((8192x8192)/256) */ + {MBPF, DEC, HEIC, 64, 262144, 1, 262144 }, + + /* (4096 * 2176) / 256 */ + {LOSSLESS_MBPF, ENC, H264 | HEVC, 64, 34816, 1, 34816}, + + /* Batch Mode Decode */ + /* BATCH_MBPF + 2 is done for chipsets other than lanai + * due to timeline constraints since msm_vidc_allow_decode_batch + * has checks to allow batching for less than BATCH_MBPF. + * Same applies for BATCH_FPS. + */ + /* (1920 * 1088) / 256 */ + {BATCH_MBPF, DEC, H264 | HEVC | VP9, 64, 8162, 1, 8162}, + + {BATCH_FPS, DEC, H264 | HEVC | VP9, 1, 61, 1, 61}, + + /* (4096 * 2176) / 256 */ + {SECURE_MBPF, ENC | DEC, H264 | HEVC | VP9, 64, 34816, 1, 34816}, + + {FRAME_RATE, ENC, CODECS_ALL, + (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), + 1, (DEFAULT_FPS << 16), + 0, + HFI_PROP_FRAME_RATE, + CAP_FLAG_OUTPUT_PORT}, + + {OPERATING_RATE, ENC, CODECS_ALL, + (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), + 1, (DEFAULT_FPS << 16)}, + + {INPUT_RATE, ENC | DEC, CODECS_ALL, + (MINIMUM_FPS << 16), INT_MAX, + 1, (DEFAULT_FPS << 16)}, + + {TIMESTAMP_RATE, ENC | DEC, CODECS_ALL, + (MINIMUM_FPS << 16), INT_MAX, + 1, (DEFAULT_FPS << 16)}, + + {SCALE_FACTOR, ENC, H264 | HEVC, 1, 8, 1, 8}, + + {MB_CYCLES_VSP, ENC, CODECS_ALL, 25, 25, 1, 25}, + + {MB_CYCLES_VSP, DEC, CODECS_ALL, 25, 25, 1, 25}, + + {MB_CYCLES_VSP, DEC, VP9, 60, 60, 1, 60}, + + {MB_CYCLES_VPP, ENC, CODECS_ALL, 675, 675, 1, 675}, + + {MB_CYCLES_VPP, DEC, CODECS_ALL, 200, 200, 1, 200}, + + {MB_CYCLES_LP, ENC, CODECS_ALL, 320, 320, 1, 320}, + + {MB_CYCLES_LP, DEC, CODECS_ALL, 200, 200, 1, 200}, + + {MB_CYCLES_FW, ENC | DEC, CODECS_ALL, 326389, 326389, 1, 326389}, + + {MB_CYCLES_FW_VPP, ENC | DEC, CODECS_ALL, 44156, 44156, 1, 44156}, + + {ENC_RING_BUFFER_COUNT, ENC, CODECS_ALL, + 0, 0, 1, 0}, + + {CLIENT_ID, ENC | DEC, CODECS_ALL, + INVALID_CLIENT_ID, INT_MAX, 1, INVALID_CLIENT_ID, + 0}, + + {HFLIP, ENC, CODECS_ALL, + 0, 1, 1, 0, + V4L2_CID_HFLIP, + HFI_PROP_FLIP, + CAP_FLAG_OUTPUT_PORT | + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {VFLIP, ENC, CODECS_ALL, + 0, 1, 1, 0, + V4L2_CID_VFLIP, + HFI_PROP_FLIP, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {ROTATION, ENC, CODECS_ALL, + 0, 270, 90, 0, + V4L2_CID_ROTATE, + HFI_PROP_ROTATION, + CAP_FLAG_OUTPUT_PORT}, + + {SUPER_FRAME, ENC, H264 | HEVC, + 0, 32, 1, 0, + 0, 0, + CAP_FLAG_NONE}, + + {SLICE_DECODE, DEC, CODECS_ALL, + 0, 0, 0, 0, + V4L2_CID_MPEG_VIDEO_DECODER_SLICE_INTERFACE, + 0}, + + {HEADER_MODE, ENC, CODECS_ALL, + V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE, + V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME, + BIT(V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE) | + BIT(V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME), + V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE, + V4L2_CID_MPEG_VIDEO_HEADER_MODE, + HFI_PROP_SEQ_HEADER_MODE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {PREPEND_SPSPPS_TO_IDR, ENC, CODECS_ALL, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDEO_PREPEND_SPSPPS_TO_IDR}, + + {WITHOUT_STARTCODE, ENC, CODECS_ALL, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE, + HFI_PROP_NAL_LENGTH_FIELD, + CAP_FLAG_OUTPUT_PORT}, + + {NAL_LENGTH_FIELD, ENC, CODECS_ALL, + V4L2_MPEG_VIDEO_HEVC_SIZE_0, + V4L2_MPEG_VIDEO_HEVC_SIZE_4, + BIT(V4L2_MPEG_VIDEO_HEVC_SIZE_0) | + BIT(V4L2_MPEG_VIDEO_HEVC_SIZE_4), + V4L2_MPEG_VIDEO_HEVC_SIZE_0, + V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD, + HFI_PROP_NAL_LENGTH_FIELD, + CAP_FLAG_MENU | CAP_FLAG_OUTPUT_PORT}, + + /* TODO: Firmware introduced enumeration type for this + * with and without seq header. + */ + {REQUEST_I_FRAME, ENC, H264 | HEVC, + 0, 0, 0, 0, + V4L2_CID_MPEG_VIDEO_FORCE_KEY_FRAME, + HFI_PROP_REQUEST_SYNC_FRAME, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + /* Enc: Keeping CABAC and CAVLC as same bitrate. + * Dec: there's no use of Bitrate cap + */ + {BIT_RATE, ENC, H264 | HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_BITRATE, + HFI_PROP_TOTAL_BITRATE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {BITRATE_MODE, ENC, H264, + V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, + V4L2_MPEG_VIDEO_BITRATE_MODE_CBR, + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_VBR) | + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CBR), + V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, + V4L2_CID_MPEG_VIDEO_BITRATE_MODE, + HFI_PROP_RATE_CONTROL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {BITRATE_MODE, ENC, HEVC, + V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, + V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_VBR) | + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CBR) | + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CQ), + V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, + V4L2_CID_MPEG_VIDEO_BITRATE_MODE, + HFI_PROP_RATE_CONTROL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {CABAC_MAX_BITRATE, ENC, H264 | HEVC, 0, + 160000000, 1, 160000000}, + + {CAVLC_MAX_BITRATE, ENC, H264, 0, + 160000000, 1, 160000000}, + + {ALLINTRA_MAX_BITRATE, ENC, H264 | HEVC, 0, + 160000000, 1, 160000000}, + + {LOWLATENCY_MAX_BITRATE, ENC, H264 | HEVC, 0, + 70000000, 1, 70000000}, + + {LOSSLESS, ENC, HEVC, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU}, + + {FRAME_SKIP_MODE, ENC, H264 | HEVC | HEIC, + V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED, + V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT, + BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED) | + BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_LEVEL_LIMIT) | + BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT), + V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED, + V4L2_CID_MPEG_VIDEO_FRAME_SKIP_MODE, + 0, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {FRAME_RC_ENABLE, ENC, H264 | HEVC | HEIC, + 0, 1, 1, 1, + V4L2_CID_MPEG_VIDEO_FRAME_RC_ENABLE}, + + {CONSTANT_QUALITY, ENC, HEVC, + 1, MAX_CONSTANT_QUALITY, 1, 90, + V4L2_CID_MPEG_VIDEO_CONSTANT_QUALITY, + HFI_PROP_CONSTANT_QUALITY, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {GOP_SIZE, ENC, CODECS_ALL, + 0, INT_MAX, 1, 2 * DEFAULT_FPS - 1, + V4L2_CID_MPEG_VIDEO_GOP_SIZE, + HFI_PROP_MAX_GOP_FRAMES, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {GOP_CLOSURE, ENC, H264 | HEVC, + 0, 1, 1, 1, + V4L2_CID_MPEG_VIDEO_GOP_CLOSURE, + 0}, + + {B_FRAME, ENC, H264 | HEVC, + 0, 7, 1, 0, + V4L2_CID_MPEG_VIDEO_B_FRAMES, + HFI_PROP_MAX_B_FRAMES, + CAP_FLAG_OUTPUT_PORT}, + + {BLUR_TYPES, ENC, H264 | HEVC, + MSM_VIDC_BLUR_NONE, MSM_VIDC_BLUR_EXTERNAL, + BIT(MSM_VIDC_BLUR_NONE) | BIT(MSM_VIDC_BLUR_EXTERNAL), + MSM_VIDC_BLUR_NONE, + 0, + HFI_PROP_BLUR_TYPES, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {CSC, ENC, CODECS_ALL, + 0, 1, 1, 0, + 0, + HFI_PROP_CSC, + CAP_FLAG_OUTPUT_PORT}, + + {LOWLATENCY_MODE, ENC, H264 | HEVC, + 0, 1, 1, 0, + 0, + 0, + CAP_FLAG_NONE}, + + {LOWLATENCY_MODE, DEC, H264 | HEVC | VP9, + 0, 1, 1, 0, + 0, + HFI_PROP_SEQ_CHANGE_AT_SYNC_FRAME, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {LTR_COUNT, ENC, H264 | HEVC, + 0, MAX_LTR_FRAME_COUNT, 1, 0, + V4L2_CID_MPEG_VIDEO_LTR_COUNT, + HFI_PROP_LTR_COUNT, + CAP_FLAG_OUTPUT_PORT}, + + {USE_LTR, ENC, H264 | HEVC, + 0, + ((1 << MAX_LTR_FRAME_COUNT) - 1), + 0, 0, + V4L2_CID_MPEG_VIDEO_USE_LTR_FRAMES, + HFI_PROP_LTR_USE, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {MARK_LTR, ENC, H264 | HEVC, + INVALID_DEFAULT_MARK_OR_USE_LTR, + (MAX_LTR_FRAME_COUNT - 1), + 1, INVALID_DEFAULT_MARK_OR_USE_LTR, + V4L2_CID_MPEG_VIDEO_FRAME_LTR_INDEX, + HFI_PROP_LTR_MARK, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {BASELAYER_PRIORITY, ENC, H264, + 0, MAX_BASE_LAYER_PRIORITY_ID, 1, 0, + V4L2_CID_MPEG_VIDEO_BASELAYER_PRIORITY_ID, + HFI_PROP_BASELAYER_PRIORITYID, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {AU_DELIMITER, ENC, H264 | HEVC, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDEO_AU_DELIMITER, + HFI_PROP_AUD, + CAP_FLAG_OUTPUT_PORT}, + + {CONTENT_ADAPTIVE_CODING, ENC, H264 | HEVC, + 0, 1, 1, 1, + 0, + HFI_PROP_CONTENT_ADAPTIVE_CODING, + CAP_FLAG_OUTPUT_PORT}, + + {REQUEST_PREPROCESS, ENC, H264 | HEVC, + MSM_VIDC_PREPROCESS_NONE, + MSM_VIDC_PREPROCESS_TYPE0, + BIT(MSM_VIDC_PREPROCESS_NONE) | + BIT(MSM_VIDC_PREPROCESS_TYPE0), + MSM_VIDC_PREPROCESS_NONE, + 0, HFI_PROP_REQUEST_PREPROCESS, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {MIN_QUALITY, ENC, H264 | HEVC, + 0, MAX_SUPPORTED_MIN_QUALITY, 70, MAX_SUPPORTED_MIN_QUALITY, + 0, + HFI_PROP_MAINTAIN_MIN_QUALITY, + CAP_FLAG_OUTPUT_PORT}, + + {VBV_DELAY, ENC, H264 | HEVC, + 200, 300, 100, 300, + V4L2_CID_MPEG_VIDEO_VBV_DELAY, + HFI_PROP_VBV_DELAY, + CAP_FLAG_OUTPUT_PORT}, + + {PEAK_BITRATE, ENC, H264 | HEVC, + /* default peak bitrate is 10% larger than avg bitrate */ + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_BITRATE_PEAK, + HFI_PROP_TOTAL_PEAK_BITRATE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {MIN_FRAME_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, + V4L2_CID_MPEG_VIDEO_H264_MIN_QP, + HFI_PROP_MIN_QP_PACKED, + CAP_FLAG_OUTPUT_PORT}, + + {MIN_FRAME_QP, ENC, HEVC | HEIC, + MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, + V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP, + HFI_PROP_MIN_QP_PACKED, + CAP_FLAG_OUTPUT_PORT}, + + {I_FRAME_MIN_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, + V4L2_CID_MPEG_VIDEO_H264_I_FRAME_MIN_QP}, + + {I_FRAME_MIN_QP, ENC, HEVC | HEIC, + MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, + V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_MIN_QP}, + + {P_FRAME_MIN_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, + V4L2_CID_MPEG_VIDEO_H264_P_FRAME_MIN_QP}, + + {P_FRAME_MIN_QP, ENC, HEVC | HEIC, + MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, + V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_MIN_QP}, + + {B_FRAME_MIN_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, + V4L2_CID_MPEG_VIDEO_H264_B_FRAME_MIN_QP}, + + {B_FRAME_MIN_QP, ENC, HEVC | HEIC, + MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, + V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_MIN_QP}, + + {MAX_FRAME_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_H264_MAX_QP, + HFI_PROP_MAX_QP_PACKED, + CAP_FLAG_OUTPUT_PORT}, + + {MAX_FRAME_QP, ENC, HEVC | HEIC, + MIN_QP_10BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP, + HFI_PROP_MAX_QP_PACKED, + CAP_FLAG_OUTPUT_PORT}, + + {I_FRAME_MAX_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_H264_I_FRAME_MAX_QP}, + + {I_FRAME_MAX_QP, ENC, HEVC | HEIC, + MIN_QP_10BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_MAX_QP}, + + {P_FRAME_MAX_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_H264_P_FRAME_MAX_QP}, + + {P_FRAME_MAX_QP, ENC, HEVC | HEIC, + MIN_QP_10BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_MAX_QP}, + + {B_FRAME_MAX_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_H264_B_FRAME_MAX_QP}, + + {B_FRAME_MAX_QP, ENC, HEVC | HEIC, + MIN_QP_10BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_MAX_QP}, + + {I_FRAME_QP, ENC, HEVC, + MIN_QP_10BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {I_FRAME_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {P_FRAME_QP, ENC, HEVC, + MIN_QP_10BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {P_FRAME_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {B_FRAME_QP, ENC, HEVC, + MIN_QP_10BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {B_FRAME_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_H264_B_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {LAYER_TYPE, ENC, HEVC, + V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B, + V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P, + BIT(V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B) | + BIT(V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P), + V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE, + HFI_PROP_LAYER_ENCODING_TYPE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LAYER_TYPE, ENC, H264, + V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_B, + V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P, + BIT(V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_B) | + BIT(V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P), + V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P, + V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_TYPE, + HFI_PROP_LAYER_ENCODING_TYPE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LAYER_ENABLE, ENC, H264, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING, + HFI_PROP_LAYER_ENCODING_TYPE, + CAP_FLAG_OUTPUT_PORT}, + + {LAYER_ENABLE, ENC, HEVC, + 0, 1, 1, 0, + 0, + 0, + CAP_FLAG_OUTPUT_PORT}, + + {ENH_LAYER_COUNT, ENC, HEVC, + 0, 5, 1, 0, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER, + HFI_PROP_LAYER_COUNT, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {ENH_LAYER_COUNT, ENC, H264, + 0, 5, 1, 0, + V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_LAYER, + HFI_PROP_LAYER_COUNT, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + {L0_BR, ENC, H264, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L0_BR, + HFI_PROP_BITRATE_LAYER1, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L0_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L0_BR, + HFI_PROP_BITRATE_LAYER1, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L1_BR, ENC, H264, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L1_BR, + HFI_PROP_BITRATE_LAYER2, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L1_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L1_BR, + HFI_PROP_BITRATE_LAYER2, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L2_BR, ENC, H264, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L2_BR, + HFI_PROP_BITRATE_LAYER3, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L2_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L2_BR, + HFI_PROP_BITRATE_LAYER3, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L3_BR, ENC, H264, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L3_BR, + HFI_PROP_BITRATE_LAYER4, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + {L3_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L3_BR, + HFI_PROP_BITRATE_LAYER4, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L4_BR, ENC, H264, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L4_BR, + HFI_PROP_BITRATE_LAYER5, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L4_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L4_BR, + HFI_PROP_BITRATE_LAYER5, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L5_BR, ENC, H264, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L5_BR, + HFI_PROP_BITRATE_LAYER6, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L5_BR, ENC, HEVC, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L5_BR, + HFI_PROP_BITRATE_LAYER6, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {ENTROPY_MODE, ENC, H264, + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC, + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, + BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC) | + BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC), + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, + V4L2_CID_MPEG_VIDEO_H264_ENTROPY_MODE, + HFI_PROP_CABAC_SESSION, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {ENTROPY_MODE, DEC, H264 | HEVC | VP9, + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC, + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, + BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC) | + BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC), + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, + 0, + HFI_PROP_CABAC_SESSION}, + + {PROFILE, ENC | DEC, H264, + V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE, + V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH, + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_BASELINE) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_MAIN) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_HIGH), + V4L2_MPEG_VIDEO_H264_PROFILE_HIGH, + V4L2_CID_MPEG_VIDEO_H264_PROFILE, + HFI_PROP_PROFILE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {PROFILE, ENC | DEC, HEVC | HEIC, + V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN, + V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE, + BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN) | + BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE) | + BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10) | + BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE), + V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN, + V4L2_CID_MPEG_VIDEO_HEVC_PROFILE, + HFI_PROP_PROFILE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {PROFILE, DEC, VP9, + V4L2_MPEG_VIDEO_VP9_PROFILE_0, + V4L2_MPEG_VIDEO_VP9_PROFILE_2, + BIT(V4L2_MPEG_VIDEO_VP9_PROFILE_0) | + BIT(V4L2_MPEG_VIDEO_VP9_PROFILE_2), + V4L2_MPEG_VIDEO_VP9_PROFILE_0, + V4L2_CID_MPEG_VIDEO_VP9_PROFILE, + HFI_PROP_PROFILE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LEVEL, ENC, H264, + V4L2_MPEG_VIDEO_H264_LEVEL_1_0, + V4L2_MPEG_VIDEO_H264_LEVEL_6_0, + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1B) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_3) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_0), + V4L2_MPEG_VIDEO_H264_LEVEL_6_0, + V4L2_CID_MPEG_VIDEO_H264_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LEVEL, DEC, HEVC | HEIC, + V4L2_MPEG_VIDEO_HEVC_LEVEL_1, + V4L2_MPEG_VIDEO_HEVC_LEVEL_6, + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6), + V4L2_MPEG_VIDEO_HEVC_LEVEL_6, + V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LEVEL, DEC, VP9, + V4L2_MPEG_VIDEO_VP9_LEVEL_1_0, + V4L2_MPEG_VIDEO_VP9_LEVEL_5_2, + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_1_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_1_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_2_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_3_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_4_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_2), + V4L2_MPEG_VIDEO_VP9_LEVEL_5_2, + V4L2_CID_MPEG_VIDEO_VP9_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + {HEVC_TIER, ENC | DEC, HEVC, + V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, + V4L2_MPEG_VIDEO_HEVC_TIER_HIGH, + BIT(V4L2_MPEG_VIDEO_HEVC_TIER_MAIN) | + BIT(V4L2_MPEG_VIDEO_HEVC_TIER_HIGH), + V4L2_MPEG_VIDEO_HEVC_TIER_HIGH, + V4L2_CID_MPEG_VIDEO_HEVC_TIER, + HFI_PROP_TIER, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LF_MODE, ENC, H264, + V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED, + DB_H264_DISABLE_SLICE_BOUNDARY, + BIT(V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED) | + BIT(V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_DISABLED) | + BIT(DB_H264_DISABLE_SLICE_BOUNDARY), + V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED, + V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_MODE, + HFI_PROP_DEBLOCKING_MODE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LF_MODE, ENC, HEVC, + V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_DISABLED, + DB_HEVC_DISABLE_SLICE_BOUNDARY, + BIT(V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_DISABLED) | + BIT(V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_ENABLED) | + BIT(DB_HEVC_DISABLE_SLICE_BOUNDARY), + V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_ENABLED, + V4L2_CID_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE, + HFI_PROP_DEBLOCKING_MODE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LF_ALPHA, ENC, H264, + -6, 6, 1, 0, + V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_ALPHA}, + + {LF_ALPHA, ENC, HEVC | HEIC, + -6, 6, 1, 0, + V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2}, + + {LF_BETA, ENC, H264, + -6, 6, 1, 0, + V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_BETA}, + + {LF_BETA, ENC, HEVC | HEIC, + -6, 6, 1, 0, + V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2}, + + {SLICE_MODE, ENC, H264 | HEVC, + V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, + V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_BYTES, + BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE) | + BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_MB) | + BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_BYTES), + V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, + V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE, + 0, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {SLICE_MAX_BYTES, ENC, H264 | HEVC, + MIN_SLICE_BYTE_SIZE, MAX_SLICE_BYTE_SIZE, + 1, MIN_SLICE_BYTE_SIZE, + V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES, + HFI_PROP_MULTI_SLICE_BYTES_COUNT, + CAP_FLAG_OUTPUT_PORT}, + + {SLICE_MAX_MB, ENC, H264 | HEVC, + 1, MAX_SLICE_MB_SIZE, 1, 1, + V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB, + HFI_PROP_MULTI_SLICE_MB_COUNT, + CAP_FLAG_OUTPUT_PORT}, + + {MB_RC, ENC, H264 | HEVC, + 0, 1, 1, 1, + V4L2_CID_MPEG_VIDEO_MB_RC_ENABLE, + 0, + CAP_FLAG_OUTPUT_PORT}, + + {TRANSFORM_8X8, ENC, H264, + 0, 1, 1, 1, + V4L2_CID_MPEG_VIDEO_H264_8X8_TRANSFORM, + HFI_PROP_8X8_TRANSFORM, + CAP_FLAG_OUTPUT_PORT}, + + {CHROMA_QP_INDEX_OFFSET, ENC, HEVC, + MIN_CHROMA_QP_OFFSET, MAX_CHROMA_QP_OFFSET, + 1, MAX_CHROMA_QP_OFFSET, + V4L2_CID_MPEG_VIDEO_H264_CHROMA_QP_INDEX_OFFSET, + HFI_PROP_CHROMA_QP_OFFSET, + CAP_FLAG_OUTPUT_PORT}, + + {DISPLAY_DELAY_ENABLE, DEC, H264 | HEVC | VP9, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY_ENABLE, + HFI_PROP_DECODE_ORDER_OUTPUT, + CAP_FLAG_INPUT_PORT}, + + {DISPLAY_DELAY, DEC, H264 | HEVC | VP9, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY, + HFI_PROP_DECODE_ORDER_OUTPUT, + CAP_FLAG_INPUT_PORT}, + + {OUTPUT_ORDER, DEC, H264 | HEVC | VP9, + 0, 1, 1, 0, + 0, + HFI_PROP_DECODE_ORDER_OUTPUT, + CAP_FLAG_INPUT_PORT}, + + {INPUT_BUF_HOST_MAX_COUNT, ENC | DEC, CODECS_ALL, + DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT, + 1, DEFAULT_MAX_HOST_BUF_COUNT, + 0, + HFI_PROP_BUFFER_HOST_MAX_COUNT, + CAP_FLAG_INPUT_PORT}, + + {OUTPUT_BUF_HOST_MAX_COUNT, ENC | DEC, CODECS_ALL, + DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT, + 1, DEFAULT_MAX_HOST_BUF_COUNT, + 0, + HFI_PROP_BUFFER_HOST_MAX_COUNT, + CAP_FLAG_OUTPUT_PORT}, + + {CONCEAL_COLOR_8BIT, DEC, CODECS_ALL, 0x0, 0xff3fcff, 1, + DEFAULT_VIDEO_CONCEAL_COLOR_BLACK, + V4L2_CID_MPEG_VIDEO_MUTE_YUV, + HFI_PROP_CONCEAL_COLOR_8BIT, + CAP_FLAG_INPUT_PORT}, + + {CONCEAL_COLOR_10BIT, DEC, CODECS_ALL, 0x0, 0x3fffffff, 1, + DEFAULT_VIDEO_CONCEAL_COLOR_BLACK, + V4L2_CID_MPEG_VIDEO_MUTE_YUV, + HFI_PROP_CONCEAL_COLOR_10BIT, + CAP_FLAG_INPUT_PORT}, + + {STAGE, DEC|ENC, CODECS_ALL, + MSM_VIDC_STAGE_1, + MSM_VIDC_STAGE_2, 1, + MSM_VIDC_STAGE_2, + 0, + HFI_PROP_STAGE}, + + {PIPE, DEC|ENC, CODECS_ALL, + MSM_VIDC_PIPE_1, + MSM_VIDC_PIPE_2, 1, + MSM_VIDC_PIPE_2, + 0, + HFI_PROP_PIPE}, + + {POC, DEC, H264, 0, 2, 1, 1, + 0, + HFI_PROP_PIC_ORDER_CNT_TYPE}, + + {QUALITY_MODE, ENC, CODECS_ALL, + MSM_VIDC_MAX_QUALITY_MODE, + MSM_VIDC_POWER_SAVE_MODE, 1, + MSM_VIDC_POWER_SAVE_MODE}, + + {CODED_FRAMES, DEC, H264 | HEVC, + CODED_FRAMES_PROGRESSIVE, CODED_FRAMES_INTERLACE, + 1, CODED_FRAMES_PROGRESSIVE, + 0, + HFI_PROP_CODED_FRAMES}, + + {BIT_DEPTH, DEC, CODECS_ALL, BIT_DEPTH_8, BIT_DEPTH_10, 1, BIT_DEPTH_8, + 0, + HFI_PROP_LUMA_CHROMA_BIT_DEPTH}, + + {CODEC_CONFIG, DEC, H264 | HEVC, 0, 1, 1, 0, + 0, 0, + CAP_FLAG_DYNAMIC_ALLOWED}, + + {BITSTREAM_SIZE_OVERWRITE, DEC, CODECS_ALL, 0, INT_MAX, 1, 0, + 0}, + + {THUMBNAIL_MODE, DEC, CODECS_ALL, + 0, 1, 1, 0, + 0, + HFI_PROP_THUMBNAIL_MODE, + CAP_FLAG_INPUT_PORT}, + + {DEFAULT_HEADER, DEC, CODECS_ALL, + 0, 1, 1, 0, + 0, + HFI_PROP_DEC_DEFAULT_HEADER}, + + {RAP_FRAME, DEC, CODECS_ALL, + 0, 1, 1, 1, + 0, + HFI_PROP_DEC_START_FROM_RAP_FRAME, + CAP_FLAG_INPUT_PORT}, + + {SEQ_CHANGE_AT_SYNC_FRAME, DEC, CODECS_ALL, + 0, 1, 1, 1, + 0, + HFI_PROP_SEQ_CHANGE_AT_SYNC_FRAME, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {FIRMWARE_PRIORITY_OFFSET, DEC | ENC, CODECS_ALL, + 1, 1, 1, 1}, + + {ALL_INTRA, ENC, H264 | HEVC, + 0, 1, 1, 0, + 0, + 0, + CAP_FLAG_OUTPUT_PORT}, + + {COMPLEXITY, ENC, H264 | HEVC, + 0, 100, + 1, DEFAULT_COMPLEXITY, + 0}, +}; + +static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_volcano_v0[] = { + /* {cap, domain, codec, + * parents, + * children, + * adjust, set} + */ + + {PIX_FMTS, ENC, HEVC, + {PROFILE, MIN_FRAME_QP, MAX_FRAME_QP, I_FRAME_QP, P_FRAME_QP, + B_FRAME_QP, MIN_QUALITY, BLUR_TYPES, LTR_COUNT}}, + + {PIX_FMTS, DEC, HEVC, + {PROFILE}}, + + {FRAME_RATE, ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_q16}, + + {HFLIP, ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_flip}, + + {VFLIP, ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_flip}, + + {ROTATION, ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_rotation}, + + {SUPER_FRAME, ENC, H264 | HEVC, + {INPUT_BUF_HOST_MAX_COUNT, OUTPUT_BUF_HOST_MAX_COUNT}, + NULL, + NULL}, + + {HEADER_MODE, ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_header_mode}, + + {WITHOUT_STARTCODE, ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_nal_length}, + + {REQUEST_I_FRAME, ENC, H264 | HEVC, + {0}, + NULL, + msm_vidc_set_req_sync_frame}, + + {BIT_RATE, ENC, H264, + {PEAK_BITRATE, BITRATE_BOOST, L0_BR}, + msm_vidc_adjust_bitrate, + msm_vidc_set_bitrate}, + + {BIT_RATE, ENC, HEVC, + {PEAK_BITRATE, BITRATE_BOOST, L0_BR}, + msm_vidc_adjust_bitrate, + msm_vidc_set_bitrate}, + + {BITRATE_MODE, ENC, H264, + {LTR_COUNT, IR_PERIOD, TIME_DELTA_BASED_RC, I_FRAME_QP, + P_FRAME_QP, B_FRAME_QP, ENH_LAYER_COUNT, BIT_RATE, + META_ROI_INFO, MIN_QUALITY, BITRATE_BOOST, VBV_DELAY, + PEAK_BITRATE, SLICE_MODE, CONTENT_ADAPTIVE_CODING, + BLUR_TYPES, LOWLATENCY_MODE, META_TRANSCODING_STAT_INFO}, + msm_vidc_adjust_bitrate_mode, + msm_vidc_set_u32_enum}, + + {BITRATE_MODE, ENC, HEVC, + {LTR_COUNT, IR_PERIOD, TIME_DELTA_BASED_RC, I_FRAME_QP, + P_FRAME_QP, B_FRAME_QP, CONSTANT_QUALITY, ENH_LAYER_COUNT, + BIT_RATE, META_ROI_INFO, MIN_QUALITY, BITRATE_BOOST, VBV_DELAY, + PEAK_BITRATE, SLICE_MODE, CONTENT_ADAPTIVE_CODING, + BLUR_TYPES, LOWLATENCY_MODE}, + msm_vidc_adjust_bitrate_mode, + msm_vidc_set_u32_enum}, + + {CONSTANT_QUALITY, ENC, HEVC | HEIC, + {0}, + NULL, + msm_vidc_set_constant_quality}, + + {GOP_SIZE, ENC, CODECS_ALL, + {ALL_INTRA}, + msm_vidc_adjust_gop_size, + msm_vidc_set_gop_size}, + + {B_FRAME, ENC, H264 | HEVC, + {ALL_INTRA}, + msm_vidc_adjust_b_frame, + msm_vidc_set_u32}, + + {B_FRAME, ENC, HEIC, + {0}, + msm_vidc_adjust_blur_type, + msm_vidc_set_u32_enum}, + + {LOWLATENCY_MODE, ENC, H264 | HEVC, + {STAGE, BIT_RATE}, + msm_vidc_adjust_enc_lowlatency_mode, + NULL}, + + {LOWLATENCY_MODE, DEC, H264 | HEVC | VP9, + {STAGE}, + msm_vidc_adjust_dec_lowlatency_mode, + NULL}, + + {LTR_COUNT, ENC, H264 | HEVC, + {0}, + msm_vidc_adjust_ltr_count, + msm_vidc_set_u32}, + + {USE_LTR, ENC, H264 | HEVC, + {0}, + msm_vidc_adjust_use_ltr, + msm_vidc_set_use_and_mark_ltr}, + + {MARK_LTR, ENC, H264 | HEVC, + {0}, + msm_vidc_adjust_mark_ltr, + msm_vidc_set_use_and_mark_ltr}, + + {AU_DELIMITER, ENC, H264 | HEVC, + {0}, + NULL, + msm_vidc_set_u32}, + + {CONTENT_ADAPTIVE_CODING, ENC, H264 | HEVC, + {REQUEST_PREPROCESS}, + msm_vidc_adjust_brs, + msm_vidc_set_vbr_related_properties}, + + {REQUEST_PREPROCESS, ENC, H264 | HEVC, + {0}, + msm_vidc_adjust_preprocess, + msm_vidc_set_preprocess}, + + {MIN_QUALITY, ENC, H264, + {BLUR_TYPES}, + msm_vidc_adjust_min_quality, + msm_vidc_set_u32}, + + {MIN_QUALITY, ENC, H264 | HEVC, + {BLUR_TYPES}, + msm_vidc_adjust_min_quality, + msm_vidc_set_u32}, + + {VBV_DELAY, ENC, H264 | HEVC, + {0}, + NULL, + msm_vidc_set_cbr_related_properties}, + + {PEAK_BITRATE, ENC, H264 | HEVC, + {0}, + msm_vidc_adjust_peak_bitrate, + msm_vidc_set_cbr_related_properties}, + + {MIN_FRAME_QP, ENC, H264, + {0}, + NULL, + msm_vidc_set_min_qp}, + + {MIN_FRAME_QP, ENC, HEVC, + {0}, + msm_vidc_adjust_hevc_min_qp, + msm_vidc_set_min_qp}, + + {MAX_FRAME_QP, ENC, H264, + {0}, + NULL, + msm_vidc_set_max_qp}, + + {MAX_FRAME_QP, ENC, HEVC, + {0}, + msm_vidc_adjust_hevc_max_qp, + msm_vidc_set_max_qp}, + + {I_FRAME_QP, ENC, HEVC, + {0}, + msm_vidc_adjust_hevc_i_frame_qp, + msm_vidc_set_frame_qp}, + + {I_FRAME_QP, ENC, H264, + {0}, + NULL, + msm_vidc_set_frame_qp}, + + {P_FRAME_QP, ENC, HEVC, + {0}, + msm_vidc_adjust_hevc_p_frame_qp, + msm_vidc_set_frame_qp}, + + {P_FRAME_QP, ENC, H264, + {0}, + NULL, + msm_vidc_set_frame_qp}, + + {B_FRAME_QP, ENC, HEVC, + {0}, + msm_vidc_adjust_hevc_b_frame_qp, + msm_vidc_set_frame_qp}, + + {B_FRAME_QP, ENC, H264, + {0}, + NULL, + msm_vidc_set_frame_qp}, + + {LAYER_TYPE, ENC, H264 | HEVC, + {CONTENT_ADAPTIVE_CODING, LTR_COUNT}}, + + {LAYER_ENABLE, ENC, H264 | HEVC, + {CONTENT_ADAPTIVE_CODING}}, + + {ENH_LAYER_COUNT, ENC, H264 | HEVC, + {GOP_SIZE, B_FRAME, BIT_RATE, MIN_QUALITY, SLICE_MODE, LTR_COUNT}, + msm_vidc_adjust_layer_count, + msm_vidc_set_layer_count_and_type}, + + {L0_BR, ENC, H264 | HEVC, + {L1_BR}, + msm_vidc_adjust_layer_bitrate, + msm_vidc_set_layer_bitrate}, + + {L1_BR, ENC, H264 | HEVC, + {L2_BR}, + msm_vidc_adjust_layer_bitrate, + msm_vidc_set_layer_bitrate}, + + {L2_BR, ENC, H264 | HEVC, + {L3_BR}, + msm_vidc_adjust_layer_bitrate, + msm_vidc_set_layer_bitrate}, + + {L3_BR, ENC, H264 | HEVC, + {L4_BR}, + msm_vidc_adjust_layer_bitrate, + msm_vidc_set_layer_bitrate}, + + {L4_BR, ENC, H264 | HEVC, + {L5_BR}, + msm_vidc_adjust_layer_bitrate, + msm_vidc_set_layer_bitrate}, + + {L5_BR, ENC, H264 | HEVC, + {0}, + msm_vidc_adjust_layer_bitrate, + msm_vidc_set_layer_bitrate}, + + {ENTROPY_MODE, ENC, H264, + {BIT_RATE}, + msm_vidc_adjust_entropy_mode, + msm_vidc_set_u32}, + + {PROFILE, ENC, H264, + {ENTROPY_MODE, TRANSFORM_8X8}, + NULL, + msm_vidc_set_u32_enum}, + + {PROFILE, DEC, H264, + {ENTROPY_MODE}, + NULL, + msm_vidc_set_u32_enum}, + + {PROFILE, ENC | DEC, HEVC, + {0}, + msm_vidc_adjust_profile, + msm_vidc_set_u32_enum}, + + {PROFILE, DEC, VP9, + {0}, + NULL, + msm_vidc_set_u32_enum}, + + {LEVEL, DEC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_u32_enum}, + + {LEVEL, ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_level}, + + {HEVC_TIER, ENC | DEC, HEVC | HEIC, + {0}, + NULL, + msm_vidc_set_u32_enum}, + + {LF_MODE, ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_deblock_mode}, + + {SLICE_MODE, ENC, H264 | HEVC, + {STAGE, DELIVERY_MODE}, + msm_vidc_adjust_slice_count, + msm_vidc_set_slice_count}, + + {TRANSFORM_8X8, ENC, H264, + {0}, + msm_vidc_adjust_transform_8x8, + msm_vidc_set_u32}, + + {CHROMA_QP_INDEX_OFFSET, ENC, HEVC, + {0}, + msm_vidc_adjust_chroma_qp_index_offset, + msm_vidc_set_chroma_qp_index_offset}, + + {DISPLAY_DELAY_ENABLE, DEC, H264 | HEVC | VP9, + {OUTPUT_ORDER}, + NULL, + NULL}, + + {DISPLAY_DELAY, DEC, H264 | HEVC | VP9, + {OUTPUT_ORDER}, + NULL, + NULL}, + + {OUTPUT_ORDER, DEC, H264 | HEVC | VP9, + {0}, + msm_vidc_adjust_output_order, + msm_vidc_set_u32}, + + {INPUT_BUF_HOST_MAX_COUNT, ENC | DEC, CODECS_ALL, + {0}, + msm_vidc_adjust_input_buf_host_max_count, + msm_vidc_set_u32}, + + {INPUT_BUF_HOST_MAX_COUNT, ENC, H264 | HEVC, + {0}, + msm_vidc_adjust_input_buf_host_max_count, + msm_vidc_set_u32}, + + {OUTPUT_BUF_HOST_MAX_COUNT, ENC | DEC, CODECS_ALL, + {0}, + msm_vidc_adjust_output_buf_host_max_count, + msm_vidc_set_u32}, + + {OUTPUT_BUF_HOST_MAX_COUNT, ENC, H264 | HEVC, + {0}, + msm_vidc_adjust_output_buf_host_max_count, + msm_vidc_set_u32}, + + {CONCEAL_COLOR_8BIT, DEC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_u32_packed}, + + {CONCEAL_COLOR_10BIT, DEC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_u32_packed}, + + {STAGE, ENC | DEC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_stage}, + + {STAGE, ENC, H264 | HEVC, + {0}, + NULL, + msm_vidc_set_stage}, + + {STAGE, DEC, H264 | HEVC | VP9, + {0}, + NULL, + msm_vidc_set_stage}, + + {PIPE, DEC|ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_pipe}, + + {THUMBNAIL_MODE, DEC, H264 | HEVC | VP9, + {OUTPUT_ORDER}, + NULL, + msm_vidc_set_u32}, + + {RAP_FRAME, DEC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_u32}, + + {FIRMWARE_PRIORITY_OFFSET, DEC | ENC, CODECS_ALL, + {0}, + NULL, + NULL}, + + {ALL_INTRA, ENC, H264 | HEVC, + {LTR_COUNT, IR_PERIOD, SLICE_MODE, BIT_RATE}, + msm_vidc_adjust_all_intra, + NULL}, +}; + +/* Default UBWC config for LPDDR5 */ +static struct msm_vidc_ubwc_config_data ubwc_config_volcano[] = { + UBWC_CONFIG(8, 32, 15, 0, 1, 1, 1), +}; + +static struct msm_vidc_format_capability format_data_volcano = { + .codec_info = codec_data_volcano, + .codec_info_size = ARRAY_SIZE(codec_data_volcano), + .color_format_info = color_format_data_volcano, + .color_format_info_size = ARRAY_SIZE(color_format_data_volcano), + .color_prim_info = color_primaries_data_volcano, + .color_prim_info_size = ARRAY_SIZE(color_primaries_data_volcano), + .transfer_char_info = transfer_char_data_volcano, + .transfer_char_info_size = ARRAY_SIZE(transfer_char_data_volcano), + .matrix_coeff_info = matrix_coeff_data_volcano, + .matrix_coeff_info_size = ARRAY_SIZE(matrix_coeff_data_volcano), +}; +static const struct msm_vidc_platform_data volcano_data_v0 = { + /* caps related resorces */ + .core_data = core_data_volcano_v0, + .core_data_size = ARRAY_SIZE(core_data_volcano_v0), + .inst_cap_data = instance_cap_data_volcano_v0, + .inst_cap_data_size = ARRAY_SIZE(instance_cap_data_volcano_v0), + .inst_cap_dependency_data = instance_cap_dependency_data_volcano_v0, + .inst_cap_dependency_data_size = ARRAY_SIZE(instance_cap_dependency_data_volcano_v0), + .csc_data.vpe_csc_custom_bias_coeff = vpe_csc_custom_bias_coeff, + .csc_data.vpe_csc_custom_matrix_coeff = vpe_csc_custom_matrix_coeff, + .csc_data.vpe_csc_custom_limit_coeff = vpe_csc_custom_limit_coeff, + .ubwc_config = ubwc_config_volcano, + .format_data = &format_data_volcano, +}; + +int msm_vidc_volcano_check_ddr_type( + struct msm_vidc_platform_data *platform_data, u32 hbb_override_val) +{ + u32 ddr_type; + + ddr_type = of_fdt_get_ddrtype(); + if (ddr_type != DDR_TYPE_LPDDR5 && + ddr_type != DDR_TYPE_LPDDR5X) { + d_vpr_e("%s: wrong ddr type %d\n", __func__, ddr_type); + return -EINVAL; + } + + d_vpr_h("%s: ddr type %d\n", __func__, ddr_type); + return 0; +} + +static int msm_vidc_init_data(struct msm_vidc_core *core) +{ + int rc = 0; + + d_vpr_h("%s: initialize volcano", __func__); + + core->platform->data = volcano_data_v0; + + rc = msm_vidc_volcano_check_ddr_type(&core->platform->data, 0xe); + if (rc) + return rc; + + return rc; +} + +int msm_vidc_init_platform_volcano(struct msm_vidc_core *core) +{ + int rc = 0; + + rc = msm_vidc_init_data(core); + if (rc) + return rc; + + return 0; +} diff --git a/video/Kbuild b/video/Kbuild index aac7f52922..8d2a307439 100644 --- a/video/Kbuild +++ b/video/Kbuild @@ -13,6 +13,11 @@ LINUXINCLUDE += -I$(VIDEO_DRIVER_ABS_PATH)/platform/pineapple/inc \ -I$(VIDEO_DRIVER_ABS_PATH)/variant/iris33/inc endif +ifeq ($(CONFIG_MSM_VIDC_VOLCANO), y) +LINUXINCLUDE += -I$(VIDEO_DRIVER_ABS_PATH)/platform/volcano/inc \ + -I$(VIDEO_DRIVER_ABS_PATH)/variant/iris2/inc +endif + LINUXINCLUDE += -I$(VIDEO_DRIVER_ABS_PATH)/platform/common/inc \ -I$(VIDEO_DRIVER_ABS_PATH)/variant/common/inc \ -I$(VIDEO_DRIVER_ABS_PATH)/vidc/inc \ @@ -31,6 +36,12 @@ video-objs += $(VIDEO_DRIVER_REL_PATH)/platform/pineapple/src/pineapple.o \ $(VIDEO_DRIVER_REL_PATH)/variant/iris33/src/msm_vidc_clock_iris33.o \ $(VIDEO_DRIVER_REL_PATH)/variant/iris33/src/msm_vidc_iris33.o endif +ifeq ($(CONFIG_MSM_VIDC_VOLCANO), y) +video-objs += $(VIDEO_DRIVER_REL_PATH)/variant/iris2/src/msm_vidc_buffer_iris2.o \ + $(VIDEO_DRIVER_REL_PATH)/variant/iris2/src/msm_vidc_iris2.o \ + $(VIDEO_DRIVER_REL_PATH)/variant/iris2/src/msm_vidc_power_iris2.o \ + $(VIDEO_DRIVER_REL_PATH)/platform/volcano/src/volcano.o +endif video-objs += $(VIDEO_DRIVER_REL_PATH)/platform/common/src/msm_vidc_platform.o \ $(VIDEO_DRIVER_REL_PATH)/variant/common/src/msm_vidc_variant.o \ $(VIDEO_DRIVER_REL_PATH)/vidc/src/msm_vidc_v4l2.o \ diff --git a/video_modules.bzl b/video_modules.bzl index 3ed04acff9..a7329a2c64 100644 --- a/video_modules.bzl +++ b/video_modules.bzl @@ -93,5 +93,11 @@ module_entry( "driver/variant/iris33/src/msm_vidc_clock_iris33.c", "driver/variant/iris33/src/msm_vidc_iris33.c", ], + "CONFIG_MSM_VIDC_VOLCANO" : [ + "driver/variant/iris2/src/msm_vidc_buffer_iris2.c", + "driver/variant/iris2/src/msm_vidc_iris2.c", + "driver/variant/iris2/src/msm_vidc_power_iris2.c", + "driver/platform/volcano/src/volcano.c", + ], } ) From 8e1f8f6e58d05e88ab1adead69ed708d674b004d Mon Sep 17 00:00:00 2001 From: Rajathi S Date: Sat, 3 Feb 2024 16:20:58 +0530 Subject: [PATCH 1028/1061] Video: Driver: Modify platform specific changes for volcano - Modify platform specific driver changes for volcano target Change-Id: I1800d711ba8a7c9dab6f17c9f0f9e547acf8b52f Signed-off-by: Rajathi S --- .../platform/common/inc/msm_vidc_platform.h | 3 +- .../platform/volcano/src/msm_vidc_volcano.c | 2766 +---------------- 2 files changed, 68 insertions(+), 2701 deletions(-) diff --git a/driver/platform/common/inc/msm_vidc_platform.h b/driver/platform/common/inc/msm_vidc_platform.h index 228c9e10d5..c9c62897e1 100644 --- a/driver/platform/common/inc/msm_vidc_platform.h +++ b/driver/platform/common/inc/msm_vidc_platform.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. - * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. */ #ifndef _MSM_VIDC_PLATFORM_H_ @@ -201,6 +201,7 @@ struct msm_vidc_format_capability { enum vpu_version { VPU_VERSION_IRIS33 = 1, VPU_VERSION_IRIS33_2P, // IRIS3 2 PIPE + VPU_VERSION_IRIS2_2P, // IRIS2 2 PIPE }; struct msm_vidc_platform_data { diff --git a/driver/platform/volcano/src/msm_vidc_volcano.c b/driver/platform/volcano/src/msm_vidc_volcano.c index bcd5138f89..4fa2737c50 100644 --- a/driver/platform/volcano/src/msm_vidc_volcano.c +++ b/driver/platform/volcano/src/msm_vidc_volcano.c @@ -1,11 +1,11 @@ // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2020-2022, The Linux Foundation. All rights reserved. - * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. */ #include -#include +#include #include #include @@ -44,13 +44,13 @@ ((MAX_BITRATE_V1) >> 3) #define MAX_SLICE_MB_SIZE \ (((4096 + 15) >> 4) * ((2160 + 15) >> 4)) +#define MAX_LTR_FRAME_COUNT 2 #define ENC MSM_VIDC_ENCODER #define DEC MSM_VIDC_DECODER #define H264 MSM_VIDC_H264 #define HEVC MSM_VIDC_HEVC #define VP9 MSM_VIDC_VP9 -#define AV1 MSM_VIDC_AV1 #define HEIC MSM_VIDC_HEIC #define CODECS_ALL (H264 | HEVC | VP9 | HEIC) #define MAXIMUM_OVERRIDE_VP9_FPS 200 @@ -285,13 +285,12 @@ static struct msm_platform_core_capability core_data_volcano_v0[] = { {MAX_NUM_720P_SESSIONS, 16}, {MAX_NUM_1080P_SESSIONS, 16}, {MAX_NUM_4K_SESSIONS, 4}, - {MAX_NUM_8K_SESSIONS, 1}, {MAX_SECURE_SESSION_COUNT, 3}, - {MAX_RT_MBPF, 139264}, /* (4 * ((4096*2176)/256)) */ + {MAX_RT_MBPF, 130560}, /* (4 * ((3840*2176)/256)) */ {MAX_MBPF, 139264}, /* (4 * ((4096*2176)/256)) */ - /* max_load 4096x2176@120fps which is greater than 7680x4320@30fps */ - /* Concurrency: UHD@30 decode + uhd@30 encode */ - {MAX_MBPS, 4177920}, + /* max_load 3840x2176@120fps*/ + /* Concurrency: UHD@30 decode + UHD@30 encode */ + {MAX_MBPS, 3916800}, {MAX_IMAGE_MBPF, 1048576}, /* (16384x16384)/256 */ {MAX_MBPF_HQ, 8160}, /* ((1920x1088)/256) */ {MAX_MBPS_HQ, 244800}, /* ((1920x1088)/256)@30fps */ @@ -313,48 +312,7 @@ static struct msm_platform_core_capability core_data_volcano_v0[] = { {STATS_TIMEOUT_MS, 2000}, {AV_SYNC_WINDOW_SIZE, 40}, {NON_FATAL_FAULTS, 1}, - {ENC_AUTO_FRAMERATE, 1}, - {DEVICE_CAPS, V4L2_CAP_VIDEO_M2M_MPLANE | V4L2_CAP_META_CAPTURE | - V4L2_CAP_STREAMING}, - {SUPPORTS_SYNX_FENCE, 1}, - {SUPPORTS_REQUESTS, 0}, -}; - -static struct msm_platform_core_capability core_data_volcano_v1[] = { - /* {type, value} */ - {ENC_CODECS, H264 | HEVC | HEIC}, - {DEC_CODECS, H264 | HEVC | VP9 | HEIC}, - {MAX_SESSION_COUNT, 16}, - {MAX_NUM_720P_SESSIONS, 16}, - {MAX_NUM_1080P_SESSIONS, 8}, - {MAX_NUM_4K_SESSIONS, 2}, - {MAX_SECURE_SESSION_COUNT, 3}, - {MAX_RT_MBPF, 69632}, /* (2 * ((4096x2176)/256)) */ - {MAX_MBPF, 104448}, /* (3 * ((4096x2176)/256))*/ - /* max_load 4096x2176@60fps*/ - {MAX_MBPS, 2088960}, /* Concurrency: UHD@30 decode + 1080p@30 encode */ - {MAX_IMAGE_MBPF, 1048576}, /* (16384x16384)/256 */ - {MAX_MBPF_HQ, 8160}, /* ((1920x1088)/256) */ - {MAX_MBPS_HQ, 244800}, /* ((1920x1088)/256)@30fps */ - {MAX_MBPF_B_FRAME, 32640}, /* 3840x2176/256 */ - {MAX_MBPS_B_FRAME, 979200}, /* 3840x2176/256 MBs@30fps */ - {MAX_MBPS_ALL_INTRA, 489600}, /* ((1920x1088)/256)@60fps */ - {MAX_ENH_LAYER_COUNT, 5}, - {NUM_VPP_PIPE, 2}, - {SW_PC, 1}, - {FW_UNLOAD, 0}, - {HW_RESPONSE_TIMEOUT, HW_RESPONSE_TIMEOUT_VALUE}, /* 1000 ms */ - {SW_PC_DELAY, SW_PC_DELAY_VALUE }, /* 1500 ms (>HW_RESPONSE_TIMEOUT)*/ - {FW_UNLOAD_DELAY, FW_UNLOAD_DELAY_VALUE }, /* 3000 ms (>SW_PC_DELAY)*/ - {PAGEFAULT_NON_FATAL, 1}, - {PAGETABLE_CACHING, 0}, - {DCVS, 1}, - {DECODE_BATCH, 1}, - {DECODE_BATCH_TIMEOUT, 200}, - {STATS_TIMEOUT_MS, 2000}, - {AV_SYNC_WINDOW_SIZE, 40}, - {NON_FATAL_FAULTS, 1}, - {ENC_AUTO_FRAMERATE, 1}, + {ENC_AUTO_FRAMERATE, 0}, {DEVICE_CAPS, V4L2_CAP_VIDEO_M2M_MPLANE | V4L2_CAP_META_CAPTURE | V4L2_CAP_STREAMING}, {SUPPORTS_SYNX_FENCE, 1}, @@ -372,53 +330,37 @@ static struct msm_platform_inst_capability instance_cap_data_volcano_v0[] = { 0, INT_MAX, 1, DRIVER_VERSION, V4L2_CID_MPEG_VIDC_DRIVER_VERSION}, - {FRAME_WIDTH, DEC, CODECS_ALL, 96, 7680, 1, 1920}, - - {FRAME_WIDTH, DEC, VP9, 96, 4096, 1, 1920}, + {FRAME_WIDTH, DEC, CODECS_ALL, 96, 4096, 1, 1920}, {FRAME_WIDTH, ENC, CODECS_ALL, 128, 4096, 1, 1920}, - {FRAME_WIDTH, ENC, HEVC, 96, 4096, 1, 1920}, - {FRAME_WIDTH, ENC, HEIC, 128, 16384, 1, 16384}, - {LOSSLESS_FRAME_WIDTH, ENC, H264|HEVC, 128, 4096, 1, 1920}, - - {LOSSLESS_FRAME_WIDTH, ENC, HEVC, 96, 4096, 1, 1920}, + {LOSSLESS_FRAME_WIDTH, ENC, H264 | HEVC, 128, 4096, 1, 1920}, {SECURE_FRAME_WIDTH, DEC, CODECS_ALL, 96, 4096, 1, 1920}, {SECURE_FRAME_WIDTH, ENC, CODECS_ALL, 128, 4096, 1, 1920}, - {SECURE_FRAME_WIDTH, ENC, HEVC, 96, 4096, 1, 1920}, - - {FRAME_HEIGHT, DEC, CODECS_ALL, 96, 7680, 1, 1080}, - - {FRAME_HEIGHT, DEC, VP9, 96, 4096, 1, 1080}, + {FRAME_HEIGHT, DEC, CODECS_ALL, 96, 4096, 1, 1080}, {FRAME_HEIGHT, ENC, CODECS_ALL, 128, 4096, 1, 1080}, - {FRAME_HEIGHT, ENC, HEVC, 96, 4096, 1, 1080}, - {FRAME_HEIGHT, ENC, HEIC, 128, 16384, 1, 16384}, {LOSSLESS_FRAME_HEIGHT, ENC, CODECS_ALL, 128, 4096, 1, 1080}, - {LOSSLESS_FRAME_HEIGHT, ENC, HEVC, 96, 4096, 1, 1080}, - {SECURE_FRAME_HEIGHT, DEC, CODECS_ALL, 96, 4096, 1, 1080}, {SECURE_FRAME_HEIGHT, ENC, CODECS_ALL, 128, 4096, 1, 1080}, - {SECURE_FRAME_HEIGHT, ENC, HEVC, 96, 4096, 1, 1080}, - {PIX_FMTS, ENC | DEC, H264, MSM_VIDC_FMT_NV12, MSM_VIDC_FMT_NV12C, MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C, MSM_VIDC_FMT_NV12C}, - {PIX_FMTS, ENC | DEC, HEVC | VP9, + {PIX_FMTS, ENC | DEC, HEVC, MSM_VIDC_FMT_NV12, MSM_VIDC_FMT_TP10C, MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C | @@ -438,6 +380,13 @@ static struct msm_platform_inst_capability instance_cap_data_volcano_v0[] = { MSM_VIDC_FMT_P010 | MSM_VIDC_FMT_TP10C, MSM_VIDC_FMT_NV12C}, + {PIX_FMTS, DEC, VP9, + MSM_VIDC_FMT_NV12, + MSM_VIDC_FMT_TP10C, + MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C | + MSM_VIDC_FMT_P010 | MSM_VIDC_FMT_TP10C, + MSM_VIDC_FMT_NV12C}, + {MIN_BUFFERS_INPUT, ENC | DEC, CODECS_ALL, 0, 64, 1, 4, V4L2_CID_MIN_BUFFERS_FOR_OUTPUT, 0, @@ -457,10 +406,8 @@ static struct msm_platform_inst_capability instance_cap_data_volcano_v0[] = { /* (4096 * 2176) / 256 */ {MBPF, ENC, CODECS_ALL, 64, 34816, 1, 34816}, - {MBPF, ENC, HEVC, 36, 34816, 1, 34816}, - /* ((16384x16384)/256) */ - {MBPF, ENC, HEIC, 36, 1048576, 1, 1048576}, + {MBPF, ENC, HEIC, 64, 1048576, 1, 1048576}, /* (4 * ((4096 * 2176)/256) */ {MBPF, DEC, CODECS_ALL, 36, 139264, 1, 139264}, @@ -480,2284 +427,13 @@ static struct msm_platform_inst_capability instance_cap_data_volcano_v0[] = { * has checks to allow batching for less than BATCH_MBPF. * Same applies for BATCH_FPS. */ - {BATCH_MBPF, DEC, H264 | HEVC | VP9 | AV1, 64, 8162, 1, 8162}, - - /* (1920 * 1088) / 256 */ - {BATCH_FPS, DEC, H264 | HEVC | VP9 | AV1, 1, 61, 1, 61}, - - {SECURE_MBPF, ENC | DEC, H264 | HEVC | VP9 | AV1, 64, 36864, 1, 36864}, - - {SECURE_MBPF, ENC, HEVC, 36, 36864, 1, 36864}, - - {FRAME_RATE, ENC, CODECS_ALL, - (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), - 1, (DEFAULT_FPS << 16), - 0, - HFI_PROP_FRAME_RATE, - CAP_FLAG_OUTPUT_PORT}, - - {FRAME_RATE, ENC, HEIC, - (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), - 1, (MINIMUM_FPS << 16), - 0, - HFI_PROP_FRAME_RATE, - CAP_FLAG_OUTPUT_PORT}, - - {FRAME_RATE, DEC, CODECS_ALL, - (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), - 1, (DEFAULT_FPS << 16), - V4L2_CID_MPEG_VIDC_FRAME_RATE, - 0, - CAP_FLAG_OUTPUT_PORT | - CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - - {FRAME_RATE, DEC, VP9, - (MINIMUM_FPS << 16), (MAXIMUM_OVERRIDE_VP9_FPS << 16), - 1, (DEFAULT_FPS << 16), - V4L2_CID_MPEG_VIDC_FRAME_RATE, - 0, - CAP_FLAG_OUTPUT_PORT | - CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - - {OPERATING_RATE, ENC, CODECS_ALL, - (MINIMUM_FPS << 16), INT_MAX, - 1, (DEFAULT_FPS << 16)}, - - {OPERATING_RATE, DEC, CODECS_ALL, - (MINIMUM_FPS << 16), INT_MAX, - 1, (DEFAULT_FPS << 16), - V4L2_CID_MPEG_VIDC_OPERATING_RATE, - 0, - CAP_FLAG_OUTPUT_PORT | - CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - - {INPUT_RATE, ENC | DEC, CODECS_ALL, - (MINIMUM_FPS << 16), INT_MAX, - 1, (DEFAULT_FPS << 16)}, - - {TIMESTAMP_RATE, ENC | DEC, CODECS_ALL, - (MINIMUM_FPS << 16), INT_MAX, - 1, (DEFAULT_FPS << 16)}, - - {SCALE_FACTOR, ENC, H264 | HEVC, 1, 8, 1, 8}, - - {MB_CYCLES_VSP, ENC, CODECS_ALL, 25, 25, 1, 25}, - - {MB_CYCLES_VSP, DEC, CODECS_ALL, 25, 25, 1, 25}, - - {MB_CYCLES_VSP, DEC, VP9 | AV1, 60, 60, 1, 60}, - - {MB_CYCLES_VPP, ENC, CODECS_ALL, 675, 675, 1, 675}, - - {MB_CYCLES_VPP, DEC, CODECS_ALL, 200, 200, 1, 200}, - - {MB_CYCLES_LP, ENC, CODECS_ALL, 320, 320, 1, 320}, - - {MB_CYCLES_LP, DEC, CODECS_ALL, 200, 200, 1, 200}, - - {MB_CYCLES_FW, ENC | DEC, CODECS_ALL, 489583, 489583, 1, 489583}, - - {MB_CYCLES_FW_VPP, ENC, CODECS_ALL, 48405, 48405, 1, 48405}, - - {MB_CYCLES_FW_VPP, DEC, CODECS_ALL, 66234, 66234, 1, 66234}, - - {ENC_RING_BUFFER_COUNT, ENC, CODECS_ALL, - 0, 0, 1, 0}, - - {CLIENT_ID, ENC | DEC, CODECS_ALL, - INVALID_CLIENT_ID, INT_MAX, 1, INVALID_CLIENT_ID, - V4L2_CID_MPEG_VIDC_CLIENT_ID}, - - {SECURE_MODE, ENC | DEC, H264 | HEVC | VP9 | AV1, - 0, 1, 1, 0, - V4L2_CID_MPEG_VIDC_SECURE, - HFI_PROP_SECURE, - CAP_FLAG_NONE}, - - /* - * Client will enable V4L2_CID_MPEG_VIDC_METADATA_OUTBUF_FENCE - * to get fence_id in input metadata buffer done. - */ - {META_OUTBUF_FENCE, DEC, H264 | HEVC | VP9 | AV1, - MSM_VIDC_META_DISABLE, - MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_INPUT, - 0, MSM_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_OUTBUF_FENCE, - HFI_PROP_FENCE, - CAP_FLAG_BITMASK | CAP_FLAG_META | CAP_FLAG_DYNAMIC_ALLOWED}, - - /* - * Client to do set_ctrl with FENCE_ID to set fence_id - * and then client will do get_ctrl with FENCE_FD to get - * fence_fd corresponding to client set fence_id. - */ - {FENCE_ID, DEC, CODECS_ALL, - 0, INT_MAX, 1, 0, - V4L2_CID_MPEG_VIDC_SW_FENCE_ID, - 0, - CAP_FLAG_DYNAMIC_ALLOWED | CAP_FLAG_OUTPUT_PORT}, - - {FENCE_FD, DEC, CODECS_ALL, - INVALID_FD, INT_MAX, 1, INVALID_FD, - V4L2_CID_MPEG_VIDC_SW_FENCE_FD, - 0, - CAP_FLAG_VOLATILE}, - - /* Fence type for input buffer. Currently unused */ - {INBUF_FENCE_TYPE, DEC, H264 | HEVC | VP9 | AV1, - MSM_VIDC_FENCE_NONE, MSM_VIDC_FENCE_NONE, - BIT(MSM_VIDC_FENCE_NONE), - MSM_VIDC_FENCE_NONE, - 0, - HFI_PROP_FENCE_TYPE, - CAP_FLAG_MENU | CAP_FLAG_INPUT_PORT}, - - {OUTBUF_FENCE_TYPE, DEC, H264 | HEVC | VP9 | AV1, - MSM_VIDC_FENCE_NONE, MSM_VIDC_SYNX_V2_FENCE, - BIT(MSM_VIDC_FENCE_NONE) | BIT(MSM_VIDC_SW_FENCE) | - BIT(MSM_VIDC_SYNX_V2_FENCE), - MSM_VIDC_FENCE_NONE, - 0, - HFI_PROP_FENCE_TYPE, - CAP_FLAG_MENU | CAP_FLAG_OUTPUT_PORT}, - - /* Fence direction for input buffer. Currently unused */ - {INBUF_FENCE_DIRECTION, DEC, H264 | HEVC | VP9 | AV1, - MSM_VIDC_FENCE_DIR_NONE, MSM_VIDC_FENCE_DIR_NONE, - BIT(MSM_VIDC_FENCE_DIR_NONE), - MSM_VIDC_FENCE_DIR_NONE, - 0, - HFI_PROP_FENCE_DIRECTION, - CAP_FLAG_MENU | CAP_FLAG_INPUT_PORT}, - - {OUTBUF_FENCE_DIRECTION, DEC, H264 | HEVC | VP9 | AV1, - MSM_VIDC_FENCE_DIR_NONE, MSM_VIDC_FENCE_DIR_RX, - BIT(MSM_VIDC_FENCE_DIR_NONE) | BIT(MSM_VIDC_FENCE_DIR_TX) | - BIT(MSM_VIDC_FENCE_DIR_RX), - MSM_VIDC_FENCE_DIR_NONE, - 0, - HFI_PROP_FENCE_DIRECTION, - CAP_FLAG_MENU | CAP_FLAG_OUTPUT_PORT}, - - {FENCE_ERROR_DATA_CORRUPT, DEC, H264 | HEVC | VP9 | AV1, - 0, 1, 1, 0, - 0, - HFI_PROP_FENCE_ERROR_DATA_CORRUPT}, - - {TS_REORDER, DEC, H264 | HEVC, - 0, 1, 1, 0, - V4L2_CID_MPEG_VIDC_TS_REORDER}, - - {HFLIP, ENC, CODECS_ALL, - 0, 1, 1, 0, - V4L2_CID_HFLIP, - HFI_PROP_FLIP, - CAP_FLAG_OUTPUT_PORT | - CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - - {VFLIP, ENC, CODECS_ALL, - 0, 1, 1, 0, - V4L2_CID_VFLIP, - HFI_PROP_FLIP, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {ROTATION, ENC, CODECS_ALL, - 0, 270, 90, 0, - V4L2_CID_ROTATE, - HFI_PROP_ROTATION, - CAP_FLAG_OUTPUT_PORT}, - - {SUPER_FRAME, ENC, H264 | HEVC, - 0, 32, 1, 0, - V4L2_CID_MPEG_VIDC_SUPERFRAME, 0, - CAP_FLAG_DYNAMIC_ALLOWED}, - - {SLICE_DECODE, DEC, H264 | HEVC | AV1, - V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_MPEG_MSM_VIDC_DISABLE, - 0, - V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDEO_DECODER_SLICE_INTERFACE, - 0}, - - {HEADER_MODE, ENC, CODECS_ALL, - V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE, - V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME, - BIT(V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE) | - BIT(V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME), - V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE, - V4L2_CID_MPEG_VIDEO_HEADER_MODE, - HFI_PROP_SEQ_HEADER_MODE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {PREPEND_SPSPPS_TO_IDR, ENC, CODECS_ALL, - 0, 1, 1, 0, - V4L2_CID_MPEG_VIDEO_PREPEND_SPSPPS_TO_IDR}, - - {VUI_TIMING_INFO, ENC, CODECS_ALL, - V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_MPEG_MSM_VIDC_ENABLE, - 1, V4L2_MPEG_MSM_VIDC_DISABLE, - V4L2_CID_MPEG_VIDC_VUI_TIMING_INFO, - HFI_PROP_DISABLE_VUI_TIMING_INFO, - CAP_FLAG_OUTPUT_PORT}, - - {WITHOUT_STARTCODE, ENC, CODECS_ALL, - 0, 1, 1, 0, - V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE, - HFI_PROP_NAL_LENGTH_FIELD, - CAP_FLAG_OUTPUT_PORT}, - - {WITHOUT_STARTCODE, DEC, AV1, - 0, 0, 1, 0, - V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE, - HFI_PROP_NAL_LENGTH_FIELD, - CAP_FLAG_INPUT_PORT}, - - {NAL_LENGTH_FIELD, ENC, CODECS_ALL, - V4L2_MPEG_VIDEO_HEVC_SIZE_0, - V4L2_MPEG_VIDEO_HEVC_SIZE_4, - BIT(V4L2_MPEG_VIDEO_HEVC_SIZE_0) | - BIT(V4L2_MPEG_VIDEO_HEVC_SIZE_4), - V4L2_MPEG_VIDEO_HEVC_SIZE_0, - V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD, - HFI_PROP_NAL_LENGTH_FIELD, - CAP_FLAG_MENU | CAP_FLAG_OUTPUT_PORT}, - - /* TODO: Firmware introduced enumeration type for this - * with and without seq header. - */ - {REQUEST_I_FRAME, ENC, H264 | HEVC, - 0, 0, 0, 0, - V4L2_CID_MPEG_VIDEO_FORCE_KEY_FRAME, - HFI_PROP_REQUEST_SYNC_FRAME, - CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - - /* Enc: Keeping CABAC and CAVLC as same bitrate. - * Dec: there's no use of Bitrate cap - */ - {BIT_RATE, ENC, H264 | HEVC, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_BITRATE, - HFI_PROP_TOTAL_BITRATE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {BITRATE_MODE, ENC, H264, - V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, - V4L2_MPEG_VIDEO_BITRATE_MODE_CBR, - BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_VBR) | - BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CBR), - V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, - V4L2_CID_MPEG_VIDEO_BITRATE_MODE, - HFI_PROP_RATE_CONTROL, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {BITRATE_MODE, ENC, HEVC, - V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, - V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, - BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_VBR) | - BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CBR) | - BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CQ), - V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, - V4L2_CID_MPEG_VIDEO_BITRATE_MODE, - HFI_PROP_RATE_CONTROL, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {BITRATE_MODE, ENC, HEIC, - V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, - V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, - BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CQ), - V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, - V4L2_CID_MPEG_VIDEO_BITRATE_MODE, - HFI_PROP_RATE_CONTROL, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {CABAC_MAX_BITRATE, ENC, H264 | HEVC, 0, - 160000000, 1, 160000000}, - - {CAVLC_MAX_BITRATE, ENC, H264, 0, - 160000000, 1, 160000000}, - - {ALLINTRA_MAX_BITRATE, ENC, H264 | HEVC, 0, - 160000000, 1, 160000000}, - - {LOWLATENCY_MAX_BITRATE, ENC, H264 | HEVC, 0, - 70000000, 1, 70000000}, - - {NUM_COMV, DEC, CODECS_ALL, - 0, INT_MAX, 1, 0}, - - {LOSSLESS, ENC, HEVC, - 0, 1, 1, 0, - V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU}, - - {FRAME_SKIP_MODE, ENC, H264 | HEVC | HEIC, - V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED, - V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT, - BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED) | - BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_LEVEL_LIMIT) | - BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT), - V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED, - V4L2_CID_MPEG_VIDEO_FRAME_SKIP_MODE, - 0, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {FRAME_RC_ENABLE, ENC, H264 | HEVC | HEIC, - 0, 1, 1, 1, - V4L2_CID_MPEG_VIDEO_FRAME_RC_ENABLE}, - - {CONSTANT_QUALITY, ENC, HEVC, - 1, MAX_CONSTANT_QUALITY, 1, 90, - V4L2_CID_MPEG_VIDEO_CONSTANT_QUALITY, - HFI_PROP_CONSTANT_QUALITY, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {CONSTANT_QUALITY, ENC, HEIC, - 1, MAX_CONSTANT_QUALITY, 1, 100, - V4L2_CID_MPEG_VIDEO_CONSTANT_QUALITY, - HFI_PROP_CONSTANT_QUALITY, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {GOP_SIZE, ENC, CODECS_ALL, - 0, INT_MAX, 1, 2 * DEFAULT_FPS - 1, - V4L2_CID_MPEG_VIDEO_GOP_SIZE, - HFI_PROP_MAX_GOP_FRAMES, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {GOP_SIZE, ENC, HEIC, - 0, INT_MAX, 1, 0 /* all intra */, - V4L2_CID_MPEG_VIDEO_GOP_SIZE, - HFI_PROP_MAX_GOP_FRAMES, - CAP_FLAG_OUTPUT_PORT | - CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - - {GOP_CLOSURE, ENC, H264 | HEVC, - 0, 1, 1, 1, - V4L2_CID_MPEG_VIDEO_GOP_CLOSURE, - 0}, - - {B_FRAME, ENC, H264 | HEVC, - 0, 7, 1, 0, - V4L2_CID_MPEG_VIDEO_B_FRAMES, - HFI_PROP_MAX_B_FRAMES, - CAP_FLAG_OUTPUT_PORT}, - - {B_FRAME, ENC, HEIC, - 0, 1, 1, 0, - V4L2_CID_MPEG_VIDEO_B_FRAMES, - HFI_PROP_MAX_B_FRAMES, - CAP_FLAG_OUTPUT_PORT}, - - {BLUR_TYPES, ENC, H264 | HEVC, - MSM_VIDC_BLUR_NONE, MSM_VIDC_BLUR_EXTERNAL, - BIT(MSM_VIDC_BLUR_NONE) | BIT(MSM_VIDC_BLUR_EXTERNAL), - MSM_VIDC_BLUR_NONE, - V4L2_CID_MPEG_VIDC_VIDEO_BLUR_TYPES, - HFI_PROP_BLUR_TYPES, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {BLUR_RESOLUTION, ENC, H264 | HEVC, - 0, S32_MAX, 1, 0, - V4L2_CID_MPEG_VIDC_VIDEO_BLUR_RESOLUTION, - HFI_PROP_BLUR_RESOLUTION, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {CSC, ENC, CODECS_ALL, - 0, 1, 1, 0, - V4L2_CID_MPEG_VIDC_CSC, - HFI_PROP_CSC, - CAP_FLAG_OUTPUT_PORT}, - - {CSC_CUSTOM_MATRIX, ENC, CODECS_ALL, - 0, 1, 1, 0, - V4L2_CID_MPEG_VIDC_VIDEO_VPE_CSC_CUSTOM_MATRIX, - HFI_PROP_CSC_MATRIX, - CAP_FLAG_OUTPUT_PORT}, - - {LOWLATENCY_MODE, ENC, H264 | HEVC, - 0, 1, 1, 0, - V4L2_CID_MPEG_VIDC_LOWLATENCY_REQUEST, - 0, - CAP_FLAG_NONE}, - - {LOWLATENCY_MODE, DEC, H264 | HEVC | VP9 | AV1, - 0, 1, 1, 0, - V4L2_CID_MPEG_VIDC_LOWLATENCY_REQUEST, - HFI_PROP_SEQ_CHANGE_AT_SYNC_FRAME, - CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - - {LTR_COUNT, ENC, H264 | HEVC, - 0, MAX_LTR_FRAME_COUNT_5, 1, 0, - V4L2_CID_MPEG_VIDEO_LTR_COUNT, - HFI_PROP_LTR_COUNT, - CAP_FLAG_OUTPUT_PORT}, - - {USE_LTR, ENC, H264 | HEVC, - 0, - ((1 << MAX_LTR_FRAME_COUNT_5) - 1), - 0, 0, - V4L2_CID_MPEG_VIDEO_USE_LTR_FRAMES, - HFI_PROP_LTR_USE, - CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - - {MARK_LTR, ENC, H264 | HEVC, - INVALID_DEFAULT_MARK_OR_USE_LTR, - (MAX_LTR_FRAME_COUNT_5 - 1), - 1, INVALID_DEFAULT_MARK_OR_USE_LTR, - V4L2_CID_MPEG_VIDEO_FRAME_LTR_INDEX, - HFI_PROP_LTR_MARK, - CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - - {BASELAYER_PRIORITY, ENC, H264, - 0, MAX_BASE_LAYER_PRIORITY_ID, 1, 0, - V4L2_CID_MPEG_VIDEO_BASELAYER_PRIORITY_ID, - HFI_PROP_BASELAYER_PRIORITYID, - CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - - {IR_TYPE, ENC, H264 | HEVC, - V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_RANDOM, - V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_CYCLIC, - BIT(V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_RANDOM) | - BIT(V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_CYCLIC), - V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_RANDOM, - V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE, - 0, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {IR_PERIOD, ENC, H264 | HEVC, - 0, INT_MAX, 1, 0, - V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD, - 0, - CAP_FLAG_INPUT_PORT | CAP_FLAG_OUTPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {AU_DELIMITER, ENC, H264 | HEVC, - 0, 1, 1, 0, - V4L2_CID_MPEG_VIDEO_AU_DELIMITER, - HFI_PROP_AUD, - CAP_FLAG_OUTPUT_PORT}, - - {TIME_DELTA_BASED_RC, ENC, H264 | HEVC, - 0, 1, 1, 1, - V4L2_CID_MPEG_VIDC_TIME_DELTA_BASED_RC, - HFI_PROP_TIME_DELTA_BASED_RATE_CONTROL, - CAP_FLAG_OUTPUT_PORT}, - - {TIME_DELTA_BASED_RC, ENC, HEIC, - 0, 1, 1, 0, - V4L2_CID_MPEG_VIDC_TIME_DELTA_BASED_RC, - HFI_PROP_TIME_DELTA_BASED_RATE_CONTROL, - CAP_FLAG_OUTPUT_PORT}, - - {CONTENT_ADAPTIVE_CODING, ENC, H264 | HEVC, - 0, 1, 1, 1, - V4L2_CID_MPEG_VIDC_CONTENT_ADAPTIVE_CODING, - HFI_PROP_CONTENT_ADAPTIVE_CODING, - CAP_FLAG_OUTPUT_PORT}, - - {REQUEST_PREPROCESS, ENC, H264 | HEVC, - MSM_VIDC_PREPROCESS_NONE, - MSM_VIDC_PREPROCESS_TYPE0, - BIT(MSM_VIDC_PREPROCESS_NONE) | - BIT(MSM_VIDC_PREPROCESS_TYPE0), - MSM_VIDC_PREPROCESS_NONE, - 0, HFI_PROP_REQUEST_PREPROCESS, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {BITRATE_BOOST, ENC, H264 | HEVC, - 0, MAX_BITRATE_BOOST, 25, MAX_BITRATE_BOOST, - V4L2_CID_MPEG_VIDC_QUALITY_BITRATE_BOOST, - HFI_PROP_BITRATE_BOOST, - CAP_FLAG_OUTPUT_PORT}, - - {MIN_QUALITY, ENC, H264 | HEVC, - 0, MAX_SUPPORTED_MIN_QUALITY, 70, MAX_SUPPORTED_MIN_QUALITY, - 0, - HFI_PROP_MAINTAIN_MIN_QUALITY, - CAP_FLAG_OUTPUT_PORT}, - - {VBV_DELAY, ENC, H264 | HEVC, - 200, 300, 100, 300, - V4L2_CID_MPEG_VIDEO_VBV_DELAY, - HFI_PROP_VBV_DELAY, - CAP_FLAG_OUTPUT_PORT}, - - {PEAK_BITRATE, ENC, H264 | HEVC, - /* default peak bitrate is 10% larger than avg bitrate */ - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_BITRATE_PEAK, - HFI_PROP_TOTAL_PEAK_BITRATE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {MIN_FRAME_QP, ENC, H264, - MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, - V4L2_CID_MPEG_VIDEO_H264_MIN_QP, - HFI_PROP_MIN_QP_PACKED, - CAP_FLAG_OUTPUT_PORT}, - - {MIN_FRAME_QP, ENC, HEVC | HEIC, - MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, - V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP, - HFI_PROP_MIN_QP_PACKED, - CAP_FLAG_OUTPUT_PORT}, - - {I_FRAME_MIN_QP, ENC, H264, - MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, - V4L2_CID_MPEG_VIDEO_H264_I_FRAME_MIN_QP}, - - {I_FRAME_MIN_QP, ENC, HEVC | HEIC, - MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, - V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_MIN_QP}, - - {P_FRAME_MIN_QP, ENC, H264, - MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, - V4L2_CID_MPEG_VIDEO_H264_P_FRAME_MIN_QP}, - - {P_FRAME_MIN_QP, ENC, HEVC | HEIC, - MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, - V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_MIN_QP}, - - {B_FRAME_MIN_QP, ENC, H264, - MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, - V4L2_CID_MPEG_VIDEO_H264_B_FRAME_MIN_QP}, - - {B_FRAME_MIN_QP, ENC, HEVC | HEIC, - MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, - V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_MIN_QP}, - - {MAX_FRAME_QP, ENC, H264, - MIN_QP_8BIT, MAX_QP, 1, MAX_QP, - V4L2_CID_MPEG_VIDEO_H264_MAX_QP, - HFI_PROP_MAX_QP_PACKED, - CAP_FLAG_OUTPUT_PORT}, - - {MAX_FRAME_QP, ENC, HEVC | HEIC, - MIN_QP_10BIT, MAX_QP, 1, MAX_QP, - V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP, - HFI_PROP_MAX_QP_PACKED, - CAP_FLAG_OUTPUT_PORT}, - - {I_FRAME_MAX_QP, ENC, H264, - MIN_QP_8BIT, MAX_QP, 1, MAX_QP, - V4L2_CID_MPEG_VIDEO_H264_I_FRAME_MAX_QP}, - - {I_FRAME_MAX_QP, ENC, HEVC | HEIC, - MIN_QP_10BIT, MAX_QP, 1, MAX_QP, - V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_MAX_QP}, - - {P_FRAME_MAX_QP, ENC, H264, - MIN_QP_8BIT, MAX_QP, 1, MAX_QP, - V4L2_CID_MPEG_VIDEO_H264_P_FRAME_MAX_QP}, - - {P_FRAME_MAX_QP, ENC, HEVC | HEIC, - MIN_QP_10BIT, MAX_QP, 1, MAX_QP, - V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_MAX_QP}, - - {B_FRAME_MAX_QP, ENC, H264, - MIN_QP_8BIT, MAX_QP, 1, MAX_QP, - V4L2_CID_MPEG_VIDEO_H264_B_FRAME_MAX_QP}, - - {B_FRAME_MAX_QP, ENC, HEVC | HEIC, - MIN_QP_10BIT, MAX_QP, 1, MAX_QP, - V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_MAX_QP}, - - {I_FRAME_QP, ENC, HEVC, - MIN_QP_10BIT, MAX_QP, 1, DEFAULT_QP, - V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP, - HFI_PROP_QP_PACKED, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {I_FRAME_QP, ENC, H264, - MIN_QP_8BIT, MAX_QP, 1, DEFAULT_QP, - V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP, - HFI_PROP_QP_PACKED, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {P_FRAME_QP, ENC, HEVC, - MIN_QP_10BIT, MAX_QP, 1, DEFAULT_QP, - V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP, - HFI_PROP_QP_PACKED, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {P_FRAME_QP, ENC, H264, - MIN_QP_8BIT, MAX_QP, 1, DEFAULT_QP, - V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP, - HFI_PROP_QP_PACKED, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {B_FRAME_QP, ENC, HEVC, - MIN_QP_10BIT, MAX_QP, 1, DEFAULT_QP, - V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP, - HFI_PROP_QP_PACKED, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {B_FRAME_QP, ENC, H264, - MIN_QP_8BIT, MAX_QP, 1, DEFAULT_QP, - V4L2_CID_MPEG_VIDEO_H264_B_FRAME_QP, - HFI_PROP_QP_PACKED, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {LAYER_TYPE, ENC, HEVC, - V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B, - V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P, - BIT(V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B) | - BIT(V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P), - V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P, - V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE, - HFI_PROP_LAYER_ENCODING_TYPE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {LAYER_TYPE, ENC, H264, - V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_B, - V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P, - BIT(V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_B) | - BIT(V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P), - V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P, - V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_TYPE, - HFI_PROP_LAYER_ENCODING_TYPE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {LAYER_ENABLE, ENC, H264, - 0, 1, 1, 0, - V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING, - HFI_PROP_LAYER_ENCODING_TYPE, - CAP_FLAG_OUTPUT_PORT}, - - {LAYER_ENABLE, ENC, HEVC, - 0, 1, 1, 0, - 0, - 0, - CAP_FLAG_OUTPUT_PORT}, - - {ENH_LAYER_COUNT, ENC, HEVC, - 0, 5, 1, 0, - V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER, - HFI_PROP_LAYER_COUNT, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {ENH_LAYER_COUNT, ENC, H264, - 0, 5, 1, 0, - V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_LAYER, - HFI_PROP_LAYER_COUNT, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {ENH_LAYER_COUNT, DEC, AV1, - 0, MAX_OP_POINT, 1, 0, - 0, - HFI_PROP_AV1_OP_POINT, - CAP_FLAG_INPUT_PORT}, - - {L0_BR, ENC, H264, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L0_BR, - HFI_PROP_BITRATE_LAYER1, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {L0_BR, ENC, HEVC, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L0_BR, - HFI_PROP_BITRATE_LAYER1, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {L1_BR, ENC, H264, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L1_BR, - HFI_PROP_BITRATE_LAYER2, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {L1_BR, ENC, HEVC, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L1_BR, - HFI_PROP_BITRATE_LAYER2, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {L2_BR, ENC, H264, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L2_BR, - HFI_PROP_BITRATE_LAYER3, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {L2_BR, ENC, HEVC, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L2_BR, - HFI_PROP_BITRATE_LAYER3, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {L3_BR, ENC, H264, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L3_BR, - HFI_PROP_BITRATE_LAYER4, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - {L3_BR, ENC, HEVC, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L3_BR, - HFI_PROP_BITRATE_LAYER4, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {L4_BR, ENC, H264, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L4_BR, - HFI_PROP_BITRATE_LAYER5, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {L4_BR, ENC, HEVC, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L4_BR, - HFI_PROP_BITRATE_LAYER5, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {L5_BR, ENC, H264, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L5_BR, - HFI_PROP_BITRATE_LAYER6, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {L5_BR, ENC, HEVC, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, - V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L5_BR, - HFI_PROP_BITRATE_LAYER6, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED}, - - {ENTROPY_MODE, ENC, H264, - V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC, - V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, - BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC) | - BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC), - V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, - V4L2_CID_MPEG_VIDEO_H264_ENTROPY_MODE, - HFI_PROP_CABAC_SESSION, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {ENTROPY_MODE, DEC, H264 | HEVC | VP9 | AV1, - V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC, - V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, - BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC) | - BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC), - V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, - 0, - HFI_PROP_CABAC_SESSION}, - - {PROFILE, ENC | DEC, H264, - V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE, - V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH, - BIT(V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE) | - BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH) | - BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_BASELINE) | - BIT(V4L2_MPEG_VIDEO_H264_PROFILE_MAIN) | - BIT(V4L2_MPEG_VIDEO_H264_PROFILE_HIGH), - V4L2_MPEG_VIDEO_H264_PROFILE_HIGH, - V4L2_CID_MPEG_VIDEO_H264_PROFILE, - HFI_PROP_PROFILE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {PROFILE, ENC | DEC, HEVC | HEIC, - V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN, - V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE, - BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN) | - BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE) | - BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10) | - BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE), - V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN, - V4L2_CID_MPEG_VIDEO_HEVC_PROFILE, - HFI_PROP_PROFILE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {PROFILE, DEC, VP9, - V4L2_MPEG_VIDEO_VP9_PROFILE_0, - V4L2_MPEG_VIDEO_VP9_PROFILE_2, - BIT(V4L2_MPEG_VIDEO_VP9_PROFILE_0) | - BIT(V4L2_MPEG_VIDEO_VP9_PROFILE_2), - V4L2_MPEG_VIDEO_VP9_PROFILE_0, - V4L2_CID_MPEG_VIDEO_VP9_PROFILE, - HFI_PROP_PROFILE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {PROFILE, DEC, AV1, - V4L2_MPEG_VIDC_AV1_PROFILE_MAIN, - V4L2_MPEG_VIDC_AV1_PROFILE_MAIN, - BIT(V4L2_MPEG_VIDC_AV1_PROFILE_MAIN), - V4L2_MPEG_VIDC_AV1_PROFILE_MAIN, - V4L2_CID_MPEG_VIDC_AV1_PROFILE, - HFI_PROP_PROFILE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {LEVEL, ENC, H264, - V4L2_MPEG_VIDEO_H264_LEVEL_1_0, - V4L2_MPEG_VIDEO_H264_LEVEL_5_2, - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1B) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_3) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_2), - V4L2_MPEG_VIDEO_H264_LEVEL_5_2, - V4L2_CID_MPEG_VIDEO_H264_LEVEL, - HFI_PROP_LEVEL, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {LEVEL, ENC, HEVC | HEIC, - V4L2_MPEG_VIDEO_HEVC_LEVEL_1, - V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1, - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1), - V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1, - V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, - HFI_PROP_LEVEL, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {LEVEL, DEC, H264, - V4L2_MPEG_VIDEO_H264_LEVEL_1_0, - V4L2_MPEG_VIDEO_H264_LEVEL_6_0, - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1B) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_3) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_0), - V4L2_MPEG_VIDEO_H264_LEVEL_6_0, - V4L2_CID_MPEG_VIDEO_H264_LEVEL, - HFI_PROP_LEVEL, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {LEVEL, DEC, HEVC | HEIC, - V4L2_MPEG_VIDEO_HEVC_LEVEL_1, - V4L2_MPEG_VIDEO_HEVC_LEVEL_6, - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6), - V4L2_MPEG_VIDEO_HEVC_LEVEL_6, - V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, - HFI_PROP_LEVEL, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {LEVEL, DEC, VP9, - V4L2_MPEG_VIDEO_VP9_LEVEL_1_0, - V4L2_MPEG_VIDEO_VP9_LEVEL_5_2, - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_1_0) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_1_1) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_2_0) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_2_1) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_3_0) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_3_1) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_4_0) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_4_1) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_0) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_1) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_2), - V4L2_MPEG_VIDEO_VP9_LEVEL_5_2, - V4L2_CID_MPEG_VIDEO_VP9_LEVEL, - HFI_PROP_LEVEL, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {LEVEL, DEC, AV1, - V4L2_MPEG_VIDC_AV1_LEVEL_2_0, - V4L2_MPEG_VIDC_AV1_LEVEL_6_0, - BIT(V4L2_MPEG_VIDC_AV1_LEVEL_2_0) | - BIT(V4L2_MPEG_VIDC_AV1_LEVEL_2_1) | - BIT(V4L2_MPEG_VIDC_AV1_LEVEL_2_2) | - BIT(V4L2_MPEG_VIDC_AV1_LEVEL_2_3) | - BIT(V4L2_MPEG_VIDC_AV1_LEVEL_3_0) | - BIT(V4L2_MPEG_VIDC_AV1_LEVEL_3_1) | - BIT(V4L2_MPEG_VIDC_AV1_LEVEL_3_2) | - BIT(V4L2_MPEG_VIDC_AV1_LEVEL_3_3) | - BIT(V4L2_MPEG_VIDC_AV1_LEVEL_4_0) | - BIT(V4L2_MPEG_VIDC_AV1_LEVEL_4_1) | - BIT(V4L2_MPEG_VIDC_AV1_LEVEL_4_2) | - BIT(V4L2_MPEG_VIDC_AV1_LEVEL_4_3) | - BIT(V4L2_MPEG_VIDC_AV1_LEVEL_5_0) | - BIT(V4L2_MPEG_VIDC_AV1_LEVEL_5_1) | - BIT(V4L2_MPEG_VIDC_AV1_LEVEL_5_2) | - BIT(V4L2_MPEG_VIDC_AV1_LEVEL_5_3) | - BIT(V4L2_MPEG_VIDC_AV1_LEVEL_6_0), - V4L2_MPEG_VIDC_AV1_LEVEL_6_0, - V4L2_CID_MPEG_VIDC_AV1_LEVEL, - HFI_PROP_LEVEL, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {AV1_TIER, DEC, AV1, - V4L2_MPEG_VIDC_AV1_TIER_MAIN, - V4L2_MPEG_VIDC_AV1_TIER_HIGH, - BIT(V4L2_MPEG_VIDC_AV1_TIER_MAIN) | - BIT(V4L2_MPEG_VIDC_AV1_TIER_HIGH), - V4L2_MPEG_VIDC_AV1_TIER_HIGH, - V4L2_CID_MPEG_VIDC_AV1_TIER, - HFI_PROP_TIER, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {HEVC_TIER, ENC | DEC, HEVC, - V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, - V4L2_MPEG_VIDEO_HEVC_TIER_HIGH, - BIT(V4L2_MPEG_VIDEO_HEVC_TIER_MAIN) | - BIT(V4L2_MPEG_VIDEO_HEVC_TIER_HIGH), - V4L2_MPEG_VIDEO_HEVC_TIER_HIGH, - V4L2_CID_MPEG_VIDEO_HEVC_TIER, - HFI_PROP_TIER, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {HEVC_TIER, ENC | DEC, HEIC, - V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, - V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, - BIT(V4L2_MPEG_VIDEO_HEVC_TIER_MAIN), - V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, - V4L2_CID_MPEG_VIDEO_HEVC_TIER, - HFI_PROP_TIER, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {LF_MODE, ENC, H264, - V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED, - DB_H264_DISABLE_SLICE_BOUNDARY, - BIT(V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED) | - BIT(V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_DISABLED) | - BIT(DB_H264_DISABLE_SLICE_BOUNDARY), - V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED, - V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_MODE, - HFI_PROP_DEBLOCKING_MODE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {LF_MODE, ENC, HEVC | HEIC, - V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_DISABLED, - DB_HEVC_DISABLE_SLICE_BOUNDARY, - BIT(V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_DISABLED) | - BIT(V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_ENABLED) | - BIT(DB_HEVC_DISABLE_SLICE_BOUNDARY), - V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_ENABLED, - V4L2_CID_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE, - HFI_PROP_DEBLOCKING_MODE, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {LF_ALPHA, ENC, H264, - -6, 6, 1, 0, - V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_ALPHA}, - - {LF_ALPHA, ENC, HEVC | HEIC, - -6, 6, 1, 0, - V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2}, - - {LF_BETA, ENC, H264, - -6, 6, 1, 0, - V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_BETA}, - - {LF_BETA, ENC, HEVC | HEIC, - -6, 6, 1, 0, - V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2}, - - {SLICE_MODE, ENC, H264 | HEVC, - V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, - V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_BYTES, - BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE) | - BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_MB) | - BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_BYTES), - V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, - V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE, - 0, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {SLICE_MODE, ENC, HEIC, - V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, - V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, - BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE), - V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, - V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE, - 0, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - - {SLICE_MAX_BYTES, ENC, H264 | HEVC, - MIN_SLICE_BYTE_SIZE, MAX_SLICE_BYTE_SIZE, - 1, MIN_SLICE_BYTE_SIZE, - V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES, - HFI_PROP_MULTI_SLICE_BYTES_COUNT, - CAP_FLAG_OUTPUT_PORT}, - - {SLICE_MAX_MB, ENC, H264 | HEVC, - 1, MAX_SLICE_MB_SIZE, 1, 1, - V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB, - HFI_PROP_MULTI_SLICE_MB_COUNT, - CAP_FLAG_OUTPUT_PORT}, - - {MB_RC, ENC, H264 | HEVC, - 0, 1, 1, 1, - V4L2_CID_MPEG_VIDEO_MB_RC_ENABLE, - 0, - CAP_FLAG_OUTPUT_PORT}, - - {TRANSFORM_8X8, ENC, H264, - 0, 1, 1, 1, - V4L2_CID_MPEG_VIDEO_H264_8X8_TRANSFORM, - HFI_PROP_8X8_TRANSFORM, - CAP_FLAG_OUTPUT_PORT}, - - {CHROMA_QP_INDEX_OFFSET, ENC, HEVC, - MIN_CHROMA_QP_OFFSET, MAX_CHROMA_QP_OFFSET, - 1, MAX_CHROMA_QP_OFFSET, - V4L2_CID_MPEG_VIDEO_H264_CHROMA_QP_INDEX_OFFSET, - HFI_PROP_CHROMA_QP_OFFSET, - CAP_FLAG_OUTPUT_PORT}, - - {DISPLAY_DELAY_ENABLE, DEC, H264 | HEVC | VP9 | AV1, - 0, 1, 1, 0, - V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY_ENABLE, - HFI_PROP_DECODE_ORDER_OUTPUT, - CAP_FLAG_INPUT_PORT}, - - {DISPLAY_DELAY, DEC, H264 | HEVC | VP9 | AV1, - 0, 1, 1, 0, - V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY, - HFI_PROP_DECODE_ORDER_OUTPUT, - CAP_FLAG_INPUT_PORT}, - - {OUTPUT_ORDER, DEC, H264 | HEVC | VP9 | AV1, - 0, 1, 1, 0, - 0, - HFI_PROP_DECODE_ORDER_OUTPUT, - CAP_FLAG_INPUT_PORT}, - - {INPUT_BUF_HOST_MAX_COUNT, ENC | DEC, CODECS_ALL, - DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT, - 1, DEFAULT_MAX_HOST_BUF_COUNT, - 0, - HFI_PROP_BUFFER_HOST_MAX_COUNT, - CAP_FLAG_INPUT_PORT}, - - {OUTPUT_BUF_HOST_MAX_COUNT, ENC | DEC, CODECS_ALL, - DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT, - 1, DEFAULT_MAX_HOST_BUF_COUNT, - 0, - HFI_PROP_BUFFER_HOST_MAX_COUNT, - CAP_FLAG_OUTPUT_PORT}, - - {CONCEAL_COLOR_8BIT, DEC, CODECS_ALL, 0x0, 0xff3fcff, 1, - DEFAULT_VIDEO_CONCEAL_COLOR_BLACK, - V4L2_CID_MPEG_VIDEO_MUTE_YUV, - HFI_PROP_CONCEAL_COLOR_8BIT, - CAP_FLAG_INPUT_PORT}, - - {CONCEAL_COLOR_10BIT, DEC, CODECS_ALL, 0x0, 0x3fffffff, 1, - DEFAULT_VIDEO_CONCEAL_COLOR_BLACK, - V4L2_CID_MPEG_VIDEO_MUTE_YUV, - HFI_PROP_CONCEAL_COLOR_10BIT, - CAP_FLAG_INPUT_PORT}, - - {STAGE, DEC|ENC, CODECS_ALL, - MSM_VIDC_STAGE_1, - MSM_VIDC_STAGE_2, 1, - MSM_VIDC_STAGE_2, - 0, - HFI_PROP_STAGE}, - - {PIPE, DEC|ENC, CODECS_ALL, - MSM_VIDC_PIPE_1, - MSM_VIDC_PIPE_2, 1, - MSM_VIDC_PIPE_2, - 0, - HFI_PROP_PIPE}, - - {POC, DEC, H264, - 0, 2, 1, 1, - 0, - HFI_PROP_PIC_ORDER_CNT_TYPE, - CAP_FLAG_VOLATILE}, - - /* - * value of MAX_NUM_REORDER_FRAMES is 32 packed as mentioned below - * (max_num_reorder_count << 16) | max_dec_frame_buffering_count - */ - {MAX_NUM_REORDER_FRAMES, DEC, H264 | HEVC, - 0, INT_MAX, 1, 0, - V4L2_CID_MPEG_VIDC_MAX_NUM_REORDER_FRAMES, - HFI_PROP_MAX_NUM_REORDER_FRAMES, - CAP_FLAG_VOLATILE}, - - {QUALITY_MODE, ENC, CODECS_ALL, - MSM_VIDC_MAX_QUALITY_MODE, - MSM_VIDC_POWER_SAVE_MODE, 1, - MSM_VIDC_POWER_SAVE_MODE}, - - {CODED_FRAMES, DEC, H264 | HEVC | HEIC, - CODED_FRAMES_PROGRESSIVE, CODED_FRAMES_INTERLACE, - 1, CODED_FRAMES_PROGRESSIVE, - V4L2_CID_MPEG_VIDC_INTERLACE, - HFI_PROP_CODED_FRAMES, - CAP_FLAG_VOLATILE}, - - {BIT_DEPTH, DEC, CODECS_ALL, BIT_DEPTH_8, BIT_DEPTH_10, 1, BIT_DEPTH_8, - 0, - HFI_PROP_LUMA_CHROMA_BIT_DEPTH}, - - {CODEC_CONFIG, DEC, H264 | HEVC | HEIC | AV1, 0, 1, 1, 0, - V4L2_CID_MPEG_VIDC_CODEC_CONFIG, 0, - CAP_FLAG_DYNAMIC_ALLOWED}, - - {BITSTREAM_SIZE_OVERWRITE, DEC, CODECS_ALL, 0, INT_MAX, 1, 0, - V4L2_CID_MPEG_VIDC_MIN_BITSTREAM_SIZE_OVERWRITE}, - - {THUMBNAIL_MODE, DEC, CODECS_ALL, - 0, 1, 1, 0, - V4L2_CID_MPEG_VIDC_THUMBNAIL_MODE, - HFI_PROP_THUMBNAIL_MODE, - CAP_FLAG_INPUT_PORT}, - - {DEFAULT_HEADER, DEC, CODECS_ALL, - 0, 1, 1, 0, - 0, - HFI_PROP_DEC_DEFAULT_HEADER}, - - {RAP_FRAME, DEC, CODECS_ALL, - 0, 1, 1, 1, - 0, - HFI_PROP_DEC_START_FROM_RAP_FRAME, - CAP_FLAG_INPUT_PORT}, - - {SEQ_CHANGE_AT_SYNC_FRAME, DEC, CODECS_ALL, - 0, 1, 1, 1, - 0, - HFI_PROP_SEQ_CHANGE_AT_SYNC_FRAME, - CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - - {PRIORITY, DEC|ENC, CODECS_ALL, - 0, 4, 1, 4, - V4L2_CID_MPEG_VIDC_PRIORITY, - HFI_PROP_SESSION_PRIORITY, - CAP_FLAG_DYNAMIC_ALLOWED}, - - {FIRMWARE_PRIORITY_OFFSET, DEC | ENC, CODECS_ALL, - 1, 1, 1, 1}, - - {CRITICAL_PRIORITY, ENC, CODECS_ALL, - 0, 1, 1, 0, - V4L2_CID_MPEG_VIDC_CRITICAL_PRIORITY}, - - {RESERVE_DURATION, ENC, CODECS_ALL, - 0, INT_MAX, 1, 0, - V4L2_CID_MPEG_VIDC_RESERVE_DURATION, - HFI_CMD_RESERVE, - CAP_FLAG_DYNAMIC_ALLOWED}, - - {ENC_IP_CR, ENC, CODECS_ALL, - 0, S32_MAX, 1, 0, - V4L2_CID_MPEG_VIDC_ENC_INPUT_COMPRESSION_RATIO, - 0, CAP_FLAG_DYNAMIC_ALLOWED}, - - {FILM_GRAIN, DEC, AV1, - 0, 1, 1, 0, - V4L2_CID_MPEG_VIDC_AV1D_FILM_GRAIN_PRESENT, - HFI_PROP_AV1_FILM_GRAIN_PRESENT, - CAP_FLAG_VOLATILE}, - - {SUPER_BLOCK, DEC, AV1, - 0, 1, 1, 0, - 0, - HFI_PROP_AV1_SUPER_BLOCK_ENABLED}, - - {DRAP, DEC, AV1, - 0, S32_MAX, 1, 0, - 0, - HFI_PROP_AV1_DRAP_CONFIG, - CAP_FLAG_INPUT_PORT}, - - {LAST_FLAG_EVENT_ENABLE, DEC|ENC, CODECS_ALL, - 0, 1, 1, 0, - V4L2_CID_MPEG_VIDC_LAST_FLAG_EVENT_ENABLE}, - - {META_BITSTREAM_RESOLUTION, DEC, AV1, - MSM_VIDC_META_DISABLE, - MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_INPUT | - MSM_VIDC_META_RX_OUTPUT, - 0, MSM_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_BITSTREAM_RESOLUTION, - HFI_PROP_BITSTREAM_RESOLUTION, - CAP_FLAG_BITMASK | CAP_FLAG_META}, - - {META_CROP_OFFSETS, DEC, AV1, - MSM_VIDC_META_DISABLE, - MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_INPUT | - MSM_VIDC_META_RX_OUTPUT, - 0, MSM_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_CROP_OFFSETS, - HFI_PROP_CROP_OFFSETS, - CAP_FLAG_BITMASK | CAP_FLAG_META}, - - {ALL_INTRA, ENC, H264 | HEVC, - 0, 1, 1, 0, - 0, - 0, - CAP_FLAG_OUTPUT_PORT}, - - {META_LTR_MARK_USE, ENC, H264 | HEVC, - MSM_VIDC_META_DISABLE, - MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, - 0, MSM_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_LTR_MARK_USE_DETAILS, - HFI_PROP_LTR_MARK_USE_DETAILS, - CAP_FLAG_BITMASK | CAP_FLAG_META}, - - {META_SEQ_HDR_NAL, ENC, CODECS_ALL, - MSM_VIDC_META_DISABLE, - MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, - 0, MSM_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_SEQ_HEADER_NAL, - HFI_PROP_METADATA_SEQ_HEADER_NAL, - CAP_FLAG_BITMASK | CAP_FLAG_META}, - - {META_DPB_MISR, DEC, CODECS_ALL, - MSM_VIDC_META_DISABLE, - MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, - 0, MSM_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_DPB_LUMA_CHROMA_MISR, - HFI_PROP_DPB_LUMA_CHROMA_MISR, - CAP_FLAG_BITMASK | CAP_FLAG_META}, - - {META_OPB_MISR, DEC, CODECS_ALL, - MSM_VIDC_META_DISABLE, - MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, - 0, MSM_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_OPB_LUMA_CHROMA_MISR, - HFI_PROP_OPB_LUMA_CHROMA_MISR, - CAP_FLAG_BITMASK | CAP_FLAG_META}, - - {META_INTERLACE, DEC, H264, - MSM_VIDC_META_DISABLE, - MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, - 0, MSM_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_INTERLACE, - HFI_PROP_INTERLACE_INFO, - CAP_FLAG_BITMASK | CAP_FLAG_META}, - - {META_TIMESTAMP, DEC | ENC, CODECS_ALL, - MSM_VIDC_META_DISABLE, - MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, - 0, MSM_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_TIMESTAMP, - HFI_PROP_TIMESTAMP, - CAP_FLAG_BITMASK | CAP_FLAG_META}, - - {META_CONCEALED_MB_CNT, DEC, CODECS_ALL, - MSM_VIDC_META_DISABLE, - MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, - 0, MSM_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_CONCEALED_MB_COUNT, - HFI_PROP_CONEALED_MB_COUNT, - CAP_FLAG_BITMASK | CAP_FLAG_META}, - - {META_HIST_INFO, DEC, HEVC | AV1 | VP9, - MSM_VIDC_META_DISABLE, - MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, - 0, MSM_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_HISTOGRAM_INFO, - HFI_PROP_HISTOGRAM_INFO, - CAP_FLAG_BITMASK | CAP_FLAG_META}, - - {META_TRANSCODING_STAT_INFO, DEC, HEVC|H264, - MSM_VIDC_META_DISABLE, - MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, - 0, MSM_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_TRANSCODE_STAT_INFO, - HFI_PROP_TRANSCODING_STAT_INFO, - CAP_FLAG_BITMASK | CAP_FLAG_META}, - - {META_TRANSCODING_STAT_INFO, ENC, HEVC|H264, - MSM_VIDC_META_DISABLE, - MSM_VIDC_META_DYN_ENABLE | MSM_VIDC_META_TX_INPUT, - 0, MSM_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_TRANSCODE_STAT_INFO, - HFI_PROP_TRANSCODING_STAT_INFO, - CAP_FLAG_BITMASK | CAP_FLAG_META}, - - {META_PICTURE_TYPE, DEC, CODECS_ALL, - MSM_VIDC_META_DISABLE, - MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_INPUT, - 0, MSM_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_PICTURE_TYPE, - HFI_PROP_PICTURE_TYPE, - CAP_FLAG_BITMASK | CAP_FLAG_META | CAP_FLAG_DYNAMIC_ALLOWED}, - - {META_SEI_MASTERING_DISP, ENC, HEVC | HEIC, - MSM_VIDC_META_DISABLE, - MSM_VIDC_META_ENABLE | - MSM_VIDC_META_DYN_ENABLE | MSM_VIDC_META_TX_INPUT, - 0, MSM_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_SEI_MASTERING_DISPLAY_COLOUR, - HFI_PROP_SEI_MASTERING_DISPLAY_COLOUR, - CAP_FLAG_BITMASK | CAP_FLAG_META}, - - {META_SEI_MASTERING_DISP, DEC, HEVC | HEIC | AV1, - MSM_VIDC_META_DISABLE, - MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_INPUT | - MSM_VIDC_META_RX_OUTPUT, - 0, MSM_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_SEI_MASTERING_DISPLAY_COLOUR, - HFI_PROP_SEI_MASTERING_DISPLAY_COLOUR, - CAP_FLAG_BITMASK | CAP_FLAG_META}, - - {META_SEI_CLL, ENC, HEVC | HEIC, - MSM_VIDC_META_DISABLE, - MSM_VIDC_META_ENABLE | - MSM_VIDC_META_DYN_ENABLE | MSM_VIDC_META_TX_INPUT, - 0, MSM_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_SEI_CONTENT_LIGHT_LEVEL, - HFI_PROP_SEI_CONTENT_LIGHT_LEVEL, - CAP_FLAG_BITMASK | CAP_FLAG_META}, - - {META_SEI_CLL, DEC, HEVC | HEIC | AV1, - MSM_VIDC_META_DISABLE, - MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_INPUT | - MSM_VIDC_META_RX_OUTPUT, - 0, MSM_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_SEI_CONTENT_LIGHT_LEVEL, - HFI_PROP_SEI_CONTENT_LIGHT_LEVEL, - CAP_FLAG_BITMASK | CAP_FLAG_META}, - - {META_HDR10PLUS, ENC, HEVC | HEIC, - MSM_VIDC_META_DISABLE, - MSM_VIDC_META_ENABLE | - MSM_VIDC_META_DYN_ENABLE | MSM_VIDC_META_TX_INPUT, - 0, MSM_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_HDR10PLUS, - HFI_PROP_SEI_HDR10PLUS_USERDATA, - CAP_FLAG_BITMASK | CAP_FLAG_META}, - - {META_HDR10PLUS, DEC, HEVC | HEIC | AV1, - MSM_VIDC_META_DISABLE, - MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_INPUT | - MSM_VIDC_META_RX_OUTPUT, - 0, MSM_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_HDR10PLUS, - HFI_PROP_SEI_HDR10PLUS_USERDATA, - CAP_FLAG_BITMASK | CAP_FLAG_META}, - - {META_DOLBY_RPU, ENC, HEVC, - MSM_VIDC_META_DISABLE, - MSM_VIDC_META_ENABLE | MSM_VIDC_META_TX_INPUT, - 0, MSM_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_DOLBY_RPU, - HFI_PROP_DOLBY_RPU_METADATA, - CAP_FLAG_BITMASK | CAP_FLAG_META}, - - {META_DOLBY_RPU, DEC, H264 | HEVC, - MSM_VIDC_META_DISABLE, - MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, - 0, MSM_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_DOLBY_RPU, - HFI_PROP_DOLBY_RPU_METADATA, - CAP_FLAG_BITMASK | CAP_FLAG_META}, - - {META_EVA_STATS, ENC, H264 | HEVC, - MSM_VIDC_META_DISABLE, - MSM_VIDC_META_ENABLE | - MSM_VIDC_META_DYN_ENABLE | MSM_VIDC_META_TX_INPUT, - 0, MSM_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_EVA_STATS, - HFI_PROP_EVA_STAT_INFO, - CAP_FLAG_BITMASK | CAP_FLAG_META}, - - {META_BUF_TAG, ENC, CODECS_ALL, - MSM_VIDC_META_DISABLE, - MSM_VIDC_META_ENABLE | MSM_VIDC_META_TX_INPUT | - MSM_VIDC_META_RX_OUTPUT, - 0, MSM_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_BUFFER_TAG, - HFI_PROP_BUFFER_TAG, - CAP_FLAG_BITMASK | CAP_FLAG_META}, - - /* - * when fence enabled, client needs output buffer_tag - * in input metadata buffer done. - */ - {META_BUF_TAG, DEC, CODECS_ALL, - MSM_VIDC_META_DISABLE, - MSM_VIDC_META_ENABLE | MSM_VIDC_META_TX_INPUT | - MSM_VIDC_META_TX_OUTPUT | MSM_VIDC_META_RX_INPUT | - MSM_VIDC_META_RX_OUTPUT, - 0, MSM_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_BUFFER_TAG, - HFI_PROP_BUFFER_TAG, - CAP_FLAG_BITMASK | CAP_FLAG_META | CAP_FLAG_DYNAMIC_ALLOWED}, - - {META_DPB_TAG_LIST, DEC, CODECS_ALL, - MSM_VIDC_META_DISABLE, - MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_INPUT, - 0, MSM_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_DPB_TAG_LIST, - HFI_PROP_DPB_TAG_LIST, - CAP_FLAG_BITMASK | CAP_FLAG_META}, - - {META_SUBFRAME_OUTPUT, ENC, HEIC | H264 | HEVC, - MSM_VIDC_META_DISABLE, - MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, - 0, MSM_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_SUBFRAME_OUTPUT, - HFI_PROP_SUBFRAME_OUTPUT, - CAP_FLAG_BITMASK | CAP_FLAG_META}, - - {META_SUBFRAME_OUTPUT, DEC, CODECS_ALL, - MSM_VIDC_META_DISABLE, - MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, - 0, MSM_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_SUBFRAME_OUTPUT, - HFI_PROP_SUBFRAME_OUTPUT, - CAP_FLAG_BITMASK | CAP_FLAG_META}, - - {META_ENC_QP_METADATA, ENC, CODECS_ALL, - MSM_VIDC_META_DISABLE, - MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, - 0, MSM_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_ENC_QP_METADATA, - HFI_PROP_ENC_QP_METADATA, - CAP_FLAG_BITMASK | CAP_FLAG_META}, - - {META_ROI_INFO, ENC, H264 | HEVC, - MSM_VIDC_META_DISABLE, - MSM_VIDC_META_ENABLE | MSM_VIDC_META_TX_INPUT, - 0, MSM_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_ROI_INFO, - HFI_PROP_ROI_INFO, - CAP_FLAG_INPUT_PORT | CAP_FLAG_BITMASK | CAP_FLAG_META}, - - {META_SALIENCY_INFO, ENC, H264 | HEVC, - MSM_VIDC_META_DISABLE, - MSM_VIDC_META_ENABLE | MSM_VIDC_META_TX_INPUT, - 0, MSM_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_SALIENCY_INFO, - HFI_PROP_ROI_AS_SALIENCY_INFO, - CAP_FLAG_INPUT_PORT | CAP_FLAG_BITMASK | CAP_FLAG_META}, - - {META_DEC_QP_METADATA, DEC, CODECS_ALL, - MSM_VIDC_META_DISABLE, - MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, - 0, MSM_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_DEC_QP_METADATA, - HFI_PROP_DEC_QP_METADATA, - CAP_FLAG_BITMASK | CAP_FLAG_META}, - - {GRID_ENABLE, ENC, HEIC, - 0, 1, 1, 1, - 0, - HFI_PROP_HEIC_GRID_ENABLE, - CAP_FLAG_OUTPUT_PORT}, - - {GRID_SIZE, ENC, HEIC, - HEIC_GRID_WIDTH, HEIC_GRID_WIDTH * 2, - HEIC_GRID_WIDTH, HEIC_GRID_WIDTH, - V4L2_CID_MPEG_VIDC_GRID_WIDTH}, - - {COMPLEXITY, ENC, H264 | HEVC, - 0, 100, - 1, DEFAULT_COMPLEXITY, - V4L2_CID_MPEG_VIDC_VENC_COMPLEXITY}, - - {DELIVERY_MODE, ENC, HEVC, - 0, 1, 1, 0, - V4L2_CID_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE, - HFI_PROP_ENABLE_SLICE_DELIVERY, - CAP_FLAG_OUTPUT_PORT}, - - {DELIVERY_MODE, ENC, H264, - 0, 1, 1, 0, - V4L2_CID_MPEG_VIDC_H264_ENCODE_DELIVERY_MODE, - HFI_PROP_ENABLE_SLICE_DELIVERY, - CAP_FLAG_OUTPUT_PORT}, - - {SIGNAL_COLOR_INFO, ENC, CODECS_ALL, - 0, INT_MAX, 1, 0, - V4L2_CID_MPEG_VIDC_SIGNAL_COLOR_INFO, - HFI_PROP_SIGNAL_COLOR_INFO, - CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, -}; - -static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_volcano_v0[] = { - /* {cap, domain, codec, - * parents, - * children, - * adjust, set} - */ - - {PIX_FMTS, ENC, H264, - {META_ROI_INFO, IR_PERIOD, CSC}}, - - {PIX_FMTS, ENC, HEVC, - {PROFILE, MIN_FRAME_QP, MAX_FRAME_QP, I_FRAME_QP, P_FRAME_QP, - B_FRAME_QP, META_ROI_INFO, MIN_QUALITY, BLUR_TYPES, IR_PERIOD, - LTR_COUNT, CSC}}, - - {PIX_FMTS, ENC, HEIC, - {PROFILE, CSC}}, - - {PIX_FMTS, DEC, HEVC | HEIC, - {PROFILE}}, - - {FRAME_RATE, ENC, CODECS_ALL, - {0}, - NULL, - msm_vidc_set_q16}, - - {FRAME_RATE, DEC, CODECS_ALL, - {0}, - msm_vidc_adjust_dec_frame_rate}, - - {OPERATING_RATE, DEC, CODECS_ALL, - {0}, - msm_vidc_adjust_dec_operating_rate}, - - {ENC_RING_BUFFER_COUNT, ENC, CODECS_ALL, - {0}, - NULL, - NULL}, - - {SECURE_MODE, ENC | DEC, H264 | HEVC | VP9 | AV1, - {0}, - NULL, - msm_vidc_set_u32}, - - {META_OUTBUF_FENCE, DEC, H264 | HEVC | AV1 | VP9, - {LOWLATENCY_MODE, OUTBUF_FENCE_TYPE, OUTBUF_FENCE_DIRECTION}, - NULL, - NULL}, - - {INBUF_FENCE_TYPE, DEC, H264 | HEVC | VP9 | AV1, - {0}, - NULL, - NULL}, - - {OUTBUF_FENCE_TYPE, DEC, H264 | HEVC | VP9 | AV1, - {0}, - msm_vidc_adjust_dec_outbuf_fence_type, - msm_vidc_set_outbuf_fence_type}, - - {INBUF_FENCE_DIRECTION, DEC, H264 | HEVC | VP9 | AV1, - {0}, - NULL, - NULL}, - - {OUTBUF_FENCE_DIRECTION, DEC, H264 | HEVC | VP9 | AV1, - {0}, - msm_vidc_adjust_dec_outbuf_fence_direction, - msm_vidc_set_outbuf_fence_direction}, - - {FENCE_ERROR_DATA_CORRUPT, DEC, H264 | HEVC | VP9 | AV1, - {0}, - NULL, - msm_vidc_set_u32}, - - {HFLIP, ENC, CODECS_ALL, - {0}, - NULL, - msm_vidc_set_flip}, - - {VFLIP, ENC, CODECS_ALL, - {0}, - NULL, - msm_vidc_set_flip}, - - {ROTATION, ENC, CODECS_ALL, - {0}, - NULL, - msm_vidc_set_rotation}, - - {SUPER_FRAME, ENC, H264 | HEVC, - {INPUT_BUF_HOST_MAX_COUNT, OUTPUT_BUF_HOST_MAX_COUNT}, - NULL, - NULL}, - - {SLICE_DECODE, DEC, H264 | HEVC | AV1, - {0}, - NULL, - NULL}, - - {HEADER_MODE, ENC, CODECS_ALL, - {0}, - NULL, - msm_vidc_set_header_mode}, - - {WITHOUT_STARTCODE, ENC, CODECS_ALL, - {0}, - NULL, - msm_vidc_set_nal_length}, - - {WITHOUT_STARTCODE, DEC, AV1, - {0}, - NULL, - msm_vidc_set_u32}, - - {REQUEST_I_FRAME, ENC, H264 | HEVC, - {0}, - NULL, - msm_vidc_set_req_sync_frame}, - - {BIT_RATE, ENC, H264, - {PEAK_BITRATE, BITRATE_BOOST, L0_BR}, - msm_vidc_adjust_bitrate, - msm_vidc_set_bitrate}, - - {BIT_RATE, ENC, HEVC, - {PEAK_BITRATE, BITRATE_BOOST, L0_BR}, - msm_vidc_adjust_bitrate, - msm_vidc_set_bitrate}, - - {BITRATE_MODE, ENC, H264, - {LTR_COUNT, IR_PERIOD, TIME_DELTA_BASED_RC, I_FRAME_QP, - P_FRAME_QP, B_FRAME_QP, ENH_LAYER_COUNT, BIT_RATE, - META_ROI_INFO, MIN_QUALITY, BITRATE_BOOST, VBV_DELAY, - PEAK_BITRATE, SLICE_MODE, CONTENT_ADAPTIVE_CODING, - BLUR_TYPES, LOWLATENCY_MODE, META_TRANSCODING_STAT_INFO}, - msm_vidc_adjust_bitrate_mode, - msm_vidc_set_u32_enum}, - - {BITRATE_MODE, ENC, HEVC, - {LTR_COUNT, IR_PERIOD, TIME_DELTA_BASED_RC, I_FRAME_QP, - P_FRAME_QP, B_FRAME_QP, CONSTANT_QUALITY, ENH_LAYER_COUNT, - BIT_RATE, META_ROI_INFO, MIN_QUALITY, BITRATE_BOOST, VBV_DELAY, - PEAK_BITRATE, SLICE_MODE, CONTENT_ADAPTIVE_CODING, - BLUR_TYPES, LOWLATENCY_MODE, META_EVA_STATS, META_TRANSCODING_STAT_INFO}, - msm_vidc_adjust_bitrate_mode, - msm_vidc_set_u32_enum}, - - {BITRATE_MODE, ENC, HEIC, - {TIME_DELTA_BASED_RC, CONSTANT_QUALITY}, - msm_vidc_adjust_bitrate_mode, - msm_vidc_set_u32_enum}, - - {CONSTANT_QUALITY, ENC, HEVC | HEIC, - {0}, - NULL, - msm_vidc_set_constant_quality}, - - {GOP_SIZE, ENC, CODECS_ALL, - {ALL_INTRA}, - msm_vidc_adjust_gop_size, - msm_vidc_set_gop_size}, - - {GOP_SIZE, ENC, HEIC, - {0}, - NULL, - msm_vidc_set_u32}, - - {B_FRAME, ENC, H264 | HEVC, - {ALL_INTRA}, - msm_vidc_adjust_b_frame, - msm_vidc_set_u32}, - - {B_FRAME, ENC, HEIC, - {0}, - NULL, - msm_vidc_set_u32}, - - {BLUR_TYPES, ENC, H264 | HEVC, - {BLUR_RESOLUTION}, - msm_vidc_adjust_blur_type, - msm_vidc_set_u32_enum}, - - {BLUR_RESOLUTION, ENC, H264 | HEVC, - {0}, - msm_vidc_adjust_blur_resolution, - msm_vidc_set_blur_resolution}, - - {CSC, ENC, CODECS_ALL, - {0}, - msm_vidc_adjust_csc, - msm_vidc_set_u32}, - - {CSC_CUSTOM_MATRIX, ENC, CODECS_ALL, - {0}, - NULL, - msm_vidc_set_csc_custom_matrix}, - - {LOWLATENCY_MODE, ENC, H264 | HEVC, - {STAGE, BIT_RATE}, - msm_vidc_adjust_enc_lowlatency_mode, - NULL}, - - {LOWLATENCY_MODE, DEC, H264 | HEVC | AV1, - {STAGE}, - msm_vidc_adjust_dec_lowlatency_mode, - NULL}, - - {LOWLATENCY_MODE, DEC, VP9, - {STAGE}, - msm_vidc_adjust_dec_lowlatency_mode, - NULL}, - - {LTR_COUNT, ENC, H264 | HEVC, - {0}, - msm_vidc_adjust_ltr_count, - msm_vidc_set_u32}, - - {USE_LTR, ENC, H264 | HEVC, - {0}, - msm_vidc_adjust_use_ltr, - msm_vidc_set_use_and_mark_ltr}, - - {MARK_LTR, ENC, H264 | HEVC, - {0}, - msm_vidc_adjust_mark_ltr, - msm_vidc_set_use_and_mark_ltr}, - - {IR_PERIOD, ENC, H264 | HEVC, - {0}, - msm_vidc_adjust_ir_period, - msm_vidc_set_ir_period}, - - {AU_DELIMITER, ENC, H264 | HEVC, - {0}, - NULL, - msm_vidc_set_u32}, - - {BASELAYER_PRIORITY, ENC, H264, - {0}, - NULL, - msm_vidc_set_u32}, - - {TIME_DELTA_BASED_RC, ENC, CODECS_ALL, - {0}, - msm_vidc_adjust_delta_based_rc, - msm_vidc_set_u32}, - - {CONTENT_ADAPTIVE_CODING, ENC, H264 | HEVC, - {REQUEST_PREPROCESS}, - msm_vidc_adjust_brs, - msm_vidc_set_vbr_related_properties}, - - {REQUEST_PREPROCESS, ENC, H264 | HEVC, - {0}, - msm_vidc_adjust_preprocess, - msm_vidc_set_preprocess}, - - {BITRATE_BOOST, ENC, H264 | HEVC, - {0}, - msm_vidc_adjust_bitrate_boost, - msm_vidc_set_vbr_related_properties}, - - {MIN_QUALITY, ENC, H264 | HEVC, - {BLUR_TYPES}, - msm_vidc_adjust_min_quality, - msm_vidc_set_u32}, - - {VBV_DELAY, ENC, H264 | HEVC, - {0}, - NULL, - msm_vidc_set_cbr_related_properties}, - - {PEAK_BITRATE, ENC, H264 | HEVC, - {0}, - msm_vidc_adjust_peak_bitrate, - msm_vidc_set_cbr_related_properties}, - - {MIN_FRAME_QP, ENC, H264, - {0}, - NULL, - msm_vidc_set_min_qp}, - - {MIN_FRAME_QP, ENC, HEVC, - {0}, - msm_vidc_adjust_hevc_min_qp, - msm_vidc_set_min_qp}, - - {MAX_FRAME_QP, ENC, H264, - {0}, - NULL, - msm_vidc_set_max_qp}, - - {MAX_FRAME_QP, ENC, HEVC, - {0}, - msm_vidc_adjust_hevc_max_qp, - msm_vidc_set_max_qp}, - - {I_FRAME_QP, ENC, HEVC, - {0}, - msm_vidc_adjust_hevc_i_frame_qp, - msm_vidc_set_frame_qp}, - - {I_FRAME_QP, ENC, H264, - {0}, - NULL, - msm_vidc_set_frame_qp}, - - {P_FRAME_QP, ENC, HEVC, - {0}, - msm_vidc_adjust_hevc_p_frame_qp, - msm_vidc_set_frame_qp}, - - {P_FRAME_QP, ENC, H264, - {0}, - NULL, - msm_vidc_set_frame_qp}, - - {B_FRAME_QP, ENC, HEVC, - {0}, - msm_vidc_adjust_hevc_b_frame_qp, - msm_vidc_set_frame_qp}, - - {B_FRAME_QP, ENC, H264, - {0}, - NULL, - msm_vidc_set_frame_qp}, - - {LAYER_TYPE, ENC, H264 | HEVC, - {CONTENT_ADAPTIVE_CODING, LTR_COUNT}}, - - {LAYER_ENABLE, ENC, H264 | HEVC, - {CONTENT_ADAPTIVE_CODING}}, - - {ENH_LAYER_COUNT, ENC, H264 | HEVC, - {GOP_SIZE, B_FRAME, BIT_RATE, MIN_QUALITY, SLICE_MODE, LTR_COUNT}, - msm_vidc_adjust_layer_count, - msm_vidc_set_layer_count_and_type}, - - {ENH_LAYER_COUNT, DEC, AV1, - {0}, - NULL, - msm_vidc_set_u32}, - - {L0_BR, ENC, H264 | HEVC, - {L1_BR}, - msm_vidc_adjust_layer_bitrate, - msm_vidc_set_layer_bitrate}, - - {L1_BR, ENC, H264 | HEVC, - {L2_BR}, - msm_vidc_adjust_layer_bitrate, - msm_vidc_set_layer_bitrate}, - - {L2_BR, ENC, H264 | HEVC, - {L3_BR}, - msm_vidc_adjust_layer_bitrate, - msm_vidc_set_layer_bitrate}, - - {L3_BR, ENC, H264 | HEVC, - {L4_BR}, - msm_vidc_adjust_layer_bitrate, - msm_vidc_set_layer_bitrate}, - - {L4_BR, ENC, H264 | HEVC, - {L5_BR}, - msm_vidc_adjust_layer_bitrate, - msm_vidc_set_layer_bitrate}, - - {L5_BR, ENC, H264 | HEVC, - {0}, - msm_vidc_adjust_layer_bitrate, - msm_vidc_set_layer_bitrate}, - - {ENTROPY_MODE, ENC, H264, - {BIT_RATE}, - msm_vidc_adjust_entropy_mode, - msm_vidc_set_u32}, - - {PROFILE, ENC, H264, - {ENTROPY_MODE, TRANSFORM_8X8}, - NULL, - msm_vidc_set_u32_enum}, - - {PROFILE, DEC, H264, - {ENTROPY_MODE}, - NULL, - msm_vidc_set_u32_enum}, - - {PROFILE, ENC, HEVC | HEIC, - {META_SEI_MASTERING_DISP, META_SEI_CLL, META_HDR10PLUS}, - msm_vidc_adjust_profile, - msm_vidc_set_u32_enum}, - - {PROFILE, DEC, HEVC | HEIC, - {0}, - msm_vidc_adjust_profile, - msm_vidc_set_u32_enum}, - - {PROFILE, DEC, VP9 | AV1, - {0}, - NULL, - msm_vidc_set_u32_enum}, - - {LEVEL, DEC, CODECS_ALL, - {0}, - NULL, - msm_vidc_set_u32_enum}, - - {LEVEL, ENC, CODECS_ALL, - {0}, - NULL, - msm_vidc_set_level}, - - {AV1_TIER, DEC, AV1, - {0}, - NULL, - msm_vidc_set_u32_enum}, - - {HEVC_TIER, ENC | DEC, HEVC | HEIC, - {0}, - NULL, - msm_vidc_set_u32_enum}, - - {LF_MODE, ENC, CODECS_ALL, - {0}, - NULL, - msm_vidc_set_deblock_mode}, - - {SLICE_MODE, ENC, H264 | HEVC, - {STAGE, DELIVERY_MODE}, - msm_vidc_adjust_slice_count, - msm_vidc_set_slice_count}, - - {SLICE_MODE, ENC, HEIC, - {0}, - msm_vidc_adjust_slice_count, - msm_vidc_set_slice_count}, - - {TRANSFORM_8X8, ENC, H264, - {0}, - msm_vidc_adjust_transform_8x8, - msm_vidc_set_u32}, - - {CHROMA_QP_INDEX_OFFSET, ENC, HEVC, - {0}, - msm_vidc_adjust_chroma_qp_index_offset, - msm_vidc_set_chroma_qp_index_offset}, - - {DISPLAY_DELAY_ENABLE, DEC, H264 | HEVC | VP9 | AV1, - {OUTPUT_ORDER}, - NULL, - NULL}, - - {DISPLAY_DELAY, DEC, H264 | HEVC | VP9 | AV1, - {OUTPUT_ORDER}, - NULL, - NULL}, - - {OUTPUT_ORDER, DEC, H264 | HEVC | AV1 | VP9, - {0}, - msm_vidc_adjust_output_order, - msm_vidc_set_u32}, - - {INPUT_BUF_HOST_MAX_COUNT, ENC | DEC, CODECS_ALL, - {0}, - msm_vidc_adjust_input_buf_host_max_count, - msm_vidc_set_u32}, - - {INPUT_BUF_HOST_MAX_COUNT, ENC, H264 | HEVC, - {0}, - msm_vidc_adjust_input_buf_host_max_count, - msm_vidc_set_u32}, - - {OUTPUT_BUF_HOST_MAX_COUNT, ENC | DEC, CODECS_ALL, - {0}, - msm_vidc_adjust_output_buf_host_max_count, - msm_vidc_set_u32}, - - {OUTPUT_BUF_HOST_MAX_COUNT, ENC, H264 | HEVC, - {0}, - msm_vidc_adjust_output_buf_host_max_count, - msm_vidc_set_u32}, - - {CONCEAL_COLOR_8BIT, DEC, CODECS_ALL, - {0}, - NULL, - msm_vidc_set_u32_packed}, - - {CONCEAL_COLOR_10BIT, DEC, CODECS_ALL, - {0}, - NULL, - msm_vidc_set_u32_packed}, - - {STAGE, ENC | DEC, CODECS_ALL, - {0}, - NULL, - msm_vidc_set_stage}, - - {STAGE, ENC, H264 | HEVC, - {0}, - NULL, - msm_vidc_set_stage}, - - {STAGE, DEC, H264 | HEVC | VP9 | AV1, - {0}, - NULL, - msm_vidc_set_stage}, - - {PIPE, DEC|ENC, CODECS_ALL, - {0}, - NULL, - msm_vidc_set_pipe}, - - {THUMBNAIL_MODE, DEC, H264 | HEVC | VP9 | AV1, - {OUTPUT_ORDER}, - NULL, - msm_vidc_set_u32}, - - {THUMBNAIL_MODE, DEC, HEIC, - {0}, - NULL, - msm_vidc_set_u32}, - - {RAP_FRAME, DEC, CODECS_ALL, - {0}, - NULL, - msm_vidc_set_u32}, - - {PRIORITY, DEC|ENC, CODECS_ALL, - {0}, - msm_vidc_adjust_session_priority, - msm_vidc_set_session_priority}, - - {FIRMWARE_PRIORITY_OFFSET, DEC | ENC, CODECS_ALL, - {0}, - NULL, - NULL}, - - {CRITICAL_PRIORITY, ENC, CODECS_ALL, - {0}, - NULL, - NULL}, - - {RESERVE_DURATION, ENC, CODECS_ALL, - {0}, - NULL, - msm_vidc_set_reserve_duration}, - - {DRAP, DEC, AV1, - {0}, - NULL, - msm_vidc_set_u32}, - - {ALL_INTRA, ENC, H264 | HEVC, - {LTR_COUNT, IR_PERIOD, SLICE_MODE, BIT_RATE}, - msm_vidc_adjust_all_intra, - NULL}, - - {META_EVA_STATS, ENC, HEVC, - {0}, - msm_vidc_adjust_eva_stats, - NULL}, - - {META_ROI_INFO, ENC, H264 | HEVC, - {MIN_QUALITY, IR_PERIOD, BLUR_TYPES}, - msm_vidc_adjust_roi_info, - NULL}, - - {GRID_ENABLE, ENC, HEIC, - {0}, - NULL, - msm_vidc_set_u32}, - - {DELIVERY_MODE, ENC, H264 | HEVC, - {LOWLATENCY_MODE, OUTPUT_BUF_HOST_MAX_COUNT}, - msm_vidc_adjust_delivery_mode, - msm_vidc_set_u32}, - - {VUI_TIMING_INFO, ENC, CODECS_ALL, - {0}, - NULL, - msm_vidc_set_vui_timing_info}, - - {SIGNAL_COLOR_INFO, ENC, CODECS_ALL, - {0}, - NULL, - msm_vidc_set_signal_color_info}, - - {META_SEI_MASTERING_DISP, ENC, HEVC | HEIC, - {0}, - msm_vidc_adjust_sei_mastering_disp, - NULL}, - - {META_SEI_CLL, ENC, HEVC | HEIC, - {0}, - msm_vidc_adjust_sei_cll, - NULL}, - - {META_HDR10PLUS, ENC, HEVC | HEIC, - {0}, - msm_vidc_adjust_hdr10plus, - NULL}, - - {META_TRANSCODING_STAT_INFO, ENC, HEVC|H264, - {0}, - msm_vidc_adjust_transcoding_stats, - NULL}, -}; - -static struct msm_platform_inst_capability instance_cap_data_volcano_v1[] = { - /* {cap, domain, codec, - * min, max, step_or_mask, value, - * v4l2_id, - * hfi_id, - * flags} - */ - {DRV_VERSION, DEC|ENC, CODECS_ALL, - 0, INT_MAX, 1, DRIVER_VERSION, - V4L2_CID_MPEG_VIDC_DRIVER_VERSION}, - - {FRAME_WIDTH, DEC, CODECS_ALL, 96, 4096, 1, 1920}, - - {FRAME_WIDTH, ENC, CODECS_ALL, 128, 4096, 1, 1920}, - - {FRAME_WIDTH, ENC, HEVC, 96, 4096, 1, 1920}, - - {FRAME_WIDTH, ENC, HEIC, 128, 16384, 1, 16384}, - - {LOSSLESS_FRAME_WIDTH, ENC, CODECS_ALL, 128, 4096, 1, 1920}, - - {LOSSLESS_FRAME_WIDTH, ENC, HEVC, 96, 4096, 1, 1920}, - - {SECURE_FRAME_WIDTH, DEC, CODECS_ALL, 96, 4096, 1, 1920}, - - {SECURE_FRAME_WIDTH, ENC, CODECS_ALL, 128, 4096, 1, 1920}, - - {SECURE_FRAME_WIDTH, ENC, HEVC, 96, 4096, 1, 1920}, - - {FRAME_HEIGHT, DEC, CODECS_ALL, 96, 4096, 1, 1080}, - - {FRAME_HEIGHT, ENC, CODECS_ALL, 128, 4096, 1, 1080}, - - {FRAME_HEIGHT, ENC, HEVC, 96, 4096, 1, 1080}, - - {FRAME_HEIGHT, ENC, HEIC, 128, 16384, 1, 16384}, - - {LOSSLESS_FRAME_HEIGHT, ENC, CODECS_ALL, 128, 4096, 1, 1080}, - - {LOSSLESS_FRAME_HEIGHT, ENC, HEVC, 96, 4096, 1, 1080}, - - {SECURE_FRAME_HEIGHT, DEC, CODECS_ALL, 96, 4096, 1, 1080}, - - {SECURE_FRAME_HEIGHT, ENC, CODECS_ALL, 128, 4096, 1, 1080}, - - {SECURE_FRAME_HEIGHT, ENC, HEVC, 96, 4096, 1, 1080}, - - {PIX_FMTS, ENC | DEC, H264, - MSM_VIDC_FMT_NV12, - MSM_VIDC_FMT_NV12C, - MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C, - MSM_VIDC_FMT_NV12C}, - - {PIX_FMTS, ENC | DEC, HEVC|VP9, - MSM_VIDC_FMT_NV12, - MSM_VIDC_FMT_TP10C, - MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C | - MSM_VIDC_FMT_P010 | MSM_VIDC_FMT_TP10C, - MSM_VIDC_FMT_NV12C}, - - {PIX_FMTS, ENC, HEIC, - MSM_VIDC_FMT_NV12, - MSM_VIDC_FMT_P010, - MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_P010, - MSM_VIDC_FMT_NV12}, - - {PIX_FMTS, DEC, HEIC, - MSM_VIDC_FMT_NV12, - MSM_VIDC_FMT_TP10C, - MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C | - MSM_VIDC_FMT_P010 | MSM_VIDC_FMT_TP10C, - MSM_VIDC_FMT_NV12C}, - - {MIN_BUFFERS_INPUT, ENC | DEC, CODECS_ALL, 0, 64, 1, 4, - V4L2_CID_MIN_BUFFERS_FOR_OUTPUT, - 0, - CAP_FLAG_VOLATILE}, - - {MIN_BUFFERS_INPUT, ENC | DEC, HEIC, 0, 64, 1, 1, - V4L2_CID_MIN_BUFFERS_FOR_OUTPUT, - 0, - CAP_FLAG_VOLATILE}, - - {MIN_BUFFERS_OUTPUT, ENC | DEC, CODECS_ALL, - 0, 64, 1, 4, - V4L2_CID_MIN_BUFFERS_FOR_CAPTURE, - HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT, - CAP_FLAG_OUTPUT_PORT | CAP_FLAG_VOLATILE}, - - /* (4096 * 2304) / 256 */ - {MBPF, ENC, CODECS_ALL, 64, 36864, 1, 36864}, - - {MBPF, ENC, HEVC, 36, 36864, 1, 36864}, - - /* ((16384x16384)/256) */ - {MBPF, ENC, HEIC, 36, 1048576, 1, 1048576}, - - /* (4096 * 2304) / 256 */ - {MBPF, DEC, CODECS_ALL, 36, 36864, 1, 36864}, - - /* ((8192x8192)/256) */ - {MBPF, DEC, HEIC, 64, 262144, 1, 262144 }, - - /* (4096 * 2304) / 256 */ - {LOSSLESS_MBPF, ENC, H264 | HEVC, 64, 36864, 1, 36864}, - - /* Batch Mode Decode */ - /* BATCH_MBPF + 2 is done for chipsets other than waipio - * due to timeline constraints since msm_vidc_allow_decode_batch - * has checks to allow batching for less than BATCH_MBPF. - * Same applies for BATCH_FPS. - */ /* (1920 * 1088) / 256 */ {BATCH_MBPF, DEC, H264 | HEVC | VP9, 64, 8162, 1, 8162}, - /* (4096 * 2304) / 256 */ {BATCH_FPS, DEC, H264 | HEVC | VP9, 1, 61, 1, 61}, - {SECURE_MBPF, ENC | DEC, H264 | HEVC | VP9, 64, 36864, 1, 36864}, - - {SECURE_MBPF, ENC, HEVC, 36, 36864, 1, 36864}, + /* (4096 * 2176) / 256 */ + {SECURE_MBPF, ENC | DEC, H264 | HEVC | VP9, 64, 34816, 1, 34816}, {FRAME_RATE, ENC, CODECS_ALL, (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), @@ -2825,11 +501,9 @@ static struct msm_platform_inst_capability instance_cap_data_volcano_v1[] = { {MB_CYCLES_LP, DEC, CODECS_ALL, 200, 200, 1, 200}, - {MB_CYCLES_FW, ENC | DEC, CODECS_ALL, 489583, 489583, 1, 489583}, + {MB_CYCLES_FW, ENC | DEC, CODECS_ALL, 326389, 326389, 1, 326389}, - {MB_CYCLES_FW_VPP, ENC, CODECS_ALL, 48405, 48405, 1, 48405}, - - {MB_CYCLES_FW_VPP, DEC, CODECS_ALL, 66234, 66234, 1, 66234}, + {MB_CYCLES_FW_VPP, ENC | DEC, CODECS_ALL, 44156, 44156, 1, 44156}, {ENC_RING_BUFFER_COUNT, ENC, CODECS_ALL, 0, 0, 1, 0}, @@ -2873,47 +547,6 @@ static struct msm_platform_inst_capability instance_cap_data_volcano_v1[] = { 0, CAP_FLAG_VOLATILE}, - /* Fence type for input buffer. Currently unsed */ - {INBUF_FENCE_TYPE, DEC, H264 | HEVC | VP9, - MSM_VIDC_FENCE_NONE, MSM_VIDC_FENCE_NONE, - BIT(MSM_VIDC_FENCE_NONE), - MSM_VIDC_FENCE_NONE, - 0, - HFI_PROP_FENCE_TYPE, - CAP_FLAG_MENU | CAP_FLAG_INPUT_PORT}, - - {OUTBUF_FENCE_TYPE, DEC, H264 | HEVC | VP9, - MSM_VIDC_FENCE_NONE, MSM_VIDC_SYNX_V2_FENCE, - BIT(MSM_VIDC_FENCE_NONE) | BIT(MSM_VIDC_SW_FENCE) | - BIT(MSM_VIDC_SYNX_V2_FENCE), - MSM_VIDC_FENCE_NONE, - 0, - HFI_PROP_FENCE_TYPE, - CAP_FLAG_MENU | CAP_FLAG_OUTPUT_PORT}, - - /* Fence direction for input buffer. Currently unsed */ - {INBUF_FENCE_DIRECTION, DEC, H264 | HEVC | VP9, - MSM_VIDC_FENCE_DIR_NONE, MSM_VIDC_FENCE_DIR_NONE, - BIT(MSM_VIDC_FENCE_DIR_NONE), - MSM_VIDC_FENCE_DIR_NONE, - 0, - HFI_PROP_FENCE_DIRECTION, - CAP_FLAG_MENU | CAP_FLAG_INPUT_PORT}, - - {OUTBUF_FENCE_DIRECTION, DEC, H264 | HEVC | VP9, - MSM_VIDC_FENCE_DIR_NONE, MSM_VIDC_FENCE_DIR_RX, - BIT(MSM_VIDC_FENCE_DIR_NONE) | BIT(MSM_VIDC_FENCE_DIR_TX) | - BIT(MSM_VIDC_FENCE_DIR_RX), - MSM_VIDC_FENCE_DIR_NONE, - 0, - HFI_PROP_FENCE_DIRECTION, - CAP_FLAG_MENU | CAP_FLAG_OUTPUT_PORT}, - - {FENCE_ERROR_DATA_CORRUPT, DEC, H264 | HEVC | VP9, - 0, 1, 1, 0, - 0, - HFI_PROP_FENCE_ERROR_DATA_CORRUPT}, - {TS_REORDER, DEC, H264 | HEVC, 0, 1, 1, 0, V4L2_CID_MPEG_VIDC_TS_REORDER}, @@ -2979,12 +612,6 @@ static struct msm_platform_inst_capability instance_cap_data_volcano_v1[] = { HFI_PROP_NAL_LENGTH_FIELD, CAP_FLAG_OUTPUT_PORT}, - {WITHOUT_STARTCODE, DEC, AV1, - 0, 0, 1, 0, - V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE, - 0, - CAP_FLAG_INPUT_PORT}, - {NAL_LENGTH_FIELD, ENC, CODECS_ALL, V4L2_MPEG_VIDEO_HEVC_SIZE_0, V4L2_MPEG_VIDEO_HEVC_SIZE_4, @@ -3008,7 +635,7 @@ static struct msm_platform_inst_capability instance_cap_data_volcano_v1[] = { * Dec: there's no use of Bitrate cap */ {BIT_RATE, ENC, H264 | HEVC, - 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_BITRATE, HFI_PROP_TOTAL_BITRATE, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | @@ -3163,14 +790,14 @@ static struct msm_platform_inst_capability instance_cap_data_volcano_v1[] = { CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, {LTR_COUNT, ENC, H264 | HEVC, - 0, MAX_LTR_FRAME_COUNT_5, 1, 0, + 0, MAX_LTR_FRAME_COUNT, 1, 0, V4L2_CID_MPEG_VIDEO_LTR_COUNT, HFI_PROP_LTR_COUNT, CAP_FLAG_OUTPUT_PORT}, {USE_LTR, ENC, H264 | HEVC, 0, - ((1 << MAX_LTR_FRAME_COUNT_5) - 1), + ((1 << MAX_LTR_FRAME_COUNT) - 1), 0, 0, V4L2_CID_MPEG_VIDEO_USE_LTR_FRAMES, HFI_PROP_LTR_USE, @@ -3178,7 +805,7 @@ static struct msm_platform_inst_capability instance_cap_data_volcano_v1[] = { {MARK_LTR, ENC, H264 | HEVC, INVALID_DEFAULT_MARK_OR_USE_LTR, - (MAX_LTR_FRAME_COUNT_5 - 1), + (MAX_LTR_FRAME_COUNT - 1), 1, INVALID_DEFAULT_MARK_OR_USE_LTR, V4L2_CID_MPEG_VIDEO_FRAME_LTR_INDEX, HFI_PROP_LTR_MARK, @@ -3233,9 +860,8 @@ static struct msm_platform_inst_capability instance_cap_data_volcano_v1[] = { {REQUEST_PREPROCESS, ENC, H264 | HEVC, MSM_VIDC_PREPROCESS_NONE, - MSM_VIDC_PREPROCESS_TYPE0, - BIT(MSM_VIDC_PREPROCESS_NONE) | - BIT(MSM_VIDC_PREPROCESS_TYPE0), + MSM_VIDC_PREPROCESS_NONE, + BIT(MSM_VIDC_PREPROCESS_NONE), MSM_VIDC_PREPROCESS_NONE, 0, HFI_PROP_REQUEST_PREPROCESS, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, @@ -3260,7 +886,7 @@ static struct msm_platform_inst_capability instance_cap_data_volcano_v1[] = { {PEAK_BITRATE, ENC, H264 | HEVC, /* default peak bitrate is 10% larger than avg bitrate */ - 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_BITRATE_PEAK, HFI_PROP_TOTAL_PEAK_BITRATE, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | @@ -3425,85 +1051,84 @@ static struct msm_platform_inst_capability instance_cap_data_volcano_v1[] = { HFI_PROP_LAYER_COUNT, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, - {L0_BR, ENC, H264, - 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L0_BR, HFI_PROP_BITRATE_LAYER1, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, {L0_BR, ENC, HEVC, - 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L0_BR, HFI_PROP_BITRATE_LAYER1, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, {L1_BR, ENC, H264, - 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L1_BR, HFI_PROP_BITRATE_LAYER2, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, {L1_BR, ENC, HEVC, - 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L1_BR, HFI_PROP_BITRATE_LAYER2, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, {L2_BR, ENC, H264, - 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L2_BR, HFI_PROP_BITRATE_LAYER3, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, {L2_BR, ENC, HEVC, - 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L2_BR, HFI_PROP_BITRATE_LAYER3, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, {L3_BR, ENC, H264, - 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L3_BR, HFI_PROP_BITRATE_LAYER4, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, {L3_BR, ENC, HEVC, - 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L3_BR, HFI_PROP_BITRATE_LAYER4, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, {L4_BR, ENC, H264, - 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L4_BR, HFI_PROP_BITRATE_LAYER5, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, {L4_BR, ENC, HEVC, - 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L4_BR, HFI_PROP_BITRATE_LAYER5, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, {L5_BR, ENC, H264, - 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L5_BR, HFI_PROP_BITRATE_LAYER6, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, {L5_BR, ENC, HEVC, - 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, + 1, MAX_BITRATE, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L5_BR, HFI_PROP_BITRATE_LAYER6, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | @@ -3562,7 +1187,6 @@ static struct msm_platform_inst_capability instance_cap_data_volcano_v1[] = { V4L2_CID_MPEG_VIDEO_VP9_PROFILE, HFI_PROP_PROFILE, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - {LEVEL, ENC, H264, V4L2_MPEG_VIDEO_H264_LEVEL_1_0, V4L2_MPEG_VIDEO_H264_LEVEL_5_2, @@ -3607,7 +1231,7 @@ static struct msm_platform_inst_capability instance_cap_data_volcano_v1[] = { {LEVEL, DEC, H264, V4L2_MPEG_VIDEO_H264_LEVEL_1_0, - V4L2_MPEG_VIDEO_H264_LEVEL_5_2, + V4L2_MPEG_VIDEO_H264_LEVEL_6_0, BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_0) | BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1B) | BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_1) | @@ -3624,15 +1248,16 @@ static struct msm_platform_inst_capability instance_cap_data_volcano_v1[] = { BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_2) | BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_0) | BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_2), - V4L2_MPEG_VIDEO_H264_LEVEL_5_2, + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_0), + V4L2_MPEG_VIDEO_H264_LEVEL_6_0, V4L2_CID_MPEG_VIDEO_H264_LEVEL, HFI_PROP_LEVEL, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, {LEVEL, DEC, HEVC | HEIC, V4L2_MPEG_VIDEO_HEVC_LEVEL_1, - V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1, + V4L2_MPEG_VIDEO_HEVC_LEVEL_6, BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_1) | BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2) | BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1) | @@ -3641,15 +1266,17 @@ static struct msm_platform_inst_capability instance_cap_data_volcano_v1[] = { BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4) | BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1) | BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1), - V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1, + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6), + V4L2_MPEG_VIDEO_HEVC_LEVEL_6, V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, HFI_PROP_LEVEL, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, {LEVEL, DEC, VP9, V4L2_MPEG_VIDEO_VP9_LEVEL_1_0, - V4L2_MPEG_VIDEO_VP9_LEVEL_5_1, + V4L2_MPEG_VIDEO_VP9_LEVEL_5_2, BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_1_0) | BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_1_1) | BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_2_0) | @@ -3659,12 +1286,12 @@ static struct msm_platform_inst_capability instance_cap_data_volcano_v1[] = { BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_4_0) | BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_4_1) | BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_0) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_1), - V4L2_MPEG_VIDEO_VP9_LEVEL_5_1, + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_2), + V4L2_MPEG_VIDEO_VP9_LEVEL_5_2, V4L2_CID_MPEG_VIDEO_VP9_LEVEL, HFI_PROP_LEVEL, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, - {HEVC_TIER, ENC | DEC, HEVC, V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, V4L2_MPEG_VIDEO_HEVC_TIER_HIGH, @@ -3743,7 +1370,7 @@ static struct msm_platform_inst_capability instance_cap_data_volcano_v1[] = { CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, {SLICE_MAX_BYTES, ENC, H264 | HEVC, - MIN_SLICE_BYTE_SIZE, MAX_SLICE_BYTE_SIZE_V1, + MIN_SLICE_BYTE_SIZE, MAX_SLICE_BYTE_SIZE, 1, MIN_SLICE_BYTE_SIZE, V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES, HFI_PROP_MULTI_SLICE_BYTES_COUNT, @@ -3900,52 +1527,13 @@ static struct msm_platform_inst_capability instance_cap_data_volcano_v1[] = { HFI_PROP_SESSION_PRIORITY, CAP_FLAG_DYNAMIC_ALLOWED}, - {FIRMWARE_PRIORITY_OFFSET, DEC | ENC, CODECS_ALL, - 1, 1, 1, 1}, - - {CRITICAL_PRIORITY, ENC, CODECS_ALL, - 0, 1, 1, 0, - V4L2_CID_MPEG_VIDC_CRITICAL_PRIORITY}, - - {RESERVE_DURATION, ENC, CODECS_ALL, - 0, INT_MAX, 1, 0, - V4L2_CID_MPEG_VIDC_RESERVE_DURATION, - HFI_CMD_RESERVE, - CAP_FLAG_DYNAMIC_ALLOWED}, - {ENC_IP_CR, ENC, CODECS_ALL, 0, S32_MAX, 1, 0, V4L2_CID_MPEG_VIDC_ENC_INPUT_COMPRESSION_RATIO, 0, CAP_FLAG_DYNAMIC_ALLOWED}, - - {FILM_GRAIN, DEC, AV1, - 0, 0, 1, 0, - V4L2_CID_MPEG_VIDC_AV1D_FILM_GRAIN_PRESENT}, - - {SUPER_BLOCK, DEC, AV1, - 0, 0, 1, 0}, - - {DRAP, DEC, AV1, - 0, 0, 1, 0}, - {LAST_FLAG_EVENT_ENABLE, DEC|ENC, CODECS_ALL, 0, 1, 1, 0, V4L2_CID_MPEG_VIDC_LAST_FLAG_EVENT_ENABLE}, - - {META_BITSTREAM_RESOLUTION, DEC, AV1, - MSM_VIDC_META_DISABLE, - MSM_VIDC_META_DISABLE | MSM_VIDC_META_RX_INPUT | - MSM_VIDC_META_RX_OUTPUT, - 0, MSM_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_BITSTREAM_RESOLUTION}, - - {META_CROP_OFFSETS, DEC, AV1, - MSM_VIDC_META_DISABLE, - MSM_VIDC_META_DISABLE | MSM_VIDC_META_RX_INPUT | - MSM_VIDC_META_RX_OUTPUT, - 0, MSM_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_CROP_OFFSETS}, - {ALL_INTRA, ENC, H264 | HEVC, 0, 1, 1, 0, 0, @@ -4182,14 +1770,6 @@ static struct msm_platform_inst_capability instance_cap_data_volcano_v1[] = { HFI_PROP_ROI_INFO, CAP_FLAG_INPUT_PORT | CAP_FLAG_BITMASK | CAP_FLAG_META}, - {META_SALIENCY_INFO, ENC, H264 | HEVC, - MSM_VIDC_META_DISABLE, - MSM_VIDC_META_ENABLE | MSM_VIDC_META_TX_INPUT, - 0, MSM_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_SALIENCY_INFO, - HFI_PROP_ROI_AS_SALIENCY_INFO, - CAP_FLAG_INPUT_PORT | CAP_FLAG_BITMASK | CAP_FLAG_META}, - {META_DEC_QP_METADATA, DEC, CODECS_ALL, MSM_VIDC_META_DISABLE, MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, @@ -4214,18 +1794,6 @@ static struct msm_platform_inst_capability instance_cap_data_volcano_v1[] = { 1, DEFAULT_COMPLEXITY, V4L2_CID_MPEG_VIDC_VENC_COMPLEXITY}, - {DELIVERY_MODE, ENC, HEVC, - 0, 1, 1, 0, - V4L2_CID_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE, - HFI_PROP_ENABLE_SLICE_DELIVERY, - CAP_FLAG_OUTPUT_PORT}, - - {DELIVERY_MODE, ENC, H264, - 0, 1, 1, 0, - V4L2_CID_MPEG_VIDC_H264_ENCODE_DELIVERY_MODE, - HFI_PROP_ENABLE_SLICE_DELIVERY, - CAP_FLAG_OUTPUT_PORT}, - {SIGNAL_COLOR_INFO, ENC, CODECS_ALL, 0, INT_MAX, 1, 0, V4L2_CID_MPEG_VIDC_SIGNAL_COLOR_INFO, @@ -4233,7 +1801,7 @@ static struct msm_platform_inst_capability instance_cap_data_volcano_v1[] = { CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, }; -static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_volcano_v1[] = { +static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_volcano_v0[] = { /* {cap, domain, codec, * parents, * children, @@ -4272,41 +1840,16 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_volc NULL, NULL}, - {SECURE_MODE, ENC|DEC, H264 | HEVC | VP9, + {SECURE_MODE, ENC | DEC, H264 | HEVC | VP9, {0}, NULL, msm_vidc_set_u32}, {META_OUTBUF_FENCE, DEC, H264 | HEVC | VP9, - {LOWLATENCY_MODE, OUTBUF_FENCE_TYPE, OUTBUF_FENCE_DIRECTION}, + {LOWLATENCY_MODE}, NULL, NULL}, - {INBUF_FENCE_TYPE, DEC, H264 | HEVC | VP9, - {0}, - NULL, - NULL}, - - {OUTBUF_FENCE_TYPE, DEC, H264 | HEVC | VP9, - {0}, - msm_vidc_adjust_dec_outbuf_fence_type, - msm_vidc_set_outbuf_fence_type}, - - {INBUF_FENCE_DIRECTION, DEC, H264 | HEVC | VP9, - {0}, - NULL, - NULL}, - - {OUTBUF_FENCE_DIRECTION, DEC, H264 | HEVC | VP9, - {0}, - msm_vidc_adjust_dec_outbuf_fence_direction, - msm_vidc_set_outbuf_fence_direction}, - - {FENCE_ERROR_DATA_CORRUPT, DEC, H264 | HEVC | VP9, - {0}, - NULL, - msm_vidc_set_u32}, - {HFLIP, ENC, CODECS_ALL, {0}, NULL, @@ -4342,11 +1885,6 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_volc NULL, msm_vidc_set_nal_length}, - {WITHOUT_STARTCODE, DEC, AV1, - {0}, - NULL, - NULL}, - {REQUEST_I_FRAME, ENC, H264 | HEVC, {0}, NULL, @@ -4491,7 +2029,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_volc msm_vidc_set_vbr_related_properties}, {MIN_QUALITY, ENC, H264 | HEVC, - {BLUR_TYPES}, + {BLUR_TYPES, BITRATE_BOOST}, msm_vidc_adjust_min_quality, msm_vidc_set_u32}, @@ -4647,7 +2185,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_volc msm_vidc_set_deblock_mode}, {SLICE_MODE, ENC, H264 | HEVC, - {STAGE, DELIVERY_MODE}, + {STAGE}, msm_vidc_adjust_slice_count, msm_vidc_set_slice_count}, @@ -4751,26 +2289,6 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_volc msm_vidc_adjust_session_priority, msm_vidc_set_session_priority}, - {FIRMWARE_PRIORITY_OFFSET, DEC | ENC, CODECS_ALL, - {0}, - NULL, - NULL}, - - {CRITICAL_PRIORITY, ENC, CODECS_ALL, - {0}, - NULL, - NULL}, - - {RESERVE_DURATION, ENC, CODECS_ALL, - {0}, - NULL, - msm_vidc_set_reserve_duration}, - - {DRAP, DEC, AV1, - {0}, - NULL, - NULL}, - {ALL_INTRA, ENC, H264 | HEVC, {LTR_COUNT, IR_PERIOD, SLICE_MODE, BIT_RATE}, msm_vidc_adjust_all_intra, @@ -4791,11 +2309,6 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_volc NULL, msm_vidc_set_u32}, - {DELIVERY_MODE, ENC, H264 | HEVC, - {LOWLATENCY_MODE, OUTPUT_BUF_HOST_MAX_COUNT}, - msm_vidc_adjust_delivery_mode, - msm_vidc_set_u32}, - {VUI_TIMING_INFO, ENC, CODECS_ALL, {0}, NULL, @@ -4848,8 +2361,7 @@ static struct msm_vidc_format_capability format_data_volcano = { /* name, min_kbps, max_kbps */ static const struct bw_table volcano_bw_table[] = { { "venus-cnoc", 1000, 1000 }, - { "venus-ddr", 1000, 15000000 }, - { "venus-llcc", 1000, 15000000 }, + { "venus-ddr", 1000, 10000000 } }; /* name, hw_trigger */ @@ -4869,15 +2381,9 @@ static const struct clk_table volcano_clk_table[] = { /* name, exclusive_release */ static const struct clk_rst_table volcano_clk_reset_table[] = { { "video_axi_reset", 0 }, - { "video_xo_reset", 1 }, { "video_mvs0c_reset", 0 }, }; -/* name, llcc_id */ -static const struct subcache_table volcano_subcache_table[] = { - { "vidsc0", LLCC_VIDSC0 }, -}; - /* name, start, size, secure, dma_coherant, region, dma_mask */ const struct context_bank_table volcano_context_bank_table[] = { {"qcom,vidc,cb-ns", @@ -4897,36 +2403,9 @@ static struct freq_table volcano_freq_table_sku0[] = { {533333333}, {444000000}, {366000000}, {338000000}, {240000000}, {192000000} }; -static struct freq_table volcano_freq_table_sku1[] = { - {366000000}, {338000000}, {240000000}, {192000000} -}; - /* register, value, mask */ static const struct reg_preset_table volcano_reg_preset_table[] = { { 0xB0088, 0x0, 0x11 }, - { 0x10830, 0x33332222, 0xFFFFFFFF}, - { 0x10834, 0x44444444, 0xFFFFFFFF}, - { 0x10838, 0x00001022, 0xFFFFFFFF}, - { 0xA013C, 0x99, 0xFFFFFFFF}, -}; - -/* name, phys_addr, size, device_addr, device region type */ -static const struct device_region_table volcano_device_region_table[] = { - { - "aon-registers", - 0x0AAE0000, 0x1000, 0xFFAE0000, - MSM_VIDC_AON - }, - { - "ipc_protocol4_client8_version-registers", - 0x00508000, 0x1000, 0xFFADF000, - MSM_VIDC_PROTOCOL_FENCE_CLIENT_VPU - }, - { - "qtimer_f0v1_qtmr_v1_cntpct_lo", - 0x17421000, 0x1000, 0xFFADE000, - MSM_VIDC_QTIMER - }, }; /* decoder properties */ @@ -4963,19 +2442,6 @@ static const u32 volcano_vdec_psc_vp9[] = { HFI_PROP_LEVEL, }; -static const u32 volcano_vdec_psc_av1[] = { - HFI_PROP_BITSTREAM_RESOLUTION, - HFI_PROP_CROP_OFFSETS, - HFI_PROP_LUMA_CHROMA_BIT_DEPTH, - HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT, - HFI_PROP_AV1_FILM_GRAIN_PRESENT, - HFI_PROP_AV1_SUPER_BLOCK_ENABLED, - HFI_PROP_PROFILE, - HFI_PROP_LEVEL, - HFI_PROP_TIER, - HFI_PROP_SIGNAL_COLOR_INFO, -}; - static const u32 volcano_vdec_input_properties_avc[] = { HFI_PROP_NO_OUTPUT, HFI_PROP_SUBFRAME_INPUT, @@ -4994,14 +2460,6 @@ static const u32 volcano_vdec_input_properties_vp9[] = { HFI_PROP_DPB_LIST, }; -static const u32 volcano_vdec_input_properties_av1[] = { - HFI_PROP_NO_OUTPUT, - HFI_PROP_SUBFRAME_INPUT, - HFI_PROP_DPB_LIST, - HFI_PROP_AV1_TILE_ROWS_COLUMNS, - HFI_PROP_AV1_UNIFORM_TILE_SPACING, -}; - static const u32 volcano_vdec_output_properties_avc[] = { HFI_PROP_WORST_COMPRESSION_RATIO, HFI_PROP_WORST_COMPLEXITY_FACTOR, @@ -5024,18 +2482,6 @@ static const u32 volcano_vdec_output_properties_vp9[] = { HFI_PROP_FENCE, }; -static const u32 volcano_vdec_output_properties_av1[] = { - HFI_PROP_WORST_COMPRESSION_RATIO, - HFI_PROP_WORST_COMPLEXITY_FACTOR, - HFI_PROP_PICTURE_TYPE, - HFI_PROP_FENCE, -}; - -static struct msm_vidc_efuse_data efuse_data_volcano[] = { - /* IRIS_DISABLE_AV1, SKU VERSION: 1 */ - EFUSE_ENTRY(0x221C8118, 4, 0x2000, 0xD, SKU_VERSION), -}; - static const struct msm_vidc_platform_data volcano_data_v0 = { /* resources dependent on other module */ .bw_tbl = volcano_bw_table, @@ -5046,8 +2492,6 @@ static const struct msm_vidc_platform_data volcano_data_v0 = { .clk_tbl_size = ARRAY_SIZE(volcano_clk_table), .clk_rst_tbl = volcano_clk_reset_table, .clk_rst_tbl_size = ARRAY_SIZE(volcano_clk_reset_table), - .subcache_tbl = volcano_subcache_table, - .subcache_tbl_size = ARRAY_SIZE(volcano_subcache_table), /* populate context bank */ .context_bank_tbl = volcano_context_bank_table, @@ -5058,12 +2502,10 @@ static const struct msm_vidc_platform_data volcano_data_v0 = { .freq_tbl_size = ARRAY_SIZE(volcano_freq_table_sku0), .reg_prst_tbl = volcano_reg_preset_table, .reg_prst_tbl_size = ARRAY_SIZE(volcano_reg_preset_table), - .dev_reg_tbl = volcano_device_region_table, - .dev_reg_tbl_size = ARRAY_SIZE(volcano_device_region_table), .fwname = "vpu20_4v", .pas_id = 9, .supports_mmrm = 0, - .vpu_ver = VPU_VERSION_IRIS2_2PIPE, + .vpu_ver = VPU_VERSION_IRIS2_2P, /* caps related resorces */ .core_data = core_data_volcano_v0, @@ -5085,99 +2527,22 @@ static const struct msm_vidc_platform_data volcano_data_v0 = { .psc_hevc_tbl_size = ARRAY_SIZE(volcano_vdec_psc_hevc), .psc_vp9_tbl = volcano_vdec_psc_vp9, .psc_vp9_tbl_size = ARRAY_SIZE(volcano_vdec_psc_vp9), - .psc_av1_tbl = volcano_vdec_psc_av1, - .psc_av1_tbl_size = ARRAY_SIZE(volcano_vdec_psc_av1), .dec_input_prop_avc = volcano_vdec_input_properties_avc, .dec_input_prop_hevc = volcano_vdec_input_properties_hevc, .dec_input_prop_vp9 = volcano_vdec_input_properties_vp9, - .dec_input_prop_av1 = volcano_vdec_input_properties_av1, .dec_input_prop_size_avc = ARRAY_SIZE(volcano_vdec_input_properties_avc), .dec_input_prop_size_hevc = ARRAY_SIZE(volcano_vdec_input_properties_hevc), .dec_input_prop_size_vp9 = ARRAY_SIZE(volcano_vdec_input_properties_vp9), - .dec_input_prop_size_av1 = ARRAY_SIZE(volcano_vdec_input_properties_av1), .dec_output_prop_avc = volcano_vdec_output_properties_avc, .dec_output_prop_hevc = volcano_vdec_output_properties_hevc, .dec_output_prop_vp9 = volcano_vdec_output_properties_vp9, - .dec_output_prop_av1 = volcano_vdec_output_properties_av1, .dec_output_prop_size_avc = ARRAY_SIZE(volcano_vdec_output_properties_avc), .dec_output_prop_size_hevc = ARRAY_SIZE(volcano_vdec_output_properties_hevc), .dec_output_prop_size_vp9 = ARRAY_SIZE(volcano_vdec_output_properties_vp9), - .dec_output_prop_size_av1 = ARRAY_SIZE(volcano_vdec_output_properties_av1), - /* Fuse specific resources */ - .efuse_data = efuse_data_volcano, - .efuse_data_size = ARRAY_SIZE(efuse_data_volcano), .sku_version = SKU_VERSION_0, }; -static const struct msm_vidc_platform_data volcano_data_v1 = { - /* resources dependent on other module */ - .bw_tbl = volcano_bw_table, - .bw_tbl_size = ARRAY_SIZE(volcano_bw_table), - .regulator_tbl = volcano_regulator_table, - .regulator_tbl_size = ARRAY_SIZE(volcano_regulator_table), - .clk_tbl = volcano_clk_table, - .clk_tbl_size = ARRAY_SIZE(volcano_clk_table), - .clk_rst_tbl = volcano_clk_reset_table, - .clk_rst_tbl_size = ARRAY_SIZE(volcano_clk_reset_table), - .subcache_tbl = volcano_subcache_table, - .subcache_tbl_size = ARRAY_SIZE(volcano_subcache_table), - - /* populate context bank */ - .context_bank_tbl = volcano_context_bank_table, - .context_bank_tbl_size = ARRAY_SIZE(volcano_context_bank_table), - - /* platform specific resources */ - .freq_tbl = volcano_freq_table_sku1, - .freq_tbl_size = ARRAY_SIZE(volcano_freq_table_sku1), - .reg_prst_tbl = volcano_reg_preset_table, - .reg_prst_tbl_size = ARRAY_SIZE(volcano_reg_preset_table), - .dev_reg_tbl = volcano_device_region_table, - .dev_reg_tbl_size = ARRAY_SIZE(volcano_device_region_table), - .fwname = "vpu20_4v", - .pas_id = 9, - .supports_mmrm = 0, - - /* caps related resorces */ - .core_data = core_data_volcano_v1, - .core_data_size = ARRAY_SIZE(core_data_volcano_v1), - .inst_cap_data = instance_cap_data_volcano_v1, - .inst_cap_data_size = ARRAY_SIZE(instance_cap_data_volcano_v1), - .inst_cap_dependency_data = instance_cap_dependency_data_volcano_v1, - .inst_cap_dependency_data_size = ARRAY_SIZE(instance_cap_dependency_data_volcano_v1), - .csc_data.vpe_csc_custom_bias_coeff = vpe_csc_custom_bias_coeff, - .csc_data.vpe_csc_custom_matrix_coeff = vpe_csc_custom_matrix_coeff, - .csc_data.vpe_csc_custom_limit_coeff = vpe_csc_custom_limit_coeff, - .ubwc_config = ubwc_config_volcano, - .format_data = &format_data_volcano, - .vpu_ver = VPU_VERSION_IRIS2_2PIPE, - - /* decoder properties related*/ - .psc_avc_tbl = volcano_vdec_psc_avc, - .psc_avc_tbl_size = ARRAY_SIZE(volcano_vdec_psc_avc), - .psc_hevc_tbl = volcano_vdec_psc_hevc, - .psc_hevc_tbl_size = ARRAY_SIZE(volcano_vdec_psc_hevc), - .psc_vp9_tbl = volcano_vdec_psc_vp9, - .psc_vp9_tbl_size = ARRAY_SIZE(volcano_vdec_psc_vp9), - .dec_input_prop_avc = volcano_vdec_input_properties_avc, - .dec_input_prop_hevc = volcano_vdec_input_properties_hevc, - .dec_input_prop_vp9 = volcano_vdec_input_properties_vp9, - .dec_input_prop_size_avc = ARRAY_SIZE(volcano_vdec_input_properties_avc), - .dec_input_prop_size_hevc = ARRAY_SIZE(volcano_vdec_input_properties_hevc), - .dec_input_prop_size_vp9 = ARRAY_SIZE(volcano_vdec_input_properties_vp9), - .dec_output_prop_avc = volcano_vdec_output_properties_avc, - .dec_output_prop_hevc = volcano_vdec_output_properties_hevc, - .dec_output_prop_vp9 = volcano_vdec_output_properties_vp9, - .dec_output_prop_size_avc = ARRAY_SIZE(volcano_vdec_output_properties_avc), - .dec_output_prop_size_hevc = ARRAY_SIZE(volcano_vdec_output_properties_hevc), - .dec_output_prop_size_vp9 = ARRAY_SIZE(volcano_vdec_output_properties_vp9), - - /* Fuse specific resources */ - .efuse_data = efuse_data_volcano, - .efuse_data_size = ARRAY_SIZE(efuse_data_volcano), - .sku_version = SKU_VERSION_1, -}; - int msm_vidc_volcano_check_ddr_type(void) { u32 ddr_type; @@ -5210,9 +2575,10 @@ static int msm_vidc_init_data(struct msm_vidc_core *core) d_vpr_e("%s: Failed to read efuse\n", __func__); return rc; } - +/* if (core->platform->data.sku_version == SKU_VERSION_1) core->platform->data = volcano_data_v1; +*/ core->mem_ops = get_mem_ops_ext(); if (!core->mem_ops) { From 31e4bbb858f54b437bca50b4f1ef4515c0983f5d Mon Sep 17 00:00:00 2001 From: Manikanta Kanamarlapudi Date: Mon, 11 Mar 2024 11:08:04 +0530 Subject: [PATCH 1029/1061] video-driver: update frequency corners for Volcano Update frequency corners for Volcano Change-Id: I99c8e31e8442c2e51bd078ef6ff8f4654ce15734 Signed-off-by: Manikanta Kanamarlapudi --- driver/platform/volcano/src/msm_vidc_volcano.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/driver/platform/volcano/src/msm_vidc_volcano.c b/driver/platform/volcano/src/msm_vidc_volcano.c index 4fa2737c50..6b558300b0 100644 --- a/driver/platform/volcano/src/msm_vidc_volcano.c +++ b/driver/platform/volcano/src/msm_vidc_volcano.c @@ -2400,7 +2400,7 @@ const struct context_bank_table volcano_context_bank_table[] = { /* freq */ static struct freq_table volcano_freq_table_sku0[] = { - {533333333}, {444000000}, {366000000}, {338000000}, {240000000}, {192000000} + {444000000}, {366000000}, {338000000}, {240000000} }; /* register, value, mask */ From 623ae59d111a922526c2bf00618384eadb0bf753 Mon Sep 17 00:00:00 2001 From: Rajathi S Date: Mon, 4 Mar 2024 13:16:31 +0530 Subject: [PATCH 1030/1061] Video: Driver: Added UBWC configuration for volcano - Added UBWC configuration(LP4 & LP5) for volcano target. Change-Id: I9548eab543d47a87ae5b4ea068743ce388f17540 Signed-off-by: Rajathi S --- .../platform/volcano/src/msm_vidc_volcano.c | 29 +++++++++++++------ 1 file changed, 20 insertions(+), 9 deletions(-) diff --git a/driver/platform/volcano/src/msm_vidc_volcano.c b/driver/platform/volcano/src/msm_vidc_volcano.c index 4fa2737c50..e1db93ec21 100644 --- a/driver/platform/volcano/src/msm_vidc_volcano.c +++ b/driver/platform/volcano/src/msm_vidc_volcano.c @@ -2342,7 +2342,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_volc /* Default UBWC config for LPDDR5 */ static struct msm_vidc_ubwc_config_data ubwc_config_volcano[] = { - UBWC_CONFIG(8, 32, 16, 0, 1, 1, 1), + UBWC_CONFIG(8, 32, 15, 0, 1, 1, 1), }; static struct msm_vidc_format_capability format_data_volcano = { @@ -2543,18 +2543,29 @@ static const struct msm_vidc_platform_data volcano_data_v0 = { .sku_version = SKU_VERSION_0, }; -int msm_vidc_volcano_check_ddr_type(void) +int msm_vidc_volcano_check_ddr_type(struct msm_vidc_platform_data *platform_data, + u32 hbb_override_val) { - u32 ddr_type; + u32 ddr_type = DDR_TYPE_LPDDR5; - ddr_type = of_fdt_get_ddrtype(); - if (ddr_type != DDR_TYPE_LPDDR5 && - ddr_type != DDR_TYPE_LPDDR5X) { - d_vpr_e("%s: wrong ddr type %d\n", __func__, ddr_type); + if (!platform_data || !platform_data->ubwc_config) { + d_vpr_e("%s: invalid params\n", __func__); return -EINVAL; } - d_vpr_h("%s: ddr type %d\n", __func__, ddr_type); + ddr_type = of_fdt_get_ddrtype(); + if (ddr_type == -ENOENT) + d_vpr_e("Failed to get ddr type, use LPDDR5\n"); + + if (platform_data->ubwc_config && + (ddr_type == DDR_TYPE_LPDDR4 || + ddr_type == DDR_TYPE_LPDDR4X)) + platform_data->ubwc_config->highest_bank_bit = hbb_override_val; + + d_vpr_h("DDR Type 0x%x hbb 0x%x\n", + ddr_type, platform_data->ubwc_config ? + platform_data->ubwc_config->highest_bank_bit : -1); + return 0; } @@ -2596,7 +2607,7 @@ static int msm_vidc_init_data(struct msm_vidc_core *core) return -EINVAL; } - rc = msm_vidc_volcano_check_ddr_type(); + rc = msm_vidc_volcano_check_ddr_type(&core->platform->data, 0xe); if (rc) return rc; From 94d3c6c0ea534eeefb11de5ccfa33db635194ba9 Mon Sep 17 00:00:00 2001 From: Rajathi S Date: Tue, 27 Feb 2024 12:10:54 +0530 Subject: [PATCH 1031/1061] video: driver: Avoided video_xo_reset on MILOS - Milos doesn't support video_xo_reset. - Since its a common code added a condition to checkif vpu version is iris2_2pipe and video_xo_reset is configured then return with success. Change-Id: I0baf3b1e89245065be4a4c21c55bc138077dd214 Signed-off-by: Rajathi S --- driver/vidc/src/resources.c | 18 +++++++++++++----- 1 file changed, 13 insertions(+), 5 deletions(-) diff --git a/driver/vidc/src/resources.c b/driver/vidc/src/resources.c index 41aea1c53b..e9365d87ae 100644 --- a/driver/vidc/src/resources.c +++ b/driver/vidc/src/resources.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. - * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved. */ #include @@ -1489,9 +1489,13 @@ static int __reset_control_acquire_name(struct msm_vidc_core *core, __func__, rcinfo->name); break; } + /* Faced this issue for volcano which doesn't support xo_reset + * skip this check and return success + */ if (!found) { - d_vpr_e("%s: reset control (%s) not found\n", __func__, name); - rc = -EINVAL; + d_vpr_e("%s: reset control (%s) not found but returning success\n", + __func__, name); + rc = 0; } return rc; @@ -1530,9 +1534,13 @@ static int __reset_control_release_name(struct msm_vidc_core *core, __func__, rcinfo->name); break; } + /* Faced this issue for volcano which doesn't support xo_reset + * skip this check and return success + */ if (!found) { - d_vpr_e("%s: reset control (%s) not found\n", __func__, name); - rc = -EINVAL; + d_vpr_e("%s: reset control (%s) not found but returning success\n", + __func__, name); + rc = 0; } return rc; From 32330210ce6dd9fb5bfbeddb2fa34a6cb10cb0b0 Mon Sep 17 00:00:00 2001 From: Rajathi S Date: Fri, 8 Mar 2024 12:42:19 +0530 Subject: [PATCH 1032/1061] Video: Driver: Added support for multiple project configuration - Multiple targets can have same kernel config, but target will be differentiated by target name lunch command. - Instead of having multiple configuration in bazel file for different targets, calling get_all_la_target_variants will return all the target variants. - And for targets sharing the same kernel config but having a different lunch command can be queried using define_lunch_target_variant_modules. - Bazel compilation was modified generic based on lunch target and base target Change-Id: I82cdf744061b9ca395d2dcef003219d3af87287f Signed-off-by: Rajathi S --- Android.mk | 4 +++ BUILD.bazel | 7 ++-- target.bzl | 49 ++++++++++++++-------------- video_driver_build.bzl | 73 ++++++++++++++++++++++++++++++++++++++++++ 4 files changed, 104 insertions(+), 29 deletions(-) diff --git a/Android.mk b/Android.mk index 49a88afa51..a81dc1228c 100644 --- a/Android.mk +++ b/Android.mk @@ -36,6 +36,10 @@ LOCAL_MODULE_TAGS := optional LOCAL_MODULE_DEBUG_ENABLE := true LOCAL_MODULE_PATH := $(KERNEL_MODULES_OUT) LOCAL_MODULE_DDK_BUILD := true +LOCAL_MODULE_DDK_SUBTARGET_REGEX := "video.*" +ifeq ($(TARGET_BOARD_PLATFORM), volcano) + LOCAL_MODULE_DDK_SUBTARGET_REGEX := "$(TARGET_BOARD_PLATFORM)_video.*" +endif LOCAL_MODULE_KO_DIRS := msm_video/msm_video.ko LOCAL_REQUIRED_MODULES := mmrm-module-symvers diff --git a/BUILD.bazel b/BUILD.bazel index 473cb80f43..d5d674cbfd 100644 --- a/BUILD.bazel +++ b/BUILD.bazel @@ -69,8 +69,5 @@ ddk_headers( hdrs = [":uapi_headers", "pineapple_headers", "cliffs_headers", "iris33_headers", "volcano_headers", "iris2_headers", "vidc_headers"] ) -load(":target.bzl", "define_pineapple") -define_pineapple() - -load(":target.bzl", "define_volcano") -define_volcano() +load(":target.bzl", "define_target_modules") +define_target_modules() diff --git a/target.bzl b/target.bzl index b6d5562d11..f242e13424 100644 --- a/target.bzl +++ b/target.bzl @@ -1,27 +1,28 @@ load(":video_modules.bzl", "video_driver_modules") -load(":video_driver_build.bzl", "define_consolidate_gki_modules") +load(":video_driver_build.bzl", "define_lunch_target_variant_modules") +load("//msm-kernel:target_variants.bzl", "get_all_la_variants") +load("//msm-kernel:target_variants.bzl", "get_all_lunch_target_base_target_variants") -def define_pineapple(): - define_consolidate_gki_modules( - target = "pineapple", - registry = video_driver_modules, - modules = [ - "msm_video", - "video", - ], - config_options = [ - "CONFIG_MSM_VIDC_PINEAPPLE", - ], - ) +def define_target_modules(): + for (target, variant) in get_all_la_variants(): + define_lunch_target_variant_modules( + target = target, + variant = variant, + registry = video_driver_modules, + modules = [ + "msm_video", + "video", + ], + ) -def define_volcano(): - define_consolidate_gki_modules( - target = "volcano", - registry = video_driver_modules, - modules = [ - "msm_video", - ], - config_options = [ - "CONFIG_MSM_VIDC_VOLCANO", - ], - ) \ No newline at end of file + for (lt, bt, v) in get_all_lunch_target_base_target_variants(): + define_lunch_target_variant_modules( + target = bt, + variant = v, + registry = video_driver_modules, + modules = [ + "msm_video", + "video", + ], + lunch_target = lt, + ) diff --git a/video_driver_build.bzl b/video_driver_build.bzl index 7ad7dcd7b8..d14b7df41e 100644 --- a/video_driver_build.bzl +++ b/video_driver_build.bzl @@ -97,6 +97,79 @@ def define_target_variant_modules(target, variant, registry, modules, config_opt log = "info", ) +def define_lunch_target_variant_modules(target, variant, registry, modules, lunch_target=None): + print(lunch_target) + + kernel_build = "{}_{}".format(target, variant) + print("kernel_build: "+ kernel_build) + + kernel_build_label = "//msm-kernel:{}".format(kernel_build) + print(kernel_build_label) + + if lunch_target != None: + kernel_build = "{}_{}_{}".format(target, variant, lunch_target) + print("kernel_build: "+ kernel_build) + ddk_mod_name = "{}_video_driver_modules".format(kernel_build) + print("ddk_mod_name : " + ddk_mod_name) + dist_target_name = "{}_video_driver_modules_dist".format(kernel_build) + data = [":{}_video_driver_modules".format(kernel_build)] + config_options = ["CONFIG_MSM_VIDC_{}".format(lunch_target.upper())] + else: + ddk_mod_name = "{}_video_driver_modules".format(kernel_build) + print("ddk_mod_name: " + ddk_mod_name) + dist_target_name = "{}_video_driver_modules_dist".format(kernel_build) + print("dist_target_name: " + dist_target_name) + data = [":{}_video_driver_modules".format(kernel_build)] + config_options = ["CONFIG_MSM_VIDC_{}".format(target.upper())] + + + modules = [registry.get(module_name) for module_name in modules] + + options = _get_kernel_build_options(modules, config_options) + + build_print = lambda message : print("{}: {}".format(kernel_build, message)) + + formatter = lambda s : s.replace("%b", kernel_build).replace("%t", target) + + headers = ["//msm-kernel:all_headers"] + registry.hdrs + [":{}_headers".format(target)] + print(headers) + + all_module_rules = [] + + for module in modules: + print("Module name: "+ module.name) + rule_name = "{}_{}".format(kernel_build, module.name) + module_srcs = _get_kernel_build_module_srcs(module, options, formatter) + + if not module_srcs: + continue + + ddk_submodule( + name = rule_name, + srcs = module_srcs, + out = "{}.ko".format(module.name), + deps = headers + _get_kernel_build_module_deps(module, options, formatter), + local_defines = options.keys(), + ) + all_module_rules.append(rule_name) + + ddk_module( + name = ddk_mod_name, + kernel_build = kernel_build_label, + deps = all_module_rules, + ) + + copy_to_dist_dir( + name = dist_target_name, + data = data, + dist_dir = "out/target/product/{}/dlkm/lib/modules/".format(target), + flat = True, + wipe_dist_dir = False, + allow_duplicate_filenames = False, + mode_overrides = {"**/*": "644"}, + log = "info", + ) + def define_consolidate_gki_modules(target, registry, modules, config_options = []): define_target_variant_modules(target, "consolidate", registry, modules, config_options) define_target_variant_modules(target, "gki", registry, modules, config_options) \ No newline at end of file From b880b69c2ea9493518d85465f02d5ddebf2d9e02 Mon Sep 17 00:00:00 2001 From: Megha Byahatti Date: Tue, 19 Mar 2024 15:03:38 +0530 Subject: [PATCH 1033/1061] video: driver: Update ssr type specific to target Update ssr type slection logic to msm_vidc_driver.c. And add ssr type specific to target for kalama and waipio. Change-Id: Ifbdd47f3cc13f69cd93ecbfdbfefa20a112fca7e Signed-off-by: Megha Byahatti --- driver/platform/kalama/src/msm_vidc_kalama.c | 13 ++++++++++++- driver/platform/waipio/src/waipio.c | 12 +++++++++++- driver/vidc/inc/msm_vidc_driver.h | 3 ++- driver/vidc/inc/venus_hfi.h | 3 +-- driver/vidc/src/msm_vidc_driver.c | 19 +++++++++++++++++++ driver/vidc/src/venus_hfi.c | 20 +------------------- 6 files changed, 46 insertions(+), 24 deletions(-) diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index 7d0ee6f8bc..887078e223 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. - * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved. */ #include @@ -2696,6 +2696,13 @@ static const u32 kalama_vdec_output_properties_av1[] = { HFI_PROP_FENCE, }; +static const u32 kalama_msm_vidc_ssr_type[] = { + HFI_SSR_TYPE_SW_ERR_FATAL, + HFI_SSR_TYPE_SW_DIV_BY_ZERO, + HFI_SSR_TYPE_CPU_WDOG_IRQ, + HFI_SSR_TYPE_NOC_ERROR, +}; + static const struct msm_vidc_platform_data kalama_data = { /* resources dependent on other module */ .bw_tbl = kalama_bw_table, @@ -2760,6 +2767,10 @@ static const struct msm_vidc_platform_data kalama_data = { .dec_output_prop_size_hevc = ARRAY_SIZE(kalama_vdec_output_properties_hevc), .dec_output_prop_size_vp9 = ARRAY_SIZE(kalama_vdec_output_properties_vp9), .dec_output_prop_size_av1 = ARRAY_SIZE(kalama_vdec_output_properties_av1), + + .msm_vidc_ssr_type = kalama_msm_vidc_ssr_type, + .msm_vidc_ssr_type_size = ARRAY_SIZE(kalama_msm_vidc_ssr_type), + }; static const struct msm_vidc_platform_data kalama_data_v2 = { diff --git a/driver/platform/waipio/src/waipio.c b/driver/platform/waipio/src/waipio.c index 6d29d81b00..44690f9410 100644 --- a/driver/platform/waipio/src/waipio.c +++ b/driver/platform/waipio/src/waipio.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved. */ #include @@ -1744,6 +1744,13 @@ static const u32 waipio_vdec_output_properties_vp9[] = { HFI_PROP_FENCE, }; +static const u32 waipio_msm_vidc_ssr_type[] = { + HFI_SSR_TYPE_SW_ERR_FATAL, + HFI_SSR_TYPE_SW_DIV_BY_ZERO, + HFI_SSR_TYPE_CPU_WDOG_IRQ, + HFI_SSR_TYPE_NOC_ERROR, +}; + static const struct msm_vidc_platform_data waipio_data = { /* resources dependent on other module */ .bw_tbl = waipio_bw_table, @@ -1806,6 +1813,9 @@ static const struct msm_vidc_platform_data waipio_data = { .dec_output_prop_size_avc = ARRAY_SIZE(waipio_vdec_output_properties_avc), .dec_output_prop_size_hevc = ARRAY_SIZE(waipio_vdec_output_properties_hevc), .dec_output_prop_size_vp9 = ARRAY_SIZE(waipio_vdec_output_properties_vp9), + + .msm_vidc_ssr_type = waipio_msm_vidc_ssr_type, + .msm_vidc_ssr_type_size = ARRAY_SIZE(waipio_msm_vidc_ssr_type), }; static int msm_vidc_init_data(struct msm_vidc_core *core) diff --git a/driver/vidc/inc/msm_vidc_driver.h b/driver/vidc/inc/msm_vidc_driver.h index 50b558a4ad..e8a6ef494e 100644 --- a/driver/vidc/inc/msm_vidc_driver.h +++ b/driver/vidc/inc/msm_vidc_driver.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. - * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved. */ #ifndef _MSM_VIDC_DRIVER_H_ @@ -617,6 +617,7 @@ int msm_vidc_get_frame_rate(struct msm_vidc_inst *inst); int msm_vidc_get_operating_rate(struct msm_vidc_inst *inst); int msm_vidc_alloc_and_queue_input_internal_buffers(struct msm_vidc_inst *inst); int vb2_buffer_to_driver(struct vb2_buffer *vb2, struct msm_vidc_buffer *buf); +bool is_ssr_type_allowed(struct msm_vidc_core *core, u32 type); struct msm_vidc_buffer *msm_vidc_fetch_buffer(struct msm_vidc_inst *inst, struct vb2_buffer *vb2); struct context_bank_info diff --git a/driver/vidc/inc/venus_hfi.h b/driver/vidc/inc/venus_hfi.h index 51ce400d29..46a8f87b2f 100644 --- a/driver/vidc/inc/venus_hfi.h +++ b/driver/vidc/inc/venus_hfi.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. - * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. */ #ifndef _VENUS_HFI_H_ @@ -65,7 +65,6 @@ int venus_hfi_core_init(struct msm_vidc_core *core); int venus_hfi_core_deinit(struct msm_vidc_core *core, bool force); int venus_hfi_noc_error_info(struct msm_vidc_core *core); int venus_hfi_suspend(struct msm_vidc_core *core); -bool is_ssr_type_allowed(struct msm_vidc_core *core, u32 type); int venus_hfi_trigger_ssr(struct msm_vidc_core *core, u32 type, u32 client_id, u32 addr); int venus_hfi_trigger_stability(struct msm_vidc_inst *inst, u32 type, diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index d4c9656d82..da23f3938f 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -4054,6 +4054,19 @@ int msm_vidc_smmu_fault_handler(struct iommu_domain *domain, return -ENOSYS; } +bool is_ssr_type_allowed(struct msm_vidc_core *core, u32 type) +{ + u32 i; + const u32 *ssr_type = core->platform->data.msm_vidc_ssr_type; + u32 ssr_type_size = core->platform->data.msm_vidc_ssr_type_size; + + for (i = 0; i < ssr_type_size; i++) { + if (type == ssr_type[i]) + return true; + } + return false; +} + int msm_vidc_trigger_ssr(struct msm_vidc_core *core, u64 trigger_ssr_val) { @@ -4069,6 +4082,12 @@ int msm_vidc_trigger_ssr(struct msm_vidc_core *core, */ d_vpr_e("%s: trigger ssr is called. trigger ssr val: %#llx\n", __func__, trigger_ssr_val); + + if (!is_ssr_type_allowed(core, trigger_ssr_val)) { + d_vpr_h("SSR Type %#llx is not allowed\n", trigger_ssr_val); + return 0; + } + ssr->ssr_type = (trigger_ssr_val & (unsigned long)SSR_TYPE) >> SSR_TYPE_SHIFT; ssr->sub_client_id = (trigger_ssr_val & diff --git a/driver/vidc/src/venus_hfi.c b/driver/vidc/src/venus_hfi.c index 6a34ad3bd5..7b05acd36f 100644 --- a/driver/vidc/src/venus_hfi.c +++ b/driver/vidc/src/venus_hfi.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. - * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved. */ #include @@ -922,30 +922,12 @@ int venus_hfi_suspend(struct msm_vidc_core *core) return rc; } -bool is_ssr_type_allowed(struct msm_vidc_core *core, u32 type) -{ - u32 i; - const u32 *ssr_type = core->platform->data.msm_vidc_ssr_type; - u32 ssr_type_size = core->platform->data.msm_vidc_ssr_type_size; - - for (i = 0; i < ssr_type_size; i++) { - if (type == ssr_type[i]) - return true; - } - return false; -} - int venus_hfi_trigger_ssr(struct msm_vidc_core *core, u32 type, u32 client_id, u32 addr) { int rc = 0; u32 payload[2]; - if (!is_ssr_type_allowed(core, type)) { - d_vpr_h("SSR Type %d is not allowed\n", type); - return rc; - } - /* * call resume before preparing ssr hfi packet in core->packet * otherwise ssr hfi packet in core->packet will be overwritten From 6b9d8e6863ee191250e44e425d0a77c1bf26c7db Mon Sep 17 00:00:00 2001 From: Rajathi S Date: Thu, 14 Mar 2024 18:30:26 +0530 Subject: [PATCH 1034/1061] Video: driver: Update platform data for SKU1 - Update platform data for SKU1 which supports 4k30 encode and 4k30 decode. Change-Id: I4523030e46c995918489eaaaceb0d0998134477d Signed-off-by: Rajathi S --- .../platform/volcano/src/msm_vidc_volcano.c | 2170 ++++++++++++++++- 1 file changed, 2127 insertions(+), 43 deletions(-) diff --git a/driver/platform/volcano/src/msm_vidc_volcano.c b/driver/platform/volcano/src/msm_vidc_volcano.c index 7354bd8ab5..5de8d56dd7 100644 --- a/driver/platform/volcano/src/msm_vidc_volcano.c +++ b/driver/platform/volcano/src/msm_vidc_volcano.c @@ -29,17 +29,18 @@ #define DEFAULT_VIDEO_CONCEAL_COLOR_BLACK 0x8020010 #define MAX_BASE_LAYER_PRIORITY_ID 63 #define MAX_OP_POINT 31 -#define MAX_BITRATE 160000000 +#define MAX_BITRATE_V0 160000000 #define MAX_BITRATE_V1 100000000 #define DEFAULT_BITRATE 20000000 #define MINIMUM_FPS 1 -#define MAXIMUM_FPS 480 +#define MAXIMUM_FPS_V0 480 +#define MAXIMUM_FPS_V1 240 #define MAX_QP 51 #define DEFAULT_QP 20 #define MAX_CONSTANT_QUALITY 100 #define MIN_SLICE_BYTE_SIZE 512 -#define MAX_SLICE_BYTE_SIZE \ - ((MAX_BITRATE) >> 3) +#define MAX_SLICE_BYTE_SIZE_V0 \ + ((MAX_BITRATE_V0) >> 3) #define MAX_SLICE_BYTE_SIZE_V1 \ ((MAX_BITRATE_V1) >> 3) #define MAX_SLICE_MB_SIZE \ @@ -53,7 +54,7 @@ #define VP9 MSM_VIDC_VP9 #define HEIC MSM_VIDC_HEIC #define CODECS_ALL (H264 | HEVC | VP9 | HEIC) -#define MAXIMUM_OVERRIDE_VP9_FPS 200 +#define MAXIMUM_OVERRIDE_VP9_FPS 120 static struct codec_info codec_data_volcano[] = { { @@ -315,7 +316,49 @@ static struct msm_platform_core_capability core_data_volcano_v0[] = { {ENC_AUTO_FRAMERATE, 0}, {DEVICE_CAPS, V4L2_CAP_VIDEO_M2M_MPLANE | V4L2_CAP_META_CAPTURE | V4L2_CAP_STREAMING}, - {SUPPORTS_SYNX_FENCE, 1}, + {SUPPORTS_SYNX_FENCE, 0}, + {SUPPORTS_REQUESTS, 0}, +}; + +static struct msm_platform_core_capability core_data_volcano_v1[] = { + /* {type, value} */ + {ENC_CODECS, H264 | HEVC | HEIC}, + {DEC_CODECS, H264 | HEVC | VP9 | HEIC}, + {MAX_SESSION_COUNT, 16}, + {MAX_NUM_720P_SESSIONS, 8}, + {MAX_NUM_1080P_SESSIONS, 4}, + {MAX_NUM_4K_SESSIONS, 2}, + {MAX_SECURE_SESSION_COUNT, 3}, + {MAX_RT_MBPF, 40800}, /* ((3840x2176)/256) + (1920x1088)/256 */ + {MAX_MBPF, 69632}, /* ((4096x2176)/256) x 2 */ + /* max_load 4096x2160@30fps*/ + /* Concurrency:UHD@30fps decode + 1080p@30fps encode */ + {MAX_MBPS, 1224000}, + {MAX_IMAGE_MBPF, 1048576}, /* (16384x16384)/256 */ + {MAX_MBPF_HQ, 8160}, /* ((1920x1088)/256) */ + {MAX_MBPS_HQ, 244800}, /* ((1920x1088)/256)@30fps */ + {MAX_MBPF_B_FRAME, 8160},/* ((1920x1088)/256) */ + {MAX_MBPS_B_FRAME, 489600}, /* ((1920x1088)/256) MBs@60fps */ + {MAX_MBPS_ALL_INTRA, 489600}, /* ((1920x1088)/256)@60fps */ + {MAX_ENH_LAYER_COUNT, 5}, + {NUM_VPP_PIPE, 2}, + {SW_PC, 1}, + {FW_UNLOAD, 0}, + {HW_RESPONSE_TIMEOUT, HW_RESPONSE_TIMEOUT_VALUE}, /* 1000 ms */ + {SW_PC_DELAY, SW_PC_DELAY_VALUE }, /* 1500 ms (>HW_RESPONSE_TIMEOUT)*/ + {FW_UNLOAD_DELAY, FW_UNLOAD_DELAY_VALUE }, /* 3000 ms (>SW_PC_DELAY)*/ + {PAGEFAULT_NON_FATAL, 1}, + {PAGETABLE_CACHING, 0}, + {DCVS, 1}, + {DECODE_BATCH, 1}, + {DECODE_BATCH_TIMEOUT, 200}, + {STATS_TIMEOUT_MS, 2000}, + {AV_SYNC_WINDOW_SIZE, 40}, + {NON_FATAL_FAULTS, 1}, + {ENC_AUTO_FRAMERATE, 0}, + {DEVICE_CAPS, V4L2_CAP_VIDEO_M2M_MPLANE | V4L2_CAP_META_CAPTURE | + V4L2_CAP_STREAMING}, + {SUPPORTS_SYNX_FENCE, 0}, {SUPPORTS_REQUESTS, 0}, }; @@ -409,11 +452,8 @@ static struct msm_platform_inst_capability instance_cap_data_volcano_v0[] = { /* ((16384x16384)/256) */ {MBPF, ENC, HEIC, 64, 1048576, 1, 1048576}, - /* (4 * ((4096 * 2176)/256) */ - {MBPF, DEC, CODECS_ALL, 36, 139264, 1, 139264}, - /* (4096 * 2176) / 256 */ - {MBPF, DEC, VP9, 36, 34816, 1, 34816}, + {MBPF, DEC, CODECS_ALL, 36, 34816, 1, 34816}, /* ((8192x8192)/256) */ {MBPF, DEC, HEIC, 64, 262144, 1, 262144 }, @@ -436,21 +476,21 @@ static struct msm_platform_inst_capability instance_cap_data_volcano_v0[] = { {SECURE_MBPF, ENC | DEC, H264 | HEVC | VP9, 64, 34816, 1, 34816}, {FRAME_RATE, ENC, CODECS_ALL, - (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), + (MINIMUM_FPS << 16), (MAXIMUM_FPS_V0 << 16), 1, (DEFAULT_FPS << 16), 0, HFI_PROP_FRAME_RATE, CAP_FLAG_OUTPUT_PORT}, {FRAME_RATE, ENC, HEIC, - (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), + (MINIMUM_FPS << 16), (MAXIMUM_FPS_V0 << 16), 1, (MINIMUM_FPS << 16), 0, HFI_PROP_FRAME_RATE, CAP_FLAG_OUTPUT_PORT}, {FRAME_RATE, DEC, CODECS_ALL, - (MINIMUM_FPS << 16), (MAXIMUM_FPS << 16), + (MINIMUM_FPS << 16), (MAXIMUM_FPS_V0 << 16), 1, (DEFAULT_FPS << 16), V4L2_CID_MPEG_VIDC_FRAME_RATE, 0, @@ -635,7 +675,7 @@ static struct msm_platform_inst_capability instance_cap_data_volcano_v0[] = { * Dec: there's no use of Bitrate cap */ {BIT_RATE, ENC, H264 | HEVC, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + 1, MAX_BITRATE_V0, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_BITRATE, HFI_PROP_TOTAL_BITRATE, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | @@ -886,7 +926,7 @@ static struct msm_platform_inst_capability instance_cap_data_volcano_v0[] = { {PEAK_BITRATE, ENC, H264 | HEVC, /* default peak bitrate is 10% larger than avg bitrate */ - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + 1, MAX_BITRATE_V0, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_BITRATE_PEAK, HFI_PROP_TOTAL_PEAK_BITRATE, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | @@ -1052,83 +1092,83 @@ static struct msm_platform_inst_capability instance_cap_data_volcano_v0[] = { CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, {L0_BR, ENC, H264, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + 1, MAX_BITRATE_V0, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L0_BR, HFI_PROP_BITRATE_LAYER1, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, {L0_BR, ENC, HEVC, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + 1, MAX_BITRATE_V0, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L0_BR, HFI_PROP_BITRATE_LAYER1, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, {L1_BR, ENC, H264, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + 1, MAX_BITRATE_V0, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L1_BR, HFI_PROP_BITRATE_LAYER2, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, {L1_BR, ENC, HEVC, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + 1, MAX_BITRATE_V0, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L1_BR, HFI_PROP_BITRATE_LAYER2, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, {L2_BR, ENC, H264, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + 1, MAX_BITRATE_V0, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L2_BR, HFI_PROP_BITRATE_LAYER3, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, {L2_BR, ENC, HEVC, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + 1, MAX_BITRATE_V0, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L2_BR, HFI_PROP_BITRATE_LAYER3, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, {L3_BR, ENC, H264, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + 1, MAX_BITRATE_V0, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L3_BR, HFI_PROP_BITRATE_LAYER4, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, {L3_BR, ENC, HEVC, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + 1, MAX_BITRATE_V0, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L3_BR, HFI_PROP_BITRATE_LAYER4, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, {L4_BR, ENC, H264, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + 1, MAX_BITRATE_V0, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L4_BR, HFI_PROP_BITRATE_LAYER5, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, {L4_BR, ENC, HEVC, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + 1, MAX_BITRATE_V0, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L4_BR, HFI_PROP_BITRATE_LAYER5, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, {L5_BR, ENC, H264, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + 1, MAX_BITRATE_V0, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L5_BR, HFI_PROP_BITRATE_LAYER6, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, {L5_BR, ENC, HEVC, - 1, MAX_BITRATE, 1, DEFAULT_BITRATE, + 1, MAX_BITRATE_V0, 1, DEFAULT_BITRATE, V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L5_BR, HFI_PROP_BITRATE_LAYER6, CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | @@ -1370,7 +1410,7 @@ static struct msm_platform_inst_capability instance_cap_data_volcano_v0[] = { CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, {SLICE_MAX_BYTES, ENC, H264 | HEVC, - MIN_SLICE_BYTE_SIZE, MAX_SLICE_BYTE_SIZE, + MIN_SLICE_BYTE_SIZE, MAX_SLICE_BYTE_SIZE_V0, 1, MIN_SLICE_BYTE_SIZE, V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES, HFI_PROP_MULTI_SLICE_BYTES_COUNT, @@ -1531,7 +1571,7 @@ static struct msm_platform_inst_capability instance_cap_data_volcano_v0[] = { 0, S32_MAX, 1, 0, V4L2_CID_MPEG_VIDC_ENC_INPUT_COMPRESSION_RATIO, 0, CAP_FLAG_DYNAMIC_ALLOWED}, - {LAST_FLAG_EVENT_ENABLE, DEC|ENC, CODECS_ALL, + {LAST_FLAG_EVENT_ENABLE, DEC | ENC, CODECS_ALL, 0, 1, 1, 0, V4L2_CID_MPEG_VIDC_LAST_FLAG_EVENT_ENABLE}, {ALL_INTRA, ENC, H264 | HEVC, @@ -1604,7 +1644,7 @@ static struct msm_platform_inst_capability instance_cap_data_volcano_v0[] = { HFI_PROP_HISTOGRAM_INFO, CAP_FLAG_BITMASK | CAP_FLAG_META}, - {META_TRANSCODING_STAT_INFO, DEC, HEVC|H264, + {META_TRANSCODING_STAT_INFO, DEC, HEVC | H264, MSM_VIDC_META_DISABLE, MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, 0, MSM_VIDC_META_DISABLE, @@ -1612,7 +1652,7 @@ static struct msm_platform_inst_capability instance_cap_data_volcano_v0[] = { HFI_PROP_TRANSCODING_STAT_INFO, CAP_FLAG_BITMASK | CAP_FLAG_META}, - {META_TRANSCODING_STAT_INFO, ENC, HEVC|H264, + {META_TRANSCODING_STAT_INFO, ENC, HEVC | H264, MSM_VIDC_META_DISABLE, MSM_VIDC_META_DYN_ENABLE | MSM_VIDC_META_TX_INPUT, 0, MSM_VIDC_META_DISABLE, @@ -1682,20 +1722,1460 @@ static struct msm_platform_inst_capability instance_cap_data_volcano_v0[] = { HFI_PROP_SEI_HDR10PLUS_USERDATA, CAP_FLAG_BITMASK | CAP_FLAG_META}, - {META_DOLBY_RPU, ENC, HEVC, + {META_EVA_STATS, ENC, H264 | HEVC, MSM_VIDC_META_DISABLE, - MSM_VIDC_META_ENABLE | MSM_VIDC_META_TX_INPUT, + MSM_VIDC_META_ENABLE | + MSM_VIDC_META_DYN_ENABLE | MSM_VIDC_META_TX_INPUT, 0, MSM_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_DOLBY_RPU, - HFI_PROP_DOLBY_RPU_METADATA, + V4L2_CID_MPEG_VIDC_METADATA_EVA_STATS, + HFI_PROP_EVA_STAT_INFO, CAP_FLAG_BITMASK | CAP_FLAG_META}, - {META_DOLBY_RPU, DEC, H264 | HEVC, + {META_BUF_TAG, ENC, CODECS_ALL, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_TX_INPUT | + MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_BUFFER_TAG, + HFI_PROP_BUFFER_TAG, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + /* + * when fence enabled, client needs output buffer_tag + * in input metadata buffer done. + */ + {META_BUF_TAG, DEC, CODECS_ALL, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_TX_INPUT | + MSM_VIDC_META_TX_OUTPUT | MSM_VIDC_META_RX_INPUT | + MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_BUFFER_TAG, + HFI_PROP_BUFFER_TAG, + CAP_FLAG_BITMASK | CAP_FLAG_META | CAP_FLAG_DYNAMIC_ALLOWED}, + + {META_DPB_TAG_LIST, DEC, CODECS_ALL, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_INPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_DPB_TAG_LIST, + HFI_PROP_DPB_TAG_LIST, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_SUBFRAME_OUTPUT, ENC, HEIC | H264 | HEVC, MSM_VIDC_META_DISABLE, MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, 0, MSM_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_DOLBY_RPU, - HFI_PROP_DOLBY_RPU_METADATA, + V4L2_CID_MPEG_VIDC_METADATA_SUBFRAME_OUTPUT, + HFI_PROP_SUBFRAME_OUTPUT, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_SUBFRAME_OUTPUT, DEC, CODECS_ALL, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_SUBFRAME_OUTPUT, + HFI_PROP_SUBFRAME_OUTPUT, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_ENC_QP_METADATA, ENC, CODECS_ALL, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_ENC_QP_METADATA, + HFI_PROP_ENC_QP_METADATA, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_ROI_INFO, ENC, H264 | HEVC, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_TX_INPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_ROI_INFO, + HFI_PROP_ROI_INFO, + CAP_FLAG_INPUT_PORT | CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_DEC_QP_METADATA, DEC, CODECS_ALL, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_DEC_QP_METADATA, + HFI_PROP_DEC_QP_METADATA, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {GRID_ENABLE, ENC, HEIC, + 0, 1, 1, 1, + 0, + HFI_PROP_HEIC_GRID_ENABLE, + CAP_FLAG_OUTPUT_PORT}, + + {GRID_SIZE, ENC, HEIC, + HEIC_GRID_WIDTH, HEIC_GRID_WIDTH * 2, + HEIC_GRID_WIDTH, HEIC_GRID_WIDTH, + V4L2_CID_MPEG_VIDC_GRID_WIDTH}, + + {COMPLEXITY, ENC, H264 | HEVC, + 0, 100, + 1, DEFAULT_COMPLEXITY, + V4L2_CID_MPEG_VIDC_VENC_COMPLEXITY}, + + {SIGNAL_COLOR_INFO, ENC, CODECS_ALL, + 0, INT_MAX, 1, 0, + V4L2_CID_MPEG_VIDC_SIGNAL_COLOR_INFO, + HFI_PROP_SIGNAL_COLOR_INFO, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, +}; + +static struct msm_platform_inst_capability instance_cap_data_volcano_v1[] = { + /* {cap, domain, codec, + * min, max, step_or_mask, value, + * v4l2_id, + * hfi_id, + * flags} + */ + {DRV_VERSION, DEC | ENC, CODECS_ALL, + 0, INT_MAX, 1, DRIVER_VERSION, + V4L2_CID_MPEG_VIDC_DRIVER_VERSION}, + + {FRAME_WIDTH, DEC, CODECS_ALL, 96, 4096, 1, 1920}, + + {FRAME_WIDTH, ENC, CODECS_ALL, 128, 4096, 1, 1920}, + + {FRAME_WIDTH, ENC, HEIC, 128, 16384, 1, 16384}, + + {LOSSLESS_FRAME_WIDTH, ENC, H264 | HEVC, 128, 4096, 1, 1920}, + + {SECURE_FRAME_WIDTH, DEC, CODECS_ALL, 96, 4096, 1, 1920}, + + {SECURE_FRAME_WIDTH, ENC, CODECS_ALL, 128, 4096, 1, 1920}, + + {FRAME_HEIGHT, DEC, CODECS_ALL, 96, 4096, 1, 1080}, + + {FRAME_HEIGHT, ENC, CODECS_ALL, 128, 4096, 1, 1080}, + + {FRAME_HEIGHT, ENC, HEIC, 128, 16384, 1, 16384}, + + {LOSSLESS_FRAME_HEIGHT, ENC, CODECS_ALL, 128, 4096, 1, 1080}, + + {SECURE_FRAME_HEIGHT, DEC, CODECS_ALL, 96, 4096, 1, 1080}, + + {SECURE_FRAME_HEIGHT, ENC, CODECS_ALL, 128, 4096, 1, 1080}, + + {PIX_FMTS, ENC | DEC, H264, + MSM_VIDC_FMT_NV12, + MSM_VIDC_FMT_NV12C, + MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C, + MSM_VIDC_FMT_NV12C}, + + {PIX_FMTS, ENC | DEC, HEVC, + MSM_VIDC_FMT_NV12, + MSM_VIDC_FMT_TP10C, + MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C | + MSM_VIDC_FMT_P010 | MSM_VIDC_FMT_TP10C, + MSM_VIDC_FMT_NV12C}, + + {PIX_FMTS, ENC, HEIC, + MSM_VIDC_FMT_NV12, + MSM_VIDC_FMT_P010, + MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_P010, + MSM_VIDC_FMT_NV12}, + + {PIX_FMTS, DEC, HEIC, + MSM_VIDC_FMT_NV12, + MSM_VIDC_FMT_TP10C, + MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C | + MSM_VIDC_FMT_P010 | MSM_VIDC_FMT_TP10C, + MSM_VIDC_FMT_NV12C}, + + {PIX_FMTS, DEC, VP9, + MSM_VIDC_FMT_NV12, + MSM_VIDC_FMT_TP10C, + MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C | + MSM_VIDC_FMT_P010 | MSM_VIDC_FMT_TP10C, + MSM_VIDC_FMT_NV12C}, + + {MIN_BUFFERS_INPUT, ENC | DEC, CODECS_ALL, 0, 64, 1, 4, + V4L2_CID_MIN_BUFFERS_FOR_OUTPUT, + 0, + CAP_FLAG_VOLATILE}, + + {MIN_BUFFERS_INPUT, ENC | DEC, HEIC, 0, 64, 1, 1, + V4L2_CID_MIN_BUFFERS_FOR_OUTPUT, + 0, + CAP_FLAG_VOLATILE}, + + {MIN_BUFFERS_OUTPUT, ENC | DEC, CODECS_ALL, + 0, 64, 1, 4, + V4L2_CID_MIN_BUFFERS_FOR_CAPTURE, + HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_VOLATILE}, + + /* (4096 * 2176) / 256 */ + {MBPF, ENC, CODECS_ALL, 64, 34816, 1, 34816}, + + /* ((16384x16384)/256) */ + {MBPF, ENC, HEIC, 64, 1048576, 1, 1048576}, + + /* (4096 * 2176) / 256 */ + {MBPF, DEC, CODECS_ALL, 36, 34816, 1, 34816}, + + /* ((8192x8192)/256) */ + {MBPF, DEC, HEIC, 64, 262144, 1, 262144 }, //DBT + + /* (4096 * 2176) / 256 */ + {LOSSLESS_MBPF, ENC, H264 | HEVC, 64, 34816, 1, 34816}, + + /* Batch Mode Decode */ + /* BATCH_MBPF + 2 is done for chipsets other than lanai + * due to timeline constraints since msm_vidc_allow_decode_batch + * has checks to allow batching for less than BATCH_MBPF. + * Same applies for BATCH_FPS. + */ + /* (1920 * 1088) / 256 */ + {BATCH_MBPF, DEC, H264 | HEVC | VP9, 64, 8162, 1, 8162}, + + {BATCH_FPS, DEC, H264 | HEVC | VP9, 1, 61, 1, 61}, + + /* (4096 * 2176) / 256 */ + {SECURE_MBPF, ENC | DEC, H264 | HEVC | VP9, 64, 34816, 1, 34816}, + + {FRAME_RATE, ENC, CODECS_ALL, + (MINIMUM_FPS << 16), (MAXIMUM_FPS_V1 << 16), + 1, (DEFAULT_FPS << 16), + 0, + HFI_PROP_FRAME_RATE, + CAP_FLAG_OUTPUT_PORT}, + + {FRAME_RATE, ENC, HEIC, + (MINIMUM_FPS << 16), (MAXIMUM_FPS_V1 << 16), + 1, (MINIMUM_FPS << 16), + 0, + HFI_PROP_FRAME_RATE, + CAP_FLAG_OUTPUT_PORT}, + + {FRAME_RATE, DEC, CODECS_ALL, + (MINIMUM_FPS << 16), (MAXIMUM_FPS_V1 << 16), + 1, (DEFAULT_FPS << 16), + V4L2_CID_MPEG_VIDC_FRAME_RATE, + 0, + CAP_FLAG_OUTPUT_PORT | + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {FRAME_RATE, DEC, VP9, + (MINIMUM_FPS << 16), (MAXIMUM_OVERRIDE_VP9_FPS << 16), + 1, (DEFAULT_FPS << 16), + V4L2_CID_MPEG_VIDC_FRAME_RATE, + 0, + CAP_FLAG_OUTPUT_PORT | + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {OPERATING_RATE, ENC, CODECS_ALL, + (MINIMUM_FPS << 16), INT_MAX, + 1, (DEFAULT_FPS << 16)}, + + {OPERATING_RATE, DEC, CODECS_ALL, + (MINIMUM_FPS << 16), INT_MAX, + 1, (DEFAULT_FPS << 16), + V4L2_CID_MPEG_VIDC_OPERATING_RATE, + 0, + CAP_FLAG_OUTPUT_PORT | + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {INPUT_RATE, ENC | DEC, CODECS_ALL, + (MINIMUM_FPS << 16), INT_MAX, + 1, (DEFAULT_FPS << 16)}, + + {TIMESTAMP_RATE, ENC | DEC, CODECS_ALL, + (MINIMUM_FPS << 16), INT_MAX, + 1, (DEFAULT_FPS << 16)}, + + {SCALE_FACTOR, ENC, H264 | HEVC, 1, 8, 1, 8}, + + {MB_CYCLES_VSP, ENC, CODECS_ALL, 25, 25, 1, 25}, + + {MB_CYCLES_VSP, DEC, CODECS_ALL, 25, 25, 1, 25}, + + {MB_CYCLES_VSP, DEC, VP9, 60, 60, 1, 60}, + + {MB_CYCLES_VPP, ENC, CODECS_ALL, 675, 675, 1, 675}, + + {MB_CYCLES_VPP, DEC, CODECS_ALL, 200, 200, 1, 200}, + + {MB_CYCLES_LP, ENC, CODECS_ALL, 320, 320, 1, 320}, + + {MB_CYCLES_LP, DEC, CODECS_ALL, 200, 200, 1, 200}, + + {MB_CYCLES_FW, ENC | DEC, CODECS_ALL, 326389, 326389, 1, 326389}, + + {MB_CYCLES_FW_VPP, ENC | DEC, CODECS_ALL, 44156, 44156, 1, 44156}, + + {ENC_RING_BUFFER_COUNT, ENC, CODECS_ALL, + 0, 0, 1, 0}, + + {CLIENT_ID, ENC | DEC, CODECS_ALL, + INVALID_CLIENT_ID, INT_MAX, 1, INVALID_CLIENT_ID, + V4L2_CID_MPEG_VIDC_CLIENT_ID}, + + {SECURE_MODE, ENC | DEC, H264 | HEVC | VP9, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_SECURE, + HFI_PROP_SECURE, + CAP_FLAG_NONE}, + + /* + * Client will enable V4L2_CID_MPEG_VIDC_METADATA_OUTBUF_FENCE + * to get fence_id in input metadata buffer done. + */ + {META_OUTBUF_FENCE, DEC, H264 | HEVC | VP9, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_INPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_OUTBUF_FENCE, + HFI_PROP_FENCE, + CAP_FLAG_BITMASK | CAP_FLAG_META | CAP_FLAG_DYNAMIC_ALLOWED}, + + /* + * Client to do set_ctrl with FENCE_ID to set fence_id + * and then client will do get_ctrl with FENCE_FD to get + * fence_fd corresponding to client set fence_id. + */ + {FENCE_ID, DEC, CODECS_ALL, + 0, INT_MAX, 1, 0, + V4L2_CID_MPEG_VIDC_SW_FENCE_ID, + 0, + CAP_FLAG_DYNAMIC_ALLOWED | CAP_FLAG_OUTPUT_PORT}, + + {FENCE_FD, DEC, CODECS_ALL, + INVALID_FD, INT_MAX, 1, INVALID_FD, + V4L2_CID_MPEG_VIDC_SW_FENCE_FD, + 0, + CAP_FLAG_VOLATILE}, + + {TS_REORDER, DEC, H264 | HEVC, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_TS_REORDER}, + + {HFLIP, ENC, CODECS_ALL, + 0, 1, 1, 0, + V4L2_CID_HFLIP, + HFI_PROP_FLIP, + CAP_FLAG_OUTPUT_PORT | + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {VFLIP, ENC, CODECS_ALL, + 0, 1, 1, 0, + V4L2_CID_VFLIP, + HFI_PROP_FLIP, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {ROTATION, ENC, CODECS_ALL, + 0, 270, 90, 0, + V4L2_CID_ROTATE, + HFI_PROP_ROTATION, + CAP_FLAG_OUTPUT_PORT}, + + {SUPER_FRAME, ENC, H264 | HEVC, + 0, 32, 1, 0, + V4L2_CID_MPEG_VIDC_SUPERFRAME, 0, + CAP_FLAG_DYNAMIC_ALLOWED}, + + {SLICE_DECODE, DEC, H264 | HEVC, + V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_MSM_VIDC_DISABLE, + 0, + V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDEO_DECODER_SLICE_INTERFACE, + 0}, + + {HEADER_MODE, ENC, CODECS_ALL, + V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE, + V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME, + BIT(V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE) | + BIT(V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME), + V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE, + V4L2_CID_MPEG_VIDEO_HEADER_MODE, + HFI_PROP_SEQ_HEADER_MODE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {PREPEND_SPSPPS_TO_IDR, ENC, CODECS_ALL, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDEO_PREPEND_SPSPPS_TO_IDR}, + + {VUI_TIMING_INFO, ENC, CODECS_ALL, + V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_MPEG_MSM_VIDC_ENABLE, + 1, V4L2_MPEG_MSM_VIDC_DISABLE, + V4L2_CID_MPEG_VIDC_VUI_TIMING_INFO, + HFI_PROP_DISABLE_VUI_TIMING_INFO, + CAP_FLAG_OUTPUT_PORT}, + + {WITHOUT_STARTCODE, ENC, CODECS_ALL, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE, + HFI_PROP_NAL_LENGTH_FIELD, + CAP_FLAG_OUTPUT_PORT}, + + {NAL_LENGTH_FIELD, ENC, CODECS_ALL, + V4L2_MPEG_VIDEO_HEVC_SIZE_0, + V4L2_MPEG_VIDEO_HEVC_SIZE_4, + BIT(V4L2_MPEG_VIDEO_HEVC_SIZE_0) | + BIT(V4L2_MPEG_VIDEO_HEVC_SIZE_4), + V4L2_MPEG_VIDEO_HEVC_SIZE_0, + V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD, + HFI_PROP_NAL_LENGTH_FIELD, + CAP_FLAG_MENU | CAP_FLAG_OUTPUT_PORT}, + + /* TODO: Firmware introduced enumeration type for this + * with and without seq header. + */ + {REQUEST_I_FRAME, ENC, H264 | HEVC, + 0, 0, 0, 0, + V4L2_CID_MPEG_VIDEO_FORCE_KEY_FRAME, + HFI_PROP_REQUEST_SYNC_FRAME, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + /* Enc: Keeping CABAC and CAVLC as same bitrate. + * Dec: there's no use of Bitrate cap + */ + {BIT_RATE, ENC, H264 | HEVC, + 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_BITRATE, + HFI_PROP_TOTAL_BITRATE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {BITRATE_MODE, ENC, H264, + V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, + V4L2_MPEG_VIDEO_BITRATE_MODE_CBR, + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_VBR) | + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CBR), + V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, + V4L2_CID_MPEG_VIDEO_BITRATE_MODE, + HFI_PROP_RATE_CONTROL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {BITRATE_MODE, ENC, HEVC, + V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, + V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_VBR) | + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CBR) | + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CQ), + V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, + V4L2_CID_MPEG_VIDEO_BITRATE_MODE, + HFI_PROP_RATE_CONTROL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {BITRATE_MODE, ENC, HEIC, + V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, + V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, + BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CQ), + V4L2_MPEG_VIDEO_BITRATE_MODE_CQ, + V4L2_CID_MPEG_VIDEO_BITRATE_MODE, + HFI_PROP_RATE_CONTROL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {CABAC_MAX_BITRATE, ENC, H264 | HEVC, 0, + MAX_BITRATE_V1, 1, MAX_BITRATE_V1}, + + {CAVLC_MAX_BITRATE, ENC, H264, 0, + MAX_BITRATE_V1, 1, MAX_BITRATE_V1}, + + {ALLINTRA_MAX_BITRATE, ENC, H264 | HEVC, 0, + MAX_BITRATE_V1, 1, MAX_BITRATE_V1}, + + {LOWLATENCY_MAX_BITRATE, ENC, H264 | HEVC, 0, + 70000000, 1, 70000000}, + + {NUM_COMV, DEC, CODECS_ALL, + 0, INT_MAX, 1, 0}, + + {LOSSLESS, ENC, HEVC, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU}, + + {FRAME_SKIP_MODE, ENC, H264 | HEVC | HEIC, + V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED, + V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT, + BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED) | + BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_LEVEL_LIMIT) | + BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT), + V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED, + V4L2_CID_MPEG_VIDEO_FRAME_SKIP_MODE, + 0, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {FRAME_RC_ENABLE, ENC, H264 | HEVC | HEIC, + 0, 1, 1, 1, + V4L2_CID_MPEG_VIDEO_FRAME_RC_ENABLE}, + + {CONSTANT_QUALITY, ENC, HEVC, + 1, MAX_CONSTANT_QUALITY, 1, 90, + V4L2_CID_MPEG_VIDEO_CONSTANT_QUALITY, + HFI_PROP_CONSTANT_QUALITY, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {CONSTANT_QUALITY, ENC, HEIC, + 1, MAX_CONSTANT_QUALITY, 1, 100, + V4L2_CID_MPEG_VIDEO_CONSTANT_QUALITY, + HFI_PROP_CONSTANT_QUALITY, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {GOP_SIZE, ENC, CODECS_ALL, + 0, INT_MAX, 1, 2 * DEFAULT_FPS - 1, + V4L2_CID_MPEG_VIDEO_GOP_SIZE, + HFI_PROP_MAX_GOP_FRAMES, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {GOP_SIZE, ENC, HEIC, + 0, INT_MAX, 1, 0 /* all intra */, + V4L2_CID_MPEG_VIDEO_GOP_SIZE, + HFI_PROP_MAX_GOP_FRAMES, + CAP_FLAG_OUTPUT_PORT | + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {GOP_CLOSURE, ENC, H264 | HEVC, + 0, 1, 1, 1, + V4L2_CID_MPEG_VIDEO_GOP_CLOSURE, + 0}, + + {B_FRAME, ENC, H264 | HEVC, + 0, 7, 1, 0, + V4L2_CID_MPEG_VIDEO_B_FRAMES, + HFI_PROP_MAX_B_FRAMES, + CAP_FLAG_OUTPUT_PORT}, + + {B_FRAME, ENC, HEIC, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDEO_B_FRAMES, + HFI_PROP_MAX_B_FRAMES, + CAP_FLAG_OUTPUT_PORT}, + + {BLUR_TYPES, ENC, H264 | HEVC, + MSM_VIDC_BLUR_NONE, MSM_VIDC_BLUR_EXTERNAL, + BIT(MSM_VIDC_BLUR_NONE) | BIT(MSM_VIDC_BLUR_EXTERNAL), + MSM_VIDC_BLUR_NONE, + V4L2_CID_MPEG_VIDC_VIDEO_BLUR_TYPES, + HFI_PROP_BLUR_TYPES, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {BLUR_RESOLUTION, ENC, H264 | HEVC, + 0, S32_MAX, 1, 0, + V4L2_CID_MPEG_VIDC_VIDEO_BLUR_RESOLUTION, + HFI_PROP_BLUR_RESOLUTION, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {CSC, ENC, CODECS_ALL, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_CSC, + HFI_PROP_CSC, + CAP_FLAG_OUTPUT_PORT}, + + {CSC_CUSTOM_MATRIX, ENC, CODECS_ALL, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_VIDEO_VPE_CSC_CUSTOM_MATRIX, + HFI_PROP_CSC_MATRIX, + CAP_FLAG_OUTPUT_PORT}, + + {LOWLATENCY_MODE, ENC, H264 | HEVC, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_LOWLATENCY_REQUEST, + 0, + CAP_FLAG_NONE}, + + {LOWLATENCY_MODE, DEC, H264 | HEVC | VP9, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_LOWLATENCY_REQUEST, + HFI_PROP_SEQ_CHANGE_AT_SYNC_FRAME, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {LTR_COUNT, ENC, H264 | HEVC, + 0, MAX_LTR_FRAME_COUNT, 1, 0, + V4L2_CID_MPEG_VIDEO_LTR_COUNT, + HFI_PROP_LTR_COUNT, + CAP_FLAG_OUTPUT_PORT}, + + {USE_LTR, ENC, H264 | HEVC, + 0, + ((1 << MAX_LTR_FRAME_COUNT) - 1), + 0, 0, + V4L2_CID_MPEG_VIDEO_USE_LTR_FRAMES, + HFI_PROP_LTR_USE, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {MARK_LTR, ENC, H264 | HEVC, + INVALID_DEFAULT_MARK_OR_USE_LTR, + (MAX_LTR_FRAME_COUNT - 1), + 1, INVALID_DEFAULT_MARK_OR_USE_LTR, + V4L2_CID_MPEG_VIDEO_FRAME_LTR_INDEX, + HFI_PROP_LTR_MARK, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {BASELAYER_PRIORITY, ENC, H264, + 0, MAX_BASE_LAYER_PRIORITY_ID, 1, 0, + V4L2_CID_MPEG_VIDEO_BASELAYER_PRIORITY_ID, + HFI_PROP_BASELAYER_PRIORITYID, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {IR_TYPE, ENC, H264 | HEVC, + V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_RANDOM, + V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_CYCLIC, + BIT(V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_RANDOM) | + BIT(V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_CYCLIC), + V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_RANDOM, + V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE, + 0, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {IR_PERIOD, ENC, H264 | HEVC, + 0, INT_MAX, 1, 0, + V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD, + 0, + CAP_FLAG_INPUT_PORT | CAP_FLAG_OUTPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {AU_DELIMITER, ENC, H264 | HEVC, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDEO_AU_DELIMITER, + HFI_PROP_AUD, + CAP_FLAG_OUTPUT_PORT}, + + {TIME_DELTA_BASED_RC, ENC, H264 | HEVC, + 0, 1, 1, 1, + V4L2_CID_MPEG_VIDC_TIME_DELTA_BASED_RC, + HFI_PROP_TIME_DELTA_BASED_RATE_CONTROL, + CAP_FLAG_OUTPUT_PORT}, + + {TIME_DELTA_BASED_RC, ENC, HEIC, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_TIME_DELTA_BASED_RC, + HFI_PROP_TIME_DELTA_BASED_RATE_CONTROL, + CAP_FLAG_OUTPUT_PORT}, + + {CONTENT_ADAPTIVE_CODING, ENC, H264 | HEVC, + 0, 1, 1, 1, + V4L2_CID_MPEG_VIDC_CONTENT_ADAPTIVE_CODING, + HFI_PROP_CONTENT_ADAPTIVE_CODING, + CAP_FLAG_OUTPUT_PORT}, + + {REQUEST_PREPROCESS, ENC, H264 | HEVC, + MSM_VIDC_PREPROCESS_NONE, + MSM_VIDC_PREPROCESS_NONE, + BIT(MSM_VIDC_PREPROCESS_NONE), + MSM_VIDC_PREPROCESS_NONE, + 0, HFI_PROP_REQUEST_PREPROCESS, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {BITRATE_BOOST, ENC, H264 | HEVC, + 0, MAX_BITRATE_BOOST, 25, MAX_BITRATE_BOOST, + V4L2_CID_MPEG_VIDC_QUALITY_BITRATE_BOOST, + HFI_PROP_BITRATE_BOOST, + CAP_FLAG_OUTPUT_PORT}, + + {MIN_QUALITY, ENC, H264 | HEVC, + 0, MAX_SUPPORTED_MIN_QUALITY, 70, MAX_SUPPORTED_MIN_QUALITY, + 0, + HFI_PROP_MAINTAIN_MIN_QUALITY, + CAP_FLAG_OUTPUT_PORT}, + + {VBV_DELAY, ENC, H264 | HEVC, + 200, 300, 100, 300, + V4L2_CID_MPEG_VIDEO_VBV_DELAY, + HFI_PROP_VBV_DELAY, + CAP_FLAG_OUTPUT_PORT}, + + {PEAK_BITRATE, ENC, H264 | HEVC, + /* default peak bitrate is 10% larger than avg bitrate */ + 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_BITRATE_PEAK, + HFI_PROP_TOTAL_PEAK_BITRATE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {MIN_FRAME_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, + V4L2_CID_MPEG_VIDEO_H264_MIN_QP, + HFI_PROP_MIN_QP_PACKED, + CAP_FLAG_OUTPUT_PORT}, + + {MIN_FRAME_QP, ENC, HEVC | HEIC, + MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, + V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP, + HFI_PROP_MIN_QP_PACKED, + CAP_FLAG_OUTPUT_PORT}, + + {I_FRAME_MIN_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, + V4L2_CID_MPEG_VIDEO_H264_I_FRAME_MIN_QP}, + + {I_FRAME_MIN_QP, ENC, HEVC | HEIC, + MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, + V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_MIN_QP}, + + {P_FRAME_MIN_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, + V4L2_CID_MPEG_VIDEO_H264_P_FRAME_MIN_QP}, + + {P_FRAME_MIN_QP, ENC, HEVC | HEIC, + MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, + V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_MIN_QP}, + + {B_FRAME_MIN_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT, + V4L2_CID_MPEG_VIDEO_H264_B_FRAME_MIN_QP}, + + {B_FRAME_MIN_QP, ENC, HEVC | HEIC, + MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT, + V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_MIN_QP}, + + {MAX_FRAME_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_H264_MAX_QP, + HFI_PROP_MAX_QP_PACKED, + CAP_FLAG_OUTPUT_PORT}, + + {MAX_FRAME_QP, ENC, HEVC | HEIC, + MIN_QP_10BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP, + HFI_PROP_MAX_QP_PACKED, + CAP_FLAG_OUTPUT_PORT}, + + {I_FRAME_MAX_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_H264_I_FRAME_MAX_QP}, + + {I_FRAME_MAX_QP, ENC, HEVC | HEIC, + MIN_QP_10BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_MAX_QP}, + + {P_FRAME_MAX_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_H264_P_FRAME_MAX_QP}, + + {P_FRAME_MAX_QP, ENC, HEVC | HEIC, + MIN_QP_10BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_MAX_QP}, + + {B_FRAME_MAX_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_H264_B_FRAME_MAX_QP}, + + {B_FRAME_MAX_QP, ENC, HEVC | HEIC, + MIN_QP_10BIT, MAX_QP, 1, MAX_QP, + V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_MAX_QP}, + + {I_FRAME_QP, ENC, HEVC, + MIN_QP_10BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {I_FRAME_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {P_FRAME_QP, ENC, HEVC, + MIN_QP_10BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {P_FRAME_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {B_FRAME_QP, ENC, HEVC, + MIN_QP_10BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {B_FRAME_QP, ENC, H264, + MIN_QP_8BIT, MAX_QP, 1, DEFAULT_QP, + V4L2_CID_MPEG_VIDEO_H264_B_FRAME_QP, + HFI_PROP_QP_PACKED, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {LAYER_TYPE, ENC, HEVC, + V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B, + V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P, + BIT(V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B) | + BIT(V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P), + V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE, + HFI_PROP_LAYER_ENCODING_TYPE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LAYER_TYPE, ENC, H264, + V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_B, + V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P, + BIT(V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_B) | + BIT(V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P), + V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P, + V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_TYPE, + HFI_PROP_LAYER_ENCODING_TYPE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LAYER_ENABLE, ENC, H264, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING, + HFI_PROP_LAYER_ENCODING_TYPE, + CAP_FLAG_OUTPUT_PORT}, + + {LAYER_ENABLE, ENC, HEVC, + 0, 1, 1, 0, + 0, + 0, + CAP_FLAG_OUTPUT_PORT}, + + {ENH_LAYER_COUNT, ENC, HEVC, + 0, 5, 1, 0, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER, + HFI_PROP_LAYER_COUNT, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {ENH_LAYER_COUNT, ENC, H264, + 0, 5, 1, 0, + V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_LAYER, + HFI_PROP_LAYER_COUNT, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + {L0_BR, ENC, H264, + 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L0_BR, + HFI_PROP_BITRATE_LAYER1, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L0_BR, ENC, HEVC, + 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L0_BR, + HFI_PROP_BITRATE_LAYER1, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L1_BR, ENC, H264, + 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L1_BR, + HFI_PROP_BITRATE_LAYER2, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L1_BR, ENC, HEVC, + 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L1_BR, + HFI_PROP_BITRATE_LAYER2, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L2_BR, ENC, H264, + 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L2_BR, + HFI_PROP_BITRATE_LAYER3, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L2_BR, ENC, HEVC, + 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L2_BR, + HFI_PROP_BITRATE_LAYER3, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L3_BR, ENC, H264, + 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L3_BR, + HFI_PROP_BITRATE_LAYER4, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + {L3_BR, ENC, HEVC, + 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L3_BR, + HFI_PROP_BITRATE_LAYER4, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L4_BR, ENC, H264, + 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L4_BR, + HFI_PROP_BITRATE_LAYER5, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L4_BR, ENC, HEVC, + 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L4_BR, + HFI_PROP_BITRATE_LAYER5, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L5_BR, ENC, H264, + 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L5_BR, + HFI_PROP_BITRATE_LAYER6, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {L5_BR, ENC, HEVC, + 1, MAX_BITRATE_V1, 1, DEFAULT_BITRATE, + V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L5_BR, + HFI_PROP_BITRATE_LAYER6, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED}, + + {ENTROPY_MODE, ENC, H264, + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC, + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, + BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC) | + BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC), + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, + V4L2_CID_MPEG_VIDEO_H264_ENTROPY_MODE, + HFI_PROP_CABAC_SESSION, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {ENTROPY_MODE, DEC, H264 | HEVC | VP9, + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC, + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, + BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC) | + BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC), + V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, + 0, + HFI_PROP_CABAC_SESSION}, + + {PROFILE, ENC | DEC, H264, + V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE, + V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH, + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_BASELINE) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_MAIN) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_HIGH), + V4L2_MPEG_VIDEO_H264_PROFILE_HIGH, + V4L2_CID_MPEG_VIDEO_H264_PROFILE, + HFI_PROP_PROFILE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {PROFILE, ENC | DEC, HEVC | HEIC, + V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN, + V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE, + BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN) | + BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE) | + BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10) | + BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE), + V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN, + V4L2_CID_MPEG_VIDEO_HEVC_PROFILE, + HFI_PROP_PROFILE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {PROFILE, DEC, VP9, + V4L2_MPEG_VIDEO_VP9_PROFILE_0, + V4L2_MPEG_VIDEO_VP9_PROFILE_2, + BIT(V4L2_MPEG_VIDEO_VP9_PROFILE_0) | + BIT(V4L2_MPEG_VIDEO_VP9_PROFILE_2), + V4L2_MPEG_VIDEO_VP9_PROFILE_0, + V4L2_CID_MPEG_VIDEO_VP9_PROFILE, + HFI_PROP_PROFILE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LEVEL, ENC, H264, + V4L2_MPEG_VIDEO_H264_LEVEL_1_0, + V4L2_MPEG_VIDEO_H264_LEVEL_5_1, + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1B) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_3) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_1), + V4L2_MPEG_VIDEO_H264_LEVEL_5_1, + V4L2_CID_MPEG_VIDEO_H264_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LEVEL, ENC, HEVC | HEIC, + V4L2_MPEG_VIDEO_HEVC_LEVEL_1, + V4L2_MPEG_VIDEO_HEVC_LEVEL_5, + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5), + V4L2_MPEG_VIDEO_HEVC_LEVEL_5, + V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LEVEL, DEC, H264, + V4L2_MPEG_VIDEO_H264_LEVEL_1_0, + V4L2_MPEG_VIDEO_H264_LEVEL_5_1, + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1B) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_3) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_1), + V4L2_MPEG_VIDEO_H264_LEVEL_5_1, + V4L2_CID_MPEG_VIDEO_H264_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LEVEL, DEC, HEVC | HEIC, + V4L2_MPEG_VIDEO_HEVC_LEVEL_1, + V4L2_MPEG_VIDEO_HEVC_LEVEL_5, + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5), + V4L2_MPEG_VIDEO_HEVC_LEVEL_5, + V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LEVEL, DEC, VP9, + V4L2_MPEG_VIDEO_VP9_LEVEL_1_0, + V4L2_MPEG_VIDEO_VP9_LEVEL_5_0, + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_1_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_1_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_2_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_3_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_4_0) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_0), + V4L2_MPEG_VIDEO_VP9_LEVEL_5_0, + V4L2_CID_MPEG_VIDEO_VP9_LEVEL, + HFI_PROP_LEVEL, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {HEVC_TIER, ENC | DEC, HEVC, + V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, + V4L2_MPEG_VIDEO_HEVC_TIER_HIGH, + BIT(V4L2_MPEG_VIDEO_HEVC_TIER_MAIN) | + BIT(V4L2_MPEG_VIDEO_HEVC_TIER_HIGH), + V4L2_MPEG_VIDEO_HEVC_TIER_HIGH, + V4L2_CID_MPEG_VIDEO_HEVC_TIER, + HFI_PROP_TIER, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {HEVC_TIER, ENC | DEC, HEIC, + V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, + V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, + BIT(V4L2_MPEG_VIDEO_HEVC_TIER_MAIN), + V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, + V4L2_CID_MPEG_VIDEO_HEVC_TIER, + HFI_PROP_TIER, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LF_MODE, ENC, H264, + V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED, + DB_H264_DISABLE_SLICE_BOUNDARY, + BIT(V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED) | + BIT(V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_DISABLED) | + BIT(DB_H264_DISABLE_SLICE_BOUNDARY), + V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED, + V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_MODE, + HFI_PROP_DEBLOCKING_MODE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LF_MODE, ENC, HEVC | HEIC, + V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_DISABLED, + DB_HEVC_DISABLE_SLICE_BOUNDARY, + BIT(V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_DISABLED) | + BIT(V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_ENABLED) | + BIT(DB_HEVC_DISABLE_SLICE_BOUNDARY), + V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_ENABLED, + V4L2_CID_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE, + HFI_PROP_DEBLOCKING_MODE, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {LF_ALPHA, ENC, H264, + -6, 6, 1, 0, + V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_ALPHA}, + + {LF_ALPHA, ENC, HEVC | HEIC, + -6, 6, 1, 0, + V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2}, + + {LF_BETA, ENC, H264, + -6, 6, 1, 0, + V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_BETA}, + + {LF_BETA, ENC, HEVC | HEIC, + -6, 6, 1, 0, + V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2}, + + {SLICE_MODE, ENC, H264 | HEVC, + V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, + V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_BYTES, + BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE) | + BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_MB) | + BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_BYTES), + V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, + V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE, + 0, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {SLICE_MODE, ENC, HEIC, + V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, + V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, + BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE), + V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, + V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE, + 0, + CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU}, + + {SLICE_MAX_BYTES, ENC, H264 | HEVC, + MIN_SLICE_BYTE_SIZE, MAX_SLICE_BYTE_SIZE_V1, + 1, MIN_SLICE_BYTE_SIZE, + V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES, + HFI_PROP_MULTI_SLICE_BYTES_COUNT, + CAP_FLAG_OUTPUT_PORT}, + + {SLICE_MAX_MB, ENC, H264 | HEVC, + 1, MAX_SLICE_MB_SIZE, 1, 1, + V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB, + HFI_PROP_MULTI_SLICE_MB_COUNT, + CAP_FLAG_OUTPUT_PORT}, + + {MB_RC, ENC, H264 | HEVC, + 0, 1, 1, 1, + V4L2_CID_MPEG_VIDEO_MB_RC_ENABLE, + 0, + CAP_FLAG_OUTPUT_PORT}, + + {TRANSFORM_8X8, ENC, H264, + 0, 1, 1, 1, + V4L2_CID_MPEG_VIDEO_H264_8X8_TRANSFORM, + HFI_PROP_8X8_TRANSFORM, + CAP_FLAG_OUTPUT_PORT}, + + {CHROMA_QP_INDEX_OFFSET, ENC, HEVC, + MIN_CHROMA_QP_OFFSET, MAX_CHROMA_QP_OFFSET, + 1, MAX_CHROMA_QP_OFFSET, + V4L2_CID_MPEG_VIDEO_H264_CHROMA_QP_INDEX_OFFSET, + HFI_PROP_CHROMA_QP_OFFSET, + CAP_FLAG_OUTPUT_PORT}, + + {DISPLAY_DELAY_ENABLE, DEC, H264 | HEVC | VP9, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY_ENABLE, + HFI_PROP_DECODE_ORDER_OUTPUT, + CAP_FLAG_INPUT_PORT}, + + {DISPLAY_DELAY, DEC, H264 | HEVC | VP9, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY, + HFI_PROP_DECODE_ORDER_OUTPUT, + CAP_FLAG_INPUT_PORT}, + + {OUTPUT_ORDER, DEC, H264 | HEVC | VP9, + 0, 1, 1, 0, + 0, + HFI_PROP_DECODE_ORDER_OUTPUT, + CAP_FLAG_INPUT_PORT}, + + {INPUT_BUF_HOST_MAX_COUNT, ENC | DEC, CODECS_ALL, + DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT, + 1, DEFAULT_MAX_HOST_BUF_COUNT, + 0, + HFI_PROP_BUFFER_HOST_MAX_COUNT, + CAP_FLAG_INPUT_PORT}, + + {OUTPUT_BUF_HOST_MAX_COUNT, ENC | DEC, CODECS_ALL, + DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT, + 1, DEFAULT_MAX_HOST_BUF_COUNT, + 0, + HFI_PROP_BUFFER_HOST_MAX_COUNT, + CAP_FLAG_OUTPUT_PORT}, + + {CONCEAL_COLOR_8BIT, DEC, CODECS_ALL, 0x0, 0xff3fcff, 1, + DEFAULT_VIDEO_CONCEAL_COLOR_BLACK, + V4L2_CID_MPEG_VIDEO_MUTE_YUV, + HFI_PROP_CONCEAL_COLOR_8BIT, + CAP_FLAG_INPUT_PORT}, + + {CONCEAL_COLOR_10BIT, DEC, CODECS_ALL, 0x0, 0x3fffffff, 1, + DEFAULT_VIDEO_CONCEAL_COLOR_BLACK, + V4L2_CID_MPEG_VIDEO_MUTE_YUV, + HFI_PROP_CONCEAL_COLOR_10BIT, + CAP_FLAG_INPUT_PORT}, + + {STAGE, DEC | ENC, CODECS_ALL, + MSM_VIDC_STAGE_1, + MSM_VIDC_STAGE_2, 1, + MSM_VIDC_STAGE_2, + 0, + HFI_PROP_STAGE}, + + {PIPE, DEC | ENC, CODECS_ALL, + MSM_VIDC_PIPE_1, + MSM_VIDC_PIPE_2, 1, + MSM_VIDC_PIPE_2, + 0, + HFI_PROP_PIPE}, + + {POC, DEC, H264, + 0, 2, 1, 1, + 0, + HFI_PROP_PIC_ORDER_CNT_TYPE, + CAP_FLAG_VOLATILE}, + + /* + * value of MAX_NUM_REORDER_FRAMES is 32 packed as mentioned below + * (max_num_reorder_count << 16) | max_dec_frame_buffering_count + */ + {MAX_NUM_REORDER_FRAMES, DEC, H264 | HEVC, + 0, INT_MAX, 1, 0, + V4L2_CID_MPEG_VIDC_MAX_NUM_REORDER_FRAMES, + HFI_PROP_MAX_NUM_REORDER_FRAMES, + CAP_FLAG_VOLATILE}, + + {QUALITY_MODE, ENC, CODECS_ALL, + MSM_VIDC_MAX_QUALITY_MODE, + MSM_VIDC_POWER_SAVE_MODE, 1, + MSM_VIDC_POWER_SAVE_MODE}, + + {CODED_FRAMES, DEC, H264 | HEVC | HEIC, + CODED_FRAMES_PROGRESSIVE, CODED_FRAMES_INTERLACE, + 1, CODED_FRAMES_PROGRESSIVE, + V4L2_CID_MPEG_VIDC_INTERLACE, + HFI_PROP_CODED_FRAMES, + CAP_FLAG_VOLATILE}, + + {BIT_DEPTH, DEC, CODECS_ALL, BIT_DEPTH_8, BIT_DEPTH_10, 1, BIT_DEPTH_8, + 0, + HFI_PROP_LUMA_CHROMA_BIT_DEPTH}, + + {CODEC_CONFIG, DEC, H264 | HEVC | HEIC, 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_CODEC_CONFIG, 0, + CAP_FLAG_DYNAMIC_ALLOWED}, + + {BITSTREAM_SIZE_OVERWRITE, DEC, CODECS_ALL, 0, INT_MAX, 1, 0, + V4L2_CID_MPEG_VIDC_MIN_BITSTREAM_SIZE_OVERWRITE}, + + {THUMBNAIL_MODE, DEC, CODECS_ALL, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_THUMBNAIL_MODE, + HFI_PROP_THUMBNAIL_MODE, + CAP_FLAG_INPUT_PORT}, + + {DEFAULT_HEADER, DEC, CODECS_ALL, + 0, 1, 1, 0, + 0, + HFI_PROP_DEC_DEFAULT_HEADER}, + + {RAP_FRAME, DEC, CODECS_ALL, + 0, 1, 1, 1, + 0, + HFI_PROP_DEC_START_FROM_RAP_FRAME, + CAP_FLAG_INPUT_PORT}, + + {SEQ_CHANGE_AT_SYNC_FRAME, DEC, CODECS_ALL, + 0, 1, 1, 1, + 0, + HFI_PROP_SEQ_CHANGE_AT_SYNC_FRAME, + CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, + + {PRIORITY, DEC | ENC, CODECS_ALL, + 0, 4, 1, 4, + V4L2_CID_MPEG_VIDC_PRIORITY, + HFI_PROP_SESSION_PRIORITY, + CAP_FLAG_DYNAMIC_ALLOWED}, + + {ENC_IP_CR, ENC, CODECS_ALL, + 0, S32_MAX, 1, 0, + V4L2_CID_MPEG_VIDC_ENC_INPUT_COMPRESSION_RATIO, + 0, CAP_FLAG_DYNAMIC_ALLOWED}, + {LAST_FLAG_EVENT_ENABLE, DEC | ENC, CODECS_ALL, + 0, 1, 1, 0, + V4L2_CID_MPEG_VIDC_LAST_FLAG_EVENT_ENABLE}, + {ALL_INTRA, ENC, H264 | HEVC, + 0, 1, 1, 0, + 0, + 0, + CAP_FLAG_OUTPUT_PORT}, + + {META_LTR_MARK_USE, ENC, H264 | HEVC, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_LTR_MARK_USE_DETAILS, + HFI_PROP_LTR_MARK_USE_DETAILS, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_SEQ_HDR_NAL, ENC, CODECS_ALL, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_SEQ_HEADER_NAL, + HFI_PROP_METADATA_SEQ_HEADER_NAL, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_DPB_MISR, DEC, CODECS_ALL, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_DPB_LUMA_CHROMA_MISR, + HFI_PROP_DPB_LUMA_CHROMA_MISR, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_OPB_MISR, DEC, CODECS_ALL, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_OPB_LUMA_CHROMA_MISR, + HFI_PROP_OPB_LUMA_CHROMA_MISR, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_INTERLACE, DEC, H264, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_INTERLACE, + HFI_PROP_INTERLACE_INFO, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_TIMESTAMP, DEC | ENC, CODECS_ALL, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_TIMESTAMP, + HFI_PROP_TIMESTAMP, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_CONCEALED_MB_CNT, DEC, CODECS_ALL, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_CONCEALED_MB_COUNT, + HFI_PROP_CONEALED_MB_COUNT, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_HIST_INFO, DEC, HEVC | VP9, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_HISTOGRAM_INFO, + HFI_PROP_HISTOGRAM_INFO, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_TRANSCODING_STAT_INFO, DEC, HEVC | H264, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_TRANSCODE_STAT_INFO, + HFI_PROP_TRANSCODING_STAT_INFO, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_TRANSCODING_STAT_INFO, ENC, HEVC | H264, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_DYN_ENABLE | MSM_VIDC_META_TX_INPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_TRANSCODE_STAT_INFO, + HFI_PROP_TRANSCODING_STAT_INFO, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_PICTURE_TYPE, DEC, CODECS_ALL, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_INPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_PICTURE_TYPE, + HFI_PROP_PICTURE_TYPE, + CAP_FLAG_BITMASK | CAP_FLAG_META | CAP_FLAG_DYNAMIC_ALLOWED}, + + {META_SEI_MASTERING_DISP, ENC, HEVC | HEIC, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | + MSM_VIDC_META_DYN_ENABLE | MSM_VIDC_META_TX_INPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_SEI_MASTERING_DISPLAY_COLOUR, + HFI_PROP_SEI_MASTERING_DISPLAY_COLOUR, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_SEI_MASTERING_DISP, DEC, HEVC | HEIC, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_INPUT | + MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_SEI_MASTERING_DISPLAY_COLOUR, + HFI_PROP_SEI_MASTERING_DISPLAY_COLOUR, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_SEI_CLL, ENC, HEVC | HEIC, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | + MSM_VIDC_META_DYN_ENABLE | MSM_VIDC_META_TX_INPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_SEI_CONTENT_LIGHT_LEVEL, + HFI_PROP_SEI_CONTENT_LIGHT_LEVEL, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_SEI_CLL, DEC, HEVC | HEIC, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_INPUT | + MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_SEI_CONTENT_LIGHT_LEVEL, + HFI_PROP_SEI_CONTENT_LIGHT_LEVEL, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_HDR10PLUS, ENC, HEVC | HEIC, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | + MSM_VIDC_META_DYN_ENABLE | MSM_VIDC_META_TX_INPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_HDR10PLUS, + HFI_PROP_SEI_HDR10PLUS_USERDATA, + CAP_FLAG_BITMASK | CAP_FLAG_META}, + + {META_HDR10PLUS, DEC, HEVC | HEIC, + MSM_VIDC_META_DISABLE, + MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_INPUT | + MSM_VIDC_META_RX_OUTPUT, + 0, MSM_VIDC_META_DISABLE, + V4L2_CID_MPEG_VIDC_METADATA_HDR10PLUS, + HFI_PROP_SEI_HDR10PLUS_USERDATA, CAP_FLAG_BITMASK | CAP_FLAG_META}, {META_EVA_STATS, ENC, H264 | HEVC, @@ -2264,7 +3744,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_volc NULL, msm_vidc_set_stage}, - {PIPE, DEC|ENC, CODECS_ALL, + {PIPE, DEC | ENC, CODECS_ALL, {0}, NULL, msm_vidc_set_pipe}, @@ -2284,7 +3764,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_volc NULL, msm_vidc_set_u32}, - {PRIORITY, DEC|ENC, CODECS_ALL, + {PRIORITY, DEC | ENC, CODECS_ALL, {0}, msm_vidc_adjust_session_priority, msm_vidc_set_session_priority}, @@ -2334,7 +3814,546 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_volc msm_vidc_adjust_hdr10plus, NULL}, - {META_TRANSCODING_STAT_INFO, ENC, HEVC|H264, + {META_TRANSCODING_STAT_INFO, ENC, HEVC | H264, + {0}, + msm_vidc_adjust_transcoding_stats, + NULL}, +}; + +static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_volcano_v1[] = { + /* {cap, domain, codec, + * parents, + * children, + * adjust, set} + */ + + {PIX_FMTS, ENC, H264, + {META_ROI_INFO, IR_PERIOD, CSC}}, + + {PIX_FMTS, ENC, HEVC, + {PROFILE, MIN_FRAME_QP, MAX_FRAME_QP, I_FRAME_QP, P_FRAME_QP, + B_FRAME_QP, META_ROI_INFO, MIN_QUALITY, BLUR_TYPES, IR_PERIOD, + LTR_COUNT, CSC}}, + + {PIX_FMTS, ENC, HEIC, + {PROFILE, CSC}}, + + {PIX_FMTS, DEC, HEVC | HEIC, + {PROFILE}}, + + {FRAME_RATE, ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_q16}, + + {FRAME_RATE, DEC, CODECS_ALL, + {0}, + msm_vidc_adjust_dec_frame_rate}, + + {OPERATING_RATE, DEC, CODECS_ALL, + {0}, + msm_vidc_adjust_dec_operating_rate}, + + {ENC_RING_BUFFER_COUNT, ENC, CODECS_ALL, + {0}, + NULL, + NULL}, + + {SECURE_MODE, ENC | DEC, H264 | HEVC | VP9, + {0}, + NULL, + msm_vidc_set_u32}, + + {META_OUTBUF_FENCE, DEC, H264 | HEVC | VP9, + {LOWLATENCY_MODE}, + NULL, + NULL}, + + {HFLIP, ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_flip}, + + {VFLIP, ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_flip}, + + {ROTATION, ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_rotation}, + + {SUPER_FRAME, ENC, H264 | HEVC, + {INPUT_BUF_HOST_MAX_COUNT, OUTPUT_BUF_HOST_MAX_COUNT}, + NULL, + NULL}, + + {SLICE_DECODE, DEC, H264 | HEVC, + {0}, + NULL, + NULL}, + + {HEADER_MODE, ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_header_mode}, + + {WITHOUT_STARTCODE, ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_nal_length}, + + {REQUEST_I_FRAME, ENC, H264 | HEVC, + {0}, + NULL, + msm_vidc_set_req_sync_frame}, + + {BIT_RATE, ENC, H264, + {PEAK_BITRATE, BITRATE_BOOST, L0_BR}, + msm_vidc_adjust_bitrate, + msm_vidc_set_bitrate}, + + {BIT_RATE, ENC, HEVC, + {PEAK_BITRATE, BITRATE_BOOST, L0_BR}, + msm_vidc_adjust_bitrate, + msm_vidc_set_bitrate}, + + {BITRATE_MODE, ENC, H264, + {LTR_COUNT, IR_PERIOD, TIME_DELTA_BASED_RC, I_FRAME_QP, + P_FRAME_QP, B_FRAME_QP, ENH_LAYER_COUNT, BIT_RATE, + META_ROI_INFO, MIN_QUALITY, BITRATE_BOOST, VBV_DELAY, + PEAK_BITRATE, SLICE_MODE, CONTENT_ADAPTIVE_CODING, + BLUR_TYPES, LOWLATENCY_MODE, META_TRANSCODING_STAT_INFO}, + msm_vidc_adjust_bitrate_mode, + msm_vidc_set_u32_enum}, + + {BITRATE_MODE, ENC, HEVC, + {LTR_COUNT, IR_PERIOD, TIME_DELTA_BASED_RC, I_FRAME_QP, + P_FRAME_QP, B_FRAME_QP, CONSTANT_QUALITY, ENH_LAYER_COUNT, + BIT_RATE, META_ROI_INFO, MIN_QUALITY, BITRATE_BOOST, VBV_DELAY, + PEAK_BITRATE, SLICE_MODE, CONTENT_ADAPTIVE_CODING, + BLUR_TYPES, LOWLATENCY_MODE, META_EVA_STATS, META_TRANSCODING_STAT_INFO}, + msm_vidc_adjust_bitrate_mode, + msm_vidc_set_u32_enum}, + + {BITRATE_MODE, ENC, HEIC, + {TIME_DELTA_BASED_RC, CONSTANT_QUALITY}, + msm_vidc_adjust_bitrate_mode, + msm_vidc_set_u32_enum}, + + {CONSTANT_QUALITY, ENC, HEVC | HEIC, + {0}, + NULL, + msm_vidc_set_constant_quality}, + + {GOP_SIZE, ENC, CODECS_ALL, + {ALL_INTRA}, + msm_vidc_adjust_gop_size, + msm_vidc_set_gop_size}, + + {GOP_SIZE, ENC, HEIC, + {0}, + NULL, + msm_vidc_set_u32}, + + {B_FRAME, ENC, H264 | HEVC, + {ALL_INTRA}, + msm_vidc_adjust_b_frame, + msm_vidc_set_u32}, + + {B_FRAME, ENC, HEIC, + {0}, + NULL, + msm_vidc_set_u32}, + + {BLUR_TYPES, ENC, H264 | HEVC, + {BLUR_RESOLUTION}, + msm_vidc_adjust_blur_type, + msm_vidc_set_u32_enum}, + + {BLUR_RESOLUTION, ENC, H264 | HEVC, + {0}, + msm_vidc_adjust_blur_resolution, + msm_vidc_set_blur_resolution}, + + {CSC, ENC, CODECS_ALL, + {0}, + msm_vidc_adjust_csc, + msm_vidc_set_u32}, + + {CSC_CUSTOM_MATRIX, ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_csc_custom_matrix}, + + {LOWLATENCY_MODE, ENC, H264 | HEVC, + {STAGE, BIT_RATE}, + msm_vidc_adjust_enc_lowlatency_mode, + NULL}, + + {LOWLATENCY_MODE, DEC, H264 | HEVC | VP9, + {STAGE}, + msm_vidc_adjust_dec_lowlatency_mode, + NULL}, + + {LTR_COUNT, ENC, H264 | HEVC, + {0}, + msm_vidc_adjust_ltr_count, + msm_vidc_set_u32}, + + {USE_LTR, ENC, H264 | HEVC, + {0}, + msm_vidc_adjust_use_ltr, + msm_vidc_set_use_and_mark_ltr}, + + {MARK_LTR, ENC, H264 | HEVC, + {0}, + msm_vidc_adjust_mark_ltr, + msm_vidc_set_use_and_mark_ltr}, + + {IR_PERIOD, ENC, H264 | HEVC, + {0}, + msm_vidc_adjust_ir_period, + msm_vidc_set_ir_period}, + + {AU_DELIMITER, ENC, H264 | HEVC, + {0}, + NULL, + msm_vidc_set_u32}, + + {BASELAYER_PRIORITY, ENC, H264, + {0}, + NULL, + msm_vidc_set_u32}, + + {TIME_DELTA_BASED_RC, ENC, CODECS_ALL, + {0}, + msm_vidc_adjust_delta_based_rc, + msm_vidc_set_u32}, + + {CONTENT_ADAPTIVE_CODING, ENC, H264 | HEVC, + {REQUEST_PREPROCESS}, + msm_vidc_adjust_brs, + msm_vidc_set_vbr_related_properties}, + + {REQUEST_PREPROCESS, ENC, H264 | HEVC, + {0}, + msm_vidc_adjust_preprocess, + msm_vidc_set_preprocess}, + + {BITRATE_BOOST, ENC, H264 | HEVC, + {0}, + msm_vidc_adjust_bitrate_boost, + msm_vidc_set_vbr_related_properties}, + + {MIN_QUALITY, ENC, H264 | HEVC, + {BLUR_TYPES, BITRATE_BOOST}, + msm_vidc_adjust_min_quality, + msm_vidc_set_u32}, + + {VBV_DELAY, ENC, H264 | HEVC, + {0}, + NULL, + msm_vidc_set_cbr_related_properties}, + + {PEAK_BITRATE, ENC, H264 | HEVC, + {0}, + msm_vidc_adjust_peak_bitrate, + msm_vidc_set_cbr_related_properties}, + + {MIN_FRAME_QP, ENC, H264, + {0}, + NULL, + msm_vidc_set_min_qp}, + + {MIN_FRAME_QP, ENC, HEVC, + {0}, + msm_vidc_adjust_hevc_min_qp, + msm_vidc_set_min_qp}, + + {MAX_FRAME_QP, ENC, H264, + {0}, + NULL, + msm_vidc_set_max_qp}, + + {MAX_FRAME_QP, ENC, HEVC, + {0}, + msm_vidc_adjust_hevc_max_qp, + msm_vidc_set_max_qp}, + + {I_FRAME_QP, ENC, HEVC, + {0}, + msm_vidc_adjust_hevc_i_frame_qp, + msm_vidc_set_frame_qp}, + + {I_FRAME_QP, ENC, H264, + {0}, + NULL, + msm_vidc_set_frame_qp}, + + {P_FRAME_QP, ENC, HEVC, + {0}, + msm_vidc_adjust_hevc_p_frame_qp, + msm_vidc_set_frame_qp}, + + {P_FRAME_QP, ENC, H264, + {0}, + NULL, + msm_vidc_set_frame_qp}, + + {B_FRAME_QP, ENC, HEVC, + {0}, + msm_vidc_adjust_hevc_b_frame_qp, + msm_vidc_set_frame_qp}, + + {B_FRAME_QP, ENC, H264, + {0}, + NULL, + msm_vidc_set_frame_qp}, + + {LAYER_TYPE, ENC, H264 | HEVC, + {CONTENT_ADAPTIVE_CODING, LTR_COUNT}}, + + {LAYER_ENABLE, ENC, H264 | HEVC, + {CONTENT_ADAPTIVE_CODING}}, + + {ENH_LAYER_COUNT, ENC, H264 | HEVC, + {GOP_SIZE, B_FRAME, BIT_RATE, MIN_QUALITY, SLICE_MODE, LTR_COUNT}, + msm_vidc_adjust_layer_count, + msm_vidc_set_layer_count_and_type}, + + {L0_BR, ENC, H264 | HEVC, + {L1_BR}, + msm_vidc_adjust_layer_bitrate, + msm_vidc_set_layer_bitrate}, + + {L1_BR, ENC, H264 | HEVC, + {L2_BR}, + msm_vidc_adjust_layer_bitrate, + msm_vidc_set_layer_bitrate}, + + {L2_BR, ENC, H264 | HEVC, + {L3_BR}, + msm_vidc_adjust_layer_bitrate, + msm_vidc_set_layer_bitrate}, + + {L3_BR, ENC, H264 | HEVC, + {L4_BR}, + msm_vidc_adjust_layer_bitrate, + msm_vidc_set_layer_bitrate}, + + {L4_BR, ENC, H264 | HEVC, + {L5_BR}, + msm_vidc_adjust_layer_bitrate, + msm_vidc_set_layer_bitrate}, + + {L5_BR, ENC, H264 | HEVC, + {0}, + msm_vidc_adjust_layer_bitrate, + msm_vidc_set_layer_bitrate}, + + {ENTROPY_MODE, ENC, H264, + {BIT_RATE}, + msm_vidc_adjust_entropy_mode, + msm_vidc_set_u32}, + + {PROFILE, ENC, H264, + {ENTROPY_MODE, TRANSFORM_8X8}, + NULL, + msm_vidc_set_u32_enum}, + + {PROFILE, DEC, H264, + {ENTROPY_MODE}, + NULL, + msm_vidc_set_u32_enum}, + + {PROFILE, ENC, HEVC | HEIC, + {META_SEI_MASTERING_DISP, META_SEI_CLL, META_HDR10PLUS}, + msm_vidc_adjust_profile, + msm_vidc_set_u32_enum}, + + {PROFILE, DEC, HEVC | HEIC, + {0}, + msm_vidc_adjust_profile, + msm_vidc_set_u32_enum}, + + {PROFILE, DEC, VP9, + {0}, + NULL, + msm_vidc_set_u32_enum}, + + {LEVEL, DEC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_u32_enum}, + + {LEVEL, ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_level}, + + {HEVC_TIER, ENC | DEC, HEVC | HEIC, + {0}, + NULL, + msm_vidc_set_u32_enum}, + + {LF_MODE, ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_deblock_mode}, + + {SLICE_MODE, ENC, H264 | HEVC, + {STAGE}, + msm_vidc_adjust_slice_count, + msm_vidc_set_slice_count}, + + {SLICE_MODE, ENC, HEIC, + {0}, + msm_vidc_adjust_slice_count, + msm_vidc_set_slice_count}, + + {TRANSFORM_8X8, ENC, H264, + {0}, + msm_vidc_adjust_transform_8x8, + msm_vidc_set_u32}, + + {CHROMA_QP_INDEX_OFFSET, ENC, HEVC, + {0}, + msm_vidc_adjust_chroma_qp_index_offset, + msm_vidc_set_chroma_qp_index_offset}, + + {DISPLAY_DELAY_ENABLE, DEC, H264 | HEVC | VP9, + {OUTPUT_ORDER}, + NULL, + NULL}, + + {DISPLAY_DELAY, DEC, H264 | HEVC | VP9, + {OUTPUT_ORDER}, + NULL, + NULL}, + + {OUTPUT_ORDER, DEC, H264 | HEVC | VP9, + {0}, + msm_vidc_adjust_output_order, + msm_vidc_set_u32}, + + {INPUT_BUF_HOST_MAX_COUNT, ENC | DEC, CODECS_ALL, + {0}, + msm_vidc_adjust_input_buf_host_max_count, + msm_vidc_set_u32}, + + {INPUT_BUF_HOST_MAX_COUNT, ENC, H264 | HEVC, + {0}, + msm_vidc_adjust_input_buf_host_max_count, + msm_vidc_set_u32}, + + {OUTPUT_BUF_HOST_MAX_COUNT, ENC | DEC, CODECS_ALL, + {0}, + msm_vidc_adjust_output_buf_host_max_count, + msm_vidc_set_u32}, + + {OUTPUT_BUF_HOST_MAX_COUNT, ENC, H264 | HEVC, + {0}, + msm_vidc_adjust_output_buf_host_max_count, + msm_vidc_set_u32}, + + {CONCEAL_COLOR_8BIT, DEC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_u32_packed}, + + {CONCEAL_COLOR_10BIT, DEC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_u32_packed}, + + {STAGE, ENC | DEC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_stage}, + + {STAGE, ENC, H264 | HEVC, + {0}, + NULL, + msm_vidc_set_stage}, + + {STAGE, DEC, H264 | HEVC | VP9, + {0}, + NULL, + msm_vidc_set_stage}, + + {PIPE, DEC|ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_pipe}, + + {THUMBNAIL_MODE, DEC, H264 | HEVC | VP9, + {OUTPUT_ORDER}, + NULL, + msm_vidc_set_u32}, + + {THUMBNAIL_MODE, DEC, HEIC, + {0}, + NULL, + msm_vidc_set_u32}, + + {RAP_FRAME, DEC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_u32}, + + {PRIORITY, DEC | ENC, CODECS_ALL, + {0}, + msm_vidc_adjust_session_priority, + msm_vidc_set_session_priority}, + + {ALL_INTRA, ENC, H264 | HEVC, + {LTR_COUNT, IR_PERIOD, SLICE_MODE, BIT_RATE}, + msm_vidc_adjust_all_intra, + NULL}, + + {META_EVA_STATS, ENC, HEVC, + {0}, + msm_vidc_adjust_eva_stats, + NULL}, + + {META_ROI_INFO, ENC, H264 | HEVC, + {MIN_QUALITY, IR_PERIOD, BLUR_TYPES}, + msm_vidc_adjust_roi_info, + NULL}, + + {GRID_ENABLE, ENC, HEIC, + {0}, + NULL, + msm_vidc_set_u32}, + + {VUI_TIMING_INFO, ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_vui_timing_info}, + + {SIGNAL_COLOR_INFO, ENC, CODECS_ALL, + {0}, + NULL, + msm_vidc_set_signal_color_info}, + + {META_SEI_MASTERING_DISP, ENC, HEVC | HEIC, + {0}, + msm_vidc_adjust_sei_mastering_disp, + NULL}, + + {META_SEI_CLL, ENC, HEVC | HEIC, + {0}, + msm_vidc_adjust_sei_cll, + NULL}, + + {META_HDR10PLUS, ENC, HEVC | HEIC, + {0}, + msm_vidc_adjust_hdr10plus, + NULL}, + + {META_TRANSCODING_STAT_INFO, ENC, HEVC | H264, {0}, msm_vidc_adjust_transcoding_stats, NULL}, @@ -2403,6 +4422,10 @@ static struct freq_table volcano_freq_table_sku0[] = { {444000000}, {366000000}, {338000000}, {240000000} }; +static struct freq_table volcano_freq_table_sku1[] = { + {201600000} +}; + /* register, value, mask */ static const struct reg_preset_table volcano_reg_preset_table[] = { { 0xB0088, 0x0, 0x11 }, @@ -2543,6 +4566,67 @@ static const struct msm_vidc_platform_data volcano_data_v0 = { .sku_version = SKU_VERSION_0, }; +static const struct msm_vidc_platform_data volcano_data_v1 = { + /* resources dependent on other module */ + .bw_tbl = volcano_bw_table, + .bw_tbl_size = ARRAY_SIZE(volcano_bw_table), + .regulator_tbl = volcano_regulator_table, + .regulator_tbl_size = ARRAY_SIZE(volcano_regulator_table), + .clk_tbl = volcano_clk_table, + .clk_tbl_size = ARRAY_SIZE(volcano_clk_table), + .clk_rst_tbl = volcano_clk_reset_table, + .clk_rst_tbl_size = ARRAY_SIZE(volcano_clk_reset_table), + + /* populate context bank */ + .context_bank_tbl = volcano_context_bank_table, + .context_bank_tbl_size = ARRAY_SIZE(volcano_context_bank_table), + + /* platform specific resources */ + .freq_tbl = volcano_freq_table_sku1, + .freq_tbl_size = ARRAY_SIZE(volcano_freq_table_sku1), + .reg_prst_tbl = volcano_reg_preset_table, + .reg_prst_tbl_size = ARRAY_SIZE(volcano_reg_preset_table), + .fwname = "vpu20_4v", + .pas_id = 9, + .supports_mmrm = 0, + .vpu_ver = VPU_VERSION_IRIS2_2P, + + /* caps related resorces */ + .core_data = core_data_volcano_v1, + .core_data_size = ARRAY_SIZE(core_data_volcano_v1), + .inst_cap_data = instance_cap_data_volcano_v1, + .inst_cap_data_size = ARRAY_SIZE(instance_cap_data_volcano_v1), + .inst_cap_dependency_data = instance_cap_dependency_data_volcano_v1, + .inst_cap_dependency_data_size = ARRAY_SIZE(instance_cap_dependency_data_volcano_v1), + .csc_data.vpe_csc_custom_bias_coeff = vpe_csc_custom_bias_coeff, + .csc_data.vpe_csc_custom_matrix_coeff = vpe_csc_custom_matrix_coeff, + .csc_data.vpe_csc_custom_limit_coeff = vpe_csc_custom_limit_coeff, + .ubwc_config = ubwc_config_volcano, + .format_data = &format_data_volcano, + + /* decoder properties related*/ + .psc_avc_tbl = volcano_vdec_psc_avc, + .psc_avc_tbl_size = ARRAY_SIZE(volcano_vdec_psc_avc), + .psc_hevc_tbl = volcano_vdec_psc_hevc, + .psc_hevc_tbl_size = ARRAY_SIZE(volcano_vdec_psc_hevc), + .psc_vp9_tbl = volcano_vdec_psc_vp9, + .psc_vp9_tbl_size = ARRAY_SIZE(volcano_vdec_psc_vp9), + .dec_input_prop_avc = volcano_vdec_input_properties_avc, + .dec_input_prop_hevc = volcano_vdec_input_properties_hevc, + .dec_input_prop_vp9 = volcano_vdec_input_properties_vp9, + .dec_input_prop_size_avc = ARRAY_SIZE(volcano_vdec_input_properties_avc), + .dec_input_prop_size_hevc = ARRAY_SIZE(volcano_vdec_input_properties_hevc), + .dec_input_prop_size_vp9 = ARRAY_SIZE(volcano_vdec_input_properties_vp9), + .dec_output_prop_avc = volcano_vdec_output_properties_avc, + .dec_output_prop_hevc = volcano_vdec_output_properties_hevc, + .dec_output_prop_vp9 = volcano_vdec_output_properties_vp9, + .dec_output_prop_size_avc = ARRAY_SIZE(volcano_vdec_output_properties_avc), + .dec_output_prop_size_hevc = ARRAY_SIZE(volcano_vdec_output_properties_hevc), + .dec_output_prop_size_vp9 = ARRAY_SIZE(volcano_vdec_output_properties_vp9), + + .sku_version = SKU_VERSION_1, +}; + int msm_vidc_volcano_check_ddr_type(struct msm_vidc_platform_data *platform_data, u32 hbb_override_val) { @@ -2586,10 +4670,10 @@ static int msm_vidc_init_data(struct msm_vidc_core *core) d_vpr_e("%s: Failed to read efuse\n", __func__); return rc; } -/* + if (core->platform->data.sku_version == SKU_VERSION_1) core->platform->data = volcano_data_v1; -*/ + core->mem_ops = get_mem_ops_ext(); if (!core->mem_ops) { From 98619ca0bd262255dd6e433333830b11fccae9d9 Mon Sep 17 00:00:00 2001 From: Manikanta Kanamarlapudi Date: Tue, 19 Mar 2024 19:34:09 +0530 Subject: [PATCH 1035/1061] video-driver: update fuse register for Volcano IRIS_MULTIPIPE_DISABLE fuse will decide the sku version, update the same for Volcano. Change-Id: Icc0103b83ccd2222783549a1fa3d56373e4ca343 Signed-off-by: Manikanta Kanamarlapudi --- driver/platform/volcano/src/msm_vidc_volcano.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/driver/platform/volcano/src/msm_vidc_volcano.c b/driver/platform/volcano/src/msm_vidc_volcano.c index 5de8d56dd7..68647750cc 100644 --- a/driver/platform/volcano/src/msm_vidc_volcano.c +++ b/driver/platform/volcano/src/msm_vidc_volcano.c @@ -4364,6 +4364,11 @@ static struct msm_vidc_ubwc_config_data ubwc_config_volcano[] = { UBWC_CONFIG(8, 32, 15, 0, 1, 1, 1), }; +static struct msm_vidc_efuse_data efuse_data_volcano[] = { + /* IRIS_MULTIPIPE_DISABLE - max 4K@30 */ + EFUSE_ENTRY(0x221C8118, 4, 0x400, 0xA, SKU_VERSION), +}; + static struct msm_vidc_format_capability format_data_volcano = { .codec_info = codec_data_volcano, .codec_info_size = ARRAY_SIZE(codec_data_volcano), @@ -4563,6 +4568,9 @@ static const struct msm_vidc_platform_data volcano_data_v0 = { .dec_output_prop_size_hevc = ARRAY_SIZE(volcano_vdec_output_properties_hevc), .dec_output_prop_size_vp9 = ARRAY_SIZE(volcano_vdec_output_properties_vp9), + /* Fuse specific resources */ + .efuse_data = efuse_data_volcano, + .efuse_data_size = ARRAY_SIZE(efuse_data_volcano), .sku_version = SKU_VERSION_0, }; @@ -4624,6 +4632,9 @@ static const struct msm_vidc_platform_data volcano_data_v1 = { .dec_output_prop_size_hevc = ARRAY_SIZE(volcano_vdec_output_properties_hevc), .dec_output_prop_size_vp9 = ARRAY_SIZE(volcano_vdec_output_properties_vp9), + /* Fuse specific resources */ + .efuse_data = efuse_data_volcano, + .efuse_data_size = ARRAY_SIZE(efuse_data_volcano), .sku_version = SKU_VERSION_1, }; From f7b9dd68071ec658202bbd7af7c01542b4f2ae6f Mon Sep 17 00:00:00 2001 From: Manikanta Kanamarlapudi Date: Fri, 1 Mar 2024 10:16:19 +0530 Subject: [PATCH 1036/1061] video-driver: Made changes in error recovery sequence - Add ARES for Core clock. - After controller power down, re-initiate controller/core power on sequence and wait for QACCEPT and then power down the video subsystem. Change-Id: Icec985f33dc6e05adf71bfa40901120ceffea655 Signed-off-by: Manikanta Kanamarlapudi --- .../pineapple/src/msm_vidc_pineapple.c | 6 +- driver/variant/iris33/src/msm_vidc_iris33.c | 237 ++++++++++++++++-- driver/vidc/src/venus_hfi_response.c | 7 +- 3 files changed, 228 insertions(+), 22 deletions(-) diff --git a/driver/platform/pineapple/src/msm_vidc_pineapple.c b/driver/platform/pineapple/src/msm_vidc_pineapple.c index 0647327986..e7024e08f8 100644 --- a/driver/platform/pineapple/src/msm_vidc_pineapple.c +++ b/driver/platform/pineapple/src/msm_vidc_pineapple.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2020-2022, The Linux Foundation. All rights reserved. - * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved. */ #include @@ -2716,6 +2716,7 @@ static const struct clk_rst_table pineapple_clk_reset_table[] = { { "video_axi_reset", 0 }, { "video_xo_reset", 1 }, { "video_mvs0c_reset", 0 }, + { "video_mvs0_reset", 0 }, }; /* name, llcc_id */ @@ -2881,6 +2882,9 @@ static const u32 pineapple_vdec_output_properties_av1[] = { static const u32 pineapple_msm_vidc_ssr_type[] = { HFI_SSR_TYPE_SW_ERR_FATAL, + HFI_SSR_TYPE_SW_DIV_BY_ZERO, + HFI_SSR_TYPE_CPU_WDOG_IRQ, + HFI_SSR_TYPE_NOC_ERROR, }; static const struct msm_vidc_platform_data pineapple_data = { diff --git a/driver/variant/iris33/src/msm_vidc_iris33.c b/driver/variant/iris33/src/msm_vidc_iris33.c index 5814f439ce..a66061f859 100644 --- a/driver/variant/iris33/src/msm_vidc_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_iris33.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2020-2022, The Linux Foundation. All rights reserved. - * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved. */ #include @@ -134,6 +134,10 @@ typedef enum { #define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG3_LOW_IRIS33 (NOC_BASE_OFFS + 0xA038) #define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG3_HIGH_IRIS33 (NOC_BASE_OFFS + 0xA03C) #define NOC_SIDEBANDMANAGER_MAIN_SIDEBANDMANAGER_FAULTINEN0_LOW_IRIS33 (NOC_BASE_OFFS + 0x7040) +#define VCODEC_NOC_SidebandManager_main_SidebandManager_SenseIn0_Low (NOC_BASE_OFFS + 0x7100) +#define VCODEC_NOC_SIDEBANDMANAGER_MAIN_SIDEBANDMANAGER_SENSEIN0_HIGH (NOC_BASE_OFFS + 0x7104) +#define VCODEC_NOC_SIDEBANDMANAGER_MAIN_SIDEBANDMANAGER_SENSEIN1_HIGH (NOC_BASE_OFFS + 0x710C) +#define VCODEC_NOC_SIDEBANDMANAGER_MAIN_SIDEBANDMANAGER_SENSEIN2_LOW (NOC_BASE_OFFS + 0x7110) #define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_MAINCTL_LOW_IRIS33_2P (NOC_BASE_OFFS + 0x3508) #define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRCLR_LOW_IRIS33_2P (NOC_BASE_OFFS + 0x3518) @@ -147,6 +151,8 @@ typedef enum { #define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG3_HIGH_IRIS33_2P (NOC_BASE_OFFS + 0x353C) #define NOC_SIDEBANDMANAGER_MAIN_SIDEBANDMANAGER_FAULTINEN0_LOW_IRIS33_2P (NOC_BASE_OFFS + 0x3240) +#define VCODEC_DMA_SPARE_3 0x87B8 + static int __interrupt_init_iris33(struct msm_vidc_core *core) { u32 mask_val = 0; @@ -282,8 +288,9 @@ static bool is_iris33_hw_power_collapsed(struct msm_vidc_core *core) static int __power_off_iris33_hardware(struct msm_vidc_core *core) { int rc = 0, i; - u32 value = 0; + u32 value = 0, count = 0; bool pwr_collapsed = false; + u32 sense0_low, sense0_high, sense1_high, sense2_low; /* * Incase hw power control is enabled, for any error case @@ -304,6 +311,10 @@ static int __power_off_iris33_hardware(struct msm_vidc_core *core) } } + rc = call_res_op(core, gdsc_sw_ctrl, core); + if (rc) + return rc; + /* * check to make sure core clock branch enabled else * we cannot read vcodec top idle register @@ -320,6 +331,10 @@ static int __power_off_iris33_hardware(struct msm_vidc_core *core) return rc; } + rc = __write_register_masked(core, VCODEC_DMA_SPARE_3, 0x1, BIT(0)); + if (rc) + return rc; + /* * add MNoC idle check before collapsing MVS0 per HPG update * poll for NoC DMA idle -> HPG 6.1.1 @@ -338,15 +353,69 @@ static int __power_off_iris33_hardware(struct msm_vidc_core *core) if (rc) return rc; - rc = __read_register_with_poll_timeout(core, AON_WRAPPER_MVP_NOC_LPI_STATUS, - 0x1, 0x1, 200, 2000); - if (rc) - d_vpr_e("%s: AON_WRAPPER_MVP_NOC_LPI_CONTROL failed\n", __func__); + rc = __read_register(core, AON_WRAPPER_MVP_NOC_LPI_STATUS, &value); + if (rc) + return rc; - rc = __write_register_masked(core, AON_WRAPPER_MVP_NOC_LPI_CONTROL, - 0x0, BIT(0)); - if (rc) - return rc; + while ((!(value & BIT(0))) && (value & BIT(1) || value & BIT(2))) { + rc = __write_register_masked(core, AON_WRAPPER_MVP_NOC_LPI_CONTROL, + 0x0, BIT(0)); + if (rc) + return rc; + + usleep_range(10, 20); + + rc = __write_register_masked(core, AON_WRAPPER_MVP_NOC_LPI_CONTROL, + 0x1, BIT(0)); + if (rc) + return rc; + + usleep_range(10, 20); + + rc = __read_register(core, AON_WRAPPER_MVP_NOC_LPI_STATUS, &value); + if (rc) + return rc; + + ++count; + if (count >= 1000) { + d_vpr_e("%s: AON_WRAPPER_MVP_NOC_LPI_CONTROL failed\n", __func__); + break; + } + } + + if (count < 1000) { + rc = __write_register_masked(core, AON_WRAPPER_MVP_NOC_LPI_CONTROL, + 0x0, BIT(0)); + if (rc) + return rc; + } + + i = 0; + do { + value = 0; + + __read_register(core, + VCODEC_NOC_SidebandManager_main_SidebandManager_SenseIn0_Low, + &sense0_low); + __read_register(core, + VCODEC_NOC_SIDEBANDMANAGER_MAIN_SIDEBANDMANAGER_SENSEIN0_HIGH, + &sense0_high); + __read_register(core, + VCODEC_NOC_SIDEBANDMANAGER_MAIN_SIDEBANDMANAGER_SENSEIN1_HIGH, + &sense1_high); + __read_register(core, + VCODEC_NOC_SIDEBANDMANAGER_MAIN_SIDEBANDMANAGER_SENSEIN2_LOW, + &sense2_low); + + value = ((sense0_low & 0x00008000) || + (sense0_high & 0x00000800) || + (sense1_high & 0x00800000) || + (sense2_low & 0x00002000)); + usleep_range(10, 20); + i++; + } while ((value) && (i <= 100)); + + d_vpr_h("%s: sideband register value = %d\n", __func__, value); /* * Reset both sides of 2 ahb2ahb_bridges (TZ and non-TZ) @@ -370,19 +439,13 @@ disable_power: rc = 0; } - rc = call_res_op(core, clk_disable, core, "video_cc_mvs0_clk"); - if (rc) { - d_vpr_e("%s: disable unprepare video_cc_mvs0_clk failed\n", __func__); - rc = 0; - } - return rc; } static int __power_off_iris33_controller(struct msm_vidc_core *core) { - int rc = 0; - int value = 0; + int noc_lpi_status = 0, count = 0; + int rc = 0, value = 0; /* * mask fal10_veto QLPAC error since fal10_veto can go 1 @@ -434,6 +497,11 @@ static int __power_off_iris33_controller(struct msm_vidc_core *core) rc = call_res_op(core, reset_control_assert, core, "video_axi_reset"); if (rc) d_vpr_e("%s: assert video_axi_reset failed\n", __func__); + + rc = call_res_op(core, reset_control_assert, core, "video_mvs0_reset"); + if (rc) + d_vpr_e("%s: assert video_mvs0_reset failed\n", __func__); + /* set retain mem and peripheral before asset mvs0c reset */ rc = call_res_op(core, clk_set_flag, core, "video_cc_mvs0c_clk", MSM_VIDC_CLKFLAG_RETAIN_MEM); @@ -447,6 +515,9 @@ static int __power_off_iris33_controller(struct msm_vidc_core *core) if (rc) d_vpr_e("%s: assert video_mvs0c_reset failed\n", __func__); usleep_range(400, 500); + rc = call_res_op(core, reset_control_deassert, core, "video_mvs0_reset"); + if (rc) + d_vpr_e("%s: de-assert video_mvs0_reset failed\n", __func__); rc = call_res_op(core, reset_control_deassert, core, "video_axi_reset"); if (rc) d_vpr_e("%s: de-assert video_axi_reset failed\n", __func__); @@ -523,6 +594,12 @@ skip_video_xo_reset: if (rc) return rc; + rc = call_res_op(core, clk_disable, core, "video_cc_mvs0_clk"); + if (rc) { + d_vpr_e("%s: disable unprepare video_cc_mvs0_clk failed\n", __func__); + rc = 0; + } + /* remove retain mem and retain peripheral */ rc = call_res_op(core, clk_set_flag, core, "video_cc_mvs0c_clk", MSM_VIDC_CLKFLAG_NORETAIN_PERIPH); @@ -541,6 +618,129 @@ skip_video_xo_reset: rc = 0; } + if (!is_core_state(core, MSM_VIDC_CORE_ERROR)) + goto power_down; + + /* power cycle process to recover from NoC error */ + rc = call_res_op(core, gdsc_off, core, "iris-ctl"); + if (rc) { + d_vpr_e("%s: disable regulator iris-ctl failed\n", __func__); + rc = 0; + } + + call_res_op(core, gdsc_on, core, "iris-ctl"); + rc = call_res_op(core, clk_enable, core, "video_cc_mvs0c_clk"); + + /* assert and deassert axi and mvs0c resets */ + rc = call_res_op(core, reset_control_assert, core, "video_axi_reset"); + if (rc) + d_vpr_e("%s: assert video_axi_reset failed\n", __func__); + + /* set retain mem and peripheral before asset mvs0c reset */ + rc = call_res_op(core, clk_set_flag, core, + "video_cc_mvs0c_clk", MSM_VIDC_CLKFLAG_RETAIN_MEM); + if (rc) + d_vpr_e("%s: set retain mem failed\n", __func__); + rc = call_res_op(core, clk_set_flag, core, + "video_cc_mvs0c_clk", MSM_VIDC_CLKFLAG_RETAIN_PERIPH); + if (rc) + d_vpr_e("%s: set retain peripheral failed\n", __func__); + rc = call_res_op(core, reset_control_assert, core, "video_mvs0c_reset"); + if (rc) + d_vpr_e("%s: assert video_mvs0c_reset failed\n", __func__); + usleep_range(400, 500); + + rc = call_res_op(core, reset_control_deassert, core, "video_axi_reset"); + if (rc) + d_vpr_e("%s: de-assert video_axi_reset failed\n", __func__); + rc = call_res_op(core, reset_control_deassert, core, "video_mvs0c_reset"); + if (rc) + d_vpr_e("%s: de-assert video_mvs0c_reset failed\n", __func__); + + rc = call_res_op(core, gdsc_on, core, "vcodec"); + if (rc) + return rc; + + rc = call_res_op(core, clk_enable, core, "video_cc_mvs0_clk"); + if (rc) + return rc; + + rc = __write_register_masked(core, AON_WRAPPER_MVP_NOC_LPI_CONTROL, + 0x1, BIT(0)); + if (rc) + return rc; + + usleep_range(10, 20); + + rc = __read_register(core, AON_WRAPPER_MVP_NOC_LPI_STATUS, &noc_lpi_status); + if (rc) + return rc; + + while ((!(noc_lpi_status & BIT(0))) && + (noc_lpi_status & BIT(1) || noc_lpi_status & BIT(2))) { + rc = __write_register_masked(core, AON_WRAPPER_MVP_NOC_LPI_CONTROL, + 0x0, BIT(0)); + if (rc) + return rc; + + usleep_range(10, 20); + + rc = __write_register_masked(core, AON_WRAPPER_MVP_NOC_LPI_CONTROL, + 0x1, BIT(0)); + if (rc) + return rc; + + usleep_range(10, 20); + + rc = __read_register(core, AON_WRAPPER_MVP_NOC_LPI_STATUS, &noc_lpi_status); + if (rc) + return rc; + + ++count; + if (count >= 1000) { + d_vpr_e("%s: AON_WRAPPER_MVP_NOC_LPI_CONTROL failed\n", __func__); + break; + } + } + + if (count < 1000) { + rc = __write_register_masked(core, AON_WRAPPER_MVP_NOC_LPI_CONTROL, + 0x0, BIT(0)); + if (rc) + return rc; + } + + rc = call_res_op(core, clk_disable, core, "video_cc_mvs0_clk"); + if (rc) { + d_vpr_e("%s: disable unprepare video_cc_mvs0_clk failed\n", __func__); + rc = 0; + } + + rc = call_res_op(core, gdsc_off, core, "vcodec"); + if (rc) { + d_vpr_e("%s: disable regulator vcodec failed\n", __func__); + rc = 0; + } + + /* remove retain mem and retain peripheral */ + rc = call_res_op(core, clk_set_flag, core, + "video_cc_mvs0c_clk", MSM_VIDC_CLKFLAG_NORETAIN_PERIPH); + if (rc) + d_vpr_e("%s: set noretain peripheral failed\n", __func__); + + rc = call_res_op(core, clk_set_flag, core, + "video_cc_mvs0c_clk", MSM_VIDC_CLKFLAG_NORETAIN_MEM); + if (rc) + d_vpr_e("%s: set noretain mem failed\n", __func__); + + /* Turn off MVP MVS0C core clock */ + rc = call_res_op(core, clk_disable, core, "video_cc_mvs0c_clk"); + if (rc) { + d_vpr_e("%s: disable unprepare video_cc_mvs0c_clk failed\n", __func__); + rc = 0; + } + +power_down: /* power down process */ rc = call_res_op(core, gdsc_off, core, "iris-ctl"); if (rc) { @@ -1067,7 +1267,6 @@ static int __noc_error_info_iris33(struct msm_vidc_core *core) fail_deassert_xo_reset: fail_assert_xo_reset: - MSM_VIDC_FATAL(true); return rc; } diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index e7c266cfe9..12d58331dd 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. - * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved. */ #include @@ -402,7 +402,10 @@ int handle_system_error(struct msm_vidc_core *core, } } - msm_vidc_core_deinit(core, true); + core_lock(core, __func__); + msm_vidc_change_core_state(core, MSM_VIDC_CORE_ERROR, __func__); + msm_vidc_core_deinit_locked(core, true); + core_unlock(core, __func__); return 0; } From aa530c552f954c1437e25da6f2d315e6892def65 Mon Sep 17 00:00:00 2001 From: Vedang Nagar Date: Fri, 29 Mar 2024 10:22:07 +0530 Subject: [PATCH 1037/1061] video: driver: Add mvs0 clock reset and update sideBand Register For Cliffs target, Add mvs0 reset clock and update sideBand NoC registers. Change-Id: I6e48e0cab842f3ee12b1e3cb68495afe5f4e67de Signed-off-by: Vedang Nagar --- driver/platform/cliffs/src/msm_vidc_cliffs.c | 3 ++ driver/variant/iris33/src/msm_vidc_iris33.c | 51 ++++++++++++++------ 2 files changed, 38 insertions(+), 16 deletions(-) diff --git a/driver/platform/cliffs/src/msm_vidc_cliffs.c b/driver/platform/cliffs/src/msm_vidc_cliffs.c index 09a4ee5ac3..c4ac74380b 100644 --- a/driver/platform/cliffs/src/msm_vidc_cliffs.c +++ b/driver/platform/cliffs/src/msm_vidc_cliffs.c @@ -4909,6 +4909,7 @@ static const struct clk_rst_table cliffs_clk_reset_table[] = { { "video_axi_reset", 0 }, { "video_xo_reset", 1 }, { "video_mvs0c_reset", 0 }, + { "video_mvs0_reset", 0 }, }; /* name, llcc_id */ @@ -5071,7 +5072,9 @@ static const u32 cliffs_vdec_output_properties_av1[] = { static const u32 cliffs_msm_vidc_ssr_type[] = { HFI_SSR_TYPE_SW_ERR_FATAL, + HFI_SSR_TYPE_SW_DIV_BY_ZERO, HFI_SSR_TYPE_CPU_WDOG_IRQ, + HFI_SSR_TYPE_NOC_ERROR, }; static struct msm_vidc_efuse_data efuse_data_cliffs[] = { diff --git a/driver/variant/iris33/src/msm_vidc_iris33.c b/driver/variant/iris33/src/msm_vidc_iris33.c index a66061f859..219d37d042 100644 --- a/driver/variant/iris33/src/msm_vidc_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_iris33.c @@ -134,10 +134,10 @@ typedef enum { #define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG3_LOW_IRIS33 (NOC_BASE_OFFS + 0xA038) #define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG3_HIGH_IRIS33 (NOC_BASE_OFFS + 0xA03C) #define NOC_SIDEBANDMANAGER_MAIN_SIDEBANDMANAGER_FAULTINEN0_LOW_IRIS33 (NOC_BASE_OFFS + 0x7040) -#define VCODEC_NOC_SidebandManager_main_SidebandManager_SenseIn0_Low (NOC_BASE_OFFS + 0x7100) -#define VCODEC_NOC_SIDEBANDMANAGER_MAIN_SIDEBANDMANAGER_SENSEIN0_HIGH (NOC_BASE_OFFS + 0x7104) -#define VCODEC_NOC_SIDEBANDMANAGER_MAIN_SIDEBANDMANAGER_SENSEIN1_HIGH (NOC_BASE_OFFS + 0x710C) -#define VCODEC_NOC_SIDEBANDMANAGER_MAIN_SIDEBANDMANAGER_SENSEIN2_LOW (NOC_BASE_OFFS + 0x7110) +#define VCODEC_NOC_SidebandManager_SenseIn0_Low (NOC_BASE_OFFS + 0x7100) +#define VCODEC_NOC_SIDEBANDMANAGER_SENSEIN0_HIGH (NOC_BASE_OFFS + 0x7104) +#define VCODEC_NOC_SIDEBANDMANAGER_SENSEIN1_HIGH (NOC_BASE_OFFS + 0x710C) +#define VCODEC_NOC_SIDEBANDMANAGER_SENSEIN2_LOW (NOC_BASE_OFFS + 0x7110) #define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_MAINCTL_LOW_IRIS33_2P (NOC_BASE_OFFS + 0x3508) #define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRCLR_LOW_IRIS33_2P (NOC_BASE_OFFS + 0x3518) @@ -150,6 +150,10 @@ typedef enum { #define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG3_LOW_IRIS33_2P (NOC_BASE_OFFS + 0x3538) #define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG3_HIGH_IRIS33_2P (NOC_BASE_OFFS + 0x353C) #define NOC_SIDEBANDMANAGER_MAIN_SIDEBANDMANAGER_FAULTINEN0_LOW_IRIS33_2P (NOC_BASE_OFFS + 0x3240) +#define VCODEC_NOC_SidebandManager_SenseIn0_Low_2P (NOC_BASE_OFFS + 0x3300) +#define VCODEC_NOC_SIDEBANDMANAGER_SENSEIN0_HIGH_2P (NOC_BASE_OFFS + 0x3304) +#define VCODEC_NOC_SIDEBANDMANAGER_SENSEIN1_HIGH_2P (NOC_BASE_OFFS + 0x330C) +#define VCODEC_NOC_SIDEBANDMANAGER_SENSEIN2_LOW_2P (NOC_BASE_OFFS + 0x3310) #define VCODEC_DMA_SPARE_3 0x87B8 @@ -394,18 +398,33 @@ static int __power_off_iris33_hardware(struct msm_vidc_core *core) do { value = 0; - __read_register(core, - VCODEC_NOC_SidebandManager_main_SidebandManager_SenseIn0_Low, - &sense0_low); - __read_register(core, - VCODEC_NOC_SIDEBANDMANAGER_MAIN_SIDEBANDMANAGER_SENSEIN0_HIGH, - &sense0_high); - __read_register(core, - VCODEC_NOC_SIDEBANDMANAGER_MAIN_SIDEBANDMANAGER_SENSEIN1_HIGH, - &sense1_high); - __read_register(core, - VCODEC_NOC_SIDEBANDMANAGER_MAIN_SIDEBANDMANAGER_SENSEIN2_LOW, - &sense2_low); + if (core->platform->data.vpu_ver == VPU_VERSION_IRIS33) { + __read_register(core, + VCODEC_NOC_SidebandManager_SenseIn0_Low, + &sense0_low); + __read_register(core, + VCODEC_NOC_SIDEBANDMANAGER_SENSEIN0_HIGH, + &sense0_high); + __read_register(core, + VCODEC_NOC_SIDEBANDMANAGER_SENSEIN1_HIGH, + &sense1_high); + __read_register(core, + VCODEC_NOC_SIDEBANDMANAGER_SENSEIN2_LOW, + &sense2_low); + } else if (core->platform->data.vpu_ver == VPU_VERSION_IRIS33_2P) { + __read_register(core, + VCODEC_NOC_SidebandManager_SenseIn0_Low_2P, + &sense0_low); + __read_register(core, + VCODEC_NOC_SIDEBANDMANAGER_SENSEIN0_HIGH_2P, + &sense0_high); + __read_register(core, + VCODEC_NOC_SIDEBANDMANAGER_SENSEIN1_HIGH_2P, + &sense1_high); + __read_register(core, + VCODEC_NOC_SIDEBANDMANAGER_SENSEIN2_LOW_2P, + &sense2_low); + } value = ((sense0_low & 0x00008000) || (sense0_high & 0x00000800) || From a7e4cb9cefa079c6303d913d05b773f06ee79c81 Mon Sep 17 00:00:00 2001 From: Rajathi S Date: Tue, 2 Apr 2024 12:18:23 +0530 Subject: [PATCH 1038/1061] Video: Driver: Restrict VP9 to UHD 60 fps - According to the spec, restrict VP9 to UHD 60 fps Change-Id: Iaa8208824e0e54c9ed9091b2e54824cb20798dc0 Signed-off-by: Rajathi S --- driver/platform/volcano/src/msm_vidc_volcano.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/driver/platform/volcano/src/msm_vidc_volcano.c b/driver/platform/volcano/src/msm_vidc_volcano.c index 68647750cc..fd746a465c 100644 --- a/driver/platform/volcano/src/msm_vidc_volcano.c +++ b/driver/platform/volcano/src/msm_vidc_volcano.c @@ -54,7 +54,7 @@ #define VP9 MSM_VIDC_VP9 #define HEIC MSM_VIDC_HEIC #define CODECS_ALL (H264 | HEVC | VP9 | HEIC) -#define MAXIMUM_OVERRIDE_VP9_FPS 120 +#define MAXIMUM_OVERRIDE_VP9_FPS 60 static struct codec_info codec_data_volcano[] = { { From 155787cac4f319648ce0cb4e017cc91431d3d1f9 Mon Sep 17 00:00:00 2001 From: Manikanta Kanamarlapudi Date: Wed, 3 Apr 2024 10:08:34 +0530 Subject: [PATCH 1039/1061] video-driver: Add comments to the logs Add comments to the error logs that are used in RMA device screening. Change-Id: I830e7116ceae535cf291aae8e137b38c9bc77fee Signed-off-by: Manikanta Kanamarlapudi --- driver/variant/iris33/src/msm_vidc_iris33.c | 4 ++-- driver/vidc/inc/msm_vidc_debug.h | 6 +++++- driver/vidc/src/venus_hfi_response.c | 4 ++-- 3 files changed, 9 insertions(+), 5 deletions(-) diff --git a/driver/variant/iris33/src/msm_vidc_iris33.c b/driver/variant/iris33/src/msm_vidc_iris33.c index 5814f439ce..2e63b80381 100644 --- a/driver/variant/iris33/src/msm_vidc_iris33.c +++ b/driver/variant/iris33/src/msm_vidc_iris33.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2020-2022, The Linux Foundation. All rights reserved. - * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved. */ #include @@ -1141,7 +1141,7 @@ static int __boot_firmware_iris33(struct msm_vidc_core *core) } if (count >= max_tries) { - d_vpr_e("Error booting up vidc firmware, ctrl status %#x, ctrl init %#x\n", + d_vpr_e(FMT_STRING_BOOT_FIRMWARE_ERROR, ctrl_status, ctrl_init_val); return -ETIME; } diff --git a/driver/vidc/inc/msm_vidc_debug.h b/driver/vidc/inc/msm_vidc_debug.h index bc108583f1..ea82fa6f85 100644 --- a/driver/vidc/inc/msm_vidc_debug.h +++ b/driver/vidc/inc/msm_vidc_debug.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. - * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2023-2024, Qualcomm Innovation Center, Inc. All rights reserved. */ #ifndef __MSM_VIDC_DEBUG__ @@ -56,6 +56,10 @@ extern bool msm_vidc_synx_fence_enable; "%s: faulting address: %lx\n" #define FMT_STRING_SET_CAP \ "set cap: name: %24s, cap value: %#10x, hfi: %#10llx\n" +#define FMT_STRING_SYSTEM_ERROR \ + "%s: system error received\n" +#define FMT_STRING_BOOT_FIRMWARE_ERROR \ + "Error booting up vidc firmware, ctrl status %#x, ctrl init %#x\n" /* To enable messages OR these values and * echo the result to debugfs file. diff --git a/driver/vidc/src/venus_hfi_response.c b/driver/vidc/src/venus_hfi_response.c index e7c266cfe9..265bd0d0ed 100644 --- a/driver/vidc/src/venus_hfi_response.c +++ b/driver/vidc/src/venus_hfi_response.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. - * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved. */ #include @@ -383,7 +383,7 @@ int handle_system_error(struct msm_vidc_core *core, { bool bug_on = false; - d_vpr_e("%s: system error received\n", __func__); + d_vpr_e(FMT_STRING_SYSTEM_ERROR, __func__); print_sfr_message(core); if (pkt) { From 2502af1259c13fb2d73c0e7064782a5ea8a2a15d Mon Sep 17 00:00:00 2001 From: Rajathi S Date: Fri, 12 Apr 2024 17:48:03 +0530 Subject: [PATCH 1040/1061] Video: Driver: Moved DPB list from input to output - Moved DPB list from input to output - change the log level of xo_reset control to high instead of error log. Change-Id: Ie3fd1f5fc846b08452d1c0d56bb065a11135e1e3 Signed-off-by: Rajathi S --- driver/platform/volcano/src/msm_vidc_volcano.c | 6 +++--- driver/vidc/src/resources.c | 4 ++-- 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/driver/platform/volcano/src/msm_vidc_volcano.c b/driver/platform/volcano/src/msm_vidc_volcano.c index fd746a465c..36b5ea2416 100644 --- a/driver/platform/volcano/src/msm_vidc_volcano.c +++ b/driver/platform/volcano/src/msm_vidc_volcano.c @@ -4473,19 +4473,16 @@ static const u32 volcano_vdec_psc_vp9[] = { static const u32 volcano_vdec_input_properties_avc[] = { HFI_PROP_NO_OUTPUT, HFI_PROP_SUBFRAME_INPUT, - HFI_PROP_DPB_LIST, }; static const u32 volcano_vdec_input_properties_hevc[] = { HFI_PROP_NO_OUTPUT, HFI_PROP_SUBFRAME_INPUT, - HFI_PROP_DPB_LIST, }; static const u32 volcano_vdec_input_properties_vp9[] = { HFI_PROP_NO_OUTPUT, HFI_PROP_SUBFRAME_INPUT, - HFI_PROP_DPB_LIST, }; static const u32 volcano_vdec_output_properties_avc[] = { @@ -4494,6 +4491,7 @@ static const u32 volcano_vdec_output_properties_avc[] = { HFI_PROP_PICTURE_TYPE, HFI_PROP_CABAC_SESSION, HFI_PROP_FENCE, + HFI_PROP_DPB_LIST, }; static const u32 volcano_vdec_output_properties_hevc[] = { @@ -4501,6 +4499,7 @@ static const u32 volcano_vdec_output_properties_hevc[] = { HFI_PROP_WORST_COMPLEXITY_FACTOR, HFI_PROP_PICTURE_TYPE, HFI_PROP_FENCE, + HFI_PROP_DPB_LIST, }; static const u32 volcano_vdec_output_properties_vp9[] = { @@ -4508,6 +4507,7 @@ static const u32 volcano_vdec_output_properties_vp9[] = { HFI_PROP_WORST_COMPLEXITY_FACTOR, HFI_PROP_PICTURE_TYPE, HFI_PROP_FENCE, + HFI_PROP_DPB_LIST, }; static const struct msm_vidc_platform_data volcano_data_v0 = { diff --git a/driver/vidc/src/resources.c b/driver/vidc/src/resources.c index e9365d87ae..79a49a0828 100644 --- a/driver/vidc/src/resources.c +++ b/driver/vidc/src/resources.c @@ -1493,7 +1493,7 @@ static int __reset_control_acquire_name(struct msm_vidc_core *core, * skip this check and return success */ if (!found) { - d_vpr_e("%s: reset control (%s) not found but returning success\n", + d_vpr_h("%s: reset control (%s) not found but returning success\n", __func__, name); rc = 0; } @@ -1538,7 +1538,7 @@ static int __reset_control_release_name(struct msm_vidc_core *core, * skip this check and return success */ if (!found) { - d_vpr_e("%s: reset control (%s) not found but returning success\n", + d_vpr_h("%s: reset control (%s) not found but returning success\n", __func__, name); rc = 0; } From 60d19eb2348b7b50c4860ff669e12a274d7937cd Mon Sep 17 00:00:00 2001 From: Rajathi S Date: Tue, 2 Apr 2024 12:18:23 +0530 Subject: [PATCH 1041/1061] Video: Driver: Restrict VP9 to UHD 60 fps - According to the spec, restrict VP9 to UHD 60 fps Change-Id: Iaa8208824e0e54c9ed9091b2e54824cb20798dc0 Signed-off-by: Rajathi S --- driver/platform/volcano/src/msm_vidc_volcano.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/driver/platform/volcano/src/msm_vidc_volcano.c b/driver/platform/volcano/src/msm_vidc_volcano.c index 68647750cc..fd746a465c 100644 --- a/driver/platform/volcano/src/msm_vidc_volcano.c +++ b/driver/platform/volcano/src/msm_vidc_volcano.c @@ -54,7 +54,7 @@ #define VP9 MSM_VIDC_VP9 #define HEIC MSM_VIDC_HEIC #define CODECS_ALL (H264 | HEVC | VP9 | HEIC) -#define MAXIMUM_OVERRIDE_VP9_FPS 120 +#define MAXIMUM_OVERRIDE_VP9_FPS 60 static struct codec_info codec_data_volcano[] = { { From 40204062122a7bc28e3eedbe1c2d43f2c060c449 Mon Sep 17 00:00:00 2001 From: Rajathi S Date: Wed, 17 Apr 2024 11:21:54 +0530 Subject: [PATCH 1042/1061] Video: Driver: Add SSR support for cliffs SKU1 - Add SSR support for cliffs SKU1 version Change-Id: If954d8ff858385aef60850440f6f5e3a1ded3e29 Signed-off-by: Rajathi S --- driver/platform/cliffs/src/msm_vidc_cliffs.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/driver/platform/cliffs/src/msm_vidc_cliffs.c b/driver/platform/cliffs/src/msm_vidc_cliffs.c index c4ac74380b..e0aebef9c0 100644 --- a/driver/platform/cliffs/src/msm_vidc_cliffs.c +++ b/driver/platform/cliffs/src/msm_vidc_cliffs.c @@ -5221,6 +5221,9 @@ static const struct msm_vidc_platform_data cliffs_data_v1 = { .dec_output_prop_size_hevc = ARRAY_SIZE(cliffs_vdec_output_properties_hevc), .dec_output_prop_size_vp9 = ARRAY_SIZE(cliffs_vdec_output_properties_vp9), + .msm_vidc_ssr_type = cliffs_msm_vidc_ssr_type, + .msm_vidc_ssr_type_size = ARRAY_SIZE(cliffs_msm_vidc_ssr_type), + /* Fuse specific resources */ .efuse_data = efuse_data_cliffs, .efuse_data_size = ARRAY_SIZE(efuse_data_cliffs), From 652e7d78ad32bf2d13092632f11cc694ff423548 Mon Sep 17 00:00:00 2001 From: Rajathi S Date: Mon, 15 Apr 2024 19:24:57 +0530 Subject: [PATCH 1043/1061] Video: Driver: Add SSR support - Add SSR support on MILOS Change-Id: I87f9de1307b043b3d883ba934c805b0e80ade32c Signed-off-by: Rajathi S --- driver/platform/volcano/src/msm_vidc_volcano.c | 13 +++++++++++++ driver/vidc/src/msm_vidc_driver.c | 9 +++++---- 2 files changed, 18 insertions(+), 4 deletions(-) diff --git a/driver/platform/volcano/src/msm_vidc_volcano.c b/driver/platform/volcano/src/msm_vidc_volcano.c index fd746a465c..d2703eb6de 100644 --- a/driver/platform/volcano/src/msm_vidc_volcano.c +++ b/driver/platform/volcano/src/msm_vidc_volcano.c @@ -4359,6 +4359,13 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_volc NULL}, }; +static const u32 volcano_msm_vidc_ssr_type[] = { + HFI_SSR_TYPE_SW_ERR_FATAL, + HFI_SSR_TYPE_SW_DIV_BY_ZERO, + HFI_SSR_TYPE_CPU_WDOG_IRQ, + HFI_SSR_TYPE_NOC_ERROR, +}; + /* Default UBWC config for LPDDR5 */ static struct msm_vidc_ubwc_config_data ubwc_config_volcano[] = { UBWC_CONFIG(8, 32, 15, 0, 1, 1, 1), @@ -4568,6 +4575,9 @@ static const struct msm_vidc_platform_data volcano_data_v0 = { .dec_output_prop_size_hevc = ARRAY_SIZE(volcano_vdec_output_properties_hevc), .dec_output_prop_size_vp9 = ARRAY_SIZE(volcano_vdec_output_properties_vp9), + .msm_vidc_ssr_type = volcano_msm_vidc_ssr_type, + .msm_vidc_ssr_type_size = ARRAY_SIZE(volcano_msm_vidc_ssr_type), + /* Fuse specific resources */ .efuse_data = efuse_data_volcano, .efuse_data_size = ARRAY_SIZE(efuse_data_volcano), @@ -4632,6 +4642,9 @@ static const struct msm_vidc_platform_data volcano_data_v1 = { .dec_output_prop_size_hevc = ARRAY_SIZE(volcano_vdec_output_properties_hevc), .dec_output_prop_size_vp9 = ARRAY_SIZE(volcano_vdec_output_properties_vp9), + .msm_vidc_ssr_type = volcano_msm_vidc_ssr_type, + .msm_vidc_ssr_type_size = ARRAY_SIZE(volcano_msm_vidc_ssr_type), + /* Fuse specific resources */ .efuse_data = efuse_data_volcano, .efuse_data_size = ARRAY_SIZE(efuse_data_volcano), diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index da23f3938f..88ca575e16 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -4083,13 +4083,14 @@ int msm_vidc_trigger_ssr(struct msm_vidc_core *core, d_vpr_e("%s: trigger ssr is called. trigger ssr val: %#llx\n", __func__, trigger_ssr_val); - if (!is_ssr_type_allowed(core, trigger_ssr_val)) { - d_vpr_h("SSR Type %#llx is not allowed\n", trigger_ssr_val); + ssr->ssr_type = (trigger_ssr_val & + (unsigned long)SSR_TYPE) >> SSR_TYPE_SHIFT; + + if (!is_ssr_type_allowed(core, ssr->ssr_type)) { + d_vpr_h("SSR Type %#llx is not allowed\n", ssr->ssr_type); return 0; } - ssr->ssr_type = (trigger_ssr_val & - (unsigned long)SSR_TYPE) >> SSR_TYPE_SHIFT; ssr->sub_client_id = (trigger_ssr_val & (unsigned long)SSR_SUB_CLIENT_ID) >> SSR_SUB_CLIENT_ID_SHIFT; ssr->test_addr = (trigger_ssr_val & From ca60c1dc9ed6230b5c246581120579089ebe11bc Mon Sep 17 00:00:00 2001 From: Wenjie Yin Date: Thu, 14 Mar 2024 17:31:09 +0800 Subject: [PATCH 1044/1061] video: driver: limit auto-frame-rate to original fps value Limit the auto-frame-rate feature to the original fps value the client set, ignore other cases. Change-Id: Ib8f374cc385da1cc4de464bc1d0520eb1d637b7e Signed-off-by: Wenjie Yin --- driver/vidc/src/msm_vidc_driver.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index da23f3938f..e7e8beb50d 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -1643,6 +1643,11 @@ int msm_vidc_set_auto_framerate(struct msm_vidc_inst *inst, u64 timestamp) if (counter < ENC_FPS_WINDOW) goto exit; + if (curr_fr > inst->capabilities[FRAME_RATE].value) { + i_vpr_l(inst, "%s: fps: %u limitted to client fps.\n", __func__, curr_fr >> 16); + curr_fr = inst->capabilities[FRAME_RATE].value; + } + /* if framerate changed and stable for 2 frames, set to firmware */ if (curr_fr == prev_fr && curr_fr != inst->auto_framerate) { i_vpr_l(inst, "%s: updated fps: %u -> %u\n", __func__, From 85f3b6cbcc76b2d5e46f0431057fb2e0a1c2e560 Mon Sep 17 00:00:00 2001 From: Rajathi S Date: Thu, 25 Apr 2024 18:23:10 +0530 Subject: [PATCH 1045/1061] Video: Driver: Enable bug on for WD_TIMEOUT on MILOS - Enable bug on only for WD_TIMEOUT and disable WD SSR Change-Id: I993ac622660a242fa3a835eca119b76e9e020510 Signed-off-by: Rajathi S --- driver/platform/volcano/src/msm_vidc_volcano.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/driver/platform/volcano/src/msm_vidc_volcano.c b/driver/platform/volcano/src/msm_vidc_volcano.c index f83be74bb9..c105d61327 100644 --- a/driver/platform/volcano/src/msm_vidc_volcano.c +++ b/driver/platform/volcano/src/msm_vidc_volcano.c @@ -4361,8 +4361,6 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_volc static const u32 volcano_msm_vidc_ssr_type[] = { HFI_SSR_TYPE_SW_ERR_FATAL, - HFI_SSR_TYPE_SW_DIV_BY_ZERO, - HFI_SSR_TYPE_CPU_WDOG_IRQ, HFI_SSR_TYPE_NOC_ERROR, }; @@ -4719,6 +4717,9 @@ static int msm_vidc_init_data(struct msm_vidc_core *core) if (rc) return rc; + /* Enable bug on for WD_TIMEOUT */ + msm_vidc_enable_bugon = MSM_VIDC_BUG_ON_WD_TIMEOUT; + return rc; } From bc6d76cb8891dadddd51549c7b98cad2dac85e41 Mon Sep 17 00:00:00 2001 From: Rajathi S Date: Thu, 9 May 2024 10:01:11 +0530 Subject: [PATCH 1046/1061] Video: Driver: Add fence support in MILOS - Add fence support in MILOS Change-Id: I2f1f8374559104535ef89d20efb5203b32dd4567 Signed-off-by: Rajathi S --- .../platform/volcano/src/msm_vidc_volcano.c | 136 +++++++++++++++++- 1 file changed, 133 insertions(+), 3 deletions(-) diff --git a/driver/platform/volcano/src/msm_vidc_volcano.c b/driver/platform/volcano/src/msm_vidc_volcano.c index f83be74bb9..26e8e0bbb5 100644 --- a/driver/platform/volcano/src/msm_vidc_volcano.c +++ b/driver/platform/volcano/src/msm_vidc_volcano.c @@ -316,7 +316,7 @@ static struct msm_platform_core_capability core_data_volcano_v0[] = { {ENC_AUTO_FRAMERATE, 0}, {DEVICE_CAPS, V4L2_CAP_VIDEO_M2M_MPLANE | V4L2_CAP_META_CAPTURE | V4L2_CAP_STREAMING}, - {SUPPORTS_SYNX_FENCE, 0}, + {SUPPORTS_SYNX_FENCE, 1}, {SUPPORTS_REQUESTS, 0}, }; @@ -358,7 +358,7 @@ static struct msm_platform_core_capability core_data_volcano_v1[] = { {ENC_AUTO_FRAMERATE, 0}, {DEVICE_CAPS, V4L2_CAP_VIDEO_M2M_MPLANE | V4L2_CAP_META_CAPTURE | V4L2_CAP_STREAMING}, - {SUPPORTS_SYNX_FENCE, 0}, + {SUPPORTS_SYNX_FENCE, 1}, {SUPPORTS_REQUESTS, 0}, }; @@ -587,6 +587,46 @@ static struct msm_platform_inst_capability instance_cap_data_volcano_v0[] = { 0, CAP_FLAG_VOLATILE}, + {INBUF_FENCE_TYPE, DEC, H264 | HEVC | VP9, + MSM_VIDC_FENCE_NONE, MSM_VIDC_FENCE_NONE, + BIT(MSM_VIDC_FENCE_NONE), + MSM_VIDC_FENCE_NONE, + 0, + HFI_PROP_FENCE_TYPE, + CAP_FLAG_MENU | CAP_FLAG_INPUT_PORT}, + + {OUTBUF_FENCE_TYPE, DEC, H264 | HEVC | VP9, + MSM_VIDC_FENCE_NONE, MSM_VIDC_SYNX_V2_FENCE, + BIT(MSM_VIDC_FENCE_NONE) | BIT(MSM_VIDC_SW_FENCE) | + BIT(MSM_VIDC_SYNX_V2_FENCE), + MSM_VIDC_FENCE_NONE, + 0, + HFI_PROP_FENCE_TYPE, + CAP_FLAG_MENU | CAP_FLAG_OUTPUT_PORT}, + + /* Fence direction for input buffer. Currently unused */ + {INBUF_FENCE_DIRECTION, DEC, H264 | HEVC | VP9, + MSM_VIDC_FENCE_DIR_NONE, MSM_VIDC_FENCE_DIR_NONE, + BIT(MSM_VIDC_FENCE_DIR_NONE), + MSM_VIDC_FENCE_DIR_NONE, + 0, + HFI_PROP_FENCE_DIRECTION, + CAP_FLAG_MENU | CAP_FLAG_INPUT_PORT}, + + {OUTBUF_FENCE_DIRECTION, DEC, H264 | HEVC | VP9, + MSM_VIDC_FENCE_DIR_NONE, MSM_VIDC_FENCE_DIR_RX, + BIT(MSM_VIDC_FENCE_DIR_NONE) | BIT(MSM_VIDC_FENCE_DIR_TX) | + BIT(MSM_VIDC_FENCE_DIR_RX), + MSM_VIDC_FENCE_DIR_NONE, + 0, + HFI_PROP_FENCE_DIRECTION, + CAP_FLAG_MENU | CAP_FLAG_OUTPUT_PORT}, + + {FENCE_ERROR_DATA_CORRUPT, DEC, H264 | HEVC | VP9, + 0, 1, 1, 0, + 0, + HFI_PROP_FENCE_ERROR_DATA_CORRUPT}, + {TS_REORDER, DEC, H264 | HEVC, 0, 1, 1, 0, V4L2_CID_MPEG_VIDC_TS_REORDER}, @@ -2050,6 +2090,46 @@ static struct msm_platform_inst_capability instance_cap_data_volcano_v1[] = { 0, CAP_FLAG_VOLATILE}, + {INBUF_FENCE_TYPE, DEC, H264 | HEVC | VP9, + MSM_VIDC_FENCE_NONE, MSM_VIDC_FENCE_NONE, + BIT(MSM_VIDC_FENCE_NONE), + MSM_VIDC_FENCE_NONE, + 0, + HFI_PROP_FENCE_TYPE, + CAP_FLAG_MENU | CAP_FLAG_INPUT_PORT}, + + {OUTBUF_FENCE_TYPE, DEC, H264 | HEVC | VP9, + MSM_VIDC_FENCE_NONE, MSM_VIDC_SYNX_V2_FENCE, + BIT(MSM_VIDC_FENCE_NONE) | BIT(MSM_VIDC_SW_FENCE) | + BIT(MSM_VIDC_SYNX_V2_FENCE), + MSM_VIDC_FENCE_NONE, + 0, + HFI_PROP_FENCE_TYPE, + CAP_FLAG_MENU | CAP_FLAG_OUTPUT_PORT}, + + /* Fence direction for input buffer. Currently unused */ + {INBUF_FENCE_DIRECTION, DEC, H264 | HEVC | VP9, + MSM_VIDC_FENCE_DIR_NONE, MSM_VIDC_FENCE_DIR_NONE, + BIT(MSM_VIDC_FENCE_DIR_NONE), + MSM_VIDC_FENCE_DIR_NONE, + 0, + HFI_PROP_FENCE_DIRECTION, + CAP_FLAG_MENU | CAP_FLAG_INPUT_PORT}, + + {OUTBUF_FENCE_DIRECTION, DEC, H264 | HEVC | VP9, + MSM_VIDC_FENCE_DIR_NONE, MSM_VIDC_FENCE_DIR_RX, + BIT(MSM_VIDC_FENCE_DIR_NONE) | BIT(MSM_VIDC_FENCE_DIR_TX) | + BIT(MSM_VIDC_FENCE_DIR_RX), + MSM_VIDC_FENCE_DIR_NONE, + 0, + HFI_PROP_FENCE_DIRECTION, + CAP_FLAG_MENU | CAP_FLAG_OUTPUT_PORT}, + + {FENCE_ERROR_DATA_CORRUPT, DEC, H264 | HEVC | VP9, + 0, 1, 1, 0, + 0, + HFI_PROP_FENCE_ERROR_DATA_CORRUPT}, + {TS_REORDER, DEC, H264 | HEVC, 0, 1, 1, 0, V4L2_CID_MPEG_VIDC_TS_REORDER}, @@ -3326,10 +3406,35 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_volc msm_vidc_set_u32}, {META_OUTBUF_FENCE, DEC, H264 | HEVC | VP9, - {LOWLATENCY_MODE}, + {LOWLATENCY_MODE, OUTBUF_FENCE_TYPE, OUTBUF_FENCE_DIRECTION}, NULL, NULL}, + {INBUF_FENCE_TYPE, DEC, H264 | HEVC | VP9, + {0}, + NULL, + NULL}, + + {OUTBUF_FENCE_TYPE, DEC, H264 | HEVC | VP9, + {0}, + msm_vidc_adjust_dec_outbuf_fence_type, + msm_vidc_set_outbuf_fence_type}, + + {INBUF_FENCE_DIRECTION, DEC, H264 | HEVC | VP9, + {0}, + NULL, + NULL}, + + {OUTBUF_FENCE_DIRECTION, DEC, H264 | HEVC | VP9, + {0}, + msm_vidc_adjust_dec_outbuf_fence_direction, + msm_vidc_set_outbuf_fence_direction}, + + {FENCE_ERROR_DATA_CORRUPT, DEC, H264 | HEVC | VP9, + {0}, + NULL, + msm_vidc_set_u32}, + {HFLIP, ENC, CODECS_ALL, {0}, NULL, @@ -3869,6 +3974,31 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_volc NULL, NULL}, + {INBUF_FENCE_TYPE, DEC, H264 | HEVC | VP9, + {0}, + NULL, + NULL}, + + {OUTBUF_FENCE_TYPE, DEC, H264 | HEVC | VP9, + {0}, + msm_vidc_adjust_dec_outbuf_fence_type, + msm_vidc_set_outbuf_fence_type}, + + {INBUF_FENCE_DIRECTION, DEC, H264 | HEVC | VP9, + {0}, + NULL, + NULL}, + + {OUTBUF_FENCE_DIRECTION, DEC, H264 | HEVC | VP9, + {0}, + msm_vidc_adjust_dec_outbuf_fence_direction, + msm_vidc_set_outbuf_fence_direction}, + + {FENCE_ERROR_DATA_CORRUPT, DEC, H264 | HEVC | VP9, + {0}, + NULL, + msm_vidc_set_u32}, + {HFLIP, ENC, CODECS_ALL, {0}, NULL, From 45914453ddcca2ca8f2e7fa74454470e8d99c0f4 Mon Sep 17 00:00:00 2001 From: Rajathi S Date: Thu, 16 May 2024 17:00:28 +0530 Subject: [PATCH 1047/1061] Video: Driver: Updated Firmware version - Update the firmware version from 4v to 2v since volcano is 2 pipe configuration. Change-Id: I2b736e5165d8dc2bf3dcdc9820bd38a476b3521f Signed-off-by: Rajathi S --- driver/platform/volcano/src/msm_vidc_volcano.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/driver/platform/volcano/src/msm_vidc_volcano.c b/driver/platform/volcano/src/msm_vidc_volcano.c index c105d61327..9e1a680a7f 100644 --- a/driver/platform/volcano/src/msm_vidc_volcano.c +++ b/driver/platform/volcano/src/msm_vidc_volcano.c @@ -4535,7 +4535,7 @@ static const struct msm_vidc_platform_data volcano_data_v0 = { .freq_tbl_size = ARRAY_SIZE(volcano_freq_table_sku0), .reg_prst_tbl = volcano_reg_preset_table, .reg_prst_tbl_size = ARRAY_SIZE(volcano_reg_preset_table), - .fwname = "vpu20_4v", + .fwname = "vpu20_2v", .pas_id = 9, .supports_mmrm = 0, .vpu_ver = VPU_VERSION_IRIS2_2P, @@ -4602,7 +4602,7 @@ static const struct msm_vidc_platform_data volcano_data_v1 = { .freq_tbl_size = ARRAY_SIZE(volcano_freq_table_sku1), .reg_prst_tbl = volcano_reg_preset_table, .reg_prst_tbl_size = ARRAY_SIZE(volcano_reg_preset_table), - .fwname = "vpu20_4v", + .fwname = "vpu20_2v", .pas_id = 9, .supports_mmrm = 0, .vpu_ver = VPU_VERSION_IRIS2_2P, From 287b84428d341f2b9980026603514f562b8b6242 Mon Sep 17 00:00:00 2001 From: Vikash Garodia Date: Tue, 21 May 2024 19:12:57 +0530 Subject: [PATCH 1048/1061] video: driver: remove redundant entry for STAGE remove redundant entry for STAGE in cliff DB. Change-Id: Id640ee48dec26851ba18cd472077b0e75f367496 Signed-off-by: Vikash Garodia --- driver/platform/cliffs/src/cliffs.c | 12 +----------- 1 file changed, 1 insertion(+), 11 deletions(-) diff --git a/driver/platform/cliffs/src/cliffs.c b/driver/platform/cliffs/src/cliffs.c index fd524bc887..d0c0441441 100644 --- a/driver/platform/cliffs/src/cliffs.c +++ b/driver/platform/cliffs/src/cliffs.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved. */ #include @@ -1657,16 +1657,6 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_clif NULL, msm_vidc_set_stage}, - {STAGE, ENC, H264 | HEVC, - {0}, - NULL, - msm_vidc_set_stage}, - - {STAGE, DEC, H264 | HEVC | VP9, - {0}, - NULL, - msm_vidc_set_stage}, - {PIPE, DEC | ENC, CODECS_ALL, {0}, NULL, From db314a6554c265d75e4a55e8837212b563a7bf0c Mon Sep 17 00:00:00 2001 From: Vikash Garodia Date: Tue, 21 May 2024 19:17:13 +0530 Subject: [PATCH 1049/1061] video: driver: remove redundant entry for STAGE remove redundant entry for STAGE in pineapple DB. Change-Id: I1a0a861a0f419fbcadd1ebbbdc8ca2dc373af10c Signed-off-by: Vikash Garodia --- driver/platform/pineapple/src/pineapple.c | 12 +----------- 1 file changed, 1 insertion(+), 11 deletions(-) diff --git a/driver/platform/pineapple/src/pineapple.c b/driver/platform/pineapple/src/pineapple.c index e859014751..d240ad630b 100644 --- a/driver/platform/pineapple/src/pineapple.c +++ b/driver/platform/pineapple/src/pineapple.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved. */ #include @@ -1657,16 +1657,6 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine NULL, msm_vidc_set_stage}, - {STAGE, ENC, H264 | HEVC, - {0}, - NULL, - msm_vidc_set_stage}, - - {STAGE, DEC, H264 | HEVC | VP9, - {0}, - NULL, - msm_vidc_set_stage}, - {PIPE, DEC | ENC, CODECS_ALL, {0}, NULL, From 8f31c12ac8322874ada76238034ae962c68dfbb0 Mon Sep 17 00:00:00 2001 From: Vikash Garodia Date: Tue, 21 May 2024 19:19:25 +0530 Subject: [PATCH 1050/1061] video: driver: fix redundant entries in cap remove redundant entry for STAGE in database. Change-Id: I7a424f070e1cb1b505be021659c5b7c064c3b3a4 Signed-off-by: Vikash Garodia --- driver/platform/volcano/src/volcano.c | 10 ---------- 1 file changed, 10 deletions(-) diff --git a/driver/platform/volcano/src/volcano.c b/driver/platform/volcano/src/volcano.c index 345efebcb3..209d162ead 100644 --- a/driver/platform/volcano/src/volcano.c +++ b/driver/platform/volcano/src/volcano.c @@ -1580,16 +1580,6 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_volc NULL, msm_vidc_set_stage}, - {STAGE, ENC, H264 | HEVC, - {0}, - NULL, - msm_vidc_set_stage}, - - {STAGE, DEC, H264 | HEVC | VP9, - {0}, - NULL, - msm_vidc_set_stage}, - {PIPE, DEC|ENC, CODECS_ALL, {0}, NULL, From 58830f8ea9f2bdccf312b78270a53dc14a361399 Mon Sep 17 00:00:00 2001 From: Rajathi S Date: Thu, 9 May 2024 10:01:11 +0530 Subject: [PATCH 1051/1061] Video: Driver: Add fence support in MILOS - Add fence support in MILOS Change-Id: I2f1f8374559104535ef89d20efb5203b32dd4567 Signed-off-by: Rajathi S (cherry picked from commit bc6d76cb8891dadddd51549c7b98cad2dac85e41) --- .../platform/volcano/src/msm_vidc_volcano.c | 136 +++++++++++++++++- 1 file changed, 133 insertions(+), 3 deletions(-) diff --git a/driver/platform/volcano/src/msm_vidc_volcano.c b/driver/platform/volcano/src/msm_vidc_volcano.c index c105d61327..24f6b84e06 100644 --- a/driver/platform/volcano/src/msm_vidc_volcano.c +++ b/driver/platform/volcano/src/msm_vidc_volcano.c @@ -316,7 +316,7 @@ static struct msm_platform_core_capability core_data_volcano_v0[] = { {ENC_AUTO_FRAMERATE, 0}, {DEVICE_CAPS, V4L2_CAP_VIDEO_M2M_MPLANE | V4L2_CAP_META_CAPTURE | V4L2_CAP_STREAMING}, - {SUPPORTS_SYNX_FENCE, 0}, + {SUPPORTS_SYNX_FENCE, 1}, {SUPPORTS_REQUESTS, 0}, }; @@ -358,7 +358,7 @@ static struct msm_platform_core_capability core_data_volcano_v1[] = { {ENC_AUTO_FRAMERATE, 0}, {DEVICE_CAPS, V4L2_CAP_VIDEO_M2M_MPLANE | V4L2_CAP_META_CAPTURE | V4L2_CAP_STREAMING}, - {SUPPORTS_SYNX_FENCE, 0}, + {SUPPORTS_SYNX_FENCE, 1}, {SUPPORTS_REQUESTS, 0}, }; @@ -587,6 +587,46 @@ static struct msm_platform_inst_capability instance_cap_data_volcano_v0[] = { 0, CAP_FLAG_VOLATILE}, + {INBUF_FENCE_TYPE, DEC, H264 | HEVC | VP9, + MSM_VIDC_FENCE_NONE, MSM_VIDC_FENCE_NONE, + BIT(MSM_VIDC_FENCE_NONE), + MSM_VIDC_FENCE_NONE, + 0, + HFI_PROP_FENCE_TYPE, + CAP_FLAG_MENU | CAP_FLAG_INPUT_PORT}, + + {OUTBUF_FENCE_TYPE, DEC, H264 | HEVC | VP9, + MSM_VIDC_FENCE_NONE, MSM_VIDC_SYNX_V2_FENCE, + BIT(MSM_VIDC_FENCE_NONE) | BIT(MSM_VIDC_SW_FENCE) | + BIT(MSM_VIDC_SYNX_V2_FENCE), + MSM_VIDC_FENCE_NONE, + 0, + HFI_PROP_FENCE_TYPE, + CAP_FLAG_MENU | CAP_FLAG_OUTPUT_PORT}, + + /* Fence direction for input buffer. Currently unused */ + {INBUF_FENCE_DIRECTION, DEC, H264 | HEVC | VP9, + MSM_VIDC_FENCE_DIR_NONE, MSM_VIDC_FENCE_DIR_NONE, + BIT(MSM_VIDC_FENCE_DIR_NONE), + MSM_VIDC_FENCE_DIR_NONE, + 0, + HFI_PROP_FENCE_DIRECTION, + CAP_FLAG_MENU | CAP_FLAG_INPUT_PORT}, + + {OUTBUF_FENCE_DIRECTION, DEC, H264 | HEVC | VP9, + MSM_VIDC_FENCE_DIR_NONE, MSM_VIDC_FENCE_DIR_RX, + BIT(MSM_VIDC_FENCE_DIR_NONE) | BIT(MSM_VIDC_FENCE_DIR_TX) | + BIT(MSM_VIDC_FENCE_DIR_RX), + MSM_VIDC_FENCE_DIR_NONE, + 0, + HFI_PROP_FENCE_DIRECTION, + CAP_FLAG_MENU | CAP_FLAG_OUTPUT_PORT}, + + {FENCE_ERROR_DATA_CORRUPT, DEC, H264 | HEVC | VP9, + 0, 1, 1, 0, + 0, + HFI_PROP_FENCE_ERROR_DATA_CORRUPT}, + {TS_REORDER, DEC, H264 | HEVC, 0, 1, 1, 0, V4L2_CID_MPEG_VIDC_TS_REORDER}, @@ -2050,6 +2090,46 @@ static struct msm_platform_inst_capability instance_cap_data_volcano_v1[] = { 0, CAP_FLAG_VOLATILE}, + {INBUF_FENCE_TYPE, DEC, H264 | HEVC | VP9, + MSM_VIDC_FENCE_NONE, MSM_VIDC_FENCE_NONE, + BIT(MSM_VIDC_FENCE_NONE), + MSM_VIDC_FENCE_NONE, + 0, + HFI_PROP_FENCE_TYPE, + CAP_FLAG_MENU | CAP_FLAG_INPUT_PORT}, + + {OUTBUF_FENCE_TYPE, DEC, H264 | HEVC | VP9, + MSM_VIDC_FENCE_NONE, MSM_VIDC_SYNX_V2_FENCE, + BIT(MSM_VIDC_FENCE_NONE) | BIT(MSM_VIDC_SW_FENCE) | + BIT(MSM_VIDC_SYNX_V2_FENCE), + MSM_VIDC_FENCE_NONE, + 0, + HFI_PROP_FENCE_TYPE, + CAP_FLAG_MENU | CAP_FLAG_OUTPUT_PORT}, + + /* Fence direction for input buffer. Currently unused */ + {INBUF_FENCE_DIRECTION, DEC, H264 | HEVC | VP9, + MSM_VIDC_FENCE_DIR_NONE, MSM_VIDC_FENCE_DIR_NONE, + BIT(MSM_VIDC_FENCE_DIR_NONE), + MSM_VIDC_FENCE_DIR_NONE, + 0, + HFI_PROP_FENCE_DIRECTION, + CAP_FLAG_MENU | CAP_FLAG_INPUT_PORT}, + + {OUTBUF_FENCE_DIRECTION, DEC, H264 | HEVC | VP9, + MSM_VIDC_FENCE_DIR_NONE, MSM_VIDC_FENCE_DIR_RX, + BIT(MSM_VIDC_FENCE_DIR_NONE) | BIT(MSM_VIDC_FENCE_DIR_TX) | + BIT(MSM_VIDC_FENCE_DIR_RX), + MSM_VIDC_FENCE_DIR_NONE, + 0, + HFI_PROP_FENCE_DIRECTION, + CAP_FLAG_MENU | CAP_FLAG_OUTPUT_PORT}, + + {FENCE_ERROR_DATA_CORRUPT, DEC, H264 | HEVC | VP9, + 0, 1, 1, 0, + 0, + HFI_PROP_FENCE_ERROR_DATA_CORRUPT}, + {TS_REORDER, DEC, H264 | HEVC, 0, 1, 1, 0, V4L2_CID_MPEG_VIDC_TS_REORDER}, @@ -3326,10 +3406,35 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_volc msm_vidc_set_u32}, {META_OUTBUF_FENCE, DEC, H264 | HEVC | VP9, - {LOWLATENCY_MODE}, + {LOWLATENCY_MODE, OUTBUF_FENCE_TYPE, OUTBUF_FENCE_DIRECTION}, NULL, NULL}, + {INBUF_FENCE_TYPE, DEC, H264 | HEVC | VP9, + {0}, + NULL, + NULL}, + + {OUTBUF_FENCE_TYPE, DEC, H264 | HEVC | VP9, + {0}, + msm_vidc_adjust_dec_outbuf_fence_type, + msm_vidc_set_outbuf_fence_type}, + + {INBUF_FENCE_DIRECTION, DEC, H264 | HEVC | VP9, + {0}, + NULL, + NULL}, + + {OUTBUF_FENCE_DIRECTION, DEC, H264 | HEVC | VP9, + {0}, + msm_vidc_adjust_dec_outbuf_fence_direction, + msm_vidc_set_outbuf_fence_direction}, + + {FENCE_ERROR_DATA_CORRUPT, DEC, H264 | HEVC | VP9, + {0}, + NULL, + msm_vidc_set_u32}, + {HFLIP, ENC, CODECS_ALL, {0}, NULL, @@ -3869,6 +3974,31 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_volc NULL, NULL}, + {INBUF_FENCE_TYPE, DEC, H264 | HEVC | VP9, + {0}, + NULL, + NULL}, + + {OUTBUF_FENCE_TYPE, DEC, H264 | HEVC | VP9, + {0}, + msm_vidc_adjust_dec_outbuf_fence_type, + msm_vidc_set_outbuf_fence_type}, + + {INBUF_FENCE_DIRECTION, DEC, H264 | HEVC | VP9, + {0}, + NULL, + NULL}, + + {OUTBUF_FENCE_DIRECTION, DEC, H264 | HEVC | VP9, + {0}, + msm_vidc_adjust_dec_outbuf_fence_direction, + msm_vidc_set_outbuf_fence_direction}, + + {FENCE_ERROR_DATA_CORRUPT, DEC, H264 | HEVC | VP9, + {0}, + NULL, + msm_vidc_set_u32}, + {HFLIP, ENC, CODECS_ALL, {0}, NULL, From e0c63d819afe859df25ad8a70e27200165580f8f Mon Sep 17 00:00:00 2001 From: Rajathi S Date: Tue, 28 May 2024 12:51:57 +0530 Subject: [PATCH 1052/1061] Video: Driver: Add fence support for SKU1 - Add fence support for SKU1 configuration Change-Id: If49c006e9db052028d4aa23b8169499b43c77e8d Signed-off-by: Rajathi S --- driver/platform/volcano/src/msm_vidc_volcano.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/driver/platform/volcano/src/msm_vidc_volcano.c b/driver/platform/volcano/src/msm_vidc_volcano.c index 24f6b84e06..17555b2a5f 100644 --- a/driver/platform/volcano/src/msm_vidc_volcano.c +++ b/driver/platform/volcano/src/msm_vidc_volcano.c @@ -3970,7 +3970,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_volc msm_vidc_set_u32}, {META_OUTBUF_FENCE, DEC, H264 | HEVC | VP9, - {LOWLATENCY_MODE}, + {LOWLATENCY_MODE, OUTBUF_FENCE_TYPE, OUTBUF_FENCE_DIRECTION}, NULL, NULL}, From 5e85abfbd12783da58269cc4124db19050b0d10d Mon Sep 17 00:00:00 2001 From: Rajathi S Date: Wed, 22 May 2024 18:50:07 +0530 Subject: [PATCH 1053/1061] Video: driver: Fixing DPB count - If Splitmode is enabled DPB count should be first used as populated by FW else populated to default value of 4. Change-Id: I3fe5a65da6f7fdfe9882abd22f4b9a94437d9972 Signed-off-by: Rajathi S --- driver/variant/iris2/src/msm_vidc_buffer_iris2.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c index 3421ba66f3..f54764c11e 100644 --- a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. - * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. */ #include "hfi_property.h" @@ -514,9 +514,10 @@ static int msm_buffer_dpb_count(struct msm_vidc_inst *inst) /* decoder dpb buffer count */ if (is_decode_session(inst)) { color_fmt = inst->capabilities[PIX_FMTS].value; - if (is_linear_colorformat(color_fmt)) - count = inst->buffers.output.min_count; - + if (is_linear_colorformat(color_fmt)) { + count = inst->fw_min_count ? + inst->fw_min_count : inst->buffers.output.min_count; + } return count; } From 97b4d500d5193037919cacdf2c20a40c2aca1a58 Mon Sep 17 00:00:00 2001 From: Rajathi S Date: Wed, 22 May 2024 18:50:07 +0530 Subject: [PATCH 1054/1061] Video: driver: Fixing DPB count - If Splitmode is enabled DPB count should be first used as populated by FW else populated to default value of 4. Change-Id: I3fe5a65da6f7fdfe9882abd22f4b9a94437d9972 Signed-off-by: Rajathi S --- driver/variant/iris2/src/msm_vidc_buffer_iris2.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c index 3421ba66f3..f54764c11e 100644 --- a/driver/variant/iris2/src/msm_vidc_buffer_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_buffer_iris2.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. - * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. */ #include "hfi_property.h" @@ -514,9 +514,10 @@ static int msm_buffer_dpb_count(struct msm_vidc_inst *inst) /* decoder dpb buffer count */ if (is_decode_session(inst)) { color_fmt = inst->capabilities[PIX_FMTS].value; - if (is_linear_colorformat(color_fmt)) - count = inst->buffers.output.min_count; - + if (is_linear_colorformat(color_fmt)) { + count = inst->fw_min_count ? + inst->fw_min_count : inst->buffers.output.min_count; + } return count; } From c839c921844b2026d2c814ef715ee69533433e21 Mon Sep 17 00:00:00 2001 From: Rajathi S Date: Tue, 28 May 2024 12:51:57 +0530 Subject: [PATCH 1055/1061] Video: Driver: Add fence support for SKU1 - Add fence support for SKU1 configuration Change-Id: If49c006e9db052028d4aa23b8169499b43c77e8d Signed-off-by: Rajathi S --- driver/platform/volcano/src/msm_vidc_volcano.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/driver/platform/volcano/src/msm_vidc_volcano.c b/driver/platform/volcano/src/msm_vidc_volcano.c index 24f6b84e06..17555b2a5f 100644 --- a/driver/platform/volcano/src/msm_vidc_volcano.c +++ b/driver/platform/volcano/src/msm_vidc_volcano.c @@ -3970,7 +3970,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_volc msm_vidc_set_u32}, {META_OUTBUF_FENCE, DEC, H264 | HEVC | VP9, - {LOWLATENCY_MODE}, + {LOWLATENCY_MODE, OUTBUF_FENCE_TYPE, OUTBUF_FENCE_DIRECTION}, NULL, NULL}, From a7b13bf76df6140364de48ba9b815e12d5f23d33 Mon Sep 17 00:00:00 2001 From: Rajathi S Date: Tue, 11 Jun 2024 15:19:08 +0530 Subject: [PATCH 1056/1061] video: driver: Updated RT_MBPF for Milos SKU1 - Updated RT_MBPF value to support 2 UHD concurrent session. Change-Id: Iddb6e8c547de1cab617195b67390e42fa181e918 Signed-off-by: Rajathi S --- driver/platform/volcano/src/msm_vidc_volcano.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/driver/platform/volcano/src/msm_vidc_volcano.c b/driver/platform/volcano/src/msm_vidc_volcano.c index 6f7e14953f..ecf83e2739 100644 --- a/driver/platform/volcano/src/msm_vidc_volcano.c +++ b/driver/platform/volcano/src/msm_vidc_volcano.c @@ -329,7 +329,7 @@ static struct msm_platform_core_capability core_data_volcano_v1[] = { {MAX_NUM_1080P_SESSIONS, 4}, {MAX_NUM_4K_SESSIONS, 2}, {MAX_SECURE_SESSION_COUNT, 3}, - {MAX_RT_MBPF, 40800}, /* ((3840x2176)/256) + (1920x1088)/256 */ + {MAX_RT_MBPF, 65280}, /* ((3840x2176)/256) x 2 */ {MAX_MBPF, 69632}, /* ((4096x2176)/256) x 2 */ /* max_load 4096x2160@30fps*/ /* Concurrency:UHD@30fps decode + 1080p@30fps encode */ From e8a1ce306a12af11097dd86e586f8691e273fffc Mon Sep 17 00:00:00 2001 From: Rajathi S Date: Tue, 18 Jun 2024 18:07:19 +0530 Subject: [PATCH 1057/1061] video: driver: Set Default session priority to high for volcano SKU1 - When the Client doesn't configure priority for a session set Default session priority to high for SKU1 device Change-Id: I0d02b5da4294bbb92dad299db3f5487b5126d6b1 Signed-off-by: Rajathi S --- driver/platform/volcano/src/msm_vidc_volcano.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/driver/platform/volcano/src/msm_vidc_volcano.c b/driver/platform/volcano/src/msm_vidc_volcano.c index ecf83e2739..7082d1b71c 100644 --- a/driver/platform/volcano/src/msm_vidc_volcano.c +++ b/driver/platform/volcano/src/msm_vidc_volcano.c @@ -3098,7 +3098,7 @@ static struct msm_platform_inst_capability instance_cap_data_volcano_v1[] = { CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, {PRIORITY, DEC | ENC, CODECS_ALL, - 0, 4, 1, 4, + 0, 4, 1, 1, V4L2_CID_MPEG_VIDC_PRIORITY, HFI_PROP_SESSION_PRIORITY, CAP_FLAG_DYNAMIC_ALLOWED}, From 34b885bf2f5ae1f33b30363e01c5bc5f6446bdf9 Mon Sep 17 00:00:00 2001 From: Rajathi S Date: Tue, 18 Jun 2024 18:07:19 +0530 Subject: [PATCH 1058/1061] video: driver: Set Default session priority to high for volcano SKU1 - When the Client doesn't configure priority for a session set Default session priority to high for SKU1 device Change-Id: I0d02b5da4294bbb92dad299db3f5487b5126d6b1 Signed-off-by: Rajathi S --- driver/platform/volcano/src/msm_vidc_volcano.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/driver/platform/volcano/src/msm_vidc_volcano.c b/driver/platform/volcano/src/msm_vidc_volcano.c index ecf83e2739..7082d1b71c 100644 --- a/driver/platform/volcano/src/msm_vidc_volcano.c +++ b/driver/platform/volcano/src/msm_vidc_volcano.c @@ -3098,7 +3098,7 @@ static struct msm_platform_inst_capability instance_cap_data_volcano_v1[] = { CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED}, {PRIORITY, DEC | ENC, CODECS_ALL, - 0, 4, 1, 4, + 0, 4, 1, 1, V4L2_CID_MPEG_VIDC_PRIORITY, HFI_PROP_SESSION_PRIORITY, CAP_FLAG_DYNAMIC_ALLOWED}, From 1ee56f827dacee68a4995a8be685e98d0774b1d7 Mon Sep 17 00:00:00 2001 From: Megha Byahatti Date: Fri, 28 Jun 2024 14:19:38 +0530 Subject: [PATCH 1059/1061] video: driver: Recalculate VPSS line buffer macro Recalculate VPSS line buffer macro to accommodate all corner cases in VPSS operation. HFI review done with ccb id 3508147. Change-Id: If43ad34165a4206b6c9d19993dd4194f7ba597ea Signed-off-by: Megha Byahatti --- driver/variant/iris33/inc/hfi_buffer_iris33.h | 33 ++++++++++++++----- 1 file changed, 25 insertions(+), 8 deletions(-) diff --git a/driver/variant/iris33/inc/hfi_buffer_iris33.h b/driver/variant/iris33/inc/hfi_buffer_iris33.h index 59ae44317f..3fb918bb7d 100644 --- a/driver/variant/iris33/inc/hfi_buffer_iris33.h +++ b/driver/variant/iris33/inc/hfi_buffer_iris33.h @@ -1546,11 +1546,27 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define SIZE_IR_BUF(num_lcu_in_frame) HFI_ALIGN((((((num_lcu_in_frame) << 1) + 7) &\ (~7)) * 3), VENUS_DMA_ALIGNMENT) -#define SIZE_VPSS_LINE_BUF(num_vpp_pipes_enc, frame_height_coded, \ - frame_width_coded) \ - (HFI_ALIGN(((((((8192) >> 2) << 5) * (num_vpp_pipes_enc)) + 64) + \ - (((((MAX((frame_width_coded), (frame_height_coded)) + 3) >> 2) << 5) +\ - 256) * 16)), VENUS_DMA_ALIGNMENT)) +#define SIZE_VPSS_LINE_BUF(_size, num_vpp_pipes_enc, frame_height_coded, \ + frame_width_coded) \ + do { \ + HFI_U32 vpss_4tap_top = 0, vpss_4tap_left = 0, vpss_div2_top = 0, \ + vpss_div2_left = 0, vpss_top_lb = 0, vpss_left_lb = 0, \ + size_left = 0, size_top = 0, color_comp = 2; \ + vpss_4tap_top = (((((MAX((frame_width_coded), (frame_height_coded)) \ + * 2) + 3) >> 2) << 4) + 256); \ + vpss_4tap_left = ((((8192 + 3) >> 2) << 5) + 64);\ + vpss_div2_top = ((((MAX((frame_width_coded), (frame_height_coded)) \ + + 3) >> 2) << 4) + 256); \ + vpss_div2_left = (((((MAX((frame_width_coded), (frame_height_coded)) \ + * 2) + 3) >> 2) << 5) + 64); \ + vpss_top_lb = (((frame_width_coded) + 1) << 3); \ + vpss_left_lb = (((frame_height_coded) << 3) * (num_vpp_pipes_enc)); \ + size_left = (((vpss_4tap_left) + (vpss_div2_left)) * (color_comp) \ + * (num_vpp_pipes_enc)); \ + size_top = (((vpss_4tap_top) + (vpss_div2_top)) * (color_comp)); \ + _size = ((size_left) + (size_top) + (vpss_top_lb) + (vpss_left_lb)); \ + _size = (HFI_ALIGN(_size, VENUS_DMA_ALIGNMENT)); \ + } while (0) #define SIZE_TOP_LINE_BUF_FIRST_STG_SAO(frame_width_coded) \ HFI_ALIGN((16 * ((frame_width_coded) >> 5)), VENUS_DMA_ALIGNMENT) @@ -1565,7 +1581,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ top_line_buff_ctrl_fe_size = 0; \ HFI_U32 left_line_buff_metadata_recon__y__size = 0, \ left_line_buff_metadata_recon__uv__size = 0, \ - line_buff_recon_pix_size = 0; \ + line_buff_recon_pix_size = 0, vpss_line_buff_size = 0; \ width_in_lcus = ((frame_width) + (lcu_size)-1) / (lcu_size); \ height_in_lcus = ((frame_height) + (lcu_size)-1) / (lcu_size); \ frame_width_coded = width_in_lcus * (lcu_size); \ @@ -1586,6 +1602,8 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ frame_height_coded, is_ten_bit, num_vpp_pipes_enc); \ SIZE_LINEBUFF_RECON_PIX(line_buff_recon_pix_size, is_ten_bit,\ frame_width_coded); \ + SIZE_VPSS_LINE_BUF(vpss_line_buff_size, num_vpp_pipes_enc, \ + frame_height_coded, frame_width_coded); \ _size = SIZE_LINE_BUF_CTRL(frame_width_coded) + \ SIZE_LINE_BUF_CTRL_ID2(frame_width_coded) + \ line_buff_data_size + \ @@ -1595,10 +1613,9 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ left_line_buff_metadata_recon__y__size + \ left_line_buff_metadata_recon__uv__size + \ line_buff_recon_pix_size + \ + vpss_line_buff_size + \ SIZE_LEFT_LINEBUFF_CTRL_FE(frame_height_coded, \ num_vpp_pipes_enc) + SIZE_LINE_BUF_SDE(frame_width_coded) + \ - SIZE_VPSS_LINE_BUF(num_vpp_pipes_enc, frame_height_coded, \ - frame_width_coded) + \ SIZE_TOP_LINE_BUF_FIRST_STG_SAO(frame_width_coded); \ } while (0) From 329603cd724003ce05886f0fd1a6f04760990d22 Mon Sep 17 00:00:00 2001 From: Divyanshu Varma Date: Thu, 2 May 2024 15:51:40 +0530 Subject: [PATCH 1060/1061] video-driver: Made changes as per encoder configuration review - Changed to REFRESH_PERIOD_TYPE_RANDOM in IR_TYPE, ENC, H264 | HEVC - Changed values of B_FRAME, ENC, H264 | HEVC - Added inst->capabilities[SLICE_MODE] Change-Id: I8e9a02fff96433087b859cd098078f6eba75d42f --- driver/platform/volcano/src/msm_vidc_volcano.c | 14 ++++++-------- driver/variant/iris2/src/msm_vidc_iris2.c | 4 ++++ 2 files changed, 10 insertions(+), 8 deletions(-) diff --git a/driver/platform/volcano/src/msm_vidc_volcano.c b/driver/platform/volcano/src/msm_vidc_volcano.c index 7082d1b71c..38ef2788e8 100644 --- a/driver/platform/volcano/src/msm_vidc_volcano.c +++ b/driver/platform/volcano/src/msm_vidc_volcano.c @@ -819,7 +819,7 @@ static struct msm_platform_inst_capability instance_cap_data_volcano_v0[] = { 0}, {B_FRAME, ENC, H264 | HEVC, - 0, 7, 1, 0, + 0, 1, 1, 0, V4L2_CID_MPEG_VIDEO_B_FRAMES, HFI_PROP_MAX_B_FRAMES, CAP_FLAG_OUTPUT_PORT}, @@ -899,9 +899,8 @@ static struct msm_platform_inst_capability instance_cap_data_volcano_v0[] = { {IR_TYPE, ENC, H264 | HEVC, V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_RANDOM, - V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_CYCLIC, - BIT(V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_RANDOM) | - BIT(V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_CYCLIC), + V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_RANDOM, + BIT(V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_RANDOM), V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_RANDOM, V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE, 0, @@ -2322,7 +2321,7 @@ static struct msm_platform_inst_capability instance_cap_data_volcano_v1[] = { 0}, {B_FRAME, ENC, H264 | HEVC, - 0, 7, 1, 0, + 0, 1, 1, 0, V4L2_CID_MPEG_VIDEO_B_FRAMES, HFI_PROP_MAX_B_FRAMES, CAP_FLAG_OUTPUT_PORT}, @@ -2402,9 +2401,8 @@ static struct msm_platform_inst_capability instance_cap_data_volcano_v1[] = { {IR_TYPE, ENC, H264 | HEVC, V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_RANDOM, - V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_CYCLIC, - BIT(V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_RANDOM) | - BIT(V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_CYCLIC), + V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_RANDOM, + BIT(V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_RANDOM), V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_RANDOM, V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE, 0, diff --git a/driver/variant/iris2/src/msm_vidc_iris2.c b/driver/variant/iris2/src/msm_vidc_iris2.c index d4dd19a125..2743450641 100644 --- a/driver/variant/iris2/src/msm_vidc_iris2.c +++ b/driver/variant/iris2/src/msm_vidc_iris2.c @@ -788,6 +788,10 @@ int msm_vidc_decide_work_mode_iris2(struct msm_vidc_inst *inst) (inst->capabilities[LOWLATENCY_MODE].value)) { work_mode = MSM_VIDC_STAGE_1; } + if (inst->capabilities[SLICE_MODE].value == + V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_BYTES) { + work_mode = MSM_VIDC_STAGE_1; + } if (inst->capabilities[LOSSLESS].value) work_mode = MSM_VIDC_STAGE_2; From a50fee0803f07e2beee4d44cf891456f864c29b6 Mon Sep 17 00:00:00 2001 From: Rajathi S Date: Tue, 16 Jul 2024 11:00:46 +0530 Subject: [PATCH 1061/1061] video: driver: Remove transcoding info in volcano - Remove transcoding info since FW doesn't support transoding info HFI in volcano Change-Id: I7147a4e2ff5debedebb36ad8d676597ee309193a Signed-off-by: Rajathi S --- .../platform/volcano/src/msm_vidc_volcano.c | 50 ++----------------- 1 file changed, 4 insertions(+), 46 deletions(-) diff --git a/driver/platform/volcano/src/msm_vidc_volcano.c b/driver/platform/volcano/src/msm_vidc_volcano.c index 7082d1b71c..ef4b2308c9 100644 --- a/driver/platform/volcano/src/msm_vidc_volcano.c +++ b/driver/platform/volcano/src/msm_vidc_volcano.c @@ -1684,22 +1684,6 @@ static struct msm_platform_inst_capability instance_cap_data_volcano_v0[] = { HFI_PROP_HISTOGRAM_INFO, CAP_FLAG_BITMASK | CAP_FLAG_META}, - {META_TRANSCODING_STAT_INFO, DEC, HEVC | H264, - MSM_VIDC_META_DISABLE, - MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, - 0, MSM_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_TRANSCODE_STAT_INFO, - HFI_PROP_TRANSCODING_STAT_INFO, - CAP_FLAG_BITMASK | CAP_FLAG_META}, - - {META_TRANSCODING_STAT_INFO, ENC, HEVC | H264, - MSM_VIDC_META_DISABLE, - MSM_VIDC_META_DYN_ENABLE | MSM_VIDC_META_TX_INPUT, - 0, MSM_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_TRANSCODE_STAT_INFO, - HFI_PROP_TRANSCODING_STAT_INFO, - CAP_FLAG_BITMASK | CAP_FLAG_META}, - {META_PICTURE_TYPE, DEC, CODECS_ALL, MSM_VIDC_META_DISABLE, MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_INPUT, @@ -3180,22 +3164,6 @@ static struct msm_platform_inst_capability instance_cap_data_volcano_v1[] = { HFI_PROP_HISTOGRAM_INFO, CAP_FLAG_BITMASK | CAP_FLAG_META}, - {META_TRANSCODING_STAT_INFO, DEC, HEVC | H264, - MSM_VIDC_META_DISABLE, - MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_OUTPUT, - 0, MSM_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_TRANSCODE_STAT_INFO, - HFI_PROP_TRANSCODING_STAT_INFO, - CAP_FLAG_BITMASK | CAP_FLAG_META}, - - {META_TRANSCODING_STAT_INFO, ENC, HEVC | H264, - MSM_VIDC_META_DISABLE, - MSM_VIDC_META_DYN_ENABLE | MSM_VIDC_META_TX_INPUT, - 0, MSM_VIDC_META_DISABLE, - V4L2_CID_MPEG_VIDC_METADATA_TRANSCODE_STAT_INFO, - HFI_PROP_TRANSCODING_STAT_INFO, - CAP_FLAG_BITMASK | CAP_FLAG_META}, - {META_PICTURE_TYPE, DEC, CODECS_ALL, MSM_VIDC_META_DISABLE, MSM_VIDC_META_ENABLE | MSM_VIDC_META_RX_INPUT, @@ -3490,7 +3458,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_volc P_FRAME_QP, B_FRAME_QP, ENH_LAYER_COUNT, BIT_RATE, META_ROI_INFO, MIN_QUALITY, BITRATE_BOOST, VBV_DELAY, PEAK_BITRATE, SLICE_MODE, CONTENT_ADAPTIVE_CODING, - BLUR_TYPES, LOWLATENCY_MODE, META_TRANSCODING_STAT_INFO}, + BLUR_TYPES, LOWLATENCY_MODE}, msm_vidc_adjust_bitrate_mode, msm_vidc_set_u32_enum}, @@ -3499,7 +3467,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_volc P_FRAME_QP, B_FRAME_QP, CONSTANT_QUALITY, ENH_LAYER_COUNT, BIT_RATE, META_ROI_INFO, MIN_QUALITY, BITRATE_BOOST, VBV_DELAY, PEAK_BITRATE, SLICE_MODE, CONTENT_ADAPTIVE_CODING, - BLUR_TYPES, LOWLATENCY_MODE, META_EVA_STATS, META_TRANSCODING_STAT_INFO}, + BLUR_TYPES, LOWLATENCY_MODE, META_EVA_STATS}, msm_vidc_adjust_bitrate_mode, msm_vidc_set_u32_enum}, @@ -3918,11 +3886,6 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_volc {0}, msm_vidc_adjust_hdr10plus, NULL}, - - {META_TRANSCODING_STAT_INFO, ENC, HEVC | H264, - {0}, - msm_vidc_adjust_transcoding_stats, - NULL}, }; static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_volcano_v1[] = { @@ -4054,7 +4017,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_volc P_FRAME_QP, B_FRAME_QP, ENH_LAYER_COUNT, BIT_RATE, META_ROI_INFO, MIN_QUALITY, BITRATE_BOOST, VBV_DELAY, PEAK_BITRATE, SLICE_MODE, CONTENT_ADAPTIVE_CODING, - BLUR_TYPES, LOWLATENCY_MODE, META_TRANSCODING_STAT_INFO}, + BLUR_TYPES, LOWLATENCY_MODE}, msm_vidc_adjust_bitrate_mode, msm_vidc_set_u32_enum}, @@ -4063,7 +4026,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_volc P_FRAME_QP, B_FRAME_QP, CONSTANT_QUALITY, ENH_LAYER_COUNT, BIT_RATE, META_ROI_INFO, MIN_QUALITY, BITRATE_BOOST, VBV_DELAY, PEAK_BITRATE, SLICE_MODE, CONTENT_ADAPTIVE_CODING, - BLUR_TYPES, LOWLATENCY_MODE, META_EVA_STATS, META_TRANSCODING_STAT_INFO}, + BLUR_TYPES, LOWLATENCY_MODE, META_EVA_STATS}, msm_vidc_adjust_bitrate_mode, msm_vidc_set_u32_enum}, @@ -4482,11 +4445,6 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_volc {0}, msm_vidc_adjust_hdr10plus, NULL}, - - {META_TRANSCODING_STAT_INFO, ENC, HEVC | H264, - {0}, - msm_vidc_adjust_transcoding_stats, - NULL}, }; static const u32 volcano_msm_vidc_ssr_type[] = {